system stringclasses 7 values | input stringlengths 10 94.5k | output stringlengths 14 55.5k |
|---|---|---|
You are a helpful coding assistant specialized in converting HIP source code to AMD host assembly. | #include <hip/hip_runtime.h>
#include <iostream>
#define THREAD_PER_BLOCK 1024.0
#define CUDAMALLOC_ERROR(_err) \
do { \
if (_err != hipSuccess) { \
printf("%s in %s at line %d\n", hipGetErrorString(_err),__FILE__,__LINE__); \
exit(EXIT_FAILURE); \
} \
}while(0)
void init_array(float *array, long size, float value) {
for (size_t i = 0; i < size; ++i) {
array[i] = value;
}
}
__global__
void vecAddKernel(float *A, float *B, float *C, long n) {
int i = blockDim.x * blockIdx.x + threadIdx.x;
if (i < n) {
C[i] = A[i] + B[i];
}
}
void vecAdd(float *h_A, float *h_B, float *h_C, long n) {
float *d_A, *d_B, *d_C;
long size = n * sizeof (float);
hipError_t err = hipMalloc((void **) &d_A, size);
CUDAMALLOC_ERROR(err);
err = hipMalloc((void **) &d_B, size);
CUDAMALLOC_ERROR(err);
err = hipMalloc((void **) &d_C, size);
CUDAMALLOC_ERROR(err);
hipMemcpy(d_A, h_A, size, hipMemcpyHostToDevice);
hipMemcpy(d_B, h_B, size, hipMemcpyHostToDevice);
hipMemcpy(d_C, h_C, size, hipMemcpyHostToDevice);
dim3 dimGrid{(uint) ceil(n/THREAD_PER_BLOCK),1,1};
dim3 dimBlock = {(uint) THREAD_PER_BLOCK,1,1};
// KERNEL LAUNCH
vecAddKernel<<<dimGrid, dimBlock>>>(d_A, d_B, d_C, n);
hipMemcpy(h_C, d_C, size, hipMemcpyDeviceToHost);
hipFree(d_A);
hipFree(d_B);
hipFree(d_C);
}
int main() {
clock_t begin = clock();
long nbElements = 10e7;
long size = nbElements * sizeof(float);
float *h_A, *h_B, *h_C;
h_A = (float *) malloc(size);
h_B = (float *) malloc(size);
h_C = (float *) malloc(size);
init_array(h_A, nbElements, 1);
init_array(h_B, nbElements, 2);
init_array(h_C, nbElements, 0);
vecAdd(h_A, h_B, h_C, nbElements);
for (int i = 10e6; i < 10e7; ++i) {
std::cout << h_C[i] << std::endl;
}
free(h_A); free(h_B); free(h_C);
clock_t end = clock();
double elapsed_time = (double)(end - begin) / CLOCKS_PER_SEC;
std::cout << elapsed_time << "s" << std::endl;
return 0;
} | .text
.file "main.hip"
# Start of file scope inline assembly
.globl _ZSt21ios_base_library_initv
# End of file scope inline assembly
.globl _Z10init_arrayPflf # -- Begin function _Z10init_arrayPflf
.p2align 4, 0x90
.type _Z10init_arrayPflf,@function
_Z10init_arrayPflf: # @_Z10init_arrayPflf
.cfi_startproc
# %bb.0:
testq %rsi, %rsi
je .LBB0_3
# %bb.1: # %.lr.ph.preheader
xorl %eax, %eax
.p2align 4, 0x90
.LBB0_2: # %.lr.ph
# =>This Inner Loop Header: Depth=1
movss %xmm0, (%rdi,%rax,4)
incq %rax
cmpq %rax, %rsi
jne .LBB0_2
.LBB0_3: # %._crit_edge
retq
.Lfunc_end0:
.size _Z10init_arrayPflf, .Lfunc_end0-_Z10init_arrayPflf
.cfi_endproc
# -- End function
.globl _Z27__device_stub__vecAddKernelPfS_S_l # -- Begin function _Z27__device_stub__vecAddKernelPfS_S_l
.p2align 4, 0x90
.type _Z27__device_stub__vecAddKernelPfS_S_l,@function
_Z27__device_stub__vecAddKernelPfS_S_l: # @_Z27__device_stub__vecAddKernelPfS_S_l
.cfi_startproc
# %bb.0:
subq $120, %rsp
.cfi_def_cfa_offset 128
movq %rdi, 72(%rsp)
movq %rsi, 64(%rsp)
movq %rdx, 56(%rsp)
movq %rcx, 48(%rsp)
leaq 72(%rsp), %rax
movq %rax, 80(%rsp)
leaq 64(%rsp), %rax
movq %rax, 88(%rsp)
leaq 56(%rsp), %rax
movq %rax, 96(%rsp)
leaq 48(%rsp), %rax
movq %rax, 104(%rsp)
leaq 32(%rsp), %rdi
leaq 16(%rsp), %rsi
leaq 8(%rsp), %rdx
movq %rsp, %rcx
callq __hipPopCallConfiguration
movq 32(%rsp), %rsi
movl 40(%rsp), %edx
movq 16(%rsp), %rcx
movl 24(%rsp), %r8d
leaq 80(%rsp), %r9
movl $_Z12vecAddKernelPfS_S_l, %edi
pushq (%rsp)
.cfi_adjust_cfa_offset 8
pushq 16(%rsp)
.cfi_adjust_cfa_offset 8
callq hipLaunchKernel
addq $136, %rsp
.cfi_adjust_cfa_offset -136
retq
.Lfunc_end1:
.size _Z27__device_stub__vecAddKernelPfS_S_l, .Lfunc_end1-_Z27__device_stub__vecAddKernelPfS_S_l
.cfi_endproc
# -- End function
.section .rodata.cst8,"aM",@progbits,8
.p2align 3, 0x0 # -- Begin function _Z6vecAddPfS_S_l
.LCPI2_0:
.quad 0x3f50000000000000 # double 9.765625E-4
.text
.globl _Z6vecAddPfS_S_l
.p2align 4, 0x90
.type _Z6vecAddPfS_S_l,@function
_Z6vecAddPfS_S_l: # @_Z6vecAddPfS_S_l
.cfi_startproc
# %bb.0:
pushq %r15
.cfi_def_cfa_offset 16
pushq %r14
.cfi_def_cfa_offset 24
pushq %r13
.cfi_def_cfa_offset 32
pushq %r12
.cfi_def_cfa_offset 40
pushq %rbx
.cfi_def_cfa_offset 48
subq $144, %rsp
.cfi_def_cfa_offset 192
.cfi_offset %rbx, -48
.cfi_offset %r12, -40
.cfi_offset %r13, -32
.cfi_offset %r14, -24
.cfi_offset %r15, -16
movq %rcx, %r15
movq %rdx, %rbx
movq %rsi, %r12
movq %rdi, %r13
leaq (,%rcx,4), %r14
leaq 24(%rsp), %rdi
movq %r14, %rsi
callq hipMalloc
testl %eax, %eax
jne .LBB2_1
# %bb.3:
leaq 16(%rsp), %rdi
movq %r14, %rsi
callq hipMalloc
testl %eax, %eax
jne .LBB2_4
# %bb.5:
leaq 8(%rsp), %rdi
movq %r14, %rsi
callq hipMalloc
testl %eax, %eax
jne .LBB2_6
# %bb.7:
movq 24(%rsp), %rdi
movq %r13, %rsi
movq %r14, %rdx
movl $1, %ecx
callq hipMemcpy
movq 16(%rsp), %rdi
movq %r12, %rsi
movq %r14, %rdx
movl $1, %ecx
callq hipMemcpy
movq 8(%rsp), %rdi
movq %rbx, %rsi
movq %r14, %rdx
movl $1, %ecx
callq hipMemcpy
cvtsi2sd %r15, %xmm0
mulsd .LCPI2_0(%rip), %xmm0
callq ceil@PLT
cvttsd2si %xmm0, %rax
movl %eax, %edi
movabsq $4294967296, %rdx # imm = 0x100000000
orq %rdx, %rdi
orq $1024, %rdx # imm = 0x400
movl $1, %esi
movl $1, %ecx
xorl %r8d, %r8d
xorl %r9d, %r9d
callq __hipPushCallConfiguration
testl %eax, %eax
jne .LBB2_9
# %bb.8:
movq 24(%rsp), %rax
movq 16(%rsp), %rcx
movq 8(%rsp), %rdx
movq %rax, 104(%rsp)
movq %rcx, 96(%rsp)
movq %rdx, 88(%rsp)
movq %r15, 80(%rsp)
leaq 104(%rsp), %rax
movq %rax, 112(%rsp)
leaq 96(%rsp), %rax
movq %rax, 120(%rsp)
leaq 88(%rsp), %rax
movq %rax, 128(%rsp)
leaq 80(%rsp), %rax
movq %rax, 136(%rsp)
leaq 64(%rsp), %rdi
leaq 48(%rsp), %rsi
leaq 40(%rsp), %rdx
leaq 32(%rsp), %rcx
callq __hipPopCallConfiguration
movq 64(%rsp), %rsi
movl 72(%rsp), %edx
movq 48(%rsp), %rcx
movl 56(%rsp), %r8d
leaq 112(%rsp), %r9
movl $_Z12vecAddKernelPfS_S_l, %edi
pushq 32(%rsp)
.cfi_adjust_cfa_offset 8
pushq 48(%rsp)
.cfi_adjust_cfa_offset 8
callq hipLaunchKernel
addq $16, %rsp
.cfi_adjust_cfa_offset -16
.LBB2_9:
movq 8(%rsp), %rsi
movq %rbx, %rdi
movq %r14, %rdx
movl $2, %ecx
callq hipMemcpy
movq 24(%rsp), %rdi
callq hipFree
movq 16(%rsp), %rdi
callq hipFree
movq 8(%rsp), %rdi
callq hipFree
addq $144, %rsp
.cfi_def_cfa_offset 48
popq %rbx
.cfi_def_cfa_offset 40
popq %r12
.cfi_def_cfa_offset 32
popq %r13
.cfi_def_cfa_offset 24
popq %r14
.cfi_def_cfa_offset 16
popq %r15
.cfi_def_cfa_offset 8
retq
.LBB2_1:
.cfi_def_cfa_offset 192
movl %eax, %edi
callq hipGetErrorString
movl $.L.str, %edi
movl $.L.str.1, %edx
movq %rax, %rsi
movl $35, %ecx
jmp .LBB2_2
.LBB2_4:
movl %eax, %edi
callq hipGetErrorString
movl $.L.str, %edi
movl $.L.str.1, %edx
movq %rax, %rsi
movl $37, %ecx
jmp .LBB2_2
.LBB2_6:
movl %eax, %edi
callq hipGetErrorString
movl $.L.str, %edi
movl $.L.str.1, %edx
movq %rax, %rsi
movl $39, %ecx
.LBB2_2:
xorl %eax, %eax
callq printf
movl $1, %edi
callq exit
.Lfunc_end2:
.size _Z6vecAddPfS_S_l, .Lfunc_end2-_Z6vecAddPfS_S_l
.cfi_endproc
# -- End function
.section .rodata.cst8,"aM",@progbits,8
.p2align 3, 0x0 # -- Begin function main
.LCPI3_0:
.quad 0x412e848000000000 # double 1.0E+6
.text
.globl main
.p2align 4, 0x90
.type main,@function
main: # @main
.cfi_startproc
# %bb.0:
pushq %rbp
.cfi_def_cfa_offset 16
pushq %r15
.cfi_def_cfa_offset 24
pushq %r14
.cfi_def_cfa_offset 32
pushq %r13
.cfi_def_cfa_offset 40
pushq %r12
.cfi_def_cfa_offset 48
pushq %rbx
.cfi_def_cfa_offset 56
pushq %rax
.cfi_def_cfa_offset 64
.cfi_offset %rbx, -56
.cfi_offset %r12, -48
.cfi_offset %r13, -40
.cfi_offset %r14, -32
.cfi_offset %r15, -24
.cfi_offset %rbp, -16
callq clock
movq %rax, (%rsp) # 8-byte Spill
movl $400000000, %edi # imm = 0x17D78400
callq malloc
movq %rax, %r14
movl $400000000, %edi # imm = 0x17D78400
callq malloc
movq %rax, %r15
movl $400000000, %edi # imm = 0x17D78400
callq malloc
movq %rax, %r12
xorl %eax, %eax
.p2align 4, 0x90
.LBB3_1: # %.lr.ph.i
# =>This Inner Loop Header: Depth=1
movl $1065353216, (%r14,%rax,4) # imm = 0x3F800000
incq %rax
cmpq $100000000, %rax # imm = 0x5F5E100
jne .LBB3_1
# %bb.2: # %.lr.ph.i23.preheader
xorl %eax, %eax
.p2align 4, 0x90
.LBB3_3: # %.lr.ph.i23
# =>This Inner Loop Header: Depth=1
movl $1073741824, (%r15,%rax,4) # imm = 0x40000000
incq %rax
cmpq $100000000, %rax # imm = 0x5F5E100
jne .LBB3_3
# %bb.4: # %.lr.ph.i27.preheader
movl $400000000, %edx # imm = 0x17D78400
movq %r12, %rdi
xorl %esi, %esi
callq memset@PLT
movl $100000000, %ecx # imm = 0x5F5E100
movq %r14, %rdi
movq %r15, %rsi
movq %r12, %rdx
callq _Z6vecAddPfS_S_l
movl $10000000, %ebp # imm = 0x989680
jmp .LBB3_5
.p2align 4, 0x90
.LBB3_13: # in Loop: Header=BB3_5 Depth=1
movq %r13, %rdi
movq %rax, %rbx
callq _ZNKSt5ctypeIcE13_M_widen_initEv
movq (%r13), %rax
movq %r13, %rdi
movl $10, %esi
callq *48(%rax)
movl %eax, %ecx
movq %rbx, %rax
.LBB3_14: # %_ZSt4endlIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_.exit35
# in Loop: Header=BB3_5 Depth=1
movsbl %cl, %esi
movq %rax, %rdi
callq _ZNSo3putEc
movq %rax, %rdi
callq _ZNSo5flushEv
incq %rbp
cmpq $100000000, %rbp # imm = 0x5F5E100
je .LBB3_8
.LBB3_5: # =>This Inner Loop Header: Depth=1
movss (%r12,%rbp,4), %xmm0 # xmm0 = mem[0],zero,zero,zero
cvtss2sd %xmm0, %xmm0
movl $_ZSt4cout, %edi
callq _ZNSo9_M_insertIdEERSoT_
movq (%rax), %rcx
movq -24(%rcx), %rcx
movq 240(%rax,%rcx), %r13
testq %r13, %r13
je .LBB3_15
# %bb.6: # %_ZSt13__check_facetISt5ctypeIcEERKT_PS3_.exit.i.i32
# in Loop: Header=BB3_5 Depth=1
cmpb $0, 56(%r13)
je .LBB3_13
# %bb.7: # in Loop: Header=BB3_5 Depth=1
movzbl 67(%r13), %ecx
jmp .LBB3_14
.LBB3_8:
movq %r14, %rdi
callq free
movq %r15, %rdi
callq free
movq %r12, %rdi
callq free
callq clock
subq (%rsp), %rax # 8-byte Folded Reload
xorps %xmm0, %xmm0
cvtsi2sd %rax, %xmm0
divsd .LCPI3_0(%rip), %xmm0
movl $_ZSt4cout, %edi
callq _ZNSo9_M_insertIdEERSoT_
movq %rax, %rbx
movl $.L.str.2, %esi
movl $1, %edx
movq %rax, %rdi
callq _ZSt16__ostream_insertIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_PKS3_l
movq (%rbx), %rax
movq -24(%rax), %rax
movq 240(%rbx,%rax), %r14
testq %r14, %r14
je .LBB3_15
# %bb.9: # %_ZSt13__check_facetISt5ctypeIcEERKT_PS3_.exit.i.i
cmpb $0, 56(%r14)
je .LBB3_11
# %bb.10:
movzbl 67(%r14), %eax
jmp .LBB3_12
.LBB3_11:
movq %r14, %rdi
callq _ZNKSt5ctypeIcE13_M_widen_initEv
movq (%r14), %rax
movq %r14, %rdi
movl $10, %esi
callq *48(%rax)
.LBB3_12: # %_ZSt4endlIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_.exit
movsbl %al, %esi
movq %rbx, %rdi
callq _ZNSo3putEc
movq %rax, %rdi
callq _ZNSo5flushEv
xorl %eax, %eax
addq $8, %rsp
.cfi_def_cfa_offset 56
popq %rbx
.cfi_def_cfa_offset 48
popq %r12
.cfi_def_cfa_offset 40
popq %r13
.cfi_def_cfa_offset 32
popq %r14
.cfi_def_cfa_offset 24
popq %r15
.cfi_def_cfa_offset 16
popq %rbp
.cfi_def_cfa_offset 8
retq
.LBB3_15:
.cfi_def_cfa_offset 64
callq _ZSt16__throw_bad_castv
.Lfunc_end3:
.size main, .Lfunc_end3-main
.cfi_endproc
# -- End function
.p2align 4, 0x90 # -- Begin function __hip_module_ctor
.type __hip_module_ctor,@function
__hip_module_ctor: # @__hip_module_ctor
.cfi_startproc
# %bb.0:
subq $40, %rsp
.cfi_def_cfa_offset 48
cmpq $0, __hip_gpubin_handle(%rip)
jne .LBB4_2
# %bb.1:
movl $__hip_fatbin_wrapper, %edi
callq __hipRegisterFatBinary
movq %rax, __hip_gpubin_handle(%rip)
.LBB4_2:
movq __hip_gpubin_handle(%rip), %rdi
xorps %xmm0, %xmm0
movups %xmm0, 16(%rsp)
movups %xmm0, (%rsp)
movl $_Z12vecAddKernelPfS_S_l, %esi
movl $.L__unnamed_1, %edx
movl $.L__unnamed_1, %ecx
movl $-1, %r8d
xorl %r9d, %r9d
callq __hipRegisterFunction
movl $__hip_module_dtor, %edi
addq $40, %rsp
.cfi_def_cfa_offset 8
jmp atexit # TAILCALL
.Lfunc_end4:
.size __hip_module_ctor, .Lfunc_end4-__hip_module_ctor
.cfi_endproc
# -- End function
.p2align 4, 0x90 # -- Begin function __hip_module_dtor
.type __hip_module_dtor,@function
__hip_module_dtor: # @__hip_module_dtor
.cfi_startproc
# %bb.0:
movq __hip_gpubin_handle(%rip), %rdi
testq %rdi, %rdi
je .LBB5_2
# %bb.1:
pushq %rax
.cfi_def_cfa_offset 16
callq __hipUnregisterFatBinary
movq $0, __hip_gpubin_handle(%rip)
addq $8, %rsp
.cfi_def_cfa_offset 8
.LBB5_2:
retq
.Lfunc_end5:
.size __hip_module_dtor, .Lfunc_end5-__hip_module_dtor
.cfi_endproc
# -- End function
.type _Z12vecAddKernelPfS_S_l,@object # @_Z12vecAddKernelPfS_S_l
.section .rodata,"a",@progbits
.globl _Z12vecAddKernelPfS_S_l
.p2align 3, 0x0
_Z12vecAddKernelPfS_S_l:
.quad _Z27__device_stub__vecAddKernelPfS_S_l
.size _Z12vecAddKernelPfS_S_l, 8
.type .L.str,@object # @.str
.section .rodata.str1.1,"aMS",@progbits,1
.L.str:
.asciz "%s in %s at line %d\n"
.size .L.str, 21
.type .L.str.1,@object # @.str.1
.L.str.1:
.asciz "/home/ubuntu/Datasets/stackv2/train-structured-repos-hip/KarlEmm/gpu_paralell/main/first_program/main.hip"
.size .L.str.1, 106
.type .L.str.2,@object # @.str.2
.L.str.2:
.asciz "s"
.size .L.str.2, 2
.type .L__unnamed_1,@object # @0
.L__unnamed_1:
.asciz "_Z12vecAddKernelPfS_S_l"
.size .L__unnamed_1, 24
.type __hip_fatbin_wrapper,@object # @__hip_fatbin_wrapper
.section .hipFatBinSegment,"a",@progbits
.p2align 3, 0x0
__hip_fatbin_wrapper:
.long 1212764230 # 0x48495046
.long 1 # 0x1
.quad __hip_fatbin
.quad 0
.size __hip_fatbin_wrapper, 24
.type __hip_gpubin_handle,@object # @__hip_gpubin_handle
.local __hip_gpubin_handle
.comm __hip_gpubin_handle,8,8
.section .init_array,"aw",@init_array
.p2align 3, 0x0
.quad __hip_module_ctor
.type __hip_cuid_,@object # @__hip_cuid_
.bss
.globl __hip_cuid_
__hip_cuid_:
.byte 0 # 0x0
.size __hip_cuid_, 1
.section ".linker-options","e",@llvm_linker_options
.ident "AMD clang version 18.0.0git (https://github.com/RadeonOpenCompute/llvm-project roc-6.3.2 25012 e5bf7e55c91490b07c49d8960fa7983d864936c4)"
.section ".note.GNU-stack","",@progbits
.addrsig
.addrsig_sym _Z27__device_stub__vecAddKernelPfS_S_l
.addrsig_sym __hip_module_ctor
.addrsig_sym __hip_module_dtor
.addrsig_sym _Z12vecAddKernelPfS_S_l
.addrsig_sym _ZSt4cout
.addrsig_sym __hip_fatbin
.addrsig_sym __hip_fatbin_wrapper
.addrsig_sym __hip_cuid_ |
You are a helpful coding assistant specialized in converting from CUDA device assembly to AMD device assembly. | code for sm_80
Function : _Z12vecAddKernelPfS_S_l
.headerflags @"EF_CUDA_TEXMODE_UNIFIED EF_CUDA_64BIT_ADDRESS EF_CUDA_SM80 EF_CUDA_VIRTUAL_SM(EF_CUDA_SM80)"
/*0000*/ IMAD.MOV.U32 R1, RZ, RZ, c[0x0][0x28] ; /* 0x00000a00ff017624 */
/* 0x000fe400078e00ff */
/*0010*/ S2R R0, SR_CTAID.X ; /* 0x0000000000007919 */
/* 0x000e280000002500 */
/*0020*/ S2R R3, SR_TID.X ; /* 0x0000000000037919 */
/* 0x000e240000002100 */
/*0030*/ IMAD R0, R0, c[0x0][0x0], R3 ; /* 0x0000000000007a24 */
/* 0x001fca00078e0203 */
/*0040*/ ISETP.GE.U32.AND P0, PT, R0, c[0x0][0x178], PT ; /* 0x00005e0000007a0c */
/* 0x000fe40003f06070 */
/*0050*/ SHF.R.S32.HI R3, RZ, 0x1f, R0 ; /* 0x0000001fff037819 */
/* 0x000fc80000011400 */
/*0060*/ ISETP.GE.AND.EX P0, PT, R3, c[0x0][0x17c], PT, P0 ; /* 0x00005f0003007a0c */
/* 0x000fda0003f06300 */
/*0070*/ @P0 EXIT ; /* 0x000000000000094d */
/* 0x000fea0003800000 */
/*0080*/ IMAD.SHL.U32 R6, R0.reuse, 0x4, RZ ; /* 0x0000000400067824 */
/* 0x040fe200078e00ff */
/*0090*/ SHF.L.U64.HI R0, R0, 0x2, R3 ; /* 0x0000000200007819 */
/* 0x000fe20000010203 */
/*00a0*/ ULDC.64 UR4, c[0x0][0x118] ; /* 0x0000460000047ab9 */
/* 0x000fc60000000a00 */
/*00b0*/ IADD3 R4, P0, R6.reuse, c[0x0][0x160], RZ ; /* 0x0000580006047a10 */
/* 0x040fe40007f1e0ff */
/*00c0*/ IADD3 R2, P1, R6, c[0x0][0x168], RZ ; /* 0x00005a0006027a10 */
/* 0x000fe40007f3e0ff */
/*00d0*/ IADD3.X R5, R0.reuse, c[0x0][0x164], RZ, P0, !PT ; /* 0x0000590000057a10 */
/* 0x040fe400007fe4ff */
/*00e0*/ IADD3.X R3, R0, c[0x0][0x16c], RZ, P1, !PT ; /* 0x00005b0000037a10 */
/* 0x000fc80000ffe4ff */
/*00f0*/ LDG.E R5, [R4.64] ; /* 0x0000000404057981 */
/* 0x000ea8000c1e1900 */
/*0100*/ LDG.E R2, [R2.64] ; /* 0x0000000402027981 */
/* 0x000ea2000c1e1900 */
/*0110*/ IADD3 R6, P0, R6, c[0x0][0x170], RZ ; /* 0x00005c0006067a10 */
/* 0x000fc80007f1e0ff */
/*0120*/ IADD3.X R7, R0, c[0x0][0x174], RZ, P0, !PT ; /* 0x00005d0000077a10 */
/* 0x000fe200007fe4ff */
/*0130*/ FADD R9, R2, R5 ; /* 0x0000000502097221 */
/* 0x004fca0000000000 */
/*0140*/ STG.E [R6.64], R9 ; /* 0x0000000906007986 */
/* 0x000fe2000c101904 */
/*0150*/ EXIT ; /* 0x000000000000794d */
/* 0x000fea0003800000 */
/*0160*/ BRA 0x160; /* 0xfffffff000007947 */
/* 0x000fc0000383ffff */
/*0170*/ NOP; /* 0x0000000000007918 */
/* 0x000fc00000000000 */
/*0180*/ NOP; /* 0x0000000000007918 */
/* 0x000fc00000000000 */
/*0190*/ NOP; /* 0x0000000000007918 */
/* 0x000fc00000000000 */
/*01a0*/ NOP; /* 0x0000000000007918 */
/* 0x000fc00000000000 */
/*01b0*/ NOP; /* 0x0000000000007918 */
/* 0x000fc00000000000 */
/*01c0*/ NOP; /* 0x0000000000007918 */
/* 0x000fc00000000000 */
/*01d0*/ NOP; /* 0x0000000000007918 */
/* 0x000fc00000000000 */
/*01e0*/ NOP; /* 0x0000000000007918 */
/* 0x000fc00000000000 */
/*01f0*/ NOP; /* 0x0000000000007918 */
/* 0x000fc00000000000 */
.......... | .text
.amdgcn_target "amdgcn-amd-amdhsa--gfx1100"
.protected _Z12vecAddKernelPfS_S_l
.globl _Z12vecAddKernelPfS_S_l
.p2align 8
.type _Z12vecAddKernelPfS_S_l,@function
_Z12vecAddKernelPfS_S_l:
s_clause 0x1
s_load_b32 s4, s[0:1], 0x2c
s_load_b64 s[2:3], s[0:1], 0x18
s_waitcnt lgkmcnt(0)
s_and_b32 s4, s4, 0xffff
s_delay_alu instid0(SALU_CYCLE_1) | instskip(NEXT) | instid1(VALU_DEP_1)
v_mad_u64_u32 v[1:2], null, s15, s4, v[0:1]
v_ashrrev_i32_e32 v2, 31, v1
s_delay_alu instid0(VALU_DEP_1)
v_cmp_gt_i64_e32 vcc_lo, s[2:3], v[1:2]
s_and_saveexec_b32 s2, vcc_lo
s_cbranch_execz .LBB0_2
s_load_b128 s[4:7], s[0:1], 0x0
v_lshlrev_b64 v[0:1], 2, v[1:2]
s_load_b64 s[0:1], s[0:1], 0x10
s_waitcnt lgkmcnt(0)
s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_2)
v_add_co_u32 v2, vcc_lo, s4, v0
v_add_co_ci_u32_e32 v3, vcc_lo, s5, v1, vcc_lo
v_add_co_u32 v4, vcc_lo, s6, v0
v_add_co_ci_u32_e32 v5, vcc_lo, s7, v1, vcc_lo
v_add_co_u32 v0, vcc_lo, s0, v0
global_load_b32 v2, v[2:3], off
global_load_b32 v3, v[4:5], off
v_add_co_ci_u32_e32 v1, vcc_lo, s1, v1, vcc_lo
s_waitcnt vmcnt(0)
v_add_f32_e32 v2, v2, v3
global_store_b32 v[0:1], v2, off
.LBB0_2:
s_nop 0
s_sendmsg sendmsg(MSG_DEALLOC_VGPRS)
s_endpgm
.section .rodata,"a",@progbits
.p2align 6, 0x0
.amdhsa_kernel _Z12vecAddKernelPfS_S_l
.amdhsa_group_segment_fixed_size 0
.amdhsa_private_segment_fixed_size 0
.amdhsa_kernarg_size 288
.amdhsa_user_sgpr_count 15
.amdhsa_user_sgpr_dispatch_ptr 0
.amdhsa_user_sgpr_queue_ptr 0
.amdhsa_user_sgpr_kernarg_segment_ptr 1
.amdhsa_user_sgpr_dispatch_id 0
.amdhsa_user_sgpr_private_segment_size 0
.amdhsa_wavefront_size32 1
.amdhsa_uses_dynamic_stack 0
.amdhsa_enable_private_segment 0
.amdhsa_system_sgpr_workgroup_id_x 1
.amdhsa_system_sgpr_workgroup_id_y 0
.amdhsa_system_sgpr_workgroup_id_z 0
.amdhsa_system_sgpr_workgroup_info 0
.amdhsa_system_vgpr_workitem_id 0
.amdhsa_next_free_vgpr 6
.amdhsa_next_free_sgpr 16
.amdhsa_float_round_mode_32 0
.amdhsa_float_round_mode_16_64 0
.amdhsa_float_denorm_mode_32 3
.amdhsa_float_denorm_mode_16_64 3
.amdhsa_dx10_clamp 1
.amdhsa_ieee_mode 1
.amdhsa_fp16_overflow 0
.amdhsa_workgroup_processor_mode 1
.amdhsa_memory_ordered 1
.amdhsa_forward_progress 0
.amdhsa_shared_vgpr_count 0
.amdhsa_exception_fp_ieee_invalid_op 0
.amdhsa_exception_fp_denorm_src 0
.amdhsa_exception_fp_ieee_div_zero 0
.amdhsa_exception_fp_ieee_overflow 0
.amdhsa_exception_fp_ieee_underflow 0
.amdhsa_exception_fp_ieee_inexact 0
.amdhsa_exception_int_div_zero 0
.end_amdhsa_kernel
.text
.Lfunc_end0:
.size _Z12vecAddKernelPfS_S_l, .Lfunc_end0-_Z12vecAddKernelPfS_S_l
.section .AMDGPU.csdata,"",@progbits
.text
.p2alignl 7, 3214868480
.fill 96, 4, 3214868480
.type __hip_cuid_,@object
.section .bss,"aw",@nobits
.globl __hip_cuid_
__hip_cuid_:
.byte 0
.size __hip_cuid_, 1
.ident "AMD clang version 18.0.0git (https://github.com/RadeonOpenCompute/llvm-project roc-6.3.2 25012 e5bf7e55c91490b07c49d8960fa7983d864936c4)"
.section ".note.GNU-stack","",@progbits
.addrsig
.addrsig_sym __hip_cuid_
.amdgpu_metadata
---
amdhsa.kernels:
- .args:
- .address_space: global
.offset: 0
.size: 8
.value_kind: global_buffer
- .address_space: global
.offset: 8
.size: 8
.value_kind: global_buffer
- .address_space: global
.offset: 16
.size: 8
.value_kind: global_buffer
- .offset: 24
.size: 8
.value_kind: by_value
- .offset: 32
.size: 4
.value_kind: hidden_block_count_x
- .offset: 36
.size: 4
.value_kind: hidden_block_count_y
- .offset: 40
.size: 4
.value_kind: hidden_block_count_z
- .offset: 44
.size: 2
.value_kind: hidden_group_size_x
- .offset: 46
.size: 2
.value_kind: hidden_group_size_y
- .offset: 48
.size: 2
.value_kind: hidden_group_size_z
- .offset: 50
.size: 2
.value_kind: hidden_remainder_x
- .offset: 52
.size: 2
.value_kind: hidden_remainder_y
- .offset: 54
.size: 2
.value_kind: hidden_remainder_z
- .offset: 72
.size: 8
.value_kind: hidden_global_offset_x
- .offset: 80
.size: 8
.value_kind: hidden_global_offset_y
- .offset: 88
.size: 8
.value_kind: hidden_global_offset_z
- .offset: 96
.size: 2
.value_kind: hidden_grid_dims
.group_segment_fixed_size: 0
.kernarg_segment_align: 8
.kernarg_segment_size: 288
.language: OpenCL C
.language_version:
- 2
- 0
.max_flat_workgroup_size: 1024
.name: _Z12vecAddKernelPfS_S_l
.private_segment_fixed_size: 0
.sgpr_count: 18
.sgpr_spill_count: 0
.symbol: _Z12vecAddKernelPfS_S_l.kd
.uniform_work_group_size: 1
.uses_dynamic_stack: false
.vgpr_count: 6
.vgpr_spill_count: 0
.wavefront_size: 32
.workgroup_processor_mode: 1
amdhsa.target: amdgcn-amd-amdhsa--gfx1100
amdhsa.version:
- 1
- 2
...
.end_amdgpu_metadata |
You are a helpful coding assistant specialized in converting from CUDA host assembly to AMD host assembly. | .file "tmpxft_00047a2a_00000000-6_main.cudafe1.cpp"
.text
#APP
.globl _ZSt21ios_base_library_initv
#NO_APP
.type _ZL26__cudaUnregisterBinaryUtilv, @function
_ZL26__cudaUnregisterBinaryUtilv:
.LFB3674:
.cfi_startproc
endbr64
subq $8, %rsp
.cfi_def_cfa_offset 16
movq _ZL20__cudaFatCubinHandle(%rip), %rdi
call __cudaUnregisterFatBinary@PLT
addq $8, %rsp
.cfi_def_cfa_offset 8
ret
.cfi_endproc
.LFE3674:
.size _ZL26__cudaUnregisterBinaryUtilv, .-_ZL26__cudaUnregisterBinaryUtilv
.globl _Z10init_arrayPflf
.type _Z10init_arrayPflf, @function
_Z10init_arrayPflf:
.LFB3669:
.cfi_startproc
endbr64
testq %rsi, %rsi
je .L3
movq %rdi, %rax
leaq (%rdi,%rsi,4), %rdx
.L5:
movss %xmm0, (%rax)
addq $4, %rax
cmpq %rdx, %rax
jne .L5
.L3:
ret
.cfi_endproc
.LFE3669:
.size _Z10init_arrayPflf, .-_Z10init_arrayPflf
.globl _Z37__device_stub__Z12vecAddKernelPfS_S_lPfS_S_l
.type _Z37__device_stub__Z12vecAddKernelPfS_S_lPfS_S_l, @function
_Z37__device_stub__Z12vecAddKernelPfS_S_lPfS_S_l:
.LFB3696:
.cfi_startproc
endbr64
subq $152, %rsp
.cfi_def_cfa_offset 160
movq %rdi, 24(%rsp)
movq %rsi, 16(%rsp)
movq %rdx, 8(%rsp)
movq %rcx, (%rsp)
movq %fs:40, %rax
movq %rax, 136(%rsp)
xorl %eax, %eax
leaq 24(%rsp), %rax
movq %rax, 96(%rsp)
leaq 16(%rsp), %rax
movq %rax, 104(%rsp)
leaq 8(%rsp), %rax
movq %rax, 112(%rsp)
movq %rsp, %rax
movq %rax, 120(%rsp)
movl $1, 48(%rsp)
movl $1, 52(%rsp)
movl $1, 56(%rsp)
movl $1, 60(%rsp)
movl $1, 64(%rsp)
movl $1, 68(%rsp)
leaq 40(%rsp), %rcx
leaq 32(%rsp), %rdx
leaq 60(%rsp), %rsi
leaq 48(%rsp), %rdi
call __cudaPopCallConfiguration@PLT
testl %eax, %eax
je .L11
.L7:
movq 136(%rsp), %rax
subq %fs:40, %rax
jne .L12
addq $152, %rsp
.cfi_remember_state
.cfi_def_cfa_offset 8
ret
.L11:
.cfi_restore_state
pushq 40(%rsp)
.cfi_def_cfa_offset 168
pushq 40(%rsp)
.cfi_def_cfa_offset 176
leaq 112(%rsp), %r9
movq 76(%rsp), %rcx
movl 84(%rsp), %r8d
movq 64(%rsp), %rsi
movl 72(%rsp), %edx
leaq _Z12vecAddKernelPfS_S_l(%rip), %rdi
call cudaLaunchKernel@PLT
addq $16, %rsp
.cfi_def_cfa_offset 160
jmp .L7
.L12:
call __stack_chk_fail@PLT
.cfi_endproc
.LFE3696:
.size _Z37__device_stub__Z12vecAddKernelPfS_S_lPfS_S_l, .-_Z37__device_stub__Z12vecAddKernelPfS_S_lPfS_S_l
.globl _Z12vecAddKernelPfS_S_l
.type _Z12vecAddKernelPfS_S_l, @function
_Z12vecAddKernelPfS_S_l:
.LFB3697:
.cfi_startproc
endbr64
subq $8, %rsp
.cfi_def_cfa_offset 16
call _Z37__device_stub__Z12vecAddKernelPfS_S_lPfS_S_l
addq $8, %rsp
.cfi_def_cfa_offset 8
ret
.cfi_endproc
.LFE3697:
.size _Z12vecAddKernelPfS_S_l, .-_Z12vecAddKernelPfS_S_l
.section .rodata.str1.8,"aMS",@progbits,1
.align 8
.LC0:
.string "/home/ubuntu/Datasets/stackv2/train-structured/KarlEmm/gpu_paralell/main/first_program/main.cu"
.section .rodata.str1.1,"aMS",@progbits,1
.LC1:
.string "%s in %s at line %d\n"
.text
.globl _Z6vecAddPfS_S_l
.type _Z6vecAddPfS_S_l, @function
_Z6vecAddPfS_S_l:
.LFB3670:
.cfi_startproc
endbr64
pushq %r14
.cfi_def_cfa_offset 16
.cfi_offset 14, -16
pushq %r13
.cfi_def_cfa_offset 24
.cfi_offset 13, -24
pushq %r12
.cfi_def_cfa_offset 32
.cfi_offset 12, -32
pushq %rbp
.cfi_def_cfa_offset 40
.cfi_offset 6, -40
pushq %rbx
.cfi_def_cfa_offset 48
.cfi_offset 3, -48
subq $64, %rsp
.cfi_def_cfa_offset 112
movq %rdi, %r14
movq %rsi, %r13
movq %rdx, %r12
movq %rcx, %rbp
movq %fs:40, %rax
movq %rax, 56(%rsp)
xorl %eax, %eax
leaq 0(,%rcx,4), %rbx
leaq 8(%rsp), %rdi
movq %rbx, %rsi
call cudaMalloc@PLT
testl %eax, %eax
jne .L23
leaq 16(%rsp), %rdi
movq %rbx, %rsi
call cudaMalloc@PLT
testl %eax, %eax
jne .L24
leaq 24(%rsp), %rdi
movq %rbx, %rsi
call cudaMalloc@PLT
testl %eax, %eax
jne .L25
movl $1, %ecx
movq %rbx, %rdx
movq %r14, %rsi
movq 8(%rsp), %rdi
call cudaMemcpy@PLT
movl $1, %ecx
movq %rbx, %rdx
movq %r13, %rsi
movq 16(%rsp), %rdi
call cudaMemcpy@PLT
movl $1, %ecx
movq %rbx, %rdx
movq %r12, %rsi
movq 24(%rsp), %rdi
call cudaMemcpy@PLT
pxor %xmm0, %xmm0
cvtsi2sdq %rbp, %xmm0
mulsd .LC2(%rip), %xmm0
movapd %xmm0, %xmm3
movsd .LC6(%rip), %xmm2
movapd %xmm0, %xmm1
andpd %xmm2, %xmm1
movsd .LC3(%rip), %xmm4
ucomisd %xmm1, %xmm4
jbe .L19
cvttsd2siq %xmm0, %rax
pxor %xmm1, %xmm1
cvtsi2sdq %rax, %xmm1
cmpnlesd %xmm1, %xmm3
movsd .LC5(%rip), %xmm4
andpd %xmm4, %xmm3
addsd %xmm1, %xmm3
andnpd %xmm0, %xmm2
orpd %xmm2, %xmm3
.L19:
cvttsd2siq %xmm3, %rax
movl %eax, 32(%rsp)
movl $1, 36(%rsp)
movl $1024, 44(%rsp)
movl $1, 48(%rsp)
movl $0, %r9d
movl $0, %r8d
movq 44(%rsp), %rdx
movl $1, %ecx
movq 32(%rsp), %rdi
movl $1, %esi
call __cudaPushCallConfiguration@PLT
testl %eax, %eax
je .L26
.L20:
movl $2, %ecx
movq %rbx, %rdx
movq 24(%rsp), %rsi
movq %r12, %rdi
call cudaMemcpy@PLT
movq 8(%rsp), %rdi
call cudaFree@PLT
movq 16(%rsp), %rdi
call cudaFree@PLT
movq 24(%rsp), %rdi
call cudaFree@PLT
movq 56(%rsp), %rax
subq %fs:40, %rax
jne .L27
addq $64, %rsp
.cfi_remember_state
.cfi_def_cfa_offset 48
popq %rbx
.cfi_def_cfa_offset 40
popq %rbp
.cfi_def_cfa_offset 32
popq %r12
.cfi_def_cfa_offset 24
popq %r13
.cfi_def_cfa_offset 16
popq %r14
.cfi_def_cfa_offset 8
ret
.L23:
.cfi_restore_state
movl %eax, %edi
call cudaGetErrorString@PLT
movq %rax, %rdx
movl $33, %r8d
leaq .LC0(%rip), %rcx
leaq .LC1(%rip), %rsi
movl $2, %edi
movl $0, %eax
call __printf_chk@PLT
movl $1, %edi
call exit@PLT
.L24:
movl %eax, %edi
call cudaGetErrorString@PLT
movq %rax, %rdx
movl $35, %r8d
leaq .LC0(%rip), %rcx
leaq .LC1(%rip), %rsi
movl $2, %edi
movl $0, %eax
call __printf_chk@PLT
movl $1, %edi
call exit@PLT
.L25:
movl %eax, %edi
call cudaGetErrorString@PLT
movq %rax, %rdx
movl $37, %r8d
leaq .LC0(%rip), %rcx
leaq .LC1(%rip), %rsi
movl $2, %edi
movl $0, %eax
call __printf_chk@PLT
movl $1, %edi
call exit@PLT
.L26:
movq %rbp, %rcx
movq 24(%rsp), %rdx
movq 16(%rsp), %rsi
movq 8(%rsp), %rdi
call _Z37__device_stub__Z12vecAddKernelPfS_S_lPfS_S_l
jmp .L20
.L27:
call __stack_chk_fail@PLT
.cfi_endproc
.LFE3670:
.size _Z6vecAddPfS_S_l, .-_Z6vecAddPfS_S_l
.section .rodata.str1.1
.LC11:
.string "s"
.text
.globl main
.type main, @function
main:
.LFB3671:
.cfi_startproc
endbr64
pushq %r15
.cfi_def_cfa_offset 16
.cfi_offset 15, -16
pushq %r14
.cfi_def_cfa_offset 24
.cfi_offset 14, -24
pushq %r13
.cfi_def_cfa_offset 32
.cfi_offset 13, -32
pushq %r12
.cfi_def_cfa_offset 40
.cfi_offset 12, -40
pushq %rbp
.cfi_def_cfa_offset 48
.cfi_offset 6, -48
pushq %rbx
.cfi_def_cfa_offset 56
.cfi_offset 3, -56
subq $40, %rsp
.cfi_def_cfa_offset 96
call clock@PLT
movq %rax, 8(%rsp)
movl $400000000, %edi
call malloc@PLT
movq %rax, %r14
movq %rax, 16(%rsp)
movl $400000000, %edi
call malloc@PLT
movq %rax, %rbx
movq %rax, 24(%rsp)
movl $400000000, %edi
call malloc@PLT
movq %rax, %r15
movss .LC7(%rip), %xmm0
movl $100000000, %esi
movq %r14, %rdi
call _Z10init_arrayPflf
movss .LC8(%rip), %xmm0
movl $100000000, %esi
movq %rbx, %rdi
call _Z10init_arrayPflf
pxor %xmm0, %xmm0
movl $100000000, %esi
movq %r15, %rdi
call _Z10init_arrayPflf
movl $100000000, %ecx
movq %r15, %rdx
movq %rbx, %rsi
movq %r14, %rdi
call _Z6vecAddPfS_S_l
leaq 40000000(%r15), %r12
leaq 400000000(%r15), %r14
leaq _ZSt4cout(%rip), %r13
jmp .L32
.L36:
call _ZSt16__throw_bad_castv@PLT
.L37:
movzbl 67(%rbp), %esi
.L31:
movsbl %sil, %esi
movq %rbx, %rdi
call _ZNSo3putEc@PLT
movq %rax, %rdi
call _ZNSo5flushEv@PLT
addq $4, %r12
cmpq %r12, %r14
je .L35
.L32:
pxor %xmm0, %xmm0
cvtss2sd (%r12), %xmm0
movq %r13, %rdi
call _ZNSo9_M_insertIdEERSoT_@PLT
movq %rax, %rbx
movq (%rax), %rax
movq -24(%rax), %rax
movq 240(%rbx,%rax), %rbp
testq %rbp, %rbp
je .L36
cmpb $0, 56(%rbp)
jne .L37
movq %rbp, %rdi
call _ZNKSt5ctypeIcE13_M_widen_initEv@PLT
movq 0(%rbp), %rax
movl $10, %esi
movq %rbp, %rdi
call *48(%rax)
movl %eax, %esi
jmp .L31
.L35:
movq 16(%rsp), %rdi
call free@PLT
movq 24(%rsp), %rdi
call free@PLT
movq %r15, %rdi
call free@PLT
call clock@PLT
movq 8(%rsp), %rdx
subq %rdx, %rax
pxor %xmm0, %xmm0
cvtsi2sdq %rax, %xmm0
divsd .LC10(%rip), %xmm0
leaq _ZSt4cout(%rip), %rdi
call _ZNSo9_M_insertIdEERSoT_@PLT
movq %rax, %rdi
leaq .LC11(%rip), %rsi
call _ZStlsISt11char_traitsIcEERSt13basic_ostreamIcT_ES5_PKc@PLT
movq %rax, %rdi
call _ZSt4endlIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_@PLT
movl $0, %eax
addq $40, %rsp
.cfi_def_cfa_offset 56
popq %rbx
.cfi_def_cfa_offset 48
popq %rbp
.cfi_def_cfa_offset 40
popq %r12
.cfi_def_cfa_offset 32
popq %r13
.cfi_def_cfa_offset 24
popq %r14
.cfi_def_cfa_offset 16
popq %r15
.cfi_def_cfa_offset 8
ret
.cfi_endproc
.LFE3671:
.size main, .-main
.section .rodata.str1.1
.LC12:
.string "_Z12vecAddKernelPfS_S_l"
.text
.type _ZL24__sti____cudaRegisterAllv, @function
_ZL24__sti____cudaRegisterAllv:
.LFB3699:
.cfi_startproc
endbr64
subq $8, %rsp
.cfi_def_cfa_offset 16
leaq _ZL15__fatDeviceText(%rip), %rdi
call __cudaRegisterFatBinary@PLT
movq %rax, %rdi
movq %rax, _ZL20__cudaFatCubinHandle(%rip)
pushq $0
.cfi_def_cfa_offset 24
pushq $0
.cfi_def_cfa_offset 32
pushq $0
.cfi_def_cfa_offset 40
pushq $0
.cfi_def_cfa_offset 48
movl $0, %r9d
movl $-1, %r8d
leaq .LC12(%rip), %rdx
movq %rdx, %rcx
leaq _Z12vecAddKernelPfS_S_l(%rip), %rsi
call __cudaRegisterFunction@PLT
addq $32, %rsp
.cfi_def_cfa_offset 16
movq _ZL20__cudaFatCubinHandle(%rip), %rdi
call __cudaRegisterFatBinaryEnd@PLT
leaq _ZL26__cudaUnregisterBinaryUtilv(%rip), %rdi
call atexit@PLT
addq $8, %rsp
.cfi_def_cfa_offset 8
ret
.cfi_endproc
.LFE3699:
.size _ZL24__sti____cudaRegisterAllv, .-_ZL24__sti____cudaRegisterAllv
.section .init_array,"aw"
.align 8
.quad _ZL24__sti____cudaRegisterAllv
.section .nvFatBinSegment,"aw"
.align 8
.type _ZL15__fatDeviceText, @object
.size _ZL15__fatDeviceText, 24
_ZL15__fatDeviceText:
.long 1180844977
.long 1
.quad fatbinData
.quad 0
.local _ZL20__cudaFatCubinHandle
.comm _ZL20__cudaFatCubinHandle,8,8
.section .rodata.cst8,"aM",@progbits,8
.align 8
.LC2:
.long 0
.long 1062207488
.align 8
.LC3:
.long 0
.long 1127219200
.align 8
.LC5:
.long 0
.long 1072693248
.align 8
.LC6:
.long -1
.long 2147483647
.section .rodata.cst4,"aM",@progbits,4
.align 4
.LC7:
.long 1065353216
.align 4
.LC8:
.long 1073741824
.section .rodata.cst8
.align 8
.LC10:
.long 0
.long 1093567616
.ident "GCC: (Ubuntu 13.3.0-6ubuntu2~24.04) 13.3.0"
.section .note.GNU-stack,"",@progbits
.section .note.gnu.property,"a"
.align 8
.long 1f - 0f
.long 4f - 1f
.long 5
0:
.string "GNU"
1:
.align 8
.long 0xc0000002
.long 3f - 2f
2:
.long 0x3
3:
.align 8
4: | .text
.file "main.hip"
# Start of file scope inline assembly
.globl _ZSt21ios_base_library_initv
# End of file scope inline assembly
.globl _Z10init_arrayPflf # -- Begin function _Z10init_arrayPflf
.p2align 4, 0x90
.type _Z10init_arrayPflf,@function
_Z10init_arrayPflf: # @_Z10init_arrayPflf
.cfi_startproc
# %bb.0:
testq %rsi, %rsi
je .LBB0_3
# %bb.1: # %.lr.ph.preheader
xorl %eax, %eax
.p2align 4, 0x90
.LBB0_2: # %.lr.ph
# =>This Inner Loop Header: Depth=1
movss %xmm0, (%rdi,%rax,4)
incq %rax
cmpq %rax, %rsi
jne .LBB0_2
.LBB0_3: # %._crit_edge
retq
.Lfunc_end0:
.size _Z10init_arrayPflf, .Lfunc_end0-_Z10init_arrayPflf
.cfi_endproc
# -- End function
.globl _Z27__device_stub__vecAddKernelPfS_S_l # -- Begin function _Z27__device_stub__vecAddKernelPfS_S_l
.p2align 4, 0x90
.type _Z27__device_stub__vecAddKernelPfS_S_l,@function
_Z27__device_stub__vecAddKernelPfS_S_l: # @_Z27__device_stub__vecAddKernelPfS_S_l
.cfi_startproc
# %bb.0:
subq $120, %rsp
.cfi_def_cfa_offset 128
movq %rdi, 72(%rsp)
movq %rsi, 64(%rsp)
movq %rdx, 56(%rsp)
movq %rcx, 48(%rsp)
leaq 72(%rsp), %rax
movq %rax, 80(%rsp)
leaq 64(%rsp), %rax
movq %rax, 88(%rsp)
leaq 56(%rsp), %rax
movq %rax, 96(%rsp)
leaq 48(%rsp), %rax
movq %rax, 104(%rsp)
leaq 32(%rsp), %rdi
leaq 16(%rsp), %rsi
leaq 8(%rsp), %rdx
movq %rsp, %rcx
callq __hipPopCallConfiguration
movq 32(%rsp), %rsi
movl 40(%rsp), %edx
movq 16(%rsp), %rcx
movl 24(%rsp), %r8d
leaq 80(%rsp), %r9
movl $_Z12vecAddKernelPfS_S_l, %edi
pushq (%rsp)
.cfi_adjust_cfa_offset 8
pushq 16(%rsp)
.cfi_adjust_cfa_offset 8
callq hipLaunchKernel
addq $136, %rsp
.cfi_adjust_cfa_offset -136
retq
.Lfunc_end1:
.size _Z27__device_stub__vecAddKernelPfS_S_l, .Lfunc_end1-_Z27__device_stub__vecAddKernelPfS_S_l
.cfi_endproc
# -- End function
.section .rodata.cst8,"aM",@progbits,8
.p2align 3, 0x0 # -- Begin function _Z6vecAddPfS_S_l
.LCPI2_0:
.quad 0x3f50000000000000 # double 9.765625E-4
.text
.globl _Z6vecAddPfS_S_l
.p2align 4, 0x90
.type _Z6vecAddPfS_S_l,@function
_Z6vecAddPfS_S_l: # @_Z6vecAddPfS_S_l
.cfi_startproc
# %bb.0:
pushq %r15
.cfi_def_cfa_offset 16
pushq %r14
.cfi_def_cfa_offset 24
pushq %r13
.cfi_def_cfa_offset 32
pushq %r12
.cfi_def_cfa_offset 40
pushq %rbx
.cfi_def_cfa_offset 48
subq $144, %rsp
.cfi_def_cfa_offset 192
.cfi_offset %rbx, -48
.cfi_offset %r12, -40
.cfi_offset %r13, -32
.cfi_offset %r14, -24
.cfi_offset %r15, -16
movq %rcx, %r15
movq %rdx, %rbx
movq %rsi, %r12
movq %rdi, %r13
leaq (,%rcx,4), %r14
leaq 24(%rsp), %rdi
movq %r14, %rsi
callq hipMalloc
testl %eax, %eax
jne .LBB2_1
# %bb.3:
leaq 16(%rsp), %rdi
movq %r14, %rsi
callq hipMalloc
testl %eax, %eax
jne .LBB2_4
# %bb.5:
leaq 8(%rsp), %rdi
movq %r14, %rsi
callq hipMalloc
testl %eax, %eax
jne .LBB2_6
# %bb.7:
movq 24(%rsp), %rdi
movq %r13, %rsi
movq %r14, %rdx
movl $1, %ecx
callq hipMemcpy
movq 16(%rsp), %rdi
movq %r12, %rsi
movq %r14, %rdx
movl $1, %ecx
callq hipMemcpy
movq 8(%rsp), %rdi
movq %rbx, %rsi
movq %r14, %rdx
movl $1, %ecx
callq hipMemcpy
cvtsi2sd %r15, %xmm0
mulsd .LCPI2_0(%rip), %xmm0
callq ceil@PLT
cvttsd2si %xmm0, %rax
movl %eax, %edi
movabsq $4294967296, %rdx # imm = 0x100000000
orq %rdx, %rdi
orq $1024, %rdx # imm = 0x400
movl $1, %esi
movl $1, %ecx
xorl %r8d, %r8d
xorl %r9d, %r9d
callq __hipPushCallConfiguration
testl %eax, %eax
jne .LBB2_9
# %bb.8:
movq 24(%rsp), %rax
movq 16(%rsp), %rcx
movq 8(%rsp), %rdx
movq %rax, 104(%rsp)
movq %rcx, 96(%rsp)
movq %rdx, 88(%rsp)
movq %r15, 80(%rsp)
leaq 104(%rsp), %rax
movq %rax, 112(%rsp)
leaq 96(%rsp), %rax
movq %rax, 120(%rsp)
leaq 88(%rsp), %rax
movq %rax, 128(%rsp)
leaq 80(%rsp), %rax
movq %rax, 136(%rsp)
leaq 64(%rsp), %rdi
leaq 48(%rsp), %rsi
leaq 40(%rsp), %rdx
leaq 32(%rsp), %rcx
callq __hipPopCallConfiguration
movq 64(%rsp), %rsi
movl 72(%rsp), %edx
movq 48(%rsp), %rcx
movl 56(%rsp), %r8d
leaq 112(%rsp), %r9
movl $_Z12vecAddKernelPfS_S_l, %edi
pushq 32(%rsp)
.cfi_adjust_cfa_offset 8
pushq 48(%rsp)
.cfi_adjust_cfa_offset 8
callq hipLaunchKernel
addq $16, %rsp
.cfi_adjust_cfa_offset -16
.LBB2_9:
movq 8(%rsp), %rsi
movq %rbx, %rdi
movq %r14, %rdx
movl $2, %ecx
callq hipMemcpy
movq 24(%rsp), %rdi
callq hipFree
movq 16(%rsp), %rdi
callq hipFree
movq 8(%rsp), %rdi
callq hipFree
addq $144, %rsp
.cfi_def_cfa_offset 48
popq %rbx
.cfi_def_cfa_offset 40
popq %r12
.cfi_def_cfa_offset 32
popq %r13
.cfi_def_cfa_offset 24
popq %r14
.cfi_def_cfa_offset 16
popq %r15
.cfi_def_cfa_offset 8
retq
.LBB2_1:
.cfi_def_cfa_offset 192
movl %eax, %edi
callq hipGetErrorString
movl $.L.str, %edi
movl $.L.str.1, %edx
movq %rax, %rsi
movl $35, %ecx
jmp .LBB2_2
.LBB2_4:
movl %eax, %edi
callq hipGetErrorString
movl $.L.str, %edi
movl $.L.str.1, %edx
movq %rax, %rsi
movl $37, %ecx
jmp .LBB2_2
.LBB2_6:
movl %eax, %edi
callq hipGetErrorString
movl $.L.str, %edi
movl $.L.str.1, %edx
movq %rax, %rsi
movl $39, %ecx
.LBB2_2:
xorl %eax, %eax
callq printf
movl $1, %edi
callq exit
.Lfunc_end2:
.size _Z6vecAddPfS_S_l, .Lfunc_end2-_Z6vecAddPfS_S_l
.cfi_endproc
# -- End function
.section .rodata.cst8,"aM",@progbits,8
.p2align 3, 0x0 # -- Begin function main
.LCPI3_0:
.quad 0x412e848000000000 # double 1.0E+6
.text
.globl main
.p2align 4, 0x90
.type main,@function
main: # @main
.cfi_startproc
# %bb.0:
pushq %rbp
.cfi_def_cfa_offset 16
pushq %r15
.cfi_def_cfa_offset 24
pushq %r14
.cfi_def_cfa_offset 32
pushq %r13
.cfi_def_cfa_offset 40
pushq %r12
.cfi_def_cfa_offset 48
pushq %rbx
.cfi_def_cfa_offset 56
pushq %rax
.cfi_def_cfa_offset 64
.cfi_offset %rbx, -56
.cfi_offset %r12, -48
.cfi_offset %r13, -40
.cfi_offset %r14, -32
.cfi_offset %r15, -24
.cfi_offset %rbp, -16
callq clock
movq %rax, (%rsp) # 8-byte Spill
movl $400000000, %edi # imm = 0x17D78400
callq malloc
movq %rax, %r14
movl $400000000, %edi # imm = 0x17D78400
callq malloc
movq %rax, %r15
movl $400000000, %edi # imm = 0x17D78400
callq malloc
movq %rax, %r12
xorl %eax, %eax
.p2align 4, 0x90
.LBB3_1: # %.lr.ph.i
# =>This Inner Loop Header: Depth=1
movl $1065353216, (%r14,%rax,4) # imm = 0x3F800000
incq %rax
cmpq $100000000, %rax # imm = 0x5F5E100
jne .LBB3_1
# %bb.2: # %.lr.ph.i23.preheader
xorl %eax, %eax
.p2align 4, 0x90
.LBB3_3: # %.lr.ph.i23
# =>This Inner Loop Header: Depth=1
movl $1073741824, (%r15,%rax,4) # imm = 0x40000000
incq %rax
cmpq $100000000, %rax # imm = 0x5F5E100
jne .LBB3_3
# %bb.4: # %.lr.ph.i27.preheader
movl $400000000, %edx # imm = 0x17D78400
movq %r12, %rdi
xorl %esi, %esi
callq memset@PLT
movl $100000000, %ecx # imm = 0x5F5E100
movq %r14, %rdi
movq %r15, %rsi
movq %r12, %rdx
callq _Z6vecAddPfS_S_l
movl $10000000, %ebp # imm = 0x989680
jmp .LBB3_5
.p2align 4, 0x90
.LBB3_13: # in Loop: Header=BB3_5 Depth=1
movq %r13, %rdi
movq %rax, %rbx
callq _ZNKSt5ctypeIcE13_M_widen_initEv
movq (%r13), %rax
movq %r13, %rdi
movl $10, %esi
callq *48(%rax)
movl %eax, %ecx
movq %rbx, %rax
.LBB3_14: # %_ZSt4endlIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_.exit35
# in Loop: Header=BB3_5 Depth=1
movsbl %cl, %esi
movq %rax, %rdi
callq _ZNSo3putEc
movq %rax, %rdi
callq _ZNSo5flushEv
incq %rbp
cmpq $100000000, %rbp # imm = 0x5F5E100
je .LBB3_8
.LBB3_5: # =>This Inner Loop Header: Depth=1
movss (%r12,%rbp,4), %xmm0 # xmm0 = mem[0],zero,zero,zero
cvtss2sd %xmm0, %xmm0
movl $_ZSt4cout, %edi
callq _ZNSo9_M_insertIdEERSoT_
movq (%rax), %rcx
movq -24(%rcx), %rcx
movq 240(%rax,%rcx), %r13
testq %r13, %r13
je .LBB3_15
# %bb.6: # %_ZSt13__check_facetISt5ctypeIcEERKT_PS3_.exit.i.i32
# in Loop: Header=BB3_5 Depth=1
cmpb $0, 56(%r13)
je .LBB3_13
# %bb.7: # in Loop: Header=BB3_5 Depth=1
movzbl 67(%r13), %ecx
jmp .LBB3_14
.LBB3_8:
movq %r14, %rdi
callq free
movq %r15, %rdi
callq free
movq %r12, %rdi
callq free
callq clock
subq (%rsp), %rax # 8-byte Folded Reload
xorps %xmm0, %xmm0
cvtsi2sd %rax, %xmm0
divsd .LCPI3_0(%rip), %xmm0
movl $_ZSt4cout, %edi
callq _ZNSo9_M_insertIdEERSoT_
movq %rax, %rbx
movl $.L.str.2, %esi
movl $1, %edx
movq %rax, %rdi
callq _ZSt16__ostream_insertIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_PKS3_l
movq (%rbx), %rax
movq -24(%rax), %rax
movq 240(%rbx,%rax), %r14
testq %r14, %r14
je .LBB3_15
# %bb.9: # %_ZSt13__check_facetISt5ctypeIcEERKT_PS3_.exit.i.i
cmpb $0, 56(%r14)
je .LBB3_11
# %bb.10:
movzbl 67(%r14), %eax
jmp .LBB3_12
.LBB3_11:
movq %r14, %rdi
callq _ZNKSt5ctypeIcE13_M_widen_initEv
movq (%r14), %rax
movq %r14, %rdi
movl $10, %esi
callq *48(%rax)
.LBB3_12: # %_ZSt4endlIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_.exit
movsbl %al, %esi
movq %rbx, %rdi
callq _ZNSo3putEc
movq %rax, %rdi
callq _ZNSo5flushEv
xorl %eax, %eax
addq $8, %rsp
.cfi_def_cfa_offset 56
popq %rbx
.cfi_def_cfa_offset 48
popq %r12
.cfi_def_cfa_offset 40
popq %r13
.cfi_def_cfa_offset 32
popq %r14
.cfi_def_cfa_offset 24
popq %r15
.cfi_def_cfa_offset 16
popq %rbp
.cfi_def_cfa_offset 8
retq
.LBB3_15:
.cfi_def_cfa_offset 64
callq _ZSt16__throw_bad_castv
.Lfunc_end3:
.size main, .Lfunc_end3-main
.cfi_endproc
# -- End function
.p2align 4, 0x90 # -- Begin function __hip_module_ctor
.type __hip_module_ctor,@function
__hip_module_ctor: # @__hip_module_ctor
.cfi_startproc
# %bb.0:
subq $40, %rsp
.cfi_def_cfa_offset 48
cmpq $0, __hip_gpubin_handle(%rip)
jne .LBB4_2
# %bb.1:
movl $__hip_fatbin_wrapper, %edi
callq __hipRegisterFatBinary
movq %rax, __hip_gpubin_handle(%rip)
.LBB4_2:
movq __hip_gpubin_handle(%rip), %rdi
xorps %xmm0, %xmm0
movups %xmm0, 16(%rsp)
movups %xmm0, (%rsp)
movl $_Z12vecAddKernelPfS_S_l, %esi
movl $.L__unnamed_1, %edx
movl $.L__unnamed_1, %ecx
movl $-1, %r8d
xorl %r9d, %r9d
callq __hipRegisterFunction
movl $__hip_module_dtor, %edi
addq $40, %rsp
.cfi_def_cfa_offset 8
jmp atexit # TAILCALL
.Lfunc_end4:
.size __hip_module_ctor, .Lfunc_end4-__hip_module_ctor
.cfi_endproc
# -- End function
.p2align 4, 0x90 # -- Begin function __hip_module_dtor
.type __hip_module_dtor,@function
__hip_module_dtor: # @__hip_module_dtor
.cfi_startproc
# %bb.0:
movq __hip_gpubin_handle(%rip), %rdi
testq %rdi, %rdi
je .LBB5_2
# %bb.1:
pushq %rax
.cfi_def_cfa_offset 16
callq __hipUnregisterFatBinary
movq $0, __hip_gpubin_handle(%rip)
addq $8, %rsp
.cfi_def_cfa_offset 8
.LBB5_2:
retq
.Lfunc_end5:
.size __hip_module_dtor, .Lfunc_end5-__hip_module_dtor
.cfi_endproc
# -- End function
.type _Z12vecAddKernelPfS_S_l,@object # @_Z12vecAddKernelPfS_S_l
.section .rodata,"a",@progbits
.globl _Z12vecAddKernelPfS_S_l
.p2align 3, 0x0
_Z12vecAddKernelPfS_S_l:
.quad _Z27__device_stub__vecAddKernelPfS_S_l
.size _Z12vecAddKernelPfS_S_l, 8
.type .L.str,@object # @.str
.section .rodata.str1.1,"aMS",@progbits,1
.L.str:
.asciz "%s in %s at line %d\n"
.size .L.str, 21
.type .L.str.1,@object # @.str.1
.L.str.1:
.asciz "/home/ubuntu/Datasets/stackv2/train-structured-repos-hip/KarlEmm/gpu_paralell/main/first_program/main.hip"
.size .L.str.1, 106
.type .L.str.2,@object # @.str.2
.L.str.2:
.asciz "s"
.size .L.str.2, 2
.type .L__unnamed_1,@object # @0
.L__unnamed_1:
.asciz "_Z12vecAddKernelPfS_S_l"
.size .L__unnamed_1, 24
.type __hip_fatbin_wrapper,@object # @__hip_fatbin_wrapper
.section .hipFatBinSegment,"a",@progbits
.p2align 3, 0x0
__hip_fatbin_wrapper:
.long 1212764230 # 0x48495046
.long 1 # 0x1
.quad __hip_fatbin
.quad 0
.size __hip_fatbin_wrapper, 24
.type __hip_gpubin_handle,@object # @__hip_gpubin_handle
.local __hip_gpubin_handle
.comm __hip_gpubin_handle,8,8
.section .init_array,"aw",@init_array
.p2align 3, 0x0
.quad __hip_module_ctor
.type __hip_cuid_,@object # @__hip_cuid_
.bss
.globl __hip_cuid_
__hip_cuid_:
.byte 0 # 0x0
.size __hip_cuid_, 1
.section ".linker-options","e",@llvm_linker_options
.ident "AMD clang version 18.0.0git (https://github.com/RadeonOpenCompute/llvm-project roc-6.3.2 25012 e5bf7e55c91490b07c49d8960fa7983d864936c4)"
.section ".note.GNU-stack","",@progbits
.addrsig
.addrsig_sym _Z27__device_stub__vecAddKernelPfS_S_l
.addrsig_sym __hip_module_ctor
.addrsig_sym __hip_module_dtor
.addrsig_sym _Z12vecAddKernelPfS_S_l
.addrsig_sym _ZSt4cout
.addrsig_sym __hip_fatbin
.addrsig_sym __hip_fatbin_wrapper
.addrsig_sym __hip_cuid_ |
You are a helpful coding assistant specialized in converting CUDA source code to CUDA device assembly. | #include <string.h>
#include <math.h>
#ifndef RESTRICT
#define restrict __restrict__
#endif /* RESTRICT */
//ldoc on
/**
* ## Implementation
*
* The actually work of computing the fluxes and speeds is done
* by local (`static`) helper functions that take as arguments
* pointers to all the individual fields. This is helpful to the
* compilers, since by specifying the `restrict` keyword, we are
* promising that we will not access the field data through the
* wrong pointer. This lets the compiler do a better job with
* vectorization.
*/
__constant__ static const float g = 9.8;
// total number of cells (ncells) = nx_all * ny_all
__global__ static
void shallow2dv_flux(float* restrict fh,
float* restrict fhu,
float* restrict fhv,
float* restrict gh,
float* restrict ghu,
float* restrict ghv,
const float* restrict h,
const float* restrict hu,
const float* restrict hv,
float g)
{
const unsigned int idx = (blockIdx.x * blockDim.x) + threadIdx.x;
const unsigned int idy = (blockIdx.y * blockDim.y) + threadIdx.y;
// linearize to 1D
const unsigned int tid = ((gridDim.x * blockDim.x) * idy) + idx;
float hi = h[tid], hui = hu[tid], hvi = hv[tid];
float inv_h = 1/hi;
fhu[tid] = hui*hui*inv_h + (0.5f*g)*hi*hi;
fhv[tid] = hui*hvi*inv_h;
ghu[tid] = hui*hvi*inv_h;
ghv[tid] = hvi*hvi*inv_h + (0.5f*g)*hi*hi;
}
__global__ static
void shallow2dv_speed(float* restrict cxy,
const float* restrict h,
const float* restrict hu,
const float* restrict hv,
float g)
{
float cx = cxy[0];
float cy = cxy[1];
const unsigned int idx = (blockIdx.x * blockDim.x) + threadIdx.x;
const unsigned int idy = (blockIdx.y * blockDim.y) + threadIdx.y;
// linearize to 1D
const unsigned int tid = ((gridDim.x * blockDim.x) * idy) + idx;
float hi = h[tid];
float inv_hi = 1.0f/h[tid];
float root_gh = sqrtf(g * hi);
float cxi = fabsf(hu[tid] * inv_hi) + root_gh;
float cyi = fabsf(hv[tid] * inv_hi) + root_gh;
if (cx < cxi) cx = cxi;
if (cy < cyi) cy = cyi;
cxy[0] = cx;
cxy[1] = cy;
}
extern "C"
void shallow2d_flux_cu(float* FU, float* GU, const float* U,
int nx, int ny, int field_stride)
{
cudaMemcpy(FU, U+field_stride, nx * ny * sizeof(float), cudaMemcpyDeviceToDevice);
cudaMemcpy(GU, U+2*field_stride, nx * ny * sizeof(float), cudaMemcpyDeviceToDevice);
shallow2dv_flux<<<ny, nx>>>(FU, FU+field_stride, FU+2*field_stride,
GU, GU+field_stride, GU+2*field_stride,
U, U +field_stride, U +2*field_stride,
g);
}
extern "C"
void shallow2d_speed_cu(float* cxy, const float* U,
int nx, int ny, int field_stride)
{
shallow2dv_speed<<<ny, nx>>>(cxy, U, U+field_stride, U+2*field_stride, g);
} | code for sm_80
Function : _Z16shallow2dv_speedPfPKfS1_S1_f
.headerflags @"EF_CUDA_TEXMODE_UNIFIED EF_CUDA_64BIT_ADDRESS EF_CUDA_SM80 EF_CUDA_VIRTUAL_SM(EF_CUDA_SM80)"
/*0000*/ IMAD.MOV.U32 R1, RZ, RZ, c[0x0][0x28] ; /* 0x00000a00ff017624 */
/* 0x000fe400078e00ff */
/*0010*/ S2R R0, SR_CTAID.Y ; /* 0x0000000000007919 */
/* 0x000e220000002600 */
/*0020*/ IMAD.MOV.U32 R6, RZ, RZ, 0x4 ; /* 0x00000004ff067424 */
/* 0x000fe200078e00ff */
/*0030*/ ULDC.64 UR4, c[0x0][0x118] ; /* 0x0000460000047ab9 */
/* 0x000fe40000000a00 */
/*0040*/ S2R R7, SR_TID.Y ; /* 0x0000000000077919 */
/* 0x000e280000002200 */
/*0050*/ S2R R3, SR_CTAID.X ; /* 0x0000000000037919 */
/* 0x000e680000002500 */
/*0060*/ S2R R5, SR_TID.X ; /* 0x0000000000057919 */
/* 0x000ea20000002100 */
/*0070*/ IMAD R0, R0, c[0x0][0x4], R7 ; /* 0x0000010000007a24 */
/* 0x001fc800078e0207 */
/*0080*/ IMAD R0, R0, c[0x0][0xc], R3 ; /* 0x0000030000007a24 */
/* 0x002fc800078e0203 */
/*0090*/ IMAD R5, R0, c[0x0][0x0], R5 ; /* 0x0000000000057a24 */
/* 0x004fc800078e0205 */
/*00a0*/ IMAD.WIDE.U32 R6, R5, R6, c[0x0][0x168] ; /* 0x00005a0005067625 */
/* 0x000fcc00078e0006 */
/*00b0*/ LDG.E.CONSTANT R6, [R6.64] ; /* 0x0000000406067981 */
/* 0x000ea2000c1e9900 */
/*00c0*/ MOV R2, c[0x0][0x160] ; /* 0x0000580000027a02 */
/* 0x000fe20000000f00 */
/*00d0*/ IMAD.MOV.U32 R3, RZ, RZ, c[0x0][0x164] ; /* 0x00005900ff037624 */
/* 0x000fca00078e00ff */
/*00e0*/ LDG.E R4, [R2.64] ; /* 0x0000000402047981 */
/* 0x000168000c1e1900 */
/*00f0*/ LDG.E R0, [R2.64+0x4] ; /* 0x0000040402007981 */
/* 0x000162000c1e1900 */
/*0100*/ BSSY B0, 0x1d0 ; /* 0x000000c000007945 */
/* 0x000fe20003800000 */
/*0110*/ IADD3 R8, R6, 0x1800000, RZ ; /* 0x0180000006087810 */
/* 0x004fc80007ffe0ff */
/*0120*/ LOP3.LUT R8, R8, 0x7f800000, RZ, 0xc0, !PT ; /* 0x7f80000008087812 */
/* 0x000fc800078ec0ff */
/*0130*/ ISETP.GT.U32.AND P0, PT, R8, 0x1ffffff, PT ; /* 0x01ffffff0800780c */
/* 0x000fda0003f04070 */
/*0140*/ @P0 BRA 0x180 ; /* 0x0000003000000947 */
/* 0x000fea0003800000 */
/*0150*/ MOV R8, 0x170 ; /* 0x0000017000087802 */
/* 0x001fe40000000f00 */
/*0160*/ CALL.REL.NOINC 0x3b0 ; /* 0x0000024000007944 */
/* 0x020fea0003c00000 */
/*0170*/ BRA 0x1c0 ; /* 0x0000004000007947 */
/* 0x000fea0003800000 */
/*0180*/ MUFU.RCP R7, R6 ; /* 0x0000000600077308 */
/* 0x001e240000001000 */
/*0190*/ FFMA R8, R6, R7, -1 ; /* 0xbf80000006087423 */
/* 0x001fc80000000007 */
/*01a0*/ FADD.FTZ R8, -R8, -RZ ; /* 0x800000ff08087221 */
/* 0x000fc80000010100 */
/*01b0*/ FFMA R7, R7, R8, R7 ; /* 0x0000000807077223 */
/* 0x000fe40000000007 */
/*01c0*/ BSYNC B0 ; /* 0x0000000000007941 */
/* 0x000fea0003800000 */
/*01d0*/ FMUL R6, R6, c[0x0][0x180] ; /* 0x0000600006067a20 */
/* 0x001fe20000400000 */
/*01e0*/ BSSY B0, 0x2b0 ; /* 0x000000c000007945 */
/* 0x000fe60003800000 */
/*01f0*/ MUFU.RSQ R9, R6 ; /* 0x0000000600097308 */
/* 0x0000a20000001400 */
/*0200*/ IADD3 R8, R6, -0xd000000, RZ ; /* 0xf300000006087810 */
/* 0x000fc80007ffe0ff */
/*0210*/ ISETP.GT.U32.AND P0, PT, R8, 0x727fffff, PT ; /* 0x727fffff0800780c */
/* 0x000fda0003f04070 */
/*0220*/ @!P0 BRA 0x260 ; /* 0x0000003000008947 */
/* 0x000fea0003800000 */
/*0230*/ MOV R13, 0x250 ; /* 0x00000250000d7802 */
/* 0x005fe40000000f00 */
/*0240*/ CALL.REL.NOINC 0x6f0 ; /* 0x000004a000007944 */
/* 0x022fea0003c00000 */
/*0250*/ BRA 0x2a0 ; /* 0x0000004000007947 */
/* 0x000fea0003800000 */
/*0260*/ FMUL.FTZ R11, R6, R9 ; /* 0x00000009060b7220 */
/* 0x005fe40000410000 */
/*0270*/ FMUL.FTZ R9, R9, 0.5 ; /* 0x3f00000009097820 */
/* 0x000fe40000410000 */
/*0280*/ FFMA R6, -R11, R11, R6 ; /* 0x0000000b0b067223 */
/* 0x000fc80000000106 */
/*0290*/ FFMA R6, R6, R9, R11 ; /* 0x0000000906067223 */
/* 0x000fe4000000000b */
/*02a0*/ BSYNC B0 ; /* 0x0000000000007941 */
/* 0x000fea0003800000 */
/*02b0*/ IMAD.MOV.U32 R10, RZ, RZ, 0x4 ; /* 0x00000004ff0a7424 */
/* 0x000fc800078e00ff */
/*02c0*/ IMAD.WIDE.U32 R8, R5, R10, c[0x0][0x170] ; /* 0x00005c0005087625 */
/* 0x000fc800078e000a */
/*02d0*/ IMAD.WIDE.U32 R10, R5, R10, c[0x0][0x178] ; /* 0x00005e00050a7625 */
/* 0x000fe400078e000a */
/*02e0*/ LDG.E.CONSTANT R8, [R8.64] ; /* 0x0000000408087981 */
/* 0x000ea8000c1e9900 */
/*02f0*/ LDG.E.CONSTANT R10, [R10.64] ; /* 0x000000040a0a7981 */
/* 0x000ee2000c1e9900 */
/*0300*/ FMUL R5, R8, R7.reuse ; /* 0x0000000708057220 */
/* 0x086fe40000400000 */
/*0310*/ FMUL R7, R10, R7 ; /* 0x000000070a077220 */
/* 0x008fe40000400000 */
/*0320*/ FADD R5, |R5|, R6 ; /* 0x0000000605057221 */
/* 0x000fc40000000200 */
/*0330*/ FADD R7, |R7|, R6 ; /* 0x0000000607077221 */
/* 0x000fc60000000200 */
/*0340*/ FSETP.GEU.AND P0, PT, R4, R5, PT ; /* 0x000000050400720b */
/* 0x020fe40003f0e000 */
/*0350*/ FSETP.GEU.AND P1, PT, R0, R7, PT ; /* 0x000000070000720b */
/* 0x000fe40003f2e000 */
/*0360*/ FSEL R5, R5, R4, !P0 ; /* 0x0000000405057208 */
/* 0x000fe40004000000 */
/*0370*/ FSEL R7, R7, R0, !P1 ; /* 0x0000000007077208 */
/* 0x000fc60004800000 */
/*0380*/ STG.E [R2.64], R5 ; /* 0x0000000502007986 */
/* 0x000fe8000c101904 */
/*0390*/ STG.E [R2.64+0x4], R7 ; /* 0x0000040702007986 */
/* 0x000fe2000c101904 */
/*03a0*/ EXIT ; /* 0x000000000000794d */
/* 0x000fea0003800000 */
/*03b0*/ SHF.L.U32 R7, R6, 0x1, RZ ; /* 0x0000000106077819 */
/* 0x000fe200000006ff */
/*03c0*/ BSSY B1, 0x6d0 ; /* 0x0000030000017945 */
/* 0x000fe60003800000 */
/*03d0*/ SHF.R.U32.HI R7, RZ, 0x18, R7 ; /* 0x00000018ff077819 */
/* 0x000fc80000011607 */
/*03e0*/ ISETP.NE.U32.AND P0, PT, R7, RZ, PT ; /* 0x000000ff0700720c */
/* 0x000fda0003f05070 */
/*03f0*/ @P0 BRA 0x4a0 ; /* 0x000000a000000947 */
/* 0x000fea0003800000 */
/*0400*/ IMAD.SHL.U32 R7, R6, 0x2, RZ ; /* 0x0000000206077824 */
/* 0x000fca00078e00ff */
/*0410*/ ISETP.NE.AND P0, PT, R7, RZ, PT ; /* 0x000000ff0700720c */
/* 0x000fda0003f05270 */
/*0420*/ @P0 FFMA R9, R6, 1.84467440737095516160e+19, RZ ; /* 0x5f80000006090823 */
/* 0x000fe200000000ff */
/*0430*/ @!P0 MUFU.RCP R7, R6 ; /* 0x0000000600078308 */
/* 0x000ff00000001000 */
/*0440*/ @P0 MUFU.RCP R10, R9 ; /* 0x00000009000a0308 */
/* 0x000e240000001000 */
/*0450*/ @P0 FFMA R11, R9, R10, -1 ; /* 0xbf800000090b0423 */
/* 0x001fc8000000000a */
/*0460*/ @P0 FADD.FTZ R11, -R11, -RZ ; /* 0x800000ff0b0b0221 */
/* 0x000fc80000010100 */
/*0470*/ @P0 FFMA R11, R10, R11, R10 ; /* 0x0000000b0a0b0223 */
/* 0x000fc8000000000a */
/*0480*/ @P0 FFMA R7, R11, 1.84467440737095516160e+19, RZ ; /* 0x5f8000000b070823 */
/* 0x000fe200000000ff */
/*0490*/ BRA 0x6c0 ; /* 0x0000022000007947 */
/* 0x000fea0003800000 */
/*04a0*/ IADD3 R9, R7, -0xfd, RZ ; /* 0xffffff0307097810 */
/* 0x000fc80007ffe0ff */
/*04b0*/ ISETP.GT.U32.AND P0, PT, R9, 0x1, PT ; /* 0x000000010900780c */
/* 0x000fda0003f04070 */
/*04c0*/ @P0 BRA 0x6b0 ; /* 0x000001e000000947 */
/* 0x000fea0003800000 */
/*04d0*/ LOP3.LUT R10, R6, 0x7fffff, RZ, 0xc0, !PT ; /* 0x007fffff060a7812 */
/* 0x000fe200078ec0ff */
/*04e0*/ HFMA2.MMA R14, -RZ, RZ, 0, 1.78813934326171875e-07 ; /* 0x00000003ff0e7435 */
/* 0x000fe200000001ff */
/*04f0*/ IADD3 R7, R7, -0xfc, RZ ; /* 0xffffff0407077810 */
/* 0x000fe40007ffe0ff */
/*0500*/ LOP3.LUT R10, R10, 0x3f800000, RZ, 0xfc, !PT ; /* 0x3f8000000a0a7812 */
/* 0x000fc800078efcff */
/*0510*/ MUFU.RCP R11, R10 ; /* 0x0000000a000b7308 */
/* 0x000e260000001000 */
/*0520*/ SHF.L.U32 R15, R14, R9, RZ ; /* 0x000000090e0f7219 */
/* 0x000fe200000006ff */
/*0530*/ FFMA R12, R10, R11, -1 ; /* 0xbf8000000a0c7423 */
/* 0x001fc8000000000b */
/*0540*/ FADD.FTZ R12, -R12, -RZ ; /* 0x800000ff0c0c7221 */
/* 0x000fc80000010100 */
/*0550*/ FFMA.RM R13, R11.reuse, R12.reuse, R11.reuse ; /* 0x0000000c0b0d7223 */
/* 0x1c0fe4000000400b */
/*0560*/ FFMA.RP R12, R11, R12, R11 ; /* 0x0000000c0b0c7223 */
/* 0x000fc6000000800b */
/*0570*/ LOP3.LUT R11, R13.reuse, 0x7fffff, RZ, 0xc0, !PT ; /* 0x007fffff0d0b7812 */
/* 0x040fe400078ec0ff */
/*0580*/ FSETP.NEU.FTZ.AND P0, PT, R13, R12, PT ; /* 0x0000000c0d00720b */
/* 0x000fe40003f1d000 */
/*0590*/ LOP3.LUT R12, R11, 0x800000, RZ, 0xfc, !PT ; /* 0x008000000b0c7812 */
/* 0x000fe400078efcff */
/*05a0*/ SEL R11, RZ, 0xffffffff, !P0 ; /* 0xffffffffff0b7807 */
/* 0x000fe40004000000 */
/*05b0*/ LOP3.LUT R10, R15, R12, RZ, 0xc0, !PT ; /* 0x0000000c0f0a7212 */
/* 0x000fe400078ec0ff */
/*05c0*/ SHF.R.U32.HI R7, RZ, R7, R12 ; /* 0x00000007ff077219 */
/* 0x000fe2000001160c */
/*05d0*/ IMAD.MOV R11, RZ, RZ, -R11 ; /* 0x000000ffff0b7224 */
/* 0x000fe200078e0a0b */
/*05e0*/ SHF.R.U32.HI R10, RZ, R9, R10 ; /* 0x00000009ff0a7219 */
/* 0x000fc8000001160a */
/*05f0*/ LOP3.LUT P1, RZ, R11, R9, R12, 0xf8, !PT ; /* 0x000000090bff7212 */
/* 0x000fe4000782f80c */
/*0600*/ LOP3.LUT P0, RZ, R10.reuse, 0x1, RZ, 0xc0, !PT ; /* 0x000000010aff7812 */
/* 0x040fe4000780c0ff */
/*0610*/ LOP3.LUT P2, RZ, R10, 0x2, RZ, 0xc0, !PT ; /* 0x000000020aff7812 */
/* 0x000fc8000784c0ff */
/*0620*/ PLOP3.LUT P0, PT, P0, P1, P2, 0xe0, 0x0 ; /* 0x000000000000781c */
/* 0x000fe40000703c20 */
/*0630*/ LOP3.LUT P1, RZ, R6, 0x7fffff, RZ, 0xc0, !PT ; /* 0x007fffff06ff7812 */
/* 0x000fe4000782c0ff */
/*0640*/ SEL R9, RZ, 0x1, !P0 ; /* 0x00000001ff097807 */
/* 0x000fc80004000000 */
/*0650*/ IADD3 R9, -R9, RZ, RZ ; /* 0x000000ff09097210 */
/* 0x000fc80007ffe1ff */
/*0660*/ ISETP.GE.AND P0, PT, R9, RZ, PT ; /* 0x000000ff0900720c */
/* 0x000fda0003f06270 */
/*0670*/ @!P0 IADD3 R7, R7, 0x1, RZ ; /* 0x0000000107078810 */
/* 0x000fca0007ffe0ff */
/*0680*/ @!P1 IMAD.SHL.U32 R7, R7, 0x2, RZ ; /* 0x0000000207079824 */
/* 0x000fca00078e00ff */
/*0690*/ LOP3.LUT R7, R7, 0x80000000, R6, 0xf8, !PT ; /* 0x8000000007077812 */
/* 0x000fe200078ef806 */
/*06a0*/ BRA 0x6c0 ; /* 0x0000001000007947 */
/* 0x000fea0003800000 */
/*06b0*/ MUFU.RCP R7, R6 ; /* 0x0000000600077308 */
/* 0x0000640000001000 */
/*06c0*/ BSYNC B1 ; /* 0x0000000000017941 */
/* 0x000fea0003800000 */
/*06d0*/ MOV R9, 0x0 ; /* 0x0000000000097802 */
/* 0x000fc80000000f00 */
/*06e0*/ RET.REL.NODEC R8 0x0 ; /* 0xfffff91008007950 */
/* 0x000fea0003c3ffff */
/*06f0*/ LOP3.LUT P0, RZ, R6, 0x7fffffff, RZ, 0xc0, !PT ; /* 0x7fffffff06ff7812 */
/* 0x000fda000780c0ff */
/*0700*/ @!P0 IMAD.MOV.U32 R8, RZ, RZ, R6 ; /* 0x000000ffff088224 */
/* 0x000fe200078e0006 */
/*0710*/ @!P0 BRA 0x820 ; /* 0x0000010000008947 */
/* 0x000fea0003800000 */
/*0720*/ FSETP.GEU.FTZ.AND P0, PT, R6, RZ, PT ; /* 0x000000ff0600720b */
/* 0x000fda0003f1e000 */
/*0730*/ @!P0 MOV R8, 0x7fffffff ; /* 0x7fffffff00088802 */
/* 0x000fe20000000f00 */
/*0740*/ @!P0 BRA 0x820 ; /* 0x000000d000008947 */
/* 0x000fea0003800000 */
/*0750*/ FSETP.GTU.FTZ.AND P0, PT, |R6|, +INF , PT ; /* 0x7f8000000600780b */
/* 0x000fda0003f1c200 */
/*0760*/ @P0 FADD.FTZ R8, R6, 1 ; /* 0x3f80000006080421 */
/* 0x000fe20000010000 */
/*0770*/ @P0 BRA 0x820 ; /* 0x000000a000000947 */
/* 0x000fea0003800000 */
/*0780*/ FSETP.NEU.FTZ.AND P0, PT, |R6|, +INF , PT ; /* 0x7f8000000600780b */
/* 0x000fda0003f1d200 */
/*0790*/ @P0 FFMA R9, R6, 1.84467440737095516160e+19, RZ ; /* 0x5f80000006090823 */
/* 0x000fc800000000ff */
/*07a0*/ @P0 MUFU.RSQ R8, R9 ; /* 0x0000000900080308 */
/* 0x000e240000001400 */
/*07b0*/ @P0 FMUL.FTZ R10, R9, R8 ; /* 0x00000008090a0220 */
/* 0x001fe40000410000 */
/*07c0*/ @P0 FMUL.FTZ R12, R8, 0.5 ; /* 0x3f000000080c0820 */
/* 0x000fe40000410000 */
/*07d0*/ @P0 FADD.FTZ R11, -R10.reuse, -RZ ; /* 0x800000ff0a0b0221 */
/* 0x040fe40000010100 */
/*07e0*/ @!P0 IMAD.MOV.U32 R8, RZ, RZ, R6 ; /* 0x000000ffff088224 */
/* 0x000fe400078e0006 */
/*07f0*/ @P0 FFMA R11, R10, R11, R9 ; /* 0x0000000b0a0b0223 */
/* 0x000fc80000000009 */
/*0800*/ @P0 FFMA R11, R11, R12, R10 ; /* 0x0000000c0b0b0223 */
/* 0x000fc8000000000a */
/*0810*/ @P0 FMUL.FTZ R8, R11, 2.3283064365386962891e-10 ; /* 0x2f8000000b080820 */
/* 0x000fc80000410000 */
/*0820*/ HFMA2.MMA R9, -RZ, RZ, 0, 0 ; /* 0x00000000ff097435 */
/* 0x000fe200000001ff */
/*0830*/ MOV R6, R8 ; /* 0x0000000800067202 */
/* 0x000fe20000000f00 */
/*0840*/ IMAD.MOV.U32 R8, RZ, RZ, R13 ; /* 0x000000ffff087224 */
/* 0x000fc800078e000d */
/*0850*/ RET.REL.NODEC R8 0x0 ; /* 0xfffff7a008007950 */
/* 0x000fea0003c3ffff */
/*0860*/ BRA 0x860; /* 0xfffffff000007947 */
/* 0x000fc0000383ffff */
/*0870*/ NOP; /* 0x0000000000007918 */
/* 0x000fc00000000000 */
/*0880*/ NOP; /* 0x0000000000007918 */
/* 0x000fc00000000000 */
/*0890*/ NOP; /* 0x0000000000007918 */
/* 0x000fc00000000000 */
/*08a0*/ NOP; /* 0x0000000000007918 */
/* 0x000fc00000000000 */
/*08b0*/ NOP; /* 0x0000000000007918 */
/* 0x000fc00000000000 */
/*08c0*/ NOP; /* 0x0000000000007918 */
/* 0x000fc00000000000 */
/*08d0*/ NOP; /* 0x0000000000007918 */
/* 0x000fc00000000000 */
/*08e0*/ NOP; /* 0x0000000000007918 */
/* 0x000fc00000000000 */
/*08f0*/ NOP; /* 0x0000000000007918 */
/* 0x000fc00000000000 */
..........
Function : _Z15shallow2dv_fluxPfS_S_S_S_S_PKfS1_S1_f
.headerflags @"EF_CUDA_TEXMODE_UNIFIED EF_CUDA_64BIT_ADDRESS EF_CUDA_SM80 EF_CUDA_VIRTUAL_SM(EF_CUDA_SM80)"
/*0000*/ MOV R1, c[0x0][0x28] ; /* 0x00000a0000017a02 */
/* 0x000fe40000000f00 */
/*0010*/ S2R R0, SR_CTAID.Y ; /* 0x0000000000007919 */
/* 0x000e220000002600 */
/*0020*/ ULDC.64 UR4, c[0x0][0x118] ; /* 0x0000460000047ab9 */
/* 0x000fc60000000a00 */
/*0030*/ S2R R7, SR_TID.Y ; /* 0x0000000000077919 */
/* 0x000e280000002200 */
/*0040*/ S2R R3, SR_CTAID.X ; /* 0x0000000000037919 */
/* 0x000e680000002500 */
/*0050*/ S2R R5, SR_TID.X ; /* 0x0000000000057919 */
/* 0x000ea20000002100 */
/*0060*/ IMAD R0, R0, c[0x0][0x4], R7 ; /* 0x0000010000007a24 */
/* 0x001fc800078e0207 */
/*0070*/ IMAD R0, R0, c[0x0][0xc], R3 ; /* 0x0000030000007a24 */
/* 0x002fe400078e0203 */
/*0080*/ IMAD.MOV.U32 R3, RZ, RZ, 0x4 ; /* 0x00000004ff037424 */
/* 0x000fe400078e00ff */
/*0090*/ IMAD R0, R0, c[0x0][0x0], R5 ; /* 0x0000000000007a24 */
/* 0x004fc800078e0205 */
/*00a0*/ IMAD.WIDE.U32 R6, R0, R3, c[0x0][0x190] ; /* 0x0000640000067625 */
/* 0x000fca00078e0003 */
/*00b0*/ LDG.E.CONSTANT R2, [R6.64] ; /* 0x0000000406027981 */
/* 0x000ea2000c1e9900 */
/*00c0*/ IMAD.WIDE.U32 R4, R0, R3, c[0x0][0x1a0] ; /* 0x0000680000047625 */
/* 0x000fc800078e0003 */
/*00d0*/ IMAD.WIDE.U32 R8, R0, R3, c[0x0][0x198] ; /* 0x0000660000087625 */
/* 0x000fe400078e0003 */
/*00e0*/ LDG.E.CONSTANT R4, [R4.64] ; /* 0x0000000404047981 */
/* 0x000168000c1e9900 */
/*00f0*/ LDG.E.CONSTANT R3, [R8.64] ; /* 0x0000000408037981 */
/* 0x000162000c1e9900 */
/*0100*/ BSSY B0, 0x1d0 ; /* 0x000000c000007945 */
/* 0x000fe20003800000 */
/*0110*/ IADD3 R10, R2, 0x1800000, RZ ; /* 0x01800000020a7810 */
/* 0x004fc80007ffe0ff */
/*0120*/ LOP3.LUT R10, R10, 0x7f800000, RZ, 0xc0, !PT ; /* 0x7f8000000a0a7812 */
/* 0x000fc800078ec0ff */
/*0130*/ ISETP.GT.U32.AND P0, PT, R10, 0x1ffffff, PT ; /* 0x01ffffff0a00780c */
/* 0x000fda0003f04070 */
/*0140*/ @P0 BRA 0x180 ; /* 0x0000003000000947 */
/* 0x000fea0003800000 */
/*0150*/ MOV R6, 0x170 ; /* 0x0000017000067802 */
/* 0x001fe40000000f00 */
/*0160*/ CALL.REL.NOINC 0x320 ; /* 0x000001b000007944 */
/* 0x020fea0003c00000 */
/*0170*/ BRA 0x1c0 ; /* 0x0000004000007947 */
/* 0x000fea0003800000 */
/*0180*/ MUFU.RCP R5, R2 ; /* 0x0000000200057308 */
/* 0x001e240000001000 */
/*0190*/ FFMA R6, R2, R5, -1 ; /* 0xbf80000002067423 */
/* 0x001fc80000000005 */
/*01a0*/ FADD.FTZ R6, -R6, -RZ ; /* 0x800000ff06067221 */
/* 0x000fc80000010100 */
/*01b0*/ FFMA R5, R5, R6, R5 ; /* 0x0000000605057223 */
/* 0x000fe40000000005 */
/*01c0*/ BSYNC B0 ; /* 0x0000000000007941 */
/* 0x000fea0003800000 */
/*01d0*/ MOV R7, c[0x0][0x1a8] ; /* 0x00006a0000077a02 */
/* 0x000fe20000000f00 */
/*01e0*/ FMUL R8, R3.reuse, R4.reuse ; /* 0x0000000403087220 */
/* 0x0e0fe40000400000 */
/*01f0*/ FMUL R6, R3, R3 ; /* 0x0000000303067220 */
/* 0x000fe40000400000 */
/*0200*/ FMUL R7, R7, 0.5 ; /* 0x3f00000007077820 */
/* 0x000fe40000400000 */
/*0210*/ FMUL R4, R4, R4 ; /* 0x0000000404047220 */
/* 0x000fe40000400000 */
/*0220*/ FMUL R3, R6, R5 ; /* 0x0000000506037220 */
/* 0x002fe40000400000 */
/*0230*/ FMUL R7, R2, R7 ; /* 0x0000000702077220 */
/* 0x000fc40000400000 */
/*0240*/ FMUL R4, R4, R5 ; /* 0x0000000504047220 */
/* 0x000fe40000400000 */
/*0250*/ IMAD.MOV.U32 R9, RZ, RZ, 0x4 ; /* 0x00000004ff097424 */
/* 0x000fe400078e00ff */
/*0260*/ FFMA R11, R2.reuse, R7.reuse, R3 ; /* 0x00000007020b7223 */
/* 0x0c0fe40000000003 */
/*0270*/ FFMA R15, R2, R7, R4 ; /* 0x00000007020f7223 */
/* 0x000fe40000000004 */
/*0280*/ FMUL R13, R8, R5 ; /* 0x00000005080d7220 */
/* 0x000fe40000400000 */
/*0290*/ IMAD.WIDE.U32 R2, R0, R9, c[0x0][0x168] ; /* 0x00005a0000027625 */
/* 0x001fc800078e0009 */
/*02a0*/ IMAD.WIDE.U32 R4, R0.reuse, R9.reuse, c[0x0][0x170] ; /* 0x00005c0000047625 */
/* 0x0c0fe200078e0009 */
/*02b0*/ STG.E [R2.64], R11 ; /* 0x0000000b02007986 */
/* 0x000fe6000c101904 */
/*02c0*/ IMAD.WIDE.U32 R6, R0.reuse, R9.reuse, c[0x0][0x180] ; /* 0x0000600000067625 */
/* 0x0c0fe200078e0009 */
/*02d0*/ STG.E [R4.64], R13 ; /* 0x0000000d04007986 */
/* 0x000fe6000c101904 */
/*02e0*/ IMAD.WIDE.U32 R8, R0, R9, c[0x0][0x188] ; /* 0x0000620000087625 */
/* 0x000fe200078e0009 */
/*02f0*/ STG.E [R6.64], R13 ; /* 0x0000000d06007986 */
/* 0x000fe8000c101904 */
/*0300*/ STG.E [R8.64], R15 ; /* 0x0000000f08007986 */
/* 0x000fe2000c101904 */
/*0310*/ EXIT ; /* 0x000000000000794d */
/* 0x000fea0003800000 */
/*0320*/ SHF.L.U32 R5, R2, 0x1, RZ ; /* 0x0000000102057819 */
/* 0x000fe200000006ff */
/*0330*/ BSSY B1, 0x640 ; /* 0x0000030000017945 */
/* 0x000fe60003800000 */
/*0340*/ SHF.R.U32.HI R5, RZ, 0x18, R5 ; /* 0x00000018ff057819 */
/* 0x000fc80000011605 */
/*0350*/ ISETP.NE.U32.AND P0, PT, R5, RZ, PT ; /* 0x000000ff0500720c */
/* 0x000fda0003f05070 */
/*0360*/ @P0 BRA 0x410 ; /* 0x000000a000000947 */
/* 0x000fea0003800000 */
/*0370*/ IMAD.SHL.U32 R5, R2, 0x2, RZ ; /* 0x0000000202057824 */
/* 0x000fca00078e00ff */
/*0380*/ ISETP.NE.AND P0, PT, R5, RZ, PT ; /* 0x000000ff0500720c */
/* 0x000fda0003f05270 */
/*0390*/ @P0 FFMA R7, R2, 1.84467440737095516160e+19, RZ ; /* 0x5f80000002070823 */
/* 0x000fe200000000ff */
/*03a0*/ @!P0 MUFU.RCP R5, R2 ; /* 0x0000000200058308 */
/* 0x000ff00000001000 */
/*03b0*/ @P0 MUFU.RCP R8, R7 ; /* 0x0000000700080308 */
/* 0x000e240000001000 */
/*03c0*/ @P0 FFMA R9, R7, R8, -1 ; /* 0xbf80000007090423 */
/* 0x001fc80000000008 */
/*03d0*/ @P0 FADD.FTZ R9, -R9, -RZ ; /* 0x800000ff09090221 */
/* 0x000fc80000010100 */
/*03e0*/ @P0 FFMA R9, R8, R9, R8 ; /* 0x0000000908090223 */
/* 0x000fc80000000008 */
/*03f0*/ @P0 FFMA R5, R9, 1.84467440737095516160e+19, RZ ; /* 0x5f80000009050823 */
/* 0x000fe200000000ff */
/*0400*/ BRA 0x630 ; /* 0x0000022000007947 */
/* 0x000fea0003800000 */
/*0410*/ IADD3 R7, R5, -0xfd, RZ ; /* 0xffffff0305077810 */
/* 0x000fc80007ffe0ff */
/*0420*/ ISETP.GT.U32.AND P0, PT, R7, 0x1, PT ; /* 0x000000010700780c */
/* 0x000fda0003f04070 */
/*0430*/ @P0 BRA 0x620 ; /* 0x000001e000000947 */
/* 0x000fea0003800000 */
/*0440*/ LOP3.LUT R8, R2, 0x7fffff, RZ, 0xc0, !PT ; /* 0x007fffff02087812 */
/* 0x000fe200078ec0ff */
/*0450*/ HFMA2.MMA R12, -RZ, RZ, 0, 1.78813934326171875e-07 ; /* 0x00000003ff0c7435 */
/* 0x000fe200000001ff */
/*0460*/ IADD3 R5, R5, -0xfc, RZ ; /* 0xffffff0405057810 */
/* 0x000fe40007ffe0ff */
/*0470*/ LOP3.LUT R8, R8, 0x3f800000, RZ, 0xfc, !PT ; /* 0x3f80000008087812 */
/* 0x000fc800078efcff */
/*0480*/ MUFU.RCP R9, R8 ; /* 0x0000000800097308 */
/* 0x000e260000001000 */
/*0490*/ SHF.L.U32 R13, R12, R7, RZ ; /* 0x000000070c0d7219 */
/* 0x000fe200000006ff */
/*04a0*/ FFMA R10, R8, R9, -1 ; /* 0xbf800000080a7423 */
/* 0x001fc80000000009 */
/*04b0*/ FADD.FTZ R10, -R10, -RZ ; /* 0x800000ff0a0a7221 */
/* 0x000fc80000010100 */
/*04c0*/ FFMA.RM R11, R9.reuse, R10.reuse, R9.reuse ; /* 0x0000000a090b7223 */
/* 0x1c0fe40000004009 */
/*04d0*/ FFMA.RP R10, R9, R10, R9 ; /* 0x0000000a090a7223 */
/* 0x000fc60000008009 */
/*04e0*/ LOP3.LUT R9, R11.reuse, 0x7fffff, RZ, 0xc0, !PT ; /* 0x007fffff0b097812 */
/* 0x040fe400078ec0ff */
/*04f0*/ FSETP.NEU.FTZ.AND P0, PT, R11, R10, PT ; /* 0x0000000a0b00720b */
/* 0x000fe40003f1d000 */
/*0500*/ LOP3.LUT R10, R9, 0x800000, RZ, 0xfc, !PT ; /* 0x00800000090a7812 */
/* 0x000fe400078efcff */
/*0510*/ SEL R9, RZ, 0xffffffff, !P0 ; /* 0xffffffffff097807 */
/* 0x000fe40004000000 */
/*0520*/ LOP3.LUT R8, R13, R10, RZ, 0xc0, !PT ; /* 0x0000000a0d087212 */
/* 0x000fe400078ec0ff */
/*0530*/ IADD3 R9, -R9, RZ, RZ ; /* 0x000000ff09097210 */
/* 0x000fc40007ffe1ff */
/*0540*/ SHF.R.U32.HI R8, RZ, R7.reuse, R8 ; /* 0x00000007ff087219 */
/* 0x080fe40000011608 */
/*0550*/ LOP3.LUT P1, RZ, R9, R7, R10.reuse, 0xf8, !PT ; /* 0x0000000709ff7212 */
/* 0x100fe4000782f80a */
/*0560*/ LOP3.LUT P0, RZ, R8.reuse, 0x1, RZ, 0xc0, !PT ; /* 0x0000000108ff7812 */
/* 0x040fe4000780c0ff */
/*0570*/ LOP3.LUT P2, RZ, R8, 0x2, RZ, 0xc0, !PT ; /* 0x0000000208ff7812 */
/* 0x000fe4000784c0ff */
/*0580*/ SHF.R.U32.HI R5, RZ, R5, R10 ; /* 0x00000005ff057219 */
/* 0x000fe4000001160a */
/*0590*/ PLOP3.LUT P0, PT, P0, P1, P2, 0xe0, 0x0 ; /* 0x000000000000781c */
/* 0x000fc40000703c20 */
/*05a0*/ LOP3.LUT P1, RZ, R2, 0x7fffff, RZ, 0xc0, !PT ; /* 0x007fffff02ff7812 */
/* 0x000fe4000782c0ff */
/*05b0*/ SEL R7, RZ, 0x1, !P0 ; /* 0x00000001ff077807 */
/* 0x000fca0004000000 */
/*05c0*/ IMAD.MOV R7, RZ, RZ, -R7 ; /* 0x000000ffff077224 */
/* 0x000fca00078e0a07 */
/*05d0*/ ISETP.GE.AND P0, PT, R7, RZ, PT ; /* 0x000000ff0700720c */
/* 0x000fda0003f06270 */
/*05e0*/ @!P0 IADD3 R5, R5, 0x1, RZ ; /* 0x0000000105058810 */
/* 0x000fc80007ffe0ff */
/*05f0*/ @!P1 SHF.L.U32 R5, R5, 0x1, RZ ; /* 0x0000000105059819 */
/* 0x000fc800000006ff */
/*0600*/ LOP3.LUT R5, R5, 0x80000000, R2, 0xf8, !PT ; /* 0x8000000005057812 */
/* 0x000fe200078ef802 */
/*0610*/ BRA 0x630 ; /* 0x0000001000007947 */
/* 0x000fea0003800000 */
/*0620*/ MUFU.RCP R5, R2 ; /* 0x0000000200057308 */
/* 0x0000640000001000 */
/*0630*/ BSYNC B1 ; /* 0x0000000000017941 */
/* 0x000fea0003800000 */
/*0640*/ MOV R7, 0x0 ; /* 0x0000000000077802 */
/* 0x000fc80000000f00 */
/*0650*/ RET.REL.NODEC R6 0x0 ; /* 0xfffff9a006007950 */
/* 0x000fea0003c3ffff */
/*0660*/ BRA 0x660; /* 0xfffffff000007947 */
/* 0x000fc0000383ffff */
/*0670*/ NOP; /* 0x0000000000007918 */
/* 0x000fc00000000000 */
/*0680*/ NOP; /* 0x0000000000007918 */
/* 0x000fc00000000000 */
/*0690*/ NOP; /* 0x0000000000007918 */
/* 0x000fc00000000000 */
/*06a0*/ NOP; /* 0x0000000000007918 */
/* 0x000fc00000000000 */
/*06b0*/ NOP; /* 0x0000000000007918 */
/* 0x000fc00000000000 */
/*06c0*/ NOP; /* 0x0000000000007918 */
/* 0x000fc00000000000 */
/*06d0*/ NOP; /* 0x0000000000007918 */
/* 0x000fc00000000000 */
/*06e0*/ NOP; /* 0x0000000000007918 */
/* 0x000fc00000000000 */
/*06f0*/ NOP; /* 0x0000000000007918 */
/* 0x000fc00000000000 */
.......... |
You are a helpful coding assistant specialized in converting CUDA source code to CUDA host assembly. | #include <string.h>
#include <math.h>
#ifndef RESTRICT
#define restrict __restrict__
#endif /* RESTRICT */
//ldoc on
/**
* ## Implementation
*
* The actually work of computing the fluxes and speeds is done
* by local (`static`) helper functions that take as arguments
* pointers to all the individual fields. This is helpful to the
* compilers, since by specifying the `restrict` keyword, we are
* promising that we will not access the field data through the
* wrong pointer. This lets the compiler do a better job with
* vectorization.
*/
__constant__ static const float g = 9.8;
// total number of cells (ncells) = nx_all * ny_all
__global__ static
void shallow2dv_flux(float* restrict fh,
float* restrict fhu,
float* restrict fhv,
float* restrict gh,
float* restrict ghu,
float* restrict ghv,
const float* restrict h,
const float* restrict hu,
const float* restrict hv,
float g)
{
const unsigned int idx = (blockIdx.x * blockDim.x) + threadIdx.x;
const unsigned int idy = (blockIdx.y * blockDim.y) + threadIdx.y;
// linearize to 1D
const unsigned int tid = ((gridDim.x * blockDim.x) * idy) + idx;
float hi = h[tid], hui = hu[tid], hvi = hv[tid];
float inv_h = 1/hi;
fhu[tid] = hui*hui*inv_h + (0.5f*g)*hi*hi;
fhv[tid] = hui*hvi*inv_h;
ghu[tid] = hui*hvi*inv_h;
ghv[tid] = hvi*hvi*inv_h + (0.5f*g)*hi*hi;
}
__global__ static
void shallow2dv_speed(float* restrict cxy,
const float* restrict h,
const float* restrict hu,
const float* restrict hv,
float g)
{
float cx = cxy[0];
float cy = cxy[1];
const unsigned int idx = (blockIdx.x * blockDim.x) + threadIdx.x;
const unsigned int idy = (blockIdx.y * blockDim.y) + threadIdx.y;
// linearize to 1D
const unsigned int tid = ((gridDim.x * blockDim.x) * idy) + idx;
float hi = h[tid];
float inv_hi = 1.0f/h[tid];
float root_gh = sqrtf(g * hi);
float cxi = fabsf(hu[tid] * inv_hi) + root_gh;
float cyi = fabsf(hv[tid] * inv_hi) + root_gh;
if (cx < cxi) cx = cxi;
if (cy < cyi) cy = cyi;
cxy[0] = cx;
cxy[1] = cy;
}
extern "C"
void shallow2d_flux_cu(float* FU, float* GU, const float* U,
int nx, int ny, int field_stride)
{
cudaMemcpy(FU, U+field_stride, nx * ny * sizeof(float), cudaMemcpyDeviceToDevice);
cudaMemcpy(GU, U+2*field_stride, nx * ny * sizeof(float), cudaMemcpyDeviceToDevice);
shallow2dv_flux<<<ny, nx>>>(FU, FU+field_stride, FU+2*field_stride,
GU, GU+field_stride, GU+2*field_stride,
U, U +field_stride, U +2*field_stride,
g);
}
extern "C"
void shallow2d_speed_cu(float* cxy, const float* U,
int nx, int ny, int field_stride)
{
shallow2dv_speed<<<ny, nx>>>(cxy, U, U+field_stride, U+2*field_stride, g);
} | .file "tmpxft_0011e3a2_00000000-6_shallow2d.cudafe1.cpp"
.text
#APP
#NO_APP
.type _ZL55__device_stub__Z15shallow2dv_fluxPfS_S_S_S_S_PKfS1_S1_fPfS_S_S_S_S_PKfS1_S1_f, @function
_ZL55__device_stub__Z15shallow2dv_fluxPfS_S_S_S_S_PKfS1_S1_fPfS_S_S_S_S_PKfS1_S1_f:
.LFB2053:
.cfi_startproc
subq $264, %rsp
.cfi_def_cfa_offset 272
movss %xmm0, 12(%rsp)
movq %fs:40, %rax
movq %rax, 248(%rsp)
xorl %eax, %eax
movq %rdi, 24(%rsp)
leaq 24(%rsp), %rax
movq %rax, 160(%rsp)
movq %rsi, 32(%rsp)
leaq 32(%rsp), %rax
movq %rax, 168(%rsp)
movq %rdx, 40(%rsp)
leaq 40(%rsp), %rax
movq %rax, 176(%rsp)
movq %rcx, 48(%rsp)
leaq 48(%rsp), %rax
movq %rax, 184(%rsp)
movq %r8, 56(%rsp)
leaq 56(%rsp), %rax
movq %rax, 192(%rsp)
movq %r9, 64(%rsp)
leaq 64(%rsp), %rax
movq %rax, 200(%rsp)
movq 272(%rsp), %rax
movq %rax, 72(%rsp)
leaq 72(%rsp), %rax
movq %rax, 208(%rsp)
movq 280(%rsp), %rax
movq %rax, 80(%rsp)
leaq 80(%rsp), %rax
movq %rax, 216(%rsp)
movq 288(%rsp), %rax
movq %rax, 88(%rsp)
leaq 88(%rsp), %rax
movq %rax, 224(%rsp)
leaq 12(%rsp), %rax
movq %rax, 232(%rsp)
movl $1, 112(%rsp)
movl $1, 116(%rsp)
movl $1, 120(%rsp)
movl $1, 124(%rsp)
movl $1, 128(%rsp)
movl $1, 132(%rsp)
leaq 104(%rsp), %rcx
leaq 96(%rsp), %rdx
leaq 124(%rsp), %rsi
leaq 112(%rsp), %rdi
call __cudaPopCallConfiguration@PLT
testl %eax, %eax
je .L5
.L1:
movq 248(%rsp), %rax
subq %fs:40, %rax
jne .L6
addq $264, %rsp
.cfi_remember_state
.cfi_def_cfa_offset 8
ret
.L5:
.cfi_restore_state
pushq 104(%rsp)
.cfi_def_cfa_offset 280
pushq 104(%rsp)
.cfi_def_cfa_offset 288
leaq 176(%rsp), %r9
movq 140(%rsp), %rcx
movl 148(%rsp), %r8d
movq 128(%rsp), %rsi
movl 136(%rsp), %edx
leaq _ZL15shallow2dv_fluxPfS_S_S_S_S_PKfS1_S1_f(%rip), %rdi
call cudaLaunchKernel@PLT
addq $16, %rsp
.cfi_def_cfa_offset 272
jmp .L1
.L6:
call __stack_chk_fail@PLT
.cfi_endproc
.LFE2053:
.size _ZL55__device_stub__Z15shallow2dv_fluxPfS_S_S_S_S_PKfS1_S1_fPfS_S_S_S_S_PKfS1_S1_f, .-_ZL55__device_stub__Z15shallow2dv_fluxPfS_S_S_S_S_PKfS1_S1_fPfS_S_S_S_S_PKfS1_S1_f
.type _ZL15shallow2dv_fluxPfS_S_S_S_S_PKfS1_S1_f, @function
_ZL15shallow2dv_fluxPfS_S_S_S_S_PKfS1_S1_f:
.LFB2054:
.cfi_startproc
endbr64
subq $16, %rsp
.cfi_def_cfa_offset 24
pushq 40(%rsp)
.cfi_def_cfa_offset 32
pushq 40(%rsp)
.cfi_def_cfa_offset 40
pushq 40(%rsp)
.cfi_def_cfa_offset 48
call _ZL55__device_stub__Z15shallow2dv_fluxPfS_S_S_S_S_PKfS1_S1_fPfS_S_S_S_S_PKfS1_S1_f
addq $40, %rsp
.cfi_def_cfa_offset 8
ret
.cfi_endproc
.LFE2054:
.size _ZL15shallow2dv_fluxPfS_S_S_S_S_PKfS1_S1_f, .-_ZL15shallow2dv_fluxPfS_S_S_S_S_PKfS1_S1_f
.type _ZL46__device_stub__Z16shallow2dv_speedPfPKfS1_S1_fPfPKfS1_S1_f, @function
_ZL46__device_stub__Z16shallow2dv_speedPfPKfS1_S1_fPfPKfS1_S1_f:
.LFB2055:
.cfi_startproc
subq $168, %rsp
.cfi_def_cfa_offset 176
movss %xmm0, 12(%rsp)
movq %fs:40, %rax
movq %rax, 152(%rsp)
xorl %eax, %eax
movq %rdi, 16(%rsp)
leaq 16(%rsp), %rax
movq %rax, 112(%rsp)
movq %rsi, 24(%rsp)
leaq 24(%rsp), %rax
movq %rax, 120(%rsp)
movq %rdx, 32(%rsp)
leaq 32(%rsp), %rax
movq %rax, 128(%rsp)
movq %rcx, 40(%rsp)
leaq 40(%rsp), %rax
movq %rax, 136(%rsp)
leaq 12(%rsp), %rax
movq %rax, 144(%rsp)
movl $1, 64(%rsp)
movl $1, 68(%rsp)
movl $1, 72(%rsp)
movl $1, 76(%rsp)
movl $1, 80(%rsp)
movl $1, 84(%rsp)
leaq 56(%rsp), %rcx
leaq 48(%rsp), %rdx
leaq 76(%rsp), %rsi
leaq 64(%rsp), %rdi
call __cudaPopCallConfiguration@PLT
testl %eax, %eax
je .L13
.L9:
movq 152(%rsp), %rax
subq %fs:40, %rax
jne .L14
addq $168, %rsp
.cfi_remember_state
.cfi_def_cfa_offset 8
ret
.L13:
.cfi_restore_state
pushq 56(%rsp)
.cfi_def_cfa_offset 184
pushq 56(%rsp)
.cfi_def_cfa_offset 192
leaq 128(%rsp), %r9
movq 92(%rsp), %rcx
movl 100(%rsp), %r8d
movq 80(%rsp), %rsi
movl 88(%rsp), %edx
leaq _ZL16shallow2dv_speedPfPKfS1_S1_f(%rip), %rdi
call cudaLaunchKernel@PLT
addq $16, %rsp
.cfi_def_cfa_offset 176
jmp .L9
.L14:
call __stack_chk_fail@PLT
.cfi_endproc
.LFE2055:
.size _ZL46__device_stub__Z16shallow2dv_speedPfPKfS1_S1_fPfPKfS1_S1_f, .-_ZL46__device_stub__Z16shallow2dv_speedPfPKfS1_S1_fPfPKfS1_S1_f
.type _ZL16shallow2dv_speedPfPKfS1_S1_f, @function
_ZL16shallow2dv_speedPfPKfS1_S1_f:
.LFB2056:
.cfi_startproc
endbr64
subq $8, %rsp
.cfi_def_cfa_offset 16
call _ZL46__device_stub__Z16shallow2dv_speedPfPKfS1_S1_fPfPKfS1_S1_f
addq $8, %rsp
.cfi_def_cfa_offset 8
ret
.cfi_endproc
.LFE2056:
.size _ZL16shallow2dv_speedPfPKfS1_S1_f, .-_ZL16shallow2dv_speedPfPKfS1_S1_f
.type _ZL26__cudaUnregisterBinaryUtilv, @function
_ZL26__cudaUnregisterBinaryUtilv:
.LFB2031:
.cfi_startproc
endbr64
subq $8, %rsp
.cfi_def_cfa_offset 16
movq _ZL20__cudaFatCubinHandle(%rip), %rdi
call __cudaUnregisterFatBinary@PLT
addq $8, %rsp
.cfi_def_cfa_offset 8
ret
.cfi_endproc
.LFE2031:
.size _ZL26__cudaUnregisterBinaryUtilv, .-_ZL26__cudaUnregisterBinaryUtilv
.globl shallow2d_flux_cu
.type shallow2d_flux_cu, @function
shallow2d_flux_cu:
.LFB2027:
.cfi_startproc
endbr64
pushq %r15
.cfi_def_cfa_offset 16
.cfi_offset 15, -16
pushq %r14
.cfi_def_cfa_offset 24
.cfi_offset 14, -24
pushq %r13
.cfi_def_cfa_offset 32
.cfi_offset 13, -32
pushq %r12
.cfi_def_cfa_offset 40
.cfi_offset 12, -40
pushq %rbp
.cfi_def_cfa_offset 48
.cfi_offset 6, -48
pushq %rbx
.cfi_def_cfa_offset 56
.cfi_offset 3, -56
subq $72, %rsp
.cfi_def_cfa_offset 128
movq %rdi, 8(%rsp)
movq %rsi, (%rsp)
movq %rdx, 16(%rsp)
movl %ecx, %r13d
movl %r8d, %r12d
movl %r9d, 28(%rsp)
movl %ecx, %ebx
imull %r8d, %ebx
movslq %ebx, %rbx
salq $2, %rbx
movslq %r9d, %rbp
salq $2, %rbp
leaq (%rdx,%rbp), %r14
movl $3, %ecx
movq %rbx, %rdx
movq %r14, %rsi
call cudaMemcpy@PLT
leaq (%r14,%rbp), %r15
movl $3, %ecx
movq %rbx, %rdx
movq %r15, %rsi
movq (%rsp), %rdi
call cudaMemcpy@PLT
movl %r13d, 52(%rsp)
movl $1, 56(%rsp)
movl %r12d, 40(%rsp)
movl $1, 44(%rsp)
movl $0, %r9d
movl $0, %r8d
movq 52(%rsp), %rdx
movl $1, %ecx
movq 40(%rsp), %rdi
movl $1, %esi
call __cudaPushCallConfiguration@PLT
testl %eax, %eax
je .L22
.L19:
addq $72, %rsp
.cfi_remember_state
.cfi_def_cfa_offset 56
popq %rbx
.cfi_def_cfa_offset 48
popq %rbp
.cfi_def_cfa_offset 40
popq %r12
.cfi_def_cfa_offset 32
popq %r13
.cfi_def_cfa_offset 24
popq %r14
.cfi_def_cfa_offset 16
popq %r15
.cfi_def_cfa_offset 8
ret
.L22:
.cfi_restore_state
movl 28(%rsp), %eax
addl %eax, %eax
cltq
salq $2, %rax
movq 8(%rsp), %rdi
leaq (%rdi,%rax), %rdx
leaq (%rdi,%rbp), %rsi
subq $8, %rsp
.cfi_def_cfa_offset 136
pushq %r15
.cfi_def_cfa_offset 144
pushq %r14
.cfi_def_cfa_offset 152
pushq 40(%rsp)
.cfi_def_cfa_offset 160
movss .LC0(%rip), %xmm0
movq 32(%rsp), %rcx
leaq (%rcx,%rax), %r9
leaq (%rcx,%rbp), %r8
call _ZL55__device_stub__Z15shallow2dv_fluxPfS_S_S_S_S_PKfS1_S1_fPfS_S_S_S_S_PKfS1_S1_f
addq $32, %rsp
.cfi_def_cfa_offset 128
jmp .L19
.cfi_endproc
.LFE2027:
.size shallow2d_flux_cu, .-shallow2d_flux_cu
.globl shallow2d_speed_cu
.type shallow2d_speed_cu, @function
shallow2d_speed_cu:
.LFB2028:
.cfi_startproc
endbr64
pushq %r12
.cfi_def_cfa_offset 16
.cfi_offset 12, -16
pushq %rbp
.cfi_def_cfa_offset 24
.cfi_offset 6, -24
pushq %rbx
.cfi_def_cfa_offset 32
.cfi_offset 3, -32
subq $32, %rsp
.cfi_def_cfa_offset 64
movq %rdi, %rbp
movq %rsi, %rbx
movl %r8d, %r12d
movl %edx, 20(%rsp)
movl $1, 24(%rsp)
movl %ecx, 8(%rsp)
movl $1, 12(%rsp)
movl $0, %r9d
movl $0, %r8d
movq 20(%rsp), %rdx
movl $1, %ecx
movq 8(%rsp), %rdi
movl $1, %esi
call __cudaPushCallConfiguration@PLT
testl %eax, %eax
je .L26
.L23:
addq $32, %rsp
.cfi_remember_state
.cfi_def_cfa_offset 32
popq %rbx
.cfi_def_cfa_offset 24
popq %rbp
.cfi_def_cfa_offset 16
popq %r12
.cfi_def_cfa_offset 8
ret
.L26:
.cfi_restore_state
leal (%r12,%r12), %eax
cltq
leaq (%rbx,%rax,4), %rcx
movslq %r12d, %r8
leaq (%rbx,%r8,4), %rdx
movss .LC0(%rip), %xmm0
movq %rbx, %rsi
movq %rbp, %rdi
call _ZL46__device_stub__Z16shallow2dv_speedPfPKfS1_S1_fPfPKfS1_S1_f
jmp .L23
.cfi_endproc
.LFE2028:
.size shallow2d_speed_cu, .-shallow2d_speed_cu
.section .rodata.str1.8,"aMS",@progbits,1
.align 8
.LC1:
.string "_Z16shallow2dv_speedPfPKfS1_S1_f"
.align 8
.LC2:
.string "_Z15shallow2dv_fluxPfS_S_S_S_S_PKfS1_S1_f"
.section .rodata.str1.1,"aMS",@progbits,1
.LC3:
.string "g"
.text
.type _ZL24__sti____cudaRegisterAllv, @function
_ZL24__sti____cudaRegisterAllv:
.LFB2058:
.cfi_startproc
endbr64
pushq %rbx
.cfi_def_cfa_offset 16
.cfi_offset 3, -16
leaq _ZL15__fatDeviceText(%rip), %rdi
call __cudaRegisterFatBinary@PLT
movq %rax, %rbx
movq %rax, _ZL20__cudaFatCubinHandle(%rip)
pushq $0
.cfi_def_cfa_offset 24
pushq $0
.cfi_def_cfa_offset 32
pushq $0
.cfi_def_cfa_offset 40
pushq $0
.cfi_def_cfa_offset 48
movl $0, %r9d
movl $-1, %r8d
leaq .LC1(%rip), %rdx
movq %rdx, %rcx
leaq _ZL16shallow2dv_speedPfPKfS1_S1_f(%rip), %rsi
movq %rax, %rdi
call __cudaRegisterFunction@PLT
addq $32, %rsp
.cfi_def_cfa_offset 16
pushq $0
.cfi_def_cfa_offset 24
pushq $0
.cfi_def_cfa_offset 32
pushq $0
.cfi_def_cfa_offset 40
pushq $0
.cfi_def_cfa_offset 48
movl $0, %r9d
movl $-1, %r8d
leaq .LC2(%rip), %rdx
movq %rdx, %rcx
leaq _ZL15shallow2dv_fluxPfS_S_S_S_S_PKfS1_S1_f(%rip), %rsi
movq %rbx, %rdi
call __cudaRegisterFunction@PLT
addq $32, %rsp
.cfi_def_cfa_offset 16
pushq $0
.cfi_def_cfa_offset 24
pushq $1
.cfi_def_cfa_offset 32
movl $4, %r9d
movl $0, %r8d
leaq .LC3(%rip), %rdx
movq %rdx, %rcx
leaq _ZL1g(%rip), %rsi
movq %rbx, %rdi
call __cudaRegisterVar@PLT
addq $16, %rsp
.cfi_def_cfa_offset 16
movq _ZL20__cudaFatCubinHandle(%rip), %rdi
call __cudaRegisterFatBinaryEnd@PLT
leaq _ZL26__cudaUnregisterBinaryUtilv(%rip), %rdi
call atexit@PLT
popq %rbx
.cfi_def_cfa_offset 8
ret
.cfi_endproc
.LFE2058:
.size _ZL24__sti____cudaRegisterAllv, .-_ZL24__sti____cudaRegisterAllv
.section .init_array,"aw"
.align 8
.quad _ZL24__sti____cudaRegisterAllv
.section .nvFatBinSegment,"aw"
.align 8
.type _ZL15__fatDeviceText, @object
.size _ZL15__fatDeviceText, 24
_ZL15__fatDeviceText:
.long 1180844977
.long 1
.quad fatbinData
.quad 0
.local _ZL20__cudaFatCubinHandle
.comm _ZL20__cudaFatCubinHandle,8,8
.section .rodata
.align 4
.type _ZL1g, @object
.size _ZL1g, 4
_ZL1g:
.long 1092406477
.section .rodata.cst4,"aM",@progbits,4
.align 4
.LC0:
.long 1092406477
.ident "GCC: (Ubuntu 13.3.0-6ubuntu2~24.04) 13.3.0"
.section .note.GNU-stack,"",@progbits
.section .note.gnu.property,"a"
.align 8
.long 1f - 0f
.long 4f - 1f
.long 5
0:
.string "GNU"
1:
.align 8
.long 0xc0000002
.long 3f - 2f
2:
.long 0x3
3:
.align 8
4: |
You are a helpful coding assistant specialized in converting CUDA source code to HIP/AMD source code. | #include <string.h>
#include <math.h>
#ifndef RESTRICT
#define restrict __restrict__
#endif /* RESTRICT */
//ldoc on
/**
* ## Implementation
*
* The actually work of computing the fluxes and speeds is done
* by local (`static`) helper functions that take as arguments
* pointers to all the individual fields. This is helpful to the
* compilers, since by specifying the `restrict` keyword, we are
* promising that we will not access the field data through the
* wrong pointer. This lets the compiler do a better job with
* vectorization.
*/
__constant__ static const float g = 9.8;
// total number of cells (ncells) = nx_all * ny_all
__global__ static
void shallow2dv_flux(float* restrict fh,
float* restrict fhu,
float* restrict fhv,
float* restrict gh,
float* restrict ghu,
float* restrict ghv,
const float* restrict h,
const float* restrict hu,
const float* restrict hv,
float g)
{
const unsigned int idx = (blockIdx.x * blockDim.x) + threadIdx.x;
const unsigned int idy = (blockIdx.y * blockDim.y) + threadIdx.y;
// linearize to 1D
const unsigned int tid = ((gridDim.x * blockDim.x) * idy) + idx;
float hi = h[tid], hui = hu[tid], hvi = hv[tid];
float inv_h = 1/hi;
fhu[tid] = hui*hui*inv_h + (0.5f*g)*hi*hi;
fhv[tid] = hui*hvi*inv_h;
ghu[tid] = hui*hvi*inv_h;
ghv[tid] = hvi*hvi*inv_h + (0.5f*g)*hi*hi;
}
__global__ static
void shallow2dv_speed(float* restrict cxy,
const float* restrict h,
const float* restrict hu,
const float* restrict hv,
float g)
{
float cx = cxy[0];
float cy = cxy[1];
const unsigned int idx = (blockIdx.x * blockDim.x) + threadIdx.x;
const unsigned int idy = (blockIdx.y * blockDim.y) + threadIdx.y;
// linearize to 1D
const unsigned int tid = ((gridDim.x * blockDim.x) * idy) + idx;
float hi = h[tid];
float inv_hi = 1.0f/h[tid];
float root_gh = sqrtf(g * hi);
float cxi = fabsf(hu[tid] * inv_hi) + root_gh;
float cyi = fabsf(hv[tid] * inv_hi) + root_gh;
if (cx < cxi) cx = cxi;
if (cy < cyi) cy = cyi;
cxy[0] = cx;
cxy[1] = cy;
}
extern "C"
void shallow2d_flux_cu(float* FU, float* GU, const float* U,
int nx, int ny, int field_stride)
{
cudaMemcpy(FU, U+field_stride, nx * ny * sizeof(float), cudaMemcpyDeviceToDevice);
cudaMemcpy(GU, U+2*field_stride, nx * ny * sizeof(float), cudaMemcpyDeviceToDevice);
shallow2dv_flux<<<ny, nx>>>(FU, FU+field_stride, FU+2*field_stride,
GU, GU+field_stride, GU+2*field_stride,
U, U +field_stride, U +2*field_stride,
g);
}
extern "C"
void shallow2d_speed_cu(float* cxy, const float* U,
int nx, int ny, int field_stride)
{
shallow2dv_speed<<<ny, nx>>>(cxy, U, U+field_stride, U+2*field_stride, g);
} | #ifndef SHALLOW2D_CUDA_H
#define SHALLOW2D_CUDA_H
//ldoc on
/**
* # Shallow water equations
*
* ## Physics picture
*
* The shallow water equations treat water as incompressible and
* inviscid, and assume that the horizontal velocity remains constant
* in any vertical column of water. The unknowns at each point are
* the water height and the total horizontal momentum in a water
* column; the equations describe conservation of mass (fluid is
* neither created nor destroyed) and conservation of linear momentum.
* We will solve these equations with a numerical method that also
* exactly conserves mass and momentum (up to rounding error), though
* it only approximately conserves energy.
*
* The basic variables are water height ($h$), and the velocity components
* ($u, v$). We write the governing equations in the form
* $$
* U_t = F(U)_x + G(U)_y
* $$
* where
* $$
* U = \begin{bmatrix} h \\ hu \\ hv \end{bmatrix},
* F = \begin{bmatrix} hu \\ h^2 u + gh^2/2 \\ huv \end{bmatrix}
* G = \begin{bmatrix} hv \\ huv \\ h^2 v + gh^2/2 \end{bmatrix}
* $$
* The functions $F$ and $G$ are called *fluxes*, and describe how the
* conserved quantities (volume and momentum) enter and exit a region
* of space.
*
* Note that we also need a bound on the characteristic wave speeds
* for the problem in order to ensure that our method doesn't explode;
* we use this to control the Courant-Friedrichs-Levy (CFL) number
* relating wave speeds, time steps, and space steps. For the shallow
* water equations, the characteristic wave speed is $\sqrt{g h}$
* where $g$ is the gravitational constant and $h$ is the height of the
* water; in addition, we have to take into account the velocity of
* the underlying flow.
*
* ## Interface
*
* To provide a general interface, we make the flux and speed functions
* take arrays that consist of the `h`, `hu`, and `hv` components
* in sequential arrays separated by `field_stride`: for example,
* the start of the height field data is at `U`, the start of
* the $x$ momentum is at `U+field_stride`, and the start of the
* $y$ momentum is at `U+2*field_stride`.
*/
void shallow2d_flux_cu(float* FU, float* GU, const float* U,
int nx, int ny, int field_stride);
void shallow2d_speed_cu(float* cxy, const float* U,
int nx, int ny, int field_stride);
//ldoc off
#endif /* SHALLOW2D_CUDA_H */ |
You are a helpful coding assistant specialized in converting HIP source code to AMD device assembly. | #ifndef SHALLOW2D_CUDA_H
#define SHALLOW2D_CUDA_H
//ldoc on
/**
* # Shallow water equations
*
* ## Physics picture
*
* The shallow water equations treat water as incompressible and
* inviscid, and assume that the horizontal velocity remains constant
* in any vertical column of water. The unknowns at each point are
* the water height and the total horizontal momentum in a water
* column; the equations describe conservation of mass (fluid is
* neither created nor destroyed) and conservation of linear momentum.
* We will solve these equations with a numerical method that also
* exactly conserves mass and momentum (up to rounding error), though
* it only approximately conserves energy.
*
* The basic variables are water height ($h$), and the velocity components
* ($u, v$). We write the governing equations in the form
* $$
* U_t = F(U)_x + G(U)_y
* $$
* where
* $$
* U = \begin{bmatrix} h \\ hu \\ hv \end{bmatrix},
* F = \begin{bmatrix} hu \\ h^2 u + gh^2/2 \\ huv \end{bmatrix}
* G = \begin{bmatrix} hv \\ huv \\ h^2 v + gh^2/2 \end{bmatrix}
* $$
* The functions $F$ and $G$ are called *fluxes*, and describe how the
* conserved quantities (volume and momentum) enter and exit a region
* of space.
*
* Note that we also need a bound on the characteristic wave speeds
* for the problem in order to ensure that our method doesn't explode;
* we use this to control the Courant-Friedrichs-Levy (CFL) number
* relating wave speeds, time steps, and space steps. For the shallow
* water equations, the characteristic wave speed is $\sqrt{g h}$
* where $g$ is the gravitational constant and $h$ is the height of the
* water; in addition, we have to take into account the velocity of
* the underlying flow.
*
* ## Interface
*
* To provide a general interface, we make the flux and speed functions
* take arrays that consist of the `h`, `hu`, and `hv` components
* in sequential arrays separated by `field_stride`: for example,
* the start of the height field data is at `U`, the start of
* the $x$ momentum is at `U+field_stride`, and the start of the
* $y$ momentum is at `U+2*field_stride`.
*/
void shallow2d_flux_cu(float* FU, float* GU, const float* U,
int nx, int ny, int field_stride);
void shallow2d_speed_cu(float* cxy, const float* U,
int nx, int ny, int field_stride);
//ldoc off
#endif /* SHALLOW2D_CUDA_H */ | .text
.p2alignl 7, 3214868480
.fill 96, 4, 3214868480
.type __hip_cuid_,@object
.section .bss,"aw",@nobits
.globl __hip_cuid_
__hip_cuid_:
.byte 0
.size __hip_cuid_, 1
.ident "AMD clang version 18.0.0git (https://github.com/RadeonOpenCompute/llvm-project roc-6.3.2 25012 e5bf7e55c91490b07c49d8960fa7983d864936c4)"
.section ".note.GNU-stack","",@progbits
.addrsig
.addrsig_sym __hip_cuid_
.amdgcn_target "amdgcn-amd-amdhsa--gfx1100"
.amdgpu_metadata
---
amdhsa.kernels: []
amdhsa.target: amdgcn-amd-amdhsa--gfx1100
amdhsa.version:
- 1
- 2
...
.end_amdgpu_metadata |
You are a helpful coding assistant specialized in converting HIP source code to AMD host assembly. | #ifndef SHALLOW2D_CUDA_H
#define SHALLOW2D_CUDA_H
//ldoc on
/**
* # Shallow water equations
*
* ## Physics picture
*
* The shallow water equations treat water as incompressible and
* inviscid, and assume that the horizontal velocity remains constant
* in any vertical column of water. The unknowns at each point are
* the water height and the total horizontal momentum in a water
* column; the equations describe conservation of mass (fluid is
* neither created nor destroyed) and conservation of linear momentum.
* We will solve these equations with a numerical method that also
* exactly conserves mass and momentum (up to rounding error), though
* it only approximately conserves energy.
*
* The basic variables are water height ($h$), and the velocity components
* ($u, v$). We write the governing equations in the form
* $$
* U_t = F(U)_x + G(U)_y
* $$
* where
* $$
* U = \begin{bmatrix} h \\ hu \\ hv \end{bmatrix},
* F = \begin{bmatrix} hu \\ h^2 u + gh^2/2 \\ huv \end{bmatrix}
* G = \begin{bmatrix} hv \\ huv \\ h^2 v + gh^2/2 \end{bmatrix}
* $$
* The functions $F$ and $G$ are called *fluxes*, and describe how the
* conserved quantities (volume and momentum) enter and exit a region
* of space.
*
* Note that we also need a bound on the characteristic wave speeds
* for the problem in order to ensure that our method doesn't explode;
* we use this to control the Courant-Friedrichs-Levy (CFL) number
* relating wave speeds, time steps, and space steps. For the shallow
* water equations, the characteristic wave speed is $\sqrt{g h}$
* where $g$ is the gravitational constant and $h$ is the height of the
* water; in addition, we have to take into account the velocity of
* the underlying flow.
*
* ## Interface
*
* To provide a general interface, we make the flux and speed functions
* take arrays that consist of the `h`, `hu`, and `hv` components
* in sequential arrays separated by `field_stride`: for example,
* the start of the height field data is at `U`, the start of
* the $x$ momentum is at `U+field_stride`, and the start of the
* $y$ momentum is at `U+2*field_stride`.
*/
void shallow2d_flux_cu(float* FU, float* GU, const float* U,
int nx, int ny, int field_stride);
void shallow2d_speed_cu(float* cxy, const float* U,
int nx, int ny, int field_stride);
//ldoc off
#endif /* SHALLOW2D_CUDA_H */ | .text
.file "shallow2d.hip"
.type __hip_cuid_,@object # @__hip_cuid_
.bss
.globl __hip_cuid_
__hip_cuid_:
.byte 0 # 0x0
.size __hip_cuid_, 1
.section ".linker-options","e",@llvm_linker_options
.ident "AMD clang version 18.0.0git (https://github.com/RadeonOpenCompute/llvm-project roc-6.3.2 25012 e5bf7e55c91490b07c49d8960fa7983d864936c4)"
.section ".note.GNU-stack","",@progbits
.addrsig
.addrsig_sym __hip_cuid_ |
You are a helpful coding assistant specialized in converting from CUDA device assembly to AMD device assembly. | code for sm_80
Function : _Z16shallow2dv_speedPfPKfS1_S1_f
.headerflags @"EF_CUDA_TEXMODE_UNIFIED EF_CUDA_64BIT_ADDRESS EF_CUDA_SM80 EF_CUDA_VIRTUAL_SM(EF_CUDA_SM80)"
/*0000*/ IMAD.MOV.U32 R1, RZ, RZ, c[0x0][0x28] ; /* 0x00000a00ff017624 */
/* 0x000fe400078e00ff */
/*0010*/ S2R R0, SR_CTAID.Y ; /* 0x0000000000007919 */
/* 0x000e220000002600 */
/*0020*/ IMAD.MOV.U32 R6, RZ, RZ, 0x4 ; /* 0x00000004ff067424 */
/* 0x000fe200078e00ff */
/*0030*/ ULDC.64 UR4, c[0x0][0x118] ; /* 0x0000460000047ab9 */
/* 0x000fe40000000a00 */
/*0040*/ S2R R7, SR_TID.Y ; /* 0x0000000000077919 */
/* 0x000e280000002200 */
/*0050*/ S2R R3, SR_CTAID.X ; /* 0x0000000000037919 */
/* 0x000e680000002500 */
/*0060*/ S2R R5, SR_TID.X ; /* 0x0000000000057919 */
/* 0x000ea20000002100 */
/*0070*/ IMAD R0, R0, c[0x0][0x4], R7 ; /* 0x0000010000007a24 */
/* 0x001fc800078e0207 */
/*0080*/ IMAD R0, R0, c[0x0][0xc], R3 ; /* 0x0000030000007a24 */
/* 0x002fc800078e0203 */
/*0090*/ IMAD R5, R0, c[0x0][0x0], R5 ; /* 0x0000000000057a24 */
/* 0x004fc800078e0205 */
/*00a0*/ IMAD.WIDE.U32 R6, R5, R6, c[0x0][0x168] ; /* 0x00005a0005067625 */
/* 0x000fcc00078e0006 */
/*00b0*/ LDG.E.CONSTANT R6, [R6.64] ; /* 0x0000000406067981 */
/* 0x000ea2000c1e9900 */
/*00c0*/ MOV R2, c[0x0][0x160] ; /* 0x0000580000027a02 */
/* 0x000fe20000000f00 */
/*00d0*/ IMAD.MOV.U32 R3, RZ, RZ, c[0x0][0x164] ; /* 0x00005900ff037624 */
/* 0x000fca00078e00ff */
/*00e0*/ LDG.E R4, [R2.64] ; /* 0x0000000402047981 */
/* 0x000168000c1e1900 */
/*00f0*/ LDG.E R0, [R2.64+0x4] ; /* 0x0000040402007981 */
/* 0x000162000c1e1900 */
/*0100*/ BSSY B0, 0x1d0 ; /* 0x000000c000007945 */
/* 0x000fe20003800000 */
/*0110*/ IADD3 R8, R6, 0x1800000, RZ ; /* 0x0180000006087810 */
/* 0x004fc80007ffe0ff */
/*0120*/ LOP3.LUT R8, R8, 0x7f800000, RZ, 0xc0, !PT ; /* 0x7f80000008087812 */
/* 0x000fc800078ec0ff */
/*0130*/ ISETP.GT.U32.AND P0, PT, R8, 0x1ffffff, PT ; /* 0x01ffffff0800780c */
/* 0x000fda0003f04070 */
/*0140*/ @P0 BRA 0x180 ; /* 0x0000003000000947 */
/* 0x000fea0003800000 */
/*0150*/ MOV R8, 0x170 ; /* 0x0000017000087802 */
/* 0x001fe40000000f00 */
/*0160*/ CALL.REL.NOINC 0x3b0 ; /* 0x0000024000007944 */
/* 0x020fea0003c00000 */
/*0170*/ BRA 0x1c0 ; /* 0x0000004000007947 */
/* 0x000fea0003800000 */
/*0180*/ MUFU.RCP R7, R6 ; /* 0x0000000600077308 */
/* 0x001e240000001000 */
/*0190*/ FFMA R8, R6, R7, -1 ; /* 0xbf80000006087423 */
/* 0x001fc80000000007 */
/*01a0*/ FADD.FTZ R8, -R8, -RZ ; /* 0x800000ff08087221 */
/* 0x000fc80000010100 */
/*01b0*/ FFMA R7, R7, R8, R7 ; /* 0x0000000807077223 */
/* 0x000fe40000000007 */
/*01c0*/ BSYNC B0 ; /* 0x0000000000007941 */
/* 0x000fea0003800000 */
/*01d0*/ FMUL R6, R6, c[0x0][0x180] ; /* 0x0000600006067a20 */
/* 0x001fe20000400000 */
/*01e0*/ BSSY B0, 0x2b0 ; /* 0x000000c000007945 */
/* 0x000fe60003800000 */
/*01f0*/ MUFU.RSQ R9, R6 ; /* 0x0000000600097308 */
/* 0x0000a20000001400 */
/*0200*/ IADD3 R8, R6, -0xd000000, RZ ; /* 0xf300000006087810 */
/* 0x000fc80007ffe0ff */
/*0210*/ ISETP.GT.U32.AND P0, PT, R8, 0x727fffff, PT ; /* 0x727fffff0800780c */
/* 0x000fda0003f04070 */
/*0220*/ @!P0 BRA 0x260 ; /* 0x0000003000008947 */
/* 0x000fea0003800000 */
/*0230*/ MOV R13, 0x250 ; /* 0x00000250000d7802 */
/* 0x005fe40000000f00 */
/*0240*/ CALL.REL.NOINC 0x6f0 ; /* 0x000004a000007944 */
/* 0x022fea0003c00000 */
/*0250*/ BRA 0x2a0 ; /* 0x0000004000007947 */
/* 0x000fea0003800000 */
/*0260*/ FMUL.FTZ R11, R6, R9 ; /* 0x00000009060b7220 */
/* 0x005fe40000410000 */
/*0270*/ FMUL.FTZ R9, R9, 0.5 ; /* 0x3f00000009097820 */
/* 0x000fe40000410000 */
/*0280*/ FFMA R6, -R11, R11, R6 ; /* 0x0000000b0b067223 */
/* 0x000fc80000000106 */
/*0290*/ FFMA R6, R6, R9, R11 ; /* 0x0000000906067223 */
/* 0x000fe4000000000b */
/*02a0*/ BSYNC B0 ; /* 0x0000000000007941 */
/* 0x000fea0003800000 */
/*02b0*/ IMAD.MOV.U32 R10, RZ, RZ, 0x4 ; /* 0x00000004ff0a7424 */
/* 0x000fc800078e00ff */
/*02c0*/ IMAD.WIDE.U32 R8, R5, R10, c[0x0][0x170] ; /* 0x00005c0005087625 */
/* 0x000fc800078e000a */
/*02d0*/ IMAD.WIDE.U32 R10, R5, R10, c[0x0][0x178] ; /* 0x00005e00050a7625 */
/* 0x000fe400078e000a */
/*02e0*/ LDG.E.CONSTANT R8, [R8.64] ; /* 0x0000000408087981 */
/* 0x000ea8000c1e9900 */
/*02f0*/ LDG.E.CONSTANT R10, [R10.64] ; /* 0x000000040a0a7981 */
/* 0x000ee2000c1e9900 */
/*0300*/ FMUL R5, R8, R7.reuse ; /* 0x0000000708057220 */
/* 0x086fe40000400000 */
/*0310*/ FMUL R7, R10, R7 ; /* 0x000000070a077220 */
/* 0x008fe40000400000 */
/*0320*/ FADD R5, |R5|, R6 ; /* 0x0000000605057221 */
/* 0x000fc40000000200 */
/*0330*/ FADD R7, |R7|, R6 ; /* 0x0000000607077221 */
/* 0x000fc60000000200 */
/*0340*/ FSETP.GEU.AND P0, PT, R4, R5, PT ; /* 0x000000050400720b */
/* 0x020fe40003f0e000 */
/*0350*/ FSETP.GEU.AND P1, PT, R0, R7, PT ; /* 0x000000070000720b */
/* 0x000fe40003f2e000 */
/*0360*/ FSEL R5, R5, R4, !P0 ; /* 0x0000000405057208 */
/* 0x000fe40004000000 */
/*0370*/ FSEL R7, R7, R0, !P1 ; /* 0x0000000007077208 */
/* 0x000fc60004800000 */
/*0380*/ STG.E [R2.64], R5 ; /* 0x0000000502007986 */
/* 0x000fe8000c101904 */
/*0390*/ STG.E [R2.64+0x4], R7 ; /* 0x0000040702007986 */
/* 0x000fe2000c101904 */
/*03a0*/ EXIT ; /* 0x000000000000794d */
/* 0x000fea0003800000 */
/*03b0*/ SHF.L.U32 R7, R6, 0x1, RZ ; /* 0x0000000106077819 */
/* 0x000fe200000006ff */
/*03c0*/ BSSY B1, 0x6d0 ; /* 0x0000030000017945 */
/* 0x000fe60003800000 */
/*03d0*/ SHF.R.U32.HI R7, RZ, 0x18, R7 ; /* 0x00000018ff077819 */
/* 0x000fc80000011607 */
/*03e0*/ ISETP.NE.U32.AND P0, PT, R7, RZ, PT ; /* 0x000000ff0700720c */
/* 0x000fda0003f05070 */
/*03f0*/ @P0 BRA 0x4a0 ; /* 0x000000a000000947 */
/* 0x000fea0003800000 */
/*0400*/ IMAD.SHL.U32 R7, R6, 0x2, RZ ; /* 0x0000000206077824 */
/* 0x000fca00078e00ff */
/*0410*/ ISETP.NE.AND P0, PT, R7, RZ, PT ; /* 0x000000ff0700720c */
/* 0x000fda0003f05270 */
/*0420*/ @P0 FFMA R9, R6, 1.84467440737095516160e+19, RZ ; /* 0x5f80000006090823 */
/* 0x000fe200000000ff */
/*0430*/ @!P0 MUFU.RCP R7, R6 ; /* 0x0000000600078308 */
/* 0x000ff00000001000 */
/*0440*/ @P0 MUFU.RCP R10, R9 ; /* 0x00000009000a0308 */
/* 0x000e240000001000 */
/*0450*/ @P0 FFMA R11, R9, R10, -1 ; /* 0xbf800000090b0423 */
/* 0x001fc8000000000a */
/*0460*/ @P0 FADD.FTZ R11, -R11, -RZ ; /* 0x800000ff0b0b0221 */
/* 0x000fc80000010100 */
/*0470*/ @P0 FFMA R11, R10, R11, R10 ; /* 0x0000000b0a0b0223 */
/* 0x000fc8000000000a */
/*0480*/ @P0 FFMA R7, R11, 1.84467440737095516160e+19, RZ ; /* 0x5f8000000b070823 */
/* 0x000fe200000000ff */
/*0490*/ BRA 0x6c0 ; /* 0x0000022000007947 */
/* 0x000fea0003800000 */
/*04a0*/ IADD3 R9, R7, -0xfd, RZ ; /* 0xffffff0307097810 */
/* 0x000fc80007ffe0ff */
/*04b0*/ ISETP.GT.U32.AND P0, PT, R9, 0x1, PT ; /* 0x000000010900780c */
/* 0x000fda0003f04070 */
/*04c0*/ @P0 BRA 0x6b0 ; /* 0x000001e000000947 */
/* 0x000fea0003800000 */
/*04d0*/ LOP3.LUT R10, R6, 0x7fffff, RZ, 0xc0, !PT ; /* 0x007fffff060a7812 */
/* 0x000fe200078ec0ff */
/*04e0*/ HFMA2.MMA R14, -RZ, RZ, 0, 1.78813934326171875e-07 ; /* 0x00000003ff0e7435 */
/* 0x000fe200000001ff */
/*04f0*/ IADD3 R7, R7, -0xfc, RZ ; /* 0xffffff0407077810 */
/* 0x000fe40007ffe0ff */
/*0500*/ LOP3.LUT R10, R10, 0x3f800000, RZ, 0xfc, !PT ; /* 0x3f8000000a0a7812 */
/* 0x000fc800078efcff */
/*0510*/ MUFU.RCP R11, R10 ; /* 0x0000000a000b7308 */
/* 0x000e260000001000 */
/*0520*/ SHF.L.U32 R15, R14, R9, RZ ; /* 0x000000090e0f7219 */
/* 0x000fe200000006ff */
/*0530*/ FFMA R12, R10, R11, -1 ; /* 0xbf8000000a0c7423 */
/* 0x001fc8000000000b */
/*0540*/ FADD.FTZ R12, -R12, -RZ ; /* 0x800000ff0c0c7221 */
/* 0x000fc80000010100 */
/*0550*/ FFMA.RM R13, R11.reuse, R12.reuse, R11.reuse ; /* 0x0000000c0b0d7223 */
/* 0x1c0fe4000000400b */
/*0560*/ FFMA.RP R12, R11, R12, R11 ; /* 0x0000000c0b0c7223 */
/* 0x000fc6000000800b */
/*0570*/ LOP3.LUT R11, R13.reuse, 0x7fffff, RZ, 0xc0, !PT ; /* 0x007fffff0d0b7812 */
/* 0x040fe400078ec0ff */
/*0580*/ FSETP.NEU.FTZ.AND P0, PT, R13, R12, PT ; /* 0x0000000c0d00720b */
/* 0x000fe40003f1d000 */
/*0590*/ LOP3.LUT R12, R11, 0x800000, RZ, 0xfc, !PT ; /* 0x008000000b0c7812 */
/* 0x000fe400078efcff */
/*05a0*/ SEL R11, RZ, 0xffffffff, !P0 ; /* 0xffffffffff0b7807 */
/* 0x000fe40004000000 */
/*05b0*/ LOP3.LUT R10, R15, R12, RZ, 0xc0, !PT ; /* 0x0000000c0f0a7212 */
/* 0x000fe400078ec0ff */
/*05c0*/ SHF.R.U32.HI R7, RZ, R7, R12 ; /* 0x00000007ff077219 */
/* 0x000fe2000001160c */
/*05d0*/ IMAD.MOV R11, RZ, RZ, -R11 ; /* 0x000000ffff0b7224 */
/* 0x000fe200078e0a0b */
/*05e0*/ SHF.R.U32.HI R10, RZ, R9, R10 ; /* 0x00000009ff0a7219 */
/* 0x000fc8000001160a */
/*05f0*/ LOP3.LUT P1, RZ, R11, R9, R12, 0xf8, !PT ; /* 0x000000090bff7212 */
/* 0x000fe4000782f80c */
/*0600*/ LOP3.LUT P0, RZ, R10.reuse, 0x1, RZ, 0xc0, !PT ; /* 0x000000010aff7812 */
/* 0x040fe4000780c0ff */
/*0610*/ LOP3.LUT P2, RZ, R10, 0x2, RZ, 0xc0, !PT ; /* 0x000000020aff7812 */
/* 0x000fc8000784c0ff */
/*0620*/ PLOP3.LUT P0, PT, P0, P1, P2, 0xe0, 0x0 ; /* 0x000000000000781c */
/* 0x000fe40000703c20 */
/*0630*/ LOP3.LUT P1, RZ, R6, 0x7fffff, RZ, 0xc0, !PT ; /* 0x007fffff06ff7812 */
/* 0x000fe4000782c0ff */
/*0640*/ SEL R9, RZ, 0x1, !P0 ; /* 0x00000001ff097807 */
/* 0x000fc80004000000 */
/*0650*/ IADD3 R9, -R9, RZ, RZ ; /* 0x000000ff09097210 */
/* 0x000fc80007ffe1ff */
/*0660*/ ISETP.GE.AND P0, PT, R9, RZ, PT ; /* 0x000000ff0900720c */
/* 0x000fda0003f06270 */
/*0670*/ @!P0 IADD3 R7, R7, 0x1, RZ ; /* 0x0000000107078810 */
/* 0x000fca0007ffe0ff */
/*0680*/ @!P1 IMAD.SHL.U32 R7, R7, 0x2, RZ ; /* 0x0000000207079824 */
/* 0x000fca00078e00ff */
/*0690*/ LOP3.LUT R7, R7, 0x80000000, R6, 0xf8, !PT ; /* 0x8000000007077812 */
/* 0x000fe200078ef806 */
/*06a0*/ BRA 0x6c0 ; /* 0x0000001000007947 */
/* 0x000fea0003800000 */
/*06b0*/ MUFU.RCP R7, R6 ; /* 0x0000000600077308 */
/* 0x0000640000001000 */
/*06c0*/ BSYNC B1 ; /* 0x0000000000017941 */
/* 0x000fea0003800000 */
/*06d0*/ MOV R9, 0x0 ; /* 0x0000000000097802 */
/* 0x000fc80000000f00 */
/*06e0*/ RET.REL.NODEC R8 0x0 ; /* 0xfffff91008007950 */
/* 0x000fea0003c3ffff */
/*06f0*/ LOP3.LUT P0, RZ, R6, 0x7fffffff, RZ, 0xc0, !PT ; /* 0x7fffffff06ff7812 */
/* 0x000fda000780c0ff */
/*0700*/ @!P0 IMAD.MOV.U32 R8, RZ, RZ, R6 ; /* 0x000000ffff088224 */
/* 0x000fe200078e0006 */
/*0710*/ @!P0 BRA 0x820 ; /* 0x0000010000008947 */
/* 0x000fea0003800000 */
/*0720*/ FSETP.GEU.FTZ.AND P0, PT, R6, RZ, PT ; /* 0x000000ff0600720b */
/* 0x000fda0003f1e000 */
/*0730*/ @!P0 MOV R8, 0x7fffffff ; /* 0x7fffffff00088802 */
/* 0x000fe20000000f00 */
/*0740*/ @!P0 BRA 0x820 ; /* 0x000000d000008947 */
/* 0x000fea0003800000 */
/*0750*/ FSETP.GTU.FTZ.AND P0, PT, |R6|, +INF , PT ; /* 0x7f8000000600780b */
/* 0x000fda0003f1c200 */
/*0760*/ @P0 FADD.FTZ R8, R6, 1 ; /* 0x3f80000006080421 */
/* 0x000fe20000010000 */
/*0770*/ @P0 BRA 0x820 ; /* 0x000000a000000947 */
/* 0x000fea0003800000 */
/*0780*/ FSETP.NEU.FTZ.AND P0, PT, |R6|, +INF , PT ; /* 0x7f8000000600780b */
/* 0x000fda0003f1d200 */
/*0790*/ @P0 FFMA R9, R6, 1.84467440737095516160e+19, RZ ; /* 0x5f80000006090823 */
/* 0x000fc800000000ff */
/*07a0*/ @P0 MUFU.RSQ R8, R9 ; /* 0x0000000900080308 */
/* 0x000e240000001400 */
/*07b0*/ @P0 FMUL.FTZ R10, R9, R8 ; /* 0x00000008090a0220 */
/* 0x001fe40000410000 */
/*07c0*/ @P0 FMUL.FTZ R12, R8, 0.5 ; /* 0x3f000000080c0820 */
/* 0x000fe40000410000 */
/*07d0*/ @P0 FADD.FTZ R11, -R10.reuse, -RZ ; /* 0x800000ff0a0b0221 */
/* 0x040fe40000010100 */
/*07e0*/ @!P0 IMAD.MOV.U32 R8, RZ, RZ, R6 ; /* 0x000000ffff088224 */
/* 0x000fe400078e0006 */
/*07f0*/ @P0 FFMA R11, R10, R11, R9 ; /* 0x0000000b0a0b0223 */
/* 0x000fc80000000009 */
/*0800*/ @P0 FFMA R11, R11, R12, R10 ; /* 0x0000000c0b0b0223 */
/* 0x000fc8000000000a */
/*0810*/ @P0 FMUL.FTZ R8, R11, 2.3283064365386962891e-10 ; /* 0x2f8000000b080820 */
/* 0x000fc80000410000 */
/*0820*/ HFMA2.MMA R9, -RZ, RZ, 0, 0 ; /* 0x00000000ff097435 */
/* 0x000fe200000001ff */
/*0830*/ MOV R6, R8 ; /* 0x0000000800067202 */
/* 0x000fe20000000f00 */
/*0840*/ IMAD.MOV.U32 R8, RZ, RZ, R13 ; /* 0x000000ffff087224 */
/* 0x000fc800078e000d */
/*0850*/ RET.REL.NODEC R8 0x0 ; /* 0xfffff7a008007950 */
/* 0x000fea0003c3ffff */
/*0860*/ BRA 0x860; /* 0xfffffff000007947 */
/* 0x000fc0000383ffff */
/*0870*/ NOP; /* 0x0000000000007918 */
/* 0x000fc00000000000 */
/*0880*/ NOP; /* 0x0000000000007918 */
/* 0x000fc00000000000 */
/*0890*/ NOP; /* 0x0000000000007918 */
/* 0x000fc00000000000 */
/*08a0*/ NOP; /* 0x0000000000007918 */
/* 0x000fc00000000000 */
/*08b0*/ NOP; /* 0x0000000000007918 */
/* 0x000fc00000000000 */
/*08c0*/ NOP; /* 0x0000000000007918 */
/* 0x000fc00000000000 */
/*08d0*/ NOP; /* 0x0000000000007918 */
/* 0x000fc00000000000 */
/*08e0*/ NOP; /* 0x0000000000007918 */
/* 0x000fc00000000000 */
/*08f0*/ NOP; /* 0x0000000000007918 */
/* 0x000fc00000000000 */
..........
Function : _Z15shallow2dv_fluxPfS_S_S_S_S_PKfS1_S1_f
.headerflags @"EF_CUDA_TEXMODE_UNIFIED EF_CUDA_64BIT_ADDRESS EF_CUDA_SM80 EF_CUDA_VIRTUAL_SM(EF_CUDA_SM80)"
/*0000*/ MOV R1, c[0x0][0x28] ; /* 0x00000a0000017a02 */
/* 0x000fe40000000f00 */
/*0010*/ S2R R0, SR_CTAID.Y ; /* 0x0000000000007919 */
/* 0x000e220000002600 */
/*0020*/ ULDC.64 UR4, c[0x0][0x118] ; /* 0x0000460000047ab9 */
/* 0x000fc60000000a00 */
/*0030*/ S2R R7, SR_TID.Y ; /* 0x0000000000077919 */
/* 0x000e280000002200 */
/*0040*/ S2R R3, SR_CTAID.X ; /* 0x0000000000037919 */
/* 0x000e680000002500 */
/*0050*/ S2R R5, SR_TID.X ; /* 0x0000000000057919 */
/* 0x000ea20000002100 */
/*0060*/ IMAD R0, R0, c[0x0][0x4], R7 ; /* 0x0000010000007a24 */
/* 0x001fc800078e0207 */
/*0070*/ IMAD R0, R0, c[0x0][0xc], R3 ; /* 0x0000030000007a24 */
/* 0x002fe400078e0203 */
/*0080*/ IMAD.MOV.U32 R3, RZ, RZ, 0x4 ; /* 0x00000004ff037424 */
/* 0x000fe400078e00ff */
/*0090*/ IMAD R0, R0, c[0x0][0x0], R5 ; /* 0x0000000000007a24 */
/* 0x004fc800078e0205 */
/*00a0*/ IMAD.WIDE.U32 R6, R0, R3, c[0x0][0x190] ; /* 0x0000640000067625 */
/* 0x000fca00078e0003 */
/*00b0*/ LDG.E.CONSTANT R2, [R6.64] ; /* 0x0000000406027981 */
/* 0x000ea2000c1e9900 */
/*00c0*/ IMAD.WIDE.U32 R4, R0, R3, c[0x0][0x1a0] ; /* 0x0000680000047625 */
/* 0x000fc800078e0003 */
/*00d0*/ IMAD.WIDE.U32 R8, R0, R3, c[0x0][0x198] ; /* 0x0000660000087625 */
/* 0x000fe400078e0003 */
/*00e0*/ LDG.E.CONSTANT R4, [R4.64] ; /* 0x0000000404047981 */
/* 0x000168000c1e9900 */
/*00f0*/ LDG.E.CONSTANT R3, [R8.64] ; /* 0x0000000408037981 */
/* 0x000162000c1e9900 */
/*0100*/ BSSY B0, 0x1d0 ; /* 0x000000c000007945 */
/* 0x000fe20003800000 */
/*0110*/ IADD3 R10, R2, 0x1800000, RZ ; /* 0x01800000020a7810 */
/* 0x004fc80007ffe0ff */
/*0120*/ LOP3.LUT R10, R10, 0x7f800000, RZ, 0xc0, !PT ; /* 0x7f8000000a0a7812 */
/* 0x000fc800078ec0ff */
/*0130*/ ISETP.GT.U32.AND P0, PT, R10, 0x1ffffff, PT ; /* 0x01ffffff0a00780c */
/* 0x000fda0003f04070 */
/*0140*/ @P0 BRA 0x180 ; /* 0x0000003000000947 */
/* 0x000fea0003800000 */
/*0150*/ MOV R6, 0x170 ; /* 0x0000017000067802 */
/* 0x001fe40000000f00 */
/*0160*/ CALL.REL.NOINC 0x320 ; /* 0x000001b000007944 */
/* 0x020fea0003c00000 */
/*0170*/ BRA 0x1c0 ; /* 0x0000004000007947 */
/* 0x000fea0003800000 */
/*0180*/ MUFU.RCP R5, R2 ; /* 0x0000000200057308 */
/* 0x001e240000001000 */
/*0190*/ FFMA R6, R2, R5, -1 ; /* 0xbf80000002067423 */
/* 0x001fc80000000005 */
/*01a0*/ FADD.FTZ R6, -R6, -RZ ; /* 0x800000ff06067221 */
/* 0x000fc80000010100 */
/*01b0*/ FFMA R5, R5, R6, R5 ; /* 0x0000000605057223 */
/* 0x000fe40000000005 */
/*01c0*/ BSYNC B0 ; /* 0x0000000000007941 */
/* 0x000fea0003800000 */
/*01d0*/ MOV R7, c[0x0][0x1a8] ; /* 0x00006a0000077a02 */
/* 0x000fe20000000f00 */
/*01e0*/ FMUL R8, R3.reuse, R4.reuse ; /* 0x0000000403087220 */
/* 0x0e0fe40000400000 */
/*01f0*/ FMUL R6, R3, R3 ; /* 0x0000000303067220 */
/* 0x000fe40000400000 */
/*0200*/ FMUL R7, R7, 0.5 ; /* 0x3f00000007077820 */
/* 0x000fe40000400000 */
/*0210*/ FMUL R4, R4, R4 ; /* 0x0000000404047220 */
/* 0x000fe40000400000 */
/*0220*/ FMUL R3, R6, R5 ; /* 0x0000000506037220 */
/* 0x002fe40000400000 */
/*0230*/ FMUL R7, R2, R7 ; /* 0x0000000702077220 */
/* 0x000fc40000400000 */
/*0240*/ FMUL R4, R4, R5 ; /* 0x0000000504047220 */
/* 0x000fe40000400000 */
/*0250*/ IMAD.MOV.U32 R9, RZ, RZ, 0x4 ; /* 0x00000004ff097424 */
/* 0x000fe400078e00ff */
/*0260*/ FFMA R11, R2.reuse, R7.reuse, R3 ; /* 0x00000007020b7223 */
/* 0x0c0fe40000000003 */
/*0270*/ FFMA R15, R2, R7, R4 ; /* 0x00000007020f7223 */
/* 0x000fe40000000004 */
/*0280*/ FMUL R13, R8, R5 ; /* 0x00000005080d7220 */
/* 0x000fe40000400000 */
/*0290*/ IMAD.WIDE.U32 R2, R0, R9, c[0x0][0x168] ; /* 0x00005a0000027625 */
/* 0x001fc800078e0009 */
/*02a0*/ IMAD.WIDE.U32 R4, R0.reuse, R9.reuse, c[0x0][0x170] ; /* 0x00005c0000047625 */
/* 0x0c0fe200078e0009 */
/*02b0*/ STG.E [R2.64], R11 ; /* 0x0000000b02007986 */
/* 0x000fe6000c101904 */
/*02c0*/ IMAD.WIDE.U32 R6, R0.reuse, R9.reuse, c[0x0][0x180] ; /* 0x0000600000067625 */
/* 0x0c0fe200078e0009 */
/*02d0*/ STG.E [R4.64], R13 ; /* 0x0000000d04007986 */
/* 0x000fe6000c101904 */
/*02e0*/ IMAD.WIDE.U32 R8, R0, R9, c[0x0][0x188] ; /* 0x0000620000087625 */
/* 0x000fe200078e0009 */
/*02f0*/ STG.E [R6.64], R13 ; /* 0x0000000d06007986 */
/* 0x000fe8000c101904 */
/*0300*/ STG.E [R8.64], R15 ; /* 0x0000000f08007986 */
/* 0x000fe2000c101904 */
/*0310*/ EXIT ; /* 0x000000000000794d */
/* 0x000fea0003800000 */
/*0320*/ SHF.L.U32 R5, R2, 0x1, RZ ; /* 0x0000000102057819 */
/* 0x000fe200000006ff */
/*0330*/ BSSY B1, 0x640 ; /* 0x0000030000017945 */
/* 0x000fe60003800000 */
/*0340*/ SHF.R.U32.HI R5, RZ, 0x18, R5 ; /* 0x00000018ff057819 */
/* 0x000fc80000011605 */
/*0350*/ ISETP.NE.U32.AND P0, PT, R5, RZ, PT ; /* 0x000000ff0500720c */
/* 0x000fda0003f05070 */
/*0360*/ @P0 BRA 0x410 ; /* 0x000000a000000947 */
/* 0x000fea0003800000 */
/*0370*/ IMAD.SHL.U32 R5, R2, 0x2, RZ ; /* 0x0000000202057824 */
/* 0x000fca00078e00ff */
/*0380*/ ISETP.NE.AND P0, PT, R5, RZ, PT ; /* 0x000000ff0500720c */
/* 0x000fda0003f05270 */
/*0390*/ @P0 FFMA R7, R2, 1.84467440737095516160e+19, RZ ; /* 0x5f80000002070823 */
/* 0x000fe200000000ff */
/*03a0*/ @!P0 MUFU.RCP R5, R2 ; /* 0x0000000200058308 */
/* 0x000ff00000001000 */
/*03b0*/ @P0 MUFU.RCP R8, R7 ; /* 0x0000000700080308 */
/* 0x000e240000001000 */
/*03c0*/ @P0 FFMA R9, R7, R8, -1 ; /* 0xbf80000007090423 */
/* 0x001fc80000000008 */
/*03d0*/ @P0 FADD.FTZ R9, -R9, -RZ ; /* 0x800000ff09090221 */
/* 0x000fc80000010100 */
/*03e0*/ @P0 FFMA R9, R8, R9, R8 ; /* 0x0000000908090223 */
/* 0x000fc80000000008 */
/*03f0*/ @P0 FFMA R5, R9, 1.84467440737095516160e+19, RZ ; /* 0x5f80000009050823 */
/* 0x000fe200000000ff */
/*0400*/ BRA 0x630 ; /* 0x0000022000007947 */
/* 0x000fea0003800000 */
/*0410*/ IADD3 R7, R5, -0xfd, RZ ; /* 0xffffff0305077810 */
/* 0x000fc80007ffe0ff */
/*0420*/ ISETP.GT.U32.AND P0, PT, R7, 0x1, PT ; /* 0x000000010700780c */
/* 0x000fda0003f04070 */
/*0430*/ @P0 BRA 0x620 ; /* 0x000001e000000947 */
/* 0x000fea0003800000 */
/*0440*/ LOP3.LUT R8, R2, 0x7fffff, RZ, 0xc0, !PT ; /* 0x007fffff02087812 */
/* 0x000fe200078ec0ff */
/*0450*/ HFMA2.MMA R12, -RZ, RZ, 0, 1.78813934326171875e-07 ; /* 0x00000003ff0c7435 */
/* 0x000fe200000001ff */
/*0460*/ IADD3 R5, R5, -0xfc, RZ ; /* 0xffffff0405057810 */
/* 0x000fe40007ffe0ff */
/*0470*/ LOP3.LUT R8, R8, 0x3f800000, RZ, 0xfc, !PT ; /* 0x3f80000008087812 */
/* 0x000fc800078efcff */
/*0480*/ MUFU.RCP R9, R8 ; /* 0x0000000800097308 */
/* 0x000e260000001000 */
/*0490*/ SHF.L.U32 R13, R12, R7, RZ ; /* 0x000000070c0d7219 */
/* 0x000fe200000006ff */
/*04a0*/ FFMA R10, R8, R9, -1 ; /* 0xbf800000080a7423 */
/* 0x001fc80000000009 */
/*04b0*/ FADD.FTZ R10, -R10, -RZ ; /* 0x800000ff0a0a7221 */
/* 0x000fc80000010100 */
/*04c0*/ FFMA.RM R11, R9.reuse, R10.reuse, R9.reuse ; /* 0x0000000a090b7223 */
/* 0x1c0fe40000004009 */
/*04d0*/ FFMA.RP R10, R9, R10, R9 ; /* 0x0000000a090a7223 */
/* 0x000fc60000008009 */
/*04e0*/ LOP3.LUT R9, R11.reuse, 0x7fffff, RZ, 0xc0, !PT ; /* 0x007fffff0b097812 */
/* 0x040fe400078ec0ff */
/*04f0*/ FSETP.NEU.FTZ.AND P0, PT, R11, R10, PT ; /* 0x0000000a0b00720b */
/* 0x000fe40003f1d000 */
/*0500*/ LOP3.LUT R10, R9, 0x800000, RZ, 0xfc, !PT ; /* 0x00800000090a7812 */
/* 0x000fe400078efcff */
/*0510*/ SEL R9, RZ, 0xffffffff, !P0 ; /* 0xffffffffff097807 */
/* 0x000fe40004000000 */
/*0520*/ LOP3.LUT R8, R13, R10, RZ, 0xc0, !PT ; /* 0x0000000a0d087212 */
/* 0x000fe400078ec0ff */
/*0530*/ IADD3 R9, -R9, RZ, RZ ; /* 0x000000ff09097210 */
/* 0x000fc40007ffe1ff */
/*0540*/ SHF.R.U32.HI R8, RZ, R7.reuse, R8 ; /* 0x00000007ff087219 */
/* 0x080fe40000011608 */
/*0550*/ LOP3.LUT P1, RZ, R9, R7, R10.reuse, 0xf8, !PT ; /* 0x0000000709ff7212 */
/* 0x100fe4000782f80a */
/*0560*/ LOP3.LUT P0, RZ, R8.reuse, 0x1, RZ, 0xc0, !PT ; /* 0x0000000108ff7812 */
/* 0x040fe4000780c0ff */
/*0570*/ LOP3.LUT P2, RZ, R8, 0x2, RZ, 0xc0, !PT ; /* 0x0000000208ff7812 */
/* 0x000fe4000784c0ff */
/*0580*/ SHF.R.U32.HI R5, RZ, R5, R10 ; /* 0x00000005ff057219 */
/* 0x000fe4000001160a */
/*0590*/ PLOP3.LUT P0, PT, P0, P1, P2, 0xe0, 0x0 ; /* 0x000000000000781c */
/* 0x000fc40000703c20 */
/*05a0*/ LOP3.LUT P1, RZ, R2, 0x7fffff, RZ, 0xc0, !PT ; /* 0x007fffff02ff7812 */
/* 0x000fe4000782c0ff */
/*05b0*/ SEL R7, RZ, 0x1, !P0 ; /* 0x00000001ff077807 */
/* 0x000fca0004000000 */
/*05c0*/ IMAD.MOV R7, RZ, RZ, -R7 ; /* 0x000000ffff077224 */
/* 0x000fca00078e0a07 */
/*05d0*/ ISETP.GE.AND P0, PT, R7, RZ, PT ; /* 0x000000ff0700720c */
/* 0x000fda0003f06270 */
/*05e0*/ @!P0 IADD3 R5, R5, 0x1, RZ ; /* 0x0000000105058810 */
/* 0x000fc80007ffe0ff */
/*05f0*/ @!P1 SHF.L.U32 R5, R5, 0x1, RZ ; /* 0x0000000105059819 */
/* 0x000fc800000006ff */
/*0600*/ LOP3.LUT R5, R5, 0x80000000, R2, 0xf8, !PT ; /* 0x8000000005057812 */
/* 0x000fe200078ef802 */
/*0610*/ BRA 0x630 ; /* 0x0000001000007947 */
/* 0x000fea0003800000 */
/*0620*/ MUFU.RCP R5, R2 ; /* 0x0000000200057308 */
/* 0x0000640000001000 */
/*0630*/ BSYNC B1 ; /* 0x0000000000017941 */
/* 0x000fea0003800000 */
/*0640*/ MOV R7, 0x0 ; /* 0x0000000000077802 */
/* 0x000fc80000000f00 */
/*0650*/ RET.REL.NODEC R6 0x0 ; /* 0xfffff9a006007950 */
/* 0x000fea0003c3ffff */
/*0660*/ BRA 0x660; /* 0xfffffff000007947 */
/* 0x000fc0000383ffff */
/*0670*/ NOP; /* 0x0000000000007918 */
/* 0x000fc00000000000 */
/*0680*/ NOP; /* 0x0000000000007918 */
/* 0x000fc00000000000 */
/*0690*/ NOP; /* 0x0000000000007918 */
/* 0x000fc00000000000 */
/*06a0*/ NOP; /* 0x0000000000007918 */
/* 0x000fc00000000000 */
/*06b0*/ NOP; /* 0x0000000000007918 */
/* 0x000fc00000000000 */
/*06c0*/ NOP; /* 0x0000000000007918 */
/* 0x000fc00000000000 */
/*06d0*/ NOP; /* 0x0000000000007918 */
/* 0x000fc00000000000 */
/*06e0*/ NOP; /* 0x0000000000007918 */
/* 0x000fc00000000000 */
/*06f0*/ NOP; /* 0x0000000000007918 */
/* 0x000fc00000000000 */
.......... | .text
.p2alignl 7, 3214868480
.fill 96, 4, 3214868480
.type __hip_cuid_,@object
.section .bss,"aw",@nobits
.globl __hip_cuid_
__hip_cuid_:
.byte 0
.size __hip_cuid_, 1
.ident "AMD clang version 18.0.0git (https://github.com/RadeonOpenCompute/llvm-project roc-6.3.2 25012 e5bf7e55c91490b07c49d8960fa7983d864936c4)"
.section ".note.GNU-stack","",@progbits
.addrsig
.addrsig_sym __hip_cuid_
.amdgcn_target "amdgcn-amd-amdhsa--gfx1100"
.amdgpu_metadata
---
amdhsa.kernels: []
amdhsa.target: amdgcn-amd-amdhsa--gfx1100
amdhsa.version:
- 1
- 2
...
.end_amdgpu_metadata |
You are a helpful coding assistant specialized in converting from CUDA host assembly to AMD host assembly. | .file "tmpxft_0011e3a2_00000000-6_shallow2d.cudafe1.cpp"
.text
#APP
#NO_APP
.type _ZL55__device_stub__Z15shallow2dv_fluxPfS_S_S_S_S_PKfS1_S1_fPfS_S_S_S_S_PKfS1_S1_f, @function
_ZL55__device_stub__Z15shallow2dv_fluxPfS_S_S_S_S_PKfS1_S1_fPfS_S_S_S_S_PKfS1_S1_f:
.LFB2053:
.cfi_startproc
subq $264, %rsp
.cfi_def_cfa_offset 272
movss %xmm0, 12(%rsp)
movq %fs:40, %rax
movq %rax, 248(%rsp)
xorl %eax, %eax
movq %rdi, 24(%rsp)
leaq 24(%rsp), %rax
movq %rax, 160(%rsp)
movq %rsi, 32(%rsp)
leaq 32(%rsp), %rax
movq %rax, 168(%rsp)
movq %rdx, 40(%rsp)
leaq 40(%rsp), %rax
movq %rax, 176(%rsp)
movq %rcx, 48(%rsp)
leaq 48(%rsp), %rax
movq %rax, 184(%rsp)
movq %r8, 56(%rsp)
leaq 56(%rsp), %rax
movq %rax, 192(%rsp)
movq %r9, 64(%rsp)
leaq 64(%rsp), %rax
movq %rax, 200(%rsp)
movq 272(%rsp), %rax
movq %rax, 72(%rsp)
leaq 72(%rsp), %rax
movq %rax, 208(%rsp)
movq 280(%rsp), %rax
movq %rax, 80(%rsp)
leaq 80(%rsp), %rax
movq %rax, 216(%rsp)
movq 288(%rsp), %rax
movq %rax, 88(%rsp)
leaq 88(%rsp), %rax
movq %rax, 224(%rsp)
leaq 12(%rsp), %rax
movq %rax, 232(%rsp)
movl $1, 112(%rsp)
movl $1, 116(%rsp)
movl $1, 120(%rsp)
movl $1, 124(%rsp)
movl $1, 128(%rsp)
movl $1, 132(%rsp)
leaq 104(%rsp), %rcx
leaq 96(%rsp), %rdx
leaq 124(%rsp), %rsi
leaq 112(%rsp), %rdi
call __cudaPopCallConfiguration@PLT
testl %eax, %eax
je .L5
.L1:
movq 248(%rsp), %rax
subq %fs:40, %rax
jne .L6
addq $264, %rsp
.cfi_remember_state
.cfi_def_cfa_offset 8
ret
.L5:
.cfi_restore_state
pushq 104(%rsp)
.cfi_def_cfa_offset 280
pushq 104(%rsp)
.cfi_def_cfa_offset 288
leaq 176(%rsp), %r9
movq 140(%rsp), %rcx
movl 148(%rsp), %r8d
movq 128(%rsp), %rsi
movl 136(%rsp), %edx
leaq _ZL15shallow2dv_fluxPfS_S_S_S_S_PKfS1_S1_f(%rip), %rdi
call cudaLaunchKernel@PLT
addq $16, %rsp
.cfi_def_cfa_offset 272
jmp .L1
.L6:
call __stack_chk_fail@PLT
.cfi_endproc
.LFE2053:
.size _ZL55__device_stub__Z15shallow2dv_fluxPfS_S_S_S_S_PKfS1_S1_fPfS_S_S_S_S_PKfS1_S1_f, .-_ZL55__device_stub__Z15shallow2dv_fluxPfS_S_S_S_S_PKfS1_S1_fPfS_S_S_S_S_PKfS1_S1_f
.type _ZL15shallow2dv_fluxPfS_S_S_S_S_PKfS1_S1_f, @function
_ZL15shallow2dv_fluxPfS_S_S_S_S_PKfS1_S1_f:
.LFB2054:
.cfi_startproc
endbr64
subq $16, %rsp
.cfi_def_cfa_offset 24
pushq 40(%rsp)
.cfi_def_cfa_offset 32
pushq 40(%rsp)
.cfi_def_cfa_offset 40
pushq 40(%rsp)
.cfi_def_cfa_offset 48
call _ZL55__device_stub__Z15shallow2dv_fluxPfS_S_S_S_S_PKfS1_S1_fPfS_S_S_S_S_PKfS1_S1_f
addq $40, %rsp
.cfi_def_cfa_offset 8
ret
.cfi_endproc
.LFE2054:
.size _ZL15shallow2dv_fluxPfS_S_S_S_S_PKfS1_S1_f, .-_ZL15shallow2dv_fluxPfS_S_S_S_S_PKfS1_S1_f
.type _ZL46__device_stub__Z16shallow2dv_speedPfPKfS1_S1_fPfPKfS1_S1_f, @function
_ZL46__device_stub__Z16shallow2dv_speedPfPKfS1_S1_fPfPKfS1_S1_f:
.LFB2055:
.cfi_startproc
subq $168, %rsp
.cfi_def_cfa_offset 176
movss %xmm0, 12(%rsp)
movq %fs:40, %rax
movq %rax, 152(%rsp)
xorl %eax, %eax
movq %rdi, 16(%rsp)
leaq 16(%rsp), %rax
movq %rax, 112(%rsp)
movq %rsi, 24(%rsp)
leaq 24(%rsp), %rax
movq %rax, 120(%rsp)
movq %rdx, 32(%rsp)
leaq 32(%rsp), %rax
movq %rax, 128(%rsp)
movq %rcx, 40(%rsp)
leaq 40(%rsp), %rax
movq %rax, 136(%rsp)
leaq 12(%rsp), %rax
movq %rax, 144(%rsp)
movl $1, 64(%rsp)
movl $1, 68(%rsp)
movl $1, 72(%rsp)
movl $1, 76(%rsp)
movl $1, 80(%rsp)
movl $1, 84(%rsp)
leaq 56(%rsp), %rcx
leaq 48(%rsp), %rdx
leaq 76(%rsp), %rsi
leaq 64(%rsp), %rdi
call __cudaPopCallConfiguration@PLT
testl %eax, %eax
je .L13
.L9:
movq 152(%rsp), %rax
subq %fs:40, %rax
jne .L14
addq $168, %rsp
.cfi_remember_state
.cfi_def_cfa_offset 8
ret
.L13:
.cfi_restore_state
pushq 56(%rsp)
.cfi_def_cfa_offset 184
pushq 56(%rsp)
.cfi_def_cfa_offset 192
leaq 128(%rsp), %r9
movq 92(%rsp), %rcx
movl 100(%rsp), %r8d
movq 80(%rsp), %rsi
movl 88(%rsp), %edx
leaq _ZL16shallow2dv_speedPfPKfS1_S1_f(%rip), %rdi
call cudaLaunchKernel@PLT
addq $16, %rsp
.cfi_def_cfa_offset 176
jmp .L9
.L14:
call __stack_chk_fail@PLT
.cfi_endproc
.LFE2055:
.size _ZL46__device_stub__Z16shallow2dv_speedPfPKfS1_S1_fPfPKfS1_S1_f, .-_ZL46__device_stub__Z16shallow2dv_speedPfPKfS1_S1_fPfPKfS1_S1_f
.type _ZL16shallow2dv_speedPfPKfS1_S1_f, @function
_ZL16shallow2dv_speedPfPKfS1_S1_f:
.LFB2056:
.cfi_startproc
endbr64
subq $8, %rsp
.cfi_def_cfa_offset 16
call _ZL46__device_stub__Z16shallow2dv_speedPfPKfS1_S1_fPfPKfS1_S1_f
addq $8, %rsp
.cfi_def_cfa_offset 8
ret
.cfi_endproc
.LFE2056:
.size _ZL16shallow2dv_speedPfPKfS1_S1_f, .-_ZL16shallow2dv_speedPfPKfS1_S1_f
.type _ZL26__cudaUnregisterBinaryUtilv, @function
_ZL26__cudaUnregisterBinaryUtilv:
.LFB2031:
.cfi_startproc
endbr64
subq $8, %rsp
.cfi_def_cfa_offset 16
movq _ZL20__cudaFatCubinHandle(%rip), %rdi
call __cudaUnregisterFatBinary@PLT
addq $8, %rsp
.cfi_def_cfa_offset 8
ret
.cfi_endproc
.LFE2031:
.size _ZL26__cudaUnregisterBinaryUtilv, .-_ZL26__cudaUnregisterBinaryUtilv
.globl shallow2d_flux_cu
.type shallow2d_flux_cu, @function
shallow2d_flux_cu:
.LFB2027:
.cfi_startproc
endbr64
pushq %r15
.cfi_def_cfa_offset 16
.cfi_offset 15, -16
pushq %r14
.cfi_def_cfa_offset 24
.cfi_offset 14, -24
pushq %r13
.cfi_def_cfa_offset 32
.cfi_offset 13, -32
pushq %r12
.cfi_def_cfa_offset 40
.cfi_offset 12, -40
pushq %rbp
.cfi_def_cfa_offset 48
.cfi_offset 6, -48
pushq %rbx
.cfi_def_cfa_offset 56
.cfi_offset 3, -56
subq $72, %rsp
.cfi_def_cfa_offset 128
movq %rdi, 8(%rsp)
movq %rsi, (%rsp)
movq %rdx, 16(%rsp)
movl %ecx, %r13d
movl %r8d, %r12d
movl %r9d, 28(%rsp)
movl %ecx, %ebx
imull %r8d, %ebx
movslq %ebx, %rbx
salq $2, %rbx
movslq %r9d, %rbp
salq $2, %rbp
leaq (%rdx,%rbp), %r14
movl $3, %ecx
movq %rbx, %rdx
movq %r14, %rsi
call cudaMemcpy@PLT
leaq (%r14,%rbp), %r15
movl $3, %ecx
movq %rbx, %rdx
movq %r15, %rsi
movq (%rsp), %rdi
call cudaMemcpy@PLT
movl %r13d, 52(%rsp)
movl $1, 56(%rsp)
movl %r12d, 40(%rsp)
movl $1, 44(%rsp)
movl $0, %r9d
movl $0, %r8d
movq 52(%rsp), %rdx
movl $1, %ecx
movq 40(%rsp), %rdi
movl $1, %esi
call __cudaPushCallConfiguration@PLT
testl %eax, %eax
je .L22
.L19:
addq $72, %rsp
.cfi_remember_state
.cfi_def_cfa_offset 56
popq %rbx
.cfi_def_cfa_offset 48
popq %rbp
.cfi_def_cfa_offset 40
popq %r12
.cfi_def_cfa_offset 32
popq %r13
.cfi_def_cfa_offset 24
popq %r14
.cfi_def_cfa_offset 16
popq %r15
.cfi_def_cfa_offset 8
ret
.L22:
.cfi_restore_state
movl 28(%rsp), %eax
addl %eax, %eax
cltq
salq $2, %rax
movq 8(%rsp), %rdi
leaq (%rdi,%rax), %rdx
leaq (%rdi,%rbp), %rsi
subq $8, %rsp
.cfi_def_cfa_offset 136
pushq %r15
.cfi_def_cfa_offset 144
pushq %r14
.cfi_def_cfa_offset 152
pushq 40(%rsp)
.cfi_def_cfa_offset 160
movss .LC0(%rip), %xmm0
movq 32(%rsp), %rcx
leaq (%rcx,%rax), %r9
leaq (%rcx,%rbp), %r8
call _ZL55__device_stub__Z15shallow2dv_fluxPfS_S_S_S_S_PKfS1_S1_fPfS_S_S_S_S_PKfS1_S1_f
addq $32, %rsp
.cfi_def_cfa_offset 128
jmp .L19
.cfi_endproc
.LFE2027:
.size shallow2d_flux_cu, .-shallow2d_flux_cu
.globl shallow2d_speed_cu
.type shallow2d_speed_cu, @function
shallow2d_speed_cu:
.LFB2028:
.cfi_startproc
endbr64
pushq %r12
.cfi_def_cfa_offset 16
.cfi_offset 12, -16
pushq %rbp
.cfi_def_cfa_offset 24
.cfi_offset 6, -24
pushq %rbx
.cfi_def_cfa_offset 32
.cfi_offset 3, -32
subq $32, %rsp
.cfi_def_cfa_offset 64
movq %rdi, %rbp
movq %rsi, %rbx
movl %r8d, %r12d
movl %edx, 20(%rsp)
movl $1, 24(%rsp)
movl %ecx, 8(%rsp)
movl $1, 12(%rsp)
movl $0, %r9d
movl $0, %r8d
movq 20(%rsp), %rdx
movl $1, %ecx
movq 8(%rsp), %rdi
movl $1, %esi
call __cudaPushCallConfiguration@PLT
testl %eax, %eax
je .L26
.L23:
addq $32, %rsp
.cfi_remember_state
.cfi_def_cfa_offset 32
popq %rbx
.cfi_def_cfa_offset 24
popq %rbp
.cfi_def_cfa_offset 16
popq %r12
.cfi_def_cfa_offset 8
ret
.L26:
.cfi_restore_state
leal (%r12,%r12), %eax
cltq
leaq (%rbx,%rax,4), %rcx
movslq %r12d, %r8
leaq (%rbx,%r8,4), %rdx
movss .LC0(%rip), %xmm0
movq %rbx, %rsi
movq %rbp, %rdi
call _ZL46__device_stub__Z16shallow2dv_speedPfPKfS1_S1_fPfPKfS1_S1_f
jmp .L23
.cfi_endproc
.LFE2028:
.size shallow2d_speed_cu, .-shallow2d_speed_cu
.section .rodata.str1.8,"aMS",@progbits,1
.align 8
.LC1:
.string "_Z16shallow2dv_speedPfPKfS1_S1_f"
.align 8
.LC2:
.string "_Z15shallow2dv_fluxPfS_S_S_S_S_PKfS1_S1_f"
.section .rodata.str1.1,"aMS",@progbits,1
.LC3:
.string "g"
.text
.type _ZL24__sti____cudaRegisterAllv, @function
_ZL24__sti____cudaRegisterAllv:
.LFB2058:
.cfi_startproc
endbr64
pushq %rbx
.cfi_def_cfa_offset 16
.cfi_offset 3, -16
leaq _ZL15__fatDeviceText(%rip), %rdi
call __cudaRegisterFatBinary@PLT
movq %rax, %rbx
movq %rax, _ZL20__cudaFatCubinHandle(%rip)
pushq $0
.cfi_def_cfa_offset 24
pushq $0
.cfi_def_cfa_offset 32
pushq $0
.cfi_def_cfa_offset 40
pushq $0
.cfi_def_cfa_offset 48
movl $0, %r9d
movl $-1, %r8d
leaq .LC1(%rip), %rdx
movq %rdx, %rcx
leaq _ZL16shallow2dv_speedPfPKfS1_S1_f(%rip), %rsi
movq %rax, %rdi
call __cudaRegisterFunction@PLT
addq $32, %rsp
.cfi_def_cfa_offset 16
pushq $0
.cfi_def_cfa_offset 24
pushq $0
.cfi_def_cfa_offset 32
pushq $0
.cfi_def_cfa_offset 40
pushq $0
.cfi_def_cfa_offset 48
movl $0, %r9d
movl $-1, %r8d
leaq .LC2(%rip), %rdx
movq %rdx, %rcx
leaq _ZL15shallow2dv_fluxPfS_S_S_S_S_PKfS1_S1_f(%rip), %rsi
movq %rbx, %rdi
call __cudaRegisterFunction@PLT
addq $32, %rsp
.cfi_def_cfa_offset 16
pushq $0
.cfi_def_cfa_offset 24
pushq $1
.cfi_def_cfa_offset 32
movl $4, %r9d
movl $0, %r8d
leaq .LC3(%rip), %rdx
movq %rdx, %rcx
leaq _ZL1g(%rip), %rsi
movq %rbx, %rdi
call __cudaRegisterVar@PLT
addq $16, %rsp
.cfi_def_cfa_offset 16
movq _ZL20__cudaFatCubinHandle(%rip), %rdi
call __cudaRegisterFatBinaryEnd@PLT
leaq _ZL26__cudaUnregisterBinaryUtilv(%rip), %rdi
call atexit@PLT
popq %rbx
.cfi_def_cfa_offset 8
ret
.cfi_endproc
.LFE2058:
.size _ZL24__sti____cudaRegisterAllv, .-_ZL24__sti____cudaRegisterAllv
.section .init_array,"aw"
.align 8
.quad _ZL24__sti____cudaRegisterAllv
.section .nvFatBinSegment,"aw"
.align 8
.type _ZL15__fatDeviceText, @object
.size _ZL15__fatDeviceText, 24
_ZL15__fatDeviceText:
.long 1180844977
.long 1
.quad fatbinData
.quad 0
.local _ZL20__cudaFatCubinHandle
.comm _ZL20__cudaFatCubinHandle,8,8
.section .rodata
.align 4
.type _ZL1g, @object
.size _ZL1g, 4
_ZL1g:
.long 1092406477
.section .rodata.cst4,"aM",@progbits,4
.align 4
.LC0:
.long 1092406477
.ident "GCC: (Ubuntu 13.3.0-6ubuntu2~24.04) 13.3.0"
.section .note.GNU-stack,"",@progbits
.section .note.gnu.property,"a"
.align 8
.long 1f - 0f
.long 4f - 1f
.long 5
0:
.string "GNU"
1:
.align 8
.long 0xc0000002
.long 3f - 2f
2:
.long 0x3
3:
.align 8
4: | .text
.file "shallow2d.hip"
.type __hip_cuid_,@object # @__hip_cuid_
.bss
.globl __hip_cuid_
__hip_cuid_:
.byte 0 # 0x0
.size __hip_cuid_, 1
.section ".linker-options","e",@llvm_linker_options
.ident "AMD clang version 18.0.0git (https://github.com/RadeonOpenCompute/llvm-project roc-6.3.2 25012 e5bf7e55c91490b07c49d8960fa7983d864936c4)"
.section ".note.GNU-stack","",@progbits
.addrsig
.addrsig_sym __hip_cuid_ |
You are a helpful coding assistant specialized in converting CUDA source code to CUDA device assembly. | #include "includes.h"
__global__ void kSetOnes(float *dest, int count){
for (int i = threadIdx.x; i < count; i += blockDim.x) {
dest[i] = 1;
}
} | code for sm_80
Function : _Z8kSetOnesPfi
.headerflags @"EF_CUDA_TEXMODE_UNIFIED EF_CUDA_64BIT_ADDRESS EF_CUDA_SM80 EF_CUDA_VIRTUAL_SM(EF_CUDA_SM80)"
/*0000*/ IMAD.MOV.U32 R1, RZ, RZ, c[0x0][0x28] ; /* 0x00000a00ff017624 */
/* 0x000fe400078e00ff */
/*0010*/ S2R R0, SR_TID.X ; /* 0x0000000000007919 */
/* 0x000e240000002100 */
/*0020*/ ISETP.GE.AND P0, PT, R0, c[0x0][0x168], PT ; /* 0x00005a0000007a0c */
/* 0x001fda0003f06270 */
/*0030*/ @P0 EXIT ; /* 0x000000000000094d */
/* 0x000fea0003800000 */
/*0040*/ HFMA2.MMA R5, -RZ, RZ, 0, 2.384185791015625e-07 ; /* 0x00000004ff057435 */
/* 0x000fe200000001ff */
/*0050*/ IMAD.MOV.U32 R7, RZ, RZ, 0x3f800000 ; /* 0x3f800000ff077424 */
/* 0x000fe200078e00ff */
/*0060*/ ULDC.64 UR4, c[0x0][0x118] ; /* 0x0000460000047ab9 */
/* 0x000fd00000000a00 */
/*0070*/ IMAD.WIDE R2, R0.reuse, R5, c[0x0][0x160] ; /* 0x0000580000027625 */
/* 0x040fe200078e0205 */
/*0080*/ IADD3 R0, R0, c[0x0][0x0], RZ ; /* 0x0000000000007a10 */
/* 0x000fc80007ffe0ff */
/*0090*/ STG.E [R2.64], R7 ; /* 0x0000000702007986 */
/* 0x0001e2000c101904 */
/*00a0*/ ISETP.GE.AND P0, PT, R0, c[0x0][0x168], PT ; /* 0x00005a0000007a0c */
/* 0x000fda0003f06270 */
/*00b0*/ @!P0 BRA 0x70 ; /* 0xffffffb000008947 */
/* 0x001fea000383ffff */
/*00c0*/ EXIT ; /* 0x000000000000794d */
/* 0x000fea0003800000 */
/*00d0*/ BRA 0xd0; /* 0xfffffff000007947 */
/* 0x000fc0000383ffff */
/*00e0*/ NOP; /* 0x0000000000007918 */
/* 0x000fc00000000000 */
/*00f0*/ NOP; /* 0x0000000000007918 */
/* 0x000fc00000000000 */
/*0100*/ NOP; /* 0x0000000000007918 */
/* 0x000fc00000000000 */
/*0110*/ NOP; /* 0x0000000000007918 */
/* 0x000fc00000000000 */
/*0120*/ NOP; /* 0x0000000000007918 */
/* 0x000fc00000000000 */
/*0130*/ NOP; /* 0x0000000000007918 */
/* 0x000fc00000000000 */
/*0140*/ NOP; /* 0x0000000000007918 */
/* 0x000fc00000000000 */
/*0150*/ NOP; /* 0x0000000000007918 */
/* 0x000fc00000000000 */
/*0160*/ NOP; /* 0x0000000000007918 */
/* 0x000fc00000000000 */
/*0170*/ NOP; /* 0x0000000000007918 */
/* 0x000fc00000000000 */
.......... |
You are a helpful coding assistant specialized in converting CUDA source code to CUDA host assembly. | #include "includes.h"
__global__ void kSetOnes(float *dest, int count){
for (int i = threadIdx.x; i < count; i += blockDim.x) {
dest[i] = 1;
}
} | .file "tmpxft_001885af_00000000-6_kSetOnes.cudafe1.cpp"
.text
#APP
#NO_APP
.type _ZL26__cudaUnregisterBinaryUtilv, @function
_ZL26__cudaUnregisterBinaryUtilv:
.LFB2029:
.cfi_startproc
endbr64
subq $8, %rsp
.cfi_def_cfa_offset 16
movq _ZL20__cudaFatCubinHandle(%rip), %rdi
call __cudaUnregisterFatBinary@PLT
addq $8, %rsp
.cfi_def_cfa_offset 8
ret
.cfi_endproc
.LFE2029:
.size _ZL26__cudaUnregisterBinaryUtilv, .-_ZL26__cudaUnregisterBinaryUtilv
.globl _Z28__device_stub__Z8kSetOnesPfiPfi
.type _Z28__device_stub__Z8kSetOnesPfiPfi, @function
_Z28__device_stub__Z8kSetOnesPfiPfi:
.LFB2051:
.cfi_startproc
endbr64
subq $120, %rsp
.cfi_def_cfa_offset 128
movq %rdi, 8(%rsp)
movl %esi, 4(%rsp)
movq %fs:40, %rax
movq %rax, 104(%rsp)
xorl %eax, %eax
leaq 8(%rsp), %rax
movq %rax, 80(%rsp)
leaq 4(%rsp), %rax
movq %rax, 88(%rsp)
movl $1, 32(%rsp)
movl $1, 36(%rsp)
movl $1, 40(%rsp)
movl $1, 44(%rsp)
movl $1, 48(%rsp)
movl $1, 52(%rsp)
leaq 24(%rsp), %rcx
leaq 16(%rsp), %rdx
leaq 44(%rsp), %rsi
leaq 32(%rsp), %rdi
call __cudaPopCallConfiguration@PLT
testl %eax, %eax
je .L7
.L3:
movq 104(%rsp), %rax
subq %fs:40, %rax
jne .L8
addq $120, %rsp
.cfi_remember_state
.cfi_def_cfa_offset 8
ret
.L7:
.cfi_restore_state
pushq 24(%rsp)
.cfi_def_cfa_offset 136
pushq 24(%rsp)
.cfi_def_cfa_offset 144
leaq 96(%rsp), %r9
movq 60(%rsp), %rcx
movl 68(%rsp), %r8d
movq 48(%rsp), %rsi
movl 56(%rsp), %edx
leaq _Z8kSetOnesPfi(%rip), %rdi
call cudaLaunchKernel@PLT
addq $16, %rsp
.cfi_def_cfa_offset 128
jmp .L3
.L8:
call __stack_chk_fail@PLT
.cfi_endproc
.LFE2051:
.size _Z28__device_stub__Z8kSetOnesPfiPfi, .-_Z28__device_stub__Z8kSetOnesPfiPfi
.globl _Z8kSetOnesPfi
.type _Z8kSetOnesPfi, @function
_Z8kSetOnesPfi:
.LFB2052:
.cfi_startproc
endbr64
subq $8, %rsp
.cfi_def_cfa_offset 16
call _Z28__device_stub__Z8kSetOnesPfiPfi
addq $8, %rsp
.cfi_def_cfa_offset 8
ret
.cfi_endproc
.LFE2052:
.size _Z8kSetOnesPfi, .-_Z8kSetOnesPfi
.section .rodata.str1.1,"aMS",@progbits,1
.LC0:
.string "_Z8kSetOnesPfi"
.text
.type _ZL24__sti____cudaRegisterAllv, @function
_ZL24__sti____cudaRegisterAllv:
.LFB2054:
.cfi_startproc
endbr64
subq $8, %rsp
.cfi_def_cfa_offset 16
leaq _ZL15__fatDeviceText(%rip), %rdi
call __cudaRegisterFatBinary@PLT
movq %rax, %rdi
movq %rax, _ZL20__cudaFatCubinHandle(%rip)
pushq $0
.cfi_def_cfa_offset 24
pushq $0
.cfi_def_cfa_offset 32
pushq $0
.cfi_def_cfa_offset 40
pushq $0
.cfi_def_cfa_offset 48
movl $0, %r9d
movl $-1, %r8d
leaq .LC0(%rip), %rdx
movq %rdx, %rcx
leaq _Z8kSetOnesPfi(%rip), %rsi
call __cudaRegisterFunction@PLT
addq $32, %rsp
.cfi_def_cfa_offset 16
movq _ZL20__cudaFatCubinHandle(%rip), %rdi
call __cudaRegisterFatBinaryEnd@PLT
leaq _ZL26__cudaUnregisterBinaryUtilv(%rip), %rdi
call atexit@PLT
addq $8, %rsp
.cfi_def_cfa_offset 8
ret
.cfi_endproc
.LFE2054:
.size _ZL24__sti____cudaRegisterAllv, .-_ZL24__sti____cudaRegisterAllv
.section .init_array,"aw"
.align 8
.quad _ZL24__sti____cudaRegisterAllv
.section .nvFatBinSegment,"aw"
.align 8
.type _ZL15__fatDeviceText, @object
.size _ZL15__fatDeviceText, 24
_ZL15__fatDeviceText:
.long 1180844977
.long 1
.quad fatbinData
.quad 0
.local _ZL20__cudaFatCubinHandle
.comm _ZL20__cudaFatCubinHandle,8,8
.ident "GCC: (Ubuntu 13.3.0-6ubuntu2~24.04) 13.3.0"
.section .note.GNU-stack,"",@progbits
.section .note.gnu.property,"a"
.align 8
.long 1f - 0f
.long 4f - 1f
.long 5
0:
.string "GNU"
1:
.align 8
.long 0xc0000002
.long 3f - 2f
2:
.long 0x3
3:
.align 8
4: |
You are a helpful coding assistant specialized in converting CUDA source code to HIP/AMD source code. | #include "includes.h"
__global__ void kSetOnes(float *dest, int count){
for (int i = threadIdx.x; i < count; i += blockDim.x) {
dest[i] = 1;
}
} | #include <hip/hip_runtime.h>
#include "includes.h"
__global__ void kSetOnes(float *dest, int count){
for (int i = threadIdx.x; i < count; i += blockDim.x) {
dest[i] = 1;
}
} |
You are a helpful coding assistant specialized in converting HIP source code to AMD device assembly. | #include <hip/hip_runtime.h>
#include "includes.h"
__global__ void kSetOnes(float *dest, int count){
for (int i = threadIdx.x; i < count; i += blockDim.x) {
dest[i] = 1;
}
} | .text
.amdgcn_target "amdgcn-amd-amdhsa--gfx1100"
.protected _Z8kSetOnesPfi
.globl _Z8kSetOnesPfi
.p2align 8
.type _Z8kSetOnesPfi,@function
_Z8kSetOnesPfi:
s_load_b32 s4, s[0:1], 0x8
s_mov_b32 s2, exec_lo
s_waitcnt lgkmcnt(0)
v_cmpx_gt_i32_e64 s4, v0
s_cbranch_execz .LBB0_3
s_clause 0x1
s_load_b32 s5, s[0:1], 0x1c
s_load_b64 s[2:3], s[0:1], 0x0
v_mov_b32_e32 v2, 1.0
s_waitcnt lgkmcnt(0)
s_and_b32 s1, s5, 0xffff
s_mov_b32 s5, 0
.LBB0_2:
v_ashrrev_i32_e32 v1, 31, v0
s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
v_lshlrev_b64 v[3:4], 2, v[0:1]
v_add_nc_u32_e32 v0, s1, v0
v_cmp_le_i32_e32 vcc_lo, s4, v0
s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_1)
v_add_co_u32 v3, s0, s2, v3
v_add_co_ci_u32_e64 v4, s0, s3, v4, s0
s_or_b32 s5, vcc_lo, s5
global_store_b32 v[3:4], v2, off
s_and_not1_b32 exec_lo, exec_lo, s5
s_cbranch_execnz .LBB0_2
.LBB0_3:
s_nop 0
s_sendmsg sendmsg(MSG_DEALLOC_VGPRS)
s_endpgm
.section .rodata,"a",@progbits
.p2align 6, 0x0
.amdhsa_kernel _Z8kSetOnesPfi
.amdhsa_group_segment_fixed_size 0
.amdhsa_private_segment_fixed_size 0
.amdhsa_kernarg_size 272
.amdhsa_user_sgpr_count 15
.amdhsa_user_sgpr_dispatch_ptr 0
.amdhsa_user_sgpr_queue_ptr 0
.amdhsa_user_sgpr_kernarg_segment_ptr 1
.amdhsa_user_sgpr_dispatch_id 0
.amdhsa_user_sgpr_private_segment_size 0
.amdhsa_wavefront_size32 1
.amdhsa_uses_dynamic_stack 0
.amdhsa_enable_private_segment 0
.amdhsa_system_sgpr_workgroup_id_x 1
.amdhsa_system_sgpr_workgroup_id_y 0
.amdhsa_system_sgpr_workgroup_id_z 0
.amdhsa_system_sgpr_workgroup_info 0
.amdhsa_system_vgpr_workitem_id 0
.amdhsa_next_free_vgpr 5
.amdhsa_next_free_sgpr 6
.amdhsa_float_round_mode_32 0
.amdhsa_float_round_mode_16_64 0
.amdhsa_float_denorm_mode_32 3
.amdhsa_float_denorm_mode_16_64 3
.amdhsa_dx10_clamp 1
.amdhsa_ieee_mode 1
.amdhsa_fp16_overflow 0
.amdhsa_workgroup_processor_mode 1
.amdhsa_memory_ordered 1
.amdhsa_forward_progress 0
.amdhsa_shared_vgpr_count 0
.amdhsa_exception_fp_ieee_invalid_op 0
.amdhsa_exception_fp_denorm_src 0
.amdhsa_exception_fp_ieee_div_zero 0
.amdhsa_exception_fp_ieee_overflow 0
.amdhsa_exception_fp_ieee_underflow 0
.amdhsa_exception_fp_ieee_inexact 0
.amdhsa_exception_int_div_zero 0
.end_amdhsa_kernel
.text
.Lfunc_end0:
.size _Z8kSetOnesPfi, .Lfunc_end0-_Z8kSetOnesPfi
.section .AMDGPU.csdata,"",@progbits
.text
.p2alignl 7, 3214868480
.fill 96, 4, 3214868480
.type __hip_cuid_,@object
.section .bss,"aw",@nobits
.globl __hip_cuid_
__hip_cuid_:
.byte 0
.size __hip_cuid_, 1
.ident "AMD clang version 18.0.0git (https://github.com/RadeonOpenCompute/llvm-project roc-6.3.2 25012 e5bf7e55c91490b07c49d8960fa7983d864936c4)"
.section ".note.GNU-stack","",@progbits
.addrsig
.addrsig_sym __hip_cuid_
.amdgpu_metadata
---
amdhsa.kernels:
- .args:
- .address_space: global
.offset: 0
.size: 8
.value_kind: global_buffer
- .offset: 8
.size: 4
.value_kind: by_value
- .offset: 16
.size: 4
.value_kind: hidden_block_count_x
- .offset: 20
.size: 4
.value_kind: hidden_block_count_y
- .offset: 24
.size: 4
.value_kind: hidden_block_count_z
- .offset: 28
.size: 2
.value_kind: hidden_group_size_x
- .offset: 30
.size: 2
.value_kind: hidden_group_size_y
- .offset: 32
.size: 2
.value_kind: hidden_group_size_z
- .offset: 34
.size: 2
.value_kind: hidden_remainder_x
- .offset: 36
.size: 2
.value_kind: hidden_remainder_y
- .offset: 38
.size: 2
.value_kind: hidden_remainder_z
- .offset: 56
.size: 8
.value_kind: hidden_global_offset_x
- .offset: 64
.size: 8
.value_kind: hidden_global_offset_y
- .offset: 72
.size: 8
.value_kind: hidden_global_offset_z
- .offset: 80
.size: 2
.value_kind: hidden_grid_dims
.group_segment_fixed_size: 0
.kernarg_segment_align: 8
.kernarg_segment_size: 272
.language: OpenCL C
.language_version:
- 2
- 0
.max_flat_workgroup_size: 1024
.name: _Z8kSetOnesPfi
.private_segment_fixed_size: 0
.sgpr_count: 8
.sgpr_spill_count: 0
.symbol: _Z8kSetOnesPfi.kd
.uniform_work_group_size: 1
.uses_dynamic_stack: false
.vgpr_count: 5
.vgpr_spill_count: 0
.wavefront_size: 32
.workgroup_processor_mode: 1
amdhsa.target: amdgcn-amd-amdhsa--gfx1100
amdhsa.version:
- 1
- 2
...
.end_amdgpu_metadata |
You are a helpful coding assistant specialized in converting HIP source code to AMD host assembly. | #include <hip/hip_runtime.h>
#include "includes.h"
__global__ void kSetOnes(float *dest, int count){
for (int i = threadIdx.x; i < count; i += blockDim.x) {
dest[i] = 1;
}
} | .text
.file "kSetOnes.hip"
.globl _Z23__device_stub__kSetOnesPfi # -- Begin function _Z23__device_stub__kSetOnesPfi
.p2align 4, 0x90
.type _Z23__device_stub__kSetOnesPfi,@function
_Z23__device_stub__kSetOnesPfi: # @_Z23__device_stub__kSetOnesPfi
.cfi_startproc
# %bb.0:
subq $88, %rsp
.cfi_def_cfa_offset 96
movq %rdi, 56(%rsp)
movl %esi, 4(%rsp)
leaq 56(%rsp), %rax
movq %rax, 64(%rsp)
leaq 4(%rsp), %rax
movq %rax, 72(%rsp)
leaq 40(%rsp), %rdi
leaq 24(%rsp), %rsi
leaq 16(%rsp), %rdx
leaq 8(%rsp), %rcx
callq __hipPopCallConfiguration
movq 40(%rsp), %rsi
movl 48(%rsp), %edx
movq 24(%rsp), %rcx
movl 32(%rsp), %r8d
leaq 64(%rsp), %r9
movl $_Z8kSetOnesPfi, %edi
pushq 8(%rsp)
.cfi_adjust_cfa_offset 8
pushq 24(%rsp)
.cfi_adjust_cfa_offset 8
callq hipLaunchKernel
addq $104, %rsp
.cfi_adjust_cfa_offset -104
retq
.Lfunc_end0:
.size _Z23__device_stub__kSetOnesPfi, .Lfunc_end0-_Z23__device_stub__kSetOnesPfi
.cfi_endproc
# -- End function
.p2align 4, 0x90 # -- Begin function __hip_module_ctor
.type __hip_module_ctor,@function
__hip_module_ctor: # @__hip_module_ctor
.cfi_startproc
# %bb.0:
subq $40, %rsp
.cfi_def_cfa_offset 48
cmpq $0, __hip_gpubin_handle(%rip)
jne .LBB1_2
# %bb.1:
movl $__hip_fatbin_wrapper, %edi
callq __hipRegisterFatBinary
movq %rax, __hip_gpubin_handle(%rip)
.LBB1_2:
movq __hip_gpubin_handle(%rip), %rdi
xorps %xmm0, %xmm0
movups %xmm0, 16(%rsp)
movups %xmm0, (%rsp)
movl $_Z8kSetOnesPfi, %esi
movl $.L__unnamed_1, %edx
movl $.L__unnamed_1, %ecx
movl $-1, %r8d
xorl %r9d, %r9d
callq __hipRegisterFunction
movl $__hip_module_dtor, %edi
addq $40, %rsp
.cfi_def_cfa_offset 8
jmp atexit # TAILCALL
.Lfunc_end1:
.size __hip_module_ctor, .Lfunc_end1-__hip_module_ctor
.cfi_endproc
# -- End function
.p2align 4, 0x90 # -- Begin function __hip_module_dtor
.type __hip_module_dtor,@function
__hip_module_dtor: # @__hip_module_dtor
.cfi_startproc
# %bb.0:
movq __hip_gpubin_handle(%rip), %rdi
testq %rdi, %rdi
je .LBB2_2
# %bb.1:
pushq %rax
.cfi_def_cfa_offset 16
callq __hipUnregisterFatBinary
movq $0, __hip_gpubin_handle(%rip)
addq $8, %rsp
.cfi_def_cfa_offset 8
.LBB2_2:
retq
.Lfunc_end2:
.size __hip_module_dtor, .Lfunc_end2-__hip_module_dtor
.cfi_endproc
# -- End function
.type _Z8kSetOnesPfi,@object # @_Z8kSetOnesPfi
.section .rodata,"a",@progbits
.globl _Z8kSetOnesPfi
.p2align 3, 0x0
_Z8kSetOnesPfi:
.quad _Z23__device_stub__kSetOnesPfi
.size _Z8kSetOnesPfi, 8
.type .L__unnamed_1,@object # @0
.section .rodata.str1.1,"aMS",@progbits,1
.L__unnamed_1:
.asciz "_Z8kSetOnesPfi"
.size .L__unnamed_1, 15
.type __hip_fatbin_wrapper,@object # @__hip_fatbin_wrapper
.section .hipFatBinSegment,"a",@progbits
.p2align 3, 0x0
__hip_fatbin_wrapper:
.long 1212764230 # 0x48495046
.long 1 # 0x1
.quad __hip_fatbin
.quad 0
.size __hip_fatbin_wrapper, 24
.type __hip_gpubin_handle,@object # @__hip_gpubin_handle
.local __hip_gpubin_handle
.comm __hip_gpubin_handle,8,8
.section .init_array,"aw",@init_array
.p2align 3, 0x0
.quad __hip_module_ctor
.type __hip_cuid_,@object # @__hip_cuid_
.bss
.globl __hip_cuid_
__hip_cuid_:
.byte 0 # 0x0
.size __hip_cuid_, 1
.section ".linker-options","e",@llvm_linker_options
.ident "AMD clang version 18.0.0git (https://github.com/RadeonOpenCompute/llvm-project roc-6.3.2 25012 e5bf7e55c91490b07c49d8960fa7983d864936c4)"
.section ".note.GNU-stack","",@progbits
.addrsig
.addrsig_sym _Z23__device_stub__kSetOnesPfi
.addrsig_sym __hip_module_ctor
.addrsig_sym __hip_module_dtor
.addrsig_sym _Z8kSetOnesPfi
.addrsig_sym __hip_fatbin
.addrsig_sym __hip_fatbin_wrapper
.addrsig_sym __hip_cuid_ |
You are a helpful coding assistant specialized in converting from CUDA device assembly to AMD device assembly. | code for sm_80
Function : _Z8kSetOnesPfi
.headerflags @"EF_CUDA_TEXMODE_UNIFIED EF_CUDA_64BIT_ADDRESS EF_CUDA_SM80 EF_CUDA_VIRTUAL_SM(EF_CUDA_SM80)"
/*0000*/ IMAD.MOV.U32 R1, RZ, RZ, c[0x0][0x28] ; /* 0x00000a00ff017624 */
/* 0x000fe400078e00ff */
/*0010*/ S2R R0, SR_TID.X ; /* 0x0000000000007919 */
/* 0x000e240000002100 */
/*0020*/ ISETP.GE.AND P0, PT, R0, c[0x0][0x168], PT ; /* 0x00005a0000007a0c */
/* 0x001fda0003f06270 */
/*0030*/ @P0 EXIT ; /* 0x000000000000094d */
/* 0x000fea0003800000 */
/*0040*/ HFMA2.MMA R5, -RZ, RZ, 0, 2.384185791015625e-07 ; /* 0x00000004ff057435 */
/* 0x000fe200000001ff */
/*0050*/ IMAD.MOV.U32 R7, RZ, RZ, 0x3f800000 ; /* 0x3f800000ff077424 */
/* 0x000fe200078e00ff */
/*0060*/ ULDC.64 UR4, c[0x0][0x118] ; /* 0x0000460000047ab9 */
/* 0x000fd00000000a00 */
/*0070*/ IMAD.WIDE R2, R0.reuse, R5, c[0x0][0x160] ; /* 0x0000580000027625 */
/* 0x040fe200078e0205 */
/*0080*/ IADD3 R0, R0, c[0x0][0x0], RZ ; /* 0x0000000000007a10 */
/* 0x000fc80007ffe0ff */
/*0090*/ STG.E [R2.64], R7 ; /* 0x0000000702007986 */
/* 0x0001e2000c101904 */
/*00a0*/ ISETP.GE.AND P0, PT, R0, c[0x0][0x168], PT ; /* 0x00005a0000007a0c */
/* 0x000fda0003f06270 */
/*00b0*/ @!P0 BRA 0x70 ; /* 0xffffffb000008947 */
/* 0x001fea000383ffff */
/*00c0*/ EXIT ; /* 0x000000000000794d */
/* 0x000fea0003800000 */
/*00d0*/ BRA 0xd0; /* 0xfffffff000007947 */
/* 0x000fc0000383ffff */
/*00e0*/ NOP; /* 0x0000000000007918 */
/* 0x000fc00000000000 */
/*00f0*/ NOP; /* 0x0000000000007918 */
/* 0x000fc00000000000 */
/*0100*/ NOP; /* 0x0000000000007918 */
/* 0x000fc00000000000 */
/*0110*/ NOP; /* 0x0000000000007918 */
/* 0x000fc00000000000 */
/*0120*/ NOP; /* 0x0000000000007918 */
/* 0x000fc00000000000 */
/*0130*/ NOP; /* 0x0000000000007918 */
/* 0x000fc00000000000 */
/*0140*/ NOP; /* 0x0000000000007918 */
/* 0x000fc00000000000 */
/*0150*/ NOP; /* 0x0000000000007918 */
/* 0x000fc00000000000 */
/*0160*/ NOP; /* 0x0000000000007918 */
/* 0x000fc00000000000 */
/*0170*/ NOP; /* 0x0000000000007918 */
/* 0x000fc00000000000 */
.......... | .text
.amdgcn_target "amdgcn-amd-amdhsa--gfx1100"
.protected _Z8kSetOnesPfi
.globl _Z8kSetOnesPfi
.p2align 8
.type _Z8kSetOnesPfi,@function
_Z8kSetOnesPfi:
s_load_b32 s4, s[0:1], 0x8
s_mov_b32 s2, exec_lo
s_waitcnt lgkmcnt(0)
v_cmpx_gt_i32_e64 s4, v0
s_cbranch_execz .LBB0_3
s_clause 0x1
s_load_b32 s5, s[0:1], 0x1c
s_load_b64 s[2:3], s[0:1], 0x0
v_mov_b32_e32 v2, 1.0
s_waitcnt lgkmcnt(0)
s_and_b32 s1, s5, 0xffff
s_mov_b32 s5, 0
.LBB0_2:
v_ashrrev_i32_e32 v1, 31, v0
s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
v_lshlrev_b64 v[3:4], 2, v[0:1]
v_add_nc_u32_e32 v0, s1, v0
v_cmp_le_i32_e32 vcc_lo, s4, v0
s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_1)
v_add_co_u32 v3, s0, s2, v3
v_add_co_ci_u32_e64 v4, s0, s3, v4, s0
s_or_b32 s5, vcc_lo, s5
global_store_b32 v[3:4], v2, off
s_and_not1_b32 exec_lo, exec_lo, s5
s_cbranch_execnz .LBB0_2
.LBB0_3:
s_nop 0
s_sendmsg sendmsg(MSG_DEALLOC_VGPRS)
s_endpgm
.section .rodata,"a",@progbits
.p2align 6, 0x0
.amdhsa_kernel _Z8kSetOnesPfi
.amdhsa_group_segment_fixed_size 0
.amdhsa_private_segment_fixed_size 0
.amdhsa_kernarg_size 272
.amdhsa_user_sgpr_count 15
.amdhsa_user_sgpr_dispatch_ptr 0
.amdhsa_user_sgpr_queue_ptr 0
.amdhsa_user_sgpr_kernarg_segment_ptr 1
.amdhsa_user_sgpr_dispatch_id 0
.amdhsa_user_sgpr_private_segment_size 0
.amdhsa_wavefront_size32 1
.amdhsa_uses_dynamic_stack 0
.amdhsa_enable_private_segment 0
.amdhsa_system_sgpr_workgroup_id_x 1
.amdhsa_system_sgpr_workgroup_id_y 0
.amdhsa_system_sgpr_workgroup_id_z 0
.amdhsa_system_sgpr_workgroup_info 0
.amdhsa_system_vgpr_workitem_id 0
.amdhsa_next_free_vgpr 5
.amdhsa_next_free_sgpr 6
.amdhsa_float_round_mode_32 0
.amdhsa_float_round_mode_16_64 0
.amdhsa_float_denorm_mode_32 3
.amdhsa_float_denorm_mode_16_64 3
.amdhsa_dx10_clamp 1
.amdhsa_ieee_mode 1
.amdhsa_fp16_overflow 0
.amdhsa_workgroup_processor_mode 1
.amdhsa_memory_ordered 1
.amdhsa_forward_progress 0
.amdhsa_shared_vgpr_count 0
.amdhsa_exception_fp_ieee_invalid_op 0
.amdhsa_exception_fp_denorm_src 0
.amdhsa_exception_fp_ieee_div_zero 0
.amdhsa_exception_fp_ieee_overflow 0
.amdhsa_exception_fp_ieee_underflow 0
.amdhsa_exception_fp_ieee_inexact 0
.amdhsa_exception_int_div_zero 0
.end_amdhsa_kernel
.text
.Lfunc_end0:
.size _Z8kSetOnesPfi, .Lfunc_end0-_Z8kSetOnesPfi
.section .AMDGPU.csdata,"",@progbits
.text
.p2alignl 7, 3214868480
.fill 96, 4, 3214868480
.type __hip_cuid_,@object
.section .bss,"aw",@nobits
.globl __hip_cuid_
__hip_cuid_:
.byte 0
.size __hip_cuid_, 1
.ident "AMD clang version 18.0.0git (https://github.com/RadeonOpenCompute/llvm-project roc-6.3.2 25012 e5bf7e55c91490b07c49d8960fa7983d864936c4)"
.section ".note.GNU-stack","",@progbits
.addrsig
.addrsig_sym __hip_cuid_
.amdgpu_metadata
---
amdhsa.kernels:
- .args:
- .address_space: global
.offset: 0
.size: 8
.value_kind: global_buffer
- .offset: 8
.size: 4
.value_kind: by_value
- .offset: 16
.size: 4
.value_kind: hidden_block_count_x
- .offset: 20
.size: 4
.value_kind: hidden_block_count_y
- .offset: 24
.size: 4
.value_kind: hidden_block_count_z
- .offset: 28
.size: 2
.value_kind: hidden_group_size_x
- .offset: 30
.size: 2
.value_kind: hidden_group_size_y
- .offset: 32
.size: 2
.value_kind: hidden_group_size_z
- .offset: 34
.size: 2
.value_kind: hidden_remainder_x
- .offset: 36
.size: 2
.value_kind: hidden_remainder_y
- .offset: 38
.size: 2
.value_kind: hidden_remainder_z
- .offset: 56
.size: 8
.value_kind: hidden_global_offset_x
- .offset: 64
.size: 8
.value_kind: hidden_global_offset_y
- .offset: 72
.size: 8
.value_kind: hidden_global_offset_z
- .offset: 80
.size: 2
.value_kind: hidden_grid_dims
.group_segment_fixed_size: 0
.kernarg_segment_align: 8
.kernarg_segment_size: 272
.language: OpenCL C
.language_version:
- 2
- 0
.max_flat_workgroup_size: 1024
.name: _Z8kSetOnesPfi
.private_segment_fixed_size: 0
.sgpr_count: 8
.sgpr_spill_count: 0
.symbol: _Z8kSetOnesPfi.kd
.uniform_work_group_size: 1
.uses_dynamic_stack: false
.vgpr_count: 5
.vgpr_spill_count: 0
.wavefront_size: 32
.workgroup_processor_mode: 1
amdhsa.target: amdgcn-amd-amdhsa--gfx1100
amdhsa.version:
- 1
- 2
...
.end_amdgpu_metadata |
You are a helpful coding assistant specialized in converting from CUDA host assembly to AMD host assembly. | .file "tmpxft_001885af_00000000-6_kSetOnes.cudafe1.cpp"
.text
#APP
#NO_APP
.type _ZL26__cudaUnregisterBinaryUtilv, @function
_ZL26__cudaUnregisterBinaryUtilv:
.LFB2029:
.cfi_startproc
endbr64
subq $8, %rsp
.cfi_def_cfa_offset 16
movq _ZL20__cudaFatCubinHandle(%rip), %rdi
call __cudaUnregisterFatBinary@PLT
addq $8, %rsp
.cfi_def_cfa_offset 8
ret
.cfi_endproc
.LFE2029:
.size _ZL26__cudaUnregisterBinaryUtilv, .-_ZL26__cudaUnregisterBinaryUtilv
.globl _Z28__device_stub__Z8kSetOnesPfiPfi
.type _Z28__device_stub__Z8kSetOnesPfiPfi, @function
_Z28__device_stub__Z8kSetOnesPfiPfi:
.LFB2051:
.cfi_startproc
endbr64
subq $120, %rsp
.cfi_def_cfa_offset 128
movq %rdi, 8(%rsp)
movl %esi, 4(%rsp)
movq %fs:40, %rax
movq %rax, 104(%rsp)
xorl %eax, %eax
leaq 8(%rsp), %rax
movq %rax, 80(%rsp)
leaq 4(%rsp), %rax
movq %rax, 88(%rsp)
movl $1, 32(%rsp)
movl $1, 36(%rsp)
movl $1, 40(%rsp)
movl $1, 44(%rsp)
movl $1, 48(%rsp)
movl $1, 52(%rsp)
leaq 24(%rsp), %rcx
leaq 16(%rsp), %rdx
leaq 44(%rsp), %rsi
leaq 32(%rsp), %rdi
call __cudaPopCallConfiguration@PLT
testl %eax, %eax
je .L7
.L3:
movq 104(%rsp), %rax
subq %fs:40, %rax
jne .L8
addq $120, %rsp
.cfi_remember_state
.cfi_def_cfa_offset 8
ret
.L7:
.cfi_restore_state
pushq 24(%rsp)
.cfi_def_cfa_offset 136
pushq 24(%rsp)
.cfi_def_cfa_offset 144
leaq 96(%rsp), %r9
movq 60(%rsp), %rcx
movl 68(%rsp), %r8d
movq 48(%rsp), %rsi
movl 56(%rsp), %edx
leaq _Z8kSetOnesPfi(%rip), %rdi
call cudaLaunchKernel@PLT
addq $16, %rsp
.cfi_def_cfa_offset 128
jmp .L3
.L8:
call __stack_chk_fail@PLT
.cfi_endproc
.LFE2051:
.size _Z28__device_stub__Z8kSetOnesPfiPfi, .-_Z28__device_stub__Z8kSetOnesPfiPfi
.globl _Z8kSetOnesPfi
.type _Z8kSetOnesPfi, @function
_Z8kSetOnesPfi:
.LFB2052:
.cfi_startproc
endbr64
subq $8, %rsp
.cfi_def_cfa_offset 16
call _Z28__device_stub__Z8kSetOnesPfiPfi
addq $8, %rsp
.cfi_def_cfa_offset 8
ret
.cfi_endproc
.LFE2052:
.size _Z8kSetOnesPfi, .-_Z8kSetOnesPfi
.section .rodata.str1.1,"aMS",@progbits,1
.LC0:
.string "_Z8kSetOnesPfi"
.text
.type _ZL24__sti____cudaRegisterAllv, @function
_ZL24__sti____cudaRegisterAllv:
.LFB2054:
.cfi_startproc
endbr64
subq $8, %rsp
.cfi_def_cfa_offset 16
leaq _ZL15__fatDeviceText(%rip), %rdi
call __cudaRegisterFatBinary@PLT
movq %rax, %rdi
movq %rax, _ZL20__cudaFatCubinHandle(%rip)
pushq $0
.cfi_def_cfa_offset 24
pushq $0
.cfi_def_cfa_offset 32
pushq $0
.cfi_def_cfa_offset 40
pushq $0
.cfi_def_cfa_offset 48
movl $0, %r9d
movl $-1, %r8d
leaq .LC0(%rip), %rdx
movq %rdx, %rcx
leaq _Z8kSetOnesPfi(%rip), %rsi
call __cudaRegisterFunction@PLT
addq $32, %rsp
.cfi_def_cfa_offset 16
movq _ZL20__cudaFatCubinHandle(%rip), %rdi
call __cudaRegisterFatBinaryEnd@PLT
leaq _ZL26__cudaUnregisterBinaryUtilv(%rip), %rdi
call atexit@PLT
addq $8, %rsp
.cfi_def_cfa_offset 8
ret
.cfi_endproc
.LFE2054:
.size _ZL24__sti____cudaRegisterAllv, .-_ZL24__sti____cudaRegisterAllv
.section .init_array,"aw"
.align 8
.quad _ZL24__sti____cudaRegisterAllv
.section .nvFatBinSegment,"aw"
.align 8
.type _ZL15__fatDeviceText, @object
.size _ZL15__fatDeviceText, 24
_ZL15__fatDeviceText:
.long 1180844977
.long 1
.quad fatbinData
.quad 0
.local _ZL20__cudaFatCubinHandle
.comm _ZL20__cudaFatCubinHandle,8,8
.ident "GCC: (Ubuntu 13.3.0-6ubuntu2~24.04) 13.3.0"
.section .note.GNU-stack,"",@progbits
.section .note.gnu.property,"a"
.align 8
.long 1f - 0f
.long 4f - 1f
.long 5
0:
.string "GNU"
1:
.align 8
.long 0xc0000002
.long 3f - 2f
2:
.long 0x3
3:
.align 8
4: | .text
.file "kSetOnes.hip"
.globl _Z23__device_stub__kSetOnesPfi # -- Begin function _Z23__device_stub__kSetOnesPfi
.p2align 4, 0x90
.type _Z23__device_stub__kSetOnesPfi,@function
_Z23__device_stub__kSetOnesPfi: # @_Z23__device_stub__kSetOnesPfi
.cfi_startproc
# %bb.0:
subq $88, %rsp
.cfi_def_cfa_offset 96
movq %rdi, 56(%rsp)
movl %esi, 4(%rsp)
leaq 56(%rsp), %rax
movq %rax, 64(%rsp)
leaq 4(%rsp), %rax
movq %rax, 72(%rsp)
leaq 40(%rsp), %rdi
leaq 24(%rsp), %rsi
leaq 16(%rsp), %rdx
leaq 8(%rsp), %rcx
callq __hipPopCallConfiguration
movq 40(%rsp), %rsi
movl 48(%rsp), %edx
movq 24(%rsp), %rcx
movl 32(%rsp), %r8d
leaq 64(%rsp), %r9
movl $_Z8kSetOnesPfi, %edi
pushq 8(%rsp)
.cfi_adjust_cfa_offset 8
pushq 24(%rsp)
.cfi_adjust_cfa_offset 8
callq hipLaunchKernel
addq $104, %rsp
.cfi_adjust_cfa_offset -104
retq
.Lfunc_end0:
.size _Z23__device_stub__kSetOnesPfi, .Lfunc_end0-_Z23__device_stub__kSetOnesPfi
.cfi_endproc
# -- End function
.p2align 4, 0x90 # -- Begin function __hip_module_ctor
.type __hip_module_ctor,@function
__hip_module_ctor: # @__hip_module_ctor
.cfi_startproc
# %bb.0:
subq $40, %rsp
.cfi_def_cfa_offset 48
cmpq $0, __hip_gpubin_handle(%rip)
jne .LBB1_2
# %bb.1:
movl $__hip_fatbin_wrapper, %edi
callq __hipRegisterFatBinary
movq %rax, __hip_gpubin_handle(%rip)
.LBB1_2:
movq __hip_gpubin_handle(%rip), %rdi
xorps %xmm0, %xmm0
movups %xmm0, 16(%rsp)
movups %xmm0, (%rsp)
movl $_Z8kSetOnesPfi, %esi
movl $.L__unnamed_1, %edx
movl $.L__unnamed_1, %ecx
movl $-1, %r8d
xorl %r9d, %r9d
callq __hipRegisterFunction
movl $__hip_module_dtor, %edi
addq $40, %rsp
.cfi_def_cfa_offset 8
jmp atexit # TAILCALL
.Lfunc_end1:
.size __hip_module_ctor, .Lfunc_end1-__hip_module_ctor
.cfi_endproc
# -- End function
.p2align 4, 0x90 # -- Begin function __hip_module_dtor
.type __hip_module_dtor,@function
__hip_module_dtor: # @__hip_module_dtor
.cfi_startproc
# %bb.0:
movq __hip_gpubin_handle(%rip), %rdi
testq %rdi, %rdi
je .LBB2_2
# %bb.1:
pushq %rax
.cfi_def_cfa_offset 16
callq __hipUnregisterFatBinary
movq $0, __hip_gpubin_handle(%rip)
addq $8, %rsp
.cfi_def_cfa_offset 8
.LBB2_2:
retq
.Lfunc_end2:
.size __hip_module_dtor, .Lfunc_end2-__hip_module_dtor
.cfi_endproc
# -- End function
.type _Z8kSetOnesPfi,@object # @_Z8kSetOnesPfi
.section .rodata,"a",@progbits
.globl _Z8kSetOnesPfi
.p2align 3, 0x0
_Z8kSetOnesPfi:
.quad _Z23__device_stub__kSetOnesPfi
.size _Z8kSetOnesPfi, 8
.type .L__unnamed_1,@object # @0
.section .rodata.str1.1,"aMS",@progbits,1
.L__unnamed_1:
.asciz "_Z8kSetOnesPfi"
.size .L__unnamed_1, 15
.type __hip_fatbin_wrapper,@object # @__hip_fatbin_wrapper
.section .hipFatBinSegment,"a",@progbits
.p2align 3, 0x0
__hip_fatbin_wrapper:
.long 1212764230 # 0x48495046
.long 1 # 0x1
.quad __hip_fatbin
.quad 0
.size __hip_fatbin_wrapper, 24
.type __hip_gpubin_handle,@object # @__hip_gpubin_handle
.local __hip_gpubin_handle
.comm __hip_gpubin_handle,8,8
.section .init_array,"aw",@init_array
.p2align 3, 0x0
.quad __hip_module_ctor
.type __hip_cuid_,@object # @__hip_cuid_
.bss
.globl __hip_cuid_
__hip_cuid_:
.byte 0 # 0x0
.size __hip_cuid_, 1
.section ".linker-options","e",@llvm_linker_options
.ident "AMD clang version 18.0.0git (https://github.com/RadeonOpenCompute/llvm-project roc-6.3.2 25012 e5bf7e55c91490b07c49d8960fa7983d864936c4)"
.section ".note.GNU-stack","",@progbits
.addrsig
.addrsig_sym _Z23__device_stub__kSetOnesPfi
.addrsig_sym __hip_module_ctor
.addrsig_sym __hip_module_dtor
.addrsig_sym _Z8kSetOnesPfi
.addrsig_sym __hip_fatbin
.addrsig_sym __hip_fatbin_wrapper
.addrsig_sym __hip_cuid_ |
You are a helpful coding assistant specialized in converting CUDA source code to CUDA device assembly. | /* File: mat_add.cu
* Purpose: Implement matrix addition on a gpu using cuda
*
* Output: Result of matrix addition.
*
* Notes:
* 1. There are m blocks with n threads each.
*/
#include <stdio.h>
#include <stdlib.h>
#include <math.h>
//#include "cuPrintf.cuh"
//#include "cuPrintf.cu"
//#include "utils/cuPrintf.cu"
/*---------------------------------------------------------------------
* Kernel: Mat_add
* Purpose: Implement matrix addition
* In args: A, B, m, n
* Out arg: C
*/
__global__ void rotMatFunc(float matIn[],
float matOut[],
int dimX,
int dimY,
float rotMat[]) {
// int y = blockIdx.y;
/// int x = blockIdx.x * blockDim.x + threadIdx.x;
int x = blockIdx.x * blockDim.x + threadIdx.x;
int y = blockIdx.y * blockDim.y + threadIdx.y;
if ( x >= dimX || y >= dimY)
return;
//printf("x,y = %d %d, blockIdx.x,y= %d %d, blockDim.x,y = %d %d, threadIdx.x,y= %d %d\n",
// x,y, blockIdx.x,blockIdx.y, blockDim.x,blockDim.y, threadIdx.x,threadIdx.y);
float xOut,yOut;
float xIn, yIn;
int iIn, jIn;
float dimXf=(float)dimX, dimYf=(float)dimY;
int x0=dimX/2, y0=dimY/2;
// xOut = (float)(x - x0)/dimXf;
// yOut = (float)(y - y0)/dimYf;
xOut = (float)(x - x0);
yOut = (float)(y - y0);
xIn = rotMat[0] * xOut + rotMat[1] * yOut;
yIn = rotMat[2] * xOut + rotMat[3] * yOut;
// iIn = int(xIn * dimXf + x0);
// jIn = int(yIn * dimYf + y0);
iIn = int(xIn + x0);
jIn = int(yIn + y0);
if ( iIn >= 0 &&
iIn < dimX &&
jIn >= 0 &&
jIn < dimY)
{
printf("x=%d y=%d iIn=%d jIn=%d in=%d, out=%d\n",x, y, iIn, jIn, iIn*dimY+jIn,x*dimY+y);
matOut[x*dimY+y] = matIn[iIn*dimY+jIn];
}
/*
int indexOfMatrixOut = y + x * dimY;
int x0=dimX/2, y0=dimY/2;//this may be passed
float xOut,yOut;
float xIn, yIn;
int iIn, jIn;
float dimXf=(float)dimX, dimYf=(float)dimY;
xOut = (float)(x - x0)/dimXf;
yOut = (float)(y - y0)/dimYf;
//printf("x=%d y=%d x0=%d dimXf=%f xOut=%f yOut=%f\n",x, y, x0, dimXf, xOut, yOut);
xIn = rotMat[0] * xOut + rotMat[1] * yOut;
yIn = rotMat[2] * xOut + rotMat[3] * yOut;
//printf("x =%d y=%d xIn=%f yIn=%f\n",x, y, xIn, yIn);
iIn = int(xIn * dimXf + x0);
jIn = int(yIn * dimYf + y0);
int indexOfMatrixIn = jIn + iIn * dimY;
if ( iIn >= 0 &&
iIn < dimX &&
jIn >= 0 &&
jIn < dimY)
{
matOut[indexOfMatrixOut] = matIn[indexOfMatrixIn];
printf("x=%d y=%d in=%d, out=%d vI=%f vO=%f\n",x, y, indexOfMatrixIn,indexOfMatrixOut,
matIn[indexOfMatrixIn], matOut[indexOfMatrixOut]);
}
*/
} /* Mat_add */
/*---------------------------------------------------------------------
* Function: Fill_matrix
* Purpose: Fill an m x n matrix with random values
* In args: m, n
* Out arg: A
*/
void Fill_matrix(float A[], int dimX, int dimY) {
int i, j;
//numVec, dimVec
for (i = 0; i < dimX; i++)
for (j = 0; j < dimY; j++)
if(i==j )//or (i+j)==(dimX+1))
A[i*dimY+j]=1.0f;
else
A[i*dimY+j]=0.0f;
} /* Read_matrix */
/*---------------------------------------------------------------------
* Function: Print_matrix
* Purpose: Print an m x n matrix to stdout
* In args: title, A, m, n
*/
void Print_matrix(const char title[], float A[], int numVec, int dimVec, int m, int n) {
int i, j;
//numVec, dimVec
printf("%s\n", title);
for (i = 0; i < m; i++) {
for (j = 0; j < n; j++)
printf("%.2f ", A[i*dimVec+j]);
printf("\n");
}
} /* Print_matrix */
void checkError(cudaError_t error, const char function[])
{
if(error != cudaSuccess)
{
printf("\"%s\" has a problem with error code %d and desc: %s\n", function, error, cudaGetErrorString(error));
exit(-1);
}
}
bool checkIfMatricesEqual(float * mat1, float * mat2, float matSize)
{
int i = 0;
for( ; i < matSize; i++)
if(mat1[i] != mat2[i]){
printf("values different for i: %d\n", i);
printf("mat1[i] = %d, mat2[i] = %d\n", mat1[i], mat2[i]);
return false;
}
return true;
}
void rotateCPU(float matIn[],
float matOut[], int dimX, int dimY,
float rotMat[])
{
//float fX0,fY0;
int x0=dimX/2, y0=dimY/2;
//fX0 = (float)iX0;
//fY0 = (float)iY0;
float xOut,yOut;
float xIn, yIn;
int iIn, jIn;
float dimXf=(float)dimX, dimYf=(float)dimY;
for(int x = 0 ; x < dimX; ++x)
for(int y = 0 ; y < dimY; ++y){
xOut = (float)(x - x0)/dimXf;
yOut = (float)(y - y0)/dimYf;
xIn = rotMat[0] * xOut + rotMat[1] * yOut;
yIn = rotMat[2] * xOut + rotMat[3] * yOut;
iIn = int(xIn * dimXf + x0);
jIn = int(yIn * dimYf + y0);
if ( iIn >= 0 &&
iIn < dimX &&
jIn >= 0 &&
jIn < dimY)
matOut[x*dimY+y] = matIn[iIn*dimY+jIn];
}
}
/* Host code */
int main(int argc, char* argv[]) {
size_t dimX = 900;//mat size
size_t dimY = 900;
size_t gridX = 9;//mat size
size_t gridY = 9;
// variables for threads per block, number of blocks.
int threadsPerBlock = 32;//, blocksInGrid = 0;
//threadsPerBlock = min(_dimY, _dimY);
//create cuda event variables
cudaEvent_t hostStart, hostStop, deviceStart, deviceStop;
float timeDifferenceOnHost, timeDifferenceOnDevice;
//initialize cuda timing variables
cudaEventCreate(&hostStart);
cudaEventCreate(&hostStop);
cudaEventCreate(&deviceStart);
cudaEventCreate(&deviceStop);
float *h_A, *h_B, *h_B2, *h_rotMat;//PC
float *d_A, *d_B, *d_rotMat;//GPU
size_t size, matrixSize;
/* Get size of matrices */
matrixSize = dimX*dimY;
size = matrixSize*sizeof(float);
h_A = (float*) calloc(size,1);
h_B = (float*) calloc(size,1);
h_B2 = (float*) calloc(size,1);
h_rotMat = (float*) calloc(4*sizeof(float),1);
Fill_matrix(h_A, dimX, dimY);
//init rot Matrix
h_rotMat[0] = 0.f;
h_rotMat[1] = -1.f;
//h_rotMat[0] = 0.936f;
//h_rotMat[1] = 0.352f;
h_rotMat[2] = -h_rotMat[1];
h_rotMat[3] = h_rotMat[0];
Print_matrix("A =", h_A, dimX, dimY, 9, 9);
printf("Rotating matrices on CPU...\n");
cudaEventRecord(hostStart, 0);
//rotate matrix using CPU
rotateCPU(h_A ,h_B2, dimX, dimY, h_rotMat);
//////////
cudaEventRecord(hostStop, 0);
cudaEventElapsedTime(&timeDifferenceOnHost, hostStart, hostStop);
printf("Matrix rotation over. Time taken on CPU: %5.5f\n",
timeDifferenceOnHost);
Print_matrix("B2(CPU) =", h_B2, dimX, dimY, 9, 9);
/* Allocate matrices in device memory */
cudaMalloc(&d_A, size);
cudaMalloc(&d_B, size);
cudaMalloc(&d_rotMat, 4*sizeof(float));
/* Copy matrices from host memory to device memory */
cudaMemcpy(d_A, h_A, size, cudaMemcpyHostToDevice);
cudaMemcpy(d_B, h_B, size, cudaMemcpyHostToDevice);
cudaMemcpy(d_rotMat, h_rotMat, 4*sizeof(float), cudaMemcpyHostToDevice);
//create a proper grid block using dim3
/* Invoke kernel using dimX * dimY thread blocks, each of */
/* which contains threadsPerBlock threads */
dim3 block(threadsPerBlock, threadsPerBlock);
dim3 grid( (gridX+threadsPerBlock-1)/threadsPerBlock,
(gridY+threadsPerBlock-1)/threadsPerBlock );
cudaEventRecord(deviceStart, 0);
rotMatFunc<<<grid, block>>>(d_A, d_B, dimX, dimY, d_rotMat);
cudaError_t code=cudaGetLastError();
if (code)
printf("error=%s",cudaGetErrorString(code));
else
printf("code=%d",code);
cudaDeviceSynchronize();
cudaEventRecord(deviceStop, 0);
/* Wait for the kernel to complete */
cudaThreadSynchronize();
cudaEventElapsedTime(&timeDifferenceOnDevice, deviceStart, deviceStop);
/* Copy result from device memory to host memory */
checkError(cudaMemcpy(h_B, d_B, size, cudaMemcpyDeviceToHost), "Matrix B Copy from device to Host");
if(checkIfMatricesEqual(h_B, h_B2, matrixSize))
printf("Kernels correct!\n");
else
printf("Kernel logic wrong!\n");
printf("Finished addition on GPU. Time taken: %5.5f\n", timeDifferenceOnDevice);
printf("Speedup: %5.5f\n", (float)timeDifferenceOnHost/timeDifferenceOnDevice);
Print_matrix("The rotated image(CPU) is: ", h_B2, dimX, dimY, 9, 9);
Print_matrix("The rotated image(GPU) is: ", h_B, dimX, dimY, 9, 9);
/* Free device memory */
cudaFree(d_A);
cudaFree(d_B);
/* Free host memory */
free(h_A);
free(h_B);
free(h_B2);
return 0;
} /* main */ | code for sm_80
Function : _Z10rotMatFuncPfS_iiS_
.headerflags @"EF_CUDA_TEXMODE_UNIFIED EF_CUDA_64BIT_ADDRESS EF_CUDA_SM80 EF_CUDA_VIRTUAL_SM(EF_CUDA_SM80)"
/*0000*/ IMAD.MOV.U32 R1, RZ, RZ, c[0x0][0x28] ; /* 0x00000a00ff017624 */
/* 0x000fc800078e00ff */
/*0010*/ S2R R9, SR_CTAID.Y ; /* 0x0000000000097919 */
/* 0x000e220000002600 */
/*0020*/ IADD3 R1, R1, -0x18, RZ ; /* 0xffffffe801017810 */
/* 0x000fc60007ffe0ff */
/*0030*/ S2R R0, SR_TID.Y ; /* 0x0000000000007919 */
/* 0x000e280000002200 */
/*0040*/ S2R R8, SR_CTAID.X ; /* 0x0000000000087919 */
/* 0x000e680000002500 */
/*0050*/ S2R R3, SR_TID.X ; /* 0x0000000000037919 */
/* 0x000e620000002100 */
/*0060*/ IMAD R9, R9, c[0x0][0x4], R0 ; /* 0x0000010009097a24 */
/* 0x001fca00078e0200 */
/*0070*/ ISETP.GE.AND P0, PT, R9, c[0x0][0x174], PT ; /* 0x00005d0009007a0c */
/* 0x000fe20003f06270 */
/*0080*/ IMAD R8, R8, c[0x0][0x0], R3 ; /* 0x0000000008087a24 */
/* 0x002fca00078e0203 */
/*0090*/ ISETP.GE.OR P0, PT, R8, c[0x0][0x170], P0 ; /* 0x00005c0008007a0c */
/* 0x000fda0000706670 */
/*00a0*/ @P0 EXIT ; /* 0x000000000000094d */
/* 0x000fea0003800000 */
/*00b0*/ IMAD.MOV.U32 R2, RZ, RZ, c[0x0][0x178] ; /* 0x00005e00ff027624 */
/* 0x000fe200078e00ff */
/*00c0*/ ULDC.64 UR36, c[0x0][0x118] ; /* 0x0000460000247ab9 */
/* 0x000fe20000000a00 */
/*00d0*/ IMAD.MOV.U32 R3, RZ, RZ, c[0x0][0x17c] ; /* 0x00005f00ff037624 */
/* 0x000fe200078e00ff */
/*00e0*/ ULDC.64 UR10, c[0x0][0x170] ; /* 0x00005c00000a7ab9 */
/* 0x000fc80000000a00 */
/*00f0*/ LDG.E R13, [R2.64+0xc] ; /* 0x00000c24020d7981 */
/* 0x0000a8000c1e1900 */
/*0100*/ LDG.E R7, [R2.64+0x4] ; /* 0x0000042402077981 */
/* 0x0000e8000c1e1900 */
/*0110*/ LDG.E R11, [R2.64+0x8] ; /* 0x00000824020b7981 */
/* 0x000128000c1e1900 */
/*0120*/ LDG.E R5, [R2.64] ; /* 0x0000002402057981 */
/* 0x000162000c1e1900 */
/*0130*/ UMOV UR8, 0x2 ; /* 0x0000000200087882 */
/* 0x000fc40000000000 */
/*0140*/ UMOV UR4, URZ ; /* 0x0000003f00047c82 */
/* 0x000fe40008000000 */
/*0150*/ UMOV UR5, UR10 ; /* 0x0000000a00057c82 */
/* 0x000fe40008000000 */
/*0160*/ UIMAD.WIDE.U32 UR6, UR8, UR10, UR4 ; /* 0x0000000a080672a5 */
/* 0x000fc6000f8e0004 */
/*0170*/ UMOV UR5, UR11 ; /* 0x0000000b00057c82 */
/* 0x000fe40008000000 */
/*0180*/ UIMAD.WIDE.U32 UR4, UR8, UR11, UR4 ; /* 0x0000000b080472a5 */
/* 0x000fc8000f8e0004 */
/*0190*/ USHF.R.S32.HI UR5, URZ, 0x1, UR5 ; /* 0x000000013f057899 */
/* 0x000fe40008011405 */
/*01a0*/ USHF.R.S32.HI UR7, URZ, 0x1, UR7 ; /* 0x000000013f077899 */
/* 0x000fc80008011407 */
/*01b0*/ IADD3 R2, R9, -UR5, RZ ; /* 0x8000000509027c10 */
/* 0x001fe4000fffe0ff */
/*01c0*/ IADD3 R0, R8, -UR7, RZ ; /* 0x8000000708007c10 */
/* 0x000fc8000fffe0ff */
/*01d0*/ I2F R2, R2 ; /* 0x0000000200027306 */
/* 0x000eb00000201400 */
/*01e0*/ I2F R0, R0 ; /* 0x0000000000007306 */
/* 0x000f300000201400 */
/*01f0*/ I2F R6, UR5 ; /* 0x0000000500067d06 */
/* 0x000e300008201400 */
/*0200*/ I2F R4, UR7 ; /* 0x0000000700047d06 */
/* 0x000e620008201400 */
/*0210*/ FMUL R13, R2, R13 ; /* 0x0000000d020d7220 */
/* 0x004fc40000400000 */
/*0220*/ FMUL R7, R2, R7 ; /* 0x0000000702077220 */
/* 0x008fe40000400000 */
/*0230*/ FFMA R11, R0.reuse, R11, R13 ; /* 0x0000000b000b7223 */
/* 0x050fe4000000000d */
/*0240*/ FFMA R5, R0, R5, R7 ; /* 0x0000000500057223 */
/* 0x020fe40000000007 */
/*0250*/ FADD R11, R11, R6 ; /* 0x000000060b0b7221 */
/* 0x001fe40000000000 */
/*0260*/ FADD R4, R5, R4 ; /* 0x0000000405047221 */
/* 0x002fc80000000000 */
/*0270*/ F2I.TRUNC.NTZ R10, R4 ; /* 0x00000004000a7305 */
/* 0x000ff0000020f100 */
/*0280*/ F2I.TRUNC.NTZ R11, R11 ; /* 0x0000000b000b7305 */
/* 0x000e24000020f100 */
/*0290*/ LOP3.LUT R0, R11, R10, RZ, 0xfc, !PT ; /* 0x0000000a0b007212 */
/* 0x001fc800078efcff */
/*02a0*/ ISETP.GE.AND P0, PT, R0, RZ, PT ; /* 0x000000ff0000720c */
/* 0x000fc80003f06270 */
/*02b0*/ ISETP.GE.OR P0, PT, R10, c[0x0][0x170], !P0 ; /* 0x00005c000a007a0c */
/* 0x000fc80004706670 */
/*02c0*/ ISETP.GE.OR P0, PT, R11, c[0x0][0x174], P0 ; /* 0x00005d000b007a0c */
/* 0x000fe40000706670 */
/*02d0*/ IADD3 R6, P1, R1, c[0x0][0x20], RZ ; /* 0x0000080001067a10 */
/* 0x000fd60007f3e0ff */
/*02e0*/ @P0 EXIT ; /* 0x000000000000094d */
/* 0x000fea0003800000 */
/*02f0*/ MOV R2, 0x0 ; /* 0x0000000000027802 */
/* 0x000fe20000000f00 */
/*0300*/ IMAD R17, R8, c[0x0][0x174], R9 ; /* 0x00005d0008117a24 */
/* 0x000fe200078e0209 */
/*0310*/ STL.64 [R1], R8 ; /* 0x0000000801007387 */
/* 0x0001e20000100a00 */
/*0320*/ IMAD R16, R10, c[0x0][0x174], R11 ; /* 0x00005d000a107a24 */
/* 0x000fe200078e020b */
/*0330*/ IADD3.X R7, RZ, c[0x0][0x24], RZ, P1, !PT ; /* 0x00000900ff077a10 */
/* 0x000fe20000ffe4ff */
/*0340*/ IMAD.MOV.U32 R4, RZ, RZ, c[0x4][0x8] ; /* 0x01000200ff047624 */
/* 0x000fe200078e00ff */
/*0350*/ STL.64 [R1+0x8], R10 ; /* 0x0000080a01007387 */
/* 0x0001e20000100a00 */
/*0360*/ LDC.64 R2, c[0x4][R2] ; /* 0x0100000002027b82 */
/* 0x000e620000000a00 */
/*0370*/ IMAD.MOV.U32 R5, RZ, RZ, c[0x4][0xc] ; /* 0x01000300ff057624 */
/* 0x000fe400078e00ff */
/*0380*/ STL.64 [R1+0x10], R16 ; /* 0x0000101001007387 */
/* 0x0001ea0000100a00 */
/*0390*/ LEPC R8 ; /* 0x000000000008734e */
/* 0x001fe20000000000 */
/*03a0*/ MOV R11, 0x410 ; /* 0x00000410000b7802 */
/* 0x000fc40000000f00 */
/*03b0*/ MOV R20, 0x390 ; /* 0x0000039000147802 */
/* 0x000fe40000000f00 */
/*03c0*/ MOV R21, 0x0 ; /* 0x0000000000157802 */
/* 0x000fe40000000f00 */
/*03d0*/ MOV R0, 0x0 ; /* 0x0000000000007802 */
/* 0x000fe40000000f00 */
/*03e0*/ IADD3 R20, P0, P1, -R20, R11, R8 ; /* 0x0000000b14147210 */
/* 0x000fc8000791e108 */
/*03f0*/ IADD3.X R21, ~R0, R21, R9, P0, P1 ; /* 0x0000001500157210 */
/* 0x000fc800007e2509 */
/*0400*/ CALL.ABS.NOINC R2 ; /* 0x0000000002007343 */
/* 0x002fea0003c00000 */
/*0410*/ HFMA2.MMA R4, -RZ, RZ, 0, 2.384185791015625e-07 ; /* 0x00000004ff047435 */
/* 0x000fd400000001ff */
/*0420*/ IMAD.WIDE R2, R16, R4, c[0x0][0x160] ; /* 0x0000580010027625 */
/* 0x000fcc00078e0204 */
/*0430*/ LDG.E R3, [R2.64] ; /* 0x0000002402037981 */
/* 0x000ea2000c1e1900 */
/*0440*/ IMAD.WIDE R4, R17, R4, c[0x0][0x168] ; /* 0x00005a0011047625 */
/* 0x000fca00078e0204 */
/*0450*/ STG.E [R4.64], R3 ; /* 0x0000000304007986 */
/* 0x004fe2000c101924 */
/*0460*/ EXIT ; /* 0x000000000000794d */
/* 0x000fea0003800000 */
/*0470*/ BRA 0x470; /* 0xfffffff000007947 */
/* 0x000fc0000383ffff */
/*0480*/ NOP; /* 0x0000000000007918 */
/* 0x000fc00000000000 */
/*0490*/ NOP; /* 0x0000000000007918 */
/* 0x000fc00000000000 */
/*04a0*/ NOP; /* 0x0000000000007918 */
/* 0x000fc00000000000 */
/*04b0*/ NOP; /* 0x0000000000007918 */
/* 0x000fc00000000000 */
/*04c0*/ NOP; /* 0x0000000000007918 */
/* 0x000fc00000000000 */
/*04d0*/ NOP; /* 0x0000000000007918 */
/* 0x000fc00000000000 */
/*04e0*/ NOP; /* 0x0000000000007918 */
/* 0x000fc00000000000 */
/*04f0*/ NOP; /* 0x0000000000007918 */
/* 0x000fc00000000000 */
.......... |
You are a helpful coding assistant specialized in converting CUDA source code to CUDA host assembly. | /* File: mat_add.cu
* Purpose: Implement matrix addition on a gpu using cuda
*
* Output: Result of matrix addition.
*
* Notes:
* 1. There are m blocks with n threads each.
*/
#include <stdio.h>
#include <stdlib.h>
#include <math.h>
//#include "cuPrintf.cuh"
//#include "cuPrintf.cu"
//#include "utils/cuPrintf.cu"
/*---------------------------------------------------------------------
* Kernel: Mat_add
* Purpose: Implement matrix addition
* In args: A, B, m, n
* Out arg: C
*/
__global__ void rotMatFunc(float matIn[],
float matOut[],
int dimX,
int dimY,
float rotMat[]) {
// int y = blockIdx.y;
/// int x = blockIdx.x * blockDim.x + threadIdx.x;
int x = blockIdx.x * blockDim.x + threadIdx.x;
int y = blockIdx.y * blockDim.y + threadIdx.y;
if ( x >= dimX || y >= dimY)
return;
//printf("x,y = %d %d, blockIdx.x,y= %d %d, blockDim.x,y = %d %d, threadIdx.x,y= %d %d\n",
// x,y, blockIdx.x,blockIdx.y, blockDim.x,blockDim.y, threadIdx.x,threadIdx.y);
float xOut,yOut;
float xIn, yIn;
int iIn, jIn;
float dimXf=(float)dimX, dimYf=(float)dimY;
int x0=dimX/2, y0=dimY/2;
// xOut = (float)(x - x0)/dimXf;
// yOut = (float)(y - y0)/dimYf;
xOut = (float)(x - x0);
yOut = (float)(y - y0);
xIn = rotMat[0] * xOut + rotMat[1] * yOut;
yIn = rotMat[2] * xOut + rotMat[3] * yOut;
// iIn = int(xIn * dimXf + x0);
// jIn = int(yIn * dimYf + y0);
iIn = int(xIn + x0);
jIn = int(yIn + y0);
if ( iIn >= 0 &&
iIn < dimX &&
jIn >= 0 &&
jIn < dimY)
{
printf("x=%d y=%d iIn=%d jIn=%d in=%d, out=%d\n",x, y, iIn, jIn, iIn*dimY+jIn,x*dimY+y);
matOut[x*dimY+y] = matIn[iIn*dimY+jIn];
}
/*
int indexOfMatrixOut = y + x * dimY;
int x0=dimX/2, y0=dimY/2;//this may be passed
float xOut,yOut;
float xIn, yIn;
int iIn, jIn;
float dimXf=(float)dimX, dimYf=(float)dimY;
xOut = (float)(x - x0)/dimXf;
yOut = (float)(y - y0)/dimYf;
//printf("x=%d y=%d x0=%d dimXf=%f xOut=%f yOut=%f\n",x, y, x0, dimXf, xOut, yOut);
xIn = rotMat[0] * xOut + rotMat[1] * yOut;
yIn = rotMat[2] * xOut + rotMat[3] * yOut;
//printf("x =%d y=%d xIn=%f yIn=%f\n",x, y, xIn, yIn);
iIn = int(xIn * dimXf + x0);
jIn = int(yIn * dimYf + y0);
int indexOfMatrixIn = jIn + iIn * dimY;
if ( iIn >= 0 &&
iIn < dimX &&
jIn >= 0 &&
jIn < dimY)
{
matOut[indexOfMatrixOut] = matIn[indexOfMatrixIn];
printf("x=%d y=%d in=%d, out=%d vI=%f vO=%f\n",x, y, indexOfMatrixIn,indexOfMatrixOut,
matIn[indexOfMatrixIn], matOut[indexOfMatrixOut]);
}
*/
} /* Mat_add */
/*---------------------------------------------------------------------
* Function: Fill_matrix
* Purpose: Fill an m x n matrix with random values
* In args: m, n
* Out arg: A
*/
void Fill_matrix(float A[], int dimX, int dimY) {
int i, j;
//numVec, dimVec
for (i = 0; i < dimX; i++)
for (j = 0; j < dimY; j++)
if(i==j )//or (i+j)==(dimX+1))
A[i*dimY+j]=1.0f;
else
A[i*dimY+j]=0.0f;
} /* Read_matrix */
/*---------------------------------------------------------------------
* Function: Print_matrix
* Purpose: Print an m x n matrix to stdout
* In args: title, A, m, n
*/
void Print_matrix(const char title[], float A[], int numVec, int dimVec, int m, int n) {
int i, j;
//numVec, dimVec
printf("%s\n", title);
for (i = 0; i < m; i++) {
for (j = 0; j < n; j++)
printf("%.2f ", A[i*dimVec+j]);
printf("\n");
}
} /* Print_matrix */
void checkError(cudaError_t error, const char function[])
{
if(error != cudaSuccess)
{
printf("\"%s\" has a problem with error code %d and desc: %s\n", function, error, cudaGetErrorString(error));
exit(-1);
}
}
bool checkIfMatricesEqual(float * mat1, float * mat2, float matSize)
{
int i = 0;
for( ; i < matSize; i++)
if(mat1[i] != mat2[i]){
printf("values different for i: %d\n", i);
printf("mat1[i] = %d, mat2[i] = %d\n", mat1[i], mat2[i]);
return false;
}
return true;
}
void rotateCPU(float matIn[],
float matOut[], int dimX, int dimY,
float rotMat[])
{
//float fX0,fY0;
int x0=dimX/2, y0=dimY/2;
//fX0 = (float)iX0;
//fY0 = (float)iY0;
float xOut,yOut;
float xIn, yIn;
int iIn, jIn;
float dimXf=(float)dimX, dimYf=(float)dimY;
for(int x = 0 ; x < dimX; ++x)
for(int y = 0 ; y < dimY; ++y){
xOut = (float)(x - x0)/dimXf;
yOut = (float)(y - y0)/dimYf;
xIn = rotMat[0] * xOut + rotMat[1] * yOut;
yIn = rotMat[2] * xOut + rotMat[3] * yOut;
iIn = int(xIn * dimXf + x0);
jIn = int(yIn * dimYf + y0);
if ( iIn >= 0 &&
iIn < dimX &&
jIn >= 0 &&
jIn < dimY)
matOut[x*dimY+y] = matIn[iIn*dimY+jIn];
}
}
/* Host code */
int main(int argc, char* argv[]) {
size_t dimX = 900;//mat size
size_t dimY = 900;
size_t gridX = 9;//mat size
size_t gridY = 9;
// variables for threads per block, number of blocks.
int threadsPerBlock = 32;//, blocksInGrid = 0;
//threadsPerBlock = min(_dimY, _dimY);
//create cuda event variables
cudaEvent_t hostStart, hostStop, deviceStart, deviceStop;
float timeDifferenceOnHost, timeDifferenceOnDevice;
//initialize cuda timing variables
cudaEventCreate(&hostStart);
cudaEventCreate(&hostStop);
cudaEventCreate(&deviceStart);
cudaEventCreate(&deviceStop);
float *h_A, *h_B, *h_B2, *h_rotMat;//PC
float *d_A, *d_B, *d_rotMat;//GPU
size_t size, matrixSize;
/* Get size of matrices */
matrixSize = dimX*dimY;
size = matrixSize*sizeof(float);
h_A = (float*) calloc(size,1);
h_B = (float*) calloc(size,1);
h_B2 = (float*) calloc(size,1);
h_rotMat = (float*) calloc(4*sizeof(float),1);
Fill_matrix(h_A, dimX, dimY);
//init rot Matrix
h_rotMat[0] = 0.f;
h_rotMat[1] = -1.f;
//h_rotMat[0] = 0.936f;
//h_rotMat[1] = 0.352f;
h_rotMat[2] = -h_rotMat[1];
h_rotMat[3] = h_rotMat[0];
Print_matrix("A =", h_A, dimX, dimY, 9, 9);
printf("Rotating matrices on CPU...\n");
cudaEventRecord(hostStart, 0);
//rotate matrix using CPU
rotateCPU(h_A ,h_B2, dimX, dimY, h_rotMat);
//////////
cudaEventRecord(hostStop, 0);
cudaEventElapsedTime(&timeDifferenceOnHost, hostStart, hostStop);
printf("Matrix rotation over. Time taken on CPU: %5.5f\n",
timeDifferenceOnHost);
Print_matrix("B2(CPU) =", h_B2, dimX, dimY, 9, 9);
/* Allocate matrices in device memory */
cudaMalloc(&d_A, size);
cudaMalloc(&d_B, size);
cudaMalloc(&d_rotMat, 4*sizeof(float));
/* Copy matrices from host memory to device memory */
cudaMemcpy(d_A, h_A, size, cudaMemcpyHostToDevice);
cudaMemcpy(d_B, h_B, size, cudaMemcpyHostToDevice);
cudaMemcpy(d_rotMat, h_rotMat, 4*sizeof(float), cudaMemcpyHostToDevice);
//create a proper grid block using dim3
/* Invoke kernel using dimX * dimY thread blocks, each of */
/* which contains threadsPerBlock threads */
dim3 block(threadsPerBlock, threadsPerBlock);
dim3 grid( (gridX+threadsPerBlock-1)/threadsPerBlock,
(gridY+threadsPerBlock-1)/threadsPerBlock );
cudaEventRecord(deviceStart, 0);
rotMatFunc<<<grid, block>>>(d_A, d_B, dimX, dimY, d_rotMat);
cudaError_t code=cudaGetLastError();
if (code)
printf("error=%s",cudaGetErrorString(code));
else
printf("code=%d",code);
cudaDeviceSynchronize();
cudaEventRecord(deviceStop, 0);
/* Wait for the kernel to complete */
cudaThreadSynchronize();
cudaEventElapsedTime(&timeDifferenceOnDevice, deviceStart, deviceStop);
/* Copy result from device memory to host memory */
checkError(cudaMemcpy(h_B, d_B, size, cudaMemcpyDeviceToHost), "Matrix B Copy from device to Host");
if(checkIfMatricesEqual(h_B, h_B2, matrixSize))
printf("Kernels correct!\n");
else
printf("Kernel logic wrong!\n");
printf("Finished addition on GPU. Time taken: %5.5f\n", timeDifferenceOnDevice);
printf("Speedup: %5.5f\n", (float)timeDifferenceOnHost/timeDifferenceOnDevice);
Print_matrix("The rotated image(CPU) is: ", h_B2, dimX, dimY, 9, 9);
Print_matrix("The rotated image(GPU) is: ", h_B, dimX, dimY, 9, 9);
/* Free device memory */
cudaFree(d_A);
cudaFree(d_B);
/* Free host memory */
free(h_A);
free(h_B);
free(h_B2);
return 0;
} /* main */ | .file "tmpxft_001a419c_00000000-6_matAdd.cudafe1.cpp"
.text
#APP
#NO_APP
.type _ZL26__cudaUnregisterBinaryUtilv, @function
_ZL26__cudaUnregisterBinaryUtilv:
.LFB2065:
.cfi_startproc
endbr64
subq $8, %rsp
.cfi_def_cfa_offset 16
movq _ZL20__cudaFatCubinHandle(%rip), %rdi
call __cudaUnregisterFatBinary@PLT
addq $8, %rsp
.cfi_def_cfa_offset 8
ret
.cfi_endproc
.LFE2065:
.size _ZL26__cudaUnregisterBinaryUtilv, .-_ZL26__cudaUnregisterBinaryUtilv
.globl _Z11Fill_matrixPfii
.type _Z11Fill_matrixPfii, @function
_Z11Fill_matrixPfii:
.LFB2057:
.cfi_startproc
endbr64
testl %esi, %esi
jle .L3
movl $0, %r9d
movl $0, %r8d
movss .LC0(%rip), %xmm0
jmp .L5
.L13:
leal (%rax,%r9), %ecx
movslq %ecx, %rcx
movss %xmm0, (%rdi,%rcx,4)
.L7:
addl $1, %eax
cmpl %eax, %edx
je .L9
.L8:
cmpl %eax, %r8d
je .L13
leal (%rax,%r9), %ecx
movslq %ecx, %rcx
movl $0x00000000, (%rdi,%rcx,4)
jmp .L7
.L9:
addl $1, %r8d
addl %edx, %r9d
cmpl %r8d, %esi
je .L3
.L5:
movl $0, %eax
testl %edx, %edx
jg .L8
jmp .L9
.L3:
ret
.cfi_endproc
.LFE2057:
.size _Z11Fill_matrixPfii, .-_Z11Fill_matrixPfii
.section .rodata.str1.1,"aMS",@progbits,1
.LC2:
.string "%s\n"
.LC3:
.string "%.2f "
.LC4:
.string "\n"
.text
.globl _Z12Print_matrixPKcPfiiii
.type _Z12Print_matrixPKcPfiiii, @function
_Z12Print_matrixPKcPfiiii:
.LFB2058:
.cfi_startproc
endbr64
pushq %r15
.cfi_def_cfa_offset 16
.cfi_offset 15, -16
pushq %r14
.cfi_def_cfa_offset 24
.cfi_offset 14, -24
pushq %r13
.cfi_def_cfa_offset 32
.cfi_offset 13, -32
pushq %r12
.cfi_def_cfa_offset 40
.cfi_offset 12, -40
pushq %rbp
.cfi_def_cfa_offset 48
.cfi_offset 6, -48
pushq %rbx
.cfi_def_cfa_offset 56
.cfi_offset 3, -56
subq $40, %rsp
.cfi_def_cfa_offset 96
movq %rdi, %rdx
movq %rsi, %r15
movl %ecx, 12(%rsp)
movl %r8d, %ebx
movl %r8d, 16(%rsp)
movl %r9d, %ebp
movl %r9d, 20(%rsp)
leaq .LC2(%rip), %rsi
movl $2, %edi
movl $0, %eax
call __printf_chk@PLT
testl %ebx, %ebx
jle .L14
movl $0, %r14d
movl $0, %r13d
movslq %ebp, %rax
movq %rax, 24(%rsp)
leaq .LC3(%rip), %r12
jmp .L16
.L18:
movslq %r14d, %rax
leaq (%r15,%rax,4), %rbx
movq 24(%rsp), %rdx
addq %rdx, %rax
leaq (%r15,%rax,4), %rbp
.L17:
pxor %xmm0, %xmm0
cvtss2sd (%rbx), %xmm0
movq %r12, %rsi
movl $2, %edi
movl $1, %eax
call __printf_chk@PLT
addq $4, %rbx
cmpq %rbp, %rbx
jne .L17
.L19:
leaq .LC4(%rip), %rsi
movl $2, %edi
movl $0, %eax
call __printf_chk@PLT
addl $1, %r13d
movl 12(%rsp), %eax
addl %eax, %r14d
cmpl %r13d, 16(%rsp)
je .L14
.L16:
cmpl $0, 20(%rsp)
jg .L18
jmp .L19
.L14:
addq $40, %rsp
.cfi_def_cfa_offset 56
popq %rbx
.cfi_def_cfa_offset 48
popq %rbp
.cfi_def_cfa_offset 40
popq %r12
.cfi_def_cfa_offset 32
popq %r13
.cfi_def_cfa_offset 24
popq %r14
.cfi_def_cfa_offset 16
popq %r15
.cfi_def_cfa_offset 8
ret
.cfi_endproc
.LFE2058:
.size _Z12Print_matrixPKcPfiiii, .-_Z12Print_matrixPKcPfiiii
.section .rodata.str1.8,"aMS",@progbits,1
.align 8
.LC5:
.string "\"%s\" has a problem with error code %d and desc: %s\n"
.text
.globl _Z10checkError9cudaErrorPKc
.type _Z10checkError9cudaErrorPKc, @function
_Z10checkError9cudaErrorPKc:
.LFB2059:
.cfi_startproc
endbr64
testl %edi, %edi
jne .L27
ret
.L27:
pushq %rbp
.cfi_def_cfa_offset 16
.cfi_offset 6, -16
pushq %rbx
.cfi_def_cfa_offset 24
.cfi_offset 3, -24
subq $8, %rsp
.cfi_def_cfa_offset 32
movl %edi, %ebx
movq %rsi, %rbp
call cudaGetErrorString@PLT
movq %rax, %r8
movl %ebx, %ecx
movq %rbp, %rdx
leaq .LC5(%rip), %rsi
movl $2, %edi
movl $0, %eax
call __printf_chk@PLT
movl $-1, %edi
call exit@PLT
.cfi_endproc
.LFE2059:
.size _Z10checkError9cudaErrorPKc, .-_Z10checkError9cudaErrorPKc
.section .rodata.str1.1
.LC6:
.string "values different for i: %d\n"
.LC7:
.string "mat1[i] = %d, mat2[i] = %d\n"
.text
.globl _Z20checkIfMatricesEqualPfS_f
.type _Z20checkIfMatricesEqualPfS_f, @function
_Z20checkIfMatricesEqualPfS_f:
.LFB2060:
.cfi_startproc
endbr64
movl $0, %edx
pxor %xmm1, %xmm1
comiss %xmm1, %xmm0
jbe .L39
pushq %rbp
.cfi_def_cfa_offset 16
.cfi_offset 6, -16
pushq %rbx
.cfi_def_cfa_offset 24
.cfi_offset 3, -24
subq $8, %rsp
.cfi_def_cfa_offset 32
.L33:
movq %rdi, %rbp
movq %rsi, %rbx
movss (%rdi), %xmm1
ucomiss (%rsi), %xmm1
jp .L36
jne .L36
addl $1, %edx
addq $4, %rdi
addq $4, %rsi
pxor %xmm1, %xmm1
cvtsi2ssl %edx, %xmm1
comiss %xmm1, %xmm0
ja .L33
movl $1, %eax
jmp .L28
.L36:
leaq .LC6(%rip), %rsi
movl $2, %edi
movl $0, %eax
call __printf_chk@PLT
pxor %xmm0, %xmm0
cvtss2sd 0(%rbp), %xmm0
pxor %xmm1, %xmm1
cvtss2sd (%rbx), %xmm1
leaq .LC7(%rip), %rsi
movl $2, %edi
movl $2, %eax
call __printf_chk@PLT
movl $0, %eax
.L28:
addq $8, %rsp
.cfi_def_cfa_offset 24
popq %rbx
.cfi_def_cfa_offset 16
popq %rbp
.cfi_def_cfa_offset 8
ret
.L39:
.cfi_restore 3
.cfi_restore 6
movl $1, %eax
ret
.cfi_endproc
.LFE2060:
.size _Z20checkIfMatricesEqualPfS_f, .-_Z20checkIfMatricesEqualPfS_f
.globl _Z9rotateCPUPfS_iiS_
.type _Z9rotateCPUPfS_iiS_, @function
_Z9rotateCPUPfS_iiS_:
.LFB2061:
.cfi_startproc
endbr64
pushq %r14
.cfi_def_cfa_offset 16
.cfi_offset 14, -16
pushq %r13
.cfi_def_cfa_offset 24
.cfi_offset 13, -24
pushq %r12
.cfi_def_cfa_offset 32
.cfi_offset 12, -32
pushq %rbp
.cfi_def_cfa_offset 40
.cfi_offset 6, -40
pushq %rbx
.cfi_def_cfa_offset 48
.cfi_offset 3, -48
movq %rdi, %r10
movl %edx, %ebp
shrl $31, %ebp
addl %edx, %ebp
sarl %ebp
movl %ecx, %edi
shrl $31, %edi
addl %ecx, %edi
sarl %edi
testl %edx, %edx
jle .L43
movq %rsi, %r11
movl %edx, %esi
pxor %xmm5, %xmm5
cvtsi2ssl %edx, %xmm5
pxor %xmm4, %xmm4
cvtsi2ssl %ecx, %xmm4
movl %ebp, %ebx
negl %ebx
movl %edx, %r12d
subl %ebp, %r12d
movl %edi, %r9d
movl %ecx, %edx
subl %edi, %edx
jmp .L45
.L52:
imull %ecx, %r13d
addl %r14d, %r13d
movslq %r13d, %r13
movss (%r10,%r13,4), %xmm0
leal (%rax,%r9), %r13d
movslq %r13d, %r13
movss %xmm0, (%r11,%r13,4)
.L46:
addl $1, %eax
cmpl %edx, %eax
je .L49
.L47:
pxor %xmm1, %xmm1
cvtsi2ssl %eax, %xmm1
divss %xmm4, %xmm1
movaps %xmm3, %xmm0
mulss (%r8), %xmm0
movaps %xmm1, %xmm2
mulss 4(%r8), %xmm2
addss %xmm2, %xmm0
mulss %xmm5, %xmm0
addss %xmm6, %xmm0
cvttss2sil %xmm0, %r13d
testl %r13d, %r13d
js .L46
cmpl %r13d, %esi
jle .L46
movaps %xmm3, %xmm0
mulss 8(%r8), %xmm0
mulss 12(%r8), %xmm1
addss %xmm1, %xmm0
mulss %xmm4, %xmm0
pxor %xmm1, %xmm1
cvtsi2ssl %edi, %xmm1
addss %xmm1, %xmm0
cvttss2sil %xmm0, %r14d
testl %r14d, %r14d
js .L46
cmpl %r14d, %ecx
jg .L52
jmp .L46
.L49:
addl %ecx, %r9d
addl $1, %ebx
cmpl %r12d, %ebx
je .L43
.L45:
testl %ecx, %ecx
jle .L49
pxor %xmm3, %xmm3
cvtsi2ssl %ebx, %xmm3
divss %xmm5, %xmm3
movl %edi, %eax
negl %eax
pxor %xmm6, %xmm6
cvtsi2ssl %ebp, %xmm6
jmp .L47
.L43:
popq %rbx
.cfi_def_cfa_offset 40
popq %rbp
.cfi_def_cfa_offset 32
popq %r12
.cfi_def_cfa_offset 24
popq %r13
.cfi_def_cfa_offset 16
popq %r14
.cfi_def_cfa_offset 8
ret
.cfi_endproc
.LFE2061:
.size _Z9rotateCPUPfS_iiS_, .-_Z9rotateCPUPfS_iiS_
.globl _Z36__device_stub__Z10rotMatFuncPfS_iiS_PfS_iiS_
.type _Z36__device_stub__Z10rotMatFuncPfS_iiS_PfS_iiS_, @function
_Z36__device_stub__Z10rotMatFuncPfS_iiS_PfS_iiS_:
.LFB2087:
.cfi_startproc
endbr64
subq $152, %rsp
.cfi_def_cfa_offset 160
movq %rdi, 24(%rsp)
movq %rsi, 16(%rsp)
movl %edx, 12(%rsp)
movl %ecx, 8(%rsp)
movq %r8, (%rsp)
movq %fs:40, %rax
movq %rax, 136(%rsp)
xorl %eax, %eax
leaq 24(%rsp), %rax
movq %rax, 96(%rsp)
leaq 16(%rsp), %rax
movq %rax, 104(%rsp)
leaq 12(%rsp), %rax
movq %rax, 112(%rsp)
leaq 8(%rsp), %rax
movq %rax, 120(%rsp)
movq %rsp, %rax
movq %rax, 128(%rsp)
movl $1, 48(%rsp)
movl $1, 52(%rsp)
movl $1, 56(%rsp)
movl $1, 60(%rsp)
movl $1, 64(%rsp)
movl $1, 68(%rsp)
leaq 40(%rsp), %rcx
leaq 32(%rsp), %rdx
leaq 60(%rsp), %rsi
leaq 48(%rsp), %rdi
call __cudaPopCallConfiguration@PLT
testl %eax, %eax
je .L57
.L53:
movq 136(%rsp), %rax
subq %fs:40, %rax
jne .L58
addq $152, %rsp
.cfi_remember_state
.cfi_def_cfa_offset 8
ret
.L57:
.cfi_restore_state
pushq 40(%rsp)
.cfi_def_cfa_offset 168
pushq 40(%rsp)
.cfi_def_cfa_offset 176
leaq 112(%rsp), %r9
movq 76(%rsp), %rcx
movl 84(%rsp), %r8d
movq 64(%rsp), %rsi
movl 72(%rsp), %edx
leaq _Z10rotMatFuncPfS_iiS_(%rip), %rdi
call cudaLaunchKernel@PLT
addq $16, %rsp
.cfi_def_cfa_offset 160
jmp .L53
.L58:
call __stack_chk_fail@PLT
.cfi_endproc
.LFE2087:
.size _Z36__device_stub__Z10rotMatFuncPfS_iiS_PfS_iiS_, .-_Z36__device_stub__Z10rotMatFuncPfS_iiS_PfS_iiS_
.globl _Z10rotMatFuncPfS_iiS_
.type _Z10rotMatFuncPfS_iiS_, @function
_Z10rotMatFuncPfS_iiS_:
.LFB2088:
.cfi_startproc
endbr64
subq $8, %rsp
.cfi_def_cfa_offset 16
call _Z36__device_stub__Z10rotMatFuncPfS_iiS_PfS_iiS_
addq $8, %rsp
.cfi_def_cfa_offset 8
ret
.cfi_endproc
.LFE2088:
.size _Z10rotMatFuncPfS_iiS_, .-_Z10rotMatFuncPfS_iiS_
.section .rodata.str1.1
.LC9:
.string "A ="
.LC10:
.string "Rotating matrices on CPU...\n"
.section .rodata.str1.8
.align 8
.LC11:
.string "Matrix rotation over. Time taken on CPU: %5.5f\n"
.section .rodata.str1.1
.LC12:
.string "B2(CPU) ="
.LC13:
.string "error=%s"
.LC14:
.string "code=%d"
.section .rodata.str1.8
.align 8
.LC15:
.string "Matrix B Copy from device to Host"
.section .rodata.str1.1
.LC17:
.string "Kernels correct!\n"
.LC18:
.string "Kernel logic wrong!\n"
.section .rodata.str1.8
.align 8
.LC19:
.string "Finished addition on GPU. Time taken: %5.5f\n"
.section .rodata.str1.1
.LC20:
.string "Speedup: %5.5f\n"
.LC21:
.string "The rotated image(CPU) is: "
.LC22:
.string "The rotated image(GPU) is: "
.text
.globl main
.type main, @function
main:
.LFB2062:
.cfi_startproc
endbr64
pushq %r13
.cfi_def_cfa_offset 16
.cfi_offset 13, -16
pushq %r12
.cfi_def_cfa_offset 24
.cfi_offset 12, -24
pushq %rbp
.cfi_def_cfa_offset 32
.cfi_offset 6, -32
pushq %rbx
.cfi_def_cfa_offset 40
.cfi_offset 3, -40
subq $104, %rsp
.cfi_def_cfa_offset 144
movq %fs:40, %rax
movq %rax, 88(%rsp)
xorl %eax, %eax
leaq 8(%rsp), %rdi
call cudaEventCreate@PLT
leaq 16(%rsp), %rdi
call cudaEventCreate@PLT
leaq 24(%rsp), %rdi
call cudaEventCreate@PLT
leaq 32(%rsp), %rdi
call cudaEventCreate@PLT
movl $1, %esi
movl $3240000, %edi
call calloc@PLT
movq %rax, %r13
movl $1, %esi
movl $3240000, %edi
call calloc@PLT
movq %rax, %r12
movl $1, %esi
movl $3240000, %edi
call calloc@PLT
movq %rax, %rbp
movl $1, %esi
movl $16, %edi
call calloc@PLT
movq %rax, %rbx
movl $900, %edx
movl $900, %esi
movq %r13, %rdi
call _Z11Fill_matrixPfii
movl $0x00000000, (%rbx)
movl $0xbf800000, 4(%rbx)
movl $0x3f800000, 8(%rbx)
movl $0x00000000, 12(%rbx)
movl $9, %r9d
movl $9, %r8d
movl $900, %ecx
movl $900, %edx
movq %r13, %rsi
leaq .LC9(%rip), %rdi
call _Z12Print_matrixPKcPfiiii
leaq .LC10(%rip), %rsi
movl $2, %edi
movl $0, %eax
call __printf_chk@PLT
movl $0, %esi
movq 8(%rsp), %rdi
call cudaEventRecord@PLT
movq %rbx, %r8
movl $900, %ecx
movl $900, %edx
movq %rbp, %rsi
movq %r13, %rdi
call _Z9rotateCPUPfS_iiS_
movl $0, %esi
movq 16(%rsp), %rdi
call cudaEventRecord@PLT
movq %rsp, %rdi
movq 16(%rsp), %rdx
movq 8(%rsp), %rsi
call cudaEventElapsedTime@PLT
pxor %xmm0, %xmm0
cvtss2sd (%rsp), %xmm0
leaq .LC11(%rip), %rsi
movl $2, %edi
movl $1, %eax
call __printf_chk@PLT
movl $9, %r9d
movl $9, %r8d
movl $900, %ecx
movl $900, %edx
movq %rbp, %rsi
leaq .LC12(%rip), %rdi
call _Z12Print_matrixPKcPfiiii
leaq 40(%rsp), %rdi
movl $3240000, %esi
call cudaMalloc@PLT
leaq 48(%rsp), %rdi
movl $3240000, %esi
call cudaMalloc@PLT
leaq 56(%rsp), %rdi
movl $16, %esi
call cudaMalloc@PLT
movl $1, %ecx
movl $3240000, %edx
movq %r13, %rsi
movq 40(%rsp), %rdi
call cudaMemcpy@PLT
movl $1, %ecx
movl $3240000, %edx
movq %r12, %rsi
movq 48(%rsp), %rdi
call cudaMemcpy@PLT
movl $1, %ecx
movl $16, %edx
movq %rbx, %rsi
movq 56(%rsp), %rdi
call cudaMemcpy@PLT
movl $32, 64(%rsp)
movl $32, 68(%rsp)
movl $1, 72(%rsp)
movl $1, 76(%rsp)
movl $1, 80(%rsp)
movl $1, 84(%rsp)
movl $0, %esi
movq 24(%rsp), %rdi
call cudaEventRecord@PLT
movl 72(%rsp), %ecx
movl $0, %r9d
movl $0, %r8d
movq 64(%rsp), %rdx
movq 76(%rsp), %rdi
movl 84(%rsp), %esi
call __cudaPushCallConfiguration@PLT
testl %eax, %eax
je .L69
.L62:
call cudaGetLastError@PLT
testl %eax, %eax
je .L63
movl %eax, %edi
call cudaGetErrorString@PLT
movq %rax, %rdx
leaq .LC13(%rip), %rsi
movl $2, %edi
movl $0, %eax
call __printf_chk@PLT
.L64:
call cudaDeviceSynchronize@PLT
movl $0, %esi
movq 32(%rsp), %rdi
call cudaEventRecord@PLT
call cudaThreadSynchronize@PLT
leaq 4(%rsp), %rdi
movq 32(%rsp), %rdx
movq 24(%rsp), %rsi
call cudaEventElapsedTime@PLT
movl $2, %ecx
movl $3240000, %edx
movq 48(%rsp), %rsi
movq %r12, %rdi
call cudaMemcpy@PLT
movl %eax, %edi
leaq .LC15(%rip), %rsi
call _Z10checkError9cudaErrorPKc
movss .LC16(%rip), %xmm0
movq %rbp, %rsi
movq %r12, %rdi
call _Z20checkIfMatricesEqualPfS_f
testb %al, %al
je .L65
leaq .LC17(%rip), %rsi
movl $2, %edi
movl $0, %eax
call __printf_chk@PLT
.L66:
pxor %xmm0, %xmm0
cvtss2sd 4(%rsp), %xmm0
leaq .LC19(%rip), %rsi
movl $2, %edi
movl $1, %eax
call __printf_chk@PLT
movss (%rsp), %xmm0
divss 4(%rsp), %xmm0
cvtss2sd %xmm0, %xmm0
leaq .LC20(%rip), %rsi
movl $2, %edi
movl $1, %eax
call __printf_chk@PLT
movl $9, %r9d
movl $9, %r8d
movl $900, %ecx
movl $900, %edx
movq %rbp, %rsi
leaq .LC21(%rip), %rdi
call _Z12Print_matrixPKcPfiiii
movl $9, %r9d
movl $9, %r8d
movl $900, %ecx
movl $900, %edx
movq %r12, %rsi
leaq .LC22(%rip), %rdi
call _Z12Print_matrixPKcPfiiii
movq 40(%rsp), %rdi
call cudaFree@PLT
movq 48(%rsp), %rdi
call cudaFree@PLT
movq %r13, %rdi
call free@PLT
movq %r12, %rdi
call free@PLT
movq %rbp, %rdi
call free@PLT
movq 88(%rsp), %rax
subq %fs:40, %rax
jne .L70
movl $0, %eax
addq $104, %rsp
.cfi_remember_state
.cfi_def_cfa_offset 40
popq %rbx
.cfi_def_cfa_offset 32
popq %rbp
.cfi_def_cfa_offset 24
popq %r12
.cfi_def_cfa_offset 16
popq %r13
.cfi_def_cfa_offset 8
ret
.L69:
.cfi_restore_state
movq 56(%rsp), %r8
movl $900, %ecx
movl $900, %edx
movq 48(%rsp), %rsi
movq 40(%rsp), %rdi
call _Z36__device_stub__Z10rotMatFuncPfS_iiS_PfS_iiS_
jmp .L62
.L63:
movl $0, %edx
leaq .LC14(%rip), %rsi
movl $2, %edi
movl $0, %eax
call __printf_chk@PLT
jmp .L64
.L65:
leaq .LC18(%rip), %rsi
movl $2, %edi
movl $0, %eax
call __printf_chk@PLT
jmp .L66
.L70:
call __stack_chk_fail@PLT
.cfi_endproc
.LFE2062:
.size main, .-main
.section .rodata.str1.1
.LC23:
.string "_Z10rotMatFuncPfS_iiS_"
.text
.type _ZL24__sti____cudaRegisterAllv, @function
_ZL24__sti____cudaRegisterAllv:
.LFB2090:
.cfi_startproc
endbr64
subq $8, %rsp
.cfi_def_cfa_offset 16
leaq _ZL15__fatDeviceText(%rip), %rdi
call __cudaRegisterFatBinary@PLT
movq %rax, %rdi
movq %rax, _ZL20__cudaFatCubinHandle(%rip)
pushq $0
.cfi_def_cfa_offset 24
pushq $0
.cfi_def_cfa_offset 32
pushq $0
.cfi_def_cfa_offset 40
pushq $0
.cfi_def_cfa_offset 48
movl $0, %r9d
movl $-1, %r8d
leaq .LC23(%rip), %rdx
movq %rdx, %rcx
leaq _Z10rotMatFuncPfS_iiS_(%rip), %rsi
call __cudaRegisterFunction@PLT
addq $32, %rsp
.cfi_def_cfa_offset 16
movq _ZL20__cudaFatCubinHandle(%rip), %rdi
call __cudaRegisterFatBinaryEnd@PLT
leaq _ZL26__cudaUnregisterBinaryUtilv(%rip), %rdi
call atexit@PLT
addq $8, %rsp
.cfi_def_cfa_offset 8
ret
.cfi_endproc
.LFE2090:
.size _ZL24__sti____cudaRegisterAllv, .-_ZL24__sti____cudaRegisterAllv
.section .init_array,"aw"
.align 8
.quad _ZL24__sti____cudaRegisterAllv
.section .nvFatBinSegment,"aw"
.align 8
.type _ZL15__fatDeviceText, @object
.size _ZL15__fatDeviceText, 24
_ZL15__fatDeviceText:
.long 1180844977
.long 1
.quad fatbinData
.quad 0
.local _ZL20__cudaFatCubinHandle
.comm _ZL20__cudaFatCubinHandle,8,8
.section .rodata.cst4,"aM",@progbits,4
.align 4
.LC0:
.long 1065353216
.align 4
.LC16:
.long 1229308160
.ident "GCC: (Ubuntu 13.3.0-6ubuntu2~24.04) 13.3.0"
.section .note.GNU-stack,"",@progbits
.section .note.gnu.property,"a"
.align 8
.long 1f - 0f
.long 4f - 1f
.long 5
0:
.string "GNU"
1:
.align 8
.long 0xc0000002
.long 3f - 2f
2:
.long 0x3
3:
.align 8
4: |
You are a helpful coding assistant specialized in converting CUDA source code to HIP/AMD source code. | /* File: mat_add.cu
* Purpose: Implement matrix addition on a gpu using cuda
*
* Output: Result of matrix addition.
*
* Notes:
* 1. There are m blocks with n threads each.
*/
#include <stdio.h>
#include <stdlib.h>
#include <math.h>
//#include "cuPrintf.cuh"
//#include "cuPrintf.cu"
//#include "utils/cuPrintf.cu"
/*---------------------------------------------------------------------
* Kernel: Mat_add
* Purpose: Implement matrix addition
* In args: A, B, m, n
* Out arg: C
*/
__global__ void rotMatFunc(float matIn[],
float matOut[],
int dimX,
int dimY,
float rotMat[]) {
// int y = blockIdx.y;
/// int x = blockIdx.x * blockDim.x + threadIdx.x;
int x = blockIdx.x * blockDim.x + threadIdx.x;
int y = blockIdx.y * blockDim.y + threadIdx.y;
if ( x >= dimX || y >= dimY)
return;
//printf("x,y = %d %d, blockIdx.x,y= %d %d, blockDim.x,y = %d %d, threadIdx.x,y= %d %d\n",
// x,y, blockIdx.x,blockIdx.y, blockDim.x,blockDim.y, threadIdx.x,threadIdx.y);
float xOut,yOut;
float xIn, yIn;
int iIn, jIn;
float dimXf=(float)dimX, dimYf=(float)dimY;
int x0=dimX/2, y0=dimY/2;
// xOut = (float)(x - x0)/dimXf;
// yOut = (float)(y - y0)/dimYf;
xOut = (float)(x - x0);
yOut = (float)(y - y0);
xIn = rotMat[0] * xOut + rotMat[1] * yOut;
yIn = rotMat[2] * xOut + rotMat[3] * yOut;
// iIn = int(xIn * dimXf + x0);
// jIn = int(yIn * dimYf + y0);
iIn = int(xIn + x0);
jIn = int(yIn + y0);
if ( iIn >= 0 &&
iIn < dimX &&
jIn >= 0 &&
jIn < dimY)
{
printf("x=%d y=%d iIn=%d jIn=%d in=%d, out=%d\n",x, y, iIn, jIn, iIn*dimY+jIn,x*dimY+y);
matOut[x*dimY+y] = matIn[iIn*dimY+jIn];
}
/*
int indexOfMatrixOut = y + x * dimY;
int x0=dimX/2, y0=dimY/2;//this may be passed
float xOut,yOut;
float xIn, yIn;
int iIn, jIn;
float dimXf=(float)dimX, dimYf=(float)dimY;
xOut = (float)(x - x0)/dimXf;
yOut = (float)(y - y0)/dimYf;
//printf("x=%d y=%d x0=%d dimXf=%f xOut=%f yOut=%f\n",x, y, x0, dimXf, xOut, yOut);
xIn = rotMat[0] * xOut + rotMat[1] * yOut;
yIn = rotMat[2] * xOut + rotMat[3] * yOut;
//printf("x =%d y=%d xIn=%f yIn=%f\n",x, y, xIn, yIn);
iIn = int(xIn * dimXf + x0);
jIn = int(yIn * dimYf + y0);
int indexOfMatrixIn = jIn + iIn * dimY;
if ( iIn >= 0 &&
iIn < dimX &&
jIn >= 0 &&
jIn < dimY)
{
matOut[indexOfMatrixOut] = matIn[indexOfMatrixIn];
printf("x=%d y=%d in=%d, out=%d vI=%f vO=%f\n",x, y, indexOfMatrixIn,indexOfMatrixOut,
matIn[indexOfMatrixIn], matOut[indexOfMatrixOut]);
}
*/
} /* Mat_add */
/*---------------------------------------------------------------------
* Function: Fill_matrix
* Purpose: Fill an m x n matrix with random values
* In args: m, n
* Out arg: A
*/
void Fill_matrix(float A[], int dimX, int dimY) {
int i, j;
//numVec, dimVec
for (i = 0; i < dimX; i++)
for (j = 0; j < dimY; j++)
if(i==j )//or (i+j)==(dimX+1))
A[i*dimY+j]=1.0f;
else
A[i*dimY+j]=0.0f;
} /* Read_matrix */
/*---------------------------------------------------------------------
* Function: Print_matrix
* Purpose: Print an m x n matrix to stdout
* In args: title, A, m, n
*/
void Print_matrix(const char title[], float A[], int numVec, int dimVec, int m, int n) {
int i, j;
//numVec, dimVec
printf("%s\n", title);
for (i = 0; i < m; i++) {
for (j = 0; j < n; j++)
printf("%.2f ", A[i*dimVec+j]);
printf("\n");
}
} /* Print_matrix */
void checkError(cudaError_t error, const char function[])
{
if(error != cudaSuccess)
{
printf("\"%s\" has a problem with error code %d and desc: %s\n", function, error, cudaGetErrorString(error));
exit(-1);
}
}
bool checkIfMatricesEqual(float * mat1, float * mat2, float matSize)
{
int i = 0;
for( ; i < matSize; i++)
if(mat1[i] != mat2[i]){
printf("values different for i: %d\n", i);
printf("mat1[i] = %d, mat2[i] = %d\n", mat1[i], mat2[i]);
return false;
}
return true;
}
void rotateCPU(float matIn[],
float matOut[], int dimX, int dimY,
float rotMat[])
{
//float fX0,fY0;
int x0=dimX/2, y0=dimY/2;
//fX0 = (float)iX0;
//fY0 = (float)iY0;
float xOut,yOut;
float xIn, yIn;
int iIn, jIn;
float dimXf=(float)dimX, dimYf=(float)dimY;
for(int x = 0 ; x < dimX; ++x)
for(int y = 0 ; y < dimY; ++y){
xOut = (float)(x - x0)/dimXf;
yOut = (float)(y - y0)/dimYf;
xIn = rotMat[0] * xOut + rotMat[1] * yOut;
yIn = rotMat[2] * xOut + rotMat[3] * yOut;
iIn = int(xIn * dimXf + x0);
jIn = int(yIn * dimYf + y0);
if ( iIn >= 0 &&
iIn < dimX &&
jIn >= 0 &&
jIn < dimY)
matOut[x*dimY+y] = matIn[iIn*dimY+jIn];
}
}
/* Host code */
int main(int argc, char* argv[]) {
size_t dimX = 900;//mat size
size_t dimY = 900;
size_t gridX = 9;//mat size
size_t gridY = 9;
// variables for threads per block, number of blocks.
int threadsPerBlock = 32;//, blocksInGrid = 0;
//threadsPerBlock = min(_dimY, _dimY);
//create cuda event variables
cudaEvent_t hostStart, hostStop, deviceStart, deviceStop;
float timeDifferenceOnHost, timeDifferenceOnDevice;
//initialize cuda timing variables
cudaEventCreate(&hostStart);
cudaEventCreate(&hostStop);
cudaEventCreate(&deviceStart);
cudaEventCreate(&deviceStop);
float *h_A, *h_B, *h_B2, *h_rotMat;//PC
float *d_A, *d_B, *d_rotMat;//GPU
size_t size, matrixSize;
/* Get size of matrices */
matrixSize = dimX*dimY;
size = matrixSize*sizeof(float);
h_A = (float*) calloc(size,1);
h_B = (float*) calloc(size,1);
h_B2 = (float*) calloc(size,1);
h_rotMat = (float*) calloc(4*sizeof(float),1);
Fill_matrix(h_A, dimX, dimY);
//init rot Matrix
h_rotMat[0] = 0.f;
h_rotMat[1] = -1.f;
//h_rotMat[0] = 0.936f;
//h_rotMat[1] = 0.352f;
h_rotMat[2] = -h_rotMat[1];
h_rotMat[3] = h_rotMat[0];
Print_matrix("A =", h_A, dimX, dimY, 9, 9);
printf("Rotating matrices on CPU...\n");
cudaEventRecord(hostStart, 0);
//rotate matrix using CPU
rotateCPU(h_A ,h_B2, dimX, dimY, h_rotMat);
//////////
cudaEventRecord(hostStop, 0);
cudaEventElapsedTime(&timeDifferenceOnHost, hostStart, hostStop);
printf("Matrix rotation over. Time taken on CPU: %5.5f\n",
timeDifferenceOnHost);
Print_matrix("B2(CPU) =", h_B2, dimX, dimY, 9, 9);
/* Allocate matrices in device memory */
cudaMalloc(&d_A, size);
cudaMalloc(&d_B, size);
cudaMalloc(&d_rotMat, 4*sizeof(float));
/* Copy matrices from host memory to device memory */
cudaMemcpy(d_A, h_A, size, cudaMemcpyHostToDevice);
cudaMemcpy(d_B, h_B, size, cudaMemcpyHostToDevice);
cudaMemcpy(d_rotMat, h_rotMat, 4*sizeof(float), cudaMemcpyHostToDevice);
//create a proper grid block using dim3
/* Invoke kernel using dimX * dimY thread blocks, each of */
/* which contains threadsPerBlock threads */
dim3 block(threadsPerBlock, threadsPerBlock);
dim3 grid( (gridX+threadsPerBlock-1)/threadsPerBlock,
(gridY+threadsPerBlock-1)/threadsPerBlock );
cudaEventRecord(deviceStart, 0);
rotMatFunc<<<grid, block>>>(d_A, d_B, dimX, dimY, d_rotMat);
cudaError_t code=cudaGetLastError();
if (code)
printf("error=%s",cudaGetErrorString(code));
else
printf("code=%d",code);
cudaDeviceSynchronize();
cudaEventRecord(deviceStop, 0);
/* Wait for the kernel to complete */
cudaThreadSynchronize();
cudaEventElapsedTime(&timeDifferenceOnDevice, deviceStart, deviceStop);
/* Copy result from device memory to host memory */
checkError(cudaMemcpy(h_B, d_B, size, cudaMemcpyDeviceToHost), "Matrix B Copy from device to Host");
if(checkIfMatricesEqual(h_B, h_B2, matrixSize))
printf("Kernels correct!\n");
else
printf("Kernel logic wrong!\n");
printf("Finished addition on GPU. Time taken: %5.5f\n", timeDifferenceOnDevice);
printf("Speedup: %5.5f\n", (float)timeDifferenceOnHost/timeDifferenceOnDevice);
Print_matrix("The rotated image(CPU) is: ", h_B2, dimX, dimY, 9, 9);
Print_matrix("The rotated image(GPU) is: ", h_B, dimX, dimY, 9, 9);
/* Free device memory */
cudaFree(d_A);
cudaFree(d_B);
/* Free host memory */
free(h_A);
free(h_B);
free(h_B2);
return 0;
} /* main */ | /* File: mat_add.cu
* Purpose: Implement matrix addition on a gpu using cuda
*
* Output: Result of matrix addition.
*
* Notes:
* 1. There are m blocks with n threads each.
*/
#include <hip/hip_runtime.h>
#include <stdio.h>
#include <stdlib.h>
#include <math.h>
//#include "cuPrintf.cuh"
//#include "cuPrintf.cu"
//#include "utils/cuPrintf.cu"
/*---------------------------------------------------------------------
* Kernel: Mat_add
* Purpose: Implement matrix addition
* In args: A, B, m, n
* Out arg: C
*/
__global__ void rotMatFunc(float matIn[],
float matOut[],
int dimX,
int dimY,
float rotMat[]) {
// int y = blockIdx.y;
/// int x = blockIdx.x * blockDim.x + threadIdx.x;
int x = blockIdx.x * blockDim.x + threadIdx.x;
int y = blockIdx.y * blockDim.y + threadIdx.y;
if ( x >= dimX || y >= dimY)
return;
//printf("x,y = %d %d, blockIdx.x,y= %d %d, blockDim.x,y = %d %d, threadIdx.x,y= %d %d\n",
// x,y, blockIdx.x,blockIdx.y, blockDim.x,blockDim.y, threadIdx.x,threadIdx.y);
float xOut,yOut;
float xIn, yIn;
int iIn, jIn;
float dimXf=(float)dimX, dimYf=(float)dimY;
int x0=dimX/2, y0=dimY/2;
// xOut = (float)(x - x0)/dimXf;
// yOut = (float)(y - y0)/dimYf;
xOut = (float)(x - x0);
yOut = (float)(y - y0);
xIn = rotMat[0] * xOut + rotMat[1] * yOut;
yIn = rotMat[2] * xOut + rotMat[3] * yOut;
// iIn = int(xIn * dimXf + x0);
// jIn = int(yIn * dimYf + y0);
iIn = int(xIn + x0);
jIn = int(yIn + y0);
if ( iIn >= 0 &&
iIn < dimX &&
jIn >= 0 &&
jIn < dimY)
{
printf("x=%d y=%d iIn=%d jIn=%d in=%d, out=%d\n",x, y, iIn, jIn, iIn*dimY+jIn,x*dimY+y);
matOut[x*dimY+y] = matIn[iIn*dimY+jIn];
}
/*
int indexOfMatrixOut = y + x * dimY;
int x0=dimX/2, y0=dimY/2;//this may be passed
float xOut,yOut;
float xIn, yIn;
int iIn, jIn;
float dimXf=(float)dimX, dimYf=(float)dimY;
xOut = (float)(x - x0)/dimXf;
yOut = (float)(y - y0)/dimYf;
//printf("x=%d y=%d x0=%d dimXf=%f xOut=%f yOut=%f\n",x, y, x0, dimXf, xOut, yOut);
xIn = rotMat[0] * xOut + rotMat[1] * yOut;
yIn = rotMat[2] * xOut + rotMat[3] * yOut;
//printf("x =%d y=%d xIn=%f yIn=%f\n",x, y, xIn, yIn);
iIn = int(xIn * dimXf + x0);
jIn = int(yIn * dimYf + y0);
int indexOfMatrixIn = jIn + iIn * dimY;
if ( iIn >= 0 &&
iIn < dimX &&
jIn >= 0 &&
jIn < dimY)
{
matOut[indexOfMatrixOut] = matIn[indexOfMatrixIn];
printf("x=%d y=%d in=%d, out=%d vI=%f vO=%f\n",x, y, indexOfMatrixIn,indexOfMatrixOut,
matIn[indexOfMatrixIn], matOut[indexOfMatrixOut]);
}
*/
} /* Mat_add */
/*---------------------------------------------------------------------
* Function: Fill_matrix
* Purpose: Fill an m x n matrix with random values
* In args: m, n
* Out arg: A
*/
void Fill_matrix(float A[], int dimX, int dimY) {
int i, j;
//numVec, dimVec
for (i = 0; i < dimX; i++)
for (j = 0; j < dimY; j++)
if(i==j )//or (i+j)==(dimX+1))
A[i*dimY+j]=1.0f;
else
A[i*dimY+j]=0.0f;
} /* Read_matrix */
/*---------------------------------------------------------------------
* Function: Print_matrix
* Purpose: Print an m x n matrix to stdout
* In args: title, A, m, n
*/
void Print_matrix(const char title[], float A[], int numVec, int dimVec, int m, int n) {
int i, j;
//numVec, dimVec
printf("%s\n", title);
for (i = 0; i < m; i++) {
for (j = 0; j < n; j++)
printf("%.2f ", A[i*dimVec+j]);
printf("\n");
}
} /* Print_matrix */
void checkError(hipError_t error, const char function[])
{
if(error != hipSuccess)
{
printf("\"%s\" has a problem with error code %d and desc: %s\n", function, error, hipGetErrorString(error));
exit(-1);
}
}
bool checkIfMatricesEqual(float * mat1, float * mat2, float matSize)
{
int i = 0;
for( ; i < matSize; i++)
if(mat1[i] != mat2[i]){
printf("values different for i: %d\n", i);
printf("mat1[i] = %d, mat2[i] = %d\n", mat1[i], mat2[i]);
return false;
}
return true;
}
void rotateCPU(float matIn[],
float matOut[], int dimX, int dimY,
float rotMat[])
{
//float fX0,fY0;
int x0=dimX/2, y0=dimY/2;
//fX0 = (float)iX0;
//fY0 = (float)iY0;
float xOut,yOut;
float xIn, yIn;
int iIn, jIn;
float dimXf=(float)dimX, dimYf=(float)dimY;
for(int x = 0 ; x < dimX; ++x)
for(int y = 0 ; y < dimY; ++y){
xOut = (float)(x - x0)/dimXf;
yOut = (float)(y - y0)/dimYf;
xIn = rotMat[0] * xOut + rotMat[1] * yOut;
yIn = rotMat[2] * xOut + rotMat[3] * yOut;
iIn = int(xIn * dimXf + x0);
jIn = int(yIn * dimYf + y0);
if ( iIn >= 0 &&
iIn < dimX &&
jIn >= 0 &&
jIn < dimY)
matOut[x*dimY+y] = matIn[iIn*dimY+jIn];
}
}
/* Host code */
int main(int argc, char* argv[]) {
size_t dimX = 900;//mat size
size_t dimY = 900;
size_t gridX = 9;//mat size
size_t gridY = 9;
// variables for threads per block, number of blocks.
int threadsPerBlock = 32;//, blocksInGrid = 0;
//threadsPerBlock = min(_dimY, _dimY);
//create cuda event variables
hipEvent_t hostStart, hostStop, deviceStart, deviceStop;
float timeDifferenceOnHost, timeDifferenceOnDevice;
//initialize cuda timing variables
hipEventCreate(&hostStart);
hipEventCreate(&hostStop);
hipEventCreate(&deviceStart);
hipEventCreate(&deviceStop);
float *h_A, *h_B, *h_B2, *h_rotMat;//PC
float *d_A, *d_B, *d_rotMat;//GPU
size_t size, matrixSize;
/* Get size of matrices */
matrixSize = dimX*dimY;
size = matrixSize*sizeof(float);
h_A = (float*) calloc(size,1);
h_B = (float*) calloc(size,1);
h_B2 = (float*) calloc(size,1);
h_rotMat = (float*) calloc(4*sizeof(float),1);
Fill_matrix(h_A, dimX, dimY);
//init rot Matrix
h_rotMat[0] = 0.f;
h_rotMat[1] = -1.f;
//h_rotMat[0] = 0.936f;
//h_rotMat[1] = 0.352f;
h_rotMat[2] = -h_rotMat[1];
h_rotMat[3] = h_rotMat[0];
Print_matrix("A =", h_A, dimX, dimY, 9, 9);
printf("Rotating matrices on CPU...\n");
hipEventRecord(hostStart, 0);
//rotate matrix using CPU
rotateCPU(h_A ,h_B2, dimX, dimY, h_rotMat);
//////////
hipEventRecord(hostStop, 0);
hipEventElapsedTime(&timeDifferenceOnHost, hostStart, hostStop);
printf("Matrix rotation over. Time taken on CPU: %5.5f\n",
timeDifferenceOnHost);
Print_matrix("B2(CPU) =", h_B2, dimX, dimY, 9, 9);
/* Allocate matrices in device memory */
hipMalloc(&d_A, size);
hipMalloc(&d_B, size);
hipMalloc(&d_rotMat, 4*sizeof(float));
/* Copy matrices from host memory to device memory */
hipMemcpy(d_A, h_A, size, hipMemcpyHostToDevice);
hipMemcpy(d_B, h_B, size, hipMemcpyHostToDevice);
hipMemcpy(d_rotMat, h_rotMat, 4*sizeof(float), hipMemcpyHostToDevice);
//create a proper grid block using dim3
/* Invoke kernel using dimX * dimY thread blocks, each of */
/* which contains threadsPerBlock threads */
dim3 block(threadsPerBlock, threadsPerBlock);
dim3 grid( (gridX+threadsPerBlock-1)/threadsPerBlock,
(gridY+threadsPerBlock-1)/threadsPerBlock );
hipEventRecord(deviceStart, 0);
rotMatFunc<<<grid, block>>>(d_A, d_B, dimX, dimY, d_rotMat);
hipError_t code=hipGetLastError();
if (code)
printf("error=%s",hipGetErrorString(code));
else
printf("code=%d",code);
hipDeviceSynchronize();
hipEventRecord(deviceStop, 0);
/* Wait for the kernel to complete */
hipDeviceSynchronize();
hipEventElapsedTime(&timeDifferenceOnDevice, deviceStart, deviceStop);
/* Copy result from device memory to host memory */
checkError(hipMemcpy(h_B, d_B, size, hipMemcpyDeviceToHost), "Matrix B Copy from device to Host");
if(checkIfMatricesEqual(h_B, h_B2, matrixSize))
printf("Kernels correct!\n");
else
printf("Kernel logic wrong!\n");
printf("Finished addition on GPU. Time taken: %5.5f\n", timeDifferenceOnDevice);
printf("Speedup: %5.5f\n", (float)timeDifferenceOnHost/timeDifferenceOnDevice);
Print_matrix("The rotated image(CPU) is: ", h_B2, dimX, dimY, 9, 9);
Print_matrix("The rotated image(GPU) is: ", h_B, dimX, dimY, 9, 9);
/* Free device memory */
hipFree(d_A);
hipFree(d_B);
/* Free host memory */
free(h_A);
free(h_B);
free(h_B2);
return 0;
} /* main */ |
You are a helpful coding assistant specialized in converting HIP source code to AMD host assembly. | /* File: mat_add.cu
* Purpose: Implement matrix addition on a gpu using cuda
*
* Output: Result of matrix addition.
*
* Notes:
* 1. There are m blocks with n threads each.
*/
#include <hip/hip_runtime.h>
#include <stdio.h>
#include <stdlib.h>
#include <math.h>
//#include "cuPrintf.cuh"
//#include "cuPrintf.cu"
//#include "utils/cuPrintf.cu"
/*---------------------------------------------------------------------
* Kernel: Mat_add
* Purpose: Implement matrix addition
* In args: A, B, m, n
* Out arg: C
*/
__global__ void rotMatFunc(float matIn[],
float matOut[],
int dimX,
int dimY,
float rotMat[]) {
// int y = blockIdx.y;
/// int x = blockIdx.x * blockDim.x + threadIdx.x;
int x = blockIdx.x * blockDim.x + threadIdx.x;
int y = blockIdx.y * blockDim.y + threadIdx.y;
if ( x >= dimX || y >= dimY)
return;
//printf("x,y = %d %d, blockIdx.x,y= %d %d, blockDim.x,y = %d %d, threadIdx.x,y= %d %d\n",
// x,y, blockIdx.x,blockIdx.y, blockDim.x,blockDim.y, threadIdx.x,threadIdx.y);
float xOut,yOut;
float xIn, yIn;
int iIn, jIn;
float dimXf=(float)dimX, dimYf=(float)dimY;
int x0=dimX/2, y0=dimY/2;
// xOut = (float)(x - x0)/dimXf;
// yOut = (float)(y - y0)/dimYf;
xOut = (float)(x - x0);
yOut = (float)(y - y0);
xIn = rotMat[0] * xOut + rotMat[1] * yOut;
yIn = rotMat[2] * xOut + rotMat[3] * yOut;
// iIn = int(xIn * dimXf + x0);
// jIn = int(yIn * dimYf + y0);
iIn = int(xIn + x0);
jIn = int(yIn + y0);
if ( iIn >= 0 &&
iIn < dimX &&
jIn >= 0 &&
jIn < dimY)
{
printf("x=%d y=%d iIn=%d jIn=%d in=%d, out=%d\n",x, y, iIn, jIn, iIn*dimY+jIn,x*dimY+y);
matOut[x*dimY+y] = matIn[iIn*dimY+jIn];
}
/*
int indexOfMatrixOut = y + x * dimY;
int x0=dimX/2, y0=dimY/2;//this may be passed
float xOut,yOut;
float xIn, yIn;
int iIn, jIn;
float dimXf=(float)dimX, dimYf=(float)dimY;
xOut = (float)(x - x0)/dimXf;
yOut = (float)(y - y0)/dimYf;
//printf("x=%d y=%d x0=%d dimXf=%f xOut=%f yOut=%f\n",x, y, x0, dimXf, xOut, yOut);
xIn = rotMat[0] * xOut + rotMat[1] * yOut;
yIn = rotMat[2] * xOut + rotMat[3] * yOut;
//printf("x =%d y=%d xIn=%f yIn=%f\n",x, y, xIn, yIn);
iIn = int(xIn * dimXf + x0);
jIn = int(yIn * dimYf + y0);
int indexOfMatrixIn = jIn + iIn * dimY;
if ( iIn >= 0 &&
iIn < dimX &&
jIn >= 0 &&
jIn < dimY)
{
matOut[indexOfMatrixOut] = matIn[indexOfMatrixIn];
printf("x=%d y=%d in=%d, out=%d vI=%f vO=%f\n",x, y, indexOfMatrixIn,indexOfMatrixOut,
matIn[indexOfMatrixIn], matOut[indexOfMatrixOut]);
}
*/
} /* Mat_add */
/*---------------------------------------------------------------------
* Function: Fill_matrix
* Purpose: Fill an m x n matrix with random values
* In args: m, n
* Out arg: A
*/
void Fill_matrix(float A[], int dimX, int dimY) {
int i, j;
//numVec, dimVec
for (i = 0; i < dimX; i++)
for (j = 0; j < dimY; j++)
if(i==j )//or (i+j)==(dimX+1))
A[i*dimY+j]=1.0f;
else
A[i*dimY+j]=0.0f;
} /* Read_matrix */
/*---------------------------------------------------------------------
* Function: Print_matrix
* Purpose: Print an m x n matrix to stdout
* In args: title, A, m, n
*/
void Print_matrix(const char title[], float A[], int numVec, int dimVec, int m, int n) {
int i, j;
//numVec, dimVec
printf("%s\n", title);
for (i = 0; i < m; i++) {
for (j = 0; j < n; j++)
printf("%.2f ", A[i*dimVec+j]);
printf("\n");
}
} /* Print_matrix */
void checkError(hipError_t error, const char function[])
{
if(error != hipSuccess)
{
printf("\"%s\" has a problem with error code %d and desc: %s\n", function, error, hipGetErrorString(error));
exit(-1);
}
}
bool checkIfMatricesEqual(float * mat1, float * mat2, float matSize)
{
int i = 0;
for( ; i < matSize; i++)
if(mat1[i] != mat2[i]){
printf("values different for i: %d\n", i);
printf("mat1[i] = %d, mat2[i] = %d\n", mat1[i], mat2[i]);
return false;
}
return true;
}
void rotateCPU(float matIn[],
float matOut[], int dimX, int dimY,
float rotMat[])
{
//float fX0,fY0;
int x0=dimX/2, y0=dimY/2;
//fX0 = (float)iX0;
//fY0 = (float)iY0;
float xOut,yOut;
float xIn, yIn;
int iIn, jIn;
float dimXf=(float)dimX, dimYf=(float)dimY;
for(int x = 0 ; x < dimX; ++x)
for(int y = 0 ; y < dimY; ++y){
xOut = (float)(x - x0)/dimXf;
yOut = (float)(y - y0)/dimYf;
xIn = rotMat[0] * xOut + rotMat[1] * yOut;
yIn = rotMat[2] * xOut + rotMat[3] * yOut;
iIn = int(xIn * dimXf + x0);
jIn = int(yIn * dimYf + y0);
if ( iIn >= 0 &&
iIn < dimX &&
jIn >= 0 &&
jIn < dimY)
matOut[x*dimY+y] = matIn[iIn*dimY+jIn];
}
}
/* Host code */
int main(int argc, char* argv[]) {
size_t dimX = 900;//mat size
size_t dimY = 900;
size_t gridX = 9;//mat size
size_t gridY = 9;
// variables for threads per block, number of blocks.
int threadsPerBlock = 32;//, blocksInGrid = 0;
//threadsPerBlock = min(_dimY, _dimY);
//create cuda event variables
hipEvent_t hostStart, hostStop, deviceStart, deviceStop;
float timeDifferenceOnHost, timeDifferenceOnDevice;
//initialize cuda timing variables
hipEventCreate(&hostStart);
hipEventCreate(&hostStop);
hipEventCreate(&deviceStart);
hipEventCreate(&deviceStop);
float *h_A, *h_B, *h_B2, *h_rotMat;//PC
float *d_A, *d_B, *d_rotMat;//GPU
size_t size, matrixSize;
/* Get size of matrices */
matrixSize = dimX*dimY;
size = matrixSize*sizeof(float);
h_A = (float*) calloc(size,1);
h_B = (float*) calloc(size,1);
h_B2 = (float*) calloc(size,1);
h_rotMat = (float*) calloc(4*sizeof(float),1);
Fill_matrix(h_A, dimX, dimY);
//init rot Matrix
h_rotMat[0] = 0.f;
h_rotMat[1] = -1.f;
//h_rotMat[0] = 0.936f;
//h_rotMat[1] = 0.352f;
h_rotMat[2] = -h_rotMat[1];
h_rotMat[3] = h_rotMat[0];
Print_matrix("A =", h_A, dimX, dimY, 9, 9);
printf("Rotating matrices on CPU...\n");
hipEventRecord(hostStart, 0);
//rotate matrix using CPU
rotateCPU(h_A ,h_B2, dimX, dimY, h_rotMat);
//////////
hipEventRecord(hostStop, 0);
hipEventElapsedTime(&timeDifferenceOnHost, hostStart, hostStop);
printf("Matrix rotation over. Time taken on CPU: %5.5f\n",
timeDifferenceOnHost);
Print_matrix("B2(CPU) =", h_B2, dimX, dimY, 9, 9);
/* Allocate matrices in device memory */
hipMalloc(&d_A, size);
hipMalloc(&d_B, size);
hipMalloc(&d_rotMat, 4*sizeof(float));
/* Copy matrices from host memory to device memory */
hipMemcpy(d_A, h_A, size, hipMemcpyHostToDevice);
hipMemcpy(d_B, h_B, size, hipMemcpyHostToDevice);
hipMemcpy(d_rotMat, h_rotMat, 4*sizeof(float), hipMemcpyHostToDevice);
//create a proper grid block using dim3
/* Invoke kernel using dimX * dimY thread blocks, each of */
/* which contains threadsPerBlock threads */
dim3 block(threadsPerBlock, threadsPerBlock);
dim3 grid( (gridX+threadsPerBlock-1)/threadsPerBlock,
(gridY+threadsPerBlock-1)/threadsPerBlock );
hipEventRecord(deviceStart, 0);
rotMatFunc<<<grid, block>>>(d_A, d_B, dimX, dimY, d_rotMat);
hipError_t code=hipGetLastError();
if (code)
printf("error=%s",hipGetErrorString(code));
else
printf("code=%d",code);
hipDeviceSynchronize();
hipEventRecord(deviceStop, 0);
/* Wait for the kernel to complete */
hipDeviceSynchronize();
hipEventElapsedTime(&timeDifferenceOnDevice, deviceStart, deviceStop);
/* Copy result from device memory to host memory */
checkError(hipMemcpy(h_B, d_B, size, hipMemcpyDeviceToHost), "Matrix B Copy from device to Host");
if(checkIfMatricesEqual(h_B, h_B2, matrixSize))
printf("Kernels correct!\n");
else
printf("Kernel logic wrong!\n");
printf("Finished addition on GPU. Time taken: %5.5f\n", timeDifferenceOnDevice);
printf("Speedup: %5.5f\n", (float)timeDifferenceOnHost/timeDifferenceOnDevice);
Print_matrix("The rotated image(CPU) is: ", h_B2, dimX, dimY, 9, 9);
Print_matrix("The rotated image(GPU) is: ", h_B, dimX, dimY, 9, 9);
/* Free device memory */
hipFree(d_A);
hipFree(d_B);
/* Free host memory */
free(h_A);
free(h_B);
free(h_B2);
return 0;
} /* main */ | .text
.file "matAdd.hip"
.globl _Z25__device_stub__rotMatFuncPfS_iiS_ # -- Begin function _Z25__device_stub__rotMatFuncPfS_iiS_
.p2align 4, 0x90
.type _Z25__device_stub__rotMatFuncPfS_iiS_,@function
_Z25__device_stub__rotMatFuncPfS_iiS_: # @_Z25__device_stub__rotMatFuncPfS_iiS_
.cfi_startproc
# %bb.0:
subq $120, %rsp
.cfi_def_cfa_offset 128
movq %rdi, 72(%rsp)
movq %rsi, 64(%rsp)
movl %edx, 4(%rsp)
movl %ecx, (%rsp)
movq %r8, 56(%rsp)
leaq 72(%rsp), %rax
movq %rax, 80(%rsp)
leaq 64(%rsp), %rax
movq %rax, 88(%rsp)
leaq 4(%rsp), %rax
movq %rax, 96(%rsp)
movq %rsp, %rax
movq %rax, 104(%rsp)
leaq 56(%rsp), %rax
movq %rax, 112(%rsp)
leaq 40(%rsp), %rdi
leaq 24(%rsp), %rsi
leaq 16(%rsp), %rdx
leaq 8(%rsp), %rcx
callq __hipPopCallConfiguration
movq 40(%rsp), %rsi
movl 48(%rsp), %edx
movq 24(%rsp), %rcx
movl 32(%rsp), %r8d
leaq 80(%rsp), %r9
movl $_Z10rotMatFuncPfS_iiS_, %edi
pushq 8(%rsp)
.cfi_adjust_cfa_offset 8
pushq 24(%rsp)
.cfi_adjust_cfa_offset 8
callq hipLaunchKernel
addq $136, %rsp
.cfi_adjust_cfa_offset -136
retq
.Lfunc_end0:
.size _Z25__device_stub__rotMatFuncPfS_iiS_, .Lfunc_end0-_Z25__device_stub__rotMatFuncPfS_iiS_
.cfi_endproc
# -- End function
.section .rodata.cst4,"aM",@progbits,4
.p2align 2, 0x0 # -- Begin function _Z11Fill_matrixPfii
.LCPI1_0:
.long 0x3f800000 # float 1
.text
.globl _Z11Fill_matrixPfii
.p2align 4, 0x90
.type _Z11Fill_matrixPfii,@function
_Z11Fill_matrixPfii: # @_Z11Fill_matrixPfii
.cfi_startproc
# %bb.0:
testl %esi, %esi
jle .LBB1_8
# %bb.1: # %.preheader.lr.ph
movl %esi, %eax
movl %edx, %ecx
xorl %esi, %esi
movss .LCPI1_0(%rip), %xmm0 # xmm0 = mem[0],zero,zero,zero
xorl %r8d, %r8d
jmp .LBB1_2
.p2align 4, 0x90
.LBB1_7: # %._crit_edge
# in Loop: Header=BB1_2 Depth=1
incq %r8
addl %edx, %esi
cmpq %rax, %r8
je .LBB1_8
.LBB1_2: # %.preheader
# =>This Loop Header: Depth=1
# Child Loop BB1_4 Depth 2
testl %edx, %edx
jle .LBB1_7
# %bb.3: # %.lr.ph
# in Loop: Header=BB1_2 Depth=1
movl %esi, %r9d
leaq (%rdi,%r9,4), %r9
xorl %r10d, %r10d
jmp .LBB1_4
.p2align 4, 0x90
.LBB1_6: # in Loop: Header=BB1_4 Depth=2
movss %xmm1, (%r9,%r10,4)
incq %r10
cmpq %r10, %rcx
je .LBB1_7
.LBB1_4: # Parent Loop BB1_2 Depth=1
# => This Inner Loop Header: Depth=2
movaps %xmm0, %xmm1
cmpq %r10, %r8
je .LBB1_6
# %bb.5: # in Loop: Header=BB1_4 Depth=2
xorps %xmm1, %xmm1
jmp .LBB1_6
.LBB1_8: # %._crit_edge19
retq
.Lfunc_end1:
.size _Z11Fill_matrixPfii, .Lfunc_end1-_Z11Fill_matrixPfii
.cfi_endproc
# -- End function
.globl _Z12Print_matrixPKcPfiiii # -- Begin function _Z12Print_matrixPKcPfiiii
.p2align 4, 0x90
.type _Z12Print_matrixPKcPfiiii,@function
_Z12Print_matrixPKcPfiiii: # @_Z12Print_matrixPKcPfiiii
.cfi_startproc
# %bb.0:
pushq %rbp
.cfi_def_cfa_offset 16
pushq %r15
.cfi_def_cfa_offset 24
pushq %r14
.cfi_def_cfa_offset 32
pushq %r13
.cfi_def_cfa_offset 40
pushq %r12
.cfi_def_cfa_offset 48
pushq %rbx
.cfi_def_cfa_offset 56
pushq %rax
.cfi_def_cfa_offset 64
.cfi_offset %rbx, -56
.cfi_offset %r12, -48
.cfi_offset %r13, -40
.cfi_offset %r14, -32
.cfi_offset %r15, -24
.cfi_offset %rbp, -16
movl %r9d, 4(%rsp) # 4-byte Spill
movl %r8d, %ebp
movl %ecx, %r15d
movq %rsi, %r14
callq puts@PLT
testl %ebp, %ebp
jle .LBB2_6
# %bb.1: # %.preheader.lr.ph
movslq %r15d, %r15
movl %ebp, %r12d
movl 4(%rsp), %r13d # 4-byte Reload
shlq $2, %r15
xorl %ebp, %ebp
jmp .LBB2_2
.p2align 4, 0x90
.LBB2_5: # %._crit_edge
# in Loop: Header=BB2_2 Depth=1
movl $10, %edi
callq putchar@PLT
incq %rbp
addq %r15, %r14
cmpq %r12, %rbp
je .LBB2_6
.LBB2_2: # %.preheader
# =>This Loop Header: Depth=1
# Child Loop BB2_4 Depth 2
cmpl $0, 4(%rsp) # 4-byte Folded Reload
jle .LBB2_5
# %bb.3: # %.lr.ph
# in Loop: Header=BB2_2 Depth=1
xorl %ebx, %ebx
.p2align 4, 0x90
.LBB2_4: # Parent Loop BB2_2 Depth=1
# => This Inner Loop Header: Depth=2
movss (%r14,%rbx,4), %xmm0 # xmm0 = mem[0],zero,zero,zero
cvtss2sd %xmm0, %xmm0
movl $.L.str.1, %edi
movb $1, %al
callq printf
incq %rbx
cmpq %rbx, %r13
jne .LBB2_4
jmp .LBB2_5
.LBB2_6: # %._crit_edge13
addq $8, %rsp
.cfi_def_cfa_offset 56
popq %rbx
.cfi_def_cfa_offset 48
popq %r12
.cfi_def_cfa_offset 40
popq %r13
.cfi_def_cfa_offset 32
popq %r14
.cfi_def_cfa_offset 24
popq %r15
.cfi_def_cfa_offset 16
popq %rbp
.cfi_def_cfa_offset 8
retq
.Lfunc_end2:
.size _Z12Print_matrixPKcPfiiii, .Lfunc_end2-_Z12Print_matrixPKcPfiiii
.cfi_endproc
# -- End function
.globl _Z10checkError10hipError_tPKc # -- Begin function _Z10checkError10hipError_tPKc
.p2align 4, 0x90
.type _Z10checkError10hipError_tPKc,@function
_Z10checkError10hipError_tPKc: # @_Z10checkError10hipError_tPKc
.cfi_startproc
# %bb.0:
testl %edi, %edi
jne .LBB3_2
# %bb.1:
retq
.LBB3_2:
pushq %r14
.cfi_def_cfa_offset 16
pushq %rbx
.cfi_def_cfa_offset 24
pushq %rax
.cfi_def_cfa_offset 32
.cfi_offset %rbx, -24
.cfi_offset %r14, -16
movl %edi, %ebx
movq %rsi, %r14
callq hipGetErrorString
movl $.L.str.3, %edi
movq %r14, %rsi
movl %ebx, %edx
movq %rax, %rcx
xorl %eax, %eax
callq printf
movl $-1, %edi
callq exit
.Lfunc_end3:
.size _Z10checkError10hipError_tPKc, .Lfunc_end3-_Z10checkError10hipError_tPKc
.cfi_endproc
# -- End function
.globl _Z20checkIfMatricesEqualPfS_f # -- Begin function _Z20checkIfMatricesEqualPfS_f
.p2align 4, 0x90
.type _Z20checkIfMatricesEqualPfS_f,@function
_Z20checkIfMatricesEqualPfS_f: # @_Z20checkIfMatricesEqualPfS_f
.cfi_startproc
# %bb.0:
pushq %r15
.cfi_def_cfa_offset 16
pushq %r14
.cfi_def_cfa_offset 24
pushq %r12
.cfi_def_cfa_offset 32
pushq %rbx
.cfi_def_cfa_offset 40
pushq %rax
.cfi_def_cfa_offset 48
.cfi_offset %rbx, -40
.cfi_offset %r12, -32
.cfi_offset %r14, -24
.cfi_offset %r15, -16
xorps %xmm1, %xmm1
ucomiss %xmm1, %xmm0
setbe %bl
jbe .LBB4_8
# %bb.1: # %.lr.ph.preheader
movq %rsi, %r14
movq %rdi, %r15
movss (%rdi), %xmm1 # xmm1 = mem[0],zero,zero,zero
ucomiss (%rsi), %xmm1
jne .LBB4_2
jnp .LBB4_6
.LBB4_2:
xorl %r12d, %r12d
jmp .LBB4_5
.LBB4_6: # %.lr.ph29.preheader
movl $1, %eax
.p2align 4, 0x90
.LBB4_7: # %.lr.ph29
# =>This Inner Loop Header: Depth=1
xorps %xmm1, %xmm1
cvtsi2ss %eax, %xmm1
ucomiss %xmm1, %xmm0
setbe %bl
jbe .LBB4_8
# %bb.3: # %.lr.ph
# in Loop: Header=BB4_7 Depth=1
movss (%r15,%rax,4), %xmm1 # xmm1 = mem[0],zero,zero,zero
leaq 1(%rax), %r12
ucomiss (%r14,%rax,4), %xmm1
movq %r12, %rax
jne .LBB4_4
jnp .LBB4_7
.LBB4_4: # %.lr.ph._crit_edge.loopexit
decq %r12
.LBB4_5: # %.lr.ph._crit_edge
movl $.L.str.4, %edi
movl %r12d, %esi
xorl %eax, %eax
callq printf
movss (%r15,%r12,4), %xmm0 # xmm0 = mem[0],zero,zero,zero
cvtss2sd %xmm0, %xmm0
movss (%r14,%r12,4), %xmm1 # xmm1 = mem[0],zero,zero,zero
cvtss2sd %xmm1, %xmm1
movl $.L.str.5, %edi
movb $2, %al
callq printf
.LBB4_8: # %.loopexit
movl %ebx, %eax
addq $8, %rsp
.cfi_def_cfa_offset 40
popq %rbx
.cfi_def_cfa_offset 32
popq %r12
.cfi_def_cfa_offset 24
popq %r14
.cfi_def_cfa_offset 16
popq %r15
.cfi_def_cfa_offset 8
retq
.Lfunc_end4:
.size _Z20checkIfMatricesEqualPfS_f, .Lfunc_end4-_Z20checkIfMatricesEqualPfS_f
.cfi_endproc
# -- End function
.globl _Z9rotateCPUPfS_iiS_ # -- Begin function _Z9rotateCPUPfS_iiS_
.p2align 4, 0x90
.type _Z9rotateCPUPfS_iiS_,@function
_Z9rotateCPUPfS_iiS_: # @_Z9rotateCPUPfS_iiS_
.cfi_startproc
# %bb.0:
testl %edx, %edx
jle .LBB5_12
# %bb.1: # %.preheader.lr.ph
pushq %rbp
.cfi_def_cfa_offset 16
pushq %r15
.cfi_def_cfa_offset 24
pushq %r14
.cfi_def_cfa_offset 32
pushq %r13
.cfi_def_cfa_offset 40
pushq %r12
.cfi_def_cfa_offset 48
pushq %rbx
.cfi_def_cfa_offset 56
.cfi_offset %rbx, -56
.cfi_offset %r12, -48
.cfi_offset %r13, -40
.cfi_offset %r14, -32
.cfi_offset %r15, -24
.cfi_offset %rbp, -16
cvtsi2ss %edx, %xmm0
cvtsi2ss %ecx, %xmm1
movl %ecx, %eax
movl %ecx, %r9d
shrl $31, %r9d
addl %ecx, %r9d
movl %edx, %r10d
shrl %r10d
cvtsi2ss %r10d, %xmm2
sarl %r9d
cvtsi2ss %r9d, %xmm3
negl %r9d
movl %edx, %r11d
xorl %ebx, %ebx
xorl %r14d, %r14d
jmp .LBB5_2
.p2align 4, 0x90
.LBB5_10: # %._crit_edge
# in Loop: Header=BB5_2 Depth=1
incq %r14
addl %ecx, %ebx
cmpq %r11, %r14
je .LBB5_11
.LBB5_2: # %.preheader
# =>This Loop Header: Depth=1
# Child Loop BB5_4 Depth 2
testl %ecx, %ecx
jle .LBB5_10
# %bb.3: # %.lr.ph
# in Loop: Header=BB5_2 Depth=1
movl %r14d, %ebp
subl %r10d, %ebp
xorps %xmm4, %xmm4
cvtsi2ss %ebp, %xmm4
movl %ebx, %r15d
leaq (%rsi,%r15,4), %r15
divss %xmm0, %xmm4
xorl %r12d, %r12d
jmp .LBB5_4
.p2align 4, 0x90
.LBB5_9: # in Loop: Header=BB5_4 Depth=2
incq %r12
cmpq %r12, %rax
je .LBB5_10
.LBB5_4: # Parent Loop BB5_2 Depth=1
# => This Inner Loop Header: Depth=2
leal (%r9,%r12), %ebp
xorps %xmm5, %xmm5
cvtsi2ss %ebp, %xmm5
divss %xmm1, %xmm5
movss (%r8), %xmm6 # xmm6 = mem[0],zero,zero,zero
mulss %xmm4, %xmm6
movss 4(%r8), %xmm7 # xmm7 = mem[0],zero,zero,zero
mulss %xmm5, %xmm7
addss %xmm6, %xmm7
mulss %xmm0, %xmm7
addss %xmm2, %xmm7
cvttss2si %xmm7, %ebp
testl %ebp, %ebp
js .LBB5_9
# %bb.5: # in Loop: Header=BB5_4 Depth=2
cmpl %edx, %ebp
jge .LBB5_9
# %bb.6: # in Loop: Header=BB5_4 Depth=2
movss 8(%r8), %xmm6 # xmm6 = mem[0],zero,zero,zero
mulss %xmm4, %xmm6
mulss 12(%r8), %xmm5
addss %xmm6, %xmm5
mulss %xmm1, %xmm5
addss %xmm3, %xmm5
cvttss2si %xmm5, %r13d
testl %r13d, %r13d
js .LBB5_9
# %bb.7: # in Loop: Header=BB5_4 Depth=2
cmpl %eax, %r13d
jge .LBB5_9
# %bb.8: # in Loop: Header=BB5_4 Depth=2
imull %ecx, %ebp
addl %r13d, %ebp
movslq %ebp, %r13
movss (%rdi,%r13,4), %xmm5 # xmm5 = mem[0],zero,zero,zero
movss %xmm5, (%r15,%r12,4)
jmp .LBB5_9
.LBB5_11:
popq %rbx
.cfi_def_cfa_offset 48
popq %r12
.cfi_def_cfa_offset 40
popq %r13
.cfi_def_cfa_offset 32
popq %r14
.cfi_def_cfa_offset 24
popq %r15
.cfi_def_cfa_offset 16
popq %rbp
.cfi_def_cfa_offset 8
.cfi_restore %rbx
.cfi_restore %r12
.cfi_restore %r13
.cfi_restore %r14
.cfi_restore %r15
.cfi_restore %rbp
.LBB5_12: # %._crit_edge52
retq
.Lfunc_end5:
.size _Z9rotateCPUPfS_iiS_, .Lfunc_end5-_Z9rotateCPUPfS_iiS_
.cfi_endproc
# -- End function
.section .rodata.cst4,"aM",@progbits,4
.p2align 2, 0x0 # -- Begin function main
.LCPI6_0:
.long 0x3f800000 # float 1
.LCPI6_2:
.long 0x44610000 # float 900
.LCPI6_3:
.long 0x43e10000 # float 450
.section .rodata.cst16,"aM",@progbits,16
.p2align 4, 0x0
.LCPI6_1:
.long 0x00000000 # float 0
.long 0xbf800000 # float -1
.long 0x3f800000 # float 1
.long 0x00000000 # float 0
.text
.globl main
.p2align 4, 0x90
.type main,@function
main: # @main
.cfi_startproc
# %bb.0:
pushq %rbp
.cfi_def_cfa_offset 16
pushq %r15
.cfi_def_cfa_offset 24
pushq %r14
.cfi_def_cfa_offset 32
pushq %r13
.cfi_def_cfa_offset 40
pushq %r12
.cfi_def_cfa_offset 48
pushq %rbx
.cfi_def_cfa_offset 56
subq $200, %rsp
.cfi_def_cfa_offset 256
.cfi_offset %rbx, -56
.cfi_offset %r12, -48
.cfi_offset %r13, -40
.cfi_offset %r14, -32
.cfi_offset %r15, -24
.cfi_offset %rbp, -16
leaq 80(%rsp), %rdi
callq hipEventCreate
leaq 72(%rsp), %rdi
callq hipEventCreate
leaq 64(%rsp), %rdi
callq hipEventCreate
leaq 56(%rsp), %rdi
callq hipEventCreate
movl $3240000, %edi # imm = 0x317040
movl $1, %esi
callq calloc
movq %rax, %rbx
movl $3240000, %edi # imm = 0x317040
movl $1, %esi
callq calloc
movq %rax, %r14
movl $3240000, %edi # imm = 0x317040
movl $1, %esi
callq calloc
movq %rax, %r15
movl $16, %edi
movl $1, %esi
callq calloc
movq %rax, %r12
xorl %eax, %eax
movss .LCPI6_0(%rip), %xmm0 # xmm0 = mem[0],zero,zero,zero
movq %rbx, %rcx
jmp .LBB6_1
.p2align 4, 0x90
.LBB6_5: # %._crit_edge.i
# in Loop: Header=BB6_1 Depth=1
incq %rax
addq $3600, %rcx # imm = 0xE10
cmpq $900, %rax # imm = 0x384
je .LBB6_6
.LBB6_1: # %.preheader.i
# =>This Loop Header: Depth=1
# Child Loop BB6_2 Depth 2
xorl %edx, %edx
jmp .LBB6_2
.p2align 4, 0x90
.LBB6_4: # in Loop: Header=BB6_2 Depth=2
movss %xmm1, (%rcx,%rdx,4)
incq %rdx
cmpq $900, %rdx # imm = 0x384
je .LBB6_5
.LBB6_2: # Parent Loop BB6_1 Depth=1
# => This Inner Loop Header: Depth=2
movaps %xmm0, %xmm1
cmpq %rdx, %rax
je .LBB6_4
# %bb.3: # in Loop: Header=BB6_2 Depth=2
xorps %xmm1, %xmm1
jmp .LBB6_4
.LBB6_6: # %_Z11Fill_matrixPfii.exit
movq %r15, 40(%rsp) # 8-byte Spill
movaps .LCPI6_1(%rip), %xmm0 # xmm0 = [0.0E+0,-1.0E+0,1.0E+0,0.0E+0]
movups %xmm0, (%r12)
movl $.L.str.6, %edi
callq puts@PLT
xorl %r13d, %r13d
movq %rbx, %rbp
.p2align 4, 0x90
.LBB6_7: # %.preheader.i68
# =>This Loop Header: Depth=1
# Child Loop BB6_8 Depth 2
xorl %r15d, %r15d
.p2align 4, 0x90
.LBB6_8: # Parent Loop BB6_7 Depth=1
# => This Inner Loop Header: Depth=2
movss (%rbp,%r15,4), %xmm0 # xmm0 = mem[0],zero,zero,zero
cvtss2sd %xmm0, %xmm0
movl $.L.str.1, %edi
movb $1, %al
callq printf
incq %r15
cmpq $9, %r15
jne .LBB6_8
# %bb.9: # %._crit_edge.i72
# in Loop: Header=BB6_7 Depth=1
movl $10, %edi
callq putchar@PLT
incq %r13
addq $3600, %rbp # imm = 0xE10
cmpq $9, %r13
jne .LBB6_7
# %bb.10: # %_Z12Print_matrixPKcPfiiii.exit
movl $.Lstr, %edi
callq puts@PLT
movq 80(%rsp), %rdi
xorl %r13d, %r13d
xorl %esi, %esi
callq hipEventRecord
movss (%r12), %xmm0 # xmm0 = mem[0],zero,zero,zero
movss 4(%r12), %xmm1 # xmm1 = mem[0],zero,zero,zero
movss 8(%r12), %xmm2 # xmm2 = mem[0],zero,zero,zero
movss 12(%r12), %xmm3 # xmm3 = mem[0],zero,zero,zero
movss .LCPI6_2(%rip), %xmm4 # xmm4 = mem[0],zero,zero,zero
movss .LCPI6_3(%rip), %xmm5 # xmm5 = mem[0],zero,zero,zero
movq 40(%rsp), %r15 # 8-byte Reload
movq %r15, %rax
jmp .LBB6_11
.p2align 4, 0x90
.LBB6_18: # %._crit_edge.i77
# in Loop: Header=BB6_11 Depth=1
incq %r13
addq $3600, %rax # imm = 0xE10
cmpq $900, %r13 # imm = 0x384
je .LBB6_19
.LBB6_11: # %.preheader.i73
# =>This Loop Header: Depth=1
# Child Loop BB6_12 Depth 2
leal -450(%r13), %ecx
xorps %xmm6, %xmm6
cvtsi2ss %ecx, %xmm6
divss %xmm4, %xmm6
movaps %xmm6, %xmm7
mulss %xmm0, %xmm7
mulss %xmm2, %xmm6
xorl %ecx, %ecx
jmp .LBB6_12
.p2align 4, 0x90
.LBB6_17: # in Loop: Header=BB6_12 Depth=2
incq %rcx
cmpq $900, %rcx # imm = 0x384
je .LBB6_18
.LBB6_12: # Parent Loop BB6_11 Depth=1
# => This Inner Loop Header: Depth=2
leal -450(%rcx), %edx
xorps %xmm8, %xmm8
cvtsi2ss %edx, %xmm8
divss %xmm4, %xmm8
movaps %xmm1, %xmm9
mulss %xmm8, %xmm9
addss %xmm7, %xmm9
mulss %xmm4, %xmm9
addss %xmm5, %xmm9
cvttss2si %xmm9, %edx
testl %edx, %edx
js .LBB6_17
# %bb.13: # in Loop: Header=BB6_12 Depth=2
cmpl $899, %edx # imm = 0x383
jg .LBB6_17
# %bb.14: # in Loop: Header=BB6_12 Depth=2
mulss %xmm3, %xmm8
addss %xmm6, %xmm8
mulss %xmm4, %xmm8
addss %xmm5, %xmm8
cvttss2si %xmm8, %esi
testl %esi, %esi
js .LBB6_17
# %bb.15: # in Loop: Header=BB6_12 Depth=2
cmpl $899, %esi # imm = 0x383
jg .LBB6_17
# %bb.16: # in Loop: Header=BB6_12 Depth=2
imull $900, %edx, %edx # imm = 0x384
addl %esi, %edx
movslq %edx, %rdx
movss (%rbx,%rdx,4), %xmm8 # xmm8 = mem[0],zero,zero,zero
movss %xmm8, (%rax,%rcx,4)
jmp .LBB6_17
.LBB6_19: # %_Z9rotateCPUPfS_iiS_.exit
movq 72(%rsp), %rdi
xorl %r13d, %r13d
xorl %esi, %esi
callq hipEventRecord
movq 80(%rsp), %rsi
movq 72(%rsp), %rdx
leaq 12(%rsp), %rdi
callq hipEventElapsedTime
movss 12(%rsp), %xmm0 # xmm0 = mem[0],zero,zero,zero
cvtss2sd %xmm0, %xmm0
movl $.L.str.8, %edi
movb $1, %al
callq printf
movl $.L.str.9, %edi
callq puts@PLT
movq %r15, %rbp
.p2align 4, 0x90
.LBB6_20: # %.preheader.i79
# =>This Loop Header: Depth=1
# Child Loop BB6_21 Depth 2
xorl %r15d, %r15d
.p2align 4, 0x90
.LBB6_21: # Parent Loop BB6_20 Depth=1
# => This Inner Loop Header: Depth=2
movss (%rbp,%r15,4), %xmm0 # xmm0 = mem[0],zero,zero,zero
cvtss2sd %xmm0, %xmm0
movl $.L.str.1, %edi
movb $1, %al
callq printf
incq %r15
cmpq $9, %r15
jne .LBB6_21
# %bb.22: # %._crit_edge.i84
# in Loop: Header=BB6_20 Depth=1
movl $10, %edi
callq putchar@PLT
incq %r13
addq $3600, %rbp # imm = 0xE10
cmpq $9, %r13
jne .LBB6_20
# %bb.23: # %_Z12Print_matrixPKcPfiiii.exit88
leaq 24(%rsp), %rdi
movl $3240000, %esi # imm = 0x317040
callq hipMalloc
leaq 16(%rsp), %rdi
movl $3240000, %esi # imm = 0x317040
callq hipMalloc
leaq 48(%rsp), %rdi
movl $16, %esi
callq hipMalloc
movq 24(%rsp), %rdi
movl $3240000, %edx # imm = 0x317040
movq %rbx, %rsi
movl $1, %ecx
callq hipMemcpy
movq 16(%rsp), %rdi
movl $3240000, %edx # imm = 0x317040
movq %r14, %rsi
movl $1, %ecx
callq hipMemcpy
movq 48(%rsp), %rdi
movl $16, %edx
movq %r12, %rsi
movl $1, %ecx
callq hipMemcpy
movq 64(%rsp), %rdi
xorl %esi, %esi
callq hipEventRecord
movabsq $4294967297, %rdi # imm = 0x100000001
movabsq $137438953504, %rdx # imm = 0x2000000020
movl $1, %esi
movl $1, %ecx
xorl %r8d, %r8d
xorl %r9d, %r9d
callq __hipPushCallConfiguration
testl %eax, %eax
jne .LBB6_25
# %bb.24:
movq 24(%rsp), %rax
movq 16(%rsp), %rcx
movq 48(%rsp), %rdx
movq %rax, 152(%rsp)
movq %rcx, 144(%rsp)
movl $900, 36(%rsp) # imm = 0x384
movl $900, 32(%rsp) # imm = 0x384
movq %rdx, 136(%rsp)
leaq 152(%rsp), %rax
movq %rax, 160(%rsp)
leaq 144(%rsp), %rax
movq %rax, 168(%rsp)
leaq 36(%rsp), %rax
movq %rax, 176(%rsp)
leaq 32(%rsp), %rax
movq %rax, 184(%rsp)
leaq 136(%rsp), %rax
movq %rax, 192(%rsp)
leaq 120(%rsp), %rdi
leaq 104(%rsp), %rsi
leaq 96(%rsp), %rdx
leaq 88(%rsp), %rcx
callq __hipPopCallConfiguration
movq 120(%rsp), %rsi
movl 128(%rsp), %edx
movq 104(%rsp), %rcx
movl 112(%rsp), %r8d
leaq 160(%rsp), %r9
movl $_Z10rotMatFuncPfS_iiS_, %edi
pushq 88(%rsp)
.cfi_adjust_cfa_offset 8
pushq 104(%rsp)
.cfi_adjust_cfa_offset 8
callq hipLaunchKernel
addq $16, %rsp
.cfi_adjust_cfa_offset -16
.LBB6_25:
callq hipGetLastError
testl %eax, %eax
movq 40(%rsp), %rbp # 8-byte Reload
je .LBB6_27
# %bb.26:
movl %eax, %edi
callq hipGetErrorString
movl $.L.str.10, %edi
movq %rax, %rsi
xorl %eax, %eax
callq printf
jmp .LBB6_28
.LBB6_27:
movl $.L.str.11, %edi
xorl %esi, %esi
xorl %eax, %eax
callq printf
.LBB6_28:
callq hipDeviceSynchronize
movq 56(%rsp), %rdi
xorl %esi, %esi
callq hipEventRecord
callq hipDeviceSynchronize
movq 64(%rsp), %rsi
movq 56(%rsp), %rdx
leaq 160(%rsp), %rdi
callq hipEventElapsedTime
movq 16(%rsp), %rsi
movl $3240000, %edx # imm = 0x317040
movq %r14, %rdi
movl $2, %ecx
callq hipMemcpy
testl %eax, %eax
jne .LBB6_31
# %bb.29: # %.lr.ph.i.preheader
movss (%r14), %xmm0 # xmm0 = mem[0],zero,zero,zero
movss (%rbp), %xmm1 # xmm1 = mem[0],zero,zero,zero
ucomiss %xmm1, %xmm0
jne .LBB6_30
jnp .LBB6_35
.LBB6_30:
movss %xmm1, 8(%rsp) # 4-byte Spill
movl $.Lstr.1, %r12d
xorl %r13d, %r13d
jmp .LBB6_34
.LBB6_35: # %.lr.ph.preheader
xorl %eax, %eax
.p2align 4, 0x90
.LBB6_36: # %.lr.ph
# =>This Inner Loop Header: Depth=1
cmpq $809999, %rax # imm = 0xC5C0F
je .LBB6_37
# %bb.32: # %.lr.ph.i
# in Loop: Header=BB6_36 Depth=1
leaq 1(%rax), %r13
movss 4(%r14,%rax,4), %xmm0 # xmm0 = mem[0],zero,zero,zero
movss 4(%rbp,%rax,4), %xmm1 # xmm1 = mem[0],zero,zero,zero
ucomiss %xmm1, %xmm0
movq %r13, %rax
jne .LBB6_33
jnp .LBB6_36
.LBB6_33: # %.lr.ph.i._crit_edge.loopexit
movss %xmm1, 8(%rsp) # 4-byte Spill
leaq -1(%r13), %rax
cmpq $809999, %rax # imm = 0xC5C0F
movl $.Lstr.2, %eax
movl $.Lstr.1, %r12d
cmovaeq %rax, %r12
.LBB6_34: # %.lr.ph.i._crit_edge
movl $.L.str.4, %edi
movl %r13d, %esi
xorl %eax, %eax
callq printf
movss (%r14,%r13,4), %xmm0 # xmm0 = mem[0],zero,zero,zero
cvtss2sd %xmm0, %xmm0
movss 8(%rsp), %xmm1 # 4-byte Reload
# xmm1 = mem[0],zero,zero,zero
cvtss2sd %xmm1, %xmm1
movl $.L.str.5, %edi
movb $2, %al
callq printf
.LBB6_38: # %_Z20checkIfMatricesEqualPfS_f.exit
movq %r12, %rdi
callq puts@PLT
movss 160(%rsp), %xmm0 # xmm0 = mem[0],zero,zero,zero
cvtss2sd %xmm0, %xmm0
movl $.L.str.15, %edi
movb $1, %al
callq printf
movss 12(%rsp), %xmm0 # xmm0 = mem[0],zero,zero,zero
divss 160(%rsp), %xmm0
cvtss2sd %xmm0, %xmm0
movl $.L.str.16, %edi
movb $1, %al
callq printf
movl $.L.str.17, %edi
callq puts@PLT
xorl %r12d, %r12d
movq %rbp, %r13
.p2align 4, 0x90
.LBB6_39: # %.preheader.i92
# =>This Loop Header: Depth=1
# Child Loop BB6_40 Depth 2
xorl %r15d, %r15d
.p2align 4, 0x90
.LBB6_40: # Parent Loop BB6_39 Depth=1
# => This Inner Loop Header: Depth=2
movss (%r13,%r15,4), %xmm0 # xmm0 = mem[0],zero,zero,zero
cvtss2sd %xmm0, %xmm0
movl $.L.str.1, %edi
movb $1, %al
callq printf
incq %r15
cmpq $9, %r15
jne .LBB6_40
# %bb.41: # %._crit_edge.i98
# in Loop: Header=BB6_39 Depth=1
movl $10, %edi
callq putchar@PLT
incq %r12
addq $3600, %r13 # imm = 0xE10
cmpq $9, %r12
jne .LBB6_39
# %bb.42: # %_Z12Print_matrixPKcPfiiii.exit102
movl $.L.str.18, %edi
callq puts@PLT
xorl %r12d, %r12d
movq %r14, %r13
.p2align 4, 0x90
.LBB6_43: # %.preheader.i104
# =>This Loop Header: Depth=1
# Child Loop BB6_44 Depth 2
xorl %r15d, %r15d
.p2align 4, 0x90
.LBB6_44: # Parent Loop BB6_43 Depth=1
# => This Inner Loop Header: Depth=2
movss (%r13,%r15,4), %xmm0 # xmm0 = mem[0],zero,zero,zero
cvtss2sd %xmm0, %xmm0
movl $.L.str.1, %edi
movb $1, %al
callq printf
incq %r15
cmpq $9, %r15
jne .LBB6_44
# %bb.45: # %._crit_edge.i110
# in Loop: Header=BB6_43 Depth=1
movl $10, %edi
callq putchar@PLT
incq %r12
addq $3600, %r13 # imm = 0xE10
cmpq $9, %r12
jne .LBB6_43
# %bb.46: # %_Z12Print_matrixPKcPfiiii.exit114
movq 24(%rsp), %rdi
callq hipFree
movq 16(%rsp), %rdi
callq hipFree
movq %rbx, %rdi
callq free
movq %r14, %rdi
callq free
movq %rbp, %rdi
callq free
xorl %eax, %eax
addq $200, %rsp
.cfi_def_cfa_offset 56
popq %rbx
.cfi_def_cfa_offset 48
popq %r12
.cfi_def_cfa_offset 40
popq %r13
.cfi_def_cfa_offset 32
popq %r14
.cfi_def_cfa_offset 24
popq %r15
.cfi_def_cfa_offset 16
popq %rbp
.cfi_def_cfa_offset 8
retq
.LBB6_37:
.cfi_def_cfa_offset 256
movl $.Lstr.2, %r12d
jmp .LBB6_38
.LBB6_31:
movl %eax, %edi
movl %eax, %ebx
callq hipGetErrorString
movl $.L.str.3, %edi
movl $.L.str.12, %esi
movl %ebx, %edx
movq %rax, %rcx
xorl %eax, %eax
callq printf
movl $-1, %edi
callq exit
.Lfunc_end6:
.size main, .Lfunc_end6-main
.cfi_endproc
# -- End function
.p2align 4, 0x90 # -- Begin function __hip_module_ctor
.type __hip_module_ctor,@function
__hip_module_ctor: # @__hip_module_ctor
.cfi_startproc
# %bb.0:
subq $40, %rsp
.cfi_def_cfa_offset 48
cmpq $0, __hip_gpubin_handle(%rip)
jne .LBB7_2
# %bb.1:
movl $__hip_fatbin_wrapper, %edi
callq __hipRegisterFatBinary
movq %rax, __hip_gpubin_handle(%rip)
.LBB7_2:
movq __hip_gpubin_handle(%rip), %rdi
xorps %xmm0, %xmm0
movups %xmm0, 16(%rsp)
movups %xmm0, (%rsp)
movl $_Z10rotMatFuncPfS_iiS_, %esi
movl $.L__unnamed_1, %edx
movl $.L__unnamed_1, %ecx
movl $-1, %r8d
xorl %r9d, %r9d
callq __hipRegisterFunction
movl $__hip_module_dtor, %edi
addq $40, %rsp
.cfi_def_cfa_offset 8
jmp atexit # TAILCALL
.Lfunc_end7:
.size __hip_module_ctor, .Lfunc_end7-__hip_module_ctor
.cfi_endproc
# -- End function
.p2align 4, 0x90 # -- Begin function __hip_module_dtor
.type __hip_module_dtor,@function
__hip_module_dtor: # @__hip_module_dtor
.cfi_startproc
# %bb.0:
movq __hip_gpubin_handle(%rip), %rdi
testq %rdi, %rdi
je .LBB8_2
# %bb.1:
pushq %rax
.cfi_def_cfa_offset 16
callq __hipUnregisterFatBinary
movq $0, __hip_gpubin_handle(%rip)
addq $8, %rsp
.cfi_def_cfa_offset 8
.LBB8_2:
retq
.Lfunc_end8:
.size __hip_module_dtor, .Lfunc_end8-__hip_module_dtor
.cfi_endproc
# -- End function
.type _Z10rotMatFuncPfS_iiS_,@object # @_Z10rotMatFuncPfS_iiS_
.section .rodata,"a",@progbits
.globl _Z10rotMatFuncPfS_iiS_
.p2align 3, 0x0
_Z10rotMatFuncPfS_iiS_:
.quad _Z25__device_stub__rotMatFuncPfS_iiS_
.size _Z10rotMatFuncPfS_iiS_, 8
.type .L.str.1,@object # @.str.1
.section .rodata.str1.1,"aMS",@progbits,1
.L.str.1:
.asciz "%.2f "
.size .L.str.1, 6
.type .L.str.3,@object # @.str.3
.L.str.3:
.asciz "\"%s\" has a problem with error code %d and desc: %s\n"
.size .L.str.3, 52
.type .L.str.4,@object # @.str.4
.L.str.4:
.asciz "values different for i: %d\n"
.size .L.str.4, 28
.type .L.str.5,@object # @.str.5
.L.str.5:
.asciz "mat1[i] = %d, mat2[i] = %d\n"
.size .L.str.5, 28
.type .L.str.6,@object # @.str.6
.L.str.6:
.asciz "A ="
.size .L.str.6, 4
.type .L.str.8,@object # @.str.8
.L.str.8:
.asciz "Matrix rotation over. Time taken on CPU: %5.5f\n"
.size .L.str.8, 48
.type .L.str.9,@object # @.str.9
.L.str.9:
.asciz "B2(CPU) ="
.size .L.str.9, 10
.type .L.str.10,@object # @.str.10
.L.str.10:
.asciz "error=%s"
.size .L.str.10, 9
.type .L.str.11,@object # @.str.11
.L.str.11:
.asciz "code=%d"
.size .L.str.11, 8
.type .L.str.12,@object # @.str.12
.L.str.12:
.asciz "Matrix B Copy from device to Host"
.size .L.str.12, 34
.type .L.str.15,@object # @.str.15
.L.str.15:
.asciz "Finished addition on GPU. Time taken: %5.5f\n"
.size .L.str.15, 45
.type .L.str.16,@object # @.str.16
.L.str.16:
.asciz "Speedup: %5.5f\n"
.size .L.str.16, 16
.type .L.str.17,@object # @.str.17
.L.str.17:
.asciz "The rotated image(CPU) is: "
.size .L.str.17, 28
.type .L.str.18,@object # @.str.18
.L.str.18:
.asciz "The rotated image(GPU) is: "
.size .L.str.18, 28
.type .L__unnamed_1,@object # @0
.L__unnamed_1:
.asciz "_Z10rotMatFuncPfS_iiS_"
.size .L__unnamed_1, 23
.type __hip_fatbin_wrapper,@object # @__hip_fatbin_wrapper
.section .hipFatBinSegment,"a",@progbits
.p2align 3, 0x0
__hip_fatbin_wrapper:
.long 1212764230 # 0x48495046
.long 1 # 0x1
.quad __hip_fatbin
.quad 0
.size __hip_fatbin_wrapper, 24
.type __hip_gpubin_handle,@object # @__hip_gpubin_handle
.local __hip_gpubin_handle
.comm __hip_gpubin_handle,8,8
.section .init_array,"aw",@init_array
.p2align 3, 0x0
.quad __hip_module_ctor
.type __hip_cuid_,@object # @__hip_cuid_
.bss
.globl __hip_cuid_
__hip_cuid_:
.byte 0 # 0x0
.size __hip_cuid_, 1
.type .Lstr,@object # @str
.section .rodata.str1.1,"aMS",@progbits,1
.Lstr:
.asciz "Rotating matrices on CPU..."
.size .Lstr, 28
.type .Lstr.1,@object # @str.1
.Lstr.1:
.asciz "Kernel logic wrong!"
.size .Lstr.1, 20
.type .Lstr.2,@object # @str.2
.Lstr.2:
.asciz "Kernels correct!"
.size .Lstr.2, 17
.section ".linker-options","e",@llvm_linker_options
.ident "AMD clang version 18.0.0git (https://github.com/RadeonOpenCompute/llvm-project roc-6.3.2 25012 e5bf7e55c91490b07c49d8960fa7983d864936c4)"
.section ".note.GNU-stack","",@progbits
.addrsig
.addrsig_sym _Z25__device_stub__rotMatFuncPfS_iiS_
.addrsig_sym __hip_module_ctor
.addrsig_sym __hip_module_dtor
.addrsig_sym _Z10rotMatFuncPfS_iiS_
.addrsig_sym __hip_fatbin
.addrsig_sym __hip_fatbin_wrapper
.addrsig_sym __hip_cuid_ |
You are a helpful coding assistant specialized in converting from CUDA host assembly to AMD host assembly. | .file "tmpxft_001a419c_00000000-6_matAdd.cudafe1.cpp"
.text
#APP
#NO_APP
.type _ZL26__cudaUnregisterBinaryUtilv, @function
_ZL26__cudaUnregisterBinaryUtilv:
.LFB2065:
.cfi_startproc
endbr64
subq $8, %rsp
.cfi_def_cfa_offset 16
movq _ZL20__cudaFatCubinHandle(%rip), %rdi
call __cudaUnregisterFatBinary@PLT
addq $8, %rsp
.cfi_def_cfa_offset 8
ret
.cfi_endproc
.LFE2065:
.size _ZL26__cudaUnregisterBinaryUtilv, .-_ZL26__cudaUnregisterBinaryUtilv
.globl _Z11Fill_matrixPfii
.type _Z11Fill_matrixPfii, @function
_Z11Fill_matrixPfii:
.LFB2057:
.cfi_startproc
endbr64
testl %esi, %esi
jle .L3
movl $0, %r9d
movl $0, %r8d
movss .LC0(%rip), %xmm0
jmp .L5
.L13:
leal (%rax,%r9), %ecx
movslq %ecx, %rcx
movss %xmm0, (%rdi,%rcx,4)
.L7:
addl $1, %eax
cmpl %eax, %edx
je .L9
.L8:
cmpl %eax, %r8d
je .L13
leal (%rax,%r9), %ecx
movslq %ecx, %rcx
movl $0x00000000, (%rdi,%rcx,4)
jmp .L7
.L9:
addl $1, %r8d
addl %edx, %r9d
cmpl %r8d, %esi
je .L3
.L5:
movl $0, %eax
testl %edx, %edx
jg .L8
jmp .L9
.L3:
ret
.cfi_endproc
.LFE2057:
.size _Z11Fill_matrixPfii, .-_Z11Fill_matrixPfii
.section .rodata.str1.1,"aMS",@progbits,1
.LC2:
.string "%s\n"
.LC3:
.string "%.2f "
.LC4:
.string "\n"
.text
.globl _Z12Print_matrixPKcPfiiii
.type _Z12Print_matrixPKcPfiiii, @function
_Z12Print_matrixPKcPfiiii:
.LFB2058:
.cfi_startproc
endbr64
pushq %r15
.cfi_def_cfa_offset 16
.cfi_offset 15, -16
pushq %r14
.cfi_def_cfa_offset 24
.cfi_offset 14, -24
pushq %r13
.cfi_def_cfa_offset 32
.cfi_offset 13, -32
pushq %r12
.cfi_def_cfa_offset 40
.cfi_offset 12, -40
pushq %rbp
.cfi_def_cfa_offset 48
.cfi_offset 6, -48
pushq %rbx
.cfi_def_cfa_offset 56
.cfi_offset 3, -56
subq $40, %rsp
.cfi_def_cfa_offset 96
movq %rdi, %rdx
movq %rsi, %r15
movl %ecx, 12(%rsp)
movl %r8d, %ebx
movl %r8d, 16(%rsp)
movl %r9d, %ebp
movl %r9d, 20(%rsp)
leaq .LC2(%rip), %rsi
movl $2, %edi
movl $0, %eax
call __printf_chk@PLT
testl %ebx, %ebx
jle .L14
movl $0, %r14d
movl $0, %r13d
movslq %ebp, %rax
movq %rax, 24(%rsp)
leaq .LC3(%rip), %r12
jmp .L16
.L18:
movslq %r14d, %rax
leaq (%r15,%rax,4), %rbx
movq 24(%rsp), %rdx
addq %rdx, %rax
leaq (%r15,%rax,4), %rbp
.L17:
pxor %xmm0, %xmm0
cvtss2sd (%rbx), %xmm0
movq %r12, %rsi
movl $2, %edi
movl $1, %eax
call __printf_chk@PLT
addq $4, %rbx
cmpq %rbp, %rbx
jne .L17
.L19:
leaq .LC4(%rip), %rsi
movl $2, %edi
movl $0, %eax
call __printf_chk@PLT
addl $1, %r13d
movl 12(%rsp), %eax
addl %eax, %r14d
cmpl %r13d, 16(%rsp)
je .L14
.L16:
cmpl $0, 20(%rsp)
jg .L18
jmp .L19
.L14:
addq $40, %rsp
.cfi_def_cfa_offset 56
popq %rbx
.cfi_def_cfa_offset 48
popq %rbp
.cfi_def_cfa_offset 40
popq %r12
.cfi_def_cfa_offset 32
popq %r13
.cfi_def_cfa_offset 24
popq %r14
.cfi_def_cfa_offset 16
popq %r15
.cfi_def_cfa_offset 8
ret
.cfi_endproc
.LFE2058:
.size _Z12Print_matrixPKcPfiiii, .-_Z12Print_matrixPKcPfiiii
.section .rodata.str1.8,"aMS",@progbits,1
.align 8
.LC5:
.string "\"%s\" has a problem with error code %d and desc: %s\n"
.text
.globl _Z10checkError9cudaErrorPKc
.type _Z10checkError9cudaErrorPKc, @function
_Z10checkError9cudaErrorPKc:
.LFB2059:
.cfi_startproc
endbr64
testl %edi, %edi
jne .L27
ret
.L27:
pushq %rbp
.cfi_def_cfa_offset 16
.cfi_offset 6, -16
pushq %rbx
.cfi_def_cfa_offset 24
.cfi_offset 3, -24
subq $8, %rsp
.cfi_def_cfa_offset 32
movl %edi, %ebx
movq %rsi, %rbp
call cudaGetErrorString@PLT
movq %rax, %r8
movl %ebx, %ecx
movq %rbp, %rdx
leaq .LC5(%rip), %rsi
movl $2, %edi
movl $0, %eax
call __printf_chk@PLT
movl $-1, %edi
call exit@PLT
.cfi_endproc
.LFE2059:
.size _Z10checkError9cudaErrorPKc, .-_Z10checkError9cudaErrorPKc
.section .rodata.str1.1
.LC6:
.string "values different for i: %d\n"
.LC7:
.string "mat1[i] = %d, mat2[i] = %d\n"
.text
.globl _Z20checkIfMatricesEqualPfS_f
.type _Z20checkIfMatricesEqualPfS_f, @function
_Z20checkIfMatricesEqualPfS_f:
.LFB2060:
.cfi_startproc
endbr64
movl $0, %edx
pxor %xmm1, %xmm1
comiss %xmm1, %xmm0
jbe .L39
pushq %rbp
.cfi_def_cfa_offset 16
.cfi_offset 6, -16
pushq %rbx
.cfi_def_cfa_offset 24
.cfi_offset 3, -24
subq $8, %rsp
.cfi_def_cfa_offset 32
.L33:
movq %rdi, %rbp
movq %rsi, %rbx
movss (%rdi), %xmm1
ucomiss (%rsi), %xmm1
jp .L36
jne .L36
addl $1, %edx
addq $4, %rdi
addq $4, %rsi
pxor %xmm1, %xmm1
cvtsi2ssl %edx, %xmm1
comiss %xmm1, %xmm0
ja .L33
movl $1, %eax
jmp .L28
.L36:
leaq .LC6(%rip), %rsi
movl $2, %edi
movl $0, %eax
call __printf_chk@PLT
pxor %xmm0, %xmm0
cvtss2sd 0(%rbp), %xmm0
pxor %xmm1, %xmm1
cvtss2sd (%rbx), %xmm1
leaq .LC7(%rip), %rsi
movl $2, %edi
movl $2, %eax
call __printf_chk@PLT
movl $0, %eax
.L28:
addq $8, %rsp
.cfi_def_cfa_offset 24
popq %rbx
.cfi_def_cfa_offset 16
popq %rbp
.cfi_def_cfa_offset 8
ret
.L39:
.cfi_restore 3
.cfi_restore 6
movl $1, %eax
ret
.cfi_endproc
.LFE2060:
.size _Z20checkIfMatricesEqualPfS_f, .-_Z20checkIfMatricesEqualPfS_f
.globl _Z9rotateCPUPfS_iiS_
.type _Z9rotateCPUPfS_iiS_, @function
_Z9rotateCPUPfS_iiS_:
.LFB2061:
.cfi_startproc
endbr64
pushq %r14
.cfi_def_cfa_offset 16
.cfi_offset 14, -16
pushq %r13
.cfi_def_cfa_offset 24
.cfi_offset 13, -24
pushq %r12
.cfi_def_cfa_offset 32
.cfi_offset 12, -32
pushq %rbp
.cfi_def_cfa_offset 40
.cfi_offset 6, -40
pushq %rbx
.cfi_def_cfa_offset 48
.cfi_offset 3, -48
movq %rdi, %r10
movl %edx, %ebp
shrl $31, %ebp
addl %edx, %ebp
sarl %ebp
movl %ecx, %edi
shrl $31, %edi
addl %ecx, %edi
sarl %edi
testl %edx, %edx
jle .L43
movq %rsi, %r11
movl %edx, %esi
pxor %xmm5, %xmm5
cvtsi2ssl %edx, %xmm5
pxor %xmm4, %xmm4
cvtsi2ssl %ecx, %xmm4
movl %ebp, %ebx
negl %ebx
movl %edx, %r12d
subl %ebp, %r12d
movl %edi, %r9d
movl %ecx, %edx
subl %edi, %edx
jmp .L45
.L52:
imull %ecx, %r13d
addl %r14d, %r13d
movslq %r13d, %r13
movss (%r10,%r13,4), %xmm0
leal (%rax,%r9), %r13d
movslq %r13d, %r13
movss %xmm0, (%r11,%r13,4)
.L46:
addl $1, %eax
cmpl %edx, %eax
je .L49
.L47:
pxor %xmm1, %xmm1
cvtsi2ssl %eax, %xmm1
divss %xmm4, %xmm1
movaps %xmm3, %xmm0
mulss (%r8), %xmm0
movaps %xmm1, %xmm2
mulss 4(%r8), %xmm2
addss %xmm2, %xmm0
mulss %xmm5, %xmm0
addss %xmm6, %xmm0
cvttss2sil %xmm0, %r13d
testl %r13d, %r13d
js .L46
cmpl %r13d, %esi
jle .L46
movaps %xmm3, %xmm0
mulss 8(%r8), %xmm0
mulss 12(%r8), %xmm1
addss %xmm1, %xmm0
mulss %xmm4, %xmm0
pxor %xmm1, %xmm1
cvtsi2ssl %edi, %xmm1
addss %xmm1, %xmm0
cvttss2sil %xmm0, %r14d
testl %r14d, %r14d
js .L46
cmpl %r14d, %ecx
jg .L52
jmp .L46
.L49:
addl %ecx, %r9d
addl $1, %ebx
cmpl %r12d, %ebx
je .L43
.L45:
testl %ecx, %ecx
jle .L49
pxor %xmm3, %xmm3
cvtsi2ssl %ebx, %xmm3
divss %xmm5, %xmm3
movl %edi, %eax
negl %eax
pxor %xmm6, %xmm6
cvtsi2ssl %ebp, %xmm6
jmp .L47
.L43:
popq %rbx
.cfi_def_cfa_offset 40
popq %rbp
.cfi_def_cfa_offset 32
popq %r12
.cfi_def_cfa_offset 24
popq %r13
.cfi_def_cfa_offset 16
popq %r14
.cfi_def_cfa_offset 8
ret
.cfi_endproc
.LFE2061:
.size _Z9rotateCPUPfS_iiS_, .-_Z9rotateCPUPfS_iiS_
.globl _Z36__device_stub__Z10rotMatFuncPfS_iiS_PfS_iiS_
.type _Z36__device_stub__Z10rotMatFuncPfS_iiS_PfS_iiS_, @function
_Z36__device_stub__Z10rotMatFuncPfS_iiS_PfS_iiS_:
.LFB2087:
.cfi_startproc
endbr64
subq $152, %rsp
.cfi_def_cfa_offset 160
movq %rdi, 24(%rsp)
movq %rsi, 16(%rsp)
movl %edx, 12(%rsp)
movl %ecx, 8(%rsp)
movq %r8, (%rsp)
movq %fs:40, %rax
movq %rax, 136(%rsp)
xorl %eax, %eax
leaq 24(%rsp), %rax
movq %rax, 96(%rsp)
leaq 16(%rsp), %rax
movq %rax, 104(%rsp)
leaq 12(%rsp), %rax
movq %rax, 112(%rsp)
leaq 8(%rsp), %rax
movq %rax, 120(%rsp)
movq %rsp, %rax
movq %rax, 128(%rsp)
movl $1, 48(%rsp)
movl $1, 52(%rsp)
movl $1, 56(%rsp)
movl $1, 60(%rsp)
movl $1, 64(%rsp)
movl $1, 68(%rsp)
leaq 40(%rsp), %rcx
leaq 32(%rsp), %rdx
leaq 60(%rsp), %rsi
leaq 48(%rsp), %rdi
call __cudaPopCallConfiguration@PLT
testl %eax, %eax
je .L57
.L53:
movq 136(%rsp), %rax
subq %fs:40, %rax
jne .L58
addq $152, %rsp
.cfi_remember_state
.cfi_def_cfa_offset 8
ret
.L57:
.cfi_restore_state
pushq 40(%rsp)
.cfi_def_cfa_offset 168
pushq 40(%rsp)
.cfi_def_cfa_offset 176
leaq 112(%rsp), %r9
movq 76(%rsp), %rcx
movl 84(%rsp), %r8d
movq 64(%rsp), %rsi
movl 72(%rsp), %edx
leaq _Z10rotMatFuncPfS_iiS_(%rip), %rdi
call cudaLaunchKernel@PLT
addq $16, %rsp
.cfi_def_cfa_offset 160
jmp .L53
.L58:
call __stack_chk_fail@PLT
.cfi_endproc
.LFE2087:
.size _Z36__device_stub__Z10rotMatFuncPfS_iiS_PfS_iiS_, .-_Z36__device_stub__Z10rotMatFuncPfS_iiS_PfS_iiS_
.globl _Z10rotMatFuncPfS_iiS_
.type _Z10rotMatFuncPfS_iiS_, @function
_Z10rotMatFuncPfS_iiS_:
.LFB2088:
.cfi_startproc
endbr64
subq $8, %rsp
.cfi_def_cfa_offset 16
call _Z36__device_stub__Z10rotMatFuncPfS_iiS_PfS_iiS_
addq $8, %rsp
.cfi_def_cfa_offset 8
ret
.cfi_endproc
.LFE2088:
.size _Z10rotMatFuncPfS_iiS_, .-_Z10rotMatFuncPfS_iiS_
.section .rodata.str1.1
.LC9:
.string "A ="
.LC10:
.string "Rotating matrices on CPU...\n"
.section .rodata.str1.8
.align 8
.LC11:
.string "Matrix rotation over. Time taken on CPU: %5.5f\n"
.section .rodata.str1.1
.LC12:
.string "B2(CPU) ="
.LC13:
.string "error=%s"
.LC14:
.string "code=%d"
.section .rodata.str1.8
.align 8
.LC15:
.string "Matrix B Copy from device to Host"
.section .rodata.str1.1
.LC17:
.string "Kernels correct!\n"
.LC18:
.string "Kernel logic wrong!\n"
.section .rodata.str1.8
.align 8
.LC19:
.string "Finished addition on GPU. Time taken: %5.5f\n"
.section .rodata.str1.1
.LC20:
.string "Speedup: %5.5f\n"
.LC21:
.string "The rotated image(CPU) is: "
.LC22:
.string "The rotated image(GPU) is: "
.text
.globl main
.type main, @function
main:
.LFB2062:
.cfi_startproc
endbr64
pushq %r13
.cfi_def_cfa_offset 16
.cfi_offset 13, -16
pushq %r12
.cfi_def_cfa_offset 24
.cfi_offset 12, -24
pushq %rbp
.cfi_def_cfa_offset 32
.cfi_offset 6, -32
pushq %rbx
.cfi_def_cfa_offset 40
.cfi_offset 3, -40
subq $104, %rsp
.cfi_def_cfa_offset 144
movq %fs:40, %rax
movq %rax, 88(%rsp)
xorl %eax, %eax
leaq 8(%rsp), %rdi
call cudaEventCreate@PLT
leaq 16(%rsp), %rdi
call cudaEventCreate@PLT
leaq 24(%rsp), %rdi
call cudaEventCreate@PLT
leaq 32(%rsp), %rdi
call cudaEventCreate@PLT
movl $1, %esi
movl $3240000, %edi
call calloc@PLT
movq %rax, %r13
movl $1, %esi
movl $3240000, %edi
call calloc@PLT
movq %rax, %r12
movl $1, %esi
movl $3240000, %edi
call calloc@PLT
movq %rax, %rbp
movl $1, %esi
movl $16, %edi
call calloc@PLT
movq %rax, %rbx
movl $900, %edx
movl $900, %esi
movq %r13, %rdi
call _Z11Fill_matrixPfii
movl $0x00000000, (%rbx)
movl $0xbf800000, 4(%rbx)
movl $0x3f800000, 8(%rbx)
movl $0x00000000, 12(%rbx)
movl $9, %r9d
movl $9, %r8d
movl $900, %ecx
movl $900, %edx
movq %r13, %rsi
leaq .LC9(%rip), %rdi
call _Z12Print_matrixPKcPfiiii
leaq .LC10(%rip), %rsi
movl $2, %edi
movl $0, %eax
call __printf_chk@PLT
movl $0, %esi
movq 8(%rsp), %rdi
call cudaEventRecord@PLT
movq %rbx, %r8
movl $900, %ecx
movl $900, %edx
movq %rbp, %rsi
movq %r13, %rdi
call _Z9rotateCPUPfS_iiS_
movl $0, %esi
movq 16(%rsp), %rdi
call cudaEventRecord@PLT
movq %rsp, %rdi
movq 16(%rsp), %rdx
movq 8(%rsp), %rsi
call cudaEventElapsedTime@PLT
pxor %xmm0, %xmm0
cvtss2sd (%rsp), %xmm0
leaq .LC11(%rip), %rsi
movl $2, %edi
movl $1, %eax
call __printf_chk@PLT
movl $9, %r9d
movl $9, %r8d
movl $900, %ecx
movl $900, %edx
movq %rbp, %rsi
leaq .LC12(%rip), %rdi
call _Z12Print_matrixPKcPfiiii
leaq 40(%rsp), %rdi
movl $3240000, %esi
call cudaMalloc@PLT
leaq 48(%rsp), %rdi
movl $3240000, %esi
call cudaMalloc@PLT
leaq 56(%rsp), %rdi
movl $16, %esi
call cudaMalloc@PLT
movl $1, %ecx
movl $3240000, %edx
movq %r13, %rsi
movq 40(%rsp), %rdi
call cudaMemcpy@PLT
movl $1, %ecx
movl $3240000, %edx
movq %r12, %rsi
movq 48(%rsp), %rdi
call cudaMemcpy@PLT
movl $1, %ecx
movl $16, %edx
movq %rbx, %rsi
movq 56(%rsp), %rdi
call cudaMemcpy@PLT
movl $32, 64(%rsp)
movl $32, 68(%rsp)
movl $1, 72(%rsp)
movl $1, 76(%rsp)
movl $1, 80(%rsp)
movl $1, 84(%rsp)
movl $0, %esi
movq 24(%rsp), %rdi
call cudaEventRecord@PLT
movl 72(%rsp), %ecx
movl $0, %r9d
movl $0, %r8d
movq 64(%rsp), %rdx
movq 76(%rsp), %rdi
movl 84(%rsp), %esi
call __cudaPushCallConfiguration@PLT
testl %eax, %eax
je .L69
.L62:
call cudaGetLastError@PLT
testl %eax, %eax
je .L63
movl %eax, %edi
call cudaGetErrorString@PLT
movq %rax, %rdx
leaq .LC13(%rip), %rsi
movl $2, %edi
movl $0, %eax
call __printf_chk@PLT
.L64:
call cudaDeviceSynchronize@PLT
movl $0, %esi
movq 32(%rsp), %rdi
call cudaEventRecord@PLT
call cudaThreadSynchronize@PLT
leaq 4(%rsp), %rdi
movq 32(%rsp), %rdx
movq 24(%rsp), %rsi
call cudaEventElapsedTime@PLT
movl $2, %ecx
movl $3240000, %edx
movq 48(%rsp), %rsi
movq %r12, %rdi
call cudaMemcpy@PLT
movl %eax, %edi
leaq .LC15(%rip), %rsi
call _Z10checkError9cudaErrorPKc
movss .LC16(%rip), %xmm0
movq %rbp, %rsi
movq %r12, %rdi
call _Z20checkIfMatricesEqualPfS_f
testb %al, %al
je .L65
leaq .LC17(%rip), %rsi
movl $2, %edi
movl $0, %eax
call __printf_chk@PLT
.L66:
pxor %xmm0, %xmm0
cvtss2sd 4(%rsp), %xmm0
leaq .LC19(%rip), %rsi
movl $2, %edi
movl $1, %eax
call __printf_chk@PLT
movss (%rsp), %xmm0
divss 4(%rsp), %xmm0
cvtss2sd %xmm0, %xmm0
leaq .LC20(%rip), %rsi
movl $2, %edi
movl $1, %eax
call __printf_chk@PLT
movl $9, %r9d
movl $9, %r8d
movl $900, %ecx
movl $900, %edx
movq %rbp, %rsi
leaq .LC21(%rip), %rdi
call _Z12Print_matrixPKcPfiiii
movl $9, %r9d
movl $9, %r8d
movl $900, %ecx
movl $900, %edx
movq %r12, %rsi
leaq .LC22(%rip), %rdi
call _Z12Print_matrixPKcPfiiii
movq 40(%rsp), %rdi
call cudaFree@PLT
movq 48(%rsp), %rdi
call cudaFree@PLT
movq %r13, %rdi
call free@PLT
movq %r12, %rdi
call free@PLT
movq %rbp, %rdi
call free@PLT
movq 88(%rsp), %rax
subq %fs:40, %rax
jne .L70
movl $0, %eax
addq $104, %rsp
.cfi_remember_state
.cfi_def_cfa_offset 40
popq %rbx
.cfi_def_cfa_offset 32
popq %rbp
.cfi_def_cfa_offset 24
popq %r12
.cfi_def_cfa_offset 16
popq %r13
.cfi_def_cfa_offset 8
ret
.L69:
.cfi_restore_state
movq 56(%rsp), %r8
movl $900, %ecx
movl $900, %edx
movq 48(%rsp), %rsi
movq 40(%rsp), %rdi
call _Z36__device_stub__Z10rotMatFuncPfS_iiS_PfS_iiS_
jmp .L62
.L63:
movl $0, %edx
leaq .LC14(%rip), %rsi
movl $2, %edi
movl $0, %eax
call __printf_chk@PLT
jmp .L64
.L65:
leaq .LC18(%rip), %rsi
movl $2, %edi
movl $0, %eax
call __printf_chk@PLT
jmp .L66
.L70:
call __stack_chk_fail@PLT
.cfi_endproc
.LFE2062:
.size main, .-main
.section .rodata.str1.1
.LC23:
.string "_Z10rotMatFuncPfS_iiS_"
.text
.type _ZL24__sti____cudaRegisterAllv, @function
_ZL24__sti____cudaRegisterAllv:
.LFB2090:
.cfi_startproc
endbr64
subq $8, %rsp
.cfi_def_cfa_offset 16
leaq _ZL15__fatDeviceText(%rip), %rdi
call __cudaRegisterFatBinary@PLT
movq %rax, %rdi
movq %rax, _ZL20__cudaFatCubinHandle(%rip)
pushq $0
.cfi_def_cfa_offset 24
pushq $0
.cfi_def_cfa_offset 32
pushq $0
.cfi_def_cfa_offset 40
pushq $0
.cfi_def_cfa_offset 48
movl $0, %r9d
movl $-1, %r8d
leaq .LC23(%rip), %rdx
movq %rdx, %rcx
leaq _Z10rotMatFuncPfS_iiS_(%rip), %rsi
call __cudaRegisterFunction@PLT
addq $32, %rsp
.cfi_def_cfa_offset 16
movq _ZL20__cudaFatCubinHandle(%rip), %rdi
call __cudaRegisterFatBinaryEnd@PLT
leaq _ZL26__cudaUnregisterBinaryUtilv(%rip), %rdi
call atexit@PLT
addq $8, %rsp
.cfi_def_cfa_offset 8
ret
.cfi_endproc
.LFE2090:
.size _ZL24__sti____cudaRegisterAllv, .-_ZL24__sti____cudaRegisterAllv
.section .init_array,"aw"
.align 8
.quad _ZL24__sti____cudaRegisterAllv
.section .nvFatBinSegment,"aw"
.align 8
.type _ZL15__fatDeviceText, @object
.size _ZL15__fatDeviceText, 24
_ZL15__fatDeviceText:
.long 1180844977
.long 1
.quad fatbinData
.quad 0
.local _ZL20__cudaFatCubinHandle
.comm _ZL20__cudaFatCubinHandle,8,8
.section .rodata.cst4,"aM",@progbits,4
.align 4
.LC0:
.long 1065353216
.align 4
.LC16:
.long 1229308160
.ident "GCC: (Ubuntu 13.3.0-6ubuntu2~24.04) 13.3.0"
.section .note.GNU-stack,"",@progbits
.section .note.gnu.property,"a"
.align 8
.long 1f - 0f
.long 4f - 1f
.long 5
0:
.string "GNU"
1:
.align 8
.long 0xc0000002
.long 3f - 2f
2:
.long 0x3
3:
.align 8
4: | .text
.file "matAdd.hip"
.globl _Z25__device_stub__rotMatFuncPfS_iiS_ # -- Begin function _Z25__device_stub__rotMatFuncPfS_iiS_
.p2align 4, 0x90
.type _Z25__device_stub__rotMatFuncPfS_iiS_,@function
_Z25__device_stub__rotMatFuncPfS_iiS_: # @_Z25__device_stub__rotMatFuncPfS_iiS_
.cfi_startproc
# %bb.0:
subq $120, %rsp
.cfi_def_cfa_offset 128
movq %rdi, 72(%rsp)
movq %rsi, 64(%rsp)
movl %edx, 4(%rsp)
movl %ecx, (%rsp)
movq %r8, 56(%rsp)
leaq 72(%rsp), %rax
movq %rax, 80(%rsp)
leaq 64(%rsp), %rax
movq %rax, 88(%rsp)
leaq 4(%rsp), %rax
movq %rax, 96(%rsp)
movq %rsp, %rax
movq %rax, 104(%rsp)
leaq 56(%rsp), %rax
movq %rax, 112(%rsp)
leaq 40(%rsp), %rdi
leaq 24(%rsp), %rsi
leaq 16(%rsp), %rdx
leaq 8(%rsp), %rcx
callq __hipPopCallConfiguration
movq 40(%rsp), %rsi
movl 48(%rsp), %edx
movq 24(%rsp), %rcx
movl 32(%rsp), %r8d
leaq 80(%rsp), %r9
movl $_Z10rotMatFuncPfS_iiS_, %edi
pushq 8(%rsp)
.cfi_adjust_cfa_offset 8
pushq 24(%rsp)
.cfi_adjust_cfa_offset 8
callq hipLaunchKernel
addq $136, %rsp
.cfi_adjust_cfa_offset -136
retq
.Lfunc_end0:
.size _Z25__device_stub__rotMatFuncPfS_iiS_, .Lfunc_end0-_Z25__device_stub__rotMatFuncPfS_iiS_
.cfi_endproc
# -- End function
.section .rodata.cst4,"aM",@progbits,4
.p2align 2, 0x0 # -- Begin function _Z11Fill_matrixPfii
.LCPI1_0:
.long 0x3f800000 # float 1
.text
.globl _Z11Fill_matrixPfii
.p2align 4, 0x90
.type _Z11Fill_matrixPfii,@function
_Z11Fill_matrixPfii: # @_Z11Fill_matrixPfii
.cfi_startproc
# %bb.0:
testl %esi, %esi
jle .LBB1_8
# %bb.1: # %.preheader.lr.ph
movl %esi, %eax
movl %edx, %ecx
xorl %esi, %esi
movss .LCPI1_0(%rip), %xmm0 # xmm0 = mem[0],zero,zero,zero
xorl %r8d, %r8d
jmp .LBB1_2
.p2align 4, 0x90
.LBB1_7: # %._crit_edge
# in Loop: Header=BB1_2 Depth=1
incq %r8
addl %edx, %esi
cmpq %rax, %r8
je .LBB1_8
.LBB1_2: # %.preheader
# =>This Loop Header: Depth=1
# Child Loop BB1_4 Depth 2
testl %edx, %edx
jle .LBB1_7
# %bb.3: # %.lr.ph
# in Loop: Header=BB1_2 Depth=1
movl %esi, %r9d
leaq (%rdi,%r9,4), %r9
xorl %r10d, %r10d
jmp .LBB1_4
.p2align 4, 0x90
.LBB1_6: # in Loop: Header=BB1_4 Depth=2
movss %xmm1, (%r9,%r10,4)
incq %r10
cmpq %r10, %rcx
je .LBB1_7
.LBB1_4: # Parent Loop BB1_2 Depth=1
# => This Inner Loop Header: Depth=2
movaps %xmm0, %xmm1
cmpq %r10, %r8
je .LBB1_6
# %bb.5: # in Loop: Header=BB1_4 Depth=2
xorps %xmm1, %xmm1
jmp .LBB1_6
.LBB1_8: # %._crit_edge19
retq
.Lfunc_end1:
.size _Z11Fill_matrixPfii, .Lfunc_end1-_Z11Fill_matrixPfii
.cfi_endproc
# -- End function
.globl _Z12Print_matrixPKcPfiiii # -- Begin function _Z12Print_matrixPKcPfiiii
.p2align 4, 0x90
.type _Z12Print_matrixPKcPfiiii,@function
_Z12Print_matrixPKcPfiiii: # @_Z12Print_matrixPKcPfiiii
.cfi_startproc
# %bb.0:
pushq %rbp
.cfi_def_cfa_offset 16
pushq %r15
.cfi_def_cfa_offset 24
pushq %r14
.cfi_def_cfa_offset 32
pushq %r13
.cfi_def_cfa_offset 40
pushq %r12
.cfi_def_cfa_offset 48
pushq %rbx
.cfi_def_cfa_offset 56
pushq %rax
.cfi_def_cfa_offset 64
.cfi_offset %rbx, -56
.cfi_offset %r12, -48
.cfi_offset %r13, -40
.cfi_offset %r14, -32
.cfi_offset %r15, -24
.cfi_offset %rbp, -16
movl %r9d, 4(%rsp) # 4-byte Spill
movl %r8d, %ebp
movl %ecx, %r15d
movq %rsi, %r14
callq puts@PLT
testl %ebp, %ebp
jle .LBB2_6
# %bb.1: # %.preheader.lr.ph
movslq %r15d, %r15
movl %ebp, %r12d
movl 4(%rsp), %r13d # 4-byte Reload
shlq $2, %r15
xorl %ebp, %ebp
jmp .LBB2_2
.p2align 4, 0x90
.LBB2_5: # %._crit_edge
# in Loop: Header=BB2_2 Depth=1
movl $10, %edi
callq putchar@PLT
incq %rbp
addq %r15, %r14
cmpq %r12, %rbp
je .LBB2_6
.LBB2_2: # %.preheader
# =>This Loop Header: Depth=1
# Child Loop BB2_4 Depth 2
cmpl $0, 4(%rsp) # 4-byte Folded Reload
jle .LBB2_5
# %bb.3: # %.lr.ph
# in Loop: Header=BB2_2 Depth=1
xorl %ebx, %ebx
.p2align 4, 0x90
.LBB2_4: # Parent Loop BB2_2 Depth=1
# => This Inner Loop Header: Depth=2
movss (%r14,%rbx,4), %xmm0 # xmm0 = mem[0],zero,zero,zero
cvtss2sd %xmm0, %xmm0
movl $.L.str.1, %edi
movb $1, %al
callq printf
incq %rbx
cmpq %rbx, %r13
jne .LBB2_4
jmp .LBB2_5
.LBB2_6: # %._crit_edge13
addq $8, %rsp
.cfi_def_cfa_offset 56
popq %rbx
.cfi_def_cfa_offset 48
popq %r12
.cfi_def_cfa_offset 40
popq %r13
.cfi_def_cfa_offset 32
popq %r14
.cfi_def_cfa_offset 24
popq %r15
.cfi_def_cfa_offset 16
popq %rbp
.cfi_def_cfa_offset 8
retq
.Lfunc_end2:
.size _Z12Print_matrixPKcPfiiii, .Lfunc_end2-_Z12Print_matrixPKcPfiiii
.cfi_endproc
# -- End function
.globl _Z10checkError10hipError_tPKc # -- Begin function _Z10checkError10hipError_tPKc
.p2align 4, 0x90
.type _Z10checkError10hipError_tPKc,@function
_Z10checkError10hipError_tPKc: # @_Z10checkError10hipError_tPKc
.cfi_startproc
# %bb.0:
testl %edi, %edi
jne .LBB3_2
# %bb.1:
retq
.LBB3_2:
pushq %r14
.cfi_def_cfa_offset 16
pushq %rbx
.cfi_def_cfa_offset 24
pushq %rax
.cfi_def_cfa_offset 32
.cfi_offset %rbx, -24
.cfi_offset %r14, -16
movl %edi, %ebx
movq %rsi, %r14
callq hipGetErrorString
movl $.L.str.3, %edi
movq %r14, %rsi
movl %ebx, %edx
movq %rax, %rcx
xorl %eax, %eax
callq printf
movl $-1, %edi
callq exit
.Lfunc_end3:
.size _Z10checkError10hipError_tPKc, .Lfunc_end3-_Z10checkError10hipError_tPKc
.cfi_endproc
# -- End function
.globl _Z20checkIfMatricesEqualPfS_f # -- Begin function _Z20checkIfMatricesEqualPfS_f
.p2align 4, 0x90
.type _Z20checkIfMatricesEqualPfS_f,@function
_Z20checkIfMatricesEqualPfS_f: # @_Z20checkIfMatricesEqualPfS_f
.cfi_startproc
# %bb.0:
pushq %r15
.cfi_def_cfa_offset 16
pushq %r14
.cfi_def_cfa_offset 24
pushq %r12
.cfi_def_cfa_offset 32
pushq %rbx
.cfi_def_cfa_offset 40
pushq %rax
.cfi_def_cfa_offset 48
.cfi_offset %rbx, -40
.cfi_offset %r12, -32
.cfi_offset %r14, -24
.cfi_offset %r15, -16
xorps %xmm1, %xmm1
ucomiss %xmm1, %xmm0
setbe %bl
jbe .LBB4_8
# %bb.1: # %.lr.ph.preheader
movq %rsi, %r14
movq %rdi, %r15
movss (%rdi), %xmm1 # xmm1 = mem[0],zero,zero,zero
ucomiss (%rsi), %xmm1
jne .LBB4_2
jnp .LBB4_6
.LBB4_2:
xorl %r12d, %r12d
jmp .LBB4_5
.LBB4_6: # %.lr.ph29.preheader
movl $1, %eax
.p2align 4, 0x90
.LBB4_7: # %.lr.ph29
# =>This Inner Loop Header: Depth=1
xorps %xmm1, %xmm1
cvtsi2ss %eax, %xmm1
ucomiss %xmm1, %xmm0
setbe %bl
jbe .LBB4_8
# %bb.3: # %.lr.ph
# in Loop: Header=BB4_7 Depth=1
movss (%r15,%rax,4), %xmm1 # xmm1 = mem[0],zero,zero,zero
leaq 1(%rax), %r12
ucomiss (%r14,%rax,4), %xmm1
movq %r12, %rax
jne .LBB4_4
jnp .LBB4_7
.LBB4_4: # %.lr.ph._crit_edge.loopexit
decq %r12
.LBB4_5: # %.lr.ph._crit_edge
movl $.L.str.4, %edi
movl %r12d, %esi
xorl %eax, %eax
callq printf
movss (%r15,%r12,4), %xmm0 # xmm0 = mem[0],zero,zero,zero
cvtss2sd %xmm0, %xmm0
movss (%r14,%r12,4), %xmm1 # xmm1 = mem[0],zero,zero,zero
cvtss2sd %xmm1, %xmm1
movl $.L.str.5, %edi
movb $2, %al
callq printf
.LBB4_8: # %.loopexit
movl %ebx, %eax
addq $8, %rsp
.cfi_def_cfa_offset 40
popq %rbx
.cfi_def_cfa_offset 32
popq %r12
.cfi_def_cfa_offset 24
popq %r14
.cfi_def_cfa_offset 16
popq %r15
.cfi_def_cfa_offset 8
retq
.Lfunc_end4:
.size _Z20checkIfMatricesEqualPfS_f, .Lfunc_end4-_Z20checkIfMatricesEqualPfS_f
.cfi_endproc
# -- End function
.globl _Z9rotateCPUPfS_iiS_ # -- Begin function _Z9rotateCPUPfS_iiS_
.p2align 4, 0x90
.type _Z9rotateCPUPfS_iiS_,@function
_Z9rotateCPUPfS_iiS_: # @_Z9rotateCPUPfS_iiS_
.cfi_startproc
# %bb.0:
testl %edx, %edx
jle .LBB5_12
# %bb.1: # %.preheader.lr.ph
pushq %rbp
.cfi_def_cfa_offset 16
pushq %r15
.cfi_def_cfa_offset 24
pushq %r14
.cfi_def_cfa_offset 32
pushq %r13
.cfi_def_cfa_offset 40
pushq %r12
.cfi_def_cfa_offset 48
pushq %rbx
.cfi_def_cfa_offset 56
.cfi_offset %rbx, -56
.cfi_offset %r12, -48
.cfi_offset %r13, -40
.cfi_offset %r14, -32
.cfi_offset %r15, -24
.cfi_offset %rbp, -16
cvtsi2ss %edx, %xmm0
cvtsi2ss %ecx, %xmm1
movl %ecx, %eax
movl %ecx, %r9d
shrl $31, %r9d
addl %ecx, %r9d
movl %edx, %r10d
shrl %r10d
cvtsi2ss %r10d, %xmm2
sarl %r9d
cvtsi2ss %r9d, %xmm3
negl %r9d
movl %edx, %r11d
xorl %ebx, %ebx
xorl %r14d, %r14d
jmp .LBB5_2
.p2align 4, 0x90
.LBB5_10: # %._crit_edge
# in Loop: Header=BB5_2 Depth=1
incq %r14
addl %ecx, %ebx
cmpq %r11, %r14
je .LBB5_11
.LBB5_2: # %.preheader
# =>This Loop Header: Depth=1
# Child Loop BB5_4 Depth 2
testl %ecx, %ecx
jle .LBB5_10
# %bb.3: # %.lr.ph
# in Loop: Header=BB5_2 Depth=1
movl %r14d, %ebp
subl %r10d, %ebp
xorps %xmm4, %xmm4
cvtsi2ss %ebp, %xmm4
movl %ebx, %r15d
leaq (%rsi,%r15,4), %r15
divss %xmm0, %xmm4
xorl %r12d, %r12d
jmp .LBB5_4
.p2align 4, 0x90
.LBB5_9: # in Loop: Header=BB5_4 Depth=2
incq %r12
cmpq %r12, %rax
je .LBB5_10
.LBB5_4: # Parent Loop BB5_2 Depth=1
# => This Inner Loop Header: Depth=2
leal (%r9,%r12), %ebp
xorps %xmm5, %xmm5
cvtsi2ss %ebp, %xmm5
divss %xmm1, %xmm5
movss (%r8), %xmm6 # xmm6 = mem[0],zero,zero,zero
mulss %xmm4, %xmm6
movss 4(%r8), %xmm7 # xmm7 = mem[0],zero,zero,zero
mulss %xmm5, %xmm7
addss %xmm6, %xmm7
mulss %xmm0, %xmm7
addss %xmm2, %xmm7
cvttss2si %xmm7, %ebp
testl %ebp, %ebp
js .LBB5_9
# %bb.5: # in Loop: Header=BB5_4 Depth=2
cmpl %edx, %ebp
jge .LBB5_9
# %bb.6: # in Loop: Header=BB5_4 Depth=2
movss 8(%r8), %xmm6 # xmm6 = mem[0],zero,zero,zero
mulss %xmm4, %xmm6
mulss 12(%r8), %xmm5
addss %xmm6, %xmm5
mulss %xmm1, %xmm5
addss %xmm3, %xmm5
cvttss2si %xmm5, %r13d
testl %r13d, %r13d
js .LBB5_9
# %bb.7: # in Loop: Header=BB5_4 Depth=2
cmpl %eax, %r13d
jge .LBB5_9
# %bb.8: # in Loop: Header=BB5_4 Depth=2
imull %ecx, %ebp
addl %r13d, %ebp
movslq %ebp, %r13
movss (%rdi,%r13,4), %xmm5 # xmm5 = mem[0],zero,zero,zero
movss %xmm5, (%r15,%r12,4)
jmp .LBB5_9
.LBB5_11:
popq %rbx
.cfi_def_cfa_offset 48
popq %r12
.cfi_def_cfa_offset 40
popq %r13
.cfi_def_cfa_offset 32
popq %r14
.cfi_def_cfa_offset 24
popq %r15
.cfi_def_cfa_offset 16
popq %rbp
.cfi_def_cfa_offset 8
.cfi_restore %rbx
.cfi_restore %r12
.cfi_restore %r13
.cfi_restore %r14
.cfi_restore %r15
.cfi_restore %rbp
.LBB5_12: # %._crit_edge52
retq
.Lfunc_end5:
.size _Z9rotateCPUPfS_iiS_, .Lfunc_end5-_Z9rotateCPUPfS_iiS_
.cfi_endproc
# -- End function
.section .rodata.cst4,"aM",@progbits,4
.p2align 2, 0x0 # -- Begin function main
.LCPI6_0:
.long 0x3f800000 # float 1
.LCPI6_2:
.long 0x44610000 # float 900
.LCPI6_3:
.long 0x43e10000 # float 450
.section .rodata.cst16,"aM",@progbits,16
.p2align 4, 0x0
.LCPI6_1:
.long 0x00000000 # float 0
.long 0xbf800000 # float -1
.long 0x3f800000 # float 1
.long 0x00000000 # float 0
.text
.globl main
.p2align 4, 0x90
.type main,@function
main: # @main
.cfi_startproc
# %bb.0:
pushq %rbp
.cfi_def_cfa_offset 16
pushq %r15
.cfi_def_cfa_offset 24
pushq %r14
.cfi_def_cfa_offset 32
pushq %r13
.cfi_def_cfa_offset 40
pushq %r12
.cfi_def_cfa_offset 48
pushq %rbx
.cfi_def_cfa_offset 56
subq $200, %rsp
.cfi_def_cfa_offset 256
.cfi_offset %rbx, -56
.cfi_offset %r12, -48
.cfi_offset %r13, -40
.cfi_offset %r14, -32
.cfi_offset %r15, -24
.cfi_offset %rbp, -16
leaq 80(%rsp), %rdi
callq hipEventCreate
leaq 72(%rsp), %rdi
callq hipEventCreate
leaq 64(%rsp), %rdi
callq hipEventCreate
leaq 56(%rsp), %rdi
callq hipEventCreate
movl $3240000, %edi # imm = 0x317040
movl $1, %esi
callq calloc
movq %rax, %rbx
movl $3240000, %edi # imm = 0x317040
movl $1, %esi
callq calloc
movq %rax, %r14
movl $3240000, %edi # imm = 0x317040
movl $1, %esi
callq calloc
movq %rax, %r15
movl $16, %edi
movl $1, %esi
callq calloc
movq %rax, %r12
xorl %eax, %eax
movss .LCPI6_0(%rip), %xmm0 # xmm0 = mem[0],zero,zero,zero
movq %rbx, %rcx
jmp .LBB6_1
.p2align 4, 0x90
.LBB6_5: # %._crit_edge.i
# in Loop: Header=BB6_1 Depth=1
incq %rax
addq $3600, %rcx # imm = 0xE10
cmpq $900, %rax # imm = 0x384
je .LBB6_6
.LBB6_1: # %.preheader.i
# =>This Loop Header: Depth=1
# Child Loop BB6_2 Depth 2
xorl %edx, %edx
jmp .LBB6_2
.p2align 4, 0x90
.LBB6_4: # in Loop: Header=BB6_2 Depth=2
movss %xmm1, (%rcx,%rdx,4)
incq %rdx
cmpq $900, %rdx # imm = 0x384
je .LBB6_5
.LBB6_2: # Parent Loop BB6_1 Depth=1
# => This Inner Loop Header: Depth=2
movaps %xmm0, %xmm1
cmpq %rdx, %rax
je .LBB6_4
# %bb.3: # in Loop: Header=BB6_2 Depth=2
xorps %xmm1, %xmm1
jmp .LBB6_4
.LBB6_6: # %_Z11Fill_matrixPfii.exit
movq %r15, 40(%rsp) # 8-byte Spill
movaps .LCPI6_1(%rip), %xmm0 # xmm0 = [0.0E+0,-1.0E+0,1.0E+0,0.0E+0]
movups %xmm0, (%r12)
movl $.L.str.6, %edi
callq puts@PLT
xorl %r13d, %r13d
movq %rbx, %rbp
.p2align 4, 0x90
.LBB6_7: # %.preheader.i68
# =>This Loop Header: Depth=1
# Child Loop BB6_8 Depth 2
xorl %r15d, %r15d
.p2align 4, 0x90
.LBB6_8: # Parent Loop BB6_7 Depth=1
# => This Inner Loop Header: Depth=2
movss (%rbp,%r15,4), %xmm0 # xmm0 = mem[0],zero,zero,zero
cvtss2sd %xmm0, %xmm0
movl $.L.str.1, %edi
movb $1, %al
callq printf
incq %r15
cmpq $9, %r15
jne .LBB6_8
# %bb.9: # %._crit_edge.i72
# in Loop: Header=BB6_7 Depth=1
movl $10, %edi
callq putchar@PLT
incq %r13
addq $3600, %rbp # imm = 0xE10
cmpq $9, %r13
jne .LBB6_7
# %bb.10: # %_Z12Print_matrixPKcPfiiii.exit
movl $.Lstr, %edi
callq puts@PLT
movq 80(%rsp), %rdi
xorl %r13d, %r13d
xorl %esi, %esi
callq hipEventRecord
movss (%r12), %xmm0 # xmm0 = mem[0],zero,zero,zero
movss 4(%r12), %xmm1 # xmm1 = mem[0],zero,zero,zero
movss 8(%r12), %xmm2 # xmm2 = mem[0],zero,zero,zero
movss 12(%r12), %xmm3 # xmm3 = mem[0],zero,zero,zero
movss .LCPI6_2(%rip), %xmm4 # xmm4 = mem[0],zero,zero,zero
movss .LCPI6_3(%rip), %xmm5 # xmm5 = mem[0],zero,zero,zero
movq 40(%rsp), %r15 # 8-byte Reload
movq %r15, %rax
jmp .LBB6_11
.p2align 4, 0x90
.LBB6_18: # %._crit_edge.i77
# in Loop: Header=BB6_11 Depth=1
incq %r13
addq $3600, %rax # imm = 0xE10
cmpq $900, %r13 # imm = 0x384
je .LBB6_19
.LBB6_11: # %.preheader.i73
# =>This Loop Header: Depth=1
# Child Loop BB6_12 Depth 2
leal -450(%r13), %ecx
xorps %xmm6, %xmm6
cvtsi2ss %ecx, %xmm6
divss %xmm4, %xmm6
movaps %xmm6, %xmm7
mulss %xmm0, %xmm7
mulss %xmm2, %xmm6
xorl %ecx, %ecx
jmp .LBB6_12
.p2align 4, 0x90
.LBB6_17: # in Loop: Header=BB6_12 Depth=2
incq %rcx
cmpq $900, %rcx # imm = 0x384
je .LBB6_18
.LBB6_12: # Parent Loop BB6_11 Depth=1
# => This Inner Loop Header: Depth=2
leal -450(%rcx), %edx
xorps %xmm8, %xmm8
cvtsi2ss %edx, %xmm8
divss %xmm4, %xmm8
movaps %xmm1, %xmm9
mulss %xmm8, %xmm9
addss %xmm7, %xmm9
mulss %xmm4, %xmm9
addss %xmm5, %xmm9
cvttss2si %xmm9, %edx
testl %edx, %edx
js .LBB6_17
# %bb.13: # in Loop: Header=BB6_12 Depth=2
cmpl $899, %edx # imm = 0x383
jg .LBB6_17
# %bb.14: # in Loop: Header=BB6_12 Depth=2
mulss %xmm3, %xmm8
addss %xmm6, %xmm8
mulss %xmm4, %xmm8
addss %xmm5, %xmm8
cvttss2si %xmm8, %esi
testl %esi, %esi
js .LBB6_17
# %bb.15: # in Loop: Header=BB6_12 Depth=2
cmpl $899, %esi # imm = 0x383
jg .LBB6_17
# %bb.16: # in Loop: Header=BB6_12 Depth=2
imull $900, %edx, %edx # imm = 0x384
addl %esi, %edx
movslq %edx, %rdx
movss (%rbx,%rdx,4), %xmm8 # xmm8 = mem[0],zero,zero,zero
movss %xmm8, (%rax,%rcx,4)
jmp .LBB6_17
.LBB6_19: # %_Z9rotateCPUPfS_iiS_.exit
movq 72(%rsp), %rdi
xorl %r13d, %r13d
xorl %esi, %esi
callq hipEventRecord
movq 80(%rsp), %rsi
movq 72(%rsp), %rdx
leaq 12(%rsp), %rdi
callq hipEventElapsedTime
movss 12(%rsp), %xmm0 # xmm0 = mem[0],zero,zero,zero
cvtss2sd %xmm0, %xmm0
movl $.L.str.8, %edi
movb $1, %al
callq printf
movl $.L.str.9, %edi
callq puts@PLT
movq %r15, %rbp
.p2align 4, 0x90
.LBB6_20: # %.preheader.i79
# =>This Loop Header: Depth=1
# Child Loop BB6_21 Depth 2
xorl %r15d, %r15d
.p2align 4, 0x90
.LBB6_21: # Parent Loop BB6_20 Depth=1
# => This Inner Loop Header: Depth=2
movss (%rbp,%r15,4), %xmm0 # xmm0 = mem[0],zero,zero,zero
cvtss2sd %xmm0, %xmm0
movl $.L.str.1, %edi
movb $1, %al
callq printf
incq %r15
cmpq $9, %r15
jne .LBB6_21
# %bb.22: # %._crit_edge.i84
# in Loop: Header=BB6_20 Depth=1
movl $10, %edi
callq putchar@PLT
incq %r13
addq $3600, %rbp # imm = 0xE10
cmpq $9, %r13
jne .LBB6_20
# %bb.23: # %_Z12Print_matrixPKcPfiiii.exit88
leaq 24(%rsp), %rdi
movl $3240000, %esi # imm = 0x317040
callq hipMalloc
leaq 16(%rsp), %rdi
movl $3240000, %esi # imm = 0x317040
callq hipMalloc
leaq 48(%rsp), %rdi
movl $16, %esi
callq hipMalloc
movq 24(%rsp), %rdi
movl $3240000, %edx # imm = 0x317040
movq %rbx, %rsi
movl $1, %ecx
callq hipMemcpy
movq 16(%rsp), %rdi
movl $3240000, %edx # imm = 0x317040
movq %r14, %rsi
movl $1, %ecx
callq hipMemcpy
movq 48(%rsp), %rdi
movl $16, %edx
movq %r12, %rsi
movl $1, %ecx
callq hipMemcpy
movq 64(%rsp), %rdi
xorl %esi, %esi
callq hipEventRecord
movabsq $4294967297, %rdi # imm = 0x100000001
movabsq $137438953504, %rdx # imm = 0x2000000020
movl $1, %esi
movl $1, %ecx
xorl %r8d, %r8d
xorl %r9d, %r9d
callq __hipPushCallConfiguration
testl %eax, %eax
jne .LBB6_25
# %bb.24:
movq 24(%rsp), %rax
movq 16(%rsp), %rcx
movq 48(%rsp), %rdx
movq %rax, 152(%rsp)
movq %rcx, 144(%rsp)
movl $900, 36(%rsp) # imm = 0x384
movl $900, 32(%rsp) # imm = 0x384
movq %rdx, 136(%rsp)
leaq 152(%rsp), %rax
movq %rax, 160(%rsp)
leaq 144(%rsp), %rax
movq %rax, 168(%rsp)
leaq 36(%rsp), %rax
movq %rax, 176(%rsp)
leaq 32(%rsp), %rax
movq %rax, 184(%rsp)
leaq 136(%rsp), %rax
movq %rax, 192(%rsp)
leaq 120(%rsp), %rdi
leaq 104(%rsp), %rsi
leaq 96(%rsp), %rdx
leaq 88(%rsp), %rcx
callq __hipPopCallConfiguration
movq 120(%rsp), %rsi
movl 128(%rsp), %edx
movq 104(%rsp), %rcx
movl 112(%rsp), %r8d
leaq 160(%rsp), %r9
movl $_Z10rotMatFuncPfS_iiS_, %edi
pushq 88(%rsp)
.cfi_adjust_cfa_offset 8
pushq 104(%rsp)
.cfi_adjust_cfa_offset 8
callq hipLaunchKernel
addq $16, %rsp
.cfi_adjust_cfa_offset -16
.LBB6_25:
callq hipGetLastError
testl %eax, %eax
movq 40(%rsp), %rbp # 8-byte Reload
je .LBB6_27
# %bb.26:
movl %eax, %edi
callq hipGetErrorString
movl $.L.str.10, %edi
movq %rax, %rsi
xorl %eax, %eax
callq printf
jmp .LBB6_28
.LBB6_27:
movl $.L.str.11, %edi
xorl %esi, %esi
xorl %eax, %eax
callq printf
.LBB6_28:
callq hipDeviceSynchronize
movq 56(%rsp), %rdi
xorl %esi, %esi
callq hipEventRecord
callq hipDeviceSynchronize
movq 64(%rsp), %rsi
movq 56(%rsp), %rdx
leaq 160(%rsp), %rdi
callq hipEventElapsedTime
movq 16(%rsp), %rsi
movl $3240000, %edx # imm = 0x317040
movq %r14, %rdi
movl $2, %ecx
callq hipMemcpy
testl %eax, %eax
jne .LBB6_31
# %bb.29: # %.lr.ph.i.preheader
movss (%r14), %xmm0 # xmm0 = mem[0],zero,zero,zero
movss (%rbp), %xmm1 # xmm1 = mem[0],zero,zero,zero
ucomiss %xmm1, %xmm0
jne .LBB6_30
jnp .LBB6_35
.LBB6_30:
movss %xmm1, 8(%rsp) # 4-byte Spill
movl $.Lstr.1, %r12d
xorl %r13d, %r13d
jmp .LBB6_34
.LBB6_35: # %.lr.ph.preheader
xorl %eax, %eax
.p2align 4, 0x90
.LBB6_36: # %.lr.ph
# =>This Inner Loop Header: Depth=1
cmpq $809999, %rax # imm = 0xC5C0F
je .LBB6_37
# %bb.32: # %.lr.ph.i
# in Loop: Header=BB6_36 Depth=1
leaq 1(%rax), %r13
movss 4(%r14,%rax,4), %xmm0 # xmm0 = mem[0],zero,zero,zero
movss 4(%rbp,%rax,4), %xmm1 # xmm1 = mem[0],zero,zero,zero
ucomiss %xmm1, %xmm0
movq %r13, %rax
jne .LBB6_33
jnp .LBB6_36
.LBB6_33: # %.lr.ph.i._crit_edge.loopexit
movss %xmm1, 8(%rsp) # 4-byte Spill
leaq -1(%r13), %rax
cmpq $809999, %rax # imm = 0xC5C0F
movl $.Lstr.2, %eax
movl $.Lstr.1, %r12d
cmovaeq %rax, %r12
.LBB6_34: # %.lr.ph.i._crit_edge
movl $.L.str.4, %edi
movl %r13d, %esi
xorl %eax, %eax
callq printf
movss (%r14,%r13,4), %xmm0 # xmm0 = mem[0],zero,zero,zero
cvtss2sd %xmm0, %xmm0
movss 8(%rsp), %xmm1 # 4-byte Reload
# xmm1 = mem[0],zero,zero,zero
cvtss2sd %xmm1, %xmm1
movl $.L.str.5, %edi
movb $2, %al
callq printf
.LBB6_38: # %_Z20checkIfMatricesEqualPfS_f.exit
movq %r12, %rdi
callq puts@PLT
movss 160(%rsp), %xmm0 # xmm0 = mem[0],zero,zero,zero
cvtss2sd %xmm0, %xmm0
movl $.L.str.15, %edi
movb $1, %al
callq printf
movss 12(%rsp), %xmm0 # xmm0 = mem[0],zero,zero,zero
divss 160(%rsp), %xmm0
cvtss2sd %xmm0, %xmm0
movl $.L.str.16, %edi
movb $1, %al
callq printf
movl $.L.str.17, %edi
callq puts@PLT
xorl %r12d, %r12d
movq %rbp, %r13
.p2align 4, 0x90
.LBB6_39: # %.preheader.i92
# =>This Loop Header: Depth=1
# Child Loop BB6_40 Depth 2
xorl %r15d, %r15d
.p2align 4, 0x90
.LBB6_40: # Parent Loop BB6_39 Depth=1
# => This Inner Loop Header: Depth=2
movss (%r13,%r15,4), %xmm0 # xmm0 = mem[0],zero,zero,zero
cvtss2sd %xmm0, %xmm0
movl $.L.str.1, %edi
movb $1, %al
callq printf
incq %r15
cmpq $9, %r15
jne .LBB6_40
# %bb.41: # %._crit_edge.i98
# in Loop: Header=BB6_39 Depth=1
movl $10, %edi
callq putchar@PLT
incq %r12
addq $3600, %r13 # imm = 0xE10
cmpq $9, %r12
jne .LBB6_39
# %bb.42: # %_Z12Print_matrixPKcPfiiii.exit102
movl $.L.str.18, %edi
callq puts@PLT
xorl %r12d, %r12d
movq %r14, %r13
.p2align 4, 0x90
.LBB6_43: # %.preheader.i104
# =>This Loop Header: Depth=1
# Child Loop BB6_44 Depth 2
xorl %r15d, %r15d
.p2align 4, 0x90
.LBB6_44: # Parent Loop BB6_43 Depth=1
# => This Inner Loop Header: Depth=2
movss (%r13,%r15,4), %xmm0 # xmm0 = mem[0],zero,zero,zero
cvtss2sd %xmm0, %xmm0
movl $.L.str.1, %edi
movb $1, %al
callq printf
incq %r15
cmpq $9, %r15
jne .LBB6_44
# %bb.45: # %._crit_edge.i110
# in Loop: Header=BB6_43 Depth=1
movl $10, %edi
callq putchar@PLT
incq %r12
addq $3600, %r13 # imm = 0xE10
cmpq $9, %r12
jne .LBB6_43
# %bb.46: # %_Z12Print_matrixPKcPfiiii.exit114
movq 24(%rsp), %rdi
callq hipFree
movq 16(%rsp), %rdi
callq hipFree
movq %rbx, %rdi
callq free
movq %r14, %rdi
callq free
movq %rbp, %rdi
callq free
xorl %eax, %eax
addq $200, %rsp
.cfi_def_cfa_offset 56
popq %rbx
.cfi_def_cfa_offset 48
popq %r12
.cfi_def_cfa_offset 40
popq %r13
.cfi_def_cfa_offset 32
popq %r14
.cfi_def_cfa_offset 24
popq %r15
.cfi_def_cfa_offset 16
popq %rbp
.cfi_def_cfa_offset 8
retq
.LBB6_37:
.cfi_def_cfa_offset 256
movl $.Lstr.2, %r12d
jmp .LBB6_38
.LBB6_31:
movl %eax, %edi
movl %eax, %ebx
callq hipGetErrorString
movl $.L.str.3, %edi
movl $.L.str.12, %esi
movl %ebx, %edx
movq %rax, %rcx
xorl %eax, %eax
callq printf
movl $-1, %edi
callq exit
.Lfunc_end6:
.size main, .Lfunc_end6-main
.cfi_endproc
# -- End function
.p2align 4, 0x90 # -- Begin function __hip_module_ctor
.type __hip_module_ctor,@function
__hip_module_ctor: # @__hip_module_ctor
.cfi_startproc
# %bb.0:
subq $40, %rsp
.cfi_def_cfa_offset 48
cmpq $0, __hip_gpubin_handle(%rip)
jne .LBB7_2
# %bb.1:
movl $__hip_fatbin_wrapper, %edi
callq __hipRegisterFatBinary
movq %rax, __hip_gpubin_handle(%rip)
.LBB7_2:
movq __hip_gpubin_handle(%rip), %rdi
xorps %xmm0, %xmm0
movups %xmm0, 16(%rsp)
movups %xmm0, (%rsp)
movl $_Z10rotMatFuncPfS_iiS_, %esi
movl $.L__unnamed_1, %edx
movl $.L__unnamed_1, %ecx
movl $-1, %r8d
xorl %r9d, %r9d
callq __hipRegisterFunction
movl $__hip_module_dtor, %edi
addq $40, %rsp
.cfi_def_cfa_offset 8
jmp atexit # TAILCALL
.Lfunc_end7:
.size __hip_module_ctor, .Lfunc_end7-__hip_module_ctor
.cfi_endproc
# -- End function
.p2align 4, 0x90 # -- Begin function __hip_module_dtor
.type __hip_module_dtor,@function
__hip_module_dtor: # @__hip_module_dtor
.cfi_startproc
# %bb.0:
movq __hip_gpubin_handle(%rip), %rdi
testq %rdi, %rdi
je .LBB8_2
# %bb.1:
pushq %rax
.cfi_def_cfa_offset 16
callq __hipUnregisterFatBinary
movq $0, __hip_gpubin_handle(%rip)
addq $8, %rsp
.cfi_def_cfa_offset 8
.LBB8_2:
retq
.Lfunc_end8:
.size __hip_module_dtor, .Lfunc_end8-__hip_module_dtor
.cfi_endproc
# -- End function
.type _Z10rotMatFuncPfS_iiS_,@object # @_Z10rotMatFuncPfS_iiS_
.section .rodata,"a",@progbits
.globl _Z10rotMatFuncPfS_iiS_
.p2align 3, 0x0
_Z10rotMatFuncPfS_iiS_:
.quad _Z25__device_stub__rotMatFuncPfS_iiS_
.size _Z10rotMatFuncPfS_iiS_, 8
.type .L.str.1,@object # @.str.1
.section .rodata.str1.1,"aMS",@progbits,1
.L.str.1:
.asciz "%.2f "
.size .L.str.1, 6
.type .L.str.3,@object # @.str.3
.L.str.3:
.asciz "\"%s\" has a problem with error code %d and desc: %s\n"
.size .L.str.3, 52
.type .L.str.4,@object # @.str.4
.L.str.4:
.asciz "values different for i: %d\n"
.size .L.str.4, 28
.type .L.str.5,@object # @.str.5
.L.str.5:
.asciz "mat1[i] = %d, mat2[i] = %d\n"
.size .L.str.5, 28
.type .L.str.6,@object # @.str.6
.L.str.6:
.asciz "A ="
.size .L.str.6, 4
.type .L.str.8,@object # @.str.8
.L.str.8:
.asciz "Matrix rotation over. Time taken on CPU: %5.5f\n"
.size .L.str.8, 48
.type .L.str.9,@object # @.str.9
.L.str.9:
.asciz "B2(CPU) ="
.size .L.str.9, 10
.type .L.str.10,@object # @.str.10
.L.str.10:
.asciz "error=%s"
.size .L.str.10, 9
.type .L.str.11,@object # @.str.11
.L.str.11:
.asciz "code=%d"
.size .L.str.11, 8
.type .L.str.12,@object # @.str.12
.L.str.12:
.asciz "Matrix B Copy from device to Host"
.size .L.str.12, 34
.type .L.str.15,@object # @.str.15
.L.str.15:
.asciz "Finished addition on GPU. Time taken: %5.5f\n"
.size .L.str.15, 45
.type .L.str.16,@object # @.str.16
.L.str.16:
.asciz "Speedup: %5.5f\n"
.size .L.str.16, 16
.type .L.str.17,@object # @.str.17
.L.str.17:
.asciz "The rotated image(CPU) is: "
.size .L.str.17, 28
.type .L.str.18,@object # @.str.18
.L.str.18:
.asciz "The rotated image(GPU) is: "
.size .L.str.18, 28
.type .L__unnamed_1,@object # @0
.L__unnamed_1:
.asciz "_Z10rotMatFuncPfS_iiS_"
.size .L__unnamed_1, 23
.type __hip_fatbin_wrapper,@object # @__hip_fatbin_wrapper
.section .hipFatBinSegment,"a",@progbits
.p2align 3, 0x0
__hip_fatbin_wrapper:
.long 1212764230 # 0x48495046
.long 1 # 0x1
.quad __hip_fatbin
.quad 0
.size __hip_fatbin_wrapper, 24
.type __hip_gpubin_handle,@object # @__hip_gpubin_handle
.local __hip_gpubin_handle
.comm __hip_gpubin_handle,8,8
.section .init_array,"aw",@init_array
.p2align 3, 0x0
.quad __hip_module_ctor
.type __hip_cuid_,@object # @__hip_cuid_
.bss
.globl __hip_cuid_
__hip_cuid_:
.byte 0 # 0x0
.size __hip_cuid_, 1
.type .Lstr,@object # @str
.section .rodata.str1.1,"aMS",@progbits,1
.Lstr:
.asciz "Rotating matrices on CPU..."
.size .Lstr, 28
.type .Lstr.1,@object # @str.1
.Lstr.1:
.asciz "Kernel logic wrong!"
.size .Lstr.1, 20
.type .Lstr.2,@object # @str.2
.Lstr.2:
.asciz "Kernels correct!"
.size .Lstr.2, 17
.section ".linker-options","e",@llvm_linker_options
.ident "AMD clang version 18.0.0git (https://github.com/RadeonOpenCompute/llvm-project roc-6.3.2 25012 e5bf7e55c91490b07c49d8960fa7983d864936c4)"
.section ".note.GNU-stack","",@progbits
.addrsig
.addrsig_sym _Z25__device_stub__rotMatFuncPfS_iiS_
.addrsig_sym __hip_module_ctor
.addrsig_sym __hip_module_dtor
.addrsig_sym _Z10rotMatFuncPfS_iiS_
.addrsig_sym __hip_fatbin
.addrsig_sym __hip_fatbin_wrapper
.addrsig_sym __hip_cuid_ |
You are a helpful coding assistant specialized in converting CUDA source code to CUDA device assembly. | #include "cuda_runtime.h"
#include "device_launch_parameters.h"
#include <stdio.h>
__global__ void print_my_index()
{
int tid = threadIdx.x;
int bid = blockIdx.x;
printf("my id :%d , block_id :%d \n",tid,bid);
}
//int main()
//{
// printf("hello from main \n");
// print_my_index << <2, 10 >> > ();
// cudaDeviceSynchronize();
// return 0;
//} | code for sm_80
Function : _Z14print_my_indexv
.headerflags @"EF_CUDA_TEXMODE_UNIFIED EF_CUDA_64BIT_ADDRESS EF_CUDA_SM80 EF_CUDA_VIRTUAL_SM(EF_CUDA_SM80)"
/*0000*/ IMAD.MOV.U32 R1, RZ, RZ, c[0x0][0x28] ; /* 0x00000a00ff017624 */
/* 0x000fc800078e00ff */
/*0010*/ S2R R9, SR_CTAID.X ; /* 0x0000000000097919 */
/* 0x000e220000002500 */
/*0020*/ IADD3 R1, R1, -0x8, RZ ; /* 0xfffffff801017810 */
/* 0x000fe20007ffe0ff */
/*0030*/ IMAD.MOV.U32 R4, RZ, RZ, c[0x4][0x8] ; /* 0x01000200ff047624 */
/* 0x000fe200078e00ff */
/*0040*/ MOV R0, 0x0 ; /* 0x0000000000007802 */
/* 0x000fe20000000f00 */
/*0050*/ S2R R8, SR_TID.X ; /* 0x0000000000087919 */
/* 0x000e220000002100 */
/*0060*/ IADD3 R6, P0, R1, c[0x0][0x20], RZ ; /* 0x0000080001067a10 */
/* 0x000fe20007f1e0ff */
/*0070*/ IMAD.MOV.U32 R5, RZ, RZ, c[0x4][0xc] ; /* 0x01000300ff057624 */
/* 0x000fe200078e00ff */
/*0080*/ LDC.64 R2, c[0x4][R0] ; /* 0x0100000000027b82 */
/* 0x0002a60000000a00 */
/*0090*/ IMAD.X R7, RZ, RZ, c[0x0][0x24], P0 ; /* 0x00000900ff077624 */
/* 0x000fe200000e06ff */
/*00a0*/ STL.64 [R1], R8 ; /* 0x0000000801007387 */
/* 0x0013e80000100a00 */
/*00b0*/ LEPC R8 ; /* 0x000000000008734e */
/* 0x002fc60000000000 */
/*00c0*/ MOV R11, 0x130 ; /* 0x00000130000b7802 */
/* 0x000fe40000000f00 */
/*00d0*/ MOV R20, 0xb0 ; /* 0x000000b000147802 */
/* 0x000fc40000000f00 */
/*00e0*/ MOV R21, 0x0 ; /* 0x0000000000157802 */
/* 0x000fe40000000f00 */
/*00f0*/ MOV R0, 0x0 ; /* 0x0000000000007802 */
/* 0x000fe40000000f00 */
/*0100*/ IADD3 R20, P0, P1, -R20, R11, R8 ; /* 0x0000000b14147210 */
/* 0x000fc8000791e108 */
/*0110*/ IADD3.X R21, ~R0, R21, R9, P0, P1 ; /* 0x0000001500157210 */
/* 0x000fc800007e2509 */
/*0120*/ CALL.ABS.NOINC R2 ; /* 0x0000000002007343 */
/* 0x004fea0003c00000 */
/*0130*/ EXIT ; /* 0x000000000000794d */
/* 0x000fea0003800000 */
/*0140*/ BRA 0x140; /* 0xfffffff000007947 */
/* 0x000fc0000383ffff */
/*0150*/ NOP; /* 0x0000000000007918 */
/* 0x000fc00000000000 */
/*0160*/ NOP; /* 0x0000000000007918 */
/* 0x000fc00000000000 */
/*0170*/ NOP; /* 0x0000000000007918 */
/* 0x000fc00000000000 */
/*0180*/ NOP; /* 0x0000000000007918 */
/* 0x000fc00000000000 */
/*0190*/ NOP; /* 0x0000000000007918 */
/* 0x000fc00000000000 */
/*01a0*/ NOP; /* 0x0000000000007918 */
/* 0x000fc00000000000 */
/*01b0*/ NOP; /* 0x0000000000007918 */
/* 0x000fc00000000000 */
/*01c0*/ NOP; /* 0x0000000000007918 */
/* 0x000fc00000000000 */
/*01d0*/ NOP; /* 0x0000000000007918 */
/* 0x000fc00000000000 */
/*01e0*/ NOP; /* 0x0000000000007918 */
/* 0x000fc00000000000 */
/*01f0*/ NOP; /* 0x0000000000007918 */
/* 0x000fc00000000000 */
.......... |
You are a helpful coding assistant specialized in converting CUDA source code to CUDA host assembly. | #include "cuda_runtime.h"
#include "device_launch_parameters.h"
#include <stdio.h>
__global__ void print_my_index()
{
int tid = threadIdx.x;
int bid = blockIdx.x;
printf("my id :%d , block_id :%d \n",tid,bid);
}
//int main()
//{
// printf("hello from main \n");
// print_my_index << <2, 10 >> > ();
// cudaDeviceSynchronize();
// return 0;
//} | .file "tmpxft_00165bd4_00000000-6_print_my_index.cudafe1.cpp"
.text
#APP
#NO_APP
.type _ZL26__cudaUnregisterBinaryUtilv, @function
_ZL26__cudaUnregisterBinaryUtilv:
.LFB2059:
.cfi_startproc
endbr64
subq $8, %rsp
.cfi_def_cfa_offset 16
movq _ZL20__cudaFatCubinHandle(%rip), %rdi
call __cudaUnregisterFatBinary@PLT
addq $8, %rsp
.cfi_def_cfa_offset 8
ret
.cfi_endproc
.LFE2059:
.size _ZL26__cudaUnregisterBinaryUtilv, .-_ZL26__cudaUnregisterBinaryUtilv
.globl _Z33__device_stub__Z14print_my_indexvv
.type _Z33__device_stub__Z14print_my_indexvv, @function
_Z33__device_stub__Z14print_my_indexvv:
.LFB2081:
.cfi_startproc
endbr64
subq $88, %rsp
.cfi_def_cfa_offset 96
movq %fs:40, %rax
movq %rax, 72(%rsp)
xorl %eax, %eax
movl $1, 16(%rsp)
movl $1, 20(%rsp)
movl $1, 24(%rsp)
movl $1, 28(%rsp)
movl $1, 32(%rsp)
movl $1, 36(%rsp)
leaq 8(%rsp), %rcx
movq %rsp, %rdx
leaq 28(%rsp), %rsi
leaq 16(%rsp), %rdi
call __cudaPopCallConfiguration@PLT
testl %eax, %eax
je .L7
.L3:
movq 72(%rsp), %rax
subq %fs:40, %rax
jne .L8
addq $88, %rsp
.cfi_remember_state
.cfi_def_cfa_offset 8
ret
.L7:
.cfi_restore_state
pushq 8(%rsp)
.cfi_def_cfa_offset 104
pushq 8(%rsp)
.cfi_def_cfa_offset 112
leaq 80(%rsp), %r9
movq 44(%rsp), %rcx
movl 52(%rsp), %r8d
movq 32(%rsp), %rsi
movl 40(%rsp), %edx
leaq _Z14print_my_indexv(%rip), %rdi
call cudaLaunchKernel@PLT
addq $16, %rsp
.cfi_def_cfa_offset 96
jmp .L3
.L8:
call __stack_chk_fail@PLT
.cfi_endproc
.LFE2081:
.size _Z33__device_stub__Z14print_my_indexvv, .-_Z33__device_stub__Z14print_my_indexvv
.globl _Z14print_my_indexv
.type _Z14print_my_indexv, @function
_Z14print_my_indexv:
.LFB2082:
.cfi_startproc
endbr64
subq $8, %rsp
.cfi_def_cfa_offset 16
call _Z33__device_stub__Z14print_my_indexvv
addq $8, %rsp
.cfi_def_cfa_offset 8
ret
.cfi_endproc
.LFE2082:
.size _Z14print_my_indexv, .-_Z14print_my_indexv
.section .rodata.str1.1,"aMS",@progbits,1
.LC0:
.string "_Z14print_my_indexv"
.text
.type _ZL24__sti____cudaRegisterAllv, @function
_ZL24__sti____cudaRegisterAllv:
.LFB2084:
.cfi_startproc
endbr64
subq $8, %rsp
.cfi_def_cfa_offset 16
leaq _ZL15__fatDeviceText(%rip), %rdi
call __cudaRegisterFatBinary@PLT
movq %rax, %rdi
movq %rax, _ZL20__cudaFatCubinHandle(%rip)
pushq $0
.cfi_def_cfa_offset 24
pushq $0
.cfi_def_cfa_offset 32
pushq $0
.cfi_def_cfa_offset 40
pushq $0
.cfi_def_cfa_offset 48
movl $0, %r9d
movl $-1, %r8d
leaq .LC0(%rip), %rdx
movq %rdx, %rcx
leaq _Z14print_my_indexv(%rip), %rsi
call __cudaRegisterFunction@PLT
addq $32, %rsp
.cfi_def_cfa_offset 16
movq _ZL20__cudaFatCubinHandle(%rip), %rdi
call __cudaRegisterFatBinaryEnd@PLT
leaq _ZL26__cudaUnregisterBinaryUtilv(%rip), %rdi
call atexit@PLT
addq $8, %rsp
.cfi_def_cfa_offset 8
ret
.cfi_endproc
.LFE2084:
.size _ZL24__sti____cudaRegisterAllv, .-_ZL24__sti____cudaRegisterAllv
.section .init_array,"aw"
.align 8
.quad _ZL24__sti____cudaRegisterAllv
.section .nvFatBinSegment,"aw"
.align 8
.type _ZL15__fatDeviceText, @object
.size _ZL15__fatDeviceText, 24
_ZL15__fatDeviceText:
.long 1180844977
.long 1
.quad fatbinData
.quad 0
.local _ZL20__cudaFatCubinHandle
.comm _ZL20__cudaFatCubinHandle,8,8
.ident "GCC: (Ubuntu 13.3.0-6ubuntu2~24.04) 13.3.0"
.section .note.GNU-stack,"",@progbits
.section .note.gnu.property,"a"
.align 8
.long 1f - 0f
.long 4f - 1f
.long 5
0:
.string "GNU"
1:
.align 8
.long 0xc0000002
.long 3f - 2f
2:
.long 0x3
3:
.align 8
4: |
You are a helpful coding assistant specialized in converting CUDA source code to HIP/AMD source code. | #include "cuda_runtime.h"
#include "device_launch_parameters.h"
#include <stdio.h>
__global__ void print_my_index()
{
int tid = threadIdx.x;
int bid = blockIdx.x;
printf("my id :%d , block_id :%d \n",tid,bid);
}
//int main()
//{
// printf("hello from main \n");
// print_my_index << <2, 10 >> > ();
// cudaDeviceSynchronize();
// return 0;
//} | #include "hip/hip_runtime.h"
#include <stdio.h>
__global__ void print_my_index()
{
int tid = threadIdx.x;
int bid = blockIdx.x;
printf("my id :%d , block_id :%d \n",tid,bid);
}
//int main()
//{
// printf("hello from main \n");
// print_my_index << <2, 10 >> > ();
// cudaDeviceSynchronize();
// return 0;
//} |
You are a helpful coding assistant specialized in converting HIP source code to AMD host assembly. | #include "hip/hip_runtime.h"
#include <stdio.h>
__global__ void print_my_index()
{
int tid = threadIdx.x;
int bid = blockIdx.x;
printf("my id :%d , block_id :%d \n",tid,bid);
}
//int main()
//{
// printf("hello from main \n");
// print_my_index << <2, 10 >> > ();
// cudaDeviceSynchronize();
// return 0;
//} | .text
.file "print_my_index.hip"
.globl _Z29__device_stub__print_my_indexv # -- Begin function _Z29__device_stub__print_my_indexv
.p2align 4, 0x90
.type _Z29__device_stub__print_my_indexv,@function
_Z29__device_stub__print_my_indexv: # @_Z29__device_stub__print_my_indexv
.cfi_startproc
# %bb.0:
subq $56, %rsp
.cfi_def_cfa_offset 64
leaq 32(%rsp), %rdi
leaq 16(%rsp), %rsi
leaq 8(%rsp), %rdx
movq %rsp, %rcx
callq __hipPopCallConfiguration
movq 32(%rsp), %rsi
movl 40(%rsp), %edx
movq 16(%rsp), %rcx
movl 24(%rsp), %r8d
leaq 48(%rsp), %r9
movl $_Z14print_my_indexv, %edi
pushq (%rsp)
.cfi_adjust_cfa_offset 8
pushq 16(%rsp)
.cfi_adjust_cfa_offset 8
callq hipLaunchKernel
addq $72, %rsp
.cfi_adjust_cfa_offset -72
retq
.Lfunc_end0:
.size _Z29__device_stub__print_my_indexv, .Lfunc_end0-_Z29__device_stub__print_my_indexv
.cfi_endproc
# -- End function
.p2align 4, 0x90 # -- Begin function __hip_module_ctor
.type __hip_module_ctor,@function
__hip_module_ctor: # @__hip_module_ctor
.cfi_startproc
# %bb.0:
subq $40, %rsp
.cfi_def_cfa_offset 48
cmpq $0, __hip_gpubin_handle(%rip)
jne .LBB1_2
# %bb.1:
movl $__hip_fatbin_wrapper, %edi
callq __hipRegisterFatBinary
movq %rax, __hip_gpubin_handle(%rip)
.LBB1_2:
movq __hip_gpubin_handle(%rip), %rdi
xorps %xmm0, %xmm0
movups %xmm0, 16(%rsp)
movups %xmm0, (%rsp)
movl $_Z14print_my_indexv, %esi
movl $.L__unnamed_1, %edx
movl $.L__unnamed_1, %ecx
movl $-1, %r8d
xorl %r9d, %r9d
callq __hipRegisterFunction
movl $__hip_module_dtor, %edi
addq $40, %rsp
.cfi_def_cfa_offset 8
jmp atexit # TAILCALL
.Lfunc_end1:
.size __hip_module_ctor, .Lfunc_end1-__hip_module_ctor
.cfi_endproc
# -- End function
.p2align 4, 0x90 # -- Begin function __hip_module_dtor
.type __hip_module_dtor,@function
__hip_module_dtor: # @__hip_module_dtor
.cfi_startproc
# %bb.0:
movq __hip_gpubin_handle(%rip), %rdi
testq %rdi, %rdi
je .LBB2_2
# %bb.1:
pushq %rax
.cfi_def_cfa_offset 16
callq __hipUnregisterFatBinary
movq $0, __hip_gpubin_handle(%rip)
addq $8, %rsp
.cfi_def_cfa_offset 8
.LBB2_2:
retq
.Lfunc_end2:
.size __hip_module_dtor, .Lfunc_end2-__hip_module_dtor
.cfi_endproc
# -- End function
.type _Z14print_my_indexv,@object # @_Z14print_my_indexv
.section .rodata,"a",@progbits
.globl _Z14print_my_indexv
.p2align 3, 0x0
_Z14print_my_indexv:
.quad _Z29__device_stub__print_my_indexv
.size _Z14print_my_indexv, 8
.type .L__unnamed_1,@object # @0
.section .rodata.str1.1,"aMS",@progbits,1
.L__unnamed_1:
.asciz "_Z14print_my_indexv"
.size .L__unnamed_1, 20
.type __hip_fatbin_wrapper,@object # @__hip_fatbin_wrapper
.section .hipFatBinSegment,"a",@progbits
.p2align 3, 0x0
__hip_fatbin_wrapper:
.long 1212764230 # 0x48495046
.long 1 # 0x1
.quad __hip_fatbin
.quad 0
.size __hip_fatbin_wrapper, 24
.type __hip_gpubin_handle,@object # @__hip_gpubin_handle
.local __hip_gpubin_handle
.comm __hip_gpubin_handle,8,8
.section .init_array,"aw",@init_array
.p2align 3, 0x0
.quad __hip_module_ctor
.type __hip_cuid_,@object # @__hip_cuid_
.bss
.globl __hip_cuid_
__hip_cuid_:
.byte 0 # 0x0
.size __hip_cuid_, 1
.section ".linker-options","e",@llvm_linker_options
.ident "AMD clang version 18.0.0git (https://github.com/RadeonOpenCompute/llvm-project roc-6.3.2 25012 e5bf7e55c91490b07c49d8960fa7983d864936c4)"
.section ".note.GNU-stack","",@progbits
.addrsig
.addrsig_sym _Z29__device_stub__print_my_indexv
.addrsig_sym __hip_module_ctor
.addrsig_sym __hip_module_dtor
.addrsig_sym _Z14print_my_indexv
.addrsig_sym __hip_fatbin
.addrsig_sym __hip_fatbin_wrapper
.addrsig_sym __hip_cuid_ |
You are a helpful coding assistant specialized in converting from CUDA host assembly to AMD host assembly. | .file "tmpxft_00165bd4_00000000-6_print_my_index.cudafe1.cpp"
.text
#APP
#NO_APP
.type _ZL26__cudaUnregisterBinaryUtilv, @function
_ZL26__cudaUnregisterBinaryUtilv:
.LFB2059:
.cfi_startproc
endbr64
subq $8, %rsp
.cfi_def_cfa_offset 16
movq _ZL20__cudaFatCubinHandle(%rip), %rdi
call __cudaUnregisterFatBinary@PLT
addq $8, %rsp
.cfi_def_cfa_offset 8
ret
.cfi_endproc
.LFE2059:
.size _ZL26__cudaUnregisterBinaryUtilv, .-_ZL26__cudaUnregisterBinaryUtilv
.globl _Z33__device_stub__Z14print_my_indexvv
.type _Z33__device_stub__Z14print_my_indexvv, @function
_Z33__device_stub__Z14print_my_indexvv:
.LFB2081:
.cfi_startproc
endbr64
subq $88, %rsp
.cfi_def_cfa_offset 96
movq %fs:40, %rax
movq %rax, 72(%rsp)
xorl %eax, %eax
movl $1, 16(%rsp)
movl $1, 20(%rsp)
movl $1, 24(%rsp)
movl $1, 28(%rsp)
movl $1, 32(%rsp)
movl $1, 36(%rsp)
leaq 8(%rsp), %rcx
movq %rsp, %rdx
leaq 28(%rsp), %rsi
leaq 16(%rsp), %rdi
call __cudaPopCallConfiguration@PLT
testl %eax, %eax
je .L7
.L3:
movq 72(%rsp), %rax
subq %fs:40, %rax
jne .L8
addq $88, %rsp
.cfi_remember_state
.cfi_def_cfa_offset 8
ret
.L7:
.cfi_restore_state
pushq 8(%rsp)
.cfi_def_cfa_offset 104
pushq 8(%rsp)
.cfi_def_cfa_offset 112
leaq 80(%rsp), %r9
movq 44(%rsp), %rcx
movl 52(%rsp), %r8d
movq 32(%rsp), %rsi
movl 40(%rsp), %edx
leaq _Z14print_my_indexv(%rip), %rdi
call cudaLaunchKernel@PLT
addq $16, %rsp
.cfi_def_cfa_offset 96
jmp .L3
.L8:
call __stack_chk_fail@PLT
.cfi_endproc
.LFE2081:
.size _Z33__device_stub__Z14print_my_indexvv, .-_Z33__device_stub__Z14print_my_indexvv
.globl _Z14print_my_indexv
.type _Z14print_my_indexv, @function
_Z14print_my_indexv:
.LFB2082:
.cfi_startproc
endbr64
subq $8, %rsp
.cfi_def_cfa_offset 16
call _Z33__device_stub__Z14print_my_indexvv
addq $8, %rsp
.cfi_def_cfa_offset 8
ret
.cfi_endproc
.LFE2082:
.size _Z14print_my_indexv, .-_Z14print_my_indexv
.section .rodata.str1.1,"aMS",@progbits,1
.LC0:
.string "_Z14print_my_indexv"
.text
.type _ZL24__sti____cudaRegisterAllv, @function
_ZL24__sti____cudaRegisterAllv:
.LFB2084:
.cfi_startproc
endbr64
subq $8, %rsp
.cfi_def_cfa_offset 16
leaq _ZL15__fatDeviceText(%rip), %rdi
call __cudaRegisterFatBinary@PLT
movq %rax, %rdi
movq %rax, _ZL20__cudaFatCubinHandle(%rip)
pushq $0
.cfi_def_cfa_offset 24
pushq $0
.cfi_def_cfa_offset 32
pushq $0
.cfi_def_cfa_offset 40
pushq $0
.cfi_def_cfa_offset 48
movl $0, %r9d
movl $-1, %r8d
leaq .LC0(%rip), %rdx
movq %rdx, %rcx
leaq _Z14print_my_indexv(%rip), %rsi
call __cudaRegisterFunction@PLT
addq $32, %rsp
.cfi_def_cfa_offset 16
movq _ZL20__cudaFatCubinHandle(%rip), %rdi
call __cudaRegisterFatBinaryEnd@PLT
leaq _ZL26__cudaUnregisterBinaryUtilv(%rip), %rdi
call atexit@PLT
addq $8, %rsp
.cfi_def_cfa_offset 8
ret
.cfi_endproc
.LFE2084:
.size _ZL24__sti____cudaRegisterAllv, .-_ZL24__sti____cudaRegisterAllv
.section .init_array,"aw"
.align 8
.quad _ZL24__sti____cudaRegisterAllv
.section .nvFatBinSegment,"aw"
.align 8
.type _ZL15__fatDeviceText, @object
.size _ZL15__fatDeviceText, 24
_ZL15__fatDeviceText:
.long 1180844977
.long 1
.quad fatbinData
.quad 0
.local _ZL20__cudaFatCubinHandle
.comm _ZL20__cudaFatCubinHandle,8,8
.ident "GCC: (Ubuntu 13.3.0-6ubuntu2~24.04) 13.3.0"
.section .note.GNU-stack,"",@progbits
.section .note.gnu.property,"a"
.align 8
.long 1f - 0f
.long 4f - 1f
.long 5
0:
.string "GNU"
1:
.align 8
.long 0xc0000002
.long 3f - 2f
2:
.long 0x3
3:
.align 8
4: | .text
.file "print_my_index.hip"
.globl _Z29__device_stub__print_my_indexv # -- Begin function _Z29__device_stub__print_my_indexv
.p2align 4, 0x90
.type _Z29__device_stub__print_my_indexv,@function
_Z29__device_stub__print_my_indexv: # @_Z29__device_stub__print_my_indexv
.cfi_startproc
# %bb.0:
subq $56, %rsp
.cfi_def_cfa_offset 64
leaq 32(%rsp), %rdi
leaq 16(%rsp), %rsi
leaq 8(%rsp), %rdx
movq %rsp, %rcx
callq __hipPopCallConfiguration
movq 32(%rsp), %rsi
movl 40(%rsp), %edx
movq 16(%rsp), %rcx
movl 24(%rsp), %r8d
leaq 48(%rsp), %r9
movl $_Z14print_my_indexv, %edi
pushq (%rsp)
.cfi_adjust_cfa_offset 8
pushq 16(%rsp)
.cfi_adjust_cfa_offset 8
callq hipLaunchKernel
addq $72, %rsp
.cfi_adjust_cfa_offset -72
retq
.Lfunc_end0:
.size _Z29__device_stub__print_my_indexv, .Lfunc_end0-_Z29__device_stub__print_my_indexv
.cfi_endproc
# -- End function
.p2align 4, 0x90 # -- Begin function __hip_module_ctor
.type __hip_module_ctor,@function
__hip_module_ctor: # @__hip_module_ctor
.cfi_startproc
# %bb.0:
subq $40, %rsp
.cfi_def_cfa_offset 48
cmpq $0, __hip_gpubin_handle(%rip)
jne .LBB1_2
# %bb.1:
movl $__hip_fatbin_wrapper, %edi
callq __hipRegisterFatBinary
movq %rax, __hip_gpubin_handle(%rip)
.LBB1_2:
movq __hip_gpubin_handle(%rip), %rdi
xorps %xmm0, %xmm0
movups %xmm0, 16(%rsp)
movups %xmm0, (%rsp)
movl $_Z14print_my_indexv, %esi
movl $.L__unnamed_1, %edx
movl $.L__unnamed_1, %ecx
movl $-1, %r8d
xorl %r9d, %r9d
callq __hipRegisterFunction
movl $__hip_module_dtor, %edi
addq $40, %rsp
.cfi_def_cfa_offset 8
jmp atexit # TAILCALL
.Lfunc_end1:
.size __hip_module_ctor, .Lfunc_end1-__hip_module_ctor
.cfi_endproc
# -- End function
.p2align 4, 0x90 # -- Begin function __hip_module_dtor
.type __hip_module_dtor,@function
__hip_module_dtor: # @__hip_module_dtor
.cfi_startproc
# %bb.0:
movq __hip_gpubin_handle(%rip), %rdi
testq %rdi, %rdi
je .LBB2_2
# %bb.1:
pushq %rax
.cfi_def_cfa_offset 16
callq __hipUnregisterFatBinary
movq $0, __hip_gpubin_handle(%rip)
addq $8, %rsp
.cfi_def_cfa_offset 8
.LBB2_2:
retq
.Lfunc_end2:
.size __hip_module_dtor, .Lfunc_end2-__hip_module_dtor
.cfi_endproc
# -- End function
.type _Z14print_my_indexv,@object # @_Z14print_my_indexv
.section .rodata,"a",@progbits
.globl _Z14print_my_indexv
.p2align 3, 0x0
_Z14print_my_indexv:
.quad _Z29__device_stub__print_my_indexv
.size _Z14print_my_indexv, 8
.type .L__unnamed_1,@object # @0
.section .rodata.str1.1,"aMS",@progbits,1
.L__unnamed_1:
.asciz "_Z14print_my_indexv"
.size .L__unnamed_1, 20
.type __hip_fatbin_wrapper,@object # @__hip_fatbin_wrapper
.section .hipFatBinSegment,"a",@progbits
.p2align 3, 0x0
__hip_fatbin_wrapper:
.long 1212764230 # 0x48495046
.long 1 # 0x1
.quad __hip_fatbin
.quad 0
.size __hip_fatbin_wrapper, 24
.type __hip_gpubin_handle,@object # @__hip_gpubin_handle
.local __hip_gpubin_handle
.comm __hip_gpubin_handle,8,8
.section .init_array,"aw",@init_array
.p2align 3, 0x0
.quad __hip_module_ctor
.type __hip_cuid_,@object # @__hip_cuid_
.bss
.globl __hip_cuid_
__hip_cuid_:
.byte 0 # 0x0
.size __hip_cuid_, 1
.section ".linker-options","e",@llvm_linker_options
.ident "AMD clang version 18.0.0git (https://github.com/RadeonOpenCompute/llvm-project roc-6.3.2 25012 e5bf7e55c91490b07c49d8960fa7983d864936c4)"
.section ".note.GNU-stack","",@progbits
.addrsig
.addrsig_sym _Z29__device_stub__print_my_indexv
.addrsig_sym __hip_module_ctor
.addrsig_sym __hip_module_dtor
.addrsig_sym _Z14print_my_indexv
.addrsig_sym __hip_fatbin
.addrsig_sym __hip_fatbin_wrapper
.addrsig_sym __hip_cuid_ |
You are a helpful coding assistant specialized in converting CUDA source code to CUDA device assembly. | //Parallel programming for many core GPUs
//Name: Gesu Bal
//Instructor name: Meilin Liu
/*
this is a simple cuda program calculating Tiled Matrix vector multiplication for 2 dimensions on GPU device
I multiplied two double two-dimensional matrices A, B on the device GPU.
After the device matrix multiplication kernel function is invoked, and the multiplication result is transferred back to the CPU.
The program will also compute the multiplication matrix of matrices A and B using the CPU.
Then the program compares the device-computed result with the CPU-computed result.
If it matches (within a certain tolerance, i.e., 0.000001), then it will print out "Test PASSED" to the screen before exiting.
This case is for all matrix sizes and blocksize/tilewidth: 8*8
*/
#include<stdio.h>
#include<cuda.h>
#include <time.h>
int N,blocksize;
//gpu function for multiplication
__global__ void mul_matrix_gpu(double *d_a, double *d_b, double *d_c, int width)
{
int TILE_WIDTH=8;
__shared__ double ds_M[8][8];
__shared__ double ds_N[8][8];
int bx = blockIdx.x; int by = blockIdx.y;
int tx = threadIdx.x; int ty = threadIdx.y;
// Identify the row and column of the Pd element to work on
int Row = by * TILE_WIDTH + ty;
int Col = bx * TILE_WIDTH + tx;
double Pvalue = 0;
// Loop over the Md and Nd tiles required to compute the Pd element
for (int m = 0; m < width/TILE_WIDTH; m++)
{
// Coolaborative loading of Md and Nd tiles into shared memory
ds_M[ty][tx] = d_a[Row*width + m*TILE_WIDTH +tx];
ds_N[ty][tx] = d_b[Col+(m*TILE_WIDTH+ty)*width];
__syncthreads();
for (int k = 0; k < TILE_WIDTH; k++)
Pvalue += ds_M[ty][k] * ds_N[k][tx];
__syncthreads();
}
d_c[Row*width+Col] = Pvalue;
}
//cpu function for multiplication
void mul_matrix_cpu(double *a, double *b, double *cpu_c, int N)
{
int i, j,k;
for (i=0;i<N;i++) {
for (j=0;j<N;j++) {
double sum=0;
for (k=0;k<N;k++)
{
double p=a[i*N+k];
double q=b[k*N+j];
sum=sum+(p*q);
}
cpu_c[i*N+j]=sum;
}
}
}
//cpu and gpu result matching function
bool verify(double *A, double *B, double *C, int width) {
const double relativeTolerance = 0.000001;
for(int row = 0; row < width; row++) {
for(int col = 0; col < width; col++) {
double sum = 0;
for(unsigned int k = 0; k < width; k++) {
sum += A[row*width + k]*B[k*width + col];
}
double relativeError = (sum - C[row*width + col])/sum;
//printf("%f \t",relativeError);
//printf("\n");
if (relativeError >= relativeTolerance
|| relativeError <= -relativeTolerance)
{
printf("TEST FAILED\n\n");
return false;
}
}
}
printf("TEST PASSED\n\n");
return true;
}
//print matrix
int printMatrix(double *a,int N)
{
int i,j;
for (i=0;i<N;i++)
{
for (j=0;j<N;j++)
{
printf("%f\t",a[i*N+j]);
}
printf("\n");
}
return 1;
}
int main()
{
//user input
int r, col;
printf("Select one of the following options: \n");
printf("Press a for matrix size 8 * 8 \n");
printf("Press b for matrix size 64 * 64 \n");
printf("Press c for matrix size 128 * 128 \n");
printf("Press d for matrix size 512 * 512 \n");
printf("Press e for matrix size 1024 * 1024 \n");
printf("Press f for matrix size 4096 * 4096 \n");
printf("Press any other key for exit \n");
char ch;
scanf("%c",&ch);
switch(ch)
{
case 'a':
r=8;
col=8;
N=8;
printf("Matrix size is 8 * 8 \n");
break;
case 'b':
r=64;
col=64;
N=64;
printf("Matrix size is 64 * 64 \n");
break;
case 'c':
r=128;
col=128;
N=128;
printf("Matrix size is 128 * 128 \n");
break;
case 'd':
r=512;
col=512;
N=512;
printf("Matrix size is 512 * 512 \n");
break;
case 'e':
r=1024;
col=1024;
N=1024;
printf("Matrix size is 1024 * 1024 \n");
break;
case 'f':
r=4096;
col=4096;
N=4096;
printf("Matrix size is 4096 * 4096 \n");
break;
default:
exit(1);
break;
}
//initializing the block size/tile width
blocksize=8;
//memory allocation for vectors
double *a, *b, *c, *cpu_c, *d_a, *d_b, *d_c;
int a_size=r*col;
int b_size=r*col;
int c_size=r*col;
int cpu_c_size=r*col;
a=(double*)malloc(sizeof(double)*a_size);
b=(double*)malloc(sizeof(double)*b_size);
c=(double*)malloc(sizeof(double)*c_size);
cpu_c=(double*)malloc(sizeof(double)*cpu_c_size);
//matrix initialization
int i,j;
int init=1325;
for (i=0;i<N;i++)
{
for (j=0;j<N;j++)
{
init=3125*init%65536;
a[i*col+j]=(init-32768.0)/16384.0;
init=3125*init%65536;
b[i*col+j]=(init-32768.0)/16384.0;
}
}
//printMatrix(a,N);
//printf("\n");
//printMatrix(b,N);
//printf("\n");
//allocating memory on device
int cudaret=cudaMalloc((void **)(&d_a),(N*N)*sizeof(double));
if(cudaret!=cudaSuccess)
{printf("memory was not allocated on device \n");}
cudaMalloc((void **)(&d_b),(N*N)*sizeof(double));
cudaMalloc((void **)(&d_c),(N*N)*sizeof(double));
//calculating cpu time
clock_t startCPU, end;
float cpu_time_used;
//calling CPU program
printf("Calculating results for CPU vector multiplication \n");
printf("---------\n");
startCPU = clock();
mul_matrix_cpu(a,b,cpu_c,N);
end = clock();
cpu_time_used = ((float) (end - startCPU))*1000;
cpu_time_used= cpu_time_used/ CLOCKS_PER_SEC;
printf("CPU computation time (milliseconds) \n");
printf("%f \t",cpu_time_used);
printf("\n");
printf("\n");
//printMatrix(cpu_c,N);
//printf("\n");
//time execution calculation
cudaEvent_t start,stop;
float elapsedTime;
float timeTransfer;
float timeBack;
//memory transfer time
cudaEventCreate(&start);
cudaEventCreate(&stop);
cudaEventRecord(start,0);
//copying contents of a and b to device arrays
cudaMemcpy(d_a,a,(N*N)*sizeof(double),cudaMemcpyHostToDevice);
cudaMemcpy(d_b,b,(N*N)*sizeof(double),cudaMemcpyHostToDevice);
cudaDeviceSynchronize();
cudaEventRecord(stop,0);
cudaEventSynchronize(stop);
cudaEventElapsedTime(&timeTransfer,start,stop);
cudaEventDestroy(start);
cudaEventDestroy(stop);
//Initializing block count and block size
dim3 dimBlock(blocksize,blocksize,1);
int blockCount_x = (N - 1)/(double(blocksize))+1;//Get number of blocks needed per direction.
int blockCount_y = (N - 1)/(double(blocksize))+1;
dim3 dimGrid(blockCount_x,blockCount_y,1);
printf("Block size and tile width for the program is %d\n ",blocksize);
//call kernel for gpu functioning
printf("Calling kernel for gpu computations for vector multiplication and calculating results\n");
printf("---------\n");
cudaEventCreate(&start);
cudaEventCreate(&stop);
cudaEventRecord(start,0);
mul_matrix_gpu<<<dimGrid,dimBlock>>>(d_a,d_b,d_c,N);
cudaEventRecord(stop,0);
cudaEventSynchronize(stop);
cudaEventElapsedTime(&elapsedTime,start,stop);
cudaEventDestroy(start);
cudaEventDestroy(stop);
printf("GPU computation time (milliseconds) \n");
printf("%f \t",elapsedTime);
printf("\n");
cudaEventCreate(&start);
cudaEventCreate(&stop);
cudaEventRecord(start,0);
//copying resulting back to cpu
cudaMemcpy(c,d_c,(N*N)*sizeof(double),cudaMemcpyDeviceToHost);
cudaDeviceSynchronize();
cudaEventRecord(stop,0);
cudaEventSynchronize(stop);
cudaEventElapsedTime(&timeBack,start,stop);
cudaEventDestroy(start);
cudaEventDestroy(stop);
timeTransfer += timeBack;
printf("Total Memory transfer time between CPU and GPU (milliseconds)\n");
printf("%f \t",timeTransfer);
printf("\n");
float speedup;
speedup=cpu_time_used/elapsedTime;
printf("Speedup: \n");
printf("%f \t",speedup);
printf("\n");
printf("Comparing results for CPU and GPU computations \n");
printf("---------\n");
verify(a,b,c,N);
//deallocating memory
cudaFree(d_a);
cudaFree(d_b);
cudaFree(d_c);
return 0;
} | code for sm_80
Function : _Z14mul_matrix_gpuPdS_S_i
.headerflags @"EF_CUDA_TEXMODE_UNIFIED EF_CUDA_64BIT_ADDRESS EF_CUDA_SM80 EF_CUDA_VIRTUAL_SM(EF_CUDA_SM80)"
/*0000*/ IMAD.MOV.U32 R1, RZ, RZ, c[0x0][0x28] ; /* 0x00000a00ff017624 */
/* 0x000fe400078e00ff */
/*0010*/ S2R R3, SR_CTAID.Y ; /* 0x0000000000037919 */
/* 0x000e220000002600 */
/*0020*/ MOV R6, c[0x0][0x178] ; /* 0x00005e0000067a02 */
/* 0x000fe20000000f00 */
/*0030*/ ULDC.64 UR4, c[0x0][0x118] ; /* 0x0000460000047ab9 */
/* 0x000fe20000000a00 */
/*0040*/ CS2R R20, SRZ ; /* 0x0000000000147805 */
/* 0x000fe2000001ff00 */
/*0050*/ S2R R12, SR_TID.Y ; /* 0x00000000000c7919 */
/* 0x000e220000002200 */
/*0060*/ ISETP.GE.AND P0, PT, R6, 0x8, PT ; /* 0x000000080600780c */
/* 0x000fe40003f06270 */
/*0070*/ SHF.R.S32.HI R4, RZ, 0x1f, R6 ; /* 0x0000001fff047819 */
/* 0x000fe20000011406 */
/*0080*/ S2R R5, SR_CTAID.X ; /* 0x0000000000057919 */
/* 0x000e660000002500 */
/*0090*/ LEA.HI R4, R4, c[0x0][0x178], RZ, 0x3 ; /* 0x00005e0004047a11 */
/* 0x000fe200078f18ff */
/*00a0*/ S2R R0, SR_TID.X ; /* 0x0000000000007919 */
/* 0x000e620000002100 */
/*00b0*/ IMAD R3, R3, 0x8, R12 ; /* 0x0000000803037824 */
/* 0x001fe200078e020c */
/*00c0*/ LEA R2, R5, R0, 0x3 ; /* 0x0000000005027211 */
/* 0x002fc800078e18ff */
/*00d0*/ @!P0 BRA 0x7f0 ; /* 0x0000071000008947 */
/* 0x000fea0003800000 */
/*00e0*/ LOP3.LUT R5, R6, 0xfffffff8, RZ, 0xc0, !PT ; /* 0xfffffff806057812 */
/* 0x000fe200078ec0ff */
/*00f0*/ IMAD.SHL.U32 R17, R12, 0x40, RZ ; /* 0x000000400c117824 */
/* 0x000fe200078e00ff */
/*0100*/ SHF.R.S32.HI R4, RZ, 0x3, R4 ; /* 0x00000003ff047819 */
/* 0x000fe20000011404 */
/*0110*/ HFMA2.MMA R13, -RZ, RZ, 0, 0 ; /* 0x00000000ff0d7435 */
/* 0x000fe200000001ff */
/*0120*/ ISETP.NE.AND P0, PT, R5, 0x8, PT ; /* 0x000000080500780c */
/* 0x000fe20003f05270 */
/*0130*/ IMAD R18, R3, c[0x0][0x178], R0 ; /* 0x00005e0003127a24 */
/* 0x000fe200078e0200 */
/*0140*/ CS2R R20, SRZ ; /* 0x0000000000147805 */
/* 0x000fe2000001ff00 */
/*0150*/ IMAD R16, R0, 0x8, R17 ; /* 0x0000000800107824 */
/* 0x000fe200078e0211 */
/*0160*/ LOP3.LUT R15, R4, 0x1, RZ, 0xc0, !PT ; /* 0x00000001040f7812 */
/* 0x000fd200078ec0ff */
/*0170*/ @!P0 BRA 0x5d0 ; /* 0x0000045000008947 */
/* 0x000fea0003800000 */
/*0180*/ IADD3 R14, R4, -R15, RZ ; /* 0x8000000f040e7210 */
/* 0x000fe20007ffe0ff */
/*0190*/ IMAD.MOV.U32 R13, RZ, RZ, RZ ; /* 0x000000ffff0d7224 */
/* 0x000fe200078e00ff */
/*01a0*/ CS2R R20, SRZ ; /* 0x0000000000147805 */
/* 0x000fc8000001ff00 */
/*01b0*/ LEA R23, R13.reuse, R12, 0x3 ; /* 0x0000000c0d177211 */
/* 0x040fe200078e18ff */
/*01c0*/ IMAD R26, R13, 0x8, R18 ; /* 0x000000080d1a7824 */
/* 0x000fe200078e0212 */
/*01d0*/ MOV R19, 0x8 ; /* 0x0000000800137802 */
/* 0x000fc60000000f00 */
/*01e0*/ IMAD R28, R23, c[0x0][0x178], R2 ; /* 0x00005e00171c7a24 */
/* 0x000fe400078e0202 */
/*01f0*/ IMAD.WIDE R26, R26, R19, c[0x0][0x160] ; /* 0x000058001a1a7625 */
/* 0x000fc800078e0213 */
/*0200*/ IMAD.WIDE R28, R28, R19, c[0x0][0x168] ; /* 0x00005a001c1c7625 */
/* 0x000fe200078e0213 */
/*0210*/ LDG.E.64 R6, [R26.64] ; /* 0x000000041a067981 */
/* 0x000eaa000c1e1b00 */
/*0220*/ LDG.E.64 R28, [R28.64] ; /* 0x000000041c1c7981 */
/* 0x000ee2000c1e1b00 */
/*0230*/ IADD3 R23, R23, 0x8, RZ ; /* 0x0000000817177810 */
/* 0x000fc60007ffe0ff */
/*0240*/ STS.64 [R16], R6 ; /* 0x0000000610007388 */
/* 0x004fe80000000a00 */
/*0250*/ STS.64 [R16+0x200], R28 ; /* 0x0002001c10007388 */
/* 0x008fe80000000a00 */
/*0260*/ BAR.SYNC.DEFER_BLOCKING 0x0 ; /* 0x0000000000007b1d */
/* 0x000fec0000010000 */
/*0270*/ LDS.64 R4, [R0.X8+0x200] ; /* 0x0002000000047984 */
/* 0x000fe80000008a00 */
/*0280*/ LDS.128 R8, [R17] ; /* 0x0000000011087984 */
/* 0x000e280000000c00 */
/*0290*/ LDS.64 R24, [R0.X8+0x240] ; /* 0x0002400000187984 */
/* 0x000e680000008a00 */
/*02a0*/ LDS.64 R28, [R0.X8+0x340] ; /* 0x00034000001c7984 */
/* 0x000fe20000008a00 */
/*02b0*/ DFMA R20, R4, R8, R20 ; /* 0x000000080414722b */
/* 0x0010460000000014 */
/*02c0*/ LDS.64 R8, [R0.X8+0x280] ; /* 0x0002800000087984 */
/* 0x001fe80000008a00 */
/*02d0*/ LDS.128 R4, [R17+0x10] ; /* 0x0000100011047984 */
/* 0x000e220000000c00 */
/*02e0*/ DFMA R24, R24, R10, R20 ; /* 0x0000000a1818722b */
/* 0x0022060000000014 */
/*02f0*/ LDS.64 R20, [R0.X8+0x2c0] ; /* 0x0002c00000147984 */
/* 0x002e660000008a00 */
/*0300*/ DFMA R24, R8, R4, R24 ; /* 0x000000040818722b */
/* 0x0010640000000018 */
/*0310*/ LDS.64 R4, [R0.X8+0x300] ; /* 0x0003000000047984 */
/* 0x001fe80000008a00 */
/*0320*/ LDS.128 R8, [R17+0x20] ; /* 0x0000200011087984 */
/* 0x000e220000000c00 */
/*0330*/ DFMA R6, R20, R6, R24 ; /* 0x000000061406722b */
/* 0x0022040000000018 */
/*0340*/ IMAD R20, R23, c[0x0][0x178], R2 ; /* 0x00005e0017147a24 */
/* 0x002fe400078e0202 */
/*0350*/ LDS.64 R22, [R0.X8+0x3c0] ; /* 0x0003c00000167984 */
/* 0x000fe40000008a00 */
/*0360*/ DFMA R4, R4, R8, R6 ; /* 0x000000080404722b */
/* 0x0010640000000006 */
/*0370*/ IMAD.WIDE R8, R20, R19, c[0x0][0x168] ; /* 0x00005a0014087625 */
/* 0x001fe400078e0213 */
/*0380*/ LDS.64 R20, [R0.X8+0x380] ; /* 0x0003800000147984 */
/* 0x000fe40000008a00 */
/*0390*/ DFMA R28, R28, R10, R4 ; /* 0x0000000a1c1c722b */
/* 0x0020480000000004 */
/*03a0*/ LDS.128 R4, [R17+0x30] ; /* 0x0000300011047984 */
/* 0x001e680000000c00 */
/*03b0*/ BAR.SYNC.DEFER_BLOCKING 0x0 ; /* 0x0000000000007b1d */
/* 0x000fec0000010000 */
/*03c0*/ LDG.E.64 R26, [R26.64+0x40] ; /* 0x000040041a1a7981 */
/* 0x000ea8000c1e1b00 */
/*03d0*/ LDG.E.64 R10, [R8.64] ; /* 0x00000004080a7981 */
/* 0x000ee2000c1e1b00 */
/*03e0*/ IADD3 R14, R14, -0x2, RZ ; /* 0xfffffffe0e0e7810 */
/* 0x000fc40007ffe0ff */
/*03f0*/ IADD3 R13, R13, 0x2, RZ ; /* 0x000000020d0d7810 */
/* 0x000fe40007ffe0ff */
/*0400*/ ISETP.NE.AND P0, PT, R14, RZ, PT ; /* 0x000000ff0e00720c */
/* 0x000fe20003f05270 */
/*0410*/ DFMA R28, R20, R4, R28 ; /* 0x00000004141c722b */
/* 0x002e0c000000001c */
/*0420*/ DFMA R28, R22, R6, R28 ; /* 0x00000006161c722b */
/* 0x001062000000001c */
/*0430*/ STS.64 [R16], R26 ; /* 0x0000001a10007388 */
/* 0x004fe80000000a00 */
/*0440*/ STS.64 [R16+0x200], R10 ; /* 0x0002000a10007388 */
/* 0x008fe80000000a00 */
/*0450*/ BAR.SYNC.DEFER_BLOCKING 0x0 ; /* 0x0000000000007b1d */
/* 0x000fec0000010000 */
/*0460*/ LDS.64 R24, [R0.X8+0x200] ; /* 0x0002000000187984 */
/* 0x000fe80000008a00 */
/*0470*/ LDS.128 R8, [R17] ; /* 0x0000000011087984 */
/* 0x000e680000000c00 */
/*0480*/ LDS.64 R20, [R0.X8+0x240] ; /* 0x0002400000147984 */
/* 0x000ea80000008a00 */
/*0490*/ LDS.64 R22, [R0.X8+0x280] ; /* 0x0002800000167984 */
/* 0x001fe80000008a00 */
/*04a0*/ LDS.128 R4, [R17+0x10] ; /* 0x0000100011047984 */
/* 0x000e220000000c00 */
/*04b0*/ DFMA R8, R24, R8, R28 ; /* 0x000000081808722b */
/* 0x002286000000001c */
/*04c0*/ LDS.64 R24, [R0.X8+0x2c0] ; /* 0x0002c00000187984 */
/* 0x002e660000008a00 */
/*04d0*/ DFMA R26, R20, R10, R8 ; /* 0x0000000a141a722b */
/* 0x0044240000000008 */
/*04e0*/ LDS.64 R20, [R0.X8+0x300] ; /* 0x0003000000147984 */
/* 0x004fe80000008a00 */
/*04f0*/ LDS.128 R8, [R17+0x20] ; /* 0x0000200011087984 */
/* 0x000ea20000000c00 */
/*0500*/ DFMA R26, R22, R4, R26 ; /* 0x00000004161a722b */
/* 0x001046000000001a */
/*0510*/ LDS.64 R22, [R0.X8+0x340] ; /* 0x0003400000167984 */
/* 0x001e260000008a00 */
/*0520*/ DFMA R26, R24, R6, R26 ; /* 0x00000006181a722b */
/* 0x0022a4000000001a */
/*0530*/ LDS.64 R24, [R0.X8+0x380] ; /* 0x0003800000187984 */
/* 0x002fe80000008a00 */
/*0540*/ LDS.128 R4, [R17+0x30] ; /* 0x0000300011047984 */
/* 0x000e620000000c00 */
/*0550*/ DFMA R8, R20, R8, R26 ; /* 0x000000081408722b */
/* 0x004406000000001a */
/*0560*/ LDS.64 R20, [R0.X8+0x3c0] ; /* 0x0003c00000147984 */
/* 0x004ea60000008a00 */
/*0570*/ DFMA R8, R22, R10, R8 ; /* 0x0000000a1608722b */
/* 0x001e4c0000000008 */
/*0580*/ DFMA R4, R24, R4, R8 ; /* 0x000000041804722b */
/* 0x002e8c0000000008 */
/*0590*/ DFMA R20, R20, R6, R4 ; /* 0x000000061414722b */
/* 0x0040620000000004 */
/*05a0*/ BAR.SYNC.DEFER_BLOCKING 0x0 ; /* 0x0000000000007b1d */
/* 0x000fec0000010000 */
/*05b0*/ @P0 BRA 0x1b0 ; /* 0xfffffbf000000947 */
/* 0x003fea000383ffff */
/*05c0*/ IMAD.SHL.U32 R13, R13, 0x8, RZ ; /* 0x000000080d0d7824 */
/* 0x000fe400078e00ff */
/*05d0*/ ISETP.NE.AND P0, PT, R15, RZ, PT ; /* 0x000000ff0f00720c */
/* 0x000fda0003f05270 */
/*05e0*/ @!P0 BRA 0x7f0 ; /* 0x0000020000008947 */
/* 0x000fea0003800000 */
/*05f0*/ IADD3 R5, R12, R13, RZ ; /* 0x0000000d0c057210 */
/* 0x000fe20007ffe0ff */
/*0600*/ IMAD.IADD R13, R18, 0x1, R13 ; /* 0x00000001120d7824 */
/* 0x000fe200078e020d */
/*0610*/ MOV R14, 0x8 ; /* 0x00000008000e7802 */
/* 0x000fc60000000f00 */
/*0620*/ IMAD R5, R5, c[0x0][0x178], R2 ; /* 0x00005e0005057a24 */
/* 0x000fe400078e0202 */
/*0630*/ IMAD.WIDE R12, R13, R14, c[0x0][0x160] ; /* 0x000058000d0c7625 */
/* 0x000fc800078e020e */
/*0640*/ IMAD.WIDE R14, R5, R14, c[0x0][0x168] ; /* 0x00005a00050e7625 */
/* 0x000fe400078e020e */
/*0650*/ LDG.E.64 R12, [R12.64] ; /* 0x000000040c0c7981 */
/* 0x000ea8000c1e1b00 */
/*0660*/ LDG.E.64 R26, [R14.64] ; /* 0x000000040e1a7981 */
/* 0x000ee8000c1e1b00 */
/*0670*/ STS.64 [R16], R12 ; /* 0x0000000c10007388 */
/* 0x004fe80000000a00 */
/*0680*/ STS.64 [R16+0x200], R26 ; /* 0x0002001a10007388 */
/* 0x008fe80000000a00 */
/*0690*/ BAR.SYNC.DEFER_BLOCKING 0x0 ; /* 0x0000000000007b1d */
/* 0x000fec0000010000 */
/*06a0*/ LDS.64 R28, [R0.X8+0x200] ; /* 0x00020000001c7984 */
/* 0x000fe80000008a00 */
/*06b0*/ LDS.128 R4, [R17] ; /* 0x0000000011047984 */
/* 0x000e280000000c00 */
/*06c0*/ LDS.64 R24, [R0.X8+0x240] ; /* 0x0002400000187984 */
/* 0x000e680000008a00 */
/*06d0*/ LDS.64 R22, [R0.X8+0x280] ; /* 0x0002800000167984 */
/* 0x000fe80000008a00 */
/*06e0*/ LDS.128 R8, [R17+0x10] ; /* 0x0000100011087984 */
/* 0x000ea80000000c00 */
/*06f0*/ LDS.64 R18, [R0.X8+0x2c0] ; /* 0x0002c00000127984 */
/* 0x000ee80000008a00 */
/*0700*/ LDS.128 R12, [R17+0x20] ; /* 0x00002000110c7984 */
/* 0x000fe80000000c00 */
/*0710*/ LDS.64 R26, [R0.X8+0x3c0] ; /* 0x0003c000001a7984 */
/* 0x000fe20000008a00 */
/*0720*/ DFMA R4, R28, R4, R20 ; /* 0x000000041c04722b */
/* 0x0010460000000014 */
/*0730*/ LDS.64 R20, [R0.X8+0x300] ; /* 0x0003000000147984 */
/* 0x001e260000008a00 */
/*0740*/ DFMA R4, R24, R6, R4 ; /* 0x000000061804722b */
/* 0x0022a40000000004 */
/*0750*/ LDS.64 R24, [R0.X8+0x340] ; /* 0x0003400000187984 */
/* 0x002e680000008a00 */
/*0760*/ DFMA R22, R22, R8, R4 ; /* 0x000000081616722b */
/* 0x0044e40000000004 */
/*0770*/ LDS.64 R8, [R0.X8+0x380] ; /* 0x0003800000087984 */
/* 0x004fe80000008a00 */
/*0780*/ LDS.128 R4, [R17+0x30] ; /* 0x0000300011047984 */
/* 0x000ea20000000c00 */
/*0790*/ DFMA R10, R18, R10, R22 ; /* 0x0000000a120a722b */
/* 0x008e0c0000000016 */
/*07a0*/ DFMA R10, R20, R12, R10 ; /* 0x0000000c140a722b */
/* 0x001e4c000000000a */
/*07b0*/ DFMA R10, R24, R14, R10 ; /* 0x0000000e180a722b */
/* 0x002e8c000000000a */
/*07c0*/ DFMA R4, R8, R4, R10 ; /* 0x000000040804722b */
/* 0x004e0c000000000a */
/*07d0*/ DFMA R20, R26, R6, R4 ; /* 0x000000061a14722b */
/* 0x0010620000000004 */
/*07e0*/ BAR.SYNC.DEFER_BLOCKING 0x0 ; /* 0x0000000000007b1d */
/* 0x000fec0000010000 */
/*07f0*/ IMAD.MOV.U32 R5, RZ, RZ, 0x8 ; /* 0x00000008ff057424 */
/* 0x001fe400078e00ff */
/*0800*/ IMAD R2, R3, c[0x0][0x178], R2 ; /* 0x00005e0003027a24 */
/* 0x000fc800078e0202 */
/*0810*/ IMAD.WIDE R2, R2, R5, c[0x0][0x170] ; /* 0x00005c0002027625 */
/* 0x000fca00078e0205 */
/*0820*/ STG.E.64 [R2.64], R20 ; /* 0x0000001402007986 */
/* 0x002fe2000c101b04 */
/*0830*/ EXIT ; /* 0x000000000000794d */
/* 0x000fea0003800000 */
/*0840*/ BRA 0x840; /* 0xfffffff000007947 */
/* 0x000fc0000383ffff */
/*0850*/ NOP; /* 0x0000000000007918 */
/* 0x000fc00000000000 */
/*0860*/ NOP; /* 0x0000000000007918 */
/* 0x000fc00000000000 */
/*0870*/ NOP; /* 0x0000000000007918 */
/* 0x000fc00000000000 */
/*0880*/ NOP; /* 0x0000000000007918 */
/* 0x000fc00000000000 */
/*0890*/ NOP; /* 0x0000000000007918 */
/* 0x000fc00000000000 */
/*08a0*/ NOP; /* 0x0000000000007918 */
/* 0x000fc00000000000 */
/*08b0*/ NOP; /* 0x0000000000007918 */
/* 0x000fc00000000000 */
/*08c0*/ NOP; /* 0x0000000000007918 */
/* 0x000fc00000000000 */
/*08d0*/ NOP; /* 0x0000000000007918 */
/* 0x000fc00000000000 */
/*08e0*/ NOP; /* 0x0000000000007918 */
/* 0x000fc00000000000 */
/*08f0*/ NOP; /* 0x0000000000007918 */
/* 0x000fc00000000000 */
.......... |
You are a helpful coding assistant specialized in converting CUDA source code to CUDA host assembly. | //Parallel programming for many core GPUs
//Name: Gesu Bal
//Instructor name: Meilin Liu
/*
this is a simple cuda program calculating Tiled Matrix vector multiplication for 2 dimensions on GPU device
I multiplied two double two-dimensional matrices A, B on the device GPU.
After the device matrix multiplication kernel function is invoked, and the multiplication result is transferred back to the CPU.
The program will also compute the multiplication matrix of matrices A and B using the CPU.
Then the program compares the device-computed result with the CPU-computed result.
If it matches (within a certain tolerance, i.e., 0.000001), then it will print out "Test PASSED" to the screen before exiting.
This case is for all matrix sizes and blocksize/tilewidth: 8*8
*/
#include<stdio.h>
#include<cuda.h>
#include <time.h>
int N,blocksize;
//gpu function for multiplication
__global__ void mul_matrix_gpu(double *d_a, double *d_b, double *d_c, int width)
{
int TILE_WIDTH=8;
__shared__ double ds_M[8][8];
__shared__ double ds_N[8][8];
int bx = blockIdx.x; int by = blockIdx.y;
int tx = threadIdx.x; int ty = threadIdx.y;
// Identify the row and column of the Pd element to work on
int Row = by * TILE_WIDTH + ty;
int Col = bx * TILE_WIDTH + tx;
double Pvalue = 0;
// Loop over the Md and Nd tiles required to compute the Pd element
for (int m = 0; m < width/TILE_WIDTH; m++)
{
// Coolaborative loading of Md and Nd tiles into shared memory
ds_M[ty][tx] = d_a[Row*width + m*TILE_WIDTH +tx];
ds_N[ty][tx] = d_b[Col+(m*TILE_WIDTH+ty)*width];
__syncthreads();
for (int k = 0; k < TILE_WIDTH; k++)
Pvalue += ds_M[ty][k] * ds_N[k][tx];
__syncthreads();
}
d_c[Row*width+Col] = Pvalue;
}
//cpu function for multiplication
void mul_matrix_cpu(double *a, double *b, double *cpu_c, int N)
{
int i, j,k;
for (i=0;i<N;i++) {
for (j=0;j<N;j++) {
double sum=0;
for (k=0;k<N;k++)
{
double p=a[i*N+k];
double q=b[k*N+j];
sum=sum+(p*q);
}
cpu_c[i*N+j]=sum;
}
}
}
//cpu and gpu result matching function
bool verify(double *A, double *B, double *C, int width) {
const double relativeTolerance = 0.000001;
for(int row = 0; row < width; row++) {
for(int col = 0; col < width; col++) {
double sum = 0;
for(unsigned int k = 0; k < width; k++) {
sum += A[row*width + k]*B[k*width + col];
}
double relativeError = (sum - C[row*width + col])/sum;
//printf("%f \t",relativeError);
//printf("\n");
if (relativeError >= relativeTolerance
|| relativeError <= -relativeTolerance)
{
printf("TEST FAILED\n\n");
return false;
}
}
}
printf("TEST PASSED\n\n");
return true;
}
//print matrix
int printMatrix(double *a,int N)
{
int i,j;
for (i=0;i<N;i++)
{
for (j=0;j<N;j++)
{
printf("%f\t",a[i*N+j]);
}
printf("\n");
}
return 1;
}
int main()
{
//user input
int r, col;
printf("Select one of the following options: \n");
printf("Press a for matrix size 8 * 8 \n");
printf("Press b for matrix size 64 * 64 \n");
printf("Press c for matrix size 128 * 128 \n");
printf("Press d for matrix size 512 * 512 \n");
printf("Press e for matrix size 1024 * 1024 \n");
printf("Press f for matrix size 4096 * 4096 \n");
printf("Press any other key for exit \n");
char ch;
scanf("%c",&ch);
switch(ch)
{
case 'a':
r=8;
col=8;
N=8;
printf("Matrix size is 8 * 8 \n");
break;
case 'b':
r=64;
col=64;
N=64;
printf("Matrix size is 64 * 64 \n");
break;
case 'c':
r=128;
col=128;
N=128;
printf("Matrix size is 128 * 128 \n");
break;
case 'd':
r=512;
col=512;
N=512;
printf("Matrix size is 512 * 512 \n");
break;
case 'e':
r=1024;
col=1024;
N=1024;
printf("Matrix size is 1024 * 1024 \n");
break;
case 'f':
r=4096;
col=4096;
N=4096;
printf("Matrix size is 4096 * 4096 \n");
break;
default:
exit(1);
break;
}
//initializing the block size/tile width
blocksize=8;
//memory allocation for vectors
double *a, *b, *c, *cpu_c, *d_a, *d_b, *d_c;
int a_size=r*col;
int b_size=r*col;
int c_size=r*col;
int cpu_c_size=r*col;
a=(double*)malloc(sizeof(double)*a_size);
b=(double*)malloc(sizeof(double)*b_size);
c=(double*)malloc(sizeof(double)*c_size);
cpu_c=(double*)malloc(sizeof(double)*cpu_c_size);
//matrix initialization
int i,j;
int init=1325;
for (i=0;i<N;i++)
{
for (j=0;j<N;j++)
{
init=3125*init%65536;
a[i*col+j]=(init-32768.0)/16384.0;
init=3125*init%65536;
b[i*col+j]=(init-32768.0)/16384.0;
}
}
//printMatrix(a,N);
//printf("\n");
//printMatrix(b,N);
//printf("\n");
//allocating memory on device
int cudaret=cudaMalloc((void **)(&d_a),(N*N)*sizeof(double));
if(cudaret!=cudaSuccess)
{printf("memory was not allocated on device \n");}
cudaMalloc((void **)(&d_b),(N*N)*sizeof(double));
cudaMalloc((void **)(&d_c),(N*N)*sizeof(double));
//calculating cpu time
clock_t startCPU, end;
float cpu_time_used;
//calling CPU program
printf("Calculating results for CPU vector multiplication \n");
printf("---------\n");
startCPU = clock();
mul_matrix_cpu(a,b,cpu_c,N);
end = clock();
cpu_time_used = ((float) (end - startCPU))*1000;
cpu_time_used= cpu_time_used/ CLOCKS_PER_SEC;
printf("CPU computation time (milliseconds) \n");
printf("%f \t",cpu_time_used);
printf("\n");
printf("\n");
//printMatrix(cpu_c,N);
//printf("\n");
//time execution calculation
cudaEvent_t start,stop;
float elapsedTime;
float timeTransfer;
float timeBack;
//memory transfer time
cudaEventCreate(&start);
cudaEventCreate(&stop);
cudaEventRecord(start,0);
//copying contents of a and b to device arrays
cudaMemcpy(d_a,a,(N*N)*sizeof(double),cudaMemcpyHostToDevice);
cudaMemcpy(d_b,b,(N*N)*sizeof(double),cudaMemcpyHostToDevice);
cudaDeviceSynchronize();
cudaEventRecord(stop,0);
cudaEventSynchronize(stop);
cudaEventElapsedTime(&timeTransfer,start,stop);
cudaEventDestroy(start);
cudaEventDestroy(stop);
//Initializing block count and block size
dim3 dimBlock(blocksize,blocksize,1);
int blockCount_x = (N - 1)/(double(blocksize))+1;//Get number of blocks needed per direction.
int blockCount_y = (N - 1)/(double(blocksize))+1;
dim3 dimGrid(blockCount_x,blockCount_y,1);
printf("Block size and tile width for the program is %d\n ",blocksize);
//call kernel for gpu functioning
printf("Calling kernel for gpu computations for vector multiplication and calculating results\n");
printf("---------\n");
cudaEventCreate(&start);
cudaEventCreate(&stop);
cudaEventRecord(start,0);
mul_matrix_gpu<<<dimGrid,dimBlock>>>(d_a,d_b,d_c,N);
cudaEventRecord(stop,0);
cudaEventSynchronize(stop);
cudaEventElapsedTime(&elapsedTime,start,stop);
cudaEventDestroy(start);
cudaEventDestroy(stop);
printf("GPU computation time (milliseconds) \n");
printf("%f \t",elapsedTime);
printf("\n");
cudaEventCreate(&start);
cudaEventCreate(&stop);
cudaEventRecord(start,0);
//copying resulting back to cpu
cudaMemcpy(c,d_c,(N*N)*sizeof(double),cudaMemcpyDeviceToHost);
cudaDeviceSynchronize();
cudaEventRecord(stop,0);
cudaEventSynchronize(stop);
cudaEventElapsedTime(&timeBack,start,stop);
cudaEventDestroy(start);
cudaEventDestroy(stop);
timeTransfer += timeBack;
printf("Total Memory transfer time between CPU and GPU (milliseconds)\n");
printf("%f \t",timeTransfer);
printf("\n");
float speedup;
speedup=cpu_time_used/elapsedTime;
printf("Speedup: \n");
printf("%f \t",speedup);
printf("\n");
printf("Comparing results for CPU and GPU computations \n");
printf("---------\n");
verify(a,b,c,N);
//deallocating memory
cudaFree(d_a);
cudaFree(d_b);
cudaFree(d_c);
return 0;
} | .file "tmpxft_000eebf0_00000000-6_Tiled_Matrix_Mul.cudafe1.cpp"
.text
#APP
#NO_APP
.type _ZL26__cudaUnregisterBinaryUtilv, @function
_ZL26__cudaUnregisterBinaryUtilv:
.LFB2063:
.cfi_startproc
endbr64
subq $8, %rsp
.cfi_def_cfa_offset 16
movq _ZL20__cudaFatCubinHandle(%rip), %rdi
call __cudaUnregisterFatBinary@PLT
addq $8, %rsp
.cfi_def_cfa_offset 8
ret
.cfi_endproc
.LFE2063:
.size _ZL26__cudaUnregisterBinaryUtilv, .-_ZL26__cudaUnregisterBinaryUtilv
.globl _Z14mul_matrix_cpuPdS_S_i
.type _Z14mul_matrix_cpuPdS_S_i, @function
_Z14mul_matrix_cpuPdS_S_i:
.LFB2057:
.cfi_startproc
endbr64
testl %ecx, %ecx
jle .L11
pushq %r12
.cfi_def_cfa_offset 16
.cfi_offset 12, -16
pushq %rbp
.cfi_def_cfa_offset 24
.cfi_offset 6, -24
pushq %rbx
.cfi_def_cfa_offset 32
.cfi_offset 3, -32
movq %rsi, %rbx
movq %rdx, %r9
movl %ecx, %r12d
movslq %ecx, %r11
leaq 0(,%r11,8), %rcx
movq %rdi, %r10
leaq (%rdi,%rcx), %rsi
movl $0, %ebp
.L5:
movq %rbx, %r8
movl $0, %edi
.L8:
movq %r8, %rdx
movq %r10, %rax
pxor %xmm1, %xmm1
.L6:
movsd (%rax), %xmm0
mulsd (%rdx), %xmm0
addsd %xmm0, %xmm1
addq $8, %rax
addq %rcx, %rdx
cmpq %rsi, %rax
jne .L6
movsd %xmm1, (%r9,%rdi,8)
addq $1, %rdi
addq $8, %r8
cmpq %r11, %rdi
jne .L8
addl $1, %ebp
addq %rcx, %r9
addq %rcx, %r10
addq %rcx, %rsi
cmpl %ebp, %r12d
jne .L5
popq %rbx
.cfi_def_cfa_offset 24
popq %rbp
.cfi_def_cfa_offset 16
popq %r12
.cfi_def_cfa_offset 8
ret
.L11:
.cfi_restore 3
.cfi_restore 6
.cfi_restore 12
ret
.cfi_endproc
.LFE2057:
.size _Z14mul_matrix_cpuPdS_S_i, .-_Z14mul_matrix_cpuPdS_S_i
.section .rodata.str1.1,"aMS",@progbits,1
.LC3:
.string "TEST FAILED\n\n"
.LC4:
.string "TEST PASSED\n\n"
.text
.globl _Z6verifyPdS_S_i
.type _Z6verifyPdS_S_i, @function
_Z6verifyPdS_S_i:
.LFB2058:
.cfi_startproc
endbr64
pushq %r14
.cfi_def_cfa_offset 16
.cfi_offset 14, -16
pushq %r13
.cfi_def_cfa_offset 24
.cfi_offset 13, -24
pushq %r12
.cfi_def_cfa_offset 32
.cfi_offset 12, -32
pushq %rbp
.cfi_def_cfa_offset 40
.cfi_offset 6, -40
pushq %rbx
.cfi_def_cfa_offset 48
.cfi_offset 3, -48
testl %ecx, %ecx
jle .L15
movq %rdi, %r8
movq %rsi, %r9
movq %rdx, %rbx
movl %ecx, %edi
movslq %ecx, %r12
leaq 0(,%r12,8), %r14
movl %ecx, %r10d
movl $0, %ebp
movl $0, %r13d
movsd .LC1(%rip), %xmm2
movsd .LC2(%rip), %xmm3
.L16:
movl $0, %r11d
jmp .L23
.L27:
movapd %xmm1, %xmm0
subsd (%rbx,%r11,8), %xmm0
divsd %xmm1, %xmm0
comisd %xmm2, %xmm0
jnb .L18
comisd %xmm0, %xmm3
jnb .L18
addq $1, %r11
cmpq %r12, %r11
je .L22
.L23:
movl %r11d, %edx
movl %ebp, %eax
pxor %xmm1, %xmm1
.L17:
movl %eax, %esi
movl %edx, %ecx
movsd (%r8,%rsi,8), %xmm0
mulsd (%r9,%rcx,8), %xmm0
addsd %xmm0, %xmm1
addl $1, %eax
addl %edi, %edx
cmpl %r10d, %eax
jne .L17
jmp .L27
.L18:
leaq .LC3(%rip), %rsi
movl $2, %edi
movl $0, %eax
call __printf_chk@PLT
movl $0, %eax
.L14:
popq %rbx
.cfi_remember_state
.cfi_def_cfa_offset 40
popq %rbp
.cfi_def_cfa_offset 32
popq %r12
.cfi_def_cfa_offset 24
popq %r13
.cfi_def_cfa_offset 16
popq %r14
.cfi_def_cfa_offset 8
ret
.L22:
.cfi_restore_state
addl $1, %r13d
addl %edi, %ebp
addq %r14, %rbx
addl %edi, %r10d
cmpl %r13d, %edi
jne .L16
.L15:
leaq .LC4(%rip), %rsi
movl $2, %edi
movl $0, %eax
call __printf_chk@PLT
movl $1, %eax
jmp .L14
.cfi_endproc
.LFE2058:
.size _Z6verifyPdS_S_i, .-_Z6verifyPdS_S_i
.section .rodata.str1.1
.LC5:
.string "%f\t"
.LC6:
.string "\n"
.text
.globl _Z11printMatrixPdi
.type _Z11printMatrixPdi, @function
_Z11printMatrixPdi:
.LFB2059:
.cfi_startproc
endbr64
pushq %r15
.cfi_def_cfa_offset 16
.cfi_offset 15, -16
pushq %r14
.cfi_def_cfa_offset 24
.cfi_offset 14, -24
pushq %r13
.cfi_def_cfa_offset 32
.cfi_offset 13, -32
pushq %r12
.cfi_def_cfa_offset 40
.cfi_offset 12, -40
pushq %rbp
.cfi_def_cfa_offset 48
.cfi_offset 6, -48
pushq %rbx
.cfi_def_cfa_offset 56
.cfi_offset 3, -56
subq $24, %rsp
.cfi_def_cfa_offset 80
movl %esi, 12(%rsp)
testl %esi, %esi
jle .L29
movslq %esi, %r14
leaq 0(,%r14,8), %r15
leaq (%rdi,%r15), %rbp
negq %r14
salq $3, %r14
movl $0, %r13d
leaq .LC5(%rip), %r12
.L30:
leaq 0(%rbp,%r14), %rbx
.L31:
movsd (%rbx), %xmm0
movq %r12, %rsi
movl $2, %edi
movl $1, %eax
call __printf_chk@PLT
addq $8, %rbx
cmpq %rbp, %rbx
jne .L31
leaq .LC6(%rip), %rsi
movl $2, %edi
movl $0, %eax
call __printf_chk@PLT
addl $1, %r13d
addq %r15, %rbp
cmpl %r13d, 12(%rsp)
jne .L30
.L29:
movl $1, %eax
addq $24, %rsp
.cfi_def_cfa_offset 56
popq %rbx
.cfi_def_cfa_offset 48
popq %rbp
.cfi_def_cfa_offset 40
popq %r12
.cfi_def_cfa_offset 32
popq %r13
.cfi_def_cfa_offset 24
popq %r14
.cfi_def_cfa_offset 16
popq %r15
.cfi_def_cfa_offset 8
ret
.cfi_endproc
.LFE2059:
.size _Z11printMatrixPdi, .-_Z11printMatrixPdi
.globl _Z39__device_stub__Z14mul_matrix_gpuPdS_S_iPdS_S_i
.type _Z39__device_stub__Z14mul_matrix_gpuPdS_S_iPdS_S_i, @function
_Z39__device_stub__Z14mul_matrix_gpuPdS_S_iPdS_S_i:
.LFB2085:
.cfi_startproc
endbr64
subq $152, %rsp
.cfi_def_cfa_offset 160
movq %rdi, 24(%rsp)
movq %rsi, 16(%rsp)
movq %rdx, 8(%rsp)
movl %ecx, 4(%rsp)
movq %fs:40, %rax
movq %rax, 136(%rsp)
xorl %eax, %eax
leaq 24(%rsp), %rax
movq %rax, 96(%rsp)
leaq 16(%rsp), %rax
movq %rax, 104(%rsp)
leaq 8(%rsp), %rax
movq %rax, 112(%rsp)
leaq 4(%rsp), %rax
movq %rax, 120(%rsp)
movl $1, 48(%rsp)
movl $1, 52(%rsp)
movl $1, 56(%rsp)
movl $1, 60(%rsp)
movl $1, 64(%rsp)
movl $1, 68(%rsp)
leaq 40(%rsp), %rcx
leaq 32(%rsp), %rdx
leaq 60(%rsp), %rsi
leaq 48(%rsp), %rdi
call __cudaPopCallConfiguration@PLT
testl %eax, %eax
je .L38
.L34:
movq 136(%rsp), %rax
subq %fs:40, %rax
jne .L39
addq $152, %rsp
.cfi_remember_state
.cfi_def_cfa_offset 8
ret
.L38:
.cfi_restore_state
pushq 40(%rsp)
.cfi_def_cfa_offset 168
pushq 40(%rsp)
.cfi_def_cfa_offset 176
leaq 112(%rsp), %r9
movq 76(%rsp), %rcx
movl 84(%rsp), %r8d
movq 64(%rsp), %rsi
movl 72(%rsp), %edx
leaq _Z14mul_matrix_gpuPdS_S_i(%rip), %rdi
call cudaLaunchKernel@PLT
addq $16, %rsp
.cfi_def_cfa_offset 160
jmp .L34
.L39:
call __stack_chk_fail@PLT
.cfi_endproc
.LFE2085:
.size _Z39__device_stub__Z14mul_matrix_gpuPdS_S_iPdS_S_i, .-_Z39__device_stub__Z14mul_matrix_gpuPdS_S_iPdS_S_i
.globl _Z14mul_matrix_gpuPdS_S_i
.type _Z14mul_matrix_gpuPdS_S_i, @function
_Z14mul_matrix_gpuPdS_S_i:
.LFB2086:
.cfi_startproc
endbr64
subq $8, %rsp
.cfi_def_cfa_offset 16
call _Z39__device_stub__Z14mul_matrix_gpuPdS_S_iPdS_S_i
addq $8, %rsp
.cfi_def_cfa_offset 8
ret
.cfi_endproc
.LFE2086:
.size _Z14mul_matrix_gpuPdS_S_i, .-_Z14mul_matrix_gpuPdS_S_i
.section .rodata.str1.8,"aMS",@progbits,1
.align 8
.LC7:
.string "Select one of the following options: \n"
.align 8
.LC8:
.string "Press a for matrix size 8 * 8 \n"
.align 8
.LC9:
.string "Press b for matrix size 64 * 64 \n"
.align 8
.LC10:
.string "Press c for matrix size 128 * 128 \n"
.align 8
.LC11:
.string "Press d for matrix size 512 * 512 \n"
.align 8
.LC12:
.string "Press e for matrix size 1024 * 1024 \n"
.align 8
.LC13:
.string "Press f for matrix size 4096 * 4096 \n"
.align 8
.LC14:
.string "Press any other key for exit \n"
.section .rodata.str1.1
.LC15:
.string "%c"
.LC16:
.string "Matrix size is 8 * 8 \n"
.LC17:
.string "Matrix size is 64 * 64 \n"
.LC18:
.string "Matrix size is 128 * 128 \n"
.LC19:
.string "Matrix size is 512 * 512 \n"
.LC20:
.string "Matrix size is 1024 * 1024 \n"
.LC21:
.string "Matrix size is 4096 * 4096 \n"
.section .rodata.str1.8
.align 8
.LC24:
.string "memory was not allocated on device \n"
.align 8
.LC25:
.string "Calculating results for CPU vector multiplication \n"
.section .rodata.str1.1
.LC26:
.string "---------\n"
.section .rodata.str1.8
.align 8
.LC29:
.string "CPU computation time (milliseconds) \n"
.section .rodata.str1.1
.LC30:
.string "%f \t"
.section .rodata.str1.8
.align 8
.LC32:
.string "Block size and tile width for the program is %d\n "
.align 8
.LC33:
.string "Calling kernel for gpu computations for vector multiplication and calculating results\n"
.align 8
.LC34:
.string "GPU computation time (milliseconds) \n"
.align 8
.LC35:
.string "Total Memory transfer time between CPU and GPU (milliseconds)\n"
.section .rodata.str1.1
.LC36:
.string "Speedup: \n"
.section .rodata.str1.8
.align 8
.LC37:
.string "Comparing results for CPU and GPU computations \n"
.text
.globl main
.type main, @function
main:
.LFB2060:
.cfi_startproc
endbr64
pushq %r15
.cfi_def_cfa_offset 16
.cfi_offset 15, -16
pushq %r14
.cfi_def_cfa_offset 24
.cfi_offset 14, -24
pushq %r13
.cfi_def_cfa_offset 32
.cfi_offset 13, -32
pushq %r12
.cfi_def_cfa_offset 40
.cfi_offset 12, -40
pushq %rbp
.cfi_def_cfa_offset 48
.cfi_offset 6, -48
pushq %rbx
.cfi_def_cfa_offset 56
.cfi_offset 3, -56
subq $120, %rsp
.cfi_def_cfa_offset 176
movq %fs:40, %rax
movq %rax, 104(%rsp)
xorl %eax, %eax
leaq .LC7(%rip), %rsi
movl $2, %edi
call __printf_chk@PLT
leaq .LC8(%rip), %rsi
movl $2, %edi
movl $0, %eax
call __printf_chk@PLT
leaq .LC9(%rip), %rsi
movl $2, %edi
movl $0, %eax
call __printf_chk@PLT
leaq .LC10(%rip), %rsi
movl $2, %edi
movl $0, %eax
call __printf_chk@PLT
leaq .LC11(%rip), %rsi
movl $2, %edi
movl $0, %eax
call __printf_chk@PLT
leaq .LC12(%rip), %rsi
movl $2, %edi
movl $0, %eax
call __printf_chk@PLT
leaq .LC13(%rip), %rsi
movl $2, %edi
movl $0, %eax
call __printf_chk@PLT
leaq .LC14(%rip), %rsi
movl $2, %edi
movl $0, %eax
call __printf_chk@PLT
leaq 27(%rsp), %rsi
leaq .LC15(%rip), %rdi
movl $0, %eax
call __isoc23_scanf@PLT
movzbl 27(%rsp), %eax
subl $97, %eax
cmpb $5, %al
ja .L43
movzbl %al, %eax
leaq .L45(%rip), %rdx
movslq (%rdx,%rax,4), %rax
addq %rdx, %rax
notrack jmp *%rax
.section .rodata
.align 4
.align 4
.L45:
.long .L50-.L45
.long .L49-.L45
.long .L48-.L45
.long .L47-.L45
.long .L46-.L45
.long .L44-.L45
.text
.L50:
movl $8, N(%rip)
leaq .LC16(%rip), %rsi
movl $2, %edi
movl $0, %eax
call __printf_chk@PLT
movl $8, %r14d
.L51:
movl $8, blocksize(%rip)
movl %r14d, %r13d
imull %r14d, %r13d
movslq %r13d, %r13
salq $3, %r13
movq %r13, %rdi
call malloc@PLT
movq %rax, %rbx
movq %r13, %rdi
call malloc@PLT
movq %rax, %rbp
movq %r13, %rdi
call malloc@PLT
movq %rax, %r12
movq %r13, %rdi
call malloc@PLT
movq %rax, %r13
movl N(%rip), %r8d
testl %r8d, %r8d
jle .L52
movl %r14d, %r9d
movl $0, %edi
movl $1325, %r11d
movl $0, %esi
movslq %r8d, %r10
movsd .LC22(%rip), %xmm2
movsd .LC23(%rip), %xmm1
.L53:
movslq %edi, %rcx
leaq 0(,%rcx,8), %rdx
addq %r10, %rcx
salq $3, %rcx
.L54:
imull $3125, %r11d, %eax
movl %eax, %r11d
sarl $31, %r11d
shrl $16, %r11d
addl %r11d, %eax
movzwl %ax, %eax
subl %r11d, %eax
pxor %xmm0, %xmm0
cvtsi2sdl %eax, %xmm0
subsd %xmm2, %xmm0
mulsd %xmm1, %xmm0
movsd %xmm0, (%rbx,%rdx)
imull $3125, %eax, %eax
movl %eax, %r11d
sarl $31, %r11d
shrl $16, %r11d
addl %r11d, %eax
movzwl %ax, %eax
subl %r11d, %eax
movl %eax, %r11d
pxor %xmm0, %xmm0
cvtsi2sdl %eax, %xmm0
subsd %xmm2, %xmm0
mulsd %xmm1, %xmm0
movsd %xmm0, 0(%rbp,%rdx)
addq $8, %rdx
cmpq %rdx, %rcx
jne .L54
addl $1, %esi
addl %r9d, %edi
cmpl %r8d, %esi
jne .L53
.L52:
imull %r8d, %r8d
movslq %r8d, %rsi
salq $3, %rsi
leaq 40(%rsp), %rdi
call cudaMalloc@PLT
testl %eax, %eax
jne .L60
.L55:
movl N(%rip), %eax
imull %eax, %eax
movslq %eax, %rsi
salq $3, %rsi
leaq 48(%rsp), %rdi
call cudaMalloc@PLT
movl N(%rip), %eax
imull %eax, %eax
movslq %eax, %rsi
salq $3, %rsi
leaq 56(%rsp), %rdi
call cudaMalloc@PLT
leaq .LC25(%rip), %rsi
movl $2, %edi
movl $0, %eax
call __printf_chk@PLT
leaq .LC26(%rip), %r14
movq %r14, %rsi
movl $2, %edi
movl $0, %eax
call __printf_chk@PLT
call clock@PLT
movq %rax, %r15
movl N(%rip), %ecx
movq %r13, %rdx
movq %rbp, %rsi
movq %rbx, %rdi
call _Z14mul_matrix_cpuPdS_S_i
call clock@PLT
subq %r15, %rax
pxor %xmm0, %xmm0
cvtsi2ssq %rax, %xmm0
mulss .LC27(%rip), %xmm0
divss .LC28(%rip), %xmm0
movss %xmm0, 12(%rsp)
leaq .LC29(%rip), %rsi
movl $2, %edi
movl $0, %eax
call __printf_chk@PLT
pxor %xmm0, %xmm0
cvtss2sd 12(%rsp), %xmm0
leaq .LC30(%rip), %rsi
movl $2, %edi
movl $1, %eax
call __printf_chk@PLT
leaq .LC6(%rip), %r13
movq %r13, %rsi
movl $2, %edi
movl $0, %eax
call __printf_chk@PLT
movq %r13, %rsi
movl $2, %edi
movl $0, %eax
call __printf_chk@PLT
leaq 64(%rsp), %r15
movq %r15, %rdi
call cudaEventCreate@PLT
leaq 72(%rsp), %r13
movq %r13, %rdi
call cudaEventCreate@PLT
movl $0, %esi
movq 64(%rsp), %rdi
call cudaEventRecord@PLT
movl N(%rip), %eax
imull %eax, %eax
movslq %eax, %rdx
salq $3, %rdx
movl $1, %ecx
movq %rbx, %rsi
movq 40(%rsp), %rdi
call cudaMemcpy@PLT
movl N(%rip), %eax
imull %eax, %eax
movslq %eax, %rdx
salq $3, %rdx
movl $1, %ecx
movq %rbp, %rsi
movq 48(%rsp), %rdi
call cudaMemcpy@PLT
call cudaDeviceSynchronize@PLT
movl $0, %esi
movq 72(%rsp), %rdi
call cudaEventRecord@PLT
movq 72(%rsp), %rdi
call cudaEventSynchronize@PLT
leaq 32(%rsp), %rdi
movq 72(%rsp), %rdx
movq 64(%rsp), %rsi
call cudaEventElapsedTime@PLT
movq 64(%rsp), %rdi
call cudaEventDestroy@PLT
movq 72(%rsp), %rdi
call cudaEventDestroy@PLT
movl blocksize(%rip), %edx
movl %edx, 80(%rsp)
movl %edx, 84(%rsp)
movl $1, 88(%rsp)
movl N(%rip), %eax
subl $1, %eax
pxor %xmm0, %xmm0
cvtsi2sdl %eax, %xmm0
pxor %xmm1, %xmm1
cvtsi2sdl %edx, %xmm1
divsd %xmm1, %xmm0
addsd .LC31(%rip), %xmm0
cvttsd2sil %xmm0, %eax
movl %eax, 92(%rsp)
movl %eax, 96(%rsp)
movl $1, 100(%rsp)
leaq .LC32(%rip), %rsi
movl $2, %edi
movl $0, %eax
call __printf_chk@PLT
leaq .LC33(%rip), %rsi
movl $2, %edi
movl $0, %eax
call __printf_chk@PLT
movq %r14, %rsi
movl $2, %edi
movl $0, %eax
call __printf_chk@PLT
movq %r15, %rdi
call cudaEventCreate@PLT
movq %r13, %rdi
call cudaEventCreate@PLT
movl $0, %esi
movq 64(%rsp), %rdi
call cudaEventRecord@PLT
movl 88(%rsp), %ecx
movl $0, %r9d
movl $0, %r8d
movq 80(%rsp), %rdx
movq 92(%rsp), %rdi
movl 100(%rsp), %esi
call __cudaPushCallConfiguration@PLT
testl %eax, %eax
je .L61
.L56:
movl $0, %esi
movq 72(%rsp), %rdi
call cudaEventRecord@PLT
movq 72(%rsp), %rdi
call cudaEventSynchronize@PLT
leaq 28(%rsp), %rdi
movq 72(%rsp), %rdx
movq 64(%rsp), %rsi
call cudaEventElapsedTime@PLT
movq 64(%rsp), %rdi
call cudaEventDestroy@PLT
movq 72(%rsp), %rdi
call cudaEventDestroy@PLT
leaq .LC34(%rip), %rsi
movl $2, %edi
movl $0, %eax
call __printf_chk@PLT
pxor %xmm0, %xmm0
cvtss2sd 28(%rsp), %xmm0
leaq .LC30(%rip), %r14
movq %r14, %rsi
movl $2, %edi
movl $1, %eax
call __printf_chk@PLT
leaq .LC6(%rip), %r13
movq %r13, %rsi
movl $2, %edi
movl $0, %eax
call __printf_chk@PLT
leaq 64(%rsp), %rdi
call cudaEventCreate@PLT
leaq 72(%rsp), %rdi
call cudaEventCreate@PLT
movl $0, %esi
movq 64(%rsp), %rdi
call cudaEventRecord@PLT
movl N(%rip), %eax
imull %eax, %eax
movslq %eax, %rdx
salq $3, %rdx
movl $2, %ecx
movq 56(%rsp), %rsi
movq %r12, %rdi
call cudaMemcpy@PLT
call cudaDeviceSynchronize@PLT
movl $0, %esi
movq 72(%rsp), %rdi
call cudaEventRecord@PLT
movq 72(%rsp), %rdi
call cudaEventSynchronize@PLT
leaq 36(%rsp), %rdi
movq 72(%rsp), %rdx
movq 64(%rsp), %rsi
call cudaEventElapsedTime@PLT
movq 64(%rsp), %rdi
call cudaEventDestroy@PLT
movq 72(%rsp), %rdi
call cudaEventDestroy@PLT
movss 32(%rsp), %xmm0
addss 36(%rsp), %xmm0
movss %xmm0, 32(%rsp)
leaq .LC35(%rip), %rsi
movl $2, %edi
movl $0, %eax
call __printf_chk@PLT
pxor %xmm0, %xmm0
cvtss2sd 32(%rsp), %xmm0
movq %r14, %rsi
movl $2, %edi
movl $1, %eax
call __printf_chk@PLT
movq %r13, %rsi
movl $2, %edi
movl $0, %eax
call __printf_chk@PLT
movss 12(%rsp), %xmm3
divss 28(%rsp), %xmm3
movss %xmm3, 12(%rsp)
leaq .LC36(%rip), %rsi
movl $2, %edi
movl $0, %eax
call __printf_chk@PLT
pxor %xmm0, %xmm0
cvtss2sd 12(%rsp), %xmm0
movq %r14, %rsi
movl $2, %edi
movl $1, %eax
call __printf_chk@PLT
movq %r13, %rsi
movl $2, %edi
movl $0, %eax
call __printf_chk@PLT
leaq .LC37(%rip), %rsi
movl $2, %edi
movl $0, %eax
call __printf_chk@PLT
leaq .LC26(%rip), %rsi
movl $2, %edi
movl $0, %eax
call __printf_chk@PLT
movl N(%rip), %ecx
movq %r12, %rdx
movq %rbp, %rsi
movq %rbx, %rdi
call _Z6verifyPdS_S_i
movq 40(%rsp), %rdi
call cudaFree@PLT
movq 48(%rsp), %rdi
call cudaFree@PLT
movq 56(%rsp), %rdi
call cudaFree@PLT
movq 104(%rsp), %rax
subq %fs:40, %rax
jne .L62
movl $0, %eax
addq $120, %rsp
.cfi_remember_state
.cfi_def_cfa_offset 56
popq %rbx
.cfi_def_cfa_offset 48
popq %rbp
.cfi_def_cfa_offset 40
popq %r12
.cfi_def_cfa_offset 32
popq %r13
.cfi_def_cfa_offset 24
popq %r14
.cfi_def_cfa_offset 16
popq %r15
.cfi_def_cfa_offset 8
ret
.L49:
.cfi_restore_state
movl $64, N(%rip)
leaq .LC17(%rip), %rsi
movl $2, %edi
movl $0, %eax
call __printf_chk@PLT
movl $64, %r14d
jmp .L51
.L48:
movl $128, N(%rip)
leaq .LC18(%rip), %rsi
movl $2, %edi
movl $0, %eax
call __printf_chk@PLT
movl $128, %r14d
jmp .L51
.L47:
movl $512, N(%rip)
leaq .LC19(%rip), %rsi
movl $2, %edi
movl $0, %eax
call __printf_chk@PLT
movl $512, %r14d
jmp .L51
.L46:
movl $1024, N(%rip)
leaq .LC20(%rip), %rsi
movl $2, %edi
movl $0, %eax
call __printf_chk@PLT
movl $1024, %r14d
jmp .L51
.L44:
movl $4096, N(%rip)
leaq .LC21(%rip), %rsi
movl $2, %edi
movl $0, %eax
call __printf_chk@PLT
movl $4096, %r14d
jmp .L51
.L43:
movl $1, %edi
call exit@PLT
.L60:
leaq .LC24(%rip), %rsi
movl $2, %edi
movl $0, %eax
call __printf_chk@PLT
jmp .L55
.L61:
movl N(%rip), %ecx
movq 56(%rsp), %rdx
movq 48(%rsp), %rsi
movq 40(%rsp), %rdi
call _Z39__device_stub__Z14mul_matrix_gpuPdS_S_iPdS_S_i
jmp .L56
.L62:
call __stack_chk_fail@PLT
.cfi_endproc
.LFE2060:
.size main, .-main
.section .rodata.str1.1
.LC38:
.string "_Z14mul_matrix_gpuPdS_S_i"
.text
.type _ZL24__sti____cudaRegisterAllv, @function
_ZL24__sti____cudaRegisterAllv:
.LFB2088:
.cfi_startproc
endbr64
subq $8, %rsp
.cfi_def_cfa_offset 16
leaq _ZL15__fatDeviceText(%rip), %rdi
call __cudaRegisterFatBinary@PLT
movq %rax, %rdi
movq %rax, _ZL20__cudaFatCubinHandle(%rip)
pushq $0
.cfi_def_cfa_offset 24
pushq $0
.cfi_def_cfa_offset 32
pushq $0
.cfi_def_cfa_offset 40
pushq $0
.cfi_def_cfa_offset 48
movl $0, %r9d
movl $-1, %r8d
leaq .LC38(%rip), %rdx
movq %rdx, %rcx
leaq _Z14mul_matrix_gpuPdS_S_i(%rip), %rsi
call __cudaRegisterFunction@PLT
addq $32, %rsp
.cfi_def_cfa_offset 16
movq _ZL20__cudaFatCubinHandle(%rip), %rdi
call __cudaRegisterFatBinaryEnd@PLT
leaq _ZL26__cudaUnregisterBinaryUtilv(%rip), %rdi
call atexit@PLT
addq $8, %rsp
.cfi_def_cfa_offset 8
ret
.cfi_endproc
.LFE2088:
.size _ZL24__sti____cudaRegisterAllv, .-_ZL24__sti____cudaRegisterAllv
.section .init_array,"aw"
.align 8
.quad _ZL24__sti____cudaRegisterAllv
.section .nvFatBinSegment,"aw"
.align 8
.type _ZL15__fatDeviceText, @object
.size _ZL15__fatDeviceText, 24
_ZL15__fatDeviceText:
.long 1180844977
.long 1
.quad fatbinData
.quad 0
.local _ZL20__cudaFatCubinHandle
.comm _ZL20__cudaFatCubinHandle,8,8
.globl blocksize
.bss
.align 4
.type blocksize, @object
.size blocksize, 4
blocksize:
.zero 4
.globl N
.align 4
.type N, @object
.size N, 4
N:
.zero 4
.section .rodata.cst8,"aM",@progbits,8
.align 8
.LC1:
.long -1598689907
.long 1051772663
.align 8
.LC2:
.long -1598689907
.long -1095710985
.align 8
.LC22:
.long 0
.long 1088421888
.align 8
.LC23:
.long 0
.long 1058013184
.section .rodata.cst4,"aM",@progbits,4
.align 4
.LC27:
.long 1148846080
.align 4
.LC28:
.long 1232348160
.section .rodata.cst8
.align 8
.LC31:
.long 0
.long 1072693248
.ident "GCC: (Ubuntu 13.3.0-6ubuntu2~24.04) 13.3.0"
.section .note.GNU-stack,"",@progbits
.section .note.gnu.property,"a"
.align 8
.long 1f - 0f
.long 4f - 1f
.long 5
0:
.string "GNU"
1:
.align 8
.long 0xc0000002
.long 3f - 2f
2:
.long 0x3
3:
.align 8
4: |
You are a helpful coding assistant specialized in converting CUDA source code to HIP/AMD source code. | //Parallel programming for many core GPUs
//Name: Gesu Bal
//Instructor name: Meilin Liu
/*
this is a simple cuda program calculating Tiled Matrix vector multiplication for 2 dimensions on GPU device
I multiplied two double two-dimensional matrices A, B on the device GPU.
After the device matrix multiplication kernel function is invoked, and the multiplication result is transferred back to the CPU.
The program will also compute the multiplication matrix of matrices A and B using the CPU.
Then the program compares the device-computed result with the CPU-computed result.
If it matches (within a certain tolerance, i.e., 0.000001), then it will print out "Test PASSED" to the screen before exiting.
This case is for all matrix sizes and blocksize/tilewidth: 8*8
*/
#include<stdio.h>
#include<cuda.h>
#include <time.h>
int N,blocksize;
//gpu function for multiplication
__global__ void mul_matrix_gpu(double *d_a, double *d_b, double *d_c, int width)
{
int TILE_WIDTH=8;
__shared__ double ds_M[8][8];
__shared__ double ds_N[8][8];
int bx = blockIdx.x; int by = blockIdx.y;
int tx = threadIdx.x; int ty = threadIdx.y;
// Identify the row and column of the Pd element to work on
int Row = by * TILE_WIDTH + ty;
int Col = bx * TILE_WIDTH + tx;
double Pvalue = 0;
// Loop over the Md and Nd tiles required to compute the Pd element
for (int m = 0; m < width/TILE_WIDTH; m++)
{
// Coolaborative loading of Md and Nd tiles into shared memory
ds_M[ty][tx] = d_a[Row*width + m*TILE_WIDTH +tx];
ds_N[ty][tx] = d_b[Col+(m*TILE_WIDTH+ty)*width];
__syncthreads();
for (int k = 0; k < TILE_WIDTH; k++)
Pvalue += ds_M[ty][k] * ds_N[k][tx];
__syncthreads();
}
d_c[Row*width+Col] = Pvalue;
}
//cpu function for multiplication
void mul_matrix_cpu(double *a, double *b, double *cpu_c, int N)
{
int i, j,k;
for (i=0;i<N;i++) {
for (j=0;j<N;j++) {
double sum=0;
for (k=0;k<N;k++)
{
double p=a[i*N+k];
double q=b[k*N+j];
sum=sum+(p*q);
}
cpu_c[i*N+j]=sum;
}
}
}
//cpu and gpu result matching function
bool verify(double *A, double *B, double *C, int width) {
const double relativeTolerance = 0.000001;
for(int row = 0; row < width; row++) {
for(int col = 0; col < width; col++) {
double sum = 0;
for(unsigned int k = 0; k < width; k++) {
sum += A[row*width + k]*B[k*width + col];
}
double relativeError = (sum - C[row*width + col])/sum;
//printf("%f \t",relativeError);
//printf("\n");
if (relativeError >= relativeTolerance
|| relativeError <= -relativeTolerance)
{
printf("TEST FAILED\n\n");
return false;
}
}
}
printf("TEST PASSED\n\n");
return true;
}
//print matrix
int printMatrix(double *a,int N)
{
int i,j;
for (i=0;i<N;i++)
{
for (j=0;j<N;j++)
{
printf("%f\t",a[i*N+j]);
}
printf("\n");
}
return 1;
}
int main()
{
//user input
int r, col;
printf("Select one of the following options: \n");
printf("Press a for matrix size 8 * 8 \n");
printf("Press b for matrix size 64 * 64 \n");
printf("Press c for matrix size 128 * 128 \n");
printf("Press d for matrix size 512 * 512 \n");
printf("Press e for matrix size 1024 * 1024 \n");
printf("Press f for matrix size 4096 * 4096 \n");
printf("Press any other key for exit \n");
char ch;
scanf("%c",&ch);
switch(ch)
{
case 'a':
r=8;
col=8;
N=8;
printf("Matrix size is 8 * 8 \n");
break;
case 'b':
r=64;
col=64;
N=64;
printf("Matrix size is 64 * 64 \n");
break;
case 'c':
r=128;
col=128;
N=128;
printf("Matrix size is 128 * 128 \n");
break;
case 'd':
r=512;
col=512;
N=512;
printf("Matrix size is 512 * 512 \n");
break;
case 'e':
r=1024;
col=1024;
N=1024;
printf("Matrix size is 1024 * 1024 \n");
break;
case 'f':
r=4096;
col=4096;
N=4096;
printf("Matrix size is 4096 * 4096 \n");
break;
default:
exit(1);
break;
}
//initializing the block size/tile width
blocksize=8;
//memory allocation for vectors
double *a, *b, *c, *cpu_c, *d_a, *d_b, *d_c;
int a_size=r*col;
int b_size=r*col;
int c_size=r*col;
int cpu_c_size=r*col;
a=(double*)malloc(sizeof(double)*a_size);
b=(double*)malloc(sizeof(double)*b_size);
c=(double*)malloc(sizeof(double)*c_size);
cpu_c=(double*)malloc(sizeof(double)*cpu_c_size);
//matrix initialization
int i,j;
int init=1325;
for (i=0;i<N;i++)
{
for (j=0;j<N;j++)
{
init=3125*init%65536;
a[i*col+j]=(init-32768.0)/16384.0;
init=3125*init%65536;
b[i*col+j]=(init-32768.0)/16384.0;
}
}
//printMatrix(a,N);
//printf("\n");
//printMatrix(b,N);
//printf("\n");
//allocating memory on device
int cudaret=cudaMalloc((void **)(&d_a),(N*N)*sizeof(double));
if(cudaret!=cudaSuccess)
{printf("memory was not allocated on device \n");}
cudaMalloc((void **)(&d_b),(N*N)*sizeof(double));
cudaMalloc((void **)(&d_c),(N*N)*sizeof(double));
//calculating cpu time
clock_t startCPU, end;
float cpu_time_used;
//calling CPU program
printf("Calculating results for CPU vector multiplication \n");
printf("---------\n");
startCPU = clock();
mul_matrix_cpu(a,b,cpu_c,N);
end = clock();
cpu_time_used = ((float) (end - startCPU))*1000;
cpu_time_used= cpu_time_used/ CLOCKS_PER_SEC;
printf("CPU computation time (milliseconds) \n");
printf("%f \t",cpu_time_used);
printf("\n");
printf("\n");
//printMatrix(cpu_c,N);
//printf("\n");
//time execution calculation
cudaEvent_t start,stop;
float elapsedTime;
float timeTransfer;
float timeBack;
//memory transfer time
cudaEventCreate(&start);
cudaEventCreate(&stop);
cudaEventRecord(start,0);
//copying contents of a and b to device arrays
cudaMemcpy(d_a,a,(N*N)*sizeof(double),cudaMemcpyHostToDevice);
cudaMemcpy(d_b,b,(N*N)*sizeof(double),cudaMemcpyHostToDevice);
cudaDeviceSynchronize();
cudaEventRecord(stop,0);
cudaEventSynchronize(stop);
cudaEventElapsedTime(&timeTransfer,start,stop);
cudaEventDestroy(start);
cudaEventDestroy(stop);
//Initializing block count and block size
dim3 dimBlock(blocksize,blocksize,1);
int blockCount_x = (N - 1)/(double(blocksize))+1;//Get number of blocks needed per direction.
int blockCount_y = (N - 1)/(double(blocksize))+1;
dim3 dimGrid(blockCount_x,blockCount_y,1);
printf("Block size and tile width for the program is %d\n ",blocksize);
//call kernel for gpu functioning
printf("Calling kernel for gpu computations for vector multiplication and calculating results\n");
printf("---------\n");
cudaEventCreate(&start);
cudaEventCreate(&stop);
cudaEventRecord(start,0);
mul_matrix_gpu<<<dimGrid,dimBlock>>>(d_a,d_b,d_c,N);
cudaEventRecord(stop,0);
cudaEventSynchronize(stop);
cudaEventElapsedTime(&elapsedTime,start,stop);
cudaEventDestroy(start);
cudaEventDestroy(stop);
printf("GPU computation time (milliseconds) \n");
printf("%f \t",elapsedTime);
printf("\n");
cudaEventCreate(&start);
cudaEventCreate(&stop);
cudaEventRecord(start,0);
//copying resulting back to cpu
cudaMemcpy(c,d_c,(N*N)*sizeof(double),cudaMemcpyDeviceToHost);
cudaDeviceSynchronize();
cudaEventRecord(stop,0);
cudaEventSynchronize(stop);
cudaEventElapsedTime(&timeBack,start,stop);
cudaEventDestroy(start);
cudaEventDestroy(stop);
timeTransfer += timeBack;
printf("Total Memory transfer time between CPU and GPU (milliseconds)\n");
printf("%f \t",timeTransfer);
printf("\n");
float speedup;
speedup=cpu_time_used/elapsedTime;
printf("Speedup: \n");
printf("%f \t",speedup);
printf("\n");
printf("Comparing results for CPU and GPU computations \n");
printf("---------\n");
verify(a,b,c,N);
//deallocating memory
cudaFree(d_a);
cudaFree(d_b);
cudaFree(d_c);
return 0;
} | //Parallel programming for many core GPUs
//Name: Gesu Bal
//Instructor name: Meilin Liu
/*
this is a simple cuda program calculating Tiled Matrix vector multiplication for 2 dimensions on GPU device
I multiplied two double two-dimensional matrices A, B on the device GPU.
After the device matrix multiplication kernel function is invoked, and the multiplication result is transferred back to the CPU.
The program will also compute the multiplication matrix of matrices A and B using the CPU.
Then the program compares the device-computed result with the CPU-computed result.
If it matches (within a certain tolerance, i.e., 0.000001), then it will print out "Test PASSED" to the screen before exiting.
This case is for all matrix sizes and blocksize/tilewidth: 8*8
*/
#include<stdio.h>
#include<hip/hip_runtime.h>
#include <time.h>
int N,blocksize;
//gpu function for multiplication
__global__ void mul_matrix_gpu(double *d_a, double *d_b, double *d_c, int width)
{
int TILE_WIDTH=8;
__shared__ double ds_M[8][8];
__shared__ double ds_N[8][8];
int bx = blockIdx.x; int by = blockIdx.y;
int tx = threadIdx.x; int ty = threadIdx.y;
// Identify the row and column of the Pd element to work on
int Row = by * TILE_WIDTH + ty;
int Col = bx * TILE_WIDTH + tx;
double Pvalue = 0;
// Loop over the Md and Nd tiles required to compute the Pd element
for (int m = 0; m < width/TILE_WIDTH; m++)
{
// Coolaborative loading of Md and Nd tiles into shared memory
ds_M[ty][tx] = d_a[Row*width + m*TILE_WIDTH +tx];
ds_N[ty][tx] = d_b[Col+(m*TILE_WIDTH+ty)*width];
__syncthreads();
for (int k = 0; k < TILE_WIDTH; k++)
Pvalue += ds_M[ty][k] * ds_N[k][tx];
__syncthreads();
}
d_c[Row*width+Col] = Pvalue;
}
//cpu function for multiplication
void mul_matrix_cpu(double *a, double *b, double *cpu_c, int N)
{
int i, j,k;
for (i=0;i<N;i++) {
for (j=0;j<N;j++) {
double sum=0;
for (k=0;k<N;k++)
{
double p=a[i*N+k];
double q=b[k*N+j];
sum=sum+(p*q);
}
cpu_c[i*N+j]=sum;
}
}
}
//cpu and gpu result matching function
bool verify(double *A, double *B, double *C, int width) {
const double relativeTolerance = 0.000001;
for(int row = 0; row < width; row++) {
for(int col = 0; col < width; col++) {
double sum = 0;
for(unsigned int k = 0; k < width; k++) {
sum += A[row*width + k]*B[k*width + col];
}
double relativeError = (sum - C[row*width + col])/sum;
//printf("%f \t",relativeError);
//printf("\n");
if (relativeError >= relativeTolerance
|| relativeError <= -relativeTolerance)
{
printf("TEST FAILED\n\n");
return false;
}
}
}
printf("TEST PASSED\n\n");
return true;
}
//print matrix
int printMatrix(double *a,int N)
{
int i,j;
for (i=0;i<N;i++)
{
for (j=0;j<N;j++)
{
printf("%f\t",a[i*N+j]);
}
printf("\n");
}
return 1;
}
int main()
{
//user input
int r, col;
printf("Select one of the following options: \n");
printf("Press a for matrix size 8 * 8 \n");
printf("Press b for matrix size 64 * 64 \n");
printf("Press c for matrix size 128 * 128 \n");
printf("Press d for matrix size 512 * 512 \n");
printf("Press e for matrix size 1024 * 1024 \n");
printf("Press f for matrix size 4096 * 4096 \n");
printf("Press any other key for exit \n");
char ch;
scanf("%c",&ch);
switch(ch)
{
case 'a':
r=8;
col=8;
N=8;
printf("Matrix size is 8 * 8 \n");
break;
case 'b':
r=64;
col=64;
N=64;
printf("Matrix size is 64 * 64 \n");
break;
case 'c':
r=128;
col=128;
N=128;
printf("Matrix size is 128 * 128 \n");
break;
case 'd':
r=512;
col=512;
N=512;
printf("Matrix size is 512 * 512 \n");
break;
case 'e':
r=1024;
col=1024;
N=1024;
printf("Matrix size is 1024 * 1024 \n");
break;
case 'f':
r=4096;
col=4096;
N=4096;
printf("Matrix size is 4096 * 4096 \n");
break;
default:
exit(1);
break;
}
//initializing the block size/tile width
blocksize=8;
//memory allocation for vectors
double *a, *b, *c, *cpu_c, *d_a, *d_b, *d_c;
int a_size=r*col;
int b_size=r*col;
int c_size=r*col;
int cpu_c_size=r*col;
a=(double*)malloc(sizeof(double)*a_size);
b=(double*)malloc(sizeof(double)*b_size);
c=(double*)malloc(sizeof(double)*c_size);
cpu_c=(double*)malloc(sizeof(double)*cpu_c_size);
//matrix initialization
int i,j;
int init=1325;
for (i=0;i<N;i++)
{
for (j=0;j<N;j++)
{
init=3125*init%65536;
a[i*col+j]=(init-32768.0)/16384.0;
init=3125*init%65536;
b[i*col+j]=(init-32768.0)/16384.0;
}
}
//printMatrix(a,N);
//printf("\n");
//printMatrix(b,N);
//printf("\n");
//allocating memory on device
int cudaret=hipMalloc((void **)(&d_a),(N*N)*sizeof(double));
if(cudaret!=hipSuccess)
{printf("memory was not allocated on device \n");}
hipMalloc((void **)(&d_b),(N*N)*sizeof(double));
hipMalloc((void **)(&d_c),(N*N)*sizeof(double));
//calculating cpu time
clock_t startCPU, end;
float cpu_time_used;
//calling CPU program
printf("Calculating results for CPU vector multiplication \n");
printf("---------\n");
startCPU = clock();
mul_matrix_cpu(a,b,cpu_c,N);
end = clock();
cpu_time_used = ((float) (end - startCPU))*1000;
cpu_time_used= cpu_time_used/ CLOCKS_PER_SEC;
printf("CPU computation time (milliseconds) \n");
printf("%f \t",cpu_time_used);
printf("\n");
printf("\n");
//printMatrix(cpu_c,N);
//printf("\n");
//time execution calculation
hipEvent_t start,stop;
float elapsedTime;
float timeTransfer;
float timeBack;
//memory transfer time
hipEventCreate(&start);
hipEventCreate(&stop);
hipEventRecord(start,0);
//copying contents of a and b to device arrays
hipMemcpy(d_a,a,(N*N)*sizeof(double),hipMemcpyHostToDevice);
hipMemcpy(d_b,b,(N*N)*sizeof(double),hipMemcpyHostToDevice);
hipDeviceSynchronize();
hipEventRecord(stop,0);
hipEventSynchronize(stop);
hipEventElapsedTime(&timeTransfer,start,stop);
hipEventDestroy(start);
hipEventDestroy(stop);
//Initializing block count and block size
dim3 dimBlock(blocksize,blocksize,1);
int blockCount_x = (N - 1)/(double(blocksize))+1;//Get number of blocks needed per direction.
int blockCount_y = (N - 1)/(double(blocksize))+1;
dim3 dimGrid(blockCount_x,blockCount_y,1);
printf("Block size and tile width for the program is %d\n ",blocksize);
//call kernel for gpu functioning
printf("Calling kernel for gpu computations for vector multiplication and calculating results\n");
printf("---------\n");
hipEventCreate(&start);
hipEventCreate(&stop);
hipEventRecord(start,0);
mul_matrix_gpu<<<dimGrid,dimBlock>>>(d_a,d_b,d_c,N);
hipEventRecord(stop,0);
hipEventSynchronize(stop);
hipEventElapsedTime(&elapsedTime,start,stop);
hipEventDestroy(start);
hipEventDestroy(stop);
printf("GPU computation time (milliseconds) \n");
printf("%f \t",elapsedTime);
printf("\n");
hipEventCreate(&start);
hipEventCreate(&stop);
hipEventRecord(start,0);
//copying resulting back to cpu
hipMemcpy(c,d_c,(N*N)*sizeof(double),hipMemcpyDeviceToHost);
hipDeviceSynchronize();
hipEventRecord(stop,0);
hipEventSynchronize(stop);
hipEventElapsedTime(&timeBack,start,stop);
hipEventDestroy(start);
hipEventDestroy(stop);
timeTransfer += timeBack;
printf("Total Memory transfer time between CPU and GPU (milliseconds)\n");
printf("%f \t",timeTransfer);
printf("\n");
float speedup;
speedup=cpu_time_used/elapsedTime;
printf("Speedup: \n");
printf("%f \t",speedup);
printf("\n");
printf("Comparing results for CPU and GPU computations \n");
printf("---------\n");
verify(a,b,c,N);
//deallocating memory
hipFree(d_a);
hipFree(d_b);
hipFree(d_c);
return 0;
} |
You are a helpful coding assistant specialized in converting HIP source code to AMD device assembly. | //Parallel programming for many core GPUs
//Name: Gesu Bal
//Instructor name: Meilin Liu
/*
this is a simple cuda program calculating Tiled Matrix vector multiplication for 2 dimensions on GPU device
I multiplied two double two-dimensional matrices A, B on the device GPU.
After the device matrix multiplication kernel function is invoked, and the multiplication result is transferred back to the CPU.
The program will also compute the multiplication matrix of matrices A and B using the CPU.
Then the program compares the device-computed result with the CPU-computed result.
If it matches (within a certain tolerance, i.e., 0.000001), then it will print out "Test PASSED" to the screen before exiting.
This case is for all matrix sizes and blocksize/tilewidth: 8*8
*/
#include<stdio.h>
#include<hip/hip_runtime.h>
#include <time.h>
int N,blocksize;
//gpu function for multiplication
__global__ void mul_matrix_gpu(double *d_a, double *d_b, double *d_c, int width)
{
int TILE_WIDTH=8;
__shared__ double ds_M[8][8];
__shared__ double ds_N[8][8];
int bx = blockIdx.x; int by = blockIdx.y;
int tx = threadIdx.x; int ty = threadIdx.y;
// Identify the row and column of the Pd element to work on
int Row = by * TILE_WIDTH + ty;
int Col = bx * TILE_WIDTH + tx;
double Pvalue = 0;
// Loop over the Md and Nd tiles required to compute the Pd element
for (int m = 0; m < width/TILE_WIDTH; m++)
{
// Coolaborative loading of Md and Nd tiles into shared memory
ds_M[ty][tx] = d_a[Row*width + m*TILE_WIDTH +tx];
ds_N[ty][tx] = d_b[Col+(m*TILE_WIDTH+ty)*width];
__syncthreads();
for (int k = 0; k < TILE_WIDTH; k++)
Pvalue += ds_M[ty][k] * ds_N[k][tx];
__syncthreads();
}
d_c[Row*width+Col] = Pvalue;
}
//cpu function for multiplication
void mul_matrix_cpu(double *a, double *b, double *cpu_c, int N)
{
int i, j,k;
for (i=0;i<N;i++) {
for (j=0;j<N;j++) {
double sum=0;
for (k=0;k<N;k++)
{
double p=a[i*N+k];
double q=b[k*N+j];
sum=sum+(p*q);
}
cpu_c[i*N+j]=sum;
}
}
}
//cpu and gpu result matching function
bool verify(double *A, double *B, double *C, int width) {
const double relativeTolerance = 0.000001;
for(int row = 0; row < width; row++) {
for(int col = 0; col < width; col++) {
double sum = 0;
for(unsigned int k = 0; k < width; k++) {
sum += A[row*width + k]*B[k*width + col];
}
double relativeError = (sum - C[row*width + col])/sum;
//printf("%f \t",relativeError);
//printf("\n");
if (relativeError >= relativeTolerance
|| relativeError <= -relativeTolerance)
{
printf("TEST FAILED\n\n");
return false;
}
}
}
printf("TEST PASSED\n\n");
return true;
}
//print matrix
int printMatrix(double *a,int N)
{
int i,j;
for (i=0;i<N;i++)
{
for (j=0;j<N;j++)
{
printf("%f\t",a[i*N+j]);
}
printf("\n");
}
return 1;
}
int main()
{
//user input
int r, col;
printf("Select one of the following options: \n");
printf("Press a for matrix size 8 * 8 \n");
printf("Press b for matrix size 64 * 64 \n");
printf("Press c for matrix size 128 * 128 \n");
printf("Press d for matrix size 512 * 512 \n");
printf("Press e for matrix size 1024 * 1024 \n");
printf("Press f for matrix size 4096 * 4096 \n");
printf("Press any other key for exit \n");
char ch;
scanf("%c",&ch);
switch(ch)
{
case 'a':
r=8;
col=8;
N=8;
printf("Matrix size is 8 * 8 \n");
break;
case 'b':
r=64;
col=64;
N=64;
printf("Matrix size is 64 * 64 \n");
break;
case 'c':
r=128;
col=128;
N=128;
printf("Matrix size is 128 * 128 \n");
break;
case 'd':
r=512;
col=512;
N=512;
printf("Matrix size is 512 * 512 \n");
break;
case 'e':
r=1024;
col=1024;
N=1024;
printf("Matrix size is 1024 * 1024 \n");
break;
case 'f':
r=4096;
col=4096;
N=4096;
printf("Matrix size is 4096 * 4096 \n");
break;
default:
exit(1);
break;
}
//initializing the block size/tile width
blocksize=8;
//memory allocation for vectors
double *a, *b, *c, *cpu_c, *d_a, *d_b, *d_c;
int a_size=r*col;
int b_size=r*col;
int c_size=r*col;
int cpu_c_size=r*col;
a=(double*)malloc(sizeof(double)*a_size);
b=(double*)malloc(sizeof(double)*b_size);
c=(double*)malloc(sizeof(double)*c_size);
cpu_c=(double*)malloc(sizeof(double)*cpu_c_size);
//matrix initialization
int i,j;
int init=1325;
for (i=0;i<N;i++)
{
for (j=0;j<N;j++)
{
init=3125*init%65536;
a[i*col+j]=(init-32768.0)/16384.0;
init=3125*init%65536;
b[i*col+j]=(init-32768.0)/16384.0;
}
}
//printMatrix(a,N);
//printf("\n");
//printMatrix(b,N);
//printf("\n");
//allocating memory on device
int cudaret=hipMalloc((void **)(&d_a),(N*N)*sizeof(double));
if(cudaret!=hipSuccess)
{printf("memory was not allocated on device \n");}
hipMalloc((void **)(&d_b),(N*N)*sizeof(double));
hipMalloc((void **)(&d_c),(N*N)*sizeof(double));
//calculating cpu time
clock_t startCPU, end;
float cpu_time_used;
//calling CPU program
printf("Calculating results for CPU vector multiplication \n");
printf("---------\n");
startCPU = clock();
mul_matrix_cpu(a,b,cpu_c,N);
end = clock();
cpu_time_used = ((float) (end - startCPU))*1000;
cpu_time_used= cpu_time_used/ CLOCKS_PER_SEC;
printf("CPU computation time (milliseconds) \n");
printf("%f \t",cpu_time_used);
printf("\n");
printf("\n");
//printMatrix(cpu_c,N);
//printf("\n");
//time execution calculation
hipEvent_t start,stop;
float elapsedTime;
float timeTransfer;
float timeBack;
//memory transfer time
hipEventCreate(&start);
hipEventCreate(&stop);
hipEventRecord(start,0);
//copying contents of a and b to device arrays
hipMemcpy(d_a,a,(N*N)*sizeof(double),hipMemcpyHostToDevice);
hipMemcpy(d_b,b,(N*N)*sizeof(double),hipMemcpyHostToDevice);
hipDeviceSynchronize();
hipEventRecord(stop,0);
hipEventSynchronize(stop);
hipEventElapsedTime(&timeTransfer,start,stop);
hipEventDestroy(start);
hipEventDestroy(stop);
//Initializing block count and block size
dim3 dimBlock(blocksize,blocksize,1);
int blockCount_x = (N - 1)/(double(blocksize))+1;//Get number of blocks needed per direction.
int blockCount_y = (N - 1)/(double(blocksize))+1;
dim3 dimGrid(blockCount_x,blockCount_y,1);
printf("Block size and tile width for the program is %d\n ",blocksize);
//call kernel for gpu functioning
printf("Calling kernel for gpu computations for vector multiplication and calculating results\n");
printf("---------\n");
hipEventCreate(&start);
hipEventCreate(&stop);
hipEventRecord(start,0);
mul_matrix_gpu<<<dimGrid,dimBlock>>>(d_a,d_b,d_c,N);
hipEventRecord(stop,0);
hipEventSynchronize(stop);
hipEventElapsedTime(&elapsedTime,start,stop);
hipEventDestroy(start);
hipEventDestroy(stop);
printf("GPU computation time (milliseconds) \n");
printf("%f \t",elapsedTime);
printf("\n");
hipEventCreate(&start);
hipEventCreate(&stop);
hipEventRecord(start,0);
//copying resulting back to cpu
hipMemcpy(c,d_c,(N*N)*sizeof(double),hipMemcpyDeviceToHost);
hipDeviceSynchronize();
hipEventRecord(stop,0);
hipEventSynchronize(stop);
hipEventElapsedTime(&timeBack,start,stop);
hipEventDestroy(start);
hipEventDestroy(stop);
timeTransfer += timeBack;
printf("Total Memory transfer time between CPU and GPU (milliseconds)\n");
printf("%f \t",timeTransfer);
printf("\n");
float speedup;
speedup=cpu_time_used/elapsedTime;
printf("Speedup: \n");
printf("%f \t",speedup);
printf("\n");
printf("Comparing results for CPU and GPU computations \n");
printf("---------\n");
verify(a,b,c,N);
//deallocating memory
hipFree(d_a);
hipFree(d_b);
hipFree(d_c);
return 0;
} | .text
.amdgcn_target "amdgcn-amd-amdhsa--gfx1100"
.protected _Z14mul_matrix_gpuPdS_S_i
.globl _Z14mul_matrix_gpuPdS_S_i
.p2align 8
.type _Z14mul_matrix_gpuPdS_S_i,@function
_Z14mul_matrix_gpuPdS_S_i:
s_load_b32 s2, s[0:1], 0x18
v_bfe_u32 v7, v0, 10, 10
v_and_b32_e32 v5, 0x3ff, v0
v_mov_b32_e32 v1, 0
v_mov_b32_e32 v2, 0
s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_4)
v_lshl_add_u32 v6, s15, 3, v7
v_lshl_add_u32 v0, s14, 3, v5
s_waitcnt lgkmcnt(0)
s_cmp_lt_i32 s2, 8
s_cbranch_scc1 .LBB0_5
s_load_b128 s[4:7], s[0:1], 0x0
v_lshlrev_b32_e32 v1, 3, v5
v_lshlrev_b32_e32 v8, 6, v7
s_ashr_i32 s3, s2, 31
v_mad_u64_u32 v[3:4], null, v6, s2, v[5:6]
s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_2) | instid1(VALU_DEP_2)
v_add_nc_u32_e32 v9, 0x200, v1
s_lshr_b32 s3, s3, 29
v_dual_mov_b32 v1, 0 :: v_dual_add_nc_u32 v4, v8, v1
v_dual_mov_b32 v2, 0 :: v_dual_add_nc_u32 v5, v9, v8
s_add_i32 s3, s2, s3
s_mov_b32 s8, 0
s_ashr_i32 s3, s3, 3
s_set_inst_prefetch_distance 0x1
.p2align 6
.LBB0_2:
s_lshl_b32 s9, s8, 3
s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_2) | instid1(VALU_DEP_2)
v_add_nc_u32_e32 v11, s9, v7
v_add_nc_u32_e32 v10, s9, v3
s_mov_b32 s9, 0
v_mad_u64_u32 v[12:13], null, v11, s2, v[0:1]
s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
v_ashrrev_i32_e32 v11, 31, v10
v_lshlrev_b64 v[10:11], 3, v[10:11]
s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_1) | instid1(VALU_DEP_2)
v_ashrrev_i32_e32 v13, 31, v12
s_waitcnt lgkmcnt(0)
v_add_co_u32 v10, vcc_lo, s4, v10
s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_4)
v_lshlrev_b64 v[12:13], 3, v[12:13]
v_add_co_ci_u32_e32 v11, vcc_lo, s5, v11, vcc_lo
s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_3)
v_add_co_u32 v12, vcc_lo, s6, v12
v_add_co_ci_u32_e32 v13, vcc_lo, s7, v13, vcc_lo
global_load_b64 v[14:15], v[10:11], off
global_load_b64 v[11:12], v[12:13], off
v_mov_b32_e32 v10, v9
s_waitcnt vmcnt(1)
ds_store_b64 v4, v[14:15]
s_waitcnt vmcnt(0)
ds_store_b64 v5, v[11:12]
s_waitcnt lgkmcnt(0)
s_barrier
buffer_gl0_inv
.LBB0_3:
v_add_nc_u32_e32 v13, s9, v8
s_add_i32 s9, s9, 8
ds_load_b64 v[11:12], v10
ds_load_b64 v[13:14], v13
v_add_nc_u32_e32 v10, 64, v10
s_cmp_eq_u32 s9, 64
s_waitcnt lgkmcnt(0)
v_fma_f64 v[1:2], v[13:14], v[11:12], v[1:2]
s_cbranch_scc0 .LBB0_3
s_add_i32 s8, s8, 1
s_delay_alu instid0(SALU_CYCLE_1)
s_cmp_eq_u32 s8, s3
s_barrier
buffer_gl0_inv
s_cbranch_scc0 .LBB0_2
.LBB0_5:
s_set_inst_prefetch_distance 0x2
s_load_b64 s[0:1], s[0:1], 0x10
v_mad_u64_u32 v[3:4], null, v6, s2, v[0:1]
s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
v_ashrrev_i32_e32 v4, 31, v3
v_lshlrev_b64 v[3:4], 3, v[3:4]
s_waitcnt lgkmcnt(0)
s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_2)
v_add_co_u32 v3, vcc_lo, s0, v3
v_add_co_ci_u32_e32 v4, vcc_lo, s1, v4, vcc_lo
global_store_b64 v[3:4], v[1:2], off
s_nop 0
s_sendmsg sendmsg(MSG_DEALLOC_VGPRS)
s_endpgm
.section .rodata,"a",@progbits
.p2align 6, 0x0
.amdhsa_kernel _Z14mul_matrix_gpuPdS_S_i
.amdhsa_group_segment_fixed_size 1024
.amdhsa_private_segment_fixed_size 0
.amdhsa_kernarg_size 28
.amdhsa_user_sgpr_count 14
.amdhsa_user_sgpr_dispatch_ptr 0
.amdhsa_user_sgpr_queue_ptr 0
.amdhsa_user_sgpr_kernarg_segment_ptr 1
.amdhsa_user_sgpr_dispatch_id 0
.amdhsa_user_sgpr_private_segment_size 0
.amdhsa_wavefront_size32 1
.amdhsa_uses_dynamic_stack 0
.amdhsa_enable_private_segment 0
.amdhsa_system_sgpr_workgroup_id_x 1
.amdhsa_system_sgpr_workgroup_id_y 1
.amdhsa_system_sgpr_workgroup_id_z 0
.amdhsa_system_sgpr_workgroup_info 0
.amdhsa_system_vgpr_workitem_id 1
.amdhsa_next_free_vgpr 16
.amdhsa_next_free_sgpr 16
.amdhsa_float_round_mode_32 0
.amdhsa_float_round_mode_16_64 0
.amdhsa_float_denorm_mode_32 3
.amdhsa_float_denorm_mode_16_64 3
.amdhsa_dx10_clamp 1
.amdhsa_ieee_mode 1
.amdhsa_fp16_overflow 0
.amdhsa_workgroup_processor_mode 1
.amdhsa_memory_ordered 1
.amdhsa_forward_progress 0
.amdhsa_shared_vgpr_count 0
.amdhsa_exception_fp_ieee_invalid_op 0
.amdhsa_exception_fp_denorm_src 0
.amdhsa_exception_fp_ieee_div_zero 0
.amdhsa_exception_fp_ieee_overflow 0
.amdhsa_exception_fp_ieee_underflow 0
.amdhsa_exception_fp_ieee_inexact 0
.amdhsa_exception_int_div_zero 0
.end_amdhsa_kernel
.text
.Lfunc_end0:
.size _Z14mul_matrix_gpuPdS_S_i, .Lfunc_end0-_Z14mul_matrix_gpuPdS_S_i
.section .AMDGPU.csdata,"",@progbits
.text
.p2alignl 7, 3214868480
.fill 96, 4, 3214868480
.type __hip_cuid_,@object
.section .bss,"aw",@nobits
.globl __hip_cuid_
__hip_cuid_:
.byte 0
.size __hip_cuid_, 1
.ident "AMD clang version 18.0.0git (https://github.com/RadeonOpenCompute/llvm-project roc-6.3.2 25012 e5bf7e55c91490b07c49d8960fa7983d864936c4)"
.section ".note.GNU-stack","",@progbits
.addrsig
.addrsig_sym __hip_cuid_
.amdgpu_metadata
---
amdhsa.kernels:
- .args:
- .address_space: global
.offset: 0
.size: 8
.value_kind: global_buffer
- .address_space: global
.offset: 8
.size: 8
.value_kind: global_buffer
- .address_space: global
.offset: 16
.size: 8
.value_kind: global_buffer
- .offset: 24
.size: 4
.value_kind: by_value
.group_segment_fixed_size: 1024
.kernarg_segment_align: 8
.kernarg_segment_size: 28
.language: OpenCL C
.language_version:
- 2
- 0
.max_flat_workgroup_size: 1024
.name: _Z14mul_matrix_gpuPdS_S_i
.private_segment_fixed_size: 0
.sgpr_count: 18
.sgpr_spill_count: 0
.symbol: _Z14mul_matrix_gpuPdS_S_i.kd
.uniform_work_group_size: 1
.uses_dynamic_stack: false
.vgpr_count: 16
.vgpr_spill_count: 0
.wavefront_size: 32
.workgroup_processor_mode: 1
amdhsa.target: amdgcn-amd-amdhsa--gfx1100
amdhsa.version:
- 1
- 2
...
.end_amdgpu_metadata |
You are a helpful coding assistant specialized in converting HIP source code to AMD host assembly. | //Parallel programming for many core GPUs
//Name: Gesu Bal
//Instructor name: Meilin Liu
/*
this is a simple cuda program calculating Tiled Matrix vector multiplication for 2 dimensions on GPU device
I multiplied two double two-dimensional matrices A, B on the device GPU.
After the device matrix multiplication kernel function is invoked, and the multiplication result is transferred back to the CPU.
The program will also compute the multiplication matrix of matrices A and B using the CPU.
Then the program compares the device-computed result with the CPU-computed result.
If it matches (within a certain tolerance, i.e., 0.000001), then it will print out "Test PASSED" to the screen before exiting.
This case is for all matrix sizes and blocksize/tilewidth: 8*8
*/
#include<stdio.h>
#include<hip/hip_runtime.h>
#include <time.h>
int N,blocksize;
//gpu function for multiplication
__global__ void mul_matrix_gpu(double *d_a, double *d_b, double *d_c, int width)
{
int TILE_WIDTH=8;
__shared__ double ds_M[8][8];
__shared__ double ds_N[8][8];
int bx = blockIdx.x; int by = blockIdx.y;
int tx = threadIdx.x; int ty = threadIdx.y;
// Identify the row and column of the Pd element to work on
int Row = by * TILE_WIDTH + ty;
int Col = bx * TILE_WIDTH + tx;
double Pvalue = 0;
// Loop over the Md and Nd tiles required to compute the Pd element
for (int m = 0; m < width/TILE_WIDTH; m++)
{
// Coolaborative loading of Md and Nd tiles into shared memory
ds_M[ty][tx] = d_a[Row*width + m*TILE_WIDTH +tx];
ds_N[ty][tx] = d_b[Col+(m*TILE_WIDTH+ty)*width];
__syncthreads();
for (int k = 0; k < TILE_WIDTH; k++)
Pvalue += ds_M[ty][k] * ds_N[k][tx];
__syncthreads();
}
d_c[Row*width+Col] = Pvalue;
}
//cpu function for multiplication
void mul_matrix_cpu(double *a, double *b, double *cpu_c, int N)
{
int i, j,k;
for (i=0;i<N;i++) {
for (j=0;j<N;j++) {
double sum=0;
for (k=0;k<N;k++)
{
double p=a[i*N+k];
double q=b[k*N+j];
sum=sum+(p*q);
}
cpu_c[i*N+j]=sum;
}
}
}
//cpu and gpu result matching function
bool verify(double *A, double *B, double *C, int width) {
const double relativeTolerance = 0.000001;
for(int row = 0; row < width; row++) {
for(int col = 0; col < width; col++) {
double sum = 0;
for(unsigned int k = 0; k < width; k++) {
sum += A[row*width + k]*B[k*width + col];
}
double relativeError = (sum - C[row*width + col])/sum;
//printf("%f \t",relativeError);
//printf("\n");
if (relativeError >= relativeTolerance
|| relativeError <= -relativeTolerance)
{
printf("TEST FAILED\n\n");
return false;
}
}
}
printf("TEST PASSED\n\n");
return true;
}
//print matrix
int printMatrix(double *a,int N)
{
int i,j;
for (i=0;i<N;i++)
{
for (j=0;j<N;j++)
{
printf("%f\t",a[i*N+j]);
}
printf("\n");
}
return 1;
}
int main()
{
//user input
int r, col;
printf("Select one of the following options: \n");
printf("Press a for matrix size 8 * 8 \n");
printf("Press b for matrix size 64 * 64 \n");
printf("Press c for matrix size 128 * 128 \n");
printf("Press d for matrix size 512 * 512 \n");
printf("Press e for matrix size 1024 * 1024 \n");
printf("Press f for matrix size 4096 * 4096 \n");
printf("Press any other key for exit \n");
char ch;
scanf("%c",&ch);
switch(ch)
{
case 'a':
r=8;
col=8;
N=8;
printf("Matrix size is 8 * 8 \n");
break;
case 'b':
r=64;
col=64;
N=64;
printf("Matrix size is 64 * 64 \n");
break;
case 'c':
r=128;
col=128;
N=128;
printf("Matrix size is 128 * 128 \n");
break;
case 'd':
r=512;
col=512;
N=512;
printf("Matrix size is 512 * 512 \n");
break;
case 'e':
r=1024;
col=1024;
N=1024;
printf("Matrix size is 1024 * 1024 \n");
break;
case 'f':
r=4096;
col=4096;
N=4096;
printf("Matrix size is 4096 * 4096 \n");
break;
default:
exit(1);
break;
}
//initializing the block size/tile width
blocksize=8;
//memory allocation for vectors
double *a, *b, *c, *cpu_c, *d_a, *d_b, *d_c;
int a_size=r*col;
int b_size=r*col;
int c_size=r*col;
int cpu_c_size=r*col;
a=(double*)malloc(sizeof(double)*a_size);
b=(double*)malloc(sizeof(double)*b_size);
c=(double*)malloc(sizeof(double)*c_size);
cpu_c=(double*)malloc(sizeof(double)*cpu_c_size);
//matrix initialization
int i,j;
int init=1325;
for (i=0;i<N;i++)
{
for (j=0;j<N;j++)
{
init=3125*init%65536;
a[i*col+j]=(init-32768.0)/16384.0;
init=3125*init%65536;
b[i*col+j]=(init-32768.0)/16384.0;
}
}
//printMatrix(a,N);
//printf("\n");
//printMatrix(b,N);
//printf("\n");
//allocating memory on device
int cudaret=hipMalloc((void **)(&d_a),(N*N)*sizeof(double));
if(cudaret!=hipSuccess)
{printf("memory was not allocated on device \n");}
hipMalloc((void **)(&d_b),(N*N)*sizeof(double));
hipMalloc((void **)(&d_c),(N*N)*sizeof(double));
//calculating cpu time
clock_t startCPU, end;
float cpu_time_used;
//calling CPU program
printf("Calculating results for CPU vector multiplication \n");
printf("---------\n");
startCPU = clock();
mul_matrix_cpu(a,b,cpu_c,N);
end = clock();
cpu_time_used = ((float) (end - startCPU))*1000;
cpu_time_used= cpu_time_used/ CLOCKS_PER_SEC;
printf("CPU computation time (milliseconds) \n");
printf("%f \t",cpu_time_used);
printf("\n");
printf("\n");
//printMatrix(cpu_c,N);
//printf("\n");
//time execution calculation
hipEvent_t start,stop;
float elapsedTime;
float timeTransfer;
float timeBack;
//memory transfer time
hipEventCreate(&start);
hipEventCreate(&stop);
hipEventRecord(start,0);
//copying contents of a and b to device arrays
hipMemcpy(d_a,a,(N*N)*sizeof(double),hipMemcpyHostToDevice);
hipMemcpy(d_b,b,(N*N)*sizeof(double),hipMemcpyHostToDevice);
hipDeviceSynchronize();
hipEventRecord(stop,0);
hipEventSynchronize(stop);
hipEventElapsedTime(&timeTransfer,start,stop);
hipEventDestroy(start);
hipEventDestroy(stop);
//Initializing block count and block size
dim3 dimBlock(blocksize,blocksize,1);
int blockCount_x = (N - 1)/(double(blocksize))+1;//Get number of blocks needed per direction.
int blockCount_y = (N - 1)/(double(blocksize))+1;
dim3 dimGrid(blockCount_x,blockCount_y,1);
printf("Block size and tile width for the program is %d\n ",blocksize);
//call kernel for gpu functioning
printf("Calling kernel for gpu computations for vector multiplication and calculating results\n");
printf("---------\n");
hipEventCreate(&start);
hipEventCreate(&stop);
hipEventRecord(start,0);
mul_matrix_gpu<<<dimGrid,dimBlock>>>(d_a,d_b,d_c,N);
hipEventRecord(stop,0);
hipEventSynchronize(stop);
hipEventElapsedTime(&elapsedTime,start,stop);
hipEventDestroy(start);
hipEventDestroy(stop);
printf("GPU computation time (milliseconds) \n");
printf("%f \t",elapsedTime);
printf("\n");
hipEventCreate(&start);
hipEventCreate(&stop);
hipEventRecord(start,0);
//copying resulting back to cpu
hipMemcpy(c,d_c,(N*N)*sizeof(double),hipMemcpyDeviceToHost);
hipDeviceSynchronize();
hipEventRecord(stop,0);
hipEventSynchronize(stop);
hipEventElapsedTime(&timeBack,start,stop);
hipEventDestroy(start);
hipEventDestroy(stop);
timeTransfer += timeBack;
printf("Total Memory transfer time between CPU and GPU (milliseconds)\n");
printf("%f \t",timeTransfer);
printf("\n");
float speedup;
speedup=cpu_time_used/elapsedTime;
printf("Speedup: \n");
printf("%f \t",speedup);
printf("\n");
printf("Comparing results for CPU and GPU computations \n");
printf("---------\n");
verify(a,b,c,N);
//deallocating memory
hipFree(d_a);
hipFree(d_b);
hipFree(d_c);
return 0;
} | .text
.file "Tiled_Matrix_Mul.hip"
.globl _Z29__device_stub__mul_matrix_gpuPdS_S_i # -- Begin function _Z29__device_stub__mul_matrix_gpuPdS_S_i
.p2align 4, 0x90
.type _Z29__device_stub__mul_matrix_gpuPdS_S_i,@function
_Z29__device_stub__mul_matrix_gpuPdS_S_i: # @_Z29__device_stub__mul_matrix_gpuPdS_S_i
.cfi_startproc
# %bb.0:
subq $120, %rsp
.cfi_def_cfa_offset 128
movq %rdi, 72(%rsp)
movq %rsi, 64(%rsp)
movq %rdx, 56(%rsp)
movl %ecx, 4(%rsp)
leaq 72(%rsp), %rax
movq %rax, 80(%rsp)
leaq 64(%rsp), %rax
movq %rax, 88(%rsp)
leaq 56(%rsp), %rax
movq %rax, 96(%rsp)
leaq 4(%rsp), %rax
movq %rax, 104(%rsp)
leaq 40(%rsp), %rdi
leaq 24(%rsp), %rsi
leaq 16(%rsp), %rdx
leaq 8(%rsp), %rcx
callq __hipPopCallConfiguration
movq 40(%rsp), %rsi
movl 48(%rsp), %edx
movq 24(%rsp), %rcx
movl 32(%rsp), %r8d
leaq 80(%rsp), %r9
movl $_Z14mul_matrix_gpuPdS_S_i, %edi
pushq 8(%rsp)
.cfi_adjust_cfa_offset 8
pushq 24(%rsp)
.cfi_adjust_cfa_offset 8
callq hipLaunchKernel
addq $136, %rsp
.cfi_adjust_cfa_offset -136
retq
.Lfunc_end0:
.size _Z29__device_stub__mul_matrix_gpuPdS_S_i, .Lfunc_end0-_Z29__device_stub__mul_matrix_gpuPdS_S_i
.cfi_endproc
# -- End function
.globl _Z14mul_matrix_cpuPdS_S_i # -- Begin function _Z14mul_matrix_cpuPdS_S_i
.p2align 4, 0x90
.type _Z14mul_matrix_cpuPdS_S_i,@function
_Z14mul_matrix_cpuPdS_S_i: # @_Z14mul_matrix_cpuPdS_S_i
.cfi_startproc
# %bb.0:
testl %ecx, %ecx
jle .LBB1_8
# %bb.1: # %.preheader28.lr.ph
pushq %r15
.cfi_def_cfa_offset 16
pushq %r14
.cfi_def_cfa_offset 24
pushq %r13
.cfi_def_cfa_offset 32
pushq %r12
.cfi_def_cfa_offset 40
pushq %rbx
.cfi_def_cfa_offset 48
.cfi_offset %rbx, -48
.cfi_offset %r12, -40
.cfi_offset %r13, -32
.cfi_offset %r14, -24
.cfi_offset %r15, -16
movl %ecx, %eax
leaq (,%rax,8), %r8
xorl %r9d, %r9d
xorl %r10d, %r10d
.p2align 4, 0x90
.LBB1_2: # %.preheader28
# =>This Loop Header: Depth=1
# Child Loop BB1_3 Depth 2
# Child Loop BB1_4 Depth 3
movl %r9d, %r11d
leaq (%rdi,%r11,8), %r11
movq %r10, %rbx
imulq %rax, %rbx
leaq (%rdx,%rbx,8), %rbx
movq %rsi, %r14
xorl %r15d, %r15d
.p2align 4, 0x90
.LBB1_3: # %.preheader
# Parent Loop BB1_2 Depth=1
# => This Loop Header: Depth=2
# Child Loop BB1_4 Depth 3
xorpd %xmm0, %xmm0
movq %r14, %r12
xorl %r13d, %r13d
.p2align 4, 0x90
.LBB1_4: # Parent Loop BB1_2 Depth=1
# Parent Loop BB1_3 Depth=2
# => This Inner Loop Header: Depth=3
movsd (%r11,%r13,8), %xmm1 # xmm1 = mem[0],zero
mulsd (%r12), %xmm1
addsd %xmm1, %xmm0
incq %r13
addq %r8, %r12
cmpq %r13, %rax
jne .LBB1_4
# %bb.5: # %._crit_edge
# in Loop: Header=BB1_3 Depth=2
movsd %xmm0, (%rbx,%r15,8)
incq %r15
addq $8, %r14
cmpq %rax, %r15
jne .LBB1_3
# %bb.6: # %._crit_edge32
# in Loop: Header=BB1_2 Depth=1
incq %r10
addl %ecx, %r9d
cmpq %rax, %r10
jne .LBB1_2
# %bb.7:
popq %rbx
.cfi_def_cfa_offset 40
popq %r12
.cfi_def_cfa_offset 32
popq %r13
.cfi_def_cfa_offset 24
popq %r14
.cfi_def_cfa_offset 16
popq %r15
.cfi_def_cfa_offset 8
.cfi_restore %rbx
.cfi_restore %r12
.cfi_restore %r13
.cfi_restore %r14
.cfi_restore %r15
.LBB1_8: # %._crit_edge34
retq
.Lfunc_end1:
.size _Z14mul_matrix_cpuPdS_S_i, .Lfunc_end1-_Z14mul_matrix_cpuPdS_S_i
.cfi_endproc
# -- End function
.section .rodata.cst8,"aM",@progbits,8
.p2align 3, 0x0 # -- Begin function _Z6verifyPdS_S_i
.LCPI2_0:
.quad 0x3eb0c6f7a0b5ed8d # double 9.9999999999999995E-7
.LCPI2_1:
.quad 0xbeb0c6f7a0b5ed8d # double -9.9999999999999995E-7
.text
.globl _Z6verifyPdS_S_i
.p2align 4, 0x90
.type _Z6verifyPdS_S_i,@function
_Z6verifyPdS_S_i: # @_Z6verifyPdS_S_i
.cfi_startproc
# %bb.0:
pushq %rbp
.cfi_def_cfa_offset 16
pushq %r15
.cfi_def_cfa_offset 24
pushq %r14
.cfi_def_cfa_offset 32
pushq %r13
.cfi_def_cfa_offset 40
pushq %r12
.cfi_def_cfa_offset 48
pushq %rbx
.cfi_def_cfa_offset 56
subq $24, %rsp
.cfi_def_cfa_offset 80
.cfi_offset %rbx, -56
.cfi_offset %r12, -48
.cfi_offset %r13, -40
.cfi_offset %r14, -32
.cfi_offset %r15, -24
.cfi_offset %rbp, -16
testl %ecx, %ecx
setle %bl
jle .LBB2_11
# %bb.1: # %.preheader47.lr.ph
movl %ecx, %ebp
movq %rsi, %r15
movq %rdi, %r12
movl %ecx, %r13d
xorl %r14d, %r14d
movsd .LCPI2_0(%rip), %xmm2 # xmm2 = mem[0],zero
movsd .LCPI2_1(%rip), %xmm3 # xmm3 = mem[0],zero
xorl %r11d, %r11d
movq %rdx, 8(%rsp) # 8-byte Spill
jmp .LBB2_2
.p2align 4, 0x90
.LBB2_8: # in Loop: Header=BB2_2 Depth=1
movl $.Lstr, %edi
movq %r11, 16(%rsp) # 8-byte Spill
callq puts@PLT
movq 16(%rsp), %r11 # 8-byte Reload
movsd .LCPI2_1(%rip), %xmm3 # xmm3 = mem[0],zero
movsd .LCPI2_0(%rip), %xmm2 # xmm2 = mem[0],zero
movq 8(%rsp), %rdx # 8-byte Reload
testb $1, %bl
jne .LBB2_10
.LBB2_9: # %.critedge44
# in Loop: Header=BB2_2 Depth=1
incq %r11
cmpq %r13, %r11
setae %bl
addl %ebp, %r14d
cmpq %r13, %r11
je .LBB2_11
.LBB2_2: # %.preheader47
# =>This Loop Header: Depth=1
# Child Loop BB2_4 Depth 2
# Child Loop BB2_5 Depth 3
movb %bl, 7(%rsp) # 1-byte Spill
movq %r11, %rax
imulq %r13, %rax
leaq (%rdx,%rax,8), %rax
movb $1, %bl
xorl %ecx, %ecx
xorl %r10d, %r10d
.p2align 4, 0x90
.LBB2_4: # %.preheader
# Parent Loop BB2_2 Depth=1
# => This Loop Header: Depth=2
# Child Loop BB2_5 Depth 3
xorpd %xmm0, %xmm0
movq %r13, %rsi
movl %r14d, %edi
movl %ecx, %r8d
.p2align 4, 0x90
.LBB2_5: # Parent Loop BB2_2 Depth=1
# Parent Loop BB2_4 Depth=2
# => This Inner Loop Header: Depth=3
movl %edi, %r9d
movsd (%r12,%r9,8), %xmm1 # xmm1 = mem[0],zero
movl %r8d, %r9d
mulsd (%r15,%r9,8), %xmm1
addsd %xmm1, %xmm0
addl %ebp, %r8d
incl %edi
decq %rsi
jne .LBB2_5
# %bb.6: # %.critedge
# in Loop: Header=BB2_4 Depth=2
movapd %xmm0, %xmm1
subsd (%rax,%r10,8), %xmm1
divsd %xmm0, %xmm1
ucomisd %xmm2, %xmm1
jae .LBB2_8
# %bb.7: # %.critedge
# in Loop: Header=BB2_4 Depth=2
ucomisd %xmm1, %xmm3
jae .LBB2_8
# %bb.3: # in Loop: Header=BB2_4 Depth=2
incq %r10
cmpq %r13, %r10
setb %bl
incl %ecx
cmpq %r13, %r10
jne .LBB2_4
jmp .LBB2_9
.LBB2_10:
movzbl 7(%rsp), %ebx # 1-byte Folded Reload
testb $1, %bl
je .LBB2_12
.LBB2_11: # %.critedge46
movl $.Lstr.1, %edi
callq puts@PLT
.LBB2_12:
andb $1, %bl
movl %ebx, %eax
addq $24, %rsp
.cfi_def_cfa_offset 56
popq %rbx
.cfi_def_cfa_offset 48
popq %r12
.cfi_def_cfa_offset 40
popq %r13
.cfi_def_cfa_offset 32
popq %r14
.cfi_def_cfa_offset 24
popq %r15
.cfi_def_cfa_offset 16
popq %rbp
.cfi_def_cfa_offset 8
retq
.Lfunc_end2:
.size _Z6verifyPdS_S_i, .Lfunc_end2-_Z6verifyPdS_S_i
.cfi_endproc
# -- End function
.globl _Z11printMatrixPdi # -- Begin function _Z11printMatrixPdi
.p2align 4, 0x90
.type _Z11printMatrixPdi,@function
_Z11printMatrixPdi: # @_Z11printMatrixPdi
.cfi_startproc
# %bb.0:
pushq %rbp
.cfi_def_cfa_offset 16
pushq %r15
.cfi_def_cfa_offset 24
pushq %r14
.cfi_def_cfa_offset 32
pushq %r13
.cfi_def_cfa_offset 40
pushq %r12
.cfi_def_cfa_offset 48
pushq %rbx
.cfi_def_cfa_offset 56
pushq %rax
.cfi_def_cfa_offset 64
.cfi_offset %rbx, -56
.cfi_offset %r12, -48
.cfi_offset %r13, -40
.cfi_offset %r14, -32
.cfi_offset %r15, -24
.cfi_offset %rbp, -16
movq %rdi, (%rsp) # 8-byte Spill
testl %esi, %esi
jle .LBB3_5
# %bb.1: # %.preheader.lr.ph
movl %esi, %ebx
movl %esi, %r15d
xorl %r12d, %r12d
xorl %r13d, %r13d
.p2align 4, 0x90
.LBB3_2: # %.preheader
# =>This Loop Header: Depth=1
# Child Loop BB3_3 Depth 2
movl %r12d, %eax
movq (%rsp), %rcx # 8-byte Reload
leaq (%rcx,%rax,8), %rbp
xorl %r14d, %r14d
.p2align 4, 0x90
.LBB3_3: # Parent Loop BB3_2 Depth=1
# => This Inner Loop Header: Depth=2
movsd (%rbp,%r14,8), %xmm0 # xmm0 = mem[0],zero
movl $.L.str.2, %edi
movb $1, %al
callq printf
incq %r14
cmpq %r14, %r15
jne .LBB3_3
# %bb.4: # %._crit_edge
# in Loop: Header=BB3_2 Depth=1
movl $10, %edi
callq putchar@PLT
incq %r13
addl %ebx, %r12d
cmpq %r15, %r13
jne .LBB3_2
.LBB3_5: # %._crit_edge13
movl $1, %eax
addq $8, %rsp
.cfi_def_cfa_offset 56
popq %rbx
.cfi_def_cfa_offset 48
popq %r12
.cfi_def_cfa_offset 40
popq %r13
.cfi_def_cfa_offset 32
popq %r14
.cfi_def_cfa_offset 24
popq %r15
.cfi_def_cfa_offset 16
popq %rbp
.cfi_def_cfa_offset 8
retq
.Lfunc_end3:
.size _Z11printMatrixPdi, .Lfunc_end3-_Z11printMatrixPdi
.cfi_endproc
# -- End function
.section .rodata.cst8,"aM",@progbits,8
.p2align 3, 0x0 # -- Begin function main
.LCPI4_0:
.quad 0x3f10000000000000 # double 6.103515625E-5
.LCPI4_3:
.quad 0x3ff0000000000000 # double 1
.LCPI4_4:
.quad 0x3eb0c6f7a0b5ed8d # double 9.9999999999999995E-7
.LCPI4_5:
.quad 0xbeb0c6f7a0b5ed8d # double -9.9999999999999995E-7
.section .rodata.cst4,"aM",@progbits,4
.p2align 2, 0x0
.LCPI4_1:
.long 0x447a0000 # float 1000
.LCPI4_2:
.long 0x49742400 # float 1.0E+6
.text
.globl main
.p2align 4, 0x90
.type main,@function
main: # @main
.cfi_startproc
# %bb.0:
pushq %rbp
.cfi_def_cfa_offset 16
pushq %r15
.cfi_def_cfa_offset 24
pushq %r14
.cfi_def_cfa_offset 32
pushq %r13
.cfi_def_cfa_offset 40
pushq %r12
.cfi_def_cfa_offset 48
pushq %rbx
.cfi_def_cfa_offset 56
subq $184, %rsp
.cfi_def_cfa_offset 240
.cfi_offset %rbx, -56
.cfi_offset %r12, -48
.cfi_offset %r13, -40
.cfi_offset %r14, -32
.cfi_offset %r15, -24
.cfi_offset %rbp, -16
movl $.Lstr.2, %edi
callq puts@PLT
movl $.Lstr.3, %edi
callq puts@PLT
movl $.Lstr.4, %edi
callq puts@PLT
movl $.Lstr.5, %edi
callq puts@PLT
movl $.Lstr.6, %edi
callq puts@PLT
movl $.Lstr.7, %edi
callq puts@PLT
movl $.Lstr.8, %edi
callq puts@PLT
movl $.Lstr.9, %edi
callq puts@PLT
leaq 7(%rsp), %rsi
movl $.L.str.12, %edi
xorl %eax, %eax
callq __isoc23_scanf
movzbl 7(%rsp), %eax
addb $-97, %al
cmpb $6, %al
jae .LBB4_23
# %bb.1: # %switch.lookup
movzbl %al, %eax
movl .Lswitch.table.main.28(,%rax,4), %ebp
movq .Lswitch.table.main.27(,%rax,8), %rdi
movl %ebp, N(%rip)
callq puts@PLT
movl $8, blocksize(%rip)
movl %ebp, %r15d
imull %r15d, %r15d
shll $3, %r15d
movq %r15, %rdi
callq malloc
movq %rax, %rbx
movq %r15, %rdi
callq malloc
movq %rax, %r14
movq %r15, %rdi
callq malloc
movq %rax, 88(%rsp) # 8-byte Spill
movl N(%rip), %esi
testl %esi, %esi
jle .LBB4_6
# %bb.2: # %.preheader.lr.ph
movl $1325, %ecx # imm = 0x52D
xorl %eax, %eax
movsd .LCPI4_0(%rip), %xmm0 # xmm0 = mem[0],zero
xorl %edx, %edx
.p2align 4, 0x90
.LBB4_3: # %.preheader
# =>This Loop Header: Depth=1
# Child Loop BB4_4 Depth 2
movl %eax, %r8d
leaq (%r14,%r8,8), %rdi
leaq (%rbx,%r8,8), %r8
xorl %r9d, %r9d
.p2align 4, 0x90
.LBB4_4: # Parent Loop BB4_3 Depth=1
# => This Inner Loop Header: Depth=2
imull $3125, %ecx, %r10d # imm = 0xC35
movzwl %r10w, %r10d
addl $-32768, %r10d # imm = 0x8000
xorps %xmm1, %xmm1
cvtsi2sd %r10d, %xmm1
mulsd %xmm0, %xmm1
movsd %xmm1, (%r8,%r9,8)
imull $761, %ecx, %ecx # imm = 0x2F9
movzwl %cx, %ecx
leal -32768(%rcx), %r10d
xorps %xmm1, %xmm1
cvtsi2sd %r10d, %xmm1
mulsd %xmm0, %xmm1
movsd %xmm1, (%rdi,%r9,8)
incq %r9
cmpq %r9, %rsi
jne .LBB4_4
# %bb.5: # %._crit_edge
# in Loop: Header=BB4_3 Depth=1
incq %rdx
addl %ebp, %eax
cmpq %rsi, %rdx
jne .LBB4_3
.LBB4_6: # %._crit_edge100
imull %esi, %esi
shlq $3, %rsi
leaq 56(%rsp), %rdi
callq hipMalloc
testl %eax, %eax
je .LBB4_8
# %bb.7:
movl $.Lstr.16, %edi
callq puts@PLT
.LBB4_8: # %_Z14mul_matrix_cpuPdS_S_i.exit
movl N(%rip), %esi
imull %esi, %esi
shlq $3, %rsi
leaq 48(%rsp), %rdi
callq hipMalloc
movl N(%rip), %esi
imull %esi, %esi
shlq $3, %rsi
leaq 40(%rsp), %rdi
callq hipMalloc
movl $.Lstr.17, %edi
callq puts@PLT
movl $.Lstr.26, %edi
callq puts@PLT
callq clock
movq %rax, %r12
callq clock
subq %r12, %rax
xorps %xmm0, %xmm0
cvtsi2ss %rax, %xmm0
mulss .LCPI4_1(%rip), %xmm0
divss .LCPI4_2(%rip), %xmm0
movss %xmm0, 32(%rsp) # 4-byte Spill
movl $.Lstr.19, %edi
callq puts@PLT
movss 32(%rsp), %xmm0 # 4-byte Reload
# xmm0 = mem[0],zero,zero,zero
cvtss2sd %xmm0, %xmm0
movl $.L.str.23, %edi
movb $1, %al
callq printf
movl $10, %edi
callq putchar@PLT
movl $10, %edi
callq putchar@PLT
leaq 16(%rsp), %r15
movq %r15, %rdi
callq hipEventCreate
leaq 8(%rsp), %r13
movq %r13, %rdi
callq hipEventCreate
movq 16(%rsp), %rdi
xorl %esi, %esi
callq hipEventRecord
movq 56(%rsp), %rdi
movl N(%rip), %edx
imull %edx, %edx
shlq $3, %rdx
movq %rbx, %rsi
movl $1, %ecx
callq hipMemcpy
movq 48(%rsp), %rdi
movl N(%rip), %edx
imull %edx, %edx
shlq $3, %rdx
movq %r14, %rsi
movl $1, %ecx
callq hipMemcpy
callq hipDeviceSynchronize
movq 8(%rsp), %rdi
xorl %esi, %esi
callq hipEventRecord
movq 8(%rsp), %rdi
callq hipEventSynchronize
movq 16(%rsp), %rsi
movq 8(%rsp), %rdx
leaq 28(%rsp), %rdi
callq hipEventElapsedTime
movq 16(%rsp), %rdi
callq hipEventDestroy
movq 8(%rsp), %rdi
callq hipEventDestroy
movl blocksize(%rip), %esi
movq %rsi, %rbp
movl N(%rip), %eax
decl %eax
xorps %xmm0, %xmm0
cvtsi2sd %eax, %xmm0
shlq $32, %rbp
cvtsi2sd %esi, %xmm1
divsd %xmm1, %xmm0
addsd .LCPI4_3(%rip), %xmm0
cvttsd2si %xmm0, %eax
orq %rsi, %rbp
movq %rax, %r12
shlq $32, %r12
orq %rax, %r12
movl $.L.str.24, %edi
# kill: def $esi killed $esi killed $rsi
xorl %eax, %eax
callq printf
movl $.Lstr.20, %edi
callq puts@PLT
movl $.Lstr.26, %edi
callq puts@PLT
movq %r15, %rdi
callq hipEventCreate
movq %r13, %rdi
callq hipEventCreate
movq 16(%rsp), %rdi
xorl %esi, %esi
callq hipEventRecord
movq %r12, %rdi
movl $1, %esi
movq %rbp, %rdx
movl $1, %ecx
xorl %r8d, %r8d
xorl %r9d, %r9d
callq __hipPushCallConfiguration
testl %eax, %eax
jne .LBB4_10
# %bb.9:
movq 56(%rsp), %rax
movq 48(%rsp), %rcx
movq 40(%rsp), %rdx
movl N(%rip), %esi
movq %rax, 176(%rsp)
movq %rcx, 168(%rsp)
movq %rdx, 160(%rsp)
movl %esi, 68(%rsp)
leaq 176(%rsp), %rax
movq %rax, 96(%rsp)
leaq 168(%rsp), %rax
movq %rax, 104(%rsp)
leaq 160(%rsp), %rax
movq %rax, 112(%rsp)
leaq 68(%rsp), %rax
movq %rax, 120(%rsp)
leaq 72(%rsp), %rdi
leaq 144(%rsp), %rsi
leaq 136(%rsp), %rdx
leaq 128(%rsp), %rcx
callq __hipPopCallConfiguration
movq 72(%rsp), %rsi
movl 80(%rsp), %edx
movq 144(%rsp), %rcx
movl 152(%rsp), %r8d
leaq 96(%rsp), %r9
movl $_Z14mul_matrix_gpuPdS_S_i, %edi
pushq 128(%rsp)
.cfi_adjust_cfa_offset 8
pushq 144(%rsp)
.cfi_adjust_cfa_offset 8
callq hipLaunchKernel
addq $16, %rsp
.cfi_adjust_cfa_offset -16
.LBB4_10:
movq 8(%rsp), %rdi
xorl %r12d, %r12d
xorl %esi, %esi
callq hipEventRecord
movq 8(%rsp), %rdi
callq hipEventSynchronize
movq 16(%rsp), %rsi
movq 8(%rsp), %rdx
leaq 96(%rsp), %rdi
callq hipEventElapsedTime
movq 16(%rsp), %rdi
callq hipEventDestroy
movq 8(%rsp), %rdi
callq hipEventDestroy
movl $.Lstr.22, %edi
callq puts@PLT
movss 96(%rsp), %xmm0 # xmm0 = mem[0],zero,zero,zero
cvtss2sd %xmm0, %xmm0
movl $.L.str.23, %edi
movb $1, %al
callq printf
movl $10, %edi
callq putchar@PLT
leaq 16(%rsp), %rdi
callq hipEventCreate
leaq 8(%rsp), %rdi
callq hipEventCreate
movq 16(%rsp), %rdi
xorl %esi, %esi
callq hipEventRecord
movq 40(%rsp), %rsi
movl N(%rip), %edx
imull %edx, %edx
shlq $3, %rdx
movq 88(%rsp), %rdi # 8-byte Reload
movl $2, %ecx
callq hipMemcpy
callq hipDeviceSynchronize
movq 8(%rsp), %rdi
xorl %esi, %esi
callq hipEventRecord
movq 8(%rsp), %rdi
callq hipEventSynchronize
movq 16(%rsp), %rsi
movq 8(%rsp), %rdx
leaq 72(%rsp), %rdi
callq hipEventElapsedTime
movq 16(%rsp), %rdi
callq hipEventDestroy
movq 8(%rsp), %rdi
callq hipEventDestroy
movss 72(%rsp), %xmm0 # xmm0 = mem[0],zero,zero,zero
addss 28(%rsp), %xmm0
movss %xmm0, 28(%rsp)
movl $.Lstr.23, %edi
callq puts@PLT
movss 28(%rsp), %xmm0 # xmm0 = mem[0],zero,zero,zero
cvtss2sd %xmm0, %xmm0
movl $.L.str.23, %edi
movb $1, %al
callq printf
movl $10, %edi
callq putchar@PLT
movss 32(%rsp), %xmm0 # 4-byte Reload
# xmm0 = mem[0],zero,zero,zero
divss 96(%rsp), %xmm0
movss %xmm0, 32(%rsp) # 4-byte Spill
movl $.Lstr.24, %edi
callq puts@PLT
movss 32(%rsp), %xmm0 # 4-byte Reload
# xmm0 = mem[0],zero,zero,zero
cvtss2sd %xmm0, %xmm0
movl $.L.str.23, %edi
movb $1, %al
callq printf
movl $10, %edi
callq putchar@PLT
movl $.Lstr.25, %edi
callq puts@PLT
movl $.Lstr.26, %edi
callq puts@PLT
movl N(%rip), %r13d
testl %r13d, %r13d
jle .LBB4_21
# %bb.11: # %.preheader47.lr.ph.i
movsd .LCPI4_4(%rip), %xmm2 # xmm2 = mem[0],zero
movsd .LCPI4_5(%rip), %xmm3 # xmm3 = mem[0],zero
xorl %ebp, %ebp
xorl %r10d, %r10d
jmp .LBB4_12
.p2align 4, 0x90
.LBB4_18: # in Loop: Header=BB4_12 Depth=1
movl $.Lstr, %edi
movq %r10, 32(%rsp) # 8-byte Spill
callq puts@PLT
movq 32(%rsp), %rax # 8-byte Reload
movsd .LCPI4_5(%rip), %xmm3 # xmm3 = mem[0],zero
movsd .LCPI4_4(%rip), %xmm2 # xmm2 = mem[0],zero
testb $1, %r15b
jne .LBB4_20
.LBB4_19: # %.critedge44.i
# in Loop: Header=BB4_12 Depth=1
incq %rbp
addl %r13d, %r12d
cmpq %r13, %rbp
setae %r10b
je .LBB4_21
.LBB4_12: # %.preheader47.i
# =>This Loop Header: Depth=1
# Child Loop BB4_14 Depth 2
# Child Loop BB4_15 Depth 3
movq %rbp, %rax
imulq %r13, %rax
movq 88(%rsp), %rcx # 8-byte Reload
leaq (%rcx,%rax,8), %rax
movb $1, %r15b
xorl %ecx, %ecx
xorl %edx, %edx
.p2align 4, 0x90
.LBB4_14: # %.preheader.i86
# Parent Loop BB4_12 Depth=1
# => This Loop Header: Depth=2
# Child Loop BB4_15 Depth 3
xorps %xmm0, %xmm0
movl %r12d, %esi
movl %ecx, %edi
movq %r13, %r8
.p2align 4, 0x90
.LBB4_15: # Parent Loop BB4_12 Depth=1
# Parent Loop BB4_14 Depth=2
# => This Inner Loop Header: Depth=3
movl %esi, %r9d
movsd (%rbx,%r9,8), %xmm1 # xmm1 = mem[0],zero
movl %edi, %r9d
mulsd (%r14,%r9,8), %xmm1
addsd %xmm1, %xmm0
addl %r13d, %edi
incl %esi
decq %r8
jne .LBB4_15
# %bb.16: # %.critedge.i
# in Loop: Header=BB4_14 Depth=2
movapd %xmm0, %xmm1
subsd (%rax,%rdx,8), %xmm1
divsd %xmm0, %xmm1
ucomisd %xmm2, %xmm1
jae .LBB4_18
# %bb.17: # %.critedge.i
# in Loop: Header=BB4_14 Depth=2
ucomisd %xmm1, %xmm3
jae .LBB4_18
# %bb.13: # in Loop: Header=BB4_14 Depth=2
incq %rdx
incl %ecx
cmpq %r13, %rdx
setb %r15b
jne .LBB4_14
jmp .LBB4_19
.LBB4_20:
testb $1, %al
je .LBB4_22
.LBB4_21: # %.critedge46.i
movl $.Lstr.1, %edi
callq puts@PLT
.LBB4_22: # %_Z6verifyPdS_S_i.exit
movq 56(%rsp), %rdi
callq hipFree
movq 48(%rsp), %rdi
callq hipFree
movq 40(%rsp), %rdi
callq hipFree
xorl %eax, %eax
addq $184, %rsp
.cfi_def_cfa_offset 56
popq %rbx
.cfi_def_cfa_offset 48
popq %r12
.cfi_def_cfa_offset 40
popq %r13
.cfi_def_cfa_offset 32
popq %r14
.cfi_def_cfa_offset 24
popq %r15
.cfi_def_cfa_offset 16
popq %rbp
.cfi_def_cfa_offset 8
retq
.LBB4_23:
.cfi_def_cfa_offset 240
movl $1, %edi
callq exit
.Lfunc_end4:
.size main, .Lfunc_end4-main
.cfi_endproc
# -- End function
.p2align 4, 0x90 # -- Begin function __hip_module_ctor
.type __hip_module_ctor,@function
__hip_module_ctor: # @__hip_module_ctor
.cfi_startproc
# %bb.0:
subq $40, %rsp
.cfi_def_cfa_offset 48
cmpq $0, __hip_gpubin_handle(%rip)
jne .LBB5_2
# %bb.1:
movl $__hip_fatbin_wrapper, %edi
callq __hipRegisterFatBinary
movq %rax, __hip_gpubin_handle(%rip)
.LBB5_2:
movq __hip_gpubin_handle(%rip), %rdi
xorps %xmm0, %xmm0
movups %xmm0, 16(%rsp)
movups %xmm0, (%rsp)
movl $_Z14mul_matrix_gpuPdS_S_i, %esi
movl $.L__unnamed_1, %edx
movl $.L__unnamed_1, %ecx
movl $-1, %r8d
xorl %r9d, %r9d
callq __hipRegisterFunction
movl $__hip_module_dtor, %edi
addq $40, %rsp
.cfi_def_cfa_offset 8
jmp atexit # TAILCALL
.Lfunc_end5:
.size __hip_module_ctor, .Lfunc_end5-__hip_module_ctor
.cfi_endproc
# -- End function
.p2align 4, 0x90 # -- Begin function __hip_module_dtor
.type __hip_module_dtor,@function
__hip_module_dtor: # @__hip_module_dtor
.cfi_startproc
# %bb.0:
movq __hip_gpubin_handle(%rip), %rdi
testq %rdi, %rdi
je .LBB6_2
# %bb.1:
pushq %rax
.cfi_def_cfa_offset 16
callq __hipUnregisterFatBinary
movq $0, __hip_gpubin_handle(%rip)
addq $8, %rsp
.cfi_def_cfa_offset 8
.LBB6_2:
retq
.Lfunc_end6:
.size __hip_module_dtor, .Lfunc_end6-__hip_module_dtor
.cfi_endproc
# -- End function
.type N,@object # @N
.bss
.globl N
.p2align 2, 0x0
N:
.long 0 # 0x0
.size N, 4
.type blocksize,@object # @blocksize
.globl blocksize
.p2align 2, 0x0
blocksize:
.long 0 # 0x0
.size blocksize, 4
.type _Z14mul_matrix_gpuPdS_S_i,@object # @_Z14mul_matrix_gpuPdS_S_i
.section .rodata,"a",@progbits
.globl _Z14mul_matrix_gpuPdS_S_i
.p2align 3, 0x0
_Z14mul_matrix_gpuPdS_S_i:
.quad _Z29__device_stub__mul_matrix_gpuPdS_S_i
.size _Z14mul_matrix_gpuPdS_S_i, 8
.type .L.str.2,@object # @.str.2
.section .rodata.str1.1,"aMS",@progbits,1
.L.str.2:
.asciz "%f\t"
.size .L.str.2, 4
.type .L.str.12,@object # @.str.12
.L.str.12:
.asciz "%c"
.size .L.str.12, 3
.type .L.str.23,@object # @.str.23
.L.str.23:
.asciz "%f \t"
.size .L.str.23, 5
.type .L.str.24,@object # @.str.24
.L.str.24:
.asciz "Block size and tile width for the program is %d\n "
.size .L.str.24, 50
.type .L__unnamed_1,@object # @0
.L__unnamed_1:
.asciz "_Z14mul_matrix_gpuPdS_S_i"
.size .L__unnamed_1, 26
.type __hip_fatbin_wrapper,@object # @__hip_fatbin_wrapper
.section .hipFatBinSegment,"a",@progbits
.p2align 3, 0x0
__hip_fatbin_wrapper:
.long 1212764230 # 0x48495046
.long 1 # 0x1
.quad __hip_fatbin
.quad 0
.size __hip_fatbin_wrapper, 24
.type __hip_gpubin_handle,@object # @__hip_gpubin_handle
.local __hip_gpubin_handle
.comm __hip_gpubin_handle,8,8
.section .init_array,"aw",@init_array
.p2align 3, 0x0
.quad __hip_module_ctor
.type __hip_cuid_,@object # @__hip_cuid_
.bss
.globl __hip_cuid_
__hip_cuid_:
.byte 0 # 0x0
.size __hip_cuid_, 1
.type .Lstr,@object # @str
.section .rodata.str1.1,"aMS",@progbits,1
.Lstr:
.asciz "TEST FAILED\n"
.size .Lstr, 13
.type .Lstr.1,@object # @str.1
.Lstr.1:
.asciz "TEST PASSED\n"
.size .Lstr.1, 13
.type .Lstr.2,@object # @str.2
.Lstr.2:
.asciz "Select one of the following options: "
.size .Lstr.2, 38
.type .Lstr.3,@object # @str.3
.Lstr.3:
.asciz "Press a for matrix size 8 * 8 "
.size .Lstr.3, 31
.type .Lstr.4,@object # @str.4
.Lstr.4:
.asciz "Press b for matrix size 64 * 64 "
.size .Lstr.4, 33
.type .Lstr.5,@object # @str.5
.Lstr.5:
.asciz "Press c for matrix size 128 * 128 "
.size .Lstr.5, 35
.type .Lstr.6,@object # @str.6
.Lstr.6:
.asciz "Press d for matrix size 512 * 512 "
.size .Lstr.6, 35
.type .Lstr.7,@object # @str.7
.Lstr.7:
.asciz "Press e for matrix size 1024 * 1024 "
.size .Lstr.7, 37
.type .Lstr.8,@object # @str.8
.Lstr.8:
.asciz "Press f for matrix size 4096 * 4096 "
.size .Lstr.8, 37
.type .Lstr.9,@object # @str.9
.Lstr.9:
.asciz "Press any other key for exit "
.size .Lstr.9, 30
.type .Lstr.10,@object # @str.10
.Lstr.10:
.asciz "Matrix size is 4096 * 4096 "
.size .Lstr.10, 28
.type .Lstr.11,@object # @str.11
.Lstr.11:
.asciz "Matrix size is 1024 * 1024 "
.size .Lstr.11, 28
.type .Lstr.12,@object # @str.12
.Lstr.12:
.asciz "Matrix size is 512 * 512 "
.size .Lstr.12, 26
.type .Lstr.13,@object # @str.13
.Lstr.13:
.asciz "Matrix size is 128 * 128 "
.size .Lstr.13, 26
.type .Lstr.14,@object # @str.14
.Lstr.14:
.asciz "Matrix size is 64 * 64 "
.size .Lstr.14, 24
.type .Lstr.15,@object # @str.15
.Lstr.15:
.asciz "Matrix size is 8 * 8 "
.size .Lstr.15, 22
.type .Lstr.16,@object # @str.16
.Lstr.16:
.asciz "memory was not allocated on device "
.size .Lstr.16, 36
.type .Lstr.17,@object # @str.17
.Lstr.17:
.asciz "Calculating results for CPU vector multiplication "
.size .Lstr.17, 51
.type .Lstr.19,@object # @str.19
.Lstr.19:
.asciz "CPU computation time (milliseconds) "
.size .Lstr.19, 37
.type .Lstr.20,@object # @str.20
.Lstr.20:
.asciz "Calling kernel for gpu computations for vector multiplication and calculating results"
.size .Lstr.20, 86
.type .Lstr.22,@object # @str.22
.Lstr.22:
.asciz "GPU computation time (milliseconds) "
.size .Lstr.22, 37
.type .Lstr.23,@object # @str.23
.Lstr.23:
.asciz "Total Memory transfer time between CPU and GPU (milliseconds)"
.size .Lstr.23, 62
.type .Lstr.24,@object # @str.24
.Lstr.24:
.asciz "Speedup: "
.size .Lstr.24, 10
.type .Lstr.25,@object # @str.25
.Lstr.25:
.asciz "Comparing results for CPU and GPU computations "
.size .Lstr.25, 48
.type .Lstr.26,@object # @str.26
.Lstr.26:
.asciz "---------"
.size .Lstr.26, 10
.type .Lswitch.table.main.27,@object # @switch.table.main.27
.section .rodata,"a",@progbits
.p2align 3, 0x0
.Lswitch.table.main.27:
.quad .Lstr.15
.quad .Lstr.14
.quad .Lstr.13
.quad .Lstr.12
.quad .Lstr.11
.quad .Lstr.10
.size .Lswitch.table.main.27, 48
.type .Lswitch.table.main.28,@object # @switch.table.main.28
.p2align 2, 0x0
.Lswitch.table.main.28:
.long 8 # 0x8
.long 64 # 0x40
.long 128 # 0x80
.long 512 # 0x200
.long 1024 # 0x400
.long 4096 # 0x1000
.size .Lswitch.table.main.28, 24
.section ".linker-options","e",@llvm_linker_options
.ident "AMD clang version 18.0.0git (https://github.com/RadeonOpenCompute/llvm-project roc-6.3.2 25012 e5bf7e55c91490b07c49d8960fa7983d864936c4)"
.section ".note.GNU-stack","",@progbits
.addrsig
.addrsig_sym _Z29__device_stub__mul_matrix_gpuPdS_S_i
.addrsig_sym __hip_module_ctor
.addrsig_sym __hip_module_dtor
.addrsig_sym _Z14mul_matrix_gpuPdS_S_i
.addrsig_sym __hip_fatbin
.addrsig_sym __hip_fatbin_wrapper
.addrsig_sym __hip_cuid_ |
You are a helpful coding assistant specialized in converting from CUDA device assembly to AMD device assembly. | code for sm_80
Function : _Z14mul_matrix_gpuPdS_S_i
.headerflags @"EF_CUDA_TEXMODE_UNIFIED EF_CUDA_64BIT_ADDRESS EF_CUDA_SM80 EF_CUDA_VIRTUAL_SM(EF_CUDA_SM80)"
/*0000*/ IMAD.MOV.U32 R1, RZ, RZ, c[0x0][0x28] ; /* 0x00000a00ff017624 */
/* 0x000fe400078e00ff */
/*0010*/ S2R R3, SR_CTAID.Y ; /* 0x0000000000037919 */
/* 0x000e220000002600 */
/*0020*/ MOV R6, c[0x0][0x178] ; /* 0x00005e0000067a02 */
/* 0x000fe20000000f00 */
/*0030*/ ULDC.64 UR4, c[0x0][0x118] ; /* 0x0000460000047ab9 */
/* 0x000fe20000000a00 */
/*0040*/ CS2R R20, SRZ ; /* 0x0000000000147805 */
/* 0x000fe2000001ff00 */
/*0050*/ S2R R12, SR_TID.Y ; /* 0x00000000000c7919 */
/* 0x000e220000002200 */
/*0060*/ ISETP.GE.AND P0, PT, R6, 0x8, PT ; /* 0x000000080600780c */
/* 0x000fe40003f06270 */
/*0070*/ SHF.R.S32.HI R4, RZ, 0x1f, R6 ; /* 0x0000001fff047819 */
/* 0x000fe20000011406 */
/*0080*/ S2R R5, SR_CTAID.X ; /* 0x0000000000057919 */
/* 0x000e660000002500 */
/*0090*/ LEA.HI R4, R4, c[0x0][0x178], RZ, 0x3 ; /* 0x00005e0004047a11 */
/* 0x000fe200078f18ff */
/*00a0*/ S2R R0, SR_TID.X ; /* 0x0000000000007919 */
/* 0x000e620000002100 */
/*00b0*/ IMAD R3, R3, 0x8, R12 ; /* 0x0000000803037824 */
/* 0x001fe200078e020c */
/*00c0*/ LEA R2, R5, R0, 0x3 ; /* 0x0000000005027211 */
/* 0x002fc800078e18ff */
/*00d0*/ @!P0 BRA 0x7f0 ; /* 0x0000071000008947 */
/* 0x000fea0003800000 */
/*00e0*/ LOP3.LUT R5, R6, 0xfffffff8, RZ, 0xc0, !PT ; /* 0xfffffff806057812 */
/* 0x000fe200078ec0ff */
/*00f0*/ IMAD.SHL.U32 R17, R12, 0x40, RZ ; /* 0x000000400c117824 */
/* 0x000fe200078e00ff */
/*0100*/ SHF.R.S32.HI R4, RZ, 0x3, R4 ; /* 0x00000003ff047819 */
/* 0x000fe20000011404 */
/*0110*/ HFMA2.MMA R13, -RZ, RZ, 0, 0 ; /* 0x00000000ff0d7435 */
/* 0x000fe200000001ff */
/*0120*/ ISETP.NE.AND P0, PT, R5, 0x8, PT ; /* 0x000000080500780c */
/* 0x000fe20003f05270 */
/*0130*/ IMAD R18, R3, c[0x0][0x178], R0 ; /* 0x00005e0003127a24 */
/* 0x000fe200078e0200 */
/*0140*/ CS2R R20, SRZ ; /* 0x0000000000147805 */
/* 0x000fe2000001ff00 */
/*0150*/ IMAD R16, R0, 0x8, R17 ; /* 0x0000000800107824 */
/* 0x000fe200078e0211 */
/*0160*/ LOP3.LUT R15, R4, 0x1, RZ, 0xc0, !PT ; /* 0x00000001040f7812 */
/* 0x000fd200078ec0ff */
/*0170*/ @!P0 BRA 0x5d0 ; /* 0x0000045000008947 */
/* 0x000fea0003800000 */
/*0180*/ IADD3 R14, R4, -R15, RZ ; /* 0x8000000f040e7210 */
/* 0x000fe20007ffe0ff */
/*0190*/ IMAD.MOV.U32 R13, RZ, RZ, RZ ; /* 0x000000ffff0d7224 */
/* 0x000fe200078e00ff */
/*01a0*/ CS2R R20, SRZ ; /* 0x0000000000147805 */
/* 0x000fc8000001ff00 */
/*01b0*/ LEA R23, R13.reuse, R12, 0x3 ; /* 0x0000000c0d177211 */
/* 0x040fe200078e18ff */
/*01c0*/ IMAD R26, R13, 0x8, R18 ; /* 0x000000080d1a7824 */
/* 0x000fe200078e0212 */
/*01d0*/ MOV R19, 0x8 ; /* 0x0000000800137802 */
/* 0x000fc60000000f00 */
/*01e0*/ IMAD R28, R23, c[0x0][0x178], R2 ; /* 0x00005e00171c7a24 */
/* 0x000fe400078e0202 */
/*01f0*/ IMAD.WIDE R26, R26, R19, c[0x0][0x160] ; /* 0x000058001a1a7625 */
/* 0x000fc800078e0213 */
/*0200*/ IMAD.WIDE R28, R28, R19, c[0x0][0x168] ; /* 0x00005a001c1c7625 */
/* 0x000fe200078e0213 */
/*0210*/ LDG.E.64 R6, [R26.64] ; /* 0x000000041a067981 */
/* 0x000eaa000c1e1b00 */
/*0220*/ LDG.E.64 R28, [R28.64] ; /* 0x000000041c1c7981 */
/* 0x000ee2000c1e1b00 */
/*0230*/ IADD3 R23, R23, 0x8, RZ ; /* 0x0000000817177810 */
/* 0x000fc60007ffe0ff */
/*0240*/ STS.64 [R16], R6 ; /* 0x0000000610007388 */
/* 0x004fe80000000a00 */
/*0250*/ STS.64 [R16+0x200], R28 ; /* 0x0002001c10007388 */
/* 0x008fe80000000a00 */
/*0260*/ BAR.SYNC.DEFER_BLOCKING 0x0 ; /* 0x0000000000007b1d */
/* 0x000fec0000010000 */
/*0270*/ LDS.64 R4, [R0.X8+0x200] ; /* 0x0002000000047984 */
/* 0x000fe80000008a00 */
/*0280*/ LDS.128 R8, [R17] ; /* 0x0000000011087984 */
/* 0x000e280000000c00 */
/*0290*/ LDS.64 R24, [R0.X8+0x240] ; /* 0x0002400000187984 */
/* 0x000e680000008a00 */
/*02a0*/ LDS.64 R28, [R0.X8+0x340] ; /* 0x00034000001c7984 */
/* 0x000fe20000008a00 */
/*02b0*/ DFMA R20, R4, R8, R20 ; /* 0x000000080414722b */
/* 0x0010460000000014 */
/*02c0*/ LDS.64 R8, [R0.X8+0x280] ; /* 0x0002800000087984 */
/* 0x001fe80000008a00 */
/*02d0*/ LDS.128 R4, [R17+0x10] ; /* 0x0000100011047984 */
/* 0x000e220000000c00 */
/*02e0*/ DFMA R24, R24, R10, R20 ; /* 0x0000000a1818722b */
/* 0x0022060000000014 */
/*02f0*/ LDS.64 R20, [R0.X8+0x2c0] ; /* 0x0002c00000147984 */
/* 0x002e660000008a00 */
/*0300*/ DFMA R24, R8, R4, R24 ; /* 0x000000040818722b */
/* 0x0010640000000018 */
/*0310*/ LDS.64 R4, [R0.X8+0x300] ; /* 0x0003000000047984 */
/* 0x001fe80000008a00 */
/*0320*/ LDS.128 R8, [R17+0x20] ; /* 0x0000200011087984 */
/* 0x000e220000000c00 */
/*0330*/ DFMA R6, R20, R6, R24 ; /* 0x000000061406722b */
/* 0x0022040000000018 */
/*0340*/ IMAD R20, R23, c[0x0][0x178], R2 ; /* 0x00005e0017147a24 */
/* 0x002fe400078e0202 */
/*0350*/ LDS.64 R22, [R0.X8+0x3c0] ; /* 0x0003c00000167984 */
/* 0x000fe40000008a00 */
/*0360*/ DFMA R4, R4, R8, R6 ; /* 0x000000080404722b */
/* 0x0010640000000006 */
/*0370*/ IMAD.WIDE R8, R20, R19, c[0x0][0x168] ; /* 0x00005a0014087625 */
/* 0x001fe400078e0213 */
/*0380*/ LDS.64 R20, [R0.X8+0x380] ; /* 0x0003800000147984 */
/* 0x000fe40000008a00 */
/*0390*/ DFMA R28, R28, R10, R4 ; /* 0x0000000a1c1c722b */
/* 0x0020480000000004 */
/*03a0*/ LDS.128 R4, [R17+0x30] ; /* 0x0000300011047984 */
/* 0x001e680000000c00 */
/*03b0*/ BAR.SYNC.DEFER_BLOCKING 0x0 ; /* 0x0000000000007b1d */
/* 0x000fec0000010000 */
/*03c0*/ LDG.E.64 R26, [R26.64+0x40] ; /* 0x000040041a1a7981 */
/* 0x000ea8000c1e1b00 */
/*03d0*/ LDG.E.64 R10, [R8.64] ; /* 0x00000004080a7981 */
/* 0x000ee2000c1e1b00 */
/*03e0*/ IADD3 R14, R14, -0x2, RZ ; /* 0xfffffffe0e0e7810 */
/* 0x000fc40007ffe0ff */
/*03f0*/ IADD3 R13, R13, 0x2, RZ ; /* 0x000000020d0d7810 */
/* 0x000fe40007ffe0ff */
/*0400*/ ISETP.NE.AND P0, PT, R14, RZ, PT ; /* 0x000000ff0e00720c */
/* 0x000fe20003f05270 */
/*0410*/ DFMA R28, R20, R4, R28 ; /* 0x00000004141c722b */
/* 0x002e0c000000001c */
/*0420*/ DFMA R28, R22, R6, R28 ; /* 0x00000006161c722b */
/* 0x001062000000001c */
/*0430*/ STS.64 [R16], R26 ; /* 0x0000001a10007388 */
/* 0x004fe80000000a00 */
/*0440*/ STS.64 [R16+0x200], R10 ; /* 0x0002000a10007388 */
/* 0x008fe80000000a00 */
/*0450*/ BAR.SYNC.DEFER_BLOCKING 0x0 ; /* 0x0000000000007b1d */
/* 0x000fec0000010000 */
/*0460*/ LDS.64 R24, [R0.X8+0x200] ; /* 0x0002000000187984 */
/* 0x000fe80000008a00 */
/*0470*/ LDS.128 R8, [R17] ; /* 0x0000000011087984 */
/* 0x000e680000000c00 */
/*0480*/ LDS.64 R20, [R0.X8+0x240] ; /* 0x0002400000147984 */
/* 0x000ea80000008a00 */
/*0490*/ LDS.64 R22, [R0.X8+0x280] ; /* 0x0002800000167984 */
/* 0x001fe80000008a00 */
/*04a0*/ LDS.128 R4, [R17+0x10] ; /* 0x0000100011047984 */
/* 0x000e220000000c00 */
/*04b0*/ DFMA R8, R24, R8, R28 ; /* 0x000000081808722b */
/* 0x002286000000001c */
/*04c0*/ LDS.64 R24, [R0.X8+0x2c0] ; /* 0x0002c00000187984 */
/* 0x002e660000008a00 */
/*04d0*/ DFMA R26, R20, R10, R8 ; /* 0x0000000a141a722b */
/* 0x0044240000000008 */
/*04e0*/ LDS.64 R20, [R0.X8+0x300] ; /* 0x0003000000147984 */
/* 0x004fe80000008a00 */
/*04f0*/ LDS.128 R8, [R17+0x20] ; /* 0x0000200011087984 */
/* 0x000ea20000000c00 */
/*0500*/ DFMA R26, R22, R4, R26 ; /* 0x00000004161a722b */
/* 0x001046000000001a */
/*0510*/ LDS.64 R22, [R0.X8+0x340] ; /* 0x0003400000167984 */
/* 0x001e260000008a00 */
/*0520*/ DFMA R26, R24, R6, R26 ; /* 0x00000006181a722b */
/* 0x0022a4000000001a */
/*0530*/ LDS.64 R24, [R0.X8+0x380] ; /* 0x0003800000187984 */
/* 0x002fe80000008a00 */
/*0540*/ LDS.128 R4, [R17+0x30] ; /* 0x0000300011047984 */
/* 0x000e620000000c00 */
/*0550*/ DFMA R8, R20, R8, R26 ; /* 0x000000081408722b */
/* 0x004406000000001a */
/*0560*/ LDS.64 R20, [R0.X8+0x3c0] ; /* 0x0003c00000147984 */
/* 0x004ea60000008a00 */
/*0570*/ DFMA R8, R22, R10, R8 ; /* 0x0000000a1608722b */
/* 0x001e4c0000000008 */
/*0580*/ DFMA R4, R24, R4, R8 ; /* 0x000000041804722b */
/* 0x002e8c0000000008 */
/*0590*/ DFMA R20, R20, R6, R4 ; /* 0x000000061414722b */
/* 0x0040620000000004 */
/*05a0*/ BAR.SYNC.DEFER_BLOCKING 0x0 ; /* 0x0000000000007b1d */
/* 0x000fec0000010000 */
/*05b0*/ @P0 BRA 0x1b0 ; /* 0xfffffbf000000947 */
/* 0x003fea000383ffff */
/*05c0*/ IMAD.SHL.U32 R13, R13, 0x8, RZ ; /* 0x000000080d0d7824 */
/* 0x000fe400078e00ff */
/*05d0*/ ISETP.NE.AND P0, PT, R15, RZ, PT ; /* 0x000000ff0f00720c */
/* 0x000fda0003f05270 */
/*05e0*/ @!P0 BRA 0x7f0 ; /* 0x0000020000008947 */
/* 0x000fea0003800000 */
/*05f0*/ IADD3 R5, R12, R13, RZ ; /* 0x0000000d0c057210 */
/* 0x000fe20007ffe0ff */
/*0600*/ IMAD.IADD R13, R18, 0x1, R13 ; /* 0x00000001120d7824 */
/* 0x000fe200078e020d */
/*0610*/ MOV R14, 0x8 ; /* 0x00000008000e7802 */
/* 0x000fc60000000f00 */
/*0620*/ IMAD R5, R5, c[0x0][0x178], R2 ; /* 0x00005e0005057a24 */
/* 0x000fe400078e0202 */
/*0630*/ IMAD.WIDE R12, R13, R14, c[0x0][0x160] ; /* 0x000058000d0c7625 */
/* 0x000fc800078e020e */
/*0640*/ IMAD.WIDE R14, R5, R14, c[0x0][0x168] ; /* 0x00005a00050e7625 */
/* 0x000fe400078e020e */
/*0650*/ LDG.E.64 R12, [R12.64] ; /* 0x000000040c0c7981 */
/* 0x000ea8000c1e1b00 */
/*0660*/ LDG.E.64 R26, [R14.64] ; /* 0x000000040e1a7981 */
/* 0x000ee8000c1e1b00 */
/*0670*/ STS.64 [R16], R12 ; /* 0x0000000c10007388 */
/* 0x004fe80000000a00 */
/*0680*/ STS.64 [R16+0x200], R26 ; /* 0x0002001a10007388 */
/* 0x008fe80000000a00 */
/*0690*/ BAR.SYNC.DEFER_BLOCKING 0x0 ; /* 0x0000000000007b1d */
/* 0x000fec0000010000 */
/*06a0*/ LDS.64 R28, [R0.X8+0x200] ; /* 0x00020000001c7984 */
/* 0x000fe80000008a00 */
/*06b0*/ LDS.128 R4, [R17] ; /* 0x0000000011047984 */
/* 0x000e280000000c00 */
/*06c0*/ LDS.64 R24, [R0.X8+0x240] ; /* 0x0002400000187984 */
/* 0x000e680000008a00 */
/*06d0*/ LDS.64 R22, [R0.X8+0x280] ; /* 0x0002800000167984 */
/* 0x000fe80000008a00 */
/*06e0*/ LDS.128 R8, [R17+0x10] ; /* 0x0000100011087984 */
/* 0x000ea80000000c00 */
/*06f0*/ LDS.64 R18, [R0.X8+0x2c0] ; /* 0x0002c00000127984 */
/* 0x000ee80000008a00 */
/*0700*/ LDS.128 R12, [R17+0x20] ; /* 0x00002000110c7984 */
/* 0x000fe80000000c00 */
/*0710*/ LDS.64 R26, [R0.X8+0x3c0] ; /* 0x0003c000001a7984 */
/* 0x000fe20000008a00 */
/*0720*/ DFMA R4, R28, R4, R20 ; /* 0x000000041c04722b */
/* 0x0010460000000014 */
/*0730*/ LDS.64 R20, [R0.X8+0x300] ; /* 0x0003000000147984 */
/* 0x001e260000008a00 */
/*0740*/ DFMA R4, R24, R6, R4 ; /* 0x000000061804722b */
/* 0x0022a40000000004 */
/*0750*/ LDS.64 R24, [R0.X8+0x340] ; /* 0x0003400000187984 */
/* 0x002e680000008a00 */
/*0760*/ DFMA R22, R22, R8, R4 ; /* 0x000000081616722b */
/* 0x0044e40000000004 */
/*0770*/ LDS.64 R8, [R0.X8+0x380] ; /* 0x0003800000087984 */
/* 0x004fe80000008a00 */
/*0780*/ LDS.128 R4, [R17+0x30] ; /* 0x0000300011047984 */
/* 0x000ea20000000c00 */
/*0790*/ DFMA R10, R18, R10, R22 ; /* 0x0000000a120a722b */
/* 0x008e0c0000000016 */
/*07a0*/ DFMA R10, R20, R12, R10 ; /* 0x0000000c140a722b */
/* 0x001e4c000000000a */
/*07b0*/ DFMA R10, R24, R14, R10 ; /* 0x0000000e180a722b */
/* 0x002e8c000000000a */
/*07c0*/ DFMA R4, R8, R4, R10 ; /* 0x000000040804722b */
/* 0x004e0c000000000a */
/*07d0*/ DFMA R20, R26, R6, R4 ; /* 0x000000061a14722b */
/* 0x0010620000000004 */
/*07e0*/ BAR.SYNC.DEFER_BLOCKING 0x0 ; /* 0x0000000000007b1d */
/* 0x000fec0000010000 */
/*07f0*/ IMAD.MOV.U32 R5, RZ, RZ, 0x8 ; /* 0x00000008ff057424 */
/* 0x001fe400078e00ff */
/*0800*/ IMAD R2, R3, c[0x0][0x178], R2 ; /* 0x00005e0003027a24 */
/* 0x000fc800078e0202 */
/*0810*/ IMAD.WIDE R2, R2, R5, c[0x0][0x170] ; /* 0x00005c0002027625 */
/* 0x000fca00078e0205 */
/*0820*/ STG.E.64 [R2.64], R20 ; /* 0x0000001402007986 */
/* 0x002fe2000c101b04 */
/*0830*/ EXIT ; /* 0x000000000000794d */
/* 0x000fea0003800000 */
/*0840*/ BRA 0x840; /* 0xfffffff000007947 */
/* 0x000fc0000383ffff */
/*0850*/ NOP; /* 0x0000000000007918 */
/* 0x000fc00000000000 */
/*0860*/ NOP; /* 0x0000000000007918 */
/* 0x000fc00000000000 */
/*0870*/ NOP; /* 0x0000000000007918 */
/* 0x000fc00000000000 */
/*0880*/ NOP; /* 0x0000000000007918 */
/* 0x000fc00000000000 */
/*0890*/ NOP; /* 0x0000000000007918 */
/* 0x000fc00000000000 */
/*08a0*/ NOP; /* 0x0000000000007918 */
/* 0x000fc00000000000 */
/*08b0*/ NOP; /* 0x0000000000007918 */
/* 0x000fc00000000000 */
/*08c0*/ NOP; /* 0x0000000000007918 */
/* 0x000fc00000000000 */
/*08d0*/ NOP; /* 0x0000000000007918 */
/* 0x000fc00000000000 */
/*08e0*/ NOP; /* 0x0000000000007918 */
/* 0x000fc00000000000 */
/*08f0*/ NOP; /* 0x0000000000007918 */
/* 0x000fc00000000000 */
.......... | .text
.amdgcn_target "amdgcn-amd-amdhsa--gfx1100"
.protected _Z14mul_matrix_gpuPdS_S_i
.globl _Z14mul_matrix_gpuPdS_S_i
.p2align 8
.type _Z14mul_matrix_gpuPdS_S_i,@function
_Z14mul_matrix_gpuPdS_S_i:
s_load_b32 s2, s[0:1], 0x18
v_bfe_u32 v7, v0, 10, 10
v_and_b32_e32 v5, 0x3ff, v0
v_mov_b32_e32 v1, 0
v_mov_b32_e32 v2, 0
s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_4)
v_lshl_add_u32 v6, s15, 3, v7
v_lshl_add_u32 v0, s14, 3, v5
s_waitcnt lgkmcnt(0)
s_cmp_lt_i32 s2, 8
s_cbranch_scc1 .LBB0_5
s_load_b128 s[4:7], s[0:1], 0x0
v_lshlrev_b32_e32 v1, 3, v5
v_lshlrev_b32_e32 v8, 6, v7
s_ashr_i32 s3, s2, 31
v_mad_u64_u32 v[3:4], null, v6, s2, v[5:6]
s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_2) | instid1(VALU_DEP_2)
v_add_nc_u32_e32 v9, 0x200, v1
s_lshr_b32 s3, s3, 29
v_dual_mov_b32 v1, 0 :: v_dual_add_nc_u32 v4, v8, v1
v_dual_mov_b32 v2, 0 :: v_dual_add_nc_u32 v5, v9, v8
s_add_i32 s3, s2, s3
s_mov_b32 s8, 0
s_ashr_i32 s3, s3, 3
s_set_inst_prefetch_distance 0x1
.p2align 6
.LBB0_2:
s_lshl_b32 s9, s8, 3
s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_2) | instid1(VALU_DEP_2)
v_add_nc_u32_e32 v11, s9, v7
v_add_nc_u32_e32 v10, s9, v3
s_mov_b32 s9, 0
v_mad_u64_u32 v[12:13], null, v11, s2, v[0:1]
s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
v_ashrrev_i32_e32 v11, 31, v10
v_lshlrev_b64 v[10:11], 3, v[10:11]
s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_1) | instid1(VALU_DEP_2)
v_ashrrev_i32_e32 v13, 31, v12
s_waitcnt lgkmcnt(0)
v_add_co_u32 v10, vcc_lo, s4, v10
s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_4)
v_lshlrev_b64 v[12:13], 3, v[12:13]
v_add_co_ci_u32_e32 v11, vcc_lo, s5, v11, vcc_lo
s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_3)
v_add_co_u32 v12, vcc_lo, s6, v12
v_add_co_ci_u32_e32 v13, vcc_lo, s7, v13, vcc_lo
global_load_b64 v[14:15], v[10:11], off
global_load_b64 v[11:12], v[12:13], off
v_mov_b32_e32 v10, v9
s_waitcnt vmcnt(1)
ds_store_b64 v4, v[14:15]
s_waitcnt vmcnt(0)
ds_store_b64 v5, v[11:12]
s_waitcnt lgkmcnt(0)
s_barrier
buffer_gl0_inv
.LBB0_3:
v_add_nc_u32_e32 v13, s9, v8
s_add_i32 s9, s9, 8
ds_load_b64 v[11:12], v10
ds_load_b64 v[13:14], v13
v_add_nc_u32_e32 v10, 64, v10
s_cmp_eq_u32 s9, 64
s_waitcnt lgkmcnt(0)
v_fma_f64 v[1:2], v[13:14], v[11:12], v[1:2]
s_cbranch_scc0 .LBB0_3
s_add_i32 s8, s8, 1
s_delay_alu instid0(SALU_CYCLE_1)
s_cmp_eq_u32 s8, s3
s_barrier
buffer_gl0_inv
s_cbranch_scc0 .LBB0_2
.LBB0_5:
s_set_inst_prefetch_distance 0x2
s_load_b64 s[0:1], s[0:1], 0x10
v_mad_u64_u32 v[3:4], null, v6, s2, v[0:1]
s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
v_ashrrev_i32_e32 v4, 31, v3
v_lshlrev_b64 v[3:4], 3, v[3:4]
s_waitcnt lgkmcnt(0)
s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_2)
v_add_co_u32 v3, vcc_lo, s0, v3
v_add_co_ci_u32_e32 v4, vcc_lo, s1, v4, vcc_lo
global_store_b64 v[3:4], v[1:2], off
s_nop 0
s_sendmsg sendmsg(MSG_DEALLOC_VGPRS)
s_endpgm
.section .rodata,"a",@progbits
.p2align 6, 0x0
.amdhsa_kernel _Z14mul_matrix_gpuPdS_S_i
.amdhsa_group_segment_fixed_size 1024
.amdhsa_private_segment_fixed_size 0
.amdhsa_kernarg_size 28
.amdhsa_user_sgpr_count 14
.amdhsa_user_sgpr_dispatch_ptr 0
.amdhsa_user_sgpr_queue_ptr 0
.amdhsa_user_sgpr_kernarg_segment_ptr 1
.amdhsa_user_sgpr_dispatch_id 0
.amdhsa_user_sgpr_private_segment_size 0
.amdhsa_wavefront_size32 1
.amdhsa_uses_dynamic_stack 0
.amdhsa_enable_private_segment 0
.amdhsa_system_sgpr_workgroup_id_x 1
.amdhsa_system_sgpr_workgroup_id_y 1
.amdhsa_system_sgpr_workgroup_id_z 0
.amdhsa_system_sgpr_workgroup_info 0
.amdhsa_system_vgpr_workitem_id 1
.amdhsa_next_free_vgpr 16
.amdhsa_next_free_sgpr 16
.amdhsa_float_round_mode_32 0
.amdhsa_float_round_mode_16_64 0
.amdhsa_float_denorm_mode_32 3
.amdhsa_float_denorm_mode_16_64 3
.amdhsa_dx10_clamp 1
.amdhsa_ieee_mode 1
.amdhsa_fp16_overflow 0
.amdhsa_workgroup_processor_mode 1
.amdhsa_memory_ordered 1
.amdhsa_forward_progress 0
.amdhsa_shared_vgpr_count 0
.amdhsa_exception_fp_ieee_invalid_op 0
.amdhsa_exception_fp_denorm_src 0
.amdhsa_exception_fp_ieee_div_zero 0
.amdhsa_exception_fp_ieee_overflow 0
.amdhsa_exception_fp_ieee_underflow 0
.amdhsa_exception_fp_ieee_inexact 0
.amdhsa_exception_int_div_zero 0
.end_amdhsa_kernel
.text
.Lfunc_end0:
.size _Z14mul_matrix_gpuPdS_S_i, .Lfunc_end0-_Z14mul_matrix_gpuPdS_S_i
.section .AMDGPU.csdata,"",@progbits
.text
.p2alignl 7, 3214868480
.fill 96, 4, 3214868480
.type __hip_cuid_,@object
.section .bss,"aw",@nobits
.globl __hip_cuid_
__hip_cuid_:
.byte 0
.size __hip_cuid_, 1
.ident "AMD clang version 18.0.0git (https://github.com/RadeonOpenCompute/llvm-project roc-6.3.2 25012 e5bf7e55c91490b07c49d8960fa7983d864936c4)"
.section ".note.GNU-stack","",@progbits
.addrsig
.addrsig_sym __hip_cuid_
.amdgpu_metadata
---
amdhsa.kernels:
- .args:
- .address_space: global
.offset: 0
.size: 8
.value_kind: global_buffer
- .address_space: global
.offset: 8
.size: 8
.value_kind: global_buffer
- .address_space: global
.offset: 16
.size: 8
.value_kind: global_buffer
- .offset: 24
.size: 4
.value_kind: by_value
.group_segment_fixed_size: 1024
.kernarg_segment_align: 8
.kernarg_segment_size: 28
.language: OpenCL C
.language_version:
- 2
- 0
.max_flat_workgroup_size: 1024
.name: _Z14mul_matrix_gpuPdS_S_i
.private_segment_fixed_size: 0
.sgpr_count: 18
.sgpr_spill_count: 0
.symbol: _Z14mul_matrix_gpuPdS_S_i.kd
.uniform_work_group_size: 1
.uses_dynamic_stack: false
.vgpr_count: 16
.vgpr_spill_count: 0
.wavefront_size: 32
.workgroup_processor_mode: 1
amdhsa.target: amdgcn-amd-amdhsa--gfx1100
amdhsa.version:
- 1
- 2
...
.end_amdgpu_metadata |
You are a helpful coding assistant specialized in converting from CUDA host assembly to AMD host assembly. | .file "tmpxft_000eebf0_00000000-6_Tiled_Matrix_Mul.cudafe1.cpp"
.text
#APP
#NO_APP
.type _ZL26__cudaUnregisterBinaryUtilv, @function
_ZL26__cudaUnregisterBinaryUtilv:
.LFB2063:
.cfi_startproc
endbr64
subq $8, %rsp
.cfi_def_cfa_offset 16
movq _ZL20__cudaFatCubinHandle(%rip), %rdi
call __cudaUnregisterFatBinary@PLT
addq $8, %rsp
.cfi_def_cfa_offset 8
ret
.cfi_endproc
.LFE2063:
.size _ZL26__cudaUnregisterBinaryUtilv, .-_ZL26__cudaUnregisterBinaryUtilv
.globl _Z14mul_matrix_cpuPdS_S_i
.type _Z14mul_matrix_cpuPdS_S_i, @function
_Z14mul_matrix_cpuPdS_S_i:
.LFB2057:
.cfi_startproc
endbr64
testl %ecx, %ecx
jle .L11
pushq %r12
.cfi_def_cfa_offset 16
.cfi_offset 12, -16
pushq %rbp
.cfi_def_cfa_offset 24
.cfi_offset 6, -24
pushq %rbx
.cfi_def_cfa_offset 32
.cfi_offset 3, -32
movq %rsi, %rbx
movq %rdx, %r9
movl %ecx, %r12d
movslq %ecx, %r11
leaq 0(,%r11,8), %rcx
movq %rdi, %r10
leaq (%rdi,%rcx), %rsi
movl $0, %ebp
.L5:
movq %rbx, %r8
movl $0, %edi
.L8:
movq %r8, %rdx
movq %r10, %rax
pxor %xmm1, %xmm1
.L6:
movsd (%rax), %xmm0
mulsd (%rdx), %xmm0
addsd %xmm0, %xmm1
addq $8, %rax
addq %rcx, %rdx
cmpq %rsi, %rax
jne .L6
movsd %xmm1, (%r9,%rdi,8)
addq $1, %rdi
addq $8, %r8
cmpq %r11, %rdi
jne .L8
addl $1, %ebp
addq %rcx, %r9
addq %rcx, %r10
addq %rcx, %rsi
cmpl %ebp, %r12d
jne .L5
popq %rbx
.cfi_def_cfa_offset 24
popq %rbp
.cfi_def_cfa_offset 16
popq %r12
.cfi_def_cfa_offset 8
ret
.L11:
.cfi_restore 3
.cfi_restore 6
.cfi_restore 12
ret
.cfi_endproc
.LFE2057:
.size _Z14mul_matrix_cpuPdS_S_i, .-_Z14mul_matrix_cpuPdS_S_i
.section .rodata.str1.1,"aMS",@progbits,1
.LC3:
.string "TEST FAILED\n\n"
.LC4:
.string "TEST PASSED\n\n"
.text
.globl _Z6verifyPdS_S_i
.type _Z6verifyPdS_S_i, @function
_Z6verifyPdS_S_i:
.LFB2058:
.cfi_startproc
endbr64
pushq %r14
.cfi_def_cfa_offset 16
.cfi_offset 14, -16
pushq %r13
.cfi_def_cfa_offset 24
.cfi_offset 13, -24
pushq %r12
.cfi_def_cfa_offset 32
.cfi_offset 12, -32
pushq %rbp
.cfi_def_cfa_offset 40
.cfi_offset 6, -40
pushq %rbx
.cfi_def_cfa_offset 48
.cfi_offset 3, -48
testl %ecx, %ecx
jle .L15
movq %rdi, %r8
movq %rsi, %r9
movq %rdx, %rbx
movl %ecx, %edi
movslq %ecx, %r12
leaq 0(,%r12,8), %r14
movl %ecx, %r10d
movl $0, %ebp
movl $0, %r13d
movsd .LC1(%rip), %xmm2
movsd .LC2(%rip), %xmm3
.L16:
movl $0, %r11d
jmp .L23
.L27:
movapd %xmm1, %xmm0
subsd (%rbx,%r11,8), %xmm0
divsd %xmm1, %xmm0
comisd %xmm2, %xmm0
jnb .L18
comisd %xmm0, %xmm3
jnb .L18
addq $1, %r11
cmpq %r12, %r11
je .L22
.L23:
movl %r11d, %edx
movl %ebp, %eax
pxor %xmm1, %xmm1
.L17:
movl %eax, %esi
movl %edx, %ecx
movsd (%r8,%rsi,8), %xmm0
mulsd (%r9,%rcx,8), %xmm0
addsd %xmm0, %xmm1
addl $1, %eax
addl %edi, %edx
cmpl %r10d, %eax
jne .L17
jmp .L27
.L18:
leaq .LC3(%rip), %rsi
movl $2, %edi
movl $0, %eax
call __printf_chk@PLT
movl $0, %eax
.L14:
popq %rbx
.cfi_remember_state
.cfi_def_cfa_offset 40
popq %rbp
.cfi_def_cfa_offset 32
popq %r12
.cfi_def_cfa_offset 24
popq %r13
.cfi_def_cfa_offset 16
popq %r14
.cfi_def_cfa_offset 8
ret
.L22:
.cfi_restore_state
addl $1, %r13d
addl %edi, %ebp
addq %r14, %rbx
addl %edi, %r10d
cmpl %r13d, %edi
jne .L16
.L15:
leaq .LC4(%rip), %rsi
movl $2, %edi
movl $0, %eax
call __printf_chk@PLT
movl $1, %eax
jmp .L14
.cfi_endproc
.LFE2058:
.size _Z6verifyPdS_S_i, .-_Z6verifyPdS_S_i
.section .rodata.str1.1
.LC5:
.string "%f\t"
.LC6:
.string "\n"
.text
.globl _Z11printMatrixPdi
.type _Z11printMatrixPdi, @function
_Z11printMatrixPdi:
.LFB2059:
.cfi_startproc
endbr64
pushq %r15
.cfi_def_cfa_offset 16
.cfi_offset 15, -16
pushq %r14
.cfi_def_cfa_offset 24
.cfi_offset 14, -24
pushq %r13
.cfi_def_cfa_offset 32
.cfi_offset 13, -32
pushq %r12
.cfi_def_cfa_offset 40
.cfi_offset 12, -40
pushq %rbp
.cfi_def_cfa_offset 48
.cfi_offset 6, -48
pushq %rbx
.cfi_def_cfa_offset 56
.cfi_offset 3, -56
subq $24, %rsp
.cfi_def_cfa_offset 80
movl %esi, 12(%rsp)
testl %esi, %esi
jle .L29
movslq %esi, %r14
leaq 0(,%r14,8), %r15
leaq (%rdi,%r15), %rbp
negq %r14
salq $3, %r14
movl $0, %r13d
leaq .LC5(%rip), %r12
.L30:
leaq 0(%rbp,%r14), %rbx
.L31:
movsd (%rbx), %xmm0
movq %r12, %rsi
movl $2, %edi
movl $1, %eax
call __printf_chk@PLT
addq $8, %rbx
cmpq %rbp, %rbx
jne .L31
leaq .LC6(%rip), %rsi
movl $2, %edi
movl $0, %eax
call __printf_chk@PLT
addl $1, %r13d
addq %r15, %rbp
cmpl %r13d, 12(%rsp)
jne .L30
.L29:
movl $1, %eax
addq $24, %rsp
.cfi_def_cfa_offset 56
popq %rbx
.cfi_def_cfa_offset 48
popq %rbp
.cfi_def_cfa_offset 40
popq %r12
.cfi_def_cfa_offset 32
popq %r13
.cfi_def_cfa_offset 24
popq %r14
.cfi_def_cfa_offset 16
popq %r15
.cfi_def_cfa_offset 8
ret
.cfi_endproc
.LFE2059:
.size _Z11printMatrixPdi, .-_Z11printMatrixPdi
.globl _Z39__device_stub__Z14mul_matrix_gpuPdS_S_iPdS_S_i
.type _Z39__device_stub__Z14mul_matrix_gpuPdS_S_iPdS_S_i, @function
_Z39__device_stub__Z14mul_matrix_gpuPdS_S_iPdS_S_i:
.LFB2085:
.cfi_startproc
endbr64
subq $152, %rsp
.cfi_def_cfa_offset 160
movq %rdi, 24(%rsp)
movq %rsi, 16(%rsp)
movq %rdx, 8(%rsp)
movl %ecx, 4(%rsp)
movq %fs:40, %rax
movq %rax, 136(%rsp)
xorl %eax, %eax
leaq 24(%rsp), %rax
movq %rax, 96(%rsp)
leaq 16(%rsp), %rax
movq %rax, 104(%rsp)
leaq 8(%rsp), %rax
movq %rax, 112(%rsp)
leaq 4(%rsp), %rax
movq %rax, 120(%rsp)
movl $1, 48(%rsp)
movl $1, 52(%rsp)
movl $1, 56(%rsp)
movl $1, 60(%rsp)
movl $1, 64(%rsp)
movl $1, 68(%rsp)
leaq 40(%rsp), %rcx
leaq 32(%rsp), %rdx
leaq 60(%rsp), %rsi
leaq 48(%rsp), %rdi
call __cudaPopCallConfiguration@PLT
testl %eax, %eax
je .L38
.L34:
movq 136(%rsp), %rax
subq %fs:40, %rax
jne .L39
addq $152, %rsp
.cfi_remember_state
.cfi_def_cfa_offset 8
ret
.L38:
.cfi_restore_state
pushq 40(%rsp)
.cfi_def_cfa_offset 168
pushq 40(%rsp)
.cfi_def_cfa_offset 176
leaq 112(%rsp), %r9
movq 76(%rsp), %rcx
movl 84(%rsp), %r8d
movq 64(%rsp), %rsi
movl 72(%rsp), %edx
leaq _Z14mul_matrix_gpuPdS_S_i(%rip), %rdi
call cudaLaunchKernel@PLT
addq $16, %rsp
.cfi_def_cfa_offset 160
jmp .L34
.L39:
call __stack_chk_fail@PLT
.cfi_endproc
.LFE2085:
.size _Z39__device_stub__Z14mul_matrix_gpuPdS_S_iPdS_S_i, .-_Z39__device_stub__Z14mul_matrix_gpuPdS_S_iPdS_S_i
.globl _Z14mul_matrix_gpuPdS_S_i
.type _Z14mul_matrix_gpuPdS_S_i, @function
_Z14mul_matrix_gpuPdS_S_i:
.LFB2086:
.cfi_startproc
endbr64
subq $8, %rsp
.cfi_def_cfa_offset 16
call _Z39__device_stub__Z14mul_matrix_gpuPdS_S_iPdS_S_i
addq $8, %rsp
.cfi_def_cfa_offset 8
ret
.cfi_endproc
.LFE2086:
.size _Z14mul_matrix_gpuPdS_S_i, .-_Z14mul_matrix_gpuPdS_S_i
.section .rodata.str1.8,"aMS",@progbits,1
.align 8
.LC7:
.string "Select one of the following options: \n"
.align 8
.LC8:
.string "Press a for matrix size 8 * 8 \n"
.align 8
.LC9:
.string "Press b for matrix size 64 * 64 \n"
.align 8
.LC10:
.string "Press c for matrix size 128 * 128 \n"
.align 8
.LC11:
.string "Press d for matrix size 512 * 512 \n"
.align 8
.LC12:
.string "Press e for matrix size 1024 * 1024 \n"
.align 8
.LC13:
.string "Press f for matrix size 4096 * 4096 \n"
.align 8
.LC14:
.string "Press any other key for exit \n"
.section .rodata.str1.1
.LC15:
.string "%c"
.LC16:
.string "Matrix size is 8 * 8 \n"
.LC17:
.string "Matrix size is 64 * 64 \n"
.LC18:
.string "Matrix size is 128 * 128 \n"
.LC19:
.string "Matrix size is 512 * 512 \n"
.LC20:
.string "Matrix size is 1024 * 1024 \n"
.LC21:
.string "Matrix size is 4096 * 4096 \n"
.section .rodata.str1.8
.align 8
.LC24:
.string "memory was not allocated on device \n"
.align 8
.LC25:
.string "Calculating results for CPU vector multiplication \n"
.section .rodata.str1.1
.LC26:
.string "---------\n"
.section .rodata.str1.8
.align 8
.LC29:
.string "CPU computation time (milliseconds) \n"
.section .rodata.str1.1
.LC30:
.string "%f \t"
.section .rodata.str1.8
.align 8
.LC32:
.string "Block size and tile width for the program is %d\n "
.align 8
.LC33:
.string "Calling kernel for gpu computations for vector multiplication and calculating results\n"
.align 8
.LC34:
.string "GPU computation time (milliseconds) \n"
.align 8
.LC35:
.string "Total Memory transfer time between CPU and GPU (milliseconds)\n"
.section .rodata.str1.1
.LC36:
.string "Speedup: \n"
.section .rodata.str1.8
.align 8
.LC37:
.string "Comparing results for CPU and GPU computations \n"
.text
.globl main
.type main, @function
main:
.LFB2060:
.cfi_startproc
endbr64
pushq %r15
.cfi_def_cfa_offset 16
.cfi_offset 15, -16
pushq %r14
.cfi_def_cfa_offset 24
.cfi_offset 14, -24
pushq %r13
.cfi_def_cfa_offset 32
.cfi_offset 13, -32
pushq %r12
.cfi_def_cfa_offset 40
.cfi_offset 12, -40
pushq %rbp
.cfi_def_cfa_offset 48
.cfi_offset 6, -48
pushq %rbx
.cfi_def_cfa_offset 56
.cfi_offset 3, -56
subq $120, %rsp
.cfi_def_cfa_offset 176
movq %fs:40, %rax
movq %rax, 104(%rsp)
xorl %eax, %eax
leaq .LC7(%rip), %rsi
movl $2, %edi
call __printf_chk@PLT
leaq .LC8(%rip), %rsi
movl $2, %edi
movl $0, %eax
call __printf_chk@PLT
leaq .LC9(%rip), %rsi
movl $2, %edi
movl $0, %eax
call __printf_chk@PLT
leaq .LC10(%rip), %rsi
movl $2, %edi
movl $0, %eax
call __printf_chk@PLT
leaq .LC11(%rip), %rsi
movl $2, %edi
movl $0, %eax
call __printf_chk@PLT
leaq .LC12(%rip), %rsi
movl $2, %edi
movl $0, %eax
call __printf_chk@PLT
leaq .LC13(%rip), %rsi
movl $2, %edi
movl $0, %eax
call __printf_chk@PLT
leaq .LC14(%rip), %rsi
movl $2, %edi
movl $0, %eax
call __printf_chk@PLT
leaq 27(%rsp), %rsi
leaq .LC15(%rip), %rdi
movl $0, %eax
call __isoc23_scanf@PLT
movzbl 27(%rsp), %eax
subl $97, %eax
cmpb $5, %al
ja .L43
movzbl %al, %eax
leaq .L45(%rip), %rdx
movslq (%rdx,%rax,4), %rax
addq %rdx, %rax
notrack jmp *%rax
.section .rodata
.align 4
.align 4
.L45:
.long .L50-.L45
.long .L49-.L45
.long .L48-.L45
.long .L47-.L45
.long .L46-.L45
.long .L44-.L45
.text
.L50:
movl $8, N(%rip)
leaq .LC16(%rip), %rsi
movl $2, %edi
movl $0, %eax
call __printf_chk@PLT
movl $8, %r14d
.L51:
movl $8, blocksize(%rip)
movl %r14d, %r13d
imull %r14d, %r13d
movslq %r13d, %r13
salq $3, %r13
movq %r13, %rdi
call malloc@PLT
movq %rax, %rbx
movq %r13, %rdi
call malloc@PLT
movq %rax, %rbp
movq %r13, %rdi
call malloc@PLT
movq %rax, %r12
movq %r13, %rdi
call malloc@PLT
movq %rax, %r13
movl N(%rip), %r8d
testl %r8d, %r8d
jle .L52
movl %r14d, %r9d
movl $0, %edi
movl $1325, %r11d
movl $0, %esi
movslq %r8d, %r10
movsd .LC22(%rip), %xmm2
movsd .LC23(%rip), %xmm1
.L53:
movslq %edi, %rcx
leaq 0(,%rcx,8), %rdx
addq %r10, %rcx
salq $3, %rcx
.L54:
imull $3125, %r11d, %eax
movl %eax, %r11d
sarl $31, %r11d
shrl $16, %r11d
addl %r11d, %eax
movzwl %ax, %eax
subl %r11d, %eax
pxor %xmm0, %xmm0
cvtsi2sdl %eax, %xmm0
subsd %xmm2, %xmm0
mulsd %xmm1, %xmm0
movsd %xmm0, (%rbx,%rdx)
imull $3125, %eax, %eax
movl %eax, %r11d
sarl $31, %r11d
shrl $16, %r11d
addl %r11d, %eax
movzwl %ax, %eax
subl %r11d, %eax
movl %eax, %r11d
pxor %xmm0, %xmm0
cvtsi2sdl %eax, %xmm0
subsd %xmm2, %xmm0
mulsd %xmm1, %xmm0
movsd %xmm0, 0(%rbp,%rdx)
addq $8, %rdx
cmpq %rdx, %rcx
jne .L54
addl $1, %esi
addl %r9d, %edi
cmpl %r8d, %esi
jne .L53
.L52:
imull %r8d, %r8d
movslq %r8d, %rsi
salq $3, %rsi
leaq 40(%rsp), %rdi
call cudaMalloc@PLT
testl %eax, %eax
jne .L60
.L55:
movl N(%rip), %eax
imull %eax, %eax
movslq %eax, %rsi
salq $3, %rsi
leaq 48(%rsp), %rdi
call cudaMalloc@PLT
movl N(%rip), %eax
imull %eax, %eax
movslq %eax, %rsi
salq $3, %rsi
leaq 56(%rsp), %rdi
call cudaMalloc@PLT
leaq .LC25(%rip), %rsi
movl $2, %edi
movl $0, %eax
call __printf_chk@PLT
leaq .LC26(%rip), %r14
movq %r14, %rsi
movl $2, %edi
movl $0, %eax
call __printf_chk@PLT
call clock@PLT
movq %rax, %r15
movl N(%rip), %ecx
movq %r13, %rdx
movq %rbp, %rsi
movq %rbx, %rdi
call _Z14mul_matrix_cpuPdS_S_i
call clock@PLT
subq %r15, %rax
pxor %xmm0, %xmm0
cvtsi2ssq %rax, %xmm0
mulss .LC27(%rip), %xmm0
divss .LC28(%rip), %xmm0
movss %xmm0, 12(%rsp)
leaq .LC29(%rip), %rsi
movl $2, %edi
movl $0, %eax
call __printf_chk@PLT
pxor %xmm0, %xmm0
cvtss2sd 12(%rsp), %xmm0
leaq .LC30(%rip), %rsi
movl $2, %edi
movl $1, %eax
call __printf_chk@PLT
leaq .LC6(%rip), %r13
movq %r13, %rsi
movl $2, %edi
movl $0, %eax
call __printf_chk@PLT
movq %r13, %rsi
movl $2, %edi
movl $0, %eax
call __printf_chk@PLT
leaq 64(%rsp), %r15
movq %r15, %rdi
call cudaEventCreate@PLT
leaq 72(%rsp), %r13
movq %r13, %rdi
call cudaEventCreate@PLT
movl $0, %esi
movq 64(%rsp), %rdi
call cudaEventRecord@PLT
movl N(%rip), %eax
imull %eax, %eax
movslq %eax, %rdx
salq $3, %rdx
movl $1, %ecx
movq %rbx, %rsi
movq 40(%rsp), %rdi
call cudaMemcpy@PLT
movl N(%rip), %eax
imull %eax, %eax
movslq %eax, %rdx
salq $3, %rdx
movl $1, %ecx
movq %rbp, %rsi
movq 48(%rsp), %rdi
call cudaMemcpy@PLT
call cudaDeviceSynchronize@PLT
movl $0, %esi
movq 72(%rsp), %rdi
call cudaEventRecord@PLT
movq 72(%rsp), %rdi
call cudaEventSynchronize@PLT
leaq 32(%rsp), %rdi
movq 72(%rsp), %rdx
movq 64(%rsp), %rsi
call cudaEventElapsedTime@PLT
movq 64(%rsp), %rdi
call cudaEventDestroy@PLT
movq 72(%rsp), %rdi
call cudaEventDestroy@PLT
movl blocksize(%rip), %edx
movl %edx, 80(%rsp)
movl %edx, 84(%rsp)
movl $1, 88(%rsp)
movl N(%rip), %eax
subl $1, %eax
pxor %xmm0, %xmm0
cvtsi2sdl %eax, %xmm0
pxor %xmm1, %xmm1
cvtsi2sdl %edx, %xmm1
divsd %xmm1, %xmm0
addsd .LC31(%rip), %xmm0
cvttsd2sil %xmm0, %eax
movl %eax, 92(%rsp)
movl %eax, 96(%rsp)
movl $1, 100(%rsp)
leaq .LC32(%rip), %rsi
movl $2, %edi
movl $0, %eax
call __printf_chk@PLT
leaq .LC33(%rip), %rsi
movl $2, %edi
movl $0, %eax
call __printf_chk@PLT
movq %r14, %rsi
movl $2, %edi
movl $0, %eax
call __printf_chk@PLT
movq %r15, %rdi
call cudaEventCreate@PLT
movq %r13, %rdi
call cudaEventCreate@PLT
movl $0, %esi
movq 64(%rsp), %rdi
call cudaEventRecord@PLT
movl 88(%rsp), %ecx
movl $0, %r9d
movl $0, %r8d
movq 80(%rsp), %rdx
movq 92(%rsp), %rdi
movl 100(%rsp), %esi
call __cudaPushCallConfiguration@PLT
testl %eax, %eax
je .L61
.L56:
movl $0, %esi
movq 72(%rsp), %rdi
call cudaEventRecord@PLT
movq 72(%rsp), %rdi
call cudaEventSynchronize@PLT
leaq 28(%rsp), %rdi
movq 72(%rsp), %rdx
movq 64(%rsp), %rsi
call cudaEventElapsedTime@PLT
movq 64(%rsp), %rdi
call cudaEventDestroy@PLT
movq 72(%rsp), %rdi
call cudaEventDestroy@PLT
leaq .LC34(%rip), %rsi
movl $2, %edi
movl $0, %eax
call __printf_chk@PLT
pxor %xmm0, %xmm0
cvtss2sd 28(%rsp), %xmm0
leaq .LC30(%rip), %r14
movq %r14, %rsi
movl $2, %edi
movl $1, %eax
call __printf_chk@PLT
leaq .LC6(%rip), %r13
movq %r13, %rsi
movl $2, %edi
movl $0, %eax
call __printf_chk@PLT
leaq 64(%rsp), %rdi
call cudaEventCreate@PLT
leaq 72(%rsp), %rdi
call cudaEventCreate@PLT
movl $0, %esi
movq 64(%rsp), %rdi
call cudaEventRecord@PLT
movl N(%rip), %eax
imull %eax, %eax
movslq %eax, %rdx
salq $3, %rdx
movl $2, %ecx
movq 56(%rsp), %rsi
movq %r12, %rdi
call cudaMemcpy@PLT
call cudaDeviceSynchronize@PLT
movl $0, %esi
movq 72(%rsp), %rdi
call cudaEventRecord@PLT
movq 72(%rsp), %rdi
call cudaEventSynchronize@PLT
leaq 36(%rsp), %rdi
movq 72(%rsp), %rdx
movq 64(%rsp), %rsi
call cudaEventElapsedTime@PLT
movq 64(%rsp), %rdi
call cudaEventDestroy@PLT
movq 72(%rsp), %rdi
call cudaEventDestroy@PLT
movss 32(%rsp), %xmm0
addss 36(%rsp), %xmm0
movss %xmm0, 32(%rsp)
leaq .LC35(%rip), %rsi
movl $2, %edi
movl $0, %eax
call __printf_chk@PLT
pxor %xmm0, %xmm0
cvtss2sd 32(%rsp), %xmm0
movq %r14, %rsi
movl $2, %edi
movl $1, %eax
call __printf_chk@PLT
movq %r13, %rsi
movl $2, %edi
movl $0, %eax
call __printf_chk@PLT
movss 12(%rsp), %xmm3
divss 28(%rsp), %xmm3
movss %xmm3, 12(%rsp)
leaq .LC36(%rip), %rsi
movl $2, %edi
movl $0, %eax
call __printf_chk@PLT
pxor %xmm0, %xmm0
cvtss2sd 12(%rsp), %xmm0
movq %r14, %rsi
movl $2, %edi
movl $1, %eax
call __printf_chk@PLT
movq %r13, %rsi
movl $2, %edi
movl $0, %eax
call __printf_chk@PLT
leaq .LC37(%rip), %rsi
movl $2, %edi
movl $0, %eax
call __printf_chk@PLT
leaq .LC26(%rip), %rsi
movl $2, %edi
movl $0, %eax
call __printf_chk@PLT
movl N(%rip), %ecx
movq %r12, %rdx
movq %rbp, %rsi
movq %rbx, %rdi
call _Z6verifyPdS_S_i
movq 40(%rsp), %rdi
call cudaFree@PLT
movq 48(%rsp), %rdi
call cudaFree@PLT
movq 56(%rsp), %rdi
call cudaFree@PLT
movq 104(%rsp), %rax
subq %fs:40, %rax
jne .L62
movl $0, %eax
addq $120, %rsp
.cfi_remember_state
.cfi_def_cfa_offset 56
popq %rbx
.cfi_def_cfa_offset 48
popq %rbp
.cfi_def_cfa_offset 40
popq %r12
.cfi_def_cfa_offset 32
popq %r13
.cfi_def_cfa_offset 24
popq %r14
.cfi_def_cfa_offset 16
popq %r15
.cfi_def_cfa_offset 8
ret
.L49:
.cfi_restore_state
movl $64, N(%rip)
leaq .LC17(%rip), %rsi
movl $2, %edi
movl $0, %eax
call __printf_chk@PLT
movl $64, %r14d
jmp .L51
.L48:
movl $128, N(%rip)
leaq .LC18(%rip), %rsi
movl $2, %edi
movl $0, %eax
call __printf_chk@PLT
movl $128, %r14d
jmp .L51
.L47:
movl $512, N(%rip)
leaq .LC19(%rip), %rsi
movl $2, %edi
movl $0, %eax
call __printf_chk@PLT
movl $512, %r14d
jmp .L51
.L46:
movl $1024, N(%rip)
leaq .LC20(%rip), %rsi
movl $2, %edi
movl $0, %eax
call __printf_chk@PLT
movl $1024, %r14d
jmp .L51
.L44:
movl $4096, N(%rip)
leaq .LC21(%rip), %rsi
movl $2, %edi
movl $0, %eax
call __printf_chk@PLT
movl $4096, %r14d
jmp .L51
.L43:
movl $1, %edi
call exit@PLT
.L60:
leaq .LC24(%rip), %rsi
movl $2, %edi
movl $0, %eax
call __printf_chk@PLT
jmp .L55
.L61:
movl N(%rip), %ecx
movq 56(%rsp), %rdx
movq 48(%rsp), %rsi
movq 40(%rsp), %rdi
call _Z39__device_stub__Z14mul_matrix_gpuPdS_S_iPdS_S_i
jmp .L56
.L62:
call __stack_chk_fail@PLT
.cfi_endproc
.LFE2060:
.size main, .-main
.section .rodata.str1.1
.LC38:
.string "_Z14mul_matrix_gpuPdS_S_i"
.text
.type _ZL24__sti____cudaRegisterAllv, @function
_ZL24__sti____cudaRegisterAllv:
.LFB2088:
.cfi_startproc
endbr64
subq $8, %rsp
.cfi_def_cfa_offset 16
leaq _ZL15__fatDeviceText(%rip), %rdi
call __cudaRegisterFatBinary@PLT
movq %rax, %rdi
movq %rax, _ZL20__cudaFatCubinHandle(%rip)
pushq $0
.cfi_def_cfa_offset 24
pushq $0
.cfi_def_cfa_offset 32
pushq $0
.cfi_def_cfa_offset 40
pushq $0
.cfi_def_cfa_offset 48
movl $0, %r9d
movl $-1, %r8d
leaq .LC38(%rip), %rdx
movq %rdx, %rcx
leaq _Z14mul_matrix_gpuPdS_S_i(%rip), %rsi
call __cudaRegisterFunction@PLT
addq $32, %rsp
.cfi_def_cfa_offset 16
movq _ZL20__cudaFatCubinHandle(%rip), %rdi
call __cudaRegisterFatBinaryEnd@PLT
leaq _ZL26__cudaUnregisterBinaryUtilv(%rip), %rdi
call atexit@PLT
addq $8, %rsp
.cfi_def_cfa_offset 8
ret
.cfi_endproc
.LFE2088:
.size _ZL24__sti____cudaRegisterAllv, .-_ZL24__sti____cudaRegisterAllv
.section .init_array,"aw"
.align 8
.quad _ZL24__sti____cudaRegisterAllv
.section .nvFatBinSegment,"aw"
.align 8
.type _ZL15__fatDeviceText, @object
.size _ZL15__fatDeviceText, 24
_ZL15__fatDeviceText:
.long 1180844977
.long 1
.quad fatbinData
.quad 0
.local _ZL20__cudaFatCubinHandle
.comm _ZL20__cudaFatCubinHandle,8,8
.globl blocksize
.bss
.align 4
.type blocksize, @object
.size blocksize, 4
blocksize:
.zero 4
.globl N
.align 4
.type N, @object
.size N, 4
N:
.zero 4
.section .rodata.cst8,"aM",@progbits,8
.align 8
.LC1:
.long -1598689907
.long 1051772663
.align 8
.LC2:
.long -1598689907
.long -1095710985
.align 8
.LC22:
.long 0
.long 1088421888
.align 8
.LC23:
.long 0
.long 1058013184
.section .rodata.cst4,"aM",@progbits,4
.align 4
.LC27:
.long 1148846080
.align 4
.LC28:
.long 1232348160
.section .rodata.cst8
.align 8
.LC31:
.long 0
.long 1072693248
.ident "GCC: (Ubuntu 13.3.0-6ubuntu2~24.04) 13.3.0"
.section .note.GNU-stack,"",@progbits
.section .note.gnu.property,"a"
.align 8
.long 1f - 0f
.long 4f - 1f
.long 5
0:
.string "GNU"
1:
.align 8
.long 0xc0000002
.long 3f - 2f
2:
.long 0x3
3:
.align 8
4: | .text
.file "Tiled_Matrix_Mul.hip"
.globl _Z29__device_stub__mul_matrix_gpuPdS_S_i # -- Begin function _Z29__device_stub__mul_matrix_gpuPdS_S_i
.p2align 4, 0x90
.type _Z29__device_stub__mul_matrix_gpuPdS_S_i,@function
_Z29__device_stub__mul_matrix_gpuPdS_S_i: # @_Z29__device_stub__mul_matrix_gpuPdS_S_i
.cfi_startproc
# %bb.0:
subq $120, %rsp
.cfi_def_cfa_offset 128
movq %rdi, 72(%rsp)
movq %rsi, 64(%rsp)
movq %rdx, 56(%rsp)
movl %ecx, 4(%rsp)
leaq 72(%rsp), %rax
movq %rax, 80(%rsp)
leaq 64(%rsp), %rax
movq %rax, 88(%rsp)
leaq 56(%rsp), %rax
movq %rax, 96(%rsp)
leaq 4(%rsp), %rax
movq %rax, 104(%rsp)
leaq 40(%rsp), %rdi
leaq 24(%rsp), %rsi
leaq 16(%rsp), %rdx
leaq 8(%rsp), %rcx
callq __hipPopCallConfiguration
movq 40(%rsp), %rsi
movl 48(%rsp), %edx
movq 24(%rsp), %rcx
movl 32(%rsp), %r8d
leaq 80(%rsp), %r9
movl $_Z14mul_matrix_gpuPdS_S_i, %edi
pushq 8(%rsp)
.cfi_adjust_cfa_offset 8
pushq 24(%rsp)
.cfi_adjust_cfa_offset 8
callq hipLaunchKernel
addq $136, %rsp
.cfi_adjust_cfa_offset -136
retq
.Lfunc_end0:
.size _Z29__device_stub__mul_matrix_gpuPdS_S_i, .Lfunc_end0-_Z29__device_stub__mul_matrix_gpuPdS_S_i
.cfi_endproc
# -- End function
.globl _Z14mul_matrix_cpuPdS_S_i # -- Begin function _Z14mul_matrix_cpuPdS_S_i
.p2align 4, 0x90
.type _Z14mul_matrix_cpuPdS_S_i,@function
_Z14mul_matrix_cpuPdS_S_i: # @_Z14mul_matrix_cpuPdS_S_i
.cfi_startproc
# %bb.0:
testl %ecx, %ecx
jle .LBB1_8
# %bb.1: # %.preheader28.lr.ph
pushq %r15
.cfi_def_cfa_offset 16
pushq %r14
.cfi_def_cfa_offset 24
pushq %r13
.cfi_def_cfa_offset 32
pushq %r12
.cfi_def_cfa_offset 40
pushq %rbx
.cfi_def_cfa_offset 48
.cfi_offset %rbx, -48
.cfi_offset %r12, -40
.cfi_offset %r13, -32
.cfi_offset %r14, -24
.cfi_offset %r15, -16
movl %ecx, %eax
leaq (,%rax,8), %r8
xorl %r9d, %r9d
xorl %r10d, %r10d
.p2align 4, 0x90
.LBB1_2: # %.preheader28
# =>This Loop Header: Depth=1
# Child Loop BB1_3 Depth 2
# Child Loop BB1_4 Depth 3
movl %r9d, %r11d
leaq (%rdi,%r11,8), %r11
movq %r10, %rbx
imulq %rax, %rbx
leaq (%rdx,%rbx,8), %rbx
movq %rsi, %r14
xorl %r15d, %r15d
.p2align 4, 0x90
.LBB1_3: # %.preheader
# Parent Loop BB1_2 Depth=1
# => This Loop Header: Depth=2
# Child Loop BB1_4 Depth 3
xorpd %xmm0, %xmm0
movq %r14, %r12
xorl %r13d, %r13d
.p2align 4, 0x90
.LBB1_4: # Parent Loop BB1_2 Depth=1
# Parent Loop BB1_3 Depth=2
# => This Inner Loop Header: Depth=3
movsd (%r11,%r13,8), %xmm1 # xmm1 = mem[0],zero
mulsd (%r12), %xmm1
addsd %xmm1, %xmm0
incq %r13
addq %r8, %r12
cmpq %r13, %rax
jne .LBB1_4
# %bb.5: # %._crit_edge
# in Loop: Header=BB1_3 Depth=2
movsd %xmm0, (%rbx,%r15,8)
incq %r15
addq $8, %r14
cmpq %rax, %r15
jne .LBB1_3
# %bb.6: # %._crit_edge32
# in Loop: Header=BB1_2 Depth=1
incq %r10
addl %ecx, %r9d
cmpq %rax, %r10
jne .LBB1_2
# %bb.7:
popq %rbx
.cfi_def_cfa_offset 40
popq %r12
.cfi_def_cfa_offset 32
popq %r13
.cfi_def_cfa_offset 24
popq %r14
.cfi_def_cfa_offset 16
popq %r15
.cfi_def_cfa_offset 8
.cfi_restore %rbx
.cfi_restore %r12
.cfi_restore %r13
.cfi_restore %r14
.cfi_restore %r15
.LBB1_8: # %._crit_edge34
retq
.Lfunc_end1:
.size _Z14mul_matrix_cpuPdS_S_i, .Lfunc_end1-_Z14mul_matrix_cpuPdS_S_i
.cfi_endproc
# -- End function
.section .rodata.cst8,"aM",@progbits,8
.p2align 3, 0x0 # -- Begin function _Z6verifyPdS_S_i
.LCPI2_0:
.quad 0x3eb0c6f7a0b5ed8d # double 9.9999999999999995E-7
.LCPI2_1:
.quad 0xbeb0c6f7a0b5ed8d # double -9.9999999999999995E-7
.text
.globl _Z6verifyPdS_S_i
.p2align 4, 0x90
.type _Z6verifyPdS_S_i,@function
_Z6verifyPdS_S_i: # @_Z6verifyPdS_S_i
.cfi_startproc
# %bb.0:
pushq %rbp
.cfi_def_cfa_offset 16
pushq %r15
.cfi_def_cfa_offset 24
pushq %r14
.cfi_def_cfa_offset 32
pushq %r13
.cfi_def_cfa_offset 40
pushq %r12
.cfi_def_cfa_offset 48
pushq %rbx
.cfi_def_cfa_offset 56
subq $24, %rsp
.cfi_def_cfa_offset 80
.cfi_offset %rbx, -56
.cfi_offset %r12, -48
.cfi_offset %r13, -40
.cfi_offset %r14, -32
.cfi_offset %r15, -24
.cfi_offset %rbp, -16
testl %ecx, %ecx
setle %bl
jle .LBB2_11
# %bb.1: # %.preheader47.lr.ph
movl %ecx, %ebp
movq %rsi, %r15
movq %rdi, %r12
movl %ecx, %r13d
xorl %r14d, %r14d
movsd .LCPI2_0(%rip), %xmm2 # xmm2 = mem[0],zero
movsd .LCPI2_1(%rip), %xmm3 # xmm3 = mem[0],zero
xorl %r11d, %r11d
movq %rdx, 8(%rsp) # 8-byte Spill
jmp .LBB2_2
.p2align 4, 0x90
.LBB2_8: # in Loop: Header=BB2_2 Depth=1
movl $.Lstr, %edi
movq %r11, 16(%rsp) # 8-byte Spill
callq puts@PLT
movq 16(%rsp), %r11 # 8-byte Reload
movsd .LCPI2_1(%rip), %xmm3 # xmm3 = mem[0],zero
movsd .LCPI2_0(%rip), %xmm2 # xmm2 = mem[0],zero
movq 8(%rsp), %rdx # 8-byte Reload
testb $1, %bl
jne .LBB2_10
.LBB2_9: # %.critedge44
# in Loop: Header=BB2_2 Depth=1
incq %r11
cmpq %r13, %r11
setae %bl
addl %ebp, %r14d
cmpq %r13, %r11
je .LBB2_11
.LBB2_2: # %.preheader47
# =>This Loop Header: Depth=1
# Child Loop BB2_4 Depth 2
# Child Loop BB2_5 Depth 3
movb %bl, 7(%rsp) # 1-byte Spill
movq %r11, %rax
imulq %r13, %rax
leaq (%rdx,%rax,8), %rax
movb $1, %bl
xorl %ecx, %ecx
xorl %r10d, %r10d
.p2align 4, 0x90
.LBB2_4: # %.preheader
# Parent Loop BB2_2 Depth=1
# => This Loop Header: Depth=2
# Child Loop BB2_5 Depth 3
xorpd %xmm0, %xmm0
movq %r13, %rsi
movl %r14d, %edi
movl %ecx, %r8d
.p2align 4, 0x90
.LBB2_5: # Parent Loop BB2_2 Depth=1
# Parent Loop BB2_4 Depth=2
# => This Inner Loop Header: Depth=3
movl %edi, %r9d
movsd (%r12,%r9,8), %xmm1 # xmm1 = mem[0],zero
movl %r8d, %r9d
mulsd (%r15,%r9,8), %xmm1
addsd %xmm1, %xmm0
addl %ebp, %r8d
incl %edi
decq %rsi
jne .LBB2_5
# %bb.6: # %.critedge
# in Loop: Header=BB2_4 Depth=2
movapd %xmm0, %xmm1
subsd (%rax,%r10,8), %xmm1
divsd %xmm0, %xmm1
ucomisd %xmm2, %xmm1
jae .LBB2_8
# %bb.7: # %.critedge
# in Loop: Header=BB2_4 Depth=2
ucomisd %xmm1, %xmm3
jae .LBB2_8
# %bb.3: # in Loop: Header=BB2_4 Depth=2
incq %r10
cmpq %r13, %r10
setb %bl
incl %ecx
cmpq %r13, %r10
jne .LBB2_4
jmp .LBB2_9
.LBB2_10:
movzbl 7(%rsp), %ebx # 1-byte Folded Reload
testb $1, %bl
je .LBB2_12
.LBB2_11: # %.critedge46
movl $.Lstr.1, %edi
callq puts@PLT
.LBB2_12:
andb $1, %bl
movl %ebx, %eax
addq $24, %rsp
.cfi_def_cfa_offset 56
popq %rbx
.cfi_def_cfa_offset 48
popq %r12
.cfi_def_cfa_offset 40
popq %r13
.cfi_def_cfa_offset 32
popq %r14
.cfi_def_cfa_offset 24
popq %r15
.cfi_def_cfa_offset 16
popq %rbp
.cfi_def_cfa_offset 8
retq
.Lfunc_end2:
.size _Z6verifyPdS_S_i, .Lfunc_end2-_Z6verifyPdS_S_i
.cfi_endproc
# -- End function
.globl _Z11printMatrixPdi # -- Begin function _Z11printMatrixPdi
.p2align 4, 0x90
.type _Z11printMatrixPdi,@function
_Z11printMatrixPdi: # @_Z11printMatrixPdi
.cfi_startproc
# %bb.0:
pushq %rbp
.cfi_def_cfa_offset 16
pushq %r15
.cfi_def_cfa_offset 24
pushq %r14
.cfi_def_cfa_offset 32
pushq %r13
.cfi_def_cfa_offset 40
pushq %r12
.cfi_def_cfa_offset 48
pushq %rbx
.cfi_def_cfa_offset 56
pushq %rax
.cfi_def_cfa_offset 64
.cfi_offset %rbx, -56
.cfi_offset %r12, -48
.cfi_offset %r13, -40
.cfi_offset %r14, -32
.cfi_offset %r15, -24
.cfi_offset %rbp, -16
movq %rdi, (%rsp) # 8-byte Spill
testl %esi, %esi
jle .LBB3_5
# %bb.1: # %.preheader.lr.ph
movl %esi, %ebx
movl %esi, %r15d
xorl %r12d, %r12d
xorl %r13d, %r13d
.p2align 4, 0x90
.LBB3_2: # %.preheader
# =>This Loop Header: Depth=1
# Child Loop BB3_3 Depth 2
movl %r12d, %eax
movq (%rsp), %rcx # 8-byte Reload
leaq (%rcx,%rax,8), %rbp
xorl %r14d, %r14d
.p2align 4, 0x90
.LBB3_3: # Parent Loop BB3_2 Depth=1
# => This Inner Loop Header: Depth=2
movsd (%rbp,%r14,8), %xmm0 # xmm0 = mem[0],zero
movl $.L.str.2, %edi
movb $1, %al
callq printf
incq %r14
cmpq %r14, %r15
jne .LBB3_3
# %bb.4: # %._crit_edge
# in Loop: Header=BB3_2 Depth=1
movl $10, %edi
callq putchar@PLT
incq %r13
addl %ebx, %r12d
cmpq %r15, %r13
jne .LBB3_2
.LBB3_5: # %._crit_edge13
movl $1, %eax
addq $8, %rsp
.cfi_def_cfa_offset 56
popq %rbx
.cfi_def_cfa_offset 48
popq %r12
.cfi_def_cfa_offset 40
popq %r13
.cfi_def_cfa_offset 32
popq %r14
.cfi_def_cfa_offset 24
popq %r15
.cfi_def_cfa_offset 16
popq %rbp
.cfi_def_cfa_offset 8
retq
.Lfunc_end3:
.size _Z11printMatrixPdi, .Lfunc_end3-_Z11printMatrixPdi
.cfi_endproc
# -- End function
.section .rodata.cst8,"aM",@progbits,8
.p2align 3, 0x0 # -- Begin function main
.LCPI4_0:
.quad 0x3f10000000000000 # double 6.103515625E-5
.LCPI4_3:
.quad 0x3ff0000000000000 # double 1
.LCPI4_4:
.quad 0x3eb0c6f7a0b5ed8d # double 9.9999999999999995E-7
.LCPI4_5:
.quad 0xbeb0c6f7a0b5ed8d # double -9.9999999999999995E-7
.section .rodata.cst4,"aM",@progbits,4
.p2align 2, 0x0
.LCPI4_1:
.long 0x447a0000 # float 1000
.LCPI4_2:
.long 0x49742400 # float 1.0E+6
.text
.globl main
.p2align 4, 0x90
.type main,@function
main: # @main
.cfi_startproc
# %bb.0:
pushq %rbp
.cfi_def_cfa_offset 16
pushq %r15
.cfi_def_cfa_offset 24
pushq %r14
.cfi_def_cfa_offset 32
pushq %r13
.cfi_def_cfa_offset 40
pushq %r12
.cfi_def_cfa_offset 48
pushq %rbx
.cfi_def_cfa_offset 56
subq $184, %rsp
.cfi_def_cfa_offset 240
.cfi_offset %rbx, -56
.cfi_offset %r12, -48
.cfi_offset %r13, -40
.cfi_offset %r14, -32
.cfi_offset %r15, -24
.cfi_offset %rbp, -16
movl $.Lstr.2, %edi
callq puts@PLT
movl $.Lstr.3, %edi
callq puts@PLT
movl $.Lstr.4, %edi
callq puts@PLT
movl $.Lstr.5, %edi
callq puts@PLT
movl $.Lstr.6, %edi
callq puts@PLT
movl $.Lstr.7, %edi
callq puts@PLT
movl $.Lstr.8, %edi
callq puts@PLT
movl $.Lstr.9, %edi
callq puts@PLT
leaq 7(%rsp), %rsi
movl $.L.str.12, %edi
xorl %eax, %eax
callq __isoc23_scanf
movzbl 7(%rsp), %eax
addb $-97, %al
cmpb $6, %al
jae .LBB4_23
# %bb.1: # %switch.lookup
movzbl %al, %eax
movl .Lswitch.table.main.28(,%rax,4), %ebp
movq .Lswitch.table.main.27(,%rax,8), %rdi
movl %ebp, N(%rip)
callq puts@PLT
movl $8, blocksize(%rip)
movl %ebp, %r15d
imull %r15d, %r15d
shll $3, %r15d
movq %r15, %rdi
callq malloc
movq %rax, %rbx
movq %r15, %rdi
callq malloc
movq %rax, %r14
movq %r15, %rdi
callq malloc
movq %rax, 88(%rsp) # 8-byte Spill
movl N(%rip), %esi
testl %esi, %esi
jle .LBB4_6
# %bb.2: # %.preheader.lr.ph
movl $1325, %ecx # imm = 0x52D
xorl %eax, %eax
movsd .LCPI4_0(%rip), %xmm0 # xmm0 = mem[0],zero
xorl %edx, %edx
.p2align 4, 0x90
.LBB4_3: # %.preheader
# =>This Loop Header: Depth=1
# Child Loop BB4_4 Depth 2
movl %eax, %r8d
leaq (%r14,%r8,8), %rdi
leaq (%rbx,%r8,8), %r8
xorl %r9d, %r9d
.p2align 4, 0x90
.LBB4_4: # Parent Loop BB4_3 Depth=1
# => This Inner Loop Header: Depth=2
imull $3125, %ecx, %r10d # imm = 0xC35
movzwl %r10w, %r10d
addl $-32768, %r10d # imm = 0x8000
xorps %xmm1, %xmm1
cvtsi2sd %r10d, %xmm1
mulsd %xmm0, %xmm1
movsd %xmm1, (%r8,%r9,8)
imull $761, %ecx, %ecx # imm = 0x2F9
movzwl %cx, %ecx
leal -32768(%rcx), %r10d
xorps %xmm1, %xmm1
cvtsi2sd %r10d, %xmm1
mulsd %xmm0, %xmm1
movsd %xmm1, (%rdi,%r9,8)
incq %r9
cmpq %r9, %rsi
jne .LBB4_4
# %bb.5: # %._crit_edge
# in Loop: Header=BB4_3 Depth=1
incq %rdx
addl %ebp, %eax
cmpq %rsi, %rdx
jne .LBB4_3
.LBB4_6: # %._crit_edge100
imull %esi, %esi
shlq $3, %rsi
leaq 56(%rsp), %rdi
callq hipMalloc
testl %eax, %eax
je .LBB4_8
# %bb.7:
movl $.Lstr.16, %edi
callq puts@PLT
.LBB4_8: # %_Z14mul_matrix_cpuPdS_S_i.exit
movl N(%rip), %esi
imull %esi, %esi
shlq $3, %rsi
leaq 48(%rsp), %rdi
callq hipMalloc
movl N(%rip), %esi
imull %esi, %esi
shlq $3, %rsi
leaq 40(%rsp), %rdi
callq hipMalloc
movl $.Lstr.17, %edi
callq puts@PLT
movl $.Lstr.26, %edi
callq puts@PLT
callq clock
movq %rax, %r12
callq clock
subq %r12, %rax
xorps %xmm0, %xmm0
cvtsi2ss %rax, %xmm0
mulss .LCPI4_1(%rip), %xmm0
divss .LCPI4_2(%rip), %xmm0
movss %xmm0, 32(%rsp) # 4-byte Spill
movl $.Lstr.19, %edi
callq puts@PLT
movss 32(%rsp), %xmm0 # 4-byte Reload
# xmm0 = mem[0],zero,zero,zero
cvtss2sd %xmm0, %xmm0
movl $.L.str.23, %edi
movb $1, %al
callq printf
movl $10, %edi
callq putchar@PLT
movl $10, %edi
callq putchar@PLT
leaq 16(%rsp), %r15
movq %r15, %rdi
callq hipEventCreate
leaq 8(%rsp), %r13
movq %r13, %rdi
callq hipEventCreate
movq 16(%rsp), %rdi
xorl %esi, %esi
callq hipEventRecord
movq 56(%rsp), %rdi
movl N(%rip), %edx
imull %edx, %edx
shlq $3, %rdx
movq %rbx, %rsi
movl $1, %ecx
callq hipMemcpy
movq 48(%rsp), %rdi
movl N(%rip), %edx
imull %edx, %edx
shlq $3, %rdx
movq %r14, %rsi
movl $1, %ecx
callq hipMemcpy
callq hipDeviceSynchronize
movq 8(%rsp), %rdi
xorl %esi, %esi
callq hipEventRecord
movq 8(%rsp), %rdi
callq hipEventSynchronize
movq 16(%rsp), %rsi
movq 8(%rsp), %rdx
leaq 28(%rsp), %rdi
callq hipEventElapsedTime
movq 16(%rsp), %rdi
callq hipEventDestroy
movq 8(%rsp), %rdi
callq hipEventDestroy
movl blocksize(%rip), %esi
movq %rsi, %rbp
movl N(%rip), %eax
decl %eax
xorps %xmm0, %xmm0
cvtsi2sd %eax, %xmm0
shlq $32, %rbp
cvtsi2sd %esi, %xmm1
divsd %xmm1, %xmm0
addsd .LCPI4_3(%rip), %xmm0
cvttsd2si %xmm0, %eax
orq %rsi, %rbp
movq %rax, %r12
shlq $32, %r12
orq %rax, %r12
movl $.L.str.24, %edi
# kill: def $esi killed $esi killed $rsi
xorl %eax, %eax
callq printf
movl $.Lstr.20, %edi
callq puts@PLT
movl $.Lstr.26, %edi
callq puts@PLT
movq %r15, %rdi
callq hipEventCreate
movq %r13, %rdi
callq hipEventCreate
movq 16(%rsp), %rdi
xorl %esi, %esi
callq hipEventRecord
movq %r12, %rdi
movl $1, %esi
movq %rbp, %rdx
movl $1, %ecx
xorl %r8d, %r8d
xorl %r9d, %r9d
callq __hipPushCallConfiguration
testl %eax, %eax
jne .LBB4_10
# %bb.9:
movq 56(%rsp), %rax
movq 48(%rsp), %rcx
movq 40(%rsp), %rdx
movl N(%rip), %esi
movq %rax, 176(%rsp)
movq %rcx, 168(%rsp)
movq %rdx, 160(%rsp)
movl %esi, 68(%rsp)
leaq 176(%rsp), %rax
movq %rax, 96(%rsp)
leaq 168(%rsp), %rax
movq %rax, 104(%rsp)
leaq 160(%rsp), %rax
movq %rax, 112(%rsp)
leaq 68(%rsp), %rax
movq %rax, 120(%rsp)
leaq 72(%rsp), %rdi
leaq 144(%rsp), %rsi
leaq 136(%rsp), %rdx
leaq 128(%rsp), %rcx
callq __hipPopCallConfiguration
movq 72(%rsp), %rsi
movl 80(%rsp), %edx
movq 144(%rsp), %rcx
movl 152(%rsp), %r8d
leaq 96(%rsp), %r9
movl $_Z14mul_matrix_gpuPdS_S_i, %edi
pushq 128(%rsp)
.cfi_adjust_cfa_offset 8
pushq 144(%rsp)
.cfi_adjust_cfa_offset 8
callq hipLaunchKernel
addq $16, %rsp
.cfi_adjust_cfa_offset -16
.LBB4_10:
movq 8(%rsp), %rdi
xorl %r12d, %r12d
xorl %esi, %esi
callq hipEventRecord
movq 8(%rsp), %rdi
callq hipEventSynchronize
movq 16(%rsp), %rsi
movq 8(%rsp), %rdx
leaq 96(%rsp), %rdi
callq hipEventElapsedTime
movq 16(%rsp), %rdi
callq hipEventDestroy
movq 8(%rsp), %rdi
callq hipEventDestroy
movl $.Lstr.22, %edi
callq puts@PLT
movss 96(%rsp), %xmm0 # xmm0 = mem[0],zero,zero,zero
cvtss2sd %xmm0, %xmm0
movl $.L.str.23, %edi
movb $1, %al
callq printf
movl $10, %edi
callq putchar@PLT
leaq 16(%rsp), %rdi
callq hipEventCreate
leaq 8(%rsp), %rdi
callq hipEventCreate
movq 16(%rsp), %rdi
xorl %esi, %esi
callq hipEventRecord
movq 40(%rsp), %rsi
movl N(%rip), %edx
imull %edx, %edx
shlq $3, %rdx
movq 88(%rsp), %rdi # 8-byte Reload
movl $2, %ecx
callq hipMemcpy
callq hipDeviceSynchronize
movq 8(%rsp), %rdi
xorl %esi, %esi
callq hipEventRecord
movq 8(%rsp), %rdi
callq hipEventSynchronize
movq 16(%rsp), %rsi
movq 8(%rsp), %rdx
leaq 72(%rsp), %rdi
callq hipEventElapsedTime
movq 16(%rsp), %rdi
callq hipEventDestroy
movq 8(%rsp), %rdi
callq hipEventDestroy
movss 72(%rsp), %xmm0 # xmm0 = mem[0],zero,zero,zero
addss 28(%rsp), %xmm0
movss %xmm0, 28(%rsp)
movl $.Lstr.23, %edi
callq puts@PLT
movss 28(%rsp), %xmm0 # xmm0 = mem[0],zero,zero,zero
cvtss2sd %xmm0, %xmm0
movl $.L.str.23, %edi
movb $1, %al
callq printf
movl $10, %edi
callq putchar@PLT
movss 32(%rsp), %xmm0 # 4-byte Reload
# xmm0 = mem[0],zero,zero,zero
divss 96(%rsp), %xmm0
movss %xmm0, 32(%rsp) # 4-byte Spill
movl $.Lstr.24, %edi
callq puts@PLT
movss 32(%rsp), %xmm0 # 4-byte Reload
# xmm0 = mem[0],zero,zero,zero
cvtss2sd %xmm0, %xmm0
movl $.L.str.23, %edi
movb $1, %al
callq printf
movl $10, %edi
callq putchar@PLT
movl $.Lstr.25, %edi
callq puts@PLT
movl $.Lstr.26, %edi
callq puts@PLT
movl N(%rip), %r13d
testl %r13d, %r13d
jle .LBB4_21
# %bb.11: # %.preheader47.lr.ph.i
movsd .LCPI4_4(%rip), %xmm2 # xmm2 = mem[0],zero
movsd .LCPI4_5(%rip), %xmm3 # xmm3 = mem[0],zero
xorl %ebp, %ebp
xorl %r10d, %r10d
jmp .LBB4_12
.p2align 4, 0x90
.LBB4_18: # in Loop: Header=BB4_12 Depth=1
movl $.Lstr, %edi
movq %r10, 32(%rsp) # 8-byte Spill
callq puts@PLT
movq 32(%rsp), %rax # 8-byte Reload
movsd .LCPI4_5(%rip), %xmm3 # xmm3 = mem[0],zero
movsd .LCPI4_4(%rip), %xmm2 # xmm2 = mem[0],zero
testb $1, %r15b
jne .LBB4_20
.LBB4_19: # %.critedge44.i
# in Loop: Header=BB4_12 Depth=1
incq %rbp
addl %r13d, %r12d
cmpq %r13, %rbp
setae %r10b
je .LBB4_21
.LBB4_12: # %.preheader47.i
# =>This Loop Header: Depth=1
# Child Loop BB4_14 Depth 2
# Child Loop BB4_15 Depth 3
movq %rbp, %rax
imulq %r13, %rax
movq 88(%rsp), %rcx # 8-byte Reload
leaq (%rcx,%rax,8), %rax
movb $1, %r15b
xorl %ecx, %ecx
xorl %edx, %edx
.p2align 4, 0x90
.LBB4_14: # %.preheader.i86
# Parent Loop BB4_12 Depth=1
# => This Loop Header: Depth=2
# Child Loop BB4_15 Depth 3
xorps %xmm0, %xmm0
movl %r12d, %esi
movl %ecx, %edi
movq %r13, %r8
.p2align 4, 0x90
.LBB4_15: # Parent Loop BB4_12 Depth=1
# Parent Loop BB4_14 Depth=2
# => This Inner Loop Header: Depth=3
movl %esi, %r9d
movsd (%rbx,%r9,8), %xmm1 # xmm1 = mem[0],zero
movl %edi, %r9d
mulsd (%r14,%r9,8), %xmm1
addsd %xmm1, %xmm0
addl %r13d, %edi
incl %esi
decq %r8
jne .LBB4_15
# %bb.16: # %.critedge.i
# in Loop: Header=BB4_14 Depth=2
movapd %xmm0, %xmm1
subsd (%rax,%rdx,8), %xmm1
divsd %xmm0, %xmm1
ucomisd %xmm2, %xmm1
jae .LBB4_18
# %bb.17: # %.critedge.i
# in Loop: Header=BB4_14 Depth=2
ucomisd %xmm1, %xmm3
jae .LBB4_18
# %bb.13: # in Loop: Header=BB4_14 Depth=2
incq %rdx
incl %ecx
cmpq %r13, %rdx
setb %r15b
jne .LBB4_14
jmp .LBB4_19
.LBB4_20:
testb $1, %al
je .LBB4_22
.LBB4_21: # %.critedge46.i
movl $.Lstr.1, %edi
callq puts@PLT
.LBB4_22: # %_Z6verifyPdS_S_i.exit
movq 56(%rsp), %rdi
callq hipFree
movq 48(%rsp), %rdi
callq hipFree
movq 40(%rsp), %rdi
callq hipFree
xorl %eax, %eax
addq $184, %rsp
.cfi_def_cfa_offset 56
popq %rbx
.cfi_def_cfa_offset 48
popq %r12
.cfi_def_cfa_offset 40
popq %r13
.cfi_def_cfa_offset 32
popq %r14
.cfi_def_cfa_offset 24
popq %r15
.cfi_def_cfa_offset 16
popq %rbp
.cfi_def_cfa_offset 8
retq
.LBB4_23:
.cfi_def_cfa_offset 240
movl $1, %edi
callq exit
.Lfunc_end4:
.size main, .Lfunc_end4-main
.cfi_endproc
# -- End function
.p2align 4, 0x90 # -- Begin function __hip_module_ctor
.type __hip_module_ctor,@function
__hip_module_ctor: # @__hip_module_ctor
.cfi_startproc
# %bb.0:
subq $40, %rsp
.cfi_def_cfa_offset 48
cmpq $0, __hip_gpubin_handle(%rip)
jne .LBB5_2
# %bb.1:
movl $__hip_fatbin_wrapper, %edi
callq __hipRegisterFatBinary
movq %rax, __hip_gpubin_handle(%rip)
.LBB5_2:
movq __hip_gpubin_handle(%rip), %rdi
xorps %xmm0, %xmm0
movups %xmm0, 16(%rsp)
movups %xmm0, (%rsp)
movl $_Z14mul_matrix_gpuPdS_S_i, %esi
movl $.L__unnamed_1, %edx
movl $.L__unnamed_1, %ecx
movl $-1, %r8d
xorl %r9d, %r9d
callq __hipRegisterFunction
movl $__hip_module_dtor, %edi
addq $40, %rsp
.cfi_def_cfa_offset 8
jmp atexit # TAILCALL
.Lfunc_end5:
.size __hip_module_ctor, .Lfunc_end5-__hip_module_ctor
.cfi_endproc
# -- End function
.p2align 4, 0x90 # -- Begin function __hip_module_dtor
.type __hip_module_dtor,@function
__hip_module_dtor: # @__hip_module_dtor
.cfi_startproc
# %bb.0:
movq __hip_gpubin_handle(%rip), %rdi
testq %rdi, %rdi
je .LBB6_2
# %bb.1:
pushq %rax
.cfi_def_cfa_offset 16
callq __hipUnregisterFatBinary
movq $0, __hip_gpubin_handle(%rip)
addq $8, %rsp
.cfi_def_cfa_offset 8
.LBB6_2:
retq
.Lfunc_end6:
.size __hip_module_dtor, .Lfunc_end6-__hip_module_dtor
.cfi_endproc
# -- End function
.type N,@object # @N
.bss
.globl N
.p2align 2, 0x0
N:
.long 0 # 0x0
.size N, 4
.type blocksize,@object # @blocksize
.globl blocksize
.p2align 2, 0x0
blocksize:
.long 0 # 0x0
.size blocksize, 4
.type _Z14mul_matrix_gpuPdS_S_i,@object # @_Z14mul_matrix_gpuPdS_S_i
.section .rodata,"a",@progbits
.globl _Z14mul_matrix_gpuPdS_S_i
.p2align 3, 0x0
_Z14mul_matrix_gpuPdS_S_i:
.quad _Z29__device_stub__mul_matrix_gpuPdS_S_i
.size _Z14mul_matrix_gpuPdS_S_i, 8
.type .L.str.2,@object # @.str.2
.section .rodata.str1.1,"aMS",@progbits,1
.L.str.2:
.asciz "%f\t"
.size .L.str.2, 4
.type .L.str.12,@object # @.str.12
.L.str.12:
.asciz "%c"
.size .L.str.12, 3
.type .L.str.23,@object # @.str.23
.L.str.23:
.asciz "%f \t"
.size .L.str.23, 5
.type .L.str.24,@object # @.str.24
.L.str.24:
.asciz "Block size and tile width for the program is %d\n "
.size .L.str.24, 50
.type .L__unnamed_1,@object # @0
.L__unnamed_1:
.asciz "_Z14mul_matrix_gpuPdS_S_i"
.size .L__unnamed_1, 26
.type __hip_fatbin_wrapper,@object # @__hip_fatbin_wrapper
.section .hipFatBinSegment,"a",@progbits
.p2align 3, 0x0
__hip_fatbin_wrapper:
.long 1212764230 # 0x48495046
.long 1 # 0x1
.quad __hip_fatbin
.quad 0
.size __hip_fatbin_wrapper, 24
.type __hip_gpubin_handle,@object # @__hip_gpubin_handle
.local __hip_gpubin_handle
.comm __hip_gpubin_handle,8,8
.section .init_array,"aw",@init_array
.p2align 3, 0x0
.quad __hip_module_ctor
.type __hip_cuid_,@object # @__hip_cuid_
.bss
.globl __hip_cuid_
__hip_cuid_:
.byte 0 # 0x0
.size __hip_cuid_, 1
.type .Lstr,@object # @str
.section .rodata.str1.1,"aMS",@progbits,1
.Lstr:
.asciz "TEST FAILED\n"
.size .Lstr, 13
.type .Lstr.1,@object # @str.1
.Lstr.1:
.asciz "TEST PASSED\n"
.size .Lstr.1, 13
.type .Lstr.2,@object # @str.2
.Lstr.2:
.asciz "Select one of the following options: "
.size .Lstr.2, 38
.type .Lstr.3,@object # @str.3
.Lstr.3:
.asciz "Press a for matrix size 8 * 8 "
.size .Lstr.3, 31
.type .Lstr.4,@object # @str.4
.Lstr.4:
.asciz "Press b for matrix size 64 * 64 "
.size .Lstr.4, 33
.type .Lstr.5,@object # @str.5
.Lstr.5:
.asciz "Press c for matrix size 128 * 128 "
.size .Lstr.5, 35
.type .Lstr.6,@object # @str.6
.Lstr.6:
.asciz "Press d for matrix size 512 * 512 "
.size .Lstr.6, 35
.type .Lstr.7,@object # @str.7
.Lstr.7:
.asciz "Press e for matrix size 1024 * 1024 "
.size .Lstr.7, 37
.type .Lstr.8,@object # @str.8
.Lstr.8:
.asciz "Press f for matrix size 4096 * 4096 "
.size .Lstr.8, 37
.type .Lstr.9,@object # @str.9
.Lstr.9:
.asciz "Press any other key for exit "
.size .Lstr.9, 30
.type .Lstr.10,@object # @str.10
.Lstr.10:
.asciz "Matrix size is 4096 * 4096 "
.size .Lstr.10, 28
.type .Lstr.11,@object # @str.11
.Lstr.11:
.asciz "Matrix size is 1024 * 1024 "
.size .Lstr.11, 28
.type .Lstr.12,@object # @str.12
.Lstr.12:
.asciz "Matrix size is 512 * 512 "
.size .Lstr.12, 26
.type .Lstr.13,@object # @str.13
.Lstr.13:
.asciz "Matrix size is 128 * 128 "
.size .Lstr.13, 26
.type .Lstr.14,@object # @str.14
.Lstr.14:
.asciz "Matrix size is 64 * 64 "
.size .Lstr.14, 24
.type .Lstr.15,@object # @str.15
.Lstr.15:
.asciz "Matrix size is 8 * 8 "
.size .Lstr.15, 22
.type .Lstr.16,@object # @str.16
.Lstr.16:
.asciz "memory was not allocated on device "
.size .Lstr.16, 36
.type .Lstr.17,@object # @str.17
.Lstr.17:
.asciz "Calculating results for CPU vector multiplication "
.size .Lstr.17, 51
.type .Lstr.19,@object # @str.19
.Lstr.19:
.asciz "CPU computation time (milliseconds) "
.size .Lstr.19, 37
.type .Lstr.20,@object # @str.20
.Lstr.20:
.asciz "Calling kernel for gpu computations for vector multiplication and calculating results"
.size .Lstr.20, 86
.type .Lstr.22,@object # @str.22
.Lstr.22:
.asciz "GPU computation time (milliseconds) "
.size .Lstr.22, 37
.type .Lstr.23,@object # @str.23
.Lstr.23:
.asciz "Total Memory transfer time between CPU and GPU (milliseconds)"
.size .Lstr.23, 62
.type .Lstr.24,@object # @str.24
.Lstr.24:
.asciz "Speedup: "
.size .Lstr.24, 10
.type .Lstr.25,@object # @str.25
.Lstr.25:
.asciz "Comparing results for CPU and GPU computations "
.size .Lstr.25, 48
.type .Lstr.26,@object # @str.26
.Lstr.26:
.asciz "---------"
.size .Lstr.26, 10
.type .Lswitch.table.main.27,@object # @switch.table.main.27
.section .rodata,"a",@progbits
.p2align 3, 0x0
.Lswitch.table.main.27:
.quad .Lstr.15
.quad .Lstr.14
.quad .Lstr.13
.quad .Lstr.12
.quad .Lstr.11
.quad .Lstr.10
.size .Lswitch.table.main.27, 48
.type .Lswitch.table.main.28,@object # @switch.table.main.28
.p2align 2, 0x0
.Lswitch.table.main.28:
.long 8 # 0x8
.long 64 # 0x40
.long 128 # 0x80
.long 512 # 0x200
.long 1024 # 0x400
.long 4096 # 0x1000
.size .Lswitch.table.main.28, 24
.section ".linker-options","e",@llvm_linker_options
.ident "AMD clang version 18.0.0git (https://github.com/RadeonOpenCompute/llvm-project roc-6.3.2 25012 e5bf7e55c91490b07c49d8960fa7983d864936c4)"
.section ".note.GNU-stack","",@progbits
.addrsig
.addrsig_sym _Z29__device_stub__mul_matrix_gpuPdS_S_i
.addrsig_sym __hip_module_ctor
.addrsig_sym __hip_module_dtor
.addrsig_sym _Z14mul_matrix_gpuPdS_S_i
.addrsig_sym __hip_fatbin
.addrsig_sym __hip_fatbin_wrapper
.addrsig_sym __hip_cuid_ |
You are a helpful coding assistant specialized in converting CUDA source code to CUDA host assembly. | #include "includes.h"
__device__ float fitness_function(float x[])
{
float y,yp;
float res=0;
float y1=1+(x[0]-1)/4;
float yn=1+(x[NUM_OF_DIMENSIONS-1]-1)/4;
res+=pow(sin(phi*y1),2)+pow(yn-1,2);
for(int i=0;i<NUM_OF_DIMENSIONS-1;i++)
{
y=1+(x[i]-1)/4;
yp=1+(x[i+1]-1)/4;
res+=pow(y-1,2)*(1+10*pow(sin(phi*yp),2));
}
return res;
}
__global__ void kernelUpdatePBest(float *positions,float *pBests,float *gBest)
{
int i=blockIdx.x*blockDim.x+threadIdx.x;
if(i>=NUM_OF_PARTICLES*NUM_OF_DIMENSIONS||i%NUM_OF_DIMENSIONS!=0)
return;
float tempParticle1[NUM_OF_DIMENSIONS];
float tempParticle2[NUM_OF_DIMENSIONS];
for(int j=0;j<NUM_OF_DIMENSIONS;j++)
{
tempParticle1[j]=positions[i+j];
tempParticle2[j]=pBests[i+j];
}
if(fitness_function(tempParticle1)<fitness_function(tempParticle2))
{
for(int j=0;j<NUM_OF_DIMENSIONS;j++)
pBests[i+j]=tempParticle1[j];
if(fitness_function(tempParticle1)<fitness_function(gBest))
{
for(int j=0;j<NUM_OF_DIMENSIONS;j++)
atomicExch(gBest+j,tempParticle1[j]);
}
}
} | .file "tmpxft_0012a161_00000000-6_kernelUpdatePBest.cudafe1.cpp"
.text
#APP
#NO_APP
.type _ZL26__cudaUnregisterBinaryUtilv, @function
_ZL26__cudaUnregisterBinaryUtilv:
.LFB2030:
.cfi_startproc
endbr64
subq $8, %rsp
.cfi_def_cfa_offset 16
movq _ZL20__cudaFatCubinHandle(%rip), %rdi
call __cudaUnregisterFatBinary@PLT
addq $8, %rsp
.cfi_def_cfa_offset 8
ret
.cfi_endproc
.LFE2030:
.size _ZL26__cudaUnregisterBinaryUtilv, .-_ZL26__cudaUnregisterBinaryUtilv
.globl _Z16fitness_functionPf
.type _Z16fitness_functionPf, @function
_Z16fitness_functionPf:
.LFB2027:
.cfi_startproc
endbr64
pushq %rax
.cfi_def_cfa_offset 16
popq %rax
.cfi_def_cfa_offset 8
subq $24, %rsp
.cfi_def_cfa_offset 32
movl $1, 12(%rsp)
movl 12(%rsp), %edi
call exit@PLT
.cfi_endproc
.LFE2027:
.size _Z16fitness_functionPf, .-_Z16fitness_functionPf
.globl _Z41__device_stub__Z17kernelUpdatePBestPfS_S_PfS_S_
.type _Z41__device_stub__Z17kernelUpdatePBestPfS_S_PfS_S_, @function
_Z41__device_stub__Z17kernelUpdatePBestPfS_S_PfS_S_:
.LFB2052:
.cfi_startproc
endbr64
subq $136, %rsp
.cfi_def_cfa_offset 144
movq %rdi, 24(%rsp)
movq %rsi, 16(%rsp)
movq %rdx, 8(%rsp)
movq %fs:40, %rax
movq %rax, 120(%rsp)
xorl %eax, %eax
leaq 24(%rsp), %rax
movq %rax, 96(%rsp)
leaq 16(%rsp), %rax
movq %rax, 104(%rsp)
leaq 8(%rsp), %rax
movq %rax, 112(%rsp)
movl $1, 48(%rsp)
movl $1, 52(%rsp)
movl $1, 56(%rsp)
movl $1, 60(%rsp)
movl $1, 64(%rsp)
movl $1, 68(%rsp)
leaq 40(%rsp), %rcx
leaq 32(%rsp), %rdx
leaq 60(%rsp), %rsi
leaq 48(%rsp), %rdi
call __cudaPopCallConfiguration@PLT
testl %eax, %eax
je .L9
.L5:
movq 120(%rsp), %rax
subq %fs:40, %rax
jne .L10
addq $136, %rsp
.cfi_remember_state
.cfi_def_cfa_offset 8
ret
.L9:
.cfi_restore_state
pushq 40(%rsp)
.cfi_def_cfa_offset 152
pushq 40(%rsp)
.cfi_def_cfa_offset 160
leaq 112(%rsp), %r9
movq 76(%rsp), %rcx
movl 84(%rsp), %r8d
movq 64(%rsp), %rsi
movl 72(%rsp), %edx
leaq _Z17kernelUpdatePBestPfS_S_(%rip), %rdi
call cudaLaunchKernel@PLT
addq $16, %rsp
.cfi_def_cfa_offset 144
jmp .L5
.L10:
call __stack_chk_fail@PLT
.cfi_endproc
.LFE2052:
.size _Z41__device_stub__Z17kernelUpdatePBestPfS_S_PfS_S_, .-_Z41__device_stub__Z17kernelUpdatePBestPfS_S_PfS_S_
.globl _Z17kernelUpdatePBestPfS_S_
.type _Z17kernelUpdatePBestPfS_S_, @function
_Z17kernelUpdatePBestPfS_S_:
.LFB2053:
.cfi_startproc
endbr64
subq $8, %rsp
.cfi_def_cfa_offset 16
call _Z41__device_stub__Z17kernelUpdatePBestPfS_S_PfS_S_
addq $8, %rsp
.cfi_def_cfa_offset 8
ret
.cfi_endproc
.LFE2053:
.size _Z17kernelUpdatePBestPfS_S_, .-_Z17kernelUpdatePBestPfS_S_
.section .rodata.str1.1,"aMS",@progbits,1
.LC0:
.string "_Z17kernelUpdatePBestPfS_S_"
.text
.type _ZL24__sti____cudaRegisterAllv, @function
_ZL24__sti____cudaRegisterAllv:
.LFB2055:
.cfi_startproc
endbr64
subq $8, %rsp
.cfi_def_cfa_offset 16
leaq _ZL15__fatDeviceText(%rip), %rdi
call __cudaRegisterFatBinary@PLT
movq %rax, %rdi
movq %rax, _ZL20__cudaFatCubinHandle(%rip)
pushq $0
.cfi_def_cfa_offset 24
pushq $0
.cfi_def_cfa_offset 32
pushq $0
.cfi_def_cfa_offset 40
pushq $0
.cfi_def_cfa_offset 48
movl $0, %r9d
movl $-1, %r8d
leaq .LC0(%rip), %rdx
movq %rdx, %rcx
leaq _Z17kernelUpdatePBestPfS_S_(%rip), %rsi
call __cudaRegisterFunction@PLT
addq $32, %rsp
.cfi_def_cfa_offset 16
movq _ZL20__cudaFatCubinHandle(%rip), %rdi
call __cudaRegisterFatBinaryEnd@PLT
leaq _ZL26__cudaUnregisterBinaryUtilv(%rip), %rdi
call atexit@PLT
addq $8, %rsp
.cfi_def_cfa_offset 8
ret
.cfi_endproc
.LFE2055:
.size _ZL24__sti____cudaRegisterAllv, .-_ZL24__sti____cudaRegisterAllv
.section .init_array,"aw"
.align 8
.quad _ZL24__sti____cudaRegisterAllv
.section .nvFatBinSegment,"aw"
.align 8
.type _ZL15__fatDeviceText, @object
.size _ZL15__fatDeviceText, 24
_ZL15__fatDeviceText:
.long 1180844977
.long 1
.quad fatbinData
.quad 0
.local _ZL20__cudaFatCubinHandle
.comm _ZL20__cudaFatCubinHandle,8,8
.ident "GCC: (Ubuntu 13.3.0-6ubuntu2~24.04) 13.3.0"
.section .note.GNU-stack,"",@progbits
.section .note.gnu.property,"a"
.align 8
.long 1f - 0f
.long 4f - 1f
.long 5
0:
.string "GNU"
1:
.align 8
.long 0xc0000002
.long 3f - 2f
2:
.long 0x3
3:
.align 8
4: |
You are a helpful coding assistant specialized in converting CUDA source code to HIP/AMD source code. | #include "includes.h"
__device__ float fitness_function(float x[])
{
float y,yp;
float res=0;
float y1=1+(x[0]-1)/4;
float yn=1+(x[NUM_OF_DIMENSIONS-1]-1)/4;
res+=pow(sin(phi*y1),2)+pow(yn-1,2);
for(int i=0;i<NUM_OF_DIMENSIONS-1;i++)
{
y=1+(x[i]-1)/4;
yp=1+(x[i+1]-1)/4;
res+=pow(y-1,2)*(1+10*pow(sin(phi*yp),2));
}
return res;
}
__global__ void kernelUpdatePBest(float *positions,float *pBests,float *gBest)
{
int i=blockIdx.x*blockDim.x+threadIdx.x;
if(i>=NUM_OF_PARTICLES*NUM_OF_DIMENSIONS||i%NUM_OF_DIMENSIONS!=0)
return;
float tempParticle1[NUM_OF_DIMENSIONS];
float tempParticle2[NUM_OF_DIMENSIONS];
for(int j=0;j<NUM_OF_DIMENSIONS;j++)
{
tempParticle1[j]=positions[i+j];
tempParticle2[j]=pBests[i+j];
}
if(fitness_function(tempParticle1)<fitness_function(tempParticle2))
{
for(int j=0;j<NUM_OF_DIMENSIONS;j++)
pBests[i+j]=tempParticle1[j];
if(fitness_function(tempParticle1)<fitness_function(gBest))
{
for(int j=0;j<NUM_OF_DIMENSIONS;j++)
atomicExch(gBest+j,tempParticle1[j]);
}
}
} | #include <hip/hip_runtime.h>
#include "includes.h"
__device__ float fitness_function(float x[])
{
float y,yp;
float res=0;
float y1=1+(x[0]-1)/4;
float yn=1+(x[NUM_OF_DIMENSIONS-1]-1)/4;
res+=pow(sin(phi*y1),2)+pow(yn-1,2);
for(int i=0;i<NUM_OF_DIMENSIONS-1;i++)
{
y=1+(x[i]-1)/4;
yp=1+(x[i+1]-1)/4;
res+=pow(y-1,2)*(1+10*pow(sin(phi*yp),2));
}
return res;
}
__global__ void kernelUpdatePBest(float *positions,float *pBests,float *gBest)
{
int i=blockIdx.x*blockDim.x+threadIdx.x;
if(i>=NUM_OF_PARTICLES*NUM_OF_DIMENSIONS||i%NUM_OF_DIMENSIONS!=0)
return;
float tempParticle1[NUM_OF_DIMENSIONS];
float tempParticle2[NUM_OF_DIMENSIONS];
for(int j=0;j<NUM_OF_DIMENSIONS;j++)
{
tempParticle1[j]=positions[i+j];
tempParticle2[j]=pBests[i+j];
}
if(fitness_function(tempParticle1)<fitness_function(tempParticle2))
{
for(int j=0;j<NUM_OF_DIMENSIONS;j++)
pBests[i+j]=tempParticle1[j];
if(fitness_function(tempParticle1)<fitness_function(gBest))
{
for(int j=0;j<NUM_OF_DIMENSIONS;j++)
atomicExch(gBest+j,tempParticle1[j]);
}
}
} |
You are a helpful coding assistant specialized in converting HIP source code to AMD host assembly. | #include <hip/hip_runtime.h>
#include "includes.h"
__device__ float fitness_function(float x[])
{
float y,yp;
float res=0;
float y1=1+(x[0]-1)/4;
float yn=1+(x[NUM_OF_DIMENSIONS-1]-1)/4;
res+=pow(sin(phi*y1),2)+pow(yn-1,2);
for(int i=0;i<NUM_OF_DIMENSIONS-1;i++)
{
y=1+(x[i]-1)/4;
yp=1+(x[i+1]-1)/4;
res+=pow(y-1,2)*(1+10*pow(sin(phi*yp),2));
}
return res;
}
__global__ void kernelUpdatePBest(float *positions,float *pBests,float *gBest)
{
int i=blockIdx.x*blockDim.x+threadIdx.x;
if(i>=NUM_OF_PARTICLES*NUM_OF_DIMENSIONS||i%NUM_OF_DIMENSIONS!=0)
return;
float tempParticle1[NUM_OF_DIMENSIONS];
float tempParticle2[NUM_OF_DIMENSIONS];
for(int j=0;j<NUM_OF_DIMENSIONS;j++)
{
tempParticle1[j]=positions[i+j];
tempParticle2[j]=pBests[i+j];
}
if(fitness_function(tempParticle1)<fitness_function(tempParticle2))
{
for(int j=0;j<NUM_OF_DIMENSIONS;j++)
pBests[i+j]=tempParticle1[j];
if(fitness_function(tempParticle1)<fitness_function(gBest))
{
for(int j=0;j<NUM_OF_DIMENSIONS;j++)
atomicExch(gBest+j,tempParticle1[j]);
}
}
} | .text
.file "kernelUpdatePBest.hip"
.globl _Z32__device_stub__kernelUpdatePBestPfS_S_ # -- Begin function _Z32__device_stub__kernelUpdatePBestPfS_S_
.p2align 4, 0x90
.type _Z32__device_stub__kernelUpdatePBestPfS_S_,@function
_Z32__device_stub__kernelUpdatePBestPfS_S_: # @_Z32__device_stub__kernelUpdatePBestPfS_S_
.cfi_startproc
# %bb.0:
subq $104, %rsp
.cfi_def_cfa_offset 112
movq %rdi, 72(%rsp)
movq %rsi, 64(%rsp)
movq %rdx, 56(%rsp)
leaq 72(%rsp), %rax
movq %rax, 80(%rsp)
leaq 64(%rsp), %rax
movq %rax, 88(%rsp)
leaq 56(%rsp), %rax
movq %rax, 96(%rsp)
leaq 40(%rsp), %rdi
leaq 24(%rsp), %rsi
leaq 16(%rsp), %rdx
leaq 8(%rsp), %rcx
callq __hipPopCallConfiguration
movq 40(%rsp), %rsi
movl 48(%rsp), %edx
movq 24(%rsp), %rcx
movl 32(%rsp), %r8d
leaq 80(%rsp), %r9
movl $_Z17kernelUpdatePBestPfS_S_, %edi
pushq 8(%rsp)
.cfi_adjust_cfa_offset 8
pushq 24(%rsp)
.cfi_adjust_cfa_offset 8
callq hipLaunchKernel
addq $120, %rsp
.cfi_adjust_cfa_offset -120
retq
.Lfunc_end0:
.size _Z32__device_stub__kernelUpdatePBestPfS_S_, .Lfunc_end0-_Z32__device_stub__kernelUpdatePBestPfS_S_
.cfi_endproc
# -- End function
.p2align 4, 0x90 # -- Begin function __hip_module_ctor
.type __hip_module_ctor,@function
__hip_module_ctor: # @__hip_module_ctor
.cfi_startproc
# %bb.0:
subq $40, %rsp
.cfi_def_cfa_offset 48
cmpq $0, __hip_gpubin_handle(%rip)
jne .LBB1_2
# %bb.1:
movl $__hip_fatbin_wrapper, %edi
callq __hipRegisterFatBinary
movq %rax, __hip_gpubin_handle(%rip)
.LBB1_2:
movq __hip_gpubin_handle(%rip), %rdi
xorps %xmm0, %xmm0
movups %xmm0, 16(%rsp)
movups %xmm0, (%rsp)
movl $_Z17kernelUpdatePBestPfS_S_, %esi
movl $.L__unnamed_1, %edx
movl $.L__unnamed_1, %ecx
movl $-1, %r8d
xorl %r9d, %r9d
callq __hipRegisterFunction
movl $__hip_module_dtor, %edi
addq $40, %rsp
.cfi_def_cfa_offset 8
jmp atexit # TAILCALL
.Lfunc_end1:
.size __hip_module_ctor, .Lfunc_end1-__hip_module_ctor
.cfi_endproc
# -- End function
.p2align 4, 0x90 # -- Begin function __hip_module_dtor
.type __hip_module_dtor,@function
__hip_module_dtor: # @__hip_module_dtor
.cfi_startproc
# %bb.0:
movq __hip_gpubin_handle(%rip), %rdi
testq %rdi, %rdi
je .LBB2_2
# %bb.1:
pushq %rax
.cfi_def_cfa_offset 16
callq __hipUnregisterFatBinary
movq $0, __hip_gpubin_handle(%rip)
addq $8, %rsp
.cfi_def_cfa_offset 8
.LBB2_2:
retq
.Lfunc_end2:
.size __hip_module_dtor, .Lfunc_end2-__hip_module_dtor
.cfi_endproc
# -- End function
.type _Z17kernelUpdatePBestPfS_S_,@object # @_Z17kernelUpdatePBestPfS_S_
.section .rodata,"a",@progbits
.globl _Z17kernelUpdatePBestPfS_S_
.p2align 3, 0x0
_Z17kernelUpdatePBestPfS_S_:
.quad _Z32__device_stub__kernelUpdatePBestPfS_S_
.size _Z17kernelUpdatePBestPfS_S_, 8
.type .L__unnamed_1,@object # @0
.section .rodata.str1.1,"aMS",@progbits,1
.L__unnamed_1:
.asciz "_Z17kernelUpdatePBestPfS_S_"
.size .L__unnamed_1, 28
.type __hip_fatbin_wrapper,@object # @__hip_fatbin_wrapper
.section .hipFatBinSegment,"a",@progbits
.p2align 3, 0x0
__hip_fatbin_wrapper:
.long 1212764230 # 0x48495046
.long 1 # 0x1
.quad __hip_fatbin
.quad 0
.size __hip_fatbin_wrapper, 24
.type __hip_gpubin_handle,@object # @__hip_gpubin_handle
.local __hip_gpubin_handle
.comm __hip_gpubin_handle,8,8
.section .init_array,"aw",@init_array
.p2align 3, 0x0
.quad __hip_module_ctor
.type __hip_cuid_,@object # @__hip_cuid_
.bss
.globl __hip_cuid_
__hip_cuid_:
.byte 0 # 0x0
.size __hip_cuid_, 1
.section ".linker-options","e",@llvm_linker_options
.ident "AMD clang version 18.0.0git (https://github.com/RadeonOpenCompute/llvm-project roc-6.3.2 25012 e5bf7e55c91490b07c49d8960fa7983d864936c4)"
.section ".note.GNU-stack","",@progbits
.addrsig
.addrsig_sym _Z32__device_stub__kernelUpdatePBestPfS_S_
.addrsig_sym __hip_module_ctor
.addrsig_sym __hip_module_dtor
.addrsig_sym _Z17kernelUpdatePBestPfS_S_
.addrsig_sym __hip_fatbin
.addrsig_sym __hip_fatbin_wrapper
.addrsig_sym __hip_cuid_ |
You are a helpful coding assistant specialized in converting from CUDA host assembly to AMD host assembly. | .file "tmpxft_0012a161_00000000-6_kernelUpdatePBest.cudafe1.cpp"
.text
#APP
#NO_APP
.type _ZL26__cudaUnregisterBinaryUtilv, @function
_ZL26__cudaUnregisterBinaryUtilv:
.LFB2030:
.cfi_startproc
endbr64
subq $8, %rsp
.cfi_def_cfa_offset 16
movq _ZL20__cudaFatCubinHandle(%rip), %rdi
call __cudaUnregisterFatBinary@PLT
addq $8, %rsp
.cfi_def_cfa_offset 8
ret
.cfi_endproc
.LFE2030:
.size _ZL26__cudaUnregisterBinaryUtilv, .-_ZL26__cudaUnregisterBinaryUtilv
.globl _Z16fitness_functionPf
.type _Z16fitness_functionPf, @function
_Z16fitness_functionPf:
.LFB2027:
.cfi_startproc
endbr64
pushq %rax
.cfi_def_cfa_offset 16
popq %rax
.cfi_def_cfa_offset 8
subq $24, %rsp
.cfi_def_cfa_offset 32
movl $1, 12(%rsp)
movl 12(%rsp), %edi
call exit@PLT
.cfi_endproc
.LFE2027:
.size _Z16fitness_functionPf, .-_Z16fitness_functionPf
.globl _Z41__device_stub__Z17kernelUpdatePBestPfS_S_PfS_S_
.type _Z41__device_stub__Z17kernelUpdatePBestPfS_S_PfS_S_, @function
_Z41__device_stub__Z17kernelUpdatePBestPfS_S_PfS_S_:
.LFB2052:
.cfi_startproc
endbr64
subq $136, %rsp
.cfi_def_cfa_offset 144
movq %rdi, 24(%rsp)
movq %rsi, 16(%rsp)
movq %rdx, 8(%rsp)
movq %fs:40, %rax
movq %rax, 120(%rsp)
xorl %eax, %eax
leaq 24(%rsp), %rax
movq %rax, 96(%rsp)
leaq 16(%rsp), %rax
movq %rax, 104(%rsp)
leaq 8(%rsp), %rax
movq %rax, 112(%rsp)
movl $1, 48(%rsp)
movl $1, 52(%rsp)
movl $1, 56(%rsp)
movl $1, 60(%rsp)
movl $1, 64(%rsp)
movl $1, 68(%rsp)
leaq 40(%rsp), %rcx
leaq 32(%rsp), %rdx
leaq 60(%rsp), %rsi
leaq 48(%rsp), %rdi
call __cudaPopCallConfiguration@PLT
testl %eax, %eax
je .L9
.L5:
movq 120(%rsp), %rax
subq %fs:40, %rax
jne .L10
addq $136, %rsp
.cfi_remember_state
.cfi_def_cfa_offset 8
ret
.L9:
.cfi_restore_state
pushq 40(%rsp)
.cfi_def_cfa_offset 152
pushq 40(%rsp)
.cfi_def_cfa_offset 160
leaq 112(%rsp), %r9
movq 76(%rsp), %rcx
movl 84(%rsp), %r8d
movq 64(%rsp), %rsi
movl 72(%rsp), %edx
leaq _Z17kernelUpdatePBestPfS_S_(%rip), %rdi
call cudaLaunchKernel@PLT
addq $16, %rsp
.cfi_def_cfa_offset 144
jmp .L5
.L10:
call __stack_chk_fail@PLT
.cfi_endproc
.LFE2052:
.size _Z41__device_stub__Z17kernelUpdatePBestPfS_S_PfS_S_, .-_Z41__device_stub__Z17kernelUpdatePBestPfS_S_PfS_S_
.globl _Z17kernelUpdatePBestPfS_S_
.type _Z17kernelUpdatePBestPfS_S_, @function
_Z17kernelUpdatePBestPfS_S_:
.LFB2053:
.cfi_startproc
endbr64
subq $8, %rsp
.cfi_def_cfa_offset 16
call _Z41__device_stub__Z17kernelUpdatePBestPfS_S_PfS_S_
addq $8, %rsp
.cfi_def_cfa_offset 8
ret
.cfi_endproc
.LFE2053:
.size _Z17kernelUpdatePBestPfS_S_, .-_Z17kernelUpdatePBestPfS_S_
.section .rodata.str1.1,"aMS",@progbits,1
.LC0:
.string "_Z17kernelUpdatePBestPfS_S_"
.text
.type _ZL24__sti____cudaRegisterAllv, @function
_ZL24__sti____cudaRegisterAllv:
.LFB2055:
.cfi_startproc
endbr64
subq $8, %rsp
.cfi_def_cfa_offset 16
leaq _ZL15__fatDeviceText(%rip), %rdi
call __cudaRegisterFatBinary@PLT
movq %rax, %rdi
movq %rax, _ZL20__cudaFatCubinHandle(%rip)
pushq $0
.cfi_def_cfa_offset 24
pushq $0
.cfi_def_cfa_offset 32
pushq $0
.cfi_def_cfa_offset 40
pushq $0
.cfi_def_cfa_offset 48
movl $0, %r9d
movl $-1, %r8d
leaq .LC0(%rip), %rdx
movq %rdx, %rcx
leaq _Z17kernelUpdatePBestPfS_S_(%rip), %rsi
call __cudaRegisterFunction@PLT
addq $32, %rsp
.cfi_def_cfa_offset 16
movq _ZL20__cudaFatCubinHandle(%rip), %rdi
call __cudaRegisterFatBinaryEnd@PLT
leaq _ZL26__cudaUnregisterBinaryUtilv(%rip), %rdi
call atexit@PLT
addq $8, %rsp
.cfi_def_cfa_offset 8
ret
.cfi_endproc
.LFE2055:
.size _ZL24__sti____cudaRegisterAllv, .-_ZL24__sti____cudaRegisterAllv
.section .init_array,"aw"
.align 8
.quad _ZL24__sti____cudaRegisterAllv
.section .nvFatBinSegment,"aw"
.align 8
.type _ZL15__fatDeviceText, @object
.size _ZL15__fatDeviceText, 24
_ZL15__fatDeviceText:
.long 1180844977
.long 1
.quad fatbinData
.quad 0
.local _ZL20__cudaFatCubinHandle
.comm _ZL20__cudaFatCubinHandle,8,8
.ident "GCC: (Ubuntu 13.3.0-6ubuntu2~24.04) 13.3.0"
.section .note.GNU-stack,"",@progbits
.section .note.gnu.property,"a"
.align 8
.long 1f - 0f
.long 4f - 1f
.long 5
0:
.string "GNU"
1:
.align 8
.long 0xc0000002
.long 3f - 2f
2:
.long 0x3
3:
.align 8
4: | .text
.file "kernelUpdatePBest.hip"
.globl _Z32__device_stub__kernelUpdatePBestPfS_S_ # -- Begin function _Z32__device_stub__kernelUpdatePBestPfS_S_
.p2align 4, 0x90
.type _Z32__device_stub__kernelUpdatePBestPfS_S_,@function
_Z32__device_stub__kernelUpdatePBestPfS_S_: # @_Z32__device_stub__kernelUpdatePBestPfS_S_
.cfi_startproc
# %bb.0:
subq $104, %rsp
.cfi_def_cfa_offset 112
movq %rdi, 72(%rsp)
movq %rsi, 64(%rsp)
movq %rdx, 56(%rsp)
leaq 72(%rsp), %rax
movq %rax, 80(%rsp)
leaq 64(%rsp), %rax
movq %rax, 88(%rsp)
leaq 56(%rsp), %rax
movq %rax, 96(%rsp)
leaq 40(%rsp), %rdi
leaq 24(%rsp), %rsi
leaq 16(%rsp), %rdx
leaq 8(%rsp), %rcx
callq __hipPopCallConfiguration
movq 40(%rsp), %rsi
movl 48(%rsp), %edx
movq 24(%rsp), %rcx
movl 32(%rsp), %r8d
leaq 80(%rsp), %r9
movl $_Z17kernelUpdatePBestPfS_S_, %edi
pushq 8(%rsp)
.cfi_adjust_cfa_offset 8
pushq 24(%rsp)
.cfi_adjust_cfa_offset 8
callq hipLaunchKernel
addq $120, %rsp
.cfi_adjust_cfa_offset -120
retq
.Lfunc_end0:
.size _Z32__device_stub__kernelUpdatePBestPfS_S_, .Lfunc_end0-_Z32__device_stub__kernelUpdatePBestPfS_S_
.cfi_endproc
# -- End function
.p2align 4, 0x90 # -- Begin function __hip_module_ctor
.type __hip_module_ctor,@function
__hip_module_ctor: # @__hip_module_ctor
.cfi_startproc
# %bb.0:
subq $40, %rsp
.cfi_def_cfa_offset 48
cmpq $0, __hip_gpubin_handle(%rip)
jne .LBB1_2
# %bb.1:
movl $__hip_fatbin_wrapper, %edi
callq __hipRegisterFatBinary
movq %rax, __hip_gpubin_handle(%rip)
.LBB1_2:
movq __hip_gpubin_handle(%rip), %rdi
xorps %xmm0, %xmm0
movups %xmm0, 16(%rsp)
movups %xmm0, (%rsp)
movl $_Z17kernelUpdatePBestPfS_S_, %esi
movl $.L__unnamed_1, %edx
movl $.L__unnamed_1, %ecx
movl $-1, %r8d
xorl %r9d, %r9d
callq __hipRegisterFunction
movl $__hip_module_dtor, %edi
addq $40, %rsp
.cfi_def_cfa_offset 8
jmp atexit # TAILCALL
.Lfunc_end1:
.size __hip_module_ctor, .Lfunc_end1-__hip_module_ctor
.cfi_endproc
# -- End function
.p2align 4, 0x90 # -- Begin function __hip_module_dtor
.type __hip_module_dtor,@function
__hip_module_dtor: # @__hip_module_dtor
.cfi_startproc
# %bb.0:
movq __hip_gpubin_handle(%rip), %rdi
testq %rdi, %rdi
je .LBB2_2
# %bb.1:
pushq %rax
.cfi_def_cfa_offset 16
callq __hipUnregisterFatBinary
movq $0, __hip_gpubin_handle(%rip)
addq $8, %rsp
.cfi_def_cfa_offset 8
.LBB2_2:
retq
.Lfunc_end2:
.size __hip_module_dtor, .Lfunc_end2-__hip_module_dtor
.cfi_endproc
# -- End function
.type _Z17kernelUpdatePBestPfS_S_,@object # @_Z17kernelUpdatePBestPfS_S_
.section .rodata,"a",@progbits
.globl _Z17kernelUpdatePBestPfS_S_
.p2align 3, 0x0
_Z17kernelUpdatePBestPfS_S_:
.quad _Z32__device_stub__kernelUpdatePBestPfS_S_
.size _Z17kernelUpdatePBestPfS_S_, 8
.type .L__unnamed_1,@object # @0
.section .rodata.str1.1,"aMS",@progbits,1
.L__unnamed_1:
.asciz "_Z17kernelUpdatePBestPfS_S_"
.size .L__unnamed_1, 28
.type __hip_fatbin_wrapper,@object # @__hip_fatbin_wrapper
.section .hipFatBinSegment,"a",@progbits
.p2align 3, 0x0
__hip_fatbin_wrapper:
.long 1212764230 # 0x48495046
.long 1 # 0x1
.quad __hip_fatbin
.quad 0
.size __hip_fatbin_wrapper, 24
.type __hip_gpubin_handle,@object # @__hip_gpubin_handle
.local __hip_gpubin_handle
.comm __hip_gpubin_handle,8,8
.section .init_array,"aw",@init_array
.p2align 3, 0x0
.quad __hip_module_ctor
.type __hip_cuid_,@object # @__hip_cuid_
.bss
.globl __hip_cuid_
__hip_cuid_:
.byte 0 # 0x0
.size __hip_cuid_, 1
.section ".linker-options","e",@llvm_linker_options
.ident "AMD clang version 18.0.0git (https://github.com/RadeonOpenCompute/llvm-project roc-6.3.2 25012 e5bf7e55c91490b07c49d8960fa7983d864936c4)"
.section ".note.GNU-stack","",@progbits
.addrsig
.addrsig_sym _Z32__device_stub__kernelUpdatePBestPfS_S_
.addrsig_sym __hip_module_ctor
.addrsig_sym __hip_module_dtor
.addrsig_sym _Z17kernelUpdatePBestPfS_S_
.addrsig_sym __hip_fatbin
.addrsig_sym __hip_fatbin_wrapper
.addrsig_sym __hip_cuid_ |
You are a helpful coding assistant specialized in converting CUDA source code to CUDA device assembly. | // Matrix Multiplication in gpu with and without tiling.
// Compile with: nvcc -o test matrix_multiplication.cu -std=c++11
#include <stdio.h>
#include <stdlib.h>
#include <math.h>
#include <random>
#include <iostream>
#include <chrono>
#define TS 32
// Multiplies matrices using GPU with 2D grid
__global__ void multiply_matrix_gpu(double *matA, double *matB, double *matC, const int n) {
unsigned int ix = threadIdx.x + blockIdx.x * blockDim.x;
unsigned int iy = threadIdx.y + blockIdx.y * blockDim.y;
if (ix < n && iy < n) {
for(int k=0; k<n; k++) {
matC[iy*n+ix] += matA[iy*n+k] * matB[k*n+ix];
}
}
}
// Multiplies matrices using GPU with 2D grid plus tiling
__global__ void multiply_matrix_gpu_tiling(double *matA, double *matB, double *matC, const int n) {
unsigned int x = threadIdx.x;
unsigned int y = threadIdx.y;
unsigned int ix = blockIdx.x * blockDim.x + x;
unsigned int iy = blockIdx.y * blockDim.y + y;
__shared__ double tile_A[TS*TS];
__shared__ double tile_B[TS*TS];
double sum = 0;
for(int i=0; i < (n+TS-1)/TS; i--) {
if((iy < n) && (i*TS+x < n)) {
tile_A[y*TS+x] = matA[iy*n + i*TS + x];
} else {
tile_A[y*TS+x] = 0.0f;
}
if((ix < n) && (i*TS+y < n)) {
tile_B[y*TS+x] = matB[(i*TS+y)*n+ix];
} else {
tile_B[y*TS+x] = 0;
}
__syncthreads();
for(int j=0; j<TS; j++) {
sum += tile_A[y*TS+i] * tile_B[i*TS+x];
}
__syncthreads();
}
if (ix < n && iy < n) {
matC[ix*n+iy] += sum;
}
}
// Multiplies matrices in host
void multiply_matrix_host(double *matA, double *matB, double *matC, int n) {
for(int i = 0; i<n; i++) {
for(int j=0; j<n; j++) {
for(int k=0; k<n; k++) {
matC[i*n+j] += matA[i*n+k] * matB[j+k*n];
}
}
}
}
// Compares two matrices
void checkResult(double *hostRef, double *gpuRef, const int n) {
double epsilon = 1.0E-8;
bool match = 1;
for (int i = 0; i < n*n; i++) {
if (abs(hostRef[i] - gpuRef[i]) > epsilon) {
match = 0;
printf("host %f gpu %f\n", hostRef[i], gpuRef[i]);
break;
}
}
if (match) printf("Matrix match.\n\n");
else printf("Matrix does not not match.\n\n");
}
int main(int argc, char* argv[]) {
// Set up device
int dev = 0;
cudaDeviceProp deviceProp;
cudaGetDeviceProperties(&deviceProp, dev);
printf("Using Device %d: %s\n", dev, deviceProp.name);
cudaSetDevice(dev);
// Size of matrix
int n = 1000;
int bytes = n * n * sizeof(double*);
// Host matrix memory
double *h_a = (double *)malloc(bytes);
double *h_b = (double *)malloc(bytes);
// Results
double *hostRef = (double *)malloc(bytes);
double *gpuRef = (double *)malloc(bytes);
// Initialize matrix on host
for(int i = 0; i < n*n; i++ ) {
double rdm1 = 1 + (double)rand()/(RAND_MAX/9.0f);
double rdm2 = 1 + (double)rand()/(RAND_MAX/9.0f);
h_a[i] = rdm1;
h_b[i] = rdm2;
}
// Initialize matrix with 0s
memset(hostRef, 0, bytes);
memset(gpuRef, 0, bytes);
// Multiply matrix on host
auto start_cpu = std::chrono::high_resolution_clock::now();
multiply_matrix_host(h_a, h_b, hostRef, n);
auto end_cpu = std::chrono::high_resolution_clock::now();
// Measure total time in host
std::chrono::duration<float, std::milli> duration_ms = end_cpu - start_cpu;
printf("multiply_matrix_host elapsed %f ms\n", duration_ms.count());
// Device matrix global memory
double *d_a, *d_b, *d_c;
cudaMalloc((void **)&d_a, bytes);
cudaMalloc((void **)&d_b, bytes);
cudaMalloc((void **)&d_c, bytes);
// Transfer data from host to device
cudaMemcpy(d_a, h_a, bytes, cudaMemcpyHostToDevice);
cudaMemcpy(d_b, h_b, bytes, cudaMemcpyHostToDevice);
cudaMemset(d_c, 0, bytes); // Initialize matrix with 0s
// Kernel execution configuration
dim3 block(TS, TS);
dim3 grid((n + block.x - 1) / block.x, (n + block.y - 1) / block.y);
printf("grid.x %d grid.y %d block.x %d block.y %d\n", grid.x, grid.y, block.x, block.y);
// Execute GPU kernel
start_cpu = std::chrono::high_resolution_clock::now();
multiply_matrix_gpu<<<grid, block>>>(d_a, d_b, d_c, n);
cudaDeviceSynchronize();
end_cpu = std::chrono::high_resolution_clock::now();
// Measure total time
duration_ms = end_cpu - start_cpu;
printf("multiply_matrix_gpu elapsed %f ms\n", duration_ms.count());
// Copy result from device to host
cudaMemcpy(gpuRef, d_c, bytes, cudaMemcpyDeviceToHost);
// Check results
checkResult(hostRef, gpuRef, n);
// Repeat for tiling
start_cpu = std::chrono::high_resolution_clock::now();
multiply_matrix_gpu_tiling<<<grid, block>>>(d_a, d_b, d_c, n);
cudaDeviceSynchronize();
end_cpu = std::chrono::high_resolution_clock::now();
duration_ms = end_cpu - start_cpu;
printf("multiply_matrix_gpu_tiling elapsed %f ms\n", duration_ms.count());
cudaMemcpy(gpuRef, d_c, bytes, cudaMemcpyDeviceToHost);
checkResult(hostRef, gpuRef, n);
// Free memory
cudaFree(d_a);
cudaFree(d_b);
cudaFree(d_c);
free(h_a);
free(h_b);
free(hostRef);
free(gpuRef);
cudaDeviceReset();
return 0;
} | code for sm_80
Function : _Z26multiply_matrix_gpu_tilingPdS_S_i
.headerflags @"EF_CUDA_TEXMODE_UNIFIED EF_CUDA_64BIT_ADDRESS EF_CUDA_SM80 EF_CUDA_VIRTUAL_SM(EF_CUDA_SM80)"
/*0000*/ IMAD.MOV.U32 R1, RZ, RZ, c[0x0][0x28] ; /* 0x00000a00ff017624 */
/* 0x000fe400078e00ff */
/*0010*/ S2R R2, SR_CTAID.Y ; /* 0x0000000000027919 */
/* 0x000e220000002600 */
/*0020*/ IMAD.MOV.U32 R4, RZ, RZ, c[0x0][0x178] ; /* 0x00005e00ff047624 */
/* 0x000fe200078e00ff */
/*0030*/ ULDC.64 UR4, c[0x0][0x118] ; /* 0x0000460000047ab9 */
/* 0x000fe20000000a00 */
/*0040*/ CS2R R12, SRZ ; /* 0x00000000000c7805 */
/* 0x000fe2000001ff00 */
/*0050*/ S2R R7, SR_TID.Y ; /* 0x0000000000077919 */
/* 0x000e240000002200 */
/*0060*/ ISETP.GE.AND P1, PT, R4, 0x1, PT ; /* 0x000000010400780c */
/* 0x000fe40003f26270 */
/*0070*/ S2R R3, SR_CTAID.X ; /* 0x0000000000037919 */
/* 0x000e680000002500 */
/*0080*/ S2R R0, SR_TID.X ; /* 0x0000000000007919 */
/* 0x000e620000002100 */
/*0090*/ IMAD R2, R2, c[0x0][0x4], R7 ; /* 0x0000010002027a24 */
/* 0x001fca00078e0207 */
/*00a0*/ ISETP.GE.U32.AND P0, PT, R2, c[0x0][0x178], PT ; /* 0x00005e0002007a0c */
/* 0x000fe20003f06070 */
/*00b0*/ IMAD R3, R3, c[0x0][0x0], R0 ; /* 0x0000000003037a24 */
/* 0x002fca00078e0200 */
/*00c0*/ ISETP.GE.U32.OR P0, PT, R3, c[0x0][0x178], P0 ; /* 0x00005e0003007a0c */
/* 0x000fe20000706470 */
/*00d0*/ @!P1 BRA 0x500 ; /* 0x0000042000009947 */
/* 0x000fd80003800000 */
/*00e0*/ IADD3 R4, R4, 0x1f, RZ ; /* 0x0000001f04047810 */
/* 0x000fe20007ffe0ff */
/*00f0*/ CS2R R12, SRZ ; /* 0x00000000000c7805 */
/* 0x000fc6000001ff00 */
/*0100*/ SHF.R.S32.HI R5, RZ, 0x1f, R4 ; /* 0x0000001fff057819 */
/* 0x000fc80000011404 */
/*0110*/ LEA.HI R6, R5, R4, RZ, 0x5 ; /* 0x0000000405067211 */
/* 0x000fe200078f28ff */
/*0120*/ IMAD.MOV.U32 R5, RZ, RZ, RZ ; /* 0x000000ffff057224 */
/* 0x000fe200078e00ff */
/*0130*/ LEA R4, R7, R0, 0x5 ; /* 0x0000000007047211 */
/* 0x000fe400078e28ff */
/*0140*/ SHF.R.S32.HI R6, RZ, 0x5, R6 ; /* 0x00000005ff067819 */
/* 0x000fe40000011406 */
/*0150*/ S2R R10, SR_TID.Y ; /* 0x00000000000a7919 */
/* 0x000e220000002200 */
/*0160*/ IMAD R9, R5, 0x20, R0 ; /* 0x0000002005097824 */
/* 0x000fe200078e0200 */
/*0170*/ CS2R R14, SRZ ; /* 0x00000000000e7805 */
/* 0x000fe2000001ff00 */
/*0180*/ CS2R R16, SRZ ; /* 0x0000000000107805 */
/* 0x000fc6000001ff00 */
/*0190*/ ISETP.GE.U32.AND P2, PT, R9, c[0x0][0x178], PT ; /* 0x00005e0009007a0c */
/* 0x000fc80003f46070 */
/*01a0*/ ISETP.GE.U32.OR P2, PT, R2, c[0x0][0x178], P2 ; /* 0x00005e0002007a0c */
/* 0x000fda0001746470 */
/*01b0*/ @!P2 IMAD R18, R2, c[0x0][0x178], R9 ; /* 0x00005e000212aa24 */
/* 0x000fe200078e0209 */
/*01c0*/ LEA R20, R5, R10, 0x5 ; /* 0x0000000a05147211 */
/* 0x001fe200078e28ff */
/*01d0*/ @!P2 IMAD.MOV.U32 R19, RZ, RZ, 0x8 ; /* 0x00000008ff13a424 */
/* 0x000fc600078e00ff */
/*01e0*/ ISETP.GE.U32.AND P1, PT, R20, c[0x0][0x178], PT ; /* 0x00005e0014007a0c */
/* 0x000fe20003f26070 */
/*01f0*/ @!P2 IMAD.WIDE.U32 R18, R18, R19, c[0x0][0x160] ; /* 0x000058001212a625 */
/* 0x000fc600078e0013 */
/*0200*/ ISETP.GE.U32.OR P1, PT, R3, c[0x0][0x178], P1 ; /* 0x00005e0003007a0c */
/* 0x000fe40000f26470 */
/*0210*/ @!P2 LDG.E.64 R14, [R18.64] ; /* 0x00000004120ea981 */
/* 0x000eb6000c1e1b00 */
/*0220*/ @!P1 MOV R21, 0x8 ; /* 0x0000000800159802 */
/* 0x000fe20000000f00 */
/*0230*/ @!P1 IMAD R20, R20, c[0x0][0x178], R3 ; /* 0x00005e0014149a24 */
/* 0x000fc800078e0203 */
/*0240*/ @!P1 IMAD.WIDE.U32 R20, R20, R21, c[0x0][0x168] ; /* 0x00005a0014149625 */
/* 0x000fca00078e0015 */
/*0250*/ @!P1 LDG.E.64 R16, [R20.64] ; /* 0x0000000414109981 */
/* 0x000ee2000c1e1b00 */
/*0260*/ IMAD R10, R10, 0x20, R5 ; /* 0x000000200a0a7824 */
/* 0x000fe200078e0205 */
/*0270*/ ISETP.GT.AND P1, PT, R5.reuse, R6, PT ; /* 0x000000060500720c */
/* 0x040fe40003f24270 */
/*0280*/ IADD3 R5, R5, -0x1, RZ ; /* 0xffffffff05057810 */
/* 0x000fe20007ffe0ff */
/*0290*/ STS.64 [R4.X8], R14 ; /* 0x0000000e04007388 */
/* 0x004fe80000008a00 */
/*02a0*/ STS.64 [R4.X8+0x2000], R16 ; /* 0x0020001004007388 */
/* 0x008fe80000008a00 */
/*02b0*/ BAR.SYNC.DEFER_BLOCKING 0x0 ; /* 0x0000000000007b1d */
/* 0x000fec0000010000 */
/*02c0*/ LDS.64 R8, [R9.X8+0x2000] ; /* 0x0020000009087984 */
/* 0x000fe80000008a00 */
/*02d0*/ LDS.64 R10, [R10.X8] ; /* 0x000000000a0a7984 */
/* 0x000e240000008a00 */
/*02e0*/ DFMA R12, R8, R10, R12 ; /* 0x0000000a080c722b */
/* 0x001e0c000000000c */
/*02f0*/ DFMA R12, R8, R10, R12 ; /* 0x0000000a080c722b */
/* 0x001e0c000000000c */
/*0300*/ DFMA R12, R8, R10, R12 ; /* 0x0000000a080c722b */
/* 0x001e0c000000000c */
/*0310*/ DFMA R12, R8, R10, R12 ; /* 0x0000000a080c722b */
/* 0x001e0c000000000c */
/*0320*/ DFMA R12, R8, R10, R12 ; /* 0x0000000a080c722b */
/* 0x001e0c000000000c */
/*0330*/ DFMA R12, R8, R10, R12 ; /* 0x0000000a080c722b */
/* 0x001e0c000000000c */
/*0340*/ DFMA R12, R8, R10, R12 ; /* 0x0000000a080c722b */
/* 0x001e0c000000000c */
/*0350*/ DFMA R12, R8, R10, R12 ; /* 0x0000000a080c722b */
/* 0x001e0c000000000c */
/*0360*/ DFMA R12, R8, R10, R12 ; /* 0x0000000a080c722b */
/* 0x001e0c000000000c */
/*0370*/ DFMA R12, R8, R10, R12 ; /* 0x0000000a080c722b */
/* 0x001e0c000000000c */
/*0380*/ DFMA R12, R8, R10, R12 ; /* 0x0000000a080c722b */
/* 0x001e0c000000000c */
/*0390*/ DFMA R12, R8, R10, R12 ; /* 0x0000000a080c722b */
/* 0x001e0c000000000c */
/*03a0*/ DFMA R12, R8, R10, R12 ; /* 0x0000000a080c722b */
/* 0x001e0c000000000c */
/*03b0*/ DFMA R12, R8, R10, R12 ; /* 0x0000000a080c722b */
/* 0x001e0c000000000c */
/*03c0*/ DFMA R12, R8, R10, R12 ; /* 0x0000000a080c722b */
/* 0x001e0c000000000c */
/*03d0*/ DFMA R12, R8, R10, R12 ; /* 0x0000000a080c722b */
/* 0x001e0c000000000c */
/*03e0*/ DFMA R12, R8, R10, R12 ; /* 0x0000000a080c722b */
/* 0x001e0c000000000c */
/*03f0*/ DFMA R12, R8, R10, R12 ; /* 0x0000000a080c722b */
/* 0x001e0c000000000c */
/*0400*/ DFMA R12, R8, R10, R12 ; /* 0x0000000a080c722b */
/* 0x001e0c000000000c */
/*0410*/ DFMA R12, R8, R10, R12 ; /* 0x0000000a080c722b */
/* 0x001e0c000000000c */
/*0420*/ DFMA R12, R8, R10, R12 ; /* 0x0000000a080c722b */
/* 0x001e0c000000000c */
/*0430*/ DFMA R12, R8, R10, R12 ; /* 0x0000000a080c722b */
/* 0x001e0c000000000c */
/*0440*/ DFMA R12, R8, R10, R12 ; /* 0x0000000a080c722b */
/* 0x001e0c000000000c */
/*0450*/ DFMA R12, R8, R10, R12 ; /* 0x0000000a080c722b */
/* 0x001e0c000000000c */
/*0460*/ DFMA R12, R8, R10, R12 ; /* 0x0000000a080c722b */
/* 0x001e0c000000000c */
/*0470*/ DFMA R12, R8, R10, R12 ; /* 0x0000000a080c722b */
/* 0x001e0c000000000c */
/*0480*/ DFMA R12, R8, R10, R12 ; /* 0x0000000a080c722b */
/* 0x001e0c000000000c */
/*0490*/ DFMA R12, R8, R10, R12 ; /* 0x0000000a080c722b */
/* 0x001e0c000000000c */
/*04a0*/ DFMA R12, R8, R10, R12 ; /* 0x0000000a080c722b */
/* 0x001e0c000000000c */
/*04b0*/ DFMA R12, R8, R10, R12 ; /* 0x0000000a080c722b */
/* 0x001e0c000000000c */
/*04c0*/ DFMA R12, R8, R10, R12 ; /* 0x0000000a080c722b */
/* 0x001e0c000000000c */
/*04d0*/ DFMA R12, R8, R10, R12 ; /* 0x0000000a080c722b */
/* 0x001062000000000c */
/*04e0*/ BAR.SYNC.DEFER_BLOCKING 0x0 ; /* 0x0000000000007b1d */
/* 0x000fec0000010000 */
/*04f0*/ @!P1 BRA 0x150 ; /* 0xfffffc5000009947 */
/* 0x003fea000383ffff */
/*0500*/ @P0 EXIT ; /* 0x000000000000094d */
/* 0x000fea0003800000 */
/*0510*/ MOV R5, 0x8 ; /* 0x0000000800057802 */
/* 0x000fe20000000f00 */
/*0520*/ IMAD R2, R3, c[0x0][0x178], R2 ; /* 0x00005e0003027a24 */
/* 0x000fc800078e0202 */
/*0530*/ IMAD.WIDE.U32 R2, R2, R5, c[0x0][0x170] ; /* 0x00005c0002027625 */
/* 0x000fca00078e0005 */
/*0540*/ LDG.E.64 R4, [R2.64] ; /* 0x0000000402047981 */
/* 0x000ea4000c1e1b00 */
/*0550*/ DADD R4, R4, R12 ; /* 0x0000000004047229 */
/* 0x004e0e000000000c */
/*0560*/ STG.E.64 [R2.64], R4 ; /* 0x0000000402007986 */
/* 0x001fe2000c101b04 */
/*0570*/ EXIT ; /* 0x000000000000794d */
/* 0x000fea0003800000 */
/*0580*/ BRA 0x580; /* 0xfffffff000007947 */
/* 0x000fc0000383ffff */
/*0590*/ NOP; /* 0x0000000000007918 */
/* 0x000fc00000000000 */
/*05a0*/ NOP; /* 0x0000000000007918 */
/* 0x000fc00000000000 */
/*05b0*/ NOP; /* 0x0000000000007918 */
/* 0x000fc00000000000 */
/*05c0*/ NOP; /* 0x0000000000007918 */
/* 0x000fc00000000000 */
/*05d0*/ NOP; /* 0x0000000000007918 */
/* 0x000fc00000000000 */
/*05e0*/ NOP; /* 0x0000000000007918 */
/* 0x000fc00000000000 */
/*05f0*/ NOP; /* 0x0000000000007918 */
/* 0x000fc00000000000 */
/*0600*/ NOP; /* 0x0000000000007918 */
/* 0x000fc00000000000 */
/*0610*/ NOP; /* 0x0000000000007918 */
/* 0x000fc00000000000 */
/*0620*/ NOP; /* 0x0000000000007918 */
/* 0x000fc00000000000 */
/*0630*/ NOP; /* 0x0000000000007918 */
/* 0x000fc00000000000 */
/*0640*/ NOP; /* 0x0000000000007918 */
/* 0x000fc00000000000 */
/*0650*/ NOP; /* 0x0000000000007918 */
/* 0x000fc00000000000 */
/*0660*/ NOP; /* 0x0000000000007918 */
/* 0x000fc00000000000 */
/*0670*/ NOP; /* 0x0000000000007918 */
/* 0x000fc00000000000 */
..........
Function : _Z19multiply_matrix_gpuPdS_S_i
.headerflags @"EF_CUDA_TEXMODE_UNIFIED EF_CUDA_64BIT_ADDRESS EF_CUDA_SM80 EF_CUDA_VIRTUAL_SM(EF_CUDA_SM80)"
/*0000*/ IMAD.MOV.U32 R1, RZ, RZ, c[0x0][0x28] ; /* 0x00000a00ff017624 */
/* 0x000fe400078e00ff */
/*0010*/ S2R R0, SR_CTAID.Y ; /* 0x0000000000007919 */
/* 0x000e220000002600 */
/*0020*/ IMAD.MOV.U32 R2, RZ, RZ, c[0x0][0x178] ; /* 0x00005e00ff027624 */
/* 0x000fc600078e00ff */
/*0030*/ S2R R3, SR_TID.Y ; /* 0x0000000000037919 */
/* 0x000e280000002200 */
/*0040*/ S2R R9, SR_CTAID.X ; /* 0x0000000000097919 */
/* 0x000e680000002500 */
/*0050*/ S2R R8, SR_TID.X ; /* 0x0000000000087919 */
/* 0x000e620000002100 */
/*0060*/ IMAD R0, R0, c[0x0][0x4], R3 ; /* 0x0000010000007a24 */
/* 0x001fca00078e0203 */
/*0070*/ ISETP.GE.U32.AND P0, PT, R0, c[0x0][0x178], PT ; /* 0x00005e0000007a0c */
/* 0x000fe20003f06070 */
/*0080*/ IMAD R3, R9, c[0x0][0x0], R8 ; /* 0x0000000009037a24 */
/* 0x002fca00078e0208 */
/*0090*/ ISETP.GE.U32.OR P0, PT, R3, c[0x0][0x178], P0 ; /* 0x00005e0003007a0c */
/* 0x000fc80000706470 */
/*00a0*/ ISETP.LT.OR P0, PT, R2, 0x1, P0 ; /* 0x000000010200780c */
/* 0x000fda0000701670 */
/*00b0*/ @P0 EXIT ; /* 0x000000000000094d */
/* 0x000fea0003800000 */
/*00c0*/ IADD3 R5, R2, -0x1, RZ ; /* 0xffffffff02057810 */
/* 0x000fe20007ffe0ff */
/*00d0*/ IMAD R12, R0, c[0x0][0x178], R3 ; /* 0x00005e00000c7a24 */
/* 0x000fe200078e0203 */
/*00e0*/ LOP3.LUT R4, R2, 0x3, RZ, 0xc0, !PT ; /* 0x0000000302047812 */
/* 0x000fe200078ec0ff */
/*00f0*/ ULDC.64 UR4, c[0x0][0x118] ; /* 0x0000460000047ab9 */
/* 0x000fe20000000a00 */
/*0100*/ ISETP.GE.U32.AND P1, PT, R5, 0x3, PT ; /* 0x000000030500780c */
/* 0x000fe20003f26070 */
/*0110*/ HFMA2.MMA R5, -RZ, RZ, 0, 4.76837158203125e-07 ; /* 0x00000008ff057435 */
/* 0x000fe200000001ff */
/*0120*/ ISETP.NE.AND P0, PT, R4, RZ, PT ; /* 0x000000ff0400720c */
/* 0x000fe20003f05270 */
/*0130*/ IMAD.MOV.U32 R7, RZ, RZ, RZ ; /* 0x000000ffff077224 */
/* 0x000fd000078e00ff */
/*0140*/ IMAD.WIDE.U32 R12, R12, R5, c[0x0][0x170] ; /* 0x00005c000c0c7625 */
/* 0x000fe400078e0005 */
/*0150*/ @!P1 BRA 0x430 ; /* 0x000002d000009947 */
/* 0x000fea0003800000 */
/*0160*/ LDG.E.64 R28, [R12.64] ; /* 0x000000040c1c7981 */
/* 0x000162000c1e1b00 */
/*0170*/ IADD3 R8, R8, c[0x0][0x178], RZ ; /* 0x00005e0008087a10 */
/* 0x000fe20007ffe0ff */
/*0180*/ IMAD R6, R0, R2, 0x3 ; /* 0x0000000300067424 */
/* 0x000fe200078e0202 */
/*0190*/ IADD3 R20, R4, -c[0x0][0x178], RZ ; /* 0x80005e0004147a10 */
/* 0x000fe20007ffe0ff */
/*01a0*/ IMAD R10, R2.reuse, 0x3, R3 ; /* 0x00000003020a7824 */
/* 0x040fe200078e0203 */
/*01b0*/ MOV R11, R3.reuse ; /* 0x00000003000b7202 */
/* 0x080fe20000000f00 */
/*01c0*/ IMAD R8, R9, c[0x0][0x0], R8 ; /* 0x0000000009087a24 */
/* 0x000fe200078e0208 */
/*01d0*/ LEA R9, R2, R3, 0x1 ; /* 0x0000000302097211 */
/* 0x000fe200078e08ff */
/*01e0*/ IMAD.MOV.U32 R7, RZ, RZ, RZ ; /* 0x000000ffff077224 */
/* 0x000fc400078e00ff */
/*01f0*/ IADD3 R24, R6, -0x3, RZ ; /* 0xfffffffd06187810 */
/* 0x000fe20007ffe0ff */
/*0200*/ IMAD.WIDE.U32 R26, R11, R5, c[0x0][0x168] ; /* 0x00005a000b1a7625 */
/* 0x000fc800078e0005 */
/*0210*/ IMAD.WIDE.U32 R24, R24, R5.reuse, c[0x0][0x160] ; /* 0x0000580018187625 */
/* 0x080fe200078e0005 */
/*0220*/ LDG.E.64 R14, [R26.64] ; /* 0x000000041a0e7981 */
/* 0x004ea8000c1e1b00 */
/*0230*/ LDG.E.64 R18, [R24.64] ; /* 0x0000000418127981 */
/* 0x000ea2000c1e1b00 */
/*0240*/ IADD3 R22, R6, -0x2, RZ ; /* 0xfffffffe06167810 */
/* 0x000fe20007ffe0ff */
/*0250*/ IMAD.WIDE.U32 R16, R8, R5, c[0x0][0x168] ; /* 0x00005a0008107625 */
/* 0x000fe200078e0005 */
/*0260*/ DFMA R18, R14, R18, R28 ; /* 0x000000120e12722b */
/* 0x024286000000001c */
/*0270*/ IMAD.WIDE.U32 R28, R22, R5, c[0x0][0x160] ; /* 0x00005800161c7625 */
/* 0x002fc800078e0005 */
/*0280*/ STG.E.64 [R12.64], R18 ; /* 0x000000120c007986 */
/* 0x0043e8000c101b04 */
/*0290*/ LDG.E.64 R14, [R16.64] ; /* 0x00000004100e7981 */
/* 0x000ea8000c1e1b00 */
/*02a0*/ LDG.E.64 R22, [R28.64] ; /* 0x000000041c167981 */
/* 0x000ea2000c1e1b00 */
/*02b0*/ IADD3 R21, R6, -0x1, RZ ; /* 0xffffffff06157810 */
/* 0x000fe20007ffe0ff */
/*02c0*/ IMAD.WIDE.U32 R26, R9, R5, c[0x0][0x168] ; /* 0x00005a00091a7625 */
/* 0x000fc800078e0005 */
/*02d0*/ IMAD.WIDE.U32 R24, R21, R5, c[0x0][0x160] ; /* 0x0000580015187625 */
/* 0x000fe200078e0005 */
/*02e0*/ DFMA R22, R14, R22, R18 ; /* 0x000000160e16722b */
/* 0x004e8e0000000012 */
/*02f0*/ STG.E.64 [R12.64], R22 ; /* 0x000000160c007986 */
/* 0x0045e8000c101b04 */
/*0300*/ LDG.E.64 R14, [R26.64] ; /* 0x000000041a0e7981 */
/* 0x000ee8000c1e1b00 */
/*0310*/ LDG.E.64 R16, [R24.64] ; /* 0x0000000418107981 */
/* 0x000ee2000c1e1b00 */
/*0320*/ IMAD.WIDE.U32 R18, R6, R5, c[0x0][0x160] ; /* 0x0000580006127625 */
/* 0x002fe200078e0005 */
/*0330*/ IADD3 R7, R7, 0x4, RZ ; /* 0x0000000407077810 */
/* 0x000fe20007ffe0ff */
/*0340*/ DFMA R14, R14, R16, R22 ; /* 0x000000100e0e722b */
/* 0x0082c40000000016 */
/*0350*/ IMAD.WIDE.U32 R16, R10, R5, c[0x0][0x168] ; /* 0x00005a000a107625 */
/* 0x002fca00078e0005 */
/*0360*/ STG.E.64 [R12.64], R14 ; /* 0x0000000e0c007986 */
/* 0x0085e8000c101b04 */
/*0370*/ LDG.E.64 R18, [R18.64] ; /* 0x0000000412127981 */
/* 0x000ee8000c1e1b00 */
/*0380*/ LDG.E.64 R16, [R16.64] ; /* 0x0000000410107981 */
/* 0x000ee2000c1e1b00 */
/*0390*/ IMAD.IADD R21, R20, 0x1, R7 ; /* 0x0000000114157824 */
/* 0x000fe200078e0207 */
/*03a0*/ IADD3 R6, R6, 0x4, RZ ; /* 0x0000000406067810 */
/* 0x000fe20007ffe0ff */
/*03b0*/ IMAD R9, R2.reuse, 0x4, R9 ; /* 0x0000000402097824 */
/* 0x040fe200078e0209 */
/*03c0*/ LEA R8, R2, R8, 0x2 ; /* 0x0000000802087211 */
/* 0x000fc400078e10ff */
/*03d0*/ ISETP.NE.AND P1, PT, R21, RZ, PT ; /* 0x000000ff1500720c */
/* 0x000fe40003f25270 */
/*03e0*/ LEA R10, R2.reuse, R10, 0x2 ; /* 0x0000000a020a7211 */
/* 0x040fe400078e10ff */
/*03f0*/ LEA R11, R2, R11, 0x2 ; /* 0x0000000b020b7211 */
/* 0x000fe200078e10ff */
/*0400*/ DFMA R28, R16, R18, R14 ; /* 0x00000012101c722b */
/* 0x008e4e000000000e */
/*0410*/ STG.E.64 [R12.64], R28 ; /* 0x0000001c0c007986 */
/* 0x0025e2000c101b04 */
/*0420*/ @P1 BRA 0x1f0 ; /* 0xfffffdc000001947 */
/* 0x000fea000383ffff */
/*0430*/ @!P0 EXIT ; /* 0x000000000000894d */
/* 0x000fea0003800000 */
/*0440*/ LDG.E.64 R8, [R12.64] ; /* 0x000000040c087981 */
/* 0x000362000c1e1b00 */
/*0450*/ IMAD R10, R7, c[0x0][0x178], R3 ; /* 0x00005e00070a7a24 */
/* 0x000fe400078e0203 */
/*0460*/ IMAD R0, R0, c[0x0][0x178], R7 ; /* 0x00005e0000007a24 */
/* 0x000fc800078e0207 */
/*0470*/ IMAD.WIDE.U32 R2, R0, R5, c[0x0][0x160] ; /* 0x0000580000027625 */
/* 0x000fc800078e0005 */
/*0480*/ IMAD.WIDE.U32 R6, R10, R5, c[0x0][0x168] ; /* 0x00005a000a067625 */
/* 0x000fe400078e0005 */
/*0490*/ LDG.E.64 R2, [R2.64] ; /* 0x0000000402027981 */
/* 0x008ee8000c1e1b00 */
/*04a0*/ LDG.E.64 R6, [R6.64] ; /* 0x0000000406067981 */
/* 0x000ee2000c1e1b00 */
/*04b0*/ IADD3 R4, R4, -0x1, RZ ; /* 0xffffffff04047810 */
/* 0x000fe40007ffe0ff */
/*04c0*/ IADD3 R10, R10, c[0x0][0x178], RZ ; /* 0x00005e000a0a7a10 */
/* 0x000fe40007ffe0ff */
/*04d0*/ ISETP.NE.AND P0, PT, R4, RZ, PT ; /* 0x000000ff0400720c */
/* 0x000fc40003f05270 */
/*04e0*/ IADD3 R0, R0, 0x1, RZ ; /* 0x0000000100007810 */
/* 0x000fe20007ffe0ff */
/*04f0*/ DFMA R8, R6, R2, R8 ; /* 0x000000020608722b */
/* 0x028ece0000000008 */
/*0500*/ STG.E.64 [R12.64], R8 ; /* 0x000000080c007986 */
/* 0x0087e6000c101b04 */
/*0510*/ @P0 BRA 0x470 ; /* 0xffffff5000000947 */
/* 0x000fea000383ffff */
/*0520*/ EXIT ; /* 0x000000000000794d */
/* 0x000fea0003800000 */
/*0530*/ BRA 0x530; /* 0xfffffff000007947 */
/* 0x000fc0000383ffff */
/*0540*/ NOP; /* 0x0000000000007918 */
/* 0x000fc00000000000 */
/*0550*/ NOP; /* 0x0000000000007918 */
/* 0x000fc00000000000 */
/*0560*/ NOP; /* 0x0000000000007918 */
/* 0x000fc00000000000 */
/*0570*/ NOP; /* 0x0000000000007918 */
/* 0x000fc00000000000 */
/*0580*/ NOP; /* 0x0000000000007918 */
/* 0x000fc00000000000 */
/*0590*/ NOP; /* 0x0000000000007918 */
/* 0x000fc00000000000 */
/*05a0*/ NOP; /* 0x0000000000007918 */
/* 0x000fc00000000000 */
/*05b0*/ NOP; /* 0x0000000000007918 */
/* 0x000fc00000000000 */
/*05c0*/ NOP; /* 0x0000000000007918 */
/* 0x000fc00000000000 */
/*05d0*/ NOP; /* 0x0000000000007918 */
/* 0x000fc00000000000 */
/*05e0*/ NOP; /* 0x0000000000007918 */
/* 0x000fc00000000000 */
/*05f0*/ NOP; /* 0x0000000000007918 */
/* 0x000fc00000000000 */
.......... |
You are a helpful coding assistant specialized in converting CUDA source code to CUDA host assembly. | // Matrix Multiplication in gpu with and without tiling.
// Compile with: nvcc -o test matrix_multiplication.cu -std=c++11
#include <stdio.h>
#include <stdlib.h>
#include <math.h>
#include <random>
#include <iostream>
#include <chrono>
#define TS 32
// Multiplies matrices using GPU with 2D grid
__global__ void multiply_matrix_gpu(double *matA, double *matB, double *matC, const int n) {
unsigned int ix = threadIdx.x + blockIdx.x * blockDim.x;
unsigned int iy = threadIdx.y + blockIdx.y * blockDim.y;
if (ix < n && iy < n) {
for(int k=0; k<n; k++) {
matC[iy*n+ix] += matA[iy*n+k] * matB[k*n+ix];
}
}
}
// Multiplies matrices using GPU with 2D grid plus tiling
__global__ void multiply_matrix_gpu_tiling(double *matA, double *matB, double *matC, const int n) {
unsigned int x = threadIdx.x;
unsigned int y = threadIdx.y;
unsigned int ix = blockIdx.x * blockDim.x + x;
unsigned int iy = blockIdx.y * blockDim.y + y;
__shared__ double tile_A[TS*TS];
__shared__ double tile_B[TS*TS];
double sum = 0;
for(int i=0; i < (n+TS-1)/TS; i--) {
if((iy < n) && (i*TS+x < n)) {
tile_A[y*TS+x] = matA[iy*n + i*TS + x];
} else {
tile_A[y*TS+x] = 0.0f;
}
if((ix < n) && (i*TS+y < n)) {
tile_B[y*TS+x] = matB[(i*TS+y)*n+ix];
} else {
tile_B[y*TS+x] = 0;
}
__syncthreads();
for(int j=0; j<TS; j++) {
sum += tile_A[y*TS+i] * tile_B[i*TS+x];
}
__syncthreads();
}
if (ix < n && iy < n) {
matC[ix*n+iy] += sum;
}
}
// Multiplies matrices in host
void multiply_matrix_host(double *matA, double *matB, double *matC, int n) {
for(int i = 0; i<n; i++) {
for(int j=0; j<n; j++) {
for(int k=0; k<n; k++) {
matC[i*n+j] += matA[i*n+k] * matB[j+k*n];
}
}
}
}
// Compares two matrices
void checkResult(double *hostRef, double *gpuRef, const int n) {
double epsilon = 1.0E-8;
bool match = 1;
for (int i = 0; i < n*n; i++) {
if (abs(hostRef[i] - gpuRef[i]) > epsilon) {
match = 0;
printf("host %f gpu %f\n", hostRef[i], gpuRef[i]);
break;
}
}
if (match) printf("Matrix match.\n\n");
else printf("Matrix does not not match.\n\n");
}
int main(int argc, char* argv[]) {
// Set up device
int dev = 0;
cudaDeviceProp deviceProp;
cudaGetDeviceProperties(&deviceProp, dev);
printf("Using Device %d: %s\n", dev, deviceProp.name);
cudaSetDevice(dev);
// Size of matrix
int n = 1000;
int bytes = n * n * sizeof(double*);
// Host matrix memory
double *h_a = (double *)malloc(bytes);
double *h_b = (double *)malloc(bytes);
// Results
double *hostRef = (double *)malloc(bytes);
double *gpuRef = (double *)malloc(bytes);
// Initialize matrix on host
for(int i = 0; i < n*n; i++ ) {
double rdm1 = 1 + (double)rand()/(RAND_MAX/9.0f);
double rdm2 = 1 + (double)rand()/(RAND_MAX/9.0f);
h_a[i] = rdm1;
h_b[i] = rdm2;
}
// Initialize matrix with 0s
memset(hostRef, 0, bytes);
memset(gpuRef, 0, bytes);
// Multiply matrix on host
auto start_cpu = std::chrono::high_resolution_clock::now();
multiply_matrix_host(h_a, h_b, hostRef, n);
auto end_cpu = std::chrono::high_resolution_clock::now();
// Measure total time in host
std::chrono::duration<float, std::milli> duration_ms = end_cpu - start_cpu;
printf("multiply_matrix_host elapsed %f ms\n", duration_ms.count());
// Device matrix global memory
double *d_a, *d_b, *d_c;
cudaMalloc((void **)&d_a, bytes);
cudaMalloc((void **)&d_b, bytes);
cudaMalloc((void **)&d_c, bytes);
// Transfer data from host to device
cudaMemcpy(d_a, h_a, bytes, cudaMemcpyHostToDevice);
cudaMemcpy(d_b, h_b, bytes, cudaMemcpyHostToDevice);
cudaMemset(d_c, 0, bytes); // Initialize matrix with 0s
// Kernel execution configuration
dim3 block(TS, TS);
dim3 grid((n + block.x - 1) / block.x, (n + block.y - 1) / block.y);
printf("grid.x %d grid.y %d block.x %d block.y %d\n", grid.x, grid.y, block.x, block.y);
// Execute GPU kernel
start_cpu = std::chrono::high_resolution_clock::now();
multiply_matrix_gpu<<<grid, block>>>(d_a, d_b, d_c, n);
cudaDeviceSynchronize();
end_cpu = std::chrono::high_resolution_clock::now();
// Measure total time
duration_ms = end_cpu - start_cpu;
printf("multiply_matrix_gpu elapsed %f ms\n", duration_ms.count());
// Copy result from device to host
cudaMemcpy(gpuRef, d_c, bytes, cudaMemcpyDeviceToHost);
// Check results
checkResult(hostRef, gpuRef, n);
// Repeat for tiling
start_cpu = std::chrono::high_resolution_clock::now();
multiply_matrix_gpu_tiling<<<grid, block>>>(d_a, d_b, d_c, n);
cudaDeviceSynchronize();
end_cpu = std::chrono::high_resolution_clock::now();
duration_ms = end_cpu - start_cpu;
printf("multiply_matrix_gpu_tiling elapsed %f ms\n", duration_ms.count());
cudaMemcpy(gpuRef, d_c, bytes, cudaMemcpyDeviceToHost);
checkResult(hostRef, gpuRef, n);
// Free memory
cudaFree(d_a);
cudaFree(d_b);
cudaFree(d_c);
free(h_a);
free(h_b);
free(hostRef);
free(gpuRef);
cudaDeviceReset();
return 0;
} | .file "tmpxft_001090eb_00000000-6_matrix_multiplication.cudafe1.cpp"
.text
#APP
.globl _ZSt21ios_base_library_initv
#NO_APP
.type _ZL26__cudaUnregisterBinaryUtilv, @function
_ZL26__cudaUnregisterBinaryUtilv:
.LFB4861:
.cfi_startproc
endbr64
subq $8, %rsp
.cfi_def_cfa_offset 16
movq _ZL20__cudaFatCubinHandle(%rip), %rdi
call __cudaUnregisterFatBinary@PLT
addq $8, %rsp
.cfi_def_cfa_offset 8
ret
.cfi_endproc
.LFE4861:
.size _ZL26__cudaUnregisterBinaryUtilv, .-_ZL26__cudaUnregisterBinaryUtilv
.globl _Z20multiply_matrix_hostPdS_S_i
.type _Z20multiply_matrix_hostPdS_S_i, @function
_Z20multiply_matrix_hostPdS_S_i:
.LFB4852:
.cfi_startproc
endbr64
testl %ecx, %ecx
jle .L11
pushq %r13
.cfi_def_cfa_offset 16
.cfi_offset 13, -16
pushq %r12
.cfi_def_cfa_offset 24
.cfi_offset 12, -24
pushq %rbp
.cfi_def_cfa_offset 32
.cfi_offset 6, -32
pushq %rbx
.cfi_def_cfa_offset 40
.cfi_offset 3, -40
movq %rsi, %rbp
movq %rdx, %rbx
movl %ecx, %r11d
movslq %ecx, %rsi
salq $3, %rsi
movq %rdi, %r10
addq %rsi, %rdi
movl $0, %r12d
movl $0, %r13d
jmp .L5
.L7:
leal 1(%r12), %eax
addq %rsi, %r10
addq %rsi, %rdi
addq %rsi, %rbx
cmpl %r9d, %r12d
je .L3
movl %eax, %r12d
.L5:
movq %rbp, %r8
movq %rbx, %rcx
movl %r13d, %r9d
.L8:
movq %r8, %rdx
movq %r10, %rax
.L6:
movsd (%rax), %xmm0
mulsd (%rdx), %xmm0
addsd (%rcx), %xmm0
movsd %xmm0, (%rcx)
addq $8, %rax
addq %rsi, %rdx
cmpq %rdi, %rax
jne .L6
leal 1(%r9), %eax
addq $8, %r8
addq $8, %rcx
cmpl %eax, %r11d
je .L7
movl %eax, %r9d
jmp .L8
.L3:
popq %rbx
.cfi_def_cfa_offset 32
popq %rbp
.cfi_def_cfa_offset 24
popq %r12
.cfi_def_cfa_offset 16
popq %r13
.cfi_def_cfa_offset 8
ret
.L11:
.cfi_restore 3
.cfi_restore 6
.cfi_restore 12
.cfi_restore 13
ret
.cfi_endproc
.LFE4852:
.size _Z20multiply_matrix_hostPdS_S_i, .-_Z20multiply_matrix_hostPdS_S_i
.section .rodata.str1.1,"aMS",@progbits,1
.LC2:
.string "host %f gpu %f\n"
.LC3:
.string "Matrix does not not match.\n\n"
.LC4:
.string "Matrix match.\n\n"
.text
.globl _Z11checkResultPdS_i
.type _Z11checkResultPdS_i, @function
_Z11checkResultPdS_i:
.LFB4853:
.cfi_startproc
endbr64
subq $8, %rsp
.cfi_def_cfa_offset 16
imull %edx, %edx
testl %edx, %edx
jle .L15
movslq %edx, %rdx
salq $3, %rdx
movl $0, %eax
movq .LC0(%rip), %xmm4
movsd .LC1(%rip), %xmm3
.L19:
movsd (%rdi,%rax), %xmm2
movsd (%rsi,%rax), %xmm1
movapd %xmm2, %xmm0
subsd %xmm1, %xmm0
andpd %xmm4, %xmm0
comisd %xmm3, %xmm0
ja .L24
addq $8, %rax
cmpq %rdx, %rax
jne .L19
.L15:
leaq .LC4(%rip), %rsi
movl $2, %edi
movl $0, %eax
call __printf_chk@PLT
.L14:
addq $8, %rsp
.cfi_remember_state
.cfi_def_cfa_offset 8
ret
.L24:
.cfi_restore_state
movapd %xmm2, %xmm0
leaq .LC2(%rip), %rsi
movl $2, %edi
movl $2, %eax
call __printf_chk@PLT
leaq .LC3(%rip), %rsi
movl $2, %edi
movl $0, %eax
call __printf_chk@PLT
jmp .L14
.cfi_endproc
.LFE4853:
.size _Z11checkResultPdS_i, .-_Z11checkResultPdS_i
.globl _Z44__device_stub__Z19multiply_matrix_gpuPdS_S_iPdS_S_i
.type _Z44__device_stub__Z19multiply_matrix_gpuPdS_S_iPdS_S_i, @function
_Z44__device_stub__Z19multiply_matrix_gpuPdS_S_iPdS_S_i:
.LFB4883:
.cfi_startproc
endbr64
subq $152, %rsp
.cfi_def_cfa_offset 160
movq %rdi, 24(%rsp)
movq %rsi, 16(%rsp)
movq %rdx, 8(%rsp)
movl %ecx, 4(%rsp)
movq %fs:40, %rax
movq %rax, 136(%rsp)
xorl %eax, %eax
leaq 24(%rsp), %rax
movq %rax, 96(%rsp)
leaq 16(%rsp), %rax
movq %rax, 104(%rsp)
leaq 8(%rsp), %rax
movq %rax, 112(%rsp)
leaq 4(%rsp), %rax
movq %rax, 120(%rsp)
movl $1, 48(%rsp)
movl $1, 52(%rsp)
movl $1, 56(%rsp)
movl $1, 60(%rsp)
movl $1, 64(%rsp)
movl $1, 68(%rsp)
leaq 40(%rsp), %rcx
leaq 32(%rsp), %rdx
leaq 60(%rsp), %rsi
leaq 48(%rsp), %rdi
call __cudaPopCallConfiguration@PLT
testl %eax, %eax
je .L29
.L25:
movq 136(%rsp), %rax
subq %fs:40, %rax
jne .L30
addq $152, %rsp
.cfi_remember_state
.cfi_def_cfa_offset 8
ret
.L29:
.cfi_restore_state
pushq 40(%rsp)
.cfi_def_cfa_offset 168
pushq 40(%rsp)
.cfi_def_cfa_offset 176
leaq 112(%rsp), %r9
movq 76(%rsp), %rcx
movl 84(%rsp), %r8d
movq 64(%rsp), %rsi
movl 72(%rsp), %edx
leaq _Z19multiply_matrix_gpuPdS_S_i(%rip), %rdi
call cudaLaunchKernel@PLT
addq $16, %rsp
.cfi_def_cfa_offset 160
jmp .L25
.L30:
call __stack_chk_fail@PLT
.cfi_endproc
.LFE4883:
.size _Z44__device_stub__Z19multiply_matrix_gpuPdS_S_iPdS_S_i, .-_Z44__device_stub__Z19multiply_matrix_gpuPdS_S_iPdS_S_i
.globl _Z19multiply_matrix_gpuPdS_S_i
.type _Z19multiply_matrix_gpuPdS_S_i, @function
_Z19multiply_matrix_gpuPdS_S_i:
.LFB4884:
.cfi_startproc
endbr64
subq $8, %rsp
.cfi_def_cfa_offset 16
call _Z44__device_stub__Z19multiply_matrix_gpuPdS_S_iPdS_S_i
addq $8, %rsp
.cfi_def_cfa_offset 8
ret
.cfi_endproc
.LFE4884:
.size _Z19multiply_matrix_gpuPdS_S_i, .-_Z19multiply_matrix_gpuPdS_S_i
.globl _Z51__device_stub__Z26multiply_matrix_gpu_tilingPdS_S_iPdS_S_i
.type _Z51__device_stub__Z26multiply_matrix_gpu_tilingPdS_S_iPdS_S_i, @function
_Z51__device_stub__Z26multiply_matrix_gpu_tilingPdS_S_iPdS_S_i:
.LFB4885:
.cfi_startproc
endbr64
subq $152, %rsp
.cfi_def_cfa_offset 160
movq %rdi, 24(%rsp)
movq %rsi, 16(%rsp)
movq %rdx, 8(%rsp)
movl %ecx, 4(%rsp)
movq %fs:40, %rax
movq %rax, 136(%rsp)
xorl %eax, %eax
leaq 24(%rsp), %rax
movq %rax, 96(%rsp)
leaq 16(%rsp), %rax
movq %rax, 104(%rsp)
leaq 8(%rsp), %rax
movq %rax, 112(%rsp)
leaq 4(%rsp), %rax
movq %rax, 120(%rsp)
movl $1, 48(%rsp)
movl $1, 52(%rsp)
movl $1, 56(%rsp)
movl $1, 60(%rsp)
movl $1, 64(%rsp)
movl $1, 68(%rsp)
leaq 40(%rsp), %rcx
leaq 32(%rsp), %rdx
leaq 60(%rsp), %rsi
leaq 48(%rsp), %rdi
call __cudaPopCallConfiguration@PLT
testl %eax, %eax
je .L37
.L33:
movq 136(%rsp), %rax
subq %fs:40, %rax
jne .L38
addq $152, %rsp
.cfi_remember_state
.cfi_def_cfa_offset 8
ret
.L37:
.cfi_restore_state
pushq 40(%rsp)
.cfi_def_cfa_offset 168
pushq 40(%rsp)
.cfi_def_cfa_offset 176
leaq 112(%rsp), %r9
movq 76(%rsp), %rcx
movl 84(%rsp), %r8d
movq 64(%rsp), %rsi
movl 72(%rsp), %edx
leaq _Z26multiply_matrix_gpu_tilingPdS_S_i(%rip), %rdi
call cudaLaunchKernel@PLT
addq $16, %rsp
.cfi_def_cfa_offset 160
jmp .L33
.L38:
call __stack_chk_fail@PLT
.cfi_endproc
.LFE4885:
.size _Z51__device_stub__Z26multiply_matrix_gpu_tilingPdS_S_iPdS_S_i, .-_Z51__device_stub__Z26multiply_matrix_gpu_tilingPdS_S_iPdS_S_i
.globl _Z26multiply_matrix_gpu_tilingPdS_S_i
.type _Z26multiply_matrix_gpu_tilingPdS_S_i, @function
_Z26multiply_matrix_gpu_tilingPdS_S_i:
.LFB4886:
.cfi_startproc
endbr64
subq $8, %rsp
.cfi_def_cfa_offset 16
call _Z51__device_stub__Z26multiply_matrix_gpu_tilingPdS_S_iPdS_S_i
addq $8, %rsp
.cfi_def_cfa_offset 8
ret
.cfi_endproc
.LFE4886:
.size _Z26multiply_matrix_gpu_tilingPdS_S_i, .-_Z26multiply_matrix_gpu_tilingPdS_S_i
.section .rodata.str1.1
.LC5:
.string "Using Device %d: %s\n"
.section .rodata.str1.8,"aMS",@progbits,1
.align 8
.LC9:
.string "multiply_matrix_host elapsed %f ms\n"
.align 8
.LC10:
.string "grid.x %d grid.y %d block.x %d block.y %d\n"
.align 8
.LC11:
.string "multiply_matrix_gpu elapsed %f ms\n"
.align 8
.LC12:
.string "multiply_matrix_gpu_tiling elapsed %f ms\n"
.text
.globl main
.type main, @function
main:
.LFB4854:
.cfi_startproc
endbr64
pushq %r15
.cfi_def_cfa_offset 16
.cfi_offset 15, -16
pushq %r14
.cfi_def_cfa_offset 24
.cfi_offset 14, -24
pushq %r13
.cfi_def_cfa_offset 32
.cfi_offset 13, -32
pushq %r12
.cfi_def_cfa_offset 40
.cfi_offset 12, -40
pushq %rbp
.cfi_def_cfa_offset 48
.cfi_offset 6, -48
pushq %rbx
.cfi_def_cfa_offset 56
.cfi_offset 3, -56
subq $1096, %rsp
.cfi_def_cfa_offset 1152
movq %fs:40, %rax
movq %rax, 1080(%rsp)
xorl %eax, %eax
leaq 48(%rsp), %rbx
movl $0, %esi
movq %rbx, %rdi
call cudaGetDeviceProperties_v2@PLT
movq %rbx, %rcx
movl $0, %edx
leaq .LC5(%rip), %rsi
movl $2, %edi
movl $0, %eax
call __printf_chk@PLT
movl $0, %edi
call cudaSetDevice@PLT
movl $8000000, %edi
call malloc@PLT
movq %rax, %r12
movl $8000000, %edi
call malloc@PLT
movq %rax, %rbp
movl $8000000, %edi
call malloc@PLT
movq %rax, %r14
movl $8000000, %edi
call malloc@PLT
movq %rax, %r13
movl $0, %ebx
.L42:
call rand@PLT
pxor %xmm0, %xmm0
cvtsi2sdl %eax, %xmm0
divsd .LC6(%rip), %xmm0
addsd .LC7(%rip), %xmm0
movq %xmm0, %r15
call rand@PLT
movq %r15, (%r12,%rbx)
pxor %xmm0, %xmm0
cvtsi2sdl %eax, %xmm0
divsd .LC6(%rip), %xmm0
addsd .LC7(%rip), %xmm0
movsd %xmm0, 0(%rbp,%rbx)
addq $8, %rbx
cmpq $8000000, %rbx
jne .L42
movl $8000000, %edx
movl $0, %esi
movq %r14, %rdi
call memset@PLT
movl $8000000, %edx
movl $0, %esi
movq %r13, %rdi
call memset@PLT
call _ZNSt6chrono3_V212system_clock3nowEv@PLT
movq %rax, %rbx
movl $1000, %ecx
movq %r14, %rdx
movq %rbp, %rsi
movq %r12, %rdi
call _Z20multiply_matrix_hostPdS_S_i
call _ZNSt6chrono3_V212system_clock3nowEv@PLT
subq %rbx, %rax
pxor %xmm0, %xmm0
cvtsi2ssq %rax, %xmm0
divss .LC8(%rip), %xmm0
cvtss2sd %xmm0, %xmm0
leaq .LC9(%rip), %rsi
movl $2, %edi
movl $1, %eax
call __printf_chk@PLT
movq %rsp, %rdi
movl $8000000, %esi
call cudaMalloc@PLT
leaq 8(%rsp), %rdi
movl $8000000, %esi
call cudaMalloc@PLT
leaq 16(%rsp), %rdi
movl $8000000, %esi
call cudaMalloc@PLT
movl $1, %ecx
movl $8000000, %edx
movq %r12, %rsi
movq (%rsp), %rdi
call cudaMemcpy@PLT
movl $1, %ecx
movl $8000000, %edx
movq %rbp, %rsi
movq 8(%rsp), %rdi
call cudaMemcpy@PLT
movl $8000000, %edx
movl $0, %esi
movq 16(%rsp), %rdi
call cudaMemset@PLT
movl $1, 32(%rsp)
movl $1, 44(%rsp)
movl $32, %r9d
movl $32, %r8d
movl $32, %ecx
movl $32, %edx
leaq .LC10(%rip), %rsi
movl $2, %edi
movl $0, %eax
call __printf_chk@PLT
call _ZNSt6chrono3_V212system_clock3nowEv@PLT
movq %rax, %rbx
movl $32, 36(%rsp)
movl $32, 40(%rsp)
movl $32, 24(%rsp)
movl $32, 28(%rsp)
movl 32(%rsp), %ecx
movl $0, %r9d
movl $0, %r8d
movq 24(%rsp), %rdx
movq 36(%rsp), %rdi
movl 44(%rsp), %esi
call __cudaPushCallConfiguration@PLT
testl %eax, %eax
je .L48
.L43:
call cudaDeviceSynchronize@PLT
call _ZNSt6chrono3_V212system_clock3nowEv@PLT
subq %rbx, %rax
pxor %xmm0, %xmm0
cvtsi2ssq %rax, %xmm0
divss .LC8(%rip), %xmm0
cvtss2sd %xmm0, %xmm0
leaq .LC11(%rip), %rsi
movl $2, %edi
movl $1, %eax
call __printf_chk@PLT
movl $2, %ecx
movl $8000000, %edx
movq 16(%rsp), %rsi
movq %r13, %rdi
call cudaMemcpy@PLT
movl $1000, %edx
movq %r13, %rsi
movq %r14, %rdi
call _Z11checkResultPdS_i
call _ZNSt6chrono3_V212system_clock3nowEv@PLT
movq %rax, %rbx
movl 32(%rsp), %ecx
movl $0, %r9d
movl $0, %r8d
movq 24(%rsp), %rdx
movq 36(%rsp), %rdi
movl 44(%rsp), %esi
call __cudaPushCallConfiguration@PLT
testl %eax, %eax
je .L49
.L44:
call cudaDeviceSynchronize@PLT
call _ZNSt6chrono3_V212system_clock3nowEv@PLT
subq %rbx, %rax
pxor %xmm0, %xmm0
cvtsi2ssq %rax, %xmm0
divss .LC8(%rip), %xmm0
cvtss2sd %xmm0, %xmm0
leaq .LC12(%rip), %rsi
movl $2, %edi
movl $1, %eax
call __printf_chk@PLT
movl $2, %ecx
movl $8000000, %edx
movq 16(%rsp), %rsi
movq %r13, %rdi
call cudaMemcpy@PLT
movl $1000, %edx
movq %r13, %rsi
movq %r14, %rdi
call _Z11checkResultPdS_i
movq (%rsp), %rdi
call cudaFree@PLT
movq 8(%rsp), %rdi
call cudaFree@PLT
movq 16(%rsp), %rdi
call cudaFree@PLT
movq %r12, %rdi
call free@PLT
movq %rbp, %rdi
call free@PLT
movq %r14, %rdi
call free@PLT
movq %r13, %rdi
call free@PLT
call cudaDeviceReset@PLT
movq 1080(%rsp), %rax
subq %fs:40, %rax
jne .L50
movl $0, %eax
addq $1096, %rsp
.cfi_remember_state
.cfi_def_cfa_offset 56
popq %rbx
.cfi_def_cfa_offset 48
popq %rbp
.cfi_def_cfa_offset 40
popq %r12
.cfi_def_cfa_offset 32
popq %r13
.cfi_def_cfa_offset 24
popq %r14
.cfi_def_cfa_offset 16
popq %r15
.cfi_def_cfa_offset 8
ret
.L48:
.cfi_restore_state
movl $1000, %ecx
movq 16(%rsp), %rdx
movq 8(%rsp), %rsi
movq (%rsp), %rdi
call _Z44__device_stub__Z19multiply_matrix_gpuPdS_S_iPdS_S_i
jmp .L43
.L49:
movl $1000, %ecx
movq 16(%rsp), %rdx
movq 8(%rsp), %rsi
movq (%rsp), %rdi
call _Z51__device_stub__Z26multiply_matrix_gpu_tilingPdS_S_iPdS_S_i
jmp .L44
.L50:
call __stack_chk_fail@PLT
.cfi_endproc
.LFE4854:
.size main, .-main
.section .rodata.str1.8
.align 8
.LC13:
.string "_Z26multiply_matrix_gpu_tilingPdS_S_i"
.align 8
.LC14:
.string "_Z19multiply_matrix_gpuPdS_S_i"
.text
.type _ZL24__sti____cudaRegisterAllv, @function
_ZL24__sti____cudaRegisterAllv:
.LFB4888:
.cfi_startproc
endbr64
pushq %rbx
.cfi_def_cfa_offset 16
.cfi_offset 3, -16
leaq _ZL15__fatDeviceText(%rip), %rdi
call __cudaRegisterFatBinary@PLT
movq %rax, %rbx
movq %rax, _ZL20__cudaFatCubinHandle(%rip)
pushq $0
.cfi_def_cfa_offset 24
pushq $0
.cfi_def_cfa_offset 32
pushq $0
.cfi_def_cfa_offset 40
pushq $0
.cfi_def_cfa_offset 48
movl $0, %r9d
movl $-1, %r8d
leaq .LC13(%rip), %rdx
movq %rdx, %rcx
leaq _Z26multiply_matrix_gpu_tilingPdS_S_i(%rip), %rsi
movq %rax, %rdi
call __cudaRegisterFunction@PLT
addq $32, %rsp
.cfi_def_cfa_offset 16
pushq $0
.cfi_def_cfa_offset 24
pushq $0
.cfi_def_cfa_offset 32
pushq $0
.cfi_def_cfa_offset 40
pushq $0
.cfi_def_cfa_offset 48
movl $0, %r9d
movl $-1, %r8d
leaq .LC14(%rip), %rdx
movq %rdx, %rcx
leaq _Z19multiply_matrix_gpuPdS_S_i(%rip), %rsi
movq %rbx, %rdi
call __cudaRegisterFunction@PLT
addq $32, %rsp
.cfi_def_cfa_offset 16
movq _ZL20__cudaFatCubinHandle(%rip), %rdi
call __cudaRegisterFatBinaryEnd@PLT
leaq _ZL26__cudaUnregisterBinaryUtilv(%rip), %rdi
call atexit@PLT
popq %rbx
.cfi_def_cfa_offset 8
ret
.cfi_endproc
.LFE4888:
.size _ZL24__sti____cudaRegisterAllv, .-_ZL24__sti____cudaRegisterAllv
.section .init_array,"aw"
.align 8
.quad _ZL24__sti____cudaRegisterAllv
.section .nvFatBinSegment,"aw"
.align 8
.type _ZL15__fatDeviceText, @object
.size _ZL15__fatDeviceText, 24
_ZL15__fatDeviceText:
.long 1180844977
.long 1
.quad fatbinData
.quad 0
.local _ZL20__cudaFatCubinHandle
.comm _ZL20__cudaFatCubinHandle,8,8
.section .rodata.cst16,"aM",@progbits,16
.align 16
.LC0:
.long -1
.long 2147483647
.long 0
.long 0
.section .rodata.cst8,"aM",@progbits,8
.align 8
.LC1:
.long -500134854
.long 1044740494
.align 8
.LC6:
.long 536870912
.long 1101820359
.align 8
.LC7:
.long 0
.long 1072693248
.section .rodata.cst4,"aM",@progbits,4
.align 4
.LC8:
.long 1232348160
.ident "GCC: (Ubuntu 13.3.0-6ubuntu2~24.04) 13.3.0"
.section .note.GNU-stack,"",@progbits
.section .note.gnu.property,"a"
.align 8
.long 1f - 0f
.long 4f - 1f
.long 5
0:
.string "GNU"
1:
.align 8
.long 0xc0000002
.long 3f - 2f
2:
.long 0x3
3:
.align 8
4: |
You are a helpful coding assistant specialized in converting CUDA source code to HIP/AMD source code. | // Matrix Multiplication in gpu with and without tiling.
// Compile with: nvcc -o test matrix_multiplication.cu -std=c++11
#include <stdio.h>
#include <stdlib.h>
#include <math.h>
#include <random>
#include <iostream>
#include <chrono>
#define TS 32
// Multiplies matrices using GPU with 2D grid
__global__ void multiply_matrix_gpu(double *matA, double *matB, double *matC, const int n) {
unsigned int ix = threadIdx.x + blockIdx.x * blockDim.x;
unsigned int iy = threadIdx.y + blockIdx.y * blockDim.y;
if (ix < n && iy < n) {
for(int k=0; k<n; k++) {
matC[iy*n+ix] += matA[iy*n+k] * matB[k*n+ix];
}
}
}
// Multiplies matrices using GPU with 2D grid plus tiling
__global__ void multiply_matrix_gpu_tiling(double *matA, double *matB, double *matC, const int n) {
unsigned int x = threadIdx.x;
unsigned int y = threadIdx.y;
unsigned int ix = blockIdx.x * blockDim.x + x;
unsigned int iy = blockIdx.y * blockDim.y + y;
__shared__ double tile_A[TS*TS];
__shared__ double tile_B[TS*TS];
double sum = 0;
for(int i=0; i < (n+TS-1)/TS; i--) {
if((iy < n) && (i*TS+x < n)) {
tile_A[y*TS+x] = matA[iy*n + i*TS + x];
} else {
tile_A[y*TS+x] = 0.0f;
}
if((ix < n) && (i*TS+y < n)) {
tile_B[y*TS+x] = matB[(i*TS+y)*n+ix];
} else {
tile_B[y*TS+x] = 0;
}
__syncthreads();
for(int j=0; j<TS; j++) {
sum += tile_A[y*TS+i] * tile_B[i*TS+x];
}
__syncthreads();
}
if (ix < n && iy < n) {
matC[ix*n+iy] += sum;
}
}
// Multiplies matrices in host
void multiply_matrix_host(double *matA, double *matB, double *matC, int n) {
for(int i = 0; i<n; i++) {
for(int j=0; j<n; j++) {
for(int k=0; k<n; k++) {
matC[i*n+j] += matA[i*n+k] * matB[j+k*n];
}
}
}
}
// Compares two matrices
void checkResult(double *hostRef, double *gpuRef, const int n) {
double epsilon = 1.0E-8;
bool match = 1;
for (int i = 0; i < n*n; i++) {
if (abs(hostRef[i] - gpuRef[i]) > epsilon) {
match = 0;
printf("host %f gpu %f\n", hostRef[i], gpuRef[i]);
break;
}
}
if (match) printf("Matrix match.\n\n");
else printf("Matrix does not not match.\n\n");
}
int main(int argc, char* argv[]) {
// Set up device
int dev = 0;
cudaDeviceProp deviceProp;
cudaGetDeviceProperties(&deviceProp, dev);
printf("Using Device %d: %s\n", dev, deviceProp.name);
cudaSetDevice(dev);
// Size of matrix
int n = 1000;
int bytes = n * n * sizeof(double*);
// Host matrix memory
double *h_a = (double *)malloc(bytes);
double *h_b = (double *)malloc(bytes);
// Results
double *hostRef = (double *)malloc(bytes);
double *gpuRef = (double *)malloc(bytes);
// Initialize matrix on host
for(int i = 0; i < n*n; i++ ) {
double rdm1 = 1 + (double)rand()/(RAND_MAX/9.0f);
double rdm2 = 1 + (double)rand()/(RAND_MAX/9.0f);
h_a[i] = rdm1;
h_b[i] = rdm2;
}
// Initialize matrix with 0s
memset(hostRef, 0, bytes);
memset(gpuRef, 0, bytes);
// Multiply matrix on host
auto start_cpu = std::chrono::high_resolution_clock::now();
multiply_matrix_host(h_a, h_b, hostRef, n);
auto end_cpu = std::chrono::high_resolution_clock::now();
// Measure total time in host
std::chrono::duration<float, std::milli> duration_ms = end_cpu - start_cpu;
printf("multiply_matrix_host elapsed %f ms\n", duration_ms.count());
// Device matrix global memory
double *d_a, *d_b, *d_c;
cudaMalloc((void **)&d_a, bytes);
cudaMalloc((void **)&d_b, bytes);
cudaMalloc((void **)&d_c, bytes);
// Transfer data from host to device
cudaMemcpy(d_a, h_a, bytes, cudaMemcpyHostToDevice);
cudaMemcpy(d_b, h_b, bytes, cudaMemcpyHostToDevice);
cudaMemset(d_c, 0, bytes); // Initialize matrix with 0s
// Kernel execution configuration
dim3 block(TS, TS);
dim3 grid((n + block.x - 1) / block.x, (n + block.y - 1) / block.y);
printf("grid.x %d grid.y %d block.x %d block.y %d\n", grid.x, grid.y, block.x, block.y);
// Execute GPU kernel
start_cpu = std::chrono::high_resolution_clock::now();
multiply_matrix_gpu<<<grid, block>>>(d_a, d_b, d_c, n);
cudaDeviceSynchronize();
end_cpu = std::chrono::high_resolution_clock::now();
// Measure total time
duration_ms = end_cpu - start_cpu;
printf("multiply_matrix_gpu elapsed %f ms\n", duration_ms.count());
// Copy result from device to host
cudaMemcpy(gpuRef, d_c, bytes, cudaMemcpyDeviceToHost);
// Check results
checkResult(hostRef, gpuRef, n);
// Repeat for tiling
start_cpu = std::chrono::high_resolution_clock::now();
multiply_matrix_gpu_tiling<<<grid, block>>>(d_a, d_b, d_c, n);
cudaDeviceSynchronize();
end_cpu = std::chrono::high_resolution_clock::now();
duration_ms = end_cpu - start_cpu;
printf("multiply_matrix_gpu_tiling elapsed %f ms\n", duration_ms.count());
cudaMemcpy(gpuRef, d_c, bytes, cudaMemcpyDeviceToHost);
checkResult(hostRef, gpuRef, n);
// Free memory
cudaFree(d_a);
cudaFree(d_b);
cudaFree(d_c);
free(h_a);
free(h_b);
free(hostRef);
free(gpuRef);
cudaDeviceReset();
return 0;
} | // Matrix Multiplication in gpu with and without tiling.
// Compile with: nvcc -o test matrix_multiplication.cu -std=c++11
#include <hip/hip_runtime.h>
#include <stdio.h>
#include <stdlib.h>
#include <math.h>
#include <random>
#include <iostream>
#include <chrono>
#define TS 32
// Multiplies matrices using GPU with 2D grid
__global__ void multiply_matrix_gpu(double *matA, double *matB, double *matC, const int n) {
unsigned int ix = threadIdx.x + blockIdx.x * blockDim.x;
unsigned int iy = threadIdx.y + blockIdx.y * blockDim.y;
if (ix < n && iy < n) {
for(int k=0; k<n; k++) {
matC[iy*n+ix] += matA[iy*n+k] * matB[k*n+ix];
}
}
}
// Multiplies matrices using GPU with 2D grid plus tiling
__global__ void multiply_matrix_gpu_tiling(double *matA, double *matB, double *matC, const int n) {
unsigned int x = threadIdx.x;
unsigned int y = threadIdx.y;
unsigned int ix = blockIdx.x * blockDim.x + x;
unsigned int iy = blockIdx.y * blockDim.y + y;
__shared__ double tile_A[TS*TS];
__shared__ double tile_B[TS*TS];
double sum = 0;
for(int i=0; i < (n+TS-1)/TS; i--) {
if((iy < n) && (i*TS+x < n)) {
tile_A[y*TS+x] = matA[iy*n + i*TS + x];
} else {
tile_A[y*TS+x] = 0.0f;
}
if((ix < n) && (i*TS+y < n)) {
tile_B[y*TS+x] = matB[(i*TS+y)*n+ix];
} else {
tile_B[y*TS+x] = 0;
}
__syncthreads();
for(int j=0; j<TS; j++) {
sum += tile_A[y*TS+i] * tile_B[i*TS+x];
}
__syncthreads();
}
if (ix < n && iy < n) {
matC[ix*n+iy] += sum;
}
}
// Multiplies matrices in host
void multiply_matrix_host(double *matA, double *matB, double *matC, int n) {
for(int i = 0; i<n; i++) {
for(int j=0; j<n; j++) {
for(int k=0; k<n; k++) {
matC[i*n+j] += matA[i*n+k] * matB[j+k*n];
}
}
}
}
// Compares two matrices
void checkResult(double *hostRef, double *gpuRef, const int n) {
double epsilon = 1.0E-8;
bool match = 1;
for (int i = 0; i < n*n; i++) {
if (abs(hostRef[i] - gpuRef[i]) > epsilon) {
match = 0;
printf("host %f gpu %f\n", hostRef[i], gpuRef[i]);
break;
}
}
if (match) printf("Matrix match.\n\n");
else printf("Matrix does not not match.\n\n");
}
int main(int argc, char* argv[]) {
// Set up device
int dev = 0;
hipDeviceProp_t deviceProp;
hipGetDeviceProperties(&deviceProp, dev);
printf("Using Device %d: %s\n", dev, deviceProp.name);
hipSetDevice(dev);
// Size of matrix
int n = 1000;
int bytes = n * n * sizeof(double*);
// Host matrix memory
double *h_a = (double *)malloc(bytes);
double *h_b = (double *)malloc(bytes);
// Results
double *hostRef = (double *)malloc(bytes);
double *gpuRef = (double *)malloc(bytes);
// Initialize matrix on host
for(int i = 0; i < n*n; i++ ) {
double rdm1 = 1 + (double)rand()/(RAND_MAX/9.0f);
double rdm2 = 1 + (double)rand()/(RAND_MAX/9.0f);
h_a[i] = rdm1;
h_b[i] = rdm2;
}
// Initialize matrix with 0s
memset(hostRef, 0, bytes);
memset(gpuRef, 0, bytes);
// Multiply matrix on host
auto start_cpu = std::chrono::high_resolution_clock::now();
multiply_matrix_host(h_a, h_b, hostRef, n);
auto end_cpu = std::chrono::high_resolution_clock::now();
// Measure total time in host
std::chrono::duration<float, std::milli> duration_ms = end_cpu - start_cpu;
printf("multiply_matrix_host elapsed %f ms\n", duration_ms.count());
// Device matrix global memory
double *d_a, *d_b, *d_c;
hipMalloc((void **)&d_a, bytes);
hipMalloc((void **)&d_b, bytes);
hipMalloc((void **)&d_c, bytes);
// Transfer data from host to device
hipMemcpy(d_a, h_a, bytes, hipMemcpyHostToDevice);
hipMemcpy(d_b, h_b, bytes, hipMemcpyHostToDevice);
hipMemset(d_c, 0, bytes); // Initialize matrix with 0s
// Kernel execution configuration
dim3 block(TS, TS);
dim3 grid((n + block.x - 1) / block.x, (n + block.y - 1) / block.y);
printf("grid.x %d grid.y %d block.x %d block.y %d\n", grid.x, grid.y, block.x, block.y);
// Execute GPU kernel
start_cpu = std::chrono::high_resolution_clock::now();
multiply_matrix_gpu<<<grid, block>>>(d_a, d_b, d_c, n);
hipDeviceSynchronize();
end_cpu = std::chrono::high_resolution_clock::now();
// Measure total time
duration_ms = end_cpu - start_cpu;
printf("multiply_matrix_gpu elapsed %f ms\n", duration_ms.count());
// Copy result from device to host
hipMemcpy(gpuRef, d_c, bytes, hipMemcpyDeviceToHost);
// Check results
checkResult(hostRef, gpuRef, n);
// Repeat for tiling
start_cpu = std::chrono::high_resolution_clock::now();
multiply_matrix_gpu_tiling<<<grid, block>>>(d_a, d_b, d_c, n);
hipDeviceSynchronize();
end_cpu = std::chrono::high_resolution_clock::now();
duration_ms = end_cpu - start_cpu;
printf("multiply_matrix_gpu_tiling elapsed %f ms\n", duration_ms.count());
hipMemcpy(gpuRef, d_c, bytes, hipMemcpyDeviceToHost);
checkResult(hostRef, gpuRef, n);
// Free memory
hipFree(d_a);
hipFree(d_b);
hipFree(d_c);
free(h_a);
free(h_b);
free(hostRef);
free(gpuRef);
hipDeviceReset();
return 0;
} |
You are a helpful coding assistant specialized in converting HIP source code to AMD device assembly. | // Matrix Multiplication in gpu with and without tiling.
// Compile with: nvcc -o test matrix_multiplication.cu -std=c++11
#include <hip/hip_runtime.h>
#include <stdio.h>
#include <stdlib.h>
#include <math.h>
#include <random>
#include <iostream>
#include <chrono>
#define TS 32
// Multiplies matrices using GPU with 2D grid
__global__ void multiply_matrix_gpu(double *matA, double *matB, double *matC, const int n) {
unsigned int ix = threadIdx.x + blockIdx.x * blockDim.x;
unsigned int iy = threadIdx.y + blockIdx.y * blockDim.y;
if (ix < n && iy < n) {
for(int k=0; k<n; k++) {
matC[iy*n+ix] += matA[iy*n+k] * matB[k*n+ix];
}
}
}
// Multiplies matrices using GPU with 2D grid plus tiling
__global__ void multiply_matrix_gpu_tiling(double *matA, double *matB, double *matC, const int n) {
unsigned int x = threadIdx.x;
unsigned int y = threadIdx.y;
unsigned int ix = blockIdx.x * blockDim.x + x;
unsigned int iy = blockIdx.y * blockDim.y + y;
__shared__ double tile_A[TS*TS];
__shared__ double tile_B[TS*TS];
double sum = 0;
for(int i=0; i < (n+TS-1)/TS; i--) {
if((iy < n) && (i*TS+x < n)) {
tile_A[y*TS+x] = matA[iy*n + i*TS + x];
} else {
tile_A[y*TS+x] = 0.0f;
}
if((ix < n) && (i*TS+y < n)) {
tile_B[y*TS+x] = matB[(i*TS+y)*n+ix];
} else {
tile_B[y*TS+x] = 0;
}
__syncthreads();
for(int j=0; j<TS; j++) {
sum += tile_A[y*TS+i] * tile_B[i*TS+x];
}
__syncthreads();
}
if (ix < n && iy < n) {
matC[ix*n+iy] += sum;
}
}
// Multiplies matrices in host
void multiply_matrix_host(double *matA, double *matB, double *matC, int n) {
for(int i = 0; i<n; i++) {
for(int j=0; j<n; j++) {
for(int k=0; k<n; k++) {
matC[i*n+j] += matA[i*n+k] * matB[j+k*n];
}
}
}
}
// Compares two matrices
void checkResult(double *hostRef, double *gpuRef, const int n) {
double epsilon = 1.0E-8;
bool match = 1;
for (int i = 0; i < n*n; i++) {
if (abs(hostRef[i] - gpuRef[i]) > epsilon) {
match = 0;
printf("host %f gpu %f\n", hostRef[i], gpuRef[i]);
break;
}
}
if (match) printf("Matrix match.\n\n");
else printf("Matrix does not not match.\n\n");
}
int main(int argc, char* argv[]) {
// Set up device
int dev = 0;
hipDeviceProp_t deviceProp;
hipGetDeviceProperties(&deviceProp, dev);
printf("Using Device %d: %s\n", dev, deviceProp.name);
hipSetDevice(dev);
// Size of matrix
int n = 1000;
int bytes = n * n * sizeof(double*);
// Host matrix memory
double *h_a = (double *)malloc(bytes);
double *h_b = (double *)malloc(bytes);
// Results
double *hostRef = (double *)malloc(bytes);
double *gpuRef = (double *)malloc(bytes);
// Initialize matrix on host
for(int i = 0; i < n*n; i++ ) {
double rdm1 = 1 + (double)rand()/(RAND_MAX/9.0f);
double rdm2 = 1 + (double)rand()/(RAND_MAX/9.0f);
h_a[i] = rdm1;
h_b[i] = rdm2;
}
// Initialize matrix with 0s
memset(hostRef, 0, bytes);
memset(gpuRef, 0, bytes);
// Multiply matrix on host
auto start_cpu = std::chrono::high_resolution_clock::now();
multiply_matrix_host(h_a, h_b, hostRef, n);
auto end_cpu = std::chrono::high_resolution_clock::now();
// Measure total time in host
std::chrono::duration<float, std::milli> duration_ms = end_cpu - start_cpu;
printf("multiply_matrix_host elapsed %f ms\n", duration_ms.count());
// Device matrix global memory
double *d_a, *d_b, *d_c;
hipMalloc((void **)&d_a, bytes);
hipMalloc((void **)&d_b, bytes);
hipMalloc((void **)&d_c, bytes);
// Transfer data from host to device
hipMemcpy(d_a, h_a, bytes, hipMemcpyHostToDevice);
hipMemcpy(d_b, h_b, bytes, hipMemcpyHostToDevice);
hipMemset(d_c, 0, bytes); // Initialize matrix with 0s
// Kernel execution configuration
dim3 block(TS, TS);
dim3 grid((n + block.x - 1) / block.x, (n + block.y - 1) / block.y);
printf("grid.x %d grid.y %d block.x %d block.y %d\n", grid.x, grid.y, block.x, block.y);
// Execute GPU kernel
start_cpu = std::chrono::high_resolution_clock::now();
multiply_matrix_gpu<<<grid, block>>>(d_a, d_b, d_c, n);
hipDeviceSynchronize();
end_cpu = std::chrono::high_resolution_clock::now();
// Measure total time
duration_ms = end_cpu - start_cpu;
printf("multiply_matrix_gpu elapsed %f ms\n", duration_ms.count());
// Copy result from device to host
hipMemcpy(gpuRef, d_c, bytes, hipMemcpyDeviceToHost);
// Check results
checkResult(hostRef, gpuRef, n);
// Repeat for tiling
start_cpu = std::chrono::high_resolution_clock::now();
multiply_matrix_gpu_tiling<<<grid, block>>>(d_a, d_b, d_c, n);
hipDeviceSynchronize();
end_cpu = std::chrono::high_resolution_clock::now();
duration_ms = end_cpu - start_cpu;
printf("multiply_matrix_gpu_tiling elapsed %f ms\n", duration_ms.count());
hipMemcpy(gpuRef, d_c, bytes, hipMemcpyDeviceToHost);
checkResult(hostRef, gpuRef, n);
// Free memory
hipFree(d_a);
hipFree(d_b);
hipFree(d_c);
free(h_a);
free(h_b);
free(hostRef);
free(gpuRef);
hipDeviceReset();
return 0;
} | .text
.amdgcn_target "amdgcn-amd-amdhsa--gfx1100"
.protected _Z19multiply_matrix_gpuPdS_S_i
.globl _Z19multiply_matrix_gpuPdS_S_i
.p2align 8
.type _Z19multiply_matrix_gpuPdS_S_i,@function
_Z19multiply_matrix_gpuPdS_S_i:
s_clause 0x1
s_load_b32 s2, s[0:1], 0x2c
s_load_b32 s4, s[0:1], 0x18
v_and_b32_e32 v2, 0x3ff, v0
v_bfe_u32 v3, v0, 10, 10
s_mov_b32 s5, 0
s_waitcnt lgkmcnt(0)
s_and_b32 s3, s2, 0xffff
s_lshr_b32 s2, s2, 16
v_mad_u64_u32 v[0:1], null, s14, s3, v[2:3]
v_mad_u64_u32 v[1:2], null, s15, s2, v[3:4]
s_cmp_gt_i32 s4, 0
s_cselect_b32 s2, -1, 0
s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
v_max_u32_e32 v2, v0, v1
v_cmp_gt_u32_e32 vcc_lo, s4, v2
s_and_b32 s2, vcc_lo, s2
s_delay_alu instid0(SALU_CYCLE_1)
s_and_saveexec_b32 s3, s2
s_cbranch_execz .LBB0_3
s_load_b64 s[2:3], s[0:1], 0x10
v_mul_lo_u32 v6, v1, s4
s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
v_dual_mov_b32 v2, 0 :: v_dual_add_nc_u32 v1, v6, v0
v_lshlrev_b64 v[2:3], 3, v[1:2]
s_waitcnt lgkmcnt(0)
s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_2)
v_add_co_u32 v2, vcc_lo, s2, v2
v_add_co_ci_u32_e32 v3, vcc_lo, s3, v3, vcc_lo
s_load_b128 s[0:3], s[0:1], 0x0
global_load_b64 v[4:5], v[2:3], off
.p2align 6
.LBB0_2:
v_dual_mov_b32 v8, 0 :: v_dual_add_nc_u32 v7, s5, v6
s_add_i32 s5, s5, 1
s_delay_alu instid0(SALU_CYCLE_1) | instskip(NEXT) | instid1(VALU_DEP_1)
s_cmp_lg_u32 s4, s5
v_mov_b32_e32 v1, v8
s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
v_lshlrev_b64 v[7:8], 3, v[7:8]
v_lshlrev_b64 v[9:10], 3, v[0:1]
v_add_nc_u32_e32 v0, s4, v0
s_waitcnt lgkmcnt(0)
s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_4)
v_add_co_u32 v7, vcc_lo, s0, v7
v_add_co_ci_u32_e32 v8, vcc_lo, s1, v8, vcc_lo
s_delay_alu instid0(VALU_DEP_4)
v_add_co_u32 v9, vcc_lo, s2, v9
v_add_co_ci_u32_e32 v10, vcc_lo, s3, v10, vcc_lo
global_load_b64 v[7:8], v[7:8], off
global_load_b64 v[9:10], v[9:10], off
s_waitcnt vmcnt(0)
v_fma_f64 v[4:5], v[7:8], v[9:10], v[4:5]
global_store_b64 v[2:3], v[4:5], off
s_cbranch_scc1 .LBB0_2
.LBB0_3:
s_nop 0
s_sendmsg sendmsg(MSG_DEALLOC_VGPRS)
s_endpgm
.section .rodata,"a",@progbits
.p2align 6, 0x0
.amdhsa_kernel _Z19multiply_matrix_gpuPdS_S_i
.amdhsa_group_segment_fixed_size 0
.amdhsa_private_segment_fixed_size 0
.amdhsa_kernarg_size 288
.amdhsa_user_sgpr_count 14
.amdhsa_user_sgpr_dispatch_ptr 0
.amdhsa_user_sgpr_queue_ptr 0
.amdhsa_user_sgpr_kernarg_segment_ptr 1
.amdhsa_user_sgpr_dispatch_id 0
.amdhsa_user_sgpr_private_segment_size 0
.amdhsa_wavefront_size32 1
.amdhsa_uses_dynamic_stack 0
.amdhsa_enable_private_segment 0
.amdhsa_system_sgpr_workgroup_id_x 1
.amdhsa_system_sgpr_workgroup_id_y 1
.amdhsa_system_sgpr_workgroup_id_z 0
.amdhsa_system_sgpr_workgroup_info 0
.amdhsa_system_vgpr_workitem_id 1
.amdhsa_next_free_vgpr 11
.amdhsa_next_free_sgpr 16
.amdhsa_float_round_mode_32 0
.amdhsa_float_round_mode_16_64 0
.amdhsa_float_denorm_mode_32 3
.amdhsa_float_denorm_mode_16_64 3
.amdhsa_dx10_clamp 1
.amdhsa_ieee_mode 1
.amdhsa_fp16_overflow 0
.amdhsa_workgroup_processor_mode 1
.amdhsa_memory_ordered 1
.amdhsa_forward_progress 0
.amdhsa_shared_vgpr_count 0
.amdhsa_exception_fp_ieee_invalid_op 0
.amdhsa_exception_fp_denorm_src 0
.amdhsa_exception_fp_ieee_div_zero 0
.amdhsa_exception_fp_ieee_overflow 0
.amdhsa_exception_fp_ieee_underflow 0
.amdhsa_exception_fp_ieee_inexact 0
.amdhsa_exception_int_div_zero 0
.end_amdhsa_kernel
.text
.Lfunc_end0:
.size _Z19multiply_matrix_gpuPdS_S_i, .Lfunc_end0-_Z19multiply_matrix_gpuPdS_S_i
.section .AMDGPU.csdata,"",@progbits
.text
.protected _Z26multiply_matrix_gpu_tilingPdS_S_i
.globl _Z26multiply_matrix_gpu_tilingPdS_S_i
.p2align 8
.type _Z26multiply_matrix_gpu_tilingPdS_S_i,@function
_Z26multiply_matrix_gpu_tilingPdS_S_i:
s_load_b32 s2, s[0:1], 0x18
s_mov_b32 s3, -1
s_waitcnt lgkmcnt(0)
s_cmp_lt_i32 s2, 1
s_cbranch_scc0 .LBB1_4
s_load_b32 s3, s[0:1], 0x2c
v_and_b32_e32 v2, 0x3ff, v0
v_bfe_u32 v3, v0, 10, 10
s_waitcnt lgkmcnt(0)
s_and_b32 s4, s3, 0xffff
s_lshr_b32 s3, s3, 16
s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_2) | instid1(VALU_DEP_1)
v_mad_u64_u32 v[0:1], null, s14, s4, v[2:3]
v_mad_u64_u32 v[1:2], null, s15, s3, v[3:4]
s_mov_b32 s3, exec_lo
v_max_u32_e32 v2, v0, v1
s_delay_alu instid0(VALU_DEP_1)
v_cmpx_gt_u32_e64 s2, v2
s_cbranch_execz .LBB1_3
s_load_b64 s[0:1], s[0:1], 0x10
v_mad_u64_u32 v[2:3], null, v0, s2, v[1:2]
v_mov_b32_e32 v3, 0
s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
v_lshlrev_b64 v[0:1], 3, v[2:3]
s_waitcnt lgkmcnt(0)
v_add_co_u32 v0, vcc_lo, s0, v0
s_delay_alu instid0(VALU_DEP_2)
v_add_co_ci_u32_e32 v1, vcc_lo, s1, v1, vcc_lo
global_load_b64 v[2:3], v[0:1], off
s_waitcnt vmcnt(0)
v_add_f64 v[2:3], v[2:3], 0
global_store_b64 v[0:1], v[2:3], off
.LBB1_3:
s_or_b32 exec_lo, exec_lo, s3
s_mov_b32 s3, 0
.LBB1_4:
s_delay_alu instid0(SALU_CYCLE_1)
s_and_not1_b32 vcc_lo, exec_lo, s3
s_cbranch_vccnz .LBB1_7
s_mov_b32 vcc_lo, 0
.LBB1_6:
s_waitcnt_vscnt null, 0x0
s_barrier
buffer_gl0_inv
s_barrier
buffer_gl0_inv
s_cbranch_vccz .LBB1_6
.LBB1_7:
s_nop 0
s_sendmsg sendmsg(MSG_DEALLOC_VGPRS)
s_endpgm
.section .rodata,"a",@progbits
.p2align 6, 0x0
.amdhsa_kernel _Z26multiply_matrix_gpu_tilingPdS_S_i
.amdhsa_group_segment_fixed_size 0
.amdhsa_private_segment_fixed_size 0
.amdhsa_kernarg_size 288
.amdhsa_user_sgpr_count 14
.amdhsa_user_sgpr_dispatch_ptr 0
.amdhsa_user_sgpr_queue_ptr 0
.amdhsa_user_sgpr_kernarg_segment_ptr 1
.amdhsa_user_sgpr_dispatch_id 0
.amdhsa_user_sgpr_private_segment_size 0
.amdhsa_wavefront_size32 1
.amdhsa_uses_dynamic_stack 0
.amdhsa_enable_private_segment 0
.amdhsa_system_sgpr_workgroup_id_x 1
.amdhsa_system_sgpr_workgroup_id_y 1
.amdhsa_system_sgpr_workgroup_id_z 0
.amdhsa_system_sgpr_workgroup_info 0
.amdhsa_system_vgpr_workitem_id 1
.amdhsa_next_free_vgpr 5
.amdhsa_next_free_sgpr 16
.amdhsa_float_round_mode_32 0
.amdhsa_float_round_mode_16_64 0
.amdhsa_float_denorm_mode_32 3
.amdhsa_float_denorm_mode_16_64 3
.amdhsa_dx10_clamp 1
.amdhsa_ieee_mode 1
.amdhsa_fp16_overflow 0
.amdhsa_workgroup_processor_mode 1
.amdhsa_memory_ordered 1
.amdhsa_forward_progress 0
.amdhsa_shared_vgpr_count 0
.amdhsa_exception_fp_ieee_invalid_op 0
.amdhsa_exception_fp_denorm_src 0
.amdhsa_exception_fp_ieee_div_zero 0
.amdhsa_exception_fp_ieee_overflow 0
.amdhsa_exception_fp_ieee_underflow 0
.amdhsa_exception_fp_ieee_inexact 0
.amdhsa_exception_int_div_zero 0
.end_amdhsa_kernel
.text
.Lfunc_end1:
.size _Z26multiply_matrix_gpu_tilingPdS_S_i, .Lfunc_end1-_Z26multiply_matrix_gpu_tilingPdS_S_i
.section .AMDGPU.csdata,"",@progbits
.text
.p2alignl 7, 3214868480
.fill 96, 4, 3214868480
.type __hip_cuid_,@object
.section .bss,"aw",@nobits
.globl __hip_cuid_
__hip_cuid_:
.byte 0
.size __hip_cuid_, 1
.ident "AMD clang version 18.0.0git (https://github.com/RadeonOpenCompute/llvm-project roc-6.3.2 25012 e5bf7e55c91490b07c49d8960fa7983d864936c4)"
.section ".note.GNU-stack","",@progbits
.addrsig
.addrsig_sym __hip_cuid_
.amdgpu_metadata
---
amdhsa.kernels:
- .args:
- .address_space: global
.offset: 0
.size: 8
.value_kind: global_buffer
- .address_space: global
.offset: 8
.size: 8
.value_kind: global_buffer
- .address_space: global
.offset: 16
.size: 8
.value_kind: global_buffer
- .offset: 24
.size: 4
.value_kind: by_value
- .offset: 32
.size: 4
.value_kind: hidden_block_count_x
- .offset: 36
.size: 4
.value_kind: hidden_block_count_y
- .offset: 40
.size: 4
.value_kind: hidden_block_count_z
- .offset: 44
.size: 2
.value_kind: hidden_group_size_x
- .offset: 46
.size: 2
.value_kind: hidden_group_size_y
- .offset: 48
.size: 2
.value_kind: hidden_group_size_z
- .offset: 50
.size: 2
.value_kind: hidden_remainder_x
- .offset: 52
.size: 2
.value_kind: hidden_remainder_y
- .offset: 54
.size: 2
.value_kind: hidden_remainder_z
- .offset: 72
.size: 8
.value_kind: hidden_global_offset_x
- .offset: 80
.size: 8
.value_kind: hidden_global_offset_y
- .offset: 88
.size: 8
.value_kind: hidden_global_offset_z
- .offset: 96
.size: 2
.value_kind: hidden_grid_dims
.group_segment_fixed_size: 0
.kernarg_segment_align: 8
.kernarg_segment_size: 288
.language: OpenCL C
.language_version:
- 2
- 0
.max_flat_workgroup_size: 1024
.name: _Z19multiply_matrix_gpuPdS_S_i
.private_segment_fixed_size: 0
.sgpr_count: 18
.sgpr_spill_count: 0
.symbol: _Z19multiply_matrix_gpuPdS_S_i.kd
.uniform_work_group_size: 1
.uses_dynamic_stack: false
.vgpr_count: 11
.vgpr_spill_count: 0
.wavefront_size: 32
.workgroup_processor_mode: 1
- .args:
- .address_space: global
.offset: 0
.size: 8
.value_kind: global_buffer
- .address_space: global
.offset: 8
.size: 8
.value_kind: global_buffer
- .address_space: global
.offset: 16
.size: 8
.value_kind: global_buffer
- .offset: 24
.size: 4
.value_kind: by_value
- .offset: 32
.size: 4
.value_kind: hidden_block_count_x
- .offset: 36
.size: 4
.value_kind: hidden_block_count_y
- .offset: 40
.size: 4
.value_kind: hidden_block_count_z
- .offset: 44
.size: 2
.value_kind: hidden_group_size_x
- .offset: 46
.size: 2
.value_kind: hidden_group_size_y
- .offset: 48
.size: 2
.value_kind: hidden_group_size_z
- .offset: 50
.size: 2
.value_kind: hidden_remainder_x
- .offset: 52
.size: 2
.value_kind: hidden_remainder_y
- .offset: 54
.size: 2
.value_kind: hidden_remainder_z
- .offset: 72
.size: 8
.value_kind: hidden_global_offset_x
- .offset: 80
.size: 8
.value_kind: hidden_global_offset_y
- .offset: 88
.size: 8
.value_kind: hidden_global_offset_z
- .offset: 96
.size: 2
.value_kind: hidden_grid_dims
.group_segment_fixed_size: 0
.kernarg_segment_align: 8
.kernarg_segment_size: 288
.language: OpenCL C
.language_version:
- 2
- 0
.max_flat_workgroup_size: 1024
.name: _Z26multiply_matrix_gpu_tilingPdS_S_i
.private_segment_fixed_size: 0
.sgpr_count: 18
.sgpr_spill_count: 0
.symbol: _Z26multiply_matrix_gpu_tilingPdS_S_i.kd
.uniform_work_group_size: 1
.uses_dynamic_stack: false
.vgpr_count: 5
.vgpr_spill_count: 0
.wavefront_size: 32
.workgroup_processor_mode: 1
amdhsa.target: amdgcn-amd-amdhsa--gfx1100
amdhsa.version:
- 1
- 2
...
.end_amdgpu_metadata |
You are a helpful coding assistant specialized in converting HIP source code to AMD host assembly. | // Matrix Multiplication in gpu with and without tiling.
// Compile with: nvcc -o test matrix_multiplication.cu -std=c++11
#include <hip/hip_runtime.h>
#include <stdio.h>
#include <stdlib.h>
#include <math.h>
#include <random>
#include <iostream>
#include <chrono>
#define TS 32
// Multiplies matrices using GPU with 2D grid
__global__ void multiply_matrix_gpu(double *matA, double *matB, double *matC, const int n) {
unsigned int ix = threadIdx.x + blockIdx.x * blockDim.x;
unsigned int iy = threadIdx.y + blockIdx.y * blockDim.y;
if (ix < n && iy < n) {
for(int k=0; k<n; k++) {
matC[iy*n+ix] += matA[iy*n+k] * matB[k*n+ix];
}
}
}
// Multiplies matrices using GPU with 2D grid plus tiling
__global__ void multiply_matrix_gpu_tiling(double *matA, double *matB, double *matC, const int n) {
unsigned int x = threadIdx.x;
unsigned int y = threadIdx.y;
unsigned int ix = blockIdx.x * blockDim.x + x;
unsigned int iy = blockIdx.y * blockDim.y + y;
__shared__ double tile_A[TS*TS];
__shared__ double tile_B[TS*TS];
double sum = 0;
for(int i=0; i < (n+TS-1)/TS; i--) {
if((iy < n) && (i*TS+x < n)) {
tile_A[y*TS+x] = matA[iy*n + i*TS + x];
} else {
tile_A[y*TS+x] = 0.0f;
}
if((ix < n) && (i*TS+y < n)) {
tile_B[y*TS+x] = matB[(i*TS+y)*n+ix];
} else {
tile_B[y*TS+x] = 0;
}
__syncthreads();
for(int j=0; j<TS; j++) {
sum += tile_A[y*TS+i] * tile_B[i*TS+x];
}
__syncthreads();
}
if (ix < n && iy < n) {
matC[ix*n+iy] += sum;
}
}
// Multiplies matrices in host
void multiply_matrix_host(double *matA, double *matB, double *matC, int n) {
for(int i = 0; i<n; i++) {
for(int j=0; j<n; j++) {
for(int k=0; k<n; k++) {
matC[i*n+j] += matA[i*n+k] * matB[j+k*n];
}
}
}
}
// Compares two matrices
void checkResult(double *hostRef, double *gpuRef, const int n) {
double epsilon = 1.0E-8;
bool match = 1;
for (int i = 0; i < n*n; i++) {
if (abs(hostRef[i] - gpuRef[i]) > epsilon) {
match = 0;
printf("host %f gpu %f\n", hostRef[i], gpuRef[i]);
break;
}
}
if (match) printf("Matrix match.\n\n");
else printf("Matrix does not not match.\n\n");
}
int main(int argc, char* argv[]) {
// Set up device
int dev = 0;
hipDeviceProp_t deviceProp;
hipGetDeviceProperties(&deviceProp, dev);
printf("Using Device %d: %s\n", dev, deviceProp.name);
hipSetDevice(dev);
// Size of matrix
int n = 1000;
int bytes = n * n * sizeof(double*);
// Host matrix memory
double *h_a = (double *)malloc(bytes);
double *h_b = (double *)malloc(bytes);
// Results
double *hostRef = (double *)malloc(bytes);
double *gpuRef = (double *)malloc(bytes);
// Initialize matrix on host
for(int i = 0; i < n*n; i++ ) {
double rdm1 = 1 + (double)rand()/(RAND_MAX/9.0f);
double rdm2 = 1 + (double)rand()/(RAND_MAX/9.0f);
h_a[i] = rdm1;
h_b[i] = rdm2;
}
// Initialize matrix with 0s
memset(hostRef, 0, bytes);
memset(gpuRef, 0, bytes);
// Multiply matrix on host
auto start_cpu = std::chrono::high_resolution_clock::now();
multiply_matrix_host(h_a, h_b, hostRef, n);
auto end_cpu = std::chrono::high_resolution_clock::now();
// Measure total time in host
std::chrono::duration<float, std::milli> duration_ms = end_cpu - start_cpu;
printf("multiply_matrix_host elapsed %f ms\n", duration_ms.count());
// Device matrix global memory
double *d_a, *d_b, *d_c;
hipMalloc((void **)&d_a, bytes);
hipMalloc((void **)&d_b, bytes);
hipMalloc((void **)&d_c, bytes);
// Transfer data from host to device
hipMemcpy(d_a, h_a, bytes, hipMemcpyHostToDevice);
hipMemcpy(d_b, h_b, bytes, hipMemcpyHostToDevice);
hipMemset(d_c, 0, bytes); // Initialize matrix with 0s
// Kernel execution configuration
dim3 block(TS, TS);
dim3 grid((n + block.x - 1) / block.x, (n + block.y - 1) / block.y);
printf("grid.x %d grid.y %d block.x %d block.y %d\n", grid.x, grid.y, block.x, block.y);
// Execute GPU kernel
start_cpu = std::chrono::high_resolution_clock::now();
multiply_matrix_gpu<<<grid, block>>>(d_a, d_b, d_c, n);
hipDeviceSynchronize();
end_cpu = std::chrono::high_resolution_clock::now();
// Measure total time
duration_ms = end_cpu - start_cpu;
printf("multiply_matrix_gpu elapsed %f ms\n", duration_ms.count());
// Copy result from device to host
hipMemcpy(gpuRef, d_c, bytes, hipMemcpyDeviceToHost);
// Check results
checkResult(hostRef, gpuRef, n);
// Repeat for tiling
start_cpu = std::chrono::high_resolution_clock::now();
multiply_matrix_gpu_tiling<<<grid, block>>>(d_a, d_b, d_c, n);
hipDeviceSynchronize();
end_cpu = std::chrono::high_resolution_clock::now();
duration_ms = end_cpu - start_cpu;
printf("multiply_matrix_gpu_tiling elapsed %f ms\n", duration_ms.count());
hipMemcpy(gpuRef, d_c, bytes, hipMemcpyDeviceToHost);
checkResult(hostRef, gpuRef, n);
// Free memory
hipFree(d_a);
hipFree(d_b);
hipFree(d_c);
free(h_a);
free(h_b);
free(hostRef);
free(gpuRef);
hipDeviceReset();
return 0;
} | .text
.file "matrix_multiplication.hip"
# Start of file scope inline assembly
.globl _ZSt21ios_base_library_initv
# End of file scope inline assembly
.globl _Z34__device_stub__multiply_matrix_gpuPdS_S_i # -- Begin function _Z34__device_stub__multiply_matrix_gpuPdS_S_i
.p2align 4, 0x90
.type _Z34__device_stub__multiply_matrix_gpuPdS_S_i,@function
_Z34__device_stub__multiply_matrix_gpuPdS_S_i: # @_Z34__device_stub__multiply_matrix_gpuPdS_S_i
.cfi_startproc
# %bb.0:
subq $120, %rsp
.cfi_def_cfa_offset 128
movq %rdi, 72(%rsp)
movq %rsi, 64(%rsp)
movq %rdx, 56(%rsp)
movl %ecx, 4(%rsp)
leaq 72(%rsp), %rax
movq %rax, 80(%rsp)
leaq 64(%rsp), %rax
movq %rax, 88(%rsp)
leaq 56(%rsp), %rax
movq %rax, 96(%rsp)
leaq 4(%rsp), %rax
movq %rax, 104(%rsp)
leaq 40(%rsp), %rdi
leaq 24(%rsp), %rsi
leaq 16(%rsp), %rdx
leaq 8(%rsp), %rcx
callq __hipPopCallConfiguration
movq 40(%rsp), %rsi
movl 48(%rsp), %edx
movq 24(%rsp), %rcx
movl 32(%rsp), %r8d
leaq 80(%rsp), %r9
movl $_Z19multiply_matrix_gpuPdS_S_i, %edi
pushq 8(%rsp)
.cfi_adjust_cfa_offset 8
pushq 24(%rsp)
.cfi_adjust_cfa_offset 8
callq hipLaunchKernel
addq $136, %rsp
.cfi_adjust_cfa_offset -136
retq
.Lfunc_end0:
.size _Z34__device_stub__multiply_matrix_gpuPdS_S_i, .Lfunc_end0-_Z34__device_stub__multiply_matrix_gpuPdS_S_i
.cfi_endproc
# -- End function
.globl _Z41__device_stub__multiply_matrix_gpu_tilingPdS_S_i # -- Begin function _Z41__device_stub__multiply_matrix_gpu_tilingPdS_S_i
.p2align 4, 0x90
.type _Z41__device_stub__multiply_matrix_gpu_tilingPdS_S_i,@function
_Z41__device_stub__multiply_matrix_gpu_tilingPdS_S_i: # @_Z41__device_stub__multiply_matrix_gpu_tilingPdS_S_i
.cfi_startproc
# %bb.0:
subq $120, %rsp
.cfi_def_cfa_offset 128
movq %rdi, 72(%rsp)
movq %rsi, 64(%rsp)
movq %rdx, 56(%rsp)
movl %ecx, 4(%rsp)
leaq 72(%rsp), %rax
movq %rax, 80(%rsp)
leaq 64(%rsp), %rax
movq %rax, 88(%rsp)
leaq 56(%rsp), %rax
movq %rax, 96(%rsp)
leaq 4(%rsp), %rax
movq %rax, 104(%rsp)
leaq 40(%rsp), %rdi
leaq 24(%rsp), %rsi
leaq 16(%rsp), %rdx
leaq 8(%rsp), %rcx
callq __hipPopCallConfiguration
movq 40(%rsp), %rsi
movl 48(%rsp), %edx
movq 24(%rsp), %rcx
movl 32(%rsp), %r8d
leaq 80(%rsp), %r9
movl $_Z26multiply_matrix_gpu_tilingPdS_S_i, %edi
pushq 8(%rsp)
.cfi_adjust_cfa_offset 8
pushq 24(%rsp)
.cfi_adjust_cfa_offset 8
callq hipLaunchKernel
addq $136, %rsp
.cfi_adjust_cfa_offset -136
retq
.Lfunc_end1:
.size _Z41__device_stub__multiply_matrix_gpu_tilingPdS_S_i, .Lfunc_end1-_Z41__device_stub__multiply_matrix_gpu_tilingPdS_S_i
.cfi_endproc
# -- End function
.globl _Z20multiply_matrix_hostPdS_S_i # -- Begin function _Z20multiply_matrix_hostPdS_S_i
.p2align 4, 0x90
.type _Z20multiply_matrix_hostPdS_S_i,@function
_Z20multiply_matrix_hostPdS_S_i: # @_Z20multiply_matrix_hostPdS_S_i
.cfi_startproc
# %bb.0:
testl %ecx, %ecx
jle .LBB2_8
# %bb.1: # %.preheader23.lr.ph
pushq %r15
.cfi_def_cfa_offset 16
pushq %r14
.cfi_def_cfa_offset 24
pushq %r13
.cfi_def_cfa_offset 32
pushq %r12
.cfi_def_cfa_offset 40
pushq %rbx
.cfi_def_cfa_offset 48
.cfi_offset %rbx, -48
.cfi_offset %r12, -40
.cfi_offset %r13, -32
.cfi_offset %r14, -24
.cfi_offset %r15, -16
movl %ecx, %eax
leaq (,%rax,8), %r8
xorl %r9d, %r9d
xorl %r10d, %r10d
.p2align 4, 0x90
.LBB2_2: # %.preheader23
# =>This Loop Header: Depth=1
# Child Loop BB2_3 Depth 2
# Child Loop BB2_4 Depth 3
movl %r9d, %r11d
leaq (%rdi,%r11,8), %r11
movq %r10, %rbx
imulq %rax, %rbx
leaq (%rdx,%rbx,8), %rbx
movq %rsi, %r14
xorl %r15d, %r15d
.p2align 4, 0x90
.LBB2_3: # %.preheader
# Parent Loop BB2_2 Depth=1
# => This Loop Header: Depth=2
# Child Loop BB2_4 Depth 3
movsd (%rbx,%r15,8), %xmm0 # xmm0 = mem[0],zero
movq %r14, %r12
xorl %r13d, %r13d
.p2align 4, 0x90
.LBB2_4: # Parent Loop BB2_2 Depth=1
# Parent Loop BB2_3 Depth=2
# => This Inner Loop Header: Depth=3
movsd (%r11,%r13,8), %xmm1 # xmm1 = mem[0],zero
mulsd (%r12), %xmm1
addsd %xmm1, %xmm0
movsd %xmm0, (%rbx,%r15,8)
incq %r13
addq %r8, %r12
cmpq %r13, %rax
jne .LBB2_4
# %bb.5: # %._crit_edge
# in Loop: Header=BB2_3 Depth=2
incq %r15
addq $8, %r14
cmpq %rax, %r15
jne .LBB2_3
# %bb.6: # %._crit_edge26
# in Loop: Header=BB2_2 Depth=1
incq %r10
addl %ecx, %r9d
cmpq %rax, %r10
jne .LBB2_2
# %bb.7:
popq %rbx
.cfi_def_cfa_offset 40
popq %r12
.cfi_def_cfa_offset 32
popq %r13
.cfi_def_cfa_offset 24
popq %r14
.cfi_def_cfa_offset 16
popq %r15
.cfi_def_cfa_offset 8
.cfi_restore %rbx
.cfi_restore %r12
.cfi_restore %r13
.cfi_restore %r14
.cfi_restore %r15
.LBB2_8: # %._crit_edge28
retq
.Lfunc_end2:
.size _Z20multiply_matrix_hostPdS_S_i, .Lfunc_end2-_Z20multiply_matrix_hostPdS_S_i
.cfi_endproc
# -- End function
.section .rodata.cst16,"aM",@progbits,16
.p2align 4, 0x0 # -- Begin function _Z11checkResultPdS_i
.LCPI3_0:
.quad 0x7fffffffffffffff # double NaN
.quad 0x7fffffffffffffff # double NaN
.section .rodata.cst8,"aM",@progbits,8
.p2align 3, 0x0
.LCPI3_1:
.quad 0x3e45798ee2308c3a # double 1.0E-8
.text
.globl _Z11checkResultPdS_i
.p2align 4, 0x90
.type _Z11checkResultPdS_i,@function
_Z11checkResultPdS_i: # @_Z11checkResultPdS_i
.cfi_startproc
# %bb.0:
# kill: def $edx killed $edx def $rdx
movq %rdi, %rax
movl $.Lstr.1, %edi
testl %edx, %edx
je puts@PLT # TAILCALL
# %bb.1: # %.lr.ph.preheader
imull %edx, %edx
cmpl $1, %edx
adcl $0, %edx
xorl %ecx, %ecx
movapd .LCPI3_0(%rip), %xmm2 # xmm2 = [NaN,NaN]
movsd .LCPI3_1(%rip), %xmm3 # xmm3 = mem[0],zero
jmp .LBB3_3
.p2align 4, 0x90
.LBB3_2: # in Loop: Header=BB3_3 Depth=1
incq %rcx
cmpq %rcx, %rdx
je puts@PLT # TAILCALL
.LBB3_3: # %.lr.ph
# =>This Inner Loop Header: Depth=1
movsd (%rax,%rcx,8), %xmm0 # xmm0 = mem[0],zero
movsd (%rsi,%rcx,8), %xmm1 # xmm1 = mem[0],zero
movapd %xmm0, %xmm4
subsd %xmm1, %xmm4
andpd %xmm2, %xmm4
ucomisd %xmm3, %xmm4
jbe .LBB3_2
# %bb.4:
pushq %rax
.cfi_def_cfa_offset 16
movl $.L.str, %edi
movb $2, %al
callq printf
movl $.Lstr, %edi
addq $8, %rsp
.cfi_def_cfa_offset 8
jmp puts@PLT # TAILCALL
.Lfunc_end3:
.size _Z11checkResultPdS_i, .Lfunc_end3-_Z11checkResultPdS_i
.cfi_endproc
# -- End function
.section .rodata.cst8,"aM",@progbits,8
.p2align 3, 0x0 # -- Begin function main
.LCPI4_0:
.quad 0x41ac71c720000000 # double 238609296
.LCPI4_1:
.quad 0x3ff0000000000000 # double 1
.LCPI4_4:
.quad 0x3e45798ee2308c3a # double 1.0E-8
.section .rodata.cst4,"aM",@progbits,4
.p2align 2, 0x0
.LCPI4_2:
.long 0x49742400 # float 1.0E+6
.section .rodata.cst16,"aM",@progbits,16
.p2align 4, 0x0
.LCPI4_3:
.quad 0x7fffffffffffffff # double NaN
.quad 0x7fffffffffffffff # double NaN
.text
.globl main
.p2align 4, 0x90
.type main,@function
main: # @main
.cfi_startproc
# %bb.0:
pushq %rbp
.cfi_def_cfa_offset 16
pushq %r15
.cfi_def_cfa_offset 24
pushq %r14
.cfi_def_cfa_offset 32
pushq %r13
.cfi_def_cfa_offset 40
pushq %r12
.cfi_def_cfa_offset 48
pushq %rbx
.cfi_def_cfa_offset 56
subq $1624, %rsp # imm = 0x658
.cfi_def_cfa_offset 1680
.cfi_offset %rbx, -56
.cfi_offset %r12, -48
.cfi_offset %r13, -40
.cfi_offset %r14, -32
.cfi_offset %r15, -24
.cfi_offset %rbp, -16
leaq 152(%rsp), %rbx
xorl %r13d, %r13d
movq %rbx, %rdi
xorl %esi, %esi
callq hipGetDevicePropertiesR0600
movl $.L.str.3, %edi
xorl %esi, %esi
movq %rbx, %rdx
xorl %eax, %eax
callq printf
xorl %edi, %edi
callq hipSetDevice
movl $8000000, %edi # imm = 0x7A1200
callq malloc
movq %rax, %rbx
movl $8000000, %edi # imm = 0x7A1200
callq malloc
movq %rax, %r14
movl $8000000, %edi # imm = 0x7A1200
callq malloc
movq %rax, %r15
movl $8000000, %edi # imm = 0x7A1200
callq malloc
movq %rax, %r12
.p2align 4, 0x90
.LBB4_1: # =>This Inner Loop Header: Depth=1
callq rand
xorps %xmm1, %xmm1
cvtsi2sd %eax, %xmm1
movsd .LCPI4_0(%rip), %xmm0 # xmm0 = mem[0],zero
divsd %xmm0, %xmm1
movsd .LCPI4_1(%rip), %xmm0 # xmm0 = mem[0],zero
addsd %xmm0, %xmm1
movsd %xmm1, 144(%rsp) # 8-byte Spill
callq rand
xorps %xmm0, %xmm0
cvtsi2sd %eax, %xmm0
divsd .LCPI4_0(%rip), %xmm0
addsd .LCPI4_1(%rip), %xmm0
movsd 144(%rsp), %xmm1 # 8-byte Reload
# xmm1 = mem[0],zero
movsd %xmm1, (%rbx,%r13,8)
movsd %xmm0, (%r14,%r13,8)
incq %r13
cmpq $1000000, %r13 # imm = 0xF4240
jne .LBB4_1
# %bb.2:
xorl %r13d, %r13d
movl $8000000, %edx # imm = 0x7A1200
movq %r15, %rdi
xorl %esi, %esi
callq memset@PLT
movl $8000000, %edx # imm = 0x7A1200
movq %r12, %rdi
xorl %esi, %esi
callq memset@PLT
callq _ZNSt6chrono3_V212system_clock3nowEv
movq %rax, %rbp
movq %rbx, %rax
.p2align 4, 0x90
.LBB4_3: # %.preheader23.i
# =>This Loop Header: Depth=1
# Child Loop BB4_4 Depth 2
# Child Loop BB4_5 Depth 3
imulq $8000, %r13, %rcx # imm = 0x1F40
addq %r15, %rcx
movq %r14, %rdx
xorl %esi, %esi
.p2align 4, 0x90
.LBB4_4: # %.preheader.i
# Parent Loop BB4_3 Depth=1
# => This Loop Header: Depth=2
# Child Loop BB4_5 Depth 3
movsd (%rcx,%rsi,8), %xmm0 # xmm0 = mem[0],zero
movq %rdx, %rdi
xorl %r8d, %r8d
.p2align 4, 0x90
.LBB4_5: # Parent Loop BB4_3 Depth=1
# Parent Loop BB4_4 Depth=2
# => This Inner Loop Header: Depth=3
movsd (%rax,%r8,8), %xmm1 # xmm1 = mem[0],zero
mulsd (%rdi), %xmm1
addsd %xmm1, %xmm0
incq %r8
addq $8000, %rdi # imm = 0x1F40
cmpq $1000, %r8 # imm = 0x3E8
jne .LBB4_5
# %bb.6: # %._crit_edge.i
# in Loop: Header=BB4_4 Depth=2
movsd %xmm0, (%rcx,%rsi,8)
incq %rsi
addq $8, %rdx
cmpq $1000, %rsi # imm = 0x3E8
jne .LBB4_4
# %bb.7: # %._crit_edge26.i
# in Loop: Header=BB4_3 Depth=1
incq %r13
addq $8000, %rax # imm = 0x1F40
cmpq $1000, %r13 # imm = 0x3E8
jne .LBB4_3
# %bb.8: # %_Z20multiply_matrix_hostPdS_S_i.exit
movabsq $137438953504, %r13 # imm = 0x2000000020
callq _ZNSt6chrono3_V212system_clock3nowEv
subq %rbp, %rax
xorps %xmm0, %xmm0
cvtsi2ss %rax, %xmm0
divss .LCPI4_2(%rip), %xmm0
cvtss2sd %xmm0, %xmm0
movl $.L.str.4, %edi
movb $1, %al
callq printf
leaq 32(%rsp), %rdi
movl $8000000, %esi # imm = 0x7A1200
callq hipMalloc
leaq 24(%rsp), %rdi
movl $8000000, %esi # imm = 0x7A1200
callq hipMalloc
leaq 16(%rsp), %rdi
movl $8000000, %esi # imm = 0x7A1200
callq hipMalloc
movq 32(%rsp), %rdi
movl $8000000, %edx # imm = 0x7A1200
movq %rbx, %rsi
movl $1, %ecx
callq hipMemcpy
movq 24(%rsp), %rdi
movl $8000000, %edx # imm = 0x7A1200
movq %r14, %rsi
movl $1, %ecx
callq hipMemcpy
movq 16(%rsp), %rdi
movl $8000000, %edx # imm = 0x7A1200
xorl %esi, %esi
callq hipMemset
movl $.L.str.5, %edi
movl $32, %esi
movl $32, %edx
movl $32, %ecx
movl $32, %r8d
xorl %eax, %eax
callq printf
callq _ZNSt6chrono3_V212system_clock3nowEv
movq %rax, %rbp
movq %r13, %rdi
movl $1, %esi
movq %r13, %rdx
movl $1, %ecx
xorl %r8d, %r8d
xorl %r9d, %r9d
callq __hipPushCallConfiguration
testl %eax, %eax
jne .LBB4_10
# %bb.9:
movq 32(%rsp), %rax
movq 24(%rsp), %rcx
movq 16(%rsp), %rdx
movq %rax, 104(%rsp)
movq %rcx, 96(%rsp)
movq %rdx, 88(%rsp)
movl $1000, 12(%rsp) # imm = 0x3E8
leaq 104(%rsp), %rax
movq %rax, 112(%rsp)
leaq 96(%rsp), %rax
movq %rax, 120(%rsp)
leaq 88(%rsp), %rax
movq %rax, 128(%rsp)
leaq 12(%rsp), %rax
movq %rax, 136(%rsp)
leaq 72(%rsp), %rdi
leaq 56(%rsp), %rsi
leaq 48(%rsp), %rdx
leaq 40(%rsp), %rcx
callq __hipPopCallConfiguration
movq 72(%rsp), %rsi
movl 80(%rsp), %edx
movq 56(%rsp), %rcx
movl 64(%rsp), %r8d
leaq 112(%rsp), %r9
movl $_Z19multiply_matrix_gpuPdS_S_i, %edi
pushq 40(%rsp)
.cfi_adjust_cfa_offset 8
pushq 56(%rsp)
.cfi_adjust_cfa_offset 8
callq hipLaunchKernel
addq $16, %rsp
.cfi_adjust_cfa_offset -16
.LBB4_10:
callq hipDeviceSynchronize
callq _ZNSt6chrono3_V212system_clock3nowEv
subq %rbp, %rax
xorps %xmm0, %xmm0
cvtsi2ss %rax, %xmm0
divss .LCPI4_2(%rip), %xmm0
cvtss2sd %xmm0, %xmm0
movl $.L.str.6, %edi
movb $1, %al
callq printf
movq 16(%rsp), %rsi
movl $8000000, %edx # imm = 0x7A1200
movq %r12, %rdi
movl $2, %ecx
callq hipMemcpy
xorl %eax, %eax
.p2align 4, 0x90
.LBB4_11: # %.lr.ph.i
# =>This Inner Loop Header: Depth=1
movsd (%r15,%rax,8), %xmm0 # xmm0 = mem[0],zero
movsd (%r12,%rax,8), %xmm1 # xmm1 = mem[0],zero
movapd %xmm0, %xmm2
subsd %xmm1, %xmm2
andpd .LCPI4_3(%rip), %xmm2
ucomisd .LCPI4_4(%rip), %xmm2
ja .LBB4_14
# %bb.12: # in Loop: Header=BB4_11 Depth=1
incq %rax
cmpq $1000000, %rax # imm = 0xF4240
jne .LBB4_11
# %bb.13:
movl $.Lstr.1, %edi
jmp .LBB4_15
.LBB4_14:
movl $.L.str, %edi
movb $2, %al
callq printf
movl $.Lstr, %edi
.LBB4_15: # %_Z11checkResultPdS_i.exit
callq puts@PLT
callq _ZNSt6chrono3_V212system_clock3nowEv
movq %rax, %rbp
movq %r13, %rdi
movl $1, %esi
movq %r13, %rdx
movl $1, %ecx
xorl %r8d, %r8d
xorl %r9d, %r9d
callq __hipPushCallConfiguration
testl %eax, %eax
jne .LBB4_17
# %bb.16:
movq 32(%rsp), %rax
movq 24(%rsp), %rcx
movq 16(%rsp), %rdx
movq %rax, 104(%rsp)
movq %rcx, 96(%rsp)
movq %rdx, 88(%rsp)
movl $1000, 12(%rsp) # imm = 0x3E8
leaq 104(%rsp), %rax
movq %rax, 112(%rsp)
leaq 96(%rsp), %rax
movq %rax, 120(%rsp)
leaq 88(%rsp), %rax
movq %rax, 128(%rsp)
leaq 12(%rsp), %rax
movq %rax, 136(%rsp)
leaq 72(%rsp), %rdi
leaq 56(%rsp), %rsi
leaq 48(%rsp), %rdx
leaq 40(%rsp), %rcx
callq __hipPopCallConfiguration
movq 72(%rsp), %rsi
movl 80(%rsp), %edx
movq 56(%rsp), %rcx
movl 64(%rsp), %r8d
leaq 112(%rsp), %r9
movl $_Z26multiply_matrix_gpu_tilingPdS_S_i, %edi
pushq 40(%rsp)
.cfi_adjust_cfa_offset 8
pushq 56(%rsp)
.cfi_adjust_cfa_offset 8
callq hipLaunchKernel
addq $16, %rsp
.cfi_adjust_cfa_offset -16
.LBB4_17:
callq hipDeviceSynchronize
callq _ZNSt6chrono3_V212system_clock3nowEv
subq %rbp, %rax
xorps %xmm0, %xmm0
cvtsi2ss %rax, %xmm0
divss .LCPI4_2(%rip), %xmm0
cvtss2sd %xmm0, %xmm0
movl $.L.str.7, %edi
movb $1, %al
callq printf
movq 16(%rsp), %rsi
movl $8000000, %edx # imm = 0x7A1200
movq %r12, %rdi
movl $2, %ecx
callq hipMemcpy
xorl %eax, %eax
movapd .LCPI4_3(%rip), %xmm3 # xmm3 = [NaN,NaN]
movsd .LCPI4_4(%rip), %xmm4 # xmm4 = mem[0],zero
.p2align 4, 0x90
.LBB4_18: # %.lr.ph.i84
# =>This Inner Loop Header: Depth=1
movsd (%r15,%rax,8), %xmm0 # xmm0 = mem[0],zero
movsd (%r12,%rax,8), %xmm1 # xmm1 = mem[0],zero
movapd %xmm0, %xmm2
subsd %xmm1, %xmm2
andpd %xmm3, %xmm2
ucomisd %xmm4, %xmm2
ja .LBB4_21
# %bb.19: # in Loop: Header=BB4_18 Depth=1
incq %rax
cmpq $1000000, %rax # imm = 0xF4240
jne .LBB4_18
# %bb.20:
movl $.Lstr.1, %edi
jmp .LBB4_22
.LBB4_21:
movl $.L.str, %edi
movb $2, %al
callq printf
movl $.Lstr, %edi
.LBB4_22: # %_Z11checkResultPdS_i.exit91
callq puts@PLT
movq 32(%rsp), %rdi
callq hipFree
movq 24(%rsp), %rdi
callq hipFree
movq 16(%rsp), %rdi
callq hipFree
movq %rbx, %rdi
callq free
movq %r14, %rdi
callq free
movq %r15, %rdi
callq free
movq %r12, %rdi
callq free
callq hipDeviceReset
xorl %eax, %eax
addq $1624, %rsp # imm = 0x658
.cfi_def_cfa_offset 56
popq %rbx
.cfi_def_cfa_offset 48
popq %r12
.cfi_def_cfa_offset 40
popq %r13
.cfi_def_cfa_offset 32
popq %r14
.cfi_def_cfa_offset 24
popq %r15
.cfi_def_cfa_offset 16
popq %rbp
.cfi_def_cfa_offset 8
retq
.Lfunc_end4:
.size main, .Lfunc_end4-main
.cfi_endproc
# -- End function
.p2align 4, 0x90 # -- Begin function __hip_module_ctor
.type __hip_module_ctor,@function
__hip_module_ctor: # @__hip_module_ctor
.cfi_startproc
# %bb.0:
pushq %rbx
.cfi_def_cfa_offset 16
subq $32, %rsp
.cfi_def_cfa_offset 48
.cfi_offset %rbx, -16
cmpq $0, __hip_gpubin_handle(%rip)
jne .LBB5_2
# %bb.1:
movl $__hip_fatbin_wrapper, %edi
callq __hipRegisterFatBinary
movq %rax, __hip_gpubin_handle(%rip)
.LBB5_2:
movq __hip_gpubin_handle(%rip), %rbx
xorps %xmm0, %xmm0
movups %xmm0, 16(%rsp)
movups %xmm0, (%rsp)
movl $_Z19multiply_matrix_gpuPdS_S_i, %esi
movl $.L__unnamed_1, %edx
movl $.L__unnamed_1, %ecx
movq %rbx, %rdi
movl $-1, %r8d
xorl %r9d, %r9d
callq __hipRegisterFunction
xorps %xmm0, %xmm0
movups %xmm0, 16(%rsp)
movups %xmm0, (%rsp)
movl $_Z26multiply_matrix_gpu_tilingPdS_S_i, %esi
movl $.L__unnamed_2, %edx
movl $.L__unnamed_2, %ecx
movq %rbx, %rdi
movl $-1, %r8d
xorl %r9d, %r9d
callq __hipRegisterFunction
movl $__hip_module_dtor, %edi
addq $32, %rsp
.cfi_def_cfa_offset 16
popq %rbx
.cfi_def_cfa_offset 8
jmp atexit # TAILCALL
.Lfunc_end5:
.size __hip_module_ctor, .Lfunc_end5-__hip_module_ctor
.cfi_endproc
# -- End function
.p2align 4, 0x90 # -- Begin function __hip_module_dtor
.type __hip_module_dtor,@function
__hip_module_dtor: # @__hip_module_dtor
.cfi_startproc
# %bb.0:
movq __hip_gpubin_handle(%rip), %rdi
testq %rdi, %rdi
je .LBB6_2
# %bb.1:
pushq %rax
.cfi_def_cfa_offset 16
callq __hipUnregisterFatBinary
movq $0, __hip_gpubin_handle(%rip)
addq $8, %rsp
.cfi_def_cfa_offset 8
.LBB6_2:
retq
.Lfunc_end6:
.size __hip_module_dtor, .Lfunc_end6-__hip_module_dtor
.cfi_endproc
# -- End function
.type _Z19multiply_matrix_gpuPdS_S_i,@object # @_Z19multiply_matrix_gpuPdS_S_i
.section .rodata,"a",@progbits
.globl _Z19multiply_matrix_gpuPdS_S_i
.p2align 3, 0x0
_Z19multiply_matrix_gpuPdS_S_i:
.quad _Z34__device_stub__multiply_matrix_gpuPdS_S_i
.size _Z19multiply_matrix_gpuPdS_S_i, 8
.type _Z26multiply_matrix_gpu_tilingPdS_S_i,@object # @_Z26multiply_matrix_gpu_tilingPdS_S_i
.globl _Z26multiply_matrix_gpu_tilingPdS_S_i
.p2align 3, 0x0
_Z26multiply_matrix_gpu_tilingPdS_S_i:
.quad _Z41__device_stub__multiply_matrix_gpu_tilingPdS_S_i
.size _Z26multiply_matrix_gpu_tilingPdS_S_i, 8
.type .L.str,@object # @.str
.section .rodata.str1.1,"aMS",@progbits,1
.L.str:
.asciz "host %f gpu %f\n"
.size .L.str, 16
.type .L.str.3,@object # @.str.3
.L.str.3:
.asciz "Using Device %d: %s\n"
.size .L.str.3, 21
.type .L.str.4,@object # @.str.4
.L.str.4:
.asciz "multiply_matrix_host elapsed %f ms\n"
.size .L.str.4, 36
.type .L.str.5,@object # @.str.5
.L.str.5:
.asciz "grid.x %d grid.y %d block.x %d block.y %d\n"
.size .L.str.5, 43
.type .L.str.6,@object # @.str.6
.L.str.6:
.asciz "multiply_matrix_gpu elapsed %f ms\n"
.size .L.str.6, 35
.type .L.str.7,@object # @.str.7
.L.str.7:
.asciz "multiply_matrix_gpu_tiling elapsed %f ms\n"
.size .L.str.7, 42
.type .L__unnamed_1,@object # @0
.L__unnamed_1:
.asciz "_Z19multiply_matrix_gpuPdS_S_i"
.size .L__unnamed_1, 31
.type .L__unnamed_2,@object # @1
.L__unnamed_2:
.asciz "_Z26multiply_matrix_gpu_tilingPdS_S_i"
.size .L__unnamed_2, 38
.type __hip_fatbin_wrapper,@object # @__hip_fatbin_wrapper
.section .hipFatBinSegment,"a",@progbits
.p2align 3, 0x0
__hip_fatbin_wrapper:
.long 1212764230 # 0x48495046
.long 1 # 0x1
.quad __hip_fatbin
.quad 0
.size __hip_fatbin_wrapper, 24
.type __hip_gpubin_handle,@object # @__hip_gpubin_handle
.local __hip_gpubin_handle
.comm __hip_gpubin_handle,8,8
.section .init_array,"aw",@init_array
.p2align 3, 0x0
.quad __hip_module_ctor
.type __hip_cuid_,@object # @__hip_cuid_
.bss
.globl __hip_cuid_
__hip_cuid_:
.byte 0 # 0x0
.size __hip_cuid_, 1
.type .Lstr,@object # @str
.section .rodata.str1.1,"aMS",@progbits,1
.Lstr:
.asciz "Matrix does not not match.\n"
.size .Lstr, 28
.type .Lstr.1,@object # @str.1
.Lstr.1:
.asciz "Matrix match.\n"
.size .Lstr.1, 15
.section ".linker-options","e",@llvm_linker_options
.ident "AMD clang version 18.0.0git (https://github.com/RadeonOpenCompute/llvm-project roc-6.3.2 25012 e5bf7e55c91490b07c49d8960fa7983d864936c4)"
.section ".note.GNU-stack","",@progbits
.addrsig
.addrsig_sym _Z34__device_stub__multiply_matrix_gpuPdS_S_i
.addrsig_sym _Z41__device_stub__multiply_matrix_gpu_tilingPdS_S_i
.addrsig_sym __hip_module_ctor
.addrsig_sym __hip_module_dtor
.addrsig_sym _Z19multiply_matrix_gpuPdS_S_i
.addrsig_sym _Z26multiply_matrix_gpu_tilingPdS_S_i
.addrsig_sym __hip_fatbin
.addrsig_sym __hip_fatbin_wrapper
.addrsig_sym __hip_cuid_ |
You are a helpful coding assistant specialized in converting from CUDA device assembly to AMD device assembly. | code for sm_80
Function : _Z26multiply_matrix_gpu_tilingPdS_S_i
.headerflags @"EF_CUDA_TEXMODE_UNIFIED EF_CUDA_64BIT_ADDRESS EF_CUDA_SM80 EF_CUDA_VIRTUAL_SM(EF_CUDA_SM80)"
/*0000*/ IMAD.MOV.U32 R1, RZ, RZ, c[0x0][0x28] ; /* 0x00000a00ff017624 */
/* 0x000fe400078e00ff */
/*0010*/ S2R R2, SR_CTAID.Y ; /* 0x0000000000027919 */
/* 0x000e220000002600 */
/*0020*/ IMAD.MOV.U32 R4, RZ, RZ, c[0x0][0x178] ; /* 0x00005e00ff047624 */
/* 0x000fe200078e00ff */
/*0030*/ ULDC.64 UR4, c[0x0][0x118] ; /* 0x0000460000047ab9 */
/* 0x000fe20000000a00 */
/*0040*/ CS2R R12, SRZ ; /* 0x00000000000c7805 */
/* 0x000fe2000001ff00 */
/*0050*/ S2R R7, SR_TID.Y ; /* 0x0000000000077919 */
/* 0x000e240000002200 */
/*0060*/ ISETP.GE.AND P1, PT, R4, 0x1, PT ; /* 0x000000010400780c */
/* 0x000fe40003f26270 */
/*0070*/ S2R R3, SR_CTAID.X ; /* 0x0000000000037919 */
/* 0x000e680000002500 */
/*0080*/ S2R R0, SR_TID.X ; /* 0x0000000000007919 */
/* 0x000e620000002100 */
/*0090*/ IMAD R2, R2, c[0x0][0x4], R7 ; /* 0x0000010002027a24 */
/* 0x001fca00078e0207 */
/*00a0*/ ISETP.GE.U32.AND P0, PT, R2, c[0x0][0x178], PT ; /* 0x00005e0002007a0c */
/* 0x000fe20003f06070 */
/*00b0*/ IMAD R3, R3, c[0x0][0x0], R0 ; /* 0x0000000003037a24 */
/* 0x002fca00078e0200 */
/*00c0*/ ISETP.GE.U32.OR P0, PT, R3, c[0x0][0x178], P0 ; /* 0x00005e0003007a0c */
/* 0x000fe20000706470 */
/*00d0*/ @!P1 BRA 0x500 ; /* 0x0000042000009947 */
/* 0x000fd80003800000 */
/*00e0*/ IADD3 R4, R4, 0x1f, RZ ; /* 0x0000001f04047810 */
/* 0x000fe20007ffe0ff */
/*00f0*/ CS2R R12, SRZ ; /* 0x00000000000c7805 */
/* 0x000fc6000001ff00 */
/*0100*/ SHF.R.S32.HI R5, RZ, 0x1f, R4 ; /* 0x0000001fff057819 */
/* 0x000fc80000011404 */
/*0110*/ LEA.HI R6, R5, R4, RZ, 0x5 ; /* 0x0000000405067211 */
/* 0x000fe200078f28ff */
/*0120*/ IMAD.MOV.U32 R5, RZ, RZ, RZ ; /* 0x000000ffff057224 */
/* 0x000fe200078e00ff */
/*0130*/ LEA R4, R7, R0, 0x5 ; /* 0x0000000007047211 */
/* 0x000fe400078e28ff */
/*0140*/ SHF.R.S32.HI R6, RZ, 0x5, R6 ; /* 0x00000005ff067819 */
/* 0x000fe40000011406 */
/*0150*/ S2R R10, SR_TID.Y ; /* 0x00000000000a7919 */
/* 0x000e220000002200 */
/*0160*/ IMAD R9, R5, 0x20, R0 ; /* 0x0000002005097824 */
/* 0x000fe200078e0200 */
/*0170*/ CS2R R14, SRZ ; /* 0x00000000000e7805 */
/* 0x000fe2000001ff00 */
/*0180*/ CS2R R16, SRZ ; /* 0x0000000000107805 */
/* 0x000fc6000001ff00 */
/*0190*/ ISETP.GE.U32.AND P2, PT, R9, c[0x0][0x178], PT ; /* 0x00005e0009007a0c */
/* 0x000fc80003f46070 */
/*01a0*/ ISETP.GE.U32.OR P2, PT, R2, c[0x0][0x178], P2 ; /* 0x00005e0002007a0c */
/* 0x000fda0001746470 */
/*01b0*/ @!P2 IMAD R18, R2, c[0x0][0x178], R9 ; /* 0x00005e000212aa24 */
/* 0x000fe200078e0209 */
/*01c0*/ LEA R20, R5, R10, 0x5 ; /* 0x0000000a05147211 */
/* 0x001fe200078e28ff */
/*01d0*/ @!P2 IMAD.MOV.U32 R19, RZ, RZ, 0x8 ; /* 0x00000008ff13a424 */
/* 0x000fc600078e00ff */
/*01e0*/ ISETP.GE.U32.AND P1, PT, R20, c[0x0][0x178], PT ; /* 0x00005e0014007a0c */
/* 0x000fe20003f26070 */
/*01f0*/ @!P2 IMAD.WIDE.U32 R18, R18, R19, c[0x0][0x160] ; /* 0x000058001212a625 */
/* 0x000fc600078e0013 */
/*0200*/ ISETP.GE.U32.OR P1, PT, R3, c[0x0][0x178], P1 ; /* 0x00005e0003007a0c */
/* 0x000fe40000f26470 */
/*0210*/ @!P2 LDG.E.64 R14, [R18.64] ; /* 0x00000004120ea981 */
/* 0x000eb6000c1e1b00 */
/*0220*/ @!P1 MOV R21, 0x8 ; /* 0x0000000800159802 */
/* 0x000fe20000000f00 */
/*0230*/ @!P1 IMAD R20, R20, c[0x0][0x178], R3 ; /* 0x00005e0014149a24 */
/* 0x000fc800078e0203 */
/*0240*/ @!P1 IMAD.WIDE.U32 R20, R20, R21, c[0x0][0x168] ; /* 0x00005a0014149625 */
/* 0x000fca00078e0015 */
/*0250*/ @!P1 LDG.E.64 R16, [R20.64] ; /* 0x0000000414109981 */
/* 0x000ee2000c1e1b00 */
/*0260*/ IMAD R10, R10, 0x20, R5 ; /* 0x000000200a0a7824 */
/* 0x000fe200078e0205 */
/*0270*/ ISETP.GT.AND P1, PT, R5.reuse, R6, PT ; /* 0x000000060500720c */
/* 0x040fe40003f24270 */
/*0280*/ IADD3 R5, R5, -0x1, RZ ; /* 0xffffffff05057810 */
/* 0x000fe20007ffe0ff */
/*0290*/ STS.64 [R4.X8], R14 ; /* 0x0000000e04007388 */
/* 0x004fe80000008a00 */
/*02a0*/ STS.64 [R4.X8+0x2000], R16 ; /* 0x0020001004007388 */
/* 0x008fe80000008a00 */
/*02b0*/ BAR.SYNC.DEFER_BLOCKING 0x0 ; /* 0x0000000000007b1d */
/* 0x000fec0000010000 */
/*02c0*/ LDS.64 R8, [R9.X8+0x2000] ; /* 0x0020000009087984 */
/* 0x000fe80000008a00 */
/*02d0*/ LDS.64 R10, [R10.X8] ; /* 0x000000000a0a7984 */
/* 0x000e240000008a00 */
/*02e0*/ DFMA R12, R8, R10, R12 ; /* 0x0000000a080c722b */
/* 0x001e0c000000000c */
/*02f0*/ DFMA R12, R8, R10, R12 ; /* 0x0000000a080c722b */
/* 0x001e0c000000000c */
/*0300*/ DFMA R12, R8, R10, R12 ; /* 0x0000000a080c722b */
/* 0x001e0c000000000c */
/*0310*/ DFMA R12, R8, R10, R12 ; /* 0x0000000a080c722b */
/* 0x001e0c000000000c */
/*0320*/ DFMA R12, R8, R10, R12 ; /* 0x0000000a080c722b */
/* 0x001e0c000000000c */
/*0330*/ DFMA R12, R8, R10, R12 ; /* 0x0000000a080c722b */
/* 0x001e0c000000000c */
/*0340*/ DFMA R12, R8, R10, R12 ; /* 0x0000000a080c722b */
/* 0x001e0c000000000c */
/*0350*/ DFMA R12, R8, R10, R12 ; /* 0x0000000a080c722b */
/* 0x001e0c000000000c */
/*0360*/ DFMA R12, R8, R10, R12 ; /* 0x0000000a080c722b */
/* 0x001e0c000000000c */
/*0370*/ DFMA R12, R8, R10, R12 ; /* 0x0000000a080c722b */
/* 0x001e0c000000000c */
/*0380*/ DFMA R12, R8, R10, R12 ; /* 0x0000000a080c722b */
/* 0x001e0c000000000c */
/*0390*/ DFMA R12, R8, R10, R12 ; /* 0x0000000a080c722b */
/* 0x001e0c000000000c */
/*03a0*/ DFMA R12, R8, R10, R12 ; /* 0x0000000a080c722b */
/* 0x001e0c000000000c */
/*03b0*/ DFMA R12, R8, R10, R12 ; /* 0x0000000a080c722b */
/* 0x001e0c000000000c */
/*03c0*/ DFMA R12, R8, R10, R12 ; /* 0x0000000a080c722b */
/* 0x001e0c000000000c */
/*03d0*/ DFMA R12, R8, R10, R12 ; /* 0x0000000a080c722b */
/* 0x001e0c000000000c */
/*03e0*/ DFMA R12, R8, R10, R12 ; /* 0x0000000a080c722b */
/* 0x001e0c000000000c */
/*03f0*/ DFMA R12, R8, R10, R12 ; /* 0x0000000a080c722b */
/* 0x001e0c000000000c */
/*0400*/ DFMA R12, R8, R10, R12 ; /* 0x0000000a080c722b */
/* 0x001e0c000000000c */
/*0410*/ DFMA R12, R8, R10, R12 ; /* 0x0000000a080c722b */
/* 0x001e0c000000000c */
/*0420*/ DFMA R12, R8, R10, R12 ; /* 0x0000000a080c722b */
/* 0x001e0c000000000c */
/*0430*/ DFMA R12, R8, R10, R12 ; /* 0x0000000a080c722b */
/* 0x001e0c000000000c */
/*0440*/ DFMA R12, R8, R10, R12 ; /* 0x0000000a080c722b */
/* 0x001e0c000000000c */
/*0450*/ DFMA R12, R8, R10, R12 ; /* 0x0000000a080c722b */
/* 0x001e0c000000000c */
/*0460*/ DFMA R12, R8, R10, R12 ; /* 0x0000000a080c722b */
/* 0x001e0c000000000c */
/*0470*/ DFMA R12, R8, R10, R12 ; /* 0x0000000a080c722b */
/* 0x001e0c000000000c */
/*0480*/ DFMA R12, R8, R10, R12 ; /* 0x0000000a080c722b */
/* 0x001e0c000000000c */
/*0490*/ DFMA R12, R8, R10, R12 ; /* 0x0000000a080c722b */
/* 0x001e0c000000000c */
/*04a0*/ DFMA R12, R8, R10, R12 ; /* 0x0000000a080c722b */
/* 0x001e0c000000000c */
/*04b0*/ DFMA R12, R8, R10, R12 ; /* 0x0000000a080c722b */
/* 0x001e0c000000000c */
/*04c0*/ DFMA R12, R8, R10, R12 ; /* 0x0000000a080c722b */
/* 0x001e0c000000000c */
/*04d0*/ DFMA R12, R8, R10, R12 ; /* 0x0000000a080c722b */
/* 0x001062000000000c */
/*04e0*/ BAR.SYNC.DEFER_BLOCKING 0x0 ; /* 0x0000000000007b1d */
/* 0x000fec0000010000 */
/*04f0*/ @!P1 BRA 0x150 ; /* 0xfffffc5000009947 */
/* 0x003fea000383ffff */
/*0500*/ @P0 EXIT ; /* 0x000000000000094d */
/* 0x000fea0003800000 */
/*0510*/ MOV R5, 0x8 ; /* 0x0000000800057802 */
/* 0x000fe20000000f00 */
/*0520*/ IMAD R2, R3, c[0x0][0x178], R2 ; /* 0x00005e0003027a24 */
/* 0x000fc800078e0202 */
/*0530*/ IMAD.WIDE.U32 R2, R2, R5, c[0x0][0x170] ; /* 0x00005c0002027625 */
/* 0x000fca00078e0005 */
/*0540*/ LDG.E.64 R4, [R2.64] ; /* 0x0000000402047981 */
/* 0x000ea4000c1e1b00 */
/*0550*/ DADD R4, R4, R12 ; /* 0x0000000004047229 */
/* 0x004e0e000000000c */
/*0560*/ STG.E.64 [R2.64], R4 ; /* 0x0000000402007986 */
/* 0x001fe2000c101b04 */
/*0570*/ EXIT ; /* 0x000000000000794d */
/* 0x000fea0003800000 */
/*0580*/ BRA 0x580; /* 0xfffffff000007947 */
/* 0x000fc0000383ffff */
/*0590*/ NOP; /* 0x0000000000007918 */
/* 0x000fc00000000000 */
/*05a0*/ NOP; /* 0x0000000000007918 */
/* 0x000fc00000000000 */
/*05b0*/ NOP; /* 0x0000000000007918 */
/* 0x000fc00000000000 */
/*05c0*/ NOP; /* 0x0000000000007918 */
/* 0x000fc00000000000 */
/*05d0*/ NOP; /* 0x0000000000007918 */
/* 0x000fc00000000000 */
/*05e0*/ NOP; /* 0x0000000000007918 */
/* 0x000fc00000000000 */
/*05f0*/ NOP; /* 0x0000000000007918 */
/* 0x000fc00000000000 */
/*0600*/ NOP; /* 0x0000000000007918 */
/* 0x000fc00000000000 */
/*0610*/ NOP; /* 0x0000000000007918 */
/* 0x000fc00000000000 */
/*0620*/ NOP; /* 0x0000000000007918 */
/* 0x000fc00000000000 */
/*0630*/ NOP; /* 0x0000000000007918 */
/* 0x000fc00000000000 */
/*0640*/ NOP; /* 0x0000000000007918 */
/* 0x000fc00000000000 */
/*0650*/ NOP; /* 0x0000000000007918 */
/* 0x000fc00000000000 */
/*0660*/ NOP; /* 0x0000000000007918 */
/* 0x000fc00000000000 */
/*0670*/ NOP; /* 0x0000000000007918 */
/* 0x000fc00000000000 */
..........
Function : _Z19multiply_matrix_gpuPdS_S_i
.headerflags @"EF_CUDA_TEXMODE_UNIFIED EF_CUDA_64BIT_ADDRESS EF_CUDA_SM80 EF_CUDA_VIRTUAL_SM(EF_CUDA_SM80)"
/*0000*/ IMAD.MOV.U32 R1, RZ, RZ, c[0x0][0x28] ; /* 0x00000a00ff017624 */
/* 0x000fe400078e00ff */
/*0010*/ S2R R0, SR_CTAID.Y ; /* 0x0000000000007919 */
/* 0x000e220000002600 */
/*0020*/ IMAD.MOV.U32 R2, RZ, RZ, c[0x0][0x178] ; /* 0x00005e00ff027624 */
/* 0x000fc600078e00ff */
/*0030*/ S2R R3, SR_TID.Y ; /* 0x0000000000037919 */
/* 0x000e280000002200 */
/*0040*/ S2R R9, SR_CTAID.X ; /* 0x0000000000097919 */
/* 0x000e680000002500 */
/*0050*/ S2R R8, SR_TID.X ; /* 0x0000000000087919 */
/* 0x000e620000002100 */
/*0060*/ IMAD R0, R0, c[0x0][0x4], R3 ; /* 0x0000010000007a24 */
/* 0x001fca00078e0203 */
/*0070*/ ISETP.GE.U32.AND P0, PT, R0, c[0x0][0x178], PT ; /* 0x00005e0000007a0c */
/* 0x000fe20003f06070 */
/*0080*/ IMAD R3, R9, c[0x0][0x0], R8 ; /* 0x0000000009037a24 */
/* 0x002fca00078e0208 */
/*0090*/ ISETP.GE.U32.OR P0, PT, R3, c[0x0][0x178], P0 ; /* 0x00005e0003007a0c */
/* 0x000fc80000706470 */
/*00a0*/ ISETP.LT.OR P0, PT, R2, 0x1, P0 ; /* 0x000000010200780c */
/* 0x000fda0000701670 */
/*00b0*/ @P0 EXIT ; /* 0x000000000000094d */
/* 0x000fea0003800000 */
/*00c0*/ IADD3 R5, R2, -0x1, RZ ; /* 0xffffffff02057810 */
/* 0x000fe20007ffe0ff */
/*00d0*/ IMAD R12, R0, c[0x0][0x178], R3 ; /* 0x00005e00000c7a24 */
/* 0x000fe200078e0203 */
/*00e0*/ LOP3.LUT R4, R2, 0x3, RZ, 0xc0, !PT ; /* 0x0000000302047812 */
/* 0x000fe200078ec0ff */
/*00f0*/ ULDC.64 UR4, c[0x0][0x118] ; /* 0x0000460000047ab9 */
/* 0x000fe20000000a00 */
/*0100*/ ISETP.GE.U32.AND P1, PT, R5, 0x3, PT ; /* 0x000000030500780c */
/* 0x000fe20003f26070 */
/*0110*/ HFMA2.MMA R5, -RZ, RZ, 0, 4.76837158203125e-07 ; /* 0x00000008ff057435 */
/* 0x000fe200000001ff */
/*0120*/ ISETP.NE.AND P0, PT, R4, RZ, PT ; /* 0x000000ff0400720c */
/* 0x000fe20003f05270 */
/*0130*/ IMAD.MOV.U32 R7, RZ, RZ, RZ ; /* 0x000000ffff077224 */
/* 0x000fd000078e00ff */
/*0140*/ IMAD.WIDE.U32 R12, R12, R5, c[0x0][0x170] ; /* 0x00005c000c0c7625 */
/* 0x000fe400078e0005 */
/*0150*/ @!P1 BRA 0x430 ; /* 0x000002d000009947 */
/* 0x000fea0003800000 */
/*0160*/ LDG.E.64 R28, [R12.64] ; /* 0x000000040c1c7981 */
/* 0x000162000c1e1b00 */
/*0170*/ IADD3 R8, R8, c[0x0][0x178], RZ ; /* 0x00005e0008087a10 */
/* 0x000fe20007ffe0ff */
/*0180*/ IMAD R6, R0, R2, 0x3 ; /* 0x0000000300067424 */
/* 0x000fe200078e0202 */
/*0190*/ IADD3 R20, R4, -c[0x0][0x178], RZ ; /* 0x80005e0004147a10 */
/* 0x000fe20007ffe0ff */
/*01a0*/ IMAD R10, R2.reuse, 0x3, R3 ; /* 0x00000003020a7824 */
/* 0x040fe200078e0203 */
/*01b0*/ MOV R11, R3.reuse ; /* 0x00000003000b7202 */
/* 0x080fe20000000f00 */
/*01c0*/ IMAD R8, R9, c[0x0][0x0], R8 ; /* 0x0000000009087a24 */
/* 0x000fe200078e0208 */
/*01d0*/ LEA R9, R2, R3, 0x1 ; /* 0x0000000302097211 */
/* 0x000fe200078e08ff */
/*01e0*/ IMAD.MOV.U32 R7, RZ, RZ, RZ ; /* 0x000000ffff077224 */
/* 0x000fc400078e00ff */
/*01f0*/ IADD3 R24, R6, -0x3, RZ ; /* 0xfffffffd06187810 */
/* 0x000fe20007ffe0ff */
/*0200*/ IMAD.WIDE.U32 R26, R11, R5, c[0x0][0x168] ; /* 0x00005a000b1a7625 */
/* 0x000fc800078e0005 */
/*0210*/ IMAD.WIDE.U32 R24, R24, R5.reuse, c[0x0][0x160] ; /* 0x0000580018187625 */
/* 0x080fe200078e0005 */
/*0220*/ LDG.E.64 R14, [R26.64] ; /* 0x000000041a0e7981 */
/* 0x004ea8000c1e1b00 */
/*0230*/ LDG.E.64 R18, [R24.64] ; /* 0x0000000418127981 */
/* 0x000ea2000c1e1b00 */
/*0240*/ IADD3 R22, R6, -0x2, RZ ; /* 0xfffffffe06167810 */
/* 0x000fe20007ffe0ff */
/*0250*/ IMAD.WIDE.U32 R16, R8, R5, c[0x0][0x168] ; /* 0x00005a0008107625 */
/* 0x000fe200078e0005 */
/*0260*/ DFMA R18, R14, R18, R28 ; /* 0x000000120e12722b */
/* 0x024286000000001c */
/*0270*/ IMAD.WIDE.U32 R28, R22, R5, c[0x0][0x160] ; /* 0x00005800161c7625 */
/* 0x002fc800078e0005 */
/*0280*/ STG.E.64 [R12.64], R18 ; /* 0x000000120c007986 */
/* 0x0043e8000c101b04 */
/*0290*/ LDG.E.64 R14, [R16.64] ; /* 0x00000004100e7981 */
/* 0x000ea8000c1e1b00 */
/*02a0*/ LDG.E.64 R22, [R28.64] ; /* 0x000000041c167981 */
/* 0x000ea2000c1e1b00 */
/*02b0*/ IADD3 R21, R6, -0x1, RZ ; /* 0xffffffff06157810 */
/* 0x000fe20007ffe0ff */
/*02c0*/ IMAD.WIDE.U32 R26, R9, R5, c[0x0][0x168] ; /* 0x00005a00091a7625 */
/* 0x000fc800078e0005 */
/*02d0*/ IMAD.WIDE.U32 R24, R21, R5, c[0x0][0x160] ; /* 0x0000580015187625 */
/* 0x000fe200078e0005 */
/*02e0*/ DFMA R22, R14, R22, R18 ; /* 0x000000160e16722b */
/* 0x004e8e0000000012 */
/*02f0*/ STG.E.64 [R12.64], R22 ; /* 0x000000160c007986 */
/* 0x0045e8000c101b04 */
/*0300*/ LDG.E.64 R14, [R26.64] ; /* 0x000000041a0e7981 */
/* 0x000ee8000c1e1b00 */
/*0310*/ LDG.E.64 R16, [R24.64] ; /* 0x0000000418107981 */
/* 0x000ee2000c1e1b00 */
/*0320*/ IMAD.WIDE.U32 R18, R6, R5, c[0x0][0x160] ; /* 0x0000580006127625 */
/* 0x002fe200078e0005 */
/*0330*/ IADD3 R7, R7, 0x4, RZ ; /* 0x0000000407077810 */
/* 0x000fe20007ffe0ff */
/*0340*/ DFMA R14, R14, R16, R22 ; /* 0x000000100e0e722b */
/* 0x0082c40000000016 */
/*0350*/ IMAD.WIDE.U32 R16, R10, R5, c[0x0][0x168] ; /* 0x00005a000a107625 */
/* 0x002fca00078e0005 */
/*0360*/ STG.E.64 [R12.64], R14 ; /* 0x0000000e0c007986 */
/* 0x0085e8000c101b04 */
/*0370*/ LDG.E.64 R18, [R18.64] ; /* 0x0000000412127981 */
/* 0x000ee8000c1e1b00 */
/*0380*/ LDG.E.64 R16, [R16.64] ; /* 0x0000000410107981 */
/* 0x000ee2000c1e1b00 */
/*0390*/ IMAD.IADD R21, R20, 0x1, R7 ; /* 0x0000000114157824 */
/* 0x000fe200078e0207 */
/*03a0*/ IADD3 R6, R6, 0x4, RZ ; /* 0x0000000406067810 */
/* 0x000fe20007ffe0ff */
/*03b0*/ IMAD R9, R2.reuse, 0x4, R9 ; /* 0x0000000402097824 */
/* 0x040fe200078e0209 */
/*03c0*/ LEA R8, R2, R8, 0x2 ; /* 0x0000000802087211 */
/* 0x000fc400078e10ff */
/*03d0*/ ISETP.NE.AND P1, PT, R21, RZ, PT ; /* 0x000000ff1500720c */
/* 0x000fe40003f25270 */
/*03e0*/ LEA R10, R2.reuse, R10, 0x2 ; /* 0x0000000a020a7211 */
/* 0x040fe400078e10ff */
/*03f0*/ LEA R11, R2, R11, 0x2 ; /* 0x0000000b020b7211 */
/* 0x000fe200078e10ff */
/*0400*/ DFMA R28, R16, R18, R14 ; /* 0x00000012101c722b */
/* 0x008e4e000000000e */
/*0410*/ STG.E.64 [R12.64], R28 ; /* 0x0000001c0c007986 */
/* 0x0025e2000c101b04 */
/*0420*/ @P1 BRA 0x1f0 ; /* 0xfffffdc000001947 */
/* 0x000fea000383ffff */
/*0430*/ @!P0 EXIT ; /* 0x000000000000894d */
/* 0x000fea0003800000 */
/*0440*/ LDG.E.64 R8, [R12.64] ; /* 0x000000040c087981 */
/* 0x000362000c1e1b00 */
/*0450*/ IMAD R10, R7, c[0x0][0x178], R3 ; /* 0x00005e00070a7a24 */
/* 0x000fe400078e0203 */
/*0460*/ IMAD R0, R0, c[0x0][0x178], R7 ; /* 0x00005e0000007a24 */
/* 0x000fc800078e0207 */
/*0470*/ IMAD.WIDE.U32 R2, R0, R5, c[0x0][0x160] ; /* 0x0000580000027625 */
/* 0x000fc800078e0005 */
/*0480*/ IMAD.WIDE.U32 R6, R10, R5, c[0x0][0x168] ; /* 0x00005a000a067625 */
/* 0x000fe400078e0005 */
/*0490*/ LDG.E.64 R2, [R2.64] ; /* 0x0000000402027981 */
/* 0x008ee8000c1e1b00 */
/*04a0*/ LDG.E.64 R6, [R6.64] ; /* 0x0000000406067981 */
/* 0x000ee2000c1e1b00 */
/*04b0*/ IADD3 R4, R4, -0x1, RZ ; /* 0xffffffff04047810 */
/* 0x000fe40007ffe0ff */
/*04c0*/ IADD3 R10, R10, c[0x0][0x178], RZ ; /* 0x00005e000a0a7a10 */
/* 0x000fe40007ffe0ff */
/*04d0*/ ISETP.NE.AND P0, PT, R4, RZ, PT ; /* 0x000000ff0400720c */
/* 0x000fc40003f05270 */
/*04e0*/ IADD3 R0, R0, 0x1, RZ ; /* 0x0000000100007810 */
/* 0x000fe20007ffe0ff */
/*04f0*/ DFMA R8, R6, R2, R8 ; /* 0x000000020608722b */
/* 0x028ece0000000008 */
/*0500*/ STG.E.64 [R12.64], R8 ; /* 0x000000080c007986 */
/* 0x0087e6000c101b04 */
/*0510*/ @P0 BRA 0x470 ; /* 0xffffff5000000947 */
/* 0x000fea000383ffff */
/*0520*/ EXIT ; /* 0x000000000000794d */
/* 0x000fea0003800000 */
/*0530*/ BRA 0x530; /* 0xfffffff000007947 */
/* 0x000fc0000383ffff */
/*0540*/ NOP; /* 0x0000000000007918 */
/* 0x000fc00000000000 */
/*0550*/ NOP; /* 0x0000000000007918 */
/* 0x000fc00000000000 */
/*0560*/ NOP; /* 0x0000000000007918 */
/* 0x000fc00000000000 */
/*0570*/ NOP; /* 0x0000000000007918 */
/* 0x000fc00000000000 */
/*0580*/ NOP; /* 0x0000000000007918 */
/* 0x000fc00000000000 */
/*0590*/ NOP; /* 0x0000000000007918 */
/* 0x000fc00000000000 */
/*05a0*/ NOP; /* 0x0000000000007918 */
/* 0x000fc00000000000 */
/*05b0*/ NOP; /* 0x0000000000007918 */
/* 0x000fc00000000000 */
/*05c0*/ NOP; /* 0x0000000000007918 */
/* 0x000fc00000000000 */
/*05d0*/ NOP; /* 0x0000000000007918 */
/* 0x000fc00000000000 */
/*05e0*/ NOP; /* 0x0000000000007918 */
/* 0x000fc00000000000 */
/*05f0*/ NOP; /* 0x0000000000007918 */
/* 0x000fc00000000000 */
.......... | .text
.amdgcn_target "amdgcn-amd-amdhsa--gfx1100"
.protected _Z19multiply_matrix_gpuPdS_S_i
.globl _Z19multiply_matrix_gpuPdS_S_i
.p2align 8
.type _Z19multiply_matrix_gpuPdS_S_i,@function
_Z19multiply_matrix_gpuPdS_S_i:
s_clause 0x1
s_load_b32 s2, s[0:1], 0x2c
s_load_b32 s4, s[0:1], 0x18
v_and_b32_e32 v2, 0x3ff, v0
v_bfe_u32 v3, v0, 10, 10
s_mov_b32 s5, 0
s_waitcnt lgkmcnt(0)
s_and_b32 s3, s2, 0xffff
s_lshr_b32 s2, s2, 16
v_mad_u64_u32 v[0:1], null, s14, s3, v[2:3]
v_mad_u64_u32 v[1:2], null, s15, s2, v[3:4]
s_cmp_gt_i32 s4, 0
s_cselect_b32 s2, -1, 0
s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
v_max_u32_e32 v2, v0, v1
v_cmp_gt_u32_e32 vcc_lo, s4, v2
s_and_b32 s2, vcc_lo, s2
s_delay_alu instid0(SALU_CYCLE_1)
s_and_saveexec_b32 s3, s2
s_cbranch_execz .LBB0_3
s_load_b64 s[2:3], s[0:1], 0x10
v_mul_lo_u32 v6, v1, s4
s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
v_dual_mov_b32 v2, 0 :: v_dual_add_nc_u32 v1, v6, v0
v_lshlrev_b64 v[2:3], 3, v[1:2]
s_waitcnt lgkmcnt(0)
s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_2)
v_add_co_u32 v2, vcc_lo, s2, v2
v_add_co_ci_u32_e32 v3, vcc_lo, s3, v3, vcc_lo
s_load_b128 s[0:3], s[0:1], 0x0
global_load_b64 v[4:5], v[2:3], off
.p2align 6
.LBB0_2:
v_dual_mov_b32 v8, 0 :: v_dual_add_nc_u32 v7, s5, v6
s_add_i32 s5, s5, 1
s_delay_alu instid0(SALU_CYCLE_1) | instskip(NEXT) | instid1(VALU_DEP_1)
s_cmp_lg_u32 s4, s5
v_mov_b32_e32 v1, v8
s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
v_lshlrev_b64 v[7:8], 3, v[7:8]
v_lshlrev_b64 v[9:10], 3, v[0:1]
v_add_nc_u32_e32 v0, s4, v0
s_waitcnt lgkmcnt(0)
s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_4)
v_add_co_u32 v7, vcc_lo, s0, v7
v_add_co_ci_u32_e32 v8, vcc_lo, s1, v8, vcc_lo
s_delay_alu instid0(VALU_DEP_4)
v_add_co_u32 v9, vcc_lo, s2, v9
v_add_co_ci_u32_e32 v10, vcc_lo, s3, v10, vcc_lo
global_load_b64 v[7:8], v[7:8], off
global_load_b64 v[9:10], v[9:10], off
s_waitcnt vmcnt(0)
v_fma_f64 v[4:5], v[7:8], v[9:10], v[4:5]
global_store_b64 v[2:3], v[4:5], off
s_cbranch_scc1 .LBB0_2
.LBB0_3:
s_nop 0
s_sendmsg sendmsg(MSG_DEALLOC_VGPRS)
s_endpgm
.section .rodata,"a",@progbits
.p2align 6, 0x0
.amdhsa_kernel _Z19multiply_matrix_gpuPdS_S_i
.amdhsa_group_segment_fixed_size 0
.amdhsa_private_segment_fixed_size 0
.amdhsa_kernarg_size 288
.amdhsa_user_sgpr_count 14
.amdhsa_user_sgpr_dispatch_ptr 0
.amdhsa_user_sgpr_queue_ptr 0
.amdhsa_user_sgpr_kernarg_segment_ptr 1
.amdhsa_user_sgpr_dispatch_id 0
.amdhsa_user_sgpr_private_segment_size 0
.amdhsa_wavefront_size32 1
.amdhsa_uses_dynamic_stack 0
.amdhsa_enable_private_segment 0
.amdhsa_system_sgpr_workgroup_id_x 1
.amdhsa_system_sgpr_workgroup_id_y 1
.amdhsa_system_sgpr_workgroup_id_z 0
.amdhsa_system_sgpr_workgroup_info 0
.amdhsa_system_vgpr_workitem_id 1
.amdhsa_next_free_vgpr 11
.amdhsa_next_free_sgpr 16
.amdhsa_float_round_mode_32 0
.amdhsa_float_round_mode_16_64 0
.amdhsa_float_denorm_mode_32 3
.amdhsa_float_denorm_mode_16_64 3
.amdhsa_dx10_clamp 1
.amdhsa_ieee_mode 1
.amdhsa_fp16_overflow 0
.amdhsa_workgroup_processor_mode 1
.amdhsa_memory_ordered 1
.amdhsa_forward_progress 0
.amdhsa_shared_vgpr_count 0
.amdhsa_exception_fp_ieee_invalid_op 0
.amdhsa_exception_fp_denorm_src 0
.amdhsa_exception_fp_ieee_div_zero 0
.amdhsa_exception_fp_ieee_overflow 0
.amdhsa_exception_fp_ieee_underflow 0
.amdhsa_exception_fp_ieee_inexact 0
.amdhsa_exception_int_div_zero 0
.end_amdhsa_kernel
.text
.Lfunc_end0:
.size _Z19multiply_matrix_gpuPdS_S_i, .Lfunc_end0-_Z19multiply_matrix_gpuPdS_S_i
.section .AMDGPU.csdata,"",@progbits
.text
.protected _Z26multiply_matrix_gpu_tilingPdS_S_i
.globl _Z26multiply_matrix_gpu_tilingPdS_S_i
.p2align 8
.type _Z26multiply_matrix_gpu_tilingPdS_S_i,@function
_Z26multiply_matrix_gpu_tilingPdS_S_i:
s_load_b32 s2, s[0:1], 0x18
s_mov_b32 s3, -1
s_waitcnt lgkmcnt(0)
s_cmp_lt_i32 s2, 1
s_cbranch_scc0 .LBB1_4
s_load_b32 s3, s[0:1], 0x2c
v_and_b32_e32 v2, 0x3ff, v0
v_bfe_u32 v3, v0, 10, 10
s_waitcnt lgkmcnt(0)
s_and_b32 s4, s3, 0xffff
s_lshr_b32 s3, s3, 16
s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_2) | instid1(VALU_DEP_1)
v_mad_u64_u32 v[0:1], null, s14, s4, v[2:3]
v_mad_u64_u32 v[1:2], null, s15, s3, v[3:4]
s_mov_b32 s3, exec_lo
v_max_u32_e32 v2, v0, v1
s_delay_alu instid0(VALU_DEP_1)
v_cmpx_gt_u32_e64 s2, v2
s_cbranch_execz .LBB1_3
s_load_b64 s[0:1], s[0:1], 0x10
v_mad_u64_u32 v[2:3], null, v0, s2, v[1:2]
v_mov_b32_e32 v3, 0
s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
v_lshlrev_b64 v[0:1], 3, v[2:3]
s_waitcnt lgkmcnt(0)
v_add_co_u32 v0, vcc_lo, s0, v0
s_delay_alu instid0(VALU_DEP_2)
v_add_co_ci_u32_e32 v1, vcc_lo, s1, v1, vcc_lo
global_load_b64 v[2:3], v[0:1], off
s_waitcnt vmcnt(0)
v_add_f64 v[2:3], v[2:3], 0
global_store_b64 v[0:1], v[2:3], off
.LBB1_3:
s_or_b32 exec_lo, exec_lo, s3
s_mov_b32 s3, 0
.LBB1_4:
s_delay_alu instid0(SALU_CYCLE_1)
s_and_not1_b32 vcc_lo, exec_lo, s3
s_cbranch_vccnz .LBB1_7
s_mov_b32 vcc_lo, 0
.LBB1_6:
s_waitcnt_vscnt null, 0x0
s_barrier
buffer_gl0_inv
s_barrier
buffer_gl0_inv
s_cbranch_vccz .LBB1_6
.LBB1_7:
s_nop 0
s_sendmsg sendmsg(MSG_DEALLOC_VGPRS)
s_endpgm
.section .rodata,"a",@progbits
.p2align 6, 0x0
.amdhsa_kernel _Z26multiply_matrix_gpu_tilingPdS_S_i
.amdhsa_group_segment_fixed_size 0
.amdhsa_private_segment_fixed_size 0
.amdhsa_kernarg_size 288
.amdhsa_user_sgpr_count 14
.amdhsa_user_sgpr_dispatch_ptr 0
.amdhsa_user_sgpr_queue_ptr 0
.amdhsa_user_sgpr_kernarg_segment_ptr 1
.amdhsa_user_sgpr_dispatch_id 0
.amdhsa_user_sgpr_private_segment_size 0
.amdhsa_wavefront_size32 1
.amdhsa_uses_dynamic_stack 0
.amdhsa_enable_private_segment 0
.amdhsa_system_sgpr_workgroup_id_x 1
.amdhsa_system_sgpr_workgroup_id_y 1
.amdhsa_system_sgpr_workgroup_id_z 0
.amdhsa_system_sgpr_workgroup_info 0
.amdhsa_system_vgpr_workitem_id 1
.amdhsa_next_free_vgpr 5
.amdhsa_next_free_sgpr 16
.amdhsa_float_round_mode_32 0
.amdhsa_float_round_mode_16_64 0
.amdhsa_float_denorm_mode_32 3
.amdhsa_float_denorm_mode_16_64 3
.amdhsa_dx10_clamp 1
.amdhsa_ieee_mode 1
.amdhsa_fp16_overflow 0
.amdhsa_workgroup_processor_mode 1
.amdhsa_memory_ordered 1
.amdhsa_forward_progress 0
.amdhsa_shared_vgpr_count 0
.amdhsa_exception_fp_ieee_invalid_op 0
.amdhsa_exception_fp_denorm_src 0
.amdhsa_exception_fp_ieee_div_zero 0
.amdhsa_exception_fp_ieee_overflow 0
.amdhsa_exception_fp_ieee_underflow 0
.amdhsa_exception_fp_ieee_inexact 0
.amdhsa_exception_int_div_zero 0
.end_amdhsa_kernel
.text
.Lfunc_end1:
.size _Z26multiply_matrix_gpu_tilingPdS_S_i, .Lfunc_end1-_Z26multiply_matrix_gpu_tilingPdS_S_i
.section .AMDGPU.csdata,"",@progbits
.text
.p2alignl 7, 3214868480
.fill 96, 4, 3214868480
.type __hip_cuid_,@object
.section .bss,"aw",@nobits
.globl __hip_cuid_
__hip_cuid_:
.byte 0
.size __hip_cuid_, 1
.ident "AMD clang version 18.0.0git (https://github.com/RadeonOpenCompute/llvm-project roc-6.3.2 25012 e5bf7e55c91490b07c49d8960fa7983d864936c4)"
.section ".note.GNU-stack","",@progbits
.addrsig
.addrsig_sym __hip_cuid_
.amdgpu_metadata
---
amdhsa.kernels:
- .args:
- .address_space: global
.offset: 0
.size: 8
.value_kind: global_buffer
- .address_space: global
.offset: 8
.size: 8
.value_kind: global_buffer
- .address_space: global
.offset: 16
.size: 8
.value_kind: global_buffer
- .offset: 24
.size: 4
.value_kind: by_value
- .offset: 32
.size: 4
.value_kind: hidden_block_count_x
- .offset: 36
.size: 4
.value_kind: hidden_block_count_y
- .offset: 40
.size: 4
.value_kind: hidden_block_count_z
- .offset: 44
.size: 2
.value_kind: hidden_group_size_x
- .offset: 46
.size: 2
.value_kind: hidden_group_size_y
- .offset: 48
.size: 2
.value_kind: hidden_group_size_z
- .offset: 50
.size: 2
.value_kind: hidden_remainder_x
- .offset: 52
.size: 2
.value_kind: hidden_remainder_y
- .offset: 54
.size: 2
.value_kind: hidden_remainder_z
- .offset: 72
.size: 8
.value_kind: hidden_global_offset_x
- .offset: 80
.size: 8
.value_kind: hidden_global_offset_y
- .offset: 88
.size: 8
.value_kind: hidden_global_offset_z
- .offset: 96
.size: 2
.value_kind: hidden_grid_dims
.group_segment_fixed_size: 0
.kernarg_segment_align: 8
.kernarg_segment_size: 288
.language: OpenCL C
.language_version:
- 2
- 0
.max_flat_workgroup_size: 1024
.name: _Z19multiply_matrix_gpuPdS_S_i
.private_segment_fixed_size: 0
.sgpr_count: 18
.sgpr_spill_count: 0
.symbol: _Z19multiply_matrix_gpuPdS_S_i.kd
.uniform_work_group_size: 1
.uses_dynamic_stack: false
.vgpr_count: 11
.vgpr_spill_count: 0
.wavefront_size: 32
.workgroup_processor_mode: 1
- .args:
- .address_space: global
.offset: 0
.size: 8
.value_kind: global_buffer
- .address_space: global
.offset: 8
.size: 8
.value_kind: global_buffer
- .address_space: global
.offset: 16
.size: 8
.value_kind: global_buffer
- .offset: 24
.size: 4
.value_kind: by_value
- .offset: 32
.size: 4
.value_kind: hidden_block_count_x
- .offset: 36
.size: 4
.value_kind: hidden_block_count_y
- .offset: 40
.size: 4
.value_kind: hidden_block_count_z
- .offset: 44
.size: 2
.value_kind: hidden_group_size_x
- .offset: 46
.size: 2
.value_kind: hidden_group_size_y
- .offset: 48
.size: 2
.value_kind: hidden_group_size_z
- .offset: 50
.size: 2
.value_kind: hidden_remainder_x
- .offset: 52
.size: 2
.value_kind: hidden_remainder_y
- .offset: 54
.size: 2
.value_kind: hidden_remainder_z
- .offset: 72
.size: 8
.value_kind: hidden_global_offset_x
- .offset: 80
.size: 8
.value_kind: hidden_global_offset_y
- .offset: 88
.size: 8
.value_kind: hidden_global_offset_z
- .offset: 96
.size: 2
.value_kind: hidden_grid_dims
.group_segment_fixed_size: 0
.kernarg_segment_align: 8
.kernarg_segment_size: 288
.language: OpenCL C
.language_version:
- 2
- 0
.max_flat_workgroup_size: 1024
.name: _Z26multiply_matrix_gpu_tilingPdS_S_i
.private_segment_fixed_size: 0
.sgpr_count: 18
.sgpr_spill_count: 0
.symbol: _Z26multiply_matrix_gpu_tilingPdS_S_i.kd
.uniform_work_group_size: 1
.uses_dynamic_stack: false
.vgpr_count: 5
.vgpr_spill_count: 0
.wavefront_size: 32
.workgroup_processor_mode: 1
amdhsa.target: amdgcn-amd-amdhsa--gfx1100
amdhsa.version:
- 1
- 2
...
.end_amdgpu_metadata |
You are a helpful coding assistant specialized in converting from CUDA host assembly to AMD host assembly. | .file "tmpxft_001090eb_00000000-6_matrix_multiplication.cudafe1.cpp"
.text
#APP
.globl _ZSt21ios_base_library_initv
#NO_APP
.type _ZL26__cudaUnregisterBinaryUtilv, @function
_ZL26__cudaUnregisterBinaryUtilv:
.LFB4861:
.cfi_startproc
endbr64
subq $8, %rsp
.cfi_def_cfa_offset 16
movq _ZL20__cudaFatCubinHandle(%rip), %rdi
call __cudaUnregisterFatBinary@PLT
addq $8, %rsp
.cfi_def_cfa_offset 8
ret
.cfi_endproc
.LFE4861:
.size _ZL26__cudaUnregisterBinaryUtilv, .-_ZL26__cudaUnregisterBinaryUtilv
.globl _Z20multiply_matrix_hostPdS_S_i
.type _Z20multiply_matrix_hostPdS_S_i, @function
_Z20multiply_matrix_hostPdS_S_i:
.LFB4852:
.cfi_startproc
endbr64
testl %ecx, %ecx
jle .L11
pushq %r13
.cfi_def_cfa_offset 16
.cfi_offset 13, -16
pushq %r12
.cfi_def_cfa_offset 24
.cfi_offset 12, -24
pushq %rbp
.cfi_def_cfa_offset 32
.cfi_offset 6, -32
pushq %rbx
.cfi_def_cfa_offset 40
.cfi_offset 3, -40
movq %rsi, %rbp
movq %rdx, %rbx
movl %ecx, %r11d
movslq %ecx, %rsi
salq $3, %rsi
movq %rdi, %r10
addq %rsi, %rdi
movl $0, %r12d
movl $0, %r13d
jmp .L5
.L7:
leal 1(%r12), %eax
addq %rsi, %r10
addq %rsi, %rdi
addq %rsi, %rbx
cmpl %r9d, %r12d
je .L3
movl %eax, %r12d
.L5:
movq %rbp, %r8
movq %rbx, %rcx
movl %r13d, %r9d
.L8:
movq %r8, %rdx
movq %r10, %rax
.L6:
movsd (%rax), %xmm0
mulsd (%rdx), %xmm0
addsd (%rcx), %xmm0
movsd %xmm0, (%rcx)
addq $8, %rax
addq %rsi, %rdx
cmpq %rdi, %rax
jne .L6
leal 1(%r9), %eax
addq $8, %r8
addq $8, %rcx
cmpl %eax, %r11d
je .L7
movl %eax, %r9d
jmp .L8
.L3:
popq %rbx
.cfi_def_cfa_offset 32
popq %rbp
.cfi_def_cfa_offset 24
popq %r12
.cfi_def_cfa_offset 16
popq %r13
.cfi_def_cfa_offset 8
ret
.L11:
.cfi_restore 3
.cfi_restore 6
.cfi_restore 12
.cfi_restore 13
ret
.cfi_endproc
.LFE4852:
.size _Z20multiply_matrix_hostPdS_S_i, .-_Z20multiply_matrix_hostPdS_S_i
.section .rodata.str1.1,"aMS",@progbits,1
.LC2:
.string "host %f gpu %f\n"
.LC3:
.string "Matrix does not not match.\n\n"
.LC4:
.string "Matrix match.\n\n"
.text
.globl _Z11checkResultPdS_i
.type _Z11checkResultPdS_i, @function
_Z11checkResultPdS_i:
.LFB4853:
.cfi_startproc
endbr64
subq $8, %rsp
.cfi_def_cfa_offset 16
imull %edx, %edx
testl %edx, %edx
jle .L15
movslq %edx, %rdx
salq $3, %rdx
movl $0, %eax
movq .LC0(%rip), %xmm4
movsd .LC1(%rip), %xmm3
.L19:
movsd (%rdi,%rax), %xmm2
movsd (%rsi,%rax), %xmm1
movapd %xmm2, %xmm0
subsd %xmm1, %xmm0
andpd %xmm4, %xmm0
comisd %xmm3, %xmm0
ja .L24
addq $8, %rax
cmpq %rdx, %rax
jne .L19
.L15:
leaq .LC4(%rip), %rsi
movl $2, %edi
movl $0, %eax
call __printf_chk@PLT
.L14:
addq $8, %rsp
.cfi_remember_state
.cfi_def_cfa_offset 8
ret
.L24:
.cfi_restore_state
movapd %xmm2, %xmm0
leaq .LC2(%rip), %rsi
movl $2, %edi
movl $2, %eax
call __printf_chk@PLT
leaq .LC3(%rip), %rsi
movl $2, %edi
movl $0, %eax
call __printf_chk@PLT
jmp .L14
.cfi_endproc
.LFE4853:
.size _Z11checkResultPdS_i, .-_Z11checkResultPdS_i
.globl _Z44__device_stub__Z19multiply_matrix_gpuPdS_S_iPdS_S_i
.type _Z44__device_stub__Z19multiply_matrix_gpuPdS_S_iPdS_S_i, @function
_Z44__device_stub__Z19multiply_matrix_gpuPdS_S_iPdS_S_i:
.LFB4883:
.cfi_startproc
endbr64
subq $152, %rsp
.cfi_def_cfa_offset 160
movq %rdi, 24(%rsp)
movq %rsi, 16(%rsp)
movq %rdx, 8(%rsp)
movl %ecx, 4(%rsp)
movq %fs:40, %rax
movq %rax, 136(%rsp)
xorl %eax, %eax
leaq 24(%rsp), %rax
movq %rax, 96(%rsp)
leaq 16(%rsp), %rax
movq %rax, 104(%rsp)
leaq 8(%rsp), %rax
movq %rax, 112(%rsp)
leaq 4(%rsp), %rax
movq %rax, 120(%rsp)
movl $1, 48(%rsp)
movl $1, 52(%rsp)
movl $1, 56(%rsp)
movl $1, 60(%rsp)
movl $1, 64(%rsp)
movl $1, 68(%rsp)
leaq 40(%rsp), %rcx
leaq 32(%rsp), %rdx
leaq 60(%rsp), %rsi
leaq 48(%rsp), %rdi
call __cudaPopCallConfiguration@PLT
testl %eax, %eax
je .L29
.L25:
movq 136(%rsp), %rax
subq %fs:40, %rax
jne .L30
addq $152, %rsp
.cfi_remember_state
.cfi_def_cfa_offset 8
ret
.L29:
.cfi_restore_state
pushq 40(%rsp)
.cfi_def_cfa_offset 168
pushq 40(%rsp)
.cfi_def_cfa_offset 176
leaq 112(%rsp), %r9
movq 76(%rsp), %rcx
movl 84(%rsp), %r8d
movq 64(%rsp), %rsi
movl 72(%rsp), %edx
leaq _Z19multiply_matrix_gpuPdS_S_i(%rip), %rdi
call cudaLaunchKernel@PLT
addq $16, %rsp
.cfi_def_cfa_offset 160
jmp .L25
.L30:
call __stack_chk_fail@PLT
.cfi_endproc
.LFE4883:
.size _Z44__device_stub__Z19multiply_matrix_gpuPdS_S_iPdS_S_i, .-_Z44__device_stub__Z19multiply_matrix_gpuPdS_S_iPdS_S_i
.globl _Z19multiply_matrix_gpuPdS_S_i
.type _Z19multiply_matrix_gpuPdS_S_i, @function
_Z19multiply_matrix_gpuPdS_S_i:
.LFB4884:
.cfi_startproc
endbr64
subq $8, %rsp
.cfi_def_cfa_offset 16
call _Z44__device_stub__Z19multiply_matrix_gpuPdS_S_iPdS_S_i
addq $8, %rsp
.cfi_def_cfa_offset 8
ret
.cfi_endproc
.LFE4884:
.size _Z19multiply_matrix_gpuPdS_S_i, .-_Z19multiply_matrix_gpuPdS_S_i
.globl _Z51__device_stub__Z26multiply_matrix_gpu_tilingPdS_S_iPdS_S_i
.type _Z51__device_stub__Z26multiply_matrix_gpu_tilingPdS_S_iPdS_S_i, @function
_Z51__device_stub__Z26multiply_matrix_gpu_tilingPdS_S_iPdS_S_i:
.LFB4885:
.cfi_startproc
endbr64
subq $152, %rsp
.cfi_def_cfa_offset 160
movq %rdi, 24(%rsp)
movq %rsi, 16(%rsp)
movq %rdx, 8(%rsp)
movl %ecx, 4(%rsp)
movq %fs:40, %rax
movq %rax, 136(%rsp)
xorl %eax, %eax
leaq 24(%rsp), %rax
movq %rax, 96(%rsp)
leaq 16(%rsp), %rax
movq %rax, 104(%rsp)
leaq 8(%rsp), %rax
movq %rax, 112(%rsp)
leaq 4(%rsp), %rax
movq %rax, 120(%rsp)
movl $1, 48(%rsp)
movl $1, 52(%rsp)
movl $1, 56(%rsp)
movl $1, 60(%rsp)
movl $1, 64(%rsp)
movl $1, 68(%rsp)
leaq 40(%rsp), %rcx
leaq 32(%rsp), %rdx
leaq 60(%rsp), %rsi
leaq 48(%rsp), %rdi
call __cudaPopCallConfiguration@PLT
testl %eax, %eax
je .L37
.L33:
movq 136(%rsp), %rax
subq %fs:40, %rax
jne .L38
addq $152, %rsp
.cfi_remember_state
.cfi_def_cfa_offset 8
ret
.L37:
.cfi_restore_state
pushq 40(%rsp)
.cfi_def_cfa_offset 168
pushq 40(%rsp)
.cfi_def_cfa_offset 176
leaq 112(%rsp), %r9
movq 76(%rsp), %rcx
movl 84(%rsp), %r8d
movq 64(%rsp), %rsi
movl 72(%rsp), %edx
leaq _Z26multiply_matrix_gpu_tilingPdS_S_i(%rip), %rdi
call cudaLaunchKernel@PLT
addq $16, %rsp
.cfi_def_cfa_offset 160
jmp .L33
.L38:
call __stack_chk_fail@PLT
.cfi_endproc
.LFE4885:
.size _Z51__device_stub__Z26multiply_matrix_gpu_tilingPdS_S_iPdS_S_i, .-_Z51__device_stub__Z26multiply_matrix_gpu_tilingPdS_S_iPdS_S_i
.globl _Z26multiply_matrix_gpu_tilingPdS_S_i
.type _Z26multiply_matrix_gpu_tilingPdS_S_i, @function
_Z26multiply_matrix_gpu_tilingPdS_S_i:
.LFB4886:
.cfi_startproc
endbr64
subq $8, %rsp
.cfi_def_cfa_offset 16
call _Z51__device_stub__Z26multiply_matrix_gpu_tilingPdS_S_iPdS_S_i
addq $8, %rsp
.cfi_def_cfa_offset 8
ret
.cfi_endproc
.LFE4886:
.size _Z26multiply_matrix_gpu_tilingPdS_S_i, .-_Z26multiply_matrix_gpu_tilingPdS_S_i
.section .rodata.str1.1
.LC5:
.string "Using Device %d: %s\n"
.section .rodata.str1.8,"aMS",@progbits,1
.align 8
.LC9:
.string "multiply_matrix_host elapsed %f ms\n"
.align 8
.LC10:
.string "grid.x %d grid.y %d block.x %d block.y %d\n"
.align 8
.LC11:
.string "multiply_matrix_gpu elapsed %f ms\n"
.align 8
.LC12:
.string "multiply_matrix_gpu_tiling elapsed %f ms\n"
.text
.globl main
.type main, @function
main:
.LFB4854:
.cfi_startproc
endbr64
pushq %r15
.cfi_def_cfa_offset 16
.cfi_offset 15, -16
pushq %r14
.cfi_def_cfa_offset 24
.cfi_offset 14, -24
pushq %r13
.cfi_def_cfa_offset 32
.cfi_offset 13, -32
pushq %r12
.cfi_def_cfa_offset 40
.cfi_offset 12, -40
pushq %rbp
.cfi_def_cfa_offset 48
.cfi_offset 6, -48
pushq %rbx
.cfi_def_cfa_offset 56
.cfi_offset 3, -56
subq $1096, %rsp
.cfi_def_cfa_offset 1152
movq %fs:40, %rax
movq %rax, 1080(%rsp)
xorl %eax, %eax
leaq 48(%rsp), %rbx
movl $0, %esi
movq %rbx, %rdi
call cudaGetDeviceProperties_v2@PLT
movq %rbx, %rcx
movl $0, %edx
leaq .LC5(%rip), %rsi
movl $2, %edi
movl $0, %eax
call __printf_chk@PLT
movl $0, %edi
call cudaSetDevice@PLT
movl $8000000, %edi
call malloc@PLT
movq %rax, %r12
movl $8000000, %edi
call malloc@PLT
movq %rax, %rbp
movl $8000000, %edi
call malloc@PLT
movq %rax, %r14
movl $8000000, %edi
call malloc@PLT
movq %rax, %r13
movl $0, %ebx
.L42:
call rand@PLT
pxor %xmm0, %xmm0
cvtsi2sdl %eax, %xmm0
divsd .LC6(%rip), %xmm0
addsd .LC7(%rip), %xmm0
movq %xmm0, %r15
call rand@PLT
movq %r15, (%r12,%rbx)
pxor %xmm0, %xmm0
cvtsi2sdl %eax, %xmm0
divsd .LC6(%rip), %xmm0
addsd .LC7(%rip), %xmm0
movsd %xmm0, 0(%rbp,%rbx)
addq $8, %rbx
cmpq $8000000, %rbx
jne .L42
movl $8000000, %edx
movl $0, %esi
movq %r14, %rdi
call memset@PLT
movl $8000000, %edx
movl $0, %esi
movq %r13, %rdi
call memset@PLT
call _ZNSt6chrono3_V212system_clock3nowEv@PLT
movq %rax, %rbx
movl $1000, %ecx
movq %r14, %rdx
movq %rbp, %rsi
movq %r12, %rdi
call _Z20multiply_matrix_hostPdS_S_i
call _ZNSt6chrono3_V212system_clock3nowEv@PLT
subq %rbx, %rax
pxor %xmm0, %xmm0
cvtsi2ssq %rax, %xmm0
divss .LC8(%rip), %xmm0
cvtss2sd %xmm0, %xmm0
leaq .LC9(%rip), %rsi
movl $2, %edi
movl $1, %eax
call __printf_chk@PLT
movq %rsp, %rdi
movl $8000000, %esi
call cudaMalloc@PLT
leaq 8(%rsp), %rdi
movl $8000000, %esi
call cudaMalloc@PLT
leaq 16(%rsp), %rdi
movl $8000000, %esi
call cudaMalloc@PLT
movl $1, %ecx
movl $8000000, %edx
movq %r12, %rsi
movq (%rsp), %rdi
call cudaMemcpy@PLT
movl $1, %ecx
movl $8000000, %edx
movq %rbp, %rsi
movq 8(%rsp), %rdi
call cudaMemcpy@PLT
movl $8000000, %edx
movl $0, %esi
movq 16(%rsp), %rdi
call cudaMemset@PLT
movl $1, 32(%rsp)
movl $1, 44(%rsp)
movl $32, %r9d
movl $32, %r8d
movl $32, %ecx
movl $32, %edx
leaq .LC10(%rip), %rsi
movl $2, %edi
movl $0, %eax
call __printf_chk@PLT
call _ZNSt6chrono3_V212system_clock3nowEv@PLT
movq %rax, %rbx
movl $32, 36(%rsp)
movl $32, 40(%rsp)
movl $32, 24(%rsp)
movl $32, 28(%rsp)
movl 32(%rsp), %ecx
movl $0, %r9d
movl $0, %r8d
movq 24(%rsp), %rdx
movq 36(%rsp), %rdi
movl 44(%rsp), %esi
call __cudaPushCallConfiguration@PLT
testl %eax, %eax
je .L48
.L43:
call cudaDeviceSynchronize@PLT
call _ZNSt6chrono3_V212system_clock3nowEv@PLT
subq %rbx, %rax
pxor %xmm0, %xmm0
cvtsi2ssq %rax, %xmm0
divss .LC8(%rip), %xmm0
cvtss2sd %xmm0, %xmm0
leaq .LC11(%rip), %rsi
movl $2, %edi
movl $1, %eax
call __printf_chk@PLT
movl $2, %ecx
movl $8000000, %edx
movq 16(%rsp), %rsi
movq %r13, %rdi
call cudaMemcpy@PLT
movl $1000, %edx
movq %r13, %rsi
movq %r14, %rdi
call _Z11checkResultPdS_i
call _ZNSt6chrono3_V212system_clock3nowEv@PLT
movq %rax, %rbx
movl 32(%rsp), %ecx
movl $0, %r9d
movl $0, %r8d
movq 24(%rsp), %rdx
movq 36(%rsp), %rdi
movl 44(%rsp), %esi
call __cudaPushCallConfiguration@PLT
testl %eax, %eax
je .L49
.L44:
call cudaDeviceSynchronize@PLT
call _ZNSt6chrono3_V212system_clock3nowEv@PLT
subq %rbx, %rax
pxor %xmm0, %xmm0
cvtsi2ssq %rax, %xmm0
divss .LC8(%rip), %xmm0
cvtss2sd %xmm0, %xmm0
leaq .LC12(%rip), %rsi
movl $2, %edi
movl $1, %eax
call __printf_chk@PLT
movl $2, %ecx
movl $8000000, %edx
movq 16(%rsp), %rsi
movq %r13, %rdi
call cudaMemcpy@PLT
movl $1000, %edx
movq %r13, %rsi
movq %r14, %rdi
call _Z11checkResultPdS_i
movq (%rsp), %rdi
call cudaFree@PLT
movq 8(%rsp), %rdi
call cudaFree@PLT
movq 16(%rsp), %rdi
call cudaFree@PLT
movq %r12, %rdi
call free@PLT
movq %rbp, %rdi
call free@PLT
movq %r14, %rdi
call free@PLT
movq %r13, %rdi
call free@PLT
call cudaDeviceReset@PLT
movq 1080(%rsp), %rax
subq %fs:40, %rax
jne .L50
movl $0, %eax
addq $1096, %rsp
.cfi_remember_state
.cfi_def_cfa_offset 56
popq %rbx
.cfi_def_cfa_offset 48
popq %rbp
.cfi_def_cfa_offset 40
popq %r12
.cfi_def_cfa_offset 32
popq %r13
.cfi_def_cfa_offset 24
popq %r14
.cfi_def_cfa_offset 16
popq %r15
.cfi_def_cfa_offset 8
ret
.L48:
.cfi_restore_state
movl $1000, %ecx
movq 16(%rsp), %rdx
movq 8(%rsp), %rsi
movq (%rsp), %rdi
call _Z44__device_stub__Z19multiply_matrix_gpuPdS_S_iPdS_S_i
jmp .L43
.L49:
movl $1000, %ecx
movq 16(%rsp), %rdx
movq 8(%rsp), %rsi
movq (%rsp), %rdi
call _Z51__device_stub__Z26multiply_matrix_gpu_tilingPdS_S_iPdS_S_i
jmp .L44
.L50:
call __stack_chk_fail@PLT
.cfi_endproc
.LFE4854:
.size main, .-main
.section .rodata.str1.8
.align 8
.LC13:
.string "_Z26multiply_matrix_gpu_tilingPdS_S_i"
.align 8
.LC14:
.string "_Z19multiply_matrix_gpuPdS_S_i"
.text
.type _ZL24__sti____cudaRegisterAllv, @function
_ZL24__sti____cudaRegisterAllv:
.LFB4888:
.cfi_startproc
endbr64
pushq %rbx
.cfi_def_cfa_offset 16
.cfi_offset 3, -16
leaq _ZL15__fatDeviceText(%rip), %rdi
call __cudaRegisterFatBinary@PLT
movq %rax, %rbx
movq %rax, _ZL20__cudaFatCubinHandle(%rip)
pushq $0
.cfi_def_cfa_offset 24
pushq $0
.cfi_def_cfa_offset 32
pushq $0
.cfi_def_cfa_offset 40
pushq $0
.cfi_def_cfa_offset 48
movl $0, %r9d
movl $-1, %r8d
leaq .LC13(%rip), %rdx
movq %rdx, %rcx
leaq _Z26multiply_matrix_gpu_tilingPdS_S_i(%rip), %rsi
movq %rax, %rdi
call __cudaRegisterFunction@PLT
addq $32, %rsp
.cfi_def_cfa_offset 16
pushq $0
.cfi_def_cfa_offset 24
pushq $0
.cfi_def_cfa_offset 32
pushq $0
.cfi_def_cfa_offset 40
pushq $0
.cfi_def_cfa_offset 48
movl $0, %r9d
movl $-1, %r8d
leaq .LC14(%rip), %rdx
movq %rdx, %rcx
leaq _Z19multiply_matrix_gpuPdS_S_i(%rip), %rsi
movq %rbx, %rdi
call __cudaRegisterFunction@PLT
addq $32, %rsp
.cfi_def_cfa_offset 16
movq _ZL20__cudaFatCubinHandle(%rip), %rdi
call __cudaRegisterFatBinaryEnd@PLT
leaq _ZL26__cudaUnregisterBinaryUtilv(%rip), %rdi
call atexit@PLT
popq %rbx
.cfi_def_cfa_offset 8
ret
.cfi_endproc
.LFE4888:
.size _ZL24__sti____cudaRegisterAllv, .-_ZL24__sti____cudaRegisterAllv
.section .init_array,"aw"
.align 8
.quad _ZL24__sti____cudaRegisterAllv
.section .nvFatBinSegment,"aw"
.align 8
.type _ZL15__fatDeviceText, @object
.size _ZL15__fatDeviceText, 24
_ZL15__fatDeviceText:
.long 1180844977
.long 1
.quad fatbinData
.quad 0
.local _ZL20__cudaFatCubinHandle
.comm _ZL20__cudaFatCubinHandle,8,8
.section .rodata.cst16,"aM",@progbits,16
.align 16
.LC0:
.long -1
.long 2147483647
.long 0
.long 0
.section .rodata.cst8,"aM",@progbits,8
.align 8
.LC1:
.long -500134854
.long 1044740494
.align 8
.LC6:
.long 536870912
.long 1101820359
.align 8
.LC7:
.long 0
.long 1072693248
.section .rodata.cst4,"aM",@progbits,4
.align 4
.LC8:
.long 1232348160
.ident "GCC: (Ubuntu 13.3.0-6ubuntu2~24.04) 13.3.0"
.section .note.GNU-stack,"",@progbits
.section .note.gnu.property,"a"
.align 8
.long 1f - 0f
.long 4f - 1f
.long 5
0:
.string "GNU"
1:
.align 8
.long 0xc0000002
.long 3f - 2f
2:
.long 0x3
3:
.align 8
4: | .text
.file "matrix_multiplication.hip"
# Start of file scope inline assembly
.globl _ZSt21ios_base_library_initv
# End of file scope inline assembly
.globl _Z34__device_stub__multiply_matrix_gpuPdS_S_i # -- Begin function _Z34__device_stub__multiply_matrix_gpuPdS_S_i
.p2align 4, 0x90
.type _Z34__device_stub__multiply_matrix_gpuPdS_S_i,@function
_Z34__device_stub__multiply_matrix_gpuPdS_S_i: # @_Z34__device_stub__multiply_matrix_gpuPdS_S_i
.cfi_startproc
# %bb.0:
subq $120, %rsp
.cfi_def_cfa_offset 128
movq %rdi, 72(%rsp)
movq %rsi, 64(%rsp)
movq %rdx, 56(%rsp)
movl %ecx, 4(%rsp)
leaq 72(%rsp), %rax
movq %rax, 80(%rsp)
leaq 64(%rsp), %rax
movq %rax, 88(%rsp)
leaq 56(%rsp), %rax
movq %rax, 96(%rsp)
leaq 4(%rsp), %rax
movq %rax, 104(%rsp)
leaq 40(%rsp), %rdi
leaq 24(%rsp), %rsi
leaq 16(%rsp), %rdx
leaq 8(%rsp), %rcx
callq __hipPopCallConfiguration
movq 40(%rsp), %rsi
movl 48(%rsp), %edx
movq 24(%rsp), %rcx
movl 32(%rsp), %r8d
leaq 80(%rsp), %r9
movl $_Z19multiply_matrix_gpuPdS_S_i, %edi
pushq 8(%rsp)
.cfi_adjust_cfa_offset 8
pushq 24(%rsp)
.cfi_adjust_cfa_offset 8
callq hipLaunchKernel
addq $136, %rsp
.cfi_adjust_cfa_offset -136
retq
.Lfunc_end0:
.size _Z34__device_stub__multiply_matrix_gpuPdS_S_i, .Lfunc_end0-_Z34__device_stub__multiply_matrix_gpuPdS_S_i
.cfi_endproc
# -- End function
.globl _Z41__device_stub__multiply_matrix_gpu_tilingPdS_S_i # -- Begin function _Z41__device_stub__multiply_matrix_gpu_tilingPdS_S_i
.p2align 4, 0x90
.type _Z41__device_stub__multiply_matrix_gpu_tilingPdS_S_i,@function
_Z41__device_stub__multiply_matrix_gpu_tilingPdS_S_i: # @_Z41__device_stub__multiply_matrix_gpu_tilingPdS_S_i
.cfi_startproc
# %bb.0:
subq $120, %rsp
.cfi_def_cfa_offset 128
movq %rdi, 72(%rsp)
movq %rsi, 64(%rsp)
movq %rdx, 56(%rsp)
movl %ecx, 4(%rsp)
leaq 72(%rsp), %rax
movq %rax, 80(%rsp)
leaq 64(%rsp), %rax
movq %rax, 88(%rsp)
leaq 56(%rsp), %rax
movq %rax, 96(%rsp)
leaq 4(%rsp), %rax
movq %rax, 104(%rsp)
leaq 40(%rsp), %rdi
leaq 24(%rsp), %rsi
leaq 16(%rsp), %rdx
leaq 8(%rsp), %rcx
callq __hipPopCallConfiguration
movq 40(%rsp), %rsi
movl 48(%rsp), %edx
movq 24(%rsp), %rcx
movl 32(%rsp), %r8d
leaq 80(%rsp), %r9
movl $_Z26multiply_matrix_gpu_tilingPdS_S_i, %edi
pushq 8(%rsp)
.cfi_adjust_cfa_offset 8
pushq 24(%rsp)
.cfi_adjust_cfa_offset 8
callq hipLaunchKernel
addq $136, %rsp
.cfi_adjust_cfa_offset -136
retq
.Lfunc_end1:
.size _Z41__device_stub__multiply_matrix_gpu_tilingPdS_S_i, .Lfunc_end1-_Z41__device_stub__multiply_matrix_gpu_tilingPdS_S_i
.cfi_endproc
# -- End function
.globl _Z20multiply_matrix_hostPdS_S_i # -- Begin function _Z20multiply_matrix_hostPdS_S_i
.p2align 4, 0x90
.type _Z20multiply_matrix_hostPdS_S_i,@function
_Z20multiply_matrix_hostPdS_S_i: # @_Z20multiply_matrix_hostPdS_S_i
.cfi_startproc
# %bb.0:
testl %ecx, %ecx
jle .LBB2_8
# %bb.1: # %.preheader23.lr.ph
pushq %r15
.cfi_def_cfa_offset 16
pushq %r14
.cfi_def_cfa_offset 24
pushq %r13
.cfi_def_cfa_offset 32
pushq %r12
.cfi_def_cfa_offset 40
pushq %rbx
.cfi_def_cfa_offset 48
.cfi_offset %rbx, -48
.cfi_offset %r12, -40
.cfi_offset %r13, -32
.cfi_offset %r14, -24
.cfi_offset %r15, -16
movl %ecx, %eax
leaq (,%rax,8), %r8
xorl %r9d, %r9d
xorl %r10d, %r10d
.p2align 4, 0x90
.LBB2_2: # %.preheader23
# =>This Loop Header: Depth=1
# Child Loop BB2_3 Depth 2
# Child Loop BB2_4 Depth 3
movl %r9d, %r11d
leaq (%rdi,%r11,8), %r11
movq %r10, %rbx
imulq %rax, %rbx
leaq (%rdx,%rbx,8), %rbx
movq %rsi, %r14
xorl %r15d, %r15d
.p2align 4, 0x90
.LBB2_3: # %.preheader
# Parent Loop BB2_2 Depth=1
# => This Loop Header: Depth=2
# Child Loop BB2_4 Depth 3
movsd (%rbx,%r15,8), %xmm0 # xmm0 = mem[0],zero
movq %r14, %r12
xorl %r13d, %r13d
.p2align 4, 0x90
.LBB2_4: # Parent Loop BB2_2 Depth=1
# Parent Loop BB2_3 Depth=2
# => This Inner Loop Header: Depth=3
movsd (%r11,%r13,8), %xmm1 # xmm1 = mem[0],zero
mulsd (%r12), %xmm1
addsd %xmm1, %xmm0
movsd %xmm0, (%rbx,%r15,8)
incq %r13
addq %r8, %r12
cmpq %r13, %rax
jne .LBB2_4
# %bb.5: # %._crit_edge
# in Loop: Header=BB2_3 Depth=2
incq %r15
addq $8, %r14
cmpq %rax, %r15
jne .LBB2_3
# %bb.6: # %._crit_edge26
# in Loop: Header=BB2_2 Depth=1
incq %r10
addl %ecx, %r9d
cmpq %rax, %r10
jne .LBB2_2
# %bb.7:
popq %rbx
.cfi_def_cfa_offset 40
popq %r12
.cfi_def_cfa_offset 32
popq %r13
.cfi_def_cfa_offset 24
popq %r14
.cfi_def_cfa_offset 16
popq %r15
.cfi_def_cfa_offset 8
.cfi_restore %rbx
.cfi_restore %r12
.cfi_restore %r13
.cfi_restore %r14
.cfi_restore %r15
.LBB2_8: # %._crit_edge28
retq
.Lfunc_end2:
.size _Z20multiply_matrix_hostPdS_S_i, .Lfunc_end2-_Z20multiply_matrix_hostPdS_S_i
.cfi_endproc
# -- End function
.section .rodata.cst16,"aM",@progbits,16
.p2align 4, 0x0 # -- Begin function _Z11checkResultPdS_i
.LCPI3_0:
.quad 0x7fffffffffffffff # double NaN
.quad 0x7fffffffffffffff # double NaN
.section .rodata.cst8,"aM",@progbits,8
.p2align 3, 0x0
.LCPI3_1:
.quad 0x3e45798ee2308c3a # double 1.0E-8
.text
.globl _Z11checkResultPdS_i
.p2align 4, 0x90
.type _Z11checkResultPdS_i,@function
_Z11checkResultPdS_i: # @_Z11checkResultPdS_i
.cfi_startproc
# %bb.0:
# kill: def $edx killed $edx def $rdx
movq %rdi, %rax
movl $.Lstr.1, %edi
testl %edx, %edx
je puts@PLT # TAILCALL
# %bb.1: # %.lr.ph.preheader
imull %edx, %edx
cmpl $1, %edx
adcl $0, %edx
xorl %ecx, %ecx
movapd .LCPI3_0(%rip), %xmm2 # xmm2 = [NaN,NaN]
movsd .LCPI3_1(%rip), %xmm3 # xmm3 = mem[0],zero
jmp .LBB3_3
.p2align 4, 0x90
.LBB3_2: # in Loop: Header=BB3_3 Depth=1
incq %rcx
cmpq %rcx, %rdx
je puts@PLT # TAILCALL
.LBB3_3: # %.lr.ph
# =>This Inner Loop Header: Depth=1
movsd (%rax,%rcx,8), %xmm0 # xmm0 = mem[0],zero
movsd (%rsi,%rcx,8), %xmm1 # xmm1 = mem[0],zero
movapd %xmm0, %xmm4
subsd %xmm1, %xmm4
andpd %xmm2, %xmm4
ucomisd %xmm3, %xmm4
jbe .LBB3_2
# %bb.4:
pushq %rax
.cfi_def_cfa_offset 16
movl $.L.str, %edi
movb $2, %al
callq printf
movl $.Lstr, %edi
addq $8, %rsp
.cfi_def_cfa_offset 8
jmp puts@PLT # TAILCALL
.Lfunc_end3:
.size _Z11checkResultPdS_i, .Lfunc_end3-_Z11checkResultPdS_i
.cfi_endproc
# -- End function
.section .rodata.cst8,"aM",@progbits,8
.p2align 3, 0x0 # -- Begin function main
.LCPI4_0:
.quad 0x41ac71c720000000 # double 238609296
.LCPI4_1:
.quad 0x3ff0000000000000 # double 1
.LCPI4_4:
.quad 0x3e45798ee2308c3a # double 1.0E-8
.section .rodata.cst4,"aM",@progbits,4
.p2align 2, 0x0
.LCPI4_2:
.long 0x49742400 # float 1.0E+6
.section .rodata.cst16,"aM",@progbits,16
.p2align 4, 0x0
.LCPI4_3:
.quad 0x7fffffffffffffff # double NaN
.quad 0x7fffffffffffffff # double NaN
.text
.globl main
.p2align 4, 0x90
.type main,@function
main: # @main
.cfi_startproc
# %bb.0:
pushq %rbp
.cfi_def_cfa_offset 16
pushq %r15
.cfi_def_cfa_offset 24
pushq %r14
.cfi_def_cfa_offset 32
pushq %r13
.cfi_def_cfa_offset 40
pushq %r12
.cfi_def_cfa_offset 48
pushq %rbx
.cfi_def_cfa_offset 56
subq $1624, %rsp # imm = 0x658
.cfi_def_cfa_offset 1680
.cfi_offset %rbx, -56
.cfi_offset %r12, -48
.cfi_offset %r13, -40
.cfi_offset %r14, -32
.cfi_offset %r15, -24
.cfi_offset %rbp, -16
leaq 152(%rsp), %rbx
xorl %r13d, %r13d
movq %rbx, %rdi
xorl %esi, %esi
callq hipGetDevicePropertiesR0600
movl $.L.str.3, %edi
xorl %esi, %esi
movq %rbx, %rdx
xorl %eax, %eax
callq printf
xorl %edi, %edi
callq hipSetDevice
movl $8000000, %edi # imm = 0x7A1200
callq malloc
movq %rax, %rbx
movl $8000000, %edi # imm = 0x7A1200
callq malloc
movq %rax, %r14
movl $8000000, %edi # imm = 0x7A1200
callq malloc
movq %rax, %r15
movl $8000000, %edi # imm = 0x7A1200
callq malloc
movq %rax, %r12
.p2align 4, 0x90
.LBB4_1: # =>This Inner Loop Header: Depth=1
callq rand
xorps %xmm1, %xmm1
cvtsi2sd %eax, %xmm1
movsd .LCPI4_0(%rip), %xmm0 # xmm0 = mem[0],zero
divsd %xmm0, %xmm1
movsd .LCPI4_1(%rip), %xmm0 # xmm0 = mem[0],zero
addsd %xmm0, %xmm1
movsd %xmm1, 144(%rsp) # 8-byte Spill
callq rand
xorps %xmm0, %xmm0
cvtsi2sd %eax, %xmm0
divsd .LCPI4_0(%rip), %xmm0
addsd .LCPI4_1(%rip), %xmm0
movsd 144(%rsp), %xmm1 # 8-byte Reload
# xmm1 = mem[0],zero
movsd %xmm1, (%rbx,%r13,8)
movsd %xmm0, (%r14,%r13,8)
incq %r13
cmpq $1000000, %r13 # imm = 0xF4240
jne .LBB4_1
# %bb.2:
xorl %r13d, %r13d
movl $8000000, %edx # imm = 0x7A1200
movq %r15, %rdi
xorl %esi, %esi
callq memset@PLT
movl $8000000, %edx # imm = 0x7A1200
movq %r12, %rdi
xorl %esi, %esi
callq memset@PLT
callq _ZNSt6chrono3_V212system_clock3nowEv
movq %rax, %rbp
movq %rbx, %rax
.p2align 4, 0x90
.LBB4_3: # %.preheader23.i
# =>This Loop Header: Depth=1
# Child Loop BB4_4 Depth 2
# Child Loop BB4_5 Depth 3
imulq $8000, %r13, %rcx # imm = 0x1F40
addq %r15, %rcx
movq %r14, %rdx
xorl %esi, %esi
.p2align 4, 0x90
.LBB4_4: # %.preheader.i
# Parent Loop BB4_3 Depth=1
# => This Loop Header: Depth=2
# Child Loop BB4_5 Depth 3
movsd (%rcx,%rsi,8), %xmm0 # xmm0 = mem[0],zero
movq %rdx, %rdi
xorl %r8d, %r8d
.p2align 4, 0x90
.LBB4_5: # Parent Loop BB4_3 Depth=1
# Parent Loop BB4_4 Depth=2
# => This Inner Loop Header: Depth=3
movsd (%rax,%r8,8), %xmm1 # xmm1 = mem[0],zero
mulsd (%rdi), %xmm1
addsd %xmm1, %xmm0
incq %r8
addq $8000, %rdi # imm = 0x1F40
cmpq $1000, %r8 # imm = 0x3E8
jne .LBB4_5
# %bb.6: # %._crit_edge.i
# in Loop: Header=BB4_4 Depth=2
movsd %xmm0, (%rcx,%rsi,8)
incq %rsi
addq $8, %rdx
cmpq $1000, %rsi # imm = 0x3E8
jne .LBB4_4
# %bb.7: # %._crit_edge26.i
# in Loop: Header=BB4_3 Depth=1
incq %r13
addq $8000, %rax # imm = 0x1F40
cmpq $1000, %r13 # imm = 0x3E8
jne .LBB4_3
# %bb.8: # %_Z20multiply_matrix_hostPdS_S_i.exit
movabsq $137438953504, %r13 # imm = 0x2000000020
callq _ZNSt6chrono3_V212system_clock3nowEv
subq %rbp, %rax
xorps %xmm0, %xmm0
cvtsi2ss %rax, %xmm0
divss .LCPI4_2(%rip), %xmm0
cvtss2sd %xmm0, %xmm0
movl $.L.str.4, %edi
movb $1, %al
callq printf
leaq 32(%rsp), %rdi
movl $8000000, %esi # imm = 0x7A1200
callq hipMalloc
leaq 24(%rsp), %rdi
movl $8000000, %esi # imm = 0x7A1200
callq hipMalloc
leaq 16(%rsp), %rdi
movl $8000000, %esi # imm = 0x7A1200
callq hipMalloc
movq 32(%rsp), %rdi
movl $8000000, %edx # imm = 0x7A1200
movq %rbx, %rsi
movl $1, %ecx
callq hipMemcpy
movq 24(%rsp), %rdi
movl $8000000, %edx # imm = 0x7A1200
movq %r14, %rsi
movl $1, %ecx
callq hipMemcpy
movq 16(%rsp), %rdi
movl $8000000, %edx # imm = 0x7A1200
xorl %esi, %esi
callq hipMemset
movl $.L.str.5, %edi
movl $32, %esi
movl $32, %edx
movl $32, %ecx
movl $32, %r8d
xorl %eax, %eax
callq printf
callq _ZNSt6chrono3_V212system_clock3nowEv
movq %rax, %rbp
movq %r13, %rdi
movl $1, %esi
movq %r13, %rdx
movl $1, %ecx
xorl %r8d, %r8d
xorl %r9d, %r9d
callq __hipPushCallConfiguration
testl %eax, %eax
jne .LBB4_10
# %bb.9:
movq 32(%rsp), %rax
movq 24(%rsp), %rcx
movq 16(%rsp), %rdx
movq %rax, 104(%rsp)
movq %rcx, 96(%rsp)
movq %rdx, 88(%rsp)
movl $1000, 12(%rsp) # imm = 0x3E8
leaq 104(%rsp), %rax
movq %rax, 112(%rsp)
leaq 96(%rsp), %rax
movq %rax, 120(%rsp)
leaq 88(%rsp), %rax
movq %rax, 128(%rsp)
leaq 12(%rsp), %rax
movq %rax, 136(%rsp)
leaq 72(%rsp), %rdi
leaq 56(%rsp), %rsi
leaq 48(%rsp), %rdx
leaq 40(%rsp), %rcx
callq __hipPopCallConfiguration
movq 72(%rsp), %rsi
movl 80(%rsp), %edx
movq 56(%rsp), %rcx
movl 64(%rsp), %r8d
leaq 112(%rsp), %r9
movl $_Z19multiply_matrix_gpuPdS_S_i, %edi
pushq 40(%rsp)
.cfi_adjust_cfa_offset 8
pushq 56(%rsp)
.cfi_adjust_cfa_offset 8
callq hipLaunchKernel
addq $16, %rsp
.cfi_adjust_cfa_offset -16
.LBB4_10:
callq hipDeviceSynchronize
callq _ZNSt6chrono3_V212system_clock3nowEv
subq %rbp, %rax
xorps %xmm0, %xmm0
cvtsi2ss %rax, %xmm0
divss .LCPI4_2(%rip), %xmm0
cvtss2sd %xmm0, %xmm0
movl $.L.str.6, %edi
movb $1, %al
callq printf
movq 16(%rsp), %rsi
movl $8000000, %edx # imm = 0x7A1200
movq %r12, %rdi
movl $2, %ecx
callq hipMemcpy
xorl %eax, %eax
.p2align 4, 0x90
.LBB4_11: # %.lr.ph.i
# =>This Inner Loop Header: Depth=1
movsd (%r15,%rax,8), %xmm0 # xmm0 = mem[0],zero
movsd (%r12,%rax,8), %xmm1 # xmm1 = mem[0],zero
movapd %xmm0, %xmm2
subsd %xmm1, %xmm2
andpd .LCPI4_3(%rip), %xmm2
ucomisd .LCPI4_4(%rip), %xmm2
ja .LBB4_14
# %bb.12: # in Loop: Header=BB4_11 Depth=1
incq %rax
cmpq $1000000, %rax # imm = 0xF4240
jne .LBB4_11
# %bb.13:
movl $.Lstr.1, %edi
jmp .LBB4_15
.LBB4_14:
movl $.L.str, %edi
movb $2, %al
callq printf
movl $.Lstr, %edi
.LBB4_15: # %_Z11checkResultPdS_i.exit
callq puts@PLT
callq _ZNSt6chrono3_V212system_clock3nowEv
movq %rax, %rbp
movq %r13, %rdi
movl $1, %esi
movq %r13, %rdx
movl $1, %ecx
xorl %r8d, %r8d
xorl %r9d, %r9d
callq __hipPushCallConfiguration
testl %eax, %eax
jne .LBB4_17
# %bb.16:
movq 32(%rsp), %rax
movq 24(%rsp), %rcx
movq 16(%rsp), %rdx
movq %rax, 104(%rsp)
movq %rcx, 96(%rsp)
movq %rdx, 88(%rsp)
movl $1000, 12(%rsp) # imm = 0x3E8
leaq 104(%rsp), %rax
movq %rax, 112(%rsp)
leaq 96(%rsp), %rax
movq %rax, 120(%rsp)
leaq 88(%rsp), %rax
movq %rax, 128(%rsp)
leaq 12(%rsp), %rax
movq %rax, 136(%rsp)
leaq 72(%rsp), %rdi
leaq 56(%rsp), %rsi
leaq 48(%rsp), %rdx
leaq 40(%rsp), %rcx
callq __hipPopCallConfiguration
movq 72(%rsp), %rsi
movl 80(%rsp), %edx
movq 56(%rsp), %rcx
movl 64(%rsp), %r8d
leaq 112(%rsp), %r9
movl $_Z26multiply_matrix_gpu_tilingPdS_S_i, %edi
pushq 40(%rsp)
.cfi_adjust_cfa_offset 8
pushq 56(%rsp)
.cfi_adjust_cfa_offset 8
callq hipLaunchKernel
addq $16, %rsp
.cfi_adjust_cfa_offset -16
.LBB4_17:
callq hipDeviceSynchronize
callq _ZNSt6chrono3_V212system_clock3nowEv
subq %rbp, %rax
xorps %xmm0, %xmm0
cvtsi2ss %rax, %xmm0
divss .LCPI4_2(%rip), %xmm0
cvtss2sd %xmm0, %xmm0
movl $.L.str.7, %edi
movb $1, %al
callq printf
movq 16(%rsp), %rsi
movl $8000000, %edx # imm = 0x7A1200
movq %r12, %rdi
movl $2, %ecx
callq hipMemcpy
xorl %eax, %eax
movapd .LCPI4_3(%rip), %xmm3 # xmm3 = [NaN,NaN]
movsd .LCPI4_4(%rip), %xmm4 # xmm4 = mem[0],zero
.p2align 4, 0x90
.LBB4_18: # %.lr.ph.i84
# =>This Inner Loop Header: Depth=1
movsd (%r15,%rax,8), %xmm0 # xmm0 = mem[0],zero
movsd (%r12,%rax,8), %xmm1 # xmm1 = mem[0],zero
movapd %xmm0, %xmm2
subsd %xmm1, %xmm2
andpd %xmm3, %xmm2
ucomisd %xmm4, %xmm2
ja .LBB4_21
# %bb.19: # in Loop: Header=BB4_18 Depth=1
incq %rax
cmpq $1000000, %rax # imm = 0xF4240
jne .LBB4_18
# %bb.20:
movl $.Lstr.1, %edi
jmp .LBB4_22
.LBB4_21:
movl $.L.str, %edi
movb $2, %al
callq printf
movl $.Lstr, %edi
.LBB4_22: # %_Z11checkResultPdS_i.exit91
callq puts@PLT
movq 32(%rsp), %rdi
callq hipFree
movq 24(%rsp), %rdi
callq hipFree
movq 16(%rsp), %rdi
callq hipFree
movq %rbx, %rdi
callq free
movq %r14, %rdi
callq free
movq %r15, %rdi
callq free
movq %r12, %rdi
callq free
callq hipDeviceReset
xorl %eax, %eax
addq $1624, %rsp # imm = 0x658
.cfi_def_cfa_offset 56
popq %rbx
.cfi_def_cfa_offset 48
popq %r12
.cfi_def_cfa_offset 40
popq %r13
.cfi_def_cfa_offset 32
popq %r14
.cfi_def_cfa_offset 24
popq %r15
.cfi_def_cfa_offset 16
popq %rbp
.cfi_def_cfa_offset 8
retq
.Lfunc_end4:
.size main, .Lfunc_end4-main
.cfi_endproc
# -- End function
.p2align 4, 0x90 # -- Begin function __hip_module_ctor
.type __hip_module_ctor,@function
__hip_module_ctor: # @__hip_module_ctor
.cfi_startproc
# %bb.0:
pushq %rbx
.cfi_def_cfa_offset 16
subq $32, %rsp
.cfi_def_cfa_offset 48
.cfi_offset %rbx, -16
cmpq $0, __hip_gpubin_handle(%rip)
jne .LBB5_2
# %bb.1:
movl $__hip_fatbin_wrapper, %edi
callq __hipRegisterFatBinary
movq %rax, __hip_gpubin_handle(%rip)
.LBB5_2:
movq __hip_gpubin_handle(%rip), %rbx
xorps %xmm0, %xmm0
movups %xmm0, 16(%rsp)
movups %xmm0, (%rsp)
movl $_Z19multiply_matrix_gpuPdS_S_i, %esi
movl $.L__unnamed_1, %edx
movl $.L__unnamed_1, %ecx
movq %rbx, %rdi
movl $-1, %r8d
xorl %r9d, %r9d
callq __hipRegisterFunction
xorps %xmm0, %xmm0
movups %xmm0, 16(%rsp)
movups %xmm0, (%rsp)
movl $_Z26multiply_matrix_gpu_tilingPdS_S_i, %esi
movl $.L__unnamed_2, %edx
movl $.L__unnamed_2, %ecx
movq %rbx, %rdi
movl $-1, %r8d
xorl %r9d, %r9d
callq __hipRegisterFunction
movl $__hip_module_dtor, %edi
addq $32, %rsp
.cfi_def_cfa_offset 16
popq %rbx
.cfi_def_cfa_offset 8
jmp atexit # TAILCALL
.Lfunc_end5:
.size __hip_module_ctor, .Lfunc_end5-__hip_module_ctor
.cfi_endproc
# -- End function
.p2align 4, 0x90 # -- Begin function __hip_module_dtor
.type __hip_module_dtor,@function
__hip_module_dtor: # @__hip_module_dtor
.cfi_startproc
# %bb.0:
movq __hip_gpubin_handle(%rip), %rdi
testq %rdi, %rdi
je .LBB6_2
# %bb.1:
pushq %rax
.cfi_def_cfa_offset 16
callq __hipUnregisterFatBinary
movq $0, __hip_gpubin_handle(%rip)
addq $8, %rsp
.cfi_def_cfa_offset 8
.LBB6_2:
retq
.Lfunc_end6:
.size __hip_module_dtor, .Lfunc_end6-__hip_module_dtor
.cfi_endproc
# -- End function
.type _Z19multiply_matrix_gpuPdS_S_i,@object # @_Z19multiply_matrix_gpuPdS_S_i
.section .rodata,"a",@progbits
.globl _Z19multiply_matrix_gpuPdS_S_i
.p2align 3, 0x0
_Z19multiply_matrix_gpuPdS_S_i:
.quad _Z34__device_stub__multiply_matrix_gpuPdS_S_i
.size _Z19multiply_matrix_gpuPdS_S_i, 8
.type _Z26multiply_matrix_gpu_tilingPdS_S_i,@object # @_Z26multiply_matrix_gpu_tilingPdS_S_i
.globl _Z26multiply_matrix_gpu_tilingPdS_S_i
.p2align 3, 0x0
_Z26multiply_matrix_gpu_tilingPdS_S_i:
.quad _Z41__device_stub__multiply_matrix_gpu_tilingPdS_S_i
.size _Z26multiply_matrix_gpu_tilingPdS_S_i, 8
.type .L.str,@object # @.str
.section .rodata.str1.1,"aMS",@progbits,1
.L.str:
.asciz "host %f gpu %f\n"
.size .L.str, 16
.type .L.str.3,@object # @.str.3
.L.str.3:
.asciz "Using Device %d: %s\n"
.size .L.str.3, 21
.type .L.str.4,@object # @.str.4
.L.str.4:
.asciz "multiply_matrix_host elapsed %f ms\n"
.size .L.str.4, 36
.type .L.str.5,@object # @.str.5
.L.str.5:
.asciz "grid.x %d grid.y %d block.x %d block.y %d\n"
.size .L.str.5, 43
.type .L.str.6,@object # @.str.6
.L.str.6:
.asciz "multiply_matrix_gpu elapsed %f ms\n"
.size .L.str.6, 35
.type .L.str.7,@object # @.str.7
.L.str.7:
.asciz "multiply_matrix_gpu_tiling elapsed %f ms\n"
.size .L.str.7, 42
.type .L__unnamed_1,@object # @0
.L__unnamed_1:
.asciz "_Z19multiply_matrix_gpuPdS_S_i"
.size .L__unnamed_1, 31
.type .L__unnamed_2,@object # @1
.L__unnamed_2:
.asciz "_Z26multiply_matrix_gpu_tilingPdS_S_i"
.size .L__unnamed_2, 38
.type __hip_fatbin_wrapper,@object # @__hip_fatbin_wrapper
.section .hipFatBinSegment,"a",@progbits
.p2align 3, 0x0
__hip_fatbin_wrapper:
.long 1212764230 # 0x48495046
.long 1 # 0x1
.quad __hip_fatbin
.quad 0
.size __hip_fatbin_wrapper, 24
.type __hip_gpubin_handle,@object # @__hip_gpubin_handle
.local __hip_gpubin_handle
.comm __hip_gpubin_handle,8,8
.section .init_array,"aw",@init_array
.p2align 3, 0x0
.quad __hip_module_ctor
.type __hip_cuid_,@object # @__hip_cuid_
.bss
.globl __hip_cuid_
__hip_cuid_:
.byte 0 # 0x0
.size __hip_cuid_, 1
.type .Lstr,@object # @str
.section .rodata.str1.1,"aMS",@progbits,1
.Lstr:
.asciz "Matrix does not not match.\n"
.size .Lstr, 28
.type .Lstr.1,@object # @str.1
.Lstr.1:
.asciz "Matrix match.\n"
.size .Lstr.1, 15
.section ".linker-options","e",@llvm_linker_options
.ident "AMD clang version 18.0.0git (https://github.com/RadeonOpenCompute/llvm-project roc-6.3.2 25012 e5bf7e55c91490b07c49d8960fa7983d864936c4)"
.section ".note.GNU-stack","",@progbits
.addrsig
.addrsig_sym _Z34__device_stub__multiply_matrix_gpuPdS_S_i
.addrsig_sym _Z41__device_stub__multiply_matrix_gpu_tilingPdS_S_i
.addrsig_sym __hip_module_ctor
.addrsig_sym __hip_module_dtor
.addrsig_sym _Z19multiply_matrix_gpuPdS_S_i
.addrsig_sym _Z26multiply_matrix_gpu_tilingPdS_S_i
.addrsig_sym __hip_fatbin
.addrsig_sym __hip_fatbin_wrapper
.addrsig_sym __hip_cuid_ |
You are a helpful coding assistant specialized in converting CUDA source code to CUDA device assembly. | /* jacobi.c - Poisson problem in 3d
*
*/
#include <math.h>
#include <stdlib.h>
#include <stdio.h>
__device__
void jacobi_gpu(int N, double ***u, double ***v, double ***f, int iter_max) {
//int counter = 0;
int i = blockIdx.x * blockDim.x + threadIdx.x;
int j = blockIdx.y * blockDim.y + threadIdx.y;
int k = blockIdx.z * blockDim.z + threadIdx.z;
//v[i][j][k] = u[i][j][k];
//} while (counter <iter_max);
if(i > 0 && j > 0 && k > 0 && i<N-1 && j<N-1 && k<N-1){
//v[i][j][k] = u[i][j][k];
u[i][j][k] = 1./6.*(v[i-1][j][k]+v[i+1][j][k]+v[i][j-1][k]+v[i][j+1][k]+v[i][j][k-1]+v[i][j][k+1] + 1./((N)*(N)) * f[i][j][k]);
printf("i=%i j=%i k=%i | u=%f v=%f f=%f\n", i, j, k, u[i][j][k], v[i][j][k], f[i][j][k]);
}
}
// Kernel to be launched on a single thread
__global__
void jacobi_per_elem(int N, double ***u, double ***v, double ***f, int iter_max)
{
jacobi_gpu(N, u, v, f, iter_max);
} | code for sm_80
Function : _Z15jacobi_per_elemiPPPdS1_S1_i
.headerflags @"EF_CUDA_TEXMODE_UNIFIED EF_CUDA_64BIT_ADDRESS EF_CUDA_SM80 EF_CUDA_VIRTUAL_SM(EF_CUDA_SM80)"
/*0000*/ IMAD.MOV.U32 R1, RZ, RZ, c[0x0][0x28] ; /* 0x00000a00ff017624 */
/* 0x000fc800078e00ff */
/*0010*/ S2R R3, SR_CTAID.Y ; /* 0x0000000000037919 */
/* 0x000e220000002600 */
/*0020*/ IADD3 R1, R1, -0x28, RZ ; /* 0xffffffd801017810 */
/* 0x000fc60007ffe0ff */
/*0030*/ S2R R0, SR_TID.Y ; /* 0x0000000000007919 */
/* 0x000e280000002200 */
/*0040*/ S2R R2, SR_CTAID.X ; /* 0x0000000000027919 */
/* 0x000e680000002500 */
/*0050*/ S2R R5, SR_TID.X ; /* 0x0000000000057919 */
/* 0x000e680000002100 */
/*0060*/ S2R R4, SR_CTAID.Z ; /* 0x0000000000047919 */
/* 0x000ea80000002700 */
/*0070*/ S2R R7, SR_TID.Z ; /* 0x0000000000077919 */
/* 0x000ea20000002300 */
/*0080*/ IMAD R3, R3, c[0x0][0x4], R0 ; /* 0x0000010003037a24 */
/* 0x001fca00078e0200 */
/*0090*/ ISETP.GE.AND P0, PT, R3, 0x1, PT ; /* 0x000000010300780c */
/* 0x000fe20003f06270 */
/*00a0*/ IMAD R2, R2, c[0x0][0x0], R5 ; /* 0x0000000002027a24 */
/* 0x002fca00078e0205 */
/*00b0*/ ISETP.LT.OR P0, PT, R2, 0x1, !P0 ; /* 0x000000010200780c */
/* 0x000fe20004701670 */
/*00c0*/ IMAD R0, R4, c[0x0][0x8], R7 ; /* 0x0000020004007a24 */
/* 0x004fca00078e0207 */
/*00d0*/ ISETP.LT.OR P0, PT, R0, 0x1, P0 ; /* 0x000000010000780c */
/* 0x000fda0000701670 */
/*00e0*/ @P0 EXIT ; /* 0x000000000000094d */
/* 0x000fea0003800000 */
/*00f0*/ ULDC UR4, c[0x0][0x160] ; /* 0x0000580000047ab9 */
/* 0x000fe40000000800 */
/*0100*/ UIADD3 UR5, UR4, -0x1, URZ ; /* 0xffffffff04057890 */
/* 0x000fcc000fffe03f */
/*0110*/ ISETP.GE.AND P0, PT, R3, UR5, PT ; /* 0x0000000503007c0c */
/* 0x000fc8000bf06270 */
/*0120*/ ISETP.GE.OR P0, PT, R2, UR5, P0 ; /* 0x0000000502007c0c */
/* 0x000fc80008706670 */
/*0130*/ ISETP.GE.OR P0, PT, R0, UR5, P0 ; /* 0x0000000500007c0c */
/* 0x000fda0008706670 */
/*0140*/ @P0 EXIT ; /* 0x000000000000094d */
/* 0x000fea0003800000 */
/*0150*/ IMAD.MOV.U32 R9, RZ, RZ, 0x8 ; /* 0x00000008ff097424 */
/* 0x000fe200078e00ff */
/*0160*/ ULDC.64 UR6, c[0x0][0x118] ; /* 0x0000460000067ab9 */
/* 0x000fc60000000a00 */
/*0170*/ IMAD.WIDE R8, R2, R9, c[0x0][0x170] ; /* 0x00005c0002087625 */
/* 0x000fca00078e0209 */
/*0180*/ LDG.E.64 R4, [R8.64+-0x8] ; /* 0xfffff80608047981 */
/* 0x000ea8000c1e1b00 */
/*0190*/ LDG.E.64 R6, [R8.64+0x8] ; /* 0x0000080608067981 */
/* 0x000ee8000c1e1b00 */
/*01a0*/ LDG.E.64 R10, [R8.64] ; /* 0x00000006080a7981 */
/* 0x000f22000c1e1b00 */
/*01b0*/ IMAD.WIDE R14, R3, 0x8, R4 ; /* 0x00000008030e7825 */
/* 0x004fc800078e0204 */
/*01c0*/ IMAD.WIDE R16, R3.reuse, 0x8, R6 ; /* 0x0000000803107825 */
/* 0x048fe400078e0206 */
/*01d0*/ LD.E.64 R14, [R14.64] ; /* 0x000000060e0e7980 */
/* 0x000ea4000c101b00 */
/*01e0*/ IMAD.WIDE R20, R3, 0x8, R10 ; /* 0x0000000803147825 */
/* 0x010fe400078e020a */
/*01f0*/ LD.E.64 R16, [R16.64] ; /* 0x0000000610107980 */
/* 0x000ee8000c101b00 */
/*0200*/ LD.E.64 R18, [R20.64+-0x8] ; /* 0xfffff80614127980 */
/* 0x000f28000c101b00 */
/*0210*/ LD.E.64 R4, [R20.64+0x8] ; /* 0x0000080614047980 */
/* 0x000f68000c101b00 */
/*0220*/ LD.E.64 R12, [R20.64] ; /* 0x00000006140c7980 */
/* 0x000f62000c101b00 */
/*0230*/ IADD3 R25, R0, -0x1, RZ ; /* 0xffffffff00197810 */
/* 0x000fe20007ffe0ff */
/*0240*/ ULDC UR5, c[0x0][0x160] ; /* 0x0000580000057ab9 */
/* 0x000fc40000000800 */
/*0250*/ UIMAD UR4, UR4, UR5, URZ ; /* 0x00000005040472a4 */
/* 0x000fe2000f8e023f */
/*0260*/ IMAD.WIDE R6, R0, 0x8, R14 ; /* 0x0000000800067825 */
/* 0x004fc800078e020e */
/*0270*/ IMAD.WIDE R10, R0.reuse, 0x8, R16 ; /* 0x00000008000a7825 */
/* 0x048fe400078e0210 */
/*0280*/ LD.E.64 R6, [R6.64] ; /* 0x0000000606067980 */
/* 0x000ea4000c101b00 */
/*0290*/ IMAD.WIDE R22, R0.reuse, 0x8, R18 ; /* 0x0000000800167825 */
/* 0x050fe400078e0212 */
/*02a0*/ LD.E.64 R10, [R10.64] ; /* 0x000000060a0a7980 */
/* 0x000ea4000c101b00 */
/*02b0*/ IMAD.WIDE R18, R0, 0x8, R4 ; /* 0x0000000800127825 */
/* 0x020fe400078e0204 */
/*02c0*/ LD.E.64 R14, [R22.64] ; /* 0x00000006160e7980 */
/* 0x0000e4000c101b00 */
/*02d0*/ IMAD.WIDE R24, R25, 0x8, R12 ; /* 0x0000000819187825 */
/* 0x000fc400078e020c */
/*02e0*/ LD.E.64 R18, [R18.64] ; /* 0x0000000612127980 */
/* 0x000f28000c101b00 */
/*02f0*/ LD.E.64 R20, [R24.64] ; /* 0x0000000618147980 */
/* 0x000f68000c101b00 */
/*0300*/ LD.E.64 R12, [R24.64+0x10] ; /* 0x00001006180c7980 */
/* 0x000f22000c101b00 */
/*0310*/ I2F.F64 R4, UR4 ; /* 0x0000000400047d12 */
/* 0x000e700008201c00 */
/*0320*/ MUFU.RCP64H R17, R5 ; /* 0x0000000500117308 */
/* 0x002e220000001800 */
/*0330*/ IADD3 R16, R5, 0x300402, RZ ; /* 0x0030040205107810 */
/* 0x000fc80007ffe0ff */
/*0340*/ FSETP.GEU.AND P0, PT, |R16|, 5.8789094863358348022e-39, PT ; /* 0x004004021000780b */
/* 0x000fe40003f0e200 */
/*0350*/ DFMA R22, -R4, R16, 1 ; /* 0x3ff000000416742b */
/* 0x001e0c0000000110 */
/*0360*/ DFMA R22, R22, R22, R22 ; /* 0x000000161616722b */
/* 0x001e0c0000000016 */
/*0370*/ DFMA R22, R16, R22, R16 ; /* 0x000000161016722b */
/* 0x001e080000000010 */
/*0380*/ DADD R6, R10, R6 ; /* 0x000000000a067229 */
/* 0x004ec80000000006 */
/*0390*/ DFMA R10, -R4, R22, 1 ; /* 0x3ff00000040a742b */
/* 0x001e080000000116 */
/*03a0*/ DADD R6, R6, R14 ; /* 0x0000000006067229 */
/* 0x008f08000000000e */
/*03b0*/ DFMA R10, R22, R10, R22 ; /* 0x0000000a160a722b */
/* 0x001fc80000000016 */
/*03c0*/ DADD R6, R6, R18 ; /* 0x0000000006067229 */
/* 0x010f4c0000000012 */
/*03d0*/ DADD R20, R6, R20 ; /* 0x0000000006147229 */
/* 0x0200640000000014 */
/*03e0*/ IADD3 R6, P1, R1, c[0x0][0x20], RZ ; /* 0x0000080001067a10 */
/* 0x001fc80007f3e0ff */
/*03f0*/ DADD R12, R20, R12 ; /* 0x00000000140c7229 */
/* 0x002062000000000c */
/*0400*/ IADD3.X R7, RZ, c[0x0][0x24], RZ, P1, !PT ; /* 0x00000900ff077a10 */
/* 0x000fe20000ffe4ff */
/*0410*/ @P0 BRA 0x480 ; /* 0x0000006000000947 */
/* 0x000fea0003800000 */
/*0420*/ LOP3.LUT R10, R5, 0x7fffffff, RZ, 0xc0, !PT ; /* 0x7fffffff050a7812 */
/* 0x003fc800078ec0ff */
/*0430*/ IADD3 R16, R10, -0x100000, RZ ; /* 0xfff000000a107810 */
/* 0x000fe40007ffe0ff */
/*0440*/ MOV R10, 0x460 ; /* 0x00000460000a7802 */
/* 0x000fe40000000f00 */
/*0450*/ CALL.REL.NOINC 0x780 ; /* 0x0000032000007944 */
/* 0x000fea0003c00000 */
/*0460*/ IMAD.MOV.U32 R10, RZ, RZ, R14 ; /* 0x000000ffff0a7224 */
/* 0x003fe200078e000e */
/*0470*/ MOV R11, R15 ; /* 0x0000000f000b7202 */
/* 0x000fe40000000f00 */
/*0480*/ IMAD.MOV.U32 R17, RZ, RZ, 0x8 ; /* 0x00000008ff117424 */
/* 0x003fc800078e00ff */
/*0490*/ IMAD.WIDE R14, R2, R17, c[0x0][0x178] ; /* 0x00005e00020e7625 */
/* 0x000fca00078e0211 */
/*04a0*/ LDG.E.64 R4, [R14.64] ; /* 0x000000060e047981 */
/* 0x000ea2000c1e1b00 */
/*04b0*/ IMAD.WIDE R16, R2, R17, c[0x0][0x168] ; /* 0x00005a0002107625 */
/* 0x000fca00078e0211 */
/*04c0*/ LDG.E.64 R20, [R16.64] ; /* 0x0000000610147981 */
/* 0x000ee2000c1e1b00 */
/*04d0*/ IMAD.WIDE R4, R3, 0x8, R4 ; /* 0x0000000803047825 */
/* 0x004fcc00078e0204 */
/*04e0*/ LD.E.64 R4, [R4.64] ; /* 0x0000000604047980 */
/* 0x000ea2000c101b00 */
/*04f0*/ IMAD.WIDE R20, R3, 0x8, R20 ; /* 0x0000000803147825 */
/* 0x008fcc00078e0214 */
/*0500*/ LD.E.64 R20, [R20.64] ; /* 0x0000000614147980 */
/* 0x000ee2000c101b00 */
/*0510*/ IMAD.WIDE R18, R0, 0x8, R4 ; /* 0x0000000800127825 */
/* 0x004fcc00078e0204 */
/*0520*/ LD.E.64 R18, [R18.64] ; /* 0x0000000612127980 */
/* 0x000ea4000c101b00 */
/*0530*/ DFMA R10, R18, R10, R12 ; /* 0x0000000a120a722b */
/* 0x004624000000000c */
/*0540*/ IMAD.WIDE R12, R0, 0x8, R20 ; /* 0x00000008000c7825 */
/* 0x008fc800078e0214 */
/*0550*/ DMUL R10, R10, c[0x2][0x0] ; /* 0x008000000a0a7a28 */
/* 0x001e0e0000000000 */
/*0560*/ ST.E.64 [R12.64], R10 ; /* 0x0000000a0c007985 */
/* 0x0011e8000c101b06 */
/*0570*/ LDG.E.64 R8, [R8.64] ; /* 0x0000000608087981 */
/* 0x000ea8000c1e1b00 */
/*0580*/ LDG.E.64 R14, [R14.64] ; /* 0x000000060e0e7981 */
/* 0x000ee8000c1e1b00 */
/*0590*/ LDG.E.64 R4, [R16.64] ; /* 0x0000000610047981 */
/* 0x000f22000c1e1b00 */
/*05a0*/ IMAD.WIDE R18, R3, 0x8, R8 ; /* 0x0000000803127825 */
/* 0x004fc800078e0208 */
/*05b0*/ IMAD.WIDE R24, R3.reuse, 0x8, R14 ; /* 0x0000000803187825 */
/* 0x048fe400078e020e */
/*05c0*/ LD.E.64 R18, [R18.64] ; /* 0x0000000612127980 */
/* 0x000e24000c101b00 */
/*05d0*/ IMAD.WIDE R22, R3, 0x8, R4 ; /* 0x0000000803167825 */
/* 0x010fe400078e0204 */
/*05e0*/ LD.E.64 R24, [R24.64] ; /* 0x0000000618187980 */
/* 0x000ea8000c101b00 */
/*05f0*/ LD.E.64 R4, [R22.64] ; /* 0x0000000616047980 */
/* 0x000ee2000c101b00 */
/*0600*/ IMAD.WIDE R10, R0, 0x8, R18 ; /* 0x00000008000a7825 */
/* 0x001fc800078e0212 */
/*0610*/ IMAD.WIDE R12, R0.reuse, 0x8, R24 ; /* 0x00000008000c7825 */
/* 0x044fe400078e0218 */
/*0620*/ LD.E.64 R10, [R10.64] ; /* 0x000000060a0a7980 */
/* 0x000ea4000c101b00 */
/*0630*/ IMAD.WIDE R4, R0, 0x8, R4 ; /* 0x0000000800047825 */
/* 0x008fe400078e0204 */
/*0640*/ LD.E.64 R12, [R12.64] ; /* 0x000000060c0c7980 */
/* 0x000ee8000c101b00 */
/*0650*/ LD.E.64 R8, [R4.64] ; /* 0x0000000604087980 */
/* 0x000122000c101b00 */
/*0660*/ MOV R14, 0x0 ; /* 0x00000000000e7802 */
/* 0x000fc60000000f00 */
/*0670*/ STL.64 [R1], R2 ; /* 0x0000000201007387 */
/* 0x0003e60000100a00 */
/*0680*/ LDC.64 R14, c[0x4][R14] ; /* 0x010000000e0e7b82 */
/* 0x000e620000000a00 */
/*0690*/ STL [R1+0x8], R0 ; /* 0x0000080001007387 */
/* 0x0003e20000100800 */
/*06a0*/ MOV R4, c[0x4][0x8] ; /* 0x0100020000047a02 */
/* 0x001fe20000000f00 */
/*06b0*/ IMAD.MOV.U32 R5, RZ, RZ, c[0x4][0xc] ; /* 0x01000300ff057624 */
/* 0x000fe400078e00ff */
/*06c0*/ STL.64 [R1+0x18], R10 ; /* 0x0000180a01007387 */
/* 0x0041e80000100a00 */
/*06d0*/ STL.64 [R1+0x20], R12 ; /* 0x0000200c01007387 */
/* 0x0081e80000100a00 */
/*06e0*/ STL.64 [R1+0x10], R8 ; /* 0x0000100801007387 */
/* 0x0101e40000100a00 */
/*06f0*/ LEPC R2 ; /* 0x000000000002734e */
/* 0x002fe20000000000 */
/*0700*/ MOV R9, 0x770 ; /* 0x0000077000097802 */
/* 0x001fc40000000f00 */
/*0710*/ MOV R20, 0x6f0 ; /* 0x000006f000147802 */
/* 0x000fe40000000f00 */
/*0720*/ MOV R21, 0x0 ; /* 0x0000000000157802 */
/* 0x000fe40000000f00 */
/*0730*/ MOV R0, 0x0 ; /* 0x0000000000007802 */
/* 0x000fe40000000f00 */
/*0740*/ IADD3 R20, P0, P1, -R20, R9, R2 ; /* 0x0000000914147210 */
/* 0x000fc8000791e102 */
/*0750*/ IADD3.X R21, ~R0, R21, R3, P0, P1 ; /* 0x0000001500157210 */
/* 0x000fc800007e2503 */
/*0760*/ CALL.ABS.NOINC R14 ; /* 0x000000000e007343 */
/* 0x000fea0003c00000 */
/*0770*/ EXIT ; /* 0x000000000000794d */
/* 0x000fea0003800000 */
/*0780*/ DSETP.GTU.AND P0, PT, |R4|, +INF , PT ; /* 0x7ff000000400742a */
/* 0x000e1c0003f0c200 */
/*0790*/ @P0 BRA 0x990 ; /* 0x000001f000000947 */
/* 0x001fea0003800000 */
/*07a0*/ LOP3.LUT R11, R5, 0x7fffffff, RZ, 0xc0, !PT ; /* 0x7fffffff050b7812 */
/* 0x000fc800078ec0ff */
/*07b0*/ IADD3 R14, R11, -0x1, RZ ; /* 0xffffffff0b0e7810 */
/* 0x000fc80007ffe0ff */
/*07c0*/ ISETP.GE.U32.AND P0, PT, R14, 0x7fefffff, PT ; /* 0x7fefffff0e00780c */
/* 0x000fda0003f06070 */
/*07d0*/ @P0 LOP3.LUT R15, R5, 0x7ff00000, RZ, 0x3c, !PT ; /* 0x7ff00000050f0812 */
/* 0x000fe400078e3cff */
/*07e0*/ @P0 MOV R14, RZ ; /* 0x000000ff000e0202 */
/* 0x000fe20000000f00 */
/*07f0*/ @P0 BRA 0x9b0 ; /* 0x000001b000000947 */
/* 0x000fea0003800000 */
/*0800*/ ISETP.GE.U32.AND P0, PT, R11, 0x1000001, PT ; /* 0x010000010b00780c */
/* 0x000fda0003f06070 */
/*0810*/ @!P0 BRA 0x8f0 ; /* 0x000000d000008947 */
/* 0x000fea0003800000 */
/*0820*/ IADD3 R15, R5, -0x3fe00000, RZ ; /* 0xc0200000050f7810 */
/* 0x000fe20007ffe0ff */
/*0830*/ IMAD.MOV.U32 R14, RZ, RZ, R4 ; /* 0x000000ffff0e7224 */
/* 0x000fc600078e0004 */
/*0840*/ MUFU.RCP64H R17, R15 ; /* 0x0000000f00117308 */
/* 0x000e260000001800 */
/*0850*/ DFMA R18, -R14, R16, 1 ; /* 0x3ff000000e12742b */
/* 0x001e0c0000000110 */
/*0860*/ DFMA R18, R18, R18, R18 ; /* 0x000000121212722b */
/* 0x001e0c0000000012 */
/*0870*/ DFMA R18, R16, R18, R16 ; /* 0x000000121012722b */
/* 0x001e0c0000000010 */
/*0880*/ DFMA R16, -R14, R18, 1 ; /* 0x3ff000000e10742b */
/* 0x001e0c0000000112 */
/*0890*/ DFMA R16, R18, R16, R18 ; /* 0x000000101210722b */
/* 0x001e0c0000000012 */
/*08a0*/ DMUL R16, R16, 2.2250738585072013831e-308 ; /* 0x0010000010107828 */
/* 0x001e0c0000000000 */
/*08b0*/ DFMA R4, -R4, R16, 1 ; /* 0x3ff000000404742b */
/* 0x001e0c0000000110 */
/*08c0*/ DFMA R4, R4, R4, R4 ; /* 0x000000040404722b */
/* 0x001e0c0000000004 */
/*08d0*/ DFMA R14, R16, R4, R16 ; /* 0x00000004100e722b */
/* 0x0010620000000010 */
/*08e0*/ BRA 0x9b0 ; /* 0x000000c000007947 */
/* 0x000fea0003800000 */
/*08f0*/ DMUL R4, R4, 8.11296384146066816958e+31 ; /* 0x4690000004047828 */
/* 0x000e220000000000 */
/*0900*/ MOV R14, R16 ; /* 0x00000010000e7202 */
/* 0x000fca0000000f00 */
/*0910*/ MUFU.RCP64H R15, R5 ; /* 0x00000005000f7308 */
/* 0x001e240000001800 */
/*0920*/ DFMA R16, -R4, R14, 1 ; /* 0x3ff000000410742b */
/* 0x001e0c000000010e */
/*0930*/ DFMA R16, R16, R16, R16 ; /* 0x000000101010722b */
/* 0x001e0c0000000010 */
/*0940*/ DFMA R16, R14, R16, R14 ; /* 0x000000100e10722b */
/* 0x001e0c000000000e */
/*0950*/ DFMA R14, -R4, R16, 1 ; /* 0x3ff00000040e742b */
/* 0x001e0c0000000110 */
/*0960*/ DFMA R14, R16, R14, R16 ; /* 0x0000000e100e722b */
/* 0x001e0c0000000010 */
/*0970*/ DMUL R14, R14, 8.11296384146066816958e+31 ; /* 0x469000000e0e7828 */
/* 0x001e220000000000 */
/*0980*/ BRA 0x9b0 ; /* 0x0000002000007947 */
/* 0x000fea0003800000 */
/*0990*/ LOP3.LUT R15, R5, 0x80000, RZ, 0xfc, !PT ; /* 0x00080000050f7812 */
/* 0x000fe200078efcff */
/*09a0*/ IMAD.MOV.U32 R14, RZ, RZ, R4 ; /* 0x000000ffff0e7224 */
/* 0x000fe400078e0004 */
/*09b0*/ MOV R11, 0x0 ; /* 0x00000000000b7802 */
/* 0x000fc80000000f00 */
/*09c0*/ RET.REL.NODEC R10 0x0 ; /* 0xfffff6300a007950 */
/* 0x000fea0003c3ffff */
/*09d0*/ BRA 0x9d0; /* 0xfffffff000007947 */
/* 0x000fc0000383ffff */
/*09e0*/ NOP; /* 0x0000000000007918 */
/* 0x000fc00000000000 */
/*09f0*/ NOP; /* 0x0000000000007918 */
/* 0x000fc00000000000 */
/*0a00*/ NOP; /* 0x0000000000007918 */
/* 0x000fc00000000000 */
/*0a10*/ NOP; /* 0x0000000000007918 */
/* 0x000fc00000000000 */
/*0a20*/ NOP; /* 0x0000000000007918 */
/* 0x000fc00000000000 */
/*0a30*/ NOP; /* 0x0000000000007918 */
/* 0x000fc00000000000 */
/*0a40*/ NOP; /* 0x0000000000007918 */
/* 0x000fc00000000000 */
/*0a50*/ NOP; /* 0x0000000000007918 */
/* 0x000fc00000000000 */
/*0a60*/ NOP; /* 0x0000000000007918 */
/* 0x000fc00000000000 */
/*0a70*/ NOP; /* 0x0000000000007918 */
/* 0x000fc00000000000 */
.......... |
You are a helpful coding assistant specialized in converting CUDA source code to CUDA host assembly. | /* jacobi.c - Poisson problem in 3d
*
*/
#include <math.h>
#include <stdlib.h>
#include <stdio.h>
__device__
void jacobi_gpu(int N, double ***u, double ***v, double ***f, int iter_max) {
//int counter = 0;
int i = blockIdx.x * blockDim.x + threadIdx.x;
int j = blockIdx.y * blockDim.y + threadIdx.y;
int k = blockIdx.z * blockDim.z + threadIdx.z;
//v[i][j][k] = u[i][j][k];
//} while (counter <iter_max);
if(i > 0 && j > 0 && k > 0 && i<N-1 && j<N-1 && k<N-1){
//v[i][j][k] = u[i][j][k];
u[i][j][k] = 1./6.*(v[i-1][j][k]+v[i+1][j][k]+v[i][j-1][k]+v[i][j+1][k]+v[i][j][k-1]+v[i][j][k+1] + 1./((N)*(N)) * f[i][j][k]);
printf("i=%i j=%i k=%i | u=%f v=%f f=%f\n", i, j, k, u[i][j][k], v[i][j][k], f[i][j][k]);
}
}
// Kernel to be launched on a single thread
__global__
void jacobi_per_elem(int N, double ***u, double ***v, double ***f, int iter_max)
{
jacobi_gpu(N, u, v, f, iter_max);
} | .file "tmpxft_000f539f_00000000-6_jacobi_gpu2.cudafe1.cpp"
.text
#APP
#NO_APP
.type _ZL26__cudaUnregisterBinaryUtilv, @function
_ZL26__cudaUnregisterBinaryUtilv:
.LFB2060:
.cfi_startproc
endbr64
subq $8, %rsp
.cfi_def_cfa_offset 16
movq _ZL20__cudaFatCubinHandle(%rip), %rdi
call __cudaUnregisterFatBinary@PLT
addq $8, %rsp
.cfi_def_cfa_offset 8
ret
.cfi_endproc
.LFE2060:
.size _ZL26__cudaUnregisterBinaryUtilv, .-_ZL26__cudaUnregisterBinaryUtilv
.globl _Z10jacobi_gpuiPPPdS1_S1_i
.type _Z10jacobi_gpuiPPPdS1_S1_i, @function
_Z10jacobi_gpuiPPPdS1_S1_i:
.LFB2057:
.cfi_startproc
endbr64
pushq %rax
.cfi_def_cfa_offset 16
popq %rax
.cfi_def_cfa_offset 8
subq $24, %rsp
.cfi_def_cfa_offset 32
movl $1, 12(%rsp)
movl 12(%rsp), %edi
call exit@PLT
.cfi_endproc
.LFE2057:
.size _Z10jacobi_gpuiPPPdS1_S1_i, .-_Z10jacobi_gpuiPPPdS1_S1_i
.globl _Z45__device_stub__Z15jacobi_per_elemiPPPdS1_S1_iiPPPdS1_S1_i
.type _Z45__device_stub__Z15jacobi_per_elemiPPPdS1_S1_iiPPPdS1_S1_i, @function
_Z45__device_stub__Z15jacobi_per_elemiPPPdS1_S1_iiPPPdS1_S1_i:
.LFB2082:
.cfi_startproc
endbr64
subq $152, %rsp
.cfi_def_cfa_offset 160
movl %edi, 28(%rsp)
movq %rsi, 16(%rsp)
movq %rdx, 8(%rsp)
movq %rcx, (%rsp)
movl %r8d, 24(%rsp)
movq %fs:40, %rax
movq %rax, 136(%rsp)
xorl %eax, %eax
leaq 28(%rsp), %rax
movq %rax, 96(%rsp)
leaq 16(%rsp), %rax
movq %rax, 104(%rsp)
leaq 8(%rsp), %rax
movq %rax, 112(%rsp)
movq %rsp, %rax
movq %rax, 120(%rsp)
leaq 24(%rsp), %rax
movq %rax, 128(%rsp)
movl $1, 48(%rsp)
movl $1, 52(%rsp)
movl $1, 56(%rsp)
movl $1, 60(%rsp)
movl $1, 64(%rsp)
movl $1, 68(%rsp)
leaq 40(%rsp), %rcx
leaq 32(%rsp), %rdx
leaq 60(%rsp), %rsi
leaq 48(%rsp), %rdi
call __cudaPopCallConfiguration@PLT
testl %eax, %eax
je .L9
.L5:
movq 136(%rsp), %rax
subq %fs:40, %rax
jne .L10
addq $152, %rsp
.cfi_remember_state
.cfi_def_cfa_offset 8
ret
.L9:
.cfi_restore_state
pushq 40(%rsp)
.cfi_def_cfa_offset 168
pushq 40(%rsp)
.cfi_def_cfa_offset 176
leaq 112(%rsp), %r9
movq 76(%rsp), %rcx
movl 84(%rsp), %r8d
movq 64(%rsp), %rsi
movl 72(%rsp), %edx
leaq _Z15jacobi_per_elemiPPPdS1_S1_i(%rip), %rdi
call cudaLaunchKernel@PLT
addq $16, %rsp
.cfi_def_cfa_offset 160
jmp .L5
.L10:
call __stack_chk_fail@PLT
.cfi_endproc
.LFE2082:
.size _Z45__device_stub__Z15jacobi_per_elemiPPPdS1_S1_iiPPPdS1_S1_i, .-_Z45__device_stub__Z15jacobi_per_elemiPPPdS1_S1_iiPPPdS1_S1_i
.globl _Z15jacobi_per_elemiPPPdS1_S1_i
.type _Z15jacobi_per_elemiPPPdS1_S1_i, @function
_Z15jacobi_per_elemiPPPdS1_S1_i:
.LFB2083:
.cfi_startproc
endbr64
subq $8, %rsp
.cfi_def_cfa_offset 16
call _Z45__device_stub__Z15jacobi_per_elemiPPPdS1_S1_iiPPPdS1_S1_i
addq $8, %rsp
.cfi_def_cfa_offset 8
ret
.cfi_endproc
.LFE2083:
.size _Z15jacobi_per_elemiPPPdS1_S1_i, .-_Z15jacobi_per_elemiPPPdS1_S1_i
.section .rodata.str1.8,"aMS",@progbits,1
.align 8
.LC0:
.string "_Z15jacobi_per_elemiPPPdS1_S1_i"
.text
.type _ZL24__sti____cudaRegisterAllv, @function
_ZL24__sti____cudaRegisterAllv:
.LFB2085:
.cfi_startproc
endbr64
subq $8, %rsp
.cfi_def_cfa_offset 16
leaq _ZL15__fatDeviceText(%rip), %rdi
call __cudaRegisterFatBinary@PLT
movq %rax, %rdi
movq %rax, _ZL20__cudaFatCubinHandle(%rip)
pushq $0
.cfi_def_cfa_offset 24
pushq $0
.cfi_def_cfa_offset 32
pushq $0
.cfi_def_cfa_offset 40
pushq $0
.cfi_def_cfa_offset 48
movl $0, %r9d
movl $-1, %r8d
leaq .LC0(%rip), %rdx
movq %rdx, %rcx
leaq _Z15jacobi_per_elemiPPPdS1_S1_i(%rip), %rsi
call __cudaRegisterFunction@PLT
addq $32, %rsp
.cfi_def_cfa_offset 16
movq _ZL20__cudaFatCubinHandle(%rip), %rdi
call __cudaRegisterFatBinaryEnd@PLT
leaq _ZL26__cudaUnregisterBinaryUtilv(%rip), %rdi
call atexit@PLT
addq $8, %rsp
.cfi_def_cfa_offset 8
ret
.cfi_endproc
.LFE2085:
.size _ZL24__sti____cudaRegisterAllv, .-_ZL24__sti____cudaRegisterAllv
.section .init_array,"aw"
.align 8
.quad _ZL24__sti____cudaRegisterAllv
.section .nvFatBinSegment,"aw"
.align 8
.type _ZL15__fatDeviceText, @object
.size _ZL15__fatDeviceText, 24
_ZL15__fatDeviceText:
.long 1180844977
.long 1
.quad fatbinData
.quad 0
.local _ZL20__cudaFatCubinHandle
.comm _ZL20__cudaFatCubinHandle,8,8
.ident "GCC: (Ubuntu 13.3.0-6ubuntu2~24.04) 13.3.0"
.section .note.GNU-stack,"",@progbits
.section .note.gnu.property,"a"
.align 8
.long 1f - 0f
.long 4f - 1f
.long 5
0:
.string "GNU"
1:
.align 8
.long 0xc0000002
.long 3f - 2f
2:
.long 0x3
3:
.align 8
4: |
You are a helpful coding assistant specialized in converting CUDA source code to HIP/AMD source code. | /* jacobi.c - Poisson problem in 3d
*
*/
#include <math.h>
#include <stdlib.h>
#include <stdio.h>
__device__
void jacobi_gpu(int N, double ***u, double ***v, double ***f, int iter_max) {
//int counter = 0;
int i = blockIdx.x * blockDim.x + threadIdx.x;
int j = blockIdx.y * blockDim.y + threadIdx.y;
int k = blockIdx.z * blockDim.z + threadIdx.z;
//v[i][j][k] = u[i][j][k];
//} while (counter <iter_max);
if(i > 0 && j > 0 && k > 0 && i<N-1 && j<N-1 && k<N-1){
//v[i][j][k] = u[i][j][k];
u[i][j][k] = 1./6.*(v[i-1][j][k]+v[i+1][j][k]+v[i][j-1][k]+v[i][j+1][k]+v[i][j][k-1]+v[i][j][k+1] + 1./((N)*(N)) * f[i][j][k]);
printf("i=%i j=%i k=%i | u=%f v=%f f=%f\n", i, j, k, u[i][j][k], v[i][j][k], f[i][j][k]);
}
}
// Kernel to be launched on a single thread
__global__
void jacobi_per_elem(int N, double ***u, double ***v, double ***f, int iter_max)
{
jacobi_gpu(N, u, v, f, iter_max);
} | /* jacobi.c - Poisson problem in 3d
*
*/
#include <hip/hip_runtime.h>
#include <math.h>
#include <stdlib.h>
#include <stdio.h>
__device__
void jacobi_gpu(int N, double ***u, double ***v, double ***f, int iter_max) {
//int counter = 0;
int i = blockIdx.x * blockDim.x + threadIdx.x;
int j = blockIdx.y * blockDim.y + threadIdx.y;
int k = blockIdx.z * blockDim.z + threadIdx.z;
//v[i][j][k] = u[i][j][k];
//} while (counter <iter_max);
if(i > 0 && j > 0 && k > 0 && i<N-1 && j<N-1 && k<N-1){
//v[i][j][k] = u[i][j][k];
u[i][j][k] = 1./6.*(v[i-1][j][k]+v[i+1][j][k]+v[i][j-1][k]+v[i][j+1][k]+v[i][j][k-1]+v[i][j][k+1] + 1./((N)*(N)) * f[i][j][k]);
printf("i=%i j=%i k=%i | u=%f v=%f f=%f\n", i, j, k, u[i][j][k], v[i][j][k], f[i][j][k]);
}
}
// Kernel to be launched on a single thread
__global__
void jacobi_per_elem(int N, double ***u, double ***v, double ***f, int iter_max)
{
jacobi_gpu(N, u, v, f, iter_max);
} |
You are a helpful coding assistant specialized in converting HIP source code to AMD host assembly. | /* jacobi.c - Poisson problem in 3d
*
*/
#include <hip/hip_runtime.h>
#include <math.h>
#include <stdlib.h>
#include <stdio.h>
__device__
void jacobi_gpu(int N, double ***u, double ***v, double ***f, int iter_max) {
//int counter = 0;
int i = blockIdx.x * blockDim.x + threadIdx.x;
int j = blockIdx.y * blockDim.y + threadIdx.y;
int k = blockIdx.z * blockDim.z + threadIdx.z;
//v[i][j][k] = u[i][j][k];
//} while (counter <iter_max);
if(i > 0 && j > 0 && k > 0 && i<N-1 && j<N-1 && k<N-1){
//v[i][j][k] = u[i][j][k];
u[i][j][k] = 1./6.*(v[i-1][j][k]+v[i+1][j][k]+v[i][j-1][k]+v[i][j+1][k]+v[i][j][k-1]+v[i][j][k+1] + 1./((N)*(N)) * f[i][j][k]);
printf("i=%i j=%i k=%i | u=%f v=%f f=%f\n", i, j, k, u[i][j][k], v[i][j][k], f[i][j][k]);
}
}
// Kernel to be launched on a single thread
__global__
void jacobi_per_elem(int N, double ***u, double ***v, double ***f, int iter_max)
{
jacobi_gpu(N, u, v, f, iter_max);
} | .text
.file "jacobi_gpu2.hip"
.globl _Z30__device_stub__jacobi_per_elemiPPPdS1_S1_i # -- Begin function _Z30__device_stub__jacobi_per_elemiPPPdS1_S1_i
.p2align 4, 0x90
.type _Z30__device_stub__jacobi_per_elemiPPPdS1_S1_i,@function
_Z30__device_stub__jacobi_per_elemiPPPdS1_S1_i: # @_Z30__device_stub__jacobi_per_elemiPPPdS1_S1_i
.cfi_startproc
# %bb.0:
subq $120, %rsp
.cfi_def_cfa_offset 128
movl %edi, 4(%rsp)
movq %rsi, 72(%rsp)
movq %rdx, 64(%rsp)
movq %rcx, 56(%rsp)
movl %r8d, (%rsp)
leaq 4(%rsp), %rax
movq %rax, 80(%rsp)
leaq 72(%rsp), %rax
movq %rax, 88(%rsp)
leaq 64(%rsp), %rax
movq %rax, 96(%rsp)
leaq 56(%rsp), %rax
movq %rax, 104(%rsp)
movq %rsp, %rax
movq %rax, 112(%rsp)
leaq 40(%rsp), %rdi
leaq 24(%rsp), %rsi
leaq 16(%rsp), %rdx
leaq 8(%rsp), %rcx
callq __hipPopCallConfiguration
movq 40(%rsp), %rsi
movl 48(%rsp), %edx
movq 24(%rsp), %rcx
movl 32(%rsp), %r8d
leaq 80(%rsp), %r9
movl $_Z15jacobi_per_elemiPPPdS1_S1_i, %edi
pushq 8(%rsp)
.cfi_adjust_cfa_offset 8
pushq 24(%rsp)
.cfi_adjust_cfa_offset 8
callq hipLaunchKernel
addq $136, %rsp
.cfi_adjust_cfa_offset -136
retq
.Lfunc_end0:
.size _Z30__device_stub__jacobi_per_elemiPPPdS1_S1_i, .Lfunc_end0-_Z30__device_stub__jacobi_per_elemiPPPdS1_S1_i
.cfi_endproc
# -- End function
.p2align 4, 0x90 # -- Begin function __hip_module_ctor
.type __hip_module_ctor,@function
__hip_module_ctor: # @__hip_module_ctor
.cfi_startproc
# %bb.0:
subq $40, %rsp
.cfi_def_cfa_offset 48
cmpq $0, __hip_gpubin_handle(%rip)
jne .LBB1_2
# %bb.1:
movl $__hip_fatbin_wrapper, %edi
callq __hipRegisterFatBinary
movq %rax, __hip_gpubin_handle(%rip)
.LBB1_2:
movq __hip_gpubin_handle(%rip), %rdi
xorps %xmm0, %xmm0
movups %xmm0, 16(%rsp)
movups %xmm0, (%rsp)
movl $_Z15jacobi_per_elemiPPPdS1_S1_i, %esi
movl $.L__unnamed_1, %edx
movl $.L__unnamed_1, %ecx
movl $-1, %r8d
xorl %r9d, %r9d
callq __hipRegisterFunction
movl $__hip_module_dtor, %edi
addq $40, %rsp
.cfi_def_cfa_offset 8
jmp atexit # TAILCALL
.Lfunc_end1:
.size __hip_module_ctor, .Lfunc_end1-__hip_module_ctor
.cfi_endproc
# -- End function
.p2align 4, 0x90 # -- Begin function __hip_module_dtor
.type __hip_module_dtor,@function
__hip_module_dtor: # @__hip_module_dtor
.cfi_startproc
# %bb.0:
movq __hip_gpubin_handle(%rip), %rdi
testq %rdi, %rdi
je .LBB2_2
# %bb.1:
pushq %rax
.cfi_def_cfa_offset 16
callq __hipUnregisterFatBinary
movq $0, __hip_gpubin_handle(%rip)
addq $8, %rsp
.cfi_def_cfa_offset 8
.LBB2_2:
retq
.Lfunc_end2:
.size __hip_module_dtor, .Lfunc_end2-__hip_module_dtor
.cfi_endproc
# -- End function
.type _Z15jacobi_per_elemiPPPdS1_S1_i,@object # @_Z15jacobi_per_elemiPPPdS1_S1_i
.section .rodata,"a",@progbits
.globl _Z15jacobi_per_elemiPPPdS1_S1_i
.p2align 3, 0x0
_Z15jacobi_per_elemiPPPdS1_S1_i:
.quad _Z30__device_stub__jacobi_per_elemiPPPdS1_S1_i
.size _Z15jacobi_per_elemiPPPdS1_S1_i, 8
.type .L__unnamed_1,@object # @0
.section .rodata.str1.1,"aMS",@progbits,1
.L__unnamed_1:
.asciz "_Z15jacobi_per_elemiPPPdS1_S1_i"
.size .L__unnamed_1, 32
.type __hip_fatbin_wrapper,@object # @__hip_fatbin_wrapper
.section .hipFatBinSegment,"a",@progbits
.p2align 3, 0x0
__hip_fatbin_wrapper:
.long 1212764230 # 0x48495046
.long 1 # 0x1
.quad __hip_fatbin
.quad 0
.size __hip_fatbin_wrapper, 24
.type __hip_gpubin_handle,@object # @__hip_gpubin_handle
.local __hip_gpubin_handle
.comm __hip_gpubin_handle,8,8
.section .init_array,"aw",@init_array
.p2align 3, 0x0
.quad __hip_module_ctor
.type __hip_cuid_,@object # @__hip_cuid_
.bss
.globl __hip_cuid_
__hip_cuid_:
.byte 0 # 0x0
.size __hip_cuid_, 1
.section ".linker-options","e",@llvm_linker_options
.ident "AMD clang version 18.0.0git (https://github.com/RadeonOpenCompute/llvm-project roc-6.3.2 25012 e5bf7e55c91490b07c49d8960fa7983d864936c4)"
.section ".note.GNU-stack","",@progbits
.addrsig
.addrsig_sym _Z30__device_stub__jacobi_per_elemiPPPdS1_S1_i
.addrsig_sym __hip_module_ctor
.addrsig_sym __hip_module_dtor
.addrsig_sym _Z15jacobi_per_elemiPPPdS1_S1_i
.addrsig_sym __hip_fatbin
.addrsig_sym __hip_fatbin_wrapper
.addrsig_sym __hip_cuid_ |
You are a helpful coding assistant specialized in converting from CUDA host assembly to AMD host assembly. | .file "tmpxft_000f539f_00000000-6_jacobi_gpu2.cudafe1.cpp"
.text
#APP
#NO_APP
.type _ZL26__cudaUnregisterBinaryUtilv, @function
_ZL26__cudaUnregisterBinaryUtilv:
.LFB2060:
.cfi_startproc
endbr64
subq $8, %rsp
.cfi_def_cfa_offset 16
movq _ZL20__cudaFatCubinHandle(%rip), %rdi
call __cudaUnregisterFatBinary@PLT
addq $8, %rsp
.cfi_def_cfa_offset 8
ret
.cfi_endproc
.LFE2060:
.size _ZL26__cudaUnregisterBinaryUtilv, .-_ZL26__cudaUnregisterBinaryUtilv
.globl _Z10jacobi_gpuiPPPdS1_S1_i
.type _Z10jacobi_gpuiPPPdS1_S1_i, @function
_Z10jacobi_gpuiPPPdS1_S1_i:
.LFB2057:
.cfi_startproc
endbr64
pushq %rax
.cfi_def_cfa_offset 16
popq %rax
.cfi_def_cfa_offset 8
subq $24, %rsp
.cfi_def_cfa_offset 32
movl $1, 12(%rsp)
movl 12(%rsp), %edi
call exit@PLT
.cfi_endproc
.LFE2057:
.size _Z10jacobi_gpuiPPPdS1_S1_i, .-_Z10jacobi_gpuiPPPdS1_S1_i
.globl _Z45__device_stub__Z15jacobi_per_elemiPPPdS1_S1_iiPPPdS1_S1_i
.type _Z45__device_stub__Z15jacobi_per_elemiPPPdS1_S1_iiPPPdS1_S1_i, @function
_Z45__device_stub__Z15jacobi_per_elemiPPPdS1_S1_iiPPPdS1_S1_i:
.LFB2082:
.cfi_startproc
endbr64
subq $152, %rsp
.cfi_def_cfa_offset 160
movl %edi, 28(%rsp)
movq %rsi, 16(%rsp)
movq %rdx, 8(%rsp)
movq %rcx, (%rsp)
movl %r8d, 24(%rsp)
movq %fs:40, %rax
movq %rax, 136(%rsp)
xorl %eax, %eax
leaq 28(%rsp), %rax
movq %rax, 96(%rsp)
leaq 16(%rsp), %rax
movq %rax, 104(%rsp)
leaq 8(%rsp), %rax
movq %rax, 112(%rsp)
movq %rsp, %rax
movq %rax, 120(%rsp)
leaq 24(%rsp), %rax
movq %rax, 128(%rsp)
movl $1, 48(%rsp)
movl $1, 52(%rsp)
movl $1, 56(%rsp)
movl $1, 60(%rsp)
movl $1, 64(%rsp)
movl $1, 68(%rsp)
leaq 40(%rsp), %rcx
leaq 32(%rsp), %rdx
leaq 60(%rsp), %rsi
leaq 48(%rsp), %rdi
call __cudaPopCallConfiguration@PLT
testl %eax, %eax
je .L9
.L5:
movq 136(%rsp), %rax
subq %fs:40, %rax
jne .L10
addq $152, %rsp
.cfi_remember_state
.cfi_def_cfa_offset 8
ret
.L9:
.cfi_restore_state
pushq 40(%rsp)
.cfi_def_cfa_offset 168
pushq 40(%rsp)
.cfi_def_cfa_offset 176
leaq 112(%rsp), %r9
movq 76(%rsp), %rcx
movl 84(%rsp), %r8d
movq 64(%rsp), %rsi
movl 72(%rsp), %edx
leaq _Z15jacobi_per_elemiPPPdS1_S1_i(%rip), %rdi
call cudaLaunchKernel@PLT
addq $16, %rsp
.cfi_def_cfa_offset 160
jmp .L5
.L10:
call __stack_chk_fail@PLT
.cfi_endproc
.LFE2082:
.size _Z45__device_stub__Z15jacobi_per_elemiPPPdS1_S1_iiPPPdS1_S1_i, .-_Z45__device_stub__Z15jacobi_per_elemiPPPdS1_S1_iiPPPdS1_S1_i
.globl _Z15jacobi_per_elemiPPPdS1_S1_i
.type _Z15jacobi_per_elemiPPPdS1_S1_i, @function
_Z15jacobi_per_elemiPPPdS1_S1_i:
.LFB2083:
.cfi_startproc
endbr64
subq $8, %rsp
.cfi_def_cfa_offset 16
call _Z45__device_stub__Z15jacobi_per_elemiPPPdS1_S1_iiPPPdS1_S1_i
addq $8, %rsp
.cfi_def_cfa_offset 8
ret
.cfi_endproc
.LFE2083:
.size _Z15jacobi_per_elemiPPPdS1_S1_i, .-_Z15jacobi_per_elemiPPPdS1_S1_i
.section .rodata.str1.8,"aMS",@progbits,1
.align 8
.LC0:
.string "_Z15jacobi_per_elemiPPPdS1_S1_i"
.text
.type _ZL24__sti____cudaRegisterAllv, @function
_ZL24__sti____cudaRegisterAllv:
.LFB2085:
.cfi_startproc
endbr64
subq $8, %rsp
.cfi_def_cfa_offset 16
leaq _ZL15__fatDeviceText(%rip), %rdi
call __cudaRegisterFatBinary@PLT
movq %rax, %rdi
movq %rax, _ZL20__cudaFatCubinHandle(%rip)
pushq $0
.cfi_def_cfa_offset 24
pushq $0
.cfi_def_cfa_offset 32
pushq $0
.cfi_def_cfa_offset 40
pushq $0
.cfi_def_cfa_offset 48
movl $0, %r9d
movl $-1, %r8d
leaq .LC0(%rip), %rdx
movq %rdx, %rcx
leaq _Z15jacobi_per_elemiPPPdS1_S1_i(%rip), %rsi
call __cudaRegisterFunction@PLT
addq $32, %rsp
.cfi_def_cfa_offset 16
movq _ZL20__cudaFatCubinHandle(%rip), %rdi
call __cudaRegisterFatBinaryEnd@PLT
leaq _ZL26__cudaUnregisterBinaryUtilv(%rip), %rdi
call atexit@PLT
addq $8, %rsp
.cfi_def_cfa_offset 8
ret
.cfi_endproc
.LFE2085:
.size _ZL24__sti____cudaRegisterAllv, .-_ZL24__sti____cudaRegisterAllv
.section .init_array,"aw"
.align 8
.quad _ZL24__sti____cudaRegisterAllv
.section .nvFatBinSegment,"aw"
.align 8
.type _ZL15__fatDeviceText, @object
.size _ZL15__fatDeviceText, 24
_ZL15__fatDeviceText:
.long 1180844977
.long 1
.quad fatbinData
.quad 0
.local _ZL20__cudaFatCubinHandle
.comm _ZL20__cudaFatCubinHandle,8,8
.ident "GCC: (Ubuntu 13.3.0-6ubuntu2~24.04) 13.3.0"
.section .note.GNU-stack,"",@progbits
.section .note.gnu.property,"a"
.align 8
.long 1f - 0f
.long 4f - 1f
.long 5
0:
.string "GNU"
1:
.align 8
.long 0xc0000002
.long 3f - 2f
2:
.long 0x3
3:
.align 8
4: | .text
.file "jacobi_gpu2.hip"
.globl _Z30__device_stub__jacobi_per_elemiPPPdS1_S1_i # -- Begin function _Z30__device_stub__jacobi_per_elemiPPPdS1_S1_i
.p2align 4, 0x90
.type _Z30__device_stub__jacobi_per_elemiPPPdS1_S1_i,@function
_Z30__device_stub__jacobi_per_elemiPPPdS1_S1_i: # @_Z30__device_stub__jacobi_per_elemiPPPdS1_S1_i
.cfi_startproc
# %bb.0:
subq $120, %rsp
.cfi_def_cfa_offset 128
movl %edi, 4(%rsp)
movq %rsi, 72(%rsp)
movq %rdx, 64(%rsp)
movq %rcx, 56(%rsp)
movl %r8d, (%rsp)
leaq 4(%rsp), %rax
movq %rax, 80(%rsp)
leaq 72(%rsp), %rax
movq %rax, 88(%rsp)
leaq 64(%rsp), %rax
movq %rax, 96(%rsp)
leaq 56(%rsp), %rax
movq %rax, 104(%rsp)
movq %rsp, %rax
movq %rax, 112(%rsp)
leaq 40(%rsp), %rdi
leaq 24(%rsp), %rsi
leaq 16(%rsp), %rdx
leaq 8(%rsp), %rcx
callq __hipPopCallConfiguration
movq 40(%rsp), %rsi
movl 48(%rsp), %edx
movq 24(%rsp), %rcx
movl 32(%rsp), %r8d
leaq 80(%rsp), %r9
movl $_Z15jacobi_per_elemiPPPdS1_S1_i, %edi
pushq 8(%rsp)
.cfi_adjust_cfa_offset 8
pushq 24(%rsp)
.cfi_adjust_cfa_offset 8
callq hipLaunchKernel
addq $136, %rsp
.cfi_adjust_cfa_offset -136
retq
.Lfunc_end0:
.size _Z30__device_stub__jacobi_per_elemiPPPdS1_S1_i, .Lfunc_end0-_Z30__device_stub__jacobi_per_elemiPPPdS1_S1_i
.cfi_endproc
# -- End function
.p2align 4, 0x90 # -- Begin function __hip_module_ctor
.type __hip_module_ctor,@function
__hip_module_ctor: # @__hip_module_ctor
.cfi_startproc
# %bb.0:
subq $40, %rsp
.cfi_def_cfa_offset 48
cmpq $0, __hip_gpubin_handle(%rip)
jne .LBB1_2
# %bb.1:
movl $__hip_fatbin_wrapper, %edi
callq __hipRegisterFatBinary
movq %rax, __hip_gpubin_handle(%rip)
.LBB1_2:
movq __hip_gpubin_handle(%rip), %rdi
xorps %xmm0, %xmm0
movups %xmm0, 16(%rsp)
movups %xmm0, (%rsp)
movl $_Z15jacobi_per_elemiPPPdS1_S1_i, %esi
movl $.L__unnamed_1, %edx
movl $.L__unnamed_1, %ecx
movl $-1, %r8d
xorl %r9d, %r9d
callq __hipRegisterFunction
movl $__hip_module_dtor, %edi
addq $40, %rsp
.cfi_def_cfa_offset 8
jmp atexit # TAILCALL
.Lfunc_end1:
.size __hip_module_ctor, .Lfunc_end1-__hip_module_ctor
.cfi_endproc
# -- End function
.p2align 4, 0x90 # -- Begin function __hip_module_dtor
.type __hip_module_dtor,@function
__hip_module_dtor: # @__hip_module_dtor
.cfi_startproc
# %bb.0:
movq __hip_gpubin_handle(%rip), %rdi
testq %rdi, %rdi
je .LBB2_2
# %bb.1:
pushq %rax
.cfi_def_cfa_offset 16
callq __hipUnregisterFatBinary
movq $0, __hip_gpubin_handle(%rip)
addq $8, %rsp
.cfi_def_cfa_offset 8
.LBB2_2:
retq
.Lfunc_end2:
.size __hip_module_dtor, .Lfunc_end2-__hip_module_dtor
.cfi_endproc
# -- End function
.type _Z15jacobi_per_elemiPPPdS1_S1_i,@object # @_Z15jacobi_per_elemiPPPdS1_S1_i
.section .rodata,"a",@progbits
.globl _Z15jacobi_per_elemiPPPdS1_S1_i
.p2align 3, 0x0
_Z15jacobi_per_elemiPPPdS1_S1_i:
.quad _Z30__device_stub__jacobi_per_elemiPPPdS1_S1_i
.size _Z15jacobi_per_elemiPPPdS1_S1_i, 8
.type .L__unnamed_1,@object # @0
.section .rodata.str1.1,"aMS",@progbits,1
.L__unnamed_1:
.asciz "_Z15jacobi_per_elemiPPPdS1_S1_i"
.size .L__unnamed_1, 32
.type __hip_fatbin_wrapper,@object # @__hip_fatbin_wrapper
.section .hipFatBinSegment,"a",@progbits
.p2align 3, 0x0
__hip_fatbin_wrapper:
.long 1212764230 # 0x48495046
.long 1 # 0x1
.quad __hip_fatbin
.quad 0
.size __hip_fatbin_wrapper, 24
.type __hip_gpubin_handle,@object # @__hip_gpubin_handle
.local __hip_gpubin_handle
.comm __hip_gpubin_handle,8,8
.section .init_array,"aw",@init_array
.p2align 3, 0x0
.quad __hip_module_ctor
.type __hip_cuid_,@object # @__hip_cuid_
.bss
.globl __hip_cuid_
__hip_cuid_:
.byte 0 # 0x0
.size __hip_cuid_, 1
.section ".linker-options","e",@llvm_linker_options
.ident "AMD clang version 18.0.0git (https://github.com/RadeonOpenCompute/llvm-project roc-6.3.2 25012 e5bf7e55c91490b07c49d8960fa7983d864936c4)"
.section ".note.GNU-stack","",@progbits
.addrsig
.addrsig_sym _Z30__device_stub__jacobi_per_elemiPPPdS1_S1_i
.addrsig_sym __hip_module_ctor
.addrsig_sym __hip_module_dtor
.addrsig_sym _Z15jacobi_per_elemiPPPdS1_S1_i
.addrsig_sym __hip_fatbin
.addrsig_sym __hip_fatbin_wrapper
.addrsig_sym __hip_cuid_ |
You are a helpful coding assistant specialized in converting CUDA source code to CUDA device assembly. | // Take From
// https://stackoverflow.com/questions/35137213/texture-objects-for-doubles
#include <vector>
#include <cstdio>
static __inline__ __device__ double fetch_double(uint2 p){
return __hiloint2double(p.y, p.x);
}
#define gpuErrchk(ans) { gpuAssert((ans), __FILE__, __LINE__); }
inline void gpuAssert(cudaError_t code, const char *file, int line, bool abort=true)
{
if (code != cudaSuccess)
{
fprintf(stderr,"GPUassert: %s %s %d\n", cudaGetErrorString(code), file, line);
if (abort) exit(code);
}
}
__global__ void my_print(cudaTextureObject_t texObject)
{
uint2 rval = tex1Dfetch<uint2>(texObject, 0);
double dval = fetch_double(rval);
printf("%f\n", dval);
}
int main()
{
double i = 0.35;
int numel = 50;
std::vector<double> h_data(numel, i);
double* d_data;
cudaMalloc(&d_data,numel*sizeof(double));
cudaMemcpy((void*)d_data, &h_data[0], numel*sizeof(double), cudaMemcpyHostToDevice);
cudaTextureDesc td;
memset(&td, 0, sizeof(td));
td.normalizedCoords = 0;
td.addressMode[0] = cudaAddressModeClamp;
td.readMode = cudaReadModeElementType;
struct cudaResourceDesc resDesc;
memset(&resDesc, 0, sizeof(resDesc));
resDesc.resType = cudaResourceTypeLinear;
resDesc.res.linear.devPtr = d_data;
resDesc.res.linear.sizeInBytes = numel*sizeof(double);
resDesc.res.linear.desc.f = cudaChannelFormatKindUnsigned;
resDesc.res.linear.desc.x = 32;
resDesc.res.linear.desc.y = 32;
cudaTextureObject_t texObject;
gpuErrchk(cudaCreateTextureObject(&texObject, &resDesc, &td, NULL));
my_print<<<1,1>>>(texObject);
gpuErrchk(cudaDeviceSynchronize());
return 0;
} | code for sm_80
Function : _Z8my_printy
.headerflags @"EF_CUDA_TEXMODE_UNIFIED EF_CUDA_64BIT_ADDRESS EF_CUDA_SM80 EF_CUDA_VIRTUAL_SM(EF_CUDA_SM80)"
/*0000*/ IMAD.MOV.U32 R1, RZ, RZ, c[0x0][0x28] ; /* 0x00000a00ff017624 */
/* 0x000fc800078e00ff */
/*0010*/ IMAD.MOV.U32 R2, RZ, RZ, RZ ; /* 0x000000ffff027224 */
/* 0x000fe200078e00ff */
/*0020*/ IADD3 R1, R1, -0x8, RZ ; /* 0xfffffff801017810 */
/* 0x000fca0007ffe0ff */
/*0030*/ TLD.SCR.LZ RZ, R2, R2, 0x0, 0x58, 1D, 0x3 ; /* 0x100058ff02027b66 */
/* 0x000f4200009e03ff */
/*0040*/ MOV R0, 0x0 ; /* 0x0000000000007802 */
/* 0x000fe20000000f00 */
/*0050*/ IMAD.MOV.U32 R4, RZ, RZ, c[0x4][0x8] ; /* 0x01000200ff047624 */
/* 0x000fe200078e00ff */
/*0060*/ IADD3 R6, P0, R1, c[0x0][0x20], RZ ; /* 0x0000080001067a10 */
/* 0x000fe20007f1e0ff */
/*0070*/ IMAD.MOV.U32 R5, RZ, RZ, c[0x4][0xc] ; /* 0x01000300ff057624 */
/* 0x000fe200078e00ff */
/*0080*/ LDC.64 R8, c[0x4][R0] ; /* 0x0100000000087b82 */
/* 0x0000660000000a00 */
/*0090*/ IMAD.X R7, RZ, RZ, c[0x0][0x24], P0 ; /* 0x00000900ff077624 */
/* 0x000fe200000e06ff */
/*00a0*/ STL.64 [R1], R2 ; /* 0x0000000201007387 */
/* 0x0201e80000100a00 */
/*00b0*/ LEPC R2 ; /* 0x000000000002734e */
/* 0x003fc60000000000 */
/*00c0*/ MOV R11, 0x130 ; /* 0x00000130000b7802 */
/* 0x000fe40000000f00 */
/*00d0*/ MOV R20, 0xb0 ; /* 0x000000b000147802 */
/* 0x000fc40000000f00 */
/*00e0*/ MOV R21, 0x0 ; /* 0x0000000000157802 */
/* 0x000fe40000000f00 */
/*00f0*/ MOV R0, 0x0 ; /* 0x0000000000007802 */
/* 0x000fe40000000f00 */
/*0100*/ IADD3 R20, P0, P1, -R20, R11, R2 ; /* 0x0000000b14147210 */
/* 0x000fc8000791e102 */
/*0110*/ IADD3.X R21, ~R0, R21, R3, P0, P1 ; /* 0x0000001500157210 */
/* 0x000fc800007e2503 */
/*0120*/ CALL.ABS.NOINC R8 ; /* 0x0000000008007343 */
/* 0x000fea0003c00000 */
/*0130*/ EXIT ; /* 0x000000000000794d */
/* 0x000fea0003800000 */
/*0140*/ BRA 0x140; /* 0xfffffff000007947 */
/* 0x000fc0000383ffff */
/*0150*/ NOP; /* 0x0000000000007918 */
/* 0x000fc00000000000 */
/*0160*/ NOP; /* 0x0000000000007918 */
/* 0x000fc00000000000 */
/*0170*/ NOP; /* 0x0000000000007918 */
/* 0x000fc00000000000 */
/*0180*/ NOP; /* 0x0000000000007918 */
/* 0x000fc00000000000 */
/*0190*/ NOP; /* 0x0000000000007918 */
/* 0x000fc00000000000 */
/*01a0*/ NOP; /* 0x0000000000007918 */
/* 0x000fc00000000000 */
/*01b0*/ NOP; /* 0x0000000000007918 */
/* 0x000fc00000000000 */
/*01c0*/ NOP; /* 0x0000000000007918 */
/* 0x000fc00000000000 */
/*01d0*/ NOP; /* 0x0000000000007918 */
/* 0x000fc00000000000 */
/*01e0*/ NOP; /* 0x0000000000007918 */
/* 0x000fc00000000000 */
/*01f0*/ NOP; /* 0x0000000000007918 */
/* 0x000fc00000000000 */
.......... |
You are a helpful coding assistant specialized in converting CUDA source code to CUDA host assembly. | // Take From
// https://stackoverflow.com/questions/35137213/texture-objects-for-doubles
#include <vector>
#include <cstdio>
static __inline__ __device__ double fetch_double(uint2 p){
return __hiloint2double(p.y, p.x);
}
#define gpuErrchk(ans) { gpuAssert((ans), __FILE__, __LINE__); }
inline void gpuAssert(cudaError_t code, const char *file, int line, bool abort=true)
{
if (code != cudaSuccess)
{
fprintf(stderr,"GPUassert: %s %s %d\n", cudaGetErrorString(code), file, line);
if (abort) exit(code);
}
}
__global__ void my_print(cudaTextureObject_t texObject)
{
uint2 rval = tex1Dfetch<uint2>(texObject, 0);
double dval = fetch_double(rval);
printf("%f\n", dval);
}
int main()
{
double i = 0.35;
int numel = 50;
std::vector<double> h_data(numel, i);
double* d_data;
cudaMalloc(&d_data,numel*sizeof(double));
cudaMemcpy((void*)d_data, &h_data[0], numel*sizeof(double), cudaMemcpyHostToDevice);
cudaTextureDesc td;
memset(&td, 0, sizeof(td));
td.normalizedCoords = 0;
td.addressMode[0] = cudaAddressModeClamp;
td.readMode = cudaReadModeElementType;
struct cudaResourceDesc resDesc;
memset(&resDesc, 0, sizeof(resDesc));
resDesc.resType = cudaResourceTypeLinear;
resDesc.res.linear.devPtr = d_data;
resDesc.res.linear.sizeInBytes = numel*sizeof(double);
resDesc.res.linear.desc.f = cudaChannelFormatKindUnsigned;
resDesc.res.linear.desc.x = 32;
resDesc.res.linear.desc.y = 32;
cudaTextureObject_t texObject;
gpuErrchk(cudaCreateTextureObject(&texObject, &resDesc, &td, NULL));
my_print<<<1,1>>>(texObject);
gpuErrchk(cudaDeviceSynchronize());
return 0;
} | .file "tmpxft_0002721c_00000000-6_doublePrecisionTexMem_bindless.cudafe1.cpp"
.text
#APP
#NO_APP
.type _ZL26__cudaUnregisterBinaryUtilv, @function
_ZL26__cudaUnregisterBinaryUtilv:
.LFB2931:
.cfi_startproc
endbr64
subq $8, %rsp
.cfi_def_cfa_offset 16
movq _ZL20__cudaFatCubinHandle(%rip), %rdi
call __cudaUnregisterFatBinary@PLT
addq $8, %rsp
.cfi_def_cfa_offset 8
ret
.cfi_endproc
.LFE2931:
.size _ZL26__cudaUnregisterBinaryUtilv, .-_ZL26__cudaUnregisterBinaryUtilv
.section .rodata._Z9gpuAssert9cudaErrorPKcib.str1.1,"aMS",@progbits,1
.LC0:
.string "GPUassert: %s %s %d\n"
.section .text._Z9gpuAssert9cudaErrorPKcib,"axG",@progbits,_Z9gpuAssert9cudaErrorPKcib,comdat
.weak _Z9gpuAssert9cudaErrorPKcib
.type _Z9gpuAssert9cudaErrorPKcib, @function
_Z9gpuAssert9cudaErrorPKcib:
.LFB2927:
.cfi_startproc
endbr64
testl %edi, %edi
jne .L9
ret
.L9:
pushq %r13
.cfi_def_cfa_offset 16
.cfi_offset 13, -16
pushq %r12
.cfi_def_cfa_offset 24
.cfi_offset 12, -24
pushq %rbp
.cfi_def_cfa_offset 32
.cfi_offset 6, -32
pushq %rbx
.cfi_def_cfa_offset 40
.cfi_offset 3, -40
subq $8, %rsp
.cfi_def_cfa_offset 48
movl %edi, %ebx
movq %rsi, %r13
movl %edx, %r12d
movl %ecx, %ebp
call cudaGetErrorString@PLT
movq %rax, %rcx
movl %r12d, %r9d
movq %r13, %r8
leaq .LC0(%rip), %rdx
movl $2, %esi
movq stderr(%rip), %rdi
movl $0, %eax
call __fprintf_chk@PLT
testb %bpl, %bpl
jne .L10
addq $8, %rsp
.cfi_remember_state
.cfi_def_cfa_offset 40
popq %rbx
.cfi_def_cfa_offset 32
popq %rbp
.cfi_def_cfa_offset 24
popq %r12
.cfi_def_cfa_offset 16
popq %r13
.cfi_def_cfa_offset 8
ret
.L10:
.cfi_restore_state
movl %ebx, %edi
call exit@PLT
.cfi_endproc
.LFE2927:
.size _Z9gpuAssert9cudaErrorPKcib, .-_Z9gpuAssert9cudaErrorPKcib
.text
.globl _Z26__device_stub__Z8my_printyy
.type _Z26__device_stub__Z8my_printyy, @function
_Z26__device_stub__Z8my_printyy:
.LFB2953:
.cfi_startproc
endbr64
subq $104, %rsp
.cfi_def_cfa_offset 112
movq %rdi, 8(%rsp)
movq %fs:40, %rax
movq %rax, 88(%rsp)
xorl %eax, %eax
leaq 8(%rsp), %rax
movq %rax, 80(%rsp)
movl $1, 32(%rsp)
movl $1, 36(%rsp)
movl $1, 40(%rsp)
movl $1, 44(%rsp)
movl $1, 48(%rsp)
movl $1, 52(%rsp)
leaq 24(%rsp), %rcx
leaq 16(%rsp), %rdx
leaq 44(%rsp), %rsi
leaq 32(%rsp), %rdi
call __cudaPopCallConfiguration@PLT
testl %eax, %eax
je .L15
.L11:
movq 88(%rsp), %rax
subq %fs:40, %rax
jne .L16
addq $104, %rsp
.cfi_remember_state
.cfi_def_cfa_offset 8
ret
.L15:
.cfi_restore_state
pushq 24(%rsp)
.cfi_def_cfa_offset 120
pushq 24(%rsp)
.cfi_def_cfa_offset 128
leaq 96(%rsp), %r9
movq 60(%rsp), %rcx
movl 68(%rsp), %r8d
movq 48(%rsp), %rsi
movl 56(%rsp), %edx
leaq _Z8my_printy(%rip), %rdi
call cudaLaunchKernel@PLT
addq $16, %rsp
.cfi_def_cfa_offset 112
jmp .L11
.L16:
call __stack_chk_fail@PLT
.cfi_endproc
.LFE2953:
.size _Z26__device_stub__Z8my_printyy, .-_Z26__device_stub__Z8my_printyy
.globl _Z8my_printy
.type _Z8my_printy, @function
_Z8my_printy:
.LFB2954:
.cfi_startproc
endbr64
subq $8, %rsp
.cfi_def_cfa_offset 16
call _Z26__device_stub__Z8my_printyy
addq $8, %rsp
.cfi_def_cfa_offset 8
ret
.cfi_endproc
.LFE2954:
.size _Z8my_printy, .-_Z8my_printy
.section .rodata.str1.8,"aMS",@progbits,1
.align 8
.LC2:
.string "/home/ubuntu/Datasets/stackv2/train-structured/Cxb1993/Matlab2CPP/master/singleGPU/heatEquation2d_textureMemory/experiments/doublePrecisionTexMem_bindless.cu"
.text
.globl main
.type main, @function
main:
.LFB2928:
.cfi_startproc
.cfi_personality 0x9b,DW.ref.__gxx_personality_v0
.cfi_lsda 0x1b,.LLSDA2928
endbr64
pushq %rbp
.cfi_def_cfa_offset 16
.cfi_offset 6, -16
pushq %rbx
.cfi_def_cfa_offset 24
.cfi_offset 3, -24
subq $200, %rsp
.cfi_def_cfa_offset 224
movq %fs:40, %rax
movq %rax, 184(%rsp)
xorl %eax, %eax
movl $400, %edi
.LEHB0:
call _Znwm@PLT
.LEHE0:
movq %rax, %rbx
leaq 400(%rax), %rdx
movsd .LC1(%rip), %xmm0
.L20:
movsd %xmm0, (%rax)
addq $8, %rax
cmpq %rdx, %rax
jne .L20
leaq 8(%rsp), %rdi
movl $400, %esi
.LEHB1:
call cudaMalloc@PLT
movl $1, %ecx
movl $400, %edx
movq %rbx, %rsi
movq 8(%rsp), %rdi
call cudaMemcpy@PLT
leaq 112(%rsp), %rdx
pxor %xmm0, %xmm0
movups %xmm0, 116(%rsp)
movups %xmm0, 132(%rsp)
movups %xmm0, 148(%rsp)
movups %xmm0, 164(%rsp)
movl $0, 180(%rsp)
movl $1, 112(%rsp)
leaq 48(%rsp), %rsi
movups %xmm0, 52(%rsp)
movups %xmm0, 68(%rsp)
movups %xmm0, 84(%rsp)
movups %xmm0, 96(%rsp)
movl $2, 48(%rsp)
movq 8(%rsp), %rax
movq %rax, 56(%rsp)
movq $400, 88(%rsp)
movl $1, 80(%rsp)
movl $32, 64(%rsp)
movl $32, 68(%rsp)
leaq 16(%rsp), %rdi
movl $0, %ecx
call cudaCreateTextureObject@PLT
movl %eax, %edi
movl $1, %ecx
movl $56, %edx
leaq .LC2(%rip), %rsi
call _Z9gpuAssert9cudaErrorPKcib
movl $1, 36(%rsp)
movl $1, 40(%rsp)
movl $1, 24(%rsp)
movl $1, 28(%rsp)
movl $0, %r9d
movl $0, %r8d
movq 36(%rsp), %rdx
movl $1, %ecx
movq 24(%rsp), %rdi
movl $1, %esi
call __cudaPushCallConfiguration@PLT
testl %eax, %eax
jne .L21
movq 16(%rsp), %rdi
call _Z26__device_stub__Z8my_printyy
.L21:
call cudaDeviceSynchronize@PLT
movl %eax, %edi
movl $1, %ecx
movl $60, %edx
leaq .LC2(%rip), %rsi
call _Z9gpuAssert9cudaErrorPKcib
.LEHE1:
movl $400, %esi
movq %rbx, %rdi
call _ZdlPvm@PLT
movq 184(%rsp), %rax
subq %fs:40, %rax
jne .L29
movl $0, %eax
addq $200, %rsp
.cfi_remember_state
.cfi_def_cfa_offset 24
popq %rbx
.cfi_def_cfa_offset 16
popq %rbp
.cfi_def_cfa_offset 8
ret
.L25:
.cfi_restore_state
endbr64
movq %rax, %rbp
movl $400, %esi
movq %rbx, %rdi
call _ZdlPvm@PLT
movq 184(%rsp), %rax
subq %fs:40, %rax
je .L23
call __stack_chk_fail@PLT
.L23:
movq %rbp, %rdi
.LEHB2:
call _Unwind_Resume@PLT
.LEHE2:
.L29:
call __stack_chk_fail@PLT
.cfi_endproc
.LFE2928:
.globl __gxx_personality_v0
.section .gcc_except_table,"a",@progbits
.LLSDA2928:
.byte 0xff
.byte 0xff
.byte 0x1
.uleb128 .LLSDACSE2928-.LLSDACSB2928
.LLSDACSB2928:
.uleb128 .LEHB0-.LFB2928
.uleb128 .LEHE0-.LEHB0
.uleb128 0
.uleb128 0
.uleb128 .LEHB1-.LFB2928
.uleb128 .LEHE1-.LEHB1
.uleb128 .L25-.LFB2928
.uleb128 0
.uleb128 .LEHB2-.LFB2928
.uleb128 .LEHE2-.LEHB2
.uleb128 0
.uleb128 0
.LLSDACSE2928:
.text
.size main, .-main
.section .rodata.str1.1,"aMS",@progbits,1
.LC4:
.string "_Z8my_printy"
.text
.type _ZL24__sti____cudaRegisterAllv, @function
_ZL24__sti____cudaRegisterAllv:
.LFB2956:
.cfi_startproc
endbr64
subq $8, %rsp
.cfi_def_cfa_offset 16
leaq _ZL15__fatDeviceText(%rip), %rdi
call __cudaRegisterFatBinary@PLT
movq %rax, %rdi
movq %rax, _ZL20__cudaFatCubinHandle(%rip)
pushq $0
.cfi_def_cfa_offset 24
pushq $0
.cfi_def_cfa_offset 32
pushq $0
.cfi_def_cfa_offset 40
pushq $0
.cfi_def_cfa_offset 48
movl $0, %r9d
movl $-1, %r8d
leaq .LC4(%rip), %rdx
movq %rdx, %rcx
leaq _Z8my_printy(%rip), %rsi
call __cudaRegisterFunction@PLT
addq $32, %rsp
.cfi_def_cfa_offset 16
movq _ZL20__cudaFatCubinHandle(%rip), %rdi
call __cudaRegisterFatBinaryEnd@PLT
leaq _ZL26__cudaUnregisterBinaryUtilv(%rip), %rdi
call atexit@PLT
addq $8, %rsp
.cfi_def_cfa_offset 8
ret
.cfi_endproc
.LFE2956:
.size _ZL24__sti____cudaRegisterAllv, .-_ZL24__sti____cudaRegisterAllv
.section .init_array,"aw"
.align 8
.quad _ZL24__sti____cudaRegisterAllv
.section .nvFatBinSegment,"aw"
.align 8
.type _ZL15__fatDeviceText, @object
.size _ZL15__fatDeviceText, 24
_ZL15__fatDeviceText:
.long 1180844977
.long 1
.quad fatbinData
.quad 0
.local _ZL20__cudaFatCubinHandle
.comm _ZL20__cudaFatCubinHandle,8,8
.section .rodata.cst8,"aM",@progbits,8
.align 8
.LC1:
.long 1717986918
.long 1071015526
.hidden DW.ref.__gxx_personality_v0
.weak DW.ref.__gxx_personality_v0
.section .data.rel.local.DW.ref.__gxx_personality_v0,"awG",@progbits,DW.ref.__gxx_personality_v0,comdat
.align 8
.type DW.ref.__gxx_personality_v0, @object
.size DW.ref.__gxx_personality_v0, 8
DW.ref.__gxx_personality_v0:
.quad __gxx_personality_v0
.ident "GCC: (Ubuntu 13.3.0-6ubuntu2~24.04) 13.3.0"
.section .note.GNU-stack,"",@progbits
.section .note.gnu.property,"a"
.align 8
.long 1f - 0f
.long 4f - 1f
.long 5
0:
.string "GNU"
1:
.align 8
.long 0xc0000002
.long 3f - 2f
2:
.long 0x3
3:
.align 8
4: |
You are a helpful coding assistant specialized in converting CUDA source code to HIP/AMD source code. | // Take From
// https://stackoverflow.com/questions/35137213/texture-objects-for-doubles
#include <vector>
#include <cstdio>
static __inline__ __device__ double fetch_double(uint2 p){
return __hiloint2double(p.y, p.x);
}
#define gpuErrchk(ans) { gpuAssert((ans), __FILE__, __LINE__); }
inline void gpuAssert(cudaError_t code, const char *file, int line, bool abort=true)
{
if (code != cudaSuccess)
{
fprintf(stderr,"GPUassert: %s %s %d\n", cudaGetErrorString(code), file, line);
if (abort) exit(code);
}
}
__global__ void my_print(cudaTextureObject_t texObject)
{
uint2 rval = tex1Dfetch<uint2>(texObject, 0);
double dval = fetch_double(rval);
printf("%f\n", dval);
}
int main()
{
double i = 0.35;
int numel = 50;
std::vector<double> h_data(numel, i);
double* d_data;
cudaMalloc(&d_data,numel*sizeof(double));
cudaMemcpy((void*)d_data, &h_data[0], numel*sizeof(double), cudaMemcpyHostToDevice);
cudaTextureDesc td;
memset(&td, 0, sizeof(td));
td.normalizedCoords = 0;
td.addressMode[0] = cudaAddressModeClamp;
td.readMode = cudaReadModeElementType;
struct cudaResourceDesc resDesc;
memset(&resDesc, 0, sizeof(resDesc));
resDesc.resType = cudaResourceTypeLinear;
resDesc.res.linear.devPtr = d_data;
resDesc.res.linear.sizeInBytes = numel*sizeof(double);
resDesc.res.linear.desc.f = cudaChannelFormatKindUnsigned;
resDesc.res.linear.desc.x = 32;
resDesc.res.linear.desc.y = 32;
cudaTextureObject_t texObject;
gpuErrchk(cudaCreateTextureObject(&texObject, &resDesc, &td, NULL));
my_print<<<1,1>>>(texObject);
gpuErrchk(cudaDeviceSynchronize());
return 0;
} | // Take From
// https://stackoverflow.com/questions/35137213/texture-objects-for-doubles
#include <hip/hip_runtime.h>
#include <vector>
#include <cstdio>
static __inline__ __device__ double fetch_double(uint2 p){
return __hiloint2double(p.y, p.x);
}
#define gpuErrchk(ans) { gpuAssert((ans), __FILE__, __LINE__); }
inline void gpuAssert(hipError_t code, const char *file, int line, bool abort=true)
{
if (code != hipSuccess)
{
fprintf(stderr,"GPUassert: %s %s %d\n", hipGetErrorString(code), file, line);
if (abort) exit(code);
}
}
__global__ void my_print(hipTextureObject_t texObject)
{
uint2 rval = tex1Dfetch<uint2>(texObject, 0);
double dval = fetch_double(rval);
printf("%f\n", dval);
}
int main()
{
double i = 0.35;
int numel = 50;
std::vector<double> h_data(numel, i);
double* d_data;
hipMalloc(&d_data,numel*sizeof(double));
hipMemcpy((void*)d_data, &h_data[0], numel*sizeof(double), hipMemcpyHostToDevice);
hipTextureDesc td;
memset(&td, 0, sizeof(td));
td.normalizedCoords = 0;
td.addressMode[0] = hipAddressModeClamp;
td.readMode = hipReadModeElementType;
struct hipResourceDesc resDesc;
memset(&resDesc, 0, sizeof(resDesc));
resDesc.resType = hipResourceTypeLinear;
resDesc.res.linear.devPtr = d_data;
resDesc.res.linear.sizeInBytes = numel*sizeof(double);
resDesc.res.linear.desc.f = hipChannelFormatKindUnsigned;
resDesc.res.linear.desc.x = 32;
resDesc.res.linear.desc.y = 32;
hipTextureObject_t texObject;
gpuErrchk(hipCreateTextureObject(&texObject, &resDesc, &td, NULL));
my_print<<<1,1>>>(texObject);
gpuErrchk(hipDeviceSynchronize());
return 0;
} |
You are a helpful coding assistant specialized in converting HIP source code to AMD host assembly. | // Take From
// https://stackoverflow.com/questions/35137213/texture-objects-for-doubles
#include <hip/hip_runtime.h>
#include <vector>
#include <cstdio>
static __inline__ __device__ double fetch_double(uint2 p){
return __hiloint2double(p.y, p.x);
}
#define gpuErrchk(ans) { gpuAssert((ans), __FILE__, __LINE__); }
inline void gpuAssert(hipError_t code, const char *file, int line, bool abort=true)
{
if (code != hipSuccess)
{
fprintf(stderr,"GPUassert: %s %s %d\n", hipGetErrorString(code), file, line);
if (abort) exit(code);
}
}
__global__ void my_print(hipTextureObject_t texObject)
{
uint2 rval = tex1Dfetch<uint2>(texObject, 0);
double dval = fetch_double(rval);
printf("%f\n", dval);
}
int main()
{
double i = 0.35;
int numel = 50;
std::vector<double> h_data(numel, i);
double* d_data;
hipMalloc(&d_data,numel*sizeof(double));
hipMemcpy((void*)d_data, &h_data[0], numel*sizeof(double), hipMemcpyHostToDevice);
hipTextureDesc td;
memset(&td, 0, sizeof(td));
td.normalizedCoords = 0;
td.addressMode[0] = hipAddressModeClamp;
td.readMode = hipReadModeElementType;
struct hipResourceDesc resDesc;
memset(&resDesc, 0, sizeof(resDesc));
resDesc.resType = hipResourceTypeLinear;
resDesc.res.linear.devPtr = d_data;
resDesc.res.linear.sizeInBytes = numel*sizeof(double);
resDesc.res.linear.desc.f = hipChannelFormatKindUnsigned;
resDesc.res.linear.desc.x = 32;
resDesc.res.linear.desc.y = 32;
hipTextureObject_t texObject;
gpuErrchk(hipCreateTextureObject(&texObject, &resDesc, &td, NULL));
my_print<<<1,1>>>(texObject);
gpuErrchk(hipDeviceSynchronize());
return 0;
} | .text
.file "doublePrecisionTexMem_bindless.hip"
.globl _Z23__device_stub__my_printP13__hip_texture # -- Begin function _Z23__device_stub__my_printP13__hip_texture
.p2align 4, 0x90
.type _Z23__device_stub__my_printP13__hip_texture,@function
_Z23__device_stub__my_printP13__hip_texture: # @_Z23__device_stub__my_printP13__hip_texture
.cfi_startproc
# %bb.0:
subq $72, %rsp
.cfi_def_cfa_offset 80
movq %rdi, 64(%rsp)
leaq 64(%rsp), %rax
movq %rax, (%rsp)
leaq 48(%rsp), %rdi
leaq 32(%rsp), %rsi
leaq 24(%rsp), %rdx
leaq 16(%rsp), %rcx
callq __hipPopCallConfiguration
movq 48(%rsp), %rsi
movl 56(%rsp), %edx
movq 32(%rsp), %rcx
movl 40(%rsp), %r8d
movq %rsp, %r9
movl $_Z8my_printP13__hip_texture, %edi
pushq 16(%rsp)
.cfi_adjust_cfa_offset 8
pushq 32(%rsp)
.cfi_adjust_cfa_offset 8
callq hipLaunchKernel
addq $88, %rsp
.cfi_adjust_cfa_offset -88
retq
.Lfunc_end0:
.size _Z23__device_stub__my_printP13__hip_texture, .Lfunc_end0-_Z23__device_stub__my_printP13__hip_texture
.cfi_endproc
# -- End function
.globl main # -- Begin function main
.p2align 4, 0x90
.type main,@function
main: # @main
.Lfunc_begin0:
.cfi_startproc
.cfi_personality 3, __gxx_personality_v0
.cfi_lsda 3, .Lexception0
# %bb.0: # %.noexc
pushq %rbp
.cfi_def_cfa_offset 16
pushq %r14
.cfi_def_cfa_offset 24
pushq %rbx
.cfi_def_cfa_offset 32
subq $224, %rsp
.cfi_def_cfa_offset 256
.cfi_offset %rbx, -32
.cfi_offset %r14, -24
.cfi_offset %rbp, -16
.cfi_escape 0x2e, 0x00
movl $400, %edi # imm = 0x190
callq _Znwm
movq %rax, %rbx
xorl %eax, %eax
movabsq $4599976659396224614, %rcx # imm = 0x3FD6666666666666
.p2align 4, 0x90
.LBB1_1: # %.lr.ph.i.i.i.i.i.i.i.i.i
# =>This Inner Loop Header: Depth=1
movq %rcx, (%rbx,%rax)
addq $8, %rax
cmpq $400, %rax # imm = 0x190
jne .LBB1_1
# %bb.2: # %_ZNSt6vectorIdSaIdEEC2EmRKdRKS0_.exit
.Ltmp0:
.cfi_escape 0x2e, 0x00
leaq 8(%rsp), %rdi
movl $400, %esi # imm = 0x190
callq hipMalloc
.Ltmp1:
# %bb.3: # %_ZL9hipMallocIdE10hipError_tPPT_m.exit
movq 8(%rsp), %rdi
.Ltmp2:
.cfi_escape 0x2e, 0x00
movl $400, %edx # imm = 0x190
movq %rbx, %rsi
movl $1, %ecx
callq hipMemcpy
.Ltmp3:
# %bb.4:
xorps %xmm0, %xmm0
movaps %xmm0, 160(%rsp)
movaps %xmm0, 176(%rsp)
movaps %xmm0, 208(%rsp)
movaps %xmm0, 192(%rsp)
movl $1, 160(%rsp)
movl $0, 176(%rsp)
movaps %xmm0, 96(%rsp)
movaps %xmm0, 128(%rsp)
movaps %xmm0, 112(%rsp)
movaps %xmm0, 144(%rsp)
movl $2, 96(%rsp)
movq 8(%rsp), %rax
movq %rax, 104(%rsp)
movq $400, 136(%rsp) # imm = 0x190
movl $1, 128(%rsp)
movabsq $137438953504, %rax # imm = 0x2000000020
movq %rax, 112(%rsp)
.Ltmp5:
.cfi_escape 0x2e, 0x00
leaq 32(%rsp), %rdi
leaq 96(%rsp), %rsi
leaq 160(%rsp), %rdx
xorl %ecx, %ecx
callq hipCreateTextureObject
.Ltmp6:
# %bb.5:
testl %eax, %eax
jne .LBB1_6
# %bb.9: # %_Z9gpuAssert10hipError_tPKcib.exit
.Ltmp9:
.cfi_escape 0x2e, 0x00
movabsq $4294967297, %rdi # imm = 0x100000001
movl $1, %esi
movq %rdi, %rdx
movl $1, %ecx
xorl %r8d, %r8d
xorl %r9d, %r9d
callq __hipPushCallConfiguration
.Ltmp10:
# %bb.10:
testl %eax, %eax
jne .LBB1_13
# %bb.11:
movq 32(%rsp), %rax
movq %rax, 88(%rsp)
leaq 88(%rsp), %rax
movq %rax, 16(%rsp)
.Ltmp11:
.cfi_escape 0x2e, 0x00
leaq 72(%rsp), %rdi
leaq 56(%rsp), %rsi
leaq 48(%rsp), %rdx
leaq 40(%rsp), %rcx
callq __hipPopCallConfiguration
.Ltmp12:
# %bb.12: # %.noexc14
movq 72(%rsp), %rsi
movl 80(%rsp), %edx
movq 56(%rsp), %rcx
movl 64(%rsp), %r8d
.Ltmp13:
.cfi_escape 0x2e, 0x10
leaq 16(%rsp), %r9
movl $_Z8my_printP13__hip_texture, %edi
pushq 40(%rsp)
.cfi_adjust_cfa_offset 8
pushq 56(%rsp)
.cfi_adjust_cfa_offset 8
callq hipLaunchKernel
addq $16, %rsp
.cfi_adjust_cfa_offset -16
.Ltmp14:
.LBB1_13:
.Ltmp15:
.cfi_escape 0x2e, 0x00
callq hipDeviceSynchronize
.Ltmp16:
# %bb.14:
testl %eax, %eax
jne .LBB1_15
# %bb.17: # %_Z9gpuAssert10hipError_tPKcib.exit18
.cfi_escape 0x2e, 0x00
movq %rbx, %rdi
callq _ZdlPv
xorl %eax, %eax
addq $224, %rsp
.cfi_def_cfa_offset 32
popq %rbx
.cfi_def_cfa_offset 24
popq %r14
.cfi_def_cfa_offset 16
popq %rbp
.cfi_def_cfa_offset 8
retq
.LBB1_6:
.cfi_def_cfa_offset 256
movq stderr(%rip), %r14
.Ltmp7:
.cfi_escape 0x2e, 0x00
movl %eax, %edi
movl %eax, %ebp
callq hipGetErrorString
.Ltmp8:
# %bb.7: # %.noexc13
movl %ebp, %r9d
.cfi_escape 0x2e, 0x00
movl $.L.str.2, %esi
movl $.L.str, %ecx
movq %r14, %rdi
movq %rax, %rdx
movl $58, %r8d
jmp .LBB1_8
.LBB1_15:
movq stderr(%rip), %r14
.Ltmp17:
.cfi_escape 0x2e, 0x00
movl %eax, %edi
movl %eax, %ebp
callq hipGetErrorString
.Ltmp18:
# %bb.16: # %.noexc17
movl %ebp, %r9d
.cfi_escape 0x2e, 0x00
movl $.L.str.2, %esi
movl $.L.str, %ecx
movq %r14, %rdi
movq %rax, %rdx
movl $62, %r8d
.LBB1_8: # %.noexc13
movl %r9d, %ebx
xorl %eax, %eax
callq fprintf
.cfi_escape 0x2e, 0x00
movl %ebx, %edi
callq exit
.LBB1_18:
.Ltmp4:
jmp .LBB1_19
.LBB1_20:
.Ltmp19:
.LBB1_19: # %_ZNSt6vectorIdSaIdEED2Ev.exit20
movq %rax, %r14
.cfi_escape 0x2e, 0x00
movq %rbx, %rdi
callq _ZdlPv
.cfi_escape 0x2e, 0x00
movq %r14, %rdi
callq _Unwind_Resume@PLT
.Lfunc_end1:
.size main, .Lfunc_end1-main
.cfi_endproc
.section .gcc_except_table,"a",@progbits
.p2align 2, 0x0
GCC_except_table1:
.Lexception0:
.byte 255 # @LPStart Encoding = omit
.byte 255 # @TType Encoding = omit
.byte 1 # Call site Encoding = uleb128
.uleb128 .Lcst_end0-.Lcst_begin0
.Lcst_begin0:
.uleb128 .Lfunc_begin0-.Lfunc_begin0 # >> Call Site 1 <<
.uleb128 .Ltmp0-.Lfunc_begin0 # Call between .Lfunc_begin0 and .Ltmp0
.byte 0 # has no landing pad
.byte 0 # On action: cleanup
.uleb128 .Ltmp0-.Lfunc_begin0 # >> Call Site 2 <<
.uleb128 .Ltmp3-.Ltmp0 # Call between .Ltmp0 and .Ltmp3
.uleb128 .Ltmp4-.Lfunc_begin0 # jumps to .Ltmp4
.byte 0 # On action: cleanup
.uleb128 .Ltmp5-.Lfunc_begin0 # >> Call Site 3 <<
.uleb128 .Ltmp18-.Ltmp5 # Call between .Ltmp5 and .Ltmp18
.uleb128 .Ltmp19-.Lfunc_begin0 # jumps to .Ltmp19
.byte 0 # On action: cleanup
.uleb128 .Ltmp18-.Lfunc_begin0 # >> Call Site 4 <<
.uleb128 .Lfunc_end1-.Ltmp18 # Call between .Ltmp18 and .Lfunc_end1
.byte 0 # has no landing pad
.byte 0 # On action: cleanup
.Lcst_end0:
.p2align 2, 0x0
# -- End function
.text
.p2align 4, 0x90 # -- Begin function __hip_module_ctor
.type __hip_module_ctor,@function
__hip_module_ctor: # @__hip_module_ctor
.cfi_startproc
# %bb.0:
subq $40, %rsp
.cfi_def_cfa_offset 48
cmpq $0, __hip_gpubin_handle(%rip)
jne .LBB2_2
# %bb.1:
movl $__hip_fatbin_wrapper, %edi
callq __hipRegisterFatBinary
movq %rax, __hip_gpubin_handle(%rip)
.LBB2_2:
movq __hip_gpubin_handle(%rip), %rdi
xorps %xmm0, %xmm0
movups %xmm0, 16(%rsp)
movups %xmm0, (%rsp)
movl $_Z8my_printP13__hip_texture, %esi
movl $.L__unnamed_1, %edx
movl $.L__unnamed_1, %ecx
movl $-1, %r8d
xorl %r9d, %r9d
callq __hipRegisterFunction
movl $__hip_module_dtor, %edi
addq $40, %rsp
.cfi_def_cfa_offset 8
jmp atexit # TAILCALL
.Lfunc_end2:
.size __hip_module_ctor, .Lfunc_end2-__hip_module_ctor
.cfi_endproc
# -- End function
.p2align 4, 0x90 # -- Begin function __hip_module_dtor
.type __hip_module_dtor,@function
__hip_module_dtor: # @__hip_module_dtor
.cfi_startproc
# %bb.0:
movq __hip_gpubin_handle(%rip), %rdi
testq %rdi, %rdi
je .LBB3_2
# %bb.1:
pushq %rax
.cfi_def_cfa_offset 16
callq __hipUnregisterFatBinary
movq $0, __hip_gpubin_handle(%rip)
addq $8, %rsp
.cfi_def_cfa_offset 8
.LBB3_2:
retq
.Lfunc_end3:
.size __hip_module_dtor, .Lfunc_end3-__hip_module_dtor
.cfi_endproc
# -- End function
.type _Z8my_printP13__hip_texture,@object # @_Z8my_printP13__hip_texture
.section .rodata,"a",@progbits
.globl _Z8my_printP13__hip_texture
.p2align 3, 0x0
_Z8my_printP13__hip_texture:
.quad _Z23__device_stub__my_printP13__hip_texture
.size _Z8my_printP13__hip_texture, 8
.type .L.str,@object # @.str
.section .rodata.str1.1,"aMS",@progbits,1
.L.str:
.asciz "/home/ubuntu/Datasets/stackv2/train-structured-repos-hip/Cxb1993/Matlab2CPP/master/singleGPU/heatEquation2d_textureMemory/experiments/doublePrecisionTexMem_bindless.hip"
.size .L.str, 169
.type .L.str.2,@object # @.str.2
.L.str.2:
.asciz "GPUassert: %s %s %d\n"
.size .L.str.2, 21
.type .L__unnamed_1,@object # @0
.L__unnamed_1:
.asciz "_Z8my_printP13__hip_texture"
.size .L__unnamed_1, 28
.type __hip_fatbin_wrapper,@object # @__hip_fatbin_wrapper
.section .hipFatBinSegment,"a",@progbits
.p2align 3, 0x0
__hip_fatbin_wrapper:
.long 1212764230 # 0x48495046
.long 1 # 0x1
.quad __hip_fatbin
.quad 0
.size __hip_fatbin_wrapper, 24
.type __hip_gpubin_handle,@object # @__hip_gpubin_handle
.local __hip_gpubin_handle
.comm __hip_gpubin_handle,8,8
.section .init_array,"aw",@init_array
.p2align 3, 0x0
.quad __hip_module_ctor
.type __hip_cuid_,@object # @__hip_cuid_
.bss
.globl __hip_cuid_
__hip_cuid_:
.byte 0 # 0x0
.size __hip_cuid_, 1
.section ".linker-options","e",@llvm_linker_options
.ident "AMD clang version 18.0.0git (https://github.com/RadeonOpenCompute/llvm-project roc-6.3.2 25012 e5bf7e55c91490b07c49d8960fa7983d864936c4)"
.section ".note.GNU-stack","",@progbits
.addrsig
.addrsig_sym _Z23__device_stub__my_printP13__hip_texture
.addrsig_sym __gxx_personality_v0
.addrsig_sym __hip_module_ctor
.addrsig_sym __hip_module_dtor
.addrsig_sym _Unwind_Resume
.addrsig_sym _Z8my_printP13__hip_texture
.addrsig_sym __hip_fatbin
.addrsig_sym __hip_fatbin_wrapper
.addrsig_sym __hip_cuid_ |
You are a helpful coding assistant specialized in converting from CUDA host assembly to AMD host assembly. | .file "tmpxft_0002721c_00000000-6_doublePrecisionTexMem_bindless.cudafe1.cpp"
.text
#APP
#NO_APP
.type _ZL26__cudaUnregisterBinaryUtilv, @function
_ZL26__cudaUnregisterBinaryUtilv:
.LFB2931:
.cfi_startproc
endbr64
subq $8, %rsp
.cfi_def_cfa_offset 16
movq _ZL20__cudaFatCubinHandle(%rip), %rdi
call __cudaUnregisterFatBinary@PLT
addq $8, %rsp
.cfi_def_cfa_offset 8
ret
.cfi_endproc
.LFE2931:
.size _ZL26__cudaUnregisterBinaryUtilv, .-_ZL26__cudaUnregisterBinaryUtilv
.section .rodata._Z9gpuAssert9cudaErrorPKcib.str1.1,"aMS",@progbits,1
.LC0:
.string "GPUassert: %s %s %d\n"
.section .text._Z9gpuAssert9cudaErrorPKcib,"axG",@progbits,_Z9gpuAssert9cudaErrorPKcib,comdat
.weak _Z9gpuAssert9cudaErrorPKcib
.type _Z9gpuAssert9cudaErrorPKcib, @function
_Z9gpuAssert9cudaErrorPKcib:
.LFB2927:
.cfi_startproc
endbr64
testl %edi, %edi
jne .L9
ret
.L9:
pushq %r13
.cfi_def_cfa_offset 16
.cfi_offset 13, -16
pushq %r12
.cfi_def_cfa_offset 24
.cfi_offset 12, -24
pushq %rbp
.cfi_def_cfa_offset 32
.cfi_offset 6, -32
pushq %rbx
.cfi_def_cfa_offset 40
.cfi_offset 3, -40
subq $8, %rsp
.cfi_def_cfa_offset 48
movl %edi, %ebx
movq %rsi, %r13
movl %edx, %r12d
movl %ecx, %ebp
call cudaGetErrorString@PLT
movq %rax, %rcx
movl %r12d, %r9d
movq %r13, %r8
leaq .LC0(%rip), %rdx
movl $2, %esi
movq stderr(%rip), %rdi
movl $0, %eax
call __fprintf_chk@PLT
testb %bpl, %bpl
jne .L10
addq $8, %rsp
.cfi_remember_state
.cfi_def_cfa_offset 40
popq %rbx
.cfi_def_cfa_offset 32
popq %rbp
.cfi_def_cfa_offset 24
popq %r12
.cfi_def_cfa_offset 16
popq %r13
.cfi_def_cfa_offset 8
ret
.L10:
.cfi_restore_state
movl %ebx, %edi
call exit@PLT
.cfi_endproc
.LFE2927:
.size _Z9gpuAssert9cudaErrorPKcib, .-_Z9gpuAssert9cudaErrorPKcib
.text
.globl _Z26__device_stub__Z8my_printyy
.type _Z26__device_stub__Z8my_printyy, @function
_Z26__device_stub__Z8my_printyy:
.LFB2953:
.cfi_startproc
endbr64
subq $104, %rsp
.cfi_def_cfa_offset 112
movq %rdi, 8(%rsp)
movq %fs:40, %rax
movq %rax, 88(%rsp)
xorl %eax, %eax
leaq 8(%rsp), %rax
movq %rax, 80(%rsp)
movl $1, 32(%rsp)
movl $1, 36(%rsp)
movl $1, 40(%rsp)
movl $1, 44(%rsp)
movl $1, 48(%rsp)
movl $1, 52(%rsp)
leaq 24(%rsp), %rcx
leaq 16(%rsp), %rdx
leaq 44(%rsp), %rsi
leaq 32(%rsp), %rdi
call __cudaPopCallConfiguration@PLT
testl %eax, %eax
je .L15
.L11:
movq 88(%rsp), %rax
subq %fs:40, %rax
jne .L16
addq $104, %rsp
.cfi_remember_state
.cfi_def_cfa_offset 8
ret
.L15:
.cfi_restore_state
pushq 24(%rsp)
.cfi_def_cfa_offset 120
pushq 24(%rsp)
.cfi_def_cfa_offset 128
leaq 96(%rsp), %r9
movq 60(%rsp), %rcx
movl 68(%rsp), %r8d
movq 48(%rsp), %rsi
movl 56(%rsp), %edx
leaq _Z8my_printy(%rip), %rdi
call cudaLaunchKernel@PLT
addq $16, %rsp
.cfi_def_cfa_offset 112
jmp .L11
.L16:
call __stack_chk_fail@PLT
.cfi_endproc
.LFE2953:
.size _Z26__device_stub__Z8my_printyy, .-_Z26__device_stub__Z8my_printyy
.globl _Z8my_printy
.type _Z8my_printy, @function
_Z8my_printy:
.LFB2954:
.cfi_startproc
endbr64
subq $8, %rsp
.cfi_def_cfa_offset 16
call _Z26__device_stub__Z8my_printyy
addq $8, %rsp
.cfi_def_cfa_offset 8
ret
.cfi_endproc
.LFE2954:
.size _Z8my_printy, .-_Z8my_printy
.section .rodata.str1.8,"aMS",@progbits,1
.align 8
.LC2:
.string "/home/ubuntu/Datasets/stackv2/train-structured/Cxb1993/Matlab2CPP/master/singleGPU/heatEquation2d_textureMemory/experiments/doublePrecisionTexMem_bindless.cu"
.text
.globl main
.type main, @function
main:
.LFB2928:
.cfi_startproc
.cfi_personality 0x9b,DW.ref.__gxx_personality_v0
.cfi_lsda 0x1b,.LLSDA2928
endbr64
pushq %rbp
.cfi_def_cfa_offset 16
.cfi_offset 6, -16
pushq %rbx
.cfi_def_cfa_offset 24
.cfi_offset 3, -24
subq $200, %rsp
.cfi_def_cfa_offset 224
movq %fs:40, %rax
movq %rax, 184(%rsp)
xorl %eax, %eax
movl $400, %edi
.LEHB0:
call _Znwm@PLT
.LEHE0:
movq %rax, %rbx
leaq 400(%rax), %rdx
movsd .LC1(%rip), %xmm0
.L20:
movsd %xmm0, (%rax)
addq $8, %rax
cmpq %rdx, %rax
jne .L20
leaq 8(%rsp), %rdi
movl $400, %esi
.LEHB1:
call cudaMalloc@PLT
movl $1, %ecx
movl $400, %edx
movq %rbx, %rsi
movq 8(%rsp), %rdi
call cudaMemcpy@PLT
leaq 112(%rsp), %rdx
pxor %xmm0, %xmm0
movups %xmm0, 116(%rsp)
movups %xmm0, 132(%rsp)
movups %xmm0, 148(%rsp)
movups %xmm0, 164(%rsp)
movl $0, 180(%rsp)
movl $1, 112(%rsp)
leaq 48(%rsp), %rsi
movups %xmm0, 52(%rsp)
movups %xmm0, 68(%rsp)
movups %xmm0, 84(%rsp)
movups %xmm0, 96(%rsp)
movl $2, 48(%rsp)
movq 8(%rsp), %rax
movq %rax, 56(%rsp)
movq $400, 88(%rsp)
movl $1, 80(%rsp)
movl $32, 64(%rsp)
movl $32, 68(%rsp)
leaq 16(%rsp), %rdi
movl $0, %ecx
call cudaCreateTextureObject@PLT
movl %eax, %edi
movl $1, %ecx
movl $56, %edx
leaq .LC2(%rip), %rsi
call _Z9gpuAssert9cudaErrorPKcib
movl $1, 36(%rsp)
movl $1, 40(%rsp)
movl $1, 24(%rsp)
movl $1, 28(%rsp)
movl $0, %r9d
movl $0, %r8d
movq 36(%rsp), %rdx
movl $1, %ecx
movq 24(%rsp), %rdi
movl $1, %esi
call __cudaPushCallConfiguration@PLT
testl %eax, %eax
jne .L21
movq 16(%rsp), %rdi
call _Z26__device_stub__Z8my_printyy
.L21:
call cudaDeviceSynchronize@PLT
movl %eax, %edi
movl $1, %ecx
movl $60, %edx
leaq .LC2(%rip), %rsi
call _Z9gpuAssert9cudaErrorPKcib
.LEHE1:
movl $400, %esi
movq %rbx, %rdi
call _ZdlPvm@PLT
movq 184(%rsp), %rax
subq %fs:40, %rax
jne .L29
movl $0, %eax
addq $200, %rsp
.cfi_remember_state
.cfi_def_cfa_offset 24
popq %rbx
.cfi_def_cfa_offset 16
popq %rbp
.cfi_def_cfa_offset 8
ret
.L25:
.cfi_restore_state
endbr64
movq %rax, %rbp
movl $400, %esi
movq %rbx, %rdi
call _ZdlPvm@PLT
movq 184(%rsp), %rax
subq %fs:40, %rax
je .L23
call __stack_chk_fail@PLT
.L23:
movq %rbp, %rdi
.LEHB2:
call _Unwind_Resume@PLT
.LEHE2:
.L29:
call __stack_chk_fail@PLT
.cfi_endproc
.LFE2928:
.globl __gxx_personality_v0
.section .gcc_except_table,"a",@progbits
.LLSDA2928:
.byte 0xff
.byte 0xff
.byte 0x1
.uleb128 .LLSDACSE2928-.LLSDACSB2928
.LLSDACSB2928:
.uleb128 .LEHB0-.LFB2928
.uleb128 .LEHE0-.LEHB0
.uleb128 0
.uleb128 0
.uleb128 .LEHB1-.LFB2928
.uleb128 .LEHE1-.LEHB1
.uleb128 .L25-.LFB2928
.uleb128 0
.uleb128 .LEHB2-.LFB2928
.uleb128 .LEHE2-.LEHB2
.uleb128 0
.uleb128 0
.LLSDACSE2928:
.text
.size main, .-main
.section .rodata.str1.1,"aMS",@progbits,1
.LC4:
.string "_Z8my_printy"
.text
.type _ZL24__sti____cudaRegisterAllv, @function
_ZL24__sti____cudaRegisterAllv:
.LFB2956:
.cfi_startproc
endbr64
subq $8, %rsp
.cfi_def_cfa_offset 16
leaq _ZL15__fatDeviceText(%rip), %rdi
call __cudaRegisterFatBinary@PLT
movq %rax, %rdi
movq %rax, _ZL20__cudaFatCubinHandle(%rip)
pushq $0
.cfi_def_cfa_offset 24
pushq $0
.cfi_def_cfa_offset 32
pushq $0
.cfi_def_cfa_offset 40
pushq $0
.cfi_def_cfa_offset 48
movl $0, %r9d
movl $-1, %r8d
leaq .LC4(%rip), %rdx
movq %rdx, %rcx
leaq _Z8my_printy(%rip), %rsi
call __cudaRegisterFunction@PLT
addq $32, %rsp
.cfi_def_cfa_offset 16
movq _ZL20__cudaFatCubinHandle(%rip), %rdi
call __cudaRegisterFatBinaryEnd@PLT
leaq _ZL26__cudaUnregisterBinaryUtilv(%rip), %rdi
call atexit@PLT
addq $8, %rsp
.cfi_def_cfa_offset 8
ret
.cfi_endproc
.LFE2956:
.size _ZL24__sti____cudaRegisterAllv, .-_ZL24__sti____cudaRegisterAllv
.section .init_array,"aw"
.align 8
.quad _ZL24__sti____cudaRegisterAllv
.section .nvFatBinSegment,"aw"
.align 8
.type _ZL15__fatDeviceText, @object
.size _ZL15__fatDeviceText, 24
_ZL15__fatDeviceText:
.long 1180844977
.long 1
.quad fatbinData
.quad 0
.local _ZL20__cudaFatCubinHandle
.comm _ZL20__cudaFatCubinHandle,8,8
.section .rodata.cst8,"aM",@progbits,8
.align 8
.LC1:
.long 1717986918
.long 1071015526
.hidden DW.ref.__gxx_personality_v0
.weak DW.ref.__gxx_personality_v0
.section .data.rel.local.DW.ref.__gxx_personality_v0,"awG",@progbits,DW.ref.__gxx_personality_v0,comdat
.align 8
.type DW.ref.__gxx_personality_v0, @object
.size DW.ref.__gxx_personality_v0, 8
DW.ref.__gxx_personality_v0:
.quad __gxx_personality_v0
.ident "GCC: (Ubuntu 13.3.0-6ubuntu2~24.04) 13.3.0"
.section .note.GNU-stack,"",@progbits
.section .note.gnu.property,"a"
.align 8
.long 1f - 0f
.long 4f - 1f
.long 5
0:
.string "GNU"
1:
.align 8
.long 0xc0000002
.long 3f - 2f
2:
.long 0x3
3:
.align 8
4: | .text
.file "doublePrecisionTexMem_bindless.hip"
.globl _Z23__device_stub__my_printP13__hip_texture # -- Begin function _Z23__device_stub__my_printP13__hip_texture
.p2align 4, 0x90
.type _Z23__device_stub__my_printP13__hip_texture,@function
_Z23__device_stub__my_printP13__hip_texture: # @_Z23__device_stub__my_printP13__hip_texture
.cfi_startproc
# %bb.0:
subq $72, %rsp
.cfi_def_cfa_offset 80
movq %rdi, 64(%rsp)
leaq 64(%rsp), %rax
movq %rax, (%rsp)
leaq 48(%rsp), %rdi
leaq 32(%rsp), %rsi
leaq 24(%rsp), %rdx
leaq 16(%rsp), %rcx
callq __hipPopCallConfiguration
movq 48(%rsp), %rsi
movl 56(%rsp), %edx
movq 32(%rsp), %rcx
movl 40(%rsp), %r8d
movq %rsp, %r9
movl $_Z8my_printP13__hip_texture, %edi
pushq 16(%rsp)
.cfi_adjust_cfa_offset 8
pushq 32(%rsp)
.cfi_adjust_cfa_offset 8
callq hipLaunchKernel
addq $88, %rsp
.cfi_adjust_cfa_offset -88
retq
.Lfunc_end0:
.size _Z23__device_stub__my_printP13__hip_texture, .Lfunc_end0-_Z23__device_stub__my_printP13__hip_texture
.cfi_endproc
# -- End function
.globl main # -- Begin function main
.p2align 4, 0x90
.type main,@function
main: # @main
.Lfunc_begin0:
.cfi_startproc
.cfi_personality 3, __gxx_personality_v0
.cfi_lsda 3, .Lexception0
# %bb.0: # %.noexc
pushq %rbp
.cfi_def_cfa_offset 16
pushq %r14
.cfi_def_cfa_offset 24
pushq %rbx
.cfi_def_cfa_offset 32
subq $224, %rsp
.cfi_def_cfa_offset 256
.cfi_offset %rbx, -32
.cfi_offset %r14, -24
.cfi_offset %rbp, -16
.cfi_escape 0x2e, 0x00
movl $400, %edi # imm = 0x190
callq _Znwm
movq %rax, %rbx
xorl %eax, %eax
movabsq $4599976659396224614, %rcx # imm = 0x3FD6666666666666
.p2align 4, 0x90
.LBB1_1: # %.lr.ph.i.i.i.i.i.i.i.i.i
# =>This Inner Loop Header: Depth=1
movq %rcx, (%rbx,%rax)
addq $8, %rax
cmpq $400, %rax # imm = 0x190
jne .LBB1_1
# %bb.2: # %_ZNSt6vectorIdSaIdEEC2EmRKdRKS0_.exit
.Ltmp0:
.cfi_escape 0x2e, 0x00
leaq 8(%rsp), %rdi
movl $400, %esi # imm = 0x190
callq hipMalloc
.Ltmp1:
# %bb.3: # %_ZL9hipMallocIdE10hipError_tPPT_m.exit
movq 8(%rsp), %rdi
.Ltmp2:
.cfi_escape 0x2e, 0x00
movl $400, %edx # imm = 0x190
movq %rbx, %rsi
movl $1, %ecx
callq hipMemcpy
.Ltmp3:
# %bb.4:
xorps %xmm0, %xmm0
movaps %xmm0, 160(%rsp)
movaps %xmm0, 176(%rsp)
movaps %xmm0, 208(%rsp)
movaps %xmm0, 192(%rsp)
movl $1, 160(%rsp)
movl $0, 176(%rsp)
movaps %xmm0, 96(%rsp)
movaps %xmm0, 128(%rsp)
movaps %xmm0, 112(%rsp)
movaps %xmm0, 144(%rsp)
movl $2, 96(%rsp)
movq 8(%rsp), %rax
movq %rax, 104(%rsp)
movq $400, 136(%rsp) # imm = 0x190
movl $1, 128(%rsp)
movabsq $137438953504, %rax # imm = 0x2000000020
movq %rax, 112(%rsp)
.Ltmp5:
.cfi_escape 0x2e, 0x00
leaq 32(%rsp), %rdi
leaq 96(%rsp), %rsi
leaq 160(%rsp), %rdx
xorl %ecx, %ecx
callq hipCreateTextureObject
.Ltmp6:
# %bb.5:
testl %eax, %eax
jne .LBB1_6
# %bb.9: # %_Z9gpuAssert10hipError_tPKcib.exit
.Ltmp9:
.cfi_escape 0x2e, 0x00
movabsq $4294967297, %rdi # imm = 0x100000001
movl $1, %esi
movq %rdi, %rdx
movl $1, %ecx
xorl %r8d, %r8d
xorl %r9d, %r9d
callq __hipPushCallConfiguration
.Ltmp10:
# %bb.10:
testl %eax, %eax
jne .LBB1_13
# %bb.11:
movq 32(%rsp), %rax
movq %rax, 88(%rsp)
leaq 88(%rsp), %rax
movq %rax, 16(%rsp)
.Ltmp11:
.cfi_escape 0x2e, 0x00
leaq 72(%rsp), %rdi
leaq 56(%rsp), %rsi
leaq 48(%rsp), %rdx
leaq 40(%rsp), %rcx
callq __hipPopCallConfiguration
.Ltmp12:
# %bb.12: # %.noexc14
movq 72(%rsp), %rsi
movl 80(%rsp), %edx
movq 56(%rsp), %rcx
movl 64(%rsp), %r8d
.Ltmp13:
.cfi_escape 0x2e, 0x10
leaq 16(%rsp), %r9
movl $_Z8my_printP13__hip_texture, %edi
pushq 40(%rsp)
.cfi_adjust_cfa_offset 8
pushq 56(%rsp)
.cfi_adjust_cfa_offset 8
callq hipLaunchKernel
addq $16, %rsp
.cfi_adjust_cfa_offset -16
.Ltmp14:
.LBB1_13:
.Ltmp15:
.cfi_escape 0x2e, 0x00
callq hipDeviceSynchronize
.Ltmp16:
# %bb.14:
testl %eax, %eax
jne .LBB1_15
# %bb.17: # %_Z9gpuAssert10hipError_tPKcib.exit18
.cfi_escape 0x2e, 0x00
movq %rbx, %rdi
callq _ZdlPv
xorl %eax, %eax
addq $224, %rsp
.cfi_def_cfa_offset 32
popq %rbx
.cfi_def_cfa_offset 24
popq %r14
.cfi_def_cfa_offset 16
popq %rbp
.cfi_def_cfa_offset 8
retq
.LBB1_6:
.cfi_def_cfa_offset 256
movq stderr(%rip), %r14
.Ltmp7:
.cfi_escape 0x2e, 0x00
movl %eax, %edi
movl %eax, %ebp
callq hipGetErrorString
.Ltmp8:
# %bb.7: # %.noexc13
movl %ebp, %r9d
.cfi_escape 0x2e, 0x00
movl $.L.str.2, %esi
movl $.L.str, %ecx
movq %r14, %rdi
movq %rax, %rdx
movl $58, %r8d
jmp .LBB1_8
.LBB1_15:
movq stderr(%rip), %r14
.Ltmp17:
.cfi_escape 0x2e, 0x00
movl %eax, %edi
movl %eax, %ebp
callq hipGetErrorString
.Ltmp18:
# %bb.16: # %.noexc17
movl %ebp, %r9d
.cfi_escape 0x2e, 0x00
movl $.L.str.2, %esi
movl $.L.str, %ecx
movq %r14, %rdi
movq %rax, %rdx
movl $62, %r8d
.LBB1_8: # %.noexc13
movl %r9d, %ebx
xorl %eax, %eax
callq fprintf
.cfi_escape 0x2e, 0x00
movl %ebx, %edi
callq exit
.LBB1_18:
.Ltmp4:
jmp .LBB1_19
.LBB1_20:
.Ltmp19:
.LBB1_19: # %_ZNSt6vectorIdSaIdEED2Ev.exit20
movq %rax, %r14
.cfi_escape 0x2e, 0x00
movq %rbx, %rdi
callq _ZdlPv
.cfi_escape 0x2e, 0x00
movq %r14, %rdi
callq _Unwind_Resume@PLT
.Lfunc_end1:
.size main, .Lfunc_end1-main
.cfi_endproc
.section .gcc_except_table,"a",@progbits
.p2align 2, 0x0
GCC_except_table1:
.Lexception0:
.byte 255 # @LPStart Encoding = omit
.byte 255 # @TType Encoding = omit
.byte 1 # Call site Encoding = uleb128
.uleb128 .Lcst_end0-.Lcst_begin0
.Lcst_begin0:
.uleb128 .Lfunc_begin0-.Lfunc_begin0 # >> Call Site 1 <<
.uleb128 .Ltmp0-.Lfunc_begin0 # Call between .Lfunc_begin0 and .Ltmp0
.byte 0 # has no landing pad
.byte 0 # On action: cleanup
.uleb128 .Ltmp0-.Lfunc_begin0 # >> Call Site 2 <<
.uleb128 .Ltmp3-.Ltmp0 # Call between .Ltmp0 and .Ltmp3
.uleb128 .Ltmp4-.Lfunc_begin0 # jumps to .Ltmp4
.byte 0 # On action: cleanup
.uleb128 .Ltmp5-.Lfunc_begin0 # >> Call Site 3 <<
.uleb128 .Ltmp18-.Ltmp5 # Call between .Ltmp5 and .Ltmp18
.uleb128 .Ltmp19-.Lfunc_begin0 # jumps to .Ltmp19
.byte 0 # On action: cleanup
.uleb128 .Ltmp18-.Lfunc_begin0 # >> Call Site 4 <<
.uleb128 .Lfunc_end1-.Ltmp18 # Call between .Ltmp18 and .Lfunc_end1
.byte 0 # has no landing pad
.byte 0 # On action: cleanup
.Lcst_end0:
.p2align 2, 0x0
# -- End function
.text
.p2align 4, 0x90 # -- Begin function __hip_module_ctor
.type __hip_module_ctor,@function
__hip_module_ctor: # @__hip_module_ctor
.cfi_startproc
# %bb.0:
subq $40, %rsp
.cfi_def_cfa_offset 48
cmpq $0, __hip_gpubin_handle(%rip)
jne .LBB2_2
# %bb.1:
movl $__hip_fatbin_wrapper, %edi
callq __hipRegisterFatBinary
movq %rax, __hip_gpubin_handle(%rip)
.LBB2_2:
movq __hip_gpubin_handle(%rip), %rdi
xorps %xmm0, %xmm0
movups %xmm0, 16(%rsp)
movups %xmm0, (%rsp)
movl $_Z8my_printP13__hip_texture, %esi
movl $.L__unnamed_1, %edx
movl $.L__unnamed_1, %ecx
movl $-1, %r8d
xorl %r9d, %r9d
callq __hipRegisterFunction
movl $__hip_module_dtor, %edi
addq $40, %rsp
.cfi_def_cfa_offset 8
jmp atexit # TAILCALL
.Lfunc_end2:
.size __hip_module_ctor, .Lfunc_end2-__hip_module_ctor
.cfi_endproc
# -- End function
.p2align 4, 0x90 # -- Begin function __hip_module_dtor
.type __hip_module_dtor,@function
__hip_module_dtor: # @__hip_module_dtor
.cfi_startproc
# %bb.0:
movq __hip_gpubin_handle(%rip), %rdi
testq %rdi, %rdi
je .LBB3_2
# %bb.1:
pushq %rax
.cfi_def_cfa_offset 16
callq __hipUnregisterFatBinary
movq $0, __hip_gpubin_handle(%rip)
addq $8, %rsp
.cfi_def_cfa_offset 8
.LBB3_2:
retq
.Lfunc_end3:
.size __hip_module_dtor, .Lfunc_end3-__hip_module_dtor
.cfi_endproc
# -- End function
.type _Z8my_printP13__hip_texture,@object # @_Z8my_printP13__hip_texture
.section .rodata,"a",@progbits
.globl _Z8my_printP13__hip_texture
.p2align 3, 0x0
_Z8my_printP13__hip_texture:
.quad _Z23__device_stub__my_printP13__hip_texture
.size _Z8my_printP13__hip_texture, 8
.type .L.str,@object # @.str
.section .rodata.str1.1,"aMS",@progbits,1
.L.str:
.asciz "/home/ubuntu/Datasets/stackv2/train-structured-repos-hip/Cxb1993/Matlab2CPP/master/singleGPU/heatEquation2d_textureMemory/experiments/doublePrecisionTexMem_bindless.hip"
.size .L.str, 169
.type .L.str.2,@object # @.str.2
.L.str.2:
.asciz "GPUassert: %s %s %d\n"
.size .L.str.2, 21
.type .L__unnamed_1,@object # @0
.L__unnamed_1:
.asciz "_Z8my_printP13__hip_texture"
.size .L__unnamed_1, 28
.type __hip_fatbin_wrapper,@object # @__hip_fatbin_wrapper
.section .hipFatBinSegment,"a",@progbits
.p2align 3, 0x0
__hip_fatbin_wrapper:
.long 1212764230 # 0x48495046
.long 1 # 0x1
.quad __hip_fatbin
.quad 0
.size __hip_fatbin_wrapper, 24
.type __hip_gpubin_handle,@object # @__hip_gpubin_handle
.local __hip_gpubin_handle
.comm __hip_gpubin_handle,8,8
.section .init_array,"aw",@init_array
.p2align 3, 0x0
.quad __hip_module_ctor
.type __hip_cuid_,@object # @__hip_cuid_
.bss
.globl __hip_cuid_
__hip_cuid_:
.byte 0 # 0x0
.size __hip_cuid_, 1
.section ".linker-options","e",@llvm_linker_options
.ident "AMD clang version 18.0.0git (https://github.com/RadeonOpenCompute/llvm-project roc-6.3.2 25012 e5bf7e55c91490b07c49d8960fa7983d864936c4)"
.section ".note.GNU-stack","",@progbits
.addrsig
.addrsig_sym _Z23__device_stub__my_printP13__hip_texture
.addrsig_sym __gxx_personality_v0
.addrsig_sym __hip_module_ctor
.addrsig_sym __hip_module_dtor
.addrsig_sym _Unwind_Resume
.addrsig_sym _Z8my_printP13__hip_texture
.addrsig_sym __hip_fatbin
.addrsig_sym __hip_fatbin_wrapper
.addrsig_sym __hip_cuid_ |
You are a helpful coding assistant specialized in converting CUDA source code to CUDA device assembly. | #include <iostream>
#include <random>
#include <fstream>
#include <string>
#include <iomanip>
#include <stdlib.h>
#include <stdio.h>
#define nr 512
#define nc 512
#define Blk_H 8
#define Blk_W 8
#define stclX 1
#define stclY 1
using namespace std;
// cuda code
#define cudaCheckErrors(msg) \
do { \
cudaError_t __err = cudaGetLastError(); \
if (__err != cudaSuccess) { \
fprintf(stderr, "Fatal error: %s (%s at %s:%d)\n", \
msg, cudaGetErrorString(__err), \
__FILE__, __LINE__); \
fprintf(stderr, "*** FAILED - ABORTING\n"); \
exit(1); \
} \
} while (0)
typedef double num_col[nc];
// function declartions
void write_ouput(num_col *phi,int nx,int ny,int step,double dx,double dy);
__global__ void lap_per(num_col * mat_in, num_col * mat_out);
__global__ void calc_df(num_col * mat_in, num_col * mat_out);
__global__ void update_phi(num_col * mat_in, num_col * mat_out);
int main(){
// declare simulation variables
int step;
int steps = 10000;
int skip = 1000;
int ny = nr;
int nx = nc;
double dx = 1.0;
double dy = 1.0;
double phi0 = 0.0;
num_col * phi;
num_col * df;
num_col * d_phi;
num_col * d_df;
int size = nx*ny*sizeof(double);
// allocate resources for phi and df on cpu
phi = (num_col*) malloc(size);
df = (num_col*) malloc(size);
// allocate memory on gpu
cudaMalloc((void**) &d_phi,size);
cudaCheckErrors("cudaMalloc fail");
cudaMalloc((void**) &d_df,size);
cudaCheckErrors("cudaMalloc fail");
// clean up output files from previous runs
// system("rm fluid*");
// random number stuff
default_random_engine generator;
uniform_real_distribution<double> ran(-1.0,1.0);
// initialize system
for (int i=0; i<nx;i++){
for (int j=0; j<ny;j++){
phi[i][j] = phi0 + 0.1*ran(generator);
}
}
// write initial condition output file
write_ouput(phi,nx,ny,1,dx,dy);
// evolve the system using finite difference to
// solve the CH equation
// copy data to the gpu
cudaMemcpy(d_phi,phi,size,cudaMemcpyHostToDevice);
cudaCheckErrors("cudaMemcpy H2D fail");
cudaMemcpy(d_df,df,size,cudaMemcpyHostToDevice);
cudaCheckErrors("cudaMemcpy H2D fail");
// get grid and block size
dim3 threadsPerBlock(Blk_H,Blk_W);
dim3 numBlocks( (nr + Blk_H - 1)/threadsPerBlock.x, (nc + Blk_W - 1)/threadsPerBlock.x );
for (step = 1; step <= steps; step++){
// pass the number crunching off to the gpu
// calculate the laplacian of phi and store in df
lap_per<<<numBlocks,threadsPerBlock>>>(d_phi,d_df);
cudaDeviceSynchronize();
cudaCheckErrors("cuda kernel fail");
// caclulate df and store in df
calc_df<<<numBlocks,threadsPerBlock>>>(d_phi,d_df);
cudaDeviceSynchronize();
cudaCheckErrors("cuda kernel fail");
// calculate the laplacian of df and update phi
update_phi<<<numBlocks,threadsPerBlock>>>(d_df,d_phi);
cudaDeviceSynchronize();
cudaCheckErrors("cuda kernel fail");
// write output
if (step%skip == 0){
// get phi from gpu
cudaMemcpyAsync(phi,d_phi,size,cudaMemcpyDeviceToHost);
cudaCheckErrors("cudaMemcpy D2H fail");
write_ouput(phi,nx,ny,step,dx,dy);
}
}
// clean up on device
cudaFree(d_phi);
cudaFree(d_df);
return 0;
}
// function definitions
__global__ void lap_per(num_col * mat_in, num_col * mat_out){
int i = blockIdx.x * blockDim.x + threadIdx.x;
int j = blockIdx.y * blockDim.y + threadIdx.y;
int is,in,je,jw;
int ii,jj,iis,iin,jje,jjw;
__shared__ double d2x,d2y;
if (i < nc && j < nr ){
// get neighbors for stencil for the bulk case
is = i - 1;
in = i + 1;
je = j + 1;
jw = j - 1;
// apply periodic boundary conditions
// south boundary
if (i == 0) is = nr - 1;
// north boundary
if (i == (nr-1)) in = 0;
// west boundary
if (j == 0) jw = nc - 1;
// east boundary
if (j == (nc-1)) je = 0;
// shared memory neighbor indices
ii = threadIdx.x + stclX;
jj = threadIdx.y + stclY;
iin = ii + 1;
iis = ii - 1;
jje = jj + 1;
jjw = jj - 1;
// sync all the threads in the block up to this point
__syncthreads();
// memory optimization using shared memory
__shared__ double smem[(Blk_H + 2*stclX)][(Blk_W + 2*stclY)];
smem[ii][jj] = mat_in[i][j];
// load north side of stencil
if (threadIdx.x > (Blk_H - 2*stclX)){
smem[ii + stclX][jj] = mat_in[in][j];
}
// load south side of stencil
if (threadIdx.x == 0){
smem[ii - stclX][jj] = mat_in[is][j];
}
// load east side of stencil
if (threadIdx.y > (Blk_W - 2*stclY)){
smem[ii][jj + stclY] = mat_in[i][je];
}
// load west side of stencil
if (threadIdx.y == 0){
smem[ii][jj - stclY] = mat_in[i][jw];
}
// sync threads to ensure all data is loaded into shared memory
__syncthreads();
// calculate 2D laplacian approximation (assume dx and dy = 1.0)
d2y = smem[iis][jj] + smem[iin][jj] - 2.0*smem[ii][jj];
d2x = smem[ii][jjw] + smem[ii][jje] - 2.0*smem[ii][jj];
mat_out[i][j] = d2x + d2y;
}
}
__global__ void calc_df(num_col * mat_in, num_col * mat_out){
int i = blockIdx.x * blockDim.x + threadIdx.x;
int j = blockIdx.y * blockDim.y + threadIdx.y;
int ii = threadIdx.x;
int jj = threadIdx.y;
if (i < nc && j < nr ){
// memory optimization using shared memory
__shared__ double smem[(Blk_H)][(Blk_W)];
smem[ii][jj] = mat_in[i][j];
// calulate df[i][j] noting that it currently stores the laplacian of phi
// also assume kappa=1.0
mat_out[i][j] = -1.0*mat_out[i][j] + smem[ii][jj]*smem[ii][jj]*smem[ii][jj] - smem[ii][jj];
}
}
__global__ void update_phi(num_col * mat_in, num_col * mat_out){
int i = blockIdx.x * blockDim.x + threadIdx.x;
int j = blockIdx.y * blockDim.y + threadIdx.y;
int is,in,je,jw;
int ii,jj,iis,iin,jje,jjw;
__shared__ double d2x,d2y,dt;
dt = 0.01;
if (i < nc && j < nr ){
// get neighbors for stencil for the bulk case
is = i - 1;
in = i + 1;
je = j + 1;
jw = j - 1;
// apply periodic boundary conditions
// left boundary
if (i == 0) is = nr - 1;
// right boundary
if (i == (nr-1)) in = 0;
// bottom boundary
if (j == 0) jw = nc - 1;
// top boundary
if (j == (nc-1)) je = 0;
// shared memory neighbor indices
ii = threadIdx.x + stclX;
jj = threadIdx.y + stclY;
iin = ii + 1;
iis = ii - 1;
jje = jj + 1;
jjw = jj - 1;
// sync all the threads in the block up to this point
__syncthreads();
// memory optimization using shared memory
__shared__ double smem[(Blk_H + 2*stclX)][(Blk_W + 2*stclY)];
smem[ii][jj] = mat_in[i][j];
// load north side of stencil
if (threadIdx.x > (Blk_H - 2*stclX)){
smem[ii + stclX][jj] = mat_in[in][j];
}
// load south side of stencil
if (threadIdx.x == 0){
smem[ii - stclX][jj] = mat_in[is][j];
}
// load east side of stencil
if (threadIdx.y > (Blk_W - 2*stclY)){
smem[ii][jj + stclY] = mat_in[i][je];
}
// load west side of stencil
if (threadIdx.y == 0){
smem[ii][jj - stclY] = mat_in[i][jw];
}
// sync threads to ensure all data is loaded into shared memory
__syncthreads();
// calculate 2D laplacian approximation (assume dx and dy = 1.0)
d2y = smem[iis][jj] + smem[iin][jj] - 2.0*smem[ii][jj];
d2x = smem[ii][jjw] + smem[ii][jje] - 2.0*smem[ii][jj];
mat_out[i][j] = mat_out[i][j] + dt*(d2x + d2y);
}
}
void write_ouput(num_col *phi,int nx,int ny,int step,double dx,double dy)
{
string filename = to_string(step);
filename = "fluid_" + filename + ".vtk";
string d = " ";
ofstream outf(filename);
// If we couldn't open the output file stream for writing
if (!outf)
{
// Print an error and exit
cerr << "could not open output file for reading!" << endl;
exit(1);
}
// write file header
outf << "# vtk DataFile Version 3.1" << endl;
outf << "VTK file containing grid data" << endl;
outf << "ASCII" << endl;
outf << endl;
outf << "DATASET STRUCTURED_POINTS" << endl;
outf << "DIMENSIONS" << d<< nx << d << ny << " 1" << endl;
outf << "ORIGIN 1 1 1" << endl;
outf << "SPACING 1.0 1.0 1.0" << endl;
outf << endl;
outf << "POINT_DATA " << nx*ny << endl;
outf << "SCALARS Phi float" << endl;
outf << "LOOKUP_TABLE default" << endl;
// write out the values of phi
for (int i=0; i<nx;i++){
for (int j=0; j<ny;j++){
outf << setw(16) << phi[i][j] << endl;
}
}
} | code for sm_80
Function : _Z10update_phiPA512_dS0_
.headerflags @"EF_CUDA_TEXMODE_UNIFIED EF_CUDA_64BIT_ADDRESS EF_CUDA_SM80 EF_CUDA_VIRTUAL_SM(EF_CUDA_SM80)"
/*0000*/ IMAD.MOV.U32 R1, RZ, RZ, c[0x0][0x28] ; /* 0x00000a00ff017624 */
/* 0x000fe400078e00ff */
/*0010*/ S2R R0, SR_CTAID.Y ; /* 0x0000000000007919 */
/* 0x000e280000002600 */
/*0020*/ S2R R13, SR_TID.Y ; /* 0x00000000000d7919 */
/* 0x000e280000002200 */
/*0030*/ S2R R17, SR_CTAID.X ; /* 0x0000000000117919 */
/* 0x000e680000002500 */
/*0040*/ S2R R14, SR_TID.X ; /* 0x00000000000e7919 */
/* 0x000e620000002100 */
/*0050*/ IMAD R0, R0, c[0x0][0x4], R13 ; /* 0x0000010000007a24 */
/* 0x001fca00078e020d */
/*0060*/ ISETP.GT.AND P0, PT, R0, 0x1ff, PT ; /* 0x000001ff0000780c */
/* 0x000fe20003f04270 */
/*0070*/ IMAD R17, R17, c[0x0][0x0], R14 ; /* 0x0000000011117a24 */
/* 0x002fca00078e020e */
/*0080*/ ISETP.GT.OR P0, PT, R17, 0x1ff, P0 ; /* 0x000001ff1100780c */
/* 0x000fda0000704670 */
/*0090*/ @P0 EXIT ; /* 0x000000000000094d */
/* 0x000fea0003800000 */
/*00a0*/ ISETP.GE.U32.AND P0, PT, R13.reuse, 0x7, PT ; /* 0x000000070d00780c */
/* 0x040fe20003f06070 */
/*00b0*/ BAR.SYNC.DEFER_BLOCKING 0x0 ; /* 0x0000000000007b1d */
/* 0x000fe20000010000 */
/*00c0*/ ISETP.GE.U32.AND P2, PT, R14.reuse, 0x7, PT ; /* 0x000000070e00780c */
/* 0x040fe20003f46070 */
/*00d0*/ IMAD.MOV.U32 R7, RZ, RZ, 0x1000 ; /* 0x00001000ff077424 */
/* 0x000fe200078e00ff */
/*00e0*/ ISETP.NE.AND P1, PT, R14, RZ, PT ; /* 0x000000ff0e00720c */
/* 0x000fe40003f25270 */
/*00f0*/ SHF.R.S32.HI R12, RZ, 0x1f, R17 ; /* 0x0000001fff0c7819 */
/* 0x000fe20000011411 */
/*0100*/ ULDC.64 UR4, c[0x0][0x118] ; /* 0x0000460000047ab9 */
/* 0x000fe20000000a00 */
/*0110*/ ISETP.NE.AND P3, PT, R13, RZ, PT ; /* 0x000000ff0d00720c */
/* 0x000fca0003f65270 */
/*0120*/ @P0 ISETP.NE.AND P4, PT, R0.reuse, 0x1ff, PT ; /* 0x000001ff0000080c */
/* 0x040fe40003f85270 */
/*0130*/ @P0 LEA R10, P5, R17.reuse, c[0x0][0x160], 0xc ; /* 0x00005800110a0a11 */
/* 0x040fe400078a60ff */
/*0140*/ @P0 IADD3 R2, R0, 0x1, RZ ; /* 0x0000000100020810 */
/* 0x000fe40007ffe0ff */
/*0150*/ @P0 LEA.HI.X R11, R17.reuse, c[0x0][0x164], R12, 0xc, P5 ; /* 0x00005900110b0a11 */
/* 0x040fe400028f640c */
/*0160*/ @P0 SEL R3, R2, RZ, P4 ; /* 0x000000ff02030207 */
/* 0x000fe40002000000 */
/*0170*/ @P2 ISETP.NE.AND P6, PT, R17, 0x1ff, PT ; /* 0x000001ff1100280c */
/* 0x000fc40003fc5270 */
/*0180*/ @P2 IADD3 R2, R17, 0x1, RZ ; /* 0x0000000111022810 */
/* 0x000fe20007ffe0ff */
/*0190*/ @P0 IMAD.WIDE R10, R3, 0x8, R10 ; /* 0x00000008030a0825 */
/* 0x000fe200078e020a */
/*01a0*/ @!P1 ISETP.NE.AND P5, PT, R17.reuse, RZ, PT ; /* 0x000000ff1100920c */
/* 0x040fe40003fa5270 */
/*01b0*/ @!P1 IADD3 R3, R17, -0x1, RZ ; /* 0xffffffff11039810 */
/* 0x000fe40007ffe0ff */
/*01c0*/ @P2 SEL R4, R2, RZ, P6 ; /* 0x000000ff02042207 */
/* 0x000fe20003000000 */
/*01d0*/ @P0 LDG.E.64 R10, [R10.64] ; /* 0x000000040a0a0981 */
/* 0x000ea2000c1e1b00 */
/*01e0*/ @!P1 SEL R6, R3, 0x1ff, P5 ; /* 0x000001ff03069807 */
/* 0x000fe20002800000 */
/*01f0*/ IMAD.WIDE R2, R17, R7, c[0x0][0x160] ; /* 0x0000580011027625 */
/* 0x000fe200078e0207 */
/*0200*/ @!P3 ISETP.NE.AND P4, PT, R0, RZ, PT ; /* 0x000000ff0000b20c */
/* 0x000fc40003f85270 */
/*0210*/ @!P3 IADD3 R15, R0, -0x1, RZ ; /* 0xffffffff000fb810 */
/* 0x000fe20007ffe0ff */
/*0220*/ @P2 IMAD.WIDE R4, R4, R7.reuse, c[0x0][0x160] ; /* 0x0000580004042625 */
/* 0x080fe200078e0207 */
/*0230*/ @!P3 LEA R8, P6, R17, c[0x0][0x160], 0xc ; /* 0x000058001108ba11 */
/* 0x000fe400078c60ff */
/*0240*/ @!P3 SEL R19, R15, 0x1ff, P4 ; /* 0x000001ff0f13b807 */
/* 0x000fe20002000000 */
/*0250*/ @!P1 IMAD.WIDE R6, R6, R7, c[0x0][0x160] ; /* 0x0000580006069625 */
/* 0x000fe200078e0207 */
/*0260*/ SHF.R.S32.HI R15, RZ, 0x1f, R0 ; /* 0x0000001fff0f7819 */
/* 0x000fe40000011400 */
/*0270*/ @P2 LEA R4, P4, R0.reuse, R4, 0x3 ; /* 0x0000000400042211 */
/* 0x040fe200078818ff */
/*0280*/ IMAD.WIDE R2, R0.reuse, 0x8, R2 ; /* 0x0000000800027825 */
/* 0x040fe200078e0202 */
/*0290*/ @!P1 LEA R6, P5, R0, R6, 0x3 ; /* 0x0000000600069211 */
/* 0x000fc400078a18ff */
/*02a0*/ @!P3 LEA.HI.X R9, R17, c[0x0][0x164], R12, 0xc, P6 ; /* 0x000059001109ba11 */
/* 0x000fe400030f640c */
/*02b0*/ @P2 LEA.HI.X R5, R0.reuse, R5, R15.reuse, 0x3, P4 ; /* 0x0000000500052211 */
/* 0x140fe200020f1c0f */
/*02c0*/ LDG.E.64 R2, [R2.64] ; /* 0x0000000402027981 */
/* 0x000ee2000c1e1b00 */
/*02d0*/ @!P1 LEA.HI.X R7, R0, R7, R15, 0x3, P5 ; /* 0x0000000700079211 */
/* 0x000fe200028f1c0f */
/*02e0*/ @!P3 IMAD.WIDE R8, R19, 0x8, R8 ; /* 0x000000081308b825 */
/* 0x000fc600078e0208 */
/*02f0*/ @P2 LDG.E.64 R4, [R4.64] ; /* 0x0000000404042981 */
/* 0x000f28000c1e1b00 */
/*0300*/ @!P1 LDG.E.64 R6, [R6.64] ; /* 0x0000000406069981 */
/* 0x000f68000c1e1b00 */
/*0310*/ @!P3 LDG.E.64 R8, [R8.64] ; /* 0x000000040808b981 */
/* 0x000ea2000c1e1b00 */
/*0320*/ IMAD.MOV.U32 R27, RZ, RZ, 0x50 ; /* 0x00000050ff1b7424 */
/* 0x000fe200078e00ff */
/*0330*/ LEA R19, P4, R17, c[0x0][0x168], 0xc ; /* 0x00005a0011137a11 */
/* 0x000fe200078860ff */
/*0340*/ IMAD.SHL.U32 R16, R13, 0x8, RZ ; /* 0x000000080d107824 */
/* 0x000fc400078e00ff */
/*0350*/ IMAD R27, R14, R27, 0x8 ; /* 0x000000080e1b7424 */
/* 0x000fe200078e021b */
/*0360*/ LEA.HI.X R12, R17, c[0x0][0x16c], R12, 0xc, P4 ; /* 0x00005b00110c7a11 */
/* 0x000fc600020f640c */
/*0370*/ IMAD.IADD R17, R27, 0x1, R16 ; /* 0x000000011b117824 */
/* 0x000fe200078e0210 */
/*0380*/ LEA R14, P4, R0, R19, 0x3 ; /* 0x00000013000e7211 */
/* 0x000fc800078818ff */
/*0390*/ LEA.HI.X R15, R0, R12, R15, 0x3, P4 ; /* 0x0000000c000f7211 */
/* 0x000fe200020f1c0f */
/*03a0*/ STS.64 [R17+0x58], R2 ; /* 0x0000580211007388 */
/* 0x008fe80000000a00 */
/*03b0*/ @P2 STS.64 [R17+0xa8], R4 ; /* 0x0000a80411002388 */
/* 0x010fe80000000a00 */
/*03c0*/ @!P1 STS.64 [R13.X8+0x10], R6 ; /* 0x000010060d009388 */
/* 0x020fe80000008a00 */
/*03d0*/ @P0 STS.64 [R17+0x60], R10 ; /* 0x0000600a11000388 */
/* 0x004fe80000000a00 */
/*03e0*/ @!P3 STS.64 [R27+0x50], R8 ; /* 0x000050081b00b388 */
/* 0x000fe80000000a00 */
/*03f0*/ BAR.SYNC.DEFER_BLOCKING 0x0 ; /* 0x0000000000007b1d */
/* 0x000fec0000010000 */
/*0400*/ LDG.E.64 R24, [R14.64] ; /* 0x000000040e187981 */
/* 0x000ea8000c1e1b00 */
/*0410*/ LDS.64 R18, [R17+0xa8] ; /* 0x0000a80011127984 */
/* 0x000fe80000000a00 */
/*0420*/ LDS.64 R20, [R17+0x8] ; /* 0x0000080011147984 */
/* 0x000e280000000a00 */
/*0430*/ LDS.64 R22, [R17+0x58] ; /* 0x0000580011167984 */
/* 0x000e620000000a00 */
/*0440*/ DADD R18, R18, R20 ; /* 0x0000000012127229 */
/* 0x001fc80000000014 */
/*0450*/ DADD R22, R22, R22 ; /* 0x0000000016167229 */
/* 0x002e0c0000000016 */
/*0460*/ DADD R18, R18, -R22 ; /* 0x0000000012127229 */
/* 0x001e0e0000000816 */
/*0470*/ STS.64 [RZ], R18 ; /* 0x00000012ff007388 */
/* 0x001fe80000000a00 */
/*0480*/ LDS.64 R2, [R17+0x60] ; /* 0x0000600011027984 */
/* 0x000fe80000000a00 */
/*0490*/ LDS.64 R4, [R17+0x50] ; /* 0x0000500011047984 */
/* 0x000e240000000a00 */
/*04a0*/ DADD R2, R2, R4 ; /* 0x0000000002027229 */
/* 0x001e0c0000000004 */
/*04b0*/ DADD R2, -R22, R2 ; /* 0x0000000016027229 */
/* 0x001e0c0000000102 */
/*04c0*/ DADD R2, R18, R2 ; /* 0x0000000012027229 */
/* 0x001e8c0000000002 */
/*04d0*/ DFMA R2, R2, c[0x2][0x0], R24 ; /* 0x0080000002027a2b */
/* 0x004e0e0000000018 */
/*04e0*/ STG.E.64 [R14.64], R2 ; /* 0x000000020e007986 */
/* 0x001fe2000c101b04 */
/*04f0*/ EXIT ; /* 0x000000000000794d */
/* 0x000fea0003800000 */
/*0500*/ BRA 0x500; /* 0xfffffff000007947 */
/* 0x000fc0000383ffff */
/*0510*/ NOP; /* 0x0000000000007918 */
/* 0x000fc00000000000 */
/*0520*/ NOP; /* 0x0000000000007918 */
/* 0x000fc00000000000 */
/*0530*/ NOP; /* 0x0000000000007918 */
/* 0x000fc00000000000 */
/*0540*/ NOP; /* 0x0000000000007918 */
/* 0x000fc00000000000 */
/*0550*/ NOP; /* 0x0000000000007918 */
/* 0x000fc00000000000 */
/*0560*/ NOP; /* 0x0000000000007918 */
/* 0x000fc00000000000 */
/*0570*/ NOP; /* 0x0000000000007918 */
/* 0x000fc00000000000 */
/*0580*/ NOP; /* 0x0000000000007918 */
/* 0x000fc00000000000 */
/*0590*/ NOP; /* 0x0000000000007918 */
/* 0x000fc00000000000 */
/*05a0*/ NOP; /* 0x0000000000007918 */
/* 0x000fc00000000000 */
/*05b0*/ NOP; /* 0x0000000000007918 */
/* 0x000fc00000000000 */
/*05c0*/ NOP; /* 0x0000000000007918 */
/* 0x000fc00000000000 */
/*05d0*/ NOP; /* 0x0000000000007918 */
/* 0x000fc00000000000 */
/*05e0*/ NOP; /* 0x0000000000007918 */
/* 0x000fc00000000000 */
/*05f0*/ NOP; /* 0x0000000000007918 */
/* 0x000fc00000000000 */
..........
Function : _Z7calc_dfPA512_dS0_
.headerflags @"EF_CUDA_TEXMODE_UNIFIED EF_CUDA_64BIT_ADDRESS EF_CUDA_SM80 EF_CUDA_VIRTUAL_SM(EF_CUDA_SM80)"
/*0000*/ MOV R1, c[0x0][0x28] ; /* 0x00000a0000017a02 */
/* 0x000fe40000000f00 */
/*0010*/ S2R R7, SR_CTAID.Y ; /* 0x0000000000077919 */
/* 0x000e280000002600 */
/*0020*/ S2R R0, SR_TID.Y ; /* 0x0000000000007919 */
/* 0x000e280000002200 */
/*0030*/ S2R R4, SR_CTAID.X ; /* 0x0000000000047919 */
/* 0x000e680000002500 */
/*0040*/ S2R R11, SR_TID.X ; /* 0x00000000000b7919 */
/* 0x000e620000002100 */
/*0050*/ IMAD R7, R7, c[0x0][0x4], R0 ; /* 0x0000010007077a24 */
/* 0x001fca00078e0200 */
/*0060*/ ISETP.GT.AND P0, PT, R7, 0x1ff, PT ; /* 0x000001ff0700780c */
/* 0x000fe20003f04270 */
/*0070*/ IMAD R4, R4, c[0x0][0x0], R11 ; /* 0x0000000004047a24 */
/* 0x002fca00078e020b */
/*0080*/ ISETP.GT.OR P0, PT, R4, 0x1ff, P0 ; /* 0x000001ff0400780c */
/* 0x000fda0000704670 */
/*0090*/ @P0 EXIT ; /* 0x000000000000094d */
/* 0x000fea0003800000 */
/*00a0*/ HFMA2.MMA R5, -RZ, RZ, 0, 0.00048828125 ; /* 0x00001000ff057435 */
/* 0x000fe200000001ff */
/*00b0*/ ULDC.64 UR4, c[0x0][0x118] ; /* 0x0000460000047ab9 */
/* 0x000fd20000000a00 */
/*00c0*/ IMAD.WIDE R2, R4, R5, c[0x0][0x160] ; /* 0x0000580004027625 */
/* 0x000fc800078e0205 */
/*00d0*/ IMAD.WIDE R4, R4, R5, c[0x0][0x168] ; /* 0x00005a0004047625 */
/* 0x000fc800078e0205 */
/*00e0*/ IMAD.WIDE R2, R7, 0x8, R2 ; /* 0x0000000807027825 */
/* 0x000fc800078e0202 */
/*00f0*/ IMAD.WIDE R4, R7, 0x8, R4 ; /* 0x0000000807047825 */
/* 0x000fe400078e0204 */
/*0100*/ LDG.E.64 R2, [R2.64] ; /* 0x0000000402027981 */
/* 0x000ea8000c1e1b00 */
/*0110*/ LDG.E.64 R8, [R4.64] ; /* 0x0000000404087981 */
/* 0x000ee2000c1e1b00 */
/*0120*/ LEA R11, R11, R0, 0x3 ; /* 0x000000000b0b7211 */
/* 0x000fe200078e18ff */
/*0130*/ DMUL R6, R2, R2 ; /* 0x0000000202067228 */
/* 0x004ec80000000000 */
/*0140*/ STS.64 [R11.X8], R2 ; /* 0x000000020b007388 */
/* 0x000fe40000008a00 */
/*0150*/ DFMA R6, R2, R6, -R8 ; /* 0x000000060206722b */
/* 0x008e0c0000000808 */
/*0160*/ DADD R6, -R2, R6 ; /* 0x0000000002067229 */
/* 0x001e0e0000000106 */
/*0170*/ STG.E.64 [R4.64], R6 ; /* 0x0000000604007986 */
/* 0x001fe2000c101b04 */
/*0180*/ EXIT ; /* 0x000000000000794d */
/* 0x000fea0003800000 */
/*0190*/ BRA 0x190; /* 0xfffffff000007947 */
/* 0x000fc0000383ffff */
/*01a0*/ NOP; /* 0x0000000000007918 */
/* 0x000fc00000000000 */
/*01b0*/ NOP; /* 0x0000000000007918 */
/* 0x000fc00000000000 */
/*01c0*/ NOP; /* 0x0000000000007918 */
/* 0x000fc00000000000 */
/*01d0*/ NOP; /* 0x0000000000007918 */
/* 0x000fc00000000000 */
/*01e0*/ NOP; /* 0x0000000000007918 */
/* 0x000fc00000000000 */
/*01f0*/ NOP; /* 0x0000000000007918 */
/* 0x000fc00000000000 */
/*0200*/ NOP; /* 0x0000000000007918 */
/* 0x000fc00000000000 */
/*0210*/ NOP; /* 0x0000000000007918 */
/* 0x000fc00000000000 */
/*0220*/ NOP; /* 0x0000000000007918 */
/* 0x000fc00000000000 */
/*0230*/ NOP; /* 0x0000000000007918 */
/* 0x000fc00000000000 */
/*0240*/ NOP; /* 0x0000000000007918 */
/* 0x000fc00000000000 */
/*0250*/ NOP; /* 0x0000000000007918 */
/* 0x000fc00000000000 */
/*0260*/ NOP; /* 0x0000000000007918 */
/* 0x000fc00000000000 */
/*0270*/ NOP; /* 0x0000000000007918 */
/* 0x000fc00000000000 */
..........
Function : _Z7lap_perPA512_dS0_
.headerflags @"EF_CUDA_TEXMODE_UNIFIED EF_CUDA_64BIT_ADDRESS EF_CUDA_SM80 EF_CUDA_VIRTUAL_SM(EF_CUDA_SM80)"
/*0000*/ IMAD.MOV.U32 R1, RZ, RZ, c[0x0][0x28] ; /* 0x00000a00ff017624 */
/* 0x000fe400078e00ff */
/*0010*/ S2R R8, SR_CTAID.Y ; /* 0x0000000000087919 */
/* 0x000e280000002600 */
/*0020*/ S2R R11, SR_TID.Y ; /* 0x00000000000b7919 */
/* 0x000e280000002200 */
/*0030*/ S2R R9, SR_CTAID.X ; /* 0x0000000000097919 */
/* 0x000e680000002500 */
/*0040*/ S2R R10, SR_TID.X ; /* 0x00000000000a7919 */
/* 0x000e620000002100 */
/*0050*/ IMAD R8, R8, c[0x0][0x4], R11 ; /* 0x0000010008087a24 */
/* 0x001fca00078e020b */
/*0060*/ ISETP.GT.AND P0, PT, R8, 0x1ff, PT ; /* 0x000001ff0800780c */
/* 0x000fe20003f04270 */
/*0070*/ IMAD R9, R9, c[0x0][0x0], R10 ; /* 0x0000000009097a24 */
/* 0x002fca00078e020a */
/*0080*/ ISETP.GT.OR P0, PT, R9, 0x1ff, P0 ; /* 0x000001ff0900780c */
/* 0x000fda0000704670 */
/*0090*/ @P0 EXIT ; /* 0x000000000000094d */
/* 0x000fea0003800000 */
/*00a0*/ ISETP.GE.U32.AND P0, PT, R11.reuse, 0x7, PT ; /* 0x000000070b00780c */
/* 0x040fe20003f06070 */
/*00b0*/ BAR.SYNC.DEFER_BLOCKING 0x0 ; /* 0x0000000000007b1d */
/* 0x000fe20000010000 */
/*00c0*/ ISETP.GE.U32.AND P2, PT, R10.reuse, 0x7, PT ; /* 0x000000070a00780c */
/* 0x040fe20003f46070 */
/*00d0*/ IMAD.MOV.U32 R17, RZ, RZ, 0x1000 ; /* 0x00001000ff117424 */
/* 0x000fe200078e00ff */
/*00e0*/ ISETP.NE.AND P1, PT, R10, RZ, PT ; /* 0x000000ff0a00720c */
/* 0x000fe40003f25270 */
/*00f0*/ SHF.R.S32.HI R0, RZ, 0x1f, R9 ; /* 0x0000001fff007819 */
/* 0x000fe20000011409 */
/*0100*/ ULDC.64 UR4, c[0x0][0x118] ; /* 0x0000460000047ab9 */
/* 0x000fe20000000a00 */
/*0110*/ ISETP.NE.AND P3, PT, R11, RZ, PT ; /* 0x000000ff0b00720c */
/* 0x000fe40003f65270 */
/*0120*/ SHF.R.S32.HI R13, RZ, 0x1f, R8 ; /* 0x0000001fff0d7819 */
/* 0x000fc60000011408 */
/*0130*/ @P0 ISETP.NE.AND P4, PT, R8.reuse, 0x1ff, PT ; /* 0x000001ff0800080c */
/* 0x040fe40003f85270 */
/*0140*/ @P0 LEA R6, P5, R9.reuse, c[0x0][0x160], 0xc ; /* 0x0000580009060a11 */
/* 0x040fe400078a60ff */
/*0150*/ @P0 IADD3 R2, R8, 0x1, RZ ; /* 0x0000000108020810 */
/* 0x000fe40007ffe0ff */
/*0160*/ @P0 LEA.HI.X R7, R9.reuse, c[0x0][0x164], R0, 0xc, P5 ; /* 0x0000590009070a11 */
/* 0x040fe400028f6400 */
/*0170*/ @P0 SEL R3, R2, RZ, P4 ; /* 0x000000ff02030207 */
/* 0x000fe40002000000 */
/*0180*/ @P2 ISETP.NE.AND P6, PT, R9, 0x1ff, PT ; /* 0x000001ff0900280c */
/* 0x000fc40003fc5270 */
/*0190*/ @P2 IADD3 R2, R9, 0x1, RZ ; /* 0x0000000109022810 */
/* 0x000fe20007ffe0ff */
/*01a0*/ @P0 IMAD.WIDE R6, R3, 0x8, R6 ; /* 0x0000000803060825 */
/* 0x000fe200078e0206 */
/*01b0*/ @!P1 ISETP.NE.AND P5, PT, R9.reuse, RZ, PT ; /* 0x000000ff0900920c */
/* 0x040fe40003fa5270 */
/*01c0*/ @!P1 IADD3 R3, R9, -0x1, RZ ; /* 0xffffffff09039810 */
/* 0x000fe40007ffe0ff */
/*01d0*/ @P2 SEL R14, R2, RZ, P6 ; /* 0x000000ff020e2207 */
/* 0x000fe20003000000 */
/*01e0*/ @P0 LDG.E.64 R6, [R6.64] ; /* 0x0000000406060981 */
/* 0x000ea2000c1e1b00 */
/*01f0*/ @!P1 SEL R16, R3, 0x1ff, P5 ; /* 0x000001ff03109807 */
/* 0x000fe20002800000 */
/*0200*/ IMAD.WIDE R2, R9, R17, c[0x0][0x160] ; /* 0x0000580009027625 */
/* 0x000fe200078e0211 */
/*0210*/ @!P3 ISETP.NE.AND P4, PT, R8, RZ, PT ; /* 0x000000ff0800b20c */
/* 0x000fc40003f85270 */
/*0220*/ @!P3 IADD3 R12, R8, -0x1, RZ ; /* 0xffffffff080cb810 */
/* 0x000fe20007ffe0ff */
/*0230*/ @P2 IMAD.WIDE R14, R14, R17.reuse, c[0x0][0x160] ; /* 0x000058000e0e2625 */
/* 0x080fe200078e0211 */
/*0240*/ @!P3 LEA R4, P6, R9.reuse, c[0x0][0x160], 0xc ; /* 0x000058000904ba11 */
/* 0x040fe400078c60ff */
/*0250*/ @!P3 SEL R19, R12, 0x1ff, P4 ; /* 0x000001ff0c13b807 */
/* 0x000fe20002000000 */
/*0260*/ @!P1 IMAD.WIDE R16, R16, R17, c[0x0][0x160] ; /* 0x0000580010109625 */
/* 0x000fe200078e0211 */
/*0270*/ @P2 LEA R14, P4, R8.reuse, R14, 0x3 ; /* 0x0000000e080e2211 */
/* 0x040fe400078818ff */
/*0280*/ @!P3 LEA.HI.X R5, R9, c[0x0][0x164], R0, 0xc, P6 ; /* 0x000059000905ba11 */
/* 0x000fe200030f6400 */
/*0290*/ IMAD.WIDE R2, R8.reuse, 0x8, R2 ; /* 0x0000000808027825 */
/* 0x040fe200078e0202 */
/*02a0*/ @!P1 LEA R16, P5, R8, R16, 0x3 ; /* 0x0000001008109211 */
/* 0x000fc400078a18ff */
/*02b0*/ @P2 LEA.HI.X R15, R8.reuse, R15, R13, 0x3, P4 ; /* 0x0000000f080f2211 */
/* 0x040fe200020f1c0d */
/*02c0*/ @!P3 IMAD.WIDE R4, R19, 0x8, R4 ; /* 0x000000081304b825 */
/* 0x000fe200078e0204 */
/*02d0*/ @!P1 LEA.HI.X R17, R8, R17, R13, 0x3, P5 ; /* 0x0000001108119211 */
/* 0x000fe200028f1c0d */
/*02e0*/ LDG.E.64 R2, [R2.64] ; /* 0x0000000402027981 */
/* 0x000ee8000c1e1b00 */
/*02f0*/ @P2 LDG.E.64 R14, [R14.64] ; /* 0x000000040e0e2981 */
/* 0x000f28000c1e1b00 */
/*0300*/ @!P1 LDG.E.64 R16, [R16.64] ; /* 0x0000000410109981 */
/* 0x000f68000c1e1b00 */
/*0310*/ @!P3 LDG.E.64 R4, [R4.64] ; /* 0x000000040404b981 */
/* 0x000ea2000c1e1b00 */
/*0320*/ IMAD.MOV.U32 R27, RZ, RZ, 0x50 ; /* 0x00000050ff1b7424 */
/* 0x000fc800078e00ff */
/*0330*/ IMAD R27, R10, R27, 0x8 ; /* 0x000000080a1b7424 */
/* 0x000fe400078e021b */
/*0340*/ IMAD.SHL.U32 R10, R11, 0x8, RZ ; /* 0x000000080b0a7824 */
/* 0x000fc800078e00ff */
/*0350*/ IMAD.IADD R19, R27, 0x1, R10 ; /* 0x000000011b137824 */
/* 0x000fca00078e020a */
/*0360*/ STS.64 [R19+0x58], R2 ; /* 0x0000580213007388 */
/* 0x008fe80000000a00 */
/*0370*/ @P2 STS.64 [R19+0xa8], R14 ; /* 0x0000a80e13002388 */
/* 0x010fe80000000a00 */
/*0380*/ @!P1 STS.64 [R11.X8+0x10], R16 ; /* 0x000010100b009388 */
/* 0x020fe80000008a00 */
/*0390*/ @P0 STS.64 [R19+0x60], R6 ; /* 0x0000600613000388 */
/* 0x004fe80000000a00 */
/*03a0*/ @!P3 STS.64 [R27+0x50], R4 ; /* 0x000050041b00b388 */
/* 0x000fe80000000a00 */
/*03b0*/ BAR.SYNC.DEFER_BLOCKING 0x0 ; /* 0x0000000000007b1d */
/* 0x000fec0000010000 */
/*03c0*/ LDS.64 R20, [R19+0xa8] ; /* 0x0000a80013147984 */
/* 0x000fe80000000a00 */
/*03d0*/ LDS.64 R22, [R19+0x8] ; /* 0x0000080013167984 */
/* 0x000e280000000a00 */
/*03e0*/ LDS.64 R24, [R19+0x58] ; /* 0x0000580013187984 */
/* 0x000e620000000a00 */
/*03f0*/ DADD R20, R20, R22 ; /* 0x0000000014147229 */
/* 0x001fc80000000016 */
/*0400*/ DADD R24, R24, R24 ; /* 0x0000000018187229 */
/* 0x002e0c0000000018 */
/*0410*/ DADD R20, R20, -R24 ; /* 0x0000000014147229 */
/* 0x001e0e0000000818 */
/*0420*/ STS.64 [RZ], R20 ; /* 0x00000014ff007388 */
/* 0x001fe80000000a00 */
/*0430*/ LDS.64 R2, [R19+0x60] ; /* 0x0000600013027984 */
/* 0x000fe80000000a00 */
/*0440*/ LDS.64 R6, [R19+0x50] ; /* 0x0000500013067984 */
/* 0x000e220000000a00 */
/*0450*/ LEA R5, P0, R9, c[0x0][0x168], 0xc ; /* 0x00005a0009057a11 */
/* 0x000fc800078060ff */
/*0460*/ LEA.HI.X R0, R9, c[0x0][0x16c], R0, 0xc, P0 ; /* 0x00005b0009007a11 */
/* 0x000fe400000f6400 */
/*0470*/ LEA R4, P0, R8, R5, 0x3 ; /* 0x0000000508047211 */
/* 0x000fc800078018ff */
/*0480*/ LEA.HI.X R5, R8, R0, R13, 0x3, P0 ; /* 0x0000000008057211 */
/* 0x000fe200000f1c0d */
/*0490*/ DADD R2, R2, R6 ; /* 0x0000000002027229 */
/* 0x001e0c0000000006 */
/*04a0*/ DADD R2, -R24, R2 ; /* 0x0000000018027229 */
/* 0x001e0c0000000102 */
/*04b0*/ DADD R2, R20, R2 ; /* 0x0000000014027229 */
/* 0x001e0e0000000002 */
/*04c0*/ STG.E.64 [R4.64], R2 ; /* 0x0000000204007986 */
/* 0x001fe2000c101b04 */
/*04d0*/ EXIT ; /* 0x000000000000794d */
/* 0x000fea0003800000 */
/*04e0*/ BRA 0x4e0; /* 0xfffffff000007947 */
/* 0x000fc0000383ffff */
/*04f0*/ NOP; /* 0x0000000000007918 */
/* 0x000fc00000000000 */
/*0500*/ NOP; /* 0x0000000000007918 */
/* 0x000fc00000000000 */
/*0510*/ NOP; /* 0x0000000000007918 */
/* 0x000fc00000000000 */
/*0520*/ NOP; /* 0x0000000000007918 */
/* 0x000fc00000000000 */
/*0530*/ NOP; /* 0x0000000000007918 */
/* 0x000fc00000000000 */
/*0540*/ NOP; /* 0x0000000000007918 */
/* 0x000fc00000000000 */
/*0550*/ NOP; /* 0x0000000000007918 */
/* 0x000fc00000000000 */
/*0560*/ NOP; /* 0x0000000000007918 */
/* 0x000fc00000000000 */
/*0570*/ NOP; /* 0x0000000000007918 */
/* 0x000fc00000000000 */
.......... |
You are a helpful coding assistant specialized in converting CUDA source code to HIP/AMD source code. | #include <iostream>
#include <random>
#include <fstream>
#include <string>
#include <iomanip>
#include <stdlib.h>
#include <stdio.h>
#define nr 512
#define nc 512
#define Blk_H 8
#define Blk_W 8
#define stclX 1
#define stclY 1
using namespace std;
// cuda code
#define cudaCheckErrors(msg) \
do { \
cudaError_t __err = cudaGetLastError(); \
if (__err != cudaSuccess) { \
fprintf(stderr, "Fatal error: %s (%s at %s:%d)\n", \
msg, cudaGetErrorString(__err), \
__FILE__, __LINE__); \
fprintf(stderr, "*** FAILED - ABORTING\n"); \
exit(1); \
} \
} while (0)
typedef double num_col[nc];
// function declartions
void write_ouput(num_col *phi,int nx,int ny,int step,double dx,double dy);
__global__ void lap_per(num_col * mat_in, num_col * mat_out);
__global__ void calc_df(num_col * mat_in, num_col * mat_out);
__global__ void update_phi(num_col * mat_in, num_col * mat_out);
int main(){
// declare simulation variables
int step;
int steps = 10000;
int skip = 1000;
int ny = nr;
int nx = nc;
double dx = 1.0;
double dy = 1.0;
double phi0 = 0.0;
num_col * phi;
num_col * df;
num_col * d_phi;
num_col * d_df;
int size = nx*ny*sizeof(double);
// allocate resources for phi and df on cpu
phi = (num_col*) malloc(size);
df = (num_col*) malloc(size);
// allocate memory on gpu
cudaMalloc((void**) &d_phi,size);
cudaCheckErrors("cudaMalloc fail");
cudaMalloc((void**) &d_df,size);
cudaCheckErrors("cudaMalloc fail");
// clean up output files from previous runs
// system("rm fluid*");
// random number stuff
default_random_engine generator;
uniform_real_distribution<double> ran(-1.0,1.0);
// initialize system
for (int i=0; i<nx;i++){
for (int j=0; j<ny;j++){
phi[i][j] = phi0 + 0.1*ran(generator);
}
}
// write initial condition output file
write_ouput(phi,nx,ny,1,dx,dy);
// evolve the system using finite difference to
// solve the CH equation
// copy data to the gpu
cudaMemcpy(d_phi,phi,size,cudaMemcpyHostToDevice);
cudaCheckErrors("cudaMemcpy H2D fail");
cudaMemcpy(d_df,df,size,cudaMemcpyHostToDevice);
cudaCheckErrors("cudaMemcpy H2D fail");
// get grid and block size
dim3 threadsPerBlock(Blk_H,Blk_W);
dim3 numBlocks( (nr + Blk_H - 1)/threadsPerBlock.x, (nc + Blk_W - 1)/threadsPerBlock.x );
for (step = 1; step <= steps; step++){
// pass the number crunching off to the gpu
// calculate the laplacian of phi and store in df
lap_per<<<numBlocks,threadsPerBlock>>>(d_phi,d_df);
cudaDeviceSynchronize();
cudaCheckErrors("cuda kernel fail");
// caclulate df and store in df
calc_df<<<numBlocks,threadsPerBlock>>>(d_phi,d_df);
cudaDeviceSynchronize();
cudaCheckErrors("cuda kernel fail");
// calculate the laplacian of df and update phi
update_phi<<<numBlocks,threadsPerBlock>>>(d_df,d_phi);
cudaDeviceSynchronize();
cudaCheckErrors("cuda kernel fail");
// write output
if (step%skip == 0){
// get phi from gpu
cudaMemcpyAsync(phi,d_phi,size,cudaMemcpyDeviceToHost);
cudaCheckErrors("cudaMemcpy D2H fail");
write_ouput(phi,nx,ny,step,dx,dy);
}
}
// clean up on device
cudaFree(d_phi);
cudaFree(d_df);
return 0;
}
// function definitions
__global__ void lap_per(num_col * mat_in, num_col * mat_out){
int i = blockIdx.x * blockDim.x + threadIdx.x;
int j = blockIdx.y * blockDim.y + threadIdx.y;
int is,in,je,jw;
int ii,jj,iis,iin,jje,jjw;
__shared__ double d2x,d2y;
if (i < nc && j < nr ){
// get neighbors for stencil for the bulk case
is = i - 1;
in = i + 1;
je = j + 1;
jw = j - 1;
// apply periodic boundary conditions
// south boundary
if (i == 0) is = nr - 1;
// north boundary
if (i == (nr-1)) in = 0;
// west boundary
if (j == 0) jw = nc - 1;
// east boundary
if (j == (nc-1)) je = 0;
// shared memory neighbor indices
ii = threadIdx.x + stclX;
jj = threadIdx.y + stclY;
iin = ii + 1;
iis = ii - 1;
jje = jj + 1;
jjw = jj - 1;
// sync all the threads in the block up to this point
__syncthreads();
// memory optimization using shared memory
__shared__ double smem[(Blk_H + 2*stclX)][(Blk_W + 2*stclY)];
smem[ii][jj] = mat_in[i][j];
// load north side of stencil
if (threadIdx.x > (Blk_H - 2*stclX)){
smem[ii + stclX][jj] = mat_in[in][j];
}
// load south side of stencil
if (threadIdx.x == 0){
smem[ii - stclX][jj] = mat_in[is][j];
}
// load east side of stencil
if (threadIdx.y > (Blk_W - 2*stclY)){
smem[ii][jj + stclY] = mat_in[i][je];
}
// load west side of stencil
if (threadIdx.y == 0){
smem[ii][jj - stclY] = mat_in[i][jw];
}
// sync threads to ensure all data is loaded into shared memory
__syncthreads();
// calculate 2D laplacian approximation (assume dx and dy = 1.0)
d2y = smem[iis][jj] + smem[iin][jj] - 2.0*smem[ii][jj];
d2x = smem[ii][jjw] + smem[ii][jje] - 2.0*smem[ii][jj];
mat_out[i][j] = d2x + d2y;
}
}
__global__ void calc_df(num_col * mat_in, num_col * mat_out){
int i = blockIdx.x * blockDim.x + threadIdx.x;
int j = blockIdx.y * blockDim.y + threadIdx.y;
int ii = threadIdx.x;
int jj = threadIdx.y;
if (i < nc && j < nr ){
// memory optimization using shared memory
__shared__ double smem[(Blk_H)][(Blk_W)];
smem[ii][jj] = mat_in[i][j];
// calulate df[i][j] noting that it currently stores the laplacian of phi
// also assume kappa=1.0
mat_out[i][j] = -1.0*mat_out[i][j] + smem[ii][jj]*smem[ii][jj]*smem[ii][jj] - smem[ii][jj];
}
}
__global__ void update_phi(num_col * mat_in, num_col * mat_out){
int i = blockIdx.x * blockDim.x + threadIdx.x;
int j = blockIdx.y * blockDim.y + threadIdx.y;
int is,in,je,jw;
int ii,jj,iis,iin,jje,jjw;
__shared__ double d2x,d2y,dt;
dt = 0.01;
if (i < nc && j < nr ){
// get neighbors for stencil for the bulk case
is = i - 1;
in = i + 1;
je = j + 1;
jw = j - 1;
// apply periodic boundary conditions
// left boundary
if (i == 0) is = nr - 1;
// right boundary
if (i == (nr-1)) in = 0;
// bottom boundary
if (j == 0) jw = nc - 1;
// top boundary
if (j == (nc-1)) je = 0;
// shared memory neighbor indices
ii = threadIdx.x + stclX;
jj = threadIdx.y + stclY;
iin = ii + 1;
iis = ii - 1;
jje = jj + 1;
jjw = jj - 1;
// sync all the threads in the block up to this point
__syncthreads();
// memory optimization using shared memory
__shared__ double smem[(Blk_H + 2*stclX)][(Blk_W + 2*stclY)];
smem[ii][jj] = mat_in[i][j];
// load north side of stencil
if (threadIdx.x > (Blk_H - 2*stclX)){
smem[ii + stclX][jj] = mat_in[in][j];
}
// load south side of stencil
if (threadIdx.x == 0){
smem[ii - stclX][jj] = mat_in[is][j];
}
// load east side of stencil
if (threadIdx.y > (Blk_W - 2*stclY)){
smem[ii][jj + stclY] = mat_in[i][je];
}
// load west side of stencil
if (threadIdx.y == 0){
smem[ii][jj - stclY] = mat_in[i][jw];
}
// sync threads to ensure all data is loaded into shared memory
__syncthreads();
// calculate 2D laplacian approximation (assume dx and dy = 1.0)
d2y = smem[iis][jj] + smem[iin][jj] - 2.0*smem[ii][jj];
d2x = smem[ii][jjw] + smem[ii][jje] - 2.0*smem[ii][jj];
mat_out[i][j] = mat_out[i][j] + dt*(d2x + d2y);
}
}
void write_ouput(num_col *phi,int nx,int ny,int step,double dx,double dy)
{
string filename = to_string(step);
filename = "fluid_" + filename + ".vtk";
string d = " ";
ofstream outf(filename);
// If we couldn't open the output file stream for writing
if (!outf)
{
// Print an error and exit
cerr << "could not open output file for reading!" << endl;
exit(1);
}
// write file header
outf << "# vtk DataFile Version 3.1" << endl;
outf << "VTK file containing grid data" << endl;
outf << "ASCII" << endl;
outf << endl;
outf << "DATASET STRUCTURED_POINTS" << endl;
outf << "DIMENSIONS" << d<< nx << d << ny << " 1" << endl;
outf << "ORIGIN 1 1 1" << endl;
outf << "SPACING 1.0 1.0 1.0" << endl;
outf << endl;
outf << "POINT_DATA " << nx*ny << endl;
outf << "SCALARS Phi float" << endl;
outf << "LOOKUP_TABLE default" << endl;
// write out the values of phi
for (int i=0; i<nx;i++){
for (int j=0; j<ny;j++){
outf << setw(16) << phi[i][j] << endl;
}
}
} | #include <hip/hip_runtime.h>
#include <iostream>
#include <random>
#include <fstream>
#include <string>
#include <iomanip>
#include <stdlib.h>
#include <stdio.h>
#define nr 512
#define nc 512
#define Blk_H 8
#define Blk_W 8
#define stclX 1
#define stclY 1
using namespace std;
// cuda code
#define cudaCheckErrors(msg) \
do { \
hipError_t __err = hipGetLastError(); \
if (__err != hipSuccess) { \
fprintf(stderr, "Fatal error: %s (%s at %s:%d)\n", \
msg, hipGetErrorString(__err), \
__FILE__, __LINE__); \
fprintf(stderr, "*** FAILED - ABORTING\n"); \
exit(1); \
} \
} while (0)
typedef double num_col[nc];
// function declartions
void write_ouput(num_col *phi,int nx,int ny,int step,double dx,double dy);
__global__ void lap_per(num_col * mat_in, num_col * mat_out);
__global__ void calc_df(num_col * mat_in, num_col * mat_out);
__global__ void update_phi(num_col * mat_in, num_col * mat_out);
int main(){
// declare simulation variables
int step;
int steps = 10000;
int skip = 1000;
int ny = nr;
int nx = nc;
double dx = 1.0;
double dy = 1.0;
double phi0 = 0.0;
num_col * phi;
num_col * df;
num_col * d_phi;
num_col * d_df;
int size = nx*ny*sizeof(double);
// allocate resources for phi and df on cpu
phi = (num_col*) malloc(size);
df = (num_col*) malloc(size);
// allocate memory on gpu
hipMalloc((void**) &d_phi,size);
cudaCheckErrors("hipMalloc fail");
hipMalloc((void**) &d_df,size);
cudaCheckErrors("hipMalloc fail");
// clean up output files from previous runs
// system("rm fluid*");
// random number stuff
default_random_engine generator;
uniform_real_distribution<double> ran(-1.0,1.0);
// initialize system
for (int i=0; i<nx;i++){
for (int j=0; j<ny;j++){
phi[i][j] = phi0 + 0.1*ran(generator);
}
}
// write initial condition output file
write_ouput(phi,nx,ny,1,dx,dy);
// evolve the system using finite difference to
// solve the CH equation
// copy data to the gpu
hipMemcpy(d_phi,phi,size,hipMemcpyHostToDevice);
cudaCheckErrors("hipMemcpy H2D fail");
hipMemcpy(d_df,df,size,hipMemcpyHostToDevice);
cudaCheckErrors("hipMemcpy H2D fail");
// get grid and block size
dim3 threadsPerBlock(Blk_H,Blk_W);
dim3 numBlocks( (nr + Blk_H - 1)/threadsPerBlock.x, (nc + Blk_W - 1)/threadsPerBlock.x );
for (step = 1; step <= steps; step++){
// pass the number crunching off to the gpu
// calculate the laplacian of phi and store in df
lap_per<<<numBlocks,threadsPerBlock>>>(d_phi,d_df);
hipDeviceSynchronize();
cudaCheckErrors("cuda kernel fail");
// caclulate df and store in df
calc_df<<<numBlocks,threadsPerBlock>>>(d_phi,d_df);
hipDeviceSynchronize();
cudaCheckErrors("cuda kernel fail");
// calculate the laplacian of df and update phi
update_phi<<<numBlocks,threadsPerBlock>>>(d_df,d_phi);
hipDeviceSynchronize();
cudaCheckErrors("cuda kernel fail");
// write output
if (step%skip == 0){
// get phi from gpu
hipMemcpyAsync(phi,d_phi,size,hipMemcpyDeviceToHost);
cudaCheckErrors("hipMemcpy D2H fail");
write_ouput(phi,nx,ny,step,dx,dy);
}
}
// clean up on device
hipFree(d_phi);
hipFree(d_df);
return 0;
}
// function definitions
__global__ void lap_per(num_col * mat_in, num_col * mat_out){
int i = blockIdx.x * blockDim.x + threadIdx.x;
int j = blockIdx.y * blockDim.y + threadIdx.y;
int is,in,je,jw;
int ii,jj,iis,iin,jje,jjw;
__shared__ double d2x,d2y;
if (i < nc && j < nr ){
// get neighbors for stencil for the bulk case
is = i - 1;
in = i + 1;
je = j + 1;
jw = j - 1;
// apply periodic boundary conditions
// south boundary
if (i == 0) is = nr - 1;
// north boundary
if (i == (nr-1)) in = 0;
// west boundary
if (j == 0) jw = nc - 1;
// east boundary
if (j == (nc-1)) je = 0;
// shared memory neighbor indices
ii = threadIdx.x + stclX;
jj = threadIdx.y + stclY;
iin = ii + 1;
iis = ii - 1;
jje = jj + 1;
jjw = jj - 1;
// sync all the threads in the block up to this point
__syncthreads();
// memory optimization using shared memory
__shared__ double smem[(Blk_H + 2*stclX)][(Blk_W + 2*stclY)];
smem[ii][jj] = mat_in[i][j];
// load north side of stencil
if (threadIdx.x > (Blk_H - 2*stclX)){
smem[ii + stclX][jj] = mat_in[in][j];
}
// load south side of stencil
if (threadIdx.x == 0){
smem[ii - stclX][jj] = mat_in[is][j];
}
// load east side of stencil
if (threadIdx.y > (Blk_W - 2*stclY)){
smem[ii][jj + stclY] = mat_in[i][je];
}
// load west side of stencil
if (threadIdx.y == 0){
smem[ii][jj - stclY] = mat_in[i][jw];
}
// sync threads to ensure all data is loaded into shared memory
__syncthreads();
// calculate 2D laplacian approximation (assume dx and dy = 1.0)
d2y = smem[iis][jj] + smem[iin][jj] - 2.0*smem[ii][jj];
d2x = smem[ii][jjw] + smem[ii][jje] - 2.0*smem[ii][jj];
mat_out[i][j] = d2x + d2y;
}
}
__global__ void calc_df(num_col * mat_in, num_col * mat_out){
int i = blockIdx.x * blockDim.x + threadIdx.x;
int j = blockIdx.y * blockDim.y + threadIdx.y;
int ii = threadIdx.x;
int jj = threadIdx.y;
if (i < nc && j < nr ){
// memory optimization using shared memory
__shared__ double smem[(Blk_H)][(Blk_W)];
smem[ii][jj] = mat_in[i][j];
// calulate df[i][j] noting that it currently stores the laplacian of phi
// also assume kappa=1.0
mat_out[i][j] = -1.0*mat_out[i][j] + smem[ii][jj]*smem[ii][jj]*smem[ii][jj] - smem[ii][jj];
}
}
__global__ void update_phi(num_col * mat_in, num_col * mat_out){
int i = blockIdx.x * blockDim.x + threadIdx.x;
int j = blockIdx.y * blockDim.y + threadIdx.y;
int is,in,je,jw;
int ii,jj,iis,iin,jje,jjw;
__shared__ double d2x,d2y,dt;
dt = 0.01;
if (i < nc && j < nr ){
// get neighbors for stencil for the bulk case
is = i - 1;
in = i + 1;
je = j + 1;
jw = j - 1;
// apply periodic boundary conditions
// left boundary
if (i == 0) is = nr - 1;
// right boundary
if (i == (nr-1)) in = 0;
// bottom boundary
if (j == 0) jw = nc - 1;
// top boundary
if (j == (nc-1)) je = 0;
// shared memory neighbor indices
ii = threadIdx.x + stclX;
jj = threadIdx.y + stclY;
iin = ii + 1;
iis = ii - 1;
jje = jj + 1;
jjw = jj - 1;
// sync all the threads in the block up to this point
__syncthreads();
// memory optimization using shared memory
__shared__ double smem[(Blk_H + 2*stclX)][(Blk_W + 2*stclY)];
smem[ii][jj] = mat_in[i][j];
// load north side of stencil
if (threadIdx.x > (Blk_H - 2*stclX)){
smem[ii + stclX][jj] = mat_in[in][j];
}
// load south side of stencil
if (threadIdx.x == 0){
smem[ii - stclX][jj] = mat_in[is][j];
}
// load east side of stencil
if (threadIdx.y > (Blk_W - 2*stclY)){
smem[ii][jj + stclY] = mat_in[i][je];
}
// load west side of stencil
if (threadIdx.y == 0){
smem[ii][jj - stclY] = mat_in[i][jw];
}
// sync threads to ensure all data is loaded into shared memory
__syncthreads();
// calculate 2D laplacian approximation (assume dx and dy = 1.0)
d2y = smem[iis][jj] + smem[iin][jj] - 2.0*smem[ii][jj];
d2x = smem[ii][jjw] + smem[ii][jje] - 2.0*smem[ii][jj];
mat_out[i][j] = mat_out[i][j] + dt*(d2x + d2y);
}
}
void write_ouput(num_col *phi,int nx,int ny,int step,double dx,double dy)
{
string filename = to_string(step);
filename = "fluid_" + filename + ".vtk";
string d = " ";
ofstream outf(filename);
// If we couldn't open the output file stream for writing
if (!outf)
{
// Print an error and exit
cerr << "could not open output file for reading!" << endl;
exit(1);
}
// write file header
outf << "# vtk DataFile Version 3.1" << endl;
outf << "VTK file containing grid data" << endl;
outf << "ASCII" << endl;
outf << endl;
outf << "DATASET STRUCTURED_POINTS" << endl;
outf << "DIMENSIONS" << d<< nx << d << ny << " 1" << endl;
outf << "ORIGIN 1 1 1" << endl;
outf << "SPACING 1.0 1.0 1.0" << endl;
outf << endl;
outf << "POINT_DATA " << nx*ny << endl;
outf << "SCALARS Phi float" << endl;
outf << "LOOKUP_TABLE default" << endl;
// write out the values of phi
for (int i=0; i<nx;i++){
for (int j=0; j<ny;j++){
outf << setw(16) << phi[i][j] << endl;
}
}
} |
You are a helpful coding assistant specialized in converting HIP source code to AMD device assembly. | #include <hip/hip_runtime.h>
#include <iostream>
#include <random>
#include <fstream>
#include <string>
#include <iomanip>
#include <stdlib.h>
#include <stdio.h>
#define nr 512
#define nc 512
#define Blk_H 8
#define Blk_W 8
#define stclX 1
#define stclY 1
using namespace std;
// cuda code
#define cudaCheckErrors(msg) \
do { \
hipError_t __err = hipGetLastError(); \
if (__err != hipSuccess) { \
fprintf(stderr, "Fatal error: %s (%s at %s:%d)\n", \
msg, hipGetErrorString(__err), \
__FILE__, __LINE__); \
fprintf(stderr, "*** FAILED - ABORTING\n"); \
exit(1); \
} \
} while (0)
typedef double num_col[nc];
// function declartions
void write_ouput(num_col *phi,int nx,int ny,int step,double dx,double dy);
__global__ void lap_per(num_col * mat_in, num_col * mat_out);
__global__ void calc_df(num_col * mat_in, num_col * mat_out);
__global__ void update_phi(num_col * mat_in, num_col * mat_out);
int main(){
// declare simulation variables
int step;
int steps = 10000;
int skip = 1000;
int ny = nr;
int nx = nc;
double dx = 1.0;
double dy = 1.0;
double phi0 = 0.0;
num_col * phi;
num_col * df;
num_col * d_phi;
num_col * d_df;
int size = nx*ny*sizeof(double);
// allocate resources for phi and df on cpu
phi = (num_col*) malloc(size);
df = (num_col*) malloc(size);
// allocate memory on gpu
hipMalloc((void**) &d_phi,size);
cudaCheckErrors("hipMalloc fail");
hipMalloc((void**) &d_df,size);
cudaCheckErrors("hipMalloc fail");
// clean up output files from previous runs
// system("rm fluid*");
// random number stuff
default_random_engine generator;
uniform_real_distribution<double> ran(-1.0,1.0);
// initialize system
for (int i=0; i<nx;i++){
for (int j=0; j<ny;j++){
phi[i][j] = phi0 + 0.1*ran(generator);
}
}
// write initial condition output file
write_ouput(phi,nx,ny,1,dx,dy);
// evolve the system using finite difference to
// solve the CH equation
// copy data to the gpu
hipMemcpy(d_phi,phi,size,hipMemcpyHostToDevice);
cudaCheckErrors("hipMemcpy H2D fail");
hipMemcpy(d_df,df,size,hipMemcpyHostToDevice);
cudaCheckErrors("hipMemcpy H2D fail");
// get grid and block size
dim3 threadsPerBlock(Blk_H,Blk_W);
dim3 numBlocks( (nr + Blk_H - 1)/threadsPerBlock.x, (nc + Blk_W - 1)/threadsPerBlock.x );
for (step = 1; step <= steps; step++){
// pass the number crunching off to the gpu
// calculate the laplacian of phi and store in df
lap_per<<<numBlocks,threadsPerBlock>>>(d_phi,d_df);
hipDeviceSynchronize();
cudaCheckErrors("cuda kernel fail");
// caclulate df and store in df
calc_df<<<numBlocks,threadsPerBlock>>>(d_phi,d_df);
hipDeviceSynchronize();
cudaCheckErrors("cuda kernel fail");
// calculate the laplacian of df and update phi
update_phi<<<numBlocks,threadsPerBlock>>>(d_df,d_phi);
hipDeviceSynchronize();
cudaCheckErrors("cuda kernel fail");
// write output
if (step%skip == 0){
// get phi from gpu
hipMemcpyAsync(phi,d_phi,size,hipMemcpyDeviceToHost);
cudaCheckErrors("hipMemcpy D2H fail");
write_ouput(phi,nx,ny,step,dx,dy);
}
}
// clean up on device
hipFree(d_phi);
hipFree(d_df);
return 0;
}
// function definitions
__global__ void lap_per(num_col * mat_in, num_col * mat_out){
int i = blockIdx.x * blockDim.x + threadIdx.x;
int j = blockIdx.y * blockDim.y + threadIdx.y;
int is,in,je,jw;
int ii,jj,iis,iin,jje,jjw;
__shared__ double d2x,d2y;
if (i < nc && j < nr ){
// get neighbors for stencil for the bulk case
is = i - 1;
in = i + 1;
je = j + 1;
jw = j - 1;
// apply periodic boundary conditions
// south boundary
if (i == 0) is = nr - 1;
// north boundary
if (i == (nr-1)) in = 0;
// west boundary
if (j == 0) jw = nc - 1;
// east boundary
if (j == (nc-1)) je = 0;
// shared memory neighbor indices
ii = threadIdx.x + stclX;
jj = threadIdx.y + stclY;
iin = ii + 1;
iis = ii - 1;
jje = jj + 1;
jjw = jj - 1;
// sync all the threads in the block up to this point
__syncthreads();
// memory optimization using shared memory
__shared__ double smem[(Blk_H + 2*stclX)][(Blk_W + 2*stclY)];
smem[ii][jj] = mat_in[i][j];
// load north side of stencil
if (threadIdx.x > (Blk_H - 2*stclX)){
smem[ii + stclX][jj] = mat_in[in][j];
}
// load south side of stencil
if (threadIdx.x == 0){
smem[ii - stclX][jj] = mat_in[is][j];
}
// load east side of stencil
if (threadIdx.y > (Blk_W - 2*stclY)){
smem[ii][jj + stclY] = mat_in[i][je];
}
// load west side of stencil
if (threadIdx.y == 0){
smem[ii][jj - stclY] = mat_in[i][jw];
}
// sync threads to ensure all data is loaded into shared memory
__syncthreads();
// calculate 2D laplacian approximation (assume dx and dy = 1.0)
d2y = smem[iis][jj] + smem[iin][jj] - 2.0*smem[ii][jj];
d2x = smem[ii][jjw] + smem[ii][jje] - 2.0*smem[ii][jj];
mat_out[i][j] = d2x + d2y;
}
}
__global__ void calc_df(num_col * mat_in, num_col * mat_out){
int i = blockIdx.x * blockDim.x + threadIdx.x;
int j = blockIdx.y * blockDim.y + threadIdx.y;
int ii = threadIdx.x;
int jj = threadIdx.y;
if (i < nc && j < nr ){
// memory optimization using shared memory
__shared__ double smem[(Blk_H)][(Blk_W)];
smem[ii][jj] = mat_in[i][j];
// calulate df[i][j] noting that it currently stores the laplacian of phi
// also assume kappa=1.0
mat_out[i][j] = -1.0*mat_out[i][j] + smem[ii][jj]*smem[ii][jj]*smem[ii][jj] - smem[ii][jj];
}
}
__global__ void update_phi(num_col * mat_in, num_col * mat_out){
int i = blockIdx.x * blockDim.x + threadIdx.x;
int j = blockIdx.y * blockDim.y + threadIdx.y;
int is,in,je,jw;
int ii,jj,iis,iin,jje,jjw;
__shared__ double d2x,d2y,dt;
dt = 0.01;
if (i < nc && j < nr ){
// get neighbors for stencil for the bulk case
is = i - 1;
in = i + 1;
je = j + 1;
jw = j - 1;
// apply periodic boundary conditions
// left boundary
if (i == 0) is = nr - 1;
// right boundary
if (i == (nr-1)) in = 0;
// bottom boundary
if (j == 0) jw = nc - 1;
// top boundary
if (j == (nc-1)) je = 0;
// shared memory neighbor indices
ii = threadIdx.x + stclX;
jj = threadIdx.y + stclY;
iin = ii + 1;
iis = ii - 1;
jje = jj + 1;
jjw = jj - 1;
// sync all the threads in the block up to this point
__syncthreads();
// memory optimization using shared memory
__shared__ double smem[(Blk_H + 2*stclX)][(Blk_W + 2*stclY)];
smem[ii][jj] = mat_in[i][j];
// load north side of stencil
if (threadIdx.x > (Blk_H - 2*stclX)){
smem[ii + stclX][jj] = mat_in[in][j];
}
// load south side of stencil
if (threadIdx.x == 0){
smem[ii - stclX][jj] = mat_in[is][j];
}
// load east side of stencil
if (threadIdx.y > (Blk_W - 2*stclY)){
smem[ii][jj + stclY] = mat_in[i][je];
}
// load west side of stencil
if (threadIdx.y == 0){
smem[ii][jj - stclY] = mat_in[i][jw];
}
// sync threads to ensure all data is loaded into shared memory
__syncthreads();
// calculate 2D laplacian approximation (assume dx and dy = 1.0)
d2y = smem[iis][jj] + smem[iin][jj] - 2.0*smem[ii][jj];
d2x = smem[ii][jjw] + smem[ii][jje] - 2.0*smem[ii][jj];
mat_out[i][j] = mat_out[i][j] + dt*(d2x + d2y);
}
}
void write_ouput(num_col *phi,int nx,int ny,int step,double dx,double dy)
{
string filename = to_string(step);
filename = "fluid_" + filename + ".vtk";
string d = " ";
ofstream outf(filename);
// If we couldn't open the output file stream for writing
if (!outf)
{
// Print an error and exit
cerr << "could not open output file for reading!" << endl;
exit(1);
}
// write file header
outf << "# vtk DataFile Version 3.1" << endl;
outf << "VTK file containing grid data" << endl;
outf << "ASCII" << endl;
outf << endl;
outf << "DATASET STRUCTURED_POINTS" << endl;
outf << "DIMENSIONS" << d<< nx << d << ny << " 1" << endl;
outf << "ORIGIN 1 1 1" << endl;
outf << "SPACING 1.0 1.0 1.0" << endl;
outf << endl;
outf << "POINT_DATA " << nx*ny << endl;
outf << "SCALARS Phi float" << endl;
outf << "LOOKUP_TABLE default" << endl;
// write out the values of phi
for (int i=0; i<nx;i++){
for (int j=0; j<ny;j++){
outf << setw(16) << phi[i][j] << endl;
}
}
} | .text
.amdgcn_target "amdgcn-amd-amdhsa--gfx1100"
.protected _Z7lap_perPA512_dS0_
.globl _Z7lap_perPA512_dS0_
.p2align 8
.type _Z7lap_perPA512_dS0_,@function
_Z7lap_perPA512_dS0_:
s_load_b32 s2, s[0:1], 0x1c
v_and_b32_e32 v4, 0x3ff, v0
v_bfe_u32 v5, v0, 10, 10
s_waitcnt lgkmcnt(0)
s_and_b32 s3, s2, 0xffff
s_lshr_b32 s2, s2, 16
s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_2) | instid1(VALU_DEP_1)
v_mad_u64_u32 v[0:1], null, s14, s3, v[4:5]
v_mad_u64_u32 v[2:3], null, s15, s2, v[5:6]
s_mov_b32 s2, exec_lo
v_max_i32_e32 v1, v0, v2
s_delay_alu instid0(VALU_DEP_1)
v_cmpx_gt_i32_e32 0x200, v1
s_cbranch_execz .LBB0_10
s_load_b64 s[2:3], s[0:1], 0x0
v_ashrrev_i32_e32 v1, 31, v0
v_ashrrev_i32_e32 v3, 31, v2
s_waitcnt lgkmcnt(0)
s_barrier
buffer_gl0_inv
v_lshlrev_b64 v[8:9], 12, v[0:1]
v_lshlrev_b64 v[6:7], 3, v[2:3]
v_add_nc_u32_e32 v11, 1, v5
v_add_nc_u32_e32 v10, 2, v4
s_mov_b32 s4, exec_lo
s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_2) | instid1(VALU_DEP_2)
v_lshlrev_b32_e32 v12, 3, v11
v_add_co_u32 v8, vcc_lo, s2, v8
v_add_co_ci_u32_e32 v9, vcc_lo, s3, v9, vcc_lo
v_add_co_u32 v8, vcc_lo, v8, v6
s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_2) | instid1(VALU_DEP_1)
v_add_co_ci_u32_e32 v9, vcc_lo, v9, v7, vcc_lo
global_load_b64 v[13:14], v[8:9], off
v_add_nc_u32_e32 v9, 1, v4
v_mad_u32_u24 v8, v9, 0x50, v12
s_waitcnt vmcnt(0)
ds_store_b64 v8, v[13:14]
v_cmpx_lt_u32_e32 6, v4
s_cbranch_execz .LBB0_3
v_add_nc_u32_e32 v13, 1, v0
v_cmp_ne_u32_e32 vcc_lo, 0x1ff, v0
v_mad_u32_u24 v12, v10, 0x50, v12
s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_1)
v_cndmask_b32_e32 v13, 0, v13, vcc_lo
v_ashrrev_i32_e32 v14, 31, v13
s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
v_lshlrev_b64 v[13:14], 12, v[13:14]
v_add_co_u32 v13, vcc_lo, s2, v13
s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
v_add_co_ci_u32_e32 v14, vcc_lo, s3, v14, vcc_lo
v_add_co_u32 v6, vcc_lo, v13, v6
s_delay_alu instid0(VALU_DEP_2)
v_add_co_ci_u32_e32 v7, vcc_lo, v14, v7, vcc_lo
global_load_b64 v[6:7], v[6:7], off
s_waitcnt vmcnt(0)
ds_store_b64 v12, v[6:7]
.LBB0_3:
s_or_b32 exec_lo, exec_lo, s4
s_delay_alu instid0(SALU_CYCLE_1)
s_mov_b32 s4, exec_lo
v_cmpx_eq_u32_e32 0, v4
s_cbranch_execz .LBB0_5
v_add_nc_u32_e32 v6, -1, v0
v_cmp_ne_u32_e32 vcc_lo, 0, v0
v_lshlrev_b64 v[12:13], 3, v[2:3]
s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_1)
v_cndmask_b32_e32 v6, 0x1ff, v6, vcc_lo
v_ashrrev_i32_e32 v7, 31, v6
s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
v_lshlrev_b64 v[6:7], 12, v[6:7]
v_add_co_u32 v6, vcc_lo, s2, v6
s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
v_add_co_ci_u32_e32 v7, vcc_lo, s3, v7, vcc_lo
v_add_co_u32 v6, vcc_lo, v6, v12
s_delay_alu instid0(VALU_DEP_2)
v_add_co_ci_u32_e32 v7, vcc_lo, v7, v13, vcc_lo
v_lshlrev_b32_e32 v12, 3, v11
global_load_b64 v[6:7], v[6:7], off
v_mad_u32_u24 v12, v4, 0x50, v12
s_waitcnt vmcnt(0)
ds_store_b64 v12, v[6:7]
.LBB0_5:
s_or_b32 exec_lo, exec_lo, s4
v_add_nc_u32_e32 v6, 2, v5
s_mov_b32 s4, exec_lo
v_cmpx_lt_u32_e32 6, v5
s_cbranch_execz .LBB0_7
v_add_nc_u32_e32 v7, 1, v2
v_cmp_ne_u32_e32 vcc_lo, 0x1ff, v2
v_lshlrev_b64 v[14:15], 12, v[0:1]
s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_2)
v_cndmask_b32_e32 v12, 0, v7, vcc_lo
v_add_co_u32 v7, vcc_lo, s2, v14
s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3)
v_add_co_ci_u32_e32 v14, vcc_lo, s3, v15, vcc_lo
v_ashrrev_i32_e32 v13, 31, v12
s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
v_lshlrev_b64 v[12:13], 3, v[12:13]
v_add_co_u32 v12, vcc_lo, v7, v12
v_lshlrev_b32_e32 v7, 3, v6
s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_2)
v_add_co_ci_u32_e32 v13, vcc_lo, v14, v13, vcc_lo
v_mad_u32_u24 v7, v9, 0x50, v7
global_load_b64 v[12:13], v[12:13], off
s_waitcnt vmcnt(0)
ds_store_b64 v7, v[12:13]
.LBB0_7:
s_or_b32 exec_lo, exec_lo, s4
s_delay_alu instid0(SALU_CYCLE_1)
s_mov_b32 s4, exec_lo
v_cmpx_eq_u32_e32 0, v5
s_cbranch_execz .LBB0_9
v_add_nc_u32_e32 v7, -1, v2
v_cmp_ne_u32_e32 vcc_lo, 0, v2
v_lshlrev_b64 v[14:15], 12, v[0:1]
s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_2)
v_cndmask_b32_e32 v12, 0x1ff, v7, vcc_lo
v_add_co_u32 v7, vcc_lo, s2, v14
s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3)
v_add_co_ci_u32_e32 v14, vcc_lo, s3, v15, vcc_lo
v_ashrrev_i32_e32 v13, 31, v12
s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
v_lshlrev_b64 v[12:13], 3, v[12:13]
v_add_co_u32 v12, vcc_lo, v7, v12
v_lshlrev_b32_e32 v7, 3, v5
s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_2)
v_add_co_ci_u32_e32 v13, vcc_lo, v14, v13, vcc_lo
v_mad_u32_u24 v7, v9, 0x50, v7
global_load_b64 v[12:13], v[12:13], off
s_waitcnt vmcnt(0)
ds_store_b64 v7, v[12:13]
.LBB0_9:
s_or_b32 exec_lo, exec_lo, s4
v_lshlrev_b32_e32 v7, 3, v11
v_lshlrev_b32_e32 v5, 3, v5
v_lshlrev_b32_e32 v6, 3, v6
s_waitcnt lgkmcnt(0)
s_barrier
v_mad_u32_u24 v4, v4, 0x50, v7
v_mad_u32_u24 v7, v10, 0x50, v7
v_mad_u32_u24 v10, v9, 0x50, v5
v_mad_u32_u24 v11, v9, 0x50, v6
buffer_gl0_inv
ds_load_b64 v[4:5], v4
ds_load_b64 v[6:7], v7
ds_load_b64 v[9:10], v10
ds_load_b64 v[11:12], v11
s_load_b64 s[0:1], s[0:1], 0x8
v_lshlrev_b64 v[0:1], 12, v[0:1]
v_lshlrev_b64 v[2:3], 3, v[2:3]
s_waitcnt lgkmcnt(0)
v_add_f64 v[4:5], v[4:5], v[6:7]
v_add_f64 v[6:7], v[9:10], v[11:12]
ds_load_b64 v[8:9], v8
v_add_co_u32 v0, vcc_lo, s0, v0
v_add_co_ci_u32_e32 v1, vcc_lo, s1, v1, vcc_lo
s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
v_add_co_u32 v0, vcc_lo, v0, v2
v_add_co_ci_u32_e32 v1, vcc_lo, v1, v3, vcc_lo
s_waitcnt lgkmcnt(0)
v_fma_f64 v[4:5], v[8:9], -2.0, v[4:5]
v_fma_f64 v[6:7], v[8:9], -2.0, v[6:7]
s_delay_alu instid0(VALU_DEP_1)
v_add_f64 v[4:5], v[4:5], v[6:7]
global_store_b64 v[0:1], v[4:5], off
.LBB0_10:
s_nop 0
s_sendmsg sendmsg(MSG_DEALLOC_VGPRS)
s_endpgm
.section .rodata,"a",@progbits
.p2align 6, 0x0
.amdhsa_kernel _Z7lap_perPA512_dS0_
.amdhsa_group_segment_fixed_size 800
.amdhsa_private_segment_fixed_size 0
.amdhsa_kernarg_size 272
.amdhsa_user_sgpr_count 14
.amdhsa_user_sgpr_dispatch_ptr 0
.amdhsa_user_sgpr_queue_ptr 0
.amdhsa_user_sgpr_kernarg_segment_ptr 1
.amdhsa_user_sgpr_dispatch_id 0
.amdhsa_user_sgpr_private_segment_size 0
.amdhsa_wavefront_size32 1
.amdhsa_uses_dynamic_stack 0
.amdhsa_enable_private_segment 0
.amdhsa_system_sgpr_workgroup_id_x 1
.amdhsa_system_sgpr_workgroup_id_y 1
.amdhsa_system_sgpr_workgroup_id_z 0
.amdhsa_system_sgpr_workgroup_info 0
.amdhsa_system_vgpr_workitem_id 1
.amdhsa_next_free_vgpr 16
.amdhsa_next_free_sgpr 16
.amdhsa_float_round_mode_32 0
.amdhsa_float_round_mode_16_64 0
.amdhsa_float_denorm_mode_32 3
.amdhsa_float_denorm_mode_16_64 3
.amdhsa_dx10_clamp 1
.amdhsa_ieee_mode 1
.amdhsa_fp16_overflow 0
.amdhsa_workgroup_processor_mode 1
.amdhsa_memory_ordered 1
.amdhsa_forward_progress 0
.amdhsa_shared_vgpr_count 0
.amdhsa_exception_fp_ieee_invalid_op 0
.amdhsa_exception_fp_denorm_src 0
.amdhsa_exception_fp_ieee_div_zero 0
.amdhsa_exception_fp_ieee_overflow 0
.amdhsa_exception_fp_ieee_underflow 0
.amdhsa_exception_fp_ieee_inexact 0
.amdhsa_exception_int_div_zero 0
.end_amdhsa_kernel
.text
.Lfunc_end0:
.size _Z7lap_perPA512_dS0_, .Lfunc_end0-_Z7lap_perPA512_dS0_
.section .AMDGPU.csdata,"",@progbits
.text
.protected _Z7calc_dfPA512_dS0_
.globl _Z7calc_dfPA512_dS0_
.p2align 8
.type _Z7calc_dfPA512_dS0_,@function
_Z7calc_dfPA512_dS0_:
s_load_b32 s2, s[0:1], 0x1c
v_and_b32_e32 v2, 0x3ff, v0
v_bfe_u32 v4, v0, 10, 10
s_waitcnt lgkmcnt(0)
s_and_b32 s3, s2, 0xffff
s_lshr_b32 s2, s2, 16
v_mad_u64_u32 v[0:1], null, s14, s3, v[2:3]
v_mad_u64_u32 v[2:3], null, s15, s2, v[4:5]
s_mov_b32 s2, exec_lo
s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
v_max_i32_e32 v1, v0, v2
v_cmpx_gt_i32_e32 0x200, v1
s_cbranch_execz .LBB1_2
s_load_b128 s[0:3], s[0:1], 0x0
v_ashrrev_i32_e32 v1, 31, v0
v_ashrrev_i32_e32 v3, 31, v2
s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
v_lshlrev_b64 v[0:1], 12, v[0:1]
v_lshlrev_b64 v[2:3], 3, v[2:3]
s_waitcnt lgkmcnt(0)
s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_3)
v_add_co_u32 v4, vcc_lo, s0, v0
v_add_co_ci_u32_e32 v5, vcc_lo, s1, v1, vcc_lo
s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
v_add_co_u32 v4, vcc_lo, v4, v2
v_add_co_ci_u32_e32 v5, vcc_lo, v5, v3, vcc_lo
v_add_co_u32 v0, vcc_lo, s2, v0
v_add_co_ci_u32_e32 v1, vcc_lo, s3, v1, vcc_lo
global_load_b64 v[4:5], v[4:5], off
v_add_co_u32 v0, vcc_lo, v0, v2
v_add_co_ci_u32_e32 v1, vcc_lo, v1, v3, vcc_lo
global_load_b64 v[2:3], v[0:1], off
s_waitcnt vmcnt(1)
v_mul_f64 v[6:7], v[4:5], v[4:5]
s_waitcnt vmcnt(0)
s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
v_fma_f64 v[2:3], v[4:5], v[6:7], -v[2:3]
v_add_f64 v[2:3], v[2:3], -v[4:5]
global_store_b64 v[0:1], v[2:3], off
.LBB1_2:
s_nop 0
s_sendmsg sendmsg(MSG_DEALLOC_VGPRS)
s_endpgm
.section .rodata,"a",@progbits
.p2align 6, 0x0
.amdhsa_kernel _Z7calc_dfPA512_dS0_
.amdhsa_group_segment_fixed_size 0
.amdhsa_private_segment_fixed_size 0
.amdhsa_kernarg_size 272
.amdhsa_user_sgpr_count 14
.amdhsa_user_sgpr_dispatch_ptr 0
.amdhsa_user_sgpr_queue_ptr 0
.amdhsa_user_sgpr_kernarg_segment_ptr 1
.amdhsa_user_sgpr_dispatch_id 0
.amdhsa_user_sgpr_private_segment_size 0
.amdhsa_wavefront_size32 1
.amdhsa_uses_dynamic_stack 0
.amdhsa_enable_private_segment 0
.amdhsa_system_sgpr_workgroup_id_x 1
.amdhsa_system_sgpr_workgroup_id_y 1
.amdhsa_system_sgpr_workgroup_id_z 0
.amdhsa_system_sgpr_workgroup_info 0
.amdhsa_system_vgpr_workitem_id 1
.amdhsa_next_free_vgpr 8
.amdhsa_next_free_sgpr 16
.amdhsa_float_round_mode_32 0
.amdhsa_float_round_mode_16_64 0
.amdhsa_float_denorm_mode_32 3
.amdhsa_float_denorm_mode_16_64 3
.amdhsa_dx10_clamp 1
.amdhsa_ieee_mode 1
.amdhsa_fp16_overflow 0
.amdhsa_workgroup_processor_mode 1
.amdhsa_memory_ordered 1
.amdhsa_forward_progress 0
.amdhsa_shared_vgpr_count 0
.amdhsa_exception_fp_ieee_invalid_op 0
.amdhsa_exception_fp_denorm_src 0
.amdhsa_exception_fp_ieee_div_zero 0
.amdhsa_exception_fp_ieee_overflow 0
.amdhsa_exception_fp_ieee_underflow 0
.amdhsa_exception_fp_ieee_inexact 0
.amdhsa_exception_int_div_zero 0
.end_amdhsa_kernel
.text
.Lfunc_end1:
.size _Z7calc_dfPA512_dS0_, .Lfunc_end1-_Z7calc_dfPA512_dS0_
.section .AMDGPU.csdata,"",@progbits
.text
.protected _Z10update_phiPA512_dS0_
.globl _Z10update_phiPA512_dS0_
.p2align 8
.type _Z10update_phiPA512_dS0_,@function
_Z10update_phiPA512_dS0_:
s_load_b32 s2, s[0:1], 0x1c
v_and_b32_e32 v1, 0x3ff, v0
v_bfe_u32 v0, v0, 10, 10
s_waitcnt lgkmcnt(0)
s_and_b32 s3, s2, 0xffff
s_lshr_b32 s2, s2, 16
v_mad_u64_u32 v[2:3], null, s14, s3, v[1:2]
v_mad_u64_u32 v[4:5], null, s15, s2, v[0:1]
s_mov_b32 s2, exec_lo
s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
v_max_i32_e32 v3, v2, v4
v_cmpx_gt_i32_e32 0x200, v3
s_cbranch_execz .LBB2_10
s_load_b64 s[2:3], s[0:1], 0x0
v_ashrrev_i32_e32 v3, 31, v2
v_ashrrev_i32_e32 v5, 31, v4
s_waitcnt lgkmcnt(0)
s_barrier
buffer_gl0_inv
v_lshlrev_b64 v[8:9], 12, v[2:3]
v_lshlrev_b64 v[6:7], 3, v[4:5]
v_add_nc_u32_e32 v11, 1, v0
v_add_nc_u32_e32 v10, 2, v1
s_mov_b32 s4, exec_lo
s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_2) | instid1(VALU_DEP_2)
v_lshlrev_b32_e32 v12, 3, v11
v_add_co_u32 v8, vcc_lo, s2, v8
v_add_co_ci_u32_e32 v9, vcc_lo, s3, v9, vcc_lo
v_add_co_u32 v8, vcc_lo, v8, v6
s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_2) | instid1(VALU_DEP_1)
v_add_co_ci_u32_e32 v9, vcc_lo, v9, v7, vcc_lo
global_load_b64 v[13:14], v[8:9], off
v_add_nc_u32_e32 v9, 1, v1
v_mad_u32_u24 v8, v9, 0x50, v12
s_waitcnt vmcnt(0)
ds_store_b64 v8, v[13:14]
v_cmpx_lt_u32_e32 6, v1
s_cbranch_execz .LBB2_3
v_add_nc_u32_e32 v13, 1, v2
v_cmp_ne_u32_e32 vcc_lo, 0x1ff, v2
v_mad_u32_u24 v12, v10, 0x50, v12
s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_1)
v_cndmask_b32_e32 v13, 0, v13, vcc_lo
v_ashrrev_i32_e32 v14, 31, v13
s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
v_lshlrev_b64 v[13:14], 12, v[13:14]
v_add_co_u32 v13, vcc_lo, s2, v13
s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
v_add_co_ci_u32_e32 v14, vcc_lo, s3, v14, vcc_lo
v_add_co_u32 v6, vcc_lo, v13, v6
s_delay_alu instid0(VALU_DEP_2)
v_add_co_ci_u32_e32 v7, vcc_lo, v14, v7, vcc_lo
global_load_b64 v[6:7], v[6:7], off
s_waitcnt vmcnt(0)
ds_store_b64 v12, v[6:7]
.LBB2_3:
s_or_b32 exec_lo, exec_lo, s4
s_delay_alu instid0(SALU_CYCLE_1)
s_mov_b32 s4, exec_lo
v_cmpx_eq_u32_e32 0, v1
s_cbranch_execz .LBB2_5
v_add_nc_u32_e32 v6, -1, v2
v_cmp_ne_u32_e32 vcc_lo, 0, v2
v_lshlrev_b64 v[12:13], 3, v[4:5]
s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_1)
v_cndmask_b32_e32 v6, 0x1ff, v6, vcc_lo
v_ashrrev_i32_e32 v7, 31, v6
s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
v_lshlrev_b64 v[6:7], 12, v[6:7]
v_add_co_u32 v6, vcc_lo, s2, v6
s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
v_add_co_ci_u32_e32 v7, vcc_lo, s3, v7, vcc_lo
v_add_co_u32 v6, vcc_lo, v6, v12
s_delay_alu instid0(VALU_DEP_2)
v_add_co_ci_u32_e32 v7, vcc_lo, v7, v13, vcc_lo
v_lshlrev_b32_e32 v12, 3, v11
global_load_b64 v[6:7], v[6:7], off
v_mad_u32_u24 v12, v1, 0x50, v12
s_waitcnt vmcnt(0)
ds_store_b64 v12, v[6:7]
.LBB2_5:
s_or_b32 exec_lo, exec_lo, s4
v_add_nc_u32_e32 v6, 2, v0
s_mov_b32 s4, exec_lo
v_cmpx_lt_u32_e32 6, v0
s_cbranch_execz .LBB2_7
v_add_nc_u32_e32 v7, 1, v4
v_cmp_ne_u32_e32 vcc_lo, 0x1ff, v4
v_lshlrev_b64 v[14:15], 12, v[2:3]
s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_2)
v_cndmask_b32_e32 v12, 0, v7, vcc_lo
v_add_co_u32 v7, vcc_lo, s2, v14
s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3)
v_add_co_ci_u32_e32 v14, vcc_lo, s3, v15, vcc_lo
v_ashrrev_i32_e32 v13, 31, v12
s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
v_lshlrev_b64 v[12:13], 3, v[12:13]
v_add_co_u32 v12, vcc_lo, v7, v12
v_lshlrev_b32_e32 v7, 3, v6
s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_2)
v_add_co_ci_u32_e32 v13, vcc_lo, v14, v13, vcc_lo
v_mad_u32_u24 v7, v9, 0x50, v7
global_load_b64 v[12:13], v[12:13], off
s_waitcnt vmcnt(0)
ds_store_b64 v7, v[12:13]
.LBB2_7:
s_or_b32 exec_lo, exec_lo, s4
s_delay_alu instid0(SALU_CYCLE_1)
s_mov_b32 s4, exec_lo
v_cmpx_eq_u32_e32 0, v0
s_cbranch_execz .LBB2_9
v_add_nc_u32_e32 v7, -1, v4
v_cmp_ne_u32_e32 vcc_lo, 0, v4
v_lshlrev_b64 v[14:15], 12, v[2:3]
s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_2)
v_cndmask_b32_e32 v12, 0x1ff, v7, vcc_lo
v_add_co_u32 v7, vcc_lo, s2, v14
s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3)
v_add_co_ci_u32_e32 v14, vcc_lo, s3, v15, vcc_lo
v_ashrrev_i32_e32 v13, 31, v12
s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
v_lshlrev_b64 v[12:13], 3, v[12:13]
v_add_co_u32 v12, vcc_lo, v7, v12
v_lshlrev_b32_e32 v7, 3, v0
s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_2)
v_add_co_ci_u32_e32 v13, vcc_lo, v14, v13, vcc_lo
v_mad_u32_u24 v7, v9, 0x50, v7
global_load_b64 v[12:13], v[12:13], off
s_waitcnt vmcnt(0)
ds_store_b64 v7, v[12:13]
.LBB2_9:
s_or_b32 exec_lo, exec_lo, s4
s_load_b64 s[0:1], s[0:1], 0x8
v_lshlrev_b64 v[2:3], 12, v[2:3]
v_lshlrev_b64 v[4:5], 3, v[4:5]
s_waitcnt lgkmcnt(0)
s_barrier
buffer_gl0_inv
v_lshlrev_b32_e32 v7, 3, v11
v_lshlrev_b32_e32 v0, 3, v0
v_lshlrev_b32_e32 v6, 3, v6
s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_1) | instid1(VALU_DEP_4)
v_mad_u32_u24 v1, v1, 0x50, v7
v_mad_u32_u24 v7, v10, 0x50, v7
v_mad_u32_u24 v10, v9, 0x50, v0
s_delay_alu instid0(VALU_DEP_4) | instskip(SKIP_3) | instid1(VALU_DEP_2)
v_mad_u32_u24 v11, v9, 0x50, v6
v_add_co_u32 v2, vcc_lo, s0, v2
v_add_co_ci_u32_e32 v3, vcc_lo, s1, v3, vcc_lo
s_mov_b32 s1, 0x3f847ae1
v_add_co_u32 v2, vcc_lo, v2, v4
s_delay_alu instid0(VALU_DEP_2)
v_add_co_ci_u32_e32 v3, vcc_lo, v3, v5, vcc_lo
s_mov_b32 s0, 0x47ae147b
global_load_b64 v[4:5], v[2:3], off
ds_load_b64 v[0:1], v1
ds_load_b64 v[6:7], v7
ds_load_b64 v[9:10], v10
ds_load_b64 v[11:12], v11
s_waitcnt lgkmcnt(2)
v_add_f64 v[0:1], v[0:1], v[6:7]
s_waitcnt lgkmcnt(0)
v_add_f64 v[6:7], v[9:10], v[11:12]
ds_load_b64 v[8:9], v8
s_waitcnt lgkmcnt(0)
v_fma_f64 v[0:1], v[8:9], -2.0, v[0:1]
v_fma_f64 v[6:7], v[8:9], -2.0, v[6:7]
s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
v_add_f64 v[0:1], v[0:1], v[6:7]
s_waitcnt vmcnt(0)
v_fma_f64 v[0:1], v[0:1], s[0:1], v[4:5]
global_store_b64 v[2:3], v[0:1], off
.LBB2_10:
s_nop 0
s_sendmsg sendmsg(MSG_DEALLOC_VGPRS)
s_endpgm
.section .rodata,"a",@progbits
.p2align 6, 0x0
.amdhsa_kernel _Z10update_phiPA512_dS0_
.amdhsa_group_segment_fixed_size 800
.amdhsa_private_segment_fixed_size 0
.amdhsa_kernarg_size 272
.amdhsa_user_sgpr_count 14
.amdhsa_user_sgpr_dispatch_ptr 0
.amdhsa_user_sgpr_queue_ptr 0
.amdhsa_user_sgpr_kernarg_segment_ptr 1
.amdhsa_user_sgpr_dispatch_id 0
.amdhsa_user_sgpr_private_segment_size 0
.amdhsa_wavefront_size32 1
.amdhsa_uses_dynamic_stack 0
.amdhsa_enable_private_segment 0
.amdhsa_system_sgpr_workgroup_id_x 1
.amdhsa_system_sgpr_workgroup_id_y 1
.amdhsa_system_sgpr_workgroup_id_z 0
.amdhsa_system_sgpr_workgroup_info 0
.amdhsa_system_vgpr_workitem_id 1
.amdhsa_next_free_vgpr 16
.amdhsa_next_free_sgpr 16
.amdhsa_float_round_mode_32 0
.amdhsa_float_round_mode_16_64 0
.amdhsa_float_denorm_mode_32 3
.amdhsa_float_denorm_mode_16_64 3
.amdhsa_dx10_clamp 1
.amdhsa_ieee_mode 1
.amdhsa_fp16_overflow 0
.amdhsa_workgroup_processor_mode 1
.amdhsa_memory_ordered 1
.amdhsa_forward_progress 0
.amdhsa_shared_vgpr_count 0
.amdhsa_exception_fp_ieee_invalid_op 0
.amdhsa_exception_fp_denorm_src 0
.amdhsa_exception_fp_ieee_div_zero 0
.amdhsa_exception_fp_ieee_overflow 0
.amdhsa_exception_fp_ieee_underflow 0
.amdhsa_exception_fp_ieee_inexact 0
.amdhsa_exception_int_div_zero 0
.end_amdhsa_kernel
.text
.Lfunc_end2:
.size _Z10update_phiPA512_dS0_, .Lfunc_end2-_Z10update_phiPA512_dS0_
.section .AMDGPU.csdata,"",@progbits
.text
.p2alignl 7, 3214868480
.fill 96, 4, 3214868480
.type __hip_cuid_,@object
.section .bss,"aw",@nobits
.globl __hip_cuid_
__hip_cuid_:
.byte 0
.size __hip_cuid_, 1
.ident "AMD clang version 18.0.0git (https://github.com/RadeonOpenCompute/llvm-project roc-6.3.2 25012 e5bf7e55c91490b07c49d8960fa7983d864936c4)"
.section ".note.GNU-stack","",@progbits
.addrsig
.addrsig_sym __hip_cuid_
.amdgpu_metadata
---
amdhsa.kernels:
- .args:
- .address_space: global
.offset: 0
.size: 8
.value_kind: global_buffer
- .address_space: global
.offset: 8
.size: 8
.value_kind: global_buffer
- .offset: 16
.size: 4
.value_kind: hidden_block_count_x
- .offset: 20
.size: 4
.value_kind: hidden_block_count_y
- .offset: 24
.size: 4
.value_kind: hidden_block_count_z
- .offset: 28
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.group_segment_fixed_size: 800
.kernarg_segment_align: 8
.kernarg_segment_size: 272
.language: OpenCL C
.language_version:
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- 0
.max_flat_workgroup_size: 1024
.name: _Z7lap_perPA512_dS0_
.private_segment_fixed_size: 0
.sgpr_count: 18
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- .args:
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.group_segment_fixed_size: 0
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.language: OpenCL C
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- .args:
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.language: OpenCL C
.language_version:
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.name: _Z10update_phiPA512_dS0_
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.sgpr_spill_count: 0
.symbol: _Z10update_phiPA512_dS0_.kd
.uniform_work_group_size: 1
.uses_dynamic_stack: false
.vgpr_count: 16
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.wavefront_size: 32
.workgroup_processor_mode: 1
amdhsa.target: amdgcn-amd-amdhsa--gfx1100
amdhsa.version:
- 1
- 2
...
.end_amdgpu_metadata |
You are a helpful coding assistant specialized in converting CUDA source code to CUDA device assembly. | #include <iostream>
#include <vector>
#include <functional>
#include <algorithm>
#include <math.h>
#include <cassert>
#include <stdio.h>
#include <stdlib.h>
using std::vector;
/* Dynamic random-access memory (DRAM) is a type of random-access semiconductor memory that stores each bit of data in a memory cell consisting of a tiny capacitor and a transistor. VERY SLOW
Cache is easier to access (faster), smaller than the main memeory, and located closer to the processor core. L1 cache is the primary cache..
- Share Memory (scratchpad) -- User managed L1 cache / Private per threadblock
- Cache Tiling: Large Input --> Can't fit all into cache since its smaller than main memory. Puts only pieces of the large inputs into the cache
- Large input and reducing it at each iteration. Basically working on everything chunks at a time.
- A & B Matrix ---> A[y][k] * A[k][x]
*/
// 16 x 16 matrix
const int SHMEM_SIZE = 1<<10;
const int N = 1<<10;
__global__ void tiledMatrixMul(const int *a, const int *b, int *c) {
// Compute each thread's global row and column index
int row = blockIdx.y * blockDim.y + threadIdx.y;
int col = blockIdx.x * blockDim.x + threadIdx.x;
// Statically allocated shared memory
__shared__ int s_a[SHMEM_SIZE];
__shared__ int s_b[SHMEM_SIZE];
// Accumulate in temporary variable
int tmp = 0;
// Sweep tile across matrix
for (int i = 0; i < N; i += blockDim.x) {
// Load in elements for this tile
s_a[threadIdx.y * blockDim.x + threadIdx.x] = a[row * N + i + threadIdx.x];
s_b[threadIdx.y * blockDim.x + threadIdx.x] =
b[i * N + threadIdx.y * N + col];
// Wait for both tiles to be loaded in before doing computation
__syncthreads();
// Do matrix multiplication on the small matrix
for (int j = 0; j < blockDim.x; j++) {
tmp +=
s_a[threadIdx.y * blockDim.x + j] * s_b[j * blockDim.x + threadIdx.x];
}
// Wait for all threads to finish using current tiles before loading in new
// ones
__syncthreads();
}
// Write back results
c[row * N + col] = tmp;
}
// Check result on the CPU
void verify_result(vector<int> &a, vector<int> &b, vector<int> &c) {
// For every row...
for (int i = 0; i < N; i++) {
// For every column...
for (int j = 0; j < N; j++) {
// For every element in the row-column pair
int tmp = 0;
for (int k = 0; k < N; k++) {
// Accumulate the partial results
tmp += a[i * N + k] * b[k * N + j];
}
// Check against the CPU result
assert(tmp == c[i * N + j]);
}
}
}
int main(){
// Matrix 1024x1024
// Size in bytes
size_t bytes = N*N *sizeof(int);
// Allocate to host
vector<int>h_a(N*N);
vector<int>h_b(N*N);
vector<int>h_c(N*N);
// Initialize matrix
std::generate(h_a.begin(), h_a.end(), [](){return rand() % 100;});
std::generate(h_b.begin(), h_b.end(), [](){return rand() % 100;});
// Device pointers
int *d_a, *d_b,* d_c;
// Allocate memory to gpu
cudaMalloc(&d_a,bytes);
cudaMalloc(&d_b,bytes);
cudaMalloc(&d_c,bytes);
// Copy memory over to gpu
cudaMemcpy(d_a,h_a.data(), bytes, cudaMemcpyHostToDevice);
cudaMemcpy(d_b,h_b.data(), bytes, cudaMemcpyHostToDevice);
cudaMemcpy(d_c,h_c.data(), bytes, cudaMemcpyHostToDevice);
int THREADS = 32;
int BLOCKS = (int)ceil(N/THREADS);
// Use a 3D object
dim3 blocks(BLOCKS, BLOCKS);
dim3 threads(THREADS, THREADS);
/* // Launch kernel */
tiledMatrixMul<<<blocks, threads>>> (d_a,d_b,d_c );
// Back to cpu
cudaMemcpy(h_c.data(),d_c, bytes,cudaMemcpyDeviceToHost);
// check results
verify_result(h_a,h_b,h_c);
cudaFree(d_a);
cudaFree(d_b);
cudaFree(d_c);
printf("Completed.");
return 0;
} | code for sm_80
Function : _Z14tiledMatrixMulPKiS0_Pi
.headerflags @"EF_CUDA_TEXMODE_UNIFIED EF_CUDA_64BIT_ADDRESS EF_CUDA_SM80 EF_CUDA_VIRTUAL_SM(EF_CUDA_SM80)"
/*0000*/ MOV R1, c[0x0][0x28] ; /* 0x00000a0000017a02 */
/* 0x000fe40000000f00 */
/*0010*/ S2R R9, SR_CTAID.Y ; /* 0x0000000000097919 */
/* 0x000e220000002600 */
/*0020*/ IMAD.MOV.U32 R8, RZ, RZ, c[0x0][0x0] ; /* 0x00000000ff087624 */
/* 0x000fe200078e00ff */
/*0030*/ HFMA2.MMA R7, -RZ, RZ, 0, 0 ; /* 0x00000000ff077435 */
/* 0x000fe200000001ff */
/*0040*/ IMAD.MOV.U32 R18, RZ, RZ, RZ ; /* 0x000000ffff127224 */
/* 0x000fe200078e00ff */
/*0050*/ S2R R0, SR_TID.Y ; /* 0x0000000000007919 */
/* 0x000e220000002200 */
/*0060*/ ULDC.64 UR4, c[0x0][0x118] ; /* 0x0000460000047ab9 */
/* 0x000fe20000000a00 */
/*0070*/ IADD3 R2, R8.reuse, -0x1, RZ ; /* 0xffffffff08027810 */
/* 0x040fe40007ffe0ff */
/*0080*/ S2R R3, SR_CTAID.X ; /* 0x0000000000037919 */
/* 0x000e620000002500 */
/*0090*/ LOP3.LUT R8, R8, 0x3, RZ, 0xc0, !PT ; /* 0x0000000308087812 */
/* 0x000fe400078ec0ff */
/*00a0*/ ISETP.GE.U32.AND P2, PT, R2, 0x3, PT ; /* 0x000000030200780c */
/* 0x000fe20003f46070 */
/*00b0*/ S2R R6, SR_TID.X ; /* 0x0000000000067919 */
/* 0x000e620000002100 */
/*00c0*/ IADD3 R15, -R8, c[0x0][0x0], RZ ; /* 0x00000000080f7a10 */
/* 0x000fe20007ffe1ff */
/*00d0*/ IMAD R9, R9, c[0x0][0x4], R0 ; /* 0x0000010009097a24 */
/* 0x001fc400078e0200 */
/*00e0*/ IMAD R11, R0, c[0x0][0x0], RZ ; /* 0x00000000000b7a24 */
/* 0x000fca00078e02ff */
/*00f0*/ LEA R16, R11, 0x8, 0x2 ; /* 0x000000080b107811 */
/* 0x000fe200078e10ff */
/*0100*/ IMAD R10, R3, c[0x0][0x0], R6.reuse ; /* 0x00000000030a7a24 */
/* 0x102fe200078e0206 */
/*0110*/ LEA R12, R6, 0x1000, 0x2 ; /* 0x00001000060c7811 */
/* 0x000fe200078e10ff */
/*0120*/ IMAD.IADD R13, R11, 0x1, R6 ; /* 0x000000010b0d7824 */
/* 0x000fe200078e0206 */
/*0130*/ LEA R14, R9, R6, 0xa ; /* 0x00000006090e7211 */
/* 0x000fc800078e50ff */
/*0140*/ IADD3 R3, R0, R7, RZ ; /* 0x0000000700037210 */
/* 0x000fe20007ffe0ff */
/*0150*/ IMAD.IADD R2, R14, 0x1, R7 ; /* 0x000000010e027824 */
/* 0x000fe200078e0207 */
/*0160*/ MOV R17, 0x4 ; /* 0x0000000400117802 */
/* 0x000fc60000000f00 */
/*0170*/ IMAD R4, R3, 0x400, R10 ; /* 0x0000040003047824 */
/* 0x000fe400078e020a */
/*0180*/ IMAD.WIDE.U32 R2, R2, R17, c[0x0][0x160] ; /* 0x0000580002027625 */
/* 0x000fc800078e0011 */
/*0190*/ IMAD.WIDE.U32 R4, R4, R17, c[0x0][0x168] ; /* 0x00005a0004047625 */
/* 0x000fe400078e0011 */
/*01a0*/ LDG.E R2, [R2.64] ; /* 0x0000000402027981 */
/* 0x000ea8000c1e1900 */
/*01b0*/ LDG.E R4, [R4.64] ; /* 0x0000000404047981 */
/* 0x000ee2000c1e1900 */
/*01c0*/ ISETP.NE.AND P0, PT, RZ, c[0x0][0x0], PT ; /* 0x00000000ff007a0c */
/* 0x000fe40003f05270 */
/*01d0*/ IADD3 R7, R7, c[0x0][0x0], RZ ; /* 0x0000000007077a10 */
/* 0x000fc80007ffe0ff */
/*01e0*/ ISETP.GE.AND P1, PT, R7, 0x400, PT ; /* 0x000004000700780c */
/* 0x000fe20003f26270 */
/*01f0*/ STS [R13.X4], R2 ; /* 0x000000020d007388 */
/* 0x0041e80000004800 */
/*0200*/ STS [R13.X4+0x1000], R4 ; /* 0x001000040d007388 */
/* 0x0081e80000004800 */
/*0210*/ BAR.SYNC.DEFER_BLOCKING 0x0 ; /* 0x0000000000007b1d */
/* 0x000fec0000010000 */
/*0220*/ @!P0 BRA 0xc90 ; /* 0x00000a6000008947 */
/* 0x000fea0003800000 */
/*0230*/ HFMA2.MMA R2, -RZ, RZ, 0, 0 ; /* 0x00000000ff027435 */
/* 0x001fe200000001ff */
/*0240*/ @!P2 BRA 0xb40 ; /* 0x000008f00000a947 */
/* 0x000fea0003800000 */
/*0250*/ ISETP.GT.AND P0, PT, R15, RZ, PT ; /* 0x000000ff0f00720c */
/* 0x000fe20003f04270 */
/*0260*/ IMAD.MOV.U32 R2, RZ, RZ, RZ ; /* 0x000000ffff027224 */
/* 0x000fe200078e00ff */
/*0270*/ MOV R3, R16 ; /* 0x0000001000037202 */
/* 0x000fe20000000f00 */
/*0280*/ IMAD.MOV.U32 R24, RZ, RZ, R12 ; /* 0x000000ffff187224 */
/* 0x000fe200078e000c */
/*0290*/ MOV R4, R15 ; /* 0x0000000f00047202 */
/* 0x000fd20000000f00 */
/*02a0*/ @!P0 BRA 0x9e0 ; /* 0x0000073000008947 */
/* 0x000fea0003800000 */
/*02b0*/ ISETP.GT.AND P3, PT, R4, 0xc, PT ; /* 0x0000000c0400780c */
/* 0x000fe40003f64270 */
/*02c0*/ PLOP3.LUT P0, PT, PT, PT, PT, 0x80, 0x0 ; /* 0x000000000000781c */
/* 0x000fd60003f0f070 */
/*02d0*/ @!P3 BRA 0x750 ; /* 0x000004700000b947 */
/* 0x000fea0003800000 */
/*02e0*/ PLOP3.LUT P0, PT, PT, PT, PT, 0x8, 0x0 ; /* 0x000000000000781c */
/* 0x000fe40003f0e170 */
/*02f0*/ LDS R21, [R24] ; /* 0x0000000018157984 */
/* 0x0001e20000000800 */
/*0300*/ IMAD.MOV.U32 R5, RZ, RZ, c[0x0][0x0] ; /* 0x00000000ff057624 */
/* 0x000fe200078e00ff */
/*0310*/ IADD3 R4, R4, -0x10, RZ ; /* 0xfffffff004047810 */
/* 0x000fe40007ffe0ff */
/*0320*/ LDS R25, [R3+-0x8] ; /* 0xfffff80003197984 */
/* 0x000e620000000800 */
/*0330*/ IADD3 R2, R2, 0x10, RZ ; /* 0x0000001002027810 */
/* 0x000fe40007ffe0ff */
/*0340*/ LEA R26, R5, R24, 0x2 ; /* 0x00000018051a7211 */
/* 0x000fe200078e10ff */
/*0350*/ LDS R23, [R3+-0x4] ; /* 0xfffffc0003177984 */
/* 0x000fe20000000800 */
/*0360*/ ISETP.GT.AND P3, PT, R4, 0xc, PT ; /* 0x0000000c0400780c */
/* 0x000fc60003f64270 */
/*0370*/ LDS R22, [R26] ; /* 0x000000001a167984 */
/* 0x0004e20000000800 */
/*0380*/ IMAD R28, R5, 0x4, R26 ; /* 0x00000004051c7824 */
/* 0x000fc600078e021a */
/*0390*/ LDS R19, [R3] ; /* 0x0000000003137984 */
/* 0x000fe40000000800 */
/*03a0*/ LEA R27, R5.reuse, R28, 0x2 ; /* 0x0000001c051b7211 */
/* 0x040fe400078e10ff */
/*03b0*/ LDS R20, [R28] ; /* 0x000000001c147984 */
/* 0x0009660000000800 */
/*03c0*/ IMAD R24, R5, 0x4, R27 ; /* 0x0000000405187824 */
/* 0x001fca00078e021b */
/*03d0*/ LEA R26, R5, R24, 0x2 ; /* 0x00000018051a7211 */
/* 0x004fca00078e10ff */
/*03e0*/ IMAD R28, R5, 0x4, R26 ; /* 0x00000004051c7824 */
/* 0x010fe400078e021a */
/*03f0*/ IMAD R25, R21, R25, R18 ; /* 0x0000001915197224 */
/* 0x002fe400078e0212 */
/*0400*/ LDS R18, [R3+0x4] ; /* 0x0000040003127984 */
/* 0x000fe80000000800 */
/*0410*/ LDS R21, [R27] ; /* 0x000000001b157984 */
/* 0x0000620000000800 */
/*0420*/ IMAD R25, R22, R23, R25 ; /* 0x0000001716197224 */
/* 0x008fc600078e0219 */
/*0430*/ LDS R22, [R3+0x8] ; /* 0x0000080003167984 */
/* 0x000fe80000000800 */
/*0440*/ LDS R23, [R24] ; /* 0x0000000018177984 */
/* 0x0004e20000000800 */
/*0450*/ LEA R27, R5.reuse, R28, 0x2 ; /* 0x0000001c051b7211 */
/* 0x041fe200078e10ff */
/*0460*/ IMAD R25, R20, R19, R25 ; /* 0x0000001314197224 */
/* 0x020fe400078e0219 */
/*0470*/ LDS R19, [R3+0xc] ; /* 0x00000c0003137984 */
/* 0x000fe80000000800 */
/*0480*/ LDS R20, [R26] ; /* 0x000000001a147984 */
/* 0x0001220000000800 */
/*0490*/ IMAD R24, R5, 0x4, R27 ; /* 0x0000000405187824 */
/* 0x004fca00078e021b */
/*04a0*/ LEA R26, R5, R24, 0x2 ; /* 0x00000018051a7211 */
/* 0x001fe200078e10ff */
/*04b0*/ IMAD R25, R21, R18, R25 ; /* 0x0000001215197224 */
/* 0x002fe400078e0219 */
/*04c0*/ LDS R18, [R3+0x10] ; /* 0x0000100003127984 */
/* 0x000fe80000000800 */
/*04d0*/ LDS R21, [R28] ; /* 0x000000001c157984 */
/* 0x0000620000000800 */
/*04e0*/ IMAD R25, R23, R22, R25 ; /* 0x0000001617197224 */
/* 0x008fc600078e0219 */
/*04f0*/ LDS R22, [R3+0x14] ; /* 0x0000140003167984 */
/* 0x000fe80000000800 */
/*0500*/ LDS R23, [R27] ; /* 0x000000001b177984 */
/* 0x0004e20000000800 */
/*0510*/ IMAD R28, R5.reuse, 0x4, R26 ; /* 0x00000004051c7824 */
/* 0x041fe400078e021a */
/*0520*/ IMAD R25, R20, R19, R25 ; /* 0x0000001314197224 */
/* 0x010fe400078e0219 */
/*0530*/ LDS R19, [R3+0x18] ; /* 0x0000180003137984 */
/* 0x000fe20000000800 */
/*0540*/ LEA R27, R5, R28, 0x2 ; /* 0x0000001c051b7211 */
/* 0x004fc600078e10ff */
/*0550*/ LDS R20, [R24] ; /* 0x0000000018147984 */
/* 0x0000a40000000800 */
/*0560*/ IMAD R24, R5, 0x4, R27 ; /* 0x0000000405187824 */
/* 0x001fe400078e021b */
/*0570*/ IMAD R25, R21, R18, R25 ; /* 0x0000001215197224 */
/* 0x002fe400078e0219 */
/*0580*/ LDS R18, [R3+0x1c] ; /* 0x00001c0003127984 */
/* 0x000fe80000000800 */
/*0590*/ LDS R21, [R26] ; /* 0x000000001a157984 */
/* 0x0000620000000800 */
/*05a0*/ IMAD R25, R23, R22, R25 ; /* 0x0000001617197224 */
/* 0x008fc600078e0219 */
/*05b0*/ LDS R22, [R3+0x20] ; /* 0x0000200003167984 */
/* 0x000fe80000000800 */
/*05c0*/ LDS R23, [R28] ; /* 0x000000001c177984 */
/* 0x0007220000000800 */
/*05d0*/ LEA R26, R5.reuse, R24, 0x2 ; /* 0x00000018051a7211 */
/* 0x041fe200078e10ff */
/*05e0*/ IMAD R25, R20, R19, R25 ; /* 0x0000001314197224 */
/* 0x004fe400078e0219 */
/*05f0*/ LDS R19, [R3+0x24] ; /* 0x0000240003137984 */
/* 0x000fe40000000800 */
/*0600*/ IMAD R28, R5, 0x4, R26 ; /* 0x00000004051c7824 */
/* 0x008fc400078e021a */
/*0610*/ LDS R20, [R27] ; /* 0x000000001b147984 */
/* 0x000e280000000800 */
/*0620*/ LDS R26, [R26] ; /* 0x000000001a1a7984 */
/* 0x000fe20000000800 */
/*0630*/ IMAD R25, R21, R18, R25 ; /* 0x0000001215197224 */
/* 0x002fc600078e0219 */
/*0640*/ LDS R18, [R3+0x28] ; /* 0x0000280003127984 */
/* 0x000fe80000000800 */
/*0650*/ LDS R21, [R24] ; /* 0x0000000018157984 */
/* 0x0002a20000000800 */
/*0660*/ IMAD R22, R23, R22, R25 ; /* 0x0000001617167224 */
/* 0x010fc600078e0219 */
/*0670*/ LDS R25, [R3+0x30] ; /* 0x0000300003197984 */
/* 0x000fe20000000800 */
/*0680*/ IMAD R23, R20, R19, R22 ; /* 0x0000001314177224 */
/* 0x001fe200078e0216 */
/*0690*/ LEA R20, R5.reuse, R28, 0x2 ; /* 0x0000001c05147211 */
/* 0x040fe400078e10ff */
/*06a0*/ LDS R22, [R3+0x2c] ; /* 0x00002c0003167984 */
/* 0x000e280000000800 */
/*06b0*/ LDS R19, [R28] ; /* 0x000000001c137984 */
/* 0x000ee20000000800 */
/*06c0*/ IMAD R24, R5, 0x4, R20 ; /* 0x0000000405187824 */
/* 0x002fe400078e0214 */
/*06d0*/ IMAD R21, R21, R18, R23 ; /* 0x0000001215157224 */
/* 0x004fc400078e0217 */
/*06e0*/ LDS R23, [R3+0x34] ; /* 0x0000340003177984 */
/* 0x0003e80000000800 */
/*06f0*/ LDS R18, [R20] ; /* 0x0000000014127984 */
/* 0x000ea20000000800 */
/*0700*/ IADD3 R3, R3, 0x40, RZ ; /* 0x0000004003037810 */
/* 0x002fe20007ffe0ff */
/*0710*/ IMAD R22, R26, R22, R21 ; /* 0x000000161a167224 */
/* 0x001fc800078e0215 */
/*0720*/ IMAD R19, R19, R25, R22 ; /* 0x0000001913137224 */
/* 0x008fc800078e0216 */
/*0730*/ IMAD R18, R18, R23, R19 ; /* 0x0000001712127224 */
/* 0x004fe200078e0213 */
/*0740*/ @P3 BRA 0x2f0 ; /* 0xfffffba000003947 */
/* 0x000fea000383ffff */
/*0750*/ ISETP.GT.AND P3, PT, R4, 0x4, PT ; /* 0x000000040400780c */
/* 0x000fda0003f64270 */
/*0760*/ @!P3 BRA 0x9c0 ; /* 0x000002500000b947 */
/* 0x000fea0003800000 */
/*0770*/ MOV R5, c[0x0][0x0] ; /* 0x0000000000057a02 */
/* 0x000fe20000000f00 */
/*0780*/ LDS R23, [R24] ; /* 0x0000000018177984 */
/* 0x0001e20000000800 */
/*0790*/ PLOP3.LUT P0, PT, PT, PT, PT, 0x8, 0x0 ; /* 0x000000000000781c */
/* 0x000fe40003f0e170 */
/*07a0*/ LEA R26, R5.reuse, R24, 0x2 ; /* 0x00000018051a7211 */
/* 0x040fe200078e10ff */
/*07b0*/ LDS R25, [R3+-0x8] ; /* 0xfffff80003197984 */
/* 0x000e620000000800 */
/*07c0*/ IADD3 R2, R2, 0x8, RZ ; /* 0x0000000802027810 */
/* 0x000fe40007ffe0ff */
/*07d0*/ IADD3 R4, R4, -0x8, RZ ; /* 0xfffffff804047810 */
/* 0x000fe20007ffe0ff */
/*07e0*/ LDS R21, [R3+-0x4] ; /* 0xfffffc0003157984 */
/* 0x000fe20000000800 */
/*07f0*/ IMAD R28, R5, 0x4, R26 ; /* 0x00000004051c7824 */
/* 0x000fc600078e021a */
/*0800*/ LDS R22, [R26] ; /* 0x000000001a167984 */
/* 0x0004e40000000800 */
/*0810*/ LEA R27, R5.reuse, R28, 0x2 ; /* 0x0000001c051b7211 */
/* 0x040fe400078e10ff */
/*0820*/ LDS R19, [R3] ; /* 0x0000000003137984 */
/* 0x000fe40000000800 */
/*0830*/ LEA R24, R5.reuse, R27, 0x2 ; /* 0x0000001b05187211 */
/* 0x041fe400078e10ff */
/*0840*/ LDS R20, [R28] ; /* 0x000000001c147984 */
/* 0x0001260000000800 */
/*0850*/ IMAD R26, R5, 0x4, R24 ; /* 0x00000004051a7824 */
/* 0x004fca00078e0218 */
/*0860*/ LEA R28, R5, R26, 0x2 ; /* 0x0000001a051c7211 */
/* 0x001fe400078e10ff */
/*0870*/ LDS R26, [R26] ; /* 0x000000001a1a7984 */
/* 0x000fe20000000800 */
/*0880*/ IMAD R25, R23, R25, R18 ; /* 0x0000001917197224 */
/* 0x002fc600078e0212 */
/*0890*/ LDS R18, [R3+0x4] ; /* 0x0000040003127984 */
/* 0x000fe80000000800 */
/*08a0*/ LDS R23, [R27] ; /* 0x000000001b177984 */
/* 0x000e220000000800 */
/*08b0*/ IMAD R25, R22, R21, R25 ; /* 0x0000001516197224 */
/* 0x008fc600078e0219 */
/*08c0*/ LDS R21, [R3+0x8] ; /* 0x0000080003157984 */
/* 0x000fe80000000800 */
/*08d0*/ LDS R22, [R24] ; /* 0x0000000018167984 */
/* 0x0002a20000000800 */
/*08e0*/ IMAD R19, R20, R19, R25 ; /* 0x0000001314137224 */
/* 0x010fe200078e0219 */
/*08f0*/ LEA R20, R5.reuse, R28, 0x2 ; /* 0x0000001c05147211 */
/* 0x040fe400078e10ff */
/*0900*/ LDS R25, [R3+0x10] ; /* 0x0000100003197984 */
/* 0x000fe60000000800 */
/*0910*/ IMAD R24, R5, 0x4, R20 ; /* 0x0000000405187824 */
/* 0x002fc400078e0214 */
/*0920*/ IMAD R23, R23, R18, R19 ; /* 0x0000001217177224 */
/* 0x001fe400078e0213 */
/*0930*/ LDS R19, [R3+0xc] ; /* 0x00000c0003137984 */
/* 0x000e280000000800 */
/*0940*/ LDS R18, [R28] ; /* 0x000000001c127984 */
/* 0x000e620000000800 */
/*0950*/ IMAD R22, R22, R21, R23 ; /* 0x0000001516167224 */
/* 0x004fc600078e0217 */
/*0960*/ LDS R23, [R3+0x14] ; /* 0x0000140003177984 */
/* 0x0005e80000000800 */
/*0970*/ LDS R21, [R20] ; /* 0x0000000014157984 */
/* 0x000ee20000000800 */
/*0980*/ IADD3 R3, R3, 0x20, RZ ; /* 0x0000002003037810 */
/* 0x004fe20007ffe0ff */
/*0990*/ IMAD R19, R26, R19, R22 ; /* 0x000000131a137224 */
/* 0x001fc800078e0216 */
/*09a0*/ IMAD R18, R18, R25, R19 ; /* 0x0000001912127224 */
/* 0x002fc800078e0213 */
/*09b0*/ IMAD R18, R21, R23, R18 ; /* 0x0000001715127224 */
/* 0x008fe400078e0212 */
/*09c0*/ ISETP.NE.OR P0, PT, R4, RZ, P0 ; /* 0x000000ff0400720c */
/* 0x000fda0000705670 */
/*09d0*/ @!P0 BRA 0xb40 ; /* 0x0000016000008947 */
/* 0x000fea0003800000 */
/*09e0*/ LDS R23, [R24] ; /* 0x0000000018177984 */
/* 0x0001e20000000800 */
/*09f0*/ MOV R5, c[0x0][0x0] ; /* 0x0000000000057a02 */
/* 0x000fe40000000f00 */
/*0a00*/ IADD3 R4, R4, -0x4, RZ ; /* 0xfffffffc04047810 */
/* 0x000fe20007ffe0ff */
/*0a10*/ LDS R22, [R3+-0x8] ; /* 0xfffff80003167984 */
/* 0x000e620000000800 */
/*0a20*/ LEA R28, R5.reuse, R24, 0x2 ; /* 0x00000018051c7211 */
/* 0x040fe400078e10ff */
/*0a30*/ ISETP.NE.AND P0, PT, R4, RZ, PT ; /* 0x000000ff0400720c */
/* 0x000fe20003f05270 */
/*0a40*/ LDS R19, [R3+-0x4] ; /* 0xfffffc0003137984 */
/* 0x000fe20000000800 */
/*0a50*/ IADD3 R2, R2, 0x4, RZ ; /* 0x0000000402027810 */
/* 0x000fe20007ffe0ff */
/*0a60*/ IMAD R27, R5, 0x4, R28 ; /* 0x00000004051b7824 */
/* 0x000fc400078e021c */
/*0a70*/ LDS R25, [R28] ; /* 0x000000001c197984 */
/* 0x000ea60000000800 */
/*0a80*/ LEA R20, R5.reuse, R27, 0x2 ; /* 0x0000001b05147211 */
/* 0x040fe200078e10ff */
/*0a90*/ LDS R21, [R27] ; /* 0x000000001b157984 */
/* 0x000fe60000000800 */
/*0aa0*/ LEA R24, R5, R20, 0x2 ; /* 0x0000001405187211 */
/* 0x001fe200078e10ff */
/*0ab0*/ LDS R26, [R3] ; /* 0x00000000031a7984 */
/* 0x000e220000000800 */
/*0ac0*/ IMAD R22, R23, R22, R18 ; /* 0x0000001617167224 */
/* 0x002fc600078e0212 */
/*0ad0*/ LDS R23, [R3+0x4] ; /* 0x0000040003177984 */
/* 0x0003e80000000800 */
/*0ae0*/ LDS R18, [R20] ; /* 0x0000000014127984 */
/* 0x000ee20000000800 */
/*0af0*/ IMAD R22, R25, R19, R22 ; /* 0x0000001319167224 */
/* 0x004fe200078e0216 */
/*0b00*/ IADD3 R3, R3, 0x10, RZ ; /* 0x0000001003037810 */
/* 0x002fc60007ffe0ff */
/*0b10*/ IMAD R21, R21, R26, R22 ; /* 0x0000001a15157224 */
/* 0x001fc800078e0216 */
/*0b20*/ IMAD R18, R18, R23, R21 ; /* 0x0000001712127224 */
/* 0x008fe200078e0215 */
/*0b30*/ @P0 BRA 0x9e0 ; /* 0xfffffea000000947 */
/* 0x000fea000383ffff */
/*0b40*/ ISETP.NE.AND P0, PT, R8, RZ, PT ; /* 0x000000ff0800720c */
/* 0x000fda0003f05270 */
/*0b50*/ @!P0 BRA 0xc90 ; /* 0x0000013000008947 */
/* 0x000fea0003800000 */
/*0b60*/ IMAD.IADD R3, R11, 0x1, R2 ; /* 0x000000010b037824 */
/* 0x000fe200078e0202 */
/*0b70*/ ISETP.NE.AND P0, PT, R8, 0x1, PT ; /* 0x000000010800780c */
/* 0x000fe20003f05270 */
/*0b80*/ IMAD R2, R2, c[0x0][0x0], R6 ; /* 0x0000000002027a24 */
/* 0x000fc600078e0206 */
/*0b90*/ SHF.L.U32 R20, R3, 0x2, RZ ; /* 0x0000000203147819 */
/* 0x000fe400000006ff */
/*0ba0*/ LDS R3, [R2.X4+0x1000] ; /* 0x0010000002037984 */
/* 0x000fe20000004800 */
/*0bb0*/ LEA R5, R2, 0x1000, 0x2 ; /* 0x0000100002057811 */
/* 0x000fc600078e10ff */
/*0bc0*/ LDS R4, [R20] ; /* 0x0000000014047984 */
/* 0x000e240000000800 */
/*0bd0*/ IMAD R18, R3, R4, R18 ; /* 0x0000000403127224 */
/* 0x001fe200078e0212 */
/*0be0*/ @!P0 BRA 0xc90 ; /* 0x000000a000008947 */
/* 0x000fea0003800000 */
/*0bf0*/ ISETP.NE.AND P0, PT, R8, 0x2, PT ; /* 0x000000020800780c */
/* 0x000fe20003f05270 */
/*0c00*/ LDS R2, [R20+0x4] ; /* 0x0000040014027984 */
/* 0x000fe20000000800 */
/*0c10*/ MOV R4, c[0x0][0x0] ; /* 0x0000000000047a02 */
/* 0x000fca0000000f00 */
/*0c20*/ IMAD R3, R4, 0x4, R5 ; /* 0x0000000404037824 */
/* 0x000fcc00078e0205 */
/*0c30*/ @P0 LEA R4, R4, R3, 0x2 ; /* 0x0000000304040211 */
/* 0x000fe200078e10ff */
/*0c40*/ @P0 LDS R19, [R20+0x8] ; /* 0x0000080014130984 */
/* 0x000fe80000000800 */
/*0c50*/ LDS R3, [R3] ; /* 0x0000000003037984 */
/* 0x000e280000000800 */
/*0c60*/ @P0 LDS R5, [R4] ; /* 0x0000000004050984 */
/* 0x000e620000000800 */
/*0c70*/ IMAD R18, R3, R2, R18 ; /* 0x0000000203127224 */
/* 0x001fc800078e0212 */
/*0c80*/ @P0 IMAD R18, R5, R19, R18 ; /* 0x0000001305120224 */
/* 0x002fe400078e0212 */
/*0c90*/ BAR.SYNC.DEFER_BLOCKING 0x0 ; /* 0x0000000000007b1d */
/* 0x001fec0000010000 */
/*0ca0*/ @!P1 BRA 0x140 ; /* 0xfffff49000009947 */
/* 0x000fea000383ffff */
/*0cb0*/ LEA R2, R9, R10, 0xa ; /* 0x0000000a09027211 */
/* 0x000fca00078e50ff */
/*0cc0*/ IMAD.WIDE R2, R2, R17, c[0x0][0x170] ; /* 0x00005c0002027625 */
/* 0x000fca00078e0211 */
/*0cd0*/ STG.E [R2.64], R18 ; /* 0x0000001202007986 */
/* 0x000fe2000c101904 */
/*0ce0*/ EXIT ; /* 0x000000000000794d */
/* 0x000fea0003800000 */
/*0cf0*/ BRA 0xcf0; /* 0xfffffff000007947 */
/* 0x000fc0000383ffff */
/*0d00*/ NOP; /* 0x0000000000007918 */
/* 0x000fc00000000000 */
/*0d10*/ NOP; /* 0x0000000000007918 */
/* 0x000fc00000000000 */
/*0d20*/ NOP; /* 0x0000000000007918 */
/* 0x000fc00000000000 */
/*0d30*/ NOP; /* 0x0000000000007918 */
/* 0x000fc00000000000 */
/*0d40*/ NOP; /* 0x0000000000007918 */
/* 0x000fc00000000000 */
/*0d50*/ NOP; /* 0x0000000000007918 */
/* 0x000fc00000000000 */
/*0d60*/ NOP; /* 0x0000000000007918 */
/* 0x000fc00000000000 */
/*0d70*/ NOP; /* 0x0000000000007918 */
/* 0x000fc00000000000 */
.......... |
You are a helpful coding assistant specialized in converting CUDA source code to CUDA host assembly. | #include <iostream>
#include <vector>
#include <functional>
#include <algorithm>
#include <math.h>
#include <cassert>
#include <stdio.h>
#include <stdlib.h>
using std::vector;
/* Dynamic random-access memory (DRAM) is a type of random-access semiconductor memory that stores each bit of data in a memory cell consisting of a tiny capacitor and a transistor. VERY SLOW
Cache is easier to access (faster), smaller than the main memeory, and located closer to the processor core. L1 cache is the primary cache..
- Share Memory (scratchpad) -- User managed L1 cache / Private per threadblock
- Cache Tiling: Large Input --> Can't fit all into cache since its smaller than main memory. Puts only pieces of the large inputs into the cache
- Large input and reducing it at each iteration. Basically working on everything chunks at a time.
- A & B Matrix ---> A[y][k] * A[k][x]
*/
// 16 x 16 matrix
const int SHMEM_SIZE = 1<<10;
const int N = 1<<10;
__global__ void tiledMatrixMul(const int *a, const int *b, int *c) {
// Compute each thread's global row and column index
int row = blockIdx.y * blockDim.y + threadIdx.y;
int col = blockIdx.x * blockDim.x + threadIdx.x;
// Statically allocated shared memory
__shared__ int s_a[SHMEM_SIZE];
__shared__ int s_b[SHMEM_SIZE];
// Accumulate in temporary variable
int tmp = 0;
// Sweep tile across matrix
for (int i = 0; i < N; i += blockDim.x) {
// Load in elements for this tile
s_a[threadIdx.y * blockDim.x + threadIdx.x] = a[row * N + i + threadIdx.x];
s_b[threadIdx.y * blockDim.x + threadIdx.x] =
b[i * N + threadIdx.y * N + col];
// Wait for both tiles to be loaded in before doing computation
__syncthreads();
// Do matrix multiplication on the small matrix
for (int j = 0; j < blockDim.x; j++) {
tmp +=
s_a[threadIdx.y * blockDim.x + j] * s_b[j * blockDim.x + threadIdx.x];
}
// Wait for all threads to finish using current tiles before loading in new
// ones
__syncthreads();
}
// Write back results
c[row * N + col] = tmp;
}
// Check result on the CPU
void verify_result(vector<int> &a, vector<int> &b, vector<int> &c) {
// For every row...
for (int i = 0; i < N; i++) {
// For every column...
for (int j = 0; j < N; j++) {
// For every element in the row-column pair
int tmp = 0;
for (int k = 0; k < N; k++) {
// Accumulate the partial results
tmp += a[i * N + k] * b[k * N + j];
}
// Check against the CPU result
assert(tmp == c[i * N + j]);
}
}
}
int main(){
// Matrix 1024x1024
// Size in bytes
size_t bytes = N*N *sizeof(int);
// Allocate to host
vector<int>h_a(N*N);
vector<int>h_b(N*N);
vector<int>h_c(N*N);
// Initialize matrix
std::generate(h_a.begin(), h_a.end(), [](){return rand() % 100;});
std::generate(h_b.begin(), h_b.end(), [](){return rand() % 100;});
// Device pointers
int *d_a, *d_b,* d_c;
// Allocate memory to gpu
cudaMalloc(&d_a,bytes);
cudaMalloc(&d_b,bytes);
cudaMalloc(&d_c,bytes);
// Copy memory over to gpu
cudaMemcpy(d_a,h_a.data(), bytes, cudaMemcpyHostToDevice);
cudaMemcpy(d_b,h_b.data(), bytes, cudaMemcpyHostToDevice);
cudaMemcpy(d_c,h_c.data(), bytes, cudaMemcpyHostToDevice);
int THREADS = 32;
int BLOCKS = (int)ceil(N/THREADS);
// Use a 3D object
dim3 blocks(BLOCKS, BLOCKS);
dim3 threads(THREADS, THREADS);
/* // Launch kernel */
tiledMatrixMul<<<blocks, threads>>> (d_a,d_b,d_c );
// Back to cpu
cudaMemcpy(h_c.data(),d_c, bytes,cudaMemcpyDeviceToHost);
// check results
verify_result(h_a,h_b,h_c);
cudaFree(d_a);
cudaFree(d_b);
cudaFree(d_c);
printf("Completed.");
return 0;
} | .file "tmpxft_00154bc9_00000000-6_cache_tile.cudafe1.cpp"
.text
#APP
.globl _ZSt21ios_base_library_initv
#NO_APP
.type _ZL26__cudaUnregisterBinaryUtilv, @function
_ZL26__cudaUnregisterBinaryUtilv:
.LFB4930:
.cfi_startproc
endbr64
subq $8, %rsp
.cfi_def_cfa_offset 16
movq _ZL20__cudaFatCubinHandle(%rip), %rdi
call __cudaUnregisterFatBinary@PLT
addq $8, %rsp
.cfi_def_cfa_offset 8
ret
.cfi_endproc
.LFE4930:
.size _ZL26__cudaUnregisterBinaryUtilv, .-_ZL26__cudaUnregisterBinaryUtilv
.globl _Z13verify_resultRSt6vectorIiSaIiEES2_S2_
.type _Z13verify_resultRSt6vectorIiSaIiEES2_S2_, @function
_Z13verify_resultRSt6vectorIiSaIiEES2_S2_:
.LFB4920:
.cfi_startproc
endbr64
movl $1024, %ecx
.L4:
movl $1024, %edx
.L8:
movl $1024, %eax
.L5:
subl $1, %eax
jne .L5
subl $1, %edx
jne .L8
subl $1, %ecx
jne .L4
ret
.cfi_endproc
.LFE4920:
.size _Z13verify_resultRSt6vectorIiSaIiEES2_S2_, .-_Z13verify_resultRSt6vectorIiSaIiEES2_S2_
.globl _Z40__device_stub__Z14tiledMatrixMulPKiS0_PiPKiS0_Pi
.type _Z40__device_stub__Z14tiledMatrixMulPKiS0_PiPKiS0_Pi, @function
_Z40__device_stub__Z14tiledMatrixMulPKiS0_PiPKiS0_Pi:
.LFB4952:
.cfi_startproc
endbr64
subq $136, %rsp
.cfi_def_cfa_offset 144
movq %rdi, 24(%rsp)
movq %rsi, 16(%rsp)
movq %rdx, 8(%rsp)
movq %fs:40, %rax
movq %rax, 120(%rsp)
xorl %eax, %eax
leaq 24(%rsp), %rax
movq %rax, 96(%rsp)
leaq 16(%rsp), %rax
movq %rax, 104(%rsp)
leaq 8(%rsp), %rax
movq %rax, 112(%rsp)
movl $1, 48(%rsp)
movl $1, 52(%rsp)
movl $1, 56(%rsp)
movl $1, 60(%rsp)
movl $1, 64(%rsp)
movl $1, 68(%rsp)
leaq 40(%rsp), %rcx
leaq 32(%rsp), %rdx
leaq 60(%rsp), %rsi
leaq 48(%rsp), %rdi
call __cudaPopCallConfiguration@PLT
testl %eax, %eax
je .L14
.L10:
movq 120(%rsp), %rax
subq %fs:40, %rax
jne .L15
addq $136, %rsp
.cfi_remember_state
.cfi_def_cfa_offset 8
ret
.L14:
.cfi_restore_state
pushq 40(%rsp)
.cfi_def_cfa_offset 152
pushq 40(%rsp)
.cfi_def_cfa_offset 160
leaq 112(%rsp), %r9
movq 76(%rsp), %rcx
movl 84(%rsp), %r8d
movq 64(%rsp), %rsi
movl 72(%rsp), %edx
leaq _Z14tiledMatrixMulPKiS0_Pi(%rip), %rdi
call cudaLaunchKernel@PLT
addq $16, %rsp
.cfi_def_cfa_offset 144
jmp .L10
.L15:
call __stack_chk_fail@PLT
.cfi_endproc
.LFE4952:
.size _Z40__device_stub__Z14tiledMatrixMulPKiS0_PiPKiS0_Pi, .-_Z40__device_stub__Z14tiledMatrixMulPKiS0_PiPKiS0_Pi
.globl _Z14tiledMatrixMulPKiS0_Pi
.type _Z14tiledMatrixMulPKiS0_Pi, @function
_Z14tiledMatrixMulPKiS0_Pi:
.LFB4953:
.cfi_startproc
endbr64
subq $8, %rsp
.cfi_def_cfa_offset 16
call _Z40__device_stub__Z14tiledMatrixMulPKiS0_PiPKiS0_Pi
addq $8, %rsp
.cfi_def_cfa_offset 8
ret
.cfi_endproc
.LFE4953:
.size _Z14tiledMatrixMulPKiS0_Pi, .-_Z14tiledMatrixMulPKiS0_Pi
.section .rodata.str1.1,"aMS",@progbits,1
.LC0:
.string "_Z14tiledMatrixMulPKiS0_Pi"
.text
.type _ZL24__sti____cudaRegisterAllv, @function
_ZL24__sti____cudaRegisterAllv:
.LFB4955:
.cfi_startproc
endbr64
subq $8, %rsp
.cfi_def_cfa_offset 16
leaq _ZL15__fatDeviceText(%rip), %rdi
call __cudaRegisterFatBinary@PLT
movq %rax, %rdi
movq %rax, _ZL20__cudaFatCubinHandle(%rip)
pushq $0
.cfi_def_cfa_offset 24
pushq $0
.cfi_def_cfa_offset 32
pushq $0
.cfi_def_cfa_offset 40
pushq $0
.cfi_def_cfa_offset 48
movl $0, %r9d
movl $-1, %r8d
leaq .LC0(%rip), %rdx
movq %rdx, %rcx
leaq _Z14tiledMatrixMulPKiS0_Pi(%rip), %rsi
call __cudaRegisterFunction@PLT
addq $32, %rsp
.cfi_def_cfa_offset 16
movq _ZL20__cudaFatCubinHandle(%rip), %rdi
call __cudaRegisterFatBinaryEnd@PLT
leaq _ZL26__cudaUnregisterBinaryUtilv(%rip), %rdi
call atexit@PLT
addq $8, %rsp
.cfi_def_cfa_offset 8
ret
.cfi_endproc
.LFE4955:
.size _ZL24__sti____cudaRegisterAllv, .-_ZL24__sti____cudaRegisterAllv
.section .init_array,"aw"
.align 8
.quad _ZL24__sti____cudaRegisterAllv
.section .rodata._ZNSt6vectorIiSaIiEEC2EmRKS0_.str1.8,"aMS",@progbits,1
.align 8
.LC1:
.string "cannot create std::vector larger than max_size()"
.section .text._ZNSt6vectorIiSaIiEEC2EmRKS0_,"axG",@progbits,_ZNSt6vectorIiSaIiEEC5EmRKS0_,comdat
.align 2
.weak _ZNSt6vectorIiSaIiEEC2EmRKS0_
.type _ZNSt6vectorIiSaIiEEC2EmRKS0_, @function
_ZNSt6vectorIiSaIiEEC2EmRKS0_:
.LFB5270:
.cfi_startproc
endbr64
pushq %r12
.cfi_def_cfa_offset 16
.cfi_offset 12, -16
pushq %rbp
.cfi_def_cfa_offset 24
.cfi_offset 6, -24
pushq %rbx
.cfi_def_cfa_offset 32
.cfi_offset 3, -32
movq %rsi, %rax
shrq $61, %rax
jne .L30
movq %rdi, %rbx
movq %rsi, %rbp
movq $0, (%rdi)
movq $0, 8(%rdi)
movq $0, 16(%rdi)
testq %rsi, %rsi
je .L22
leaq 0(,%rsi,4), %r12
movq %r12, %rdi
call _Znwm@PLT
movq %rax, (%rbx)
movq %rax, 8(%rbx)
leaq (%rax,%r12), %rdx
movq %rdx, 16(%rbx)
movl $0, (%rax)
addq $4, %rax
cmpq $1, %rbp
je .L25
cmpq %rax, %rdx
je .L26
.L24:
movl $0, (%rax)
addq $4, %rax
cmpq %rax, %rdx
jne .L24
jmp .L23
.L30:
leaq .LC1(%rip), %rdi
call _ZSt20__throw_length_errorPKc@PLT
.L25:
movq %rax, %rdx
jmp .L23
.L26:
movq %rax, %rdx
jmp .L23
.L22:
movq $0, (%rdi)
movq $0, 16(%rdi)
movl $0, %edx
.L23:
movq %rdx, 8(%rbx)
popq %rbx
.cfi_def_cfa_offset 24
popq %rbp
.cfi_def_cfa_offset 16
popq %r12
.cfi_def_cfa_offset 8
ret
.cfi_endproc
.LFE5270:
.size _ZNSt6vectorIiSaIiEEC2EmRKS0_, .-_ZNSt6vectorIiSaIiEEC2EmRKS0_
.weak _ZNSt6vectorIiSaIiEEC1EmRKS0_
.set _ZNSt6vectorIiSaIiEEC1EmRKS0_,_ZNSt6vectorIiSaIiEEC2EmRKS0_
.section .text._ZNSt6vectorIiSaIiEED2Ev,"axG",@progbits,_ZNSt6vectorIiSaIiEED5Ev,comdat
.align 2
.weak _ZNSt6vectorIiSaIiEED2Ev
.type _ZNSt6vectorIiSaIiEED2Ev, @function
_ZNSt6vectorIiSaIiEED2Ev:
.LFB5273:
.cfi_startproc
endbr64
movq (%rdi), %rax
testq %rax, %rax
je .L34
subq $8, %rsp
.cfi_def_cfa_offset 16
movq 16(%rdi), %rsi
subq %rax, %rsi
movq %rax, %rdi
call _ZdlPvm@PLT
addq $8, %rsp
.cfi_def_cfa_offset 8
ret
.L34:
ret
.cfi_endproc
.LFE5273:
.size _ZNSt6vectorIiSaIiEED2Ev, .-_ZNSt6vectorIiSaIiEED2Ev
.weak _ZNSt6vectorIiSaIiEED1Ev
.set _ZNSt6vectorIiSaIiEED1Ev,_ZNSt6vectorIiSaIiEED2Ev
.section .rodata.str1.1
.LC2:
.string "Completed."
.text
.globl main
.type main, @function
main:
.LFB4921:
.cfi_startproc
.cfi_personality 0x9b,DW.ref.__gxx_personality_v0
.cfi_lsda 0x1b,.LLSDA4921
endbr64
pushq %r13
.cfi_def_cfa_offset 16
.cfi_offset 13, -16
pushq %r12
.cfi_def_cfa_offset 24
.cfi_offset 12, -24
pushq %rbp
.cfi_def_cfa_offset 32
.cfi_offset 6, -32
pushq %rbx
.cfi_def_cfa_offset 40
.cfi_offset 3, -40
subq $152, %rsp
.cfi_def_cfa_offset 192
movq %fs:40, %rax
movq %rax, 136(%rsp)
xorl %eax, %eax
leaq 112(%rsp), %rbx
leaq 48(%rsp), %rdi
movq %rbx, %rdx
movl $1048576, %esi
.LEHB0:
call _ZNSt6vectorIiSaIiEEC1EmRKS0_
.LEHE0:
leaq 80(%rsp), %rdi
movq %rbx, %rdx
movl $1048576, %esi
.LEHB1:
call _ZNSt6vectorIiSaIiEEC1EmRKS0_
.LEHE1:
leaq 36(%rsp), %rdx
movq %rbx, %rdi
movl $1048576, %esi
.LEHB2:
call _ZNSt6vectorIiSaIiEEC1EmRKS0_
.LEHE2:
movq 56(%rsp), %rbp
movq 48(%rsp), %r13
cmpq %r13, %rbp
je .L38
movq %r13, %rbx
.L39:
call rand@PLT
movslq %eax, %rdx
imulq $1374389535, %rdx, %rdx
sarq $37, %rdx
movl %eax, %ecx
sarl $31, %ecx
subl %ecx, %edx
imull $100, %edx, %edx
subl %edx, %eax
movl %eax, (%rbx)
addq $4, %rbx
cmpq %rbx, %rbp
jne .L39
.L38:
movq 88(%rsp), %rbp
movq 80(%rsp), %r12
cmpq %r12, %rbp
je .L40
movq %r12, %rbx
.L41:
call rand@PLT
movslq %eax, %rdx
imulq $1374389535, %rdx, %rdx
sarq $37, %rdx
movl %eax, %ecx
sarl $31, %ecx
subl %ecx, %edx
imull $100, %edx, %edx
subl %edx, %eax
movl %eax, (%rbx)
addq $4, %rbx
cmpq %rbx, %rbp
jne .L41
.L40:
movq %rsp, %rdi
movl $4194304, %esi
.LEHB3:
call cudaMalloc@PLT
leaq 8(%rsp), %rdi
movl $4194304, %esi
call cudaMalloc@PLT
leaq 16(%rsp), %rdi
movl $4194304, %esi
call cudaMalloc@PLT
movl $1, %ecx
movl $4194304, %edx
movq %r13, %rsi
movq (%rsp), %rdi
call cudaMemcpy@PLT
movl $1, %ecx
movl $4194304, %edx
movq %r12, %rsi
movq 8(%rsp), %rdi
call cudaMemcpy@PLT
movq 112(%rsp), %rbx
movl $1, %ecx
movl $4194304, %edx
movq %rbx, %rsi
movq 16(%rsp), %rdi
call cudaMemcpy@PLT
movl $32, 24(%rsp)
movl $32, 28(%rsp)
movl $32, 36(%rsp)
movl $32, 40(%rsp)
movl $1, 44(%rsp)
movl $0, %r9d
movl $0, %r8d
movq 36(%rsp), %rdx
movl $1, %ecx
movq 24(%rsp), %rdi
movl $1, %esi
call __cudaPushCallConfiguration@PLT
testl %eax, %eax
jne .L42
movq 16(%rsp), %rdx
movq 8(%rsp), %rsi
movq (%rsp), %rdi
call _Z40__device_stub__Z14tiledMatrixMulPKiS0_PiPKiS0_Pi
.L42:
movl $2, %ecx
movl $4194304, %edx
movq 16(%rsp), %rsi
movq %rbx, %rdi
call cudaMemcpy@PLT
movq (%rsp), %rdi
call cudaFree@PLT
movq 8(%rsp), %rdi
call cudaFree@PLT
movq 16(%rsp), %rdi
call cudaFree@PLT
leaq .LC2(%rip), %rsi
movl $2, %edi
movl $0, %eax
call __printf_chk@PLT
.LEHE3:
leaq 112(%rsp), %rdi
call _ZNSt6vectorIiSaIiEED1Ev
leaq 80(%rsp), %rdi
call _ZNSt6vectorIiSaIiEED1Ev
leaq 48(%rsp), %rdi
call _ZNSt6vectorIiSaIiEED1Ev
movq 136(%rsp), %rax
subq %fs:40, %rax
jne .L55
movl $0, %eax
addq $152, %rsp
.cfi_remember_state
.cfi_def_cfa_offset 40
popq %rbx
.cfi_def_cfa_offset 32
popq %rbp
.cfi_def_cfa_offset 24
popq %r12
.cfi_def_cfa_offset 16
popq %r13
.cfi_def_cfa_offset 8
ret
.L50:
.cfi_restore_state
endbr64
movq %rax, %rbx
leaq 112(%rsp), %rdi
call _ZNSt6vectorIiSaIiEED1Ev
.L44:
leaq 80(%rsp), %rdi
call _ZNSt6vectorIiSaIiEED1Ev
.L45:
leaq 48(%rsp), %rdi
call _ZNSt6vectorIiSaIiEED1Ev
movq 136(%rsp), %rax
subq %fs:40, %rax
je .L46
call __stack_chk_fail@PLT
.L49:
endbr64
movq %rax, %rbx
jmp .L44
.L48:
endbr64
movq %rax, %rbx
jmp .L45
.L46:
movq %rbx, %rdi
.LEHB4:
call _Unwind_Resume@PLT
.LEHE4:
.L55:
call __stack_chk_fail@PLT
.cfi_endproc
.LFE4921:
.globl __gxx_personality_v0
.section .gcc_except_table,"a",@progbits
.LLSDA4921:
.byte 0xff
.byte 0xff
.byte 0x1
.uleb128 .LLSDACSE4921-.LLSDACSB4921
.LLSDACSB4921:
.uleb128 .LEHB0-.LFB4921
.uleb128 .LEHE0-.LEHB0
.uleb128 0
.uleb128 0
.uleb128 .LEHB1-.LFB4921
.uleb128 .LEHE1-.LEHB1
.uleb128 .L48-.LFB4921
.uleb128 0
.uleb128 .LEHB2-.LFB4921
.uleb128 .LEHE2-.LEHB2
.uleb128 .L49-.LFB4921
.uleb128 0
.uleb128 .LEHB3-.LFB4921
.uleb128 .LEHE3-.LEHB3
.uleb128 .L50-.LFB4921
.uleb128 0
.uleb128 .LEHB4-.LFB4921
.uleb128 .LEHE4-.LEHB4
.uleb128 0
.uleb128 0
.LLSDACSE4921:
.text
.size main, .-main
.section .nvFatBinSegment,"aw"
.align 8
.type _ZL15__fatDeviceText, @object
.size _ZL15__fatDeviceText, 24
_ZL15__fatDeviceText:
.long 1180844977
.long 1
.quad fatbinData
.quad 0
.local _ZL20__cudaFatCubinHandle
.comm _ZL20__cudaFatCubinHandle,8,8
.hidden DW.ref.__gxx_personality_v0
.weak DW.ref.__gxx_personality_v0
.section .data.rel.local.DW.ref.__gxx_personality_v0,"awG",@progbits,DW.ref.__gxx_personality_v0,comdat
.align 8
.type DW.ref.__gxx_personality_v0, @object
.size DW.ref.__gxx_personality_v0, 8
DW.ref.__gxx_personality_v0:
.quad __gxx_personality_v0
.ident "GCC: (Ubuntu 13.3.0-6ubuntu2~24.04) 13.3.0"
.section .note.GNU-stack,"",@progbits
.section .note.gnu.property,"a"
.align 8
.long 1f - 0f
.long 4f - 1f
.long 5
0:
.string "GNU"
1:
.align 8
.long 0xc0000002
.long 3f - 2f
2:
.long 0x3
3:
.align 8
4: |
You are a helpful coding assistant specialized in converting CUDA source code to HIP/AMD source code. | #include <iostream>
#include <vector>
#include <functional>
#include <algorithm>
#include <math.h>
#include <cassert>
#include <stdio.h>
#include <stdlib.h>
using std::vector;
/* Dynamic random-access memory (DRAM) is a type of random-access semiconductor memory that stores each bit of data in a memory cell consisting of a tiny capacitor and a transistor. VERY SLOW
Cache is easier to access (faster), smaller than the main memeory, and located closer to the processor core. L1 cache is the primary cache..
- Share Memory (scratchpad) -- User managed L1 cache / Private per threadblock
- Cache Tiling: Large Input --> Can't fit all into cache since its smaller than main memory. Puts only pieces of the large inputs into the cache
- Large input and reducing it at each iteration. Basically working on everything chunks at a time.
- A & B Matrix ---> A[y][k] * A[k][x]
*/
// 16 x 16 matrix
const int SHMEM_SIZE = 1<<10;
const int N = 1<<10;
__global__ void tiledMatrixMul(const int *a, const int *b, int *c) {
// Compute each thread's global row and column index
int row = blockIdx.y * blockDim.y + threadIdx.y;
int col = blockIdx.x * blockDim.x + threadIdx.x;
// Statically allocated shared memory
__shared__ int s_a[SHMEM_SIZE];
__shared__ int s_b[SHMEM_SIZE];
// Accumulate in temporary variable
int tmp = 0;
// Sweep tile across matrix
for (int i = 0; i < N; i += blockDim.x) {
// Load in elements for this tile
s_a[threadIdx.y * blockDim.x + threadIdx.x] = a[row * N + i + threadIdx.x];
s_b[threadIdx.y * blockDim.x + threadIdx.x] =
b[i * N + threadIdx.y * N + col];
// Wait for both tiles to be loaded in before doing computation
__syncthreads();
// Do matrix multiplication on the small matrix
for (int j = 0; j < blockDim.x; j++) {
tmp +=
s_a[threadIdx.y * blockDim.x + j] * s_b[j * blockDim.x + threadIdx.x];
}
// Wait for all threads to finish using current tiles before loading in new
// ones
__syncthreads();
}
// Write back results
c[row * N + col] = tmp;
}
// Check result on the CPU
void verify_result(vector<int> &a, vector<int> &b, vector<int> &c) {
// For every row...
for (int i = 0; i < N; i++) {
// For every column...
for (int j = 0; j < N; j++) {
// For every element in the row-column pair
int tmp = 0;
for (int k = 0; k < N; k++) {
// Accumulate the partial results
tmp += a[i * N + k] * b[k * N + j];
}
// Check against the CPU result
assert(tmp == c[i * N + j]);
}
}
}
int main(){
// Matrix 1024x1024
// Size in bytes
size_t bytes = N*N *sizeof(int);
// Allocate to host
vector<int>h_a(N*N);
vector<int>h_b(N*N);
vector<int>h_c(N*N);
// Initialize matrix
std::generate(h_a.begin(), h_a.end(), [](){return rand() % 100;});
std::generate(h_b.begin(), h_b.end(), [](){return rand() % 100;});
// Device pointers
int *d_a, *d_b,* d_c;
// Allocate memory to gpu
cudaMalloc(&d_a,bytes);
cudaMalloc(&d_b,bytes);
cudaMalloc(&d_c,bytes);
// Copy memory over to gpu
cudaMemcpy(d_a,h_a.data(), bytes, cudaMemcpyHostToDevice);
cudaMemcpy(d_b,h_b.data(), bytes, cudaMemcpyHostToDevice);
cudaMemcpy(d_c,h_c.data(), bytes, cudaMemcpyHostToDevice);
int THREADS = 32;
int BLOCKS = (int)ceil(N/THREADS);
// Use a 3D object
dim3 blocks(BLOCKS, BLOCKS);
dim3 threads(THREADS, THREADS);
/* // Launch kernel */
tiledMatrixMul<<<blocks, threads>>> (d_a,d_b,d_c );
// Back to cpu
cudaMemcpy(h_c.data(),d_c, bytes,cudaMemcpyDeviceToHost);
// check results
verify_result(h_a,h_b,h_c);
cudaFree(d_a);
cudaFree(d_b);
cudaFree(d_c);
printf("Completed.");
return 0;
} | #include <hip/hip_runtime.h>
#include <iostream>
#include <vector>
#include <functional>
#include <algorithm>
#include <math.h>
#include <cassert>
#include <stdio.h>
#include <stdlib.h>
using std::vector;
/* Dynamic random-access memory (DRAM) is a type of random-access semiconductor memory that stores each bit of data in a memory cell consisting of a tiny capacitor and a transistor. VERY SLOW
Cache is easier to access (faster), smaller than the main memeory, and located closer to the processor core. L1 cache is the primary cache..
- Share Memory (scratchpad) -- User managed L1 cache / Private per threadblock
- Cache Tiling: Large Input --> Can't fit all into cache since its smaller than main memory. Puts only pieces of the large inputs into the cache
- Large input and reducing it at each iteration. Basically working on everything chunks at a time.
- A & B Matrix ---> A[y][k] * A[k][x]
*/
// 16 x 16 matrix
const int SHMEM_SIZE = 1<<10;
const int N = 1<<10;
__global__ void tiledMatrixMul(const int *a, const int *b, int *c) {
// Compute each thread's global row and column index
int row = blockIdx.y * blockDim.y + threadIdx.y;
int col = blockIdx.x * blockDim.x + threadIdx.x;
// Statically allocated shared memory
__shared__ int s_a[SHMEM_SIZE];
__shared__ int s_b[SHMEM_SIZE];
// Accumulate in temporary variable
int tmp = 0;
// Sweep tile across matrix
for (int i = 0; i < N; i += blockDim.x) {
// Load in elements for this tile
s_a[threadIdx.y * blockDim.x + threadIdx.x] = a[row * N + i + threadIdx.x];
s_b[threadIdx.y * blockDim.x + threadIdx.x] =
b[i * N + threadIdx.y * N + col];
// Wait for both tiles to be loaded in before doing computation
__syncthreads();
// Do matrix multiplication on the small matrix
for (int j = 0; j < blockDim.x; j++) {
tmp +=
s_a[threadIdx.y * blockDim.x + j] * s_b[j * blockDim.x + threadIdx.x];
}
// Wait for all threads to finish using current tiles before loading in new
// ones
__syncthreads();
}
// Write back results
c[row * N + col] = tmp;
}
// Check result on the CPU
void verify_result(vector<int> &a, vector<int> &b, vector<int> &c) {
// For every row...
for (int i = 0; i < N; i++) {
// For every column...
for (int j = 0; j < N; j++) {
// For every element in the row-column pair
int tmp = 0;
for (int k = 0; k < N; k++) {
// Accumulate the partial results
tmp += a[i * N + k] * b[k * N + j];
}
// Check against the CPU result
assert(tmp == c[i * N + j]);
}
}
}
int main(){
// Matrix 1024x1024
// Size in bytes
size_t bytes = N*N *sizeof(int);
// Allocate to host
vector<int>h_a(N*N);
vector<int>h_b(N*N);
vector<int>h_c(N*N);
// Initialize matrix
std::generate(h_a.begin(), h_a.end(), [](){return rand() % 100;});
std::generate(h_b.begin(), h_b.end(), [](){return rand() % 100;});
// Device pointers
int *d_a, *d_b,* d_c;
// Allocate memory to gpu
hipMalloc(&d_a,bytes);
hipMalloc(&d_b,bytes);
hipMalloc(&d_c,bytes);
// Copy memory over to gpu
hipMemcpy(d_a,h_a.data(), bytes, hipMemcpyHostToDevice);
hipMemcpy(d_b,h_b.data(), bytes, hipMemcpyHostToDevice);
hipMemcpy(d_c,h_c.data(), bytes, hipMemcpyHostToDevice);
int THREADS = 32;
int BLOCKS = (int)ceil(N/THREADS);
// Use a 3D object
dim3 blocks(BLOCKS, BLOCKS);
dim3 threads(THREADS, THREADS);
/* // Launch kernel */
tiledMatrixMul<<<blocks, threads>>> (d_a,d_b,d_c );
// Back to cpu
hipMemcpy(h_c.data(),d_c, bytes,hipMemcpyDeviceToHost);
// check results
verify_result(h_a,h_b,h_c);
hipFree(d_a);
hipFree(d_b);
hipFree(d_c);
printf("Completed.");
return 0;
} |
You are a helpful coding assistant specialized in converting HIP source code to AMD device assembly. | #include <hip/hip_runtime.h>
#include <iostream>
#include <vector>
#include <functional>
#include <algorithm>
#include <math.h>
#include <cassert>
#include <stdio.h>
#include <stdlib.h>
using std::vector;
/* Dynamic random-access memory (DRAM) is a type of random-access semiconductor memory that stores each bit of data in a memory cell consisting of a tiny capacitor and a transistor. VERY SLOW
Cache is easier to access (faster), smaller than the main memeory, and located closer to the processor core. L1 cache is the primary cache..
- Share Memory (scratchpad) -- User managed L1 cache / Private per threadblock
- Cache Tiling: Large Input --> Can't fit all into cache since its smaller than main memory. Puts only pieces of the large inputs into the cache
- Large input and reducing it at each iteration. Basically working on everything chunks at a time.
- A & B Matrix ---> A[y][k] * A[k][x]
*/
// 16 x 16 matrix
const int SHMEM_SIZE = 1<<10;
const int N = 1<<10;
__global__ void tiledMatrixMul(const int *a, const int *b, int *c) {
// Compute each thread's global row and column index
int row = blockIdx.y * blockDim.y + threadIdx.y;
int col = blockIdx.x * blockDim.x + threadIdx.x;
// Statically allocated shared memory
__shared__ int s_a[SHMEM_SIZE];
__shared__ int s_b[SHMEM_SIZE];
// Accumulate in temporary variable
int tmp = 0;
// Sweep tile across matrix
for (int i = 0; i < N; i += blockDim.x) {
// Load in elements for this tile
s_a[threadIdx.y * blockDim.x + threadIdx.x] = a[row * N + i + threadIdx.x];
s_b[threadIdx.y * blockDim.x + threadIdx.x] =
b[i * N + threadIdx.y * N + col];
// Wait for both tiles to be loaded in before doing computation
__syncthreads();
// Do matrix multiplication on the small matrix
for (int j = 0; j < blockDim.x; j++) {
tmp +=
s_a[threadIdx.y * blockDim.x + j] * s_b[j * blockDim.x + threadIdx.x];
}
// Wait for all threads to finish using current tiles before loading in new
// ones
__syncthreads();
}
// Write back results
c[row * N + col] = tmp;
}
// Check result on the CPU
void verify_result(vector<int> &a, vector<int> &b, vector<int> &c) {
// For every row...
for (int i = 0; i < N; i++) {
// For every column...
for (int j = 0; j < N; j++) {
// For every element in the row-column pair
int tmp = 0;
for (int k = 0; k < N; k++) {
// Accumulate the partial results
tmp += a[i * N + k] * b[k * N + j];
}
// Check against the CPU result
assert(tmp == c[i * N + j]);
}
}
}
int main(){
// Matrix 1024x1024
// Size in bytes
size_t bytes = N*N *sizeof(int);
// Allocate to host
vector<int>h_a(N*N);
vector<int>h_b(N*N);
vector<int>h_c(N*N);
// Initialize matrix
std::generate(h_a.begin(), h_a.end(), [](){return rand() % 100;});
std::generate(h_b.begin(), h_b.end(), [](){return rand() % 100;});
// Device pointers
int *d_a, *d_b,* d_c;
// Allocate memory to gpu
hipMalloc(&d_a,bytes);
hipMalloc(&d_b,bytes);
hipMalloc(&d_c,bytes);
// Copy memory over to gpu
hipMemcpy(d_a,h_a.data(), bytes, hipMemcpyHostToDevice);
hipMemcpy(d_b,h_b.data(), bytes, hipMemcpyHostToDevice);
hipMemcpy(d_c,h_c.data(), bytes, hipMemcpyHostToDevice);
int THREADS = 32;
int BLOCKS = (int)ceil(N/THREADS);
// Use a 3D object
dim3 blocks(BLOCKS, BLOCKS);
dim3 threads(THREADS, THREADS);
/* // Launch kernel */
tiledMatrixMul<<<blocks, threads>>> (d_a,d_b,d_c );
// Back to cpu
hipMemcpy(h_c.data(),d_c, bytes,hipMemcpyDeviceToHost);
// check results
verify_result(h_a,h_b,h_c);
hipFree(d_a);
hipFree(d_b);
hipFree(d_c);
printf("Completed.");
return 0;
} | .text
.amdgcn_target "amdgcn-amd-amdhsa--gfx1100"
.protected _Z14tiledMatrixMulPKiS0_Pi
.globl _Z14tiledMatrixMulPKiS0_Pi
.p2align 8
.type _Z14tiledMatrixMulPKiS0_Pi,@function
_Z14tiledMatrixMulPKiS0_Pi:
s_clause 0x1
s_load_b32 s2, s[0:1], 0x24
s_load_b128 s[4:7], s[0:1], 0x0
v_bfe_u32 v2, v0, 10, 10
v_and_b32_e32 v9, 0x3ff, v0
s_mov_b32 s8, 0
s_delay_alu instid0(VALU_DEP_1)
v_lshl_or_b32 v6, v9, 2, 0x1000
s_waitcnt lgkmcnt(0)
s_and_b32 s3, s2, 0xffff
s_lshr_b32 s2, s2, 16
s_cmp_lg_u32 s3, 0
v_mul_u32_u24_e32 v0, s3, v2
v_mad_u64_u32 v[3:4], null, s15, s2, v[2:3]
s_cselect_b32 s2, -1, 0
s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_3) | instid1(VALU_DEP_2)
v_dual_mov_b32 v1, 0 :: v_dual_lshlrev_b32 v8, 2, v0
v_cndmask_b32_e64 v10, 0, 1, s2
v_add_lshl_u32 v7, v0, v9, 2
s_lshl_b32 s9, s3, 2
v_mad_u64_u32 v[4:5], null, s14, s3, v[9:10]
v_cmp_ne_u32_e64 s2, 1, v10
v_lshl_or_b32 v9, v3, 10, v9
v_dual_mov_b32 v5, v1 :: v_dual_add_nc_u32 v10, 0x1000, v7
s_set_inst_prefetch_distance 0x1
s_branch .LBB0_2
.p2align 6
.LBB0_1:
s_add_i32 s8, s8, s3
s_delay_alu instid0(SALU_CYCLE_1)
s_cmpk_gt_u32 s8, 0x3ff
s_barrier
buffer_gl0_inv
s_cbranch_scc1 .LBB0_5
.LBB0_2:
s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_2)
v_add_nc_u32_e32 v0, s8, v9
v_add_nc_u32_e32 v13, s8, v2
v_lshlrev_b64 v[11:12], 2, v[0:1]
s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
v_lshl_add_u32 v0, v13, 10, v4
v_lshlrev_b64 v[13:14], 2, v[0:1]
s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_4)
v_add_co_u32 v11, vcc_lo, s4, v11
v_add_co_ci_u32_e32 v12, vcc_lo, s5, v12, vcc_lo
s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_4)
v_add_co_u32 v13, vcc_lo, s6, v13
v_add_co_ci_u32_e32 v14, vcc_lo, s7, v14, vcc_lo
s_and_b32 vcc_lo, exec_lo, s2
global_load_b32 v0, v[11:12], off
global_load_b32 v11, v[13:14], off
s_waitcnt vmcnt(1)
ds_store_b32 v7, v0
s_waitcnt vmcnt(0)
ds_store_b32 v10, v11
s_waitcnt lgkmcnt(0)
s_barrier
buffer_gl0_inv
s_cbranch_vccnz .LBB0_1
v_mov_b32_e32 v0, v6
s_mov_b32 s10, 0
.LBB0_4:
s_delay_alu instid0(SALU_CYCLE_1)
v_add_nc_u32_e32 v11, s10, v8
s_add_i32 s10, s10, 4
ds_load_b32 v13, v0
ds_load_b32 v14, v11
s_cmp_eq_u32 s9, s10
s_waitcnt lgkmcnt(0)
v_mad_u64_u32 v[11:12], null, v13, v14, v[5:6]
s_delay_alu instid0(VALU_DEP_1)
v_dual_mov_b32 v5, v11 :: v_dual_add_nc_u32 v0, s9, v0
s_cbranch_scc0 .LBB0_4
s_branch .LBB0_1
.LBB0_5:
s_set_inst_prefetch_distance 0x2
s_load_b64 s[0:1], s[0:1], 0x10
v_lshl_add_u32 v0, v3, 10, v4
s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
v_ashrrev_i32_e32 v1, 31, v0
v_lshlrev_b64 v[0:1], 2, v[0:1]
s_waitcnt lgkmcnt(0)
s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_2)
v_add_co_u32 v0, vcc_lo, s0, v0
v_add_co_ci_u32_e32 v1, vcc_lo, s1, v1, vcc_lo
global_store_b32 v[0:1], v5, off
s_nop 0
s_sendmsg sendmsg(MSG_DEALLOC_VGPRS)
s_endpgm
.section .rodata,"a",@progbits
.p2align 6, 0x0
.amdhsa_kernel _Z14tiledMatrixMulPKiS0_Pi
.amdhsa_group_segment_fixed_size 8192
.amdhsa_private_segment_fixed_size 0
.amdhsa_kernarg_size 280
.amdhsa_user_sgpr_count 14
.amdhsa_user_sgpr_dispatch_ptr 0
.amdhsa_user_sgpr_queue_ptr 0
.amdhsa_user_sgpr_kernarg_segment_ptr 1
.amdhsa_user_sgpr_dispatch_id 0
.amdhsa_user_sgpr_private_segment_size 0
.amdhsa_wavefront_size32 1
.amdhsa_uses_dynamic_stack 0
.amdhsa_enable_private_segment 0
.amdhsa_system_sgpr_workgroup_id_x 1
.amdhsa_system_sgpr_workgroup_id_y 1
.amdhsa_system_sgpr_workgroup_id_z 0
.amdhsa_system_sgpr_workgroup_info 0
.amdhsa_system_vgpr_workitem_id 1
.amdhsa_next_free_vgpr 15
.amdhsa_next_free_sgpr 16
.amdhsa_float_round_mode_32 0
.amdhsa_float_round_mode_16_64 0
.amdhsa_float_denorm_mode_32 3
.amdhsa_float_denorm_mode_16_64 3
.amdhsa_dx10_clamp 1
.amdhsa_ieee_mode 1
.amdhsa_fp16_overflow 0
.amdhsa_workgroup_processor_mode 1
.amdhsa_memory_ordered 1
.amdhsa_forward_progress 0
.amdhsa_shared_vgpr_count 0
.amdhsa_exception_fp_ieee_invalid_op 0
.amdhsa_exception_fp_denorm_src 0
.amdhsa_exception_fp_ieee_div_zero 0
.amdhsa_exception_fp_ieee_overflow 0
.amdhsa_exception_fp_ieee_underflow 0
.amdhsa_exception_fp_ieee_inexact 0
.amdhsa_exception_int_div_zero 0
.end_amdhsa_kernel
.text
.Lfunc_end0:
.size _Z14tiledMatrixMulPKiS0_Pi, .Lfunc_end0-_Z14tiledMatrixMulPKiS0_Pi
.section .AMDGPU.csdata,"",@progbits
.text
.p2alignl 7, 3214868480
.fill 96, 4, 3214868480
.type __hip_cuid_,@object
.section .bss,"aw",@nobits
.globl __hip_cuid_
__hip_cuid_:
.byte 0
.size __hip_cuid_, 1
.ident "AMD clang version 18.0.0git (https://github.com/RadeonOpenCompute/llvm-project roc-6.3.2 25012 e5bf7e55c91490b07c49d8960fa7983d864936c4)"
.section ".note.GNU-stack","",@progbits
.addrsig
.addrsig_sym __hip_cuid_
.amdgpu_metadata
---
amdhsa.kernels:
- .args:
- .address_space: global
.offset: 0
.size: 8
.value_kind: global_buffer
- .address_space: global
.offset: 8
.size: 8
.value_kind: global_buffer
- .address_space: global
.offset: 16
.size: 8
.value_kind: global_buffer
- .offset: 24
.size: 4
.value_kind: hidden_block_count_x
- .offset: 28
.size: 4
.value_kind: hidden_block_count_y
- .offset: 32
.size: 4
.value_kind: hidden_block_count_z
- .offset: 36
.size: 2
.value_kind: hidden_group_size_x
- .offset: 38
.size: 2
.value_kind: hidden_group_size_y
- .offset: 40
.size: 2
.value_kind: hidden_group_size_z
- .offset: 42
.size: 2
.value_kind: hidden_remainder_x
- .offset: 44
.size: 2
.value_kind: hidden_remainder_y
- .offset: 46
.size: 2
.value_kind: hidden_remainder_z
- .offset: 64
.size: 8
.value_kind: hidden_global_offset_x
- .offset: 72
.size: 8
.value_kind: hidden_global_offset_y
- .offset: 80
.size: 8
.value_kind: hidden_global_offset_z
- .offset: 88
.size: 2
.value_kind: hidden_grid_dims
.group_segment_fixed_size: 8192
.kernarg_segment_align: 8
.kernarg_segment_size: 280
.language: OpenCL C
.language_version:
- 2
- 0
.max_flat_workgroup_size: 1024
.name: _Z14tiledMatrixMulPKiS0_Pi
.private_segment_fixed_size: 0
.sgpr_count: 18
.sgpr_spill_count: 0
.symbol: _Z14tiledMatrixMulPKiS0_Pi.kd
.uniform_work_group_size: 1
.uses_dynamic_stack: false
.vgpr_count: 15
.vgpr_spill_count: 0
.wavefront_size: 32
.workgroup_processor_mode: 1
amdhsa.target: amdgcn-amd-amdhsa--gfx1100
amdhsa.version:
- 1
- 2
...
.end_amdgpu_metadata |
You are a helpful coding assistant specialized in converting HIP source code to AMD host assembly. | #include <hip/hip_runtime.h>
#include <iostream>
#include <vector>
#include <functional>
#include <algorithm>
#include <math.h>
#include <cassert>
#include <stdio.h>
#include <stdlib.h>
using std::vector;
/* Dynamic random-access memory (DRAM) is a type of random-access semiconductor memory that stores each bit of data in a memory cell consisting of a tiny capacitor and a transistor. VERY SLOW
Cache is easier to access (faster), smaller than the main memeory, and located closer to the processor core. L1 cache is the primary cache..
- Share Memory (scratchpad) -- User managed L1 cache / Private per threadblock
- Cache Tiling: Large Input --> Can't fit all into cache since its smaller than main memory. Puts only pieces of the large inputs into the cache
- Large input and reducing it at each iteration. Basically working on everything chunks at a time.
- A & B Matrix ---> A[y][k] * A[k][x]
*/
// 16 x 16 matrix
const int SHMEM_SIZE = 1<<10;
const int N = 1<<10;
__global__ void tiledMatrixMul(const int *a, const int *b, int *c) {
// Compute each thread's global row and column index
int row = blockIdx.y * blockDim.y + threadIdx.y;
int col = blockIdx.x * blockDim.x + threadIdx.x;
// Statically allocated shared memory
__shared__ int s_a[SHMEM_SIZE];
__shared__ int s_b[SHMEM_SIZE];
// Accumulate in temporary variable
int tmp = 0;
// Sweep tile across matrix
for (int i = 0; i < N; i += blockDim.x) {
// Load in elements for this tile
s_a[threadIdx.y * blockDim.x + threadIdx.x] = a[row * N + i + threadIdx.x];
s_b[threadIdx.y * blockDim.x + threadIdx.x] =
b[i * N + threadIdx.y * N + col];
// Wait for both tiles to be loaded in before doing computation
__syncthreads();
// Do matrix multiplication on the small matrix
for (int j = 0; j < blockDim.x; j++) {
tmp +=
s_a[threadIdx.y * blockDim.x + j] * s_b[j * blockDim.x + threadIdx.x];
}
// Wait for all threads to finish using current tiles before loading in new
// ones
__syncthreads();
}
// Write back results
c[row * N + col] = tmp;
}
// Check result on the CPU
void verify_result(vector<int> &a, vector<int> &b, vector<int> &c) {
// For every row...
for (int i = 0; i < N; i++) {
// For every column...
for (int j = 0; j < N; j++) {
// For every element in the row-column pair
int tmp = 0;
for (int k = 0; k < N; k++) {
// Accumulate the partial results
tmp += a[i * N + k] * b[k * N + j];
}
// Check against the CPU result
assert(tmp == c[i * N + j]);
}
}
}
int main(){
// Matrix 1024x1024
// Size in bytes
size_t bytes = N*N *sizeof(int);
// Allocate to host
vector<int>h_a(N*N);
vector<int>h_b(N*N);
vector<int>h_c(N*N);
// Initialize matrix
std::generate(h_a.begin(), h_a.end(), [](){return rand() % 100;});
std::generate(h_b.begin(), h_b.end(), [](){return rand() % 100;});
// Device pointers
int *d_a, *d_b,* d_c;
// Allocate memory to gpu
hipMalloc(&d_a,bytes);
hipMalloc(&d_b,bytes);
hipMalloc(&d_c,bytes);
// Copy memory over to gpu
hipMemcpy(d_a,h_a.data(), bytes, hipMemcpyHostToDevice);
hipMemcpy(d_b,h_b.data(), bytes, hipMemcpyHostToDevice);
hipMemcpy(d_c,h_c.data(), bytes, hipMemcpyHostToDevice);
int THREADS = 32;
int BLOCKS = (int)ceil(N/THREADS);
// Use a 3D object
dim3 blocks(BLOCKS, BLOCKS);
dim3 threads(THREADS, THREADS);
/* // Launch kernel */
tiledMatrixMul<<<blocks, threads>>> (d_a,d_b,d_c );
// Back to cpu
hipMemcpy(h_c.data(),d_c, bytes,hipMemcpyDeviceToHost);
// check results
verify_result(h_a,h_b,h_c);
hipFree(d_a);
hipFree(d_b);
hipFree(d_c);
printf("Completed.");
return 0;
} | .text
.file "cache_tile.hip"
# Start of file scope inline assembly
.globl _ZSt21ios_base_library_initv
# End of file scope inline assembly
.globl _Z29__device_stub__tiledMatrixMulPKiS0_Pi # -- Begin function _Z29__device_stub__tiledMatrixMulPKiS0_Pi
.p2align 4, 0x90
.type _Z29__device_stub__tiledMatrixMulPKiS0_Pi,@function
_Z29__device_stub__tiledMatrixMulPKiS0_Pi: # @_Z29__device_stub__tiledMatrixMulPKiS0_Pi
.cfi_startproc
# %bb.0:
subq $104, %rsp
.cfi_def_cfa_offset 112
movq %rdi, 72(%rsp)
movq %rsi, 64(%rsp)
movq %rdx, 56(%rsp)
leaq 72(%rsp), %rax
movq %rax, 80(%rsp)
leaq 64(%rsp), %rax
movq %rax, 88(%rsp)
leaq 56(%rsp), %rax
movq %rax, 96(%rsp)
leaq 40(%rsp), %rdi
leaq 24(%rsp), %rsi
leaq 16(%rsp), %rdx
leaq 8(%rsp), %rcx
callq __hipPopCallConfiguration
movq 40(%rsp), %rsi
movl 48(%rsp), %edx
movq 24(%rsp), %rcx
movl 32(%rsp), %r8d
leaq 80(%rsp), %r9
movl $_Z14tiledMatrixMulPKiS0_Pi, %edi
pushq 8(%rsp)
.cfi_adjust_cfa_offset 8
pushq 24(%rsp)
.cfi_adjust_cfa_offset 8
callq hipLaunchKernel
addq $120, %rsp
.cfi_adjust_cfa_offset -120
retq
.Lfunc_end0:
.size _Z29__device_stub__tiledMatrixMulPKiS0_Pi, .Lfunc_end0-_Z29__device_stub__tiledMatrixMulPKiS0_Pi
.cfi_endproc
# -- End function
.globl _Z13verify_resultRSt6vectorIiSaIiEES2_S2_ # -- Begin function _Z13verify_resultRSt6vectorIiSaIiEES2_S2_
.p2align 4, 0x90
.type _Z13verify_resultRSt6vectorIiSaIiEES2_S2_,@function
_Z13verify_resultRSt6vectorIiSaIiEES2_S2_: # @_Z13verify_resultRSt6vectorIiSaIiEES2_S2_
.cfi_startproc
# %bb.0:
retq
.Lfunc_end1:
.size _Z13verify_resultRSt6vectorIiSaIiEES2_S2_, .Lfunc_end1-_Z13verify_resultRSt6vectorIiSaIiEES2_S2_
.cfi_endproc
# -- End function
.globl main # -- Begin function main
.p2align 4, 0x90
.type main,@function
main: # @main
.Lfunc_begin0:
.cfi_startproc
.cfi_personality 3, __gxx_personality_v0
.cfi_lsda 3, .Lexception0
# %bb.0: # %_ZNSt6vectorIiSaIiEEC2EmRKS0_.exit
pushq %r15
.cfi_def_cfa_offset 16
pushq %r14
.cfi_def_cfa_offset 24
pushq %r12
.cfi_def_cfa_offset 32
pushq %rbx
.cfi_def_cfa_offset 40
subq $120, %rsp
.cfi_def_cfa_offset 160
.cfi_offset %rbx, -40
.cfi_offset %r12, -32
.cfi_offset %r14, -24
.cfi_offset %r15, -16
.cfi_escape 0x2e, 0x00
movl $4194304, %edi # imm = 0x400000
callq _Znwm
movq %rax, %rbx
.cfi_escape 0x2e, 0x00
movl $4194304, %edx # imm = 0x400000
movq %rax, %rdi
xorl %esi, %esi
callq memset@PLT
.Ltmp0:
.cfi_escape 0x2e, 0x00
movl $4194304, %edi # imm = 0x400000
callq _Znwm
.Ltmp1:
# %bb.1: # %_ZNSt6vectorIiSaIiEEC2EmRKS0_.exit34
movq %rax, %r14
.cfi_escape 0x2e, 0x00
movl $4194304, %edx # imm = 0x400000
movq %rax, %rdi
xorl %esi, %esi
callq memset@PLT
.Ltmp3:
.cfi_escape 0x2e, 0x00
movl $4194304, %edi # imm = 0x400000
callq _Znwm
.Ltmp4:
# %bb.2: # %_ZNSt6vectorIiSaIiEEC2EmRKS0_.exit35
movq %rax, %r15
.cfi_escape 0x2e, 0x00
xorl %r12d, %r12d
movl $4194304, %edx # imm = 0x400000
movq %rax, %rdi
xorl %esi, %esi
callq memset@PLT
.p2align 4, 0x90
.LBB2_3: # %.lr.ph.i
# =>This Inner Loop Header: Depth=1
.cfi_escape 0x2e, 0x00
callq rand
cltq
imulq $1374389535, %rax, %rcx # imm = 0x51EB851F
movq %rcx, %rdx
shrq $63, %rdx
sarq $37, %rcx
addl %edx, %ecx
imull $100, %ecx, %ecx
subl %ecx, %eax
movl %eax, (%rbx,%r12)
addq $4, %r12
cmpq $4194304, %r12 # imm = 0x400000
jne .LBB2_3
# %bb.4: # %.lr.ph.i36.preheader
xorl %r12d, %r12d
.p2align 4, 0x90
.LBB2_5: # %.lr.ph.i36
# =>This Inner Loop Header: Depth=1
.cfi_escape 0x2e, 0x00
callq rand
cltq
imulq $1374389535, %rax, %rcx # imm = 0x51EB851F
movq %rcx, %rdx
shrq $63, %rdx
sarq $37, %rcx
addl %edx, %ecx
imull $100, %ecx, %ecx
subl %ecx, %eax
movl %eax, (%r14,%r12)
addq $4, %r12
cmpq $4194304, %r12 # imm = 0x400000
jne .LBB2_5
# %bb.6: # %_ZSt8generateIN9__gnu_cxx17__normal_iteratorIPiSt6vectorIiSaIiEEEEZ4mainEUlvE0_EvT_S8_T0_.exit
.Ltmp6:
.cfi_escape 0x2e, 0x00
leaq 16(%rsp), %rdi
movl $4194304, %esi # imm = 0x400000
callq hipMalloc
.Ltmp7:
# %bb.7: # %_ZL9hipMallocIiE10hipError_tPPT_m.exit
.Ltmp8:
.cfi_escape 0x2e, 0x00
leaq 8(%rsp), %rdi
movl $4194304, %esi # imm = 0x400000
callq hipMalloc
.Ltmp9:
# %bb.8: # %_ZL9hipMallocIiE10hipError_tPPT_m.exit38
.Ltmp10:
.cfi_escape 0x2e, 0x00
movq %rsp, %rdi
movl $4194304, %esi # imm = 0x400000
callq hipMalloc
.Ltmp11:
# %bb.9: # %_ZL9hipMallocIiE10hipError_tPPT_m.exit39
movq 16(%rsp), %rdi
.Ltmp12:
.cfi_escape 0x2e, 0x00
movl $4194304, %edx # imm = 0x400000
movq %rbx, %rsi
movl $1, %ecx
callq hipMemcpy
.Ltmp13:
# %bb.10:
movq 8(%rsp), %rdi
.Ltmp14:
.cfi_escape 0x2e, 0x00
movl $4194304, %edx # imm = 0x400000
movq %r14, %rsi
movl $1, %ecx
callq hipMemcpy
.Ltmp15:
# %bb.11:
movq (%rsp), %rdi
.Ltmp16:
.cfi_escape 0x2e, 0x00
movl $4194304, %edx # imm = 0x400000
movq %r15, %rsi
movl $1, %ecx
callq hipMemcpy
.Ltmp17:
# %bb.12:
.Ltmp19:
.cfi_escape 0x2e, 0x00
movabsq $137438953504, %rdi # imm = 0x2000000020
movl $1, %esi
movq %rdi, %rdx
movl $1, %ecx
xorl %r8d, %r8d
xorl %r9d, %r9d
callq __hipPushCallConfiguration
.Ltmp20:
# %bb.13:
testl %eax, %eax
jne .LBB2_16
# %bb.14:
movq 16(%rsp), %rax
movq 8(%rsp), %rcx
movq (%rsp), %rdx
movq %rax, 88(%rsp)
movq %rcx, 80(%rsp)
movq %rdx, 72(%rsp)
leaq 88(%rsp), %rax
movq %rax, 96(%rsp)
leaq 80(%rsp), %rax
movq %rax, 104(%rsp)
leaq 72(%rsp), %rax
movq %rax, 112(%rsp)
.Ltmp21:
.cfi_escape 0x2e, 0x00
leaq 56(%rsp), %rdi
leaq 40(%rsp), %rsi
leaq 32(%rsp), %rdx
leaq 24(%rsp), %rcx
callq __hipPopCallConfiguration
.Ltmp22:
# %bb.15: # %.noexc
movq 56(%rsp), %rsi
movl 64(%rsp), %edx
movq 40(%rsp), %rcx
movl 48(%rsp), %r8d
.Ltmp23:
.cfi_escape 0x2e, 0x10
leaq 96(%rsp), %r9
movl $_Z14tiledMatrixMulPKiS0_Pi, %edi
pushq 24(%rsp)
.cfi_adjust_cfa_offset 8
pushq 40(%rsp)
.cfi_adjust_cfa_offset 8
callq hipLaunchKernel
addq $16, %rsp
.cfi_adjust_cfa_offset -16
.Ltmp24:
.LBB2_16:
movq (%rsp), %rsi
.Ltmp25:
.cfi_escape 0x2e, 0x00
movl $4194304, %edx # imm = 0x400000
movq %r15, %rdi
movl $2, %ecx
callq hipMemcpy
.Ltmp26:
# %bb.17:
movq 16(%rsp), %rdi
.Ltmp27:
.cfi_escape 0x2e, 0x00
callq hipFree
.Ltmp28:
# %bb.18:
movq 8(%rsp), %rdi
.Ltmp29:
.cfi_escape 0x2e, 0x00
callq hipFree
.Ltmp30:
# %bb.19:
movq (%rsp), %rdi
.Ltmp31:
.cfi_escape 0x2e, 0x00
callq hipFree
.Ltmp32:
# %bb.20: # %_ZNSt6vectorIiSaIiEED2Ev.exit
.cfi_escape 0x2e, 0x00
movl $.L.str, %edi
xorl %eax, %eax
callq printf
.cfi_escape 0x2e, 0x00
movq %r15, %rdi
callq _ZdlPv
.cfi_escape 0x2e, 0x00
movq %r14, %rdi
callq _ZdlPv
.cfi_escape 0x2e, 0x00
movq %rbx, %rdi
callq _ZdlPv
xorl %eax, %eax
addq $120, %rsp
.cfi_def_cfa_offset 40
popq %rbx
.cfi_def_cfa_offset 32
popq %r12
.cfi_def_cfa_offset 24
popq %r14
.cfi_def_cfa_offset 16
popq %r15
.cfi_def_cfa_offset 8
retq
.LBB2_22:
.cfi_def_cfa_offset 160
.Ltmp5:
movq %rax, %r12
jmp .LBB2_26
.LBB2_21:
.Ltmp2:
movq %rax, %r12
jmp .LBB2_27
.LBB2_23:
.Ltmp33:
jmp .LBB2_25
.LBB2_24:
.Ltmp18:
.LBB2_25: # %_ZNSt6vectorIiSaIiEED2Ev.exit46
movq %rax, %r12
.cfi_escape 0x2e, 0x00
movq %r15, %rdi
callq _ZdlPv
.LBB2_26: # %_ZNSt6vectorIiSaIiEED2Ev.exit48
.cfi_escape 0x2e, 0x00
movq %r14, %rdi
callq _ZdlPv
.LBB2_27: # %_ZNSt6vectorIiSaIiEED2Ev.exit50
.cfi_escape 0x2e, 0x00
movq %rbx, %rdi
callq _ZdlPv
.cfi_escape 0x2e, 0x00
movq %r12, %rdi
callq _Unwind_Resume@PLT
.Lfunc_end2:
.size main, .Lfunc_end2-main
.cfi_endproc
.section .gcc_except_table,"a",@progbits
.p2align 2, 0x0
GCC_except_table2:
.Lexception0:
.byte 255 # @LPStart Encoding = omit
.byte 255 # @TType Encoding = omit
.byte 1 # Call site Encoding = uleb128
.uleb128 .Lcst_end0-.Lcst_begin0
.Lcst_begin0:
.uleb128 .Lfunc_begin0-.Lfunc_begin0 # >> Call Site 1 <<
.uleb128 .Ltmp0-.Lfunc_begin0 # Call between .Lfunc_begin0 and .Ltmp0
.byte 0 # has no landing pad
.byte 0 # On action: cleanup
.uleb128 .Ltmp0-.Lfunc_begin0 # >> Call Site 2 <<
.uleb128 .Ltmp1-.Ltmp0 # Call between .Ltmp0 and .Ltmp1
.uleb128 .Ltmp2-.Lfunc_begin0 # jumps to .Ltmp2
.byte 0 # On action: cleanup
.uleb128 .Ltmp1-.Lfunc_begin0 # >> Call Site 3 <<
.uleb128 .Ltmp3-.Ltmp1 # Call between .Ltmp1 and .Ltmp3
.byte 0 # has no landing pad
.byte 0 # On action: cleanup
.uleb128 .Ltmp3-.Lfunc_begin0 # >> Call Site 4 <<
.uleb128 .Ltmp4-.Ltmp3 # Call between .Ltmp3 and .Ltmp4
.uleb128 .Ltmp5-.Lfunc_begin0 # jumps to .Ltmp5
.byte 0 # On action: cleanup
.uleb128 .Ltmp4-.Lfunc_begin0 # >> Call Site 5 <<
.uleb128 .Ltmp6-.Ltmp4 # Call between .Ltmp4 and .Ltmp6
.byte 0 # has no landing pad
.byte 0 # On action: cleanup
.uleb128 .Ltmp6-.Lfunc_begin0 # >> Call Site 6 <<
.uleb128 .Ltmp17-.Ltmp6 # Call between .Ltmp6 and .Ltmp17
.uleb128 .Ltmp18-.Lfunc_begin0 # jumps to .Ltmp18
.byte 0 # On action: cleanup
.uleb128 .Ltmp19-.Lfunc_begin0 # >> Call Site 7 <<
.uleb128 .Ltmp32-.Ltmp19 # Call between .Ltmp19 and .Ltmp32
.uleb128 .Ltmp33-.Lfunc_begin0 # jumps to .Ltmp33
.byte 0 # On action: cleanup
.uleb128 .Ltmp32-.Lfunc_begin0 # >> Call Site 8 <<
.uleb128 .Lfunc_end2-.Ltmp32 # Call between .Ltmp32 and .Lfunc_end2
.byte 0 # has no landing pad
.byte 0 # On action: cleanup
.Lcst_end0:
.p2align 2, 0x0
# -- End function
.text
.p2align 4, 0x90 # -- Begin function __hip_module_ctor
.type __hip_module_ctor,@function
__hip_module_ctor: # @__hip_module_ctor
.cfi_startproc
# %bb.0:
subq $40, %rsp
.cfi_def_cfa_offset 48
cmpq $0, __hip_gpubin_handle(%rip)
jne .LBB3_2
# %bb.1:
movl $__hip_fatbin_wrapper, %edi
callq __hipRegisterFatBinary
movq %rax, __hip_gpubin_handle(%rip)
.LBB3_2:
movq __hip_gpubin_handle(%rip), %rdi
xorps %xmm0, %xmm0
movups %xmm0, 16(%rsp)
movups %xmm0, (%rsp)
movl $_Z14tiledMatrixMulPKiS0_Pi, %esi
movl $.L__unnamed_1, %edx
movl $.L__unnamed_1, %ecx
movl $-1, %r8d
xorl %r9d, %r9d
callq __hipRegisterFunction
movl $__hip_module_dtor, %edi
addq $40, %rsp
.cfi_def_cfa_offset 8
jmp atexit # TAILCALL
.Lfunc_end3:
.size __hip_module_ctor, .Lfunc_end3-__hip_module_ctor
.cfi_endproc
# -- End function
.p2align 4, 0x90 # -- Begin function __hip_module_dtor
.type __hip_module_dtor,@function
__hip_module_dtor: # @__hip_module_dtor
.cfi_startproc
# %bb.0:
movq __hip_gpubin_handle(%rip), %rdi
testq %rdi, %rdi
je .LBB4_2
# %bb.1:
pushq %rax
.cfi_def_cfa_offset 16
callq __hipUnregisterFatBinary
movq $0, __hip_gpubin_handle(%rip)
addq $8, %rsp
.cfi_def_cfa_offset 8
.LBB4_2:
retq
.Lfunc_end4:
.size __hip_module_dtor, .Lfunc_end4-__hip_module_dtor
.cfi_endproc
# -- End function
.type _Z14tiledMatrixMulPKiS0_Pi,@object # @_Z14tiledMatrixMulPKiS0_Pi
.section .rodata,"a",@progbits
.globl _Z14tiledMatrixMulPKiS0_Pi
.p2align 3, 0x0
_Z14tiledMatrixMulPKiS0_Pi:
.quad _Z29__device_stub__tiledMatrixMulPKiS0_Pi
.size _Z14tiledMatrixMulPKiS0_Pi, 8
.type .L.str,@object # @.str
.section .rodata.str1.1,"aMS",@progbits,1
.L.str:
.asciz "Completed."
.size .L.str, 11
.type .L__unnamed_1,@object # @0
.L__unnamed_1:
.asciz "_Z14tiledMatrixMulPKiS0_Pi"
.size .L__unnamed_1, 27
.type __hip_fatbin_wrapper,@object # @__hip_fatbin_wrapper
.section .hipFatBinSegment,"a",@progbits
.p2align 3, 0x0
__hip_fatbin_wrapper:
.long 1212764230 # 0x48495046
.long 1 # 0x1
.quad __hip_fatbin
.quad 0
.size __hip_fatbin_wrapper, 24
.type __hip_gpubin_handle,@object # @__hip_gpubin_handle
.local __hip_gpubin_handle
.comm __hip_gpubin_handle,8,8
.section .init_array,"aw",@init_array
.p2align 3, 0x0
.quad __hip_module_ctor
.type __hip_cuid_,@object # @__hip_cuid_
.bss
.globl __hip_cuid_
__hip_cuid_:
.byte 0 # 0x0
.size __hip_cuid_, 1
.section ".linker-options","e",@llvm_linker_options
.ident "AMD clang version 18.0.0git (https://github.com/RadeonOpenCompute/llvm-project roc-6.3.2 25012 e5bf7e55c91490b07c49d8960fa7983d864936c4)"
.section ".note.GNU-stack","",@progbits
.addrsig
.addrsig_sym _Z29__device_stub__tiledMatrixMulPKiS0_Pi
.addrsig_sym __gxx_personality_v0
.addrsig_sym __hip_module_ctor
.addrsig_sym __hip_module_dtor
.addrsig_sym _Unwind_Resume
.addrsig_sym _Z14tiledMatrixMulPKiS0_Pi
.addrsig_sym __hip_fatbin
.addrsig_sym __hip_fatbin_wrapper
.addrsig_sym __hip_cuid_ |
You are a helpful coding assistant specialized in converting from CUDA device assembly to AMD device assembly. | code for sm_80
Function : _Z14tiledMatrixMulPKiS0_Pi
.headerflags @"EF_CUDA_TEXMODE_UNIFIED EF_CUDA_64BIT_ADDRESS EF_CUDA_SM80 EF_CUDA_VIRTUAL_SM(EF_CUDA_SM80)"
/*0000*/ MOV R1, c[0x0][0x28] ; /* 0x00000a0000017a02 */
/* 0x000fe40000000f00 */
/*0010*/ S2R R9, SR_CTAID.Y ; /* 0x0000000000097919 */
/* 0x000e220000002600 */
/*0020*/ IMAD.MOV.U32 R8, RZ, RZ, c[0x0][0x0] ; /* 0x00000000ff087624 */
/* 0x000fe200078e00ff */
/*0030*/ HFMA2.MMA R7, -RZ, RZ, 0, 0 ; /* 0x00000000ff077435 */
/* 0x000fe200000001ff */
/*0040*/ IMAD.MOV.U32 R18, RZ, RZ, RZ ; /* 0x000000ffff127224 */
/* 0x000fe200078e00ff */
/*0050*/ S2R R0, SR_TID.Y ; /* 0x0000000000007919 */
/* 0x000e220000002200 */
/*0060*/ ULDC.64 UR4, c[0x0][0x118] ; /* 0x0000460000047ab9 */
/* 0x000fe20000000a00 */
/*0070*/ IADD3 R2, R8.reuse, -0x1, RZ ; /* 0xffffffff08027810 */
/* 0x040fe40007ffe0ff */
/*0080*/ S2R R3, SR_CTAID.X ; /* 0x0000000000037919 */
/* 0x000e620000002500 */
/*0090*/ LOP3.LUT R8, R8, 0x3, RZ, 0xc0, !PT ; /* 0x0000000308087812 */
/* 0x000fe400078ec0ff */
/*00a0*/ ISETP.GE.U32.AND P2, PT, R2, 0x3, PT ; /* 0x000000030200780c */
/* 0x000fe20003f46070 */
/*00b0*/ S2R R6, SR_TID.X ; /* 0x0000000000067919 */
/* 0x000e620000002100 */
/*00c0*/ IADD3 R15, -R8, c[0x0][0x0], RZ ; /* 0x00000000080f7a10 */
/* 0x000fe20007ffe1ff */
/*00d0*/ IMAD R9, R9, c[0x0][0x4], R0 ; /* 0x0000010009097a24 */
/* 0x001fc400078e0200 */
/*00e0*/ IMAD R11, R0, c[0x0][0x0], RZ ; /* 0x00000000000b7a24 */
/* 0x000fca00078e02ff */
/*00f0*/ LEA R16, R11, 0x8, 0x2 ; /* 0x000000080b107811 */
/* 0x000fe200078e10ff */
/*0100*/ IMAD R10, R3, c[0x0][0x0], R6.reuse ; /* 0x00000000030a7a24 */
/* 0x102fe200078e0206 */
/*0110*/ LEA R12, R6, 0x1000, 0x2 ; /* 0x00001000060c7811 */
/* 0x000fe200078e10ff */
/*0120*/ IMAD.IADD R13, R11, 0x1, R6 ; /* 0x000000010b0d7824 */
/* 0x000fe200078e0206 */
/*0130*/ LEA R14, R9, R6, 0xa ; /* 0x00000006090e7211 */
/* 0x000fc800078e50ff */
/*0140*/ IADD3 R3, R0, R7, RZ ; /* 0x0000000700037210 */
/* 0x000fe20007ffe0ff */
/*0150*/ IMAD.IADD R2, R14, 0x1, R7 ; /* 0x000000010e027824 */
/* 0x000fe200078e0207 */
/*0160*/ MOV R17, 0x4 ; /* 0x0000000400117802 */
/* 0x000fc60000000f00 */
/*0170*/ IMAD R4, R3, 0x400, R10 ; /* 0x0000040003047824 */
/* 0x000fe400078e020a */
/*0180*/ IMAD.WIDE.U32 R2, R2, R17, c[0x0][0x160] ; /* 0x0000580002027625 */
/* 0x000fc800078e0011 */
/*0190*/ IMAD.WIDE.U32 R4, R4, R17, c[0x0][0x168] ; /* 0x00005a0004047625 */
/* 0x000fe400078e0011 */
/*01a0*/ LDG.E R2, [R2.64] ; /* 0x0000000402027981 */
/* 0x000ea8000c1e1900 */
/*01b0*/ LDG.E R4, [R4.64] ; /* 0x0000000404047981 */
/* 0x000ee2000c1e1900 */
/*01c0*/ ISETP.NE.AND P0, PT, RZ, c[0x0][0x0], PT ; /* 0x00000000ff007a0c */
/* 0x000fe40003f05270 */
/*01d0*/ IADD3 R7, R7, c[0x0][0x0], RZ ; /* 0x0000000007077a10 */
/* 0x000fc80007ffe0ff */
/*01e0*/ ISETP.GE.AND P1, PT, R7, 0x400, PT ; /* 0x000004000700780c */
/* 0x000fe20003f26270 */
/*01f0*/ STS [R13.X4], R2 ; /* 0x000000020d007388 */
/* 0x0041e80000004800 */
/*0200*/ STS [R13.X4+0x1000], R4 ; /* 0x001000040d007388 */
/* 0x0081e80000004800 */
/*0210*/ BAR.SYNC.DEFER_BLOCKING 0x0 ; /* 0x0000000000007b1d */
/* 0x000fec0000010000 */
/*0220*/ @!P0 BRA 0xc90 ; /* 0x00000a6000008947 */
/* 0x000fea0003800000 */
/*0230*/ HFMA2.MMA R2, -RZ, RZ, 0, 0 ; /* 0x00000000ff027435 */
/* 0x001fe200000001ff */
/*0240*/ @!P2 BRA 0xb40 ; /* 0x000008f00000a947 */
/* 0x000fea0003800000 */
/*0250*/ ISETP.GT.AND P0, PT, R15, RZ, PT ; /* 0x000000ff0f00720c */
/* 0x000fe20003f04270 */
/*0260*/ IMAD.MOV.U32 R2, RZ, RZ, RZ ; /* 0x000000ffff027224 */
/* 0x000fe200078e00ff */
/*0270*/ MOV R3, R16 ; /* 0x0000001000037202 */
/* 0x000fe20000000f00 */
/*0280*/ IMAD.MOV.U32 R24, RZ, RZ, R12 ; /* 0x000000ffff187224 */
/* 0x000fe200078e000c */
/*0290*/ MOV R4, R15 ; /* 0x0000000f00047202 */
/* 0x000fd20000000f00 */
/*02a0*/ @!P0 BRA 0x9e0 ; /* 0x0000073000008947 */
/* 0x000fea0003800000 */
/*02b0*/ ISETP.GT.AND P3, PT, R4, 0xc, PT ; /* 0x0000000c0400780c */
/* 0x000fe40003f64270 */
/*02c0*/ PLOP3.LUT P0, PT, PT, PT, PT, 0x80, 0x0 ; /* 0x000000000000781c */
/* 0x000fd60003f0f070 */
/*02d0*/ @!P3 BRA 0x750 ; /* 0x000004700000b947 */
/* 0x000fea0003800000 */
/*02e0*/ PLOP3.LUT P0, PT, PT, PT, PT, 0x8, 0x0 ; /* 0x000000000000781c */
/* 0x000fe40003f0e170 */
/*02f0*/ LDS R21, [R24] ; /* 0x0000000018157984 */
/* 0x0001e20000000800 */
/*0300*/ IMAD.MOV.U32 R5, RZ, RZ, c[0x0][0x0] ; /* 0x00000000ff057624 */
/* 0x000fe200078e00ff */
/*0310*/ IADD3 R4, R4, -0x10, RZ ; /* 0xfffffff004047810 */
/* 0x000fe40007ffe0ff */
/*0320*/ LDS R25, [R3+-0x8] ; /* 0xfffff80003197984 */
/* 0x000e620000000800 */
/*0330*/ IADD3 R2, R2, 0x10, RZ ; /* 0x0000001002027810 */
/* 0x000fe40007ffe0ff */
/*0340*/ LEA R26, R5, R24, 0x2 ; /* 0x00000018051a7211 */
/* 0x000fe200078e10ff */
/*0350*/ LDS R23, [R3+-0x4] ; /* 0xfffffc0003177984 */
/* 0x000fe20000000800 */
/*0360*/ ISETP.GT.AND P3, PT, R4, 0xc, PT ; /* 0x0000000c0400780c */
/* 0x000fc60003f64270 */
/*0370*/ LDS R22, [R26] ; /* 0x000000001a167984 */
/* 0x0004e20000000800 */
/*0380*/ IMAD R28, R5, 0x4, R26 ; /* 0x00000004051c7824 */
/* 0x000fc600078e021a */
/*0390*/ LDS R19, [R3] ; /* 0x0000000003137984 */
/* 0x000fe40000000800 */
/*03a0*/ LEA R27, R5.reuse, R28, 0x2 ; /* 0x0000001c051b7211 */
/* 0x040fe400078e10ff */
/*03b0*/ LDS R20, [R28] ; /* 0x000000001c147984 */
/* 0x0009660000000800 */
/*03c0*/ IMAD R24, R5, 0x4, R27 ; /* 0x0000000405187824 */
/* 0x001fca00078e021b */
/*03d0*/ LEA R26, R5, R24, 0x2 ; /* 0x00000018051a7211 */
/* 0x004fca00078e10ff */
/*03e0*/ IMAD R28, R5, 0x4, R26 ; /* 0x00000004051c7824 */
/* 0x010fe400078e021a */
/*03f0*/ IMAD R25, R21, R25, R18 ; /* 0x0000001915197224 */
/* 0x002fe400078e0212 */
/*0400*/ LDS R18, [R3+0x4] ; /* 0x0000040003127984 */
/* 0x000fe80000000800 */
/*0410*/ LDS R21, [R27] ; /* 0x000000001b157984 */
/* 0x0000620000000800 */
/*0420*/ IMAD R25, R22, R23, R25 ; /* 0x0000001716197224 */
/* 0x008fc600078e0219 */
/*0430*/ LDS R22, [R3+0x8] ; /* 0x0000080003167984 */
/* 0x000fe80000000800 */
/*0440*/ LDS R23, [R24] ; /* 0x0000000018177984 */
/* 0x0004e20000000800 */
/*0450*/ LEA R27, R5.reuse, R28, 0x2 ; /* 0x0000001c051b7211 */
/* 0x041fe200078e10ff */
/*0460*/ IMAD R25, R20, R19, R25 ; /* 0x0000001314197224 */
/* 0x020fe400078e0219 */
/*0470*/ LDS R19, [R3+0xc] ; /* 0x00000c0003137984 */
/* 0x000fe80000000800 */
/*0480*/ LDS R20, [R26] ; /* 0x000000001a147984 */
/* 0x0001220000000800 */
/*0490*/ IMAD R24, R5, 0x4, R27 ; /* 0x0000000405187824 */
/* 0x004fca00078e021b */
/*04a0*/ LEA R26, R5, R24, 0x2 ; /* 0x00000018051a7211 */
/* 0x001fe200078e10ff */
/*04b0*/ IMAD R25, R21, R18, R25 ; /* 0x0000001215197224 */
/* 0x002fe400078e0219 */
/*04c0*/ LDS R18, [R3+0x10] ; /* 0x0000100003127984 */
/* 0x000fe80000000800 */
/*04d0*/ LDS R21, [R28] ; /* 0x000000001c157984 */
/* 0x0000620000000800 */
/*04e0*/ IMAD R25, R23, R22, R25 ; /* 0x0000001617197224 */
/* 0x008fc600078e0219 */
/*04f0*/ LDS R22, [R3+0x14] ; /* 0x0000140003167984 */
/* 0x000fe80000000800 */
/*0500*/ LDS R23, [R27] ; /* 0x000000001b177984 */
/* 0x0004e20000000800 */
/*0510*/ IMAD R28, R5.reuse, 0x4, R26 ; /* 0x00000004051c7824 */
/* 0x041fe400078e021a */
/*0520*/ IMAD R25, R20, R19, R25 ; /* 0x0000001314197224 */
/* 0x010fe400078e0219 */
/*0530*/ LDS R19, [R3+0x18] ; /* 0x0000180003137984 */
/* 0x000fe20000000800 */
/*0540*/ LEA R27, R5, R28, 0x2 ; /* 0x0000001c051b7211 */
/* 0x004fc600078e10ff */
/*0550*/ LDS R20, [R24] ; /* 0x0000000018147984 */
/* 0x0000a40000000800 */
/*0560*/ IMAD R24, R5, 0x4, R27 ; /* 0x0000000405187824 */
/* 0x001fe400078e021b */
/*0570*/ IMAD R25, R21, R18, R25 ; /* 0x0000001215197224 */
/* 0x002fe400078e0219 */
/*0580*/ LDS R18, [R3+0x1c] ; /* 0x00001c0003127984 */
/* 0x000fe80000000800 */
/*0590*/ LDS R21, [R26] ; /* 0x000000001a157984 */
/* 0x0000620000000800 */
/*05a0*/ IMAD R25, R23, R22, R25 ; /* 0x0000001617197224 */
/* 0x008fc600078e0219 */
/*05b0*/ LDS R22, [R3+0x20] ; /* 0x0000200003167984 */
/* 0x000fe80000000800 */
/*05c0*/ LDS R23, [R28] ; /* 0x000000001c177984 */
/* 0x0007220000000800 */
/*05d0*/ LEA R26, R5.reuse, R24, 0x2 ; /* 0x00000018051a7211 */
/* 0x041fe200078e10ff */
/*05e0*/ IMAD R25, R20, R19, R25 ; /* 0x0000001314197224 */
/* 0x004fe400078e0219 */
/*05f0*/ LDS R19, [R3+0x24] ; /* 0x0000240003137984 */
/* 0x000fe40000000800 */
/*0600*/ IMAD R28, R5, 0x4, R26 ; /* 0x00000004051c7824 */
/* 0x008fc400078e021a */
/*0610*/ LDS R20, [R27] ; /* 0x000000001b147984 */
/* 0x000e280000000800 */
/*0620*/ LDS R26, [R26] ; /* 0x000000001a1a7984 */
/* 0x000fe20000000800 */
/*0630*/ IMAD R25, R21, R18, R25 ; /* 0x0000001215197224 */
/* 0x002fc600078e0219 */
/*0640*/ LDS R18, [R3+0x28] ; /* 0x0000280003127984 */
/* 0x000fe80000000800 */
/*0650*/ LDS R21, [R24] ; /* 0x0000000018157984 */
/* 0x0002a20000000800 */
/*0660*/ IMAD R22, R23, R22, R25 ; /* 0x0000001617167224 */
/* 0x010fc600078e0219 */
/*0670*/ LDS R25, [R3+0x30] ; /* 0x0000300003197984 */
/* 0x000fe20000000800 */
/*0680*/ IMAD R23, R20, R19, R22 ; /* 0x0000001314177224 */
/* 0x001fe200078e0216 */
/*0690*/ LEA R20, R5.reuse, R28, 0x2 ; /* 0x0000001c05147211 */
/* 0x040fe400078e10ff */
/*06a0*/ LDS R22, [R3+0x2c] ; /* 0x00002c0003167984 */
/* 0x000e280000000800 */
/*06b0*/ LDS R19, [R28] ; /* 0x000000001c137984 */
/* 0x000ee20000000800 */
/*06c0*/ IMAD R24, R5, 0x4, R20 ; /* 0x0000000405187824 */
/* 0x002fe400078e0214 */
/*06d0*/ IMAD R21, R21, R18, R23 ; /* 0x0000001215157224 */
/* 0x004fc400078e0217 */
/*06e0*/ LDS R23, [R3+0x34] ; /* 0x0000340003177984 */
/* 0x0003e80000000800 */
/*06f0*/ LDS R18, [R20] ; /* 0x0000000014127984 */
/* 0x000ea20000000800 */
/*0700*/ IADD3 R3, R3, 0x40, RZ ; /* 0x0000004003037810 */
/* 0x002fe20007ffe0ff */
/*0710*/ IMAD R22, R26, R22, R21 ; /* 0x000000161a167224 */
/* 0x001fc800078e0215 */
/*0720*/ IMAD R19, R19, R25, R22 ; /* 0x0000001913137224 */
/* 0x008fc800078e0216 */
/*0730*/ IMAD R18, R18, R23, R19 ; /* 0x0000001712127224 */
/* 0x004fe200078e0213 */
/*0740*/ @P3 BRA 0x2f0 ; /* 0xfffffba000003947 */
/* 0x000fea000383ffff */
/*0750*/ ISETP.GT.AND P3, PT, R4, 0x4, PT ; /* 0x000000040400780c */
/* 0x000fda0003f64270 */
/*0760*/ @!P3 BRA 0x9c0 ; /* 0x000002500000b947 */
/* 0x000fea0003800000 */
/*0770*/ MOV R5, c[0x0][0x0] ; /* 0x0000000000057a02 */
/* 0x000fe20000000f00 */
/*0780*/ LDS R23, [R24] ; /* 0x0000000018177984 */
/* 0x0001e20000000800 */
/*0790*/ PLOP3.LUT P0, PT, PT, PT, PT, 0x8, 0x0 ; /* 0x000000000000781c */
/* 0x000fe40003f0e170 */
/*07a0*/ LEA R26, R5.reuse, R24, 0x2 ; /* 0x00000018051a7211 */
/* 0x040fe200078e10ff */
/*07b0*/ LDS R25, [R3+-0x8] ; /* 0xfffff80003197984 */
/* 0x000e620000000800 */
/*07c0*/ IADD3 R2, R2, 0x8, RZ ; /* 0x0000000802027810 */
/* 0x000fe40007ffe0ff */
/*07d0*/ IADD3 R4, R4, -0x8, RZ ; /* 0xfffffff804047810 */
/* 0x000fe20007ffe0ff */
/*07e0*/ LDS R21, [R3+-0x4] ; /* 0xfffffc0003157984 */
/* 0x000fe20000000800 */
/*07f0*/ IMAD R28, R5, 0x4, R26 ; /* 0x00000004051c7824 */
/* 0x000fc600078e021a */
/*0800*/ LDS R22, [R26] ; /* 0x000000001a167984 */
/* 0x0004e40000000800 */
/*0810*/ LEA R27, R5.reuse, R28, 0x2 ; /* 0x0000001c051b7211 */
/* 0x040fe400078e10ff */
/*0820*/ LDS R19, [R3] ; /* 0x0000000003137984 */
/* 0x000fe40000000800 */
/*0830*/ LEA R24, R5.reuse, R27, 0x2 ; /* 0x0000001b05187211 */
/* 0x041fe400078e10ff */
/*0840*/ LDS R20, [R28] ; /* 0x000000001c147984 */
/* 0x0001260000000800 */
/*0850*/ IMAD R26, R5, 0x4, R24 ; /* 0x00000004051a7824 */
/* 0x004fca00078e0218 */
/*0860*/ LEA R28, R5, R26, 0x2 ; /* 0x0000001a051c7211 */
/* 0x001fe400078e10ff */
/*0870*/ LDS R26, [R26] ; /* 0x000000001a1a7984 */
/* 0x000fe20000000800 */
/*0880*/ IMAD R25, R23, R25, R18 ; /* 0x0000001917197224 */
/* 0x002fc600078e0212 */
/*0890*/ LDS R18, [R3+0x4] ; /* 0x0000040003127984 */
/* 0x000fe80000000800 */
/*08a0*/ LDS R23, [R27] ; /* 0x000000001b177984 */
/* 0x000e220000000800 */
/*08b0*/ IMAD R25, R22, R21, R25 ; /* 0x0000001516197224 */
/* 0x008fc600078e0219 */
/*08c0*/ LDS R21, [R3+0x8] ; /* 0x0000080003157984 */
/* 0x000fe80000000800 */
/*08d0*/ LDS R22, [R24] ; /* 0x0000000018167984 */
/* 0x0002a20000000800 */
/*08e0*/ IMAD R19, R20, R19, R25 ; /* 0x0000001314137224 */
/* 0x010fe200078e0219 */
/*08f0*/ LEA R20, R5.reuse, R28, 0x2 ; /* 0x0000001c05147211 */
/* 0x040fe400078e10ff */
/*0900*/ LDS R25, [R3+0x10] ; /* 0x0000100003197984 */
/* 0x000fe60000000800 */
/*0910*/ IMAD R24, R5, 0x4, R20 ; /* 0x0000000405187824 */
/* 0x002fc400078e0214 */
/*0920*/ IMAD R23, R23, R18, R19 ; /* 0x0000001217177224 */
/* 0x001fe400078e0213 */
/*0930*/ LDS R19, [R3+0xc] ; /* 0x00000c0003137984 */
/* 0x000e280000000800 */
/*0940*/ LDS R18, [R28] ; /* 0x000000001c127984 */
/* 0x000e620000000800 */
/*0950*/ IMAD R22, R22, R21, R23 ; /* 0x0000001516167224 */
/* 0x004fc600078e0217 */
/*0960*/ LDS R23, [R3+0x14] ; /* 0x0000140003177984 */
/* 0x0005e80000000800 */
/*0970*/ LDS R21, [R20] ; /* 0x0000000014157984 */
/* 0x000ee20000000800 */
/*0980*/ IADD3 R3, R3, 0x20, RZ ; /* 0x0000002003037810 */
/* 0x004fe20007ffe0ff */
/*0990*/ IMAD R19, R26, R19, R22 ; /* 0x000000131a137224 */
/* 0x001fc800078e0216 */
/*09a0*/ IMAD R18, R18, R25, R19 ; /* 0x0000001912127224 */
/* 0x002fc800078e0213 */
/*09b0*/ IMAD R18, R21, R23, R18 ; /* 0x0000001715127224 */
/* 0x008fe400078e0212 */
/*09c0*/ ISETP.NE.OR P0, PT, R4, RZ, P0 ; /* 0x000000ff0400720c */
/* 0x000fda0000705670 */
/*09d0*/ @!P0 BRA 0xb40 ; /* 0x0000016000008947 */
/* 0x000fea0003800000 */
/*09e0*/ LDS R23, [R24] ; /* 0x0000000018177984 */
/* 0x0001e20000000800 */
/*09f0*/ MOV R5, c[0x0][0x0] ; /* 0x0000000000057a02 */
/* 0x000fe40000000f00 */
/*0a00*/ IADD3 R4, R4, -0x4, RZ ; /* 0xfffffffc04047810 */
/* 0x000fe20007ffe0ff */
/*0a10*/ LDS R22, [R3+-0x8] ; /* 0xfffff80003167984 */
/* 0x000e620000000800 */
/*0a20*/ LEA R28, R5.reuse, R24, 0x2 ; /* 0x00000018051c7211 */
/* 0x040fe400078e10ff */
/*0a30*/ ISETP.NE.AND P0, PT, R4, RZ, PT ; /* 0x000000ff0400720c */
/* 0x000fe20003f05270 */
/*0a40*/ LDS R19, [R3+-0x4] ; /* 0xfffffc0003137984 */
/* 0x000fe20000000800 */
/*0a50*/ IADD3 R2, R2, 0x4, RZ ; /* 0x0000000402027810 */
/* 0x000fe20007ffe0ff */
/*0a60*/ IMAD R27, R5, 0x4, R28 ; /* 0x00000004051b7824 */
/* 0x000fc400078e021c */
/*0a70*/ LDS R25, [R28] ; /* 0x000000001c197984 */
/* 0x000ea60000000800 */
/*0a80*/ LEA R20, R5.reuse, R27, 0x2 ; /* 0x0000001b05147211 */
/* 0x040fe200078e10ff */
/*0a90*/ LDS R21, [R27] ; /* 0x000000001b157984 */
/* 0x000fe60000000800 */
/*0aa0*/ LEA R24, R5, R20, 0x2 ; /* 0x0000001405187211 */
/* 0x001fe200078e10ff */
/*0ab0*/ LDS R26, [R3] ; /* 0x00000000031a7984 */
/* 0x000e220000000800 */
/*0ac0*/ IMAD R22, R23, R22, R18 ; /* 0x0000001617167224 */
/* 0x002fc600078e0212 */
/*0ad0*/ LDS R23, [R3+0x4] ; /* 0x0000040003177984 */
/* 0x0003e80000000800 */
/*0ae0*/ LDS R18, [R20] ; /* 0x0000000014127984 */
/* 0x000ee20000000800 */
/*0af0*/ IMAD R22, R25, R19, R22 ; /* 0x0000001319167224 */
/* 0x004fe200078e0216 */
/*0b00*/ IADD3 R3, R3, 0x10, RZ ; /* 0x0000001003037810 */
/* 0x002fc60007ffe0ff */
/*0b10*/ IMAD R21, R21, R26, R22 ; /* 0x0000001a15157224 */
/* 0x001fc800078e0216 */
/*0b20*/ IMAD R18, R18, R23, R21 ; /* 0x0000001712127224 */
/* 0x008fe200078e0215 */
/*0b30*/ @P0 BRA 0x9e0 ; /* 0xfffffea000000947 */
/* 0x000fea000383ffff */
/*0b40*/ ISETP.NE.AND P0, PT, R8, RZ, PT ; /* 0x000000ff0800720c */
/* 0x000fda0003f05270 */
/*0b50*/ @!P0 BRA 0xc90 ; /* 0x0000013000008947 */
/* 0x000fea0003800000 */
/*0b60*/ IMAD.IADD R3, R11, 0x1, R2 ; /* 0x000000010b037824 */
/* 0x000fe200078e0202 */
/*0b70*/ ISETP.NE.AND P0, PT, R8, 0x1, PT ; /* 0x000000010800780c */
/* 0x000fe20003f05270 */
/*0b80*/ IMAD R2, R2, c[0x0][0x0], R6 ; /* 0x0000000002027a24 */
/* 0x000fc600078e0206 */
/*0b90*/ SHF.L.U32 R20, R3, 0x2, RZ ; /* 0x0000000203147819 */
/* 0x000fe400000006ff */
/*0ba0*/ LDS R3, [R2.X4+0x1000] ; /* 0x0010000002037984 */
/* 0x000fe20000004800 */
/*0bb0*/ LEA R5, R2, 0x1000, 0x2 ; /* 0x0000100002057811 */
/* 0x000fc600078e10ff */
/*0bc0*/ LDS R4, [R20] ; /* 0x0000000014047984 */
/* 0x000e240000000800 */
/*0bd0*/ IMAD R18, R3, R4, R18 ; /* 0x0000000403127224 */
/* 0x001fe200078e0212 */
/*0be0*/ @!P0 BRA 0xc90 ; /* 0x000000a000008947 */
/* 0x000fea0003800000 */
/*0bf0*/ ISETP.NE.AND P0, PT, R8, 0x2, PT ; /* 0x000000020800780c */
/* 0x000fe20003f05270 */
/*0c00*/ LDS R2, [R20+0x4] ; /* 0x0000040014027984 */
/* 0x000fe20000000800 */
/*0c10*/ MOV R4, c[0x0][0x0] ; /* 0x0000000000047a02 */
/* 0x000fca0000000f00 */
/*0c20*/ IMAD R3, R4, 0x4, R5 ; /* 0x0000000404037824 */
/* 0x000fcc00078e0205 */
/*0c30*/ @P0 LEA R4, R4, R3, 0x2 ; /* 0x0000000304040211 */
/* 0x000fe200078e10ff */
/*0c40*/ @P0 LDS R19, [R20+0x8] ; /* 0x0000080014130984 */
/* 0x000fe80000000800 */
/*0c50*/ LDS R3, [R3] ; /* 0x0000000003037984 */
/* 0x000e280000000800 */
/*0c60*/ @P0 LDS R5, [R4] ; /* 0x0000000004050984 */
/* 0x000e620000000800 */
/*0c70*/ IMAD R18, R3, R2, R18 ; /* 0x0000000203127224 */
/* 0x001fc800078e0212 */
/*0c80*/ @P0 IMAD R18, R5, R19, R18 ; /* 0x0000001305120224 */
/* 0x002fe400078e0212 */
/*0c90*/ BAR.SYNC.DEFER_BLOCKING 0x0 ; /* 0x0000000000007b1d */
/* 0x001fec0000010000 */
/*0ca0*/ @!P1 BRA 0x140 ; /* 0xfffff49000009947 */
/* 0x000fea000383ffff */
/*0cb0*/ LEA R2, R9, R10, 0xa ; /* 0x0000000a09027211 */
/* 0x000fca00078e50ff */
/*0cc0*/ IMAD.WIDE R2, R2, R17, c[0x0][0x170] ; /* 0x00005c0002027625 */
/* 0x000fca00078e0211 */
/*0cd0*/ STG.E [R2.64], R18 ; /* 0x0000001202007986 */
/* 0x000fe2000c101904 */
/*0ce0*/ EXIT ; /* 0x000000000000794d */
/* 0x000fea0003800000 */
/*0cf0*/ BRA 0xcf0; /* 0xfffffff000007947 */
/* 0x000fc0000383ffff */
/*0d00*/ NOP; /* 0x0000000000007918 */
/* 0x000fc00000000000 */
/*0d10*/ NOP; /* 0x0000000000007918 */
/* 0x000fc00000000000 */
/*0d20*/ NOP; /* 0x0000000000007918 */
/* 0x000fc00000000000 */
/*0d30*/ NOP; /* 0x0000000000007918 */
/* 0x000fc00000000000 */
/*0d40*/ NOP; /* 0x0000000000007918 */
/* 0x000fc00000000000 */
/*0d50*/ NOP; /* 0x0000000000007918 */
/* 0x000fc00000000000 */
/*0d60*/ NOP; /* 0x0000000000007918 */
/* 0x000fc00000000000 */
/*0d70*/ NOP; /* 0x0000000000007918 */
/* 0x000fc00000000000 */
.......... | .text
.amdgcn_target "amdgcn-amd-amdhsa--gfx1100"
.protected _Z14tiledMatrixMulPKiS0_Pi
.globl _Z14tiledMatrixMulPKiS0_Pi
.p2align 8
.type _Z14tiledMatrixMulPKiS0_Pi,@function
_Z14tiledMatrixMulPKiS0_Pi:
s_clause 0x1
s_load_b32 s2, s[0:1], 0x24
s_load_b128 s[4:7], s[0:1], 0x0
v_bfe_u32 v2, v0, 10, 10
v_and_b32_e32 v9, 0x3ff, v0
s_mov_b32 s8, 0
s_delay_alu instid0(VALU_DEP_1)
v_lshl_or_b32 v6, v9, 2, 0x1000
s_waitcnt lgkmcnt(0)
s_and_b32 s3, s2, 0xffff
s_lshr_b32 s2, s2, 16
s_cmp_lg_u32 s3, 0
v_mul_u32_u24_e32 v0, s3, v2
v_mad_u64_u32 v[3:4], null, s15, s2, v[2:3]
s_cselect_b32 s2, -1, 0
s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_3) | instid1(VALU_DEP_2)
v_dual_mov_b32 v1, 0 :: v_dual_lshlrev_b32 v8, 2, v0
v_cndmask_b32_e64 v10, 0, 1, s2
v_add_lshl_u32 v7, v0, v9, 2
s_lshl_b32 s9, s3, 2
v_mad_u64_u32 v[4:5], null, s14, s3, v[9:10]
v_cmp_ne_u32_e64 s2, 1, v10
v_lshl_or_b32 v9, v3, 10, v9
v_dual_mov_b32 v5, v1 :: v_dual_add_nc_u32 v10, 0x1000, v7
s_set_inst_prefetch_distance 0x1
s_branch .LBB0_2
.p2align 6
.LBB0_1:
s_add_i32 s8, s8, s3
s_delay_alu instid0(SALU_CYCLE_1)
s_cmpk_gt_u32 s8, 0x3ff
s_barrier
buffer_gl0_inv
s_cbranch_scc1 .LBB0_5
.LBB0_2:
s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_2)
v_add_nc_u32_e32 v0, s8, v9
v_add_nc_u32_e32 v13, s8, v2
v_lshlrev_b64 v[11:12], 2, v[0:1]
s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
v_lshl_add_u32 v0, v13, 10, v4
v_lshlrev_b64 v[13:14], 2, v[0:1]
s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_4)
v_add_co_u32 v11, vcc_lo, s4, v11
v_add_co_ci_u32_e32 v12, vcc_lo, s5, v12, vcc_lo
s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_4)
v_add_co_u32 v13, vcc_lo, s6, v13
v_add_co_ci_u32_e32 v14, vcc_lo, s7, v14, vcc_lo
s_and_b32 vcc_lo, exec_lo, s2
global_load_b32 v0, v[11:12], off
global_load_b32 v11, v[13:14], off
s_waitcnt vmcnt(1)
ds_store_b32 v7, v0
s_waitcnt vmcnt(0)
ds_store_b32 v10, v11
s_waitcnt lgkmcnt(0)
s_barrier
buffer_gl0_inv
s_cbranch_vccnz .LBB0_1
v_mov_b32_e32 v0, v6
s_mov_b32 s10, 0
.LBB0_4:
s_delay_alu instid0(SALU_CYCLE_1)
v_add_nc_u32_e32 v11, s10, v8
s_add_i32 s10, s10, 4
ds_load_b32 v13, v0
ds_load_b32 v14, v11
s_cmp_eq_u32 s9, s10
s_waitcnt lgkmcnt(0)
v_mad_u64_u32 v[11:12], null, v13, v14, v[5:6]
s_delay_alu instid0(VALU_DEP_1)
v_dual_mov_b32 v5, v11 :: v_dual_add_nc_u32 v0, s9, v0
s_cbranch_scc0 .LBB0_4
s_branch .LBB0_1
.LBB0_5:
s_set_inst_prefetch_distance 0x2
s_load_b64 s[0:1], s[0:1], 0x10
v_lshl_add_u32 v0, v3, 10, v4
s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
v_ashrrev_i32_e32 v1, 31, v0
v_lshlrev_b64 v[0:1], 2, v[0:1]
s_waitcnt lgkmcnt(0)
s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_2)
v_add_co_u32 v0, vcc_lo, s0, v0
v_add_co_ci_u32_e32 v1, vcc_lo, s1, v1, vcc_lo
global_store_b32 v[0:1], v5, off
s_nop 0
s_sendmsg sendmsg(MSG_DEALLOC_VGPRS)
s_endpgm
.section .rodata,"a",@progbits
.p2align 6, 0x0
.amdhsa_kernel _Z14tiledMatrixMulPKiS0_Pi
.amdhsa_group_segment_fixed_size 8192
.amdhsa_private_segment_fixed_size 0
.amdhsa_kernarg_size 280
.amdhsa_user_sgpr_count 14
.amdhsa_user_sgpr_dispatch_ptr 0
.amdhsa_user_sgpr_queue_ptr 0
.amdhsa_user_sgpr_kernarg_segment_ptr 1
.amdhsa_user_sgpr_dispatch_id 0
.amdhsa_user_sgpr_private_segment_size 0
.amdhsa_wavefront_size32 1
.amdhsa_uses_dynamic_stack 0
.amdhsa_enable_private_segment 0
.amdhsa_system_sgpr_workgroup_id_x 1
.amdhsa_system_sgpr_workgroup_id_y 1
.amdhsa_system_sgpr_workgroup_id_z 0
.amdhsa_system_sgpr_workgroup_info 0
.amdhsa_system_vgpr_workitem_id 1
.amdhsa_next_free_vgpr 15
.amdhsa_next_free_sgpr 16
.amdhsa_float_round_mode_32 0
.amdhsa_float_round_mode_16_64 0
.amdhsa_float_denorm_mode_32 3
.amdhsa_float_denorm_mode_16_64 3
.amdhsa_dx10_clamp 1
.amdhsa_ieee_mode 1
.amdhsa_fp16_overflow 0
.amdhsa_workgroup_processor_mode 1
.amdhsa_memory_ordered 1
.amdhsa_forward_progress 0
.amdhsa_shared_vgpr_count 0
.amdhsa_exception_fp_ieee_invalid_op 0
.amdhsa_exception_fp_denorm_src 0
.amdhsa_exception_fp_ieee_div_zero 0
.amdhsa_exception_fp_ieee_overflow 0
.amdhsa_exception_fp_ieee_underflow 0
.amdhsa_exception_fp_ieee_inexact 0
.amdhsa_exception_int_div_zero 0
.end_amdhsa_kernel
.text
.Lfunc_end0:
.size _Z14tiledMatrixMulPKiS0_Pi, .Lfunc_end0-_Z14tiledMatrixMulPKiS0_Pi
.section .AMDGPU.csdata,"",@progbits
.text
.p2alignl 7, 3214868480
.fill 96, 4, 3214868480
.type __hip_cuid_,@object
.section .bss,"aw",@nobits
.globl __hip_cuid_
__hip_cuid_:
.byte 0
.size __hip_cuid_, 1
.ident "AMD clang version 18.0.0git (https://github.com/RadeonOpenCompute/llvm-project roc-6.3.2 25012 e5bf7e55c91490b07c49d8960fa7983d864936c4)"
.section ".note.GNU-stack","",@progbits
.addrsig
.addrsig_sym __hip_cuid_
.amdgpu_metadata
---
amdhsa.kernels:
- .args:
- .address_space: global
.offset: 0
.size: 8
.value_kind: global_buffer
- .address_space: global
.offset: 8
.size: 8
.value_kind: global_buffer
- .address_space: global
.offset: 16
.size: 8
.value_kind: global_buffer
- .offset: 24
.size: 4
.value_kind: hidden_block_count_x
- .offset: 28
.size: 4
.value_kind: hidden_block_count_y
- .offset: 32
.size: 4
.value_kind: hidden_block_count_z
- .offset: 36
.size: 2
.value_kind: hidden_group_size_x
- .offset: 38
.size: 2
.value_kind: hidden_group_size_y
- .offset: 40
.size: 2
.value_kind: hidden_group_size_z
- .offset: 42
.size: 2
.value_kind: hidden_remainder_x
- .offset: 44
.size: 2
.value_kind: hidden_remainder_y
- .offset: 46
.size: 2
.value_kind: hidden_remainder_z
- .offset: 64
.size: 8
.value_kind: hidden_global_offset_x
- .offset: 72
.size: 8
.value_kind: hidden_global_offset_y
- .offset: 80
.size: 8
.value_kind: hidden_global_offset_z
- .offset: 88
.size: 2
.value_kind: hidden_grid_dims
.group_segment_fixed_size: 8192
.kernarg_segment_align: 8
.kernarg_segment_size: 280
.language: OpenCL C
.language_version:
- 2
- 0
.max_flat_workgroup_size: 1024
.name: _Z14tiledMatrixMulPKiS0_Pi
.private_segment_fixed_size: 0
.sgpr_count: 18
.sgpr_spill_count: 0
.symbol: _Z14tiledMatrixMulPKiS0_Pi.kd
.uniform_work_group_size: 1
.uses_dynamic_stack: false
.vgpr_count: 15
.vgpr_spill_count: 0
.wavefront_size: 32
.workgroup_processor_mode: 1
amdhsa.target: amdgcn-amd-amdhsa--gfx1100
amdhsa.version:
- 1
- 2
...
.end_amdgpu_metadata |
You are a helpful coding assistant specialized in converting from CUDA host assembly to AMD host assembly. | .file "tmpxft_00154bc9_00000000-6_cache_tile.cudafe1.cpp"
.text
#APP
.globl _ZSt21ios_base_library_initv
#NO_APP
.type _ZL26__cudaUnregisterBinaryUtilv, @function
_ZL26__cudaUnregisterBinaryUtilv:
.LFB4930:
.cfi_startproc
endbr64
subq $8, %rsp
.cfi_def_cfa_offset 16
movq _ZL20__cudaFatCubinHandle(%rip), %rdi
call __cudaUnregisterFatBinary@PLT
addq $8, %rsp
.cfi_def_cfa_offset 8
ret
.cfi_endproc
.LFE4930:
.size _ZL26__cudaUnregisterBinaryUtilv, .-_ZL26__cudaUnregisterBinaryUtilv
.globl _Z13verify_resultRSt6vectorIiSaIiEES2_S2_
.type _Z13verify_resultRSt6vectorIiSaIiEES2_S2_, @function
_Z13verify_resultRSt6vectorIiSaIiEES2_S2_:
.LFB4920:
.cfi_startproc
endbr64
movl $1024, %ecx
.L4:
movl $1024, %edx
.L8:
movl $1024, %eax
.L5:
subl $1, %eax
jne .L5
subl $1, %edx
jne .L8
subl $1, %ecx
jne .L4
ret
.cfi_endproc
.LFE4920:
.size _Z13verify_resultRSt6vectorIiSaIiEES2_S2_, .-_Z13verify_resultRSt6vectorIiSaIiEES2_S2_
.globl _Z40__device_stub__Z14tiledMatrixMulPKiS0_PiPKiS0_Pi
.type _Z40__device_stub__Z14tiledMatrixMulPKiS0_PiPKiS0_Pi, @function
_Z40__device_stub__Z14tiledMatrixMulPKiS0_PiPKiS0_Pi:
.LFB4952:
.cfi_startproc
endbr64
subq $136, %rsp
.cfi_def_cfa_offset 144
movq %rdi, 24(%rsp)
movq %rsi, 16(%rsp)
movq %rdx, 8(%rsp)
movq %fs:40, %rax
movq %rax, 120(%rsp)
xorl %eax, %eax
leaq 24(%rsp), %rax
movq %rax, 96(%rsp)
leaq 16(%rsp), %rax
movq %rax, 104(%rsp)
leaq 8(%rsp), %rax
movq %rax, 112(%rsp)
movl $1, 48(%rsp)
movl $1, 52(%rsp)
movl $1, 56(%rsp)
movl $1, 60(%rsp)
movl $1, 64(%rsp)
movl $1, 68(%rsp)
leaq 40(%rsp), %rcx
leaq 32(%rsp), %rdx
leaq 60(%rsp), %rsi
leaq 48(%rsp), %rdi
call __cudaPopCallConfiguration@PLT
testl %eax, %eax
je .L14
.L10:
movq 120(%rsp), %rax
subq %fs:40, %rax
jne .L15
addq $136, %rsp
.cfi_remember_state
.cfi_def_cfa_offset 8
ret
.L14:
.cfi_restore_state
pushq 40(%rsp)
.cfi_def_cfa_offset 152
pushq 40(%rsp)
.cfi_def_cfa_offset 160
leaq 112(%rsp), %r9
movq 76(%rsp), %rcx
movl 84(%rsp), %r8d
movq 64(%rsp), %rsi
movl 72(%rsp), %edx
leaq _Z14tiledMatrixMulPKiS0_Pi(%rip), %rdi
call cudaLaunchKernel@PLT
addq $16, %rsp
.cfi_def_cfa_offset 144
jmp .L10
.L15:
call __stack_chk_fail@PLT
.cfi_endproc
.LFE4952:
.size _Z40__device_stub__Z14tiledMatrixMulPKiS0_PiPKiS0_Pi, .-_Z40__device_stub__Z14tiledMatrixMulPKiS0_PiPKiS0_Pi
.globl _Z14tiledMatrixMulPKiS0_Pi
.type _Z14tiledMatrixMulPKiS0_Pi, @function
_Z14tiledMatrixMulPKiS0_Pi:
.LFB4953:
.cfi_startproc
endbr64
subq $8, %rsp
.cfi_def_cfa_offset 16
call _Z40__device_stub__Z14tiledMatrixMulPKiS0_PiPKiS0_Pi
addq $8, %rsp
.cfi_def_cfa_offset 8
ret
.cfi_endproc
.LFE4953:
.size _Z14tiledMatrixMulPKiS0_Pi, .-_Z14tiledMatrixMulPKiS0_Pi
.section .rodata.str1.1,"aMS",@progbits,1
.LC0:
.string "_Z14tiledMatrixMulPKiS0_Pi"
.text
.type _ZL24__sti____cudaRegisterAllv, @function
_ZL24__sti____cudaRegisterAllv:
.LFB4955:
.cfi_startproc
endbr64
subq $8, %rsp
.cfi_def_cfa_offset 16
leaq _ZL15__fatDeviceText(%rip), %rdi
call __cudaRegisterFatBinary@PLT
movq %rax, %rdi
movq %rax, _ZL20__cudaFatCubinHandle(%rip)
pushq $0
.cfi_def_cfa_offset 24
pushq $0
.cfi_def_cfa_offset 32
pushq $0
.cfi_def_cfa_offset 40
pushq $0
.cfi_def_cfa_offset 48
movl $0, %r9d
movl $-1, %r8d
leaq .LC0(%rip), %rdx
movq %rdx, %rcx
leaq _Z14tiledMatrixMulPKiS0_Pi(%rip), %rsi
call __cudaRegisterFunction@PLT
addq $32, %rsp
.cfi_def_cfa_offset 16
movq _ZL20__cudaFatCubinHandle(%rip), %rdi
call __cudaRegisterFatBinaryEnd@PLT
leaq _ZL26__cudaUnregisterBinaryUtilv(%rip), %rdi
call atexit@PLT
addq $8, %rsp
.cfi_def_cfa_offset 8
ret
.cfi_endproc
.LFE4955:
.size _ZL24__sti____cudaRegisterAllv, .-_ZL24__sti____cudaRegisterAllv
.section .init_array,"aw"
.align 8
.quad _ZL24__sti____cudaRegisterAllv
.section .rodata._ZNSt6vectorIiSaIiEEC2EmRKS0_.str1.8,"aMS",@progbits,1
.align 8
.LC1:
.string "cannot create std::vector larger than max_size()"
.section .text._ZNSt6vectorIiSaIiEEC2EmRKS0_,"axG",@progbits,_ZNSt6vectorIiSaIiEEC5EmRKS0_,comdat
.align 2
.weak _ZNSt6vectorIiSaIiEEC2EmRKS0_
.type _ZNSt6vectorIiSaIiEEC2EmRKS0_, @function
_ZNSt6vectorIiSaIiEEC2EmRKS0_:
.LFB5270:
.cfi_startproc
endbr64
pushq %r12
.cfi_def_cfa_offset 16
.cfi_offset 12, -16
pushq %rbp
.cfi_def_cfa_offset 24
.cfi_offset 6, -24
pushq %rbx
.cfi_def_cfa_offset 32
.cfi_offset 3, -32
movq %rsi, %rax
shrq $61, %rax
jne .L30
movq %rdi, %rbx
movq %rsi, %rbp
movq $0, (%rdi)
movq $0, 8(%rdi)
movq $0, 16(%rdi)
testq %rsi, %rsi
je .L22
leaq 0(,%rsi,4), %r12
movq %r12, %rdi
call _Znwm@PLT
movq %rax, (%rbx)
movq %rax, 8(%rbx)
leaq (%rax,%r12), %rdx
movq %rdx, 16(%rbx)
movl $0, (%rax)
addq $4, %rax
cmpq $1, %rbp
je .L25
cmpq %rax, %rdx
je .L26
.L24:
movl $0, (%rax)
addq $4, %rax
cmpq %rax, %rdx
jne .L24
jmp .L23
.L30:
leaq .LC1(%rip), %rdi
call _ZSt20__throw_length_errorPKc@PLT
.L25:
movq %rax, %rdx
jmp .L23
.L26:
movq %rax, %rdx
jmp .L23
.L22:
movq $0, (%rdi)
movq $0, 16(%rdi)
movl $0, %edx
.L23:
movq %rdx, 8(%rbx)
popq %rbx
.cfi_def_cfa_offset 24
popq %rbp
.cfi_def_cfa_offset 16
popq %r12
.cfi_def_cfa_offset 8
ret
.cfi_endproc
.LFE5270:
.size _ZNSt6vectorIiSaIiEEC2EmRKS0_, .-_ZNSt6vectorIiSaIiEEC2EmRKS0_
.weak _ZNSt6vectorIiSaIiEEC1EmRKS0_
.set _ZNSt6vectorIiSaIiEEC1EmRKS0_,_ZNSt6vectorIiSaIiEEC2EmRKS0_
.section .text._ZNSt6vectorIiSaIiEED2Ev,"axG",@progbits,_ZNSt6vectorIiSaIiEED5Ev,comdat
.align 2
.weak _ZNSt6vectorIiSaIiEED2Ev
.type _ZNSt6vectorIiSaIiEED2Ev, @function
_ZNSt6vectorIiSaIiEED2Ev:
.LFB5273:
.cfi_startproc
endbr64
movq (%rdi), %rax
testq %rax, %rax
je .L34
subq $8, %rsp
.cfi_def_cfa_offset 16
movq 16(%rdi), %rsi
subq %rax, %rsi
movq %rax, %rdi
call _ZdlPvm@PLT
addq $8, %rsp
.cfi_def_cfa_offset 8
ret
.L34:
ret
.cfi_endproc
.LFE5273:
.size _ZNSt6vectorIiSaIiEED2Ev, .-_ZNSt6vectorIiSaIiEED2Ev
.weak _ZNSt6vectorIiSaIiEED1Ev
.set _ZNSt6vectorIiSaIiEED1Ev,_ZNSt6vectorIiSaIiEED2Ev
.section .rodata.str1.1
.LC2:
.string "Completed."
.text
.globl main
.type main, @function
main:
.LFB4921:
.cfi_startproc
.cfi_personality 0x9b,DW.ref.__gxx_personality_v0
.cfi_lsda 0x1b,.LLSDA4921
endbr64
pushq %r13
.cfi_def_cfa_offset 16
.cfi_offset 13, -16
pushq %r12
.cfi_def_cfa_offset 24
.cfi_offset 12, -24
pushq %rbp
.cfi_def_cfa_offset 32
.cfi_offset 6, -32
pushq %rbx
.cfi_def_cfa_offset 40
.cfi_offset 3, -40
subq $152, %rsp
.cfi_def_cfa_offset 192
movq %fs:40, %rax
movq %rax, 136(%rsp)
xorl %eax, %eax
leaq 112(%rsp), %rbx
leaq 48(%rsp), %rdi
movq %rbx, %rdx
movl $1048576, %esi
.LEHB0:
call _ZNSt6vectorIiSaIiEEC1EmRKS0_
.LEHE0:
leaq 80(%rsp), %rdi
movq %rbx, %rdx
movl $1048576, %esi
.LEHB1:
call _ZNSt6vectorIiSaIiEEC1EmRKS0_
.LEHE1:
leaq 36(%rsp), %rdx
movq %rbx, %rdi
movl $1048576, %esi
.LEHB2:
call _ZNSt6vectorIiSaIiEEC1EmRKS0_
.LEHE2:
movq 56(%rsp), %rbp
movq 48(%rsp), %r13
cmpq %r13, %rbp
je .L38
movq %r13, %rbx
.L39:
call rand@PLT
movslq %eax, %rdx
imulq $1374389535, %rdx, %rdx
sarq $37, %rdx
movl %eax, %ecx
sarl $31, %ecx
subl %ecx, %edx
imull $100, %edx, %edx
subl %edx, %eax
movl %eax, (%rbx)
addq $4, %rbx
cmpq %rbx, %rbp
jne .L39
.L38:
movq 88(%rsp), %rbp
movq 80(%rsp), %r12
cmpq %r12, %rbp
je .L40
movq %r12, %rbx
.L41:
call rand@PLT
movslq %eax, %rdx
imulq $1374389535, %rdx, %rdx
sarq $37, %rdx
movl %eax, %ecx
sarl $31, %ecx
subl %ecx, %edx
imull $100, %edx, %edx
subl %edx, %eax
movl %eax, (%rbx)
addq $4, %rbx
cmpq %rbx, %rbp
jne .L41
.L40:
movq %rsp, %rdi
movl $4194304, %esi
.LEHB3:
call cudaMalloc@PLT
leaq 8(%rsp), %rdi
movl $4194304, %esi
call cudaMalloc@PLT
leaq 16(%rsp), %rdi
movl $4194304, %esi
call cudaMalloc@PLT
movl $1, %ecx
movl $4194304, %edx
movq %r13, %rsi
movq (%rsp), %rdi
call cudaMemcpy@PLT
movl $1, %ecx
movl $4194304, %edx
movq %r12, %rsi
movq 8(%rsp), %rdi
call cudaMemcpy@PLT
movq 112(%rsp), %rbx
movl $1, %ecx
movl $4194304, %edx
movq %rbx, %rsi
movq 16(%rsp), %rdi
call cudaMemcpy@PLT
movl $32, 24(%rsp)
movl $32, 28(%rsp)
movl $32, 36(%rsp)
movl $32, 40(%rsp)
movl $1, 44(%rsp)
movl $0, %r9d
movl $0, %r8d
movq 36(%rsp), %rdx
movl $1, %ecx
movq 24(%rsp), %rdi
movl $1, %esi
call __cudaPushCallConfiguration@PLT
testl %eax, %eax
jne .L42
movq 16(%rsp), %rdx
movq 8(%rsp), %rsi
movq (%rsp), %rdi
call _Z40__device_stub__Z14tiledMatrixMulPKiS0_PiPKiS0_Pi
.L42:
movl $2, %ecx
movl $4194304, %edx
movq 16(%rsp), %rsi
movq %rbx, %rdi
call cudaMemcpy@PLT
movq (%rsp), %rdi
call cudaFree@PLT
movq 8(%rsp), %rdi
call cudaFree@PLT
movq 16(%rsp), %rdi
call cudaFree@PLT
leaq .LC2(%rip), %rsi
movl $2, %edi
movl $0, %eax
call __printf_chk@PLT
.LEHE3:
leaq 112(%rsp), %rdi
call _ZNSt6vectorIiSaIiEED1Ev
leaq 80(%rsp), %rdi
call _ZNSt6vectorIiSaIiEED1Ev
leaq 48(%rsp), %rdi
call _ZNSt6vectorIiSaIiEED1Ev
movq 136(%rsp), %rax
subq %fs:40, %rax
jne .L55
movl $0, %eax
addq $152, %rsp
.cfi_remember_state
.cfi_def_cfa_offset 40
popq %rbx
.cfi_def_cfa_offset 32
popq %rbp
.cfi_def_cfa_offset 24
popq %r12
.cfi_def_cfa_offset 16
popq %r13
.cfi_def_cfa_offset 8
ret
.L50:
.cfi_restore_state
endbr64
movq %rax, %rbx
leaq 112(%rsp), %rdi
call _ZNSt6vectorIiSaIiEED1Ev
.L44:
leaq 80(%rsp), %rdi
call _ZNSt6vectorIiSaIiEED1Ev
.L45:
leaq 48(%rsp), %rdi
call _ZNSt6vectorIiSaIiEED1Ev
movq 136(%rsp), %rax
subq %fs:40, %rax
je .L46
call __stack_chk_fail@PLT
.L49:
endbr64
movq %rax, %rbx
jmp .L44
.L48:
endbr64
movq %rax, %rbx
jmp .L45
.L46:
movq %rbx, %rdi
.LEHB4:
call _Unwind_Resume@PLT
.LEHE4:
.L55:
call __stack_chk_fail@PLT
.cfi_endproc
.LFE4921:
.globl __gxx_personality_v0
.section .gcc_except_table,"a",@progbits
.LLSDA4921:
.byte 0xff
.byte 0xff
.byte 0x1
.uleb128 .LLSDACSE4921-.LLSDACSB4921
.LLSDACSB4921:
.uleb128 .LEHB0-.LFB4921
.uleb128 .LEHE0-.LEHB0
.uleb128 0
.uleb128 0
.uleb128 .LEHB1-.LFB4921
.uleb128 .LEHE1-.LEHB1
.uleb128 .L48-.LFB4921
.uleb128 0
.uleb128 .LEHB2-.LFB4921
.uleb128 .LEHE2-.LEHB2
.uleb128 .L49-.LFB4921
.uleb128 0
.uleb128 .LEHB3-.LFB4921
.uleb128 .LEHE3-.LEHB3
.uleb128 .L50-.LFB4921
.uleb128 0
.uleb128 .LEHB4-.LFB4921
.uleb128 .LEHE4-.LEHB4
.uleb128 0
.uleb128 0
.LLSDACSE4921:
.text
.size main, .-main
.section .nvFatBinSegment,"aw"
.align 8
.type _ZL15__fatDeviceText, @object
.size _ZL15__fatDeviceText, 24
_ZL15__fatDeviceText:
.long 1180844977
.long 1
.quad fatbinData
.quad 0
.local _ZL20__cudaFatCubinHandle
.comm _ZL20__cudaFatCubinHandle,8,8
.hidden DW.ref.__gxx_personality_v0
.weak DW.ref.__gxx_personality_v0
.section .data.rel.local.DW.ref.__gxx_personality_v0,"awG",@progbits,DW.ref.__gxx_personality_v0,comdat
.align 8
.type DW.ref.__gxx_personality_v0, @object
.size DW.ref.__gxx_personality_v0, 8
DW.ref.__gxx_personality_v0:
.quad __gxx_personality_v0
.ident "GCC: (Ubuntu 13.3.0-6ubuntu2~24.04) 13.3.0"
.section .note.GNU-stack,"",@progbits
.section .note.gnu.property,"a"
.align 8
.long 1f - 0f
.long 4f - 1f
.long 5
0:
.string "GNU"
1:
.align 8
.long 0xc0000002
.long 3f - 2f
2:
.long 0x3
3:
.align 8
4: | .text
.file "cache_tile.hip"
# Start of file scope inline assembly
.globl _ZSt21ios_base_library_initv
# End of file scope inline assembly
.globl _Z29__device_stub__tiledMatrixMulPKiS0_Pi # -- Begin function _Z29__device_stub__tiledMatrixMulPKiS0_Pi
.p2align 4, 0x90
.type _Z29__device_stub__tiledMatrixMulPKiS0_Pi,@function
_Z29__device_stub__tiledMatrixMulPKiS0_Pi: # @_Z29__device_stub__tiledMatrixMulPKiS0_Pi
.cfi_startproc
# %bb.0:
subq $104, %rsp
.cfi_def_cfa_offset 112
movq %rdi, 72(%rsp)
movq %rsi, 64(%rsp)
movq %rdx, 56(%rsp)
leaq 72(%rsp), %rax
movq %rax, 80(%rsp)
leaq 64(%rsp), %rax
movq %rax, 88(%rsp)
leaq 56(%rsp), %rax
movq %rax, 96(%rsp)
leaq 40(%rsp), %rdi
leaq 24(%rsp), %rsi
leaq 16(%rsp), %rdx
leaq 8(%rsp), %rcx
callq __hipPopCallConfiguration
movq 40(%rsp), %rsi
movl 48(%rsp), %edx
movq 24(%rsp), %rcx
movl 32(%rsp), %r8d
leaq 80(%rsp), %r9
movl $_Z14tiledMatrixMulPKiS0_Pi, %edi
pushq 8(%rsp)
.cfi_adjust_cfa_offset 8
pushq 24(%rsp)
.cfi_adjust_cfa_offset 8
callq hipLaunchKernel
addq $120, %rsp
.cfi_adjust_cfa_offset -120
retq
.Lfunc_end0:
.size _Z29__device_stub__tiledMatrixMulPKiS0_Pi, .Lfunc_end0-_Z29__device_stub__tiledMatrixMulPKiS0_Pi
.cfi_endproc
# -- End function
.globl _Z13verify_resultRSt6vectorIiSaIiEES2_S2_ # -- Begin function _Z13verify_resultRSt6vectorIiSaIiEES2_S2_
.p2align 4, 0x90
.type _Z13verify_resultRSt6vectorIiSaIiEES2_S2_,@function
_Z13verify_resultRSt6vectorIiSaIiEES2_S2_: # @_Z13verify_resultRSt6vectorIiSaIiEES2_S2_
.cfi_startproc
# %bb.0:
retq
.Lfunc_end1:
.size _Z13verify_resultRSt6vectorIiSaIiEES2_S2_, .Lfunc_end1-_Z13verify_resultRSt6vectorIiSaIiEES2_S2_
.cfi_endproc
# -- End function
.globl main # -- Begin function main
.p2align 4, 0x90
.type main,@function
main: # @main
.Lfunc_begin0:
.cfi_startproc
.cfi_personality 3, __gxx_personality_v0
.cfi_lsda 3, .Lexception0
# %bb.0: # %_ZNSt6vectorIiSaIiEEC2EmRKS0_.exit
pushq %r15
.cfi_def_cfa_offset 16
pushq %r14
.cfi_def_cfa_offset 24
pushq %r12
.cfi_def_cfa_offset 32
pushq %rbx
.cfi_def_cfa_offset 40
subq $120, %rsp
.cfi_def_cfa_offset 160
.cfi_offset %rbx, -40
.cfi_offset %r12, -32
.cfi_offset %r14, -24
.cfi_offset %r15, -16
.cfi_escape 0x2e, 0x00
movl $4194304, %edi # imm = 0x400000
callq _Znwm
movq %rax, %rbx
.cfi_escape 0x2e, 0x00
movl $4194304, %edx # imm = 0x400000
movq %rax, %rdi
xorl %esi, %esi
callq memset@PLT
.Ltmp0:
.cfi_escape 0x2e, 0x00
movl $4194304, %edi # imm = 0x400000
callq _Znwm
.Ltmp1:
# %bb.1: # %_ZNSt6vectorIiSaIiEEC2EmRKS0_.exit34
movq %rax, %r14
.cfi_escape 0x2e, 0x00
movl $4194304, %edx # imm = 0x400000
movq %rax, %rdi
xorl %esi, %esi
callq memset@PLT
.Ltmp3:
.cfi_escape 0x2e, 0x00
movl $4194304, %edi # imm = 0x400000
callq _Znwm
.Ltmp4:
# %bb.2: # %_ZNSt6vectorIiSaIiEEC2EmRKS0_.exit35
movq %rax, %r15
.cfi_escape 0x2e, 0x00
xorl %r12d, %r12d
movl $4194304, %edx # imm = 0x400000
movq %rax, %rdi
xorl %esi, %esi
callq memset@PLT
.p2align 4, 0x90
.LBB2_3: # %.lr.ph.i
# =>This Inner Loop Header: Depth=1
.cfi_escape 0x2e, 0x00
callq rand
cltq
imulq $1374389535, %rax, %rcx # imm = 0x51EB851F
movq %rcx, %rdx
shrq $63, %rdx
sarq $37, %rcx
addl %edx, %ecx
imull $100, %ecx, %ecx
subl %ecx, %eax
movl %eax, (%rbx,%r12)
addq $4, %r12
cmpq $4194304, %r12 # imm = 0x400000
jne .LBB2_3
# %bb.4: # %.lr.ph.i36.preheader
xorl %r12d, %r12d
.p2align 4, 0x90
.LBB2_5: # %.lr.ph.i36
# =>This Inner Loop Header: Depth=1
.cfi_escape 0x2e, 0x00
callq rand
cltq
imulq $1374389535, %rax, %rcx # imm = 0x51EB851F
movq %rcx, %rdx
shrq $63, %rdx
sarq $37, %rcx
addl %edx, %ecx
imull $100, %ecx, %ecx
subl %ecx, %eax
movl %eax, (%r14,%r12)
addq $4, %r12
cmpq $4194304, %r12 # imm = 0x400000
jne .LBB2_5
# %bb.6: # %_ZSt8generateIN9__gnu_cxx17__normal_iteratorIPiSt6vectorIiSaIiEEEEZ4mainEUlvE0_EvT_S8_T0_.exit
.Ltmp6:
.cfi_escape 0x2e, 0x00
leaq 16(%rsp), %rdi
movl $4194304, %esi # imm = 0x400000
callq hipMalloc
.Ltmp7:
# %bb.7: # %_ZL9hipMallocIiE10hipError_tPPT_m.exit
.Ltmp8:
.cfi_escape 0x2e, 0x00
leaq 8(%rsp), %rdi
movl $4194304, %esi # imm = 0x400000
callq hipMalloc
.Ltmp9:
# %bb.8: # %_ZL9hipMallocIiE10hipError_tPPT_m.exit38
.Ltmp10:
.cfi_escape 0x2e, 0x00
movq %rsp, %rdi
movl $4194304, %esi # imm = 0x400000
callq hipMalloc
.Ltmp11:
# %bb.9: # %_ZL9hipMallocIiE10hipError_tPPT_m.exit39
movq 16(%rsp), %rdi
.Ltmp12:
.cfi_escape 0x2e, 0x00
movl $4194304, %edx # imm = 0x400000
movq %rbx, %rsi
movl $1, %ecx
callq hipMemcpy
.Ltmp13:
# %bb.10:
movq 8(%rsp), %rdi
.Ltmp14:
.cfi_escape 0x2e, 0x00
movl $4194304, %edx # imm = 0x400000
movq %r14, %rsi
movl $1, %ecx
callq hipMemcpy
.Ltmp15:
# %bb.11:
movq (%rsp), %rdi
.Ltmp16:
.cfi_escape 0x2e, 0x00
movl $4194304, %edx # imm = 0x400000
movq %r15, %rsi
movl $1, %ecx
callq hipMemcpy
.Ltmp17:
# %bb.12:
.Ltmp19:
.cfi_escape 0x2e, 0x00
movabsq $137438953504, %rdi # imm = 0x2000000020
movl $1, %esi
movq %rdi, %rdx
movl $1, %ecx
xorl %r8d, %r8d
xorl %r9d, %r9d
callq __hipPushCallConfiguration
.Ltmp20:
# %bb.13:
testl %eax, %eax
jne .LBB2_16
# %bb.14:
movq 16(%rsp), %rax
movq 8(%rsp), %rcx
movq (%rsp), %rdx
movq %rax, 88(%rsp)
movq %rcx, 80(%rsp)
movq %rdx, 72(%rsp)
leaq 88(%rsp), %rax
movq %rax, 96(%rsp)
leaq 80(%rsp), %rax
movq %rax, 104(%rsp)
leaq 72(%rsp), %rax
movq %rax, 112(%rsp)
.Ltmp21:
.cfi_escape 0x2e, 0x00
leaq 56(%rsp), %rdi
leaq 40(%rsp), %rsi
leaq 32(%rsp), %rdx
leaq 24(%rsp), %rcx
callq __hipPopCallConfiguration
.Ltmp22:
# %bb.15: # %.noexc
movq 56(%rsp), %rsi
movl 64(%rsp), %edx
movq 40(%rsp), %rcx
movl 48(%rsp), %r8d
.Ltmp23:
.cfi_escape 0x2e, 0x10
leaq 96(%rsp), %r9
movl $_Z14tiledMatrixMulPKiS0_Pi, %edi
pushq 24(%rsp)
.cfi_adjust_cfa_offset 8
pushq 40(%rsp)
.cfi_adjust_cfa_offset 8
callq hipLaunchKernel
addq $16, %rsp
.cfi_adjust_cfa_offset -16
.Ltmp24:
.LBB2_16:
movq (%rsp), %rsi
.Ltmp25:
.cfi_escape 0x2e, 0x00
movl $4194304, %edx # imm = 0x400000
movq %r15, %rdi
movl $2, %ecx
callq hipMemcpy
.Ltmp26:
# %bb.17:
movq 16(%rsp), %rdi
.Ltmp27:
.cfi_escape 0x2e, 0x00
callq hipFree
.Ltmp28:
# %bb.18:
movq 8(%rsp), %rdi
.Ltmp29:
.cfi_escape 0x2e, 0x00
callq hipFree
.Ltmp30:
# %bb.19:
movq (%rsp), %rdi
.Ltmp31:
.cfi_escape 0x2e, 0x00
callq hipFree
.Ltmp32:
# %bb.20: # %_ZNSt6vectorIiSaIiEED2Ev.exit
.cfi_escape 0x2e, 0x00
movl $.L.str, %edi
xorl %eax, %eax
callq printf
.cfi_escape 0x2e, 0x00
movq %r15, %rdi
callq _ZdlPv
.cfi_escape 0x2e, 0x00
movq %r14, %rdi
callq _ZdlPv
.cfi_escape 0x2e, 0x00
movq %rbx, %rdi
callq _ZdlPv
xorl %eax, %eax
addq $120, %rsp
.cfi_def_cfa_offset 40
popq %rbx
.cfi_def_cfa_offset 32
popq %r12
.cfi_def_cfa_offset 24
popq %r14
.cfi_def_cfa_offset 16
popq %r15
.cfi_def_cfa_offset 8
retq
.LBB2_22:
.cfi_def_cfa_offset 160
.Ltmp5:
movq %rax, %r12
jmp .LBB2_26
.LBB2_21:
.Ltmp2:
movq %rax, %r12
jmp .LBB2_27
.LBB2_23:
.Ltmp33:
jmp .LBB2_25
.LBB2_24:
.Ltmp18:
.LBB2_25: # %_ZNSt6vectorIiSaIiEED2Ev.exit46
movq %rax, %r12
.cfi_escape 0x2e, 0x00
movq %r15, %rdi
callq _ZdlPv
.LBB2_26: # %_ZNSt6vectorIiSaIiEED2Ev.exit48
.cfi_escape 0x2e, 0x00
movq %r14, %rdi
callq _ZdlPv
.LBB2_27: # %_ZNSt6vectorIiSaIiEED2Ev.exit50
.cfi_escape 0x2e, 0x00
movq %rbx, %rdi
callq _ZdlPv
.cfi_escape 0x2e, 0x00
movq %r12, %rdi
callq _Unwind_Resume@PLT
.Lfunc_end2:
.size main, .Lfunc_end2-main
.cfi_endproc
.section .gcc_except_table,"a",@progbits
.p2align 2, 0x0
GCC_except_table2:
.Lexception0:
.byte 255 # @LPStart Encoding = omit
.byte 255 # @TType Encoding = omit
.byte 1 # Call site Encoding = uleb128
.uleb128 .Lcst_end0-.Lcst_begin0
.Lcst_begin0:
.uleb128 .Lfunc_begin0-.Lfunc_begin0 # >> Call Site 1 <<
.uleb128 .Ltmp0-.Lfunc_begin0 # Call between .Lfunc_begin0 and .Ltmp0
.byte 0 # has no landing pad
.byte 0 # On action: cleanup
.uleb128 .Ltmp0-.Lfunc_begin0 # >> Call Site 2 <<
.uleb128 .Ltmp1-.Ltmp0 # Call between .Ltmp0 and .Ltmp1
.uleb128 .Ltmp2-.Lfunc_begin0 # jumps to .Ltmp2
.byte 0 # On action: cleanup
.uleb128 .Ltmp1-.Lfunc_begin0 # >> Call Site 3 <<
.uleb128 .Ltmp3-.Ltmp1 # Call between .Ltmp1 and .Ltmp3
.byte 0 # has no landing pad
.byte 0 # On action: cleanup
.uleb128 .Ltmp3-.Lfunc_begin0 # >> Call Site 4 <<
.uleb128 .Ltmp4-.Ltmp3 # Call between .Ltmp3 and .Ltmp4
.uleb128 .Ltmp5-.Lfunc_begin0 # jumps to .Ltmp5
.byte 0 # On action: cleanup
.uleb128 .Ltmp4-.Lfunc_begin0 # >> Call Site 5 <<
.uleb128 .Ltmp6-.Ltmp4 # Call between .Ltmp4 and .Ltmp6
.byte 0 # has no landing pad
.byte 0 # On action: cleanup
.uleb128 .Ltmp6-.Lfunc_begin0 # >> Call Site 6 <<
.uleb128 .Ltmp17-.Ltmp6 # Call between .Ltmp6 and .Ltmp17
.uleb128 .Ltmp18-.Lfunc_begin0 # jumps to .Ltmp18
.byte 0 # On action: cleanup
.uleb128 .Ltmp19-.Lfunc_begin0 # >> Call Site 7 <<
.uleb128 .Ltmp32-.Ltmp19 # Call between .Ltmp19 and .Ltmp32
.uleb128 .Ltmp33-.Lfunc_begin0 # jumps to .Ltmp33
.byte 0 # On action: cleanup
.uleb128 .Ltmp32-.Lfunc_begin0 # >> Call Site 8 <<
.uleb128 .Lfunc_end2-.Ltmp32 # Call between .Ltmp32 and .Lfunc_end2
.byte 0 # has no landing pad
.byte 0 # On action: cleanup
.Lcst_end0:
.p2align 2, 0x0
# -- End function
.text
.p2align 4, 0x90 # -- Begin function __hip_module_ctor
.type __hip_module_ctor,@function
__hip_module_ctor: # @__hip_module_ctor
.cfi_startproc
# %bb.0:
subq $40, %rsp
.cfi_def_cfa_offset 48
cmpq $0, __hip_gpubin_handle(%rip)
jne .LBB3_2
# %bb.1:
movl $__hip_fatbin_wrapper, %edi
callq __hipRegisterFatBinary
movq %rax, __hip_gpubin_handle(%rip)
.LBB3_2:
movq __hip_gpubin_handle(%rip), %rdi
xorps %xmm0, %xmm0
movups %xmm0, 16(%rsp)
movups %xmm0, (%rsp)
movl $_Z14tiledMatrixMulPKiS0_Pi, %esi
movl $.L__unnamed_1, %edx
movl $.L__unnamed_1, %ecx
movl $-1, %r8d
xorl %r9d, %r9d
callq __hipRegisterFunction
movl $__hip_module_dtor, %edi
addq $40, %rsp
.cfi_def_cfa_offset 8
jmp atexit # TAILCALL
.Lfunc_end3:
.size __hip_module_ctor, .Lfunc_end3-__hip_module_ctor
.cfi_endproc
# -- End function
.p2align 4, 0x90 # -- Begin function __hip_module_dtor
.type __hip_module_dtor,@function
__hip_module_dtor: # @__hip_module_dtor
.cfi_startproc
# %bb.0:
movq __hip_gpubin_handle(%rip), %rdi
testq %rdi, %rdi
je .LBB4_2
# %bb.1:
pushq %rax
.cfi_def_cfa_offset 16
callq __hipUnregisterFatBinary
movq $0, __hip_gpubin_handle(%rip)
addq $8, %rsp
.cfi_def_cfa_offset 8
.LBB4_2:
retq
.Lfunc_end4:
.size __hip_module_dtor, .Lfunc_end4-__hip_module_dtor
.cfi_endproc
# -- End function
.type _Z14tiledMatrixMulPKiS0_Pi,@object # @_Z14tiledMatrixMulPKiS0_Pi
.section .rodata,"a",@progbits
.globl _Z14tiledMatrixMulPKiS0_Pi
.p2align 3, 0x0
_Z14tiledMatrixMulPKiS0_Pi:
.quad _Z29__device_stub__tiledMatrixMulPKiS0_Pi
.size _Z14tiledMatrixMulPKiS0_Pi, 8
.type .L.str,@object # @.str
.section .rodata.str1.1,"aMS",@progbits,1
.L.str:
.asciz "Completed."
.size .L.str, 11
.type .L__unnamed_1,@object # @0
.L__unnamed_1:
.asciz "_Z14tiledMatrixMulPKiS0_Pi"
.size .L__unnamed_1, 27
.type __hip_fatbin_wrapper,@object # @__hip_fatbin_wrapper
.section .hipFatBinSegment,"a",@progbits
.p2align 3, 0x0
__hip_fatbin_wrapper:
.long 1212764230 # 0x48495046
.long 1 # 0x1
.quad __hip_fatbin
.quad 0
.size __hip_fatbin_wrapper, 24
.type __hip_gpubin_handle,@object # @__hip_gpubin_handle
.local __hip_gpubin_handle
.comm __hip_gpubin_handle,8,8
.section .init_array,"aw",@init_array
.p2align 3, 0x0
.quad __hip_module_ctor
.type __hip_cuid_,@object # @__hip_cuid_
.bss
.globl __hip_cuid_
__hip_cuid_:
.byte 0 # 0x0
.size __hip_cuid_, 1
.section ".linker-options","e",@llvm_linker_options
.ident "AMD clang version 18.0.0git (https://github.com/RadeonOpenCompute/llvm-project roc-6.3.2 25012 e5bf7e55c91490b07c49d8960fa7983d864936c4)"
.section ".note.GNU-stack","",@progbits
.addrsig
.addrsig_sym _Z29__device_stub__tiledMatrixMulPKiS0_Pi
.addrsig_sym __gxx_personality_v0
.addrsig_sym __hip_module_ctor
.addrsig_sym __hip_module_dtor
.addrsig_sym _Unwind_Resume
.addrsig_sym _Z14tiledMatrixMulPKiS0_Pi
.addrsig_sym __hip_fatbin
.addrsig_sym __hip_fatbin_wrapper
.addrsig_sym __hip_cuid_ |
You are a helpful coding assistant specialized in converting CUDA source code to CUDA device assembly. | #include <cstdio>
#define N 64
#define B 1
#define T 64
#define gpuErrchk(ans) { gpuAssert((ans), __FILE__, __LINE__); }
inline void gpuAssert(cudaError_t code, char *file, int line, bool abort=true)
{
if (code != cudaSuccess)
{
fprintf(stderr,"GPUassert: %s %s %d\n", cudaGetErrorString(code), file, line);
if (abort) exit(code);
}
}
__global__ void dl(int* in)
{
int tid = threadIdx.x + blockIdx.x * blockDim.x;
// The warps in this block take different paths; the synctreads calls
// will cause a deadlock.
if(tid > 31)
{
if(in[tid] % 2 == 0)
in[tid]++;
__syncthreads();
}
else {
if(in[tid] % 2 == 1)
in[tid]--;
__syncthreads();
}
/* int sum = in[tid];
if(tid > 0)
sum += in[tid-1];
if(tid < N - 1)
sum += in[tid+1];
in[tid] = sum / 3; */
}
int main()
{
int* in = (int*) malloc(N*sizeof(int));
for(int i = 0; i < N; i++)
in[i] = i;
int* din;
gpuErrchk(cudaMalloc((void**)&din, N*sizeof(int)));
gpuErrchk(cudaMemcpy(din, in, N*sizeof(int), cudaMemcpyHostToDevice));
dl<<<B,T>>>(din);
gpuErrchk(cudaPeekAtLastError());
gpuErrchk(cudaDeviceSynchronize());
gpuErrchk(cudaMemcpy(in, din, N*sizeof(int), cudaMemcpyDeviceToHost));
for(int i = 0; i < N; i++)
printf("%d ", in[i]);
printf("\n");
free(in); cudaFree(din);
} | code for sm_80
Function : _Z2dlPi
.headerflags @"EF_CUDA_TEXMODE_UNIFIED EF_CUDA_64BIT_ADDRESS EF_CUDA_SM80 EF_CUDA_VIRTUAL_SM(EF_CUDA_SM80)"
/*0000*/ IMAD.MOV.U32 R1, RZ, RZ, c[0x0][0x28] ; /* 0x00000a00ff017624 */
/* 0x000fe400078e00ff */
/*0010*/ S2R R0, SR_CTAID.X ; /* 0x0000000000007919 */
/* 0x000e220000002500 */
/*0020*/ IMAD.MOV.U32 R5, RZ, RZ, 0x4 ; /* 0x00000004ff057424 */
/* 0x000fe200078e00ff */
/*0030*/ ULDC.64 UR4, c[0x0][0x118] ; /* 0x0000460000047ab9 */
/* 0x000fe40000000a00 */
/*0040*/ S2R R3, SR_TID.X ; /* 0x0000000000037919 */
/* 0x000e240000002100 */
/*0050*/ IMAD R0, R0, c[0x0][0x0], R3 ; /* 0x0000000000007a24 */
/* 0x001fc800078e0203 */
/*0060*/ IMAD.WIDE R2, R0, R5, c[0x0][0x160] ; /* 0x0000580000027625 */
/* 0x000fca00078e0205 */
/*0070*/ LDG.E R4, [R2.64] ; /* 0x0000000402047981 */
/* 0x000ea2000c1e1900 */
/*0080*/ ISETP.GT.AND P0, PT, R0, 0x1f, PT ; /* 0x0000001f0000780c */
/* 0x000fe40003f04270 */
/*0090*/ LEA.HI R0, R4, R4, RZ, 0x1 ; /* 0x0000000404007211 */
/* 0x004fc800078f08ff */
/*00a0*/ LOP3.LUT R5, R0, 0xfffffffe, RZ, 0xc0, !PT ; /* 0xfffffffe00057812 */
/* 0x000fca00078ec0ff */
/*00b0*/ IMAD.IADD R5, R4, 0x1, -R5 ; /* 0x0000000104057824 */
/* 0x000fe400078e0a05 */
/*00c0*/ @P0 BRA 0x130 ; /* 0x0000006000000947 */
/* 0x000fea0003800000 */
/*00d0*/ ISETP.NE.AND P0, PT, R5, 0x1, PT ; /* 0x000000010500780c */
/* 0x000fe20003f05270 */
/*00e0*/ WARPSYNC 0xffffffff ; /* 0xffffffff00007948 */
/* 0x000fd80003800000 */
/*00f0*/ @!P0 IADD3 R5, R4, -0x1, RZ ; /* 0xffffffff04058810 */
/* 0x000fca0007ffe0ff */
/*0100*/ @!P0 STG.E [R2.64], R5 ; /* 0x0000000502008986 */
/* 0x000fe8000c101904 */
/*0110*/ BAR.SYNC.DEFER_BLOCKING 0x0 ; /* 0x0000000000007b1d */
/* 0x000fec0000010000 */
/*0120*/ EXIT ; /* 0x000000000000794d */
/* 0x000fea0003800000 */
/*0130*/ ISETP.NE.AND P0, PT, R5, RZ, PT ; /* 0x000000ff0500720c */
/* 0x000fe20003f05270 */
/*0140*/ WARPSYNC 0xffffffff ; /* 0xffffffff00007948 */
/* 0x000fd80003800000 */
/*0150*/ @!P0 IADD3 R5, R4, 0x1, RZ ; /* 0x0000000104058810 */
/* 0x000fca0007ffe0ff */
/*0160*/ @!P0 STG.E [R2.64], R5 ; /* 0x0000000502008986 */
/* 0x000fe8000c101904 */
/*0170*/ BAR.SYNC.DEFER_BLOCKING 0x0 ; /* 0x0000000000007b1d */
/* 0x000fec0000010000 */
/*0180*/ EXIT ; /* 0x000000000000794d */
/* 0x000fea0003800000 */
/*0190*/ BRA 0x190; /* 0xfffffff000007947 */
/* 0x000fc0000383ffff */
/*01a0*/ NOP; /* 0x0000000000007918 */
/* 0x000fc00000000000 */
/*01b0*/ NOP; /* 0x0000000000007918 */
/* 0x000fc00000000000 */
/*01c0*/ NOP; /* 0x0000000000007918 */
/* 0x000fc00000000000 */
/*01d0*/ NOP; /* 0x0000000000007918 */
/* 0x000fc00000000000 */
/*01e0*/ NOP; /* 0x0000000000007918 */
/* 0x000fc00000000000 */
/*01f0*/ NOP; /* 0x0000000000007918 */
/* 0x000fc00000000000 */
/*0200*/ NOP; /* 0x0000000000007918 */
/* 0x000fc00000000000 */
/*0210*/ NOP; /* 0x0000000000007918 */
/* 0x000fc00000000000 */
/*0220*/ NOP; /* 0x0000000000007918 */
/* 0x000fc00000000000 */
/*0230*/ NOP; /* 0x0000000000007918 */
/* 0x000fc00000000000 */
/*0240*/ NOP; /* 0x0000000000007918 */
/* 0x000fc00000000000 */
/*0250*/ NOP; /* 0x0000000000007918 */
/* 0x000fc00000000000 */
/*0260*/ NOP; /* 0x0000000000007918 */
/* 0x000fc00000000000 */
/*0270*/ NOP; /* 0x0000000000007918 */
/* 0x000fc00000000000 */
.......... |
You are a helpful coding assistant specialized in converting CUDA source code to CUDA host assembly. | #include <cstdio>
#define N 64
#define B 1
#define T 64
#define gpuErrchk(ans) { gpuAssert((ans), __FILE__, __LINE__); }
inline void gpuAssert(cudaError_t code, char *file, int line, bool abort=true)
{
if (code != cudaSuccess)
{
fprintf(stderr,"GPUassert: %s %s %d\n", cudaGetErrorString(code), file, line);
if (abort) exit(code);
}
}
__global__ void dl(int* in)
{
int tid = threadIdx.x + blockIdx.x * blockDim.x;
// The warps in this block take different paths; the synctreads calls
// will cause a deadlock.
if(tid > 31)
{
if(in[tid] % 2 == 0)
in[tid]++;
__syncthreads();
}
else {
if(in[tid] % 2 == 1)
in[tid]--;
__syncthreads();
}
/* int sum = in[tid];
if(tid > 0)
sum += in[tid-1];
if(tid < N - 1)
sum += in[tid+1];
in[tid] = sum / 3; */
}
int main()
{
int* in = (int*) malloc(N*sizeof(int));
for(int i = 0; i < N; i++)
in[i] = i;
int* din;
gpuErrchk(cudaMalloc((void**)&din, N*sizeof(int)));
gpuErrchk(cudaMemcpy(din, in, N*sizeof(int), cudaMemcpyHostToDevice));
dl<<<B,T>>>(din);
gpuErrchk(cudaPeekAtLastError());
gpuErrchk(cudaDeviceSynchronize());
gpuErrchk(cudaMemcpy(in, din, N*sizeof(int), cudaMemcpyDeviceToHost));
for(int i = 0; i < N; i++)
printf("%d ", in[i]);
printf("\n");
free(in); cudaFree(din);
} | .file "tmpxft_0010cd84_00000000-6_deadlock_2.cudafe1.cpp"
.text
#APP
#NO_APP
.type _ZL26__cudaUnregisterBinaryUtilv, @function
_ZL26__cudaUnregisterBinaryUtilv:
.LFB2061:
.cfi_startproc
endbr64
subq $8, %rsp
.cfi_def_cfa_offset 16
movq _ZL20__cudaFatCubinHandle(%rip), %rdi
call __cudaUnregisterFatBinary@PLT
addq $8, %rsp
.cfi_def_cfa_offset 8
ret
.cfi_endproc
.LFE2061:
.size _ZL26__cudaUnregisterBinaryUtilv, .-_ZL26__cudaUnregisterBinaryUtilv
.section .rodata._Z9gpuAssert9cudaErrorPcib.str1.1,"aMS",@progbits,1
.LC0:
.string "GPUassert: %s %s %d\n"
.section .text._Z9gpuAssert9cudaErrorPcib,"axG",@progbits,_Z9gpuAssert9cudaErrorPcib,comdat
.weak _Z9gpuAssert9cudaErrorPcib
.type _Z9gpuAssert9cudaErrorPcib, @function
_Z9gpuAssert9cudaErrorPcib:
.LFB2057:
.cfi_startproc
endbr64
testl %edi, %edi
jne .L9
ret
.L9:
pushq %r13
.cfi_def_cfa_offset 16
.cfi_offset 13, -16
pushq %r12
.cfi_def_cfa_offset 24
.cfi_offset 12, -24
pushq %rbp
.cfi_def_cfa_offset 32
.cfi_offset 6, -32
pushq %rbx
.cfi_def_cfa_offset 40
.cfi_offset 3, -40
subq $8, %rsp
.cfi_def_cfa_offset 48
movl %edi, %ebx
movq %rsi, %r13
movl %edx, %r12d
movl %ecx, %ebp
call cudaGetErrorString@PLT
movq %rax, %rcx
movl %r12d, %r9d
movq %r13, %r8
leaq .LC0(%rip), %rdx
movl $2, %esi
movq stderr(%rip), %rdi
movl $0, %eax
call __fprintf_chk@PLT
testb %bpl, %bpl
jne .L10
addq $8, %rsp
.cfi_remember_state
.cfi_def_cfa_offset 40
popq %rbx
.cfi_def_cfa_offset 32
popq %rbp
.cfi_def_cfa_offset 24
popq %r12
.cfi_def_cfa_offset 16
popq %r13
.cfi_def_cfa_offset 8
ret
.L10:
.cfi_restore_state
movl %ebx, %edi
call exit@PLT
.cfi_endproc
.LFE2057:
.size _Z9gpuAssert9cudaErrorPcib, .-_Z9gpuAssert9cudaErrorPcib
.text
.globl _Z21__device_stub__Z2dlPiPi
.type _Z21__device_stub__Z2dlPiPi, @function
_Z21__device_stub__Z2dlPiPi:
.LFB2083:
.cfi_startproc
endbr64
subq $104, %rsp
.cfi_def_cfa_offset 112
movq %rdi, 8(%rsp)
movq %fs:40, %rax
movq %rax, 88(%rsp)
xorl %eax, %eax
leaq 8(%rsp), %rax
movq %rax, 80(%rsp)
movl $1, 32(%rsp)
movl $1, 36(%rsp)
movl $1, 40(%rsp)
movl $1, 44(%rsp)
movl $1, 48(%rsp)
movl $1, 52(%rsp)
leaq 24(%rsp), %rcx
leaq 16(%rsp), %rdx
leaq 44(%rsp), %rsi
leaq 32(%rsp), %rdi
call __cudaPopCallConfiguration@PLT
testl %eax, %eax
je .L15
.L11:
movq 88(%rsp), %rax
subq %fs:40, %rax
jne .L16
addq $104, %rsp
.cfi_remember_state
.cfi_def_cfa_offset 8
ret
.L15:
.cfi_restore_state
pushq 24(%rsp)
.cfi_def_cfa_offset 120
pushq 24(%rsp)
.cfi_def_cfa_offset 128
leaq 96(%rsp), %r9
movq 60(%rsp), %rcx
movl 68(%rsp), %r8d
movq 48(%rsp), %rsi
movl 56(%rsp), %edx
leaq _Z2dlPi(%rip), %rdi
call cudaLaunchKernel@PLT
addq $16, %rsp
.cfi_def_cfa_offset 112
jmp .L11
.L16:
call __stack_chk_fail@PLT
.cfi_endproc
.LFE2083:
.size _Z21__device_stub__Z2dlPiPi, .-_Z21__device_stub__Z2dlPiPi
.globl _Z2dlPi
.type _Z2dlPi, @function
_Z2dlPi:
.LFB2084:
.cfi_startproc
endbr64
subq $8, %rsp
.cfi_def_cfa_offset 16
call _Z21__device_stub__Z2dlPiPi
addq $8, %rsp
.cfi_def_cfa_offset 8
ret
.cfi_endproc
.LFE2084:
.size _Z2dlPi, .-_Z2dlPi
.section .rodata.str1.8,"aMS",@progbits,1
.align 8
.LC1:
.string "/home/ubuntu/Datasets/stackv2/train-structured/soarlab/Gklee/master/gklee_tests/various_tests/deadlock_2/deadlock_2.cu"
.section .rodata.str1.1,"aMS",@progbits,1
.LC2:
.string "%d "
.LC3:
.string "\n"
.text
.globl main
.type main, @function
main:
.LFB2058:
.cfi_startproc
endbr64
pushq %r13
.cfi_def_cfa_offset 16
.cfi_offset 13, -16
pushq %r12
.cfi_def_cfa_offset 24
.cfi_offset 12, -24
pushq %rbp
.cfi_def_cfa_offset 32
.cfi_offset 6, -32
pushq %rbx
.cfi_def_cfa_offset 40
.cfi_offset 3, -40
subq $56, %rsp
.cfi_def_cfa_offset 96
movq %fs:40, %rax
movq %rax, 40(%rsp)
xorl %eax, %eax
movl $256, %edi
call malloc@PLT
movq %rax, %rbp
movl $0, %eax
.L20:
movl %eax, 0(%rbp,%rax,4)
addq $1, %rax
cmpq $64, %rax
jne .L20
leaq 8(%rsp), %rdi
movl $256, %esi
call cudaMalloc@PLT
movl %eax, %edi
movl $1, %ecx
movl $53, %edx
leaq .LC1(%rip), %rbx
movq %rbx, %rsi
call _Z9gpuAssert9cudaErrorPcib
movl $1, %ecx
movl $256, %edx
movq %rbp, %rsi
movq 8(%rsp), %rdi
call cudaMemcpy@PLT
movl %eax, %edi
movl $1, %ecx
movl $54, %edx
movq %rbx, %rsi
call _Z9gpuAssert9cudaErrorPcib
movl $64, 28(%rsp)
movl $1, 32(%rsp)
movl $1, 16(%rsp)
movl $1, 20(%rsp)
movl $0, %r9d
movl $0, %r8d
movq 28(%rsp), %rdx
movl $1, %ecx
movq 16(%rsp), %rdi
movl $1, %esi
call __cudaPushCallConfiguration@PLT
testl %eax, %eax
je .L27
.L21:
call cudaPeekAtLastError@PLT
movl %eax, %edi
movl $1, %ecx
movl $57, %edx
leaq .LC1(%rip), %rbx
movq %rbx, %rsi
call _Z9gpuAssert9cudaErrorPcib
call cudaDeviceSynchronize@PLT
movl %eax, %edi
movl $1, %ecx
movl $58, %edx
movq %rbx, %rsi
call _Z9gpuAssert9cudaErrorPcib
movl $2, %ecx
movl $256, %edx
movq 8(%rsp), %rsi
movq %rbp, %rdi
call cudaMemcpy@PLT
movl %eax, %edi
movl $1, %ecx
movl $59, %edx
movq %rbx, %rsi
call _Z9gpuAssert9cudaErrorPcib
movq %rbp, %rbx
leaq 256(%rbp), %r13
leaq .LC2(%rip), %r12
.L22:
movl (%rbx), %edx
movq %r12, %rsi
movl $2, %edi
movl $0, %eax
call __printf_chk@PLT
addq $4, %rbx
cmpq %r13, %rbx
jne .L22
leaq .LC3(%rip), %rsi
movl $2, %edi
movl $0, %eax
call __printf_chk@PLT
movq %rbp, %rdi
call free@PLT
movq 8(%rsp), %rdi
call cudaFree@PLT
movq 40(%rsp), %rax
subq %fs:40, %rax
jne .L28
movl $0, %eax
addq $56, %rsp
.cfi_remember_state
.cfi_def_cfa_offset 40
popq %rbx
.cfi_def_cfa_offset 32
popq %rbp
.cfi_def_cfa_offset 24
popq %r12
.cfi_def_cfa_offset 16
popq %r13
.cfi_def_cfa_offset 8
ret
.L27:
.cfi_restore_state
movq 8(%rsp), %rdi
call _Z21__device_stub__Z2dlPiPi
jmp .L21
.L28:
call __stack_chk_fail@PLT
.cfi_endproc
.LFE2058:
.size main, .-main
.section .rodata.str1.1
.LC4:
.string "_Z2dlPi"
.text
.type _ZL24__sti____cudaRegisterAllv, @function
_ZL24__sti____cudaRegisterAllv:
.LFB2086:
.cfi_startproc
endbr64
subq $8, %rsp
.cfi_def_cfa_offset 16
leaq _ZL15__fatDeviceText(%rip), %rdi
call __cudaRegisterFatBinary@PLT
movq %rax, %rdi
movq %rax, _ZL20__cudaFatCubinHandle(%rip)
pushq $0
.cfi_def_cfa_offset 24
pushq $0
.cfi_def_cfa_offset 32
pushq $0
.cfi_def_cfa_offset 40
pushq $0
.cfi_def_cfa_offset 48
movl $0, %r9d
movl $-1, %r8d
leaq .LC4(%rip), %rdx
movq %rdx, %rcx
leaq _Z2dlPi(%rip), %rsi
call __cudaRegisterFunction@PLT
addq $32, %rsp
.cfi_def_cfa_offset 16
movq _ZL20__cudaFatCubinHandle(%rip), %rdi
call __cudaRegisterFatBinaryEnd@PLT
leaq _ZL26__cudaUnregisterBinaryUtilv(%rip), %rdi
call atexit@PLT
addq $8, %rsp
.cfi_def_cfa_offset 8
ret
.cfi_endproc
.LFE2086:
.size _ZL24__sti____cudaRegisterAllv, .-_ZL24__sti____cudaRegisterAllv
.section .init_array,"aw"
.align 8
.quad _ZL24__sti____cudaRegisterAllv
.section .nvFatBinSegment,"aw"
.align 8
.type _ZL15__fatDeviceText, @object
.size _ZL15__fatDeviceText, 24
_ZL15__fatDeviceText:
.long 1180844977
.long 1
.quad fatbinData
.quad 0
.local _ZL20__cudaFatCubinHandle
.comm _ZL20__cudaFatCubinHandle,8,8
.ident "GCC: (Ubuntu 13.3.0-6ubuntu2~24.04) 13.3.0"
.section .note.GNU-stack,"",@progbits
.section .note.gnu.property,"a"
.align 8
.long 1f - 0f
.long 4f - 1f
.long 5
0:
.string "GNU"
1:
.align 8
.long 0xc0000002
.long 3f - 2f
2:
.long 0x3
3:
.align 8
4: |
You are a helpful coding assistant specialized in converting CUDA source code to HIP/AMD source code. | #include <cstdio>
#define N 64
#define B 1
#define T 64
#define gpuErrchk(ans) { gpuAssert((ans), __FILE__, __LINE__); }
inline void gpuAssert(cudaError_t code, char *file, int line, bool abort=true)
{
if (code != cudaSuccess)
{
fprintf(stderr,"GPUassert: %s %s %d\n", cudaGetErrorString(code), file, line);
if (abort) exit(code);
}
}
__global__ void dl(int* in)
{
int tid = threadIdx.x + blockIdx.x * blockDim.x;
// The warps in this block take different paths; the synctreads calls
// will cause a deadlock.
if(tid > 31)
{
if(in[tid] % 2 == 0)
in[tid]++;
__syncthreads();
}
else {
if(in[tid] % 2 == 1)
in[tid]--;
__syncthreads();
}
/* int sum = in[tid];
if(tid > 0)
sum += in[tid-1];
if(tid < N - 1)
sum += in[tid+1];
in[tid] = sum / 3; */
}
int main()
{
int* in = (int*) malloc(N*sizeof(int));
for(int i = 0; i < N; i++)
in[i] = i;
int* din;
gpuErrchk(cudaMalloc((void**)&din, N*sizeof(int)));
gpuErrchk(cudaMemcpy(din, in, N*sizeof(int), cudaMemcpyHostToDevice));
dl<<<B,T>>>(din);
gpuErrchk(cudaPeekAtLastError());
gpuErrchk(cudaDeviceSynchronize());
gpuErrchk(cudaMemcpy(in, din, N*sizeof(int), cudaMemcpyDeviceToHost));
for(int i = 0; i < N; i++)
printf("%d ", in[i]);
printf("\n");
free(in); cudaFree(din);
} | #include <hip/hip_runtime.h>
#include <cstdio>
#define N 64
#define B 1
#define T 64
#define gpuErrchk(ans) { gpuAssert((ans), __FILE__, __LINE__); }
inline void gpuAssert(hipError_t code, char *file, int line, bool abort=true)
{
if (code != hipSuccess)
{
fprintf(stderr,"GPUassert: %s %s %d\n", hipGetErrorString(code), file, line);
if (abort) exit(code);
}
}
__global__ void dl(int* in)
{
int tid = threadIdx.x + blockIdx.x * blockDim.x;
// The warps in this block take different paths; the synctreads calls
// will cause a deadlock.
if(tid > 31)
{
if(in[tid] % 2 == 0)
in[tid]++;
__syncthreads();
}
else {
if(in[tid] % 2 == 1)
in[tid]--;
__syncthreads();
}
/* int sum = in[tid];
if(tid > 0)
sum += in[tid-1];
if(tid < N - 1)
sum += in[tid+1];
in[tid] = sum / 3; */
}
int main()
{
int* in = (int*) malloc(N*sizeof(int));
for(int i = 0; i < N; i++)
in[i] = i;
int* din;
gpuErrchk(hipMalloc((void**)&din, N*sizeof(int)));
gpuErrchk(hipMemcpy(din, in, N*sizeof(int), hipMemcpyHostToDevice));
dl<<<B,T>>>(din);
gpuErrchk(hipPeekAtLastError());
gpuErrchk(hipDeviceSynchronize());
gpuErrchk(hipMemcpy(in, din, N*sizeof(int), hipMemcpyDeviceToHost));
for(int i = 0; i < N; i++)
printf("%d ", in[i]);
printf("\n");
free(in); hipFree(din);
} |
You are a helpful coding assistant specialized in converting HIP source code to AMD device assembly. | #include <hip/hip_runtime.h>
#include <cstdio>
#define N 64
#define B 1
#define T 64
#define gpuErrchk(ans) { gpuAssert((ans), __FILE__, __LINE__); }
inline void gpuAssert(hipError_t code, char *file, int line, bool abort=true)
{
if (code != hipSuccess)
{
fprintf(stderr,"GPUassert: %s %s %d\n", hipGetErrorString(code), file, line);
if (abort) exit(code);
}
}
__global__ void dl(int* in)
{
int tid = threadIdx.x + blockIdx.x * blockDim.x;
// The warps in this block take different paths; the synctreads calls
// will cause a deadlock.
if(tid > 31)
{
if(in[tid] % 2 == 0)
in[tid]++;
__syncthreads();
}
else {
if(in[tid] % 2 == 1)
in[tid]--;
__syncthreads();
}
/* int sum = in[tid];
if(tid > 0)
sum += in[tid-1];
if(tid < N - 1)
sum += in[tid+1];
in[tid] = sum / 3; */
}
int main()
{
int* in = (int*) malloc(N*sizeof(int));
for(int i = 0; i < N; i++)
in[i] = i;
int* din;
gpuErrchk(hipMalloc((void**)&din, N*sizeof(int)));
gpuErrchk(hipMemcpy(din, in, N*sizeof(int), hipMemcpyHostToDevice));
dl<<<B,T>>>(din);
gpuErrchk(hipPeekAtLastError());
gpuErrchk(hipDeviceSynchronize());
gpuErrchk(hipMemcpy(in, din, N*sizeof(int), hipMemcpyDeviceToHost));
for(int i = 0; i < N; i++)
printf("%d ", in[i]);
printf("\n");
free(in); hipFree(din);
} | .text
.amdgcn_target "amdgcn-amd-amdhsa--gfx1100"
.protected _Z2dlPi
.globl _Z2dlPi
.p2align 8
.type _Z2dlPi,@function
_Z2dlPi:
s_clause 0x1
s_load_b32 s2, s[0:1], 0x14
s_load_b64 s[0:1], s[0:1], 0x0
s_waitcnt lgkmcnt(0)
s_and_b32 s2, s2, 0xffff
s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
v_mad_u64_u32 v[1:2], null, s15, s2, v[0:1]
s_mov_b32 s2, exec_lo
v_cmpx_gt_i32_e32 32, v1
s_xor_b32 s2, exec_lo, s2
s_cbranch_execz .LBB0_4
v_ashrrev_i32_e32 v2, 31, v1
s_mov_b32 s3, exec_lo
s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
v_lshlrev_b64 v[0:1], 2, v[1:2]
v_add_co_u32 v0, vcc_lo, s0, v0
s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_3) | instid1(VALU_DEP_1)
v_add_co_ci_u32_e32 v1, vcc_lo, s1, v1, vcc_lo
global_load_b32 v2, v[0:1], off
s_waitcnt vmcnt(0)
v_and_b32_e32 v3, 0x80000001, v2
v_cmpx_eq_u32_e32 1, v3
s_cbranch_execz .LBB0_3
v_add_nc_u32_e32 v2, -1, v2
global_store_b32 v[0:1], v2, off
.LBB0_3:
s_or_b32 exec_lo, exec_lo, s3
s_waitcnt_vscnt null, 0x0
s_barrier
.LBB0_4:
s_and_not1_saveexec_b32 s2, s2
s_cbranch_execz .LBB0_8
v_mov_b32_e32 v2, 0
s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
v_lshlrev_b64 v[0:1], 2, v[1:2]
v_add_co_u32 v0, vcc_lo, s0, v0
s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_4) | instid1(VALU_DEP_1)
v_add_co_ci_u32_e32 v1, vcc_lo, s1, v1, vcc_lo
s_mov_b32 s0, exec_lo
global_load_b32 v2, v[0:1], off
s_waitcnt vmcnt(0)
v_and_b32_e32 v3, 1, v2
v_cmpx_eq_u32_e32 0, v3
s_cbranch_execz .LBB0_7
v_or_b32_e32 v2, 1, v2
global_store_b32 v[0:1], v2, off
.LBB0_7:
s_or_b32 exec_lo, exec_lo, s0
s_waitcnt_vscnt null, 0x0
s_barrier
.LBB0_8:
s_or_b32 exec_lo, exec_lo, s2
buffer_gl0_inv
s_endpgm
.section .rodata,"a",@progbits
.p2align 6, 0x0
.amdhsa_kernel _Z2dlPi
.amdhsa_group_segment_fixed_size 0
.amdhsa_private_segment_fixed_size 0
.amdhsa_kernarg_size 264
.amdhsa_user_sgpr_count 15
.amdhsa_user_sgpr_dispatch_ptr 0
.amdhsa_user_sgpr_queue_ptr 0
.amdhsa_user_sgpr_kernarg_segment_ptr 1
.amdhsa_user_sgpr_dispatch_id 0
.amdhsa_user_sgpr_private_segment_size 0
.amdhsa_wavefront_size32 1
.amdhsa_uses_dynamic_stack 0
.amdhsa_enable_private_segment 0
.amdhsa_system_sgpr_workgroup_id_x 1
.amdhsa_system_sgpr_workgroup_id_y 0
.amdhsa_system_sgpr_workgroup_id_z 0
.amdhsa_system_sgpr_workgroup_info 0
.amdhsa_system_vgpr_workitem_id 0
.amdhsa_next_free_vgpr 4
.amdhsa_next_free_sgpr 16
.amdhsa_float_round_mode_32 0
.amdhsa_float_round_mode_16_64 0
.amdhsa_float_denorm_mode_32 3
.amdhsa_float_denorm_mode_16_64 3
.amdhsa_dx10_clamp 1
.amdhsa_ieee_mode 1
.amdhsa_fp16_overflow 0
.amdhsa_workgroup_processor_mode 1
.amdhsa_memory_ordered 1
.amdhsa_forward_progress 0
.amdhsa_shared_vgpr_count 0
.amdhsa_exception_fp_ieee_invalid_op 0
.amdhsa_exception_fp_denorm_src 0
.amdhsa_exception_fp_ieee_div_zero 0
.amdhsa_exception_fp_ieee_overflow 0
.amdhsa_exception_fp_ieee_underflow 0
.amdhsa_exception_fp_ieee_inexact 0
.amdhsa_exception_int_div_zero 0
.end_amdhsa_kernel
.text
.Lfunc_end0:
.size _Z2dlPi, .Lfunc_end0-_Z2dlPi
.section .AMDGPU.csdata,"",@progbits
.text
.p2alignl 7, 3214868480
.fill 96, 4, 3214868480
.type __hip_cuid_,@object
.section .bss,"aw",@nobits
.globl __hip_cuid_
__hip_cuid_:
.byte 0
.size __hip_cuid_, 1
.ident "AMD clang version 18.0.0git (https://github.com/RadeonOpenCompute/llvm-project roc-6.3.2 25012 e5bf7e55c91490b07c49d8960fa7983d864936c4)"
.section ".note.GNU-stack","",@progbits
.addrsig
.addrsig_sym __hip_cuid_
.amdgpu_metadata
---
amdhsa.kernels:
- .args:
- .address_space: global
.offset: 0
.size: 8
.value_kind: global_buffer
- .offset: 8
.size: 4
.value_kind: hidden_block_count_x
- .offset: 12
.size: 4
.value_kind: hidden_block_count_y
- .offset: 16
.size: 4
.value_kind: hidden_block_count_z
- .offset: 20
.size: 2
.value_kind: hidden_group_size_x
- .offset: 22
.size: 2
.value_kind: hidden_group_size_y
- .offset: 24
.size: 2
.value_kind: hidden_group_size_z
- .offset: 26
.size: 2
.value_kind: hidden_remainder_x
- .offset: 28
.size: 2
.value_kind: hidden_remainder_y
- .offset: 30
.size: 2
.value_kind: hidden_remainder_z
- .offset: 48
.size: 8
.value_kind: hidden_global_offset_x
- .offset: 56
.size: 8
.value_kind: hidden_global_offset_y
- .offset: 64
.size: 8
.value_kind: hidden_global_offset_z
- .offset: 72
.size: 2
.value_kind: hidden_grid_dims
.group_segment_fixed_size: 0
.kernarg_segment_align: 8
.kernarg_segment_size: 264
.language: OpenCL C
.language_version:
- 2
- 0
.max_flat_workgroup_size: 1024
.name: _Z2dlPi
.private_segment_fixed_size: 0
.sgpr_count: 18
.sgpr_spill_count: 0
.symbol: _Z2dlPi.kd
.uniform_work_group_size: 1
.uses_dynamic_stack: false
.vgpr_count: 4
.vgpr_spill_count: 0
.wavefront_size: 32
.workgroup_processor_mode: 1
amdhsa.target: amdgcn-amd-amdhsa--gfx1100
amdhsa.version:
- 1
- 2
...
.end_amdgpu_metadata |
You are a helpful coding assistant specialized in converting HIP source code to AMD host assembly. | #include <hip/hip_runtime.h>
#include <cstdio>
#define N 64
#define B 1
#define T 64
#define gpuErrchk(ans) { gpuAssert((ans), __FILE__, __LINE__); }
inline void gpuAssert(hipError_t code, char *file, int line, bool abort=true)
{
if (code != hipSuccess)
{
fprintf(stderr,"GPUassert: %s %s %d\n", hipGetErrorString(code), file, line);
if (abort) exit(code);
}
}
__global__ void dl(int* in)
{
int tid = threadIdx.x + blockIdx.x * blockDim.x;
// The warps in this block take different paths; the synctreads calls
// will cause a deadlock.
if(tid > 31)
{
if(in[tid] % 2 == 0)
in[tid]++;
__syncthreads();
}
else {
if(in[tid] % 2 == 1)
in[tid]--;
__syncthreads();
}
/* int sum = in[tid];
if(tid > 0)
sum += in[tid-1];
if(tid < N - 1)
sum += in[tid+1];
in[tid] = sum / 3; */
}
int main()
{
int* in = (int*) malloc(N*sizeof(int));
for(int i = 0; i < N; i++)
in[i] = i;
int* din;
gpuErrchk(hipMalloc((void**)&din, N*sizeof(int)));
gpuErrchk(hipMemcpy(din, in, N*sizeof(int), hipMemcpyHostToDevice));
dl<<<B,T>>>(din);
gpuErrchk(hipPeekAtLastError());
gpuErrchk(hipDeviceSynchronize());
gpuErrchk(hipMemcpy(in, din, N*sizeof(int), hipMemcpyDeviceToHost));
for(int i = 0; i < N; i++)
printf("%d ", in[i]);
printf("\n");
free(in); hipFree(din);
} | .text
.file "deadlock_2.hip"
.globl _Z17__device_stub__dlPi # -- Begin function _Z17__device_stub__dlPi
.p2align 4, 0x90
.type _Z17__device_stub__dlPi,@function
_Z17__device_stub__dlPi: # @_Z17__device_stub__dlPi
.cfi_startproc
# %bb.0:
subq $72, %rsp
.cfi_def_cfa_offset 80
movq %rdi, 64(%rsp)
leaq 64(%rsp), %rax
movq %rax, (%rsp)
leaq 48(%rsp), %rdi
leaq 32(%rsp), %rsi
leaq 24(%rsp), %rdx
leaq 16(%rsp), %rcx
callq __hipPopCallConfiguration
movq 48(%rsp), %rsi
movl 56(%rsp), %edx
movq 32(%rsp), %rcx
movl 40(%rsp), %r8d
movq %rsp, %r9
movl $_Z2dlPi, %edi
pushq 16(%rsp)
.cfi_adjust_cfa_offset 8
pushq 32(%rsp)
.cfi_adjust_cfa_offset 8
callq hipLaunchKernel
addq $88, %rsp
.cfi_adjust_cfa_offset -88
retq
.Lfunc_end0:
.size _Z17__device_stub__dlPi, .Lfunc_end0-_Z17__device_stub__dlPi
.cfi_endproc
# -- End function
.globl main # -- Begin function main
.p2align 4, 0x90
.type main,@function
main: # @main
.cfi_startproc
# %bb.0:
pushq %rbp
.cfi_def_cfa_offset 16
pushq %r14
.cfi_def_cfa_offset 24
pushq %rbx
.cfi_def_cfa_offset 32
subq $80, %rsp
.cfi_def_cfa_offset 112
.cfi_offset %rbx, -32
.cfi_offset %r14, -24
.cfi_offset %rbp, -16
movl $256, %edi # imm = 0x100
callq malloc
movq %rax, %rbx
xorl %eax, %eax
.p2align 4, 0x90
.LBB1_1: # =>This Inner Loop Header: Depth=1
movl %eax, (%rbx,%rax,4)
incq %rax
cmpq $64, %rax
jne .LBB1_1
# %bb.2:
leaq 8(%rsp), %rdi
movl $256, %esi # imm = 0x100
callq hipMalloc
testl %eax, %eax
jne .LBB1_3
# %bb.5: # %_Z9gpuAssert10hipError_tPcib.exit
movq 8(%rsp), %rdi
movl $256, %edx # imm = 0x100
movq %rbx, %rsi
movl $1, %ecx
callq hipMemcpy
testl %eax, %eax
jne .LBB1_6
# %bb.7: # %_Z9gpuAssert10hipError_tPcib.exit16
movabsq $4294967297, %rdi # imm = 0x100000001
leaq 63(%rdi), %rdx
movl $1, %esi
movl $1, %ecx
xorl %r8d, %r8d
xorl %r9d, %r9d
callq __hipPushCallConfiguration
testl %eax, %eax
jne .LBB1_9
# %bb.8:
movq 8(%rsp), %rax
movq %rax, 72(%rsp)
leaq 72(%rsp), %rax
movq %rax, 16(%rsp)
leaq 56(%rsp), %rdi
leaq 40(%rsp), %rsi
leaq 32(%rsp), %rdx
leaq 24(%rsp), %rcx
callq __hipPopCallConfiguration
movq 56(%rsp), %rsi
movl 64(%rsp), %edx
movq 40(%rsp), %rcx
movl 48(%rsp), %r8d
leaq 16(%rsp), %r9
movl $_Z2dlPi, %edi
pushq 24(%rsp)
.cfi_adjust_cfa_offset 8
pushq 40(%rsp)
.cfi_adjust_cfa_offset 8
callq hipLaunchKernel
addq $16, %rsp
.cfi_adjust_cfa_offset -16
.LBB1_9:
callq hipPeekAtLastError
testl %eax, %eax
jne .LBB1_10
# %bb.11: # %_Z9gpuAssert10hipError_tPcib.exit18
callq hipDeviceSynchronize
testl %eax, %eax
jne .LBB1_12
# %bb.13: # %_Z9gpuAssert10hipError_tPcib.exit20
movq 8(%rsp), %rsi
movl $256, %edx # imm = 0x100
movq %rbx, %rdi
movl $2, %ecx
callq hipMemcpy
testl %eax, %eax
jne .LBB1_17
# %bb.14: # %_Z9gpuAssert10hipError_tPcib.exit22.preheader
xorl %r14d, %r14d
.p2align 4, 0x90
.LBB1_15: # %_Z9gpuAssert10hipError_tPcib.exit22
# =>This Inner Loop Header: Depth=1
movl (%rbx,%r14,4), %esi
movl $.L.str.1, %edi
xorl %eax, %eax
callq printf
incq %r14
cmpq $64, %r14
jne .LBB1_15
# %bb.16:
movl $10, %edi
callq putchar@PLT
movq %rbx, %rdi
callq free
movq 8(%rsp), %rdi
callq hipFree
xorl %eax, %eax
addq $80, %rsp
.cfi_def_cfa_offset 32
popq %rbx
.cfi_def_cfa_offset 24
popq %r14
.cfi_def_cfa_offset 16
popq %rbp
.cfi_def_cfa_offset 8
retq
.LBB1_3:
.cfi_def_cfa_offset 112
movq stderr(%rip), %rbx
movl %eax, %edi
movl %eax, %ebp
callq hipGetErrorString
movl $.L.str.3, %esi
movl $.L.str, %ecx
movq %rbx, %rdi
movq %rax, %rdx
movl $55, %r8d
jmp .LBB1_4
.LBB1_6:
movq stderr(%rip), %rbx
movl %eax, %edi
movl %eax, %ebp
callq hipGetErrorString
movl $.L.str.3, %esi
movl $.L.str, %ecx
movq %rbx, %rdi
movq %rax, %rdx
movl $56, %r8d
jmp .LBB1_4
.LBB1_10:
movq stderr(%rip), %rbx
movl %eax, %edi
movl %eax, %ebp
callq hipGetErrorString
movl $.L.str.3, %esi
movl $.L.str, %ecx
movq %rbx, %rdi
movq %rax, %rdx
movl $59, %r8d
jmp .LBB1_4
.LBB1_12:
movq stderr(%rip), %rbx
movl %eax, %edi
movl %eax, %ebp
callq hipGetErrorString
movl $.L.str.3, %esi
movl $.L.str, %ecx
movq %rbx, %rdi
movq %rax, %rdx
movl $60, %r8d
jmp .LBB1_4
.LBB1_17:
movq stderr(%rip), %rbx
movl %eax, %edi
movl %eax, %ebp
callq hipGetErrorString
movl $.L.str.3, %esi
movl $.L.str, %ecx
movq %rbx, %rdi
movq %rax, %rdx
movl $61, %r8d
.LBB1_4:
xorl %eax, %eax
callq fprintf
movl %ebp, %edi
callq exit
.Lfunc_end1:
.size main, .Lfunc_end1-main
.cfi_endproc
# -- End function
.p2align 4, 0x90 # -- Begin function __hip_module_ctor
.type __hip_module_ctor,@function
__hip_module_ctor: # @__hip_module_ctor
.cfi_startproc
# %bb.0:
subq $40, %rsp
.cfi_def_cfa_offset 48
cmpq $0, __hip_gpubin_handle(%rip)
jne .LBB2_2
# %bb.1:
movl $__hip_fatbin_wrapper, %edi
callq __hipRegisterFatBinary
movq %rax, __hip_gpubin_handle(%rip)
.LBB2_2:
movq __hip_gpubin_handle(%rip), %rdi
xorps %xmm0, %xmm0
movups %xmm0, 16(%rsp)
movups %xmm0, (%rsp)
movl $_Z2dlPi, %esi
movl $.L__unnamed_1, %edx
movl $.L__unnamed_1, %ecx
movl $-1, %r8d
xorl %r9d, %r9d
callq __hipRegisterFunction
movl $__hip_module_dtor, %edi
addq $40, %rsp
.cfi_def_cfa_offset 8
jmp atexit # TAILCALL
.Lfunc_end2:
.size __hip_module_ctor, .Lfunc_end2-__hip_module_ctor
.cfi_endproc
# -- End function
.p2align 4, 0x90 # -- Begin function __hip_module_dtor
.type __hip_module_dtor,@function
__hip_module_dtor: # @__hip_module_dtor
.cfi_startproc
# %bb.0:
movq __hip_gpubin_handle(%rip), %rdi
testq %rdi, %rdi
je .LBB3_2
# %bb.1:
pushq %rax
.cfi_def_cfa_offset 16
callq __hipUnregisterFatBinary
movq $0, __hip_gpubin_handle(%rip)
addq $8, %rsp
.cfi_def_cfa_offset 8
.LBB3_2:
retq
.Lfunc_end3:
.size __hip_module_dtor, .Lfunc_end3-__hip_module_dtor
.cfi_endproc
# -- End function
.type _Z2dlPi,@object # @_Z2dlPi
.section .rodata,"a",@progbits
.globl _Z2dlPi
.p2align 3, 0x0
_Z2dlPi:
.quad _Z17__device_stub__dlPi
.size _Z2dlPi, 8
.type .L.str,@object # @.str
.section .rodata.str1.1,"aMS",@progbits,1
.L.str:
.asciz "/home/ubuntu/Datasets/stackv2/train-structured-repos-hip/soarlab/Gklee/master/gklee_tests/various_tests/deadlock_2/deadlock_2.hip"
.size .L.str, 130
.type .L.str.1,@object # @.str.1
.L.str.1:
.asciz "%d "
.size .L.str.1, 4
.type .L.str.3,@object # @.str.3
.L.str.3:
.asciz "GPUassert: %s %s %d\n"
.size .L.str.3, 21
.type .L__unnamed_1,@object # @0
.L__unnamed_1:
.asciz "_Z2dlPi"
.size .L__unnamed_1, 8
.type __hip_fatbin_wrapper,@object # @__hip_fatbin_wrapper
.section .hipFatBinSegment,"a",@progbits
.p2align 3, 0x0
__hip_fatbin_wrapper:
.long 1212764230 # 0x48495046
.long 1 # 0x1
.quad __hip_fatbin
.quad 0
.size __hip_fatbin_wrapper, 24
.type __hip_gpubin_handle,@object # @__hip_gpubin_handle
.local __hip_gpubin_handle
.comm __hip_gpubin_handle,8,8
.section .init_array,"aw",@init_array
.p2align 3, 0x0
.quad __hip_module_ctor
.type __hip_cuid_,@object # @__hip_cuid_
.bss
.globl __hip_cuid_
__hip_cuid_:
.byte 0 # 0x0
.size __hip_cuid_, 1
.section ".linker-options","e",@llvm_linker_options
.ident "AMD clang version 18.0.0git (https://github.com/RadeonOpenCompute/llvm-project roc-6.3.2 25012 e5bf7e55c91490b07c49d8960fa7983d864936c4)"
.section ".note.GNU-stack","",@progbits
.addrsig
.addrsig_sym _Z17__device_stub__dlPi
.addrsig_sym __hip_module_ctor
.addrsig_sym __hip_module_dtor
.addrsig_sym _Z2dlPi
.addrsig_sym __hip_fatbin
.addrsig_sym __hip_fatbin_wrapper
.addrsig_sym __hip_cuid_ |
You are a helpful coding assistant specialized in converting from CUDA device assembly to AMD device assembly. | code for sm_80
Function : _Z2dlPi
.headerflags @"EF_CUDA_TEXMODE_UNIFIED EF_CUDA_64BIT_ADDRESS EF_CUDA_SM80 EF_CUDA_VIRTUAL_SM(EF_CUDA_SM80)"
/*0000*/ IMAD.MOV.U32 R1, RZ, RZ, c[0x0][0x28] ; /* 0x00000a00ff017624 */
/* 0x000fe400078e00ff */
/*0010*/ S2R R0, SR_CTAID.X ; /* 0x0000000000007919 */
/* 0x000e220000002500 */
/*0020*/ IMAD.MOV.U32 R5, RZ, RZ, 0x4 ; /* 0x00000004ff057424 */
/* 0x000fe200078e00ff */
/*0030*/ ULDC.64 UR4, c[0x0][0x118] ; /* 0x0000460000047ab9 */
/* 0x000fe40000000a00 */
/*0040*/ S2R R3, SR_TID.X ; /* 0x0000000000037919 */
/* 0x000e240000002100 */
/*0050*/ IMAD R0, R0, c[0x0][0x0], R3 ; /* 0x0000000000007a24 */
/* 0x001fc800078e0203 */
/*0060*/ IMAD.WIDE R2, R0, R5, c[0x0][0x160] ; /* 0x0000580000027625 */
/* 0x000fca00078e0205 */
/*0070*/ LDG.E R4, [R2.64] ; /* 0x0000000402047981 */
/* 0x000ea2000c1e1900 */
/*0080*/ ISETP.GT.AND P0, PT, R0, 0x1f, PT ; /* 0x0000001f0000780c */
/* 0x000fe40003f04270 */
/*0090*/ LEA.HI R0, R4, R4, RZ, 0x1 ; /* 0x0000000404007211 */
/* 0x004fc800078f08ff */
/*00a0*/ LOP3.LUT R5, R0, 0xfffffffe, RZ, 0xc0, !PT ; /* 0xfffffffe00057812 */
/* 0x000fca00078ec0ff */
/*00b0*/ IMAD.IADD R5, R4, 0x1, -R5 ; /* 0x0000000104057824 */
/* 0x000fe400078e0a05 */
/*00c0*/ @P0 BRA 0x130 ; /* 0x0000006000000947 */
/* 0x000fea0003800000 */
/*00d0*/ ISETP.NE.AND P0, PT, R5, 0x1, PT ; /* 0x000000010500780c */
/* 0x000fe20003f05270 */
/*00e0*/ WARPSYNC 0xffffffff ; /* 0xffffffff00007948 */
/* 0x000fd80003800000 */
/*00f0*/ @!P0 IADD3 R5, R4, -0x1, RZ ; /* 0xffffffff04058810 */
/* 0x000fca0007ffe0ff */
/*0100*/ @!P0 STG.E [R2.64], R5 ; /* 0x0000000502008986 */
/* 0x000fe8000c101904 */
/*0110*/ BAR.SYNC.DEFER_BLOCKING 0x0 ; /* 0x0000000000007b1d */
/* 0x000fec0000010000 */
/*0120*/ EXIT ; /* 0x000000000000794d */
/* 0x000fea0003800000 */
/*0130*/ ISETP.NE.AND P0, PT, R5, RZ, PT ; /* 0x000000ff0500720c */
/* 0x000fe20003f05270 */
/*0140*/ WARPSYNC 0xffffffff ; /* 0xffffffff00007948 */
/* 0x000fd80003800000 */
/*0150*/ @!P0 IADD3 R5, R4, 0x1, RZ ; /* 0x0000000104058810 */
/* 0x000fca0007ffe0ff */
/*0160*/ @!P0 STG.E [R2.64], R5 ; /* 0x0000000502008986 */
/* 0x000fe8000c101904 */
/*0170*/ BAR.SYNC.DEFER_BLOCKING 0x0 ; /* 0x0000000000007b1d */
/* 0x000fec0000010000 */
/*0180*/ EXIT ; /* 0x000000000000794d */
/* 0x000fea0003800000 */
/*0190*/ BRA 0x190; /* 0xfffffff000007947 */
/* 0x000fc0000383ffff */
/*01a0*/ NOP; /* 0x0000000000007918 */
/* 0x000fc00000000000 */
/*01b0*/ NOP; /* 0x0000000000007918 */
/* 0x000fc00000000000 */
/*01c0*/ NOP; /* 0x0000000000007918 */
/* 0x000fc00000000000 */
/*01d0*/ NOP; /* 0x0000000000007918 */
/* 0x000fc00000000000 */
/*01e0*/ NOP; /* 0x0000000000007918 */
/* 0x000fc00000000000 */
/*01f0*/ NOP; /* 0x0000000000007918 */
/* 0x000fc00000000000 */
/*0200*/ NOP; /* 0x0000000000007918 */
/* 0x000fc00000000000 */
/*0210*/ NOP; /* 0x0000000000007918 */
/* 0x000fc00000000000 */
/*0220*/ NOP; /* 0x0000000000007918 */
/* 0x000fc00000000000 */
/*0230*/ NOP; /* 0x0000000000007918 */
/* 0x000fc00000000000 */
/*0240*/ NOP; /* 0x0000000000007918 */
/* 0x000fc00000000000 */
/*0250*/ NOP; /* 0x0000000000007918 */
/* 0x000fc00000000000 */
/*0260*/ NOP; /* 0x0000000000007918 */
/* 0x000fc00000000000 */
/*0270*/ NOP; /* 0x0000000000007918 */
/* 0x000fc00000000000 */
.......... | .text
.amdgcn_target "amdgcn-amd-amdhsa--gfx1100"
.protected _Z2dlPi
.globl _Z2dlPi
.p2align 8
.type _Z2dlPi,@function
_Z2dlPi:
s_clause 0x1
s_load_b32 s2, s[0:1], 0x14
s_load_b64 s[0:1], s[0:1], 0x0
s_waitcnt lgkmcnt(0)
s_and_b32 s2, s2, 0xffff
s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
v_mad_u64_u32 v[1:2], null, s15, s2, v[0:1]
s_mov_b32 s2, exec_lo
v_cmpx_gt_i32_e32 32, v1
s_xor_b32 s2, exec_lo, s2
s_cbranch_execz .LBB0_4
v_ashrrev_i32_e32 v2, 31, v1
s_mov_b32 s3, exec_lo
s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
v_lshlrev_b64 v[0:1], 2, v[1:2]
v_add_co_u32 v0, vcc_lo, s0, v0
s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_3) | instid1(VALU_DEP_1)
v_add_co_ci_u32_e32 v1, vcc_lo, s1, v1, vcc_lo
global_load_b32 v2, v[0:1], off
s_waitcnt vmcnt(0)
v_and_b32_e32 v3, 0x80000001, v2
v_cmpx_eq_u32_e32 1, v3
s_cbranch_execz .LBB0_3
v_add_nc_u32_e32 v2, -1, v2
global_store_b32 v[0:1], v2, off
.LBB0_3:
s_or_b32 exec_lo, exec_lo, s3
s_waitcnt_vscnt null, 0x0
s_barrier
.LBB0_4:
s_and_not1_saveexec_b32 s2, s2
s_cbranch_execz .LBB0_8
v_mov_b32_e32 v2, 0
s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
v_lshlrev_b64 v[0:1], 2, v[1:2]
v_add_co_u32 v0, vcc_lo, s0, v0
s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_4) | instid1(VALU_DEP_1)
v_add_co_ci_u32_e32 v1, vcc_lo, s1, v1, vcc_lo
s_mov_b32 s0, exec_lo
global_load_b32 v2, v[0:1], off
s_waitcnt vmcnt(0)
v_and_b32_e32 v3, 1, v2
v_cmpx_eq_u32_e32 0, v3
s_cbranch_execz .LBB0_7
v_or_b32_e32 v2, 1, v2
global_store_b32 v[0:1], v2, off
.LBB0_7:
s_or_b32 exec_lo, exec_lo, s0
s_waitcnt_vscnt null, 0x0
s_barrier
.LBB0_8:
s_or_b32 exec_lo, exec_lo, s2
buffer_gl0_inv
s_endpgm
.section .rodata,"a",@progbits
.p2align 6, 0x0
.amdhsa_kernel _Z2dlPi
.amdhsa_group_segment_fixed_size 0
.amdhsa_private_segment_fixed_size 0
.amdhsa_kernarg_size 264
.amdhsa_user_sgpr_count 15
.amdhsa_user_sgpr_dispatch_ptr 0
.amdhsa_user_sgpr_queue_ptr 0
.amdhsa_user_sgpr_kernarg_segment_ptr 1
.amdhsa_user_sgpr_dispatch_id 0
.amdhsa_user_sgpr_private_segment_size 0
.amdhsa_wavefront_size32 1
.amdhsa_uses_dynamic_stack 0
.amdhsa_enable_private_segment 0
.amdhsa_system_sgpr_workgroup_id_x 1
.amdhsa_system_sgpr_workgroup_id_y 0
.amdhsa_system_sgpr_workgroup_id_z 0
.amdhsa_system_sgpr_workgroup_info 0
.amdhsa_system_vgpr_workitem_id 0
.amdhsa_next_free_vgpr 4
.amdhsa_next_free_sgpr 16
.amdhsa_float_round_mode_32 0
.amdhsa_float_round_mode_16_64 0
.amdhsa_float_denorm_mode_32 3
.amdhsa_float_denorm_mode_16_64 3
.amdhsa_dx10_clamp 1
.amdhsa_ieee_mode 1
.amdhsa_fp16_overflow 0
.amdhsa_workgroup_processor_mode 1
.amdhsa_memory_ordered 1
.amdhsa_forward_progress 0
.amdhsa_shared_vgpr_count 0
.amdhsa_exception_fp_ieee_invalid_op 0
.amdhsa_exception_fp_denorm_src 0
.amdhsa_exception_fp_ieee_div_zero 0
.amdhsa_exception_fp_ieee_overflow 0
.amdhsa_exception_fp_ieee_underflow 0
.amdhsa_exception_fp_ieee_inexact 0
.amdhsa_exception_int_div_zero 0
.end_amdhsa_kernel
.text
.Lfunc_end0:
.size _Z2dlPi, .Lfunc_end0-_Z2dlPi
.section .AMDGPU.csdata,"",@progbits
.text
.p2alignl 7, 3214868480
.fill 96, 4, 3214868480
.type __hip_cuid_,@object
.section .bss,"aw",@nobits
.globl __hip_cuid_
__hip_cuid_:
.byte 0
.size __hip_cuid_, 1
.ident "AMD clang version 18.0.0git (https://github.com/RadeonOpenCompute/llvm-project roc-6.3.2 25012 e5bf7e55c91490b07c49d8960fa7983d864936c4)"
.section ".note.GNU-stack","",@progbits
.addrsig
.addrsig_sym __hip_cuid_
.amdgpu_metadata
---
amdhsa.kernels:
- .args:
- .address_space: global
.offset: 0
.size: 8
.value_kind: global_buffer
- .offset: 8
.size: 4
.value_kind: hidden_block_count_x
- .offset: 12
.size: 4
.value_kind: hidden_block_count_y
- .offset: 16
.size: 4
.value_kind: hidden_block_count_z
- .offset: 20
.size: 2
.value_kind: hidden_group_size_x
- .offset: 22
.size: 2
.value_kind: hidden_group_size_y
- .offset: 24
.size: 2
.value_kind: hidden_group_size_z
- .offset: 26
.size: 2
.value_kind: hidden_remainder_x
- .offset: 28
.size: 2
.value_kind: hidden_remainder_y
- .offset: 30
.size: 2
.value_kind: hidden_remainder_z
- .offset: 48
.size: 8
.value_kind: hidden_global_offset_x
- .offset: 56
.size: 8
.value_kind: hidden_global_offset_y
- .offset: 64
.size: 8
.value_kind: hidden_global_offset_z
- .offset: 72
.size: 2
.value_kind: hidden_grid_dims
.group_segment_fixed_size: 0
.kernarg_segment_align: 8
.kernarg_segment_size: 264
.language: OpenCL C
.language_version:
- 2
- 0
.max_flat_workgroup_size: 1024
.name: _Z2dlPi
.private_segment_fixed_size: 0
.sgpr_count: 18
.sgpr_spill_count: 0
.symbol: _Z2dlPi.kd
.uniform_work_group_size: 1
.uses_dynamic_stack: false
.vgpr_count: 4
.vgpr_spill_count: 0
.wavefront_size: 32
.workgroup_processor_mode: 1
amdhsa.target: amdgcn-amd-amdhsa--gfx1100
amdhsa.version:
- 1
- 2
...
.end_amdgpu_metadata |
You are a helpful coding assistant specialized in converting from CUDA host assembly to AMD host assembly. | .file "tmpxft_0010cd84_00000000-6_deadlock_2.cudafe1.cpp"
.text
#APP
#NO_APP
.type _ZL26__cudaUnregisterBinaryUtilv, @function
_ZL26__cudaUnregisterBinaryUtilv:
.LFB2061:
.cfi_startproc
endbr64
subq $8, %rsp
.cfi_def_cfa_offset 16
movq _ZL20__cudaFatCubinHandle(%rip), %rdi
call __cudaUnregisterFatBinary@PLT
addq $8, %rsp
.cfi_def_cfa_offset 8
ret
.cfi_endproc
.LFE2061:
.size _ZL26__cudaUnregisterBinaryUtilv, .-_ZL26__cudaUnregisterBinaryUtilv
.section .rodata._Z9gpuAssert9cudaErrorPcib.str1.1,"aMS",@progbits,1
.LC0:
.string "GPUassert: %s %s %d\n"
.section .text._Z9gpuAssert9cudaErrorPcib,"axG",@progbits,_Z9gpuAssert9cudaErrorPcib,comdat
.weak _Z9gpuAssert9cudaErrorPcib
.type _Z9gpuAssert9cudaErrorPcib, @function
_Z9gpuAssert9cudaErrorPcib:
.LFB2057:
.cfi_startproc
endbr64
testl %edi, %edi
jne .L9
ret
.L9:
pushq %r13
.cfi_def_cfa_offset 16
.cfi_offset 13, -16
pushq %r12
.cfi_def_cfa_offset 24
.cfi_offset 12, -24
pushq %rbp
.cfi_def_cfa_offset 32
.cfi_offset 6, -32
pushq %rbx
.cfi_def_cfa_offset 40
.cfi_offset 3, -40
subq $8, %rsp
.cfi_def_cfa_offset 48
movl %edi, %ebx
movq %rsi, %r13
movl %edx, %r12d
movl %ecx, %ebp
call cudaGetErrorString@PLT
movq %rax, %rcx
movl %r12d, %r9d
movq %r13, %r8
leaq .LC0(%rip), %rdx
movl $2, %esi
movq stderr(%rip), %rdi
movl $0, %eax
call __fprintf_chk@PLT
testb %bpl, %bpl
jne .L10
addq $8, %rsp
.cfi_remember_state
.cfi_def_cfa_offset 40
popq %rbx
.cfi_def_cfa_offset 32
popq %rbp
.cfi_def_cfa_offset 24
popq %r12
.cfi_def_cfa_offset 16
popq %r13
.cfi_def_cfa_offset 8
ret
.L10:
.cfi_restore_state
movl %ebx, %edi
call exit@PLT
.cfi_endproc
.LFE2057:
.size _Z9gpuAssert9cudaErrorPcib, .-_Z9gpuAssert9cudaErrorPcib
.text
.globl _Z21__device_stub__Z2dlPiPi
.type _Z21__device_stub__Z2dlPiPi, @function
_Z21__device_stub__Z2dlPiPi:
.LFB2083:
.cfi_startproc
endbr64
subq $104, %rsp
.cfi_def_cfa_offset 112
movq %rdi, 8(%rsp)
movq %fs:40, %rax
movq %rax, 88(%rsp)
xorl %eax, %eax
leaq 8(%rsp), %rax
movq %rax, 80(%rsp)
movl $1, 32(%rsp)
movl $1, 36(%rsp)
movl $1, 40(%rsp)
movl $1, 44(%rsp)
movl $1, 48(%rsp)
movl $1, 52(%rsp)
leaq 24(%rsp), %rcx
leaq 16(%rsp), %rdx
leaq 44(%rsp), %rsi
leaq 32(%rsp), %rdi
call __cudaPopCallConfiguration@PLT
testl %eax, %eax
je .L15
.L11:
movq 88(%rsp), %rax
subq %fs:40, %rax
jne .L16
addq $104, %rsp
.cfi_remember_state
.cfi_def_cfa_offset 8
ret
.L15:
.cfi_restore_state
pushq 24(%rsp)
.cfi_def_cfa_offset 120
pushq 24(%rsp)
.cfi_def_cfa_offset 128
leaq 96(%rsp), %r9
movq 60(%rsp), %rcx
movl 68(%rsp), %r8d
movq 48(%rsp), %rsi
movl 56(%rsp), %edx
leaq _Z2dlPi(%rip), %rdi
call cudaLaunchKernel@PLT
addq $16, %rsp
.cfi_def_cfa_offset 112
jmp .L11
.L16:
call __stack_chk_fail@PLT
.cfi_endproc
.LFE2083:
.size _Z21__device_stub__Z2dlPiPi, .-_Z21__device_stub__Z2dlPiPi
.globl _Z2dlPi
.type _Z2dlPi, @function
_Z2dlPi:
.LFB2084:
.cfi_startproc
endbr64
subq $8, %rsp
.cfi_def_cfa_offset 16
call _Z21__device_stub__Z2dlPiPi
addq $8, %rsp
.cfi_def_cfa_offset 8
ret
.cfi_endproc
.LFE2084:
.size _Z2dlPi, .-_Z2dlPi
.section .rodata.str1.8,"aMS",@progbits,1
.align 8
.LC1:
.string "/home/ubuntu/Datasets/stackv2/train-structured/soarlab/Gklee/master/gklee_tests/various_tests/deadlock_2/deadlock_2.cu"
.section .rodata.str1.1,"aMS",@progbits,1
.LC2:
.string "%d "
.LC3:
.string "\n"
.text
.globl main
.type main, @function
main:
.LFB2058:
.cfi_startproc
endbr64
pushq %r13
.cfi_def_cfa_offset 16
.cfi_offset 13, -16
pushq %r12
.cfi_def_cfa_offset 24
.cfi_offset 12, -24
pushq %rbp
.cfi_def_cfa_offset 32
.cfi_offset 6, -32
pushq %rbx
.cfi_def_cfa_offset 40
.cfi_offset 3, -40
subq $56, %rsp
.cfi_def_cfa_offset 96
movq %fs:40, %rax
movq %rax, 40(%rsp)
xorl %eax, %eax
movl $256, %edi
call malloc@PLT
movq %rax, %rbp
movl $0, %eax
.L20:
movl %eax, 0(%rbp,%rax,4)
addq $1, %rax
cmpq $64, %rax
jne .L20
leaq 8(%rsp), %rdi
movl $256, %esi
call cudaMalloc@PLT
movl %eax, %edi
movl $1, %ecx
movl $53, %edx
leaq .LC1(%rip), %rbx
movq %rbx, %rsi
call _Z9gpuAssert9cudaErrorPcib
movl $1, %ecx
movl $256, %edx
movq %rbp, %rsi
movq 8(%rsp), %rdi
call cudaMemcpy@PLT
movl %eax, %edi
movl $1, %ecx
movl $54, %edx
movq %rbx, %rsi
call _Z9gpuAssert9cudaErrorPcib
movl $64, 28(%rsp)
movl $1, 32(%rsp)
movl $1, 16(%rsp)
movl $1, 20(%rsp)
movl $0, %r9d
movl $0, %r8d
movq 28(%rsp), %rdx
movl $1, %ecx
movq 16(%rsp), %rdi
movl $1, %esi
call __cudaPushCallConfiguration@PLT
testl %eax, %eax
je .L27
.L21:
call cudaPeekAtLastError@PLT
movl %eax, %edi
movl $1, %ecx
movl $57, %edx
leaq .LC1(%rip), %rbx
movq %rbx, %rsi
call _Z9gpuAssert9cudaErrorPcib
call cudaDeviceSynchronize@PLT
movl %eax, %edi
movl $1, %ecx
movl $58, %edx
movq %rbx, %rsi
call _Z9gpuAssert9cudaErrorPcib
movl $2, %ecx
movl $256, %edx
movq 8(%rsp), %rsi
movq %rbp, %rdi
call cudaMemcpy@PLT
movl %eax, %edi
movl $1, %ecx
movl $59, %edx
movq %rbx, %rsi
call _Z9gpuAssert9cudaErrorPcib
movq %rbp, %rbx
leaq 256(%rbp), %r13
leaq .LC2(%rip), %r12
.L22:
movl (%rbx), %edx
movq %r12, %rsi
movl $2, %edi
movl $0, %eax
call __printf_chk@PLT
addq $4, %rbx
cmpq %r13, %rbx
jne .L22
leaq .LC3(%rip), %rsi
movl $2, %edi
movl $0, %eax
call __printf_chk@PLT
movq %rbp, %rdi
call free@PLT
movq 8(%rsp), %rdi
call cudaFree@PLT
movq 40(%rsp), %rax
subq %fs:40, %rax
jne .L28
movl $0, %eax
addq $56, %rsp
.cfi_remember_state
.cfi_def_cfa_offset 40
popq %rbx
.cfi_def_cfa_offset 32
popq %rbp
.cfi_def_cfa_offset 24
popq %r12
.cfi_def_cfa_offset 16
popq %r13
.cfi_def_cfa_offset 8
ret
.L27:
.cfi_restore_state
movq 8(%rsp), %rdi
call _Z21__device_stub__Z2dlPiPi
jmp .L21
.L28:
call __stack_chk_fail@PLT
.cfi_endproc
.LFE2058:
.size main, .-main
.section .rodata.str1.1
.LC4:
.string "_Z2dlPi"
.text
.type _ZL24__sti____cudaRegisterAllv, @function
_ZL24__sti____cudaRegisterAllv:
.LFB2086:
.cfi_startproc
endbr64
subq $8, %rsp
.cfi_def_cfa_offset 16
leaq _ZL15__fatDeviceText(%rip), %rdi
call __cudaRegisterFatBinary@PLT
movq %rax, %rdi
movq %rax, _ZL20__cudaFatCubinHandle(%rip)
pushq $0
.cfi_def_cfa_offset 24
pushq $0
.cfi_def_cfa_offset 32
pushq $0
.cfi_def_cfa_offset 40
pushq $0
.cfi_def_cfa_offset 48
movl $0, %r9d
movl $-1, %r8d
leaq .LC4(%rip), %rdx
movq %rdx, %rcx
leaq _Z2dlPi(%rip), %rsi
call __cudaRegisterFunction@PLT
addq $32, %rsp
.cfi_def_cfa_offset 16
movq _ZL20__cudaFatCubinHandle(%rip), %rdi
call __cudaRegisterFatBinaryEnd@PLT
leaq _ZL26__cudaUnregisterBinaryUtilv(%rip), %rdi
call atexit@PLT
addq $8, %rsp
.cfi_def_cfa_offset 8
ret
.cfi_endproc
.LFE2086:
.size _ZL24__sti____cudaRegisterAllv, .-_ZL24__sti____cudaRegisterAllv
.section .init_array,"aw"
.align 8
.quad _ZL24__sti____cudaRegisterAllv
.section .nvFatBinSegment,"aw"
.align 8
.type _ZL15__fatDeviceText, @object
.size _ZL15__fatDeviceText, 24
_ZL15__fatDeviceText:
.long 1180844977
.long 1
.quad fatbinData
.quad 0
.local _ZL20__cudaFatCubinHandle
.comm _ZL20__cudaFatCubinHandle,8,8
.ident "GCC: (Ubuntu 13.3.0-6ubuntu2~24.04) 13.3.0"
.section .note.GNU-stack,"",@progbits
.section .note.gnu.property,"a"
.align 8
.long 1f - 0f
.long 4f - 1f
.long 5
0:
.string "GNU"
1:
.align 8
.long 0xc0000002
.long 3f - 2f
2:
.long 0x3
3:
.align 8
4: | .text
.file "deadlock_2.hip"
.globl _Z17__device_stub__dlPi # -- Begin function _Z17__device_stub__dlPi
.p2align 4, 0x90
.type _Z17__device_stub__dlPi,@function
_Z17__device_stub__dlPi: # @_Z17__device_stub__dlPi
.cfi_startproc
# %bb.0:
subq $72, %rsp
.cfi_def_cfa_offset 80
movq %rdi, 64(%rsp)
leaq 64(%rsp), %rax
movq %rax, (%rsp)
leaq 48(%rsp), %rdi
leaq 32(%rsp), %rsi
leaq 24(%rsp), %rdx
leaq 16(%rsp), %rcx
callq __hipPopCallConfiguration
movq 48(%rsp), %rsi
movl 56(%rsp), %edx
movq 32(%rsp), %rcx
movl 40(%rsp), %r8d
movq %rsp, %r9
movl $_Z2dlPi, %edi
pushq 16(%rsp)
.cfi_adjust_cfa_offset 8
pushq 32(%rsp)
.cfi_adjust_cfa_offset 8
callq hipLaunchKernel
addq $88, %rsp
.cfi_adjust_cfa_offset -88
retq
.Lfunc_end0:
.size _Z17__device_stub__dlPi, .Lfunc_end0-_Z17__device_stub__dlPi
.cfi_endproc
# -- End function
.globl main # -- Begin function main
.p2align 4, 0x90
.type main,@function
main: # @main
.cfi_startproc
# %bb.0:
pushq %rbp
.cfi_def_cfa_offset 16
pushq %r14
.cfi_def_cfa_offset 24
pushq %rbx
.cfi_def_cfa_offset 32
subq $80, %rsp
.cfi_def_cfa_offset 112
.cfi_offset %rbx, -32
.cfi_offset %r14, -24
.cfi_offset %rbp, -16
movl $256, %edi # imm = 0x100
callq malloc
movq %rax, %rbx
xorl %eax, %eax
.p2align 4, 0x90
.LBB1_1: # =>This Inner Loop Header: Depth=1
movl %eax, (%rbx,%rax,4)
incq %rax
cmpq $64, %rax
jne .LBB1_1
# %bb.2:
leaq 8(%rsp), %rdi
movl $256, %esi # imm = 0x100
callq hipMalloc
testl %eax, %eax
jne .LBB1_3
# %bb.5: # %_Z9gpuAssert10hipError_tPcib.exit
movq 8(%rsp), %rdi
movl $256, %edx # imm = 0x100
movq %rbx, %rsi
movl $1, %ecx
callq hipMemcpy
testl %eax, %eax
jne .LBB1_6
# %bb.7: # %_Z9gpuAssert10hipError_tPcib.exit16
movabsq $4294967297, %rdi # imm = 0x100000001
leaq 63(%rdi), %rdx
movl $1, %esi
movl $1, %ecx
xorl %r8d, %r8d
xorl %r9d, %r9d
callq __hipPushCallConfiguration
testl %eax, %eax
jne .LBB1_9
# %bb.8:
movq 8(%rsp), %rax
movq %rax, 72(%rsp)
leaq 72(%rsp), %rax
movq %rax, 16(%rsp)
leaq 56(%rsp), %rdi
leaq 40(%rsp), %rsi
leaq 32(%rsp), %rdx
leaq 24(%rsp), %rcx
callq __hipPopCallConfiguration
movq 56(%rsp), %rsi
movl 64(%rsp), %edx
movq 40(%rsp), %rcx
movl 48(%rsp), %r8d
leaq 16(%rsp), %r9
movl $_Z2dlPi, %edi
pushq 24(%rsp)
.cfi_adjust_cfa_offset 8
pushq 40(%rsp)
.cfi_adjust_cfa_offset 8
callq hipLaunchKernel
addq $16, %rsp
.cfi_adjust_cfa_offset -16
.LBB1_9:
callq hipPeekAtLastError
testl %eax, %eax
jne .LBB1_10
# %bb.11: # %_Z9gpuAssert10hipError_tPcib.exit18
callq hipDeviceSynchronize
testl %eax, %eax
jne .LBB1_12
# %bb.13: # %_Z9gpuAssert10hipError_tPcib.exit20
movq 8(%rsp), %rsi
movl $256, %edx # imm = 0x100
movq %rbx, %rdi
movl $2, %ecx
callq hipMemcpy
testl %eax, %eax
jne .LBB1_17
# %bb.14: # %_Z9gpuAssert10hipError_tPcib.exit22.preheader
xorl %r14d, %r14d
.p2align 4, 0x90
.LBB1_15: # %_Z9gpuAssert10hipError_tPcib.exit22
# =>This Inner Loop Header: Depth=1
movl (%rbx,%r14,4), %esi
movl $.L.str.1, %edi
xorl %eax, %eax
callq printf
incq %r14
cmpq $64, %r14
jne .LBB1_15
# %bb.16:
movl $10, %edi
callq putchar@PLT
movq %rbx, %rdi
callq free
movq 8(%rsp), %rdi
callq hipFree
xorl %eax, %eax
addq $80, %rsp
.cfi_def_cfa_offset 32
popq %rbx
.cfi_def_cfa_offset 24
popq %r14
.cfi_def_cfa_offset 16
popq %rbp
.cfi_def_cfa_offset 8
retq
.LBB1_3:
.cfi_def_cfa_offset 112
movq stderr(%rip), %rbx
movl %eax, %edi
movl %eax, %ebp
callq hipGetErrorString
movl $.L.str.3, %esi
movl $.L.str, %ecx
movq %rbx, %rdi
movq %rax, %rdx
movl $55, %r8d
jmp .LBB1_4
.LBB1_6:
movq stderr(%rip), %rbx
movl %eax, %edi
movl %eax, %ebp
callq hipGetErrorString
movl $.L.str.3, %esi
movl $.L.str, %ecx
movq %rbx, %rdi
movq %rax, %rdx
movl $56, %r8d
jmp .LBB1_4
.LBB1_10:
movq stderr(%rip), %rbx
movl %eax, %edi
movl %eax, %ebp
callq hipGetErrorString
movl $.L.str.3, %esi
movl $.L.str, %ecx
movq %rbx, %rdi
movq %rax, %rdx
movl $59, %r8d
jmp .LBB1_4
.LBB1_12:
movq stderr(%rip), %rbx
movl %eax, %edi
movl %eax, %ebp
callq hipGetErrorString
movl $.L.str.3, %esi
movl $.L.str, %ecx
movq %rbx, %rdi
movq %rax, %rdx
movl $60, %r8d
jmp .LBB1_4
.LBB1_17:
movq stderr(%rip), %rbx
movl %eax, %edi
movl %eax, %ebp
callq hipGetErrorString
movl $.L.str.3, %esi
movl $.L.str, %ecx
movq %rbx, %rdi
movq %rax, %rdx
movl $61, %r8d
.LBB1_4:
xorl %eax, %eax
callq fprintf
movl %ebp, %edi
callq exit
.Lfunc_end1:
.size main, .Lfunc_end1-main
.cfi_endproc
# -- End function
.p2align 4, 0x90 # -- Begin function __hip_module_ctor
.type __hip_module_ctor,@function
__hip_module_ctor: # @__hip_module_ctor
.cfi_startproc
# %bb.0:
subq $40, %rsp
.cfi_def_cfa_offset 48
cmpq $0, __hip_gpubin_handle(%rip)
jne .LBB2_2
# %bb.1:
movl $__hip_fatbin_wrapper, %edi
callq __hipRegisterFatBinary
movq %rax, __hip_gpubin_handle(%rip)
.LBB2_2:
movq __hip_gpubin_handle(%rip), %rdi
xorps %xmm0, %xmm0
movups %xmm0, 16(%rsp)
movups %xmm0, (%rsp)
movl $_Z2dlPi, %esi
movl $.L__unnamed_1, %edx
movl $.L__unnamed_1, %ecx
movl $-1, %r8d
xorl %r9d, %r9d
callq __hipRegisterFunction
movl $__hip_module_dtor, %edi
addq $40, %rsp
.cfi_def_cfa_offset 8
jmp atexit # TAILCALL
.Lfunc_end2:
.size __hip_module_ctor, .Lfunc_end2-__hip_module_ctor
.cfi_endproc
# -- End function
.p2align 4, 0x90 # -- Begin function __hip_module_dtor
.type __hip_module_dtor,@function
__hip_module_dtor: # @__hip_module_dtor
.cfi_startproc
# %bb.0:
movq __hip_gpubin_handle(%rip), %rdi
testq %rdi, %rdi
je .LBB3_2
# %bb.1:
pushq %rax
.cfi_def_cfa_offset 16
callq __hipUnregisterFatBinary
movq $0, __hip_gpubin_handle(%rip)
addq $8, %rsp
.cfi_def_cfa_offset 8
.LBB3_2:
retq
.Lfunc_end3:
.size __hip_module_dtor, .Lfunc_end3-__hip_module_dtor
.cfi_endproc
# -- End function
.type _Z2dlPi,@object # @_Z2dlPi
.section .rodata,"a",@progbits
.globl _Z2dlPi
.p2align 3, 0x0
_Z2dlPi:
.quad _Z17__device_stub__dlPi
.size _Z2dlPi, 8
.type .L.str,@object # @.str
.section .rodata.str1.1,"aMS",@progbits,1
.L.str:
.asciz "/home/ubuntu/Datasets/stackv2/train-structured-repos-hip/soarlab/Gklee/master/gklee_tests/various_tests/deadlock_2/deadlock_2.hip"
.size .L.str, 130
.type .L.str.1,@object # @.str.1
.L.str.1:
.asciz "%d "
.size .L.str.1, 4
.type .L.str.3,@object # @.str.3
.L.str.3:
.asciz "GPUassert: %s %s %d\n"
.size .L.str.3, 21
.type .L__unnamed_1,@object # @0
.L__unnamed_1:
.asciz "_Z2dlPi"
.size .L__unnamed_1, 8
.type __hip_fatbin_wrapper,@object # @__hip_fatbin_wrapper
.section .hipFatBinSegment,"a",@progbits
.p2align 3, 0x0
__hip_fatbin_wrapper:
.long 1212764230 # 0x48495046
.long 1 # 0x1
.quad __hip_fatbin
.quad 0
.size __hip_fatbin_wrapper, 24
.type __hip_gpubin_handle,@object # @__hip_gpubin_handle
.local __hip_gpubin_handle
.comm __hip_gpubin_handle,8,8
.section .init_array,"aw",@init_array
.p2align 3, 0x0
.quad __hip_module_ctor
.type __hip_cuid_,@object # @__hip_cuid_
.bss
.globl __hip_cuid_
__hip_cuid_:
.byte 0 # 0x0
.size __hip_cuid_, 1
.section ".linker-options","e",@llvm_linker_options
.ident "AMD clang version 18.0.0git (https://github.com/RadeonOpenCompute/llvm-project roc-6.3.2 25012 e5bf7e55c91490b07c49d8960fa7983d864936c4)"
.section ".note.GNU-stack","",@progbits
.addrsig
.addrsig_sym _Z17__device_stub__dlPi
.addrsig_sym __hip_module_ctor
.addrsig_sym __hip_module_dtor
.addrsig_sym _Z2dlPi
.addrsig_sym __hip_fatbin
.addrsig_sym __hip_fatbin_wrapper
.addrsig_sym __hip_cuid_ |
You are a helpful coding assistant specialized in converting CUDA source code to CUDA device assembly. | #include "includes.h"
__global__ void addOneColumnPerThread(double* a, double* b, double* c, int n)
{
// Get the column for current thread
int column = (blockIdx.x * blockDim.x + threadIdx.x);
// Make sure we do not go out of bounds
if (column < n)
{
for (int i = 0; i < n; i++)
{
c[i * n + column] = a[i * n + column] + b[i * n + column];
}
}
} | code for sm_80
Function : _Z21addOneColumnPerThreadPdS_S_i
.headerflags @"EF_CUDA_TEXMODE_UNIFIED EF_CUDA_64BIT_ADDRESS EF_CUDA_SM80 EF_CUDA_VIRTUAL_SM(EF_CUDA_SM80)"
/*0000*/ MOV R1, c[0x0][0x28] ; /* 0x00000a0000017a02 */
/* 0x000fe40000000f00 */
/*0010*/ S2R R0, SR_CTAID.X ; /* 0x0000000000007919 */
/* 0x000e220000002500 */
/*0020*/ MOV R2, c[0x0][0x178] ; /* 0x00005e0000027a02 */
/* 0x000fc60000000f00 */
/*0030*/ S2R R3, SR_TID.X ; /* 0x0000000000037919 */
/* 0x000e220000002100 */
/*0040*/ ISETP.GE.AND P0, PT, R2, 0x1, PT ; /* 0x000000010200780c */
/* 0x000fe20003f06270 */
/*0050*/ IMAD R0, R0, c[0x0][0x0], R3 ; /* 0x0000000000007a24 */
/* 0x001fca00078e0203 */
/*0060*/ ISETP.GE.OR P0, PT, R0, c[0x0][0x178], !P0 ; /* 0x00005e0000007a0c */
/* 0x000fda0004706670 */
/*0070*/ @P0 EXIT ; /* 0x000000000000094d */
/* 0x000fea0003800000 */
/*0080*/ IADD3 R3, R2.reuse, -0x1, RZ ; /* 0xffffffff02037810 */
/* 0x040fe20007ffe0ff */
/*0090*/ ULDC.64 UR4, c[0x0][0x118] ; /* 0x0000460000047ab9 */
/* 0x000fe20000000a00 */
/*00a0*/ HFMA2.MMA R7, -RZ, RZ, 0, 0 ; /* 0x00000000ff077435 */
/* 0x000fe200000001ff */
/*00b0*/ LOP3.LUT R2, R2, 0x3, RZ, 0xc0, !PT ; /* 0x0000000302027812 */
/* 0x000fe400078ec0ff */
/*00c0*/ ISETP.GE.U32.AND P0, PT, R3, 0x3, PT ; /* 0x000000030300780c */
/* 0x000fda0003f06070 */
/*00d0*/ @!P0 BRA 0xed0 ; /* 0x00000df000008947 */
/* 0x000fea0003800000 */
/*00e0*/ IADD3 R3, -R2, c[0x0][0x178], RZ ; /* 0x00005e0002037a10 */
/* 0x000fe40007ffe1ff */
/*00f0*/ MOV R5, 0x8 ; /* 0x0000000800057802 */
/* 0x000fe40000000f00 */
/*0100*/ ISETP.GT.AND P0, PT, R3, RZ, PT ; /* 0x000000ff0300720c */
/* 0x000fe40003f04270 */
/*0110*/ MOV R7, RZ ; /* 0x000000ff00077202 */
/* 0x000fe20000000f00 */
/*0120*/ IMAD.WIDE R12, R0, R5, c[0x0][0x160] ; /* 0x00005800000c7625 */
/* 0x000fc800078e0205 */
/*0130*/ IMAD.WIDE R10, R0, R5, c[0x0][0x168] ; /* 0x00005a00000a7625 */
/* 0x000fc800078e0205 */
/*0140*/ IMAD.WIDE R8, R0, R5, c[0x0][0x170] ; /* 0x00005c0000087625 */
/* 0x000fe400078e0205 */
/*0150*/ @!P0 BRA 0xcd0 ; /* 0x00000b7000008947 */
/* 0x000fea0003800000 */
/*0160*/ ISETP.GT.AND P1, PT, R3, 0xc, PT ; /* 0x0000000c0300780c */
/* 0x000fe40003f24270 */
/*0170*/ PLOP3.LUT P0, PT, PT, PT, PT, 0x80, 0x0 ; /* 0x000000000000781c */
/* 0x000fd60003f0f070 */
/*0180*/ @!P1 BRA 0x8e0 ; /* 0x0000075000009947 */
/* 0x000fea0003800000 */
/*0190*/ PLOP3.LUT P0, PT, PT, PT, PT, 0x8, 0x0 ; /* 0x000000000000781c */
/* 0x000fe40003f0e170 */
/*01a0*/ LDG.E.64 R14, [R10.64] ; /* 0x000000040a0e7981 */
/* 0x000ea8000c1e1b00 */
/*01b0*/ LDG.E.64 R16, [R12.64] ; /* 0x000000040c107981 */
/* 0x001ea2000c1e1b00 */
/*01c0*/ IMAD.WIDE R20, R5, c[0x0][0x178], R10 ; /* 0x00005e0005147a25 */
/* 0x000fc800078e020a */
/*01d0*/ IMAD.WIDE R18, R5, c[0x0][0x178], R12 ; /* 0x00005e0005127a25 */
/* 0x000fe200078e020c */
/*01e0*/ DADD R16, R14, R16 ; /* 0x000000000e107229 */
/* 0x004e0e0000000010 */
/*01f0*/ STG.E.64 [R8.64], R16 ; /* 0x0000001008007986 */
/* 0x0011e8000c101b04 */
/*0200*/ LDG.E.64 R14, [R20.64] ; /* 0x00000004140e7981 */
/* 0x000ea8000c1e1b00 */
/*0210*/ LDG.E.64 R22, [R18.64] ; /* 0x0000000412167981 */
/* 0x000ea2000c1e1b00 */
/*0220*/ IMAD.WIDE R24, R5, c[0x0][0x178], R8 ; /* 0x00005e0005187a25 */
/* 0x000fc800078e0208 */
/*0230*/ IMAD.WIDE R10, R5, c[0x0][0x178], R18 ; /* 0x00005e00050a7a25 */
/* 0x000fe200078e0212 */
/*0240*/ DADD R22, R14, R22 ; /* 0x000000000e167229 */
/* 0x0042860000000016 */
/*0250*/ IMAD.WIDE R14, R5, c[0x0][0x178], R20 ; /* 0x00005e00050e7a25 */
/* 0x002fc800078e0214 */
/*0260*/ STG.E.64 [R24.64], R22 ; /* 0x0000001618007986 */
/* 0x0043e8000c101b04 */
/*0270*/ LDG.E.64 R12, [R14.64] ; /* 0x000000040e0c7981 */
/* 0x000ea8000c1e1b00 */
/*0280*/ LDG.E.64 R26, [R10.64] ; /* 0x000000040a1a7981 */
/* 0x000ea2000c1e1b00 */
/*0290*/ IMAD.WIDE R16, R5, c[0x0][0x178], R24 ; /* 0x00005e0005107a25 */
/* 0x001fc800078e0218 */
/*02a0*/ IMAD.WIDE R8, R5, c[0x0][0x178], R10 ; /* 0x00005e0005087a25 */
/* 0x000fc800078e020a */
/*02b0*/ IMAD.WIDE R18, R5, c[0x0][0x178], R14 ; /* 0x00005e0005127a25 */
/* 0x000fe200078e020e */
/*02c0*/ DADD R12, R12, R26 ; /* 0x000000000c0c7229 */
/* 0x004e0e000000001a */
/*02d0*/ STG.E.64 [R16.64], R12 ; /* 0x0000000c10007986 */
/* 0x0011e8000c101b04 */
/*02e0*/ LDG.E.64 R26, [R8.64] ; /* 0x00000004081a7981 */
/* 0x000ea8000c1e1b00 */
/*02f0*/ LDG.E.64 R20, [R18.64] ; /* 0x0000000412147981 */
/* 0x000ea2000c1e1b00 */
/*0300*/ IMAD.WIDE R22, R5, c[0x0][0x178], R16 ; /* 0x00005e0005167a25 */
/* 0x002fc800078e0210 */
/*0310*/ IMAD.WIDE R14, R5, c[0x0][0x178], R18 ; /* 0x00005e00050e7a25 */
/* 0x000fc800078e0212 */
/*0320*/ IMAD.WIDE R10, R5, c[0x0][0x178], R8 ; /* 0x00005e00050a7a25 */
/* 0x000fe200078e0208 */
/*0330*/ DADD R20, R20, R26 ; /* 0x0000000014147229 */
/* 0x004e4e000000001a */
/*0340*/ STG.E.64 [R22.64], R20 ; /* 0x0000001416007986 */
/* 0x0023e8000c101b04 */
/*0350*/ LDG.E.64 R24, [R14.64] ; /* 0x000000040e187981 */
/* 0x000ea8000c1e1b00 */
/*0360*/ LDG.E.64 R26, [R10.64] ; /* 0x000000040a1a7981 */
/* 0x000ea2000c1e1b00 */
/*0370*/ IMAD.WIDE R12, R5, c[0x0][0x178], R22 ; /* 0x00005e00050c7a25 */
/* 0x001fc800078e0216 */
/*0380*/ IMAD.WIDE R16, R5, c[0x0][0x178], R10 ; /* 0x00005e0005107a25 */
/* 0x000fe200078e020a */
/*0390*/ DADD R24, R24, R26 ; /* 0x0000000018187229 */
/* 0x004086000000001a */
/*03a0*/ IMAD.WIDE R26, R5, c[0x0][0x178], R14 ; /* 0x00005e00051a7a25 */
/* 0x001fc800078e020e */
/*03b0*/ STG.E.64 [R12.64], R24 ; /* 0x000000180c007986 */
/* 0x0041e8000c101b04 */
/*03c0*/ LDG.E.64 R8, [R26.64] ; /* 0x000000041a087981 */
/* 0x000ea8000c1e1b00 */
/*03d0*/ LDG.E.64 R18, [R16.64] ; /* 0x0000000410127981 */
/* 0x000ea2000c1e1b00 */
/*03e0*/ IMAD.WIDE R20, R5, c[0x0][0x178], R12 ; /* 0x00005e0005147a25 */
/* 0x002fc800078e020c */
/*03f0*/ IMAD.WIDE R14, R5, c[0x0][0x178], R16 ; /* 0x00005e00050e7a25 */
/* 0x000fe200078e0210 */
/*0400*/ DADD R18, R8, R18 ; /* 0x0000000008127229 */
/* 0x0042860000000012 */
/*0410*/ IMAD.WIDE R8, R5, c[0x0][0x178], R26 ; /* 0x00005e0005087a25 */
/* 0x002fc800078e021a */
/*0420*/ STG.E.64 [R20.64], R18 ; /* 0x0000001214007986 */
/* 0x0043e8000c101b04 */
/*0430*/ LDG.E.64 R10, [R8.64] ; /* 0x00000004080a7981 */
/* 0x000ea8000c1e1b00 */
/*0440*/ LDG.E.64 R22, [R14.64] ; /* 0x000000040e167981 */
/* 0x000ea2000c1e1b00 */
/*0450*/ IMAD.WIDE R12, R5, c[0x0][0x178], R20 ; /* 0x00005e00050c7a25 */
/* 0x001fc800078e0214 */
/*0460*/ IMAD.WIDE R16, R5, c[0x0][0x178], R8 ; /* 0x00005e0005107a25 */
/* 0x000fe200078e0208 */
/*0470*/ DADD R22, R10, R22 ; /* 0x000000000a167229 */
/* 0x0040860000000016 */
/*0480*/ IMAD.WIDE R10, R5, c[0x0][0x178], R14 ; /* 0x00005e00050a7a25 */
/* 0x001fc800078e020e */
/*0490*/ STG.E.64 [R12.64], R22 ; /* 0x000000160c007986 */
/* 0x0041e8000c101b04 */
/*04a0*/ LDG.E.64 R26, [R10.64] ; /* 0x000000040a1a7981 */
/* 0x000ea8000c1e1b00 */
/*04b0*/ LDG.E.64 R24, [R16.64] ; /* 0x0000000410187981 */
/* 0x000ea2000c1e1b00 */
/*04c0*/ IMAD.WIDE R18, R5, c[0x0][0x178], R12 ; /* 0x00005e0005127a25 */
/* 0x002fc800078e020c */
/*04d0*/ IMAD.WIDE R8, R5, c[0x0][0x178], R16 ; /* 0x00005e0005087a25 */
/* 0x000fc800078e0210 */
/*04e0*/ IMAD.WIDE R14, R5, c[0x0][0x178], R10 ; /* 0x00005e00050e7a25 */
/* 0x000fe200078e020a */
/*04f0*/ DADD R24, R24, R26 ; /* 0x0000000018187229 */
/* 0x004e4e000000001a */
/*0500*/ STG.E.64 [R18.64], R24 ; /* 0x0000001812007986 */
/* 0x0023e8000c101b04 */
/*0510*/ LDG.E.64 R20, [R8.64] ; /* 0x0000000408147981 */
/* 0x000ea8000c1e1b00 */
/*0520*/ LDG.E.64 R26, [R14.64] ; /* 0x000000040e1a7981 */
/* 0x000ea2000c1e1b00 */
/*0530*/ IMAD.WIDE R12, R5, c[0x0][0x178], R18 ; /* 0x00005e00050c7a25 */
/* 0x001fc800078e0212 */
/*0540*/ IMAD.WIDE R10, R5, c[0x0][0x178], R8 ; /* 0x00005e00050a7a25 */
/* 0x000fc800078e0208 */
/*0550*/ IMAD.WIDE R16, R5, c[0x0][0x178], R14 ; /* 0x00005e0005107a25 */
/* 0x000fe200078e020e */
/*0560*/ DADD R20, R20, R26 ; /* 0x0000000014147229 */
/* 0x004e0e000000001a */
/*0570*/ STG.E.64 [R12.64], R20 ; /* 0x000000140c007986 */
/* 0x0011e8000c101b04 */
/*0580*/ LDG.E.64 R22, [R10.64] ; /* 0x000000040a167981 */
/* 0x000ea8000c1e1b00 */
/*0590*/ LDG.E.64 R26, [R16.64] ; /* 0x00000004101a7981 */
/* 0x000ea2000c1e1b00 */
/*05a0*/ IMAD.WIDE R18, R5, c[0x0][0x178], R12 ; /* 0x00005e0005127a25 */
/* 0x002fc800078e020c */
/*05b0*/ IMAD.WIDE R8, R5, c[0x0][0x178], R10 ; /* 0x00005e0005087a25 */
/* 0x000fc800078e020a */
/*05c0*/ IMAD.WIDE R14, R5, c[0x0][0x178], R16 ; /* 0x00005e00050e7a25 */
/* 0x000fe200078e0210 */
/*05d0*/ DADD R22, R22, R26 ; /* 0x0000000016167229 */
/* 0x004e4e000000001a */
/*05e0*/ STG.E.64 [R18.64], R22 ; /* 0x0000001612007986 */
/* 0x0023e8000c101b04 */
/*05f0*/ LDG.E.64 R24, [R8.64] ; /* 0x0000000408187981 */
/* 0x000ea8000c1e1b00 */
/*0600*/ LDG.E.64 R26, [R14.64] ; /* 0x000000040e1a7981 */
/* 0x000ea2000c1e1b00 */
/*0610*/ IMAD.WIDE R12, R5, c[0x0][0x178], R18 ; /* 0x00005e00050c7a25 */
/* 0x001fc800078e0212 */
/*0620*/ IMAD.WIDE R10, R5, c[0x0][0x178], R14 ; /* 0x00005e00050a7a25 */
/* 0x000fc800078e020e */
/*0630*/ IMAD.WIDE R16, R5, c[0x0][0x178], R8 ; /* 0x00005e0005107a25 */
/* 0x000fe200078e0208 */
/*0640*/ DADD R24, R24, R26 ; /* 0x0000000018187229 */
/* 0x004e0e000000001a */
/*0650*/ STG.E.64 [R12.64], R24 ; /* 0x000000180c007986 */
/* 0x0011e8000c101b04 */
/*0660*/ LDG.E.64 R26, [R10.64] ; /* 0x000000040a1a7981 */
/* 0x000ea8000c1e1b00 */
/*0670*/ LDG.E.64 R20, [R16.64] ; /* 0x0000000410147981 */
/* 0x000ea2000c1e1b00 */
/*0680*/ IMAD.WIDE R18, R5, c[0x0][0x178], R12 ; /* 0x00005e0005127a25 */
/* 0x002fc800078e020c */
/*0690*/ IMAD.WIDE R8, R5, c[0x0][0x178], R16 ; /* 0x00005e0005087a25 */
/* 0x000fc800078e0210 */
/*06a0*/ IMAD.WIDE R14, R5, c[0x0][0x178], R10 ; /* 0x00005e00050e7a25 */
/* 0x000fe200078e020a */
/*06b0*/ DADD R20, R20, R26 ; /* 0x0000000014147229 */
/* 0x004e4e000000001a */
/*06c0*/ STG.E.64 [R18.64], R20 ; /* 0x0000001412007986 */
/* 0x0023e8000c101b04 */
/*06d0*/ LDG.E.64 R22, [R8.64] ; /* 0x0000000408167981 */
/* 0x000ea8000c1e1b00 */
/*06e0*/ LDG.E.64 R26, [R14.64] ; /* 0x000000040e1a7981 */
/* 0x000ea2000c1e1b00 */
/*06f0*/ IMAD.WIDE R12, R5, c[0x0][0x178], R18 ; /* 0x00005e00050c7a25 */
/* 0x001fc800078e0212 */
/*0700*/ IMAD.WIDE R24, R5, c[0x0][0x178], R8 ; /* 0x00005e0005187a25 */
/* 0x000fc800078e0208 */
/*0710*/ IMAD.WIDE R10, R5, c[0x0][0x178], R14 ; /* 0x00005e00050a7a25 */
/* 0x000fe200078e020e */
/*0720*/ DADD R22, R22, R26 ; /* 0x0000000016167229 */
/* 0x004e0e000000001a */
/*0730*/ STG.E.64 [R12.64], R22 ; /* 0x000000160c007986 */
/* 0x0011e8000c101b04 */
/*0740*/ LDG.E.64 R16, [R24.64] ; /* 0x0000000418107981 */
/* 0x000ea8000c1e1b00 */
/*0750*/ LDG.E.64 R26, [R10.64] ; /* 0x000000040a1a7981 */
/* 0x000ea2000c1e1b00 */
/*0760*/ IMAD.WIDE R18, R5, c[0x0][0x178], R12 ; /* 0x00005e0005127a25 */
/* 0x002fc800078e020c */
/*0770*/ IMAD.WIDE R8, R5, c[0x0][0x178], R24 ; /* 0x00005e0005087a25 */
/* 0x000fc800078e0218 */
/*0780*/ IMAD.WIDE R20, R5, c[0x0][0x178], R10 ; /* 0x00005e0005147a25 */
/* 0x000fe200078e020a */
/*0790*/ DADD R16, R16, R26 ; /* 0x0000000010107229 */
/* 0x004e4e000000001a */
/*07a0*/ STG.E.64 [R18.64], R16 ; /* 0x0000001012007986 */
/* 0x0023e8000c101b04 */
/*07b0*/ LDG.E.64 R14, [R8.64] ; /* 0x00000004080e7981 */
/* 0x000ea8000c1e1b00 */
/*07c0*/ LDG.E.64 R26, [R20.64] ; /* 0x00000004141a7981 */
/* 0x000ea2000c1e1b00 */
/*07d0*/ IMAD.WIDE R22, R5, c[0x0][0x178], R18 ; /* 0x00005e0005167a25 */
/* 0x001fc800078e0212 */
/*07e0*/ IMAD.WIDE R24, R5, c[0x0][0x178], R8 ; /* 0x00005e0005187a25 */
/* 0x000fe200078e0208 */
/*07f0*/ DADD R26, R14, R26 ; /* 0x000000000e1a7229 */
/* 0x004086000000001a */
/*0800*/ IMAD.WIDE R14, R5, c[0x0][0x178], R20 ; /* 0x00005e00050e7a25 */
/* 0x001fc800078e0214 */
/*0810*/ STG.E.64 [R22.64], R26 ; /* 0x0000001a16007986 */
/* 0x0041e8000c101b04 */
/*0820*/ LDG.E.64 R12, [R14.64] ; /* 0x000000040e0c7981 */
/* 0x000ea8000c1e1b00 */
/*0830*/ LDG.E.64 R10, [R24.64] ; /* 0x00000004180a7981 */
/* 0x000ea2000c1e1b00 */
/*0840*/ IADD3 R3, R3, -0x10, RZ ; /* 0xfffffff003037810 */
/* 0x000fe20007ffe0ff */
/*0850*/ IMAD.WIDE R16, R5, c[0x0][0x178], R22 ; /* 0x00005e0005107a25 */
/* 0x002fe200078e0216 */
/*0860*/ IADD3 R7, R7, 0x10, RZ ; /* 0x0000001007077810 */
/* 0x000fc40007ffe0ff */
/*0870*/ ISETP.GT.AND P1, PT, R3, 0xc, PT ; /* 0x0000000c0300780c */
/* 0x000fc60003f24270 */
/*0880*/ IMAD.WIDE R8, R5, c[0x0][0x178], R16 ; /* 0x00005e0005087a25 */
/* 0x000fe200078e0210 */
/*0890*/ DADD R28, R10, R12 ; /* 0x000000000a1c7229 */
/* 0x004286000000000c */
/*08a0*/ IMAD.WIDE R10, R5, c[0x0][0x178], R24 ; /* 0x00005e00050a7a25 */
/* 0x002fc800078e0218 */
/*08b0*/ IMAD.WIDE R12, R5, c[0x0][0x178], R14 ; /* 0x00005e00050c7a25 */
/* 0x000fe200078e020e */
/*08c0*/ STG.E.64 [R16.64], R28 ; /* 0x0000001c10007986 */
/* 0x0041e2000c101b04 */
/*08d0*/ @P1 BRA 0x1a0 ; /* 0xfffff8c000001947 */
/* 0x000fea000383ffff */
/*08e0*/ ISETP.GT.AND P1, PT, R3, 0x4, PT ; /* 0x000000040300780c */
/* 0x000fda0003f24270 */
/*08f0*/ @!P1 BRA 0xcb0 ; /* 0x000003b000009947 */
/* 0x000fea0003800000 */
/*0900*/ LDG.E.64 R14, [R10.64] ; /* 0x000000040a0e7981 */
/* 0x000ea8000c1e1b00 */
/*0910*/ LDG.E.64 R16, [R12.64] ; /* 0x000000040c107981 */
/* 0x001ea2000c1e1b00 */
/*0920*/ IMAD.WIDE R20, R5, c[0x0][0x178], R10 ; /* 0x00005e0005147a25 */
/* 0x000fc800078e020a */
/*0930*/ IMAD.WIDE R18, R5, c[0x0][0x178], R12 ; /* 0x00005e0005127a25 */
/* 0x000fe200078e020c */
/*0940*/ DADD R16, R14, R16 ; /* 0x000000000e107229 */
/* 0x004e0e0000000010 */
/*0950*/ STG.E.64 [R8.64], R16 ; /* 0x0000001008007986 */
/* 0x0011e8000c101b04 */
/*0960*/ LDG.E.64 R14, [R20.64] ; /* 0x00000004140e7981 */
/* 0x000ea8000c1e1b00 */
/*0970*/ LDG.E.64 R22, [R18.64] ; /* 0x0000000412167981 */
/* 0x000ea2000c1e1b00 */
/*0980*/ IMAD.WIDE R24, R5, c[0x0][0x178], R8 ; /* 0x00005e0005187a25 */
/* 0x000fc800078e0208 */
/*0990*/ IMAD.WIDE R10, R5, c[0x0][0x178], R18 ; /* 0x00005e00050a7a25 */
/* 0x000fe200078e0212 */
/*09a0*/ DADD R22, R14, R22 ; /* 0x000000000e167229 */
/* 0x0042860000000016 */
/*09b0*/ IMAD.WIDE R14, R5, c[0x0][0x178], R20 ; /* 0x00005e00050e7a25 */
/* 0x002fc800078e0214 */
/*09c0*/ STG.E.64 [R24.64], R22 ; /* 0x0000001618007986 */
/* 0x0043e8000c101b04 */
/*09d0*/ LDG.E.64 R12, [R14.64] ; /* 0x000000040e0c7981 */
/* 0x000ea8000c1e1b00 */
/*09e0*/ LDG.E.64 R26, [R10.64] ; /* 0x000000040a1a7981 */
/* 0x000ea2000c1e1b00 */
/*09f0*/ IMAD.WIDE R16, R5, c[0x0][0x178], R24 ; /* 0x00005e0005107a25 */
/* 0x001fc800078e0218 */
/*0a00*/ IMAD.WIDE R8, R5, c[0x0][0x178], R10 ; /* 0x00005e0005087a25 */
/* 0x000fc800078e020a */
/*0a10*/ IMAD.WIDE R18, R5, c[0x0][0x178], R14 ; /* 0x00005e0005127a25 */
/* 0x000fe200078e020e */
/*0a20*/ DADD R12, R12, R26 ; /* 0x000000000c0c7229 */
/* 0x004e0e000000001a */
/*0a30*/ STG.E.64 [R16.64], R12 ; /* 0x0000000c10007986 */
/* 0x0011e8000c101b04 */
/*0a40*/ LDG.E.64 R26, [R8.64] ; /* 0x00000004081a7981 */
/* 0x000ea8000c1e1b00 */
/*0a50*/ LDG.E.64 R20, [R18.64] ; /* 0x0000000412147981 */
/* 0x000ea2000c1e1b00 */
/*0a60*/ IMAD.WIDE R22, R5, c[0x0][0x178], R16 ; /* 0x00005e0005167a25 */
/* 0x002fc800078e0210 */
/*0a70*/ IMAD.WIDE R14, R5, c[0x0][0x178], R18 ; /* 0x00005e00050e7a25 */
/* 0x000fc800078e0212 */
/*0a80*/ IMAD.WIDE R10, R5, c[0x0][0x178], R8 ; /* 0x00005e00050a7a25 */
/* 0x000fe200078e0208 */
/*0a90*/ DADD R20, R20, R26 ; /* 0x0000000014147229 */
/* 0x004e4e000000001a */
/*0aa0*/ STG.E.64 [R22.64], R20 ; /* 0x0000001416007986 */
/* 0x0023e8000c101b04 */
/*0ab0*/ LDG.E.64 R24, [R14.64] ; /* 0x000000040e187981 */
/* 0x000ea8000c1e1b00 */
/*0ac0*/ LDG.E.64 R26, [R10.64] ; /* 0x000000040a1a7981 */
/* 0x000ea2000c1e1b00 */
/*0ad0*/ IMAD.WIDE R12, R5, c[0x0][0x178], R22 ; /* 0x00005e00050c7a25 */
/* 0x001fc800078e0216 */
/*0ae0*/ IMAD.WIDE R16, R5, c[0x0][0x178], R10 ; /* 0x00005e0005107a25 */
/* 0x000fe200078e020a */
/*0af0*/ DADD R24, R24, R26 ; /* 0x0000000018187229 */
/* 0x004086000000001a */
/*0b00*/ IMAD.WIDE R26, R5, c[0x0][0x178], R14 ; /* 0x00005e00051a7a25 */
/* 0x001fc800078e020e */
/*0b10*/ STG.E.64 [R12.64], R24 ; /* 0x000000180c007986 */
/* 0x0041e8000c101b04 */
/*0b20*/ LDG.E.64 R8, [R26.64] ; /* 0x000000041a087981 */
/* 0x000ea8000c1e1b00 */
/*0b30*/ LDG.E.64 R18, [R16.64] ; /* 0x0000000410127981 */
/* 0x000ea2000c1e1b00 */
/*0b40*/ IMAD.WIDE R20, R5, c[0x0][0x178], R12 ; /* 0x00005e0005147a25 */
/* 0x002fc800078e020c */
/*0b50*/ IMAD.WIDE R10, R5, c[0x0][0x178], R16 ; /* 0x00005e00050a7a25 */
/* 0x000fe200078e0210 */
/*0b60*/ DADD R18, R8, R18 ; /* 0x0000000008127229 */
/* 0x0042860000000012 */
/*0b70*/ IMAD.WIDE R8, R5, c[0x0][0x178], R26 ; /* 0x00005e0005087a25 */
/* 0x002fc800078e021a */
/*0b80*/ STG.E.64 [R20.64], R18 ; /* 0x0000001214007986 */
/* 0x0043e8000c101b04 */
/*0b90*/ LDG.E.64 R14, [R8.64] ; /* 0x00000004080e7981 */
/* 0x000ea8000c1e1b00 */
/*0ba0*/ LDG.E.64 R22, [R10.64] ; /* 0x000000040a167981 */
/* 0x000ea2000c1e1b00 */
/*0bb0*/ IMAD.WIDE R24, R5, c[0x0][0x178], R20 ; /* 0x00005e0005187a25 */
/* 0x001fc800078e0214 */
/*0bc0*/ IMAD.WIDE R16, R5, c[0x0][0x178], R8 ; /* 0x00005e0005107a25 */
/* 0x000fe200078e0208 */
/*0bd0*/ DADD R22, R14, R22 ; /* 0x000000000e167229 */
/* 0x0040860000000016 */
/*0be0*/ IMAD.WIDE R14, R5, c[0x0][0x178], R10 ; /* 0x00005e00050e7a25 */
/* 0x001fc800078e020a */
/*0bf0*/ STG.E.64 [R24.64], R22 ; /* 0x0000001618007986 */
/* 0x0041e8000c101b04 */
/*0c00*/ LDG.E.64 R26, [R14.64] ; /* 0x000000040e1a7981 */
/* 0x000ea8000c1e1b00 */
/*0c10*/ LDG.E.64 R12, [R16.64] ; /* 0x00000004100c7981 */
/* 0x000ea2000c1e1b00 */
/*0c20*/ IMAD.WIDE R18, R5, c[0x0][0x178], R24 ; /* 0x00005e0005127a25 */
/* 0x002fe200078e0218 */
/*0c30*/ PLOP3.LUT P0, PT, PT, PT, PT, 0x8, 0x0 ; /* 0x000000000000781c */
/* 0x000fc40003f0e170 */
/*0c40*/ IADD3 R7, R7, 0x8, RZ ; /* 0x0000000807077810 */
/* 0x000fe20007ffe0ff */
/*0c50*/ IMAD.WIDE R10, R5, c[0x0][0x178], R16 ; /* 0x00005e00050a7a25 */
/* 0x000fe200078e0210 */
/*0c60*/ IADD3 R3, R3, -0x8, RZ ; /* 0xfffffff803037810 */
/* 0x000fc60007ffe0ff */
/*0c70*/ IMAD.WIDE R8, R5, c[0x0][0x178], R18 ; /* 0x00005e0005087a25 */
/* 0x000fe200078e0212 */
/*0c80*/ DADD R26, R12, R26 ; /* 0x000000000c1a7229 */
/* 0x004286000000001a */
/*0c90*/ IMAD.WIDE R12, R5, c[0x0][0x178], R14 ; /* 0x00005e00050c7a25 */
/* 0x002fc800078e020e */
/*0ca0*/ STG.E.64 [R18.64], R26 ; /* 0x0000001a12007986 */
/* 0x0041e8000c101b04 */
/*0cb0*/ ISETP.NE.OR P0, PT, R3, RZ, P0 ; /* 0x000000ff0300720c */
/* 0x000fda0000705670 */
/*0cc0*/ @!P0 BRA 0xed0 ; /* 0x0000020000008947 */
/* 0x000fea0003800000 */
/*0cd0*/ LDG.E.64 R14, [R10.64] ; /* 0x000000040a0e7981 */
/* 0x000ea8000c1e1b00 */
/*0ce0*/ LDG.E.64 R16, [R12.64] ; /* 0x000000040c107981 */
/* 0x001ea2000c1e1b00 */
/*0cf0*/ IMAD.WIDE R24, R5, c[0x0][0x178], R10 ; /* 0x00005e0005187a25 */
/* 0x000fc800078e020a */
/*0d00*/ IMAD.WIDE R22, R5, c[0x0][0x178], R12 ; /* 0x00005e0005167a25 */
/* 0x000fe200078e020c */
/*0d10*/ DADD R16, R14, R16 ; /* 0x000000000e107229 */
/* 0x004e0e0000000010 */
/*0d20*/ STG.E.64 [R8.64], R16 ; /* 0x0000001008007986 */
/* 0x0011e8000c101b04 */
/*0d30*/ LDG.E.64 R14, [R24.64] ; /* 0x00000004180e7981 */
/* 0x000ea8000c1e1b00 */
/*0d40*/ LDG.E.64 R18, [R22.64] ; /* 0x0000000416127981 */
/* 0x000ea2000c1e1b00 */
/*0d50*/ IMAD.WIDE R26, R5, c[0x0][0x178], R8 ; /* 0x00005e00051a7a25 */
/* 0x000fc800078e0208 */
/*0d60*/ IMAD.WIDE R28, R5, c[0x0][0x178], R22 ; /* 0x00005e00051c7a25 */
/* 0x000fe200078e0216 */
/*0d70*/ DADD R18, R14, R18 ; /* 0x000000000e127229 */
/* 0x0042860000000012 */
/*0d80*/ IMAD.WIDE R14, R5, c[0x0][0x178], R24 ; /* 0x00005e00050e7a25 */
/* 0x002fc800078e0218 */
/*0d90*/ STG.E.64 [R26.64], R18 ; /* 0x000000121a007986 */
/* 0x0043e8000c101b04 */
/*0da0*/ LDG.E.64 R10, [R14.64] ; /* 0x000000040e0a7981 */
/* 0x0004e8000c1e1b00 */
/*0db0*/ LDG.E.64 R12, [R28.64] ; /* 0x000000041c0c7981 */
/* 0x000ee2000c1e1b00 */
/*0dc0*/ IMAD.WIDE R24, R5, c[0x0][0x178], R26 ; /* 0x00005e0005187a25 */
/* 0x000fc800078e021a */
/*0dd0*/ IMAD.WIDE R16, R5, c[0x0][0x178], R28 ; /* 0x00005e0005107a25 */
/* 0x001fc800078e021c */
/*0de0*/ IMAD.WIDE R14, R5, c[0x0][0x178], R14 ; /* 0x00005e00050e7a25 */
/* 0x004fe200078e020e */
/*0df0*/ DADD R20, R10, R12 ; /* 0x000000000a147229 */
/* 0x008e0e000000000c */
/*0e00*/ STG.E.64 [R24.64], R20 ; /* 0x0000001418007986 */
/* 0x0011e8000c101b04 */
/*0e10*/ LDG.E.64 R10, [R16.64] ; /* 0x00000004100a7981 */
/* 0x000ea8000c1e1b00 */
/*0e20*/ LDG.E.64 R8, [R14.64] ; /* 0x000000040e087981 */
/* 0x000ea2000c1e1b00 */
/*0e30*/ IADD3 R3, R3, -0x4, RZ ; /* 0xfffffffc03037810 */
/* 0x000fe20007ffe0ff */
/*0e40*/ IMAD.WIDE R18, R5, c[0x0][0x178], R24 ; /* 0x00005e0005127a25 */
/* 0x002fe200078e0218 */
/*0e50*/ IADD3 R7, R7, 0x4, RZ ; /* 0x0000000407077810 */
/* 0x000fc40007ffe0ff */
/*0e60*/ ISETP.NE.AND P0, PT, R3, RZ, PT ; /* 0x000000ff0300720c */
/* 0x000fe20003f05270 */
/*0e70*/ IMAD.WIDE R12, R5, c[0x0][0x178], R16 ; /* 0x00005e00050c7a25 */
/* 0x000fe200078e0210 */
/*0e80*/ DADD R22, R8, R10 ; /* 0x0000000008167229 */
/* 0x004286000000000a */
/*0e90*/ IMAD.WIDE R10, R5, c[0x0][0x178], R14 ; /* 0x00005e00050a7a25 */
/* 0x002fc800078e020e */
/*0ea0*/ IMAD.WIDE R8, R5, c[0x0][0x178], R18 ; /* 0x00005e0005087a25 */
/* 0x000fe200078e0212 */
/*0eb0*/ STG.E.64 [R18.64], R22 ; /* 0x0000001612007986 */
/* 0x0041e6000c101b04 */
/*0ec0*/ @P0 BRA 0xcd0 ; /* 0xfffffe0000000947 */
/* 0x001fea000383ffff */
/*0ed0*/ ISETP.NE.AND P0, PT, R2, RZ, PT ; /* 0x000000ff0200720c */
/* 0x000fda0003f05270 */
/*0ee0*/ @!P0 EXIT ; /* 0x000000000000894d */
/* 0x000fea0003800000 */
/*0ef0*/ MOV R3, 0x8 ; /* 0x0000000800037802 */
/* 0x000fe20000000f00 */
/*0f00*/ IMAD R0, R7, c[0x0][0x178], R0 ; /* 0x00005e0007007a24 */
/* 0x000fc800078e0200 */
/*0f10*/ IMAD.WIDE R4, R0, R3, c[0x0][0x170] ; /* 0x00005c0000047625 */
/* 0x000fc800078e0203 */
/*0f20*/ IMAD.WIDE R6, R0, R3, c[0x0][0x168] ; /* 0x00005a0000067625 */
/* 0x000fc800078e0203 */
/*0f30*/ IMAD.WIDE R8, R0, R3, c[0x0][0x160] ; /* 0x0000580000087625 */
/* 0x000fc800078e0203 */
/*0f40*/ LDG.E.64 R10, [R6.64] ; /* 0x00000004060a7981 */
/* 0x0002a8000c1e1b00 */
/*0f50*/ LDG.E.64 R12, [R8.64] ; /* 0x00000004080c7981 */
/* 0x0006a2000c1e1b00 */
/*0f60*/ IADD3 R2, R2, -0x1, RZ ; /* 0xffffffff02027810 */
/* 0x000fc80007ffe0ff */
/*0f70*/ ISETP.NE.AND P0, PT, R2, RZ, PT ; /* 0x000000ff0200720c */
/* 0x000fe20003f05270 */
/*0f80*/ IMAD.WIDE R6, R3, c[0x0][0x178], R6 ; /* 0x00005e0003067a25 */
/* 0x002fc800078e0206 */
/*0f90*/ IMAD.WIDE R8, R3, c[0x0][0x178], R8 ; /* 0x00005e0003087a25 */
/* 0x008fe200078e0208 */
/*0fa0*/ DADD R10, R10, R12 ; /* 0x000000000a0a7229 */
/* 0x004e4e000000000c */
/*0fb0*/ STG.E.64 [R4.64], R10 ; /* 0x0000000a04007986 */
/* 0x0023e4000c101b04 */
/*0fc0*/ IMAD.WIDE R4, R3, c[0x0][0x178], R4 ; /* 0x00005e0003047a25 */
/* 0x002fe200078e0204 */
/*0fd0*/ @P0 BRA 0xf40 ; /* 0xffffff6000000947 */
/* 0x000fea000383ffff */
/*0fe0*/ EXIT ; /* 0x000000000000794d */
/* 0x000fea0003800000 */
/*0ff0*/ BRA 0xff0; /* 0xfffffff000007947 */
/* 0x000fc0000383ffff */
/*1000*/ NOP; /* 0x0000000000007918 */
/* 0x000fc00000000000 */
/*1010*/ NOP; /* 0x0000000000007918 */
/* 0x000fc00000000000 */
/*1020*/ NOP; /* 0x0000000000007918 */
/* 0x000fc00000000000 */
/*1030*/ NOP; /* 0x0000000000007918 */
/* 0x000fc00000000000 */
/*1040*/ NOP; /* 0x0000000000007918 */
/* 0x000fc00000000000 */
/*1050*/ NOP; /* 0x0000000000007918 */
/* 0x000fc00000000000 */
/*1060*/ NOP; /* 0x0000000000007918 */
/* 0x000fc00000000000 */
/*1070*/ NOP; /* 0x0000000000007918 */
/* 0x000fc00000000000 */
.......... |
You are a helpful coding assistant specialized in converting CUDA source code to CUDA host assembly. | #include "includes.h"
__global__ void addOneColumnPerThread(double* a, double* b, double* c, int n)
{
// Get the column for current thread
int column = (blockIdx.x * blockDim.x + threadIdx.x);
// Make sure we do not go out of bounds
if (column < n)
{
for (int i = 0; i < n; i++)
{
c[i * n + column] = a[i * n + column] + b[i * n + column];
}
}
} | .file "tmpxft_0006c2cd_00000000-6_addOneColumnPerThread.cudafe1.cpp"
.text
#APP
#NO_APP
.type _ZL26__cudaUnregisterBinaryUtilv, @function
_ZL26__cudaUnregisterBinaryUtilv:
.LFB2029:
.cfi_startproc
endbr64
subq $8, %rsp
.cfi_def_cfa_offset 16
movq _ZL20__cudaFatCubinHandle(%rip), %rdi
call __cudaUnregisterFatBinary@PLT
addq $8, %rsp
.cfi_def_cfa_offset 8
ret
.cfi_endproc
.LFE2029:
.size _ZL26__cudaUnregisterBinaryUtilv, .-_ZL26__cudaUnregisterBinaryUtilv
.globl _Z46__device_stub__Z21addOneColumnPerThreadPdS_S_iPdS_S_i
.type _Z46__device_stub__Z21addOneColumnPerThreadPdS_S_iPdS_S_i, @function
_Z46__device_stub__Z21addOneColumnPerThreadPdS_S_iPdS_S_i:
.LFB2051:
.cfi_startproc
endbr64
subq $152, %rsp
.cfi_def_cfa_offset 160
movq %rdi, 24(%rsp)
movq %rsi, 16(%rsp)
movq %rdx, 8(%rsp)
movl %ecx, 4(%rsp)
movq %fs:40, %rax
movq %rax, 136(%rsp)
xorl %eax, %eax
leaq 24(%rsp), %rax
movq %rax, 96(%rsp)
leaq 16(%rsp), %rax
movq %rax, 104(%rsp)
leaq 8(%rsp), %rax
movq %rax, 112(%rsp)
leaq 4(%rsp), %rax
movq %rax, 120(%rsp)
movl $1, 48(%rsp)
movl $1, 52(%rsp)
movl $1, 56(%rsp)
movl $1, 60(%rsp)
movl $1, 64(%rsp)
movl $1, 68(%rsp)
leaq 40(%rsp), %rcx
leaq 32(%rsp), %rdx
leaq 60(%rsp), %rsi
leaq 48(%rsp), %rdi
call __cudaPopCallConfiguration@PLT
testl %eax, %eax
je .L7
.L3:
movq 136(%rsp), %rax
subq %fs:40, %rax
jne .L8
addq $152, %rsp
.cfi_remember_state
.cfi_def_cfa_offset 8
ret
.L7:
.cfi_restore_state
pushq 40(%rsp)
.cfi_def_cfa_offset 168
pushq 40(%rsp)
.cfi_def_cfa_offset 176
leaq 112(%rsp), %r9
movq 76(%rsp), %rcx
movl 84(%rsp), %r8d
movq 64(%rsp), %rsi
movl 72(%rsp), %edx
leaq _Z21addOneColumnPerThreadPdS_S_i(%rip), %rdi
call cudaLaunchKernel@PLT
addq $16, %rsp
.cfi_def_cfa_offset 160
jmp .L3
.L8:
call __stack_chk_fail@PLT
.cfi_endproc
.LFE2051:
.size _Z46__device_stub__Z21addOneColumnPerThreadPdS_S_iPdS_S_i, .-_Z46__device_stub__Z21addOneColumnPerThreadPdS_S_iPdS_S_i
.globl _Z21addOneColumnPerThreadPdS_S_i
.type _Z21addOneColumnPerThreadPdS_S_i, @function
_Z21addOneColumnPerThreadPdS_S_i:
.LFB2052:
.cfi_startproc
endbr64
subq $8, %rsp
.cfi_def_cfa_offset 16
call _Z46__device_stub__Z21addOneColumnPerThreadPdS_S_iPdS_S_i
addq $8, %rsp
.cfi_def_cfa_offset 8
ret
.cfi_endproc
.LFE2052:
.size _Z21addOneColumnPerThreadPdS_S_i, .-_Z21addOneColumnPerThreadPdS_S_i
.section .rodata.str1.8,"aMS",@progbits,1
.align 8
.LC0:
.string "_Z21addOneColumnPerThreadPdS_S_i"
.text
.type _ZL24__sti____cudaRegisterAllv, @function
_ZL24__sti____cudaRegisterAllv:
.LFB2054:
.cfi_startproc
endbr64
subq $8, %rsp
.cfi_def_cfa_offset 16
leaq _ZL15__fatDeviceText(%rip), %rdi
call __cudaRegisterFatBinary@PLT
movq %rax, %rdi
movq %rax, _ZL20__cudaFatCubinHandle(%rip)
pushq $0
.cfi_def_cfa_offset 24
pushq $0
.cfi_def_cfa_offset 32
pushq $0
.cfi_def_cfa_offset 40
pushq $0
.cfi_def_cfa_offset 48
movl $0, %r9d
movl $-1, %r8d
leaq .LC0(%rip), %rdx
movq %rdx, %rcx
leaq _Z21addOneColumnPerThreadPdS_S_i(%rip), %rsi
call __cudaRegisterFunction@PLT
addq $32, %rsp
.cfi_def_cfa_offset 16
movq _ZL20__cudaFatCubinHandle(%rip), %rdi
call __cudaRegisterFatBinaryEnd@PLT
leaq _ZL26__cudaUnregisterBinaryUtilv(%rip), %rdi
call atexit@PLT
addq $8, %rsp
.cfi_def_cfa_offset 8
ret
.cfi_endproc
.LFE2054:
.size _ZL24__sti____cudaRegisterAllv, .-_ZL24__sti____cudaRegisterAllv
.section .init_array,"aw"
.align 8
.quad _ZL24__sti____cudaRegisterAllv
.section .nvFatBinSegment,"aw"
.align 8
.type _ZL15__fatDeviceText, @object
.size _ZL15__fatDeviceText, 24
_ZL15__fatDeviceText:
.long 1180844977
.long 1
.quad fatbinData
.quad 0
.local _ZL20__cudaFatCubinHandle
.comm _ZL20__cudaFatCubinHandle,8,8
.ident "GCC: (Ubuntu 13.3.0-6ubuntu2~24.04) 13.3.0"
.section .note.GNU-stack,"",@progbits
.section .note.gnu.property,"a"
.align 8
.long 1f - 0f
.long 4f - 1f
.long 5
0:
.string "GNU"
1:
.align 8
.long 0xc0000002
.long 3f - 2f
2:
.long 0x3
3:
.align 8
4: |
You are a helpful coding assistant specialized in converting CUDA source code to HIP/AMD source code. | #include "includes.h"
__global__ void addOneColumnPerThread(double* a, double* b, double* c, int n)
{
// Get the column for current thread
int column = (blockIdx.x * blockDim.x + threadIdx.x);
// Make sure we do not go out of bounds
if (column < n)
{
for (int i = 0; i < n; i++)
{
c[i * n + column] = a[i * n + column] + b[i * n + column];
}
}
} | #include <hip/hip_runtime.h>
#include "includes.h"
__global__ void addOneColumnPerThread(double* a, double* b, double* c, int n)
{
// Get the column for current thread
int column = (blockIdx.x * blockDim.x + threadIdx.x);
// Make sure we do not go out of bounds
if (column < n)
{
for (int i = 0; i < n; i++)
{
c[i * n + column] = a[i * n + column] + b[i * n + column];
}
}
} |
You are a helpful coding assistant specialized in converting HIP source code to AMD device assembly. | #include <hip/hip_runtime.h>
#include "includes.h"
__global__ void addOneColumnPerThread(double* a, double* b, double* c, int n)
{
// Get the column for current thread
int column = (blockIdx.x * blockDim.x + threadIdx.x);
// Make sure we do not go out of bounds
if (column < n)
{
for (int i = 0; i < n; i++)
{
c[i * n + column] = a[i * n + column] + b[i * n + column];
}
}
} | .text
.amdgcn_target "amdgcn-amd-amdhsa--gfx1100"
.protected _Z21addOneColumnPerThreadPdS_S_i
.globl _Z21addOneColumnPerThreadPdS_S_i
.p2align 8
.type _Z21addOneColumnPerThreadPdS_S_i,@function
_Z21addOneColumnPerThreadPdS_S_i:
s_clause 0x1
s_load_b32 s3, s[0:1], 0x2c
s_load_b32 s2, s[0:1], 0x18
s_waitcnt lgkmcnt(0)
s_and_b32 s3, s3, 0xffff
s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
v_mad_u64_u32 v[1:2], null, s15, s3, v[0:1]
s_mov_b32 s3, exec_lo
v_max_i32_e32 v0, 0, v1
s_delay_alu instid0(VALU_DEP_1)
v_cmpx_gt_i32_e64 s2, v0
s_cbranch_execz .LBB0_3
s_clause 0x1
s_load_b128 s[4:7], s[0:1], 0x0
s_load_b64 s[0:1], s[0:1], 0x10
s_mov_b32 s3, s2
.p2align 6
.LBB0_2:
v_ashrrev_i32_e32 v2, 31, v1
s_add_i32 s3, s3, -1
s_delay_alu instid0(SALU_CYCLE_1) | instskip(NEXT) | instid1(VALU_DEP_1)
s_cmp_lg_u32 s3, 0
v_lshlrev_b64 v[2:3], 3, v[1:2]
v_add_nc_u32_e32 v1, s2, v1
s_waitcnt lgkmcnt(0)
s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_3)
v_add_co_u32 v4, vcc_lo, s4, v2
v_add_co_ci_u32_e32 v5, vcc_lo, s5, v3, vcc_lo
v_add_co_u32 v6, vcc_lo, s6, v2
v_add_co_ci_u32_e32 v7, vcc_lo, s7, v3, vcc_lo
v_add_co_u32 v2, vcc_lo, s0, v2
global_load_b64 v[4:5], v[4:5], off
global_load_b64 v[6:7], v[6:7], off
v_add_co_ci_u32_e32 v3, vcc_lo, s1, v3, vcc_lo
s_waitcnt vmcnt(0)
v_add_f64 v[4:5], v[4:5], v[6:7]
global_store_b64 v[2:3], v[4:5], off
s_cbranch_scc1 .LBB0_2
.LBB0_3:
s_nop 0
s_sendmsg sendmsg(MSG_DEALLOC_VGPRS)
s_endpgm
.section .rodata,"a",@progbits
.p2align 6, 0x0
.amdhsa_kernel _Z21addOneColumnPerThreadPdS_S_i
.amdhsa_group_segment_fixed_size 0
.amdhsa_private_segment_fixed_size 0
.amdhsa_kernarg_size 288
.amdhsa_user_sgpr_count 15
.amdhsa_user_sgpr_dispatch_ptr 0
.amdhsa_user_sgpr_queue_ptr 0
.amdhsa_user_sgpr_kernarg_segment_ptr 1
.amdhsa_user_sgpr_dispatch_id 0
.amdhsa_user_sgpr_private_segment_size 0
.amdhsa_wavefront_size32 1
.amdhsa_uses_dynamic_stack 0
.amdhsa_enable_private_segment 0
.amdhsa_system_sgpr_workgroup_id_x 1
.amdhsa_system_sgpr_workgroup_id_y 0
.amdhsa_system_sgpr_workgroup_id_z 0
.amdhsa_system_sgpr_workgroup_info 0
.amdhsa_system_vgpr_workitem_id 0
.amdhsa_next_free_vgpr 8
.amdhsa_next_free_sgpr 16
.amdhsa_float_round_mode_32 0
.amdhsa_float_round_mode_16_64 0
.amdhsa_float_denorm_mode_32 3
.amdhsa_float_denorm_mode_16_64 3
.amdhsa_dx10_clamp 1
.amdhsa_ieee_mode 1
.amdhsa_fp16_overflow 0
.amdhsa_workgroup_processor_mode 1
.amdhsa_memory_ordered 1
.amdhsa_forward_progress 0
.amdhsa_shared_vgpr_count 0
.amdhsa_exception_fp_ieee_invalid_op 0
.amdhsa_exception_fp_denorm_src 0
.amdhsa_exception_fp_ieee_div_zero 0
.amdhsa_exception_fp_ieee_overflow 0
.amdhsa_exception_fp_ieee_underflow 0
.amdhsa_exception_fp_ieee_inexact 0
.amdhsa_exception_int_div_zero 0
.end_amdhsa_kernel
.text
.Lfunc_end0:
.size _Z21addOneColumnPerThreadPdS_S_i, .Lfunc_end0-_Z21addOneColumnPerThreadPdS_S_i
.section .AMDGPU.csdata,"",@progbits
.text
.p2alignl 7, 3214868480
.fill 96, 4, 3214868480
.type __hip_cuid_,@object
.section .bss,"aw",@nobits
.globl __hip_cuid_
__hip_cuid_:
.byte 0
.size __hip_cuid_, 1
.ident "AMD clang version 18.0.0git (https://github.com/RadeonOpenCompute/llvm-project roc-6.3.2 25012 e5bf7e55c91490b07c49d8960fa7983d864936c4)"
.section ".note.GNU-stack","",@progbits
.addrsig
.addrsig_sym __hip_cuid_
.amdgpu_metadata
---
amdhsa.kernels:
- .args:
- .address_space: global
.offset: 0
.size: 8
.value_kind: global_buffer
- .address_space: global
.offset: 8
.size: 8
.value_kind: global_buffer
- .address_space: global
.offset: 16
.size: 8
.value_kind: global_buffer
- .offset: 24
.size: 4
.value_kind: by_value
- .offset: 32
.size: 4
.value_kind: hidden_block_count_x
- .offset: 36
.size: 4
.value_kind: hidden_block_count_y
- .offset: 40
.size: 4
.value_kind: hidden_block_count_z
- .offset: 44
.size: 2
.value_kind: hidden_group_size_x
- .offset: 46
.size: 2
.value_kind: hidden_group_size_y
- .offset: 48
.size: 2
.value_kind: hidden_group_size_z
- .offset: 50
.size: 2
.value_kind: hidden_remainder_x
- .offset: 52
.size: 2
.value_kind: hidden_remainder_y
- .offset: 54
.size: 2
.value_kind: hidden_remainder_z
- .offset: 72
.size: 8
.value_kind: hidden_global_offset_x
- .offset: 80
.size: 8
.value_kind: hidden_global_offset_y
- .offset: 88
.size: 8
.value_kind: hidden_global_offset_z
- .offset: 96
.size: 2
.value_kind: hidden_grid_dims
.group_segment_fixed_size: 0
.kernarg_segment_align: 8
.kernarg_segment_size: 288
.language: OpenCL C
.language_version:
- 2
- 0
.max_flat_workgroup_size: 1024
.name: _Z21addOneColumnPerThreadPdS_S_i
.private_segment_fixed_size: 0
.sgpr_count: 18
.sgpr_spill_count: 0
.symbol: _Z21addOneColumnPerThreadPdS_S_i.kd
.uniform_work_group_size: 1
.uses_dynamic_stack: false
.vgpr_count: 8
.vgpr_spill_count: 0
.wavefront_size: 32
.workgroup_processor_mode: 1
amdhsa.target: amdgcn-amd-amdhsa--gfx1100
amdhsa.version:
- 1
- 2
...
.end_amdgpu_metadata |
You are a helpful coding assistant specialized in converting HIP source code to AMD host assembly. | #include <hip/hip_runtime.h>
#include "includes.h"
__global__ void addOneColumnPerThread(double* a, double* b, double* c, int n)
{
// Get the column for current thread
int column = (blockIdx.x * blockDim.x + threadIdx.x);
// Make sure we do not go out of bounds
if (column < n)
{
for (int i = 0; i < n; i++)
{
c[i * n + column] = a[i * n + column] + b[i * n + column];
}
}
} | .text
.file "addOneColumnPerThread.hip"
.globl _Z36__device_stub__addOneColumnPerThreadPdS_S_i # -- Begin function _Z36__device_stub__addOneColumnPerThreadPdS_S_i
.p2align 4, 0x90
.type _Z36__device_stub__addOneColumnPerThreadPdS_S_i,@function
_Z36__device_stub__addOneColumnPerThreadPdS_S_i: # @_Z36__device_stub__addOneColumnPerThreadPdS_S_i
.cfi_startproc
# %bb.0:
subq $120, %rsp
.cfi_def_cfa_offset 128
movq %rdi, 72(%rsp)
movq %rsi, 64(%rsp)
movq %rdx, 56(%rsp)
movl %ecx, 4(%rsp)
leaq 72(%rsp), %rax
movq %rax, 80(%rsp)
leaq 64(%rsp), %rax
movq %rax, 88(%rsp)
leaq 56(%rsp), %rax
movq %rax, 96(%rsp)
leaq 4(%rsp), %rax
movq %rax, 104(%rsp)
leaq 40(%rsp), %rdi
leaq 24(%rsp), %rsi
leaq 16(%rsp), %rdx
leaq 8(%rsp), %rcx
callq __hipPopCallConfiguration
movq 40(%rsp), %rsi
movl 48(%rsp), %edx
movq 24(%rsp), %rcx
movl 32(%rsp), %r8d
leaq 80(%rsp), %r9
movl $_Z21addOneColumnPerThreadPdS_S_i, %edi
pushq 8(%rsp)
.cfi_adjust_cfa_offset 8
pushq 24(%rsp)
.cfi_adjust_cfa_offset 8
callq hipLaunchKernel
addq $136, %rsp
.cfi_adjust_cfa_offset -136
retq
.Lfunc_end0:
.size _Z36__device_stub__addOneColumnPerThreadPdS_S_i, .Lfunc_end0-_Z36__device_stub__addOneColumnPerThreadPdS_S_i
.cfi_endproc
# -- End function
.p2align 4, 0x90 # -- Begin function __hip_module_ctor
.type __hip_module_ctor,@function
__hip_module_ctor: # @__hip_module_ctor
.cfi_startproc
# %bb.0:
subq $40, %rsp
.cfi_def_cfa_offset 48
cmpq $0, __hip_gpubin_handle(%rip)
jne .LBB1_2
# %bb.1:
movl $__hip_fatbin_wrapper, %edi
callq __hipRegisterFatBinary
movq %rax, __hip_gpubin_handle(%rip)
.LBB1_2:
movq __hip_gpubin_handle(%rip), %rdi
xorps %xmm0, %xmm0
movups %xmm0, 16(%rsp)
movups %xmm0, (%rsp)
movl $_Z21addOneColumnPerThreadPdS_S_i, %esi
movl $.L__unnamed_1, %edx
movl $.L__unnamed_1, %ecx
movl $-1, %r8d
xorl %r9d, %r9d
callq __hipRegisterFunction
movl $__hip_module_dtor, %edi
addq $40, %rsp
.cfi_def_cfa_offset 8
jmp atexit # TAILCALL
.Lfunc_end1:
.size __hip_module_ctor, .Lfunc_end1-__hip_module_ctor
.cfi_endproc
# -- End function
.p2align 4, 0x90 # -- Begin function __hip_module_dtor
.type __hip_module_dtor,@function
__hip_module_dtor: # @__hip_module_dtor
.cfi_startproc
# %bb.0:
movq __hip_gpubin_handle(%rip), %rdi
testq %rdi, %rdi
je .LBB2_2
# %bb.1:
pushq %rax
.cfi_def_cfa_offset 16
callq __hipUnregisterFatBinary
movq $0, __hip_gpubin_handle(%rip)
addq $8, %rsp
.cfi_def_cfa_offset 8
.LBB2_2:
retq
.Lfunc_end2:
.size __hip_module_dtor, .Lfunc_end2-__hip_module_dtor
.cfi_endproc
# -- End function
.type _Z21addOneColumnPerThreadPdS_S_i,@object # @_Z21addOneColumnPerThreadPdS_S_i
.section .rodata,"a",@progbits
.globl _Z21addOneColumnPerThreadPdS_S_i
.p2align 3, 0x0
_Z21addOneColumnPerThreadPdS_S_i:
.quad _Z36__device_stub__addOneColumnPerThreadPdS_S_i
.size _Z21addOneColumnPerThreadPdS_S_i, 8
.type .L__unnamed_1,@object # @0
.section .rodata.str1.1,"aMS",@progbits,1
.L__unnamed_1:
.asciz "_Z21addOneColumnPerThreadPdS_S_i"
.size .L__unnamed_1, 33
.type __hip_fatbin_wrapper,@object # @__hip_fatbin_wrapper
.section .hipFatBinSegment,"a",@progbits
.p2align 3, 0x0
__hip_fatbin_wrapper:
.long 1212764230 # 0x48495046
.long 1 # 0x1
.quad __hip_fatbin
.quad 0
.size __hip_fatbin_wrapper, 24
.type __hip_gpubin_handle,@object # @__hip_gpubin_handle
.local __hip_gpubin_handle
.comm __hip_gpubin_handle,8,8
.section .init_array,"aw",@init_array
.p2align 3, 0x0
.quad __hip_module_ctor
.type __hip_cuid_,@object # @__hip_cuid_
.bss
.globl __hip_cuid_
__hip_cuid_:
.byte 0 # 0x0
.size __hip_cuid_, 1
.section ".linker-options","e",@llvm_linker_options
.ident "AMD clang version 18.0.0git (https://github.com/RadeonOpenCompute/llvm-project roc-6.3.2 25012 e5bf7e55c91490b07c49d8960fa7983d864936c4)"
.section ".note.GNU-stack","",@progbits
.addrsig
.addrsig_sym _Z36__device_stub__addOneColumnPerThreadPdS_S_i
.addrsig_sym __hip_module_ctor
.addrsig_sym __hip_module_dtor
.addrsig_sym _Z21addOneColumnPerThreadPdS_S_i
.addrsig_sym __hip_fatbin
.addrsig_sym __hip_fatbin_wrapper
.addrsig_sym __hip_cuid_ |
You are a helpful coding assistant specialized in converting from CUDA device assembly to AMD device assembly. | code for sm_80
Function : _Z21addOneColumnPerThreadPdS_S_i
.headerflags @"EF_CUDA_TEXMODE_UNIFIED EF_CUDA_64BIT_ADDRESS EF_CUDA_SM80 EF_CUDA_VIRTUAL_SM(EF_CUDA_SM80)"
/*0000*/ MOV R1, c[0x0][0x28] ; /* 0x00000a0000017a02 */
/* 0x000fe40000000f00 */
/*0010*/ S2R R0, SR_CTAID.X ; /* 0x0000000000007919 */
/* 0x000e220000002500 */
/*0020*/ MOV R2, c[0x0][0x178] ; /* 0x00005e0000027a02 */
/* 0x000fc60000000f00 */
/*0030*/ S2R R3, SR_TID.X ; /* 0x0000000000037919 */
/* 0x000e220000002100 */
/*0040*/ ISETP.GE.AND P0, PT, R2, 0x1, PT ; /* 0x000000010200780c */
/* 0x000fe20003f06270 */
/*0050*/ IMAD R0, R0, c[0x0][0x0], R3 ; /* 0x0000000000007a24 */
/* 0x001fca00078e0203 */
/*0060*/ ISETP.GE.OR P0, PT, R0, c[0x0][0x178], !P0 ; /* 0x00005e0000007a0c */
/* 0x000fda0004706670 */
/*0070*/ @P0 EXIT ; /* 0x000000000000094d */
/* 0x000fea0003800000 */
/*0080*/ IADD3 R3, R2.reuse, -0x1, RZ ; /* 0xffffffff02037810 */
/* 0x040fe20007ffe0ff */
/*0090*/ ULDC.64 UR4, c[0x0][0x118] ; /* 0x0000460000047ab9 */
/* 0x000fe20000000a00 */
/*00a0*/ HFMA2.MMA R7, -RZ, RZ, 0, 0 ; /* 0x00000000ff077435 */
/* 0x000fe200000001ff */
/*00b0*/ LOP3.LUT R2, R2, 0x3, RZ, 0xc0, !PT ; /* 0x0000000302027812 */
/* 0x000fe400078ec0ff */
/*00c0*/ ISETP.GE.U32.AND P0, PT, R3, 0x3, PT ; /* 0x000000030300780c */
/* 0x000fda0003f06070 */
/*00d0*/ @!P0 BRA 0xed0 ; /* 0x00000df000008947 */
/* 0x000fea0003800000 */
/*00e0*/ IADD3 R3, -R2, c[0x0][0x178], RZ ; /* 0x00005e0002037a10 */
/* 0x000fe40007ffe1ff */
/*00f0*/ MOV R5, 0x8 ; /* 0x0000000800057802 */
/* 0x000fe40000000f00 */
/*0100*/ ISETP.GT.AND P0, PT, R3, RZ, PT ; /* 0x000000ff0300720c */
/* 0x000fe40003f04270 */
/*0110*/ MOV R7, RZ ; /* 0x000000ff00077202 */
/* 0x000fe20000000f00 */
/*0120*/ IMAD.WIDE R12, R0, R5, c[0x0][0x160] ; /* 0x00005800000c7625 */
/* 0x000fc800078e0205 */
/*0130*/ IMAD.WIDE R10, R0, R5, c[0x0][0x168] ; /* 0x00005a00000a7625 */
/* 0x000fc800078e0205 */
/*0140*/ IMAD.WIDE R8, R0, R5, c[0x0][0x170] ; /* 0x00005c0000087625 */
/* 0x000fe400078e0205 */
/*0150*/ @!P0 BRA 0xcd0 ; /* 0x00000b7000008947 */
/* 0x000fea0003800000 */
/*0160*/ ISETP.GT.AND P1, PT, R3, 0xc, PT ; /* 0x0000000c0300780c */
/* 0x000fe40003f24270 */
/*0170*/ PLOP3.LUT P0, PT, PT, PT, PT, 0x80, 0x0 ; /* 0x000000000000781c */
/* 0x000fd60003f0f070 */
/*0180*/ @!P1 BRA 0x8e0 ; /* 0x0000075000009947 */
/* 0x000fea0003800000 */
/*0190*/ PLOP3.LUT P0, PT, PT, PT, PT, 0x8, 0x0 ; /* 0x000000000000781c */
/* 0x000fe40003f0e170 */
/*01a0*/ LDG.E.64 R14, [R10.64] ; /* 0x000000040a0e7981 */
/* 0x000ea8000c1e1b00 */
/*01b0*/ LDG.E.64 R16, [R12.64] ; /* 0x000000040c107981 */
/* 0x001ea2000c1e1b00 */
/*01c0*/ IMAD.WIDE R20, R5, c[0x0][0x178], R10 ; /* 0x00005e0005147a25 */
/* 0x000fc800078e020a */
/*01d0*/ IMAD.WIDE R18, R5, c[0x0][0x178], R12 ; /* 0x00005e0005127a25 */
/* 0x000fe200078e020c */
/*01e0*/ DADD R16, R14, R16 ; /* 0x000000000e107229 */
/* 0x004e0e0000000010 */
/*01f0*/ STG.E.64 [R8.64], R16 ; /* 0x0000001008007986 */
/* 0x0011e8000c101b04 */
/*0200*/ LDG.E.64 R14, [R20.64] ; /* 0x00000004140e7981 */
/* 0x000ea8000c1e1b00 */
/*0210*/ LDG.E.64 R22, [R18.64] ; /* 0x0000000412167981 */
/* 0x000ea2000c1e1b00 */
/*0220*/ IMAD.WIDE R24, R5, c[0x0][0x178], R8 ; /* 0x00005e0005187a25 */
/* 0x000fc800078e0208 */
/*0230*/ IMAD.WIDE R10, R5, c[0x0][0x178], R18 ; /* 0x00005e00050a7a25 */
/* 0x000fe200078e0212 */
/*0240*/ DADD R22, R14, R22 ; /* 0x000000000e167229 */
/* 0x0042860000000016 */
/*0250*/ IMAD.WIDE R14, R5, c[0x0][0x178], R20 ; /* 0x00005e00050e7a25 */
/* 0x002fc800078e0214 */
/*0260*/ STG.E.64 [R24.64], R22 ; /* 0x0000001618007986 */
/* 0x0043e8000c101b04 */
/*0270*/ LDG.E.64 R12, [R14.64] ; /* 0x000000040e0c7981 */
/* 0x000ea8000c1e1b00 */
/*0280*/ LDG.E.64 R26, [R10.64] ; /* 0x000000040a1a7981 */
/* 0x000ea2000c1e1b00 */
/*0290*/ IMAD.WIDE R16, R5, c[0x0][0x178], R24 ; /* 0x00005e0005107a25 */
/* 0x001fc800078e0218 */
/*02a0*/ IMAD.WIDE R8, R5, c[0x0][0x178], R10 ; /* 0x00005e0005087a25 */
/* 0x000fc800078e020a */
/*02b0*/ IMAD.WIDE R18, R5, c[0x0][0x178], R14 ; /* 0x00005e0005127a25 */
/* 0x000fe200078e020e */
/*02c0*/ DADD R12, R12, R26 ; /* 0x000000000c0c7229 */
/* 0x004e0e000000001a */
/*02d0*/ STG.E.64 [R16.64], R12 ; /* 0x0000000c10007986 */
/* 0x0011e8000c101b04 */
/*02e0*/ LDG.E.64 R26, [R8.64] ; /* 0x00000004081a7981 */
/* 0x000ea8000c1e1b00 */
/*02f0*/ LDG.E.64 R20, [R18.64] ; /* 0x0000000412147981 */
/* 0x000ea2000c1e1b00 */
/*0300*/ IMAD.WIDE R22, R5, c[0x0][0x178], R16 ; /* 0x00005e0005167a25 */
/* 0x002fc800078e0210 */
/*0310*/ IMAD.WIDE R14, R5, c[0x0][0x178], R18 ; /* 0x00005e00050e7a25 */
/* 0x000fc800078e0212 */
/*0320*/ IMAD.WIDE R10, R5, c[0x0][0x178], R8 ; /* 0x00005e00050a7a25 */
/* 0x000fe200078e0208 */
/*0330*/ DADD R20, R20, R26 ; /* 0x0000000014147229 */
/* 0x004e4e000000001a */
/*0340*/ STG.E.64 [R22.64], R20 ; /* 0x0000001416007986 */
/* 0x0023e8000c101b04 */
/*0350*/ LDG.E.64 R24, [R14.64] ; /* 0x000000040e187981 */
/* 0x000ea8000c1e1b00 */
/*0360*/ LDG.E.64 R26, [R10.64] ; /* 0x000000040a1a7981 */
/* 0x000ea2000c1e1b00 */
/*0370*/ IMAD.WIDE R12, R5, c[0x0][0x178], R22 ; /* 0x00005e00050c7a25 */
/* 0x001fc800078e0216 */
/*0380*/ IMAD.WIDE R16, R5, c[0x0][0x178], R10 ; /* 0x00005e0005107a25 */
/* 0x000fe200078e020a */
/*0390*/ DADD R24, R24, R26 ; /* 0x0000000018187229 */
/* 0x004086000000001a */
/*03a0*/ IMAD.WIDE R26, R5, c[0x0][0x178], R14 ; /* 0x00005e00051a7a25 */
/* 0x001fc800078e020e */
/*03b0*/ STG.E.64 [R12.64], R24 ; /* 0x000000180c007986 */
/* 0x0041e8000c101b04 */
/*03c0*/ LDG.E.64 R8, [R26.64] ; /* 0x000000041a087981 */
/* 0x000ea8000c1e1b00 */
/*03d0*/ LDG.E.64 R18, [R16.64] ; /* 0x0000000410127981 */
/* 0x000ea2000c1e1b00 */
/*03e0*/ IMAD.WIDE R20, R5, c[0x0][0x178], R12 ; /* 0x00005e0005147a25 */
/* 0x002fc800078e020c */
/*03f0*/ IMAD.WIDE R14, R5, c[0x0][0x178], R16 ; /* 0x00005e00050e7a25 */
/* 0x000fe200078e0210 */
/*0400*/ DADD R18, R8, R18 ; /* 0x0000000008127229 */
/* 0x0042860000000012 */
/*0410*/ IMAD.WIDE R8, R5, c[0x0][0x178], R26 ; /* 0x00005e0005087a25 */
/* 0x002fc800078e021a */
/*0420*/ STG.E.64 [R20.64], R18 ; /* 0x0000001214007986 */
/* 0x0043e8000c101b04 */
/*0430*/ LDG.E.64 R10, [R8.64] ; /* 0x00000004080a7981 */
/* 0x000ea8000c1e1b00 */
/*0440*/ LDG.E.64 R22, [R14.64] ; /* 0x000000040e167981 */
/* 0x000ea2000c1e1b00 */
/*0450*/ IMAD.WIDE R12, R5, c[0x0][0x178], R20 ; /* 0x00005e00050c7a25 */
/* 0x001fc800078e0214 */
/*0460*/ IMAD.WIDE R16, R5, c[0x0][0x178], R8 ; /* 0x00005e0005107a25 */
/* 0x000fe200078e0208 */
/*0470*/ DADD R22, R10, R22 ; /* 0x000000000a167229 */
/* 0x0040860000000016 */
/*0480*/ IMAD.WIDE R10, R5, c[0x0][0x178], R14 ; /* 0x00005e00050a7a25 */
/* 0x001fc800078e020e */
/*0490*/ STG.E.64 [R12.64], R22 ; /* 0x000000160c007986 */
/* 0x0041e8000c101b04 */
/*04a0*/ LDG.E.64 R26, [R10.64] ; /* 0x000000040a1a7981 */
/* 0x000ea8000c1e1b00 */
/*04b0*/ LDG.E.64 R24, [R16.64] ; /* 0x0000000410187981 */
/* 0x000ea2000c1e1b00 */
/*04c0*/ IMAD.WIDE R18, R5, c[0x0][0x178], R12 ; /* 0x00005e0005127a25 */
/* 0x002fc800078e020c */
/*04d0*/ IMAD.WIDE R8, R5, c[0x0][0x178], R16 ; /* 0x00005e0005087a25 */
/* 0x000fc800078e0210 */
/*04e0*/ IMAD.WIDE R14, R5, c[0x0][0x178], R10 ; /* 0x00005e00050e7a25 */
/* 0x000fe200078e020a */
/*04f0*/ DADD R24, R24, R26 ; /* 0x0000000018187229 */
/* 0x004e4e000000001a */
/*0500*/ STG.E.64 [R18.64], R24 ; /* 0x0000001812007986 */
/* 0x0023e8000c101b04 */
/*0510*/ LDG.E.64 R20, [R8.64] ; /* 0x0000000408147981 */
/* 0x000ea8000c1e1b00 */
/*0520*/ LDG.E.64 R26, [R14.64] ; /* 0x000000040e1a7981 */
/* 0x000ea2000c1e1b00 */
/*0530*/ IMAD.WIDE R12, R5, c[0x0][0x178], R18 ; /* 0x00005e00050c7a25 */
/* 0x001fc800078e0212 */
/*0540*/ IMAD.WIDE R10, R5, c[0x0][0x178], R8 ; /* 0x00005e00050a7a25 */
/* 0x000fc800078e0208 */
/*0550*/ IMAD.WIDE R16, R5, c[0x0][0x178], R14 ; /* 0x00005e0005107a25 */
/* 0x000fe200078e020e */
/*0560*/ DADD R20, R20, R26 ; /* 0x0000000014147229 */
/* 0x004e0e000000001a */
/*0570*/ STG.E.64 [R12.64], R20 ; /* 0x000000140c007986 */
/* 0x0011e8000c101b04 */
/*0580*/ LDG.E.64 R22, [R10.64] ; /* 0x000000040a167981 */
/* 0x000ea8000c1e1b00 */
/*0590*/ LDG.E.64 R26, [R16.64] ; /* 0x00000004101a7981 */
/* 0x000ea2000c1e1b00 */
/*05a0*/ IMAD.WIDE R18, R5, c[0x0][0x178], R12 ; /* 0x00005e0005127a25 */
/* 0x002fc800078e020c */
/*05b0*/ IMAD.WIDE R8, R5, c[0x0][0x178], R10 ; /* 0x00005e0005087a25 */
/* 0x000fc800078e020a */
/*05c0*/ IMAD.WIDE R14, R5, c[0x0][0x178], R16 ; /* 0x00005e00050e7a25 */
/* 0x000fe200078e0210 */
/*05d0*/ DADD R22, R22, R26 ; /* 0x0000000016167229 */
/* 0x004e4e000000001a */
/*05e0*/ STG.E.64 [R18.64], R22 ; /* 0x0000001612007986 */
/* 0x0023e8000c101b04 */
/*05f0*/ LDG.E.64 R24, [R8.64] ; /* 0x0000000408187981 */
/* 0x000ea8000c1e1b00 */
/*0600*/ LDG.E.64 R26, [R14.64] ; /* 0x000000040e1a7981 */
/* 0x000ea2000c1e1b00 */
/*0610*/ IMAD.WIDE R12, R5, c[0x0][0x178], R18 ; /* 0x00005e00050c7a25 */
/* 0x001fc800078e0212 */
/*0620*/ IMAD.WIDE R10, R5, c[0x0][0x178], R14 ; /* 0x00005e00050a7a25 */
/* 0x000fc800078e020e */
/*0630*/ IMAD.WIDE R16, R5, c[0x0][0x178], R8 ; /* 0x00005e0005107a25 */
/* 0x000fe200078e0208 */
/*0640*/ DADD R24, R24, R26 ; /* 0x0000000018187229 */
/* 0x004e0e000000001a */
/*0650*/ STG.E.64 [R12.64], R24 ; /* 0x000000180c007986 */
/* 0x0011e8000c101b04 */
/*0660*/ LDG.E.64 R26, [R10.64] ; /* 0x000000040a1a7981 */
/* 0x000ea8000c1e1b00 */
/*0670*/ LDG.E.64 R20, [R16.64] ; /* 0x0000000410147981 */
/* 0x000ea2000c1e1b00 */
/*0680*/ IMAD.WIDE R18, R5, c[0x0][0x178], R12 ; /* 0x00005e0005127a25 */
/* 0x002fc800078e020c */
/*0690*/ IMAD.WIDE R8, R5, c[0x0][0x178], R16 ; /* 0x00005e0005087a25 */
/* 0x000fc800078e0210 */
/*06a0*/ IMAD.WIDE R14, R5, c[0x0][0x178], R10 ; /* 0x00005e00050e7a25 */
/* 0x000fe200078e020a */
/*06b0*/ DADD R20, R20, R26 ; /* 0x0000000014147229 */
/* 0x004e4e000000001a */
/*06c0*/ STG.E.64 [R18.64], R20 ; /* 0x0000001412007986 */
/* 0x0023e8000c101b04 */
/*06d0*/ LDG.E.64 R22, [R8.64] ; /* 0x0000000408167981 */
/* 0x000ea8000c1e1b00 */
/*06e0*/ LDG.E.64 R26, [R14.64] ; /* 0x000000040e1a7981 */
/* 0x000ea2000c1e1b00 */
/*06f0*/ IMAD.WIDE R12, R5, c[0x0][0x178], R18 ; /* 0x00005e00050c7a25 */
/* 0x001fc800078e0212 */
/*0700*/ IMAD.WIDE R24, R5, c[0x0][0x178], R8 ; /* 0x00005e0005187a25 */
/* 0x000fc800078e0208 */
/*0710*/ IMAD.WIDE R10, R5, c[0x0][0x178], R14 ; /* 0x00005e00050a7a25 */
/* 0x000fe200078e020e */
/*0720*/ DADD R22, R22, R26 ; /* 0x0000000016167229 */
/* 0x004e0e000000001a */
/*0730*/ STG.E.64 [R12.64], R22 ; /* 0x000000160c007986 */
/* 0x0011e8000c101b04 */
/*0740*/ LDG.E.64 R16, [R24.64] ; /* 0x0000000418107981 */
/* 0x000ea8000c1e1b00 */
/*0750*/ LDG.E.64 R26, [R10.64] ; /* 0x000000040a1a7981 */
/* 0x000ea2000c1e1b00 */
/*0760*/ IMAD.WIDE R18, R5, c[0x0][0x178], R12 ; /* 0x00005e0005127a25 */
/* 0x002fc800078e020c */
/*0770*/ IMAD.WIDE R8, R5, c[0x0][0x178], R24 ; /* 0x00005e0005087a25 */
/* 0x000fc800078e0218 */
/*0780*/ IMAD.WIDE R20, R5, c[0x0][0x178], R10 ; /* 0x00005e0005147a25 */
/* 0x000fe200078e020a */
/*0790*/ DADD R16, R16, R26 ; /* 0x0000000010107229 */
/* 0x004e4e000000001a */
/*07a0*/ STG.E.64 [R18.64], R16 ; /* 0x0000001012007986 */
/* 0x0023e8000c101b04 */
/*07b0*/ LDG.E.64 R14, [R8.64] ; /* 0x00000004080e7981 */
/* 0x000ea8000c1e1b00 */
/*07c0*/ LDG.E.64 R26, [R20.64] ; /* 0x00000004141a7981 */
/* 0x000ea2000c1e1b00 */
/*07d0*/ IMAD.WIDE R22, R5, c[0x0][0x178], R18 ; /* 0x00005e0005167a25 */
/* 0x001fc800078e0212 */
/*07e0*/ IMAD.WIDE R24, R5, c[0x0][0x178], R8 ; /* 0x00005e0005187a25 */
/* 0x000fe200078e0208 */
/*07f0*/ DADD R26, R14, R26 ; /* 0x000000000e1a7229 */
/* 0x004086000000001a */
/*0800*/ IMAD.WIDE R14, R5, c[0x0][0x178], R20 ; /* 0x00005e00050e7a25 */
/* 0x001fc800078e0214 */
/*0810*/ STG.E.64 [R22.64], R26 ; /* 0x0000001a16007986 */
/* 0x0041e8000c101b04 */
/*0820*/ LDG.E.64 R12, [R14.64] ; /* 0x000000040e0c7981 */
/* 0x000ea8000c1e1b00 */
/*0830*/ LDG.E.64 R10, [R24.64] ; /* 0x00000004180a7981 */
/* 0x000ea2000c1e1b00 */
/*0840*/ IADD3 R3, R3, -0x10, RZ ; /* 0xfffffff003037810 */
/* 0x000fe20007ffe0ff */
/*0850*/ IMAD.WIDE R16, R5, c[0x0][0x178], R22 ; /* 0x00005e0005107a25 */
/* 0x002fe200078e0216 */
/*0860*/ IADD3 R7, R7, 0x10, RZ ; /* 0x0000001007077810 */
/* 0x000fc40007ffe0ff */
/*0870*/ ISETP.GT.AND P1, PT, R3, 0xc, PT ; /* 0x0000000c0300780c */
/* 0x000fc60003f24270 */
/*0880*/ IMAD.WIDE R8, R5, c[0x0][0x178], R16 ; /* 0x00005e0005087a25 */
/* 0x000fe200078e0210 */
/*0890*/ DADD R28, R10, R12 ; /* 0x000000000a1c7229 */
/* 0x004286000000000c */
/*08a0*/ IMAD.WIDE R10, R5, c[0x0][0x178], R24 ; /* 0x00005e00050a7a25 */
/* 0x002fc800078e0218 */
/*08b0*/ IMAD.WIDE R12, R5, c[0x0][0x178], R14 ; /* 0x00005e00050c7a25 */
/* 0x000fe200078e020e */
/*08c0*/ STG.E.64 [R16.64], R28 ; /* 0x0000001c10007986 */
/* 0x0041e2000c101b04 */
/*08d0*/ @P1 BRA 0x1a0 ; /* 0xfffff8c000001947 */
/* 0x000fea000383ffff */
/*08e0*/ ISETP.GT.AND P1, PT, R3, 0x4, PT ; /* 0x000000040300780c */
/* 0x000fda0003f24270 */
/*08f0*/ @!P1 BRA 0xcb0 ; /* 0x000003b000009947 */
/* 0x000fea0003800000 */
/*0900*/ LDG.E.64 R14, [R10.64] ; /* 0x000000040a0e7981 */
/* 0x000ea8000c1e1b00 */
/*0910*/ LDG.E.64 R16, [R12.64] ; /* 0x000000040c107981 */
/* 0x001ea2000c1e1b00 */
/*0920*/ IMAD.WIDE R20, R5, c[0x0][0x178], R10 ; /* 0x00005e0005147a25 */
/* 0x000fc800078e020a */
/*0930*/ IMAD.WIDE R18, R5, c[0x0][0x178], R12 ; /* 0x00005e0005127a25 */
/* 0x000fe200078e020c */
/*0940*/ DADD R16, R14, R16 ; /* 0x000000000e107229 */
/* 0x004e0e0000000010 */
/*0950*/ STG.E.64 [R8.64], R16 ; /* 0x0000001008007986 */
/* 0x0011e8000c101b04 */
/*0960*/ LDG.E.64 R14, [R20.64] ; /* 0x00000004140e7981 */
/* 0x000ea8000c1e1b00 */
/*0970*/ LDG.E.64 R22, [R18.64] ; /* 0x0000000412167981 */
/* 0x000ea2000c1e1b00 */
/*0980*/ IMAD.WIDE R24, R5, c[0x0][0x178], R8 ; /* 0x00005e0005187a25 */
/* 0x000fc800078e0208 */
/*0990*/ IMAD.WIDE R10, R5, c[0x0][0x178], R18 ; /* 0x00005e00050a7a25 */
/* 0x000fe200078e0212 */
/*09a0*/ DADD R22, R14, R22 ; /* 0x000000000e167229 */
/* 0x0042860000000016 */
/*09b0*/ IMAD.WIDE R14, R5, c[0x0][0x178], R20 ; /* 0x00005e00050e7a25 */
/* 0x002fc800078e0214 */
/*09c0*/ STG.E.64 [R24.64], R22 ; /* 0x0000001618007986 */
/* 0x0043e8000c101b04 */
/*09d0*/ LDG.E.64 R12, [R14.64] ; /* 0x000000040e0c7981 */
/* 0x000ea8000c1e1b00 */
/*09e0*/ LDG.E.64 R26, [R10.64] ; /* 0x000000040a1a7981 */
/* 0x000ea2000c1e1b00 */
/*09f0*/ IMAD.WIDE R16, R5, c[0x0][0x178], R24 ; /* 0x00005e0005107a25 */
/* 0x001fc800078e0218 */
/*0a00*/ IMAD.WIDE R8, R5, c[0x0][0x178], R10 ; /* 0x00005e0005087a25 */
/* 0x000fc800078e020a */
/*0a10*/ IMAD.WIDE R18, R5, c[0x0][0x178], R14 ; /* 0x00005e0005127a25 */
/* 0x000fe200078e020e */
/*0a20*/ DADD R12, R12, R26 ; /* 0x000000000c0c7229 */
/* 0x004e0e000000001a */
/*0a30*/ STG.E.64 [R16.64], R12 ; /* 0x0000000c10007986 */
/* 0x0011e8000c101b04 */
/*0a40*/ LDG.E.64 R26, [R8.64] ; /* 0x00000004081a7981 */
/* 0x000ea8000c1e1b00 */
/*0a50*/ LDG.E.64 R20, [R18.64] ; /* 0x0000000412147981 */
/* 0x000ea2000c1e1b00 */
/*0a60*/ IMAD.WIDE R22, R5, c[0x0][0x178], R16 ; /* 0x00005e0005167a25 */
/* 0x002fc800078e0210 */
/*0a70*/ IMAD.WIDE R14, R5, c[0x0][0x178], R18 ; /* 0x00005e00050e7a25 */
/* 0x000fc800078e0212 */
/*0a80*/ IMAD.WIDE R10, R5, c[0x0][0x178], R8 ; /* 0x00005e00050a7a25 */
/* 0x000fe200078e0208 */
/*0a90*/ DADD R20, R20, R26 ; /* 0x0000000014147229 */
/* 0x004e4e000000001a */
/*0aa0*/ STG.E.64 [R22.64], R20 ; /* 0x0000001416007986 */
/* 0x0023e8000c101b04 */
/*0ab0*/ LDG.E.64 R24, [R14.64] ; /* 0x000000040e187981 */
/* 0x000ea8000c1e1b00 */
/*0ac0*/ LDG.E.64 R26, [R10.64] ; /* 0x000000040a1a7981 */
/* 0x000ea2000c1e1b00 */
/*0ad0*/ IMAD.WIDE R12, R5, c[0x0][0x178], R22 ; /* 0x00005e00050c7a25 */
/* 0x001fc800078e0216 */
/*0ae0*/ IMAD.WIDE R16, R5, c[0x0][0x178], R10 ; /* 0x00005e0005107a25 */
/* 0x000fe200078e020a */
/*0af0*/ DADD R24, R24, R26 ; /* 0x0000000018187229 */
/* 0x004086000000001a */
/*0b00*/ IMAD.WIDE R26, R5, c[0x0][0x178], R14 ; /* 0x00005e00051a7a25 */
/* 0x001fc800078e020e */
/*0b10*/ STG.E.64 [R12.64], R24 ; /* 0x000000180c007986 */
/* 0x0041e8000c101b04 */
/*0b20*/ LDG.E.64 R8, [R26.64] ; /* 0x000000041a087981 */
/* 0x000ea8000c1e1b00 */
/*0b30*/ LDG.E.64 R18, [R16.64] ; /* 0x0000000410127981 */
/* 0x000ea2000c1e1b00 */
/*0b40*/ IMAD.WIDE R20, R5, c[0x0][0x178], R12 ; /* 0x00005e0005147a25 */
/* 0x002fc800078e020c */
/*0b50*/ IMAD.WIDE R10, R5, c[0x0][0x178], R16 ; /* 0x00005e00050a7a25 */
/* 0x000fe200078e0210 */
/*0b60*/ DADD R18, R8, R18 ; /* 0x0000000008127229 */
/* 0x0042860000000012 */
/*0b70*/ IMAD.WIDE R8, R5, c[0x0][0x178], R26 ; /* 0x00005e0005087a25 */
/* 0x002fc800078e021a */
/*0b80*/ STG.E.64 [R20.64], R18 ; /* 0x0000001214007986 */
/* 0x0043e8000c101b04 */
/*0b90*/ LDG.E.64 R14, [R8.64] ; /* 0x00000004080e7981 */
/* 0x000ea8000c1e1b00 */
/*0ba0*/ LDG.E.64 R22, [R10.64] ; /* 0x000000040a167981 */
/* 0x000ea2000c1e1b00 */
/*0bb0*/ IMAD.WIDE R24, R5, c[0x0][0x178], R20 ; /* 0x00005e0005187a25 */
/* 0x001fc800078e0214 */
/*0bc0*/ IMAD.WIDE R16, R5, c[0x0][0x178], R8 ; /* 0x00005e0005107a25 */
/* 0x000fe200078e0208 */
/*0bd0*/ DADD R22, R14, R22 ; /* 0x000000000e167229 */
/* 0x0040860000000016 */
/*0be0*/ IMAD.WIDE R14, R5, c[0x0][0x178], R10 ; /* 0x00005e00050e7a25 */
/* 0x001fc800078e020a */
/*0bf0*/ STG.E.64 [R24.64], R22 ; /* 0x0000001618007986 */
/* 0x0041e8000c101b04 */
/*0c00*/ LDG.E.64 R26, [R14.64] ; /* 0x000000040e1a7981 */
/* 0x000ea8000c1e1b00 */
/*0c10*/ LDG.E.64 R12, [R16.64] ; /* 0x00000004100c7981 */
/* 0x000ea2000c1e1b00 */
/*0c20*/ IMAD.WIDE R18, R5, c[0x0][0x178], R24 ; /* 0x00005e0005127a25 */
/* 0x002fe200078e0218 */
/*0c30*/ PLOP3.LUT P0, PT, PT, PT, PT, 0x8, 0x0 ; /* 0x000000000000781c */
/* 0x000fc40003f0e170 */
/*0c40*/ IADD3 R7, R7, 0x8, RZ ; /* 0x0000000807077810 */
/* 0x000fe20007ffe0ff */
/*0c50*/ IMAD.WIDE R10, R5, c[0x0][0x178], R16 ; /* 0x00005e00050a7a25 */
/* 0x000fe200078e0210 */
/*0c60*/ IADD3 R3, R3, -0x8, RZ ; /* 0xfffffff803037810 */
/* 0x000fc60007ffe0ff */
/*0c70*/ IMAD.WIDE R8, R5, c[0x0][0x178], R18 ; /* 0x00005e0005087a25 */
/* 0x000fe200078e0212 */
/*0c80*/ DADD R26, R12, R26 ; /* 0x000000000c1a7229 */
/* 0x004286000000001a */
/*0c90*/ IMAD.WIDE R12, R5, c[0x0][0x178], R14 ; /* 0x00005e00050c7a25 */
/* 0x002fc800078e020e */
/*0ca0*/ STG.E.64 [R18.64], R26 ; /* 0x0000001a12007986 */
/* 0x0041e8000c101b04 */
/*0cb0*/ ISETP.NE.OR P0, PT, R3, RZ, P0 ; /* 0x000000ff0300720c */
/* 0x000fda0000705670 */
/*0cc0*/ @!P0 BRA 0xed0 ; /* 0x0000020000008947 */
/* 0x000fea0003800000 */
/*0cd0*/ LDG.E.64 R14, [R10.64] ; /* 0x000000040a0e7981 */
/* 0x000ea8000c1e1b00 */
/*0ce0*/ LDG.E.64 R16, [R12.64] ; /* 0x000000040c107981 */
/* 0x001ea2000c1e1b00 */
/*0cf0*/ IMAD.WIDE R24, R5, c[0x0][0x178], R10 ; /* 0x00005e0005187a25 */
/* 0x000fc800078e020a */
/*0d00*/ IMAD.WIDE R22, R5, c[0x0][0x178], R12 ; /* 0x00005e0005167a25 */
/* 0x000fe200078e020c */
/*0d10*/ DADD R16, R14, R16 ; /* 0x000000000e107229 */
/* 0x004e0e0000000010 */
/*0d20*/ STG.E.64 [R8.64], R16 ; /* 0x0000001008007986 */
/* 0x0011e8000c101b04 */
/*0d30*/ LDG.E.64 R14, [R24.64] ; /* 0x00000004180e7981 */
/* 0x000ea8000c1e1b00 */
/*0d40*/ LDG.E.64 R18, [R22.64] ; /* 0x0000000416127981 */
/* 0x000ea2000c1e1b00 */
/*0d50*/ IMAD.WIDE R26, R5, c[0x0][0x178], R8 ; /* 0x00005e00051a7a25 */
/* 0x000fc800078e0208 */
/*0d60*/ IMAD.WIDE R28, R5, c[0x0][0x178], R22 ; /* 0x00005e00051c7a25 */
/* 0x000fe200078e0216 */
/*0d70*/ DADD R18, R14, R18 ; /* 0x000000000e127229 */
/* 0x0042860000000012 */
/*0d80*/ IMAD.WIDE R14, R5, c[0x0][0x178], R24 ; /* 0x00005e00050e7a25 */
/* 0x002fc800078e0218 */
/*0d90*/ STG.E.64 [R26.64], R18 ; /* 0x000000121a007986 */
/* 0x0043e8000c101b04 */
/*0da0*/ LDG.E.64 R10, [R14.64] ; /* 0x000000040e0a7981 */
/* 0x0004e8000c1e1b00 */
/*0db0*/ LDG.E.64 R12, [R28.64] ; /* 0x000000041c0c7981 */
/* 0x000ee2000c1e1b00 */
/*0dc0*/ IMAD.WIDE R24, R5, c[0x0][0x178], R26 ; /* 0x00005e0005187a25 */
/* 0x000fc800078e021a */
/*0dd0*/ IMAD.WIDE R16, R5, c[0x0][0x178], R28 ; /* 0x00005e0005107a25 */
/* 0x001fc800078e021c */
/*0de0*/ IMAD.WIDE R14, R5, c[0x0][0x178], R14 ; /* 0x00005e00050e7a25 */
/* 0x004fe200078e020e */
/*0df0*/ DADD R20, R10, R12 ; /* 0x000000000a147229 */
/* 0x008e0e000000000c */
/*0e00*/ STG.E.64 [R24.64], R20 ; /* 0x0000001418007986 */
/* 0x0011e8000c101b04 */
/*0e10*/ LDG.E.64 R10, [R16.64] ; /* 0x00000004100a7981 */
/* 0x000ea8000c1e1b00 */
/*0e20*/ LDG.E.64 R8, [R14.64] ; /* 0x000000040e087981 */
/* 0x000ea2000c1e1b00 */
/*0e30*/ IADD3 R3, R3, -0x4, RZ ; /* 0xfffffffc03037810 */
/* 0x000fe20007ffe0ff */
/*0e40*/ IMAD.WIDE R18, R5, c[0x0][0x178], R24 ; /* 0x00005e0005127a25 */
/* 0x002fe200078e0218 */
/*0e50*/ IADD3 R7, R7, 0x4, RZ ; /* 0x0000000407077810 */
/* 0x000fc40007ffe0ff */
/*0e60*/ ISETP.NE.AND P0, PT, R3, RZ, PT ; /* 0x000000ff0300720c */
/* 0x000fe20003f05270 */
/*0e70*/ IMAD.WIDE R12, R5, c[0x0][0x178], R16 ; /* 0x00005e00050c7a25 */
/* 0x000fe200078e0210 */
/*0e80*/ DADD R22, R8, R10 ; /* 0x0000000008167229 */
/* 0x004286000000000a */
/*0e90*/ IMAD.WIDE R10, R5, c[0x0][0x178], R14 ; /* 0x00005e00050a7a25 */
/* 0x002fc800078e020e */
/*0ea0*/ IMAD.WIDE R8, R5, c[0x0][0x178], R18 ; /* 0x00005e0005087a25 */
/* 0x000fe200078e0212 */
/*0eb0*/ STG.E.64 [R18.64], R22 ; /* 0x0000001612007986 */
/* 0x0041e6000c101b04 */
/*0ec0*/ @P0 BRA 0xcd0 ; /* 0xfffffe0000000947 */
/* 0x001fea000383ffff */
/*0ed0*/ ISETP.NE.AND P0, PT, R2, RZ, PT ; /* 0x000000ff0200720c */
/* 0x000fda0003f05270 */
/*0ee0*/ @!P0 EXIT ; /* 0x000000000000894d */
/* 0x000fea0003800000 */
/*0ef0*/ MOV R3, 0x8 ; /* 0x0000000800037802 */
/* 0x000fe20000000f00 */
/*0f00*/ IMAD R0, R7, c[0x0][0x178], R0 ; /* 0x00005e0007007a24 */
/* 0x000fc800078e0200 */
/*0f10*/ IMAD.WIDE R4, R0, R3, c[0x0][0x170] ; /* 0x00005c0000047625 */
/* 0x000fc800078e0203 */
/*0f20*/ IMAD.WIDE R6, R0, R3, c[0x0][0x168] ; /* 0x00005a0000067625 */
/* 0x000fc800078e0203 */
/*0f30*/ IMAD.WIDE R8, R0, R3, c[0x0][0x160] ; /* 0x0000580000087625 */
/* 0x000fc800078e0203 */
/*0f40*/ LDG.E.64 R10, [R6.64] ; /* 0x00000004060a7981 */
/* 0x0002a8000c1e1b00 */
/*0f50*/ LDG.E.64 R12, [R8.64] ; /* 0x00000004080c7981 */
/* 0x0006a2000c1e1b00 */
/*0f60*/ IADD3 R2, R2, -0x1, RZ ; /* 0xffffffff02027810 */
/* 0x000fc80007ffe0ff */
/*0f70*/ ISETP.NE.AND P0, PT, R2, RZ, PT ; /* 0x000000ff0200720c */
/* 0x000fe20003f05270 */
/*0f80*/ IMAD.WIDE R6, R3, c[0x0][0x178], R6 ; /* 0x00005e0003067a25 */
/* 0x002fc800078e0206 */
/*0f90*/ IMAD.WIDE R8, R3, c[0x0][0x178], R8 ; /* 0x00005e0003087a25 */
/* 0x008fe200078e0208 */
/*0fa0*/ DADD R10, R10, R12 ; /* 0x000000000a0a7229 */
/* 0x004e4e000000000c */
/*0fb0*/ STG.E.64 [R4.64], R10 ; /* 0x0000000a04007986 */
/* 0x0023e4000c101b04 */
/*0fc0*/ IMAD.WIDE R4, R3, c[0x0][0x178], R4 ; /* 0x00005e0003047a25 */
/* 0x002fe200078e0204 */
/*0fd0*/ @P0 BRA 0xf40 ; /* 0xffffff6000000947 */
/* 0x000fea000383ffff */
/*0fe0*/ EXIT ; /* 0x000000000000794d */
/* 0x000fea0003800000 */
/*0ff0*/ BRA 0xff0; /* 0xfffffff000007947 */
/* 0x000fc0000383ffff */
/*1000*/ NOP; /* 0x0000000000007918 */
/* 0x000fc00000000000 */
/*1010*/ NOP; /* 0x0000000000007918 */
/* 0x000fc00000000000 */
/*1020*/ NOP; /* 0x0000000000007918 */
/* 0x000fc00000000000 */
/*1030*/ NOP; /* 0x0000000000007918 */
/* 0x000fc00000000000 */
/*1040*/ NOP; /* 0x0000000000007918 */
/* 0x000fc00000000000 */
/*1050*/ NOP; /* 0x0000000000007918 */
/* 0x000fc00000000000 */
/*1060*/ NOP; /* 0x0000000000007918 */
/* 0x000fc00000000000 */
/*1070*/ NOP; /* 0x0000000000007918 */
/* 0x000fc00000000000 */
.......... | .text
.amdgcn_target "amdgcn-amd-amdhsa--gfx1100"
.protected _Z21addOneColumnPerThreadPdS_S_i
.globl _Z21addOneColumnPerThreadPdS_S_i
.p2align 8
.type _Z21addOneColumnPerThreadPdS_S_i,@function
_Z21addOneColumnPerThreadPdS_S_i:
s_clause 0x1
s_load_b32 s3, s[0:1], 0x2c
s_load_b32 s2, s[0:1], 0x18
s_waitcnt lgkmcnt(0)
s_and_b32 s3, s3, 0xffff
s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
v_mad_u64_u32 v[1:2], null, s15, s3, v[0:1]
s_mov_b32 s3, exec_lo
v_max_i32_e32 v0, 0, v1
s_delay_alu instid0(VALU_DEP_1)
v_cmpx_gt_i32_e64 s2, v0
s_cbranch_execz .LBB0_3
s_clause 0x1
s_load_b128 s[4:7], s[0:1], 0x0
s_load_b64 s[0:1], s[0:1], 0x10
s_mov_b32 s3, s2
.p2align 6
.LBB0_2:
v_ashrrev_i32_e32 v2, 31, v1
s_add_i32 s3, s3, -1
s_delay_alu instid0(SALU_CYCLE_1) | instskip(NEXT) | instid1(VALU_DEP_1)
s_cmp_lg_u32 s3, 0
v_lshlrev_b64 v[2:3], 3, v[1:2]
v_add_nc_u32_e32 v1, s2, v1
s_waitcnt lgkmcnt(0)
s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_3)
v_add_co_u32 v4, vcc_lo, s4, v2
v_add_co_ci_u32_e32 v5, vcc_lo, s5, v3, vcc_lo
v_add_co_u32 v6, vcc_lo, s6, v2
v_add_co_ci_u32_e32 v7, vcc_lo, s7, v3, vcc_lo
v_add_co_u32 v2, vcc_lo, s0, v2
global_load_b64 v[4:5], v[4:5], off
global_load_b64 v[6:7], v[6:7], off
v_add_co_ci_u32_e32 v3, vcc_lo, s1, v3, vcc_lo
s_waitcnt vmcnt(0)
v_add_f64 v[4:5], v[4:5], v[6:7]
global_store_b64 v[2:3], v[4:5], off
s_cbranch_scc1 .LBB0_2
.LBB0_3:
s_nop 0
s_sendmsg sendmsg(MSG_DEALLOC_VGPRS)
s_endpgm
.section .rodata,"a",@progbits
.p2align 6, 0x0
.amdhsa_kernel _Z21addOneColumnPerThreadPdS_S_i
.amdhsa_group_segment_fixed_size 0
.amdhsa_private_segment_fixed_size 0
.amdhsa_kernarg_size 288
.amdhsa_user_sgpr_count 15
.amdhsa_user_sgpr_dispatch_ptr 0
.amdhsa_user_sgpr_queue_ptr 0
.amdhsa_user_sgpr_kernarg_segment_ptr 1
.amdhsa_user_sgpr_dispatch_id 0
.amdhsa_user_sgpr_private_segment_size 0
.amdhsa_wavefront_size32 1
.amdhsa_uses_dynamic_stack 0
.amdhsa_enable_private_segment 0
.amdhsa_system_sgpr_workgroup_id_x 1
.amdhsa_system_sgpr_workgroup_id_y 0
.amdhsa_system_sgpr_workgroup_id_z 0
.amdhsa_system_sgpr_workgroup_info 0
.amdhsa_system_vgpr_workitem_id 0
.amdhsa_next_free_vgpr 8
.amdhsa_next_free_sgpr 16
.amdhsa_float_round_mode_32 0
.amdhsa_float_round_mode_16_64 0
.amdhsa_float_denorm_mode_32 3
.amdhsa_float_denorm_mode_16_64 3
.amdhsa_dx10_clamp 1
.amdhsa_ieee_mode 1
.amdhsa_fp16_overflow 0
.amdhsa_workgroup_processor_mode 1
.amdhsa_memory_ordered 1
.amdhsa_forward_progress 0
.amdhsa_shared_vgpr_count 0
.amdhsa_exception_fp_ieee_invalid_op 0
.amdhsa_exception_fp_denorm_src 0
.amdhsa_exception_fp_ieee_div_zero 0
.amdhsa_exception_fp_ieee_overflow 0
.amdhsa_exception_fp_ieee_underflow 0
.amdhsa_exception_fp_ieee_inexact 0
.amdhsa_exception_int_div_zero 0
.end_amdhsa_kernel
.text
.Lfunc_end0:
.size _Z21addOneColumnPerThreadPdS_S_i, .Lfunc_end0-_Z21addOneColumnPerThreadPdS_S_i
.section .AMDGPU.csdata,"",@progbits
.text
.p2alignl 7, 3214868480
.fill 96, 4, 3214868480
.type __hip_cuid_,@object
.section .bss,"aw",@nobits
.globl __hip_cuid_
__hip_cuid_:
.byte 0
.size __hip_cuid_, 1
.ident "AMD clang version 18.0.0git (https://github.com/RadeonOpenCompute/llvm-project roc-6.3.2 25012 e5bf7e55c91490b07c49d8960fa7983d864936c4)"
.section ".note.GNU-stack","",@progbits
.addrsig
.addrsig_sym __hip_cuid_
.amdgpu_metadata
---
amdhsa.kernels:
- .args:
- .address_space: global
.offset: 0
.size: 8
.value_kind: global_buffer
- .address_space: global
.offset: 8
.size: 8
.value_kind: global_buffer
- .address_space: global
.offset: 16
.size: 8
.value_kind: global_buffer
- .offset: 24
.size: 4
.value_kind: by_value
- .offset: 32
.size: 4
.value_kind: hidden_block_count_x
- .offset: 36
.size: 4
.value_kind: hidden_block_count_y
- .offset: 40
.size: 4
.value_kind: hidden_block_count_z
- .offset: 44
.size: 2
.value_kind: hidden_group_size_x
- .offset: 46
.size: 2
.value_kind: hidden_group_size_y
- .offset: 48
.size: 2
.value_kind: hidden_group_size_z
- .offset: 50
.size: 2
.value_kind: hidden_remainder_x
- .offset: 52
.size: 2
.value_kind: hidden_remainder_y
- .offset: 54
.size: 2
.value_kind: hidden_remainder_z
- .offset: 72
.size: 8
.value_kind: hidden_global_offset_x
- .offset: 80
.size: 8
.value_kind: hidden_global_offset_y
- .offset: 88
.size: 8
.value_kind: hidden_global_offset_z
- .offset: 96
.size: 2
.value_kind: hidden_grid_dims
.group_segment_fixed_size: 0
.kernarg_segment_align: 8
.kernarg_segment_size: 288
.language: OpenCL C
.language_version:
- 2
- 0
.max_flat_workgroup_size: 1024
.name: _Z21addOneColumnPerThreadPdS_S_i
.private_segment_fixed_size: 0
.sgpr_count: 18
.sgpr_spill_count: 0
.symbol: _Z21addOneColumnPerThreadPdS_S_i.kd
.uniform_work_group_size: 1
.uses_dynamic_stack: false
.vgpr_count: 8
.vgpr_spill_count: 0
.wavefront_size: 32
.workgroup_processor_mode: 1
amdhsa.target: amdgcn-amd-amdhsa--gfx1100
amdhsa.version:
- 1
- 2
...
.end_amdgpu_metadata |
You are a helpful coding assistant specialized in converting from CUDA host assembly to AMD host assembly. | .file "tmpxft_0006c2cd_00000000-6_addOneColumnPerThread.cudafe1.cpp"
.text
#APP
#NO_APP
.type _ZL26__cudaUnregisterBinaryUtilv, @function
_ZL26__cudaUnregisterBinaryUtilv:
.LFB2029:
.cfi_startproc
endbr64
subq $8, %rsp
.cfi_def_cfa_offset 16
movq _ZL20__cudaFatCubinHandle(%rip), %rdi
call __cudaUnregisterFatBinary@PLT
addq $8, %rsp
.cfi_def_cfa_offset 8
ret
.cfi_endproc
.LFE2029:
.size _ZL26__cudaUnregisterBinaryUtilv, .-_ZL26__cudaUnregisterBinaryUtilv
.globl _Z46__device_stub__Z21addOneColumnPerThreadPdS_S_iPdS_S_i
.type _Z46__device_stub__Z21addOneColumnPerThreadPdS_S_iPdS_S_i, @function
_Z46__device_stub__Z21addOneColumnPerThreadPdS_S_iPdS_S_i:
.LFB2051:
.cfi_startproc
endbr64
subq $152, %rsp
.cfi_def_cfa_offset 160
movq %rdi, 24(%rsp)
movq %rsi, 16(%rsp)
movq %rdx, 8(%rsp)
movl %ecx, 4(%rsp)
movq %fs:40, %rax
movq %rax, 136(%rsp)
xorl %eax, %eax
leaq 24(%rsp), %rax
movq %rax, 96(%rsp)
leaq 16(%rsp), %rax
movq %rax, 104(%rsp)
leaq 8(%rsp), %rax
movq %rax, 112(%rsp)
leaq 4(%rsp), %rax
movq %rax, 120(%rsp)
movl $1, 48(%rsp)
movl $1, 52(%rsp)
movl $1, 56(%rsp)
movl $1, 60(%rsp)
movl $1, 64(%rsp)
movl $1, 68(%rsp)
leaq 40(%rsp), %rcx
leaq 32(%rsp), %rdx
leaq 60(%rsp), %rsi
leaq 48(%rsp), %rdi
call __cudaPopCallConfiguration@PLT
testl %eax, %eax
je .L7
.L3:
movq 136(%rsp), %rax
subq %fs:40, %rax
jne .L8
addq $152, %rsp
.cfi_remember_state
.cfi_def_cfa_offset 8
ret
.L7:
.cfi_restore_state
pushq 40(%rsp)
.cfi_def_cfa_offset 168
pushq 40(%rsp)
.cfi_def_cfa_offset 176
leaq 112(%rsp), %r9
movq 76(%rsp), %rcx
movl 84(%rsp), %r8d
movq 64(%rsp), %rsi
movl 72(%rsp), %edx
leaq _Z21addOneColumnPerThreadPdS_S_i(%rip), %rdi
call cudaLaunchKernel@PLT
addq $16, %rsp
.cfi_def_cfa_offset 160
jmp .L3
.L8:
call __stack_chk_fail@PLT
.cfi_endproc
.LFE2051:
.size _Z46__device_stub__Z21addOneColumnPerThreadPdS_S_iPdS_S_i, .-_Z46__device_stub__Z21addOneColumnPerThreadPdS_S_iPdS_S_i
.globl _Z21addOneColumnPerThreadPdS_S_i
.type _Z21addOneColumnPerThreadPdS_S_i, @function
_Z21addOneColumnPerThreadPdS_S_i:
.LFB2052:
.cfi_startproc
endbr64
subq $8, %rsp
.cfi_def_cfa_offset 16
call _Z46__device_stub__Z21addOneColumnPerThreadPdS_S_iPdS_S_i
addq $8, %rsp
.cfi_def_cfa_offset 8
ret
.cfi_endproc
.LFE2052:
.size _Z21addOneColumnPerThreadPdS_S_i, .-_Z21addOneColumnPerThreadPdS_S_i
.section .rodata.str1.8,"aMS",@progbits,1
.align 8
.LC0:
.string "_Z21addOneColumnPerThreadPdS_S_i"
.text
.type _ZL24__sti____cudaRegisterAllv, @function
_ZL24__sti____cudaRegisterAllv:
.LFB2054:
.cfi_startproc
endbr64
subq $8, %rsp
.cfi_def_cfa_offset 16
leaq _ZL15__fatDeviceText(%rip), %rdi
call __cudaRegisterFatBinary@PLT
movq %rax, %rdi
movq %rax, _ZL20__cudaFatCubinHandle(%rip)
pushq $0
.cfi_def_cfa_offset 24
pushq $0
.cfi_def_cfa_offset 32
pushq $0
.cfi_def_cfa_offset 40
pushq $0
.cfi_def_cfa_offset 48
movl $0, %r9d
movl $-1, %r8d
leaq .LC0(%rip), %rdx
movq %rdx, %rcx
leaq _Z21addOneColumnPerThreadPdS_S_i(%rip), %rsi
call __cudaRegisterFunction@PLT
addq $32, %rsp
.cfi_def_cfa_offset 16
movq _ZL20__cudaFatCubinHandle(%rip), %rdi
call __cudaRegisterFatBinaryEnd@PLT
leaq _ZL26__cudaUnregisterBinaryUtilv(%rip), %rdi
call atexit@PLT
addq $8, %rsp
.cfi_def_cfa_offset 8
ret
.cfi_endproc
.LFE2054:
.size _ZL24__sti____cudaRegisterAllv, .-_ZL24__sti____cudaRegisterAllv
.section .init_array,"aw"
.align 8
.quad _ZL24__sti____cudaRegisterAllv
.section .nvFatBinSegment,"aw"
.align 8
.type _ZL15__fatDeviceText, @object
.size _ZL15__fatDeviceText, 24
_ZL15__fatDeviceText:
.long 1180844977
.long 1
.quad fatbinData
.quad 0
.local _ZL20__cudaFatCubinHandle
.comm _ZL20__cudaFatCubinHandle,8,8
.ident "GCC: (Ubuntu 13.3.0-6ubuntu2~24.04) 13.3.0"
.section .note.GNU-stack,"",@progbits
.section .note.gnu.property,"a"
.align 8
.long 1f - 0f
.long 4f - 1f
.long 5
0:
.string "GNU"
1:
.align 8
.long 0xc0000002
.long 3f - 2f
2:
.long 0x3
3:
.align 8
4: | .text
.file "addOneColumnPerThread.hip"
.globl _Z36__device_stub__addOneColumnPerThreadPdS_S_i # -- Begin function _Z36__device_stub__addOneColumnPerThreadPdS_S_i
.p2align 4, 0x90
.type _Z36__device_stub__addOneColumnPerThreadPdS_S_i,@function
_Z36__device_stub__addOneColumnPerThreadPdS_S_i: # @_Z36__device_stub__addOneColumnPerThreadPdS_S_i
.cfi_startproc
# %bb.0:
subq $120, %rsp
.cfi_def_cfa_offset 128
movq %rdi, 72(%rsp)
movq %rsi, 64(%rsp)
movq %rdx, 56(%rsp)
movl %ecx, 4(%rsp)
leaq 72(%rsp), %rax
movq %rax, 80(%rsp)
leaq 64(%rsp), %rax
movq %rax, 88(%rsp)
leaq 56(%rsp), %rax
movq %rax, 96(%rsp)
leaq 4(%rsp), %rax
movq %rax, 104(%rsp)
leaq 40(%rsp), %rdi
leaq 24(%rsp), %rsi
leaq 16(%rsp), %rdx
leaq 8(%rsp), %rcx
callq __hipPopCallConfiguration
movq 40(%rsp), %rsi
movl 48(%rsp), %edx
movq 24(%rsp), %rcx
movl 32(%rsp), %r8d
leaq 80(%rsp), %r9
movl $_Z21addOneColumnPerThreadPdS_S_i, %edi
pushq 8(%rsp)
.cfi_adjust_cfa_offset 8
pushq 24(%rsp)
.cfi_adjust_cfa_offset 8
callq hipLaunchKernel
addq $136, %rsp
.cfi_adjust_cfa_offset -136
retq
.Lfunc_end0:
.size _Z36__device_stub__addOneColumnPerThreadPdS_S_i, .Lfunc_end0-_Z36__device_stub__addOneColumnPerThreadPdS_S_i
.cfi_endproc
# -- End function
.p2align 4, 0x90 # -- Begin function __hip_module_ctor
.type __hip_module_ctor,@function
__hip_module_ctor: # @__hip_module_ctor
.cfi_startproc
# %bb.0:
subq $40, %rsp
.cfi_def_cfa_offset 48
cmpq $0, __hip_gpubin_handle(%rip)
jne .LBB1_2
# %bb.1:
movl $__hip_fatbin_wrapper, %edi
callq __hipRegisterFatBinary
movq %rax, __hip_gpubin_handle(%rip)
.LBB1_2:
movq __hip_gpubin_handle(%rip), %rdi
xorps %xmm0, %xmm0
movups %xmm0, 16(%rsp)
movups %xmm0, (%rsp)
movl $_Z21addOneColumnPerThreadPdS_S_i, %esi
movl $.L__unnamed_1, %edx
movl $.L__unnamed_1, %ecx
movl $-1, %r8d
xorl %r9d, %r9d
callq __hipRegisterFunction
movl $__hip_module_dtor, %edi
addq $40, %rsp
.cfi_def_cfa_offset 8
jmp atexit # TAILCALL
.Lfunc_end1:
.size __hip_module_ctor, .Lfunc_end1-__hip_module_ctor
.cfi_endproc
# -- End function
.p2align 4, 0x90 # -- Begin function __hip_module_dtor
.type __hip_module_dtor,@function
__hip_module_dtor: # @__hip_module_dtor
.cfi_startproc
# %bb.0:
movq __hip_gpubin_handle(%rip), %rdi
testq %rdi, %rdi
je .LBB2_2
# %bb.1:
pushq %rax
.cfi_def_cfa_offset 16
callq __hipUnregisterFatBinary
movq $0, __hip_gpubin_handle(%rip)
addq $8, %rsp
.cfi_def_cfa_offset 8
.LBB2_2:
retq
.Lfunc_end2:
.size __hip_module_dtor, .Lfunc_end2-__hip_module_dtor
.cfi_endproc
# -- End function
.type _Z21addOneColumnPerThreadPdS_S_i,@object # @_Z21addOneColumnPerThreadPdS_S_i
.section .rodata,"a",@progbits
.globl _Z21addOneColumnPerThreadPdS_S_i
.p2align 3, 0x0
_Z21addOneColumnPerThreadPdS_S_i:
.quad _Z36__device_stub__addOneColumnPerThreadPdS_S_i
.size _Z21addOneColumnPerThreadPdS_S_i, 8
.type .L__unnamed_1,@object # @0
.section .rodata.str1.1,"aMS",@progbits,1
.L__unnamed_1:
.asciz "_Z21addOneColumnPerThreadPdS_S_i"
.size .L__unnamed_1, 33
.type __hip_fatbin_wrapper,@object # @__hip_fatbin_wrapper
.section .hipFatBinSegment,"a",@progbits
.p2align 3, 0x0
__hip_fatbin_wrapper:
.long 1212764230 # 0x48495046
.long 1 # 0x1
.quad __hip_fatbin
.quad 0
.size __hip_fatbin_wrapper, 24
.type __hip_gpubin_handle,@object # @__hip_gpubin_handle
.local __hip_gpubin_handle
.comm __hip_gpubin_handle,8,8
.section .init_array,"aw",@init_array
.p2align 3, 0x0
.quad __hip_module_ctor
.type __hip_cuid_,@object # @__hip_cuid_
.bss
.globl __hip_cuid_
__hip_cuid_:
.byte 0 # 0x0
.size __hip_cuid_, 1
.section ".linker-options","e",@llvm_linker_options
.ident "AMD clang version 18.0.0git (https://github.com/RadeonOpenCompute/llvm-project roc-6.3.2 25012 e5bf7e55c91490b07c49d8960fa7983d864936c4)"
.section ".note.GNU-stack","",@progbits
.addrsig
.addrsig_sym _Z36__device_stub__addOneColumnPerThreadPdS_S_i
.addrsig_sym __hip_module_ctor
.addrsig_sym __hip_module_dtor
.addrsig_sym _Z21addOneColumnPerThreadPdS_S_i
.addrsig_sym __hip_fatbin
.addrsig_sym __hip_fatbin_wrapper
.addrsig_sym __hip_cuid_ |
You are a helpful coding assistant specialized in converting CUDA source code to CUDA device assembly. | #include "includes.h"
__global__ void saturate(unsigned int *bins, unsigned int num_bins) {
//@@If the bin value is more than 127, make it equal to 127
for (int i = 0; i < NUM_BINS / BLOCK_SIZE; ++i)
if (bins[threadIdx.x + blockDim.x*i] >= 128)
bins[threadIdx.x + blockDim.x*i] = 127;
} | code for sm_80
Function : _Z8saturatePjj
.headerflags @"EF_CUDA_TEXMODE_UNIFIED EF_CUDA_64BIT_ADDRESS EF_CUDA_SM80 EF_CUDA_VIRTUAL_SM(EF_CUDA_SM80)"
/*0000*/ IMAD.MOV.U32 R1, RZ, RZ, c[0x0][0x28] ; /* 0x00000a00ff017624 */
/* 0x000fe400078e00ff */
/*0010*/ S2R R7, SR_TID.X ; /* 0x0000000000077919 */
/* 0x000e220000002100 */
/*0020*/ IMAD.MOV.U32 R0, RZ, RZ, 0x4 ; /* 0x00000004ff007424 */
/* 0x000fe200078e00ff */
/*0030*/ ULDC.64 UR4, c[0x0][0x118] ; /* 0x0000460000047ab9 */
/* 0x000fc60000000a00 */
/*0040*/ IMAD.WIDE.U32 R2, R7, R0, c[0x0][0x160] ; /* 0x0000580007027625 */
/* 0x001fca00078e0000 */
/*0050*/ LDG.E R4, [R2.64] ; /* 0x0000000402047981 */
/* 0x000ea2000c1e1900 */
/*0060*/ IADD3 R7, R7, c[0x0][0x0], RZ ; /* 0x0000000007077a10 */
/* 0x000fe40007ffe0ff */
/*0070*/ ISETP.GE.U32.AND P0, PT, R4, 0x80, PT ; /* 0x000000800400780c */
/* 0x004fc60003f06070 */
/*0080*/ IMAD.WIDE.U32 R4, R7, R0, c[0x0][0x160] ; /* 0x0000580007047625 */
/* 0x000fd400078e0000 */
/*0090*/ @P0 IMAD.MOV.U32 R11, RZ, RZ, 0x7f ; /* 0x0000007fff0b0424 */
/* 0x000fca00078e00ff */
/*00a0*/ @P0 STG.E [R2.64], R11 ; /* 0x0000000b02000986 */
/* 0x0001e8000c101904 */
/*00b0*/ LDG.E R6, [R4.64] ; /* 0x0000000404067981 */
/* 0x000ea2000c1e1900 */
/*00c0*/ IADD3 R9, R7, c[0x0][0x0], RZ ; /* 0x0000000007097a10 */
/* 0x000fe40007ffe0ff */
/*00d0*/ ISETP.GE.U32.AND P0, PT, R6, 0x80, PT ; /* 0x000000800600780c */
/* 0x004fc60003f06070 */
/*00e0*/ IMAD.WIDE.U32 R6, R9, R0, c[0x0][0x160] ; /* 0x0000580009067625 */
/* 0x000fd400078e0000 */
/*00f0*/ @P0 MOV R13, 0x7f ; /* 0x0000007f000d0802 */
/* 0x000fca0000000f00 */
/*0100*/ @P0 STG.E [R4.64], R13 ; /* 0x0000000d04000986 */
/* 0x0003e8000c101904 */
/*0110*/ LDG.E R8, [R6.64] ; /* 0x0000000406087981 */
/* 0x000ea2000c1e1900 */
/*0120*/ IADD3 R9, R9, c[0x0][0x0], RZ ; /* 0x0000000009097a10 */
/* 0x000fca0007ffe0ff */
/*0130*/ IMAD.WIDE.U32 R2, R9, R0, c[0x0][0x160] ; /* 0x0000580009027625 */
/* 0x001fe200078e0000 */
/*0140*/ ISETP.GE.U32.AND P0, PT, R8, 0x80, PT ; /* 0x000000800800780c */
/* 0x004fda0003f06070 */
/*0150*/ @P0 IMAD.MOV.U32 R15, RZ, RZ, 0x7f ; /* 0x0000007fff0f0424 */
/* 0x000fca00078e00ff */
/*0160*/ @P0 STG.E [R6.64], R15 ; /* 0x0000000f06000986 */
/* 0x0001e8000c101904 */
/*0170*/ LDG.E R8, [R2.64] ; /* 0x0000000402087981 */
/* 0x000ea2000c1e1900 */
/*0180*/ IADD3 R9, R9, c[0x0][0x0], RZ ; /* 0x0000000009097a10 */
/* 0x000fca0007ffe0ff */
/*0190*/ IMAD.WIDE.U32 R4, R9, R0, c[0x0][0x160] ; /* 0x0000580009047625 */
/* 0x002fe200078e0000 */
/*01a0*/ ISETP.GE.U32.AND P0, PT, R8, 0x80, PT ; /* 0x000000800800780c */
/* 0x004fda0003f06070 */
/*01b0*/ @P0 IMAD.MOV.U32 R11, RZ, RZ, 0x7f ; /* 0x0000007fff0b0424 */
/* 0x000fca00078e00ff */
/*01c0*/ @P0 STG.E [R2.64], R11 ; /* 0x0000000b02000986 */
/* 0x0003e8000c101904 */
/*01d0*/ LDG.E R8, [R4.64] ; /* 0x0000000404087981 */
/* 0x000ea2000c1e1900 */
/*01e0*/ IADD3 R9, R9, c[0x0][0x0], RZ ; /* 0x0000000009097a10 */
/* 0x000fca0007ffe0ff */
/*01f0*/ IMAD.WIDE.U32 R6, R9, R0, c[0x0][0x160] ; /* 0x0000580009067625 */
/* 0x001fe200078e0000 */
/*0200*/ ISETP.GE.U32.AND P0, PT, R8, 0x80, PT ; /* 0x000000800800780c */
/* 0x004fda0003f06070 */
/*0210*/ @P0 MOV R13, 0x7f ; /* 0x0000007f000d0802 */
/* 0x000fca0000000f00 */
/*0220*/ @P0 STG.E [R4.64], R13 ; /* 0x0000000d04000986 */
/* 0x0001e8000c101904 */
/*0230*/ LDG.E R8, [R6.64] ; /* 0x0000000406087981 */
/* 0x000ea2000c1e1900 */
/*0240*/ IADD3 R9, R9, c[0x0][0x0], RZ ; /* 0x0000000009097a10 */
/* 0x000fca0007ffe0ff */
/*0250*/ IMAD.WIDE.U32 R2, R9, R0, c[0x0][0x160] ; /* 0x0000580009027625 */
/* 0x002fe200078e0000 */
/*0260*/ ISETP.GE.U32.AND P0, PT, R8, 0x80, PT ; /* 0x000000800800780c */
/* 0x004fda0003f06070 */
/*0270*/ @P0 IMAD.MOV.U32 R15, RZ, RZ, 0x7f ; /* 0x0000007fff0f0424 */
/* 0x000fca00078e00ff */
/*0280*/ @P0 STG.E [R6.64], R15 ; /* 0x0000000f06000986 */
/* 0x0003e8000c101904 */
/*0290*/ LDG.E R8, [R2.64] ; /* 0x0000000402087981 */
/* 0x000ea2000c1e1900 */
/*02a0*/ IADD3 R9, R9, c[0x0][0x0], RZ ; /* 0x0000000009097a10 */
/* 0x000fca0007ffe0ff */
/*02b0*/ IMAD.WIDE.U32 R4, R9, R0, c[0x0][0x160] ; /* 0x0000580009047625 */
/* 0x001fe200078e0000 */
/*02c0*/ ISETP.GE.U32.AND P0, PT, R8, 0x80, PT ; /* 0x000000800800780c */
/* 0x004fda0003f06070 */
/*02d0*/ @P0 IMAD.MOV.U32 R11, RZ, RZ, 0x7f ; /* 0x0000007fff0b0424 */
/* 0x000fca00078e00ff */
/*02e0*/ @P0 STG.E [R2.64], R11 ; /* 0x0000000b02000986 */
/* 0x0003e8000c101904 */
/*02f0*/ LDG.E R0, [R4.64] ; /* 0x0000000404007981 */
/* 0x000ea4000c1e1900 */
/*0300*/ ISETP.GE.U32.AND P0, PT, R0, 0x80, PT ; /* 0x000000800000780c */
/* 0x004fda0003f06070 */
/*0310*/ @!P0 EXIT ; /* 0x000000000000894d */
/* 0x000fea0003800000 */
/*0320*/ HFMA2.MMA R3, -RZ, RZ, 0, 7.569789886474609375e-06 ; /* 0x0000007fff037435 */
/* 0x002fce00000001ff */
/*0330*/ STG.E [R4.64], R3 ; /* 0x0000000304007986 */
/* 0x000fe2000c101904 */
/*0340*/ EXIT ; /* 0x000000000000794d */
/* 0x000fea0003800000 */
/*0350*/ BRA 0x350; /* 0xfffffff000007947 */
/* 0x000fc0000383ffff */
/*0360*/ NOP; /* 0x0000000000007918 */
/* 0x000fc00000000000 */
/*0370*/ NOP; /* 0x0000000000007918 */
/* 0x000fc00000000000 */
/*0380*/ NOP; /* 0x0000000000007918 */
/* 0x000fc00000000000 */
/*0390*/ NOP; /* 0x0000000000007918 */
/* 0x000fc00000000000 */
/*03a0*/ NOP; /* 0x0000000000007918 */
/* 0x000fc00000000000 */
/*03b0*/ NOP; /* 0x0000000000007918 */
/* 0x000fc00000000000 */
/*03c0*/ NOP; /* 0x0000000000007918 */
/* 0x000fc00000000000 */
/*03d0*/ NOP; /* 0x0000000000007918 */
/* 0x000fc00000000000 */
/*03e0*/ NOP; /* 0x0000000000007918 */
/* 0x000fc00000000000 */
/*03f0*/ NOP; /* 0x0000000000007918 */
/* 0x000fc00000000000 */
.......... |
You are a helpful coding assistant specialized in converting CUDA source code to CUDA host assembly. | #include "includes.h"
__global__ void saturate(unsigned int *bins, unsigned int num_bins) {
//@@If the bin value is more than 127, make it equal to 127
for (int i = 0; i < NUM_BINS / BLOCK_SIZE; ++i)
if (bins[threadIdx.x + blockDim.x*i] >= 128)
bins[threadIdx.x + blockDim.x*i] = 127;
} | .file "tmpxft_0017357c_00000000-6_saturate.cudafe1.cpp"
.text
#APP
#NO_APP
.type _ZL26__cudaUnregisterBinaryUtilv, @function
_ZL26__cudaUnregisterBinaryUtilv:
.LFB2029:
.cfi_startproc
endbr64
subq $8, %rsp
.cfi_def_cfa_offset 16
movq _ZL20__cudaFatCubinHandle(%rip), %rdi
call __cudaUnregisterFatBinary@PLT
addq $8, %rsp
.cfi_def_cfa_offset 8
ret
.cfi_endproc
.LFE2029:
.size _ZL26__cudaUnregisterBinaryUtilv, .-_ZL26__cudaUnregisterBinaryUtilv
.globl _Z28__device_stub__Z8saturatePjjPjj
.type _Z28__device_stub__Z8saturatePjjPjj, @function
_Z28__device_stub__Z8saturatePjjPjj:
.LFB2051:
.cfi_startproc
endbr64
subq $120, %rsp
.cfi_def_cfa_offset 128
movq %rdi, 8(%rsp)
movl %esi, 4(%rsp)
movq %fs:40, %rax
movq %rax, 104(%rsp)
xorl %eax, %eax
leaq 8(%rsp), %rax
movq %rax, 80(%rsp)
leaq 4(%rsp), %rax
movq %rax, 88(%rsp)
movl $1, 32(%rsp)
movl $1, 36(%rsp)
movl $1, 40(%rsp)
movl $1, 44(%rsp)
movl $1, 48(%rsp)
movl $1, 52(%rsp)
leaq 24(%rsp), %rcx
leaq 16(%rsp), %rdx
leaq 44(%rsp), %rsi
leaq 32(%rsp), %rdi
call __cudaPopCallConfiguration@PLT
testl %eax, %eax
je .L7
.L3:
movq 104(%rsp), %rax
subq %fs:40, %rax
jne .L8
addq $120, %rsp
.cfi_remember_state
.cfi_def_cfa_offset 8
ret
.L7:
.cfi_restore_state
pushq 24(%rsp)
.cfi_def_cfa_offset 136
pushq 24(%rsp)
.cfi_def_cfa_offset 144
leaq 96(%rsp), %r9
movq 60(%rsp), %rcx
movl 68(%rsp), %r8d
movq 48(%rsp), %rsi
movl 56(%rsp), %edx
leaq _Z8saturatePjj(%rip), %rdi
call cudaLaunchKernel@PLT
addq $16, %rsp
.cfi_def_cfa_offset 128
jmp .L3
.L8:
call __stack_chk_fail@PLT
.cfi_endproc
.LFE2051:
.size _Z28__device_stub__Z8saturatePjjPjj, .-_Z28__device_stub__Z8saturatePjjPjj
.globl _Z8saturatePjj
.type _Z8saturatePjj, @function
_Z8saturatePjj:
.LFB2052:
.cfi_startproc
endbr64
subq $8, %rsp
.cfi_def_cfa_offset 16
call _Z28__device_stub__Z8saturatePjjPjj
addq $8, %rsp
.cfi_def_cfa_offset 8
ret
.cfi_endproc
.LFE2052:
.size _Z8saturatePjj, .-_Z8saturatePjj
.section .rodata.str1.1,"aMS",@progbits,1
.LC0:
.string "_Z8saturatePjj"
.text
.type _ZL24__sti____cudaRegisterAllv, @function
_ZL24__sti____cudaRegisterAllv:
.LFB2054:
.cfi_startproc
endbr64
subq $8, %rsp
.cfi_def_cfa_offset 16
leaq _ZL15__fatDeviceText(%rip), %rdi
call __cudaRegisterFatBinary@PLT
movq %rax, %rdi
movq %rax, _ZL20__cudaFatCubinHandle(%rip)
pushq $0
.cfi_def_cfa_offset 24
pushq $0
.cfi_def_cfa_offset 32
pushq $0
.cfi_def_cfa_offset 40
pushq $0
.cfi_def_cfa_offset 48
movl $0, %r9d
movl $-1, %r8d
leaq .LC0(%rip), %rdx
movq %rdx, %rcx
leaq _Z8saturatePjj(%rip), %rsi
call __cudaRegisterFunction@PLT
addq $32, %rsp
.cfi_def_cfa_offset 16
movq _ZL20__cudaFatCubinHandle(%rip), %rdi
call __cudaRegisterFatBinaryEnd@PLT
leaq _ZL26__cudaUnregisterBinaryUtilv(%rip), %rdi
call atexit@PLT
addq $8, %rsp
.cfi_def_cfa_offset 8
ret
.cfi_endproc
.LFE2054:
.size _ZL24__sti____cudaRegisterAllv, .-_ZL24__sti____cudaRegisterAllv
.section .init_array,"aw"
.align 8
.quad _ZL24__sti____cudaRegisterAllv
.section .nvFatBinSegment,"aw"
.align 8
.type _ZL15__fatDeviceText, @object
.size _ZL15__fatDeviceText, 24
_ZL15__fatDeviceText:
.long 1180844977
.long 1
.quad fatbinData
.quad 0
.local _ZL20__cudaFatCubinHandle
.comm _ZL20__cudaFatCubinHandle,8,8
.ident "GCC: (Ubuntu 13.3.0-6ubuntu2~24.04) 13.3.0"
.section .note.GNU-stack,"",@progbits
.section .note.gnu.property,"a"
.align 8
.long 1f - 0f
.long 4f - 1f
.long 5
0:
.string "GNU"
1:
.align 8
.long 0xc0000002
.long 3f - 2f
2:
.long 0x3
3:
.align 8
4: |
You are a helpful coding assistant specialized in converting CUDA source code to HIP/AMD source code. | #include "includes.h"
__global__ void saturate(unsigned int *bins, unsigned int num_bins) {
//@@If the bin value is more than 127, make it equal to 127
for (int i = 0; i < NUM_BINS / BLOCK_SIZE; ++i)
if (bins[threadIdx.x + blockDim.x*i] >= 128)
bins[threadIdx.x + blockDim.x*i] = 127;
} | #include <hip/hip_runtime.h>
#include "includes.h"
__global__ void saturate(unsigned int *bins, unsigned int num_bins) {
//@@If the bin value is more than 127, make it equal to 127
for (int i = 0; i < NUM_BINS / BLOCK_SIZE; ++i)
if (bins[threadIdx.x + blockDim.x*i] >= 128)
bins[threadIdx.x + blockDim.x*i] = 127;
} |
You are a helpful coding assistant specialized in converting HIP source code to AMD device assembly. | #include <hip/hip_runtime.h>
#include "includes.h"
__global__ void saturate(unsigned int *bins, unsigned int num_bins) {
//@@If the bin value is more than 127, make it equal to 127
for (int i = 0; i < NUM_BINS / BLOCK_SIZE; ++i)
if (bins[threadIdx.x + blockDim.x*i] >= 128)
bins[threadIdx.x + blockDim.x*i] = 127;
} | .text
.amdgcn_target "amdgcn-amd-amdhsa--gfx1100"
.protected _Z8saturatePjj
.globl _Z8saturatePjj
.p2align 8
.type _Z8saturatePjj,@function
_Z8saturatePjj:
s_clause 0x1
s_load_b32 s2, s[0:1], 0x1c
s_load_b64 s[0:1], s[0:1], 0x0
v_lshlrev_b32_e32 v0, 2, v0
v_mov_b32_e32 v2, 0x7f
s_waitcnt lgkmcnt(0)
s_and_b32 s2, s2, 0xffff
s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
v_add_co_u32 v0, s0, s0, v0
v_add_co_ci_u32_e64 v1, null, s1, 0, s0
s_mov_b32 s0, 0
s_lshl_b32 s1, s2, 2
s_mov_b32 s2, 8
s_branch .LBB0_2
.LBB0_1:
s_or_b32 exec_lo, exec_lo, s3
v_add_co_u32 v0, vcc_lo, v0, s1
v_add_co_ci_u32_e32 v1, vcc_lo, s0, v1, vcc_lo
s_add_i32 s2, s2, -1
s_delay_alu instid0(SALU_CYCLE_1)
s_cmp_eq_u32 s2, 0
s_cbranch_scc1 .LBB0_4
.LBB0_2:
global_load_b32 v3, v[0:1], off
s_mov_b32 s3, exec_lo
s_waitcnt vmcnt(0)
v_cmpx_lt_u32_e32 0x7f, v3
s_cbranch_execz .LBB0_1
global_store_b32 v[0:1], v2, off
s_branch .LBB0_1
.LBB0_4:
s_nop 0
s_sendmsg sendmsg(MSG_DEALLOC_VGPRS)
s_endpgm
.section .rodata,"a",@progbits
.p2align 6, 0x0
.amdhsa_kernel _Z8saturatePjj
.amdhsa_group_segment_fixed_size 0
.amdhsa_private_segment_fixed_size 0
.amdhsa_kernarg_size 272
.amdhsa_user_sgpr_count 15
.amdhsa_user_sgpr_dispatch_ptr 0
.amdhsa_user_sgpr_queue_ptr 0
.amdhsa_user_sgpr_kernarg_segment_ptr 1
.amdhsa_user_sgpr_dispatch_id 0
.amdhsa_user_sgpr_private_segment_size 0
.amdhsa_wavefront_size32 1
.amdhsa_uses_dynamic_stack 0
.amdhsa_enable_private_segment 0
.amdhsa_system_sgpr_workgroup_id_x 1
.amdhsa_system_sgpr_workgroup_id_y 0
.amdhsa_system_sgpr_workgroup_id_z 0
.amdhsa_system_sgpr_workgroup_info 0
.amdhsa_system_vgpr_workitem_id 0
.amdhsa_next_free_vgpr 4
.amdhsa_next_free_sgpr 4
.amdhsa_float_round_mode_32 0
.amdhsa_float_round_mode_16_64 0
.amdhsa_float_denorm_mode_32 3
.amdhsa_float_denorm_mode_16_64 3
.amdhsa_dx10_clamp 1
.amdhsa_ieee_mode 1
.amdhsa_fp16_overflow 0
.amdhsa_workgroup_processor_mode 1
.amdhsa_memory_ordered 1
.amdhsa_forward_progress 0
.amdhsa_shared_vgpr_count 0
.amdhsa_exception_fp_ieee_invalid_op 0
.amdhsa_exception_fp_denorm_src 0
.amdhsa_exception_fp_ieee_div_zero 0
.amdhsa_exception_fp_ieee_overflow 0
.amdhsa_exception_fp_ieee_underflow 0
.amdhsa_exception_fp_ieee_inexact 0
.amdhsa_exception_int_div_zero 0
.end_amdhsa_kernel
.text
.Lfunc_end0:
.size _Z8saturatePjj, .Lfunc_end0-_Z8saturatePjj
.section .AMDGPU.csdata,"",@progbits
.text
.p2alignl 7, 3214868480
.fill 96, 4, 3214868480
.type __hip_cuid_,@object
.section .bss,"aw",@nobits
.globl __hip_cuid_
__hip_cuid_:
.byte 0
.size __hip_cuid_, 1
.ident "AMD clang version 18.0.0git (https://github.com/RadeonOpenCompute/llvm-project roc-6.3.2 25012 e5bf7e55c91490b07c49d8960fa7983d864936c4)"
.section ".note.GNU-stack","",@progbits
.addrsig
.addrsig_sym __hip_cuid_
.amdgpu_metadata
---
amdhsa.kernels:
- .args:
- .address_space: global
.offset: 0
.size: 8
.value_kind: global_buffer
- .offset: 8
.size: 4
.value_kind: by_value
- .offset: 16
.size: 4
.value_kind: hidden_block_count_x
- .offset: 20
.size: 4
.value_kind: hidden_block_count_y
- .offset: 24
.size: 4
.value_kind: hidden_block_count_z
- .offset: 28
.size: 2
.value_kind: hidden_group_size_x
- .offset: 30
.size: 2
.value_kind: hidden_group_size_y
- .offset: 32
.size: 2
.value_kind: hidden_group_size_z
- .offset: 34
.size: 2
.value_kind: hidden_remainder_x
- .offset: 36
.size: 2
.value_kind: hidden_remainder_y
- .offset: 38
.size: 2
.value_kind: hidden_remainder_z
- .offset: 56
.size: 8
.value_kind: hidden_global_offset_x
- .offset: 64
.size: 8
.value_kind: hidden_global_offset_y
- .offset: 72
.size: 8
.value_kind: hidden_global_offset_z
- .offset: 80
.size: 2
.value_kind: hidden_grid_dims
.group_segment_fixed_size: 0
.kernarg_segment_align: 8
.kernarg_segment_size: 272
.language: OpenCL C
.language_version:
- 2
- 0
.max_flat_workgroup_size: 1024
.name: _Z8saturatePjj
.private_segment_fixed_size: 0
.sgpr_count: 6
.sgpr_spill_count: 0
.symbol: _Z8saturatePjj.kd
.uniform_work_group_size: 1
.uses_dynamic_stack: false
.vgpr_count: 4
.vgpr_spill_count: 0
.wavefront_size: 32
.workgroup_processor_mode: 1
amdhsa.target: amdgcn-amd-amdhsa--gfx1100
amdhsa.version:
- 1
- 2
...
.end_amdgpu_metadata |
You are a helpful coding assistant specialized in converting HIP source code to AMD host assembly. | #include <hip/hip_runtime.h>
#include "includes.h"
__global__ void saturate(unsigned int *bins, unsigned int num_bins) {
//@@If the bin value is more than 127, make it equal to 127
for (int i = 0; i < NUM_BINS / BLOCK_SIZE; ++i)
if (bins[threadIdx.x + blockDim.x*i] >= 128)
bins[threadIdx.x + blockDim.x*i] = 127;
} | .text
.file "saturate.hip"
.globl _Z23__device_stub__saturatePjj # -- Begin function _Z23__device_stub__saturatePjj
.p2align 4, 0x90
.type _Z23__device_stub__saturatePjj,@function
_Z23__device_stub__saturatePjj: # @_Z23__device_stub__saturatePjj
.cfi_startproc
# %bb.0:
subq $88, %rsp
.cfi_def_cfa_offset 96
movq %rdi, 56(%rsp)
movl %esi, 4(%rsp)
leaq 56(%rsp), %rax
movq %rax, 64(%rsp)
leaq 4(%rsp), %rax
movq %rax, 72(%rsp)
leaq 40(%rsp), %rdi
leaq 24(%rsp), %rsi
leaq 16(%rsp), %rdx
leaq 8(%rsp), %rcx
callq __hipPopCallConfiguration
movq 40(%rsp), %rsi
movl 48(%rsp), %edx
movq 24(%rsp), %rcx
movl 32(%rsp), %r8d
leaq 64(%rsp), %r9
movl $_Z8saturatePjj, %edi
pushq 8(%rsp)
.cfi_adjust_cfa_offset 8
pushq 24(%rsp)
.cfi_adjust_cfa_offset 8
callq hipLaunchKernel
addq $104, %rsp
.cfi_adjust_cfa_offset -104
retq
.Lfunc_end0:
.size _Z23__device_stub__saturatePjj, .Lfunc_end0-_Z23__device_stub__saturatePjj
.cfi_endproc
# -- End function
.p2align 4, 0x90 # -- Begin function __hip_module_ctor
.type __hip_module_ctor,@function
__hip_module_ctor: # @__hip_module_ctor
.cfi_startproc
# %bb.0:
subq $40, %rsp
.cfi_def_cfa_offset 48
cmpq $0, __hip_gpubin_handle(%rip)
jne .LBB1_2
# %bb.1:
movl $__hip_fatbin_wrapper, %edi
callq __hipRegisterFatBinary
movq %rax, __hip_gpubin_handle(%rip)
.LBB1_2:
movq __hip_gpubin_handle(%rip), %rdi
xorps %xmm0, %xmm0
movups %xmm0, 16(%rsp)
movups %xmm0, (%rsp)
movl $_Z8saturatePjj, %esi
movl $.L__unnamed_1, %edx
movl $.L__unnamed_1, %ecx
movl $-1, %r8d
xorl %r9d, %r9d
callq __hipRegisterFunction
movl $__hip_module_dtor, %edi
addq $40, %rsp
.cfi_def_cfa_offset 8
jmp atexit # TAILCALL
.Lfunc_end1:
.size __hip_module_ctor, .Lfunc_end1-__hip_module_ctor
.cfi_endproc
# -- End function
.p2align 4, 0x90 # -- Begin function __hip_module_dtor
.type __hip_module_dtor,@function
__hip_module_dtor: # @__hip_module_dtor
.cfi_startproc
# %bb.0:
movq __hip_gpubin_handle(%rip), %rdi
testq %rdi, %rdi
je .LBB2_2
# %bb.1:
pushq %rax
.cfi_def_cfa_offset 16
callq __hipUnregisterFatBinary
movq $0, __hip_gpubin_handle(%rip)
addq $8, %rsp
.cfi_def_cfa_offset 8
.LBB2_2:
retq
.Lfunc_end2:
.size __hip_module_dtor, .Lfunc_end2-__hip_module_dtor
.cfi_endproc
# -- End function
.type _Z8saturatePjj,@object # @_Z8saturatePjj
.section .rodata,"a",@progbits
.globl _Z8saturatePjj
.p2align 3, 0x0
_Z8saturatePjj:
.quad _Z23__device_stub__saturatePjj
.size _Z8saturatePjj, 8
.type .L__unnamed_1,@object # @0
.section .rodata.str1.1,"aMS",@progbits,1
.L__unnamed_1:
.asciz "_Z8saturatePjj"
.size .L__unnamed_1, 15
.type __hip_fatbin_wrapper,@object # @__hip_fatbin_wrapper
.section .hipFatBinSegment,"a",@progbits
.p2align 3, 0x0
__hip_fatbin_wrapper:
.long 1212764230 # 0x48495046
.long 1 # 0x1
.quad __hip_fatbin
.quad 0
.size __hip_fatbin_wrapper, 24
.type __hip_gpubin_handle,@object # @__hip_gpubin_handle
.local __hip_gpubin_handle
.comm __hip_gpubin_handle,8,8
.section .init_array,"aw",@init_array
.p2align 3, 0x0
.quad __hip_module_ctor
.type __hip_cuid_,@object # @__hip_cuid_
.bss
.globl __hip_cuid_
__hip_cuid_:
.byte 0 # 0x0
.size __hip_cuid_, 1
.section ".linker-options","e",@llvm_linker_options
.ident "AMD clang version 18.0.0git (https://github.com/RadeonOpenCompute/llvm-project roc-6.3.2 25012 e5bf7e55c91490b07c49d8960fa7983d864936c4)"
.section ".note.GNU-stack","",@progbits
.addrsig
.addrsig_sym _Z23__device_stub__saturatePjj
.addrsig_sym __hip_module_ctor
.addrsig_sym __hip_module_dtor
.addrsig_sym _Z8saturatePjj
.addrsig_sym __hip_fatbin
.addrsig_sym __hip_fatbin_wrapper
.addrsig_sym __hip_cuid_ |
You are a helpful coding assistant specialized in converting from CUDA device assembly to AMD device assembly. | code for sm_80
Function : _Z8saturatePjj
.headerflags @"EF_CUDA_TEXMODE_UNIFIED EF_CUDA_64BIT_ADDRESS EF_CUDA_SM80 EF_CUDA_VIRTUAL_SM(EF_CUDA_SM80)"
/*0000*/ IMAD.MOV.U32 R1, RZ, RZ, c[0x0][0x28] ; /* 0x00000a00ff017624 */
/* 0x000fe400078e00ff */
/*0010*/ S2R R7, SR_TID.X ; /* 0x0000000000077919 */
/* 0x000e220000002100 */
/*0020*/ IMAD.MOV.U32 R0, RZ, RZ, 0x4 ; /* 0x00000004ff007424 */
/* 0x000fe200078e00ff */
/*0030*/ ULDC.64 UR4, c[0x0][0x118] ; /* 0x0000460000047ab9 */
/* 0x000fc60000000a00 */
/*0040*/ IMAD.WIDE.U32 R2, R7, R0, c[0x0][0x160] ; /* 0x0000580007027625 */
/* 0x001fca00078e0000 */
/*0050*/ LDG.E R4, [R2.64] ; /* 0x0000000402047981 */
/* 0x000ea2000c1e1900 */
/*0060*/ IADD3 R7, R7, c[0x0][0x0], RZ ; /* 0x0000000007077a10 */
/* 0x000fe40007ffe0ff */
/*0070*/ ISETP.GE.U32.AND P0, PT, R4, 0x80, PT ; /* 0x000000800400780c */
/* 0x004fc60003f06070 */
/*0080*/ IMAD.WIDE.U32 R4, R7, R0, c[0x0][0x160] ; /* 0x0000580007047625 */
/* 0x000fd400078e0000 */
/*0090*/ @P0 IMAD.MOV.U32 R11, RZ, RZ, 0x7f ; /* 0x0000007fff0b0424 */
/* 0x000fca00078e00ff */
/*00a0*/ @P0 STG.E [R2.64], R11 ; /* 0x0000000b02000986 */
/* 0x0001e8000c101904 */
/*00b0*/ LDG.E R6, [R4.64] ; /* 0x0000000404067981 */
/* 0x000ea2000c1e1900 */
/*00c0*/ IADD3 R9, R7, c[0x0][0x0], RZ ; /* 0x0000000007097a10 */
/* 0x000fe40007ffe0ff */
/*00d0*/ ISETP.GE.U32.AND P0, PT, R6, 0x80, PT ; /* 0x000000800600780c */
/* 0x004fc60003f06070 */
/*00e0*/ IMAD.WIDE.U32 R6, R9, R0, c[0x0][0x160] ; /* 0x0000580009067625 */
/* 0x000fd400078e0000 */
/*00f0*/ @P0 MOV R13, 0x7f ; /* 0x0000007f000d0802 */
/* 0x000fca0000000f00 */
/*0100*/ @P0 STG.E [R4.64], R13 ; /* 0x0000000d04000986 */
/* 0x0003e8000c101904 */
/*0110*/ LDG.E R8, [R6.64] ; /* 0x0000000406087981 */
/* 0x000ea2000c1e1900 */
/*0120*/ IADD3 R9, R9, c[0x0][0x0], RZ ; /* 0x0000000009097a10 */
/* 0x000fca0007ffe0ff */
/*0130*/ IMAD.WIDE.U32 R2, R9, R0, c[0x0][0x160] ; /* 0x0000580009027625 */
/* 0x001fe200078e0000 */
/*0140*/ ISETP.GE.U32.AND P0, PT, R8, 0x80, PT ; /* 0x000000800800780c */
/* 0x004fda0003f06070 */
/*0150*/ @P0 IMAD.MOV.U32 R15, RZ, RZ, 0x7f ; /* 0x0000007fff0f0424 */
/* 0x000fca00078e00ff */
/*0160*/ @P0 STG.E [R6.64], R15 ; /* 0x0000000f06000986 */
/* 0x0001e8000c101904 */
/*0170*/ LDG.E R8, [R2.64] ; /* 0x0000000402087981 */
/* 0x000ea2000c1e1900 */
/*0180*/ IADD3 R9, R9, c[0x0][0x0], RZ ; /* 0x0000000009097a10 */
/* 0x000fca0007ffe0ff */
/*0190*/ IMAD.WIDE.U32 R4, R9, R0, c[0x0][0x160] ; /* 0x0000580009047625 */
/* 0x002fe200078e0000 */
/*01a0*/ ISETP.GE.U32.AND P0, PT, R8, 0x80, PT ; /* 0x000000800800780c */
/* 0x004fda0003f06070 */
/*01b0*/ @P0 IMAD.MOV.U32 R11, RZ, RZ, 0x7f ; /* 0x0000007fff0b0424 */
/* 0x000fca00078e00ff */
/*01c0*/ @P0 STG.E [R2.64], R11 ; /* 0x0000000b02000986 */
/* 0x0003e8000c101904 */
/*01d0*/ LDG.E R8, [R4.64] ; /* 0x0000000404087981 */
/* 0x000ea2000c1e1900 */
/*01e0*/ IADD3 R9, R9, c[0x0][0x0], RZ ; /* 0x0000000009097a10 */
/* 0x000fca0007ffe0ff */
/*01f0*/ IMAD.WIDE.U32 R6, R9, R0, c[0x0][0x160] ; /* 0x0000580009067625 */
/* 0x001fe200078e0000 */
/*0200*/ ISETP.GE.U32.AND P0, PT, R8, 0x80, PT ; /* 0x000000800800780c */
/* 0x004fda0003f06070 */
/*0210*/ @P0 MOV R13, 0x7f ; /* 0x0000007f000d0802 */
/* 0x000fca0000000f00 */
/*0220*/ @P0 STG.E [R4.64], R13 ; /* 0x0000000d04000986 */
/* 0x0001e8000c101904 */
/*0230*/ LDG.E R8, [R6.64] ; /* 0x0000000406087981 */
/* 0x000ea2000c1e1900 */
/*0240*/ IADD3 R9, R9, c[0x0][0x0], RZ ; /* 0x0000000009097a10 */
/* 0x000fca0007ffe0ff */
/*0250*/ IMAD.WIDE.U32 R2, R9, R0, c[0x0][0x160] ; /* 0x0000580009027625 */
/* 0x002fe200078e0000 */
/*0260*/ ISETP.GE.U32.AND P0, PT, R8, 0x80, PT ; /* 0x000000800800780c */
/* 0x004fda0003f06070 */
/*0270*/ @P0 IMAD.MOV.U32 R15, RZ, RZ, 0x7f ; /* 0x0000007fff0f0424 */
/* 0x000fca00078e00ff */
/*0280*/ @P0 STG.E [R6.64], R15 ; /* 0x0000000f06000986 */
/* 0x0003e8000c101904 */
/*0290*/ LDG.E R8, [R2.64] ; /* 0x0000000402087981 */
/* 0x000ea2000c1e1900 */
/*02a0*/ IADD3 R9, R9, c[0x0][0x0], RZ ; /* 0x0000000009097a10 */
/* 0x000fca0007ffe0ff */
/*02b0*/ IMAD.WIDE.U32 R4, R9, R0, c[0x0][0x160] ; /* 0x0000580009047625 */
/* 0x001fe200078e0000 */
/*02c0*/ ISETP.GE.U32.AND P0, PT, R8, 0x80, PT ; /* 0x000000800800780c */
/* 0x004fda0003f06070 */
/*02d0*/ @P0 IMAD.MOV.U32 R11, RZ, RZ, 0x7f ; /* 0x0000007fff0b0424 */
/* 0x000fca00078e00ff */
/*02e0*/ @P0 STG.E [R2.64], R11 ; /* 0x0000000b02000986 */
/* 0x0003e8000c101904 */
/*02f0*/ LDG.E R0, [R4.64] ; /* 0x0000000404007981 */
/* 0x000ea4000c1e1900 */
/*0300*/ ISETP.GE.U32.AND P0, PT, R0, 0x80, PT ; /* 0x000000800000780c */
/* 0x004fda0003f06070 */
/*0310*/ @!P0 EXIT ; /* 0x000000000000894d */
/* 0x000fea0003800000 */
/*0320*/ HFMA2.MMA R3, -RZ, RZ, 0, 7.569789886474609375e-06 ; /* 0x0000007fff037435 */
/* 0x002fce00000001ff */
/*0330*/ STG.E [R4.64], R3 ; /* 0x0000000304007986 */
/* 0x000fe2000c101904 */
/*0340*/ EXIT ; /* 0x000000000000794d */
/* 0x000fea0003800000 */
/*0350*/ BRA 0x350; /* 0xfffffff000007947 */
/* 0x000fc0000383ffff */
/*0360*/ NOP; /* 0x0000000000007918 */
/* 0x000fc00000000000 */
/*0370*/ NOP; /* 0x0000000000007918 */
/* 0x000fc00000000000 */
/*0380*/ NOP; /* 0x0000000000007918 */
/* 0x000fc00000000000 */
/*0390*/ NOP; /* 0x0000000000007918 */
/* 0x000fc00000000000 */
/*03a0*/ NOP; /* 0x0000000000007918 */
/* 0x000fc00000000000 */
/*03b0*/ NOP; /* 0x0000000000007918 */
/* 0x000fc00000000000 */
/*03c0*/ NOP; /* 0x0000000000007918 */
/* 0x000fc00000000000 */
/*03d0*/ NOP; /* 0x0000000000007918 */
/* 0x000fc00000000000 */
/*03e0*/ NOP; /* 0x0000000000007918 */
/* 0x000fc00000000000 */
/*03f0*/ NOP; /* 0x0000000000007918 */
/* 0x000fc00000000000 */
.......... | .text
.amdgcn_target "amdgcn-amd-amdhsa--gfx1100"
.protected _Z8saturatePjj
.globl _Z8saturatePjj
.p2align 8
.type _Z8saturatePjj,@function
_Z8saturatePjj:
s_clause 0x1
s_load_b32 s2, s[0:1], 0x1c
s_load_b64 s[0:1], s[0:1], 0x0
v_lshlrev_b32_e32 v0, 2, v0
v_mov_b32_e32 v2, 0x7f
s_waitcnt lgkmcnt(0)
s_and_b32 s2, s2, 0xffff
s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
v_add_co_u32 v0, s0, s0, v0
v_add_co_ci_u32_e64 v1, null, s1, 0, s0
s_mov_b32 s0, 0
s_lshl_b32 s1, s2, 2
s_mov_b32 s2, 8
s_branch .LBB0_2
.LBB0_1:
s_or_b32 exec_lo, exec_lo, s3
v_add_co_u32 v0, vcc_lo, v0, s1
v_add_co_ci_u32_e32 v1, vcc_lo, s0, v1, vcc_lo
s_add_i32 s2, s2, -1
s_delay_alu instid0(SALU_CYCLE_1)
s_cmp_eq_u32 s2, 0
s_cbranch_scc1 .LBB0_4
.LBB0_2:
global_load_b32 v3, v[0:1], off
s_mov_b32 s3, exec_lo
s_waitcnt vmcnt(0)
v_cmpx_lt_u32_e32 0x7f, v3
s_cbranch_execz .LBB0_1
global_store_b32 v[0:1], v2, off
s_branch .LBB0_1
.LBB0_4:
s_nop 0
s_sendmsg sendmsg(MSG_DEALLOC_VGPRS)
s_endpgm
.section .rodata,"a",@progbits
.p2align 6, 0x0
.amdhsa_kernel _Z8saturatePjj
.amdhsa_group_segment_fixed_size 0
.amdhsa_private_segment_fixed_size 0
.amdhsa_kernarg_size 272
.amdhsa_user_sgpr_count 15
.amdhsa_user_sgpr_dispatch_ptr 0
.amdhsa_user_sgpr_queue_ptr 0
.amdhsa_user_sgpr_kernarg_segment_ptr 1
.amdhsa_user_sgpr_dispatch_id 0
.amdhsa_user_sgpr_private_segment_size 0
.amdhsa_wavefront_size32 1
.amdhsa_uses_dynamic_stack 0
.amdhsa_enable_private_segment 0
.amdhsa_system_sgpr_workgroup_id_x 1
.amdhsa_system_sgpr_workgroup_id_y 0
.amdhsa_system_sgpr_workgroup_id_z 0
.amdhsa_system_sgpr_workgroup_info 0
.amdhsa_system_vgpr_workitem_id 0
.amdhsa_next_free_vgpr 4
.amdhsa_next_free_sgpr 4
.amdhsa_float_round_mode_32 0
.amdhsa_float_round_mode_16_64 0
.amdhsa_float_denorm_mode_32 3
.amdhsa_float_denorm_mode_16_64 3
.amdhsa_dx10_clamp 1
.amdhsa_ieee_mode 1
.amdhsa_fp16_overflow 0
.amdhsa_workgroup_processor_mode 1
.amdhsa_memory_ordered 1
.amdhsa_forward_progress 0
.amdhsa_shared_vgpr_count 0
.amdhsa_exception_fp_ieee_invalid_op 0
.amdhsa_exception_fp_denorm_src 0
.amdhsa_exception_fp_ieee_div_zero 0
.amdhsa_exception_fp_ieee_overflow 0
.amdhsa_exception_fp_ieee_underflow 0
.amdhsa_exception_fp_ieee_inexact 0
.amdhsa_exception_int_div_zero 0
.end_amdhsa_kernel
.text
.Lfunc_end0:
.size _Z8saturatePjj, .Lfunc_end0-_Z8saturatePjj
.section .AMDGPU.csdata,"",@progbits
.text
.p2alignl 7, 3214868480
.fill 96, 4, 3214868480
.type __hip_cuid_,@object
.section .bss,"aw",@nobits
.globl __hip_cuid_
__hip_cuid_:
.byte 0
.size __hip_cuid_, 1
.ident "AMD clang version 18.0.0git (https://github.com/RadeonOpenCompute/llvm-project roc-6.3.2 25012 e5bf7e55c91490b07c49d8960fa7983d864936c4)"
.section ".note.GNU-stack","",@progbits
.addrsig
.addrsig_sym __hip_cuid_
.amdgpu_metadata
---
amdhsa.kernels:
- .args:
- .address_space: global
.offset: 0
.size: 8
.value_kind: global_buffer
- .offset: 8
.size: 4
.value_kind: by_value
- .offset: 16
.size: 4
.value_kind: hidden_block_count_x
- .offset: 20
.size: 4
.value_kind: hidden_block_count_y
- .offset: 24
.size: 4
.value_kind: hidden_block_count_z
- .offset: 28
.size: 2
.value_kind: hidden_group_size_x
- .offset: 30
.size: 2
.value_kind: hidden_group_size_y
- .offset: 32
.size: 2
.value_kind: hidden_group_size_z
- .offset: 34
.size: 2
.value_kind: hidden_remainder_x
- .offset: 36
.size: 2
.value_kind: hidden_remainder_y
- .offset: 38
.size: 2
.value_kind: hidden_remainder_z
- .offset: 56
.size: 8
.value_kind: hidden_global_offset_x
- .offset: 64
.size: 8
.value_kind: hidden_global_offset_y
- .offset: 72
.size: 8
.value_kind: hidden_global_offset_z
- .offset: 80
.size: 2
.value_kind: hidden_grid_dims
.group_segment_fixed_size: 0
.kernarg_segment_align: 8
.kernarg_segment_size: 272
.language: OpenCL C
.language_version:
- 2
- 0
.max_flat_workgroup_size: 1024
.name: _Z8saturatePjj
.private_segment_fixed_size: 0
.sgpr_count: 6
.sgpr_spill_count: 0
.symbol: _Z8saturatePjj.kd
.uniform_work_group_size: 1
.uses_dynamic_stack: false
.vgpr_count: 4
.vgpr_spill_count: 0
.wavefront_size: 32
.workgroup_processor_mode: 1
amdhsa.target: amdgcn-amd-amdhsa--gfx1100
amdhsa.version:
- 1
- 2
...
.end_amdgpu_metadata |
You are a helpful coding assistant specialized in converting from CUDA host assembly to AMD host assembly. | .file "tmpxft_0017357c_00000000-6_saturate.cudafe1.cpp"
.text
#APP
#NO_APP
.type _ZL26__cudaUnregisterBinaryUtilv, @function
_ZL26__cudaUnregisterBinaryUtilv:
.LFB2029:
.cfi_startproc
endbr64
subq $8, %rsp
.cfi_def_cfa_offset 16
movq _ZL20__cudaFatCubinHandle(%rip), %rdi
call __cudaUnregisterFatBinary@PLT
addq $8, %rsp
.cfi_def_cfa_offset 8
ret
.cfi_endproc
.LFE2029:
.size _ZL26__cudaUnregisterBinaryUtilv, .-_ZL26__cudaUnregisterBinaryUtilv
.globl _Z28__device_stub__Z8saturatePjjPjj
.type _Z28__device_stub__Z8saturatePjjPjj, @function
_Z28__device_stub__Z8saturatePjjPjj:
.LFB2051:
.cfi_startproc
endbr64
subq $120, %rsp
.cfi_def_cfa_offset 128
movq %rdi, 8(%rsp)
movl %esi, 4(%rsp)
movq %fs:40, %rax
movq %rax, 104(%rsp)
xorl %eax, %eax
leaq 8(%rsp), %rax
movq %rax, 80(%rsp)
leaq 4(%rsp), %rax
movq %rax, 88(%rsp)
movl $1, 32(%rsp)
movl $1, 36(%rsp)
movl $1, 40(%rsp)
movl $1, 44(%rsp)
movl $1, 48(%rsp)
movl $1, 52(%rsp)
leaq 24(%rsp), %rcx
leaq 16(%rsp), %rdx
leaq 44(%rsp), %rsi
leaq 32(%rsp), %rdi
call __cudaPopCallConfiguration@PLT
testl %eax, %eax
je .L7
.L3:
movq 104(%rsp), %rax
subq %fs:40, %rax
jne .L8
addq $120, %rsp
.cfi_remember_state
.cfi_def_cfa_offset 8
ret
.L7:
.cfi_restore_state
pushq 24(%rsp)
.cfi_def_cfa_offset 136
pushq 24(%rsp)
.cfi_def_cfa_offset 144
leaq 96(%rsp), %r9
movq 60(%rsp), %rcx
movl 68(%rsp), %r8d
movq 48(%rsp), %rsi
movl 56(%rsp), %edx
leaq _Z8saturatePjj(%rip), %rdi
call cudaLaunchKernel@PLT
addq $16, %rsp
.cfi_def_cfa_offset 128
jmp .L3
.L8:
call __stack_chk_fail@PLT
.cfi_endproc
.LFE2051:
.size _Z28__device_stub__Z8saturatePjjPjj, .-_Z28__device_stub__Z8saturatePjjPjj
.globl _Z8saturatePjj
.type _Z8saturatePjj, @function
_Z8saturatePjj:
.LFB2052:
.cfi_startproc
endbr64
subq $8, %rsp
.cfi_def_cfa_offset 16
call _Z28__device_stub__Z8saturatePjjPjj
addq $8, %rsp
.cfi_def_cfa_offset 8
ret
.cfi_endproc
.LFE2052:
.size _Z8saturatePjj, .-_Z8saturatePjj
.section .rodata.str1.1,"aMS",@progbits,1
.LC0:
.string "_Z8saturatePjj"
.text
.type _ZL24__sti____cudaRegisterAllv, @function
_ZL24__sti____cudaRegisterAllv:
.LFB2054:
.cfi_startproc
endbr64
subq $8, %rsp
.cfi_def_cfa_offset 16
leaq _ZL15__fatDeviceText(%rip), %rdi
call __cudaRegisterFatBinary@PLT
movq %rax, %rdi
movq %rax, _ZL20__cudaFatCubinHandle(%rip)
pushq $0
.cfi_def_cfa_offset 24
pushq $0
.cfi_def_cfa_offset 32
pushq $0
.cfi_def_cfa_offset 40
pushq $0
.cfi_def_cfa_offset 48
movl $0, %r9d
movl $-1, %r8d
leaq .LC0(%rip), %rdx
movq %rdx, %rcx
leaq _Z8saturatePjj(%rip), %rsi
call __cudaRegisterFunction@PLT
addq $32, %rsp
.cfi_def_cfa_offset 16
movq _ZL20__cudaFatCubinHandle(%rip), %rdi
call __cudaRegisterFatBinaryEnd@PLT
leaq _ZL26__cudaUnregisterBinaryUtilv(%rip), %rdi
call atexit@PLT
addq $8, %rsp
.cfi_def_cfa_offset 8
ret
.cfi_endproc
.LFE2054:
.size _ZL24__sti____cudaRegisterAllv, .-_ZL24__sti____cudaRegisterAllv
.section .init_array,"aw"
.align 8
.quad _ZL24__sti____cudaRegisterAllv
.section .nvFatBinSegment,"aw"
.align 8
.type _ZL15__fatDeviceText, @object
.size _ZL15__fatDeviceText, 24
_ZL15__fatDeviceText:
.long 1180844977
.long 1
.quad fatbinData
.quad 0
.local _ZL20__cudaFatCubinHandle
.comm _ZL20__cudaFatCubinHandle,8,8
.ident "GCC: (Ubuntu 13.3.0-6ubuntu2~24.04) 13.3.0"
.section .note.GNU-stack,"",@progbits
.section .note.gnu.property,"a"
.align 8
.long 1f - 0f
.long 4f - 1f
.long 5
0:
.string "GNU"
1:
.align 8
.long 0xc0000002
.long 3f - 2f
2:
.long 0x3
3:
.align 8
4: | .text
.file "saturate.hip"
.globl _Z23__device_stub__saturatePjj # -- Begin function _Z23__device_stub__saturatePjj
.p2align 4, 0x90
.type _Z23__device_stub__saturatePjj,@function
_Z23__device_stub__saturatePjj: # @_Z23__device_stub__saturatePjj
.cfi_startproc
# %bb.0:
subq $88, %rsp
.cfi_def_cfa_offset 96
movq %rdi, 56(%rsp)
movl %esi, 4(%rsp)
leaq 56(%rsp), %rax
movq %rax, 64(%rsp)
leaq 4(%rsp), %rax
movq %rax, 72(%rsp)
leaq 40(%rsp), %rdi
leaq 24(%rsp), %rsi
leaq 16(%rsp), %rdx
leaq 8(%rsp), %rcx
callq __hipPopCallConfiguration
movq 40(%rsp), %rsi
movl 48(%rsp), %edx
movq 24(%rsp), %rcx
movl 32(%rsp), %r8d
leaq 64(%rsp), %r9
movl $_Z8saturatePjj, %edi
pushq 8(%rsp)
.cfi_adjust_cfa_offset 8
pushq 24(%rsp)
.cfi_adjust_cfa_offset 8
callq hipLaunchKernel
addq $104, %rsp
.cfi_adjust_cfa_offset -104
retq
.Lfunc_end0:
.size _Z23__device_stub__saturatePjj, .Lfunc_end0-_Z23__device_stub__saturatePjj
.cfi_endproc
# -- End function
.p2align 4, 0x90 # -- Begin function __hip_module_ctor
.type __hip_module_ctor,@function
__hip_module_ctor: # @__hip_module_ctor
.cfi_startproc
# %bb.0:
subq $40, %rsp
.cfi_def_cfa_offset 48
cmpq $0, __hip_gpubin_handle(%rip)
jne .LBB1_2
# %bb.1:
movl $__hip_fatbin_wrapper, %edi
callq __hipRegisterFatBinary
movq %rax, __hip_gpubin_handle(%rip)
.LBB1_2:
movq __hip_gpubin_handle(%rip), %rdi
xorps %xmm0, %xmm0
movups %xmm0, 16(%rsp)
movups %xmm0, (%rsp)
movl $_Z8saturatePjj, %esi
movl $.L__unnamed_1, %edx
movl $.L__unnamed_1, %ecx
movl $-1, %r8d
xorl %r9d, %r9d
callq __hipRegisterFunction
movl $__hip_module_dtor, %edi
addq $40, %rsp
.cfi_def_cfa_offset 8
jmp atexit # TAILCALL
.Lfunc_end1:
.size __hip_module_ctor, .Lfunc_end1-__hip_module_ctor
.cfi_endproc
# -- End function
.p2align 4, 0x90 # -- Begin function __hip_module_dtor
.type __hip_module_dtor,@function
__hip_module_dtor: # @__hip_module_dtor
.cfi_startproc
# %bb.0:
movq __hip_gpubin_handle(%rip), %rdi
testq %rdi, %rdi
je .LBB2_2
# %bb.1:
pushq %rax
.cfi_def_cfa_offset 16
callq __hipUnregisterFatBinary
movq $0, __hip_gpubin_handle(%rip)
addq $8, %rsp
.cfi_def_cfa_offset 8
.LBB2_2:
retq
.Lfunc_end2:
.size __hip_module_dtor, .Lfunc_end2-__hip_module_dtor
.cfi_endproc
# -- End function
.type _Z8saturatePjj,@object # @_Z8saturatePjj
.section .rodata,"a",@progbits
.globl _Z8saturatePjj
.p2align 3, 0x0
_Z8saturatePjj:
.quad _Z23__device_stub__saturatePjj
.size _Z8saturatePjj, 8
.type .L__unnamed_1,@object # @0
.section .rodata.str1.1,"aMS",@progbits,1
.L__unnamed_1:
.asciz "_Z8saturatePjj"
.size .L__unnamed_1, 15
.type __hip_fatbin_wrapper,@object # @__hip_fatbin_wrapper
.section .hipFatBinSegment,"a",@progbits
.p2align 3, 0x0
__hip_fatbin_wrapper:
.long 1212764230 # 0x48495046
.long 1 # 0x1
.quad __hip_fatbin
.quad 0
.size __hip_fatbin_wrapper, 24
.type __hip_gpubin_handle,@object # @__hip_gpubin_handle
.local __hip_gpubin_handle
.comm __hip_gpubin_handle,8,8
.section .init_array,"aw",@init_array
.p2align 3, 0x0
.quad __hip_module_ctor
.type __hip_cuid_,@object # @__hip_cuid_
.bss
.globl __hip_cuid_
__hip_cuid_:
.byte 0 # 0x0
.size __hip_cuid_, 1
.section ".linker-options","e",@llvm_linker_options
.ident "AMD clang version 18.0.0git (https://github.com/RadeonOpenCompute/llvm-project roc-6.3.2 25012 e5bf7e55c91490b07c49d8960fa7983d864936c4)"
.section ".note.GNU-stack","",@progbits
.addrsig
.addrsig_sym _Z23__device_stub__saturatePjj
.addrsig_sym __hip_module_ctor
.addrsig_sym __hip_module_dtor
.addrsig_sym _Z8saturatePjj
.addrsig_sym __hip_fatbin
.addrsig_sym __hip_fatbin_wrapper
.addrsig_sym __hip_cuid_ |
You are a helpful coding assistant specialized in converting CUDA source code to CUDA device assembly. | #include<iostream>
using namespace std;
#define N 10
__global__ void add(int *a,int *b,int *c)
{
int tid = blockIdx.x;
if(tid < N)
{
c[tid] = a[tid] + b[tid];
}
}
int main()
{
int a[N],b[N],c[N];
int *dev_a;
int *dev_b;
int *dev_c;
int i;
cudaMalloc((void **)&dev_a,sizeof(int)*N);
cudaMalloc((void **)&dev_b,sizeof(int)*N);
cudaMalloc((void **)&dev_c,sizeof(int)*N);
for(i=0;i<N;i++)
{
a[i]=i;
b[i]=i;
}
cudaMemcpy(dev_a,a,sizeof(int)*N,cudaMemcpyHostToDevice);
cudaMemcpy(dev_b,b,sizeof(int)*N,cudaMemcpyHostToDevice);
add<<<N,1>>>(dev_a,dev_b,dev_c);
cudaMemcpy(c,dev_c,sizeof(int)*N,cudaMemcpyDeviceToHost);
cudaFree(dev_a);
cudaFree(dev_b);
cudaFree(dev_c);
for(i=0;i<N;i++)
{
printf("%d + %d = %d\n",a[i],b[i],c[i]);
}
return 0;
} | code for sm_80
Function : _Z3addPiS_S_
.headerflags @"EF_CUDA_TEXMODE_UNIFIED EF_CUDA_64BIT_ADDRESS EF_CUDA_SM80 EF_CUDA_VIRTUAL_SM(EF_CUDA_SM80)"
/*0000*/ MOV R1, c[0x0][0x28] ; /* 0x00000a0000017a02 */
/* 0x000fe40000000f00 */
/*0010*/ S2R R6, SR_CTAID.X ; /* 0x0000000000067919 */
/* 0x000e240000002500 */
/*0020*/ ISETP.GT.AND P0, PT, R6, 0x9, PT ; /* 0x000000090600780c */
/* 0x001fda0003f04270 */
/*0030*/ @P0 EXIT ; /* 0x000000000000094d */
/* 0x000fea0003800000 */
/*0040*/ HFMA2.MMA R7, -RZ, RZ, 0, 2.384185791015625e-07 ; /* 0x00000004ff077435 */
/* 0x000fe200000001ff */
/*0050*/ ULDC.64 UR4, c[0x0][0x118] ; /* 0x0000460000047ab9 */
/* 0x000fd20000000a00 */
/*0060*/ IMAD.WIDE R4, R6, R7, c[0x0][0x168] ; /* 0x00005a0006047625 */
/* 0x000fc800078e0207 */
/*0070*/ IMAD.WIDE R2, R6.reuse, R7.reuse, c[0x0][0x160] ; /* 0x0000580006027625 */
/* 0x0c0fe400078e0207 */
/*0080*/ LDG.E R4, [R4.64] ; /* 0x0000000404047981 */
/* 0x000ea8000c1e1900 */
/*0090*/ LDG.E R3, [R2.64] ; /* 0x0000000402037981 */
/* 0x000ea2000c1e1900 */
/*00a0*/ IMAD.WIDE R6, R6, R7, c[0x0][0x170] ; /* 0x00005c0006067625 */
/* 0x000fe200078e0207 */
/*00b0*/ IADD3 R9, R4, R3, RZ ; /* 0x0000000304097210 */
/* 0x004fca0007ffe0ff */
/*00c0*/ STG.E [R6.64], R9 ; /* 0x0000000906007986 */
/* 0x000fe2000c101904 */
/*00d0*/ EXIT ; /* 0x000000000000794d */
/* 0x000fea0003800000 */
/*00e0*/ BRA 0xe0; /* 0xfffffff000007947 */
/* 0x000fc0000383ffff */
/*00f0*/ NOP; /* 0x0000000000007918 */
/* 0x000fc00000000000 */
/*0100*/ NOP; /* 0x0000000000007918 */
/* 0x000fc00000000000 */
/*0110*/ NOP; /* 0x0000000000007918 */
/* 0x000fc00000000000 */
/*0120*/ NOP; /* 0x0000000000007918 */
/* 0x000fc00000000000 */
/*0130*/ NOP; /* 0x0000000000007918 */
/* 0x000fc00000000000 */
/*0140*/ NOP; /* 0x0000000000007918 */
/* 0x000fc00000000000 */
/*0150*/ NOP; /* 0x0000000000007918 */
/* 0x000fc00000000000 */
/*0160*/ NOP; /* 0x0000000000007918 */
/* 0x000fc00000000000 */
/*0170*/ NOP; /* 0x0000000000007918 */
/* 0x000fc00000000000 */
.......... |
You are a helpful coding assistant specialized in converting CUDA source code to CUDA host assembly. | #include<iostream>
using namespace std;
#define N 10
__global__ void add(int *a,int *b,int *c)
{
int tid = blockIdx.x;
if(tid < N)
{
c[tid] = a[tid] + b[tid];
}
}
int main()
{
int a[N],b[N],c[N];
int *dev_a;
int *dev_b;
int *dev_c;
int i;
cudaMalloc((void **)&dev_a,sizeof(int)*N);
cudaMalloc((void **)&dev_b,sizeof(int)*N);
cudaMalloc((void **)&dev_c,sizeof(int)*N);
for(i=0;i<N;i++)
{
a[i]=i;
b[i]=i;
}
cudaMemcpy(dev_a,a,sizeof(int)*N,cudaMemcpyHostToDevice);
cudaMemcpy(dev_b,b,sizeof(int)*N,cudaMemcpyHostToDevice);
add<<<N,1>>>(dev_a,dev_b,dev_c);
cudaMemcpy(c,dev_c,sizeof(int)*N,cudaMemcpyDeviceToHost);
cudaFree(dev_a);
cudaFree(dev_b);
cudaFree(dev_c);
for(i=0;i<N;i++)
{
printf("%d + %d = %d\n",a[i],b[i],c[i]);
}
return 0;
} | .file "tmpxft_001a9fd7_00000000-6_parallel.cudafe1.cpp"
.text
#APP
.globl _ZSt21ios_base_library_initv
#NO_APP
.type _ZL26__cudaUnregisterBinaryUtilv, @function
_ZL26__cudaUnregisterBinaryUtilv:
.LFB3672:
.cfi_startproc
endbr64
subq $8, %rsp
.cfi_def_cfa_offset 16
movq _ZL20__cudaFatCubinHandle(%rip), %rdi
call __cudaUnregisterFatBinary@PLT
addq $8, %rsp
.cfi_def_cfa_offset 8
ret
.cfi_endproc
.LFE3672:
.size _ZL26__cudaUnregisterBinaryUtilv, .-_ZL26__cudaUnregisterBinaryUtilv
.globl _Z26__device_stub__Z3addPiS_S_PiS_S_
.type _Z26__device_stub__Z3addPiS_S_PiS_S_, @function
_Z26__device_stub__Z3addPiS_S_PiS_S_:
.LFB3694:
.cfi_startproc
endbr64
subq $136, %rsp
.cfi_def_cfa_offset 144
movq %rdi, 24(%rsp)
movq %rsi, 16(%rsp)
movq %rdx, 8(%rsp)
movq %fs:40, %rax
movq %rax, 120(%rsp)
xorl %eax, %eax
leaq 24(%rsp), %rax
movq %rax, 96(%rsp)
leaq 16(%rsp), %rax
movq %rax, 104(%rsp)
leaq 8(%rsp), %rax
movq %rax, 112(%rsp)
movl $1, 48(%rsp)
movl $1, 52(%rsp)
movl $1, 56(%rsp)
movl $1, 60(%rsp)
movl $1, 64(%rsp)
movl $1, 68(%rsp)
leaq 40(%rsp), %rcx
leaq 32(%rsp), %rdx
leaq 60(%rsp), %rsi
leaq 48(%rsp), %rdi
call __cudaPopCallConfiguration@PLT
testl %eax, %eax
je .L7
.L3:
movq 120(%rsp), %rax
subq %fs:40, %rax
jne .L8
addq $136, %rsp
.cfi_remember_state
.cfi_def_cfa_offset 8
ret
.L7:
.cfi_restore_state
pushq 40(%rsp)
.cfi_def_cfa_offset 152
pushq 40(%rsp)
.cfi_def_cfa_offset 160
leaq 112(%rsp), %r9
movq 76(%rsp), %rcx
movl 84(%rsp), %r8d
movq 64(%rsp), %rsi
movl 72(%rsp), %edx
leaq _Z3addPiS_S_(%rip), %rdi
call cudaLaunchKernel@PLT
addq $16, %rsp
.cfi_def_cfa_offset 144
jmp .L3
.L8:
call __stack_chk_fail@PLT
.cfi_endproc
.LFE3694:
.size _Z26__device_stub__Z3addPiS_S_PiS_S_, .-_Z26__device_stub__Z3addPiS_S_PiS_S_
.globl _Z3addPiS_S_
.type _Z3addPiS_S_, @function
_Z3addPiS_S_:
.LFB3695:
.cfi_startproc
endbr64
subq $8, %rsp
.cfi_def_cfa_offset 16
call _Z26__device_stub__Z3addPiS_S_PiS_S_
addq $8, %rsp
.cfi_def_cfa_offset 8
ret
.cfi_endproc
.LFE3695:
.size _Z3addPiS_S_, .-_Z3addPiS_S_
.section .rodata.str1.1,"aMS",@progbits,1
.LC0:
.string "%d + %d = %d\n"
.text
.globl main
.type main, @function
main:
.LFB3669:
.cfi_startproc
endbr64
pushq %rbp
.cfi_def_cfa_offset 16
.cfi_offset 6, -16
pushq %rbx
.cfi_def_cfa_offset 24
.cfi_offset 3, -24
subq $200, %rsp
.cfi_def_cfa_offset 224
movq %fs:40, %rax
movq %rax, 184(%rsp)
xorl %eax, %eax
movq %rsp, %rdi
movl $40, %esi
call cudaMalloc@PLT
leaq 8(%rsp), %rdi
movl $40, %esi
call cudaMalloc@PLT
leaq 16(%rsp), %rdi
movl $40, %esi
call cudaMalloc@PLT
movl $0, %eax
.L12:
movl %eax, 48(%rsp,%rax,4)
movl %eax, 96(%rsp,%rax,4)
addq $1, %rax
cmpq $10, %rax
jne .L12
leaq 48(%rsp), %rsi
movl $1, %ecx
movl $40, %edx
movq (%rsp), %rdi
call cudaMemcpy@PLT
leaq 96(%rsp), %rsi
movl $1, %ecx
movl $40, %edx
movq 8(%rsp), %rdi
call cudaMemcpy@PLT
movl $1, 36(%rsp)
movl $1, 40(%rsp)
movl $1, 44(%rsp)
movl $10, 24(%rsp)
movl $1, 28(%rsp)
movl $1, 32(%rsp)
movl $0, %r9d
movl $0, %r8d
movq 36(%rsp), %rdx
movl $1, %ecx
movq 24(%rsp), %rdi
movl $1, %esi
call __cudaPushCallConfiguration@PLT
testl %eax, %eax
je .L19
.L13:
leaq 144(%rsp), %rdi
movl $2, %ecx
movl $40, %edx
movq 16(%rsp), %rsi
call cudaMemcpy@PLT
movq (%rsp), %rdi
call cudaFree@PLT
movq 8(%rsp), %rdi
call cudaFree@PLT
movq 16(%rsp), %rdi
call cudaFree@PLT
movl $0, %ebx
leaq .LC0(%rip), %rbp
.L14:
movl 96(%rsp,%rbx), %ecx
movl 48(%rsp,%rbx), %edx
movl 144(%rsp,%rbx), %r8d
movq %rbp, %rsi
movl $2, %edi
movl $0, %eax
call __printf_chk@PLT
addq $4, %rbx
cmpq $40, %rbx
jne .L14
movq 184(%rsp), %rax
subq %fs:40, %rax
jne .L20
movl $0, %eax
addq $200, %rsp
.cfi_remember_state
.cfi_def_cfa_offset 24
popq %rbx
.cfi_def_cfa_offset 16
popq %rbp
.cfi_def_cfa_offset 8
ret
.L19:
.cfi_restore_state
movq 16(%rsp), %rdx
movq 8(%rsp), %rsi
movq (%rsp), %rdi
call _Z26__device_stub__Z3addPiS_S_PiS_S_
jmp .L13
.L20:
call __stack_chk_fail@PLT
.cfi_endproc
.LFE3669:
.size main, .-main
.section .rodata.str1.1
.LC1:
.string "_Z3addPiS_S_"
.text
.type _ZL24__sti____cudaRegisterAllv, @function
_ZL24__sti____cudaRegisterAllv:
.LFB3697:
.cfi_startproc
endbr64
subq $8, %rsp
.cfi_def_cfa_offset 16
leaq _ZL15__fatDeviceText(%rip), %rdi
call __cudaRegisterFatBinary@PLT
movq %rax, %rdi
movq %rax, _ZL20__cudaFatCubinHandle(%rip)
pushq $0
.cfi_def_cfa_offset 24
pushq $0
.cfi_def_cfa_offset 32
pushq $0
.cfi_def_cfa_offset 40
pushq $0
.cfi_def_cfa_offset 48
movl $0, %r9d
movl $-1, %r8d
leaq .LC1(%rip), %rdx
movq %rdx, %rcx
leaq _Z3addPiS_S_(%rip), %rsi
call __cudaRegisterFunction@PLT
addq $32, %rsp
.cfi_def_cfa_offset 16
movq _ZL20__cudaFatCubinHandle(%rip), %rdi
call __cudaRegisterFatBinaryEnd@PLT
leaq _ZL26__cudaUnregisterBinaryUtilv(%rip), %rdi
call atexit@PLT
addq $8, %rsp
.cfi_def_cfa_offset 8
ret
.cfi_endproc
.LFE3697:
.size _ZL24__sti____cudaRegisterAllv, .-_ZL24__sti____cudaRegisterAllv
.section .init_array,"aw"
.align 8
.quad _ZL24__sti____cudaRegisterAllv
.section .nvFatBinSegment,"aw"
.align 8
.type _ZL15__fatDeviceText, @object
.size _ZL15__fatDeviceText, 24
_ZL15__fatDeviceText:
.long 1180844977
.long 1
.quad fatbinData
.quad 0
.local _ZL20__cudaFatCubinHandle
.comm _ZL20__cudaFatCubinHandle,8,8
.ident "GCC: (Ubuntu 13.3.0-6ubuntu2~24.04) 13.3.0"
.section .note.GNU-stack,"",@progbits
.section .note.gnu.property,"a"
.align 8
.long 1f - 0f
.long 4f - 1f
.long 5
0:
.string "GNU"
1:
.align 8
.long 0xc0000002
.long 3f - 2f
2:
.long 0x3
3:
.align 8
4: |
You are a helpful coding assistant specialized in converting CUDA source code to HIP/AMD source code. | #include<iostream>
using namespace std;
#define N 10
__global__ void add(int *a,int *b,int *c)
{
int tid = blockIdx.x;
if(tid < N)
{
c[tid] = a[tid] + b[tid];
}
}
int main()
{
int a[N],b[N],c[N];
int *dev_a;
int *dev_b;
int *dev_c;
int i;
cudaMalloc((void **)&dev_a,sizeof(int)*N);
cudaMalloc((void **)&dev_b,sizeof(int)*N);
cudaMalloc((void **)&dev_c,sizeof(int)*N);
for(i=0;i<N;i++)
{
a[i]=i;
b[i]=i;
}
cudaMemcpy(dev_a,a,sizeof(int)*N,cudaMemcpyHostToDevice);
cudaMemcpy(dev_b,b,sizeof(int)*N,cudaMemcpyHostToDevice);
add<<<N,1>>>(dev_a,dev_b,dev_c);
cudaMemcpy(c,dev_c,sizeof(int)*N,cudaMemcpyDeviceToHost);
cudaFree(dev_a);
cudaFree(dev_b);
cudaFree(dev_c);
for(i=0;i<N;i++)
{
printf("%d + %d = %d\n",a[i],b[i],c[i]);
}
return 0;
} | #include <hip/hip_runtime.h>
#include<iostream>
using namespace std;
#define N 10
__global__ void add(int *a,int *b,int *c)
{
int tid = blockIdx.x;
if(tid < N)
{
c[tid] = a[tid] + b[tid];
}
}
int main()
{
int a[N],b[N],c[N];
int *dev_a;
int *dev_b;
int *dev_c;
int i;
hipMalloc((void **)&dev_a,sizeof(int)*N);
hipMalloc((void **)&dev_b,sizeof(int)*N);
hipMalloc((void **)&dev_c,sizeof(int)*N);
for(i=0;i<N;i++)
{
a[i]=i;
b[i]=i;
}
hipMemcpy(dev_a,a,sizeof(int)*N,hipMemcpyHostToDevice);
hipMemcpy(dev_b,b,sizeof(int)*N,hipMemcpyHostToDevice);
add<<<N,1>>>(dev_a,dev_b,dev_c);
hipMemcpy(c,dev_c,sizeof(int)*N,hipMemcpyDeviceToHost);
hipFree(dev_a);
hipFree(dev_b);
hipFree(dev_c);
for(i=0;i<N;i++)
{
printf("%d + %d = %d\n",a[i],b[i],c[i]);
}
return 0;
} |
You are a helpful coding assistant specialized in converting HIP source code to AMD device assembly. | #include <hip/hip_runtime.h>
#include<iostream>
using namespace std;
#define N 10
__global__ void add(int *a,int *b,int *c)
{
int tid = blockIdx.x;
if(tid < N)
{
c[tid] = a[tid] + b[tid];
}
}
int main()
{
int a[N],b[N],c[N];
int *dev_a;
int *dev_b;
int *dev_c;
int i;
hipMalloc((void **)&dev_a,sizeof(int)*N);
hipMalloc((void **)&dev_b,sizeof(int)*N);
hipMalloc((void **)&dev_c,sizeof(int)*N);
for(i=0;i<N;i++)
{
a[i]=i;
b[i]=i;
}
hipMemcpy(dev_a,a,sizeof(int)*N,hipMemcpyHostToDevice);
hipMemcpy(dev_b,b,sizeof(int)*N,hipMemcpyHostToDevice);
add<<<N,1>>>(dev_a,dev_b,dev_c);
hipMemcpy(c,dev_c,sizeof(int)*N,hipMemcpyDeviceToHost);
hipFree(dev_a);
hipFree(dev_b);
hipFree(dev_c);
for(i=0;i<N;i++)
{
printf("%d + %d = %d\n",a[i],b[i],c[i]);
}
return 0;
} | .text
.amdgcn_target "amdgcn-amd-amdhsa--gfx1100"
.protected _Z3addPiS_S_
.globl _Z3addPiS_S_
.p2align 8
.type _Z3addPiS_S_,@function
_Z3addPiS_S_:
s_cmp_gt_i32 s15, 9
s_cbranch_scc1 .LBB0_2
s_load_b128 s[4:7], s[0:1], 0x0
s_mov_b32 s2, s15
s_ashr_i32 s3, s15, 31
s_load_b64 s[0:1], s[0:1], 0x10
s_lshl_b64 s[2:3], s[2:3], 2
s_waitcnt lgkmcnt(0)
s_add_u32 s4, s4, s2
s_addc_u32 s5, s5, s3
s_add_u32 s6, s6, s2
s_addc_u32 s7, s7, s3
s_load_b32 s4, s[4:5], 0x0
s_load_b32 s5, s[6:7], 0x0
s_waitcnt lgkmcnt(0)
s_add_i32 s4, s5, s4
s_delay_alu instid0(SALU_CYCLE_1)
v_dual_mov_b32 v0, 0 :: v_dual_mov_b32 v1, s4
s_add_u32 s0, s0, s2
s_addc_u32 s1, s1, s3
global_store_b32 v0, v1, s[0:1]
.LBB0_2:
s_nop 0
s_sendmsg sendmsg(MSG_DEALLOC_VGPRS)
s_endpgm
.section .rodata,"a",@progbits
.p2align 6, 0x0
.amdhsa_kernel _Z3addPiS_S_
.amdhsa_group_segment_fixed_size 0
.amdhsa_private_segment_fixed_size 0
.amdhsa_kernarg_size 24
.amdhsa_user_sgpr_count 15
.amdhsa_user_sgpr_dispatch_ptr 0
.amdhsa_user_sgpr_queue_ptr 0
.amdhsa_user_sgpr_kernarg_segment_ptr 1
.amdhsa_user_sgpr_dispatch_id 0
.amdhsa_user_sgpr_private_segment_size 0
.amdhsa_wavefront_size32 1
.amdhsa_uses_dynamic_stack 0
.amdhsa_enable_private_segment 0
.amdhsa_system_sgpr_workgroup_id_x 1
.amdhsa_system_sgpr_workgroup_id_y 0
.amdhsa_system_sgpr_workgroup_id_z 0
.amdhsa_system_sgpr_workgroup_info 0
.amdhsa_system_vgpr_workitem_id 0
.amdhsa_next_free_vgpr 2
.amdhsa_next_free_sgpr 16
.amdhsa_reserve_vcc 0
.amdhsa_float_round_mode_32 0
.amdhsa_float_round_mode_16_64 0
.amdhsa_float_denorm_mode_32 3
.amdhsa_float_denorm_mode_16_64 3
.amdhsa_dx10_clamp 1
.amdhsa_ieee_mode 1
.amdhsa_fp16_overflow 0
.amdhsa_workgroup_processor_mode 1
.amdhsa_memory_ordered 1
.amdhsa_forward_progress 0
.amdhsa_shared_vgpr_count 0
.amdhsa_exception_fp_ieee_invalid_op 0
.amdhsa_exception_fp_denorm_src 0
.amdhsa_exception_fp_ieee_div_zero 0
.amdhsa_exception_fp_ieee_overflow 0
.amdhsa_exception_fp_ieee_underflow 0
.amdhsa_exception_fp_ieee_inexact 0
.amdhsa_exception_int_div_zero 0
.end_amdhsa_kernel
.text
.Lfunc_end0:
.size _Z3addPiS_S_, .Lfunc_end0-_Z3addPiS_S_
.section .AMDGPU.csdata,"",@progbits
.text
.p2alignl 7, 3214868480
.fill 96, 4, 3214868480
.type __hip_cuid_,@object
.section .bss,"aw",@nobits
.globl __hip_cuid_
__hip_cuid_:
.byte 0
.size __hip_cuid_, 1
.ident "AMD clang version 18.0.0git (https://github.com/RadeonOpenCompute/llvm-project roc-6.3.2 25012 e5bf7e55c91490b07c49d8960fa7983d864936c4)"
.section ".note.GNU-stack","",@progbits
.addrsig
.addrsig_sym __hip_cuid_
.amdgpu_metadata
---
amdhsa.kernels:
- .args:
- .address_space: global
.offset: 0
.size: 8
.value_kind: global_buffer
- .address_space: global
.offset: 8
.size: 8
.value_kind: global_buffer
- .address_space: global
.offset: 16
.size: 8
.value_kind: global_buffer
.group_segment_fixed_size: 0
.kernarg_segment_align: 8
.kernarg_segment_size: 24
.language: OpenCL C
.language_version:
- 2
- 0
.max_flat_workgroup_size: 1024
.name: _Z3addPiS_S_
.private_segment_fixed_size: 0
.sgpr_count: 16
.sgpr_spill_count: 0
.symbol: _Z3addPiS_S_.kd
.uniform_work_group_size: 1
.uses_dynamic_stack: false
.vgpr_count: 2
.vgpr_spill_count: 0
.wavefront_size: 32
.workgroup_processor_mode: 1
amdhsa.target: amdgcn-amd-amdhsa--gfx1100
amdhsa.version:
- 1
- 2
...
.end_amdgpu_metadata |
You are a helpful coding assistant specialized in converting HIP source code to AMD host assembly. | #include <hip/hip_runtime.h>
#include<iostream>
using namespace std;
#define N 10
__global__ void add(int *a,int *b,int *c)
{
int tid = blockIdx.x;
if(tid < N)
{
c[tid] = a[tid] + b[tid];
}
}
int main()
{
int a[N],b[N],c[N];
int *dev_a;
int *dev_b;
int *dev_c;
int i;
hipMalloc((void **)&dev_a,sizeof(int)*N);
hipMalloc((void **)&dev_b,sizeof(int)*N);
hipMalloc((void **)&dev_c,sizeof(int)*N);
for(i=0;i<N;i++)
{
a[i]=i;
b[i]=i;
}
hipMemcpy(dev_a,a,sizeof(int)*N,hipMemcpyHostToDevice);
hipMemcpy(dev_b,b,sizeof(int)*N,hipMemcpyHostToDevice);
add<<<N,1>>>(dev_a,dev_b,dev_c);
hipMemcpy(c,dev_c,sizeof(int)*N,hipMemcpyDeviceToHost);
hipFree(dev_a);
hipFree(dev_b);
hipFree(dev_c);
for(i=0;i<N;i++)
{
printf("%d + %d = %d\n",a[i],b[i],c[i]);
}
return 0;
} | .text
.file "parallel.hip"
# Start of file scope inline assembly
.globl _ZSt21ios_base_library_initv
# End of file scope inline assembly
.globl _Z18__device_stub__addPiS_S_ # -- Begin function _Z18__device_stub__addPiS_S_
.p2align 4, 0x90
.type _Z18__device_stub__addPiS_S_,@function
_Z18__device_stub__addPiS_S_: # @_Z18__device_stub__addPiS_S_
.cfi_startproc
# %bb.0:
subq $104, %rsp
.cfi_def_cfa_offset 112
movq %rdi, 72(%rsp)
movq %rsi, 64(%rsp)
movq %rdx, 56(%rsp)
leaq 72(%rsp), %rax
movq %rax, 80(%rsp)
leaq 64(%rsp), %rax
movq %rax, 88(%rsp)
leaq 56(%rsp), %rax
movq %rax, 96(%rsp)
leaq 40(%rsp), %rdi
leaq 24(%rsp), %rsi
leaq 16(%rsp), %rdx
leaq 8(%rsp), %rcx
callq __hipPopCallConfiguration
movq 40(%rsp), %rsi
movl 48(%rsp), %edx
movq 24(%rsp), %rcx
movl 32(%rsp), %r8d
leaq 80(%rsp), %r9
movl $_Z3addPiS_S_, %edi
pushq 8(%rsp)
.cfi_adjust_cfa_offset 8
pushq 24(%rsp)
.cfi_adjust_cfa_offset 8
callq hipLaunchKernel
addq $120, %rsp
.cfi_adjust_cfa_offset -120
retq
.Lfunc_end0:
.size _Z18__device_stub__addPiS_S_, .Lfunc_end0-_Z18__device_stub__addPiS_S_
.cfi_endproc
# -- End function
.globl main # -- Begin function main
.p2align 4, 0x90
.type main,@function
main: # @main
.cfi_startproc
# %bb.0:
pushq %rbx
.cfi_def_cfa_offset 16
subq $240, %rsp
.cfi_def_cfa_offset 256
.cfi_offset %rbx, -16
leaq 16(%rsp), %rdi
movl $40, %esi
callq hipMalloc
leaq 8(%rsp), %rdi
movl $40, %esi
callq hipMalloc
movq %rsp, %rdi
movl $40, %esi
callq hipMalloc
xorl %eax, %eax
.p2align 4, 0x90
.LBB1_1: # =>This Inner Loop Header: Depth=1
movl %eax, 192(%rsp,%rax,4)
movl %eax, 144(%rsp,%rax,4)
incq %rax
cmpq $10, %rax
jne .LBB1_1
# %bb.2:
movq 16(%rsp), %rdi
leaq 192(%rsp), %rsi
movl $40, %edx
movl $1, %ecx
callq hipMemcpy
movq 8(%rsp), %rdi
leaq 144(%rsp), %rsi
movl $40, %edx
movl $1, %ecx
callq hipMemcpy
movabsq $4294967297, %rdx # imm = 0x100000001
leaq 9(%rdx), %rdi
movl $1, %esi
movl $1, %ecx
xorl %r8d, %r8d
xorl %r9d, %r9d
callq __hipPushCallConfiguration
testl %eax, %eax
jne .LBB1_4
# %bb.3:
movq 16(%rsp), %rax
movq 8(%rsp), %rcx
movq (%rsp), %rdx
movq %rax, 88(%rsp)
movq %rcx, 80(%rsp)
movq %rdx, 72(%rsp)
leaq 88(%rsp), %rax
movq %rax, 96(%rsp)
leaq 80(%rsp), %rax
movq %rax, 104(%rsp)
leaq 72(%rsp), %rax
movq %rax, 112(%rsp)
leaq 56(%rsp), %rdi
leaq 40(%rsp), %rsi
leaq 32(%rsp), %rdx
leaq 24(%rsp), %rcx
callq __hipPopCallConfiguration
movq 56(%rsp), %rsi
movl 64(%rsp), %edx
movq 40(%rsp), %rcx
movl 48(%rsp), %r8d
leaq 96(%rsp), %r9
movl $_Z3addPiS_S_, %edi
pushq 24(%rsp)
.cfi_adjust_cfa_offset 8
pushq 40(%rsp)
.cfi_adjust_cfa_offset 8
callq hipLaunchKernel
addq $16, %rsp
.cfi_adjust_cfa_offset -16
.LBB1_4:
movq (%rsp), %rsi
leaq 96(%rsp), %rdi
movl $40, %edx
movl $2, %ecx
callq hipMemcpy
movq 16(%rsp), %rdi
callq hipFree
movq 8(%rsp), %rdi
callq hipFree
movq (%rsp), %rdi
callq hipFree
xorl %ebx, %ebx
.p2align 4, 0x90
.LBB1_5: # =>This Inner Loop Header: Depth=1
movl 192(%rsp,%rbx,4), %esi
movl 144(%rsp,%rbx,4), %edx
movl 96(%rsp,%rbx,4), %ecx
movl $.L.str, %edi
xorl %eax, %eax
callq printf
incq %rbx
cmpq $10, %rbx
jne .LBB1_5
# %bb.6:
xorl %eax, %eax
addq $240, %rsp
.cfi_def_cfa_offset 16
popq %rbx
.cfi_def_cfa_offset 8
retq
.Lfunc_end1:
.size main, .Lfunc_end1-main
.cfi_endproc
# -- End function
.p2align 4, 0x90 # -- Begin function __hip_module_ctor
.type __hip_module_ctor,@function
__hip_module_ctor: # @__hip_module_ctor
.cfi_startproc
# %bb.0:
subq $40, %rsp
.cfi_def_cfa_offset 48
cmpq $0, __hip_gpubin_handle(%rip)
jne .LBB2_2
# %bb.1:
movl $__hip_fatbin_wrapper, %edi
callq __hipRegisterFatBinary
movq %rax, __hip_gpubin_handle(%rip)
.LBB2_2:
movq __hip_gpubin_handle(%rip), %rdi
xorps %xmm0, %xmm0
movups %xmm0, 16(%rsp)
movups %xmm0, (%rsp)
movl $_Z3addPiS_S_, %esi
movl $.L__unnamed_1, %edx
movl $.L__unnamed_1, %ecx
movl $-1, %r8d
xorl %r9d, %r9d
callq __hipRegisterFunction
movl $__hip_module_dtor, %edi
addq $40, %rsp
.cfi_def_cfa_offset 8
jmp atexit # TAILCALL
.Lfunc_end2:
.size __hip_module_ctor, .Lfunc_end2-__hip_module_ctor
.cfi_endproc
# -- End function
.p2align 4, 0x90 # -- Begin function __hip_module_dtor
.type __hip_module_dtor,@function
__hip_module_dtor: # @__hip_module_dtor
.cfi_startproc
# %bb.0:
movq __hip_gpubin_handle(%rip), %rdi
testq %rdi, %rdi
je .LBB3_2
# %bb.1:
pushq %rax
.cfi_def_cfa_offset 16
callq __hipUnregisterFatBinary
movq $0, __hip_gpubin_handle(%rip)
addq $8, %rsp
.cfi_def_cfa_offset 8
.LBB3_2:
retq
.Lfunc_end3:
.size __hip_module_dtor, .Lfunc_end3-__hip_module_dtor
.cfi_endproc
# -- End function
.type _Z3addPiS_S_,@object # @_Z3addPiS_S_
.section .rodata,"a",@progbits
.globl _Z3addPiS_S_
.p2align 3, 0x0
_Z3addPiS_S_:
.quad _Z18__device_stub__addPiS_S_
.size _Z3addPiS_S_, 8
.type .L.str,@object # @.str
.section .rodata.str1.1,"aMS",@progbits,1
.L.str:
.asciz "%d + %d = %d\n"
.size .L.str, 14
.type .L__unnamed_1,@object # @0
.L__unnamed_1:
.asciz "_Z3addPiS_S_"
.size .L__unnamed_1, 13
.type __hip_fatbin_wrapper,@object # @__hip_fatbin_wrapper
.section .hipFatBinSegment,"a",@progbits
.p2align 3, 0x0
__hip_fatbin_wrapper:
.long 1212764230 # 0x48495046
.long 1 # 0x1
.quad __hip_fatbin
.quad 0
.size __hip_fatbin_wrapper, 24
.type __hip_gpubin_handle,@object # @__hip_gpubin_handle
.local __hip_gpubin_handle
.comm __hip_gpubin_handle,8,8
.section .init_array,"aw",@init_array
.p2align 3, 0x0
.quad __hip_module_ctor
.type __hip_cuid_,@object # @__hip_cuid_
.bss
.globl __hip_cuid_
__hip_cuid_:
.byte 0 # 0x0
.size __hip_cuid_, 1
.section ".linker-options","e",@llvm_linker_options
.ident "AMD clang version 18.0.0git (https://github.com/RadeonOpenCompute/llvm-project roc-6.3.2 25012 e5bf7e55c91490b07c49d8960fa7983d864936c4)"
.section ".note.GNU-stack","",@progbits
.addrsig
.addrsig_sym _Z18__device_stub__addPiS_S_
.addrsig_sym __hip_module_ctor
.addrsig_sym __hip_module_dtor
.addrsig_sym _Z3addPiS_S_
.addrsig_sym __hip_fatbin
.addrsig_sym __hip_fatbin_wrapper
.addrsig_sym __hip_cuid_ |
You are a helpful coding assistant specialized in converting from CUDA device assembly to AMD device assembly. | code for sm_80
Function : _Z3addPiS_S_
.headerflags @"EF_CUDA_TEXMODE_UNIFIED EF_CUDA_64BIT_ADDRESS EF_CUDA_SM80 EF_CUDA_VIRTUAL_SM(EF_CUDA_SM80)"
/*0000*/ MOV R1, c[0x0][0x28] ; /* 0x00000a0000017a02 */
/* 0x000fe40000000f00 */
/*0010*/ S2R R6, SR_CTAID.X ; /* 0x0000000000067919 */
/* 0x000e240000002500 */
/*0020*/ ISETP.GT.AND P0, PT, R6, 0x9, PT ; /* 0x000000090600780c */
/* 0x001fda0003f04270 */
/*0030*/ @P0 EXIT ; /* 0x000000000000094d */
/* 0x000fea0003800000 */
/*0040*/ HFMA2.MMA R7, -RZ, RZ, 0, 2.384185791015625e-07 ; /* 0x00000004ff077435 */
/* 0x000fe200000001ff */
/*0050*/ ULDC.64 UR4, c[0x0][0x118] ; /* 0x0000460000047ab9 */
/* 0x000fd20000000a00 */
/*0060*/ IMAD.WIDE R4, R6, R7, c[0x0][0x168] ; /* 0x00005a0006047625 */
/* 0x000fc800078e0207 */
/*0070*/ IMAD.WIDE R2, R6.reuse, R7.reuse, c[0x0][0x160] ; /* 0x0000580006027625 */
/* 0x0c0fe400078e0207 */
/*0080*/ LDG.E R4, [R4.64] ; /* 0x0000000404047981 */
/* 0x000ea8000c1e1900 */
/*0090*/ LDG.E R3, [R2.64] ; /* 0x0000000402037981 */
/* 0x000ea2000c1e1900 */
/*00a0*/ IMAD.WIDE R6, R6, R7, c[0x0][0x170] ; /* 0x00005c0006067625 */
/* 0x000fe200078e0207 */
/*00b0*/ IADD3 R9, R4, R3, RZ ; /* 0x0000000304097210 */
/* 0x004fca0007ffe0ff */
/*00c0*/ STG.E [R6.64], R9 ; /* 0x0000000906007986 */
/* 0x000fe2000c101904 */
/*00d0*/ EXIT ; /* 0x000000000000794d */
/* 0x000fea0003800000 */
/*00e0*/ BRA 0xe0; /* 0xfffffff000007947 */
/* 0x000fc0000383ffff */
/*00f0*/ NOP; /* 0x0000000000007918 */
/* 0x000fc00000000000 */
/*0100*/ NOP; /* 0x0000000000007918 */
/* 0x000fc00000000000 */
/*0110*/ NOP; /* 0x0000000000007918 */
/* 0x000fc00000000000 */
/*0120*/ NOP; /* 0x0000000000007918 */
/* 0x000fc00000000000 */
/*0130*/ NOP; /* 0x0000000000007918 */
/* 0x000fc00000000000 */
/*0140*/ NOP; /* 0x0000000000007918 */
/* 0x000fc00000000000 */
/*0150*/ NOP; /* 0x0000000000007918 */
/* 0x000fc00000000000 */
/*0160*/ NOP; /* 0x0000000000007918 */
/* 0x000fc00000000000 */
/*0170*/ NOP; /* 0x0000000000007918 */
/* 0x000fc00000000000 */
.......... | .text
.amdgcn_target "amdgcn-amd-amdhsa--gfx1100"
.protected _Z3addPiS_S_
.globl _Z3addPiS_S_
.p2align 8
.type _Z3addPiS_S_,@function
_Z3addPiS_S_:
s_cmp_gt_i32 s15, 9
s_cbranch_scc1 .LBB0_2
s_load_b128 s[4:7], s[0:1], 0x0
s_mov_b32 s2, s15
s_ashr_i32 s3, s15, 31
s_load_b64 s[0:1], s[0:1], 0x10
s_lshl_b64 s[2:3], s[2:3], 2
s_waitcnt lgkmcnt(0)
s_add_u32 s4, s4, s2
s_addc_u32 s5, s5, s3
s_add_u32 s6, s6, s2
s_addc_u32 s7, s7, s3
s_load_b32 s4, s[4:5], 0x0
s_load_b32 s5, s[6:7], 0x0
s_waitcnt lgkmcnt(0)
s_add_i32 s4, s5, s4
s_delay_alu instid0(SALU_CYCLE_1)
v_dual_mov_b32 v0, 0 :: v_dual_mov_b32 v1, s4
s_add_u32 s0, s0, s2
s_addc_u32 s1, s1, s3
global_store_b32 v0, v1, s[0:1]
.LBB0_2:
s_nop 0
s_sendmsg sendmsg(MSG_DEALLOC_VGPRS)
s_endpgm
.section .rodata,"a",@progbits
.p2align 6, 0x0
.amdhsa_kernel _Z3addPiS_S_
.amdhsa_group_segment_fixed_size 0
.amdhsa_private_segment_fixed_size 0
.amdhsa_kernarg_size 24
.amdhsa_user_sgpr_count 15
.amdhsa_user_sgpr_dispatch_ptr 0
.amdhsa_user_sgpr_queue_ptr 0
.amdhsa_user_sgpr_kernarg_segment_ptr 1
.amdhsa_user_sgpr_dispatch_id 0
.amdhsa_user_sgpr_private_segment_size 0
.amdhsa_wavefront_size32 1
.amdhsa_uses_dynamic_stack 0
.amdhsa_enable_private_segment 0
.amdhsa_system_sgpr_workgroup_id_x 1
.amdhsa_system_sgpr_workgroup_id_y 0
.amdhsa_system_sgpr_workgroup_id_z 0
.amdhsa_system_sgpr_workgroup_info 0
.amdhsa_system_vgpr_workitem_id 0
.amdhsa_next_free_vgpr 2
.amdhsa_next_free_sgpr 16
.amdhsa_reserve_vcc 0
.amdhsa_float_round_mode_32 0
.amdhsa_float_round_mode_16_64 0
.amdhsa_float_denorm_mode_32 3
.amdhsa_float_denorm_mode_16_64 3
.amdhsa_dx10_clamp 1
.amdhsa_ieee_mode 1
.amdhsa_fp16_overflow 0
.amdhsa_workgroup_processor_mode 1
.amdhsa_memory_ordered 1
.amdhsa_forward_progress 0
.amdhsa_shared_vgpr_count 0
.amdhsa_exception_fp_ieee_invalid_op 0
.amdhsa_exception_fp_denorm_src 0
.amdhsa_exception_fp_ieee_div_zero 0
.amdhsa_exception_fp_ieee_overflow 0
.amdhsa_exception_fp_ieee_underflow 0
.amdhsa_exception_fp_ieee_inexact 0
.amdhsa_exception_int_div_zero 0
.end_amdhsa_kernel
.text
.Lfunc_end0:
.size _Z3addPiS_S_, .Lfunc_end0-_Z3addPiS_S_
.section .AMDGPU.csdata,"",@progbits
.text
.p2alignl 7, 3214868480
.fill 96, 4, 3214868480
.type __hip_cuid_,@object
.section .bss,"aw",@nobits
.globl __hip_cuid_
__hip_cuid_:
.byte 0
.size __hip_cuid_, 1
.ident "AMD clang version 18.0.0git (https://github.com/RadeonOpenCompute/llvm-project roc-6.3.2 25012 e5bf7e55c91490b07c49d8960fa7983d864936c4)"
.section ".note.GNU-stack","",@progbits
.addrsig
.addrsig_sym __hip_cuid_
.amdgpu_metadata
---
amdhsa.kernels:
- .args:
- .address_space: global
.offset: 0
.size: 8
.value_kind: global_buffer
- .address_space: global
.offset: 8
.size: 8
.value_kind: global_buffer
- .address_space: global
.offset: 16
.size: 8
.value_kind: global_buffer
.group_segment_fixed_size: 0
.kernarg_segment_align: 8
.kernarg_segment_size: 24
.language: OpenCL C
.language_version:
- 2
- 0
.max_flat_workgroup_size: 1024
.name: _Z3addPiS_S_
.private_segment_fixed_size: 0
.sgpr_count: 16
.sgpr_spill_count: 0
.symbol: _Z3addPiS_S_.kd
.uniform_work_group_size: 1
.uses_dynamic_stack: false
.vgpr_count: 2
.vgpr_spill_count: 0
.wavefront_size: 32
.workgroup_processor_mode: 1
amdhsa.target: amdgcn-amd-amdhsa--gfx1100
amdhsa.version:
- 1
- 2
...
.end_amdgpu_metadata |
You are a helpful coding assistant specialized in converting from CUDA host assembly to AMD host assembly. | .file "tmpxft_001a9fd7_00000000-6_parallel.cudafe1.cpp"
.text
#APP
.globl _ZSt21ios_base_library_initv
#NO_APP
.type _ZL26__cudaUnregisterBinaryUtilv, @function
_ZL26__cudaUnregisterBinaryUtilv:
.LFB3672:
.cfi_startproc
endbr64
subq $8, %rsp
.cfi_def_cfa_offset 16
movq _ZL20__cudaFatCubinHandle(%rip), %rdi
call __cudaUnregisterFatBinary@PLT
addq $8, %rsp
.cfi_def_cfa_offset 8
ret
.cfi_endproc
.LFE3672:
.size _ZL26__cudaUnregisterBinaryUtilv, .-_ZL26__cudaUnregisterBinaryUtilv
.globl _Z26__device_stub__Z3addPiS_S_PiS_S_
.type _Z26__device_stub__Z3addPiS_S_PiS_S_, @function
_Z26__device_stub__Z3addPiS_S_PiS_S_:
.LFB3694:
.cfi_startproc
endbr64
subq $136, %rsp
.cfi_def_cfa_offset 144
movq %rdi, 24(%rsp)
movq %rsi, 16(%rsp)
movq %rdx, 8(%rsp)
movq %fs:40, %rax
movq %rax, 120(%rsp)
xorl %eax, %eax
leaq 24(%rsp), %rax
movq %rax, 96(%rsp)
leaq 16(%rsp), %rax
movq %rax, 104(%rsp)
leaq 8(%rsp), %rax
movq %rax, 112(%rsp)
movl $1, 48(%rsp)
movl $1, 52(%rsp)
movl $1, 56(%rsp)
movl $1, 60(%rsp)
movl $1, 64(%rsp)
movl $1, 68(%rsp)
leaq 40(%rsp), %rcx
leaq 32(%rsp), %rdx
leaq 60(%rsp), %rsi
leaq 48(%rsp), %rdi
call __cudaPopCallConfiguration@PLT
testl %eax, %eax
je .L7
.L3:
movq 120(%rsp), %rax
subq %fs:40, %rax
jne .L8
addq $136, %rsp
.cfi_remember_state
.cfi_def_cfa_offset 8
ret
.L7:
.cfi_restore_state
pushq 40(%rsp)
.cfi_def_cfa_offset 152
pushq 40(%rsp)
.cfi_def_cfa_offset 160
leaq 112(%rsp), %r9
movq 76(%rsp), %rcx
movl 84(%rsp), %r8d
movq 64(%rsp), %rsi
movl 72(%rsp), %edx
leaq _Z3addPiS_S_(%rip), %rdi
call cudaLaunchKernel@PLT
addq $16, %rsp
.cfi_def_cfa_offset 144
jmp .L3
.L8:
call __stack_chk_fail@PLT
.cfi_endproc
.LFE3694:
.size _Z26__device_stub__Z3addPiS_S_PiS_S_, .-_Z26__device_stub__Z3addPiS_S_PiS_S_
.globl _Z3addPiS_S_
.type _Z3addPiS_S_, @function
_Z3addPiS_S_:
.LFB3695:
.cfi_startproc
endbr64
subq $8, %rsp
.cfi_def_cfa_offset 16
call _Z26__device_stub__Z3addPiS_S_PiS_S_
addq $8, %rsp
.cfi_def_cfa_offset 8
ret
.cfi_endproc
.LFE3695:
.size _Z3addPiS_S_, .-_Z3addPiS_S_
.section .rodata.str1.1,"aMS",@progbits,1
.LC0:
.string "%d + %d = %d\n"
.text
.globl main
.type main, @function
main:
.LFB3669:
.cfi_startproc
endbr64
pushq %rbp
.cfi_def_cfa_offset 16
.cfi_offset 6, -16
pushq %rbx
.cfi_def_cfa_offset 24
.cfi_offset 3, -24
subq $200, %rsp
.cfi_def_cfa_offset 224
movq %fs:40, %rax
movq %rax, 184(%rsp)
xorl %eax, %eax
movq %rsp, %rdi
movl $40, %esi
call cudaMalloc@PLT
leaq 8(%rsp), %rdi
movl $40, %esi
call cudaMalloc@PLT
leaq 16(%rsp), %rdi
movl $40, %esi
call cudaMalloc@PLT
movl $0, %eax
.L12:
movl %eax, 48(%rsp,%rax,4)
movl %eax, 96(%rsp,%rax,4)
addq $1, %rax
cmpq $10, %rax
jne .L12
leaq 48(%rsp), %rsi
movl $1, %ecx
movl $40, %edx
movq (%rsp), %rdi
call cudaMemcpy@PLT
leaq 96(%rsp), %rsi
movl $1, %ecx
movl $40, %edx
movq 8(%rsp), %rdi
call cudaMemcpy@PLT
movl $1, 36(%rsp)
movl $1, 40(%rsp)
movl $1, 44(%rsp)
movl $10, 24(%rsp)
movl $1, 28(%rsp)
movl $1, 32(%rsp)
movl $0, %r9d
movl $0, %r8d
movq 36(%rsp), %rdx
movl $1, %ecx
movq 24(%rsp), %rdi
movl $1, %esi
call __cudaPushCallConfiguration@PLT
testl %eax, %eax
je .L19
.L13:
leaq 144(%rsp), %rdi
movl $2, %ecx
movl $40, %edx
movq 16(%rsp), %rsi
call cudaMemcpy@PLT
movq (%rsp), %rdi
call cudaFree@PLT
movq 8(%rsp), %rdi
call cudaFree@PLT
movq 16(%rsp), %rdi
call cudaFree@PLT
movl $0, %ebx
leaq .LC0(%rip), %rbp
.L14:
movl 96(%rsp,%rbx), %ecx
movl 48(%rsp,%rbx), %edx
movl 144(%rsp,%rbx), %r8d
movq %rbp, %rsi
movl $2, %edi
movl $0, %eax
call __printf_chk@PLT
addq $4, %rbx
cmpq $40, %rbx
jne .L14
movq 184(%rsp), %rax
subq %fs:40, %rax
jne .L20
movl $0, %eax
addq $200, %rsp
.cfi_remember_state
.cfi_def_cfa_offset 24
popq %rbx
.cfi_def_cfa_offset 16
popq %rbp
.cfi_def_cfa_offset 8
ret
.L19:
.cfi_restore_state
movq 16(%rsp), %rdx
movq 8(%rsp), %rsi
movq (%rsp), %rdi
call _Z26__device_stub__Z3addPiS_S_PiS_S_
jmp .L13
.L20:
call __stack_chk_fail@PLT
.cfi_endproc
.LFE3669:
.size main, .-main
.section .rodata.str1.1
.LC1:
.string "_Z3addPiS_S_"
.text
.type _ZL24__sti____cudaRegisterAllv, @function
_ZL24__sti____cudaRegisterAllv:
.LFB3697:
.cfi_startproc
endbr64
subq $8, %rsp
.cfi_def_cfa_offset 16
leaq _ZL15__fatDeviceText(%rip), %rdi
call __cudaRegisterFatBinary@PLT
movq %rax, %rdi
movq %rax, _ZL20__cudaFatCubinHandle(%rip)
pushq $0
.cfi_def_cfa_offset 24
pushq $0
.cfi_def_cfa_offset 32
pushq $0
.cfi_def_cfa_offset 40
pushq $0
.cfi_def_cfa_offset 48
movl $0, %r9d
movl $-1, %r8d
leaq .LC1(%rip), %rdx
movq %rdx, %rcx
leaq _Z3addPiS_S_(%rip), %rsi
call __cudaRegisterFunction@PLT
addq $32, %rsp
.cfi_def_cfa_offset 16
movq _ZL20__cudaFatCubinHandle(%rip), %rdi
call __cudaRegisterFatBinaryEnd@PLT
leaq _ZL26__cudaUnregisterBinaryUtilv(%rip), %rdi
call atexit@PLT
addq $8, %rsp
.cfi_def_cfa_offset 8
ret
.cfi_endproc
.LFE3697:
.size _ZL24__sti____cudaRegisterAllv, .-_ZL24__sti____cudaRegisterAllv
.section .init_array,"aw"
.align 8
.quad _ZL24__sti____cudaRegisterAllv
.section .nvFatBinSegment,"aw"
.align 8
.type _ZL15__fatDeviceText, @object
.size _ZL15__fatDeviceText, 24
_ZL15__fatDeviceText:
.long 1180844977
.long 1
.quad fatbinData
.quad 0
.local _ZL20__cudaFatCubinHandle
.comm _ZL20__cudaFatCubinHandle,8,8
.ident "GCC: (Ubuntu 13.3.0-6ubuntu2~24.04) 13.3.0"
.section .note.GNU-stack,"",@progbits
.section .note.gnu.property,"a"
.align 8
.long 1f - 0f
.long 4f - 1f
.long 5
0:
.string "GNU"
1:
.align 8
.long 0xc0000002
.long 3f - 2f
2:
.long 0x3
3:
.align 8
4: | .text
.file "parallel.hip"
# Start of file scope inline assembly
.globl _ZSt21ios_base_library_initv
# End of file scope inline assembly
.globl _Z18__device_stub__addPiS_S_ # -- Begin function _Z18__device_stub__addPiS_S_
.p2align 4, 0x90
.type _Z18__device_stub__addPiS_S_,@function
_Z18__device_stub__addPiS_S_: # @_Z18__device_stub__addPiS_S_
.cfi_startproc
# %bb.0:
subq $104, %rsp
.cfi_def_cfa_offset 112
movq %rdi, 72(%rsp)
movq %rsi, 64(%rsp)
movq %rdx, 56(%rsp)
leaq 72(%rsp), %rax
movq %rax, 80(%rsp)
leaq 64(%rsp), %rax
movq %rax, 88(%rsp)
leaq 56(%rsp), %rax
movq %rax, 96(%rsp)
leaq 40(%rsp), %rdi
leaq 24(%rsp), %rsi
leaq 16(%rsp), %rdx
leaq 8(%rsp), %rcx
callq __hipPopCallConfiguration
movq 40(%rsp), %rsi
movl 48(%rsp), %edx
movq 24(%rsp), %rcx
movl 32(%rsp), %r8d
leaq 80(%rsp), %r9
movl $_Z3addPiS_S_, %edi
pushq 8(%rsp)
.cfi_adjust_cfa_offset 8
pushq 24(%rsp)
.cfi_adjust_cfa_offset 8
callq hipLaunchKernel
addq $120, %rsp
.cfi_adjust_cfa_offset -120
retq
.Lfunc_end0:
.size _Z18__device_stub__addPiS_S_, .Lfunc_end0-_Z18__device_stub__addPiS_S_
.cfi_endproc
# -- End function
.globl main # -- Begin function main
.p2align 4, 0x90
.type main,@function
main: # @main
.cfi_startproc
# %bb.0:
pushq %rbx
.cfi_def_cfa_offset 16
subq $240, %rsp
.cfi_def_cfa_offset 256
.cfi_offset %rbx, -16
leaq 16(%rsp), %rdi
movl $40, %esi
callq hipMalloc
leaq 8(%rsp), %rdi
movl $40, %esi
callq hipMalloc
movq %rsp, %rdi
movl $40, %esi
callq hipMalloc
xorl %eax, %eax
.p2align 4, 0x90
.LBB1_1: # =>This Inner Loop Header: Depth=1
movl %eax, 192(%rsp,%rax,4)
movl %eax, 144(%rsp,%rax,4)
incq %rax
cmpq $10, %rax
jne .LBB1_1
# %bb.2:
movq 16(%rsp), %rdi
leaq 192(%rsp), %rsi
movl $40, %edx
movl $1, %ecx
callq hipMemcpy
movq 8(%rsp), %rdi
leaq 144(%rsp), %rsi
movl $40, %edx
movl $1, %ecx
callq hipMemcpy
movabsq $4294967297, %rdx # imm = 0x100000001
leaq 9(%rdx), %rdi
movl $1, %esi
movl $1, %ecx
xorl %r8d, %r8d
xorl %r9d, %r9d
callq __hipPushCallConfiguration
testl %eax, %eax
jne .LBB1_4
# %bb.3:
movq 16(%rsp), %rax
movq 8(%rsp), %rcx
movq (%rsp), %rdx
movq %rax, 88(%rsp)
movq %rcx, 80(%rsp)
movq %rdx, 72(%rsp)
leaq 88(%rsp), %rax
movq %rax, 96(%rsp)
leaq 80(%rsp), %rax
movq %rax, 104(%rsp)
leaq 72(%rsp), %rax
movq %rax, 112(%rsp)
leaq 56(%rsp), %rdi
leaq 40(%rsp), %rsi
leaq 32(%rsp), %rdx
leaq 24(%rsp), %rcx
callq __hipPopCallConfiguration
movq 56(%rsp), %rsi
movl 64(%rsp), %edx
movq 40(%rsp), %rcx
movl 48(%rsp), %r8d
leaq 96(%rsp), %r9
movl $_Z3addPiS_S_, %edi
pushq 24(%rsp)
.cfi_adjust_cfa_offset 8
pushq 40(%rsp)
.cfi_adjust_cfa_offset 8
callq hipLaunchKernel
addq $16, %rsp
.cfi_adjust_cfa_offset -16
.LBB1_4:
movq (%rsp), %rsi
leaq 96(%rsp), %rdi
movl $40, %edx
movl $2, %ecx
callq hipMemcpy
movq 16(%rsp), %rdi
callq hipFree
movq 8(%rsp), %rdi
callq hipFree
movq (%rsp), %rdi
callq hipFree
xorl %ebx, %ebx
.p2align 4, 0x90
.LBB1_5: # =>This Inner Loop Header: Depth=1
movl 192(%rsp,%rbx,4), %esi
movl 144(%rsp,%rbx,4), %edx
movl 96(%rsp,%rbx,4), %ecx
movl $.L.str, %edi
xorl %eax, %eax
callq printf
incq %rbx
cmpq $10, %rbx
jne .LBB1_5
# %bb.6:
xorl %eax, %eax
addq $240, %rsp
.cfi_def_cfa_offset 16
popq %rbx
.cfi_def_cfa_offset 8
retq
.Lfunc_end1:
.size main, .Lfunc_end1-main
.cfi_endproc
# -- End function
.p2align 4, 0x90 # -- Begin function __hip_module_ctor
.type __hip_module_ctor,@function
__hip_module_ctor: # @__hip_module_ctor
.cfi_startproc
# %bb.0:
subq $40, %rsp
.cfi_def_cfa_offset 48
cmpq $0, __hip_gpubin_handle(%rip)
jne .LBB2_2
# %bb.1:
movl $__hip_fatbin_wrapper, %edi
callq __hipRegisterFatBinary
movq %rax, __hip_gpubin_handle(%rip)
.LBB2_2:
movq __hip_gpubin_handle(%rip), %rdi
xorps %xmm0, %xmm0
movups %xmm0, 16(%rsp)
movups %xmm0, (%rsp)
movl $_Z3addPiS_S_, %esi
movl $.L__unnamed_1, %edx
movl $.L__unnamed_1, %ecx
movl $-1, %r8d
xorl %r9d, %r9d
callq __hipRegisterFunction
movl $__hip_module_dtor, %edi
addq $40, %rsp
.cfi_def_cfa_offset 8
jmp atexit # TAILCALL
.Lfunc_end2:
.size __hip_module_ctor, .Lfunc_end2-__hip_module_ctor
.cfi_endproc
# -- End function
.p2align 4, 0x90 # -- Begin function __hip_module_dtor
.type __hip_module_dtor,@function
__hip_module_dtor: # @__hip_module_dtor
.cfi_startproc
# %bb.0:
movq __hip_gpubin_handle(%rip), %rdi
testq %rdi, %rdi
je .LBB3_2
# %bb.1:
pushq %rax
.cfi_def_cfa_offset 16
callq __hipUnregisterFatBinary
movq $0, __hip_gpubin_handle(%rip)
addq $8, %rsp
.cfi_def_cfa_offset 8
.LBB3_2:
retq
.Lfunc_end3:
.size __hip_module_dtor, .Lfunc_end3-__hip_module_dtor
.cfi_endproc
# -- End function
.type _Z3addPiS_S_,@object # @_Z3addPiS_S_
.section .rodata,"a",@progbits
.globl _Z3addPiS_S_
.p2align 3, 0x0
_Z3addPiS_S_:
.quad _Z18__device_stub__addPiS_S_
.size _Z3addPiS_S_, 8
.type .L.str,@object # @.str
.section .rodata.str1.1,"aMS",@progbits,1
.L.str:
.asciz "%d + %d = %d\n"
.size .L.str, 14
.type .L__unnamed_1,@object # @0
.L__unnamed_1:
.asciz "_Z3addPiS_S_"
.size .L__unnamed_1, 13
.type __hip_fatbin_wrapper,@object # @__hip_fatbin_wrapper
.section .hipFatBinSegment,"a",@progbits
.p2align 3, 0x0
__hip_fatbin_wrapper:
.long 1212764230 # 0x48495046
.long 1 # 0x1
.quad __hip_fatbin
.quad 0
.size __hip_fatbin_wrapper, 24
.type __hip_gpubin_handle,@object # @__hip_gpubin_handle
.local __hip_gpubin_handle
.comm __hip_gpubin_handle,8,8
.section .init_array,"aw",@init_array
.p2align 3, 0x0
.quad __hip_module_ctor
.type __hip_cuid_,@object # @__hip_cuid_
.bss
.globl __hip_cuid_
__hip_cuid_:
.byte 0 # 0x0
.size __hip_cuid_, 1
.section ".linker-options","e",@llvm_linker_options
.ident "AMD clang version 18.0.0git (https://github.com/RadeonOpenCompute/llvm-project roc-6.3.2 25012 e5bf7e55c91490b07c49d8960fa7983d864936c4)"
.section ".note.GNU-stack","",@progbits
.addrsig
.addrsig_sym _Z18__device_stub__addPiS_S_
.addrsig_sym __hip_module_ctor
.addrsig_sym __hip_module_dtor
.addrsig_sym _Z3addPiS_S_
.addrsig_sym __hip_fatbin
.addrsig_sym __hip_fatbin_wrapper
.addrsig_sym __hip_cuid_ |
You are a helpful coding assistant specialized in converting CUDA source code to CUDA device assembly. | #include <iostream>
#include <iomanip>
#include <vector>
#include <string>
#include <fstream>
using namespace std;
void Linspace(double*, double, double, int);
void Uniform(double*, double, int);
__global__ void RungeKuttaStepOriginal(double* __restrict__, const double* __restrict__, int);
__global__ void RungeKuttaStepRegisterFriendly(double* __restrict__, const double* __restrict__, int);
__device__ void Lorenz(double* __restrict__, const double* __restrict__, double);
template <class DataType>
DataType* AllocateHostMemory(int);
template <class DataType>
DataType* AllocateDeviceMemory(int);
int main()
{
// INITIAL SETUP ----------------------------------------------------------------------------------
int NumberOfProblems = 768000;
int NumberOfThreads = NumberOfProblems;
int BlockSize = 64;
cudaSetDevice(1);
double* h_State = AllocateHostMemory<double>( 3*NumberOfProblems );
double* h_Parameters = AllocateHostMemory<double>( NumberOfProblems );
double* d_State = AllocateDeviceMemory<double>( 3*NumberOfProblems );
double* d_Parameters = AllocateDeviceMemory<double>( NumberOfProblems );
Linspace(h_Parameters, 0.0, 21.0, NumberOfProblems);
Uniform(h_State, 10.0, NumberOfProblems);
Uniform(&h_State[ NumberOfProblems ], 10.0, NumberOfProblems);
Uniform(&h_State[ 2*NumberOfProblems ], 10.0, NumberOfProblems);
cudaMemcpy(d_State, h_State, 3*sizeof(double)*NumberOfProblems, cudaMemcpyHostToDevice);
cudaMemcpy(d_Parameters, h_Parameters, sizeof(double)*NumberOfProblems, cudaMemcpyHostToDevice);
int GridSize = NumberOfThreads/BlockSize + (NumberOfThreads % BlockSize == 0 ? 0:1);
clock_t SimulationStart;
clock_t SimulationEnd;
SimulationStart = clock();
RungeKuttaStepRegisterFriendly<<<GridSize, BlockSize>>> (d_State, d_Parameters, NumberOfProblems);
cudaDeviceSynchronize();
SimulationEnd = clock();
cout << "Simulation time: " << 1000.0*(SimulationEnd-SimulationStart) / CLOCKS_PER_SEC << "ms" << endl << endl;
cout << "Simulation time / 1000 RK4 step: " << 1000.0*(SimulationEnd-SimulationStart) / CLOCKS_PER_SEC << "ms" << endl;
cout << "Ensemble size: " << NumberOfProblems << endl << endl;
cudaMemcpyAsync(h_State, d_State, 3*sizeof(double)*NumberOfProblems, cudaMemcpyDeviceToHost);
//for (int i=0; i<NumberOfProblems; i++)
// cout << "P: " << h_Parameters[i] << " Sates: " << h_State[i] << ", " << h_State[i+NumberOfProblems] << ", " << h_State[i+2*NumberOfProblems] << endl;
}
// AUXILIARY FUNCTION -----------------------------------------------------------------------------
void Linspace(double* x, double B, double E, int N)
{
double Increment;
x[0] = B;
if ( N>1 )
{
x[N-1] = E;
Increment = (E-B)/(N-1);
for (int i=1; i<N-1; i++)
{
x[i] = B + i*Increment;
}
}
}
void Uniform(double* x, double V, int N)
{
for (int i=0; i<N; i++)
{
x[i] = V;
}
}
__forceinline__ __device__ void Lorenz(double* __restrict__ F, const double* __restrict__ X, double P)
{
F[0] = 10.0*(X[1] - X[0]);
F[1] = P*X[0] - X[1] - X[0]*X[2];
F[2] = X[0]*X[1] - 2.666 * X[2];
}
__global__ void RungeKuttaStepRegisterFriendly(double* __restrict__ d_State, const double* __restrict__ d_Parameters, int N)
{
int tid = threadIdx.x + blockIdx.x*blockDim.x;
if (tid < N)
{
double X[3];
double P;
double k1[3];
double ks[3];
double x[3];
double dT = 1e-3;
double dTp2 = 0.5*dT;
double dTp6 = dT * (1.0/6.0);
X[0] = d_State[tid];
X[1] = d_State[tid + N];
X[2] = d_State[tid + 2*N];
P = d_Parameters[tid];
for (int i=0; i<1000; i++)
{
Lorenz(k1, X, P);
#pragma unroll 3
for (int j=0; j<3; j++)
{
x[j] = X[j] + dTp2*k1[j];
ks[j] = k1[j];
}
Lorenz(k1, x, P);
#pragma unroll 3
for (int j=0; j<3; j++)
{
x[j] = X[j] + dTp2*k1[j];
ks[j] = ks[j]+2.0*k1[j];
}
Lorenz(k1, x, P);
#pragma unroll 3
for (int j=0; j<3; j++)
{
x[j] = X[j] + dT*k1[j];
ks[j] = ks[j]+2.0*k1[j];
}
Lorenz(k1, x, P);
#pragma unroll 3
for (int j=0; j<3; j++)
X[j] = X[j] + dTp6*( ks[j] + k1[j] );
}
d_State[tid] = X[0];
d_State[tid + N] = X[1];
d_State[tid + 2*N] = X[2];
}
}
template <class DataType>
DataType* AllocateHostMemory(int N)
{
DataType* HostMemory = new (std::nothrow) DataType [N];
if (HostMemory == NULL)
{
std::cerr << "Failed to allocate Memory on the HOST!\n";
exit(EXIT_FAILURE);
}
return HostMemory;
}
template <class DataType>
DataType* AllocateDeviceMemory(int N)
{
cudaError_t Error = cudaSuccess;
DataType* MemoryAddressInDevice = NULL;
Error = cudaMalloc((void**)&MemoryAddressInDevice, N * sizeof(DataType));
if (Error != cudaSuccess)
{
std::cerr << "Failed to allocate Memory on the DEVICE!\n";
exit(EXIT_FAILURE);
}
return MemoryAddressInDevice;
} | code for sm_80
Function : _Z30RungeKuttaStepRegisterFriendlyPdPKdi
.headerflags @"EF_CUDA_TEXMODE_UNIFIED EF_CUDA_64BIT_ADDRESS EF_CUDA_SM80 EF_CUDA_VIRTUAL_SM(EF_CUDA_SM80)"
/*0000*/ MOV R1, c[0x0][0x28] ; /* 0x00000a0000017a02 */
/* 0x000fe40000000f00 */
/*0010*/ S2R R8, SR_CTAID.X ; /* 0x0000000000087919 */
/* 0x000e280000002500 */
/*0020*/ S2R R3, SR_TID.X ; /* 0x0000000000037919 */
/* 0x000e240000002100 */
/*0030*/ IMAD R8, R8, c[0x0][0x0], R3 ; /* 0x0000000008087a24 */
/* 0x001fca00078e0203 */
/*0040*/ ISETP.GE.AND P0, PT, R8, c[0x0][0x170], PT ; /* 0x00005c0008007a0c */
/* 0x000fda0003f06270 */
/*0050*/ @P0 EXIT ; /* 0x000000000000094d */
/* 0x000fea0003800000 */
/*0060*/ HFMA2.MMA R7, -RZ, RZ, 0, 4.76837158203125e-07 ; /* 0x00000008ff077435 */
/* 0x000fe200000001ff */
/*0070*/ MOV R5, c[0x0][0x170] ; /* 0x00005c0000057a02 */
/* 0x000fe20000000f00 */
/*0080*/ ULDC.64 UR4, c[0x0][0x118] ; /* 0x0000460000047ab9 */
/* 0x000fc60000000a00 */
/*0090*/ LEA R6, R5, R8, 0x1 ; /* 0x0000000805067211 */
/* 0x000fca00078e08ff */
/*00a0*/ IMAD.WIDE R2, R8, R7, c[0x0][0x160] ; /* 0x0000580008027625 */
/* 0x000fc800078e0207 */
/*00b0*/ IMAD.WIDE R8, R8, R7.reuse, c[0x0][0x168] ; /* 0x00005a0008087625 */
/* 0x080fe200078e0207 */
/*00c0*/ LDG.E.64 R14, [R2.64] ; /* 0x00000004020e7981 */
/* 0x000166000c1e1b00 */
/*00d0*/ IMAD.WIDE R4, R7, c[0x0][0x170], R2 ; /* 0x00005c0007047a25 */
/* 0x000fe400078e0202 */
/*00e0*/ LDG.E.64.CONSTANT R8, [R8.64] ; /* 0x0000000408087981 */
/* 0x000f64000c1e9b00 */
/*00f0*/ IMAD.WIDE R6, R6, R7, c[0x0][0x160] ; /* 0x0000580006067625 */
/* 0x000fe400078e0207 */
/*0100*/ LDG.E.64 R12, [R4.64] ; /* 0x00000004040c7981 */
/* 0x000168000c1e1b00 */
/*0110*/ LDG.E.64 R10, [R6.64] ; /* 0x00000004060a7981 */
/* 0x000162000c1e1b00 */
/*0120*/ HFMA2.MMA R0, -RZ, RZ, 0, 0 ; /* 0x00000000ff007435 */
/* 0x000fd200000001ff */
/*0130*/ DADD R20, R12, -R14 ; /* 0x000000000c147229 */
/* 0x028e62000000080e */
/*0140*/ IADD3 R0, R0, 0x2, RZ ; /* 0x0000000200007810 */
/* 0x000fc60007ffe0ff */
/*0150*/ DFMA R18, R8, R14, -R12 ; /* 0x0000000e0812722b */
/* 0x004ea2000000080c */
/*0160*/ ISETP.NE.AND P0, PT, R0, 0x3e8, PT ; /* 0x000003e80000780c */
/* 0x000fc60003f05270 */
/*0170*/ DMUL R16, R10, c[0x2][0x0] ; /* 0x008000000a107a28 */
/* 0x000ec80000000000 */
/*0180*/ DMUL R20, R20, 10 ; /* 0x4024000014147828 */
/* 0x002e480000000000 */
/*0190*/ DFMA R18, R10, -R14, R18 ; /* 0x8000000e0a12722b */
/* 0x004e880000000012 */
/*01a0*/ DFMA R16, R12, R14, -R16 ; /* 0x0000000e0c10722b */
/* 0x008ec80000000810 */
/*01b0*/ DFMA R24, R20, c[0x2][0x8], R14 ; /* 0x0080020014187a2b */
/* 0x002fc8000000000e */
/*01c0*/ DFMA R26, R18, c[0x2][0x8], R12 ; /* 0x00800200121a7a2b */
/* 0x004e48000000000c */
/*01d0*/ DFMA R28, R16, c[0x2][0x8], R10 ; /* 0x00800200101c7a2b */
/* 0x008fc8000000000a */
/*01e0*/ DFMA R22, R8, R24, -R26 ; /* 0x000000180816722b */
/* 0x002e48000000081a */
/*01f0*/ DADD R30, -R24, R26 ; /* 0x00000000181e7229 */
/* 0x000e88000000011a */
/*0200*/ DFMA R22, -R24, R28, R22 ; /* 0x0000001c1816722b */
/* 0x002fc80000000116 */
/*0210*/ DMUL R28, R28, c[0x2][0x0] ; /* 0x008000001c1c7a28 */
/* 0x000e480000000000 */
/*0220*/ DMUL R30, R30, 10 ; /* 0x402400001e1e7828 */
/* 0x004e880000000000 */
/*0230*/ DFMA R24, R24, R26, -R28 ; /* 0x0000001a1818722b */
/* 0x002e48000000081c */
/*0240*/ DFMA R26, R30, c[0x2][0x8], R14 ; /* 0x008002001e1a7a2b */
/* 0x004fc8000000000e */
/*0250*/ DFMA R28, R22, c[0x2][0x8], R12 ; /* 0x00800200161c7a2b */
/* 0x000e88000000000c */
/*0260*/ DFMA R18, R22, 2, R18 ; /* 0x400000001612782b */
/* 0x000fc80000000012 */
/*0270*/ DFMA R16, R24, 2, R16 ; /* 0x400000001810782b */
/* 0x002fc80000000010 */
/*0280*/ DFMA R24, R24, c[0x2][0x8], R10 ; /* 0x0080020018187a2b */
/* 0x000fc8000000000a */
/*0290*/ DFMA R22, R8, R26, -R28 ; /* 0x0000001a0816722b */
/* 0x004e48000000081c */
/*02a0*/ DFMA R20, R30, 2, R20 ; /* 0x400000001e14782b */
/* 0x000fc80000000014 */
/*02b0*/ DADD R30, -R26, R28 ; /* 0x000000001a1e7229 */
/* 0x000e88000000011c */
/*02c0*/ DFMA R22, -R26, R24, R22 ; /* 0x000000181a16722b */
/* 0x002fc80000000116 */
/*02d0*/ DMUL R24, R24, c[0x2][0x0] ; /* 0x0080000018187a28 */
/* 0x000e480000000000 */
/*02e0*/ DMUL R30, R30, 10 ; /* 0x402400001e1e7828 */
/* 0x004e880000000000 */
/*02f0*/ DFMA R28, R26, R28, -R24 ; /* 0x0000001c1a1c722b */
/* 0x002e480000000818 */
/*0300*/ DFMA R26, R30, c[0x2][0x10], R14 ; /* 0x008004001e1a7a2b */
/* 0x004fc8000000000e */
/*0310*/ DFMA R24, R22, c[0x2][0x10], R12 ; /* 0x0080040016187a2b */
/* 0x000e88000000000c */
/*0320*/ DFMA R20, R30, 2, R20 ; /* 0x400000001e14782b */
/* 0x000fc80000000014 */
/*0330*/ DFMA R18, R22, 2, R18 ; /* 0x400000001612782b */
/* 0x000fc80000000012 */
/*0340*/ DFMA R30, R28, c[0x2][0x10], R10 ; /* 0x008004001c1e7a2b */
/* 0x002fc8000000000a */
/*0350*/ DFMA R22, R8, R26, -R24 ; /* 0x0000001a0816722b */
/* 0x004e480000000818 */
/*0360*/ DFMA R16, R28, 2, R16 ; /* 0x400000001c10782b */
/* 0x000fc80000000010 */
/*0370*/ DFMA R22, -R26, R30, R22 ; /* 0x0000001e1a16722b */
/* 0x002fc80000000116 */
/*0380*/ DMUL R30, R30, c[0x2][0x0] ; /* 0x008000001e1e7a28 */
/* 0x000e480000000000 */
/*0390*/ DADD R28, -R26, R24 ; /* 0x000000001a1c7229 */
/* 0x000e880000000118 */
/*03a0*/ DFMA R30, R26, R24, -R30 ; /* 0x000000181a1e722b */
/* 0x002e48000000081e */
/*03b0*/ DFMA R20, R28, 10, R20 ; /* 0x402400001c14782b */
/* 0x004e880000000014 */
/*03c0*/ DADD R18, R18, R22 ; /* 0x0000000012127229 */
/* 0x000ec80000000016 */
/*03d0*/ DADD R16, R16, R30 ; /* 0x0000000010107229 */
/* 0x002e48000000001e */
/*03e0*/ DFMA R14, R20, c[0x2][0x18], R14 ; /* 0x00800600140e7a2b */
/* 0x004fc8000000000e */
/*03f0*/ DFMA R12, R18, c[0x2][0x18], R12 ; /* 0x00800600120c7a2b */
/* 0x008e88000000000c */
/*0400*/ DFMA R10, R16, c[0x2][0x18], R10 ; /* 0x00800600100a7a2b */
/* 0x002e48000000000a */
/*0410*/ DADD R16, -R14, R12 ; /* 0x000000000e107229 */
/* 0x004e88000000010c */
/*0420*/ DFMA R18, R8, R14, -R12 ; /* 0x0000000e0812722b */
/* 0x000ec8000000080c */
/*0430*/ DMUL R20, R10, c[0x2][0x0] ; /* 0x008000000a147a28 */
/* 0x002e480000000000 */
/*0440*/ DMUL R16, R16, 10 ; /* 0x4024000010107828 */
/* 0x004e880000000000 */
/*0450*/ DFMA R18, -R14, R10, R18 ; /* 0x0000000a0e12722b */
/* 0x008ec80000000112 */
/*0460*/ DFMA R20, R14, R12, -R20 ; /* 0x0000000c0e14722b */
/* 0x002e480000000814 */
/*0470*/ DFMA R26, R16, c[0x2][0x8], R14 ; /* 0x00800200101a7a2b */
/* 0x004fc8000000000e */
/*0480*/ DFMA R22, R18, c[0x2][0x8], R12 ; /* 0x0080020012167a2b */
/* 0x008e88000000000c */
/*0490*/ DFMA R28, R20, c[0x2][0x8], R10 ; /* 0x00800200141c7a2b */
/* 0x002fc8000000000a */
/*04a0*/ DFMA R24, R8, R26, -R22 ; /* 0x0000001a0818722b */
/* 0x004e480000000816 */
/*04b0*/ DADD R30, -R26, R22 ; /* 0x000000001a1e7229 */
/* 0x000e880000000116 */
/*04c0*/ DFMA R24, -R26, R28, R24 ; /* 0x0000001c1a18722b */
/* 0x002fc80000000118 */
/*04d0*/ DMUL R28, R28, c[0x2][0x0] ; /* 0x008000001c1c7a28 */
/* 0x000e480000000000 */
/*04e0*/ DMUL R30, R30, 10 ; /* 0x402400001e1e7828 */
/* 0x004e880000000000 */
/*04f0*/ DFMA R26, R26, R22, -R28 ; /* 0x000000161a1a722b */
/* 0x002e48000000081c */
/*0500*/ DFMA R18, R24, 2, R18 ; /* 0x400000001812782b */
/* 0x000fc80000000012 */
/*0510*/ DFMA R22, R30, c[0x2][0x8], R14 ; /* 0x008002001e167a2b */
/* 0x004fc8000000000e */
/*0520*/ DFMA R24, R24, c[0x2][0x8], R12 ; /* 0x0080020018187a2b */
/* 0x000e88000000000c */
/*0530*/ DFMA R20, R26, 2, R20 ; /* 0x400000001a14782b */
/* 0x002fc80000000014 */
/*0540*/ DFMA R26, R26, c[0x2][0x8], R10 ; /* 0x008002001a1a7a2b */
/* 0x000fc8000000000a */
/*0550*/ DFMA R28, R8, R22, -R24 ; /* 0x00000016081c722b */
/* 0x004e480000000818 */
/*0560*/ DFMA R16, R30, 2, R16 ; /* 0x400000001e10782b */
/* 0x000fc80000000010 */
/*0570*/ DADD R30, -R22, R24 ; /* 0x00000000161e7229 */
/* 0x000e880000000118 */
/*0580*/ DFMA R28, -R22, R26, R28 ; /* 0x0000001a161c722b */
/* 0x002fc8000000011c */
/*0590*/ DMUL R26, R26, c[0x2][0x0] ; /* 0x008000001a1a7a28 */
/* 0x000e480000000000 */
/*05a0*/ DMUL R30, R30, 10 ; /* 0x402400001e1e7828 */
/* 0x004e880000000000 */
/*05b0*/ DFMA R26, R22, R24, -R26 ; /* 0x00000018161a722b */
/* 0x002fc8000000081a */
/*05c0*/ DFMA R24, R30, c[0x2][0x10], R14 ; /* 0x008004001e187a2b */
/* 0x004fc8000000000e */
/*05d0*/ DFMA R22, R28, c[0x2][0x10], R12 ; /* 0x008004001c167a2b */
/* 0x000e48000000000c */
/*05e0*/ DFMA R16, R30, 2, R16 ; /* 0x400000001e10782b */
/* 0x000fc80000000010 */
/*05f0*/ DADD R30, -R24, R22 ; /* 0x00000000181e7229 */
/* 0x002e480000000116 */
/*0600*/ DFMA R20, R26, 2, R20 ; /* 0x400000001a14782b */
/* 0x000fc80000000014 */
/*0610*/ DFMA R26, R26, c[0x2][0x10], R10 ; /* 0x008004001a1a7a2b */
/* 0x000e88000000000a */
/*0620*/ DFMA R18, R28, 2, R18 ; /* 0x400000001c12782b */
/* 0x000fc80000000012 */
/*0630*/ DFMA R16, R30, 10, R16 ; /* 0x402400001e10782b */
/* 0x002fc80000000010 */
/*0640*/ DFMA R28, R8, R24, -R22 ; /* 0x00000018081c722b */
/* 0x000e480000000816 */
/*0650*/ DMUL R30, R26, c[0x2][0x0] ; /* 0x008000001a1e7a28 */
/* 0x004e880000000000 */
/*0660*/ DFMA R28, -R24, R26, R28 ; /* 0x0000001a181c722b */
/* 0x002e48000000011c */
/*0670*/ DFMA R30, R24, R22, -R30 ; /* 0x00000016181e722b */
/* 0x004e88000000081e */
/*0680*/ DADD R18, R18, R28 ; /* 0x0000000012127229 */
/* 0x002e48000000001c */
/*0690*/ DADD R20, R20, R30 ; /* 0x0000000014147229 */
/* 0x004e88000000001e */
/*06a0*/ DFMA R14, R16, c[0x2][0x18], R14 ; /* 0x00800600100e7a2b */
/* 0x000708000000000e */
/*06b0*/ DFMA R12, R18, c[0x2][0x18], R12 ; /* 0x00800600120c7a2b */
/* 0x002648000000000c */
/*06c0*/ DFMA R10, R20, c[0x2][0x18], R10 ; /* 0x00800600140a7a2b */
/* 0x0046a2000000000a */
/*06d0*/ @P0 BRA 0x130 ; /* 0xfffffa5000000947 */
/* 0x012fea000383ffff */
/*06e0*/ STG.E.64 [R2.64], R14 ; /* 0x0000000e02007986 */
/* 0x000fe8000c101b04 */
/*06f0*/ STG.E.64 [R4.64], R12 ; /* 0x0000000c04007986 */
/* 0x000fe8000c101b04 */
/*0700*/ STG.E.64 [R6.64], R10 ; /* 0x0000000a06007986 */
/* 0x004fe2000c101b04 */
/*0710*/ EXIT ; /* 0x000000000000794d */
/* 0x000fea0003800000 */
/*0720*/ BRA 0x720; /* 0xfffffff000007947 */
/* 0x000fc0000383ffff */
/*0730*/ NOP; /* 0x0000000000007918 */
/* 0x000fc00000000000 */
/*0740*/ NOP; /* 0x0000000000007918 */
/* 0x000fc00000000000 */
/*0750*/ NOP; /* 0x0000000000007918 */
/* 0x000fc00000000000 */
/*0760*/ NOP; /* 0x0000000000007918 */
/* 0x000fc00000000000 */
/*0770*/ NOP; /* 0x0000000000007918 */
/* 0x000fc00000000000 */
/*0780*/ NOP; /* 0x0000000000007918 */
/* 0x000fc00000000000 */
/*0790*/ NOP; /* 0x0000000000007918 */
/* 0x000fc00000000000 */
/*07a0*/ NOP; /* 0x0000000000007918 */
/* 0x000fc00000000000 */
/*07b0*/ NOP; /* 0x0000000000007918 */
/* 0x000fc00000000000 */
/*07c0*/ NOP; /* 0x0000000000007918 */
/* 0x000fc00000000000 */
/*07d0*/ NOP; /* 0x0000000000007918 */
/* 0x000fc00000000000 */
/*07e0*/ NOP; /* 0x0000000000007918 */
/* 0x000fc00000000000 */
/*07f0*/ NOP; /* 0x0000000000007918 */
/* 0x000fc00000000000 */
.......... |
You are a helpful coding assistant specialized in converting CUDA source code to CUDA host assembly. | #include <iostream>
#include <iomanip>
#include <vector>
#include <string>
#include <fstream>
using namespace std;
void Linspace(double*, double, double, int);
void Uniform(double*, double, int);
__global__ void RungeKuttaStepOriginal(double* __restrict__, const double* __restrict__, int);
__global__ void RungeKuttaStepRegisterFriendly(double* __restrict__, const double* __restrict__, int);
__device__ void Lorenz(double* __restrict__, const double* __restrict__, double);
template <class DataType>
DataType* AllocateHostMemory(int);
template <class DataType>
DataType* AllocateDeviceMemory(int);
int main()
{
// INITIAL SETUP ----------------------------------------------------------------------------------
int NumberOfProblems = 768000;
int NumberOfThreads = NumberOfProblems;
int BlockSize = 64;
cudaSetDevice(1);
double* h_State = AllocateHostMemory<double>( 3*NumberOfProblems );
double* h_Parameters = AllocateHostMemory<double>( NumberOfProblems );
double* d_State = AllocateDeviceMemory<double>( 3*NumberOfProblems );
double* d_Parameters = AllocateDeviceMemory<double>( NumberOfProblems );
Linspace(h_Parameters, 0.0, 21.0, NumberOfProblems);
Uniform(h_State, 10.0, NumberOfProblems);
Uniform(&h_State[ NumberOfProblems ], 10.0, NumberOfProblems);
Uniform(&h_State[ 2*NumberOfProblems ], 10.0, NumberOfProblems);
cudaMemcpy(d_State, h_State, 3*sizeof(double)*NumberOfProblems, cudaMemcpyHostToDevice);
cudaMemcpy(d_Parameters, h_Parameters, sizeof(double)*NumberOfProblems, cudaMemcpyHostToDevice);
int GridSize = NumberOfThreads/BlockSize + (NumberOfThreads % BlockSize == 0 ? 0:1);
clock_t SimulationStart;
clock_t SimulationEnd;
SimulationStart = clock();
RungeKuttaStepRegisterFriendly<<<GridSize, BlockSize>>> (d_State, d_Parameters, NumberOfProblems);
cudaDeviceSynchronize();
SimulationEnd = clock();
cout << "Simulation time: " << 1000.0*(SimulationEnd-SimulationStart) / CLOCKS_PER_SEC << "ms" << endl << endl;
cout << "Simulation time / 1000 RK4 step: " << 1000.0*(SimulationEnd-SimulationStart) / CLOCKS_PER_SEC << "ms" << endl;
cout << "Ensemble size: " << NumberOfProblems << endl << endl;
cudaMemcpyAsync(h_State, d_State, 3*sizeof(double)*NumberOfProblems, cudaMemcpyDeviceToHost);
//for (int i=0; i<NumberOfProblems; i++)
// cout << "P: " << h_Parameters[i] << " Sates: " << h_State[i] << ", " << h_State[i+NumberOfProblems] << ", " << h_State[i+2*NumberOfProblems] << endl;
}
// AUXILIARY FUNCTION -----------------------------------------------------------------------------
void Linspace(double* x, double B, double E, int N)
{
double Increment;
x[0] = B;
if ( N>1 )
{
x[N-1] = E;
Increment = (E-B)/(N-1);
for (int i=1; i<N-1; i++)
{
x[i] = B + i*Increment;
}
}
}
void Uniform(double* x, double V, int N)
{
for (int i=0; i<N; i++)
{
x[i] = V;
}
}
__forceinline__ __device__ void Lorenz(double* __restrict__ F, const double* __restrict__ X, double P)
{
F[0] = 10.0*(X[1] - X[0]);
F[1] = P*X[0] - X[1] - X[0]*X[2];
F[2] = X[0]*X[1] - 2.666 * X[2];
}
__global__ void RungeKuttaStepRegisterFriendly(double* __restrict__ d_State, const double* __restrict__ d_Parameters, int N)
{
int tid = threadIdx.x + blockIdx.x*blockDim.x;
if (tid < N)
{
double X[3];
double P;
double k1[3];
double ks[3];
double x[3];
double dT = 1e-3;
double dTp2 = 0.5*dT;
double dTp6 = dT * (1.0/6.0);
X[0] = d_State[tid];
X[1] = d_State[tid + N];
X[2] = d_State[tid + 2*N];
P = d_Parameters[tid];
for (int i=0; i<1000; i++)
{
Lorenz(k1, X, P);
#pragma unroll 3
for (int j=0; j<3; j++)
{
x[j] = X[j] + dTp2*k1[j];
ks[j] = k1[j];
}
Lorenz(k1, x, P);
#pragma unroll 3
for (int j=0; j<3; j++)
{
x[j] = X[j] + dTp2*k1[j];
ks[j] = ks[j]+2.0*k1[j];
}
Lorenz(k1, x, P);
#pragma unroll 3
for (int j=0; j<3; j++)
{
x[j] = X[j] + dT*k1[j];
ks[j] = ks[j]+2.0*k1[j];
}
Lorenz(k1, x, P);
#pragma unroll 3
for (int j=0; j<3; j++)
X[j] = X[j] + dTp6*( ks[j] + k1[j] );
}
d_State[tid] = X[0];
d_State[tid + N] = X[1];
d_State[tid + 2*N] = X[2];
}
}
template <class DataType>
DataType* AllocateHostMemory(int N)
{
DataType* HostMemory = new (std::nothrow) DataType [N];
if (HostMemory == NULL)
{
std::cerr << "Failed to allocate Memory on the HOST!\n";
exit(EXIT_FAILURE);
}
return HostMemory;
}
template <class DataType>
DataType* AllocateDeviceMemory(int N)
{
cudaError_t Error = cudaSuccess;
DataType* MemoryAddressInDevice = NULL;
Error = cudaMalloc((void**)&MemoryAddressInDevice, N * sizeof(DataType));
if (Error != cudaSuccess)
{
std::cerr << "Failed to allocate Memory on the DEVICE!\n";
exit(EXIT_FAILURE);
}
return MemoryAddressInDevice;
} | .file "tmpxft_0007de79_00000000-6_Lorenz_HandTuned.cudafe1.cpp"
.text
#APP
.globl _ZSt21ios_base_library_initv
#NO_APP
.type _ZL26__cudaUnregisterBinaryUtilv, @function
_ZL26__cudaUnregisterBinaryUtilv:
.LFB4410:
.cfi_startproc
endbr64
subq $8, %rsp
.cfi_def_cfa_offset 16
movq _ZL20__cudaFatCubinHandle(%rip), %rdi
call __cudaUnregisterFatBinary@PLT
addq $8, %rsp
.cfi_def_cfa_offset 8
ret
.cfi_endproc
.LFE4410:
.size _ZL26__cudaUnregisterBinaryUtilv, .-_ZL26__cudaUnregisterBinaryUtilv
.globl _Z8LinspacePdddi
.type _Z8LinspacePdddi, @function
_Z8LinspacePdddi:
.LFB4403:
.cfi_startproc
endbr64
movsd %xmm0, (%rdi)
cmpl $1, %esi
jle .L3
movslq %esi, %rax
movsd %xmm1, -8(%rdi,%rax,8)
leal -1(%rsi), %eax
subsd %xmm0, %xmm1
pxor %xmm2, %xmm2
cvtsi2sdl %eax, %xmm2
divsd %xmm2, %xmm1
cmpl $1, %eax
jle .L3
leal -1(%rsi), %edx
movl $1, %eax
.L5:
pxor %xmm2, %xmm2
cvtsi2sdl %eax, %xmm2
mulsd %xmm1, %xmm2
addsd %xmm0, %xmm2
movsd %xmm2, (%rdi,%rax,8)
addq $1, %rax
cmpq %rdx, %rax
jne .L5
.L3:
ret
.cfi_endproc
.LFE4403:
.size _Z8LinspacePdddi, .-_Z8LinspacePdddi
.globl _Z7UniformPddi
.type _Z7UniformPddi, @function
_Z7UniformPddi:
.LFB4404:
.cfi_startproc
endbr64
testl %esi, %esi
jle .L7
movq %rdi, %rax
movslq %esi, %rsi
leaq (%rdi,%rsi,8), %rdx
.L9:
movsd %xmm0, (%rax)
addq $8, %rax
cmpq %rdx, %rax
jne .L9
.L7:
ret
.cfi_endproc
.LFE4404:
.size _Z7UniformPddi, .-_Z7UniformPddi
.globl _Z54__device_stub__Z30RungeKuttaStepRegisterFriendlyPdPKdiPdPKdi
.type _Z54__device_stub__Z30RungeKuttaStepRegisterFriendlyPdPKdiPdPKdi, @function
_Z54__device_stub__Z30RungeKuttaStepRegisterFriendlyPdPKdiPdPKdi:
.LFB4432:
.cfi_startproc
endbr64
subq $136, %rsp
.cfi_def_cfa_offset 144
movl %edx, 12(%rsp)
movq %fs:40, %rax
movq %rax, 120(%rsp)
xorl %eax, %eax
movq %rdi, 16(%rsp)
leaq 16(%rsp), %rax
movq %rax, 96(%rsp)
movq %rsi, 24(%rsp)
leaq 24(%rsp), %rax
movq %rax, 104(%rsp)
leaq 12(%rsp), %rax
movq %rax, 112(%rsp)
movl $1, 48(%rsp)
movl $1, 52(%rsp)
movl $1, 56(%rsp)
movl $1, 60(%rsp)
movl $1, 64(%rsp)
movl $1, 68(%rsp)
leaq 40(%rsp), %rcx
leaq 32(%rsp), %rdx
leaq 60(%rsp), %rsi
leaq 48(%rsp), %rdi
call __cudaPopCallConfiguration@PLT
testl %eax, %eax
je .L15
.L11:
movq 120(%rsp), %rax
subq %fs:40, %rax
jne .L16
addq $136, %rsp
.cfi_remember_state
.cfi_def_cfa_offset 8
ret
.L15:
.cfi_restore_state
pushq 40(%rsp)
.cfi_def_cfa_offset 152
pushq 40(%rsp)
.cfi_def_cfa_offset 160
leaq 112(%rsp), %r9
movq 76(%rsp), %rcx
movl 84(%rsp), %r8d
movq 64(%rsp), %rsi
movl 72(%rsp), %edx
leaq _Z30RungeKuttaStepRegisterFriendlyPdPKdi(%rip), %rdi
call cudaLaunchKernel@PLT
addq $16, %rsp
.cfi_def_cfa_offset 144
jmp .L11
.L16:
call __stack_chk_fail@PLT
.cfi_endproc
.LFE4432:
.size _Z54__device_stub__Z30RungeKuttaStepRegisterFriendlyPdPKdiPdPKdi, .-_Z54__device_stub__Z30RungeKuttaStepRegisterFriendlyPdPKdiPdPKdi
.globl _Z30RungeKuttaStepRegisterFriendlyPdPKdi
.type _Z30RungeKuttaStepRegisterFriendlyPdPKdi, @function
_Z30RungeKuttaStepRegisterFriendlyPdPKdi:
.LFB4433:
.cfi_startproc
endbr64
subq $8, %rsp
.cfi_def_cfa_offset 16
call _Z54__device_stub__Z30RungeKuttaStepRegisterFriendlyPdPKdiPdPKdi
addq $8, %rsp
.cfi_def_cfa_offset 8
ret
.cfi_endproc
.LFE4433:
.size _Z30RungeKuttaStepRegisterFriendlyPdPKdi, .-_Z30RungeKuttaStepRegisterFriendlyPdPKdi
.section .rodata.str1.8,"aMS",@progbits,1
.align 8
.LC0:
.string "_Z30RungeKuttaStepRegisterFriendlyPdPKdi"
.text
.type _ZL24__sti____cudaRegisterAllv, @function
_ZL24__sti____cudaRegisterAllv:
.LFB4435:
.cfi_startproc
endbr64
subq $8, %rsp
.cfi_def_cfa_offset 16
leaq _ZL15__fatDeviceText(%rip), %rdi
call __cudaRegisterFatBinary@PLT
movq %rax, %rdi
movq %rax, _ZL20__cudaFatCubinHandle(%rip)
pushq $0
.cfi_def_cfa_offset 24
pushq $0
.cfi_def_cfa_offset 32
pushq $0
.cfi_def_cfa_offset 40
pushq $0
.cfi_def_cfa_offset 48
movl $0, %r9d
movl $-1, %r8d
leaq .LC0(%rip), %rdx
movq %rdx, %rcx
leaq _Z30RungeKuttaStepRegisterFriendlyPdPKdi(%rip), %rsi
call __cudaRegisterFunction@PLT
addq $32, %rsp
.cfi_def_cfa_offset 16
movq _ZL20__cudaFatCubinHandle(%rip), %rdi
call __cudaRegisterFatBinaryEnd@PLT
leaq _ZL26__cudaUnregisterBinaryUtilv(%rip), %rdi
call atexit@PLT
addq $8, %rsp
.cfi_def_cfa_offset 8
ret
.cfi_endproc
.LFE4435:
.size _ZL24__sti____cudaRegisterAllv, .-_ZL24__sti____cudaRegisterAllv
.section .init_array,"aw"
.align 8
.quad _ZL24__sti____cudaRegisterAllv
.section .rodata._Z18AllocateHostMemoryIdEPT_i.str1.8,"aMS",@progbits,1
.align 8
.LC1:
.string "Failed to allocate Memory on the HOST!\n"
.section .text._Z18AllocateHostMemoryIdEPT_i,"axG",@progbits,_Z18AllocateHostMemoryIdEPT_i,comdat
.weak _Z18AllocateHostMemoryIdEPT_i
.type _Z18AllocateHostMemoryIdEPT_i, @function
_Z18AllocateHostMemoryIdEPT_i:
.LFB4751:
.cfi_startproc
endbr64
subq $8, %rsp
.cfi_def_cfa_offset 16
movslq %edi, %rdi
movq %rdi, %rax
shrq $60, %rax
jne .L22
salq $3, %rdi
leaq _ZSt7nothrow(%rip), %rsi
call _ZnamRKSt9nothrow_t@PLT
testq %rax, %rax
je .L27
addq $8, %rsp
.cfi_remember_state
.cfi_def_cfa_offset 8
ret
.L22:
.cfi_restore_state
call __cxa_throw_bad_array_new_length@PLT
.L27:
leaq .LC1(%rip), %rsi
leaq _ZSt4cerr(%rip), %rdi
call _ZStlsISt11char_traitsIcEERSt13basic_ostreamIcT_ES5_PKc@PLT
movl $1, %edi
call exit@PLT
.cfi_endproc
.LFE4751:
.size _Z18AllocateHostMemoryIdEPT_i, .-_Z18AllocateHostMemoryIdEPT_i
.section .rodata._Z20AllocateDeviceMemoryIdEPT_i.str1.8,"aMS",@progbits,1
.align 8
.LC2:
.string "Failed to allocate Memory on the DEVICE!\n"
.section .text._Z20AllocateDeviceMemoryIdEPT_i,"axG",@progbits,_Z20AllocateDeviceMemoryIdEPT_i,comdat
.weak _Z20AllocateDeviceMemoryIdEPT_i
.type _Z20AllocateDeviceMemoryIdEPT_i, @function
_Z20AllocateDeviceMemoryIdEPT_i:
.LFB4752:
.cfi_startproc
endbr64
subq $24, %rsp
.cfi_def_cfa_offset 32
movq %fs:40, %rax
movq %rax, 8(%rsp)
xorl %eax, %eax
movq $0, (%rsp)
movslq %edi, %rsi
salq $3, %rsi
movq %rsp, %rdi
call cudaMalloc@PLT
testl %eax, %eax
jne .L32
movq (%rsp), %rax
movq 8(%rsp), %rdx
subq %fs:40, %rdx
jne .L33
addq $24, %rsp
.cfi_remember_state
.cfi_def_cfa_offset 8
ret
.L32:
.cfi_restore_state
leaq .LC2(%rip), %rsi
leaq _ZSt4cerr(%rip), %rdi
call _ZStlsISt11char_traitsIcEERSt13basic_ostreamIcT_ES5_PKc@PLT
movl $1, %edi
call exit@PLT
.L33:
call __stack_chk_fail@PLT
.cfi_endproc
.LFE4752:
.size _Z20AllocateDeviceMemoryIdEPT_i, .-_Z20AllocateDeviceMemoryIdEPT_i
.section .rodata.str1.1,"aMS",@progbits,1
.LC6:
.string "Simulation time: "
.LC9:
.string "ms"
.section .rodata.str1.8
.align 8
.LC10:
.string "Simulation time / 1000 RK4 step: "
.align 8
.LC11:
.string "Ensemble size: "
.text
.globl main
.type main, @function
main:
.LFB4402:
.cfi_startproc
endbr64
pushq %r14
.cfi_def_cfa_offset 16
.cfi_offset 14, -16
pushq %r13
.cfi_def_cfa_offset 24
.cfi_offset 13, -24
pushq %r12
.cfi_def_cfa_offset 32
.cfi_offset 12, -32
pushq %rbp
.cfi_def_cfa_offset 40
.cfi_offset 6, -40
pushq %rbx
.cfi_def_cfa_offset 48
.cfi_offset 3, -48
subq $32, %rsp
.cfi_def_cfa_offset 80
movl $1, %edi
call cudaSetDevice@PLT
movl $2304000, %edi
call _Z18AllocateHostMemoryIdEPT_i
movq %rax, %rbx
movl $768000, %edi
call _Z18AllocateHostMemoryIdEPT_i
movq %rax, %rbp
movl $2304000, %edi
call _Z20AllocateDeviceMemoryIdEPT_i
movq %rax, %r12
movl $768000, %edi
call _Z20AllocateDeviceMemoryIdEPT_i
movq %rax, %r13
movl $768000, %esi
movsd .LC3(%rip), %xmm1
pxor %xmm0, %xmm0
movq %rbp, %rdi
call _Z8LinspacePdddi
movl $768000, %esi
movsd .LC5(%rip), %xmm0
movq %rbx, %rdi
call _Z7UniformPddi
leaq 6144000(%rbx), %rdi
movl $768000, %esi
movsd .LC5(%rip), %xmm0
call _Z7UniformPddi
leaq 12288000(%rbx), %rdi
movl $768000, %esi
movsd .LC5(%rip), %xmm0
call _Z7UniformPddi
movl $1, %ecx
movl $18432000, %edx
movq %rbx, %rsi
movq %r12, %rdi
call cudaMemcpy@PLT
movl $1, %ecx
movl $6144000, %edx
movq %rbp, %rsi
movq %r13, %rdi
call cudaMemcpy@PLT
call clock@PLT
movq %rax, %r14
movl $64, 20(%rsp)
movl $1, 24(%rsp)
movl $12000, 8(%rsp)
movl $1, 12(%rsp)
movl $0, %r9d
movl $0, %r8d
movq 20(%rsp), %rdx
movl $1, %ecx
movq 8(%rsp), %rdi
movl $1, %esi
call __cudaPushCallConfiguration@PLT
testl %eax, %eax
je .L37
.L35:
call cudaDeviceSynchronize@PLT
call clock@PLT
movq %rax, %rbp
leaq .LC6(%rip), %rsi
leaq _ZSt4cout(%rip), %r13
movq %r13, %rdi
call _ZStlsISt11char_traitsIcEERSt13basic_ostreamIcT_ES5_PKc@PLT
movq %rax, %rdi
subq %r14, %rbp
pxor %xmm0, %xmm0
cvtsi2sdq %rbp, %xmm0
mulsd .LC7(%rip), %xmm0
divsd .LC8(%rip), %xmm0
movq %xmm0, %r14
call _ZNSo9_M_insertIdEERSoT_@PLT
movq %rax, %rdi
leaq .LC9(%rip), %rbp
movq %rbp, %rsi
call _ZStlsISt11char_traitsIcEERSt13basic_ostreamIcT_ES5_PKc@PLT
movq %rax, %rdi
call _ZSt4endlIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_@PLT
movq %rax, %rdi
call _ZSt4endlIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_@PLT
leaq .LC10(%rip), %rsi
movq %r13, %rdi
call _ZStlsISt11char_traitsIcEERSt13basic_ostreamIcT_ES5_PKc@PLT
movq %rax, %rdi
movq %r14, %xmm0
call _ZNSo9_M_insertIdEERSoT_@PLT
movq %rax, %rdi
movq %rbp, %rsi
call _ZStlsISt11char_traitsIcEERSt13basic_ostreamIcT_ES5_PKc@PLT
movq %rax, %rdi
call _ZSt4endlIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_@PLT
leaq .LC11(%rip), %rsi
movq %r13, %rdi
call _ZStlsISt11char_traitsIcEERSt13basic_ostreamIcT_ES5_PKc@PLT
movq %rax, %rdi
movl $768000, %esi
call _ZNSolsEi@PLT
movq %rax, %rdi
call _ZSt4endlIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_@PLT
movq %rax, %rdi
call _ZSt4endlIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_@PLT
movl $0, %r8d
movl $2, %ecx
movl $18432000, %edx
movq %r12, %rsi
movq %rbx, %rdi
call cudaMemcpyAsync@PLT
movl $0, %eax
addq $32, %rsp
.cfi_remember_state
.cfi_def_cfa_offset 48
popq %rbx
.cfi_def_cfa_offset 40
popq %rbp
.cfi_def_cfa_offset 32
popq %r12
.cfi_def_cfa_offset 24
popq %r13
.cfi_def_cfa_offset 16
popq %r14
.cfi_def_cfa_offset 8
ret
.L37:
.cfi_restore_state
movl $768000, %edx
movq %r13, %rsi
movq %r12, %rdi
call _Z54__device_stub__Z30RungeKuttaStepRegisterFriendlyPdPKdiPdPKdi
jmp .L35
.cfi_endproc
.LFE4402:
.size main, .-main
.section .nvFatBinSegment,"aw"
.align 8
.type _ZL15__fatDeviceText, @object
.size _ZL15__fatDeviceText, 24
_ZL15__fatDeviceText:
.long 1180844977
.long 1
.quad fatbinData
.quad 0
.local _ZL20__cudaFatCubinHandle
.comm _ZL20__cudaFatCubinHandle,8,8
.section .rodata.cst8,"aM",@progbits,8
.align 8
.LC3:
.long 0
.long 1077215232
.align 8
.LC5:
.long 0
.long 1076101120
.align 8
.LC7:
.long 0
.long 1083129856
.align 8
.LC8:
.long 0
.long 1093567616
.ident "GCC: (Ubuntu 13.3.0-6ubuntu2~24.04) 13.3.0"
.section .note.GNU-stack,"",@progbits
.section .note.gnu.property,"a"
.align 8
.long 1f - 0f
.long 4f - 1f
.long 5
0:
.string "GNU"
1:
.align 8
.long 0xc0000002
.long 3f - 2f
2:
.long 0x3
3:
.align 8
4: |
You are a helpful coding assistant specialized in converting CUDA source code to HIP/AMD source code. | #include <iostream>
#include <iomanip>
#include <vector>
#include <string>
#include <fstream>
using namespace std;
void Linspace(double*, double, double, int);
void Uniform(double*, double, int);
__global__ void RungeKuttaStepOriginal(double* __restrict__, const double* __restrict__, int);
__global__ void RungeKuttaStepRegisterFriendly(double* __restrict__, const double* __restrict__, int);
__device__ void Lorenz(double* __restrict__, const double* __restrict__, double);
template <class DataType>
DataType* AllocateHostMemory(int);
template <class DataType>
DataType* AllocateDeviceMemory(int);
int main()
{
// INITIAL SETUP ----------------------------------------------------------------------------------
int NumberOfProblems = 768000;
int NumberOfThreads = NumberOfProblems;
int BlockSize = 64;
cudaSetDevice(1);
double* h_State = AllocateHostMemory<double>( 3*NumberOfProblems );
double* h_Parameters = AllocateHostMemory<double>( NumberOfProblems );
double* d_State = AllocateDeviceMemory<double>( 3*NumberOfProblems );
double* d_Parameters = AllocateDeviceMemory<double>( NumberOfProblems );
Linspace(h_Parameters, 0.0, 21.0, NumberOfProblems);
Uniform(h_State, 10.0, NumberOfProblems);
Uniform(&h_State[ NumberOfProblems ], 10.0, NumberOfProblems);
Uniform(&h_State[ 2*NumberOfProblems ], 10.0, NumberOfProblems);
cudaMemcpy(d_State, h_State, 3*sizeof(double)*NumberOfProblems, cudaMemcpyHostToDevice);
cudaMemcpy(d_Parameters, h_Parameters, sizeof(double)*NumberOfProblems, cudaMemcpyHostToDevice);
int GridSize = NumberOfThreads/BlockSize + (NumberOfThreads % BlockSize == 0 ? 0:1);
clock_t SimulationStart;
clock_t SimulationEnd;
SimulationStart = clock();
RungeKuttaStepRegisterFriendly<<<GridSize, BlockSize>>> (d_State, d_Parameters, NumberOfProblems);
cudaDeviceSynchronize();
SimulationEnd = clock();
cout << "Simulation time: " << 1000.0*(SimulationEnd-SimulationStart) / CLOCKS_PER_SEC << "ms" << endl << endl;
cout << "Simulation time / 1000 RK4 step: " << 1000.0*(SimulationEnd-SimulationStart) / CLOCKS_PER_SEC << "ms" << endl;
cout << "Ensemble size: " << NumberOfProblems << endl << endl;
cudaMemcpyAsync(h_State, d_State, 3*sizeof(double)*NumberOfProblems, cudaMemcpyDeviceToHost);
//for (int i=0; i<NumberOfProblems; i++)
// cout << "P: " << h_Parameters[i] << " Sates: " << h_State[i] << ", " << h_State[i+NumberOfProblems] << ", " << h_State[i+2*NumberOfProblems] << endl;
}
// AUXILIARY FUNCTION -----------------------------------------------------------------------------
void Linspace(double* x, double B, double E, int N)
{
double Increment;
x[0] = B;
if ( N>1 )
{
x[N-1] = E;
Increment = (E-B)/(N-1);
for (int i=1; i<N-1; i++)
{
x[i] = B + i*Increment;
}
}
}
void Uniform(double* x, double V, int N)
{
for (int i=0; i<N; i++)
{
x[i] = V;
}
}
__forceinline__ __device__ void Lorenz(double* __restrict__ F, const double* __restrict__ X, double P)
{
F[0] = 10.0*(X[1] - X[0]);
F[1] = P*X[0] - X[1] - X[0]*X[2];
F[2] = X[0]*X[1] - 2.666 * X[2];
}
__global__ void RungeKuttaStepRegisterFriendly(double* __restrict__ d_State, const double* __restrict__ d_Parameters, int N)
{
int tid = threadIdx.x + blockIdx.x*blockDim.x;
if (tid < N)
{
double X[3];
double P;
double k1[3];
double ks[3];
double x[3];
double dT = 1e-3;
double dTp2 = 0.5*dT;
double dTp6 = dT * (1.0/6.0);
X[0] = d_State[tid];
X[1] = d_State[tid + N];
X[2] = d_State[tid + 2*N];
P = d_Parameters[tid];
for (int i=0; i<1000; i++)
{
Lorenz(k1, X, P);
#pragma unroll 3
for (int j=0; j<3; j++)
{
x[j] = X[j] + dTp2*k1[j];
ks[j] = k1[j];
}
Lorenz(k1, x, P);
#pragma unroll 3
for (int j=0; j<3; j++)
{
x[j] = X[j] + dTp2*k1[j];
ks[j] = ks[j]+2.0*k1[j];
}
Lorenz(k1, x, P);
#pragma unroll 3
for (int j=0; j<3; j++)
{
x[j] = X[j] + dT*k1[j];
ks[j] = ks[j]+2.0*k1[j];
}
Lorenz(k1, x, P);
#pragma unroll 3
for (int j=0; j<3; j++)
X[j] = X[j] + dTp6*( ks[j] + k1[j] );
}
d_State[tid] = X[0];
d_State[tid + N] = X[1];
d_State[tid + 2*N] = X[2];
}
}
template <class DataType>
DataType* AllocateHostMemory(int N)
{
DataType* HostMemory = new (std::nothrow) DataType [N];
if (HostMemory == NULL)
{
std::cerr << "Failed to allocate Memory on the HOST!\n";
exit(EXIT_FAILURE);
}
return HostMemory;
}
template <class DataType>
DataType* AllocateDeviceMemory(int N)
{
cudaError_t Error = cudaSuccess;
DataType* MemoryAddressInDevice = NULL;
Error = cudaMalloc((void**)&MemoryAddressInDevice, N * sizeof(DataType));
if (Error != cudaSuccess)
{
std::cerr << "Failed to allocate Memory on the DEVICE!\n";
exit(EXIT_FAILURE);
}
return MemoryAddressInDevice;
} | #include <hip/hip_runtime.h>
#include <iostream>
#include <iomanip>
#include <vector>
#include <string>
#include <fstream>
using namespace std;
void Linspace(double*, double, double, int);
void Uniform(double*, double, int);
__global__ void RungeKuttaStepOriginal(double* __restrict__, const double* __restrict__, int);
__global__ void RungeKuttaStepRegisterFriendly(double* __restrict__, const double* __restrict__, int);
__device__ void Lorenz(double* __restrict__, const double* __restrict__, double);
template <class DataType>
DataType* AllocateHostMemory(int);
template <class DataType>
DataType* AllocateDeviceMemory(int);
int main()
{
// INITIAL SETUP ----------------------------------------------------------------------------------
int NumberOfProblems = 768000;
int NumberOfThreads = NumberOfProblems;
int BlockSize = 64;
hipSetDevice(1);
double* h_State = AllocateHostMemory<double>( 3*NumberOfProblems );
double* h_Parameters = AllocateHostMemory<double>( NumberOfProblems );
double* d_State = AllocateDeviceMemory<double>( 3*NumberOfProblems );
double* d_Parameters = AllocateDeviceMemory<double>( NumberOfProblems );
Linspace(h_Parameters, 0.0, 21.0, NumberOfProblems);
Uniform(h_State, 10.0, NumberOfProblems);
Uniform(&h_State[ NumberOfProblems ], 10.0, NumberOfProblems);
Uniform(&h_State[ 2*NumberOfProblems ], 10.0, NumberOfProblems);
hipMemcpy(d_State, h_State, 3*sizeof(double)*NumberOfProblems, hipMemcpyHostToDevice);
hipMemcpy(d_Parameters, h_Parameters, sizeof(double)*NumberOfProblems, hipMemcpyHostToDevice);
int GridSize = NumberOfThreads/BlockSize + (NumberOfThreads % BlockSize == 0 ? 0:1);
clock_t SimulationStart;
clock_t SimulationEnd;
SimulationStart = clock();
RungeKuttaStepRegisterFriendly<<<GridSize, BlockSize>>> (d_State, d_Parameters, NumberOfProblems);
hipDeviceSynchronize();
SimulationEnd = clock();
cout << "Simulation time: " << 1000.0*(SimulationEnd-SimulationStart) / CLOCKS_PER_SEC << "ms" << endl << endl;
cout << "Simulation time / 1000 RK4 step: " << 1000.0*(SimulationEnd-SimulationStart) / CLOCKS_PER_SEC << "ms" << endl;
cout << "Ensemble size: " << NumberOfProblems << endl << endl;
hipMemcpyAsync(h_State, d_State, 3*sizeof(double)*NumberOfProblems, hipMemcpyDeviceToHost);
//for (int i=0; i<NumberOfProblems; i++)
// cout << "P: " << h_Parameters[i] << " Sates: " << h_State[i] << ", " << h_State[i+NumberOfProblems] << ", " << h_State[i+2*NumberOfProblems] << endl;
}
// AUXILIARY FUNCTION -----------------------------------------------------------------------------
void Linspace(double* x, double B, double E, int N)
{
double Increment;
x[0] = B;
if ( N>1 )
{
x[N-1] = E;
Increment = (E-B)/(N-1);
for (int i=1; i<N-1; i++)
{
x[i] = B + i*Increment;
}
}
}
void Uniform(double* x, double V, int N)
{
for (int i=0; i<N; i++)
{
x[i] = V;
}
}
__forceinline__ __device__ void Lorenz(double* __restrict__ F, const double* __restrict__ X, double P)
{
F[0] = 10.0*(X[1] - X[0]);
F[1] = P*X[0] - X[1] - X[0]*X[2];
F[2] = X[0]*X[1] - 2.666 * X[2];
}
__global__ void RungeKuttaStepRegisterFriendly(double* __restrict__ d_State, const double* __restrict__ d_Parameters, int N)
{
int tid = threadIdx.x + blockIdx.x*blockDim.x;
if (tid < N)
{
double X[3];
double P;
double k1[3];
double ks[3];
double x[3];
double dT = 1e-3;
double dTp2 = 0.5*dT;
double dTp6 = dT * (1.0/6.0);
X[0] = d_State[tid];
X[1] = d_State[tid + N];
X[2] = d_State[tid + 2*N];
P = d_Parameters[tid];
for (int i=0; i<1000; i++)
{
Lorenz(k1, X, P);
#pragma unroll 3
for (int j=0; j<3; j++)
{
x[j] = X[j] + dTp2*k1[j];
ks[j] = k1[j];
}
Lorenz(k1, x, P);
#pragma unroll 3
for (int j=0; j<3; j++)
{
x[j] = X[j] + dTp2*k1[j];
ks[j] = ks[j]+2.0*k1[j];
}
Lorenz(k1, x, P);
#pragma unroll 3
for (int j=0; j<3; j++)
{
x[j] = X[j] + dT*k1[j];
ks[j] = ks[j]+2.0*k1[j];
}
Lorenz(k1, x, P);
#pragma unroll 3
for (int j=0; j<3; j++)
X[j] = X[j] + dTp6*( ks[j] + k1[j] );
}
d_State[tid] = X[0];
d_State[tid + N] = X[1];
d_State[tid + 2*N] = X[2];
}
}
template <class DataType>
DataType* AllocateHostMemory(int N)
{
DataType* HostMemory = new (std::nothrow) DataType [N];
if (HostMemory == NULL)
{
std::cerr << "Failed to allocate Memory on the HOST!\n";
exit(EXIT_FAILURE);
}
return HostMemory;
}
template <class DataType>
DataType* AllocateDeviceMemory(int N)
{
hipError_t Error = hipSuccess;
DataType* MemoryAddressInDevice = NULL;
Error = hipMalloc((void**)&MemoryAddressInDevice, N * sizeof(DataType));
if (Error != hipSuccess)
{
std::cerr << "Failed to allocate Memory on the DEVICE!\n";
exit(EXIT_FAILURE);
}
return MemoryAddressInDevice;
} |
You are a helpful coding assistant specialized in converting HIP source code to AMD device assembly. | #include <hip/hip_runtime.h>
#include <iostream>
#include <iomanip>
#include <vector>
#include <string>
#include <fstream>
using namespace std;
void Linspace(double*, double, double, int);
void Uniform(double*, double, int);
__global__ void RungeKuttaStepOriginal(double* __restrict__, const double* __restrict__, int);
__global__ void RungeKuttaStepRegisterFriendly(double* __restrict__, const double* __restrict__, int);
__device__ void Lorenz(double* __restrict__, const double* __restrict__, double);
template <class DataType>
DataType* AllocateHostMemory(int);
template <class DataType>
DataType* AllocateDeviceMemory(int);
int main()
{
// INITIAL SETUP ----------------------------------------------------------------------------------
int NumberOfProblems = 768000;
int NumberOfThreads = NumberOfProblems;
int BlockSize = 64;
hipSetDevice(1);
double* h_State = AllocateHostMemory<double>( 3*NumberOfProblems );
double* h_Parameters = AllocateHostMemory<double>( NumberOfProblems );
double* d_State = AllocateDeviceMemory<double>( 3*NumberOfProblems );
double* d_Parameters = AllocateDeviceMemory<double>( NumberOfProblems );
Linspace(h_Parameters, 0.0, 21.0, NumberOfProblems);
Uniform(h_State, 10.0, NumberOfProblems);
Uniform(&h_State[ NumberOfProblems ], 10.0, NumberOfProblems);
Uniform(&h_State[ 2*NumberOfProblems ], 10.0, NumberOfProblems);
hipMemcpy(d_State, h_State, 3*sizeof(double)*NumberOfProblems, hipMemcpyHostToDevice);
hipMemcpy(d_Parameters, h_Parameters, sizeof(double)*NumberOfProblems, hipMemcpyHostToDevice);
int GridSize = NumberOfThreads/BlockSize + (NumberOfThreads % BlockSize == 0 ? 0:1);
clock_t SimulationStart;
clock_t SimulationEnd;
SimulationStart = clock();
RungeKuttaStepRegisterFriendly<<<GridSize, BlockSize>>> (d_State, d_Parameters, NumberOfProblems);
hipDeviceSynchronize();
SimulationEnd = clock();
cout << "Simulation time: " << 1000.0*(SimulationEnd-SimulationStart) / CLOCKS_PER_SEC << "ms" << endl << endl;
cout << "Simulation time / 1000 RK4 step: " << 1000.0*(SimulationEnd-SimulationStart) / CLOCKS_PER_SEC << "ms" << endl;
cout << "Ensemble size: " << NumberOfProblems << endl << endl;
hipMemcpyAsync(h_State, d_State, 3*sizeof(double)*NumberOfProblems, hipMemcpyDeviceToHost);
//for (int i=0; i<NumberOfProblems; i++)
// cout << "P: " << h_Parameters[i] << " Sates: " << h_State[i] << ", " << h_State[i+NumberOfProblems] << ", " << h_State[i+2*NumberOfProblems] << endl;
}
// AUXILIARY FUNCTION -----------------------------------------------------------------------------
void Linspace(double* x, double B, double E, int N)
{
double Increment;
x[0] = B;
if ( N>1 )
{
x[N-1] = E;
Increment = (E-B)/(N-1);
for (int i=1; i<N-1; i++)
{
x[i] = B + i*Increment;
}
}
}
void Uniform(double* x, double V, int N)
{
for (int i=0; i<N; i++)
{
x[i] = V;
}
}
__forceinline__ __device__ void Lorenz(double* __restrict__ F, const double* __restrict__ X, double P)
{
F[0] = 10.0*(X[1] - X[0]);
F[1] = P*X[0] - X[1] - X[0]*X[2];
F[2] = X[0]*X[1] - 2.666 * X[2];
}
__global__ void RungeKuttaStepRegisterFriendly(double* __restrict__ d_State, const double* __restrict__ d_Parameters, int N)
{
int tid = threadIdx.x + blockIdx.x*blockDim.x;
if (tid < N)
{
double X[3];
double P;
double k1[3];
double ks[3];
double x[3];
double dT = 1e-3;
double dTp2 = 0.5*dT;
double dTp6 = dT * (1.0/6.0);
X[0] = d_State[tid];
X[1] = d_State[tid + N];
X[2] = d_State[tid + 2*N];
P = d_Parameters[tid];
for (int i=0; i<1000; i++)
{
Lorenz(k1, X, P);
#pragma unroll 3
for (int j=0; j<3; j++)
{
x[j] = X[j] + dTp2*k1[j];
ks[j] = k1[j];
}
Lorenz(k1, x, P);
#pragma unroll 3
for (int j=0; j<3; j++)
{
x[j] = X[j] + dTp2*k1[j];
ks[j] = ks[j]+2.0*k1[j];
}
Lorenz(k1, x, P);
#pragma unroll 3
for (int j=0; j<3; j++)
{
x[j] = X[j] + dT*k1[j];
ks[j] = ks[j]+2.0*k1[j];
}
Lorenz(k1, x, P);
#pragma unroll 3
for (int j=0; j<3; j++)
X[j] = X[j] + dTp6*( ks[j] + k1[j] );
}
d_State[tid] = X[0];
d_State[tid + N] = X[1];
d_State[tid + 2*N] = X[2];
}
}
template <class DataType>
DataType* AllocateHostMemory(int N)
{
DataType* HostMemory = new (std::nothrow) DataType [N];
if (HostMemory == NULL)
{
std::cerr << "Failed to allocate Memory on the HOST!\n";
exit(EXIT_FAILURE);
}
return HostMemory;
}
template <class DataType>
DataType* AllocateDeviceMemory(int N)
{
hipError_t Error = hipSuccess;
DataType* MemoryAddressInDevice = NULL;
Error = hipMalloc((void**)&MemoryAddressInDevice, N * sizeof(DataType));
if (Error != hipSuccess)
{
std::cerr << "Failed to allocate Memory on the DEVICE!\n";
exit(EXIT_FAILURE);
}
return MemoryAddressInDevice;
} | .text
.amdgcn_target "amdgcn-amd-amdhsa--gfx1100"
.protected _Z30RungeKuttaStepRegisterFriendlyPdPKdi
.globl _Z30RungeKuttaStepRegisterFriendlyPdPKdi
.p2align 8
.type _Z30RungeKuttaStepRegisterFriendlyPdPKdi,@function
_Z30RungeKuttaStepRegisterFriendlyPdPKdi:
s_clause 0x1
s_load_b32 s3, s[0:1], 0x24
s_load_b32 s2, s[0:1], 0x10
s_waitcnt lgkmcnt(0)
s_and_b32 s3, s3, 0xffff
s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
v_mad_u64_u32 v[1:2], null, s15, s3, v[0:1]
s_mov_b32 s3, exec_lo
v_cmpx_gt_i32_e64 s2, v1
s_cbranch_execz .LBB0_4
s_load_b128 s[4:7], s[0:1], 0x0
v_add_nc_u32_e32 v3, s2, v1
v_ashrrev_i32_e32 v2, 31, v1
v_lshl_add_u32 v5, s2, 1, v1
s_movk_i32 s8, 0x3e8
s_mov_b32 s1, 0x400553f7
v_ashrrev_i32_e32 v4, 31, v3
v_lshlrev_b64 v[7:8], 3, v[1:2]
v_ashrrev_i32_e32 v6, 31, v5
s_mov_b32 s0, 0xced91687
s_mov_b32 s3, 0x3f40624d
v_lshlrev_b64 v[2:3], 3, v[3:4]
s_mov_b32 s2, 0xd2f1a9fc
v_lshlrev_b64 v[4:5], 3, v[5:6]
s_waitcnt lgkmcnt(0)
v_add_co_u32 v0, vcc_lo, s4, v7
v_add_co_ci_u32_e32 v1, vcc_lo, s5, v8, vcc_lo
v_add_co_u32 v2, vcc_lo, s4, v2
v_add_co_ci_u32_e32 v3, vcc_lo, s5, v3, vcc_lo
v_add_co_u32 v4, vcc_lo, s4, v4
v_add_co_ci_u32_e32 v5, vcc_lo, s5, v5, vcc_lo
v_add_co_u32 v12, vcc_lo, s6, v7
v_add_co_ci_u32_e32 v13, vcc_lo, s7, v8, vcc_lo
s_clause 0x2
global_load_b64 v[6:7], v[0:1], off
global_load_b64 v[8:9], v[2:3], off
global_load_b64 v[10:11], v[4:5], off
global_load_b64 v[12:13], v[12:13], off
s_mov_b32 s5, 0x3f50624d
s_mov_b32 s7, 0x3f25d867
s_mov_b32 s6, 0xc3ece2a5
.LBB0_2:
s_waitcnt vmcnt(0)
s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_3)
v_fma_f64 v[14:15], v[12:13], v[6:7], -v[8:9]
v_add_f64 v[16:17], v[8:9], -v[6:7]
v_mul_f64 v[18:19], v[10:11], s[0:1]
s_mov_b32 s4, s2
s_add_i32 s8, s8, -1
s_delay_alu instid0(SALU_CYCLE_1) | instskip(NEXT) | instid1(VALU_DEP_3)
s_cmp_eq_u32 s8, 0
v_fma_f64 v[14:15], -v[6:7], v[10:11], v[14:15]
s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3)
v_mul_f64 v[16:17], v[16:17], 0x40240000
v_fma_f64 v[18:19], v[8:9], v[6:7], -v[18:19]
s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3)
v_fma_f64 v[20:21], v[14:15], s[2:3], v[8:9]
v_fma_f64 v[22:23], v[16:17], s[2:3], v[6:7]
s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_2)
v_fma_f64 v[24:25], v[18:19], s[2:3], v[10:11]
v_add_f64 v[26:27], v[20:21], -v[22:23]
v_fma_f64 v[28:29], v[12:13], v[22:23], -v[20:21]
s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3)
v_mul_f64 v[30:31], v[24:25], s[0:1]
v_mul_f64 v[26:27], v[26:27], 0x40240000
s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3)
v_fma_f64 v[24:25], -v[22:23], v[24:25], v[28:29]
v_fma_f64 v[20:21], v[20:21], v[22:23], -v[30:31]
s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3)
v_fma_f64 v[22:23], v[26:27], s[2:3], v[6:7]
v_fma_f64 v[28:29], v[24:25], s[2:3], v[8:9]
s_delay_alu instid0(VALU_DEP_3)
v_fma_f64 v[30:31], v[20:21], s[2:3], v[10:11]
v_fma_f64 v[18:19], v[20:21], 2.0, v[18:19]
v_fma_f64 v[14:15], v[24:25], 2.0, v[14:15]
v_fma_f64 v[16:17], v[26:27], 2.0, v[16:17]
v_fma_f64 v[32:33], v[12:13], v[22:23], -v[28:29]
v_add_f64 v[34:35], v[28:29], -v[22:23]
v_mul_f64 v[36:37], v[30:31], s[0:1]
s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3)
v_fma_f64 v[30:31], -v[22:23], v[30:31], v[32:33]
v_mul_f64 v[32:33], v[34:35], 0x40240000
s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3)
v_fma_f64 v[22:23], v[28:29], v[22:23], -v[36:37]
v_fma_f64 v[28:29], v[30:31], s[4:5], v[8:9]
s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3)
v_fma_f64 v[34:35], v[32:33], s[4:5], v[6:7]
v_fma_f64 v[36:37], v[22:23], s[4:5], v[10:11]
v_fma_f64 v[18:19], v[22:23], 2.0, v[18:19]
v_fma_f64 v[14:15], v[30:31], 2.0, v[14:15]
v_fma_f64 v[16:17], v[32:33], 2.0, v[16:17]
v_fma_f64 v[20:21], v[12:13], v[34:35], -v[28:29]
v_mul_f64 v[24:25], v[36:37], s[0:1]
v_add_f64 v[22:23], v[28:29], -v[34:35]
s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3)
v_fma_f64 v[20:21], -v[34:35], v[36:37], v[20:21]
v_fma_f64 v[24:25], v[28:29], v[34:35], -v[24:25]
s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3)
v_fma_f64 v[16:17], v[22:23], 0x40240000, v[16:17]
v_add_f64 v[14:15], v[14:15], v[20:21]
s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3)
v_add_f64 v[18:19], v[18:19], v[24:25]
v_fma_f64 v[6:7], v[16:17], s[6:7], v[6:7]
s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3)
v_fma_f64 v[8:9], v[14:15], s[6:7], v[8:9]
v_fma_f64 v[10:11], v[18:19], s[6:7], v[10:11]
s_cbranch_scc0 .LBB0_2
s_clause 0x2
global_store_b64 v[0:1], v[6:7], off
global_store_b64 v[2:3], v[8:9], off
global_store_b64 v[4:5], v[10:11], off
.LBB0_4:
s_nop 0
s_sendmsg sendmsg(MSG_DEALLOC_VGPRS)
s_endpgm
.section .rodata,"a",@progbits
.p2align 6, 0x0
.amdhsa_kernel _Z30RungeKuttaStepRegisterFriendlyPdPKdi
.amdhsa_group_segment_fixed_size 0
.amdhsa_private_segment_fixed_size 0
.amdhsa_kernarg_size 280
.amdhsa_user_sgpr_count 15
.amdhsa_user_sgpr_dispatch_ptr 0
.amdhsa_user_sgpr_queue_ptr 0
.amdhsa_user_sgpr_kernarg_segment_ptr 1
.amdhsa_user_sgpr_dispatch_id 0
.amdhsa_user_sgpr_private_segment_size 0
.amdhsa_wavefront_size32 1
.amdhsa_uses_dynamic_stack 0
.amdhsa_enable_private_segment 0
.amdhsa_system_sgpr_workgroup_id_x 1
.amdhsa_system_sgpr_workgroup_id_y 0
.amdhsa_system_sgpr_workgroup_id_z 0
.amdhsa_system_sgpr_workgroup_info 0
.amdhsa_system_vgpr_workitem_id 0
.amdhsa_next_free_vgpr 38
.amdhsa_next_free_sgpr 16
.amdhsa_float_round_mode_32 0
.amdhsa_float_round_mode_16_64 0
.amdhsa_float_denorm_mode_32 3
.amdhsa_float_denorm_mode_16_64 3
.amdhsa_dx10_clamp 1
.amdhsa_ieee_mode 1
.amdhsa_fp16_overflow 0
.amdhsa_workgroup_processor_mode 1
.amdhsa_memory_ordered 1
.amdhsa_forward_progress 0
.amdhsa_shared_vgpr_count 0
.amdhsa_exception_fp_ieee_invalid_op 0
.amdhsa_exception_fp_denorm_src 0
.amdhsa_exception_fp_ieee_div_zero 0
.amdhsa_exception_fp_ieee_overflow 0
.amdhsa_exception_fp_ieee_underflow 0
.amdhsa_exception_fp_ieee_inexact 0
.amdhsa_exception_int_div_zero 0
.end_amdhsa_kernel
.text
.Lfunc_end0:
.size _Z30RungeKuttaStepRegisterFriendlyPdPKdi, .Lfunc_end0-_Z30RungeKuttaStepRegisterFriendlyPdPKdi
.section .AMDGPU.csdata,"",@progbits
.text
.p2alignl 7, 3214868480
.fill 96, 4, 3214868480
.type __hip_cuid_,@object
.section .bss,"aw",@nobits
.globl __hip_cuid_
__hip_cuid_:
.byte 0
.size __hip_cuid_, 1
.ident "AMD clang version 18.0.0git (https://github.com/RadeonOpenCompute/llvm-project roc-6.3.2 25012 e5bf7e55c91490b07c49d8960fa7983d864936c4)"
.section ".note.GNU-stack","",@progbits
.addrsig
.addrsig_sym __hip_cuid_
.amdgpu_metadata
---
amdhsa.kernels:
- .args:
- .address_space: global
.offset: 0
.size: 8
.value_kind: global_buffer
- .actual_access: read_only
.address_space: global
.offset: 8
.size: 8
.value_kind: global_buffer
- .offset: 16
.size: 4
.value_kind: by_value
- .offset: 24
.size: 4
.value_kind: hidden_block_count_x
- .offset: 28
.size: 4
.value_kind: hidden_block_count_y
- .offset: 32
.size: 4
.value_kind: hidden_block_count_z
- .offset: 36
.size: 2
.value_kind: hidden_group_size_x
- .offset: 38
.size: 2
.value_kind: hidden_group_size_y
- .offset: 40
.size: 2
.value_kind: hidden_group_size_z
- .offset: 42
.size: 2
.value_kind: hidden_remainder_x
- .offset: 44
.size: 2
.value_kind: hidden_remainder_y
- .offset: 46
.size: 2
.value_kind: hidden_remainder_z
- .offset: 64
.size: 8
.value_kind: hidden_global_offset_x
- .offset: 72
.size: 8
.value_kind: hidden_global_offset_y
- .offset: 80
.size: 8
.value_kind: hidden_global_offset_z
- .offset: 88
.size: 2
.value_kind: hidden_grid_dims
.group_segment_fixed_size: 0
.kernarg_segment_align: 8
.kernarg_segment_size: 280
.language: OpenCL C
.language_version:
- 2
- 0
.max_flat_workgroup_size: 1024
.name: _Z30RungeKuttaStepRegisterFriendlyPdPKdi
.private_segment_fixed_size: 0
.sgpr_count: 18
.sgpr_spill_count: 0
.symbol: _Z30RungeKuttaStepRegisterFriendlyPdPKdi.kd
.uniform_work_group_size: 1
.uses_dynamic_stack: false
.vgpr_count: 38
.vgpr_spill_count: 0
.wavefront_size: 32
.workgroup_processor_mode: 1
amdhsa.target: amdgcn-amd-amdhsa--gfx1100
amdhsa.version:
- 1
- 2
...
.end_amdgpu_metadata |
You are a helpful coding assistant specialized in converting HIP source code to AMD host assembly. | #include <hip/hip_runtime.h>
#include <iostream>
#include <iomanip>
#include <vector>
#include <string>
#include <fstream>
using namespace std;
void Linspace(double*, double, double, int);
void Uniform(double*, double, int);
__global__ void RungeKuttaStepOriginal(double* __restrict__, const double* __restrict__, int);
__global__ void RungeKuttaStepRegisterFriendly(double* __restrict__, const double* __restrict__, int);
__device__ void Lorenz(double* __restrict__, const double* __restrict__, double);
template <class DataType>
DataType* AllocateHostMemory(int);
template <class DataType>
DataType* AllocateDeviceMemory(int);
int main()
{
// INITIAL SETUP ----------------------------------------------------------------------------------
int NumberOfProblems = 768000;
int NumberOfThreads = NumberOfProblems;
int BlockSize = 64;
hipSetDevice(1);
double* h_State = AllocateHostMemory<double>( 3*NumberOfProblems );
double* h_Parameters = AllocateHostMemory<double>( NumberOfProblems );
double* d_State = AllocateDeviceMemory<double>( 3*NumberOfProblems );
double* d_Parameters = AllocateDeviceMemory<double>( NumberOfProblems );
Linspace(h_Parameters, 0.0, 21.0, NumberOfProblems);
Uniform(h_State, 10.0, NumberOfProblems);
Uniform(&h_State[ NumberOfProblems ], 10.0, NumberOfProblems);
Uniform(&h_State[ 2*NumberOfProblems ], 10.0, NumberOfProblems);
hipMemcpy(d_State, h_State, 3*sizeof(double)*NumberOfProblems, hipMemcpyHostToDevice);
hipMemcpy(d_Parameters, h_Parameters, sizeof(double)*NumberOfProblems, hipMemcpyHostToDevice);
int GridSize = NumberOfThreads/BlockSize + (NumberOfThreads % BlockSize == 0 ? 0:1);
clock_t SimulationStart;
clock_t SimulationEnd;
SimulationStart = clock();
RungeKuttaStepRegisterFriendly<<<GridSize, BlockSize>>> (d_State, d_Parameters, NumberOfProblems);
hipDeviceSynchronize();
SimulationEnd = clock();
cout << "Simulation time: " << 1000.0*(SimulationEnd-SimulationStart) / CLOCKS_PER_SEC << "ms" << endl << endl;
cout << "Simulation time / 1000 RK4 step: " << 1000.0*(SimulationEnd-SimulationStart) / CLOCKS_PER_SEC << "ms" << endl;
cout << "Ensemble size: " << NumberOfProblems << endl << endl;
hipMemcpyAsync(h_State, d_State, 3*sizeof(double)*NumberOfProblems, hipMemcpyDeviceToHost);
//for (int i=0; i<NumberOfProblems; i++)
// cout << "P: " << h_Parameters[i] << " Sates: " << h_State[i] << ", " << h_State[i+NumberOfProblems] << ", " << h_State[i+2*NumberOfProblems] << endl;
}
// AUXILIARY FUNCTION -----------------------------------------------------------------------------
void Linspace(double* x, double B, double E, int N)
{
double Increment;
x[0] = B;
if ( N>1 )
{
x[N-1] = E;
Increment = (E-B)/(N-1);
for (int i=1; i<N-1; i++)
{
x[i] = B + i*Increment;
}
}
}
void Uniform(double* x, double V, int N)
{
for (int i=0; i<N; i++)
{
x[i] = V;
}
}
__forceinline__ __device__ void Lorenz(double* __restrict__ F, const double* __restrict__ X, double P)
{
F[0] = 10.0*(X[1] - X[0]);
F[1] = P*X[0] - X[1] - X[0]*X[2];
F[2] = X[0]*X[1] - 2.666 * X[2];
}
__global__ void RungeKuttaStepRegisterFriendly(double* __restrict__ d_State, const double* __restrict__ d_Parameters, int N)
{
int tid = threadIdx.x + blockIdx.x*blockDim.x;
if (tid < N)
{
double X[3];
double P;
double k1[3];
double ks[3];
double x[3];
double dT = 1e-3;
double dTp2 = 0.5*dT;
double dTp6 = dT * (1.0/6.0);
X[0] = d_State[tid];
X[1] = d_State[tid + N];
X[2] = d_State[tid + 2*N];
P = d_Parameters[tid];
for (int i=0; i<1000; i++)
{
Lorenz(k1, X, P);
#pragma unroll 3
for (int j=0; j<3; j++)
{
x[j] = X[j] + dTp2*k1[j];
ks[j] = k1[j];
}
Lorenz(k1, x, P);
#pragma unroll 3
for (int j=0; j<3; j++)
{
x[j] = X[j] + dTp2*k1[j];
ks[j] = ks[j]+2.0*k1[j];
}
Lorenz(k1, x, P);
#pragma unroll 3
for (int j=0; j<3; j++)
{
x[j] = X[j] + dT*k1[j];
ks[j] = ks[j]+2.0*k1[j];
}
Lorenz(k1, x, P);
#pragma unroll 3
for (int j=0; j<3; j++)
X[j] = X[j] + dTp6*( ks[j] + k1[j] );
}
d_State[tid] = X[0];
d_State[tid + N] = X[1];
d_State[tid + 2*N] = X[2];
}
}
template <class DataType>
DataType* AllocateHostMemory(int N)
{
DataType* HostMemory = new (std::nothrow) DataType [N];
if (HostMemory == NULL)
{
std::cerr << "Failed to allocate Memory on the HOST!\n";
exit(EXIT_FAILURE);
}
return HostMemory;
}
template <class DataType>
DataType* AllocateDeviceMemory(int N)
{
hipError_t Error = hipSuccess;
DataType* MemoryAddressInDevice = NULL;
Error = hipMalloc((void**)&MemoryAddressInDevice, N * sizeof(DataType));
if (Error != hipSuccess)
{
std::cerr << "Failed to allocate Memory on the DEVICE!\n";
exit(EXIT_FAILURE);
}
return MemoryAddressInDevice;
} | .text
.file "Lorenz_HandTuned.hip"
# Start of file scope inline assembly
.globl _ZSt21ios_base_library_initv
# End of file scope inline assembly
.section .rodata.cst8,"aM",@progbits,8
.p2align 3, 0x0 # -- Begin function main
.LCPI0_0:
.quad 0x3efcac0aa3809106 # double 2.7343785603887504E-5
.LCPI0_1:
.quad 0x408f400000000000 # double 1000
.LCPI0_2:
.quad 0x412e848000000000 # double 1.0E+6
.text
.globl main
.p2align 4, 0x90
.type main,@function
main: # @main
.cfi_startproc
# %bb.0:
pushq %r15
.cfi_def_cfa_offset 16
pushq %r14
.cfi_def_cfa_offset 24
pushq %r12
.cfi_def_cfa_offset 32
pushq %rbx
.cfi_def_cfa_offset 40
subq $120, %rsp
.cfi_def_cfa_offset 160
.cfi_offset %rbx, -40
.cfi_offset %r12, -32
.cfi_offset %r14, -24
.cfi_offset %r15, -16
movl $1, %edi
callq hipSetDevice
movl $18432000, %edi # imm = 0x1194000
movl $_ZSt7nothrow, %esi
callq _ZnamRKSt9nothrow_t
testq %rax, %rax
je .LBB0_1
# %bb.3: # %_Z18AllocateHostMemoryIdEPT_i.exit
movq %rax, %rbx
movl $6144000, %edi # imm = 0x5DC000
movl $_ZSt7nothrow, %esi
callq _ZnamRKSt9nothrow_t
testq %rax, %rax
je .LBB0_1
# %bb.4: # %_Z18AllocateHostMemoryIdEPT_i.exit40
movq %rax, %r15
movq $0, 16(%rsp)
leaq 16(%rsp), %rdi
movl $18432000, %esi # imm = 0x1194000
callq hipMalloc
testl %eax, %eax
jne .LBB0_5
# %bb.6: # %_Z20AllocateDeviceMemoryIdEPT_i.exit
movq 16(%rsp), %r14
movq $0, 16(%rsp)
leaq 16(%rsp), %rdi
movl $6144000, %esi # imm = 0x5DC000
callq hipMalloc
testl %eax, %eax
jne .LBB0_5
# %bb.7: # %_Z20AllocateDeviceMemoryIdEPT_i.exit42
movq 16(%rsp), %r12
movq $0, (%r15)
movabsq $4626604192193052672, %rax # imm = 0x4035000000000000
movq %rax, 6143992(%r15)
movl $1, %eax
movsd .LCPI0_0(%rip), %xmm0 # xmm0 = mem[0],zero
xorpd %xmm1, %xmm1
.p2align 4, 0x90
.LBB0_8: # %.lr.ph.i
# =>This Inner Loop Header: Depth=1
xorps %xmm2, %xmm2
cvtsi2sd %eax, %xmm2
mulsd %xmm0, %xmm2
addsd %xmm1, %xmm2
movsd %xmm2, (%r15,%rax,8)
incq %rax
cmpq $767999, %rax # imm = 0xBB7FF
jne .LBB0_8
# %bb.9: # %.lr.ph.i43.preheader
xorl %ecx, %ecx
movabsq $4621819117588971520, %rax # imm = 0x4024000000000000
.p2align 4, 0x90
.LBB0_10: # %.lr.ph.i43
# =>This Inner Loop Header: Depth=1
movq %rax, (%rbx,%rcx,8)
incq %rcx
cmpq $768000, %rcx # imm = 0xBB800
jne .LBB0_10
# %bb.11: # %_Z7UniformPddi.exit
movl $768000, %ecx # imm = 0xBB800
.p2align 4, 0x90
.LBB0_12: # %.lr.ph.i47
# =>This Inner Loop Header: Depth=1
movq %rax, (%rbx,%rcx,8)
incq %rcx
cmpq $1536000, %rcx # imm = 0x177000
jne .LBB0_12
# %bb.13: # %_Z7UniformPddi.exit51
movl $1536000, %ecx # imm = 0x177000
.p2align 4, 0x90
.LBB0_14: # %.lr.ph.i52
# =>This Inner Loop Header: Depth=1
movq %rax, (%rbx,%rcx,8)
incq %rcx
cmpq $2304000, %rcx # imm = 0x232800
jne .LBB0_14
# %bb.15: # %_Z7UniformPddi.exit56
movl $18432000, %edx # imm = 0x1194000
movq %r14, %rdi
movq %rbx, %rsi
movl $1, %ecx
callq hipMemcpy
movl $6144000, %edx # imm = 0x5DC000
movq %r12, %rdi
movq %r15, %rsi
movl $1, %ecx
callq hipMemcpy
callq clock
movq %rax, %r15
movabsq $4294967360, %rdx # imm = 0x100000040
leaq 11936(%rdx), %rdi
movl $1, %esi
movl $1, %ecx
xorl %r8d, %r8d
xorl %r9d, %r9d
callq __hipPushCallConfiguration
testl %eax, %eax
jne .LBB0_17
# %bb.16:
movq %r14, 112(%rsp)
movq %r12, 104(%rsp)
movl $768000, 12(%rsp) # imm = 0xBB800
leaq 112(%rsp), %rax
movq %rax, 16(%rsp)
leaq 104(%rsp), %rax
movq %rax, 24(%rsp)
leaq 12(%rsp), %rax
movq %rax, 32(%rsp)
leaq 88(%rsp), %rdi
leaq 72(%rsp), %rsi
leaq 64(%rsp), %rdx
leaq 56(%rsp), %rcx
callq __hipPopCallConfiguration
movq 88(%rsp), %rsi
movl 96(%rsp), %edx
movq 72(%rsp), %rcx
movl 80(%rsp), %r8d
leaq 16(%rsp), %r9
movl $_Z30RungeKuttaStepRegisterFriendlyPdPKdi, %edi
pushq 56(%rsp)
.cfi_adjust_cfa_offset 8
pushq 72(%rsp)
.cfi_adjust_cfa_offset 8
callq hipLaunchKernel
addq $16, %rsp
.cfi_adjust_cfa_offset -16
.LBB0_17:
callq hipDeviceSynchronize
callq clock
movq %rax, %r12
movl $_ZSt4cout, %edi
movl $.L.str, %esi
movl $17, %edx
callq _ZSt16__ostream_insertIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_PKS3_l
subq %r15, %r12
xorps %xmm0, %xmm0
cvtsi2sd %r12, %xmm0
mulsd .LCPI0_1(%rip), %xmm0
divsd .LCPI0_2(%rip), %xmm0
movl $_ZSt4cout, %edi
movsd %xmm0, 48(%rsp) # 8-byte Spill
callq _ZNSo9_M_insertIdEERSoT_
movq %rax, %r15
movl $.L.str.1, %esi
movl $2, %edx
movq %rax, %rdi
callq _ZSt16__ostream_insertIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_PKS3_l
movq (%r15), %rax
movq -24(%rax), %rax
movq 240(%r15,%rax), %r12
testq %r12, %r12
je .LBB0_38
# %bb.18: # %_ZSt13__check_facetISt5ctypeIcEERKT_PS3_.exit.i.i
cmpb $0, 56(%r12)
je .LBB0_20
# %bb.19:
movzbl 67(%r12), %eax
jmp .LBB0_21
.LBB0_20:
movq %r12, %rdi
callq _ZNKSt5ctypeIcE13_M_widen_initEv
movq (%r12), %rax
movq %r12, %rdi
movl $10, %esi
callq *48(%rax)
.LBB0_21: # %_ZSt4endlIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_.exit
movsbl %al, %esi
movq %r15, %rdi
callq _ZNSo3putEc
movq %rax, %rdi
callq _ZNSo5flushEv
movq (%rax), %rcx
movq -24(%rcx), %rcx
movq 240(%rax,%rcx), %r15
testq %r15, %r15
je .LBB0_38
# %bb.22: # %_ZSt13__check_facetISt5ctypeIcEERKT_PS3_.exit.i.i58
cmpb $0, 56(%r15)
je .LBB0_24
# %bb.23:
movzbl 67(%r15), %ecx
jmp .LBB0_25
.LBB0_24:
movq %r15, %rdi
movq %rax, %r12
callq _ZNKSt5ctypeIcE13_M_widen_initEv
movq (%r15), %rax
movq %r15, %rdi
movl $10, %esi
callq *48(%rax)
movl %eax, %ecx
movq %r12, %rax
.LBB0_25: # %_ZSt4endlIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_.exit61
movsbl %cl, %esi
movq %rax, %rdi
callq _ZNSo3putEc
movq %rax, %rdi
callq _ZNSo5flushEv
movl $_ZSt4cout, %edi
movl $.L.str.2, %esi
movl $33, %edx
callq _ZSt16__ostream_insertIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_PKS3_l
movl $_ZSt4cout, %edi
movsd 48(%rsp), %xmm0 # 8-byte Reload
# xmm0 = mem[0],zero
callq _ZNSo9_M_insertIdEERSoT_
movq %rax, %r15
movl $.L.str.1, %esi
movl $2, %edx
movq %rax, %rdi
callq _ZSt16__ostream_insertIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_PKS3_l
movq (%r15), %rax
movq -24(%rax), %rax
movq 240(%r15,%rax), %r12
testq %r12, %r12
je .LBB0_38
# %bb.26: # %_ZSt13__check_facetISt5ctypeIcEERKT_PS3_.exit.i.i63
cmpb $0, 56(%r12)
je .LBB0_28
# %bb.27:
movzbl 67(%r12), %eax
jmp .LBB0_29
.LBB0_28:
movq %r12, %rdi
callq _ZNKSt5ctypeIcE13_M_widen_initEv
movq (%r12), %rax
movq %r12, %rdi
movl $10, %esi
callq *48(%rax)
.LBB0_29: # %_ZSt4endlIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_.exit66
movsbl %al, %esi
movq %r15, %rdi
callq _ZNSo3putEc
movq %rax, %rdi
callq _ZNSo5flushEv
movl $_ZSt4cout, %edi
movl $.L.str.3, %esi
movl $33, %edx
callq _ZSt16__ostream_insertIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_PKS3_l
movl $_ZSt4cout, %edi
movl $768000, %esi # imm = 0xBB800
callq _ZNSolsEi
movq (%rax), %rcx
movq -24(%rcx), %rcx
movq 240(%rax,%rcx), %r15
testq %r15, %r15
je .LBB0_38
# %bb.30: # %_ZSt13__check_facetISt5ctypeIcEERKT_PS3_.exit.i.i68
cmpb $0, 56(%r15)
je .LBB0_32
# %bb.31:
movzbl 67(%r15), %ecx
jmp .LBB0_33
.LBB0_32:
movq %r15, %rdi
movq %rax, %r12
callq _ZNKSt5ctypeIcE13_M_widen_initEv
movq (%r15), %rax
movq %r15, %rdi
movl $10, %esi
callq *48(%rax)
movl %eax, %ecx
movq %r12, %rax
.LBB0_33: # %_ZSt4endlIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_.exit71
movsbl %cl, %esi
movq %rax, %rdi
callq _ZNSo3putEc
movq %rax, %rdi
callq _ZNSo5flushEv
movq (%rax), %rcx
movq -24(%rcx), %rcx
movq 240(%rax,%rcx), %r15
testq %r15, %r15
je .LBB0_38
# %bb.34: # %_ZSt13__check_facetISt5ctypeIcEERKT_PS3_.exit.i.i73
cmpb $0, 56(%r15)
je .LBB0_36
# %bb.35:
movzbl 67(%r15), %ecx
jmp .LBB0_37
.LBB0_36:
movq %r15, %rdi
movq %rax, %r12
callq _ZNKSt5ctypeIcE13_M_widen_initEv
movq (%r15), %rax
movq %r15, %rdi
movl $10, %esi
callq *48(%rax)
movl %eax, %ecx
movq %r12, %rax
.LBB0_37: # %_ZSt4endlIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_.exit76
movsbl %cl, %esi
movq %rax, %rdi
callq _ZNSo3putEc
movq %rax, %rdi
callq _ZNSo5flushEv
movl $18432000, %edx # imm = 0x1194000
movq %rbx, %rdi
movq %r14, %rsi
movl $2, %ecx
xorl %r8d, %r8d
callq hipMemcpyAsync
xorl %eax, %eax
addq $120, %rsp
.cfi_def_cfa_offset 40
popq %rbx
.cfi_def_cfa_offset 32
popq %r12
.cfi_def_cfa_offset 24
popq %r14
.cfi_def_cfa_offset 16
popq %r15
.cfi_def_cfa_offset 8
retq
.LBB0_38:
.cfi_def_cfa_offset 160
callq _ZSt16__throw_bad_castv
.LBB0_1:
movl $_ZSt4cerr, %edi
movl $.L.str.4, %esi
jmp .LBB0_2
.LBB0_5:
movl $_ZSt4cerr, %edi
movl $.L.str.5, %esi
.LBB0_2:
callq _ZStlsISt11char_traitsIcEERSt13basic_ostreamIcT_ES5_PKc
movl $1, %edi
callq exit
.Lfunc_end0:
.size main, .Lfunc_end0-main
.cfi_endproc
# -- End function
.globl _Z8LinspacePdddi # -- Begin function _Z8LinspacePdddi
.p2align 4, 0x90
.type _Z8LinspacePdddi,@function
_Z8LinspacePdddi: # @_Z8LinspacePdddi
.cfi_startproc
# %bb.0:
# kill: def $esi killed $esi def $rsi
movsd %xmm0, (%rdi)
cmpl $2, %esi
jl .LBB1_4
# %bb.1:
leal -1(%rsi), %eax
movsd %xmm1, (%rdi,%rax,8)
cmpl $2, %esi
je .LBB1_4
# %bb.2: # %.lr.ph.preheader
cvtsi2sd %eax, %xmm2
subsd %xmm0, %xmm1
divsd %xmm2, %xmm1
movl %eax, %eax
movl $1, %ecx
.p2align 4, 0x90
.LBB1_3: # %.lr.ph
# =>This Inner Loop Header: Depth=1
xorps %xmm2, %xmm2
cvtsi2sd %ecx, %xmm2
mulsd %xmm1, %xmm2
addsd %xmm0, %xmm2
movsd %xmm2, (%rdi,%rcx,8)
incq %rcx
cmpq %rcx, %rax
jne .LBB1_3
.LBB1_4: # %.loopexit
retq
.Lfunc_end1:
.size _Z8LinspacePdddi, .Lfunc_end1-_Z8LinspacePdddi
.cfi_endproc
# -- End function
.globl _Z7UniformPddi # -- Begin function _Z7UniformPddi
.p2align 4, 0x90
.type _Z7UniformPddi,@function
_Z7UniformPddi: # @_Z7UniformPddi
.cfi_startproc
# %bb.0:
testl %esi, %esi
jle .LBB2_3
# %bb.1: # %.lr.ph.preheader
movl %esi, %eax
xorl %ecx, %ecx
.p2align 4, 0x90
.LBB2_2: # %.lr.ph
# =>This Inner Loop Header: Depth=1
movsd %xmm0, (%rdi,%rcx,8)
incq %rcx
cmpq %rcx, %rax
jne .LBB2_2
.LBB2_3: # %._crit_edge
retq
.Lfunc_end2:
.size _Z7UniformPddi, .Lfunc_end2-_Z7UniformPddi
.cfi_endproc
# -- End function
.globl _Z45__device_stub__RungeKuttaStepRegisterFriendlyPdPKdi # -- Begin function _Z45__device_stub__RungeKuttaStepRegisterFriendlyPdPKdi
.p2align 4, 0x90
.type _Z45__device_stub__RungeKuttaStepRegisterFriendlyPdPKdi,@function
_Z45__device_stub__RungeKuttaStepRegisterFriendlyPdPKdi: # @_Z45__device_stub__RungeKuttaStepRegisterFriendlyPdPKdi
.cfi_startproc
# %bb.0:
subq $104, %rsp
.cfi_def_cfa_offset 112
movq %rdi, 72(%rsp)
movq %rsi, 64(%rsp)
movl %edx, 12(%rsp)
leaq 72(%rsp), %rax
movq %rax, 80(%rsp)
leaq 64(%rsp), %rax
movq %rax, 88(%rsp)
leaq 12(%rsp), %rax
movq %rax, 96(%rsp)
leaq 48(%rsp), %rdi
leaq 32(%rsp), %rsi
leaq 24(%rsp), %rdx
leaq 16(%rsp), %rcx
callq __hipPopCallConfiguration
movq 48(%rsp), %rsi
movl 56(%rsp), %edx
movq 32(%rsp), %rcx
movl 40(%rsp), %r8d
leaq 80(%rsp), %r9
movl $_Z30RungeKuttaStepRegisterFriendlyPdPKdi, %edi
pushq 16(%rsp)
.cfi_adjust_cfa_offset 8
pushq 32(%rsp)
.cfi_adjust_cfa_offset 8
callq hipLaunchKernel
addq $120, %rsp
.cfi_adjust_cfa_offset -120
retq
.Lfunc_end3:
.size _Z45__device_stub__RungeKuttaStepRegisterFriendlyPdPKdi, .Lfunc_end3-_Z45__device_stub__RungeKuttaStepRegisterFriendlyPdPKdi
.cfi_endproc
# -- End function
.p2align 4, 0x90 # -- Begin function __hip_module_ctor
.type __hip_module_ctor,@function
__hip_module_ctor: # @__hip_module_ctor
.cfi_startproc
# %bb.0:
subq $40, %rsp
.cfi_def_cfa_offset 48
cmpq $0, __hip_gpubin_handle(%rip)
jne .LBB4_2
# %bb.1:
movl $__hip_fatbin_wrapper, %edi
callq __hipRegisterFatBinary
movq %rax, __hip_gpubin_handle(%rip)
.LBB4_2:
movq __hip_gpubin_handle(%rip), %rdi
xorps %xmm0, %xmm0
movups %xmm0, 16(%rsp)
movups %xmm0, (%rsp)
movl $_Z30RungeKuttaStepRegisterFriendlyPdPKdi, %esi
movl $.L__unnamed_1, %edx
movl $.L__unnamed_1, %ecx
movl $-1, %r8d
xorl %r9d, %r9d
callq __hipRegisterFunction
movl $__hip_module_dtor, %edi
addq $40, %rsp
.cfi_def_cfa_offset 8
jmp atexit # TAILCALL
.Lfunc_end4:
.size __hip_module_ctor, .Lfunc_end4-__hip_module_ctor
.cfi_endproc
# -- End function
.p2align 4, 0x90 # -- Begin function __hip_module_dtor
.type __hip_module_dtor,@function
__hip_module_dtor: # @__hip_module_dtor
.cfi_startproc
# %bb.0:
movq __hip_gpubin_handle(%rip), %rdi
testq %rdi, %rdi
je .LBB5_2
# %bb.1:
pushq %rax
.cfi_def_cfa_offset 16
callq __hipUnregisterFatBinary
movq $0, __hip_gpubin_handle(%rip)
addq $8, %rsp
.cfi_def_cfa_offset 8
.LBB5_2:
retq
.Lfunc_end5:
.size __hip_module_dtor, .Lfunc_end5-__hip_module_dtor
.cfi_endproc
# -- End function
.type _Z30RungeKuttaStepRegisterFriendlyPdPKdi,@object # @_Z30RungeKuttaStepRegisterFriendlyPdPKdi
.section .rodata,"a",@progbits
.globl _Z30RungeKuttaStepRegisterFriendlyPdPKdi
.p2align 3, 0x0
_Z30RungeKuttaStepRegisterFriendlyPdPKdi:
.quad _Z45__device_stub__RungeKuttaStepRegisterFriendlyPdPKdi
.size _Z30RungeKuttaStepRegisterFriendlyPdPKdi, 8
.type .L.str,@object # @.str
.section .rodata.str1.1,"aMS",@progbits,1
.L.str:
.asciz "Simulation time: "
.size .L.str, 18
.type .L.str.1,@object # @.str.1
.L.str.1:
.asciz "ms"
.size .L.str.1, 3
.type .L.str.2,@object # @.str.2
.L.str.2:
.asciz "Simulation time / 1000 RK4 step: "
.size .L.str.2, 34
.type .L.str.3,@object # @.str.3
.L.str.3:
.asciz "Ensemble size: "
.size .L.str.3, 34
.type .L.str.4,@object # @.str.4
.L.str.4:
.asciz "Failed to allocate Memory on the HOST!\n"
.size .L.str.4, 40
.type .L.str.5,@object # @.str.5
.L.str.5:
.asciz "Failed to allocate Memory on the DEVICE!\n"
.size .L.str.5, 42
.type .L__unnamed_1,@object # @0
.L__unnamed_1:
.asciz "_Z30RungeKuttaStepRegisterFriendlyPdPKdi"
.size .L__unnamed_1, 41
.type __hip_fatbin_wrapper,@object # @__hip_fatbin_wrapper
.section .hipFatBinSegment,"a",@progbits
.p2align 3, 0x0
__hip_fatbin_wrapper:
.long 1212764230 # 0x48495046
.long 1 # 0x1
.quad __hip_fatbin
.quad 0
.size __hip_fatbin_wrapper, 24
.type __hip_gpubin_handle,@object # @__hip_gpubin_handle
.local __hip_gpubin_handle
.comm __hip_gpubin_handle,8,8
.section .init_array,"aw",@init_array
.p2align 3, 0x0
.quad __hip_module_ctor
.type __hip_cuid_,@object # @__hip_cuid_
.bss
.globl __hip_cuid_
__hip_cuid_:
.byte 0 # 0x0
.size __hip_cuid_, 1
.section ".linker-options","e",@llvm_linker_options
.ident "AMD clang version 18.0.0git (https://github.com/RadeonOpenCompute/llvm-project roc-6.3.2 25012 e5bf7e55c91490b07c49d8960fa7983d864936c4)"
.section ".note.GNU-stack","",@progbits
.addrsig
.addrsig_sym _Z45__device_stub__RungeKuttaStepRegisterFriendlyPdPKdi
.addrsig_sym __hip_module_ctor
.addrsig_sym __hip_module_dtor
.addrsig_sym _Z30RungeKuttaStepRegisterFriendlyPdPKdi
.addrsig_sym _ZSt4cout
.addrsig_sym _ZSt7nothrow
.addrsig_sym _ZSt4cerr
.addrsig_sym __hip_fatbin
.addrsig_sym __hip_fatbin_wrapper
.addrsig_sym __hip_cuid_ |
You are a helpful coding assistant specialized in converting from CUDA device assembly to AMD device assembly. | code for sm_80
Function : _Z30RungeKuttaStepRegisterFriendlyPdPKdi
.headerflags @"EF_CUDA_TEXMODE_UNIFIED EF_CUDA_64BIT_ADDRESS EF_CUDA_SM80 EF_CUDA_VIRTUAL_SM(EF_CUDA_SM80)"
/*0000*/ MOV R1, c[0x0][0x28] ; /* 0x00000a0000017a02 */
/* 0x000fe40000000f00 */
/*0010*/ S2R R8, SR_CTAID.X ; /* 0x0000000000087919 */
/* 0x000e280000002500 */
/*0020*/ S2R R3, SR_TID.X ; /* 0x0000000000037919 */
/* 0x000e240000002100 */
/*0030*/ IMAD R8, R8, c[0x0][0x0], R3 ; /* 0x0000000008087a24 */
/* 0x001fca00078e0203 */
/*0040*/ ISETP.GE.AND P0, PT, R8, c[0x0][0x170], PT ; /* 0x00005c0008007a0c */
/* 0x000fda0003f06270 */
/*0050*/ @P0 EXIT ; /* 0x000000000000094d */
/* 0x000fea0003800000 */
/*0060*/ HFMA2.MMA R7, -RZ, RZ, 0, 4.76837158203125e-07 ; /* 0x00000008ff077435 */
/* 0x000fe200000001ff */
/*0070*/ MOV R5, c[0x0][0x170] ; /* 0x00005c0000057a02 */
/* 0x000fe20000000f00 */
/*0080*/ ULDC.64 UR4, c[0x0][0x118] ; /* 0x0000460000047ab9 */
/* 0x000fc60000000a00 */
/*0090*/ LEA R6, R5, R8, 0x1 ; /* 0x0000000805067211 */
/* 0x000fca00078e08ff */
/*00a0*/ IMAD.WIDE R2, R8, R7, c[0x0][0x160] ; /* 0x0000580008027625 */
/* 0x000fc800078e0207 */
/*00b0*/ IMAD.WIDE R8, R8, R7.reuse, c[0x0][0x168] ; /* 0x00005a0008087625 */
/* 0x080fe200078e0207 */
/*00c0*/ LDG.E.64 R14, [R2.64] ; /* 0x00000004020e7981 */
/* 0x000166000c1e1b00 */
/*00d0*/ IMAD.WIDE R4, R7, c[0x0][0x170], R2 ; /* 0x00005c0007047a25 */
/* 0x000fe400078e0202 */
/*00e0*/ LDG.E.64.CONSTANT R8, [R8.64] ; /* 0x0000000408087981 */
/* 0x000f64000c1e9b00 */
/*00f0*/ IMAD.WIDE R6, R6, R7, c[0x0][0x160] ; /* 0x0000580006067625 */
/* 0x000fe400078e0207 */
/*0100*/ LDG.E.64 R12, [R4.64] ; /* 0x00000004040c7981 */
/* 0x000168000c1e1b00 */
/*0110*/ LDG.E.64 R10, [R6.64] ; /* 0x00000004060a7981 */
/* 0x000162000c1e1b00 */
/*0120*/ HFMA2.MMA R0, -RZ, RZ, 0, 0 ; /* 0x00000000ff007435 */
/* 0x000fd200000001ff */
/*0130*/ DADD R20, R12, -R14 ; /* 0x000000000c147229 */
/* 0x028e62000000080e */
/*0140*/ IADD3 R0, R0, 0x2, RZ ; /* 0x0000000200007810 */
/* 0x000fc60007ffe0ff */
/*0150*/ DFMA R18, R8, R14, -R12 ; /* 0x0000000e0812722b */
/* 0x004ea2000000080c */
/*0160*/ ISETP.NE.AND P0, PT, R0, 0x3e8, PT ; /* 0x000003e80000780c */
/* 0x000fc60003f05270 */
/*0170*/ DMUL R16, R10, c[0x2][0x0] ; /* 0x008000000a107a28 */
/* 0x000ec80000000000 */
/*0180*/ DMUL R20, R20, 10 ; /* 0x4024000014147828 */
/* 0x002e480000000000 */
/*0190*/ DFMA R18, R10, -R14, R18 ; /* 0x8000000e0a12722b */
/* 0x004e880000000012 */
/*01a0*/ DFMA R16, R12, R14, -R16 ; /* 0x0000000e0c10722b */
/* 0x008ec80000000810 */
/*01b0*/ DFMA R24, R20, c[0x2][0x8], R14 ; /* 0x0080020014187a2b */
/* 0x002fc8000000000e */
/*01c0*/ DFMA R26, R18, c[0x2][0x8], R12 ; /* 0x00800200121a7a2b */
/* 0x004e48000000000c */
/*01d0*/ DFMA R28, R16, c[0x2][0x8], R10 ; /* 0x00800200101c7a2b */
/* 0x008fc8000000000a */
/*01e0*/ DFMA R22, R8, R24, -R26 ; /* 0x000000180816722b */
/* 0x002e48000000081a */
/*01f0*/ DADD R30, -R24, R26 ; /* 0x00000000181e7229 */
/* 0x000e88000000011a */
/*0200*/ DFMA R22, -R24, R28, R22 ; /* 0x0000001c1816722b */
/* 0x002fc80000000116 */
/*0210*/ DMUL R28, R28, c[0x2][0x0] ; /* 0x008000001c1c7a28 */
/* 0x000e480000000000 */
/*0220*/ DMUL R30, R30, 10 ; /* 0x402400001e1e7828 */
/* 0x004e880000000000 */
/*0230*/ DFMA R24, R24, R26, -R28 ; /* 0x0000001a1818722b */
/* 0x002e48000000081c */
/*0240*/ DFMA R26, R30, c[0x2][0x8], R14 ; /* 0x008002001e1a7a2b */
/* 0x004fc8000000000e */
/*0250*/ DFMA R28, R22, c[0x2][0x8], R12 ; /* 0x00800200161c7a2b */
/* 0x000e88000000000c */
/*0260*/ DFMA R18, R22, 2, R18 ; /* 0x400000001612782b */
/* 0x000fc80000000012 */
/*0270*/ DFMA R16, R24, 2, R16 ; /* 0x400000001810782b */
/* 0x002fc80000000010 */
/*0280*/ DFMA R24, R24, c[0x2][0x8], R10 ; /* 0x0080020018187a2b */
/* 0x000fc8000000000a */
/*0290*/ DFMA R22, R8, R26, -R28 ; /* 0x0000001a0816722b */
/* 0x004e48000000081c */
/*02a0*/ DFMA R20, R30, 2, R20 ; /* 0x400000001e14782b */
/* 0x000fc80000000014 */
/*02b0*/ DADD R30, -R26, R28 ; /* 0x000000001a1e7229 */
/* 0x000e88000000011c */
/*02c0*/ DFMA R22, -R26, R24, R22 ; /* 0x000000181a16722b */
/* 0x002fc80000000116 */
/*02d0*/ DMUL R24, R24, c[0x2][0x0] ; /* 0x0080000018187a28 */
/* 0x000e480000000000 */
/*02e0*/ DMUL R30, R30, 10 ; /* 0x402400001e1e7828 */
/* 0x004e880000000000 */
/*02f0*/ DFMA R28, R26, R28, -R24 ; /* 0x0000001c1a1c722b */
/* 0x002e480000000818 */
/*0300*/ DFMA R26, R30, c[0x2][0x10], R14 ; /* 0x008004001e1a7a2b */
/* 0x004fc8000000000e */
/*0310*/ DFMA R24, R22, c[0x2][0x10], R12 ; /* 0x0080040016187a2b */
/* 0x000e88000000000c */
/*0320*/ DFMA R20, R30, 2, R20 ; /* 0x400000001e14782b */
/* 0x000fc80000000014 */
/*0330*/ DFMA R18, R22, 2, R18 ; /* 0x400000001612782b */
/* 0x000fc80000000012 */
/*0340*/ DFMA R30, R28, c[0x2][0x10], R10 ; /* 0x008004001c1e7a2b */
/* 0x002fc8000000000a */
/*0350*/ DFMA R22, R8, R26, -R24 ; /* 0x0000001a0816722b */
/* 0x004e480000000818 */
/*0360*/ DFMA R16, R28, 2, R16 ; /* 0x400000001c10782b */
/* 0x000fc80000000010 */
/*0370*/ DFMA R22, -R26, R30, R22 ; /* 0x0000001e1a16722b */
/* 0x002fc80000000116 */
/*0380*/ DMUL R30, R30, c[0x2][0x0] ; /* 0x008000001e1e7a28 */
/* 0x000e480000000000 */
/*0390*/ DADD R28, -R26, R24 ; /* 0x000000001a1c7229 */
/* 0x000e880000000118 */
/*03a0*/ DFMA R30, R26, R24, -R30 ; /* 0x000000181a1e722b */
/* 0x002e48000000081e */
/*03b0*/ DFMA R20, R28, 10, R20 ; /* 0x402400001c14782b */
/* 0x004e880000000014 */
/*03c0*/ DADD R18, R18, R22 ; /* 0x0000000012127229 */
/* 0x000ec80000000016 */
/*03d0*/ DADD R16, R16, R30 ; /* 0x0000000010107229 */
/* 0x002e48000000001e */
/*03e0*/ DFMA R14, R20, c[0x2][0x18], R14 ; /* 0x00800600140e7a2b */
/* 0x004fc8000000000e */
/*03f0*/ DFMA R12, R18, c[0x2][0x18], R12 ; /* 0x00800600120c7a2b */
/* 0x008e88000000000c */
/*0400*/ DFMA R10, R16, c[0x2][0x18], R10 ; /* 0x00800600100a7a2b */
/* 0x002e48000000000a */
/*0410*/ DADD R16, -R14, R12 ; /* 0x000000000e107229 */
/* 0x004e88000000010c */
/*0420*/ DFMA R18, R8, R14, -R12 ; /* 0x0000000e0812722b */
/* 0x000ec8000000080c */
/*0430*/ DMUL R20, R10, c[0x2][0x0] ; /* 0x008000000a147a28 */
/* 0x002e480000000000 */
/*0440*/ DMUL R16, R16, 10 ; /* 0x4024000010107828 */
/* 0x004e880000000000 */
/*0450*/ DFMA R18, -R14, R10, R18 ; /* 0x0000000a0e12722b */
/* 0x008ec80000000112 */
/*0460*/ DFMA R20, R14, R12, -R20 ; /* 0x0000000c0e14722b */
/* 0x002e480000000814 */
/*0470*/ DFMA R26, R16, c[0x2][0x8], R14 ; /* 0x00800200101a7a2b */
/* 0x004fc8000000000e */
/*0480*/ DFMA R22, R18, c[0x2][0x8], R12 ; /* 0x0080020012167a2b */
/* 0x008e88000000000c */
/*0490*/ DFMA R28, R20, c[0x2][0x8], R10 ; /* 0x00800200141c7a2b */
/* 0x002fc8000000000a */
/*04a0*/ DFMA R24, R8, R26, -R22 ; /* 0x0000001a0818722b */
/* 0x004e480000000816 */
/*04b0*/ DADD R30, -R26, R22 ; /* 0x000000001a1e7229 */
/* 0x000e880000000116 */
/*04c0*/ DFMA R24, -R26, R28, R24 ; /* 0x0000001c1a18722b */
/* 0x002fc80000000118 */
/*04d0*/ DMUL R28, R28, c[0x2][0x0] ; /* 0x008000001c1c7a28 */
/* 0x000e480000000000 */
/*04e0*/ DMUL R30, R30, 10 ; /* 0x402400001e1e7828 */
/* 0x004e880000000000 */
/*04f0*/ DFMA R26, R26, R22, -R28 ; /* 0x000000161a1a722b */
/* 0x002e48000000081c */
/*0500*/ DFMA R18, R24, 2, R18 ; /* 0x400000001812782b */
/* 0x000fc80000000012 */
/*0510*/ DFMA R22, R30, c[0x2][0x8], R14 ; /* 0x008002001e167a2b */
/* 0x004fc8000000000e */
/*0520*/ DFMA R24, R24, c[0x2][0x8], R12 ; /* 0x0080020018187a2b */
/* 0x000e88000000000c */
/*0530*/ DFMA R20, R26, 2, R20 ; /* 0x400000001a14782b */
/* 0x002fc80000000014 */
/*0540*/ DFMA R26, R26, c[0x2][0x8], R10 ; /* 0x008002001a1a7a2b */
/* 0x000fc8000000000a */
/*0550*/ DFMA R28, R8, R22, -R24 ; /* 0x00000016081c722b */
/* 0x004e480000000818 */
/*0560*/ DFMA R16, R30, 2, R16 ; /* 0x400000001e10782b */
/* 0x000fc80000000010 */
/*0570*/ DADD R30, -R22, R24 ; /* 0x00000000161e7229 */
/* 0x000e880000000118 */
/*0580*/ DFMA R28, -R22, R26, R28 ; /* 0x0000001a161c722b */
/* 0x002fc8000000011c */
/*0590*/ DMUL R26, R26, c[0x2][0x0] ; /* 0x008000001a1a7a28 */
/* 0x000e480000000000 */
/*05a0*/ DMUL R30, R30, 10 ; /* 0x402400001e1e7828 */
/* 0x004e880000000000 */
/*05b0*/ DFMA R26, R22, R24, -R26 ; /* 0x00000018161a722b */
/* 0x002fc8000000081a */
/*05c0*/ DFMA R24, R30, c[0x2][0x10], R14 ; /* 0x008004001e187a2b */
/* 0x004fc8000000000e */
/*05d0*/ DFMA R22, R28, c[0x2][0x10], R12 ; /* 0x008004001c167a2b */
/* 0x000e48000000000c */
/*05e0*/ DFMA R16, R30, 2, R16 ; /* 0x400000001e10782b */
/* 0x000fc80000000010 */
/*05f0*/ DADD R30, -R24, R22 ; /* 0x00000000181e7229 */
/* 0x002e480000000116 */
/*0600*/ DFMA R20, R26, 2, R20 ; /* 0x400000001a14782b */
/* 0x000fc80000000014 */
/*0610*/ DFMA R26, R26, c[0x2][0x10], R10 ; /* 0x008004001a1a7a2b */
/* 0x000e88000000000a */
/*0620*/ DFMA R18, R28, 2, R18 ; /* 0x400000001c12782b */
/* 0x000fc80000000012 */
/*0630*/ DFMA R16, R30, 10, R16 ; /* 0x402400001e10782b */
/* 0x002fc80000000010 */
/*0640*/ DFMA R28, R8, R24, -R22 ; /* 0x00000018081c722b */
/* 0x000e480000000816 */
/*0650*/ DMUL R30, R26, c[0x2][0x0] ; /* 0x008000001a1e7a28 */
/* 0x004e880000000000 */
/*0660*/ DFMA R28, -R24, R26, R28 ; /* 0x0000001a181c722b */
/* 0x002e48000000011c */
/*0670*/ DFMA R30, R24, R22, -R30 ; /* 0x00000016181e722b */
/* 0x004e88000000081e */
/*0680*/ DADD R18, R18, R28 ; /* 0x0000000012127229 */
/* 0x002e48000000001c */
/*0690*/ DADD R20, R20, R30 ; /* 0x0000000014147229 */
/* 0x004e88000000001e */
/*06a0*/ DFMA R14, R16, c[0x2][0x18], R14 ; /* 0x00800600100e7a2b */
/* 0x000708000000000e */
/*06b0*/ DFMA R12, R18, c[0x2][0x18], R12 ; /* 0x00800600120c7a2b */
/* 0x002648000000000c */
/*06c0*/ DFMA R10, R20, c[0x2][0x18], R10 ; /* 0x00800600140a7a2b */
/* 0x0046a2000000000a */
/*06d0*/ @P0 BRA 0x130 ; /* 0xfffffa5000000947 */
/* 0x012fea000383ffff */
/*06e0*/ STG.E.64 [R2.64], R14 ; /* 0x0000000e02007986 */
/* 0x000fe8000c101b04 */
/*06f0*/ STG.E.64 [R4.64], R12 ; /* 0x0000000c04007986 */
/* 0x000fe8000c101b04 */
/*0700*/ STG.E.64 [R6.64], R10 ; /* 0x0000000a06007986 */
/* 0x004fe2000c101b04 */
/*0710*/ EXIT ; /* 0x000000000000794d */
/* 0x000fea0003800000 */
/*0720*/ BRA 0x720; /* 0xfffffff000007947 */
/* 0x000fc0000383ffff */
/*0730*/ NOP; /* 0x0000000000007918 */
/* 0x000fc00000000000 */
/*0740*/ NOP; /* 0x0000000000007918 */
/* 0x000fc00000000000 */
/*0750*/ NOP; /* 0x0000000000007918 */
/* 0x000fc00000000000 */
/*0760*/ NOP; /* 0x0000000000007918 */
/* 0x000fc00000000000 */
/*0770*/ NOP; /* 0x0000000000007918 */
/* 0x000fc00000000000 */
/*0780*/ NOP; /* 0x0000000000007918 */
/* 0x000fc00000000000 */
/*0790*/ NOP; /* 0x0000000000007918 */
/* 0x000fc00000000000 */
/*07a0*/ NOP; /* 0x0000000000007918 */
/* 0x000fc00000000000 */
/*07b0*/ NOP; /* 0x0000000000007918 */
/* 0x000fc00000000000 */
/*07c0*/ NOP; /* 0x0000000000007918 */
/* 0x000fc00000000000 */
/*07d0*/ NOP; /* 0x0000000000007918 */
/* 0x000fc00000000000 */
/*07e0*/ NOP; /* 0x0000000000007918 */
/* 0x000fc00000000000 */
/*07f0*/ NOP; /* 0x0000000000007918 */
/* 0x000fc00000000000 */
.......... | .text
.amdgcn_target "amdgcn-amd-amdhsa--gfx1100"
.protected _Z30RungeKuttaStepRegisterFriendlyPdPKdi
.globl _Z30RungeKuttaStepRegisterFriendlyPdPKdi
.p2align 8
.type _Z30RungeKuttaStepRegisterFriendlyPdPKdi,@function
_Z30RungeKuttaStepRegisterFriendlyPdPKdi:
s_clause 0x1
s_load_b32 s3, s[0:1], 0x24
s_load_b32 s2, s[0:1], 0x10
s_waitcnt lgkmcnt(0)
s_and_b32 s3, s3, 0xffff
s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
v_mad_u64_u32 v[1:2], null, s15, s3, v[0:1]
s_mov_b32 s3, exec_lo
v_cmpx_gt_i32_e64 s2, v1
s_cbranch_execz .LBB0_4
s_load_b128 s[4:7], s[0:1], 0x0
v_add_nc_u32_e32 v3, s2, v1
v_ashrrev_i32_e32 v2, 31, v1
v_lshl_add_u32 v5, s2, 1, v1
s_movk_i32 s8, 0x3e8
s_mov_b32 s1, 0x400553f7
v_ashrrev_i32_e32 v4, 31, v3
v_lshlrev_b64 v[7:8], 3, v[1:2]
v_ashrrev_i32_e32 v6, 31, v5
s_mov_b32 s0, 0xced91687
s_mov_b32 s3, 0x3f40624d
v_lshlrev_b64 v[2:3], 3, v[3:4]
s_mov_b32 s2, 0xd2f1a9fc
v_lshlrev_b64 v[4:5], 3, v[5:6]
s_waitcnt lgkmcnt(0)
v_add_co_u32 v0, vcc_lo, s4, v7
v_add_co_ci_u32_e32 v1, vcc_lo, s5, v8, vcc_lo
v_add_co_u32 v2, vcc_lo, s4, v2
v_add_co_ci_u32_e32 v3, vcc_lo, s5, v3, vcc_lo
v_add_co_u32 v4, vcc_lo, s4, v4
v_add_co_ci_u32_e32 v5, vcc_lo, s5, v5, vcc_lo
v_add_co_u32 v12, vcc_lo, s6, v7
v_add_co_ci_u32_e32 v13, vcc_lo, s7, v8, vcc_lo
s_clause 0x2
global_load_b64 v[6:7], v[0:1], off
global_load_b64 v[8:9], v[2:3], off
global_load_b64 v[10:11], v[4:5], off
global_load_b64 v[12:13], v[12:13], off
s_mov_b32 s5, 0x3f50624d
s_mov_b32 s7, 0x3f25d867
s_mov_b32 s6, 0xc3ece2a5
.LBB0_2:
s_waitcnt vmcnt(0)
s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_3)
v_fma_f64 v[14:15], v[12:13], v[6:7], -v[8:9]
v_add_f64 v[16:17], v[8:9], -v[6:7]
v_mul_f64 v[18:19], v[10:11], s[0:1]
s_mov_b32 s4, s2
s_add_i32 s8, s8, -1
s_delay_alu instid0(SALU_CYCLE_1) | instskip(NEXT) | instid1(VALU_DEP_3)
s_cmp_eq_u32 s8, 0
v_fma_f64 v[14:15], -v[6:7], v[10:11], v[14:15]
s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3)
v_mul_f64 v[16:17], v[16:17], 0x40240000
v_fma_f64 v[18:19], v[8:9], v[6:7], -v[18:19]
s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3)
v_fma_f64 v[20:21], v[14:15], s[2:3], v[8:9]
v_fma_f64 v[22:23], v[16:17], s[2:3], v[6:7]
s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_2)
v_fma_f64 v[24:25], v[18:19], s[2:3], v[10:11]
v_add_f64 v[26:27], v[20:21], -v[22:23]
v_fma_f64 v[28:29], v[12:13], v[22:23], -v[20:21]
s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3)
v_mul_f64 v[30:31], v[24:25], s[0:1]
v_mul_f64 v[26:27], v[26:27], 0x40240000
s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3)
v_fma_f64 v[24:25], -v[22:23], v[24:25], v[28:29]
v_fma_f64 v[20:21], v[20:21], v[22:23], -v[30:31]
s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3)
v_fma_f64 v[22:23], v[26:27], s[2:3], v[6:7]
v_fma_f64 v[28:29], v[24:25], s[2:3], v[8:9]
s_delay_alu instid0(VALU_DEP_3)
v_fma_f64 v[30:31], v[20:21], s[2:3], v[10:11]
v_fma_f64 v[18:19], v[20:21], 2.0, v[18:19]
v_fma_f64 v[14:15], v[24:25], 2.0, v[14:15]
v_fma_f64 v[16:17], v[26:27], 2.0, v[16:17]
v_fma_f64 v[32:33], v[12:13], v[22:23], -v[28:29]
v_add_f64 v[34:35], v[28:29], -v[22:23]
v_mul_f64 v[36:37], v[30:31], s[0:1]
s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3)
v_fma_f64 v[30:31], -v[22:23], v[30:31], v[32:33]
v_mul_f64 v[32:33], v[34:35], 0x40240000
s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3)
v_fma_f64 v[22:23], v[28:29], v[22:23], -v[36:37]
v_fma_f64 v[28:29], v[30:31], s[4:5], v[8:9]
s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3)
v_fma_f64 v[34:35], v[32:33], s[4:5], v[6:7]
v_fma_f64 v[36:37], v[22:23], s[4:5], v[10:11]
v_fma_f64 v[18:19], v[22:23], 2.0, v[18:19]
v_fma_f64 v[14:15], v[30:31], 2.0, v[14:15]
v_fma_f64 v[16:17], v[32:33], 2.0, v[16:17]
v_fma_f64 v[20:21], v[12:13], v[34:35], -v[28:29]
v_mul_f64 v[24:25], v[36:37], s[0:1]
v_add_f64 v[22:23], v[28:29], -v[34:35]
s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3)
v_fma_f64 v[20:21], -v[34:35], v[36:37], v[20:21]
v_fma_f64 v[24:25], v[28:29], v[34:35], -v[24:25]
s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3)
v_fma_f64 v[16:17], v[22:23], 0x40240000, v[16:17]
v_add_f64 v[14:15], v[14:15], v[20:21]
s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3)
v_add_f64 v[18:19], v[18:19], v[24:25]
v_fma_f64 v[6:7], v[16:17], s[6:7], v[6:7]
s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3)
v_fma_f64 v[8:9], v[14:15], s[6:7], v[8:9]
v_fma_f64 v[10:11], v[18:19], s[6:7], v[10:11]
s_cbranch_scc0 .LBB0_2
s_clause 0x2
global_store_b64 v[0:1], v[6:7], off
global_store_b64 v[2:3], v[8:9], off
global_store_b64 v[4:5], v[10:11], off
.LBB0_4:
s_nop 0
s_sendmsg sendmsg(MSG_DEALLOC_VGPRS)
s_endpgm
.section .rodata,"a",@progbits
.p2align 6, 0x0
.amdhsa_kernel _Z30RungeKuttaStepRegisterFriendlyPdPKdi
.amdhsa_group_segment_fixed_size 0
.amdhsa_private_segment_fixed_size 0
.amdhsa_kernarg_size 280
.amdhsa_user_sgpr_count 15
.amdhsa_user_sgpr_dispatch_ptr 0
.amdhsa_user_sgpr_queue_ptr 0
.amdhsa_user_sgpr_kernarg_segment_ptr 1
.amdhsa_user_sgpr_dispatch_id 0
.amdhsa_user_sgpr_private_segment_size 0
.amdhsa_wavefront_size32 1
.amdhsa_uses_dynamic_stack 0
.amdhsa_enable_private_segment 0
.amdhsa_system_sgpr_workgroup_id_x 1
.amdhsa_system_sgpr_workgroup_id_y 0
.amdhsa_system_sgpr_workgroup_id_z 0
.amdhsa_system_sgpr_workgroup_info 0
.amdhsa_system_vgpr_workitem_id 0
.amdhsa_next_free_vgpr 38
.amdhsa_next_free_sgpr 16
.amdhsa_float_round_mode_32 0
.amdhsa_float_round_mode_16_64 0
.amdhsa_float_denorm_mode_32 3
.amdhsa_float_denorm_mode_16_64 3
.amdhsa_dx10_clamp 1
.amdhsa_ieee_mode 1
.amdhsa_fp16_overflow 0
.amdhsa_workgroup_processor_mode 1
.amdhsa_memory_ordered 1
.amdhsa_forward_progress 0
.amdhsa_shared_vgpr_count 0
.amdhsa_exception_fp_ieee_invalid_op 0
.amdhsa_exception_fp_denorm_src 0
.amdhsa_exception_fp_ieee_div_zero 0
.amdhsa_exception_fp_ieee_overflow 0
.amdhsa_exception_fp_ieee_underflow 0
.amdhsa_exception_fp_ieee_inexact 0
.amdhsa_exception_int_div_zero 0
.end_amdhsa_kernel
.text
.Lfunc_end0:
.size _Z30RungeKuttaStepRegisterFriendlyPdPKdi, .Lfunc_end0-_Z30RungeKuttaStepRegisterFriendlyPdPKdi
.section .AMDGPU.csdata,"",@progbits
.text
.p2alignl 7, 3214868480
.fill 96, 4, 3214868480
.type __hip_cuid_,@object
.section .bss,"aw",@nobits
.globl __hip_cuid_
__hip_cuid_:
.byte 0
.size __hip_cuid_, 1
.ident "AMD clang version 18.0.0git (https://github.com/RadeonOpenCompute/llvm-project roc-6.3.2 25012 e5bf7e55c91490b07c49d8960fa7983d864936c4)"
.section ".note.GNU-stack","",@progbits
.addrsig
.addrsig_sym __hip_cuid_
.amdgpu_metadata
---
amdhsa.kernels:
- .args:
- .address_space: global
.offset: 0
.size: 8
.value_kind: global_buffer
- .actual_access: read_only
.address_space: global
.offset: 8
.size: 8
.value_kind: global_buffer
- .offset: 16
.size: 4
.value_kind: by_value
- .offset: 24
.size: 4
.value_kind: hidden_block_count_x
- .offset: 28
.size: 4
.value_kind: hidden_block_count_y
- .offset: 32
.size: 4
.value_kind: hidden_block_count_z
- .offset: 36
.size: 2
.value_kind: hidden_group_size_x
- .offset: 38
.size: 2
.value_kind: hidden_group_size_y
- .offset: 40
.size: 2
.value_kind: hidden_group_size_z
- .offset: 42
.size: 2
.value_kind: hidden_remainder_x
- .offset: 44
.size: 2
.value_kind: hidden_remainder_y
- .offset: 46
.size: 2
.value_kind: hidden_remainder_z
- .offset: 64
.size: 8
.value_kind: hidden_global_offset_x
- .offset: 72
.size: 8
.value_kind: hidden_global_offset_y
- .offset: 80
.size: 8
.value_kind: hidden_global_offset_z
- .offset: 88
.size: 2
.value_kind: hidden_grid_dims
.group_segment_fixed_size: 0
.kernarg_segment_align: 8
.kernarg_segment_size: 280
.language: OpenCL C
.language_version:
- 2
- 0
.max_flat_workgroup_size: 1024
.name: _Z30RungeKuttaStepRegisterFriendlyPdPKdi
.private_segment_fixed_size: 0
.sgpr_count: 18
.sgpr_spill_count: 0
.symbol: _Z30RungeKuttaStepRegisterFriendlyPdPKdi.kd
.uniform_work_group_size: 1
.uses_dynamic_stack: false
.vgpr_count: 38
.vgpr_spill_count: 0
.wavefront_size: 32
.workgroup_processor_mode: 1
amdhsa.target: amdgcn-amd-amdhsa--gfx1100
amdhsa.version:
- 1
- 2
...
.end_amdgpu_metadata |
You are a helpful coding assistant specialized in converting from CUDA host assembly to AMD host assembly. | .file "tmpxft_0007de79_00000000-6_Lorenz_HandTuned.cudafe1.cpp"
.text
#APP
.globl _ZSt21ios_base_library_initv
#NO_APP
.type _ZL26__cudaUnregisterBinaryUtilv, @function
_ZL26__cudaUnregisterBinaryUtilv:
.LFB4410:
.cfi_startproc
endbr64
subq $8, %rsp
.cfi_def_cfa_offset 16
movq _ZL20__cudaFatCubinHandle(%rip), %rdi
call __cudaUnregisterFatBinary@PLT
addq $8, %rsp
.cfi_def_cfa_offset 8
ret
.cfi_endproc
.LFE4410:
.size _ZL26__cudaUnregisterBinaryUtilv, .-_ZL26__cudaUnregisterBinaryUtilv
.globl _Z8LinspacePdddi
.type _Z8LinspacePdddi, @function
_Z8LinspacePdddi:
.LFB4403:
.cfi_startproc
endbr64
movsd %xmm0, (%rdi)
cmpl $1, %esi
jle .L3
movslq %esi, %rax
movsd %xmm1, -8(%rdi,%rax,8)
leal -1(%rsi), %eax
subsd %xmm0, %xmm1
pxor %xmm2, %xmm2
cvtsi2sdl %eax, %xmm2
divsd %xmm2, %xmm1
cmpl $1, %eax
jle .L3
leal -1(%rsi), %edx
movl $1, %eax
.L5:
pxor %xmm2, %xmm2
cvtsi2sdl %eax, %xmm2
mulsd %xmm1, %xmm2
addsd %xmm0, %xmm2
movsd %xmm2, (%rdi,%rax,8)
addq $1, %rax
cmpq %rdx, %rax
jne .L5
.L3:
ret
.cfi_endproc
.LFE4403:
.size _Z8LinspacePdddi, .-_Z8LinspacePdddi
.globl _Z7UniformPddi
.type _Z7UniformPddi, @function
_Z7UniformPddi:
.LFB4404:
.cfi_startproc
endbr64
testl %esi, %esi
jle .L7
movq %rdi, %rax
movslq %esi, %rsi
leaq (%rdi,%rsi,8), %rdx
.L9:
movsd %xmm0, (%rax)
addq $8, %rax
cmpq %rdx, %rax
jne .L9
.L7:
ret
.cfi_endproc
.LFE4404:
.size _Z7UniformPddi, .-_Z7UniformPddi
.globl _Z54__device_stub__Z30RungeKuttaStepRegisterFriendlyPdPKdiPdPKdi
.type _Z54__device_stub__Z30RungeKuttaStepRegisterFriendlyPdPKdiPdPKdi, @function
_Z54__device_stub__Z30RungeKuttaStepRegisterFriendlyPdPKdiPdPKdi:
.LFB4432:
.cfi_startproc
endbr64
subq $136, %rsp
.cfi_def_cfa_offset 144
movl %edx, 12(%rsp)
movq %fs:40, %rax
movq %rax, 120(%rsp)
xorl %eax, %eax
movq %rdi, 16(%rsp)
leaq 16(%rsp), %rax
movq %rax, 96(%rsp)
movq %rsi, 24(%rsp)
leaq 24(%rsp), %rax
movq %rax, 104(%rsp)
leaq 12(%rsp), %rax
movq %rax, 112(%rsp)
movl $1, 48(%rsp)
movl $1, 52(%rsp)
movl $1, 56(%rsp)
movl $1, 60(%rsp)
movl $1, 64(%rsp)
movl $1, 68(%rsp)
leaq 40(%rsp), %rcx
leaq 32(%rsp), %rdx
leaq 60(%rsp), %rsi
leaq 48(%rsp), %rdi
call __cudaPopCallConfiguration@PLT
testl %eax, %eax
je .L15
.L11:
movq 120(%rsp), %rax
subq %fs:40, %rax
jne .L16
addq $136, %rsp
.cfi_remember_state
.cfi_def_cfa_offset 8
ret
.L15:
.cfi_restore_state
pushq 40(%rsp)
.cfi_def_cfa_offset 152
pushq 40(%rsp)
.cfi_def_cfa_offset 160
leaq 112(%rsp), %r9
movq 76(%rsp), %rcx
movl 84(%rsp), %r8d
movq 64(%rsp), %rsi
movl 72(%rsp), %edx
leaq _Z30RungeKuttaStepRegisterFriendlyPdPKdi(%rip), %rdi
call cudaLaunchKernel@PLT
addq $16, %rsp
.cfi_def_cfa_offset 144
jmp .L11
.L16:
call __stack_chk_fail@PLT
.cfi_endproc
.LFE4432:
.size _Z54__device_stub__Z30RungeKuttaStepRegisterFriendlyPdPKdiPdPKdi, .-_Z54__device_stub__Z30RungeKuttaStepRegisterFriendlyPdPKdiPdPKdi
.globl _Z30RungeKuttaStepRegisterFriendlyPdPKdi
.type _Z30RungeKuttaStepRegisterFriendlyPdPKdi, @function
_Z30RungeKuttaStepRegisterFriendlyPdPKdi:
.LFB4433:
.cfi_startproc
endbr64
subq $8, %rsp
.cfi_def_cfa_offset 16
call _Z54__device_stub__Z30RungeKuttaStepRegisterFriendlyPdPKdiPdPKdi
addq $8, %rsp
.cfi_def_cfa_offset 8
ret
.cfi_endproc
.LFE4433:
.size _Z30RungeKuttaStepRegisterFriendlyPdPKdi, .-_Z30RungeKuttaStepRegisterFriendlyPdPKdi
.section .rodata.str1.8,"aMS",@progbits,1
.align 8
.LC0:
.string "_Z30RungeKuttaStepRegisterFriendlyPdPKdi"
.text
.type _ZL24__sti____cudaRegisterAllv, @function
_ZL24__sti____cudaRegisterAllv:
.LFB4435:
.cfi_startproc
endbr64
subq $8, %rsp
.cfi_def_cfa_offset 16
leaq _ZL15__fatDeviceText(%rip), %rdi
call __cudaRegisterFatBinary@PLT
movq %rax, %rdi
movq %rax, _ZL20__cudaFatCubinHandle(%rip)
pushq $0
.cfi_def_cfa_offset 24
pushq $0
.cfi_def_cfa_offset 32
pushq $0
.cfi_def_cfa_offset 40
pushq $0
.cfi_def_cfa_offset 48
movl $0, %r9d
movl $-1, %r8d
leaq .LC0(%rip), %rdx
movq %rdx, %rcx
leaq _Z30RungeKuttaStepRegisterFriendlyPdPKdi(%rip), %rsi
call __cudaRegisterFunction@PLT
addq $32, %rsp
.cfi_def_cfa_offset 16
movq _ZL20__cudaFatCubinHandle(%rip), %rdi
call __cudaRegisterFatBinaryEnd@PLT
leaq _ZL26__cudaUnregisterBinaryUtilv(%rip), %rdi
call atexit@PLT
addq $8, %rsp
.cfi_def_cfa_offset 8
ret
.cfi_endproc
.LFE4435:
.size _ZL24__sti____cudaRegisterAllv, .-_ZL24__sti____cudaRegisterAllv
.section .init_array,"aw"
.align 8
.quad _ZL24__sti____cudaRegisterAllv
.section .rodata._Z18AllocateHostMemoryIdEPT_i.str1.8,"aMS",@progbits,1
.align 8
.LC1:
.string "Failed to allocate Memory on the HOST!\n"
.section .text._Z18AllocateHostMemoryIdEPT_i,"axG",@progbits,_Z18AllocateHostMemoryIdEPT_i,comdat
.weak _Z18AllocateHostMemoryIdEPT_i
.type _Z18AllocateHostMemoryIdEPT_i, @function
_Z18AllocateHostMemoryIdEPT_i:
.LFB4751:
.cfi_startproc
endbr64
subq $8, %rsp
.cfi_def_cfa_offset 16
movslq %edi, %rdi
movq %rdi, %rax
shrq $60, %rax
jne .L22
salq $3, %rdi
leaq _ZSt7nothrow(%rip), %rsi
call _ZnamRKSt9nothrow_t@PLT
testq %rax, %rax
je .L27
addq $8, %rsp
.cfi_remember_state
.cfi_def_cfa_offset 8
ret
.L22:
.cfi_restore_state
call __cxa_throw_bad_array_new_length@PLT
.L27:
leaq .LC1(%rip), %rsi
leaq _ZSt4cerr(%rip), %rdi
call _ZStlsISt11char_traitsIcEERSt13basic_ostreamIcT_ES5_PKc@PLT
movl $1, %edi
call exit@PLT
.cfi_endproc
.LFE4751:
.size _Z18AllocateHostMemoryIdEPT_i, .-_Z18AllocateHostMemoryIdEPT_i
.section .rodata._Z20AllocateDeviceMemoryIdEPT_i.str1.8,"aMS",@progbits,1
.align 8
.LC2:
.string "Failed to allocate Memory on the DEVICE!\n"
.section .text._Z20AllocateDeviceMemoryIdEPT_i,"axG",@progbits,_Z20AllocateDeviceMemoryIdEPT_i,comdat
.weak _Z20AllocateDeviceMemoryIdEPT_i
.type _Z20AllocateDeviceMemoryIdEPT_i, @function
_Z20AllocateDeviceMemoryIdEPT_i:
.LFB4752:
.cfi_startproc
endbr64
subq $24, %rsp
.cfi_def_cfa_offset 32
movq %fs:40, %rax
movq %rax, 8(%rsp)
xorl %eax, %eax
movq $0, (%rsp)
movslq %edi, %rsi
salq $3, %rsi
movq %rsp, %rdi
call cudaMalloc@PLT
testl %eax, %eax
jne .L32
movq (%rsp), %rax
movq 8(%rsp), %rdx
subq %fs:40, %rdx
jne .L33
addq $24, %rsp
.cfi_remember_state
.cfi_def_cfa_offset 8
ret
.L32:
.cfi_restore_state
leaq .LC2(%rip), %rsi
leaq _ZSt4cerr(%rip), %rdi
call _ZStlsISt11char_traitsIcEERSt13basic_ostreamIcT_ES5_PKc@PLT
movl $1, %edi
call exit@PLT
.L33:
call __stack_chk_fail@PLT
.cfi_endproc
.LFE4752:
.size _Z20AllocateDeviceMemoryIdEPT_i, .-_Z20AllocateDeviceMemoryIdEPT_i
.section .rodata.str1.1,"aMS",@progbits,1
.LC6:
.string "Simulation time: "
.LC9:
.string "ms"
.section .rodata.str1.8
.align 8
.LC10:
.string "Simulation time / 1000 RK4 step: "
.align 8
.LC11:
.string "Ensemble size: "
.text
.globl main
.type main, @function
main:
.LFB4402:
.cfi_startproc
endbr64
pushq %r14
.cfi_def_cfa_offset 16
.cfi_offset 14, -16
pushq %r13
.cfi_def_cfa_offset 24
.cfi_offset 13, -24
pushq %r12
.cfi_def_cfa_offset 32
.cfi_offset 12, -32
pushq %rbp
.cfi_def_cfa_offset 40
.cfi_offset 6, -40
pushq %rbx
.cfi_def_cfa_offset 48
.cfi_offset 3, -48
subq $32, %rsp
.cfi_def_cfa_offset 80
movl $1, %edi
call cudaSetDevice@PLT
movl $2304000, %edi
call _Z18AllocateHostMemoryIdEPT_i
movq %rax, %rbx
movl $768000, %edi
call _Z18AllocateHostMemoryIdEPT_i
movq %rax, %rbp
movl $2304000, %edi
call _Z20AllocateDeviceMemoryIdEPT_i
movq %rax, %r12
movl $768000, %edi
call _Z20AllocateDeviceMemoryIdEPT_i
movq %rax, %r13
movl $768000, %esi
movsd .LC3(%rip), %xmm1
pxor %xmm0, %xmm0
movq %rbp, %rdi
call _Z8LinspacePdddi
movl $768000, %esi
movsd .LC5(%rip), %xmm0
movq %rbx, %rdi
call _Z7UniformPddi
leaq 6144000(%rbx), %rdi
movl $768000, %esi
movsd .LC5(%rip), %xmm0
call _Z7UniformPddi
leaq 12288000(%rbx), %rdi
movl $768000, %esi
movsd .LC5(%rip), %xmm0
call _Z7UniformPddi
movl $1, %ecx
movl $18432000, %edx
movq %rbx, %rsi
movq %r12, %rdi
call cudaMemcpy@PLT
movl $1, %ecx
movl $6144000, %edx
movq %rbp, %rsi
movq %r13, %rdi
call cudaMemcpy@PLT
call clock@PLT
movq %rax, %r14
movl $64, 20(%rsp)
movl $1, 24(%rsp)
movl $12000, 8(%rsp)
movl $1, 12(%rsp)
movl $0, %r9d
movl $0, %r8d
movq 20(%rsp), %rdx
movl $1, %ecx
movq 8(%rsp), %rdi
movl $1, %esi
call __cudaPushCallConfiguration@PLT
testl %eax, %eax
je .L37
.L35:
call cudaDeviceSynchronize@PLT
call clock@PLT
movq %rax, %rbp
leaq .LC6(%rip), %rsi
leaq _ZSt4cout(%rip), %r13
movq %r13, %rdi
call _ZStlsISt11char_traitsIcEERSt13basic_ostreamIcT_ES5_PKc@PLT
movq %rax, %rdi
subq %r14, %rbp
pxor %xmm0, %xmm0
cvtsi2sdq %rbp, %xmm0
mulsd .LC7(%rip), %xmm0
divsd .LC8(%rip), %xmm0
movq %xmm0, %r14
call _ZNSo9_M_insertIdEERSoT_@PLT
movq %rax, %rdi
leaq .LC9(%rip), %rbp
movq %rbp, %rsi
call _ZStlsISt11char_traitsIcEERSt13basic_ostreamIcT_ES5_PKc@PLT
movq %rax, %rdi
call _ZSt4endlIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_@PLT
movq %rax, %rdi
call _ZSt4endlIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_@PLT
leaq .LC10(%rip), %rsi
movq %r13, %rdi
call _ZStlsISt11char_traitsIcEERSt13basic_ostreamIcT_ES5_PKc@PLT
movq %rax, %rdi
movq %r14, %xmm0
call _ZNSo9_M_insertIdEERSoT_@PLT
movq %rax, %rdi
movq %rbp, %rsi
call _ZStlsISt11char_traitsIcEERSt13basic_ostreamIcT_ES5_PKc@PLT
movq %rax, %rdi
call _ZSt4endlIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_@PLT
leaq .LC11(%rip), %rsi
movq %r13, %rdi
call _ZStlsISt11char_traitsIcEERSt13basic_ostreamIcT_ES5_PKc@PLT
movq %rax, %rdi
movl $768000, %esi
call _ZNSolsEi@PLT
movq %rax, %rdi
call _ZSt4endlIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_@PLT
movq %rax, %rdi
call _ZSt4endlIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_@PLT
movl $0, %r8d
movl $2, %ecx
movl $18432000, %edx
movq %r12, %rsi
movq %rbx, %rdi
call cudaMemcpyAsync@PLT
movl $0, %eax
addq $32, %rsp
.cfi_remember_state
.cfi_def_cfa_offset 48
popq %rbx
.cfi_def_cfa_offset 40
popq %rbp
.cfi_def_cfa_offset 32
popq %r12
.cfi_def_cfa_offset 24
popq %r13
.cfi_def_cfa_offset 16
popq %r14
.cfi_def_cfa_offset 8
ret
.L37:
.cfi_restore_state
movl $768000, %edx
movq %r13, %rsi
movq %r12, %rdi
call _Z54__device_stub__Z30RungeKuttaStepRegisterFriendlyPdPKdiPdPKdi
jmp .L35
.cfi_endproc
.LFE4402:
.size main, .-main
.section .nvFatBinSegment,"aw"
.align 8
.type _ZL15__fatDeviceText, @object
.size _ZL15__fatDeviceText, 24
_ZL15__fatDeviceText:
.long 1180844977
.long 1
.quad fatbinData
.quad 0
.local _ZL20__cudaFatCubinHandle
.comm _ZL20__cudaFatCubinHandle,8,8
.section .rodata.cst8,"aM",@progbits,8
.align 8
.LC3:
.long 0
.long 1077215232
.align 8
.LC5:
.long 0
.long 1076101120
.align 8
.LC7:
.long 0
.long 1083129856
.align 8
.LC8:
.long 0
.long 1093567616
.ident "GCC: (Ubuntu 13.3.0-6ubuntu2~24.04) 13.3.0"
.section .note.GNU-stack,"",@progbits
.section .note.gnu.property,"a"
.align 8
.long 1f - 0f
.long 4f - 1f
.long 5
0:
.string "GNU"
1:
.align 8
.long 0xc0000002
.long 3f - 2f
2:
.long 0x3
3:
.align 8
4: | .text
.file "Lorenz_HandTuned.hip"
# Start of file scope inline assembly
.globl _ZSt21ios_base_library_initv
# End of file scope inline assembly
.section .rodata.cst8,"aM",@progbits,8
.p2align 3, 0x0 # -- Begin function main
.LCPI0_0:
.quad 0x3efcac0aa3809106 # double 2.7343785603887504E-5
.LCPI0_1:
.quad 0x408f400000000000 # double 1000
.LCPI0_2:
.quad 0x412e848000000000 # double 1.0E+6
.text
.globl main
.p2align 4, 0x90
.type main,@function
main: # @main
.cfi_startproc
# %bb.0:
pushq %r15
.cfi_def_cfa_offset 16
pushq %r14
.cfi_def_cfa_offset 24
pushq %r12
.cfi_def_cfa_offset 32
pushq %rbx
.cfi_def_cfa_offset 40
subq $120, %rsp
.cfi_def_cfa_offset 160
.cfi_offset %rbx, -40
.cfi_offset %r12, -32
.cfi_offset %r14, -24
.cfi_offset %r15, -16
movl $1, %edi
callq hipSetDevice
movl $18432000, %edi # imm = 0x1194000
movl $_ZSt7nothrow, %esi
callq _ZnamRKSt9nothrow_t
testq %rax, %rax
je .LBB0_1
# %bb.3: # %_Z18AllocateHostMemoryIdEPT_i.exit
movq %rax, %rbx
movl $6144000, %edi # imm = 0x5DC000
movl $_ZSt7nothrow, %esi
callq _ZnamRKSt9nothrow_t
testq %rax, %rax
je .LBB0_1
# %bb.4: # %_Z18AllocateHostMemoryIdEPT_i.exit40
movq %rax, %r15
movq $0, 16(%rsp)
leaq 16(%rsp), %rdi
movl $18432000, %esi # imm = 0x1194000
callq hipMalloc
testl %eax, %eax
jne .LBB0_5
# %bb.6: # %_Z20AllocateDeviceMemoryIdEPT_i.exit
movq 16(%rsp), %r14
movq $0, 16(%rsp)
leaq 16(%rsp), %rdi
movl $6144000, %esi # imm = 0x5DC000
callq hipMalloc
testl %eax, %eax
jne .LBB0_5
# %bb.7: # %_Z20AllocateDeviceMemoryIdEPT_i.exit42
movq 16(%rsp), %r12
movq $0, (%r15)
movabsq $4626604192193052672, %rax # imm = 0x4035000000000000
movq %rax, 6143992(%r15)
movl $1, %eax
movsd .LCPI0_0(%rip), %xmm0 # xmm0 = mem[0],zero
xorpd %xmm1, %xmm1
.p2align 4, 0x90
.LBB0_8: # %.lr.ph.i
# =>This Inner Loop Header: Depth=1
xorps %xmm2, %xmm2
cvtsi2sd %eax, %xmm2
mulsd %xmm0, %xmm2
addsd %xmm1, %xmm2
movsd %xmm2, (%r15,%rax,8)
incq %rax
cmpq $767999, %rax # imm = 0xBB7FF
jne .LBB0_8
# %bb.9: # %.lr.ph.i43.preheader
xorl %ecx, %ecx
movabsq $4621819117588971520, %rax # imm = 0x4024000000000000
.p2align 4, 0x90
.LBB0_10: # %.lr.ph.i43
# =>This Inner Loop Header: Depth=1
movq %rax, (%rbx,%rcx,8)
incq %rcx
cmpq $768000, %rcx # imm = 0xBB800
jne .LBB0_10
# %bb.11: # %_Z7UniformPddi.exit
movl $768000, %ecx # imm = 0xBB800
.p2align 4, 0x90
.LBB0_12: # %.lr.ph.i47
# =>This Inner Loop Header: Depth=1
movq %rax, (%rbx,%rcx,8)
incq %rcx
cmpq $1536000, %rcx # imm = 0x177000
jne .LBB0_12
# %bb.13: # %_Z7UniformPddi.exit51
movl $1536000, %ecx # imm = 0x177000
.p2align 4, 0x90
.LBB0_14: # %.lr.ph.i52
# =>This Inner Loop Header: Depth=1
movq %rax, (%rbx,%rcx,8)
incq %rcx
cmpq $2304000, %rcx # imm = 0x232800
jne .LBB0_14
# %bb.15: # %_Z7UniformPddi.exit56
movl $18432000, %edx # imm = 0x1194000
movq %r14, %rdi
movq %rbx, %rsi
movl $1, %ecx
callq hipMemcpy
movl $6144000, %edx # imm = 0x5DC000
movq %r12, %rdi
movq %r15, %rsi
movl $1, %ecx
callq hipMemcpy
callq clock
movq %rax, %r15
movabsq $4294967360, %rdx # imm = 0x100000040
leaq 11936(%rdx), %rdi
movl $1, %esi
movl $1, %ecx
xorl %r8d, %r8d
xorl %r9d, %r9d
callq __hipPushCallConfiguration
testl %eax, %eax
jne .LBB0_17
# %bb.16:
movq %r14, 112(%rsp)
movq %r12, 104(%rsp)
movl $768000, 12(%rsp) # imm = 0xBB800
leaq 112(%rsp), %rax
movq %rax, 16(%rsp)
leaq 104(%rsp), %rax
movq %rax, 24(%rsp)
leaq 12(%rsp), %rax
movq %rax, 32(%rsp)
leaq 88(%rsp), %rdi
leaq 72(%rsp), %rsi
leaq 64(%rsp), %rdx
leaq 56(%rsp), %rcx
callq __hipPopCallConfiguration
movq 88(%rsp), %rsi
movl 96(%rsp), %edx
movq 72(%rsp), %rcx
movl 80(%rsp), %r8d
leaq 16(%rsp), %r9
movl $_Z30RungeKuttaStepRegisterFriendlyPdPKdi, %edi
pushq 56(%rsp)
.cfi_adjust_cfa_offset 8
pushq 72(%rsp)
.cfi_adjust_cfa_offset 8
callq hipLaunchKernel
addq $16, %rsp
.cfi_adjust_cfa_offset -16
.LBB0_17:
callq hipDeviceSynchronize
callq clock
movq %rax, %r12
movl $_ZSt4cout, %edi
movl $.L.str, %esi
movl $17, %edx
callq _ZSt16__ostream_insertIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_PKS3_l
subq %r15, %r12
xorps %xmm0, %xmm0
cvtsi2sd %r12, %xmm0
mulsd .LCPI0_1(%rip), %xmm0
divsd .LCPI0_2(%rip), %xmm0
movl $_ZSt4cout, %edi
movsd %xmm0, 48(%rsp) # 8-byte Spill
callq _ZNSo9_M_insertIdEERSoT_
movq %rax, %r15
movl $.L.str.1, %esi
movl $2, %edx
movq %rax, %rdi
callq _ZSt16__ostream_insertIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_PKS3_l
movq (%r15), %rax
movq -24(%rax), %rax
movq 240(%r15,%rax), %r12
testq %r12, %r12
je .LBB0_38
# %bb.18: # %_ZSt13__check_facetISt5ctypeIcEERKT_PS3_.exit.i.i
cmpb $0, 56(%r12)
je .LBB0_20
# %bb.19:
movzbl 67(%r12), %eax
jmp .LBB0_21
.LBB0_20:
movq %r12, %rdi
callq _ZNKSt5ctypeIcE13_M_widen_initEv
movq (%r12), %rax
movq %r12, %rdi
movl $10, %esi
callq *48(%rax)
.LBB0_21: # %_ZSt4endlIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_.exit
movsbl %al, %esi
movq %r15, %rdi
callq _ZNSo3putEc
movq %rax, %rdi
callq _ZNSo5flushEv
movq (%rax), %rcx
movq -24(%rcx), %rcx
movq 240(%rax,%rcx), %r15
testq %r15, %r15
je .LBB0_38
# %bb.22: # %_ZSt13__check_facetISt5ctypeIcEERKT_PS3_.exit.i.i58
cmpb $0, 56(%r15)
je .LBB0_24
# %bb.23:
movzbl 67(%r15), %ecx
jmp .LBB0_25
.LBB0_24:
movq %r15, %rdi
movq %rax, %r12
callq _ZNKSt5ctypeIcE13_M_widen_initEv
movq (%r15), %rax
movq %r15, %rdi
movl $10, %esi
callq *48(%rax)
movl %eax, %ecx
movq %r12, %rax
.LBB0_25: # %_ZSt4endlIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_.exit61
movsbl %cl, %esi
movq %rax, %rdi
callq _ZNSo3putEc
movq %rax, %rdi
callq _ZNSo5flushEv
movl $_ZSt4cout, %edi
movl $.L.str.2, %esi
movl $33, %edx
callq _ZSt16__ostream_insertIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_PKS3_l
movl $_ZSt4cout, %edi
movsd 48(%rsp), %xmm0 # 8-byte Reload
# xmm0 = mem[0],zero
callq _ZNSo9_M_insertIdEERSoT_
movq %rax, %r15
movl $.L.str.1, %esi
movl $2, %edx
movq %rax, %rdi
callq _ZSt16__ostream_insertIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_PKS3_l
movq (%r15), %rax
movq -24(%rax), %rax
movq 240(%r15,%rax), %r12
testq %r12, %r12
je .LBB0_38
# %bb.26: # %_ZSt13__check_facetISt5ctypeIcEERKT_PS3_.exit.i.i63
cmpb $0, 56(%r12)
je .LBB0_28
# %bb.27:
movzbl 67(%r12), %eax
jmp .LBB0_29
.LBB0_28:
movq %r12, %rdi
callq _ZNKSt5ctypeIcE13_M_widen_initEv
movq (%r12), %rax
movq %r12, %rdi
movl $10, %esi
callq *48(%rax)
.LBB0_29: # %_ZSt4endlIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_.exit66
movsbl %al, %esi
movq %r15, %rdi
callq _ZNSo3putEc
movq %rax, %rdi
callq _ZNSo5flushEv
movl $_ZSt4cout, %edi
movl $.L.str.3, %esi
movl $33, %edx
callq _ZSt16__ostream_insertIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_PKS3_l
movl $_ZSt4cout, %edi
movl $768000, %esi # imm = 0xBB800
callq _ZNSolsEi
movq (%rax), %rcx
movq -24(%rcx), %rcx
movq 240(%rax,%rcx), %r15
testq %r15, %r15
je .LBB0_38
# %bb.30: # %_ZSt13__check_facetISt5ctypeIcEERKT_PS3_.exit.i.i68
cmpb $0, 56(%r15)
je .LBB0_32
# %bb.31:
movzbl 67(%r15), %ecx
jmp .LBB0_33
.LBB0_32:
movq %r15, %rdi
movq %rax, %r12
callq _ZNKSt5ctypeIcE13_M_widen_initEv
movq (%r15), %rax
movq %r15, %rdi
movl $10, %esi
callq *48(%rax)
movl %eax, %ecx
movq %r12, %rax
.LBB0_33: # %_ZSt4endlIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_.exit71
movsbl %cl, %esi
movq %rax, %rdi
callq _ZNSo3putEc
movq %rax, %rdi
callq _ZNSo5flushEv
movq (%rax), %rcx
movq -24(%rcx), %rcx
movq 240(%rax,%rcx), %r15
testq %r15, %r15
je .LBB0_38
# %bb.34: # %_ZSt13__check_facetISt5ctypeIcEERKT_PS3_.exit.i.i73
cmpb $0, 56(%r15)
je .LBB0_36
# %bb.35:
movzbl 67(%r15), %ecx
jmp .LBB0_37
.LBB0_36:
movq %r15, %rdi
movq %rax, %r12
callq _ZNKSt5ctypeIcE13_M_widen_initEv
movq (%r15), %rax
movq %r15, %rdi
movl $10, %esi
callq *48(%rax)
movl %eax, %ecx
movq %r12, %rax
.LBB0_37: # %_ZSt4endlIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_.exit76
movsbl %cl, %esi
movq %rax, %rdi
callq _ZNSo3putEc
movq %rax, %rdi
callq _ZNSo5flushEv
movl $18432000, %edx # imm = 0x1194000
movq %rbx, %rdi
movq %r14, %rsi
movl $2, %ecx
xorl %r8d, %r8d
callq hipMemcpyAsync
xorl %eax, %eax
addq $120, %rsp
.cfi_def_cfa_offset 40
popq %rbx
.cfi_def_cfa_offset 32
popq %r12
.cfi_def_cfa_offset 24
popq %r14
.cfi_def_cfa_offset 16
popq %r15
.cfi_def_cfa_offset 8
retq
.LBB0_38:
.cfi_def_cfa_offset 160
callq _ZSt16__throw_bad_castv
.LBB0_1:
movl $_ZSt4cerr, %edi
movl $.L.str.4, %esi
jmp .LBB0_2
.LBB0_5:
movl $_ZSt4cerr, %edi
movl $.L.str.5, %esi
.LBB0_2:
callq _ZStlsISt11char_traitsIcEERSt13basic_ostreamIcT_ES5_PKc
movl $1, %edi
callq exit
.Lfunc_end0:
.size main, .Lfunc_end0-main
.cfi_endproc
# -- End function
.globl _Z8LinspacePdddi # -- Begin function _Z8LinspacePdddi
.p2align 4, 0x90
.type _Z8LinspacePdddi,@function
_Z8LinspacePdddi: # @_Z8LinspacePdddi
.cfi_startproc
# %bb.0:
# kill: def $esi killed $esi def $rsi
movsd %xmm0, (%rdi)
cmpl $2, %esi
jl .LBB1_4
# %bb.1:
leal -1(%rsi), %eax
movsd %xmm1, (%rdi,%rax,8)
cmpl $2, %esi
je .LBB1_4
# %bb.2: # %.lr.ph.preheader
cvtsi2sd %eax, %xmm2
subsd %xmm0, %xmm1
divsd %xmm2, %xmm1
movl %eax, %eax
movl $1, %ecx
.p2align 4, 0x90
.LBB1_3: # %.lr.ph
# =>This Inner Loop Header: Depth=1
xorps %xmm2, %xmm2
cvtsi2sd %ecx, %xmm2
mulsd %xmm1, %xmm2
addsd %xmm0, %xmm2
movsd %xmm2, (%rdi,%rcx,8)
incq %rcx
cmpq %rcx, %rax
jne .LBB1_3
.LBB1_4: # %.loopexit
retq
.Lfunc_end1:
.size _Z8LinspacePdddi, .Lfunc_end1-_Z8LinspacePdddi
.cfi_endproc
# -- End function
.globl _Z7UniformPddi # -- Begin function _Z7UniformPddi
.p2align 4, 0x90
.type _Z7UniformPddi,@function
_Z7UniformPddi: # @_Z7UniformPddi
.cfi_startproc
# %bb.0:
testl %esi, %esi
jle .LBB2_3
# %bb.1: # %.lr.ph.preheader
movl %esi, %eax
xorl %ecx, %ecx
.p2align 4, 0x90
.LBB2_2: # %.lr.ph
# =>This Inner Loop Header: Depth=1
movsd %xmm0, (%rdi,%rcx,8)
incq %rcx
cmpq %rcx, %rax
jne .LBB2_2
.LBB2_3: # %._crit_edge
retq
.Lfunc_end2:
.size _Z7UniformPddi, .Lfunc_end2-_Z7UniformPddi
.cfi_endproc
# -- End function
.globl _Z45__device_stub__RungeKuttaStepRegisterFriendlyPdPKdi # -- Begin function _Z45__device_stub__RungeKuttaStepRegisterFriendlyPdPKdi
.p2align 4, 0x90
.type _Z45__device_stub__RungeKuttaStepRegisterFriendlyPdPKdi,@function
_Z45__device_stub__RungeKuttaStepRegisterFriendlyPdPKdi: # @_Z45__device_stub__RungeKuttaStepRegisterFriendlyPdPKdi
.cfi_startproc
# %bb.0:
subq $104, %rsp
.cfi_def_cfa_offset 112
movq %rdi, 72(%rsp)
movq %rsi, 64(%rsp)
movl %edx, 12(%rsp)
leaq 72(%rsp), %rax
movq %rax, 80(%rsp)
leaq 64(%rsp), %rax
movq %rax, 88(%rsp)
leaq 12(%rsp), %rax
movq %rax, 96(%rsp)
leaq 48(%rsp), %rdi
leaq 32(%rsp), %rsi
leaq 24(%rsp), %rdx
leaq 16(%rsp), %rcx
callq __hipPopCallConfiguration
movq 48(%rsp), %rsi
movl 56(%rsp), %edx
movq 32(%rsp), %rcx
movl 40(%rsp), %r8d
leaq 80(%rsp), %r9
movl $_Z30RungeKuttaStepRegisterFriendlyPdPKdi, %edi
pushq 16(%rsp)
.cfi_adjust_cfa_offset 8
pushq 32(%rsp)
.cfi_adjust_cfa_offset 8
callq hipLaunchKernel
addq $120, %rsp
.cfi_adjust_cfa_offset -120
retq
.Lfunc_end3:
.size _Z45__device_stub__RungeKuttaStepRegisterFriendlyPdPKdi, .Lfunc_end3-_Z45__device_stub__RungeKuttaStepRegisterFriendlyPdPKdi
.cfi_endproc
# -- End function
.p2align 4, 0x90 # -- Begin function __hip_module_ctor
.type __hip_module_ctor,@function
__hip_module_ctor: # @__hip_module_ctor
.cfi_startproc
# %bb.0:
subq $40, %rsp
.cfi_def_cfa_offset 48
cmpq $0, __hip_gpubin_handle(%rip)
jne .LBB4_2
# %bb.1:
movl $__hip_fatbin_wrapper, %edi
callq __hipRegisterFatBinary
movq %rax, __hip_gpubin_handle(%rip)
.LBB4_2:
movq __hip_gpubin_handle(%rip), %rdi
xorps %xmm0, %xmm0
movups %xmm0, 16(%rsp)
movups %xmm0, (%rsp)
movl $_Z30RungeKuttaStepRegisterFriendlyPdPKdi, %esi
movl $.L__unnamed_1, %edx
movl $.L__unnamed_1, %ecx
movl $-1, %r8d
xorl %r9d, %r9d
callq __hipRegisterFunction
movl $__hip_module_dtor, %edi
addq $40, %rsp
.cfi_def_cfa_offset 8
jmp atexit # TAILCALL
.Lfunc_end4:
.size __hip_module_ctor, .Lfunc_end4-__hip_module_ctor
.cfi_endproc
# -- End function
.p2align 4, 0x90 # -- Begin function __hip_module_dtor
.type __hip_module_dtor,@function
__hip_module_dtor: # @__hip_module_dtor
.cfi_startproc
# %bb.0:
movq __hip_gpubin_handle(%rip), %rdi
testq %rdi, %rdi
je .LBB5_2
# %bb.1:
pushq %rax
.cfi_def_cfa_offset 16
callq __hipUnregisterFatBinary
movq $0, __hip_gpubin_handle(%rip)
addq $8, %rsp
.cfi_def_cfa_offset 8
.LBB5_2:
retq
.Lfunc_end5:
.size __hip_module_dtor, .Lfunc_end5-__hip_module_dtor
.cfi_endproc
# -- End function
.type _Z30RungeKuttaStepRegisterFriendlyPdPKdi,@object # @_Z30RungeKuttaStepRegisterFriendlyPdPKdi
.section .rodata,"a",@progbits
.globl _Z30RungeKuttaStepRegisterFriendlyPdPKdi
.p2align 3, 0x0
_Z30RungeKuttaStepRegisterFriendlyPdPKdi:
.quad _Z45__device_stub__RungeKuttaStepRegisterFriendlyPdPKdi
.size _Z30RungeKuttaStepRegisterFriendlyPdPKdi, 8
.type .L.str,@object # @.str
.section .rodata.str1.1,"aMS",@progbits,1
.L.str:
.asciz "Simulation time: "
.size .L.str, 18
.type .L.str.1,@object # @.str.1
.L.str.1:
.asciz "ms"
.size .L.str.1, 3
.type .L.str.2,@object # @.str.2
.L.str.2:
.asciz "Simulation time / 1000 RK4 step: "
.size .L.str.2, 34
.type .L.str.3,@object # @.str.3
.L.str.3:
.asciz "Ensemble size: "
.size .L.str.3, 34
.type .L.str.4,@object # @.str.4
.L.str.4:
.asciz "Failed to allocate Memory on the HOST!\n"
.size .L.str.4, 40
.type .L.str.5,@object # @.str.5
.L.str.5:
.asciz "Failed to allocate Memory on the DEVICE!\n"
.size .L.str.5, 42
.type .L__unnamed_1,@object # @0
.L__unnamed_1:
.asciz "_Z30RungeKuttaStepRegisterFriendlyPdPKdi"
.size .L__unnamed_1, 41
.type __hip_fatbin_wrapper,@object # @__hip_fatbin_wrapper
.section .hipFatBinSegment,"a",@progbits
.p2align 3, 0x0
__hip_fatbin_wrapper:
.long 1212764230 # 0x48495046
.long 1 # 0x1
.quad __hip_fatbin
.quad 0
.size __hip_fatbin_wrapper, 24
.type __hip_gpubin_handle,@object # @__hip_gpubin_handle
.local __hip_gpubin_handle
.comm __hip_gpubin_handle,8,8
.section .init_array,"aw",@init_array
.p2align 3, 0x0
.quad __hip_module_ctor
.type __hip_cuid_,@object # @__hip_cuid_
.bss
.globl __hip_cuid_
__hip_cuid_:
.byte 0 # 0x0
.size __hip_cuid_, 1
.section ".linker-options","e",@llvm_linker_options
.ident "AMD clang version 18.0.0git (https://github.com/RadeonOpenCompute/llvm-project roc-6.3.2 25012 e5bf7e55c91490b07c49d8960fa7983d864936c4)"
.section ".note.GNU-stack","",@progbits
.addrsig
.addrsig_sym _Z45__device_stub__RungeKuttaStepRegisterFriendlyPdPKdi
.addrsig_sym __hip_module_ctor
.addrsig_sym __hip_module_dtor
.addrsig_sym _Z30RungeKuttaStepRegisterFriendlyPdPKdi
.addrsig_sym _ZSt4cout
.addrsig_sym _ZSt7nothrow
.addrsig_sym _ZSt4cerr
.addrsig_sym __hip_fatbin
.addrsig_sym __hip_fatbin_wrapper
.addrsig_sym __hip_cuid_ |
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