system stringclasses 7 values | input stringlengths 10 94.5k | output stringlengths 14 55.5k |
|---|---|---|
You are a helpful coding assistant specialized in converting CUDA source code to CUDA host assembly. | #include "includes.h"
// filename: eeTanh.cu
// a simple CUDA kernel to square the elements of a matrix
extern "C" // ensure function name to be exactly "eeTanh"
{
}
__global__ void normLogErr(int N, int M, float *A, float *Y)
{
int i = blockIdx.x * blockDim.x + threadIdx.x;
int j = blockIdx.y * blockDim.y + threadIdx.y;
int index = j*N + i;
int L = N*M;
if (i < N && j < M)
{
// A2 in this case is stored in the doubled rows of A, the length of A is
// doublt that of Y
float a = __expf(__fmul_rn(2.0, A[index+L]));
A[index] = __fmul_rn(a, __fmaf_rn(0.5, __fmul_rn(Y[index], Y[index]), __fsub_rn(__fmul_rn(0.5, __fmul_rn(A[index], A[index])), __fmul_rn(A[index], Y[index]))));
A[index+L] = __fsub_rn(0.9189385332, A[index+L]); // stick final sum factor in 2nd part of A so when it sums to total the cost will be correct
// A[index] = a*(A[index]*(0.5*A[index] - Y[index]) + 0.5*Y[index]*Y[index]);
// A[index+L] = __fsub_rn(0.9189385332, A[index+L]);
}
} | .file "tmpxft_000f5ce4_00000000-6_normLogErr.cudafe1.cpp"
.text
#APP
#NO_APP
.type _ZL26__cudaUnregisterBinaryUtilv, @function
_ZL26__cudaUnregisterBinaryUtilv:
.LFB2029:
.cfi_startproc
endbr64
subq $8, %rsp
.cfi_def_cfa_offset 16
movq _ZL20__cudaFatCubinHandle(%rip), %rdi
call __cudaUnregisterFatBinary@PLT
addq $8, %rsp
.cfi_def_cfa_offset 8
ret
.cfi_endproc
.LFE2029:
.size _ZL26__cudaUnregisterBinaryUtilv, .-_ZL26__cudaUnregisterBinaryUtilv
.globl _Z34__device_stub__Z10normLogErriiPfS_iiPfS_
.type _Z34__device_stub__Z10normLogErriiPfS_iiPfS_, @function
_Z34__device_stub__Z10normLogErriiPfS_iiPfS_:
.LFB2051:
.cfi_startproc
endbr64
subq $152, %rsp
.cfi_def_cfa_offset 160
movl %edi, 28(%rsp)
movl %esi, 24(%rsp)
movq %rdx, 16(%rsp)
movq %rcx, 8(%rsp)
movq %fs:40, %rax
movq %rax, 136(%rsp)
xorl %eax, %eax
leaq 28(%rsp), %rax
movq %rax, 96(%rsp)
leaq 24(%rsp), %rax
movq %rax, 104(%rsp)
leaq 16(%rsp), %rax
movq %rax, 112(%rsp)
leaq 8(%rsp), %rax
movq %rax, 120(%rsp)
movl $1, 48(%rsp)
movl $1, 52(%rsp)
movl $1, 56(%rsp)
movl $1, 60(%rsp)
movl $1, 64(%rsp)
movl $1, 68(%rsp)
leaq 40(%rsp), %rcx
leaq 32(%rsp), %rdx
leaq 60(%rsp), %rsi
leaq 48(%rsp), %rdi
call __cudaPopCallConfiguration@PLT
testl %eax, %eax
je .L7
.L3:
movq 136(%rsp), %rax
subq %fs:40, %rax
jne .L8
addq $152, %rsp
.cfi_remember_state
.cfi_def_cfa_offset 8
ret
.L7:
.cfi_restore_state
pushq 40(%rsp)
.cfi_def_cfa_offset 168
pushq 40(%rsp)
.cfi_def_cfa_offset 176
leaq 112(%rsp), %r9
movq 76(%rsp), %rcx
movl 84(%rsp), %r8d
movq 64(%rsp), %rsi
movl 72(%rsp), %edx
leaq _Z10normLogErriiPfS_(%rip), %rdi
call cudaLaunchKernel@PLT
addq $16, %rsp
.cfi_def_cfa_offset 160
jmp .L3
.L8:
call __stack_chk_fail@PLT
.cfi_endproc
.LFE2051:
.size _Z34__device_stub__Z10normLogErriiPfS_iiPfS_, .-_Z34__device_stub__Z10normLogErriiPfS_iiPfS_
.globl _Z10normLogErriiPfS_
.type _Z10normLogErriiPfS_, @function
_Z10normLogErriiPfS_:
.LFB2052:
.cfi_startproc
endbr64
subq $8, %rsp
.cfi_def_cfa_offset 16
call _Z34__device_stub__Z10normLogErriiPfS_iiPfS_
addq $8, %rsp
.cfi_def_cfa_offset 8
ret
.cfi_endproc
.LFE2052:
.size _Z10normLogErriiPfS_, .-_Z10normLogErriiPfS_
.section .rodata.str1.1,"aMS",@progbits,1
.LC0:
.string "_Z10normLogErriiPfS_"
.text
.type _ZL24__sti____cudaRegisterAllv, @function
_ZL24__sti____cudaRegisterAllv:
.LFB2054:
.cfi_startproc
endbr64
subq $8, %rsp
.cfi_def_cfa_offset 16
leaq _ZL15__fatDeviceText(%rip), %rdi
call __cudaRegisterFatBinary@PLT
movq %rax, %rdi
movq %rax, _ZL20__cudaFatCubinHandle(%rip)
pushq $0
.cfi_def_cfa_offset 24
pushq $0
.cfi_def_cfa_offset 32
pushq $0
.cfi_def_cfa_offset 40
pushq $0
.cfi_def_cfa_offset 48
movl $0, %r9d
movl $-1, %r8d
leaq .LC0(%rip), %rdx
movq %rdx, %rcx
leaq _Z10normLogErriiPfS_(%rip), %rsi
call __cudaRegisterFunction@PLT
addq $32, %rsp
.cfi_def_cfa_offset 16
movq _ZL20__cudaFatCubinHandle(%rip), %rdi
call __cudaRegisterFatBinaryEnd@PLT
leaq _ZL26__cudaUnregisterBinaryUtilv(%rip), %rdi
call atexit@PLT
addq $8, %rsp
.cfi_def_cfa_offset 8
ret
.cfi_endproc
.LFE2054:
.size _ZL24__sti____cudaRegisterAllv, .-_ZL24__sti____cudaRegisterAllv
.section .init_array,"aw"
.align 8
.quad _ZL24__sti____cudaRegisterAllv
.section .nvFatBinSegment,"aw"
.align 8
.type _ZL15__fatDeviceText, @object
.size _ZL15__fatDeviceText, 24
_ZL15__fatDeviceText:
.long 1180844977
.long 1
.quad fatbinData
.quad 0
.local _ZL20__cudaFatCubinHandle
.comm _ZL20__cudaFatCubinHandle,8,8
.ident "GCC: (Ubuntu 13.3.0-6ubuntu2~24.04) 13.3.0"
.section .note.GNU-stack,"",@progbits
.section .note.gnu.property,"a"
.align 8
.long 1f - 0f
.long 4f - 1f
.long 5
0:
.string "GNU"
1:
.align 8
.long 0xc0000002
.long 3f - 2f
2:
.long 0x3
3:
.align 8
4: |
You are a helpful coding assistant specialized in converting CUDA source code to HIP/AMD source code. | #include "includes.h"
// filename: eeTanh.cu
// a simple CUDA kernel to square the elements of a matrix
extern "C" // ensure function name to be exactly "eeTanh"
{
}
__global__ void normLogErr(int N, int M, float *A, float *Y)
{
int i = blockIdx.x * blockDim.x + threadIdx.x;
int j = blockIdx.y * blockDim.y + threadIdx.y;
int index = j*N + i;
int L = N*M;
if (i < N && j < M)
{
// A2 in this case is stored in the doubled rows of A, the length of A is
// doublt that of Y
float a = __expf(__fmul_rn(2.0, A[index+L]));
A[index] = __fmul_rn(a, __fmaf_rn(0.5, __fmul_rn(Y[index], Y[index]), __fsub_rn(__fmul_rn(0.5, __fmul_rn(A[index], A[index])), __fmul_rn(A[index], Y[index]))));
A[index+L] = __fsub_rn(0.9189385332, A[index+L]); // stick final sum factor in 2nd part of A so when it sums to total the cost will be correct
// A[index] = a*(A[index]*(0.5*A[index] - Y[index]) + 0.5*Y[index]*Y[index]);
// A[index+L] = __fsub_rn(0.9189385332, A[index+L]);
}
} | #include <hip/hip_runtime.h>
#include "includes.h"
// filename: eeTanh.cu
// a simple CUDA kernel to square the elements of a matrix
extern "C" // ensure function name to be exactly "eeTanh"
{
}
__global__ void normLogErr(int N, int M, float *A, float *Y)
{
int i = blockIdx.x * blockDim.x + threadIdx.x;
int j = blockIdx.y * blockDim.y + threadIdx.y;
int index = j*N + i;
int L = N*M;
if (i < N && j < M)
{
// A2 in this case is stored in the doubled rows of A, the length of A is
// doublt that of Y
float a = __expf(__fmul_rn(2.0, A[index+L]));
A[index] = __fmul_rn(a, __fmaf_rn(0.5, __fmul_rn(Y[index], Y[index]), __fsub_rn(__fmul_rn(0.5, __fmul_rn(A[index], A[index])), __fmul_rn(A[index], Y[index]))));
A[index+L] = __fsub_rn(0.9189385332, A[index+L]); // stick final sum factor in 2nd part of A so when it sums to total the cost will be correct
// A[index] = a*(A[index]*(0.5*A[index] - Y[index]) + 0.5*Y[index]*Y[index]);
// A[index+L] = __fsub_rn(0.9189385332, A[index+L]);
}
} |
You are a helpful coding assistant specialized in converting HIP source code to AMD device assembly. | #include <hip/hip_runtime.h>
#include "includes.h"
// filename: eeTanh.cu
// a simple CUDA kernel to square the elements of a matrix
extern "C" // ensure function name to be exactly "eeTanh"
{
}
__global__ void normLogErr(int N, int M, float *A, float *Y)
{
int i = blockIdx.x * blockDim.x + threadIdx.x;
int j = blockIdx.y * blockDim.y + threadIdx.y;
int index = j*N + i;
int L = N*M;
if (i < N && j < M)
{
// A2 in this case is stored in the doubled rows of A, the length of A is
// doublt that of Y
float a = __expf(__fmul_rn(2.0, A[index+L]));
A[index] = __fmul_rn(a, __fmaf_rn(0.5, __fmul_rn(Y[index], Y[index]), __fsub_rn(__fmul_rn(0.5, __fmul_rn(A[index], A[index])), __fmul_rn(A[index], Y[index]))));
A[index+L] = __fsub_rn(0.9189385332, A[index+L]); // stick final sum factor in 2nd part of A so when it sums to total the cost will be correct
// A[index] = a*(A[index]*(0.5*A[index] - Y[index]) + 0.5*Y[index]*Y[index]);
// A[index+L] = __fsub_rn(0.9189385332, A[index+L]);
}
} | .text
.amdgcn_target "amdgcn-amd-amdhsa--gfx1100"
.protected _Z10normLogErriiPfS_
.globl _Z10normLogErriiPfS_
.p2align 8
.type _Z10normLogErriiPfS_,@function
_Z10normLogErriiPfS_:
s_clause 0x1
s_load_b32 s2, s[0:1], 0x24
s_load_b64 s[4:5], s[0:1], 0x0
v_and_b32_e32 v2, 0x3ff, v0
v_bfe_u32 v3, v0, 10, 10
s_waitcnt lgkmcnt(0)
s_and_b32 s3, s2, 0xffff
s_lshr_b32 s2, s2, 16
s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_2)
v_mad_u64_u32 v[0:1], null, s14, s3, v[2:3]
v_mad_u64_u32 v[1:2], null, s15, s2, v[3:4]
v_cmp_gt_i32_e32 vcc_lo, s4, v0
s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
v_cmp_gt_i32_e64 s2, s5, v1
s_and_b32 s2, vcc_lo, s2
s_delay_alu instid0(SALU_CYCLE_1)
s_and_saveexec_b32 s3, s2
s_cbranch_execz .LBB0_2
v_mad_u64_u32 v[2:3], null, v1, s4, v[0:1]
s_load_b128 s[0:3], s[0:1], 0x8
s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
v_mad_u64_u32 v[0:1], null, s5, s4, v[2:3]
v_ashrrev_i32_e32 v3, 31, v2
v_lshlrev_b64 v[2:3], 2, v[2:3]
s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_1)
v_ashrrev_i32_e32 v1, 31, v0
v_lshlrev_b64 v[0:1], 2, v[0:1]
s_waitcnt lgkmcnt(0)
s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_2)
v_add_co_u32 v0, vcc_lo, s0, v0
v_add_co_ci_u32_e32 v1, vcc_lo, s1, v1, vcc_lo
v_add_co_u32 v4, vcc_lo, s0, v2
v_add_co_ci_u32_e32 v5, vcc_lo, s1, v3, vcc_lo
v_add_co_u32 v2, vcc_lo, s2, v2
global_load_b32 v6, v[0:1], off
v_add_co_ci_u32_e32 v3, vcc_lo, s3, v3, vcc_lo
global_load_b32 v7, v[4:5], off
global_load_b32 v2, v[2:3], off
s_waitcnt vmcnt(1)
v_dual_add_f32 v3, v6, v6 :: v_dual_mul_f32 v6, v7, v7
s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_3) | instid1(VALU_DEP_3)
v_mul_f32_e32 v3, 0x3fb8aa3b, v3
s_waitcnt vmcnt(0)
v_mul_f32_e32 v7, v2, v7
v_mul_f32_e32 v2, v2, v2
v_exp_f32_e32 v3, v3
s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
v_fma_f32 v6, v6, 0.5, -v7
v_fmac_f32_e32 v6, 0.5, v2
s_waitcnt_depctr 0xfff
v_mul_f32_e32 v2, v3, v6
global_store_b32 v[4:5], v2, off
global_load_b32 v2, v[0:1], off
s_waitcnt vmcnt(0)
v_sub_f32_e32 v2, 0x3f6b3f8e, v2
global_store_b32 v[0:1], v2, off
.LBB0_2:
s_nop 0
s_sendmsg sendmsg(MSG_DEALLOC_VGPRS)
s_endpgm
.section .rodata,"a",@progbits
.p2align 6, 0x0
.amdhsa_kernel _Z10normLogErriiPfS_
.amdhsa_group_segment_fixed_size 0
.amdhsa_private_segment_fixed_size 0
.amdhsa_kernarg_size 280
.amdhsa_user_sgpr_count 14
.amdhsa_user_sgpr_dispatch_ptr 0
.amdhsa_user_sgpr_queue_ptr 0
.amdhsa_user_sgpr_kernarg_segment_ptr 1
.amdhsa_user_sgpr_dispatch_id 0
.amdhsa_user_sgpr_private_segment_size 0
.amdhsa_wavefront_size32 1
.amdhsa_uses_dynamic_stack 0
.amdhsa_enable_private_segment 0
.amdhsa_system_sgpr_workgroup_id_x 1
.amdhsa_system_sgpr_workgroup_id_y 1
.amdhsa_system_sgpr_workgroup_id_z 0
.amdhsa_system_sgpr_workgroup_info 0
.amdhsa_system_vgpr_workitem_id 1
.amdhsa_next_free_vgpr 8
.amdhsa_next_free_sgpr 16
.amdhsa_float_round_mode_32 0
.amdhsa_float_round_mode_16_64 0
.amdhsa_float_denorm_mode_32 3
.amdhsa_float_denorm_mode_16_64 3
.amdhsa_dx10_clamp 1
.amdhsa_ieee_mode 1
.amdhsa_fp16_overflow 0
.amdhsa_workgroup_processor_mode 1
.amdhsa_memory_ordered 1
.amdhsa_forward_progress 0
.amdhsa_shared_vgpr_count 0
.amdhsa_exception_fp_ieee_invalid_op 0
.amdhsa_exception_fp_denorm_src 0
.amdhsa_exception_fp_ieee_div_zero 0
.amdhsa_exception_fp_ieee_overflow 0
.amdhsa_exception_fp_ieee_underflow 0
.amdhsa_exception_fp_ieee_inexact 0
.amdhsa_exception_int_div_zero 0
.end_amdhsa_kernel
.text
.Lfunc_end0:
.size _Z10normLogErriiPfS_, .Lfunc_end0-_Z10normLogErriiPfS_
.section .AMDGPU.csdata,"",@progbits
.text
.p2alignl 7, 3214868480
.fill 96, 4, 3214868480
.type __hip_cuid_,@object
.section .bss,"aw",@nobits
.globl __hip_cuid_
__hip_cuid_:
.byte 0
.size __hip_cuid_, 1
.ident "AMD clang version 18.0.0git (https://github.com/RadeonOpenCompute/llvm-project roc-6.3.2 25012 e5bf7e55c91490b07c49d8960fa7983d864936c4)"
.section ".note.GNU-stack","",@progbits
.addrsig
.addrsig_sym __hip_cuid_
.amdgpu_metadata
---
amdhsa.kernels:
- .args:
- .offset: 0
.size: 4
.value_kind: by_value
- .offset: 4
.size: 4
.value_kind: by_value
- .address_space: global
.offset: 8
.size: 8
.value_kind: global_buffer
- .address_space: global
.offset: 16
.size: 8
.value_kind: global_buffer
- .offset: 24
.size: 4
.value_kind: hidden_block_count_x
- .offset: 28
.size: 4
.value_kind: hidden_block_count_y
- .offset: 32
.size: 4
.value_kind: hidden_block_count_z
- .offset: 36
.size: 2
.value_kind: hidden_group_size_x
- .offset: 38
.size: 2
.value_kind: hidden_group_size_y
- .offset: 40
.size: 2
.value_kind: hidden_group_size_z
- .offset: 42
.size: 2
.value_kind: hidden_remainder_x
- .offset: 44
.size: 2
.value_kind: hidden_remainder_y
- .offset: 46
.size: 2
.value_kind: hidden_remainder_z
- .offset: 64
.size: 8
.value_kind: hidden_global_offset_x
- .offset: 72
.size: 8
.value_kind: hidden_global_offset_y
- .offset: 80
.size: 8
.value_kind: hidden_global_offset_z
- .offset: 88
.size: 2
.value_kind: hidden_grid_dims
.group_segment_fixed_size: 0
.kernarg_segment_align: 8
.kernarg_segment_size: 280
.language: OpenCL C
.language_version:
- 2
- 0
.max_flat_workgroup_size: 1024
.name: _Z10normLogErriiPfS_
.private_segment_fixed_size: 0
.sgpr_count: 18
.sgpr_spill_count: 0
.symbol: _Z10normLogErriiPfS_.kd
.uniform_work_group_size: 1
.uses_dynamic_stack: false
.vgpr_count: 8
.vgpr_spill_count: 0
.wavefront_size: 32
.workgroup_processor_mode: 1
amdhsa.target: amdgcn-amd-amdhsa--gfx1100
amdhsa.version:
- 1
- 2
...
.end_amdgpu_metadata |
You are a helpful coding assistant specialized in converting HIP source code to AMD host assembly. | #include <hip/hip_runtime.h>
#include "includes.h"
// filename: eeTanh.cu
// a simple CUDA kernel to square the elements of a matrix
extern "C" // ensure function name to be exactly "eeTanh"
{
}
__global__ void normLogErr(int N, int M, float *A, float *Y)
{
int i = blockIdx.x * blockDim.x + threadIdx.x;
int j = blockIdx.y * blockDim.y + threadIdx.y;
int index = j*N + i;
int L = N*M;
if (i < N && j < M)
{
// A2 in this case is stored in the doubled rows of A, the length of A is
// doublt that of Y
float a = __expf(__fmul_rn(2.0, A[index+L]));
A[index] = __fmul_rn(a, __fmaf_rn(0.5, __fmul_rn(Y[index], Y[index]), __fsub_rn(__fmul_rn(0.5, __fmul_rn(A[index], A[index])), __fmul_rn(A[index], Y[index]))));
A[index+L] = __fsub_rn(0.9189385332, A[index+L]); // stick final sum factor in 2nd part of A so when it sums to total the cost will be correct
// A[index] = a*(A[index]*(0.5*A[index] - Y[index]) + 0.5*Y[index]*Y[index]);
// A[index+L] = __fsub_rn(0.9189385332, A[index+L]);
}
} | .text
.file "normLogErr.hip"
.globl _Z25__device_stub__normLogErriiPfS_ # -- Begin function _Z25__device_stub__normLogErriiPfS_
.p2align 4, 0x90
.type _Z25__device_stub__normLogErriiPfS_,@function
_Z25__device_stub__normLogErriiPfS_: # @_Z25__device_stub__normLogErriiPfS_
.cfi_startproc
# %bb.0:
subq $120, %rsp
.cfi_def_cfa_offset 128
movl %edi, 12(%rsp)
movl %esi, 8(%rsp)
movq %rdx, 72(%rsp)
movq %rcx, 64(%rsp)
leaq 12(%rsp), %rax
movq %rax, 80(%rsp)
leaq 8(%rsp), %rax
movq %rax, 88(%rsp)
leaq 72(%rsp), %rax
movq %rax, 96(%rsp)
leaq 64(%rsp), %rax
movq %rax, 104(%rsp)
leaq 48(%rsp), %rdi
leaq 32(%rsp), %rsi
leaq 24(%rsp), %rdx
leaq 16(%rsp), %rcx
callq __hipPopCallConfiguration
movq 48(%rsp), %rsi
movl 56(%rsp), %edx
movq 32(%rsp), %rcx
movl 40(%rsp), %r8d
leaq 80(%rsp), %r9
movl $_Z10normLogErriiPfS_, %edi
pushq 16(%rsp)
.cfi_adjust_cfa_offset 8
pushq 32(%rsp)
.cfi_adjust_cfa_offset 8
callq hipLaunchKernel
addq $136, %rsp
.cfi_adjust_cfa_offset -136
retq
.Lfunc_end0:
.size _Z25__device_stub__normLogErriiPfS_, .Lfunc_end0-_Z25__device_stub__normLogErriiPfS_
.cfi_endproc
# -- End function
.p2align 4, 0x90 # -- Begin function __hip_module_ctor
.type __hip_module_ctor,@function
__hip_module_ctor: # @__hip_module_ctor
.cfi_startproc
# %bb.0:
subq $40, %rsp
.cfi_def_cfa_offset 48
cmpq $0, __hip_gpubin_handle(%rip)
jne .LBB1_2
# %bb.1:
movl $__hip_fatbin_wrapper, %edi
callq __hipRegisterFatBinary
movq %rax, __hip_gpubin_handle(%rip)
.LBB1_2:
movq __hip_gpubin_handle(%rip), %rdi
xorps %xmm0, %xmm0
movups %xmm0, 16(%rsp)
movups %xmm0, (%rsp)
movl $_Z10normLogErriiPfS_, %esi
movl $.L__unnamed_1, %edx
movl $.L__unnamed_1, %ecx
movl $-1, %r8d
xorl %r9d, %r9d
callq __hipRegisterFunction
movl $__hip_module_dtor, %edi
addq $40, %rsp
.cfi_def_cfa_offset 8
jmp atexit # TAILCALL
.Lfunc_end1:
.size __hip_module_ctor, .Lfunc_end1-__hip_module_ctor
.cfi_endproc
# -- End function
.p2align 4, 0x90 # -- Begin function __hip_module_dtor
.type __hip_module_dtor,@function
__hip_module_dtor: # @__hip_module_dtor
.cfi_startproc
# %bb.0:
movq __hip_gpubin_handle(%rip), %rdi
testq %rdi, %rdi
je .LBB2_2
# %bb.1:
pushq %rax
.cfi_def_cfa_offset 16
callq __hipUnregisterFatBinary
movq $0, __hip_gpubin_handle(%rip)
addq $8, %rsp
.cfi_def_cfa_offset 8
.LBB2_2:
retq
.Lfunc_end2:
.size __hip_module_dtor, .Lfunc_end2-__hip_module_dtor
.cfi_endproc
# -- End function
.type _Z10normLogErriiPfS_,@object # @_Z10normLogErriiPfS_
.section .rodata,"a",@progbits
.globl _Z10normLogErriiPfS_
.p2align 3, 0x0
_Z10normLogErriiPfS_:
.quad _Z25__device_stub__normLogErriiPfS_
.size _Z10normLogErriiPfS_, 8
.type .L__unnamed_1,@object # @0
.section .rodata.str1.1,"aMS",@progbits,1
.L__unnamed_1:
.asciz "_Z10normLogErriiPfS_"
.size .L__unnamed_1, 21
.type __hip_fatbin_wrapper,@object # @__hip_fatbin_wrapper
.section .hipFatBinSegment,"a",@progbits
.p2align 3, 0x0
__hip_fatbin_wrapper:
.long 1212764230 # 0x48495046
.long 1 # 0x1
.quad __hip_fatbin
.quad 0
.size __hip_fatbin_wrapper, 24
.type __hip_gpubin_handle,@object # @__hip_gpubin_handle
.local __hip_gpubin_handle
.comm __hip_gpubin_handle,8,8
.section .init_array,"aw",@init_array
.p2align 3, 0x0
.quad __hip_module_ctor
.type __hip_cuid_,@object # @__hip_cuid_
.bss
.globl __hip_cuid_
__hip_cuid_:
.byte 0 # 0x0
.size __hip_cuid_, 1
.section ".linker-options","e",@llvm_linker_options
.ident "AMD clang version 18.0.0git (https://github.com/RadeonOpenCompute/llvm-project roc-6.3.2 25012 e5bf7e55c91490b07c49d8960fa7983d864936c4)"
.section ".note.GNU-stack","",@progbits
.addrsig
.addrsig_sym _Z25__device_stub__normLogErriiPfS_
.addrsig_sym __hip_module_ctor
.addrsig_sym __hip_module_dtor
.addrsig_sym _Z10normLogErriiPfS_
.addrsig_sym __hip_fatbin
.addrsig_sym __hip_fatbin_wrapper
.addrsig_sym __hip_cuid_ |
You are a helpful coding assistant specialized in converting from CUDA device assembly to AMD device assembly. | code for sm_80
Function : _Z10normLogErriiPfS_
.headerflags @"EF_CUDA_TEXMODE_UNIFIED EF_CUDA_64BIT_ADDRESS EF_CUDA_SM80 EF_CUDA_VIRTUAL_SM(EF_CUDA_SM80)"
/*0000*/ MOV R1, c[0x0][0x28] ; /* 0x00000a0000017a02 */
/* 0x000fe40000000f00 */
/*0010*/ S2R R3, SR_CTAID.Y ; /* 0x0000000000037919 */
/* 0x000e280000002600 */
/*0020*/ S2R R2, SR_TID.Y ; /* 0x0000000000027919 */
/* 0x000e280000002200 */
/*0030*/ S2R R0, SR_CTAID.X ; /* 0x0000000000007919 */
/* 0x000e680000002500 */
/*0040*/ S2R R5, SR_TID.X ; /* 0x0000000000057919 */
/* 0x000e620000002100 */
/*0050*/ IMAD R3, R3, c[0x0][0x4], R2 ; /* 0x0000010003037a24 */
/* 0x001fca00078e0202 */
/*0060*/ ISETP.GE.AND P0, PT, R3, c[0x0][0x164], PT ; /* 0x0000590003007a0c */
/* 0x000fe20003f06270 */
/*0070*/ IMAD R0, R0, c[0x0][0x0], R5 ; /* 0x0000000000007a24 */
/* 0x002fca00078e0205 */
/*0080*/ ISETP.GE.OR P0, PT, R0, c[0x0][0x160], P0 ; /* 0x0000580000007a0c */
/* 0x000fda0000706670 */
/*0090*/ @P0 EXIT ; /* 0x000000000000094d */
/* 0x000fea0003800000 */
/*00a0*/ HFMA2.MMA R7, -RZ, RZ, 0, 2.384185791015625e-07 ; /* 0x00000004ff077435 */
/* 0x000fe200000001ff */
/*00b0*/ MOV R5, c[0x0][0x164] ; /* 0x0000590000057a02 */
/* 0x000fe20000000f00 */
/*00c0*/ IMAD R0, R3, c[0x0][0x160], R0 ; /* 0x0000580003007a24 */
/* 0x000fe200078e0200 */
/*00d0*/ ULDC.64 UR4, c[0x0][0x118] ; /* 0x0000460000047ab9 */
/* 0x000fc60000000a00 */
/*00e0*/ IMAD R2, R5, c[0x0][0x160], R0 ; /* 0x0000580005027a24 */
/* 0x000fc800078e0200 */
/*00f0*/ IMAD.WIDE R2, R2, R7, c[0x0][0x168] ; /* 0x00005a0002027625 */
/* 0x000fca00078e0207 */
/*0100*/ LDG.E R8, [R2.64] ; /* 0x0000000402087981 */
/* 0x000ea2000c1e1900 */
/*0110*/ IMAD.WIDE R4, R0, R7, c[0x0][0x168] ; /* 0x00005a0000047625 */
/* 0x000fc800078e0207 */
/*0120*/ IMAD.WIDE R6, R0, R7, c[0x0][0x170] ; /* 0x00005c0000067625 */
/* 0x000fe200078e0207 */
/*0130*/ LDG.E R9, [R4.64] ; /* 0x0000000404097981 */
/* 0x000eea000c1e1900 */
/*0140*/ LDG.E R6, [R6.64] ; /* 0x0000000406067981 */
/* 0x000f22000c1e1900 */
/*0150*/ FMUL R8, R8, 2 ; /* 0x4000000008087820 */
/* 0x004fc80000400000 */
/*0160*/ FMUL R8, R8, 1.4426950216293334961 ; /* 0x3fb8aa3b08087820 */
/* 0x000fe40000400000 */
/*0170*/ FMUL R10, R9, R9 ; /* 0x00000009090a7220 */
/* 0x008fc60000400000 */
/*0180*/ FSETP.GEU.AND P0, PT, R8, -126, PT ; /* 0xc2fc00000800780b */
/* 0x000fe20003f0e000 */
/*0190*/ FMUL R10, R10, 0.5 ; /* 0x3f0000000a0a7820 */
/* 0x000fe40000400000 */
/*01a0*/ FMUL R11, R6.reuse, R9 ; /* 0x00000009060b7220 */
/* 0x050fe40000400000 */
/*01b0*/ FMUL R9, R6, R6 ; /* 0x0000000606097220 */
/* 0x000fe40000400000 */
/*01c0*/ FADD R10, R10, -R11 ; /* 0x8000000b0a0a7221 */
/* 0x000fc80000000000 */
/*01d0*/ FFMA R9, R9, 0.5, R10 ; /* 0x3f00000009097823 */
/* 0x000fe4000000000a */
/*01e0*/ @!P0 FMUL R8, R8, 0.5 ; /* 0x3f00000008088820 */
/* 0x000fc80000400000 */
/*01f0*/ MUFU.EX2 R0, R8 ; /* 0x0000000800007308 */
/* 0x000e240000000800 */
/*0200*/ @!P0 FMUL R0, R0, R0 ; /* 0x0000000000008220 */
/* 0x001fc80000400000 */
/*0210*/ FMUL R9, R0, R9 ; /* 0x0000000900097220 */
/* 0x000fca0000400000 */
/*0220*/ STG.E [R4.64], R9 ; /* 0x0000000904007986 */
/* 0x000fe8000c101904 */
/*0230*/ LDG.E R0, [R2.64] ; /* 0x0000000402007981 */
/* 0x000ea4000c1e1900 */
/*0240*/ FADD R7, -R0, 0.91893851757049560547 ; /* 0x3f6b3f8e00077421 */
/* 0x004fca0000000100 */
/*0250*/ STG.E [R2.64], R7 ; /* 0x0000000702007986 */
/* 0x000fe2000c101904 */
/*0260*/ EXIT ; /* 0x000000000000794d */
/* 0x000fea0003800000 */
/*0270*/ BRA 0x270; /* 0xfffffff000007947 */
/* 0x000fc0000383ffff */
/*0280*/ NOP; /* 0x0000000000007918 */
/* 0x000fc00000000000 */
/*0290*/ NOP; /* 0x0000000000007918 */
/* 0x000fc00000000000 */
/*02a0*/ NOP; /* 0x0000000000007918 */
/* 0x000fc00000000000 */
/*02b0*/ NOP; /* 0x0000000000007918 */
/* 0x000fc00000000000 */
/*02c0*/ NOP; /* 0x0000000000007918 */
/* 0x000fc00000000000 */
/*02d0*/ NOP; /* 0x0000000000007918 */
/* 0x000fc00000000000 */
/*02e0*/ NOP; /* 0x0000000000007918 */
/* 0x000fc00000000000 */
/*02f0*/ NOP; /* 0x0000000000007918 */
/* 0x000fc00000000000 */
.......... | .text
.amdgcn_target "amdgcn-amd-amdhsa--gfx1100"
.protected _Z10normLogErriiPfS_
.globl _Z10normLogErriiPfS_
.p2align 8
.type _Z10normLogErriiPfS_,@function
_Z10normLogErriiPfS_:
s_clause 0x1
s_load_b32 s2, s[0:1], 0x24
s_load_b64 s[4:5], s[0:1], 0x0
v_and_b32_e32 v2, 0x3ff, v0
v_bfe_u32 v3, v0, 10, 10
s_waitcnt lgkmcnt(0)
s_and_b32 s3, s2, 0xffff
s_lshr_b32 s2, s2, 16
s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_2)
v_mad_u64_u32 v[0:1], null, s14, s3, v[2:3]
v_mad_u64_u32 v[1:2], null, s15, s2, v[3:4]
v_cmp_gt_i32_e32 vcc_lo, s4, v0
s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
v_cmp_gt_i32_e64 s2, s5, v1
s_and_b32 s2, vcc_lo, s2
s_delay_alu instid0(SALU_CYCLE_1)
s_and_saveexec_b32 s3, s2
s_cbranch_execz .LBB0_2
v_mad_u64_u32 v[2:3], null, v1, s4, v[0:1]
s_load_b128 s[0:3], s[0:1], 0x8
s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
v_mad_u64_u32 v[0:1], null, s5, s4, v[2:3]
v_ashrrev_i32_e32 v3, 31, v2
v_lshlrev_b64 v[2:3], 2, v[2:3]
s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_1)
v_ashrrev_i32_e32 v1, 31, v0
v_lshlrev_b64 v[0:1], 2, v[0:1]
s_waitcnt lgkmcnt(0)
s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_2)
v_add_co_u32 v0, vcc_lo, s0, v0
v_add_co_ci_u32_e32 v1, vcc_lo, s1, v1, vcc_lo
v_add_co_u32 v4, vcc_lo, s0, v2
v_add_co_ci_u32_e32 v5, vcc_lo, s1, v3, vcc_lo
v_add_co_u32 v2, vcc_lo, s2, v2
global_load_b32 v6, v[0:1], off
v_add_co_ci_u32_e32 v3, vcc_lo, s3, v3, vcc_lo
global_load_b32 v7, v[4:5], off
global_load_b32 v2, v[2:3], off
s_waitcnt vmcnt(1)
v_dual_add_f32 v3, v6, v6 :: v_dual_mul_f32 v6, v7, v7
s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_3) | instid1(VALU_DEP_3)
v_mul_f32_e32 v3, 0x3fb8aa3b, v3
s_waitcnt vmcnt(0)
v_mul_f32_e32 v7, v2, v7
v_mul_f32_e32 v2, v2, v2
v_exp_f32_e32 v3, v3
s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
v_fma_f32 v6, v6, 0.5, -v7
v_fmac_f32_e32 v6, 0.5, v2
s_waitcnt_depctr 0xfff
v_mul_f32_e32 v2, v3, v6
global_store_b32 v[4:5], v2, off
global_load_b32 v2, v[0:1], off
s_waitcnt vmcnt(0)
v_sub_f32_e32 v2, 0x3f6b3f8e, v2
global_store_b32 v[0:1], v2, off
.LBB0_2:
s_nop 0
s_sendmsg sendmsg(MSG_DEALLOC_VGPRS)
s_endpgm
.section .rodata,"a",@progbits
.p2align 6, 0x0
.amdhsa_kernel _Z10normLogErriiPfS_
.amdhsa_group_segment_fixed_size 0
.amdhsa_private_segment_fixed_size 0
.amdhsa_kernarg_size 280
.amdhsa_user_sgpr_count 14
.amdhsa_user_sgpr_dispatch_ptr 0
.amdhsa_user_sgpr_queue_ptr 0
.amdhsa_user_sgpr_kernarg_segment_ptr 1
.amdhsa_user_sgpr_dispatch_id 0
.amdhsa_user_sgpr_private_segment_size 0
.amdhsa_wavefront_size32 1
.amdhsa_uses_dynamic_stack 0
.amdhsa_enable_private_segment 0
.amdhsa_system_sgpr_workgroup_id_x 1
.amdhsa_system_sgpr_workgroup_id_y 1
.amdhsa_system_sgpr_workgroup_id_z 0
.amdhsa_system_sgpr_workgroup_info 0
.amdhsa_system_vgpr_workitem_id 1
.amdhsa_next_free_vgpr 8
.amdhsa_next_free_sgpr 16
.amdhsa_float_round_mode_32 0
.amdhsa_float_round_mode_16_64 0
.amdhsa_float_denorm_mode_32 3
.amdhsa_float_denorm_mode_16_64 3
.amdhsa_dx10_clamp 1
.amdhsa_ieee_mode 1
.amdhsa_fp16_overflow 0
.amdhsa_workgroup_processor_mode 1
.amdhsa_memory_ordered 1
.amdhsa_forward_progress 0
.amdhsa_shared_vgpr_count 0
.amdhsa_exception_fp_ieee_invalid_op 0
.amdhsa_exception_fp_denorm_src 0
.amdhsa_exception_fp_ieee_div_zero 0
.amdhsa_exception_fp_ieee_overflow 0
.amdhsa_exception_fp_ieee_underflow 0
.amdhsa_exception_fp_ieee_inexact 0
.amdhsa_exception_int_div_zero 0
.end_amdhsa_kernel
.text
.Lfunc_end0:
.size _Z10normLogErriiPfS_, .Lfunc_end0-_Z10normLogErriiPfS_
.section .AMDGPU.csdata,"",@progbits
.text
.p2alignl 7, 3214868480
.fill 96, 4, 3214868480
.type __hip_cuid_,@object
.section .bss,"aw",@nobits
.globl __hip_cuid_
__hip_cuid_:
.byte 0
.size __hip_cuid_, 1
.ident "AMD clang version 18.0.0git (https://github.com/RadeonOpenCompute/llvm-project roc-6.3.2 25012 e5bf7e55c91490b07c49d8960fa7983d864936c4)"
.section ".note.GNU-stack","",@progbits
.addrsig
.addrsig_sym __hip_cuid_
.amdgpu_metadata
---
amdhsa.kernels:
- .args:
- .offset: 0
.size: 4
.value_kind: by_value
- .offset: 4
.size: 4
.value_kind: by_value
- .address_space: global
.offset: 8
.size: 8
.value_kind: global_buffer
- .address_space: global
.offset: 16
.size: 8
.value_kind: global_buffer
- .offset: 24
.size: 4
.value_kind: hidden_block_count_x
- .offset: 28
.size: 4
.value_kind: hidden_block_count_y
- .offset: 32
.size: 4
.value_kind: hidden_block_count_z
- .offset: 36
.size: 2
.value_kind: hidden_group_size_x
- .offset: 38
.size: 2
.value_kind: hidden_group_size_y
- .offset: 40
.size: 2
.value_kind: hidden_group_size_z
- .offset: 42
.size: 2
.value_kind: hidden_remainder_x
- .offset: 44
.size: 2
.value_kind: hidden_remainder_y
- .offset: 46
.size: 2
.value_kind: hidden_remainder_z
- .offset: 64
.size: 8
.value_kind: hidden_global_offset_x
- .offset: 72
.size: 8
.value_kind: hidden_global_offset_y
- .offset: 80
.size: 8
.value_kind: hidden_global_offset_z
- .offset: 88
.size: 2
.value_kind: hidden_grid_dims
.group_segment_fixed_size: 0
.kernarg_segment_align: 8
.kernarg_segment_size: 280
.language: OpenCL C
.language_version:
- 2
- 0
.max_flat_workgroup_size: 1024
.name: _Z10normLogErriiPfS_
.private_segment_fixed_size: 0
.sgpr_count: 18
.sgpr_spill_count: 0
.symbol: _Z10normLogErriiPfS_.kd
.uniform_work_group_size: 1
.uses_dynamic_stack: false
.vgpr_count: 8
.vgpr_spill_count: 0
.wavefront_size: 32
.workgroup_processor_mode: 1
amdhsa.target: amdgcn-amd-amdhsa--gfx1100
amdhsa.version:
- 1
- 2
...
.end_amdgpu_metadata |
You are a helpful coding assistant specialized in converting from CUDA host assembly to AMD host assembly. | .file "tmpxft_000f5ce4_00000000-6_normLogErr.cudafe1.cpp"
.text
#APP
#NO_APP
.type _ZL26__cudaUnregisterBinaryUtilv, @function
_ZL26__cudaUnregisterBinaryUtilv:
.LFB2029:
.cfi_startproc
endbr64
subq $8, %rsp
.cfi_def_cfa_offset 16
movq _ZL20__cudaFatCubinHandle(%rip), %rdi
call __cudaUnregisterFatBinary@PLT
addq $8, %rsp
.cfi_def_cfa_offset 8
ret
.cfi_endproc
.LFE2029:
.size _ZL26__cudaUnregisterBinaryUtilv, .-_ZL26__cudaUnregisterBinaryUtilv
.globl _Z34__device_stub__Z10normLogErriiPfS_iiPfS_
.type _Z34__device_stub__Z10normLogErriiPfS_iiPfS_, @function
_Z34__device_stub__Z10normLogErriiPfS_iiPfS_:
.LFB2051:
.cfi_startproc
endbr64
subq $152, %rsp
.cfi_def_cfa_offset 160
movl %edi, 28(%rsp)
movl %esi, 24(%rsp)
movq %rdx, 16(%rsp)
movq %rcx, 8(%rsp)
movq %fs:40, %rax
movq %rax, 136(%rsp)
xorl %eax, %eax
leaq 28(%rsp), %rax
movq %rax, 96(%rsp)
leaq 24(%rsp), %rax
movq %rax, 104(%rsp)
leaq 16(%rsp), %rax
movq %rax, 112(%rsp)
leaq 8(%rsp), %rax
movq %rax, 120(%rsp)
movl $1, 48(%rsp)
movl $1, 52(%rsp)
movl $1, 56(%rsp)
movl $1, 60(%rsp)
movl $1, 64(%rsp)
movl $1, 68(%rsp)
leaq 40(%rsp), %rcx
leaq 32(%rsp), %rdx
leaq 60(%rsp), %rsi
leaq 48(%rsp), %rdi
call __cudaPopCallConfiguration@PLT
testl %eax, %eax
je .L7
.L3:
movq 136(%rsp), %rax
subq %fs:40, %rax
jne .L8
addq $152, %rsp
.cfi_remember_state
.cfi_def_cfa_offset 8
ret
.L7:
.cfi_restore_state
pushq 40(%rsp)
.cfi_def_cfa_offset 168
pushq 40(%rsp)
.cfi_def_cfa_offset 176
leaq 112(%rsp), %r9
movq 76(%rsp), %rcx
movl 84(%rsp), %r8d
movq 64(%rsp), %rsi
movl 72(%rsp), %edx
leaq _Z10normLogErriiPfS_(%rip), %rdi
call cudaLaunchKernel@PLT
addq $16, %rsp
.cfi_def_cfa_offset 160
jmp .L3
.L8:
call __stack_chk_fail@PLT
.cfi_endproc
.LFE2051:
.size _Z34__device_stub__Z10normLogErriiPfS_iiPfS_, .-_Z34__device_stub__Z10normLogErriiPfS_iiPfS_
.globl _Z10normLogErriiPfS_
.type _Z10normLogErriiPfS_, @function
_Z10normLogErriiPfS_:
.LFB2052:
.cfi_startproc
endbr64
subq $8, %rsp
.cfi_def_cfa_offset 16
call _Z34__device_stub__Z10normLogErriiPfS_iiPfS_
addq $8, %rsp
.cfi_def_cfa_offset 8
ret
.cfi_endproc
.LFE2052:
.size _Z10normLogErriiPfS_, .-_Z10normLogErriiPfS_
.section .rodata.str1.1,"aMS",@progbits,1
.LC0:
.string "_Z10normLogErriiPfS_"
.text
.type _ZL24__sti____cudaRegisterAllv, @function
_ZL24__sti____cudaRegisterAllv:
.LFB2054:
.cfi_startproc
endbr64
subq $8, %rsp
.cfi_def_cfa_offset 16
leaq _ZL15__fatDeviceText(%rip), %rdi
call __cudaRegisterFatBinary@PLT
movq %rax, %rdi
movq %rax, _ZL20__cudaFatCubinHandle(%rip)
pushq $0
.cfi_def_cfa_offset 24
pushq $0
.cfi_def_cfa_offset 32
pushq $0
.cfi_def_cfa_offset 40
pushq $0
.cfi_def_cfa_offset 48
movl $0, %r9d
movl $-1, %r8d
leaq .LC0(%rip), %rdx
movq %rdx, %rcx
leaq _Z10normLogErriiPfS_(%rip), %rsi
call __cudaRegisterFunction@PLT
addq $32, %rsp
.cfi_def_cfa_offset 16
movq _ZL20__cudaFatCubinHandle(%rip), %rdi
call __cudaRegisterFatBinaryEnd@PLT
leaq _ZL26__cudaUnregisterBinaryUtilv(%rip), %rdi
call atexit@PLT
addq $8, %rsp
.cfi_def_cfa_offset 8
ret
.cfi_endproc
.LFE2054:
.size _ZL24__sti____cudaRegisterAllv, .-_ZL24__sti____cudaRegisterAllv
.section .init_array,"aw"
.align 8
.quad _ZL24__sti____cudaRegisterAllv
.section .nvFatBinSegment,"aw"
.align 8
.type _ZL15__fatDeviceText, @object
.size _ZL15__fatDeviceText, 24
_ZL15__fatDeviceText:
.long 1180844977
.long 1
.quad fatbinData
.quad 0
.local _ZL20__cudaFatCubinHandle
.comm _ZL20__cudaFatCubinHandle,8,8
.ident "GCC: (Ubuntu 13.3.0-6ubuntu2~24.04) 13.3.0"
.section .note.GNU-stack,"",@progbits
.section .note.gnu.property,"a"
.align 8
.long 1f - 0f
.long 4f - 1f
.long 5
0:
.string "GNU"
1:
.align 8
.long 0xc0000002
.long 3f - 2f
2:
.long 0x3
3:
.align 8
4: | .text
.file "normLogErr.hip"
.globl _Z25__device_stub__normLogErriiPfS_ # -- Begin function _Z25__device_stub__normLogErriiPfS_
.p2align 4, 0x90
.type _Z25__device_stub__normLogErriiPfS_,@function
_Z25__device_stub__normLogErriiPfS_: # @_Z25__device_stub__normLogErriiPfS_
.cfi_startproc
# %bb.0:
subq $120, %rsp
.cfi_def_cfa_offset 128
movl %edi, 12(%rsp)
movl %esi, 8(%rsp)
movq %rdx, 72(%rsp)
movq %rcx, 64(%rsp)
leaq 12(%rsp), %rax
movq %rax, 80(%rsp)
leaq 8(%rsp), %rax
movq %rax, 88(%rsp)
leaq 72(%rsp), %rax
movq %rax, 96(%rsp)
leaq 64(%rsp), %rax
movq %rax, 104(%rsp)
leaq 48(%rsp), %rdi
leaq 32(%rsp), %rsi
leaq 24(%rsp), %rdx
leaq 16(%rsp), %rcx
callq __hipPopCallConfiguration
movq 48(%rsp), %rsi
movl 56(%rsp), %edx
movq 32(%rsp), %rcx
movl 40(%rsp), %r8d
leaq 80(%rsp), %r9
movl $_Z10normLogErriiPfS_, %edi
pushq 16(%rsp)
.cfi_adjust_cfa_offset 8
pushq 32(%rsp)
.cfi_adjust_cfa_offset 8
callq hipLaunchKernel
addq $136, %rsp
.cfi_adjust_cfa_offset -136
retq
.Lfunc_end0:
.size _Z25__device_stub__normLogErriiPfS_, .Lfunc_end0-_Z25__device_stub__normLogErriiPfS_
.cfi_endproc
# -- End function
.p2align 4, 0x90 # -- Begin function __hip_module_ctor
.type __hip_module_ctor,@function
__hip_module_ctor: # @__hip_module_ctor
.cfi_startproc
# %bb.0:
subq $40, %rsp
.cfi_def_cfa_offset 48
cmpq $0, __hip_gpubin_handle(%rip)
jne .LBB1_2
# %bb.1:
movl $__hip_fatbin_wrapper, %edi
callq __hipRegisterFatBinary
movq %rax, __hip_gpubin_handle(%rip)
.LBB1_2:
movq __hip_gpubin_handle(%rip), %rdi
xorps %xmm0, %xmm0
movups %xmm0, 16(%rsp)
movups %xmm0, (%rsp)
movl $_Z10normLogErriiPfS_, %esi
movl $.L__unnamed_1, %edx
movl $.L__unnamed_1, %ecx
movl $-1, %r8d
xorl %r9d, %r9d
callq __hipRegisterFunction
movl $__hip_module_dtor, %edi
addq $40, %rsp
.cfi_def_cfa_offset 8
jmp atexit # TAILCALL
.Lfunc_end1:
.size __hip_module_ctor, .Lfunc_end1-__hip_module_ctor
.cfi_endproc
# -- End function
.p2align 4, 0x90 # -- Begin function __hip_module_dtor
.type __hip_module_dtor,@function
__hip_module_dtor: # @__hip_module_dtor
.cfi_startproc
# %bb.0:
movq __hip_gpubin_handle(%rip), %rdi
testq %rdi, %rdi
je .LBB2_2
# %bb.1:
pushq %rax
.cfi_def_cfa_offset 16
callq __hipUnregisterFatBinary
movq $0, __hip_gpubin_handle(%rip)
addq $8, %rsp
.cfi_def_cfa_offset 8
.LBB2_2:
retq
.Lfunc_end2:
.size __hip_module_dtor, .Lfunc_end2-__hip_module_dtor
.cfi_endproc
# -- End function
.type _Z10normLogErriiPfS_,@object # @_Z10normLogErriiPfS_
.section .rodata,"a",@progbits
.globl _Z10normLogErriiPfS_
.p2align 3, 0x0
_Z10normLogErriiPfS_:
.quad _Z25__device_stub__normLogErriiPfS_
.size _Z10normLogErriiPfS_, 8
.type .L__unnamed_1,@object # @0
.section .rodata.str1.1,"aMS",@progbits,1
.L__unnamed_1:
.asciz "_Z10normLogErriiPfS_"
.size .L__unnamed_1, 21
.type __hip_fatbin_wrapper,@object # @__hip_fatbin_wrapper
.section .hipFatBinSegment,"a",@progbits
.p2align 3, 0x0
__hip_fatbin_wrapper:
.long 1212764230 # 0x48495046
.long 1 # 0x1
.quad __hip_fatbin
.quad 0
.size __hip_fatbin_wrapper, 24
.type __hip_gpubin_handle,@object # @__hip_gpubin_handle
.local __hip_gpubin_handle
.comm __hip_gpubin_handle,8,8
.section .init_array,"aw",@init_array
.p2align 3, 0x0
.quad __hip_module_ctor
.type __hip_cuid_,@object # @__hip_cuid_
.bss
.globl __hip_cuid_
__hip_cuid_:
.byte 0 # 0x0
.size __hip_cuid_, 1
.section ".linker-options","e",@llvm_linker_options
.ident "AMD clang version 18.0.0git (https://github.com/RadeonOpenCompute/llvm-project roc-6.3.2 25012 e5bf7e55c91490b07c49d8960fa7983d864936c4)"
.section ".note.GNU-stack","",@progbits
.addrsig
.addrsig_sym _Z25__device_stub__normLogErriiPfS_
.addrsig_sym __hip_module_ctor
.addrsig_sym __hip_module_dtor
.addrsig_sym _Z10normLogErriiPfS_
.addrsig_sym __hip_fatbin
.addrsig_sym __hip_fatbin_wrapper
.addrsig_sym __hip_cuid_ |
You are a helpful coding assistant specialized in converting CUDA source code to HIP/AMD source code. | //Vector Addition using CUDA.
//Winter 2020
//High Performance Computing.
#include <string> //For stoi.
#include <iostream> //For stdout.
#include <cstdlib> //For random number generator.
#include <chrono> //For getting time.
#include <climits> //For maximum n.
#include <cmath>
#include "cuda_runtime.h" //For Windows support.
#include "device_launch_parameters.h"
//The type that is used for the calculations.
typedef int type;
//Define constants for min/max.
#define RANDOMIZE_MIN -10
#define RANDOMIZE_MAX 10
#define DEVICE_NUM 0
//Cuda calculator which will run in each thread.
__global__ void cuda_calculator(type* a, type* b, type* c, int num_calcs)
{
extern __shared__ type a_shared[];
extern __shared__ type b_shared[];
extern __shared__ type c_shared[];
//Calculate the starting index.
int start_index = (threadIdx.x + blockIdx.x * blockDim.x) * num_calcs;
int end_index = start_index + num_calcs;
//Copy the data to the shared memory.
for(int i = start_index; i < end_index; i++)
{
a_shared[i] = a[i];
b_shared[i] = b[i];
}
__syncthreads();
//Add the vectors in the current thread index.
for(int i = start_index; i < end_index; i++)
c_shared[i] = b_shared[i] + c_shared[i];
//Copy the data back to the global memory.
for(int i = start_index; i < end_index; i++)
c[i] = c_shared[i];
}
//Cuda addition which runs the cuda program.
int cuda_addition(type* a, type* b, type* c, int n, int blocks,
int threads, double times[3])
{
//Create pointers for the GPU memory allocation
type* cu_vec_a;
type* cu_vec_b;
type* cu_vec_c;
//Calculate the number of elements that each kernel will handle (round up).
int num_calcs = std::ceil((double) n / (((double) blocks) * ((double) threads)));
//Calculate the padding (for output matrix to avoid conditionals in kernel.
int padding_size = (int)(num_calcs * blocks * threads) - n ;
//Allocate memory on the device for the arrays.
cudaMalloc((void**) &cu_vec_a, sizeof(type) * (n + padding_size));
cudaMalloc((void**) &cu_vec_b, sizeof(type) * (n + padding_size));
cudaMalloc((void**) &cu_vec_c, sizeof(type) * (n + padding_size));
//Wait for the thread to finish execution.
cudaDeviceSynchronize();
//Capture the beginning time before the data transfer (from host).
auto begin_transfer_to = std::chrono::high_resolution_clock::now();
//Copy the data, and the size from the main memory to VRAM.
cudaMemcpy(cu_vec_a, a, ((int) sizeof(type)) * n, cudaMemcpyHostToDevice);
cudaMemcpy(cu_vec_b, b, ((int) sizeof(type)) * n, cudaMemcpyHostToDevice);
//Wait for the thread to finish execution.
cudaDeviceSynchronize();
//Calculate the total time in seconds that it took to transfer data to the device
auto total_transfer_to = std::chrono::high_resolution_clock::now() - begin_transfer_to;
times[0] = std::chrono::duration<double> (total_transfer_to).count();
//Get the device properties for optimizing the memory usage.
cudaDeviceProp stats;
cudaGetDeviceProperties(&stats, DEVICE_NUM);
//Get the shared memory size.
size_t shared_mem_size = stats.sharedMemPerBlock;
std::cerr << "Shared Mem size is " << shared_mem_size << " bytes" << std::endl;
//Capture the beginning time before the calculations.
auto begin_calcs_only = std::chrono::high_resolution_clock::now();
//Launch the addition kernel on the device.
cuda_calculator<<<blocks, threads>>>(cu_vec_a, cu_vec_b, cu_vec_c, num_calcs);
//Check if we got any errors.
if(cudaGetLastError() != cudaSuccess)
return EXIT_FAILURE;
//Wait for the thread to finish execution.
cudaDeviceSynchronize();
//Calculate the total time in seconds that it took to calculate.
auto total_calcs_only = std::chrono::high_resolution_clock::now() - begin_calcs_only;
times[1] = std::chrono::duration<double> (total_calcs_only).count();
//Capture the beginning time before the calculations.
auto begin_transfer_from = std::chrono::high_resolution_clock::now();
//Copy the results back from Vram to main ram.
cudaMemcpy(c, cu_vec_c, ((int) sizeof(type)) * n, cudaMemcpyDeviceToHost);
//Wait for the thread to finish execution.
cudaDeviceSynchronize();
//Calculate the total time in seconds that it took to transfer back to host.
auto total_transfer_from = std::chrono::high_resolution_clock::now() - begin_transfer_from;
times[2] = std::chrono::duration<double> (total_transfer_from).count();
//Deallocate memory in the GPU.
cudaFree(cu_vec_a);
cudaFree(cu_vec_b);
cudaFree(cu_vec_c);
//Wait for the thread to finish execution.
cudaDeviceSynchronize();
return EXIT_SUCCESS;
}
//Sequential addition function.
double seq_addition(type* a, type* b, type* c, int size)
{
//Capture the beginning time before the calculations.
auto begin = std::chrono::high_resolution_clock::now();
//Iterate over the vectors and add the elements.
for(int i = 0; i < size; i++)
c[i] = a[i] + b[i];
//Calculate and return the total time in seconds that it took to compute.
auto total = std::chrono::high_resolution_clock::now() - begin;
return std::chrono::duration<double> (total).count();;
}
//Sequential subtraction function (used for residual matrix).
void seq_subtraction(type* a, type* b, type* c, int size)
{
//Iterate over the vectors and subtract the elements.
for(int i = 0; i < size; i++)
c[i] = a[i] - b[i];
}
//Returns false if first and second aren't equal, true otherwise.
bool are_equal(type* first, type* second, int size)
{
//Iterate over and return false if not equal.
for(int i = 0; i < size; i++)
if(first[i] != second[i])
return false;
//If we get here, they were equal.
return true;
}
//A function which randomizes the vector, by defualt it only uses values between -10 - 10
void randomize(type* vec, int size, int min = RANDOMIZE_MIN, int max = RANDOMIZE_MAX)
{
//Perform this to ensure the random number generation is truly random.
std::srand(std::chrono::system_clock::now().time_since_epoch().count());
//Iterate through, and generate random numbers for each index.
for(int i = 0; i < size; i++)
vec[i] = ((type) std::rand() %
(type) (RANDOMIZE_MAX * 2) + (type) RANDOMIZE_MIN) % RANDOMIZE_MAX ;
}
//Print the given vector to stdout.
void dump(type* vec, int size)
{
//Iterate through, and generate random numbers for each index.
for(int i = 0; i < size - 1; i++)
std::cout << std::scientific << vec[i] << " | " ;
//Print the last item in a different format and add a new line.
std::cout << std::scientific << vec[size - 1] << std::endl;
}
//A function which will be called when there is an error.
int error(std::string msg)
{
//Print the error message.
std::cout << "Error: " << msg << std::endl;
//Print the usage message.
std::cout << std::endl << "Usage Guide:" << std::endl
<< "\t* ./a.out <Size of Vectors> <Number of Blocks> <Number of Threads>"
<< " <Output Mode>" << std::endl << "\t* Output mode is either \'q\' "
<< "(quiet) or \'v\' (verbose)" << std::endl
<< "\t* Number of blocks and threads are for the GPU." << std::endl;
//Return exit failure for passing it back to the terminal.
return EXIT_FAILURE;
}
//Main method which parses the arguments, and runs the program.
int main(int argc, char** argv)
{
//Define values for parameters.
int n, blocks, threads;
bool verbose;
//Check for invalid number of args.
if(argc != 5)
return error("Invalid number of arguments.");
//Parse the arguments.
try
{
n = std::stoi(argv[1]);
blocks = std::stoi(argv[2]);
threads = std::stoi(argv[3]);
}
catch(...) //If we get here, there was an error in the arguments.
{
return error("Invalid arguments, could not parse.");
}
//Check the print mode.
if(std::string(argv[4]) == "q" || std::string(argv[4]) == "v")
//If the mode is valid and set to v, set verbose to true, false otherwise.
verbose = (std::string(argv[4]) == "v" ? true : false);
else
//If we get here an invalid mode was passed.
return error("Invalid print mode.");
//Check for invalid threads / blocks / n sizes.
if(n < 1 || blocks < 1 || threads < 1)
return error("Invalid arguments. All parameters should be positive.");
//Check if we're gonna get overflow.
if(n > INT_MAX)
return error("Integer Overflow, please reduce N.");
//Allocate memory for the input vectors.
type* vec_a = new type[n];
type* vec_b = new type[n];
//Randomize the input vectors.
randomize(vec_a, n);
randomize(vec_b, n);
//Allocate output matrices for the sequential and cuda executions.
type* vec_c_seq = new type[n];
type* vec_c_cuda = new type[n];
//Perform the sequential addition.
double seq_time = seq_addition(vec_a, vec_b, vec_c_seq, n);
//Perform the cuda addition, and capture the timings.
double times[3];
int stat = cuda_addition(vec_a, vec_b, vec_c_cuda, n, blocks, threads, times);
//Check the status.
if(stat == EXIT_FAILURE)
return error("Failed to execute kernel.");
//Check if the cuda and sequential results are not equal (error).
if(!are_equal(vec_c_seq, vec_c_cuda, n))
{
std::cout << "Error: Output vectors were not equal." << std::endl
<< "ErrorInfo: N=" << n << " Blocks=" << blocks
<< " Threads=" << threads << std::endl;
}
//Print the timing results, and the input arguments.
std::cout << "[Cuda_Transfer_To_Device_Seconds]=" << std::scientific << times[0]
<< " [Cuda_Transfer_To_Host_Seconds]=" << std::scientific << times[2]
<< " [Cuda_Calculation_Time_Seconds]=" << std::scientific << times[1]
<< " [Sequential_Time_Seconds]=" << std::scientific << seq_time
<< " [N]=" << n << " [Blocks]=" << blocks
<< " [Threads]=" << threads
<< std::endl;
//Allocate memory for residual vector.
type* residual = new type[n];
//Check if we're in verbose output mode.
if(verbose)
{
//Calculate residual vector for sequential implementation vs cuda.
seq_subtraction(vec_c_seq, vec_c_cuda, residual, n);
//Print out the inputs, calculations and residual vector.
std::cout << std::endl << "Printing out the First Vector:" << std::endl;
dump(vec_a, n);
std::cout << "\nPrinting out the Second Vector:" << std::endl;
dump(vec_b, n);
std::cout << "\nPrinting out the Addition results (Sequential):" << std::endl;
dump(vec_c_seq, n);
std::cout << "\nPrinting out the Addition results (Cuda):" << std::endl;
dump(vec_c_cuda, n);
std::cout << "\nPrinting out the residual matrix (Seq - Cuda):" << std::endl;
dump(residual, n);
}
//Deallocate the memory in the heap.
delete[] vec_a, vec_b, vec_c_seq, vec_c_cuda, residual;
return EXIT_SUCCESS;
} | //Vector Addition using CUDA.
//Winter 2020
//High Performance Computing.
#include <string> //For stoi.
#include <iostream> //For stdout.
#include <cstdlib> //For random number generator.
#include <chrono> //For getting time.
#include <climits> //For maximum n.
#include <cmath>
#include "hip/hip_runtime.h" //For Windows support.
//The type that is used for the calculations.
typedef int type;
//Define constants for min/max.
#define RANDOMIZE_MIN -10
#define RANDOMIZE_MAX 10
#define DEVICE_NUM 0
//Cuda calculator which will run in each thread.
__global__ void cuda_calculator(type* a, type* b, type* c, int num_calcs)
{
extern __shared__ type a_shared[];
extern __shared__ type b_shared[];
extern __shared__ type c_shared[];
//Calculate the starting index.
int start_index = (threadIdx.x + blockIdx.x * blockDim.x) * num_calcs;
int end_index = start_index + num_calcs;
//Copy the data to the shared memory.
for(int i = start_index; i < end_index; i++)
{
a_shared[i] = a[i];
b_shared[i] = b[i];
}
__syncthreads();
//Add the vectors in the current thread index.
for(int i = start_index; i < end_index; i++)
c_shared[i] = b_shared[i] + c_shared[i];
//Copy the data back to the global memory.
for(int i = start_index; i < end_index; i++)
c[i] = c_shared[i];
}
//Cuda addition which runs the cuda program.
int cuda_addition(type* a, type* b, type* c, int n, int blocks,
int threads, double times[3])
{
//Create pointers for the GPU memory allocation
type* cu_vec_a;
type* cu_vec_b;
type* cu_vec_c;
//Calculate the number of elements that each kernel will handle (round up).
int num_calcs = std::ceil((double) n / (((double) blocks) * ((double) threads)));
//Calculate the padding (for output matrix to avoid conditionals in kernel.
int padding_size = (int)(num_calcs * blocks * threads) - n ;
//Allocate memory on the device for the arrays.
hipMalloc((void**) &cu_vec_a, sizeof(type) * (n + padding_size));
hipMalloc((void**) &cu_vec_b, sizeof(type) * (n + padding_size));
hipMalloc((void**) &cu_vec_c, sizeof(type) * (n + padding_size));
//Wait for the thread to finish execution.
hipDeviceSynchronize();
//Capture the beginning time before the data transfer (from host).
auto begin_transfer_to = std::chrono::high_resolution_clock::now();
//Copy the data, and the size from the main memory to VRAM.
hipMemcpy(cu_vec_a, a, ((int) sizeof(type)) * n, hipMemcpyHostToDevice);
hipMemcpy(cu_vec_b, b, ((int) sizeof(type)) * n, hipMemcpyHostToDevice);
//Wait for the thread to finish execution.
hipDeviceSynchronize();
//Calculate the total time in seconds that it took to transfer data to the device
auto total_transfer_to = std::chrono::high_resolution_clock::now() - begin_transfer_to;
times[0] = std::chrono::duration<double> (total_transfer_to).count();
//Get the device properties for optimizing the memory usage.
hipDeviceProp_t stats;
hipGetDeviceProperties(&stats, DEVICE_NUM);
//Get the shared memory size.
size_t shared_mem_size = stats.sharedMemPerBlock;
std::cerr << "Shared Mem size is " << shared_mem_size << " bytes" << std::endl;
//Capture the beginning time before the calculations.
auto begin_calcs_only = std::chrono::high_resolution_clock::now();
//Launch the addition kernel on the device.
cuda_calculator<<<blocks, threads>>>(cu_vec_a, cu_vec_b, cu_vec_c, num_calcs);
//Check if we got any errors.
if(hipGetLastError() != hipSuccess)
return EXIT_FAILURE;
//Wait for the thread to finish execution.
hipDeviceSynchronize();
//Calculate the total time in seconds that it took to calculate.
auto total_calcs_only = std::chrono::high_resolution_clock::now() - begin_calcs_only;
times[1] = std::chrono::duration<double> (total_calcs_only).count();
//Capture the beginning time before the calculations.
auto begin_transfer_from = std::chrono::high_resolution_clock::now();
//Copy the results back from Vram to main ram.
hipMemcpy(c, cu_vec_c, ((int) sizeof(type)) * n, hipMemcpyDeviceToHost);
//Wait for the thread to finish execution.
hipDeviceSynchronize();
//Calculate the total time in seconds that it took to transfer back to host.
auto total_transfer_from = std::chrono::high_resolution_clock::now() - begin_transfer_from;
times[2] = std::chrono::duration<double> (total_transfer_from).count();
//Deallocate memory in the GPU.
hipFree(cu_vec_a);
hipFree(cu_vec_b);
hipFree(cu_vec_c);
//Wait for the thread to finish execution.
hipDeviceSynchronize();
return EXIT_SUCCESS;
}
//Sequential addition function.
double seq_addition(type* a, type* b, type* c, int size)
{
//Capture the beginning time before the calculations.
auto begin = std::chrono::high_resolution_clock::now();
//Iterate over the vectors and add the elements.
for(int i = 0; i < size; i++)
c[i] = a[i] + b[i];
//Calculate and return the total time in seconds that it took to compute.
auto total = std::chrono::high_resolution_clock::now() - begin;
return std::chrono::duration<double> (total).count();;
}
//Sequential subtraction function (used for residual matrix).
void seq_subtraction(type* a, type* b, type* c, int size)
{
//Iterate over the vectors and subtract the elements.
for(int i = 0; i < size; i++)
c[i] = a[i] - b[i];
}
//Returns false if first and second aren't equal, true otherwise.
bool are_equal(type* first, type* second, int size)
{
//Iterate over and return false if not equal.
for(int i = 0; i < size; i++)
if(first[i] != second[i])
return false;
//If we get here, they were equal.
return true;
}
//A function which randomizes the vector, by defualt it only uses values between -10 - 10
void randomize(type* vec, int size, int min = RANDOMIZE_MIN, int max = RANDOMIZE_MAX)
{
//Perform this to ensure the random number generation is truly random.
std::srand(std::chrono::system_clock::now().time_since_epoch().count());
//Iterate through, and generate random numbers for each index.
for(int i = 0; i < size; i++)
vec[i] = ((type) std::rand() %
(type) (RANDOMIZE_MAX * 2) + (type) RANDOMIZE_MIN) % RANDOMIZE_MAX ;
}
//Print the given vector to stdout.
void dump(type* vec, int size)
{
//Iterate through, and generate random numbers for each index.
for(int i = 0; i < size - 1; i++)
std::cout << std::scientific << vec[i] << " | " ;
//Print the last item in a different format and add a new line.
std::cout << std::scientific << vec[size - 1] << std::endl;
}
//A function which will be called when there is an error.
int error(std::string msg)
{
//Print the error message.
std::cout << "Error: " << msg << std::endl;
//Print the usage message.
std::cout << std::endl << "Usage Guide:" << std::endl
<< "\t* ./a.out <Size of Vectors> <Number of Blocks> <Number of Threads>"
<< " <Output Mode>" << std::endl << "\t* Output mode is either \'q\' "
<< "(quiet) or \'v\' (verbose)" << std::endl
<< "\t* Number of blocks and threads are for the GPU." << std::endl;
//Return exit failure for passing it back to the terminal.
return EXIT_FAILURE;
}
//Main method which parses the arguments, and runs the program.
int main(int argc, char** argv)
{
//Define values for parameters.
int n, blocks, threads;
bool verbose;
//Check for invalid number of args.
if(argc != 5)
return error("Invalid number of arguments.");
//Parse the arguments.
try
{
n = std::stoi(argv[1]);
blocks = std::stoi(argv[2]);
threads = std::stoi(argv[3]);
}
catch(...) //If we get here, there was an error in the arguments.
{
return error("Invalid arguments, could not parse.");
}
//Check the print mode.
if(std::string(argv[4]) == "q" || std::string(argv[4]) == "v")
//If the mode is valid and set to v, set verbose to true, false otherwise.
verbose = (std::string(argv[4]) == "v" ? true : false);
else
//If we get here an invalid mode was passed.
return error("Invalid print mode.");
//Check for invalid threads / blocks / n sizes.
if(n < 1 || blocks < 1 || threads < 1)
return error("Invalid arguments. All parameters should be positive.");
//Check if we're gonna get overflow.
if(n > INT_MAX)
return error("Integer Overflow, please reduce N.");
//Allocate memory for the input vectors.
type* vec_a = new type[n];
type* vec_b = new type[n];
//Randomize the input vectors.
randomize(vec_a, n);
randomize(vec_b, n);
//Allocate output matrices for the sequential and cuda executions.
type* vec_c_seq = new type[n];
type* vec_c_cuda = new type[n];
//Perform the sequential addition.
double seq_time = seq_addition(vec_a, vec_b, vec_c_seq, n);
//Perform the cuda addition, and capture the timings.
double times[3];
int stat = cuda_addition(vec_a, vec_b, vec_c_cuda, n, blocks, threads, times);
//Check the status.
if(stat == EXIT_FAILURE)
return error("Failed to execute kernel.");
//Check if the cuda and sequential results are not equal (error).
if(!are_equal(vec_c_seq, vec_c_cuda, n))
{
std::cout << "Error: Output vectors were not equal." << std::endl
<< "ErrorInfo: N=" << n << " Blocks=" << blocks
<< " Threads=" << threads << std::endl;
}
//Print the timing results, and the input arguments.
std::cout << "[Cuda_Transfer_To_Device_Seconds]=" << std::scientific << times[0]
<< " [Cuda_Transfer_To_Host_Seconds]=" << std::scientific << times[2]
<< " [Cuda_Calculation_Time_Seconds]=" << std::scientific << times[1]
<< " [Sequential_Time_Seconds]=" << std::scientific << seq_time
<< " [N]=" << n << " [Blocks]=" << blocks
<< " [Threads]=" << threads
<< std::endl;
//Allocate memory for residual vector.
type* residual = new type[n];
//Check if we're in verbose output mode.
if(verbose)
{
//Calculate residual vector for sequential implementation vs cuda.
seq_subtraction(vec_c_seq, vec_c_cuda, residual, n);
//Print out the inputs, calculations and residual vector.
std::cout << std::endl << "Printing out the First Vector:" << std::endl;
dump(vec_a, n);
std::cout << "\nPrinting out the Second Vector:" << std::endl;
dump(vec_b, n);
std::cout << "\nPrinting out the Addition results (Sequential):" << std::endl;
dump(vec_c_seq, n);
std::cout << "\nPrinting out the Addition results (Cuda):" << std::endl;
dump(vec_c_cuda, n);
std::cout << "\nPrinting out the residual matrix (Seq - Cuda):" << std::endl;
dump(residual, n);
}
//Deallocate the memory in the heap.
delete[] vec_a, vec_b, vec_c_seq, vec_c_cuda, residual;
return EXIT_SUCCESS;
} |
You are a helpful coding assistant specialized in converting HIP source code to AMD device assembly. | //Vector Addition using CUDA.
//Winter 2020
//High Performance Computing.
#include <string> //For stoi.
#include <iostream> //For stdout.
#include <cstdlib> //For random number generator.
#include <chrono> //For getting time.
#include <climits> //For maximum n.
#include <cmath>
#include "hip/hip_runtime.h" //For Windows support.
//The type that is used for the calculations.
typedef int type;
//Define constants for min/max.
#define RANDOMIZE_MIN -10
#define RANDOMIZE_MAX 10
#define DEVICE_NUM 0
//Cuda calculator which will run in each thread.
__global__ void cuda_calculator(type* a, type* b, type* c, int num_calcs)
{
extern __shared__ type a_shared[];
extern __shared__ type b_shared[];
extern __shared__ type c_shared[];
//Calculate the starting index.
int start_index = (threadIdx.x + blockIdx.x * blockDim.x) * num_calcs;
int end_index = start_index + num_calcs;
//Copy the data to the shared memory.
for(int i = start_index; i < end_index; i++)
{
a_shared[i] = a[i];
b_shared[i] = b[i];
}
__syncthreads();
//Add the vectors in the current thread index.
for(int i = start_index; i < end_index; i++)
c_shared[i] = b_shared[i] + c_shared[i];
//Copy the data back to the global memory.
for(int i = start_index; i < end_index; i++)
c[i] = c_shared[i];
}
//Cuda addition which runs the cuda program.
int cuda_addition(type* a, type* b, type* c, int n, int blocks,
int threads, double times[3])
{
//Create pointers for the GPU memory allocation
type* cu_vec_a;
type* cu_vec_b;
type* cu_vec_c;
//Calculate the number of elements that each kernel will handle (round up).
int num_calcs = std::ceil((double) n / (((double) blocks) * ((double) threads)));
//Calculate the padding (for output matrix to avoid conditionals in kernel.
int padding_size = (int)(num_calcs * blocks * threads) - n ;
//Allocate memory on the device for the arrays.
hipMalloc((void**) &cu_vec_a, sizeof(type) * (n + padding_size));
hipMalloc((void**) &cu_vec_b, sizeof(type) * (n + padding_size));
hipMalloc((void**) &cu_vec_c, sizeof(type) * (n + padding_size));
//Wait for the thread to finish execution.
hipDeviceSynchronize();
//Capture the beginning time before the data transfer (from host).
auto begin_transfer_to = std::chrono::high_resolution_clock::now();
//Copy the data, and the size from the main memory to VRAM.
hipMemcpy(cu_vec_a, a, ((int) sizeof(type)) * n, hipMemcpyHostToDevice);
hipMemcpy(cu_vec_b, b, ((int) sizeof(type)) * n, hipMemcpyHostToDevice);
//Wait for the thread to finish execution.
hipDeviceSynchronize();
//Calculate the total time in seconds that it took to transfer data to the device
auto total_transfer_to = std::chrono::high_resolution_clock::now() - begin_transfer_to;
times[0] = std::chrono::duration<double> (total_transfer_to).count();
//Get the device properties for optimizing the memory usage.
hipDeviceProp_t stats;
hipGetDeviceProperties(&stats, DEVICE_NUM);
//Get the shared memory size.
size_t shared_mem_size = stats.sharedMemPerBlock;
std::cerr << "Shared Mem size is " << shared_mem_size << " bytes" << std::endl;
//Capture the beginning time before the calculations.
auto begin_calcs_only = std::chrono::high_resolution_clock::now();
//Launch the addition kernel on the device.
cuda_calculator<<<blocks, threads>>>(cu_vec_a, cu_vec_b, cu_vec_c, num_calcs);
//Check if we got any errors.
if(hipGetLastError() != hipSuccess)
return EXIT_FAILURE;
//Wait for the thread to finish execution.
hipDeviceSynchronize();
//Calculate the total time in seconds that it took to calculate.
auto total_calcs_only = std::chrono::high_resolution_clock::now() - begin_calcs_only;
times[1] = std::chrono::duration<double> (total_calcs_only).count();
//Capture the beginning time before the calculations.
auto begin_transfer_from = std::chrono::high_resolution_clock::now();
//Copy the results back from Vram to main ram.
hipMemcpy(c, cu_vec_c, ((int) sizeof(type)) * n, hipMemcpyDeviceToHost);
//Wait for the thread to finish execution.
hipDeviceSynchronize();
//Calculate the total time in seconds that it took to transfer back to host.
auto total_transfer_from = std::chrono::high_resolution_clock::now() - begin_transfer_from;
times[2] = std::chrono::duration<double> (total_transfer_from).count();
//Deallocate memory in the GPU.
hipFree(cu_vec_a);
hipFree(cu_vec_b);
hipFree(cu_vec_c);
//Wait for the thread to finish execution.
hipDeviceSynchronize();
return EXIT_SUCCESS;
}
//Sequential addition function.
double seq_addition(type* a, type* b, type* c, int size)
{
//Capture the beginning time before the calculations.
auto begin = std::chrono::high_resolution_clock::now();
//Iterate over the vectors and add the elements.
for(int i = 0; i < size; i++)
c[i] = a[i] + b[i];
//Calculate and return the total time in seconds that it took to compute.
auto total = std::chrono::high_resolution_clock::now() - begin;
return std::chrono::duration<double> (total).count();;
}
//Sequential subtraction function (used for residual matrix).
void seq_subtraction(type* a, type* b, type* c, int size)
{
//Iterate over the vectors and subtract the elements.
for(int i = 0; i < size; i++)
c[i] = a[i] - b[i];
}
//Returns false if first and second aren't equal, true otherwise.
bool are_equal(type* first, type* second, int size)
{
//Iterate over and return false if not equal.
for(int i = 0; i < size; i++)
if(first[i] != second[i])
return false;
//If we get here, they were equal.
return true;
}
//A function which randomizes the vector, by defualt it only uses values between -10 - 10
void randomize(type* vec, int size, int min = RANDOMIZE_MIN, int max = RANDOMIZE_MAX)
{
//Perform this to ensure the random number generation is truly random.
std::srand(std::chrono::system_clock::now().time_since_epoch().count());
//Iterate through, and generate random numbers for each index.
for(int i = 0; i < size; i++)
vec[i] = ((type) std::rand() %
(type) (RANDOMIZE_MAX * 2) + (type) RANDOMIZE_MIN) % RANDOMIZE_MAX ;
}
//Print the given vector to stdout.
void dump(type* vec, int size)
{
//Iterate through, and generate random numbers for each index.
for(int i = 0; i < size - 1; i++)
std::cout << std::scientific << vec[i] << " | " ;
//Print the last item in a different format and add a new line.
std::cout << std::scientific << vec[size - 1] << std::endl;
}
//A function which will be called when there is an error.
int error(std::string msg)
{
//Print the error message.
std::cout << "Error: " << msg << std::endl;
//Print the usage message.
std::cout << std::endl << "Usage Guide:" << std::endl
<< "\t* ./a.out <Size of Vectors> <Number of Blocks> <Number of Threads>"
<< " <Output Mode>" << std::endl << "\t* Output mode is either \'q\' "
<< "(quiet) or \'v\' (verbose)" << std::endl
<< "\t* Number of blocks and threads are for the GPU." << std::endl;
//Return exit failure for passing it back to the terminal.
return EXIT_FAILURE;
}
//Main method which parses the arguments, and runs the program.
int main(int argc, char** argv)
{
//Define values for parameters.
int n, blocks, threads;
bool verbose;
//Check for invalid number of args.
if(argc != 5)
return error("Invalid number of arguments.");
//Parse the arguments.
try
{
n = std::stoi(argv[1]);
blocks = std::stoi(argv[2]);
threads = std::stoi(argv[3]);
}
catch(...) //If we get here, there was an error in the arguments.
{
return error("Invalid arguments, could not parse.");
}
//Check the print mode.
if(std::string(argv[4]) == "q" || std::string(argv[4]) == "v")
//If the mode is valid and set to v, set verbose to true, false otherwise.
verbose = (std::string(argv[4]) == "v" ? true : false);
else
//If we get here an invalid mode was passed.
return error("Invalid print mode.");
//Check for invalid threads / blocks / n sizes.
if(n < 1 || blocks < 1 || threads < 1)
return error("Invalid arguments. All parameters should be positive.");
//Check if we're gonna get overflow.
if(n > INT_MAX)
return error("Integer Overflow, please reduce N.");
//Allocate memory for the input vectors.
type* vec_a = new type[n];
type* vec_b = new type[n];
//Randomize the input vectors.
randomize(vec_a, n);
randomize(vec_b, n);
//Allocate output matrices for the sequential and cuda executions.
type* vec_c_seq = new type[n];
type* vec_c_cuda = new type[n];
//Perform the sequential addition.
double seq_time = seq_addition(vec_a, vec_b, vec_c_seq, n);
//Perform the cuda addition, and capture the timings.
double times[3];
int stat = cuda_addition(vec_a, vec_b, vec_c_cuda, n, blocks, threads, times);
//Check the status.
if(stat == EXIT_FAILURE)
return error("Failed to execute kernel.");
//Check if the cuda and sequential results are not equal (error).
if(!are_equal(vec_c_seq, vec_c_cuda, n))
{
std::cout << "Error: Output vectors were not equal." << std::endl
<< "ErrorInfo: N=" << n << " Blocks=" << blocks
<< " Threads=" << threads << std::endl;
}
//Print the timing results, and the input arguments.
std::cout << "[Cuda_Transfer_To_Device_Seconds]=" << std::scientific << times[0]
<< " [Cuda_Transfer_To_Host_Seconds]=" << std::scientific << times[2]
<< " [Cuda_Calculation_Time_Seconds]=" << std::scientific << times[1]
<< " [Sequential_Time_Seconds]=" << std::scientific << seq_time
<< " [N]=" << n << " [Blocks]=" << blocks
<< " [Threads]=" << threads
<< std::endl;
//Allocate memory for residual vector.
type* residual = new type[n];
//Check if we're in verbose output mode.
if(verbose)
{
//Calculate residual vector for sequential implementation vs cuda.
seq_subtraction(vec_c_seq, vec_c_cuda, residual, n);
//Print out the inputs, calculations and residual vector.
std::cout << std::endl << "Printing out the First Vector:" << std::endl;
dump(vec_a, n);
std::cout << "\nPrinting out the Second Vector:" << std::endl;
dump(vec_b, n);
std::cout << "\nPrinting out the Addition results (Sequential):" << std::endl;
dump(vec_c_seq, n);
std::cout << "\nPrinting out the Addition results (Cuda):" << std::endl;
dump(vec_c_cuda, n);
std::cout << "\nPrinting out the residual matrix (Seq - Cuda):" << std::endl;
dump(residual, n);
}
//Deallocate the memory in the heap.
delete[] vec_a, vec_b, vec_c_seq, vec_c_cuda, residual;
return EXIT_SUCCESS;
} | .text
.amdgcn_target "amdgcn-amd-amdhsa--gfx1100"
.protected _Z15cuda_calculatorPiS_S_i
.globl _Z15cuda_calculatorPiS_S_i
.p2align 8
.type _Z15cuda_calculatorPiS_S_i,@function
_Z15cuda_calculatorPiS_S_i:
s_clause 0x1
s_load_b32 s3, s[0:1], 0x2c
s_load_b32 s2, s[0:1], 0x18
s_waitcnt lgkmcnt(0)
s_and_b32 s3, s3, 0xffff
s_cmp_lt_i32 s2, 1
v_mad_u64_u32 v[2:3], null, s15, s3, v[0:1]
s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
v_mul_lo_u32 v0, v2, s2
v_add_nc_u32_e32 v7, s2, v0
v_ashrrev_i32_e32 v1, 31, v0
s_cbranch_scc1 .LBB0_4
s_load_b128 s[4:7], s[0:1], 0x0
s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_3) | instid1(VALU_DEP_2)
v_lshlrev_b64 v[5:6], 2, v[0:1]
v_lshl_add_u32 v8, v0, 2, 0
v_mov_b32_e32 v10, v0
s_mov_b32 s3, 0
v_mov_b32_e32 v9, v8
s_waitcnt lgkmcnt(0)
v_add_co_u32 v3, vcc_lo, s4, v5
v_add_co_ci_u32_e32 v4, vcc_lo, s5, v6, vcc_lo
v_add_co_u32 v5, vcc_lo, s6, v5
v_add_co_ci_u32_e32 v6, vcc_lo, s7, v6, vcc_lo
.p2align 6
.LBB0_2:
global_load_b32 v11, v[3:4], off
global_load_b32 v12, v[5:6], off
v_add_co_u32 v3, vcc_lo, v3, 4
v_add_nc_u32_e32 v10, 1, v10
v_add_co_ci_u32_e32 v4, vcc_lo, 0, v4, vcc_lo
v_add_co_u32 v5, vcc_lo, v5, 4
v_add_co_ci_u32_e32 v6, vcc_lo, 0, v6, vcc_lo
s_delay_alu instid0(VALU_DEP_4)
v_cmp_ge_i32_e32 vcc_lo, v10, v7
s_waitcnt vmcnt(1)
ds_store_b32 v9, v11
s_waitcnt vmcnt(0)
ds_store_b32 v8, v12
v_add_nc_u32_e32 v9, 4, v9
v_add_nc_u32_e32 v8, 4, v8
s_or_b32 s3, vcc_lo, s3
s_delay_alu instid0(SALU_CYCLE_1)
s_and_not1_b32 exec_lo, exec_lo, s3
s_cbranch_execnz .LBB0_2
s_or_b32 exec_lo, exec_lo, s3
.LBB0_4:
s_cmp_lt_i32 s2, 1
s_waitcnt lgkmcnt(0)
s_barrier
buffer_gl0_inv
s_cbranch_scc1 .LBB0_8
v_mul_lo_u32 v2, v2, s2
s_mov_b32 s3, 0
v_mov_b32_e32 v4, v0
s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
v_lshl_add_u32 v2, v2, 2, 0
v_mov_b32_e32 v3, v2
.LBB0_6:
ds_load_b32 v5, v3
ds_load_b32 v6, v2
v_add_nc_u32_e32 v4, 1, v4
v_add_nc_u32_e32 v3, 4, v3
s_delay_alu instid0(VALU_DEP_2)
v_cmp_ge_i32_e32 vcc_lo, v4, v7
s_or_b32 s3, vcc_lo, s3
s_waitcnt lgkmcnt(0)
v_add_nc_u32_e32 v5, v6, v5
ds_store_b32 v2, v5
v_add_nc_u32_e32 v2, 4, v2
s_and_not1_b32 exec_lo, exec_lo, s3
s_cbranch_execnz .LBB0_6
s_or_b32 exec_lo, exec_lo, s3
.LBB0_8:
s_cmp_lt_i32 s2, 1
s_cbranch_scc1 .LBB0_11
s_load_b64 s[0:1], s[0:1], 0x10
v_lshlrev_b64 v[1:2], 2, v[0:1]
v_lshl_add_u32 v3, v0, 2, 0
s_waitcnt lgkmcnt(0)
s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_3)
v_add_co_u32 v1, vcc_lo, s0, v1
v_add_co_ci_u32_e32 v2, vcc_lo, s1, v2, vcc_lo
s_mov_b32 s1, 0
.LBB0_10:
ds_load_b32 v4, v3
v_add_nc_u32_e32 v0, 1, v0
v_add_nc_u32_e32 v3, 4, v3
s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_4) | instid1(VALU_DEP_1)
v_cmp_ge_i32_e32 vcc_lo, v0, v7
s_or_b32 s1, vcc_lo, s1
s_waitcnt lgkmcnt(0)
global_store_b32 v[1:2], v4, off
v_add_co_u32 v1, s0, v1, 4
v_add_co_ci_u32_e64 v2, s0, 0, v2, s0
s_and_not1_b32 exec_lo, exec_lo, s1
s_cbranch_execnz .LBB0_10
.LBB0_11:
s_nop 0
s_sendmsg sendmsg(MSG_DEALLOC_VGPRS)
s_endpgm
.section .rodata,"a",@progbits
.p2align 6, 0x0
.amdhsa_kernel _Z15cuda_calculatorPiS_S_i
.amdhsa_group_segment_fixed_size 0
.amdhsa_private_segment_fixed_size 0
.amdhsa_kernarg_size 288
.amdhsa_user_sgpr_count 15
.amdhsa_user_sgpr_dispatch_ptr 0
.amdhsa_user_sgpr_queue_ptr 0
.amdhsa_user_sgpr_kernarg_segment_ptr 1
.amdhsa_user_sgpr_dispatch_id 0
.amdhsa_user_sgpr_private_segment_size 0
.amdhsa_wavefront_size32 1
.amdhsa_uses_dynamic_stack 0
.amdhsa_enable_private_segment 0
.amdhsa_system_sgpr_workgroup_id_x 1
.amdhsa_system_sgpr_workgroup_id_y 0
.amdhsa_system_sgpr_workgroup_id_z 0
.amdhsa_system_sgpr_workgroup_info 0
.amdhsa_system_vgpr_workitem_id 0
.amdhsa_next_free_vgpr 13
.amdhsa_next_free_sgpr 16
.amdhsa_float_round_mode_32 0
.amdhsa_float_round_mode_16_64 0
.amdhsa_float_denorm_mode_32 3
.amdhsa_float_denorm_mode_16_64 3
.amdhsa_dx10_clamp 1
.amdhsa_ieee_mode 1
.amdhsa_fp16_overflow 0
.amdhsa_workgroup_processor_mode 1
.amdhsa_memory_ordered 1
.amdhsa_forward_progress 0
.amdhsa_shared_vgpr_count 0
.amdhsa_exception_fp_ieee_invalid_op 0
.amdhsa_exception_fp_denorm_src 0
.amdhsa_exception_fp_ieee_div_zero 0
.amdhsa_exception_fp_ieee_overflow 0
.amdhsa_exception_fp_ieee_underflow 0
.amdhsa_exception_fp_ieee_inexact 0
.amdhsa_exception_int_div_zero 0
.end_amdhsa_kernel
.text
.Lfunc_end0:
.size _Z15cuda_calculatorPiS_S_i, .Lfunc_end0-_Z15cuda_calculatorPiS_S_i
.section .AMDGPU.csdata,"",@progbits
.text
.p2alignl 7, 3214868480
.fill 96, 4, 3214868480
.type __hip_cuid_,@object
.section .bss,"aw",@nobits
.globl __hip_cuid_
__hip_cuid_:
.byte 0
.size __hip_cuid_, 1
.ident "AMD clang version 18.0.0git (https://github.com/RadeonOpenCompute/llvm-project roc-6.3.2 25012 e5bf7e55c91490b07c49d8960fa7983d864936c4)"
.section ".note.GNU-stack","",@progbits
.addrsig
.addrsig_sym __hip_cuid_
.amdgpu_metadata
---
amdhsa.kernels:
- .args:
- .address_space: global
.offset: 0
.size: 8
.value_kind: global_buffer
- .address_space: global
.offset: 8
.size: 8
.value_kind: global_buffer
- .address_space: global
.offset: 16
.size: 8
.value_kind: global_buffer
- .offset: 24
.size: 4
.value_kind: by_value
- .offset: 32
.size: 4
.value_kind: hidden_block_count_x
- .offset: 36
.size: 4
.value_kind: hidden_block_count_y
- .offset: 40
.size: 4
.value_kind: hidden_block_count_z
- .offset: 44
.size: 2
.value_kind: hidden_group_size_x
- .offset: 46
.size: 2
.value_kind: hidden_group_size_y
- .offset: 48
.size: 2
.value_kind: hidden_group_size_z
- .offset: 50
.size: 2
.value_kind: hidden_remainder_x
- .offset: 52
.size: 2
.value_kind: hidden_remainder_y
- .offset: 54
.size: 2
.value_kind: hidden_remainder_z
- .offset: 72
.size: 8
.value_kind: hidden_global_offset_x
- .offset: 80
.size: 8
.value_kind: hidden_global_offset_y
- .offset: 88
.size: 8
.value_kind: hidden_global_offset_z
- .offset: 96
.size: 2
.value_kind: hidden_grid_dims
- .offset: 152
.size: 4
.value_kind: hidden_dynamic_lds_size
.group_segment_fixed_size: 0
.kernarg_segment_align: 8
.kernarg_segment_size: 288
.language: OpenCL C
.language_version:
- 2
- 0
.max_flat_workgroup_size: 1024
.name: _Z15cuda_calculatorPiS_S_i
.private_segment_fixed_size: 0
.sgpr_count: 18
.sgpr_spill_count: 0
.symbol: _Z15cuda_calculatorPiS_S_i.kd
.uniform_work_group_size: 1
.uses_dynamic_stack: false
.vgpr_count: 13
.vgpr_spill_count: 0
.wavefront_size: 32
.workgroup_processor_mode: 1
amdhsa.target: amdgcn-amd-amdhsa--gfx1100
amdhsa.version:
- 1
- 2
...
.end_amdgpu_metadata |
You are a helpful coding assistant specialized in converting CUDA source code to CUDA device assembly. | #pragma once
#ifdef __INTELLISENSE__
void __syncthreads();
#endif
#include "cuda_runtime.h"
#include "device_launch_parameters.h"
#include <stdio.h>
#include <cuda.h>
#include <stdio.h>
#include <time.h>
#include <ctime>
#define BLOCK_DIM 4
#define ARRAY_SIZE 12
__global__ void maxValue(int *a, int *d)
{
__shared__ int sdata[BLOCK_DIM];
unsigned int tid = threadIdx.x;
unsigned int i = blockIdx.x * blockDim.x + threadIdx.x;
sdata[tid] = a[i];
for (unsigned int s = BLOCK_DIM / 2; s >= 1; s = s / 2)
{
if (tid < s)
{
if (sdata[tid] < sdata[tid + s])
{
sdata[tid] = sdata[tid + s];
}
}
__syncthreads();
}
if (tid == 0)
{
d[blockIdx.x] = sdata[0];
}
}
int main()
{
srand(time(NULL));
const int N = ARRAY_SIZE;
int d[ARRAY_SIZE / BLOCK_DIM], a[12] = { 1, 3, 21, 55, 2, 5, 6, 8, 87, 6, 5, 0 };
int *dev_a, *dev_d;
cudaMalloc((void **)&dev_a, N * sizeof(int));
cudaMalloc((void **)&dev_d, BLOCK_DIM * sizeof(int));
cudaMemcpy(dev_a, a, N*sizeof(int), cudaMemcpyHostToDevice);
maxValue <<< (ARRAY_SIZE + BLOCK_DIM - 1) / BLOCK_DIM, BLOCK_DIM >>>(dev_a, dev_d);
cudaDeviceSynchronize();
cudaMemcpy(d, dev_d, ARRAY_SIZE / BLOCK_DIM * sizeof(int), cudaMemcpyDeviceToHost);
for (int i = 0; i < ARRAY_SIZE / BLOCK_DIM; ++i)
printf("Max: %d\n", d[i]);
cudaFree(dev_a);
cudaFree(dev_d);
return 0;
} | code for sm_80
Function : _Z8maxValuePiS_
.headerflags @"EF_CUDA_TEXMODE_UNIFIED EF_CUDA_64BIT_ADDRESS EF_CUDA_SM80 EF_CUDA_VIRTUAL_SM(EF_CUDA_SM80)"
/*0000*/ IMAD.MOV.U32 R1, RZ, RZ, c[0x0][0x28] ; /* 0x00000a00ff017624 */
/* 0x000fe400078e00ff */
/*0010*/ S2R R5, SR_TID.X ; /* 0x0000000000057919 */
/* 0x000e220000002100 */
/*0020*/ HFMA2.MMA R7, -RZ, RZ, 0, 2.384185791015625e-07 ; /* 0x00000004ff077435 */
/* 0x000fe200000001ff */
/*0030*/ ULDC.64 UR4, c[0x0][0x118] ; /* 0x0000460000047ab9 */
/* 0x000fe40000000a00 */
/*0040*/ S2R R4, SR_CTAID.X ; /* 0x0000000000047919 */
/* 0x000e240000002500 */
/*0050*/ IMAD R2, R4, c[0x0][0x0], R5 ; /* 0x0000000004027a24 */
/* 0x001fca00078e0205 */
/*0060*/ IMAD.WIDE.U32 R2, R2, R7, c[0x0][0x160] ; /* 0x0000580002027625 */
/* 0x000fcc00078e0007 */
/*0070*/ LDG.E R2, [R2.64] ; /* 0x0000000402027981 */
/* 0x000ea2000c1e1900 */
/*0080*/ ISETP.GT.U32.AND P1, PT, R5.reuse, 0x1, PT ; /* 0x000000010500780c */
/* 0x040fe20003f24070 */
/*0090*/ BSSY B0, 0x110 ; /* 0x0000007000007945 */
/* 0x000fe20003800000 */
/*00a0*/ ISETP.NE.AND P0, PT, R5, RZ, PT ; /* 0x000000ff0500720c */
/* 0x000fe20003f05270 */
/*00b0*/ STS [R5.X4], R2 ; /* 0x0000000205007388 */
/* 0x0041f40000004800 */
/*00c0*/ @P1 BRA 0x100 ; /* 0x0000003000001947 */
/* 0x000fea0003800000 */
/*00d0*/ LDS R3, [R5.X4+0x8] ; /* 0x0000080005037984 */
/* 0x000e640000004800 */
/*00e0*/ ISETP.GE.AND P1, PT, R2, R3, PT ; /* 0x000000030200720c */
/* 0x002fda0003f26270 */
/*00f0*/ @!P1 STS [R5.X4], R3 ; /* 0x0000000305009388 */
/* 0x0003e40000004800 */
/*0100*/ BSYNC B0 ; /* 0x0000000000007941 */
/* 0x000fea0003800000 */
/*0110*/ BAR.SYNC.DEFER_BLOCKING 0x0 ; /* 0x0000000000007b1d */
/* 0x000fec0000010000 */
/*0120*/ BSSY B0, 0x190 ; /* 0x0000006000007945 */
/* 0x000fe20003800000 */
/*0130*/ @P0 BRA 0x180 ; /* 0x0000004000000947 */
/* 0x000fea0003800000 */
/*0140*/ LDS R0, [R5.X4] ; /* 0x0000000005007984 */
/* 0x000fe80000004800 */
/*0150*/ LDS R3, [0x4] ; /* 0x00000400ff037984 */
/* 0x002e640000000800 */
/*0160*/ ISETP.GE.AND P1, PT, R0, R3, PT ; /* 0x000000030000720c */
/* 0x002fda0003f26270 */
/*0170*/ @!P1 STS [R5.X4], R3 ; /* 0x0000000305009388 */
/* 0x0003e40000004800 */
/*0180*/ BSYNC B0 ; /* 0x0000000000007941 */
/* 0x000fea0003800000 */
/*0190*/ BAR.SYNC.DEFER_BLOCKING 0x0 ; /* 0x0000000000007b1d */
/* 0x000fec0000010000 */
/*01a0*/ @P0 EXIT ; /* 0x000000000000094d */
/* 0x000fea0003800000 */
/*01b0*/ LDS R5, [RZ] ; /* 0x00000000ff057984 */
/* 0x003e220000000800 */
/*01c0*/ IMAD.WIDE.U32 R2, R4, R7, c[0x0][0x168] ; /* 0x00005a0004027625 */
/* 0x000fca00078e0007 */
/*01d0*/ STG.E [R2.64], R5 ; /* 0x0000000502007986 */
/* 0x001fe2000c101904 */
/*01e0*/ EXIT ; /* 0x000000000000794d */
/* 0x000fea0003800000 */
/*01f0*/ BRA 0x1f0; /* 0xfffffff000007947 */
/* 0x000fc0000383ffff */
/*0200*/ NOP; /* 0x0000000000007918 */
/* 0x000fc00000000000 */
/*0210*/ NOP; /* 0x0000000000007918 */
/* 0x000fc00000000000 */
/*0220*/ NOP; /* 0x0000000000007918 */
/* 0x000fc00000000000 */
/*0230*/ NOP; /* 0x0000000000007918 */
/* 0x000fc00000000000 */
/*0240*/ NOP; /* 0x0000000000007918 */
/* 0x000fc00000000000 */
/*0250*/ NOP; /* 0x0000000000007918 */
/* 0x000fc00000000000 */
/*0260*/ NOP; /* 0x0000000000007918 */
/* 0x000fc00000000000 */
/*0270*/ NOP; /* 0x0000000000007918 */
/* 0x000fc00000000000 */
.......... |
You are a helpful coding assistant specialized in converting CUDA source code to CUDA host assembly. | #pragma once
#ifdef __INTELLISENSE__
void __syncthreads();
#endif
#include "cuda_runtime.h"
#include "device_launch_parameters.h"
#include <stdio.h>
#include <cuda.h>
#include <stdio.h>
#include <time.h>
#include <ctime>
#define BLOCK_DIM 4
#define ARRAY_SIZE 12
__global__ void maxValue(int *a, int *d)
{
__shared__ int sdata[BLOCK_DIM];
unsigned int tid = threadIdx.x;
unsigned int i = blockIdx.x * blockDim.x + threadIdx.x;
sdata[tid] = a[i];
for (unsigned int s = BLOCK_DIM / 2; s >= 1; s = s / 2)
{
if (tid < s)
{
if (sdata[tid] < sdata[tid + s])
{
sdata[tid] = sdata[tid + s];
}
}
__syncthreads();
}
if (tid == 0)
{
d[blockIdx.x] = sdata[0];
}
}
int main()
{
srand(time(NULL));
const int N = ARRAY_SIZE;
int d[ARRAY_SIZE / BLOCK_DIM], a[12] = { 1, 3, 21, 55, 2, 5, 6, 8, 87, 6, 5, 0 };
int *dev_a, *dev_d;
cudaMalloc((void **)&dev_a, N * sizeof(int));
cudaMalloc((void **)&dev_d, BLOCK_DIM * sizeof(int));
cudaMemcpy(dev_a, a, N*sizeof(int), cudaMemcpyHostToDevice);
maxValue <<< (ARRAY_SIZE + BLOCK_DIM - 1) / BLOCK_DIM, BLOCK_DIM >>>(dev_a, dev_d);
cudaDeviceSynchronize();
cudaMemcpy(d, dev_d, ARRAY_SIZE / BLOCK_DIM * sizeof(int), cudaMemcpyDeviceToHost);
for (int i = 0; i < ARRAY_SIZE / BLOCK_DIM; ++i)
printf("Max: %d\n", d[i]);
cudaFree(dev_a);
cudaFree(dev_d);
return 0;
} | .file "tmpxft_0016c829_00000000-6_kernel.cudafe1.cpp"
.text
#APP
#NO_APP
.type _ZL26__cudaUnregisterBinaryUtilv, @function
_ZL26__cudaUnregisterBinaryUtilv:
.LFB2060:
.cfi_startproc
endbr64
subq $8, %rsp
.cfi_def_cfa_offset 16
movq _ZL20__cudaFatCubinHandle(%rip), %rdi
call __cudaUnregisterFatBinary@PLT
addq $8, %rsp
.cfi_def_cfa_offset 8
ret
.cfi_endproc
.LFE2060:
.size _ZL26__cudaUnregisterBinaryUtilv, .-_ZL26__cudaUnregisterBinaryUtilv
.globl _Z29__device_stub__Z8maxValuePiS_PiS_
.type _Z29__device_stub__Z8maxValuePiS_PiS_, @function
_Z29__device_stub__Z8maxValuePiS_PiS_:
.LFB2082:
.cfi_startproc
endbr64
subq $120, %rsp
.cfi_def_cfa_offset 128
movq %rdi, 8(%rsp)
movq %rsi, (%rsp)
movq %fs:40, %rax
movq %rax, 104(%rsp)
xorl %eax, %eax
leaq 8(%rsp), %rax
movq %rax, 80(%rsp)
movq %rsp, %rax
movq %rax, 88(%rsp)
movl $1, 32(%rsp)
movl $1, 36(%rsp)
movl $1, 40(%rsp)
movl $1, 44(%rsp)
movl $1, 48(%rsp)
movl $1, 52(%rsp)
leaq 24(%rsp), %rcx
leaq 16(%rsp), %rdx
leaq 44(%rsp), %rsi
leaq 32(%rsp), %rdi
call __cudaPopCallConfiguration@PLT
testl %eax, %eax
je .L7
.L3:
movq 104(%rsp), %rax
subq %fs:40, %rax
jne .L8
addq $120, %rsp
.cfi_remember_state
.cfi_def_cfa_offset 8
ret
.L7:
.cfi_restore_state
pushq 24(%rsp)
.cfi_def_cfa_offset 136
pushq 24(%rsp)
.cfi_def_cfa_offset 144
leaq 96(%rsp), %r9
movq 60(%rsp), %rcx
movl 68(%rsp), %r8d
movq 48(%rsp), %rsi
movl 56(%rsp), %edx
leaq _Z8maxValuePiS_(%rip), %rdi
call cudaLaunchKernel@PLT
addq $16, %rsp
.cfi_def_cfa_offset 128
jmp .L3
.L8:
call __stack_chk_fail@PLT
.cfi_endproc
.LFE2082:
.size _Z29__device_stub__Z8maxValuePiS_PiS_, .-_Z29__device_stub__Z8maxValuePiS_PiS_
.globl _Z8maxValuePiS_
.type _Z8maxValuePiS_, @function
_Z8maxValuePiS_:
.LFB2083:
.cfi_startproc
endbr64
subq $8, %rsp
.cfi_def_cfa_offset 16
call _Z29__device_stub__Z8maxValuePiS_PiS_
addq $8, %rsp
.cfi_def_cfa_offset 8
ret
.cfi_endproc
.LFE2083:
.size _Z8maxValuePiS_, .-_Z8maxValuePiS_
.section .rodata.str1.1,"aMS",@progbits,1
.LC0:
.string "Max: %d\n"
.text
.globl main
.type main, @function
main:
.LFB2057:
.cfi_startproc
endbr64
pushq %r12
.cfi_def_cfa_offset 16
.cfi_offset 12, -16
pushq %rbp
.cfi_def_cfa_offset 24
.cfi_offset 6, -24
pushq %rbx
.cfi_def_cfa_offset 32
.cfi_offset 3, -32
addq $-128, %rsp
.cfi_def_cfa_offset 160
movq %fs:40, %rax
movq %rax, 120(%rsp)
xorl %eax, %eax
movl $0, %edi
call time@PLT
movl %eax, %edi
call srand@PLT
movl $1, 64(%rsp)
movl $3, 68(%rsp)
movl $21, 72(%rsp)
movl $55, 76(%rsp)
movl $2, 80(%rsp)
movl $5, 84(%rsp)
movl $6, 88(%rsp)
movl $8, 92(%rsp)
movl $87, 96(%rsp)
movl $6, 100(%rsp)
movl $5, 104(%rsp)
movl $0, 108(%rsp)
leaq 8(%rsp), %rdi
movl $48, %esi
call cudaMalloc@PLT
leaq 16(%rsp), %rdi
movl $16, %esi
call cudaMalloc@PLT
leaq 64(%rsp), %rsi
movl $1, %ecx
movl $48, %edx
movq 8(%rsp), %rdi
call cudaMemcpy@PLT
movl $4, 40(%rsp)
movl $1, 44(%rsp)
movl $1, 48(%rsp)
movl $3, 28(%rsp)
movl $1, 32(%rsp)
movl $1, 36(%rsp)
movl $0, %r9d
movl $0, %r8d
movq 40(%rsp), %rdx
movl $1, %ecx
movq 28(%rsp), %rdi
movl $1, %esi
call __cudaPushCallConfiguration@PLT
testl %eax, %eax
je .L17
.L12:
call cudaDeviceSynchronize@PLT
leaq 52(%rsp), %rbx
movl $2, %ecx
movl $12, %edx
movq 16(%rsp), %rsi
movq %rbx, %rdi
call cudaMemcpy@PLT
leaq 64(%rsp), %r12
leaq .LC0(%rip), %rbp
.L13:
movl (%rbx), %edx
movq %rbp, %rsi
movl $2, %edi
movl $0, %eax
call __printf_chk@PLT
addq $4, %rbx
cmpq %r12, %rbx
jne .L13
movq 8(%rsp), %rdi
call cudaFree@PLT
movq 16(%rsp), %rdi
call cudaFree@PLT
movq 120(%rsp), %rax
subq %fs:40, %rax
jne .L18
movl $0, %eax
subq $-128, %rsp
.cfi_remember_state
.cfi_def_cfa_offset 32
popq %rbx
.cfi_def_cfa_offset 24
popq %rbp
.cfi_def_cfa_offset 16
popq %r12
.cfi_def_cfa_offset 8
ret
.L17:
.cfi_restore_state
movq 16(%rsp), %rsi
movq 8(%rsp), %rdi
call _Z29__device_stub__Z8maxValuePiS_PiS_
jmp .L12
.L18:
call __stack_chk_fail@PLT
.cfi_endproc
.LFE2057:
.size main, .-main
.section .rodata.str1.1
.LC1:
.string "_Z8maxValuePiS_"
.text
.type _ZL24__sti____cudaRegisterAllv, @function
_ZL24__sti____cudaRegisterAllv:
.LFB2085:
.cfi_startproc
endbr64
subq $8, %rsp
.cfi_def_cfa_offset 16
leaq _ZL15__fatDeviceText(%rip), %rdi
call __cudaRegisterFatBinary@PLT
movq %rax, %rdi
movq %rax, _ZL20__cudaFatCubinHandle(%rip)
pushq $0
.cfi_def_cfa_offset 24
pushq $0
.cfi_def_cfa_offset 32
pushq $0
.cfi_def_cfa_offset 40
pushq $0
.cfi_def_cfa_offset 48
movl $0, %r9d
movl $-1, %r8d
leaq .LC1(%rip), %rdx
movq %rdx, %rcx
leaq _Z8maxValuePiS_(%rip), %rsi
call __cudaRegisterFunction@PLT
addq $32, %rsp
.cfi_def_cfa_offset 16
movq _ZL20__cudaFatCubinHandle(%rip), %rdi
call __cudaRegisterFatBinaryEnd@PLT
leaq _ZL26__cudaUnregisterBinaryUtilv(%rip), %rdi
call atexit@PLT
addq $8, %rsp
.cfi_def_cfa_offset 8
ret
.cfi_endproc
.LFE2085:
.size _ZL24__sti____cudaRegisterAllv, .-_ZL24__sti____cudaRegisterAllv
.section .init_array,"aw"
.align 8
.quad _ZL24__sti____cudaRegisterAllv
.section .nvFatBinSegment,"aw"
.align 8
.type _ZL15__fatDeviceText, @object
.size _ZL15__fatDeviceText, 24
_ZL15__fatDeviceText:
.long 1180844977
.long 1
.quad fatbinData
.quad 0
.local _ZL20__cudaFatCubinHandle
.comm _ZL20__cudaFatCubinHandle,8,8
.ident "GCC: (Ubuntu 13.3.0-6ubuntu2~24.04) 13.3.0"
.section .note.GNU-stack,"",@progbits
.section .note.gnu.property,"a"
.align 8
.long 1f - 0f
.long 4f - 1f
.long 5
0:
.string "GNU"
1:
.align 8
.long 0xc0000002
.long 3f - 2f
2:
.long 0x3
3:
.align 8
4: |
You are a helpful coding assistant specialized in converting CUDA source code to HIP/AMD source code. | #pragma once
#ifdef __INTELLISENSE__
void __syncthreads();
#endif
#include "cuda_runtime.h"
#include "device_launch_parameters.h"
#include <stdio.h>
#include <cuda.h>
#include <stdio.h>
#include <time.h>
#include <ctime>
#define BLOCK_DIM 4
#define ARRAY_SIZE 12
__global__ void maxValue(int *a, int *d)
{
__shared__ int sdata[BLOCK_DIM];
unsigned int tid = threadIdx.x;
unsigned int i = blockIdx.x * blockDim.x + threadIdx.x;
sdata[tid] = a[i];
for (unsigned int s = BLOCK_DIM / 2; s >= 1; s = s / 2)
{
if (tid < s)
{
if (sdata[tid] < sdata[tid + s])
{
sdata[tid] = sdata[tid + s];
}
}
__syncthreads();
}
if (tid == 0)
{
d[blockIdx.x] = sdata[0];
}
}
int main()
{
srand(time(NULL));
const int N = ARRAY_SIZE;
int d[ARRAY_SIZE / BLOCK_DIM], a[12] = { 1, 3, 21, 55, 2, 5, 6, 8, 87, 6, 5, 0 };
int *dev_a, *dev_d;
cudaMalloc((void **)&dev_a, N * sizeof(int));
cudaMalloc((void **)&dev_d, BLOCK_DIM * sizeof(int));
cudaMemcpy(dev_a, a, N*sizeof(int), cudaMemcpyHostToDevice);
maxValue <<< (ARRAY_SIZE + BLOCK_DIM - 1) / BLOCK_DIM, BLOCK_DIM >>>(dev_a, dev_d);
cudaDeviceSynchronize();
cudaMemcpy(d, dev_d, ARRAY_SIZE / BLOCK_DIM * sizeof(int), cudaMemcpyDeviceToHost);
for (int i = 0; i < ARRAY_SIZE / BLOCK_DIM; ++i)
printf("Max: %d\n", d[i]);
cudaFree(dev_a);
cudaFree(dev_d);
return 0;
} | #pragma once
#ifdef __INTELLISENSE__
void __syncthreads();
#endif
#include "hip/hip_runtime.h"
#include <stdio.h>
#include <stdio.h>
#include <time.h>
#include <ctime>
#define BLOCK_DIM 4
#define ARRAY_SIZE 12
__global__ void maxValue(int *a, int *d)
{
__shared__ int sdata[BLOCK_DIM];
unsigned int tid = threadIdx.x;
unsigned int i = blockIdx.x * blockDim.x + threadIdx.x;
sdata[tid] = a[i];
for (unsigned int s = BLOCK_DIM / 2; s >= 1; s = s / 2)
{
if (tid < s)
{
if (sdata[tid] < sdata[tid + s])
{
sdata[tid] = sdata[tid + s];
}
}
__syncthreads();
}
if (tid == 0)
{
d[blockIdx.x] = sdata[0];
}
}
int main()
{
srand(time(NULL));
const int N = ARRAY_SIZE;
int d[ARRAY_SIZE / BLOCK_DIM], a[12] = { 1, 3, 21, 55, 2, 5, 6, 8, 87, 6, 5, 0 };
int *dev_a, *dev_d;
hipMalloc((void **)&dev_a, N * sizeof(int));
hipMalloc((void **)&dev_d, BLOCK_DIM * sizeof(int));
hipMemcpy(dev_a, a, N*sizeof(int), hipMemcpyHostToDevice);
maxValue <<< (ARRAY_SIZE + BLOCK_DIM - 1) / BLOCK_DIM, BLOCK_DIM >>>(dev_a, dev_d);
hipDeviceSynchronize();
hipMemcpy(d, dev_d, ARRAY_SIZE / BLOCK_DIM * sizeof(int), hipMemcpyDeviceToHost);
for (int i = 0; i < ARRAY_SIZE / BLOCK_DIM; ++i)
printf("Max: %d\n", d[i]);
hipFree(dev_a);
hipFree(dev_d);
return 0;
} |
You are a helpful coding assistant specialized in converting HIP source code to AMD device assembly. | #pragma once
#ifdef __INTELLISENSE__
void __syncthreads();
#endif
#include "hip/hip_runtime.h"
#include <stdio.h>
#include <stdio.h>
#include <time.h>
#include <ctime>
#define BLOCK_DIM 4
#define ARRAY_SIZE 12
__global__ void maxValue(int *a, int *d)
{
__shared__ int sdata[BLOCK_DIM];
unsigned int tid = threadIdx.x;
unsigned int i = blockIdx.x * blockDim.x + threadIdx.x;
sdata[tid] = a[i];
for (unsigned int s = BLOCK_DIM / 2; s >= 1; s = s / 2)
{
if (tid < s)
{
if (sdata[tid] < sdata[tid + s])
{
sdata[tid] = sdata[tid + s];
}
}
__syncthreads();
}
if (tid == 0)
{
d[blockIdx.x] = sdata[0];
}
}
int main()
{
srand(time(NULL));
const int N = ARRAY_SIZE;
int d[ARRAY_SIZE / BLOCK_DIM], a[12] = { 1, 3, 21, 55, 2, 5, 6, 8, 87, 6, 5, 0 };
int *dev_a, *dev_d;
hipMalloc((void **)&dev_a, N * sizeof(int));
hipMalloc((void **)&dev_d, BLOCK_DIM * sizeof(int));
hipMemcpy(dev_a, a, N*sizeof(int), hipMemcpyHostToDevice);
maxValue <<< (ARRAY_SIZE + BLOCK_DIM - 1) / BLOCK_DIM, BLOCK_DIM >>>(dev_a, dev_d);
hipDeviceSynchronize();
hipMemcpy(d, dev_d, ARRAY_SIZE / BLOCK_DIM * sizeof(int), hipMemcpyDeviceToHost);
for (int i = 0; i < ARRAY_SIZE / BLOCK_DIM; ++i)
printf("Max: %d\n", d[i]);
hipFree(dev_a);
hipFree(dev_d);
return 0;
} | .text
.amdgcn_target "amdgcn-amd-amdhsa--gfx1100"
.protected _Z8maxValuePiS_
.globl _Z8maxValuePiS_
.p2align 8
.type _Z8maxValuePiS_,@function
_Z8maxValuePiS_:
s_clause 0x1
s_load_b32 s3, s[0:1], 0x1c
s_load_b64 s[4:5], s[0:1], 0x0
s_mov_b32 s2, s15
s_waitcnt lgkmcnt(0)
s_and_b32 s3, s3, 0xffff
s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_2) | instid1(VALU_DEP_1)
v_mad_u64_u32 v[1:2], null, s2, s3, v[0:1]
v_mov_b32_e32 v2, 0
s_mov_b32 s3, 2
v_lshlrev_b64 v[1:2], 2, v[1:2]
s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_2)
v_add_co_u32 v1, vcc_lo, s4, v1
v_add_co_ci_u32_e32 v2, vcc_lo, s5, v2, vcc_lo
global_load_b32 v2, v[1:2], off
v_lshlrev_b32_e32 v1, 2, v0
s_waitcnt vmcnt(0)
ds_store_b32 v1, v2
s_branch .LBB0_2
.p2align 6
.LBB0_1:
s_or_b32 exec_lo, exec_lo, s4
s_lshr_b32 s4, s3, 1
s_cmp_lt_u32 s3, 2
s_mov_b32 s3, s4
s_waitcnt lgkmcnt(0)
s_barrier
buffer_gl0_inv
s_cbranch_scc1 .LBB0_5
.LBB0_2:
s_mov_b32 s4, exec_lo
v_cmpx_gt_u32_e64 s3, v0
s_cbranch_execz .LBB0_1
v_add_lshl_u32 v2, s3, v0, 2
ds_load_b32 v3, v1
ds_load_b32 v2, v2
s_waitcnt lgkmcnt(0)
v_cmp_lt_i32_e32 vcc_lo, v3, v2
s_and_b32 exec_lo, exec_lo, vcc_lo
s_cbranch_execz .LBB0_1
ds_store_b32 v1, v2
s_branch .LBB0_1
.LBB0_5:
s_mov_b32 s3, 0
s_mov_b32 s4, exec_lo
v_cmpx_eq_u32_e32 0, v0
s_cbranch_execz .LBB0_7
v_mov_b32_e32 v0, 0
s_load_b64 s[0:1], s[0:1], 0x8
s_lshl_b64 s[2:3], s[2:3], 2
ds_load_b32 v1, v0
s_waitcnt lgkmcnt(0)
s_add_u32 s0, s0, s2
s_addc_u32 s1, s1, s3
global_store_b32 v0, v1, s[0:1]
.LBB0_7:
s_nop 0
s_sendmsg sendmsg(MSG_DEALLOC_VGPRS)
s_endpgm
.section .rodata,"a",@progbits
.p2align 6, 0x0
.amdhsa_kernel _Z8maxValuePiS_
.amdhsa_group_segment_fixed_size 16
.amdhsa_private_segment_fixed_size 0
.amdhsa_kernarg_size 272
.amdhsa_user_sgpr_count 15
.amdhsa_user_sgpr_dispatch_ptr 0
.amdhsa_user_sgpr_queue_ptr 0
.amdhsa_user_sgpr_kernarg_segment_ptr 1
.amdhsa_user_sgpr_dispatch_id 0
.amdhsa_user_sgpr_private_segment_size 0
.amdhsa_wavefront_size32 1
.amdhsa_uses_dynamic_stack 0
.amdhsa_enable_private_segment 0
.amdhsa_system_sgpr_workgroup_id_x 1
.amdhsa_system_sgpr_workgroup_id_y 0
.amdhsa_system_sgpr_workgroup_id_z 0
.amdhsa_system_sgpr_workgroup_info 0
.amdhsa_system_vgpr_workitem_id 0
.amdhsa_next_free_vgpr 4
.amdhsa_next_free_sgpr 16
.amdhsa_float_round_mode_32 0
.amdhsa_float_round_mode_16_64 0
.amdhsa_float_denorm_mode_32 3
.amdhsa_float_denorm_mode_16_64 3
.amdhsa_dx10_clamp 1
.amdhsa_ieee_mode 1
.amdhsa_fp16_overflow 0
.amdhsa_workgroup_processor_mode 1
.amdhsa_memory_ordered 1
.amdhsa_forward_progress 0
.amdhsa_shared_vgpr_count 0
.amdhsa_exception_fp_ieee_invalid_op 0
.amdhsa_exception_fp_denorm_src 0
.amdhsa_exception_fp_ieee_div_zero 0
.amdhsa_exception_fp_ieee_overflow 0
.amdhsa_exception_fp_ieee_underflow 0
.amdhsa_exception_fp_ieee_inexact 0
.amdhsa_exception_int_div_zero 0
.end_amdhsa_kernel
.text
.Lfunc_end0:
.size _Z8maxValuePiS_, .Lfunc_end0-_Z8maxValuePiS_
.section .AMDGPU.csdata,"",@progbits
.text
.p2alignl 7, 3214868480
.fill 96, 4, 3214868480
.type __hip_cuid_,@object
.section .bss,"aw",@nobits
.globl __hip_cuid_
__hip_cuid_:
.byte 0
.size __hip_cuid_, 1
.ident "AMD clang version 18.0.0git (https://github.com/RadeonOpenCompute/llvm-project roc-6.3.2 25012 e5bf7e55c91490b07c49d8960fa7983d864936c4)"
.section ".note.GNU-stack","",@progbits
.addrsig
.addrsig_sym __hip_cuid_
.amdgpu_metadata
---
amdhsa.kernels:
- .args:
- .address_space: global
.offset: 0
.size: 8
.value_kind: global_buffer
- .address_space: global
.offset: 8
.size: 8
.value_kind: global_buffer
- .offset: 16
.size: 4
.value_kind: hidden_block_count_x
- .offset: 20
.size: 4
.value_kind: hidden_block_count_y
- .offset: 24
.size: 4
.value_kind: hidden_block_count_z
- .offset: 28
.size: 2
.value_kind: hidden_group_size_x
- .offset: 30
.size: 2
.value_kind: hidden_group_size_y
- .offset: 32
.size: 2
.value_kind: hidden_group_size_z
- .offset: 34
.size: 2
.value_kind: hidden_remainder_x
- .offset: 36
.size: 2
.value_kind: hidden_remainder_y
- .offset: 38
.size: 2
.value_kind: hidden_remainder_z
- .offset: 56
.size: 8
.value_kind: hidden_global_offset_x
- .offset: 64
.size: 8
.value_kind: hidden_global_offset_y
- .offset: 72
.size: 8
.value_kind: hidden_global_offset_z
- .offset: 80
.size: 2
.value_kind: hidden_grid_dims
.group_segment_fixed_size: 16
.kernarg_segment_align: 8
.kernarg_segment_size: 272
.language: OpenCL C
.language_version:
- 2
- 0
.max_flat_workgroup_size: 1024
.name: _Z8maxValuePiS_
.private_segment_fixed_size: 0
.sgpr_count: 18
.sgpr_spill_count: 0
.symbol: _Z8maxValuePiS_.kd
.uniform_work_group_size: 1
.uses_dynamic_stack: false
.vgpr_count: 4
.vgpr_spill_count: 0
.wavefront_size: 32
.workgroup_processor_mode: 1
amdhsa.target: amdgcn-amd-amdhsa--gfx1100
amdhsa.version:
- 1
- 2
...
.end_amdgpu_metadata |
You are a helpful coding assistant specialized in converting HIP source code to AMD host assembly. | #pragma once
#ifdef __INTELLISENSE__
void __syncthreads();
#endif
#include "hip/hip_runtime.h"
#include <stdio.h>
#include <stdio.h>
#include <time.h>
#include <ctime>
#define BLOCK_DIM 4
#define ARRAY_SIZE 12
__global__ void maxValue(int *a, int *d)
{
__shared__ int sdata[BLOCK_DIM];
unsigned int tid = threadIdx.x;
unsigned int i = blockIdx.x * blockDim.x + threadIdx.x;
sdata[tid] = a[i];
for (unsigned int s = BLOCK_DIM / 2; s >= 1; s = s / 2)
{
if (tid < s)
{
if (sdata[tid] < sdata[tid + s])
{
sdata[tid] = sdata[tid + s];
}
}
__syncthreads();
}
if (tid == 0)
{
d[blockIdx.x] = sdata[0];
}
}
int main()
{
srand(time(NULL));
const int N = ARRAY_SIZE;
int d[ARRAY_SIZE / BLOCK_DIM], a[12] = { 1, 3, 21, 55, 2, 5, 6, 8, 87, 6, 5, 0 };
int *dev_a, *dev_d;
hipMalloc((void **)&dev_a, N * sizeof(int));
hipMalloc((void **)&dev_d, BLOCK_DIM * sizeof(int));
hipMemcpy(dev_a, a, N*sizeof(int), hipMemcpyHostToDevice);
maxValue <<< (ARRAY_SIZE + BLOCK_DIM - 1) / BLOCK_DIM, BLOCK_DIM >>>(dev_a, dev_d);
hipDeviceSynchronize();
hipMemcpy(d, dev_d, ARRAY_SIZE / BLOCK_DIM * sizeof(int), hipMemcpyDeviceToHost);
for (int i = 0; i < ARRAY_SIZE / BLOCK_DIM; ++i)
printf("Max: %d\n", d[i]);
hipFree(dev_a);
hipFree(dev_d);
return 0;
} | .text
.file "kernel.hip"
.globl _Z23__device_stub__maxValuePiS_ # -- Begin function _Z23__device_stub__maxValuePiS_
.p2align 4, 0x90
.type _Z23__device_stub__maxValuePiS_,@function
_Z23__device_stub__maxValuePiS_: # @_Z23__device_stub__maxValuePiS_
.cfi_startproc
# %bb.0:
subq $88, %rsp
.cfi_def_cfa_offset 96
movq %rdi, 56(%rsp)
movq %rsi, 48(%rsp)
leaq 56(%rsp), %rax
movq %rax, 64(%rsp)
leaq 48(%rsp), %rax
movq %rax, 72(%rsp)
leaq 32(%rsp), %rdi
leaq 16(%rsp), %rsi
leaq 8(%rsp), %rdx
movq %rsp, %rcx
callq __hipPopCallConfiguration
movq 32(%rsp), %rsi
movl 40(%rsp), %edx
movq 16(%rsp), %rcx
movl 24(%rsp), %r8d
leaq 64(%rsp), %r9
movl $_Z8maxValuePiS_, %edi
pushq (%rsp)
.cfi_adjust_cfa_offset 8
pushq 16(%rsp)
.cfi_adjust_cfa_offset 8
callq hipLaunchKernel
addq $104, %rsp
.cfi_adjust_cfa_offset -104
retq
.Lfunc_end0:
.size _Z23__device_stub__maxValuePiS_, .Lfunc_end0-_Z23__device_stub__maxValuePiS_
.cfi_endproc
# -- End function
.section .rodata.cst16,"aM",@progbits,16
.p2align 4, 0x0 # -- Begin function main
.LCPI1_0:
.long 1 # 0x1
.long 3 # 0x3
.long 21 # 0x15
.long 55 # 0x37
.LCPI1_1:
.long 2 # 0x2
.long 5 # 0x5
.long 6 # 0x6
.long 8 # 0x8
.LCPI1_2:
.long 87 # 0x57
.long 6 # 0x6
.long 5 # 0x5
.long 0 # 0x0
.text
.globl main
.p2align 4, 0x90
.type main,@function
main: # @main
.cfi_startproc
# %bb.0:
pushq %rbx
.cfi_def_cfa_offset 16
subq $144, %rsp
.cfi_def_cfa_offset 160
.cfi_offset %rbx, -16
xorl %edi, %edi
callq time
movl %eax, %edi
callq srand
movaps .LCPI1_0(%rip), %xmm0 # xmm0 = [1,3,21,55]
movaps %xmm0, 96(%rsp)
movaps .LCPI1_1(%rip), %xmm0 # xmm0 = [2,5,6,8]
movaps %xmm0, 112(%rsp)
movaps .LCPI1_2(%rip), %xmm0 # xmm0 = [87,6,5,0]
movaps %xmm0, 128(%rsp)
leaq 8(%rsp), %rdi
movl $48, %esi
callq hipMalloc
movq %rsp, %rdi
movl $16, %esi
callq hipMalloc
movq 8(%rsp), %rdi
leaq 96(%rsp), %rsi
movl $48, %edx
movl $1, %ecx
callq hipMemcpy
movabsq $4294967299, %rdi # imm = 0x100000003
leaq 1(%rdi), %rdx
movl $1, %esi
movl $1, %ecx
xorl %r8d, %r8d
xorl %r9d, %r9d
callq __hipPushCallConfiguration
testl %eax, %eax
jne .LBB1_2
# %bb.1:
movq 8(%rsp), %rax
movq (%rsp), %rcx
movq %rax, 88(%rsp)
movq %rcx, 80(%rsp)
leaq 88(%rsp), %rax
movq %rax, 16(%rsp)
leaq 80(%rsp), %rax
movq %rax, 24(%rsp)
leaq 64(%rsp), %rdi
leaq 48(%rsp), %rsi
leaq 40(%rsp), %rdx
leaq 32(%rsp), %rcx
callq __hipPopCallConfiguration
movq 64(%rsp), %rsi
movl 72(%rsp), %edx
movq 48(%rsp), %rcx
movl 56(%rsp), %r8d
leaq 16(%rsp), %r9
movl $_Z8maxValuePiS_, %edi
pushq 32(%rsp)
.cfi_adjust_cfa_offset 8
pushq 48(%rsp)
.cfi_adjust_cfa_offset 8
callq hipLaunchKernel
addq $16, %rsp
.cfi_adjust_cfa_offset -16
.LBB1_2:
callq hipDeviceSynchronize
movq (%rsp), %rsi
leaq 16(%rsp), %rdi
movl $12, %edx
movl $2, %ecx
callq hipMemcpy
xorl %ebx, %ebx
.p2align 4, 0x90
.LBB1_3: # =>This Inner Loop Header: Depth=1
movl 16(%rsp,%rbx,4), %esi
movl $.L.str, %edi
xorl %eax, %eax
callq printf
incq %rbx
cmpq $3, %rbx
jne .LBB1_3
# %bb.4:
movq 8(%rsp), %rdi
callq hipFree
movq (%rsp), %rdi
callq hipFree
xorl %eax, %eax
addq $144, %rsp
.cfi_def_cfa_offset 16
popq %rbx
.cfi_def_cfa_offset 8
retq
.Lfunc_end1:
.size main, .Lfunc_end1-main
.cfi_endproc
# -- End function
.p2align 4, 0x90 # -- Begin function __hip_module_ctor
.type __hip_module_ctor,@function
__hip_module_ctor: # @__hip_module_ctor
.cfi_startproc
# %bb.0:
subq $40, %rsp
.cfi_def_cfa_offset 48
cmpq $0, __hip_gpubin_handle(%rip)
jne .LBB2_2
# %bb.1:
movl $__hip_fatbin_wrapper, %edi
callq __hipRegisterFatBinary
movq %rax, __hip_gpubin_handle(%rip)
.LBB2_2:
movq __hip_gpubin_handle(%rip), %rdi
xorps %xmm0, %xmm0
movups %xmm0, 16(%rsp)
movups %xmm0, (%rsp)
movl $_Z8maxValuePiS_, %esi
movl $.L__unnamed_1, %edx
movl $.L__unnamed_1, %ecx
movl $-1, %r8d
xorl %r9d, %r9d
callq __hipRegisterFunction
movl $__hip_module_dtor, %edi
addq $40, %rsp
.cfi_def_cfa_offset 8
jmp atexit # TAILCALL
.Lfunc_end2:
.size __hip_module_ctor, .Lfunc_end2-__hip_module_ctor
.cfi_endproc
# -- End function
.p2align 4, 0x90 # -- Begin function __hip_module_dtor
.type __hip_module_dtor,@function
__hip_module_dtor: # @__hip_module_dtor
.cfi_startproc
# %bb.0:
movq __hip_gpubin_handle(%rip), %rdi
testq %rdi, %rdi
je .LBB3_2
# %bb.1:
pushq %rax
.cfi_def_cfa_offset 16
callq __hipUnregisterFatBinary
movq $0, __hip_gpubin_handle(%rip)
addq $8, %rsp
.cfi_def_cfa_offset 8
.LBB3_2:
retq
.Lfunc_end3:
.size __hip_module_dtor, .Lfunc_end3-__hip_module_dtor
.cfi_endproc
# -- End function
.type _Z8maxValuePiS_,@object # @_Z8maxValuePiS_
.section .rodata,"a",@progbits
.globl _Z8maxValuePiS_
.p2align 3, 0x0
_Z8maxValuePiS_:
.quad _Z23__device_stub__maxValuePiS_
.size _Z8maxValuePiS_, 8
.type .L.str,@object # @.str
.section .rodata.str1.1,"aMS",@progbits,1
.L.str:
.asciz "Max: %d\n"
.size .L.str, 9
.type .L__unnamed_1,@object # @0
.L__unnamed_1:
.asciz "_Z8maxValuePiS_"
.size .L__unnamed_1, 16
.type __hip_fatbin_wrapper,@object # @__hip_fatbin_wrapper
.section .hipFatBinSegment,"a",@progbits
.p2align 3, 0x0
__hip_fatbin_wrapper:
.long 1212764230 # 0x48495046
.long 1 # 0x1
.quad __hip_fatbin
.quad 0
.size __hip_fatbin_wrapper, 24
.type __hip_gpubin_handle,@object # @__hip_gpubin_handle
.local __hip_gpubin_handle
.comm __hip_gpubin_handle,8,8
.section .init_array,"aw",@init_array
.p2align 3, 0x0
.quad __hip_module_ctor
.type __hip_cuid_,@object # @__hip_cuid_
.bss
.globl __hip_cuid_
__hip_cuid_:
.byte 0 # 0x0
.size __hip_cuid_, 1
.section ".linker-options","e",@llvm_linker_options
.ident "AMD clang version 18.0.0git (https://github.com/RadeonOpenCompute/llvm-project roc-6.3.2 25012 e5bf7e55c91490b07c49d8960fa7983d864936c4)"
.section ".note.GNU-stack","",@progbits
.addrsig
.addrsig_sym _Z23__device_stub__maxValuePiS_
.addrsig_sym __hip_module_ctor
.addrsig_sym __hip_module_dtor
.addrsig_sym _Z8maxValuePiS_
.addrsig_sym __hip_fatbin
.addrsig_sym __hip_fatbin_wrapper
.addrsig_sym __hip_cuid_ |
You are a helpful coding assistant specialized in converting from CUDA device assembly to AMD device assembly. | code for sm_80
Function : _Z8maxValuePiS_
.headerflags @"EF_CUDA_TEXMODE_UNIFIED EF_CUDA_64BIT_ADDRESS EF_CUDA_SM80 EF_CUDA_VIRTUAL_SM(EF_CUDA_SM80)"
/*0000*/ IMAD.MOV.U32 R1, RZ, RZ, c[0x0][0x28] ; /* 0x00000a00ff017624 */
/* 0x000fe400078e00ff */
/*0010*/ S2R R5, SR_TID.X ; /* 0x0000000000057919 */
/* 0x000e220000002100 */
/*0020*/ HFMA2.MMA R7, -RZ, RZ, 0, 2.384185791015625e-07 ; /* 0x00000004ff077435 */
/* 0x000fe200000001ff */
/*0030*/ ULDC.64 UR4, c[0x0][0x118] ; /* 0x0000460000047ab9 */
/* 0x000fe40000000a00 */
/*0040*/ S2R R4, SR_CTAID.X ; /* 0x0000000000047919 */
/* 0x000e240000002500 */
/*0050*/ IMAD R2, R4, c[0x0][0x0], R5 ; /* 0x0000000004027a24 */
/* 0x001fca00078e0205 */
/*0060*/ IMAD.WIDE.U32 R2, R2, R7, c[0x0][0x160] ; /* 0x0000580002027625 */
/* 0x000fcc00078e0007 */
/*0070*/ LDG.E R2, [R2.64] ; /* 0x0000000402027981 */
/* 0x000ea2000c1e1900 */
/*0080*/ ISETP.GT.U32.AND P1, PT, R5.reuse, 0x1, PT ; /* 0x000000010500780c */
/* 0x040fe20003f24070 */
/*0090*/ BSSY B0, 0x110 ; /* 0x0000007000007945 */
/* 0x000fe20003800000 */
/*00a0*/ ISETP.NE.AND P0, PT, R5, RZ, PT ; /* 0x000000ff0500720c */
/* 0x000fe20003f05270 */
/*00b0*/ STS [R5.X4], R2 ; /* 0x0000000205007388 */
/* 0x0041f40000004800 */
/*00c0*/ @P1 BRA 0x100 ; /* 0x0000003000001947 */
/* 0x000fea0003800000 */
/*00d0*/ LDS R3, [R5.X4+0x8] ; /* 0x0000080005037984 */
/* 0x000e640000004800 */
/*00e0*/ ISETP.GE.AND P1, PT, R2, R3, PT ; /* 0x000000030200720c */
/* 0x002fda0003f26270 */
/*00f0*/ @!P1 STS [R5.X4], R3 ; /* 0x0000000305009388 */
/* 0x0003e40000004800 */
/*0100*/ BSYNC B0 ; /* 0x0000000000007941 */
/* 0x000fea0003800000 */
/*0110*/ BAR.SYNC.DEFER_BLOCKING 0x0 ; /* 0x0000000000007b1d */
/* 0x000fec0000010000 */
/*0120*/ BSSY B0, 0x190 ; /* 0x0000006000007945 */
/* 0x000fe20003800000 */
/*0130*/ @P0 BRA 0x180 ; /* 0x0000004000000947 */
/* 0x000fea0003800000 */
/*0140*/ LDS R0, [R5.X4] ; /* 0x0000000005007984 */
/* 0x000fe80000004800 */
/*0150*/ LDS R3, [0x4] ; /* 0x00000400ff037984 */
/* 0x002e640000000800 */
/*0160*/ ISETP.GE.AND P1, PT, R0, R3, PT ; /* 0x000000030000720c */
/* 0x002fda0003f26270 */
/*0170*/ @!P1 STS [R5.X4], R3 ; /* 0x0000000305009388 */
/* 0x0003e40000004800 */
/*0180*/ BSYNC B0 ; /* 0x0000000000007941 */
/* 0x000fea0003800000 */
/*0190*/ BAR.SYNC.DEFER_BLOCKING 0x0 ; /* 0x0000000000007b1d */
/* 0x000fec0000010000 */
/*01a0*/ @P0 EXIT ; /* 0x000000000000094d */
/* 0x000fea0003800000 */
/*01b0*/ LDS R5, [RZ] ; /* 0x00000000ff057984 */
/* 0x003e220000000800 */
/*01c0*/ IMAD.WIDE.U32 R2, R4, R7, c[0x0][0x168] ; /* 0x00005a0004027625 */
/* 0x000fca00078e0007 */
/*01d0*/ STG.E [R2.64], R5 ; /* 0x0000000502007986 */
/* 0x001fe2000c101904 */
/*01e0*/ EXIT ; /* 0x000000000000794d */
/* 0x000fea0003800000 */
/*01f0*/ BRA 0x1f0; /* 0xfffffff000007947 */
/* 0x000fc0000383ffff */
/*0200*/ NOP; /* 0x0000000000007918 */
/* 0x000fc00000000000 */
/*0210*/ NOP; /* 0x0000000000007918 */
/* 0x000fc00000000000 */
/*0220*/ NOP; /* 0x0000000000007918 */
/* 0x000fc00000000000 */
/*0230*/ NOP; /* 0x0000000000007918 */
/* 0x000fc00000000000 */
/*0240*/ NOP; /* 0x0000000000007918 */
/* 0x000fc00000000000 */
/*0250*/ NOP; /* 0x0000000000007918 */
/* 0x000fc00000000000 */
/*0260*/ NOP; /* 0x0000000000007918 */
/* 0x000fc00000000000 */
/*0270*/ NOP; /* 0x0000000000007918 */
/* 0x000fc00000000000 */
.......... | .text
.amdgcn_target "amdgcn-amd-amdhsa--gfx1100"
.protected _Z8maxValuePiS_
.globl _Z8maxValuePiS_
.p2align 8
.type _Z8maxValuePiS_,@function
_Z8maxValuePiS_:
s_clause 0x1
s_load_b32 s3, s[0:1], 0x1c
s_load_b64 s[4:5], s[0:1], 0x0
s_mov_b32 s2, s15
s_waitcnt lgkmcnt(0)
s_and_b32 s3, s3, 0xffff
s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_2) | instid1(VALU_DEP_1)
v_mad_u64_u32 v[1:2], null, s2, s3, v[0:1]
v_mov_b32_e32 v2, 0
s_mov_b32 s3, 2
v_lshlrev_b64 v[1:2], 2, v[1:2]
s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_2)
v_add_co_u32 v1, vcc_lo, s4, v1
v_add_co_ci_u32_e32 v2, vcc_lo, s5, v2, vcc_lo
global_load_b32 v2, v[1:2], off
v_lshlrev_b32_e32 v1, 2, v0
s_waitcnt vmcnt(0)
ds_store_b32 v1, v2
s_branch .LBB0_2
.p2align 6
.LBB0_1:
s_or_b32 exec_lo, exec_lo, s4
s_lshr_b32 s4, s3, 1
s_cmp_lt_u32 s3, 2
s_mov_b32 s3, s4
s_waitcnt lgkmcnt(0)
s_barrier
buffer_gl0_inv
s_cbranch_scc1 .LBB0_5
.LBB0_2:
s_mov_b32 s4, exec_lo
v_cmpx_gt_u32_e64 s3, v0
s_cbranch_execz .LBB0_1
v_add_lshl_u32 v2, s3, v0, 2
ds_load_b32 v3, v1
ds_load_b32 v2, v2
s_waitcnt lgkmcnt(0)
v_cmp_lt_i32_e32 vcc_lo, v3, v2
s_and_b32 exec_lo, exec_lo, vcc_lo
s_cbranch_execz .LBB0_1
ds_store_b32 v1, v2
s_branch .LBB0_1
.LBB0_5:
s_mov_b32 s3, 0
s_mov_b32 s4, exec_lo
v_cmpx_eq_u32_e32 0, v0
s_cbranch_execz .LBB0_7
v_mov_b32_e32 v0, 0
s_load_b64 s[0:1], s[0:1], 0x8
s_lshl_b64 s[2:3], s[2:3], 2
ds_load_b32 v1, v0
s_waitcnt lgkmcnt(0)
s_add_u32 s0, s0, s2
s_addc_u32 s1, s1, s3
global_store_b32 v0, v1, s[0:1]
.LBB0_7:
s_nop 0
s_sendmsg sendmsg(MSG_DEALLOC_VGPRS)
s_endpgm
.section .rodata,"a",@progbits
.p2align 6, 0x0
.amdhsa_kernel _Z8maxValuePiS_
.amdhsa_group_segment_fixed_size 16
.amdhsa_private_segment_fixed_size 0
.amdhsa_kernarg_size 272
.amdhsa_user_sgpr_count 15
.amdhsa_user_sgpr_dispatch_ptr 0
.amdhsa_user_sgpr_queue_ptr 0
.amdhsa_user_sgpr_kernarg_segment_ptr 1
.amdhsa_user_sgpr_dispatch_id 0
.amdhsa_user_sgpr_private_segment_size 0
.amdhsa_wavefront_size32 1
.amdhsa_uses_dynamic_stack 0
.amdhsa_enable_private_segment 0
.amdhsa_system_sgpr_workgroup_id_x 1
.amdhsa_system_sgpr_workgroup_id_y 0
.amdhsa_system_sgpr_workgroup_id_z 0
.amdhsa_system_sgpr_workgroup_info 0
.amdhsa_system_vgpr_workitem_id 0
.amdhsa_next_free_vgpr 4
.amdhsa_next_free_sgpr 16
.amdhsa_float_round_mode_32 0
.amdhsa_float_round_mode_16_64 0
.amdhsa_float_denorm_mode_32 3
.amdhsa_float_denorm_mode_16_64 3
.amdhsa_dx10_clamp 1
.amdhsa_ieee_mode 1
.amdhsa_fp16_overflow 0
.amdhsa_workgroup_processor_mode 1
.amdhsa_memory_ordered 1
.amdhsa_forward_progress 0
.amdhsa_shared_vgpr_count 0
.amdhsa_exception_fp_ieee_invalid_op 0
.amdhsa_exception_fp_denorm_src 0
.amdhsa_exception_fp_ieee_div_zero 0
.amdhsa_exception_fp_ieee_overflow 0
.amdhsa_exception_fp_ieee_underflow 0
.amdhsa_exception_fp_ieee_inexact 0
.amdhsa_exception_int_div_zero 0
.end_amdhsa_kernel
.text
.Lfunc_end0:
.size _Z8maxValuePiS_, .Lfunc_end0-_Z8maxValuePiS_
.section .AMDGPU.csdata,"",@progbits
.text
.p2alignl 7, 3214868480
.fill 96, 4, 3214868480
.type __hip_cuid_,@object
.section .bss,"aw",@nobits
.globl __hip_cuid_
__hip_cuid_:
.byte 0
.size __hip_cuid_, 1
.ident "AMD clang version 18.0.0git (https://github.com/RadeonOpenCompute/llvm-project roc-6.3.2 25012 e5bf7e55c91490b07c49d8960fa7983d864936c4)"
.section ".note.GNU-stack","",@progbits
.addrsig
.addrsig_sym __hip_cuid_
.amdgpu_metadata
---
amdhsa.kernels:
- .args:
- .address_space: global
.offset: 0
.size: 8
.value_kind: global_buffer
- .address_space: global
.offset: 8
.size: 8
.value_kind: global_buffer
- .offset: 16
.size: 4
.value_kind: hidden_block_count_x
- .offset: 20
.size: 4
.value_kind: hidden_block_count_y
- .offset: 24
.size: 4
.value_kind: hidden_block_count_z
- .offset: 28
.size: 2
.value_kind: hidden_group_size_x
- .offset: 30
.size: 2
.value_kind: hidden_group_size_y
- .offset: 32
.size: 2
.value_kind: hidden_group_size_z
- .offset: 34
.size: 2
.value_kind: hidden_remainder_x
- .offset: 36
.size: 2
.value_kind: hidden_remainder_y
- .offset: 38
.size: 2
.value_kind: hidden_remainder_z
- .offset: 56
.size: 8
.value_kind: hidden_global_offset_x
- .offset: 64
.size: 8
.value_kind: hidden_global_offset_y
- .offset: 72
.size: 8
.value_kind: hidden_global_offset_z
- .offset: 80
.size: 2
.value_kind: hidden_grid_dims
.group_segment_fixed_size: 16
.kernarg_segment_align: 8
.kernarg_segment_size: 272
.language: OpenCL C
.language_version:
- 2
- 0
.max_flat_workgroup_size: 1024
.name: _Z8maxValuePiS_
.private_segment_fixed_size: 0
.sgpr_count: 18
.sgpr_spill_count: 0
.symbol: _Z8maxValuePiS_.kd
.uniform_work_group_size: 1
.uses_dynamic_stack: false
.vgpr_count: 4
.vgpr_spill_count: 0
.wavefront_size: 32
.workgroup_processor_mode: 1
amdhsa.target: amdgcn-amd-amdhsa--gfx1100
amdhsa.version:
- 1
- 2
...
.end_amdgpu_metadata |
You are a helpful coding assistant specialized in converting from CUDA host assembly to AMD host assembly. | .file "tmpxft_0016c829_00000000-6_kernel.cudafe1.cpp"
.text
#APP
#NO_APP
.type _ZL26__cudaUnregisterBinaryUtilv, @function
_ZL26__cudaUnregisterBinaryUtilv:
.LFB2060:
.cfi_startproc
endbr64
subq $8, %rsp
.cfi_def_cfa_offset 16
movq _ZL20__cudaFatCubinHandle(%rip), %rdi
call __cudaUnregisterFatBinary@PLT
addq $8, %rsp
.cfi_def_cfa_offset 8
ret
.cfi_endproc
.LFE2060:
.size _ZL26__cudaUnregisterBinaryUtilv, .-_ZL26__cudaUnregisterBinaryUtilv
.globl _Z29__device_stub__Z8maxValuePiS_PiS_
.type _Z29__device_stub__Z8maxValuePiS_PiS_, @function
_Z29__device_stub__Z8maxValuePiS_PiS_:
.LFB2082:
.cfi_startproc
endbr64
subq $120, %rsp
.cfi_def_cfa_offset 128
movq %rdi, 8(%rsp)
movq %rsi, (%rsp)
movq %fs:40, %rax
movq %rax, 104(%rsp)
xorl %eax, %eax
leaq 8(%rsp), %rax
movq %rax, 80(%rsp)
movq %rsp, %rax
movq %rax, 88(%rsp)
movl $1, 32(%rsp)
movl $1, 36(%rsp)
movl $1, 40(%rsp)
movl $1, 44(%rsp)
movl $1, 48(%rsp)
movl $1, 52(%rsp)
leaq 24(%rsp), %rcx
leaq 16(%rsp), %rdx
leaq 44(%rsp), %rsi
leaq 32(%rsp), %rdi
call __cudaPopCallConfiguration@PLT
testl %eax, %eax
je .L7
.L3:
movq 104(%rsp), %rax
subq %fs:40, %rax
jne .L8
addq $120, %rsp
.cfi_remember_state
.cfi_def_cfa_offset 8
ret
.L7:
.cfi_restore_state
pushq 24(%rsp)
.cfi_def_cfa_offset 136
pushq 24(%rsp)
.cfi_def_cfa_offset 144
leaq 96(%rsp), %r9
movq 60(%rsp), %rcx
movl 68(%rsp), %r8d
movq 48(%rsp), %rsi
movl 56(%rsp), %edx
leaq _Z8maxValuePiS_(%rip), %rdi
call cudaLaunchKernel@PLT
addq $16, %rsp
.cfi_def_cfa_offset 128
jmp .L3
.L8:
call __stack_chk_fail@PLT
.cfi_endproc
.LFE2082:
.size _Z29__device_stub__Z8maxValuePiS_PiS_, .-_Z29__device_stub__Z8maxValuePiS_PiS_
.globl _Z8maxValuePiS_
.type _Z8maxValuePiS_, @function
_Z8maxValuePiS_:
.LFB2083:
.cfi_startproc
endbr64
subq $8, %rsp
.cfi_def_cfa_offset 16
call _Z29__device_stub__Z8maxValuePiS_PiS_
addq $8, %rsp
.cfi_def_cfa_offset 8
ret
.cfi_endproc
.LFE2083:
.size _Z8maxValuePiS_, .-_Z8maxValuePiS_
.section .rodata.str1.1,"aMS",@progbits,1
.LC0:
.string "Max: %d\n"
.text
.globl main
.type main, @function
main:
.LFB2057:
.cfi_startproc
endbr64
pushq %r12
.cfi_def_cfa_offset 16
.cfi_offset 12, -16
pushq %rbp
.cfi_def_cfa_offset 24
.cfi_offset 6, -24
pushq %rbx
.cfi_def_cfa_offset 32
.cfi_offset 3, -32
addq $-128, %rsp
.cfi_def_cfa_offset 160
movq %fs:40, %rax
movq %rax, 120(%rsp)
xorl %eax, %eax
movl $0, %edi
call time@PLT
movl %eax, %edi
call srand@PLT
movl $1, 64(%rsp)
movl $3, 68(%rsp)
movl $21, 72(%rsp)
movl $55, 76(%rsp)
movl $2, 80(%rsp)
movl $5, 84(%rsp)
movl $6, 88(%rsp)
movl $8, 92(%rsp)
movl $87, 96(%rsp)
movl $6, 100(%rsp)
movl $5, 104(%rsp)
movl $0, 108(%rsp)
leaq 8(%rsp), %rdi
movl $48, %esi
call cudaMalloc@PLT
leaq 16(%rsp), %rdi
movl $16, %esi
call cudaMalloc@PLT
leaq 64(%rsp), %rsi
movl $1, %ecx
movl $48, %edx
movq 8(%rsp), %rdi
call cudaMemcpy@PLT
movl $4, 40(%rsp)
movl $1, 44(%rsp)
movl $1, 48(%rsp)
movl $3, 28(%rsp)
movl $1, 32(%rsp)
movl $1, 36(%rsp)
movl $0, %r9d
movl $0, %r8d
movq 40(%rsp), %rdx
movl $1, %ecx
movq 28(%rsp), %rdi
movl $1, %esi
call __cudaPushCallConfiguration@PLT
testl %eax, %eax
je .L17
.L12:
call cudaDeviceSynchronize@PLT
leaq 52(%rsp), %rbx
movl $2, %ecx
movl $12, %edx
movq 16(%rsp), %rsi
movq %rbx, %rdi
call cudaMemcpy@PLT
leaq 64(%rsp), %r12
leaq .LC0(%rip), %rbp
.L13:
movl (%rbx), %edx
movq %rbp, %rsi
movl $2, %edi
movl $0, %eax
call __printf_chk@PLT
addq $4, %rbx
cmpq %r12, %rbx
jne .L13
movq 8(%rsp), %rdi
call cudaFree@PLT
movq 16(%rsp), %rdi
call cudaFree@PLT
movq 120(%rsp), %rax
subq %fs:40, %rax
jne .L18
movl $0, %eax
subq $-128, %rsp
.cfi_remember_state
.cfi_def_cfa_offset 32
popq %rbx
.cfi_def_cfa_offset 24
popq %rbp
.cfi_def_cfa_offset 16
popq %r12
.cfi_def_cfa_offset 8
ret
.L17:
.cfi_restore_state
movq 16(%rsp), %rsi
movq 8(%rsp), %rdi
call _Z29__device_stub__Z8maxValuePiS_PiS_
jmp .L12
.L18:
call __stack_chk_fail@PLT
.cfi_endproc
.LFE2057:
.size main, .-main
.section .rodata.str1.1
.LC1:
.string "_Z8maxValuePiS_"
.text
.type _ZL24__sti____cudaRegisterAllv, @function
_ZL24__sti____cudaRegisterAllv:
.LFB2085:
.cfi_startproc
endbr64
subq $8, %rsp
.cfi_def_cfa_offset 16
leaq _ZL15__fatDeviceText(%rip), %rdi
call __cudaRegisterFatBinary@PLT
movq %rax, %rdi
movq %rax, _ZL20__cudaFatCubinHandle(%rip)
pushq $0
.cfi_def_cfa_offset 24
pushq $0
.cfi_def_cfa_offset 32
pushq $0
.cfi_def_cfa_offset 40
pushq $0
.cfi_def_cfa_offset 48
movl $0, %r9d
movl $-1, %r8d
leaq .LC1(%rip), %rdx
movq %rdx, %rcx
leaq _Z8maxValuePiS_(%rip), %rsi
call __cudaRegisterFunction@PLT
addq $32, %rsp
.cfi_def_cfa_offset 16
movq _ZL20__cudaFatCubinHandle(%rip), %rdi
call __cudaRegisterFatBinaryEnd@PLT
leaq _ZL26__cudaUnregisterBinaryUtilv(%rip), %rdi
call atexit@PLT
addq $8, %rsp
.cfi_def_cfa_offset 8
ret
.cfi_endproc
.LFE2085:
.size _ZL24__sti____cudaRegisterAllv, .-_ZL24__sti____cudaRegisterAllv
.section .init_array,"aw"
.align 8
.quad _ZL24__sti____cudaRegisterAllv
.section .nvFatBinSegment,"aw"
.align 8
.type _ZL15__fatDeviceText, @object
.size _ZL15__fatDeviceText, 24
_ZL15__fatDeviceText:
.long 1180844977
.long 1
.quad fatbinData
.quad 0
.local _ZL20__cudaFatCubinHandle
.comm _ZL20__cudaFatCubinHandle,8,8
.ident "GCC: (Ubuntu 13.3.0-6ubuntu2~24.04) 13.3.0"
.section .note.GNU-stack,"",@progbits
.section .note.gnu.property,"a"
.align 8
.long 1f - 0f
.long 4f - 1f
.long 5
0:
.string "GNU"
1:
.align 8
.long 0xc0000002
.long 3f - 2f
2:
.long 0x3
3:
.align 8
4: | .text
.file "kernel.hip"
.globl _Z23__device_stub__maxValuePiS_ # -- Begin function _Z23__device_stub__maxValuePiS_
.p2align 4, 0x90
.type _Z23__device_stub__maxValuePiS_,@function
_Z23__device_stub__maxValuePiS_: # @_Z23__device_stub__maxValuePiS_
.cfi_startproc
# %bb.0:
subq $88, %rsp
.cfi_def_cfa_offset 96
movq %rdi, 56(%rsp)
movq %rsi, 48(%rsp)
leaq 56(%rsp), %rax
movq %rax, 64(%rsp)
leaq 48(%rsp), %rax
movq %rax, 72(%rsp)
leaq 32(%rsp), %rdi
leaq 16(%rsp), %rsi
leaq 8(%rsp), %rdx
movq %rsp, %rcx
callq __hipPopCallConfiguration
movq 32(%rsp), %rsi
movl 40(%rsp), %edx
movq 16(%rsp), %rcx
movl 24(%rsp), %r8d
leaq 64(%rsp), %r9
movl $_Z8maxValuePiS_, %edi
pushq (%rsp)
.cfi_adjust_cfa_offset 8
pushq 16(%rsp)
.cfi_adjust_cfa_offset 8
callq hipLaunchKernel
addq $104, %rsp
.cfi_adjust_cfa_offset -104
retq
.Lfunc_end0:
.size _Z23__device_stub__maxValuePiS_, .Lfunc_end0-_Z23__device_stub__maxValuePiS_
.cfi_endproc
# -- End function
.section .rodata.cst16,"aM",@progbits,16
.p2align 4, 0x0 # -- Begin function main
.LCPI1_0:
.long 1 # 0x1
.long 3 # 0x3
.long 21 # 0x15
.long 55 # 0x37
.LCPI1_1:
.long 2 # 0x2
.long 5 # 0x5
.long 6 # 0x6
.long 8 # 0x8
.LCPI1_2:
.long 87 # 0x57
.long 6 # 0x6
.long 5 # 0x5
.long 0 # 0x0
.text
.globl main
.p2align 4, 0x90
.type main,@function
main: # @main
.cfi_startproc
# %bb.0:
pushq %rbx
.cfi_def_cfa_offset 16
subq $144, %rsp
.cfi_def_cfa_offset 160
.cfi_offset %rbx, -16
xorl %edi, %edi
callq time
movl %eax, %edi
callq srand
movaps .LCPI1_0(%rip), %xmm0 # xmm0 = [1,3,21,55]
movaps %xmm0, 96(%rsp)
movaps .LCPI1_1(%rip), %xmm0 # xmm0 = [2,5,6,8]
movaps %xmm0, 112(%rsp)
movaps .LCPI1_2(%rip), %xmm0 # xmm0 = [87,6,5,0]
movaps %xmm0, 128(%rsp)
leaq 8(%rsp), %rdi
movl $48, %esi
callq hipMalloc
movq %rsp, %rdi
movl $16, %esi
callq hipMalloc
movq 8(%rsp), %rdi
leaq 96(%rsp), %rsi
movl $48, %edx
movl $1, %ecx
callq hipMemcpy
movabsq $4294967299, %rdi # imm = 0x100000003
leaq 1(%rdi), %rdx
movl $1, %esi
movl $1, %ecx
xorl %r8d, %r8d
xorl %r9d, %r9d
callq __hipPushCallConfiguration
testl %eax, %eax
jne .LBB1_2
# %bb.1:
movq 8(%rsp), %rax
movq (%rsp), %rcx
movq %rax, 88(%rsp)
movq %rcx, 80(%rsp)
leaq 88(%rsp), %rax
movq %rax, 16(%rsp)
leaq 80(%rsp), %rax
movq %rax, 24(%rsp)
leaq 64(%rsp), %rdi
leaq 48(%rsp), %rsi
leaq 40(%rsp), %rdx
leaq 32(%rsp), %rcx
callq __hipPopCallConfiguration
movq 64(%rsp), %rsi
movl 72(%rsp), %edx
movq 48(%rsp), %rcx
movl 56(%rsp), %r8d
leaq 16(%rsp), %r9
movl $_Z8maxValuePiS_, %edi
pushq 32(%rsp)
.cfi_adjust_cfa_offset 8
pushq 48(%rsp)
.cfi_adjust_cfa_offset 8
callq hipLaunchKernel
addq $16, %rsp
.cfi_adjust_cfa_offset -16
.LBB1_2:
callq hipDeviceSynchronize
movq (%rsp), %rsi
leaq 16(%rsp), %rdi
movl $12, %edx
movl $2, %ecx
callq hipMemcpy
xorl %ebx, %ebx
.p2align 4, 0x90
.LBB1_3: # =>This Inner Loop Header: Depth=1
movl 16(%rsp,%rbx,4), %esi
movl $.L.str, %edi
xorl %eax, %eax
callq printf
incq %rbx
cmpq $3, %rbx
jne .LBB1_3
# %bb.4:
movq 8(%rsp), %rdi
callq hipFree
movq (%rsp), %rdi
callq hipFree
xorl %eax, %eax
addq $144, %rsp
.cfi_def_cfa_offset 16
popq %rbx
.cfi_def_cfa_offset 8
retq
.Lfunc_end1:
.size main, .Lfunc_end1-main
.cfi_endproc
# -- End function
.p2align 4, 0x90 # -- Begin function __hip_module_ctor
.type __hip_module_ctor,@function
__hip_module_ctor: # @__hip_module_ctor
.cfi_startproc
# %bb.0:
subq $40, %rsp
.cfi_def_cfa_offset 48
cmpq $0, __hip_gpubin_handle(%rip)
jne .LBB2_2
# %bb.1:
movl $__hip_fatbin_wrapper, %edi
callq __hipRegisterFatBinary
movq %rax, __hip_gpubin_handle(%rip)
.LBB2_2:
movq __hip_gpubin_handle(%rip), %rdi
xorps %xmm0, %xmm0
movups %xmm0, 16(%rsp)
movups %xmm0, (%rsp)
movl $_Z8maxValuePiS_, %esi
movl $.L__unnamed_1, %edx
movl $.L__unnamed_1, %ecx
movl $-1, %r8d
xorl %r9d, %r9d
callq __hipRegisterFunction
movl $__hip_module_dtor, %edi
addq $40, %rsp
.cfi_def_cfa_offset 8
jmp atexit # TAILCALL
.Lfunc_end2:
.size __hip_module_ctor, .Lfunc_end2-__hip_module_ctor
.cfi_endproc
# -- End function
.p2align 4, 0x90 # -- Begin function __hip_module_dtor
.type __hip_module_dtor,@function
__hip_module_dtor: # @__hip_module_dtor
.cfi_startproc
# %bb.0:
movq __hip_gpubin_handle(%rip), %rdi
testq %rdi, %rdi
je .LBB3_2
# %bb.1:
pushq %rax
.cfi_def_cfa_offset 16
callq __hipUnregisterFatBinary
movq $0, __hip_gpubin_handle(%rip)
addq $8, %rsp
.cfi_def_cfa_offset 8
.LBB3_2:
retq
.Lfunc_end3:
.size __hip_module_dtor, .Lfunc_end3-__hip_module_dtor
.cfi_endproc
# -- End function
.type _Z8maxValuePiS_,@object # @_Z8maxValuePiS_
.section .rodata,"a",@progbits
.globl _Z8maxValuePiS_
.p2align 3, 0x0
_Z8maxValuePiS_:
.quad _Z23__device_stub__maxValuePiS_
.size _Z8maxValuePiS_, 8
.type .L.str,@object # @.str
.section .rodata.str1.1,"aMS",@progbits,1
.L.str:
.asciz "Max: %d\n"
.size .L.str, 9
.type .L__unnamed_1,@object # @0
.L__unnamed_1:
.asciz "_Z8maxValuePiS_"
.size .L__unnamed_1, 16
.type __hip_fatbin_wrapper,@object # @__hip_fatbin_wrapper
.section .hipFatBinSegment,"a",@progbits
.p2align 3, 0x0
__hip_fatbin_wrapper:
.long 1212764230 # 0x48495046
.long 1 # 0x1
.quad __hip_fatbin
.quad 0
.size __hip_fatbin_wrapper, 24
.type __hip_gpubin_handle,@object # @__hip_gpubin_handle
.local __hip_gpubin_handle
.comm __hip_gpubin_handle,8,8
.section .init_array,"aw",@init_array
.p2align 3, 0x0
.quad __hip_module_ctor
.type __hip_cuid_,@object # @__hip_cuid_
.bss
.globl __hip_cuid_
__hip_cuid_:
.byte 0 # 0x0
.size __hip_cuid_, 1
.section ".linker-options","e",@llvm_linker_options
.ident "AMD clang version 18.0.0git (https://github.com/RadeonOpenCompute/llvm-project roc-6.3.2 25012 e5bf7e55c91490b07c49d8960fa7983d864936c4)"
.section ".note.GNU-stack","",@progbits
.addrsig
.addrsig_sym _Z23__device_stub__maxValuePiS_
.addrsig_sym __hip_module_ctor
.addrsig_sym __hip_module_dtor
.addrsig_sym _Z8maxValuePiS_
.addrsig_sym __hip_fatbin
.addrsig_sym __hip_fatbin_wrapper
.addrsig_sym __hip_cuid_ |
You are a helpful coding assistant specialized in converting CUDA source code to CUDA device assembly. | #include "includes.h"
__device__ inline float stableSigmoid(float x) {
if(x >= 0) {
float z = expf(-x);
return 1.0 / (1.0 + z);
} else {
float z = expf(x);
return z / (1.0 + z);
}
}
__global__ void gHighwayForward(float* out, const float* in1, const float* in2, const float* t, size_t length) {
for(int bid = 0; bid < length; bid += blockDim.x * gridDim.x) {
int index = bid + blockDim.x * blockIdx.x + threadIdx.x;
if(index < length) {
float sigma = stableSigmoid(t[index]);
out[index] = in1[index] * sigma + in2[index] * (1.f - sigma);
}
}
} | code for sm_80
Function : _Z15gHighwayForwardPfPKfS1_S1_m
.headerflags @"EF_CUDA_TEXMODE_UNIFIED EF_CUDA_64BIT_ADDRESS EF_CUDA_SM80 EF_CUDA_VIRTUAL_SM(EF_CUDA_SM80)"
/*0000*/ IMAD.MOV.U32 R1, RZ, RZ, c[0x0][0x28] ; /* 0x00000a00ff017624 */
/* 0x000fe400078e00ff */
/*0010*/ ISETP.NE.U32.AND P0, PT, RZ, c[0x0][0x180], PT ; /* 0x00006000ff007a0c */
/* 0x000fc80003f05070 */
/*0020*/ ISETP.NE.AND.EX P0, PT, RZ, c[0x0][0x184], PT, P0 ; /* 0x00006100ff007a0c */
/* 0x000fda0003f05300 */
/*0030*/ @!P0 EXIT ; /* 0x000000000000894d */
/* 0x000fea0003800000 */
/*0040*/ S2R R13, SR_CTAID.X ; /* 0x00000000000d7919 */
/* 0x000e220000002500 */
/*0050*/ IMAD.MOV.U32 R12, RZ, RZ, RZ ; /* 0x000000ffff0c7224 */
/* 0x000fe200078e00ff */
/*0060*/ ULDC.64 UR4, c[0x0][0x118] ; /* 0x0000460000047ab9 */
/* 0x000fe40000000a00 */
/*0070*/ S2R R0, SR_TID.X ; /* 0x0000000000007919 */
/* 0x000e240000002100 */
/*0080*/ IMAD R13, R13, c[0x0][0x0], R0 ; /* 0x000000000d0d7a24 */
/* 0x001fc800078e0200 */
/*0090*/ IMAD.IADD R15, R13, 0x1, R12 ; /* 0x000000010d0f7824 */
/* 0x001fe200078e020c */
/*00a0*/ BSSY B1, 0x640 ; /* 0x0000059000017945 */
/* 0x000fe80003800000 */
/*00b0*/ ISETP.GE.U32.AND P0, PT, R15, c[0x0][0x180], PT ; /* 0x000060000f007a0c */
/* 0x000fc40003f06070 */
/*00c0*/ SHF.R.S32.HI R0, RZ, 0x1f, R15 ; /* 0x0000001fff007819 */
/* 0x000fc8000001140f */
/*00d0*/ ISETP.GE.U32.AND.EX P0, PT, R0, c[0x0][0x184], PT, P0 ; /* 0x0000610000007a0c */
/* 0x000fda0003f06100 */
/*00e0*/ @P0 BRA 0x630 ; /* 0x0000054000000947 */
/* 0x000fea0003800000 */
/*00f0*/ IMAD.SHL.U32 R14, R15.reuse, 0x4, RZ ; /* 0x000000040f0e7824 */
/* 0x040fe200078e00ff */
/*0100*/ SHF.L.U64.HI R15, R15, 0x2, R0 ; /* 0x000000020f0f7819 */
/* 0x000fc80000010200 */
/*0110*/ IADD3 R2, P0, R14, c[0x0][0x178], RZ ; /* 0x00005e000e027a10 */
/* 0x000fc80007f1e0ff */
/*0120*/ IADD3.X R3, R15, c[0x0][0x17c], RZ, P0, !PT ; /* 0x00005f000f037a10 */
/* 0x000fca00007fe4ff */
/*0130*/ LDG.E R5, [R2.64] ; /* 0x0000000402057981 */
/* 0x000ea2000c1e1900 */
/*0140*/ BSSY B0, 0x560 ; /* 0x0000041000007945 */
/* 0x000fe20003800000 */
/*0150*/ FSETP.GE.AND P0, PT, R5, RZ, PT ; /* 0x000000ff0500720b */
/* 0x004fda0003f06000 */
/*0160*/ @!P0 BRA 0x350 ; /* 0x000001e000008947 */
/* 0x000fea0003800000 */
/*0170*/ IMAD.MOV.U32 R0, RZ, RZ, 0x3bbb989d ; /* 0x3bbb989dff007424 */
/* 0x000fe200078e00ff */
/*0180*/ BSSY B2, 0x340 ; /* 0x000001b000027945 */
/* 0x000fe20003800000 */
/*0190*/ IMAD.MOV.U32 R3, RZ, RZ, 0x437c0000 ; /* 0x437c0000ff037424 */
/* 0x000fe400078e00ff */
/*01a0*/ FFMA.SAT R0, -R5, R0, 0.5 ; /* 0x3f00000005007423 */
/* 0x000fc80000002100 */
/*01b0*/ FFMA.RM R0, R0, R3, 12582913 ; /* 0x4b40000100007423 */
/* 0x000fc80000004003 */
/*01c0*/ FADD R2, R0.reuse, -12583039 ; /* 0xcb40007f00027421 */
/* 0x040fe40000000000 */
/*01d0*/ IMAD.SHL.U32 R0, R0, 0x800000, RZ ; /* 0x0080000000007824 */
/* 0x000fe400078e00ff */
/*01e0*/ FFMA R2, -R5, 1.4426950216293334961, -R2 ; /* 0x3fb8aa3b05027823 */
/* 0x000fc80000000902 */
/*01f0*/ FFMA R10, -R5, 1.925963033500011079e-08, R2 ; /* 0x32a57060050a7823 */
/* 0x000fc80000000102 */
/*0200*/ MUFU.EX2 R3, R10 ; /* 0x0000000a00037308 */
/* 0x000e240000000800 */
/*0210*/ FMUL R0, R0, R3 ; /* 0x0000000300007220 */
/* 0x001fcc0000400000 */
/*0220*/ F2F.F64.F32 R2, R0 ; /* 0x0000000000027310 */
/* 0x000e240000201800 */
/*0230*/ DADD R8, R2, 1 ; /* 0x3ff0000002087429 */
/* 0x001e0c0000000000 */
/*0240*/ MUFU.RCP64H R3, R9 ; /* 0x0000000900037308 */
/* 0x001e280000001800 */
/*0250*/ IADD3 R2, R9, 0x300402, RZ ; /* 0x0030040209027810 */
/* 0x000fc80007ffe0ff */
/*0260*/ FSETP.GEU.AND P0, PT, |R2|, 5.8789094863358348022e-39, PT ; /* 0x004004020200780b */
/* 0x000fe40003f0e200 */
/*0270*/ DFMA R4, -R8, R2, 1 ; /* 0x3ff000000804742b */
/* 0x001e0c0000000102 */
/*0280*/ DFMA R4, R4, R4, R4 ; /* 0x000000040404722b */
/* 0x001e0c0000000004 */
/*0290*/ DFMA R4, R2, R4, R2 ; /* 0x000000040204722b */
/* 0x001e0c0000000002 */
/*02a0*/ DFMA R6, -R8, R4, 1 ; /* 0x3ff000000806742b */
/* 0x001e0c0000000104 */
/*02b0*/ DFMA R2, R4, R6, R4 ; /* 0x000000060402722b */
/* 0x0010620000000004 */
/*02c0*/ @P0 BRA 0x330 ; /* 0x0000006000000947 */
/* 0x000fea0003800000 */
/*02d0*/ LOP3.LUT R0, R9, 0x7fffffff, RZ, 0xc0, !PT ; /* 0x7fffffff09007812 */
/* 0x000fc800078ec0ff */
/*02e0*/ IADD3 R6, R0, -0x100000, RZ ; /* 0xfff0000000067810 */
/* 0x001fe40007ffe0ff */
/*02f0*/ MOV R0, 0x310 ; /* 0x0000031000007802 */
/* 0x000fe40000000f00 */
/*0300*/ CALL.REL.NOINC 0x6b0 ; /* 0x000003a000007944 */
/* 0x002fea0003c00000 */
/*0310*/ IMAD.MOV.U32 R2, RZ, RZ, R4 ; /* 0x000000ffff027224 */
/* 0x002fe400078e0004 */
/*0320*/ IMAD.MOV.U32 R3, RZ, RZ, R5 ; /* 0x000000ffff037224 */
/* 0x000fe400078e0005 */
/*0330*/ BSYNC B2 ; /* 0x0000000000027941 */
/* 0x000fea0003800000 */
/*0340*/ BRA 0x550 ; /* 0x0000020000007947 */
/* 0x000fea0003800000 */
/*0350*/ IMAD.MOV.U32 R0, RZ, RZ, 0x3bbb989d ; /* 0x3bbb989dff007424 */
/* 0x000fe200078e00ff */
/*0360*/ BSSY B2, 0x550 ; /* 0x000001e000027945 */
/* 0x000fe20003800000 */
/*0370*/ IMAD.MOV.U32 R3, RZ, RZ, 0x437c0000 ; /* 0x437c0000ff037424 */
/* 0x000fe400078e00ff */
/*0380*/ FFMA.SAT R0, R5, R0, 0.5 ; /* 0x3f00000005007423 */
/* 0x000fc80000002000 */
/*0390*/ FFMA.RM R0, R0, R3, 12582913 ; /* 0x4b40000100007423 */
/* 0x000fc80000004003 */
/*03a0*/ FADD R2, R0.reuse, -12583039 ; /* 0xcb40007f00027421 */
/* 0x040fe40000000000 */
/*03b0*/ IMAD.SHL.U32 R0, R0, 0x800000, RZ ; /* 0x0080000000007824 */
/* 0x000fe400078e00ff */
/*03c0*/ FFMA R2, R5, 1.4426950216293334961, -R2 ; /* 0x3fb8aa3b05027823 */
/* 0x000fc80000000802 */
/*03d0*/ FFMA R10, R5, 1.925963033500011079e-08, R2 ; /* 0x32a57060050a7823 */
/* 0x000fe40000000002 */
/*03e0*/ IMAD.MOV.U32 R2, RZ, RZ, 0x1 ; /* 0x00000001ff027424 */
/* 0x000fe400078e00ff */
/*03f0*/ MUFU.EX2 R3, R10 ; /* 0x0000000a00037308 */
/* 0x000e240000000800 */
/*0400*/ FMUL R0, R0, R3 ; /* 0x0000000300007220 */
/* 0x001fcc0000400000 */
/*0410*/ F2F.F64.F32 R6, R0 ; /* 0x0000000000067310 */
/* 0x000e240000201800 */
/*0420*/ DADD R4, R6, 1 ; /* 0x3ff0000006047429 */
/* 0x001e220000000000 */
/*0430*/ FSETP.GEU.AND P1, PT, |R7|, 6.5827683646048100446e-37, PT ; /* 0x036000000700780b */
/* 0x000fca0003f2e200 */
/*0440*/ MUFU.RCP64H R3, R5 ; /* 0x0000000500037308 */
/* 0x001e240000001800 */
/*0450*/ DFMA R8, -R4, R2, 1 ; /* 0x3ff000000408742b */
/* 0x001e0c0000000102 */
/*0460*/ DFMA R8, R8, R8, R8 ; /* 0x000000080808722b */
/* 0x001e0c0000000008 */
/*0470*/ DFMA R8, R2, R8, R2 ; /* 0x000000080208722b */
/* 0x001e0c0000000002 */
/*0480*/ DFMA R2, -R4, R8, 1 ; /* 0x3ff000000402742b */
/* 0x001e0c0000000108 */
/*0490*/ DFMA R2, R8, R2, R8 ; /* 0x000000020802722b */
/* 0x001e0c0000000008 */
/*04a0*/ DMUL R8, R6, R2 ; /* 0x0000000206087228 */
/* 0x001e0c0000000000 */
/*04b0*/ DFMA R10, -R4, R8, R6 ; /* 0x00000008040a722b */
/* 0x001e0c0000000106 */
/*04c0*/ DFMA R2, R2, R10, R8 ; /* 0x0000000a0202722b */
/* 0x001e140000000008 */
/*04d0*/ FFMA R0, RZ, R5, R3 ; /* 0x00000005ff007223 */
/* 0x001fca0000000003 */
/*04e0*/ FSETP.GT.AND P0, PT, |R0|, 1.469367938527859385e-39, PT ; /* 0x001000000000780b */
/* 0x000fda0003f04200 */
/*04f0*/ @P0 BRA P1, 0x540 ; /* 0x0000004000000947 */
/* 0x000fea0000800000 */
/*0500*/ MOV R0, 0x520 ; /* 0x0000052000007802 */
/* 0x000fe40000000f00 */
/*0510*/ CALL.REL.NOINC 0x950 ; /* 0x0000043000007944 */
/* 0x000fea0003c00000 */
/*0520*/ IMAD.MOV.U32 R2, RZ, RZ, R10 ; /* 0x000000ffff027224 */
/* 0x000fe400078e000a */
/*0530*/ IMAD.MOV.U32 R3, RZ, RZ, R11 ; /* 0x000000ffff037224 */
/* 0x000fe400078e000b */
/*0540*/ BSYNC B2 ; /* 0x0000000000027941 */
/* 0x000fea0003800000 */
/*0550*/ BSYNC B0 ; /* 0x0000000000007941 */
/* 0x000fea0003800000 */
/*0560*/ IADD3 R6, P1, R14.reuse, c[0x0][0x170], RZ ; /* 0x00005c000e067a10 */
/* 0x041fe40007f3e0ff */
/*0570*/ IADD3 R4, P0, R14, c[0x0][0x168], RZ ; /* 0x00005a000e047a10 */
/* 0x000fe40007f1e0ff */
/*0580*/ IADD3.X R7, R15.reuse, c[0x0][0x174], RZ, P1, !PT ; /* 0x00005d000f077a10 */
/* 0x040fe40000ffe4ff */
/*0590*/ IADD3.X R5, R15, c[0x0][0x16c], RZ, P0, !PT ; /* 0x00005b000f057a10 */
/* 0x000fc800007fe4ff */
/*05a0*/ LDG.E R7, [R6.64] ; /* 0x0000000406077981 */
/* 0x000ea8000c1e1900 */
/*05b0*/ LDG.E R4, [R4.64] ; /* 0x0000000404047981 */
/* 0x000ee2000c1e1900 */
/*05c0*/ F2F.F32.F64 R3, R2 ; /* 0x0000000200037310 */
/* 0x002e220000301000 */
/*05d0*/ IADD3 R14, P0, R14, c[0x0][0x160], RZ ; /* 0x000058000e0e7a10 */
/* 0x000fc80007f1e0ff */
/*05e0*/ IADD3.X R15, R15, c[0x0][0x164], RZ, P0, !PT ; /* 0x000059000f0f7a10 */
/* 0x000fe200007fe4ff */
/*05f0*/ FADD R0, -R3, 1 ; /* 0x3f80000003007421 */
/* 0x001fc80000000100 */
/*0600*/ FMUL R0, R0, R7 ; /* 0x0000000700007220 */
/* 0x004fc80000400000 */
/*0610*/ FFMA R9, R4, R3, R0 ; /* 0x0000000304097223 */
/* 0x008fca0000000000 */
/*0620*/ STG.E [R14.64], R9 ; /* 0x000000090e007986 */
/* 0x0001e4000c101904 */
/*0630*/ BSYNC B1 ; /* 0x0000000000017941 */
/* 0x000fea0003800000 */
/*0640*/ IMAD.MOV.U32 R3, RZ, RZ, c[0x0][0x0] ; /* 0x00000000ff037624 */
/* 0x000fc800078e00ff */
/*0650*/ IMAD R12, R3, c[0x0][0xc], R12 ; /* 0x00000300030c7a24 */
/* 0x000fca00078e020c */
/*0660*/ ISETP.GE.U32.AND P0, PT, R12, c[0x0][0x180], PT ; /* 0x000060000c007a0c */
/* 0x000fe40003f06070 */
/*0670*/ SHF.R.S32.HI R0, RZ, 0x1f, R12 ; /* 0x0000001fff007819 */
/* 0x000fc8000001140c */
/*0680*/ ISETP.GE.U32.AND.EX P0, PT, R0, c[0x0][0x184], PT, P0 ; /* 0x0000610000007a0c */
/* 0x000fda0003f06100 */
/*0690*/ @!P0 BRA 0x90 ; /* 0xfffff9f000008947 */
/* 0x000fea000383ffff */
/*06a0*/ EXIT ; /* 0x000000000000794d */
/* 0x000fea0003800000 */
/*06b0*/ IMAD.MOV.U32 R2, RZ, RZ, R8 ; /* 0x000000ffff027224 */
/* 0x000fe200078e0008 */
/*06c0*/ BSSY B3, 0x920 ; /* 0x0000025000037945 */
/* 0x000fe20003800000 */
/*06d0*/ IMAD.MOV.U32 R3, RZ, RZ, R9 ; /* 0x000000ffff037224 */
/* 0x000fcc00078e0009 */
/*06e0*/ DSETP.GTU.AND P0, PT, |R2|, +INF , PT ; /* 0x7ff000000200742a */
/* 0x000e1c0003f0c200 */
/*06f0*/ @P0 BRA 0x8f0 ; /* 0x000001f000000947 */
/* 0x001fea0003800000 */
/*0700*/ LOP3.LUT R8, R9, 0x7fffffff, RZ, 0xc0, !PT ; /* 0x7fffffff09087812 */
/* 0x000fc800078ec0ff */
/*0710*/ IADD3 R4, R8, -0x1, RZ ; /* 0xffffffff08047810 */
/* 0x000fc80007ffe0ff */
/*0720*/ ISETP.GE.U32.AND P0, PT, R4, 0x7fefffff, PT ; /* 0x7fefffff0400780c */
/* 0x000fda0003f06070 */
/*0730*/ @P0 LOP3.LUT R5, R3, 0x7ff00000, RZ, 0x3c, !PT ; /* 0x7ff0000003050812 */
/* 0x000fe200078e3cff */
/*0740*/ @P0 IMAD.MOV.U32 R4, RZ, RZ, RZ ; /* 0x000000ffff040224 */
/* 0x000fe200078e00ff */
/*0750*/ @P0 BRA 0x910 ; /* 0x000001b000000947 */
/* 0x000fea0003800000 */
/*0760*/ ISETP.GE.U32.AND P0, PT, R8, 0x1000001, PT ; /* 0x010000010800780c */
/* 0x000fda0003f06070 */
/*0770*/ @!P0 BRA 0x850 ; /* 0x000000d000008947 */
/* 0x000fea0003800000 */
/*0780*/ IADD3 R5, R3, -0x3fe00000, RZ ; /* 0xc020000003057810 */
/* 0x000fe20007ffe0ff */
/*0790*/ IMAD.MOV.U32 R4, RZ, RZ, R2 ; /* 0x000000ffff047224 */
/* 0x000fc600078e0002 */
/*07a0*/ MUFU.RCP64H R7, R5 ; /* 0x0000000500077308 */
/* 0x000e260000001800 */
/*07b0*/ DFMA R8, -R4, R6, 1 ; /* 0x3ff000000408742b */
/* 0x001e0c0000000106 */
/*07c0*/ DFMA R8, R8, R8, R8 ; /* 0x000000080808722b */
/* 0x001e0c0000000008 */
/*07d0*/ DFMA R8, R6, R8, R6 ; /* 0x000000080608722b */
/* 0x001e0c0000000006 */
/*07e0*/ DFMA R6, -R4, R8, 1 ; /* 0x3ff000000406742b */
/* 0x001e0c0000000108 */
/*07f0*/ DFMA R6, R8, R6, R8 ; /* 0x000000060806722b */
/* 0x001e0c0000000008 */
/*0800*/ DMUL R6, R6, 2.2250738585072013831e-308 ; /* 0x0010000006067828 */
/* 0x001e0c0000000000 */
/*0810*/ DFMA R2, -R2, R6, 1 ; /* 0x3ff000000202742b */
/* 0x001e0c0000000106 */
/*0820*/ DFMA R2, R2, R2, R2 ; /* 0x000000020202722b */
/* 0x001e0c0000000002 */
/*0830*/ DFMA R4, R6, R2, R6 ; /* 0x000000020604722b */
/* 0x0010620000000006 */
/*0840*/ BRA 0x910 ; /* 0x000000c000007947 */
/* 0x000fea0003800000 */
/*0850*/ DMUL R2, R2, 8.11296384146066816958e+31 ; /* 0x4690000002027828 */
/* 0x000e220000000000 */
/*0860*/ IMAD.MOV.U32 R4, RZ, RZ, R6 ; /* 0x000000ffff047224 */
/* 0x000fca00078e0006 */
/*0870*/ MUFU.RCP64H R5, R3 ; /* 0x0000000300057308 */
/* 0x001e240000001800 */
/*0880*/ DFMA R6, -R2, R4, 1 ; /* 0x3ff000000206742b */
/* 0x001e0c0000000104 */
/*0890*/ DFMA R6, R6, R6, R6 ; /* 0x000000060606722b */
/* 0x001e0c0000000006 */
/*08a0*/ DFMA R6, R4, R6, R4 ; /* 0x000000060406722b */
/* 0x001e0c0000000004 */
/*08b0*/ DFMA R4, -R2, R6, 1 ; /* 0x3ff000000204742b */
/* 0x001e0c0000000106 */
/*08c0*/ DFMA R4, R6, R4, R6 ; /* 0x000000040604722b */
/* 0x001e0c0000000006 */
/*08d0*/ DMUL R4, R4, 8.11296384146066816958e+31 ; /* 0x4690000004047828 */
/* 0x001e220000000000 */
/*08e0*/ BRA 0x910 ; /* 0x0000002000007947 */
/* 0x000fea0003800000 */
/*08f0*/ LOP3.LUT R5, R3, 0x80000, RZ, 0xfc, !PT ; /* 0x0008000003057812 */
/* 0x000fe200078efcff */
/*0900*/ IMAD.MOV.U32 R4, RZ, RZ, R2 ; /* 0x000000ffff047224 */
/* 0x000fe400078e0002 */
/*0910*/ BSYNC B3 ; /* 0x0000000000037941 */
/* 0x000fea0003800000 */
/*0920*/ IMAD.MOV.U32 R2, RZ, RZ, R0 ; /* 0x000000ffff027224 */
/* 0x001fe400078e0000 */
/*0930*/ IMAD.MOV.U32 R3, RZ, RZ, 0x0 ; /* 0x00000000ff037424 */
/* 0x000fc800078e00ff */
/*0940*/ RET.REL.NODEC R2 0x0 ; /* 0xfffff6b002007950 */
/* 0x000fea0003c3ffff */
/*0950*/ FSETP.GEU.AND P0, PT, |R5|.reuse, 1.469367938527859385e-39, PT ; /* 0x001000000500780b */
/* 0x040fe20003f0e200 */
/*0960*/ IMAD.MOV.U32 R17, RZ, RZ, 0x1ca00000 ; /* 0x1ca00000ff117424 */
/* 0x000fe200078e00ff */
/*0970*/ LOP3.LUT R2, R5, 0x800fffff, RZ, 0xc0, !PT ; /* 0x800fffff05027812 */
/* 0x000fe200078ec0ff */
/*0980*/ IMAD.MOV.U32 R18, RZ, RZ, 0x1 ; /* 0x00000001ff127424 */
/* 0x000fe200078e00ff */
/*0990*/ FSETP.GEU.AND P2, PT, |R7|.reuse, 1.469367938527859385e-39, PT ; /* 0x001000000700780b */
/* 0x040fe20003f4e200 */
/*09a0*/ IMAD.MOV.U32 R8, RZ, RZ, R6 ; /* 0x000000ffff087224 */
/* 0x000fe200078e0006 */
/*09b0*/ LOP3.LUT R3, R2, 0x3ff00000, RZ, 0xfc, !PT ; /* 0x3ff0000002037812 */
/* 0x000fe200078efcff */
/*09c0*/ IMAD.MOV.U32 R2, RZ, RZ, R4 ; /* 0x000000ffff027224 */
/* 0x000fe200078e0004 */
/*09d0*/ LOP3.LUT R16, R7, 0x7ff00000, RZ, 0xc0, !PT ; /* 0x7ff0000007107812 */
/* 0x000fe200078ec0ff */
/*09e0*/ BSSY B3, 0xee0 ; /* 0x000004f000037945 */
/* 0x000fe20003800000 */
/*09f0*/ LOP3.LUT R23, R5, 0x7ff00000, RZ, 0xc0, !PT ; /* 0x7ff0000005177812 */
/* 0x000fc600078ec0ff */
/*0a00*/ @!P0 DMUL R2, R4, 8.98846567431157953865e+307 ; /* 0x7fe0000004028828 */
/* 0x000e220000000000 */
/*0a10*/ ISETP.GE.U32.AND P1, PT, R16.reuse, R23, PT ; /* 0x000000171000720c */
/* 0x040fe20003f26070 */
/*0a20*/ IMAD.MOV.U32 R22, RZ, RZ, R16 ; /* 0x000000ffff167224 */
/* 0x000fe400078e0010 */
/*0a30*/ @!P2 LOP3.LUT R9, R5, 0x7ff00000, RZ, 0xc0, !PT ; /* 0x7ff000000509a812 */
/* 0x000fe200078ec0ff */
/*0a40*/ @!P2 IMAD.MOV.U32 R10, RZ, RZ, RZ ; /* 0x000000ffff0aa224 */
/* 0x000fe200078e00ff */
/*0a50*/ MUFU.RCP64H R19, R3 ; /* 0x0000000300137308 */
/* 0x001e240000001800 */
/*0a60*/ @!P2 ISETP.GE.U32.AND P3, PT, R16, R9, PT ; /* 0x000000091000a20c */
/* 0x000fe40003f66070 */
/*0a70*/ SEL R9, R17, 0x63400000, !P1 ; /* 0x6340000011097807 */
/* 0x000fc40004800000 */
/*0a80*/ @!P2 SEL R11, R17, 0x63400000, !P3 ; /* 0x63400000110ba807 */
/* 0x000fe40005800000 */
/*0a90*/ LOP3.LUT R9, R9, 0x800fffff, R7.reuse, 0xf8, !PT ; /* 0x800fffff09097812 */
/* 0x100fe400078ef807 */
/*0aa0*/ @!P2 LOP3.LUT R11, R11, 0x80000000, R7, 0xf8, !PT ; /* 0x800000000b0ba812 */
/* 0x000fe400078ef807 */
/*0ab0*/ @!P0 LOP3.LUT R23, R3, 0x7ff00000, RZ, 0xc0, !PT ; /* 0x7ff0000003178812 */
/* 0x000fe400078ec0ff */
/*0ac0*/ @!P2 LOP3.LUT R11, R11, 0x100000, RZ, 0xfc, !PT ; /* 0x001000000b0ba812 */
/* 0x000fe200078efcff */
/*0ad0*/ DFMA R20, R18, -R2, 1 ; /* 0x3ff000001214742b */
/* 0x001e220000000802 */
/*0ae0*/ IADD3 R24, R23, -0x1, RZ ; /* 0xffffffff17187810 */
/* 0x000fc80007ffe0ff */
/*0af0*/ @!P2 DFMA R8, R8, 2, -R10 ; /* 0x400000000808a82b */
/* 0x000fc8000000080a */
/*0b00*/ DFMA R20, R20, R20, R20 ; /* 0x000000141414722b */
/* 0x001e0c0000000014 */
/*0b10*/ DFMA R18, R18, R20, R18 ; /* 0x000000141212722b */
/* 0x0010620000000012 */
/*0b20*/ @!P2 LOP3.LUT R22, R9, 0x7ff00000, RZ, 0xc0, !PT ; /* 0x7ff000000916a812 */
/* 0x000fc800078ec0ff */
/*0b30*/ IADD3 R20, R22, -0x1, RZ ; /* 0xffffffff16147810 */
/* 0x001fe20007ffe0ff */
/*0b40*/ DFMA R10, R18, -R2, 1 ; /* 0x3ff00000120a742b */
/* 0x002e060000000802 */
/*0b50*/ ISETP.GT.U32.AND P0, PT, R20, 0x7feffffe, PT ; /* 0x7feffffe1400780c */
/* 0x000fc60003f04070 */
/*0b60*/ DFMA R18, R18, R10, R18 ; /* 0x0000000a1212722b */
/* 0x001e220000000012 */
/*0b70*/ ISETP.GT.U32.OR P0, PT, R24, 0x7feffffe, P0 ; /* 0x7feffffe1800780c */
/* 0x000fca0000704470 */
/*0b80*/ DMUL R10, R18, R8 ; /* 0x00000008120a7228 */
/* 0x001e0c0000000000 */
/*0b90*/ DFMA R20, R10, -R2, R8 ; /* 0x800000020a14722b */
/* 0x001e0c0000000008 */
/*0ba0*/ DFMA R20, R18, R20, R10 ; /* 0x000000141214722b */
/* 0x001062000000000a */
/*0bb0*/ @P0 BRA 0xd80 ; /* 0x000001c000000947 */
/* 0x000fea0003800000 */
/*0bc0*/ LOP3.LUT R7, R5, 0x7ff00000, RZ, 0xc0, !PT ; /* 0x7ff0000005077812 */
/* 0x000fc800078ec0ff */
/*0bd0*/ ISETP.GE.U32.AND P0, PT, R16.reuse, R7, PT ; /* 0x000000071000720c */
/* 0x040fe20003f06070 */
/*0be0*/ IMAD.IADD R6, R16, 0x1, -R7 ; /* 0x0000000110067824 */
/* 0x000fc600078e0a07 */
/*0bf0*/ SEL R17, R17, 0x63400000, !P0 ; /* 0x6340000011117807 */
/* 0x000fe40004000000 */
/*0c00*/ IMNMX R6, R6, -0x46a00000, !PT ; /* 0xb960000006067817 */
/* 0x000fc80007800200 */
/*0c10*/ IMNMX R6, R6, 0x46a00000, PT ; /* 0x46a0000006067817 */
/* 0x000fca0003800200 */
/*0c20*/ IMAD.IADD R16, R6, 0x1, -R17 ; /* 0x0000000106107824 */
/* 0x000fe400078e0a11 */
/*0c30*/ IMAD.MOV.U32 R6, RZ, RZ, RZ ; /* 0x000000ffff067224 */
/* 0x000fc600078e00ff */
/*0c40*/ IADD3 R7, R16, 0x7fe00000, RZ ; /* 0x7fe0000010077810 */
/* 0x000fcc0007ffe0ff */
/*0c50*/ DMUL R10, R20, R6 ; /* 0x00000006140a7228 */
/* 0x003e140000000000 */
/*0c60*/ FSETP.GTU.AND P0, PT, |R11|, 1.469367938527859385e-39, PT ; /* 0x001000000b00780b */
/* 0x001fda0003f0c200 */
/*0c70*/ @P0 BRA 0xed0 ; /* 0x0000025000000947 */
/* 0x000fea0003800000 */
/*0c80*/ DFMA R2, R20, -R2, R8 ; /* 0x800000021402722b */
/* 0x000e220000000008 */
/*0c90*/ IMAD.MOV.U32 R6, RZ, RZ, RZ ; /* 0x000000ffff067224 */
/* 0x000fd200078e00ff */
/*0ca0*/ FSETP.NEU.AND P0, PT, R3.reuse, RZ, PT ; /* 0x000000ff0300720b */
/* 0x041fe40003f0d000 */
/*0cb0*/ LOP3.LUT R5, R3, 0x80000000, R5, 0x48, !PT ; /* 0x8000000003057812 */
/* 0x000fc800078e4805 */
/*0cc0*/ LOP3.LUT R7, R5, R7, RZ, 0xfc, !PT ; /* 0x0000000705077212 */
/* 0x000fce00078efcff */
/*0cd0*/ @!P0 BRA 0xed0 ; /* 0x000001f000008947 */
/* 0x000fea0003800000 */
/*0ce0*/ IMAD.MOV R3, RZ, RZ, -R16 ; /* 0x000000ffff037224 */
/* 0x000fe200078e0a10 */
/*0cf0*/ DMUL.RP R6, R20, R6 ; /* 0x0000000614067228 */
/* 0x000e220000008000 */
/*0d00*/ IMAD.MOV.U32 R2, RZ, RZ, RZ ; /* 0x000000ffff027224 */
/* 0x000fcc00078e00ff */
/*0d10*/ DFMA R2, R10, -R2, R20 ; /* 0x800000020a02722b */
/* 0x000e460000000014 */
/*0d20*/ LOP3.LUT R5, R7, R5, RZ, 0x3c, !PT ; /* 0x0000000507057212 */
/* 0x001fc600078e3cff */
/*0d30*/ IADD3 R2, -R16, -0x43300000, RZ ; /* 0xbcd0000010027810 */
/* 0x002fc80007ffe1ff */
/*0d40*/ FSETP.NEU.AND P0, PT, |R3|, R2, PT ; /* 0x000000020300720b */
/* 0x000fc80003f0d200 */
/*0d50*/ FSEL R10, R6, R10, !P0 ; /* 0x0000000a060a7208 */
/* 0x000fe40004000000 */
/*0d60*/ FSEL R11, R5, R11, !P0 ; /* 0x0000000b050b7208 */
/* 0x000fe20004000000 */
/*0d70*/ BRA 0xed0 ; /* 0x0000015000007947 */
/* 0x000fea0003800000 */
/*0d80*/ DSETP.NAN.AND P0, PT, R6, R6, PT ; /* 0x000000060600722a */
/* 0x000e9c0003f08000 */
/*0d90*/ @P0 BRA 0xeb0 ; /* 0x0000011000000947 */
/* 0x004fea0003800000 */
/*0da0*/ DSETP.NAN.AND P0, PT, R4, R4, PT ; /* 0x000000040400722a */
/* 0x000e9c0003f08000 */
/*0db0*/ @P0 BRA 0xe80 ; /* 0x000000c000000947 */
/* 0x004fea0003800000 */
/*0dc0*/ ISETP.NE.AND P0, PT, R22, R23, PT ; /* 0x000000171600720c */
/* 0x000fe20003f05270 */
/*0dd0*/ IMAD.MOV.U32 R10, RZ, RZ, 0x0 ; /* 0x00000000ff0a7424 */
/* 0x001fe400078e00ff */
/*0de0*/ IMAD.MOV.U32 R11, RZ, RZ, -0x80000 ; /* 0xfff80000ff0b7424 */
/* 0x000fd400078e00ff */
/*0df0*/ @!P0 BRA 0xed0 ; /* 0x000000d000008947 */
/* 0x000fea0003800000 */
/*0e00*/ ISETP.NE.AND P0, PT, R22, 0x7ff00000, PT ; /* 0x7ff000001600780c */
/* 0x000fe40003f05270 */
/*0e10*/ LOP3.LUT R11, R7, 0x80000000, R5, 0x48, !PT ; /* 0x80000000070b7812 */
/* 0x000fe400078e4805 */
/*0e20*/ ISETP.EQ.OR P0, PT, R23, RZ, !P0 ; /* 0x000000ff1700720c */
/* 0x000fda0004702670 */
/*0e30*/ @P0 LOP3.LUT R2, R11, 0x7ff00000, RZ, 0xfc, !PT ; /* 0x7ff000000b020812 */
/* 0x000fe200078efcff */
/*0e40*/ @!P0 IMAD.MOV.U32 R10, RZ, RZ, RZ ; /* 0x000000ffff0a8224 */
/* 0x000fe400078e00ff */
/*0e50*/ @P0 IMAD.MOV.U32 R10, RZ, RZ, RZ ; /* 0x000000ffff0a0224 */
/* 0x000fe400078e00ff */
/*0e60*/ @P0 IMAD.MOV.U32 R11, RZ, RZ, R2 ; /* 0x000000ffff0b0224 */
/* 0x000fe200078e0002 */
/*0e70*/ BRA 0xed0 ; /* 0x0000005000007947 */
/* 0x000fea0003800000 */
/*0e80*/ LOP3.LUT R11, R5, 0x80000, RZ, 0xfc, !PT ; /* 0x00080000050b7812 */
/* 0x001fe200078efcff */
/*0e90*/ IMAD.MOV.U32 R10, RZ, RZ, R4 ; /* 0x000000ffff0a7224 */
/* 0x000fe200078e0004 */
/*0ea0*/ BRA 0xed0 ; /* 0x0000002000007947 */
/* 0x000fea0003800000 */
/*0eb0*/ LOP3.LUT R11, R7, 0x80000, RZ, 0xfc, !PT ; /* 0x00080000070b7812 */
/* 0x001fe200078efcff */
/*0ec0*/ IMAD.MOV.U32 R10, RZ, RZ, R6 ; /* 0x000000ffff0a7224 */
/* 0x000fe400078e0006 */
/*0ed0*/ BSYNC B3 ; /* 0x0000000000037941 */
/* 0x000fea0003800000 */
/*0ee0*/ IMAD.MOV.U32 R2, RZ, RZ, R0 ; /* 0x000000ffff027224 */
/* 0x000fe400078e0000 */
/*0ef0*/ IMAD.MOV.U32 R3, RZ, RZ, 0x0 ; /* 0x00000000ff037424 */
/* 0x000fc800078e00ff */
/*0f00*/ RET.REL.NODEC R2 0x0 ; /* 0xfffff0f002007950 */
/* 0x000fea0003c3ffff */
/*0f10*/ BRA 0xf10; /* 0xfffffff000007947 */
/* 0x000fc0000383ffff */
/*0f20*/ NOP; /* 0x0000000000007918 */
/* 0x000fc00000000000 */
/*0f30*/ NOP; /* 0x0000000000007918 */
/* 0x000fc00000000000 */
/*0f40*/ NOP; /* 0x0000000000007918 */
/* 0x000fc00000000000 */
/*0f50*/ NOP; /* 0x0000000000007918 */
/* 0x000fc00000000000 */
/*0f60*/ NOP; /* 0x0000000000007918 */
/* 0x000fc00000000000 */
/*0f70*/ NOP; /* 0x0000000000007918 */
/* 0x000fc00000000000 */
/*0f80*/ NOP; /* 0x0000000000007918 */
/* 0x000fc00000000000 */
/*0f90*/ NOP; /* 0x0000000000007918 */
/* 0x000fc00000000000 */
/*0fa0*/ NOP; /* 0x0000000000007918 */
/* 0x000fc00000000000 */
/*0fb0*/ NOP; /* 0x0000000000007918 */
/* 0x000fc00000000000 */
/*0fc0*/ NOP; /* 0x0000000000007918 */
/* 0x000fc00000000000 */
/*0fd0*/ NOP; /* 0x0000000000007918 */
/* 0x000fc00000000000 */
/*0fe0*/ NOP; /* 0x0000000000007918 */
/* 0x000fc00000000000 */
/*0ff0*/ NOP; /* 0x0000000000007918 */
/* 0x000fc00000000000 */
.......... |
You are a helpful coding assistant specialized in converting CUDA source code to CUDA host assembly. | #include "includes.h"
__device__ inline float stableSigmoid(float x) {
if(x >= 0) {
float z = expf(-x);
return 1.0 / (1.0 + z);
} else {
float z = expf(x);
return z / (1.0 + z);
}
}
__global__ void gHighwayForward(float* out, const float* in1, const float* in2, const float* t, size_t length) {
for(int bid = 0; bid < length; bid += blockDim.x * gridDim.x) {
int index = bid + blockDim.x * blockIdx.x + threadIdx.x;
if(index < length) {
float sigma = stableSigmoid(t[index]);
out[index] = in1[index] * sigma + in2[index] * (1.f - sigma);
}
}
} | .file "tmpxft_0009b26f_00000000-6_gHighwayForward.cudafe1.cpp"
.text
#APP
#NO_APP
.type _ZL26__cudaUnregisterBinaryUtilv, @function
_ZL26__cudaUnregisterBinaryUtilv:
.LFB2030:
.cfi_startproc
endbr64
subq $8, %rsp
.cfi_def_cfa_offset 16
movq _ZL20__cudaFatCubinHandle(%rip), %rdi
call __cudaUnregisterFatBinary@PLT
addq $8, %rsp
.cfi_def_cfa_offset 8
ret
.cfi_endproc
.LFE2030:
.size _ZL26__cudaUnregisterBinaryUtilv, .-_ZL26__cudaUnregisterBinaryUtilv
.globl _Z45__device_stub__Z15gHighwayForwardPfPKfS1_S1_mPfPKfS1_S1_m
.type _Z45__device_stub__Z15gHighwayForwardPfPKfS1_S1_mPfPKfS1_S1_m, @function
_Z45__device_stub__Z15gHighwayForwardPfPKfS1_S1_mPfPKfS1_S1_m:
.LFB2052:
.cfi_startproc
endbr64
subq $168, %rsp
.cfi_def_cfa_offset 176
movq %rdi, 40(%rsp)
movq %rsi, 32(%rsp)
movq %rdx, 24(%rsp)
movq %rcx, 16(%rsp)
movq %r8, 8(%rsp)
movq %fs:40, %rax
movq %rax, 152(%rsp)
xorl %eax, %eax
leaq 40(%rsp), %rax
movq %rax, 112(%rsp)
leaq 32(%rsp), %rax
movq %rax, 120(%rsp)
leaq 24(%rsp), %rax
movq %rax, 128(%rsp)
leaq 16(%rsp), %rax
movq %rax, 136(%rsp)
leaq 8(%rsp), %rax
movq %rax, 144(%rsp)
movl $1, 64(%rsp)
movl $1, 68(%rsp)
movl $1, 72(%rsp)
movl $1, 76(%rsp)
movl $1, 80(%rsp)
movl $1, 84(%rsp)
leaq 56(%rsp), %rcx
leaq 48(%rsp), %rdx
leaq 76(%rsp), %rsi
leaq 64(%rsp), %rdi
call __cudaPopCallConfiguration@PLT
testl %eax, %eax
je .L7
.L3:
movq 152(%rsp), %rax
subq %fs:40, %rax
jne .L8
addq $168, %rsp
.cfi_remember_state
.cfi_def_cfa_offset 8
ret
.L7:
.cfi_restore_state
pushq 56(%rsp)
.cfi_def_cfa_offset 184
pushq 56(%rsp)
.cfi_def_cfa_offset 192
leaq 128(%rsp), %r9
movq 92(%rsp), %rcx
movl 100(%rsp), %r8d
movq 80(%rsp), %rsi
movl 88(%rsp), %edx
leaq _Z15gHighwayForwardPfPKfS1_S1_m(%rip), %rdi
call cudaLaunchKernel@PLT
addq $16, %rsp
.cfi_def_cfa_offset 176
jmp .L3
.L8:
call __stack_chk_fail@PLT
.cfi_endproc
.LFE2052:
.size _Z45__device_stub__Z15gHighwayForwardPfPKfS1_S1_mPfPKfS1_S1_m, .-_Z45__device_stub__Z15gHighwayForwardPfPKfS1_S1_mPfPKfS1_S1_m
.globl _Z15gHighwayForwardPfPKfS1_S1_m
.type _Z15gHighwayForwardPfPKfS1_S1_m, @function
_Z15gHighwayForwardPfPKfS1_S1_m:
.LFB2053:
.cfi_startproc
endbr64
subq $8, %rsp
.cfi_def_cfa_offset 16
call _Z45__device_stub__Z15gHighwayForwardPfPKfS1_S1_mPfPKfS1_S1_m
addq $8, %rsp
.cfi_def_cfa_offset 8
ret
.cfi_endproc
.LFE2053:
.size _Z15gHighwayForwardPfPKfS1_S1_m, .-_Z15gHighwayForwardPfPKfS1_S1_m
.section .rodata.str1.8,"aMS",@progbits,1
.align 8
.LC0:
.string "_Z15gHighwayForwardPfPKfS1_S1_m"
.text
.type _ZL24__sti____cudaRegisterAllv, @function
_ZL24__sti____cudaRegisterAllv:
.LFB2055:
.cfi_startproc
endbr64
subq $8, %rsp
.cfi_def_cfa_offset 16
leaq _ZL15__fatDeviceText(%rip), %rdi
call __cudaRegisterFatBinary@PLT
movq %rax, %rdi
movq %rax, _ZL20__cudaFatCubinHandle(%rip)
pushq $0
.cfi_def_cfa_offset 24
pushq $0
.cfi_def_cfa_offset 32
pushq $0
.cfi_def_cfa_offset 40
pushq $0
.cfi_def_cfa_offset 48
movl $0, %r9d
movl $-1, %r8d
leaq .LC0(%rip), %rdx
movq %rdx, %rcx
leaq _Z15gHighwayForwardPfPKfS1_S1_m(%rip), %rsi
call __cudaRegisterFunction@PLT
addq $32, %rsp
.cfi_def_cfa_offset 16
movq _ZL20__cudaFatCubinHandle(%rip), %rdi
call __cudaRegisterFatBinaryEnd@PLT
leaq _ZL26__cudaUnregisterBinaryUtilv(%rip), %rdi
call atexit@PLT
addq $8, %rsp
.cfi_def_cfa_offset 8
ret
.cfi_endproc
.LFE2055:
.size _ZL24__sti____cudaRegisterAllv, .-_ZL24__sti____cudaRegisterAllv
.section .init_array,"aw"
.align 8
.quad _ZL24__sti____cudaRegisterAllv
.section .nvFatBinSegment,"aw"
.align 8
.type _ZL15__fatDeviceText, @object
.size _ZL15__fatDeviceText, 24
_ZL15__fatDeviceText:
.long 1180844977
.long 1
.quad fatbinData
.quad 0
.local _ZL20__cudaFatCubinHandle
.comm _ZL20__cudaFatCubinHandle,8,8
.ident "GCC: (Ubuntu 13.3.0-6ubuntu2~24.04) 13.3.0"
.section .note.GNU-stack,"",@progbits
.section .note.gnu.property,"a"
.align 8
.long 1f - 0f
.long 4f - 1f
.long 5
0:
.string "GNU"
1:
.align 8
.long 0xc0000002
.long 3f - 2f
2:
.long 0x3
3:
.align 8
4: |
You are a helpful coding assistant specialized in converting CUDA source code to HIP/AMD source code. | #include "includes.h"
__device__ inline float stableSigmoid(float x) {
if(x >= 0) {
float z = expf(-x);
return 1.0 / (1.0 + z);
} else {
float z = expf(x);
return z / (1.0 + z);
}
}
__global__ void gHighwayForward(float* out, const float* in1, const float* in2, const float* t, size_t length) {
for(int bid = 0; bid < length; bid += blockDim.x * gridDim.x) {
int index = bid + blockDim.x * blockIdx.x + threadIdx.x;
if(index < length) {
float sigma = stableSigmoid(t[index]);
out[index] = in1[index] * sigma + in2[index] * (1.f - sigma);
}
}
} | #include <hip/hip_runtime.h>
#include "includes.h"
__device__ inline float stableSigmoid(float x) {
if(x >= 0) {
float z = expf(-x);
return 1.0 / (1.0 + z);
} else {
float z = expf(x);
return z / (1.0 + z);
}
}
__global__ void gHighwayForward(float* out, const float* in1, const float* in2, const float* t, size_t length) {
for(int bid = 0; bid < length; bid += blockDim.x * gridDim.x) {
int index = bid + blockDim.x * blockIdx.x + threadIdx.x;
if(index < length) {
float sigma = stableSigmoid(t[index]);
out[index] = in1[index] * sigma + in2[index] * (1.f - sigma);
}
}
} |
You are a helpful coding assistant specialized in converting HIP source code to AMD device assembly. | #include <hip/hip_runtime.h>
#include "includes.h"
__device__ inline float stableSigmoid(float x) {
if(x >= 0) {
float z = expf(-x);
return 1.0 / (1.0 + z);
} else {
float z = expf(x);
return z / (1.0 + z);
}
}
__global__ void gHighwayForward(float* out, const float* in1, const float* in2, const float* t, size_t length) {
for(int bid = 0; bid < length; bid += blockDim.x * gridDim.x) {
int index = bid + blockDim.x * blockIdx.x + threadIdx.x;
if(index < length) {
float sigma = stableSigmoid(t[index]);
out[index] = in1[index] * sigma + in2[index] * (1.f - sigma);
}
}
} | .text
.amdgcn_target "amdgcn-amd-amdhsa--gfx1100"
.protected _Z15gHighwayForwardPfPKfS1_S1_m
.globl _Z15gHighwayForwardPfPKfS1_S1_m
.p2align 8
.type _Z15gHighwayForwardPfPKfS1_S1_m,@function
_Z15gHighwayForwardPfPKfS1_S1_m:
s_load_b64 s[8:9], s[0:1], 0x20
s_waitcnt lgkmcnt(0)
s_cmp_eq_u64 s[8:9], 0
s_cbranch_scc1 .LBB0_9
s_clause 0x2
s_load_b32 s10, s[0:1], 0x34
s_load_b32 s14, s[0:1], 0x28
s_load_b256 s[0:7], s[0:1], 0x0
s_waitcnt lgkmcnt(0)
s_and_b32 s10, s10, 0xffff
s_delay_alu instid0(SALU_CYCLE_1)
v_mad_u64_u32 v[1:2], null, s15, s10, v[0:1]
s_mul_i32 s14, s14, s10
s_mov_b32 s10, 0
s_branch .LBB0_4
.LBB0_2:
s_or_b32 exec_lo, exec_lo, s15
s_delay_alu instid0(VALU_DEP_2)
v_add_f64 v[6:7], v[6:7], 1.0
v_add_co_u32 v14, vcc_lo, s4, v2
v_add_co_ci_u32_e32 v15, vcc_lo, s5, v3, vcc_lo
v_add_co_u32 v16, vcc_lo, s2, v2
v_add_co_ci_u32_e32 v17, vcc_lo, s3, v3, vcc_lo
global_load_b32 v0, v[14:15], off
global_load_b32 v16, v[16:17], off
v_div_scale_f64 v[8:9], null, v[6:7], v[6:7], v[4:5]
v_div_scale_f64 v[14:15], vcc_lo, v[4:5], v[6:7], v[4:5]
s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_2) | instid1(VALU_DEP_1)
v_rcp_f64_e32 v[10:11], v[8:9]
s_waitcnt_depctr 0xfff
v_fma_f64 v[12:13], -v[8:9], v[10:11], 1.0
v_fma_f64 v[10:11], v[10:11], v[12:13], v[10:11]
s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
v_fma_f64 v[12:13], -v[8:9], v[10:11], 1.0
v_fma_f64 v[10:11], v[10:11], v[12:13], v[10:11]
s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
v_mul_f64 v[12:13], v[14:15], v[10:11]
v_fma_f64 v[8:9], -v[8:9], v[12:13], v[14:15]
s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_2) | instid1(VALU_DEP_3)
v_div_fmas_f64 v[8:9], v[8:9], v[10:11], v[12:13]
v_add_co_u32 v2, vcc_lo, s0, v2
v_add_co_ci_u32_e32 v3, vcc_lo, s1, v3, vcc_lo
v_div_fixup_f64 v[4:5], v[8:9], v[6:7], v[4:5]
s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
v_cvt_f32_f64_e32 v4, v[4:5]
v_sub_f32_e32 v5, 1.0, v4
s_waitcnt vmcnt(1)
s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
v_mul_f32_e32 v0, v0, v5
s_waitcnt vmcnt(0)
v_fmac_f32_e32 v0, v16, v4
global_store_b32 v[2:3], v0, off
.LBB0_3:
s_or_b32 exec_lo, exec_lo, s11
s_add_i32 s10, s14, s10
s_delay_alu instid0(SALU_CYCLE_1) | instskip(NEXT) | instid1(SALU_CYCLE_1)
s_ashr_i32 s11, s10, 31
v_cmp_ge_u64_e64 s11, s[10:11], s[8:9]
s_delay_alu instid0(VALU_DEP_1)
s_and_b32 vcc_lo, exec_lo, s11
s_cbranch_vccnz .LBB0_9
.LBB0_4:
s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
v_add_nc_u32_e32 v2, s10, v1
s_mov_b32 s11, exec_lo
v_ashrrev_i32_e32 v3, 31, v2
s_delay_alu instid0(VALU_DEP_1)
v_cmpx_gt_u64_e64 s[8:9], v[2:3]
s_cbranch_execz .LBB0_3
v_lshlrev_b64 v[2:3], 2, v[2:3]
s_mov_b32 s15, exec_lo
s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_2)
v_add_co_u32 v4, vcc_lo, s6, v2
v_add_co_ci_u32_e32 v5, vcc_lo, s7, v3, vcc_lo
global_load_b32 v0, v[4:5], off
s_waitcnt vmcnt(0)
v_cmpx_le_f32_e32 0, v0
s_xor_b32 s15, exec_lo, s15
s_cbranch_execz .LBB0_7
v_mul_f32_e32 v4, 0xbfb8aa3b, v0
v_cmp_nlt_f32_e32 vcc_lo, 0x42ce8ed0, v0
s_mov_b64 s[12:13], 1.0
s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_2)
v_rndne_f32_e32 v5, v4
v_fma_f32 v6, v0, 0xbfb8aa3b, -v4
v_sub_f32_e32 v4, v4, v5
s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_2)
v_fmac_f32_e32 v6, 0xb2a5705f, v0
v_cvt_i32_f32_e32 v5, v5
v_add_f32_e32 v4, v4, v6
s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_2) | instid1(VALU_DEP_1)
v_exp_f32_e32 v4, v4
s_waitcnt_depctr 0xfff
v_ldexp_f32 v4, v4, v5
v_cndmask_b32_e32 v4, 0, v4, vcc_lo
v_cmp_ngt_f32_e32 vcc_lo, 0xc2b17218, v0
s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
v_cndmask_b32_e32 v0, 0x7f800000, v4, vcc_lo
v_cvt_f64_f32_e32 v[6:7], v0
.LBB0_7:
s_or_saveexec_b32 s15, s15
v_dual_mov_b32 v4, s12 :: v_dual_mov_b32 v5, s13
s_xor_b32 exec_lo, exec_lo, s15
s_cbranch_execz .LBB0_2
v_mul_f32_e32 v4, 0x3fb8aa3b, v0
v_cmp_ngt_f32_e32 vcc_lo, 0xc2ce8ed0, v0
s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_2)
v_rndne_f32_e32 v5, v4
v_fma_f32 v6, v0, 0x3fb8aa3b, -v4
v_sub_f32_e32 v4, v4, v5
s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_2)
v_fmac_f32_e32 v6, 0x32a5705f, v0
v_cvt_i32_f32_e32 v5, v5
v_add_f32_e32 v4, v4, v6
s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_2) | instid1(VALU_DEP_1)
v_exp_f32_e32 v4, v4
s_waitcnt_depctr 0xfff
v_ldexp_f32 v4, v4, v5
v_cndmask_b32_e32 v4, 0, v4, vcc_lo
v_cmp_nlt_f32_e32 vcc_lo, 0x42b17218, v0
s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
v_cndmask_b32_e32 v0, 0x7f800000, v4, vcc_lo
v_cvt_f64_f32_e32 v[6:7], v0
s_delay_alu instid0(VALU_DEP_1)
v_dual_mov_b32 v4, v6 :: v_dual_mov_b32 v5, v7
s_branch .LBB0_2
.LBB0_9:
s_nop 0
s_sendmsg sendmsg(MSG_DEALLOC_VGPRS)
s_endpgm
.section .rodata,"a",@progbits
.p2align 6, 0x0
.amdhsa_kernel _Z15gHighwayForwardPfPKfS1_S1_m
.amdhsa_group_segment_fixed_size 0
.amdhsa_private_segment_fixed_size 0
.amdhsa_kernarg_size 296
.amdhsa_user_sgpr_count 15
.amdhsa_user_sgpr_dispatch_ptr 0
.amdhsa_user_sgpr_queue_ptr 0
.amdhsa_user_sgpr_kernarg_segment_ptr 1
.amdhsa_user_sgpr_dispatch_id 0
.amdhsa_user_sgpr_private_segment_size 0
.amdhsa_wavefront_size32 1
.amdhsa_uses_dynamic_stack 0
.amdhsa_enable_private_segment 0
.amdhsa_system_sgpr_workgroup_id_x 1
.amdhsa_system_sgpr_workgroup_id_y 0
.amdhsa_system_sgpr_workgroup_id_z 0
.amdhsa_system_sgpr_workgroup_info 0
.amdhsa_system_vgpr_workitem_id 0
.amdhsa_next_free_vgpr 18
.amdhsa_next_free_sgpr 16
.amdhsa_float_round_mode_32 0
.amdhsa_float_round_mode_16_64 0
.amdhsa_float_denorm_mode_32 3
.amdhsa_float_denorm_mode_16_64 3
.amdhsa_dx10_clamp 1
.amdhsa_ieee_mode 1
.amdhsa_fp16_overflow 0
.amdhsa_workgroup_processor_mode 1
.amdhsa_memory_ordered 1
.amdhsa_forward_progress 0
.amdhsa_shared_vgpr_count 0
.amdhsa_exception_fp_ieee_invalid_op 0
.amdhsa_exception_fp_denorm_src 0
.amdhsa_exception_fp_ieee_div_zero 0
.amdhsa_exception_fp_ieee_overflow 0
.amdhsa_exception_fp_ieee_underflow 0
.amdhsa_exception_fp_ieee_inexact 0
.amdhsa_exception_int_div_zero 0
.end_amdhsa_kernel
.text
.Lfunc_end0:
.size _Z15gHighwayForwardPfPKfS1_S1_m, .Lfunc_end0-_Z15gHighwayForwardPfPKfS1_S1_m
.section .AMDGPU.csdata,"",@progbits
.text
.p2alignl 7, 3214868480
.fill 96, 4, 3214868480
.type __hip_cuid_,@object
.section .bss,"aw",@nobits
.globl __hip_cuid_
__hip_cuid_:
.byte 0
.size __hip_cuid_, 1
.ident "AMD clang version 18.0.0git (https://github.com/RadeonOpenCompute/llvm-project roc-6.3.2 25012 e5bf7e55c91490b07c49d8960fa7983d864936c4)"
.section ".note.GNU-stack","",@progbits
.addrsig
.addrsig_sym __hip_cuid_
.amdgpu_metadata
---
amdhsa.kernels:
- .args:
- .address_space: global
.offset: 0
.size: 8
.value_kind: global_buffer
- .address_space: global
.offset: 8
.size: 8
.value_kind: global_buffer
- .address_space: global
.offset: 16
.size: 8
.value_kind: global_buffer
- .address_space: global
.offset: 24
.size: 8
.value_kind: global_buffer
- .offset: 32
.size: 8
.value_kind: by_value
- .offset: 40
.size: 4
.value_kind: hidden_block_count_x
- .offset: 44
.size: 4
.value_kind: hidden_block_count_y
- .offset: 48
.size: 4
.value_kind: hidden_block_count_z
- .offset: 52
.size: 2
.value_kind: hidden_group_size_x
- .offset: 54
.size: 2
.value_kind: hidden_group_size_y
- .offset: 56
.size: 2
.value_kind: hidden_group_size_z
- .offset: 58
.size: 2
.value_kind: hidden_remainder_x
- .offset: 60
.size: 2
.value_kind: hidden_remainder_y
- .offset: 62
.size: 2
.value_kind: hidden_remainder_z
- .offset: 80
.size: 8
.value_kind: hidden_global_offset_x
- .offset: 88
.size: 8
.value_kind: hidden_global_offset_y
- .offset: 96
.size: 8
.value_kind: hidden_global_offset_z
- .offset: 104
.size: 2
.value_kind: hidden_grid_dims
.group_segment_fixed_size: 0
.kernarg_segment_align: 8
.kernarg_segment_size: 296
.language: OpenCL C
.language_version:
- 2
- 0
.max_flat_workgroup_size: 1024
.name: _Z15gHighwayForwardPfPKfS1_S1_m
.private_segment_fixed_size: 0
.sgpr_count: 18
.sgpr_spill_count: 0
.symbol: _Z15gHighwayForwardPfPKfS1_S1_m.kd
.uniform_work_group_size: 1
.uses_dynamic_stack: false
.vgpr_count: 18
.vgpr_spill_count: 0
.wavefront_size: 32
.workgroup_processor_mode: 1
amdhsa.target: amdgcn-amd-amdhsa--gfx1100
amdhsa.version:
- 1
- 2
...
.end_amdgpu_metadata |
You are a helpful coding assistant specialized in converting HIP source code to AMD host assembly. | #include <hip/hip_runtime.h>
#include "includes.h"
__device__ inline float stableSigmoid(float x) {
if(x >= 0) {
float z = expf(-x);
return 1.0 / (1.0 + z);
} else {
float z = expf(x);
return z / (1.0 + z);
}
}
__global__ void gHighwayForward(float* out, const float* in1, const float* in2, const float* t, size_t length) {
for(int bid = 0; bid < length; bid += blockDim.x * gridDim.x) {
int index = bid + blockDim.x * blockIdx.x + threadIdx.x;
if(index < length) {
float sigma = stableSigmoid(t[index]);
out[index] = in1[index] * sigma + in2[index] * (1.f - sigma);
}
}
} | .text
.file "gHighwayForward.hip"
.globl _Z30__device_stub__gHighwayForwardPfPKfS1_S1_m # -- Begin function _Z30__device_stub__gHighwayForwardPfPKfS1_S1_m
.p2align 4, 0x90
.type _Z30__device_stub__gHighwayForwardPfPKfS1_S1_m,@function
_Z30__device_stub__gHighwayForwardPfPKfS1_S1_m: # @_Z30__device_stub__gHighwayForwardPfPKfS1_S1_m
.cfi_startproc
# %bb.0:
subq $136, %rsp
.cfi_def_cfa_offset 144
movq %rdi, 88(%rsp)
movq %rsi, 80(%rsp)
movq %rdx, 72(%rsp)
movq %rcx, 64(%rsp)
movq %r8, 56(%rsp)
leaq 88(%rsp), %rax
movq %rax, 96(%rsp)
leaq 80(%rsp), %rax
movq %rax, 104(%rsp)
leaq 72(%rsp), %rax
movq %rax, 112(%rsp)
leaq 64(%rsp), %rax
movq %rax, 120(%rsp)
leaq 56(%rsp), %rax
movq %rax, 128(%rsp)
leaq 40(%rsp), %rdi
leaq 24(%rsp), %rsi
leaq 16(%rsp), %rdx
leaq 8(%rsp), %rcx
callq __hipPopCallConfiguration
movq 40(%rsp), %rsi
movl 48(%rsp), %edx
movq 24(%rsp), %rcx
movl 32(%rsp), %r8d
leaq 96(%rsp), %r9
movl $_Z15gHighwayForwardPfPKfS1_S1_m, %edi
pushq 8(%rsp)
.cfi_adjust_cfa_offset 8
pushq 24(%rsp)
.cfi_adjust_cfa_offset 8
callq hipLaunchKernel
addq $152, %rsp
.cfi_adjust_cfa_offset -152
retq
.Lfunc_end0:
.size _Z30__device_stub__gHighwayForwardPfPKfS1_S1_m, .Lfunc_end0-_Z30__device_stub__gHighwayForwardPfPKfS1_S1_m
.cfi_endproc
# -- End function
.p2align 4, 0x90 # -- Begin function __hip_module_ctor
.type __hip_module_ctor,@function
__hip_module_ctor: # @__hip_module_ctor
.cfi_startproc
# %bb.0:
subq $40, %rsp
.cfi_def_cfa_offset 48
cmpq $0, __hip_gpubin_handle(%rip)
jne .LBB1_2
# %bb.1:
movl $__hip_fatbin_wrapper, %edi
callq __hipRegisterFatBinary
movq %rax, __hip_gpubin_handle(%rip)
.LBB1_2:
movq __hip_gpubin_handle(%rip), %rdi
xorps %xmm0, %xmm0
movups %xmm0, 16(%rsp)
movups %xmm0, (%rsp)
movl $_Z15gHighwayForwardPfPKfS1_S1_m, %esi
movl $.L__unnamed_1, %edx
movl $.L__unnamed_1, %ecx
movl $-1, %r8d
xorl %r9d, %r9d
callq __hipRegisterFunction
movl $__hip_module_dtor, %edi
addq $40, %rsp
.cfi_def_cfa_offset 8
jmp atexit # TAILCALL
.Lfunc_end1:
.size __hip_module_ctor, .Lfunc_end1-__hip_module_ctor
.cfi_endproc
# -- End function
.p2align 4, 0x90 # -- Begin function __hip_module_dtor
.type __hip_module_dtor,@function
__hip_module_dtor: # @__hip_module_dtor
.cfi_startproc
# %bb.0:
movq __hip_gpubin_handle(%rip), %rdi
testq %rdi, %rdi
je .LBB2_2
# %bb.1:
pushq %rax
.cfi_def_cfa_offset 16
callq __hipUnregisterFatBinary
movq $0, __hip_gpubin_handle(%rip)
addq $8, %rsp
.cfi_def_cfa_offset 8
.LBB2_2:
retq
.Lfunc_end2:
.size __hip_module_dtor, .Lfunc_end2-__hip_module_dtor
.cfi_endproc
# -- End function
.type _Z15gHighwayForwardPfPKfS1_S1_m,@object # @_Z15gHighwayForwardPfPKfS1_S1_m
.section .rodata,"a",@progbits
.globl _Z15gHighwayForwardPfPKfS1_S1_m
.p2align 3, 0x0
_Z15gHighwayForwardPfPKfS1_S1_m:
.quad _Z30__device_stub__gHighwayForwardPfPKfS1_S1_m
.size _Z15gHighwayForwardPfPKfS1_S1_m, 8
.type .L__unnamed_1,@object # @0
.section .rodata.str1.1,"aMS",@progbits,1
.L__unnamed_1:
.asciz "_Z15gHighwayForwardPfPKfS1_S1_m"
.size .L__unnamed_1, 32
.type __hip_fatbin_wrapper,@object # @__hip_fatbin_wrapper
.section .hipFatBinSegment,"a",@progbits
.p2align 3, 0x0
__hip_fatbin_wrapper:
.long 1212764230 # 0x48495046
.long 1 # 0x1
.quad __hip_fatbin
.quad 0
.size __hip_fatbin_wrapper, 24
.type __hip_gpubin_handle,@object # @__hip_gpubin_handle
.local __hip_gpubin_handle
.comm __hip_gpubin_handle,8,8
.section .init_array,"aw",@init_array
.p2align 3, 0x0
.quad __hip_module_ctor
.type __hip_cuid_,@object # @__hip_cuid_
.bss
.globl __hip_cuid_
__hip_cuid_:
.byte 0 # 0x0
.size __hip_cuid_, 1
.section ".linker-options","e",@llvm_linker_options
.ident "AMD clang version 18.0.0git (https://github.com/RadeonOpenCompute/llvm-project roc-6.3.2 25012 e5bf7e55c91490b07c49d8960fa7983d864936c4)"
.section ".note.GNU-stack","",@progbits
.addrsig
.addrsig_sym _Z30__device_stub__gHighwayForwardPfPKfS1_S1_m
.addrsig_sym __hip_module_ctor
.addrsig_sym __hip_module_dtor
.addrsig_sym _Z15gHighwayForwardPfPKfS1_S1_m
.addrsig_sym __hip_fatbin
.addrsig_sym __hip_fatbin_wrapper
.addrsig_sym __hip_cuid_ |
You are a helpful coding assistant specialized in converting from CUDA device assembly to AMD device assembly. | code for sm_80
Function : _Z15gHighwayForwardPfPKfS1_S1_m
.headerflags @"EF_CUDA_TEXMODE_UNIFIED EF_CUDA_64BIT_ADDRESS EF_CUDA_SM80 EF_CUDA_VIRTUAL_SM(EF_CUDA_SM80)"
/*0000*/ IMAD.MOV.U32 R1, RZ, RZ, c[0x0][0x28] ; /* 0x00000a00ff017624 */
/* 0x000fe400078e00ff */
/*0010*/ ISETP.NE.U32.AND P0, PT, RZ, c[0x0][0x180], PT ; /* 0x00006000ff007a0c */
/* 0x000fc80003f05070 */
/*0020*/ ISETP.NE.AND.EX P0, PT, RZ, c[0x0][0x184], PT, P0 ; /* 0x00006100ff007a0c */
/* 0x000fda0003f05300 */
/*0030*/ @!P0 EXIT ; /* 0x000000000000894d */
/* 0x000fea0003800000 */
/*0040*/ S2R R13, SR_CTAID.X ; /* 0x00000000000d7919 */
/* 0x000e220000002500 */
/*0050*/ IMAD.MOV.U32 R12, RZ, RZ, RZ ; /* 0x000000ffff0c7224 */
/* 0x000fe200078e00ff */
/*0060*/ ULDC.64 UR4, c[0x0][0x118] ; /* 0x0000460000047ab9 */
/* 0x000fe40000000a00 */
/*0070*/ S2R R0, SR_TID.X ; /* 0x0000000000007919 */
/* 0x000e240000002100 */
/*0080*/ IMAD R13, R13, c[0x0][0x0], R0 ; /* 0x000000000d0d7a24 */
/* 0x001fc800078e0200 */
/*0090*/ IMAD.IADD R15, R13, 0x1, R12 ; /* 0x000000010d0f7824 */
/* 0x001fe200078e020c */
/*00a0*/ BSSY B1, 0x640 ; /* 0x0000059000017945 */
/* 0x000fe80003800000 */
/*00b0*/ ISETP.GE.U32.AND P0, PT, R15, c[0x0][0x180], PT ; /* 0x000060000f007a0c */
/* 0x000fc40003f06070 */
/*00c0*/ SHF.R.S32.HI R0, RZ, 0x1f, R15 ; /* 0x0000001fff007819 */
/* 0x000fc8000001140f */
/*00d0*/ ISETP.GE.U32.AND.EX P0, PT, R0, c[0x0][0x184], PT, P0 ; /* 0x0000610000007a0c */
/* 0x000fda0003f06100 */
/*00e0*/ @P0 BRA 0x630 ; /* 0x0000054000000947 */
/* 0x000fea0003800000 */
/*00f0*/ IMAD.SHL.U32 R14, R15.reuse, 0x4, RZ ; /* 0x000000040f0e7824 */
/* 0x040fe200078e00ff */
/*0100*/ SHF.L.U64.HI R15, R15, 0x2, R0 ; /* 0x000000020f0f7819 */
/* 0x000fc80000010200 */
/*0110*/ IADD3 R2, P0, R14, c[0x0][0x178], RZ ; /* 0x00005e000e027a10 */
/* 0x000fc80007f1e0ff */
/*0120*/ IADD3.X R3, R15, c[0x0][0x17c], RZ, P0, !PT ; /* 0x00005f000f037a10 */
/* 0x000fca00007fe4ff */
/*0130*/ LDG.E R5, [R2.64] ; /* 0x0000000402057981 */
/* 0x000ea2000c1e1900 */
/*0140*/ BSSY B0, 0x560 ; /* 0x0000041000007945 */
/* 0x000fe20003800000 */
/*0150*/ FSETP.GE.AND P0, PT, R5, RZ, PT ; /* 0x000000ff0500720b */
/* 0x004fda0003f06000 */
/*0160*/ @!P0 BRA 0x350 ; /* 0x000001e000008947 */
/* 0x000fea0003800000 */
/*0170*/ IMAD.MOV.U32 R0, RZ, RZ, 0x3bbb989d ; /* 0x3bbb989dff007424 */
/* 0x000fe200078e00ff */
/*0180*/ BSSY B2, 0x340 ; /* 0x000001b000027945 */
/* 0x000fe20003800000 */
/*0190*/ IMAD.MOV.U32 R3, RZ, RZ, 0x437c0000 ; /* 0x437c0000ff037424 */
/* 0x000fe400078e00ff */
/*01a0*/ FFMA.SAT R0, -R5, R0, 0.5 ; /* 0x3f00000005007423 */
/* 0x000fc80000002100 */
/*01b0*/ FFMA.RM R0, R0, R3, 12582913 ; /* 0x4b40000100007423 */
/* 0x000fc80000004003 */
/*01c0*/ FADD R2, R0.reuse, -12583039 ; /* 0xcb40007f00027421 */
/* 0x040fe40000000000 */
/*01d0*/ IMAD.SHL.U32 R0, R0, 0x800000, RZ ; /* 0x0080000000007824 */
/* 0x000fe400078e00ff */
/*01e0*/ FFMA R2, -R5, 1.4426950216293334961, -R2 ; /* 0x3fb8aa3b05027823 */
/* 0x000fc80000000902 */
/*01f0*/ FFMA R10, -R5, 1.925963033500011079e-08, R2 ; /* 0x32a57060050a7823 */
/* 0x000fc80000000102 */
/*0200*/ MUFU.EX2 R3, R10 ; /* 0x0000000a00037308 */
/* 0x000e240000000800 */
/*0210*/ FMUL R0, R0, R3 ; /* 0x0000000300007220 */
/* 0x001fcc0000400000 */
/*0220*/ F2F.F64.F32 R2, R0 ; /* 0x0000000000027310 */
/* 0x000e240000201800 */
/*0230*/ DADD R8, R2, 1 ; /* 0x3ff0000002087429 */
/* 0x001e0c0000000000 */
/*0240*/ MUFU.RCP64H R3, R9 ; /* 0x0000000900037308 */
/* 0x001e280000001800 */
/*0250*/ IADD3 R2, R9, 0x300402, RZ ; /* 0x0030040209027810 */
/* 0x000fc80007ffe0ff */
/*0260*/ FSETP.GEU.AND P0, PT, |R2|, 5.8789094863358348022e-39, PT ; /* 0x004004020200780b */
/* 0x000fe40003f0e200 */
/*0270*/ DFMA R4, -R8, R2, 1 ; /* 0x3ff000000804742b */
/* 0x001e0c0000000102 */
/*0280*/ DFMA R4, R4, R4, R4 ; /* 0x000000040404722b */
/* 0x001e0c0000000004 */
/*0290*/ DFMA R4, R2, R4, R2 ; /* 0x000000040204722b */
/* 0x001e0c0000000002 */
/*02a0*/ DFMA R6, -R8, R4, 1 ; /* 0x3ff000000806742b */
/* 0x001e0c0000000104 */
/*02b0*/ DFMA R2, R4, R6, R4 ; /* 0x000000060402722b */
/* 0x0010620000000004 */
/*02c0*/ @P0 BRA 0x330 ; /* 0x0000006000000947 */
/* 0x000fea0003800000 */
/*02d0*/ LOP3.LUT R0, R9, 0x7fffffff, RZ, 0xc0, !PT ; /* 0x7fffffff09007812 */
/* 0x000fc800078ec0ff */
/*02e0*/ IADD3 R6, R0, -0x100000, RZ ; /* 0xfff0000000067810 */
/* 0x001fe40007ffe0ff */
/*02f0*/ MOV R0, 0x310 ; /* 0x0000031000007802 */
/* 0x000fe40000000f00 */
/*0300*/ CALL.REL.NOINC 0x6b0 ; /* 0x000003a000007944 */
/* 0x002fea0003c00000 */
/*0310*/ IMAD.MOV.U32 R2, RZ, RZ, R4 ; /* 0x000000ffff027224 */
/* 0x002fe400078e0004 */
/*0320*/ IMAD.MOV.U32 R3, RZ, RZ, R5 ; /* 0x000000ffff037224 */
/* 0x000fe400078e0005 */
/*0330*/ BSYNC B2 ; /* 0x0000000000027941 */
/* 0x000fea0003800000 */
/*0340*/ BRA 0x550 ; /* 0x0000020000007947 */
/* 0x000fea0003800000 */
/*0350*/ IMAD.MOV.U32 R0, RZ, RZ, 0x3bbb989d ; /* 0x3bbb989dff007424 */
/* 0x000fe200078e00ff */
/*0360*/ BSSY B2, 0x550 ; /* 0x000001e000027945 */
/* 0x000fe20003800000 */
/*0370*/ IMAD.MOV.U32 R3, RZ, RZ, 0x437c0000 ; /* 0x437c0000ff037424 */
/* 0x000fe400078e00ff */
/*0380*/ FFMA.SAT R0, R5, R0, 0.5 ; /* 0x3f00000005007423 */
/* 0x000fc80000002000 */
/*0390*/ FFMA.RM R0, R0, R3, 12582913 ; /* 0x4b40000100007423 */
/* 0x000fc80000004003 */
/*03a0*/ FADD R2, R0.reuse, -12583039 ; /* 0xcb40007f00027421 */
/* 0x040fe40000000000 */
/*03b0*/ IMAD.SHL.U32 R0, R0, 0x800000, RZ ; /* 0x0080000000007824 */
/* 0x000fe400078e00ff */
/*03c0*/ FFMA R2, R5, 1.4426950216293334961, -R2 ; /* 0x3fb8aa3b05027823 */
/* 0x000fc80000000802 */
/*03d0*/ FFMA R10, R5, 1.925963033500011079e-08, R2 ; /* 0x32a57060050a7823 */
/* 0x000fe40000000002 */
/*03e0*/ IMAD.MOV.U32 R2, RZ, RZ, 0x1 ; /* 0x00000001ff027424 */
/* 0x000fe400078e00ff */
/*03f0*/ MUFU.EX2 R3, R10 ; /* 0x0000000a00037308 */
/* 0x000e240000000800 */
/*0400*/ FMUL R0, R0, R3 ; /* 0x0000000300007220 */
/* 0x001fcc0000400000 */
/*0410*/ F2F.F64.F32 R6, R0 ; /* 0x0000000000067310 */
/* 0x000e240000201800 */
/*0420*/ DADD R4, R6, 1 ; /* 0x3ff0000006047429 */
/* 0x001e220000000000 */
/*0430*/ FSETP.GEU.AND P1, PT, |R7|, 6.5827683646048100446e-37, PT ; /* 0x036000000700780b */
/* 0x000fca0003f2e200 */
/*0440*/ MUFU.RCP64H R3, R5 ; /* 0x0000000500037308 */
/* 0x001e240000001800 */
/*0450*/ DFMA R8, -R4, R2, 1 ; /* 0x3ff000000408742b */
/* 0x001e0c0000000102 */
/*0460*/ DFMA R8, R8, R8, R8 ; /* 0x000000080808722b */
/* 0x001e0c0000000008 */
/*0470*/ DFMA R8, R2, R8, R2 ; /* 0x000000080208722b */
/* 0x001e0c0000000002 */
/*0480*/ DFMA R2, -R4, R8, 1 ; /* 0x3ff000000402742b */
/* 0x001e0c0000000108 */
/*0490*/ DFMA R2, R8, R2, R8 ; /* 0x000000020802722b */
/* 0x001e0c0000000008 */
/*04a0*/ DMUL R8, R6, R2 ; /* 0x0000000206087228 */
/* 0x001e0c0000000000 */
/*04b0*/ DFMA R10, -R4, R8, R6 ; /* 0x00000008040a722b */
/* 0x001e0c0000000106 */
/*04c0*/ DFMA R2, R2, R10, R8 ; /* 0x0000000a0202722b */
/* 0x001e140000000008 */
/*04d0*/ FFMA R0, RZ, R5, R3 ; /* 0x00000005ff007223 */
/* 0x001fca0000000003 */
/*04e0*/ FSETP.GT.AND P0, PT, |R0|, 1.469367938527859385e-39, PT ; /* 0x001000000000780b */
/* 0x000fda0003f04200 */
/*04f0*/ @P0 BRA P1, 0x540 ; /* 0x0000004000000947 */
/* 0x000fea0000800000 */
/*0500*/ MOV R0, 0x520 ; /* 0x0000052000007802 */
/* 0x000fe40000000f00 */
/*0510*/ CALL.REL.NOINC 0x950 ; /* 0x0000043000007944 */
/* 0x000fea0003c00000 */
/*0520*/ IMAD.MOV.U32 R2, RZ, RZ, R10 ; /* 0x000000ffff027224 */
/* 0x000fe400078e000a */
/*0530*/ IMAD.MOV.U32 R3, RZ, RZ, R11 ; /* 0x000000ffff037224 */
/* 0x000fe400078e000b */
/*0540*/ BSYNC B2 ; /* 0x0000000000027941 */
/* 0x000fea0003800000 */
/*0550*/ BSYNC B0 ; /* 0x0000000000007941 */
/* 0x000fea0003800000 */
/*0560*/ IADD3 R6, P1, R14.reuse, c[0x0][0x170], RZ ; /* 0x00005c000e067a10 */
/* 0x041fe40007f3e0ff */
/*0570*/ IADD3 R4, P0, R14, c[0x0][0x168], RZ ; /* 0x00005a000e047a10 */
/* 0x000fe40007f1e0ff */
/*0580*/ IADD3.X R7, R15.reuse, c[0x0][0x174], RZ, P1, !PT ; /* 0x00005d000f077a10 */
/* 0x040fe40000ffe4ff */
/*0590*/ IADD3.X R5, R15, c[0x0][0x16c], RZ, P0, !PT ; /* 0x00005b000f057a10 */
/* 0x000fc800007fe4ff */
/*05a0*/ LDG.E R7, [R6.64] ; /* 0x0000000406077981 */
/* 0x000ea8000c1e1900 */
/*05b0*/ LDG.E R4, [R4.64] ; /* 0x0000000404047981 */
/* 0x000ee2000c1e1900 */
/*05c0*/ F2F.F32.F64 R3, R2 ; /* 0x0000000200037310 */
/* 0x002e220000301000 */
/*05d0*/ IADD3 R14, P0, R14, c[0x0][0x160], RZ ; /* 0x000058000e0e7a10 */
/* 0x000fc80007f1e0ff */
/*05e0*/ IADD3.X R15, R15, c[0x0][0x164], RZ, P0, !PT ; /* 0x000059000f0f7a10 */
/* 0x000fe200007fe4ff */
/*05f0*/ FADD R0, -R3, 1 ; /* 0x3f80000003007421 */
/* 0x001fc80000000100 */
/*0600*/ FMUL R0, R0, R7 ; /* 0x0000000700007220 */
/* 0x004fc80000400000 */
/*0610*/ FFMA R9, R4, R3, R0 ; /* 0x0000000304097223 */
/* 0x008fca0000000000 */
/*0620*/ STG.E [R14.64], R9 ; /* 0x000000090e007986 */
/* 0x0001e4000c101904 */
/*0630*/ BSYNC B1 ; /* 0x0000000000017941 */
/* 0x000fea0003800000 */
/*0640*/ IMAD.MOV.U32 R3, RZ, RZ, c[0x0][0x0] ; /* 0x00000000ff037624 */
/* 0x000fc800078e00ff */
/*0650*/ IMAD R12, R3, c[0x0][0xc], R12 ; /* 0x00000300030c7a24 */
/* 0x000fca00078e020c */
/*0660*/ ISETP.GE.U32.AND P0, PT, R12, c[0x0][0x180], PT ; /* 0x000060000c007a0c */
/* 0x000fe40003f06070 */
/*0670*/ SHF.R.S32.HI R0, RZ, 0x1f, R12 ; /* 0x0000001fff007819 */
/* 0x000fc8000001140c */
/*0680*/ ISETP.GE.U32.AND.EX P0, PT, R0, c[0x0][0x184], PT, P0 ; /* 0x0000610000007a0c */
/* 0x000fda0003f06100 */
/*0690*/ @!P0 BRA 0x90 ; /* 0xfffff9f000008947 */
/* 0x000fea000383ffff */
/*06a0*/ EXIT ; /* 0x000000000000794d */
/* 0x000fea0003800000 */
/*06b0*/ IMAD.MOV.U32 R2, RZ, RZ, R8 ; /* 0x000000ffff027224 */
/* 0x000fe200078e0008 */
/*06c0*/ BSSY B3, 0x920 ; /* 0x0000025000037945 */
/* 0x000fe20003800000 */
/*06d0*/ IMAD.MOV.U32 R3, RZ, RZ, R9 ; /* 0x000000ffff037224 */
/* 0x000fcc00078e0009 */
/*06e0*/ DSETP.GTU.AND P0, PT, |R2|, +INF , PT ; /* 0x7ff000000200742a */
/* 0x000e1c0003f0c200 */
/*06f0*/ @P0 BRA 0x8f0 ; /* 0x000001f000000947 */
/* 0x001fea0003800000 */
/*0700*/ LOP3.LUT R8, R9, 0x7fffffff, RZ, 0xc0, !PT ; /* 0x7fffffff09087812 */
/* 0x000fc800078ec0ff */
/*0710*/ IADD3 R4, R8, -0x1, RZ ; /* 0xffffffff08047810 */
/* 0x000fc80007ffe0ff */
/*0720*/ ISETP.GE.U32.AND P0, PT, R4, 0x7fefffff, PT ; /* 0x7fefffff0400780c */
/* 0x000fda0003f06070 */
/*0730*/ @P0 LOP3.LUT R5, R3, 0x7ff00000, RZ, 0x3c, !PT ; /* 0x7ff0000003050812 */
/* 0x000fe200078e3cff */
/*0740*/ @P0 IMAD.MOV.U32 R4, RZ, RZ, RZ ; /* 0x000000ffff040224 */
/* 0x000fe200078e00ff */
/*0750*/ @P0 BRA 0x910 ; /* 0x000001b000000947 */
/* 0x000fea0003800000 */
/*0760*/ ISETP.GE.U32.AND P0, PT, R8, 0x1000001, PT ; /* 0x010000010800780c */
/* 0x000fda0003f06070 */
/*0770*/ @!P0 BRA 0x850 ; /* 0x000000d000008947 */
/* 0x000fea0003800000 */
/*0780*/ IADD3 R5, R3, -0x3fe00000, RZ ; /* 0xc020000003057810 */
/* 0x000fe20007ffe0ff */
/*0790*/ IMAD.MOV.U32 R4, RZ, RZ, R2 ; /* 0x000000ffff047224 */
/* 0x000fc600078e0002 */
/*07a0*/ MUFU.RCP64H R7, R5 ; /* 0x0000000500077308 */
/* 0x000e260000001800 */
/*07b0*/ DFMA R8, -R4, R6, 1 ; /* 0x3ff000000408742b */
/* 0x001e0c0000000106 */
/*07c0*/ DFMA R8, R8, R8, R8 ; /* 0x000000080808722b */
/* 0x001e0c0000000008 */
/*07d0*/ DFMA R8, R6, R8, R6 ; /* 0x000000080608722b */
/* 0x001e0c0000000006 */
/*07e0*/ DFMA R6, -R4, R8, 1 ; /* 0x3ff000000406742b */
/* 0x001e0c0000000108 */
/*07f0*/ DFMA R6, R8, R6, R8 ; /* 0x000000060806722b */
/* 0x001e0c0000000008 */
/*0800*/ DMUL R6, R6, 2.2250738585072013831e-308 ; /* 0x0010000006067828 */
/* 0x001e0c0000000000 */
/*0810*/ DFMA R2, -R2, R6, 1 ; /* 0x3ff000000202742b */
/* 0x001e0c0000000106 */
/*0820*/ DFMA R2, R2, R2, R2 ; /* 0x000000020202722b */
/* 0x001e0c0000000002 */
/*0830*/ DFMA R4, R6, R2, R6 ; /* 0x000000020604722b */
/* 0x0010620000000006 */
/*0840*/ BRA 0x910 ; /* 0x000000c000007947 */
/* 0x000fea0003800000 */
/*0850*/ DMUL R2, R2, 8.11296384146066816958e+31 ; /* 0x4690000002027828 */
/* 0x000e220000000000 */
/*0860*/ IMAD.MOV.U32 R4, RZ, RZ, R6 ; /* 0x000000ffff047224 */
/* 0x000fca00078e0006 */
/*0870*/ MUFU.RCP64H R5, R3 ; /* 0x0000000300057308 */
/* 0x001e240000001800 */
/*0880*/ DFMA R6, -R2, R4, 1 ; /* 0x3ff000000206742b */
/* 0x001e0c0000000104 */
/*0890*/ DFMA R6, R6, R6, R6 ; /* 0x000000060606722b */
/* 0x001e0c0000000006 */
/*08a0*/ DFMA R6, R4, R6, R4 ; /* 0x000000060406722b */
/* 0x001e0c0000000004 */
/*08b0*/ DFMA R4, -R2, R6, 1 ; /* 0x3ff000000204742b */
/* 0x001e0c0000000106 */
/*08c0*/ DFMA R4, R6, R4, R6 ; /* 0x000000040604722b */
/* 0x001e0c0000000006 */
/*08d0*/ DMUL R4, R4, 8.11296384146066816958e+31 ; /* 0x4690000004047828 */
/* 0x001e220000000000 */
/*08e0*/ BRA 0x910 ; /* 0x0000002000007947 */
/* 0x000fea0003800000 */
/*08f0*/ LOP3.LUT R5, R3, 0x80000, RZ, 0xfc, !PT ; /* 0x0008000003057812 */
/* 0x000fe200078efcff */
/*0900*/ IMAD.MOV.U32 R4, RZ, RZ, R2 ; /* 0x000000ffff047224 */
/* 0x000fe400078e0002 */
/*0910*/ BSYNC B3 ; /* 0x0000000000037941 */
/* 0x000fea0003800000 */
/*0920*/ IMAD.MOV.U32 R2, RZ, RZ, R0 ; /* 0x000000ffff027224 */
/* 0x001fe400078e0000 */
/*0930*/ IMAD.MOV.U32 R3, RZ, RZ, 0x0 ; /* 0x00000000ff037424 */
/* 0x000fc800078e00ff */
/*0940*/ RET.REL.NODEC R2 0x0 ; /* 0xfffff6b002007950 */
/* 0x000fea0003c3ffff */
/*0950*/ FSETP.GEU.AND P0, PT, |R5|.reuse, 1.469367938527859385e-39, PT ; /* 0x001000000500780b */
/* 0x040fe20003f0e200 */
/*0960*/ IMAD.MOV.U32 R17, RZ, RZ, 0x1ca00000 ; /* 0x1ca00000ff117424 */
/* 0x000fe200078e00ff */
/*0970*/ LOP3.LUT R2, R5, 0x800fffff, RZ, 0xc0, !PT ; /* 0x800fffff05027812 */
/* 0x000fe200078ec0ff */
/*0980*/ IMAD.MOV.U32 R18, RZ, RZ, 0x1 ; /* 0x00000001ff127424 */
/* 0x000fe200078e00ff */
/*0990*/ FSETP.GEU.AND P2, PT, |R7|.reuse, 1.469367938527859385e-39, PT ; /* 0x001000000700780b */
/* 0x040fe20003f4e200 */
/*09a0*/ IMAD.MOV.U32 R8, RZ, RZ, R6 ; /* 0x000000ffff087224 */
/* 0x000fe200078e0006 */
/*09b0*/ LOP3.LUT R3, R2, 0x3ff00000, RZ, 0xfc, !PT ; /* 0x3ff0000002037812 */
/* 0x000fe200078efcff */
/*09c0*/ IMAD.MOV.U32 R2, RZ, RZ, R4 ; /* 0x000000ffff027224 */
/* 0x000fe200078e0004 */
/*09d0*/ LOP3.LUT R16, R7, 0x7ff00000, RZ, 0xc0, !PT ; /* 0x7ff0000007107812 */
/* 0x000fe200078ec0ff */
/*09e0*/ BSSY B3, 0xee0 ; /* 0x000004f000037945 */
/* 0x000fe20003800000 */
/*09f0*/ LOP3.LUT R23, R5, 0x7ff00000, RZ, 0xc0, !PT ; /* 0x7ff0000005177812 */
/* 0x000fc600078ec0ff */
/*0a00*/ @!P0 DMUL R2, R4, 8.98846567431157953865e+307 ; /* 0x7fe0000004028828 */
/* 0x000e220000000000 */
/*0a10*/ ISETP.GE.U32.AND P1, PT, R16.reuse, R23, PT ; /* 0x000000171000720c */
/* 0x040fe20003f26070 */
/*0a20*/ IMAD.MOV.U32 R22, RZ, RZ, R16 ; /* 0x000000ffff167224 */
/* 0x000fe400078e0010 */
/*0a30*/ @!P2 LOP3.LUT R9, R5, 0x7ff00000, RZ, 0xc0, !PT ; /* 0x7ff000000509a812 */
/* 0x000fe200078ec0ff */
/*0a40*/ @!P2 IMAD.MOV.U32 R10, RZ, RZ, RZ ; /* 0x000000ffff0aa224 */
/* 0x000fe200078e00ff */
/*0a50*/ MUFU.RCP64H R19, R3 ; /* 0x0000000300137308 */
/* 0x001e240000001800 */
/*0a60*/ @!P2 ISETP.GE.U32.AND P3, PT, R16, R9, PT ; /* 0x000000091000a20c */
/* 0x000fe40003f66070 */
/*0a70*/ SEL R9, R17, 0x63400000, !P1 ; /* 0x6340000011097807 */
/* 0x000fc40004800000 */
/*0a80*/ @!P2 SEL R11, R17, 0x63400000, !P3 ; /* 0x63400000110ba807 */
/* 0x000fe40005800000 */
/*0a90*/ LOP3.LUT R9, R9, 0x800fffff, R7.reuse, 0xf8, !PT ; /* 0x800fffff09097812 */
/* 0x100fe400078ef807 */
/*0aa0*/ @!P2 LOP3.LUT R11, R11, 0x80000000, R7, 0xf8, !PT ; /* 0x800000000b0ba812 */
/* 0x000fe400078ef807 */
/*0ab0*/ @!P0 LOP3.LUT R23, R3, 0x7ff00000, RZ, 0xc0, !PT ; /* 0x7ff0000003178812 */
/* 0x000fe400078ec0ff */
/*0ac0*/ @!P2 LOP3.LUT R11, R11, 0x100000, RZ, 0xfc, !PT ; /* 0x001000000b0ba812 */
/* 0x000fe200078efcff */
/*0ad0*/ DFMA R20, R18, -R2, 1 ; /* 0x3ff000001214742b */
/* 0x001e220000000802 */
/*0ae0*/ IADD3 R24, R23, -0x1, RZ ; /* 0xffffffff17187810 */
/* 0x000fc80007ffe0ff */
/*0af0*/ @!P2 DFMA R8, R8, 2, -R10 ; /* 0x400000000808a82b */
/* 0x000fc8000000080a */
/*0b00*/ DFMA R20, R20, R20, R20 ; /* 0x000000141414722b */
/* 0x001e0c0000000014 */
/*0b10*/ DFMA R18, R18, R20, R18 ; /* 0x000000141212722b */
/* 0x0010620000000012 */
/*0b20*/ @!P2 LOP3.LUT R22, R9, 0x7ff00000, RZ, 0xc0, !PT ; /* 0x7ff000000916a812 */
/* 0x000fc800078ec0ff */
/*0b30*/ IADD3 R20, R22, -0x1, RZ ; /* 0xffffffff16147810 */
/* 0x001fe20007ffe0ff */
/*0b40*/ DFMA R10, R18, -R2, 1 ; /* 0x3ff00000120a742b */
/* 0x002e060000000802 */
/*0b50*/ ISETP.GT.U32.AND P0, PT, R20, 0x7feffffe, PT ; /* 0x7feffffe1400780c */
/* 0x000fc60003f04070 */
/*0b60*/ DFMA R18, R18, R10, R18 ; /* 0x0000000a1212722b */
/* 0x001e220000000012 */
/*0b70*/ ISETP.GT.U32.OR P0, PT, R24, 0x7feffffe, P0 ; /* 0x7feffffe1800780c */
/* 0x000fca0000704470 */
/*0b80*/ DMUL R10, R18, R8 ; /* 0x00000008120a7228 */
/* 0x001e0c0000000000 */
/*0b90*/ DFMA R20, R10, -R2, R8 ; /* 0x800000020a14722b */
/* 0x001e0c0000000008 */
/*0ba0*/ DFMA R20, R18, R20, R10 ; /* 0x000000141214722b */
/* 0x001062000000000a */
/*0bb0*/ @P0 BRA 0xd80 ; /* 0x000001c000000947 */
/* 0x000fea0003800000 */
/*0bc0*/ LOP3.LUT R7, R5, 0x7ff00000, RZ, 0xc0, !PT ; /* 0x7ff0000005077812 */
/* 0x000fc800078ec0ff */
/*0bd0*/ ISETP.GE.U32.AND P0, PT, R16.reuse, R7, PT ; /* 0x000000071000720c */
/* 0x040fe20003f06070 */
/*0be0*/ IMAD.IADD R6, R16, 0x1, -R7 ; /* 0x0000000110067824 */
/* 0x000fc600078e0a07 */
/*0bf0*/ SEL R17, R17, 0x63400000, !P0 ; /* 0x6340000011117807 */
/* 0x000fe40004000000 */
/*0c00*/ IMNMX R6, R6, -0x46a00000, !PT ; /* 0xb960000006067817 */
/* 0x000fc80007800200 */
/*0c10*/ IMNMX R6, R6, 0x46a00000, PT ; /* 0x46a0000006067817 */
/* 0x000fca0003800200 */
/*0c20*/ IMAD.IADD R16, R6, 0x1, -R17 ; /* 0x0000000106107824 */
/* 0x000fe400078e0a11 */
/*0c30*/ IMAD.MOV.U32 R6, RZ, RZ, RZ ; /* 0x000000ffff067224 */
/* 0x000fc600078e00ff */
/*0c40*/ IADD3 R7, R16, 0x7fe00000, RZ ; /* 0x7fe0000010077810 */
/* 0x000fcc0007ffe0ff */
/*0c50*/ DMUL R10, R20, R6 ; /* 0x00000006140a7228 */
/* 0x003e140000000000 */
/*0c60*/ FSETP.GTU.AND P0, PT, |R11|, 1.469367938527859385e-39, PT ; /* 0x001000000b00780b */
/* 0x001fda0003f0c200 */
/*0c70*/ @P0 BRA 0xed0 ; /* 0x0000025000000947 */
/* 0x000fea0003800000 */
/*0c80*/ DFMA R2, R20, -R2, R8 ; /* 0x800000021402722b */
/* 0x000e220000000008 */
/*0c90*/ IMAD.MOV.U32 R6, RZ, RZ, RZ ; /* 0x000000ffff067224 */
/* 0x000fd200078e00ff */
/*0ca0*/ FSETP.NEU.AND P0, PT, R3.reuse, RZ, PT ; /* 0x000000ff0300720b */
/* 0x041fe40003f0d000 */
/*0cb0*/ LOP3.LUT R5, R3, 0x80000000, R5, 0x48, !PT ; /* 0x8000000003057812 */
/* 0x000fc800078e4805 */
/*0cc0*/ LOP3.LUT R7, R5, R7, RZ, 0xfc, !PT ; /* 0x0000000705077212 */
/* 0x000fce00078efcff */
/*0cd0*/ @!P0 BRA 0xed0 ; /* 0x000001f000008947 */
/* 0x000fea0003800000 */
/*0ce0*/ IMAD.MOV R3, RZ, RZ, -R16 ; /* 0x000000ffff037224 */
/* 0x000fe200078e0a10 */
/*0cf0*/ DMUL.RP R6, R20, R6 ; /* 0x0000000614067228 */
/* 0x000e220000008000 */
/*0d00*/ IMAD.MOV.U32 R2, RZ, RZ, RZ ; /* 0x000000ffff027224 */
/* 0x000fcc00078e00ff */
/*0d10*/ DFMA R2, R10, -R2, R20 ; /* 0x800000020a02722b */
/* 0x000e460000000014 */
/*0d20*/ LOP3.LUT R5, R7, R5, RZ, 0x3c, !PT ; /* 0x0000000507057212 */
/* 0x001fc600078e3cff */
/*0d30*/ IADD3 R2, -R16, -0x43300000, RZ ; /* 0xbcd0000010027810 */
/* 0x002fc80007ffe1ff */
/*0d40*/ FSETP.NEU.AND P0, PT, |R3|, R2, PT ; /* 0x000000020300720b */
/* 0x000fc80003f0d200 */
/*0d50*/ FSEL R10, R6, R10, !P0 ; /* 0x0000000a060a7208 */
/* 0x000fe40004000000 */
/*0d60*/ FSEL R11, R5, R11, !P0 ; /* 0x0000000b050b7208 */
/* 0x000fe20004000000 */
/*0d70*/ BRA 0xed0 ; /* 0x0000015000007947 */
/* 0x000fea0003800000 */
/*0d80*/ DSETP.NAN.AND P0, PT, R6, R6, PT ; /* 0x000000060600722a */
/* 0x000e9c0003f08000 */
/*0d90*/ @P0 BRA 0xeb0 ; /* 0x0000011000000947 */
/* 0x004fea0003800000 */
/*0da0*/ DSETP.NAN.AND P0, PT, R4, R4, PT ; /* 0x000000040400722a */
/* 0x000e9c0003f08000 */
/*0db0*/ @P0 BRA 0xe80 ; /* 0x000000c000000947 */
/* 0x004fea0003800000 */
/*0dc0*/ ISETP.NE.AND P0, PT, R22, R23, PT ; /* 0x000000171600720c */
/* 0x000fe20003f05270 */
/*0dd0*/ IMAD.MOV.U32 R10, RZ, RZ, 0x0 ; /* 0x00000000ff0a7424 */
/* 0x001fe400078e00ff */
/*0de0*/ IMAD.MOV.U32 R11, RZ, RZ, -0x80000 ; /* 0xfff80000ff0b7424 */
/* 0x000fd400078e00ff */
/*0df0*/ @!P0 BRA 0xed0 ; /* 0x000000d000008947 */
/* 0x000fea0003800000 */
/*0e00*/ ISETP.NE.AND P0, PT, R22, 0x7ff00000, PT ; /* 0x7ff000001600780c */
/* 0x000fe40003f05270 */
/*0e10*/ LOP3.LUT R11, R7, 0x80000000, R5, 0x48, !PT ; /* 0x80000000070b7812 */
/* 0x000fe400078e4805 */
/*0e20*/ ISETP.EQ.OR P0, PT, R23, RZ, !P0 ; /* 0x000000ff1700720c */
/* 0x000fda0004702670 */
/*0e30*/ @P0 LOP3.LUT R2, R11, 0x7ff00000, RZ, 0xfc, !PT ; /* 0x7ff000000b020812 */
/* 0x000fe200078efcff */
/*0e40*/ @!P0 IMAD.MOV.U32 R10, RZ, RZ, RZ ; /* 0x000000ffff0a8224 */
/* 0x000fe400078e00ff */
/*0e50*/ @P0 IMAD.MOV.U32 R10, RZ, RZ, RZ ; /* 0x000000ffff0a0224 */
/* 0x000fe400078e00ff */
/*0e60*/ @P0 IMAD.MOV.U32 R11, RZ, RZ, R2 ; /* 0x000000ffff0b0224 */
/* 0x000fe200078e0002 */
/*0e70*/ BRA 0xed0 ; /* 0x0000005000007947 */
/* 0x000fea0003800000 */
/*0e80*/ LOP3.LUT R11, R5, 0x80000, RZ, 0xfc, !PT ; /* 0x00080000050b7812 */
/* 0x001fe200078efcff */
/*0e90*/ IMAD.MOV.U32 R10, RZ, RZ, R4 ; /* 0x000000ffff0a7224 */
/* 0x000fe200078e0004 */
/*0ea0*/ BRA 0xed0 ; /* 0x0000002000007947 */
/* 0x000fea0003800000 */
/*0eb0*/ LOP3.LUT R11, R7, 0x80000, RZ, 0xfc, !PT ; /* 0x00080000070b7812 */
/* 0x001fe200078efcff */
/*0ec0*/ IMAD.MOV.U32 R10, RZ, RZ, R6 ; /* 0x000000ffff0a7224 */
/* 0x000fe400078e0006 */
/*0ed0*/ BSYNC B3 ; /* 0x0000000000037941 */
/* 0x000fea0003800000 */
/*0ee0*/ IMAD.MOV.U32 R2, RZ, RZ, R0 ; /* 0x000000ffff027224 */
/* 0x000fe400078e0000 */
/*0ef0*/ IMAD.MOV.U32 R3, RZ, RZ, 0x0 ; /* 0x00000000ff037424 */
/* 0x000fc800078e00ff */
/*0f00*/ RET.REL.NODEC R2 0x0 ; /* 0xfffff0f002007950 */
/* 0x000fea0003c3ffff */
/*0f10*/ BRA 0xf10; /* 0xfffffff000007947 */
/* 0x000fc0000383ffff */
/*0f20*/ NOP; /* 0x0000000000007918 */
/* 0x000fc00000000000 */
/*0f30*/ NOP; /* 0x0000000000007918 */
/* 0x000fc00000000000 */
/*0f40*/ NOP; /* 0x0000000000007918 */
/* 0x000fc00000000000 */
/*0f50*/ NOP; /* 0x0000000000007918 */
/* 0x000fc00000000000 */
/*0f60*/ NOP; /* 0x0000000000007918 */
/* 0x000fc00000000000 */
/*0f70*/ NOP; /* 0x0000000000007918 */
/* 0x000fc00000000000 */
/*0f80*/ NOP; /* 0x0000000000007918 */
/* 0x000fc00000000000 */
/*0f90*/ NOP; /* 0x0000000000007918 */
/* 0x000fc00000000000 */
/*0fa0*/ NOP; /* 0x0000000000007918 */
/* 0x000fc00000000000 */
/*0fb0*/ NOP; /* 0x0000000000007918 */
/* 0x000fc00000000000 */
/*0fc0*/ NOP; /* 0x0000000000007918 */
/* 0x000fc00000000000 */
/*0fd0*/ NOP; /* 0x0000000000007918 */
/* 0x000fc00000000000 */
/*0fe0*/ NOP; /* 0x0000000000007918 */
/* 0x000fc00000000000 */
/*0ff0*/ NOP; /* 0x0000000000007918 */
/* 0x000fc00000000000 */
.......... | .text
.amdgcn_target "amdgcn-amd-amdhsa--gfx1100"
.protected _Z15gHighwayForwardPfPKfS1_S1_m
.globl _Z15gHighwayForwardPfPKfS1_S1_m
.p2align 8
.type _Z15gHighwayForwardPfPKfS1_S1_m,@function
_Z15gHighwayForwardPfPKfS1_S1_m:
s_load_b64 s[8:9], s[0:1], 0x20
s_waitcnt lgkmcnt(0)
s_cmp_eq_u64 s[8:9], 0
s_cbranch_scc1 .LBB0_9
s_clause 0x2
s_load_b32 s10, s[0:1], 0x34
s_load_b32 s14, s[0:1], 0x28
s_load_b256 s[0:7], s[0:1], 0x0
s_waitcnt lgkmcnt(0)
s_and_b32 s10, s10, 0xffff
s_delay_alu instid0(SALU_CYCLE_1)
v_mad_u64_u32 v[1:2], null, s15, s10, v[0:1]
s_mul_i32 s14, s14, s10
s_mov_b32 s10, 0
s_branch .LBB0_4
.LBB0_2:
s_or_b32 exec_lo, exec_lo, s15
s_delay_alu instid0(VALU_DEP_2)
v_add_f64 v[6:7], v[6:7], 1.0
v_add_co_u32 v14, vcc_lo, s4, v2
v_add_co_ci_u32_e32 v15, vcc_lo, s5, v3, vcc_lo
v_add_co_u32 v16, vcc_lo, s2, v2
v_add_co_ci_u32_e32 v17, vcc_lo, s3, v3, vcc_lo
global_load_b32 v0, v[14:15], off
global_load_b32 v16, v[16:17], off
v_div_scale_f64 v[8:9], null, v[6:7], v[6:7], v[4:5]
v_div_scale_f64 v[14:15], vcc_lo, v[4:5], v[6:7], v[4:5]
s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_2) | instid1(VALU_DEP_1)
v_rcp_f64_e32 v[10:11], v[8:9]
s_waitcnt_depctr 0xfff
v_fma_f64 v[12:13], -v[8:9], v[10:11], 1.0
v_fma_f64 v[10:11], v[10:11], v[12:13], v[10:11]
s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
v_fma_f64 v[12:13], -v[8:9], v[10:11], 1.0
v_fma_f64 v[10:11], v[10:11], v[12:13], v[10:11]
s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
v_mul_f64 v[12:13], v[14:15], v[10:11]
v_fma_f64 v[8:9], -v[8:9], v[12:13], v[14:15]
s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_2) | instid1(VALU_DEP_3)
v_div_fmas_f64 v[8:9], v[8:9], v[10:11], v[12:13]
v_add_co_u32 v2, vcc_lo, s0, v2
v_add_co_ci_u32_e32 v3, vcc_lo, s1, v3, vcc_lo
v_div_fixup_f64 v[4:5], v[8:9], v[6:7], v[4:5]
s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
v_cvt_f32_f64_e32 v4, v[4:5]
v_sub_f32_e32 v5, 1.0, v4
s_waitcnt vmcnt(1)
s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
v_mul_f32_e32 v0, v0, v5
s_waitcnt vmcnt(0)
v_fmac_f32_e32 v0, v16, v4
global_store_b32 v[2:3], v0, off
.LBB0_3:
s_or_b32 exec_lo, exec_lo, s11
s_add_i32 s10, s14, s10
s_delay_alu instid0(SALU_CYCLE_1) | instskip(NEXT) | instid1(SALU_CYCLE_1)
s_ashr_i32 s11, s10, 31
v_cmp_ge_u64_e64 s11, s[10:11], s[8:9]
s_delay_alu instid0(VALU_DEP_1)
s_and_b32 vcc_lo, exec_lo, s11
s_cbranch_vccnz .LBB0_9
.LBB0_4:
s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
v_add_nc_u32_e32 v2, s10, v1
s_mov_b32 s11, exec_lo
v_ashrrev_i32_e32 v3, 31, v2
s_delay_alu instid0(VALU_DEP_1)
v_cmpx_gt_u64_e64 s[8:9], v[2:3]
s_cbranch_execz .LBB0_3
v_lshlrev_b64 v[2:3], 2, v[2:3]
s_mov_b32 s15, exec_lo
s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_2)
v_add_co_u32 v4, vcc_lo, s6, v2
v_add_co_ci_u32_e32 v5, vcc_lo, s7, v3, vcc_lo
global_load_b32 v0, v[4:5], off
s_waitcnt vmcnt(0)
v_cmpx_le_f32_e32 0, v0
s_xor_b32 s15, exec_lo, s15
s_cbranch_execz .LBB0_7
v_mul_f32_e32 v4, 0xbfb8aa3b, v0
v_cmp_nlt_f32_e32 vcc_lo, 0x42ce8ed0, v0
s_mov_b64 s[12:13], 1.0
s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_2)
v_rndne_f32_e32 v5, v4
v_fma_f32 v6, v0, 0xbfb8aa3b, -v4
v_sub_f32_e32 v4, v4, v5
s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_2)
v_fmac_f32_e32 v6, 0xb2a5705f, v0
v_cvt_i32_f32_e32 v5, v5
v_add_f32_e32 v4, v4, v6
s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_2) | instid1(VALU_DEP_1)
v_exp_f32_e32 v4, v4
s_waitcnt_depctr 0xfff
v_ldexp_f32 v4, v4, v5
v_cndmask_b32_e32 v4, 0, v4, vcc_lo
v_cmp_ngt_f32_e32 vcc_lo, 0xc2b17218, v0
s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
v_cndmask_b32_e32 v0, 0x7f800000, v4, vcc_lo
v_cvt_f64_f32_e32 v[6:7], v0
.LBB0_7:
s_or_saveexec_b32 s15, s15
v_dual_mov_b32 v4, s12 :: v_dual_mov_b32 v5, s13
s_xor_b32 exec_lo, exec_lo, s15
s_cbranch_execz .LBB0_2
v_mul_f32_e32 v4, 0x3fb8aa3b, v0
v_cmp_ngt_f32_e32 vcc_lo, 0xc2ce8ed0, v0
s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_2)
v_rndne_f32_e32 v5, v4
v_fma_f32 v6, v0, 0x3fb8aa3b, -v4
v_sub_f32_e32 v4, v4, v5
s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_2)
v_fmac_f32_e32 v6, 0x32a5705f, v0
v_cvt_i32_f32_e32 v5, v5
v_add_f32_e32 v4, v4, v6
s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_2) | instid1(VALU_DEP_1)
v_exp_f32_e32 v4, v4
s_waitcnt_depctr 0xfff
v_ldexp_f32 v4, v4, v5
v_cndmask_b32_e32 v4, 0, v4, vcc_lo
v_cmp_nlt_f32_e32 vcc_lo, 0x42b17218, v0
s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
v_cndmask_b32_e32 v0, 0x7f800000, v4, vcc_lo
v_cvt_f64_f32_e32 v[6:7], v0
s_delay_alu instid0(VALU_DEP_1)
v_dual_mov_b32 v4, v6 :: v_dual_mov_b32 v5, v7
s_branch .LBB0_2
.LBB0_9:
s_nop 0
s_sendmsg sendmsg(MSG_DEALLOC_VGPRS)
s_endpgm
.section .rodata,"a",@progbits
.p2align 6, 0x0
.amdhsa_kernel _Z15gHighwayForwardPfPKfS1_S1_m
.amdhsa_group_segment_fixed_size 0
.amdhsa_private_segment_fixed_size 0
.amdhsa_kernarg_size 296
.amdhsa_user_sgpr_count 15
.amdhsa_user_sgpr_dispatch_ptr 0
.amdhsa_user_sgpr_queue_ptr 0
.amdhsa_user_sgpr_kernarg_segment_ptr 1
.amdhsa_user_sgpr_dispatch_id 0
.amdhsa_user_sgpr_private_segment_size 0
.amdhsa_wavefront_size32 1
.amdhsa_uses_dynamic_stack 0
.amdhsa_enable_private_segment 0
.amdhsa_system_sgpr_workgroup_id_x 1
.amdhsa_system_sgpr_workgroup_id_y 0
.amdhsa_system_sgpr_workgroup_id_z 0
.amdhsa_system_sgpr_workgroup_info 0
.amdhsa_system_vgpr_workitem_id 0
.amdhsa_next_free_vgpr 18
.amdhsa_next_free_sgpr 16
.amdhsa_float_round_mode_32 0
.amdhsa_float_round_mode_16_64 0
.amdhsa_float_denorm_mode_32 3
.amdhsa_float_denorm_mode_16_64 3
.amdhsa_dx10_clamp 1
.amdhsa_ieee_mode 1
.amdhsa_fp16_overflow 0
.amdhsa_workgroup_processor_mode 1
.amdhsa_memory_ordered 1
.amdhsa_forward_progress 0
.amdhsa_shared_vgpr_count 0
.amdhsa_exception_fp_ieee_invalid_op 0
.amdhsa_exception_fp_denorm_src 0
.amdhsa_exception_fp_ieee_div_zero 0
.amdhsa_exception_fp_ieee_overflow 0
.amdhsa_exception_fp_ieee_underflow 0
.amdhsa_exception_fp_ieee_inexact 0
.amdhsa_exception_int_div_zero 0
.end_amdhsa_kernel
.text
.Lfunc_end0:
.size _Z15gHighwayForwardPfPKfS1_S1_m, .Lfunc_end0-_Z15gHighwayForwardPfPKfS1_S1_m
.section .AMDGPU.csdata,"",@progbits
.text
.p2alignl 7, 3214868480
.fill 96, 4, 3214868480
.type __hip_cuid_,@object
.section .bss,"aw",@nobits
.globl __hip_cuid_
__hip_cuid_:
.byte 0
.size __hip_cuid_, 1
.ident "AMD clang version 18.0.0git (https://github.com/RadeonOpenCompute/llvm-project roc-6.3.2 25012 e5bf7e55c91490b07c49d8960fa7983d864936c4)"
.section ".note.GNU-stack","",@progbits
.addrsig
.addrsig_sym __hip_cuid_
.amdgpu_metadata
---
amdhsa.kernels:
- .args:
- .address_space: global
.offset: 0
.size: 8
.value_kind: global_buffer
- .address_space: global
.offset: 8
.size: 8
.value_kind: global_buffer
- .address_space: global
.offset: 16
.size: 8
.value_kind: global_buffer
- .address_space: global
.offset: 24
.size: 8
.value_kind: global_buffer
- .offset: 32
.size: 8
.value_kind: by_value
- .offset: 40
.size: 4
.value_kind: hidden_block_count_x
- .offset: 44
.size: 4
.value_kind: hidden_block_count_y
- .offset: 48
.size: 4
.value_kind: hidden_block_count_z
- .offset: 52
.size: 2
.value_kind: hidden_group_size_x
- .offset: 54
.size: 2
.value_kind: hidden_group_size_y
- .offset: 56
.size: 2
.value_kind: hidden_group_size_z
- .offset: 58
.size: 2
.value_kind: hidden_remainder_x
- .offset: 60
.size: 2
.value_kind: hidden_remainder_y
- .offset: 62
.size: 2
.value_kind: hidden_remainder_z
- .offset: 80
.size: 8
.value_kind: hidden_global_offset_x
- .offset: 88
.size: 8
.value_kind: hidden_global_offset_y
- .offset: 96
.size: 8
.value_kind: hidden_global_offset_z
- .offset: 104
.size: 2
.value_kind: hidden_grid_dims
.group_segment_fixed_size: 0
.kernarg_segment_align: 8
.kernarg_segment_size: 296
.language: OpenCL C
.language_version:
- 2
- 0
.max_flat_workgroup_size: 1024
.name: _Z15gHighwayForwardPfPKfS1_S1_m
.private_segment_fixed_size: 0
.sgpr_count: 18
.sgpr_spill_count: 0
.symbol: _Z15gHighwayForwardPfPKfS1_S1_m.kd
.uniform_work_group_size: 1
.uses_dynamic_stack: false
.vgpr_count: 18
.vgpr_spill_count: 0
.wavefront_size: 32
.workgroup_processor_mode: 1
amdhsa.target: amdgcn-amd-amdhsa--gfx1100
amdhsa.version:
- 1
- 2
...
.end_amdgpu_metadata |
You are a helpful coding assistant specialized in converting from CUDA host assembly to AMD host assembly. | .file "tmpxft_0009b26f_00000000-6_gHighwayForward.cudafe1.cpp"
.text
#APP
#NO_APP
.type _ZL26__cudaUnregisterBinaryUtilv, @function
_ZL26__cudaUnregisterBinaryUtilv:
.LFB2030:
.cfi_startproc
endbr64
subq $8, %rsp
.cfi_def_cfa_offset 16
movq _ZL20__cudaFatCubinHandle(%rip), %rdi
call __cudaUnregisterFatBinary@PLT
addq $8, %rsp
.cfi_def_cfa_offset 8
ret
.cfi_endproc
.LFE2030:
.size _ZL26__cudaUnregisterBinaryUtilv, .-_ZL26__cudaUnregisterBinaryUtilv
.globl _Z45__device_stub__Z15gHighwayForwardPfPKfS1_S1_mPfPKfS1_S1_m
.type _Z45__device_stub__Z15gHighwayForwardPfPKfS1_S1_mPfPKfS1_S1_m, @function
_Z45__device_stub__Z15gHighwayForwardPfPKfS1_S1_mPfPKfS1_S1_m:
.LFB2052:
.cfi_startproc
endbr64
subq $168, %rsp
.cfi_def_cfa_offset 176
movq %rdi, 40(%rsp)
movq %rsi, 32(%rsp)
movq %rdx, 24(%rsp)
movq %rcx, 16(%rsp)
movq %r8, 8(%rsp)
movq %fs:40, %rax
movq %rax, 152(%rsp)
xorl %eax, %eax
leaq 40(%rsp), %rax
movq %rax, 112(%rsp)
leaq 32(%rsp), %rax
movq %rax, 120(%rsp)
leaq 24(%rsp), %rax
movq %rax, 128(%rsp)
leaq 16(%rsp), %rax
movq %rax, 136(%rsp)
leaq 8(%rsp), %rax
movq %rax, 144(%rsp)
movl $1, 64(%rsp)
movl $1, 68(%rsp)
movl $1, 72(%rsp)
movl $1, 76(%rsp)
movl $1, 80(%rsp)
movl $1, 84(%rsp)
leaq 56(%rsp), %rcx
leaq 48(%rsp), %rdx
leaq 76(%rsp), %rsi
leaq 64(%rsp), %rdi
call __cudaPopCallConfiguration@PLT
testl %eax, %eax
je .L7
.L3:
movq 152(%rsp), %rax
subq %fs:40, %rax
jne .L8
addq $168, %rsp
.cfi_remember_state
.cfi_def_cfa_offset 8
ret
.L7:
.cfi_restore_state
pushq 56(%rsp)
.cfi_def_cfa_offset 184
pushq 56(%rsp)
.cfi_def_cfa_offset 192
leaq 128(%rsp), %r9
movq 92(%rsp), %rcx
movl 100(%rsp), %r8d
movq 80(%rsp), %rsi
movl 88(%rsp), %edx
leaq _Z15gHighwayForwardPfPKfS1_S1_m(%rip), %rdi
call cudaLaunchKernel@PLT
addq $16, %rsp
.cfi_def_cfa_offset 176
jmp .L3
.L8:
call __stack_chk_fail@PLT
.cfi_endproc
.LFE2052:
.size _Z45__device_stub__Z15gHighwayForwardPfPKfS1_S1_mPfPKfS1_S1_m, .-_Z45__device_stub__Z15gHighwayForwardPfPKfS1_S1_mPfPKfS1_S1_m
.globl _Z15gHighwayForwardPfPKfS1_S1_m
.type _Z15gHighwayForwardPfPKfS1_S1_m, @function
_Z15gHighwayForwardPfPKfS1_S1_m:
.LFB2053:
.cfi_startproc
endbr64
subq $8, %rsp
.cfi_def_cfa_offset 16
call _Z45__device_stub__Z15gHighwayForwardPfPKfS1_S1_mPfPKfS1_S1_m
addq $8, %rsp
.cfi_def_cfa_offset 8
ret
.cfi_endproc
.LFE2053:
.size _Z15gHighwayForwardPfPKfS1_S1_m, .-_Z15gHighwayForwardPfPKfS1_S1_m
.section .rodata.str1.8,"aMS",@progbits,1
.align 8
.LC0:
.string "_Z15gHighwayForwardPfPKfS1_S1_m"
.text
.type _ZL24__sti____cudaRegisterAllv, @function
_ZL24__sti____cudaRegisterAllv:
.LFB2055:
.cfi_startproc
endbr64
subq $8, %rsp
.cfi_def_cfa_offset 16
leaq _ZL15__fatDeviceText(%rip), %rdi
call __cudaRegisterFatBinary@PLT
movq %rax, %rdi
movq %rax, _ZL20__cudaFatCubinHandle(%rip)
pushq $0
.cfi_def_cfa_offset 24
pushq $0
.cfi_def_cfa_offset 32
pushq $0
.cfi_def_cfa_offset 40
pushq $0
.cfi_def_cfa_offset 48
movl $0, %r9d
movl $-1, %r8d
leaq .LC0(%rip), %rdx
movq %rdx, %rcx
leaq _Z15gHighwayForwardPfPKfS1_S1_m(%rip), %rsi
call __cudaRegisterFunction@PLT
addq $32, %rsp
.cfi_def_cfa_offset 16
movq _ZL20__cudaFatCubinHandle(%rip), %rdi
call __cudaRegisterFatBinaryEnd@PLT
leaq _ZL26__cudaUnregisterBinaryUtilv(%rip), %rdi
call atexit@PLT
addq $8, %rsp
.cfi_def_cfa_offset 8
ret
.cfi_endproc
.LFE2055:
.size _ZL24__sti____cudaRegisterAllv, .-_ZL24__sti____cudaRegisterAllv
.section .init_array,"aw"
.align 8
.quad _ZL24__sti____cudaRegisterAllv
.section .nvFatBinSegment,"aw"
.align 8
.type _ZL15__fatDeviceText, @object
.size _ZL15__fatDeviceText, 24
_ZL15__fatDeviceText:
.long 1180844977
.long 1
.quad fatbinData
.quad 0
.local _ZL20__cudaFatCubinHandle
.comm _ZL20__cudaFatCubinHandle,8,8
.ident "GCC: (Ubuntu 13.3.0-6ubuntu2~24.04) 13.3.0"
.section .note.GNU-stack,"",@progbits
.section .note.gnu.property,"a"
.align 8
.long 1f - 0f
.long 4f - 1f
.long 5
0:
.string "GNU"
1:
.align 8
.long 0xc0000002
.long 3f - 2f
2:
.long 0x3
3:
.align 8
4: | .text
.file "gHighwayForward.hip"
.globl _Z30__device_stub__gHighwayForwardPfPKfS1_S1_m # -- Begin function _Z30__device_stub__gHighwayForwardPfPKfS1_S1_m
.p2align 4, 0x90
.type _Z30__device_stub__gHighwayForwardPfPKfS1_S1_m,@function
_Z30__device_stub__gHighwayForwardPfPKfS1_S1_m: # @_Z30__device_stub__gHighwayForwardPfPKfS1_S1_m
.cfi_startproc
# %bb.0:
subq $136, %rsp
.cfi_def_cfa_offset 144
movq %rdi, 88(%rsp)
movq %rsi, 80(%rsp)
movq %rdx, 72(%rsp)
movq %rcx, 64(%rsp)
movq %r8, 56(%rsp)
leaq 88(%rsp), %rax
movq %rax, 96(%rsp)
leaq 80(%rsp), %rax
movq %rax, 104(%rsp)
leaq 72(%rsp), %rax
movq %rax, 112(%rsp)
leaq 64(%rsp), %rax
movq %rax, 120(%rsp)
leaq 56(%rsp), %rax
movq %rax, 128(%rsp)
leaq 40(%rsp), %rdi
leaq 24(%rsp), %rsi
leaq 16(%rsp), %rdx
leaq 8(%rsp), %rcx
callq __hipPopCallConfiguration
movq 40(%rsp), %rsi
movl 48(%rsp), %edx
movq 24(%rsp), %rcx
movl 32(%rsp), %r8d
leaq 96(%rsp), %r9
movl $_Z15gHighwayForwardPfPKfS1_S1_m, %edi
pushq 8(%rsp)
.cfi_adjust_cfa_offset 8
pushq 24(%rsp)
.cfi_adjust_cfa_offset 8
callq hipLaunchKernel
addq $152, %rsp
.cfi_adjust_cfa_offset -152
retq
.Lfunc_end0:
.size _Z30__device_stub__gHighwayForwardPfPKfS1_S1_m, .Lfunc_end0-_Z30__device_stub__gHighwayForwardPfPKfS1_S1_m
.cfi_endproc
# -- End function
.p2align 4, 0x90 # -- Begin function __hip_module_ctor
.type __hip_module_ctor,@function
__hip_module_ctor: # @__hip_module_ctor
.cfi_startproc
# %bb.0:
subq $40, %rsp
.cfi_def_cfa_offset 48
cmpq $0, __hip_gpubin_handle(%rip)
jne .LBB1_2
# %bb.1:
movl $__hip_fatbin_wrapper, %edi
callq __hipRegisterFatBinary
movq %rax, __hip_gpubin_handle(%rip)
.LBB1_2:
movq __hip_gpubin_handle(%rip), %rdi
xorps %xmm0, %xmm0
movups %xmm0, 16(%rsp)
movups %xmm0, (%rsp)
movl $_Z15gHighwayForwardPfPKfS1_S1_m, %esi
movl $.L__unnamed_1, %edx
movl $.L__unnamed_1, %ecx
movl $-1, %r8d
xorl %r9d, %r9d
callq __hipRegisterFunction
movl $__hip_module_dtor, %edi
addq $40, %rsp
.cfi_def_cfa_offset 8
jmp atexit # TAILCALL
.Lfunc_end1:
.size __hip_module_ctor, .Lfunc_end1-__hip_module_ctor
.cfi_endproc
# -- End function
.p2align 4, 0x90 # -- Begin function __hip_module_dtor
.type __hip_module_dtor,@function
__hip_module_dtor: # @__hip_module_dtor
.cfi_startproc
# %bb.0:
movq __hip_gpubin_handle(%rip), %rdi
testq %rdi, %rdi
je .LBB2_2
# %bb.1:
pushq %rax
.cfi_def_cfa_offset 16
callq __hipUnregisterFatBinary
movq $0, __hip_gpubin_handle(%rip)
addq $8, %rsp
.cfi_def_cfa_offset 8
.LBB2_2:
retq
.Lfunc_end2:
.size __hip_module_dtor, .Lfunc_end2-__hip_module_dtor
.cfi_endproc
# -- End function
.type _Z15gHighwayForwardPfPKfS1_S1_m,@object # @_Z15gHighwayForwardPfPKfS1_S1_m
.section .rodata,"a",@progbits
.globl _Z15gHighwayForwardPfPKfS1_S1_m
.p2align 3, 0x0
_Z15gHighwayForwardPfPKfS1_S1_m:
.quad _Z30__device_stub__gHighwayForwardPfPKfS1_S1_m
.size _Z15gHighwayForwardPfPKfS1_S1_m, 8
.type .L__unnamed_1,@object # @0
.section .rodata.str1.1,"aMS",@progbits,1
.L__unnamed_1:
.asciz "_Z15gHighwayForwardPfPKfS1_S1_m"
.size .L__unnamed_1, 32
.type __hip_fatbin_wrapper,@object # @__hip_fatbin_wrapper
.section .hipFatBinSegment,"a",@progbits
.p2align 3, 0x0
__hip_fatbin_wrapper:
.long 1212764230 # 0x48495046
.long 1 # 0x1
.quad __hip_fatbin
.quad 0
.size __hip_fatbin_wrapper, 24
.type __hip_gpubin_handle,@object # @__hip_gpubin_handle
.local __hip_gpubin_handle
.comm __hip_gpubin_handle,8,8
.section .init_array,"aw",@init_array
.p2align 3, 0x0
.quad __hip_module_ctor
.type __hip_cuid_,@object # @__hip_cuid_
.bss
.globl __hip_cuid_
__hip_cuid_:
.byte 0 # 0x0
.size __hip_cuid_, 1
.section ".linker-options","e",@llvm_linker_options
.ident "AMD clang version 18.0.0git (https://github.com/RadeonOpenCompute/llvm-project roc-6.3.2 25012 e5bf7e55c91490b07c49d8960fa7983d864936c4)"
.section ".note.GNU-stack","",@progbits
.addrsig
.addrsig_sym _Z30__device_stub__gHighwayForwardPfPKfS1_S1_m
.addrsig_sym __hip_module_ctor
.addrsig_sym __hip_module_dtor
.addrsig_sym _Z15gHighwayForwardPfPKfS1_S1_m
.addrsig_sym __hip_fatbin
.addrsig_sym __hip_fatbin_wrapper
.addrsig_sym __hip_cuid_ |
You are a helpful coding assistant specialized in converting CUDA source code to CUDA device assembly. | #include "includes.h"
__global__ void CalculateSampleB( const float *background, float *subBG, const int wb, const int hb, const int ws, const int hs, const int sRate ){
const int ys = blockIdx.y * blockDim.y + threadIdx.y;
const int xs = blockIdx.x * blockDim.x + threadIdx.x;
const int curst = ws * ys + xs;
if (ys < hs && xs < ws){
const int yb = ys * sRate;
const int xb = xs * sRate;
int num = 0;
float sum[3] = {0};
for (int i=0; i<sRate; i++){
for (int j=0; j<sRate; j++){
if (yb + i < hb && xb + j < wb){
int curb = wb * (yb+i) + (xb+j);
sum[0] += background[curb*3+0];
sum[1] += background[curb*3+1];
sum[2] += background[curb*3+2];
num++;
}
}
}
subBG[curst*3+0] = sum[0] / num;
subBG[curst*3+1] = sum[1] / num;
subBG[curst*3+2] = sum[2] / num;
}
} | code for sm_80
Function : _Z16CalculateSampleBPKfPfiiiii
.headerflags @"EF_CUDA_TEXMODE_UNIFIED EF_CUDA_64BIT_ADDRESS EF_CUDA_SM80 EF_CUDA_VIRTUAL_SM(EF_CUDA_SM80)"
/*0000*/ IMAD.MOV.U32 R1, RZ, RZ, c[0x0][0x28] ; /* 0x00000a00ff017624 */
/* 0x000fe400078e00ff */
/*0010*/ S2R R8, SR_CTAID.Y ; /* 0x0000000000087919 */
/* 0x000e280000002600 */
/*0020*/ S2R R3, SR_TID.Y ; /* 0x0000000000037919 */
/* 0x000e280000002200 */
/*0030*/ S2R R9, SR_CTAID.X ; /* 0x0000000000097919 */
/* 0x000e680000002500 */
/*0040*/ S2R R0, SR_TID.X ; /* 0x0000000000007919 */
/* 0x000e620000002100 */
/*0050*/ IMAD R8, R8, c[0x0][0x4], R3 ; /* 0x0000010008087a24 */
/* 0x001fca00078e0203 */
/*0060*/ ISETP.GE.AND P0, PT, R8, c[0x0][0x17c], PT ; /* 0x00005f0008007a0c */
/* 0x000fe20003f06270 */
/*0070*/ IMAD R9, R9, c[0x0][0x0], R0 ; /* 0x0000000009097a24 */
/* 0x002fca00078e0200 */
/*0080*/ ISETP.GE.OR P0, PT, R9, c[0x0][0x178], P0 ; /* 0x00005e0009007a0c */
/* 0x000fda0000706670 */
/*0090*/ @P0 EXIT ; /* 0x000000000000094d */
/* 0x000fea0003800000 */
/*00a0*/ IMAD.MOV.U32 R10, RZ, RZ, c[0x0][0x180] ; /* 0x00006000ff0a7624 */
/* 0x000fe200078e00ff */
/*00b0*/ ULDC.64 UR4, c[0x0][0x118] ; /* 0x0000460000047ab9 */
/* 0x000fe20000000a00 */
/*00c0*/ IMAD R3, R8, c[0x0][0x178], R9 ; /* 0x00005e0008037a24 */
/* 0x000fe200078e0209 */
/*00d0*/ CS2R R6, SRZ ; /* 0x0000000000067805 */
/* 0x000fe2000001ff00 */
/*00e0*/ IMAD.MOV.U32 R0, RZ, RZ, RZ ; /* 0x000000ffff007224 */
/* 0x000fe200078e00ff */
/*00f0*/ ISETP.GE.AND P0, PT, R10, 0x1, PT ; /* 0x000000010a00780c */
/* 0x000fe20003f06270 */
/*0100*/ IMAD.MOV.U32 R2, RZ, RZ, RZ ; /* 0x000000ffff027224 */
/* 0x000fd800078e00ff */
/*0110*/ @!P0 BRA 0x7c0 ; /* 0x000006a000008947 */
/* 0x000fea0003800000 */
/*0120*/ LOP3.LUT R10, R10, 0x3, RZ, 0xc0, !PT ; /* 0x000000030a0a7812 */
/* 0x000fe200078ec0ff */
/*0130*/ HFMA2.MMA R2, -RZ, RZ, 0, 0 ; /* 0x00000000ff027435 */
/* 0x000fe200000001ff */
/*0140*/ CS2R R6, SRZ ; /* 0x0000000000067805 */
/* 0x000fe2000001ff00 */
/*0150*/ IMAD.MOV.U32 R11, RZ, RZ, RZ ; /* 0x000000ffff0b7224 */
/* 0x000fe200078e00ff */
/*0160*/ IADD3 R12, -R10, c[0x0][0x180], RZ ; /* 0x000060000a0c7a10 */
/* 0x000fe20007ffe1ff */
/*0170*/ IMAD.MOV.U32 R0, RZ, RZ, RZ ; /* 0x000000ffff007224 */
/* 0x000fe400078e00ff */
/*0180*/ IMAD.MOV.U32 R4, RZ, RZ, c[0x0][0x180] ; /* 0x00006000ff047624 */
/* 0x000fe200078e00ff */
/*0190*/ ISETP.NE.AND P0, PT, R10, RZ, PT ; /* 0x000000ff0a00720c */
/* 0x000fe20003f05270 */
/*01a0*/ IMAD R13, R8, c[0x0][0x180], R11 ; /* 0x00006000080d7a24 */
/* 0x000fe200078e020b */
/*01b0*/ IADD3 R11, R11, 0x1, RZ ; /* 0x000000010b0b7810 */
/* 0x000fe20007ffe0ff */
/*01c0*/ IMAD.MOV.U32 R16, RZ, RZ, RZ ; /* 0x000000ffff107224 */
/* 0x000fe200078e00ff */
/*01d0*/ IADD3 R4, R4, -0x1, RZ ; /* 0xffffffff04047810 */
/* 0x000fc80007ffe0ff */
/*01e0*/ ISETP.GE.U32.AND P1, PT, R4, 0x3, PT ; /* 0x000000030400780c */
/* 0x000fda0003f26070 */
/*01f0*/ @!P1 BRA 0x4f0 ; /* 0x000002f000009947 */
/* 0x000fea0003800000 */
/*0200*/ ISETP.GE.AND P1, PT, R13, c[0x0][0x174], PT ; /* 0x00005d000d007a0c */
/* 0x000fe20003f26270 */
/*0210*/ IMAD.MOV.U32 R16, RZ, RZ, RZ ; /* 0x000000ffff107224 */
/* 0x000fe400078e00ff */
/*0220*/ IMAD.MOV.U32 R14, RZ, RZ, R12 ; /* 0x000000ffff0e7224 */
/* 0x000fe400078e000c */
/*0230*/ IMAD R18, R9, c[0x0][0x180], R16 ; /* 0x0000600009127a24 */
/* 0x000fc800078e0210 */
/*0240*/ IMAD R4, R13, c[0x0][0x170], R18 ; /* 0x00005c000d047a24 */
/* 0x000fe200078e0212 */
/*0250*/ IADD3 R5, R18.reuse, 0x1, RZ ; /* 0x0000000112057810 */
/* 0x040fe40007ffe0ff */
/*0260*/ ISETP.GE.OR P4, PT, R18, c[0x0][0x170], P1 ; /* 0x00005c0012007a0c */
/* 0x000fe20000f86670 */
/*0270*/ IMAD R4, R4, 0x3, RZ ; /* 0x0000000304047824 */
/* 0x000fe200078e02ff */
/*0280*/ ISETP.GE.OR P5, PT, R5, c[0x0][0x170], P1 ; /* 0x00005c0005007a0c */
/* 0x000fe40000fa6670 */
/*0290*/ IADD3 R15, R18, 0x2, RZ ; /* 0x00000002120f7810 */
/* 0x000fe40007ffe0ff */
/*02a0*/ MOV R5, 0x4 ; /* 0x0000000400057802 */
/* 0x000fe40000000f00 */
/*02b0*/ ISETP.GE.OR P3, PT, R15, c[0x0][0x170], P1 ; /* 0x00005c000f007a0c */
/* 0x000fc40000f66670 */
/*02c0*/ IADD3 R15, R18, 0x3, RZ ; /* 0x00000003120f7810 */
/* 0x000fe20007ffe0ff */
/*02d0*/ IMAD.WIDE R4, R4, R5, c[0x0][0x160] ; /* 0x0000580004047625 */
/* 0x000fc600078e0205 */
/*02e0*/ ISETP.GE.OR P2, PT, R15, c[0x0][0x170], P1 ; /* 0x00005c000f007a0c */
/* 0x000fe40000f46670 */
/*02f0*/ @!P4 LDG.E R15, [R4.64] ; /* 0x00000004040fc981 */
/* 0x000ea8000c1e1900 */
/*0300*/ @!P4 LDG.E R17, [R4.64+0x4] ; /* 0x000004040411c981 */
/* 0x000ee8000c1e1900 */
/*0310*/ @!P4 LDG.E R19, [R4.64+0x8] ; /* 0x000008040413c981 */
/* 0x000f28000c1e1900 */
/*0320*/ @!P5 LDG.E R21, [R4.64+0xc] ; /* 0x00000c040415d981 */
/* 0x000f68000c1e1900 */
/*0330*/ @!P5 LDG.E R23, [R4.64+0x10] ; /* 0x000010040417d981 */
/* 0x000f68000c1e1900 */
/*0340*/ @!P5 LDG.E R25, [R4.64+0x14] ; /* 0x000014040419d981 */
/* 0x000f68000c1e1900 */
/*0350*/ @!P3 LDG.E R27, [R4.64+0x18] ; /* 0x00001804041bb981 */
/* 0x000f68000c1e1900 */
/*0360*/ @!P3 LDG.E R29, [R4.64+0x1c] ; /* 0x00001c04041db981 */
/* 0x000f68000c1e1900 */
/*0370*/ @!P3 LDG.E R18, [R4.64+0x20] ; /* 0x000020040412b981 */
/* 0x000f68000c1e1900 */
/*0380*/ @!P2 LDG.E R20, [R4.64+0x24] ; /* 0x000024040414a981 */
/* 0x000f68000c1e1900 */
/*0390*/ @!P2 LDG.E R22, [R4.64+0x28] ; /* 0x000028040416a981 */
/* 0x000f68000c1e1900 */
/*03a0*/ @!P2 LDG.E R24, [R4.64+0x2c] ; /* 0x00002c040418a981 */
/* 0x000f62000c1e1900 */
/*03b0*/ IADD3 R14, R14, -0x4, RZ ; /* 0xfffffffc0e0e7810 */
/* 0x000fc40007ffe0ff */
/*03c0*/ @!P4 IADD3 R7, R7, 0x1, RZ ; /* 0x000000010707c810 */
/* 0x000fe40007ffe0ff */
/*03d0*/ IADD3 R16, R16, 0x4, RZ ; /* 0x0000000410107810 */
/* 0x000fe40007ffe0ff */
/*03e0*/ @!P5 IADD3 R7, R7, 0x1, RZ ; /* 0x000000010707d810 */
/* 0x000fc80007ffe0ff */
/*03f0*/ @!P3 IADD3 R7, R7, 0x1, RZ ; /* 0x000000010707b810 */
/* 0x000fc80007ffe0ff */
/*0400*/ @!P2 IADD3 R7, R7, 0x1, RZ ; /* 0x000000010707a810 */
/* 0x000fe20007ffe0ff */
/*0410*/ @!P4 FADD R6, R6, R15 ; /* 0x0000000f0606c221 */
/* 0x004fe40000000000 */
/*0420*/ @!P4 FADD R2, R2, R17 ; /* 0x000000110202c221 */
/* 0x008fe40000000000 */
/*0430*/ @!P4 FADD R0, R0, R19 ; /* 0x000000130000c221 */
/* 0x010fe20000000000 */
/*0440*/ ISETP.NE.AND P4, PT, R14, RZ, PT ; /* 0x000000ff0e00720c */
/* 0x000fe20003f85270 */
/*0450*/ @!P5 FADD R6, R6, R21 ; /* 0x000000150606d221 */
/* 0x020fe40000000000 */
/*0460*/ @!P5 FADD R2, R2, R23 ; /* 0x000000170202d221 */
/* 0x000fe40000000000 */
/*0470*/ @!P5 FADD R0, R0, R25 ; /* 0x000000190000d221 */
/* 0x000fc40000000000 */
/*0480*/ @!P3 FADD R6, R6, R27 ; /* 0x0000001b0606b221 */
/* 0x000fe40000000000 */
/*0490*/ @!P3 FADD R2, R2, R29 ; /* 0x0000001d0202b221 */
/* 0x000fe40000000000 */
/*04a0*/ @!P3 FADD R0, R0, R18 ; /* 0x000000120000b221 */
/* 0x000fe40000000000 */
/*04b0*/ @!P2 FADD R6, R6, R20 ; /* 0x000000140606a221 */
/* 0x000fe40000000000 */
/*04c0*/ @!P2 FADD R2, R2, R22 ; /* 0x000000160202a221 */
/* 0x000fe40000000000 */
/*04d0*/ @!P2 FADD R0, R0, R24 ; /* 0x000000180000a221 */
/* 0x000fe20000000000 */
/*04e0*/ @P4 BRA 0x230 ; /* 0xfffffd4000004947 */
/* 0x000fea000383ffff */
/*04f0*/ ISETP.GE.AND P1, PT, R11, c[0x0][0x180], PT ; /* 0x000060000b007a0c */
/* 0x000fe20003f26270 */
/*0500*/ @!P0 BRA 0x7b0 ; /* 0x000002a000008947 */
/* 0x000fd80003800000 */
/*0510*/ IMAD R16, R9, c[0x0][0x180], R16 ; /* 0x0000600009107a24 */
/* 0x000fe200078e0210 */
/*0520*/ ISETP.GE.AND P0, PT, R13, c[0x0][0x174], PT ; /* 0x00005d000d007a0c */
/* 0x000fe20003f06270 */
/*0530*/ BSSY B0, 0x630 ; /* 0x000000f000007945 */
/* 0x000fe20003800000 */
/*0540*/ ISETP.NE.AND P3, PT, R10, 0x1, PT ; /* 0x000000010a00780c */
/* 0x000fc40003f65270 */
/*0550*/ ISETP.GE.OR P2, PT, R16, c[0x0][0x170], P0 ; /* 0x00005c0010007a0c */
/* 0x000fda0000746670 */
/*0560*/ @P2 BRA 0x620 ; /* 0x000000b000002947 */
/* 0x000fea0003800000 */
/*0570*/ IMAD R4, R13, c[0x0][0x170], R16 ; /* 0x00005c000d047a24 */
/* 0x000fe400078e0210 */
/*0580*/ IMAD.MOV.U32 R5, RZ, RZ, 0x4 ; /* 0x00000004ff057424 */
/* 0x000fe400078e00ff */
/*0590*/ IMAD R4, R4, 0x3, RZ ; /* 0x0000000304047824 */
/* 0x000fc800078e02ff */
/*05a0*/ IMAD.WIDE R4, R4, R5, c[0x0][0x160] ; /* 0x0000580004047625 */
/* 0x000fca00078e0205 */
/*05b0*/ LDG.E R15, [R4.64] ; /* 0x00000004040f7981 */
/* 0x000ea8000c1e1900 */
/*05c0*/ LDG.E R17, [R4.64+0x4] ; /* 0x0000040404117981 */
/* 0x000ee8000c1e1900 */
/*05d0*/ LDG.E R19, [R4.64+0x8] ; /* 0x0000080404137981 */
/* 0x000f22000c1e1900 */
/*05e0*/ IADD3 R7, R7, 0x1, RZ ; /* 0x0000000107077810 */
/* 0x000fe20007ffe0ff */
/*05f0*/ FADD R6, R6, R15 ; /* 0x0000000f06067221 */
/* 0x004fc40000000000 */
/*0600*/ FADD R2, R2, R17 ; /* 0x0000001102027221 */
/* 0x008fe40000000000 */
/*0610*/ FADD R0, R0, R19 ; /* 0x0000001300007221 */
/* 0x010fe40000000000 */
/*0620*/ BSYNC B0 ; /* 0x0000000000007941 */
/* 0x000fea0003800000 */
/*0630*/ @!P3 BRA 0x7b0 ; /* 0x000001700000b947 */
/* 0x000fea0003800000 */
/*0640*/ IADD3 R4, R16.reuse, 0x1, RZ ; /* 0x0000000110047810 */
/* 0x040fe40007ffe0ff */
/*0650*/ IADD3 R5, R16, 0x2, RZ ; /* 0x0000000210057810 */
/* 0x000fe40007ffe0ff */
/*0660*/ ISETP.GE.OR P2, PT, R4, c[0x0][0x170], P0 ; /* 0x00005c0004007a0c */
/* 0x000fe20000746670 */
/*0670*/ IMAD R13, R13, c[0x0][0x170], R4 ; /* 0x00005c000d0d7a24 */
/* 0x000fe200078e0204 */
/*0680*/ ISETP.GE.OR P0, PT, R5, c[0x0][0x170], P0 ; /* 0x00005c0005007a0c */
/* 0x000fe20000706670 */
/*0690*/ IMAD.MOV.U32 R5, RZ, RZ, 0x4 ; /* 0x00000004ff057424 */
/* 0x000fe400078e00ff */
/*06a0*/ IMAD R4, R13, 0x3, RZ ; /* 0x000000030d047824 */
/* 0x000fe200078e02ff */
/*06b0*/ ISETP.EQ.OR P0, PT, R10, 0x2, P0 ; /* 0x000000020a00780c */
/* 0x000fc60000702670 */
/*06c0*/ IMAD.WIDE R4, R4, R5, c[0x0][0x160] ; /* 0x0000580004047625 */
/* 0x000fca00078e0205 */
/*06d0*/ @!P2 LDG.E R13, [R4.64] ; /* 0x00000004040da981 */
/* 0x000ea8000c1e1900 */
/*06e0*/ @!P2 LDG.E R15, [R4.64+0x4] ; /* 0x00000404040fa981 */
/* 0x000ee8000c1e1900 */
/*06f0*/ @!P2 LDG.E R17, [R4.64+0x8] ; /* 0x000008040411a981 */
/* 0x000f28000c1e1900 */
/*0700*/ @!P0 LDG.E R19, [R4.64+0xc] ; /* 0x00000c0404138981 */
/* 0x000f68000c1e1900 */
/*0710*/ @!P0 LDG.E R21, [R4.64+0x10] ; /* 0x0000100404158981 */
/* 0x000f68000c1e1900 */
/*0720*/ @!P0 LDG.E R23, [R4.64+0x14] ; /* 0x0000140404178981 */
/* 0x000f62000c1e1900 */
/*0730*/ @!P2 IADD3 R7, R7, 0x1, RZ ; /* 0x000000010707a810 */
/* 0x000fc80007ffe0ff */
/*0740*/ @!P0 IADD3 R7, R7, 0x1, RZ ; /* 0x0000000107078810 */
/* 0x000fe20007ffe0ff */
/*0750*/ @!P2 FADD R6, R6, R13 ; /* 0x0000000d0606a221 */
/* 0x004fe40000000000 */
/*0760*/ @!P2 FADD R2, R2, R15 ; /* 0x0000000f0202a221 */
/* 0x008fe40000000000 */
/*0770*/ @!P2 FADD R0, R0, R17 ; /* 0x000000110000a221 */
/* 0x010fe40000000000 */
/*0780*/ @!P0 FADD R6, R6, R19 ; /* 0x0000001306068221 */
/* 0x020fe40000000000 */
/*0790*/ @!P0 FADD R2, R2, R21 ; /* 0x0000001502028221 */
/* 0x000fe40000000000 */
/*07a0*/ @!P0 FADD R0, R0, R23 ; /* 0x0000001700008221 */
/* 0x000fc40000000000 */
/*07b0*/ @!P1 BRA 0x180 ; /* 0xfffff9c000009947 */
/* 0x000fea000383ffff */
/*07c0*/ I2F R7, R7 ; /* 0x0000000700077306 */
/* 0x000e220000201400 */
/*07d0*/ BSSY B0, 0x8b0 ; /* 0x000000d000007945 */
/* 0x000fee0003800000 */
/*07e0*/ MUFU.RCP R4, R7 ; /* 0x0000000700047308 */
/* 0x001e300000001000 */
/*07f0*/ FCHK P0, R6, R7 ; /* 0x0000000706007302 */
/* 0x000e620000000000 */
/*0800*/ FFMA R5, -R7, R4, 1 ; /* 0x3f80000007057423 */
/* 0x001fc80000000104 */
/*0810*/ FFMA R5, R4, R5, R4 ; /* 0x0000000504057223 */
/* 0x000fc80000000004 */
/*0820*/ FFMA R4, R5, R6, RZ ; /* 0x0000000605047223 */
/* 0x000fc800000000ff */
/*0830*/ FFMA R8, -R7, R4, R6 ; /* 0x0000000407087223 */
/* 0x000fc80000000106 */
/*0840*/ FFMA R9, R5, R8, R4 ; /* 0x0000000805097223 */
/* 0x000fe20000000004 */
/*0850*/ @!P0 BRA 0x8a0 ; /* 0x0000004000008947 */
/* 0x002fea0003800000 */
/*0860*/ IMAD.MOV.U32 R12, RZ, RZ, R6 ; /* 0x000000ffff0c7224 */
/* 0x000fe200078e0006 */
/*0870*/ MOV R6, 0x890 ; /* 0x0000089000067802 */
/* 0x000fe40000000f00 */
/*0880*/ CALL.REL.NOINC 0xae0 ; /* 0x0000025000007944 */
/* 0x000fea0003c00000 */
/*0890*/ IMAD.MOV.U32 R9, RZ, RZ, R10 ; /* 0x000000ffff097224 */
/* 0x000fe400078e000a */
/*08a0*/ BSYNC B0 ; /* 0x0000000000007941 */
/* 0x000fea0003800000 */
/*08b0*/ HFMA2.MMA R4, -RZ, RZ, 0, 2.384185791015625e-07 ; /* 0x00000004ff047435 */
/* 0x000fe200000001ff */
/*08c0*/ MUFU.RCP R6, R7 ; /* 0x0000000700067308 */
/* 0x000e220000001000 */
/*08d0*/ IMAD R3, R3, 0x3, RZ ; /* 0x0000000303037824 */
/* 0x000fe200078e02ff */
/*08e0*/ BSSY B0, 0x9d0 ; /* 0x000000e000007945 */
/* 0x000fec0003800000 */
/*08f0*/ FCHK P0, R2, R7 ; /* 0x0000000702007302 */
/* 0x000e620000000000 */
/*0900*/ IMAD.WIDE R4, R3, R4, c[0x0][0x168] ; /* 0x00005a0003047625 */
/* 0x000fca00078e0204 */
/*0910*/ STG.E [R4.64], R9 ; /* 0x0000000904007986 */
/* 0x0005e2000c101904 */
/*0920*/ FFMA R3, -R7, R6, 1 ; /* 0x3f80000007037423 */
/* 0x001fc80000000106 */
/*0930*/ FFMA R11, R6, R3, R6 ; /* 0x00000003060b7223 */
/* 0x000fc80000000006 */
/*0940*/ FFMA R3, R11, R2, RZ ; /* 0x000000020b037223 */
/* 0x000fc800000000ff */
/*0950*/ FFMA R6, -R7, R3, R2 ; /* 0x0000000307067223 */
/* 0x000fc80000000102 */
/*0960*/ FFMA R3, R11, R6, R3 ; /* 0x000000060b037223 */
/* 0x000fe20000000003 */
/*0970*/ @!P0 BRA 0x9c0 ; /* 0x0000004000008947 */
/* 0x002fea0003800000 */
/*0980*/ IMAD.MOV.U32 R12, RZ, RZ, R2 ; /* 0x000000ffff0c7224 */
/* 0x004fe200078e0002 */
/*0990*/ MOV R6, 0x9b0 ; /* 0x000009b000067802 */
/* 0x000fe40000000f00 */
/*09a0*/ CALL.REL.NOINC 0xae0 ; /* 0x0000013000007944 */
/* 0x000fea0003c00000 */
/*09b0*/ IMAD.MOV.U32 R3, RZ, RZ, R10 ; /* 0x000000ffff037224 */
/* 0x000fe400078e000a */
/*09c0*/ BSYNC B0 ; /* 0x0000000000007941 */
/* 0x004fea0003800000 */
/*09d0*/ MUFU.RCP R2, R7 ; /* 0x0000000700027308 */
/* 0x000e220000001000 */
/*09e0*/ STG.E [R4.64+0x4], R3 ; /* 0x0000040304007986 */
/* 0x0003e2000c101904 */
/*09f0*/ BSSY B0, 0xac0 ; /* 0x000000c000007945 */
/* 0x000fec0003800000 */
/*0a00*/ FCHK P0, R0, R7 ; /* 0x0000000700007302 */
/* 0x000ea20000000000 */
/*0a10*/ FFMA R9, -R7, R2, 1 ; /* 0x3f80000007097423 */
/* 0x001fc80000000102 */
/*0a20*/ FFMA R11, R2, R9, R2 ; /* 0x00000009020b7223 */
/* 0x000fc80000000002 */
/*0a30*/ FFMA R2, R11, R0, RZ ; /* 0x000000000b027223 */
/* 0x000fc800000000ff */
/*0a40*/ FFMA R9, -R7, R2, R0 ; /* 0x0000000207097223 */
/* 0x000fc80000000100 */
/*0a50*/ FFMA R9, R11, R9, R2 ; /* 0x000000090b097223 */
/* 0x000fe20000000002 */
/*0a60*/ @!P0 BRA 0xab0 ; /* 0x0000004000008947 */
/* 0x004fea0003800000 */
/*0a70*/ IMAD.MOV.U32 R12, RZ, RZ, R0 ; /* 0x000000ffff0c7224 */
/* 0x002fe200078e0000 */
/*0a80*/ MOV R6, 0xaa0 ; /* 0x00000aa000067802 */
/* 0x000fe40000000f00 */
/*0a90*/ CALL.REL.NOINC 0xae0 ; /* 0x0000004000007944 */
/* 0x000fea0003c00000 */
/*0aa0*/ IMAD.MOV.U32 R9, RZ, RZ, R10 ; /* 0x000000ffff097224 */
/* 0x000fe400078e000a */
/*0ab0*/ BSYNC B0 ; /* 0x0000000000007941 */
/* 0x002fea0003800000 */
/*0ac0*/ STG.E [R4.64+0x8], R9 ; /* 0x0000080904007986 */
/* 0x000fe2000c101904 */
/*0ad0*/ EXIT ; /* 0x000000000000794d */
/* 0x000fea0003800000 */
/*0ae0*/ SHF.R.U32.HI R10, RZ, 0x17, R7.reuse ; /* 0x00000017ff0a7819 */
/* 0x100fe20000011607 */
/*0af0*/ BSSY B1, 0x1140 ; /* 0x0000064000017945 */
/* 0x000fe20003800000 */
/*0b00*/ SHF.R.U32.HI R8, RZ, 0x17, R12 ; /* 0x00000017ff087819 */
/* 0x000fe2000001160c */
/*0b10*/ IMAD.MOV.U32 R11, RZ, RZ, R7 ; /* 0x000000ffff0b7224 */
/* 0x000fe200078e0007 */
/*0b20*/ LOP3.LUT R10, R10, 0xff, RZ, 0xc0, !PT ; /* 0x000000ff0a0a7812 */
/* 0x000fe400078ec0ff */
/*0b30*/ LOP3.LUT R14, R8, 0xff, RZ, 0xc0, !PT ; /* 0x000000ff080e7812 */
/* 0x000fe400078ec0ff */
/*0b40*/ IADD3 R15, R10, -0x1, RZ ; /* 0xffffffff0a0f7810 */
/* 0x000fc40007ffe0ff */
/*0b50*/ IADD3 R13, R14, -0x1, RZ ; /* 0xffffffff0e0d7810 */
/* 0x000fe40007ffe0ff */
/*0b60*/ ISETP.GT.U32.AND P0, PT, R15, 0xfd, PT ; /* 0x000000fd0f00780c */
/* 0x000fe40003f04070 */
/*0b70*/ MOV R8, R12 ; /* 0x0000000c00087202 */
/* 0x000fe40000000f00 */
/*0b80*/ ISETP.GT.U32.OR P0, PT, R13, 0xfd, P0 ; /* 0x000000fd0d00780c */
/* 0x000fda0000704470 */
/*0b90*/ @!P0 IMAD.MOV.U32 R9, RZ, RZ, RZ ; /* 0x000000ffff098224 */
/* 0x000fe200078e00ff */
/*0ba0*/ @!P0 BRA 0xd20 ; /* 0x0000017000008947 */
/* 0x000fea0003800000 */
/*0bb0*/ FSETP.GTU.FTZ.AND P0, PT, |R12|, +INF , PT ; /* 0x7f8000000c00780b */
/* 0x000fe40003f1c200 */
/*0bc0*/ FSETP.GTU.FTZ.AND P1, PT, |R7|, +INF , PT ; /* 0x7f8000000700780b */
/* 0x000fc80003f3c200 */
/*0bd0*/ PLOP3.LUT P0, PT, P0, P1, PT, 0xa8, 0x0 ; /* 0x000000000000781c */
/* 0x000fda0000703570 */
/*0be0*/ @P0 BRA 0x1120 ; /* 0x0000053000000947 */
/* 0x000fea0003800000 */
/*0bf0*/ LOP3.LUT P0, RZ, R11, 0x7fffffff, R8, 0xc8, !PT ; /* 0x7fffffff0bff7812 */
/* 0x000fda000780c808 */
/*0c00*/ @!P0 BRA 0x1100 ; /* 0x000004f000008947 */
/* 0x000fea0003800000 */
/*0c10*/ FSETP.NEU.FTZ.AND P0, PT, |R12|.reuse, +INF , PT ; /* 0x7f8000000c00780b */
/* 0x040fe40003f1d200 */
/*0c20*/ FSETP.NEU.FTZ.AND P2, PT, |R7|, +INF , PT ; /* 0x7f8000000700780b */
/* 0x000fe40003f5d200 */
/*0c30*/ FSETP.NEU.FTZ.AND P1, PT, |R12|, +INF , PT ; /* 0x7f8000000c00780b */
/* 0x000fd60003f3d200 */
/*0c40*/ @!P2 BRA !P0, 0x1100 ; /* 0x000004b00000a947 */
/* 0x000fea0004000000 */
/*0c50*/ LOP3.LUT P0, RZ, R8, 0x7fffffff, RZ, 0xc0, !PT ; /* 0x7fffffff08ff7812 */
/* 0x000fc8000780c0ff */
/*0c60*/ PLOP3.LUT P0, PT, P2, P0, PT, 0x2a, 0x0 ; /* 0x000000000000781c */
/* 0x000fda0001700572 */
/*0c70*/ @P0 BRA 0x10e0 ; /* 0x0000046000000947 */
/* 0x000fea0003800000 */
/*0c80*/ LOP3.LUT P0, RZ, R11, 0x7fffffff, RZ, 0xc0, !PT ; /* 0x7fffffff0bff7812 */
/* 0x000fc8000780c0ff */
/*0c90*/ PLOP3.LUT P0, PT, P1, P0, PT, 0x2a, 0x0 ; /* 0x000000000000781c */
/* 0x000fda0000f00572 */
/*0ca0*/ @P0 BRA 0x10b0 ; /* 0x0000040000000947 */
/* 0x000fea0003800000 */
/*0cb0*/ ISETP.GE.AND P0, PT, R13, RZ, PT ; /* 0x000000ff0d00720c */
/* 0x000fe40003f06270 */
/*0cc0*/ ISETP.GE.AND P1, PT, R15, RZ, PT ; /* 0x000000ff0f00720c */
/* 0x000fd60003f26270 */
/*0cd0*/ @P0 IMAD.MOV.U32 R9, RZ, RZ, RZ ; /* 0x000000ffff090224 */
/* 0x000fe400078e00ff */
/*0ce0*/ @!P0 IMAD.MOV.U32 R9, RZ, RZ, -0x40 ; /* 0xffffffc0ff098424 */
/* 0x000fe400078e00ff */
/*0cf0*/ @!P0 FFMA R8, R12, 1.84467440737095516160e+19, RZ ; /* 0x5f8000000c088823 */
/* 0x000fe400000000ff */
/*0d00*/ @!P1 FFMA R11, R7, 1.84467440737095516160e+19, RZ ; /* 0x5f800000070b9823 */
/* 0x000fe200000000ff */
/*0d10*/ @!P1 IADD3 R9, R9, 0x40, RZ ; /* 0x0000004009099810 */
/* 0x000fe40007ffe0ff */
/*0d20*/ LEA R12, R10, 0xc0800000, 0x17 ; /* 0xc08000000a0c7811 */
/* 0x000fe200078eb8ff */
/*0d30*/ BSSY B2, 0x10a0 ; /* 0x0000036000027945 */
/* 0x000fe60003800000 */
/*0d40*/ IADD3 R12, -R12, R11, RZ ; /* 0x0000000b0c0c7210 */
/* 0x000fc40007ffe1ff */
/*0d50*/ IADD3 R11, R14, -0x7f, RZ ; /* 0xffffff810e0b7810 */
/* 0x000fe40007ffe0ff */
/*0d60*/ MUFU.RCP R13, R12 ; /* 0x0000000c000d7308 */
/* 0x0000620000001000 */
/*0d70*/ FADD.FTZ R15, -R12, -RZ ; /* 0x800000ff0c0f7221 */
/* 0x000fe40000010100 */
/*0d80*/ IMAD R8, R11.reuse, -0x800000, R8 ; /* 0xff8000000b087824 */
/* 0x040fe200078e0208 */
/*0d90*/ IADD3 R12, R11, 0x7f, -R10 ; /* 0x0000007f0b0c7810 */
/* 0x001fca0007ffe80a */
/*0da0*/ IMAD.IADD R9, R12, 0x1, R9 ; /* 0x000000010c097824 */
/* 0x000fe400078e0209 */
/*0db0*/ FFMA R14, R13, R15, 1 ; /* 0x3f8000000d0e7423 */
/* 0x002fc8000000000f */
/*0dc0*/ FFMA R17, R13, R14, R13 ; /* 0x0000000e0d117223 */
/* 0x000fc8000000000d */
/*0dd0*/ FFMA R13, R8, R17, RZ ; /* 0x00000011080d7223 */
/* 0x000fc800000000ff */
/*0de0*/ FFMA R14, R15, R13, R8 ; /* 0x0000000d0f0e7223 */
/* 0x000fc80000000008 */
/*0df0*/ FFMA R14, R17, R14, R13 ; /* 0x0000000e110e7223 */
/* 0x000fc8000000000d */
/*0e00*/ FFMA R15, R15, R14, R8 ; /* 0x0000000e0f0f7223 */
/* 0x000fc80000000008 */
/*0e10*/ FFMA R8, R17, R15, R14 ; /* 0x0000000f11087223 */
/* 0x000fca000000000e */
/*0e20*/ SHF.R.U32.HI R10, RZ, 0x17, R8 ; /* 0x00000017ff0a7819 */
/* 0x000fc80000011608 */
/*0e30*/ LOP3.LUT R10, R10, 0xff, RZ, 0xc0, !PT ; /* 0x000000ff0a0a7812 */
/* 0x000fca00078ec0ff */
/*0e40*/ IMAD.IADD R13, R10, 0x1, R9 ; /* 0x000000010a0d7824 */
/* 0x000fca00078e0209 */
/*0e50*/ IADD3 R10, R13, -0x1, RZ ; /* 0xffffffff0d0a7810 */
/* 0x000fc80007ffe0ff */
/*0e60*/ ISETP.GE.U32.AND P0, PT, R10, 0xfe, PT ; /* 0x000000fe0a00780c */
/* 0x000fda0003f06070 */
/*0e70*/ @!P0 BRA 0x1080 ; /* 0x0000020000008947 */
/* 0x000fea0003800000 */
/*0e80*/ ISETP.GT.AND P0, PT, R13, 0xfe, PT ; /* 0x000000fe0d00780c */
/* 0x000fda0003f04270 */
/*0e90*/ @P0 BRA 0x1050 ; /* 0x000001b000000947 */
/* 0x000fea0003800000 */
/*0ea0*/ ISETP.GE.AND P0, PT, R13, 0x1, PT ; /* 0x000000010d00780c */
/* 0x000fda0003f06270 */
/*0eb0*/ @P0 BRA 0x1090 ; /* 0x000001d000000947 */
/* 0x000fea0003800000 */
/*0ec0*/ ISETP.GE.AND P0, PT, R13, -0x18, PT ; /* 0xffffffe80d00780c */
/* 0x000fe40003f06270 */
/*0ed0*/ LOP3.LUT R8, R8, 0x80000000, RZ, 0xc0, !PT ; /* 0x8000000008087812 */
/* 0x000fd600078ec0ff */
/*0ee0*/ @!P0 BRA 0x1090 ; /* 0x000001a000008947 */
/* 0x000fea0003800000 */
/*0ef0*/ FFMA.RZ R9, R17, R15.reuse, R14.reuse ; /* 0x0000000f11097223 */
/* 0x180fe2000000c00e */
/*0f00*/ IADD3 R12, R13, 0x20, RZ ; /* 0x000000200d0c7810 */
/* 0x000fe20007ffe0ff */
/*0f10*/ FFMA.RM R10, R17, R15.reuse, R14.reuse ; /* 0x0000000f110a7223 */
/* 0x180fe2000000400e */
/*0f20*/ ISETP.NE.AND P2, PT, R13, RZ, PT ; /* 0x000000ff0d00720c */
/* 0x000fe40003f45270 */
/*0f30*/ LOP3.LUT R11, R9, 0x7fffff, RZ, 0xc0, !PT ; /* 0x007fffff090b7812 */
/* 0x000fe200078ec0ff */
/*0f40*/ FFMA.RP R9, R17, R15, R14 ; /* 0x0000000f11097223 */
/* 0x000fe2000000800e */
/*0f50*/ ISETP.NE.AND P1, PT, R13, RZ, PT ; /* 0x000000ff0d00720c */
/* 0x000fe20003f25270 */
/*0f60*/ IMAD.MOV R13, RZ, RZ, -R13 ; /* 0x000000ffff0d7224 */
/* 0x000fe200078e0a0d */
/*0f70*/ LOP3.LUT R11, R11, 0x800000, RZ, 0xfc, !PT ; /* 0x008000000b0b7812 */
/* 0x000fe400078efcff */
/*0f80*/ FSETP.NEU.FTZ.AND P0, PT, R9, R10, PT ; /* 0x0000000a0900720b */
/* 0x000fc40003f1d000 */
/*0f90*/ SHF.L.U32 R12, R11, R12, RZ ; /* 0x0000000c0b0c7219 */
/* 0x000fe400000006ff */
/*0fa0*/ SEL R10, R13, RZ, P2 ; /* 0x000000ff0d0a7207 */
/* 0x000fe40001000000 */
/*0fb0*/ ISETP.NE.AND P1, PT, R12, RZ, P1 ; /* 0x000000ff0c00720c */
/* 0x000fe40000f25270 */
/*0fc0*/ SHF.R.U32.HI R10, RZ, R10, R11 ; /* 0x0000000aff0a7219 */
/* 0x000fe4000001160b */
/*0fd0*/ PLOP3.LUT P0, PT, P0, P1, PT, 0xa8, 0x0 ; /* 0x000000000000781c */
/* 0x000fe40000703570 */
/*0fe0*/ SHF.R.U32.HI R12, RZ, 0x1, R10 ; /* 0x00000001ff0c7819 */
/* 0x000fc4000001160a */
/*0ff0*/ SEL R9, RZ, 0x1, !P0 ; /* 0x00000001ff097807 */
/* 0x000fc80004000000 */
/*1000*/ LOP3.LUT R9, R9, 0x1, R12, 0xf8, !PT ; /* 0x0000000109097812 */
/* 0x000fc800078ef80c */
/*1010*/ LOP3.LUT R9, R9, R10, RZ, 0xc0, !PT ; /* 0x0000000a09097212 */
/* 0x000fca00078ec0ff */
/*1020*/ IMAD.IADD R9, R12, 0x1, R9 ; /* 0x000000010c097824 */
/* 0x000fca00078e0209 */
/*1030*/ LOP3.LUT R8, R9, R8, RZ, 0xfc, !PT ; /* 0x0000000809087212 */
/* 0x000fe200078efcff */
/*1040*/ BRA 0x1090 ; /* 0x0000004000007947 */
/* 0x000fea0003800000 */
/*1050*/ LOP3.LUT R8, R8, 0x80000000, RZ, 0xc0, !PT ; /* 0x8000000008087812 */
/* 0x000fc800078ec0ff */
/*1060*/ LOP3.LUT R8, R8, 0x7f800000, RZ, 0xfc, !PT ; /* 0x7f80000008087812 */
/* 0x000fe200078efcff */
/*1070*/ BRA 0x1090 ; /* 0x0000001000007947 */
/* 0x000fea0003800000 */
/*1080*/ LEA R8, R9, R8, 0x17 ; /* 0x0000000809087211 */
/* 0x000fe400078eb8ff */
/*1090*/ BSYNC B2 ; /* 0x0000000000027941 */
/* 0x000fea0003800000 */
/*10a0*/ BRA 0x1130 ; /* 0x0000008000007947 */
/* 0x000fea0003800000 */
/*10b0*/ LOP3.LUT R8, R11, 0x80000000, R8, 0x48, !PT ; /* 0x800000000b087812 */
/* 0x000fc800078e4808 */
/*10c0*/ LOP3.LUT R8, R8, 0x7f800000, RZ, 0xfc, !PT ; /* 0x7f80000008087812 */
/* 0x000fe200078efcff */
/*10d0*/ BRA 0x1130 ; /* 0x0000005000007947 */
/* 0x000fea0003800000 */
/*10e0*/ LOP3.LUT R8, R11, 0x80000000, R8, 0x48, !PT ; /* 0x800000000b087812 */
/* 0x000fe200078e4808 */
/*10f0*/ BRA 0x1130 ; /* 0x0000003000007947 */
/* 0x000fea0003800000 */
/*1100*/ MUFU.RSQ R8, -QNAN ; /* 0xffc0000000087908 */
/* 0x000e220000001400 */
/*1110*/ BRA 0x1130 ; /* 0x0000001000007947 */
/* 0x000fea0003800000 */
/*1120*/ FADD.FTZ R8, R12, R7 ; /* 0x000000070c087221 */
/* 0x000fe40000010000 */
/*1130*/ BSYNC B1 ; /* 0x0000000000017941 */
/* 0x000fea0003800000 */
/*1140*/ IMAD.MOV.U32 R10, RZ, RZ, R8 ; /* 0x000000ffff0a7224 */
/* 0x001fe400078e0008 */
/*1150*/ IMAD.MOV.U32 R8, RZ, RZ, R6 ; /* 0x000000ffff087224 */
/* 0x000fe400078e0006 */
/*1160*/ IMAD.MOV.U32 R9, RZ, RZ, 0x0 ; /* 0x00000000ff097424 */
/* 0x000fc800078e00ff */
/*1170*/ RET.REL.NODEC R8 0x0 ; /* 0xffffee8008007950 */
/* 0x000fea0003c3ffff */
/*1180*/ BRA 0x1180; /* 0xfffffff000007947 */
/* 0x000fc0000383ffff */
/*1190*/ NOP; /* 0x0000000000007918 */
/* 0x000fc00000000000 */
/*11a0*/ NOP; /* 0x0000000000007918 */
/* 0x000fc00000000000 */
/*11b0*/ NOP; /* 0x0000000000007918 */
/* 0x000fc00000000000 */
/*11c0*/ NOP; /* 0x0000000000007918 */
/* 0x000fc00000000000 */
/*11d0*/ NOP; /* 0x0000000000007918 */
/* 0x000fc00000000000 */
/*11e0*/ NOP; /* 0x0000000000007918 */
/* 0x000fc00000000000 */
/*11f0*/ NOP; /* 0x0000000000007918 */
/* 0x000fc00000000000 */
/*1200*/ NOP; /* 0x0000000000007918 */
/* 0x000fc00000000000 */
/*1210*/ NOP; /* 0x0000000000007918 */
/* 0x000fc00000000000 */
/*1220*/ NOP; /* 0x0000000000007918 */
/* 0x000fc00000000000 */
/*1230*/ NOP; /* 0x0000000000007918 */
/* 0x000fc00000000000 */
/*1240*/ NOP; /* 0x0000000000007918 */
/* 0x000fc00000000000 */
/*1250*/ NOP; /* 0x0000000000007918 */
/* 0x000fc00000000000 */
/*1260*/ NOP; /* 0x0000000000007918 */
/* 0x000fc00000000000 */
/*1270*/ NOP; /* 0x0000000000007918 */
/* 0x000fc00000000000 */
.......... |
You are a helpful coding assistant specialized in converting CUDA source code to CUDA host assembly. | #include "includes.h"
__global__ void CalculateSampleB( const float *background, float *subBG, const int wb, const int hb, const int ws, const int hs, const int sRate ){
const int ys = blockIdx.y * blockDim.y + threadIdx.y;
const int xs = blockIdx.x * blockDim.x + threadIdx.x;
const int curst = ws * ys + xs;
if (ys < hs && xs < ws){
const int yb = ys * sRate;
const int xb = xs * sRate;
int num = 0;
float sum[3] = {0};
for (int i=0; i<sRate; i++){
for (int j=0; j<sRate; j++){
if (yb + i < hb && xb + j < wb){
int curb = wb * (yb+i) + (xb+j);
sum[0] += background[curb*3+0];
sum[1] += background[curb*3+1];
sum[2] += background[curb*3+2];
num++;
}
}
}
subBG[curst*3+0] = sum[0] / num;
subBG[curst*3+1] = sum[1] / num;
subBG[curst*3+2] = sum[2] / num;
}
} | .file "tmpxft_0004a2aa_00000000-6_CalculateSampleB.cudafe1.cpp"
.text
#APP
#NO_APP
.type _ZL26__cudaUnregisterBinaryUtilv, @function
_ZL26__cudaUnregisterBinaryUtilv:
.LFB2029:
.cfi_startproc
endbr64
subq $8, %rsp
.cfi_def_cfa_offset 16
movq _ZL20__cudaFatCubinHandle(%rip), %rdi
call __cudaUnregisterFatBinary@PLT
addq $8, %rsp
.cfi_def_cfa_offset 8
ret
.cfi_endproc
.LFE2029:
.size _ZL26__cudaUnregisterBinaryUtilv, .-_ZL26__cudaUnregisterBinaryUtilv
.globl _Z44__device_stub__Z16CalculateSampleBPKfPfiiiiiPKfPfiiiii
.type _Z44__device_stub__Z16CalculateSampleBPKfPfiiiiiPKfPfiiiii, @function
_Z44__device_stub__Z16CalculateSampleBPKfPfiiiiiPKfPfiiiii:
.LFB2051:
.cfi_startproc
endbr64
subq $168, %rsp
.cfi_def_cfa_offset 176
movq %rdi, 24(%rsp)
movq %rsi, 16(%rsp)
movl %edx, 12(%rsp)
movl %ecx, 8(%rsp)
movl %r8d, 4(%rsp)
movl %r9d, (%rsp)
movq %fs:40, %rax
movq %rax, 152(%rsp)
xorl %eax, %eax
leaq 24(%rsp), %rax
movq %rax, 96(%rsp)
leaq 16(%rsp), %rax
movq %rax, 104(%rsp)
leaq 12(%rsp), %rax
movq %rax, 112(%rsp)
leaq 8(%rsp), %rax
movq %rax, 120(%rsp)
leaq 4(%rsp), %rax
movq %rax, 128(%rsp)
movq %rsp, %rax
movq %rax, 136(%rsp)
leaq 176(%rsp), %rax
movq %rax, 144(%rsp)
movl $1, 48(%rsp)
movl $1, 52(%rsp)
movl $1, 56(%rsp)
movl $1, 60(%rsp)
movl $1, 64(%rsp)
movl $1, 68(%rsp)
leaq 40(%rsp), %rcx
leaq 32(%rsp), %rdx
leaq 60(%rsp), %rsi
leaq 48(%rsp), %rdi
call __cudaPopCallConfiguration@PLT
testl %eax, %eax
je .L7
.L3:
movq 152(%rsp), %rax
subq %fs:40, %rax
jne .L8
addq $168, %rsp
.cfi_remember_state
.cfi_def_cfa_offset 8
ret
.L7:
.cfi_restore_state
pushq 40(%rsp)
.cfi_def_cfa_offset 184
pushq 40(%rsp)
.cfi_def_cfa_offset 192
leaq 112(%rsp), %r9
movq 76(%rsp), %rcx
movl 84(%rsp), %r8d
movq 64(%rsp), %rsi
movl 72(%rsp), %edx
leaq _Z16CalculateSampleBPKfPfiiiii(%rip), %rdi
call cudaLaunchKernel@PLT
addq $16, %rsp
.cfi_def_cfa_offset 176
jmp .L3
.L8:
call __stack_chk_fail@PLT
.cfi_endproc
.LFE2051:
.size _Z44__device_stub__Z16CalculateSampleBPKfPfiiiiiPKfPfiiiii, .-_Z44__device_stub__Z16CalculateSampleBPKfPfiiiiiPKfPfiiiii
.globl _Z16CalculateSampleBPKfPfiiiii
.type _Z16CalculateSampleBPKfPfiiiii, @function
_Z16CalculateSampleBPKfPfiiiii:
.LFB2052:
.cfi_startproc
endbr64
subq $16, %rsp
.cfi_def_cfa_offset 24
movl 24(%rsp), %eax
pushq %rax
.cfi_def_cfa_offset 32
call _Z44__device_stub__Z16CalculateSampleBPKfPfiiiiiPKfPfiiiii
addq $24, %rsp
.cfi_def_cfa_offset 8
ret
.cfi_endproc
.LFE2052:
.size _Z16CalculateSampleBPKfPfiiiii, .-_Z16CalculateSampleBPKfPfiiiii
.section .rodata.str1.8,"aMS",@progbits,1
.align 8
.LC0:
.string "_Z16CalculateSampleBPKfPfiiiii"
.text
.type _ZL24__sti____cudaRegisterAllv, @function
_ZL24__sti____cudaRegisterAllv:
.LFB2054:
.cfi_startproc
endbr64
subq $8, %rsp
.cfi_def_cfa_offset 16
leaq _ZL15__fatDeviceText(%rip), %rdi
call __cudaRegisterFatBinary@PLT
movq %rax, %rdi
movq %rax, _ZL20__cudaFatCubinHandle(%rip)
pushq $0
.cfi_def_cfa_offset 24
pushq $0
.cfi_def_cfa_offset 32
pushq $0
.cfi_def_cfa_offset 40
pushq $0
.cfi_def_cfa_offset 48
movl $0, %r9d
movl $-1, %r8d
leaq .LC0(%rip), %rdx
movq %rdx, %rcx
leaq _Z16CalculateSampleBPKfPfiiiii(%rip), %rsi
call __cudaRegisterFunction@PLT
addq $32, %rsp
.cfi_def_cfa_offset 16
movq _ZL20__cudaFatCubinHandle(%rip), %rdi
call __cudaRegisterFatBinaryEnd@PLT
leaq _ZL26__cudaUnregisterBinaryUtilv(%rip), %rdi
call atexit@PLT
addq $8, %rsp
.cfi_def_cfa_offset 8
ret
.cfi_endproc
.LFE2054:
.size _ZL24__sti____cudaRegisterAllv, .-_ZL24__sti____cudaRegisterAllv
.section .init_array,"aw"
.align 8
.quad _ZL24__sti____cudaRegisterAllv
.section .nvFatBinSegment,"aw"
.align 8
.type _ZL15__fatDeviceText, @object
.size _ZL15__fatDeviceText, 24
_ZL15__fatDeviceText:
.long 1180844977
.long 1
.quad fatbinData
.quad 0
.local _ZL20__cudaFatCubinHandle
.comm _ZL20__cudaFatCubinHandle,8,8
.ident "GCC: (Ubuntu 13.3.0-6ubuntu2~24.04) 13.3.0"
.section .note.GNU-stack,"",@progbits
.section .note.gnu.property,"a"
.align 8
.long 1f - 0f
.long 4f - 1f
.long 5
0:
.string "GNU"
1:
.align 8
.long 0xc0000002
.long 3f - 2f
2:
.long 0x3
3:
.align 8
4: |
You are a helpful coding assistant specialized in converting CUDA source code to HIP/AMD source code. | #include "includes.h"
__global__ void CalculateSampleB( const float *background, float *subBG, const int wb, const int hb, const int ws, const int hs, const int sRate ){
const int ys = blockIdx.y * blockDim.y + threadIdx.y;
const int xs = blockIdx.x * blockDim.x + threadIdx.x;
const int curst = ws * ys + xs;
if (ys < hs && xs < ws){
const int yb = ys * sRate;
const int xb = xs * sRate;
int num = 0;
float sum[3] = {0};
for (int i=0; i<sRate; i++){
for (int j=0; j<sRate; j++){
if (yb + i < hb && xb + j < wb){
int curb = wb * (yb+i) + (xb+j);
sum[0] += background[curb*3+0];
sum[1] += background[curb*3+1];
sum[2] += background[curb*3+2];
num++;
}
}
}
subBG[curst*3+0] = sum[0] / num;
subBG[curst*3+1] = sum[1] / num;
subBG[curst*3+2] = sum[2] / num;
}
} | #include <hip/hip_runtime.h>
#include "includes.h"
__global__ void CalculateSampleB( const float *background, float *subBG, const int wb, const int hb, const int ws, const int hs, const int sRate ){
const int ys = blockIdx.y * blockDim.y + threadIdx.y;
const int xs = blockIdx.x * blockDim.x + threadIdx.x;
const int curst = ws * ys + xs;
if (ys < hs && xs < ws){
const int yb = ys * sRate;
const int xb = xs * sRate;
int num = 0;
float sum[3] = {0};
for (int i=0; i<sRate; i++){
for (int j=0; j<sRate; j++){
if (yb + i < hb && xb + j < wb){
int curb = wb * (yb+i) + (xb+j);
sum[0] += background[curb*3+0];
sum[1] += background[curb*3+1];
sum[2] += background[curb*3+2];
num++;
}
}
}
subBG[curst*3+0] = sum[0] / num;
subBG[curst*3+1] = sum[1] / num;
subBG[curst*3+2] = sum[2] / num;
}
} |
You are a helpful coding assistant specialized in converting HIP source code to AMD device assembly. | #include <hip/hip_runtime.h>
#include "includes.h"
__global__ void CalculateSampleB( const float *background, float *subBG, const int wb, const int hb, const int ws, const int hs, const int sRate ){
const int ys = blockIdx.y * blockDim.y + threadIdx.y;
const int xs = blockIdx.x * blockDim.x + threadIdx.x;
const int curst = ws * ys + xs;
if (ys < hs && xs < ws){
const int yb = ys * sRate;
const int xb = xs * sRate;
int num = 0;
float sum[3] = {0};
for (int i=0; i<sRate; i++){
for (int j=0; j<sRate; j++){
if (yb + i < hb && xb + j < wb){
int curb = wb * (yb+i) + (xb+j);
sum[0] += background[curb*3+0];
sum[1] += background[curb*3+1];
sum[2] += background[curb*3+2];
num++;
}
}
}
subBG[curst*3+0] = sum[0] / num;
subBG[curst*3+1] = sum[1] / num;
subBG[curst*3+2] = sum[2] / num;
}
} | .text
.amdgcn_target "amdgcn-amd-amdhsa--gfx1100"
.protected _Z16CalculateSampleBPKfPfiiiii
.globl _Z16CalculateSampleBPKfPfiiiii
.p2align 8
.type _Z16CalculateSampleBPKfPfiiiii,@function
_Z16CalculateSampleBPKfPfiiiii:
s_clause 0x1
s_load_b32 s2, s[0:1], 0x34
s_load_b64 s[4:5], s[0:1], 0x18
v_bfe_u32 v2, v0, 10, 10
v_and_b32_e32 v3, 0x3ff, v0
s_waitcnt lgkmcnt(0)
s_lshr_b32 s3, s2, 16
s_and_b32 s2, s2, 0xffff
s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(SALU_CYCLE_1)
v_mad_u64_u32 v[0:1], null, s15, s3, v[2:3]
s_mul_i32 s14, s14, s2
v_add_nc_u32_e32 v1, s14, v3
s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
v_cmp_gt_i32_e32 vcc_lo, s5, v0
v_cmp_gt_i32_e64 s2, s4, v1
s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(SALU_CYCLE_1)
s_and_b32 s2, vcc_lo, s2
s_and_saveexec_b32 s3, s2
s_cbranch_execz .LBB0_12
s_load_b32 s3, s[0:1], 0x20
v_dual_mov_b32 v2, 0 :: v_dual_mov_b32 v5, 0
v_mov_b32_e32 v4, 0
v_mov_b32_e32 v6, 0
s_waitcnt lgkmcnt(0)
s_cmp_lt_i32 s3, 1
s_cbranch_scc1 .LBB0_11
s_clause 0x1
s_load_b64 s[6:7], s[0:1], 0x10
s_load_b64 s[8:9], s[0:1], 0x0
v_mul_lo_u32 v7, v0, s3
v_mul_lo_u32 v8, v1, s3
v_dual_mov_b32 v9, 0 :: v_dual_mov_b32 v4, 0
v_dual_mov_b32 v5, 0 :: v_dual_mov_b32 v6, 0
s_mov_b32 s10, 0
s_waitcnt lgkmcnt(0)
v_mul_lo_u32 v2, s6, v0
s_mul_i32 s5, s6, 3
s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
v_add3_u32 v2, v3, v2, s14
v_mul_lo_u32 v2, s3, v2
s_delay_alu instid0(VALU_DEP_1)
v_lshl_add_u32 v10, v2, 1, v2
s_set_inst_prefetch_distance 0x1
s_branch .LBB0_4
.p2align 6
.LBB0_3:
v_add_nc_u32_e32 v10, s5, v10
s_add_i32 s10, s10, 1
s_delay_alu instid0(SALU_CYCLE_1)
s_cmp_eq_u32 s10, s3
s_cbranch_scc1 .LBB0_10
.LBB0_4:
v_add_nc_u32_e32 v2, s10, v7
s_mov_b32 s11, 0
s_delay_alu instid0(VALU_DEP_1)
v_cmp_gt_i32_e32 vcc_lo, s7, v2
v_mov_b32_e32 v2, v10
s_branch .LBB0_7
.p2align 6
.LBB0_5:
s_or_b32 exec_lo, exec_lo, s13
.LBB0_6:
s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_2) | instid1(SALU_CYCLE_1)
s_or_b32 exec_lo, exec_lo, s12
v_add_nc_u32_e32 v2, 3, v2
s_add_i32 s11, s11, 1
s_cmp_eq_u32 s3, s11
s_cbranch_scc1 .LBB0_3
.LBB0_7:
s_and_saveexec_b32 s12, vcc_lo
s_cbranch_execz .LBB0_6
v_add_nc_u32_e32 v3, s11, v8
s_mov_b32 s13, exec_lo
s_delay_alu instid0(VALU_DEP_1)
v_cmpx_gt_i32_e64 s6, v3
s_cbranch_execz .LBB0_5
v_ashrrev_i32_e32 v3, 31, v2
v_add_nc_u32_e32 v9, 1, v9
s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
v_lshlrev_b64 v[11:12], 2, v[2:3]
v_add_co_u32 v11, s2, s8, v11
s_delay_alu instid0(VALU_DEP_1)
v_add_co_ci_u32_e64 v12, s2, s9, v12, s2
global_load_b96 v[11:13], v[11:12], off
s_waitcnt vmcnt(0)
v_dual_add_f32 v6, v6, v11 :: v_dual_add_f32 v5, v5, v12
v_add_f32_e32 v4, v4, v13
s_branch .LBB0_5
.LBB0_10:
s_set_inst_prefetch_distance 0x2
v_cvt_f32_i32_e32 v2, v9
.LBB0_11:
s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_2) | instid1(VALU_DEP_3)
v_div_scale_f32 v3, null, v2, v2, v6
v_div_scale_f32 v9, null, v2, v2, v5
v_div_scale_f32 v10, null, v2, v2, v4
v_rcp_f32_e32 v11, v3
s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_2)
v_rcp_f32_e32 v12, v9
v_mad_u64_u32 v[7:8], null, v0, s4, v[1:2]
v_rcp_f32_e32 v13, v10
v_div_scale_f32 v15, s2, v5, v2, v5
v_div_scale_f32 v14, vcc_lo, v6, v2, v6
v_div_scale_f32 v16, s3, v4, v2, v4
s_delay_alu instid0(TRANS32_DEP_3) | instskip(NEXT) | instid1(TRANS32_DEP_2)
v_fma_f32 v0, -v3, v11, 1.0
v_fma_f32 v1, -v9, v12, 1.0
s_load_b64 s[0:1], s[0:1], 0x8
s_waitcnt_depctr 0xfff
v_fma_f32 v8, -v10, v13, 1.0
v_dual_fmac_f32 v11, v0, v11 :: v_dual_fmac_f32 v12, v1, v12
v_lshl_add_u32 v0, v7, 1, v7
s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
v_dual_fmac_f32 v13, v8, v13 :: v_dual_mul_f32 v18, v15, v12
v_ashrrev_i32_e32 v1, 31, v0
s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_3)
v_mul_f32_e32 v19, v16, v13
v_fma_f32 v8, -v9, v18, v15
v_mul_f32_e32 v17, v14, v11
s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3)
v_fma_f32 v20, -v10, v19, v16
v_fmac_f32_e32 v18, v8, v12
s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3)
v_fma_f32 v7, -v3, v17, v14
v_fmac_f32_e32 v19, v20, v13
s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_2) | instid1(VALU_DEP_3)
v_fmac_f32_e32 v17, v7, v11
v_lshlrev_b64 v[7:8], 2, v[0:1]
v_fma_f32 v1, -v9, v18, v15
v_fma_f32 v0, -v3, v17, v14
v_fma_f32 v3, -v10, v19, v16
s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_3) | instid1(VALU_DEP_2)
v_div_fmas_f32 v0, v0, v11, v17
s_mov_b32 vcc_lo, s2
v_div_fmas_f32 v1, v1, v12, v18
s_mov_b32 vcc_lo, s3
v_div_fixup_f32 v0, v0, v2, v6
v_div_fmas_f32 v3, v3, v13, v19
s_waitcnt lgkmcnt(0)
v_add_co_u32 v6, vcc_lo, s0, v7
v_add_co_ci_u32_e32 v7, vcc_lo, s1, v8, vcc_lo
v_div_fixup_f32 v1, v1, v2, v5
v_div_fixup_f32 v2, v3, v2, v4
global_store_b96 v[6:7], v[0:2], off
.LBB0_12:
s_nop 0
s_sendmsg sendmsg(MSG_DEALLOC_VGPRS)
s_endpgm
.section .rodata,"a",@progbits
.p2align 6, 0x0
.amdhsa_kernel _Z16CalculateSampleBPKfPfiiiii
.amdhsa_group_segment_fixed_size 0
.amdhsa_private_segment_fixed_size 0
.amdhsa_kernarg_size 296
.amdhsa_user_sgpr_count 14
.amdhsa_user_sgpr_dispatch_ptr 0
.amdhsa_user_sgpr_queue_ptr 0
.amdhsa_user_sgpr_kernarg_segment_ptr 1
.amdhsa_user_sgpr_dispatch_id 0
.amdhsa_user_sgpr_private_segment_size 0
.amdhsa_wavefront_size32 1
.amdhsa_uses_dynamic_stack 0
.amdhsa_enable_private_segment 0
.amdhsa_system_sgpr_workgroup_id_x 1
.amdhsa_system_sgpr_workgroup_id_y 1
.amdhsa_system_sgpr_workgroup_id_z 0
.amdhsa_system_sgpr_workgroup_info 0
.amdhsa_system_vgpr_workitem_id 1
.amdhsa_next_free_vgpr 21
.amdhsa_next_free_sgpr 16
.amdhsa_float_round_mode_32 0
.amdhsa_float_round_mode_16_64 0
.amdhsa_float_denorm_mode_32 3
.amdhsa_float_denorm_mode_16_64 3
.amdhsa_dx10_clamp 1
.amdhsa_ieee_mode 1
.amdhsa_fp16_overflow 0
.amdhsa_workgroup_processor_mode 1
.amdhsa_memory_ordered 1
.amdhsa_forward_progress 0
.amdhsa_shared_vgpr_count 0
.amdhsa_exception_fp_ieee_invalid_op 0
.amdhsa_exception_fp_denorm_src 0
.amdhsa_exception_fp_ieee_div_zero 0
.amdhsa_exception_fp_ieee_overflow 0
.amdhsa_exception_fp_ieee_underflow 0
.amdhsa_exception_fp_ieee_inexact 0
.amdhsa_exception_int_div_zero 0
.end_amdhsa_kernel
.text
.Lfunc_end0:
.size _Z16CalculateSampleBPKfPfiiiii, .Lfunc_end0-_Z16CalculateSampleBPKfPfiiiii
.section .AMDGPU.csdata,"",@progbits
.text
.p2alignl 7, 3214868480
.fill 96, 4, 3214868480
.type __hip_cuid_,@object
.section .bss,"aw",@nobits
.globl __hip_cuid_
__hip_cuid_:
.byte 0
.size __hip_cuid_, 1
.ident "AMD clang version 18.0.0git (https://github.com/RadeonOpenCompute/llvm-project roc-6.3.2 25012 e5bf7e55c91490b07c49d8960fa7983d864936c4)"
.section ".note.GNU-stack","",@progbits
.addrsig
.addrsig_sym __hip_cuid_
.amdgpu_metadata
---
amdhsa.kernels:
- .args:
- .address_space: global
.offset: 0
.size: 8
.value_kind: global_buffer
- .address_space: global
.offset: 8
.size: 8
.value_kind: global_buffer
- .offset: 16
.size: 4
.value_kind: by_value
- .offset: 20
.size: 4
.value_kind: by_value
- .offset: 24
.size: 4
.value_kind: by_value
- .offset: 28
.size: 4
.value_kind: by_value
- .offset: 32
.size: 4
.value_kind: by_value
- .offset: 40
.size: 4
.value_kind: hidden_block_count_x
- .offset: 44
.size: 4
.value_kind: hidden_block_count_y
- .offset: 48
.size: 4
.value_kind: hidden_block_count_z
- .offset: 52
.size: 2
.value_kind: hidden_group_size_x
- .offset: 54
.size: 2
.value_kind: hidden_group_size_y
- .offset: 56
.size: 2
.value_kind: hidden_group_size_z
- .offset: 58
.size: 2
.value_kind: hidden_remainder_x
- .offset: 60
.size: 2
.value_kind: hidden_remainder_y
- .offset: 62
.size: 2
.value_kind: hidden_remainder_z
- .offset: 80
.size: 8
.value_kind: hidden_global_offset_x
- .offset: 88
.size: 8
.value_kind: hidden_global_offset_y
- .offset: 96
.size: 8
.value_kind: hidden_global_offset_z
- .offset: 104
.size: 2
.value_kind: hidden_grid_dims
.group_segment_fixed_size: 0
.kernarg_segment_align: 8
.kernarg_segment_size: 296
.language: OpenCL C
.language_version:
- 2
- 0
.max_flat_workgroup_size: 1024
.name: _Z16CalculateSampleBPKfPfiiiii
.private_segment_fixed_size: 0
.sgpr_count: 18
.sgpr_spill_count: 0
.symbol: _Z16CalculateSampleBPKfPfiiiii.kd
.uniform_work_group_size: 1
.uses_dynamic_stack: false
.vgpr_count: 21
.vgpr_spill_count: 0
.wavefront_size: 32
.workgroup_processor_mode: 1
amdhsa.target: amdgcn-amd-amdhsa--gfx1100
amdhsa.version:
- 1
- 2
...
.end_amdgpu_metadata |
You are a helpful coding assistant specialized in converting HIP source code to AMD host assembly. | #include <hip/hip_runtime.h>
#include "includes.h"
__global__ void CalculateSampleB( const float *background, float *subBG, const int wb, const int hb, const int ws, const int hs, const int sRate ){
const int ys = blockIdx.y * blockDim.y + threadIdx.y;
const int xs = blockIdx.x * blockDim.x + threadIdx.x;
const int curst = ws * ys + xs;
if (ys < hs && xs < ws){
const int yb = ys * sRate;
const int xb = xs * sRate;
int num = 0;
float sum[3] = {0};
for (int i=0; i<sRate; i++){
for (int j=0; j<sRate; j++){
if (yb + i < hb && xb + j < wb){
int curb = wb * (yb+i) + (xb+j);
sum[0] += background[curb*3+0];
sum[1] += background[curb*3+1];
sum[2] += background[curb*3+2];
num++;
}
}
}
subBG[curst*3+0] = sum[0] / num;
subBG[curst*3+1] = sum[1] / num;
subBG[curst*3+2] = sum[2] / num;
}
} | .text
.file "CalculateSampleB.hip"
.globl _Z31__device_stub__CalculateSampleBPKfPfiiiii # -- Begin function _Z31__device_stub__CalculateSampleBPKfPfiiiii
.p2align 4, 0x90
.type _Z31__device_stub__CalculateSampleBPKfPfiiiii,@function
_Z31__device_stub__CalculateSampleBPKfPfiiiii: # @_Z31__device_stub__CalculateSampleBPKfPfiiiii
.cfi_startproc
# %bb.0:
subq $136, %rsp
.cfi_def_cfa_offset 144
movq %rdi, 72(%rsp)
movq %rsi, 64(%rsp)
movl %edx, 12(%rsp)
movl %ecx, 8(%rsp)
movl %r8d, 4(%rsp)
movl %r9d, (%rsp)
leaq 72(%rsp), %rax
movq %rax, 80(%rsp)
leaq 64(%rsp), %rax
movq %rax, 88(%rsp)
leaq 12(%rsp), %rax
movq %rax, 96(%rsp)
leaq 8(%rsp), %rax
movq %rax, 104(%rsp)
leaq 4(%rsp), %rax
movq %rax, 112(%rsp)
movq %rsp, %rax
movq %rax, 120(%rsp)
leaq 144(%rsp), %rax
movq %rax, 128(%rsp)
leaq 48(%rsp), %rdi
leaq 32(%rsp), %rsi
leaq 24(%rsp), %rdx
leaq 16(%rsp), %rcx
callq __hipPopCallConfiguration
movq 48(%rsp), %rsi
movl 56(%rsp), %edx
movq 32(%rsp), %rcx
movl 40(%rsp), %r8d
leaq 80(%rsp), %r9
movl $_Z16CalculateSampleBPKfPfiiiii, %edi
pushq 16(%rsp)
.cfi_adjust_cfa_offset 8
pushq 32(%rsp)
.cfi_adjust_cfa_offset 8
callq hipLaunchKernel
addq $152, %rsp
.cfi_adjust_cfa_offset -152
retq
.Lfunc_end0:
.size _Z31__device_stub__CalculateSampleBPKfPfiiiii, .Lfunc_end0-_Z31__device_stub__CalculateSampleBPKfPfiiiii
.cfi_endproc
# -- End function
.p2align 4, 0x90 # -- Begin function __hip_module_ctor
.type __hip_module_ctor,@function
__hip_module_ctor: # @__hip_module_ctor
.cfi_startproc
# %bb.0:
subq $40, %rsp
.cfi_def_cfa_offset 48
cmpq $0, __hip_gpubin_handle(%rip)
jne .LBB1_2
# %bb.1:
movl $__hip_fatbin_wrapper, %edi
callq __hipRegisterFatBinary
movq %rax, __hip_gpubin_handle(%rip)
.LBB1_2:
movq __hip_gpubin_handle(%rip), %rdi
xorps %xmm0, %xmm0
movups %xmm0, 16(%rsp)
movups %xmm0, (%rsp)
movl $_Z16CalculateSampleBPKfPfiiiii, %esi
movl $.L__unnamed_1, %edx
movl $.L__unnamed_1, %ecx
movl $-1, %r8d
xorl %r9d, %r9d
callq __hipRegisterFunction
movl $__hip_module_dtor, %edi
addq $40, %rsp
.cfi_def_cfa_offset 8
jmp atexit # TAILCALL
.Lfunc_end1:
.size __hip_module_ctor, .Lfunc_end1-__hip_module_ctor
.cfi_endproc
# -- End function
.p2align 4, 0x90 # -- Begin function __hip_module_dtor
.type __hip_module_dtor,@function
__hip_module_dtor: # @__hip_module_dtor
.cfi_startproc
# %bb.0:
movq __hip_gpubin_handle(%rip), %rdi
testq %rdi, %rdi
je .LBB2_2
# %bb.1:
pushq %rax
.cfi_def_cfa_offset 16
callq __hipUnregisterFatBinary
movq $0, __hip_gpubin_handle(%rip)
addq $8, %rsp
.cfi_def_cfa_offset 8
.LBB2_2:
retq
.Lfunc_end2:
.size __hip_module_dtor, .Lfunc_end2-__hip_module_dtor
.cfi_endproc
# -- End function
.type _Z16CalculateSampleBPKfPfiiiii,@object # @_Z16CalculateSampleBPKfPfiiiii
.section .rodata,"a",@progbits
.globl _Z16CalculateSampleBPKfPfiiiii
.p2align 3, 0x0
_Z16CalculateSampleBPKfPfiiiii:
.quad _Z31__device_stub__CalculateSampleBPKfPfiiiii
.size _Z16CalculateSampleBPKfPfiiiii, 8
.type .L__unnamed_1,@object # @0
.section .rodata.str1.1,"aMS",@progbits,1
.L__unnamed_1:
.asciz "_Z16CalculateSampleBPKfPfiiiii"
.size .L__unnamed_1, 31
.type __hip_fatbin_wrapper,@object # @__hip_fatbin_wrapper
.section .hipFatBinSegment,"a",@progbits
.p2align 3, 0x0
__hip_fatbin_wrapper:
.long 1212764230 # 0x48495046
.long 1 # 0x1
.quad __hip_fatbin
.quad 0
.size __hip_fatbin_wrapper, 24
.type __hip_gpubin_handle,@object # @__hip_gpubin_handle
.local __hip_gpubin_handle
.comm __hip_gpubin_handle,8,8
.section .init_array,"aw",@init_array
.p2align 3, 0x0
.quad __hip_module_ctor
.type __hip_cuid_,@object # @__hip_cuid_
.bss
.globl __hip_cuid_
__hip_cuid_:
.byte 0 # 0x0
.size __hip_cuid_, 1
.section ".linker-options","e",@llvm_linker_options
.ident "AMD clang version 18.0.0git (https://github.com/RadeonOpenCompute/llvm-project roc-6.3.2 25012 e5bf7e55c91490b07c49d8960fa7983d864936c4)"
.section ".note.GNU-stack","",@progbits
.addrsig
.addrsig_sym _Z31__device_stub__CalculateSampleBPKfPfiiiii
.addrsig_sym __hip_module_ctor
.addrsig_sym __hip_module_dtor
.addrsig_sym _Z16CalculateSampleBPKfPfiiiii
.addrsig_sym __hip_fatbin
.addrsig_sym __hip_fatbin_wrapper
.addrsig_sym __hip_cuid_ |
You are a helpful coding assistant specialized in converting from CUDA host assembly to AMD host assembly. | .file "tmpxft_0004a2aa_00000000-6_CalculateSampleB.cudafe1.cpp"
.text
#APP
#NO_APP
.type _ZL26__cudaUnregisterBinaryUtilv, @function
_ZL26__cudaUnregisterBinaryUtilv:
.LFB2029:
.cfi_startproc
endbr64
subq $8, %rsp
.cfi_def_cfa_offset 16
movq _ZL20__cudaFatCubinHandle(%rip), %rdi
call __cudaUnregisterFatBinary@PLT
addq $8, %rsp
.cfi_def_cfa_offset 8
ret
.cfi_endproc
.LFE2029:
.size _ZL26__cudaUnregisterBinaryUtilv, .-_ZL26__cudaUnregisterBinaryUtilv
.globl _Z44__device_stub__Z16CalculateSampleBPKfPfiiiiiPKfPfiiiii
.type _Z44__device_stub__Z16CalculateSampleBPKfPfiiiiiPKfPfiiiii, @function
_Z44__device_stub__Z16CalculateSampleBPKfPfiiiiiPKfPfiiiii:
.LFB2051:
.cfi_startproc
endbr64
subq $168, %rsp
.cfi_def_cfa_offset 176
movq %rdi, 24(%rsp)
movq %rsi, 16(%rsp)
movl %edx, 12(%rsp)
movl %ecx, 8(%rsp)
movl %r8d, 4(%rsp)
movl %r9d, (%rsp)
movq %fs:40, %rax
movq %rax, 152(%rsp)
xorl %eax, %eax
leaq 24(%rsp), %rax
movq %rax, 96(%rsp)
leaq 16(%rsp), %rax
movq %rax, 104(%rsp)
leaq 12(%rsp), %rax
movq %rax, 112(%rsp)
leaq 8(%rsp), %rax
movq %rax, 120(%rsp)
leaq 4(%rsp), %rax
movq %rax, 128(%rsp)
movq %rsp, %rax
movq %rax, 136(%rsp)
leaq 176(%rsp), %rax
movq %rax, 144(%rsp)
movl $1, 48(%rsp)
movl $1, 52(%rsp)
movl $1, 56(%rsp)
movl $1, 60(%rsp)
movl $1, 64(%rsp)
movl $1, 68(%rsp)
leaq 40(%rsp), %rcx
leaq 32(%rsp), %rdx
leaq 60(%rsp), %rsi
leaq 48(%rsp), %rdi
call __cudaPopCallConfiguration@PLT
testl %eax, %eax
je .L7
.L3:
movq 152(%rsp), %rax
subq %fs:40, %rax
jne .L8
addq $168, %rsp
.cfi_remember_state
.cfi_def_cfa_offset 8
ret
.L7:
.cfi_restore_state
pushq 40(%rsp)
.cfi_def_cfa_offset 184
pushq 40(%rsp)
.cfi_def_cfa_offset 192
leaq 112(%rsp), %r9
movq 76(%rsp), %rcx
movl 84(%rsp), %r8d
movq 64(%rsp), %rsi
movl 72(%rsp), %edx
leaq _Z16CalculateSampleBPKfPfiiiii(%rip), %rdi
call cudaLaunchKernel@PLT
addq $16, %rsp
.cfi_def_cfa_offset 176
jmp .L3
.L8:
call __stack_chk_fail@PLT
.cfi_endproc
.LFE2051:
.size _Z44__device_stub__Z16CalculateSampleBPKfPfiiiiiPKfPfiiiii, .-_Z44__device_stub__Z16CalculateSampleBPKfPfiiiiiPKfPfiiiii
.globl _Z16CalculateSampleBPKfPfiiiii
.type _Z16CalculateSampleBPKfPfiiiii, @function
_Z16CalculateSampleBPKfPfiiiii:
.LFB2052:
.cfi_startproc
endbr64
subq $16, %rsp
.cfi_def_cfa_offset 24
movl 24(%rsp), %eax
pushq %rax
.cfi_def_cfa_offset 32
call _Z44__device_stub__Z16CalculateSampleBPKfPfiiiiiPKfPfiiiii
addq $24, %rsp
.cfi_def_cfa_offset 8
ret
.cfi_endproc
.LFE2052:
.size _Z16CalculateSampleBPKfPfiiiii, .-_Z16CalculateSampleBPKfPfiiiii
.section .rodata.str1.8,"aMS",@progbits,1
.align 8
.LC0:
.string "_Z16CalculateSampleBPKfPfiiiii"
.text
.type _ZL24__sti____cudaRegisterAllv, @function
_ZL24__sti____cudaRegisterAllv:
.LFB2054:
.cfi_startproc
endbr64
subq $8, %rsp
.cfi_def_cfa_offset 16
leaq _ZL15__fatDeviceText(%rip), %rdi
call __cudaRegisterFatBinary@PLT
movq %rax, %rdi
movq %rax, _ZL20__cudaFatCubinHandle(%rip)
pushq $0
.cfi_def_cfa_offset 24
pushq $0
.cfi_def_cfa_offset 32
pushq $0
.cfi_def_cfa_offset 40
pushq $0
.cfi_def_cfa_offset 48
movl $0, %r9d
movl $-1, %r8d
leaq .LC0(%rip), %rdx
movq %rdx, %rcx
leaq _Z16CalculateSampleBPKfPfiiiii(%rip), %rsi
call __cudaRegisterFunction@PLT
addq $32, %rsp
.cfi_def_cfa_offset 16
movq _ZL20__cudaFatCubinHandle(%rip), %rdi
call __cudaRegisterFatBinaryEnd@PLT
leaq _ZL26__cudaUnregisterBinaryUtilv(%rip), %rdi
call atexit@PLT
addq $8, %rsp
.cfi_def_cfa_offset 8
ret
.cfi_endproc
.LFE2054:
.size _ZL24__sti____cudaRegisterAllv, .-_ZL24__sti____cudaRegisterAllv
.section .init_array,"aw"
.align 8
.quad _ZL24__sti____cudaRegisterAllv
.section .nvFatBinSegment,"aw"
.align 8
.type _ZL15__fatDeviceText, @object
.size _ZL15__fatDeviceText, 24
_ZL15__fatDeviceText:
.long 1180844977
.long 1
.quad fatbinData
.quad 0
.local _ZL20__cudaFatCubinHandle
.comm _ZL20__cudaFatCubinHandle,8,8
.ident "GCC: (Ubuntu 13.3.0-6ubuntu2~24.04) 13.3.0"
.section .note.GNU-stack,"",@progbits
.section .note.gnu.property,"a"
.align 8
.long 1f - 0f
.long 4f - 1f
.long 5
0:
.string "GNU"
1:
.align 8
.long 0xc0000002
.long 3f - 2f
2:
.long 0x3
3:
.align 8
4: | .text
.file "CalculateSampleB.hip"
.globl _Z31__device_stub__CalculateSampleBPKfPfiiiii # -- Begin function _Z31__device_stub__CalculateSampleBPKfPfiiiii
.p2align 4, 0x90
.type _Z31__device_stub__CalculateSampleBPKfPfiiiii,@function
_Z31__device_stub__CalculateSampleBPKfPfiiiii: # @_Z31__device_stub__CalculateSampleBPKfPfiiiii
.cfi_startproc
# %bb.0:
subq $136, %rsp
.cfi_def_cfa_offset 144
movq %rdi, 72(%rsp)
movq %rsi, 64(%rsp)
movl %edx, 12(%rsp)
movl %ecx, 8(%rsp)
movl %r8d, 4(%rsp)
movl %r9d, (%rsp)
leaq 72(%rsp), %rax
movq %rax, 80(%rsp)
leaq 64(%rsp), %rax
movq %rax, 88(%rsp)
leaq 12(%rsp), %rax
movq %rax, 96(%rsp)
leaq 8(%rsp), %rax
movq %rax, 104(%rsp)
leaq 4(%rsp), %rax
movq %rax, 112(%rsp)
movq %rsp, %rax
movq %rax, 120(%rsp)
leaq 144(%rsp), %rax
movq %rax, 128(%rsp)
leaq 48(%rsp), %rdi
leaq 32(%rsp), %rsi
leaq 24(%rsp), %rdx
leaq 16(%rsp), %rcx
callq __hipPopCallConfiguration
movq 48(%rsp), %rsi
movl 56(%rsp), %edx
movq 32(%rsp), %rcx
movl 40(%rsp), %r8d
leaq 80(%rsp), %r9
movl $_Z16CalculateSampleBPKfPfiiiii, %edi
pushq 16(%rsp)
.cfi_adjust_cfa_offset 8
pushq 32(%rsp)
.cfi_adjust_cfa_offset 8
callq hipLaunchKernel
addq $152, %rsp
.cfi_adjust_cfa_offset -152
retq
.Lfunc_end0:
.size _Z31__device_stub__CalculateSampleBPKfPfiiiii, .Lfunc_end0-_Z31__device_stub__CalculateSampleBPKfPfiiiii
.cfi_endproc
# -- End function
.p2align 4, 0x90 # -- Begin function __hip_module_ctor
.type __hip_module_ctor,@function
__hip_module_ctor: # @__hip_module_ctor
.cfi_startproc
# %bb.0:
subq $40, %rsp
.cfi_def_cfa_offset 48
cmpq $0, __hip_gpubin_handle(%rip)
jne .LBB1_2
# %bb.1:
movl $__hip_fatbin_wrapper, %edi
callq __hipRegisterFatBinary
movq %rax, __hip_gpubin_handle(%rip)
.LBB1_2:
movq __hip_gpubin_handle(%rip), %rdi
xorps %xmm0, %xmm0
movups %xmm0, 16(%rsp)
movups %xmm0, (%rsp)
movl $_Z16CalculateSampleBPKfPfiiiii, %esi
movl $.L__unnamed_1, %edx
movl $.L__unnamed_1, %ecx
movl $-1, %r8d
xorl %r9d, %r9d
callq __hipRegisterFunction
movl $__hip_module_dtor, %edi
addq $40, %rsp
.cfi_def_cfa_offset 8
jmp atexit # TAILCALL
.Lfunc_end1:
.size __hip_module_ctor, .Lfunc_end1-__hip_module_ctor
.cfi_endproc
# -- End function
.p2align 4, 0x90 # -- Begin function __hip_module_dtor
.type __hip_module_dtor,@function
__hip_module_dtor: # @__hip_module_dtor
.cfi_startproc
# %bb.0:
movq __hip_gpubin_handle(%rip), %rdi
testq %rdi, %rdi
je .LBB2_2
# %bb.1:
pushq %rax
.cfi_def_cfa_offset 16
callq __hipUnregisterFatBinary
movq $0, __hip_gpubin_handle(%rip)
addq $8, %rsp
.cfi_def_cfa_offset 8
.LBB2_2:
retq
.Lfunc_end2:
.size __hip_module_dtor, .Lfunc_end2-__hip_module_dtor
.cfi_endproc
# -- End function
.type _Z16CalculateSampleBPKfPfiiiii,@object # @_Z16CalculateSampleBPKfPfiiiii
.section .rodata,"a",@progbits
.globl _Z16CalculateSampleBPKfPfiiiii
.p2align 3, 0x0
_Z16CalculateSampleBPKfPfiiiii:
.quad _Z31__device_stub__CalculateSampleBPKfPfiiiii
.size _Z16CalculateSampleBPKfPfiiiii, 8
.type .L__unnamed_1,@object # @0
.section .rodata.str1.1,"aMS",@progbits,1
.L__unnamed_1:
.asciz "_Z16CalculateSampleBPKfPfiiiii"
.size .L__unnamed_1, 31
.type __hip_fatbin_wrapper,@object # @__hip_fatbin_wrapper
.section .hipFatBinSegment,"a",@progbits
.p2align 3, 0x0
__hip_fatbin_wrapper:
.long 1212764230 # 0x48495046
.long 1 # 0x1
.quad __hip_fatbin
.quad 0
.size __hip_fatbin_wrapper, 24
.type __hip_gpubin_handle,@object # @__hip_gpubin_handle
.local __hip_gpubin_handle
.comm __hip_gpubin_handle,8,8
.section .init_array,"aw",@init_array
.p2align 3, 0x0
.quad __hip_module_ctor
.type __hip_cuid_,@object # @__hip_cuid_
.bss
.globl __hip_cuid_
__hip_cuid_:
.byte 0 # 0x0
.size __hip_cuid_, 1
.section ".linker-options","e",@llvm_linker_options
.ident "AMD clang version 18.0.0git (https://github.com/RadeonOpenCompute/llvm-project roc-6.3.2 25012 e5bf7e55c91490b07c49d8960fa7983d864936c4)"
.section ".note.GNU-stack","",@progbits
.addrsig
.addrsig_sym _Z31__device_stub__CalculateSampleBPKfPfiiiii
.addrsig_sym __hip_module_ctor
.addrsig_sym __hip_module_dtor
.addrsig_sym _Z16CalculateSampleBPKfPfiiiii
.addrsig_sym __hip_fatbin
.addrsig_sym __hip_fatbin_wrapper
.addrsig_sym __hip_cuid_ |
You are a helpful coding assistant specialized in converting CUDA source code to CUDA device assembly. | #include "includes.h"
__global__ void add( int *a, int *b, int *c ) {
int tid = threadIdx.x + blockIdx.x * blockDim.x;
while (tid < N) {
c[tid] = a[tid] + b[tid];
tid += blockDim.x * gridDim.x;
}
} | code for sm_80
Function : _Z3addPiS_S_
.headerflags @"EF_CUDA_TEXMODE_UNIFIED EF_CUDA_64BIT_ADDRESS EF_CUDA_SM80 EF_CUDA_VIRTUAL_SM(EF_CUDA_SM80)"
/*0000*/ MOV R1, c[0x0][0x28] ; /* 0x00000a0000017a02 */
/* 0x000fe40000000f00 */
/*0010*/ S2R R0, SR_CTAID.X ; /* 0x0000000000007919 */
/* 0x000e280000002500 */
/*0020*/ S2R R3, SR_TID.X ; /* 0x0000000000037919 */
/* 0x000e240000002100 */
/*0030*/ IMAD R0, R0, c[0x0][0x0], R3 ; /* 0x0000000000007a24 */
/* 0x001fca00078e0203 */
/*0040*/ ISETP.GT.AND P0, PT, R0, 0xfffff, PT ; /* 0x000fffff0000780c */
/* 0x000fda0003f04270 */
/*0050*/ @P0 EXIT ; /* 0x000000000000094d */
/* 0x000fea0003800000 */
/*0060*/ ULDC.64 UR4, c[0x0][0x118] ; /* 0x0000460000047ab9 */
/* 0x000fe40000000a00 */
/*0070*/ HFMA2.MMA R7, -RZ, RZ, 0, 2.384185791015625e-07 ; /* 0x00000004ff077435 */
/* 0x001fd400000001ff */
/*0080*/ IMAD.WIDE R2, R0, R7, c[0x0][0x160] ; /* 0x0000580000027625 */
/* 0x000fc800078e0207 */
/*0090*/ IMAD.WIDE R4, R0.reuse, R7.reuse, c[0x0][0x168] ; /* 0x00005a0000047625 */
/* 0x0c0fe400078e0207 */
/*00a0*/ LDG.E R3, [R2.64] ; /* 0x0000000402037981 */
/* 0x000ea8000c1e1900 */
/*00b0*/ LDG.E R4, [R4.64] ; /* 0x0000000404047981 */
/* 0x000ea2000c1e1900 */
/*00c0*/ IMAD.WIDE R6, R0, R7, c[0x0][0x170] ; /* 0x00005c0000067625 */
/* 0x000fe200078e0207 */
/*00d0*/ MOV R11, c[0x0][0x0] ; /* 0x00000000000b7a02 */
/* 0x000fca0000000f00 */
/*00e0*/ IMAD R0, R11, c[0x0][0xc], R0 ; /* 0x000003000b007a24 */
/* 0x000fca00078e0200 */
/*00f0*/ ISETP.GE.AND P0, PT, R0, 0x100000, PT ; /* 0x001000000000780c */
/* 0x000fe40003f06270 */
/*0100*/ IADD3 R9, R4, R3, RZ ; /* 0x0000000304097210 */
/* 0x004fca0007ffe0ff */
/*0110*/ STG.E [R6.64], R9 ; /* 0x0000000906007986 */
/* 0x0001ec000c101904 */
/*0120*/ @!P0 BRA 0x70 ; /* 0xffffff4000008947 */
/* 0x000fea000383ffff */
/*0130*/ EXIT ; /* 0x000000000000794d */
/* 0x000fea0003800000 */
/*0140*/ BRA 0x140; /* 0xfffffff000007947 */
/* 0x000fc0000383ffff */
/*0150*/ NOP; /* 0x0000000000007918 */
/* 0x000fc00000000000 */
/*0160*/ NOP; /* 0x0000000000007918 */
/* 0x000fc00000000000 */
/*0170*/ NOP; /* 0x0000000000007918 */
/* 0x000fc00000000000 */
/*0180*/ NOP; /* 0x0000000000007918 */
/* 0x000fc00000000000 */
/*0190*/ NOP; /* 0x0000000000007918 */
/* 0x000fc00000000000 */
/*01a0*/ NOP; /* 0x0000000000007918 */
/* 0x000fc00000000000 */
/*01b0*/ NOP; /* 0x0000000000007918 */
/* 0x000fc00000000000 */
/*01c0*/ NOP; /* 0x0000000000007918 */
/* 0x000fc00000000000 */
/*01d0*/ NOP; /* 0x0000000000007918 */
/* 0x000fc00000000000 */
/*01e0*/ NOP; /* 0x0000000000007918 */
/* 0x000fc00000000000 */
/*01f0*/ NOP; /* 0x0000000000007918 */
/* 0x000fc00000000000 */
.......... |
You are a helpful coding assistant specialized in converting CUDA source code to CUDA host assembly. | #include "includes.h"
__global__ void add( int *a, int *b, int *c ) {
int tid = threadIdx.x + blockIdx.x * blockDim.x;
while (tid < N) {
c[tid] = a[tid] + b[tid];
tid += blockDim.x * gridDim.x;
}
} | .file "tmpxft_00102626_00000000-6_add.cudafe1.cpp"
.text
#APP
#NO_APP
.type _ZL26__cudaUnregisterBinaryUtilv, @function
_ZL26__cudaUnregisterBinaryUtilv:
.LFB2029:
.cfi_startproc
endbr64
subq $8, %rsp
.cfi_def_cfa_offset 16
movq _ZL20__cudaFatCubinHandle(%rip), %rdi
call __cudaUnregisterFatBinary@PLT
addq $8, %rsp
.cfi_def_cfa_offset 8
ret
.cfi_endproc
.LFE2029:
.size _ZL26__cudaUnregisterBinaryUtilv, .-_ZL26__cudaUnregisterBinaryUtilv
.globl _Z26__device_stub__Z3addPiS_S_PiS_S_
.type _Z26__device_stub__Z3addPiS_S_PiS_S_, @function
_Z26__device_stub__Z3addPiS_S_PiS_S_:
.LFB2051:
.cfi_startproc
endbr64
subq $136, %rsp
.cfi_def_cfa_offset 144
movq %rdi, 24(%rsp)
movq %rsi, 16(%rsp)
movq %rdx, 8(%rsp)
movq %fs:40, %rax
movq %rax, 120(%rsp)
xorl %eax, %eax
leaq 24(%rsp), %rax
movq %rax, 96(%rsp)
leaq 16(%rsp), %rax
movq %rax, 104(%rsp)
leaq 8(%rsp), %rax
movq %rax, 112(%rsp)
movl $1, 48(%rsp)
movl $1, 52(%rsp)
movl $1, 56(%rsp)
movl $1, 60(%rsp)
movl $1, 64(%rsp)
movl $1, 68(%rsp)
leaq 40(%rsp), %rcx
leaq 32(%rsp), %rdx
leaq 60(%rsp), %rsi
leaq 48(%rsp), %rdi
call __cudaPopCallConfiguration@PLT
testl %eax, %eax
je .L7
.L3:
movq 120(%rsp), %rax
subq %fs:40, %rax
jne .L8
addq $136, %rsp
.cfi_remember_state
.cfi_def_cfa_offset 8
ret
.L7:
.cfi_restore_state
pushq 40(%rsp)
.cfi_def_cfa_offset 152
pushq 40(%rsp)
.cfi_def_cfa_offset 160
leaq 112(%rsp), %r9
movq 76(%rsp), %rcx
movl 84(%rsp), %r8d
movq 64(%rsp), %rsi
movl 72(%rsp), %edx
leaq _Z3addPiS_S_(%rip), %rdi
call cudaLaunchKernel@PLT
addq $16, %rsp
.cfi_def_cfa_offset 144
jmp .L3
.L8:
call __stack_chk_fail@PLT
.cfi_endproc
.LFE2051:
.size _Z26__device_stub__Z3addPiS_S_PiS_S_, .-_Z26__device_stub__Z3addPiS_S_PiS_S_
.globl _Z3addPiS_S_
.type _Z3addPiS_S_, @function
_Z3addPiS_S_:
.LFB2052:
.cfi_startproc
endbr64
subq $8, %rsp
.cfi_def_cfa_offset 16
call _Z26__device_stub__Z3addPiS_S_PiS_S_
addq $8, %rsp
.cfi_def_cfa_offset 8
ret
.cfi_endproc
.LFE2052:
.size _Z3addPiS_S_, .-_Z3addPiS_S_
.section .rodata.str1.1,"aMS",@progbits,1
.LC0:
.string "_Z3addPiS_S_"
.text
.type _ZL24__sti____cudaRegisterAllv, @function
_ZL24__sti____cudaRegisterAllv:
.LFB2054:
.cfi_startproc
endbr64
subq $8, %rsp
.cfi_def_cfa_offset 16
leaq _ZL15__fatDeviceText(%rip), %rdi
call __cudaRegisterFatBinary@PLT
movq %rax, %rdi
movq %rax, _ZL20__cudaFatCubinHandle(%rip)
pushq $0
.cfi_def_cfa_offset 24
pushq $0
.cfi_def_cfa_offset 32
pushq $0
.cfi_def_cfa_offset 40
pushq $0
.cfi_def_cfa_offset 48
movl $0, %r9d
movl $-1, %r8d
leaq .LC0(%rip), %rdx
movq %rdx, %rcx
leaq _Z3addPiS_S_(%rip), %rsi
call __cudaRegisterFunction@PLT
addq $32, %rsp
.cfi_def_cfa_offset 16
movq _ZL20__cudaFatCubinHandle(%rip), %rdi
call __cudaRegisterFatBinaryEnd@PLT
leaq _ZL26__cudaUnregisterBinaryUtilv(%rip), %rdi
call atexit@PLT
addq $8, %rsp
.cfi_def_cfa_offset 8
ret
.cfi_endproc
.LFE2054:
.size _ZL24__sti____cudaRegisterAllv, .-_ZL24__sti____cudaRegisterAllv
.section .init_array,"aw"
.align 8
.quad _ZL24__sti____cudaRegisterAllv
.section .nvFatBinSegment,"aw"
.align 8
.type _ZL15__fatDeviceText, @object
.size _ZL15__fatDeviceText, 24
_ZL15__fatDeviceText:
.long 1180844977
.long 1
.quad fatbinData
.quad 0
.local _ZL20__cudaFatCubinHandle
.comm _ZL20__cudaFatCubinHandle,8,8
.ident "GCC: (Ubuntu 13.3.0-6ubuntu2~24.04) 13.3.0"
.section .note.GNU-stack,"",@progbits
.section .note.gnu.property,"a"
.align 8
.long 1f - 0f
.long 4f - 1f
.long 5
0:
.string "GNU"
1:
.align 8
.long 0xc0000002
.long 3f - 2f
2:
.long 0x3
3:
.align 8
4: |
You are a helpful coding assistant specialized in converting CUDA source code to HIP/AMD source code. | #include "includes.h"
__global__ void add( int *a, int *b, int *c ) {
int tid = threadIdx.x + blockIdx.x * blockDim.x;
while (tid < N) {
c[tid] = a[tid] + b[tid];
tid += blockDim.x * gridDim.x;
}
} | #include <hip/hip_runtime.h>
#include "includes.h"
__global__ void add( int *a, int *b, int *c ) {
int tid = threadIdx.x + blockIdx.x * blockDim.x;
while (tid < N) {
c[tid] = a[tid] + b[tid];
tid += blockDim.x * gridDim.x;
}
} |
You are a helpful coding assistant specialized in converting HIP source code to AMD device assembly. | #include <hip/hip_runtime.h>
#include "includes.h"
__global__ void add( int *a, int *b, int *c ) {
int tid = threadIdx.x + blockIdx.x * blockDim.x;
while (tid < N) {
c[tid] = a[tid] + b[tid];
tid += blockDim.x * gridDim.x;
}
} | .text
.amdgcn_target "amdgcn-amd-amdhsa--gfx1100"
.protected _Z3addPiS_S_
.globl _Z3addPiS_S_
.p2align 8
.type _Z3addPiS_S_,@function
_Z3addPiS_S_:
s_load_b32 s4, s[0:1], 0x24
s_add_u32 s2, s0, 24
s_addc_u32 s3, s1, 0
s_waitcnt lgkmcnt(0)
s_and_b32 s8, s4, 0xffff
s_mov_b32 s4, exec_lo
v_mad_u64_u32 v[1:2], null, s15, s8, v[0:1]
s_delay_alu instid0(VALU_DEP_1)
v_cmpx_gt_i32_e32 0x100000, v1
s_cbranch_execz .LBB0_3
s_load_b32 s9, s[2:3], 0x0
s_clause 0x1
s_load_b128 s[4:7], s[0:1], 0x0
s_load_b64 s[2:3], s[0:1], 0x10
s_waitcnt lgkmcnt(0)
s_mul_i32 s1, s9, s8
s_mov_b32 s8, 0
.p2align 6
.LBB0_2:
v_ashrrev_i32_e32 v2, 31, v1
s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_2)
v_lshlrev_b64 v[2:3], 2, v[1:2]
v_add_nc_u32_e32 v1, s1, v1
v_add_co_u32 v4, vcc_lo, s4, v2
s_delay_alu instid0(VALU_DEP_3)
v_add_co_ci_u32_e32 v5, vcc_lo, s5, v3, vcc_lo
v_add_co_u32 v6, vcc_lo, s6, v2
v_add_co_ci_u32_e32 v7, vcc_lo, s7, v3, vcc_lo
v_cmp_lt_i32_e32 vcc_lo, 0xfffff, v1
global_load_b32 v0, v[4:5], off
global_load_b32 v4, v[6:7], off
v_add_co_u32 v2, s0, s2, v2
s_delay_alu instid0(VALU_DEP_1)
v_add_co_ci_u32_e64 v3, s0, s3, v3, s0
s_or_b32 s8, vcc_lo, s8
s_waitcnt vmcnt(0)
v_add_nc_u32_e32 v0, v4, v0
global_store_b32 v[2:3], v0, off
s_and_not1_b32 exec_lo, exec_lo, s8
s_cbranch_execnz .LBB0_2
.LBB0_3:
s_nop 0
s_sendmsg sendmsg(MSG_DEALLOC_VGPRS)
s_endpgm
.section .rodata,"a",@progbits
.p2align 6, 0x0
.amdhsa_kernel _Z3addPiS_S_
.amdhsa_group_segment_fixed_size 0
.amdhsa_private_segment_fixed_size 0
.amdhsa_kernarg_size 280
.amdhsa_user_sgpr_count 15
.amdhsa_user_sgpr_dispatch_ptr 0
.amdhsa_user_sgpr_queue_ptr 0
.amdhsa_user_sgpr_kernarg_segment_ptr 1
.amdhsa_user_sgpr_dispatch_id 0
.amdhsa_user_sgpr_private_segment_size 0
.amdhsa_wavefront_size32 1
.amdhsa_uses_dynamic_stack 0
.amdhsa_enable_private_segment 0
.amdhsa_system_sgpr_workgroup_id_x 1
.amdhsa_system_sgpr_workgroup_id_y 0
.amdhsa_system_sgpr_workgroup_id_z 0
.amdhsa_system_sgpr_workgroup_info 0
.amdhsa_system_vgpr_workitem_id 0
.amdhsa_next_free_vgpr 8
.amdhsa_next_free_sgpr 16
.amdhsa_float_round_mode_32 0
.amdhsa_float_round_mode_16_64 0
.amdhsa_float_denorm_mode_32 3
.amdhsa_float_denorm_mode_16_64 3
.amdhsa_dx10_clamp 1
.amdhsa_ieee_mode 1
.amdhsa_fp16_overflow 0
.amdhsa_workgroup_processor_mode 1
.amdhsa_memory_ordered 1
.amdhsa_forward_progress 0
.amdhsa_shared_vgpr_count 0
.amdhsa_exception_fp_ieee_invalid_op 0
.amdhsa_exception_fp_denorm_src 0
.amdhsa_exception_fp_ieee_div_zero 0
.amdhsa_exception_fp_ieee_overflow 0
.amdhsa_exception_fp_ieee_underflow 0
.amdhsa_exception_fp_ieee_inexact 0
.amdhsa_exception_int_div_zero 0
.end_amdhsa_kernel
.text
.Lfunc_end0:
.size _Z3addPiS_S_, .Lfunc_end0-_Z3addPiS_S_
.section .AMDGPU.csdata,"",@progbits
.text
.p2alignl 7, 3214868480
.fill 96, 4, 3214868480
.type __hip_cuid_,@object
.section .bss,"aw",@nobits
.globl __hip_cuid_
__hip_cuid_:
.byte 0
.size __hip_cuid_, 1
.ident "AMD clang version 18.0.0git (https://github.com/RadeonOpenCompute/llvm-project roc-6.3.2 25012 e5bf7e55c91490b07c49d8960fa7983d864936c4)"
.section ".note.GNU-stack","",@progbits
.addrsig
.addrsig_sym __hip_cuid_
.amdgpu_metadata
---
amdhsa.kernels:
- .args:
- .address_space: global
.offset: 0
.size: 8
.value_kind: global_buffer
- .address_space: global
.offset: 8
.size: 8
.value_kind: global_buffer
- .address_space: global
.offset: 16
.size: 8
.value_kind: global_buffer
- .offset: 24
.size: 4
.value_kind: hidden_block_count_x
- .offset: 28
.size: 4
.value_kind: hidden_block_count_y
- .offset: 32
.size: 4
.value_kind: hidden_block_count_z
- .offset: 36
.size: 2
.value_kind: hidden_group_size_x
- .offset: 38
.size: 2
.value_kind: hidden_group_size_y
- .offset: 40
.size: 2
.value_kind: hidden_group_size_z
- .offset: 42
.size: 2
.value_kind: hidden_remainder_x
- .offset: 44
.size: 2
.value_kind: hidden_remainder_y
- .offset: 46
.size: 2
.value_kind: hidden_remainder_z
- .offset: 64
.size: 8
.value_kind: hidden_global_offset_x
- .offset: 72
.size: 8
.value_kind: hidden_global_offset_y
- .offset: 80
.size: 8
.value_kind: hidden_global_offset_z
- .offset: 88
.size: 2
.value_kind: hidden_grid_dims
.group_segment_fixed_size: 0
.kernarg_segment_align: 8
.kernarg_segment_size: 280
.language: OpenCL C
.language_version:
- 2
- 0
.max_flat_workgroup_size: 1024
.name: _Z3addPiS_S_
.private_segment_fixed_size: 0
.sgpr_count: 18
.sgpr_spill_count: 0
.symbol: _Z3addPiS_S_.kd
.uniform_work_group_size: 1
.uses_dynamic_stack: false
.vgpr_count: 8
.vgpr_spill_count: 0
.wavefront_size: 32
.workgroup_processor_mode: 1
amdhsa.target: amdgcn-amd-amdhsa--gfx1100
amdhsa.version:
- 1
- 2
...
.end_amdgpu_metadata |
You are a helpful coding assistant specialized in converting HIP source code to AMD host assembly. | #include <hip/hip_runtime.h>
#include "includes.h"
__global__ void add( int *a, int *b, int *c ) {
int tid = threadIdx.x + blockIdx.x * blockDim.x;
while (tid < N) {
c[tid] = a[tid] + b[tid];
tid += blockDim.x * gridDim.x;
}
} | .text
.file "add.hip"
.globl _Z18__device_stub__addPiS_S_ # -- Begin function _Z18__device_stub__addPiS_S_
.p2align 4, 0x90
.type _Z18__device_stub__addPiS_S_,@function
_Z18__device_stub__addPiS_S_: # @_Z18__device_stub__addPiS_S_
.cfi_startproc
# %bb.0:
subq $104, %rsp
.cfi_def_cfa_offset 112
movq %rdi, 72(%rsp)
movq %rsi, 64(%rsp)
movq %rdx, 56(%rsp)
leaq 72(%rsp), %rax
movq %rax, 80(%rsp)
leaq 64(%rsp), %rax
movq %rax, 88(%rsp)
leaq 56(%rsp), %rax
movq %rax, 96(%rsp)
leaq 40(%rsp), %rdi
leaq 24(%rsp), %rsi
leaq 16(%rsp), %rdx
leaq 8(%rsp), %rcx
callq __hipPopCallConfiguration
movq 40(%rsp), %rsi
movl 48(%rsp), %edx
movq 24(%rsp), %rcx
movl 32(%rsp), %r8d
leaq 80(%rsp), %r9
movl $_Z3addPiS_S_, %edi
pushq 8(%rsp)
.cfi_adjust_cfa_offset 8
pushq 24(%rsp)
.cfi_adjust_cfa_offset 8
callq hipLaunchKernel
addq $120, %rsp
.cfi_adjust_cfa_offset -120
retq
.Lfunc_end0:
.size _Z18__device_stub__addPiS_S_, .Lfunc_end0-_Z18__device_stub__addPiS_S_
.cfi_endproc
# -- End function
.p2align 4, 0x90 # -- Begin function __hip_module_ctor
.type __hip_module_ctor,@function
__hip_module_ctor: # @__hip_module_ctor
.cfi_startproc
# %bb.0:
subq $40, %rsp
.cfi_def_cfa_offset 48
cmpq $0, __hip_gpubin_handle(%rip)
jne .LBB1_2
# %bb.1:
movl $__hip_fatbin_wrapper, %edi
callq __hipRegisterFatBinary
movq %rax, __hip_gpubin_handle(%rip)
.LBB1_2:
movq __hip_gpubin_handle(%rip), %rdi
xorps %xmm0, %xmm0
movups %xmm0, 16(%rsp)
movups %xmm0, (%rsp)
movl $_Z3addPiS_S_, %esi
movl $.L__unnamed_1, %edx
movl $.L__unnamed_1, %ecx
movl $-1, %r8d
xorl %r9d, %r9d
callq __hipRegisterFunction
movl $__hip_module_dtor, %edi
addq $40, %rsp
.cfi_def_cfa_offset 8
jmp atexit # TAILCALL
.Lfunc_end1:
.size __hip_module_ctor, .Lfunc_end1-__hip_module_ctor
.cfi_endproc
# -- End function
.p2align 4, 0x90 # -- Begin function __hip_module_dtor
.type __hip_module_dtor,@function
__hip_module_dtor: # @__hip_module_dtor
.cfi_startproc
# %bb.0:
movq __hip_gpubin_handle(%rip), %rdi
testq %rdi, %rdi
je .LBB2_2
# %bb.1:
pushq %rax
.cfi_def_cfa_offset 16
callq __hipUnregisterFatBinary
movq $0, __hip_gpubin_handle(%rip)
addq $8, %rsp
.cfi_def_cfa_offset 8
.LBB2_2:
retq
.Lfunc_end2:
.size __hip_module_dtor, .Lfunc_end2-__hip_module_dtor
.cfi_endproc
# -- End function
.type _Z3addPiS_S_,@object # @_Z3addPiS_S_
.section .rodata,"a",@progbits
.globl _Z3addPiS_S_
.p2align 3, 0x0
_Z3addPiS_S_:
.quad _Z18__device_stub__addPiS_S_
.size _Z3addPiS_S_, 8
.type .L__unnamed_1,@object # @0
.section .rodata.str1.1,"aMS",@progbits,1
.L__unnamed_1:
.asciz "_Z3addPiS_S_"
.size .L__unnamed_1, 13
.type __hip_fatbin_wrapper,@object # @__hip_fatbin_wrapper
.section .hipFatBinSegment,"a",@progbits
.p2align 3, 0x0
__hip_fatbin_wrapper:
.long 1212764230 # 0x48495046
.long 1 # 0x1
.quad __hip_fatbin
.quad 0
.size __hip_fatbin_wrapper, 24
.type __hip_gpubin_handle,@object # @__hip_gpubin_handle
.local __hip_gpubin_handle
.comm __hip_gpubin_handle,8,8
.section .init_array,"aw",@init_array
.p2align 3, 0x0
.quad __hip_module_ctor
.type __hip_cuid_,@object # @__hip_cuid_
.bss
.globl __hip_cuid_
__hip_cuid_:
.byte 0 # 0x0
.size __hip_cuid_, 1
.section ".linker-options","e",@llvm_linker_options
.ident "AMD clang version 18.0.0git (https://github.com/RadeonOpenCompute/llvm-project roc-6.3.2 25012 e5bf7e55c91490b07c49d8960fa7983d864936c4)"
.section ".note.GNU-stack","",@progbits
.addrsig
.addrsig_sym _Z18__device_stub__addPiS_S_
.addrsig_sym __hip_module_ctor
.addrsig_sym __hip_module_dtor
.addrsig_sym _Z3addPiS_S_
.addrsig_sym __hip_fatbin
.addrsig_sym __hip_fatbin_wrapper
.addrsig_sym __hip_cuid_ |
You are a helpful coding assistant specialized in converting from CUDA device assembly to AMD device assembly. | code for sm_80
Function : _Z3addPiS_S_
.headerflags @"EF_CUDA_TEXMODE_UNIFIED EF_CUDA_64BIT_ADDRESS EF_CUDA_SM80 EF_CUDA_VIRTUAL_SM(EF_CUDA_SM80)"
/*0000*/ MOV R1, c[0x0][0x28] ; /* 0x00000a0000017a02 */
/* 0x000fe40000000f00 */
/*0010*/ S2R R0, SR_CTAID.X ; /* 0x0000000000007919 */
/* 0x000e280000002500 */
/*0020*/ S2R R3, SR_TID.X ; /* 0x0000000000037919 */
/* 0x000e240000002100 */
/*0030*/ IMAD R0, R0, c[0x0][0x0], R3 ; /* 0x0000000000007a24 */
/* 0x001fca00078e0203 */
/*0040*/ ISETP.GT.AND P0, PT, R0, 0xfffff, PT ; /* 0x000fffff0000780c */
/* 0x000fda0003f04270 */
/*0050*/ @P0 EXIT ; /* 0x000000000000094d */
/* 0x000fea0003800000 */
/*0060*/ ULDC.64 UR4, c[0x0][0x118] ; /* 0x0000460000047ab9 */
/* 0x000fe40000000a00 */
/*0070*/ HFMA2.MMA R7, -RZ, RZ, 0, 2.384185791015625e-07 ; /* 0x00000004ff077435 */
/* 0x001fd400000001ff */
/*0080*/ IMAD.WIDE R2, R0, R7, c[0x0][0x160] ; /* 0x0000580000027625 */
/* 0x000fc800078e0207 */
/*0090*/ IMAD.WIDE R4, R0.reuse, R7.reuse, c[0x0][0x168] ; /* 0x00005a0000047625 */
/* 0x0c0fe400078e0207 */
/*00a0*/ LDG.E R3, [R2.64] ; /* 0x0000000402037981 */
/* 0x000ea8000c1e1900 */
/*00b0*/ LDG.E R4, [R4.64] ; /* 0x0000000404047981 */
/* 0x000ea2000c1e1900 */
/*00c0*/ IMAD.WIDE R6, R0, R7, c[0x0][0x170] ; /* 0x00005c0000067625 */
/* 0x000fe200078e0207 */
/*00d0*/ MOV R11, c[0x0][0x0] ; /* 0x00000000000b7a02 */
/* 0x000fca0000000f00 */
/*00e0*/ IMAD R0, R11, c[0x0][0xc], R0 ; /* 0x000003000b007a24 */
/* 0x000fca00078e0200 */
/*00f0*/ ISETP.GE.AND P0, PT, R0, 0x100000, PT ; /* 0x001000000000780c */
/* 0x000fe40003f06270 */
/*0100*/ IADD3 R9, R4, R3, RZ ; /* 0x0000000304097210 */
/* 0x004fca0007ffe0ff */
/*0110*/ STG.E [R6.64], R9 ; /* 0x0000000906007986 */
/* 0x0001ec000c101904 */
/*0120*/ @!P0 BRA 0x70 ; /* 0xffffff4000008947 */
/* 0x000fea000383ffff */
/*0130*/ EXIT ; /* 0x000000000000794d */
/* 0x000fea0003800000 */
/*0140*/ BRA 0x140; /* 0xfffffff000007947 */
/* 0x000fc0000383ffff */
/*0150*/ NOP; /* 0x0000000000007918 */
/* 0x000fc00000000000 */
/*0160*/ NOP; /* 0x0000000000007918 */
/* 0x000fc00000000000 */
/*0170*/ NOP; /* 0x0000000000007918 */
/* 0x000fc00000000000 */
/*0180*/ NOP; /* 0x0000000000007918 */
/* 0x000fc00000000000 */
/*0190*/ NOP; /* 0x0000000000007918 */
/* 0x000fc00000000000 */
/*01a0*/ NOP; /* 0x0000000000007918 */
/* 0x000fc00000000000 */
/*01b0*/ NOP; /* 0x0000000000007918 */
/* 0x000fc00000000000 */
/*01c0*/ NOP; /* 0x0000000000007918 */
/* 0x000fc00000000000 */
/*01d0*/ NOP; /* 0x0000000000007918 */
/* 0x000fc00000000000 */
/*01e0*/ NOP; /* 0x0000000000007918 */
/* 0x000fc00000000000 */
/*01f0*/ NOP; /* 0x0000000000007918 */
/* 0x000fc00000000000 */
.......... | .text
.amdgcn_target "amdgcn-amd-amdhsa--gfx1100"
.protected _Z3addPiS_S_
.globl _Z3addPiS_S_
.p2align 8
.type _Z3addPiS_S_,@function
_Z3addPiS_S_:
s_load_b32 s4, s[0:1], 0x24
s_add_u32 s2, s0, 24
s_addc_u32 s3, s1, 0
s_waitcnt lgkmcnt(0)
s_and_b32 s8, s4, 0xffff
s_mov_b32 s4, exec_lo
v_mad_u64_u32 v[1:2], null, s15, s8, v[0:1]
s_delay_alu instid0(VALU_DEP_1)
v_cmpx_gt_i32_e32 0x100000, v1
s_cbranch_execz .LBB0_3
s_load_b32 s9, s[2:3], 0x0
s_clause 0x1
s_load_b128 s[4:7], s[0:1], 0x0
s_load_b64 s[2:3], s[0:1], 0x10
s_waitcnt lgkmcnt(0)
s_mul_i32 s1, s9, s8
s_mov_b32 s8, 0
.p2align 6
.LBB0_2:
v_ashrrev_i32_e32 v2, 31, v1
s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_2)
v_lshlrev_b64 v[2:3], 2, v[1:2]
v_add_nc_u32_e32 v1, s1, v1
v_add_co_u32 v4, vcc_lo, s4, v2
s_delay_alu instid0(VALU_DEP_3)
v_add_co_ci_u32_e32 v5, vcc_lo, s5, v3, vcc_lo
v_add_co_u32 v6, vcc_lo, s6, v2
v_add_co_ci_u32_e32 v7, vcc_lo, s7, v3, vcc_lo
v_cmp_lt_i32_e32 vcc_lo, 0xfffff, v1
global_load_b32 v0, v[4:5], off
global_load_b32 v4, v[6:7], off
v_add_co_u32 v2, s0, s2, v2
s_delay_alu instid0(VALU_DEP_1)
v_add_co_ci_u32_e64 v3, s0, s3, v3, s0
s_or_b32 s8, vcc_lo, s8
s_waitcnt vmcnt(0)
v_add_nc_u32_e32 v0, v4, v0
global_store_b32 v[2:3], v0, off
s_and_not1_b32 exec_lo, exec_lo, s8
s_cbranch_execnz .LBB0_2
.LBB0_3:
s_nop 0
s_sendmsg sendmsg(MSG_DEALLOC_VGPRS)
s_endpgm
.section .rodata,"a",@progbits
.p2align 6, 0x0
.amdhsa_kernel _Z3addPiS_S_
.amdhsa_group_segment_fixed_size 0
.amdhsa_private_segment_fixed_size 0
.amdhsa_kernarg_size 280
.amdhsa_user_sgpr_count 15
.amdhsa_user_sgpr_dispatch_ptr 0
.amdhsa_user_sgpr_queue_ptr 0
.amdhsa_user_sgpr_kernarg_segment_ptr 1
.amdhsa_user_sgpr_dispatch_id 0
.amdhsa_user_sgpr_private_segment_size 0
.amdhsa_wavefront_size32 1
.amdhsa_uses_dynamic_stack 0
.amdhsa_enable_private_segment 0
.amdhsa_system_sgpr_workgroup_id_x 1
.amdhsa_system_sgpr_workgroup_id_y 0
.amdhsa_system_sgpr_workgroup_id_z 0
.amdhsa_system_sgpr_workgroup_info 0
.amdhsa_system_vgpr_workitem_id 0
.amdhsa_next_free_vgpr 8
.amdhsa_next_free_sgpr 16
.amdhsa_float_round_mode_32 0
.amdhsa_float_round_mode_16_64 0
.amdhsa_float_denorm_mode_32 3
.amdhsa_float_denorm_mode_16_64 3
.amdhsa_dx10_clamp 1
.amdhsa_ieee_mode 1
.amdhsa_fp16_overflow 0
.amdhsa_workgroup_processor_mode 1
.amdhsa_memory_ordered 1
.amdhsa_forward_progress 0
.amdhsa_shared_vgpr_count 0
.amdhsa_exception_fp_ieee_invalid_op 0
.amdhsa_exception_fp_denorm_src 0
.amdhsa_exception_fp_ieee_div_zero 0
.amdhsa_exception_fp_ieee_overflow 0
.amdhsa_exception_fp_ieee_underflow 0
.amdhsa_exception_fp_ieee_inexact 0
.amdhsa_exception_int_div_zero 0
.end_amdhsa_kernel
.text
.Lfunc_end0:
.size _Z3addPiS_S_, .Lfunc_end0-_Z3addPiS_S_
.section .AMDGPU.csdata,"",@progbits
.text
.p2alignl 7, 3214868480
.fill 96, 4, 3214868480
.type __hip_cuid_,@object
.section .bss,"aw",@nobits
.globl __hip_cuid_
__hip_cuid_:
.byte 0
.size __hip_cuid_, 1
.ident "AMD clang version 18.0.0git (https://github.com/RadeonOpenCompute/llvm-project roc-6.3.2 25012 e5bf7e55c91490b07c49d8960fa7983d864936c4)"
.section ".note.GNU-stack","",@progbits
.addrsig
.addrsig_sym __hip_cuid_
.amdgpu_metadata
---
amdhsa.kernels:
- .args:
- .address_space: global
.offset: 0
.size: 8
.value_kind: global_buffer
- .address_space: global
.offset: 8
.size: 8
.value_kind: global_buffer
- .address_space: global
.offset: 16
.size: 8
.value_kind: global_buffer
- .offset: 24
.size: 4
.value_kind: hidden_block_count_x
- .offset: 28
.size: 4
.value_kind: hidden_block_count_y
- .offset: 32
.size: 4
.value_kind: hidden_block_count_z
- .offset: 36
.size: 2
.value_kind: hidden_group_size_x
- .offset: 38
.size: 2
.value_kind: hidden_group_size_y
- .offset: 40
.size: 2
.value_kind: hidden_group_size_z
- .offset: 42
.size: 2
.value_kind: hidden_remainder_x
- .offset: 44
.size: 2
.value_kind: hidden_remainder_y
- .offset: 46
.size: 2
.value_kind: hidden_remainder_z
- .offset: 64
.size: 8
.value_kind: hidden_global_offset_x
- .offset: 72
.size: 8
.value_kind: hidden_global_offset_y
- .offset: 80
.size: 8
.value_kind: hidden_global_offset_z
- .offset: 88
.size: 2
.value_kind: hidden_grid_dims
.group_segment_fixed_size: 0
.kernarg_segment_align: 8
.kernarg_segment_size: 280
.language: OpenCL C
.language_version:
- 2
- 0
.max_flat_workgroup_size: 1024
.name: _Z3addPiS_S_
.private_segment_fixed_size: 0
.sgpr_count: 18
.sgpr_spill_count: 0
.symbol: _Z3addPiS_S_.kd
.uniform_work_group_size: 1
.uses_dynamic_stack: false
.vgpr_count: 8
.vgpr_spill_count: 0
.wavefront_size: 32
.workgroup_processor_mode: 1
amdhsa.target: amdgcn-amd-amdhsa--gfx1100
amdhsa.version:
- 1
- 2
...
.end_amdgpu_metadata |
You are a helpful coding assistant specialized in converting from CUDA host assembly to AMD host assembly. | .file "tmpxft_00102626_00000000-6_add.cudafe1.cpp"
.text
#APP
#NO_APP
.type _ZL26__cudaUnregisterBinaryUtilv, @function
_ZL26__cudaUnregisterBinaryUtilv:
.LFB2029:
.cfi_startproc
endbr64
subq $8, %rsp
.cfi_def_cfa_offset 16
movq _ZL20__cudaFatCubinHandle(%rip), %rdi
call __cudaUnregisterFatBinary@PLT
addq $8, %rsp
.cfi_def_cfa_offset 8
ret
.cfi_endproc
.LFE2029:
.size _ZL26__cudaUnregisterBinaryUtilv, .-_ZL26__cudaUnregisterBinaryUtilv
.globl _Z26__device_stub__Z3addPiS_S_PiS_S_
.type _Z26__device_stub__Z3addPiS_S_PiS_S_, @function
_Z26__device_stub__Z3addPiS_S_PiS_S_:
.LFB2051:
.cfi_startproc
endbr64
subq $136, %rsp
.cfi_def_cfa_offset 144
movq %rdi, 24(%rsp)
movq %rsi, 16(%rsp)
movq %rdx, 8(%rsp)
movq %fs:40, %rax
movq %rax, 120(%rsp)
xorl %eax, %eax
leaq 24(%rsp), %rax
movq %rax, 96(%rsp)
leaq 16(%rsp), %rax
movq %rax, 104(%rsp)
leaq 8(%rsp), %rax
movq %rax, 112(%rsp)
movl $1, 48(%rsp)
movl $1, 52(%rsp)
movl $1, 56(%rsp)
movl $1, 60(%rsp)
movl $1, 64(%rsp)
movl $1, 68(%rsp)
leaq 40(%rsp), %rcx
leaq 32(%rsp), %rdx
leaq 60(%rsp), %rsi
leaq 48(%rsp), %rdi
call __cudaPopCallConfiguration@PLT
testl %eax, %eax
je .L7
.L3:
movq 120(%rsp), %rax
subq %fs:40, %rax
jne .L8
addq $136, %rsp
.cfi_remember_state
.cfi_def_cfa_offset 8
ret
.L7:
.cfi_restore_state
pushq 40(%rsp)
.cfi_def_cfa_offset 152
pushq 40(%rsp)
.cfi_def_cfa_offset 160
leaq 112(%rsp), %r9
movq 76(%rsp), %rcx
movl 84(%rsp), %r8d
movq 64(%rsp), %rsi
movl 72(%rsp), %edx
leaq _Z3addPiS_S_(%rip), %rdi
call cudaLaunchKernel@PLT
addq $16, %rsp
.cfi_def_cfa_offset 144
jmp .L3
.L8:
call __stack_chk_fail@PLT
.cfi_endproc
.LFE2051:
.size _Z26__device_stub__Z3addPiS_S_PiS_S_, .-_Z26__device_stub__Z3addPiS_S_PiS_S_
.globl _Z3addPiS_S_
.type _Z3addPiS_S_, @function
_Z3addPiS_S_:
.LFB2052:
.cfi_startproc
endbr64
subq $8, %rsp
.cfi_def_cfa_offset 16
call _Z26__device_stub__Z3addPiS_S_PiS_S_
addq $8, %rsp
.cfi_def_cfa_offset 8
ret
.cfi_endproc
.LFE2052:
.size _Z3addPiS_S_, .-_Z3addPiS_S_
.section .rodata.str1.1,"aMS",@progbits,1
.LC0:
.string "_Z3addPiS_S_"
.text
.type _ZL24__sti____cudaRegisterAllv, @function
_ZL24__sti____cudaRegisterAllv:
.LFB2054:
.cfi_startproc
endbr64
subq $8, %rsp
.cfi_def_cfa_offset 16
leaq _ZL15__fatDeviceText(%rip), %rdi
call __cudaRegisterFatBinary@PLT
movq %rax, %rdi
movq %rax, _ZL20__cudaFatCubinHandle(%rip)
pushq $0
.cfi_def_cfa_offset 24
pushq $0
.cfi_def_cfa_offset 32
pushq $0
.cfi_def_cfa_offset 40
pushq $0
.cfi_def_cfa_offset 48
movl $0, %r9d
movl $-1, %r8d
leaq .LC0(%rip), %rdx
movq %rdx, %rcx
leaq _Z3addPiS_S_(%rip), %rsi
call __cudaRegisterFunction@PLT
addq $32, %rsp
.cfi_def_cfa_offset 16
movq _ZL20__cudaFatCubinHandle(%rip), %rdi
call __cudaRegisterFatBinaryEnd@PLT
leaq _ZL26__cudaUnregisterBinaryUtilv(%rip), %rdi
call atexit@PLT
addq $8, %rsp
.cfi_def_cfa_offset 8
ret
.cfi_endproc
.LFE2054:
.size _ZL24__sti____cudaRegisterAllv, .-_ZL24__sti____cudaRegisterAllv
.section .init_array,"aw"
.align 8
.quad _ZL24__sti____cudaRegisterAllv
.section .nvFatBinSegment,"aw"
.align 8
.type _ZL15__fatDeviceText, @object
.size _ZL15__fatDeviceText, 24
_ZL15__fatDeviceText:
.long 1180844977
.long 1
.quad fatbinData
.quad 0
.local _ZL20__cudaFatCubinHandle
.comm _ZL20__cudaFatCubinHandle,8,8
.ident "GCC: (Ubuntu 13.3.0-6ubuntu2~24.04) 13.3.0"
.section .note.GNU-stack,"",@progbits
.section .note.gnu.property,"a"
.align 8
.long 1f - 0f
.long 4f - 1f
.long 5
0:
.string "GNU"
1:
.align 8
.long 0xc0000002
.long 3f - 2f
2:
.long 0x3
3:
.align 8
4: | .text
.file "add.hip"
.globl _Z18__device_stub__addPiS_S_ # -- Begin function _Z18__device_stub__addPiS_S_
.p2align 4, 0x90
.type _Z18__device_stub__addPiS_S_,@function
_Z18__device_stub__addPiS_S_: # @_Z18__device_stub__addPiS_S_
.cfi_startproc
# %bb.0:
subq $104, %rsp
.cfi_def_cfa_offset 112
movq %rdi, 72(%rsp)
movq %rsi, 64(%rsp)
movq %rdx, 56(%rsp)
leaq 72(%rsp), %rax
movq %rax, 80(%rsp)
leaq 64(%rsp), %rax
movq %rax, 88(%rsp)
leaq 56(%rsp), %rax
movq %rax, 96(%rsp)
leaq 40(%rsp), %rdi
leaq 24(%rsp), %rsi
leaq 16(%rsp), %rdx
leaq 8(%rsp), %rcx
callq __hipPopCallConfiguration
movq 40(%rsp), %rsi
movl 48(%rsp), %edx
movq 24(%rsp), %rcx
movl 32(%rsp), %r8d
leaq 80(%rsp), %r9
movl $_Z3addPiS_S_, %edi
pushq 8(%rsp)
.cfi_adjust_cfa_offset 8
pushq 24(%rsp)
.cfi_adjust_cfa_offset 8
callq hipLaunchKernel
addq $120, %rsp
.cfi_adjust_cfa_offset -120
retq
.Lfunc_end0:
.size _Z18__device_stub__addPiS_S_, .Lfunc_end0-_Z18__device_stub__addPiS_S_
.cfi_endproc
# -- End function
.p2align 4, 0x90 # -- Begin function __hip_module_ctor
.type __hip_module_ctor,@function
__hip_module_ctor: # @__hip_module_ctor
.cfi_startproc
# %bb.0:
subq $40, %rsp
.cfi_def_cfa_offset 48
cmpq $0, __hip_gpubin_handle(%rip)
jne .LBB1_2
# %bb.1:
movl $__hip_fatbin_wrapper, %edi
callq __hipRegisterFatBinary
movq %rax, __hip_gpubin_handle(%rip)
.LBB1_2:
movq __hip_gpubin_handle(%rip), %rdi
xorps %xmm0, %xmm0
movups %xmm0, 16(%rsp)
movups %xmm0, (%rsp)
movl $_Z3addPiS_S_, %esi
movl $.L__unnamed_1, %edx
movl $.L__unnamed_1, %ecx
movl $-1, %r8d
xorl %r9d, %r9d
callq __hipRegisterFunction
movl $__hip_module_dtor, %edi
addq $40, %rsp
.cfi_def_cfa_offset 8
jmp atexit # TAILCALL
.Lfunc_end1:
.size __hip_module_ctor, .Lfunc_end1-__hip_module_ctor
.cfi_endproc
# -- End function
.p2align 4, 0x90 # -- Begin function __hip_module_dtor
.type __hip_module_dtor,@function
__hip_module_dtor: # @__hip_module_dtor
.cfi_startproc
# %bb.0:
movq __hip_gpubin_handle(%rip), %rdi
testq %rdi, %rdi
je .LBB2_2
# %bb.1:
pushq %rax
.cfi_def_cfa_offset 16
callq __hipUnregisterFatBinary
movq $0, __hip_gpubin_handle(%rip)
addq $8, %rsp
.cfi_def_cfa_offset 8
.LBB2_2:
retq
.Lfunc_end2:
.size __hip_module_dtor, .Lfunc_end2-__hip_module_dtor
.cfi_endproc
# -- End function
.type _Z3addPiS_S_,@object # @_Z3addPiS_S_
.section .rodata,"a",@progbits
.globl _Z3addPiS_S_
.p2align 3, 0x0
_Z3addPiS_S_:
.quad _Z18__device_stub__addPiS_S_
.size _Z3addPiS_S_, 8
.type .L__unnamed_1,@object # @0
.section .rodata.str1.1,"aMS",@progbits,1
.L__unnamed_1:
.asciz "_Z3addPiS_S_"
.size .L__unnamed_1, 13
.type __hip_fatbin_wrapper,@object # @__hip_fatbin_wrapper
.section .hipFatBinSegment,"a",@progbits
.p2align 3, 0x0
__hip_fatbin_wrapper:
.long 1212764230 # 0x48495046
.long 1 # 0x1
.quad __hip_fatbin
.quad 0
.size __hip_fatbin_wrapper, 24
.type __hip_gpubin_handle,@object # @__hip_gpubin_handle
.local __hip_gpubin_handle
.comm __hip_gpubin_handle,8,8
.section .init_array,"aw",@init_array
.p2align 3, 0x0
.quad __hip_module_ctor
.type __hip_cuid_,@object # @__hip_cuid_
.bss
.globl __hip_cuid_
__hip_cuid_:
.byte 0 # 0x0
.size __hip_cuid_, 1
.section ".linker-options","e",@llvm_linker_options
.ident "AMD clang version 18.0.0git (https://github.com/RadeonOpenCompute/llvm-project roc-6.3.2 25012 e5bf7e55c91490b07c49d8960fa7983d864936c4)"
.section ".note.GNU-stack","",@progbits
.addrsig
.addrsig_sym _Z18__device_stub__addPiS_S_
.addrsig_sym __hip_module_ctor
.addrsig_sym __hip_module_dtor
.addrsig_sym _Z3addPiS_S_
.addrsig_sym __hip_fatbin
.addrsig_sym __hip_fatbin_wrapper
.addrsig_sym __hip_cuid_ |
You are a helpful coding assistant specialized in converting CUDA source code to CUDA host assembly. | #include <iostream>
#include <stdio.h>
#include <time.h>
#include <cuda.h>
using namespace std;
struct Address
{
int numa;
int numb;
};
__global__ void pairhmm( Address * address, int * result_d)
{
clock_t start_time=clock();
int warp_index=threadIdx.x/32;
int numa=address[warp_index]. numa;
int numb=address[warp_index]. numb;
int result=0;
int round=0;
for(round=0;round<2;round++)
{
for(int i=0;i<numa;i++)
{
if(threadIdx.x%32==0) printf("round=%d warp %d numa=%d i=%d \n",round, warp_index, numa,i);
for(int j=0;j<numb;j++)
{
if(threadIdx.x%32==0) printf("warp %d numb=%d j=%d \n", warp_index, numb,j);
result+=i+j*2;
}
}
if(threadIdx.x%32==0) printf("round=%d warp %d endendend \n",round, warp_index);
result_d[threadIdx.x]=result;
}
clock_t finish_time=clock();
int time=(int)( finish_time-start_time);
if(threadIdx.x%32==0) printf("%d\n", time);
}
int main()
{
Address * address;
address=(Address *)malloc(sizeof(Address)* 4);
address[0].numa=2;
address[0].numb=2;
address[1].numa=4;
address[1].numb=4;
address[2].numa=6;
address[2].numb=6;
address[3].numa=8;
address[3].numb=8;
Address * address_d;
cudaMalloc( (Address **)&address_d,sizeof(int) *100 );
cudaMemcpy(address_d,address,4*sizeof(Address), cudaMemcpyHostToDevice);
int blocksize=64;
int gridsize=1;
int *result_h;
int *result_d;
result_h=(int *) malloc( sizeof(int)* 128);
cudaMalloc( (int **)&result_d,sizeof(int) *128);
pairhmm<<<gridsize,blocksize>>>(address_d,result_d);
cudaMemcpy(result_h,result_d,128*sizeof(int), cudaMemcpyDeviceToHost);
// for(int i=0;i<128;i++)
// printf("index= %d %d\n", i, result_h[i]);
cudaDeviceSynchronize();
return 0;
} | .file "tmpxft_001360e9_00000000-6_example.cudafe1.cpp"
.text
#APP
.globl _ZSt21ios_base_library_initv
#NO_APP
.type _ZL26__cudaUnregisterBinaryUtilv, @function
_ZL26__cudaUnregisterBinaryUtilv:
.LFB3672:
.cfi_startproc
endbr64
subq $8, %rsp
.cfi_def_cfa_offset 16
movq _ZL20__cudaFatCubinHandle(%rip), %rdi
call __cudaUnregisterFatBinary@PLT
addq $8, %rsp
.cfi_def_cfa_offset 8
ret
.cfi_endproc
.LFE3672:
.size _ZL26__cudaUnregisterBinaryUtilv, .-_ZL26__cudaUnregisterBinaryUtilv
.globl _Z35__device_stub__Z7pairhmmP7AddressPiP7AddressPi
.type _Z35__device_stub__Z7pairhmmP7AddressPiP7AddressPi, @function
_Z35__device_stub__Z7pairhmmP7AddressPiP7AddressPi:
.LFB3694:
.cfi_startproc
endbr64
subq $120, %rsp
.cfi_def_cfa_offset 128
movq %rdi, 8(%rsp)
movq %rsi, (%rsp)
movq %fs:40, %rax
movq %rax, 104(%rsp)
xorl %eax, %eax
leaq 8(%rsp), %rax
movq %rax, 80(%rsp)
movq %rsp, %rax
movq %rax, 88(%rsp)
movl $1, 32(%rsp)
movl $1, 36(%rsp)
movl $1, 40(%rsp)
movl $1, 44(%rsp)
movl $1, 48(%rsp)
movl $1, 52(%rsp)
leaq 24(%rsp), %rcx
leaq 16(%rsp), %rdx
leaq 44(%rsp), %rsi
leaq 32(%rsp), %rdi
call __cudaPopCallConfiguration@PLT
testl %eax, %eax
je .L7
.L3:
movq 104(%rsp), %rax
subq %fs:40, %rax
jne .L8
addq $120, %rsp
.cfi_remember_state
.cfi_def_cfa_offset 8
ret
.L7:
.cfi_restore_state
pushq 24(%rsp)
.cfi_def_cfa_offset 136
pushq 24(%rsp)
.cfi_def_cfa_offset 144
leaq 96(%rsp), %r9
movq 60(%rsp), %rcx
movl 68(%rsp), %r8d
movq 48(%rsp), %rsi
movl 56(%rsp), %edx
leaq _Z7pairhmmP7AddressPi(%rip), %rdi
call cudaLaunchKernel@PLT
addq $16, %rsp
.cfi_def_cfa_offset 128
jmp .L3
.L8:
call __stack_chk_fail@PLT
.cfi_endproc
.LFE3694:
.size _Z35__device_stub__Z7pairhmmP7AddressPiP7AddressPi, .-_Z35__device_stub__Z7pairhmmP7AddressPiP7AddressPi
.globl _Z7pairhmmP7AddressPi
.type _Z7pairhmmP7AddressPi, @function
_Z7pairhmmP7AddressPi:
.LFB3695:
.cfi_startproc
endbr64
subq $8, %rsp
.cfi_def_cfa_offset 16
call _Z35__device_stub__Z7pairhmmP7AddressPiP7AddressPi
addq $8, %rsp
.cfi_def_cfa_offset 8
ret
.cfi_endproc
.LFE3695:
.size _Z7pairhmmP7AddressPi, .-_Z7pairhmmP7AddressPi
.globl main
.type main, @function
main:
.LFB3669:
.cfi_startproc
endbr64
pushq %rbx
.cfi_def_cfa_offset 16
.cfi_offset 3, -16
subq $48, %rsp
.cfi_def_cfa_offset 64
movq %fs:40, %rax
movq %rax, 40(%rsp)
xorl %eax, %eax
movl $32, %edi
call malloc@PLT
movq %rax, %rbx
movl $2, (%rax)
movl $2, 4(%rax)
movl $4, 8(%rax)
movl $4, 12(%rax)
movl $6, 16(%rax)
movl $6, 20(%rax)
movl $8, 24(%rax)
movl $8, 28(%rax)
movq %rsp, %rdi
movl $400, %esi
call cudaMalloc@PLT
movl $1, %ecx
movl $32, %edx
movq %rbx, %rsi
movq (%rsp), %rdi
call cudaMemcpy@PLT
movl $512, %edi
call malloc@PLT
movq %rax, %rbx
leaq 8(%rsp), %rdi
movl $512, %esi
call cudaMalloc@PLT
movl $64, 28(%rsp)
movl $1, 32(%rsp)
movl $1, 16(%rsp)
movl $1, 20(%rsp)
movl $0, %r9d
movl $0, %r8d
movq 28(%rsp), %rdx
movl $1, %ecx
movq 16(%rsp), %rdi
movl $1, %esi
call __cudaPushCallConfiguration@PLT
testl %eax, %eax
je .L15
.L12:
movl $2, %ecx
movl $512, %edx
movq 8(%rsp), %rsi
movq %rbx, %rdi
call cudaMemcpy@PLT
call cudaDeviceSynchronize@PLT
movq 40(%rsp), %rax
subq %fs:40, %rax
jne .L16
movl $0, %eax
addq $48, %rsp
.cfi_remember_state
.cfi_def_cfa_offset 16
popq %rbx
.cfi_def_cfa_offset 8
ret
.L15:
.cfi_restore_state
movq 8(%rsp), %rsi
movq (%rsp), %rdi
call _Z35__device_stub__Z7pairhmmP7AddressPiP7AddressPi
jmp .L12
.L16:
call __stack_chk_fail@PLT
.cfi_endproc
.LFE3669:
.size main, .-main
.section .rodata.str1.1,"aMS",@progbits,1
.LC0:
.string "_Z7pairhmmP7AddressPi"
.text
.type _ZL24__sti____cudaRegisterAllv, @function
_ZL24__sti____cudaRegisterAllv:
.LFB3697:
.cfi_startproc
endbr64
subq $8, %rsp
.cfi_def_cfa_offset 16
leaq _ZL15__fatDeviceText(%rip), %rdi
call __cudaRegisterFatBinary@PLT
movq %rax, %rdi
movq %rax, _ZL20__cudaFatCubinHandle(%rip)
pushq $0
.cfi_def_cfa_offset 24
pushq $0
.cfi_def_cfa_offset 32
pushq $0
.cfi_def_cfa_offset 40
pushq $0
.cfi_def_cfa_offset 48
movl $0, %r9d
movl $-1, %r8d
leaq .LC0(%rip), %rdx
movq %rdx, %rcx
leaq _Z7pairhmmP7AddressPi(%rip), %rsi
call __cudaRegisterFunction@PLT
addq $32, %rsp
.cfi_def_cfa_offset 16
movq _ZL20__cudaFatCubinHandle(%rip), %rdi
call __cudaRegisterFatBinaryEnd@PLT
leaq _ZL26__cudaUnregisterBinaryUtilv(%rip), %rdi
call atexit@PLT
addq $8, %rsp
.cfi_def_cfa_offset 8
ret
.cfi_endproc
.LFE3697:
.size _ZL24__sti____cudaRegisterAllv, .-_ZL24__sti____cudaRegisterAllv
.section .init_array,"aw"
.align 8
.quad _ZL24__sti____cudaRegisterAllv
.section .nvFatBinSegment,"aw"
.align 8
.type _ZL15__fatDeviceText, @object
.size _ZL15__fatDeviceText, 24
_ZL15__fatDeviceText:
.long 1180844977
.long 1
.quad fatbinData
.quad 0
.local _ZL20__cudaFatCubinHandle
.comm _ZL20__cudaFatCubinHandle,8,8
.ident "GCC: (Ubuntu 13.3.0-6ubuntu2~24.04) 13.3.0"
.section .note.GNU-stack,"",@progbits
.section .note.gnu.property,"a"
.align 8
.long 1f - 0f
.long 4f - 1f
.long 5
0:
.string "GNU"
1:
.align 8
.long 0xc0000002
.long 3f - 2f
2:
.long 0x3
3:
.align 8
4: |
You are a helpful coding assistant specialized in converting CUDA source code to HIP/AMD source code. | #include <iostream>
#include <stdio.h>
#include <time.h>
#include <cuda.h>
using namespace std;
struct Address
{
int numa;
int numb;
};
__global__ void pairhmm( Address * address, int * result_d)
{
clock_t start_time=clock();
int warp_index=threadIdx.x/32;
int numa=address[warp_index]. numa;
int numb=address[warp_index]. numb;
int result=0;
int round=0;
for(round=0;round<2;round++)
{
for(int i=0;i<numa;i++)
{
if(threadIdx.x%32==0) printf("round=%d warp %d numa=%d i=%d \n",round, warp_index, numa,i);
for(int j=0;j<numb;j++)
{
if(threadIdx.x%32==0) printf("warp %d numb=%d j=%d \n", warp_index, numb,j);
result+=i+j*2;
}
}
if(threadIdx.x%32==0) printf("round=%d warp %d endendend \n",round, warp_index);
result_d[threadIdx.x]=result;
}
clock_t finish_time=clock();
int time=(int)( finish_time-start_time);
if(threadIdx.x%32==0) printf("%d\n", time);
}
int main()
{
Address * address;
address=(Address *)malloc(sizeof(Address)* 4);
address[0].numa=2;
address[0].numb=2;
address[1].numa=4;
address[1].numb=4;
address[2].numa=6;
address[2].numb=6;
address[3].numa=8;
address[3].numb=8;
Address * address_d;
cudaMalloc( (Address **)&address_d,sizeof(int) *100 );
cudaMemcpy(address_d,address,4*sizeof(Address), cudaMemcpyHostToDevice);
int blocksize=64;
int gridsize=1;
int *result_h;
int *result_d;
result_h=(int *) malloc( sizeof(int)* 128);
cudaMalloc( (int **)&result_d,sizeof(int) *128);
pairhmm<<<gridsize,blocksize>>>(address_d,result_d);
cudaMemcpy(result_h,result_d,128*sizeof(int), cudaMemcpyDeviceToHost);
// for(int i=0;i<128;i++)
// printf("index= %d %d\n", i, result_h[i]);
cudaDeviceSynchronize();
return 0;
} | #include <iostream>
#include <stdio.h>
#include <time.h>
#include <hip/hip_runtime.h>
using namespace std;
struct Address
{
int numa;
int numb;
};
__global__ void pairhmm( Address * address, int * result_d)
{
clock_t start_time=clock();
int warp_index=threadIdx.x/32;
int numa=address[warp_index]. numa;
int numb=address[warp_index]. numb;
int result=0;
int round=0;
for(round=0;round<2;round++)
{
for(int i=0;i<numa;i++)
{
if(threadIdx.x%32==0) printf("round=%d warp %d numa=%d i=%d \n",round, warp_index, numa,i);
for(int j=0;j<numb;j++)
{
if(threadIdx.x%32==0) printf("warp %d numb=%d j=%d \n", warp_index, numb,j);
result+=i+j*2;
}
}
if(threadIdx.x%32==0) printf("round=%d warp %d endendend \n",round, warp_index);
result_d[threadIdx.x]=result;
}
clock_t finish_time=clock();
int time=(int)( finish_time-start_time);
if(threadIdx.x%32==0) printf("%d\n", time);
}
int main()
{
Address * address;
address=(Address *)malloc(sizeof(Address)* 4);
address[0].numa=2;
address[0].numb=2;
address[1].numa=4;
address[1].numb=4;
address[2].numa=6;
address[2].numb=6;
address[3].numa=8;
address[3].numb=8;
Address * address_d;
hipMalloc( (Address **)&address_d,sizeof(int) *100 );
hipMemcpy(address_d,address,4*sizeof(Address), hipMemcpyHostToDevice);
int blocksize=64;
int gridsize=1;
int *result_h;
int *result_d;
result_h=(int *) malloc( sizeof(int)* 128);
hipMalloc( (int **)&result_d,sizeof(int) *128);
pairhmm<<<gridsize,blocksize>>>(address_d,result_d);
hipMemcpy(result_h,result_d,128*sizeof(int), hipMemcpyDeviceToHost);
// for(int i=0;i<128;i++)
// printf("index= %d %d\n", i, result_h[i]);
hipDeviceSynchronize();
return 0;
} |
You are a helpful coding assistant specialized in converting HIP source code to AMD host assembly. | #include <iostream>
#include <stdio.h>
#include <time.h>
#include <hip/hip_runtime.h>
using namespace std;
struct Address
{
int numa;
int numb;
};
__global__ void pairhmm( Address * address, int * result_d)
{
clock_t start_time=clock();
int warp_index=threadIdx.x/32;
int numa=address[warp_index]. numa;
int numb=address[warp_index]. numb;
int result=0;
int round=0;
for(round=0;round<2;round++)
{
for(int i=0;i<numa;i++)
{
if(threadIdx.x%32==0) printf("round=%d warp %d numa=%d i=%d \n",round, warp_index, numa,i);
for(int j=0;j<numb;j++)
{
if(threadIdx.x%32==0) printf("warp %d numb=%d j=%d \n", warp_index, numb,j);
result+=i+j*2;
}
}
if(threadIdx.x%32==0) printf("round=%d warp %d endendend \n",round, warp_index);
result_d[threadIdx.x]=result;
}
clock_t finish_time=clock();
int time=(int)( finish_time-start_time);
if(threadIdx.x%32==0) printf("%d\n", time);
}
int main()
{
Address * address;
address=(Address *)malloc(sizeof(Address)* 4);
address[0].numa=2;
address[0].numb=2;
address[1].numa=4;
address[1].numb=4;
address[2].numa=6;
address[2].numb=6;
address[3].numa=8;
address[3].numb=8;
Address * address_d;
hipMalloc( (Address **)&address_d,sizeof(int) *100 );
hipMemcpy(address_d,address,4*sizeof(Address), hipMemcpyHostToDevice);
int blocksize=64;
int gridsize=1;
int *result_h;
int *result_d;
result_h=(int *) malloc( sizeof(int)* 128);
hipMalloc( (int **)&result_d,sizeof(int) *128);
pairhmm<<<gridsize,blocksize>>>(address_d,result_d);
hipMemcpy(result_h,result_d,128*sizeof(int), hipMemcpyDeviceToHost);
// for(int i=0;i<128;i++)
// printf("index= %d %d\n", i, result_h[i]);
hipDeviceSynchronize();
return 0;
} | .text
.file "example.hip"
# Start of file scope inline assembly
.globl _ZSt21ios_base_library_initv
# End of file scope inline assembly
.globl _Z22__device_stub__pairhmmP7AddressPi # -- Begin function _Z22__device_stub__pairhmmP7AddressPi
.p2align 4, 0x90
.type _Z22__device_stub__pairhmmP7AddressPi,@function
_Z22__device_stub__pairhmmP7AddressPi: # @_Z22__device_stub__pairhmmP7AddressPi
.cfi_startproc
# %bb.0:
subq $88, %rsp
.cfi_def_cfa_offset 96
movq %rdi, 56(%rsp)
movq %rsi, 48(%rsp)
leaq 56(%rsp), %rax
movq %rax, 64(%rsp)
leaq 48(%rsp), %rax
movq %rax, 72(%rsp)
leaq 32(%rsp), %rdi
leaq 16(%rsp), %rsi
leaq 8(%rsp), %rdx
movq %rsp, %rcx
callq __hipPopCallConfiguration
movq 32(%rsp), %rsi
movl 40(%rsp), %edx
movq 16(%rsp), %rcx
movl 24(%rsp), %r8d
leaq 64(%rsp), %r9
movl $_Z7pairhmmP7AddressPi, %edi
pushq (%rsp)
.cfi_adjust_cfa_offset 8
pushq 16(%rsp)
.cfi_adjust_cfa_offset 8
callq hipLaunchKernel
addq $104, %rsp
.cfi_adjust_cfa_offset -104
retq
.Lfunc_end0:
.size _Z22__device_stub__pairhmmP7AddressPi, .Lfunc_end0-_Z22__device_stub__pairhmmP7AddressPi
.cfi_endproc
# -- End function
.section .rodata.cst16,"aM",@progbits,16
.p2align 4, 0x0 # -- Begin function main
.LCPI1_0:
.long 2 # 0x2
.long 2 # 0x2
.long 4 # 0x4
.long 4 # 0x4
.LCPI1_1:
.long 6 # 0x6
.long 6 # 0x6
.long 8 # 0x8
.long 8 # 0x8
.text
.globl main
.p2align 4, 0x90
.type main,@function
main: # @main
.cfi_startproc
# %bb.0:
pushq %rbx
.cfi_def_cfa_offset 16
subq $96, %rsp
.cfi_def_cfa_offset 112
.cfi_offset %rbx, -16
movl $32, %edi
callq malloc
movq %rax, %rbx
movaps .LCPI1_0(%rip), %xmm0 # xmm0 = [2,2,4,4]
movups %xmm0, (%rax)
movaps .LCPI1_1(%rip), %xmm0 # xmm0 = [6,6,8,8]
movups %xmm0, 16(%rax)
leaq 8(%rsp), %rdi
movl $400, %esi # imm = 0x190
callq hipMalloc
movq 8(%rsp), %rdi
movl $32, %edx
movq %rbx, %rsi
movl $1, %ecx
callq hipMemcpy
movl $512, %edi # imm = 0x200
callq malloc
movq %rax, %rbx
movq %rsp, %rdi
movl $512, %esi # imm = 0x200
callq hipMalloc
movabsq $4294967297, %rdi # imm = 0x100000001
leaq 63(%rdi), %rdx
movl $1, %esi
movl $1, %ecx
xorl %r8d, %r8d
xorl %r9d, %r9d
callq __hipPushCallConfiguration
testl %eax, %eax
jne .LBB1_2
# %bb.1:
movq 8(%rsp), %rax
movq (%rsp), %rcx
movq %rax, 72(%rsp)
movq %rcx, 64(%rsp)
leaq 72(%rsp), %rax
movq %rax, 80(%rsp)
leaq 64(%rsp), %rax
movq %rax, 88(%rsp)
leaq 48(%rsp), %rdi
leaq 32(%rsp), %rsi
leaq 24(%rsp), %rdx
leaq 16(%rsp), %rcx
callq __hipPopCallConfiguration
movq 48(%rsp), %rsi
movl 56(%rsp), %edx
movq 32(%rsp), %rcx
movl 40(%rsp), %r8d
leaq 80(%rsp), %r9
movl $_Z7pairhmmP7AddressPi, %edi
pushq 16(%rsp)
.cfi_adjust_cfa_offset 8
pushq 32(%rsp)
.cfi_adjust_cfa_offset 8
callq hipLaunchKernel
addq $16, %rsp
.cfi_adjust_cfa_offset -16
.LBB1_2:
movq (%rsp), %rsi
movl $512, %edx # imm = 0x200
movq %rbx, %rdi
movl $2, %ecx
callq hipMemcpy
callq hipDeviceSynchronize
xorl %eax, %eax
addq $96, %rsp
.cfi_def_cfa_offset 16
popq %rbx
.cfi_def_cfa_offset 8
retq
.Lfunc_end1:
.size main, .Lfunc_end1-main
.cfi_endproc
# -- End function
.p2align 4, 0x90 # -- Begin function __hip_module_ctor
.type __hip_module_ctor,@function
__hip_module_ctor: # @__hip_module_ctor
.cfi_startproc
# %bb.0:
subq $40, %rsp
.cfi_def_cfa_offset 48
cmpq $0, __hip_gpubin_handle(%rip)
jne .LBB2_2
# %bb.1:
movl $__hip_fatbin_wrapper, %edi
callq __hipRegisterFatBinary
movq %rax, __hip_gpubin_handle(%rip)
.LBB2_2:
movq __hip_gpubin_handle(%rip), %rdi
xorps %xmm0, %xmm0
movups %xmm0, 16(%rsp)
movups %xmm0, (%rsp)
movl $_Z7pairhmmP7AddressPi, %esi
movl $.L__unnamed_1, %edx
movl $.L__unnamed_1, %ecx
movl $-1, %r8d
xorl %r9d, %r9d
callq __hipRegisterFunction
movl $__hip_module_dtor, %edi
addq $40, %rsp
.cfi_def_cfa_offset 8
jmp atexit # TAILCALL
.Lfunc_end2:
.size __hip_module_ctor, .Lfunc_end2-__hip_module_ctor
.cfi_endproc
# -- End function
.p2align 4, 0x90 # -- Begin function __hip_module_dtor
.type __hip_module_dtor,@function
__hip_module_dtor: # @__hip_module_dtor
.cfi_startproc
# %bb.0:
movq __hip_gpubin_handle(%rip), %rdi
testq %rdi, %rdi
je .LBB3_2
# %bb.1:
pushq %rax
.cfi_def_cfa_offset 16
callq __hipUnregisterFatBinary
movq $0, __hip_gpubin_handle(%rip)
addq $8, %rsp
.cfi_def_cfa_offset 8
.LBB3_2:
retq
.Lfunc_end3:
.size __hip_module_dtor, .Lfunc_end3-__hip_module_dtor
.cfi_endproc
# -- End function
.type _Z7pairhmmP7AddressPi,@object # @_Z7pairhmmP7AddressPi
.section .rodata,"a",@progbits
.globl _Z7pairhmmP7AddressPi
.p2align 3, 0x0
_Z7pairhmmP7AddressPi:
.quad _Z22__device_stub__pairhmmP7AddressPi
.size _Z7pairhmmP7AddressPi, 8
.type .L__unnamed_1,@object # @0
.section .rodata.str1.1,"aMS",@progbits,1
.L__unnamed_1:
.asciz "_Z7pairhmmP7AddressPi"
.size .L__unnamed_1, 22
.type __hip_fatbin_wrapper,@object # @__hip_fatbin_wrapper
.section .hipFatBinSegment,"a",@progbits
.p2align 3, 0x0
__hip_fatbin_wrapper:
.long 1212764230 # 0x48495046
.long 1 # 0x1
.quad __hip_fatbin
.quad 0
.size __hip_fatbin_wrapper, 24
.type __hip_gpubin_handle,@object # @__hip_gpubin_handle
.local __hip_gpubin_handle
.comm __hip_gpubin_handle,8,8
.section .init_array,"aw",@init_array
.p2align 3, 0x0
.quad __hip_module_ctor
.type __hip_cuid_,@object # @__hip_cuid_
.bss
.globl __hip_cuid_
__hip_cuid_:
.byte 0 # 0x0
.size __hip_cuid_, 1
.section ".linker-options","e",@llvm_linker_options
.ident "AMD clang version 18.0.0git (https://github.com/RadeonOpenCompute/llvm-project roc-6.3.2 25012 e5bf7e55c91490b07c49d8960fa7983d864936c4)"
.section ".note.GNU-stack","",@progbits
.addrsig
.addrsig_sym _Z22__device_stub__pairhmmP7AddressPi
.addrsig_sym __hip_module_ctor
.addrsig_sym __hip_module_dtor
.addrsig_sym _Z7pairhmmP7AddressPi
.addrsig_sym __hip_fatbin
.addrsig_sym __hip_fatbin_wrapper
.addrsig_sym __hip_cuid_ |
You are a helpful coding assistant specialized in converting from CUDA host assembly to AMD host assembly. | .file "tmpxft_001360e9_00000000-6_example.cudafe1.cpp"
.text
#APP
.globl _ZSt21ios_base_library_initv
#NO_APP
.type _ZL26__cudaUnregisterBinaryUtilv, @function
_ZL26__cudaUnregisterBinaryUtilv:
.LFB3672:
.cfi_startproc
endbr64
subq $8, %rsp
.cfi_def_cfa_offset 16
movq _ZL20__cudaFatCubinHandle(%rip), %rdi
call __cudaUnregisterFatBinary@PLT
addq $8, %rsp
.cfi_def_cfa_offset 8
ret
.cfi_endproc
.LFE3672:
.size _ZL26__cudaUnregisterBinaryUtilv, .-_ZL26__cudaUnregisterBinaryUtilv
.globl _Z35__device_stub__Z7pairhmmP7AddressPiP7AddressPi
.type _Z35__device_stub__Z7pairhmmP7AddressPiP7AddressPi, @function
_Z35__device_stub__Z7pairhmmP7AddressPiP7AddressPi:
.LFB3694:
.cfi_startproc
endbr64
subq $120, %rsp
.cfi_def_cfa_offset 128
movq %rdi, 8(%rsp)
movq %rsi, (%rsp)
movq %fs:40, %rax
movq %rax, 104(%rsp)
xorl %eax, %eax
leaq 8(%rsp), %rax
movq %rax, 80(%rsp)
movq %rsp, %rax
movq %rax, 88(%rsp)
movl $1, 32(%rsp)
movl $1, 36(%rsp)
movl $1, 40(%rsp)
movl $1, 44(%rsp)
movl $1, 48(%rsp)
movl $1, 52(%rsp)
leaq 24(%rsp), %rcx
leaq 16(%rsp), %rdx
leaq 44(%rsp), %rsi
leaq 32(%rsp), %rdi
call __cudaPopCallConfiguration@PLT
testl %eax, %eax
je .L7
.L3:
movq 104(%rsp), %rax
subq %fs:40, %rax
jne .L8
addq $120, %rsp
.cfi_remember_state
.cfi_def_cfa_offset 8
ret
.L7:
.cfi_restore_state
pushq 24(%rsp)
.cfi_def_cfa_offset 136
pushq 24(%rsp)
.cfi_def_cfa_offset 144
leaq 96(%rsp), %r9
movq 60(%rsp), %rcx
movl 68(%rsp), %r8d
movq 48(%rsp), %rsi
movl 56(%rsp), %edx
leaq _Z7pairhmmP7AddressPi(%rip), %rdi
call cudaLaunchKernel@PLT
addq $16, %rsp
.cfi_def_cfa_offset 128
jmp .L3
.L8:
call __stack_chk_fail@PLT
.cfi_endproc
.LFE3694:
.size _Z35__device_stub__Z7pairhmmP7AddressPiP7AddressPi, .-_Z35__device_stub__Z7pairhmmP7AddressPiP7AddressPi
.globl _Z7pairhmmP7AddressPi
.type _Z7pairhmmP7AddressPi, @function
_Z7pairhmmP7AddressPi:
.LFB3695:
.cfi_startproc
endbr64
subq $8, %rsp
.cfi_def_cfa_offset 16
call _Z35__device_stub__Z7pairhmmP7AddressPiP7AddressPi
addq $8, %rsp
.cfi_def_cfa_offset 8
ret
.cfi_endproc
.LFE3695:
.size _Z7pairhmmP7AddressPi, .-_Z7pairhmmP7AddressPi
.globl main
.type main, @function
main:
.LFB3669:
.cfi_startproc
endbr64
pushq %rbx
.cfi_def_cfa_offset 16
.cfi_offset 3, -16
subq $48, %rsp
.cfi_def_cfa_offset 64
movq %fs:40, %rax
movq %rax, 40(%rsp)
xorl %eax, %eax
movl $32, %edi
call malloc@PLT
movq %rax, %rbx
movl $2, (%rax)
movl $2, 4(%rax)
movl $4, 8(%rax)
movl $4, 12(%rax)
movl $6, 16(%rax)
movl $6, 20(%rax)
movl $8, 24(%rax)
movl $8, 28(%rax)
movq %rsp, %rdi
movl $400, %esi
call cudaMalloc@PLT
movl $1, %ecx
movl $32, %edx
movq %rbx, %rsi
movq (%rsp), %rdi
call cudaMemcpy@PLT
movl $512, %edi
call malloc@PLT
movq %rax, %rbx
leaq 8(%rsp), %rdi
movl $512, %esi
call cudaMalloc@PLT
movl $64, 28(%rsp)
movl $1, 32(%rsp)
movl $1, 16(%rsp)
movl $1, 20(%rsp)
movl $0, %r9d
movl $0, %r8d
movq 28(%rsp), %rdx
movl $1, %ecx
movq 16(%rsp), %rdi
movl $1, %esi
call __cudaPushCallConfiguration@PLT
testl %eax, %eax
je .L15
.L12:
movl $2, %ecx
movl $512, %edx
movq 8(%rsp), %rsi
movq %rbx, %rdi
call cudaMemcpy@PLT
call cudaDeviceSynchronize@PLT
movq 40(%rsp), %rax
subq %fs:40, %rax
jne .L16
movl $0, %eax
addq $48, %rsp
.cfi_remember_state
.cfi_def_cfa_offset 16
popq %rbx
.cfi_def_cfa_offset 8
ret
.L15:
.cfi_restore_state
movq 8(%rsp), %rsi
movq (%rsp), %rdi
call _Z35__device_stub__Z7pairhmmP7AddressPiP7AddressPi
jmp .L12
.L16:
call __stack_chk_fail@PLT
.cfi_endproc
.LFE3669:
.size main, .-main
.section .rodata.str1.1,"aMS",@progbits,1
.LC0:
.string "_Z7pairhmmP7AddressPi"
.text
.type _ZL24__sti____cudaRegisterAllv, @function
_ZL24__sti____cudaRegisterAllv:
.LFB3697:
.cfi_startproc
endbr64
subq $8, %rsp
.cfi_def_cfa_offset 16
leaq _ZL15__fatDeviceText(%rip), %rdi
call __cudaRegisterFatBinary@PLT
movq %rax, %rdi
movq %rax, _ZL20__cudaFatCubinHandle(%rip)
pushq $0
.cfi_def_cfa_offset 24
pushq $0
.cfi_def_cfa_offset 32
pushq $0
.cfi_def_cfa_offset 40
pushq $0
.cfi_def_cfa_offset 48
movl $0, %r9d
movl $-1, %r8d
leaq .LC0(%rip), %rdx
movq %rdx, %rcx
leaq _Z7pairhmmP7AddressPi(%rip), %rsi
call __cudaRegisterFunction@PLT
addq $32, %rsp
.cfi_def_cfa_offset 16
movq _ZL20__cudaFatCubinHandle(%rip), %rdi
call __cudaRegisterFatBinaryEnd@PLT
leaq _ZL26__cudaUnregisterBinaryUtilv(%rip), %rdi
call atexit@PLT
addq $8, %rsp
.cfi_def_cfa_offset 8
ret
.cfi_endproc
.LFE3697:
.size _ZL24__sti____cudaRegisterAllv, .-_ZL24__sti____cudaRegisterAllv
.section .init_array,"aw"
.align 8
.quad _ZL24__sti____cudaRegisterAllv
.section .nvFatBinSegment,"aw"
.align 8
.type _ZL15__fatDeviceText, @object
.size _ZL15__fatDeviceText, 24
_ZL15__fatDeviceText:
.long 1180844977
.long 1
.quad fatbinData
.quad 0
.local _ZL20__cudaFatCubinHandle
.comm _ZL20__cudaFatCubinHandle,8,8
.ident "GCC: (Ubuntu 13.3.0-6ubuntu2~24.04) 13.3.0"
.section .note.GNU-stack,"",@progbits
.section .note.gnu.property,"a"
.align 8
.long 1f - 0f
.long 4f - 1f
.long 5
0:
.string "GNU"
1:
.align 8
.long 0xc0000002
.long 3f - 2f
2:
.long 0x3
3:
.align 8
4: | .text
.file "example.hip"
# Start of file scope inline assembly
.globl _ZSt21ios_base_library_initv
# End of file scope inline assembly
.globl _Z22__device_stub__pairhmmP7AddressPi # -- Begin function _Z22__device_stub__pairhmmP7AddressPi
.p2align 4, 0x90
.type _Z22__device_stub__pairhmmP7AddressPi,@function
_Z22__device_stub__pairhmmP7AddressPi: # @_Z22__device_stub__pairhmmP7AddressPi
.cfi_startproc
# %bb.0:
subq $88, %rsp
.cfi_def_cfa_offset 96
movq %rdi, 56(%rsp)
movq %rsi, 48(%rsp)
leaq 56(%rsp), %rax
movq %rax, 64(%rsp)
leaq 48(%rsp), %rax
movq %rax, 72(%rsp)
leaq 32(%rsp), %rdi
leaq 16(%rsp), %rsi
leaq 8(%rsp), %rdx
movq %rsp, %rcx
callq __hipPopCallConfiguration
movq 32(%rsp), %rsi
movl 40(%rsp), %edx
movq 16(%rsp), %rcx
movl 24(%rsp), %r8d
leaq 64(%rsp), %r9
movl $_Z7pairhmmP7AddressPi, %edi
pushq (%rsp)
.cfi_adjust_cfa_offset 8
pushq 16(%rsp)
.cfi_adjust_cfa_offset 8
callq hipLaunchKernel
addq $104, %rsp
.cfi_adjust_cfa_offset -104
retq
.Lfunc_end0:
.size _Z22__device_stub__pairhmmP7AddressPi, .Lfunc_end0-_Z22__device_stub__pairhmmP7AddressPi
.cfi_endproc
# -- End function
.section .rodata.cst16,"aM",@progbits,16
.p2align 4, 0x0 # -- Begin function main
.LCPI1_0:
.long 2 # 0x2
.long 2 # 0x2
.long 4 # 0x4
.long 4 # 0x4
.LCPI1_1:
.long 6 # 0x6
.long 6 # 0x6
.long 8 # 0x8
.long 8 # 0x8
.text
.globl main
.p2align 4, 0x90
.type main,@function
main: # @main
.cfi_startproc
# %bb.0:
pushq %rbx
.cfi_def_cfa_offset 16
subq $96, %rsp
.cfi_def_cfa_offset 112
.cfi_offset %rbx, -16
movl $32, %edi
callq malloc
movq %rax, %rbx
movaps .LCPI1_0(%rip), %xmm0 # xmm0 = [2,2,4,4]
movups %xmm0, (%rax)
movaps .LCPI1_1(%rip), %xmm0 # xmm0 = [6,6,8,8]
movups %xmm0, 16(%rax)
leaq 8(%rsp), %rdi
movl $400, %esi # imm = 0x190
callq hipMalloc
movq 8(%rsp), %rdi
movl $32, %edx
movq %rbx, %rsi
movl $1, %ecx
callq hipMemcpy
movl $512, %edi # imm = 0x200
callq malloc
movq %rax, %rbx
movq %rsp, %rdi
movl $512, %esi # imm = 0x200
callq hipMalloc
movabsq $4294967297, %rdi # imm = 0x100000001
leaq 63(%rdi), %rdx
movl $1, %esi
movl $1, %ecx
xorl %r8d, %r8d
xorl %r9d, %r9d
callq __hipPushCallConfiguration
testl %eax, %eax
jne .LBB1_2
# %bb.1:
movq 8(%rsp), %rax
movq (%rsp), %rcx
movq %rax, 72(%rsp)
movq %rcx, 64(%rsp)
leaq 72(%rsp), %rax
movq %rax, 80(%rsp)
leaq 64(%rsp), %rax
movq %rax, 88(%rsp)
leaq 48(%rsp), %rdi
leaq 32(%rsp), %rsi
leaq 24(%rsp), %rdx
leaq 16(%rsp), %rcx
callq __hipPopCallConfiguration
movq 48(%rsp), %rsi
movl 56(%rsp), %edx
movq 32(%rsp), %rcx
movl 40(%rsp), %r8d
leaq 80(%rsp), %r9
movl $_Z7pairhmmP7AddressPi, %edi
pushq 16(%rsp)
.cfi_adjust_cfa_offset 8
pushq 32(%rsp)
.cfi_adjust_cfa_offset 8
callq hipLaunchKernel
addq $16, %rsp
.cfi_adjust_cfa_offset -16
.LBB1_2:
movq (%rsp), %rsi
movl $512, %edx # imm = 0x200
movq %rbx, %rdi
movl $2, %ecx
callq hipMemcpy
callq hipDeviceSynchronize
xorl %eax, %eax
addq $96, %rsp
.cfi_def_cfa_offset 16
popq %rbx
.cfi_def_cfa_offset 8
retq
.Lfunc_end1:
.size main, .Lfunc_end1-main
.cfi_endproc
# -- End function
.p2align 4, 0x90 # -- Begin function __hip_module_ctor
.type __hip_module_ctor,@function
__hip_module_ctor: # @__hip_module_ctor
.cfi_startproc
# %bb.0:
subq $40, %rsp
.cfi_def_cfa_offset 48
cmpq $0, __hip_gpubin_handle(%rip)
jne .LBB2_2
# %bb.1:
movl $__hip_fatbin_wrapper, %edi
callq __hipRegisterFatBinary
movq %rax, __hip_gpubin_handle(%rip)
.LBB2_2:
movq __hip_gpubin_handle(%rip), %rdi
xorps %xmm0, %xmm0
movups %xmm0, 16(%rsp)
movups %xmm0, (%rsp)
movl $_Z7pairhmmP7AddressPi, %esi
movl $.L__unnamed_1, %edx
movl $.L__unnamed_1, %ecx
movl $-1, %r8d
xorl %r9d, %r9d
callq __hipRegisterFunction
movl $__hip_module_dtor, %edi
addq $40, %rsp
.cfi_def_cfa_offset 8
jmp atexit # TAILCALL
.Lfunc_end2:
.size __hip_module_ctor, .Lfunc_end2-__hip_module_ctor
.cfi_endproc
# -- End function
.p2align 4, 0x90 # -- Begin function __hip_module_dtor
.type __hip_module_dtor,@function
__hip_module_dtor: # @__hip_module_dtor
.cfi_startproc
# %bb.0:
movq __hip_gpubin_handle(%rip), %rdi
testq %rdi, %rdi
je .LBB3_2
# %bb.1:
pushq %rax
.cfi_def_cfa_offset 16
callq __hipUnregisterFatBinary
movq $0, __hip_gpubin_handle(%rip)
addq $8, %rsp
.cfi_def_cfa_offset 8
.LBB3_2:
retq
.Lfunc_end3:
.size __hip_module_dtor, .Lfunc_end3-__hip_module_dtor
.cfi_endproc
# -- End function
.type _Z7pairhmmP7AddressPi,@object # @_Z7pairhmmP7AddressPi
.section .rodata,"a",@progbits
.globl _Z7pairhmmP7AddressPi
.p2align 3, 0x0
_Z7pairhmmP7AddressPi:
.quad _Z22__device_stub__pairhmmP7AddressPi
.size _Z7pairhmmP7AddressPi, 8
.type .L__unnamed_1,@object # @0
.section .rodata.str1.1,"aMS",@progbits,1
.L__unnamed_1:
.asciz "_Z7pairhmmP7AddressPi"
.size .L__unnamed_1, 22
.type __hip_fatbin_wrapper,@object # @__hip_fatbin_wrapper
.section .hipFatBinSegment,"a",@progbits
.p2align 3, 0x0
__hip_fatbin_wrapper:
.long 1212764230 # 0x48495046
.long 1 # 0x1
.quad __hip_fatbin
.quad 0
.size __hip_fatbin_wrapper, 24
.type __hip_gpubin_handle,@object # @__hip_gpubin_handle
.local __hip_gpubin_handle
.comm __hip_gpubin_handle,8,8
.section .init_array,"aw",@init_array
.p2align 3, 0x0
.quad __hip_module_ctor
.type __hip_cuid_,@object # @__hip_cuid_
.bss
.globl __hip_cuid_
__hip_cuid_:
.byte 0 # 0x0
.size __hip_cuid_, 1
.section ".linker-options","e",@llvm_linker_options
.ident "AMD clang version 18.0.0git (https://github.com/RadeonOpenCompute/llvm-project roc-6.3.2 25012 e5bf7e55c91490b07c49d8960fa7983d864936c4)"
.section ".note.GNU-stack","",@progbits
.addrsig
.addrsig_sym _Z22__device_stub__pairhmmP7AddressPi
.addrsig_sym __hip_module_ctor
.addrsig_sym __hip_module_dtor
.addrsig_sym _Z7pairhmmP7AddressPi
.addrsig_sym __hip_fatbin
.addrsig_sym __hip_fatbin_wrapper
.addrsig_sym __hip_cuid_ |
You are a helpful coding assistant specialized in converting CUDA source code to CUDA device assembly. | #include "includes.h"
__global__ void sync_ssim_conv_groups() { } | code for sm_80
Function : _Z21sync_ssim_conv_groupsv
.headerflags @"EF_CUDA_TEXMODE_UNIFIED EF_CUDA_64BIT_ADDRESS EF_CUDA_SM80 EF_CUDA_VIRTUAL_SM(EF_CUDA_SM80)"
/*0000*/ MOV R1, c[0x0][0x28] ; /* 0x00000a0000017a02 */
/* 0x000fe40000000f00 */
/*0010*/ EXIT ; /* 0x000000000000794d */
/* 0x000fea0003800000 */
/*0020*/ BRA 0x20; /* 0xfffffff000007947 */
/* 0x000fc0000383ffff */
/*0030*/ NOP; /* 0x0000000000007918 */
/* 0x000fc00000000000 */
/*0040*/ NOP; /* 0x0000000000007918 */
/* 0x000fc00000000000 */
/*0050*/ NOP; /* 0x0000000000007918 */
/* 0x000fc00000000000 */
/*0060*/ NOP; /* 0x0000000000007918 */
/* 0x000fc00000000000 */
/*0070*/ NOP; /* 0x0000000000007918 */
/* 0x000fc00000000000 */
/*0080*/ NOP; /* 0x0000000000007918 */
/* 0x000fc00000000000 */
/*0090*/ NOP; /* 0x0000000000007918 */
/* 0x000fc00000000000 */
/*00a0*/ NOP; /* 0x0000000000007918 */
/* 0x000fc00000000000 */
/*00b0*/ NOP; /* 0x0000000000007918 */
/* 0x000fc00000000000 */
/*00c0*/ NOP; /* 0x0000000000007918 */
/* 0x000fc00000000000 */
/*00d0*/ NOP; /* 0x0000000000007918 */
/* 0x000fc00000000000 */
/*00e0*/ NOP; /* 0x0000000000007918 */
/* 0x000fc00000000000 */
/*00f0*/ NOP; /* 0x0000000000007918 */
/* 0x000fc00000000000 */
.......... |
You are a helpful coding assistant specialized in converting CUDA source code to CUDA host assembly. | #include "includes.h"
__global__ void sync_ssim_conv_groups() { } | .file "tmpxft_00009cb6_00000000-6_sync_ssim_conv_groups.cudafe1.cpp"
.text
#APP
#NO_APP
.type _ZL26__cudaUnregisterBinaryUtilv, @function
_ZL26__cudaUnregisterBinaryUtilv:
.LFB2029:
.cfi_startproc
endbr64
subq $8, %rsp
.cfi_def_cfa_offset 16
movq _ZL20__cudaFatCubinHandle(%rip), %rdi
call __cudaUnregisterFatBinary@PLT
addq $8, %rsp
.cfi_def_cfa_offset 8
ret
.cfi_endproc
.LFE2029:
.size _ZL26__cudaUnregisterBinaryUtilv, .-_ZL26__cudaUnregisterBinaryUtilv
.globl _Z40__device_stub__Z21sync_ssim_conv_groupsvv
.type _Z40__device_stub__Z21sync_ssim_conv_groupsvv, @function
_Z40__device_stub__Z21sync_ssim_conv_groupsvv:
.LFB2051:
.cfi_startproc
endbr64
subq $88, %rsp
.cfi_def_cfa_offset 96
movq %fs:40, %rax
movq %rax, 72(%rsp)
xorl %eax, %eax
movl $1, 16(%rsp)
movl $1, 20(%rsp)
movl $1, 24(%rsp)
movl $1, 28(%rsp)
movl $1, 32(%rsp)
movl $1, 36(%rsp)
leaq 8(%rsp), %rcx
movq %rsp, %rdx
leaq 28(%rsp), %rsi
leaq 16(%rsp), %rdi
call __cudaPopCallConfiguration@PLT
testl %eax, %eax
je .L7
.L3:
movq 72(%rsp), %rax
subq %fs:40, %rax
jne .L8
addq $88, %rsp
.cfi_remember_state
.cfi_def_cfa_offset 8
ret
.L7:
.cfi_restore_state
pushq 8(%rsp)
.cfi_def_cfa_offset 104
pushq 8(%rsp)
.cfi_def_cfa_offset 112
leaq 80(%rsp), %r9
movq 44(%rsp), %rcx
movl 52(%rsp), %r8d
movq 32(%rsp), %rsi
movl 40(%rsp), %edx
leaq _Z21sync_ssim_conv_groupsv(%rip), %rdi
call cudaLaunchKernel@PLT
addq $16, %rsp
.cfi_def_cfa_offset 96
jmp .L3
.L8:
call __stack_chk_fail@PLT
.cfi_endproc
.LFE2051:
.size _Z40__device_stub__Z21sync_ssim_conv_groupsvv, .-_Z40__device_stub__Z21sync_ssim_conv_groupsvv
.globl _Z21sync_ssim_conv_groupsv
.type _Z21sync_ssim_conv_groupsv, @function
_Z21sync_ssim_conv_groupsv:
.LFB2052:
.cfi_startproc
endbr64
subq $8, %rsp
.cfi_def_cfa_offset 16
call _Z40__device_stub__Z21sync_ssim_conv_groupsvv
addq $8, %rsp
.cfi_def_cfa_offset 8
ret
.cfi_endproc
.LFE2052:
.size _Z21sync_ssim_conv_groupsv, .-_Z21sync_ssim_conv_groupsv
.section .rodata.str1.1,"aMS",@progbits,1
.LC0:
.string "_Z21sync_ssim_conv_groupsv"
.text
.type _ZL24__sti____cudaRegisterAllv, @function
_ZL24__sti____cudaRegisterAllv:
.LFB2054:
.cfi_startproc
endbr64
subq $8, %rsp
.cfi_def_cfa_offset 16
leaq _ZL15__fatDeviceText(%rip), %rdi
call __cudaRegisterFatBinary@PLT
movq %rax, %rdi
movq %rax, _ZL20__cudaFatCubinHandle(%rip)
pushq $0
.cfi_def_cfa_offset 24
pushq $0
.cfi_def_cfa_offset 32
pushq $0
.cfi_def_cfa_offset 40
pushq $0
.cfi_def_cfa_offset 48
movl $0, %r9d
movl $-1, %r8d
leaq .LC0(%rip), %rdx
movq %rdx, %rcx
leaq _Z21sync_ssim_conv_groupsv(%rip), %rsi
call __cudaRegisterFunction@PLT
addq $32, %rsp
.cfi_def_cfa_offset 16
movq _ZL20__cudaFatCubinHandle(%rip), %rdi
call __cudaRegisterFatBinaryEnd@PLT
leaq _ZL26__cudaUnregisterBinaryUtilv(%rip), %rdi
call atexit@PLT
addq $8, %rsp
.cfi_def_cfa_offset 8
ret
.cfi_endproc
.LFE2054:
.size _ZL24__sti____cudaRegisterAllv, .-_ZL24__sti____cudaRegisterAllv
.section .init_array,"aw"
.align 8
.quad _ZL24__sti____cudaRegisterAllv
.section .nvFatBinSegment,"aw"
.align 8
.type _ZL15__fatDeviceText, @object
.size _ZL15__fatDeviceText, 24
_ZL15__fatDeviceText:
.long 1180844977
.long 1
.quad fatbinData
.quad 0
.local _ZL20__cudaFatCubinHandle
.comm _ZL20__cudaFatCubinHandle,8,8
.ident "GCC: (Ubuntu 13.3.0-6ubuntu2~24.04) 13.3.0"
.section .note.GNU-stack,"",@progbits
.section .note.gnu.property,"a"
.align 8
.long 1f - 0f
.long 4f - 1f
.long 5
0:
.string "GNU"
1:
.align 8
.long 0xc0000002
.long 3f - 2f
2:
.long 0x3
3:
.align 8
4: |
You are a helpful coding assistant specialized in converting CUDA source code to HIP/AMD source code. | #include "includes.h"
__global__ void sync_ssim_conv_groups() { } | #include <hip/hip_runtime.h>
#include "includes.h"
__global__ void sync_ssim_conv_groups() { } |
You are a helpful coding assistant specialized in converting HIP source code to AMD device assembly. | #include <hip/hip_runtime.h>
#include "includes.h"
__global__ void sync_ssim_conv_groups() { } | .text
.amdgcn_target "amdgcn-amd-amdhsa--gfx1100"
.protected _Z21sync_ssim_conv_groupsv
.globl _Z21sync_ssim_conv_groupsv
.p2align 8
.type _Z21sync_ssim_conv_groupsv,@function
_Z21sync_ssim_conv_groupsv:
s_endpgm
.section .rodata,"a",@progbits
.p2align 6, 0x0
.amdhsa_kernel _Z21sync_ssim_conv_groupsv
.amdhsa_group_segment_fixed_size 0
.amdhsa_private_segment_fixed_size 0
.amdhsa_kernarg_size 0
.amdhsa_user_sgpr_count 15
.amdhsa_user_sgpr_dispatch_ptr 0
.amdhsa_user_sgpr_queue_ptr 0
.amdhsa_user_sgpr_kernarg_segment_ptr 0
.amdhsa_user_sgpr_dispatch_id 0
.amdhsa_user_sgpr_private_segment_size 0
.amdhsa_wavefront_size32 1
.amdhsa_uses_dynamic_stack 0
.amdhsa_enable_private_segment 0
.amdhsa_system_sgpr_workgroup_id_x 1
.amdhsa_system_sgpr_workgroup_id_y 0
.amdhsa_system_sgpr_workgroup_id_z 0
.amdhsa_system_sgpr_workgroup_info 0
.amdhsa_system_vgpr_workitem_id 0
.amdhsa_next_free_vgpr 1
.amdhsa_next_free_sgpr 1
.amdhsa_reserve_vcc 0
.amdhsa_float_round_mode_32 0
.amdhsa_float_round_mode_16_64 0
.amdhsa_float_denorm_mode_32 3
.amdhsa_float_denorm_mode_16_64 3
.amdhsa_dx10_clamp 1
.amdhsa_ieee_mode 1
.amdhsa_fp16_overflow 0
.amdhsa_workgroup_processor_mode 1
.amdhsa_memory_ordered 1
.amdhsa_forward_progress 0
.amdhsa_shared_vgpr_count 0
.amdhsa_exception_fp_ieee_invalid_op 0
.amdhsa_exception_fp_denorm_src 0
.amdhsa_exception_fp_ieee_div_zero 0
.amdhsa_exception_fp_ieee_overflow 0
.amdhsa_exception_fp_ieee_underflow 0
.amdhsa_exception_fp_ieee_inexact 0
.amdhsa_exception_int_div_zero 0
.end_amdhsa_kernel
.text
.Lfunc_end0:
.size _Z21sync_ssim_conv_groupsv, .Lfunc_end0-_Z21sync_ssim_conv_groupsv
.section .AMDGPU.csdata,"",@progbits
.text
.p2alignl 7, 3214868480
.fill 96, 4, 3214868480
.type __hip_cuid_,@object
.section .bss,"aw",@nobits
.globl __hip_cuid_
__hip_cuid_:
.byte 0
.size __hip_cuid_, 1
.ident "AMD clang version 18.0.0git (https://github.com/RadeonOpenCompute/llvm-project roc-6.3.2 25012 e5bf7e55c91490b07c49d8960fa7983d864936c4)"
.section ".note.GNU-stack","",@progbits
.addrsig
.addrsig_sym __hip_cuid_
.amdgpu_metadata
---
amdhsa.kernels:
- .args: []
.group_segment_fixed_size: 0
.kernarg_segment_align: 4
.kernarg_segment_size: 0
.language: OpenCL C
.language_version:
- 2
- 0
.max_flat_workgroup_size: 1024
.name: _Z21sync_ssim_conv_groupsv
.private_segment_fixed_size: 0
.sgpr_count: 0
.sgpr_spill_count: 0
.symbol: _Z21sync_ssim_conv_groupsv.kd
.uniform_work_group_size: 1
.uses_dynamic_stack: false
.vgpr_count: 0
.vgpr_spill_count: 0
.wavefront_size: 32
.workgroup_processor_mode: 1
amdhsa.target: amdgcn-amd-amdhsa--gfx1100
amdhsa.version:
- 1
- 2
...
.end_amdgpu_metadata |
You are a helpful coding assistant specialized in converting HIP source code to AMD host assembly. | #include <hip/hip_runtime.h>
#include "includes.h"
__global__ void sync_ssim_conv_groups() { } | .text
.file "sync_ssim_conv_groups.hip"
.globl _Z36__device_stub__sync_ssim_conv_groupsv # -- Begin function _Z36__device_stub__sync_ssim_conv_groupsv
.p2align 4, 0x90
.type _Z36__device_stub__sync_ssim_conv_groupsv,@function
_Z36__device_stub__sync_ssim_conv_groupsv: # @_Z36__device_stub__sync_ssim_conv_groupsv
.cfi_startproc
# %bb.0:
subq $56, %rsp
.cfi_def_cfa_offset 64
leaq 32(%rsp), %rdi
leaq 16(%rsp), %rsi
leaq 8(%rsp), %rdx
movq %rsp, %rcx
callq __hipPopCallConfiguration
movq 32(%rsp), %rsi
movl 40(%rsp), %edx
movq 16(%rsp), %rcx
movl 24(%rsp), %r8d
leaq 48(%rsp), %r9
movl $_Z21sync_ssim_conv_groupsv, %edi
pushq (%rsp)
.cfi_adjust_cfa_offset 8
pushq 16(%rsp)
.cfi_adjust_cfa_offset 8
callq hipLaunchKernel
addq $72, %rsp
.cfi_adjust_cfa_offset -72
retq
.Lfunc_end0:
.size _Z36__device_stub__sync_ssim_conv_groupsv, .Lfunc_end0-_Z36__device_stub__sync_ssim_conv_groupsv
.cfi_endproc
# -- End function
.p2align 4, 0x90 # -- Begin function __hip_module_ctor
.type __hip_module_ctor,@function
__hip_module_ctor: # @__hip_module_ctor
.cfi_startproc
# %bb.0:
subq $40, %rsp
.cfi_def_cfa_offset 48
cmpq $0, __hip_gpubin_handle(%rip)
jne .LBB1_2
# %bb.1:
movl $__hip_fatbin_wrapper, %edi
callq __hipRegisterFatBinary
movq %rax, __hip_gpubin_handle(%rip)
.LBB1_2:
movq __hip_gpubin_handle(%rip), %rdi
xorps %xmm0, %xmm0
movups %xmm0, 16(%rsp)
movups %xmm0, (%rsp)
movl $_Z21sync_ssim_conv_groupsv, %esi
movl $.L__unnamed_1, %edx
movl $.L__unnamed_1, %ecx
movl $-1, %r8d
xorl %r9d, %r9d
callq __hipRegisterFunction
movl $__hip_module_dtor, %edi
addq $40, %rsp
.cfi_def_cfa_offset 8
jmp atexit # TAILCALL
.Lfunc_end1:
.size __hip_module_ctor, .Lfunc_end1-__hip_module_ctor
.cfi_endproc
# -- End function
.p2align 4, 0x90 # -- Begin function __hip_module_dtor
.type __hip_module_dtor,@function
__hip_module_dtor: # @__hip_module_dtor
.cfi_startproc
# %bb.0:
movq __hip_gpubin_handle(%rip), %rdi
testq %rdi, %rdi
je .LBB2_2
# %bb.1:
pushq %rax
.cfi_def_cfa_offset 16
callq __hipUnregisterFatBinary
movq $0, __hip_gpubin_handle(%rip)
addq $8, %rsp
.cfi_def_cfa_offset 8
.LBB2_2:
retq
.Lfunc_end2:
.size __hip_module_dtor, .Lfunc_end2-__hip_module_dtor
.cfi_endproc
# -- End function
.type _Z21sync_ssim_conv_groupsv,@object # @_Z21sync_ssim_conv_groupsv
.section .rodata,"a",@progbits
.globl _Z21sync_ssim_conv_groupsv
.p2align 3, 0x0
_Z21sync_ssim_conv_groupsv:
.quad _Z36__device_stub__sync_ssim_conv_groupsv
.size _Z21sync_ssim_conv_groupsv, 8
.type .L__unnamed_1,@object # @0
.section .rodata.str1.1,"aMS",@progbits,1
.L__unnamed_1:
.asciz "_Z21sync_ssim_conv_groupsv"
.size .L__unnamed_1, 27
.type __hip_fatbin_wrapper,@object # @__hip_fatbin_wrapper
.section .hipFatBinSegment,"a",@progbits
.p2align 3, 0x0
__hip_fatbin_wrapper:
.long 1212764230 # 0x48495046
.long 1 # 0x1
.quad __hip_fatbin
.quad 0
.size __hip_fatbin_wrapper, 24
.type __hip_gpubin_handle,@object # @__hip_gpubin_handle
.local __hip_gpubin_handle
.comm __hip_gpubin_handle,8,8
.section .init_array,"aw",@init_array
.p2align 3, 0x0
.quad __hip_module_ctor
.type __hip_cuid_,@object # @__hip_cuid_
.bss
.globl __hip_cuid_
__hip_cuid_:
.byte 0 # 0x0
.size __hip_cuid_, 1
.section ".linker-options","e",@llvm_linker_options
.ident "AMD clang version 18.0.0git (https://github.com/RadeonOpenCompute/llvm-project roc-6.3.2 25012 e5bf7e55c91490b07c49d8960fa7983d864936c4)"
.section ".note.GNU-stack","",@progbits
.addrsig
.addrsig_sym _Z36__device_stub__sync_ssim_conv_groupsv
.addrsig_sym __hip_module_ctor
.addrsig_sym __hip_module_dtor
.addrsig_sym _Z21sync_ssim_conv_groupsv
.addrsig_sym __hip_fatbin
.addrsig_sym __hip_fatbin_wrapper
.addrsig_sym __hip_cuid_ |
You are a helpful coding assistant specialized in converting from CUDA device assembly to AMD device assembly. | code for sm_80
Function : _Z21sync_ssim_conv_groupsv
.headerflags @"EF_CUDA_TEXMODE_UNIFIED EF_CUDA_64BIT_ADDRESS EF_CUDA_SM80 EF_CUDA_VIRTUAL_SM(EF_CUDA_SM80)"
/*0000*/ MOV R1, c[0x0][0x28] ; /* 0x00000a0000017a02 */
/* 0x000fe40000000f00 */
/*0010*/ EXIT ; /* 0x000000000000794d */
/* 0x000fea0003800000 */
/*0020*/ BRA 0x20; /* 0xfffffff000007947 */
/* 0x000fc0000383ffff */
/*0030*/ NOP; /* 0x0000000000007918 */
/* 0x000fc00000000000 */
/*0040*/ NOP; /* 0x0000000000007918 */
/* 0x000fc00000000000 */
/*0050*/ NOP; /* 0x0000000000007918 */
/* 0x000fc00000000000 */
/*0060*/ NOP; /* 0x0000000000007918 */
/* 0x000fc00000000000 */
/*0070*/ NOP; /* 0x0000000000007918 */
/* 0x000fc00000000000 */
/*0080*/ NOP; /* 0x0000000000007918 */
/* 0x000fc00000000000 */
/*0090*/ NOP; /* 0x0000000000007918 */
/* 0x000fc00000000000 */
/*00a0*/ NOP; /* 0x0000000000007918 */
/* 0x000fc00000000000 */
/*00b0*/ NOP; /* 0x0000000000007918 */
/* 0x000fc00000000000 */
/*00c0*/ NOP; /* 0x0000000000007918 */
/* 0x000fc00000000000 */
/*00d0*/ NOP; /* 0x0000000000007918 */
/* 0x000fc00000000000 */
/*00e0*/ NOP; /* 0x0000000000007918 */
/* 0x000fc00000000000 */
/*00f0*/ NOP; /* 0x0000000000007918 */
/* 0x000fc00000000000 */
.......... | .text
.amdgcn_target "amdgcn-amd-amdhsa--gfx1100"
.protected _Z21sync_ssim_conv_groupsv
.globl _Z21sync_ssim_conv_groupsv
.p2align 8
.type _Z21sync_ssim_conv_groupsv,@function
_Z21sync_ssim_conv_groupsv:
s_endpgm
.section .rodata,"a",@progbits
.p2align 6, 0x0
.amdhsa_kernel _Z21sync_ssim_conv_groupsv
.amdhsa_group_segment_fixed_size 0
.amdhsa_private_segment_fixed_size 0
.amdhsa_kernarg_size 0
.amdhsa_user_sgpr_count 15
.amdhsa_user_sgpr_dispatch_ptr 0
.amdhsa_user_sgpr_queue_ptr 0
.amdhsa_user_sgpr_kernarg_segment_ptr 0
.amdhsa_user_sgpr_dispatch_id 0
.amdhsa_user_sgpr_private_segment_size 0
.amdhsa_wavefront_size32 1
.amdhsa_uses_dynamic_stack 0
.amdhsa_enable_private_segment 0
.amdhsa_system_sgpr_workgroup_id_x 1
.amdhsa_system_sgpr_workgroup_id_y 0
.amdhsa_system_sgpr_workgroup_id_z 0
.amdhsa_system_sgpr_workgroup_info 0
.amdhsa_system_vgpr_workitem_id 0
.amdhsa_next_free_vgpr 1
.amdhsa_next_free_sgpr 1
.amdhsa_reserve_vcc 0
.amdhsa_float_round_mode_32 0
.amdhsa_float_round_mode_16_64 0
.amdhsa_float_denorm_mode_32 3
.amdhsa_float_denorm_mode_16_64 3
.amdhsa_dx10_clamp 1
.amdhsa_ieee_mode 1
.amdhsa_fp16_overflow 0
.amdhsa_workgroup_processor_mode 1
.amdhsa_memory_ordered 1
.amdhsa_forward_progress 0
.amdhsa_shared_vgpr_count 0
.amdhsa_exception_fp_ieee_invalid_op 0
.amdhsa_exception_fp_denorm_src 0
.amdhsa_exception_fp_ieee_div_zero 0
.amdhsa_exception_fp_ieee_overflow 0
.amdhsa_exception_fp_ieee_underflow 0
.amdhsa_exception_fp_ieee_inexact 0
.amdhsa_exception_int_div_zero 0
.end_amdhsa_kernel
.text
.Lfunc_end0:
.size _Z21sync_ssim_conv_groupsv, .Lfunc_end0-_Z21sync_ssim_conv_groupsv
.section .AMDGPU.csdata,"",@progbits
.text
.p2alignl 7, 3214868480
.fill 96, 4, 3214868480
.type __hip_cuid_,@object
.section .bss,"aw",@nobits
.globl __hip_cuid_
__hip_cuid_:
.byte 0
.size __hip_cuid_, 1
.ident "AMD clang version 18.0.0git (https://github.com/RadeonOpenCompute/llvm-project roc-6.3.2 25012 e5bf7e55c91490b07c49d8960fa7983d864936c4)"
.section ".note.GNU-stack","",@progbits
.addrsig
.addrsig_sym __hip_cuid_
.amdgpu_metadata
---
amdhsa.kernels:
- .args: []
.group_segment_fixed_size: 0
.kernarg_segment_align: 4
.kernarg_segment_size: 0
.language: OpenCL C
.language_version:
- 2
- 0
.max_flat_workgroup_size: 1024
.name: _Z21sync_ssim_conv_groupsv
.private_segment_fixed_size: 0
.sgpr_count: 0
.sgpr_spill_count: 0
.symbol: _Z21sync_ssim_conv_groupsv.kd
.uniform_work_group_size: 1
.uses_dynamic_stack: false
.vgpr_count: 0
.vgpr_spill_count: 0
.wavefront_size: 32
.workgroup_processor_mode: 1
amdhsa.target: amdgcn-amd-amdhsa--gfx1100
amdhsa.version:
- 1
- 2
...
.end_amdgpu_metadata |
You are a helpful coding assistant specialized in converting from CUDA host assembly to AMD host assembly. | .file "tmpxft_00009cb6_00000000-6_sync_ssim_conv_groups.cudafe1.cpp"
.text
#APP
#NO_APP
.type _ZL26__cudaUnregisterBinaryUtilv, @function
_ZL26__cudaUnregisterBinaryUtilv:
.LFB2029:
.cfi_startproc
endbr64
subq $8, %rsp
.cfi_def_cfa_offset 16
movq _ZL20__cudaFatCubinHandle(%rip), %rdi
call __cudaUnregisterFatBinary@PLT
addq $8, %rsp
.cfi_def_cfa_offset 8
ret
.cfi_endproc
.LFE2029:
.size _ZL26__cudaUnregisterBinaryUtilv, .-_ZL26__cudaUnregisterBinaryUtilv
.globl _Z40__device_stub__Z21sync_ssim_conv_groupsvv
.type _Z40__device_stub__Z21sync_ssim_conv_groupsvv, @function
_Z40__device_stub__Z21sync_ssim_conv_groupsvv:
.LFB2051:
.cfi_startproc
endbr64
subq $88, %rsp
.cfi_def_cfa_offset 96
movq %fs:40, %rax
movq %rax, 72(%rsp)
xorl %eax, %eax
movl $1, 16(%rsp)
movl $1, 20(%rsp)
movl $1, 24(%rsp)
movl $1, 28(%rsp)
movl $1, 32(%rsp)
movl $1, 36(%rsp)
leaq 8(%rsp), %rcx
movq %rsp, %rdx
leaq 28(%rsp), %rsi
leaq 16(%rsp), %rdi
call __cudaPopCallConfiguration@PLT
testl %eax, %eax
je .L7
.L3:
movq 72(%rsp), %rax
subq %fs:40, %rax
jne .L8
addq $88, %rsp
.cfi_remember_state
.cfi_def_cfa_offset 8
ret
.L7:
.cfi_restore_state
pushq 8(%rsp)
.cfi_def_cfa_offset 104
pushq 8(%rsp)
.cfi_def_cfa_offset 112
leaq 80(%rsp), %r9
movq 44(%rsp), %rcx
movl 52(%rsp), %r8d
movq 32(%rsp), %rsi
movl 40(%rsp), %edx
leaq _Z21sync_ssim_conv_groupsv(%rip), %rdi
call cudaLaunchKernel@PLT
addq $16, %rsp
.cfi_def_cfa_offset 96
jmp .L3
.L8:
call __stack_chk_fail@PLT
.cfi_endproc
.LFE2051:
.size _Z40__device_stub__Z21sync_ssim_conv_groupsvv, .-_Z40__device_stub__Z21sync_ssim_conv_groupsvv
.globl _Z21sync_ssim_conv_groupsv
.type _Z21sync_ssim_conv_groupsv, @function
_Z21sync_ssim_conv_groupsv:
.LFB2052:
.cfi_startproc
endbr64
subq $8, %rsp
.cfi_def_cfa_offset 16
call _Z40__device_stub__Z21sync_ssim_conv_groupsvv
addq $8, %rsp
.cfi_def_cfa_offset 8
ret
.cfi_endproc
.LFE2052:
.size _Z21sync_ssim_conv_groupsv, .-_Z21sync_ssim_conv_groupsv
.section .rodata.str1.1,"aMS",@progbits,1
.LC0:
.string "_Z21sync_ssim_conv_groupsv"
.text
.type _ZL24__sti____cudaRegisterAllv, @function
_ZL24__sti____cudaRegisterAllv:
.LFB2054:
.cfi_startproc
endbr64
subq $8, %rsp
.cfi_def_cfa_offset 16
leaq _ZL15__fatDeviceText(%rip), %rdi
call __cudaRegisterFatBinary@PLT
movq %rax, %rdi
movq %rax, _ZL20__cudaFatCubinHandle(%rip)
pushq $0
.cfi_def_cfa_offset 24
pushq $0
.cfi_def_cfa_offset 32
pushq $0
.cfi_def_cfa_offset 40
pushq $0
.cfi_def_cfa_offset 48
movl $0, %r9d
movl $-1, %r8d
leaq .LC0(%rip), %rdx
movq %rdx, %rcx
leaq _Z21sync_ssim_conv_groupsv(%rip), %rsi
call __cudaRegisterFunction@PLT
addq $32, %rsp
.cfi_def_cfa_offset 16
movq _ZL20__cudaFatCubinHandle(%rip), %rdi
call __cudaRegisterFatBinaryEnd@PLT
leaq _ZL26__cudaUnregisterBinaryUtilv(%rip), %rdi
call atexit@PLT
addq $8, %rsp
.cfi_def_cfa_offset 8
ret
.cfi_endproc
.LFE2054:
.size _ZL24__sti____cudaRegisterAllv, .-_ZL24__sti____cudaRegisterAllv
.section .init_array,"aw"
.align 8
.quad _ZL24__sti____cudaRegisterAllv
.section .nvFatBinSegment,"aw"
.align 8
.type _ZL15__fatDeviceText, @object
.size _ZL15__fatDeviceText, 24
_ZL15__fatDeviceText:
.long 1180844977
.long 1
.quad fatbinData
.quad 0
.local _ZL20__cudaFatCubinHandle
.comm _ZL20__cudaFatCubinHandle,8,8
.ident "GCC: (Ubuntu 13.3.0-6ubuntu2~24.04) 13.3.0"
.section .note.GNU-stack,"",@progbits
.section .note.gnu.property,"a"
.align 8
.long 1f - 0f
.long 4f - 1f
.long 5
0:
.string "GNU"
1:
.align 8
.long 0xc0000002
.long 3f - 2f
2:
.long 0x3
3:
.align 8
4: | .text
.file "sync_ssim_conv_groups.hip"
.globl _Z36__device_stub__sync_ssim_conv_groupsv # -- Begin function _Z36__device_stub__sync_ssim_conv_groupsv
.p2align 4, 0x90
.type _Z36__device_stub__sync_ssim_conv_groupsv,@function
_Z36__device_stub__sync_ssim_conv_groupsv: # @_Z36__device_stub__sync_ssim_conv_groupsv
.cfi_startproc
# %bb.0:
subq $56, %rsp
.cfi_def_cfa_offset 64
leaq 32(%rsp), %rdi
leaq 16(%rsp), %rsi
leaq 8(%rsp), %rdx
movq %rsp, %rcx
callq __hipPopCallConfiguration
movq 32(%rsp), %rsi
movl 40(%rsp), %edx
movq 16(%rsp), %rcx
movl 24(%rsp), %r8d
leaq 48(%rsp), %r9
movl $_Z21sync_ssim_conv_groupsv, %edi
pushq (%rsp)
.cfi_adjust_cfa_offset 8
pushq 16(%rsp)
.cfi_adjust_cfa_offset 8
callq hipLaunchKernel
addq $72, %rsp
.cfi_adjust_cfa_offset -72
retq
.Lfunc_end0:
.size _Z36__device_stub__sync_ssim_conv_groupsv, .Lfunc_end0-_Z36__device_stub__sync_ssim_conv_groupsv
.cfi_endproc
# -- End function
.p2align 4, 0x90 # -- Begin function __hip_module_ctor
.type __hip_module_ctor,@function
__hip_module_ctor: # @__hip_module_ctor
.cfi_startproc
# %bb.0:
subq $40, %rsp
.cfi_def_cfa_offset 48
cmpq $0, __hip_gpubin_handle(%rip)
jne .LBB1_2
# %bb.1:
movl $__hip_fatbin_wrapper, %edi
callq __hipRegisterFatBinary
movq %rax, __hip_gpubin_handle(%rip)
.LBB1_2:
movq __hip_gpubin_handle(%rip), %rdi
xorps %xmm0, %xmm0
movups %xmm0, 16(%rsp)
movups %xmm0, (%rsp)
movl $_Z21sync_ssim_conv_groupsv, %esi
movl $.L__unnamed_1, %edx
movl $.L__unnamed_1, %ecx
movl $-1, %r8d
xorl %r9d, %r9d
callq __hipRegisterFunction
movl $__hip_module_dtor, %edi
addq $40, %rsp
.cfi_def_cfa_offset 8
jmp atexit # TAILCALL
.Lfunc_end1:
.size __hip_module_ctor, .Lfunc_end1-__hip_module_ctor
.cfi_endproc
# -- End function
.p2align 4, 0x90 # -- Begin function __hip_module_dtor
.type __hip_module_dtor,@function
__hip_module_dtor: # @__hip_module_dtor
.cfi_startproc
# %bb.0:
movq __hip_gpubin_handle(%rip), %rdi
testq %rdi, %rdi
je .LBB2_2
# %bb.1:
pushq %rax
.cfi_def_cfa_offset 16
callq __hipUnregisterFatBinary
movq $0, __hip_gpubin_handle(%rip)
addq $8, %rsp
.cfi_def_cfa_offset 8
.LBB2_2:
retq
.Lfunc_end2:
.size __hip_module_dtor, .Lfunc_end2-__hip_module_dtor
.cfi_endproc
# -- End function
.type _Z21sync_ssim_conv_groupsv,@object # @_Z21sync_ssim_conv_groupsv
.section .rodata,"a",@progbits
.globl _Z21sync_ssim_conv_groupsv
.p2align 3, 0x0
_Z21sync_ssim_conv_groupsv:
.quad _Z36__device_stub__sync_ssim_conv_groupsv
.size _Z21sync_ssim_conv_groupsv, 8
.type .L__unnamed_1,@object # @0
.section .rodata.str1.1,"aMS",@progbits,1
.L__unnamed_1:
.asciz "_Z21sync_ssim_conv_groupsv"
.size .L__unnamed_1, 27
.type __hip_fatbin_wrapper,@object # @__hip_fatbin_wrapper
.section .hipFatBinSegment,"a",@progbits
.p2align 3, 0x0
__hip_fatbin_wrapper:
.long 1212764230 # 0x48495046
.long 1 # 0x1
.quad __hip_fatbin
.quad 0
.size __hip_fatbin_wrapper, 24
.type __hip_gpubin_handle,@object # @__hip_gpubin_handle
.local __hip_gpubin_handle
.comm __hip_gpubin_handle,8,8
.section .init_array,"aw",@init_array
.p2align 3, 0x0
.quad __hip_module_ctor
.type __hip_cuid_,@object # @__hip_cuid_
.bss
.globl __hip_cuid_
__hip_cuid_:
.byte 0 # 0x0
.size __hip_cuid_, 1
.section ".linker-options","e",@llvm_linker_options
.ident "AMD clang version 18.0.0git (https://github.com/RadeonOpenCompute/llvm-project roc-6.3.2 25012 e5bf7e55c91490b07c49d8960fa7983d864936c4)"
.section ".note.GNU-stack","",@progbits
.addrsig
.addrsig_sym _Z36__device_stub__sync_ssim_conv_groupsv
.addrsig_sym __hip_module_ctor
.addrsig_sym __hip_module_dtor
.addrsig_sym _Z21sync_ssim_conv_groupsv
.addrsig_sym __hip_fatbin
.addrsig_sym __hip_fatbin_wrapper
.addrsig_sym __hip_cuid_ |
You are a helpful coding assistant specialized in converting CUDA source code to CUDA device assembly. | #include "cuda_runtime.h"
#include "device_launch_parameters.h"
#include <stdio.h>
#include <stdlib.h>
#include <string.h>
#include <time.h>
#include <math.h>
typedef unsigned long ulint;
typedef unsigned long long ulint64;
int banyakdata = 10240;
int dimensigrid = 80;
int dimensiblok = 128;
void modexp(ulint a, ulint b, ulint c, ulint* res) {
ulint64 s = a;
ulint64 ans = 1;
while (b != 0) {
if (b % 2 == 1) {
ans = ans * s % c;
b--;
}
b /= 2;
if (b != 0) {
s = s * s %c;
}
}
*res = ans;
}
void enkripsi(ulint g, ulint k, ulint p, ulint m, ulint y, ulint *res) {
modexp(g, k, p, res);
modexp(y, k, p, res + 1);
*(res + 1) = *(res + 1) * m % p;
}
void dekripsi(ulint a, ulint b, ulint p, ulint e, ulint *res) {
modexp(a, e, p, res);
*res = *res * b % p;
}
void kernelenk(ulint *m, ulint *k, ulint g, ulint p, ulint y, ulint *res) {
for (int i = 0; i < banyakdata; i++)
{
enkripsi(g, k[i], p, m[i], y, res + 2 * i);
}
}
void kerneldek(ulint *c, ulint p, ulint e, ulint *res) {
for (int i = 0; i < banyakdata; i++)
{
dekripsi(c[2*i], c[2*i+1], p, e, res + i);
}
}
void enkripsiCUDA(ulint *m, ulint *k, ulint g, ulint p, ulint y, ulint *res) {
clock_t begin = clock();
kernelenk(m,k,g,p,y,res);
clock_t end = clock();
double time_spent = (double)(end - begin);
printf("Durasi enkripsi: %f ms\n", time_spent/1000);
// printf("\n<<<<<<<<<<<<<<HASIL KE CPU>>>>>>>>>>>>>>>\n");
}
void dekripsiCUDA(ulint *c, ulint p, ulint e, ulint *res2) {
clock_t begin = clock();
kerneldek(c,p,e,res2);
clock_t end = clock();
double time_spent = (double)(end - begin);
printf("Durasi dekripsi: %f ms\n", time_spent/1000);
// printf("\n<<<<<<<<<<<<<<HASIL KE CPU>>>>>>>>>>>>>>>\n");
}
void initenkripsi(ulint *m, ulint *k) {
for (int i = 0; i < banyakdata; i++)
{
m[i] = 0;
}
FILE *file = fopen("plain.plain", "r");
char *code;
size_t n = 0;
int c;
code = (char*) malloc(9999999);
while ((c = fgetc(file)) != EOF)
{
code[n++] = (char) c;
}
code[n] = '\0';
char karakter = code[0];
int i = 0;
int indexpesan = -1;
while(karakter != '\0'){
karakter = code[i];
if(i % 3== 0){
indexpesan++;
m[indexpesan] += karakter * 1000000;
}else if(i % 3 ==1){
m[indexpesan] += karakter * 1000;
}else{
m[indexpesan] += karakter;
}
i++;
}
//printf("count : %d\n", indexpesan);
// nilai k //
srand(2018);
for (int i = 0; i < banyakdata; i++) {
k[i] = rand() % 3999999978;
}
}
ulint stringtolong(char* s){
ulint res = 0;
int i = 0;
while(s[i] != '\0'){
res *= 10;
res += s[i] - '0';
i++;
}
return res;
}
void initdekripsi(ulint *c) {
for (int i = 0; i < banyakdata*2; i++)
{
c[i] = 0;
}
char *buffer = 0;
long length;
FILE *f = fopen("cipher.cipher", "rb");
if (f)
{
fseek(f, 0, SEEK_END);
length = ftell(f);
fseek(f, 0, SEEK_SET);
buffer = (char*)malloc(length);
if (buffer) {
fread(buffer, 1, length, f);
}
buffer[length] = '\0';
fclose(f);
}
char delimstrip[2];
delimstrip[0] = 45;
delimstrip[1] = 0;
// Baca seluruh ciphertext
char *tempsplit;
tempsplit = strdup(strtok(buffer, delimstrip));
c[0] = stringtolong(tempsplit);
tempsplit = strdup(strtok(NULL, delimstrip));
c[1] = stringtolong(tempsplit);
// Baca m
for (int i = 1; i < banyakdata; i++) {
tempsplit = strdup(strtok(NULL, delimstrip));
c[2*i] = stringtolong(tempsplit);
tempsplit = strdup(strtok(NULL, delimstrip));
c[2*i+1] = stringtolong(tempsplit);
}
}
void initenkripsi2(ulint *m, ulint *k){
for (int i = 0; i < banyakdata; i++) {
m[i] = rand() % 3999999978;
k[i] = rand() % 3999999978;
}
}
void writecipher(ulint* c){
FILE *fp = fopen("cipher.cipher","w");
for (int i = 0; i < banyakdata*2; i++)
{
fprintf(fp, "%lu", c[i]);
fprintf(fp, "%c", '-');
}
fclose(fp);
}
void writedekrip(ulint* m){
FILE *fp = fopen("dekrip.dekrip","w");
for (int i = 0; i < banyakdata; i++)
{
ulint temp = m[i];
fprintf(fp, "%c", (unsigned char) (temp/1000000) );
fprintf(fp, "%c", (unsigned char) ((temp/1000) % 1000) );
fprintf(fp, "%c", (unsigned char) (temp % 1000));
}
fclose(fp);
}
int main(){
ulint *m, *k, *res, *res2, g, p, y, x, e, *res3;
m = (ulint*)malloc(banyakdata * sizeof(ulint));
k = (ulint*)malloc(banyakdata * sizeof(ulint));
res = (ulint*)malloc(banyakdata * 2 * sizeof(ulint));
res2 = (ulint*)malloc(banyakdata * sizeof(ulint));
res3 = (ulint*)malloc(banyakdata * 2 *sizeof(ulint));
srand(2018);
g = rand() % 3999999978;
p = 3999999979;
x = rand() % 3999999978;
modexp(g,x,p,&y);
initenkripsi(m, k);
//initenkripsi2(m, k);
// printf("<<<<<<<<<<<<<<Pesan Asli>>>>>>>>>>>>>>>\n");
// for (int i = 0; i < 4; i++) {
// printf("m[%d] = %lu\n", i, m[i]);
// }
// printf("m[...]\n");
// printf("m[%d] = %lu\n", banyakdata-1, m[banyakdata-1]);
enkripsiCUDA(m,k,g,p,y,res);
// printf("<<<<<<<<<<<<<<Hasil Enkripsi>>>>>>>>>>>>>>>\n");
// for (int i = 0; i < 4; i++) {
// printf("c[%d] = %lu c[%d] = %lu\n", 2*i, res[2*i], 2*i+1, res[2*i+1]);
// }
// printf("c ...\n");
// printf("c[%d] = %lu c[%d] = %lu\n", banyakdata * 2-2, res[banyakdata * 2-2], banyakdata *2-1,res[banyakdata*2-1]);
writecipher(res);
initdekripsi(res3);
e = p-x-1;
dekripsiCUDA(res3,p,e,res2);
// printf("<<<<<<<<<<<<<<Hasil Dekripsi>>>>>>>>>>>>>>>\n");
// for (int i = 0; i < 4; i++) {
// printf("m[%d] = %lu\n", i, res2[i]);
// }
// printf("m[...]\n");
// printf("m[%d] = %lu\n", banyakdata-1, res2[banyakdata-1]);
//writedekrip(res2);
free(m);
free(k);
free(res);
free(res2);
free(res3);
return 0;
} | code for sm_80 |
You are a helpful coding assistant specialized in converting CUDA source code to CUDA host assembly. | #include "cuda_runtime.h"
#include "device_launch_parameters.h"
#include <stdio.h>
#include <stdlib.h>
#include <string.h>
#include <time.h>
#include <math.h>
typedef unsigned long ulint;
typedef unsigned long long ulint64;
int banyakdata = 10240;
int dimensigrid = 80;
int dimensiblok = 128;
void modexp(ulint a, ulint b, ulint c, ulint* res) {
ulint64 s = a;
ulint64 ans = 1;
while (b != 0) {
if (b % 2 == 1) {
ans = ans * s % c;
b--;
}
b /= 2;
if (b != 0) {
s = s * s %c;
}
}
*res = ans;
}
void enkripsi(ulint g, ulint k, ulint p, ulint m, ulint y, ulint *res) {
modexp(g, k, p, res);
modexp(y, k, p, res + 1);
*(res + 1) = *(res + 1) * m % p;
}
void dekripsi(ulint a, ulint b, ulint p, ulint e, ulint *res) {
modexp(a, e, p, res);
*res = *res * b % p;
}
void kernelenk(ulint *m, ulint *k, ulint g, ulint p, ulint y, ulint *res) {
for (int i = 0; i < banyakdata; i++)
{
enkripsi(g, k[i], p, m[i], y, res + 2 * i);
}
}
void kerneldek(ulint *c, ulint p, ulint e, ulint *res) {
for (int i = 0; i < banyakdata; i++)
{
dekripsi(c[2*i], c[2*i+1], p, e, res + i);
}
}
void enkripsiCUDA(ulint *m, ulint *k, ulint g, ulint p, ulint y, ulint *res) {
clock_t begin = clock();
kernelenk(m,k,g,p,y,res);
clock_t end = clock();
double time_spent = (double)(end - begin);
printf("Durasi enkripsi: %f ms\n", time_spent/1000);
// printf("\n<<<<<<<<<<<<<<HASIL KE CPU>>>>>>>>>>>>>>>\n");
}
void dekripsiCUDA(ulint *c, ulint p, ulint e, ulint *res2) {
clock_t begin = clock();
kerneldek(c,p,e,res2);
clock_t end = clock();
double time_spent = (double)(end - begin);
printf("Durasi dekripsi: %f ms\n", time_spent/1000);
// printf("\n<<<<<<<<<<<<<<HASIL KE CPU>>>>>>>>>>>>>>>\n");
}
void initenkripsi(ulint *m, ulint *k) {
for (int i = 0; i < banyakdata; i++)
{
m[i] = 0;
}
FILE *file = fopen("plain.plain", "r");
char *code;
size_t n = 0;
int c;
code = (char*) malloc(9999999);
while ((c = fgetc(file)) != EOF)
{
code[n++] = (char) c;
}
code[n] = '\0';
char karakter = code[0];
int i = 0;
int indexpesan = -1;
while(karakter != '\0'){
karakter = code[i];
if(i % 3== 0){
indexpesan++;
m[indexpesan] += karakter * 1000000;
}else if(i % 3 ==1){
m[indexpesan] += karakter * 1000;
}else{
m[indexpesan] += karakter;
}
i++;
}
//printf("count : %d\n", indexpesan);
// nilai k //
srand(2018);
for (int i = 0; i < banyakdata; i++) {
k[i] = rand() % 3999999978;
}
}
ulint stringtolong(char* s){
ulint res = 0;
int i = 0;
while(s[i] != '\0'){
res *= 10;
res += s[i] - '0';
i++;
}
return res;
}
void initdekripsi(ulint *c) {
for (int i = 0; i < banyakdata*2; i++)
{
c[i] = 0;
}
char *buffer = 0;
long length;
FILE *f = fopen("cipher.cipher", "rb");
if (f)
{
fseek(f, 0, SEEK_END);
length = ftell(f);
fseek(f, 0, SEEK_SET);
buffer = (char*)malloc(length);
if (buffer) {
fread(buffer, 1, length, f);
}
buffer[length] = '\0';
fclose(f);
}
char delimstrip[2];
delimstrip[0] = 45;
delimstrip[1] = 0;
// Baca seluruh ciphertext
char *tempsplit;
tempsplit = strdup(strtok(buffer, delimstrip));
c[0] = stringtolong(tempsplit);
tempsplit = strdup(strtok(NULL, delimstrip));
c[1] = stringtolong(tempsplit);
// Baca m
for (int i = 1; i < banyakdata; i++) {
tempsplit = strdup(strtok(NULL, delimstrip));
c[2*i] = stringtolong(tempsplit);
tempsplit = strdup(strtok(NULL, delimstrip));
c[2*i+1] = stringtolong(tempsplit);
}
}
void initenkripsi2(ulint *m, ulint *k){
for (int i = 0; i < banyakdata; i++) {
m[i] = rand() % 3999999978;
k[i] = rand() % 3999999978;
}
}
void writecipher(ulint* c){
FILE *fp = fopen("cipher.cipher","w");
for (int i = 0; i < banyakdata*2; i++)
{
fprintf(fp, "%lu", c[i]);
fprintf(fp, "%c", '-');
}
fclose(fp);
}
void writedekrip(ulint* m){
FILE *fp = fopen("dekrip.dekrip","w");
for (int i = 0; i < banyakdata; i++)
{
ulint temp = m[i];
fprintf(fp, "%c", (unsigned char) (temp/1000000) );
fprintf(fp, "%c", (unsigned char) ((temp/1000) % 1000) );
fprintf(fp, "%c", (unsigned char) (temp % 1000));
}
fclose(fp);
}
int main(){
ulint *m, *k, *res, *res2, g, p, y, x, e, *res3;
m = (ulint*)malloc(banyakdata * sizeof(ulint));
k = (ulint*)malloc(banyakdata * sizeof(ulint));
res = (ulint*)malloc(banyakdata * 2 * sizeof(ulint));
res2 = (ulint*)malloc(banyakdata * sizeof(ulint));
res3 = (ulint*)malloc(banyakdata * 2 *sizeof(ulint));
srand(2018);
g = rand() % 3999999978;
p = 3999999979;
x = rand() % 3999999978;
modexp(g,x,p,&y);
initenkripsi(m, k);
//initenkripsi2(m, k);
// printf("<<<<<<<<<<<<<<Pesan Asli>>>>>>>>>>>>>>>\n");
// for (int i = 0; i < 4; i++) {
// printf("m[%d] = %lu\n", i, m[i]);
// }
// printf("m[...]\n");
// printf("m[%d] = %lu\n", banyakdata-1, m[banyakdata-1]);
enkripsiCUDA(m,k,g,p,y,res);
// printf("<<<<<<<<<<<<<<Hasil Enkripsi>>>>>>>>>>>>>>>\n");
// for (int i = 0; i < 4; i++) {
// printf("c[%d] = %lu c[%d] = %lu\n", 2*i, res[2*i], 2*i+1, res[2*i+1]);
// }
// printf("c ...\n");
// printf("c[%d] = %lu c[%d] = %lu\n", banyakdata * 2-2, res[banyakdata * 2-2], banyakdata *2-1,res[banyakdata*2-1]);
writecipher(res);
initdekripsi(res3);
e = p-x-1;
dekripsiCUDA(res3,p,e,res2);
// printf("<<<<<<<<<<<<<<Hasil Dekripsi>>>>>>>>>>>>>>>\n");
// for (int i = 0; i < 4; i++) {
// printf("m[%d] = %lu\n", i, res2[i]);
// }
// printf("m[...]\n");
// printf("m[%d] = %lu\n", banyakdata-1, res2[banyakdata-1]);
//writedekrip(res2);
free(m);
free(k);
free(res);
free(res2);
free(res3);
return 0;
} | .file "tmpxft_00079838_00000000-6_32.cudafe1.cpp"
.text
#APP
#NO_APP
.type _ZL26__cudaUnregisterBinaryUtilv, @function
_ZL26__cudaUnregisterBinaryUtilv:
.LFB2073:
.cfi_startproc
endbr64
subq $8, %rsp
.cfi_def_cfa_offset 16
movq _ZL20__cudaFatCubinHandle(%rip), %rdi
call __cudaUnregisterFatBinary@PLT
addq $8, %rsp
.cfi_def_cfa_offset 8
ret
.cfi_endproc
.LFE2073:
.size _ZL26__cudaUnregisterBinaryUtilv, .-_ZL26__cudaUnregisterBinaryUtilv
.globl _Z6modexpmmmPm
.type _Z6modexpmmmPm, @function
_Z6modexpmmmPm:
.LFB2057:
.cfi_startproc
endbr64
movq %rdx, %r9
testq %rsi, %rsi
je .L7
movl $1, %r8d
jmp .L6
.L5:
cmpq $1, %rsi
jbe .L4
shrq %rsi
imulq %rdi, %rdi
movq %rdi, %rax
movl $0, %edx
divq %r9
movq %rdx, %rdi
.L6:
testb $1, %sil
je .L5
movq %r8, %rax
imulq %rdi, %rax
movl $0, %edx
divq %r9
movq %rdx, %r8
subq $1, %rsi
jmp .L5
.L7:
movl $1, %r8d
.L4:
movq %r8, (%rcx)
ret
.cfi_endproc
.LFE2057:
.size _Z6modexpmmmPm, .-_Z6modexpmmmPm
.globl _Z8enkripsimmmmmPm
.type _Z8enkripsimmmmmPm, @function
_Z8enkripsimmmmmPm:
.LFB2058:
.cfi_startproc
endbr64
pushq %r14
.cfi_def_cfa_offset 16
.cfi_offset 14, -16
pushq %r13
.cfi_def_cfa_offset 24
.cfi_offset 13, -24
pushq %r12
.cfi_def_cfa_offset 32
.cfi_offset 12, -32
pushq %rbp
.cfi_def_cfa_offset 40
.cfi_offset 6, -40
pushq %rbx
.cfi_def_cfa_offset 48
.cfi_offset 3, -48
movq %rsi, %r13
movq %rdx, %r12
movq %rcx, %rbx
movq %r8, %r14
movq %r9, %rbp
movq %r9, %rcx
call _Z6modexpmmmPm
leaq 8(%rbp), %rcx
movq %r12, %rdx
movq %r13, %rsi
movq %r14, %rdi
call _Z6modexpmmmPm
movq %rbx, %rax
imulq 8(%rbp), %rax
movl $0, %edx
divq %r12
movq %rdx, 8(%rbp)
popq %rbx
.cfi_def_cfa_offset 40
popq %rbp
.cfi_def_cfa_offset 32
popq %r12
.cfi_def_cfa_offset 24
popq %r13
.cfi_def_cfa_offset 16
popq %r14
.cfi_def_cfa_offset 8
ret
.cfi_endproc
.LFE2058:
.size _Z8enkripsimmmmmPm, .-_Z8enkripsimmmmmPm
.globl _Z8dekripsimmmmPm
.type _Z8dekripsimmmmPm, @function
_Z8dekripsimmmmPm:
.LFB2059:
.cfi_startproc
endbr64
pushq %r12
.cfi_def_cfa_offset 16
.cfi_offset 12, -16
pushq %rbp
.cfi_def_cfa_offset 24
.cfi_offset 6, -24
pushq %rbx
.cfi_def_cfa_offset 32
.cfi_offset 3, -32
movq %rsi, %rbx
movq %rdx, %r12
movq %rcx, %rsi
movq %r8, %rbp
movq %r8, %rcx
call _Z6modexpmmmPm
movq %rbx, %rax
imulq 0(%rbp), %rax
movl $0, %edx
divq %r12
movq %rdx, 0(%rbp)
popq %rbx
.cfi_def_cfa_offset 24
popq %rbp
.cfi_def_cfa_offset 16
popq %r12
.cfi_def_cfa_offset 8
ret
.cfi_endproc
.LFE2059:
.size _Z8dekripsimmmmPm, .-_Z8dekripsimmmmPm
.globl _Z9kernelenkPmS_mmmS_
.type _Z9kernelenkPmS_mmmS_, @function
_Z9kernelenkPmS_mmmS_:
.LFB2060:
.cfi_startproc
endbr64
pushq %r15
.cfi_def_cfa_offset 16
.cfi_offset 15, -16
pushq %r14
.cfi_def_cfa_offset 24
.cfi_offset 14, -24
pushq %r13
.cfi_def_cfa_offset 32
.cfi_offset 13, -32
pushq %r12
.cfi_def_cfa_offset 40
.cfi_offset 12, -40
pushq %rbp
.cfi_def_cfa_offset 48
.cfi_offset 6, -48
pushq %rbx
.cfi_def_cfa_offset 56
.cfi_offset 3, -56
subq $8, %rsp
.cfi_def_cfa_offset 64
movq %rdx, (%rsp)
movl banyakdata(%rip), %eax
testl %eax, %eax
jle .L12
movq %rdi, %r12
movq %rsi, %rbp
movq %rcx, %r14
movq %r8, %r15
movq %r9, %rbx
cltq
salq $4, %rax
leaq (%r9,%rax), %r13
.L14:
movq (%r12), %rcx
movq 0(%rbp), %rsi
movq %rbx, %r9
movq %r15, %r8
movq %r14, %rdx
movq (%rsp), %rdi
call _Z8enkripsimmmmmPm
addq $8, %r12
addq $8, %rbp
addq $16, %rbx
cmpq %r13, %rbx
jne .L14
.L12:
addq $8, %rsp
.cfi_def_cfa_offset 56
popq %rbx
.cfi_def_cfa_offset 48
popq %rbp
.cfi_def_cfa_offset 40
popq %r12
.cfi_def_cfa_offset 32
popq %r13
.cfi_def_cfa_offset 24
popq %r14
.cfi_def_cfa_offset 16
popq %r15
.cfi_def_cfa_offset 8
ret
.cfi_endproc
.LFE2060:
.size _Z9kernelenkPmS_mmmS_, .-_Z9kernelenkPmS_mmmS_
.globl _Z9kerneldekPmmmS_
.type _Z9kerneldekPmmmS_, @function
_Z9kerneldekPmmmS_:
.LFB2061:
.cfi_startproc
endbr64
movl banyakdata(%rip), %eax
testl %eax, %eax
jle .L22
pushq %r14
.cfi_def_cfa_offset 16
.cfi_offset 14, -16
pushq %r13
.cfi_def_cfa_offset 24
.cfi_offset 13, -24
pushq %r12
.cfi_def_cfa_offset 32
.cfi_offset 12, -32
pushq %rbp
.cfi_def_cfa_offset 40
.cfi_offset 6, -40
pushq %rbx
.cfi_def_cfa_offset 48
.cfi_offset 3, -48
movq %rsi, %r13
movq %rdx, %r14
movq %rdi, %rbx
movq %rcx, %rbp
cltq
salq $4, %rax
leaq (%rdi,%rax), %r12
.L19:
movq 8(%rbx), %rsi
movq (%rbx), %rdi
movq %rbp, %r8
movq %r14, %rcx
movq %r13, %rdx
call _Z8dekripsimmmmPm
addq $16, %rbx
addq $8, %rbp
cmpq %r12, %rbx
jne .L19
popq %rbx
.cfi_def_cfa_offset 40
popq %rbp
.cfi_def_cfa_offset 32
popq %r12
.cfi_def_cfa_offset 24
popq %r13
.cfi_def_cfa_offset 16
popq %r14
.cfi_def_cfa_offset 8
ret
.L22:
.cfi_restore 3
.cfi_restore 6
.cfi_restore 12
.cfi_restore 13
.cfi_restore 14
ret
.cfi_endproc
.LFE2061:
.size _Z9kerneldekPmmmS_, .-_Z9kerneldekPmmmS_
.section .rodata.str1.1,"aMS",@progbits,1
.LC1:
.string "Durasi enkripsi: %f ms\n"
.text
.globl _Z12enkripsiCUDAPmS_mmmS_
.type _Z12enkripsiCUDAPmS_mmmS_, @function
_Z12enkripsiCUDAPmS_mmmS_:
.LFB2062:
.cfi_startproc
endbr64
pushq %r15
.cfi_def_cfa_offset 16
.cfi_offset 15, -16
pushq %r14
.cfi_def_cfa_offset 24
.cfi_offset 14, -24
pushq %r13
.cfi_def_cfa_offset 32
.cfi_offset 13, -32
pushq %r12
.cfi_def_cfa_offset 40
.cfi_offset 12, -40
pushq %rbp
.cfi_def_cfa_offset 48
.cfi_offset 6, -48
pushq %rbx
.cfi_def_cfa_offset 56
.cfi_offset 3, -56
subq $24, %rsp
.cfi_def_cfa_offset 80
movq %rdi, 8(%rsp)
movq %rsi, %rbp
movq %rdx, %r12
movq %rcx, %r13
movq %r8, %r14
movq %r9, %r15
call clock@PLT
movq %rax, %rbx
movq %r15, %r9
movq %r14, %r8
movq %r13, %rcx
movq %r12, %rdx
movq %rbp, %rsi
movq 8(%rsp), %rdi
call _Z9kernelenkPmS_mmmS_
call clock@PLT
subq %rbx, %rax
pxor %xmm0, %xmm0
cvtsi2sdq %rax, %xmm0
divsd .LC0(%rip), %xmm0
leaq .LC1(%rip), %rsi
movl $2, %edi
movl $1, %eax
call __printf_chk@PLT
addq $24, %rsp
.cfi_def_cfa_offset 56
popq %rbx
.cfi_def_cfa_offset 48
popq %rbp
.cfi_def_cfa_offset 40
popq %r12
.cfi_def_cfa_offset 32
popq %r13
.cfi_def_cfa_offset 24
popq %r14
.cfi_def_cfa_offset 16
popq %r15
.cfi_def_cfa_offset 8
ret
.cfi_endproc
.LFE2062:
.size _Z12enkripsiCUDAPmS_mmmS_, .-_Z12enkripsiCUDAPmS_mmmS_
.section .rodata.str1.1
.LC2:
.string "Durasi dekripsi: %f ms\n"
.text
.globl _Z12dekripsiCUDAPmmmS_
.type _Z12dekripsiCUDAPmmmS_, @function
_Z12dekripsiCUDAPmmmS_:
.LFB2063:
.cfi_startproc
endbr64
pushq %r14
.cfi_def_cfa_offset 16
.cfi_offset 14, -16
pushq %r13
.cfi_def_cfa_offset 24
.cfi_offset 13, -24
pushq %r12
.cfi_def_cfa_offset 32
.cfi_offset 12, -32
pushq %rbp
.cfi_def_cfa_offset 40
.cfi_offset 6, -40
pushq %rbx
.cfi_def_cfa_offset 48
.cfi_offset 3, -48
movq %rdi, %rbp
movq %rsi, %r12
movq %rdx, %r13
movq %rcx, %r14
call clock@PLT
movq %rax, %rbx
movq %r14, %rcx
movq %r13, %rdx
movq %r12, %rsi
movq %rbp, %rdi
call _Z9kerneldekPmmmS_
call clock@PLT
subq %rbx, %rax
pxor %xmm0, %xmm0
cvtsi2sdq %rax, %xmm0
divsd .LC0(%rip), %xmm0
leaq .LC2(%rip), %rsi
movl $2, %edi
movl $1, %eax
call __printf_chk@PLT
popq %rbx
.cfi_def_cfa_offset 40
popq %rbp
.cfi_def_cfa_offset 32
popq %r12
.cfi_def_cfa_offset 24
popq %r13
.cfi_def_cfa_offset 16
popq %r14
.cfi_def_cfa_offset 8
ret
.cfi_endproc
.LFE2063:
.size _Z12dekripsiCUDAPmmmS_, .-_Z12dekripsiCUDAPmmmS_
.section .rodata.str1.1
.LC3:
.string "r"
.LC4:
.string "plain.plain"
.text
.globl _Z12initenkripsiPmS_
.type _Z12initenkripsiPmS_, @function
_Z12initenkripsiPmS_:
.LFB2064:
.cfi_startproc
endbr64
pushq %r14
.cfi_def_cfa_offset 16
.cfi_offset 14, -16
pushq %r13
.cfi_def_cfa_offset 24
.cfi_offset 13, -24
pushq %r12
.cfi_def_cfa_offset 32
.cfi_offset 12, -32
pushq %rbp
.cfi_def_cfa_offset 40
.cfi_offset 6, -40
pushq %rbx
.cfi_def_cfa_offset 48
.cfi_offset 3, -48
movq %rdi, %rbp
movq %rsi, %r12
movl banyakdata(%rip), %edx
testl %edx, %edx
jle .L30
movq %rdi, %rax
movslq %edx, %rdx
leaq (%rdi,%rdx,8), %rdx
.L31:
movq $0, (%rax)
addq $8, %rax
cmpq %rdx, %rax
jne .L31
.L30:
leaq .LC3(%rip), %rsi
leaq .LC4(%rip), %rdi
call fopen@PLT
movq %rax, %r14
movl $9999999, %edi
call malloc@PLT
movq %rax, %rbx
movl $0, %r13d
jmp .L32
.L33:
addq $1, %r13
movb %dl, -1(%rbx,%r13)
.L32:
movq %r14, %rdi
call fgetc@PLT
movl %eax, %edx
cmpl $-1, %eax
jne .L33
movb $0, (%rbx,%r13)
cmpb $0, (%rbx)
je .L34
movl $0, %ecx
jmp .L38
.L35:
cmpl $1, %eax
je .L45
movslq %edx, %rax
movsbq %dil, %rsi
addq %rsi, 0(%rbp,%rax,8)
.L36:
addq $1, %rcx
testb %dil, %dil
je .L34
.L38:
movzbl (%rbx,%rcx), %edi
movslq %ecx, %rax
imulq $1431655766, %rax, %rax
shrq $32, %rax
movl %ecx, %esi
sarl $31, %esi
subl %esi, %eax
leal (%rax,%rax,2), %esi
movl %ecx, %eax
subl %esi, %eax
jne .L35
addl $1, %edx
movslq %edx, %rsi
movsbl %dil, %eax
imull $1000000, %eax, %eax
cltq
addq %rax, 0(%rbp,%rsi,8)
jmp .L36
.L45:
movslq %edx, %rsi
movsbl %dil, %eax
imull $1000, %eax, %eax
cltq
addq %rax, 0(%rbp,%rsi,8)
jmp .L36
.L34:
movl $2018, %edi
call srand@PLT
cmpl $0, banyakdata(%rip)
jle .L29
movl $0, %ebx
movabsq $2475880092188101057, %r13
movl $3999999978, %ebp
.L40:
call rand@PLT
movslq %eax, %rcx
movq %rcx, %rax
imulq %r13
sarq $29, %rdx
movq %rcx, %rax
sarq $63, %rax
subq %rax, %rdx
imulq %rbp, %rdx
subq %rdx, %rcx
movq %rcx, (%r12,%rbx,8)
addq $1, %rbx
cmpl %ebx, banyakdata(%rip)
jg .L40
.L29:
popq %rbx
.cfi_def_cfa_offset 40
popq %rbp
.cfi_def_cfa_offset 32
popq %r12
.cfi_def_cfa_offset 24
popq %r13
.cfi_def_cfa_offset 16
popq %r14
.cfi_def_cfa_offset 8
ret
.cfi_endproc
.LFE2064:
.size _Z12initenkripsiPmS_, .-_Z12initenkripsiPmS_
.globl _Z12stringtolongPc
.type _Z12stringtolongPc, @function
_Z12stringtolongPc:
.LFB2065:
.cfi_startproc
endbr64
movzbl (%rdi), %eax
testb %al, %al
je .L49
addq $1, %rdi
movl $0, %edx
.L48:
leaq (%rdx,%rdx,4), %rdx
movsbl %al, %eax
subl $48, %eax
cltq
leaq (%rax,%rdx,2), %rdx
addq $1, %rdi
movzbl -1(%rdi), %eax
testb %al, %al
jne .L48
.L46:
movq %rdx, %rax
ret
.L49:
movl $0, %edx
jmp .L46
.cfi_endproc
.LFE2065:
.size _Z12stringtolongPc, .-_Z12stringtolongPc
.section .rodata.str1.1
.LC5:
.string "rb"
.LC6:
.string "cipher.cipher"
.text
.globl _Z12initdekripsiPm
.type _Z12initdekripsiPm, @function
_Z12initdekripsiPm:
.LFB2066:
.cfi_startproc
endbr64
pushq %r13
.cfi_def_cfa_offset 16
.cfi_offset 13, -16
pushq %r12
.cfi_def_cfa_offset 24
.cfi_offset 12, -24
pushq %rbp
.cfi_def_cfa_offset 32
.cfi_offset 6, -32
pushq %rbx
.cfi_def_cfa_offset 40
.cfi_offset 3, -40
subq $24, %rsp
.cfi_def_cfa_offset 64
movq %rdi, %rbx
movq %fs:40, %rax
movq %rax, 8(%rsp)
xorl %eax, %eax
movl banyakdata(%rip), %edx
testl %edx, %edx
jle .L52
movq %rdi, %rax
leal -1(%rdx,%rdx), %edx
leaq 8(%rdi,%rdx,8), %rdx
.L53:
movq $0, (%rax)
addq $8, %rax
cmpq %rdx, %rax
jne .L53
.L52:
leaq .LC5(%rip), %rsi
leaq .LC6(%rip), %rdi
call fopen@PLT
movq %rax, %rbp
testq %rax, %rax
je .L59
movl $2, %edx
movl $0, %esi
movq %rax, %rdi
call fseek@PLT
movq %rbp, %rdi
call ftell@PLT
movq %rax, %r13
movl $0, %edx
movl $0, %esi
movq %rbp, %rdi
call fseek@PLT
movq %r13, %rdi
call malloc@PLT
movq %rax, %r12
testq %rax, %rax
je .L55
movq %rbp, %r8
movq %r13, %rcx
movl $1, %edx
movq %r13, %rsi
movq %rax, %rdi
call __fread_chk@PLT
.L55:
movb $0, (%r12,%r13)
movq %rbp, %rdi
call fclose@PLT
.L54:
movb $45, 6(%rsp)
movb $0, 7(%rsp)
leaq 6(%rsp), %rbp
movq %rbp, %rsi
movq %r12, %rdi
call strtok@PLT
movq %rax, %rdi
call strdup@PLT
movq %rax, %rdi
call _Z12stringtolongPc
movq %rax, (%rbx)
movq %rbp, %rsi
movl $0, %edi
call strtok@PLT
movq %rax, %rdi
call strdup@PLT
movq %rax, %rdi
call _Z12stringtolongPc
movq %rax, 8(%rbx)
cmpl $1, banyakdata(%rip)
jle .L51
addq $16, %rbx
movl $1, %ebp
leaq 6(%rsp), %r12
.L57:
movq %r12, %rsi
movl $0, %edi
call strtok@PLT
movq %rax, %rdi
call strdup@PLT
movq %rax, %rdi
call _Z12stringtolongPc
movq %rax, (%rbx)
movq %r12, %rsi
movl $0, %edi
call strtok@PLT
movq %rax, %rdi
call strdup@PLT
movq %rax, %rdi
call _Z12stringtolongPc
movq %rax, 8(%rbx)
addl $1, %ebp
addq $16, %rbx
cmpl %ebp, banyakdata(%rip)
jg .L57
.L51:
movq 8(%rsp), %rax
subq %fs:40, %rax
jne .L63
addq $24, %rsp
.cfi_remember_state
.cfi_def_cfa_offset 40
popq %rbx
.cfi_def_cfa_offset 32
popq %rbp
.cfi_def_cfa_offset 24
popq %r12
.cfi_def_cfa_offset 16
popq %r13
.cfi_def_cfa_offset 8
ret
.L59:
.cfi_restore_state
movq %rax, %r12
jmp .L54
.L63:
call __stack_chk_fail@PLT
.cfi_endproc
.LFE2066:
.size _Z12initdekripsiPm, .-_Z12initdekripsiPm
.globl _Z13initenkripsi2PmS_
.type _Z13initenkripsi2PmS_, @function
_Z13initenkripsi2PmS_:
.LFB2067:
.cfi_startproc
endbr64
cmpl $0, banyakdata(%rip)
jle .L69
pushq %r14
.cfi_def_cfa_offset 16
.cfi_offset 14, -16
pushq %r13
.cfi_def_cfa_offset 24
.cfi_offset 13, -24
pushq %r12
.cfi_def_cfa_offset 32
.cfi_offset 12, -32
pushq %rbp
.cfi_def_cfa_offset 40
.cfi_offset 6, -40
pushq %rbx
.cfi_def_cfa_offset 48
.cfi_offset 3, -48
movq %rdi, %r13
movq %rsi, %r14
movl $0, %ebx
movabsq $2475880092188101057, %r12
movl $3999999978, %ebp
.L66:
call rand@PLT
movslq %eax, %rcx
movq %rcx, %rax
imulq %r12
sarq $29, %rdx
movq %rcx, %rax
sarq $63, %rax
subq %rax, %rdx
imulq %rbp, %rdx
subq %rdx, %rcx
movq %rcx, 0(%r13,%rbx,8)
call rand@PLT
movslq %eax, %rcx
movq %rcx, %rax
imulq %r12
sarq $29, %rdx
movq %rcx, %rax
sarq $63, %rax
subq %rax, %rdx
imulq %rbp, %rdx
subq %rdx, %rcx
movq %rcx, (%r14,%rbx,8)
addq $1, %rbx
cmpl %ebx, banyakdata(%rip)
jg .L66
popq %rbx
.cfi_def_cfa_offset 40
popq %rbp
.cfi_def_cfa_offset 32
popq %r12
.cfi_def_cfa_offset 24
popq %r13
.cfi_def_cfa_offset 16
popq %r14
.cfi_def_cfa_offset 8
ret
.L69:
.cfi_restore 3
.cfi_restore 6
.cfi_restore 12
.cfi_restore 13
.cfi_restore 14
ret
.cfi_endproc
.LFE2067:
.size _Z13initenkripsi2PmS_, .-_Z13initenkripsi2PmS_
.section .rodata.str1.1
.LC7:
.string "w"
.LC8:
.string "%lu"
.LC9:
.string "%c"
.text
.globl _Z11writecipherPm
.type _Z11writecipherPm, @function
_Z11writecipherPm:
.LFB2068:
.cfi_startproc
endbr64
pushq %r14
.cfi_def_cfa_offset 16
.cfi_offset 14, -16
pushq %r13
.cfi_def_cfa_offset 24
.cfi_offset 13, -24
pushq %r12
.cfi_def_cfa_offset 32
.cfi_offset 12, -32
pushq %rbp
.cfi_def_cfa_offset 40
.cfi_offset 6, -40
pushq %rbx
.cfi_def_cfa_offset 48
.cfi_offset 3, -48
movq %rdi, %r12
leaq .LC7(%rip), %rsi
leaq .LC6(%rip), %rdi
call fopen@PLT
movq %rax, %rbp
cmpl $0, banyakdata(%rip)
jle .L73
movl $0, %ebx
leaq .LC8(%rip), %r14
leaq .LC9(%rip), %r13
.L74:
movq (%r12,%rbx,8), %rcx
movq %r14, %rdx
movl $2, %esi
movq %rbp, %rdi
movl $0, %eax
call __fprintf_chk@PLT
movl $45, %ecx
movq %r13, %rdx
movl $2, %esi
movq %rbp, %rdi
movl $0, %eax
call __fprintf_chk@PLT
addq $1, %rbx
movl banyakdata(%rip), %eax
addl %eax, %eax
cmpl %ebx, %eax
jg .L74
.L73:
movq %rbp, %rdi
call fclose@PLT
popq %rbx
.cfi_def_cfa_offset 40
popq %rbp
.cfi_def_cfa_offset 32
popq %r12
.cfi_def_cfa_offset 24
popq %r13
.cfi_def_cfa_offset 16
popq %r14
.cfi_def_cfa_offset 8
ret
.cfi_endproc
.LFE2068:
.size _Z11writecipherPm, .-_Z11writecipherPm
.section .rodata.str1.1
.LC10:
.string "dekrip.dekrip"
.text
.globl _Z11writedekripPm
.type _Z11writedekripPm, @function
_Z11writedekripPm:
.LFB2069:
.cfi_startproc
endbr64
pushq %r15
.cfi_def_cfa_offset 16
.cfi_offset 15, -16
pushq %r14
.cfi_def_cfa_offset 24
.cfi_offset 14, -24
pushq %r13
.cfi_def_cfa_offset 32
.cfi_offset 13, -32
pushq %r12
.cfi_def_cfa_offset 40
.cfi_offset 12, -40
pushq %rbp
.cfi_def_cfa_offset 48
.cfi_offset 6, -48
pushq %rbx
.cfi_def_cfa_offset 56
.cfi_offset 3, -56
subq $24, %rsp
.cfi_def_cfa_offset 80
movq %rdi, 8(%rsp)
leaq .LC7(%rip), %rsi
leaq .LC10(%rip), %rdi
call fopen@PLT
movq %rax, %r13
cmpl $0, banyakdata(%rip)
jle .L78
movl $0, %r12d
leaq .LC9(%rip), %r14
movabsq $2361183241434822607, %r15
.L79:
movq 8(%rsp), %rax
movq (%rax,%r12,8), %rbx
movabsq $4835703278458516699, %rax
mulq %rbx
shrq $18, %rdx
movzbl %dl, %ecx
movq %r14, %rdx
movl $2, %esi
movq %r13, %rdi
movl $0, %eax
call __fprintf_chk@PLT
movq %rbx, %rdx
shrq $3, %rdx
movq %rdx, %rax
mulq %r15
movq %rdx, %rbp
shrq $4, %rbp
shrq $7, %rdx
movq %rdx, %rax
mulq %r15
shrq $4, %rdx
imulq $1000, %rdx, %rdx
movq %rbp, %rcx
subq %rdx, %rcx
movzbl %cl, %ecx
movq %r14, %rdx
movl $2, %esi
movq %r13, %rdi
movl $0, %eax
call __fprintf_chk@PLT
imulq $1000, %rbp, %rbp
subq %rbp, %rbx
movzbl %bl, %ecx
movq %r14, %rdx
movl $2, %esi
movq %r13, %rdi
movl $0, %eax
call __fprintf_chk@PLT
addq $1, %r12
cmpl %r12d, banyakdata(%rip)
jg .L79
.L78:
movq %r13, %rdi
call fclose@PLT
addq $24, %rsp
.cfi_def_cfa_offset 56
popq %rbx
.cfi_def_cfa_offset 48
popq %rbp
.cfi_def_cfa_offset 40
popq %r12
.cfi_def_cfa_offset 32
popq %r13
.cfi_def_cfa_offset 24
popq %r14
.cfi_def_cfa_offset 16
popq %r15
.cfi_def_cfa_offset 8
ret
.cfi_endproc
.LFE2069:
.size _Z11writedekripPm, .-_Z11writedekripPm
.globl main
.type main, @function
main:
.LFB2070:
.cfi_startproc
endbr64
pushq %r15
.cfi_def_cfa_offset 16
.cfi_offset 15, -16
pushq %r14
.cfi_def_cfa_offset 24
.cfi_offset 14, -24
pushq %r13
.cfi_def_cfa_offset 32
.cfi_offset 13, -32
pushq %r12
.cfi_def_cfa_offset 40
.cfi_offset 12, -40
pushq %rbp
.cfi_def_cfa_offset 48
.cfi_offset 6, -48
pushq %rbx
.cfi_def_cfa_offset 56
.cfi_offset 3, -56
subq $56, %rsp
.cfi_def_cfa_offset 112
movq %fs:40, %rax
movq %rax, 40(%rsp)
xorl %eax, %eax
movl banyakdata(%rip), %ebx
movslq %ebx, %rbp
salq $3, %rbp
movq %rbp, %rdi
call malloc@PLT
movq %rax, %r13
movq %rbp, %rdi
call malloc@PLT
movq %rax, %r12
addl %ebx, %ebx
movslq %ebx, %rbx
salq $3, %rbx
movq %rbx, %rdi
call malloc@PLT
movq %rax, 8(%rsp)
movq %rbp, %rdi
call malloc@PLT
movq %rax, 16(%rsp)
movq %rbx, %rdi
call malloc@PLT
movq %rax, 24(%rsp)
movl $2018, %edi
call srand@PLT
call rand@PLT
movslq %eax, %rcx
movabsq $2475880092188101057, %rbx
movq %rcx, %rax
imulq %rbx
sarq $29, %rdx
movq %rcx, %rsi
sarq $63, %rsi
subq %rsi, %rdx
movl $3999999978, %r14d
movq %rdx, %rsi
imulq %r14, %rsi
subq %rsi, %rcx
movq %rcx, %rbp
call rand@PLT
movslq %eax, %rcx
movq %rcx, %rax
imulq %rbx
movq %rdx, %rbx
sarq $29, %rbx
movq %rcx, %rsi
sarq $63, %rsi
subq %rsi, %rbx
imulq %r14, %rbx
subq %rbx, %rcx
movq %rcx, %rbx
leaq 32(%rsp), %rcx
movl $3999999979, %r15d
movq %r15, %rdx
movq %rbx, %rsi
movq %rbp, %rdi
call _Z6modexpmmmPm
movq %r12, %rsi
movq %r13, %rdi
call _Z12initenkripsiPmS_
movq 8(%rsp), %r9
movq 32(%rsp), %r8
movq %r15, %rcx
movq %rbp, %rdx
movq %r12, %rsi
movq %r13, %rdi
call _Z12enkripsiCUDAPmS_mmmS_
movq 8(%rsp), %rdi
call _Z11writecipherPm
movq 24(%rsp), %rbp
movq %rbp, %rdi
call _Z12initdekripsiPm
movq %r14, %rdx
subq %rbx, %rdx
movq 16(%rsp), %rbx
movq %rbx, %rcx
movq %r15, %rsi
movq %rbp, %rdi
call _Z12dekripsiCUDAPmmmS_
movq %r13, %rdi
call free@PLT
movq %r12, %rdi
call free@PLT
movq 8(%rsp), %rdi
call free@PLT
movq %rbx, %rdi
call free@PLT
movq %rbp, %rdi
call free@PLT
movq 40(%rsp), %rax
subq %fs:40, %rax
jne .L85
movl $0, %eax
addq $56, %rsp
.cfi_remember_state
.cfi_def_cfa_offset 56
popq %rbx
.cfi_def_cfa_offset 48
popq %rbp
.cfi_def_cfa_offset 40
popq %r12
.cfi_def_cfa_offset 32
popq %r13
.cfi_def_cfa_offset 24
popq %r14
.cfi_def_cfa_offset 16
popq %r15
.cfi_def_cfa_offset 8
ret
.L85:
.cfi_restore_state
call __stack_chk_fail@PLT
.cfi_endproc
.LFE2070:
.size main, .-main
.type _ZL24__sti____cudaRegisterAllv, @function
_ZL24__sti____cudaRegisterAllv:
.LFB2096:
.cfi_startproc
endbr64
subq $8, %rsp
.cfi_def_cfa_offset 16
leaq _ZL15__fatDeviceText(%rip), %rdi
call __cudaRegisterFatBinary@PLT
movq %rax, %rdi
movq %rax, _ZL20__cudaFatCubinHandle(%rip)
call __cudaRegisterFatBinaryEnd@PLT
leaq _ZL26__cudaUnregisterBinaryUtilv(%rip), %rdi
call atexit@PLT
addq $8, %rsp
.cfi_def_cfa_offset 8
ret
.cfi_endproc
.LFE2096:
.size _ZL24__sti____cudaRegisterAllv, .-_ZL24__sti____cudaRegisterAllv
.section .init_array,"aw"
.align 8
.quad _ZL24__sti____cudaRegisterAllv
.section .nvFatBinSegment,"aw"
.align 8
.type _ZL15__fatDeviceText, @object
.size _ZL15__fatDeviceText, 24
_ZL15__fatDeviceText:
.long 1180844977
.long 1
.quad fatbinData
.quad 0
.local _ZL20__cudaFatCubinHandle
.comm _ZL20__cudaFatCubinHandle,8,8
.globl dimensiblok
.data
.align 4
.type dimensiblok, @object
.size dimensiblok, 4
dimensiblok:
.long 128
.globl dimensigrid
.align 4
.type dimensigrid, @object
.size dimensigrid, 4
dimensigrid:
.long 80
.globl banyakdata
.align 4
.type banyakdata, @object
.size banyakdata, 4
banyakdata:
.long 10240
.section .rodata.cst8,"aM",@progbits,8
.align 8
.LC0:
.long 0
.long 1083129856
.ident "GCC: (Ubuntu 13.3.0-6ubuntu2~24.04) 13.3.0"
.section .note.GNU-stack,"",@progbits
.section .note.gnu.property,"a"
.align 8
.long 1f - 0f
.long 4f - 1f
.long 5
0:
.string "GNU"
1:
.align 8
.long 0xc0000002
.long 3f - 2f
2:
.long 0x3
3:
.align 8
4: |
You are a helpful coding assistant specialized in converting CUDA source code to HIP/AMD source code. | #include "cuda_runtime.h"
#include "device_launch_parameters.h"
#include <stdio.h>
#include <stdlib.h>
#include <string.h>
#include <time.h>
#include <math.h>
typedef unsigned long ulint;
typedef unsigned long long ulint64;
int banyakdata = 10240;
int dimensigrid = 80;
int dimensiblok = 128;
void modexp(ulint a, ulint b, ulint c, ulint* res) {
ulint64 s = a;
ulint64 ans = 1;
while (b != 0) {
if (b % 2 == 1) {
ans = ans * s % c;
b--;
}
b /= 2;
if (b != 0) {
s = s * s %c;
}
}
*res = ans;
}
void enkripsi(ulint g, ulint k, ulint p, ulint m, ulint y, ulint *res) {
modexp(g, k, p, res);
modexp(y, k, p, res + 1);
*(res + 1) = *(res + 1) * m % p;
}
void dekripsi(ulint a, ulint b, ulint p, ulint e, ulint *res) {
modexp(a, e, p, res);
*res = *res * b % p;
}
void kernelenk(ulint *m, ulint *k, ulint g, ulint p, ulint y, ulint *res) {
for (int i = 0; i < banyakdata; i++)
{
enkripsi(g, k[i], p, m[i], y, res + 2 * i);
}
}
void kerneldek(ulint *c, ulint p, ulint e, ulint *res) {
for (int i = 0; i < banyakdata; i++)
{
dekripsi(c[2*i], c[2*i+1], p, e, res + i);
}
}
void enkripsiCUDA(ulint *m, ulint *k, ulint g, ulint p, ulint y, ulint *res) {
clock_t begin = clock();
kernelenk(m,k,g,p,y,res);
clock_t end = clock();
double time_spent = (double)(end - begin);
printf("Durasi enkripsi: %f ms\n", time_spent/1000);
// printf("\n<<<<<<<<<<<<<<HASIL KE CPU>>>>>>>>>>>>>>>\n");
}
void dekripsiCUDA(ulint *c, ulint p, ulint e, ulint *res2) {
clock_t begin = clock();
kerneldek(c,p,e,res2);
clock_t end = clock();
double time_spent = (double)(end - begin);
printf("Durasi dekripsi: %f ms\n", time_spent/1000);
// printf("\n<<<<<<<<<<<<<<HASIL KE CPU>>>>>>>>>>>>>>>\n");
}
void initenkripsi(ulint *m, ulint *k) {
for (int i = 0; i < banyakdata; i++)
{
m[i] = 0;
}
FILE *file = fopen("plain.plain", "r");
char *code;
size_t n = 0;
int c;
code = (char*) malloc(9999999);
while ((c = fgetc(file)) != EOF)
{
code[n++] = (char) c;
}
code[n] = '\0';
char karakter = code[0];
int i = 0;
int indexpesan = -1;
while(karakter != '\0'){
karakter = code[i];
if(i % 3== 0){
indexpesan++;
m[indexpesan] += karakter * 1000000;
}else if(i % 3 ==1){
m[indexpesan] += karakter * 1000;
}else{
m[indexpesan] += karakter;
}
i++;
}
//printf("count : %d\n", indexpesan);
// nilai k //
srand(2018);
for (int i = 0; i < banyakdata; i++) {
k[i] = rand() % 3999999978;
}
}
ulint stringtolong(char* s){
ulint res = 0;
int i = 0;
while(s[i] != '\0'){
res *= 10;
res += s[i] - '0';
i++;
}
return res;
}
void initdekripsi(ulint *c) {
for (int i = 0; i < banyakdata*2; i++)
{
c[i] = 0;
}
char *buffer = 0;
long length;
FILE *f = fopen("cipher.cipher", "rb");
if (f)
{
fseek(f, 0, SEEK_END);
length = ftell(f);
fseek(f, 0, SEEK_SET);
buffer = (char*)malloc(length);
if (buffer) {
fread(buffer, 1, length, f);
}
buffer[length] = '\0';
fclose(f);
}
char delimstrip[2];
delimstrip[0] = 45;
delimstrip[1] = 0;
// Baca seluruh ciphertext
char *tempsplit;
tempsplit = strdup(strtok(buffer, delimstrip));
c[0] = stringtolong(tempsplit);
tempsplit = strdup(strtok(NULL, delimstrip));
c[1] = stringtolong(tempsplit);
// Baca m
for (int i = 1; i < banyakdata; i++) {
tempsplit = strdup(strtok(NULL, delimstrip));
c[2*i] = stringtolong(tempsplit);
tempsplit = strdup(strtok(NULL, delimstrip));
c[2*i+1] = stringtolong(tempsplit);
}
}
void initenkripsi2(ulint *m, ulint *k){
for (int i = 0; i < banyakdata; i++) {
m[i] = rand() % 3999999978;
k[i] = rand() % 3999999978;
}
}
void writecipher(ulint* c){
FILE *fp = fopen("cipher.cipher","w");
for (int i = 0; i < banyakdata*2; i++)
{
fprintf(fp, "%lu", c[i]);
fprintf(fp, "%c", '-');
}
fclose(fp);
}
void writedekrip(ulint* m){
FILE *fp = fopen("dekrip.dekrip","w");
for (int i = 0; i < banyakdata; i++)
{
ulint temp = m[i];
fprintf(fp, "%c", (unsigned char) (temp/1000000) );
fprintf(fp, "%c", (unsigned char) ((temp/1000) % 1000) );
fprintf(fp, "%c", (unsigned char) (temp % 1000));
}
fclose(fp);
}
int main(){
ulint *m, *k, *res, *res2, g, p, y, x, e, *res3;
m = (ulint*)malloc(banyakdata * sizeof(ulint));
k = (ulint*)malloc(banyakdata * sizeof(ulint));
res = (ulint*)malloc(banyakdata * 2 * sizeof(ulint));
res2 = (ulint*)malloc(banyakdata * sizeof(ulint));
res3 = (ulint*)malloc(banyakdata * 2 *sizeof(ulint));
srand(2018);
g = rand() % 3999999978;
p = 3999999979;
x = rand() % 3999999978;
modexp(g,x,p,&y);
initenkripsi(m, k);
//initenkripsi2(m, k);
// printf("<<<<<<<<<<<<<<Pesan Asli>>>>>>>>>>>>>>>\n");
// for (int i = 0; i < 4; i++) {
// printf("m[%d] = %lu\n", i, m[i]);
// }
// printf("m[...]\n");
// printf("m[%d] = %lu\n", banyakdata-1, m[banyakdata-1]);
enkripsiCUDA(m,k,g,p,y,res);
// printf("<<<<<<<<<<<<<<Hasil Enkripsi>>>>>>>>>>>>>>>\n");
// for (int i = 0; i < 4; i++) {
// printf("c[%d] = %lu c[%d] = %lu\n", 2*i, res[2*i], 2*i+1, res[2*i+1]);
// }
// printf("c ...\n");
// printf("c[%d] = %lu c[%d] = %lu\n", banyakdata * 2-2, res[banyakdata * 2-2], banyakdata *2-1,res[banyakdata*2-1]);
writecipher(res);
initdekripsi(res3);
e = p-x-1;
dekripsiCUDA(res3,p,e,res2);
// printf("<<<<<<<<<<<<<<Hasil Dekripsi>>>>>>>>>>>>>>>\n");
// for (int i = 0; i < 4; i++) {
// printf("m[%d] = %lu\n", i, res2[i]);
// }
// printf("m[...]\n");
// printf("m[%d] = %lu\n", banyakdata-1, res2[banyakdata-1]);
//writedekrip(res2);
free(m);
free(k);
free(res);
free(res2);
free(res3);
return 0;
} | #include "hip/hip_runtime.h"
#include <stdio.h>
#include <stdlib.h>
#include <string.h>
#include <time.h>
#include <math.h>
typedef unsigned long ulint;
typedef unsigned long long ulint64;
int banyakdata = 10240;
int dimensigrid = 80;
int dimensiblok = 128;
void modexp(ulint a, ulint b, ulint c, ulint* res) {
ulint64 s = a;
ulint64 ans = 1;
while (b != 0) {
if (b % 2 == 1) {
ans = ans * s % c;
b--;
}
b /= 2;
if (b != 0) {
s = s * s %c;
}
}
*res = ans;
}
void enkripsi(ulint g, ulint k, ulint p, ulint m, ulint y, ulint *res) {
modexp(g, k, p, res);
modexp(y, k, p, res + 1);
*(res + 1) = *(res + 1) * m % p;
}
void dekripsi(ulint a, ulint b, ulint p, ulint e, ulint *res) {
modexp(a, e, p, res);
*res = *res * b % p;
}
void kernelenk(ulint *m, ulint *k, ulint g, ulint p, ulint y, ulint *res) {
for (int i = 0; i < banyakdata; i++)
{
enkripsi(g, k[i], p, m[i], y, res + 2 * i);
}
}
void kerneldek(ulint *c, ulint p, ulint e, ulint *res) {
for (int i = 0; i < banyakdata; i++)
{
dekripsi(c[2*i], c[2*i+1], p, e, res + i);
}
}
void enkripsiCUDA(ulint *m, ulint *k, ulint g, ulint p, ulint y, ulint *res) {
clock_t begin = clock();
kernelenk(m,k,g,p,y,res);
clock_t end = clock();
double time_spent = (double)(end - begin);
printf("Durasi enkripsi: %f ms\n", time_spent/1000);
// printf("\n<<<<<<<<<<<<<<HASIL KE CPU>>>>>>>>>>>>>>>\n");
}
void dekripsiCUDA(ulint *c, ulint p, ulint e, ulint *res2) {
clock_t begin = clock();
kerneldek(c,p,e,res2);
clock_t end = clock();
double time_spent = (double)(end - begin);
printf("Durasi dekripsi: %f ms\n", time_spent/1000);
// printf("\n<<<<<<<<<<<<<<HASIL KE CPU>>>>>>>>>>>>>>>\n");
}
void initenkripsi(ulint *m, ulint *k) {
for (int i = 0; i < banyakdata; i++)
{
m[i] = 0;
}
FILE *file = fopen("plain.plain", "r");
char *code;
size_t n = 0;
int c;
code = (char*) malloc(9999999);
while ((c = fgetc(file)) != EOF)
{
code[n++] = (char) c;
}
code[n] = '\0';
char karakter = code[0];
int i = 0;
int indexpesan = -1;
while(karakter != '\0'){
karakter = code[i];
if(i % 3== 0){
indexpesan++;
m[indexpesan] += karakter * 1000000;
}else if(i % 3 ==1){
m[indexpesan] += karakter * 1000;
}else{
m[indexpesan] += karakter;
}
i++;
}
//printf("count : %d\n", indexpesan);
// nilai k //
srand(2018);
for (int i = 0; i < banyakdata; i++) {
k[i] = rand() % 3999999978;
}
}
ulint stringtolong(char* s){
ulint res = 0;
int i = 0;
while(s[i] != '\0'){
res *= 10;
res += s[i] - '0';
i++;
}
return res;
}
void initdekripsi(ulint *c) {
for (int i = 0; i < banyakdata*2; i++)
{
c[i] = 0;
}
char *buffer = 0;
long length;
FILE *f = fopen("cipher.cipher", "rb");
if (f)
{
fseek(f, 0, SEEK_END);
length = ftell(f);
fseek(f, 0, SEEK_SET);
buffer = (char*)malloc(length);
if (buffer) {
fread(buffer, 1, length, f);
}
buffer[length] = '\0';
fclose(f);
}
char delimstrip[2];
delimstrip[0] = 45;
delimstrip[1] = 0;
// Baca seluruh ciphertext
char *tempsplit;
tempsplit = strdup(strtok(buffer, delimstrip));
c[0] = stringtolong(tempsplit);
tempsplit = strdup(strtok(NULL, delimstrip));
c[1] = stringtolong(tempsplit);
// Baca m
for (int i = 1; i < banyakdata; i++) {
tempsplit = strdup(strtok(NULL, delimstrip));
c[2*i] = stringtolong(tempsplit);
tempsplit = strdup(strtok(NULL, delimstrip));
c[2*i+1] = stringtolong(tempsplit);
}
}
void initenkripsi2(ulint *m, ulint *k){
for (int i = 0; i < banyakdata; i++) {
m[i] = rand() % 3999999978;
k[i] = rand() % 3999999978;
}
}
void writecipher(ulint* c){
FILE *fp = fopen("cipher.cipher","w");
for (int i = 0; i < banyakdata*2; i++)
{
fprintf(fp, "%lu", c[i]);
fprintf(fp, "%c", '-');
}
fclose(fp);
}
void writedekrip(ulint* m){
FILE *fp = fopen("dekrip.dekrip","w");
for (int i = 0; i < banyakdata; i++)
{
ulint temp = m[i];
fprintf(fp, "%c", (unsigned char) (temp/1000000) );
fprintf(fp, "%c", (unsigned char) ((temp/1000) % 1000) );
fprintf(fp, "%c", (unsigned char) (temp % 1000));
}
fclose(fp);
}
int main(){
ulint *m, *k, *res, *res2, g, p, y, x, e, *res3;
m = (ulint*)malloc(banyakdata * sizeof(ulint));
k = (ulint*)malloc(banyakdata * sizeof(ulint));
res = (ulint*)malloc(banyakdata * 2 * sizeof(ulint));
res2 = (ulint*)malloc(banyakdata * sizeof(ulint));
res3 = (ulint*)malloc(banyakdata * 2 *sizeof(ulint));
srand(2018);
g = rand() % 3999999978;
p = 3999999979;
x = rand() % 3999999978;
modexp(g,x,p,&y);
initenkripsi(m, k);
//initenkripsi2(m, k);
// printf("<<<<<<<<<<<<<<Pesan Asli>>>>>>>>>>>>>>>\n");
// for (int i = 0; i < 4; i++) {
// printf("m[%d] = %lu\n", i, m[i]);
// }
// printf("m[...]\n");
// printf("m[%d] = %lu\n", banyakdata-1, m[banyakdata-1]);
enkripsiCUDA(m,k,g,p,y,res);
// printf("<<<<<<<<<<<<<<Hasil Enkripsi>>>>>>>>>>>>>>>\n");
// for (int i = 0; i < 4; i++) {
// printf("c[%d] = %lu c[%d] = %lu\n", 2*i, res[2*i], 2*i+1, res[2*i+1]);
// }
// printf("c ...\n");
// printf("c[%d] = %lu c[%d] = %lu\n", banyakdata * 2-2, res[banyakdata * 2-2], banyakdata *2-1,res[banyakdata*2-1]);
writecipher(res);
initdekripsi(res3);
e = p-x-1;
dekripsiCUDA(res3,p,e,res2);
// printf("<<<<<<<<<<<<<<Hasil Dekripsi>>>>>>>>>>>>>>>\n");
// for (int i = 0; i < 4; i++) {
// printf("m[%d] = %lu\n", i, res2[i]);
// }
// printf("m[...]\n");
// printf("m[%d] = %lu\n", banyakdata-1, res2[banyakdata-1]);
//writedekrip(res2);
free(m);
free(k);
free(res);
free(res2);
free(res3);
return 0;
} |
You are a helpful coding assistant specialized in converting HIP source code to AMD device assembly. | #include "hip/hip_runtime.h"
#include <stdio.h>
#include <stdlib.h>
#include <string.h>
#include <time.h>
#include <math.h>
typedef unsigned long ulint;
typedef unsigned long long ulint64;
int banyakdata = 10240;
int dimensigrid = 80;
int dimensiblok = 128;
void modexp(ulint a, ulint b, ulint c, ulint* res) {
ulint64 s = a;
ulint64 ans = 1;
while (b != 0) {
if (b % 2 == 1) {
ans = ans * s % c;
b--;
}
b /= 2;
if (b != 0) {
s = s * s %c;
}
}
*res = ans;
}
void enkripsi(ulint g, ulint k, ulint p, ulint m, ulint y, ulint *res) {
modexp(g, k, p, res);
modexp(y, k, p, res + 1);
*(res + 1) = *(res + 1) * m % p;
}
void dekripsi(ulint a, ulint b, ulint p, ulint e, ulint *res) {
modexp(a, e, p, res);
*res = *res * b % p;
}
void kernelenk(ulint *m, ulint *k, ulint g, ulint p, ulint y, ulint *res) {
for (int i = 0; i < banyakdata; i++)
{
enkripsi(g, k[i], p, m[i], y, res + 2 * i);
}
}
void kerneldek(ulint *c, ulint p, ulint e, ulint *res) {
for (int i = 0; i < banyakdata; i++)
{
dekripsi(c[2*i], c[2*i+1], p, e, res + i);
}
}
void enkripsiCUDA(ulint *m, ulint *k, ulint g, ulint p, ulint y, ulint *res) {
clock_t begin = clock();
kernelenk(m,k,g,p,y,res);
clock_t end = clock();
double time_spent = (double)(end - begin);
printf("Durasi enkripsi: %f ms\n", time_spent/1000);
// printf("\n<<<<<<<<<<<<<<HASIL KE CPU>>>>>>>>>>>>>>>\n");
}
void dekripsiCUDA(ulint *c, ulint p, ulint e, ulint *res2) {
clock_t begin = clock();
kerneldek(c,p,e,res2);
clock_t end = clock();
double time_spent = (double)(end - begin);
printf("Durasi dekripsi: %f ms\n", time_spent/1000);
// printf("\n<<<<<<<<<<<<<<HASIL KE CPU>>>>>>>>>>>>>>>\n");
}
void initenkripsi(ulint *m, ulint *k) {
for (int i = 0; i < banyakdata; i++)
{
m[i] = 0;
}
FILE *file = fopen("plain.plain", "r");
char *code;
size_t n = 0;
int c;
code = (char*) malloc(9999999);
while ((c = fgetc(file)) != EOF)
{
code[n++] = (char) c;
}
code[n] = '\0';
char karakter = code[0];
int i = 0;
int indexpesan = -1;
while(karakter != '\0'){
karakter = code[i];
if(i % 3== 0){
indexpesan++;
m[indexpesan] += karakter * 1000000;
}else if(i % 3 ==1){
m[indexpesan] += karakter * 1000;
}else{
m[indexpesan] += karakter;
}
i++;
}
//printf("count : %d\n", indexpesan);
// nilai k //
srand(2018);
for (int i = 0; i < banyakdata; i++) {
k[i] = rand() % 3999999978;
}
}
ulint stringtolong(char* s){
ulint res = 0;
int i = 0;
while(s[i] != '\0'){
res *= 10;
res += s[i] - '0';
i++;
}
return res;
}
void initdekripsi(ulint *c) {
for (int i = 0; i < banyakdata*2; i++)
{
c[i] = 0;
}
char *buffer = 0;
long length;
FILE *f = fopen("cipher.cipher", "rb");
if (f)
{
fseek(f, 0, SEEK_END);
length = ftell(f);
fseek(f, 0, SEEK_SET);
buffer = (char*)malloc(length);
if (buffer) {
fread(buffer, 1, length, f);
}
buffer[length] = '\0';
fclose(f);
}
char delimstrip[2];
delimstrip[0] = 45;
delimstrip[1] = 0;
// Baca seluruh ciphertext
char *tempsplit;
tempsplit = strdup(strtok(buffer, delimstrip));
c[0] = stringtolong(tempsplit);
tempsplit = strdup(strtok(NULL, delimstrip));
c[1] = stringtolong(tempsplit);
// Baca m
for (int i = 1; i < banyakdata; i++) {
tempsplit = strdup(strtok(NULL, delimstrip));
c[2*i] = stringtolong(tempsplit);
tempsplit = strdup(strtok(NULL, delimstrip));
c[2*i+1] = stringtolong(tempsplit);
}
}
void initenkripsi2(ulint *m, ulint *k){
for (int i = 0; i < banyakdata; i++) {
m[i] = rand() % 3999999978;
k[i] = rand() % 3999999978;
}
}
void writecipher(ulint* c){
FILE *fp = fopen("cipher.cipher","w");
for (int i = 0; i < banyakdata*2; i++)
{
fprintf(fp, "%lu", c[i]);
fprintf(fp, "%c", '-');
}
fclose(fp);
}
void writedekrip(ulint* m){
FILE *fp = fopen("dekrip.dekrip","w");
for (int i = 0; i < banyakdata; i++)
{
ulint temp = m[i];
fprintf(fp, "%c", (unsigned char) (temp/1000000) );
fprintf(fp, "%c", (unsigned char) ((temp/1000) % 1000) );
fprintf(fp, "%c", (unsigned char) (temp % 1000));
}
fclose(fp);
}
int main(){
ulint *m, *k, *res, *res2, g, p, y, x, e, *res3;
m = (ulint*)malloc(banyakdata * sizeof(ulint));
k = (ulint*)malloc(banyakdata * sizeof(ulint));
res = (ulint*)malloc(banyakdata * 2 * sizeof(ulint));
res2 = (ulint*)malloc(banyakdata * sizeof(ulint));
res3 = (ulint*)malloc(banyakdata * 2 *sizeof(ulint));
srand(2018);
g = rand() % 3999999978;
p = 3999999979;
x = rand() % 3999999978;
modexp(g,x,p,&y);
initenkripsi(m, k);
//initenkripsi2(m, k);
// printf("<<<<<<<<<<<<<<Pesan Asli>>>>>>>>>>>>>>>\n");
// for (int i = 0; i < 4; i++) {
// printf("m[%d] = %lu\n", i, m[i]);
// }
// printf("m[...]\n");
// printf("m[%d] = %lu\n", banyakdata-1, m[banyakdata-1]);
enkripsiCUDA(m,k,g,p,y,res);
// printf("<<<<<<<<<<<<<<Hasil Enkripsi>>>>>>>>>>>>>>>\n");
// for (int i = 0; i < 4; i++) {
// printf("c[%d] = %lu c[%d] = %lu\n", 2*i, res[2*i], 2*i+1, res[2*i+1]);
// }
// printf("c ...\n");
// printf("c[%d] = %lu c[%d] = %lu\n", banyakdata * 2-2, res[banyakdata * 2-2], banyakdata *2-1,res[banyakdata*2-1]);
writecipher(res);
initdekripsi(res3);
e = p-x-1;
dekripsiCUDA(res3,p,e,res2);
// printf("<<<<<<<<<<<<<<Hasil Dekripsi>>>>>>>>>>>>>>>\n");
// for (int i = 0; i < 4; i++) {
// printf("m[%d] = %lu\n", i, res2[i]);
// }
// printf("m[...]\n");
// printf("m[%d] = %lu\n", banyakdata-1, res2[banyakdata-1]);
//writedekrip(res2);
free(m);
free(k);
free(res);
free(res2);
free(res3);
return 0;
} | .text
.p2alignl 7, 3214868480
.fill 96, 4, 3214868480
.type __hip_cuid_,@object
.section .bss,"aw",@nobits
.globl __hip_cuid_
__hip_cuid_:
.byte 0
.size __hip_cuid_, 1
.ident "AMD clang version 18.0.0git (https://github.com/RadeonOpenCompute/llvm-project roc-6.3.2 25012 e5bf7e55c91490b07c49d8960fa7983d864936c4)"
.section ".note.GNU-stack","",@progbits
.addrsig
.addrsig_sym __hip_cuid_
.amdgcn_target "amdgcn-amd-amdhsa--gfx1100"
.amdgpu_metadata
---
amdhsa.kernels: []
amdhsa.target: amdgcn-amd-amdhsa--gfx1100
amdhsa.version:
- 1
- 2
...
.end_amdgpu_metadata |
You are a helpful coding assistant specialized in converting HIP source code to AMD host assembly. | #include "hip/hip_runtime.h"
#include <stdio.h>
#include <stdlib.h>
#include <string.h>
#include <time.h>
#include <math.h>
typedef unsigned long ulint;
typedef unsigned long long ulint64;
int banyakdata = 10240;
int dimensigrid = 80;
int dimensiblok = 128;
void modexp(ulint a, ulint b, ulint c, ulint* res) {
ulint64 s = a;
ulint64 ans = 1;
while (b != 0) {
if (b % 2 == 1) {
ans = ans * s % c;
b--;
}
b /= 2;
if (b != 0) {
s = s * s %c;
}
}
*res = ans;
}
void enkripsi(ulint g, ulint k, ulint p, ulint m, ulint y, ulint *res) {
modexp(g, k, p, res);
modexp(y, k, p, res + 1);
*(res + 1) = *(res + 1) * m % p;
}
void dekripsi(ulint a, ulint b, ulint p, ulint e, ulint *res) {
modexp(a, e, p, res);
*res = *res * b % p;
}
void kernelenk(ulint *m, ulint *k, ulint g, ulint p, ulint y, ulint *res) {
for (int i = 0; i < banyakdata; i++)
{
enkripsi(g, k[i], p, m[i], y, res + 2 * i);
}
}
void kerneldek(ulint *c, ulint p, ulint e, ulint *res) {
for (int i = 0; i < banyakdata; i++)
{
dekripsi(c[2*i], c[2*i+1], p, e, res + i);
}
}
void enkripsiCUDA(ulint *m, ulint *k, ulint g, ulint p, ulint y, ulint *res) {
clock_t begin = clock();
kernelenk(m,k,g,p,y,res);
clock_t end = clock();
double time_spent = (double)(end - begin);
printf("Durasi enkripsi: %f ms\n", time_spent/1000);
// printf("\n<<<<<<<<<<<<<<HASIL KE CPU>>>>>>>>>>>>>>>\n");
}
void dekripsiCUDA(ulint *c, ulint p, ulint e, ulint *res2) {
clock_t begin = clock();
kerneldek(c,p,e,res2);
clock_t end = clock();
double time_spent = (double)(end - begin);
printf("Durasi dekripsi: %f ms\n", time_spent/1000);
// printf("\n<<<<<<<<<<<<<<HASIL KE CPU>>>>>>>>>>>>>>>\n");
}
void initenkripsi(ulint *m, ulint *k) {
for (int i = 0; i < banyakdata; i++)
{
m[i] = 0;
}
FILE *file = fopen("plain.plain", "r");
char *code;
size_t n = 0;
int c;
code = (char*) malloc(9999999);
while ((c = fgetc(file)) != EOF)
{
code[n++] = (char) c;
}
code[n] = '\0';
char karakter = code[0];
int i = 0;
int indexpesan = -1;
while(karakter != '\0'){
karakter = code[i];
if(i % 3== 0){
indexpesan++;
m[indexpesan] += karakter * 1000000;
}else if(i % 3 ==1){
m[indexpesan] += karakter * 1000;
}else{
m[indexpesan] += karakter;
}
i++;
}
//printf("count : %d\n", indexpesan);
// nilai k //
srand(2018);
for (int i = 0; i < banyakdata; i++) {
k[i] = rand() % 3999999978;
}
}
ulint stringtolong(char* s){
ulint res = 0;
int i = 0;
while(s[i] != '\0'){
res *= 10;
res += s[i] - '0';
i++;
}
return res;
}
void initdekripsi(ulint *c) {
for (int i = 0; i < banyakdata*2; i++)
{
c[i] = 0;
}
char *buffer = 0;
long length;
FILE *f = fopen("cipher.cipher", "rb");
if (f)
{
fseek(f, 0, SEEK_END);
length = ftell(f);
fseek(f, 0, SEEK_SET);
buffer = (char*)malloc(length);
if (buffer) {
fread(buffer, 1, length, f);
}
buffer[length] = '\0';
fclose(f);
}
char delimstrip[2];
delimstrip[0] = 45;
delimstrip[1] = 0;
// Baca seluruh ciphertext
char *tempsplit;
tempsplit = strdup(strtok(buffer, delimstrip));
c[0] = stringtolong(tempsplit);
tempsplit = strdup(strtok(NULL, delimstrip));
c[1] = stringtolong(tempsplit);
// Baca m
for (int i = 1; i < banyakdata; i++) {
tempsplit = strdup(strtok(NULL, delimstrip));
c[2*i] = stringtolong(tempsplit);
tempsplit = strdup(strtok(NULL, delimstrip));
c[2*i+1] = stringtolong(tempsplit);
}
}
void initenkripsi2(ulint *m, ulint *k){
for (int i = 0; i < banyakdata; i++) {
m[i] = rand() % 3999999978;
k[i] = rand() % 3999999978;
}
}
void writecipher(ulint* c){
FILE *fp = fopen("cipher.cipher","w");
for (int i = 0; i < banyakdata*2; i++)
{
fprintf(fp, "%lu", c[i]);
fprintf(fp, "%c", '-');
}
fclose(fp);
}
void writedekrip(ulint* m){
FILE *fp = fopen("dekrip.dekrip","w");
for (int i = 0; i < banyakdata; i++)
{
ulint temp = m[i];
fprintf(fp, "%c", (unsigned char) (temp/1000000) );
fprintf(fp, "%c", (unsigned char) ((temp/1000) % 1000) );
fprintf(fp, "%c", (unsigned char) (temp % 1000));
}
fclose(fp);
}
int main(){
ulint *m, *k, *res, *res2, g, p, y, x, e, *res3;
m = (ulint*)malloc(banyakdata * sizeof(ulint));
k = (ulint*)malloc(banyakdata * sizeof(ulint));
res = (ulint*)malloc(banyakdata * 2 * sizeof(ulint));
res2 = (ulint*)malloc(banyakdata * sizeof(ulint));
res3 = (ulint*)malloc(banyakdata * 2 *sizeof(ulint));
srand(2018);
g = rand() % 3999999978;
p = 3999999979;
x = rand() % 3999999978;
modexp(g,x,p,&y);
initenkripsi(m, k);
//initenkripsi2(m, k);
// printf("<<<<<<<<<<<<<<Pesan Asli>>>>>>>>>>>>>>>\n");
// for (int i = 0; i < 4; i++) {
// printf("m[%d] = %lu\n", i, m[i]);
// }
// printf("m[...]\n");
// printf("m[%d] = %lu\n", banyakdata-1, m[banyakdata-1]);
enkripsiCUDA(m,k,g,p,y,res);
// printf("<<<<<<<<<<<<<<Hasil Enkripsi>>>>>>>>>>>>>>>\n");
// for (int i = 0; i < 4; i++) {
// printf("c[%d] = %lu c[%d] = %lu\n", 2*i, res[2*i], 2*i+1, res[2*i+1]);
// }
// printf("c ...\n");
// printf("c[%d] = %lu c[%d] = %lu\n", banyakdata * 2-2, res[banyakdata * 2-2], banyakdata *2-1,res[banyakdata*2-1]);
writecipher(res);
initdekripsi(res3);
e = p-x-1;
dekripsiCUDA(res3,p,e,res2);
// printf("<<<<<<<<<<<<<<Hasil Dekripsi>>>>>>>>>>>>>>>\n");
// for (int i = 0; i < 4; i++) {
// printf("m[%d] = %lu\n", i, res2[i]);
// }
// printf("m[...]\n");
// printf("m[%d] = %lu\n", banyakdata-1, res2[banyakdata-1]);
//writedekrip(res2);
free(m);
free(k);
free(res);
free(res2);
free(res3);
return 0;
} | .text
.file "32.hip"
.globl _Z6modexpmmmPm # -- Begin function _Z6modexpmmmPm
.p2align 4, 0x90
.type _Z6modexpmmmPm,@function
_Z6modexpmmmPm: # @_Z6modexpmmmPm
.cfi_startproc
# %bb.0:
testq %rsi, %rsi
je .LBB0_1
# %bb.2: # %.lr.ph.preheader
movq %rdx, %r8
movl $1, %r9d
jmp .LBB0_3
.p2align 4, 0x90
.LBB0_7: # in Loop: Header=BB0_3 Depth=1
movq %rsi, %rax
shrq %rax
cmpq $1, %rsi
movq %rax, %rsi
jbe .LBB0_8
.LBB0_3: # %.lr.ph
# =>This Inner Loop Header: Depth=1
testb $1, %sil
je .LBB0_5
# %bb.4: # in Loop: Header=BB0_3 Depth=1
imulq %rdi, %r9
movq %r9, %rax
xorl %edx, %edx
divq %r8
decq %rsi
movq %rdx, %r9
.LBB0_5: # in Loop: Header=BB0_3 Depth=1
cmpq $2, %rsi
jb .LBB0_7
# %bb.6: # in Loop: Header=BB0_3 Depth=1
imulq %rdi, %rdi
movq %rdi, %rax
xorl %edx, %edx
divq %r8
movq %rdx, %rdi
jmp .LBB0_7
.LBB0_8: # %._crit_edge
movq %r9, (%rcx)
retq
.LBB0_1:
movl $1, %r9d
movq %r9, (%rcx)
retq
.Lfunc_end0:
.size _Z6modexpmmmPm, .Lfunc_end0-_Z6modexpmmmPm
.cfi_endproc
# -- End function
.globl _Z8enkripsimmmmmPm # -- Begin function _Z8enkripsimmmmmPm
.p2align 4, 0x90
.type _Z8enkripsimmmmmPm,@function
_Z8enkripsimmmmmPm: # @_Z8enkripsimmmmmPm
.cfi_startproc
# %bb.0:
movq %r8, %r10
movq %rdx, %r8
testq %rsi, %rsi
je .LBB1_14
# %bb.1: # %.lr.ph.i.preheader
pushq %rbx
.cfi_def_cfa_offset 16
.cfi_offset %rbx, -16
movl $1, %r11d
movq %rsi, %rbx
jmp .LBB1_2
.p2align 4, 0x90
.LBB1_6: # in Loop: Header=BB1_2 Depth=1
movq %rbx, %rax
shrq %rax
cmpq $1, %rbx
movq %rax, %rbx
jbe .LBB1_7
.LBB1_2: # %.lr.ph.i
# =>This Inner Loop Header: Depth=1
testb $1, %bl
je .LBB1_4
# %bb.3: # in Loop: Header=BB1_2 Depth=1
imulq %rdi, %r11
movq %r11, %rax
xorl %edx, %edx
divq %r8
decq %rbx
movq %rdx, %r11
.LBB1_4: # in Loop: Header=BB1_2 Depth=1
cmpq $2, %rbx
jb .LBB1_6
# %bb.5: # in Loop: Header=BB1_2 Depth=1
imulq %rdi, %rdi
movq %rdi, %rax
xorl %edx, %edx
divq %r8
movq %rdx, %rdi
jmp .LBB1_6
.LBB1_7: # %_Z6modexpmmmPm.exit
movq %r11, (%r9)
testq %rsi, %rsi
popq %rbx
.cfi_def_cfa_offset 8
.cfi_restore %rbx
je .LBB1_15
# %bb.8: # %.lr.ph.i12.preheader
movl $1, %edi
jmp .LBB1_9
.p2align 4, 0x90
.LBB1_13: # in Loop: Header=BB1_9 Depth=1
movq %rsi, %rax
shrq %rax
cmpq $2, %rsi
movq %rax, %rsi
jb .LBB1_16
.LBB1_9: # %.lr.ph.i12
# =>This Inner Loop Header: Depth=1
testb $1, %sil
je .LBB1_11
# %bb.10: # in Loop: Header=BB1_9 Depth=1
imulq %r10, %rdi
movq %rdi, %rax
xorl %edx, %edx
divq %r8
decq %rsi
movq %rdx, %rdi
.LBB1_11: # in Loop: Header=BB1_9 Depth=1
cmpq $2, %rsi
jb .LBB1_13
# %bb.12: # in Loop: Header=BB1_9 Depth=1
imulq %r10, %r10
movq %r10, %rax
xorl %edx, %edx
divq %r8
movq %rdx, %r10
jmp .LBB1_13
.LBB1_14: # %_Z6modexpmmmPm.exit23.critedge
movq $1, (%r9)
.LBB1_15: # %_Z6modexpmmmPm.exit23
movl $1, %edi
.LBB1_16: # %_Z6modexpmmmPm.exit23
imulq %rcx, %rdi
movq %rdi, %rax
xorl %edx, %edx
divq %r8
movq %rdx, 8(%r9)
retq
.Lfunc_end1:
.size _Z8enkripsimmmmmPm, .Lfunc_end1-_Z8enkripsimmmmmPm
.cfi_endproc
# -- End function
.globl _Z8dekripsimmmmPm # -- Begin function _Z8dekripsimmmmPm
.p2align 4, 0x90
.type _Z8dekripsimmmmPm,@function
_Z8dekripsimmmmPm: # @_Z8dekripsimmmmPm
.cfi_startproc
# %bb.0:
movq %rdx, %r9
testq %rcx, %rcx
je .LBB2_1
# %bb.2: # %.lr.ph.i.preheader
movq %rdi, %r10
movl $1, %edi
jmp .LBB2_3
.p2align 4, 0x90
.LBB2_7: # in Loop: Header=BB2_3 Depth=1
movq %rcx, %rax
shrq %rax
cmpq $1, %rcx
movq %rax, %rcx
jbe .LBB2_8
.LBB2_3: # %.lr.ph.i
# =>This Inner Loop Header: Depth=1
testb $1, %cl
je .LBB2_5
# %bb.4: # in Loop: Header=BB2_3 Depth=1
imulq %r10, %rdi
movq %rdi, %rax
xorl %edx, %edx
divq %r9
decq %rcx
movq %rdx, %rdi
.LBB2_5: # in Loop: Header=BB2_3 Depth=1
cmpq $2, %rcx
jb .LBB2_7
# %bb.6: # in Loop: Header=BB2_3 Depth=1
imulq %r10, %r10
movq %r10, %rax
xorl %edx, %edx
divq %r9
movq %rdx, %r10
jmp .LBB2_7
.LBB2_1:
movl $1, %edi
.LBB2_8: # %_Z6modexpmmmPm.exit
imulq %rsi, %rdi
movq %rdi, %rax
xorl %edx, %edx
divq %r9
movq %rdx, (%r8)
retq
.Lfunc_end2:
.size _Z8dekripsimmmmPm, .Lfunc_end2-_Z8dekripsimmmmPm
.cfi_endproc
# -- End function
.globl _Z9kernelenkPmS_mmmS_ # -- Begin function _Z9kernelenkPmS_mmmS_
.p2align 4, 0x90
.type _Z9kernelenkPmS_mmmS_,@function
_Z9kernelenkPmS_mmmS_: # @_Z9kernelenkPmS_mmmS_
.cfi_startproc
# %bb.0:
pushq %rbp
.cfi_def_cfa_offset 16
pushq %r15
.cfi_def_cfa_offset 24
pushq %r14
.cfi_def_cfa_offset 32
pushq %r13
.cfi_def_cfa_offset 40
pushq %r12
.cfi_def_cfa_offset 48
pushq %rbx
.cfi_def_cfa_offset 56
.cfi_offset %rbx, -56
.cfi_offset %r12, -48
.cfi_offset %r13, -40
.cfi_offset %r14, -32
.cfi_offset %r15, -24
.cfi_offset %rbp, -16
movq %r8, -8(%rsp) # 8-byte Spill
movl banyakdata(%rip), %r14d
testl %r14d, %r14d
jle .LBB3_19
# %bb.1: # %.lr.ph.preheader
movq %rdx, %r8
xorl %r15d, %r15d
jmp .LBB3_2
.p2align 4, 0x90
.LBB3_16: # %_Z6modexpmmmPm.exit23.critedge.i
# in Loop: Header=BB3_2 Depth=1
movq $1, (%r9,%r12,8)
.LBB3_17: # %_Z8enkripsimmmmmPm.exit
# in Loop: Header=BB3_2 Depth=1
movl $1, %r11d
.LBB3_18: # %_Z8enkripsimmmmmPm.exit
# in Loop: Header=BB3_2 Depth=1
imulq %r13, %r11
movq %r11, %rax
xorl %edx, %edx
divq %rcx
movq %rdx, 8(%r9,%r12,8)
incq %r15
cmpq %r14, %r15
je .LBB3_19
.LBB3_2: # %.lr.ph
# =>This Loop Header: Depth=1
# Child Loop BB3_4 Depth 2
# Child Loop BB3_11 Depth 2
movq (%rsi,%r15,8), %r10
movq (%rdi,%r15,8), %r13
leaq (%r15,%r15), %r12
testq %r10, %r10
je .LBB3_16
# %bb.3: # %.lr.ph.i.i.preheader
# in Loop: Header=BB3_2 Depth=1
movl $1, %r11d
movq %r8, %rbx
movq %r10, %rbp
jmp .LBB3_4
.p2align 4, 0x90
.LBB3_8: # in Loop: Header=BB3_4 Depth=2
movq %rbp, %rax
shrq %rax
cmpq $1, %rbp
movq %rax, %rbp
jbe .LBB3_9
.LBB3_4: # %.lr.ph.i.i
# Parent Loop BB3_2 Depth=1
# => This Inner Loop Header: Depth=2
testb $1, %bpl
je .LBB3_6
# %bb.5: # in Loop: Header=BB3_4 Depth=2
imulq %rbx, %r11
movq %r11, %rax
xorl %edx, %edx
divq %rcx
decq %rbp
movq %rdx, %r11
.LBB3_6: # in Loop: Header=BB3_4 Depth=2
cmpq $2, %rbp
jb .LBB3_8
# %bb.7: # in Loop: Header=BB3_4 Depth=2
imulq %rbx, %rbx
movq %rbx, %rax
xorl %edx, %edx
divq %rcx
movq %rdx, %rbx
jmp .LBB3_8
.p2align 4, 0x90
.LBB3_9: # %_Z6modexpmmmPm.exit.i
# in Loop: Header=BB3_2 Depth=1
movq %r11, (%r9,%r12,8)
testq %r10, %r10
je .LBB3_17
# %bb.10: # %.lr.ph.i12.i.preheader
# in Loop: Header=BB3_2 Depth=1
movl $1, %r11d
movq -8(%rsp), %rbx # 8-byte Reload
jmp .LBB3_11
.p2align 4, 0x90
.LBB3_15: # in Loop: Header=BB3_11 Depth=2
movq %r10, %rax
shrq %rax
cmpq $2, %r10
movq %rax, %r10
jb .LBB3_18
.LBB3_11: # %.lr.ph.i12.i
# Parent Loop BB3_2 Depth=1
# => This Inner Loop Header: Depth=2
testb $1, %r10b
je .LBB3_13
# %bb.12: # in Loop: Header=BB3_11 Depth=2
imulq %rbx, %r11
movq %r11, %rax
xorl %edx, %edx
divq %rcx
decq %r10
movq %rdx, %r11
.LBB3_13: # in Loop: Header=BB3_11 Depth=2
cmpq $2, %r10
jb .LBB3_15
# %bb.14: # in Loop: Header=BB3_11 Depth=2
imulq %rbx, %rbx
movq %rbx, %rax
xorl %edx, %edx
divq %rcx
movq %rdx, %rbx
jmp .LBB3_15
.LBB3_19: # %._crit_edge
popq %rbx
.cfi_def_cfa_offset 48
popq %r12
.cfi_def_cfa_offset 40
popq %r13
.cfi_def_cfa_offset 32
popq %r14
.cfi_def_cfa_offset 24
popq %r15
.cfi_def_cfa_offset 16
popq %rbp
.cfi_def_cfa_offset 8
retq
.Lfunc_end3:
.size _Z9kernelenkPmS_mmmS_, .Lfunc_end3-_Z9kernelenkPmS_mmmS_
.cfi_endproc
# -- End function
.globl _Z9kerneldekPmmmS_ # -- Begin function _Z9kerneldekPmmmS_
.p2align 4, 0x90
.type _Z9kerneldekPmmmS_,@function
_Z9kerneldekPmmmS_: # @_Z9kerneldekPmmmS_
.cfi_startproc
# %bb.0:
movl banyakdata(%rip), %r11d
testl %r11d, %r11d
jle .LBB4_12
# %bb.1: # %.lr.ph
pushq %r15
.cfi_def_cfa_offset 16
pushq %r14
.cfi_def_cfa_offset 24
pushq %rbx
.cfi_def_cfa_offset 32
.cfi_offset %rbx, -32
.cfi_offset %r14, -24
.cfi_offset %r15, -16
movq %rdx, %r8
xorl %ebx, %ebx
jmp .LBB4_2
.p2align 4, 0x90
.LBB4_3: # in Loop: Header=BB4_2 Depth=1
movl $1, %r9d
.LBB4_10: # %_Z8dekripsimmmmPm.exit
# in Loop: Header=BB4_2 Depth=1
imulq %r14, %r9
movq %r9, %rax
xorl %edx, %edx
divq %rsi
movq %rdx, (%rcx,%rbx,8)
incq %rbx
cmpq %r11, %rbx
je .LBB4_11
.LBB4_2: # =>This Loop Header: Depth=1
# Child Loop BB4_5 Depth 2
movq %rbx, %rax
shlq $4, %rax
movq 8(%rdi,%rax), %r14
testq %r8, %r8
je .LBB4_3
# %bb.4: # %.lr.ph.i.i.preheader
# in Loop: Header=BB4_2 Depth=1
leaq (%rbx,%rbx), %rax
movq (%rdi,%rax,8), %r10
movl $1, %r9d
movq %r8, %r15
jmp .LBB4_5
.p2align 4, 0x90
.LBB4_9: # in Loop: Header=BB4_5 Depth=2
movq %r15, %rax
shrq %rax
cmpq $1, %r15
movq %rax, %r15
jbe .LBB4_10
.LBB4_5: # %.lr.ph.i.i
# Parent Loop BB4_2 Depth=1
# => This Inner Loop Header: Depth=2
testb $1, %r15b
je .LBB4_7
# %bb.6: # in Loop: Header=BB4_5 Depth=2
imulq %r10, %r9
movq %r9, %rax
xorl %edx, %edx
divq %rsi
decq %r15
movq %rdx, %r9
.LBB4_7: # in Loop: Header=BB4_5 Depth=2
cmpq $2, %r15
jb .LBB4_9
# %bb.8: # in Loop: Header=BB4_5 Depth=2
imulq %r10, %r10
movq %r10, %rax
xorl %edx, %edx
divq %rsi
movq %rdx, %r10
jmp .LBB4_9
.LBB4_11:
popq %rbx
.cfi_def_cfa_offset 24
popq %r14
.cfi_def_cfa_offset 16
popq %r15
.cfi_def_cfa_offset 8
.cfi_restore %rbx
.cfi_restore %r14
.cfi_restore %r15
.LBB4_12: # %._crit_edge
retq
.Lfunc_end4:
.size _Z9kerneldekPmmmS_, .Lfunc_end4-_Z9kerneldekPmmmS_
.cfi_endproc
# -- End function
.section .rodata.cst8,"aM",@progbits,8
.p2align 3, 0x0 # -- Begin function _Z12enkripsiCUDAPmS_mmmS_
.LCPI5_0:
.quad 0x408f400000000000 # double 1000
.text
.globl _Z12enkripsiCUDAPmS_mmmS_
.p2align 4, 0x90
.type _Z12enkripsiCUDAPmS_mmmS_,@function
_Z12enkripsiCUDAPmS_mmmS_: # @_Z12enkripsiCUDAPmS_mmmS_
.cfi_startproc
# %bb.0:
pushq %rbp
.cfi_def_cfa_offset 16
pushq %r15
.cfi_def_cfa_offset 24
pushq %r14
.cfi_def_cfa_offset 32
pushq %r13
.cfi_def_cfa_offset 40
pushq %r12
.cfi_def_cfa_offset 48
pushq %rbx
.cfi_def_cfa_offset 56
subq $24, %rsp
.cfi_def_cfa_offset 80
.cfi_offset %rbx, -56
.cfi_offset %r12, -48
.cfi_offset %r13, -40
.cfi_offset %r14, -32
.cfi_offset %r15, -24
.cfi_offset %rbp, -16
movq %r9, %rbx
movq %r8, 16(%rsp) # 8-byte Spill
movq %rcx, %r15
movq %rdx, %r13
movq %rsi, %rbp
movq %rdi, %r12
callq clock
movq %rax, 8(%rsp) # 8-byte Spill
movl banyakdata(%rip), %edi
testl %edi, %edi
jle .LBB5_19
# %bb.1: # %.lr.ph.preheader.i
xorl %r8d, %r8d
jmp .LBB5_2
.p2align 4, 0x90
.LBB5_16: # %_Z6modexpmmmPm.exit23.critedge.i.i
# in Loop: Header=BB5_2 Depth=1
movq $1, (%rbx,%r9,8)
.LBB5_17: # %_Z8enkripsimmmmmPm.exit.i
# in Loop: Header=BB5_2 Depth=1
movl $1, %ecx
.LBB5_18: # %_Z8enkripsimmmmmPm.exit.i
# in Loop: Header=BB5_2 Depth=1
imulq %r10, %rcx
movq %rcx, %rax
xorl %edx, %edx
divq %r15
movq %rdx, 8(%rbx,%r9,8)
incq %r8
cmpq %rdi, %r8
je .LBB5_19
.LBB5_2: # %.lr.ph.i
# =>This Loop Header: Depth=1
# Child Loop BB5_4 Depth 2
# Child Loop BB5_11 Depth 2
movq (%rbp,%r8,8), %r14
movq (%r12,%r8,8), %r10
leaq (%r8,%r8), %r9
testq %r14, %r14
je .LBB5_16
# %bb.3: # %.lr.ph.i.i.i.preheader
# in Loop: Header=BB5_2 Depth=1
movl $1, %ecx
movq %r13, %rsi
movq %r14, %r11
jmp .LBB5_4
.p2align 4, 0x90
.LBB5_8: # in Loop: Header=BB5_4 Depth=2
movq %r11, %rax
shrq %rax
cmpq $1, %r11
movq %rax, %r11
jbe .LBB5_9
.LBB5_4: # %.lr.ph.i.i.i
# Parent Loop BB5_2 Depth=1
# => This Inner Loop Header: Depth=2
testb $1, %r11b
je .LBB5_6
# %bb.5: # in Loop: Header=BB5_4 Depth=2
imulq %rsi, %rcx
movq %rcx, %rax
xorl %edx, %edx
divq %r15
decq %r11
movq %rdx, %rcx
.LBB5_6: # in Loop: Header=BB5_4 Depth=2
cmpq $2, %r11
jb .LBB5_8
# %bb.7: # in Loop: Header=BB5_4 Depth=2
imulq %rsi, %rsi
movq %rsi, %rax
xorl %edx, %edx
divq %r15
movq %rdx, %rsi
jmp .LBB5_8
.p2align 4, 0x90
.LBB5_9: # %_Z6modexpmmmPm.exit.i.i
# in Loop: Header=BB5_2 Depth=1
movq %rcx, (%rbx,%r9,8)
testq %r14, %r14
je .LBB5_17
# %bb.10: # %.lr.ph.i12.i.i.preheader
# in Loop: Header=BB5_2 Depth=1
movl $1, %ecx
movq 16(%rsp), %rsi # 8-byte Reload
jmp .LBB5_11
.p2align 4, 0x90
.LBB5_15: # in Loop: Header=BB5_11 Depth=2
movq %r14, %rax
shrq %rax
cmpq $2, %r14
movq %rax, %r14
jb .LBB5_18
.LBB5_11: # %.lr.ph.i12.i.i
# Parent Loop BB5_2 Depth=1
# => This Inner Loop Header: Depth=2
testb $1, %r14b
je .LBB5_13
# %bb.12: # in Loop: Header=BB5_11 Depth=2
imulq %rsi, %rcx
movq %rcx, %rax
xorl %edx, %edx
divq %r15
decq %r14
movq %rdx, %rcx
.LBB5_13: # in Loop: Header=BB5_11 Depth=2
cmpq $2, %r14
jb .LBB5_15
# %bb.14: # in Loop: Header=BB5_11 Depth=2
imulq %rsi, %rsi
movq %rsi, %rax
xorl %edx, %edx
divq %r15
movq %rdx, %rsi
jmp .LBB5_15
.LBB5_19: # %_Z9kernelenkPmS_mmmS_.exit
callq clock
subq 8(%rsp), %rax # 8-byte Folded Reload
cvtsi2sd %rax, %xmm0
divsd .LCPI5_0(%rip), %xmm0
movl $.L.str, %edi
movb $1, %al
addq $24, %rsp
.cfi_def_cfa_offset 56
popq %rbx
.cfi_def_cfa_offset 48
popq %r12
.cfi_def_cfa_offset 40
popq %r13
.cfi_def_cfa_offset 32
popq %r14
.cfi_def_cfa_offset 24
popq %r15
.cfi_def_cfa_offset 16
popq %rbp
.cfi_def_cfa_offset 8
jmp printf # TAILCALL
.Lfunc_end5:
.size _Z12enkripsiCUDAPmS_mmmS_, .Lfunc_end5-_Z12enkripsiCUDAPmS_mmmS_
.cfi_endproc
# -- End function
.section .rodata.cst8,"aM",@progbits,8
.p2align 3, 0x0 # -- Begin function _Z12dekripsiCUDAPmmmS_
.LCPI6_0:
.quad 0x408f400000000000 # double 1000
.text
.globl _Z12dekripsiCUDAPmmmS_
.p2align 4, 0x90
.type _Z12dekripsiCUDAPmmmS_,@function
_Z12dekripsiCUDAPmmmS_: # @_Z12dekripsiCUDAPmmmS_
.cfi_startproc
# %bb.0:
pushq %r15
.cfi_def_cfa_offset 16
pushq %r14
.cfi_def_cfa_offset 24
pushq %r13
.cfi_def_cfa_offset 32
pushq %r12
.cfi_def_cfa_offset 40
pushq %rbx
.cfi_def_cfa_offset 48
.cfi_offset %rbx, -48
.cfi_offset %r12, -40
.cfi_offset %r13, -32
.cfi_offset %r14, -24
.cfi_offset %r15, -16
movq %rcx, %rbx
movq %rdx, %r15
movq %rsi, %r12
movq %rdi, %r13
callq clock
movq %rax, %r14
movl banyakdata(%rip), %edi
testl %edi, %edi
jle .LBB6_11
# %bb.1: # %.lr.ph.i
xorl %r8d, %r8d
jmp .LBB6_2
.p2align 4, 0x90
.LBB6_3: # in Loop: Header=BB6_2 Depth=1
movl $1, %ecx
.LBB6_10: # %_Z8dekripsimmmmPm.exit.i
# in Loop: Header=BB6_2 Depth=1
imulq %r9, %rcx
movq %rcx, %rax
xorl %edx, %edx
divq %r12
movq %rdx, (%rbx,%r8,8)
incq %r8
cmpq %rdi, %r8
je .LBB6_11
.LBB6_2: # =>This Loop Header: Depth=1
# Child Loop BB6_5 Depth 2
movq %r8, %rax
shlq $4, %rax
movq 8(%r13,%rax), %r9
testq %r15, %r15
je .LBB6_3
# %bb.4: # %.lr.ph.i.i.preheader.i
# in Loop: Header=BB6_2 Depth=1
leaq (%r8,%r8), %rax
movq (%r13,%rax,8), %rsi
movl $1, %ecx
movq %r15, %r10
jmp .LBB6_5
.p2align 4, 0x90
.LBB6_9: # in Loop: Header=BB6_5 Depth=2
movq %r10, %rax
shrq %rax
cmpq $1, %r10
movq %rax, %r10
jbe .LBB6_10
.LBB6_5: # %.lr.ph.i.i.i
# Parent Loop BB6_2 Depth=1
# => This Inner Loop Header: Depth=2
testb $1, %r10b
je .LBB6_7
# %bb.6: # in Loop: Header=BB6_5 Depth=2
imulq %rsi, %rcx
movq %rcx, %rax
xorl %edx, %edx
divq %r12
decq %r10
movq %rdx, %rcx
.LBB6_7: # in Loop: Header=BB6_5 Depth=2
cmpq $2, %r10
jb .LBB6_9
# %bb.8: # in Loop: Header=BB6_5 Depth=2
imulq %rsi, %rsi
movq %rsi, %rax
xorl %edx, %edx
divq %r12
movq %rdx, %rsi
jmp .LBB6_9
.LBB6_11: # %_Z9kerneldekPmmmS_.exit
callq clock
subq %r14, %rax
cvtsi2sd %rax, %xmm0
divsd .LCPI6_0(%rip), %xmm0
movl $.L.str.1, %edi
movb $1, %al
popq %rbx
.cfi_def_cfa_offset 40
popq %r12
.cfi_def_cfa_offset 32
popq %r13
.cfi_def_cfa_offset 24
popq %r14
.cfi_def_cfa_offset 16
popq %r15
.cfi_def_cfa_offset 8
jmp printf # TAILCALL
.Lfunc_end6:
.size _Z12dekripsiCUDAPmmmS_, .Lfunc_end6-_Z12dekripsiCUDAPmmmS_
.cfi_endproc
# -- End function
.globl _Z12initenkripsiPmS_ # -- Begin function _Z12initenkripsiPmS_
.p2align 4, 0x90
.type _Z12initenkripsiPmS_,@function
_Z12initenkripsiPmS_: # @_Z12initenkripsiPmS_
.cfi_startproc
# %bb.0:
pushq %r15
.cfi_def_cfa_offset 16
pushq %r14
.cfi_def_cfa_offset 24
pushq %r13
.cfi_def_cfa_offset 32
pushq %r12
.cfi_def_cfa_offset 40
pushq %rbx
.cfi_def_cfa_offset 48
.cfi_offset %rbx, -48
.cfi_offset %r12, -40
.cfi_offset %r13, -32
.cfi_offset %r14, -24
.cfi_offset %r15, -16
movq %rsi, %rbx
movq %rdi, %r14
movl banyakdata(%rip), %edx
testl %edx, %edx
jle .LBB7_2
# %bb.1: # %.lr.ph.preheader
shlq $3, %rdx
movq %r14, %rdi
xorl %esi, %esi
callq memset@PLT
.LBB7_2: # %._crit_edge
movl $.L.str.2, %edi
movl $.L.str.3, %esi
callq fopen
movq %rax, %r12
movl $9999999, %edi # imm = 0x98967F
callq malloc
movq %rax, %r15
movq %r12, %rdi
callq fgetc
xorl %r13d, %r13d
cmpl $-1, %eax
je .LBB7_5
.p2align 4, 0x90
.LBB7_3: # %.lr.ph42
# =>This Inner Loop Header: Depth=1
movb %al, (%r15,%r13)
incq %r13
movq %r12, %rdi
callq fgetc
cmpl $-1, %eax
jne .LBB7_3
.LBB7_5: # %._crit_edge43
movb $0, (%r15,%r13)
cmpb $0, (%r15)
je .LBB7_13
# %bb.6: # %.lr.ph48.preheader
movl $-1, %eax
xorl %ecx, %ecx
movl $2863311531, %edx # imm = 0xAAAAAAAB
jmp .LBB7_7
.p2align 4, 0x90
.LBB7_10: # in Loop: Header=BB7_7 Depth=1
imulq $1000, %rsi, %rdi # imm = 0x3E8
.LBB7_12: # in Loop: Header=BB7_7 Depth=1
movslq %eax, %r8
addq %rdi, (%r14,%r8,8)
incq %r15
incl %ecx
testb %sil, %sil
je .LBB7_13
.LBB7_7: # %.lr.ph48
# =>This Inner Loop Header: Depth=1
movl %ecx, %esi
imulq %rdx, %rsi
shrq $33, %rsi
leal (%rsi,%rsi,2), %esi
movl %ecx, %edi
subl %esi, %edi
movsbq (%r15), %rsi
cmpl $1, %edi
je .LBB7_10
# %bb.8: # %.lr.ph48
# in Loop: Header=BB7_7 Depth=1
testl %edi, %edi
jne .LBB7_11
# %bb.9: # in Loop: Header=BB7_7 Depth=1
incl %eax
imulq $1000000, %rsi, %rdi # imm = 0xF4240
jmp .LBB7_12
.p2align 4, 0x90
.LBB7_11: # in Loop: Header=BB7_7 Depth=1
movq %rsi, %rdi
jmp .LBB7_12
.LBB7_13: # %._crit_edge49
movl $2018, %edi # imm = 0x7E2
callq srand
cmpl $0, banyakdata(%rip)
jle .LBB7_16
# %bb.14: # %.lr.ph52.preheader
xorl %r14d, %r14d
.p2align 4, 0x90
.LBB7_15: # %.lr.ph52
# =>This Inner Loop Header: Depth=1
callq rand
cltq
movq %rax, (%rbx,%r14,8)
incq %r14
movslq banyakdata(%rip), %rax
cmpq %rax, %r14
jl .LBB7_15
.LBB7_16: # %._crit_edge53
popq %rbx
.cfi_def_cfa_offset 40
popq %r12
.cfi_def_cfa_offset 32
popq %r13
.cfi_def_cfa_offset 24
popq %r14
.cfi_def_cfa_offset 16
popq %r15
.cfi_def_cfa_offset 8
retq
.Lfunc_end7:
.size _Z12initenkripsiPmS_, .Lfunc_end7-_Z12initenkripsiPmS_
.cfi_endproc
# -- End function
.globl _Z12stringtolongPc # -- Begin function _Z12stringtolongPc
.p2align 4, 0x90
.type _Z12stringtolongPc,@function
_Z12stringtolongPc: # @_Z12stringtolongPc
.cfi_startproc
# %bb.0:
movzbl (%rdi), %ecx
testb %cl, %cl
je .LBB8_1
# %bb.3: # %.lr.ph.preheader
incq %rdi
xorl %eax, %eax
.p2align 4, 0x90
.LBB8_4: # %.lr.ph
# =>This Inner Loop Header: Depth=1
movsbq %cl, %rcx
leaq (%rax,%rax,4), %rax
leaq (%rcx,%rax,2), %rax
addq $-48, %rax
movzbl (%rdi), %ecx
incq %rdi
testb %cl, %cl
jne .LBB8_4
# %bb.2: # %._crit_edge
retq
.LBB8_1:
xorl %eax, %eax
retq
.Lfunc_end8:
.size _Z12stringtolongPc, .Lfunc_end8-_Z12stringtolongPc
.cfi_endproc
# -- End function
.globl _Z12initdekripsiPm # -- Begin function _Z12initdekripsiPm
.p2align 4, 0x90
.type _Z12initdekripsiPm,@function
_Z12initdekripsiPm: # @_Z12initdekripsiPm
.cfi_startproc
# %bb.0:
pushq %r15
.cfi_def_cfa_offset 16
pushq %r14
.cfi_def_cfa_offset 24
pushq %r12
.cfi_def_cfa_offset 32
pushq %rbx
.cfi_def_cfa_offset 40
pushq %rax
.cfi_def_cfa_offset 48
.cfi_offset %rbx, -40
.cfi_offset %r12, -32
.cfi_offset %r14, -24
.cfi_offset %r15, -16
movq %rdi, %rbx
movl banyakdata(%rip), %eax
testl %eax, %eax
jle .LBB9_2
# %bb.1: # %.lr.ph.preheader
addl %eax, %eax
cmpl $2, %eax
movl $1, %edx
cmovgel %eax, %edx
shlq $3, %rdx
movq %rbx, %rdi
xorl %esi, %esi
callq memset@PLT
.LBB9_2: # %._crit_edge
movl $.L.str.4, %edi
movl $.L.str.5, %esi
callq fopen
testq %rax, %rax
je .LBB9_3
# %bb.4:
movq %rax, %r14
movq %rax, %rdi
xorl %esi, %esi
movl $2, %edx
callq fseek
movq %r14, %rdi
callq ftell
movq %rax, %r12
movq %r14, %rdi
xorl %esi, %esi
xorl %edx, %edx
callq fseek
movq %r12, %rdi
callq malloc
movq %rax, %r15
testq %rax, %rax
je .LBB9_6
# %bb.5:
movl $1, %esi
movq %r15, %rdi
movq %r12, %rdx
movq %r14, %rcx
callq fread
.LBB9_6:
movb $0, (%r15,%r12)
movq %r14, %rdi
callq fclose
jmp .LBB9_7
.LBB9_3:
xorl %r15d, %r15d
.LBB9_7:
movw $45, 6(%rsp)
leaq 6(%rsp), %rsi
movq %r15, %rdi
callq strtok
movq %rax, %rdi
callq strdup
movzbl (%rax), %edx
testb %dl, %dl
je .LBB9_8
# %bb.9: # %.lr.ph.i.preheader
incq %rax
xorl %ecx, %ecx
.p2align 4, 0x90
.LBB9_10: # %.lr.ph.i
# =>This Inner Loop Header: Depth=1
movsbq %dl, %rdx
leaq (%rcx,%rcx,4), %rcx
leaq (%rdx,%rcx,2), %rcx
addq $-48, %rcx
movzbl (%rax), %edx
incq %rax
testb %dl, %dl
jne .LBB9_10
jmp .LBB9_11
.LBB9_8:
xorl %ecx, %ecx
.LBB9_11: # %_Z12stringtolongPc.exit
movq %rcx, (%rbx)
xorl %r14d, %r14d
leaq 6(%rsp), %rsi
xorl %edi, %edi
callq strtok
movq %rax, %rdi
callq strdup
movzbl (%rax), %ecx
testb %cl, %cl
je .LBB9_14
# %bb.12: # %.lr.ph.i34.preheader
incq %rax
xorl %r14d, %r14d
.p2align 4, 0x90
.LBB9_13: # %.lr.ph.i34
# =>This Inner Loop Header: Depth=1
movsbq %cl, %rcx
leaq (%r14,%r14,4), %rdx
leaq (%rcx,%rdx,2), %r14
addq $-48, %r14
movzbl (%rax), %ecx
incq %rax
testb %cl, %cl
jne .LBB9_13
.LBB9_14: # %_Z12stringtolongPc.exit40
movq %r14, 8(%rbx)
cmpl $2, banyakdata(%rip)
jl .LBB9_23
# %bb.15: # %.lr.ph62.preheader
movl $1, %r15d
leaq 6(%rsp), %r14
jmp .LBB9_16
.p2align 4, 0x90
.LBB9_22: # %_Z12stringtolongPc.exit56
# in Loop: Header=BB9_16 Depth=1
leaq (%r15,%r15), %rax
movq %rdx, 8(%rbx,%rax,8)
incq %r15
movslq banyakdata(%rip), %rax
cmpq %rax, %r15
jge .LBB9_23
.LBB9_16: # %.lr.ph62
# =>This Loop Header: Depth=1
# Child Loop BB9_18 Depth 2
# Child Loop BB9_21 Depth 2
xorl %edi, %edi
movq %r14, %rsi
callq strtok
movq %rax, %rdi
callq strdup
movzbl (%rax), %ecx
movl $0, %edx
testb %cl, %cl
je .LBB9_19
# %bb.17: # %.lr.ph.i42.preheader
# in Loop: Header=BB9_16 Depth=1
incq %rax
xorl %edx, %edx
.p2align 4, 0x90
.LBB9_18: # %.lr.ph.i42
# Parent Loop BB9_16 Depth=1
# => This Inner Loop Header: Depth=2
movsbq %cl, %rcx
leaq (%rdx,%rdx,4), %rdx
leaq (%rcx,%rdx,2), %rdx
addq $-48, %rdx
movzbl (%rax), %ecx
incq %rax
testb %cl, %cl
jne .LBB9_18
.LBB9_19: # %_Z12stringtolongPc.exit48
# in Loop: Header=BB9_16 Depth=1
movq %r15, %rax
shlq $4, %rax
movq %rdx, (%rbx,%rax)
xorl %edi, %edi
movq %r14, %rsi
callq strtok
movq %rax, %rdi
callq strdup
movzbl (%rax), %ecx
movl $0, %edx
testb %cl, %cl
je .LBB9_22
# %bb.20: # %.lr.ph.i50.preheader
# in Loop: Header=BB9_16 Depth=1
incq %rax
xorl %edx, %edx
.p2align 4, 0x90
.LBB9_21: # %.lr.ph.i50
# Parent Loop BB9_16 Depth=1
# => This Inner Loop Header: Depth=2
movsbq %cl, %rcx
leaq (%rdx,%rdx,4), %rdx
leaq (%rcx,%rdx,2), %rdx
addq $-48, %rdx
movzbl (%rax), %ecx
incq %rax
testb %cl, %cl
jne .LBB9_21
jmp .LBB9_22
.LBB9_23: # %._crit_edge63
addq $8, %rsp
.cfi_def_cfa_offset 40
popq %rbx
.cfi_def_cfa_offset 32
popq %r12
.cfi_def_cfa_offset 24
popq %r14
.cfi_def_cfa_offset 16
popq %r15
.cfi_def_cfa_offset 8
retq
.Lfunc_end9:
.size _Z12initdekripsiPm, .Lfunc_end9-_Z12initdekripsiPm
.cfi_endproc
# -- End function
.globl _Z13initenkripsi2PmS_ # -- Begin function _Z13initenkripsi2PmS_
.p2align 4, 0x90
.type _Z13initenkripsi2PmS_,@function
_Z13initenkripsi2PmS_: # @_Z13initenkripsi2PmS_
.cfi_startproc
# %bb.0:
cmpl $0, banyakdata(%rip)
jle .LBB10_4
# %bb.1: # %.lr.ph.preheader
pushq %r15
.cfi_def_cfa_offset 16
pushq %r14
.cfi_def_cfa_offset 24
pushq %rbx
.cfi_def_cfa_offset 32
.cfi_offset %rbx, -32
.cfi_offset %r14, -24
.cfi_offset %r15, -16
movq %rsi, %rbx
movq %rdi, %r14
xorl %r15d, %r15d
.p2align 4, 0x90
.LBB10_2: # %.lr.ph
# =>This Inner Loop Header: Depth=1
callq rand
cltq
movq %rax, (%r14,%r15,8)
callq rand
cltq
movq %rax, (%rbx,%r15,8)
incq %r15
movslq banyakdata(%rip), %rax
cmpq %rax, %r15
jl .LBB10_2
# %bb.3:
popq %rbx
.cfi_def_cfa_offset 24
popq %r14
.cfi_def_cfa_offset 16
popq %r15
.cfi_def_cfa_offset 8
.cfi_restore %rbx
.cfi_restore %r14
.cfi_restore %r15
.LBB10_4: # %._crit_edge
retq
.Lfunc_end10:
.size _Z13initenkripsi2PmS_, .Lfunc_end10-_Z13initenkripsi2PmS_
.cfi_endproc
# -- End function
.globl _Z11writecipherPm # -- Begin function _Z11writecipherPm
.p2align 4, 0x90
.type _Z11writecipherPm,@function
_Z11writecipherPm: # @_Z11writecipherPm
.cfi_startproc
# %bb.0:
pushq %r15
.cfi_def_cfa_offset 16
pushq %r14
.cfi_def_cfa_offset 24
pushq %rbx
.cfi_def_cfa_offset 32
.cfi_offset %rbx, -32
.cfi_offset %r14, -24
.cfi_offset %r15, -16
movq %rdi, %rbx
movl $.L.str.4, %edi
movl $.L.str.6, %esi
callq fopen
movq %rax, %r14
cmpl $0, banyakdata(%rip)
jle .LBB11_3
# %bb.1: # %.lr.ph.preheader
xorl %r15d, %r15d
.p2align 4, 0x90
.LBB11_2: # %.lr.ph
# =>This Inner Loop Header: Depth=1
movq (%rbx,%r15,8), %rdx
movl $.L.str.7, %esi
movq %r14, %rdi
xorl %eax, %eax
callq fprintf
movl $45, %edi
movq %r14, %rsi
callq fputc@PLT
incq %r15
movslq banyakdata(%rip), %rax
addq %rax, %rax
cmpq %rax, %r15
jl .LBB11_2
.LBB11_3: # %._crit_edge
movq %r14, %rdi
popq %rbx
.cfi_def_cfa_offset 24
popq %r14
.cfi_def_cfa_offset 16
popq %r15
.cfi_def_cfa_offset 8
jmp fclose # TAILCALL
.Lfunc_end11:
.size _Z11writecipherPm, .Lfunc_end11-_Z11writecipherPm
.cfi_endproc
# -- End function
.globl _Z11writedekripPm # -- Begin function _Z11writedekripPm
.p2align 4, 0x90
.type _Z11writedekripPm,@function
_Z11writedekripPm: # @_Z11writedekripPm
.cfi_startproc
# %bb.0:
pushq %rbp
.cfi_def_cfa_offset 16
pushq %r15
.cfi_def_cfa_offset 24
pushq %r14
.cfi_def_cfa_offset 32
pushq %r13
.cfi_def_cfa_offset 40
pushq %r12
.cfi_def_cfa_offset 48
pushq %rbx
.cfi_def_cfa_offset 56
pushq %rax
.cfi_def_cfa_offset 64
.cfi_offset %rbx, -56
.cfi_offset %r12, -48
.cfi_offset %r13, -40
.cfi_offset %r14, -32
.cfi_offset %r15, -24
.cfi_offset %rbp, -16
movq %rdi, %rbx
movl $.L.str.9, %edi
movl $.L.str.6, %esi
callq fopen
movq %rax, %r14
cmpl $0, banyakdata(%rip)
jle .LBB12_3
# %bb.1: # %.lr.ph.preheader
xorl %r13d, %r13d
movabsq $18446744073709552, %rbp # imm = 0x4189374BC6A7F0
.p2align 4, 0x90
.LBB12_2: # %.lr.ph
# =>This Inner Loop Header: Depth=1
movq (%rbx,%r13,8), %r15
movq %r15, %rax
movabsq $4835703278458516699, %rcx # imm = 0x431BDE82D7B634DB
mulq %rcx
shrl $18, %edx
movzbl %dl, %edi
movq %r14, %rsi
callq fputc@PLT
movq %r15, %rax
shrq $3, %rax
movabsq $2361183241434822607, %rcx # imm = 0x20C49BA5E353F7CF
mulq %rcx
movq %rdx, %r12
shrq $4, %r12
movq %r12, %rax
mulq %rbp
imull $1000, %edx, %eax # imm = 0x3E8
movl %r12d, %ecx
subl %eax, %ecx
movzbl %cl, %edi
movq %r14, %rsi
callq fputc@PLT
imull $1000, %r12d, %eax # imm = 0x3E8
subl %eax, %r15d
movzbl %r15b, %edi
movq %r14, %rsi
callq fputc@PLT
incq %r13
movslq banyakdata(%rip), %rax
cmpq %rax, %r13
jl .LBB12_2
.LBB12_3: # %._crit_edge
movq %r14, %rdi
addq $8, %rsp
.cfi_def_cfa_offset 56
popq %rbx
.cfi_def_cfa_offset 48
popq %r12
.cfi_def_cfa_offset 40
popq %r13
.cfi_def_cfa_offset 32
popq %r14
.cfi_def_cfa_offset 24
popq %r15
.cfi_def_cfa_offset 16
popq %rbp
.cfi_def_cfa_offset 8
jmp fclose # TAILCALL
.Lfunc_end12:
.size _Z11writedekripPm, .Lfunc_end12-_Z11writedekripPm
.cfi_endproc
# -- End function
.section .rodata.cst8,"aM",@progbits,8
.p2align 3, 0x0 # -- Begin function main
.LCPI13_0:
.quad 0x408f400000000000 # double 1000
.text
.globl main
.p2align 4, 0x90
.type main,@function
main: # @main
.cfi_startproc
# %bb.0:
pushq %rbp
.cfi_def_cfa_offset 16
pushq %r15
.cfi_def_cfa_offset 24
pushq %r14
.cfi_def_cfa_offset 32
pushq %r13
.cfi_def_cfa_offset 40
pushq %r12
.cfi_def_cfa_offset 48
pushq %rbx
.cfi_def_cfa_offset 56
pushq %rax
.cfi_def_cfa_offset 64
.cfi_offset %rbx, -56
.cfi_offset %r12, -48
.cfi_offset %r13, -40
.cfi_offset %r14, -32
.cfi_offset %r15, -24
.cfi_offset %rbp, -16
movslq banyakdata(%rip), %r12
leaq (,%r12,8), %r14
movq %r14, %rdi
callq malloc
movq %rax, %rbx
movq %r14, %rdi
callq malloc
movq %rax, %r14
shlq $4, %r12
movq %r12, %rdi
callq malloc
movq %rax, %r15
movq %r12, %rdi
callq malloc
movq %rax, %r12
movl $2018, %edi # imm = 0x7E2
callq srand
callq rand
movslq %eax, %r13
callq rand
testl %eax, %eax
je .LBB13_1
# %bb.2: # %.lr.ph.i.preheader
movslq %eax, %r8
movl $1, %ebp
movabsq $1360296658843496629, %rsi # imm = 0x12E0BE9AA38470B5
movl $3999999979, %edi # imm = 0xEE6B27EB
movq %r13, %rcx
jmp .LBB13_3
.p2align 4, 0x90
.LBB13_7: # in Loop: Header=BB13_3 Depth=1
movq %r8, %rax
shrq %rax
cmpq $1, %r8
movq %rax, %r8
jbe .LBB13_8
.LBB13_3: # %.lr.ph.i
# =>This Inner Loop Header: Depth=1
testb $1, %r8b
je .LBB13_5
# %bb.4: # in Loop: Header=BB13_3 Depth=1
imulq %rcx, %rbp
movq %rbp, %rax
mulq %rsi
movq %rbp, %rax
subq %rdx, %rax
shrq %rax
addq %rdx, %rax
shrq $31, %rax
imulq %rdi, %rax
subq %rax, %rbp
decq %r8
.LBB13_5: # in Loop: Header=BB13_3 Depth=1
cmpq $2, %r8
jb .LBB13_7
# %bb.6: # in Loop: Header=BB13_3 Depth=1
imulq %rcx, %rcx
movq %rcx, %rax
mulq %rsi
movq %rcx, %rax
subq %rdx, %rax
shrq %rax
addq %rdx, %rax
shrq $31, %rax
imulq %rdi, %rax
subq %rax, %rcx
jmp .LBB13_7
.LBB13_1:
movl $1, %ebp
.LBB13_8: # %_Z6modexpmmmPm.exit
movq %rbx, %rdi
movq %r14, %rsi
callq _Z12initenkripsiPmS_
movl $3999999979, %ecx # imm = 0xEE6B27EB
movq %rbx, %rdi
movq %r14, %rsi
movq %r13, %rdx
movq %rbp, %r8
movq %r15, %r9
callq _Z12enkripsiCUDAPmS_mmmS_
movl $.L.str.4, %edi
movl $.L.str.6, %esi
callq fopen
movq %rax, %r13
cmpl $0, banyakdata(%rip)
jle .LBB13_11
# %bb.9: # %.lr.ph.i22.preheader
xorl %ebp, %ebp
.p2align 4, 0x90
.LBB13_10: # %.lr.ph.i22
# =>This Inner Loop Header: Depth=1
movq (%r15,%rbp,8), %rdx
movl $.L.str.7, %esi
movq %r13, %rdi
xorl %eax, %eax
callq fprintf
movl $45, %edi
movq %r13, %rsi
callq fputc@PLT
incq %rbp
movslq banyakdata(%rip), %rax
addq %rax, %rax
cmpq %rax, %rbp
jl .LBB13_10
.LBB13_11: # %_Z11writecipherPm.exit
movq %r13, %rdi
callq fclose
movq %r12, %rdi
callq _Z12initdekripsiPm
callq clock
movq %rax, %r13
callq clock
subq %r13, %rax
cvtsi2sd %rax, %xmm0
divsd .LCPI13_0(%rip), %xmm0
movl $.L.str.1, %edi
movb $1, %al
callq printf
movq %rbx, %rdi
callq free
movq %r14, %rdi
callq free
movq %r15, %rdi
callq free
movq %r12, %rdi
callq free
xorl %eax, %eax
addq $8, %rsp
.cfi_def_cfa_offset 56
popq %rbx
.cfi_def_cfa_offset 48
popq %r12
.cfi_def_cfa_offset 40
popq %r13
.cfi_def_cfa_offset 32
popq %r14
.cfi_def_cfa_offset 24
popq %r15
.cfi_def_cfa_offset 16
popq %rbp
.cfi_def_cfa_offset 8
retq
.Lfunc_end13:
.size main, .Lfunc_end13-main
.cfi_endproc
# -- End function
.type banyakdata,@object # @banyakdata
.data
.globl banyakdata
.p2align 2, 0x0
banyakdata:
.long 10240 # 0x2800
.size banyakdata, 4
.type dimensigrid,@object # @dimensigrid
.globl dimensigrid
.p2align 2, 0x0
dimensigrid:
.long 80 # 0x50
.size dimensigrid, 4
.type dimensiblok,@object # @dimensiblok
.globl dimensiblok
.p2align 2, 0x0
dimensiblok:
.long 128 # 0x80
.size dimensiblok, 4
.type .L.str,@object # @.str
.section .rodata.str1.1,"aMS",@progbits,1
.L.str:
.asciz "Durasi enkripsi: %f ms\n"
.size .L.str, 24
.type .L.str.1,@object # @.str.1
.L.str.1:
.asciz "Durasi dekripsi: %f ms\n"
.size .L.str.1, 24
.type .L.str.2,@object # @.str.2
.L.str.2:
.asciz "plain.plain"
.size .L.str.2, 12
.type .L.str.3,@object # @.str.3
.L.str.3:
.asciz "r"
.size .L.str.3, 2
.type .L.str.4,@object # @.str.4
.L.str.4:
.asciz "cipher.cipher"
.size .L.str.4, 14
.type .L.str.5,@object # @.str.5
.L.str.5:
.asciz "rb"
.size .L.str.5, 3
.type .L.str.6,@object # @.str.6
.L.str.6:
.asciz "w"
.size .L.str.6, 2
.type .L.str.7,@object # @.str.7
.L.str.7:
.asciz "%lu"
.size .L.str.7, 4
.type .L.str.9,@object # @.str.9
.L.str.9:
.asciz "dekrip.dekrip"
.size .L.str.9, 14
.type __hip_cuid_,@object # @__hip_cuid_
.bss
.globl __hip_cuid_
__hip_cuid_:
.byte 0 # 0x0
.size __hip_cuid_, 1
.section ".linker-options","e",@llvm_linker_options
.ident "AMD clang version 18.0.0git (https://github.com/RadeonOpenCompute/llvm-project roc-6.3.2 25012 e5bf7e55c91490b07c49d8960fa7983d864936c4)"
.section ".note.GNU-stack","",@progbits
.addrsig
.addrsig_sym __hip_cuid_ |
You are a helpful coding assistant specialized in converting from CUDA device assembly to AMD device assembly. | code for sm_80 | .text
.p2alignl 7, 3214868480
.fill 96, 4, 3214868480
.type __hip_cuid_,@object
.section .bss,"aw",@nobits
.globl __hip_cuid_
__hip_cuid_:
.byte 0
.size __hip_cuid_, 1
.ident "AMD clang version 18.0.0git (https://github.com/RadeonOpenCompute/llvm-project roc-6.3.2 25012 e5bf7e55c91490b07c49d8960fa7983d864936c4)"
.section ".note.GNU-stack","",@progbits
.addrsig
.addrsig_sym __hip_cuid_
.amdgcn_target "amdgcn-amd-amdhsa--gfx1100"
.amdgpu_metadata
---
amdhsa.kernels: []
amdhsa.target: amdgcn-amd-amdhsa--gfx1100
amdhsa.version:
- 1
- 2
...
.end_amdgpu_metadata |
You are a helpful coding assistant specialized in converting CUDA source code to CUDA device assembly. | /*
Contributors: Yizhao Gao (yizhaotsccsj@gmail.com)
*/
#include <stdio.h>
#include <math.h>
#include "io.cuh"
#include "kde.cuh"
#include <sys/time.h>
//dpbKDE inputPopFile inputHHFile outputFileName outputCount xMin yMin xMax yMax cellSize bandwidth mapLogic
int dpbKDE(char * inputPopFileName, char * inputHHFileName, char * outputFileName, char * outputCount, float xMin, float yMin, float xMax, float yMax, float cellSize, float bandwidth, char * subPop, char * mapLogic, char * personColName, int epsgCode)
{
//Uboyt
FILE * inputPopData;
FILE * inputHHData;
char outputRatioGTiffFile[200];
char outputPopulationFile[200];
bool hhOnly;
float * xCol;
float * yCol;
float * pCount;
float * cCount;
int nRow, nCol, nHH, nPop, nCase = 0;
float * caseDen;
float * popDen;
struct timeval time1;
gettimeofday(&time1, NULL);
if(strcmp(inputPopFileName, "-HHO") == 0)
{
hhOnly = true;
}
else
{
hhOnly = false;
if(NULL == (inputPopData = fopen(inputPopFileName, "r")))
{
printf("ERROR: Can't open input population file: %s\n", inputPopFileName);
exit(1);
}
}
if(NULL == (inputHHData = fopen(inputHHFileName, "r")))
{
printf("ERROR: Can't open input household file: %s\n", inputHHFileName);
exit(1);
}
sprintf(outputPopulationFile, "%s_P", outputFileName);
sprintf(outputRatioGTiffFile, "%s.tif", outputFileName);
//Cells
nCol = ceil((xMax - xMin)/cellSize);
nRow = ceil((yMax - yMin)/cellSize);
xMax = xMin + cellSize * nCol;
yMax = yMin + cellSize * nRow;
//printf("####################\n");
//printf("nRow: %d\tnCol: %d\n", nRow, nCol);
//printf("xMax: %f\txMin: %f\nyMax: %f\tyMin: %f\n",xMax,xMin,yMax,yMin);
//printf("####################\n");
//Points
nHH = getHHNum(inputHHData);
if(NULL == (xCol = (float *)malloc(sizeof(float) * nHH)))
{
printf("ERROR: Out of memory in line %d!\n", __LINE__);
exit(1);
}
if(NULL == (yCol = (float *)malloc(sizeof(float) * nHH)))
{
printf("ERROR: Out of memory in line %d!\n", __LINE__);
exit(1);
}
if(NULL == (pCount = (float *)malloc(sizeof(float) * nHH)))
{
printf("ERROR: Out of memory in line %d!\n", __LINE__);
exit(1);
}
if(NULL == (cCount = (float *)malloc(sizeof(float) * nHH)))
{
printf("ERROR: Out of memory in line %d!\n", __LINE__);
exit(1);
}
bool succeed;
if(hhOnly)
{
if(strcmp(subPop, "*") == 0)
{
succeed = readPointsH(inputHHData, nHH, nCase, xCol, yCol, pCount, cCount, mapLogic);
}
else
{
succeed = readPointsHInSubPop(inputHHData, nHH, nCase, xCol, yCol, pCount, cCount, subPop, mapLogic);
}
if(!succeed)
{
printf("File involved: %s\n", inputHHFileName);
exit(1);
}
//printf("num of household: %d\nnum of positive household: %d\n", nHH, nCase);
//printf("####################\n");
}
else
{
if(strcmp(subPop, "*") == 0)
{
succeed = readPointsP(inputHHData, inputPopData, nHH, nPop, nCase, xCol, yCol, pCount, cCount, mapLogic, personColName);
}
else
{
succeed = readPointsPInSubPop(inputHHData, inputPopData, nHH, nPop, nCase, xCol, yCol, pCount, cCount, subPop, mapLogic, personColName);
}
if(!succeed)
{
printf("File involved: %s and\\or %s\n", inputHHFileName, inputPopFileName);
exit(1);
}
//printf("num of household: %d\nnum of population: %d\nnum of case: %d\n", nHH, nPop, nCase);
//printf("####################\n");
}
fclose(inputHHData);
if(!hhOnly)
{
fclose(inputPopData);
}
struct timeval time2;
gettimeofday(&time2, NULL);
//KDE
if(NULL == (caseDen = (float *) malloc(sizeof(float) * nRow * nCol)))
{
printf("ERROR: Out of memory in %d!\n", __LINE__);
exit(1);
}
if(NULL == (popDen = (float *) malloc(sizeof(float) * nRow * nCol)))
{
printf("ERROR: Out of memory in %d!\n", __LINE__);
exit(1);
}
for(int i = 0; i < nRow * nCol; i++)
{
caseDen[i] = 0;
popDen[i] = 0;
}
int x, y;
if(bandwidth > 1)
{
kde(caseDen, popDen, nRow, nCol, cellSize, xMin, yMax, xCol, yCol, pCount, cCount, nHH, bandwidth);
//filter out non-value areas
bool * hasValue;
if(NULL == (hasValue = (bool *) malloc (sizeof(float) * nRow * nCol)))
{
printf("ERROR: Out of memory in %d!\n", __LINE__);
exit(1);
}
for(int i = 0; i < nCol * nRow; i++)
{
hasValue[i] = false;
}
for(int i = 0; i < nHH; i++)
{
x = (xCol[i] - xMin) / cellSize;
y = (yMax - yCol[i]) / cellSize;
//if(x < 0 || x >= nCol || y < 0 || y >= nRow)
//{
// printf("%d\t%f\t%f\n", i, xCol[i], yCol[i]);
//}
if(x > -1 && x < nCol && y > -1 && y < nRow && !hasValue[y * nCol + x])
hasValue[y * nCol + x] = true;
}
for(int i = 0; i < nRow * nCol; i++)
{
if(!hasValue[i])
{
caseDen[i] = 0;
popDen[i] = 0;
}
}
free(hasValue);
}
else
{
for(int i = 0; i < nHH; i++)
{
x = (xCol[i] - xMin) / cellSize;
y = (yMax - yCol[i]) / cellSize;
if(x >= 0 && x < nCol && y >= 0 && y < nRow)
{
caseDen[y * nCol + x] += cCount[i];
popDen[y * nCol + x] += pCount[i];
}
}
}
struct timeval time3;
gettimeofday(&time3, NULL);
printf("Input time:\t%lfms\n", ((&time2)->tv_sec - (&time1)->tv_sec) * 1000 + (double)((&time2)->tv_usec - (&time1)->tv_usec) / 1000);
printf("KDE time:\t%lfms\n", ((&time3)->tv_sec - (&time2)->tv_sec) * 1000 + (double)((&time3)->tv_usec - (&time2)->tv_usec) / 1000);
//Write outputFile
FILE * outputFile;
if(NULL == (outputFile = fopen(outputFileName, "wb")))
{
printf("ERROR: Can't open output file");
exit(1);
}
fwrite(caseDen, sizeof(float), nRow * nCol, outputFile);
fclose(outputFile);
//Generate ascii grid
/*
if(NULL == (outputFile = fopen(outputRatioGTiffFile, "w")))
{
printf("ERROR: Can't open output ratio file: %s\n", outputRatioGTiffFile);
exit(1);
}
writeGridRatio(outputFile, caseDen, popDen, nRow, nCol, xMin, yMin, cellSize);
fclose(outputFile);
*/
//Generate GeoTiff
writeGeoTiffRatio(outputRatioGTiffFile, caseDen, popDen, nRow, nCol, xMin, yMax, cellSize, epsgCode);
if(NULL == (outputFile = fopen(outputPopulationFile, "wb")))
{
printf("ERROR: Can't open output population file: %s\n", outputPopulationFile);
exit(1);
}
fwrite(popDen, sizeof(float), nRow * nCol, outputFile);
fclose(outputFile);
// This part is used to be used to calcuate the likelihood, but is no longer used
if(NULL == (outputFile = fopen(outputCount, "a")))
{
printf("ERROR: Can't open output population and count file: %s\n", outputCount);
exit(1);
}
if(hhOnly)
{
fprintf(outputFile, "%s %d %d\n", outputFileName, nHH, nCase);
}
else
{
fprintf(outputFile, "%s %d %d\n", outputFileName, nPop, nCase);
}
fclose(outputFile);
//free
free(xCol);
free(yCol);
free(pCount);
free(cCount);
free(caseDen);
free(popDen);
//printf("Finished!\n");
return 0;
} | code for sm_80 |
You are a helpful coding assistant specialized in converting CUDA source code to CUDA host assembly. | /*
Contributors: Yizhao Gao (yizhaotsccsj@gmail.com)
*/
#include <stdio.h>
#include <math.h>
#include "io.cuh"
#include "kde.cuh"
#include <sys/time.h>
//dpbKDE inputPopFile inputHHFile outputFileName outputCount xMin yMin xMax yMax cellSize bandwidth mapLogic
int dpbKDE(char * inputPopFileName, char * inputHHFileName, char * outputFileName, char * outputCount, float xMin, float yMin, float xMax, float yMax, float cellSize, float bandwidth, char * subPop, char * mapLogic, char * personColName, int epsgCode)
{
//Uboyt
FILE * inputPopData;
FILE * inputHHData;
char outputRatioGTiffFile[200];
char outputPopulationFile[200];
bool hhOnly;
float * xCol;
float * yCol;
float * pCount;
float * cCount;
int nRow, nCol, nHH, nPop, nCase = 0;
float * caseDen;
float * popDen;
struct timeval time1;
gettimeofday(&time1, NULL);
if(strcmp(inputPopFileName, "-HHO") == 0)
{
hhOnly = true;
}
else
{
hhOnly = false;
if(NULL == (inputPopData = fopen(inputPopFileName, "r")))
{
printf("ERROR: Can't open input population file: %s\n", inputPopFileName);
exit(1);
}
}
if(NULL == (inputHHData = fopen(inputHHFileName, "r")))
{
printf("ERROR: Can't open input household file: %s\n", inputHHFileName);
exit(1);
}
sprintf(outputPopulationFile, "%s_P", outputFileName);
sprintf(outputRatioGTiffFile, "%s.tif", outputFileName);
//Cells
nCol = ceil((xMax - xMin)/cellSize);
nRow = ceil((yMax - yMin)/cellSize);
xMax = xMin + cellSize * nCol;
yMax = yMin + cellSize * nRow;
//printf("####################\n");
//printf("nRow: %d\tnCol: %d\n", nRow, nCol);
//printf("xMax: %f\txMin: %f\nyMax: %f\tyMin: %f\n",xMax,xMin,yMax,yMin);
//printf("####################\n");
//Points
nHH = getHHNum(inputHHData);
if(NULL == (xCol = (float *)malloc(sizeof(float) * nHH)))
{
printf("ERROR: Out of memory in line %d!\n", __LINE__);
exit(1);
}
if(NULL == (yCol = (float *)malloc(sizeof(float) * nHH)))
{
printf("ERROR: Out of memory in line %d!\n", __LINE__);
exit(1);
}
if(NULL == (pCount = (float *)malloc(sizeof(float) * nHH)))
{
printf("ERROR: Out of memory in line %d!\n", __LINE__);
exit(1);
}
if(NULL == (cCount = (float *)malloc(sizeof(float) * nHH)))
{
printf("ERROR: Out of memory in line %d!\n", __LINE__);
exit(1);
}
bool succeed;
if(hhOnly)
{
if(strcmp(subPop, "*") == 0)
{
succeed = readPointsH(inputHHData, nHH, nCase, xCol, yCol, pCount, cCount, mapLogic);
}
else
{
succeed = readPointsHInSubPop(inputHHData, nHH, nCase, xCol, yCol, pCount, cCount, subPop, mapLogic);
}
if(!succeed)
{
printf("File involved: %s\n", inputHHFileName);
exit(1);
}
//printf("num of household: %d\nnum of positive household: %d\n", nHH, nCase);
//printf("####################\n");
}
else
{
if(strcmp(subPop, "*") == 0)
{
succeed = readPointsP(inputHHData, inputPopData, nHH, nPop, nCase, xCol, yCol, pCount, cCount, mapLogic, personColName);
}
else
{
succeed = readPointsPInSubPop(inputHHData, inputPopData, nHH, nPop, nCase, xCol, yCol, pCount, cCount, subPop, mapLogic, personColName);
}
if(!succeed)
{
printf("File involved: %s and\\or %s\n", inputHHFileName, inputPopFileName);
exit(1);
}
//printf("num of household: %d\nnum of population: %d\nnum of case: %d\n", nHH, nPop, nCase);
//printf("####################\n");
}
fclose(inputHHData);
if(!hhOnly)
{
fclose(inputPopData);
}
struct timeval time2;
gettimeofday(&time2, NULL);
//KDE
if(NULL == (caseDen = (float *) malloc(sizeof(float) * nRow * nCol)))
{
printf("ERROR: Out of memory in %d!\n", __LINE__);
exit(1);
}
if(NULL == (popDen = (float *) malloc(sizeof(float) * nRow * nCol)))
{
printf("ERROR: Out of memory in %d!\n", __LINE__);
exit(1);
}
for(int i = 0; i < nRow * nCol; i++)
{
caseDen[i] = 0;
popDen[i] = 0;
}
int x, y;
if(bandwidth > 1)
{
kde(caseDen, popDen, nRow, nCol, cellSize, xMin, yMax, xCol, yCol, pCount, cCount, nHH, bandwidth);
//filter out non-value areas
bool * hasValue;
if(NULL == (hasValue = (bool *) malloc (sizeof(float) * nRow * nCol)))
{
printf("ERROR: Out of memory in %d!\n", __LINE__);
exit(1);
}
for(int i = 0; i < nCol * nRow; i++)
{
hasValue[i] = false;
}
for(int i = 0; i < nHH; i++)
{
x = (xCol[i] - xMin) / cellSize;
y = (yMax - yCol[i]) / cellSize;
//if(x < 0 || x >= nCol || y < 0 || y >= nRow)
//{
// printf("%d\t%f\t%f\n", i, xCol[i], yCol[i]);
//}
if(x > -1 && x < nCol && y > -1 && y < nRow && !hasValue[y * nCol + x])
hasValue[y * nCol + x] = true;
}
for(int i = 0; i < nRow * nCol; i++)
{
if(!hasValue[i])
{
caseDen[i] = 0;
popDen[i] = 0;
}
}
free(hasValue);
}
else
{
for(int i = 0; i < nHH; i++)
{
x = (xCol[i] - xMin) / cellSize;
y = (yMax - yCol[i]) / cellSize;
if(x >= 0 && x < nCol && y >= 0 && y < nRow)
{
caseDen[y * nCol + x] += cCount[i];
popDen[y * nCol + x] += pCount[i];
}
}
}
struct timeval time3;
gettimeofday(&time3, NULL);
printf("Input time:\t%lfms\n", ((&time2)->tv_sec - (&time1)->tv_sec) * 1000 + (double)((&time2)->tv_usec - (&time1)->tv_usec) / 1000);
printf("KDE time:\t%lfms\n", ((&time3)->tv_sec - (&time2)->tv_sec) * 1000 + (double)((&time3)->tv_usec - (&time2)->tv_usec) / 1000);
//Write outputFile
FILE * outputFile;
if(NULL == (outputFile = fopen(outputFileName, "wb")))
{
printf("ERROR: Can't open output file");
exit(1);
}
fwrite(caseDen, sizeof(float), nRow * nCol, outputFile);
fclose(outputFile);
//Generate ascii grid
/*
if(NULL == (outputFile = fopen(outputRatioGTiffFile, "w")))
{
printf("ERROR: Can't open output ratio file: %s\n", outputRatioGTiffFile);
exit(1);
}
writeGridRatio(outputFile, caseDen, popDen, nRow, nCol, xMin, yMin, cellSize);
fclose(outputFile);
*/
//Generate GeoTiff
writeGeoTiffRatio(outputRatioGTiffFile, caseDen, popDen, nRow, nCol, xMin, yMax, cellSize, epsgCode);
if(NULL == (outputFile = fopen(outputPopulationFile, "wb")))
{
printf("ERROR: Can't open output population file: %s\n", outputPopulationFile);
exit(1);
}
fwrite(popDen, sizeof(float), nRow * nCol, outputFile);
fclose(outputFile);
// This part is used to be used to calcuate the likelihood, but is no longer used
if(NULL == (outputFile = fopen(outputCount, "a")))
{
printf("ERROR: Can't open output population and count file: %s\n", outputCount);
exit(1);
}
if(hhOnly)
{
fprintf(outputFile, "%s %d %d\n", outputFileName, nHH, nCase);
}
else
{
fprintf(outputFile, "%s %d %d\n", outputFileName, nPop, nCase);
}
fclose(outputFile);
//free
free(xCol);
free(yCol);
free(pCount);
free(cCount);
free(caseDen);
free(popDen);
//printf("Finished!\n");
return 0;
} | .file "tmpxft_00001d83_00000000-6_dpbKDE.cudafe1.cpp"
.text
#APP
#NO_APP
.type _ZL26__cudaUnregisterBinaryUtilv, @function
_ZL26__cudaUnregisterBinaryUtilv:
.LFB2060:
.cfi_startproc
endbr64
subq $8, %rsp
.cfi_def_cfa_offset 16
movq _ZL20__cudaFatCubinHandle(%rip), %rdi
call __cudaUnregisterFatBinary@PLT
addq $8, %rsp
.cfi_def_cfa_offset 8
ret
.cfi_endproc
.LFE2060:
.size _ZL26__cudaUnregisterBinaryUtilv, .-_ZL26__cudaUnregisterBinaryUtilv
.section .rodata.str1.1,"aMS",@progbits,1
.LC0:
.string "-HHO"
.LC1:
.string "r"
.section .rodata.str1.8,"aMS",@progbits,1
.align 8
.LC2:
.string "ERROR: Can't open input population file: %s\n"
.align 8
.LC3:
.string "ERROR: Can't open input household file: %s\n"
.section .rodata.str1.1
.LC4:
.string "%s_P"
.LC5:
.string "%s.tif"
.section .rodata.str1.8
.align 8
.LC9:
.string "ERROR: Out of memory in line %d!\n"
.section .rodata.str1.1
.LC10:
.string "*"
.LC11:
.string "File involved: %s\n"
.LC12:
.string "File involved: %s and\\or %s\n"
.LC13:
.string "ERROR: Out of memory in %d!\n"
.LC16:
.string "Input time:\t%lfms\n"
.LC17:
.string "KDE time:\t%lfms\n"
.LC18:
.string "wb"
.LC19:
.string "ERROR: Can't open output file"
.section .rodata.str1.8
.align 8
.LC20:
.string "ERROR: Can't open output population file: %s\n"
.section .rodata.str1.1
.LC21:
.string "a"
.section .rodata.str1.8
.align 8
.LC22:
.string "ERROR: Can't open output population and count file: %s\n"
.section .rodata.str1.1
.LC23:
.string "%s %d %d\n"
.text
.globl _Z6dpbKDEPcS_S_S_ffffffS_S_S_i
.type _Z6dpbKDEPcS_S_S_ffffffS_S_S_i, @function
_Z6dpbKDEPcS_S_S_ffffffS_S_S_i:
.LFB2057:
.cfi_startproc
endbr64
pushq %r15
.cfi_def_cfa_offset 16
.cfi_offset 15, -16
pushq %r14
.cfi_def_cfa_offset 24
.cfi_offset 14, -24
pushq %r13
.cfi_def_cfa_offset 32
.cfi_offset 13, -32
pushq %r12
.cfi_def_cfa_offset 40
.cfi_offset 12, -40
pushq %rbp
.cfi_def_cfa_offset 48
.cfi_offset 6, -48
pushq %rbx
.cfi_def_cfa_offset 56
.cfi_offset 3, -56
subq $600, %rsp
.cfi_def_cfa_offset 656
movq %rdi, %r15
movq %rdi, 104(%rsp)
movq %rsi, 64(%rsp)
movq %rdx, 24(%rsp)
movq %rcx, 88(%rsp)
movss %xmm0, 16(%rsp)
movss %xmm1, 32(%rsp)
movss %xmm2, 20(%rsp)
movss %xmm3, 40(%rsp)
movss %xmm4, 12(%rsp)
movss %xmm5, 76(%rsp)
movq %r8, 56(%rsp)
movq %r9, 80(%rsp)
movq 656(%rsp), %rbx
movq %fs:40, %rax
movq %rax, 584(%rsp)
xorl %eax, %eax
movl $0, 124(%rsp)
leaq 128(%rsp), %rdi
movl $0, %esi
call gettimeofday@PLT
leaq .LC0(%rip), %rsi
movq %r15, %rdi
call strcmp@PLT
testl %eax, %eax
je .L47
leaq .LC1(%rip), %rsi
movq %r15, %rdi
call fopen@PLT
movq %rax, 96(%rsp)
testq %rax, %rax
je .L65
movb $0, 75(%rsp)
jmp .L4
.L65:
movq 104(%rsp), %rdx
leaq .LC2(%rip), %rsi
movl $2, %edi
call __printf_chk@PLT
movl $1, %edi
call exit@PLT
.L47:
movb $1, 75(%rsp)
.L4:
leaq .LC1(%rip), %rsi
movq 64(%rsp), %rdi
call fopen@PLT
movq %rax, %rbp
testq %rax, %rax
je .L66
leaq 384(%rsp), %rdi
movq 24(%rsp), %r15
movq %r15, %r8
leaq .LC4(%rip), %rcx
movl $200, %edx
movl $2, %esi
movl $0, %eax
call __sprintf_chk@PLT
leaq 176(%rsp), %rdi
movq %r15, %r8
leaq .LC5(%rip), %rcx
movl $200, %edx
movl $2, %esi
movl $0, %eax
call __sprintf_chk@PLT
movss 20(%rsp), %xmm0
subss 16(%rsp), %xmm0
divss 12(%rsp), %xmm0
movaps %xmm0, %xmm3
movss .LC24(%rip), %xmm2
movaps %xmm0, %xmm1
andps %xmm2, %xmm1
movss .LC6(%rip), %xmm4
ucomiss %xmm1, %xmm4
jbe .L6
cvttss2sil %xmm0, %eax
pxor %xmm1, %xmm1
cvtsi2ssl %eax, %xmm1
cmpnless %xmm1, %xmm3
movss .LC8(%rip), %xmm4
andps %xmm4, %xmm3
addss %xmm1, %xmm3
andnps %xmm0, %xmm2
orps %xmm2, %xmm3
.L6:
cvttss2sil %xmm3, %r13d
movss 40(%rsp), %xmm0
subss 32(%rsp), %xmm0
divss 12(%rsp), %xmm0
movaps %xmm0, %xmm3
movss .LC24(%rip), %xmm2
movaps %xmm0, %xmm1
andps %xmm2, %xmm1
movss .LC6(%rip), %xmm4
ucomiss %xmm1, %xmm4
jbe .L7
cvttss2sil %xmm0, %eax
pxor %xmm1, %xmm1
cvtsi2ssl %eax, %xmm1
cmpnless %xmm1, %xmm3
movss .LC8(%rip), %xmm4
andps %xmm4, %xmm3
addss %xmm1, %xmm3
andnps %xmm0, %xmm2
orps %xmm2, %xmm3
.L7:
cvttss2sil %xmm3, %eax
movl %eax, 20(%rsp)
pxor %xmm0, %xmm0
cvtsi2ssl %eax, %xmm0
mulss 12(%rsp), %xmm0
addss 32(%rsp), %xmm0
movss %xmm0, 52(%rsp)
movq %rbp, %rdi
call _Z8getHHNumP8_IO_FILE@PLT
movl %eax, 48(%rsp)
cltq
leaq 0(,%rax,4), %r14
movq %r14, %rdi
call malloc@PLT
movq %rax, %r12
testq %rax, %rax
je .L67
movq %r14, %rdi
call malloc@PLT
movq %rax, %r15
testq %rax, %rax
je .L68
movq %r14, %rdi
call malloc@PLT
movq %rax, 32(%rsp)
testq %rax, %rax
je .L69
movq %r14, %rdi
call malloc@PLT
movq %rax, 40(%rsp)
testq %rax, %rax
je .L70
cmpb $0, 75(%rsp)
je .L12
leaq .LC10(%rip), %rsi
movq 56(%rsp), %rdi
call strcmp@PLT
testl %eax, %eax
jne .L13
leaq 124(%rsp), %rdx
pushq 80(%rsp)
.cfi_def_cfa_offset 664
pushq 48(%rsp)
.cfi_def_cfa_offset 672
movq 48(%rsp), %r9
movq %r15, %r8
movq %r12, %rcx
movl 64(%rsp), %esi
movq %rbp, %rdi
call _Z11readPointsHP8_IO_FILEiRiPfS2_S2_S2_Pc@PLT
addq $16, %rsp
.cfi_def_cfa_offset 656
.L14:
testb %al, %al
je .L71
movq %rbp, %rdi
call fclose@PLT
.L43:
leaq 144(%rsp), %rdi
movl $0, %esi
call gettimeofday@PLT
movslq 20(%rsp), %rax
movslq %r13d, %rdx
imulq %rdx, %rax
movq %rax, 56(%rsp)
salq $2, %rax
movq %rax, 64(%rsp)
movq %rax, %rdi
call malloc@PLT
movq %rax, %rbx
testq %rax, %rax
je .L72
movq 64(%rsp), %rdi
call malloc@PLT
movq %rax, %rbp
testq %rax, %rax
je .L20
movl 20(%rsp), %ecx
imull %r13d, %ecx
movl %ecx, 80(%rsp)
movslq %ecx, %rdx
salq $2, %rdx
movl $0, %eax
testl %ecx, %ecx
jle .L22
.L23:
movl $0x00000000, (%rbx,%rax)
movl $0x00000000, 0(%rbp,%rax)
addq $4, %rax
cmpq %rdx, %rax
jne .L23
.L22:
movss 76(%rsp), %xmm2
comiss .LC8(%rip), %xmm2
ja .L24
movl $0, %eax
cmpl $0, 48(%rsp)
jle .L26
movl 20(%rsp), %ecx
movss 52(%rsp), %xmm1
movq 32(%rsp), %rsi
movq 40(%rsp), %rdi
jmp .L25
.L66:
movq 64(%rsp), %rdx
leaq .LC3(%rip), %rsi
movl $2, %edi
movl $0, %eax
call __printf_chk@PLT
movl $1, %edi
call exit@PLT
.L67:
movl $77, %edx
leaq .LC9(%rip), %rsi
movl $2, %edi
movl $0, %eax
call __printf_chk@PLT
movl $1, %edi
call exit@PLT
.L68:
movl $82, %edx
leaq .LC9(%rip), %rsi
movl $2, %edi
movl $0, %eax
call __printf_chk@PLT
movl $1, %edi
call exit@PLT
.L69:
movl $87, %edx
leaq .LC9(%rip), %rsi
movl $2, %edi
call __printf_chk@PLT
movl $1, %edi
call exit@PLT
.L70:
movl $92, %edx
leaq .LC9(%rip), %rsi
movl $2, %edi
call __printf_chk@PLT
movl $1, %edi
call exit@PLT
.L13:
leaq 124(%rsp), %rdx
subq $8, %rsp
.cfi_def_cfa_offset 664
pushq 88(%rsp)
.cfi_def_cfa_offset 672
pushq 72(%rsp)
.cfi_def_cfa_offset 680
pushq 64(%rsp)
.cfi_def_cfa_offset 688
movq 64(%rsp), %r9
movq %r15, %r8
movq %r12, %rcx
movl 80(%rsp), %esi
movq %rbp, %rdi
call _Z19readPointsHInSubPopP8_IO_FILEiRiPfS2_S2_S2_PcS3_@PLT
addq $32, %rsp
.cfi_def_cfa_offset 656
jmp .L14
.L71:
movq 64(%rsp), %rdx
leaq .LC11(%rip), %rsi
movl $2, %edi
call __printf_chk@PLT
movl $1, %edi
call exit@PLT
.L12:
leaq .LC10(%rip), %rsi
movq 56(%rsp), %rdi
call strcmp@PLT
testl %eax, %eax
jne .L16
leaq 120(%rsp), %rcx
subq $8, %rsp
.cfi_def_cfa_offset 664
pushq %rbx
.cfi_def_cfa_offset 672
pushq 96(%rsp)
.cfi_def_cfa_offset 680
pushq 64(%rsp)
.cfi_def_cfa_offset 688
pushq 64(%rsp)
.cfi_def_cfa_offset 696
pushq %r15
.cfi_def_cfa_offset 704
movq %r12, %r9
leaq 172(%rsp), %r8
movl 96(%rsp), %edx
movq 144(%rsp), %rsi
movq %rbp, %rdi
call _Z11readPointsPP8_IO_FILES0_iRiS1_PfS2_S2_S2_PcS3_@PLT
addq $48, %rsp
.cfi_def_cfa_offset 656
.L17:
testb %al, %al
je .L73
movq %rbp, %rdi
call fclose@PLT
movq 96(%rsp), %rdi
call fclose@PLT
jmp .L43
.L16:
leaq 120(%rsp), %rcx
pushq %rbx
.cfi_def_cfa_offset 664
pushq 88(%rsp)
.cfi_def_cfa_offset 672
pushq 72(%rsp)
.cfi_def_cfa_offset 680
pushq 64(%rsp)
.cfi_def_cfa_offset 688
pushq 64(%rsp)
.cfi_def_cfa_offset 696
pushq %r15
.cfi_def_cfa_offset 704
movq %r12, %r9
leaq 172(%rsp), %r8
movl 96(%rsp), %edx
movq 144(%rsp), %rsi
movq %rbp, %rdi
call _Z19readPointsPInSubPopP8_IO_FILES0_iRiS1_PfS2_S2_S2_PcS3_S3_@PLT
addq $48, %rsp
.cfi_def_cfa_offset 656
jmp .L17
.L73:
movq 104(%rsp), %rcx
movq 64(%rsp), %rdx
leaq .LC12(%rip), %rsi
movl $2, %edi
call __printf_chk@PLT
movl $1, %edi
call exit@PLT
.L72:
movl $149, %edx
leaq .LC13(%rip), %rsi
movl $2, %edi
movl $0, %eax
call __printf_chk@PLT
movl $1, %edi
call exit@PLT
.L20:
movl $155, %edx
leaq .LC13(%rip), %rsi
movl $2, %edi
movl $0, %eax
call __printf_chk@PLT
movl $1, %edi
call exit@PLT
.L24:
subq $8, %rsp
.cfi_def_cfa_offset 664
movl 56(%rsp), %eax
pushq %rax
.cfi_def_cfa_offset 672
pushq 56(%rsp)
.cfi_def_cfa_offset 680
pushq 56(%rsp)
.cfi_def_cfa_offset 688
movss 108(%rsp), %xmm3
movq %r15, %r9
movq %r12, %r8
movss 84(%rsp), %xmm2
movss 48(%rsp), %xmm1
movss 44(%rsp), %xmm0
movl %r13d, %ecx
movl 52(%rsp), %edx
movq %rbp, %rsi
movq %rbx, %rdi
call _Z3kdePfS_iifffS_S_S_S_if@PLT
addq $32, %rsp
.cfi_def_cfa_offset 656
movq 64(%rsp), %rdi
call malloc@PLT
movq %rax, %rdi
testq %rax, %rax
je .L27
movl 80(%rsp), %ecx
movslq %ecx, %rdx
addq %rax, %rdx
testl %ecx, %ecx
jle .L74
.L30:
movb $0, (%rax)
addq $1, %rax
cmpq %rdx, %rax
jne .L30
cmpl $0, 48(%rsp)
jle .L45
.L44:
movl $0, %eax
movl 20(%rsp), %ecx
movss 52(%rsp), %xmm1
jmp .L33
.L27:
movl $174, %edx
leaq .LC13(%rip), %rsi
movl $2, %edi
movl $0, %eax
call __printf_chk@PLT
movl $1, %edi
call exit@PLT
.L32:
addq $4, %rax
cmpq %rax, %r14
je .L75
.L33:
movss (%r12,%rax), %xmm0
subss 16(%rsp), %xmm0
movss 12(%rsp), %xmm5
divss %xmm5, %xmm0
cvttss2sil %xmm0, %esi
testl %esi, %esi
js .L32
cmpl %esi, %r13d
jle .L32
movaps %xmm1, %xmm0
subss (%r15,%rax), %xmm0
divss %xmm5, %xmm0
cvttss2sil %xmm0, %edx
testl %edx, %edx
js .L32
cmpl %edx, %ecx
jle .L32
imull %r13d, %edx
addl %esi, %edx
movslq %edx, %rdx
addq %rdi, %rdx
cmpb $0, (%rdx)
jne .L32
movb $1, (%rdx)
jmp .L32
.L75:
cmpl $0, 80(%rsp)
jle .L34
.L45:
movslq 80(%rsp), %r14
movl $0, %eax
jmp .L36
.L35:
addq $1, %rax
cmpq %r14, %rax
je .L34
.L36:
cmpb $0, (%rdi,%rax)
jne .L35
movl $0x00000000, (%rbx,%rax,4)
movl $0x00000000, 0(%rbp,%rax,4)
jmp .L35
.L37:
addq $4, %rax
cmpq %rax, %r14
je .L26
.L25:
movss (%r12,%rax), %xmm0
subss 16(%rsp), %xmm0
movss 12(%rsp), %xmm6
divss %xmm6, %xmm0
cvttss2sil %xmm0, %r8d
testl %r8d, %r8d
js .L37
cmpl %r8d, %r13d
jle .L37
movaps %xmm1, %xmm0
subss (%r15,%rax), %xmm0
divss %xmm6, %xmm0
cvttss2sil %xmm0, %edx
testl %edx, %edx
js .L37
cmpl %edx, %ecx
jle .L37
imull %r13d, %edx
addl %r8d, %edx
movslq %edx, %rdx
salq $2, %rdx
leaq (%rbx,%rdx), %r8
movss (%r8), %xmm0
addss (%rdi,%rax), %xmm0
movss %xmm0, (%r8)
addq %rbp, %rdx
movss (%rdx), %xmm0
addss (%rsi,%rax), %xmm0
movss %xmm0, (%rdx)
jmp .L37
.L76:
leaq .LC19(%rip), %rsi
movl $2, %edi
movl $0, %eax
call __printf_chk@PLT
movl $1, %edi
call exit@PLT
.L77:
leaq 384(%rsp), %rdx
leaq .LC20(%rip), %rsi
movl $2, %edi
movl $0, %eax
call __printf_chk@PLT
movl $1, %edi
call exit@PLT
.L78:
movq 88(%rsp), %rdx
leaq .LC22(%rip), %rsi
movl $2, %edi
movl $0, %eax
call __printf_chk@PLT
movl $1, %edi
call exit@PLT
.L41:
movl 124(%rsp), %r9d
movl 120(%rsp), %r8d
movq 24(%rsp), %rcx
leaq .LC23(%rip), %rdx
movl $2, %esi
movq %rax, %rdi
movl $0, %eax
call __fprintf_chk@PLT
jmp .L42
.L74:
cmpl $0, 48(%rsp)
jg .L44
.L34:
call free@PLT
.L26:
leaq 160(%rsp), %rdi
movl $0, %esi
call gettimeofday@PLT
movq 144(%rsp), %rax
subq 128(%rsp), %rax
imulq $1000, %rax, %rax
pxor %xmm0, %xmm0
cvtsi2sdq %rax, %xmm0
movq 152(%rsp), %rax
subq 136(%rsp), %rax
pxor %xmm1, %xmm1
cvtsi2sdq %rax, %xmm1
divsd .LC15(%rip), %xmm1
addsd %xmm1, %xmm0
leaq .LC16(%rip), %rsi
movl $2, %edi
movl $1, %eax
call __printf_chk@PLT
movq 160(%rsp), %rax
subq 144(%rsp), %rax
imulq $1000, %rax, %rax
pxor %xmm0, %xmm0
cvtsi2sdq %rax, %xmm0
movq 168(%rsp), %rax
subq 152(%rsp), %rax
pxor %xmm1, %xmm1
cvtsi2sdq %rax, %xmm1
divsd .LC15(%rip), %xmm1
addsd %xmm1, %xmm0
leaq .LC17(%rip), %rsi
movl $2, %edi
movl $1, %eax
call __printf_chk@PLT
leaq .LC18(%rip), %rsi
movq 24(%rsp), %rdi
call fopen@PLT
movq %rax, %r14
testq %rax, %rax
je .L76
movq %rax, %rcx
movq 56(%rsp), %rdx
movl $4, %esi
movq %rbx, %rdi
call fwrite@PLT
movq %r14, %rdi
call fclose@PLT
leaq 176(%rsp), %rdi
movl 664(%rsp), %r9d
movss 12(%rsp), %xmm2
movss 52(%rsp), %xmm1
movss 16(%rsp), %xmm0
movl %r13d, %r8d
movl 20(%rsp), %ecx
movq %rbp, %rdx
movq %rbx, %rsi
call _Z17writeGeoTiffRatioPcPfS0_iifffi@PLT
leaq 384(%rsp), %rdi
leaq .LC18(%rip), %rsi
call fopen@PLT
movq %rax, %r13
testq %rax, %rax
je .L77
movq %rax, %rcx
movq 56(%rsp), %rdx
movl $4, %esi
movq %rbp, %rdi
call fwrite@PLT
movq %r13, %rdi
call fclose@PLT
leaq .LC21(%rip), %rsi
movq 88(%rsp), %rdi
call fopen@PLT
movq %rax, %r13
testq %rax, %rax
je .L78
cmpb $0, 75(%rsp)
je .L41
movl 124(%rsp), %r9d
movl 48(%rsp), %r8d
movq 24(%rsp), %rcx
leaq .LC23(%rip), %rdx
movl $2, %esi
movq %rax, %rdi
movl $0, %eax
call __fprintf_chk@PLT
.L42:
movq %r13, %rdi
call fclose@PLT
movq %r12, %rdi
call free@PLT
movq %r15, %rdi
call free@PLT
movq 32(%rsp), %rdi
call free@PLT
movq 40(%rsp), %rdi
call free@PLT
movq %rbx, %rdi
call free@PLT
movq %rbp, %rdi
call free@PLT
movq 584(%rsp), %rax
subq %fs:40, %rax
jne .L79
movl $0, %eax
addq $600, %rsp
.cfi_remember_state
.cfi_def_cfa_offset 56
popq %rbx
.cfi_def_cfa_offset 48
popq %rbp
.cfi_def_cfa_offset 40
popq %r12
.cfi_def_cfa_offset 32
popq %r13
.cfi_def_cfa_offset 24
popq %r14
.cfi_def_cfa_offset 16
popq %r15
.cfi_def_cfa_offset 8
ret
.L79:
.cfi_restore_state
call __stack_chk_fail@PLT
.cfi_endproc
.LFE2057:
.size _Z6dpbKDEPcS_S_S_ffffffS_S_S_i, .-_Z6dpbKDEPcS_S_S_ffffffS_S_S_i
.type _ZL24__sti____cudaRegisterAllv, @function
_ZL24__sti____cudaRegisterAllv:
.LFB2083:
.cfi_startproc
endbr64
subq $8, %rsp
.cfi_def_cfa_offset 16
leaq _ZL15__fatDeviceText(%rip), %rdi
call __cudaRegisterFatBinary@PLT
movq %rax, %rdi
movq %rax, _ZL20__cudaFatCubinHandle(%rip)
call __cudaRegisterFatBinaryEnd@PLT
leaq _ZL26__cudaUnregisterBinaryUtilv(%rip), %rdi
call atexit@PLT
addq $8, %rsp
.cfi_def_cfa_offset 8
ret
.cfi_endproc
.LFE2083:
.size _ZL24__sti____cudaRegisterAllv, .-_ZL24__sti____cudaRegisterAllv
.section .init_array,"aw"
.align 8
.quad _ZL24__sti____cudaRegisterAllv
.section .nvFatBinSegment,"aw"
.align 8
.type _ZL15__fatDeviceText, @object
.size _ZL15__fatDeviceText, 24
_ZL15__fatDeviceText:
.long 1180844977
.long 1
.quad fatbinData
.quad 0
.local _ZL20__cudaFatCubinHandle
.comm _ZL20__cudaFatCubinHandle,8,8
.section .rodata.cst4,"aM",@progbits,4
.align 4
.LC6:
.long 1258291200
.align 4
.LC8:
.long 1065353216
.section .rodata.cst8,"aM",@progbits,8
.align 8
.LC15:
.long 0
.long 1083129856
.section .rodata.cst4
.align 4
.LC24:
.long 2147483647
.ident "GCC: (Ubuntu 13.3.0-6ubuntu2~24.04) 13.3.0"
.section .note.GNU-stack,"",@progbits
.section .note.gnu.property,"a"
.align 8
.long 1f - 0f
.long 4f - 1f
.long 5
0:
.string "GNU"
1:
.align 8
.long 0xc0000002
.long 3f - 2f
2:
.long 0x3
3:
.align 8
4: |
You are a helpful coding assistant specialized in converting CUDA source code to HIP/AMD source code. | /*
Contributors: Yizhao Gao (yizhaotsccsj@gmail.com)
*/
#include <stdio.h>
#include <math.h>
#include "io.cuh"
#include "kde.cuh"
#include <sys/time.h>
//dpbKDE inputPopFile inputHHFile outputFileName outputCount xMin yMin xMax yMax cellSize bandwidth mapLogic
int dpbKDE(char * inputPopFileName, char * inputHHFileName, char * outputFileName, char * outputCount, float xMin, float yMin, float xMax, float yMax, float cellSize, float bandwidth, char * subPop, char * mapLogic, char * personColName, int epsgCode)
{
//Uboyt
FILE * inputPopData;
FILE * inputHHData;
char outputRatioGTiffFile[200];
char outputPopulationFile[200];
bool hhOnly;
float * xCol;
float * yCol;
float * pCount;
float * cCount;
int nRow, nCol, nHH, nPop, nCase = 0;
float * caseDen;
float * popDen;
struct timeval time1;
gettimeofday(&time1, NULL);
if(strcmp(inputPopFileName, "-HHO") == 0)
{
hhOnly = true;
}
else
{
hhOnly = false;
if(NULL == (inputPopData = fopen(inputPopFileName, "r")))
{
printf("ERROR: Can't open input population file: %s\n", inputPopFileName);
exit(1);
}
}
if(NULL == (inputHHData = fopen(inputHHFileName, "r")))
{
printf("ERROR: Can't open input household file: %s\n", inputHHFileName);
exit(1);
}
sprintf(outputPopulationFile, "%s_P", outputFileName);
sprintf(outputRatioGTiffFile, "%s.tif", outputFileName);
//Cells
nCol = ceil((xMax - xMin)/cellSize);
nRow = ceil((yMax - yMin)/cellSize);
xMax = xMin + cellSize * nCol;
yMax = yMin + cellSize * nRow;
//printf("####################\n");
//printf("nRow: %d\tnCol: %d\n", nRow, nCol);
//printf("xMax: %f\txMin: %f\nyMax: %f\tyMin: %f\n",xMax,xMin,yMax,yMin);
//printf("####################\n");
//Points
nHH = getHHNum(inputHHData);
if(NULL == (xCol = (float *)malloc(sizeof(float) * nHH)))
{
printf("ERROR: Out of memory in line %d!\n", __LINE__);
exit(1);
}
if(NULL == (yCol = (float *)malloc(sizeof(float) * nHH)))
{
printf("ERROR: Out of memory in line %d!\n", __LINE__);
exit(1);
}
if(NULL == (pCount = (float *)malloc(sizeof(float) * nHH)))
{
printf("ERROR: Out of memory in line %d!\n", __LINE__);
exit(1);
}
if(NULL == (cCount = (float *)malloc(sizeof(float) * nHH)))
{
printf("ERROR: Out of memory in line %d!\n", __LINE__);
exit(1);
}
bool succeed;
if(hhOnly)
{
if(strcmp(subPop, "*") == 0)
{
succeed = readPointsH(inputHHData, nHH, nCase, xCol, yCol, pCount, cCount, mapLogic);
}
else
{
succeed = readPointsHInSubPop(inputHHData, nHH, nCase, xCol, yCol, pCount, cCount, subPop, mapLogic);
}
if(!succeed)
{
printf("File involved: %s\n", inputHHFileName);
exit(1);
}
//printf("num of household: %d\nnum of positive household: %d\n", nHH, nCase);
//printf("####################\n");
}
else
{
if(strcmp(subPop, "*") == 0)
{
succeed = readPointsP(inputHHData, inputPopData, nHH, nPop, nCase, xCol, yCol, pCount, cCount, mapLogic, personColName);
}
else
{
succeed = readPointsPInSubPop(inputHHData, inputPopData, nHH, nPop, nCase, xCol, yCol, pCount, cCount, subPop, mapLogic, personColName);
}
if(!succeed)
{
printf("File involved: %s and\\or %s\n", inputHHFileName, inputPopFileName);
exit(1);
}
//printf("num of household: %d\nnum of population: %d\nnum of case: %d\n", nHH, nPop, nCase);
//printf("####################\n");
}
fclose(inputHHData);
if(!hhOnly)
{
fclose(inputPopData);
}
struct timeval time2;
gettimeofday(&time2, NULL);
//KDE
if(NULL == (caseDen = (float *) malloc(sizeof(float) * nRow * nCol)))
{
printf("ERROR: Out of memory in %d!\n", __LINE__);
exit(1);
}
if(NULL == (popDen = (float *) malloc(sizeof(float) * nRow * nCol)))
{
printf("ERROR: Out of memory in %d!\n", __LINE__);
exit(1);
}
for(int i = 0; i < nRow * nCol; i++)
{
caseDen[i] = 0;
popDen[i] = 0;
}
int x, y;
if(bandwidth > 1)
{
kde(caseDen, popDen, nRow, nCol, cellSize, xMin, yMax, xCol, yCol, pCount, cCount, nHH, bandwidth);
//filter out non-value areas
bool * hasValue;
if(NULL == (hasValue = (bool *) malloc (sizeof(float) * nRow * nCol)))
{
printf("ERROR: Out of memory in %d!\n", __LINE__);
exit(1);
}
for(int i = 0; i < nCol * nRow; i++)
{
hasValue[i] = false;
}
for(int i = 0; i < nHH; i++)
{
x = (xCol[i] - xMin) / cellSize;
y = (yMax - yCol[i]) / cellSize;
//if(x < 0 || x >= nCol || y < 0 || y >= nRow)
//{
// printf("%d\t%f\t%f\n", i, xCol[i], yCol[i]);
//}
if(x > -1 && x < nCol && y > -1 && y < nRow && !hasValue[y * nCol + x])
hasValue[y * nCol + x] = true;
}
for(int i = 0; i < nRow * nCol; i++)
{
if(!hasValue[i])
{
caseDen[i] = 0;
popDen[i] = 0;
}
}
free(hasValue);
}
else
{
for(int i = 0; i < nHH; i++)
{
x = (xCol[i] - xMin) / cellSize;
y = (yMax - yCol[i]) / cellSize;
if(x >= 0 && x < nCol && y >= 0 && y < nRow)
{
caseDen[y * nCol + x] += cCount[i];
popDen[y * nCol + x] += pCount[i];
}
}
}
struct timeval time3;
gettimeofday(&time3, NULL);
printf("Input time:\t%lfms\n", ((&time2)->tv_sec - (&time1)->tv_sec) * 1000 + (double)((&time2)->tv_usec - (&time1)->tv_usec) / 1000);
printf("KDE time:\t%lfms\n", ((&time3)->tv_sec - (&time2)->tv_sec) * 1000 + (double)((&time3)->tv_usec - (&time2)->tv_usec) / 1000);
//Write outputFile
FILE * outputFile;
if(NULL == (outputFile = fopen(outputFileName, "wb")))
{
printf("ERROR: Can't open output file");
exit(1);
}
fwrite(caseDen, sizeof(float), nRow * nCol, outputFile);
fclose(outputFile);
//Generate ascii grid
/*
if(NULL == (outputFile = fopen(outputRatioGTiffFile, "w")))
{
printf("ERROR: Can't open output ratio file: %s\n", outputRatioGTiffFile);
exit(1);
}
writeGridRatio(outputFile, caseDen, popDen, nRow, nCol, xMin, yMin, cellSize);
fclose(outputFile);
*/
//Generate GeoTiff
writeGeoTiffRatio(outputRatioGTiffFile, caseDen, popDen, nRow, nCol, xMin, yMax, cellSize, epsgCode);
if(NULL == (outputFile = fopen(outputPopulationFile, "wb")))
{
printf("ERROR: Can't open output population file: %s\n", outputPopulationFile);
exit(1);
}
fwrite(popDen, sizeof(float), nRow * nCol, outputFile);
fclose(outputFile);
// This part is used to be used to calcuate the likelihood, but is no longer used
if(NULL == (outputFile = fopen(outputCount, "a")))
{
printf("ERROR: Can't open output population and count file: %s\n", outputCount);
exit(1);
}
if(hhOnly)
{
fprintf(outputFile, "%s %d %d\n", outputFileName, nHH, nCase);
}
else
{
fprintf(outputFile, "%s %d %d\n", outputFileName, nPop, nCase);
}
fclose(outputFile);
//free
free(xCol);
free(yCol);
free(pCount);
free(cCount);
free(caseDen);
free(popDen);
//printf("Finished!\n");
return 0;
} | /*
Contributors: Yizhao Gao (yizhaotsccsj@gmail.com)
*/
#ifndef DPBKDEH
#define DPBKDEH
int dpbKDE(char * inputPopFileName, char * inputHHFileName, char * outputFileName, char * outputCount, float xMin, float yMin, float xMax, float yMax, float cellSize, float bandwidth, char * subPop, char * mapLogic, char * personColName, int epsgCode);
#endif |
You are a helpful coding assistant specialized in converting HIP source code to AMD device assembly. | /*
Contributors: Yizhao Gao (yizhaotsccsj@gmail.com)
*/
#ifndef DPBKDEH
#define DPBKDEH
int dpbKDE(char * inputPopFileName, char * inputHHFileName, char * outputFileName, char * outputCount, float xMin, float yMin, float xMax, float yMax, float cellSize, float bandwidth, char * subPop, char * mapLogic, char * personColName, int epsgCode);
#endif | .text
.p2alignl 7, 3214868480
.fill 96, 4, 3214868480
.type __hip_cuid_,@object
.section .bss,"aw",@nobits
.globl __hip_cuid_
__hip_cuid_:
.byte 0
.size __hip_cuid_, 1
.ident "AMD clang version 18.0.0git (https://github.com/RadeonOpenCompute/llvm-project roc-6.3.2 25012 e5bf7e55c91490b07c49d8960fa7983d864936c4)"
.section ".note.GNU-stack","",@progbits
.addrsig
.addrsig_sym __hip_cuid_
.amdgcn_target "amdgcn-amd-amdhsa--gfx1100"
.amdgpu_metadata
---
amdhsa.kernels: []
amdhsa.target: amdgcn-amd-amdhsa--gfx1100
amdhsa.version:
- 1
- 2
...
.end_amdgpu_metadata |
You are a helpful coding assistant specialized in converting HIP source code to AMD host assembly. | /*
Contributors: Yizhao Gao (yizhaotsccsj@gmail.com)
*/
#ifndef DPBKDEH
#define DPBKDEH
int dpbKDE(char * inputPopFileName, char * inputHHFileName, char * outputFileName, char * outputCount, float xMin, float yMin, float xMax, float yMax, float cellSize, float bandwidth, char * subPop, char * mapLogic, char * personColName, int epsgCode);
#endif | .text
.file "dpbKDE.hip"
.type __hip_cuid_,@object # @__hip_cuid_
.bss
.globl __hip_cuid_
__hip_cuid_:
.byte 0 # 0x0
.size __hip_cuid_, 1
.section ".linker-options","e",@llvm_linker_options
.ident "AMD clang version 18.0.0git (https://github.com/RadeonOpenCompute/llvm-project roc-6.3.2 25012 e5bf7e55c91490b07c49d8960fa7983d864936c4)"
.section ".note.GNU-stack","",@progbits
.addrsig
.addrsig_sym __hip_cuid_ |
You are a helpful coding assistant specialized in converting from CUDA device assembly to AMD device assembly. | code for sm_80 | .text
.p2alignl 7, 3214868480
.fill 96, 4, 3214868480
.type __hip_cuid_,@object
.section .bss,"aw",@nobits
.globl __hip_cuid_
__hip_cuid_:
.byte 0
.size __hip_cuid_, 1
.ident "AMD clang version 18.0.0git (https://github.com/RadeonOpenCompute/llvm-project roc-6.3.2 25012 e5bf7e55c91490b07c49d8960fa7983d864936c4)"
.section ".note.GNU-stack","",@progbits
.addrsig
.addrsig_sym __hip_cuid_
.amdgcn_target "amdgcn-amd-amdhsa--gfx1100"
.amdgpu_metadata
---
amdhsa.kernels: []
amdhsa.target: amdgcn-amd-amdhsa--gfx1100
amdhsa.version:
- 1
- 2
...
.end_amdgpu_metadata |
You are a helpful coding assistant specialized in converting from CUDA host assembly to AMD host assembly. | .file "tmpxft_00001d83_00000000-6_dpbKDE.cudafe1.cpp"
.text
#APP
#NO_APP
.type _ZL26__cudaUnregisterBinaryUtilv, @function
_ZL26__cudaUnregisterBinaryUtilv:
.LFB2060:
.cfi_startproc
endbr64
subq $8, %rsp
.cfi_def_cfa_offset 16
movq _ZL20__cudaFatCubinHandle(%rip), %rdi
call __cudaUnregisterFatBinary@PLT
addq $8, %rsp
.cfi_def_cfa_offset 8
ret
.cfi_endproc
.LFE2060:
.size _ZL26__cudaUnregisterBinaryUtilv, .-_ZL26__cudaUnregisterBinaryUtilv
.section .rodata.str1.1,"aMS",@progbits,1
.LC0:
.string "-HHO"
.LC1:
.string "r"
.section .rodata.str1.8,"aMS",@progbits,1
.align 8
.LC2:
.string "ERROR: Can't open input population file: %s\n"
.align 8
.LC3:
.string "ERROR: Can't open input household file: %s\n"
.section .rodata.str1.1
.LC4:
.string "%s_P"
.LC5:
.string "%s.tif"
.section .rodata.str1.8
.align 8
.LC9:
.string "ERROR: Out of memory in line %d!\n"
.section .rodata.str1.1
.LC10:
.string "*"
.LC11:
.string "File involved: %s\n"
.LC12:
.string "File involved: %s and\\or %s\n"
.LC13:
.string "ERROR: Out of memory in %d!\n"
.LC16:
.string "Input time:\t%lfms\n"
.LC17:
.string "KDE time:\t%lfms\n"
.LC18:
.string "wb"
.LC19:
.string "ERROR: Can't open output file"
.section .rodata.str1.8
.align 8
.LC20:
.string "ERROR: Can't open output population file: %s\n"
.section .rodata.str1.1
.LC21:
.string "a"
.section .rodata.str1.8
.align 8
.LC22:
.string "ERROR: Can't open output population and count file: %s\n"
.section .rodata.str1.1
.LC23:
.string "%s %d %d\n"
.text
.globl _Z6dpbKDEPcS_S_S_ffffffS_S_S_i
.type _Z6dpbKDEPcS_S_S_ffffffS_S_S_i, @function
_Z6dpbKDEPcS_S_S_ffffffS_S_S_i:
.LFB2057:
.cfi_startproc
endbr64
pushq %r15
.cfi_def_cfa_offset 16
.cfi_offset 15, -16
pushq %r14
.cfi_def_cfa_offset 24
.cfi_offset 14, -24
pushq %r13
.cfi_def_cfa_offset 32
.cfi_offset 13, -32
pushq %r12
.cfi_def_cfa_offset 40
.cfi_offset 12, -40
pushq %rbp
.cfi_def_cfa_offset 48
.cfi_offset 6, -48
pushq %rbx
.cfi_def_cfa_offset 56
.cfi_offset 3, -56
subq $600, %rsp
.cfi_def_cfa_offset 656
movq %rdi, %r15
movq %rdi, 104(%rsp)
movq %rsi, 64(%rsp)
movq %rdx, 24(%rsp)
movq %rcx, 88(%rsp)
movss %xmm0, 16(%rsp)
movss %xmm1, 32(%rsp)
movss %xmm2, 20(%rsp)
movss %xmm3, 40(%rsp)
movss %xmm4, 12(%rsp)
movss %xmm5, 76(%rsp)
movq %r8, 56(%rsp)
movq %r9, 80(%rsp)
movq 656(%rsp), %rbx
movq %fs:40, %rax
movq %rax, 584(%rsp)
xorl %eax, %eax
movl $0, 124(%rsp)
leaq 128(%rsp), %rdi
movl $0, %esi
call gettimeofday@PLT
leaq .LC0(%rip), %rsi
movq %r15, %rdi
call strcmp@PLT
testl %eax, %eax
je .L47
leaq .LC1(%rip), %rsi
movq %r15, %rdi
call fopen@PLT
movq %rax, 96(%rsp)
testq %rax, %rax
je .L65
movb $0, 75(%rsp)
jmp .L4
.L65:
movq 104(%rsp), %rdx
leaq .LC2(%rip), %rsi
movl $2, %edi
call __printf_chk@PLT
movl $1, %edi
call exit@PLT
.L47:
movb $1, 75(%rsp)
.L4:
leaq .LC1(%rip), %rsi
movq 64(%rsp), %rdi
call fopen@PLT
movq %rax, %rbp
testq %rax, %rax
je .L66
leaq 384(%rsp), %rdi
movq 24(%rsp), %r15
movq %r15, %r8
leaq .LC4(%rip), %rcx
movl $200, %edx
movl $2, %esi
movl $0, %eax
call __sprintf_chk@PLT
leaq 176(%rsp), %rdi
movq %r15, %r8
leaq .LC5(%rip), %rcx
movl $200, %edx
movl $2, %esi
movl $0, %eax
call __sprintf_chk@PLT
movss 20(%rsp), %xmm0
subss 16(%rsp), %xmm0
divss 12(%rsp), %xmm0
movaps %xmm0, %xmm3
movss .LC24(%rip), %xmm2
movaps %xmm0, %xmm1
andps %xmm2, %xmm1
movss .LC6(%rip), %xmm4
ucomiss %xmm1, %xmm4
jbe .L6
cvttss2sil %xmm0, %eax
pxor %xmm1, %xmm1
cvtsi2ssl %eax, %xmm1
cmpnless %xmm1, %xmm3
movss .LC8(%rip), %xmm4
andps %xmm4, %xmm3
addss %xmm1, %xmm3
andnps %xmm0, %xmm2
orps %xmm2, %xmm3
.L6:
cvttss2sil %xmm3, %r13d
movss 40(%rsp), %xmm0
subss 32(%rsp), %xmm0
divss 12(%rsp), %xmm0
movaps %xmm0, %xmm3
movss .LC24(%rip), %xmm2
movaps %xmm0, %xmm1
andps %xmm2, %xmm1
movss .LC6(%rip), %xmm4
ucomiss %xmm1, %xmm4
jbe .L7
cvttss2sil %xmm0, %eax
pxor %xmm1, %xmm1
cvtsi2ssl %eax, %xmm1
cmpnless %xmm1, %xmm3
movss .LC8(%rip), %xmm4
andps %xmm4, %xmm3
addss %xmm1, %xmm3
andnps %xmm0, %xmm2
orps %xmm2, %xmm3
.L7:
cvttss2sil %xmm3, %eax
movl %eax, 20(%rsp)
pxor %xmm0, %xmm0
cvtsi2ssl %eax, %xmm0
mulss 12(%rsp), %xmm0
addss 32(%rsp), %xmm0
movss %xmm0, 52(%rsp)
movq %rbp, %rdi
call _Z8getHHNumP8_IO_FILE@PLT
movl %eax, 48(%rsp)
cltq
leaq 0(,%rax,4), %r14
movq %r14, %rdi
call malloc@PLT
movq %rax, %r12
testq %rax, %rax
je .L67
movq %r14, %rdi
call malloc@PLT
movq %rax, %r15
testq %rax, %rax
je .L68
movq %r14, %rdi
call malloc@PLT
movq %rax, 32(%rsp)
testq %rax, %rax
je .L69
movq %r14, %rdi
call malloc@PLT
movq %rax, 40(%rsp)
testq %rax, %rax
je .L70
cmpb $0, 75(%rsp)
je .L12
leaq .LC10(%rip), %rsi
movq 56(%rsp), %rdi
call strcmp@PLT
testl %eax, %eax
jne .L13
leaq 124(%rsp), %rdx
pushq 80(%rsp)
.cfi_def_cfa_offset 664
pushq 48(%rsp)
.cfi_def_cfa_offset 672
movq 48(%rsp), %r9
movq %r15, %r8
movq %r12, %rcx
movl 64(%rsp), %esi
movq %rbp, %rdi
call _Z11readPointsHP8_IO_FILEiRiPfS2_S2_S2_Pc@PLT
addq $16, %rsp
.cfi_def_cfa_offset 656
.L14:
testb %al, %al
je .L71
movq %rbp, %rdi
call fclose@PLT
.L43:
leaq 144(%rsp), %rdi
movl $0, %esi
call gettimeofday@PLT
movslq 20(%rsp), %rax
movslq %r13d, %rdx
imulq %rdx, %rax
movq %rax, 56(%rsp)
salq $2, %rax
movq %rax, 64(%rsp)
movq %rax, %rdi
call malloc@PLT
movq %rax, %rbx
testq %rax, %rax
je .L72
movq 64(%rsp), %rdi
call malloc@PLT
movq %rax, %rbp
testq %rax, %rax
je .L20
movl 20(%rsp), %ecx
imull %r13d, %ecx
movl %ecx, 80(%rsp)
movslq %ecx, %rdx
salq $2, %rdx
movl $0, %eax
testl %ecx, %ecx
jle .L22
.L23:
movl $0x00000000, (%rbx,%rax)
movl $0x00000000, 0(%rbp,%rax)
addq $4, %rax
cmpq %rdx, %rax
jne .L23
.L22:
movss 76(%rsp), %xmm2
comiss .LC8(%rip), %xmm2
ja .L24
movl $0, %eax
cmpl $0, 48(%rsp)
jle .L26
movl 20(%rsp), %ecx
movss 52(%rsp), %xmm1
movq 32(%rsp), %rsi
movq 40(%rsp), %rdi
jmp .L25
.L66:
movq 64(%rsp), %rdx
leaq .LC3(%rip), %rsi
movl $2, %edi
movl $0, %eax
call __printf_chk@PLT
movl $1, %edi
call exit@PLT
.L67:
movl $77, %edx
leaq .LC9(%rip), %rsi
movl $2, %edi
movl $0, %eax
call __printf_chk@PLT
movl $1, %edi
call exit@PLT
.L68:
movl $82, %edx
leaq .LC9(%rip), %rsi
movl $2, %edi
movl $0, %eax
call __printf_chk@PLT
movl $1, %edi
call exit@PLT
.L69:
movl $87, %edx
leaq .LC9(%rip), %rsi
movl $2, %edi
call __printf_chk@PLT
movl $1, %edi
call exit@PLT
.L70:
movl $92, %edx
leaq .LC9(%rip), %rsi
movl $2, %edi
call __printf_chk@PLT
movl $1, %edi
call exit@PLT
.L13:
leaq 124(%rsp), %rdx
subq $8, %rsp
.cfi_def_cfa_offset 664
pushq 88(%rsp)
.cfi_def_cfa_offset 672
pushq 72(%rsp)
.cfi_def_cfa_offset 680
pushq 64(%rsp)
.cfi_def_cfa_offset 688
movq 64(%rsp), %r9
movq %r15, %r8
movq %r12, %rcx
movl 80(%rsp), %esi
movq %rbp, %rdi
call _Z19readPointsHInSubPopP8_IO_FILEiRiPfS2_S2_S2_PcS3_@PLT
addq $32, %rsp
.cfi_def_cfa_offset 656
jmp .L14
.L71:
movq 64(%rsp), %rdx
leaq .LC11(%rip), %rsi
movl $2, %edi
call __printf_chk@PLT
movl $1, %edi
call exit@PLT
.L12:
leaq .LC10(%rip), %rsi
movq 56(%rsp), %rdi
call strcmp@PLT
testl %eax, %eax
jne .L16
leaq 120(%rsp), %rcx
subq $8, %rsp
.cfi_def_cfa_offset 664
pushq %rbx
.cfi_def_cfa_offset 672
pushq 96(%rsp)
.cfi_def_cfa_offset 680
pushq 64(%rsp)
.cfi_def_cfa_offset 688
pushq 64(%rsp)
.cfi_def_cfa_offset 696
pushq %r15
.cfi_def_cfa_offset 704
movq %r12, %r9
leaq 172(%rsp), %r8
movl 96(%rsp), %edx
movq 144(%rsp), %rsi
movq %rbp, %rdi
call _Z11readPointsPP8_IO_FILES0_iRiS1_PfS2_S2_S2_PcS3_@PLT
addq $48, %rsp
.cfi_def_cfa_offset 656
.L17:
testb %al, %al
je .L73
movq %rbp, %rdi
call fclose@PLT
movq 96(%rsp), %rdi
call fclose@PLT
jmp .L43
.L16:
leaq 120(%rsp), %rcx
pushq %rbx
.cfi_def_cfa_offset 664
pushq 88(%rsp)
.cfi_def_cfa_offset 672
pushq 72(%rsp)
.cfi_def_cfa_offset 680
pushq 64(%rsp)
.cfi_def_cfa_offset 688
pushq 64(%rsp)
.cfi_def_cfa_offset 696
pushq %r15
.cfi_def_cfa_offset 704
movq %r12, %r9
leaq 172(%rsp), %r8
movl 96(%rsp), %edx
movq 144(%rsp), %rsi
movq %rbp, %rdi
call _Z19readPointsPInSubPopP8_IO_FILES0_iRiS1_PfS2_S2_S2_PcS3_S3_@PLT
addq $48, %rsp
.cfi_def_cfa_offset 656
jmp .L17
.L73:
movq 104(%rsp), %rcx
movq 64(%rsp), %rdx
leaq .LC12(%rip), %rsi
movl $2, %edi
call __printf_chk@PLT
movl $1, %edi
call exit@PLT
.L72:
movl $149, %edx
leaq .LC13(%rip), %rsi
movl $2, %edi
movl $0, %eax
call __printf_chk@PLT
movl $1, %edi
call exit@PLT
.L20:
movl $155, %edx
leaq .LC13(%rip), %rsi
movl $2, %edi
movl $0, %eax
call __printf_chk@PLT
movl $1, %edi
call exit@PLT
.L24:
subq $8, %rsp
.cfi_def_cfa_offset 664
movl 56(%rsp), %eax
pushq %rax
.cfi_def_cfa_offset 672
pushq 56(%rsp)
.cfi_def_cfa_offset 680
pushq 56(%rsp)
.cfi_def_cfa_offset 688
movss 108(%rsp), %xmm3
movq %r15, %r9
movq %r12, %r8
movss 84(%rsp), %xmm2
movss 48(%rsp), %xmm1
movss 44(%rsp), %xmm0
movl %r13d, %ecx
movl 52(%rsp), %edx
movq %rbp, %rsi
movq %rbx, %rdi
call _Z3kdePfS_iifffS_S_S_S_if@PLT
addq $32, %rsp
.cfi_def_cfa_offset 656
movq 64(%rsp), %rdi
call malloc@PLT
movq %rax, %rdi
testq %rax, %rax
je .L27
movl 80(%rsp), %ecx
movslq %ecx, %rdx
addq %rax, %rdx
testl %ecx, %ecx
jle .L74
.L30:
movb $0, (%rax)
addq $1, %rax
cmpq %rdx, %rax
jne .L30
cmpl $0, 48(%rsp)
jle .L45
.L44:
movl $0, %eax
movl 20(%rsp), %ecx
movss 52(%rsp), %xmm1
jmp .L33
.L27:
movl $174, %edx
leaq .LC13(%rip), %rsi
movl $2, %edi
movl $0, %eax
call __printf_chk@PLT
movl $1, %edi
call exit@PLT
.L32:
addq $4, %rax
cmpq %rax, %r14
je .L75
.L33:
movss (%r12,%rax), %xmm0
subss 16(%rsp), %xmm0
movss 12(%rsp), %xmm5
divss %xmm5, %xmm0
cvttss2sil %xmm0, %esi
testl %esi, %esi
js .L32
cmpl %esi, %r13d
jle .L32
movaps %xmm1, %xmm0
subss (%r15,%rax), %xmm0
divss %xmm5, %xmm0
cvttss2sil %xmm0, %edx
testl %edx, %edx
js .L32
cmpl %edx, %ecx
jle .L32
imull %r13d, %edx
addl %esi, %edx
movslq %edx, %rdx
addq %rdi, %rdx
cmpb $0, (%rdx)
jne .L32
movb $1, (%rdx)
jmp .L32
.L75:
cmpl $0, 80(%rsp)
jle .L34
.L45:
movslq 80(%rsp), %r14
movl $0, %eax
jmp .L36
.L35:
addq $1, %rax
cmpq %r14, %rax
je .L34
.L36:
cmpb $0, (%rdi,%rax)
jne .L35
movl $0x00000000, (%rbx,%rax,4)
movl $0x00000000, 0(%rbp,%rax,4)
jmp .L35
.L37:
addq $4, %rax
cmpq %rax, %r14
je .L26
.L25:
movss (%r12,%rax), %xmm0
subss 16(%rsp), %xmm0
movss 12(%rsp), %xmm6
divss %xmm6, %xmm0
cvttss2sil %xmm0, %r8d
testl %r8d, %r8d
js .L37
cmpl %r8d, %r13d
jle .L37
movaps %xmm1, %xmm0
subss (%r15,%rax), %xmm0
divss %xmm6, %xmm0
cvttss2sil %xmm0, %edx
testl %edx, %edx
js .L37
cmpl %edx, %ecx
jle .L37
imull %r13d, %edx
addl %r8d, %edx
movslq %edx, %rdx
salq $2, %rdx
leaq (%rbx,%rdx), %r8
movss (%r8), %xmm0
addss (%rdi,%rax), %xmm0
movss %xmm0, (%r8)
addq %rbp, %rdx
movss (%rdx), %xmm0
addss (%rsi,%rax), %xmm0
movss %xmm0, (%rdx)
jmp .L37
.L76:
leaq .LC19(%rip), %rsi
movl $2, %edi
movl $0, %eax
call __printf_chk@PLT
movl $1, %edi
call exit@PLT
.L77:
leaq 384(%rsp), %rdx
leaq .LC20(%rip), %rsi
movl $2, %edi
movl $0, %eax
call __printf_chk@PLT
movl $1, %edi
call exit@PLT
.L78:
movq 88(%rsp), %rdx
leaq .LC22(%rip), %rsi
movl $2, %edi
movl $0, %eax
call __printf_chk@PLT
movl $1, %edi
call exit@PLT
.L41:
movl 124(%rsp), %r9d
movl 120(%rsp), %r8d
movq 24(%rsp), %rcx
leaq .LC23(%rip), %rdx
movl $2, %esi
movq %rax, %rdi
movl $0, %eax
call __fprintf_chk@PLT
jmp .L42
.L74:
cmpl $0, 48(%rsp)
jg .L44
.L34:
call free@PLT
.L26:
leaq 160(%rsp), %rdi
movl $0, %esi
call gettimeofday@PLT
movq 144(%rsp), %rax
subq 128(%rsp), %rax
imulq $1000, %rax, %rax
pxor %xmm0, %xmm0
cvtsi2sdq %rax, %xmm0
movq 152(%rsp), %rax
subq 136(%rsp), %rax
pxor %xmm1, %xmm1
cvtsi2sdq %rax, %xmm1
divsd .LC15(%rip), %xmm1
addsd %xmm1, %xmm0
leaq .LC16(%rip), %rsi
movl $2, %edi
movl $1, %eax
call __printf_chk@PLT
movq 160(%rsp), %rax
subq 144(%rsp), %rax
imulq $1000, %rax, %rax
pxor %xmm0, %xmm0
cvtsi2sdq %rax, %xmm0
movq 168(%rsp), %rax
subq 152(%rsp), %rax
pxor %xmm1, %xmm1
cvtsi2sdq %rax, %xmm1
divsd .LC15(%rip), %xmm1
addsd %xmm1, %xmm0
leaq .LC17(%rip), %rsi
movl $2, %edi
movl $1, %eax
call __printf_chk@PLT
leaq .LC18(%rip), %rsi
movq 24(%rsp), %rdi
call fopen@PLT
movq %rax, %r14
testq %rax, %rax
je .L76
movq %rax, %rcx
movq 56(%rsp), %rdx
movl $4, %esi
movq %rbx, %rdi
call fwrite@PLT
movq %r14, %rdi
call fclose@PLT
leaq 176(%rsp), %rdi
movl 664(%rsp), %r9d
movss 12(%rsp), %xmm2
movss 52(%rsp), %xmm1
movss 16(%rsp), %xmm0
movl %r13d, %r8d
movl 20(%rsp), %ecx
movq %rbp, %rdx
movq %rbx, %rsi
call _Z17writeGeoTiffRatioPcPfS0_iifffi@PLT
leaq 384(%rsp), %rdi
leaq .LC18(%rip), %rsi
call fopen@PLT
movq %rax, %r13
testq %rax, %rax
je .L77
movq %rax, %rcx
movq 56(%rsp), %rdx
movl $4, %esi
movq %rbp, %rdi
call fwrite@PLT
movq %r13, %rdi
call fclose@PLT
leaq .LC21(%rip), %rsi
movq 88(%rsp), %rdi
call fopen@PLT
movq %rax, %r13
testq %rax, %rax
je .L78
cmpb $0, 75(%rsp)
je .L41
movl 124(%rsp), %r9d
movl 48(%rsp), %r8d
movq 24(%rsp), %rcx
leaq .LC23(%rip), %rdx
movl $2, %esi
movq %rax, %rdi
movl $0, %eax
call __fprintf_chk@PLT
.L42:
movq %r13, %rdi
call fclose@PLT
movq %r12, %rdi
call free@PLT
movq %r15, %rdi
call free@PLT
movq 32(%rsp), %rdi
call free@PLT
movq 40(%rsp), %rdi
call free@PLT
movq %rbx, %rdi
call free@PLT
movq %rbp, %rdi
call free@PLT
movq 584(%rsp), %rax
subq %fs:40, %rax
jne .L79
movl $0, %eax
addq $600, %rsp
.cfi_remember_state
.cfi_def_cfa_offset 56
popq %rbx
.cfi_def_cfa_offset 48
popq %rbp
.cfi_def_cfa_offset 40
popq %r12
.cfi_def_cfa_offset 32
popq %r13
.cfi_def_cfa_offset 24
popq %r14
.cfi_def_cfa_offset 16
popq %r15
.cfi_def_cfa_offset 8
ret
.L79:
.cfi_restore_state
call __stack_chk_fail@PLT
.cfi_endproc
.LFE2057:
.size _Z6dpbKDEPcS_S_S_ffffffS_S_S_i, .-_Z6dpbKDEPcS_S_S_ffffffS_S_S_i
.type _ZL24__sti____cudaRegisterAllv, @function
_ZL24__sti____cudaRegisterAllv:
.LFB2083:
.cfi_startproc
endbr64
subq $8, %rsp
.cfi_def_cfa_offset 16
leaq _ZL15__fatDeviceText(%rip), %rdi
call __cudaRegisterFatBinary@PLT
movq %rax, %rdi
movq %rax, _ZL20__cudaFatCubinHandle(%rip)
call __cudaRegisterFatBinaryEnd@PLT
leaq _ZL26__cudaUnregisterBinaryUtilv(%rip), %rdi
call atexit@PLT
addq $8, %rsp
.cfi_def_cfa_offset 8
ret
.cfi_endproc
.LFE2083:
.size _ZL24__sti____cudaRegisterAllv, .-_ZL24__sti____cudaRegisterAllv
.section .init_array,"aw"
.align 8
.quad _ZL24__sti____cudaRegisterAllv
.section .nvFatBinSegment,"aw"
.align 8
.type _ZL15__fatDeviceText, @object
.size _ZL15__fatDeviceText, 24
_ZL15__fatDeviceText:
.long 1180844977
.long 1
.quad fatbinData
.quad 0
.local _ZL20__cudaFatCubinHandle
.comm _ZL20__cudaFatCubinHandle,8,8
.section .rodata.cst4,"aM",@progbits,4
.align 4
.LC6:
.long 1258291200
.align 4
.LC8:
.long 1065353216
.section .rodata.cst8,"aM",@progbits,8
.align 8
.LC15:
.long 0
.long 1083129856
.section .rodata.cst4
.align 4
.LC24:
.long 2147483647
.ident "GCC: (Ubuntu 13.3.0-6ubuntu2~24.04) 13.3.0"
.section .note.GNU-stack,"",@progbits
.section .note.gnu.property,"a"
.align 8
.long 1f - 0f
.long 4f - 1f
.long 5
0:
.string "GNU"
1:
.align 8
.long 0xc0000002
.long 3f - 2f
2:
.long 0x3
3:
.align 8
4: | .text
.file "dpbKDE.hip"
.type __hip_cuid_,@object # @__hip_cuid_
.bss
.globl __hip_cuid_
__hip_cuid_:
.byte 0 # 0x0
.size __hip_cuid_, 1
.section ".linker-options","e",@llvm_linker_options
.ident "AMD clang version 18.0.0git (https://github.com/RadeonOpenCompute/llvm-project roc-6.3.2 25012 e5bf7e55c91490b07c49d8960fa7983d864936c4)"
.section ".note.GNU-stack","",@progbits
.addrsig
.addrsig_sym __hip_cuid_ |
You are a helpful coding assistant specialized in converting CUDA source code to CUDA device assembly. | #include<stdio.h>
#include <stdlib.h>
__global__ void replaceMat(int *mat, int *res){
int i = blockIdx.x, j = threadIdx.x, n = blockDim.x;
//res[i*n+j] = mat[i*n+j];
res[i*n+j] = powf(mat[i*n+j],i+1);
//for(int p=0;p<i;p++)
//res[i*n+j] *= mat[i*n+j];
}
int main(){
int *a,*t,m,n,i,j,*da,*dt;
printf("Enter m: ");
scanf("%d",&m);
printf("Enter n: ");
scanf("%d",&n);
int size = sizeof(int)*m*n;
a = (int *)malloc(size);
t = (int *)malloc(size);
printf("Enter the matrix:\n");
for(i=0;i<m*n;i++)
scanf("%d",&a[i]);
cudaMalloc((void **)&da,size);
cudaMalloc((void **)&dt,size);
cudaMemcpy(da,a,size,cudaMemcpyHostToDevice);
replaceMat<<<m,n>>>(da,dt);
cudaMemcpy(t,dt,size,cudaMemcpyDeviceToHost);
printf("Result:\n");
for(i=0;i<m;i++){
for(j=0;j<n;j++)
printf("%d ",t[i*n+j]);
printf("\n");
}
cudaFree(da);
cudaFree(dt);
return 0;
} | code for sm_80
Function : _Z10replaceMatPiS_
.headerflags @"EF_CUDA_TEXMODE_UNIFIED EF_CUDA_64BIT_ADDRESS EF_CUDA_SM80 EF_CUDA_VIRTUAL_SM(EF_CUDA_SM80)"
/*0000*/ MOV R1, c[0x0][0x28] ; /* 0x00000a0000017a02 */
/* 0x000fe40000000f00 */
/*0010*/ S2R R2, SR_CTAID.X ; /* 0x0000000000027919 */
/* 0x000e220000002500 */
/*0020*/ HFMA2.MMA R7, -RZ, RZ, 0, 2.384185791015625e-07 ; /* 0x00000004ff077435 */
/* 0x000fe200000001ff */
/*0030*/ ULDC.64 UR4, c[0x0][0x118] ; /* 0x0000460000047ab9 */
/* 0x000fe40000000a00 */
/*0040*/ S2R R3, SR_TID.X ; /* 0x0000000000037919 */
/* 0x000e240000002100 */
/*0050*/ IMAD R0, R2, c[0x0][0x0], R3 ; /* 0x0000000002007a24 */
/* 0x001fca00078e0203 */
/*0060*/ IMAD.WIDE R6, R0, R7, c[0x0][0x160] ; /* 0x0000580000067625 */
/* 0x000fca00078e0207 */
/*0070*/ LDG.E R3, [R6.64] ; /* 0x0000000406037981 */
/* 0x000ea2000c1e1900 */
/*0080*/ HFMA2.MMA R14, -RZ, RZ, 0.771484375, 0.21533203125 ; /* 0x3a2c32e4ff0e7435 */
/* 0x000fe200000001ff */
/*0090*/ BSSY B0, 0x690 ; /* 0x000005f000007945 */
/* 0x000fe20003800000 */
/*00a0*/ I2F R4, R3 ; /* 0x0000000300047306 */
/* 0x004e240000201400 */
/*00b0*/ FMUL R5, |R4|.reuse, 16777216 ; /* 0x4b80000004057820 */
/* 0x041fe20000400200 */
/*00c0*/ FSETP.GEU.AND P0, PT, |R4|, 1.175494350822287508e-38, PT ; /* 0x008000000400780b */
/* 0x000fc80003f0e200 */
/*00d0*/ FSEL R5, R5, |R4|, !P0 ; /* 0x4000000405057208 */
/* 0x000fc80004000000 */
/*00e0*/ IADD3 R8, R5, -0x3f3504f3, RZ ; /* 0xc0cafb0d05087810 */
/* 0x000fc80007ffe0ff */
/*00f0*/ LOP3.LUT R8, R8, 0xff800000, RZ, 0xc0, !PT ; /* 0xff80000008087812 */
/* 0x000fc800078ec0ff */
/*0100*/ IADD3 R5, R5, -R8, RZ ; /* 0x8000000805057210 */
/* 0x000fe40007ffe0ff */
/*0110*/ I2F R8, R8 ; /* 0x0000000800087306 */
/* 0x000fe60000201400 */
/*0120*/ FADD R9, R5.reuse, 1 ; /* 0x3f80000005097421 */
/* 0x040fe40000000000 */
/*0130*/ FADD R7, R5, -1 ; /* 0xbf80000005077421 */
/* 0x000fe20000000000 */
/*0140*/ FSEL R5, RZ, -24, P0 ; /* 0xc1c00000ff057808 */
/* 0x000fc60000000000 */
/*0150*/ MUFU.RCP R9, R9 ; /* 0x0000000900097308 */
/* 0x000e220000001000 */
/*0160*/ FADD R6, R7, R7 ; /* 0x0000000707067221 */
/* 0x000fc80000000000 */
/*0170*/ FMUL R10, R9, R6 ; /* 0x00000006090a7220 */
/* 0x001fe40000400000 */
/*0180*/ FFMA R6, R8, 1.1920928955078125e-07, R5 ; /* 0x3400000008067823 */
/* 0x000fe40000000005 */
/*0190*/ FADD R12, R7, -R10 ; /* 0x8000000a070c7221 */
/* 0x000fe40000000000 */
/*01a0*/ FMUL R11, R10.reuse, R10 ; /* 0x0000000a0a0b7220 */
/* 0x040fe40000400000 */
/*01b0*/ FFMA R5, R10, 1.4426950216293334961, R6 ; /* 0x3fb8aa3b0a057823 */
/* 0x000fe40000000006 */
/*01c0*/ FADD R12, R12, R12 ; /* 0x0000000c0c0c7221 */
/* 0x000fc40000000000 */
/*01d0*/ FFMA R8, R11, R14, 0.0032181653659790754318 ; /* 0x3b52e7db0b087423 */
/* 0x000fe4000000000e */
/*01e0*/ FADD R13, R6, -R5 ; /* 0x80000005060d7221 */
/* 0x000fe20000000000 */
/*01f0*/ IADD3 R6, R2, 0x1, RZ ; /* 0x0000000102067810 */
/* 0x000fe20007ffe0ff */
/*0200*/ FFMA R12, R7, -R10, R12 ; /* 0x8000000a070c7223 */
/* 0x000fe4000000000c */
/*0210*/ FFMA R8, R11, R8, 0.018033718690276145935 ; /* 0x3c93bb730b087423 */
/* 0x000fe20000000008 */
/*0220*/ I2F R7, R6 ; /* 0x0000000600077306 */
/* 0x000e220000201400 */
/*0230*/ FFMA R13, R10, 1.4426950216293334961, R13 ; /* 0x3fb8aa3b0a0d7823 */
/* 0x000fe4000000000d */
/*0240*/ FMUL R12, R9, R12 ; /* 0x0000000c090c7220 */
/* 0x000fc40000400000 */
/*0250*/ FFMA R8, R11.reuse, R8, 0.12022458761930465698 ; /* 0x3df6384f0b087423 */
/* 0x040fe40000000008 */
/*0260*/ FFMA R13, R12, 1.4426950216293334961, R13 ; /* 0x3fb8aa3b0c0d7823 */
/* 0x000fe4000000000d */
/*0270*/ FMUL R11, R11, R8 ; /* 0x000000080b0b7220 */
/* 0x000fe40000400000 */
/*0280*/ FFMA R13, R10, 1.9251366722983220825e-08, R13 ; /* 0x32a55e340a0d7823 */
/* 0x000fe4000000000d */
/*0290*/ FMUL R8, R11, 3 ; /* 0x404000000b087820 */
/* 0x000fc80000400000 */
/*02a0*/ FFMA R8, R12, R8, R13 ; /* 0x000000080c087223 */
/* 0x000fc8000000000d */
/*02b0*/ FFMA R10, R10, R11, R8 ; /* 0x0000000b0a0a7223 */
/* 0x000fe20000000008 */
/*02c0*/ MOV R11, 0x391fcb8e ; /* 0x391fcb8e000b7802 */
/* 0x000fc60000000f00 */
/*02d0*/ FADD R12, R5, R10 ; /* 0x0000000a050c7221 */
/* 0x000fc80000000000 */
/*02e0*/ FMUL R8, R7, R12.reuse ; /* 0x0000000c07087220 */
/* 0x081fe40000400000 */
/*02f0*/ FADD R5, -R5, R12 ; /* 0x0000000c05057221 */
/* 0x000fe40000000100 */
/*0300*/ FRND R9, R8 ; /* 0x0000000800097307 */
/* 0x000e220000201000 */
/*0310*/ FFMA R12, R7, R12, -R8 ; /* 0x0000000c070c7223 */
/* 0x000fe20000000808 */
/*0320*/ FSETP.GT.AND P1, PT, |R8|, 152, PT ; /* 0x431800000800780b */
/* 0x000fe20003f24200 */
/*0330*/ FADD R10, R10, -R5 ; /* 0x800000050a0a7221 */
/* 0x000fe20000000000 */
/*0340*/ FSETP.GEU.AND P2, PT, R8, RZ, PT ; /* 0x000000ff0800720b */
/* 0x000fc60003f4e000 */
/*0350*/ FFMA R10, R7, R10, R12 ; /* 0x0000000a070a7223 */
/* 0x000fe4000000000c */
/*0360*/ F2I.NTZ R12, R8 ; /* 0x00000008000c7305 */
/* 0x0002a20000203100 */
/*0370*/ FADD R5, R8, -R9 ; /* 0x8000000908057221 */
/* 0x001fe20000000000 */
/*0380*/ FSETP.GT.AND P0, PT, R9, RZ, PT ; /* 0x000000ff0900720b */
/* 0x000fe20003f04000 */
/*0390*/ HFMA2.MMA R8, -RZ, RZ, 1.875, 0 ; /* 0x3f800000ff087435 */
/* 0x002fe400000001ff */
/*03a0*/ FADD R10, R10, R5 ; /* 0x000000050a0a7221 */
/* 0x000fe20000000000 */
/*03b0*/ SEL R9, RZ, 0x83000000, P0 ; /* 0x83000000ff097807 */
/* 0x000fe40000000000 */
/*03c0*/ ISETP.NE.AND P0, PT, R3, 0x1, PT ; /* 0x000000010300780c */
/* 0x000fe20003f05270 */
/*03d0*/ FFMA R5, R10, R11, 0.0013391353422775864601 ; /* 0x3aaf85ed0a057423 */
/* 0x000fc6000000000b */
/*03e0*/ ISETP.EQ.OR P0, PT, R6, RZ, !P0 ; /* 0x000000ff0600720c */
/* 0x000fe20004702670 */
/*03f0*/ FFMA R5, R10, R5, 0.0096188392490148544312 ; /* 0x3c1d98560a057423 */
/* 0x000fc80000000005 */
/*0400*/ FFMA R5, R10, R5, 0.055503588169813156128 ; /* 0x3d6357bb0a057423 */
/* 0x000fc80000000005 */
/*0410*/ FFMA R11, R10.reuse, R5, 0.24022644758224487305 ; /* 0x3e75fdec0a0b7423 */
/* 0x040fe40000000005 */
/*0420*/ FMUL R5, R7, 0.5 ; /* 0x3f00000007057820 */
/* 0x000fe40000400000 */
/*0430*/ FFMA R11, R10, R11, 0.69314718246459960938 ; /* 0x3f3172180a0b7423 */
/* 0x000fc8000000000b */
/*0440*/ FRND.TRUNC R5, R5 ; /* 0x0000000500057307 */
/* 0x000e22000020d000 */
/*0450*/ FFMA R11, R10, R11, 1 ; /* 0x3f8000000a0b7423 */
/* 0x000fe2000000000b */
/*0460*/ IADD3 R10, R9, 0x7f000000, RZ ; /* 0x7f000000090a7810 */
/* 0x000fe40007ffe0ff */
/*0470*/ LEA R9, R12, -R9, 0x17 ; /* 0x800000090c097211 */
/* 0x004fc600078eb8ff */
/*0480*/ FMUL R10, R11, R10 ; /* 0x0000000a0b0a7220 */
/* 0x000fe20000400000 */
/*0490*/ SHF.R.S32.HI R11, RZ, 0x1f, R0 ; /* 0x0000001fff0b7819 */
/* 0x000fc60000011400 */
/*04a0*/ FMUL R9, R10, R9 ; /* 0x000000090a097220 */
/* 0x000fe20000400000 */
/*04b0*/ @P1 FSEL R9, RZ, +INF , !P2 ; /* 0x7f800000ff091808 */
/* 0x000fe20005000000 */
/*04c0*/ FADD R6, R5, R5 ; /* 0x0000000505067221 */
/* 0x001fe20000000000 */
/*04d0*/ @P0 BRA 0x680 ; /* 0x000001a000000947 */
/* 0x000fea0003800000 */
/*04e0*/ FSETP.GTU.AND P0, PT, |R7|, +INF , PT ; /* 0x7f8000000700780b */
/* 0x000fc80003f0c200 */
/*04f0*/ FSETP.GTU.OR P0, PT, |R4|, +INF , P0 ; /* 0x7f8000000400780b */
/* 0x000fda000070c600 */
/*0500*/ @P0 BRA 0x670 ; /* 0x0000016000000947 */
/* 0x000fea0003800000 */
/*0510*/ FSETP.NEU.AND P0, PT, |R4|, +INF , PT ; /* 0x7f8000000400780b */
/* 0x000fe20003f0d200 */
/*0520*/ FADD R6, R7, -R6 ; /* 0x8000000607067221 */
/* 0x000fc60000000000 */
/*0530*/ ISETP.EQ.OR P0, PT, R3, RZ, !P0 ; /* 0x000000ff0300720c */
/* 0x000fc80004702670 */
/*0540*/ ISETP.GE.OR P1, PT, R2, -0x1, !P0 ; /* 0xffffffff0200780c */
/* 0x000fe40004726670 */
/*0550*/ FSETP.NEU.AND P2, PT, |R6|, 1, P0 ; /* 0x3f8000000600780b */
/* 0x000fce000074d200 */
/*0560*/ @P0 FADD R4, R4, R4 ; /* 0x0000000404040221 */
/* 0x000fca0000000000 */
/*0570*/ @!P1 LOP3.LUT R4, R4, 0x7f800000, RZ, 0x3c, !PT ; /* 0x7f80000004049812 */
/* 0x000fc800078e3cff */
/*0580*/ @P2 LOP3.LUT R4, R4, 0x7fffffff, RZ, 0xc0, !PT ; /* 0x7fffffff04042812 */
/* 0x000fc800078ec0ff */
/*0590*/ @P0 MOV R8, R4 ; /* 0x0000000400080202 */
/* 0x000fe20000000f00 */
/*05a0*/ @P0 BRA 0x680 ; /* 0x000000d000000947 */
/* 0x000fea0003800000 */
/*05b0*/ FSETP.NEU.AND P0, PT, |R7|, +INF , PT ; /* 0x7f8000000700780b */
/* 0x000fe40003f0d200 */
/*05c0*/ ISETP.EQ.AND P1, PT, R3, -0x1, PT ; /* 0xffffffff0300780c */
/* 0x000fda0003f22270 */
/*05d0*/ @!P0 BRA P1, 0x680 ; /* 0x000000a000008947 */
/* 0x000fea0000800000 */
/*05e0*/ ISETP.GT.AND P0, PT, R3, -0x1, PT ; /* 0xffffffff0300780c */
/* 0x000fe40003f04270 */
/*05f0*/ MOV R8, R9 ; /* 0x0000000900087202 */
/* 0x000fd60000000f00 */
/*0600*/ @P0 BRA 0x680 ; /* 0x0000007000000947 */
/* 0x000fea0003800000 */
/*0610*/ FRND.FLOOR R2, R7 ; /* 0x0000000700027307 */
/* 0x000e220000205000 */
/*0620*/ FSETP.NEU.AND P1, PT, |R6|, 1, PT ; /* 0x3f8000000600780b */
/* 0x000fc80003f2d200 */
/*0630*/ FSEL R8, -R9, R9, !P1 ; /* 0x0000000909087208 */
/* 0x000fe40004800100 */
/*0640*/ FSETP.NEU.AND P0, PT, R2, R7, PT ; /* 0x000000070200720b */
/* 0x001fc80003f0d000 */
/*0650*/ FSEL R8, R8, +QNAN , !P0 ; /* 0x7fffffff08087808 */
/* 0x000fe20004000000 */
/*0660*/ BRA 0x680 ; /* 0x0000001000007947 */
/* 0x000fea0003800000 */
/*0670*/ FADD R8, R4, R7 ; /* 0x0000000704087221 */
/* 0x000fe40000000000 */
/*0680*/ BSYNC B0 ; /* 0x0000000000007941 */
/* 0x000fea0003800000 */
/*0690*/ F2I.TRUNC.NTZ R5, R8 ; /* 0x0000000800057305 */
/* 0x000e22000020f100 */
/*06a0*/ LEA R2, P0, R0, c[0x0][0x168], 0x2 ; /* 0x00005a0000027a11 */
/* 0x000fc800078010ff */
/*06b0*/ LEA.HI.X R3, R0, c[0x0][0x16c], R11, 0x2, P0 ; /* 0x00005b0000037a11 */
/* 0x000fca00000f140b */
/*06c0*/ STG.E [R2.64], R5 ; /* 0x0000000502007986 */
/* 0x001fe2000c101904 */
/*06d0*/ EXIT ; /* 0x000000000000794d */
/* 0x000fea0003800000 */
/*06e0*/ BRA 0x6e0; /* 0xfffffff000007947 */
/* 0x000fc0000383ffff */
/*06f0*/ NOP; /* 0x0000000000007918 */
/* 0x000fc00000000000 */
/*0700*/ NOP; /* 0x0000000000007918 */
/* 0x000fc00000000000 */
/*0710*/ NOP; /* 0x0000000000007918 */
/* 0x000fc00000000000 */
/*0720*/ NOP; /* 0x0000000000007918 */
/* 0x000fc00000000000 */
/*0730*/ NOP; /* 0x0000000000007918 */
/* 0x000fc00000000000 */
/*0740*/ NOP; /* 0x0000000000007918 */
/* 0x000fc00000000000 */
/*0750*/ NOP; /* 0x0000000000007918 */
/* 0x000fc00000000000 */
/*0760*/ NOP; /* 0x0000000000007918 */
/* 0x000fc00000000000 */
/*0770*/ NOP; /* 0x0000000000007918 */
/* 0x000fc00000000000 */
.......... |
You are a helpful coding assistant specialized in converting CUDA source code to CUDA host assembly. | #include<stdio.h>
#include <stdlib.h>
__global__ void replaceMat(int *mat, int *res){
int i = blockIdx.x, j = threadIdx.x, n = blockDim.x;
//res[i*n+j] = mat[i*n+j];
res[i*n+j] = powf(mat[i*n+j],i+1);
//for(int p=0;p<i;p++)
//res[i*n+j] *= mat[i*n+j];
}
int main(){
int *a,*t,m,n,i,j,*da,*dt;
printf("Enter m: ");
scanf("%d",&m);
printf("Enter n: ");
scanf("%d",&n);
int size = sizeof(int)*m*n;
a = (int *)malloc(size);
t = (int *)malloc(size);
printf("Enter the matrix:\n");
for(i=0;i<m*n;i++)
scanf("%d",&a[i]);
cudaMalloc((void **)&da,size);
cudaMalloc((void **)&dt,size);
cudaMemcpy(da,a,size,cudaMemcpyHostToDevice);
replaceMat<<<m,n>>>(da,dt);
cudaMemcpy(t,dt,size,cudaMemcpyDeviceToHost);
printf("Result:\n");
for(i=0;i<m;i++){
for(j=0;j<n;j++)
printf("%d ",t[i*n+j]);
printf("\n");
}
cudaFree(da);
cudaFree(dt);
return 0;
} | .file "tmpxft_000a4aef_00000000-6_q1.cudafe1.cpp"
.text
#APP
#NO_APP
.type _ZL26__cudaUnregisterBinaryUtilv, @function
_ZL26__cudaUnregisterBinaryUtilv:
.LFB2060:
.cfi_startproc
endbr64
subq $8, %rsp
.cfi_def_cfa_offset 16
movq _ZL20__cudaFatCubinHandle(%rip), %rdi
call __cudaUnregisterFatBinary@PLT
addq $8, %rsp
.cfi_def_cfa_offset 8
ret
.cfi_endproc
.LFE2060:
.size _ZL26__cudaUnregisterBinaryUtilv, .-_ZL26__cudaUnregisterBinaryUtilv
.globl _Z32__device_stub__Z10replaceMatPiS_PiS_
.type _Z32__device_stub__Z10replaceMatPiS_PiS_, @function
_Z32__device_stub__Z10replaceMatPiS_PiS_:
.LFB2082:
.cfi_startproc
endbr64
subq $120, %rsp
.cfi_def_cfa_offset 128
movq %rdi, 8(%rsp)
movq %rsi, (%rsp)
movq %fs:40, %rax
movq %rax, 104(%rsp)
xorl %eax, %eax
leaq 8(%rsp), %rax
movq %rax, 80(%rsp)
movq %rsp, %rax
movq %rax, 88(%rsp)
movl $1, 32(%rsp)
movl $1, 36(%rsp)
movl $1, 40(%rsp)
movl $1, 44(%rsp)
movl $1, 48(%rsp)
movl $1, 52(%rsp)
leaq 24(%rsp), %rcx
leaq 16(%rsp), %rdx
leaq 44(%rsp), %rsi
leaq 32(%rsp), %rdi
call __cudaPopCallConfiguration@PLT
testl %eax, %eax
je .L7
.L3:
movq 104(%rsp), %rax
subq %fs:40, %rax
jne .L8
addq $120, %rsp
.cfi_remember_state
.cfi_def_cfa_offset 8
ret
.L7:
.cfi_restore_state
pushq 24(%rsp)
.cfi_def_cfa_offset 136
pushq 24(%rsp)
.cfi_def_cfa_offset 144
leaq 96(%rsp), %r9
movq 60(%rsp), %rcx
movl 68(%rsp), %r8d
movq 48(%rsp), %rsi
movl 56(%rsp), %edx
leaq _Z10replaceMatPiS_(%rip), %rdi
call cudaLaunchKernel@PLT
addq $16, %rsp
.cfi_def_cfa_offset 128
jmp .L3
.L8:
call __stack_chk_fail@PLT
.cfi_endproc
.LFE2082:
.size _Z32__device_stub__Z10replaceMatPiS_PiS_, .-_Z32__device_stub__Z10replaceMatPiS_PiS_
.globl _Z10replaceMatPiS_
.type _Z10replaceMatPiS_, @function
_Z10replaceMatPiS_:
.LFB2083:
.cfi_startproc
endbr64
subq $8, %rsp
.cfi_def_cfa_offset 16
call _Z32__device_stub__Z10replaceMatPiS_PiS_
addq $8, %rsp
.cfi_def_cfa_offset 8
ret
.cfi_endproc
.LFE2083:
.size _Z10replaceMatPiS_, .-_Z10replaceMatPiS_
.section .rodata.str1.1,"aMS",@progbits,1
.LC0:
.string "Enter m: "
.LC1:
.string "%d"
.LC2:
.string "Enter n: "
.LC3:
.string "Enter the matrix:\n"
.LC4:
.string "Result:\n"
.LC5:
.string "%d "
.LC6:
.string "\n"
.text
.globl main
.type main, @function
main:
.LFB2057:
.cfi_startproc
endbr64
pushq %r15
.cfi_def_cfa_offset 16
.cfi_offset 15, -16
pushq %r14
.cfi_def_cfa_offset 24
.cfi_offset 14, -24
pushq %r13
.cfi_def_cfa_offset 32
.cfi_offset 13, -32
pushq %r12
.cfi_def_cfa_offset 40
.cfi_offset 12, -40
pushq %rbp
.cfi_def_cfa_offset 48
.cfi_offset 6, -48
pushq %rbx
.cfi_def_cfa_offset 56
.cfi_offset 3, -56
subq $72, %rsp
.cfi_def_cfa_offset 128
movq %fs:40, %rax
movq %rax, 56(%rsp)
xorl %eax, %eax
leaq .LC0(%rip), %rsi
movl $2, %edi
call __printf_chk@PLT
leaq 8(%rsp), %rsi
leaq .LC1(%rip), %rbx
movq %rbx, %rdi
movl $0, %eax
call __isoc23_scanf@PLT
leaq .LC2(%rip), %rsi
movl $2, %edi
movl $0, %eax
call __printf_chk@PLT
leaq 12(%rsp), %rsi
movq %rbx, %rdi
movl $0, %eax
call __isoc23_scanf@PLT
movl 12(%rsp), %r13d
imull 8(%rsp), %r13d
sall $2, %r13d
movslq %r13d, %r13
movq %r13, %rdi
call malloc@PLT
movq %rax, %r15
movq %r13, %rdi
call malloc@PLT
movq %rax, %r12
leaq .LC3(%rip), %rsi
movl $2, %edi
movl $0, %eax
call __printf_chk@PLT
movl 8(%rsp), %eax
imull 12(%rsp), %eax
testl %eax, %eax
jle .L12
movq %r15, %rbp
movl $0, %ebx
leaq .LC1(%rip), %r14
.L13:
movq %rbp, %rsi
movq %r14, %rdi
movl $0, %eax
call __isoc23_scanf@PLT
addl $1, %ebx
addq $4, %rbp
movl 8(%rsp), %eax
imull 12(%rsp), %eax
cmpl %ebx, %eax
jg .L13
.L12:
leaq 16(%rsp), %rdi
movq %r13, %rsi
call cudaMalloc@PLT
leaq 24(%rsp), %rdi
movq %r13, %rsi
call cudaMalloc@PLT
movl $1, %ecx
movq %r13, %rdx
movq %r15, %rsi
movq 16(%rsp), %rdi
call cudaMemcpy@PLT
movl 12(%rsp), %eax
movl %eax, 44(%rsp)
movl $1, 48(%rsp)
movl 8(%rsp), %eax
movl %eax, 32(%rsp)
movl $1, 36(%rsp)
movl $0, %r9d
movl $0, %r8d
movq 44(%rsp), %rdx
movl $1, %ecx
movq 32(%rsp), %rdi
movl $1, %esi
call __cudaPushCallConfiguration@PLT
testl %eax, %eax
je .L27
.L14:
movl $2, %ecx
movq %r13, %rdx
movq 24(%rsp), %rsi
movq %r12, %rdi
call cudaMemcpy@PLT
leaq .LC4(%rip), %rsi
movl $2, %edi
movl $0, %eax
call __printf_chk@PLT
movl $0, %ebp
leaq .LC5(%rip), %r13
leaq .LC6(%rip), %r14
cmpl $0, 8(%rsp)
jg .L15
.L16:
movq 16(%rsp), %rdi
call cudaFree@PLT
movq 24(%rsp), %rdi
call cudaFree@PLT
movq 56(%rsp), %rax
subq %fs:40, %rax
jne .L28
movl $0, %eax
addq $72, %rsp
.cfi_remember_state
.cfi_def_cfa_offset 56
popq %rbx
.cfi_def_cfa_offset 48
popq %rbp
.cfi_def_cfa_offset 40
popq %r12
.cfi_def_cfa_offset 32
popq %r13
.cfi_def_cfa_offset 24
popq %r14
.cfi_def_cfa_offset 16
popq %r15
.cfi_def_cfa_offset 8
ret
.L27:
.cfi_restore_state
movq 24(%rsp), %rsi
movq 16(%rsp), %rdi
call _Z32__device_stub__Z10replaceMatPiS_PiS_
jmp .L14
.L17:
imull %ebp, %eax
addl %ebx, %eax
cltq
movl (%r12,%rax,4), %edx
movq %r13, %rsi
movl $2, %edi
movl $0, %eax
call __printf_chk@PLT
addl $1, %ebx
movl 12(%rsp), %eax
cmpl %ebx, %eax
jg .L17
.L18:
movq %r14, %rsi
movl $2, %edi
movl $0, %eax
call __printf_chk@PLT
addl $1, %ebp
cmpl %ebp, 8(%rsp)
jle .L16
.L15:
movl 12(%rsp), %eax
movl $0, %ebx
testl %eax, %eax
jg .L17
jmp .L18
.L28:
call __stack_chk_fail@PLT
.cfi_endproc
.LFE2057:
.size main, .-main
.section .rodata.str1.1
.LC7:
.string "_Z10replaceMatPiS_"
.text
.type _ZL24__sti____cudaRegisterAllv, @function
_ZL24__sti____cudaRegisterAllv:
.LFB2085:
.cfi_startproc
endbr64
subq $8, %rsp
.cfi_def_cfa_offset 16
leaq _ZL15__fatDeviceText(%rip), %rdi
call __cudaRegisterFatBinary@PLT
movq %rax, %rdi
movq %rax, _ZL20__cudaFatCubinHandle(%rip)
pushq $0
.cfi_def_cfa_offset 24
pushq $0
.cfi_def_cfa_offset 32
pushq $0
.cfi_def_cfa_offset 40
pushq $0
.cfi_def_cfa_offset 48
movl $0, %r9d
movl $-1, %r8d
leaq .LC7(%rip), %rdx
movq %rdx, %rcx
leaq _Z10replaceMatPiS_(%rip), %rsi
call __cudaRegisterFunction@PLT
addq $32, %rsp
.cfi_def_cfa_offset 16
movq _ZL20__cudaFatCubinHandle(%rip), %rdi
call __cudaRegisterFatBinaryEnd@PLT
leaq _ZL26__cudaUnregisterBinaryUtilv(%rip), %rdi
call atexit@PLT
addq $8, %rsp
.cfi_def_cfa_offset 8
ret
.cfi_endproc
.LFE2085:
.size _ZL24__sti____cudaRegisterAllv, .-_ZL24__sti____cudaRegisterAllv
.section .init_array,"aw"
.align 8
.quad _ZL24__sti____cudaRegisterAllv
.section .nvFatBinSegment,"aw"
.align 8
.type _ZL15__fatDeviceText, @object
.size _ZL15__fatDeviceText, 24
_ZL15__fatDeviceText:
.long 1180844977
.long 1
.quad fatbinData
.quad 0
.local _ZL20__cudaFatCubinHandle
.comm _ZL20__cudaFatCubinHandle,8,8
.ident "GCC: (Ubuntu 13.3.0-6ubuntu2~24.04) 13.3.0"
.section .note.GNU-stack,"",@progbits
.section .note.gnu.property,"a"
.align 8
.long 1f - 0f
.long 4f - 1f
.long 5
0:
.string "GNU"
1:
.align 8
.long 0xc0000002
.long 3f - 2f
2:
.long 0x3
3:
.align 8
4: |
You are a helpful coding assistant specialized in converting CUDA source code to HIP/AMD source code. | #include<stdio.h>
#include <stdlib.h>
__global__ void replaceMat(int *mat, int *res){
int i = blockIdx.x, j = threadIdx.x, n = blockDim.x;
//res[i*n+j] = mat[i*n+j];
res[i*n+j] = powf(mat[i*n+j],i+1);
//for(int p=0;p<i;p++)
//res[i*n+j] *= mat[i*n+j];
}
int main(){
int *a,*t,m,n,i,j,*da,*dt;
printf("Enter m: ");
scanf("%d",&m);
printf("Enter n: ");
scanf("%d",&n);
int size = sizeof(int)*m*n;
a = (int *)malloc(size);
t = (int *)malloc(size);
printf("Enter the matrix:\n");
for(i=0;i<m*n;i++)
scanf("%d",&a[i]);
cudaMalloc((void **)&da,size);
cudaMalloc((void **)&dt,size);
cudaMemcpy(da,a,size,cudaMemcpyHostToDevice);
replaceMat<<<m,n>>>(da,dt);
cudaMemcpy(t,dt,size,cudaMemcpyDeviceToHost);
printf("Result:\n");
for(i=0;i<m;i++){
for(j=0;j<n;j++)
printf("%d ",t[i*n+j]);
printf("\n");
}
cudaFree(da);
cudaFree(dt);
return 0;
} | #include <hip/hip_runtime.h>
#include<stdio.h>
#include <stdlib.h>
__global__ void replaceMat(int *mat, int *res){
int i = blockIdx.x, j = threadIdx.x, n = blockDim.x;
//res[i*n+j] = mat[i*n+j];
res[i*n+j] = powf(mat[i*n+j],i+1);
//for(int p=0;p<i;p++)
//res[i*n+j] *= mat[i*n+j];
}
int main(){
int *a,*t,m,n,i,j,*da,*dt;
printf("Enter m: ");
scanf("%d",&m);
printf("Enter n: ");
scanf("%d",&n);
int size = sizeof(int)*m*n;
a = (int *)malloc(size);
t = (int *)malloc(size);
printf("Enter the matrix:\n");
for(i=0;i<m*n;i++)
scanf("%d",&a[i]);
hipMalloc((void **)&da,size);
hipMalloc((void **)&dt,size);
hipMemcpy(da,a,size,hipMemcpyHostToDevice);
replaceMat<<<m,n>>>(da,dt);
hipMemcpy(t,dt,size,hipMemcpyDeviceToHost);
printf("Result:\n");
for(i=0;i<m;i++){
for(j=0;j<n;j++)
printf("%d ",t[i*n+j]);
printf("\n");
}
hipFree(da);
hipFree(dt);
return 0;
} |
You are a helpful coding assistant specialized in converting HIP source code to AMD device assembly. | #include <hip/hip_runtime.h>
#include<stdio.h>
#include <stdlib.h>
__global__ void replaceMat(int *mat, int *res){
int i = blockIdx.x, j = threadIdx.x, n = blockDim.x;
//res[i*n+j] = mat[i*n+j];
res[i*n+j] = powf(mat[i*n+j],i+1);
//for(int p=0;p<i;p++)
//res[i*n+j] *= mat[i*n+j];
}
int main(){
int *a,*t,m,n,i,j,*da,*dt;
printf("Enter m: ");
scanf("%d",&m);
printf("Enter n: ");
scanf("%d",&n);
int size = sizeof(int)*m*n;
a = (int *)malloc(size);
t = (int *)malloc(size);
printf("Enter the matrix:\n");
for(i=0;i<m*n;i++)
scanf("%d",&a[i]);
hipMalloc((void **)&da,size);
hipMalloc((void **)&dt,size);
hipMemcpy(da,a,size,hipMemcpyHostToDevice);
replaceMat<<<m,n>>>(da,dt);
hipMemcpy(t,dt,size,hipMemcpyDeviceToHost);
printf("Result:\n");
for(i=0;i<m;i++){
for(j=0;j<n;j++)
printf("%d ",t[i*n+j]);
printf("\n");
}
hipFree(da);
hipFree(dt);
return 0;
} | .text
.amdgcn_target "amdgcn-amd-amdhsa--gfx1100"
.protected _Z10replaceMatPiS_
.globl _Z10replaceMatPiS_
.p2align 8
.type _Z10replaceMatPiS_,@function
_Z10replaceMatPiS_:
s_clause 0x1
s_load_b32 s4, s[0:1], 0x1c
s_load_b128 s[0:3], s[0:1], 0x0
s_waitcnt lgkmcnt(0)
s_and_b32 s4, s4, 0xffff
s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
v_mad_u64_u32 v[1:2], null, s15, s4, v[0:1]
s_add_i32 s15, s15, 1
v_ashrrev_i32_e32 v2, 31, v1
s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
v_lshlrev_b64 v[0:1], 2, v[1:2]
v_add_co_u32 v2, vcc_lo, s0, v0
s_delay_alu instid0(VALU_DEP_2)
v_add_co_ci_u32_e32 v3, vcc_lo, s1, v1, vcc_lo
s_mov_b32 s0, 0x3e76c4e1
global_load_b32 v2, v[2:3], off
v_cvt_f32_i32_e32 v3, s15
s_waitcnt vmcnt(0)
v_cmp_ne_u32_e32 vcc_lo, 1, v2
v_cvt_f32_i32_e32 v2, v2
s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_1)
v_cndmask_b32_e32 v3, 1.0, v3, vcc_lo
v_cmp_neq_f32_e32 vcc_lo, 0, v3
s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_1)
v_cndmask_b32_e32 v2, 1.0, v2, vcc_lo
v_frexp_mant_f32_e64 v4, |v2|
s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
v_cmp_gt_f32_e32 vcc_lo, 0x3f2aaaab, v4
v_cndmask_b32_e64 v5, 0, 1, vcc_lo
v_ldexp_f32 v4, v4, v5
s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
v_add_f32_e32 v7, -1.0, v4
v_add_f32_e32 v5, 1.0, v4
v_rcp_f32_e32 v6, v5
s_waitcnt_depctr 0xfff
v_dual_mul_f32 v8, v7, v6 :: v_dual_add_f32 v9, -1.0, v5
s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_2)
v_mul_f32_e32 v10, v5, v8
v_sub_f32_e32 v4, v4, v9
s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
v_fma_f32 v5, v8, v5, -v10
v_fmac_f32_e32 v5, v8, v4
s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
v_add_f32_e32 v4, v10, v5
v_dual_sub_f32 v9, v7, v4 :: v_dual_sub_f32 v10, v4, v10
s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_2)
v_sub_f32_e32 v5, v10, v5
v_sub_f32_e32 v7, v7, v9
s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
v_sub_f32_e32 v4, v7, v4
v_add_f32_e32 v4, v5, v4
s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
v_add_f32_e32 v4, v9, v4
v_mul_f32_e32 v4, v6, v4
s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
v_add_f32_e32 v5, v8, v4
v_mul_f32_e32 v7, v5, v5
v_sub_f32_e32 v6, v5, v8
s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_3)
v_sub_f32_e32 v4, v4, v6
v_fma_f32 v6, v5, v5, -v7
s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
v_add_f32_e32 v8, v4, v4
v_fmac_f32_e32 v6, v5, v8
s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
v_add_f32_e32 v8, v7, v6
v_fmaak_f32 v9, s0, v8, 0x3e91f4c4
v_sub_f32_e32 v7, v8, v7
s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
v_dual_fmaak_f32 v9, v8, v9, 0x3ecccdef :: v_dual_sub_f32 v6, v6, v7
v_mul_f32_e32 v10, v8, v9
s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
v_fma_f32 v7, v8, v9, -v10
v_dual_fmac_f32 v7, v6, v9 :: v_dual_mul_f32 v12, v5, v8
s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_2)
v_add_f32_e32 v9, v10, v7
v_fma_f32 v13, v8, v5, -v12
s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_2) | instid1(VALU_DEP_3)
v_dual_sub_f32 v10, v9, v10 :: v_dual_fmac_f32 v13, v8, v4
v_add_f32_e32 v11, 0x3f2aaaaa, v9
v_ldexp_f32 v4, v4, 1
v_sub_f32_e32 v7, v7, v10
s_delay_alu instid0(VALU_DEP_4) | instskip(SKIP_1) | instid1(VALU_DEP_3)
v_fmac_f32_e32 v13, v6, v5
v_ldexp_f32 v5, v5, 1
v_add_f32_e32 v7, 0x31739010, v7
v_add_f32_e32 v10, 0xbf2aaaaa, v11
s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
v_sub_f32_e32 v9, v9, v10
v_add_f32_e32 v7, v7, v9
s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
v_add_f32_e32 v6, v11, v7
v_dual_add_f32 v8, v12, v13 :: v_dual_sub_f32 v9, v11, v6
s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_3)
v_mul_f32_e32 v10, v8, v6
v_sub_f32_e32 v11, v8, v12
v_add_f32_e32 v7, v7, v9
s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3)
v_fma_f32 v9, v8, v6, -v10
v_sub_f32_e32 v11, v13, v11
s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_2)
v_fmac_f32_e32 v9, v8, v7
v_frexp_exp_i32_f32_e32 v7, v2
v_fmac_f32_e32 v9, v11, v6
s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
v_subrev_co_ci_u32_e32 v6, vcc_lo, 0, v7, vcc_lo
v_add_f32_e32 v7, v10, v9
s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
v_cvt_f32_i32_e32 v6, v6
v_sub_f32_e32 v10, v7, v10
v_add_f32_e32 v8, v5, v7
s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
v_sub_f32_e32 v9, v9, v10
v_dual_mul_f32 v11, 0x3f317218, v6 :: v_dual_add_f32 v4, v4, v9
s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
v_fma_f32 v10, v6, 0x3f317218, -v11
v_dual_fmamk_f32 v6, v6, 0xb102e308, v10 :: v_dual_sub_f32 v5, v8, v5
s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
v_sub_f32_e32 v5, v7, v5
v_dual_add_f32 v4, v4, v5 :: v_dual_add_f32 v5, v11, v6
s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_2)
v_add_f32_e32 v7, v8, v4
v_sub_f32_e32 v11, v5, v11
s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_3)
v_sub_f32_e32 v6, v6, v11
v_add_f32_e32 v9, v5, v7
s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_2)
v_sub_f32_e32 v10, v9, v5
v_sub_f32_e32 v8, v7, v8
v_sub_f32_e32 v12, v9, v10
s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
v_dual_sub_f32 v4, v4, v8 :: v_dual_sub_f32 v7, v7, v10
v_sub_f32_e32 v5, v5, v12
s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
v_dual_add_f32 v8, v6, v4 :: v_dual_add_f32 v5, v7, v5
v_sub_f32_e32 v7, v8, v6
s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
v_add_f32_e32 v5, v8, v5
v_sub_f32_e32 v8, v8, v7
v_sub_f32_e32 v4, v4, v7
s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_4)
v_sub_f32_e32 v6, v6, v8
v_add_f32_e32 v10, v9, v5
s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
v_dual_add_f32 v4, v4, v6 :: v_dual_sub_f32 v7, v10, v9
v_sub_f32_e32 v5, v5, v7
s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
v_add_f32_e32 v4, v4, v5
v_add_f32_e32 v5, v10, v4
s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
v_dual_sub_f32 v6, v5, v10 :: v_dual_mul_f32 v7, v3, v5
v_sub_f32_e32 v4, v4, v6
s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_2)
v_fma_f32 v5, v3, v5, -v7
v_cmp_class_f32_e64 vcc_lo, v7, 0x204
v_fmac_f32_e32 v5, v3, v4
s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
v_add_f32_e32 v4, v7, v5
v_cndmask_b32_e32 v6, v4, v7, vcc_lo
s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_2) | instid1(VALU_DEP_2)
v_cmp_eq_f32_e32 vcc_lo, 0x42b17218, v6
v_cndmask_b32_e64 v8, 0, 0x37000000, vcc_lo
v_cmp_neq_f32_e64 vcc_lo, 0x7f800000, |v6|
v_sub_f32_e32 v9, v6, v8
v_trunc_f32_e32 v6, v3
s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
v_mul_f32_e32 v10, 0x3fb8aa3b, v9
v_fma_f32 v11, v9, 0x3fb8aa3b, -v10
v_rndne_f32_e32 v12, v10
s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
v_dual_fmamk_f32 v11, v9, 0x32a5705f, v11 :: v_dual_sub_f32 v10, v10, v12
v_add_f32_e32 v10, v10, v11
v_sub_f32_e32 v4, v4, v7
v_cvt_i32_f32_e32 v7, v12
s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_2)
v_exp_f32_e32 v10, v10
v_sub_f32_e32 v4, v5, v4
s_waitcnt_depctr 0xfff
v_ldexp_f32 v5, v10, v7
v_dual_mul_f32 v7, 0.5, v3 :: v_dual_cndmask_b32 v4, 0, v4
v_cmp_ngt_f32_e32 vcc_lo, 0xc2ce8ed0, v9
s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_3)
v_trunc_f32_e32 v10, v7
v_dual_add_f32 v4, v8, v4 :: v_dual_cndmask_b32 v5, 0, v5
v_cmp_nlt_f32_e32 vcc_lo, 0x42b17218, v9
s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3)
v_cmp_neq_f32_e64 s0, v10, v7
v_cndmask_b32_e32 v5, 0x7f800000, v5, vcc_lo
v_cmp_eq_f32_e32 vcc_lo, v6, v3
s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_2) | instid1(SALU_CYCLE_1)
v_fma_f32 v4, v5, v4, v5
v_cmp_eq_f32_e64 s1, 0x7f800000, v5
s_and_b32 s0, vcc_lo, s0
v_cndmask_b32_e64 v6, 1.0, v2, s0
s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_2)
v_cndmask_b32_e64 v4, v4, v5, s1
v_cmp_gt_f32_e64 s1, 0, v2
v_bfi_b32 v4, 0x7fffffff, v4, v6
s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_2)
v_cndmask_b32_e32 v5, 0x7fc00000, v4, vcc_lo
v_cmp_gt_f32_e32 vcc_lo, 0, v3
v_cndmask_b32_e64 v3, v4, v5, s1
v_cmp_eq_f32_e64 s1, 0, v2
v_cndmask_b32_e64 v2, 0, v2, s0
s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_3) | instid1(VALU_DEP_2)
s_xor_b32 s0, vcc_lo, s1
v_add_co_u32 v0, vcc_lo, s2, v0
v_cndmask_b32_e64 v4, 0x7f800000, 0, s0
v_add_co_ci_u32_e32 v1, vcc_lo, s3, v1, vcc_lo
v_bfi_b32 v2, 0x7fffffff, v4, v2
s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
v_cndmask_b32_e64 v2, v3, v2, s1
v_cvt_i32_f32_e32 v2, v2
global_store_b32 v[0:1], v2, off
s_nop 0
s_sendmsg sendmsg(MSG_DEALLOC_VGPRS)
s_endpgm
.section .rodata,"a",@progbits
.p2align 6, 0x0
.amdhsa_kernel _Z10replaceMatPiS_
.amdhsa_group_segment_fixed_size 0
.amdhsa_private_segment_fixed_size 0
.amdhsa_kernarg_size 272
.amdhsa_user_sgpr_count 15
.amdhsa_user_sgpr_dispatch_ptr 0
.amdhsa_user_sgpr_queue_ptr 0
.amdhsa_user_sgpr_kernarg_segment_ptr 1
.amdhsa_user_sgpr_dispatch_id 0
.amdhsa_user_sgpr_private_segment_size 0
.amdhsa_wavefront_size32 1
.amdhsa_uses_dynamic_stack 0
.amdhsa_enable_private_segment 0
.amdhsa_system_sgpr_workgroup_id_x 1
.amdhsa_system_sgpr_workgroup_id_y 0
.amdhsa_system_sgpr_workgroup_id_z 0
.amdhsa_system_sgpr_workgroup_info 0
.amdhsa_system_vgpr_workitem_id 0
.amdhsa_next_free_vgpr 14
.amdhsa_next_free_sgpr 16
.amdhsa_float_round_mode_32 0
.amdhsa_float_round_mode_16_64 0
.amdhsa_float_denorm_mode_32 3
.amdhsa_float_denorm_mode_16_64 3
.amdhsa_dx10_clamp 1
.amdhsa_ieee_mode 1
.amdhsa_fp16_overflow 0
.amdhsa_workgroup_processor_mode 1
.amdhsa_memory_ordered 1
.amdhsa_forward_progress 0
.amdhsa_shared_vgpr_count 0
.amdhsa_exception_fp_ieee_invalid_op 0
.amdhsa_exception_fp_denorm_src 0
.amdhsa_exception_fp_ieee_div_zero 0
.amdhsa_exception_fp_ieee_overflow 0
.amdhsa_exception_fp_ieee_underflow 0
.amdhsa_exception_fp_ieee_inexact 0
.amdhsa_exception_int_div_zero 0
.end_amdhsa_kernel
.text
.Lfunc_end0:
.size _Z10replaceMatPiS_, .Lfunc_end0-_Z10replaceMatPiS_
.section .AMDGPU.csdata,"",@progbits
.text
.p2alignl 7, 3214868480
.fill 96, 4, 3214868480
.type __hip_cuid_,@object
.section .bss,"aw",@nobits
.globl __hip_cuid_
__hip_cuid_:
.byte 0
.size __hip_cuid_, 1
.ident "AMD clang version 18.0.0git (https://github.com/RadeonOpenCompute/llvm-project roc-6.3.2 25012 e5bf7e55c91490b07c49d8960fa7983d864936c4)"
.section ".note.GNU-stack","",@progbits
.addrsig
.addrsig_sym __hip_cuid_
.amdgpu_metadata
---
amdhsa.kernels:
- .args:
- .address_space: global
.offset: 0
.size: 8
.value_kind: global_buffer
- .address_space: global
.offset: 8
.size: 8
.value_kind: global_buffer
- .offset: 16
.size: 4
.value_kind: hidden_block_count_x
- .offset: 20
.size: 4
.value_kind: hidden_block_count_y
- .offset: 24
.size: 4
.value_kind: hidden_block_count_z
- .offset: 28
.size: 2
.value_kind: hidden_group_size_x
- .offset: 30
.size: 2
.value_kind: hidden_group_size_y
- .offset: 32
.size: 2
.value_kind: hidden_group_size_z
- .offset: 34
.size: 2
.value_kind: hidden_remainder_x
- .offset: 36
.size: 2
.value_kind: hidden_remainder_y
- .offset: 38
.size: 2
.value_kind: hidden_remainder_z
- .offset: 56
.size: 8
.value_kind: hidden_global_offset_x
- .offset: 64
.size: 8
.value_kind: hidden_global_offset_y
- .offset: 72
.size: 8
.value_kind: hidden_global_offset_z
- .offset: 80
.size: 2
.value_kind: hidden_grid_dims
.group_segment_fixed_size: 0
.kernarg_segment_align: 8
.kernarg_segment_size: 272
.language: OpenCL C
.language_version:
- 2
- 0
.max_flat_workgroup_size: 1024
.name: _Z10replaceMatPiS_
.private_segment_fixed_size: 0
.sgpr_count: 18
.sgpr_spill_count: 0
.symbol: _Z10replaceMatPiS_.kd
.uniform_work_group_size: 1
.uses_dynamic_stack: false
.vgpr_count: 14
.vgpr_spill_count: 0
.wavefront_size: 32
.workgroup_processor_mode: 1
amdhsa.target: amdgcn-amd-amdhsa--gfx1100
amdhsa.version:
- 1
- 2
...
.end_amdgpu_metadata |
You are a helpful coding assistant specialized in converting HIP source code to AMD host assembly. | #include <hip/hip_runtime.h>
#include<stdio.h>
#include <stdlib.h>
__global__ void replaceMat(int *mat, int *res){
int i = blockIdx.x, j = threadIdx.x, n = blockDim.x;
//res[i*n+j] = mat[i*n+j];
res[i*n+j] = powf(mat[i*n+j],i+1);
//for(int p=0;p<i;p++)
//res[i*n+j] *= mat[i*n+j];
}
int main(){
int *a,*t,m,n,i,j,*da,*dt;
printf("Enter m: ");
scanf("%d",&m);
printf("Enter n: ");
scanf("%d",&n);
int size = sizeof(int)*m*n;
a = (int *)malloc(size);
t = (int *)malloc(size);
printf("Enter the matrix:\n");
for(i=0;i<m*n;i++)
scanf("%d",&a[i]);
hipMalloc((void **)&da,size);
hipMalloc((void **)&dt,size);
hipMemcpy(da,a,size,hipMemcpyHostToDevice);
replaceMat<<<m,n>>>(da,dt);
hipMemcpy(t,dt,size,hipMemcpyDeviceToHost);
printf("Result:\n");
for(i=0;i<m;i++){
for(j=0;j<n;j++)
printf("%d ",t[i*n+j]);
printf("\n");
}
hipFree(da);
hipFree(dt);
return 0;
} | .text
.file "q1.hip"
.globl _Z25__device_stub__replaceMatPiS_ # -- Begin function _Z25__device_stub__replaceMatPiS_
.p2align 4, 0x90
.type _Z25__device_stub__replaceMatPiS_,@function
_Z25__device_stub__replaceMatPiS_: # @_Z25__device_stub__replaceMatPiS_
.cfi_startproc
# %bb.0:
subq $88, %rsp
.cfi_def_cfa_offset 96
movq %rdi, 56(%rsp)
movq %rsi, 48(%rsp)
leaq 56(%rsp), %rax
movq %rax, 64(%rsp)
leaq 48(%rsp), %rax
movq %rax, 72(%rsp)
leaq 32(%rsp), %rdi
leaq 16(%rsp), %rsi
leaq 8(%rsp), %rdx
movq %rsp, %rcx
callq __hipPopCallConfiguration
movq 32(%rsp), %rsi
movl 40(%rsp), %edx
movq 16(%rsp), %rcx
movl 24(%rsp), %r8d
leaq 64(%rsp), %r9
movl $_Z10replaceMatPiS_, %edi
pushq (%rsp)
.cfi_adjust_cfa_offset 8
pushq 16(%rsp)
.cfi_adjust_cfa_offset 8
callq hipLaunchKernel
addq $104, %rsp
.cfi_adjust_cfa_offset -104
retq
.Lfunc_end0:
.size _Z25__device_stub__replaceMatPiS_, .Lfunc_end0-_Z25__device_stub__replaceMatPiS_
.cfi_endproc
# -- End function
.globl main # -- Begin function main
.p2align 4, 0x90
.type main,@function
main: # @main
.cfi_startproc
# %bb.0:
pushq %rbp
.cfi_def_cfa_offset 16
pushq %r15
.cfi_def_cfa_offset 24
pushq %r14
.cfi_def_cfa_offset 32
pushq %r13
.cfi_def_cfa_offset 40
pushq %r12
.cfi_def_cfa_offset 48
pushq %rbx
.cfi_def_cfa_offset 56
subq $120, %rsp
.cfi_def_cfa_offset 176
.cfi_offset %rbx, -56
.cfi_offset %r12, -48
.cfi_offset %r13, -40
.cfi_offset %r14, -32
.cfi_offset %r15, -24
.cfi_offset %rbp, -16
movl $.L.str, %edi
xorl %eax, %eax
callq printf
leaq 12(%rsp), %rsi
movl $.L.str.1, %edi
xorl %eax, %eax
callq __isoc23_scanf
movl $.L.str.2, %edi
xorl %eax, %eax
callq printf
leaq 8(%rsp), %rsi
movl $.L.str.1, %edi
xorl %eax, %eax
callq __isoc23_scanf
movl 12(%rsp), %eax
imull 8(%rsp), %eax
shll $2, %eax
movslq %eax, %r14
movq %r14, %rdi
callq malloc
movq %rax, %r15
movq %r14, %rdi
callq malloc
movq %rax, %rbx
movl $.Lstr, %edi
callq puts@PLT
movl 8(%rsp), %eax
imull 12(%rsp), %eax
testl %eax, %eax
jle .LBB1_3
# %bb.1: # %.lr.ph.preheader
movq %r15, %r12
xorl %r13d, %r13d
.p2align 4, 0x90
.LBB1_2: # %.lr.ph
# =>This Inner Loop Header: Depth=1
movl $.L.str.1, %edi
movq %r12, %rsi
xorl %eax, %eax
callq __isoc23_scanf
incq %r13
movslq 12(%rsp), %rax
movslq 8(%rsp), %rcx
imulq %rax, %rcx
addq $4, %r12
cmpq %rcx, %r13
jl .LBB1_2
.LBB1_3: # %._crit_edge
leaq 24(%rsp), %rdi
movq %r14, %rsi
callq hipMalloc
leaq 16(%rsp), %rdi
movq %r14, %rsi
callq hipMalloc
movq 24(%rsp), %rdi
movq %r15, %rsi
movq %r14, %rdx
movl $1, %ecx
callq hipMemcpy
movl 12(%rsp), %edi
movl 8(%rsp), %edx
movabsq $4294967296, %rax # imm = 0x100000000
orq %rax, %rdi
orq %rax, %rdx
movl $1, %esi
movl $1, %ecx
xorl %r8d, %r8d
xorl %r9d, %r9d
callq __hipPushCallConfiguration
testl %eax, %eax
jne .LBB1_5
# %bb.4:
movq 24(%rsp), %rax
movq 16(%rsp), %rcx
movq %rax, 88(%rsp)
movq %rcx, 80(%rsp)
leaq 88(%rsp), %rax
movq %rax, 96(%rsp)
leaq 80(%rsp), %rax
movq %rax, 104(%rsp)
leaq 64(%rsp), %rdi
leaq 48(%rsp), %rsi
leaq 40(%rsp), %rdx
leaq 32(%rsp), %rcx
callq __hipPopCallConfiguration
movq 64(%rsp), %rsi
movl 72(%rsp), %edx
movq 48(%rsp), %rcx
movl 56(%rsp), %r8d
leaq 96(%rsp), %r9
movl $_Z10replaceMatPiS_, %edi
pushq 32(%rsp)
.cfi_adjust_cfa_offset 8
pushq 48(%rsp)
.cfi_adjust_cfa_offset 8
callq hipLaunchKernel
addq $16, %rsp
.cfi_adjust_cfa_offset -16
.LBB1_5:
movq 16(%rsp), %rsi
movq %rbx, %rdi
movq %r14, %rdx
movl $2, %ecx
callq hipMemcpy
movl $.Lstr.1, %edi
callq puts@PLT
cmpl $0, 12(%rsp)
jle .LBB1_11
# %bb.6: # %.preheader.preheader
xorl %ebp, %ebp
jmp .LBB1_7
.p2align 4, 0x90
.LBB1_10: # %._crit_edge29
# in Loop: Header=BB1_7 Depth=1
movl $10, %edi
callq putchar@PLT
incl %ebp
cmpl 12(%rsp), %ebp
jge .LBB1_11
.LBB1_7: # %.preheader
# =>This Loop Header: Depth=1
# Child Loop BB1_9 Depth 2
movl 8(%rsp), %eax
testl %eax, %eax
jle .LBB1_10
# %bb.8: # %.lr.ph28.preheader
# in Loop: Header=BB1_7 Depth=1
xorl %r14d, %r14d
.p2align 4, 0x90
.LBB1_9: # %.lr.ph28
# Parent Loop BB1_7 Depth=1
# => This Inner Loop Header: Depth=2
imull %ebp, %eax
cltq
addq %r14, %rax
movl (%rbx,%rax,4), %esi
movl $.L.str.5, %edi
xorl %eax, %eax
callq printf
movl 8(%rsp), %eax
incq %r14
cmpl %eax, %r14d
jl .LBB1_9
jmp .LBB1_10
.LBB1_11: # %._crit_edge31
movq 24(%rsp), %rdi
callq hipFree
movq 16(%rsp), %rdi
callq hipFree
xorl %eax, %eax
addq $120, %rsp
.cfi_def_cfa_offset 56
popq %rbx
.cfi_def_cfa_offset 48
popq %r12
.cfi_def_cfa_offset 40
popq %r13
.cfi_def_cfa_offset 32
popq %r14
.cfi_def_cfa_offset 24
popq %r15
.cfi_def_cfa_offset 16
popq %rbp
.cfi_def_cfa_offset 8
retq
.Lfunc_end1:
.size main, .Lfunc_end1-main
.cfi_endproc
# -- End function
.p2align 4, 0x90 # -- Begin function __hip_module_ctor
.type __hip_module_ctor,@function
__hip_module_ctor: # @__hip_module_ctor
.cfi_startproc
# %bb.0:
subq $40, %rsp
.cfi_def_cfa_offset 48
cmpq $0, __hip_gpubin_handle(%rip)
jne .LBB2_2
# %bb.1:
movl $__hip_fatbin_wrapper, %edi
callq __hipRegisterFatBinary
movq %rax, __hip_gpubin_handle(%rip)
.LBB2_2:
movq __hip_gpubin_handle(%rip), %rdi
xorps %xmm0, %xmm0
movups %xmm0, 16(%rsp)
movups %xmm0, (%rsp)
movl $_Z10replaceMatPiS_, %esi
movl $.L__unnamed_1, %edx
movl $.L__unnamed_1, %ecx
movl $-1, %r8d
xorl %r9d, %r9d
callq __hipRegisterFunction
movl $__hip_module_dtor, %edi
addq $40, %rsp
.cfi_def_cfa_offset 8
jmp atexit # TAILCALL
.Lfunc_end2:
.size __hip_module_ctor, .Lfunc_end2-__hip_module_ctor
.cfi_endproc
# -- End function
.p2align 4, 0x90 # -- Begin function __hip_module_dtor
.type __hip_module_dtor,@function
__hip_module_dtor: # @__hip_module_dtor
.cfi_startproc
# %bb.0:
movq __hip_gpubin_handle(%rip), %rdi
testq %rdi, %rdi
je .LBB3_2
# %bb.1:
pushq %rax
.cfi_def_cfa_offset 16
callq __hipUnregisterFatBinary
movq $0, __hip_gpubin_handle(%rip)
addq $8, %rsp
.cfi_def_cfa_offset 8
.LBB3_2:
retq
.Lfunc_end3:
.size __hip_module_dtor, .Lfunc_end3-__hip_module_dtor
.cfi_endproc
# -- End function
.type _Z10replaceMatPiS_,@object # @_Z10replaceMatPiS_
.section .rodata,"a",@progbits
.globl _Z10replaceMatPiS_
.p2align 3, 0x0
_Z10replaceMatPiS_:
.quad _Z25__device_stub__replaceMatPiS_
.size _Z10replaceMatPiS_, 8
.type .L.str,@object # @.str
.section .rodata.str1.1,"aMS",@progbits,1
.L.str:
.asciz "Enter m: "
.size .L.str, 10
.type .L.str.1,@object # @.str.1
.L.str.1:
.asciz "%d"
.size .L.str.1, 3
.type .L.str.2,@object # @.str.2
.L.str.2:
.asciz "Enter n: "
.size .L.str.2, 10
.type .L.str.5,@object # @.str.5
.L.str.5:
.asciz "%d "
.size .L.str.5, 4
.type .L__unnamed_1,@object # @0
.L__unnamed_1:
.asciz "_Z10replaceMatPiS_"
.size .L__unnamed_1, 19
.type __hip_fatbin_wrapper,@object # @__hip_fatbin_wrapper
.section .hipFatBinSegment,"a",@progbits
.p2align 3, 0x0
__hip_fatbin_wrapper:
.long 1212764230 # 0x48495046
.long 1 # 0x1
.quad __hip_fatbin
.quad 0
.size __hip_fatbin_wrapper, 24
.type __hip_gpubin_handle,@object # @__hip_gpubin_handle
.local __hip_gpubin_handle
.comm __hip_gpubin_handle,8,8
.section .init_array,"aw",@init_array
.p2align 3, 0x0
.quad __hip_module_ctor
.type __hip_cuid_,@object # @__hip_cuid_
.bss
.globl __hip_cuid_
__hip_cuid_:
.byte 0 # 0x0
.size __hip_cuid_, 1
.type .Lstr,@object # @str
.section .rodata.str1.1,"aMS",@progbits,1
.Lstr:
.asciz "Enter the matrix:"
.size .Lstr, 18
.type .Lstr.1,@object # @str.1
.Lstr.1:
.asciz "Result:"
.size .Lstr.1, 8
.section ".linker-options","e",@llvm_linker_options
.ident "AMD clang version 18.0.0git (https://github.com/RadeonOpenCompute/llvm-project roc-6.3.2 25012 e5bf7e55c91490b07c49d8960fa7983d864936c4)"
.section ".note.GNU-stack","",@progbits
.addrsig
.addrsig_sym _Z25__device_stub__replaceMatPiS_
.addrsig_sym __hip_module_ctor
.addrsig_sym __hip_module_dtor
.addrsig_sym _Z10replaceMatPiS_
.addrsig_sym __hip_fatbin
.addrsig_sym __hip_fatbin_wrapper
.addrsig_sym __hip_cuid_ |
You are a helpful coding assistant specialized in converting from CUDA device assembly to AMD device assembly. | code for sm_80
Function : _Z10replaceMatPiS_
.headerflags @"EF_CUDA_TEXMODE_UNIFIED EF_CUDA_64BIT_ADDRESS EF_CUDA_SM80 EF_CUDA_VIRTUAL_SM(EF_CUDA_SM80)"
/*0000*/ MOV R1, c[0x0][0x28] ; /* 0x00000a0000017a02 */
/* 0x000fe40000000f00 */
/*0010*/ S2R R2, SR_CTAID.X ; /* 0x0000000000027919 */
/* 0x000e220000002500 */
/*0020*/ HFMA2.MMA R7, -RZ, RZ, 0, 2.384185791015625e-07 ; /* 0x00000004ff077435 */
/* 0x000fe200000001ff */
/*0030*/ ULDC.64 UR4, c[0x0][0x118] ; /* 0x0000460000047ab9 */
/* 0x000fe40000000a00 */
/*0040*/ S2R R3, SR_TID.X ; /* 0x0000000000037919 */
/* 0x000e240000002100 */
/*0050*/ IMAD R0, R2, c[0x0][0x0], R3 ; /* 0x0000000002007a24 */
/* 0x001fca00078e0203 */
/*0060*/ IMAD.WIDE R6, R0, R7, c[0x0][0x160] ; /* 0x0000580000067625 */
/* 0x000fca00078e0207 */
/*0070*/ LDG.E R3, [R6.64] ; /* 0x0000000406037981 */
/* 0x000ea2000c1e1900 */
/*0080*/ HFMA2.MMA R14, -RZ, RZ, 0.771484375, 0.21533203125 ; /* 0x3a2c32e4ff0e7435 */
/* 0x000fe200000001ff */
/*0090*/ BSSY B0, 0x690 ; /* 0x000005f000007945 */
/* 0x000fe20003800000 */
/*00a0*/ I2F R4, R3 ; /* 0x0000000300047306 */
/* 0x004e240000201400 */
/*00b0*/ FMUL R5, |R4|.reuse, 16777216 ; /* 0x4b80000004057820 */
/* 0x041fe20000400200 */
/*00c0*/ FSETP.GEU.AND P0, PT, |R4|, 1.175494350822287508e-38, PT ; /* 0x008000000400780b */
/* 0x000fc80003f0e200 */
/*00d0*/ FSEL R5, R5, |R4|, !P0 ; /* 0x4000000405057208 */
/* 0x000fc80004000000 */
/*00e0*/ IADD3 R8, R5, -0x3f3504f3, RZ ; /* 0xc0cafb0d05087810 */
/* 0x000fc80007ffe0ff */
/*00f0*/ LOP3.LUT R8, R8, 0xff800000, RZ, 0xc0, !PT ; /* 0xff80000008087812 */
/* 0x000fc800078ec0ff */
/*0100*/ IADD3 R5, R5, -R8, RZ ; /* 0x8000000805057210 */
/* 0x000fe40007ffe0ff */
/*0110*/ I2F R8, R8 ; /* 0x0000000800087306 */
/* 0x000fe60000201400 */
/*0120*/ FADD R9, R5.reuse, 1 ; /* 0x3f80000005097421 */
/* 0x040fe40000000000 */
/*0130*/ FADD R7, R5, -1 ; /* 0xbf80000005077421 */
/* 0x000fe20000000000 */
/*0140*/ FSEL R5, RZ, -24, P0 ; /* 0xc1c00000ff057808 */
/* 0x000fc60000000000 */
/*0150*/ MUFU.RCP R9, R9 ; /* 0x0000000900097308 */
/* 0x000e220000001000 */
/*0160*/ FADD R6, R7, R7 ; /* 0x0000000707067221 */
/* 0x000fc80000000000 */
/*0170*/ FMUL R10, R9, R6 ; /* 0x00000006090a7220 */
/* 0x001fe40000400000 */
/*0180*/ FFMA R6, R8, 1.1920928955078125e-07, R5 ; /* 0x3400000008067823 */
/* 0x000fe40000000005 */
/*0190*/ FADD R12, R7, -R10 ; /* 0x8000000a070c7221 */
/* 0x000fe40000000000 */
/*01a0*/ FMUL R11, R10.reuse, R10 ; /* 0x0000000a0a0b7220 */
/* 0x040fe40000400000 */
/*01b0*/ FFMA R5, R10, 1.4426950216293334961, R6 ; /* 0x3fb8aa3b0a057823 */
/* 0x000fe40000000006 */
/*01c0*/ FADD R12, R12, R12 ; /* 0x0000000c0c0c7221 */
/* 0x000fc40000000000 */
/*01d0*/ FFMA R8, R11, R14, 0.0032181653659790754318 ; /* 0x3b52e7db0b087423 */
/* 0x000fe4000000000e */
/*01e0*/ FADD R13, R6, -R5 ; /* 0x80000005060d7221 */
/* 0x000fe20000000000 */
/*01f0*/ IADD3 R6, R2, 0x1, RZ ; /* 0x0000000102067810 */
/* 0x000fe20007ffe0ff */
/*0200*/ FFMA R12, R7, -R10, R12 ; /* 0x8000000a070c7223 */
/* 0x000fe4000000000c */
/*0210*/ FFMA R8, R11, R8, 0.018033718690276145935 ; /* 0x3c93bb730b087423 */
/* 0x000fe20000000008 */
/*0220*/ I2F R7, R6 ; /* 0x0000000600077306 */
/* 0x000e220000201400 */
/*0230*/ FFMA R13, R10, 1.4426950216293334961, R13 ; /* 0x3fb8aa3b0a0d7823 */
/* 0x000fe4000000000d */
/*0240*/ FMUL R12, R9, R12 ; /* 0x0000000c090c7220 */
/* 0x000fc40000400000 */
/*0250*/ FFMA R8, R11.reuse, R8, 0.12022458761930465698 ; /* 0x3df6384f0b087423 */
/* 0x040fe40000000008 */
/*0260*/ FFMA R13, R12, 1.4426950216293334961, R13 ; /* 0x3fb8aa3b0c0d7823 */
/* 0x000fe4000000000d */
/*0270*/ FMUL R11, R11, R8 ; /* 0x000000080b0b7220 */
/* 0x000fe40000400000 */
/*0280*/ FFMA R13, R10, 1.9251366722983220825e-08, R13 ; /* 0x32a55e340a0d7823 */
/* 0x000fe4000000000d */
/*0290*/ FMUL R8, R11, 3 ; /* 0x404000000b087820 */
/* 0x000fc80000400000 */
/*02a0*/ FFMA R8, R12, R8, R13 ; /* 0x000000080c087223 */
/* 0x000fc8000000000d */
/*02b0*/ FFMA R10, R10, R11, R8 ; /* 0x0000000b0a0a7223 */
/* 0x000fe20000000008 */
/*02c0*/ MOV R11, 0x391fcb8e ; /* 0x391fcb8e000b7802 */
/* 0x000fc60000000f00 */
/*02d0*/ FADD R12, R5, R10 ; /* 0x0000000a050c7221 */
/* 0x000fc80000000000 */
/*02e0*/ FMUL R8, R7, R12.reuse ; /* 0x0000000c07087220 */
/* 0x081fe40000400000 */
/*02f0*/ FADD R5, -R5, R12 ; /* 0x0000000c05057221 */
/* 0x000fe40000000100 */
/*0300*/ FRND R9, R8 ; /* 0x0000000800097307 */
/* 0x000e220000201000 */
/*0310*/ FFMA R12, R7, R12, -R8 ; /* 0x0000000c070c7223 */
/* 0x000fe20000000808 */
/*0320*/ FSETP.GT.AND P1, PT, |R8|, 152, PT ; /* 0x431800000800780b */
/* 0x000fe20003f24200 */
/*0330*/ FADD R10, R10, -R5 ; /* 0x800000050a0a7221 */
/* 0x000fe20000000000 */
/*0340*/ FSETP.GEU.AND P2, PT, R8, RZ, PT ; /* 0x000000ff0800720b */
/* 0x000fc60003f4e000 */
/*0350*/ FFMA R10, R7, R10, R12 ; /* 0x0000000a070a7223 */
/* 0x000fe4000000000c */
/*0360*/ F2I.NTZ R12, R8 ; /* 0x00000008000c7305 */
/* 0x0002a20000203100 */
/*0370*/ FADD R5, R8, -R9 ; /* 0x8000000908057221 */
/* 0x001fe20000000000 */
/*0380*/ FSETP.GT.AND P0, PT, R9, RZ, PT ; /* 0x000000ff0900720b */
/* 0x000fe20003f04000 */
/*0390*/ HFMA2.MMA R8, -RZ, RZ, 1.875, 0 ; /* 0x3f800000ff087435 */
/* 0x002fe400000001ff */
/*03a0*/ FADD R10, R10, R5 ; /* 0x000000050a0a7221 */
/* 0x000fe20000000000 */
/*03b0*/ SEL R9, RZ, 0x83000000, P0 ; /* 0x83000000ff097807 */
/* 0x000fe40000000000 */
/*03c0*/ ISETP.NE.AND P0, PT, R3, 0x1, PT ; /* 0x000000010300780c */
/* 0x000fe20003f05270 */
/*03d0*/ FFMA R5, R10, R11, 0.0013391353422775864601 ; /* 0x3aaf85ed0a057423 */
/* 0x000fc6000000000b */
/*03e0*/ ISETP.EQ.OR P0, PT, R6, RZ, !P0 ; /* 0x000000ff0600720c */
/* 0x000fe20004702670 */
/*03f0*/ FFMA R5, R10, R5, 0.0096188392490148544312 ; /* 0x3c1d98560a057423 */
/* 0x000fc80000000005 */
/*0400*/ FFMA R5, R10, R5, 0.055503588169813156128 ; /* 0x3d6357bb0a057423 */
/* 0x000fc80000000005 */
/*0410*/ FFMA R11, R10.reuse, R5, 0.24022644758224487305 ; /* 0x3e75fdec0a0b7423 */
/* 0x040fe40000000005 */
/*0420*/ FMUL R5, R7, 0.5 ; /* 0x3f00000007057820 */
/* 0x000fe40000400000 */
/*0430*/ FFMA R11, R10, R11, 0.69314718246459960938 ; /* 0x3f3172180a0b7423 */
/* 0x000fc8000000000b */
/*0440*/ FRND.TRUNC R5, R5 ; /* 0x0000000500057307 */
/* 0x000e22000020d000 */
/*0450*/ FFMA R11, R10, R11, 1 ; /* 0x3f8000000a0b7423 */
/* 0x000fe2000000000b */
/*0460*/ IADD3 R10, R9, 0x7f000000, RZ ; /* 0x7f000000090a7810 */
/* 0x000fe40007ffe0ff */
/*0470*/ LEA R9, R12, -R9, 0x17 ; /* 0x800000090c097211 */
/* 0x004fc600078eb8ff */
/*0480*/ FMUL R10, R11, R10 ; /* 0x0000000a0b0a7220 */
/* 0x000fe20000400000 */
/*0490*/ SHF.R.S32.HI R11, RZ, 0x1f, R0 ; /* 0x0000001fff0b7819 */
/* 0x000fc60000011400 */
/*04a0*/ FMUL R9, R10, R9 ; /* 0x000000090a097220 */
/* 0x000fe20000400000 */
/*04b0*/ @P1 FSEL R9, RZ, +INF , !P2 ; /* 0x7f800000ff091808 */
/* 0x000fe20005000000 */
/*04c0*/ FADD R6, R5, R5 ; /* 0x0000000505067221 */
/* 0x001fe20000000000 */
/*04d0*/ @P0 BRA 0x680 ; /* 0x000001a000000947 */
/* 0x000fea0003800000 */
/*04e0*/ FSETP.GTU.AND P0, PT, |R7|, +INF , PT ; /* 0x7f8000000700780b */
/* 0x000fc80003f0c200 */
/*04f0*/ FSETP.GTU.OR P0, PT, |R4|, +INF , P0 ; /* 0x7f8000000400780b */
/* 0x000fda000070c600 */
/*0500*/ @P0 BRA 0x670 ; /* 0x0000016000000947 */
/* 0x000fea0003800000 */
/*0510*/ FSETP.NEU.AND P0, PT, |R4|, +INF , PT ; /* 0x7f8000000400780b */
/* 0x000fe20003f0d200 */
/*0520*/ FADD R6, R7, -R6 ; /* 0x8000000607067221 */
/* 0x000fc60000000000 */
/*0530*/ ISETP.EQ.OR P0, PT, R3, RZ, !P0 ; /* 0x000000ff0300720c */
/* 0x000fc80004702670 */
/*0540*/ ISETP.GE.OR P1, PT, R2, -0x1, !P0 ; /* 0xffffffff0200780c */
/* 0x000fe40004726670 */
/*0550*/ FSETP.NEU.AND P2, PT, |R6|, 1, P0 ; /* 0x3f8000000600780b */
/* 0x000fce000074d200 */
/*0560*/ @P0 FADD R4, R4, R4 ; /* 0x0000000404040221 */
/* 0x000fca0000000000 */
/*0570*/ @!P1 LOP3.LUT R4, R4, 0x7f800000, RZ, 0x3c, !PT ; /* 0x7f80000004049812 */
/* 0x000fc800078e3cff */
/*0580*/ @P2 LOP3.LUT R4, R4, 0x7fffffff, RZ, 0xc0, !PT ; /* 0x7fffffff04042812 */
/* 0x000fc800078ec0ff */
/*0590*/ @P0 MOV R8, R4 ; /* 0x0000000400080202 */
/* 0x000fe20000000f00 */
/*05a0*/ @P0 BRA 0x680 ; /* 0x000000d000000947 */
/* 0x000fea0003800000 */
/*05b0*/ FSETP.NEU.AND P0, PT, |R7|, +INF , PT ; /* 0x7f8000000700780b */
/* 0x000fe40003f0d200 */
/*05c0*/ ISETP.EQ.AND P1, PT, R3, -0x1, PT ; /* 0xffffffff0300780c */
/* 0x000fda0003f22270 */
/*05d0*/ @!P0 BRA P1, 0x680 ; /* 0x000000a000008947 */
/* 0x000fea0000800000 */
/*05e0*/ ISETP.GT.AND P0, PT, R3, -0x1, PT ; /* 0xffffffff0300780c */
/* 0x000fe40003f04270 */
/*05f0*/ MOV R8, R9 ; /* 0x0000000900087202 */
/* 0x000fd60000000f00 */
/*0600*/ @P0 BRA 0x680 ; /* 0x0000007000000947 */
/* 0x000fea0003800000 */
/*0610*/ FRND.FLOOR R2, R7 ; /* 0x0000000700027307 */
/* 0x000e220000205000 */
/*0620*/ FSETP.NEU.AND P1, PT, |R6|, 1, PT ; /* 0x3f8000000600780b */
/* 0x000fc80003f2d200 */
/*0630*/ FSEL R8, -R9, R9, !P1 ; /* 0x0000000909087208 */
/* 0x000fe40004800100 */
/*0640*/ FSETP.NEU.AND P0, PT, R2, R7, PT ; /* 0x000000070200720b */
/* 0x001fc80003f0d000 */
/*0650*/ FSEL R8, R8, +QNAN , !P0 ; /* 0x7fffffff08087808 */
/* 0x000fe20004000000 */
/*0660*/ BRA 0x680 ; /* 0x0000001000007947 */
/* 0x000fea0003800000 */
/*0670*/ FADD R8, R4, R7 ; /* 0x0000000704087221 */
/* 0x000fe40000000000 */
/*0680*/ BSYNC B0 ; /* 0x0000000000007941 */
/* 0x000fea0003800000 */
/*0690*/ F2I.TRUNC.NTZ R5, R8 ; /* 0x0000000800057305 */
/* 0x000e22000020f100 */
/*06a0*/ LEA R2, P0, R0, c[0x0][0x168], 0x2 ; /* 0x00005a0000027a11 */
/* 0x000fc800078010ff */
/*06b0*/ LEA.HI.X R3, R0, c[0x0][0x16c], R11, 0x2, P0 ; /* 0x00005b0000037a11 */
/* 0x000fca00000f140b */
/*06c0*/ STG.E [R2.64], R5 ; /* 0x0000000502007986 */
/* 0x001fe2000c101904 */
/*06d0*/ EXIT ; /* 0x000000000000794d */
/* 0x000fea0003800000 */
/*06e0*/ BRA 0x6e0; /* 0xfffffff000007947 */
/* 0x000fc0000383ffff */
/*06f0*/ NOP; /* 0x0000000000007918 */
/* 0x000fc00000000000 */
/*0700*/ NOP; /* 0x0000000000007918 */
/* 0x000fc00000000000 */
/*0710*/ NOP; /* 0x0000000000007918 */
/* 0x000fc00000000000 */
/*0720*/ NOP; /* 0x0000000000007918 */
/* 0x000fc00000000000 */
/*0730*/ NOP; /* 0x0000000000007918 */
/* 0x000fc00000000000 */
/*0740*/ NOP; /* 0x0000000000007918 */
/* 0x000fc00000000000 */
/*0750*/ NOP; /* 0x0000000000007918 */
/* 0x000fc00000000000 */
/*0760*/ NOP; /* 0x0000000000007918 */
/* 0x000fc00000000000 */
/*0770*/ NOP; /* 0x0000000000007918 */
/* 0x000fc00000000000 */
.......... | .text
.amdgcn_target "amdgcn-amd-amdhsa--gfx1100"
.protected _Z10replaceMatPiS_
.globl _Z10replaceMatPiS_
.p2align 8
.type _Z10replaceMatPiS_,@function
_Z10replaceMatPiS_:
s_clause 0x1
s_load_b32 s4, s[0:1], 0x1c
s_load_b128 s[0:3], s[0:1], 0x0
s_waitcnt lgkmcnt(0)
s_and_b32 s4, s4, 0xffff
s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
v_mad_u64_u32 v[1:2], null, s15, s4, v[0:1]
s_add_i32 s15, s15, 1
v_ashrrev_i32_e32 v2, 31, v1
s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
v_lshlrev_b64 v[0:1], 2, v[1:2]
v_add_co_u32 v2, vcc_lo, s0, v0
s_delay_alu instid0(VALU_DEP_2)
v_add_co_ci_u32_e32 v3, vcc_lo, s1, v1, vcc_lo
s_mov_b32 s0, 0x3e76c4e1
global_load_b32 v2, v[2:3], off
v_cvt_f32_i32_e32 v3, s15
s_waitcnt vmcnt(0)
v_cmp_ne_u32_e32 vcc_lo, 1, v2
v_cvt_f32_i32_e32 v2, v2
s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_1)
v_cndmask_b32_e32 v3, 1.0, v3, vcc_lo
v_cmp_neq_f32_e32 vcc_lo, 0, v3
s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_1)
v_cndmask_b32_e32 v2, 1.0, v2, vcc_lo
v_frexp_mant_f32_e64 v4, |v2|
s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
v_cmp_gt_f32_e32 vcc_lo, 0x3f2aaaab, v4
v_cndmask_b32_e64 v5, 0, 1, vcc_lo
v_ldexp_f32 v4, v4, v5
s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
v_add_f32_e32 v7, -1.0, v4
v_add_f32_e32 v5, 1.0, v4
v_rcp_f32_e32 v6, v5
s_waitcnt_depctr 0xfff
v_dual_mul_f32 v8, v7, v6 :: v_dual_add_f32 v9, -1.0, v5
s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_2)
v_mul_f32_e32 v10, v5, v8
v_sub_f32_e32 v4, v4, v9
s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
v_fma_f32 v5, v8, v5, -v10
v_fmac_f32_e32 v5, v8, v4
s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
v_add_f32_e32 v4, v10, v5
v_dual_sub_f32 v9, v7, v4 :: v_dual_sub_f32 v10, v4, v10
s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_2)
v_sub_f32_e32 v5, v10, v5
v_sub_f32_e32 v7, v7, v9
s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
v_sub_f32_e32 v4, v7, v4
v_add_f32_e32 v4, v5, v4
s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
v_add_f32_e32 v4, v9, v4
v_mul_f32_e32 v4, v6, v4
s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
v_add_f32_e32 v5, v8, v4
v_mul_f32_e32 v7, v5, v5
v_sub_f32_e32 v6, v5, v8
s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_3)
v_sub_f32_e32 v4, v4, v6
v_fma_f32 v6, v5, v5, -v7
s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
v_add_f32_e32 v8, v4, v4
v_fmac_f32_e32 v6, v5, v8
s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
v_add_f32_e32 v8, v7, v6
v_fmaak_f32 v9, s0, v8, 0x3e91f4c4
v_sub_f32_e32 v7, v8, v7
s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
v_dual_fmaak_f32 v9, v8, v9, 0x3ecccdef :: v_dual_sub_f32 v6, v6, v7
v_mul_f32_e32 v10, v8, v9
s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
v_fma_f32 v7, v8, v9, -v10
v_dual_fmac_f32 v7, v6, v9 :: v_dual_mul_f32 v12, v5, v8
s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_2)
v_add_f32_e32 v9, v10, v7
v_fma_f32 v13, v8, v5, -v12
s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_2) | instid1(VALU_DEP_3)
v_dual_sub_f32 v10, v9, v10 :: v_dual_fmac_f32 v13, v8, v4
v_add_f32_e32 v11, 0x3f2aaaaa, v9
v_ldexp_f32 v4, v4, 1
v_sub_f32_e32 v7, v7, v10
s_delay_alu instid0(VALU_DEP_4) | instskip(SKIP_1) | instid1(VALU_DEP_3)
v_fmac_f32_e32 v13, v6, v5
v_ldexp_f32 v5, v5, 1
v_add_f32_e32 v7, 0x31739010, v7
v_add_f32_e32 v10, 0xbf2aaaaa, v11
s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
v_sub_f32_e32 v9, v9, v10
v_add_f32_e32 v7, v7, v9
s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
v_add_f32_e32 v6, v11, v7
v_dual_add_f32 v8, v12, v13 :: v_dual_sub_f32 v9, v11, v6
s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_3)
v_mul_f32_e32 v10, v8, v6
v_sub_f32_e32 v11, v8, v12
v_add_f32_e32 v7, v7, v9
s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3)
v_fma_f32 v9, v8, v6, -v10
v_sub_f32_e32 v11, v13, v11
s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_2)
v_fmac_f32_e32 v9, v8, v7
v_frexp_exp_i32_f32_e32 v7, v2
v_fmac_f32_e32 v9, v11, v6
s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
v_subrev_co_ci_u32_e32 v6, vcc_lo, 0, v7, vcc_lo
v_add_f32_e32 v7, v10, v9
s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
v_cvt_f32_i32_e32 v6, v6
v_sub_f32_e32 v10, v7, v10
v_add_f32_e32 v8, v5, v7
s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
v_sub_f32_e32 v9, v9, v10
v_dual_mul_f32 v11, 0x3f317218, v6 :: v_dual_add_f32 v4, v4, v9
s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
v_fma_f32 v10, v6, 0x3f317218, -v11
v_dual_fmamk_f32 v6, v6, 0xb102e308, v10 :: v_dual_sub_f32 v5, v8, v5
s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
v_sub_f32_e32 v5, v7, v5
v_dual_add_f32 v4, v4, v5 :: v_dual_add_f32 v5, v11, v6
s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_2)
v_add_f32_e32 v7, v8, v4
v_sub_f32_e32 v11, v5, v11
s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_3)
v_sub_f32_e32 v6, v6, v11
v_add_f32_e32 v9, v5, v7
s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_2)
v_sub_f32_e32 v10, v9, v5
v_sub_f32_e32 v8, v7, v8
v_sub_f32_e32 v12, v9, v10
s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
v_dual_sub_f32 v4, v4, v8 :: v_dual_sub_f32 v7, v7, v10
v_sub_f32_e32 v5, v5, v12
s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
v_dual_add_f32 v8, v6, v4 :: v_dual_add_f32 v5, v7, v5
v_sub_f32_e32 v7, v8, v6
s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
v_add_f32_e32 v5, v8, v5
v_sub_f32_e32 v8, v8, v7
v_sub_f32_e32 v4, v4, v7
s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_4)
v_sub_f32_e32 v6, v6, v8
v_add_f32_e32 v10, v9, v5
s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
v_dual_add_f32 v4, v4, v6 :: v_dual_sub_f32 v7, v10, v9
v_sub_f32_e32 v5, v5, v7
s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
v_add_f32_e32 v4, v4, v5
v_add_f32_e32 v5, v10, v4
s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
v_dual_sub_f32 v6, v5, v10 :: v_dual_mul_f32 v7, v3, v5
v_sub_f32_e32 v4, v4, v6
s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_2)
v_fma_f32 v5, v3, v5, -v7
v_cmp_class_f32_e64 vcc_lo, v7, 0x204
v_fmac_f32_e32 v5, v3, v4
s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
v_add_f32_e32 v4, v7, v5
v_cndmask_b32_e32 v6, v4, v7, vcc_lo
s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_2) | instid1(VALU_DEP_2)
v_cmp_eq_f32_e32 vcc_lo, 0x42b17218, v6
v_cndmask_b32_e64 v8, 0, 0x37000000, vcc_lo
v_cmp_neq_f32_e64 vcc_lo, 0x7f800000, |v6|
v_sub_f32_e32 v9, v6, v8
v_trunc_f32_e32 v6, v3
s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
v_mul_f32_e32 v10, 0x3fb8aa3b, v9
v_fma_f32 v11, v9, 0x3fb8aa3b, -v10
v_rndne_f32_e32 v12, v10
s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
v_dual_fmamk_f32 v11, v9, 0x32a5705f, v11 :: v_dual_sub_f32 v10, v10, v12
v_add_f32_e32 v10, v10, v11
v_sub_f32_e32 v4, v4, v7
v_cvt_i32_f32_e32 v7, v12
s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_2)
v_exp_f32_e32 v10, v10
v_sub_f32_e32 v4, v5, v4
s_waitcnt_depctr 0xfff
v_ldexp_f32 v5, v10, v7
v_dual_mul_f32 v7, 0.5, v3 :: v_dual_cndmask_b32 v4, 0, v4
v_cmp_ngt_f32_e32 vcc_lo, 0xc2ce8ed0, v9
s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_3)
v_trunc_f32_e32 v10, v7
v_dual_add_f32 v4, v8, v4 :: v_dual_cndmask_b32 v5, 0, v5
v_cmp_nlt_f32_e32 vcc_lo, 0x42b17218, v9
s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3)
v_cmp_neq_f32_e64 s0, v10, v7
v_cndmask_b32_e32 v5, 0x7f800000, v5, vcc_lo
v_cmp_eq_f32_e32 vcc_lo, v6, v3
s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_2) | instid1(SALU_CYCLE_1)
v_fma_f32 v4, v5, v4, v5
v_cmp_eq_f32_e64 s1, 0x7f800000, v5
s_and_b32 s0, vcc_lo, s0
v_cndmask_b32_e64 v6, 1.0, v2, s0
s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_2)
v_cndmask_b32_e64 v4, v4, v5, s1
v_cmp_gt_f32_e64 s1, 0, v2
v_bfi_b32 v4, 0x7fffffff, v4, v6
s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_2)
v_cndmask_b32_e32 v5, 0x7fc00000, v4, vcc_lo
v_cmp_gt_f32_e32 vcc_lo, 0, v3
v_cndmask_b32_e64 v3, v4, v5, s1
v_cmp_eq_f32_e64 s1, 0, v2
v_cndmask_b32_e64 v2, 0, v2, s0
s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_3) | instid1(VALU_DEP_2)
s_xor_b32 s0, vcc_lo, s1
v_add_co_u32 v0, vcc_lo, s2, v0
v_cndmask_b32_e64 v4, 0x7f800000, 0, s0
v_add_co_ci_u32_e32 v1, vcc_lo, s3, v1, vcc_lo
v_bfi_b32 v2, 0x7fffffff, v4, v2
s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
v_cndmask_b32_e64 v2, v3, v2, s1
v_cvt_i32_f32_e32 v2, v2
global_store_b32 v[0:1], v2, off
s_nop 0
s_sendmsg sendmsg(MSG_DEALLOC_VGPRS)
s_endpgm
.section .rodata,"a",@progbits
.p2align 6, 0x0
.amdhsa_kernel _Z10replaceMatPiS_
.amdhsa_group_segment_fixed_size 0
.amdhsa_private_segment_fixed_size 0
.amdhsa_kernarg_size 272
.amdhsa_user_sgpr_count 15
.amdhsa_user_sgpr_dispatch_ptr 0
.amdhsa_user_sgpr_queue_ptr 0
.amdhsa_user_sgpr_kernarg_segment_ptr 1
.amdhsa_user_sgpr_dispatch_id 0
.amdhsa_user_sgpr_private_segment_size 0
.amdhsa_wavefront_size32 1
.amdhsa_uses_dynamic_stack 0
.amdhsa_enable_private_segment 0
.amdhsa_system_sgpr_workgroup_id_x 1
.amdhsa_system_sgpr_workgroup_id_y 0
.amdhsa_system_sgpr_workgroup_id_z 0
.amdhsa_system_sgpr_workgroup_info 0
.amdhsa_system_vgpr_workitem_id 0
.amdhsa_next_free_vgpr 14
.amdhsa_next_free_sgpr 16
.amdhsa_float_round_mode_32 0
.amdhsa_float_round_mode_16_64 0
.amdhsa_float_denorm_mode_32 3
.amdhsa_float_denorm_mode_16_64 3
.amdhsa_dx10_clamp 1
.amdhsa_ieee_mode 1
.amdhsa_fp16_overflow 0
.amdhsa_workgroup_processor_mode 1
.amdhsa_memory_ordered 1
.amdhsa_forward_progress 0
.amdhsa_shared_vgpr_count 0
.amdhsa_exception_fp_ieee_invalid_op 0
.amdhsa_exception_fp_denorm_src 0
.amdhsa_exception_fp_ieee_div_zero 0
.amdhsa_exception_fp_ieee_overflow 0
.amdhsa_exception_fp_ieee_underflow 0
.amdhsa_exception_fp_ieee_inexact 0
.amdhsa_exception_int_div_zero 0
.end_amdhsa_kernel
.text
.Lfunc_end0:
.size _Z10replaceMatPiS_, .Lfunc_end0-_Z10replaceMatPiS_
.section .AMDGPU.csdata,"",@progbits
.text
.p2alignl 7, 3214868480
.fill 96, 4, 3214868480
.type __hip_cuid_,@object
.section .bss,"aw",@nobits
.globl __hip_cuid_
__hip_cuid_:
.byte 0
.size __hip_cuid_, 1
.ident "AMD clang version 18.0.0git (https://github.com/RadeonOpenCompute/llvm-project roc-6.3.2 25012 e5bf7e55c91490b07c49d8960fa7983d864936c4)"
.section ".note.GNU-stack","",@progbits
.addrsig
.addrsig_sym __hip_cuid_
.amdgpu_metadata
---
amdhsa.kernels:
- .args:
- .address_space: global
.offset: 0
.size: 8
.value_kind: global_buffer
- .address_space: global
.offset: 8
.size: 8
.value_kind: global_buffer
- .offset: 16
.size: 4
.value_kind: hidden_block_count_x
- .offset: 20
.size: 4
.value_kind: hidden_block_count_y
- .offset: 24
.size: 4
.value_kind: hidden_block_count_z
- .offset: 28
.size: 2
.value_kind: hidden_group_size_x
- .offset: 30
.size: 2
.value_kind: hidden_group_size_y
- .offset: 32
.size: 2
.value_kind: hidden_group_size_z
- .offset: 34
.size: 2
.value_kind: hidden_remainder_x
- .offset: 36
.size: 2
.value_kind: hidden_remainder_y
- .offset: 38
.size: 2
.value_kind: hidden_remainder_z
- .offset: 56
.size: 8
.value_kind: hidden_global_offset_x
- .offset: 64
.size: 8
.value_kind: hidden_global_offset_y
- .offset: 72
.size: 8
.value_kind: hidden_global_offset_z
- .offset: 80
.size: 2
.value_kind: hidden_grid_dims
.group_segment_fixed_size: 0
.kernarg_segment_align: 8
.kernarg_segment_size: 272
.language: OpenCL C
.language_version:
- 2
- 0
.max_flat_workgroup_size: 1024
.name: _Z10replaceMatPiS_
.private_segment_fixed_size: 0
.sgpr_count: 18
.sgpr_spill_count: 0
.symbol: _Z10replaceMatPiS_.kd
.uniform_work_group_size: 1
.uses_dynamic_stack: false
.vgpr_count: 14
.vgpr_spill_count: 0
.wavefront_size: 32
.workgroup_processor_mode: 1
amdhsa.target: amdgcn-amd-amdhsa--gfx1100
amdhsa.version:
- 1
- 2
...
.end_amdgpu_metadata |
You are a helpful coding assistant specialized in converting from CUDA host assembly to AMD host assembly. | .file "tmpxft_000a4aef_00000000-6_q1.cudafe1.cpp"
.text
#APP
#NO_APP
.type _ZL26__cudaUnregisterBinaryUtilv, @function
_ZL26__cudaUnregisterBinaryUtilv:
.LFB2060:
.cfi_startproc
endbr64
subq $8, %rsp
.cfi_def_cfa_offset 16
movq _ZL20__cudaFatCubinHandle(%rip), %rdi
call __cudaUnregisterFatBinary@PLT
addq $8, %rsp
.cfi_def_cfa_offset 8
ret
.cfi_endproc
.LFE2060:
.size _ZL26__cudaUnregisterBinaryUtilv, .-_ZL26__cudaUnregisterBinaryUtilv
.globl _Z32__device_stub__Z10replaceMatPiS_PiS_
.type _Z32__device_stub__Z10replaceMatPiS_PiS_, @function
_Z32__device_stub__Z10replaceMatPiS_PiS_:
.LFB2082:
.cfi_startproc
endbr64
subq $120, %rsp
.cfi_def_cfa_offset 128
movq %rdi, 8(%rsp)
movq %rsi, (%rsp)
movq %fs:40, %rax
movq %rax, 104(%rsp)
xorl %eax, %eax
leaq 8(%rsp), %rax
movq %rax, 80(%rsp)
movq %rsp, %rax
movq %rax, 88(%rsp)
movl $1, 32(%rsp)
movl $1, 36(%rsp)
movl $1, 40(%rsp)
movl $1, 44(%rsp)
movl $1, 48(%rsp)
movl $1, 52(%rsp)
leaq 24(%rsp), %rcx
leaq 16(%rsp), %rdx
leaq 44(%rsp), %rsi
leaq 32(%rsp), %rdi
call __cudaPopCallConfiguration@PLT
testl %eax, %eax
je .L7
.L3:
movq 104(%rsp), %rax
subq %fs:40, %rax
jne .L8
addq $120, %rsp
.cfi_remember_state
.cfi_def_cfa_offset 8
ret
.L7:
.cfi_restore_state
pushq 24(%rsp)
.cfi_def_cfa_offset 136
pushq 24(%rsp)
.cfi_def_cfa_offset 144
leaq 96(%rsp), %r9
movq 60(%rsp), %rcx
movl 68(%rsp), %r8d
movq 48(%rsp), %rsi
movl 56(%rsp), %edx
leaq _Z10replaceMatPiS_(%rip), %rdi
call cudaLaunchKernel@PLT
addq $16, %rsp
.cfi_def_cfa_offset 128
jmp .L3
.L8:
call __stack_chk_fail@PLT
.cfi_endproc
.LFE2082:
.size _Z32__device_stub__Z10replaceMatPiS_PiS_, .-_Z32__device_stub__Z10replaceMatPiS_PiS_
.globl _Z10replaceMatPiS_
.type _Z10replaceMatPiS_, @function
_Z10replaceMatPiS_:
.LFB2083:
.cfi_startproc
endbr64
subq $8, %rsp
.cfi_def_cfa_offset 16
call _Z32__device_stub__Z10replaceMatPiS_PiS_
addq $8, %rsp
.cfi_def_cfa_offset 8
ret
.cfi_endproc
.LFE2083:
.size _Z10replaceMatPiS_, .-_Z10replaceMatPiS_
.section .rodata.str1.1,"aMS",@progbits,1
.LC0:
.string "Enter m: "
.LC1:
.string "%d"
.LC2:
.string "Enter n: "
.LC3:
.string "Enter the matrix:\n"
.LC4:
.string "Result:\n"
.LC5:
.string "%d "
.LC6:
.string "\n"
.text
.globl main
.type main, @function
main:
.LFB2057:
.cfi_startproc
endbr64
pushq %r15
.cfi_def_cfa_offset 16
.cfi_offset 15, -16
pushq %r14
.cfi_def_cfa_offset 24
.cfi_offset 14, -24
pushq %r13
.cfi_def_cfa_offset 32
.cfi_offset 13, -32
pushq %r12
.cfi_def_cfa_offset 40
.cfi_offset 12, -40
pushq %rbp
.cfi_def_cfa_offset 48
.cfi_offset 6, -48
pushq %rbx
.cfi_def_cfa_offset 56
.cfi_offset 3, -56
subq $72, %rsp
.cfi_def_cfa_offset 128
movq %fs:40, %rax
movq %rax, 56(%rsp)
xorl %eax, %eax
leaq .LC0(%rip), %rsi
movl $2, %edi
call __printf_chk@PLT
leaq 8(%rsp), %rsi
leaq .LC1(%rip), %rbx
movq %rbx, %rdi
movl $0, %eax
call __isoc23_scanf@PLT
leaq .LC2(%rip), %rsi
movl $2, %edi
movl $0, %eax
call __printf_chk@PLT
leaq 12(%rsp), %rsi
movq %rbx, %rdi
movl $0, %eax
call __isoc23_scanf@PLT
movl 12(%rsp), %r13d
imull 8(%rsp), %r13d
sall $2, %r13d
movslq %r13d, %r13
movq %r13, %rdi
call malloc@PLT
movq %rax, %r15
movq %r13, %rdi
call malloc@PLT
movq %rax, %r12
leaq .LC3(%rip), %rsi
movl $2, %edi
movl $0, %eax
call __printf_chk@PLT
movl 8(%rsp), %eax
imull 12(%rsp), %eax
testl %eax, %eax
jle .L12
movq %r15, %rbp
movl $0, %ebx
leaq .LC1(%rip), %r14
.L13:
movq %rbp, %rsi
movq %r14, %rdi
movl $0, %eax
call __isoc23_scanf@PLT
addl $1, %ebx
addq $4, %rbp
movl 8(%rsp), %eax
imull 12(%rsp), %eax
cmpl %ebx, %eax
jg .L13
.L12:
leaq 16(%rsp), %rdi
movq %r13, %rsi
call cudaMalloc@PLT
leaq 24(%rsp), %rdi
movq %r13, %rsi
call cudaMalloc@PLT
movl $1, %ecx
movq %r13, %rdx
movq %r15, %rsi
movq 16(%rsp), %rdi
call cudaMemcpy@PLT
movl 12(%rsp), %eax
movl %eax, 44(%rsp)
movl $1, 48(%rsp)
movl 8(%rsp), %eax
movl %eax, 32(%rsp)
movl $1, 36(%rsp)
movl $0, %r9d
movl $0, %r8d
movq 44(%rsp), %rdx
movl $1, %ecx
movq 32(%rsp), %rdi
movl $1, %esi
call __cudaPushCallConfiguration@PLT
testl %eax, %eax
je .L27
.L14:
movl $2, %ecx
movq %r13, %rdx
movq 24(%rsp), %rsi
movq %r12, %rdi
call cudaMemcpy@PLT
leaq .LC4(%rip), %rsi
movl $2, %edi
movl $0, %eax
call __printf_chk@PLT
movl $0, %ebp
leaq .LC5(%rip), %r13
leaq .LC6(%rip), %r14
cmpl $0, 8(%rsp)
jg .L15
.L16:
movq 16(%rsp), %rdi
call cudaFree@PLT
movq 24(%rsp), %rdi
call cudaFree@PLT
movq 56(%rsp), %rax
subq %fs:40, %rax
jne .L28
movl $0, %eax
addq $72, %rsp
.cfi_remember_state
.cfi_def_cfa_offset 56
popq %rbx
.cfi_def_cfa_offset 48
popq %rbp
.cfi_def_cfa_offset 40
popq %r12
.cfi_def_cfa_offset 32
popq %r13
.cfi_def_cfa_offset 24
popq %r14
.cfi_def_cfa_offset 16
popq %r15
.cfi_def_cfa_offset 8
ret
.L27:
.cfi_restore_state
movq 24(%rsp), %rsi
movq 16(%rsp), %rdi
call _Z32__device_stub__Z10replaceMatPiS_PiS_
jmp .L14
.L17:
imull %ebp, %eax
addl %ebx, %eax
cltq
movl (%r12,%rax,4), %edx
movq %r13, %rsi
movl $2, %edi
movl $0, %eax
call __printf_chk@PLT
addl $1, %ebx
movl 12(%rsp), %eax
cmpl %ebx, %eax
jg .L17
.L18:
movq %r14, %rsi
movl $2, %edi
movl $0, %eax
call __printf_chk@PLT
addl $1, %ebp
cmpl %ebp, 8(%rsp)
jle .L16
.L15:
movl 12(%rsp), %eax
movl $0, %ebx
testl %eax, %eax
jg .L17
jmp .L18
.L28:
call __stack_chk_fail@PLT
.cfi_endproc
.LFE2057:
.size main, .-main
.section .rodata.str1.1
.LC7:
.string "_Z10replaceMatPiS_"
.text
.type _ZL24__sti____cudaRegisterAllv, @function
_ZL24__sti____cudaRegisterAllv:
.LFB2085:
.cfi_startproc
endbr64
subq $8, %rsp
.cfi_def_cfa_offset 16
leaq _ZL15__fatDeviceText(%rip), %rdi
call __cudaRegisterFatBinary@PLT
movq %rax, %rdi
movq %rax, _ZL20__cudaFatCubinHandle(%rip)
pushq $0
.cfi_def_cfa_offset 24
pushq $0
.cfi_def_cfa_offset 32
pushq $0
.cfi_def_cfa_offset 40
pushq $0
.cfi_def_cfa_offset 48
movl $0, %r9d
movl $-1, %r8d
leaq .LC7(%rip), %rdx
movq %rdx, %rcx
leaq _Z10replaceMatPiS_(%rip), %rsi
call __cudaRegisterFunction@PLT
addq $32, %rsp
.cfi_def_cfa_offset 16
movq _ZL20__cudaFatCubinHandle(%rip), %rdi
call __cudaRegisterFatBinaryEnd@PLT
leaq _ZL26__cudaUnregisterBinaryUtilv(%rip), %rdi
call atexit@PLT
addq $8, %rsp
.cfi_def_cfa_offset 8
ret
.cfi_endproc
.LFE2085:
.size _ZL24__sti____cudaRegisterAllv, .-_ZL24__sti____cudaRegisterAllv
.section .init_array,"aw"
.align 8
.quad _ZL24__sti____cudaRegisterAllv
.section .nvFatBinSegment,"aw"
.align 8
.type _ZL15__fatDeviceText, @object
.size _ZL15__fatDeviceText, 24
_ZL15__fatDeviceText:
.long 1180844977
.long 1
.quad fatbinData
.quad 0
.local _ZL20__cudaFatCubinHandle
.comm _ZL20__cudaFatCubinHandle,8,8
.ident "GCC: (Ubuntu 13.3.0-6ubuntu2~24.04) 13.3.0"
.section .note.GNU-stack,"",@progbits
.section .note.gnu.property,"a"
.align 8
.long 1f - 0f
.long 4f - 1f
.long 5
0:
.string "GNU"
1:
.align 8
.long 0xc0000002
.long 3f - 2f
2:
.long 0x3
3:
.align 8
4: | .text
.file "q1.hip"
.globl _Z25__device_stub__replaceMatPiS_ # -- Begin function _Z25__device_stub__replaceMatPiS_
.p2align 4, 0x90
.type _Z25__device_stub__replaceMatPiS_,@function
_Z25__device_stub__replaceMatPiS_: # @_Z25__device_stub__replaceMatPiS_
.cfi_startproc
# %bb.0:
subq $88, %rsp
.cfi_def_cfa_offset 96
movq %rdi, 56(%rsp)
movq %rsi, 48(%rsp)
leaq 56(%rsp), %rax
movq %rax, 64(%rsp)
leaq 48(%rsp), %rax
movq %rax, 72(%rsp)
leaq 32(%rsp), %rdi
leaq 16(%rsp), %rsi
leaq 8(%rsp), %rdx
movq %rsp, %rcx
callq __hipPopCallConfiguration
movq 32(%rsp), %rsi
movl 40(%rsp), %edx
movq 16(%rsp), %rcx
movl 24(%rsp), %r8d
leaq 64(%rsp), %r9
movl $_Z10replaceMatPiS_, %edi
pushq (%rsp)
.cfi_adjust_cfa_offset 8
pushq 16(%rsp)
.cfi_adjust_cfa_offset 8
callq hipLaunchKernel
addq $104, %rsp
.cfi_adjust_cfa_offset -104
retq
.Lfunc_end0:
.size _Z25__device_stub__replaceMatPiS_, .Lfunc_end0-_Z25__device_stub__replaceMatPiS_
.cfi_endproc
# -- End function
.globl main # -- Begin function main
.p2align 4, 0x90
.type main,@function
main: # @main
.cfi_startproc
# %bb.0:
pushq %rbp
.cfi_def_cfa_offset 16
pushq %r15
.cfi_def_cfa_offset 24
pushq %r14
.cfi_def_cfa_offset 32
pushq %r13
.cfi_def_cfa_offset 40
pushq %r12
.cfi_def_cfa_offset 48
pushq %rbx
.cfi_def_cfa_offset 56
subq $120, %rsp
.cfi_def_cfa_offset 176
.cfi_offset %rbx, -56
.cfi_offset %r12, -48
.cfi_offset %r13, -40
.cfi_offset %r14, -32
.cfi_offset %r15, -24
.cfi_offset %rbp, -16
movl $.L.str, %edi
xorl %eax, %eax
callq printf
leaq 12(%rsp), %rsi
movl $.L.str.1, %edi
xorl %eax, %eax
callq __isoc23_scanf
movl $.L.str.2, %edi
xorl %eax, %eax
callq printf
leaq 8(%rsp), %rsi
movl $.L.str.1, %edi
xorl %eax, %eax
callq __isoc23_scanf
movl 12(%rsp), %eax
imull 8(%rsp), %eax
shll $2, %eax
movslq %eax, %r14
movq %r14, %rdi
callq malloc
movq %rax, %r15
movq %r14, %rdi
callq malloc
movq %rax, %rbx
movl $.Lstr, %edi
callq puts@PLT
movl 8(%rsp), %eax
imull 12(%rsp), %eax
testl %eax, %eax
jle .LBB1_3
# %bb.1: # %.lr.ph.preheader
movq %r15, %r12
xorl %r13d, %r13d
.p2align 4, 0x90
.LBB1_2: # %.lr.ph
# =>This Inner Loop Header: Depth=1
movl $.L.str.1, %edi
movq %r12, %rsi
xorl %eax, %eax
callq __isoc23_scanf
incq %r13
movslq 12(%rsp), %rax
movslq 8(%rsp), %rcx
imulq %rax, %rcx
addq $4, %r12
cmpq %rcx, %r13
jl .LBB1_2
.LBB1_3: # %._crit_edge
leaq 24(%rsp), %rdi
movq %r14, %rsi
callq hipMalloc
leaq 16(%rsp), %rdi
movq %r14, %rsi
callq hipMalloc
movq 24(%rsp), %rdi
movq %r15, %rsi
movq %r14, %rdx
movl $1, %ecx
callq hipMemcpy
movl 12(%rsp), %edi
movl 8(%rsp), %edx
movabsq $4294967296, %rax # imm = 0x100000000
orq %rax, %rdi
orq %rax, %rdx
movl $1, %esi
movl $1, %ecx
xorl %r8d, %r8d
xorl %r9d, %r9d
callq __hipPushCallConfiguration
testl %eax, %eax
jne .LBB1_5
# %bb.4:
movq 24(%rsp), %rax
movq 16(%rsp), %rcx
movq %rax, 88(%rsp)
movq %rcx, 80(%rsp)
leaq 88(%rsp), %rax
movq %rax, 96(%rsp)
leaq 80(%rsp), %rax
movq %rax, 104(%rsp)
leaq 64(%rsp), %rdi
leaq 48(%rsp), %rsi
leaq 40(%rsp), %rdx
leaq 32(%rsp), %rcx
callq __hipPopCallConfiguration
movq 64(%rsp), %rsi
movl 72(%rsp), %edx
movq 48(%rsp), %rcx
movl 56(%rsp), %r8d
leaq 96(%rsp), %r9
movl $_Z10replaceMatPiS_, %edi
pushq 32(%rsp)
.cfi_adjust_cfa_offset 8
pushq 48(%rsp)
.cfi_adjust_cfa_offset 8
callq hipLaunchKernel
addq $16, %rsp
.cfi_adjust_cfa_offset -16
.LBB1_5:
movq 16(%rsp), %rsi
movq %rbx, %rdi
movq %r14, %rdx
movl $2, %ecx
callq hipMemcpy
movl $.Lstr.1, %edi
callq puts@PLT
cmpl $0, 12(%rsp)
jle .LBB1_11
# %bb.6: # %.preheader.preheader
xorl %ebp, %ebp
jmp .LBB1_7
.p2align 4, 0x90
.LBB1_10: # %._crit_edge29
# in Loop: Header=BB1_7 Depth=1
movl $10, %edi
callq putchar@PLT
incl %ebp
cmpl 12(%rsp), %ebp
jge .LBB1_11
.LBB1_7: # %.preheader
# =>This Loop Header: Depth=1
# Child Loop BB1_9 Depth 2
movl 8(%rsp), %eax
testl %eax, %eax
jle .LBB1_10
# %bb.8: # %.lr.ph28.preheader
# in Loop: Header=BB1_7 Depth=1
xorl %r14d, %r14d
.p2align 4, 0x90
.LBB1_9: # %.lr.ph28
# Parent Loop BB1_7 Depth=1
# => This Inner Loop Header: Depth=2
imull %ebp, %eax
cltq
addq %r14, %rax
movl (%rbx,%rax,4), %esi
movl $.L.str.5, %edi
xorl %eax, %eax
callq printf
movl 8(%rsp), %eax
incq %r14
cmpl %eax, %r14d
jl .LBB1_9
jmp .LBB1_10
.LBB1_11: # %._crit_edge31
movq 24(%rsp), %rdi
callq hipFree
movq 16(%rsp), %rdi
callq hipFree
xorl %eax, %eax
addq $120, %rsp
.cfi_def_cfa_offset 56
popq %rbx
.cfi_def_cfa_offset 48
popq %r12
.cfi_def_cfa_offset 40
popq %r13
.cfi_def_cfa_offset 32
popq %r14
.cfi_def_cfa_offset 24
popq %r15
.cfi_def_cfa_offset 16
popq %rbp
.cfi_def_cfa_offset 8
retq
.Lfunc_end1:
.size main, .Lfunc_end1-main
.cfi_endproc
# -- End function
.p2align 4, 0x90 # -- Begin function __hip_module_ctor
.type __hip_module_ctor,@function
__hip_module_ctor: # @__hip_module_ctor
.cfi_startproc
# %bb.0:
subq $40, %rsp
.cfi_def_cfa_offset 48
cmpq $0, __hip_gpubin_handle(%rip)
jne .LBB2_2
# %bb.1:
movl $__hip_fatbin_wrapper, %edi
callq __hipRegisterFatBinary
movq %rax, __hip_gpubin_handle(%rip)
.LBB2_2:
movq __hip_gpubin_handle(%rip), %rdi
xorps %xmm0, %xmm0
movups %xmm0, 16(%rsp)
movups %xmm0, (%rsp)
movl $_Z10replaceMatPiS_, %esi
movl $.L__unnamed_1, %edx
movl $.L__unnamed_1, %ecx
movl $-1, %r8d
xorl %r9d, %r9d
callq __hipRegisterFunction
movl $__hip_module_dtor, %edi
addq $40, %rsp
.cfi_def_cfa_offset 8
jmp atexit # TAILCALL
.Lfunc_end2:
.size __hip_module_ctor, .Lfunc_end2-__hip_module_ctor
.cfi_endproc
# -- End function
.p2align 4, 0x90 # -- Begin function __hip_module_dtor
.type __hip_module_dtor,@function
__hip_module_dtor: # @__hip_module_dtor
.cfi_startproc
# %bb.0:
movq __hip_gpubin_handle(%rip), %rdi
testq %rdi, %rdi
je .LBB3_2
# %bb.1:
pushq %rax
.cfi_def_cfa_offset 16
callq __hipUnregisterFatBinary
movq $0, __hip_gpubin_handle(%rip)
addq $8, %rsp
.cfi_def_cfa_offset 8
.LBB3_2:
retq
.Lfunc_end3:
.size __hip_module_dtor, .Lfunc_end3-__hip_module_dtor
.cfi_endproc
# -- End function
.type _Z10replaceMatPiS_,@object # @_Z10replaceMatPiS_
.section .rodata,"a",@progbits
.globl _Z10replaceMatPiS_
.p2align 3, 0x0
_Z10replaceMatPiS_:
.quad _Z25__device_stub__replaceMatPiS_
.size _Z10replaceMatPiS_, 8
.type .L.str,@object # @.str
.section .rodata.str1.1,"aMS",@progbits,1
.L.str:
.asciz "Enter m: "
.size .L.str, 10
.type .L.str.1,@object # @.str.1
.L.str.1:
.asciz "%d"
.size .L.str.1, 3
.type .L.str.2,@object # @.str.2
.L.str.2:
.asciz "Enter n: "
.size .L.str.2, 10
.type .L.str.5,@object # @.str.5
.L.str.5:
.asciz "%d "
.size .L.str.5, 4
.type .L__unnamed_1,@object # @0
.L__unnamed_1:
.asciz "_Z10replaceMatPiS_"
.size .L__unnamed_1, 19
.type __hip_fatbin_wrapper,@object # @__hip_fatbin_wrapper
.section .hipFatBinSegment,"a",@progbits
.p2align 3, 0x0
__hip_fatbin_wrapper:
.long 1212764230 # 0x48495046
.long 1 # 0x1
.quad __hip_fatbin
.quad 0
.size __hip_fatbin_wrapper, 24
.type __hip_gpubin_handle,@object # @__hip_gpubin_handle
.local __hip_gpubin_handle
.comm __hip_gpubin_handle,8,8
.section .init_array,"aw",@init_array
.p2align 3, 0x0
.quad __hip_module_ctor
.type __hip_cuid_,@object # @__hip_cuid_
.bss
.globl __hip_cuid_
__hip_cuid_:
.byte 0 # 0x0
.size __hip_cuid_, 1
.type .Lstr,@object # @str
.section .rodata.str1.1,"aMS",@progbits,1
.Lstr:
.asciz "Enter the matrix:"
.size .Lstr, 18
.type .Lstr.1,@object # @str.1
.Lstr.1:
.asciz "Result:"
.size .Lstr.1, 8
.section ".linker-options","e",@llvm_linker_options
.ident "AMD clang version 18.0.0git (https://github.com/RadeonOpenCompute/llvm-project roc-6.3.2 25012 e5bf7e55c91490b07c49d8960fa7983d864936c4)"
.section ".note.GNU-stack","",@progbits
.addrsig
.addrsig_sym _Z25__device_stub__replaceMatPiS_
.addrsig_sym __hip_module_ctor
.addrsig_sym __hip_module_dtor
.addrsig_sym _Z10replaceMatPiS_
.addrsig_sym __hip_fatbin
.addrsig_sym __hip_fatbin_wrapper
.addrsig_sym __hip_cuid_ |
You are a helpful coding assistant specialized in converting CUDA source code to CUDA device assembly. | #include <cuda.h>
#include <iostream>
#define N 32
using namespace std;
__global__ void matrix_Add(int A[][N],int B[][N],int C[][N])
{
int i=blockIdx.x;
int j=threadIdx.x;
__syncthreads();
C[i][j]=A[i][j]+B[i][j];
//printf("asjkdsl");
}
int main(int argc,char *argv[])
{
int A[N][N],B[N][N],C[N][N];
for(int i=0;i<N;i++)
{
for(int j=0;j<N;j++)
{
A[i][j]=2*i+j;
B[i][j]=i+2*j;
}
}
int (*A_D)[N],(*B_D)[N],(*C_D)[N];
cudaMalloc((void**)&A_D, (N*N)*sizeof(int));
cudaMalloc((void**)&B_D, (N*N)*sizeof(int));
cudaMalloc((void**)&C_D, (N*N)*sizeof(int));
cudaMemcpy(A_D,A,N*N*sizeof(int),cudaMemcpyHostToDevice);
cudaMemcpy(B_D,B,N*N*sizeof(int),cudaMemcpyHostToDevice);
matrix_Add<<<N,N>>>(A_D,B_D,C_D);
cudaMemcpy(C,C_D,N*N*sizeof(int),cudaMemcpyDeviceToHost);
for(int i=0;i<N;i++)
{
for(int j=0;j<N;j++)
{
cout<<C[i][j]<<" ";
}
cout<<endl;
}
cudaFree(A_D);
cudaFree(B_D);
cudaFree(C_D);
return 0;
} | code for sm_80
Function : _Z10matrix_AddPA32_iS0_S0_
.headerflags @"EF_CUDA_TEXMODE_UNIFIED EF_CUDA_64BIT_ADDRESS EF_CUDA_SM80 EF_CUDA_VIRTUAL_SM(EF_CUDA_SM80)"
/*0000*/ MOV R1, c[0x0][0x28] ; /* 0x00000a0000017a02 */
/* 0x000fe40000000f00 */
/*0010*/ S2R R6, SR_CTAID.X ; /* 0x0000000000067919 */
/* 0x000e220000002500 */
/*0020*/ HFMA2.MMA R7, -RZ, RZ, 0, 7.62939453125e-06 ; /* 0x00000080ff077435 */
/* 0x000fe200000001ff */
/*0030*/ ULDC.64 UR4, c[0x0][0x118] ; /* 0x0000460000047ab9 */
/* 0x000fe40000000a00 */
/*0040*/ S2R R9, SR_TID.X ; /* 0x0000000000097919 */
/* 0x000e680000002100 */
/*0050*/ BAR.SYNC.DEFER_BLOCKING 0x0 ; /* 0x0000000000007b1d */
/* 0x000fe60000010000 */
/*0060*/ IMAD.WIDE R2, R6, R7, c[0x0][0x160] ; /* 0x0000580006027625 */
/* 0x001fc800078e0207 */
/*0070*/ IMAD.WIDE R4, R6, R7, c[0x0][0x168] ; /* 0x00005a0006047625 */
/* 0x000fc800078e0207 */
/*0080*/ IMAD.WIDE R2, R9, 0x4, R2 ; /* 0x0000000409027825 */
/* 0x002fc800078e0202 */
/*0090*/ IMAD.WIDE R4, R9, 0x4, R4 ; /* 0x0000000409047825 */
/* 0x000fe400078e0204 */
/*00a0*/ LDG.E R2, [R2.64] ; /* 0x0000000402027981 */
/* 0x000ea8000c1e1900 */
/*00b0*/ LDG.E R5, [R4.64] ; /* 0x0000000404057981 */
/* 0x000ea2000c1e1900 */
/*00c0*/ IMAD.WIDE R6, R6, R7, c[0x0][0x170] ; /* 0x00005c0006067625 */
/* 0x000fcc00078e0207 */
/*00d0*/ IMAD.WIDE R6, R9, 0x4, R6 ; /* 0x0000000409067825 */
/* 0x000fe200078e0206 */
/*00e0*/ IADD3 R9, R2, R5, RZ ; /* 0x0000000502097210 */
/* 0x004fca0007ffe0ff */
/*00f0*/ STG.E [R6.64], R9 ; /* 0x0000000906007986 */
/* 0x000fe2000c101904 */
/*0100*/ EXIT ; /* 0x000000000000794d */
/* 0x000fea0003800000 */
/*0110*/ BRA 0x110; /* 0xfffffff000007947 */
/* 0x000fc0000383ffff */
/*0120*/ NOP; /* 0x0000000000007918 */
/* 0x000fc00000000000 */
/*0130*/ NOP; /* 0x0000000000007918 */
/* 0x000fc00000000000 */
/*0140*/ NOP; /* 0x0000000000007918 */
/* 0x000fc00000000000 */
/*0150*/ NOP; /* 0x0000000000007918 */
/* 0x000fc00000000000 */
/*0160*/ NOP; /* 0x0000000000007918 */
/* 0x000fc00000000000 */
/*0170*/ NOP; /* 0x0000000000007918 */
/* 0x000fc00000000000 */
/*0180*/ NOP; /* 0x0000000000007918 */
/* 0x000fc00000000000 */
/*0190*/ NOP; /* 0x0000000000007918 */
/* 0x000fc00000000000 */
/*01a0*/ NOP; /* 0x0000000000007918 */
/* 0x000fc00000000000 */
/*01b0*/ NOP; /* 0x0000000000007918 */
/* 0x000fc00000000000 */
/*01c0*/ NOP; /* 0x0000000000007918 */
/* 0x000fc00000000000 */
/*01d0*/ NOP; /* 0x0000000000007918 */
/* 0x000fc00000000000 */
/*01e0*/ NOP; /* 0x0000000000007918 */
/* 0x000fc00000000000 */
/*01f0*/ NOP; /* 0x0000000000007918 */
/* 0x000fc00000000000 */
.......... |
You are a helpful coding assistant specialized in converting CUDA source code to CUDA host assembly. | #include <cuda.h>
#include <iostream>
#define N 32
using namespace std;
__global__ void matrix_Add(int A[][N],int B[][N],int C[][N])
{
int i=blockIdx.x;
int j=threadIdx.x;
__syncthreads();
C[i][j]=A[i][j]+B[i][j];
//printf("asjkdsl");
}
int main(int argc,char *argv[])
{
int A[N][N],B[N][N],C[N][N];
for(int i=0;i<N;i++)
{
for(int j=0;j<N;j++)
{
A[i][j]=2*i+j;
B[i][j]=i+2*j;
}
}
int (*A_D)[N],(*B_D)[N],(*C_D)[N];
cudaMalloc((void**)&A_D, (N*N)*sizeof(int));
cudaMalloc((void**)&B_D, (N*N)*sizeof(int));
cudaMalloc((void**)&C_D, (N*N)*sizeof(int));
cudaMemcpy(A_D,A,N*N*sizeof(int),cudaMemcpyHostToDevice);
cudaMemcpy(B_D,B,N*N*sizeof(int),cudaMemcpyHostToDevice);
matrix_Add<<<N,N>>>(A_D,B_D,C_D);
cudaMemcpy(C,C_D,N*N*sizeof(int),cudaMemcpyDeviceToHost);
for(int i=0;i<N;i++)
{
for(int j=0;j<N;j++)
{
cout<<C[i][j]<<" ";
}
cout<<endl;
}
cudaFree(A_D);
cudaFree(B_D);
cudaFree(C_D);
return 0;
} | .file "tmpxft_001282d1_00000000-6_matrix_addition.cudafe1.cpp"
.text
#APP
.globl _ZSt21ios_base_library_initv
#NO_APP
.type _ZL26__cudaUnregisterBinaryUtilv, @function
_ZL26__cudaUnregisterBinaryUtilv:
.LFB3672:
.cfi_startproc
endbr64
subq $8, %rsp
.cfi_def_cfa_offset 16
movq _ZL20__cudaFatCubinHandle(%rip), %rdi
call __cudaUnregisterFatBinary@PLT
addq $8, %rsp
.cfi_def_cfa_offset 8
ret
.cfi_endproc
.LFE3672:
.size _ZL26__cudaUnregisterBinaryUtilv, .-_ZL26__cudaUnregisterBinaryUtilv
.globl _Z40__device_stub__Z10matrix_AddPA32_iS0_S0_PA32_iS0_S0_
.type _Z40__device_stub__Z10matrix_AddPA32_iS0_S0_PA32_iS0_S0_, @function
_Z40__device_stub__Z10matrix_AddPA32_iS0_S0_PA32_iS0_S0_:
.LFB3694:
.cfi_startproc
endbr64
subq $136, %rsp
.cfi_def_cfa_offset 144
movq %rdi, 24(%rsp)
movq %rsi, 16(%rsp)
movq %rdx, 8(%rsp)
movq %fs:40, %rax
movq %rax, 120(%rsp)
xorl %eax, %eax
leaq 24(%rsp), %rax
movq %rax, 96(%rsp)
leaq 16(%rsp), %rax
movq %rax, 104(%rsp)
leaq 8(%rsp), %rax
movq %rax, 112(%rsp)
movl $1, 48(%rsp)
movl $1, 52(%rsp)
movl $1, 56(%rsp)
movl $1, 60(%rsp)
movl $1, 64(%rsp)
movl $1, 68(%rsp)
leaq 40(%rsp), %rcx
leaq 32(%rsp), %rdx
leaq 60(%rsp), %rsi
leaq 48(%rsp), %rdi
call __cudaPopCallConfiguration@PLT
testl %eax, %eax
je .L7
.L3:
movq 120(%rsp), %rax
subq %fs:40, %rax
jne .L8
addq $136, %rsp
.cfi_remember_state
.cfi_def_cfa_offset 8
ret
.L7:
.cfi_restore_state
pushq 40(%rsp)
.cfi_def_cfa_offset 152
pushq 40(%rsp)
.cfi_def_cfa_offset 160
leaq 112(%rsp), %r9
movq 76(%rsp), %rcx
movl 84(%rsp), %r8d
movq 64(%rsp), %rsi
movl 72(%rsp), %edx
leaq _Z10matrix_AddPA32_iS0_S0_(%rip), %rdi
call cudaLaunchKernel@PLT
addq $16, %rsp
.cfi_def_cfa_offset 144
jmp .L3
.L8:
call __stack_chk_fail@PLT
.cfi_endproc
.LFE3694:
.size _Z40__device_stub__Z10matrix_AddPA32_iS0_S0_PA32_iS0_S0_, .-_Z40__device_stub__Z10matrix_AddPA32_iS0_S0_PA32_iS0_S0_
.globl _Z10matrix_AddPA32_iS0_S0_
.type _Z10matrix_AddPA32_iS0_S0_, @function
_Z10matrix_AddPA32_iS0_S0_:
.LFB3695:
.cfi_startproc
endbr64
subq $8, %rsp
.cfi_def_cfa_offset 16
call _Z40__device_stub__Z10matrix_AddPA32_iS0_S0_PA32_iS0_S0_
addq $8, %rsp
.cfi_def_cfa_offset 8
ret
.cfi_endproc
.LFE3695:
.size _Z10matrix_AddPA32_iS0_S0_, .-_Z10matrix_AddPA32_iS0_S0_
.section .rodata.str1.1,"aMS",@progbits,1
.LC0:
.string " "
.text
.globl main
.type main, @function
main:
.LFB3669:
.cfi_startproc
endbr64
pushq %r14
.cfi_def_cfa_offset 16
.cfi_offset 14, -16
pushq %r13
.cfi_def_cfa_offset 24
.cfi_offset 13, -24
pushq %r12
.cfi_def_cfa_offset 32
.cfi_offset 12, -32
pushq %rbp
.cfi_def_cfa_offset 40
.cfi_offset 6, -40
pushq %rbx
.cfi_def_cfa_offset 48
.cfi_offset 3, -48
subq $4096, %rsp
.cfi_def_cfa_offset 4144
orq $0, (%rsp)
subq $4096, %rsp
.cfi_def_cfa_offset 8240
orq $0, (%rsp)
subq $4096, %rsp
.cfi_def_cfa_offset 12336
orq $0, (%rsp)
subq $64, %rsp
.cfi_def_cfa_offset 12400
movq %fs:40, %rax
movq %rax, 12344(%rsp)
xorl %eax, %eax
leaq 48(%rsp), %r8
leaq 4144(%rsp), %rdi
movl $0, %esi
movl $0, %r9d
.L12:
movl %r9d, %edx
movl $0, %eax
.L13:
leal (%rsi,%rax), %ecx
movl %ecx, (%r8,%rax,4)
movl %edx, (%rdi,%rax,4)
addq $1, %rax
addl $2, %edx
cmpq $32, %rax
jne .L13
addl $1, %r9d
addl $2, %esi
subq $-128, %r8
subq $-128, %rdi
cmpl $32, %r9d
jne .L12
movq %rsp, %rdi
movl $4096, %esi
call cudaMalloc@PLT
leaq 8(%rsp), %rdi
movl $4096, %esi
call cudaMalloc@PLT
leaq 16(%rsp), %rdi
movl $4096, %esi
call cudaMalloc@PLT
leaq 48(%rsp), %rsi
movl $1, %ecx
movl $4096, %edx
movq (%rsp), %rdi
call cudaMemcpy@PLT
leaq 4144(%rsp), %rsi
movl $1, %ecx
movl $4096, %edx
movq 8(%rsp), %rdi
call cudaMemcpy@PLT
movl $32, 36(%rsp)
movl $1, 40(%rsp)
movl $1, 44(%rsp)
movl $32, 24(%rsp)
movl $1, 28(%rsp)
movl $1, 32(%rsp)
movl $0, %r9d
movl $0, %r8d
movq 36(%rsp), %rdx
movl $1, %ecx
movq 24(%rsp), %rdi
movl $1, %esi
call __cudaPushCallConfiguration@PLT
testl %eax, %eax
je .L27
.L15:
leaq 8240(%rsp), %rdi
movl $2, %ecx
movl $4096, %edx
movq 16(%rsp), %rsi
call cudaMemcpy@PLT
leaq 8368(%rsp), %rbp
leaq 12464(%rsp), %r14
leaq _ZSt4cout(%rip), %r12
leaq .LC0(%rip), %r13
jmp .L16
.L27:
movq 16(%rsp), %rdx
movq 8(%rsp), %rsi
movq (%rsp), %rdi
call _Z40__device_stub__Z10matrix_AddPA32_iS0_S0_PA32_iS0_S0_
jmp .L15
.L29:
movq 12344(%rsp), %rax
subq %fs:40, %rax
jne .L28
call _ZSt16__throw_bad_castv@PLT
.L28:
call __stack_chk_fail@PLT
.L20:
movq %rbx, %rdi
call _ZNKSt5ctypeIcE13_M_widen_initEv@PLT
movq (%rbx), %rax
movl $10, %esi
movq %rbx, %rdi
call *48(%rax)
movl %eax, %esi
.L21:
movsbl %sil, %esi
movq %r12, %rdi
call _ZNSo3putEc@PLT
movq %rax, %rdi
call _ZNSo5flushEv@PLT
subq $-128, %rbp
cmpq %r14, %rbp
je .L22
.L16:
leaq -128(%rbp), %rbx
.L17:
movl (%rbx), %esi
movq %r12, %rdi
call _ZNSolsEi@PLT
movq %rax, %rdi
movl $1, %edx
movq %r13, %rsi
call _ZSt16__ostream_insertIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_PKS3_l@PLT
addq $4, %rbx
cmpq %rbp, %rbx
jne .L17
movq (%r12), %rax
movq -24(%rax), %rax
movq 240(%r12,%rax), %rbx
testq %rbx, %rbx
je .L29
cmpb $0, 56(%rbx)
je .L20
movzbl 67(%rbx), %esi
jmp .L21
.L22:
movq (%rsp), %rdi
call cudaFree@PLT
movq 8(%rsp), %rdi
call cudaFree@PLT
movq 16(%rsp), %rdi
call cudaFree@PLT
movq 12344(%rsp), %rax
subq %fs:40, %rax
jne .L30
movl $0, %eax
addq $12352, %rsp
.cfi_remember_state
.cfi_def_cfa_offset 48
popq %rbx
.cfi_def_cfa_offset 40
popq %rbp
.cfi_def_cfa_offset 32
popq %r12
.cfi_def_cfa_offset 24
popq %r13
.cfi_def_cfa_offset 16
popq %r14
.cfi_def_cfa_offset 8
ret
.L30:
.cfi_restore_state
call __stack_chk_fail@PLT
.cfi_endproc
.LFE3669:
.size main, .-main
.section .rodata.str1.1
.LC1:
.string "_Z10matrix_AddPA32_iS0_S0_"
.text
.type _ZL24__sti____cudaRegisterAllv, @function
_ZL24__sti____cudaRegisterAllv:
.LFB3697:
.cfi_startproc
endbr64
subq $8, %rsp
.cfi_def_cfa_offset 16
leaq _ZL15__fatDeviceText(%rip), %rdi
call __cudaRegisterFatBinary@PLT
movq %rax, %rdi
movq %rax, _ZL20__cudaFatCubinHandle(%rip)
pushq $0
.cfi_def_cfa_offset 24
pushq $0
.cfi_def_cfa_offset 32
pushq $0
.cfi_def_cfa_offset 40
pushq $0
.cfi_def_cfa_offset 48
movl $0, %r9d
movl $-1, %r8d
leaq .LC1(%rip), %rdx
movq %rdx, %rcx
leaq _Z10matrix_AddPA32_iS0_S0_(%rip), %rsi
call __cudaRegisterFunction@PLT
addq $32, %rsp
.cfi_def_cfa_offset 16
movq _ZL20__cudaFatCubinHandle(%rip), %rdi
call __cudaRegisterFatBinaryEnd@PLT
leaq _ZL26__cudaUnregisterBinaryUtilv(%rip), %rdi
call atexit@PLT
addq $8, %rsp
.cfi_def_cfa_offset 8
ret
.cfi_endproc
.LFE3697:
.size _ZL24__sti____cudaRegisterAllv, .-_ZL24__sti____cudaRegisterAllv
.section .init_array,"aw"
.align 8
.quad _ZL24__sti____cudaRegisterAllv
.section .nvFatBinSegment,"aw"
.align 8
.type _ZL15__fatDeviceText, @object
.size _ZL15__fatDeviceText, 24
_ZL15__fatDeviceText:
.long 1180844977
.long 1
.quad fatbinData
.quad 0
.local _ZL20__cudaFatCubinHandle
.comm _ZL20__cudaFatCubinHandle,8,8
.ident "GCC: (Ubuntu 13.3.0-6ubuntu2~24.04) 13.3.0"
.section .note.GNU-stack,"",@progbits
.section .note.gnu.property,"a"
.align 8
.long 1f - 0f
.long 4f - 1f
.long 5
0:
.string "GNU"
1:
.align 8
.long 0xc0000002
.long 3f - 2f
2:
.long 0x3
3:
.align 8
4: |
You are a helpful coding assistant specialized in converting CUDA source code to HIP/AMD source code. | #include <cuda.h>
#include <iostream>
#define N 32
using namespace std;
__global__ void matrix_Add(int A[][N],int B[][N],int C[][N])
{
int i=blockIdx.x;
int j=threadIdx.x;
__syncthreads();
C[i][j]=A[i][j]+B[i][j];
//printf("asjkdsl");
}
int main(int argc,char *argv[])
{
int A[N][N],B[N][N],C[N][N];
for(int i=0;i<N;i++)
{
for(int j=0;j<N;j++)
{
A[i][j]=2*i+j;
B[i][j]=i+2*j;
}
}
int (*A_D)[N],(*B_D)[N],(*C_D)[N];
cudaMalloc((void**)&A_D, (N*N)*sizeof(int));
cudaMalloc((void**)&B_D, (N*N)*sizeof(int));
cudaMalloc((void**)&C_D, (N*N)*sizeof(int));
cudaMemcpy(A_D,A,N*N*sizeof(int),cudaMemcpyHostToDevice);
cudaMemcpy(B_D,B,N*N*sizeof(int),cudaMemcpyHostToDevice);
matrix_Add<<<N,N>>>(A_D,B_D,C_D);
cudaMemcpy(C,C_D,N*N*sizeof(int),cudaMemcpyDeviceToHost);
for(int i=0;i<N;i++)
{
for(int j=0;j<N;j++)
{
cout<<C[i][j]<<" ";
}
cout<<endl;
}
cudaFree(A_D);
cudaFree(B_D);
cudaFree(C_D);
return 0;
} | #include <hip/hip_runtime.h>
#include <iostream>
#define N 32
using namespace std;
__global__ void matrix_Add(int A[][N],int B[][N],int C[][N])
{
int i=blockIdx.x;
int j=threadIdx.x;
__syncthreads();
C[i][j]=A[i][j]+B[i][j];
//printf("asjkdsl");
}
int main(int argc,char *argv[])
{
int A[N][N],B[N][N],C[N][N];
for(int i=0;i<N;i++)
{
for(int j=0;j<N;j++)
{
A[i][j]=2*i+j;
B[i][j]=i+2*j;
}
}
int (*A_D)[N],(*B_D)[N],(*C_D)[N];
hipMalloc((void**)&A_D, (N*N)*sizeof(int));
hipMalloc((void**)&B_D, (N*N)*sizeof(int));
hipMalloc((void**)&C_D, (N*N)*sizeof(int));
hipMemcpy(A_D,A,N*N*sizeof(int),hipMemcpyHostToDevice);
hipMemcpy(B_D,B,N*N*sizeof(int),hipMemcpyHostToDevice);
matrix_Add<<<N,N>>>(A_D,B_D,C_D);
hipMemcpy(C,C_D,N*N*sizeof(int),hipMemcpyDeviceToHost);
for(int i=0;i<N;i++)
{
for(int j=0;j<N;j++)
{
cout<<C[i][j]<<" ";
}
cout<<endl;
}
hipFree(A_D);
hipFree(B_D);
hipFree(C_D);
return 0;
} |
You are a helpful coding assistant specialized in converting HIP source code to AMD device assembly. | #include <hip/hip_runtime.h>
#include <iostream>
#define N 32
using namespace std;
__global__ void matrix_Add(int A[][N],int B[][N],int C[][N])
{
int i=blockIdx.x;
int j=threadIdx.x;
__syncthreads();
C[i][j]=A[i][j]+B[i][j];
//printf("asjkdsl");
}
int main(int argc,char *argv[])
{
int A[N][N],B[N][N],C[N][N];
for(int i=0;i<N;i++)
{
for(int j=0;j<N;j++)
{
A[i][j]=2*i+j;
B[i][j]=i+2*j;
}
}
int (*A_D)[N],(*B_D)[N],(*C_D)[N];
hipMalloc((void**)&A_D, (N*N)*sizeof(int));
hipMalloc((void**)&B_D, (N*N)*sizeof(int));
hipMalloc((void**)&C_D, (N*N)*sizeof(int));
hipMemcpy(A_D,A,N*N*sizeof(int),hipMemcpyHostToDevice);
hipMemcpy(B_D,B,N*N*sizeof(int),hipMemcpyHostToDevice);
matrix_Add<<<N,N>>>(A_D,B_D,C_D);
hipMemcpy(C,C_D,N*N*sizeof(int),hipMemcpyDeviceToHost);
for(int i=0;i<N;i++)
{
for(int j=0;j<N;j++)
{
cout<<C[i][j]<<" ";
}
cout<<endl;
}
hipFree(A_D);
hipFree(B_D);
hipFree(C_D);
return 0;
} | .text
.amdgcn_target "amdgcn-amd-amdhsa--gfx1100"
.protected _Z10matrix_AddPA32_iS0_S0_
.globl _Z10matrix_AddPA32_iS0_S0_
.p2align 8
.type _Z10matrix_AddPA32_iS0_S0_,@function
_Z10matrix_AddPA32_iS0_S0_:
s_clause 0x1
s_load_b128 s[4:7], s[0:1], 0x0
s_load_b64 s[0:1], s[0:1], 0x10
s_mov_b32 s2, s15
s_ashr_i32 s3, s15, 31
v_lshlrev_b32_e32 v0, 2, v0
s_lshl_b64 s[2:3], s[2:3], 7
s_waitcnt lgkmcnt(0)
s_barrier
buffer_gl0_inv
s_add_u32 s4, s4, s2
s_addc_u32 s5, s5, s3
s_add_u32 s6, s6, s2
s_addc_u32 s7, s7, s3
s_clause 0x1
global_load_b32 v1, v0, s[4:5]
global_load_b32 v2, v0, s[6:7]
s_add_u32 s0, s0, s2
s_addc_u32 s1, s1, s3
s_waitcnt vmcnt(0)
v_add_nc_u32_e32 v1, v2, v1
global_store_b32 v0, v1, s[0:1]
s_nop 0
s_sendmsg sendmsg(MSG_DEALLOC_VGPRS)
s_endpgm
.section .rodata,"a",@progbits
.p2align 6, 0x0
.amdhsa_kernel _Z10matrix_AddPA32_iS0_S0_
.amdhsa_group_segment_fixed_size 0
.amdhsa_private_segment_fixed_size 0
.amdhsa_kernarg_size 24
.amdhsa_user_sgpr_count 15
.amdhsa_user_sgpr_dispatch_ptr 0
.amdhsa_user_sgpr_queue_ptr 0
.amdhsa_user_sgpr_kernarg_segment_ptr 1
.amdhsa_user_sgpr_dispatch_id 0
.amdhsa_user_sgpr_private_segment_size 0
.amdhsa_wavefront_size32 1
.amdhsa_uses_dynamic_stack 0
.amdhsa_enable_private_segment 0
.amdhsa_system_sgpr_workgroup_id_x 1
.amdhsa_system_sgpr_workgroup_id_y 0
.amdhsa_system_sgpr_workgroup_id_z 0
.amdhsa_system_sgpr_workgroup_info 0
.amdhsa_system_vgpr_workitem_id 0
.amdhsa_next_free_vgpr 3
.amdhsa_next_free_sgpr 16
.amdhsa_reserve_vcc 0
.amdhsa_float_round_mode_32 0
.amdhsa_float_round_mode_16_64 0
.amdhsa_float_denorm_mode_32 3
.amdhsa_float_denorm_mode_16_64 3
.amdhsa_dx10_clamp 1
.amdhsa_ieee_mode 1
.amdhsa_fp16_overflow 0
.amdhsa_workgroup_processor_mode 1
.amdhsa_memory_ordered 1
.amdhsa_forward_progress 0
.amdhsa_shared_vgpr_count 0
.amdhsa_exception_fp_ieee_invalid_op 0
.amdhsa_exception_fp_denorm_src 0
.amdhsa_exception_fp_ieee_div_zero 0
.amdhsa_exception_fp_ieee_overflow 0
.amdhsa_exception_fp_ieee_underflow 0
.amdhsa_exception_fp_ieee_inexact 0
.amdhsa_exception_int_div_zero 0
.end_amdhsa_kernel
.text
.Lfunc_end0:
.size _Z10matrix_AddPA32_iS0_S0_, .Lfunc_end0-_Z10matrix_AddPA32_iS0_S0_
.section .AMDGPU.csdata,"",@progbits
.text
.p2alignl 7, 3214868480
.fill 96, 4, 3214868480
.type __hip_cuid_,@object
.section .bss,"aw",@nobits
.globl __hip_cuid_
__hip_cuid_:
.byte 0
.size __hip_cuid_, 1
.ident "AMD clang version 18.0.0git (https://github.com/RadeonOpenCompute/llvm-project roc-6.3.2 25012 e5bf7e55c91490b07c49d8960fa7983d864936c4)"
.section ".note.GNU-stack","",@progbits
.addrsig
.addrsig_sym __hip_cuid_
.amdgpu_metadata
---
amdhsa.kernels:
- .args:
- .address_space: global
.offset: 0
.size: 8
.value_kind: global_buffer
- .address_space: global
.offset: 8
.size: 8
.value_kind: global_buffer
- .address_space: global
.offset: 16
.size: 8
.value_kind: global_buffer
.group_segment_fixed_size: 0
.kernarg_segment_align: 8
.kernarg_segment_size: 24
.language: OpenCL C
.language_version:
- 2
- 0
.max_flat_workgroup_size: 1024
.name: _Z10matrix_AddPA32_iS0_S0_
.private_segment_fixed_size: 0
.sgpr_count: 16
.sgpr_spill_count: 0
.symbol: _Z10matrix_AddPA32_iS0_S0_.kd
.uniform_work_group_size: 1
.uses_dynamic_stack: false
.vgpr_count: 3
.vgpr_spill_count: 0
.wavefront_size: 32
.workgroup_processor_mode: 1
amdhsa.target: amdgcn-amd-amdhsa--gfx1100
amdhsa.version:
- 1
- 2
...
.end_amdgpu_metadata |
You are a helpful coding assistant specialized in converting HIP source code to AMD host assembly. | #include <hip/hip_runtime.h>
#include <iostream>
#define N 32
using namespace std;
__global__ void matrix_Add(int A[][N],int B[][N],int C[][N])
{
int i=blockIdx.x;
int j=threadIdx.x;
__syncthreads();
C[i][j]=A[i][j]+B[i][j];
//printf("asjkdsl");
}
int main(int argc,char *argv[])
{
int A[N][N],B[N][N],C[N][N];
for(int i=0;i<N;i++)
{
for(int j=0;j<N;j++)
{
A[i][j]=2*i+j;
B[i][j]=i+2*j;
}
}
int (*A_D)[N],(*B_D)[N],(*C_D)[N];
hipMalloc((void**)&A_D, (N*N)*sizeof(int));
hipMalloc((void**)&B_D, (N*N)*sizeof(int));
hipMalloc((void**)&C_D, (N*N)*sizeof(int));
hipMemcpy(A_D,A,N*N*sizeof(int),hipMemcpyHostToDevice);
hipMemcpy(B_D,B,N*N*sizeof(int),hipMemcpyHostToDevice);
matrix_Add<<<N,N>>>(A_D,B_D,C_D);
hipMemcpy(C,C_D,N*N*sizeof(int),hipMemcpyDeviceToHost);
for(int i=0;i<N;i++)
{
for(int j=0;j<N;j++)
{
cout<<C[i][j]<<" ";
}
cout<<endl;
}
hipFree(A_D);
hipFree(B_D);
hipFree(C_D);
return 0;
} | .text
.file "matrix_addition.hip"
# Start of file scope inline assembly
.globl _ZSt21ios_base_library_initv
# End of file scope inline assembly
.globl _Z25__device_stub__matrix_AddPA32_iS0_S0_ # -- Begin function _Z25__device_stub__matrix_AddPA32_iS0_S0_
.p2align 4, 0x90
.type _Z25__device_stub__matrix_AddPA32_iS0_S0_,@function
_Z25__device_stub__matrix_AddPA32_iS0_S0_: # @_Z25__device_stub__matrix_AddPA32_iS0_S0_
.cfi_startproc
# %bb.0:
subq $104, %rsp
.cfi_def_cfa_offset 112
movq %rdi, 72(%rsp)
movq %rsi, 64(%rsp)
movq %rdx, 56(%rsp)
leaq 72(%rsp), %rax
movq %rax, 80(%rsp)
leaq 64(%rsp), %rax
movq %rax, 88(%rsp)
leaq 56(%rsp), %rax
movq %rax, 96(%rsp)
leaq 40(%rsp), %rdi
leaq 24(%rsp), %rsi
leaq 16(%rsp), %rdx
leaq 8(%rsp), %rcx
callq __hipPopCallConfiguration
movq 40(%rsp), %rsi
movl 48(%rsp), %edx
movq 24(%rsp), %rcx
movl 32(%rsp), %r8d
leaq 80(%rsp), %r9
movl $_Z10matrix_AddPA32_iS0_S0_, %edi
pushq 8(%rsp)
.cfi_adjust_cfa_offset 8
pushq 24(%rsp)
.cfi_adjust_cfa_offset 8
callq hipLaunchKernel
addq $120, %rsp
.cfi_adjust_cfa_offset -120
retq
.Lfunc_end0:
.size _Z25__device_stub__matrix_AddPA32_iS0_S0_, .Lfunc_end0-_Z25__device_stub__matrix_AddPA32_iS0_S0_
.cfi_endproc
# -- End function
.globl main # -- Begin function main
.p2align 4, 0x90
.type main,@function
main: # @main
.cfi_startproc
# %bb.0:
pushq %r15
.cfi_def_cfa_offset 16
pushq %r14
.cfi_def_cfa_offset 24
pushq %rbx
.cfi_def_cfa_offset 32
subq $12384, %rsp # imm = 0x3060
.cfi_def_cfa_offset 12416
.cfi_offset %rbx, -32
.cfi_offset %r14, -24
.cfi_offset %r15, -16
xorl %eax, %eax
leaq 8288(%rsp), %rcx
leaq 4192(%rsp), %rdx
xorl %esi, %esi
.p2align 4, 0x90
.LBB1_1: # %.preheader27
# =>This Loop Header: Depth=1
# Child Loop BB1_2 Depth 2
movl %eax, %edi
xorl %r8d, %r8d
.p2align 4, 0x90
.LBB1_2: # Parent Loop BB1_1 Depth=1
# => This Inner Loop Header: Depth=2
movl %edi, (%rcx,%r8,2)
leal (%rsi,%r8), %r9d
movl %r9d, (%rdx,%r8,2)
addq $2, %r8
incl %edi
cmpq $64, %r8
jne .LBB1_2
# %bb.3: # in Loop: Header=BB1_1 Depth=1
incq %rsi
addl $2, %eax
subq $-128, %rcx
subq $-128, %rdx
cmpq $32, %rsi
jne .LBB1_1
# %bb.4:
leaq 16(%rsp), %rdi
movl $4096, %esi # imm = 0x1000
callq hipMalloc
leaq 8(%rsp), %rdi
movl $4096, %esi # imm = 0x1000
callq hipMalloc
movq %rsp, %rdi
movl $4096, %esi # imm = 0x1000
callq hipMalloc
movq 16(%rsp), %rdi
leaq 8288(%rsp), %rsi
movl $4096, %edx # imm = 0x1000
movl $1, %ecx
callq hipMemcpy
movq 8(%rsp), %rdi
leaq 4192(%rsp), %rsi
movl $4096, %edx # imm = 0x1000
movl $1, %ecx
callq hipMemcpy
movabsq $4294967328, %rdi # imm = 0x100000020
movl $1, %esi
movq %rdi, %rdx
movl $1, %ecx
xorl %r8d, %r8d
xorl %r9d, %r9d
callq __hipPushCallConfiguration
testl %eax, %eax
jne .LBB1_6
# %bb.5:
movq 16(%rsp), %rax
movq 8(%rsp), %rcx
movq (%rsp), %rdx
movq %rax, 88(%rsp)
movq %rcx, 80(%rsp)
movq %rdx, 72(%rsp)
leaq 88(%rsp), %rax
movq %rax, 96(%rsp)
leaq 80(%rsp), %rax
movq %rax, 104(%rsp)
leaq 72(%rsp), %rax
movq %rax, 112(%rsp)
leaq 56(%rsp), %rdi
leaq 40(%rsp), %rsi
leaq 32(%rsp), %rdx
leaq 24(%rsp), %rcx
callq __hipPopCallConfiguration
movq 56(%rsp), %rsi
movl 64(%rsp), %edx
movq 40(%rsp), %rcx
movl 48(%rsp), %r8d
leaq 96(%rsp), %r9
movl $_Z10matrix_AddPA32_iS0_S0_, %edi
pushq 24(%rsp)
.cfi_adjust_cfa_offset 8
pushq 40(%rsp)
.cfi_adjust_cfa_offset 8
callq hipLaunchKernel
addq $16, %rsp
.cfi_adjust_cfa_offset -16
.LBB1_6:
movq (%rsp), %rsi
leaq 96(%rsp), %rbx
movl $4096, %edx # imm = 0x1000
movq %rbx, %rdi
movl $2, %ecx
callq hipMemcpy
xorl %r15d, %r15d
jmp .LBB1_7
.p2align 4, 0x90
.LBB1_12: # in Loop: Header=BB1_7 Depth=1
movq %r14, %rdi
callq _ZNKSt5ctypeIcE13_M_widen_initEv
movq (%r14), %rax
movq %r14, %rdi
movl $10, %esi
callq *48(%rax)
.LBB1_13: # %_ZSt4endlIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_.exit
# in Loop: Header=BB1_7 Depth=1
movsbl %al, %esi
movl $_ZSt4cout, %edi
callq _ZNSo3putEc
movq %rax, %rdi
callq _ZNSo5flushEv
incq %r15
subq $-128, %rbx
cmpq $32, %r15
je .LBB1_14
.LBB1_7: # %.preheader
# =>This Loop Header: Depth=1
# Child Loop BB1_8 Depth 2
xorl %r14d, %r14d
.p2align 4, 0x90
.LBB1_8: # Parent Loop BB1_7 Depth=1
# => This Inner Loop Header: Depth=2
movl (%rbx,%r14,4), %esi
movl $_ZSt4cout, %edi
callq _ZNSolsEi
movl $.L.str, %esi
movl $1, %edx
movq %rax, %rdi
callq _ZSt16__ostream_insertIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_PKS3_l
incq %r14
cmpq $32, %r14
jne .LBB1_8
# %bb.9: # in Loop: Header=BB1_7 Depth=1
movq _ZSt4cout(%rip), %rax
movq -24(%rax), %rax
movq _ZSt4cout+240(%rax), %r14
testq %r14, %r14
je .LBB1_15
# %bb.10: # %_ZSt13__check_facetISt5ctypeIcEERKT_PS3_.exit.i.i
# in Loop: Header=BB1_7 Depth=1
cmpb $0, 56(%r14)
je .LBB1_12
# %bb.11: # in Loop: Header=BB1_7 Depth=1
movzbl 67(%r14), %eax
jmp .LBB1_13
.LBB1_14:
movq 16(%rsp), %rdi
callq hipFree
movq 8(%rsp), %rdi
callq hipFree
movq (%rsp), %rdi
callq hipFree
xorl %eax, %eax
addq $12384, %rsp # imm = 0x3060
.cfi_def_cfa_offset 32
popq %rbx
.cfi_def_cfa_offset 24
popq %r14
.cfi_def_cfa_offset 16
popq %r15
.cfi_def_cfa_offset 8
retq
.LBB1_15:
.cfi_def_cfa_offset 12416
callq _ZSt16__throw_bad_castv
.Lfunc_end1:
.size main, .Lfunc_end1-main
.cfi_endproc
# -- End function
.p2align 4, 0x90 # -- Begin function __hip_module_ctor
.type __hip_module_ctor,@function
__hip_module_ctor: # @__hip_module_ctor
.cfi_startproc
# %bb.0:
subq $40, %rsp
.cfi_def_cfa_offset 48
cmpq $0, __hip_gpubin_handle(%rip)
jne .LBB2_2
# %bb.1:
movl $__hip_fatbin_wrapper, %edi
callq __hipRegisterFatBinary
movq %rax, __hip_gpubin_handle(%rip)
.LBB2_2:
movq __hip_gpubin_handle(%rip), %rdi
xorps %xmm0, %xmm0
movups %xmm0, 16(%rsp)
movups %xmm0, (%rsp)
movl $_Z10matrix_AddPA32_iS0_S0_, %esi
movl $.L__unnamed_1, %edx
movl $.L__unnamed_1, %ecx
movl $-1, %r8d
xorl %r9d, %r9d
callq __hipRegisterFunction
movl $__hip_module_dtor, %edi
addq $40, %rsp
.cfi_def_cfa_offset 8
jmp atexit # TAILCALL
.Lfunc_end2:
.size __hip_module_ctor, .Lfunc_end2-__hip_module_ctor
.cfi_endproc
# -- End function
.p2align 4, 0x90 # -- Begin function __hip_module_dtor
.type __hip_module_dtor,@function
__hip_module_dtor: # @__hip_module_dtor
.cfi_startproc
# %bb.0:
movq __hip_gpubin_handle(%rip), %rdi
testq %rdi, %rdi
je .LBB3_2
# %bb.1:
pushq %rax
.cfi_def_cfa_offset 16
callq __hipUnregisterFatBinary
movq $0, __hip_gpubin_handle(%rip)
addq $8, %rsp
.cfi_def_cfa_offset 8
.LBB3_2:
retq
.Lfunc_end3:
.size __hip_module_dtor, .Lfunc_end3-__hip_module_dtor
.cfi_endproc
# -- End function
.type _Z10matrix_AddPA32_iS0_S0_,@object # @_Z10matrix_AddPA32_iS0_S0_
.section .rodata,"a",@progbits
.globl _Z10matrix_AddPA32_iS0_S0_
.p2align 3, 0x0
_Z10matrix_AddPA32_iS0_S0_:
.quad _Z25__device_stub__matrix_AddPA32_iS0_S0_
.size _Z10matrix_AddPA32_iS0_S0_, 8
.type .L.str,@object # @.str
.section .rodata.str1.1,"aMS",@progbits,1
.L.str:
.asciz " "
.size .L.str, 2
.type .L__unnamed_1,@object # @0
.L__unnamed_1:
.asciz "_Z10matrix_AddPA32_iS0_S0_"
.size .L__unnamed_1, 27
.type __hip_fatbin_wrapper,@object # @__hip_fatbin_wrapper
.section .hipFatBinSegment,"a",@progbits
.p2align 3, 0x0
__hip_fatbin_wrapper:
.long 1212764230 # 0x48495046
.long 1 # 0x1
.quad __hip_fatbin
.quad 0
.size __hip_fatbin_wrapper, 24
.type __hip_gpubin_handle,@object # @__hip_gpubin_handle
.local __hip_gpubin_handle
.comm __hip_gpubin_handle,8,8
.section .init_array,"aw",@init_array
.p2align 3, 0x0
.quad __hip_module_ctor
.type __hip_cuid_,@object # @__hip_cuid_
.bss
.globl __hip_cuid_
__hip_cuid_:
.byte 0 # 0x0
.size __hip_cuid_, 1
.section ".linker-options","e",@llvm_linker_options
.ident "AMD clang version 18.0.0git (https://github.com/RadeonOpenCompute/llvm-project roc-6.3.2 25012 e5bf7e55c91490b07c49d8960fa7983d864936c4)"
.section ".note.GNU-stack","",@progbits
.addrsig
.addrsig_sym _Z25__device_stub__matrix_AddPA32_iS0_S0_
.addrsig_sym __hip_module_ctor
.addrsig_sym __hip_module_dtor
.addrsig_sym _Z10matrix_AddPA32_iS0_S0_
.addrsig_sym _ZSt4cout
.addrsig_sym __hip_fatbin
.addrsig_sym __hip_fatbin_wrapper
.addrsig_sym __hip_cuid_ |
You are a helpful coding assistant specialized in converting from CUDA device assembly to AMD device assembly. | code for sm_80
Function : _Z10matrix_AddPA32_iS0_S0_
.headerflags @"EF_CUDA_TEXMODE_UNIFIED EF_CUDA_64BIT_ADDRESS EF_CUDA_SM80 EF_CUDA_VIRTUAL_SM(EF_CUDA_SM80)"
/*0000*/ MOV R1, c[0x0][0x28] ; /* 0x00000a0000017a02 */
/* 0x000fe40000000f00 */
/*0010*/ S2R R6, SR_CTAID.X ; /* 0x0000000000067919 */
/* 0x000e220000002500 */
/*0020*/ HFMA2.MMA R7, -RZ, RZ, 0, 7.62939453125e-06 ; /* 0x00000080ff077435 */
/* 0x000fe200000001ff */
/*0030*/ ULDC.64 UR4, c[0x0][0x118] ; /* 0x0000460000047ab9 */
/* 0x000fe40000000a00 */
/*0040*/ S2R R9, SR_TID.X ; /* 0x0000000000097919 */
/* 0x000e680000002100 */
/*0050*/ BAR.SYNC.DEFER_BLOCKING 0x0 ; /* 0x0000000000007b1d */
/* 0x000fe60000010000 */
/*0060*/ IMAD.WIDE R2, R6, R7, c[0x0][0x160] ; /* 0x0000580006027625 */
/* 0x001fc800078e0207 */
/*0070*/ IMAD.WIDE R4, R6, R7, c[0x0][0x168] ; /* 0x00005a0006047625 */
/* 0x000fc800078e0207 */
/*0080*/ IMAD.WIDE R2, R9, 0x4, R2 ; /* 0x0000000409027825 */
/* 0x002fc800078e0202 */
/*0090*/ IMAD.WIDE R4, R9, 0x4, R4 ; /* 0x0000000409047825 */
/* 0x000fe400078e0204 */
/*00a0*/ LDG.E R2, [R2.64] ; /* 0x0000000402027981 */
/* 0x000ea8000c1e1900 */
/*00b0*/ LDG.E R5, [R4.64] ; /* 0x0000000404057981 */
/* 0x000ea2000c1e1900 */
/*00c0*/ IMAD.WIDE R6, R6, R7, c[0x0][0x170] ; /* 0x00005c0006067625 */
/* 0x000fcc00078e0207 */
/*00d0*/ IMAD.WIDE R6, R9, 0x4, R6 ; /* 0x0000000409067825 */
/* 0x000fe200078e0206 */
/*00e0*/ IADD3 R9, R2, R5, RZ ; /* 0x0000000502097210 */
/* 0x004fca0007ffe0ff */
/*00f0*/ STG.E [R6.64], R9 ; /* 0x0000000906007986 */
/* 0x000fe2000c101904 */
/*0100*/ EXIT ; /* 0x000000000000794d */
/* 0x000fea0003800000 */
/*0110*/ BRA 0x110; /* 0xfffffff000007947 */
/* 0x000fc0000383ffff */
/*0120*/ NOP; /* 0x0000000000007918 */
/* 0x000fc00000000000 */
/*0130*/ NOP; /* 0x0000000000007918 */
/* 0x000fc00000000000 */
/*0140*/ NOP; /* 0x0000000000007918 */
/* 0x000fc00000000000 */
/*0150*/ NOP; /* 0x0000000000007918 */
/* 0x000fc00000000000 */
/*0160*/ NOP; /* 0x0000000000007918 */
/* 0x000fc00000000000 */
/*0170*/ NOP; /* 0x0000000000007918 */
/* 0x000fc00000000000 */
/*0180*/ NOP; /* 0x0000000000007918 */
/* 0x000fc00000000000 */
/*0190*/ NOP; /* 0x0000000000007918 */
/* 0x000fc00000000000 */
/*01a0*/ NOP; /* 0x0000000000007918 */
/* 0x000fc00000000000 */
/*01b0*/ NOP; /* 0x0000000000007918 */
/* 0x000fc00000000000 */
/*01c0*/ NOP; /* 0x0000000000007918 */
/* 0x000fc00000000000 */
/*01d0*/ NOP; /* 0x0000000000007918 */
/* 0x000fc00000000000 */
/*01e0*/ NOP; /* 0x0000000000007918 */
/* 0x000fc00000000000 */
/*01f0*/ NOP; /* 0x0000000000007918 */
/* 0x000fc00000000000 */
.......... | .text
.amdgcn_target "amdgcn-amd-amdhsa--gfx1100"
.protected _Z10matrix_AddPA32_iS0_S0_
.globl _Z10matrix_AddPA32_iS0_S0_
.p2align 8
.type _Z10matrix_AddPA32_iS0_S0_,@function
_Z10matrix_AddPA32_iS0_S0_:
s_clause 0x1
s_load_b128 s[4:7], s[0:1], 0x0
s_load_b64 s[0:1], s[0:1], 0x10
s_mov_b32 s2, s15
s_ashr_i32 s3, s15, 31
v_lshlrev_b32_e32 v0, 2, v0
s_lshl_b64 s[2:3], s[2:3], 7
s_waitcnt lgkmcnt(0)
s_barrier
buffer_gl0_inv
s_add_u32 s4, s4, s2
s_addc_u32 s5, s5, s3
s_add_u32 s6, s6, s2
s_addc_u32 s7, s7, s3
s_clause 0x1
global_load_b32 v1, v0, s[4:5]
global_load_b32 v2, v0, s[6:7]
s_add_u32 s0, s0, s2
s_addc_u32 s1, s1, s3
s_waitcnt vmcnt(0)
v_add_nc_u32_e32 v1, v2, v1
global_store_b32 v0, v1, s[0:1]
s_nop 0
s_sendmsg sendmsg(MSG_DEALLOC_VGPRS)
s_endpgm
.section .rodata,"a",@progbits
.p2align 6, 0x0
.amdhsa_kernel _Z10matrix_AddPA32_iS0_S0_
.amdhsa_group_segment_fixed_size 0
.amdhsa_private_segment_fixed_size 0
.amdhsa_kernarg_size 24
.amdhsa_user_sgpr_count 15
.amdhsa_user_sgpr_dispatch_ptr 0
.amdhsa_user_sgpr_queue_ptr 0
.amdhsa_user_sgpr_kernarg_segment_ptr 1
.amdhsa_user_sgpr_dispatch_id 0
.amdhsa_user_sgpr_private_segment_size 0
.amdhsa_wavefront_size32 1
.amdhsa_uses_dynamic_stack 0
.amdhsa_enable_private_segment 0
.amdhsa_system_sgpr_workgroup_id_x 1
.amdhsa_system_sgpr_workgroup_id_y 0
.amdhsa_system_sgpr_workgroup_id_z 0
.amdhsa_system_sgpr_workgroup_info 0
.amdhsa_system_vgpr_workitem_id 0
.amdhsa_next_free_vgpr 3
.amdhsa_next_free_sgpr 16
.amdhsa_reserve_vcc 0
.amdhsa_float_round_mode_32 0
.amdhsa_float_round_mode_16_64 0
.amdhsa_float_denorm_mode_32 3
.amdhsa_float_denorm_mode_16_64 3
.amdhsa_dx10_clamp 1
.amdhsa_ieee_mode 1
.amdhsa_fp16_overflow 0
.amdhsa_workgroup_processor_mode 1
.amdhsa_memory_ordered 1
.amdhsa_forward_progress 0
.amdhsa_shared_vgpr_count 0
.amdhsa_exception_fp_ieee_invalid_op 0
.amdhsa_exception_fp_denorm_src 0
.amdhsa_exception_fp_ieee_div_zero 0
.amdhsa_exception_fp_ieee_overflow 0
.amdhsa_exception_fp_ieee_underflow 0
.amdhsa_exception_fp_ieee_inexact 0
.amdhsa_exception_int_div_zero 0
.end_amdhsa_kernel
.text
.Lfunc_end0:
.size _Z10matrix_AddPA32_iS0_S0_, .Lfunc_end0-_Z10matrix_AddPA32_iS0_S0_
.section .AMDGPU.csdata,"",@progbits
.text
.p2alignl 7, 3214868480
.fill 96, 4, 3214868480
.type __hip_cuid_,@object
.section .bss,"aw",@nobits
.globl __hip_cuid_
__hip_cuid_:
.byte 0
.size __hip_cuid_, 1
.ident "AMD clang version 18.0.0git (https://github.com/RadeonOpenCompute/llvm-project roc-6.3.2 25012 e5bf7e55c91490b07c49d8960fa7983d864936c4)"
.section ".note.GNU-stack","",@progbits
.addrsig
.addrsig_sym __hip_cuid_
.amdgpu_metadata
---
amdhsa.kernels:
- .args:
- .address_space: global
.offset: 0
.size: 8
.value_kind: global_buffer
- .address_space: global
.offset: 8
.size: 8
.value_kind: global_buffer
- .address_space: global
.offset: 16
.size: 8
.value_kind: global_buffer
.group_segment_fixed_size: 0
.kernarg_segment_align: 8
.kernarg_segment_size: 24
.language: OpenCL C
.language_version:
- 2
- 0
.max_flat_workgroup_size: 1024
.name: _Z10matrix_AddPA32_iS0_S0_
.private_segment_fixed_size: 0
.sgpr_count: 16
.sgpr_spill_count: 0
.symbol: _Z10matrix_AddPA32_iS0_S0_.kd
.uniform_work_group_size: 1
.uses_dynamic_stack: false
.vgpr_count: 3
.vgpr_spill_count: 0
.wavefront_size: 32
.workgroup_processor_mode: 1
amdhsa.target: amdgcn-amd-amdhsa--gfx1100
amdhsa.version:
- 1
- 2
...
.end_amdgpu_metadata |
You are a helpful coding assistant specialized in converting from CUDA host assembly to AMD host assembly. | .file "tmpxft_001282d1_00000000-6_matrix_addition.cudafe1.cpp"
.text
#APP
.globl _ZSt21ios_base_library_initv
#NO_APP
.type _ZL26__cudaUnregisterBinaryUtilv, @function
_ZL26__cudaUnregisterBinaryUtilv:
.LFB3672:
.cfi_startproc
endbr64
subq $8, %rsp
.cfi_def_cfa_offset 16
movq _ZL20__cudaFatCubinHandle(%rip), %rdi
call __cudaUnregisterFatBinary@PLT
addq $8, %rsp
.cfi_def_cfa_offset 8
ret
.cfi_endproc
.LFE3672:
.size _ZL26__cudaUnregisterBinaryUtilv, .-_ZL26__cudaUnregisterBinaryUtilv
.globl _Z40__device_stub__Z10matrix_AddPA32_iS0_S0_PA32_iS0_S0_
.type _Z40__device_stub__Z10matrix_AddPA32_iS0_S0_PA32_iS0_S0_, @function
_Z40__device_stub__Z10matrix_AddPA32_iS0_S0_PA32_iS0_S0_:
.LFB3694:
.cfi_startproc
endbr64
subq $136, %rsp
.cfi_def_cfa_offset 144
movq %rdi, 24(%rsp)
movq %rsi, 16(%rsp)
movq %rdx, 8(%rsp)
movq %fs:40, %rax
movq %rax, 120(%rsp)
xorl %eax, %eax
leaq 24(%rsp), %rax
movq %rax, 96(%rsp)
leaq 16(%rsp), %rax
movq %rax, 104(%rsp)
leaq 8(%rsp), %rax
movq %rax, 112(%rsp)
movl $1, 48(%rsp)
movl $1, 52(%rsp)
movl $1, 56(%rsp)
movl $1, 60(%rsp)
movl $1, 64(%rsp)
movl $1, 68(%rsp)
leaq 40(%rsp), %rcx
leaq 32(%rsp), %rdx
leaq 60(%rsp), %rsi
leaq 48(%rsp), %rdi
call __cudaPopCallConfiguration@PLT
testl %eax, %eax
je .L7
.L3:
movq 120(%rsp), %rax
subq %fs:40, %rax
jne .L8
addq $136, %rsp
.cfi_remember_state
.cfi_def_cfa_offset 8
ret
.L7:
.cfi_restore_state
pushq 40(%rsp)
.cfi_def_cfa_offset 152
pushq 40(%rsp)
.cfi_def_cfa_offset 160
leaq 112(%rsp), %r9
movq 76(%rsp), %rcx
movl 84(%rsp), %r8d
movq 64(%rsp), %rsi
movl 72(%rsp), %edx
leaq _Z10matrix_AddPA32_iS0_S0_(%rip), %rdi
call cudaLaunchKernel@PLT
addq $16, %rsp
.cfi_def_cfa_offset 144
jmp .L3
.L8:
call __stack_chk_fail@PLT
.cfi_endproc
.LFE3694:
.size _Z40__device_stub__Z10matrix_AddPA32_iS0_S0_PA32_iS0_S0_, .-_Z40__device_stub__Z10matrix_AddPA32_iS0_S0_PA32_iS0_S0_
.globl _Z10matrix_AddPA32_iS0_S0_
.type _Z10matrix_AddPA32_iS0_S0_, @function
_Z10matrix_AddPA32_iS0_S0_:
.LFB3695:
.cfi_startproc
endbr64
subq $8, %rsp
.cfi_def_cfa_offset 16
call _Z40__device_stub__Z10matrix_AddPA32_iS0_S0_PA32_iS0_S0_
addq $8, %rsp
.cfi_def_cfa_offset 8
ret
.cfi_endproc
.LFE3695:
.size _Z10matrix_AddPA32_iS0_S0_, .-_Z10matrix_AddPA32_iS0_S0_
.section .rodata.str1.1,"aMS",@progbits,1
.LC0:
.string " "
.text
.globl main
.type main, @function
main:
.LFB3669:
.cfi_startproc
endbr64
pushq %r14
.cfi_def_cfa_offset 16
.cfi_offset 14, -16
pushq %r13
.cfi_def_cfa_offset 24
.cfi_offset 13, -24
pushq %r12
.cfi_def_cfa_offset 32
.cfi_offset 12, -32
pushq %rbp
.cfi_def_cfa_offset 40
.cfi_offset 6, -40
pushq %rbx
.cfi_def_cfa_offset 48
.cfi_offset 3, -48
subq $4096, %rsp
.cfi_def_cfa_offset 4144
orq $0, (%rsp)
subq $4096, %rsp
.cfi_def_cfa_offset 8240
orq $0, (%rsp)
subq $4096, %rsp
.cfi_def_cfa_offset 12336
orq $0, (%rsp)
subq $64, %rsp
.cfi_def_cfa_offset 12400
movq %fs:40, %rax
movq %rax, 12344(%rsp)
xorl %eax, %eax
leaq 48(%rsp), %r8
leaq 4144(%rsp), %rdi
movl $0, %esi
movl $0, %r9d
.L12:
movl %r9d, %edx
movl $0, %eax
.L13:
leal (%rsi,%rax), %ecx
movl %ecx, (%r8,%rax,4)
movl %edx, (%rdi,%rax,4)
addq $1, %rax
addl $2, %edx
cmpq $32, %rax
jne .L13
addl $1, %r9d
addl $2, %esi
subq $-128, %r8
subq $-128, %rdi
cmpl $32, %r9d
jne .L12
movq %rsp, %rdi
movl $4096, %esi
call cudaMalloc@PLT
leaq 8(%rsp), %rdi
movl $4096, %esi
call cudaMalloc@PLT
leaq 16(%rsp), %rdi
movl $4096, %esi
call cudaMalloc@PLT
leaq 48(%rsp), %rsi
movl $1, %ecx
movl $4096, %edx
movq (%rsp), %rdi
call cudaMemcpy@PLT
leaq 4144(%rsp), %rsi
movl $1, %ecx
movl $4096, %edx
movq 8(%rsp), %rdi
call cudaMemcpy@PLT
movl $32, 36(%rsp)
movl $1, 40(%rsp)
movl $1, 44(%rsp)
movl $32, 24(%rsp)
movl $1, 28(%rsp)
movl $1, 32(%rsp)
movl $0, %r9d
movl $0, %r8d
movq 36(%rsp), %rdx
movl $1, %ecx
movq 24(%rsp), %rdi
movl $1, %esi
call __cudaPushCallConfiguration@PLT
testl %eax, %eax
je .L27
.L15:
leaq 8240(%rsp), %rdi
movl $2, %ecx
movl $4096, %edx
movq 16(%rsp), %rsi
call cudaMemcpy@PLT
leaq 8368(%rsp), %rbp
leaq 12464(%rsp), %r14
leaq _ZSt4cout(%rip), %r12
leaq .LC0(%rip), %r13
jmp .L16
.L27:
movq 16(%rsp), %rdx
movq 8(%rsp), %rsi
movq (%rsp), %rdi
call _Z40__device_stub__Z10matrix_AddPA32_iS0_S0_PA32_iS0_S0_
jmp .L15
.L29:
movq 12344(%rsp), %rax
subq %fs:40, %rax
jne .L28
call _ZSt16__throw_bad_castv@PLT
.L28:
call __stack_chk_fail@PLT
.L20:
movq %rbx, %rdi
call _ZNKSt5ctypeIcE13_M_widen_initEv@PLT
movq (%rbx), %rax
movl $10, %esi
movq %rbx, %rdi
call *48(%rax)
movl %eax, %esi
.L21:
movsbl %sil, %esi
movq %r12, %rdi
call _ZNSo3putEc@PLT
movq %rax, %rdi
call _ZNSo5flushEv@PLT
subq $-128, %rbp
cmpq %r14, %rbp
je .L22
.L16:
leaq -128(%rbp), %rbx
.L17:
movl (%rbx), %esi
movq %r12, %rdi
call _ZNSolsEi@PLT
movq %rax, %rdi
movl $1, %edx
movq %r13, %rsi
call _ZSt16__ostream_insertIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_PKS3_l@PLT
addq $4, %rbx
cmpq %rbp, %rbx
jne .L17
movq (%r12), %rax
movq -24(%rax), %rax
movq 240(%r12,%rax), %rbx
testq %rbx, %rbx
je .L29
cmpb $0, 56(%rbx)
je .L20
movzbl 67(%rbx), %esi
jmp .L21
.L22:
movq (%rsp), %rdi
call cudaFree@PLT
movq 8(%rsp), %rdi
call cudaFree@PLT
movq 16(%rsp), %rdi
call cudaFree@PLT
movq 12344(%rsp), %rax
subq %fs:40, %rax
jne .L30
movl $0, %eax
addq $12352, %rsp
.cfi_remember_state
.cfi_def_cfa_offset 48
popq %rbx
.cfi_def_cfa_offset 40
popq %rbp
.cfi_def_cfa_offset 32
popq %r12
.cfi_def_cfa_offset 24
popq %r13
.cfi_def_cfa_offset 16
popq %r14
.cfi_def_cfa_offset 8
ret
.L30:
.cfi_restore_state
call __stack_chk_fail@PLT
.cfi_endproc
.LFE3669:
.size main, .-main
.section .rodata.str1.1
.LC1:
.string "_Z10matrix_AddPA32_iS0_S0_"
.text
.type _ZL24__sti____cudaRegisterAllv, @function
_ZL24__sti____cudaRegisterAllv:
.LFB3697:
.cfi_startproc
endbr64
subq $8, %rsp
.cfi_def_cfa_offset 16
leaq _ZL15__fatDeviceText(%rip), %rdi
call __cudaRegisterFatBinary@PLT
movq %rax, %rdi
movq %rax, _ZL20__cudaFatCubinHandle(%rip)
pushq $0
.cfi_def_cfa_offset 24
pushq $0
.cfi_def_cfa_offset 32
pushq $0
.cfi_def_cfa_offset 40
pushq $0
.cfi_def_cfa_offset 48
movl $0, %r9d
movl $-1, %r8d
leaq .LC1(%rip), %rdx
movq %rdx, %rcx
leaq _Z10matrix_AddPA32_iS0_S0_(%rip), %rsi
call __cudaRegisterFunction@PLT
addq $32, %rsp
.cfi_def_cfa_offset 16
movq _ZL20__cudaFatCubinHandle(%rip), %rdi
call __cudaRegisterFatBinaryEnd@PLT
leaq _ZL26__cudaUnregisterBinaryUtilv(%rip), %rdi
call atexit@PLT
addq $8, %rsp
.cfi_def_cfa_offset 8
ret
.cfi_endproc
.LFE3697:
.size _ZL24__sti____cudaRegisterAllv, .-_ZL24__sti____cudaRegisterAllv
.section .init_array,"aw"
.align 8
.quad _ZL24__sti____cudaRegisterAllv
.section .nvFatBinSegment,"aw"
.align 8
.type _ZL15__fatDeviceText, @object
.size _ZL15__fatDeviceText, 24
_ZL15__fatDeviceText:
.long 1180844977
.long 1
.quad fatbinData
.quad 0
.local _ZL20__cudaFatCubinHandle
.comm _ZL20__cudaFatCubinHandle,8,8
.ident "GCC: (Ubuntu 13.3.0-6ubuntu2~24.04) 13.3.0"
.section .note.GNU-stack,"",@progbits
.section .note.gnu.property,"a"
.align 8
.long 1f - 0f
.long 4f - 1f
.long 5
0:
.string "GNU"
1:
.align 8
.long 0xc0000002
.long 3f - 2f
2:
.long 0x3
3:
.align 8
4: | .text
.file "matrix_addition.hip"
# Start of file scope inline assembly
.globl _ZSt21ios_base_library_initv
# End of file scope inline assembly
.globl _Z25__device_stub__matrix_AddPA32_iS0_S0_ # -- Begin function _Z25__device_stub__matrix_AddPA32_iS0_S0_
.p2align 4, 0x90
.type _Z25__device_stub__matrix_AddPA32_iS0_S0_,@function
_Z25__device_stub__matrix_AddPA32_iS0_S0_: # @_Z25__device_stub__matrix_AddPA32_iS0_S0_
.cfi_startproc
# %bb.0:
subq $104, %rsp
.cfi_def_cfa_offset 112
movq %rdi, 72(%rsp)
movq %rsi, 64(%rsp)
movq %rdx, 56(%rsp)
leaq 72(%rsp), %rax
movq %rax, 80(%rsp)
leaq 64(%rsp), %rax
movq %rax, 88(%rsp)
leaq 56(%rsp), %rax
movq %rax, 96(%rsp)
leaq 40(%rsp), %rdi
leaq 24(%rsp), %rsi
leaq 16(%rsp), %rdx
leaq 8(%rsp), %rcx
callq __hipPopCallConfiguration
movq 40(%rsp), %rsi
movl 48(%rsp), %edx
movq 24(%rsp), %rcx
movl 32(%rsp), %r8d
leaq 80(%rsp), %r9
movl $_Z10matrix_AddPA32_iS0_S0_, %edi
pushq 8(%rsp)
.cfi_adjust_cfa_offset 8
pushq 24(%rsp)
.cfi_adjust_cfa_offset 8
callq hipLaunchKernel
addq $120, %rsp
.cfi_adjust_cfa_offset -120
retq
.Lfunc_end0:
.size _Z25__device_stub__matrix_AddPA32_iS0_S0_, .Lfunc_end0-_Z25__device_stub__matrix_AddPA32_iS0_S0_
.cfi_endproc
# -- End function
.globl main # -- Begin function main
.p2align 4, 0x90
.type main,@function
main: # @main
.cfi_startproc
# %bb.0:
pushq %r15
.cfi_def_cfa_offset 16
pushq %r14
.cfi_def_cfa_offset 24
pushq %rbx
.cfi_def_cfa_offset 32
subq $12384, %rsp # imm = 0x3060
.cfi_def_cfa_offset 12416
.cfi_offset %rbx, -32
.cfi_offset %r14, -24
.cfi_offset %r15, -16
xorl %eax, %eax
leaq 8288(%rsp), %rcx
leaq 4192(%rsp), %rdx
xorl %esi, %esi
.p2align 4, 0x90
.LBB1_1: # %.preheader27
# =>This Loop Header: Depth=1
# Child Loop BB1_2 Depth 2
movl %eax, %edi
xorl %r8d, %r8d
.p2align 4, 0x90
.LBB1_2: # Parent Loop BB1_1 Depth=1
# => This Inner Loop Header: Depth=2
movl %edi, (%rcx,%r8,2)
leal (%rsi,%r8), %r9d
movl %r9d, (%rdx,%r8,2)
addq $2, %r8
incl %edi
cmpq $64, %r8
jne .LBB1_2
# %bb.3: # in Loop: Header=BB1_1 Depth=1
incq %rsi
addl $2, %eax
subq $-128, %rcx
subq $-128, %rdx
cmpq $32, %rsi
jne .LBB1_1
# %bb.4:
leaq 16(%rsp), %rdi
movl $4096, %esi # imm = 0x1000
callq hipMalloc
leaq 8(%rsp), %rdi
movl $4096, %esi # imm = 0x1000
callq hipMalloc
movq %rsp, %rdi
movl $4096, %esi # imm = 0x1000
callq hipMalloc
movq 16(%rsp), %rdi
leaq 8288(%rsp), %rsi
movl $4096, %edx # imm = 0x1000
movl $1, %ecx
callq hipMemcpy
movq 8(%rsp), %rdi
leaq 4192(%rsp), %rsi
movl $4096, %edx # imm = 0x1000
movl $1, %ecx
callq hipMemcpy
movabsq $4294967328, %rdi # imm = 0x100000020
movl $1, %esi
movq %rdi, %rdx
movl $1, %ecx
xorl %r8d, %r8d
xorl %r9d, %r9d
callq __hipPushCallConfiguration
testl %eax, %eax
jne .LBB1_6
# %bb.5:
movq 16(%rsp), %rax
movq 8(%rsp), %rcx
movq (%rsp), %rdx
movq %rax, 88(%rsp)
movq %rcx, 80(%rsp)
movq %rdx, 72(%rsp)
leaq 88(%rsp), %rax
movq %rax, 96(%rsp)
leaq 80(%rsp), %rax
movq %rax, 104(%rsp)
leaq 72(%rsp), %rax
movq %rax, 112(%rsp)
leaq 56(%rsp), %rdi
leaq 40(%rsp), %rsi
leaq 32(%rsp), %rdx
leaq 24(%rsp), %rcx
callq __hipPopCallConfiguration
movq 56(%rsp), %rsi
movl 64(%rsp), %edx
movq 40(%rsp), %rcx
movl 48(%rsp), %r8d
leaq 96(%rsp), %r9
movl $_Z10matrix_AddPA32_iS0_S0_, %edi
pushq 24(%rsp)
.cfi_adjust_cfa_offset 8
pushq 40(%rsp)
.cfi_adjust_cfa_offset 8
callq hipLaunchKernel
addq $16, %rsp
.cfi_adjust_cfa_offset -16
.LBB1_6:
movq (%rsp), %rsi
leaq 96(%rsp), %rbx
movl $4096, %edx # imm = 0x1000
movq %rbx, %rdi
movl $2, %ecx
callq hipMemcpy
xorl %r15d, %r15d
jmp .LBB1_7
.p2align 4, 0x90
.LBB1_12: # in Loop: Header=BB1_7 Depth=1
movq %r14, %rdi
callq _ZNKSt5ctypeIcE13_M_widen_initEv
movq (%r14), %rax
movq %r14, %rdi
movl $10, %esi
callq *48(%rax)
.LBB1_13: # %_ZSt4endlIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_.exit
# in Loop: Header=BB1_7 Depth=1
movsbl %al, %esi
movl $_ZSt4cout, %edi
callq _ZNSo3putEc
movq %rax, %rdi
callq _ZNSo5flushEv
incq %r15
subq $-128, %rbx
cmpq $32, %r15
je .LBB1_14
.LBB1_7: # %.preheader
# =>This Loop Header: Depth=1
# Child Loop BB1_8 Depth 2
xorl %r14d, %r14d
.p2align 4, 0x90
.LBB1_8: # Parent Loop BB1_7 Depth=1
# => This Inner Loop Header: Depth=2
movl (%rbx,%r14,4), %esi
movl $_ZSt4cout, %edi
callq _ZNSolsEi
movl $.L.str, %esi
movl $1, %edx
movq %rax, %rdi
callq _ZSt16__ostream_insertIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_PKS3_l
incq %r14
cmpq $32, %r14
jne .LBB1_8
# %bb.9: # in Loop: Header=BB1_7 Depth=1
movq _ZSt4cout(%rip), %rax
movq -24(%rax), %rax
movq _ZSt4cout+240(%rax), %r14
testq %r14, %r14
je .LBB1_15
# %bb.10: # %_ZSt13__check_facetISt5ctypeIcEERKT_PS3_.exit.i.i
# in Loop: Header=BB1_7 Depth=1
cmpb $0, 56(%r14)
je .LBB1_12
# %bb.11: # in Loop: Header=BB1_7 Depth=1
movzbl 67(%r14), %eax
jmp .LBB1_13
.LBB1_14:
movq 16(%rsp), %rdi
callq hipFree
movq 8(%rsp), %rdi
callq hipFree
movq (%rsp), %rdi
callq hipFree
xorl %eax, %eax
addq $12384, %rsp # imm = 0x3060
.cfi_def_cfa_offset 32
popq %rbx
.cfi_def_cfa_offset 24
popq %r14
.cfi_def_cfa_offset 16
popq %r15
.cfi_def_cfa_offset 8
retq
.LBB1_15:
.cfi_def_cfa_offset 12416
callq _ZSt16__throw_bad_castv
.Lfunc_end1:
.size main, .Lfunc_end1-main
.cfi_endproc
# -- End function
.p2align 4, 0x90 # -- Begin function __hip_module_ctor
.type __hip_module_ctor,@function
__hip_module_ctor: # @__hip_module_ctor
.cfi_startproc
# %bb.0:
subq $40, %rsp
.cfi_def_cfa_offset 48
cmpq $0, __hip_gpubin_handle(%rip)
jne .LBB2_2
# %bb.1:
movl $__hip_fatbin_wrapper, %edi
callq __hipRegisterFatBinary
movq %rax, __hip_gpubin_handle(%rip)
.LBB2_2:
movq __hip_gpubin_handle(%rip), %rdi
xorps %xmm0, %xmm0
movups %xmm0, 16(%rsp)
movups %xmm0, (%rsp)
movl $_Z10matrix_AddPA32_iS0_S0_, %esi
movl $.L__unnamed_1, %edx
movl $.L__unnamed_1, %ecx
movl $-1, %r8d
xorl %r9d, %r9d
callq __hipRegisterFunction
movl $__hip_module_dtor, %edi
addq $40, %rsp
.cfi_def_cfa_offset 8
jmp atexit # TAILCALL
.Lfunc_end2:
.size __hip_module_ctor, .Lfunc_end2-__hip_module_ctor
.cfi_endproc
# -- End function
.p2align 4, 0x90 # -- Begin function __hip_module_dtor
.type __hip_module_dtor,@function
__hip_module_dtor: # @__hip_module_dtor
.cfi_startproc
# %bb.0:
movq __hip_gpubin_handle(%rip), %rdi
testq %rdi, %rdi
je .LBB3_2
# %bb.1:
pushq %rax
.cfi_def_cfa_offset 16
callq __hipUnregisterFatBinary
movq $0, __hip_gpubin_handle(%rip)
addq $8, %rsp
.cfi_def_cfa_offset 8
.LBB3_2:
retq
.Lfunc_end3:
.size __hip_module_dtor, .Lfunc_end3-__hip_module_dtor
.cfi_endproc
# -- End function
.type _Z10matrix_AddPA32_iS0_S0_,@object # @_Z10matrix_AddPA32_iS0_S0_
.section .rodata,"a",@progbits
.globl _Z10matrix_AddPA32_iS0_S0_
.p2align 3, 0x0
_Z10matrix_AddPA32_iS0_S0_:
.quad _Z25__device_stub__matrix_AddPA32_iS0_S0_
.size _Z10matrix_AddPA32_iS0_S0_, 8
.type .L.str,@object # @.str
.section .rodata.str1.1,"aMS",@progbits,1
.L.str:
.asciz " "
.size .L.str, 2
.type .L__unnamed_1,@object # @0
.L__unnamed_1:
.asciz "_Z10matrix_AddPA32_iS0_S0_"
.size .L__unnamed_1, 27
.type __hip_fatbin_wrapper,@object # @__hip_fatbin_wrapper
.section .hipFatBinSegment,"a",@progbits
.p2align 3, 0x0
__hip_fatbin_wrapper:
.long 1212764230 # 0x48495046
.long 1 # 0x1
.quad __hip_fatbin
.quad 0
.size __hip_fatbin_wrapper, 24
.type __hip_gpubin_handle,@object # @__hip_gpubin_handle
.local __hip_gpubin_handle
.comm __hip_gpubin_handle,8,8
.section .init_array,"aw",@init_array
.p2align 3, 0x0
.quad __hip_module_ctor
.type __hip_cuid_,@object # @__hip_cuid_
.bss
.globl __hip_cuid_
__hip_cuid_:
.byte 0 # 0x0
.size __hip_cuid_, 1
.section ".linker-options","e",@llvm_linker_options
.ident "AMD clang version 18.0.0git (https://github.com/RadeonOpenCompute/llvm-project roc-6.3.2 25012 e5bf7e55c91490b07c49d8960fa7983d864936c4)"
.section ".note.GNU-stack","",@progbits
.addrsig
.addrsig_sym _Z25__device_stub__matrix_AddPA32_iS0_S0_
.addrsig_sym __hip_module_ctor
.addrsig_sym __hip_module_dtor
.addrsig_sym _Z10matrix_AddPA32_iS0_S0_
.addrsig_sym _ZSt4cout
.addrsig_sym __hip_fatbin
.addrsig_sym __hip_fatbin_wrapper
.addrsig_sym __hip_cuid_ |
You are a helpful coding assistant specialized in converting CUDA source code to CUDA device assembly. | #include <iostream>
#include <chrono>
using namespace std;
using namespace std::chrono; | code for sm_80 |
You are a helpful coding assistant specialized in converting CUDA source code to CUDA host assembly. | #include <iostream>
#include <chrono>
using namespace std;
using namespace std::chrono; | .file "tmpxft_00050224_00000000-6_mul_vec_matrix.cudafe1.cpp"
.text
#APP
.globl _ZSt21ios_base_library_initv
#NO_APP
.type _ZL26__cudaUnregisterBinaryUtilv, @function
_ZL26__cudaUnregisterBinaryUtilv:
.LFB3770:
.cfi_startproc
endbr64
subq $8, %rsp
.cfi_def_cfa_offset 16
movq _ZL20__cudaFatCubinHandle(%rip), %rdi
call __cudaUnregisterFatBinary@PLT
addq $8, %rsp
.cfi_def_cfa_offset 8
ret
.cfi_endproc
.LFE3770:
.size _ZL26__cudaUnregisterBinaryUtilv, .-_ZL26__cudaUnregisterBinaryUtilv
.type _ZL24__sti____cudaRegisterAllv, @function
_ZL24__sti____cudaRegisterAllv:
.LFB3793:
.cfi_startproc
endbr64
subq $8, %rsp
.cfi_def_cfa_offset 16
leaq _ZL15__fatDeviceText(%rip), %rdi
call __cudaRegisterFatBinary@PLT
movq %rax, %rdi
movq %rax, _ZL20__cudaFatCubinHandle(%rip)
call __cudaRegisterFatBinaryEnd@PLT
leaq _ZL26__cudaUnregisterBinaryUtilv(%rip), %rdi
call atexit@PLT
addq $8, %rsp
.cfi_def_cfa_offset 8
ret
.cfi_endproc
.LFE3793:
.size _ZL24__sti____cudaRegisterAllv, .-_ZL24__sti____cudaRegisterAllv
.section .init_array,"aw"
.align 8
.quad _ZL24__sti____cudaRegisterAllv
.section .nvFatBinSegment,"aw"
.align 8
.type _ZL15__fatDeviceText, @object
.size _ZL15__fatDeviceText, 24
_ZL15__fatDeviceText:
.long 1180844977
.long 1
.quad fatbinData
.quad 0
.local _ZL20__cudaFatCubinHandle
.comm _ZL20__cudaFatCubinHandle,8,8
.ident "GCC: (Ubuntu 13.3.0-6ubuntu2~24.04) 13.3.0"
.section .note.GNU-stack,"",@progbits
.section .note.gnu.property,"a"
.align 8
.long 1f - 0f
.long 4f - 1f
.long 5
0:
.string "GNU"
1:
.align 8
.long 0xc0000002
.long 3f - 2f
2:
.long 0x3
3:
.align 8
4: |
You are a helpful coding assistant specialized in converting CUDA source code to HIP/AMD source code. | #include <iostream>
#include <chrono>
using namespace std;
using namespace std::chrono; | #include <hip/hip_runtime.h>
#include <iostream>
#include <chrono>
using namespace std;
using namespace std::chrono; |
You are a helpful coding assistant specialized in converting HIP source code to AMD device assembly. | #include <hip/hip_runtime.h>
#include <iostream>
#include <chrono>
using namespace std;
using namespace std::chrono; | .text
.p2alignl 7, 3214868480
.fill 96, 4, 3214868480
.type __hip_cuid_,@object
.section .bss,"aw",@nobits
.globl __hip_cuid_
__hip_cuid_:
.byte 0
.size __hip_cuid_, 1
.ident "AMD clang version 18.0.0git (https://github.com/RadeonOpenCompute/llvm-project roc-6.3.2 25012 e5bf7e55c91490b07c49d8960fa7983d864936c4)"
.section ".note.GNU-stack","",@progbits
.addrsig
.addrsig_sym __hip_cuid_
.amdgcn_target "amdgcn-amd-amdhsa--gfx1100"
.amdgpu_metadata
---
amdhsa.kernels: []
amdhsa.target: amdgcn-amd-amdhsa--gfx1100
amdhsa.version:
- 1
- 2
...
.end_amdgpu_metadata |
You are a helpful coding assistant specialized in converting HIP source code to AMD host assembly. | #include <hip/hip_runtime.h>
#include <iostream>
#include <chrono>
using namespace std;
using namespace std::chrono; | .text
.file "mul_vec_matrix.hip"
# Start of file scope inline assembly
.globl _ZSt21ios_base_library_initv
# End of file scope inline assembly
.type __hip_cuid_,@object # @__hip_cuid_
.bss
.globl __hip_cuid_
__hip_cuid_:
.byte 0 # 0x0
.size __hip_cuid_, 1
.section ".linker-options","e",@llvm_linker_options
.ident "AMD clang version 18.0.0git (https://github.com/RadeonOpenCompute/llvm-project roc-6.3.2 25012 e5bf7e55c91490b07c49d8960fa7983d864936c4)"
.section ".note.GNU-stack","",@progbits
.addrsig
.addrsig_sym __hip_cuid_ |
You are a helpful coding assistant specialized in converting from CUDA device assembly to AMD device assembly. | code for sm_80 | .text
.p2alignl 7, 3214868480
.fill 96, 4, 3214868480
.type __hip_cuid_,@object
.section .bss,"aw",@nobits
.globl __hip_cuid_
__hip_cuid_:
.byte 0
.size __hip_cuid_, 1
.ident "AMD clang version 18.0.0git (https://github.com/RadeonOpenCompute/llvm-project roc-6.3.2 25012 e5bf7e55c91490b07c49d8960fa7983d864936c4)"
.section ".note.GNU-stack","",@progbits
.addrsig
.addrsig_sym __hip_cuid_
.amdgcn_target "amdgcn-amd-amdhsa--gfx1100"
.amdgpu_metadata
---
amdhsa.kernels: []
amdhsa.target: amdgcn-amd-amdhsa--gfx1100
amdhsa.version:
- 1
- 2
...
.end_amdgpu_metadata |
You are a helpful coding assistant specialized in converting from CUDA host assembly to AMD host assembly. | .file "tmpxft_00050224_00000000-6_mul_vec_matrix.cudafe1.cpp"
.text
#APP
.globl _ZSt21ios_base_library_initv
#NO_APP
.type _ZL26__cudaUnregisterBinaryUtilv, @function
_ZL26__cudaUnregisterBinaryUtilv:
.LFB3770:
.cfi_startproc
endbr64
subq $8, %rsp
.cfi_def_cfa_offset 16
movq _ZL20__cudaFatCubinHandle(%rip), %rdi
call __cudaUnregisterFatBinary@PLT
addq $8, %rsp
.cfi_def_cfa_offset 8
ret
.cfi_endproc
.LFE3770:
.size _ZL26__cudaUnregisterBinaryUtilv, .-_ZL26__cudaUnregisterBinaryUtilv
.type _ZL24__sti____cudaRegisterAllv, @function
_ZL24__sti____cudaRegisterAllv:
.LFB3793:
.cfi_startproc
endbr64
subq $8, %rsp
.cfi_def_cfa_offset 16
leaq _ZL15__fatDeviceText(%rip), %rdi
call __cudaRegisterFatBinary@PLT
movq %rax, %rdi
movq %rax, _ZL20__cudaFatCubinHandle(%rip)
call __cudaRegisterFatBinaryEnd@PLT
leaq _ZL26__cudaUnregisterBinaryUtilv(%rip), %rdi
call atexit@PLT
addq $8, %rsp
.cfi_def_cfa_offset 8
ret
.cfi_endproc
.LFE3793:
.size _ZL24__sti____cudaRegisterAllv, .-_ZL24__sti____cudaRegisterAllv
.section .init_array,"aw"
.align 8
.quad _ZL24__sti____cudaRegisterAllv
.section .nvFatBinSegment,"aw"
.align 8
.type _ZL15__fatDeviceText, @object
.size _ZL15__fatDeviceText, 24
_ZL15__fatDeviceText:
.long 1180844977
.long 1
.quad fatbinData
.quad 0
.local _ZL20__cudaFatCubinHandle
.comm _ZL20__cudaFatCubinHandle,8,8
.ident "GCC: (Ubuntu 13.3.0-6ubuntu2~24.04) 13.3.0"
.section .note.GNU-stack,"",@progbits
.section .note.gnu.property,"a"
.align 8
.long 1f - 0f
.long 4f - 1f
.long 5
0:
.string "GNU"
1:
.align 8
.long 0xc0000002
.long 3f - 2f
2:
.long 0x3
3:
.align 8
4: | .text
.file "mul_vec_matrix.hip"
# Start of file scope inline assembly
.globl _ZSt21ios_base_library_initv
# End of file scope inline assembly
.type __hip_cuid_,@object # @__hip_cuid_
.bss
.globl __hip_cuid_
__hip_cuid_:
.byte 0 # 0x0
.size __hip_cuid_, 1
.section ".linker-options","e",@llvm_linker_options
.ident "AMD clang version 18.0.0git (https://github.com/RadeonOpenCompute/llvm-project roc-6.3.2 25012 e5bf7e55c91490b07c49d8960fa7983d864936c4)"
.section ".note.GNU-stack","",@progbits
.addrsig
.addrsig_sym __hip_cuid_ |
You are a helpful coding assistant specialized in converting CUDA source code to CUDA host assembly. | __global__ void calculate_inner_grid(double* grid_0, double* grid_1, double* grid_2, int bx, int by, int bz){
int N = (bx + 2) * (by + 2) * (bz * 2);
int idx = blockIdx.x * blockDim.x + threadIdx.x;
int i, j, k;
double uijk = grid_1[idx], laplace = 0.;
i = N % (bx + 2);
if (i < 2 && i >= bx) return;
j = N / (bx + 2) % (by + 2);
if (j < 2 && j >= by) return;
k = N / ((bx + 2) * (by + 2));
if (k < 2 && k >= bz) return;
grid_2[idx] = 2 * grid_1[idx] - grid_0[idx];
}
__global__ void first_step(double* grid_0, double* grid_1, \
int bx, int by, int bz, \
double hx, double hy, double hz, \
double block_x_len, double block_y_len, double block_z_len, \
int Lx, int Ly, int Lz, \
int Nx, int Ny, int Nz, \
int nx, int ny, int nz, \
int block_pos_x, int block_pos_y, int block_pos_z,
double at, double t){
int N = (bx + 2) * (by + 2) * (bz * 2);
int idx = blockIdx.x * blockDim.x + threadIdx.x;
int i, j, k;
double uijk = grid_1[idx], laplace = 0.;
double x, y, z;
i = N % (bx + 2);
if (i < 1 && i > bx) return;
j = N / (bx + 2) % (by + 2);
if (j < 1 && j > by) return;
k = N / ((bx + 2) * (by + 2));
if (k < 1 && k > bz) return;
x = (i - 1) * hx + block_pos_x * block_x_len + min(Nx % nx, block_pos_x) * hx;
y = (j - 1) * hy + block_pos_y * block_y_len + min(Ny % ny, block_pos_y) * hy;
z = (k - 1) * hz + block_pos_z * block_z_len + min(Nz % nz, block_pos_z) * hz;
grid_0[idx] = sin(3.14 / Lx * x) * sin(3.14 / Ly * y) * sin(2 * 3.14 / Lz * z) * cos(at * t + 2 * 3.14);
} | .file "tmpxft_0015695e_00000000-6_cuda_utils.cudafe1.cpp"
.text
#APP
#NO_APP
.type _ZL26__cudaUnregisterBinaryUtilv, @function
_ZL26__cudaUnregisterBinaryUtilv:
.LFB2029:
.cfi_startproc
endbr64
subq $8, %rsp
.cfi_def_cfa_offset 16
movq _ZL20__cudaFatCubinHandle(%rip), %rdi
call __cudaUnregisterFatBinary@PLT
addq $8, %rsp
.cfi_def_cfa_offset 8
ret
.cfi_endproc
.LFE2029:
.size _ZL26__cudaUnregisterBinaryUtilv, .-_ZL26__cudaUnregisterBinaryUtilv
.globl _Z47__device_stub__Z20calculate_inner_gridPdS_S_iiiPdS_S_iii
.type _Z47__device_stub__Z20calculate_inner_gridPdS_S_iiiPdS_S_iii, @function
_Z47__device_stub__Z20calculate_inner_gridPdS_S_iiiPdS_S_iii:
.LFB2051:
.cfi_startproc
endbr64
subq $184, %rsp
.cfi_def_cfa_offset 192
movq %rdi, 40(%rsp)
movq %rsi, 32(%rsp)
movq %rdx, 24(%rsp)
movl %ecx, 20(%rsp)
movl %r8d, 16(%rsp)
movl %r9d, 12(%rsp)
movq %fs:40, %rax
movq %rax, 168(%rsp)
xorl %eax, %eax
leaq 40(%rsp), %rax
movq %rax, 112(%rsp)
leaq 32(%rsp), %rax
movq %rax, 120(%rsp)
leaq 24(%rsp), %rax
movq %rax, 128(%rsp)
leaq 20(%rsp), %rax
movq %rax, 136(%rsp)
leaq 16(%rsp), %rax
movq %rax, 144(%rsp)
leaq 12(%rsp), %rax
movq %rax, 152(%rsp)
movl $1, 64(%rsp)
movl $1, 68(%rsp)
movl $1, 72(%rsp)
movl $1, 76(%rsp)
movl $1, 80(%rsp)
movl $1, 84(%rsp)
leaq 56(%rsp), %rcx
leaq 48(%rsp), %rdx
leaq 76(%rsp), %rsi
leaq 64(%rsp), %rdi
call __cudaPopCallConfiguration@PLT
testl %eax, %eax
je .L7
.L3:
movq 168(%rsp), %rax
subq %fs:40, %rax
jne .L8
addq $184, %rsp
.cfi_remember_state
.cfi_def_cfa_offset 8
ret
.L7:
.cfi_restore_state
pushq 56(%rsp)
.cfi_def_cfa_offset 200
pushq 56(%rsp)
.cfi_def_cfa_offset 208
leaq 128(%rsp), %r9
movq 92(%rsp), %rcx
movl 100(%rsp), %r8d
movq 80(%rsp), %rsi
movl 88(%rsp), %edx
leaq _Z20calculate_inner_gridPdS_S_iii(%rip), %rdi
call cudaLaunchKernel@PLT
addq $16, %rsp
.cfi_def_cfa_offset 192
jmp .L3
.L8:
call __stack_chk_fail@PLT
.cfi_endproc
.LFE2051:
.size _Z47__device_stub__Z20calculate_inner_gridPdS_S_iiiPdS_S_iii, .-_Z47__device_stub__Z20calculate_inner_gridPdS_S_iiiPdS_S_iii
.globl _Z20calculate_inner_gridPdS_S_iii
.type _Z20calculate_inner_gridPdS_S_iii, @function
_Z20calculate_inner_gridPdS_S_iii:
.LFB2052:
.cfi_startproc
endbr64
subq $8, %rsp
.cfi_def_cfa_offset 16
call _Z47__device_stub__Z20calculate_inner_gridPdS_S_iiiPdS_S_iii
addq $8, %rsp
.cfi_def_cfa_offset 8
ret
.cfi_endproc
.LFE2052:
.size _Z20calculate_inner_gridPdS_S_iii, .-_Z20calculate_inner_gridPdS_S_iii
.globl _Z55__device_stub__Z10first_stepPdS_iiiddddddiiiiiiiiiiiiddPdS_iiiddddddiiiiiiiiiiiidd
.type _Z55__device_stub__Z10first_stepPdS_iiiddddddiiiiiiiiiiiiddPdS_iiiddddddiiiiiiiiiiiidd, @function
_Z55__device_stub__Z10first_stepPdS_iiiddddddiiiiiiiiiiiiddPdS_iiiddddddiiiiiiiiiiiidd:
.LFB2053:
.cfi_startproc
endbr64
subq $376, %rsp
.cfi_def_cfa_offset 384
movq %rdi, 88(%rsp)
movq %rsi, 80(%rsp)
movl %edx, 76(%rsp)
movl %ecx, 72(%rsp)
movl %r8d, 68(%rsp)
movsd %xmm0, 56(%rsp)
movsd %xmm1, 48(%rsp)
movsd %xmm2, 40(%rsp)
movsd %xmm3, 32(%rsp)
movsd %xmm4, 24(%rsp)
movsd %xmm5, 16(%rsp)
movl %r9d, 64(%rsp)
movsd %xmm6, 8(%rsp)
movsd %xmm7, (%rsp)
movq %fs:40, %rax
movq %rax, 360(%rsp)
xorl %eax, %eax
leaq 88(%rsp), %rax
movq %rax, 160(%rsp)
leaq 80(%rsp), %rax
movq %rax, 168(%rsp)
leaq 76(%rsp), %rax
movq %rax, 176(%rsp)
leaq 72(%rsp), %rax
movq %rax, 184(%rsp)
leaq 68(%rsp), %rax
movq %rax, 192(%rsp)
leaq 56(%rsp), %rax
movq %rax, 200(%rsp)
leaq 48(%rsp), %rax
movq %rax, 208(%rsp)
leaq 40(%rsp), %rax
movq %rax, 216(%rsp)
leaq 32(%rsp), %rax
movq %rax, 224(%rsp)
leaq 24(%rsp), %rax
movq %rax, 232(%rsp)
leaq 16(%rsp), %rax
movq %rax, 240(%rsp)
leaq 64(%rsp), %rax
movq %rax, 248(%rsp)
leaq 384(%rsp), %rax
movq %rax, 256(%rsp)
leaq 392(%rsp), %rax
movq %rax, 264(%rsp)
leaq 400(%rsp), %rax
movq %rax, 272(%rsp)
leaq 408(%rsp), %rax
movq %rax, 280(%rsp)
leaq 416(%rsp), %rax
movq %rax, 288(%rsp)
leaq 424(%rsp), %rax
movq %rax, 296(%rsp)
leaq 432(%rsp), %rax
movq %rax, 304(%rsp)
leaq 440(%rsp), %rax
movq %rax, 312(%rsp)
leaq 448(%rsp), %rax
movq %rax, 320(%rsp)
leaq 456(%rsp), %rax
movq %rax, 328(%rsp)
leaq 464(%rsp), %rax
movq %rax, 336(%rsp)
leaq 8(%rsp), %rax
movq %rax, 344(%rsp)
movq %rsp, %rax
movq %rax, 352(%rsp)
movl $1, 112(%rsp)
movl $1, 116(%rsp)
movl $1, 120(%rsp)
movl $1, 124(%rsp)
movl $1, 128(%rsp)
movl $1, 132(%rsp)
leaq 104(%rsp), %rcx
leaq 96(%rsp), %rdx
leaq 124(%rsp), %rsi
leaq 112(%rsp), %rdi
call __cudaPopCallConfiguration@PLT
testl %eax, %eax
je .L15
.L11:
movq 360(%rsp), %rax
subq %fs:40, %rax
jne .L16
addq $376, %rsp
.cfi_remember_state
.cfi_def_cfa_offset 8
ret
.L15:
.cfi_restore_state
pushq 104(%rsp)
.cfi_def_cfa_offset 392
pushq 104(%rsp)
.cfi_def_cfa_offset 400
leaq 176(%rsp), %r9
movq 140(%rsp), %rcx
movl 148(%rsp), %r8d
movq 128(%rsp), %rsi
movl 136(%rsp), %edx
leaq _Z10first_stepPdS_iiiddddddiiiiiiiiiiiidd(%rip), %rdi
call cudaLaunchKernel@PLT
addq $16, %rsp
.cfi_def_cfa_offset 384
jmp .L11
.L16:
call __stack_chk_fail@PLT
.cfi_endproc
.LFE2053:
.size _Z55__device_stub__Z10first_stepPdS_iiiddddddiiiiiiiiiiiiddPdS_iiiddddddiiiiiiiiiiiidd, .-_Z55__device_stub__Z10first_stepPdS_iiiddddddiiiiiiiiiiiiddPdS_iiiddddddiiiiiiiiiiiidd
.globl _Z10first_stepPdS_iiiddddddiiiiiiiiiiiidd
.type _Z10first_stepPdS_iiiddddddiiiiiiiiiiiidd, @function
_Z10first_stepPdS_iiiddddddiiiiiiiiiiiidd:
.LFB2054:
.cfi_startproc
endbr64
subq $16, %rsp
.cfi_def_cfa_offset 24
movl 104(%rsp), %eax
pushq %rax
.cfi_def_cfa_offset 32
movl 104(%rsp), %eax
pushq %rax
.cfi_def_cfa_offset 40
movl 104(%rsp), %eax
pushq %rax
.cfi_def_cfa_offset 48
movl 104(%rsp), %eax
pushq %rax
.cfi_def_cfa_offset 56
movl 104(%rsp), %eax
pushq %rax
.cfi_def_cfa_offset 64
movl 104(%rsp), %eax
pushq %rax
.cfi_def_cfa_offset 72
movl 104(%rsp), %eax
pushq %rax
.cfi_def_cfa_offset 80
movl 104(%rsp), %eax
pushq %rax
.cfi_def_cfa_offset 88
movl 104(%rsp), %eax
pushq %rax
.cfi_def_cfa_offset 96
movl 104(%rsp), %eax
pushq %rax
.cfi_def_cfa_offset 104
movl 104(%rsp), %eax
pushq %rax
.cfi_def_cfa_offset 112
call _Z55__device_stub__Z10first_stepPdS_iiiddddddiiiiiiiiiiiiddPdS_iiiddddddiiiiiiiiiiiidd
addq $104, %rsp
.cfi_def_cfa_offset 8
ret
.cfi_endproc
.LFE2054:
.size _Z10first_stepPdS_iiiddddddiiiiiiiiiiiidd, .-_Z10first_stepPdS_iiiddddddiiiiiiiiiiiidd
.section .rodata.str1.8,"aMS",@progbits,1
.align 8
.LC0:
.string "_Z10first_stepPdS_iiiddddddiiiiiiiiiiiidd"
.align 8
.LC1:
.string "_Z20calculate_inner_gridPdS_S_iii"
.text
.type _ZL24__sti____cudaRegisterAllv, @function
_ZL24__sti____cudaRegisterAllv:
.LFB2056:
.cfi_startproc
endbr64
pushq %rbx
.cfi_def_cfa_offset 16
.cfi_offset 3, -16
leaq _ZL15__fatDeviceText(%rip), %rdi
call __cudaRegisterFatBinary@PLT
movq %rax, %rbx
movq %rax, _ZL20__cudaFatCubinHandle(%rip)
pushq $0
.cfi_def_cfa_offset 24
pushq $0
.cfi_def_cfa_offset 32
pushq $0
.cfi_def_cfa_offset 40
pushq $0
.cfi_def_cfa_offset 48
movl $0, %r9d
movl $-1, %r8d
leaq .LC0(%rip), %rdx
movq %rdx, %rcx
leaq _Z10first_stepPdS_iiiddddddiiiiiiiiiiiidd(%rip), %rsi
movq %rax, %rdi
call __cudaRegisterFunction@PLT
addq $32, %rsp
.cfi_def_cfa_offset 16
pushq $0
.cfi_def_cfa_offset 24
pushq $0
.cfi_def_cfa_offset 32
pushq $0
.cfi_def_cfa_offset 40
pushq $0
.cfi_def_cfa_offset 48
movl $0, %r9d
movl $-1, %r8d
leaq .LC1(%rip), %rdx
movq %rdx, %rcx
leaq _Z20calculate_inner_gridPdS_S_iii(%rip), %rsi
movq %rbx, %rdi
call __cudaRegisterFunction@PLT
addq $32, %rsp
.cfi_def_cfa_offset 16
movq _ZL20__cudaFatCubinHandle(%rip), %rdi
call __cudaRegisterFatBinaryEnd@PLT
leaq _ZL26__cudaUnregisterBinaryUtilv(%rip), %rdi
call atexit@PLT
popq %rbx
.cfi_def_cfa_offset 8
ret
.cfi_endproc
.LFE2056:
.size _ZL24__sti____cudaRegisterAllv, .-_ZL24__sti____cudaRegisterAllv
.section .init_array,"aw"
.align 8
.quad _ZL24__sti____cudaRegisterAllv
.section .nvFatBinSegment,"aw"
.align 8
.type _ZL15__fatDeviceText, @object
.size _ZL15__fatDeviceText, 24
_ZL15__fatDeviceText:
.long 1180844977
.long 1
.quad fatbinData
.quad 0
.local _ZL20__cudaFatCubinHandle
.comm _ZL20__cudaFatCubinHandle,8,8
.ident "GCC: (Ubuntu 13.3.0-6ubuntu2~24.04) 13.3.0"
.section .note.GNU-stack,"",@progbits
.section .note.gnu.property,"a"
.align 8
.long 1f - 0f
.long 4f - 1f
.long 5
0:
.string "GNU"
1:
.align 8
.long 0xc0000002
.long 3f - 2f
2:
.long 0x3
3:
.align 8
4: |
You are a helpful coding assistant specialized in converting CUDA source code to HIP/AMD source code. | __global__ void calculate_inner_grid(double* grid_0, double* grid_1, double* grid_2, int bx, int by, int bz){
int N = (bx + 2) * (by + 2) * (bz * 2);
int idx = blockIdx.x * blockDim.x + threadIdx.x;
int i, j, k;
double uijk = grid_1[idx], laplace = 0.;
i = N % (bx + 2);
if (i < 2 && i >= bx) return;
j = N / (bx + 2) % (by + 2);
if (j < 2 && j >= by) return;
k = N / ((bx + 2) * (by + 2));
if (k < 2 && k >= bz) return;
grid_2[idx] = 2 * grid_1[idx] - grid_0[idx];
}
__global__ void first_step(double* grid_0, double* grid_1, \
int bx, int by, int bz, \
double hx, double hy, double hz, \
double block_x_len, double block_y_len, double block_z_len, \
int Lx, int Ly, int Lz, \
int Nx, int Ny, int Nz, \
int nx, int ny, int nz, \
int block_pos_x, int block_pos_y, int block_pos_z,
double at, double t){
int N = (bx + 2) * (by + 2) * (bz * 2);
int idx = blockIdx.x * blockDim.x + threadIdx.x;
int i, j, k;
double uijk = grid_1[idx], laplace = 0.;
double x, y, z;
i = N % (bx + 2);
if (i < 1 && i > bx) return;
j = N / (bx + 2) % (by + 2);
if (j < 1 && j > by) return;
k = N / ((bx + 2) * (by + 2));
if (k < 1 && k > bz) return;
x = (i - 1) * hx + block_pos_x * block_x_len + min(Nx % nx, block_pos_x) * hx;
y = (j - 1) * hy + block_pos_y * block_y_len + min(Ny % ny, block_pos_y) * hy;
z = (k - 1) * hz + block_pos_z * block_z_len + min(Nz % nz, block_pos_z) * hz;
grid_0[idx] = sin(3.14 / Lx * x) * sin(3.14 / Ly * y) * sin(2 * 3.14 / Lz * z) * cos(at * t + 2 * 3.14);
} | #include <hip/hip_runtime.h>
__global__ void calculate_inner_grid(double* grid_0, double* grid_1, double* grid_2, int bx, int by, int bz){
int N = (bx + 2) * (by + 2) * (bz * 2);
int idx = blockIdx.x * blockDim.x + threadIdx.x;
int i, j, k;
double uijk = grid_1[idx], laplace = 0.;
i = N % (bx + 2);
if (i < 2 && i >= bx) return;
j = N / (bx + 2) % (by + 2);
if (j < 2 && j >= by) return;
k = N / ((bx + 2) * (by + 2));
if (k < 2 && k >= bz) return;
grid_2[idx] = 2 * grid_1[idx] - grid_0[idx];
}
__global__ void first_step(double* grid_0, double* grid_1, \
int bx, int by, int bz, \
double hx, double hy, double hz, \
double block_x_len, double block_y_len, double block_z_len, \
int Lx, int Ly, int Lz, \
int Nx, int Ny, int Nz, \
int nx, int ny, int nz, \
int block_pos_x, int block_pos_y, int block_pos_z,
double at, double t){
int N = (bx + 2) * (by + 2) * (bz * 2);
int idx = blockIdx.x * blockDim.x + threadIdx.x;
int i, j, k;
double uijk = grid_1[idx], laplace = 0.;
double x, y, z;
i = N % (bx + 2);
if (i < 1 && i > bx) return;
j = N / (bx + 2) % (by + 2);
if (j < 1 && j > by) return;
k = N / ((bx + 2) * (by + 2));
if (k < 1 && k > bz) return;
x = (i - 1) * hx + block_pos_x * block_x_len + min(Nx % nx, block_pos_x) * hx;
y = (j - 1) * hy + block_pos_y * block_y_len + min(Ny % ny, block_pos_y) * hy;
z = (k - 1) * hz + block_pos_z * block_z_len + min(Nz % nz, block_pos_z) * hz;
grid_0[idx] = sin(3.14 / Lx * x) * sin(3.14 / Ly * y) * sin(2 * 3.14 / Lz * z) * cos(at * t + 2 * 3.14);
} |
You are a helpful coding assistant specialized in converting HIP source code to AMD host assembly. | #include <hip/hip_runtime.h>
__global__ void calculate_inner_grid(double* grid_0, double* grid_1, double* grid_2, int bx, int by, int bz){
int N = (bx + 2) * (by + 2) * (bz * 2);
int idx = blockIdx.x * blockDim.x + threadIdx.x;
int i, j, k;
double uijk = grid_1[idx], laplace = 0.;
i = N % (bx + 2);
if (i < 2 && i >= bx) return;
j = N / (bx + 2) % (by + 2);
if (j < 2 && j >= by) return;
k = N / ((bx + 2) * (by + 2));
if (k < 2 && k >= bz) return;
grid_2[idx] = 2 * grid_1[idx] - grid_0[idx];
}
__global__ void first_step(double* grid_0, double* grid_1, \
int bx, int by, int bz, \
double hx, double hy, double hz, \
double block_x_len, double block_y_len, double block_z_len, \
int Lx, int Ly, int Lz, \
int Nx, int Ny, int Nz, \
int nx, int ny, int nz, \
int block_pos_x, int block_pos_y, int block_pos_z,
double at, double t){
int N = (bx + 2) * (by + 2) * (bz * 2);
int idx = blockIdx.x * blockDim.x + threadIdx.x;
int i, j, k;
double uijk = grid_1[idx], laplace = 0.;
double x, y, z;
i = N % (bx + 2);
if (i < 1 && i > bx) return;
j = N / (bx + 2) % (by + 2);
if (j < 1 && j > by) return;
k = N / ((bx + 2) * (by + 2));
if (k < 1 && k > bz) return;
x = (i - 1) * hx + block_pos_x * block_x_len + min(Nx % nx, block_pos_x) * hx;
y = (j - 1) * hy + block_pos_y * block_y_len + min(Ny % ny, block_pos_y) * hy;
z = (k - 1) * hz + block_pos_z * block_z_len + min(Nz % nz, block_pos_z) * hz;
grid_0[idx] = sin(3.14 / Lx * x) * sin(3.14 / Ly * y) * sin(2 * 3.14 / Lz * z) * cos(at * t + 2 * 3.14);
} | .text
.file "cuda_utils.hip"
.globl _Z35__device_stub__calculate_inner_gridPdS_S_iii # -- Begin function _Z35__device_stub__calculate_inner_gridPdS_S_iii
.p2align 4, 0x90
.type _Z35__device_stub__calculate_inner_gridPdS_S_iii,@function
_Z35__device_stub__calculate_inner_gridPdS_S_iii: # @_Z35__device_stub__calculate_inner_gridPdS_S_iii
.cfi_startproc
# %bb.0:
subq $152, %rsp
.cfi_def_cfa_offset 160
movq %rdi, 88(%rsp)
movq %rsi, 80(%rsp)
movq %rdx, 72(%rsp)
movl %ecx, 20(%rsp)
movl %r8d, 16(%rsp)
movl %r9d, 12(%rsp)
leaq 88(%rsp), %rax
movq %rax, 96(%rsp)
leaq 80(%rsp), %rax
movq %rax, 104(%rsp)
leaq 72(%rsp), %rax
movq %rax, 112(%rsp)
leaq 20(%rsp), %rax
movq %rax, 120(%rsp)
leaq 16(%rsp), %rax
movq %rax, 128(%rsp)
leaq 12(%rsp), %rax
movq %rax, 136(%rsp)
leaq 56(%rsp), %rdi
leaq 40(%rsp), %rsi
leaq 32(%rsp), %rdx
leaq 24(%rsp), %rcx
callq __hipPopCallConfiguration
movq 56(%rsp), %rsi
movl 64(%rsp), %edx
movq 40(%rsp), %rcx
movl 48(%rsp), %r8d
leaq 96(%rsp), %r9
movl $_Z20calculate_inner_gridPdS_S_iii, %edi
pushq 24(%rsp)
.cfi_adjust_cfa_offset 8
pushq 40(%rsp)
.cfi_adjust_cfa_offset 8
callq hipLaunchKernel
addq $168, %rsp
.cfi_adjust_cfa_offset -168
retq
.Lfunc_end0:
.size _Z35__device_stub__calculate_inner_gridPdS_S_iii, .Lfunc_end0-_Z35__device_stub__calculate_inner_gridPdS_S_iii
.cfi_endproc
# -- End function
.globl _Z25__device_stub__first_stepPdS_iiiddddddiiiiiiiiiiiidd # -- Begin function _Z25__device_stub__first_stepPdS_iiiddddddiiiiiiiiiiiidd
.p2align 4, 0x90
.type _Z25__device_stub__first_stepPdS_iiiddddddiiiiiiiiiiiidd,@function
_Z25__device_stub__first_stepPdS_iiiddddddiiiiiiiiiiiidd: # @_Z25__device_stub__first_stepPdS_iiiddddddiiiiiiiiiiiidd
.cfi_startproc
# %bb.0:
subq $344, %rsp # imm = 0x158
.cfi_def_cfa_offset 352
movq %rdi, 136(%rsp)
movq %rsi, 128(%rsp)
movl %edx, 12(%rsp)
movl %ecx, 8(%rsp)
movl %r8d, 4(%rsp)
movsd %xmm0, 120(%rsp)
movsd %xmm1, 112(%rsp)
movsd %xmm2, 104(%rsp)
movsd %xmm3, 96(%rsp)
movsd %xmm4, 88(%rsp)
movsd %xmm5, 80(%rsp)
movl %r9d, (%rsp)
movsd %xmm6, 72(%rsp)
movsd %xmm7, 64(%rsp)
leaq 136(%rsp), %rax
movq %rax, 144(%rsp)
leaq 128(%rsp), %rax
movq %rax, 152(%rsp)
leaq 12(%rsp), %rax
movq %rax, 160(%rsp)
leaq 8(%rsp), %rax
movq %rax, 168(%rsp)
leaq 4(%rsp), %rax
movq %rax, 176(%rsp)
leaq 120(%rsp), %rax
movq %rax, 184(%rsp)
leaq 112(%rsp), %rax
movq %rax, 192(%rsp)
leaq 104(%rsp), %rax
movq %rax, 200(%rsp)
leaq 96(%rsp), %rax
movq %rax, 208(%rsp)
leaq 88(%rsp), %rax
movq %rax, 216(%rsp)
leaq 80(%rsp), %rax
movq %rax, 224(%rsp)
movq %rsp, %rax
movq %rax, 232(%rsp)
leaq 352(%rsp), %rax
movq %rax, 240(%rsp)
leaq 360(%rsp), %rax
movq %rax, 248(%rsp)
leaq 368(%rsp), %rax
movq %rax, 256(%rsp)
leaq 376(%rsp), %rax
movq %rax, 264(%rsp)
leaq 384(%rsp), %rax
movq %rax, 272(%rsp)
leaq 392(%rsp), %rax
movq %rax, 280(%rsp)
leaq 400(%rsp), %rax
movq %rax, 288(%rsp)
leaq 408(%rsp), %rax
movq %rax, 296(%rsp)
leaq 416(%rsp), %rax
movq %rax, 304(%rsp)
leaq 424(%rsp), %rax
movq %rax, 312(%rsp)
leaq 432(%rsp), %rax
movq %rax, 320(%rsp)
leaq 72(%rsp), %rax
movq %rax, 328(%rsp)
leaq 64(%rsp), %rax
movq %rax, 336(%rsp)
leaq 48(%rsp), %rdi
leaq 32(%rsp), %rsi
leaq 24(%rsp), %rdx
leaq 16(%rsp), %rcx
callq __hipPopCallConfiguration
movq 48(%rsp), %rsi
movl 56(%rsp), %edx
movq 32(%rsp), %rcx
movl 40(%rsp), %r8d
leaq 144(%rsp), %r9
movl $_Z10first_stepPdS_iiiddddddiiiiiiiiiiiidd, %edi
pushq 16(%rsp)
.cfi_adjust_cfa_offset 8
pushq 32(%rsp)
.cfi_adjust_cfa_offset 8
callq hipLaunchKernel
addq $360, %rsp # imm = 0x168
.cfi_adjust_cfa_offset -360
retq
.Lfunc_end1:
.size _Z25__device_stub__first_stepPdS_iiiddddddiiiiiiiiiiiidd, .Lfunc_end1-_Z25__device_stub__first_stepPdS_iiiddddddiiiiiiiiiiiidd
.cfi_endproc
# -- End function
.p2align 4, 0x90 # -- Begin function __hip_module_ctor
.type __hip_module_ctor,@function
__hip_module_ctor: # @__hip_module_ctor
.cfi_startproc
# %bb.0:
pushq %rbx
.cfi_def_cfa_offset 16
subq $32, %rsp
.cfi_def_cfa_offset 48
.cfi_offset %rbx, -16
cmpq $0, __hip_gpubin_handle(%rip)
jne .LBB2_2
# %bb.1:
movl $__hip_fatbin_wrapper, %edi
callq __hipRegisterFatBinary
movq %rax, __hip_gpubin_handle(%rip)
.LBB2_2:
movq __hip_gpubin_handle(%rip), %rbx
xorps %xmm0, %xmm0
movups %xmm0, 16(%rsp)
movups %xmm0, (%rsp)
movl $_Z20calculate_inner_gridPdS_S_iii, %esi
movl $.L__unnamed_1, %edx
movl $.L__unnamed_1, %ecx
movq %rbx, %rdi
movl $-1, %r8d
xorl %r9d, %r9d
callq __hipRegisterFunction
xorps %xmm0, %xmm0
movups %xmm0, 16(%rsp)
movups %xmm0, (%rsp)
movl $_Z10first_stepPdS_iiiddddddiiiiiiiiiiiidd, %esi
movl $.L__unnamed_2, %edx
movl $.L__unnamed_2, %ecx
movq %rbx, %rdi
movl $-1, %r8d
xorl %r9d, %r9d
callq __hipRegisterFunction
movl $__hip_module_dtor, %edi
addq $32, %rsp
.cfi_def_cfa_offset 16
popq %rbx
.cfi_def_cfa_offset 8
jmp atexit # TAILCALL
.Lfunc_end2:
.size __hip_module_ctor, .Lfunc_end2-__hip_module_ctor
.cfi_endproc
# -- End function
.p2align 4, 0x90 # -- Begin function __hip_module_dtor
.type __hip_module_dtor,@function
__hip_module_dtor: # @__hip_module_dtor
.cfi_startproc
# %bb.0:
movq __hip_gpubin_handle(%rip), %rdi
testq %rdi, %rdi
je .LBB3_2
# %bb.1:
pushq %rax
.cfi_def_cfa_offset 16
callq __hipUnregisterFatBinary
movq $0, __hip_gpubin_handle(%rip)
addq $8, %rsp
.cfi_def_cfa_offset 8
.LBB3_2:
retq
.Lfunc_end3:
.size __hip_module_dtor, .Lfunc_end3-__hip_module_dtor
.cfi_endproc
# -- End function
.type _Z20calculate_inner_gridPdS_S_iii,@object # @_Z20calculate_inner_gridPdS_S_iii
.section .rodata,"a",@progbits
.globl _Z20calculate_inner_gridPdS_S_iii
.p2align 3, 0x0
_Z20calculate_inner_gridPdS_S_iii:
.quad _Z35__device_stub__calculate_inner_gridPdS_S_iii
.size _Z20calculate_inner_gridPdS_S_iii, 8
.type _Z10first_stepPdS_iiiddddddiiiiiiiiiiiidd,@object # @_Z10first_stepPdS_iiiddddddiiiiiiiiiiiidd
.globl _Z10first_stepPdS_iiiddddddiiiiiiiiiiiidd
.p2align 3, 0x0
_Z10first_stepPdS_iiiddddddiiiiiiiiiiiidd:
.quad _Z25__device_stub__first_stepPdS_iiiddddddiiiiiiiiiiiidd
.size _Z10first_stepPdS_iiiddddddiiiiiiiiiiiidd, 8
.type .L__unnamed_1,@object # @0
.section .rodata.str1.1,"aMS",@progbits,1
.L__unnamed_1:
.asciz "_Z20calculate_inner_gridPdS_S_iii"
.size .L__unnamed_1, 34
.type .L__unnamed_2,@object # @1
.L__unnamed_2:
.asciz "_Z10first_stepPdS_iiiddddddiiiiiiiiiiiidd"
.size .L__unnamed_2, 42
.type __hip_fatbin_wrapper,@object # @__hip_fatbin_wrapper
.section .hipFatBinSegment,"a",@progbits
.p2align 3, 0x0
__hip_fatbin_wrapper:
.long 1212764230 # 0x48495046
.long 1 # 0x1
.quad __hip_fatbin
.quad 0
.size __hip_fatbin_wrapper, 24
.type __hip_gpubin_handle,@object # @__hip_gpubin_handle
.local __hip_gpubin_handle
.comm __hip_gpubin_handle,8,8
.section .init_array,"aw",@init_array
.p2align 3, 0x0
.quad __hip_module_ctor
.type __hip_cuid_,@object # @__hip_cuid_
.bss
.globl __hip_cuid_
__hip_cuid_:
.byte 0 # 0x0
.size __hip_cuid_, 1
.section ".linker-options","e",@llvm_linker_options
.ident "AMD clang version 18.0.0git (https://github.com/RadeonOpenCompute/llvm-project roc-6.3.2 25012 e5bf7e55c91490b07c49d8960fa7983d864936c4)"
.section ".note.GNU-stack","",@progbits
.addrsig
.addrsig_sym _Z35__device_stub__calculate_inner_gridPdS_S_iii
.addrsig_sym _Z25__device_stub__first_stepPdS_iiiddddddiiiiiiiiiiiidd
.addrsig_sym __hip_module_ctor
.addrsig_sym __hip_module_dtor
.addrsig_sym _Z20calculate_inner_gridPdS_S_iii
.addrsig_sym _Z10first_stepPdS_iiiddddddiiiiiiiiiiiidd
.addrsig_sym __hip_fatbin
.addrsig_sym __hip_fatbin_wrapper
.addrsig_sym __hip_cuid_ |
You are a helpful coding assistant specialized in converting from CUDA host assembly to AMD host assembly. | .file "tmpxft_0015695e_00000000-6_cuda_utils.cudafe1.cpp"
.text
#APP
#NO_APP
.type _ZL26__cudaUnregisterBinaryUtilv, @function
_ZL26__cudaUnregisterBinaryUtilv:
.LFB2029:
.cfi_startproc
endbr64
subq $8, %rsp
.cfi_def_cfa_offset 16
movq _ZL20__cudaFatCubinHandle(%rip), %rdi
call __cudaUnregisterFatBinary@PLT
addq $8, %rsp
.cfi_def_cfa_offset 8
ret
.cfi_endproc
.LFE2029:
.size _ZL26__cudaUnregisterBinaryUtilv, .-_ZL26__cudaUnregisterBinaryUtilv
.globl _Z47__device_stub__Z20calculate_inner_gridPdS_S_iiiPdS_S_iii
.type _Z47__device_stub__Z20calculate_inner_gridPdS_S_iiiPdS_S_iii, @function
_Z47__device_stub__Z20calculate_inner_gridPdS_S_iiiPdS_S_iii:
.LFB2051:
.cfi_startproc
endbr64
subq $184, %rsp
.cfi_def_cfa_offset 192
movq %rdi, 40(%rsp)
movq %rsi, 32(%rsp)
movq %rdx, 24(%rsp)
movl %ecx, 20(%rsp)
movl %r8d, 16(%rsp)
movl %r9d, 12(%rsp)
movq %fs:40, %rax
movq %rax, 168(%rsp)
xorl %eax, %eax
leaq 40(%rsp), %rax
movq %rax, 112(%rsp)
leaq 32(%rsp), %rax
movq %rax, 120(%rsp)
leaq 24(%rsp), %rax
movq %rax, 128(%rsp)
leaq 20(%rsp), %rax
movq %rax, 136(%rsp)
leaq 16(%rsp), %rax
movq %rax, 144(%rsp)
leaq 12(%rsp), %rax
movq %rax, 152(%rsp)
movl $1, 64(%rsp)
movl $1, 68(%rsp)
movl $1, 72(%rsp)
movl $1, 76(%rsp)
movl $1, 80(%rsp)
movl $1, 84(%rsp)
leaq 56(%rsp), %rcx
leaq 48(%rsp), %rdx
leaq 76(%rsp), %rsi
leaq 64(%rsp), %rdi
call __cudaPopCallConfiguration@PLT
testl %eax, %eax
je .L7
.L3:
movq 168(%rsp), %rax
subq %fs:40, %rax
jne .L8
addq $184, %rsp
.cfi_remember_state
.cfi_def_cfa_offset 8
ret
.L7:
.cfi_restore_state
pushq 56(%rsp)
.cfi_def_cfa_offset 200
pushq 56(%rsp)
.cfi_def_cfa_offset 208
leaq 128(%rsp), %r9
movq 92(%rsp), %rcx
movl 100(%rsp), %r8d
movq 80(%rsp), %rsi
movl 88(%rsp), %edx
leaq _Z20calculate_inner_gridPdS_S_iii(%rip), %rdi
call cudaLaunchKernel@PLT
addq $16, %rsp
.cfi_def_cfa_offset 192
jmp .L3
.L8:
call __stack_chk_fail@PLT
.cfi_endproc
.LFE2051:
.size _Z47__device_stub__Z20calculate_inner_gridPdS_S_iiiPdS_S_iii, .-_Z47__device_stub__Z20calculate_inner_gridPdS_S_iiiPdS_S_iii
.globl _Z20calculate_inner_gridPdS_S_iii
.type _Z20calculate_inner_gridPdS_S_iii, @function
_Z20calculate_inner_gridPdS_S_iii:
.LFB2052:
.cfi_startproc
endbr64
subq $8, %rsp
.cfi_def_cfa_offset 16
call _Z47__device_stub__Z20calculate_inner_gridPdS_S_iiiPdS_S_iii
addq $8, %rsp
.cfi_def_cfa_offset 8
ret
.cfi_endproc
.LFE2052:
.size _Z20calculate_inner_gridPdS_S_iii, .-_Z20calculate_inner_gridPdS_S_iii
.globl _Z55__device_stub__Z10first_stepPdS_iiiddddddiiiiiiiiiiiiddPdS_iiiddddddiiiiiiiiiiiidd
.type _Z55__device_stub__Z10first_stepPdS_iiiddddddiiiiiiiiiiiiddPdS_iiiddddddiiiiiiiiiiiidd, @function
_Z55__device_stub__Z10first_stepPdS_iiiddddddiiiiiiiiiiiiddPdS_iiiddddddiiiiiiiiiiiidd:
.LFB2053:
.cfi_startproc
endbr64
subq $376, %rsp
.cfi_def_cfa_offset 384
movq %rdi, 88(%rsp)
movq %rsi, 80(%rsp)
movl %edx, 76(%rsp)
movl %ecx, 72(%rsp)
movl %r8d, 68(%rsp)
movsd %xmm0, 56(%rsp)
movsd %xmm1, 48(%rsp)
movsd %xmm2, 40(%rsp)
movsd %xmm3, 32(%rsp)
movsd %xmm4, 24(%rsp)
movsd %xmm5, 16(%rsp)
movl %r9d, 64(%rsp)
movsd %xmm6, 8(%rsp)
movsd %xmm7, (%rsp)
movq %fs:40, %rax
movq %rax, 360(%rsp)
xorl %eax, %eax
leaq 88(%rsp), %rax
movq %rax, 160(%rsp)
leaq 80(%rsp), %rax
movq %rax, 168(%rsp)
leaq 76(%rsp), %rax
movq %rax, 176(%rsp)
leaq 72(%rsp), %rax
movq %rax, 184(%rsp)
leaq 68(%rsp), %rax
movq %rax, 192(%rsp)
leaq 56(%rsp), %rax
movq %rax, 200(%rsp)
leaq 48(%rsp), %rax
movq %rax, 208(%rsp)
leaq 40(%rsp), %rax
movq %rax, 216(%rsp)
leaq 32(%rsp), %rax
movq %rax, 224(%rsp)
leaq 24(%rsp), %rax
movq %rax, 232(%rsp)
leaq 16(%rsp), %rax
movq %rax, 240(%rsp)
leaq 64(%rsp), %rax
movq %rax, 248(%rsp)
leaq 384(%rsp), %rax
movq %rax, 256(%rsp)
leaq 392(%rsp), %rax
movq %rax, 264(%rsp)
leaq 400(%rsp), %rax
movq %rax, 272(%rsp)
leaq 408(%rsp), %rax
movq %rax, 280(%rsp)
leaq 416(%rsp), %rax
movq %rax, 288(%rsp)
leaq 424(%rsp), %rax
movq %rax, 296(%rsp)
leaq 432(%rsp), %rax
movq %rax, 304(%rsp)
leaq 440(%rsp), %rax
movq %rax, 312(%rsp)
leaq 448(%rsp), %rax
movq %rax, 320(%rsp)
leaq 456(%rsp), %rax
movq %rax, 328(%rsp)
leaq 464(%rsp), %rax
movq %rax, 336(%rsp)
leaq 8(%rsp), %rax
movq %rax, 344(%rsp)
movq %rsp, %rax
movq %rax, 352(%rsp)
movl $1, 112(%rsp)
movl $1, 116(%rsp)
movl $1, 120(%rsp)
movl $1, 124(%rsp)
movl $1, 128(%rsp)
movl $1, 132(%rsp)
leaq 104(%rsp), %rcx
leaq 96(%rsp), %rdx
leaq 124(%rsp), %rsi
leaq 112(%rsp), %rdi
call __cudaPopCallConfiguration@PLT
testl %eax, %eax
je .L15
.L11:
movq 360(%rsp), %rax
subq %fs:40, %rax
jne .L16
addq $376, %rsp
.cfi_remember_state
.cfi_def_cfa_offset 8
ret
.L15:
.cfi_restore_state
pushq 104(%rsp)
.cfi_def_cfa_offset 392
pushq 104(%rsp)
.cfi_def_cfa_offset 400
leaq 176(%rsp), %r9
movq 140(%rsp), %rcx
movl 148(%rsp), %r8d
movq 128(%rsp), %rsi
movl 136(%rsp), %edx
leaq _Z10first_stepPdS_iiiddddddiiiiiiiiiiiidd(%rip), %rdi
call cudaLaunchKernel@PLT
addq $16, %rsp
.cfi_def_cfa_offset 384
jmp .L11
.L16:
call __stack_chk_fail@PLT
.cfi_endproc
.LFE2053:
.size _Z55__device_stub__Z10first_stepPdS_iiiddddddiiiiiiiiiiiiddPdS_iiiddddddiiiiiiiiiiiidd, .-_Z55__device_stub__Z10first_stepPdS_iiiddddddiiiiiiiiiiiiddPdS_iiiddddddiiiiiiiiiiiidd
.globl _Z10first_stepPdS_iiiddddddiiiiiiiiiiiidd
.type _Z10first_stepPdS_iiiddddddiiiiiiiiiiiidd, @function
_Z10first_stepPdS_iiiddddddiiiiiiiiiiiidd:
.LFB2054:
.cfi_startproc
endbr64
subq $16, %rsp
.cfi_def_cfa_offset 24
movl 104(%rsp), %eax
pushq %rax
.cfi_def_cfa_offset 32
movl 104(%rsp), %eax
pushq %rax
.cfi_def_cfa_offset 40
movl 104(%rsp), %eax
pushq %rax
.cfi_def_cfa_offset 48
movl 104(%rsp), %eax
pushq %rax
.cfi_def_cfa_offset 56
movl 104(%rsp), %eax
pushq %rax
.cfi_def_cfa_offset 64
movl 104(%rsp), %eax
pushq %rax
.cfi_def_cfa_offset 72
movl 104(%rsp), %eax
pushq %rax
.cfi_def_cfa_offset 80
movl 104(%rsp), %eax
pushq %rax
.cfi_def_cfa_offset 88
movl 104(%rsp), %eax
pushq %rax
.cfi_def_cfa_offset 96
movl 104(%rsp), %eax
pushq %rax
.cfi_def_cfa_offset 104
movl 104(%rsp), %eax
pushq %rax
.cfi_def_cfa_offset 112
call _Z55__device_stub__Z10first_stepPdS_iiiddddddiiiiiiiiiiiiddPdS_iiiddddddiiiiiiiiiiiidd
addq $104, %rsp
.cfi_def_cfa_offset 8
ret
.cfi_endproc
.LFE2054:
.size _Z10first_stepPdS_iiiddddddiiiiiiiiiiiidd, .-_Z10first_stepPdS_iiiddddddiiiiiiiiiiiidd
.section .rodata.str1.8,"aMS",@progbits,1
.align 8
.LC0:
.string "_Z10first_stepPdS_iiiddddddiiiiiiiiiiiidd"
.align 8
.LC1:
.string "_Z20calculate_inner_gridPdS_S_iii"
.text
.type _ZL24__sti____cudaRegisterAllv, @function
_ZL24__sti____cudaRegisterAllv:
.LFB2056:
.cfi_startproc
endbr64
pushq %rbx
.cfi_def_cfa_offset 16
.cfi_offset 3, -16
leaq _ZL15__fatDeviceText(%rip), %rdi
call __cudaRegisterFatBinary@PLT
movq %rax, %rbx
movq %rax, _ZL20__cudaFatCubinHandle(%rip)
pushq $0
.cfi_def_cfa_offset 24
pushq $0
.cfi_def_cfa_offset 32
pushq $0
.cfi_def_cfa_offset 40
pushq $0
.cfi_def_cfa_offset 48
movl $0, %r9d
movl $-1, %r8d
leaq .LC0(%rip), %rdx
movq %rdx, %rcx
leaq _Z10first_stepPdS_iiiddddddiiiiiiiiiiiidd(%rip), %rsi
movq %rax, %rdi
call __cudaRegisterFunction@PLT
addq $32, %rsp
.cfi_def_cfa_offset 16
pushq $0
.cfi_def_cfa_offset 24
pushq $0
.cfi_def_cfa_offset 32
pushq $0
.cfi_def_cfa_offset 40
pushq $0
.cfi_def_cfa_offset 48
movl $0, %r9d
movl $-1, %r8d
leaq .LC1(%rip), %rdx
movq %rdx, %rcx
leaq _Z20calculate_inner_gridPdS_S_iii(%rip), %rsi
movq %rbx, %rdi
call __cudaRegisterFunction@PLT
addq $32, %rsp
.cfi_def_cfa_offset 16
movq _ZL20__cudaFatCubinHandle(%rip), %rdi
call __cudaRegisterFatBinaryEnd@PLT
leaq _ZL26__cudaUnregisterBinaryUtilv(%rip), %rdi
call atexit@PLT
popq %rbx
.cfi_def_cfa_offset 8
ret
.cfi_endproc
.LFE2056:
.size _ZL24__sti____cudaRegisterAllv, .-_ZL24__sti____cudaRegisterAllv
.section .init_array,"aw"
.align 8
.quad _ZL24__sti____cudaRegisterAllv
.section .nvFatBinSegment,"aw"
.align 8
.type _ZL15__fatDeviceText, @object
.size _ZL15__fatDeviceText, 24
_ZL15__fatDeviceText:
.long 1180844977
.long 1
.quad fatbinData
.quad 0
.local _ZL20__cudaFatCubinHandle
.comm _ZL20__cudaFatCubinHandle,8,8
.ident "GCC: (Ubuntu 13.3.0-6ubuntu2~24.04) 13.3.0"
.section .note.GNU-stack,"",@progbits
.section .note.gnu.property,"a"
.align 8
.long 1f - 0f
.long 4f - 1f
.long 5
0:
.string "GNU"
1:
.align 8
.long 0xc0000002
.long 3f - 2f
2:
.long 0x3
3:
.align 8
4: | .text
.file "cuda_utils.hip"
.globl _Z35__device_stub__calculate_inner_gridPdS_S_iii # -- Begin function _Z35__device_stub__calculate_inner_gridPdS_S_iii
.p2align 4, 0x90
.type _Z35__device_stub__calculate_inner_gridPdS_S_iii,@function
_Z35__device_stub__calculate_inner_gridPdS_S_iii: # @_Z35__device_stub__calculate_inner_gridPdS_S_iii
.cfi_startproc
# %bb.0:
subq $152, %rsp
.cfi_def_cfa_offset 160
movq %rdi, 88(%rsp)
movq %rsi, 80(%rsp)
movq %rdx, 72(%rsp)
movl %ecx, 20(%rsp)
movl %r8d, 16(%rsp)
movl %r9d, 12(%rsp)
leaq 88(%rsp), %rax
movq %rax, 96(%rsp)
leaq 80(%rsp), %rax
movq %rax, 104(%rsp)
leaq 72(%rsp), %rax
movq %rax, 112(%rsp)
leaq 20(%rsp), %rax
movq %rax, 120(%rsp)
leaq 16(%rsp), %rax
movq %rax, 128(%rsp)
leaq 12(%rsp), %rax
movq %rax, 136(%rsp)
leaq 56(%rsp), %rdi
leaq 40(%rsp), %rsi
leaq 32(%rsp), %rdx
leaq 24(%rsp), %rcx
callq __hipPopCallConfiguration
movq 56(%rsp), %rsi
movl 64(%rsp), %edx
movq 40(%rsp), %rcx
movl 48(%rsp), %r8d
leaq 96(%rsp), %r9
movl $_Z20calculate_inner_gridPdS_S_iii, %edi
pushq 24(%rsp)
.cfi_adjust_cfa_offset 8
pushq 40(%rsp)
.cfi_adjust_cfa_offset 8
callq hipLaunchKernel
addq $168, %rsp
.cfi_adjust_cfa_offset -168
retq
.Lfunc_end0:
.size _Z35__device_stub__calculate_inner_gridPdS_S_iii, .Lfunc_end0-_Z35__device_stub__calculate_inner_gridPdS_S_iii
.cfi_endproc
# -- End function
.globl _Z25__device_stub__first_stepPdS_iiiddddddiiiiiiiiiiiidd # -- Begin function _Z25__device_stub__first_stepPdS_iiiddddddiiiiiiiiiiiidd
.p2align 4, 0x90
.type _Z25__device_stub__first_stepPdS_iiiddddddiiiiiiiiiiiidd,@function
_Z25__device_stub__first_stepPdS_iiiddddddiiiiiiiiiiiidd: # @_Z25__device_stub__first_stepPdS_iiiddddddiiiiiiiiiiiidd
.cfi_startproc
# %bb.0:
subq $344, %rsp # imm = 0x158
.cfi_def_cfa_offset 352
movq %rdi, 136(%rsp)
movq %rsi, 128(%rsp)
movl %edx, 12(%rsp)
movl %ecx, 8(%rsp)
movl %r8d, 4(%rsp)
movsd %xmm0, 120(%rsp)
movsd %xmm1, 112(%rsp)
movsd %xmm2, 104(%rsp)
movsd %xmm3, 96(%rsp)
movsd %xmm4, 88(%rsp)
movsd %xmm5, 80(%rsp)
movl %r9d, (%rsp)
movsd %xmm6, 72(%rsp)
movsd %xmm7, 64(%rsp)
leaq 136(%rsp), %rax
movq %rax, 144(%rsp)
leaq 128(%rsp), %rax
movq %rax, 152(%rsp)
leaq 12(%rsp), %rax
movq %rax, 160(%rsp)
leaq 8(%rsp), %rax
movq %rax, 168(%rsp)
leaq 4(%rsp), %rax
movq %rax, 176(%rsp)
leaq 120(%rsp), %rax
movq %rax, 184(%rsp)
leaq 112(%rsp), %rax
movq %rax, 192(%rsp)
leaq 104(%rsp), %rax
movq %rax, 200(%rsp)
leaq 96(%rsp), %rax
movq %rax, 208(%rsp)
leaq 88(%rsp), %rax
movq %rax, 216(%rsp)
leaq 80(%rsp), %rax
movq %rax, 224(%rsp)
movq %rsp, %rax
movq %rax, 232(%rsp)
leaq 352(%rsp), %rax
movq %rax, 240(%rsp)
leaq 360(%rsp), %rax
movq %rax, 248(%rsp)
leaq 368(%rsp), %rax
movq %rax, 256(%rsp)
leaq 376(%rsp), %rax
movq %rax, 264(%rsp)
leaq 384(%rsp), %rax
movq %rax, 272(%rsp)
leaq 392(%rsp), %rax
movq %rax, 280(%rsp)
leaq 400(%rsp), %rax
movq %rax, 288(%rsp)
leaq 408(%rsp), %rax
movq %rax, 296(%rsp)
leaq 416(%rsp), %rax
movq %rax, 304(%rsp)
leaq 424(%rsp), %rax
movq %rax, 312(%rsp)
leaq 432(%rsp), %rax
movq %rax, 320(%rsp)
leaq 72(%rsp), %rax
movq %rax, 328(%rsp)
leaq 64(%rsp), %rax
movq %rax, 336(%rsp)
leaq 48(%rsp), %rdi
leaq 32(%rsp), %rsi
leaq 24(%rsp), %rdx
leaq 16(%rsp), %rcx
callq __hipPopCallConfiguration
movq 48(%rsp), %rsi
movl 56(%rsp), %edx
movq 32(%rsp), %rcx
movl 40(%rsp), %r8d
leaq 144(%rsp), %r9
movl $_Z10first_stepPdS_iiiddddddiiiiiiiiiiiidd, %edi
pushq 16(%rsp)
.cfi_adjust_cfa_offset 8
pushq 32(%rsp)
.cfi_adjust_cfa_offset 8
callq hipLaunchKernel
addq $360, %rsp # imm = 0x168
.cfi_adjust_cfa_offset -360
retq
.Lfunc_end1:
.size _Z25__device_stub__first_stepPdS_iiiddddddiiiiiiiiiiiidd, .Lfunc_end1-_Z25__device_stub__first_stepPdS_iiiddddddiiiiiiiiiiiidd
.cfi_endproc
# -- End function
.p2align 4, 0x90 # -- Begin function __hip_module_ctor
.type __hip_module_ctor,@function
__hip_module_ctor: # @__hip_module_ctor
.cfi_startproc
# %bb.0:
pushq %rbx
.cfi_def_cfa_offset 16
subq $32, %rsp
.cfi_def_cfa_offset 48
.cfi_offset %rbx, -16
cmpq $0, __hip_gpubin_handle(%rip)
jne .LBB2_2
# %bb.1:
movl $__hip_fatbin_wrapper, %edi
callq __hipRegisterFatBinary
movq %rax, __hip_gpubin_handle(%rip)
.LBB2_2:
movq __hip_gpubin_handle(%rip), %rbx
xorps %xmm0, %xmm0
movups %xmm0, 16(%rsp)
movups %xmm0, (%rsp)
movl $_Z20calculate_inner_gridPdS_S_iii, %esi
movl $.L__unnamed_1, %edx
movl $.L__unnamed_1, %ecx
movq %rbx, %rdi
movl $-1, %r8d
xorl %r9d, %r9d
callq __hipRegisterFunction
xorps %xmm0, %xmm0
movups %xmm0, 16(%rsp)
movups %xmm0, (%rsp)
movl $_Z10first_stepPdS_iiiddddddiiiiiiiiiiiidd, %esi
movl $.L__unnamed_2, %edx
movl $.L__unnamed_2, %ecx
movq %rbx, %rdi
movl $-1, %r8d
xorl %r9d, %r9d
callq __hipRegisterFunction
movl $__hip_module_dtor, %edi
addq $32, %rsp
.cfi_def_cfa_offset 16
popq %rbx
.cfi_def_cfa_offset 8
jmp atexit # TAILCALL
.Lfunc_end2:
.size __hip_module_ctor, .Lfunc_end2-__hip_module_ctor
.cfi_endproc
# -- End function
.p2align 4, 0x90 # -- Begin function __hip_module_dtor
.type __hip_module_dtor,@function
__hip_module_dtor: # @__hip_module_dtor
.cfi_startproc
# %bb.0:
movq __hip_gpubin_handle(%rip), %rdi
testq %rdi, %rdi
je .LBB3_2
# %bb.1:
pushq %rax
.cfi_def_cfa_offset 16
callq __hipUnregisterFatBinary
movq $0, __hip_gpubin_handle(%rip)
addq $8, %rsp
.cfi_def_cfa_offset 8
.LBB3_2:
retq
.Lfunc_end3:
.size __hip_module_dtor, .Lfunc_end3-__hip_module_dtor
.cfi_endproc
# -- End function
.type _Z20calculate_inner_gridPdS_S_iii,@object # @_Z20calculate_inner_gridPdS_S_iii
.section .rodata,"a",@progbits
.globl _Z20calculate_inner_gridPdS_S_iii
.p2align 3, 0x0
_Z20calculate_inner_gridPdS_S_iii:
.quad _Z35__device_stub__calculate_inner_gridPdS_S_iii
.size _Z20calculate_inner_gridPdS_S_iii, 8
.type _Z10first_stepPdS_iiiddddddiiiiiiiiiiiidd,@object # @_Z10first_stepPdS_iiiddddddiiiiiiiiiiiidd
.globl _Z10first_stepPdS_iiiddddddiiiiiiiiiiiidd
.p2align 3, 0x0
_Z10first_stepPdS_iiiddddddiiiiiiiiiiiidd:
.quad _Z25__device_stub__first_stepPdS_iiiddddddiiiiiiiiiiiidd
.size _Z10first_stepPdS_iiiddddddiiiiiiiiiiiidd, 8
.type .L__unnamed_1,@object # @0
.section .rodata.str1.1,"aMS",@progbits,1
.L__unnamed_1:
.asciz "_Z20calculate_inner_gridPdS_S_iii"
.size .L__unnamed_1, 34
.type .L__unnamed_2,@object # @1
.L__unnamed_2:
.asciz "_Z10first_stepPdS_iiiddddddiiiiiiiiiiiidd"
.size .L__unnamed_2, 42
.type __hip_fatbin_wrapper,@object # @__hip_fatbin_wrapper
.section .hipFatBinSegment,"a",@progbits
.p2align 3, 0x0
__hip_fatbin_wrapper:
.long 1212764230 # 0x48495046
.long 1 # 0x1
.quad __hip_fatbin
.quad 0
.size __hip_fatbin_wrapper, 24
.type __hip_gpubin_handle,@object # @__hip_gpubin_handle
.local __hip_gpubin_handle
.comm __hip_gpubin_handle,8,8
.section .init_array,"aw",@init_array
.p2align 3, 0x0
.quad __hip_module_ctor
.type __hip_cuid_,@object # @__hip_cuid_
.bss
.globl __hip_cuid_
__hip_cuid_:
.byte 0 # 0x0
.size __hip_cuid_, 1
.section ".linker-options","e",@llvm_linker_options
.ident "AMD clang version 18.0.0git (https://github.com/RadeonOpenCompute/llvm-project roc-6.3.2 25012 e5bf7e55c91490b07c49d8960fa7983d864936c4)"
.section ".note.GNU-stack","",@progbits
.addrsig
.addrsig_sym _Z35__device_stub__calculate_inner_gridPdS_S_iii
.addrsig_sym _Z25__device_stub__first_stepPdS_iiiddddddiiiiiiiiiiiidd
.addrsig_sym __hip_module_ctor
.addrsig_sym __hip_module_dtor
.addrsig_sym _Z20calculate_inner_gridPdS_S_iii
.addrsig_sym _Z10first_stepPdS_iiiddddddiiiiiiiiiiiidd
.addrsig_sym __hip_fatbin
.addrsig_sym __hip_fatbin_wrapper
.addrsig_sym __hip_cuid_ |
You are a helpful coding assistant specialized in converting CUDA source code to CUDA device assembly. | #include "float3math.cuh" | code for sm_80 |
You are a helpful coding assistant specialized in converting CUDA source code to CUDA host assembly. | #include "float3math.cuh" | .file "tmpxft_0005cdcb_00000000-6_float3math.cudafe1.cpp"
.text
#APP
#NO_APP
.type _ZL26__cudaUnregisterBinaryUtilv, @function
_ZL26__cudaUnregisterBinaryUtilv:
.LFB2032:
.cfi_startproc
endbr64
subq $8, %rsp
.cfi_def_cfa_offset 16
movq _ZL20__cudaFatCubinHandle(%rip), %rdi
call __cudaUnregisterFatBinary@PLT
addq $8, %rsp
.cfi_def_cfa_offset 8
ret
.cfi_endproc
.LFE2032:
.size _ZL26__cudaUnregisterBinaryUtilv, .-_ZL26__cudaUnregisterBinaryUtilv
.type _ZL24__sti____cudaRegisterAllv, @function
_ZL24__sti____cudaRegisterAllv:
.LFB2055:
.cfi_startproc
endbr64
subq $8, %rsp
.cfi_def_cfa_offset 16
leaq _ZL15__fatDeviceText(%rip), %rdi
call __cudaRegisterFatBinary@PLT
movq %rax, %rdi
movq %rax, _ZL20__cudaFatCubinHandle(%rip)
call __cudaRegisterFatBinaryEnd@PLT
leaq _ZL26__cudaUnregisterBinaryUtilv(%rip), %rdi
call atexit@PLT
addq $8, %rsp
.cfi_def_cfa_offset 8
ret
.cfi_endproc
.LFE2055:
.size _ZL24__sti____cudaRegisterAllv, .-_ZL24__sti____cudaRegisterAllv
.section .init_array,"aw"
.align 8
.quad _ZL24__sti____cudaRegisterAllv
.section .nvFatBinSegment,"aw"
.align 8
.type _ZL15__fatDeviceText, @object
.size _ZL15__fatDeviceText, 24
_ZL15__fatDeviceText:
.long 1180844977
.long 1
.quad fatbinData
.quad 0
.local _ZL20__cudaFatCubinHandle
.comm _ZL20__cudaFatCubinHandle,8,8
.ident "GCC: (Ubuntu 13.3.0-6ubuntu2~24.04) 13.3.0"
.section .note.GNU-stack,"",@progbits
.section .note.gnu.property,"a"
.align 8
.long 1f - 0f
.long 4f - 1f
.long 5
0:
.string "GNU"
1:
.align 8
.long 0xc0000002
.long 3f - 2f
2:
.long 0x3
3:
.align 8
4: |
You are a helpful coding assistant specialized in converting CUDA source code to HIP/AMD source code. | #include "float3math.cuh" | #ifndef _FLOAT_MATH_H
#define _FLOAT_MATH_H
#include <hip/hip_runtime.h>
#include <hip/hip_vector_types.h>
#include <stdint.h>
typedef struct {
float3 value;
uint32_t i;
} float3idx;
__host__ __device__
inline float dot (float3 a, float3 b) {
return a.x*b.x + a.y*b.y + a.z*b.z;
}
__host__ __device__
inline float3 cross (float3 a, float3 b) {
float3 result = {
a.y*b.z - a.z*b.y,
a.z*b.x - a.x*b.z,
a.x*b.y - a.y*b.x
};
return result;
}
__host__ __device__
inline float3 normalize(float3 a) {
float scale = 1.0/sqrt(dot(a,a));
float3 result = {a.x*scale, a.y*scale, a.z*scale};
return result;
}
#endif |
You are a helpful coding assistant specialized in converting HIP source code to AMD device assembly. | #ifndef _FLOAT_MATH_H
#define _FLOAT_MATH_H
#include <hip/hip_runtime.h>
#include <hip/hip_vector_types.h>
#include <stdint.h>
typedef struct {
float3 value;
uint32_t i;
} float3idx;
__host__ __device__
inline float dot (float3 a, float3 b) {
return a.x*b.x + a.y*b.y + a.z*b.z;
}
__host__ __device__
inline float3 cross (float3 a, float3 b) {
float3 result = {
a.y*b.z - a.z*b.y,
a.z*b.x - a.x*b.z,
a.x*b.y - a.y*b.x
};
return result;
}
__host__ __device__
inline float3 normalize(float3 a) {
float scale = 1.0/sqrt(dot(a,a));
float3 result = {a.x*scale, a.y*scale, a.z*scale};
return result;
}
#endif | .text
.p2alignl 7, 3214868480
.fill 96, 4, 3214868480
.type __hip_cuid_,@object
.section .bss,"aw",@nobits
.globl __hip_cuid_
__hip_cuid_:
.byte 0
.size __hip_cuid_, 1
.ident "AMD clang version 18.0.0git (https://github.com/RadeonOpenCompute/llvm-project roc-6.3.2 25012 e5bf7e55c91490b07c49d8960fa7983d864936c4)"
.section ".note.GNU-stack","",@progbits
.addrsig
.addrsig_sym __hip_cuid_
.amdgcn_target "amdgcn-amd-amdhsa--gfx1100"
.amdgpu_metadata
---
amdhsa.kernels: []
amdhsa.target: amdgcn-amd-amdhsa--gfx1100
amdhsa.version:
- 1
- 2
...
.end_amdgpu_metadata |
You are a helpful coding assistant specialized in converting HIP source code to AMD host assembly. | #ifndef _FLOAT_MATH_H
#define _FLOAT_MATH_H
#include <hip/hip_runtime.h>
#include <hip/hip_vector_types.h>
#include <stdint.h>
typedef struct {
float3 value;
uint32_t i;
} float3idx;
__host__ __device__
inline float dot (float3 a, float3 b) {
return a.x*b.x + a.y*b.y + a.z*b.z;
}
__host__ __device__
inline float3 cross (float3 a, float3 b) {
float3 result = {
a.y*b.z - a.z*b.y,
a.z*b.x - a.x*b.z,
a.x*b.y - a.y*b.x
};
return result;
}
__host__ __device__
inline float3 normalize(float3 a) {
float scale = 1.0/sqrt(dot(a,a));
float3 result = {a.x*scale, a.y*scale, a.z*scale};
return result;
}
#endif | .text
.file "float3math.hip"
.type __hip_cuid_,@object # @__hip_cuid_
.bss
.globl __hip_cuid_
__hip_cuid_:
.byte 0 # 0x0
.size __hip_cuid_, 1
.section ".linker-options","e",@llvm_linker_options
.ident "AMD clang version 18.0.0git (https://github.com/RadeonOpenCompute/llvm-project roc-6.3.2 25012 e5bf7e55c91490b07c49d8960fa7983d864936c4)"
.section ".note.GNU-stack","",@progbits
.addrsig
.addrsig_sym __hip_cuid_ |
You are a helpful coding assistant specialized in converting from CUDA device assembly to AMD device assembly. | code for sm_80 | .text
.p2alignl 7, 3214868480
.fill 96, 4, 3214868480
.type __hip_cuid_,@object
.section .bss,"aw",@nobits
.globl __hip_cuid_
__hip_cuid_:
.byte 0
.size __hip_cuid_, 1
.ident "AMD clang version 18.0.0git (https://github.com/RadeonOpenCompute/llvm-project roc-6.3.2 25012 e5bf7e55c91490b07c49d8960fa7983d864936c4)"
.section ".note.GNU-stack","",@progbits
.addrsig
.addrsig_sym __hip_cuid_
.amdgcn_target "amdgcn-amd-amdhsa--gfx1100"
.amdgpu_metadata
---
amdhsa.kernels: []
amdhsa.target: amdgcn-amd-amdhsa--gfx1100
amdhsa.version:
- 1
- 2
...
.end_amdgpu_metadata |
You are a helpful coding assistant specialized in converting from CUDA host assembly to AMD host assembly. | .file "tmpxft_0005cdcb_00000000-6_float3math.cudafe1.cpp"
.text
#APP
#NO_APP
.type _ZL26__cudaUnregisterBinaryUtilv, @function
_ZL26__cudaUnregisterBinaryUtilv:
.LFB2032:
.cfi_startproc
endbr64
subq $8, %rsp
.cfi_def_cfa_offset 16
movq _ZL20__cudaFatCubinHandle(%rip), %rdi
call __cudaUnregisterFatBinary@PLT
addq $8, %rsp
.cfi_def_cfa_offset 8
ret
.cfi_endproc
.LFE2032:
.size _ZL26__cudaUnregisterBinaryUtilv, .-_ZL26__cudaUnregisterBinaryUtilv
.type _ZL24__sti____cudaRegisterAllv, @function
_ZL24__sti____cudaRegisterAllv:
.LFB2055:
.cfi_startproc
endbr64
subq $8, %rsp
.cfi_def_cfa_offset 16
leaq _ZL15__fatDeviceText(%rip), %rdi
call __cudaRegisterFatBinary@PLT
movq %rax, %rdi
movq %rax, _ZL20__cudaFatCubinHandle(%rip)
call __cudaRegisterFatBinaryEnd@PLT
leaq _ZL26__cudaUnregisterBinaryUtilv(%rip), %rdi
call atexit@PLT
addq $8, %rsp
.cfi_def_cfa_offset 8
ret
.cfi_endproc
.LFE2055:
.size _ZL24__sti____cudaRegisterAllv, .-_ZL24__sti____cudaRegisterAllv
.section .init_array,"aw"
.align 8
.quad _ZL24__sti____cudaRegisterAllv
.section .nvFatBinSegment,"aw"
.align 8
.type _ZL15__fatDeviceText, @object
.size _ZL15__fatDeviceText, 24
_ZL15__fatDeviceText:
.long 1180844977
.long 1
.quad fatbinData
.quad 0
.local _ZL20__cudaFatCubinHandle
.comm _ZL20__cudaFatCubinHandle,8,8
.ident "GCC: (Ubuntu 13.3.0-6ubuntu2~24.04) 13.3.0"
.section .note.GNU-stack,"",@progbits
.section .note.gnu.property,"a"
.align 8
.long 1f - 0f
.long 4f - 1f
.long 5
0:
.string "GNU"
1:
.align 8
.long 0xc0000002
.long 3f - 2f
2:
.long 0x3
3:
.align 8
4: | .text
.file "float3math.hip"
.type __hip_cuid_,@object # @__hip_cuid_
.bss
.globl __hip_cuid_
__hip_cuid_:
.byte 0 # 0x0
.size __hip_cuid_, 1
.section ".linker-options","e",@llvm_linker_options
.ident "AMD clang version 18.0.0git (https://github.com/RadeonOpenCompute/llvm-project roc-6.3.2 25012 e5bf7e55c91490b07c49d8960fa7983d864936c4)"
.section ".note.GNU-stack","",@progbits
.addrsig
.addrsig_sym __hip_cuid_ |
You are a helpful coding assistant specialized in converting CUDA source code to CUDA device assembly. | /*
@Author: 3sne ( Mukur Panchani )
@FileName: q4MatrixTranspose.cu
@Task: CUDA program compute transpose of a matrix parallely.
*/
#include <stdio.h>
#include <stdlib.h>
#include <cuda_runtime.h>
__global__ void transpose(int *a, int *b, int m, int n) {
/*
Generates b: transpose of a
*/
int ci = threadIdx.x;
int ri = threadIdx.y;
b[ci * m + ri] = a[ri * n + ci];
}
int main() {
int *matA, *matB;
int *da, *db;
int m, n;
printf("== Enter Dimension of Matrix A (m x n) ==\n");
printf("m >> "); scanf("%d", &m);
printf("n >> "); scanf("%d", &n);
matA = (int*)malloc(sizeof(int) * m * n);
matB = (int*)malloc(sizeof(int) * m * n);
printf("== Matrix A Elements ==\n");
for(int i = 0; i < m * n; i++) {
scanf("%d", &matA[i]);
}
cudaMalloc((void **)&da, sizeof(int) * m * n);
cudaMalloc((void **)&db, sizeof(int) * m * n);
cudaMemcpy(da, matA, sizeof(int) * m * n, cudaMemcpyHostToDevice);
dim3 block_conf (n, m);
transpose<<<1, block_conf>>>(da, db, m, n);
cudaMemcpy(matB, db, sizeof(int) * m * n, cudaMemcpyDeviceToHost);
printf("== Matrix B Elements ==\n");
for ( int i = 0; i < n; i++ ) {
for ( int j = 0; j < m; j++ ) {
printf("%d ", matB[i * m + j]);
}
printf("\n");
}
cudaFree(da);
cudaFree(db);
free(matA);
free(matB);
return 0;
} | code for sm_80
Function : _Z9transposePiS_ii
.headerflags @"EF_CUDA_TEXMODE_UNIFIED EF_CUDA_64BIT_ADDRESS EF_CUDA_SM80 EF_CUDA_VIRTUAL_SM(EF_CUDA_SM80)"
/*0000*/ MOV R1, c[0x0][0x28] ; /* 0x00000a0000017a02 */
/* 0x000fe40000000f00 */
/*0010*/ S2R R4, SR_TID.X ; /* 0x0000000000047919 */
/* 0x000e220000002100 */
/*0020*/ HFMA2.MMA R7, -RZ, RZ, 0, 2.384185791015625e-07 ; /* 0x00000004ff077435 */
/* 0x000fe200000001ff */
/*0030*/ ULDC.64 UR4, c[0x0][0x118] ; /* 0x0000460000047ab9 */
/* 0x000fe40000000a00 */
/*0040*/ S2R R5, SR_TID.Y ; /* 0x0000000000057919 */
/* 0x000e240000002200 */
/*0050*/ IMAD R2, R5, c[0x0][0x174], R4 ; /* 0x00005d0005027a24 */
/* 0x001fca00078e0204 */
/*0060*/ IMAD.WIDE R2, R2, R7, c[0x0][0x160] ; /* 0x0000580002027625 */
/* 0x000fcc00078e0207 */
/*0070*/ LDG.E R3, [R2.64] ; /* 0x0000000402037981 */
/* 0x000ea2000c1e1900 */
/*0080*/ IMAD R4, R4, c[0x0][0x170], R5 ; /* 0x00005c0004047a24 */
/* 0x000fc800078e0205 */
/*0090*/ IMAD.WIDE R4, R4, R7, c[0x0][0x168] ; /* 0x00005a0004047625 */
/* 0x000fca00078e0207 */
/*00a0*/ STG.E [R4.64], R3 ; /* 0x0000000304007986 */
/* 0x004fe2000c101904 */
/*00b0*/ EXIT ; /* 0x000000000000794d */
/* 0x000fea0003800000 */
/*00c0*/ BRA 0xc0; /* 0xfffffff000007947 */
/* 0x000fc0000383ffff */
/*00d0*/ NOP; /* 0x0000000000007918 */
/* 0x000fc00000000000 */
/*00e0*/ NOP; /* 0x0000000000007918 */
/* 0x000fc00000000000 */
/*00f0*/ NOP; /* 0x0000000000007918 */
/* 0x000fc00000000000 */
/*0100*/ NOP; /* 0x0000000000007918 */
/* 0x000fc00000000000 */
/*0110*/ NOP; /* 0x0000000000007918 */
/* 0x000fc00000000000 */
/*0120*/ NOP; /* 0x0000000000007918 */
/* 0x000fc00000000000 */
/*0130*/ NOP; /* 0x0000000000007918 */
/* 0x000fc00000000000 */
/*0140*/ NOP; /* 0x0000000000007918 */
/* 0x000fc00000000000 */
/*0150*/ NOP; /* 0x0000000000007918 */
/* 0x000fc00000000000 */
/*0160*/ NOP; /* 0x0000000000007918 */
/* 0x000fc00000000000 */
/*0170*/ NOP; /* 0x0000000000007918 */
/* 0x000fc00000000000 */
.......... |
You are a helpful coding assistant specialized in converting CUDA source code to CUDA host assembly. | /*
@Author: 3sne ( Mukur Panchani )
@FileName: q4MatrixTranspose.cu
@Task: CUDA program compute transpose of a matrix parallely.
*/
#include <stdio.h>
#include <stdlib.h>
#include <cuda_runtime.h>
__global__ void transpose(int *a, int *b, int m, int n) {
/*
Generates b: transpose of a
*/
int ci = threadIdx.x;
int ri = threadIdx.y;
b[ci * m + ri] = a[ri * n + ci];
}
int main() {
int *matA, *matB;
int *da, *db;
int m, n;
printf("== Enter Dimension of Matrix A (m x n) ==\n");
printf("m >> "); scanf("%d", &m);
printf("n >> "); scanf("%d", &n);
matA = (int*)malloc(sizeof(int) * m * n);
matB = (int*)malloc(sizeof(int) * m * n);
printf("== Matrix A Elements ==\n");
for(int i = 0; i < m * n; i++) {
scanf("%d", &matA[i]);
}
cudaMalloc((void **)&da, sizeof(int) * m * n);
cudaMalloc((void **)&db, sizeof(int) * m * n);
cudaMemcpy(da, matA, sizeof(int) * m * n, cudaMemcpyHostToDevice);
dim3 block_conf (n, m);
transpose<<<1, block_conf>>>(da, db, m, n);
cudaMemcpy(matB, db, sizeof(int) * m * n, cudaMemcpyDeviceToHost);
printf("== Matrix B Elements ==\n");
for ( int i = 0; i < n; i++ ) {
for ( int j = 0; j < m; j++ ) {
printf("%d ", matB[i * m + j]);
}
printf("\n");
}
cudaFree(da);
cudaFree(db);
free(matA);
free(matB);
return 0;
} | .file "tmpxft_00118a89_00000000-6_q4MatrixTranspose.cudafe1.cpp"
.text
#APP
#NO_APP
.type _ZL26__cudaUnregisterBinaryUtilv, @function
_ZL26__cudaUnregisterBinaryUtilv:
.LFB2060:
.cfi_startproc
endbr64
subq $8, %rsp
.cfi_def_cfa_offset 16
movq _ZL20__cudaFatCubinHandle(%rip), %rdi
call __cudaUnregisterFatBinary@PLT
addq $8, %rsp
.cfi_def_cfa_offset 8
ret
.cfi_endproc
.LFE2060:
.size _ZL26__cudaUnregisterBinaryUtilv, .-_ZL26__cudaUnregisterBinaryUtilv
.globl _Z32__device_stub__Z9transposePiS_iiPiS_ii
.type _Z32__device_stub__Z9transposePiS_iiPiS_ii, @function
_Z32__device_stub__Z9transposePiS_iiPiS_ii:
.LFB2082:
.cfi_startproc
endbr64
subq $152, %rsp
.cfi_def_cfa_offset 160
movq %rdi, 24(%rsp)
movq %rsi, 16(%rsp)
movl %edx, 12(%rsp)
movl %ecx, 8(%rsp)
movq %fs:40, %rax
movq %rax, 136(%rsp)
xorl %eax, %eax
leaq 24(%rsp), %rax
movq %rax, 96(%rsp)
leaq 16(%rsp), %rax
movq %rax, 104(%rsp)
leaq 12(%rsp), %rax
movq %rax, 112(%rsp)
leaq 8(%rsp), %rax
movq %rax, 120(%rsp)
movl $1, 48(%rsp)
movl $1, 52(%rsp)
movl $1, 56(%rsp)
movl $1, 60(%rsp)
movl $1, 64(%rsp)
movl $1, 68(%rsp)
leaq 40(%rsp), %rcx
leaq 32(%rsp), %rdx
leaq 60(%rsp), %rsi
leaq 48(%rsp), %rdi
call __cudaPopCallConfiguration@PLT
testl %eax, %eax
je .L7
.L3:
movq 136(%rsp), %rax
subq %fs:40, %rax
jne .L8
addq $152, %rsp
.cfi_remember_state
.cfi_def_cfa_offset 8
ret
.L7:
.cfi_restore_state
pushq 40(%rsp)
.cfi_def_cfa_offset 168
pushq 40(%rsp)
.cfi_def_cfa_offset 176
leaq 112(%rsp), %r9
movq 76(%rsp), %rcx
movl 84(%rsp), %r8d
movq 64(%rsp), %rsi
movl 72(%rsp), %edx
leaq _Z9transposePiS_ii(%rip), %rdi
call cudaLaunchKernel@PLT
addq $16, %rsp
.cfi_def_cfa_offset 160
jmp .L3
.L8:
call __stack_chk_fail@PLT
.cfi_endproc
.LFE2082:
.size _Z32__device_stub__Z9transposePiS_iiPiS_ii, .-_Z32__device_stub__Z9transposePiS_iiPiS_ii
.globl _Z9transposePiS_ii
.type _Z9transposePiS_ii, @function
_Z9transposePiS_ii:
.LFB2083:
.cfi_startproc
endbr64
subq $8, %rsp
.cfi_def_cfa_offset 16
call _Z32__device_stub__Z9transposePiS_iiPiS_ii
addq $8, %rsp
.cfi_def_cfa_offset 8
ret
.cfi_endproc
.LFE2083:
.size _Z9transposePiS_ii, .-_Z9transposePiS_ii
.section .rodata.str1.8,"aMS",@progbits,1
.align 8
.LC0:
.string "== Enter Dimension of Matrix A (m x n) ==\n"
.section .rodata.str1.1,"aMS",@progbits,1
.LC1:
.string "m >> "
.LC2:
.string "%d"
.LC3:
.string "n >> "
.LC4:
.string "== Matrix A Elements ==\n"
.LC5:
.string "== Matrix B Elements ==\n"
.LC6:
.string "%d "
.LC7:
.string "\n"
.text
.globl main
.type main, @function
main:
.LFB2057:
.cfi_startproc
endbr64
pushq %r15
.cfi_def_cfa_offset 16
.cfi_offset 15, -16
pushq %r14
.cfi_def_cfa_offset 24
.cfi_offset 14, -24
pushq %r13
.cfi_def_cfa_offset 32
.cfi_offset 13, -32
pushq %r12
.cfi_def_cfa_offset 40
.cfi_offset 12, -40
pushq %rbp
.cfi_def_cfa_offset 48
.cfi_offset 6, -48
pushq %rbx
.cfi_def_cfa_offset 56
.cfi_offset 3, -56
subq $72, %rsp
.cfi_def_cfa_offset 128
movq %fs:40, %rax
movq %rax, 56(%rsp)
xorl %eax, %eax
leaq .LC0(%rip), %rsi
movl $2, %edi
call __printf_chk@PLT
leaq .LC1(%rip), %rsi
movl $2, %edi
movl $0, %eax
call __printf_chk@PLT
leaq 8(%rsp), %rsi
leaq .LC2(%rip), %rbx
movq %rbx, %rdi
movl $0, %eax
call __isoc23_scanf@PLT
leaq .LC3(%rip), %rsi
movl $2, %edi
movl $0, %eax
call __printf_chk@PLT
leaq 12(%rsp), %rsi
movq %rbx, %rdi
movl $0, %eax
call __isoc23_scanf@PLT
movslq 8(%rsp), %rbx
movslq 12(%rsp), %rax
imulq %rax, %rbx
salq $2, %rbx
movq %rbx, %rdi
call malloc@PLT
movq %rax, %r15
movq %rbx, %rdi
call malloc@PLT
movq %rax, %r12
leaq .LC4(%rip), %rsi
movl $2, %edi
movl $0, %eax
call __printf_chk@PLT
movl 8(%rsp), %eax
movl 12(%rsp), %edx
movl %eax, %ecx
imull %edx, %ecx
testl %ecx, %ecx
jle .L12
movq %r15, %rbp
movl $0, %ebx
leaq .LC2(%rip), %r13
.L13:
movq %rbp, %rsi
movq %r13, %rdi
movl $0, %eax
call __isoc23_scanf@PLT
addl $1, %ebx
movl 8(%rsp), %eax
movl 12(%rsp), %edx
addq $4, %rbp
movl %eax, %ecx
imull %edx, %ecx
cmpl %ebx, %ecx
jg .L13
.L12:
cltq
movslq %edx, %rdx
imulq %rdx, %rax
leaq 0(,%rax,4), %rsi
leaq 16(%rsp), %rdi
call cudaMalloc@PLT
movslq 8(%rsp), %rsi
movslq 12(%rsp), %rax
imulq %rax, %rsi
salq $2, %rsi
leaq 24(%rsp), %rdi
call cudaMalloc@PLT
movslq 8(%rsp), %rdx
movslq 12(%rsp), %rax
imulq %rax, %rdx
salq $2, %rdx
movl $1, %ecx
movq %r15, %rsi
movq 16(%rsp), %rdi
call cudaMemcpy@PLT
movl 12(%rsp), %eax
movl %eax, 32(%rsp)
movl 8(%rsp), %eax
movl %eax, 36(%rsp)
movl $1, 44(%rsp)
movl $1, 48(%rsp)
movl $0, %r9d
movl $0, %r8d
movq 32(%rsp), %rdx
movl $1, %ecx
movq 44(%rsp), %rdi
movl $1, %esi
call __cudaPushCallConfiguration@PLT
testl %eax, %eax
je .L27
.L14:
movslq 8(%rsp), %rdx
movslq 12(%rsp), %rax
imulq %rax, %rdx
salq $2, %rdx
movl $2, %ecx
movq 24(%rsp), %rsi
movq %r12, %rdi
call cudaMemcpy@PLT
leaq .LC5(%rip), %rsi
movl $2, %edi
movl $0, %eax
call __printf_chk@PLT
movl $0, %ebp
leaq .LC6(%rip), %r13
leaq .LC7(%rip), %r14
cmpl $0, 12(%rsp)
jg .L15
.L16:
movq 16(%rsp), %rdi
call cudaFree@PLT
movq 24(%rsp), %rdi
call cudaFree@PLT
movq %r15, %rdi
call free@PLT
movq %r12, %rdi
call free@PLT
movq 56(%rsp), %rax
subq %fs:40, %rax
jne .L28
movl $0, %eax
addq $72, %rsp
.cfi_remember_state
.cfi_def_cfa_offset 56
popq %rbx
.cfi_def_cfa_offset 48
popq %rbp
.cfi_def_cfa_offset 40
popq %r12
.cfi_def_cfa_offset 32
popq %r13
.cfi_def_cfa_offset 24
popq %r14
.cfi_def_cfa_offset 16
popq %r15
.cfi_def_cfa_offset 8
ret
.L27:
.cfi_restore_state
movl 12(%rsp), %ecx
movl 8(%rsp), %edx
movq 24(%rsp), %rsi
movq 16(%rsp), %rdi
call _Z32__device_stub__Z9transposePiS_iiPiS_ii
jmp .L14
.L17:
imull %ebp, %eax
addl %ebx, %eax
cltq
movl (%r12,%rax,4), %edx
movq %r13, %rsi
movl $2, %edi
movl $0, %eax
call __printf_chk@PLT
addl $1, %ebx
movl 8(%rsp), %eax
cmpl %ebx, %eax
jg .L17
.L18:
movq %r14, %rsi
movl $2, %edi
movl $0, %eax
call __printf_chk@PLT
addl $1, %ebp
cmpl %ebp, 12(%rsp)
jle .L16
.L15:
movl 8(%rsp), %eax
movl $0, %ebx
testl %eax, %eax
jg .L17
jmp .L18
.L28:
call __stack_chk_fail@PLT
.cfi_endproc
.LFE2057:
.size main, .-main
.section .rodata.str1.1
.LC8:
.string "_Z9transposePiS_ii"
.text
.type _ZL24__sti____cudaRegisterAllv, @function
_ZL24__sti____cudaRegisterAllv:
.LFB2085:
.cfi_startproc
endbr64
subq $8, %rsp
.cfi_def_cfa_offset 16
leaq _ZL15__fatDeviceText(%rip), %rdi
call __cudaRegisterFatBinary@PLT
movq %rax, %rdi
movq %rax, _ZL20__cudaFatCubinHandle(%rip)
pushq $0
.cfi_def_cfa_offset 24
pushq $0
.cfi_def_cfa_offset 32
pushq $0
.cfi_def_cfa_offset 40
pushq $0
.cfi_def_cfa_offset 48
movl $0, %r9d
movl $-1, %r8d
leaq .LC8(%rip), %rdx
movq %rdx, %rcx
leaq _Z9transposePiS_ii(%rip), %rsi
call __cudaRegisterFunction@PLT
addq $32, %rsp
.cfi_def_cfa_offset 16
movq _ZL20__cudaFatCubinHandle(%rip), %rdi
call __cudaRegisterFatBinaryEnd@PLT
leaq _ZL26__cudaUnregisterBinaryUtilv(%rip), %rdi
call atexit@PLT
addq $8, %rsp
.cfi_def_cfa_offset 8
ret
.cfi_endproc
.LFE2085:
.size _ZL24__sti____cudaRegisterAllv, .-_ZL24__sti____cudaRegisterAllv
.section .init_array,"aw"
.align 8
.quad _ZL24__sti____cudaRegisterAllv
.section .nvFatBinSegment,"aw"
.align 8
.type _ZL15__fatDeviceText, @object
.size _ZL15__fatDeviceText, 24
_ZL15__fatDeviceText:
.long 1180844977
.long 1
.quad fatbinData
.quad 0
.local _ZL20__cudaFatCubinHandle
.comm _ZL20__cudaFatCubinHandle,8,8
.ident "GCC: (Ubuntu 13.3.0-6ubuntu2~24.04) 13.3.0"
.section .note.GNU-stack,"",@progbits
.section .note.gnu.property,"a"
.align 8
.long 1f - 0f
.long 4f - 1f
.long 5
0:
.string "GNU"
1:
.align 8
.long 0xc0000002
.long 3f - 2f
2:
.long 0x3
3:
.align 8
4: |
You are a helpful coding assistant specialized in converting CUDA source code to HIP/AMD source code. | /*
@Author: 3sne ( Mukur Panchani )
@FileName: q4MatrixTranspose.cu
@Task: CUDA program compute transpose of a matrix parallely.
*/
#include <stdio.h>
#include <stdlib.h>
#include <cuda_runtime.h>
__global__ void transpose(int *a, int *b, int m, int n) {
/*
Generates b: transpose of a
*/
int ci = threadIdx.x;
int ri = threadIdx.y;
b[ci * m + ri] = a[ri * n + ci];
}
int main() {
int *matA, *matB;
int *da, *db;
int m, n;
printf("== Enter Dimension of Matrix A (m x n) ==\n");
printf("m >> "); scanf("%d", &m);
printf("n >> "); scanf("%d", &n);
matA = (int*)malloc(sizeof(int) * m * n);
matB = (int*)malloc(sizeof(int) * m * n);
printf("== Matrix A Elements ==\n");
for(int i = 0; i < m * n; i++) {
scanf("%d", &matA[i]);
}
cudaMalloc((void **)&da, sizeof(int) * m * n);
cudaMalloc((void **)&db, sizeof(int) * m * n);
cudaMemcpy(da, matA, sizeof(int) * m * n, cudaMemcpyHostToDevice);
dim3 block_conf (n, m);
transpose<<<1, block_conf>>>(da, db, m, n);
cudaMemcpy(matB, db, sizeof(int) * m * n, cudaMemcpyDeviceToHost);
printf("== Matrix B Elements ==\n");
for ( int i = 0; i < n; i++ ) {
for ( int j = 0; j < m; j++ ) {
printf("%d ", matB[i * m + j]);
}
printf("\n");
}
cudaFree(da);
cudaFree(db);
free(matA);
free(matB);
return 0;
} | /*
@Author: 3sne ( Mukur Panchani )
@FileName: q4MatrixTranspose.cu
@Task: CUDA program compute transpose of a matrix parallely.
*/
#include <stdio.h>
#include <stdlib.h>
#include <hip/hip_runtime.h>
__global__ void transpose(int *a, int *b, int m, int n) {
/*
Generates b: transpose of a
*/
int ci = threadIdx.x;
int ri = threadIdx.y;
b[ci * m + ri] = a[ri * n + ci];
}
int main() {
int *matA, *matB;
int *da, *db;
int m, n;
printf("== Enter Dimension of Matrix A (m x n) ==\n");
printf("m >> "); scanf("%d", &m);
printf("n >> "); scanf("%d", &n);
matA = (int*)malloc(sizeof(int) * m * n);
matB = (int*)malloc(sizeof(int) * m * n);
printf("== Matrix A Elements ==\n");
for(int i = 0; i < m * n; i++) {
scanf("%d", &matA[i]);
}
hipMalloc((void **)&da, sizeof(int) * m * n);
hipMalloc((void **)&db, sizeof(int) * m * n);
hipMemcpy(da, matA, sizeof(int) * m * n, hipMemcpyHostToDevice);
dim3 block_conf (n, m);
transpose<<<1, block_conf>>>(da, db, m, n);
hipMemcpy(matB, db, sizeof(int) * m * n, hipMemcpyDeviceToHost);
printf("== Matrix B Elements ==\n");
for ( int i = 0; i < n; i++ ) {
for ( int j = 0; j < m; j++ ) {
printf("%d ", matB[i * m + j]);
}
printf("\n");
}
hipFree(da);
hipFree(db);
free(matA);
free(matB);
return 0;
} |
You are a helpful coding assistant specialized in converting HIP source code to AMD device assembly. | /*
@Author: 3sne ( Mukur Panchani )
@FileName: q4MatrixTranspose.cu
@Task: CUDA program compute transpose of a matrix parallely.
*/
#include <stdio.h>
#include <stdlib.h>
#include <hip/hip_runtime.h>
__global__ void transpose(int *a, int *b, int m, int n) {
/*
Generates b: transpose of a
*/
int ci = threadIdx.x;
int ri = threadIdx.y;
b[ci * m + ri] = a[ri * n + ci];
}
int main() {
int *matA, *matB;
int *da, *db;
int m, n;
printf("== Enter Dimension of Matrix A (m x n) ==\n");
printf("m >> "); scanf("%d", &m);
printf("n >> "); scanf("%d", &n);
matA = (int*)malloc(sizeof(int) * m * n);
matB = (int*)malloc(sizeof(int) * m * n);
printf("== Matrix A Elements ==\n");
for(int i = 0; i < m * n; i++) {
scanf("%d", &matA[i]);
}
hipMalloc((void **)&da, sizeof(int) * m * n);
hipMalloc((void **)&db, sizeof(int) * m * n);
hipMemcpy(da, matA, sizeof(int) * m * n, hipMemcpyHostToDevice);
dim3 block_conf (n, m);
transpose<<<1, block_conf>>>(da, db, m, n);
hipMemcpy(matB, db, sizeof(int) * m * n, hipMemcpyDeviceToHost);
printf("== Matrix B Elements ==\n");
for ( int i = 0; i < n; i++ ) {
for ( int j = 0; j < m; j++ ) {
printf("%d ", matB[i * m + j]);
}
printf("\n");
}
hipFree(da);
hipFree(db);
free(matA);
free(matB);
return 0;
} | .text
.amdgcn_target "amdgcn-amd-amdhsa--gfx1100"
.protected _Z9transposePiS_ii
.globl _Z9transposePiS_ii
.p2align 8
.type _Z9transposePiS_ii,@function
_Z9transposePiS_ii:
s_load_b64 s[4:5], s[0:1], 0x10
v_and_b32_e32 v1, 0x3ff, v0
v_bfe_u32 v0, v0, 10, 10
s_load_b128 s[0:3], s[0:1], 0x0
s_waitcnt lgkmcnt(0)
s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
v_mad_u64_u32 v[2:3], null, v0, s5, v[1:2]
v_ashrrev_i32_e32 v3, 31, v2
s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
v_lshlrev_b64 v[2:3], 2, v[2:3]
v_add_co_u32 v2, vcc_lo, s0, v2
s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_2) | instid1(VALU_DEP_1)
v_add_co_ci_u32_e32 v3, vcc_lo, s1, v3, vcc_lo
global_load_b32 v4, v[2:3], off
v_mad_u64_u32 v[2:3], null, v1, s4, v[0:1]
v_ashrrev_i32_e32 v3, 31, v2
s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
v_lshlrev_b64 v[0:1], 2, v[2:3]
v_add_co_u32 v0, vcc_lo, s2, v0
s_delay_alu instid0(VALU_DEP_2)
v_add_co_ci_u32_e32 v1, vcc_lo, s3, v1, vcc_lo
s_waitcnt vmcnt(0)
global_store_b32 v[0:1], v4, off
s_nop 0
s_sendmsg sendmsg(MSG_DEALLOC_VGPRS)
s_endpgm
.section .rodata,"a",@progbits
.p2align 6, 0x0
.amdhsa_kernel _Z9transposePiS_ii
.amdhsa_group_segment_fixed_size 0
.amdhsa_private_segment_fixed_size 0
.amdhsa_kernarg_size 24
.amdhsa_user_sgpr_count 15
.amdhsa_user_sgpr_dispatch_ptr 0
.amdhsa_user_sgpr_queue_ptr 0
.amdhsa_user_sgpr_kernarg_segment_ptr 1
.amdhsa_user_sgpr_dispatch_id 0
.amdhsa_user_sgpr_private_segment_size 0
.amdhsa_wavefront_size32 1
.amdhsa_uses_dynamic_stack 0
.amdhsa_enable_private_segment 0
.amdhsa_system_sgpr_workgroup_id_x 1
.amdhsa_system_sgpr_workgroup_id_y 0
.amdhsa_system_sgpr_workgroup_id_z 0
.amdhsa_system_sgpr_workgroup_info 0
.amdhsa_system_vgpr_workitem_id 1
.amdhsa_next_free_vgpr 5
.amdhsa_next_free_sgpr 6
.amdhsa_float_round_mode_32 0
.amdhsa_float_round_mode_16_64 0
.amdhsa_float_denorm_mode_32 3
.amdhsa_float_denorm_mode_16_64 3
.amdhsa_dx10_clamp 1
.amdhsa_ieee_mode 1
.amdhsa_fp16_overflow 0
.amdhsa_workgroup_processor_mode 1
.amdhsa_memory_ordered 1
.amdhsa_forward_progress 0
.amdhsa_shared_vgpr_count 0
.amdhsa_exception_fp_ieee_invalid_op 0
.amdhsa_exception_fp_denorm_src 0
.amdhsa_exception_fp_ieee_div_zero 0
.amdhsa_exception_fp_ieee_overflow 0
.amdhsa_exception_fp_ieee_underflow 0
.amdhsa_exception_fp_ieee_inexact 0
.amdhsa_exception_int_div_zero 0
.end_amdhsa_kernel
.text
.Lfunc_end0:
.size _Z9transposePiS_ii, .Lfunc_end0-_Z9transposePiS_ii
.section .AMDGPU.csdata,"",@progbits
.text
.p2alignl 7, 3214868480
.fill 96, 4, 3214868480
.type __hip_cuid_,@object
.section .bss,"aw",@nobits
.globl __hip_cuid_
__hip_cuid_:
.byte 0
.size __hip_cuid_, 1
.ident "AMD clang version 18.0.0git (https://github.com/RadeonOpenCompute/llvm-project roc-6.3.2 25012 e5bf7e55c91490b07c49d8960fa7983d864936c4)"
.section ".note.GNU-stack","",@progbits
.addrsig
.addrsig_sym __hip_cuid_
.amdgpu_metadata
---
amdhsa.kernels:
- .args:
- .address_space: global
.offset: 0
.size: 8
.value_kind: global_buffer
- .address_space: global
.offset: 8
.size: 8
.value_kind: global_buffer
- .offset: 16
.size: 4
.value_kind: by_value
- .offset: 20
.size: 4
.value_kind: by_value
.group_segment_fixed_size: 0
.kernarg_segment_align: 8
.kernarg_segment_size: 24
.language: OpenCL C
.language_version:
- 2
- 0
.max_flat_workgroup_size: 1024
.name: _Z9transposePiS_ii
.private_segment_fixed_size: 0
.sgpr_count: 8
.sgpr_spill_count: 0
.symbol: _Z9transposePiS_ii.kd
.uniform_work_group_size: 1
.uses_dynamic_stack: false
.vgpr_count: 5
.vgpr_spill_count: 0
.wavefront_size: 32
.workgroup_processor_mode: 1
amdhsa.target: amdgcn-amd-amdhsa--gfx1100
amdhsa.version:
- 1
- 2
...
.end_amdgpu_metadata |
You are a helpful coding assistant specialized in converting HIP source code to AMD host assembly. | /*
@Author: 3sne ( Mukur Panchani )
@FileName: q4MatrixTranspose.cu
@Task: CUDA program compute transpose of a matrix parallely.
*/
#include <stdio.h>
#include <stdlib.h>
#include <hip/hip_runtime.h>
__global__ void transpose(int *a, int *b, int m, int n) {
/*
Generates b: transpose of a
*/
int ci = threadIdx.x;
int ri = threadIdx.y;
b[ci * m + ri] = a[ri * n + ci];
}
int main() {
int *matA, *matB;
int *da, *db;
int m, n;
printf("== Enter Dimension of Matrix A (m x n) ==\n");
printf("m >> "); scanf("%d", &m);
printf("n >> "); scanf("%d", &n);
matA = (int*)malloc(sizeof(int) * m * n);
matB = (int*)malloc(sizeof(int) * m * n);
printf("== Matrix A Elements ==\n");
for(int i = 0; i < m * n; i++) {
scanf("%d", &matA[i]);
}
hipMalloc((void **)&da, sizeof(int) * m * n);
hipMalloc((void **)&db, sizeof(int) * m * n);
hipMemcpy(da, matA, sizeof(int) * m * n, hipMemcpyHostToDevice);
dim3 block_conf (n, m);
transpose<<<1, block_conf>>>(da, db, m, n);
hipMemcpy(matB, db, sizeof(int) * m * n, hipMemcpyDeviceToHost);
printf("== Matrix B Elements ==\n");
for ( int i = 0; i < n; i++ ) {
for ( int j = 0; j < m; j++ ) {
printf("%d ", matB[i * m + j]);
}
printf("\n");
}
hipFree(da);
hipFree(db);
free(matA);
free(matB);
return 0;
} | .text
.file "q4MatrixTranspose.hip"
.globl _Z24__device_stub__transposePiS_ii # -- Begin function _Z24__device_stub__transposePiS_ii
.p2align 4, 0x90
.type _Z24__device_stub__transposePiS_ii,@function
_Z24__device_stub__transposePiS_ii: # @_Z24__device_stub__transposePiS_ii
.cfi_startproc
# %bb.0:
subq $120, %rsp
.cfi_def_cfa_offset 128
movq %rdi, 72(%rsp)
movq %rsi, 64(%rsp)
movl %edx, 12(%rsp)
movl %ecx, 8(%rsp)
leaq 72(%rsp), %rax
movq %rax, 80(%rsp)
leaq 64(%rsp), %rax
movq %rax, 88(%rsp)
leaq 12(%rsp), %rax
movq %rax, 96(%rsp)
leaq 8(%rsp), %rax
movq %rax, 104(%rsp)
leaq 48(%rsp), %rdi
leaq 32(%rsp), %rsi
leaq 24(%rsp), %rdx
leaq 16(%rsp), %rcx
callq __hipPopCallConfiguration
movq 48(%rsp), %rsi
movl 56(%rsp), %edx
movq 32(%rsp), %rcx
movl 40(%rsp), %r8d
leaq 80(%rsp), %r9
movl $_Z9transposePiS_ii, %edi
pushq 16(%rsp)
.cfi_adjust_cfa_offset 8
pushq 32(%rsp)
.cfi_adjust_cfa_offset 8
callq hipLaunchKernel
addq $136, %rsp
.cfi_adjust_cfa_offset -136
retq
.Lfunc_end0:
.size _Z24__device_stub__transposePiS_ii, .Lfunc_end0-_Z24__device_stub__transposePiS_ii
.cfi_endproc
# -- End function
.globl main # -- Begin function main
.p2align 4, 0x90
.type main,@function
main: # @main
.cfi_startproc
# %bb.0:
pushq %rbp
.cfi_def_cfa_offset 16
pushq %r15
.cfi_def_cfa_offset 24
pushq %r14
.cfi_def_cfa_offset 32
pushq %r12
.cfi_def_cfa_offset 40
pushq %rbx
.cfi_def_cfa_offset 48
subq $128, %rsp
.cfi_def_cfa_offset 176
.cfi_offset %rbx, -48
.cfi_offset %r12, -40
.cfi_offset %r14, -32
.cfi_offset %r15, -24
.cfi_offset %rbp, -16
movl $.Lstr, %edi
callq puts@PLT
movl $.L.str.1, %edi
xorl %eax, %eax
callq printf
leaq 4(%rsp), %rsi
movl $.L.str.2, %edi
xorl %eax, %eax
callq __isoc23_scanf
movl $.L.str.3, %edi
xorl %eax, %eax
callq printf
movq %rsp, %rsi
movl $.L.str.2, %edi
xorl %eax, %eax
callq __isoc23_scanf
movslq 4(%rsp), %rax
movslq (%rsp), %r14
imulq %rax, %r14
shlq $2, %r14
movq %r14, %rdi
callq malloc
movq %rax, %rbx
movq %r14, %rdi
callq malloc
movq %rax, %r14
movl $.Lstr.1, %edi
callq puts@PLT
movl 4(%rsp), %eax
movl (%rsp), %ecx
movl %ecx, %edx
imull %eax, %edx
testl %edx, %edx
jle .LBB1_3
# %bb.1: # %.lr.ph.preheader
movq %rbx, %r15
xorl %r12d, %r12d
.p2align 4, 0x90
.LBB1_2: # %.lr.ph
# =>This Inner Loop Header: Depth=1
movl $.L.str.2, %edi
movq %r15, %rsi
xorl %eax, %eax
callq __isoc23_scanf
incq %r12
movl 4(%rsp), %eax
movl (%rsp), %ecx
movl %ecx, %edx
imull %eax, %edx
movslq %edx, %rdx
addq $4, %r15
cmpq %rdx, %r12
jl .LBB1_2
.LBB1_3: # %._crit_edge
cltq
movslq %ecx, %rsi
imulq %rax, %rsi
shlq $2, %rsi
leaq 16(%rsp), %rdi
callq hipMalloc
movslq 4(%rsp), %rax
movslq (%rsp), %rsi
imulq %rax, %rsi
shlq $2, %rsi
leaq 8(%rsp), %rdi
callq hipMalloc
movq 16(%rsp), %rdi
movslq 4(%rsp), %rax
movslq (%rsp), %rdx
imulq %rax, %rdx
shlq $2, %rdx
movq %rbx, %rsi
movl $1, %ecx
callq hipMemcpy
movl (%rsp), %eax
movl 4(%rsp), %edx
shlq $32, %rdx
orq %rax, %rdx
movabsq $4294967297, %rdi # imm = 0x100000001
movl $1, %esi
movl $1, %ecx
xorl %r8d, %r8d
xorl %r9d, %r9d
callq __hipPushCallConfiguration
testl %eax, %eax
jne .LBB1_5
# %bb.4:
movq 16(%rsp), %rax
movq 8(%rsp), %rcx
movl 4(%rsp), %edx
movl (%rsp), %esi
movq %rax, 88(%rsp)
movq %rcx, 80(%rsp)
movl %edx, 28(%rsp)
movl %esi, 24(%rsp)
leaq 88(%rsp), %rax
movq %rax, 96(%rsp)
leaq 80(%rsp), %rax
movq %rax, 104(%rsp)
leaq 28(%rsp), %rax
movq %rax, 112(%rsp)
leaq 24(%rsp), %rax
movq %rax, 120(%rsp)
leaq 64(%rsp), %rdi
leaq 48(%rsp), %rsi
leaq 40(%rsp), %rdx
leaq 32(%rsp), %rcx
callq __hipPopCallConfiguration
movq 64(%rsp), %rsi
movl 72(%rsp), %edx
movq 48(%rsp), %rcx
movl 56(%rsp), %r8d
leaq 96(%rsp), %r9
movl $_Z9transposePiS_ii, %edi
pushq 32(%rsp)
.cfi_adjust_cfa_offset 8
pushq 48(%rsp)
.cfi_adjust_cfa_offset 8
callq hipLaunchKernel
addq $16, %rsp
.cfi_adjust_cfa_offset -16
.LBB1_5:
movq 8(%rsp), %rsi
movslq 4(%rsp), %rax
movslq (%rsp), %rdx
imulq %rax, %rdx
shlq $2, %rdx
movq %r14, %rdi
movl $2, %ecx
callq hipMemcpy
movl $.Lstr.2, %edi
callq puts@PLT
cmpl $0, (%rsp)
jle .LBB1_11
# %bb.6: # %.preheader.preheader
xorl %ebp, %ebp
jmp .LBB1_7
.p2align 4, 0x90
.LBB1_10: # %._crit_edge30
# in Loop: Header=BB1_7 Depth=1
movl $10, %edi
callq putchar@PLT
incl %ebp
cmpl (%rsp), %ebp
jge .LBB1_11
.LBB1_7: # %.preheader
# =>This Loop Header: Depth=1
# Child Loop BB1_9 Depth 2
movl 4(%rsp), %eax
testl %eax, %eax
jle .LBB1_10
# %bb.8: # %.lr.ph29.preheader
# in Loop: Header=BB1_7 Depth=1
xorl %r15d, %r15d
.p2align 4, 0x90
.LBB1_9: # %.lr.ph29
# Parent Loop BB1_7 Depth=1
# => This Inner Loop Header: Depth=2
imull %ebp, %eax
cltq
addq %r15, %rax
movl (%r14,%rax,4), %esi
movl $.L.str.6, %edi
xorl %eax, %eax
callq printf
movl 4(%rsp), %eax
incq %r15
cmpl %eax, %r15d
jl .LBB1_9
jmp .LBB1_10
.LBB1_11: # %._crit_edge32
movq 16(%rsp), %rdi
callq hipFree
movq 8(%rsp), %rdi
callq hipFree
movq %rbx, %rdi
callq free
movq %r14, %rdi
callq free
xorl %eax, %eax
addq $128, %rsp
.cfi_def_cfa_offset 48
popq %rbx
.cfi_def_cfa_offset 40
popq %r12
.cfi_def_cfa_offset 32
popq %r14
.cfi_def_cfa_offset 24
popq %r15
.cfi_def_cfa_offset 16
popq %rbp
.cfi_def_cfa_offset 8
retq
.Lfunc_end1:
.size main, .Lfunc_end1-main
.cfi_endproc
# -- End function
.p2align 4, 0x90 # -- Begin function __hip_module_ctor
.type __hip_module_ctor,@function
__hip_module_ctor: # @__hip_module_ctor
.cfi_startproc
# %bb.0:
subq $40, %rsp
.cfi_def_cfa_offset 48
cmpq $0, __hip_gpubin_handle(%rip)
jne .LBB2_2
# %bb.1:
movl $__hip_fatbin_wrapper, %edi
callq __hipRegisterFatBinary
movq %rax, __hip_gpubin_handle(%rip)
.LBB2_2:
movq __hip_gpubin_handle(%rip), %rdi
xorps %xmm0, %xmm0
movups %xmm0, 16(%rsp)
movups %xmm0, (%rsp)
movl $_Z9transposePiS_ii, %esi
movl $.L__unnamed_1, %edx
movl $.L__unnamed_1, %ecx
movl $-1, %r8d
xorl %r9d, %r9d
callq __hipRegisterFunction
movl $__hip_module_dtor, %edi
addq $40, %rsp
.cfi_def_cfa_offset 8
jmp atexit # TAILCALL
.Lfunc_end2:
.size __hip_module_ctor, .Lfunc_end2-__hip_module_ctor
.cfi_endproc
# -- End function
.p2align 4, 0x90 # -- Begin function __hip_module_dtor
.type __hip_module_dtor,@function
__hip_module_dtor: # @__hip_module_dtor
.cfi_startproc
# %bb.0:
movq __hip_gpubin_handle(%rip), %rdi
testq %rdi, %rdi
je .LBB3_2
# %bb.1:
pushq %rax
.cfi_def_cfa_offset 16
callq __hipUnregisterFatBinary
movq $0, __hip_gpubin_handle(%rip)
addq $8, %rsp
.cfi_def_cfa_offset 8
.LBB3_2:
retq
.Lfunc_end3:
.size __hip_module_dtor, .Lfunc_end3-__hip_module_dtor
.cfi_endproc
# -- End function
.type _Z9transposePiS_ii,@object # @_Z9transposePiS_ii
.section .rodata,"a",@progbits
.globl _Z9transposePiS_ii
.p2align 3, 0x0
_Z9transposePiS_ii:
.quad _Z24__device_stub__transposePiS_ii
.size _Z9transposePiS_ii, 8
.type .L.str.1,@object # @.str.1
.section .rodata.str1.1,"aMS",@progbits,1
.L.str.1:
.asciz "m >> "
.size .L.str.1, 6
.type .L.str.2,@object # @.str.2
.L.str.2:
.asciz "%d"
.size .L.str.2, 3
.type .L.str.3,@object # @.str.3
.L.str.3:
.asciz "n >> "
.size .L.str.3, 6
.type .L.str.6,@object # @.str.6
.L.str.6:
.asciz "%d "
.size .L.str.6, 4
.type .L__unnamed_1,@object # @0
.L__unnamed_1:
.asciz "_Z9transposePiS_ii"
.size .L__unnamed_1, 19
.type __hip_fatbin_wrapper,@object # @__hip_fatbin_wrapper
.section .hipFatBinSegment,"a",@progbits
.p2align 3, 0x0
__hip_fatbin_wrapper:
.long 1212764230 # 0x48495046
.long 1 # 0x1
.quad __hip_fatbin
.quad 0
.size __hip_fatbin_wrapper, 24
.type __hip_gpubin_handle,@object # @__hip_gpubin_handle
.local __hip_gpubin_handle
.comm __hip_gpubin_handle,8,8
.section .init_array,"aw",@init_array
.p2align 3, 0x0
.quad __hip_module_ctor
.type __hip_cuid_,@object # @__hip_cuid_
.bss
.globl __hip_cuid_
__hip_cuid_:
.byte 0 # 0x0
.size __hip_cuid_, 1
.type .Lstr,@object # @str
.section .rodata.str1.1,"aMS",@progbits,1
.Lstr:
.asciz "== Enter Dimension of Matrix A (m x n) =="
.size .Lstr, 42
.type .Lstr.1,@object # @str.1
.Lstr.1:
.asciz "== Matrix A Elements =="
.size .Lstr.1, 24
.type .Lstr.2,@object # @str.2
.Lstr.2:
.asciz "== Matrix B Elements =="
.size .Lstr.2, 24
.section ".linker-options","e",@llvm_linker_options
.ident "AMD clang version 18.0.0git (https://github.com/RadeonOpenCompute/llvm-project roc-6.3.2 25012 e5bf7e55c91490b07c49d8960fa7983d864936c4)"
.section ".note.GNU-stack","",@progbits
.addrsig
.addrsig_sym _Z24__device_stub__transposePiS_ii
.addrsig_sym __hip_module_ctor
.addrsig_sym __hip_module_dtor
.addrsig_sym _Z9transposePiS_ii
.addrsig_sym __hip_fatbin
.addrsig_sym __hip_fatbin_wrapper
.addrsig_sym __hip_cuid_ |
You are a helpful coding assistant specialized in converting from CUDA device assembly to AMD device assembly. | code for sm_80
Function : _Z9transposePiS_ii
.headerflags @"EF_CUDA_TEXMODE_UNIFIED EF_CUDA_64BIT_ADDRESS EF_CUDA_SM80 EF_CUDA_VIRTUAL_SM(EF_CUDA_SM80)"
/*0000*/ MOV R1, c[0x0][0x28] ; /* 0x00000a0000017a02 */
/* 0x000fe40000000f00 */
/*0010*/ S2R R4, SR_TID.X ; /* 0x0000000000047919 */
/* 0x000e220000002100 */
/*0020*/ HFMA2.MMA R7, -RZ, RZ, 0, 2.384185791015625e-07 ; /* 0x00000004ff077435 */
/* 0x000fe200000001ff */
/*0030*/ ULDC.64 UR4, c[0x0][0x118] ; /* 0x0000460000047ab9 */
/* 0x000fe40000000a00 */
/*0040*/ S2R R5, SR_TID.Y ; /* 0x0000000000057919 */
/* 0x000e240000002200 */
/*0050*/ IMAD R2, R5, c[0x0][0x174], R4 ; /* 0x00005d0005027a24 */
/* 0x001fca00078e0204 */
/*0060*/ IMAD.WIDE R2, R2, R7, c[0x0][0x160] ; /* 0x0000580002027625 */
/* 0x000fcc00078e0207 */
/*0070*/ LDG.E R3, [R2.64] ; /* 0x0000000402037981 */
/* 0x000ea2000c1e1900 */
/*0080*/ IMAD R4, R4, c[0x0][0x170], R5 ; /* 0x00005c0004047a24 */
/* 0x000fc800078e0205 */
/*0090*/ IMAD.WIDE R4, R4, R7, c[0x0][0x168] ; /* 0x00005a0004047625 */
/* 0x000fca00078e0207 */
/*00a0*/ STG.E [R4.64], R3 ; /* 0x0000000304007986 */
/* 0x004fe2000c101904 */
/*00b0*/ EXIT ; /* 0x000000000000794d */
/* 0x000fea0003800000 */
/*00c0*/ BRA 0xc0; /* 0xfffffff000007947 */
/* 0x000fc0000383ffff */
/*00d0*/ NOP; /* 0x0000000000007918 */
/* 0x000fc00000000000 */
/*00e0*/ NOP; /* 0x0000000000007918 */
/* 0x000fc00000000000 */
/*00f0*/ NOP; /* 0x0000000000007918 */
/* 0x000fc00000000000 */
/*0100*/ NOP; /* 0x0000000000007918 */
/* 0x000fc00000000000 */
/*0110*/ NOP; /* 0x0000000000007918 */
/* 0x000fc00000000000 */
/*0120*/ NOP; /* 0x0000000000007918 */
/* 0x000fc00000000000 */
/*0130*/ NOP; /* 0x0000000000007918 */
/* 0x000fc00000000000 */
/*0140*/ NOP; /* 0x0000000000007918 */
/* 0x000fc00000000000 */
/*0150*/ NOP; /* 0x0000000000007918 */
/* 0x000fc00000000000 */
/*0160*/ NOP; /* 0x0000000000007918 */
/* 0x000fc00000000000 */
/*0170*/ NOP; /* 0x0000000000007918 */
/* 0x000fc00000000000 */
.......... | .text
.amdgcn_target "amdgcn-amd-amdhsa--gfx1100"
.protected _Z9transposePiS_ii
.globl _Z9transposePiS_ii
.p2align 8
.type _Z9transposePiS_ii,@function
_Z9transposePiS_ii:
s_load_b64 s[4:5], s[0:1], 0x10
v_and_b32_e32 v1, 0x3ff, v0
v_bfe_u32 v0, v0, 10, 10
s_load_b128 s[0:3], s[0:1], 0x0
s_waitcnt lgkmcnt(0)
s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
v_mad_u64_u32 v[2:3], null, v0, s5, v[1:2]
v_ashrrev_i32_e32 v3, 31, v2
s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
v_lshlrev_b64 v[2:3], 2, v[2:3]
v_add_co_u32 v2, vcc_lo, s0, v2
s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_2) | instid1(VALU_DEP_1)
v_add_co_ci_u32_e32 v3, vcc_lo, s1, v3, vcc_lo
global_load_b32 v4, v[2:3], off
v_mad_u64_u32 v[2:3], null, v1, s4, v[0:1]
v_ashrrev_i32_e32 v3, 31, v2
s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
v_lshlrev_b64 v[0:1], 2, v[2:3]
v_add_co_u32 v0, vcc_lo, s2, v0
s_delay_alu instid0(VALU_DEP_2)
v_add_co_ci_u32_e32 v1, vcc_lo, s3, v1, vcc_lo
s_waitcnt vmcnt(0)
global_store_b32 v[0:1], v4, off
s_nop 0
s_sendmsg sendmsg(MSG_DEALLOC_VGPRS)
s_endpgm
.section .rodata,"a",@progbits
.p2align 6, 0x0
.amdhsa_kernel _Z9transposePiS_ii
.amdhsa_group_segment_fixed_size 0
.amdhsa_private_segment_fixed_size 0
.amdhsa_kernarg_size 24
.amdhsa_user_sgpr_count 15
.amdhsa_user_sgpr_dispatch_ptr 0
.amdhsa_user_sgpr_queue_ptr 0
.amdhsa_user_sgpr_kernarg_segment_ptr 1
.amdhsa_user_sgpr_dispatch_id 0
.amdhsa_user_sgpr_private_segment_size 0
.amdhsa_wavefront_size32 1
.amdhsa_uses_dynamic_stack 0
.amdhsa_enable_private_segment 0
.amdhsa_system_sgpr_workgroup_id_x 1
.amdhsa_system_sgpr_workgroup_id_y 0
.amdhsa_system_sgpr_workgroup_id_z 0
.amdhsa_system_sgpr_workgroup_info 0
.amdhsa_system_vgpr_workitem_id 1
.amdhsa_next_free_vgpr 5
.amdhsa_next_free_sgpr 6
.amdhsa_float_round_mode_32 0
.amdhsa_float_round_mode_16_64 0
.amdhsa_float_denorm_mode_32 3
.amdhsa_float_denorm_mode_16_64 3
.amdhsa_dx10_clamp 1
.amdhsa_ieee_mode 1
.amdhsa_fp16_overflow 0
.amdhsa_workgroup_processor_mode 1
.amdhsa_memory_ordered 1
.amdhsa_forward_progress 0
.amdhsa_shared_vgpr_count 0
.amdhsa_exception_fp_ieee_invalid_op 0
.amdhsa_exception_fp_denorm_src 0
.amdhsa_exception_fp_ieee_div_zero 0
.amdhsa_exception_fp_ieee_overflow 0
.amdhsa_exception_fp_ieee_underflow 0
.amdhsa_exception_fp_ieee_inexact 0
.amdhsa_exception_int_div_zero 0
.end_amdhsa_kernel
.text
.Lfunc_end0:
.size _Z9transposePiS_ii, .Lfunc_end0-_Z9transposePiS_ii
.section .AMDGPU.csdata,"",@progbits
.text
.p2alignl 7, 3214868480
.fill 96, 4, 3214868480
.type __hip_cuid_,@object
.section .bss,"aw",@nobits
.globl __hip_cuid_
__hip_cuid_:
.byte 0
.size __hip_cuid_, 1
.ident "AMD clang version 18.0.0git (https://github.com/RadeonOpenCompute/llvm-project roc-6.3.2 25012 e5bf7e55c91490b07c49d8960fa7983d864936c4)"
.section ".note.GNU-stack","",@progbits
.addrsig
.addrsig_sym __hip_cuid_
.amdgpu_metadata
---
amdhsa.kernels:
- .args:
- .address_space: global
.offset: 0
.size: 8
.value_kind: global_buffer
- .address_space: global
.offset: 8
.size: 8
.value_kind: global_buffer
- .offset: 16
.size: 4
.value_kind: by_value
- .offset: 20
.size: 4
.value_kind: by_value
.group_segment_fixed_size: 0
.kernarg_segment_align: 8
.kernarg_segment_size: 24
.language: OpenCL C
.language_version:
- 2
- 0
.max_flat_workgroup_size: 1024
.name: _Z9transposePiS_ii
.private_segment_fixed_size: 0
.sgpr_count: 8
.sgpr_spill_count: 0
.symbol: _Z9transposePiS_ii.kd
.uniform_work_group_size: 1
.uses_dynamic_stack: false
.vgpr_count: 5
.vgpr_spill_count: 0
.wavefront_size: 32
.workgroup_processor_mode: 1
amdhsa.target: amdgcn-amd-amdhsa--gfx1100
amdhsa.version:
- 1
- 2
...
.end_amdgpu_metadata |
You are a helpful coding assistant specialized in converting from CUDA host assembly to AMD host assembly. | .file "tmpxft_00118a89_00000000-6_q4MatrixTranspose.cudafe1.cpp"
.text
#APP
#NO_APP
.type _ZL26__cudaUnregisterBinaryUtilv, @function
_ZL26__cudaUnregisterBinaryUtilv:
.LFB2060:
.cfi_startproc
endbr64
subq $8, %rsp
.cfi_def_cfa_offset 16
movq _ZL20__cudaFatCubinHandle(%rip), %rdi
call __cudaUnregisterFatBinary@PLT
addq $8, %rsp
.cfi_def_cfa_offset 8
ret
.cfi_endproc
.LFE2060:
.size _ZL26__cudaUnregisterBinaryUtilv, .-_ZL26__cudaUnregisterBinaryUtilv
.globl _Z32__device_stub__Z9transposePiS_iiPiS_ii
.type _Z32__device_stub__Z9transposePiS_iiPiS_ii, @function
_Z32__device_stub__Z9transposePiS_iiPiS_ii:
.LFB2082:
.cfi_startproc
endbr64
subq $152, %rsp
.cfi_def_cfa_offset 160
movq %rdi, 24(%rsp)
movq %rsi, 16(%rsp)
movl %edx, 12(%rsp)
movl %ecx, 8(%rsp)
movq %fs:40, %rax
movq %rax, 136(%rsp)
xorl %eax, %eax
leaq 24(%rsp), %rax
movq %rax, 96(%rsp)
leaq 16(%rsp), %rax
movq %rax, 104(%rsp)
leaq 12(%rsp), %rax
movq %rax, 112(%rsp)
leaq 8(%rsp), %rax
movq %rax, 120(%rsp)
movl $1, 48(%rsp)
movl $1, 52(%rsp)
movl $1, 56(%rsp)
movl $1, 60(%rsp)
movl $1, 64(%rsp)
movl $1, 68(%rsp)
leaq 40(%rsp), %rcx
leaq 32(%rsp), %rdx
leaq 60(%rsp), %rsi
leaq 48(%rsp), %rdi
call __cudaPopCallConfiguration@PLT
testl %eax, %eax
je .L7
.L3:
movq 136(%rsp), %rax
subq %fs:40, %rax
jne .L8
addq $152, %rsp
.cfi_remember_state
.cfi_def_cfa_offset 8
ret
.L7:
.cfi_restore_state
pushq 40(%rsp)
.cfi_def_cfa_offset 168
pushq 40(%rsp)
.cfi_def_cfa_offset 176
leaq 112(%rsp), %r9
movq 76(%rsp), %rcx
movl 84(%rsp), %r8d
movq 64(%rsp), %rsi
movl 72(%rsp), %edx
leaq _Z9transposePiS_ii(%rip), %rdi
call cudaLaunchKernel@PLT
addq $16, %rsp
.cfi_def_cfa_offset 160
jmp .L3
.L8:
call __stack_chk_fail@PLT
.cfi_endproc
.LFE2082:
.size _Z32__device_stub__Z9transposePiS_iiPiS_ii, .-_Z32__device_stub__Z9transposePiS_iiPiS_ii
.globl _Z9transposePiS_ii
.type _Z9transposePiS_ii, @function
_Z9transposePiS_ii:
.LFB2083:
.cfi_startproc
endbr64
subq $8, %rsp
.cfi_def_cfa_offset 16
call _Z32__device_stub__Z9transposePiS_iiPiS_ii
addq $8, %rsp
.cfi_def_cfa_offset 8
ret
.cfi_endproc
.LFE2083:
.size _Z9transposePiS_ii, .-_Z9transposePiS_ii
.section .rodata.str1.8,"aMS",@progbits,1
.align 8
.LC0:
.string "== Enter Dimension of Matrix A (m x n) ==\n"
.section .rodata.str1.1,"aMS",@progbits,1
.LC1:
.string "m >> "
.LC2:
.string "%d"
.LC3:
.string "n >> "
.LC4:
.string "== Matrix A Elements ==\n"
.LC5:
.string "== Matrix B Elements ==\n"
.LC6:
.string "%d "
.LC7:
.string "\n"
.text
.globl main
.type main, @function
main:
.LFB2057:
.cfi_startproc
endbr64
pushq %r15
.cfi_def_cfa_offset 16
.cfi_offset 15, -16
pushq %r14
.cfi_def_cfa_offset 24
.cfi_offset 14, -24
pushq %r13
.cfi_def_cfa_offset 32
.cfi_offset 13, -32
pushq %r12
.cfi_def_cfa_offset 40
.cfi_offset 12, -40
pushq %rbp
.cfi_def_cfa_offset 48
.cfi_offset 6, -48
pushq %rbx
.cfi_def_cfa_offset 56
.cfi_offset 3, -56
subq $72, %rsp
.cfi_def_cfa_offset 128
movq %fs:40, %rax
movq %rax, 56(%rsp)
xorl %eax, %eax
leaq .LC0(%rip), %rsi
movl $2, %edi
call __printf_chk@PLT
leaq .LC1(%rip), %rsi
movl $2, %edi
movl $0, %eax
call __printf_chk@PLT
leaq 8(%rsp), %rsi
leaq .LC2(%rip), %rbx
movq %rbx, %rdi
movl $0, %eax
call __isoc23_scanf@PLT
leaq .LC3(%rip), %rsi
movl $2, %edi
movl $0, %eax
call __printf_chk@PLT
leaq 12(%rsp), %rsi
movq %rbx, %rdi
movl $0, %eax
call __isoc23_scanf@PLT
movslq 8(%rsp), %rbx
movslq 12(%rsp), %rax
imulq %rax, %rbx
salq $2, %rbx
movq %rbx, %rdi
call malloc@PLT
movq %rax, %r15
movq %rbx, %rdi
call malloc@PLT
movq %rax, %r12
leaq .LC4(%rip), %rsi
movl $2, %edi
movl $0, %eax
call __printf_chk@PLT
movl 8(%rsp), %eax
movl 12(%rsp), %edx
movl %eax, %ecx
imull %edx, %ecx
testl %ecx, %ecx
jle .L12
movq %r15, %rbp
movl $0, %ebx
leaq .LC2(%rip), %r13
.L13:
movq %rbp, %rsi
movq %r13, %rdi
movl $0, %eax
call __isoc23_scanf@PLT
addl $1, %ebx
movl 8(%rsp), %eax
movl 12(%rsp), %edx
addq $4, %rbp
movl %eax, %ecx
imull %edx, %ecx
cmpl %ebx, %ecx
jg .L13
.L12:
cltq
movslq %edx, %rdx
imulq %rdx, %rax
leaq 0(,%rax,4), %rsi
leaq 16(%rsp), %rdi
call cudaMalloc@PLT
movslq 8(%rsp), %rsi
movslq 12(%rsp), %rax
imulq %rax, %rsi
salq $2, %rsi
leaq 24(%rsp), %rdi
call cudaMalloc@PLT
movslq 8(%rsp), %rdx
movslq 12(%rsp), %rax
imulq %rax, %rdx
salq $2, %rdx
movl $1, %ecx
movq %r15, %rsi
movq 16(%rsp), %rdi
call cudaMemcpy@PLT
movl 12(%rsp), %eax
movl %eax, 32(%rsp)
movl 8(%rsp), %eax
movl %eax, 36(%rsp)
movl $1, 44(%rsp)
movl $1, 48(%rsp)
movl $0, %r9d
movl $0, %r8d
movq 32(%rsp), %rdx
movl $1, %ecx
movq 44(%rsp), %rdi
movl $1, %esi
call __cudaPushCallConfiguration@PLT
testl %eax, %eax
je .L27
.L14:
movslq 8(%rsp), %rdx
movslq 12(%rsp), %rax
imulq %rax, %rdx
salq $2, %rdx
movl $2, %ecx
movq 24(%rsp), %rsi
movq %r12, %rdi
call cudaMemcpy@PLT
leaq .LC5(%rip), %rsi
movl $2, %edi
movl $0, %eax
call __printf_chk@PLT
movl $0, %ebp
leaq .LC6(%rip), %r13
leaq .LC7(%rip), %r14
cmpl $0, 12(%rsp)
jg .L15
.L16:
movq 16(%rsp), %rdi
call cudaFree@PLT
movq 24(%rsp), %rdi
call cudaFree@PLT
movq %r15, %rdi
call free@PLT
movq %r12, %rdi
call free@PLT
movq 56(%rsp), %rax
subq %fs:40, %rax
jne .L28
movl $0, %eax
addq $72, %rsp
.cfi_remember_state
.cfi_def_cfa_offset 56
popq %rbx
.cfi_def_cfa_offset 48
popq %rbp
.cfi_def_cfa_offset 40
popq %r12
.cfi_def_cfa_offset 32
popq %r13
.cfi_def_cfa_offset 24
popq %r14
.cfi_def_cfa_offset 16
popq %r15
.cfi_def_cfa_offset 8
ret
.L27:
.cfi_restore_state
movl 12(%rsp), %ecx
movl 8(%rsp), %edx
movq 24(%rsp), %rsi
movq 16(%rsp), %rdi
call _Z32__device_stub__Z9transposePiS_iiPiS_ii
jmp .L14
.L17:
imull %ebp, %eax
addl %ebx, %eax
cltq
movl (%r12,%rax,4), %edx
movq %r13, %rsi
movl $2, %edi
movl $0, %eax
call __printf_chk@PLT
addl $1, %ebx
movl 8(%rsp), %eax
cmpl %ebx, %eax
jg .L17
.L18:
movq %r14, %rsi
movl $2, %edi
movl $0, %eax
call __printf_chk@PLT
addl $1, %ebp
cmpl %ebp, 12(%rsp)
jle .L16
.L15:
movl 8(%rsp), %eax
movl $0, %ebx
testl %eax, %eax
jg .L17
jmp .L18
.L28:
call __stack_chk_fail@PLT
.cfi_endproc
.LFE2057:
.size main, .-main
.section .rodata.str1.1
.LC8:
.string "_Z9transposePiS_ii"
.text
.type _ZL24__sti____cudaRegisterAllv, @function
_ZL24__sti____cudaRegisterAllv:
.LFB2085:
.cfi_startproc
endbr64
subq $8, %rsp
.cfi_def_cfa_offset 16
leaq _ZL15__fatDeviceText(%rip), %rdi
call __cudaRegisterFatBinary@PLT
movq %rax, %rdi
movq %rax, _ZL20__cudaFatCubinHandle(%rip)
pushq $0
.cfi_def_cfa_offset 24
pushq $0
.cfi_def_cfa_offset 32
pushq $0
.cfi_def_cfa_offset 40
pushq $0
.cfi_def_cfa_offset 48
movl $0, %r9d
movl $-1, %r8d
leaq .LC8(%rip), %rdx
movq %rdx, %rcx
leaq _Z9transposePiS_ii(%rip), %rsi
call __cudaRegisterFunction@PLT
addq $32, %rsp
.cfi_def_cfa_offset 16
movq _ZL20__cudaFatCubinHandle(%rip), %rdi
call __cudaRegisterFatBinaryEnd@PLT
leaq _ZL26__cudaUnregisterBinaryUtilv(%rip), %rdi
call atexit@PLT
addq $8, %rsp
.cfi_def_cfa_offset 8
ret
.cfi_endproc
.LFE2085:
.size _ZL24__sti____cudaRegisterAllv, .-_ZL24__sti____cudaRegisterAllv
.section .init_array,"aw"
.align 8
.quad _ZL24__sti____cudaRegisterAllv
.section .nvFatBinSegment,"aw"
.align 8
.type _ZL15__fatDeviceText, @object
.size _ZL15__fatDeviceText, 24
_ZL15__fatDeviceText:
.long 1180844977
.long 1
.quad fatbinData
.quad 0
.local _ZL20__cudaFatCubinHandle
.comm _ZL20__cudaFatCubinHandle,8,8
.ident "GCC: (Ubuntu 13.3.0-6ubuntu2~24.04) 13.3.0"
.section .note.GNU-stack,"",@progbits
.section .note.gnu.property,"a"
.align 8
.long 1f - 0f
.long 4f - 1f
.long 5
0:
.string "GNU"
1:
.align 8
.long 0xc0000002
.long 3f - 2f
2:
.long 0x3
3:
.align 8
4: | .text
.file "q4MatrixTranspose.hip"
.globl _Z24__device_stub__transposePiS_ii # -- Begin function _Z24__device_stub__transposePiS_ii
.p2align 4, 0x90
.type _Z24__device_stub__transposePiS_ii,@function
_Z24__device_stub__transposePiS_ii: # @_Z24__device_stub__transposePiS_ii
.cfi_startproc
# %bb.0:
subq $120, %rsp
.cfi_def_cfa_offset 128
movq %rdi, 72(%rsp)
movq %rsi, 64(%rsp)
movl %edx, 12(%rsp)
movl %ecx, 8(%rsp)
leaq 72(%rsp), %rax
movq %rax, 80(%rsp)
leaq 64(%rsp), %rax
movq %rax, 88(%rsp)
leaq 12(%rsp), %rax
movq %rax, 96(%rsp)
leaq 8(%rsp), %rax
movq %rax, 104(%rsp)
leaq 48(%rsp), %rdi
leaq 32(%rsp), %rsi
leaq 24(%rsp), %rdx
leaq 16(%rsp), %rcx
callq __hipPopCallConfiguration
movq 48(%rsp), %rsi
movl 56(%rsp), %edx
movq 32(%rsp), %rcx
movl 40(%rsp), %r8d
leaq 80(%rsp), %r9
movl $_Z9transposePiS_ii, %edi
pushq 16(%rsp)
.cfi_adjust_cfa_offset 8
pushq 32(%rsp)
.cfi_adjust_cfa_offset 8
callq hipLaunchKernel
addq $136, %rsp
.cfi_adjust_cfa_offset -136
retq
.Lfunc_end0:
.size _Z24__device_stub__transposePiS_ii, .Lfunc_end0-_Z24__device_stub__transposePiS_ii
.cfi_endproc
# -- End function
.globl main # -- Begin function main
.p2align 4, 0x90
.type main,@function
main: # @main
.cfi_startproc
# %bb.0:
pushq %rbp
.cfi_def_cfa_offset 16
pushq %r15
.cfi_def_cfa_offset 24
pushq %r14
.cfi_def_cfa_offset 32
pushq %r12
.cfi_def_cfa_offset 40
pushq %rbx
.cfi_def_cfa_offset 48
subq $128, %rsp
.cfi_def_cfa_offset 176
.cfi_offset %rbx, -48
.cfi_offset %r12, -40
.cfi_offset %r14, -32
.cfi_offset %r15, -24
.cfi_offset %rbp, -16
movl $.Lstr, %edi
callq puts@PLT
movl $.L.str.1, %edi
xorl %eax, %eax
callq printf
leaq 4(%rsp), %rsi
movl $.L.str.2, %edi
xorl %eax, %eax
callq __isoc23_scanf
movl $.L.str.3, %edi
xorl %eax, %eax
callq printf
movq %rsp, %rsi
movl $.L.str.2, %edi
xorl %eax, %eax
callq __isoc23_scanf
movslq 4(%rsp), %rax
movslq (%rsp), %r14
imulq %rax, %r14
shlq $2, %r14
movq %r14, %rdi
callq malloc
movq %rax, %rbx
movq %r14, %rdi
callq malloc
movq %rax, %r14
movl $.Lstr.1, %edi
callq puts@PLT
movl 4(%rsp), %eax
movl (%rsp), %ecx
movl %ecx, %edx
imull %eax, %edx
testl %edx, %edx
jle .LBB1_3
# %bb.1: # %.lr.ph.preheader
movq %rbx, %r15
xorl %r12d, %r12d
.p2align 4, 0x90
.LBB1_2: # %.lr.ph
# =>This Inner Loop Header: Depth=1
movl $.L.str.2, %edi
movq %r15, %rsi
xorl %eax, %eax
callq __isoc23_scanf
incq %r12
movl 4(%rsp), %eax
movl (%rsp), %ecx
movl %ecx, %edx
imull %eax, %edx
movslq %edx, %rdx
addq $4, %r15
cmpq %rdx, %r12
jl .LBB1_2
.LBB1_3: # %._crit_edge
cltq
movslq %ecx, %rsi
imulq %rax, %rsi
shlq $2, %rsi
leaq 16(%rsp), %rdi
callq hipMalloc
movslq 4(%rsp), %rax
movslq (%rsp), %rsi
imulq %rax, %rsi
shlq $2, %rsi
leaq 8(%rsp), %rdi
callq hipMalloc
movq 16(%rsp), %rdi
movslq 4(%rsp), %rax
movslq (%rsp), %rdx
imulq %rax, %rdx
shlq $2, %rdx
movq %rbx, %rsi
movl $1, %ecx
callq hipMemcpy
movl (%rsp), %eax
movl 4(%rsp), %edx
shlq $32, %rdx
orq %rax, %rdx
movabsq $4294967297, %rdi # imm = 0x100000001
movl $1, %esi
movl $1, %ecx
xorl %r8d, %r8d
xorl %r9d, %r9d
callq __hipPushCallConfiguration
testl %eax, %eax
jne .LBB1_5
# %bb.4:
movq 16(%rsp), %rax
movq 8(%rsp), %rcx
movl 4(%rsp), %edx
movl (%rsp), %esi
movq %rax, 88(%rsp)
movq %rcx, 80(%rsp)
movl %edx, 28(%rsp)
movl %esi, 24(%rsp)
leaq 88(%rsp), %rax
movq %rax, 96(%rsp)
leaq 80(%rsp), %rax
movq %rax, 104(%rsp)
leaq 28(%rsp), %rax
movq %rax, 112(%rsp)
leaq 24(%rsp), %rax
movq %rax, 120(%rsp)
leaq 64(%rsp), %rdi
leaq 48(%rsp), %rsi
leaq 40(%rsp), %rdx
leaq 32(%rsp), %rcx
callq __hipPopCallConfiguration
movq 64(%rsp), %rsi
movl 72(%rsp), %edx
movq 48(%rsp), %rcx
movl 56(%rsp), %r8d
leaq 96(%rsp), %r9
movl $_Z9transposePiS_ii, %edi
pushq 32(%rsp)
.cfi_adjust_cfa_offset 8
pushq 48(%rsp)
.cfi_adjust_cfa_offset 8
callq hipLaunchKernel
addq $16, %rsp
.cfi_adjust_cfa_offset -16
.LBB1_5:
movq 8(%rsp), %rsi
movslq 4(%rsp), %rax
movslq (%rsp), %rdx
imulq %rax, %rdx
shlq $2, %rdx
movq %r14, %rdi
movl $2, %ecx
callq hipMemcpy
movl $.Lstr.2, %edi
callq puts@PLT
cmpl $0, (%rsp)
jle .LBB1_11
# %bb.6: # %.preheader.preheader
xorl %ebp, %ebp
jmp .LBB1_7
.p2align 4, 0x90
.LBB1_10: # %._crit_edge30
# in Loop: Header=BB1_7 Depth=1
movl $10, %edi
callq putchar@PLT
incl %ebp
cmpl (%rsp), %ebp
jge .LBB1_11
.LBB1_7: # %.preheader
# =>This Loop Header: Depth=1
# Child Loop BB1_9 Depth 2
movl 4(%rsp), %eax
testl %eax, %eax
jle .LBB1_10
# %bb.8: # %.lr.ph29.preheader
# in Loop: Header=BB1_7 Depth=1
xorl %r15d, %r15d
.p2align 4, 0x90
.LBB1_9: # %.lr.ph29
# Parent Loop BB1_7 Depth=1
# => This Inner Loop Header: Depth=2
imull %ebp, %eax
cltq
addq %r15, %rax
movl (%r14,%rax,4), %esi
movl $.L.str.6, %edi
xorl %eax, %eax
callq printf
movl 4(%rsp), %eax
incq %r15
cmpl %eax, %r15d
jl .LBB1_9
jmp .LBB1_10
.LBB1_11: # %._crit_edge32
movq 16(%rsp), %rdi
callq hipFree
movq 8(%rsp), %rdi
callq hipFree
movq %rbx, %rdi
callq free
movq %r14, %rdi
callq free
xorl %eax, %eax
addq $128, %rsp
.cfi_def_cfa_offset 48
popq %rbx
.cfi_def_cfa_offset 40
popq %r12
.cfi_def_cfa_offset 32
popq %r14
.cfi_def_cfa_offset 24
popq %r15
.cfi_def_cfa_offset 16
popq %rbp
.cfi_def_cfa_offset 8
retq
.Lfunc_end1:
.size main, .Lfunc_end1-main
.cfi_endproc
# -- End function
.p2align 4, 0x90 # -- Begin function __hip_module_ctor
.type __hip_module_ctor,@function
__hip_module_ctor: # @__hip_module_ctor
.cfi_startproc
# %bb.0:
subq $40, %rsp
.cfi_def_cfa_offset 48
cmpq $0, __hip_gpubin_handle(%rip)
jne .LBB2_2
# %bb.1:
movl $__hip_fatbin_wrapper, %edi
callq __hipRegisterFatBinary
movq %rax, __hip_gpubin_handle(%rip)
.LBB2_2:
movq __hip_gpubin_handle(%rip), %rdi
xorps %xmm0, %xmm0
movups %xmm0, 16(%rsp)
movups %xmm0, (%rsp)
movl $_Z9transposePiS_ii, %esi
movl $.L__unnamed_1, %edx
movl $.L__unnamed_1, %ecx
movl $-1, %r8d
xorl %r9d, %r9d
callq __hipRegisterFunction
movl $__hip_module_dtor, %edi
addq $40, %rsp
.cfi_def_cfa_offset 8
jmp atexit # TAILCALL
.Lfunc_end2:
.size __hip_module_ctor, .Lfunc_end2-__hip_module_ctor
.cfi_endproc
# -- End function
.p2align 4, 0x90 # -- Begin function __hip_module_dtor
.type __hip_module_dtor,@function
__hip_module_dtor: # @__hip_module_dtor
.cfi_startproc
# %bb.0:
movq __hip_gpubin_handle(%rip), %rdi
testq %rdi, %rdi
je .LBB3_2
# %bb.1:
pushq %rax
.cfi_def_cfa_offset 16
callq __hipUnregisterFatBinary
movq $0, __hip_gpubin_handle(%rip)
addq $8, %rsp
.cfi_def_cfa_offset 8
.LBB3_2:
retq
.Lfunc_end3:
.size __hip_module_dtor, .Lfunc_end3-__hip_module_dtor
.cfi_endproc
# -- End function
.type _Z9transposePiS_ii,@object # @_Z9transposePiS_ii
.section .rodata,"a",@progbits
.globl _Z9transposePiS_ii
.p2align 3, 0x0
_Z9transposePiS_ii:
.quad _Z24__device_stub__transposePiS_ii
.size _Z9transposePiS_ii, 8
.type .L.str.1,@object # @.str.1
.section .rodata.str1.1,"aMS",@progbits,1
.L.str.1:
.asciz "m >> "
.size .L.str.1, 6
.type .L.str.2,@object # @.str.2
.L.str.2:
.asciz "%d"
.size .L.str.2, 3
.type .L.str.3,@object # @.str.3
.L.str.3:
.asciz "n >> "
.size .L.str.3, 6
.type .L.str.6,@object # @.str.6
.L.str.6:
.asciz "%d "
.size .L.str.6, 4
.type .L__unnamed_1,@object # @0
.L__unnamed_1:
.asciz "_Z9transposePiS_ii"
.size .L__unnamed_1, 19
.type __hip_fatbin_wrapper,@object # @__hip_fatbin_wrapper
.section .hipFatBinSegment,"a",@progbits
.p2align 3, 0x0
__hip_fatbin_wrapper:
.long 1212764230 # 0x48495046
.long 1 # 0x1
.quad __hip_fatbin
.quad 0
.size __hip_fatbin_wrapper, 24
.type __hip_gpubin_handle,@object # @__hip_gpubin_handle
.local __hip_gpubin_handle
.comm __hip_gpubin_handle,8,8
.section .init_array,"aw",@init_array
.p2align 3, 0x0
.quad __hip_module_ctor
.type __hip_cuid_,@object # @__hip_cuid_
.bss
.globl __hip_cuid_
__hip_cuid_:
.byte 0 # 0x0
.size __hip_cuid_, 1
.type .Lstr,@object # @str
.section .rodata.str1.1,"aMS",@progbits,1
.Lstr:
.asciz "== Enter Dimension of Matrix A (m x n) =="
.size .Lstr, 42
.type .Lstr.1,@object # @str.1
.Lstr.1:
.asciz "== Matrix A Elements =="
.size .Lstr.1, 24
.type .Lstr.2,@object # @str.2
.Lstr.2:
.asciz "== Matrix B Elements =="
.size .Lstr.2, 24
.section ".linker-options","e",@llvm_linker_options
.ident "AMD clang version 18.0.0git (https://github.com/RadeonOpenCompute/llvm-project roc-6.3.2 25012 e5bf7e55c91490b07c49d8960fa7983d864936c4)"
.section ".note.GNU-stack","",@progbits
.addrsig
.addrsig_sym _Z24__device_stub__transposePiS_ii
.addrsig_sym __hip_module_ctor
.addrsig_sym __hip_module_dtor
.addrsig_sym _Z9transposePiS_ii
.addrsig_sym __hip_fatbin
.addrsig_sym __hip_fatbin_wrapper
.addrsig_sym __hip_cuid_ |
You are a helpful coding assistant specialized in converting CUDA source code to CUDA device assembly. | #include <stdio.h>
#define BLOCKSIZE 32
//Sigmoid function for logistic regression
float sigmoid(float in){
return 1.0 / (1 + exp(-1 * in));
}
//Tiled version of matrix multiply
__global__ void MatrixMultiplyKernel(float *devA, float *devB, float *devC, int rows, int cols, int k, float alpha, float beta)
{
//Get the thread's x and y locations for its run
int idx = threadIdx.x + blockIdx.x * blockDim.x;
int idy = threadIdx.y + blockIdx.y * blockDim.y;
//Allocate shared memory to hold parts of A and B
__shared__ float tileA[BLOCKSIZE][BLOCKSIZE];
__shared__ float tileB[BLOCKSIZE][BLOCKSIZE];
//Use sum to get the result for a specific element
float sum = 0.0;
//Use iter to see if the loop should be run again
int iter = 0;
do{
//Check if the x thread falls within bounds of the matrices
if ((idy < rows) && (threadIdx.x + BLOCKSIZE*iter < k)){
tileA[threadIdx.y][threadIdx.x] = devA[threadIdx.x + idy*k + BLOCKSIZE*iter];
}
else {
tileA[threadIdx.y][threadIdx.x] = 0.0;
}
//Check if the y thread falls within bounds of the matrices
if ((threadIdx.y + BLOCKSIZE*iter < k) && (idx < cols)){
tileB[threadIdx.y][threadIdx.x] = devB[idx + (threadIdx.y + BLOCKSIZE*iter)*cols];
}
else {
tileB[threadIdx.y][threadIdx.x] = 0.0;
}
//Sync to ensure that all of the data has been grabbed for the tiles in this warp
__syncthreads();
//Sum the elements related to the element in C corresponding to idx and idy
for (int i = 0; i < BLOCKSIZE; i++){
sum += tileA[threadIdx.y][i] * tileB[i][threadIdx.x];
}
//Iterate the number done
iter++;
//Sync the threads again to ensure they have all done their work before going through the loop to get data
__syncthreads();
//Check if the tiles have covered all of C
} while (BLOCKSIZE*iter < k);
//If the thread falls within the matrix C, fill in its element, scaled by alpha and beta
if ((idy < rows) && (idx < cols)){
devC[idx + idy*cols] = sum * alpha + devC[idx + idy*cols] * beta;
}
}
__global__ void distKernel(float *devA, float *devB, float *devC, int K)
{
int idy = threadIdx.y + blockIdx.y * blockDim.y;
if ((idy < K)){
devC[idy] = (devA[idy] - devB[idy])*(devA[idy] - devB[idy]);
}
}
//Element wise subtraction of matrix A and B, stored in matrix C
__global__ void sub_sigKernel(float *A, float *B, float *C, int rows)
{
int i = threadIdx.y + blockIdx.y * blockDim.y;
//Ensure the thread is in bounds
if (i < rows){
C[i] = (1.0 / (1 + exp(-1 * B[i])));
C[i] = A[i] - C[i];
}
} | code for sm_80
Function : _Z13sub_sigKernelPfS_S_i
.headerflags @"EF_CUDA_TEXMODE_UNIFIED EF_CUDA_64BIT_ADDRESS EF_CUDA_SM80 EF_CUDA_VIRTUAL_SM(EF_CUDA_SM80)"
/*0000*/ IMAD.MOV.U32 R1, RZ, RZ, c[0x0][0x28] ; /* 0x00000a00ff017624 */
/* 0x000fe400078e00ff */
/*0010*/ S2R R0, SR_TID.Y ; /* 0x0000000000007919 */
/* 0x000e280000002200 */
/*0020*/ S2R R3, SR_CTAID.Y ; /* 0x0000000000037919 */
/* 0x000e240000002600 */
/*0030*/ IMAD R0, R3, c[0x0][0x4], R0 ; /* 0x0000010003007a24 */
/* 0x001fca00078e0200 */
/*0040*/ ISETP.GE.AND P0, PT, R0, c[0x0][0x178], PT ; /* 0x00005e0000007a0c */
/* 0x000fda0003f06270 */
/*0050*/ @P0 EXIT ; /* 0x000000000000094d */
/* 0x000fea0003800000 */
/*0060*/ IMAD.MOV.U32 R3, RZ, RZ, 0x4 ; /* 0x00000004ff037424 */
/* 0x000fe200078e00ff */
/*0070*/ ULDC.64 UR4, c[0x0][0x118] ; /* 0x0000460000047ab9 */
/* 0x000fc60000000a00 */
/*0080*/ IMAD.WIDE R2, R0, R3, c[0x0][0x168] ; /* 0x00005a0000027625 */
/* 0x000fcc00078e0203 */
/*0090*/ LDG.E R2, [R2.64] ; /* 0x0000000402027981 */
/* 0x000ea2000c1e1900 */
/*00a0*/ HFMA2.MMA R5, -RZ, RZ, 0.96630859375, -0.0022525787353515625 ; /* 0x3bbb989dff057435 */
/* 0x000fe200000001ff */
/*00b0*/ IMAD.MOV.U32 R7, RZ, RZ, 0x437c0000 ; /* 0x437c0000ff077424 */
/* 0x000fe200078e00ff */
/*00c0*/ BSSY B0, 0x210 ; /* 0x0000014000007945 */
/* 0x000ff00003800000 */
/*00d0*/ FFMA.SAT R4, -R2, R5, 0.5 ; /* 0x3f00000002047423 */
/* 0x004fc80000002105 */
/*00e0*/ FFMA.RM R4, R4, R7, 12582913 ; /* 0x4b40000104047423 */
/* 0x000fc80000004007 */
/*00f0*/ FADD R5, R4.reuse, -12583039 ; /* 0xcb40007f04057421 */
/* 0x040fe40000000000 */
/*0100*/ IMAD.SHL.U32 R4, R4, 0x800000, RZ ; /* 0x0080000004047824 */
/* 0x000fe400078e00ff */
/*0110*/ FFMA R5, -R2, 1.4426950216293334961, -R5 ; /* 0x3fb8aa3b02057823 */
/* 0x000fc80000000905 */
/*0120*/ FFMA R5, -R2, 1.925963033500011079e-08, R5 ; /* 0x32a5706002057823 */
/* 0x000fcc0000000105 */
/*0130*/ MUFU.EX2 R5, R5 ; /* 0x0000000500057308 */
/* 0x000e240000000800 */
/*0140*/ FFMA R4, R4, R5, 1 ; /* 0x3f80000004047423 */
/* 0x001fca0000000005 */
/*0150*/ IADD3 R2, R4, 0x1800000, RZ ; /* 0x0180000004027810 */
/* 0x000fc80007ffe0ff */
/*0160*/ LOP3.LUT R2, R2, 0x7f800000, RZ, 0xc0, !PT ; /* 0x7f80000002027812 */
/* 0x000fc800078ec0ff */
/*0170*/ ISETP.GT.U32.AND P0, PT, R2, 0x1ffffff, PT ; /* 0x01ffffff0200780c */
/* 0x000fda0003f04070 */
/*0180*/ @P0 BRA 0x1c0 ; /* 0x0000003000000947 */
/* 0x000fea0003800000 */
/*0190*/ MOV R2, 0x1b0 ; /* 0x000001b000027802 */
/* 0x000fe40000000f00 */
/*01a0*/ CALL.REL.NOINC 0x290 ; /* 0x000000e000007944 */
/* 0x000fea0003c00000 */
/*01b0*/ BRA 0x200 ; /* 0x0000004000007947 */
/* 0x000fea0003800000 */
/*01c0*/ MUFU.RCP R7, R4 ; /* 0x0000000400077308 */
/* 0x000e240000001000 */
/*01d0*/ FFMA R2, R4, R7, -1 ; /* 0xbf80000004027423 */
/* 0x001fc80000000007 */
/*01e0*/ FADD.FTZ R2, -R2, -RZ ; /* 0x800000ff02027221 */
/* 0x000fc80000010100 */
/*01f0*/ FFMA R7, R7, R2, R7 ; /* 0x0000000207077223 */
/* 0x000fe40000000007 */
/*0200*/ BSYNC B0 ; /* 0x0000000000007941 */
/* 0x000fea0003800000 */
/*0210*/ MOV R5, 0x4 ; /* 0x0000000400057802 */
/* 0x000fca0000000f00 */
/*0220*/ IMAD.WIDE R2, R0, R5, c[0x0][0x170] ; /* 0x00005c0000027625 */
/* 0x000fc800078e0205 */
/*0230*/ IMAD.WIDE R4, R0, R5, c[0x0][0x160] ; /* 0x0000580000047625 */
/* 0x001fe200078e0205 */
/*0240*/ STG.E [R2.64], R7 ; /* 0x0000000702007986 */
/* 0x000fea000c101904 */
/*0250*/ LDG.E R4, [R4.64] ; /* 0x0000000404047981 */
/* 0x000ea4000c1e1900 */
/*0260*/ FADD R9, R4, -R7 ; /* 0x8000000704097221 */
/* 0x004fca0000000000 */
/*0270*/ STG.E [R2.64], R9 ; /* 0x0000000902007986 */
/* 0x000fe2000c101904 */
/*0280*/ EXIT ; /* 0x000000000000794d */
/* 0x000fea0003800000 */
/*0290*/ IMAD.SHL.U32 R3, R4, 0x2, RZ ; /* 0x0000000204037824 */
/* 0x000fe200078e00ff */
/*02a0*/ BSSY B1, 0x5b0 ; /* 0x0000030000017945 */
/* 0x000fe80003800000 */
/*02b0*/ SHF.R.U32.HI R3, RZ, 0x18, R3 ; /* 0x00000018ff037819 */
/* 0x000fc80000011603 */
/*02c0*/ ISETP.NE.U32.AND P0, PT, R3, RZ, PT ; /* 0x000000ff0300720c */
/* 0x000fda0003f05070 */
/*02d0*/ @P0 BRA 0x380 ; /* 0x000000a000000947 */
/* 0x000fea0003800000 */
/*02e0*/ IMAD.SHL.U32 R3, R4, 0x2, RZ ; /* 0x0000000204037824 */
/* 0x000fca00078e00ff */
/*02f0*/ ISETP.NE.AND P0, PT, R3, RZ, PT ; /* 0x000000ff0300720c */
/* 0x000fda0003f05270 */
/*0300*/ @P0 FFMA R5, R4, 1.84467440737095516160e+19, RZ ; /* 0x5f80000004050823 */
/* 0x000fe200000000ff */
/*0310*/ @!P0 MUFU.RCP R3, R4 ; /* 0x0000000400038308 */
/* 0x000ff00000001000 */
/*0320*/ @P0 MUFU.RCP R6, R5 ; /* 0x0000000500060308 */
/* 0x000e240000001000 */
/*0330*/ @P0 FFMA R7, R5, R6, -1 ; /* 0xbf80000005070423 */
/* 0x001fc80000000006 */
/*0340*/ @P0 FADD.FTZ R7, -R7, -RZ ; /* 0x800000ff07070221 */
/* 0x000fc80000010100 */
/*0350*/ @P0 FFMA R7, R6, R7, R6 ; /* 0x0000000706070223 */
/* 0x000fc80000000006 */
/*0360*/ @P0 FFMA R3, R7, 1.84467440737095516160e+19, RZ ; /* 0x5f80000007030823 */
/* 0x000fe200000000ff */
/*0370*/ BRA 0x5a0 ; /* 0x0000022000007947 */
/* 0x000fea0003800000 */
/*0380*/ IADD3 R5, R3, -0xfd, RZ ; /* 0xffffff0303057810 */
/* 0x000fc80007ffe0ff */
/*0390*/ ISETP.GT.U32.AND P0, PT, R5, 0x1, PT ; /* 0x000000010500780c */
/* 0x000fda0003f04070 */
/*03a0*/ @P0 BRA 0x590 ; /* 0x000001e000000947 */
/* 0x000fea0003800000 */
/*03b0*/ LOP3.LUT R6, R4, 0x7fffff, RZ, 0xc0, !PT ; /* 0x007fffff04067812 */
/* 0x000fe200078ec0ff */
/*03c0*/ HFMA2.MMA R10, -RZ, RZ, 0, 1.78813934326171875e-07 ; /* 0x00000003ff0a7435 */
/* 0x000fe200000001ff */
/*03d0*/ IADD3 R3, R3, -0xfc, RZ ; /* 0xffffff0403037810 */
/* 0x000fe40007ffe0ff */
/*03e0*/ LOP3.LUT R6, R6, 0x3f800000, RZ, 0xfc, !PT ; /* 0x3f80000006067812 */
/* 0x000fc800078efcff */
/*03f0*/ MUFU.RCP R7, R6 ; /* 0x0000000600077308 */
/* 0x000e260000001000 */
/*0400*/ SHF.L.U32 R11, R10, R5, RZ ; /* 0x000000050a0b7219 */
/* 0x000fe200000006ff */
/*0410*/ FFMA R8, R6, R7, -1 ; /* 0xbf80000006087423 */
/* 0x001fc80000000007 */
/*0420*/ FADD.FTZ R8, -R8, -RZ ; /* 0x800000ff08087221 */
/* 0x000fc80000010100 */
/*0430*/ FFMA.RM R9, R7.reuse, R8.reuse, R7.reuse ; /* 0x0000000807097223 */
/* 0x1c0fe40000004007 */
/*0440*/ FFMA.RP R8, R7, R8, R7 ; /* 0x0000000807087223 */
/* 0x000fc60000008007 */
/*0450*/ LOP3.LUT R7, R9.reuse, 0x7fffff, RZ, 0xc0, !PT ; /* 0x007fffff09077812 */
/* 0x040fe400078ec0ff */
/*0460*/ FSETP.NEU.FTZ.AND P0, PT, R9, R8, PT ; /* 0x000000080900720b */
/* 0x000fe40003f1d000 */
/*0470*/ LOP3.LUT R8, R7, 0x800000, RZ, 0xfc, !PT ; /* 0x0080000007087812 */
/* 0x000fe400078efcff */
/*0480*/ SEL R7, RZ, 0xffffffff, !P0 ; /* 0xffffffffff077807 */
/* 0x000fe40004000000 */
/*0490*/ LOP3.LUT R6, R11, R8, RZ, 0xc0, !PT ; /* 0x000000080b067212 */
/* 0x000fe400078ec0ff */
/*04a0*/ SHF.R.U32.HI R3, RZ, R3, R8 ; /* 0x00000003ff037219 */
/* 0x000fe20000011608 */
/*04b0*/ IMAD.MOV R7, RZ, RZ, -R7 ; /* 0x000000ffff077224 */
/* 0x000fe200078e0a07 */
/*04c0*/ SHF.R.U32.HI R6, RZ, R5, R6 ; /* 0x00000005ff067219 */
/* 0x000fc80000011606 */
/*04d0*/ LOP3.LUT P1, RZ, R7, R5, R8, 0xf8, !PT ; /* 0x0000000507ff7212 */
/* 0x000fe4000782f808 */
/*04e0*/ LOP3.LUT P0, RZ, R6.reuse, 0x1, RZ, 0xc0, !PT ; /* 0x0000000106ff7812 */
/* 0x040fe4000780c0ff */
/*04f0*/ LOP3.LUT P2, RZ, R6, 0x2, RZ, 0xc0, !PT ; /* 0x0000000206ff7812 */
/* 0x000fc8000784c0ff */
/*0500*/ PLOP3.LUT P0, PT, P0, P1, P2, 0xe0, 0x0 ; /* 0x000000000000781c */
/* 0x000fe40000703c20 */
/*0510*/ LOP3.LUT P1, RZ, R4, 0x7fffff, RZ, 0xc0, !PT ; /* 0x007fffff04ff7812 */
/* 0x000fe4000782c0ff */
/*0520*/ SEL R5, RZ, 0x1, !P0 ; /* 0x00000001ff057807 */
/* 0x000fca0004000000 */
/*0530*/ IMAD.MOV R5, RZ, RZ, -R5 ; /* 0x000000ffff057224 */
/* 0x000fca00078e0a05 */
/*0540*/ ISETP.GE.AND P0, PT, R5, RZ, PT ; /* 0x000000ff0500720c */
/* 0x000fda0003f06270 */
/*0550*/ @!P0 IADD3 R3, R3, 0x1, RZ ; /* 0x0000000103038810 */
/* 0x000fc80007ffe0ff */
/*0560*/ @!P1 SHF.L.U32 R3, R3, 0x1, RZ ; /* 0x0000000103039819 */
/* 0x000fc800000006ff */
/*0570*/ LOP3.LUT R3, R3, 0x80000000, R4, 0xf8, !PT ; /* 0x8000000003037812 */
/* 0x000fe200078ef804 */
/*0580*/ BRA 0x5a0 ; /* 0x0000001000007947 */
/* 0x000fea0003800000 */
/*0590*/ MUFU.RCP R3, R4 ; /* 0x0000000400037308 */
/* 0x0000640000001000 */
/*05a0*/ BSYNC B1 ; /* 0x0000000000017941 */
/* 0x000fea0003800000 */
/*05b0*/ IMAD.MOV.U32 R7, RZ, RZ, R3 ; /* 0x000000ffff077224 */
/* 0x002fe200078e0003 */
/*05c0*/ MOV R3, 0x0 ; /* 0x0000000000037802 */
/* 0x000fc80000000f00 */
/*05d0*/ RET.REL.NODEC R2 0x0 ; /* 0xfffffa2002007950 */
/* 0x000fea0003c3ffff */
/*05e0*/ BRA 0x5e0; /* 0xfffffff000007947 */
/* 0x000fc0000383ffff */
/*05f0*/ NOP; /* 0x0000000000007918 */
/* 0x000fc00000000000 */
/*0600*/ NOP; /* 0x0000000000007918 */
/* 0x000fc00000000000 */
/*0610*/ NOP; /* 0x0000000000007918 */
/* 0x000fc00000000000 */
/*0620*/ NOP; /* 0x0000000000007918 */
/* 0x000fc00000000000 */
/*0630*/ NOP; /* 0x0000000000007918 */
/* 0x000fc00000000000 */
/*0640*/ NOP; /* 0x0000000000007918 */
/* 0x000fc00000000000 */
/*0650*/ NOP; /* 0x0000000000007918 */
/* 0x000fc00000000000 */
/*0660*/ NOP; /* 0x0000000000007918 */
/* 0x000fc00000000000 */
/*0670*/ NOP; /* 0x0000000000007918 */
/* 0x000fc00000000000 */
..........
Function : _Z10distKernelPfS_S_i
.headerflags @"EF_CUDA_TEXMODE_UNIFIED EF_CUDA_64BIT_ADDRESS EF_CUDA_SM80 EF_CUDA_VIRTUAL_SM(EF_CUDA_SM80)"
/*0000*/ MOV R1, c[0x0][0x28] ; /* 0x00000a0000017a02 */
/* 0x000fe40000000f00 */
/*0010*/ S2R R6, SR_TID.Y ; /* 0x0000000000067919 */
/* 0x000e280000002200 */
/*0020*/ S2R R3, SR_CTAID.Y ; /* 0x0000000000037919 */
/* 0x000e240000002600 */
/*0030*/ IMAD R6, R3, c[0x0][0x4], R6 ; /* 0x0000010003067a24 */
/* 0x001fca00078e0206 */
/*0040*/ ISETP.GE.AND P0, PT, R6, c[0x0][0x178], PT ; /* 0x00005e0006007a0c */
/* 0x000fda0003f06270 */
/*0050*/ @P0 EXIT ; /* 0x000000000000094d */
/* 0x000fea0003800000 */
/*0060*/ HFMA2.MMA R7, -RZ, RZ, 0, 2.384185791015625e-07 ; /* 0x00000004ff077435 */
/* 0x000fe200000001ff */
/*0070*/ ULDC.64 UR4, c[0x0][0x118] ; /* 0x0000460000047ab9 */
/* 0x000fd20000000a00 */
/*0080*/ IMAD.WIDE R4, R6, R7, c[0x0][0x168] ; /* 0x00005a0006047625 */
/* 0x000fc800078e0207 */
/*0090*/ IMAD.WIDE R2, R6.reuse, R7.reuse, c[0x0][0x160] ; /* 0x0000580006027625 */
/* 0x0c0fe400078e0207 */
/*00a0*/ LDG.E R4, [R4.64] ; /* 0x0000000404047981 */
/* 0x000ea8000c1e1900 */
/*00b0*/ LDG.E R3, [R2.64] ; /* 0x0000000402037981 */
/* 0x000ea2000c1e1900 */
/*00c0*/ IMAD.WIDE R6, R6, R7, c[0x0][0x170] ; /* 0x00005c0006067625 */
/* 0x000fc800078e0207 */
/*00d0*/ FADD R0, -R4, R3 ; /* 0x0000000304007221 */
/* 0x004fc80000000100 */
/*00e0*/ FMUL R9, R0, R0 ; /* 0x0000000000097220 */
/* 0x000fca0000400000 */
/*00f0*/ STG.E [R6.64], R9 ; /* 0x0000000906007986 */
/* 0x000fe2000c101904 */
/*0100*/ EXIT ; /* 0x000000000000794d */
/* 0x000fea0003800000 */
/*0110*/ BRA 0x110; /* 0xfffffff000007947 */
/* 0x000fc0000383ffff */
/*0120*/ NOP; /* 0x0000000000007918 */
/* 0x000fc00000000000 */
/*0130*/ NOP; /* 0x0000000000007918 */
/* 0x000fc00000000000 */
/*0140*/ NOP; /* 0x0000000000007918 */
/* 0x000fc00000000000 */
/*0150*/ NOP; /* 0x0000000000007918 */
/* 0x000fc00000000000 */
/*0160*/ NOP; /* 0x0000000000007918 */
/* 0x000fc00000000000 */
/*0170*/ NOP; /* 0x0000000000007918 */
/* 0x000fc00000000000 */
/*0180*/ NOP; /* 0x0000000000007918 */
/* 0x000fc00000000000 */
/*0190*/ NOP; /* 0x0000000000007918 */
/* 0x000fc00000000000 */
/*01a0*/ NOP; /* 0x0000000000007918 */
/* 0x000fc00000000000 */
/*01b0*/ NOP; /* 0x0000000000007918 */
/* 0x000fc00000000000 */
/*01c0*/ NOP; /* 0x0000000000007918 */
/* 0x000fc00000000000 */
/*01d0*/ NOP; /* 0x0000000000007918 */
/* 0x000fc00000000000 */
/*01e0*/ NOP; /* 0x0000000000007918 */
/* 0x000fc00000000000 */
/*01f0*/ NOP; /* 0x0000000000007918 */
/* 0x000fc00000000000 */
..........
Function : _Z20MatrixMultiplyKernelPfS_S_iiiff
.headerflags @"EF_CUDA_TEXMODE_UNIFIED EF_CUDA_64BIT_ADDRESS EF_CUDA_SM80 EF_CUDA_VIRTUAL_SM(EF_CUDA_SM80)"
/*0000*/ MOV R1, c[0x0][0x28] ; /* 0x00000a0000017a02 */
/* 0x000fe40000000f00 */
/*0010*/ S2R R3, SR_CTAID.Y ; /* 0x0000000000037919 */
/* 0x000e220000002600 */
/*0020*/ MOV R13, RZ ; /* 0x000000ff000d7202 */
/* 0x000fe20000000f00 */
/*0030*/ ULDC.64 UR4, c[0x0][0x118] ; /* 0x0000460000047ab9 */
/* 0x000fe40000000a00 */
/*0040*/ S2R R0, SR_TID.Y ; /* 0x0000000000007919 */
/* 0x000e280000002200 */
/*0050*/ S2R R19, SR_CTAID.X ; /* 0x0000000000137919 */
/* 0x000e680000002500 */
/*0060*/ S2R R2, SR_TID.X ; /* 0x0000000000027919 */
/* 0x000e620000002100 */
/*0070*/ IMAD R18, R3, c[0x0][0x4], R0 ; /* 0x0000010003127a24 */
/* 0x001fe200078e0200 */
/*0080*/ SHF.L.U32 R17, R0, 0x7, RZ ; /* 0x0000000700117819 */
/* 0x000fe200000006ff */
/*0090*/ HFMA2.MMA R3, -RZ, RZ, 0, 0 ; /* 0x00000000ff037435 */
/* 0x000fc600000001ff */
/*00a0*/ ISETP.GE.AND P1, PT, R18, c[0x0][0x178], PT ; /* 0x00005e0012007a0c */
/* 0x000fe20003f26270 */
/*00b0*/ IMAD R19, R19, c[0x0][0x0], R2 ; /* 0x0000000013137a24 */
/* 0x002fe200078e0202 */
/*00c0*/ LEA R16, R2, R17, 0x2 ; /* 0x0000001102107211 */
/* 0x000fca00078e10ff */
/*00d0*/ LEA R5, R3, R2, 0x5 ; /* 0x0000000203057211 */
/* 0x000fe400078e28ff */
/*00e0*/ ISETP.GE.AND P0, PT, R19, c[0x0][0x17c], PT ; /* 0x00005f0013007a0c */
/* 0x000fe40003f06270 */
/*00f0*/ LEA R14, R3, R0, 0x5 ; /* 0x00000000030e7211 */
/* 0x000fe400078e28ff */
/*0100*/ ISETP.GE.U32.OR P2, PT, R5, c[0x0][0x180], P1 ; /* 0x0000600005007a0c */
/* 0x000fe40000f46470 */
/*0110*/ ISETP.GE.U32.OR P3, PT, R14, c[0x0][0x180], P0 ; /* 0x000060000e007a0c */
/* 0x000fc40000766470 */
/*0120*/ MOV R21, RZ ; /* 0x000000ff00157202 */
/* 0x000fe40000000f00 */
/*0130*/ MOV R25, RZ ; /* 0x000000ff00197202 */
/* 0x000fce0000000f00 */
/*0140*/ @!P2 MOV R9, 0x4 ; /* 0x000000040009a802 */
/* 0x000fe20000000f00 */
/*0150*/ @!P2 IMAD R8, R18, c[0x0][0x180], R5 ; /* 0x000060001208aa24 */
/* 0x000fe200078e0205 */
/*0160*/ @!P3 MOV R15, 0x4 ; /* 0x00000004000fb802 */
/* 0x000fe20000000f00 */
/*0170*/ @!P3 IMAD R14, R14, c[0x0][0x17c], R19 ; /* 0x00005f000e0eba24 */
/* 0x000fe400078e0213 */
/*0180*/ @!P2 IMAD.WIDE.U32 R8, R8, R9, c[0x0][0x160] ; /* 0x000058000808a625 */
/* 0x000fc800078e0009 */
/*0190*/ @!P3 IMAD.WIDE.U32 R14, R14, R15, c[0x0][0x168] ; /* 0x00005a000e0eb625 */
/* 0x000fe200078e000f */
/*01a0*/ @!P2 LDG.E R21, [R8.64] ; /* 0x000000040815a981 */
/* 0x000ea8000c1e1900 */
/*01b0*/ @!P3 LDG.E R25, [R14.64] ; /* 0x000000040e19b981 */
/* 0x000ee2000c1e1900 */
/*01c0*/ IADD3 R3, R3, 0x1, RZ ; /* 0x0000000103037810 */
/* 0x000fc60007ffe0ff */
/*01d0*/ STS [R16], R21 ; /* 0x0000001510007388 */
/* 0x004fe80000000800 */
/*01e0*/ STS [R16+0x1000], R25 ; /* 0x0010001910007388 */
/* 0x008fe80000000800 */
/*01f0*/ BAR.SYNC.DEFER_BLOCKING 0x0 ; /* 0x0000000000007b1d */
/* 0x000fec0000010000 */
/*0200*/ LDS R12, [R2.X4+0x1000] ; /* 0x00100000020c7984 */
/* 0x000fe80000004800 */
/*0210*/ LDS.128 R4, [R17] ; /* 0x0000000011047984 */
/* 0x000e280000000c00 */
/*0220*/ LDS R26, [R2.X4+0x1080] ; /* 0x00108000021a7984 */
/* 0x000e680000004800 */
/*0230*/ LDS R23, [R2.X4+0x1100] ; /* 0x0011000002177984 */
/* 0x000ea80000004800 */
/*0240*/ LDS R20, [R2.X4+0x1180] ; /* 0x0011800002147984 */
/* 0x000ee80000004800 */
/*0250*/ LDS R27, [R2.X4+0x1200] ; /* 0x00120000021b7984 */
/* 0x000fe80000004800 */
/*0260*/ LDS.128 R8, [R17+0x10] ; /* 0x0000100011087984 */
/* 0x000f280000000c00 */
/*0270*/ LDS R24, [R2.X4+0x1280] ; /* 0x0012800002187984 */
/* 0x000f680000004800 */
/*0280*/ LDS R21, [R2.X4+0x1300] ; /* 0x0013000002157984 */
/* 0x000f680000004800 */
/*0290*/ LDS R22, [R2.X4+0x1380] ; /* 0x0013800002167984 */
/* 0x000f680000004800 */
/*02a0*/ LDS R25, [R2.X4+0x1400] ; /* 0x0014000002197984 */
/* 0x000fe20000004800 */
/*02b0*/ FFMA R4, R12, R4, R13 ; /* 0x000000040c047223 */
/* 0x001fc6000000000d */
/*02c0*/ LDS.128 R12, [R17+0x20] ; /* 0x00002000110c7984 */
/* 0x000e220000000c00 */
/*02d0*/ FFMA R4, R26, R5, R4 ; /* 0x000000051a047223 */
/* 0x002fc60000000004 */
/*02e0*/ LDS R26, [R2.X4+0x1480] ; /* 0x00148000021a7984 */
/* 0x000e620000004800 */
/*02f0*/ FFMA R4, R23, R6, R4 ; /* 0x0000000617047223 */
/* 0x004fc60000000004 */
/*0300*/ LDS R23, [R2.X4+0x1500] ; /* 0x0015000002177984 */
/* 0x000ea20000004800 */
/*0310*/ FFMA R4, R20, R7, R4 ; /* 0x0000000714047223 */
/* 0x008fc60000000004 */
/*0320*/ LDS R20, [R2.X4+0x1580] ; /* 0x0015800002147984 */
/* 0x000ee20000004800 */
/*0330*/ FFMA R4, R27, R8, R4 ; /* 0x000000081b047223 */
/* 0x010fc60000000004 */
/*0340*/ LDS R27, [R2.X4+0x1600] ; /* 0x00160000021b7984 */
/* 0x000fe20000004800 */
/*0350*/ FFMA R9, R24, R9, R4 ; /* 0x0000000918097223 */
/* 0x020fc60000000004 */
/*0360*/ LDS.128 R4, [R17+0x30] ; /* 0x0000300011047984 */
/* 0x000f220000000c00 */
/*0370*/ FFMA R9, R21, R10, R9 ; /* 0x0000000a15097223 */
/* 0x000fc60000000009 */
/*0380*/ LDS R24, [R2.X4+0x1680] ; /* 0x0016800002187984 */
/* 0x000f620000004800 */
/*0390*/ FFMA R9, R22, R11, R9 ; /* 0x0000000b16097223 */
/* 0x000fc60000000009 */
/*03a0*/ LDS R21, [R2.X4+0x1700] ; /* 0x0017000002157984 */
/* 0x000f680000004800 */
/*03b0*/ LDS R22, [R2.X4+0x1780] ; /* 0x0017800002167984 */
/* 0x000f620000004800 */
/*03c0*/ FFMA R9, R25, R12, R9 ; /* 0x0000000c19097223 */
/* 0x001fc60000000009 */
/*03d0*/ LDS R25, [R2.X4+0x1800] ; /* 0x0018000002197984 */
/* 0x000fe20000004800 */
/*03e0*/ FFMA R13, R26, R13, R9 ; /* 0x0000000d1a0d7223 */
/* 0x002fc60000000009 */
/*03f0*/ LDS.128 R8, [R17+0x40] ; /* 0x0000400011087984 */
/* 0x000e220000000c00 */
/*0400*/ FFMA R13, R23, R14, R13 ; /* 0x0000000e170d7223 */
/* 0x004fc6000000000d */
/*0410*/ LDS R26, [R2.X4+0x1880] ; /* 0x00188000021a7984 */
/* 0x000e620000004800 */
/*0420*/ FFMA R13, R20, R15, R13 ; /* 0x0000000f140d7223 */
/* 0x008fc6000000000d */
/*0430*/ LDS R23, [R2.X4+0x1900] ; /* 0x0019000002177984 */
/* 0x000ea80000004800 */
/*0440*/ LDS R20, [R2.X4+0x1980] ; /* 0x0019800002147984 */
/* 0x000ee20000004800 */
/*0450*/ FFMA R4, R27, R4, R13 ; /* 0x000000041b047223 */
/* 0x010fc6000000000d */
/*0460*/ LDS R27, [R2.X4+0x1a00] ; /* 0x001a0000021b7984 */
/* 0x000fe20000004800 */
/*0470*/ FFMA R4, R24, R5, R4 ; /* 0x0000000518047223 */
/* 0x020fc60000000004 */
/*0480*/ LDS.128 R12, [R17+0x50] ; /* 0x00005000110c7984 */
/* 0x000f220000000c00 */
/*0490*/ FFMA R4, R21, R6, R4 ; /* 0x0000000615047223 */
/* 0x000fc60000000004 */
/*04a0*/ LDS R24, [R2.X4+0x1a80] ; /* 0x001a800002187984 */
/* 0x000f620000004800 */
/*04b0*/ FFMA R4, R22, R7, R4 ; /* 0x0000000716047223 */
/* 0x000fc60000000004 */
/*04c0*/ LDS R21, [R2.X4+0x1b00] ; /* 0x001b000002157984 */
/* 0x000f680000004800 */
/*04d0*/ LDS R22, [R2.X4+0x1b80] ; /* 0x001b800002167984 */
/* 0x000f620000004800 */
/*04e0*/ FFMA R4, R25, R8, R4 ; /* 0x0000000819047223 */
/* 0x001fc60000000004 */
/*04f0*/ LDS R25, [R2.X4+0x1c00] ; /* 0x001c000002197984 */
/* 0x000fe20000004800 */
/*0500*/ FFMA R9, R26, R9, R4 ; /* 0x000000091a097223 */
/* 0x002fc60000000004 */
/*0510*/ LDS.128 R4, [R17+0x60] ; /* 0x0000600011047984 */
/* 0x000e220000000c00 */
/*0520*/ FFMA R9, R23, R10, R9 ; /* 0x0000000a17097223 */
/* 0x004fc60000000009 */
/*0530*/ LDS R26, [R2.X4+0x1c80] ; /* 0x001c8000021a7984 */
/* 0x000e620000004800 */
/*0540*/ FFMA R9, R20, R11, R9 ; /* 0x0000000b14097223 */
/* 0x008fc60000000009 */
/*0550*/ LDS R23, [R2.X4+0x1d00] ; /* 0x001d000002177984 */
/* 0x000ea80000004800 */
/*0560*/ LDS R20, [R2.X4+0x1e80] ; /* 0x001e800002147984 */
/* 0x000fe20000004800 */
/*0570*/ FFMA R9, R27, R12, R9 ; /* 0x0000000c1b097223 */
/* 0x010fc60000000009 */
/*0580*/ LDS R12, [R2.X4+0x1d80] ; /* 0x001d8000020c7984 */
/* 0x000ee20000004800 */
/*0590*/ FFMA R24, R24, R13, R9 ; /* 0x0000000d18187223 */
/* 0x020fc60000000009 */
/*05a0*/ LDS R13, [R2.X4+0x1e00] ; /* 0x001e0000020d7984 */
/* 0x000fe20000004800 */
/*05b0*/ FFMA R24, R21, R14, R24 ; /* 0x0000000e15187223 */
/* 0x000fc60000000018 */
/*05c0*/ LDS.128 R8, [R17+0x70] ; /* 0x0000700011087984 */
/* 0x000f220000000c00 */
/*05d0*/ FFMA R15, R22, R15, R24 ; /* 0x0000000f160f7223 */
/* 0x000fc60000000018 */
/*05e0*/ LDS R21, [R2.X4+0x1f00] ; /* 0x001f000002157984 */
/* 0x000f680000004800 */
/*05f0*/ LDS R14, [R2.X4+0x1f80] ; /* 0x001f8000020e7984 */
/* 0x000f620000004800 */
/*0600*/ FFMA R4, R25, R4, R15 ; /* 0x0000000419047223 */
/* 0x001fc8000000000f */
/*0610*/ FFMA R4, R26, R5, R4 ; /* 0x000000051a047223 */
/* 0x002fe20000000004 */
/*0620*/ SHF.L.U32 R5, R3, 0x5, RZ ; /* 0x0000000503057819 */
/* 0x000fc600000006ff */
/*0630*/ FFMA R4, R23, R6, R4 ; /* 0x0000000617047223 */
/* 0x004fe20000000004 */
/*0640*/ BAR.SYNC.DEFER_BLOCKING 0x0 ; /* 0x0000000000007b1d */
/* 0x000fe20000010000 */
/*0650*/ ISETP.GE.AND P2, PT, R5, c[0x0][0x180], PT ; /* 0x0000600005007a0c */
/* 0x000fe40003f46270 */
/*0660*/ FFMA R4, R12, R7, R4 ; /* 0x000000070c047223 */
/* 0x008fc80000000004 */
/*0670*/ FFMA R4, R13, R8, R4 ; /* 0x000000080d047223 */
/* 0x010fc80000000004 */
/*0680*/ FFMA R4, R20, R9, R4 ; /* 0x0000000914047223 */
/* 0x000fc80000000004 */
/*0690*/ FFMA R4, R21, R10, R4 ; /* 0x0000000a15047223 */
/* 0x020fc80000000004 */
/*06a0*/ FFMA R13, R14, R11, R4 ; /* 0x0000000b0e0d7223 */
/* 0x000fe20000000004 */
/*06b0*/ @!P2 BRA 0xd0 ; /* 0xfffffa100000a947 */
/* 0x000fea000383ffff */
/*06c0*/ ISETP.GE.OR P0, PT, R18, c[0x0][0x178], P0 ; /* 0x00005e0012007a0c */
/* 0x000fda0000706670 */
/*06d0*/ @P0 EXIT ; /* 0x000000000000094d */
/* 0x000fea0003800000 */
/*06e0*/ HFMA2.MMA R3, -RZ, RZ, 0, 2.384185791015625e-07 ; /* 0x00000004ff037435 */
/* 0x000fe200000001ff */
/*06f0*/ IMAD R2, R18, c[0x0][0x17c], R19 ; /* 0x00005f0012027a24 */
/* 0x000fd200078e0213 */
/*0700*/ IMAD.WIDE R2, R2, R3, c[0x0][0x170] ; /* 0x00005c0002027625 */
/* 0x000fca00078e0203 */
/*0710*/ LDG.E R0, [R2.64] ; /* 0x0000000402007981 */
/* 0x000ea4000c1e1900 */
/*0720*/ FMUL R0, R0, c[0x0][0x188] ; /* 0x0000620000007a20 */
/* 0x004fc80000400000 */
/*0730*/ FFMA R13, R13, c[0x0][0x184], R0 ; /* 0x000061000d0d7a23 */
/* 0x000fca0000000000 */
/*0740*/ STG.E [R2.64], R13 ; /* 0x0000000d02007986 */
/* 0x000fe2000c101904 */
/*0750*/ EXIT ; /* 0x000000000000794d */
/* 0x000fea0003800000 */
/*0760*/ BRA 0x760; /* 0xfffffff000007947 */
/* 0x000fc0000383ffff */
/*0770*/ NOP; /* 0x0000000000007918 */
/* 0x000fc00000000000 */
/*0780*/ NOP; /* 0x0000000000007918 */
/* 0x000fc00000000000 */
/*0790*/ NOP; /* 0x0000000000007918 */
/* 0x000fc00000000000 */
/*07a0*/ NOP; /* 0x0000000000007918 */
/* 0x000fc00000000000 */
/*07b0*/ NOP; /* 0x0000000000007918 */
/* 0x000fc00000000000 */
/*07c0*/ NOP; /* 0x0000000000007918 */
/* 0x000fc00000000000 */
/*07d0*/ NOP; /* 0x0000000000007918 */
/* 0x000fc00000000000 */
/*07e0*/ NOP; /* 0x0000000000007918 */
/* 0x000fc00000000000 */
/*07f0*/ NOP; /* 0x0000000000007918 */
/* 0x000fc00000000000 */
.......... |
You are a helpful coding assistant specialized in converting CUDA source code to CUDA host assembly. | #include <stdio.h>
#define BLOCKSIZE 32
//Sigmoid function for logistic regression
float sigmoid(float in){
return 1.0 / (1 + exp(-1 * in));
}
//Tiled version of matrix multiply
__global__ void MatrixMultiplyKernel(float *devA, float *devB, float *devC, int rows, int cols, int k, float alpha, float beta)
{
//Get the thread's x and y locations for its run
int idx = threadIdx.x + blockIdx.x * blockDim.x;
int idy = threadIdx.y + blockIdx.y * blockDim.y;
//Allocate shared memory to hold parts of A and B
__shared__ float tileA[BLOCKSIZE][BLOCKSIZE];
__shared__ float tileB[BLOCKSIZE][BLOCKSIZE];
//Use sum to get the result for a specific element
float sum = 0.0;
//Use iter to see if the loop should be run again
int iter = 0;
do{
//Check if the x thread falls within bounds of the matrices
if ((idy < rows) && (threadIdx.x + BLOCKSIZE*iter < k)){
tileA[threadIdx.y][threadIdx.x] = devA[threadIdx.x + idy*k + BLOCKSIZE*iter];
}
else {
tileA[threadIdx.y][threadIdx.x] = 0.0;
}
//Check if the y thread falls within bounds of the matrices
if ((threadIdx.y + BLOCKSIZE*iter < k) && (idx < cols)){
tileB[threadIdx.y][threadIdx.x] = devB[idx + (threadIdx.y + BLOCKSIZE*iter)*cols];
}
else {
tileB[threadIdx.y][threadIdx.x] = 0.0;
}
//Sync to ensure that all of the data has been grabbed for the tiles in this warp
__syncthreads();
//Sum the elements related to the element in C corresponding to idx and idy
for (int i = 0; i < BLOCKSIZE; i++){
sum += tileA[threadIdx.y][i] * tileB[i][threadIdx.x];
}
//Iterate the number done
iter++;
//Sync the threads again to ensure they have all done their work before going through the loop to get data
__syncthreads();
//Check if the tiles have covered all of C
} while (BLOCKSIZE*iter < k);
//If the thread falls within the matrix C, fill in its element, scaled by alpha and beta
if ((idy < rows) && (idx < cols)){
devC[idx + idy*cols] = sum * alpha + devC[idx + idy*cols] * beta;
}
}
__global__ void distKernel(float *devA, float *devB, float *devC, int K)
{
int idy = threadIdx.y + blockIdx.y * blockDim.y;
if ((idy < K)){
devC[idy] = (devA[idy] - devB[idy])*(devA[idy] - devB[idy]);
}
}
//Element wise subtraction of matrix A and B, stored in matrix C
__global__ void sub_sigKernel(float *A, float *B, float *C, int rows)
{
int i = threadIdx.y + blockIdx.y * blockDim.y;
//Ensure the thread is in bounds
if (i < rows){
C[i] = (1.0 / (1 + exp(-1 * B[i])));
C[i] = A[i] - C[i];
}
} | .file "tmpxft_001a6260_00000000-6_kernel.cudafe1.cpp"
.text
#APP
#NO_APP
.type _ZL26__cudaUnregisterBinaryUtilv, @function
_ZL26__cudaUnregisterBinaryUtilv:
.LFB2060:
.cfi_startproc
endbr64
subq $8, %rsp
.cfi_def_cfa_offset 16
movq _ZL20__cudaFatCubinHandle(%rip), %rdi
call __cudaUnregisterFatBinary@PLT
addq $8, %rsp
.cfi_def_cfa_offset 8
ret
.cfi_endproc
.LFE2060:
.size _ZL26__cudaUnregisterBinaryUtilv, .-_ZL26__cudaUnregisterBinaryUtilv
.globl _Z7sigmoidf
.type _Z7sigmoidf, @function
_Z7sigmoidf:
.LFB2057:
.cfi_startproc
endbr64
subq $8, %rsp
.cfi_def_cfa_offset 16
xorps .LC0(%rip), %xmm0
call expf@PLT
movss .LC1(%rip), %xmm1
addss %xmm1, %xmm0
divss %xmm0, %xmm1
movaps %xmm1, %xmm0
addq $8, %rsp
.cfi_def_cfa_offset 8
ret
.cfi_endproc
.LFE2057:
.size _Z7sigmoidf, .-_Z7sigmoidf
.globl _Z49__device_stub__Z20MatrixMultiplyKernelPfS_S_iiiffPfS_S_iiiff
.type _Z49__device_stub__Z20MatrixMultiplyKernelPfS_S_iiiffPfS_S_iiiff, @function
_Z49__device_stub__Z20MatrixMultiplyKernelPfS_S_iiiffPfS_S_iiiff:
.LFB2082:
.cfi_startproc
endbr64
subq $200, %rsp
.cfi_def_cfa_offset 208
movq %rdi, 40(%rsp)
movq %rsi, 32(%rsp)
movq %rdx, 24(%rsp)
movl %ecx, 20(%rsp)
movl %r8d, 16(%rsp)
movl %r9d, 12(%rsp)
movss %xmm0, 8(%rsp)
movss %xmm1, 4(%rsp)
movq %fs:40, %rax
movq %rax, 184(%rsp)
xorl %eax, %eax
leaq 40(%rsp), %rax
movq %rax, 112(%rsp)
leaq 32(%rsp), %rax
movq %rax, 120(%rsp)
leaq 24(%rsp), %rax
movq %rax, 128(%rsp)
leaq 20(%rsp), %rax
movq %rax, 136(%rsp)
leaq 16(%rsp), %rax
movq %rax, 144(%rsp)
leaq 12(%rsp), %rax
movq %rax, 152(%rsp)
leaq 8(%rsp), %rax
movq %rax, 160(%rsp)
leaq 4(%rsp), %rax
movq %rax, 168(%rsp)
movl $1, 64(%rsp)
movl $1, 68(%rsp)
movl $1, 72(%rsp)
movl $1, 76(%rsp)
movl $1, 80(%rsp)
movl $1, 84(%rsp)
leaq 56(%rsp), %rcx
leaq 48(%rsp), %rdx
leaq 76(%rsp), %rsi
leaq 64(%rsp), %rdi
call __cudaPopCallConfiguration@PLT
testl %eax, %eax
je .L9
.L5:
movq 184(%rsp), %rax
subq %fs:40, %rax
jne .L10
addq $200, %rsp
.cfi_remember_state
.cfi_def_cfa_offset 8
ret
.L9:
.cfi_restore_state
pushq 56(%rsp)
.cfi_def_cfa_offset 216
pushq 56(%rsp)
.cfi_def_cfa_offset 224
leaq 128(%rsp), %r9
movq 92(%rsp), %rcx
movl 100(%rsp), %r8d
movq 80(%rsp), %rsi
movl 88(%rsp), %edx
leaq _Z20MatrixMultiplyKernelPfS_S_iiiff(%rip), %rdi
call cudaLaunchKernel@PLT
addq $16, %rsp
.cfi_def_cfa_offset 208
jmp .L5
.L10:
call __stack_chk_fail@PLT
.cfi_endproc
.LFE2082:
.size _Z49__device_stub__Z20MatrixMultiplyKernelPfS_S_iiiffPfS_S_iiiff, .-_Z49__device_stub__Z20MatrixMultiplyKernelPfS_S_iiiffPfS_S_iiiff
.globl _Z20MatrixMultiplyKernelPfS_S_iiiff
.type _Z20MatrixMultiplyKernelPfS_S_iiiff, @function
_Z20MatrixMultiplyKernelPfS_S_iiiff:
.LFB2083:
.cfi_startproc
endbr64
subq $8, %rsp
.cfi_def_cfa_offset 16
call _Z49__device_stub__Z20MatrixMultiplyKernelPfS_S_iiiffPfS_S_iiiff
addq $8, %rsp
.cfi_def_cfa_offset 8
ret
.cfi_endproc
.LFE2083:
.size _Z20MatrixMultiplyKernelPfS_S_iiiff, .-_Z20MatrixMultiplyKernelPfS_S_iiiff
.globl _Z35__device_stub__Z10distKernelPfS_S_iPfS_S_i
.type _Z35__device_stub__Z10distKernelPfS_S_iPfS_S_i, @function
_Z35__device_stub__Z10distKernelPfS_S_iPfS_S_i:
.LFB2084:
.cfi_startproc
endbr64
subq $152, %rsp
.cfi_def_cfa_offset 160
movq %rdi, 24(%rsp)
movq %rsi, 16(%rsp)
movq %rdx, 8(%rsp)
movl %ecx, 4(%rsp)
movq %fs:40, %rax
movq %rax, 136(%rsp)
xorl %eax, %eax
leaq 24(%rsp), %rax
movq %rax, 96(%rsp)
leaq 16(%rsp), %rax
movq %rax, 104(%rsp)
leaq 8(%rsp), %rax
movq %rax, 112(%rsp)
leaq 4(%rsp), %rax
movq %rax, 120(%rsp)
movl $1, 48(%rsp)
movl $1, 52(%rsp)
movl $1, 56(%rsp)
movl $1, 60(%rsp)
movl $1, 64(%rsp)
movl $1, 68(%rsp)
leaq 40(%rsp), %rcx
leaq 32(%rsp), %rdx
leaq 60(%rsp), %rsi
leaq 48(%rsp), %rdi
call __cudaPopCallConfiguration@PLT
testl %eax, %eax
je .L17
.L13:
movq 136(%rsp), %rax
subq %fs:40, %rax
jne .L18
addq $152, %rsp
.cfi_remember_state
.cfi_def_cfa_offset 8
ret
.L17:
.cfi_restore_state
pushq 40(%rsp)
.cfi_def_cfa_offset 168
pushq 40(%rsp)
.cfi_def_cfa_offset 176
leaq 112(%rsp), %r9
movq 76(%rsp), %rcx
movl 84(%rsp), %r8d
movq 64(%rsp), %rsi
movl 72(%rsp), %edx
leaq _Z10distKernelPfS_S_i(%rip), %rdi
call cudaLaunchKernel@PLT
addq $16, %rsp
.cfi_def_cfa_offset 160
jmp .L13
.L18:
call __stack_chk_fail@PLT
.cfi_endproc
.LFE2084:
.size _Z35__device_stub__Z10distKernelPfS_S_iPfS_S_i, .-_Z35__device_stub__Z10distKernelPfS_S_iPfS_S_i
.globl _Z10distKernelPfS_S_i
.type _Z10distKernelPfS_S_i, @function
_Z10distKernelPfS_S_i:
.LFB2085:
.cfi_startproc
endbr64
subq $8, %rsp
.cfi_def_cfa_offset 16
call _Z35__device_stub__Z10distKernelPfS_S_iPfS_S_i
addq $8, %rsp
.cfi_def_cfa_offset 8
ret
.cfi_endproc
.LFE2085:
.size _Z10distKernelPfS_S_i, .-_Z10distKernelPfS_S_i
.globl _Z38__device_stub__Z13sub_sigKernelPfS_S_iPfS_S_i
.type _Z38__device_stub__Z13sub_sigKernelPfS_S_iPfS_S_i, @function
_Z38__device_stub__Z13sub_sigKernelPfS_S_iPfS_S_i:
.LFB2086:
.cfi_startproc
endbr64
subq $152, %rsp
.cfi_def_cfa_offset 160
movq %rdi, 24(%rsp)
movq %rsi, 16(%rsp)
movq %rdx, 8(%rsp)
movl %ecx, 4(%rsp)
movq %fs:40, %rax
movq %rax, 136(%rsp)
xorl %eax, %eax
leaq 24(%rsp), %rax
movq %rax, 96(%rsp)
leaq 16(%rsp), %rax
movq %rax, 104(%rsp)
leaq 8(%rsp), %rax
movq %rax, 112(%rsp)
leaq 4(%rsp), %rax
movq %rax, 120(%rsp)
movl $1, 48(%rsp)
movl $1, 52(%rsp)
movl $1, 56(%rsp)
movl $1, 60(%rsp)
movl $1, 64(%rsp)
movl $1, 68(%rsp)
leaq 40(%rsp), %rcx
leaq 32(%rsp), %rdx
leaq 60(%rsp), %rsi
leaq 48(%rsp), %rdi
call __cudaPopCallConfiguration@PLT
testl %eax, %eax
je .L25
.L21:
movq 136(%rsp), %rax
subq %fs:40, %rax
jne .L26
addq $152, %rsp
.cfi_remember_state
.cfi_def_cfa_offset 8
ret
.L25:
.cfi_restore_state
pushq 40(%rsp)
.cfi_def_cfa_offset 168
pushq 40(%rsp)
.cfi_def_cfa_offset 176
leaq 112(%rsp), %r9
movq 76(%rsp), %rcx
movl 84(%rsp), %r8d
movq 64(%rsp), %rsi
movl 72(%rsp), %edx
leaq _Z13sub_sigKernelPfS_S_i(%rip), %rdi
call cudaLaunchKernel@PLT
addq $16, %rsp
.cfi_def_cfa_offset 160
jmp .L21
.L26:
call __stack_chk_fail@PLT
.cfi_endproc
.LFE2086:
.size _Z38__device_stub__Z13sub_sigKernelPfS_S_iPfS_S_i, .-_Z38__device_stub__Z13sub_sigKernelPfS_S_iPfS_S_i
.globl _Z13sub_sigKernelPfS_S_i
.type _Z13sub_sigKernelPfS_S_i, @function
_Z13sub_sigKernelPfS_S_i:
.LFB2087:
.cfi_startproc
endbr64
subq $8, %rsp
.cfi_def_cfa_offset 16
call _Z38__device_stub__Z13sub_sigKernelPfS_S_iPfS_S_i
addq $8, %rsp
.cfi_def_cfa_offset 8
ret
.cfi_endproc
.LFE2087:
.size _Z13sub_sigKernelPfS_S_i, .-_Z13sub_sigKernelPfS_S_i
.section .rodata.str1.1,"aMS",@progbits,1
.LC2:
.string "_Z13sub_sigKernelPfS_S_i"
.LC3:
.string "_Z10distKernelPfS_S_i"
.section .rodata.str1.8,"aMS",@progbits,1
.align 8
.LC4:
.string "_Z20MatrixMultiplyKernelPfS_S_iiiff"
.text
.type _ZL24__sti____cudaRegisterAllv, @function
_ZL24__sti____cudaRegisterAllv:
.LFB2089:
.cfi_startproc
endbr64
pushq %rbx
.cfi_def_cfa_offset 16
.cfi_offset 3, -16
leaq _ZL15__fatDeviceText(%rip), %rdi
call __cudaRegisterFatBinary@PLT
movq %rax, %rbx
movq %rax, _ZL20__cudaFatCubinHandle(%rip)
pushq $0
.cfi_def_cfa_offset 24
pushq $0
.cfi_def_cfa_offset 32
pushq $0
.cfi_def_cfa_offset 40
pushq $0
.cfi_def_cfa_offset 48
movl $0, %r9d
movl $-1, %r8d
leaq .LC2(%rip), %rdx
movq %rdx, %rcx
leaq _Z13sub_sigKernelPfS_S_i(%rip), %rsi
movq %rax, %rdi
call __cudaRegisterFunction@PLT
addq $32, %rsp
.cfi_def_cfa_offset 16
pushq $0
.cfi_def_cfa_offset 24
pushq $0
.cfi_def_cfa_offset 32
pushq $0
.cfi_def_cfa_offset 40
pushq $0
.cfi_def_cfa_offset 48
movl $0, %r9d
movl $-1, %r8d
leaq .LC3(%rip), %rdx
movq %rdx, %rcx
leaq _Z10distKernelPfS_S_i(%rip), %rsi
movq %rbx, %rdi
call __cudaRegisterFunction@PLT
addq $32, %rsp
.cfi_def_cfa_offset 16
pushq $0
.cfi_def_cfa_offset 24
pushq $0
.cfi_def_cfa_offset 32
pushq $0
.cfi_def_cfa_offset 40
pushq $0
.cfi_def_cfa_offset 48
movl $0, %r9d
movl $-1, %r8d
leaq .LC4(%rip), %rdx
movq %rdx, %rcx
leaq _Z20MatrixMultiplyKernelPfS_S_iiiff(%rip), %rsi
movq %rbx, %rdi
call __cudaRegisterFunction@PLT
addq $32, %rsp
.cfi_def_cfa_offset 16
movq _ZL20__cudaFatCubinHandle(%rip), %rdi
call __cudaRegisterFatBinaryEnd@PLT
leaq _ZL26__cudaUnregisterBinaryUtilv(%rip), %rdi
call atexit@PLT
popq %rbx
.cfi_def_cfa_offset 8
ret
.cfi_endproc
.LFE2089:
.size _ZL24__sti____cudaRegisterAllv, .-_ZL24__sti____cudaRegisterAllv
.section .init_array,"aw"
.align 8
.quad _ZL24__sti____cudaRegisterAllv
.section .nvFatBinSegment,"aw"
.align 8
.type _ZL15__fatDeviceText, @object
.size _ZL15__fatDeviceText, 24
_ZL15__fatDeviceText:
.long 1180844977
.long 1
.quad fatbinData
.quad 0
.local _ZL20__cudaFatCubinHandle
.comm _ZL20__cudaFatCubinHandle,8,8
.section .rodata.cst16,"aM",@progbits,16
.align 16
.LC0:
.long -2147483648
.long 0
.long 0
.long 0
.section .rodata.cst4,"aM",@progbits,4
.align 4
.LC1:
.long 1065353216
.ident "GCC: (Ubuntu 13.3.0-6ubuntu2~24.04) 13.3.0"
.section .note.GNU-stack,"",@progbits
.section .note.gnu.property,"a"
.align 8
.long 1f - 0f
.long 4f - 1f
.long 5
0:
.string "GNU"
1:
.align 8
.long 0xc0000002
.long 3f - 2f
2:
.long 0x3
3:
.align 8
4: |
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