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module ND4B1LEHMX2 ( O, I1, I2, I3, B1 ); output O; input I1, I2, I3, B1; wire o2; wire o1; wire n1; and g1 (o1, I1, I2); not g2 (n1, B1); and g3 (o2, n1, I3); nand g4 (O, o1, o2); endmodule
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module ND4B1LEHMX3 ( O, I1, I2, I3, B1 ); output O; input I1, I2, I3, B1; wire o2; wire o1; wire n1; and g1 (o1, I1, I2); not g2 (n1, B1); and g3 (o2, n1, I3); nand g4 (O, o1, o2); endmodule
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module ND4B2LEHMX1 ( O, I1, I2, B1, B2 ); output O; input I1, I2, B1, B2; wire o2; wire o1; and g1 (o1, I1, I2); nor g2 (o2, B1, B2); nand g3 (O, o1, o2); endmodule
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module ND4B2LEHMX2 ( O, I1, I2, B1, B2 ); output O; input I1, I2, B1, B2; wire o2; wire o1; and g1 (o1, I1, I2); nor g2 (o2, B1, B2); nand g3 (O, o1, o2); endmodule
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module ND4B2LEHMX3 ( O, I1, I2, B1, B2 ); output O; input I1, I2, B1, B2; wire o2; wire o1; and g1 (o1, I1, I2); nor g2 (o2, B1, B2); nand g3 (O, o1, o2); endmodule
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module ND4LEHMX1 ( O, I1, I2, I3, I4 ); output O; input I1, I2, I3, I4; nand4 g1 ( O, I1, I2, I3, I4 ); endmodule
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module ND4LEHMX2 ( O, I1, I2, I3, I4 ); output O; input I1, I2, I3, I4; nand4 g1 ( O, I1, I2, I3, I4 ); endmodule
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module ND4LEHMX3 ( O, I1, I2, I3, I4 ); output O; input I1, I2, I3, I4; nand4 g1 ( O, I1, I2, I3, I4 ); endmodule
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module ND4M2HLEHMX3 ( O, I1, I2, I3, I4 ); output O; input I1, I2, I3, I4; nand4 g1 ( O, I1, I2, I3, I4 ); endmodule
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module ND4M2HLEHMX4 ( O, I1, I2, I3, I4 ); output O; input I1, I2, I3, I4; nand4 g1 ( O, I1, I2, I3, I4 ); endmodule
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module NR2BPNLEHMX1 ( O, I1, I2 ); output O; input I1, I2; nor g1 (O, I1, I2); endmodule
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module NR2BPNLEHMX2 ( O, I1, I2 ); output O; input I1, I2; nor g1 (O, I1, I2); endmodule
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module NR2BPNLEHMX3 ( O, I1, I2 ); output O; input I1, I2; nor g1 (O, I1, I2); endmodule
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module NR2BPNLEHMX4 ( O, I1, I2 ); output O; input I1, I2; nor g1 (O, I1, I2); endmodule
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module NR2BPNLEHMX6 ( O, I1, I2 ); output O; input I1, I2; nor g1 (O, I1, I2); endmodule
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module NR2BPNLEHMX8 ( O, I1, I2 ); output O; input I1, I2; nor g1 (O, I1, I2); endmodule
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module NR2BPNM2HLEHMX10 ( O, I1, I2 ); output O; input I1, I2; nor g1 (O, I1, I2); endmodule
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module NR2BPNM2HLEHMX12 ( O, I1, I2 ); output O; input I1, I2; nor g1 (O, I1, I2); endmodule
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module NR2BPNM2HLEHMX16 ( O, I1, I2 ); output O; input I1, I2; nor g1 (O, I1, I2); endmodule
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module NR2BPNM2HLEHMX6 ( O, I1, I2 ); output O; input I1, I2; nor g1 (O, I1, I2); endmodule
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module NR2BPNM2HLEHMX8 ( O, I1, I2 ); output O; input I1, I2; nor g1 (O, I1, I2); endmodule
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module NR2CKLEHMX1 ( O, I1, I2 ); output O; input I1, I2; nor g1 (O, I1, I2); endmodule
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module NR2CKLEHMX2 ( O, I1, I2 ); output O; input I1, I2; nor g1 (O, I1, I2); endmodule
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module NR2CKLEHMX3 ( O, I1, I2 ); output O; input I1, I2; nor g1 (O, I1, I2); endmodule
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module NR2CKLEHMX4 ( O, I1, I2 ); output O; input I1, I2; nor g1 (O, I1, I2); endmodule
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module NR2CKLEHMX6 ( O, I1, I2 ); output O; input I1, I2; nor g1 (O, I1, I2); endmodule
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module NR2CKLEHMX8 ( O, I1, I2 ); output O; input I1, I2; nor g1 (O, I1, I2); endmodule
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module NR2LEHMX1 ( O, I1, I2 ); output O; input I1, I2; nor g1 (O, I1, I2); endmodule
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module NR2LEHMX2 ( O, I1, I2 ); output O; input I1, I2; nor g1 (O, I1, I2); endmodule
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module NR2LEHMX3 ( O, I1, I2 ); output O; input I1, I2; nor g1 (O, I1, I2); endmodule
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module NR2LEHMX4 ( O, I1, I2 ); output O; input I1, I2; nor g1 (O, I1, I2); endmodule
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module NR2LEHMX6 ( O, I1, I2 ); output O; input I1, I2; nor g1 (O, I1, I2); endmodule
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module NR2LEHMX8 ( O, I1, I2 ); output O; input I1, I2; nor g1 (O, I1, I2); endmodule
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module NR2M2HLEHMX10 ( O, I1, I2 ); output O; input I1, I2; nor g1 (O, I1, I2); endmodule
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module NR2M2HLEHMX12 ( O, I1, I2 ); output O; input I1, I2; nor g1 (O, I1, I2); endmodule
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module NR2M2HLEHMX16 ( O, I1, I2 ); output O; input I1, I2; nor g1 (O, I1, I2); endmodule
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module NR2M2HLEHMX6 ( O, I1, I2 ); output O; input I1, I2; nor g1 (O, I1, I2); endmodule
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module NR2M2HLEHMX8 ( O, I1, I2 ); output O; input I1, I2; nor g1 (O, I1, I2); endmodule
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module NR3LEHMX1 ( O, I1, I2, I3 ); output O; input I1, I2, I3; nor3 g1 ( O, I1, I2, I3 ); endmodule
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module NR3LEHMX2 ( O, I1, I2, I3 ); output O; input I1, I2, I3; nor3 g1 ( O, I1, I2, I3 ); endmodule
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module NR3LEHMX3 ( O, I1, I2, I3 ); output O; input I1, I2, I3; nor3 g1 ( O, I1, I2, I3 ); endmodule
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module NR3LEHMX4 ( O, I1, I2, I3 ); output O; input I1, I2, I3; nor3 g1 ( O, I1, I2, I3 ); endmodule
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module NR3LEHMX6 ( O, I1, I2, I3 ); output O; input I1, I2, I3; nor3 g1 ( O, I1, I2, I3 ); endmodule
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module NR3LEHMX8 ( O, I1, I2, I3 ); output O; input I1, I2, I3; nor3 g1 ( O, I1, I2, I3 ); endmodule
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module NR3M2HLEHMX10 ( O, I1, I2, I3 ); output O; input I1, I2, I3; nor3 g1 ( O, I1, I2, I3 ); endmodule
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module NR3M2HLEHMX6 ( O, I1, I2, I3 ); output O; input I1, I2, I3; nor3 g1 ( O, I1, I2, I3 ); endmodule
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module NR3M2HLEHMX8 ( O, I1, I2, I3 ); output O; input I1, I2, I3; nor3 g1 ( O, I1, I2, I3 ); endmodule
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module NR4LEHMX1 ( O, I1, I2, I3, I4 ); output O; input I1, I2, I3, I4; nor4 g1 ( O, I1, I2, I3, I4 ); endmodule
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module NR4LEHMX2 ( O, I1, I2, I3, I4 ); output O; input I1, I2, I3, I4; nor4 g1 ( O, I1, I2, I3, I4 ); endmodule
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module NR4LEHMX3 ( O, I1, I2, I3, I4 ); output O; input I1, I2, I3, I4; nor4 g1 ( O, I1, I2, I3, I4 ); endmodule
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module OA112LEHMX1 ( O, A1, B1, C1, C2 ); output O; input A1, B1, C1, C2; wire o2; wire o1; or g1 (o1, C1, C2); nand3 g2 ( o2, A1, B1, o1 ); not g3 (O, o2); endmodule
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module OA112LEHMX2 ( O, A1, B1, C1, C2 ); output O; input A1, B1, C1, C2; wire o2; wire o1; or g1 (o1, C1, C2); nand3 g2 ( o2, A1, B1, o1 ); not g3 (O, o2); endmodule
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module OA112LEHMX3 ( O, A1, B1, C1, C2 ); output O; input A1, B1, C1, C2; wire o2; wire o1; or g1 (o1, C1, C2); nand3 g2 ( o2, A1, B1, o1 ); not g3 (O, o2); endmodule
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module OA12LEHMX1 ( O, A1, B1, B2 ); output O; input A1, B1, B2; wire o2; wire o1; or g1 (o1, B1, B2); nand g2 (o2, A1, o1); not g3 (O, o2); endmodule
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module OA12LEHMX2 ( O, A1, B1, B2 ); output O; input A1, B1, B2; wire o2; wire o1; or g1 (o1, B1, B2); nand g2 (o2, A1, o1); not g3 (O, o2); endmodule
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module OA12LEHMX3 ( O, A1, B1, B2 ); output O; input A1, B1, B2; wire o2; wire o1; or g1 (o1, B1, B2); nand g2 (o2, A1, o1); not g3 (O, o2); endmodule
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module OA12LEHMX4 ( O, A1, B1, B2 ); output O; input A1, B1, B2; wire o2; wire o1; or g1 (o1, B1, B2); nand g2 (o2, A1, o1); not g3 (O, o2); endmodule
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module OA12LEHMX6 ( O, A1, B1, B2 ); output O; input A1, B1, B2; wire o2; wire o1; or g1 (o1, B1, B2); nand g2 (o2, A1, o1); not g3 (O, o2); endmodule
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module OA13LEHMX1 ( O, A1, B1, B2, B3 ); output O; input A1, B1, B2, B3; wire o2; wire o1; or3 g1 ( o1, B1, B2, B3 ); nand g2 (o2, A1, o1); not g3 (O, o2); endmodule
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module OA13LEHMX2 ( O, A1, B1, B2, B3 ); output O; input A1, B1, B2, B3; wire o2; wire o1; or3 g1 ( o1, B1, B2, B3 ); nand g2 (o2, A1, o1); not g3 (O, o2); endmodule
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module OA13LEHMX3 ( O, A1, B1, B2, B3 ); output O; input A1, B1, B2, B3; wire o2; wire o1; or3 g1 ( o1, B1, B2, B3 ); nand g2 (o2, A1, o1); not g3 (O, o2); endmodule
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module OA222LEHMX1 ( O, A1, A2, B1, B2, C1, C2 ); output O; input A1, A2, B1, B2, C1, C2; wire o4; wire o2; wire o1; wire o3; or g1 (o1, B1, B2); or g2 (o2, A1, A2); or g5 (o3, C1, C2); nand3 g3 ( o4, o1, o2, o3 ); not g4 (O, o4); endmodule
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module OA222LEHMX2 ( O, A1, A2, B1, B2, C1, C2 ); output O; input A1, A2, B1, B2, C1, C2; wire o4; wire o2; wire o1; wire o3; or g1 (o1, B1, B2); or g2 (o2, A1, A2); or g5 (o3, C1, C2); nand3 g3 ( o4, o1, o2, o3 ); not g4 (O, o4); endmodule
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module OA222LEHMX3 ( O, A1, A2, B1, B2, C1, C2 ); output O; input A1, A2, B1, B2, C1, C2; wire o4; wire o2; wire o1; wire o3; or g1 (o1, B1, B2); or g2 (o2, A1, A2); or g5 (o3, C1, C2); nand3 g3 ( o4, o1, o2, o3 ); not g4 (O, o4); endmodule
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module OA22LEHMX1 ( O, A1, A2, B1, B2 ); output O; input A1, A2, B1, B2; wire o2; wire o1; wire o3; or g1 (o1, B1, B2); or g2 (o2, A1, A2); nand g3 (o3, o1, o2); not g4 (O, o3); endmodule
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module OA22LEHMX2 ( O, A1, A2, B1, B2 ); output O; input A1, A2, B1, B2; wire o2; wire o1; wire o3; or g1 (o1, B1, B2); or g2 (o2, A1, A2); nand g3 (o3, o1, o2); not g4 (O, o3); endmodule
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module OA22LEHMX3 ( O, A1, A2, B1, B2 ); output O; input A1, A2, B1, B2; wire o2; wire o1; wire o3; or g1 (o1, B1, B2); or g2 (o2, A1, A2); nand g3 (o3, o1, o2); not g4 (O, o3); endmodule
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module OA22LEHMX4 ( O, A1, A2, B1, B2 ); output O; input A1, A2, B1, B2; wire o2; wire o1; wire o3; or g1 (o1, B1, B2); or g2 (o2, A1, A2); nand g3 (o3, o1, o2); not g4 (O, o3); endmodule
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module OA22LEHMX6 ( O, A1, A2, B1, B2 ); output O; input A1, A2, B1, B2; wire o2; wire o1; wire o3; or g1 (o1, B1, B2); or g2 (o2, A1, A2); nand g3 (o3, o1, o2); not g4 (O, o3); endmodule
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module OAI112LEHMX1 ( O, A1, B1, C1, C2 ); output O; input A1, B1, C1, C2; wire o1; or g1 (o1, C1, C2); nand3 g2 ( O, A1, B1, o1 ); endmodule
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module OAI112LEHMX2 ( O, A1, B1, C1, C2 ); output O; input A1, B1, C1, C2; wire o1; or g1 (o1, C1, C2); nand3 g2 ( O, A1, B1, o1 ); endmodule
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module OAI112LEHMX3 ( O, A1, B1, C1, C2 ); output O; input A1, B1, C1, C2; wire o1; or g1 (o1, C1, C2); nand3 g2 ( O, A1, B1, o1 ); endmodule
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module OAI122LEHMX1 ( O, A1, B1, B2, C1, C2 ); output O; input A1, B1, B2, C1, C2; wire o2; wire o1; or g1 (o1, B1, B2); or g2 (o2, C1, C2); nand3 g3 ( O, A1, o1, o2 ); endmodule
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module OAI122LEHMX2 ( O, A1, B1, B2, C1, C2 ); output O; input A1, B1, B2, C1, C2; wire o2; wire o1; or g1 (o1, B1, B2); or g2 (o2, C1, C2); nand3 g3 ( O, A1, o1, o2 ); endmodule
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module OAI122LEHMX3 ( O, A1, B1, B2, C1, C2 ); output O; input A1, B1, B2, C1, C2; wire o2; wire o1; or g1 (o1, B1, B2); or g2 (o2, C1, C2); nand3 g3 ( O, A1, o1, o2 ); endmodule
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module OAI12B2LEHMX1 ( O, A1, B1, B2 ); output O; input A1, B1, B2; wire i1; wire i2; wire i3; not g1 (i1, B1); not g2 (i2, B2); or g3 (i3, i2, i1); nand g4 (O, i3, A1); endmodule
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module OAI12B2LEHMX2 ( O, A1, B1, B2 ); output O; input A1, B1, B2; wire i1; wire i2; wire i3; not g1 (i1, B1); not g2 (i2, B2); or g3 (i3, i2, i1); nand g4 (O, i3, A1); endmodule
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module OAI12B2LEHMX3 ( O, A1, B1, B2 ); output O; input A1, B1, B2; wire i1; wire i2; wire i3; not g1 (i1, B1); not g2 (i2, B2); or g3 (i3, i2, i1); nand g4 (O, i3, A1); endmodule
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module OAI12LEHMX1 ( O, A1, B1, B2 ); output O; input A1, B1, B2; wire o1; or g1 (o1, B1, B2); nand g2 (O, A1, o1); endmodule
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module OAI12LEHMX2 ( O, A1, B1, B2 ); output O; input A1, B1, B2; wire o1; or g1 (o1, B1, B2); nand g2 (O, A1, o1); endmodule
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module OAI12LEHMX3 ( O, A1, B1, B2 ); output O; input A1, B1, B2; wire o1; or g1 (o1, B1, B2); nand g2 (O, A1, o1); endmodule
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module OAI12LEHMX4 ( O, A1, B1, B2 ); output O; input A1, B1, B2; wire o1; or g1 (o1, B1, B2); nand g2 (O, A1, o1); endmodule
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module OAI12LEHMX6 ( O, A1, B1, B2 ); output O; input A1, B1, B2; wire o1; or g1 (o1, B1, B2); nand g2 (O, A1, o1); endmodule
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module OAI12M2HLEHMX4 ( O, A1, B1, B2 ); output O; input A1, B1, B2; wire o1; or g1 (o1, B1, B2); nand g2 (O, A1, o1); endmodule
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module OAI12M2HLEHMX6 ( O, A1, B1, B2 ); output O; input A1, B1, B2; wire o1; or g1 (o1, B1, B2); nand g2 (O, A1, o1); endmodule
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module OAI12M2HLEHMX8 ( O, A1, B1, B2 ); output O; input A1, B1, B2; wire o1; or g1 (o1, B1, B2); nand g2 (O, A1, o1); endmodule
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module OAI13LEHMX1 ( O, A1, B1, B2, B3 ); output O; input A1, B1, B2, B3; wire o1; or3 g1 ( o1, B1, B2, B3 ); nand g2 (O, A1, o1); endmodule
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module OAI13LEHMX2 ( O, A1, B1, B2, B3 ); output O; input A1, B1, B2, B3; wire o1; or3 g1 ( o1, B1, B2, B3 ); nand g2 (O, A1, o1); endmodule
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module OAI13LEHMX3 ( O, A1, B1, B2, B3 ); output O; input A1, B1, B2, B3; wire o1; or3 g1 ( o1, B1, B2, B3 ); nand g2 (O, A1, o1); endmodule
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module OAI13LEHMX4 ( O, A1, B1, B2, B3 ); output O; input A1, B1, B2, B3; wire o1; or3 g1 ( o1, B1, B2, B3 ); nand g2 (O, A1, o1); endmodule
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module OAI21B1ISLEHMX1 ( O, A1, A2, B1B ); output O; input A1, A2, B1B; wire b1b_bar; wire o1; or g1 (o1, A1, A2); not g2 (b1b_bar, B1B); nand g3 (O, o1, b1b_bar); endmodule
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module OAI21B1ISLEHMX2 ( O, A1, A2, B1B ); output O; input A1, A2, B1B; wire b1b_bar; wire o1; or g1 (o1, A1, A2); not g2 (b1b_bar, B1B); nand g3 (O, o1, b1b_bar); endmodule
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module OAI21B1ISLEHMX3 ( O, A1, A2, B1B ); output O; input A1, A2, B1B; wire b1b_bar; wire o1; or g1 (o1, A1, A2); not g2 (b1b_bar, B1B); nand g3 (O, o1, b1b_bar); endmodule
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module OAI21B1LEHMX1 ( O, A1, A2, B1B ); output O; input A1, A2, B1B; wire b1b_bar; wire o1; or g1 (o1, A1, A2); not g2 (b1b_bar, B1B); nand g3 (O, o1, b1b_bar); endmodule
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module OAI21B1LEHMX2 ( O, A1, A2, B1B ); output O; input A1, A2, B1B; wire b1b_bar; wire o1; or g1 (o1, A1, A2); not g2 (b1b_bar, B1B); nand g3 (O, o1, b1b_bar); endmodule
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module OAI21B1LEHMX3 ( O, A1, A2, B1B ); output O; input A1, A2, B1B; wire b1b_bar; wire o1; or g1 (o1, A1, A2); not g2 (b1b_bar, B1B); nand g3 (O, o1, b1b_bar); endmodule
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module OAI222LEHMX1 ( O, A1, A2, B1, B2, C1, C2 ); output O; input A1, A2, B1, B2, C1, C2; wire o2; wire o1; wire o3; or g1 (o1, B1, B2); or g3 (o2, A1, A2); or g4 (o3, C1, C2); nand3 g2 ( O, o1, o2, o3 ); endmodule
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module OAI222LEHMX2 ( O, A1, A2, B1, B2, C1, C2 ); output O; input A1, A2, B1, B2, C1, C2; wire o2; wire o1; wire o3; or g1 (o1, B1, B2); or g3 (o2, A1, A2); or g4 (o3, C1, C2); nand3 g2 ( O, o1, o2, o3 ); endmodule
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module OAI222LEHMX3 ( O, A1, A2, B1, B2, C1, C2 ); output O; input A1, A2, B1, B2, C1, C2; wire o2; wire o1; wire o3; or g1 (o1, B1, B2); or g3 (o2, A1, A2); or g4 (o3, C1, C2); nand3 g2 ( O, o1, o2, o3 ); endmodule
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module OAI22B2LEHMX1 ( O, A1, A2, B1B, B2B ); output O; input A1, A2, B1B, B2B; wire o2; wire o1; or g1 (o1, A1, A2); nand g2 (o2, B1B, B2B); nand g3 (O, o1, o2); endmodule
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