code stringlengths 35 6.69k | score float64 6.5 11.5 |
|---|---|
module st_feature_addr_gen_Add_16Ux16U_16U_4_1 (
in2,
in1,
out1
); /* architecture "behavioural" */
input [15:0] in2, in1;
output [15:0] out1;
wire [15:0] asc001;
assign asc001 = +(in2) + (in1);
assign out1 = asc001;
endmodule
| 6.663606 |
module st_feature_addr_gen_Add_16Ux16U_16U_4_2 (
in2,
in1,
out1
); /* architecture "behavioural" */
input [15:0] in2, in1;
output [15:0] out1;
wire [15:0] asc001;
assign asc001 = +(in2) + (in1);
assign out1 = asc001;
endmodule
| 6.663606 |
module st_feature_addr_gen_Add_16Ux16U_16U_4_3 (
in2,
in1,
out1
); /* architecture "behavioural" */
input [15:0] in2, in1;
output [15:0] out1;
wire [15:0] asc001;
assign asc001 = +(in2) + (in1);
assign out1 = asc001;
endmodule
| 6.663606 |
module st_feature_addr_gen_Add_16Ux16U_16U_4_4 (
in2,
in1,
out1
); /* architecture "behavioural" */
input [15:0] in2, in1;
output [15:0] out1;
wire [15:0] asc001;
assign asc001 = +(in2) + (in1);
assign out1 = asc001;
endmodule
| 6.663606 |
module st_feature_addr_gen_Add_16Ux16U_17U_1 (
in2,
in1,
out1
); /* architecture "behavioural" */
input [15:0] in2, in1;
output [16:0] out1;
wire [16:0] asc001;
assign asc001 = +(in2) + (in1);
assign out1 = asc001;
endmodule
| 6.663606 |
module st_feature_addr_gen_Add_16Ux16U_17U_4 (
in2,
in1,
out1
); /* architecture "behavioural" */
input [15:0] in2, in1;
output [16:0] out1;
wire [16:0] asc001;
assign asc001 = +(in2) + (in1);
assign out1 = asc001;
endmodule
| 6.663606 |
module st_feature_addr_gen_Add_16Ux16U_17U_4_0 (
in2,
in1,
out1
); /* architecture "behavioural" */
input [15:0] in2, in1;
output [16:0] out1;
wire [16:0] asc001;
assign asc001 = +(in2) + (in1);
assign out1 = asc001;
endmodule
| 6.663606 |
module st_feature_addr_gen_Add_16Ux16U_17U_4_1 (
in2,
in1,
out1
); /* architecture "behavioural" */
input [15:0] in2, in1;
output [16:0] out1;
wire [16:0] asc001;
assign asc001 = +(in2) + (in1);
assign out1 = asc001;
endmodule
| 6.663606 |
module st_feature_addr_gen_Add_16Ux16U_17U_4_2 (
in2,
in1,
out1
); /* architecture "behavioural" */
input [15:0] in2, in1;
output [16:0] out1;
wire [16:0] asc001;
assign asc001 = +(in2) + (in1);
assign out1 = asc001;
endmodule
| 6.663606 |
module st_feature_addr_gen_Add_16Ux16U_17U_4_3 (
in2,
in1,
out1
); /* architecture "behavioural" */
input [15:0] in2, in1;
output [16:0] out1;
wire [16:0] asc001;
assign asc001 = +(in2) + (in1);
assign out1 = asc001;
endmodule
| 6.663606 |
module st_feature_addr_gen_Add_16Ux16U_17U_4_4 (
in2,
in1,
out1
); /* architecture "behavioural" */
input [15:0] in2, in1;
output [16:0] out1;
wire [16:0] asc001;
assign asc001 = +(in2) + (in1);
assign out1 = asc001;
endmodule
| 6.663606 |
module st_feature_addr_gen_Add_16Ux1U_16U_4 (
in2,
in1,
out1
); /* architecture "behavioural" */
input [15:0] in2;
input in1;
output [15:0] out1;
wire [15:0] asc001;
assign asc001 = +(in2) + (in1);
assign out1 = asc001;
endmodule
| 6.663606 |
module st_feature_addr_gen_Add_16Ux1U_16U_4_0 (
in2,
in1,
out1
); /* architecture "behavioural" */
input [15:0] in2;
input in1;
output [15:0] out1;
wire [15:0] asc001;
assign asc001 = +(in2) + (in1);
assign out1 = asc001;
endmodule
| 6.663606 |
module st_feature_addr_gen_Add_16Ux1U_16U_4_1 (
in2,
in1,
out1
); /* architecture "behavioural" */
input [15:0] in2;
input in1;
output [15:0] out1;
wire [15:0] asc001;
assign asc001 = +(in2) + (in1);
assign out1 = asc001;
endmodule
| 6.663606 |
module st_feature_addr_gen_Add_16Ux1U_16U_4_2 (
in2,
in1,
out1
); /* architecture "behavioural" */
input [15:0] in2;
input in1;
output [15:0] out1;
wire [15:0] asc001;
assign asc001 = +(in2) + (in1);
assign out1 = asc001;
endmodule
| 6.663606 |
module st_feature_addr_gen_Add_16Ux8U_17U_1 (
in2,
in1,
out1
); /* architecture "behavioural" */
input [15:0] in2;
input [7:0] in1;
output [16:0] out1;
wire [16:0] asc001;
assign asc001 = +(in2) + (in1);
assign out1 = asc001;
endmodule
| 6.663606 |
module st_feature_addr_gen_Add_16Ux8U_17U_4 (
in2,
in1,
out1
); /* architecture "behavioural" */
input [15:0] in2;
input [7:0] in1;
output [16:0] out1;
wire [16:0] asc001;
assign asc001 = +(in2) + (in1);
assign out1 = asc001;
endmodule
| 6.663606 |
module st_feature_addr_gen_Add_16Ux8U_17U_4_0 (
in2,
in1,
out1
); /* architecture "behavioural" */
input [15:0] in2;
input [7:0] in1;
output [16:0] out1;
wire [16:0] asc001;
assign asc001 = +(in2) + (in1);
assign out1 = asc001;
endmodule
| 6.663606 |
module st_feature_addr_gen_Add_16Ux8U_17U_4_1 (
in2,
in1,
out1
); /* architecture "behavioural" */
input [15:0] in2;
input [7:0] in1;
output [16:0] out1;
wire [16:0] asc001;
assign asc001 = +(in2) + (in1);
assign out1 = asc001;
endmodule
| 6.663606 |
module st_feature_addr_gen_Add_16Ux8U_17U_4_2 (
in2,
in1,
out1
); /* architecture "behavioural" */
input [15:0] in2;
input [7:0] in1;
output [16:0] out1;
wire [16:0] asc001;
assign asc001 = +(in2) + (in1);
assign out1 = asc001;
endmodule
| 6.663606 |
module st_feature_addr_gen_Add_16Ux8U_17U_4_3 (
in2,
in1,
out1
); /* architecture "behavioural" */
input [15:0] in2;
input [7:0] in1;
output [16:0] out1;
wire [16:0] asc001;
assign asc001 = +(in2) + (in1);
assign out1 = asc001;
endmodule
| 6.663606 |
module st_feature_addr_gen_Add_16Ux8U_17U_4_4 (
in2,
in1,
out1
); /* architecture "behavioural" */
input [15:0] in2;
input [7:0] in1;
output [16:0] out1;
wire [16:0] asc001;
assign asc001 = +(in2) + (in1);
assign out1 = asc001;
endmodule
| 6.663606 |
module st_feature_addr_gen_Add_16Ux9U_16U_1 (
in2,
in1,
out1
); /* architecture "behavioural" */
input [15:0] in2;
input [8:0] in1;
output [15:0] out1;
wire [15:0] asc001;
assign asc001 = +(in2) + (in1);
assign out1 = asc001;
endmodule
| 6.663606 |
module st_feature_addr_gen_Add_16Ux9U_16U_4 (
in2,
in1,
out1
); /* architecture "behavioural" */
input [15:0] in2;
input [8:0] in1;
output [15:0] out1;
wire [15:0] asc001;
assign asc001 = +(in2) + (in1);
assign out1 = asc001;
endmodule
| 6.663606 |
module st_feature_addr_gen_Add_16Ux9U_16U_4_0 (
in2,
in1,
out1
); /* architecture "behavioural" */
input [15:0] in2;
input [8:0] in1;
output [15:0] out1;
wire [15:0] asc001;
assign asc001 = +(in2) + (in1);
assign out1 = asc001;
endmodule
| 6.663606 |
module st_feature_addr_gen_Add_16Ux9U_16U_4_1 (
in2,
in1,
out1
); /* architecture "behavioural" */
input [15:0] in2;
input [8:0] in1;
output [15:0] out1;
wire [15:0] asc001;
assign asc001 = +(in2) + (in1);
assign out1 = asc001;
endmodule
| 6.663606 |
module st_feature_addr_gen_Add_16Ux9U_16U_4_2 (
in2,
in1,
out1
); /* architecture "behavioural" */
input [15:0] in2;
input [8:0] in1;
output [15:0] out1;
wire [15:0] asc001;
assign asc001 = +(in2) + (in1);
assign out1 = asc001;
endmodule
| 6.663606 |
module st_feature_addr_gen_Add_16Ux9U_16U_4_3 (
in2,
in1,
out1
); /* architecture "behavioural" */
input [15:0] in2;
input [8:0] in1;
output [15:0] out1;
wire [15:0] asc001;
assign asc001 = +(in2) + (in1);
assign out1 = asc001;
endmodule
| 6.663606 |
module st_feature_addr_gen_Add_16Ux9U_16U_4_4 (
in2,
in1,
out1
); /* architecture "behavioural" */
input [15:0] in2;
input [8:0] in1;
output [15:0] out1;
wire [15:0] asc001;
assign asc001 = +(in2) + (in1);
assign out1 = asc001;
endmodule
| 6.663606 |
module st_feature_addr_gen_Add_16Ux9U_17U_1 (
in2,
in1,
out1
); /* architecture "behavioural" */
input [15:0] in2;
input [8:0] in1;
output [16:0] out1;
wire [16:0] asc001;
assign asc001 = +(in2) + (in1);
assign out1 = asc001;
endmodule
| 6.663606 |
module st_feature_addr_gen_Add_16Ux9U_17U_4 (
in2,
in1,
out1
); /* architecture "behavioural" */
input [15:0] in2;
input [8:0] in1;
output [16:0] out1;
wire [16:0] asc001;
assign asc001 = +(in2) + (in1);
assign out1 = asc001;
endmodule
| 6.663606 |
module st_feature_addr_gen_Add_16Ux9U_17U_4_0 (
in2,
in1,
out1
); /* architecture "behavioural" */
input [15:0] in2;
input [8:0] in1;
output [16:0] out1;
wire [16:0] asc001;
assign asc001 = +(in2) + (in1);
assign out1 = asc001;
endmodule
| 6.663606 |
module st_feature_addr_gen_Add_16Ux9U_17U_4_1 (
in2,
in1,
out1
); /* architecture "behavioural" */
input [15:0] in2;
input [8:0] in1;
output [16:0] out1;
wire [16:0] asc001;
assign asc001 = +(in2) + (in1);
assign out1 = asc001;
endmodule
| 6.663606 |
module st_feature_addr_gen_Add_16Ux9U_17U_4_2 (
in2,
in1,
out1
); /* architecture "behavioural" */
input [15:0] in2;
input [8:0] in1;
output [16:0] out1;
wire [16:0] asc001;
assign asc001 = +(in2) + (in1);
assign out1 = asc001;
endmodule
| 6.663606 |
module st_feature_addr_gen_Add_16Ux9U_17U_4_3 (
in2,
in1,
out1
); /* architecture "behavioural" */
input [15:0] in2;
input [8:0] in1;
output [16:0] out1;
wire [16:0] asc001;
assign asc001 = +(in2) + (in1);
assign out1 = asc001;
endmodule
| 6.663606 |
module st_feature_addr_gen_Add_16Ux9U_17U_4_4 (
in2,
in1,
out1
); /* architecture "behavioural" */
input [15:0] in2;
input [8:0] in1;
output [16:0] out1;
wire [16:0] asc001;
assign asc001 = +(in2) + (in1);
assign out1 = asc001;
endmodule
| 6.663606 |
module st_feature_addr_gen_Add_32Ux16U_32U_0 (
in2,
in1,
out1
); /* architecture "behavioural" */
input [31:0] in2;
input [15:0] in1;
output [31:0] out1;
wire [31:0] asc001;
assign asc001 = +(in2) + (in1);
assign out1 = asc001;
endmodule
| 6.663606 |
module st_feature_addr_gen_Add_32Ux16U_32U_4 (
in2,
in1,
out1
); /* architecture "behavioural" */
input [31:0] in2;
input [15:0] in1;
output [31:0] out1;
wire [31:0] asc001;
assign asc001 = +(in2) + (in1);
assign out1 = asc001;
endmodule
| 6.663606 |
module st_feature_addr_gen_Add_32Ux16U_32U_4_0 (
in2,
in1,
out1
); /* architecture "behavioural" */
input [31:0] in2;
input [15:0] in1;
output [31:0] out1;
wire [31:0] asc001;
assign asc001 = +(in2) + (in1);
assign out1 = asc001;
endmodule
| 6.663606 |
module st_feature_addr_gen_Add_32Ux32U_32U_0 (
in2,
in1,
out1
); /* architecture "behavioural" */
input [31:0] in2, in1;
output [31:0] out1;
wire [31:0] asc001;
assign asc001 = +(in2) + (in1);
assign out1 = asc001;
endmodule
| 6.663606 |
module st_feature_addr_gen_Add_32Ux32U_32U_4 (
in2,
in1,
out1
); /* architecture "behavioural" */
input [31:0] in2, in1;
output [31:0] out1;
wire [31:0] asc001;
assign asc001 = +(in2) + (in1);
assign out1 = asc001;
endmodule
| 6.663606 |
module st_feature_addr_gen_Add_32Ux32U_32U_4_0 (
in2,
in1,
out1
); /* architecture "behavioural" */
input [31:0] in2, in1;
output [31:0] out1;
wire [31:0] asc001;
assign asc001 = +(in2) + (in1);
assign out1 = asc001;
endmodule
| 6.663606 |
module st_feature_addr_gen_Add_32Ux32U_32U_4_1 (
in2,
in1,
out1
); /* architecture "behavioural" */
input [31:0] in2, in1;
output [31:0] out1;
wire [31:0] asc001;
assign asc001 = +(in2) + (in1);
assign out1 = asc001;
endmodule
| 6.663606 |
module st_feature_addr_gen_Add_8Ux1U_9U_1 (
in2,
in1,
out1
); /* architecture "behavioural" */
input [7:0] in2;
input in1;
output [8:0] out1;
wire [8:0] asc001;
assign asc001 = +(in2) + (in1);
assign out1 = asc001;
endmodule
| 6.663606 |
module st_feature_addr_gen_Add_8Ux1U_9U_4 (
in2,
in1,
out1
); /* architecture "behavioural" */
input [7:0] in2;
input in1;
output [8:0] out1;
wire [8:0] asc001;
assign asc001 = +(in2) + (in1);
assign out1 = asc001;
endmodule
| 6.663606 |
module st_feature_addr_gen_Add_8Ux1U_9U_4_0 (
in2,
in1,
out1
); /* architecture "behavioural" */
input [7:0] in2;
input in1;
output [8:0] out1;
wire [8:0] asc001;
assign asc001 = +(in2) + (in1);
assign out1 = asc001;
endmodule
| 6.663606 |
module st_feature_addr_gen_Add_8Ux1U_9U_4_1 (
in2,
in1,
out1
); /* architecture "behavioural" */
input [7:0] in2;
input in1;
output [8:0] out1;
wire [8:0] asc001;
assign asc001 = +(in2) + (in1);
assign out1 = asc001;
endmodule
| 6.663606 |
module st_feature_addr_gen_Add_8Ux1U_9U_4_2 (
in2,
in1,
out1
); /* architecture "behavioural" */
input [7:0] in2;
input in1;
output [8:0] out1;
wire [8:0] asc001;
assign asc001 = +(in2) + (in1);
assign out1 = asc001;
endmodule
| 6.663606 |
module st_feature_addr_gen_Add_8Ux1U_9U_4_3 (
in2,
in1,
out1
); /* architecture "behavioural" */
input [7:0] in2;
input in1;
output [8:0] out1;
wire [8:0] asc001;
assign asc001 = +(in2) + (in1);
assign out1 = asc001;
endmodule
| 6.663606 |
module st_feature_addr_gen_Add_8Ux1U_9U_4_4 (
in2,
in1,
out1
); /* architecture "behavioural" */
input [7:0] in2;
input in1;
output [8:0] out1;
wire [8:0] asc001;
assign asc001 = +(in2) + (in1);
assign out1 = asc001;
endmodule
| 6.663606 |
module st_feature_addr_gen_AndReduction_2S_1U_4 (
in1,
out1
); /* architecture "behavioural" */
input [1:0] in1;
output out1;
wire asc001;
assign asc001 = (&in1);
assign out1 = asc001;
endmodule
| 6.663606 |
module st_feature_addr_gen_AndReduction_2S_1U_4_0 (
in1,
out1
); /* architecture "behavioural" */
input [1:0] in1;
output out1;
wire asc001;
assign asc001 = (&in1);
assign out1 = asc001;
endmodule
| 6.663606 |
module st_feature_addr_gen_AndReduction_2S_1U_4_1 (
in1,
out1
); /* architecture "behavioural" */
input [1:0] in1;
output out1;
wire asc001;
assign asc001 = (&in1);
assign out1 = asc001;
endmodule
| 6.663606 |
module st_feature_addr_gen_AndReduction_2S_1U_4_2 (
in1,
out1
); /* architecture "behavioural" */
input [1:0] in1;
output out1;
wire asc001;
assign asc001 = (&in1);
assign out1 = asc001;
endmodule
| 6.663606 |
module st_feature_addr_gen_AndReduction_4S_1U_4 (
in1,
out1
); /* architecture "behavioural" */
input [3:0] in1;
output out1;
wire asc001;
assign asc001 = (&in1);
assign out1 = asc001;
endmodule
| 6.663606 |
module st_feature_addr_gen_AndReduction_4S_1U_4_0 (
in1,
out1
); /* architecture "behavioural" */
input [3:0] in1;
output out1;
wire asc001;
assign asc001 = (&in1);
assign out1 = asc001;
endmodule
| 6.663606 |
module st_feature_addr_gen_AndReduction_4S_1U_4_1 (
in1,
out1
); /* architecture "behavioural" */
input [3:0] in1;
output out1;
wire asc001;
assign asc001 = (&in1);
assign out1 = asc001;
endmodule
| 6.663606 |
module st_feature_addr_gen_AndReduction_4S_1U_4_2 (
in1,
out1
); /* architecture "behavioural" */
input [3:0] in1;
output out1;
wire asc001;
assign asc001 = (&in1);
assign out1 = asc001;
endmodule
| 6.663606 |
module st_feature_addr_gen_And_1Ux1U_1U_4 (
in2,
in1,
out1
); /* architecture "behavioural" */
input in2, in1;
output out1;
wire asc001;
assign asc001 = (in2) & (in1);
assign out1 = asc001;
endmodule
| 6.663606 |
module st_feature_addr_gen_And_1Ux1U_1U_4_0 (
in2,
in1,
out1
); /* architecture "behavioural" */
input in2, in1;
output out1;
wire asc001;
assign asc001 = (in2) & (in1);
assign out1 = asc001;
endmodule
| 6.663606 |
module st_feature_addr_gen_And_1Ux1U_1U_4_1 (
in2,
in1,
out1
); /* architecture "behavioural" */
input in2, in1;
output out1;
wire asc001;
assign asc001 = (in2) & (in1);
assign out1 = asc001;
endmodule
| 6.663606 |
module st_feature_addr_gen_EqSubi1u11u16_1 (
in2,
in1,
out1
); /* architecture "behavioural" */
input [15:0] in2;
input [10:0] in1;
output out1;
wire asc001;
wire [11:0] asc003;
assign asc003 = +(in1) - (12'B000000000001);
assign asc001 = ({{9{asc003[11]}}, asc003} == in2);
assign out1 = asc001;
endmodule
| 6.663606 |
module st_feature_addr_gen_EqSubi1u11u16_4 (
in2,
in1,
out1
); /* architecture "behavioural" */
input [15:0] in2;
input [10:0] in1;
output out1;
wire asc001;
wire [11:0] asc003;
assign asc003 = +(in1) - (12'B000000000001);
assign asc001 = ({{9{asc003[11]}}, asc003} == in2);
assign out1 = asc001;
endmodule
| 6.663606 |
module st_feature_addr_gen_EqSubi1u11u16_4_0 (
in2,
in1,
out1
); /* architecture "behavioural" */
input [15:0] in2;
input [10:0] in1;
output out1;
wire asc001;
wire [11:0] asc003;
assign asc003 = +(in1) - (12'B000000000001);
assign asc001 = ({{9{asc003[11]}}, asc003} == in2);
assign out1 = asc001;
endmodule
| 6.663606 |
module st_feature_addr_gen_EqSubi1u11u16_4_1 (
in2,
in1,
out1
); /* architecture "behavioural" */
input [15:0] in2;
input [10:0] in1;
output out1;
wire asc001;
wire [11:0] asc003;
assign asc003 = +(in1) - (12'B000000000001);
assign asc001 = ({{9{asc003[11]}}, asc003} == in2);
assign out1 = asc001;
endmodule
| 6.663606 |
module st_feature_addr_gen_EqSubi1u11u16_4_2 (
in2,
in1,
out1
); /* architecture "behavioural" */
input [15:0] in2;
input [10:0] in1;
output out1;
wire asc001;
wire [11:0] asc003;
assign asc003 = +(in1) - (12'B000000000001);
assign asc001 = ({{9{asc003[11]}}, asc003} == in2);
assign out1 = asc001;
endmodule
| 6.663606 |
module st_feature_addr_gen_EqSubi1u11u16_4_3 (
in2,
in1,
out1
); /* architecture "behavioural" */
input [15:0] in2;
input [10:0] in1;
output out1;
wire asc001;
wire [11:0] asc003;
assign asc003 = +(in1) - (12'B000000000001);
assign asc001 = ({{9{asc003[11]}}, asc003} == in2);
assign out1 = asc001;
endmodule
| 6.663606 |
module st_feature_addr_gen_EqSubi1u11u16_4_4 (
in2,
in1,
out1
); /* architecture "behavioural" */
input [15:0] in2;
input [10:0] in1;
output out1;
wire asc001;
wire [11:0] asc003;
assign asc003 = +(in1) - (12'B000000000001);
assign asc001 = ({{9{asc003[11]}}, asc003} == in2);
assign out1 = asc001;
endmodule
| 6.663606 |
module st_feature_addr_gen_EqSubi1u16u16_4 (
in2,
in1,
out1
); /* architecture "behavioural" */
input [15:0] in2, in1;
output out1;
wire asc001;
wire [16:0] asc003;
assign asc003 = +(in1) - (17'B00000000000000001);
assign asc001 = ({{5{asc003[16]}}, asc003} == in2);
assign out1 = asc001;
endmodule
| 6.663606 |
module st_feature_addr_gen_EqSubi1u16u16_4_0 (
in2,
in1,
out1
); /* architecture "behavioural" */
input [15:0] in2, in1;
output out1;
wire asc001;
wire [16:0] asc003;
assign asc003 = +(in1) - (17'B00000000000000001);
assign asc001 = ({{5{asc003[16]}}, asc003} == in2);
assign out1 = asc001;
endmodule
| 6.663606 |
module st_feature_addr_gen_EqSubi1u16u16_4_1 (
in2,
in1,
out1
); /* architecture "behavioural" */
input [15:0] in2, in1;
output out1;
wire asc001;
wire [16:0] asc003;
assign asc003 = +(in1) - (17'B00000000000000001);
assign asc001 = ({{5{asc003[16]}}, asc003} == in2);
assign out1 = asc001;
endmodule
| 6.663606 |
module st_feature_addr_gen_EqSubi1u16u16_4_2 (
in2,
in1,
out1
); /* architecture "behavioural" */
input [15:0] in2, in1;
output out1;
wire asc001;
wire [16:0] asc003;
assign asc003 = +(in1) - (17'B00000000000000001);
assign asc001 = ({{5{asc003[16]}}, asc003} == in2);
assign out1 = asc001;
endmodule
| 6.663606 |
module st_feature_addr_gen_Equal_16Ux12S_1U_1 (
in2,
in1,
out1
); /* architecture "behavioural" */
input [15:0] in2;
input [11:0] in1;
output out1;
wire asc001;
assign asc001 = ({{9{in1[11]}}, in1} == in2);
assign out1 = asc001;
endmodule
| 6.663606 |
module st_feature_addr_gen_Equal_16Ux12S_1U_4 (
in2,
in1,
out1
); /* architecture "behavioural" */
input [15:0] in2;
input [11:0] in1;
output out1;
wire asc001;
assign asc001 = ({{9{in1[11]}}, in1} == in2);
assign out1 = asc001;
endmodule
| 6.663606 |
module st_feature_addr_gen_Equal_16Ux12S_1U_4_0 (
in2,
in1,
out1
); /* architecture "behavioural" */
input [15:0] in2;
input [11:0] in1;
output out1;
wire asc001;
assign asc001 = ({{9{in1[11]}}, in1} == in2);
assign out1 = asc001;
endmodule
| 6.663606 |
module st_feature_addr_gen_Equal_16Ux12S_1U_4_1 (
in2,
in1,
out1
); /* architecture "behavioural" */
input [15:0] in2;
input [11:0] in1;
output out1;
wire asc001;
assign asc001 = ({{9{in1[11]}}, in1} == in2);
assign out1 = asc001;
endmodule
| 6.663606 |
module st_feature_addr_gen_Equal_16Ux12S_1U_4_2 (
in2,
in1,
out1
); /* architecture "behavioural" */
input [15:0] in2;
input [11:0] in1;
output out1;
wire asc001;
assign asc001 = ({{9{in1[11]}}, in1} == in2);
assign out1 = asc001;
endmodule
| 6.663606 |
module st_feature_addr_gen_Equal_16Ux12S_1U_4_3 (
in2,
in1,
out1
); /* architecture "behavioural" */
input [15:0] in2;
input [11:0] in1;
output out1;
wire asc001;
assign asc001 = ({{9{in1[11]}}, in1} == in2);
assign out1 = asc001;
endmodule
| 6.663606 |
module st_feature_addr_gen_Equal_16Ux12S_1U_4_4 (
in2,
in1,
out1
); /* architecture "behavioural" */
input [15:0] in2;
input [11:0] in1;
output out1;
wire asc001;
assign asc001 = ({{9{in1[11]}}, in1} == in2);
assign out1 = asc001;
endmodule
| 6.663606 |
module st_feature_addr_gen_Equal_17Sx16U_1U_4 (
in2,
in1,
out1
); /* architecture "behavioural" */
input [16:0] in2;
input [15:0] in1;
output out1;
wire asc001;
assign asc001 = (in1 == {{5{in2[16]}}, in2});
assign out1 = asc001;
endmodule
| 6.663606 |
module st_feature_addr_gen_Equal_17Sx16U_1U_4_0 (
in2,
in1,
out1
); /* architecture "behavioural" */
input [16:0] in2;
input [15:0] in1;
output out1;
wire asc001;
assign asc001 = (in1 == {{5{in2[16]}}, in2});
assign out1 = asc001;
endmodule
| 6.663606 |
module st_feature_addr_gen_Equal_17Sx16U_1U_4_1 (
in2,
in1,
out1
); /* architecture "behavioural" */
input [16:0] in2;
input [15:0] in1;
output out1;
wire asc001;
assign asc001 = (in1 == {{5{in2[16]}}, in2});
assign out1 = asc001;
endmodule
| 6.663606 |
module st_feature_addr_gen_Equal_17Sx16U_1U_4_2 (
in2,
in1,
out1
); /* architecture "behavioural" */
input [16:0] in2;
input [15:0] in1;
output out1;
wire asc001;
assign asc001 = (in1 == {{5{in2[16]}}, in2});
assign out1 = asc001;
endmodule
| 6.663606 |
module st_feature_addr_gen_Equal_17Sx17S_1U_1 (
in2,
in1,
out1
); /* architecture "behavioural" */
input [16:0] in2, in1;
output out1;
wire asc001;
assign asc001 = ({{5{in1[16]}}, in1} == {{5{in2[16]}}, in2});
assign out1 = asc001;
endmodule
| 6.663606 |
module st_feature_addr_gen_Equal_17Sx17S_1U_4 (
in2,
in1,
out1
); /* architecture "behavioural" */
input [16:0] in2, in1;
output out1;
wire asc001;
assign asc001 = ({{5{in1[16]}}, in1} == {{5{in2[16]}}, in2});
assign out1 = asc001;
endmodule
| 6.663606 |
module st_feature_addr_gen_Equal_17Sx17S_1U_4_0 (
in2,
in1,
out1
); /* architecture "behavioural" */
input [16:0] in2, in1;
output out1;
wire asc001;
assign asc001 = ({{5{in1[16]}}, in1} == {{5{in2[16]}}, in2});
assign out1 = asc001;
endmodule
| 6.663606 |
module st_feature_addr_gen_Equal_17Sx17S_1U_4_1 (
in2,
in1,
out1
); /* architecture "behavioural" */
input [16:0] in2, in1;
output out1;
wire asc001;
assign asc001 = ({{5{in1[16]}}, in1} == {{5{in2[16]}}, in2});
assign out1 = asc001;
endmodule
| 6.663606 |
module st_feature_addr_gen_Equal_17Sx17S_1U_4_2 (
in2,
in1,
out1
); /* architecture "behavioural" */
input [16:0] in2, in1;
output out1;
wire asc001;
assign asc001 = ({{5{in1[16]}}, in1} == {{5{in2[16]}}, in2});
assign out1 = asc001;
endmodule
| 6.663606 |
module st_feature_addr_gen_Equal_17Sx17S_1U_4_3 (
in2,
in1,
out1
); /* architecture "behavioural" */
input [16:0] in2, in1;
output out1;
wire asc001;
assign asc001 = ({{5{in1[16]}}, in1} == {{5{in2[16]}}, in2});
assign out1 = asc001;
endmodule
| 6.663606 |
module st_feature_addr_gen_Equal_17Sx17S_1U_4_4 (
in2,
in1,
out1
); /* architecture "behavioural" */
input [16:0] in2, in1;
output out1;
wire asc001;
assign asc001 = ({{5{in1[16]}}, in1} == {{5{in2[16]}}, in2});
assign out1 = asc001;
endmodule
| 6.663606 |
module st_feature_addr_gen_GreaterThan_16Ux19U_1U_1 (
in2,
in1,
out1
); /* architecture "behavioural" */
input [15:0] in2;
input [18:0] in1;
output out1;
wire asc001;
assign asc001 = (in2 > in1);
assign out1 = asc001;
endmodule
| 6.663606 |
module st_feature_addr_gen_GreaterThan_16Ux19U_1U_4 (
in2,
in1,
out1
); /* architecture "behavioural" */
input [15:0] in2;
input [18:0] in1;
output out1;
wire asc001;
assign asc001 = (in2 > in1);
assign out1 = asc001;
endmodule
| 6.663606 |
module st_feature_addr_gen_GreaterThan_16Ux19U_1U_4_0 (
in2,
in1,
out1
); /* architecture "behavioural" */
input [15:0] in2;
input [18:0] in1;
output out1;
wire asc001;
assign asc001 = (in2 > in1);
assign out1 = asc001;
endmodule
| 6.663606 |
module st_feature_addr_gen_GreaterThan_16Ux19U_1U_4_1 (
in2,
in1,
out1
); /* architecture "behavioural" */
input [15:0] in2;
input [18:0] in1;
output out1;
wire asc001;
assign asc001 = (in2 > in1);
assign out1 = asc001;
endmodule
| 6.663606 |
module st_feature_addr_gen_GreaterThan_16Ux19U_1U_4_2 (
in2,
in1,
out1
); /* architecture "behavioural" */
input [15:0] in2;
input [18:0] in1;
output out1;
wire asc001;
assign asc001 = (in2 > in1);
assign out1 = asc001;
endmodule
| 6.663606 |
module st_feature_addr_gen_GreaterThan_16Ux19U_1U_4_3 (
in2,
in1,
out1
); /* architecture "behavioural" */
input [15:0] in2;
input [18:0] in1;
output out1;
wire asc001;
assign asc001 = (in2 > in1);
assign out1 = asc001;
endmodule
| 6.663606 |
module st_feature_addr_gen_GreaterThan_16Ux19U_1U_4_4 (
in2,
in1,
out1
); /* architecture "behavioural" */
input [15:0] in2;
input [18:0] in1;
output out1;
wire asc001;
assign asc001 = (in2 > in1);
assign out1 = asc001;
endmodule
| 6.663606 |
module st_feature_addr_gen_GtSubi1Add2u8u16u16_1 (
in3,
in2,
in1,
out1
); /* architecture "behavioural" */
input [15:0] in3, in2;
input [7:0] in1;
output out1;
wire asc001;
wire [18:0] asc002;
wire [17:0] asc003;
wire [17:0] asc003_tmp_0;
assign asc003_tmp_0 = +(in2) + (in1);
assign asc003 = asc003_tmp_0 - (18'B000000000000000001);
assign asc002 = {asc003[17], asc003};
assign asc001 = (in3 > asc002);
assign out1 = asc001;
endmodule
| 6.663606 |
module st_feature_addr_gen_GtSubi1Add2u8u16u16_4 (
in3,
in2,
in1,
out1
); /* architecture "behavioural" */
input [15:0] in3, in2;
input [7:0] in1;
output out1;
wire asc001;
wire [18:0] asc002;
wire [17:0] asc003;
wire [17:0] asc003_tmp_0;
assign asc003_tmp_0 = +(in2) + (in1);
assign asc003 = asc003_tmp_0 - (18'B000000000000000001);
assign asc002 = {asc003[17], asc003};
assign asc001 = (in3 > asc002);
assign out1 = asc001;
endmodule
| 6.663606 |
module st_feature_addr_gen_GtSubi1Add2u8u16u16_4_0 (
in3,
in2,
in1,
out1
); /* architecture "behavioural" */
input [15:0] in3, in2;
input [7:0] in1;
output out1;
wire asc001;
wire [18:0] asc002;
wire [17:0] asc003;
wire [17:0] asc003_tmp_0;
assign asc003_tmp_0 = +(in2) + (in1);
assign asc003 = asc003_tmp_0 - (18'B000000000000000001);
assign asc002 = {asc003[17], asc003};
assign asc001 = (in3 > asc002);
assign out1 = asc001;
endmodule
| 6.663606 |
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