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lkml_critique | linux-pci | From: Manivannan Sadhasivam <manivannan.sadhasivam@oss.qualcomm.com>
Since the PCI subsystem has started enabling all ASPM states for all
devicetree based platforms, the ASPM enablement code from this driver can
now be dropped.
Signed-off-by: Manivannan Sadhasivam <manivannan.sadhasivam@oss.qualcomm.com>
Link: https:... | null | null | null | [PATCH v2 2/2] PCI: qcom: Remove the custom ASPM enablement code | On Mon, Sep 22, 2025 at 09:46:43PM +0530, Manivannan Sadhasivam via B4 Relay wrote:
I tentatively put this on pci/aspm and included it in pci/next.
I think it's too late in the cycle to include this for v6.18, so I'll
probably defer it until v6.19, but maybe we can start getting a little
more testing. | {
"author": "Bjorn Helgaas <helgaas@kernel.org>",
"date": "Tue, 23 Sep 2025 18:14:40 -0500",
"is_openbsd": false,
"thread_id": "26ad62ff-4972-4b29-8f9e-1868cd20ee00@nvidia.com.mbox.gz"
} |
lkml_critique | linux-pci | From: Manivannan Sadhasivam <manivannan.sadhasivam@oss.qualcomm.com>
Since the PCI subsystem has started enabling all ASPM states for all
devicetree based platforms, the ASPM enablement code from this driver can
now be dropped.
Signed-off-by: Manivannan Sadhasivam <manivannan.sadhasivam@oss.qualcomm.com>
Link: https:... | null | null | null | [PATCH v2 2/2] PCI: qcom: Remove the custom ASPM enablement code | Hi Manivannan Sadhasivam,
I've noticed an issue on Radxa ROCK 5A/5B boards, which are based on the
Rockchip RK3588(S) SoC.
When running Linux v6.18-rc1 or linux-next since 20250924, the kernel
either freezes or fails to probe M.2 Wi-Fi modules. This happens with
several different modules I've tested, including the... | {
"author": "FUKAUMI Naoki <naoki@radxa.com>",
"date": "Wed, 15 Oct 2025 01:30:16 +0900",
"is_openbsd": false,
"thread_id": "26ad62ff-4972-4b29-8f9e-1868cd20ee00@nvidia.com.mbox.gz"
} |
lkml_critique | linux-pci | From: Manivannan Sadhasivam <manivannan.sadhasivam@oss.qualcomm.com>
Since the PCI subsystem has started enabling all ASPM states for all
devicetree based platforms, the ASPM enablement code from this driver can
now be dropped.
Signed-off-by: Manivannan Sadhasivam <manivannan.sadhasivam@oss.qualcomm.com>
Link: https:... | null | null | null | [PATCH v2 2/2] PCI: qcom: Remove the custom ASPM enablement code | [+cc regressions]
On Wed, Oct 15, 2025 at 01:30:16AM +0900, FUKAUMI Naoki wrote:
Thanks for the report, and sorry for the regression.
Since this affects several devices from different manufacturers and (I
assume) different drivers, it seems likely that there's some issue
with the Rockchip end, since ASPM probably wo... | {
"author": "Bjorn Helgaas <helgaas@kernel.org>",
"date": "Tue, 14 Oct 2025 13:49:05 -0500",
"is_openbsd": false,
"thread_id": "26ad62ff-4972-4b29-8f9e-1868cd20ee00@nvidia.com.mbox.gz"
} |
lkml_critique | linux-pci | From: Manivannan Sadhasivam <manivannan.sadhasivam@oss.qualcomm.com>
Since the PCI subsystem has started enabling all ASPM states for all
devicetree based platforms, the ASPM enablement code from this driver can
now be dropped.
Signed-off-by: Manivannan Sadhasivam <manivannan.sadhasivam@oss.qualcomm.com>
Link: https:... | null | null | null | [PATCH v2 2/2] PCI: qcom: Remove the custom ASPM enablement code | Hello all,
On Tuesday, October 14, 2025 20:49 CEST, Bjorn Helgaas <helgaas@kernel.org> wrote:
After thinking quite a bit about it, I think we should revert this
patch and replace it with another patch that allows per-SoC, or
maybe even per-board, opting into the forced enablement of PCIe
ASPM. Let me explain, please... | {
"author": "\"Dragan Simic\" <dsimic@manjaro.org>",
"date": "Wed, 15 Oct 2025 01:33:35 +0200",
"is_openbsd": false,
"thread_id": "26ad62ff-4972-4b29-8f9e-1868cd20ee00@nvidia.com.mbox.gz"
} |
lkml_critique | linux-pci | From: Manivannan Sadhasivam <manivannan.sadhasivam@oss.qualcomm.com>
Since the PCI subsystem has started enabling all ASPM states for all
devicetree based platforms, the ASPM enablement code from this driver can
now be dropped.
Signed-off-by: Manivannan Sadhasivam <manivannan.sadhasivam@oss.qualcomm.com>
Link: https:... | null | null | null | [PATCH v2 2/2] PCI: qcom: Remove the custom ASPM enablement code | On Wed, Oct 15, 2025 at 01:33:35AM +0200, Dragan Simic wrote:
ASPM is a PCIe device specific feature, nothing related to SoC/board. Even if
you limit it to certain platforms, there is no guarantee that it will be safe as
the users can connect a buggy device to the slot and it could lead to the same
issue.
ASPM is no... | {
"author": "Manivannan Sadhasivam <mani@kernel.org>",
"date": "Wed, 15 Oct 2025 11:52:25 +0530",
"is_openbsd": false,
"thread_id": "26ad62ff-4972-4b29-8f9e-1868cd20ee00@nvidia.com.mbox.gz"
} |
lkml_critique | linux-pci | From: Manivannan Sadhasivam <manivannan.sadhasivam@oss.qualcomm.com>
Since the PCI subsystem has started enabling all ASPM states for all
devicetree based platforms, the ASPM enablement code from this driver can
now be dropped.
Signed-off-by: Manivannan Sadhasivam <manivannan.sadhasivam@oss.qualcomm.com>
Link: https:... | null | null | null | [PATCH v2 2/2] PCI: qcom: Remove the custom ASPM enablement code | On Tue, Oct 14, 2025 at 01:49:05PM -0500, Bjorn Helgaas wrote:
I believe it is the latter. The Root Port is having trouble with ASPM.
FUKAUMI Naoki, could you please share the 'sudo lspci -vv' output so that we
know what kind of Root Port we are dealing with? You can revert the offending
patch and share the output.
... | {
"author": "Manivannan Sadhasivam <mani@kernel.org>",
"date": "Wed, 15 Oct 2025 11:56:39 +0530",
"is_openbsd": false,
"thread_id": "26ad62ff-4972-4b29-8f9e-1868cd20ee00@nvidia.com.mbox.gz"
} |
lkml_critique | linux-pci | From: Manivannan Sadhasivam <manivannan.sadhasivam@oss.qualcomm.com>
Since the PCI subsystem has started enabling all ASPM states for all
devicetree based platforms, the ASPM enablement code from this driver can
now be dropped.
Signed-off-by: Manivannan Sadhasivam <manivannan.sadhasivam@oss.qualcomm.com>
Link: https:... | null | null | null | [PATCH v2 2/2] PCI: qcom: Remove the custom ASPM enablement code | Hi,
On 10/15/25 15:26, Manivannan Sadhasivam wrote:
Here is dmesg/lspci output on ROCK 5A(RK3588S):
https://gist.github.com/RadxaNaoki/1355a0b4278b6e51a61d89df7a535a5d
----
I've (likely) noticed another PCIe issue on the ROCK 5B (RK3588).
Reverting commit f3ac2ff14834a0aa056ee3ae0e4b8c641c579961 on top of
commi... | {
"author": "FUKAUMI Naoki <naoki@radxa.com>",
"date": "Wed, 15 Oct 2025 16:13:41 +0900",
"is_openbsd": false,
"thread_id": "26ad62ff-4972-4b29-8f9e-1868cd20ee00@nvidia.com.mbox.gz"
} |
lkml_critique | linux-pci | From: Manivannan Sadhasivam <manivannan.sadhasivam@oss.qualcomm.com>
Since the PCI subsystem has started enabling all ASPM states for all
devicetree based platforms, the ASPM enablement code from this driver can
now be dropped.
Signed-off-by: Manivannan Sadhasivam <manivannan.sadhasivam@oss.qualcomm.com>
Link: https:... | null | null | null | [PATCH v2 2/2] PCI: qcom: Remove the custom ASPM enablement code | On Wed, Oct 15, 2025 at 04:13:41PM +0900, FUKAUMI Naoki wrote:
Thanks! Could you please try the below diff with f3ac2ff14834 applied?
diff --git a/drivers/pci/quirks.c b/drivers/pci/quirks.c
index 214ed060ca1b..0069d06c282d 100644
--- a/drivers/pci/quirks.c
+++ b/drivers/pci/quirks.c
@@ -2525,6 +2525,15 @@ static voi... | {
"author": "Manivannan Sadhasivam <mani@kernel.org>",
"date": "Wed, 15 Oct 2025 13:20:17 +0530",
"is_openbsd": false,
"thread_id": "26ad62ff-4972-4b29-8f9e-1868cd20ee00@nvidia.com.mbox.gz"
} |
lkml_critique | linux-pci | From: Manivannan Sadhasivam <manivannan.sadhasivam@oss.qualcomm.com>
Since the PCI subsystem has started enabling all ASPM states for all
devicetree based platforms, the ASPM enablement code from this driver can
now be dropped.
Signed-off-by: Manivannan Sadhasivam <manivannan.sadhasivam@oss.qualcomm.com>
Link: https:... | null | null | null | [PATCH v2 2/2] PCI: qcom: Remove the custom ASPM enablement code | Hi Mani
在 2025/10/15 星期三 15:50, Manivannan Sadhasivam 写道:
That's not true from my POV. Rockchip platform supports all ASPM policy
after mass production verification. I also verified current upstream
code this morning with RK3588-EVB and can check L0s/L1/L1ss work fine.
The log and lspci output could be found here:
h... | {
"author": "Shawn Lin <shawn.lin@rock-chips.com>",
"date": "Wed, 15 Oct 2025 17:11:39 +0800",
"is_openbsd": false,
"thread_id": "26ad62ff-4972-4b29-8f9e-1868cd20ee00@nvidia.com.mbox.gz"
} |
lkml_critique | linux-pci | From: Manivannan Sadhasivam <manivannan.sadhasivam@oss.qualcomm.com>
Since the PCI subsystem has started enabling all ASPM states for all
devicetree based platforms, the ASPM enablement code from this driver can
now be dropped.
Signed-off-by: Manivannan Sadhasivam <manivannan.sadhasivam@oss.qualcomm.com>
Link: https:... | null | null | null | [PATCH v2 2/2] PCI: qcom: Remove the custom ASPM enablement code | On Wed, Oct 15, 2025 at 05:11:39PM +0800, Shawn Lin wrote:
Thanks a lot for debugging the issue. Now it is clear that the board routing is
on play and ASPM works fine on Rockchip Root Ports.
Below should work:
diff --git a/drivers/pci/quirks.c b/drivers/pci/quirks.c
index 214ed060ca1b..9864b2c91399 100644
--- a/dri... | {
"author": "Manivannan Sadhasivam <mani@kernel.org>",
"date": "Wed, 15 Oct 2025 15:13:06 +0530",
"is_openbsd": false,
"thread_id": "26ad62ff-4972-4b29-8f9e-1868cd20ee00@nvidia.com.mbox.gz"
} |
lkml_critique | linux-pci | From: Manivannan Sadhasivam <manivannan.sadhasivam@oss.qualcomm.com>
Since the PCI subsystem has started enabling all ASPM states for all
devicetree based platforms, the ASPM enablement code from this driver can
now be dropped.
Signed-off-by: Manivannan Sadhasivam <manivannan.sadhasivam@oss.qualcomm.com>
Link: https:... | null | null | null | [PATCH v2 2/2] PCI: qcom: Remove the custom ASPM enablement code | Hello Shawn,
On Wed, Oct 15, 2025 at 05:11:39PM +0800, Shawn Lin wrote:
This fix seems do the trick, without needing to patch common code (aspm.c):
diff --git a/drivers/pci/controller/dwc/pcie-dw-rockchip.c b/drivers/pci/controller/dwc/pcie-dw-rockchip.c
index 3e2752c7dd09..f5e1aaa97719 100644
--- a/drivers/pci/cont... | {
"author": "Niklas Cassel <cassel@kernel.org>",
"date": "Wed, 15 Oct 2025 11:46:02 +0200",
"is_openbsd": false,
"thread_id": "26ad62ff-4972-4b29-8f9e-1868cd20ee00@nvidia.com.mbox.gz"
} |
lkml_critique | linux-pci | From: Manivannan Sadhasivam <manivannan.sadhasivam@oss.qualcomm.com>
Since the PCI subsystem has started enabling all ASPM states for all
devicetree based platforms, the ASPM enablement code from this driver can
now be dropped.
Signed-off-by: Manivannan Sadhasivam <manivannan.sadhasivam@oss.qualcomm.com>
Link: https:... | null | null | null | [PATCH v2 2/2] PCI: qcom: Remove the custom ASPM enablement code | On Wed, Oct 15, 2025 at 11:46:02AM +0200, Niklas Cassel wrote:
But this patch removes the L1SS CAP for all boards, isn't it?
Unfortunately, not all DTs define this property even though the platforms
support CLKREQ#. Right now, only Nvidia defines this property in the binding,
but not in upstream DTS. But I would exp... | {
"author": "Manivannan Sadhasivam <mani@kernel.org>",
"date": "Wed, 15 Oct 2025 16:03:53 +0530",
"is_openbsd": false,
"thread_id": "26ad62ff-4972-4b29-8f9e-1868cd20ee00@nvidia.com.mbox.gz"
} |
lkml_critique | linux-pci | From: Manivannan Sadhasivam <manivannan.sadhasivam@oss.qualcomm.com>
Since the PCI subsystem has started enabling all ASPM states for all
devicetree based platforms, the ASPM enablement code from this driver can
now be dropped.
Signed-off-by: Manivannan Sadhasivam <manivannan.sadhasivam@oss.qualcomm.com>
Link: https:... | null | null | null | [PATCH v2 2/2] PCI: qcom: Remove the custom ASPM enablement code | On Wed Oct 15, 2025 at 8:22 AM CEST, Manivannan Sadhasivam wrote:
Do you mean literally *now* or more like "we need to do it sometime"?
I understand this logic. And I'm very much in favor of changes that
reduce power usage.
I suspect that 6.18 will become a LTS kernel, so introducing a change
which may break many de... | {
"author": "\"Diederik de Haas\" <diederik@cknow-tech.com>",
"date": "Wed, 15 Oct 2025 13:23:10 +0200",
"is_openbsd": false,
"thread_id": "26ad62ff-4972-4b29-8f9e-1868cd20ee00@nvidia.com.mbox.gz"
} |
lkml_critique | linux-pci | From: Manivannan Sadhasivam <manivannan.sadhasivam@oss.qualcomm.com>
Since the PCI subsystem has started enabling all ASPM states for all
devicetree based platforms, the ASPM enablement code from this driver can
now be dropped.
Signed-off-by: Manivannan Sadhasivam <manivannan.sadhasivam@oss.qualcomm.com>
Link: https:... | null | null | null | [PATCH v2 2/2] PCI: qcom: Remove the custom ASPM enablement code | On Wed, Oct 15, 2025 at 04:03:53PM +0530, Manivannan Sadhasivam wrote:
Yes, all boards supported by pcie-dw-rockchip.c, which matches what their
downstream driver does.
(Their downstream driver disables L1 substates for all boards that have
not defined 'supports-clkreq', and a grep through their downstream tree,
for ... | {
"author": "Niklas Cassel <cassel@kernel.org>",
"date": "Wed, 15 Oct 2025 14:17:33 +0200",
"is_openbsd": false,
"thread_id": "26ad62ff-4972-4b29-8f9e-1868cd20ee00@nvidia.com.mbox.gz"
} |
lkml_critique | linux-pci | From: Manivannan Sadhasivam <manivannan.sadhasivam@oss.qualcomm.com>
Since the PCI subsystem has started enabling all ASPM states for all
devicetree based platforms, the ASPM enablement code from this driver can
now be dropped.
Signed-off-by: Manivannan Sadhasivam <manivannan.sadhasivam@oss.qualcomm.com>
Link: https:... | null | null | null | [PATCH v2 2/2] PCI: qcom: Remove the custom ASPM enablement code | On Tue Oct 14, 2025 at 8:49 PM CEST, Bjorn Helgaas wrote:
I have a Rock 5B as well, but I don't have a Wi-Fi module, but I do have
a NVMe drive connected. That boots fine with 6.17, but I end up in a
rescue shell with 6.18-rc1. I haven't verified that it's caused by the
same commit, but it does sound plausible.
On th... | {
"author": "\"Diederik de Haas\" <diederik@cknow-tech.com>",
"date": "Wed, 15 Oct 2025 14:26:30 +0200",
"is_openbsd": false,
"thread_id": "26ad62ff-4972-4b29-8f9e-1868cd20ee00@nvidia.com.mbox.gz"
} |
lkml_critique | linux-pci | From: Manivannan Sadhasivam <manivannan.sadhasivam@oss.qualcomm.com>
Since the PCI subsystem has started enabling all ASPM states for all
devicetree based platforms, the ASPM enablement code from this driver can
now be dropped.
Signed-off-by: Manivannan Sadhasivam <manivannan.sadhasivam@oss.qualcomm.com>
Link: https:... | null | null | null | [PATCH v2 2/2] PCI: qcom: Remove the custom ASPM enablement code | 在 2025/10/15 星期三 20:17, Niklas Cassel 写道:
For now, this is a acceptable option if default ASPM policy enable L1ss
w/o checking if the HW could supports it... But how about adding
supports-clkreq stuff to upstream host driver directly? That would help
folks enable L1ss if the HW is ready and they just need adding prope... | {
"author": "Shawn Lin <shawn.lin@rock-chips.com>",
"date": "Wed, 15 Oct 2025 21:00:41 +0800",
"is_openbsd": false,
"thread_id": "26ad62ff-4972-4b29-8f9e-1868cd20ee00@nvidia.com.mbox.gz"
} |
lkml_critique | linux-pci | From: Manivannan Sadhasivam <manivannan.sadhasivam@oss.qualcomm.com>
Since the PCI subsystem has started enabling all ASPM states for all
devicetree based platforms, the ASPM enablement code from this driver can
now be dropped.
Signed-off-by: Manivannan Sadhasivam <manivannan.sadhasivam@oss.qualcomm.com>
Link: https:... | null | null | null | [PATCH v2 2/2] PCI: qcom: Remove the custom ASPM enablement code | On Wed, Oct 15, 2025 at 09:00:41PM +0800, Shawn Lin wrote:
I like your idea, if you have time, please send a patch.
However, adding (working) support for L1 substates (via 'supports-clkreq')
is new code, and should thus be queued for next release instead of v6.18.
For now, pcie-dw-rockchip.c is broken for a lot of P... | {
"author": "Niklas Cassel <cassel@kernel.org>",
"date": "Wed, 15 Oct 2025 17:23:21 +0200",
"is_openbsd": false,
"thread_id": "26ad62ff-4972-4b29-8f9e-1868cd20ee00@nvidia.com.mbox.gz"
} |
lkml_critique | linux-pci | From: Manivannan Sadhasivam <manivannan.sadhasivam@oss.qualcomm.com>
Since the PCI subsystem has started enabling all ASPM states for all
devicetree based platforms, the ASPM enablement code from this driver can
now be dropped.
Signed-off-by: Manivannan Sadhasivam <manivannan.sadhasivam@oss.qualcomm.com>
Link: https:... | null | null | null | [PATCH v2 2/2] PCI: qcom: Remove the custom ASPM enablement code | On Wed, Oct 15, 2025 at 02:26:30PM +0200, Diederik de Haas wrote:
FWIW, my expectation is that booting with "pcie_aspm=off" should
effectively avoid the ASPM enabling and behave similarly to reverting
f3ac2ff14834 ("PCI/ASPM: Enable all ClockPM and ASPM states for
devicetree platforms"). My hope was that we could boo... | {
"author": "Bjorn Helgaas <helgaas@kernel.org>",
"date": "Wed, 15 Oct 2025 17:50:33 -0500",
"is_openbsd": false,
"thread_id": "26ad62ff-4972-4b29-8f9e-1868cd20ee00@nvidia.com.mbox.gz"
} |
lkml_critique | linux-pci | From: Manivannan Sadhasivam <manivannan.sadhasivam@oss.qualcomm.com>
Since the PCI subsystem has started enabling all ASPM states for all
devicetree based platforms, the ASPM enablement code from this driver can
now be dropped.
Signed-off-by: Manivannan Sadhasivam <manivannan.sadhasivam@oss.qualcomm.com>
Link: https:... | null | null | null | [PATCH v2 2/2] PCI: qcom: Remove the custom ASPM enablement code | On Wed, Oct 15, 2025 at 09:00:41PM +0800, Shawn Lin wrote:
I don't understand the details of the supports-clkreq issue.
If we need to add supports-clkreq to devicetree, I want to understand
why we need it there when we don't seem to need it for ACPI systems.
Generally the OS relies on what the hardware advertises,... | {
"author": "Bjorn Helgaas <helgaas@kernel.org>",
"date": "Wed, 15 Oct 2025 18:30:54 -0500",
"is_openbsd": false,
"thread_id": "26ad62ff-4972-4b29-8f9e-1868cd20ee00@nvidia.com.mbox.gz"
} |
lkml_critique | linux-pci | From: Manivannan Sadhasivam <manivannan.sadhasivam@oss.qualcomm.com>
Since the PCI subsystem has started enabling all ASPM states for all
devicetree based platforms, the ASPM enablement code from this driver can
now be dropped.
Signed-off-by: Manivannan Sadhasivam <manivannan.sadhasivam@oss.qualcomm.com>
Link: https:... | null | null | null | [PATCH v2 2/2] PCI: qcom: Remove the custom ASPM enablement code | Hi Bjorn:
Yes, it is. The L1 PM Substates support can be broadcasted by the according
Capabilities of PCIe controller.
But, this feature is still relied on the CLKREQ# signal connection on the
board/device hardware designs too.
Maybe the "supports-clkreq" property is used to guarantee that the hardware
designs... | {
"author": "Hongxing Zhu <hongxing.zhu@nxp.com>",
"date": "Thu, 16 Oct 2025 06:46:26 +0000",
"is_openbsd": false,
"thread_id": "26ad62ff-4972-4b29-8f9e-1868cd20ee00@nvidia.com.mbox.gz"
} |
lkml_critique | linux-pci | From: Manivannan Sadhasivam <manivannan.sadhasivam@oss.qualcomm.com>
Since the PCI subsystem has started enabling all ASPM states for all
devicetree based platforms, the ASPM enablement code from this driver can
now be dropped.
Signed-off-by: Manivannan Sadhasivam <manivannan.sadhasivam@oss.qualcomm.com>
Link: https:... | null | null | null | [PATCH v2 2/2] PCI: qcom: Remove the custom ASPM enablement code | On Thu Oct 16, 2025 at 12:50 AM CEST, Bjorn Helgaas wrote:
I built a 6.18-rc1 kernel with that commit reverted and when booted up,
I could mount my NVMe drive. Next I removed the 'noauto' from /etc/fstab
and rebooted and that succeeded as well.
So I think we can conclude that commit f3ac2ff14834 is the cause.
Correc... | {
"author": "\"Diederik de Haas\" <diederik@cknow-tech.com>",
"date": "Thu, 16 Oct 2025 19:38:57 +0200",
"is_openbsd": false,
"thread_id": "26ad62ff-4972-4b29-8f9e-1868cd20ee00@nvidia.com.mbox.gz"
} |
lkml_critique | linux-pci | From: Manivannan Sadhasivam <manivannan.sadhasivam@oss.qualcomm.com>
Since the PCI subsystem has started enabling all ASPM states for all
devicetree based platforms, the ASPM enablement code from this driver can
now be dropped.
Signed-off-by: Manivannan Sadhasivam <manivannan.sadhasivam@oss.qualcomm.com>
Link: https:... | null | null | null | [PATCH v2 2/2] PCI: qcom: Remove the custom ASPM enablement code | On Wed, Oct 15, 2025 at 06:30:54PM -0500, Bjorn Helgaas wrote:
I think there is a disconnect between enabling L1ss CAP and CLKREQ#
availability.. When L1ss CAP is enabled for the Root Port in the hardware, there
is no guarantee that CLKREQ# is also available. If CLKREQ# is not available,
then if L1ss is enabled by the... | {
"author": "Manivannan Sadhasivam <manivannan.sadhasivam@oss.qualcomm.com>",
"date": "Fri, 17 Oct 2025 09:06:48 +0530",
"is_openbsd": false,
"thread_id": "26ad62ff-4972-4b29-8f9e-1868cd20ee00@nvidia.com.mbox.gz"
} |
lkml_critique | linux-pci | From: Manivannan Sadhasivam <manivannan.sadhasivam@oss.qualcomm.com>
Since the PCI subsystem has started enabling all ASPM states for all
devicetree based platforms, the ASPM enablement code from this driver can
now be dropped.
Signed-off-by: Manivannan Sadhasivam <manivannan.sadhasivam@oss.qualcomm.com>
Link: https:... | null | null | null | [PATCH v2 2/2] PCI: qcom: Remove the custom ASPM enablement code | Hi Mani and Bjorn
在 2025/10/17 星期五 11:36, Manivannan Sadhasivam 写道:
While we're on the topic of ASPM, may I ask a silly question?
I saw the ASPM would only be configured once the function driver calling
pci_enable_device. So if the modular driver hasn't been insmoded, the
link will be in L0 even though there is no tr... | {
"author": "Shawn Lin <shawn.lin@rock-chips.com>",
"date": "Fri, 17 Oct 2025 17:47:44 +0800",
"is_openbsd": false,
"thread_id": "26ad62ff-4972-4b29-8f9e-1868cd20ee00@nvidia.com.mbox.gz"
} |
lkml_critique | linux-pci | From: Manivannan Sadhasivam <manivannan.sadhasivam@oss.qualcomm.com>
Since the PCI subsystem has started enabling all ASPM states for all
devicetree based platforms, the ASPM enablement code from this driver can
now be dropped.
Signed-off-by: Manivannan Sadhasivam <manivannan.sadhasivam@oss.qualcomm.com>
Link: https:... | null | null | null | [PATCH v2 2/2] PCI: qcom: Remove the custom ASPM enablement code | On Fri, Oct 17, 2025 at 05:47:44PM +0800, Shawn Lin wrote:
I don't see where ASPM is configured during pci_enable_device(). It is currently
configured for all devices during pci_scan_slot().
- Mani
--
மணிவண்ணன் சதாசிவம் | {
"author": "Manivannan Sadhasivam <mani@kernel.org>",
"date": "Fri, 17 Oct 2025 15:34:51 +0530",
"is_openbsd": false,
"thread_id": "26ad62ff-4972-4b29-8f9e-1868cd20ee00@nvidia.com.mbox.gz"
} |
lkml_critique | linux-pci | From: Manivannan Sadhasivam <manivannan.sadhasivam@oss.qualcomm.com>
Since the PCI subsystem has started enabling all ASPM states for all
devicetree based platforms, the ASPM enablement code from this driver can
now be dropped.
Signed-off-by: Manivannan Sadhasivam <manivannan.sadhasivam@oss.qualcomm.com>
Link: https:... | null | null | null | [PATCH v2 2/2] PCI: qcom: Remove the custom ASPM enablement code | 在 2025/10/17 星期五 18:04, Manivannan Sadhasivam 写道:
This is the dump_stack() where I observed. If I compile NVMe driver as a
module and never insmod it, the link is always in L0, namely ASPM
Disabled.
[ 0.747508] pci 0000:01:00.0: ASPM: DT platform, enabling L0s-up
L0s-dw L1 ASPM-L1.1 ASPM-L1.2 PCI-PM-L1.1 PCI-PM-L... | {
"author": "Shawn Lin <shawn.lin@rock-chips.com>",
"date": "Fri, 17 Oct 2025 20:19:11 +0800",
"is_openbsd": false,
"thread_id": "26ad62ff-4972-4b29-8f9e-1868cd20ee00@nvidia.com.mbox.gz"
} |
lkml_critique | linux-pci | From: Manivannan Sadhasivam <manivannan.sadhasivam@oss.qualcomm.com>
Since the PCI subsystem has started enabling all ASPM states for all
devicetree based platforms, the ASPM enablement code from this driver can
now be dropped.
Signed-off-by: Manivannan Sadhasivam <manivannan.sadhasivam@oss.qualcomm.com>
Link: https:... | null | null | null | [PATCH v2 2/2] PCI: qcom: Remove the custom ASPM enablement code | On Fri, Oct 17, 2025 at 08:19:11PM +0800, Shawn Lin wrote:
I guess this comment answers your question:
https://git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux.git/tree/drivers/pci/pcie/aspm.c?h=v6.18-rc1#n1179
But with the recent ASPM change, the ASPM settings for DT platforms will be
applied before pci_enable... | {
"author": "Manivannan Sadhasivam <mani@kernel.org>",
"date": "Fri, 17 Oct 2025 18:24:26 +0530",
"is_openbsd": false,
"thread_id": "26ad62ff-4972-4b29-8f9e-1868cd20ee00@nvidia.com.mbox.gz"
} |
lkml_critique | linux-pci | From: Manivannan Sadhasivam <manivannan.sadhasivam@oss.qualcomm.com>
Since the PCI subsystem has started enabling all ASPM states for all
devicetree based platforms, the ASPM enablement code from this driver can
now be dropped.
Signed-off-by: Manivannan Sadhasivam <manivannan.sadhasivam@oss.qualcomm.com>
Link: https:... | null | null | null | [PATCH v2 2/2] PCI: qcom: Remove the custom ASPM enablement code | On Fri, Oct 17, 2025 at 06:24:26PM +0530, Manivannan Sadhasivam wrote:
The comment is:
* At this stage drivers haven't had an opportunity to change the
* link policy setting. Enabling ASPM on broken hardware can cripple
* it even before the driver has had a chance to disable ASPM, so
* default to a safe ... | {
"author": "Bjorn Helgaas <helgaas@kernel.org>",
"date": "Fri, 17 Oct 2025 08:45:54 -0500",
"is_openbsd": false,
"thread_id": "26ad62ff-4972-4b29-8f9e-1868cd20ee00@nvidia.com.mbox.gz"
} |
lkml_critique | linux-pci | From: Manivannan Sadhasivam <manivannan.sadhasivam@oss.qualcomm.com>
Since the PCI subsystem has started enabling all ASPM states for all
devicetree based platforms, the ASPM enablement code from this driver can
now be dropped.
Signed-off-by: Manivannan Sadhasivam <manivannan.sadhasivam@oss.qualcomm.com>
Link: https:... | null | null | null | [PATCH v2 2/2] PCI: qcom: Remove the custom ASPM enablement code | Hello Manivannan,
On Wednesday, October 15, 2025 08:22 CEST, Manivannan Sadhasivam <mani@kernel.org> wrote:
I'm hoping that it's clear by now that the theory and practice
actually diverge in this case, requiring certain level of support
for different SoCs and boards, which makes ASPM more than just
a device feature t... | {
"author": "\"Dragan Simic\" <dsimic@manjaro.org>",
"date": "Thu, 23 Oct 2025 20:57:13 +0200",
"is_openbsd": false,
"thread_id": "26ad62ff-4972-4b29-8f9e-1868cd20ee00@nvidia.com.mbox.gz"
} |
lkml_critique | linux-pci | From: Manivannan Sadhasivam <manivannan.sadhasivam@oss.qualcomm.com>
Since the PCI subsystem has started enabling all ASPM states for all
devicetree based platforms, the ASPM enablement code from this driver can
now be dropped.
Signed-off-by: Manivannan Sadhasivam <manivannan.sadhasivam@oss.qualcomm.com>
Link: https:... | null | null | null | [PATCH v2 2/2] PCI: qcom: Remove the custom ASPM enablement code | On Tue, Oct 14, 2025 at 01:49:05PM -0500, Bjorn Helgaas wrote:
#regzbot report: https://lore.kernel.org/r/22594781424C5C98+22cb5d61-19b1-4353-9818-3bb2b311da0b@radxa.com | {
"author": "Bjorn Helgaas <helgaas@kernel.org>",
"date": "Thu, 30 Oct 2025 17:14:04 -0500",
"is_openbsd": false,
"thread_id": "26ad62ff-4972-4b29-8f9e-1868cd20ee00@nvidia.com.mbox.gz"
} |
lkml_critique | linux-pci | From: Manivannan Sadhasivam <manivannan.sadhasivam@oss.qualcomm.com>
Since the PCI subsystem has started enabling all ASPM states for all
devicetree based platforms, the ASPM enablement code from this driver can
now be dropped.
Signed-off-by: Manivannan Sadhasivam <manivannan.sadhasivam@oss.qualcomm.com>
Link: https:... | null | null | null | [PATCH v2 2/2] PCI: qcom: Remove the custom ASPM enablement code | On Thu, Oct 30, 2025 at 05:14:05PM -0500, Bjorn Helgaas wrote:
Sorry for the noise; I'm trying to figure out how to use regzbot and
making lots of mistakes.
#regzbot fix: df5192d9bb0e
df5192d9bb0e ("PCI/ASPM: Enable only L0s and L1 for devicetree platforms") | {
"author": "Bjorn Helgaas <helgaas@kernel.org>",
"date": "Thu, 30 Oct 2025 17:16:51 -0500",
"is_openbsd": false,
"thread_id": "26ad62ff-4972-4b29-8f9e-1868cd20ee00@nvidia.com.mbox.gz"
} |
lkml_critique | linux-pci | From: Manivannan Sadhasivam <manivannan.sadhasivam@oss.qualcomm.com>
Since the PCI subsystem has started enabling all ASPM states for all
devicetree based platforms, the ASPM enablement code from this driver can
now be dropped.
Signed-off-by: Manivannan Sadhasivam <manivannan.sadhasivam@oss.qualcomm.com>
Link: https:... | null | null | null | [PATCH v2 2/2] PCI: qcom: Remove the custom ASPM enablement code | On Fri, Oct 17, 2025 at 08:45:54AM -0500, Bjorn Helgaas wrote:
There are quite a bit of drivers fiddling with ASPM states:
git grep -l PCI_EXP_LNKCTL_ASPMC drivers/ | wc -l
16
- Mani
--
மணிவண்ணன் சதாசிவம் | {
"author": "Manivannan Sadhasivam <mani@kernel.org>",
"date": "Fri, 31 Oct 2025 11:51:31 +0530",
"is_openbsd": false,
"thread_id": "26ad62ff-4972-4b29-8f9e-1868cd20ee00@nvidia.com.mbox.gz"
} |
lkml_critique | linux-pci | From: Manivannan Sadhasivam <manivannan.sadhasivam@oss.qualcomm.com>
Since the PCI subsystem has started enabling all ASPM states for all
devicetree based platforms, the ASPM enablement code from this driver can
now be dropped.
Signed-off-by: Manivannan Sadhasivam <manivannan.sadhasivam@oss.qualcomm.com>
Link: https:... | null | null | null | [PATCH v2 2/2] PCI: qcom: Remove the custom ASPM enablement code | On Mon, Sep 22, 2025 at 09:46:43PM +0530, Manivannan Sadhasivam via B4 Relay wrote:
The series breaks the DRM CI on DB820C board (apq8096, PCIe network
card, NFS root). The board resets randomly after some time ([1]).
Note:
- Reverting just the second patch is not enough ([2])
- Reverting the second patch and picki... | {
"author": "Dmitry Baryshkov <dmitry.baryshkov@oss.qualcomm.com>",
"date": "Sat, 8 Nov 2025 18:18:03 +0200",
"is_openbsd": false,
"thread_id": "26ad62ff-4972-4b29-8f9e-1868cd20ee00@nvidia.com.mbox.gz"
} |
lkml_critique | linux-pci | From: Manivannan Sadhasivam <manivannan.sadhasivam@oss.qualcomm.com>
Since the PCI subsystem has started enabling all ASPM states for all
devicetree based platforms, the ASPM enablement code from this driver can
now be dropped.
Signed-off-by: Manivannan Sadhasivam <manivannan.sadhasivam@oss.qualcomm.com>
Link: https:... | null | null | null | [PATCH v2 2/2] PCI: qcom: Remove the custom ASPM enablement code | On 11/8/25 1:18 PM, Dmitry Baryshkov wrote:
Is that reset.. due to the watchdog resetting a hard-frozen system?
Me and a bunch of other people in the #aarch64-laptops irc/matrix room
have been experiencing these random hard freezes with ASPM enabled for
the NVMe SSD, on Hamoa (and Purwa too I think) devices.
Total... | {
"author": "Val Packett <val@packett.cool>",
"date": "Tue, 11 Nov 2025 03:51:03 -0300",
"is_openbsd": false,
"thread_id": "26ad62ff-4972-4b29-8f9e-1868cd20ee00@nvidia.com.mbox.gz"
} |
lkml_critique | linux-pci | From: Manivannan Sadhasivam <manivannan.sadhasivam@oss.qualcomm.com>
Since the PCI subsystem has started enabling all ASPM states for all
devicetree based platforms, the ASPM enablement code from this driver can
now be dropped.
Signed-off-by: Manivannan Sadhasivam <manivannan.sadhasivam@oss.qualcomm.com>
Link: https:... | null | null | null | [PATCH v2 2/2] PCI: qcom: Remove the custom ASPM enablement code | On Tue, Nov 11, 2025 at 03:51:03AM -0300, Val Packett wrote:
Interesting! ASPM is tested and found to be working on Hamoa and other Qcom
chipsets also, except Makena based chipsets that doesn't support L0s due to
incorrect PHY settings. APQ8096 might be an exception since it is a really old
target and I'm digging up i... | {
"author": "Manivannan Sadhasivam <mani@kernel.org>",
"date": "Tue, 11 Nov 2025 12:49:10 +0530",
"is_openbsd": false,
"thread_id": "26ad62ff-4972-4b29-8f9e-1868cd20ee00@nvidia.com.mbox.gz"
} |
lkml_critique | linux-pci | From: Manivannan Sadhasivam <manivannan.sadhasivam@oss.qualcomm.com>
Since the PCI subsystem has started enabling all ASPM states for all
devicetree based platforms, the ASPM enablement code from this driver can
now be dropped.
Signed-off-by: Manivannan Sadhasivam <manivannan.sadhasivam@oss.qualcomm.com>
Link: https:... | null | null | null | [PATCH v2 2/2] PCI: qcom: Remove the custom ASPM enablement code | On 11/11/25 4:19 AM, Manivannan Sadhasivam wrote:
I certainly remember that ASPM *was* enabled by default when I first got
this laptop, via the custom way that predates this series.
Actually that custom enablement code getting removed was how I
discovered it was ASPM related!
I pulled linux-next once and suddenly ... | {
"author": "Val Packett <val@packett.cool>",
"date": "Tue, 11 Nov 2025 04:40:01 -0300",
"is_openbsd": false,
"thread_id": "26ad62ff-4972-4b29-8f9e-1868cd20ee00@nvidia.com.mbox.gz"
} |
lkml_critique | linux-pci | From: Manivannan Sadhasivam <manivannan.sadhasivam@oss.qualcomm.com>
Since the PCI subsystem has started enabling all ASPM states for all
devicetree based platforms, the ASPM enablement code from this driver can
now be dropped.
Signed-off-by: Manivannan Sadhasivam <manivannan.sadhasivam@oss.qualcomm.com>
Link: https:... | null | null | null | [PATCH v2 2/2] PCI: qcom: Remove the custom ASPM enablement code | On Tue, Nov 11, 2025 at 04:40:01AM -0300, Val Packett wrote:
Because, we only enable L0s and L1 by default and not L1ss.
Kernel has no visibility on the PCIe link ASPM states as it happens autonomously
in hardware once enabled. So once kernel issues a PCIe read TLP, the link is
supposed to transition L0 and the devi... | {
"author": "Manivannan Sadhasivam <mani@kernel.org>",
"date": "Tue, 11 Nov 2025 15:36:15 +0530",
"is_openbsd": false,
"thread_id": "26ad62ff-4972-4b29-8f9e-1868cd20ee00@nvidia.com.mbox.gz"
} |
lkml_critique | linux-pci | From: Manivannan Sadhasivam <manivannan.sadhasivam@oss.qualcomm.com>
Since the PCI subsystem has started enabling all ASPM states for all
devicetree based platforms, the ASPM enablement code from this driver can
now be dropped.
Signed-off-by: Manivannan Sadhasivam <manivannan.sadhasivam@oss.qualcomm.com>
Link: https:... | null | null | null | [PATCH v2 2/2] PCI: qcom: Remove the custom ASPM enablement code | On 11/11/25 7:06 AM, Manivannan Sadhasivam wrote:
Back in that short time period between the old code getting removed and
this series landing, the default behavior was no ASPM at all, I'm pretty
sure.
Again, with the SK hynix SSD I used back then, I *definitely* saw the
issue with this series in and no args applie... | {
"author": "Val Packett <val@packett.cool>",
"date": "Tue, 11 Nov 2025 14:29:57 -0300",
"is_openbsd": false,
"thread_id": "26ad62ff-4972-4b29-8f9e-1868cd20ee00@nvidia.com.mbox.gz"
} |
lkml_critique | linux-pci | From: Manivannan Sadhasivam <manivannan.sadhasivam@oss.qualcomm.com>
Since the PCI subsystem has started enabling all ASPM states for all
devicetree based platforms, the ASPM enablement code from this driver can
now be dropped.
Signed-off-by: Manivannan Sadhasivam <manivannan.sadhasivam@oss.qualcomm.com>
Link: https:... | null | null | null | [PATCH v2 2/2] PCI: qcom: Remove the custom ASPM enablement code | On Tue, Nov 11, 2025 at 03:51:03AM -0300, Val Packett wrote:
I don't know what controllers are in Hamoa and Purwa or what the IDs
of the root ports and endpoints are. Can you collect the Vendor and
Device IDs (from dmesg log or "lspci -n")? If we figure out that some
are broken, we might be able to add quirks to avo... | {
"author": "Bjorn Helgaas <helgaas@kernel.org>",
"date": "Tue, 11 Nov 2025 17:33:13 -0600",
"is_openbsd": false,
"thread_id": "26ad62ff-4972-4b29-8f9e-1868cd20ee00@nvidia.com.mbox.gz"
} |
lkml_critique | linux-pci | From: Manivannan Sadhasivam <manivannan.sadhasivam@oss.qualcomm.com>
Since the PCI subsystem has started enabling all ASPM states for all
devicetree based platforms, the ASPM enablement code from this driver can
now be dropped.
Signed-off-by: Manivannan Sadhasivam <manivannan.sadhasivam@oss.qualcomm.com>
Link: https:... | null | null | null | [PATCH v2 2/2] PCI: qcom: Remove the custom ASPM enablement code | On 11/11/25 2:29 PM, Val Packett wrote:
Update: close to 2 days in, went AFK to eat and came back to a gdm login
prompt once again. (This is the stock WD drive and no force.)
This does not seem to be related to L1ss.
~val | {
"author": "Val Packett <val@packett.cool>",
"date": "Thu, 13 Nov 2025 01:30:17 -0300",
"is_openbsd": false,
"thread_id": "26ad62ff-4972-4b29-8f9e-1868cd20ee00@nvidia.com.mbox.gz"
} |
lkml_critique | linux-pci | From: Manivannan Sadhasivam <manivannan.sadhasivam@oss.qualcomm.com>
Since the PCI subsystem has started enabling all ASPM states for all
devicetree based platforms, the ASPM enablement code from this driver can
now be dropped.
Signed-off-by: Manivannan Sadhasivam <manivannan.sadhasivam@oss.qualcomm.com>
Link: https:... | null | null | null | [PATCH v2 2/2] PCI: qcom: Remove the custom ASPM enablement code | Hi Manivannan,
On 22/09/2025 17:16, Manivannan Sadhasivam via B4 Relay wrote:
Since this commit was added in Linux v6.18, I have been observing a
suspend test failures on some of our boards. The suspend test suspends
the devices for 20 secs and before this change the board would resume in
about ~27 secs (includin... | {
"author": "Jon Hunter <jonathanh@nvidia.com>",
"date": "Thu, 22 Jan 2026 12:12:42 +0000",
"is_openbsd": false,
"thread_id": "26ad62ff-4972-4b29-8f9e-1868cd20ee00@nvidia.com.mbox.gz"
} |
lkml_critique | linux-pci | From: Manivannan Sadhasivam <manivannan.sadhasivam@oss.qualcomm.com>
Since the PCI subsystem has started enabling all ASPM states for all
devicetree based platforms, the ASPM enablement code from this driver can
now be dropped.
Signed-off-by: Manivannan Sadhasivam <manivannan.sadhasivam@oss.qualcomm.com>
Link: https:... | null | null | null | [PATCH v2 2/2] PCI: qcom: Remove the custom ASPM enablement code | On Thu, Jan 22, 2026 at 12:12:42PM +0000, Jon Hunter wrote:
Marek reported a similar issue on ARM Juno board [1] on which one of the switch
downstream port failed to come up while *entering* system suspend. But I was
clueless as to why the device fails to function only while entering system
suspend and not during runt... | {
"author": "Manivannan Sadhasivam <mani@kernel.org>",
"date": "Thu, 22 Jan 2026 18:47:09 +0530",
"is_openbsd": false,
"thread_id": "26ad62ff-4972-4b29-8f9e-1868cd20ee00@nvidia.com.mbox.gz"
} |
lkml_critique | linux-pci | From: Manivannan Sadhasivam <manivannan.sadhasivam@oss.qualcomm.com>
Since the PCI subsystem has started enabling all ASPM states for all
devicetree based platforms, the ASPM enablement code from this driver can
now be dropped.
Signed-off-by: Manivannan Sadhasivam <manivannan.sadhasivam@oss.qualcomm.com>
Link: https:... | null | null | null | [PATCH v2 2/2] PCI: qcom: Remove the custom ASPM enablement code | On 22/01/2026 13:17, Manivannan Sadhasivam wrote:
...
I don't see any errors on entering suspend, just resuming from suspend.
One other thing that I notice, on resuming in a good case I see ...
tegra194-pcie 141e0000.pcie: Link didn't transition to L2 state
In a bad case I see ...
tegra194-pcie 141e0000.pcie... | {
"author": "Jon Hunter <jonathanh@nvidia.com>",
"date": "Thu, 22 Jan 2026 13:43:41 +0000",
"is_openbsd": false,
"thread_id": "26ad62ff-4972-4b29-8f9e-1868cd20ee00@nvidia.com.mbox.gz"
} |
lkml_critique | linux-pci | From: Manivannan Sadhasivam <manivannan.sadhasivam@oss.qualcomm.com>
Since the PCI subsystem has started enabling all ASPM states for all
devicetree based platforms, the ASPM enablement code from this driver can
now be dropped.
Signed-off-by: Manivannan Sadhasivam <manivannan.sadhasivam@oss.qualcomm.com>
Link: https:... | null | null | null | [PATCH v2 2/2] PCI: qcom: Remove the custom ASPM enablement code | On Thu, Jan 22, 2026 at 01:43:41PM +0000, Jon Hunter wrote:
But this error print is coming from:
tegra_pcie_dw_suspend_noirq()
\__ tegra_pcie_dw_pme_turnoff()
This function broadcasts PME_Turn_Off message and expects the PME_TO_Ack
response from the device. But in both working and non-working cases, response is
n... | {
"author": "Manivannan Sadhasivam <mani@kernel.org>",
"date": "Thu, 22 Jan 2026 20:09:45 +0530",
"is_openbsd": false,
"thread_id": "26ad62ff-4972-4b29-8f9e-1868cd20ee00@nvidia.com.mbox.gz"
} |
lkml_critique | linux-pci | From: Manivannan Sadhasivam <manivannan.sadhasivam@oss.qualcomm.com>
Since the PCI subsystem has started enabling all ASPM states for all
devicetree based platforms, the ASPM enablement code from this driver can
now be dropped.
Signed-off-by: Manivannan Sadhasivam <manivannan.sadhasivam@oss.qualcomm.com>
Link: https:... | null | null | null | [PATCH v2 2/2] PCI: qcom: Remove the custom ASPM enablement code | [+cc NVMe folks]
On Thu, Jan 22, 2026 at 12:12:42PM +0000, Jon Hunter wrote:
For context, "this commit" refers to f3ac2ff14834, modified by
df5192d9bb0e:
f3ac2ff14834 ("PCI/ASPM: Enable all ClockPM and ASPM states for devicetree platforms")
df5192d9bb0e ("PCI/ASPM: Enable only L0s and L1 for devicetree platform... | {
"author": "Bjorn Helgaas <helgaas@kernel.org>",
"date": "Thu, 22 Jan 2026 09:29:03 -0600",
"is_openbsd": false,
"thread_id": "26ad62ff-4972-4b29-8f9e-1868cd20ee00@nvidia.com.mbox.gz"
} |
lkml_critique | linux-pci | From: Manivannan Sadhasivam <manivannan.sadhasivam@oss.qualcomm.com>
Since the PCI subsystem has started enabling all ASPM states for all
devicetree based platforms, the ASPM enablement code from this driver can
now be dropped.
Signed-off-by: Manivannan Sadhasivam <manivannan.sadhasivam@oss.qualcomm.com>
Link: https:... | null | null | null | [PATCH v2 2/2] PCI: qcom: Remove the custom ASPM enablement code | On Thu, Jan 22, 2026 at 09:29:03AM -0600, Bjorn Helgaas wrote:
We have this check in place since NVMe driver keeps the device in D0 and expects
the link to be in L1ss on platforms not passing below checks:
if (pm_suspend_via_firmware() || !ctrl->npss ||
!pcie_aspm_enabled(pdev) ||
(nde... | {
"author": "Manivannan Sadhasivam <mani@kernel.org>",
"date": "Thu, 22 Jan 2026 22:31:50 +0530",
"is_openbsd": false,
"thread_id": "26ad62ff-4972-4b29-8f9e-1868cd20ee00@nvidia.com.mbox.gz"
} |
lkml_critique | linux-pci | From: Manivannan Sadhasivam <manivannan.sadhasivam@oss.qualcomm.com>
Since the PCI subsystem has started enabling all ASPM states for all
devicetree based platforms, the ASPM enablement code from this driver can
now be dropped.
Signed-off-by: Manivannan Sadhasivam <manivannan.sadhasivam@oss.qualcomm.com>
Link: https:... | null | null | null | [PATCH v2 2/2] PCI: qcom: Remove the custom ASPM enablement code | On 22/01/2026 17:01, Manivannan Sadhasivam wrote:
Yes that appears to be working! I will test some more boards to confirm.
Cheers
Jon
--
nvpublic | {
"author": "Jon Hunter <jonathanh@nvidia.com>",
"date": "Thu, 22 Jan 2026 19:14:04 +0000",
"is_openbsd": false,
"thread_id": "26ad62ff-4972-4b29-8f9e-1868cd20ee00@nvidia.com.mbox.gz"
} |
lkml_critique | linux-pci | From: Manivannan Sadhasivam <manivannan.sadhasivam@oss.qualcomm.com>
Since the PCI subsystem has started enabling all ASPM states for all
devicetree based platforms, the ASPM enablement code from this driver can
now be dropped.
Signed-off-by: Manivannan Sadhasivam <manivannan.sadhasivam@oss.qualcomm.com>
Link: https:... | null | null | null | [PATCH v2 2/2] PCI: qcom: Remove the custom ASPM enablement code | On 22/01/2026 19:14, Jon Hunter wrote:
...
So yes with the above all boards appear to be working fine.
How is this usually coordinated between the NVMe driver and Host
controller driver? It is not clear to me exactly where the problem is
and if the NVMe is not shutting down, then what should be preventing the
Ho... | {
"author": "Jon Hunter <jonathanh@nvidia.com>",
"date": "Fri, 23 Jan 2026 10:55:28 +0000",
"is_openbsd": false,
"thread_id": "26ad62ff-4972-4b29-8f9e-1868cd20ee00@nvidia.com.mbox.gz"
} |
lkml_critique | linux-pci | From: Manivannan Sadhasivam <manivannan.sadhasivam@oss.qualcomm.com>
Since the PCI subsystem has started enabling all ASPM states for all
devicetree based platforms, the ASPM enablement code from this driver can
now be dropped.
Signed-off-by: Manivannan Sadhasivam <manivannan.sadhasivam@oss.qualcomm.com>
Link: https:... | null | null | null | [PATCH v2 2/2] PCI: qcom: Remove the custom ASPM enablement code | + Krishna
On Fri, Jan 23, 2026 at 10:55:28AM +0000, Jon Hunter wrote:
Well if the NVMe driver is not shutting down the device, then it expects the
device to be in APST (NVMe low power state if supported) state and retain all
the context across the suspend/resume cycle.
But if the host controller powers down the devi... | {
"author": "Manivannan Sadhasivam <mani@kernel.org>",
"date": "Fri, 23 Jan 2026 19:26:14 +0530",
"is_openbsd": false,
"thread_id": "26ad62ff-4972-4b29-8f9e-1868cd20ee00@nvidia.com.mbox.gz"
} |
lkml_critique | linux-pci | From: Manivannan Sadhasivam <manivannan.sadhasivam@oss.qualcomm.com>
Since the PCI subsystem has started enabling all ASPM states for all
devicetree based platforms, the ASPM enablement code from this driver can
now be dropped.
Signed-off-by: Manivannan Sadhasivam <manivannan.sadhasivam@oss.qualcomm.com>
Link: https:... | null | null | null | [PATCH v2 2/2] PCI: qcom: Remove the custom ASPM enablement code | On 23/01/2026 13:56, Manivannan Sadhasivam wrote:
Yes it does. I am happy to test any patches for this.
Jon
--
nvpublic | {
"author": "Jon Hunter <jonathanh@nvidia.com>",
"date": "Fri, 23 Jan 2026 14:39:46 +0000",
"is_openbsd": false,
"thread_id": "26ad62ff-4972-4b29-8f9e-1868cd20ee00@nvidia.com.mbox.gz"
} |
lkml_critique | linux-pci | From: Manivannan Sadhasivam <manivannan.sadhasivam@oss.qualcomm.com>
Since the PCI subsystem has started enabling all ASPM states for all
devicetree based platforms, the ASPM enablement code from this driver can
now be dropped.
Signed-off-by: Manivannan Sadhasivam <manivannan.sadhasivam@oss.qualcomm.com>
Link: https:... | null | null | null | [PATCH v2 2/2] PCI: qcom: Remove the custom ASPM enablement code | Hi Mani, Krishna,
On 23/01/2026 13:56, Manivannan Sadhasivam wrote:
...
Do you have a rough idea of when you will be posting patches for this?
Thanks
Jon
--
nvpublic | {
"author": "Jon Hunter <jonathanh@nvidia.com>",
"date": "Mon, 16 Feb 2026 14:03:41 +0000",
"is_openbsd": false,
"thread_id": "26ad62ff-4972-4b29-8f9e-1868cd20ee00@nvidia.com.mbox.gz"
} |
lkml_critique | linux-pci | From: Manivannan Sadhasivam <manivannan.sadhasivam@oss.qualcomm.com>
Since the PCI subsystem has started enabling all ASPM states for all
devicetree based platforms, the ASPM enablement code from this driver can
now be dropped.
Signed-off-by: Manivannan Sadhasivam <manivannan.sadhasivam@oss.qualcomm.com>
Link: https:... | null | null | null | [PATCH v2 2/2] PCI: qcom: Remove the custom ASPM enablement code | On Mon, Feb 16, 2026 at 02:03:41PM +0000, Jon Hunter wrote:
Krishna posted the series a couple of weeks before but forgot to CC you:
https://lore.kernel.org/linux-pci/20260128-d3cold-v1-0-dd8f3f0ce824@oss.qualcomm.com/
You are expected to use the helper pci_host_common_can_enter_d3cold() in the
suspend path.
- Mani
... | {
"author": "Manivannan Sadhasivam <mani@kernel.org>",
"date": "Mon, 16 Feb 2026 19:48:29 +0530",
"is_openbsd": false,
"thread_id": "26ad62ff-4972-4b29-8f9e-1868cd20ee00@nvidia.com.mbox.gz"
} |
lkml_critique | linux-pci | From: Manivannan Sadhasivam <manivannan.sadhasivam@oss.qualcomm.com>
Since the PCI subsystem has started enabling all ASPM states for all
devicetree based platforms, the ASPM enablement code from this driver can
now be dropped.
Signed-off-by: Manivannan Sadhasivam <manivannan.sadhasivam@oss.qualcomm.com>
Link: https:... | null | null | null | [PATCH v2 2/2] PCI: qcom: Remove the custom ASPM enablement code | Hi,
On 1/22/26 19:01, Manivannan Sadhasivam wrote:
We noticed a similar issue with the Renesas RZ/G3S host driver and NVMe devices.
We currently have 2 SoCs where we identified this problem (RZ/G3S and RZ/G3E),
both present on SoM modules, and the SoM modules could be connected to the same
carrier board where the ... | {
"author": "Claudiu Beznea <claudiu.beznea@tuxon.dev>",
"date": "Mon, 16 Feb 2026 19:19:46 +0200",
"is_openbsd": false,
"thread_id": "26ad62ff-4972-4b29-8f9e-1868cd20ee00@nvidia.com.mbox.gz"
} |
lkml_critique | linux-pci | From: Manivannan Sadhasivam <manivannan.sadhasivam@oss.qualcomm.com>
Since the PCI subsystem has started enabling all ASPM states for all
devicetree based platforms, the ASPM enablement code from this driver can
now be dropped.
Signed-off-by: Manivannan Sadhasivam <manivannan.sadhasivam@oss.qualcomm.com>
Link: https:... | null | null | null | [PATCH v2 2/2] PCI: qcom: Remove the custom ASPM enablement code | On Mon, Feb 16, 2026 at 07:19:46PM +0200, Claudiu Beznea wrote:
If you do not know how to control CLKREQ# and it is broken, then disable L1 PM
Substates in the Root Port L1 PM Susbstates Capabilities register during
controller driver probe.
- Mani
--
மணிவண்ணன் சதாசிவம் | {
"author": "Manivannan Sadhasivam <mani@kernel.org>",
"date": "Wed, 18 Feb 2026 19:26:40 +0530",
"is_openbsd": false,
"thread_id": "26ad62ff-4972-4b29-8f9e-1868cd20ee00@nvidia.com.mbox.gz"
} |
lkml_critique | linux-pci | From: Manivannan Sadhasivam <manivannan.sadhasivam@oss.qualcomm.com>
Since the PCI subsystem has started enabling all ASPM states for all
devicetree based platforms, the ASPM enablement code from this driver can
now be dropped.
Signed-off-by: Manivannan Sadhasivam <manivannan.sadhasivam@oss.qualcomm.com>
Link: https:... | null | null | null | [PATCH v2 2/2] PCI: qcom: Remove the custom ASPM enablement code | Hi Mani,
On 16/02/2026 14:35, Jon Hunter wrote:
...
I have been playing around with this, but so far I have not got anything
to work. Right now I have just made the following change (note that this
is based upon Manikanta's fixes series [0]) ...
diff --git a/drivers/pci/controller/dwc/pcie-tegra194.c b/drivers/pc... | {
"author": "Jon Hunter <jonathanh@nvidia.com>",
"date": "Thu, 19 Feb 2026 17:42:37 +0000",
"is_openbsd": false,
"thread_id": "26ad62ff-4972-4b29-8f9e-1868cd20ee00@nvidia.com.mbox.gz"
} |
lkml_critique | linux-pci | From: Manivannan Sadhasivam <manivannan.sadhasivam@oss.qualcomm.com>
Since the PCI subsystem has started enabling all ASPM states for all
devicetree based platforms, the ASPM enablement code from this driver can
now be dropped.
Signed-off-by: Manivannan Sadhasivam <manivannan.sadhasivam@oss.qualcomm.com>
Link: https:... | null | null | null | [PATCH v2 2/2] PCI: qcom: Remove the custom ASPM enablement code | Hi Mani, Bjorn,
On 19/02/2026 17:42, Jon Hunter wrote:
So NVMe is still broken for us and I admit, I don't fully understand the
issue. However, it seems to me that this change is not working for all
device-tree platforms as intended. So for now, would it be acceptable to
add a callback function for drivers such as... | {
"author": "Jon Hunter <jonathanh@nvidia.com>",
"date": "Thu, 26 Feb 2026 10:34:18 +0000",
"is_openbsd": false,
"thread_id": "26ad62ff-4972-4b29-8f9e-1868cd20ee00@nvidia.com.mbox.gz"
} |
lkml_critique | linux-pci | From: Manivannan Sadhasivam <manivannan.sadhasivam@oss.qualcomm.com>
Since the PCI subsystem has started enabling all ASPM states for all
devicetree based platforms, the ASPM enablement code from this driver can
now be dropped.
Signed-off-by: Manivannan Sadhasivam <manivannan.sadhasivam@oss.qualcomm.com>
Link: https:... | null | null | null | [PATCH v2 2/2] PCI: qcom: Remove the custom ASPM enablement code | On Thu, Feb 26, 2026 at 10:34:18AM +0000, Jon Hunter wrote:
Since we know that ASPM is the issue on your platform and the failure also
confirms that ASPM was never enabled before, I'd suggest disabling ASPM for the
Root Port as a workaround:
```
diff --git a/drivers/pci/controller/dwc/pcie-tegra194.c b/drivers/pci/co... | {
"author": "Manivannan Sadhasivam <mani@kernel.org>",
"date": "Thu, 26 Feb 2026 16:38:08 +0530",
"is_openbsd": false,
"thread_id": "26ad62ff-4972-4b29-8f9e-1868cd20ee00@nvidia.com.mbox.gz"
} |
lkml_critique | linux-pci | From: Manivannan Sadhasivam <manivannan.sadhasivam@oss.qualcomm.com>
Since the PCI subsystem has started enabling all ASPM states for all
devicetree based platforms, the ASPM enablement code from this driver can
now be dropped.
Signed-off-by: Manivannan Sadhasivam <manivannan.sadhasivam@oss.qualcomm.com>
Link: https:... | null | null | null | [PATCH v2 2/2] PCI: qcom: Remove the custom ASPM enablement code | On Thu, Feb 19, 2026 at 05:42:37PM +0000, Jon Hunter wrote:
Device mean the 'host' here?
I can't certainly know what is going wrong. If controller driver suspend is
skipped, then ideally the controller and the NVMe device should stay powered ON
during suspend. But if the platform pulls the plug at the end of suspend... | {
"author": "Manivannan Sadhasivam <mani@kernel.org>",
"date": "Thu, 26 Feb 2026 16:46:52 +0530",
"is_openbsd": false,
"thread_id": "26ad62ff-4972-4b29-8f9e-1868cd20ee00@nvidia.com.mbox.gz"
} |
lkml_critique | linux-pci | From: Manivannan Sadhasivam <manivannan.sadhasivam@oss.qualcomm.com>
Since the PCI subsystem has started enabling all ASPM states for all
devicetree based platforms, the ASPM enablement code from this driver can
now be dropped.
Signed-off-by: Manivannan Sadhasivam <manivannan.sadhasivam@oss.qualcomm.com>
Link: https:... | null | null | null | [PATCH v2 2/2] PCI: qcom: Remove the custom ASPM enablement code | On 26/02/2026 11:16, Manivannan Sadhasivam wrote:
...
For Tegra, we enter a deep low power state known as SC7 on suspend which
does involve firmware. Nonetheless I tried for fun, but this breaks
suspend completely.
Jon
--
nvpublic | {
"author": "Jon Hunter <jonathanh@nvidia.com>",
"date": "Thu, 26 Feb 2026 16:52:57 +0000",
"is_openbsd": false,
"thread_id": "26ad62ff-4972-4b29-8f9e-1868cd20ee00@nvidia.com.mbox.gz"
} |
lkml_critique | linux-pci | From: Manivannan Sadhasivam <manivannan.sadhasivam@oss.qualcomm.com>
Since the PCI subsystem has started enabling all ASPM states for all
devicetree based platforms, the ASPM enablement code from this driver can
now be dropped.
Signed-off-by: Manivannan Sadhasivam <manivannan.sadhasivam@oss.qualcomm.com>
Link: https:... | null | null | null | [PATCH v2 2/2] PCI: qcom: Remove the custom ASPM enablement code | On 26/02/2026 11:08, Manivannan Sadhasivam wrote:
...
Thanks. By default we are building the PCIe driver for Tegra as a module
and so I am not sure we can use DECLARE_PCI_FIXUP_EARLY() right?
I was just thinking that in pcie_aspm_override_default_link_state() we
just need a callback to specify the default ASPM ov... | {
"author": "Jon Hunter <jonathanh@nvidia.com>",
"date": "Thu, 26 Feb 2026 16:55:34 +0000",
"is_openbsd": false,
"thread_id": "26ad62ff-4972-4b29-8f9e-1868cd20ee00@nvidia.com.mbox.gz"
} |
lkml_critique | linux-pci | Looks related to:
https://bugzilla.kernel.org/show_bug.cgi?id=221130
https://bugzilla.kernel.org/show_bug.cgi?id=221136
>From https://bugzilla.kernel.org/show_bug.cgi?id=221137:
> 1. Overview On Intel Arrow Lake-S (ARL-S) platforms, the VMD driver
> fails to initialize the PCH-side controller (ID: 8086:09ab), cau... | null | null | null | [Bug 221137] New: [BUG] PCI: vmd: Missing Mode 3 (Dynamic Bus
Offset) support for Intel Arrow Lake-S (0x09ab) | From: "Lin Mohan" <beilingyu65@gmail.com>
On Wed, Feb 25, 2026 at 23:56 Bjorn Helgaas wrote:
Hi Bjorn,
Apologies for the multiple reports. This is my first time reporting
a bug to the kernel, and I am still getting familiar with the
process. Please consider Bug 221137 [1] as the final and formal
report; the others c... | {
"author": "Lin Mohan <beilingyu65@gmail.com>",
"date": "Fri, 27 Feb 2026 09:20:39 +0800",
"is_openbsd": false,
"thread_id": "20260227012039.85131-1-linmhwork@outlook.com.mbox.gz"
} |
lkml_critique | linux-pci | Root Complex Integrated Endpoint devices (PCI_EXP_TYPE_RC_END) are
directly integrated into the root complex and do not have an
associated Root Port in the traditional PCIe hierarchy. The current
TPH implementation incorrectly attempts to find and check a Root Port's
TPH completer capability for these devices.
Add a c... | null | null | null | [PATCH V2 RESEND] PCI/TPH: Skip Root Port completer check for RC_END devices | [+cc TPH authors that were missed in the previous mail]
On 09-Jan-26 10:59 AM, George Abraham P wrote: | {
"author": "George Abraham P <george.abraham.p@intel.com>",
"date": "Wed, 18 Feb 2026 10:24:28 +0530",
"is_openbsd": false,
"thread_id": "aaFC0pJDq5JW_ZAy@weiserver.mbox.gz"
} |
lkml_critique | linux-pci | Root Complex Integrated Endpoint devices (PCI_EXP_TYPE_RC_END) are
directly integrated into the root complex and do not have an
associated Root Port in the traditional PCIe hierarchy. The current
TPH implementation incorrectly attempts to find and check a Root Port's
TPH completer capability for these devices.
Add a c... | null | null | null | [PATCH V2 RESEND] PCI/TPH: Skip Root Port completer check for RC_END devices | On Wed, Feb 18, 2026 at 10:24:28AM +0530, George Abraham P wrote:
I do not have a strong preference; I am fine with adding a Fixes tag or
leaving it out. Up to commit 2961f841b025, pcie_enable_tph() is called
in two drivers: bnxt and mlx5. Which of these devices is the RC_END
device?
Thanks | {
"author": "Leon Romanovsky <leon@kernel.org>",
"date": "Wed, 18 Feb 2026 10:42:54 +0200",
"is_openbsd": false,
"thread_id": "aaFC0pJDq5JW_ZAy@weiserver.mbox.gz"
} |
lkml_critique | linux-pci | Root Complex Integrated Endpoint devices (PCI_EXP_TYPE_RC_END) are
directly integrated into the root complex and do not have an
associated Root Port in the traditional PCIe hierarchy. The current
TPH implementation incorrectly attempts to find and check a Root Port's
TPH completer capability for these devices.
Add a c... | null | null | null | [PATCH V2 RESEND] PCI/TPH: Skip Root Port completer check for RC_END devices | Hi Leon,
On 18-Feb-26 2:12 PM, Leon Romanovsky wrote:
qat_6xxx supports TPH and is a RC_END device. The patches to enable TPH on qat_6xxx is yet to be reviewed. However, it requires this fix for the same to work.
Thanks,
George | {
"author": "George Abraham P <george.abraham.p@intel.com>",
"date": "Wed, 18 Feb 2026 21:00:59 +0530",
"is_openbsd": false,
"thread_id": "aaFC0pJDq5JW_ZAy@weiserver.mbox.gz"
} |
lkml_critique | linux-pci | Root Complex Integrated Endpoint devices (PCI_EXP_TYPE_RC_END) are
directly integrated into the root complex and do not have an
associated Root Port in the traditional PCIe hierarchy. The current
TPH implementation incorrectly attempts to find and check a Root Port's
TPH completer capability for these devices.
Add a c... | null | null | null | [PATCH V2 RESEND] PCI/TPH: Skip Root Port completer check for RC_END devices | On Fri, Jan 09, 2026 at 10:59:23AM +0530, George Abraham P wrote:
Applied to pci/enumeration with the following commit log for v7.1,
thanks! This will be rebased after v7.0-rc1.
PCI/TPH: Allow TPH enable for RCiEPs
Previously, pcie_enable_tph() only enabled TLP Processing Hints (TPH) if
both the End... | {
"author": "Bjorn Helgaas <helgaas@kernel.org>",
"date": "Wed, 18 Feb 2026 14:58:58 -0600",
"is_openbsd": false,
"thread_id": "aaFC0pJDq5JW_ZAy@weiserver.mbox.gz"
} |
lkml_critique | linux-pci | Root Complex Integrated Endpoint devices (PCI_EXP_TYPE_RC_END) are
directly integrated into the root complex and do not have an
associated Root Port in the traditional PCIe hierarchy. The current
TPH implementation incorrectly attempts to find and check a Root Port's
TPH completer capability for these devices.
Add a c... | null | null | null | [PATCH V2 RESEND] PCI/TPH: Skip Root Port completer check for RC_END devices | On Wed, Feb 18, 2026 at 09:00:59PM +0530, George Abraham P wrote:
The patche looks fine to me - it shouldn't affect regular PCI Express Endpoint (type 0000b) devices. | {
"author": "Wei Huang <wei.huang2@amd.com>",
"date": "Fri, 27 Feb 2026 01:08:02 -0600",
"is_openbsd": false,
"thread_id": "aaFC0pJDq5JW_ZAy@weiserver.mbox.gz"
} |
lkml_critique | linux-pci | pci_epf_make() overwrites the actual error returned by
pci_epf_create() with -EINVAL, which hides the real failure
reason. Use PTR_ERR(epf) instead and print the error code.
Signed-off-by: Alok Tiwari <alok.a.tiwari@oracle.com>
---
drivers/pci/endpoint/pci-ep-cfs.c | 4 ++--
1 file changed, 2 insertions(+), 2 deletio... | null | null | null | [PATCH] PCI: endpoint: Propagate error from pci_epf_create() | On Thu, Feb 26, 2026 at 07:06:53PM -0800, Alok Tiwari wrote:
Unrelated to *this* patch, but messages like this that claim to be
about a device, but don't mention any related device, e.g., with
pci_err(), seem dubious to me. I don't think users can really do
anything useful with a message like this. There's no obviou... | {
"author": "Bjorn Helgaas <helgaas@kernel.org>",
"date": "Fri, 27 Feb 2026 11:06:20 -0600",
"is_openbsd": false,
"thread_id": "20260227170620.GA3898635@bhelgaas.mbox.gz"
} |
lkml_critique | linux-pci | Discard Vendor:Device ID matching in the PCIe failed link retraining
quirk and ignore the link status for the removal of the 2.5GT/s speed
clamp, whether applied by the quirk itself or the firmware earlier on.
Revert to the original target link speed if this final link retraining
has failed.
This is so that link ... | null | null | null | [PATCH] PCI: Always lift 2.5GT/s restriction in PCIe failed link
retraining | On Mon, 1 Dec 2025, Maciej W. Rozycki wrote:
I'm trying to recall, if there was some particular reason why
->supported_speeds couldn't be used in this function. It would avoid the
need to read LinkCap at all.
return 0;
--
i. | {
"author": "=?UTF-8?q?Ilpo=20J=C3=A4rvinen?= <ilpo.jarvinen@linux.intel.com>",
"date": "Mon, 1 Dec 2025 11:45:28 +0200 (EET)",
"is_openbsd": false,
"thread_id": "alpine.DEB.2.21.2602252156250.34294@angie.orcam.me.uk.mbox.gz"
} |
lkml_critique | linux-pci | Discard Vendor:Device ID matching in the PCIe failed link retraining
quirk and ignore the link status for the removal of the 2.5GT/s speed
clamp, whether applied by the quirk itself or the firmware earlier on.
Revert to the original target link speed if this final link retraining
has failed.
This is so that link ... | null | null | null | [PATCH] PCI: Always lift 2.5GT/s restriction in PCIe failed link
retraining | On Mon, 1 Dec 2025, Ilpo Järvinen wrote:
Thanks for the hint. There's probably none and it's just me missing some
of the zillion bits and pieces. I'll wait a couple of days for any other
people to chime in and respin with this update included if everyone is
otherwise happy to proceed with this update.
It can... | {
"author": "\"Maciej W. Rozycki\" <macro@orcam.me.uk>",
"date": "Mon, 1 Dec 2025 13:55:29 +0000 (GMT)",
"is_openbsd": false,
"thread_id": "alpine.DEB.2.21.2602252156250.34294@angie.orcam.me.uk.mbox.gz"
} |
lkml_critique | linux-pci | Discard Vendor:Device ID matching in the PCIe failed link retraining
quirk and ignore the link status for the removal of the 2.5GT/s speed
clamp, whether applied by the quirk itself or the firmware earlier on.
Revert to the original target link speed if this final link retraining
has failed.
This is so that link ... | null | null | null | [PATCH] PCI: Always lift 2.5GT/s restriction in PCIe failed link
retraining | On Mon, 1 Dec 2025, Maciej W. Rozycki wrote:
I think it's fine as is, I just didn't review with enough context to
notice what it was initialized to (the usual thing when adding a
rollback path is to forget to change the normal path to return 0, thus
"auto commenting" it without checking enough, I'm sorry about tha... | {
"author": "=?UTF-8?q?Ilpo=20J=C3=A4rvinen?= <ilpo.jarvinen@linux.intel.com>",
"date": "Mon, 1 Dec 2025 18:48:45 +0200 (EET)",
"is_openbsd": false,
"thread_id": "alpine.DEB.2.21.2602252156250.34294@angie.orcam.me.uk.mbox.gz"
} |
lkml_critique | linux-pci | Discard Vendor:Device ID matching in the PCIe failed link retraining
quirk and ignore the link status for the removal of the 2.5GT/s speed
clamp, whether applied by the quirk itself or the firmware earlier on.
Revert to the original target link speed if this final link retraining
has failed.
This is so that link ... | null | null | null | [PATCH] PCI: Always lift 2.5GT/s restriction in PCIe failed link
retraining | I'm sorry my last response kind of messed up the threading in this chain...
I don't understand why we still think its a good idea to have this action
in the kernel for any device type since it seems to only help Maciej W. Rozycki's
specific situation which is very likely to be the only one of its kind. In
addition the... | {
"author": "Matthew W Carlis <mattc@purestorage.com>",
"date": "Thu, 4 Dec 2025 11:30:36 -0700",
"is_openbsd": false,
"thread_id": "alpine.DEB.2.21.2602252156250.34294@angie.orcam.me.uk.mbox.gz"
} |
lkml_critique | linux-pci | Discard Vendor:Device ID matching in the PCIe failed link retraining
quirk and ignore the link status for the removal of the 2.5GT/s speed
clamp, whether applied by the quirk itself or the firmware earlier on.
Revert to the original target link speed if this final link retraining
has failed.
This is so that link ... | null | null | null | [PATCH] PCI: Always lift 2.5GT/s restriction in PCIe failed link
retraining | Hi,
I've figured out that backporting will be less intrusive if an update to
use `->supported_speeds' is posted as a separate follow-up change. So it
is now 2/3 in this series, after 1/3 comprising the original patch, only
trivially updated. Then 3/3 moves the maximum link speed determination
earlier on for an ... | {
"author": "\"Maciej W. Rozycki\" <macro@orcam.me.uk>",
"date": "Mon, 8 Dec 2025 19:24:23 +0000 (GMT)",
"is_openbsd": false,
"thread_id": "alpine.DEB.2.21.2602252156250.34294@angie.orcam.me.uk.mbox.gz"
} |
lkml_critique | linux-pci | Discard Vendor:Device ID matching in the PCIe failed link retraining
quirk and ignore the link status for the removal of the 2.5GT/s speed
clamp, whether applied by the quirk itself or the firmware earlier on.
Revert to the original target link speed if this final link retraining
has failed.
This is so that link ... | null | null | null | [PATCH] PCI: Always lift 2.5GT/s restriction in PCIe failed link
retraining | Rewrite a check for the maximum link speed in the Link Capabilities
register in terms of pcie_get_speed_cap(). No functional change.
Signed-off-by: Maciej W. Rozycki <macro@orcam.me.uk>
---
drivers/pci/quirks.c | 8 ++++----
1 file changed, 4 insertions(+), 4 deletions(-)
linux-pcie-failed-link-retrain-get-spee... | {
"author": "\"Maciej W. Rozycki\" <macro@orcam.me.uk>",
"date": "Mon, 8 Dec 2025 19:24:34 +0000 (GMT)",
"is_openbsd": false,
"thread_id": "alpine.DEB.2.21.2602252156250.34294@angie.orcam.me.uk.mbox.gz"
} |
lkml_critique | linux-pci | Discard Vendor:Device ID matching in the PCIe failed link retraining
quirk and ignore the link status for the removal of the 2.5GT/s speed
clamp, whether applied by the quirk itself or the firmware earlier on.
Revert to the original target link speed if this final link retraining
has failed.
This is so that link ... | null | null | null | [PATCH] PCI: Always lift 2.5GT/s restriction in PCIe failed link
retraining | Discard Vendor:Device ID matching in the PCIe failed link retraining
quirk and ignore the link status for the removal of the 2.5GT/s speed
clamp, whether applied by the quirk itself or the firmware earlier on.
Revert to the original target link speed if this final link retraining
has failed.
This is so that link ... | {
"author": "\"Maciej W. Rozycki\" <macro@orcam.me.uk>",
"date": "Mon, 8 Dec 2025 19:24:29 +0000 (GMT)",
"is_openbsd": false,
"thread_id": "alpine.DEB.2.21.2602252156250.34294@angie.orcam.me.uk.mbox.gz"
} |
lkml_critique | linux-pci | Discard Vendor:Device ID matching in the PCIe failed link retraining
quirk and ignore the link status for the removal of the 2.5GT/s speed
clamp, whether applied by the quirk itself or the firmware earlier on.
Revert to the original target link speed if this final link retraining
has failed.
This is so that link ... | null | null | null | [PATCH] PCI: Always lift 2.5GT/s restriction in PCIe failed link
retraining | There's no point in retraining a failed 2.5GT/s device at 2.5GT/s, so
just don't and return early. While such devices might be unlikely to
implement Link Active reporting, we need to retrieve the maximum link
speed and use it in a conditional later on anyway, so the early check
comes for free.
Signed-off-by: Maci... | {
"author": "\"Maciej W. Rozycki\" <macro@orcam.me.uk>",
"date": "Mon, 8 Dec 2025 19:24:38 +0000 (GMT)",
"is_openbsd": false,
"thread_id": "alpine.DEB.2.21.2602252156250.34294@angie.orcam.me.uk.mbox.gz"
} |
lkml_critique | linux-pci | Discard Vendor:Device ID matching in the PCIe failed link retraining
quirk and ignore the link status for the removal of the 2.5GT/s speed
clamp, whether applied by the quirk itself or the firmware earlier on.
Revert to the original target link speed if this final link retraining
has failed.
This is so that link ... | null | null | null | [PATCH] PCI: Always lift 2.5GT/s restriction in PCIe failed link
retraining | On Mon, 1 Dec 2025, Maciej W. Rozycki wrote:
I take it no further feedback will be gathered, so I've sent v2 now, but
I've figured out backporting v1 as it is will result in less intrusion to
the trunk commit, so I have only made a change to use `->supported_speeds'
a follow-up patch in a series. Please let me k... | {
"author": "\"Maciej W. Rozycki\" <macro@orcam.me.uk>",
"date": "Mon, 8 Dec 2025 19:24:51 +0000 (GMT)",
"is_openbsd": false,
"thread_id": "alpine.DEB.2.21.2602252156250.34294@angie.orcam.me.uk.mbox.gz"
} |
lkml_critique | linux-pci | Discard Vendor:Device ID matching in the PCIe failed link retraining
quirk and ignore the link status for the removal of the 2.5GT/s speed
clamp, whether applied by the quirk itself or the firmware earlier on.
Revert to the original target link speed if this final link retraining
has failed.
This is so that link ... | null | null | null | [PATCH] PCI: Always lift 2.5GT/s restriction in PCIe failed link
retraining | On Thu, 4 Dec 2025, Matthew W Carlis wrote:
Well, it's an erratum vs another erratum case. Then should such a device
at its maximum link speed trigger the workaround somehow, with this fix in
place any temporary clamp will be lifted anyway and the link retrained, so
it will recover from the link up-down loop. S... | {
"author": "\"Maciej W. Rozycki\" <macro@orcam.me.uk>",
"date": "Mon, 8 Dec 2025 19:25:26 +0000 (GMT)",
"is_openbsd": false,
"thread_id": "alpine.DEB.2.21.2602252156250.34294@angie.orcam.me.uk.mbox.gz"
} |
lkml_critique | linux-pci | Discard Vendor:Device ID matching in the PCIe failed link retraining
quirk and ignore the link status for the removal of the 2.5GT/s speed
clamp, whether applied by the quirk itself or the firmware earlier on.
Revert to the original target link speed if this final link retraining
has failed.
This is so that link ... | null | null | null | [PATCH] PCI: Always lift 2.5GT/s restriction in PCIe failed link
retraining | On Mon, 8 Dec 2025, Maciej W. Rozycki wrote:
Ping for:
<https://lore.kernel.org/r/alpine.DEB.2.21.2512072345220.49654@angie.orcam.me.uk/>.
Re-verified with 6.19.0-rc7.
Maciej | {
"author": "\"Maciej W. Rozycki\" <macro@orcam.me.uk>",
"date": "Wed, 4 Feb 2026 17:12:43 +0000 (GMT)",
"is_openbsd": false,
"thread_id": "alpine.DEB.2.21.2602252156250.34294@angie.orcam.me.uk.mbox.gz"
} |
lkml_critique | linux-pci | Discard Vendor:Device ID matching in the PCIe failed link retraining
quirk and ignore the link status for the removal of the 2.5GT/s speed
clamp, whether applied by the quirk itself or the firmware earlier on.
Revert to the original target link speed if this final link retraining
has failed.
This is so that link ... | null | null | null | [PATCH] PCI: Always lift 2.5GT/s restriction in PCIe failed link
retraining | On 12/9/2025 12:54 AM, Maciej W. Rozycki wrote:
Tested-by: Alok Tiwari <alok.a.tiwari@oracle.com>
Tested with LTS 6.18.
Thanks,
Alok | {
"author": "ALOK TIWARI <alok.a.tiwari@oracle.com>",
"date": "Thu, 5 Feb 2026 16:27:56 +0530",
"is_openbsd": false,
"thread_id": "alpine.DEB.2.21.2602252156250.34294@angie.orcam.me.uk.mbox.gz"
} |
lkml_critique | linux-pci | Discard Vendor:Device ID matching in the PCIe failed link retraining
quirk and ignore the link status for the removal of the 2.5GT/s speed
clamp, whether applied by the quirk itself or the firmware earlier on.
Revert to the original target link speed if this final link retraining
has failed.
This is so that link ... | null | null | null | [PATCH] PCI: Always lift 2.5GT/s restriction in PCIe failed link
retraining | On 2/4/2026 10:42 PM, Maciej W. Rozycki wrote:
We’re waiting on this patch. Are there any updates or plans for it?
Thanks,
Alok | {
"author": "ALOK TIWARI <alok.a.tiwari@oracle.com>",
"date": "Thu, 19 Feb 2026 09:12:05 +0530",
"is_openbsd": false,
"thread_id": "alpine.DEB.2.21.2602252156250.34294@angie.orcam.me.uk.mbox.gz"
} |
lkml_critique | linux-pci | Discard Vendor:Device ID matching in the PCIe failed link retraining
quirk and ignore the link status for the removal of the 2.5GT/s speed
clamp, whether applied by the quirk itself or the firmware earlier on.
Revert to the original target link speed if this final link retraining
has failed.
This is so that link ... | null | null | null | [PATCH] PCI: Always lift 2.5GT/s restriction in PCIe failed link
retraining | On Mon, Dec 08, 2025 at 07:24:23PM +0000, Maciej W. Rozycki wrote:
Applied to pci/enumeration for v7.1, thanks. This will be rebased
after v7.0-rc1. | {
"author": "Bjorn Helgaas <helgaas@kernel.org>",
"date": "Thu, 19 Feb 2026 15:26:02 -0600",
"is_openbsd": false,
"thread_id": "alpine.DEB.2.21.2602252156250.34294@angie.orcam.me.uk.mbox.gz"
} |
lkml_critique | linux-pci | Discard Vendor:Device ID matching in the PCIe failed link retraining
quirk and ignore the link status for the removal of the 2.5GT/s speed
clamp, whether applied by the quirk itself or the firmware earlier on.
Revert to the original target link speed if this final link retraining
has failed.
This is so that link ... | null | null | null | [PATCH] PCI: Always lift 2.5GT/s restriction in PCIe failed link
retraining | On Thu, 19 Feb 2026, Bjorn Helgaas wrote:
We're heading down a path here where we keep working around the work-around &
now have decided that the kernel will be meddling with the link on potentially
all of the PCIe devices in the world. The trade off that we're making here to
accommodate a device specific interaction... | {
"author": "Matthew W Carlis <mattc@purestorage.com>",
"date": "Thu, 19 Feb 2026 15:09:59 -0700",
"is_openbsd": false,
"thread_id": "alpine.DEB.2.21.2602252156250.34294@angie.orcam.me.uk.mbox.gz"
} |
lkml_critique | linux-pci | Discard Vendor:Device ID matching in the PCIe failed link retraining
quirk and ignore the link status for the removal of the 2.5GT/s speed
clamp, whether applied by the quirk itself or the firmware earlier on.
Revert to the original target link speed if this final link retraining
has failed.
This is so that link ... | null | null | null | [PATCH] PCI: Always lift 2.5GT/s restriction in PCIe failed link
retraining | On Thu, Feb 19, 2026 at 03:09:59PM -0700, Matthew W Carlis wrote:
I think we already at least potentially meddle with the link on every
device, and it definitely makes me nervous. I would like it much
better if it's possible to limit it to devices with known defects.
I'll defer these for now and we can see if a cons... | {
"author": "Bjorn Helgaas <helgaas@kernel.org>",
"date": "Thu, 19 Feb 2026 16:53:22 -0600",
"is_openbsd": false,
"thread_id": "alpine.DEB.2.21.2602252156250.34294@angie.orcam.me.uk.mbox.gz"
} |
lkml_critique | linux-pci | Discard Vendor:Device ID matching in the PCIe failed link retraining
quirk and ignore the link status for the removal of the 2.5GT/s speed
clamp, whether applied by the quirk itself or the firmware earlier on.
Revert to the original target link speed if this final link retraining
has failed.
This is so that link ... | null | null | null | [PATCH] PCI: Always lift 2.5GT/s restriction in PCIe failed link
retraining | On Thu, 19 Feb 2026, Bjorn Helgaas wrote:
As I say it's logically impossible to figure out whether or not to apply
such a workaround where the culprit is the downstream device, because
until you've succeeded establishing a link you have no way to figure out
what the downstream device actually is.
Maciej | {
"author": "\"Maciej W. Rozycki\" <macro@orcam.me.uk>",
"date": "Fri, 20 Feb 2026 12:03:17 +0000 (GMT)",
"is_openbsd": false,
"thread_id": "alpine.DEB.2.21.2602252156250.34294@angie.orcam.me.uk.mbox.gz"
} |
lkml_critique | linux-pci | Discard Vendor:Device ID matching in the PCIe failed link retraining
quirk and ignore the link status for the removal of the 2.5GT/s speed
clamp, whether applied by the quirk itself or the firmware earlier on.
Revert to the original target link speed if this final link retraining
has failed.
This is so that link ... | null | null | null | [PATCH] PCI: Always lift 2.5GT/s restriction in PCIe failed link
retraining | On Fri, Feb 20, 2026 at 12:03:17PM +0000, Maciej W. Rozycki wrote:
IIUC Matthew [1] and Alok [2] have reported issues that only happen
when we run pcie_failed_link_retrain(). The issues seem to be with
NVMe devices, but I don't see a root cause or a solution (other than
skipping pcie_failed_link_retrain()).
[1] http... | {
"author": "Bjorn Helgaas <helgaas@kernel.org>",
"date": "Mon, 23 Feb 2026 11:36:03 -0600",
"is_openbsd": false,
"thread_id": "alpine.DEB.2.21.2602252156250.34294@angie.orcam.me.uk.mbox.gz"
} |
lkml_critique | linux-pci | Discard Vendor:Device ID matching in the PCIe failed link retraining
quirk and ignore the link status for the removal of the 2.5GT/s speed
clamp, whether applied by the quirk itself or the firmware earlier on.
Revert to the original target link speed if this final link retraining
has failed.
This is so that link ... | null | null | null | [PATCH] PCI: Always lift 2.5GT/s restriction in PCIe failed link
retraining | I wonder if the compromise here isn't adding a new kind of
DECLARE_PCI_FIXUP_<LINKFAIL?> & putting this quirk behind it?
On Thu, 19 Feb 2026 16:53:22 -0600, Bjorn Helgaas wrote:
On Fri, 20 Feb 2026 12:03:17 +0000, Maciej W. Rozycki wrote:
I don't think we're looking at an impossible decision to make here in terms
o... | {
"author": "Matthew W Carlis <mattc@purestorage.com>",
"date": "Mon, 23 Feb 2026 15:49:49 -0700",
"is_openbsd": false,
"thread_id": "alpine.DEB.2.21.2602252156250.34294@angie.orcam.me.uk.mbox.gz"
} |
lkml_critique | linux-pci | Discard Vendor:Device ID matching in the PCIe failed link retraining
quirk and ignore the link status for the removal of the 2.5GT/s speed
clamp, whether applied by the quirk itself or the firmware earlier on.
Revert to the original target link speed if this final link retraining
has failed.
This is so that link ... | null | null | null | [PATCH] PCI: Always lift 2.5GT/s restriction in PCIe failed link
retraining | On Mon, 23 Feb 2026, Bjorn Helgaas wrote:
I argue that by applying this change the issues with NVMe hot-plug will
be sorted while keeping the configuration working that
pcie_failed_link_retrain() is needed for. Win-win.
I note that active links are unaffected, so to say it's meddling with the
link on every dev... | {
"author": "\"Maciej W. Rozycki\" <macro@orcam.me.uk>",
"date": "Mon, 23 Feb 2026 23:14:37 +0000 (GMT)",
"is_openbsd": false,
"thread_id": "alpine.DEB.2.21.2602252156250.34294@angie.orcam.me.uk.mbox.gz"
} |
lkml_critique | linux-pci | Discard Vendor:Device ID matching in the PCIe failed link retraining
quirk and ignore the link status for the removal of the 2.5GT/s speed
clamp, whether applied by the quirk itself or the firmware earlier on.
Revert to the original target link speed if this final link retraining
has failed.
This is so that link ... | null | null | null | [PATCH] PCI: Always lift 2.5GT/s restriction in PCIe failed link
retraining | On Mon, 23 Feb 2026 23:14:37 +0000, Maciej W. Rozycki wrote:
I don't think that what you are saying is true there is invariably going to be
some other consequence of this change.. Its hard to believe there can be any
changes to the pci drivers that won't break something.
There is no discrimination about which device... | {
"author": "Matthew W Carlis <mattc@purestorage.com>",
"date": "Tue, 24 Feb 2026 18:41:19 -0700",
"is_openbsd": false,
"thread_id": "alpine.DEB.2.21.2602252156250.34294@angie.orcam.me.uk.mbox.gz"
} |
lkml_critique | linux-pci | Discard Vendor:Device ID matching in the PCIe failed link retraining
quirk and ignore the link status for the removal of the 2.5GT/s speed
clamp, whether applied by the quirk itself or the firmware earlier on.
Revert to the original target link speed if this final link retraining
has failed.
This is so that link ... | null | null | null | [PATCH] PCI: Always lift 2.5GT/s restriction in PCIe failed link
retraining | On Tue, 24 Feb 2026, Matthew W Carlis wrote:
You're being sarcastic, aren't you?
While I sympathise with your feeling, may I pretty please ask you to at
the very least give my fix a try in your test environment?
No reports that I know of. Please bear in mind that the failure mode is
such that you need enough... | {
"author": "\"Maciej W. Rozycki\" <macro@orcam.me.uk>",
"date": "Thu, 26 Feb 2026 22:02:24 +0000 (GMT)",
"is_openbsd": false,
"thread_id": "alpine.DEB.2.21.2602252156250.34294@angie.orcam.me.uk.mbox.gz"
} |
lkml_critique | linux-pci | This series can be found on GitHub:
https://github.com/dmatlack/linux/tree/liveupdate/vfio/cdev/v2
This series adds the base support to preserve a VFIO device file across
a Live Update. "Base support" means that this allows userspace to
safely preserve a VFIO device file with LIVEUPDATE_SESSION_PRESERVE_FD
and retr... | null | null | null | [PATCH v2 00/22] vfio/pci: Base Live Update support for VFIO device files | On Fri, 27 Feb 2026 09:07:48 -0800
David Matlack <dmatlack@google.com> wrote:
Sorry if I don't have the whole model in my head yet, but is exposing
the restriction to the vfio user of the device sufficient to manage the
liveupdate orchestration? For example, a VFIO_DEVICE_INFO_CAP pushes
the knowledge to QEMU... wha... | {
"author": "Alex Williamson <alex@shazbot.org>",
"date": "Fri, 27 Feb 2026 10:57:20 -0700",
"is_openbsd": false,
"thread_id": "20260227105720.522ca97f@shazbot.org.mbox.gz"
} |
source | linux | 80211/cfg80211 driver-api/80211/cfg80211
80211/index driver-api/80211/index
80211/introduction driver-api/80211/introduction
80211/mac80211 driver-api/80211/mac80211
80211/mac80211-advanced driver-api/80211/mac80211-advanced
EDID/howto admin-guide/edid
PCI/picebus-howto PCI/pciebus-howto
RAS/address-translation admin-g... | Documentation/.renames.txt | null | null | null | null | null |
source | linux | =============
Atomic bitops
=============
While our bitmap_{}() functions are non-atomic, we have a number of operations
operating on single bits in a bitmap that are atomic.
API
---
The single bit operations are:
Non-RMW ops:
test_bit()
RMW atomic operations without return value:
{set,clear,change}_bit()
... | Documentation/atomic_bitops.txt | null | null | null | null | null |
source | linux | On atomic types (atomic_t atomic64_t and atomic_long_t).
The atomic type provides an interface to the architecture's means of atomic
RMW operations between CPUs (atomic operations on MMIO are not supported and
can lead to fatal traps on some platforms).
API
---
The 'full' API consists of (atomic64_ and atomic_long_ ... | Documentation/atomic_t.txt | null | null | null | null | null |
source | linux | .. SPDX-License-Identifier: GPL-2.0
.. _linux_doc:
==============================
The Linux Kernel documentation
==============================
This is the top level of the kernel's documentation tree. Kernel
documentation, like the kernel itself, is very much a work in progress;
that is especially true as we work ... | Documentation/index.rst | null | null | null | null | null |
source | linux | ============================
LINUX KERNEL MEMORY BARRIERS
============================
By: David Howells <dhowells@redhat.com>
Paul E. McKenney <paulmck@linux.ibm.com>
Will Deacon <will.deacon@arm.com>
Peter Zijlstra <peterz@infradead.org>
==========
DISCLAIMER
==========
This document is not a s... | Documentation/memory-barriers.txt | null | null | null | null | null |
source | linux | .. SPDX-License-Identifier: GPL-2.0
==============================
Kernel subsystem documentation
==============================
These books get into the details of how specific kernel subsystems work
from the point of view of a kernel developer. Much of the information here
is taken directly from the kernel source,... | Documentation/subsystem-apis.rst | null | null | null | null | null |
source | linux | .. SPDX-License-Identifier: GPL-2.0
========================================
ACPI considerations for PCI host bridges
========================================
The general rule is that the ACPI namespace should describe everything the
OS might use unless there's another way for the OS to find it [1, 2].
For example, ... | Documentation/PCI/acpi-info.rst | null | null | null | null | null |
source | linux | .. SPDX-License-Identifier: GPL-2.0
===============
Boot Interrupts
===============
:Author: - Sean V Kelley <sean.v.kelley@linux.intel.com>
Overview
========
On PCI Express, interrupts are represented with either MSI or inbound
interrupt messages (Assert_INTx/Deassert_INTx). The integrated IO-APIC in a
given Core ... | Documentation/PCI/boot-interrupts.rst | null | null | null | null | null |
source | linux | .. SPDX-License-Identifier: GPL-2.0
=================
PCI Bus Subsystem
=================
.. toctree::
:maxdepth: 2
:numbered:
pci
pciebus-howto
pci-iov-howto
msi-howto
sysfs-pci
acpi-info
pci-error-recovery
pcieaer-howto
endpoint/index
controller/index
boot-interrupts
tph | Documentation/PCI/index.rst | null | null | null | null | null |
source | linux | .. SPDX-License-Identifier: GPL-2.0
.. include:: <isonum.txt>
==========================
The MSI Driver Guide HOWTO
==========================
:Authors: Tom L Nguyen; Martine Silbermann; Matthew Wilcox
:Copyright: 2003, 2008 Intel Corporation
About this guide
================
This guide describes the basics of Mes... | Documentation/PCI/msi-howto.rst | null | null | null | null | null |
source | linux | .. SPDX-License-Identifier: GPL-2.0
==================
PCI Error Recovery
==================
:Authors: - Linas Vepstas <linasvepstas@gmail.com>
- Richard Lary <rlary@us.ibm.com>
- Mike Mason <mmlnx@us.ibm.com>
Many PCI bus controllers are able to detect a variety of hardware
PCI errors on the b... | Documentation/PCI/pci-error-recovery.rst | null | null | null | null | null |
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