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LIBRARY ieee;
USE ieee.std_logic_1164.all;
USE ieee.std_logic_unsigned.all;
USE ieee.std_logic_arith.all;
--***************************************************
--*** ***
--*** FLOATING POINT CORE LIBRARY ***
--*** ***
--*** DP_LNLUTPOW.VHD ***
--*** ***
--*** Function: Look Up Table - LN() ***
--*** ***
--*** Generated by MATLAB Utility ***
--*** ***
--*** 18/02/08 ML ***
--*** ***
--*** (c) 2008 Altera Corporation ***
--*** ***
--*** Change History ***
--*** ***
--*** ***
--*** ***
--*** ***
--*** ***
--***************************************************
ENTITY dp_lnlutpow IS
PORT (
add : IN STD_LOGIC_VECTOR (10 DOWNTO 1);
logman : OUT STD_LOGIC_VECTOR (52 DOWNTO 1);
logexp : OUT STD_LOGIC_VECTOR (11 DOWNTO 1)
);
END dp_lnlutpow;
ARCHITECTURE rtl OF dp_lnlutpow IS
BEGIN
pca: PROCESS (add)
BEGIN
CASE add IS
WHEN "0000000000" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(0,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(0,28);
logexp <= conv_std_logic_vector(0,11);
WHEN "0000000001" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(6480943,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(251279855,28);
logexp <= conv_std_logic_vector(1022,11);
WHEN "0000000010" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(6480943,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(251279855,28);
logexp <= conv_std_logic_vector(1023,11);
WHEN "0000000011" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(666403,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(255568755,28);
logexp <= conv_std_logic_vector(1024,11);
WHEN "0000000100" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(6480943,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(251279855,28);
logexp <= conv_std_logic_vector(1024,11);
WHEN "0000000101" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(12295483,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(246990955,28);
logexp <= conv_std_logic_vector(1024,11);
WHEN "0000000110" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(666403,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(255568755,28);
logexp <= conv_std_logic_vector(1025,11);
WHEN "0000000111" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(3573673,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(253424305,28);
logexp <= conv_std_logic_vector(1025,11);
WHEN "0000001000" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(6480943,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(251279855,28);
logexp <= conv_std_logic_vector(1025,11);
WHEN "0000001001" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(9388213,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(249135405,28);
logexp <= conv_std_logic_vector(1025,11);
WHEN "0000001010" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(12295483,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(246990955,28);
logexp <= conv_std_logic_vector(1025,11);
WHEN "0000001011" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(15202753,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(244846505,28);
logexp <= conv_std_logic_vector(1025,11);
WHEN "0000001100" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(666403,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(255568755,28);
logexp <= conv_std_logic_vector(1026,11);
WHEN "0000001101" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(2120038,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(254496530,28);
logexp <= conv_std_logic_vector(1026,11);
WHEN "0000001110" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(3573673,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(253424305,28);
logexp <= conv_std_logic_vector(1026,11);
WHEN "0000001111" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(5027308,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(252352080,28);
logexp <= conv_std_logic_vector(1026,11);
WHEN "0000010000" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(6480943,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(251279855,28);
logexp <= conv_std_logic_vector(1026,11);
WHEN "0000010001" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(7934578,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(250207630,28);
logexp <= conv_std_logic_vector(1026,11);
WHEN "0000010010" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(9388213,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(249135405,28);
logexp <= conv_std_logic_vector(1026,11);
WHEN "0000010011" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(10841848,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(248063180,28);
logexp <= conv_std_logic_vector(1026,11);
WHEN "0000010100" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(12295483,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(246990955,28);
logexp <= conv_std_logic_vector(1026,11);
WHEN "0000010101" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(13749118,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(245918730,28);
logexp <= conv_std_logic_vector(1026,11);
WHEN "0000010110" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(15202753,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(244846505,28);
logexp <= conv_std_logic_vector(1026,11);
WHEN "0000010111" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(16656388,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(243774280,28);
logexp <= conv_std_logic_vector(1026,11);
WHEN "0000011000" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(666403,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(255568755,28);
logexp <= conv_std_logic_vector(1027,11);
WHEN "0000011001" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(1393221,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(120814915,28);
logexp <= conv_std_logic_vector(1027,11);
WHEN "0000011010" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(2120038,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(254496530,28);
logexp <= conv_std_logic_vector(1027,11);
WHEN "0000011011" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(2846856,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(119742690,28);
logexp <= conv_std_logic_vector(1027,11);
WHEN "0000011100" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(3573673,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(253424305,28);
logexp <= conv_std_logic_vector(1027,11);
WHEN "0000011101" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(4300491,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(118670465,28);
logexp <= conv_std_logic_vector(1027,11);
WHEN "0000011110" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(5027308,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(252352080,28);
logexp <= conv_std_logic_vector(1027,11);
WHEN "0000011111" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(5754126,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(117598240,28);
logexp <= conv_std_logic_vector(1027,11);
WHEN "0000100000" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(6480943,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(251279855,28);
logexp <= conv_std_logic_vector(1027,11);
WHEN "0000100001" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(7207761,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(116526015,28);
logexp <= conv_std_logic_vector(1027,11);
WHEN "0000100010" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(7934578,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(250207630,28);
logexp <= conv_std_logic_vector(1027,11);
WHEN "0000100011" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(8661396,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(115453790,28);
logexp <= conv_std_logic_vector(1027,11);
WHEN "0000100100" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(9388213,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(249135405,28);
logexp <= conv_std_logic_vector(1027,11);
WHEN "0000100101" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(10115031,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(114381565,28);
logexp <= conv_std_logic_vector(1027,11);
WHEN "0000100110" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(10841848,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(248063180,28);
logexp <= conv_std_logic_vector(1027,11);
WHEN "0000100111" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(11568666,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(113309340,28);
logexp <= conv_std_logic_vector(1027,11);
WHEN "0000101000" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(12295483,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(246990955,28);
logexp <= conv_std_logic_vector(1027,11);
WHEN "0000101001" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(13022301,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(112237114,28);
logexp <= conv_std_logic_vector(1027,11);
WHEN "0000101010" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(13749118,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(245918730,28);
logexp <= conv_std_logic_vector(1027,11);
WHEN "0000101011" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(14475936,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(111164889,28);
logexp <= conv_std_logic_vector(1027,11);
WHEN "0000101100" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(15202753,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(244846505,28);
logexp <= conv_std_logic_vector(1027,11);
WHEN "0000101101" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(15929571,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(110092664,28);
logexp <= conv_std_logic_vector(1027,11);
WHEN "0000101110" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(16656388,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(243774280,28);
logexp <= conv_std_logic_vector(1027,11);
WHEN "0000101111" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(302995,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(54510220,28);
logexp <= conv_std_logic_vector(1028,11);
WHEN "0000110000" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(666403,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(255568755,28);
logexp <= conv_std_logic_vector(1028,11);
WHEN "0000110001" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(1029812,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(188191835,28);
logexp <= conv_std_logic_vector(1028,11);
WHEN "0000110010" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(1393221,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(120814915,28);
logexp <= conv_std_logic_vector(1028,11);
WHEN "0000110011" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(1756630,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(53437995,28);
logexp <= conv_std_logic_vector(1028,11);
WHEN "0000110100" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(2120038,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(254496530,28);
logexp <= conv_std_logic_vector(1028,11);
WHEN "0000110101" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(2483447,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(187119610,28);
logexp <= conv_std_logic_vector(1028,11);
WHEN "0000110110" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(2846856,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(119742690,28);
logexp <= conv_std_logic_vector(1028,11);
WHEN "0000110111" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(3210265,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(52365770,28);
logexp <= conv_std_logic_vector(1028,11);
WHEN "0000111000" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(3573673,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(253424305,28);
logexp <= conv_std_logic_vector(1028,11);
WHEN "0000111001" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(3937082,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(186047385,28);
logexp <= conv_std_logic_vector(1028,11);
WHEN "0000111010" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(4300491,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(118670465,28);
logexp <= conv_std_logic_vector(1028,11);
WHEN "0000111011" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(4663900,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(51293545,28);
logexp <= conv_std_logic_vector(1028,11);
WHEN "0000111100" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(5027308,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(252352080,28);
logexp <= conv_std_logic_vector(1028,11);
WHEN "0000111101" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(5390717,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(184975160,28);
logexp <= conv_std_logic_vector(1028,11);
WHEN "0000111110" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(5754126,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(117598240,28);
logexp <= conv_std_logic_vector(1028,11);
WHEN "0000111111" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(6117535,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(50221319,28);
logexp <= conv_std_logic_vector(1028,11);
WHEN "0001000000" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(6480943,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(251279855,28);
logexp <= conv_std_logic_vector(1028,11);
WHEN "0001000001" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(6844352,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(183902935,28);
logexp <= conv_std_logic_vector(1028,11);
WHEN "0001000010" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(7207761,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(116526015,28);
logexp <= conv_std_logic_vector(1028,11);
WHEN "0001000011" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(7571170,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(49149094,28);
logexp <= conv_std_logic_vector(1028,11);
WHEN "0001000100" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(7934578,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(250207630,28);
logexp <= conv_std_logic_vector(1028,11);
WHEN "0001000101" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(8297987,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(182830710,28);
logexp <= conv_std_logic_vector(1028,11);
WHEN "0001000110" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(8661396,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(115453790,28);
logexp <= conv_std_logic_vector(1028,11);
WHEN "0001000111" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(9024805,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(48076869,28);
logexp <= conv_std_logic_vector(1028,11);
WHEN "0001001000" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(9388213,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(249135405,28);
logexp <= conv_std_logic_vector(1028,11);
WHEN "0001001001" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(9751622,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(181758485,28);
logexp <= conv_std_logic_vector(1028,11);
WHEN "0001001010" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(10115031,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(114381565,28);
logexp <= conv_std_logic_vector(1028,11);
WHEN "0001001011" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(10478440,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(47004644,28);
logexp <= conv_std_logic_vector(1028,11);
WHEN "0001001100" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(10841848,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(248063180,28);
logexp <= conv_std_logic_vector(1028,11);
WHEN "0001001101" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(11205257,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(180686260,28);
logexp <= conv_std_logic_vector(1028,11);
WHEN "0001001110" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(11568666,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(113309340,28);
logexp <= conv_std_logic_vector(1028,11);
WHEN "0001001111" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(11932075,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(45932419,28);
logexp <= conv_std_logic_vector(1028,11);
WHEN "0001010000" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(12295483,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(246990955,28);
logexp <= conv_std_logic_vector(1028,11);
WHEN "0001010001" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(12658892,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(179614035,28);
logexp <= conv_std_logic_vector(1028,11);
WHEN "0001010010" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(13022301,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(112237114,28);
logexp <= conv_std_logic_vector(1028,11);
WHEN "0001010011" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(13385710,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(44860194,28);
logexp <= conv_std_logic_vector(1028,11);
WHEN "0001010100" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(13749118,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(245918730,28);
logexp <= conv_std_logic_vector(1028,11);
WHEN "0001010101" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(14112527,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(178541810,28);
logexp <= conv_std_logic_vector(1028,11);
WHEN "0001010110" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(14475936,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(111164889,28);
logexp <= conv_std_logic_vector(1028,11);
WHEN "0001010111" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(14839345,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(43787969,28);
logexp <= conv_std_logic_vector(1028,11);
WHEN "0001011000" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(15202753,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(244846505,28);
logexp <= conv_std_logic_vector(1028,11);
WHEN "0001011001" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(15566162,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(177469585,28);
logexp <= conv_std_logic_vector(1028,11);
WHEN "0001011010" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(15929571,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(110092664,28);
logexp <= conv_std_logic_vector(1028,11);
WHEN "0001011011" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(16292980,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(42715744,28);
logexp <= conv_std_logic_vector(1028,11);
WHEN "0001011100" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(16656388,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(243774280,28);
logexp <= conv_std_logic_vector(1028,11);
WHEN "0001011101" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(121290,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(222416408,28);
logexp <= conv_std_logic_vector(1029,11);
WHEN "0001011110" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(302995,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(54510220,28);
logexp <= conv_std_logic_vector(1029,11);
WHEN "0001011111" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(484699,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(155039488,28);
logexp <= conv_std_logic_vector(1029,11);
WHEN "0001100000" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(666403,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(255568755,28);
logexp <= conv_std_logic_vector(1029,11);
WHEN "0001100001" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(848108,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(87662567,28);
logexp <= conv_std_logic_vector(1029,11);
WHEN "0001100010" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(1029812,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(188191835,28);
logexp <= conv_std_logic_vector(1029,11);
WHEN "0001100011" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(1211517,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(20285647,28);
logexp <= conv_std_logic_vector(1029,11);
WHEN "0001100100" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(1393221,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(120814915,28);
logexp <= conv_std_logic_vector(1029,11);
WHEN "0001100101" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(1574925,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(221344183,28);
logexp <= conv_std_logic_vector(1029,11);
WHEN "0001100110" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(1756630,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(53437995,28);
logexp <= conv_std_logic_vector(1029,11);
WHEN "0001100111" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(1938334,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(153967262,28);
logexp <= conv_std_logic_vector(1029,11);
WHEN "0001101000" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(2120038,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(254496530,28);
logexp <= conv_std_logic_vector(1029,11);
WHEN "0001101001" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(2301743,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(86590342,28);
logexp <= conv_std_logic_vector(1029,11);
WHEN "0001101010" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(2483447,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(187119610,28);
logexp <= conv_std_logic_vector(1029,11);
WHEN "0001101011" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(2665152,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(19213422,28);
logexp <= conv_std_logic_vector(1029,11);
WHEN "0001101100" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(2846856,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(119742690,28);
logexp <= conv_std_logic_vector(1029,11);
WHEN "0001101101" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(3028560,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(220271958,28);
logexp <= conv_std_logic_vector(1029,11);
WHEN "0001101110" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(3210265,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(52365770,28);
logexp <= conv_std_logic_vector(1029,11);
WHEN "0001101111" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(3391969,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(152895037,28);
logexp <= conv_std_logic_vector(1029,11);
WHEN "0001110000" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(3573673,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(253424305,28);
logexp <= conv_std_logic_vector(1029,11);
WHEN "0001110001" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(3755378,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(85518117,28);
logexp <= conv_std_logic_vector(1029,11);
WHEN "0001110010" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(3937082,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(186047385,28);
logexp <= conv_std_logic_vector(1029,11);
WHEN "0001110011" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(4118787,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(18141197,28);
logexp <= conv_std_logic_vector(1029,11);
WHEN "0001110100" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(4300491,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(118670465,28);
logexp <= conv_std_logic_vector(1029,11);
WHEN "0001110101" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(4482195,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(219199733,28);
logexp <= conv_std_logic_vector(1029,11);
WHEN "0001110110" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(4663900,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(51293545,28);
logexp <= conv_std_logic_vector(1029,11);
WHEN "0001110111" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(4845604,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(151822812,28);
logexp <= conv_std_logic_vector(1029,11);
WHEN "0001111000" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(5027308,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(252352080,28);
logexp <= conv_std_logic_vector(1029,11);
WHEN "0001111001" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(5209013,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(84445892,28);
logexp <= conv_std_logic_vector(1029,11);
WHEN "0001111010" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(5390717,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(184975160,28);
logexp <= conv_std_logic_vector(1029,11);
WHEN "0001111011" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(5572422,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(17068972,28);
logexp <= conv_std_logic_vector(1029,11);
WHEN "0001111100" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(5754126,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(117598240,28);
logexp <= conv_std_logic_vector(1029,11);
WHEN "0001111101" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(5935830,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(218127508,28);
logexp <= conv_std_logic_vector(1029,11);
WHEN "0001111110" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(6117535,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(50221319,28);
logexp <= conv_std_logic_vector(1029,11);
WHEN "0001111111" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(6299239,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(150750587,28);
logexp <= conv_std_logic_vector(1029,11);
WHEN "0010000000" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(6480943,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(251279855,28);
logexp <= conv_std_logic_vector(1029,11);
WHEN "0010000001" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(6662648,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(83373667,28);
logexp <= conv_std_logic_vector(1029,11);
WHEN "0010000010" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(6844352,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(183902935,28);
logexp <= conv_std_logic_vector(1029,11);
WHEN "0010000011" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(7026057,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(15996747,28);
logexp <= conv_std_logic_vector(1029,11);
WHEN "0010000100" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(7207761,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(116526015,28);
logexp <= conv_std_logic_vector(1029,11);
WHEN "0010000101" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(7389465,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(217055283,28);
logexp <= conv_std_logic_vector(1029,11);
WHEN "0010000110" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(7571170,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(49149094,28);
logexp <= conv_std_logic_vector(1029,11);
WHEN "0010000111" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(7752874,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(149678362,28);
logexp <= conv_std_logic_vector(1029,11);
WHEN "0010001000" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(7934578,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(250207630,28);
logexp <= conv_std_logic_vector(1029,11);
WHEN "0010001001" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(8116283,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(82301442,28);
logexp <= conv_std_logic_vector(1029,11);
WHEN "0010001010" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(8297987,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(182830710,28);
logexp <= conv_std_logic_vector(1029,11);
WHEN "0010001011" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(8479692,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(14924522,28);
logexp <= conv_std_logic_vector(1029,11);
WHEN "0010001100" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(8661396,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(115453790,28);
logexp <= conv_std_logic_vector(1029,11);
WHEN "0010001101" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(8843100,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(215983058,28);
logexp <= conv_std_logic_vector(1029,11);
WHEN "0010001110" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(9024805,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(48076869,28);
logexp <= conv_std_logic_vector(1029,11);
WHEN "0010001111" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(9206509,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(148606137,28);
logexp <= conv_std_logic_vector(1029,11);
WHEN "0010010000" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(9388213,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(249135405,28);
logexp <= conv_std_logic_vector(1029,11);
WHEN "0010010001" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(9569918,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(81229217,28);
logexp <= conv_std_logic_vector(1029,11);
WHEN "0010010010" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(9751622,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(181758485,28);
logexp <= conv_std_logic_vector(1029,11);
WHEN "0010010011" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(9933327,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(13852297,28);
logexp <= conv_std_logic_vector(1029,11);
WHEN "0010010100" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(10115031,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(114381565,28);
logexp <= conv_std_logic_vector(1029,11);
WHEN "0010010101" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(10296735,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(214910832,28);
logexp <= conv_std_logic_vector(1029,11);
WHEN "0010010110" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(10478440,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(47004644,28);
logexp <= conv_std_logic_vector(1029,11);
WHEN "0010010111" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(10660144,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(147533912,28);
logexp <= conv_std_logic_vector(1029,11);
WHEN "0010011000" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(10841848,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(248063180,28);
logexp <= conv_std_logic_vector(1029,11);
WHEN "0010011001" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(11023553,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(80156992,28);
logexp <= conv_std_logic_vector(1029,11);
WHEN "0010011010" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(11205257,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(180686260,28);
logexp <= conv_std_logic_vector(1029,11);
WHEN "0010011011" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(11386962,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(12780072,28);
logexp <= conv_std_logic_vector(1029,11);
WHEN "0010011100" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(11568666,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(113309340,28);
logexp <= conv_std_logic_vector(1029,11);
WHEN "0010011101" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(11750370,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(213838607,28);
logexp <= conv_std_logic_vector(1029,11);
WHEN "0010011110" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(11932075,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(45932419,28);
logexp <= conv_std_logic_vector(1029,11);
WHEN "0010011111" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(12113779,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(146461687,28);
logexp <= conv_std_logic_vector(1029,11);
WHEN "0010100000" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(12295483,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(246990955,28);
logexp <= conv_std_logic_vector(1029,11);
WHEN "0010100001" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(12477188,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(79084767,28);
logexp <= conv_std_logic_vector(1029,11);
WHEN "0010100010" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(12658892,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(179614035,28);
logexp <= conv_std_logic_vector(1029,11);
WHEN "0010100011" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(12840597,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(11707847,28);
logexp <= conv_std_logic_vector(1029,11);
WHEN "0010100100" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(13022301,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(112237114,28);
logexp <= conv_std_logic_vector(1029,11);
WHEN "0010100101" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(13204005,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(212766382,28);
logexp <= conv_std_logic_vector(1029,11);
WHEN "0010100110" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(13385710,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(44860194,28);
logexp <= conv_std_logic_vector(1029,11);
WHEN "0010100111" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(13567414,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(145389462,28);
logexp <= conv_std_logic_vector(1029,11);
WHEN "0010101000" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(13749118,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(245918730,28);
logexp <= conv_std_logic_vector(1029,11);
WHEN "0010101001" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(13930823,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(78012542,28);
logexp <= conv_std_logic_vector(1029,11);
WHEN "0010101010" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(14112527,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(178541810,28);
logexp <= conv_std_logic_vector(1029,11);
WHEN "0010101011" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(14294232,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(10635622,28);
logexp <= conv_std_logic_vector(1029,11);
WHEN "0010101100" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(14475936,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(111164889,28);
logexp <= conv_std_logic_vector(1029,11);
WHEN "0010101101" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(14657640,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(211694157,28);
logexp <= conv_std_logic_vector(1029,11);
WHEN "0010101110" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(14839345,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(43787969,28);
logexp <= conv_std_logic_vector(1029,11);
WHEN "0010101111" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(15021049,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(144317237,28);
logexp <= conv_std_logic_vector(1029,11);
WHEN "0010110000" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(15202753,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(244846505,28);
logexp <= conv_std_logic_vector(1029,11);
WHEN "0010110001" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(15384458,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(76940317,28);
logexp <= conv_std_logic_vector(1029,11);
WHEN "0010110010" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(15566162,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(177469585,28);
logexp <= conv_std_logic_vector(1029,11);
WHEN "0010110011" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(15747867,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(9563397,28);
logexp <= conv_std_logic_vector(1029,11);
WHEN "0010110100" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(15929571,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(110092664,28);
logexp <= conv_std_logic_vector(1029,11);
WHEN "0010110101" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(16111275,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(210621932,28);
logexp <= conv_std_logic_vector(1029,11);
WHEN "0010110110" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(16292980,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(42715744,28);
logexp <= conv_std_logic_vector(1029,11);
WHEN "0010110111" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(16474684,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(143245012,28);
logexp <= conv_std_logic_vector(1029,11);
WHEN "0010111000" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(16656388,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(243774280,28);
logexp <= conv_std_logic_vector(1029,11);
WHEN "0010111001" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(30438,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(172151774,28);
logexp <= conv_std_logic_vector(1030,11);
WHEN "0010111010" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(121290,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(222416408,28);
logexp <= conv_std_logic_vector(1030,11);
WHEN "0010111011" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(212143,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(4245586,28);
logexp <= conv_std_logic_vector(1030,11);
WHEN "0010111100" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(302995,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(54510220,28);
logexp <= conv_std_logic_vector(1030,11);
WHEN "0010111101" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(393847,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(104774854,28);
logexp <= conv_std_logic_vector(1030,11);
WHEN "0010111110" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(484699,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(155039488,28);
logexp <= conv_std_logic_vector(1030,11);
WHEN "0010111111" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(575551,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(205304121,28);
logexp <= conv_std_logic_vector(1030,11);
WHEN "0011000000" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(666403,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(255568755,28);
logexp <= conv_std_logic_vector(1030,11);
WHEN "0011000001" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(757256,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(37397933,28);
logexp <= conv_std_logic_vector(1030,11);
WHEN "0011000010" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(848108,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(87662567,28);
logexp <= conv_std_logic_vector(1030,11);
WHEN "0011000011" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(938960,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(137927201,28);
logexp <= conv_std_logic_vector(1030,11);
WHEN "0011000100" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(1029812,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(188191835,28);
logexp <= conv_std_logic_vector(1030,11);
WHEN "0011000101" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(1120664,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(238456469,28);
logexp <= conv_std_logic_vector(1030,11);
WHEN "0011000110" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(1211517,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(20285647,28);
logexp <= conv_std_logic_vector(1030,11);
WHEN "0011000111" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(1302369,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(70550281,28);
logexp <= conv_std_logic_vector(1030,11);
WHEN "0011001000" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(1393221,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(120814915,28);
logexp <= conv_std_logic_vector(1030,11);
WHEN "0011001001" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(1484073,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(171079549,28);
logexp <= conv_std_logic_vector(1030,11);
WHEN "0011001010" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(1574925,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(221344183,28);
logexp <= conv_std_logic_vector(1030,11);
WHEN "0011001011" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(1665778,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(3173361,28);
logexp <= conv_std_logic_vector(1030,11);
WHEN "0011001100" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(1756630,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(53437995,28);
logexp <= conv_std_logic_vector(1030,11);
WHEN "0011001101" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(1847482,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(103702629,28);
logexp <= conv_std_logic_vector(1030,11);
WHEN "0011001110" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(1938334,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(153967262,28);
logexp <= conv_std_logic_vector(1030,11);
WHEN "0011001111" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(2029186,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(204231896,28);
logexp <= conv_std_logic_vector(1030,11);
WHEN "0011010000" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(2120038,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(254496530,28);
logexp <= conv_std_logic_vector(1030,11);
WHEN "0011010001" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(2210891,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(36325708,28);
logexp <= conv_std_logic_vector(1030,11);
WHEN "0011010010" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(2301743,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(86590342,28);
logexp <= conv_std_logic_vector(1030,11);
WHEN "0011010011" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(2392595,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(136854976,28);
logexp <= conv_std_logic_vector(1030,11);
WHEN "0011010100" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(2483447,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(187119610,28);
logexp <= conv_std_logic_vector(1030,11);
WHEN "0011010101" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(2574299,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(237384244,28);
logexp <= conv_std_logic_vector(1030,11);
WHEN "0011010110" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(2665152,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(19213422,28);
logexp <= conv_std_logic_vector(1030,11);
WHEN "0011010111" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(2756004,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(69478056,28);
logexp <= conv_std_logic_vector(1030,11);
WHEN "0011011000" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(2846856,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(119742690,28);
logexp <= conv_std_logic_vector(1030,11);
WHEN "0011011001" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(2937708,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(170007324,28);
logexp <= conv_std_logic_vector(1030,11);
WHEN "0011011010" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(3028560,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(220271958,28);
logexp <= conv_std_logic_vector(1030,11);
WHEN "0011011011" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(3119413,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(2101136,28);
logexp <= conv_std_logic_vector(1030,11);
WHEN "0011011100" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(3210265,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(52365770,28);
logexp <= conv_std_logic_vector(1030,11);
WHEN "0011011101" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(3301117,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(102630404,28);
logexp <= conv_std_logic_vector(1030,11);
WHEN "0011011110" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(3391969,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(152895037,28);
logexp <= conv_std_logic_vector(1030,11);
WHEN "0011011111" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(3482821,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(203159671,28);
logexp <= conv_std_logic_vector(1030,11);
WHEN "0011100000" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(3573673,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(253424305,28);
logexp <= conv_std_logic_vector(1030,11);
WHEN "0011100001" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(3664526,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(35253483,28);
logexp <= conv_std_logic_vector(1030,11);
WHEN "0011100010" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(3755378,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(85518117,28);
logexp <= conv_std_logic_vector(1030,11);
WHEN "0011100011" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(3846230,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(135782751,28);
logexp <= conv_std_logic_vector(1030,11);
WHEN "0011100100" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(3937082,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(186047385,28);
logexp <= conv_std_logic_vector(1030,11);
WHEN "0011100101" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(4027934,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(236312019,28);
logexp <= conv_std_logic_vector(1030,11);
WHEN "0011100110" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(4118787,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(18141197,28);
logexp <= conv_std_logic_vector(1030,11);
WHEN "0011100111" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(4209639,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(68405831,28);
logexp <= conv_std_logic_vector(1030,11);
WHEN "0011101000" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(4300491,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(118670465,28);
logexp <= conv_std_logic_vector(1030,11);
WHEN "0011101001" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(4391343,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(168935099,28);
logexp <= conv_std_logic_vector(1030,11);
WHEN "0011101010" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(4482195,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(219199733,28);
logexp <= conv_std_logic_vector(1030,11);
WHEN "0011101011" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(4573048,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(1028911,28);
logexp <= conv_std_logic_vector(1030,11);
WHEN "0011101100" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(4663900,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(51293545,28);
logexp <= conv_std_logic_vector(1030,11);
WHEN "0011101101" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(4754752,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(101558178,28);
logexp <= conv_std_logic_vector(1030,11);
WHEN "0011101110" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(4845604,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(151822812,28);
logexp <= conv_std_logic_vector(1030,11);
WHEN "0011101111" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(4936456,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(202087446,28);
logexp <= conv_std_logic_vector(1030,11);
WHEN "0011110000" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(5027308,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(252352080,28);
logexp <= conv_std_logic_vector(1030,11);
WHEN "0011110001" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(5118161,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(34181258,28);
logexp <= conv_std_logic_vector(1030,11);
WHEN "0011110010" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(5209013,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(84445892,28);
logexp <= conv_std_logic_vector(1030,11);
WHEN "0011110011" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(5299865,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(134710526,28);
logexp <= conv_std_logic_vector(1030,11);
WHEN "0011110100" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(5390717,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(184975160,28);
logexp <= conv_std_logic_vector(1030,11);
WHEN "0011110101" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(5481569,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(235239794,28);
logexp <= conv_std_logic_vector(1030,11);
WHEN "0011110110" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(5572422,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(17068972,28);
logexp <= conv_std_logic_vector(1030,11);
WHEN "0011110111" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(5663274,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(67333606,28);
logexp <= conv_std_logic_vector(1030,11);
WHEN "0011111000" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(5754126,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(117598240,28);
logexp <= conv_std_logic_vector(1030,11);
WHEN "0011111001" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(5844978,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(167862874,28);
logexp <= conv_std_logic_vector(1030,11);
WHEN "0011111010" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(5935830,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(218127508,28);
logexp <= conv_std_logic_vector(1030,11);
WHEN "0011111011" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(6026682,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(268392142,28);
logexp <= conv_std_logic_vector(1030,11);
WHEN "0011111100" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(6117535,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(50221319,28);
logexp <= conv_std_logic_vector(1030,11);
WHEN "0011111101" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(6208387,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(100485953,28);
logexp <= conv_std_logic_vector(1030,11);
WHEN "0011111110" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(6299239,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(150750587,28);
logexp <= conv_std_logic_vector(1030,11);
WHEN "0011111111" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(6390091,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(201015221,28);
logexp <= conv_std_logic_vector(1030,11);
WHEN "0100000000" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(6480943,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(251279855,28);
logexp <= conv_std_logic_vector(1030,11);
WHEN "0100000001" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(6571796,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(33109033,28);
logexp <= conv_std_logic_vector(1030,11);
WHEN "0100000010" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(6662648,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(83373667,28);
logexp <= conv_std_logic_vector(1030,11);
WHEN "0100000011" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(6753500,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(133638301,28);
logexp <= conv_std_logic_vector(1030,11);
WHEN "0100000100" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(6844352,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(183902935,28);
logexp <= conv_std_logic_vector(1030,11);
WHEN "0100000101" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(6935204,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(234167569,28);
logexp <= conv_std_logic_vector(1030,11);
WHEN "0100000110" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(7026057,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(15996747,28);
logexp <= conv_std_logic_vector(1030,11);
WHEN "0100000111" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(7116909,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(66261381,28);
logexp <= conv_std_logic_vector(1030,11);
WHEN "0100001000" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(7207761,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(116526015,28);
logexp <= conv_std_logic_vector(1030,11);
WHEN "0100001001" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(7298613,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(166790649,28);
logexp <= conv_std_logic_vector(1030,11);
WHEN "0100001010" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(7389465,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(217055283,28);
logexp <= conv_std_logic_vector(1030,11);
WHEN "0100001011" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(7480317,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(267319916,28);
logexp <= conv_std_logic_vector(1030,11);
WHEN "0100001100" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(7571170,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(49149094,28);
logexp <= conv_std_logic_vector(1030,11);
WHEN "0100001101" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(7662022,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(99413728,28);
logexp <= conv_std_logic_vector(1030,11);
WHEN "0100001110" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(7752874,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(149678362,28);
logexp <= conv_std_logic_vector(1030,11);
WHEN "0100001111" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(7843726,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(199942996,28);
logexp <= conv_std_logic_vector(1030,11);
WHEN "0100010000" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(7934578,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(250207630,28);
logexp <= conv_std_logic_vector(1030,11);
WHEN "0100010001" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(8025431,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(32036808,28);
logexp <= conv_std_logic_vector(1030,11);
WHEN "0100010010" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(8116283,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(82301442,28);
logexp <= conv_std_logic_vector(1030,11);
WHEN "0100010011" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(8207135,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(132566076,28);
logexp <= conv_std_logic_vector(1030,11);
WHEN "0100010100" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(8297987,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(182830710,28);
logexp <= conv_std_logic_vector(1030,11);
WHEN "0100010101" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(8388839,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(233095344,28);
logexp <= conv_std_logic_vector(1030,11);
WHEN "0100010110" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(8479692,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(14924522,28);
logexp <= conv_std_logic_vector(1030,11);
WHEN "0100010111" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(8570544,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(65189156,28);
logexp <= conv_std_logic_vector(1030,11);
WHEN "0100011000" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(8661396,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(115453790,28);
logexp <= conv_std_logic_vector(1030,11);
WHEN "0100011001" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(8752248,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(165718424,28);
logexp <= conv_std_logic_vector(1030,11);
WHEN "0100011010" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(8843100,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(215983058,28);
logexp <= conv_std_logic_vector(1030,11);
WHEN "0100011011" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(8933952,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(266247691,28);
logexp <= conv_std_logic_vector(1030,11);
WHEN "0100011100" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(9024805,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(48076869,28);
logexp <= conv_std_logic_vector(1030,11);
WHEN "0100011101" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(9115657,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(98341503,28);
logexp <= conv_std_logic_vector(1030,11);
WHEN "0100011110" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(9206509,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(148606137,28);
logexp <= conv_std_logic_vector(1030,11);
WHEN "0100011111" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(9297361,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(198870771,28);
logexp <= conv_std_logic_vector(1030,11);
WHEN "0100100000" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(9388213,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(249135405,28);
logexp <= conv_std_logic_vector(1030,11);
WHEN "0100100001" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(9479066,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(30964583,28);
logexp <= conv_std_logic_vector(1030,11);
WHEN "0100100010" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(9569918,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(81229217,28);
logexp <= conv_std_logic_vector(1030,11);
WHEN "0100100011" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(9660770,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(131493851,28);
logexp <= conv_std_logic_vector(1030,11);
WHEN "0100100100" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(9751622,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(181758485,28);
logexp <= conv_std_logic_vector(1030,11);
WHEN "0100100101" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(9842474,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(232023119,28);
logexp <= conv_std_logic_vector(1030,11);
WHEN "0100100110" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(9933327,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(13852297,28);
logexp <= conv_std_logic_vector(1030,11);
WHEN "0100100111" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(10024179,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(64116931,28);
logexp <= conv_std_logic_vector(1030,11);
WHEN "0100101000" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(10115031,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(114381565,28);
logexp <= conv_std_logic_vector(1030,11);
WHEN "0100101001" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(10205883,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(164646199,28);
logexp <= conv_std_logic_vector(1030,11);
WHEN "0100101010" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(10296735,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(214910832,28);
logexp <= conv_std_logic_vector(1030,11);
WHEN "0100101011" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(10387587,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(265175466,28);
logexp <= conv_std_logic_vector(1030,11);
WHEN "0100101100" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(10478440,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(47004644,28);
logexp <= conv_std_logic_vector(1030,11);
WHEN "0100101101" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(10569292,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(97269278,28);
logexp <= conv_std_logic_vector(1030,11);
WHEN "0100101110" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(10660144,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(147533912,28);
logexp <= conv_std_logic_vector(1030,11);
WHEN "0100101111" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(10750996,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(197798546,28);
logexp <= conv_std_logic_vector(1030,11);
WHEN "0100110000" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(10841848,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(248063180,28);
logexp <= conv_std_logic_vector(1030,11);
WHEN "0100110001" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(10932701,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(29892358,28);
logexp <= conv_std_logic_vector(1030,11);
WHEN "0100110010" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(11023553,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(80156992,28);
logexp <= conv_std_logic_vector(1030,11);
WHEN "0100110011" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(11114405,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(130421626,28);
logexp <= conv_std_logic_vector(1030,11);
WHEN "0100110100" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(11205257,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(180686260,28);
logexp <= conv_std_logic_vector(1030,11);
WHEN "0100110101" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(11296109,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(230950894,28);
logexp <= conv_std_logic_vector(1030,11);
WHEN "0100110110" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(11386962,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(12780072,28);
logexp <= conv_std_logic_vector(1030,11);
WHEN "0100110111" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(11477814,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(63044706,28);
logexp <= conv_std_logic_vector(1030,11);
WHEN "0100111000" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(11568666,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(113309340,28);
logexp <= conv_std_logic_vector(1030,11);
WHEN "0100111001" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(11659518,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(163573973,28);
logexp <= conv_std_logic_vector(1030,11);
WHEN "0100111010" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(11750370,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(213838607,28);
logexp <= conv_std_logic_vector(1030,11);
WHEN "0100111011" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(11841222,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(264103241,28);
logexp <= conv_std_logic_vector(1030,11);
WHEN "0100111100" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(11932075,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(45932419,28);
logexp <= conv_std_logic_vector(1030,11);
WHEN "0100111101" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(12022927,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(96197053,28);
logexp <= conv_std_logic_vector(1030,11);
WHEN "0100111110" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(12113779,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(146461687,28);
logexp <= conv_std_logic_vector(1030,11);
WHEN "0100111111" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(12204631,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(196726321,28);
logexp <= conv_std_logic_vector(1030,11);
WHEN "0101000000" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(12295483,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(246990955,28);
logexp <= conv_std_logic_vector(1030,11);
WHEN "0101000001" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(12386336,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(28820133,28);
logexp <= conv_std_logic_vector(1030,11);
WHEN "0101000010" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(12477188,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(79084767,28);
logexp <= conv_std_logic_vector(1030,11);
WHEN "0101000011" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(12568040,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(129349401,28);
logexp <= conv_std_logic_vector(1030,11);
WHEN "0101000100" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(12658892,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(179614035,28);
logexp <= conv_std_logic_vector(1030,11);
WHEN "0101000101" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(12749744,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(229878669,28);
logexp <= conv_std_logic_vector(1030,11);
WHEN "0101000110" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(12840597,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(11707847,28);
logexp <= conv_std_logic_vector(1030,11);
WHEN "0101000111" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(12931449,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(61972481,28);
logexp <= conv_std_logic_vector(1030,11);
WHEN "0101001000" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(13022301,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(112237114,28);
logexp <= conv_std_logic_vector(1030,11);
WHEN "0101001001" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(13113153,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(162501748,28);
logexp <= conv_std_logic_vector(1030,11);
WHEN "0101001010" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(13204005,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(212766382,28);
logexp <= conv_std_logic_vector(1030,11);
WHEN "0101001011" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(13294857,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(263031016,28);
logexp <= conv_std_logic_vector(1030,11);
WHEN "0101001100" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(13385710,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(44860194,28);
logexp <= conv_std_logic_vector(1030,11);
WHEN "0101001101" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(13476562,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(95124828,28);
logexp <= conv_std_logic_vector(1030,11);
WHEN "0101001110" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(13567414,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(145389462,28);
logexp <= conv_std_logic_vector(1030,11);
WHEN "0101001111" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(13658266,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(195654096,28);
logexp <= conv_std_logic_vector(1030,11);
WHEN "0101010000" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(13749118,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(245918730,28);
logexp <= conv_std_logic_vector(1030,11);
WHEN "0101010001" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(13839971,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(27747908,28);
logexp <= conv_std_logic_vector(1030,11);
WHEN "0101010010" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(13930823,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(78012542,28);
logexp <= conv_std_logic_vector(1030,11);
WHEN "0101010011" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(14021675,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(128277176,28);
logexp <= conv_std_logic_vector(1030,11);
WHEN "0101010100" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(14112527,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(178541810,28);
logexp <= conv_std_logic_vector(1030,11);
WHEN "0101010101" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(14203379,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(228806444,28);
logexp <= conv_std_logic_vector(1030,11);
WHEN "0101010110" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(14294232,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(10635622,28);
logexp <= conv_std_logic_vector(1030,11);
WHEN "0101010111" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(14385084,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(60900256,28);
logexp <= conv_std_logic_vector(1030,11);
WHEN "0101011000" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(14475936,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(111164889,28);
logexp <= conv_std_logic_vector(1030,11);
WHEN "0101011001" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(14566788,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(161429523,28);
logexp <= conv_std_logic_vector(1030,11);
WHEN "0101011010" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(14657640,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(211694157,28);
logexp <= conv_std_logic_vector(1030,11);
WHEN "0101011011" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(14748492,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(261958791,28);
logexp <= conv_std_logic_vector(1030,11);
WHEN "0101011100" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(14839345,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(43787969,28);
logexp <= conv_std_logic_vector(1030,11);
WHEN "0101011101" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(14930197,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(94052603,28);
logexp <= conv_std_logic_vector(1030,11);
WHEN "0101011110" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(15021049,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(144317237,28);
logexp <= conv_std_logic_vector(1030,11);
WHEN "0101011111" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(15111901,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(194581871,28);
logexp <= conv_std_logic_vector(1030,11);
WHEN "0101100000" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(15202753,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(244846505,28);
logexp <= conv_std_logic_vector(1030,11);
WHEN "0101100001" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(15293606,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(26675683,28);
logexp <= conv_std_logic_vector(1030,11);
WHEN "0101100010" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(15384458,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(76940317,28);
logexp <= conv_std_logic_vector(1030,11);
WHEN "0101100011" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(15475310,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(127204951,28);
logexp <= conv_std_logic_vector(1030,11);
WHEN "0101100100" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(15566162,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(177469585,28);
logexp <= conv_std_logic_vector(1030,11);
WHEN "0101100101" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(15657014,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(227734219,28);
logexp <= conv_std_logic_vector(1030,11);
WHEN "0101100110" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(15747867,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(9563397,28);
logexp <= conv_std_logic_vector(1030,11);
WHEN "0101100111" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(15838719,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(59828030,28);
logexp <= conv_std_logic_vector(1030,11);
WHEN "0101101000" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(15929571,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(110092664,28);
logexp <= conv_std_logic_vector(1030,11);
WHEN "0101101001" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(16020423,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(160357298,28);
logexp <= conv_std_logic_vector(1030,11);
WHEN "0101101010" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(16111275,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(210621932,28);
logexp <= conv_std_logic_vector(1030,11);
WHEN "0101101011" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(16202127,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(260886566,28);
logexp <= conv_std_logic_vector(1030,11);
WHEN "0101101100" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(16292980,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(42715744,28);
logexp <= conv_std_logic_vector(1030,11);
WHEN "0101101101" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(16383832,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(92980378,28);
logexp <= conv_std_logic_vector(1030,11);
WHEN "0101101110" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(16474684,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(143245012,28);
logexp <= conv_std_logic_vector(1030,11);
WHEN "0101101111" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(16565536,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(193509646,28);
logexp <= conv_std_logic_vector(1030,11);
WHEN "0101110000" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(16656388,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(243774280,28);
logexp <= conv_std_logic_vector(1030,11);
WHEN "0101110001" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(16747241,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(25603458,28);
logexp <= conv_std_logic_vector(1030,11);
WHEN "0101110010" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(30438,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(172151774,28);
logexp <= conv_std_logic_vector(1031,11);
WHEN "0101110011" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(75864,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(197284091,28);
logexp <= conv_std_logic_vector(1031,11);
WHEN "0101110100" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(121290,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(222416408,28);
logexp <= conv_std_logic_vector(1031,11);
WHEN "0101110101" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(166716,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(247548725,28);
logexp <= conv_std_logic_vector(1031,11);
WHEN "0101110110" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(212143,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(4245586,28);
logexp <= conv_std_logic_vector(1031,11);
WHEN "0101110111" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(257569,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(29377903,28);
logexp <= conv_std_logic_vector(1031,11);
WHEN "0101111000" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(302995,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(54510220,28);
logexp <= conv_std_logic_vector(1031,11);
WHEN "0101111001" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(348421,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(79642537,28);
logexp <= conv_std_logic_vector(1031,11);
WHEN "0101111010" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(393847,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(104774854,28);
logexp <= conv_std_logic_vector(1031,11);
WHEN "0101111011" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(439273,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(129907171,28);
logexp <= conv_std_logic_vector(1031,11);
WHEN "0101111100" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(484699,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(155039488,28);
logexp <= conv_std_logic_vector(1031,11);
WHEN "0101111101" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(530125,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(180171805,28);
logexp <= conv_std_logic_vector(1031,11);
WHEN "0101111110" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(575551,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(205304121,28);
logexp <= conv_std_logic_vector(1031,11);
WHEN "0101111111" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(620977,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(230436438,28);
logexp <= conv_std_logic_vector(1031,11);
WHEN "0110000000" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(666403,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(255568755,28);
logexp <= conv_std_logic_vector(1031,11);
WHEN "0110000001" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(711830,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(12265616,28);
logexp <= conv_std_logic_vector(1031,11);
WHEN "0110000010" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(757256,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(37397933,28);
logexp <= conv_std_logic_vector(1031,11);
WHEN "0110000011" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(802682,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(62530250,28);
logexp <= conv_std_logic_vector(1031,11);
WHEN "0110000100" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(848108,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(87662567,28);
logexp <= conv_std_logic_vector(1031,11);
WHEN "0110000101" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(893534,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(112794884,28);
logexp <= conv_std_logic_vector(1031,11);
WHEN "0110000110" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(938960,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(137927201,28);
logexp <= conv_std_logic_vector(1031,11);
WHEN "0110000111" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(984386,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(163059518,28);
logexp <= conv_std_logic_vector(1031,11);
WHEN "0110001000" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(1029812,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(188191835,28);
logexp <= conv_std_logic_vector(1031,11);
WHEN "0110001001" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(1075238,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(213324152,28);
logexp <= conv_std_logic_vector(1031,11);
WHEN "0110001010" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(1120664,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(238456469,28);
logexp <= conv_std_logic_vector(1031,11);
WHEN "0110001011" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(1166090,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(263588786,28);
logexp <= conv_std_logic_vector(1031,11);
WHEN "0110001100" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(1211517,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(20285647,28);
logexp <= conv_std_logic_vector(1031,11);
WHEN "0110001101" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(1256943,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(45417964,28);
logexp <= conv_std_logic_vector(1031,11);
WHEN "0110001110" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(1302369,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(70550281,28);
logexp <= conv_std_logic_vector(1031,11);
WHEN "0110001111" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(1347795,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(95682598,28);
logexp <= conv_std_logic_vector(1031,11);
WHEN "0110010000" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(1393221,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(120814915,28);
logexp <= conv_std_logic_vector(1031,11);
WHEN "0110010001" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(1438647,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(145947232,28);
logexp <= conv_std_logic_vector(1031,11);
WHEN "0110010010" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(1484073,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(171079549,28);
logexp <= conv_std_logic_vector(1031,11);
WHEN "0110010011" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(1529499,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(196211866,28);
logexp <= conv_std_logic_vector(1031,11);
WHEN "0110010100" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(1574925,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(221344183,28);
logexp <= conv_std_logic_vector(1031,11);
WHEN "0110010101" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(1620351,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(246476500,28);
logexp <= conv_std_logic_vector(1031,11);
WHEN "0110010110" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(1665778,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(3173361,28);
logexp <= conv_std_logic_vector(1031,11);
WHEN "0110010111" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(1711204,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(28305678,28);
logexp <= conv_std_logic_vector(1031,11);
WHEN "0110011000" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(1756630,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(53437995,28);
logexp <= conv_std_logic_vector(1031,11);
WHEN "0110011001" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(1802056,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(78570312,28);
logexp <= conv_std_logic_vector(1031,11);
WHEN "0110011010" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(1847482,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(103702629,28);
logexp <= conv_std_logic_vector(1031,11);
WHEN "0110011011" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(1892908,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(128834946,28);
logexp <= conv_std_logic_vector(1031,11);
WHEN "0110011100" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(1938334,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(153967262,28);
logexp <= conv_std_logic_vector(1031,11);
WHEN "0110011101" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(1983760,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(179099579,28);
logexp <= conv_std_logic_vector(1031,11);
WHEN "0110011110" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(2029186,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(204231896,28);
logexp <= conv_std_logic_vector(1031,11);
WHEN "0110011111" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(2074612,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(229364213,28);
logexp <= conv_std_logic_vector(1031,11);
WHEN "0110100000" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(2120038,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(254496530,28);
logexp <= conv_std_logic_vector(1031,11);
WHEN "0110100001" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(2165465,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(11193391,28);
logexp <= conv_std_logic_vector(1031,11);
WHEN "0110100010" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(2210891,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(36325708,28);
logexp <= conv_std_logic_vector(1031,11);
WHEN "0110100011" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(2256317,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(61458025,28);
logexp <= conv_std_logic_vector(1031,11);
WHEN "0110100100" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(2301743,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(86590342,28);
logexp <= conv_std_logic_vector(1031,11);
WHEN "0110100101" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(2347169,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(111722659,28);
logexp <= conv_std_logic_vector(1031,11);
WHEN "0110100110" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(2392595,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(136854976,28);
logexp <= conv_std_logic_vector(1031,11);
WHEN "0110100111" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(2438021,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(161987293,28);
logexp <= conv_std_logic_vector(1031,11);
WHEN "0110101000" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(2483447,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(187119610,28);
logexp <= conv_std_logic_vector(1031,11);
WHEN "0110101001" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(2528873,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(212251927,28);
logexp <= conv_std_logic_vector(1031,11);
WHEN "0110101010" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(2574299,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(237384244,28);
logexp <= conv_std_logic_vector(1031,11);
WHEN "0110101011" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(2619725,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(262516561,28);
logexp <= conv_std_logic_vector(1031,11);
WHEN "0110101100" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(2665152,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(19213422,28);
logexp <= conv_std_logic_vector(1031,11);
WHEN "0110101101" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(2710578,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(44345739,28);
logexp <= conv_std_logic_vector(1031,11);
WHEN "0110101110" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(2756004,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(69478056,28);
logexp <= conv_std_logic_vector(1031,11);
WHEN "0110101111" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(2801430,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(94610373,28);
logexp <= conv_std_logic_vector(1031,11);
WHEN "0110110000" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(2846856,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(119742690,28);
logexp <= conv_std_logic_vector(1031,11);
WHEN "0110110001" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(2892282,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(144875007,28);
logexp <= conv_std_logic_vector(1031,11);
WHEN "0110110010" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(2937708,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(170007324,28);
logexp <= conv_std_logic_vector(1031,11);
WHEN "0110110011" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(2983134,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(195139641,28);
logexp <= conv_std_logic_vector(1031,11);
WHEN "0110110100" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(3028560,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(220271958,28);
logexp <= conv_std_logic_vector(1031,11);
WHEN "0110110101" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(3073986,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(245404275,28);
logexp <= conv_std_logic_vector(1031,11);
WHEN "0110110110" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(3119413,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(2101136,28);
logexp <= conv_std_logic_vector(1031,11);
WHEN "0110110111" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(3164839,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(27233453,28);
logexp <= conv_std_logic_vector(1031,11);
WHEN "0110111000" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(3210265,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(52365770,28);
logexp <= conv_std_logic_vector(1031,11);
WHEN "0110111001" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(3255691,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(77498087,28);
logexp <= conv_std_logic_vector(1031,11);
WHEN "0110111010" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(3301117,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(102630404,28);
logexp <= conv_std_logic_vector(1031,11);
WHEN "0110111011" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(3346543,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(127762720,28);
logexp <= conv_std_logic_vector(1031,11);
WHEN "0110111100" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(3391969,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(152895037,28);
logexp <= conv_std_logic_vector(1031,11);
WHEN "0110111101" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(3437395,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(178027354,28);
logexp <= conv_std_logic_vector(1031,11);
WHEN "0110111110" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(3482821,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(203159671,28);
logexp <= conv_std_logic_vector(1031,11);
WHEN "0110111111" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(3528247,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(228291988,28);
logexp <= conv_std_logic_vector(1031,11);
WHEN "0111000000" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(3573673,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(253424305,28);
logexp <= conv_std_logic_vector(1031,11);
WHEN "0111000001" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(3619100,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(10121166,28);
logexp <= conv_std_logic_vector(1031,11);
WHEN "0111000010" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(3664526,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(35253483,28);
logexp <= conv_std_logic_vector(1031,11);
WHEN "0111000011" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(3709952,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(60385800,28);
logexp <= conv_std_logic_vector(1031,11);
WHEN "0111000100" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(3755378,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(85518117,28);
logexp <= conv_std_logic_vector(1031,11);
WHEN "0111000101" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(3800804,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(110650434,28);
logexp <= conv_std_logic_vector(1031,11);
WHEN "0111000110" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(3846230,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(135782751,28);
logexp <= conv_std_logic_vector(1031,11);
WHEN "0111000111" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(3891656,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(160915068,28);
logexp <= conv_std_logic_vector(1031,11);
WHEN "0111001000" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(3937082,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(186047385,28);
logexp <= conv_std_logic_vector(1031,11);
WHEN "0111001001" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(3982508,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(211179702,28);
logexp <= conv_std_logic_vector(1031,11);
WHEN "0111001010" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(4027934,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(236312019,28);
logexp <= conv_std_logic_vector(1031,11);
WHEN "0111001011" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(4073360,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(261444336,28);
logexp <= conv_std_logic_vector(1031,11);
WHEN "0111001100" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(4118787,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(18141197,28);
logexp <= conv_std_logic_vector(1031,11);
WHEN "0111001101" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(4164213,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(43273514,28);
logexp <= conv_std_logic_vector(1031,11);
WHEN "0111001110" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(4209639,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(68405831,28);
logexp <= conv_std_logic_vector(1031,11);
WHEN "0111001111" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(4255065,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(93538148,28);
logexp <= conv_std_logic_vector(1031,11);
WHEN "0111010000" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(4300491,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(118670465,28);
logexp <= conv_std_logic_vector(1031,11);
WHEN "0111010001" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(4345917,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(143802782,28);
logexp <= conv_std_logic_vector(1031,11);
WHEN "0111010010" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(4391343,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(168935099,28);
logexp <= conv_std_logic_vector(1031,11);
WHEN "0111010011" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(4436769,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(194067416,28);
logexp <= conv_std_logic_vector(1031,11);
WHEN "0111010100" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(4482195,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(219199733,28);
logexp <= conv_std_logic_vector(1031,11);
WHEN "0111010101" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(4527621,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(244332050,28);
logexp <= conv_std_logic_vector(1031,11);
WHEN "0111010110" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(4573048,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(1028911,28);
logexp <= conv_std_logic_vector(1031,11);
WHEN "0111010111" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(4618474,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(26161228,28);
logexp <= conv_std_logic_vector(1031,11);
WHEN "0111011000" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(4663900,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(51293545,28);
logexp <= conv_std_logic_vector(1031,11);
WHEN "0111011001" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(4709326,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(76425861,28);
logexp <= conv_std_logic_vector(1031,11);
WHEN "0111011010" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(4754752,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(101558178,28);
logexp <= conv_std_logic_vector(1031,11);
WHEN "0111011011" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(4800178,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(126690495,28);
logexp <= conv_std_logic_vector(1031,11);
WHEN "0111011100" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(4845604,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(151822812,28);
logexp <= conv_std_logic_vector(1031,11);
WHEN "0111011101" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(4891030,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(176955129,28);
logexp <= conv_std_logic_vector(1031,11);
WHEN "0111011110" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(4936456,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(202087446,28);
logexp <= conv_std_logic_vector(1031,11);
WHEN "0111011111" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(4981882,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(227219763,28);
logexp <= conv_std_logic_vector(1031,11);
WHEN "0111100000" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(5027308,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(252352080,28);
logexp <= conv_std_logic_vector(1031,11);
WHEN "0111100001" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(5072735,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(9048941,28);
logexp <= conv_std_logic_vector(1031,11);
WHEN "0111100010" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(5118161,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(34181258,28);
logexp <= conv_std_logic_vector(1031,11);
WHEN "0111100011" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(5163587,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(59313575,28);
logexp <= conv_std_logic_vector(1031,11);
WHEN "0111100100" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(5209013,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(84445892,28);
logexp <= conv_std_logic_vector(1031,11);
WHEN "0111100101" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(5254439,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(109578209,28);
logexp <= conv_std_logic_vector(1031,11);
WHEN "0111100110" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(5299865,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(134710526,28);
logexp <= conv_std_logic_vector(1031,11);
WHEN "0111100111" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(5345291,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(159842843,28);
logexp <= conv_std_logic_vector(1031,11);
WHEN "0111101000" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(5390717,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(184975160,28);
logexp <= conv_std_logic_vector(1031,11);
WHEN "0111101001" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(5436143,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(210107477,28);
logexp <= conv_std_logic_vector(1031,11);
WHEN "0111101010" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(5481569,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(235239794,28);
logexp <= conv_std_logic_vector(1031,11);
WHEN "0111101011" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(5526995,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(260372111,28);
logexp <= conv_std_logic_vector(1031,11);
WHEN "0111101100" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(5572422,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(17068972,28);
logexp <= conv_std_logic_vector(1031,11);
WHEN "0111101101" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(5617848,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(42201289,28);
logexp <= conv_std_logic_vector(1031,11);
WHEN "0111101110" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(5663274,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(67333606,28);
logexp <= conv_std_logic_vector(1031,11);
WHEN "0111101111" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(5708700,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(92465923,28);
logexp <= conv_std_logic_vector(1031,11);
WHEN "0111110000" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(5754126,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(117598240,28);
logexp <= conv_std_logic_vector(1031,11);
WHEN "0111110001" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(5799552,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(142730557,28);
logexp <= conv_std_logic_vector(1031,11);
WHEN "0111110010" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(5844978,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(167862874,28);
logexp <= conv_std_logic_vector(1031,11);
WHEN "0111110011" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(5890404,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(192995191,28);
logexp <= conv_std_logic_vector(1031,11);
WHEN "0111110100" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(5935830,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(218127508,28);
logexp <= conv_std_logic_vector(1031,11);
WHEN "0111110101" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(5981256,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(243259825,28);
logexp <= conv_std_logic_vector(1031,11);
WHEN "0111110110" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(6026682,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(268392142,28);
logexp <= conv_std_logic_vector(1031,11);
WHEN "0111110111" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(6072109,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(25089003,28);
logexp <= conv_std_logic_vector(1031,11);
WHEN "0111111000" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(6117535,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(50221319,28);
logexp <= conv_std_logic_vector(1031,11);
WHEN "0111111001" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(6162961,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(75353636,28);
logexp <= conv_std_logic_vector(1031,11);
WHEN "0111111010" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(6208387,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(100485953,28);
logexp <= conv_std_logic_vector(1031,11);
WHEN "0111111011" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(6253813,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(125618270,28);
logexp <= conv_std_logic_vector(1031,11);
WHEN "0111111100" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(6299239,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(150750587,28);
logexp <= conv_std_logic_vector(1031,11);
WHEN "0111111101" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(6344665,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(175882904,28);
logexp <= conv_std_logic_vector(1031,11);
WHEN "0111111110" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(6390091,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(201015221,28);
logexp <= conv_std_logic_vector(1031,11);
WHEN "0111111111" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(6435517,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(226147538,28);
logexp <= conv_std_logic_vector(1031,11);
WHEN "1000000000" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(6480943,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(251279855,28);
logexp <= conv_std_logic_vector(1031,11);
WHEN "1000000001" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(6526370,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(7976716,28);
logexp <= conv_std_logic_vector(1031,11);
WHEN "1000000010" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(6571796,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(33109033,28);
logexp <= conv_std_logic_vector(1031,11);
WHEN "1000000011" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(6617222,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(58241350,28);
logexp <= conv_std_logic_vector(1031,11);
WHEN "1000000100" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(6662648,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(83373667,28);
logexp <= conv_std_logic_vector(1031,11);
WHEN "1000000101" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(6708074,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(108505984,28);
logexp <= conv_std_logic_vector(1031,11);
WHEN "1000000110" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(6753500,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(133638301,28);
logexp <= conv_std_logic_vector(1031,11);
WHEN "1000000111" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(6798926,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(158770618,28);
logexp <= conv_std_logic_vector(1031,11);
WHEN "1000001000" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(6844352,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(183902935,28);
logexp <= conv_std_logic_vector(1031,11);
WHEN "1000001001" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(6889778,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(209035252,28);
logexp <= conv_std_logic_vector(1031,11);
WHEN "1000001010" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(6935204,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(234167569,28);
logexp <= conv_std_logic_vector(1031,11);
WHEN "1000001011" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(6980630,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(259299886,28);
logexp <= conv_std_logic_vector(1031,11);
WHEN "1000001100" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(7026057,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(15996747,28);
logexp <= conv_std_logic_vector(1031,11);
WHEN "1000001101" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(7071483,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(41129064,28);
logexp <= conv_std_logic_vector(1031,11);
WHEN "1000001110" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(7116909,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(66261381,28);
logexp <= conv_std_logic_vector(1031,11);
WHEN "1000001111" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(7162335,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(91393698,28);
logexp <= conv_std_logic_vector(1031,11);
WHEN "1000010000" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(7207761,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(116526015,28);
logexp <= conv_std_logic_vector(1031,11);
WHEN "1000010001" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(7253187,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(141658332,28);
logexp <= conv_std_logic_vector(1031,11);
WHEN "1000010010" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(7298613,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(166790649,28);
logexp <= conv_std_logic_vector(1031,11);
WHEN "1000010011" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(7344039,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(191922966,28);
logexp <= conv_std_logic_vector(1031,11);
WHEN "1000010100" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(7389465,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(217055283,28);
logexp <= conv_std_logic_vector(1031,11);
WHEN "1000010101" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(7434891,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(242187600,28);
logexp <= conv_std_logic_vector(1031,11);
WHEN "1000010110" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(7480317,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(267319916,28);
logexp <= conv_std_logic_vector(1031,11);
WHEN "1000010111" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(7525744,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(24016777,28);
logexp <= conv_std_logic_vector(1031,11);
WHEN "1000011000" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(7571170,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(49149094,28);
logexp <= conv_std_logic_vector(1031,11);
WHEN "1000011001" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(7616596,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(74281411,28);
logexp <= conv_std_logic_vector(1031,11);
WHEN "1000011010" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(7662022,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(99413728,28);
logexp <= conv_std_logic_vector(1031,11);
WHEN "1000011011" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(7707448,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(124546045,28);
logexp <= conv_std_logic_vector(1031,11);
WHEN "1000011100" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(7752874,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(149678362,28);
logexp <= conv_std_logic_vector(1031,11);
WHEN "1000011101" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(7798300,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(174810679,28);
logexp <= conv_std_logic_vector(1031,11);
WHEN "1000011110" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(7843726,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(199942996,28);
logexp <= conv_std_logic_vector(1031,11);
WHEN "1000011111" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(7889152,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(225075313,28);
logexp <= conv_std_logic_vector(1031,11);
WHEN "1000100000" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(7934578,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(250207630,28);
logexp <= conv_std_logic_vector(1031,11);
WHEN "1000100001" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(7980005,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(6904491,28);
logexp <= conv_std_logic_vector(1031,11);
WHEN "1000100010" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(8025431,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(32036808,28);
logexp <= conv_std_logic_vector(1031,11);
WHEN "1000100011" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(8070857,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(57169125,28);
logexp <= conv_std_logic_vector(1031,11);
WHEN "1000100100" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(8116283,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(82301442,28);
logexp <= conv_std_logic_vector(1031,11);
WHEN "1000100101" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(8161709,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(107433759,28);
logexp <= conv_std_logic_vector(1031,11);
WHEN "1000100110" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(8207135,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(132566076,28);
logexp <= conv_std_logic_vector(1031,11);
WHEN "1000100111" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(8252561,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(157698393,28);
logexp <= conv_std_logic_vector(1031,11);
WHEN "1000101000" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(8297987,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(182830710,28);
logexp <= conv_std_logic_vector(1031,11);
WHEN "1000101001" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(8343413,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(207963027,28);
logexp <= conv_std_logic_vector(1031,11);
WHEN "1000101010" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(8388839,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(233095344,28);
logexp <= conv_std_logic_vector(1031,11);
WHEN "1000101011" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(8434265,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(258227661,28);
logexp <= conv_std_logic_vector(1031,11);
WHEN "1000101100" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(8479692,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(14924522,28);
logexp <= conv_std_logic_vector(1031,11);
WHEN "1000101101" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(8525118,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(40056839,28);
logexp <= conv_std_logic_vector(1031,11);
WHEN "1000101110" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(8570544,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(65189156,28);
logexp <= conv_std_logic_vector(1031,11);
WHEN "1000101111" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(8615970,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(90321473,28);
logexp <= conv_std_logic_vector(1031,11);
WHEN "1000110000" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(8661396,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(115453790,28);
logexp <= conv_std_logic_vector(1031,11);
WHEN "1000110001" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(8706822,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(140586107,28);
logexp <= conv_std_logic_vector(1031,11);
WHEN "1000110010" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(8752248,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(165718424,28);
logexp <= conv_std_logic_vector(1031,11);
WHEN "1000110011" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(8797674,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(190850741,28);
logexp <= conv_std_logic_vector(1031,11);
WHEN "1000110100" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(8843100,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(215983058,28);
logexp <= conv_std_logic_vector(1031,11);
WHEN "1000110101" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(8888526,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(241115374,28);
logexp <= conv_std_logic_vector(1031,11);
WHEN "1000110110" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(8933952,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(266247691,28);
logexp <= conv_std_logic_vector(1031,11);
WHEN "1000110111" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(8979379,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(22944552,28);
logexp <= conv_std_logic_vector(1031,11);
WHEN "1000111000" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(9024805,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(48076869,28);
logexp <= conv_std_logic_vector(1031,11);
WHEN "1000111001" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(9070231,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(73209186,28);
logexp <= conv_std_logic_vector(1031,11);
WHEN "1000111010" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(9115657,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(98341503,28);
logexp <= conv_std_logic_vector(1031,11);
WHEN "1000111011" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(9161083,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(123473820,28);
logexp <= conv_std_logic_vector(1031,11);
WHEN "1000111100" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(9206509,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(148606137,28);
logexp <= conv_std_logic_vector(1031,11);
WHEN "1000111101" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(9251935,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(173738454,28);
logexp <= conv_std_logic_vector(1031,11);
WHEN "1000111110" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(9297361,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(198870771,28);
logexp <= conv_std_logic_vector(1031,11);
WHEN "1000111111" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(9342787,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(224003088,28);
logexp <= conv_std_logic_vector(1031,11);
WHEN "1001000000" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(9388213,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(249135405,28);
logexp <= conv_std_logic_vector(1031,11);
WHEN "1001000001" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(9433640,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(5832266,28);
logexp <= conv_std_logic_vector(1031,11);
WHEN "1001000010" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(9479066,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(30964583,28);
logexp <= conv_std_logic_vector(1031,11);
WHEN "1001000011" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(9524492,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(56096900,28);
logexp <= conv_std_logic_vector(1031,11);
WHEN "1001000100" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(9569918,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(81229217,28);
logexp <= conv_std_logic_vector(1031,11);
WHEN "1001000101" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(9615344,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(106361534,28);
logexp <= conv_std_logic_vector(1031,11);
WHEN "1001000110" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(9660770,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(131493851,28);
logexp <= conv_std_logic_vector(1031,11);
WHEN "1001000111" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(9706196,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(156626168,28);
logexp <= conv_std_logic_vector(1031,11);
WHEN "1001001000" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(9751622,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(181758485,28);
logexp <= conv_std_logic_vector(1031,11);
WHEN "1001001001" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(9797048,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(206890802,28);
logexp <= conv_std_logic_vector(1031,11);
WHEN "1001001010" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(9842474,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(232023119,28);
logexp <= conv_std_logic_vector(1031,11);
WHEN "1001001011" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(9887900,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(257155436,28);
logexp <= conv_std_logic_vector(1031,11);
WHEN "1001001100" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(9933327,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(13852297,28);
logexp <= conv_std_logic_vector(1031,11);
WHEN "1001001101" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(9978753,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(38984614,28);
logexp <= conv_std_logic_vector(1031,11);
WHEN "1001001110" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(10024179,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(64116931,28);
logexp <= conv_std_logic_vector(1031,11);
WHEN "1001001111" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(10069605,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(89249248,28);
logexp <= conv_std_logic_vector(1031,11);
WHEN "1001010000" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(10115031,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(114381565,28);
logexp <= conv_std_logic_vector(1031,11);
WHEN "1001010001" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(10160457,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(139513882,28);
logexp <= conv_std_logic_vector(1031,11);
WHEN "1001010010" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(10205883,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(164646199,28);
logexp <= conv_std_logic_vector(1031,11);
WHEN "1001010011" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(10251309,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(189778515,28);
logexp <= conv_std_logic_vector(1031,11);
WHEN "1001010100" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(10296735,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(214910832,28);
logexp <= conv_std_logic_vector(1031,11);
WHEN "1001010101" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(10342161,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(240043149,28);
logexp <= conv_std_logic_vector(1031,11);
WHEN "1001010110" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(10387587,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(265175466,28);
logexp <= conv_std_logic_vector(1031,11);
WHEN "1001010111" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(10433014,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(21872327,28);
logexp <= conv_std_logic_vector(1031,11);
WHEN "1001011000" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(10478440,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(47004644,28);
logexp <= conv_std_logic_vector(1031,11);
WHEN "1001011001" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(10523866,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(72136961,28);
logexp <= conv_std_logic_vector(1031,11);
WHEN "1001011010" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(10569292,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(97269278,28);
logexp <= conv_std_logic_vector(1031,11);
WHEN "1001011011" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(10614718,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(122401595,28);
logexp <= conv_std_logic_vector(1031,11);
WHEN "1001011100" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(10660144,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(147533912,28);
logexp <= conv_std_logic_vector(1031,11);
WHEN "1001011101" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(10705570,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(172666229,28);
logexp <= conv_std_logic_vector(1031,11);
WHEN "1001011110" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(10750996,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(197798546,28);
logexp <= conv_std_logic_vector(1031,11);
WHEN "1001011111" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(10796422,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(222930863,28);
logexp <= conv_std_logic_vector(1031,11);
WHEN "1001100000" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(10841848,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(248063180,28);
logexp <= conv_std_logic_vector(1031,11);
WHEN "1001100001" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(10887275,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(4760041,28);
logexp <= conv_std_logic_vector(1031,11);
WHEN "1001100010" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(10932701,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(29892358,28);
logexp <= conv_std_logic_vector(1031,11);
WHEN "1001100011" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(10978127,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(55024675,28);
logexp <= conv_std_logic_vector(1031,11);
WHEN "1001100100" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(11023553,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(80156992,28);
logexp <= conv_std_logic_vector(1031,11);
WHEN "1001100101" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(11068979,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(105289309,28);
logexp <= conv_std_logic_vector(1031,11);
WHEN "1001100110" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(11114405,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(130421626,28);
logexp <= conv_std_logic_vector(1031,11);
WHEN "1001100111" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(11159831,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(155553943,28);
logexp <= conv_std_logic_vector(1031,11);
WHEN "1001101000" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(11205257,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(180686260,28);
logexp <= conv_std_logic_vector(1031,11);
WHEN "1001101001" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(11250683,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(205818577,28);
logexp <= conv_std_logic_vector(1031,11);
WHEN "1001101010" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(11296109,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(230950894,28);
logexp <= conv_std_logic_vector(1031,11);
WHEN "1001101011" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(11341535,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(256083211,28);
logexp <= conv_std_logic_vector(1031,11);
WHEN "1001101100" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(11386962,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(12780072,28);
logexp <= conv_std_logic_vector(1031,11);
WHEN "1001101101" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(11432388,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(37912389,28);
logexp <= conv_std_logic_vector(1031,11);
WHEN "1001101110" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(11477814,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(63044706,28);
logexp <= conv_std_logic_vector(1031,11);
WHEN "1001101111" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(11523240,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(88177023,28);
logexp <= conv_std_logic_vector(1031,11);
WHEN "1001110000" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(11568666,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(113309340,28);
logexp <= conv_std_logic_vector(1031,11);
WHEN "1001110001" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(11614092,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(138441657,28);
logexp <= conv_std_logic_vector(1031,11);
WHEN "1001110010" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(11659518,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(163573973,28);
logexp <= conv_std_logic_vector(1031,11);
WHEN "1001110011" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(11704944,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(188706290,28);
logexp <= conv_std_logic_vector(1031,11);
WHEN "1001110100" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(11750370,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(213838607,28);
logexp <= conv_std_logic_vector(1031,11);
WHEN "1001110101" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(11795796,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(238970924,28);
logexp <= conv_std_logic_vector(1031,11);
WHEN "1001110110" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(11841222,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(264103241,28);
logexp <= conv_std_logic_vector(1031,11);
WHEN "1001110111" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(11886649,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(20800102,28);
logexp <= conv_std_logic_vector(1031,11);
WHEN "1001111000" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(11932075,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(45932419,28);
logexp <= conv_std_logic_vector(1031,11);
WHEN "1001111001" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(11977501,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(71064736,28);
logexp <= conv_std_logic_vector(1031,11);
WHEN "1001111010" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(12022927,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(96197053,28);
logexp <= conv_std_logic_vector(1031,11);
WHEN "1001111011" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(12068353,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(121329370,28);
logexp <= conv_std_logic_vector(1031,11);
WHEN "1001111100" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(12113779,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(146461687,28);
logexp <= conv_std_logic_vector(1031,11);
WHEN "1001111101" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(12159205,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(171594004,28);
logexp <= conv_std_logic_vector(1031,11);
WHEN "1001111110" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(12204631,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(196726321,28);
logexp <= conv_std_logic_vector(1031,11);
WHEN "1001111111" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(12250057,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(221858638,28);
logexp <= conv_std_logic_vector(1031,11);
WHEN "1010000000" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(12295483,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(246990955,28);
logexp <= conv_std_logic_vector(1031,11);
WHEN "1010000001" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(12340910,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(3687816,28);
logexp <= conv_std_logic_vector(1031,11);
WHEN "1010000010" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(12386336,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(28820133,28);
logexp <= conv_std_logic_vector(1031,11);
WHEN "1010000011" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(12431762,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(53952450,28);
logexp <= conv_std_logic_vector(1031,11);
WHEN "1010000100" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(12477188,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(79084767,28);
logexp <= conv_std_logic_vector(1031,11);
WHEN "1010000101" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(12522614,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(104217084,28);
logexp <= conv_std_logic_vector(1031,11);
WHEN "1010000110" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(12568040,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(129349401,28);
logexp <= conv_std_logic_vector(1031,11);
WHEN "1010000111" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(12613466,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(154481718,28);
logexp <= conv_std_logic_vector(1031,11);
WHEN "1010001000" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(12658892,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(179614035,28);
logexp <= conv_std_logic_vector(1031,11);
WHEN "1010001001" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(12704318,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(204746352,28);
logexp <= conv_std_logic_vector(1031,11);
WHEN "1010001010" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(12749744,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(229878669,28);
logexp <= conv_std_logic_vector(1031,11);
WHEN "1010001011" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(12795170,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(255010986,28);
logexp <= conv_std_logic_vector(1031,11);
WHEN "1010001100" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(12840597,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(11707847,28);
logexp <= conv_std_logic_vector(1031,11);
WHEN "1010001101" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(12886023,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(36840164,28);
logexp <= conv_std_logic_vector(1031,11);
WHEN "1010001110" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(12931449,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(61972481,28);
logexp <= conv_std_logic_vector(1031,11);
WHEN "1010001111" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(12976875,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(87104798,28);
logexp <= conv_std_logic_vector(1031,11);
WHEN "1010010000" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(13022301,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(112237114,28);
logexp <= conv_std_logic_vector(1031,11);
WHEN "1010010001" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(13067727,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(137369431,28);
logexp <= conv_std_logic_vector(1031,11);
WHEN "1010010010" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(13113153,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(162501748,28);
logexp <= conv_std_logic_vector(1031,11);
WHEN "1010010011" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(13158579,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(187634065,28);
logexp <= conv_std_logic_vector(1031,11);
WHEN "1010010100" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(13204005,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(212766382,28);
logexp <= conv_std_logic_vector(1031,11);
WHEN "1010010101" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(13249431,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(237898699,28);
logexp <= conv_std_logic_vector(1031,11);
WHEN "1010010110" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(13294857,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(263031016,28);
logexp <= conv_std_logic_vector(1031,11);
WHEN "1010010111" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(13340284,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(19727877,28);
logexp <= conv_std_logic_vector(1031,11);
WHEN "1010011000" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(13385710,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(44860194,28);
logexp <= conv_std_logic_vector(1031,11);
WHEN "1010011001" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(13431136,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(69992511,28);
logexp <= conv_std_logic_vector(1031,11);
WHEN "1010011010" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(13476562,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(95124828,28);
logexp <= conv_std_logic_vector(1031,11);
WHEN "1010011011" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(13521988,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(120257145,28);
logexp <= conv_std_logic_vector(1031,11);
WHEN "1010011100" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(13567414,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(145389462,28);
logexp <= conv_std_logic_vector(1031,11);
WHEN "1010011101" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(13612840,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(170521779,28);
logexp <= conv_std_logic_vector(1031,11);
WHEN "1010011110" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(13658266,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(195654096,28);
logexp <= conv_std_logic_vector(1031,11);
WHEN "1010011111" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(13703692,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(220786413,28);
logexp <= conv_std_logic_vector(1031,11);
WHEN "1010100000" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(13749118,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(245918730,28);
logexp <= conv_std_logic_vector(1031,11);
WHEN "1010100001" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(13794545,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(2615591,28);
logexp <= conv_std_logic_vector(1031,11);
WHEN "1010100010" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(13839971,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(27747908,28);
logexp <= conv_std_logic_vector(1031,11);
WHEN "1010100011" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(13885397,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(52880225,28);
logexp <= conv_std_logic_vector(1031,11);
WHEN "1010100100" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(13930823,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(78012542,28);
logexp <= conv_std_logic_vector(1031,11);
WHEN "1010100101" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(13976249,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(103144859,28);
logexp <= conv_std_logic_vector(1031,11);
WHEN "1010100110" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(14021675,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(128277176,28);
logexp <= conv_std_logic_vector(1031,11);
WHEN "1010100111" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(14067101,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(153409493,28);
logexp <= conv_std_logic_vector(1031,11);
WHEN "1010101000" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(14112527,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(178541810,28);
logexp <= conv_std_logic_vector(1031,11);
WHEN "1010101001" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(14157953,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(203674127,28);
logexp <= conv_std_logic_vector(1031,11);
WHEN "1010101010" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(14203379,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(228806444,28);
logexp <= conv_std_logic_vector(1031,11);
WHEN "1010101011" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(14248805,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(253938761,28);
logexp <= conv_std_logic_vector(1031,11);
WHEN "1010101100" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(14294232,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(10635622,28);
logexp <= conv_std_logic_vector(1031,11);
WHEN "1010101101" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(14339658,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(35767939,28);
logexp <= conv_std_logic_vector(1031,11);
WHEN "1010101110" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(14385084,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(60900256,28);
logexp <= conv_std_logic_vector(1031,11);
WHEN "1010101111" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(14430510,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(86032572,28);
logexp <= conv_std_logic_vector(1031,11);
WHEN "1010110000" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(14475936,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(111164889,28);
logexp <= conv_std_logic_vector(1031,11);
WHEN "1010110001" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(14521362,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(136297206,28);
logexp <= conv_std_logic_vector(1031,11);
WHEN "1010110010" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(14566788,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(161429523,28);
logexp <= conv_std_logic_vector(1031,11);
WHEN "1010110011" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(14612214,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(186561840,28);
logexp <= conv_std_logic_vector(1031,11);
WHEN "1010110100" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(14657640,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(211694157,28);
logexp <= conv_std_logic_vector(1031,11);
WHEN "1010110101" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(14703066,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(236826474,28);
logexp <= conv_std_logic_vector(1031,11);
WHEN "1010110110" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(14748492,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(261958791,28);
logexp <= conv_std_logic_vector(1031,11);
WHEN "1010110111" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(14793919,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(18655652,28);
logexp <= conv_std_logic_vector(1031,11);
WHEN "1010111000" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(14839345,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(43787969,28);
logexp <= conv_std_logic_vector(1031,11);
WHEN "1010111001" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(14884771,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(68920286,28);
logexp <= conv_std_logic_vector(1031,11);
WHEN "1010111010" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(14930197,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(94052603,28);
logexp <= conv_std_logic_vector(1031,11);
WHEN "1010111011" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(14975623,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(119184920,28);
logexp <= conv_std_logic_vector(1031,11);
WHEN "1010111100" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(15021049,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(144317237,28);
logexp <= conv_std_logic_vector(1031,11);
WHEN "1010111101" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(15066475,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(169449554,28);
logexp <= conv_std_logic_vector(1031,11);
WHEN "1010111110" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(15111901,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(194581871,28);
logexp <= conv_std_logic_vector(1031,11);
WHEN "1010111111" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(15157327,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(219714188,28);
logexp <= conv_std_logic_vector(1031,11);
WHEN "1011000000" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(15202753,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(244846505,28);
logexp <= conv_std_logic_vector(1031,11);
WHEN "1011000001" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(15248180,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(1543366,28);
logexp <= conv_std_logic_vector(1031,11);
WHEN "1011000010" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(15293606,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(26675683,28);
logexp <= conv_std_logic_vector(1031,11);
WHEN "1011000011" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(15339032,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(51808000,28);
logexp <= conv_std_logic_vector(1031,11);
WHEN "1011000100" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(15384458,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(76940317,28);
logexp <= conv_std_logic_vector(1031,11);
WHEN "1011000101" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(15429884,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(102072634,28);
logexp <= conv_std_logic_vector(1031,11);
WHEN "1011000110" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(15475310,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(127204951,28);
logexp <= conv_std_logic_vector(1031,11);
WHEN "1011000111" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(15520736,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(152337268,28);
logexp <= conv_std_logic_vector(1031,11);
WHEN "1011001000" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(15566162,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(177469585,28);
logexp <= conv_std_logic_vector(1031,11);
WHEN "1011001001" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(15611588,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(202601902,28);
logexp <= conv_std_logic_vector(1031,11);
WHEN "1011001010" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(15657014,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(227734219,28);
logexp <= conv_std_logic_vector(1031,11);
WHEN "1011001011" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(15702440,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(252866536,28);
logexp <= conv_std_logic_vector(1031,11);
WHEN "1011001100" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(15747867,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(9563397,28);
logexp <= conv_std_logic_vector(1031,11);
WHEN "1011001101" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(15793293,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(34695713,28);
logexp <= conv_std_logic_vector(1031,11);
WHEN "1011001110" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(15838719,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(59828030,28);
logexp <= conv_std_logic_vector(1031,11);
WHEN "1011001111" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(15884145,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(84960347,28);
logexp <= conv_std_logic_vector(1031,11);
WHEN "1011010000" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(15929571,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(110092664,28);
logexp <= conv_std_logic_vector(1031,11);
WHEN "1011010001" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(15974997,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(135224981,28);
logexp <= conv_std_logic_vector(1031,11);
WHEN "1011010010" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(16020423,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(160357298,28);
logexp <= conv_std_logic_vector(1031,11);
WHEN "1011010011" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(16065849,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(185489615,28);
logexp <= conv_std_logic_vector(1031,11);
WHEN "1011010100" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(16111275,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(210621932,28);
logexp <= conv_std_logic_vector(1031,11);
WHEN "1011010101" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(16156701,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(235754249,28);
logexp <= conv_std_logic_vector(1031,11);
WHEN "1011010110" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(16202127,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(260886566,28);
logexp <= conv_std_logic_vector(1031,11);
WHEN "1011010111" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(16247554,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(17583427,28);
logexp <= conv_std_logic_vector(1031,11);
WHEN "1011011000" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(16292980,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(42715744,28);
logexp <= conv_std_logic_vector(1031,11);
WHEN "1011011001" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(16338406,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(67848061,28);
logexp <= conv_std_logic_vector(1031,11);
WHEN "1011011010" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(16383832,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(92980378,28);
logexp <= conv_std_logic_vector(1031,11);
WHEN "1011011011" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(16429258,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(118112695,28);
logexp <= conv_std_logic_vector(1031,11);
WHEN "1011011100" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(16474684,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(143245012,28);
logexp <= conv_std_logic_vector(1031,11);
WHEN "1011011101" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(16520110,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(168377329,28);
logexp <= conv_std_logic_vector(1031,11);
WHEN "1011011110" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(16565536,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(193509646,28);
logexp <= conv_std_logic_vector(1031,11);
WHEN "1011011111" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(16610962,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(218641963,28);
logexp <= conv_std_logic_vector(1031,11);
WHEN "1011100000" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(16656388,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(243774280,28);
logexp <= conv_std_logic_vector(1031,11);
WHEN "1011100001" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(16701815,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(471141,28);
logexp <= conv_std_logic_vector(1031,11);
WHEN "1011100010" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(16747241,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(25603458,28);
logexp <= conv_std_logic_vector(1031,11);
WHEN "1011100011" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(7725,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(159585615,28);
logexp <= conv_std_logic_vector(1032,11);
WHEN "1011100100" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(30438,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(172151774,28);
logexp <= conv_std_logic_vector(1032,11);
WHEN "1011100101" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(53151,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(184717932,28);
logexp <= conv_std_logic_vector(1032,11);
WHEN "1011100110" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(75864,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(197284091,28);
logexp <= conv_std_logic_vector(1032,11);
WHEN "1011100111" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(98577,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(209850249,28);
logexp <= conv_std_logic_vector(1032,11);
WHEN "1011101000" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(121290,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(222416408,28);
logexp <= conv_std_logic_vector(1032,11);
WHEN "1011101001" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(144003,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(234982566,28);
logexp <= conv_std_logic_vector(1032,11);
WHEN "1011101010" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(166716,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(247548725,28);
logexp <= conv_std_logic_vector(1032,11);
WHEN "1011101011" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(189429,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(260114883,28);
logexp <= conv_std_logic_vector(1032,11);
WHEN "1011101100" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(212143,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(4245586,28);
logexp <= conv_std_logic_vector(1032,11);
WHEN "1011101101" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(234856,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(16811744,28);
logexp <= conv_std_logic_vector(1032,11);
WHEN "1011101110" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(257569,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(29377903,28);
logexp <= conv_std_logic_vector(1032,11);
WHEN "1011101111" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(280282,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(41944061,28);
logexp <= conv_std_logic_vector(1032,11);
WHEN "1011110000" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(302995,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(54510220,28);
logexp <= conv_std_logic_vector(1032,11);
WHEN "1011110001" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(325708,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(67076378,28);
logexp <= conv_std_logic_vector(1032,11);
WHEN "1011110010" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(348421,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(79642537,28);
logexp <= conv_std_logic_vector(1032,11);
WHEN "1011110011" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(371134,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(92208695,28);
logexp <= conv_std_logic_vector(1032,11);
WHEN "1011110100" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(393847,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(104774854,28);
logexp <= conv_std_logic_vector(1032,11);
WHEN "1011110101" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(416560,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(117341012,28);
logexp <= conv_std_logic_vector(1032,11);
WHEN "1011110110" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(439273,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(129907171,28);
logexp <= conv_std_logic_vector(1032,11);
WHEN "1011110111" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(461986,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(142473329,28);
logexp <= conv_std_logic_vector(1032,11);
WHEN "1011111000" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(484699,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(155039488,28);
logexp <= conv_std_logic_vector(1032,11);
WHEN "1011111001" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(507412,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(167605646,28);
logexp <= conv_std_logic_vector(1032,11);
WHEN "1011111010" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(530125,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(180171805,28);
logexp <= conv_std_logic_vector(1032,11);
WHEN "1011111011" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(552838,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(192737963,28);
logexp <= conv_std_logic_vector(1032,11);
WHEN "1011111100" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(575551,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(205304121,28);
logexp <= conv_std_logic_vector(1032,11);
WHEN "1011111101" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(598264,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(217870280,28);
logexp <= conv_std_logic_vector(1032,11);
WHEN "1011111110" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(620977,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(230436438,28);
logexp <= conv_std_logic_vector(1032,11);
WHEN "1011111111" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(643690,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(243002597,28);
logexp <= conv_std_logic_vector(1032,11);
WHEN "1100000000" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(666403,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(255568755,28);
logexp <= conv_std_logic_vector(1032,11);
WHEN "1100000001" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(689116,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(268134914,28);
logexp <= conv_std_logic_vector(1032,11);
WHEN "1100000010" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(711830,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(12265616,28);
logexp <= conv_std_logic_vector(1032,11);
WHEN "1100000011" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(734543,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(24831775,28);
logexp <= conv_std_logic_vector(1032,11);
WHEN "1100000100" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(757256,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(37397933,28);
logexp <= conv_std_logic_vector(1032,11);
WHEN "1100000101" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(779969,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(49964092,28);
logexp <= conv_std_logic_vector(1032,11);
WHEN "1100000110" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(802682,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(62530250,28);
logexp <= conv_std_logic_vector(1032,11);
WHEN "1100000111" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(825395,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(75096409,28);
logexp <= conv_std_logic_vector(1032,11);
WHEN "1100001000" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(848108,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(87662567,28);
logexp <= conv_std_logic_vector(1032,11);
WHEN "1100001001" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(870821,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(100228726,28);
logexp <= conv_std_logic_vector(1032,11);
WHEN "1100001010" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(893534,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(112794884,28);
logexp <= conv_std_logic_vector(1032,11);
WHEN "1100001011" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(916247,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(125361043,28);
logexp <= conv_std_logic_vector(1032,11);
WHEN "1100001100" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(938960,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(137927201,28);
logexp <= conv_std_logic_vector(1032,11);
WHEN "1100001101" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(961673,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(150493360,28);
logexp <= conv_std_logic_vector(1032,11);
WHEN "1100001110" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(984386,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(163059518,28);
logexp <= conv_std_logic_vector(1032,11);
WHEN "1100001111" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(1007099,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(175625677,28);
logexp <= conv_std_logic_vector(1032,11);
WHEN "1100010000" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(1029812,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(188191835,28);
logexp <= conv_std_logic_vector(1032,11);
WHEN "1100010001" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(1052525,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(200757994,28);
logexp <= conv_std_logic_vector(1032,11);
WHEN "1100010010" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(1075238,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(213324152,28);
logexp <= conv_std_logic_vector(1032,11);
WHEN "1100010011" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(1097951,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(225890311,28);
logexp <= conv_std_logic_vector(1032,11);
WHEN "1100010100" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(1120664,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(238456469,28);
logexp <= conv_std_logic_vector(1032,11);
WHEN "1100010101" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(1143377,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(251022628,28);
logexp <= conv_std_logic_vector(1032,11);
WHEN "1100010110" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(1166090,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(263588786,28);
logexp <= conv_std_logic_vector(1032,11);
WHEN "1100010111" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(1188804,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(7719489,28);
logexp <= conv_std_logic_vector(1032,11);
WHEN "1100011000" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(1211517,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(20285647,28);
logexp <= conv_std_logic_vector(1032,11);
WHEN "1100011001" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(1234230,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(32851805,28);
logexp <= conv_std_logic_vector(1032,11);
WHEN "1100011010" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(1256943,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(45417964,28);
logexp <= conv_std_logic_vector(1032,11);
WHEN "1100011011" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(1279656,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(57984122,28);
logexp <= conv_std_logic_vector(1032,11);
WHEN "1100011100" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(1302369,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(70550281,28);
logexp <= conv_std_logic_vector(1032,11);
WHEN "1100011101" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(1325082,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(83116439,28);
logexp <= conv_std_logic_vector(1032,11);
WHEN "1100011110" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(1347795,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(95682598,28);
logexp <= conv_std_logic_vector(1032,11);
WHEN "1100011111" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(1370508,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(108248756,28);
logexp <= conv_std_logic_vector(1032,11);
WHEN "1100100000" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(1393221,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(120814915,28);
logexp <= conv_std_logic_vector(1032,11);
WHEN "1100100001" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(1415934,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(133381073,28);
logexp <= conv_std_logic_vector(1032,11);
WHEN "1100100010" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(1438647,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(145947232,28);
logexp <= conv_std_logic_vector(1032,11);
WHEN "1100100011" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(1461360,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(158513390,28);
logexp <= conv_std_logic_vector(1032,11);
WHEN "1100100100" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(1484073,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(171079549,28);
logexp <= conv_std_logic_vector(1032,11);
WHEN "1100100101" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(1506786,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(183645707,28);
logexp <= conv_std_logic_vector(1032,11);
WHEN "1100100110" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(1529499,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(196211866,28);
logexp <= conv_std_logic_vector(1032,11);
WHEN "1100100111" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(1552212,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(208778024,28);
logexp <= conv_std_logic_vector(1032,11);
WHEN "1100101000" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(1574925,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(221344183,28);
logexp <= conv_std_logic_vector(1032,11);
WHEN "1100101001" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(1597638,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(233910341,28);
logexp <= conv_std_logic_vector(1032,11);
WHEN "1100101010" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(1620351,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(246476500,28);
logexp <= conv_std_logic_vector(1032,11);
WHEN "1100101011" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(1643064,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(259042658,28);
logexp <= conv_std_logic_vector(1032,11);
WHEN "1100101100" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(1665778,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(3173361,28);
logexp <= conv_std_logic_vector(1032,11);
WHEN "1100101101" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(1688491,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(15739519,28);
logexp <= conv_std_logic_vector(1032,11);
WHEN "1100101110" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(1711204,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(28305678,28);
logexp <= conv_std_logic_vector(1032,11);
WHEN "1100101111" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(1733917,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(40871836,28);
logexp <= conv_std_logic_vector(1032,11);
WHEN "1100110000" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(1756630,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(53437995,28);
logexp <= conv_std_logic_vector(1032,11);
WHEN "1100110001" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(1779343,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(66004153,28);
logexp <= conv_std_logic_vector(1032,11);
WHEN "1100110010" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(1802056,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(78570312,28);
logexp <= conv_std_logic_vector(1032,11);
WHEN "1100110011" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(1824769,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(91136470,28);
logexp <= conv_std_logic_vector(1032,11);
WHEN "1100110100" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(1847482,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(103702629,28);
logexp <= conv_std_logic_vector(1032,11);
WHEN "1100110101" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(1870195,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(116268787,28);
logexp <= conv_std_logic_vector(1032,11);
WHEN "1100110110" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(1892908,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(128834946,28);
logexp <= conv_std_logic_vector(1032,11);
WHEN "1100110111" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(1915621,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(141401104,28);
logexp <= conv_std_logic_vector(1032,11);
WHEN "1100111000" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(1938334,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(153967262,28);
logexp <= conv_std_logic_vector(1032,11);
WHEN "1100111001" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(1961047,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(166533421,28);
logexp <= conv_std_logic_vector(1032,11);
WHEN "1100111010" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(1983760,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(179099579,28);
logexp <= conv_std_logic_vector(1032,11);
WHEN "1100111011" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(2006473,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(191665738,28);
logexp <= conv_std_logic_vector(1032,11);
WHEN "1100111100" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(2029186,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(204231896,28);
logexp <= conv_std_logic_vector(1032,11);
WHEN "1100111101" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(2051899,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(216798055,28);
logexp <= conv_std_logic_vector(1032,11);
WHEN "1100111110" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(2074612,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(229364213,28);
logexp <= conv_std_logic_vector(1032,11);
WHEN "1100111111" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(2097325,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(241930372,28);
logexp <= conv_std_logic_vector(1032,11);
WHEN "1101000000" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(2120038,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(254496530,28);
logexp <= conv_std_logic_vector(1032,11);
WHEN "1101000001" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(2142751,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(267062689,28);
logexp <= conv_std_logic_vector(1032,11);
WHEN "1101000010" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(2165465,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(11193391,28);
logexp <= conv_std_logic_vector(1032,11);
WHEN "1101000011" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(2188178,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(23759550,28);
logexp <= conv_std_logic_vector(1032,11);
WHEN "1101000100" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(2210891,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(36325708,28);
logexp <= conv_std_logic_vector(1032,11);
WHEN "1101000101" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(2233604,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(48891867,28);
logexp <= conv_std_logic_vector(1032,11);
WHEN "1101000110" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(2256317,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(61458025,28);
logexp <= conv_std_logic_vector(1032,11);
WHEN "1101000111" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(2279030,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(74024184,28);
logexp <= conv_std_logic_vector(1032,11);
WHEN "1101001000" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(2301743,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(86590342,28);
logexp <= conv_std_logic_vector(1032,11);
WHEN "1101001001" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(2324456,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(99156501,28);
logexp <= conv_std_logic_vector(1032,11);
WHEN "1101001010" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(2347169,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(111722659,28);
logexp <= conv_std_logic_vector(1032,11);
WHEN "1101001011" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(2369882,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(124288818,28);
logexp <= conv_std_logic_vector(1032,11);
WHEN "1101001100" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(2392595,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(136854976,28);
logexp <= conv_std_logic_vector(1032,11);
WHEN "1101001101" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(2415308,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(149421135,28);
logexp <= conv_std_logic_vector(1032,11);
WHEN "1101001110" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(2438021,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(161987293,28);
logexp <= conv_std_logic_vector(1032,11);
WHEN "1101001111" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(2460734,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(174553452,28);
logexp <= conv_std_logic_vector(1032,11);
WHEN "1101010000" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(2483447,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(187119610,28);
logexp <= conv_std_logic_vector(1032,11);
WHEN "1101010001" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(2506160,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(199685769,28);
logexp <= conv_std_logic_vector(1032,11);
WHEN "1101010010" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(2528873,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(212251927,28);
logexp <= conv_std_logic_vector(1032,11);
WHEN "1101010011" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(2551586,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(224818086,28);
logexp <= conv_std_logic_vector(1032,11);
WHEN "1101010100" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(2574299,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(237384244,28);
logexp <= conv_std_logic_vector(1032,11);
WHEN "1101010101" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(2597012,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(249950403,28);
logexp <= conv_std_logic_vector(1032,11);
WHEN "1101010110" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(2619725,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(262516561,28);
logexp <= conv_std_logic_vector(1032,11);
WHEN "1101010111" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(2642439,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(6647263,28);
logexp <= conv_std_logic_vector(1032,11);
WHEN "1101011000" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(2665152,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(19213422,28);
logexp <= conv_std_logic_vector(1032,11);
WHEN "1101011001" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(2687865,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(31779580,28);
logexp <= conv_std_logic_vector(1032,11);
WHEN "1101011010" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(2710578,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(44345739,28);
logexp <= conv_std_logic_vector(1032,11);
WHEN "1101011011" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(2733291,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(56911897,28);
logexp <= conv_std_logic_vector(1032,11);
WHEN "1101011100" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(2756004,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(69478056,28);
logexp <= conv_std_logic_vector(1032,11);
WHEN "1101011101" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(2778717,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(82044214,28);
logexp <= conv_std_logic_vector(1032,11);
WHEN "1101011110" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(2801430,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(94610373,28);
logexp <= conv_std_logic_vector(1032,11);
WHEN "1101011111" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(2824143,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(107176531,28);
logexp <= conv_std_logic_vector(1032,11);
WHEN "1101100000" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(2846856,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(119742690,28);
logexp <= conv_std_logic_vector(1032,11);
WHEN "1101100001" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(2869569,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(132308848,28);
logexp <= conv_std_logic_vector(1032,11);
WHEN "1101100010" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(2892282,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(144875007,28);
logexp <= conv_std_logic_vector(1032,11);
WHEN "1101100011" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(2914995,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(157441165,28);
logexp <= conv_std_logic_vector(1032,11);
WHEN "1101100100" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(2937708,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(170007324,28);
logexp <= conv_std_logic_vector(1032,11);
WHEN "1101100101" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(2960421,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(182573482,28);
logexp <= conv_std_logic_vector(1032,11);
WHEN "1101100110" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(2983134,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(195139641,28);
logexp <= conv_std_logic_vector(1032,11);
WHEN "1101100111" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(3005847,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(207705799,28);
logexp <= conv_std_logic_vector(1032,11);
WHEN "1101101000" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(3028560,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(220271958,28);
logexp <= conv_std_logic_vector(1032,11);
WHEN "1101101001" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(3051273,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(232838116,28);
logexp <= conv_std_logic_vector(1032,11);
WHEN "1101101010" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(3073986,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(245404275,28);
logexp <= conv_std_logic_vector(1032,11);
WHEN "1101101011" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(3096699,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(257970433,28);
logexp <= conv_std_logic_vector(1032,11);
WHEN "1101101100" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(3119413,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(2101136,28);
logexp <= conv_std_logic_vector(1032,11);
WHEN "1101101101" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(3142126,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(14667294,28);
logexp <= conv_std_logic_vector(1032,11);
WHEN "1101101110" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(3164839,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(27233453,28);
logexp <= conv_std_logic_vector(1032,11);
WHEN "1101101111" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(3187552,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(39799611,28);
logexp <= conv_std_logic_vector(1032,11);
WHEN "1101110000" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(3210265,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(52365770,28);
logexp <= conv_std_logic_vector(1032,11);
WHEN "1101110001" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(3232978,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(64931928,28);
logexp <= conv_std_logic_vector(1032,11);
WHEN "1101110010" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(3255691,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(77498087,28);
logexp <= conv_std_logic_vector(1032,11);
WHEN "1101110011" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(3278404,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(90064245,28);
logexp <= conv_std_logic_vector(1032,11);
WHEN "1101110100" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(3301117,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(102630404,28);
logexp <= conv_std_logic_vector(1032,11);
WHEN "1101110101" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(3323830,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(115196562,28);
logexp <= conv_std_logic_vector(1032,11);
WHEN "1101110110" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(3346543,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(127762720,28);
logexp <= conv_std_logic_vector(1032,11);
WHEN "1101110111" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(3369256,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(140328879,28);
logexp <= conv_std_logic_vector(1032,11);
WHEN "1101111000" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(3391969,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(152895037,28);
logexp <= conv_std_logic_vector(1032,11);
WHEN "1101111001" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(3414682,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(165461196,28);
logexp <= conv_std_logic_vector(1032,11);
WHEN "1101111010" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(3437395,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(178027354,28);
logexp <= conv_std_logic_vector(1032,11);
WHEN "1101111011" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(3460108,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(190593513,28);
logexp <= conv_std_logic_vector(1032,11);
WHEN "1101111100" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(3482821,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(203159671,28);
logexp <= conv_std_logic_vector(1032,11);
WHEN "1101111101" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(3505534,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(215725830,28);
logexp <= conv_std_logic_vector(1032,11);
WHEN "1101111110" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(3528247,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(228291988,28);
logexp <= conv_std_logic_vector(1032,11);
WHEN "1101111111" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(3550960,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(240858147,28);
logexp <= conv_std_logic_vector(1032,11);
WHEN "1110000000" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(3573673,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(253424305,28);
logexp <= conv_std_logic_vector(1032,11);
WHEN "1110000001" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(3596386,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(265990464,28);
logexp <= conv_std_logic_vector(1032,11);
WHEN "1110000010" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(3619100,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(10121166,28);
logexp <= conv_std_logic_vector(1032,11);
WHEN "1110000011" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(3641813,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(22687325,28);
logexp <= conv_std_logic_vector(1032,11);
WHEN "1110000100" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(3664526,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(35253483,28);
logexp <= conv_std_logic_vector(1032,11);
WHEN "1110000101" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(3687239,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(47819642,28);
logexp <= conv_std_logic_vector(1032,11);
WHEN "1110000110" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(3709952,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(60385800,28);
logexp <= conv_std_logic_vector(1032,11);
WHEN "1110000111" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(3732665,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(72951959,28);
logexp <= conv_std_logic_vector(1032,11);
WHEN "1110001000" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(3755378,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(85518117,28);
logexp <= conv_std_logic_vector(1032,11);
WHEN "1110001001" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(3778091,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(98084276,28);
logexp <= conv_std_logic_vector(1032,11);
WHEN "1110001010" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(3800804,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(110650434,28);
logexp <= conv_std_logic_vector(1032,11);
WHEN "1110001011" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(3823517,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(123216593,28);
logexp <= conv_std_logic_vector(1032,11);
WHEN "1110001100" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(3846230,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(135782751,28);
logexp <= conv_std_logic_vector(1032,11);
WHEN "1110001101" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(3868943,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(148348910,28);
logexp <= conv_std_logic_vector(1032,11);
WHEN "1110001110" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(3891656,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(160915068,28);
logexp <= conv_std_logic_vector(1032,11);
WHEN "1110001111" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(3914369,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(173481227,28);
logexp <= conv_std_logic_vector(1032,11);
WHEN "1110010000" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(3937082,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(186047385,28);
logexp <= conv_std_logic_vector(1032,11);
WHEN "1110010001" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(3959795,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(198613544,28);
logexp <= conv_std_logic_vector(1032,11);
WHEN "1110010010" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(3982508,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(211179702,28);
logexp <= conv_std_logic_vector(1032,11);
WHEN "1110010011" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(4005221,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(223745860,28);
logexp <= conv_std_logic_vector(1032,11);
WHEN "1110010100" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(4027934,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(236312019,28);
logexp <= conv_std_logic_vector(1032,11);
WHEN "1110010101" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(4050647,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(248878177,28);
logexp <= conv_std_logic_vector(1032,11);
WHEN "1110010110" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(4073360,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(261444336,28);
logexp <= conv_std_logic_vector(1032,11);
WHEN "1110010111" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(4096074,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(5575038,28);
logexp <= conv_std_logic_vector(1032,11);
WHEN "1110011000" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(4118787,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(18141197,28);
logexp <= conv_std_logic_vector(1032,11);
WHEN "1110011001" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(4141500,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(30707355,28);
logexp <= conv_std_logic_vector(1032,11);
WHEN "1110011010" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(4164213,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(43273514,28);
logexp <= conv_std_logic_vector(1032,11);
WHEN "1110011011" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(4186926,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(55839672,28);
logexp <= conv_std_logic_vector(1032,11);
WHEN "1110011100" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(4209639,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(68405831,28);
logexp <= conv_std_logic_vector(1032,11);
WHEN "1110011101" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(4232352,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(80971989,28);
logexp <= conv_std_logic_vector(1032,11);
WHEN "1110011110" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(4255065,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(93538148,28);
logexp <= conv_std_logic_vector(1032,11);
WHEN "1110011111" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(4277778,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(106104306,28);
logexp <= conv_std_logic_vector(1032,11);
WHEN "1110100000" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(4300491,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(118670465,28);
logexp <= conv_std_logic_vector(1032,11);
WHEN "1110100001" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(4323204,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(131236623,28);
logexp <= conv_std_logic_vector(1032,11);
WHEN "1110100010" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(4345917,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(143802782,28);
logexp <= conv_std_logic_vector(1032,11);
WHEN "1110100011" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(4368630,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(156368940,28);
logexp <= conv_std_logic_vector(1032,11);
WHEN "1110100100" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(4391343,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(168935099,28);
logexp <= conv_std_logic_vector(1032,11);
WHEN "1110100101" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(4414056,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(181501257,28);
logexp <= conv_std_logic_vector(1032,11);
WHEN "1110100110" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(4436769,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(194067416,28);
logexp <= conv_std_logic_vector(1032,11);
WHEN "1110100111" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(4459482,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(206633574,28);
logexp <= conv_std_logic_vector(1032,11);
WHEN "1110101000" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(4482195,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(219199733,28);
logexp <= conv_std_logic_vector(1032,11);
WHEN "1110101001" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(4504908,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(231765891,28);
logexp <= conv_std_logic_vector(1032,11);
WHEN "1110101010" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(4527621,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(244332050,28);
logexp <= conv_std_logic_vector(1032,11);
WHEN "1110101011" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(4550334,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(256898208,28);
logexp <= conv_std_logic_vector(1032,11);
WHEN "1110101100" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(4573048,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(1028911,28);
logexp <= conv_std_logic_vector(1032,11);
WHEN "1110101101" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(4595761,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(13595069,28);
logexp <= conv_std_logic_vector(1032,11);
WHEN "1110101110" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(4618474,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(26161228,28);
logexp <= conv_std_logic_vector(1032,11);
WHEN "1110101111" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(4641187,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(38727386,28);
logexp <= conv_std_logic_vector(1032,11);
WHEN "1110110000" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(4663900,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(51293545,28);
logexp <= conv_std_logic_vector(1032,11);
WHEN "1110110001" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(4686613,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(63859703,28);
logexp <= conv_std_logic_vector(1032,11);
WHEN "1110110010" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(4709326,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(76425861,28);
logexp <= conv_std_logic_vector(1032,11);
WHEN "1110110011" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(4732039,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(88992020,28);
logexp <= conv_std_logic_vector(1032,11);
WHEN "1110110100" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(4754752,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(101558178,28);
logexp <= conv_std_logic_vector(1032,11);
WHEN "1110110101" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(4777465,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(114124337,28);
logexp <= conv_std_logic_vector(1032,11);
WHEN "1110110110" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(4800178,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(126690495,28);
logexp <= conv_std_logic_vector(1032,11);
WHEN "1110110111" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(4822891,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(139256654,28);
logexp <= conv_std_logic_vector(1032,11);
WHEN "1110111000" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(4845604,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(151822812,28);
logexp <= conv_std_logic_vector(1032,11);
WHEN "1110111001" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(4868317,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(164388971,28);
logexp <= conv_std_logic_vector(1032,11);
WHEN "1110111010" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(4891030,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(176955129,28);
logexp <= conv_std_logic_vector(1032,11);
WHEN "1110111011" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(4913743,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(189521288,28);
logexp <= conv_std_logic_vector(1032,11);
WHEN "1110111100" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(4936456,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(202087446,28);
logexp <= conv_std_logic_vector(1032,11);
WHEN "1110111101" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(4959169,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(214653605,28);
logexp <= conv_std_logic_vector(1032,11);
WHEN "1110111110" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(4981882,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(227219763,28);
logexp <= conv_std_logic_vector(1032,11);
WHEN "1110111111" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(5004595,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(239785922,28);
logexp <= conv_std_logic_vector(1032,11);
WHEN "1111000000" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(5027308,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(252352080,28);
logexp <= conv_std_logic_vector(1032,11);
WHEN "1111000001" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(5050021,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(264918239,28);
logexp <= conv_std_logic_vector(1032,11);
WHEN "1111000010" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(5072735,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(9048941,28);
logexp <= conv_std_logic_vector(1032,11);
WHEN "1111000011" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(5095448,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(21615100,28);
logexp <= conv_std_logic_vector(1032,11);
WHEN "1111000100" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(5118161,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(34181258,28);
logexp <= conv_std_logic_vector(1032,11);
WHEN "1111000101" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(5140874,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(46747417,28);
logexp <= conv_std_logic_vector(1032,11);
WHEN "1111000110" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(5163587,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(59313575,28);
logexp <= conv_std_logic_vector(1032,11);
WHEN "1111000111" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(5186300,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(71879734,28);
logexp <= conv_std_logic_vector(1032,11);
WHEN "1111001000" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(5209013,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(84445892,28);
logexp <= conv_std_logic_vector(1032,11);
WHEN "1111001001" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(5231726,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(97012051,28);
logexp <= conv_std_logic_vector(1032,11);
WHEN "1111001010" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(5254439,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(109578209,28);
logexp <= conv_std_logic_vector(1032,11);
WHEN "1111001011" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(5277152,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(122144368,28);
logexp <= conv_std_logic_vector(1032,11);
WHEN "1111001100" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(5299865,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(134710526,28);
logexp <= conv_std_logic_vector(1032,11);
WHEN "1111001101" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(5322578,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(147276685,28);
logexp <= conv_std_logic_vector(1032,11);
WHEN "1111001110" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(5345291,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(159842843,28);
logexp <= conv_std_logic_vector(1032,11);
WHEN "1111001111" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(5368004,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(172409002,28);
logexp <= conv_std_logic_vector(1032,11);
WHEN "1111010000" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(5390717,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(184975160,28);
logexp <= conv_std_logic_vector(1032,11);
WHEN "1111010001" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(5413430,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(197541318,28);
logexp <= conv_std_logic_vector(1032,11);
WHEN "1111010010" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(5436143,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(210107477,28);
logexp <= conv_std_logic_vector(1032,11);
WHEN "1111010011" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(5458856,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(222673635,28);
logexp <= conv_std_logic_vector(1032,11);
WHEN "1111010100" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(5481569,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(235239794,28);
logexp <= conv_std_logic_vector(1032,11);
WHEN "1111010101" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(5504282,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(247805952,28);
logexp <= conv_std_logic_vector(1032,11);
WHEN "1111010110" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(5526995,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(260372111,28);
logexp <= conv_std_logic_vector(1032,11);
WHEN "1111010111" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(5549709,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(4502813,28);
logexp <= conv_std_logic_vector(1032,11);
WHEN "1111011000" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(5572422,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(17068972,28);
logexp <= conv_std_logic_vector(1032,11);
WHEN "1111011001" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(5595135,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(29635130,28);
logexp <= conv_std_logic_vector(1032,11);
WHEN "1111011010" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(5617848,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(42201289,28);
logexp <= conv_std_logic_vector(1032,11);
WHEN "1111011011" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(5640561,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(54767447,28);
logexp <= conv_std_logic_vector(1032,11);
WHEN "1111011100" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(5663274,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(67333606,28);
logexp <= conv_std_logic_vector(1032,11);
WHEN "1111011101" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(5685987,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(79899764,28);
logexp <= conv_std_logic_vector(1032,11);
WHEN "1111011110" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(5708700,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(92465923,28);
logexp <= conv_std_logic_vector(1032,11);
WHEN "1111011111" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(5731413,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(105032081,28);
logexp <= conv_std_logic_vector(1032,11);
WHEN "1111100000" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(5754126,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(117598240,28);
logexp <= conv_std_logic_vector(1032,11);
WHEN "1111100001" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(5776839,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(130164398,28);
logexp <= conv_std_logic_vector(1032,11);
WHEN "1111100010" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(5799552,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(142730557,28);
logexp <= conv_std_logic_vector(1032,11);
WHEN "1111100011" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(5822265,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(155296715,28);
logexp <= conv_std_logic_vector(1032,11);
WHEN "1111100100" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(5844978,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(167862874,28);
logexp <= conv_std_logic_vector(1032,11);
WHEN "1111100101" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(5867691,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(180429032,28);
logexp <= conv_std_logic_vector(1032,11);
WHEN "1111100110" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(5890404,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(192995191,28);
logexp <= conv_std_logic_vector(1032,11);
WHEN "1111100111" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(5913117,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(205561349,28);
logexp <= conv_std_logic_vector(1032,11);
WHEN "1111101000" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(5935830,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(218127508,28);
logexp <= conv_std_logic_vector(1032,11);
WHEN "1111101001" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(5958543,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(230693666,28);
logexp <= conv_std_logic_vector(1032,11);
WHEN "1111101010" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(5981256,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(243259825,28);
logexp <= conv_std_logic_vector(1032,11);
WHEN "1111101011" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(6003969,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(255825983,28);
logexp <= conv_std_logic_vector(1032,11);
WHEN "1111101100" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(6026682,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(268392142,28);
logexp <= conv_std_logic_vector(1032,11);
WHEN "1111101101" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(6049396,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(12522844,28);
logexp <= conv_std_logic_vector(1032,11);
WHEN "1111101110" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(6072109,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(25089003,28);
logexp <= conv_std_logic_vector(1032,11);
WHEN "1111101111" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(6094822,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(37655161,28);
logexp <= conv_std_logic_vector(1032,11);
WHEN "1111110000" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(6117535,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(50221319,28);
logexp <= conv_std_logic_vector(1032,11);
WHEN "1111110001" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(6140248,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(62787478,28);
logexp <= conv_std_logic_vector(1032,11);
WHEN "1111110010" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(6162961,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(75353636,28);
logexp <= conv_std_logic_vector(1032,11);
WHEN "1111110011" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(6185674,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(87919795,28);
logexp <= conv_std_logic_vector(1032,11);
WHEN "1111110100" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(6208387,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(100485953,28);
logexp <= conv_std_logic_vector(1032,11);
WHEN "1111110101" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(6231100,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(113052112,28);
logexp <= conv_std_logic_vector(1032,11);
WHEN "1111110110" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(6253813,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(125618270,28);
logexp <= conv_std_logic_vector(1032,11);
WHEN "1111110111" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(6276526,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(138184429,28);
logexp <= conv_std_logic_vector(1032,11);
WHEN "1111111000" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(6299239,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(150750587,28);
logexp <= conv_std_logic_vector(1032,11);
WHEN "1111111001" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(6321952,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(163316746,28);
logexp <= conv_std_logic_vector(1032,11);
WHEN "1111111010" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(6344665,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(175882904,28);
logexp <= conv_std_logic_vector(1032,11);
WHEN "1111111011" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(6367378,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(188449063,28);
logexp <= conv_std_logic_vector(1032,11);
WHEN "1111111100" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(6390091,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(201015221,28);
logexp <= conv_std_logic_vector(1032,11);
WHEN "1111111101" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(6412804,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(213581380,28);
logexp <= conv_std_logic_vector(1032,11);
WHEN "1111111110" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(6435517,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(226147538,28);
logexp <= conv_std_logic_vector(1032,11);
WHEN "1111111111" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(6458230,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(238713697,28);
logexp <= conv_std_logic_vector(1032,11);
WHEN others =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(0,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(0,28);
logexp <= conv_std_logic_vector(0,11);
END CASE;
END PROCESS;
END rtl;
|
LIBRARY ieee;
USE ieee.std_logic_1164.all;
USE ieee.std_logic_unsigned.all;
USE ieee.std_logic_arith.all;
--***************************************************
--*** ***
--*** FLOATING POINT CORE LIBRARY ***
--*** ***
--*** DP_LNLUTPOW.VHD ***
--*** ***
--*** Function: Look Up Table - LN() ***
--*** ***
--*** Generated by MATLAB Utility ***
--*** ***
--*** 18/02/08 ML ***
--*** ***
--*** (c) 2008 Altera Corporation ***
--*** ***
--*** Change History ***
--*** ***
--*** ***
--*** ***
--*** ***
--*** ***
--***************************************************
ENTITY dp_lnlutpow IS
PORT (
add : IN STD_LOGIC_VECTOR (10 DOWNTO 1);
logman : OUT STD_LOGIC_VECTOR (52 DOWNTO 1);
logexp : OUT STD_LOGIC_VECTOR (11 DOWNTO 1)
);
END dp_lnlutpow;
ARCHITECTURE rtl OF dp_lnlutpow IS
BEGIN
pca: PROCESS (add)
BEGIN
CASE add IS
WHEN "0000000000" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(0,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(0,28);
logexp <= conv_std_logic_vector(0,11);
WHEN "0000000001" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(6480943,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(251279855,28);
logexp <= conv_std_logic_vector(1022,11);
WHEN "0000000010" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(6480943,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(251279855,28);
logexp <= conv_std_logic_vector(1023,11);
WHEN "0000000011" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(666403,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(255568755,28);
logexp <= conv_std_logic_vector(1024,11);
WHEN "0000000100" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(6480943,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(251279855,28);
logexp <= conv_std_logic_vector(1024,11);
WHEN "0000000101" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(12295483,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(246990955,28);
logexp <= conv_std_logic_vector(1024,11);
WHEN "0000000110" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(666403,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(255568755,28);
logexp <= conv_std_logic_vector(1025,11);
WHEN "0000000111" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(3573673,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(253424305,28);
logexp <= conv_std_logic_vector(1025,11);
WHEN "0000001000" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(6480943,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(251279855,28);
logexp <= conv_std_logic_vector(1025,11);
WHEN "0000001001" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(9388213,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(249135405,28);
logexp <= conv_std_logic_vector(1025,11);
WHEN "0000001010" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(12295483,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(246990955,28);
logexp <= conv_std_logic_vector(1025,11);
WHEN "0000001011" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(15202753,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(244846505,28);
logexp <= conv_std_logic_vector(1025,11);
WHEN "0000001100" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(666403,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(255568755,28);
logexp <= conv_std_logic_vector(1026,11);
WHEN "0000001101" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(2120038,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(254496530,28);
logexp <= conv_std_logic_vector(1026,11);
WHEN "0000001110" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(3573673,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(253424305,28);
logexp <= conv_std_logic_vector(1026,11);
WHEN "0000001111" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(5027308,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(252352080,28);
logexp <= conv_std_logic_vector(1026,11);
WHEN "0000010000" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(6480943,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(251279855,28);
logexp <= conv_std_logic_vector(1026,11);
WHEN "0000010001" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(7934578,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(250207630,28);
logexp <= conv_std_logic_vector(1026,11);
WHEN "0000010010" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(9388213,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(249135405,28);
logexp <= conv_std_logic_vector(1026,11);
WHEN "0000010011" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(10841848,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(248063180,28);
logexp <= conv_std_logic_vector(1026,11);
WHEN "0000010100" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(12295483,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(246990955,28);
logexp <= conv_std_logic_vector(1026,11);
WHEN "0000010101" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(13749118,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(245918730,28);
logexp <= conv_std_logic_vector(1026,11);
WHEN "0000010110" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(15202753,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(244846505,28);
logexp <= conv_std_logic_vector(1026,11);
WHEN "0000010111" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(16656388,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(243774280,28);
logexp <= conv_std_logic_vector(1026,11);
WHEN "0000011000" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(666403,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(255568755,28);
logexp <= conv_std_logic_vector(1027,11);
WHEN "0000011001" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(1393221,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(120814915,28);
logexp <= conv_std_logic_vector(1027,11);
WHEN "0000011010" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(2120038,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(254496530,28);
logexp <= conv_std_logic_vector(1027,11);
WHEN "0000011011" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(2846856,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(119742690,28);
logexp <= conv_std_logic_vector(1027,11);
WHEN "0000011100" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(3573673,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(253424305,28);
logexp <= conv_std_logic_vector(1027,11);
WHEN "0000011101" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(4300491,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(118670465,28);
logexp <= conv_std_logic_vector(1027,11);
WHEN "0000011110" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(5027308,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(252352080,28);
logexp <= conv_std_logic_vector(1027,11);
WHEN "0000011111" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(5754126,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(117598240,28);
logexp <= conv_std_logic_vector(1027,11);
WHEN "0000100000" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(6480943,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(251279855,28);
logexp <= conv_std_logic_vector(1027,11);
WHEN "0000100001" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(7207761,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(116526015,28);
logexp <= conv_std_logic_vector(1027,11);
WHEN "0000100010" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(7934578,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(250207630,28);
logexp <= conv_std_logic_vector(1027,11);
WHEN "0000100011" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(8661396,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(115453790,28);
logexp <= conv_std_logic_vector(1027,11);
WHEN "0000100100" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(9388213,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(249135405,28);
logexp <= conv_std_logic_vector(1027,11);
WHEN "0000100101" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(10115031,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(114381565,28);
logexp <= conv_std_logic_vector(1027,11);
WHEN "0000100110" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(10841848,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(248063180,28);
logexp <= conv_std_logic_vector(1027,11);
WHEN "0000100111" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(11568666,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(113309340,28);
logexp <= conv_std_logic_vector(1027,11);
WHEN "0000101000" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(12295483,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(246990955,28);
logexp <= conv_std_logic_vector(1027,11);
WHEN "0000101001" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(13022301,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(112237114,28);
logexp <= conv_std_logic_vector(1027,11);
WHEN "0000101010" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(13749118,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(245918730,28);
logexp <= conv_std_logic_vector(1027,11);
WHEN "0000101011" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(14475936,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(111164889,28);
logexp <= conv_std_logic_vector(1027,11);
WHEN "0000101100" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(15202753,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(244846505,28);
logexp <= conv_std_logic_vector(1027,11);
WHEN "0000101101" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(15929571,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(110092664,28);
logexp <= conv_std_logic_vector(1027,11);
WHEN "0000101110" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(16656388,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(243774280,28);
logexp <= conv_std_logic_vector(1027,11);
WHEN "0000101111" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(302995,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(54510220,28);
logexp <= conv_std_logic_vector(1028,11);
WHEN "0000110000" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(666403,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(255568755,28);
logexp <= conv_std_logic_vector(1028,11);
WHEN "0000110001" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(1029812,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(188191835,28);
logexp <= conv_std_logic_vector(1028,11);
WHEN "0000110010" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(1393221,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(120814915,28);
logexp <= conv_std_logic_vector(1028,11);
WHEN "0000110011" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(1756630,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(53437995,28);
logexp <= conv_std_logic_vector(1028,11);
WHEN "0000110100" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(2120038,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(254496530,28);
logexp <= conv_std_logic_vector(1028,11);
WHEN "0000110101" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(2483447,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(187119610,28);
logexp <= conv_std_logic_vector(1028,11);
WHEN "0000110110" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(2846856,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(119742690,28);
logexp <= conv_std_logic_vector(1028,11);
WHEN "0000110111" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(3210265,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(52365770,28);
logexp <= conv_std_logic_vector(1028,11);
WHEN "0000111000" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(3573673,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(253424305,28);
logexp <= conv_std_logic_vector(1028,11);
WHEN "0000111001" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(3937082,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(186047385,28);
logexp <= conv_std_logic_vector(1028,11);
WHEN "0000111010" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(4300491,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(118670465,28);
logexp <= conv_std_logic_vector(1028,11);
WHEN "0000111011" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(4663900,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(51293545,28);
logexp <= conv_std_logic_vector(1028,11);
WHEN "0000111100" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(5027308,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(252352080,28);
logexp <= conv_std_logic_vector(1028,11);
WHEN "0000111101" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(5390717,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(184975160,28);
logexp <= conv_std_logic_vector(1028,11);
WHEN "0000111110" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(5754126,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(117598240,28);
logexp <= conv_std_logic_vector(1028,11);
WHEN "0000111111" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(6117535,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(50221319,28);
logexp <= conv_std_logic_vector(1028,11);
WHEN "0001000000" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(6480943,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(251279855,28);
logexp <= conv_std_logic_vector(1028,11);
WHEN "0001000001" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(6844352,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(183902935,28);
logexp <= conv_std_logic_vector(1028,11);
WHEN "0001000010" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(7207761,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(116526015,28);
logexp <= conv_std_logic_vector(1028,11);
WHEN "0001000011" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(7571170,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(49149094,28);
logexp <= conv_std_logic_vector(1028,11);
WHEN "0001000100" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(7934578,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(250207630,28);
logexp <= conv_std_logic_vector(1028,11);
WHEN "0001000101" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(8297987,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(182830710,28);
logexp <= conv_std_logic_vector(1028,11);
WHEN "0001000110" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(8661396,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(115453790,28);
logexp <= conv_std_logic_vector(1028,11);
WHEN "0001000111" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(9024805,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(48076869,28);
logexp <= conv_std_logic_vector(1028,11);
WHEN "0001001000" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(9388213,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(249135405,28);
logexp <= conv_std_logic_vector(1028,11);
WHEN "0001001001" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(9751622,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(181758485,28);
logexp <= conv_std_logic_vector(1028,11);
WHEN "0001001010" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(10115031,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(114381565,28);
logexp <= conv_std_logic_vector(1028,11);
WHEN "0001001011" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(10478440,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(47004644,28);
logexp <= conv_std_logic_vector(1028,11);
WHEN "0001001100" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(10841848,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(248063180,28);
logexp <= conv_std_logic_vector(1028,11);
WHEN "0001001101" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(11205257,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(180686260,28);
logexp <= conv_std_logic_vector(1028,11);
WHEN "0001001110" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(11568666,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(113309340,28);
logexp <= conv_std_logic_vector(1028,11);
WHEN "0001001111" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(11932075,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(45932419,28);
logexp <= conv_std_logic_vector(1028,11);
WHEN "0001010000" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(12295483,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(246990955,28);
logexp <= conv_std_logic_vector(1028,11);
WHEN "0001010001" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(12658892,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(179614035,28);
logexp <= conv_std_logic_vector(1028,11);
WHEN "0001010010" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(13022301,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(112237114,28);
logexp <= conv_std_logic_vector(1028,11);
WHEN "0001010011" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(13385710,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(44860194,28);
logexp <= conv_std_logic_vector(1028,11);
WHEN "0001010100" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(13749118,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(245918730,28);
logexp <= conv_std_logic_vector(1028,11);
WHEN "0001010101" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(14112527,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(178541810,28);
logexp <= conv_std_logic_vector(1028,11);
WHEN "0001010110" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(14475936,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(111164889,28);
logexp <= conv_std_logic_vector(1028,11);
WHEN "0001010111" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(14839345,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(43787969,28);
logexp <= conv_std_logic_vector(1028,11);
WHEN "0001011000" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(15202753,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(244846505,28);
logexp <= conv_std_logic_vector(1028,11);
WHEN "0001011001" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(15566162,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(177469585,28);
logexp <= conv_std_logic_vector(1028,11);
WHEN "0001011010" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(15929571,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(110092664,28);
logexp <= conv_std_logic_vector(1028,11);
WHEN "0001011011" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(16292980,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(42715744,28);
logexp <= conv_std_logic_vector(1028,11);
WHEN "0001011100" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(16656388,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(243774280,28);
logexp <= conv_std_logic_vector(1028,11);
WHEN "0001011101" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(121290,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(222416408,28);
logexp <= conv_std_logic_vector(1029,11);
WHEN "0001011110" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(302995,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(54510220,28);
logexp <= conv_std_logic_vector(1029,11);
WHEN "0001011111" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(484699,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(155039488,28);
logexp <= conv_std_logic_vector(1029,11);
WHEN "0001100000" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(666403,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(255568755,28);
logexp <= conv_std_logic_vector(1029,11);
WHEN "0001100001" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(848108,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(87662567,28);
logexp <= conv_std_logic_vector(1029,11);
WHEN "0001100010" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(1029812,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(188191835,28);
logexp <= conv_std_logic_vector(1029,11);
WHEN "0001100011" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(1211517,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(20285647,28);
logexp <= conv_std_logic_vector(1029,11);
WHEN "0001100100" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(1393221,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(120814915,28);
logexp <= conv_std_logic_vector(1029,11);
WHEN "0001100101" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(1574925,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(221344183,28);
logexp <= conv_std_logic_vector(1029,11);
WHEN "0001100110" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(1756630,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(53437995,28);
logexp <= conv_std_logic_vector(1029,11);
WHEN "0001100111" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(1938334,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(153967262,28);
logexp <= conv_std_logic_vector(1029,11);
WHEN "0001101000" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(2120038,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(254496530,28);
logexp <= conv_std_logic_vector(1029,11);
WHEN "0001101001" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(2301743,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(86590342,28);
logexp <= conv_std_logic_vector(1029,11);
WHEN "0001101010" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(2483447,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(187119610,28);
logexp <= conv_std_logic_vector(1029,11);
WHEN "0001101011" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(2665152,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(19213422,28);
logexp <= conv_std_logic_vector(1029,11);
WHEN "0001101100" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(2846856,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(119742690,28);
logexp <= conv_std_logic_vector(1029,11);
WHEN "0001101101" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(3028560,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(220271958,28);
logexp <= conv_std_logic_vector(1029,11);
WHEN "0001101110" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(3210265,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(52365770,28);
logexp <= conv_std_logic_vector(1029,11);
WHEN "0001101111" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(3391969,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(152895037,28);
logexp <= conv_std_logic_vector(1029,11);
WHEN "0001110000" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(3573673,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(253424305,28);
logexp <= conv_std_logic_vector(1029,11);
WHEN "0001110001" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(3755378,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(85518117,28);
logexp <= conv_std_logic_vector(1029,11);
WHEN "0001110010" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(3937082,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(186047385,28);
logexp <= conv_std_logic_vector(1029,11);
WHEN "0001110011" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(4118787,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(18141197,28);
logexp <= conv_std_logic_vector(1029,11);
WHEN "0001110100" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(4300491,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(118670465,28);
logexp <= conv_std_logic_vector(1029,11);
WHEN "0001110101" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(4482195,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(219199733,28);
logexp <= conv_std_logic_vector(1029,11);
WHEN "0001110110" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(4663900,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(51293545,28);
logexp <= conv_std_logic_vector(1029,11);
WHEN "0001110111" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(4845604,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(151822812,28);
logexp <= conv_std_logic_vector(1029,11);
WHEN "0001111000" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(5027308,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(252352080,28);
logexp <= conv_std_logic_vector(1029,11);
WHEN "0001111001" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(5209013,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(84445892,28);
logexp <= conv_std_logic_vector(1029,11);
WHEN "0001111010" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(5390717,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(184975160,28);
logexp <= conv_std_logic_vector(1029,11);
WHEN "0001111011" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(5572422,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(17068972,28);
logexp <= conv_std_logic_vector(1029,11);
WHEN "0001111100" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(5754126,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(117598240,28);
logexp <= conv_std_logic_vector(1029,11);
WHEN "0001111101" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(5935830,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(218127508,28);
logexp <= conv_std_logic_vector(1029,11);
WHEN "0001111110" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(6117535,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(50221319,28);
logexp <= conv_std_logic_vector(1029,11);
WHEN "0001111111" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(6299239,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(150750587,28);
logexp <= conv_std_logic_vector(1029,11);
WHEN "0010000000" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(6480943,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(251279855,28);
logexp <= conv_std_logic_vector(1029,11);
WHEN "0010000001" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(6662648,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(83373667,28);
logexp <= conv_std_logic_vector(1029,11);
WHEN "0010000010" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(6844352,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(183902935,28);
logexp <= conv_std_logic_vector(1029,11);
WHEN "0010000011" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(7026057,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(15996747,28);
logexp <= conv_std_logic_vector(1029,11);
WHEN "0010000100" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(7207761,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(116526015,28);
logexp <= conv_std_logic_vector(1029,11);
WHEN "0010000101" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(7389465,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(217055283,28);
logexp <= conv_std_logic_vector(1029,11);
WHEN "0010000110" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(7571170,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(49149094,28);
logexp <= conv_std_logic_vector(1029,11);
WHEN "0010000111" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(7752874,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(149678362,28);
logexp <= conv_std_logic_vector(1029,11);
WHEN "0010001000" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(7934578,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(250207630,28);
logexp <= conv_std_logic_vector(1029,11);
WHEN "0010001001" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(8116283,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(82301442,28);
logexp <= conv_std_logic_vector(1029,11);
WHEN "0010001010" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(8297987,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(182830710,28);
logexp <= conv_std_logic_vector(1029,11);
WHEN "0010001011" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(8479692,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(14924522,28);
logexp <= conv_std_logic_vector(1029,11);
WHEN "0010001100" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(8661396,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(115453790,28);
logexp <= conv_std_logic_vector(1029,11);
WHEN "0010001101" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(8843100,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(215983058,28);
logexp <= conv_std_logic_vector(1029,11);
WHEN "0010001110" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(9024805,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(48076869,28);
logexp <= conv_std_logic_vector(1029,11);
WHEN "0010001111" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(9206509,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(148606137,28);
logexp <= conv_std_logic_vector(1029,11);
WHEN "0010010000" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(9388213,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(249135405,28);
logexp <= conv_std_logic_vector(1029,11);
WHEN "0010010001" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(9569918,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(81229217,28);
logexp <= conv_std_logic_vector(1029,11);
WHEN "0010010010" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(9751622,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(181758485,28);
logexp <= conv_std_logic_vector(1029,11);
WHEN "0010010011" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(9933327,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(13852297,28);
logexp <= conv_std_logic_vector(1029,11);
WHEN "0010010100" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(10115031,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(114381565,28);
logexp <= conv_std_logic_vector(1029,11);
WHEN "0010010101" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(10296735,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(214910832,28);
logexp <= conv_std_logic_vector(1029,11);
WHEN "0010010110" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(10478440,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(47004644,28);
logexp <= conv_std_logic_vector(1029,11);
WHEN "0010010111" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(10660144,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(147533912,28);
logexp <= conv_std_logic_vector(1029,11);
WHEN "0010011000" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(10841848,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(248063180,28);
logexp <= conv_std_logic_vector(1029,11);
WHEN "0010011001" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(11023553,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(80156992,28);
logexp <= conv_std_logic_vector(1029,11);
WHEN "0010011010" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(11205257,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(180686260,28);
logexp <= conv_std_logic_vector(1029,11);
WHEN "0010011011" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(11386962,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(12780072,28);
logexp <= conv_std_logic_vector(1029,11);
WHEN "0010011100" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(11568666,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(113309340,28);
logexp <= conv_std_logic_vector(1029,11);
WHEN "0010011101" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(11750370,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(213838607,28);
logexp <= conv_std_logic_vector(1029,11);
WHEN "0010011110" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(11932075,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(45932419,28);
logexp <= conv_std_logic_vector(1029,11);
WHEN "0010011111" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(12113779,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(146461687,28);
logexp <= conv_std_logic_vector(1029,11);
WHEN "0010100000" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(12295483,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(246990955,28);
logexp <= conv_std_logic_vector(1029,11);
WHEN "0010100001" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(12477188,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(79084767,28);
logexp <= conv_std_logic_vector(1029,11);
WHEN "0010100010" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(12658892,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(179614035,28);
logexp <= conv_std_logic_vector(1029,11);
WHEN "0010100011" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(12840597,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(11707847,28);
logexp <= conv_std_logic_vector(1029,11);
WHEN "0010100100" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(13022301,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(112237114,28);
logexp <= conv_std_logic_vector(1029,11);
WHEN "0010100101" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(13204005,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(212766382,28);
logexp <= conv_std_logic_vector(1029,11);
WHEN "0010100110" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(13385710,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(44860194,28);
logexp <= conv_std_logic_vector(1029,11);
WHEN "0010100111" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(13567414,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(145389462,28);
logexp <= conv_std_logic_vector(1029,11);
WHEN "0010101000" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(13749118,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(245918730,28);
logexp <= conv_std_logic_vector(1029,11);
WHEN "0010101001" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(13930823,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(78012542,28);
logexp <= conv_std_logic_vector(1029,11);
WHEN "0010101010" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(14112527,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(178541810,28);
logexp <= conv_std_logic_vector(1029,11);
WHEN "0010101011" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(14294232,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(10635622,28);
logexp <= conv_std_logic_vector(1029,11);
WHEN "0010101100" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(14475936,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(111164889,28);
logexp <= conv_std_logic_vector(1029,11);
WHEN "0010101101" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(14657640,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(211694157,28);
logexp <= conv_std_logic_vector(1029,11);
WHEN "0010101110" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(14839345,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(43787969,28);
logexp <= conv_std_logic_vector(1029,11);
WHEN "0010101111" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(15021049,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(144317237,28);
logexp <= conv_std_logic_vector(1029,11);
WHEN "0010110000" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(15202753,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(244846505,28);
logexp <= conv_std_logic_vector(1029,11);
WHEN "0010110001" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(15384458,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(76940317,28);
logexp <= conv_std_logic_vector(1029,11);
WHEN "0010110010" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(15566162,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(177469585,28);
logexp <= conv_std_logic_vector(1029,11);
WHEN "0010110011" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(15747867,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(9563397,28);
logexp <= conv_std_logic_vector(1029,11);
WHEN "0010110100" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(15929571,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(110092664,28);
logexp <= conv_std_logic_vector(1029,11);
WHEN "0010110101" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(16111275,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(210621932,28);
logexp <= conv_std_logic_vector(1029,11);
WHEN "0010110110" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(16292980,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(42715744,28);
logexp <= conv_std_logic_vector(1029,11);
WHEN "0010110111" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(16474684,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(143245012,28);
logexp <= conv_std_logic_vector(1029,11);
WHEN "0010111000" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(16656388,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(243774280,28);
logexp <= conv_std_logic_vector(1029,11);
WHEN "0010111001" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(30438,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(172151774,28);
logexp <= conv_std_logic_vector(1030,11);
WHEN "0010111010" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(121290,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(222416408,28);
logexp <= conv_std_logic_vector(1030,11);
WHEN "0010111011" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(212143,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(4245586,28);
logexp <= conv_std_logic_vector(1030,11);
WHEN "0010111100" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(302995,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(54510220,28);
logexp <= conv_std_logic_vector(1030,11);
WHEN "0010111101" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(393847,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(104774854,28);
logexp <= conv_std_logic_vector(1030,11);
WHEN "0010111110" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(484699,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(155039488,28);
logexp <= conv_std_logic_vector(1030,11);
WHEN "0010111111" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(575551,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(205304121,28);
logexp <= conv_std_logic_vector(1030,11);
WHEN "0011000000" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(666403,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(255568755,28);
logexp <= conv_std_logic_vector(1030,11);
WHEN "0011000001" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(757256,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(37397933,28);
logexp <= conv_std_logic_vector(1030,11);
WHEN "0011000010" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(848108,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(87662567,28);
logexp <= conv_std_logic_vector(1030,11);
WHEN "0011000011" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(938960,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(137927201,28);
logexp <= conv_std_logic_vector(1030,11);
WHEN "0011000100" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(1029812,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(188191835,28);
logexp <= conv_std_logic_vector(1030,11);
WHEN "0011000101" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(1120664,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(238456469,28);
logexp <= conv_std_logic_vector(1030,11);
WHEN "0011000110" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(1211517,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(20285647,28);
logexp <= conv_std_logic_vector(1030,11);
WHEN "0011000111" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(1302369,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(70550281,28);
logexp <= conv_std_logic_vector(1030,11);
WHEN "0011001000" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(1393221,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(120814915,28);
logexp <= conv_std_logic_vector(1030,11);
WHEN "0011001001" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(1484073,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(171079549,28);
logexp <= conv_std_logic_vector(1030,11);
WHEN "0011001010" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(1574925,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(221344183,28);
logexp <= conv_std_logic_vector(1030,11);
WHEN "0011001011" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(1665778,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(3173361,28);
logexp <= conv_std_logic_vector(1030,11);
WHEN "0011001100" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(1756630,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(53437995,28);
logexp <= conv_std_logic_vector(1030,11);
WHEN "0011001101" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(1847482,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(103702629,28);
logexp <= conv_std_logic_vector(1030,11);
WHEN "0011001110" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(1938334,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(153967262,28);
logexp <= conv_std_logic_vector(1030,11);
WHEN "0011001111" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(2029186,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(204231896,28);
logexp <= conv_std_logic_vector(1030,11);
WHEN "0011010000" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(2120038,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(254496530,28);
logexp <= conv_std_logic_vector(1030,11);
WHEN "0011010001" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(2210891,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(36325708,28);
logexp <= conv_std_logic_vector(1030,11);
WHEN "0011010010" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(2301743,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(86590342,28);
logexp <= conv_std_logic_vector(1030,11);
WHEN "0011010011" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(2392595,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(136854976,28);
logexp <= conv_std_logic_vector(1030,11);
WHEN "0011010100" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(2483447,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(187119610,28);
logexp <= conv_std_logic_vector(1030,11);
WHEN "0011010101" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(2574299,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(237384244,28);
logexp <= conv_std_logic_vector(1030,11);
WHEN "0011010110" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(2665152,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(19213422,28);
logexp <= conv_std_logic_vector(1030,11);
WHEN "0011010111" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(2756004,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(69478056,28);
logexp <= conv_std_logic_vector(1030,11);
WHEN "0011011000" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(2846856,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(119742690,28);
logexp <= conv_std_logic_vector(1030,11);
WHEN "0011011001" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(2937708,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(170007324,28);
logexp <= conv_std_logic_vector(1030,11);
WHEN "0011011010" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(3028560,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(220271958,28);
logexp <= conv_std_logic_vector(1030,11);
WHEN "0011011011" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(3119413,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(2101136,28);
logexp <= conv_std_logic_vector(1030,11);
WHEN "0011011100" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(3210265,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(52365770,28);
logexp <= conv_std_logic_vector(1030,11);
WHEN "0011011101" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(3301117,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(102630404,28);
logexp <= conv_std_logic_vector(1030,11);
WHEN "0011011110" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(3391969,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(152895037,28);
logexp <= conv_std_logic_vector(1030,11);
WHEN "0011011111" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(3482821,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(203159671,28);
logexp <= conv_std_logic_vector(1030,11);
WHEN "0011100000" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(3573673,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(253424305,28);
logexp <= conv_std_logic_vector(1030,11);
WHEN "0011100001" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(3664526,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(35253483,28);
logexp <= conv_std_logic_vector(1030,11);
WHEN "0011100010" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(3755378,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(85518117,28);
logexp <= conv_std_logic_vector(1030,11);
WHEN "0011100011" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(3846230,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(135782751,28);
logexp <= conv_std_logic_vector(1030,11);
WHEN "0011100100" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(3937082,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(186047385,28);
logexp <= conv_std_logic_vector(1030,11);
WHEN "0011100101" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(4027934,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(236312019,28);
logexp <= conv_std_logic_vector(1030,11);
WHEN "0011100110" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(4118787,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(18141197,28);
logexp <= conv_std_logic_vector(1030,11);
WHEN "0011100111" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(4209639,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(68405831,28);
logexp <= conv_std_logic_vector(1030,11);
WHEN "0011101000" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(4300491,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(118670465,28);
logexp <= conv_std_logic_vector(1030,11);
WHEN "0011101001" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(4391343,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(168935099,28);
logexp <= conv_std_logic_vector(1030,11);
WHEN "0011101010" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(4482195,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(219199733,28);
logexp <= conv_std_logic_vector(1030,11);
WHEN "0011101011" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(4573048,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(1028911,28);
logexp <= conv_std_logic_vector(1030,11);
WHEN "0011101100" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(4663900,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(51293545,28);
logexp <= conv_std_logic_vector(1030,11);
WHEN "0011101101" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(4754752,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(101558178,28);
logexp <= conv_std_logic_vector(1030,11);
WHEN "0011101110" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(4845604,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(151822812,28);
logexp <= conv_std_logic_vector(1030,11);
WHEN "0011101111" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(4936456,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(202087446,28);
logexp <= conv_std_logic_vector(1030,11);
WHEN "0011110000" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(5027308,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(252352080,28);
logexp <= conv_std_logic_vector(1030,11);
WHEN "0011110001" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(5118161,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(34181258,28);
logexp <= conv_std_logic_vector(1030,11);
WHEN "0011110010" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(5209013,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(84445892,28);
logexp <= conv_std_logic_vector(1030,11);
WHEN "0011110011" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(5299865,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(134710526,28);
logexp <= conv_std_logic_vector(1030,11);
WHEN "0011110100" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(5390717,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(184975160,28);
logexp <= conv_std_logic_vector(1030,11);
WHEN "0011110101" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(5481569,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(235239794,28);
logexp <= conv_std_logic_vector(1030,11);
WHEN "0011110110" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(5572422,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(17068972,28);
logexp <= conv_std_logic_vector(1030,11);
WHEN "0011110111" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(5663274,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(67333606,28);
logexp <= conv_std_logic_vector(1030,11);
WHEN "0011111000" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(5754126,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(117598240,28);
logexp <= conv_std_logic_vector(1030,11);
WHEN "0011111001" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(5844978,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(167862874,28);
logexp <= conv_std_logic_vector(1030,11);
WHEN "0011111010" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(5935830,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(218127508,28);
logexp <= conv_std_logic_vector(1030,11);
WHEN "0011111011" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(6026682,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(268392142,28);
logexp <= conv_std_logic_vector(1030,11);
WHEN "0011111100" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(6117535,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(50221319,28);
logexp <= conv_std_logic_vector(1030,11);
WHEN "0011111101" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(6208387,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(100485953,28);
logexp <= conv_std_logic_vector(1030,11);
WHEN "0011111110" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(6299239,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(150750587,28);
logexp <= conv_std_logic_vector(1030,11);
WHEN "0011111111" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(6390091,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(201015221,28);
logexp <= conv_std_logic_vector(1030,11);
WHEN "0100000000" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(6480943,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(251279855,28);
logexp <= conv_std_logic_vector(1030,11);
WHEN "0100000001" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(6571796,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(33109033,28);
logexp <= conv_std_logic_vector(1030,11);
WHEN "0100000010" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(6662648,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(83373667,28);
logexp <= conv_std_logic_vector(1030,11);
WHEN "0100000011" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(6753500,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(133638301,28);
logexp <= conv_std_logic_vector(1030,11);
WHEN "0100000100" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(6844352,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(183902935,28);
logexp <= conv_std_logic_vector(1030,11);
WHEN "0100000101" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(6935204,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(234167569,28);
logexp <= conv_std_logic_vector(1030,11);
WHEN "0100000110" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(7026057,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(15996747,28);
logexp <= conv_std_logic_vector(1030,11);
WHEN "0100000111" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(7116909,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(66261381,28);
logexp <= conv_std_logic_vector(1030,11);
WHEN "0100001000" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(7207761,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(116526015,28);
logexp <= conv_std_logic_vector(1030,11);
WHEN "0100001001" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(7298613,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(166790649,28);
logexp <= conv_std_logic_vector(1030,11);
WHEN "0100001010" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(7389465,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(217055283,28);
logexp <= conv_std_logic_vector(1030,11);
WHEN "0100001011" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(7480317,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(267319916,28);
logexp <= conv_std_logic_vector(1030,11);
WHEN "0100001100" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(7571170,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(49149094,28);
logexp <= conv_std_logic_vector(1030,11);
WHEN "0100001101" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(7662022,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(99413728,28);
logexp <= conv_std_logic_vector(1030,11);
WHEN "0100001110" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(7752874,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(149678362,28);
logexp <= conv_std_logic_vector(1030,11);
WHEN "0100001111" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(7843726,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(199942996,28);
logexp <= conv_std_logic_vector(1030,11);
WHEN "0100010000" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(7934578,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(250207630,28);
logexp <= conv_std_logic_vector(1030,11);
WHEN "0100010001" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(8025431,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(32036808,28);
logexp <= conv_std_logic_vector(1030,11);
WHEN "0100010010" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(8116283,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(82301442,28);
logexp <= conv_std_logic_vector(1030,11);
WHEN "0100010011" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(8207135,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(132566076,28);
logexp <= conv_std_logic_vector(1030,11);
WHEN "0100010100" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(8297987,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(182830710,28);
logexp <= conv_std_logic_vector(1030,11);
WHEN "0100010101" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(8388839,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(233095344,28);
logexp <= conv_std_logic_vector(1030,11);
WHEN "0100010110" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(8479692,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(14924522,28);
logexp <= conv_std_logic_vector(1030,11);
WHEN "0100010111" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(8570544,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(65189156,28);
logexp <= conv_std_logic_vector(1030,11);
WHEN "0100011000" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(8661396,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(115453790,28);
logexp <= conv_std_logic_vector(1030,11);
WHEN "0100011001" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(8752248,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(165718424,28);
logexp <= conv_std_logic_vector(1030,11);
WHEN "0100011010" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(8843100,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(215983058,28);
logexp <= conv_std_logic_vector(1030,11);
WHEN "0100011011" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(8933952,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(266247691,28);
logexp <= conv_std_logic_vector(1030,11);
WHEN "0100011100" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(9024805,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(48076869,28);
logexp <= conv_std_logic_vector(1030,11);
WHEN "0100011101" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(9115657,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(98341503,28);
logexp <= conv_std_logic_vector(1030,11);
WHEN "0100011110" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(9206509,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(148606137,28);
logexp <= conv_std_logic_vector(1030,11);
WHEN "0100011111" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(9297361,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(198870771,28);
logexp <= conv_std_logic_vector(1030,11);
WHEN "0100100000" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(9388213,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(249135405,28);
logexp <= conv_std_logic_vector(1030,11);
WHEN "0100100001" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(9479066,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(30964583,28);
logexp <= conv_std_logic_vector(1030,11);
WHEN "0100100010" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(9569918,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(81229217,28);
logexp <= conv_std_logic_vector(1030,11);
WHEN "0100100011" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(9660770,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(131493851,28);
logexp <= conv_std_logic_vector(1030,11);
WHEN "0100100100" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(9751622,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(181758485,28);
logexp <= conv_std_logic_vector(1030,11);
WHEN "0100100101" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(9842474,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(232023119,28);
logexp <= conv_std_logic_vector(1030,11);
WHEN "0100100110" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(9933327,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(13852297,28);
logexp <= conv_std_logic_vector(1030,11);
WHEN "0100100111" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(10024179,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(64116931,28);
logexp <= conv_std_logic_vector(1030,11);
WHEN "0100101000" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(10115031,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(114381565,28);
logexp <= conv_std_logic_vector(1030,11);
WHEN "0100101001" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(10205883,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(164646199,28);
logexp <= conv_std_logic_vector(1030,11);
WHEN "0100101010" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(10296735,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(214910832,28);
logexp <= conv_std_logic_vector(1030,11);
WHEN "0100101011" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(10387587,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(265175466,28);
logexp <= conv_std_logic_vector(1030,11);
WHEN "0100101100" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(10478440,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(47004644,28);
logexp <= conv_std_logic_vector(1030,11);
WHEN "0100101101" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(10569292,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(97269278,28);
logexp <= conv_std_logic_vector(1030,11);
WHEN "0100101110" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(10660144,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(147533912,28);
logexp <= conv_std_logic_vector(1030,11);
WHEN "0100101111" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(10750996,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(197798546,28);
logexp <= conv_std_logic_vector(1030,11);
WHEN "0100110000" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(10841848,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(248063180,28);
logexp <= conv_std_logic_vector(1030,11);
WHEN "0100110001" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(10932701,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(29892358,28);
logexp <= conv_std_logic_vector(1030,11);
WHEN "0100110010" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(11023553,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(80156992,28);
logexp <= conv_std_logic_vector(1030,11);
WHEN "0100110011" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(11114405,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(130421626,28);
logexp <= conv_std_logic_vector(1030,11);
WHEN "0100110100" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(11205257,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(180686260,28);
logexp <= conv_std_logic_vector(1030,11);
WHEN "0100110101" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(11296109,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(230950894,28);
logexp <= conv_std_logic_vector(1030,11);
WHEN "0100110110" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(11386962,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(12780072,28);
logexp <= conv_std_logic_vector(1030,11);
WHEN "0100110111" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(11477814,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(63044706,28);
logexp <= conv_std_logic_vector(1030,11);
WHEN "0100111000" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(11568666,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(113309340,28);
logexp <= conv_std_logic_vector(1030,11);
WHEN "0100111001" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(11659518,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(163573973,28);
logexp <= conv_std_logic_vector(1030,11);
WHEN "0100111010" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(11750370,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(213838607,28);
logexp <= conv_std_logic_vector(1030,11);
WHEN "0100111011" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(11841222,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(264103241,28);
logexp <= conv_std_logic_vector(1030,11);
WHEN "0100111100" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(11932075,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(45932419,28);
logexp <= conv_std_logic_vector(1030,11);
WHEN "0100111101" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(12022927,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(96197053,28);
logexp <= conv_std_logic_vector(1030,11);
WHEN "0100111110" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(12113779,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(146461687,28);
logexp <= conv_std_logic_vector(1030,11);
WHEN "0100111111" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(12204631,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(196726321,28);
logexp <= conv_std_logic_vector(1030,11);
WHEN "0101000000" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(12295483,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(246990955,28);
logexp <= conv_std_logic_vector(1030,11);
WHEN "0101000001" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(12386336,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(28820133,28);
logexp <= conv_std_logic_vector(1030,11);
WHEN "0101000010" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(12477188,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(79084767,28);
logexp <= conv_std_logic_vector(1030,11);
WHEN "0101000011" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(12568040,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(129349401,28);
logexp <= conv_std_logic_vector(1030,11);
WHEN "0101000100" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(12658892,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(179614035,28);
logexp <= conv_std_logic_vector(1030,11);
WHEN "0101000101" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(12749744,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(229878669,28);
logexp <= conv_std_logic_vector(1030,11);
WHEN "0101000110" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(12840597,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(11707847,28);
logexp <= conv_std_logic_vector(1030,11);
WHEN "0101000111" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(12931449,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(61972481,28);
logexp <= conv_std_logic_vector(1030,11);
WHEN "0101001000" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(13022301,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(112237114,28);
logexp <= conv_std_logic_vector(1030,11);
WHEN "0101001001" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(13113153,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(162501748,28);
logexp <= conv_std_logic_vector(1030,11);
WHEN "0101001010" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(13204005,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(212766382,28);
logexp <= conv_std_logic_vector(1030,11);
WHEN "0101001011" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(13294857,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(263031016,28);
logexp <= conv_std_logic_vector(1030,11);
WHEN "0101001100" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(13385710,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(44860194,28);
logexp <= conv_std_logic_vector(1030,11);
WHEN "0101001101" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(13476562,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(95124828,28);
logexp <= conv_std_logic_vector(1030,11);
WHEN "0101001110" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(13567414,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(145389462,28);
logexp <= conv_std_logic_vector(1030,11);
WHEN "0101001111" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(13658266,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(195654096,28);
logexp <= conv_std_logic_vector(1030,11);
WHEN "0101010000" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(13749118,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(245918730,28);
logexp <= conv_std_logic_vector(1030,11);
WHEN "0101010001" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(13839971,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(27747908,28);
logexp <= conv_std_logic_vector(1030,11);
WHEN "0101010010" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(13930823,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(78012542,28);
logexp <= conv_std_logic_vector(1030,11);
WHEN "0101010011" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(14021675,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(128277176,28);
logexp <= conv_std_logic_vector(1030,11);
WHEN "0101010100" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(14112527,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(178541810,28);
logexp <= conv_std_logic_vector(1030,11);
WHEN "0101010101" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(14203379,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(228806444,28);
logexp <= conv_std_logic_vector(1030,11);
WHEN "0101010110" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(14294232,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(10635622,28);
logexp <= conv_std_logic_vector(1030,11);
WHEN "0101010111" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(14385084,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(60900256,28);
logexp <= conv_std_logic_vector(1030,11);
WHEN "0101011000" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(14475936,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(111164889,28);
logexp <= conv_std_logic_vector(1030,11);
WHEN "0101011001" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(14566788,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(161429523,28);
logexp <= conv_std_logic_vector(1030,11);
WHEN "0101011010" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(14657640,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(211694157,28);
logexp <= conv_std_logic_vector(1030,11);
WHEN "0101011011" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(14748492,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(261958791,28);
logexp <= conv_std_logic_vector(1030,11);
WHEN "0101011100" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(14839345,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(43787969,28);
logexp <= conv_std_logic_vector(1030,11);
WHEN "0101011101" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(14930197,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(94052603,28);
logexp <= conv_std_logic_vector(1030,11);
WHEN "0101011110" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(15021049,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(144317237,28);
logexp <= conv_std_logic_vector(1030,11);
WHEN "0101011111" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(15111901,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(194581871,28);
logexp <= conv_std_logic_vector(1030,11);
WHEN "0101100000" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(15202753,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(244846505,28);
logexp <= conv_std_logic_vector(1030,11);
WHEN "0101100001" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(15293606,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(26675683,28);
logexp <= conv_std_logic_vector(1030,11);
WHEN "0101100010" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(15384458,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(76940317,28);
logexp <= conv_std_logic_vector(1030,11);
WHEN "0101100011" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(15475310,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(127204951,28);
logexp <= conv_std_logic_vector(1030,11);
WHEN "0101100100" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(15566162,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(177469585,28);
logexp <= conv_std_logic_vector(1030,11);
WHEN "0101100101" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(15657014,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(227734219,28);
logexp <= conv_std_logic_vector(1030,11);
WHEN "0101100110" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(15747867,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(9563397,28);
logexp <= conv_std_logic_vector(1030,11);
WHEN "0101100111" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(15838719,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(59828030,28);
logexp <= conv_std_logic_vector(1030,11);
WHEN "0101101000" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(15929571,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(110092664,28);
logexp <= conv_std_logic_vector(1030,11);
WHEN "0101101001" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(16020423,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(160357298,28);
logexp <= conv_std_logic_vector(1030,11);
WHEN "0101101010" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(16111275,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(210621932,28);
logexp <= conv_std_logic_vector(1030,11);
WHEN "0101101011" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(16202127,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(260886566,28);
logexp <= conv_std_logic_vector(1030,11);
WHEN "0101101100" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(16292980,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(42715744,28);
logexp <= conv_std_logic_vector(1030,11);
WHEN "0101101101" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(16383832,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(92980378,28);
logexp <= conv_std_logic_vector(1030,11);
WHEN "0101101110" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(16474684,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(143245012,28);
logexp <= conv_std_logic_vector(1030,11);
WHEN "0101101111" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(16565536,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(193509646,28);
logexp <= conv_std_logic_vector(1030,11);
WHEN "0101110000" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(16656388,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(243774280,28);
logexp <= conv_std_logic_vector(1030,11);
WHEN "0101110001" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(16747241,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(25603458,28);
logexp <= conv_std_logic_vector(1030,11);
WHEN "0101110010" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(30438,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(172151774,28);
logexp <= conv_std_logic_vector(1031,11);
WHEN "0101110011" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(75864,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(197284091,28);
logexp <= conv_std_logic_vector(1031,11);
WHEN "0101110100" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(121290,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(222416408,28);
logexp <= conv_std_logic_vector(1031,11);
WHEN "0101110101" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(166716,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(247548725,28);
logexp <= conv_std_logic_vector(1031,11);
WHEN "0101110110" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(212143,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(4245586,28);
logexp <= conv_std_logic_vector(1031,11);
WHEN "0101110111" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(257569,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(29377903,28);
logexp <= conv_std_logic_vector(1031,11);
WHEN "0101111000" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(302995,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(54510220,28);
logexp <= conv_std_logic_vector(1031,11);
WHEN "0101111001" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(348421,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(79642537,28);
logexp <= conv_std_logic_vector(1031,11);
WHEN "0101111010" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(393847,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(104774854,28);
logexp <= conv_std_logic_vector(1031,11);
WHEN "0101111011" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(439273,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(129907171,28);
logexp <= conv_std_logic_vector(1031,11);
WHEN "0101111100" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(484699,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(155039488,28);
logexp <= conv_std_logic_vector(1031,11);
WHEN "0101111101" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(530125,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(180171805,28);
logexp <= conv_std_logic_vector(1031,11);
WHEN "0101111110" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(575551,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(205304121,28);
logexp <= conv_std_logic_vector(1031,11);
WHEN "0101111111" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(620977,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(230436438,28);
logexp <= conv_std_logic_vector(1031,11);
WHEN "0110000000" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(666403,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(255568755,28);
logexp <= conv_std_logic_vector(1031,11);
WHEN "0110000001" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(711830,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(12265616,28);
logexp <= conv_std_logic_vector(1031,11);
WHEN "0110000010" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(757256,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(37397933,28);
logexp <= conv_std_logic_vector(1031,11);
WHEN "0110000011" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(802682,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(62530250,28);
logexp <= conv_std_logic_vector(1031,11);
WHEN "0110000100" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(848108,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(87662567,28);
logexp <= conv_std_logic_vector(1031,11);
WHEN "0110000101" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(893534,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(112794884,28);
logexp <= conv_std_logic_vector(1031,11);
WHEN "0110000110" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(938960,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(137927201,28);
logexp <= conv_std_logic_vector(1031,11);
WHEN "0110000111" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(984386,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(163059518,28);
logexp <= conv_std_logic_vector(1031,11);
WHEN "0110001000" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(1029812,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(188191835,28);
logexp <= conv_std_logic_vector(1031,11);
WHEN "0110001001" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(1075238,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(213324152,28);
logexp <= conv_std_logic_vector(1031,11);
WHEN "0110001010" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(1120664,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(238456469,28);
logexp <= conv_std_logic_vector(1031,11);
WHEN "0110001011" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(1166090,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(263588786,28);
logexp <= conv_std_logic_vector(1031,11);
WHEN "0110001100" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(1211517,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(20285647,28);
logexp <= conv_std_logic_vector(1031,11);
WHEN "0110001101" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(1256943,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(45417964,28);
logexp <= conv_std_logic_vector(1031,11);
WHEN "0110001110" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(1302369,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(70550281,28);
logexp <= conv_std_logic_vector(1031,11);
WHEN "0110001111" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(1347795,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(95682598,28);
logexp <= conv_std_logic_vector(1031,11);
WHEN "0110010000" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(1393221,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(120814915,28);
logexp <= conv_std_logic_vector(1031,11);
WHEN "0110010001" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(1438647,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(145947232,28);
logexp <= conv_std_logic_vector(1031,11);
WHEN "0110010010" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(1484073,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(171079549,28);
logexp <= conv_std_logic_vector(1031,11);
WHEN "0110010011" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(1529499,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(196211866,28);
logexp <= conv_std_logic_vector(1031,11);
WHEN "0110010100" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(1574925,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(221344183,28);
logexp <= conv_std_logic_vector(1031,11);
WHEN "0110010101" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(1620351,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(246476500,28);
logexp <= conv_std_logic_vector(1031,11);
WHEN "0110010110" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(1665778,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(3173361,28);
logexp <= conv_std_logic_vector(1031,11);
WHEN "0110010111" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(1711204,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(28305678,28);
logexp <= conv_std_logic_vector(1031,11);
WHEN "0110011000" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(1756630,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(53437995,28);
logexp <= conv_std_logic_vector(1031,11);
WHEN "0110011001" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(1802056,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(78570312,28);
logexp <= conv_std_logic_vector(1031,11);
WHEN "0110011010" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(1847482,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(103702629,28);
logexp <= conv_std_logic_vector(1031,11);
WHEN "0110011011" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(1892908,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(128834946,28);
logexp <= conv_std_logic_vector(1031,11);
WHEN "0110011100" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(1938334,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(153967262,28);
logexp <= conv_std_logic_vector(1031,11);
WHEN "0110011101" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(1983760,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(179099579,28);
logexp <= conv_std_logic_vector(1031,11);
WHEN "0110011110" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(2029186,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(204231896,28);
logexp <= conv_std_logic_vector(1031,11);
WHEN "0110011111" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(2074612,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(229364213,28);
logexp <= conv_std_logic_vector(1031,11);
WHEN "0110100000" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(2120038,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(254496530,28);
logexp <= conv_std_logic_vector(1031,11);
WHEN "0110100001" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(2165465,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(11193391,28);
logexp <= conv_std_logic_vector(1031,11);
WHEN "0110100010" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(2210891,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(36325708,28);
logexp <= conv_std_logic_vector(1031,11);
WHEN "0110100011" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(2256317,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(61458025,28);
logexp <= conv_std_logic_vector(1031,11);
WHEN "0110100100" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(2301743,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(86590342,28);
logexp <= conv_std_logic_vector(1031,11);
WHEN "0110100101" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(2347169,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(111722659,28);
logexp <= conv_std_logic_vector(1031,11);
WHEN "0110100110" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(2392595,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(136854976,28);
logexp <= conv_std_logic_vector(1031,11);
WHEN "0110100111" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(2438021,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(161987293,28);
logexp <= conv_std_logic_vector(1031,11);
WHEN "0110101000" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(2483447,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(187119610,28);
logexp <= conv_std_logic_vector(1031,11);
WHEN "0110101001" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(2528873,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(212251927,28);
logexp <= conv_std_logic_vector(1031,11);
WHEN "0110101010" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(2574299,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(237384244,28);
logexp <= conv_std_logic_vector(1031,11);
WHEN "0110101011" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(2619725,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(262516561,28);
logexp <= conv_std_logic_vector(1031,11);
WHEN "0110101100" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(2665152,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(19213422,28);
logexp <= conv_std_logic_vector(1031,11);
WHEN "0110101101" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(2710578,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(44345739,28);
logexp <= conv_std_logic_vector(1031,11);
WHEN "0110101110" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(2756004,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(69478056,28);
logexp <= conv_std_logic_vector(1031,11);
WHEN "0110101111" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(2801430,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(94610373,28);
logexp <= conv_std_logic_vector(1031,11);
WHEN "0110110000" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(2846856,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(119742690,28);
logexp <= conv_std_logic_vector(1031,11);
WHEN "0110110001" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(2892282,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(144875007,28);
logexp <= conv_std_logic_vector(1031,11);
WHEN "0110110010" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(2937708,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(170007324,28);
logexp <= conv_std_logic_vector(1031,11);
WHEN "0110110011" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(2983134,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(195139641,28);
logexp <= conv_std_logic_vector(1031,11);
WHEN "0110110100" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(3028560,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(220271958,28);
logexp <= conv_std_logic_vector(1031,11);
WHEN "0110110101" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(3073986,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(245404275,28);
logexp <= conv_std_logic_vector(1031,11);
WHEN "0110110110" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(3119413,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(2101136,28);
logexp <= conv_std_logic_vector(1031,11);
WHEN "0110110111" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(3164839,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(27233453,28);
logexp <= conv_std_logic_vector(1031,11);
WHEN "0110111000" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(3210265,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(52365770,28);
logexp <= conv_std_logic_vector(1031,11);
WHEN "0110111001" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(3255691,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(77498087,28);
logexp <= conv_std_logic_vector(1031,11);
WHEN "0110111010" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(3301117,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(102630404,28);
logexp <= conv_std_logic_vector(1031,11);
WHEN "0110111011" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(3346543,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(127762720,28);
logexp <= conv_std_logic_vector(1031,11);
WHEN "0110111100" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(3391969,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(152895037,28);
logexp <= conv_std_logic_vector(1031,11);
WHEN "0110111101" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(3437395,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(178027354,28);
logexp <= conv_std_logic_vector(1031,11);
WHEN "0110111110" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(3482821,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(203159671,28);
logexp <= conv_std_logic_vector(1031,11);
WHEN "0110111111" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(3528247,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(228291988,28);
logexp <= conv_std_logic_vector(1031,11);
WHEN "0111000000" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(3573673,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(253424305,28);
logexp <= conv_std_logic_vector(1031,11);
WHEN "0111000001" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(3619100,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(10121166,28);
logexp <= conv_std_logic_vector(1031,11);
WHEN "0111000010" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(3664526,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(35253483,28);
logexp <= conv_std_logic_vector(1031,11);
WHEN "0111000011" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(3709952,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(60385800,28);
logexp <= conv_std_logic_vector(1031,11);
WHEN "0111000100" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(3755378,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(85518117,28);
logexp <= conv_std_logic_vector(1031,11);
WHEN "0111000101" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(3800804,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(110650434,28);
logexp <= conv_std_logic_vector(1031,11);
WHEN "0111000110" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(3846230,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(135782751,28);
logexp <= conv_std_logic_vector(1031,11);
WHEN "0111000111" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(3891656,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(160915068,28);
logexp <= conv_std_logic_vector(1031,11);
WHEN "0111001000" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(3937082,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(186047385,28);
logexp <= conv_std_logic_vector(1031,11);
WHEN "0111001001" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(3982508,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(211179702,28);
logexp <= conv_std_logic_vector(1031,11);
WHEN "0111001010" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(4027934,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(236312019,28);
logexp <= conv_std_logic_vector(1031,11);
WHEN "0111001011" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(4073360,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(261444336,28);
logexp <= conv_std_logic_vector(1031,11);
WHEN "0111001100" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(4118787,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(18141197,28);
logexp <= conv_std_logic_vector(1031,11);
WHEN "0111001101" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(4164213,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(43273514,28);
logexp <= conv_std_logic_vector(1031,11);
WHEN "0111001110" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(4209639,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(68405831,28);
logexp <= conv_std_logic_vector(1031,11);
WHEN "0111001111" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(4255065,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(93538148,28);
logexp <= conv_std_logic_vector(1031,11);
WHEN "0111010000" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(4300491,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(118670465,28);
logexp <= conv_std_logic_vector(1031,11);
WHEN "0111010001" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(4345917,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(143802782,28);
logexp <= conv_std_logic_vector(1031,11);
WHEN "0111010010" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(4391343,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(168935099,28);
logexp <= conv_std_logic_vector(1031,11);
WHEN "0111010011" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(4436769,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(194067416,28);
logexp <= conv_std_logic_vector(1031,11);
WHEN "0111010100" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(4482195,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(219199733,28);
logexp <= conv_std_logic_vector(1031,11);
WHEN "0111010101" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(4527621,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(244332050,28);
logexp <= conv_std_logic_vector(1031,11);
WHEN "0111010110" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(4573048,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(1028911,28);
logexp <= conv_std_logic_vector(1031,11);
WHEN "0111010111" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(4618474,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(26161228,28);
logexp <= conv_std_logic_vector(1031,11);
WHEN "0111011000" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(4663900,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(51293545,28);
logexp <= conv_std_logic_vector(1031,11);
WHEN "0111011001" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(4709326,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(76425861,28);
logexp <= conv_std_logic_vector(1031,11);
WHEN "0111011010" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(4754752,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(101558178,28);
logexp <= conv_std_logic_vector(1031,11);
WHEN "0111011011" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(4800178,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(126690495,28);
logexp <= conv_std_logic_vector(1031,11);
WHEN "0111011100" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(4845604,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(151822812,28);
logexp <= conv_std_logic_vector(1031,11);
WHEN "0111011101" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(4891030,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(176955129,28);
logexp <= conv_std_logic_vector(1031,11);
WHEN "0111011110" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(4936456,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(202087446,28);
logexp <= conv_std_logic_vector(1031,11);
WHEN "0111011111" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(4981882,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(227219763,28);
logexp <= conv_std_logic_vector(1031,11);
WHEN "0111100000" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(5027308,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(252352080,28);
logexp <= conv_std_logic_vector(1031,11);
WHEN "0111100001" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(5072735,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(9048941,28);
logexp <= conv_std_logic_vector(1031,11);
WHEN "0111100010" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(5118161,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(34181258,28);
logexp <= conv_std_logic_vector(1031,11);
WHEN "0111100011" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(5163587,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(59313575,28);
logexp <= conv_std_logic_vector(1031,11);
WHEN "0111100100" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(5209013,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(84445892,28);
logexp <= conv_std_logic_vector(1031,11);
WHEN "0111100101" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(5254439,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(109578209,28);
logexp <= conv_std_logic_vector(1031,11);
WHEN "0111100110" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(5299865,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(134710526,28);
logexp <= conv_std_logic_vector(1031,11);
WHEN "0111100111" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(5345291,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(159842843,28);
logexp <= conv_std_logic_vector(1031,11);
WHEN "0111101000" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(5390717,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(184975160,28);
logexp <= conv_std_logic_vector(1031,11);
WHEN "0111101001" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(5436143,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(210107477,28);
logexp <= conv_std_logic_vector(1031,11);
WHEN "0111101010" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(5481569,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(235239794,28);
logexp <= conv_std_logic_vector(1031,11);
WHEN "0111101011" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(5526995,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(260372111,28);
logexp <= conv_std_logic_vector(1031,11);
WHEN "0111101100" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(5572422,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(17068972,28);
logexp <= conv_std_logic_vector(1031,11);
WHEN "0111101101" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(5617848,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(42201289,28);
logexp <= conv_std_logic_vector(1031,11);
WHEN "0111101110" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(5663274,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(67333606,28);
logexp <= conv_std_logic_vector(1031,11);
WHEN "0111101111" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(5708700,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(92465923,28);
logexp <= conv_std_logic_vector(1031,11);
WHEN "0111110000" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(5754126,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(117598240,28);
logexp <= conv_std_logic_vector(1031,11);
WHEN "0111110001" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(5799552,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(142730557,28);
logexp <= conv_std_logic_vector(1031,11);
WHEN "0111110010" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(5844978,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(167862874,28);
logexp <= conv_std_logic_vector(1031,11);
WHEN "0111110011" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(5890404,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(192995191,28);
logexp <= conv_std_logic_vector(1031,11);
WHEN "0111110100" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(5935830,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(218127508,28);
logexp <= conv_std_logic_vector(1031,11);
WHEN "0111110101" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(5981256,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(243259825,28);
logexp <= conv_std_logic_vector(1031,11);
WHEN "0111110110" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(6026682,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(268392142,28);
logexp <= conv_std_logic_vector(1031,11);
WHEN "0111110111" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(6072109,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(25089003,28);
logexp <= conv_std_logic_vector(1031,11);
WHEN "0111111000" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(6117535,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(50221319,28);
logexp <= conv_std_logic_vector(1031,11);
WHEN "0111111001" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(6162961,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(75353636,28);
logexp <= conv_std_logic_vector(1031,11);
WHEN "0111111010" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(6208387,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(100485953,28);
logexp <= conv_std_logic_vector(1031,11);
WHEN "0111111011" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(6253813,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(125618270,28);
logexp <= conv_std_logic_vector(1031,11);
WHEN "0111111100" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(6299239,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(150750587,28);
logexp <= conv_std_logic_vector(1031,11);
WHEN "0111111101" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(6344665,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(175882904,28);
logexp <= conv_std_logic_vector(1031,11);
WHEN "0111111110" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(6390091,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(201015221,28);
logexp <= conv_std_logic_vector(1031,11);
WHEN "0111111111" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(6435517,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(226147538,28);
logexp <= conv_std_logic_vector(1031,11);
WHEN "1000000000" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(6480943,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(251279855,28);
logexp <= conv_std_logic_vector(1031,11);
WHEN "1000000001" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(6526370,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(7976716,28);
logexp <= conv_std_logic_vector(1031,11);
WHEN "1000000010" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(6571796,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(33109033,28);
logexp <= conv_std_logic_vector(1031,11);
WHEN "1000000011" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(6617222,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(58241350,28);
logexp <= conv_std_logic_vector(1031,11);
WHEN "1000000100" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(6662648,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(83373667,28);
logexp <= conv_std_logic_vector(1031,11);
WHEN "1000000101" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(6708074,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(108505984,28);
logexp <= conv_std_logic_vector(1031,11);
WHEN "1000000110" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(6753500,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(133638301,28);
logexp <= conv_std_logic_vector(1031,11);
WHEN "1000000111" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(6798926,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(158770618,28);
logexp <= conv_std_logic_vector(1031,11);
WHEN "1000001000" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(6844352,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(183902935,28);
logexp <= conv_std_logic_vector(1031,11);
WHEN "1000001001" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(6889778,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(209035252,28);
logexp <= conv_std_logic_vector(1031,11);
WHEN "1000001010" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(6935204,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(234167569,28);
logexp <= conv_std_logic_vector(1031,11);
WHEN "1000001011" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(6980630,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(259299886,28);
logexp <= conv_std_logic_vector(1031,11);
WHEN "1000001100" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(7026057,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(15996747,28);
logexp <= conv_std_logic_vector(1031,11);
WHEN "1000001101" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(7071483,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(41129064,28);
logexp <= conv_std_logic_vector(1031,11);
WHEN "1000001110" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(7116909,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(66261381,28);
logexp <= conv_std_logic_vector(1031,11);
WHEN "1000001111" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(7162335,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(91393698,28);
logexp <= conv_std_logic_vector(1031,11);
WHEN "1000010000" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(7207761,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(116526015,28);
logexp <= conv_std_logic_vector(1031,11);
WHEN "1000010001" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(7253187,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(141658332,28);
logexp <= conv_std_logic_vector(1031,11);
WHEN "1000010010" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(7298613,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(166790649,28);
logexp <= conv_std_logic_vector(1031,11);
WHEN "1000010011" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(7344039,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(191922966,28);
logexp <= conv_std_logic_vector(1031,11);
WHEN "1000010100" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(7389465,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(217055283,28);
logexp <= conv_std_logic_vector(1031,11);
WHEN "1000010101" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(7434891,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(242187600,28);
logexp <= conv_std_logic_vector(1031,11);
WHEN "1000010110" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(7480317,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(267319916,28);
logexp <= conv_std_logic_vector(1031,11);
WHEN "1000010111" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(7525744,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(24016777,28);
logexp <= conv_std_logic_vector(1031,11);
WHEN "1000011000" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(7571170,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(49149094,28);
logexp <= conv_std_logic_vector(1031,11);
WHEN "1000011001" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(7616596,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(74281411,28);
logexp <= conv_std_logic_vector(1031,11);
WHEN "1000011010" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(7662022,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(99413728,28);
logexp <= conv_std_logic_vector(1031,11);
WHEN "1000011011" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(7707448,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(124546045,28);
logexp <= conv_std_logic_vector(1031,11);
WHEN "1000011100" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(7752874,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(149678362,28);
logexp <= conv_std_logic_vector(1031,11);
WHEN "1000011101" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(7798300,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(174810679,28);
logexp <= conv_std_logic_vector(1031,11);
WHEN "1000011110" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(7843726,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(199942996,28);
logexp <= conv_std_logic_vector(1031,11);
WHEN "1000011111" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(7889152,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(225075313,28);
logexp <= conv_std_logic_vector(1031,11);
WHEN "1000100000" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(7934578,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(250207630,28);
logexp <= conv_std_logic_vector(1031,11);
WHEN "1000100001" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(7980005,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(6904491,28);
logexp <= conv_std_logic_vector(1031,11);
WHEN "1000100010" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(8025431,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(32036808,28);
logexp <= conv_std_logic_vector(1031,11);
WHEN "1000100011" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(8070857,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(57169125,28);
logexp <= conv_std_logic_vector(1031,11);
WHEN "1000100100" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(8116283,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(82301442,28);
logexp <= conv_std_logic_vector(1031,11);
WHEN "1000100101" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(8161709,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(107433759,28);
logexp <= conv_std_logic_vector(1031,11);
WHEN "1000100110" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(8207135,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(132566076,28);
logexp <= conv_std_logic_vector(1031,11);
WHEN "1000100111" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(8252561,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(157698393,28);
logexp <= conv_std_logic_vector(1031,11);
WHEN "1000101000" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(8297987,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(182830710,28);
logexp <= conv_std_logic_vector(1031,11);
WHEN "1000101001" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(8343413,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(207963027,28);
logexp <= conv_std_logic_vector(1031,11);
WHEN "1000101010" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(8388839,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(233095344,28);
logexp <= conv_std_logic_vector(1031,11);
WHEN "1000101011" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(8434265,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(258227661,28);
logexp <= conv_std_logic_vector(1031,11);
WHEN "1000101100" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(8479692,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(14924522,28);
logexp <= conv_std_logic_vector(1031,11);
WHEN "1000101101" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(8525118,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(40056839,28);
logexp <= conv_std_logic_vector(1031,11);
WHEN "1000101110" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(8570544,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(65189156,28);
logexp <= conv_std_logic_vector(1031,11);
WHEN "1000101111" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(8615970,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(90321473,28);
logexp <= conv_std_logic_vector(1031,11);
WHEN "1000110000" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(8661396,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(115453790,28);
logexp <= conv_std_logic_vector(1031,11);
WHEN "1000110001" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(8706822,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(140586107,28);
logexp <= conv_std_logic_vector(1031,11);
WHEN "1000110010" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(8752248,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(165718424,28);
logexp <= conv_std_logic_vector(1031,11);
WHEN "1000110011" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(8797674,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(190850741,28);
logexp <= conv_std_logic_vector(1031,11);
WHEN "1000110100" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(8843100,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(215983058,28);
logexp <= conv_std_logic_vector(1031,11);
WHEN "1000110101" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(8888526,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(241115374,28);
logexp <= conv_std_logic_vector(1031,11);
WHEN "1000110110" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(8933952,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(266247691,28);
logexp <= conv_std_logic_vector(1031,11);
WHEN "1000110111" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(8979379,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(22944552,28);
logexp <= conv_std_logic_vector(1031,11);
WHEN "1000111000" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(9024805,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(48076869,28);
logexp <= conv_std_logic_vector(1031,11);
WHEN "1000111001" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(9070231,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(73209186,28);
logexp <= conv_std_logic_vector(1031,11);
WHEN "1000111010" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(9115657,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(98341503,28);
logexp <= conv_std_logic_vector(1031,11);
WHEN "1000111011" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(9161083,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(123473820,28);
logexp <= conv_std_logic_vector(1031,11);
WHEN "1000111100" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(9206509,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(148606137,28);
logexp <= conv_std_logic_vector(1031,11);
WHEN "1000111101" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(9251935,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(173738454,28);
logexp <= conv_std_logic_vector(1031,11);
WHEN "1000111110" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(9297361,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(198870771,28);
logexp <= conv_std_logic_vector(1031,11);
WHEN "1000111111" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(9342787,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(224003088,28);
logexp <= conv_std_logic_vector(1031,11);
WHEN "1001000000" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(9388213,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(249135405,28);
logexp <= conv_std_logic_vector(1031,11);
WHEN "1001000001" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(9433640,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(5832266,28);
logexp <= conv_std_logic_vector(1031,11);
WHEN "1001000010" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(9479066,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(30964583,28);
logexp <= conv_std_logic_vector(1031,11);
WHEN "1001000011" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(9524492,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(56096900,28);
logexp <= conv_std_logic_vector(1031,11);
WHEN "1001000100" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(9569918,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(81229217,28);
logexp <= conv_std_logic_vector(1031,11);
WHEN "1001000101" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(9615344,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(106361534,28);
logexp <= conv_std_logic_vector(1031,11);
WHEN "1001000110" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(9660770,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(131493851,28);
logexp <= conv_std_logic_vector(1031,11);
WHEN "1001000111" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(9706196,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(156626168,28);
logexp <= conv_std_logic_vector(1031,11);
WHEN "1001001000" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(9751622,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(181758485,28);
logexp <= conv_std_logic_vector(1031,11);
WHEN "1001001001" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(9797048,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(206890802,28);
logexp <= conv_std_logic_vector(1031,11);
WHEN "1001001010" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(9842474,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(232023119,28);
logexp <= conv_std_logic_vector(1031,11);
WHEN "1001001011" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(9887900,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(257155436,28);
logexp <= conv_std_logic_vector(1031,11);
WHEN "1001001100" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(9933327,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(13852297,28);
logexp <= conv_std_logic_vector(1031,11);
WHEN "1001001101" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(9978753,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(38984614,28);
logexp <= conv_std_logic_vector(1031,11);
WHEN "1001001110" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(10024179,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(64116931,28);
logexp <= conv_std_logic_vector(1031,11);
WHEN "1001001111" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(10069605,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(89249248,28);
logexp <= conv_std_logic_vector(1031,11);
WHEN "1001010000" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(10115031,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(114381565,28);
logexp <= conv_std_logic_vector(1031,11);
WHEN "1001010001" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(10160457,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(139513882,28);
logexp <= conv_std_logic_vector(1031,11);
WHEN "1001010010" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(10205883,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(164646199,28);
logexp <= conv_std_logic_vector(1031,11);
WHEN "1001010011" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(10251309,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(189778515,28);
logexp <= conv_std_logic_vector(1031,11);
WHEN "1001010100" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(10296735,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(214910832,28);
logexp <= conv_std_logic_vector(1031,11);
WHEN "1001010101" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(10342161,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(240043149,28);
logexp <= conv_std_logic_vector(1031,11);
WHEN "1001010110" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(10387587,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(265175466,28);
logexp <= conv_std_logic_vector(1031,11);
WHEN "1001010111" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(10433014,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(21872327,28);
logexp <= conv_std_logic_vector(1031,11);
WHEN "1001011000" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(10478440,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(47004644,28);
logexp <= conv_std_logic_vector(1031,11);
WHEN "1001011001" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(10523866,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(72136961,28);
logexp <= conv_std_logic_vector(1031,11);
WHEN "1001011010" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(10569292,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(97269278,28);
logexp <= conv_std_logic_vector(1031,11);
WHEN "1001011011" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(10614718,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(122401595,28);
logexp <= conv_std_logic_vector(1031,11);
WHEN "1001011100" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(10660144,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(147533912,28);
logexp <= conv_std_logic_vector(1031,11);
WHEN "1001011101" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(10705570,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(172666229,28);
logexp <= conv_std_logic_vector(1031,11);
WHEN "1001011110" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(10750996,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(197798546,28);
logexp <= conv_std_logic_vector(1031,11);
WHEN "1001011111" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(10796422,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(222930863,28);
logexp <= conv_std_logic_vector(1031,11);
WHEN "1001100000" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(10841848,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(248063180,28);
logexp <= conv_std_logic_vector(1031,11);
WHEN "1001100001" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(10887275,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(4760041,28);
logexp <= conv_std_logic_vector(1031,11);
WHEN "1001100010" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(10932701,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(29892358,28);
logexp <= conv_std_logic_vector(1031,11);
WHEN "1001100011" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(10978127,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(55024675,28);
logexp <= conv_std_logic_vector(1031,11);
WHEN "1001100100" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(11023553,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(80156992,28);
logexp <= conv_std_logic_vector(1031,11);
WHEN "1001100101" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(11068979,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(105289309,28);
logexp <= conv_std_logic_vector(1031,11);
WHEN "1001100110" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(11114405,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(130421626,28);
logexp <= conv_std_logic_vector(1031,11);
WHEN "1001100111" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(11159831,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(155553943,28);
logexp <= conv_std_logic_vector(1031,11);
WHEN "1001101000" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(11205257,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(180686260,28);
logexp <= conv_std_logic_vector(1031,11);
WHEN "1001101001" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(11250683,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(205818577,28);
logexp <= conv_std_logic_vector(1031,11);
WHEN "1001101010" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(11296109,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(230950894,28);
logexp <= conv_std_logic_vector(1031,11);
WHEN "1001101011" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(11341535,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(256083211,28);
logexp <= conv_std_logic_vector(1031,11);
WHEN "1001101100" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(11386962,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(12780072,28);
logexp <= conv_std_logic_vector(1031,11);
WHEN "1001101101" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(11432388,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(37912389,28);
logexp <= conv_std_logic_vector(1031,11);
WHEN "1001101110" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(11477814,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(63044706,28);
logexp <= conv_std_logic_vector(1031,11);
WHEN "1001101111" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(11523240,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(88177023,28);
logexp <= conv_std_logic_vector(1031,11);
WHEN "1001110000" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(11568666,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(113309340,28);
logexp <= conv_std_logic_vector(1031,11);
WHEN "1001110001" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(11614092,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(138441657,28);
logexp <= conv_std_logic_vector(1031,11);
WHEN "1001110010" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(11659518,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(163573973,28);
logexp <= conv_std_logic_vector(1031,11);
WHEN "1001110011" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(11704944,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(188706290,28);
logexp <= conv_std_logic_vector(1031,11);
WHEN "1001110100" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(11750370,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(213838607,28);
logexp <= conv_std_logic_vector(1031,11);
WHEN "1001110101" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(11795796,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(238970924,28);
logexp <= conv_std_logic_vector(1031,11);
WHEN "1001110110" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(11841222,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(264103241,28);
logexp <= conv_std_logic_vector(1031,11);
WHEN "1001110111" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(11886649,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(20800102,28);
logexp <= conv_std_logic_vector(1031,11);
WHEN "1001111000" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(11932075,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(45932419,28);
logexp <= conv_std_logic_vector(1031,11);
WHEN "1001111001" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(11977501,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(71064736,28);
logexp <= conv_std_logic_vector(1031,11);
WHEN "1001111010" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(12022927,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(96197053,28);
logexp <= conv_std_logic_vector(1031,11);
WHEN "1001111011" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(12068353,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(121329370,28);
logexp <= conv_std_logic_vector(1031,11);
WHEN "1001111100" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(12113779,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(146461687,28);
logexp <= conv_std_logic_vector(1031,11);
WHEN "1001111101" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(12159205,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(171594004,28);
logexp <= conv_std_logic_vector(1031,11);
WHEN "1001111110" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(12204631,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(196726321,28);
logexp <= conv_std_logic_vector(1031,11);
WHEN "1001111111" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(12250057,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(221858638,28);
logexp <= conv_std_logic_vector(1031,11);
WHEN "1010000000" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(12295483,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(246990955,28);
logexp <= conv_std_logic_vector(1031,11);
WHEN "1010000001" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(12340910,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(3687816,28);
logexp <= conv_std_logic_vector(1031,11);
WHEN "1010000010" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(12386336,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(28820133,28);
logexp <= conv_std_logic_vector(1031,11);
WHEN "1010000011" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(12431762,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(53952450,28);
logexp <= conv_std_logic_vector(1031,11);
WHEN "1010000100" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(12477188,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(79084767,28);
logexp <= conv_std_logic_vector(1031,11);
WHEN "1010000101" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(12522614,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(104217084,28);
logexp <= conv_std_logic_vector(1031,11);
WHEN "1010000110" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(12568040,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(129349401,28);
logexp <= conv_std_logic_vector(1031,11);
WHEN "1010000111" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(12613466,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(154481718,28);
logexp <= conv_std_logic_vector(1031,11);
WHEN "1010001000" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(12658892,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(179614035,28);
logexp <= conv_std_logic_vector(1031,11);
WHEN "1010001001" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(12704318,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(204746352,28);
logexp <= conv_std_logic_vector(1031,11);
WHEN "1010001010" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(12749744,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(229878669,28);
logexp <= conv_std_logic_vector(1031,11);
WHEN "1010001011" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(12795170,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(255010986,28);
logexp <= conv_std_logic_vector(1031,11);
WHEN "1010001100" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(12840597,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(11707847,28);
logexp <= conv_std_logic_vector(1031,11);
WHEN "1010001101" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(12886023,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(36840164,28);
logexp <= conv_std_logic_vector(1031,11);
WHEN "1010001110" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(12931449,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(61972481,28);
logexp <= conv_std_logic_vector(1031,11);
WHEN "1010001111" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(12976875,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(87104798,28);
logexp <= conv_std_logic_vector(1031,11);
WHEN "1010010000" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(13022301,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(112237114,28);
logexp <= conv_std_logic_vector(1031,11);
WHEN "1010010001" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(13067727,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(137369431,28);
logexp <= conv_std_logic_vector(1031,11);
WHEN "1010010010" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(13113153,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(162501748,28);
logexp <= conv_std_logic_vector(1031,11);
WHEN "1010010011" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(13158579,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(187634065,28);
logexp <= conv_std_logic_vector(1031,11);
WHEN "1010010100" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(13204005,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(212766382,28);
logexp <= conv_std_logic_vector(1031,11);
WHEN "1010010101" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(13249431,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(237898699,28);
logexp <= conv_std_logic_vector(1031,11);
WHEN "1010010110" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(13294857,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(263031016,28);
logexp <= conv_std_logic_vector(1031,11);
WHEN "1010010111" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(13340284,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(19727877,28);
logexp <= conv_std_logic_vector(1031,11);
WHEN "1010011000" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(13385710,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(44860194,28);
logexp <= conv_std_logic_vector(1031,11);
WHEN "1010011001" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(13431136,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(69992511,28);
logexp <= conv_std_logic_vector(1031,11);
WHEN "1010011010" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(13476562,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(95124828,28);
logexp <= conv_std_logic_vector(1031,11);
WHEN "1010011011" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(13521988,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(120257145,28);
logexp <= conv_std_logic_vector(1031,11);
WHEN "1010011100" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(13567414,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(145389462,28);
logexp <= conv_std_logic_vector(1031,11);
WHEN "1010011101" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(13612840,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(170521779,28);
logexp <= conv_std_logic_vector(1031,11);
WHEN "1010011110" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(13658266,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(195654096,28);
logexp <= conv_std_logic_vector(1031,11);
WHEN "1010011111" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(13703692,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(220786413,28);
logexp <= conv_std_logic_vector(1031,11);
WHEN "1010100000" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(13749118,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(245918730,28);
logexp <= conv_std_logic_vector(1031,11);
WHEN "1010100001" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(13794545,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(2615591,28);
logexp <= conv_std_logic_vector(1031,11);
WHEN "1010100010" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(13839971,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(27747908,28);
logexp <= conv_std_logic_vector(1031,11);
WHEN "1010100011" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(13885397,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(52880225,28);
logexp <= conv_std_logic_vector(1031,11);
WHEN "1010100100" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(13930823,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(78012542,28);
logexp <= conv_std_logic_vector(1031,11);
WHEN "1010100101" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(13976249,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(103144859,28);
logexp <= conv_std_logic_vector(1031,11);
WHEN "1010100110" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(14021675,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(128277176,28);
logexp <= conv_std_logic_vector(1031,11);
WHEN "1010100111" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(14067101,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(153409493,28);
logexp <= conv_std_logic_vector(1031,11);
WHEN "1010101000" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(14112527,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(178541810,28);
logexp <= conv_std_logic_vector(1031,11);
WHEN "1010101001" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(14157953,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(203674127,28);
logexp <= conv_std_logic_vector(1031,11);
WHEN "1010101010" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(14203379,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(228806444,28);
logexp <= conv_std_logic_vector(1031,11);
WHEN "1010101011" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(14248805,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(253938761,28);
logexp <= conv_std_logic_vector(1031,11);
WHEN "1010101100" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(14294232,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(10635622,28);
logexp <= conv_std_logic_vector(1031,11);
WHEN "1010101101" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(14339658,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(35767939,28);
logexp <= conv_std_logic_vector(1031,11);
WHEN "1010101110" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(14385084,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(60900256,28);
logexp <= conv_std_logic_vector(1031,11);
WHEN "1010101111" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(14430510,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(86032572,28);
logexp <= conv_std_logic_vector(1031,11);
WHEN "1010110000" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(14475936,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(111164889,28);
logexp <= conv_std_logic_vector(1031,11);
WHEN "1010110001" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(14521362,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(136297206,28);
logexp <= conv_std_logic_vector(1031,11);
WHEN "1010110010" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(14566788,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(161429523,28);
logexp <= conv_std_logic_vector(1031,11);
WHEN "1010110011" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(14612214,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(186561840,28);
logexp <= conv_std_logic_vector(1031,11);
WHEN "1010110100" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(14657640,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(211694157,28);
logexp <= conv_std_logic_vector(1031,11);
WHEN "1010110101" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(14703066,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(236826474,28);
logexp <= conv_std_logic_vector(1031,11);
WHEN "1010110110" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(14748492,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(261958791,28);
logexp <= conv_std_logic_vector(1031,11);
WHEN "1010110111" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(14793919,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(18655652,28);
logexp <= conv_std_logic_vector(1031,11);
WHEN "1010111000" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(14839345,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(43787969,28);
logexp <= conv_std_logic_vector(1031,11);
WHEN "1010111001" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(14884771,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(68920286,28);
logexp <= conv_std_logic_vector(1031,11);
WHEN "1010111010" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(14930197,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(94052603,28);
logexp <= conv_std_logic_vector(1031,11);
WHEN "1010111011" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(14975623,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(119184920,28);
logexp <= conv_std_logic_vector(1031,11);
WHEN "1010111100" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(15021049,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(144317237,28);
logexp <= conv_std_logic_vector(1031,11);
WHEN "1010111101" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(15066475,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(169449554,28);
logexp <= conv_std_logic_vector(1031,11);
WHEN "1010111110" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(15111901,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(194581871,28);
logexp <= conv_std_logic_vector(1031,11);
WHEN "1010111111" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(15157327,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(219714188,28);
logexp <= conv_std_logic_vector(1031,11);
WHEN "1011000000" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(15202753,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(244846505,28);
logexp <= conv_std_logic_vector(1031,11);
WHEN "1011000001" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(15248180,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(1543366,28);
logexp <= conv_std_logic_vector(1031,11);
WHEN "1011000010" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(15293606,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(26675683,28);
logexp <= conv_std_logic_vector(1031,11);
WHEN "1011000011" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(15339032,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(51808000,28);
logexp <= conv_std_logic_vector(1031,11);
WHEN "1011000100" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(15384458,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(76940317,28);
logexp <= conv_std_logic_vector(1031,11);
WHEN "1011000101" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(15429884,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(102072634,28);
logexp <= conv_std_logic_vector(1031,11);
WHEN "1011000110" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(15475310,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(127204951,28);
logexp <= conv_std_logic_vector(1031,11);
WHEN "1011000111" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(15520736,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(152337268,28);
logexp <= conv_std_logic_vector(1031,11);
WHEN "1011001000" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(15566162,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(177469585,28);
logexp <= conv_std_logic_vector(1031,11);
WHEN "1011001001" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(15611588,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(202601902,28);
logexp <= conv_std_logic_vector(1031,11);
WHEN "1011001010" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(15657014,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(227734219,28);
logexp <= conv_std_logic_vector(1031,11);
WHEN "1011001011" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(15702440,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(252866536,28);
logexp <= conv_std_logic_vector(1031,11);
WHEN "1011001100" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(15747867,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(9563397,28);
logexp <= conv_std_logic_vector(1031,11);
WHEN "1011001101" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(15793293,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(34695713,28);
logexp <= conv_std_logic_vector(1031,11);
WHEN "1011001110" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(15838719,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(59828030,28);
logexp <= conv_std_logic_vector(1031,11);
WHEN "1011001111" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(15884145,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(84960347,28);
logexp <= conv_std_logic_vector(1031,11);
WHEN "1011010000" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(15929571,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(110092664,28);
logexp <= conv_std_logic_vector(1031,11);
WHEN "1011010001" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(15974997,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(135224981,28);
logexp <= conv_std_logic_vector(1031,11);
WHEN "1011010010" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(16020423,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(160357298,28);
logexp <= conv_std_logic_vector(1031,11);
WHEN "1011010011" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(16065849,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(185489615,28);
logexp <= conv_std_logic_vector(1031,11);
WHEN "1011010100" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(16111275,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(210621932,28);
logexp <= conv_std_logic_vector(1031,11);
WHEN "1011010101" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(16156701,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(235754249,28);
logexp <= conv_std_logic_vector(1031,11);
WHEN "1011010110" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(16202127,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(260886566,28);
logexp <= conv_std_logic_vector(1031,11);
WHEN "1011010111" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(16247554,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(17583427,28);
logexp <= conv_std_logic_vector(1031,11);
WHEN "1011011000" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(16292980,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(42715744,28);
logexp <= conv_std_logic_vector(1031,11);
WHEN "1011011001" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(16338406,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(67848061,28);
logexp <= conv_std_logic_vector(1031,11);
WHEN "1011011010" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(16383832,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(92980378,28);
logexp <= conv_std_logic_vector(1031,11);
WHEN "1011011011" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(16429258,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(118112695,28);
logexp <= conv_std_logic_vector(1031,11);
WHEN "1011011100" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(16474684,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(143245012,28);
logexp <= conv_std_logic_vector(1031,11);
WHEN "1011011101" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(16520110,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(168377329,28);
logexp <= conv_std_logic_vector(1031,11);
WHEN "1011011110" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(16565536,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(193509646,28);
logexp <= conv_std_logic_vector(1031,11);
WHEN "1011011111" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(16610962,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(218641963,28);
logexp <= conv_std_logic_vector(1031,11);
WHEN "1011100000" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(16656388,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(243774280,28);
logexp <= conv_std_logic_vector(1031,11);
WHEN "1011100001" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(16701815,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(471141,28);
logexp <= conv_std_logic_vector(1031,11);
WHEN "1011100010" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(16747241,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(25603458,28);
logexp <= conv_std_logic_vector(1031,11);
WHEN "1011100011" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(7725,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(159585615,28);
logexp <= conv_std_logic_vector(1032,11);
WHEN "1011100100" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(30438,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(172151774,28);
logexp <= conv_std_logic_vector(1032,11);
WHEN "1011100101" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(53151,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(184717932,28);
logexp <= conv_std_logic_vector(1032,11);
WHEN "1011100110" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(75864,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(197284091,28);
logexp <= conv_std_logic_vector(1032,11);
WHEN "1011100111" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(98577,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(209850249,28);
logexp <= conv_std_logic_vector(1032,11);
WHEN "1011101000" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(121290,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(222416408,28);
logexp <= conv_std_logic_vector(1032,11);
WHEN "1011101001" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(144003,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(234982566,28);
logexp <= conv_std_logic_vector(1032,11);
WHEN "1011101010" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(166716,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(247548725,28);
logexp <= conv_std_logic_vector(1032,11);
WHEN "1011101011" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(189429,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(260114883,28);
logexp <= conv_std_logic_vector(1032,11);
WHEN "1011101100" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(212143,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(4245586,28);
logexp <= conv_std_logic_vector(1032,11);
WHEN "1011101101" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(234856,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(16811744,28);
logexp <= conv_std_logic_vector(1032,11);
WHEN "1011101110" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(257569,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(29377903,28);
logexp <= conv_std_logic_vector(1032,11);
WHEN "1011101111" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(280282,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(41944061,28);
logexp <= conv_std_logic_vector(1032,11);
WHEN "1011110000" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(302995,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(54510220,28);
logexp <= conv_std_logic_vector(1032,11);
WHEN "1011110001" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(325708,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(67076378,28);
logexp <= conv_std_logic_vector(1032,11);
WHEN "1011110010" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(348421,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(79642537,28);
logexp <= conv_std_logic_vector(1032,11);
WHEN "1011110011" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(371134,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(92208695,28);
logexp <= conv_std_logic_vector(1032,11);
WHEN "1011110100" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(393847,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(104774854,28);
logexp <= conv_std_logic_vector(1032,11);
WHEN "1011110101" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(416560,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(117341012,28);
logexp <= conv_std_logic_vector(1032,11);
WHEN "1011110110" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(439273,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(129907171,28);
logexp <= conv_std_logic_vector(1032,11);
WHEN "1011110111" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(461986,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(142473329,28);
logexp <= conv_std_logic_vector(1032,11);
WHEN "1011111000" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(484699,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(155039488,28);
logexp <= conv_std_logic_vector(1032,11);
WHEN "1011111001" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(507412,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(167605646,28);
logexp <= conv_std_logic_vector(1032,11);
WHEN "1011111010" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(530125,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(180171805,28);
logexp <= conv_std_logic_vector(1032,11);
WHEN "1011111011" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(552838,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(192737963,28);
logexp <= conv_std_logic_vector(1032,11);
WHEN "1011111100" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(575551,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(205304121,28);
logexp <= conv_std_logic_vector(1032,11);
WHEN "1011111101" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(598264,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(217870280,28);
logexp <= conv_std_logic_vector(1032,11);
WHEN "1011111110" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(620977,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(230436438,28);
logexp <= conv_std_logic_vector(1032,11);
WHEN "1011111111" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(643690,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(243002597,28);
logexp <= conv_std_logic_vector(1032,11);
WHEN "1100000000" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(666403,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(255568755,28);
logexp <= conv_std_logic_vector(1032,11);
WHEN "1100000001" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(689116,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(268134914,28);
logexp <= conv_std_logic_vector(1032,11);
WHEN "1100000010" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(711830,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(12265616,28);
logexp <= conv_std_logic_vector(1032,11);
WHEN "1100000011" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(734543,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(24831775,28);
logexp <= conv_std_logic_vector(1032,11);
WHEN "1100000100" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(757256,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(37397933,28);
logexp <= conv_std_logic_vector(1032,11);
WHEN "1100000101" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(779969,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(49964092,28);
logexp <= conv_std_logic_vector(1032,11);
WHEN "1100000110" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(802682,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(62530250,28);
logexp <= conv_std_logic_vector(1032,11);
WHEN "1100000111" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(825395,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(75096409,28);
logexp <= conv_std_logic_vector(1032,11);
WHEN "1100001000" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(848108,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(87662567,28);
logexp <= conv_std_logic_vector(1032,11);
WHEN "1100001001" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(870821,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(100228726,28);
logexp <= conv_std_logic_vector(1032,11);
WHEN "1100001010" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(893534,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(112794884,28);
logexp <= conv_std_logic_vector(1032,11);
WHEN "1100001011" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(916247,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(125361043,28);
logexp <= conv_std_logic_vector(1032,11);
WHEN "1100001100" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(938960,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(137927201,28);
logexp <= conv_std_logic_vector(1032,11);
WHEN "1100001101" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(961673,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(150493360,28);
logexp <= conv_std_logic_vector(1032,11);
WHEN "1100001110" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(984386,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(163059518,28);
logexp <= conv_std_logic_vector(1032,11);
WHEN "1100001111" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(1007099,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(175625677,28);
logexp <= conv_std_logic_vector(1032,11);
WHEN "1100010000" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(1029812,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(188191835,28);
logexp <= conv_std_logic_vector(1032,11);
WHEN "1100010001" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(1052525,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(200757994,28);
logexp <= conv_std_logic_vector(1032,11);
WHEN "1100010010" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(1075238,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(213324152,28);
logexp <= conv_std_logic_vector(1032,11);
WHEN "1100010011" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(1097951,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(225890311,28);
logexp <= conv_std_logic_vector(1032,11);
WHEN "1100010100" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(1120664,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(238456469,28);
logexp <= conv_std_logic_vector(1032,11);
WHEN "1100010101" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(1143377,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(251022628,28);
logexp <= conv_std_logic_vector(1032,11);
WHEN "1100010110" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(1166090,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(263588786,28);
logexp <= conv_std_logic_vector(1032,11);
WHEN "1100010111" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(1188804,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(7719489,28);
logexp <= conv_std_logic_vector(1032,11);
WHEN "1100011000" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(1211517,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(20285647,28);
logexp <= conv_std_logic_vector(1032,11);
WHEN "1100011001" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(1234230,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(32851805,28);
logexp <= conv_std_logic_vector(1032,11);
WHEN "1100011010" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(1256943,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(45417964,28);
logexp <= conv_std_logic_vector(1032,11);
WHEN "1100011011" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(1279656,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(57984122,28);
logexp <= conv_std_logic_vector(1032,11);
WHEN "1100011100" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(1302369,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(70550281,28);
logexp <= conv_std_logic_vector(1032,11);
WHEN "1100011101" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(1325082,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(83116439,28);
logexp <= conv_std_logic_vector(1032,11);
WHEN "1100011110" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(1347795,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(95682598,28);
logexp <= conv_std_logic_vector(1032,11);
WHEN "1100011111" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(1370508,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(108248756,28);
logexp <= conv_std_logic_vector(1032,11);
WHEN "1100100000" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(1393221,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(120814915,28);
logexp <= conv_std_logic_vector(1032,11);
WHEN "1100100001" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(1415934,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(133381073,28);
logexp <= conv_std_logic_vector(1032,11);
WHEN "1100100010" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(1438647,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(145947232,28);
logexp <= conv_std_logic_vector(1032,11);
WHEN "1100100011" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(1461360,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(158513390,28);
logexp <= conv_std_logic_vector(1032,11);
WHEN "1100100100" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(1484073,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(171079549,28);
logexp <= conv_std_logic_vector(1032,11);
WHEN "1100100101" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(1506786,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(183645707,28);
logexp <= conv_std_logic_vector(1032,11);
WHEN "1100100110" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(1529499,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(196211866,28);
logexp <= conv_std_logic_vector(1032,11);
WHEN "1100100111" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(1552212,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(208778024,28);
logexp <= conv_std_logic_vector(1032,11);
WHEN "1100101000" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(1574925,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(221344183,28);
logexp <= conv_std_logic_vector(1032,11);
WHEN "1100101001" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(1597638,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(233910341,28);
logexp <= conv_std_logic_vector(1032,11);
WHEN "1100101010" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(1620351,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(246476500,28);
logexp <= conv_std_logic_vector(1032,11);
WHEN "1100101011" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(1643064,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(259042658,28);
logexp <= conv_std_logic_vector(1032,11);
WHEN "1100101100" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(1665778,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(3173361,28);
logexp <= conv_std_logic_vector(1032,11);
WHEN "1100101101" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(1688491,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(15739519,28);
logexp <= conv_std_logic_vector(1032,11);
WHEN "1100101110" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(1711204,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(28305678,28);
logexp <= conv_std_logic_vector(1032,11);
WHEN "1100101111" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(1733917,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(40871836,28);
logexp <= conv_std_logic_vector(1032,11);
WHEN "1100110000" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(1756630,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(53437995,28);
logexp <= conv_std_logic_vector(1032,11);
WHEN "1100110001" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(1779343,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(66004153,28);
logexp <= conv_std_logic_vector(1032,11);
WHEN "1100110010" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(1802056,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(78570312,28);
logexp <= conv_std_logic_vector(1032,11);
WHEN "1100110011" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(1824769,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(91136470,28);
logexp <= conv_std_logic_vector(1032,11);
WHEN "1100110100" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(1847482,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(103702629,28);
logexp <= conv_std_logic_vector(1032,11);
WHEN "1100110101" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(1870195,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(116268787,28);
logexp <= conv_std_logic_vector(1032,11);
WHEN "1100110110" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(1892908,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(128834946,28);
logexp <= conv_std_logic_vector(1032,11);
WHEN "1100110111" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(1915621,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(141401104,28);
logexp <= conv_std_logic_vector(1032,11);
WHEN "1100111000" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(1938334,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(153967262,28);
logexp <= conv_std_logic_vector(1032,11);
WHEN "1100111001" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(1961047,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(166533421,28);
logexp <= conv_std_logic_vector(1032,11);
WHEN "1100111010" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(1983760,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(179099579,28);
logexp <= conv_std_logic_vector(1032,11);
WHEN "1100111011" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(2006473,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(191665738,28);
logexp <= conv_std_logic_vector(1032,11);
WHEN "1100111100" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(2029186,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(204231896,28);
logexp <= conv_std_logic_vector(1032,11);
WHEN "1100111101" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(2051899,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(216798055,28);
logexp <= conv_std_logic_vector(1032,11);
WHEN "1100111110" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(2074612,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(229364213,28);
logexp <= conv_std_logic_vector(1032,11);
WHEN "1100111111" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(2097325,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(241930372,28);
logexp <= conv_std_logic_vector(1032,11);
WHEN "1101000000" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(2120038,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(254496530,28);
logexp <= conv_std_logic_vector(1032,11);
WHEN "1101000001" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(2142751,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(267062689,28);
logexp <= conv_std_logic_vector(1032,11);
WHEN "1101000010" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(2165465,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(11193391,28);
logexp <= conv_std_logic_vector(1032,11);
WHEN "1101000011" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(2188178,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(23759550,28);
logexp <= conv_std_logic_vector(1032,11);
WHEN "1101000100" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(2210891,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(36325708,28);
logexp <= conv_std_logic_vector(1032,11);
WHEN "1101000101" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(2233604,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(48891867,28);
logexp <= conv_std_logic_vector(1032,11);
WHEN "1101000110" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(2256317,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(61458025,28);
logexp <= conv_std_logic_vector(1032,11);
WHEN "1101000111" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(2279030,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(74024184,28);
logexp <= conv_std_logic_vector(1032,11);
WHEN "1101001000" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(2301743,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(86590342,28);
logexp <= conv_std_logic_vector(1032,11);
WHEN "1101001001" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(2324456,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(99156501,28);
logexp <= conv_std_logic_vector(1032,11);
WHEN "1101001010" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(2347169,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(111722659,28);
logexp <= conv_std_logic_vector(1032,11);
WHEN "1101001011" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(2369882,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(124288818,28);
logexp <= conv_std_logic_vector(1032,11);
WHEN "1101001100" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(2392595,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(136854976,28);
logexp <= conv_std_logic_vector(1032,11);
WHEN "1101001101" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(2415308,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(149421135,28);
logexp <= conv_std_logic_vector(1032,11);
WHEN "1101001110" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(2438021,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(161987293,28);
logexp <= conv_std_logic_vector(1032,11);
WHEN "1101001111" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(2460734,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(174553452,28);
logexp <= conv_std_logic_vector(1032,11);
WHEN "1101010000" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(2483447,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(187119610,28);
logexp <= conv_std_logic_vector(1032,11);
WHEN "1101010001" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(2506160,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(199685769,28);
logexp <= conv_std_logic_vector(1032,11);
WHEN "1101010010" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(2528873,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(212251927,28);
logexp <= conv_std_logic_vector(1032,11);
WHEN "1101010011" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(2551586,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(224818086,28);
logexp <= conv_std_logic_vector(1032,11);
WHEN "1101010100" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(2574299,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(237384244,28);
logexp <= conv_std_logic_vector(1032,11);
WHEN "1101010101" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(2597012,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(249950403,28);
logexp <= conv_std_logic_vector(1032,11);
WHEN "1101010110" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(2619725,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(262516561,28);
logexp <= conv_std_logic_vector(1032,11);
WHEN "1101010111" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(2642439,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(6647263,28);
logexp <= conv_std_logic_vector(1032,11);
WHEN "1101011000" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(2665152,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(19213422,28);
logexp <= conv_std_logic_vector(1032,11);
WHEN "1101011001" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(2687865,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(31779580,28);
logexp <= conv_std_logic_vector(1032,11);
WHEN "1101011010" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(2710578,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(44345739,28);
logexp <= conv_std_logic_vector(1032,11);
WHEN "1101011011" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(2733291,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(56911897,28);
logexp <= conv_std_logic_vector(1032,11);
WHEN "1101011100" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(2756004,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(69478056,28);
logexp <= conv_std_logic_vector(1032,11);
WHEN "1101011101" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(2778717,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(82044214,28);
logexp <= conv_std_logic_vector(1032,11);
WHEN "1101011110" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(2801430,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(94610373,28);
logexp <= conv_std_logic_vector(1032,11);
WHEN "1101011111" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(2824143,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(107176531,28);
logexp <= conv_std_logic_vector(1032,11);
WHEN "1101100000" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(2846856,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(119742690,28);
logexp <= conv_std_logic_vector(1032,11);
WHEN "1101100001" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(2869569,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(132308848,28);
logexp <= conv_std_logic_vector(1032,11);
WHEN "1101100010" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(2892282,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(144875007,28);
logexp <= conv_std_logic_vector(1032,11);
WHEN "1101100011" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(2914995,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(157441165,28);
logexp <= conv_std_logic_vector(1032,11);
WHEN "1101100100" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(2937708,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(170007324,28);
logexp <= conv_std_logic_vector(1032,11);
WHEN "1101100101" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(2960421,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(182573482,28);
logexp <= conv_std_logic_vector(1032,11);
WHEN "1101100110" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(2983134,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(195139641,28);
logexp <= conv_std_logic_vector(1032,11);
WHEN "1101100111" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(3005847,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(207705799,28);
logexp <= conv_std_logic_vector(1032,11);
WHEN "1101101000" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(3028560,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(220271958,28);
logexp <= conv_std_logic_vector(1032,11);
WHEN "1101101001" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(3051273,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(232838116,28);
logexp <= conv_std_logic_vector(1032,11);
WHEN "1101101010" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(3073986,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(245404275,28);
logexp <= conv_std_logic_vector(1032,11);
WHEN "1101101011" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(3096699,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(257970433,28);
logexp <= conv_std_logic_vector(1032,11);
WHEN "1101101100" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(3119413,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(2101136,28);
logexp <= conv_std_logic_vector(1032,11);
WHEN "1101101101" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(3142126,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(14667294,28);
logexp <= conv_std_logic_vector(1032,11);
WHEN "1101101110" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(3164839,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(27233453,28);
logexp <= conv_std_logic_vector(1032,11);
WHEN "1101101111" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(3187552,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(39799611,28);
logexp <= conv_std_logic_vector(1032,11);
WHEN "1101110000" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(3210265,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(52365770,28);
logexp <= conv_std_logic_vector(1032,11);
WHEN "1101110001" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(3232978,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(64931928,28);
logexp <= conv_std_logic_vector(1032,11);
WHEN "1101110010" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(3255691,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(77498087,28);
logexp <= conv_std_logic_vector(1032,11);
WHEN "1101110011" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(3278404,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(90064245,28);
logexp <= conv_std_logic_vector(1032,11);
WHEN "1101110100" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(3301117,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(102630404,28);
logexp <= conv_std_logic_vector(1032,11);
WHEN "1101110101" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(3323830,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(115196562,28);
logexp <= conv_std_logic_vector(1032,11);
WHEN "1101110110" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(3346543,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(127762720,28);
logexp <= conv_std_logic_vector(1032,11);
WHEN "1101110111" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(3369256,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(140328879,28);
logexp <= conv_std_logic_vector(1032,11);
WHEN "1101111000" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(3391969,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(152895037,28);
logexp <= conv_std_logic_vector(1032,11);
WHEN "1101111001" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(3414682,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(165461196,28);
logexp <= conv_std_logic_vector(1032,11);
WHEN "1101111010" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(3437395,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(178027354,28);
logexp <= conv_std_logic_vector(1032,11);
WHEN "1101111011" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(3460108,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(190593513,28);
logexp <= conv_std_logic_vector(1032,11);
WHEN "1101111100" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(3482821,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(203159671,28);
logexp <= conv_std_logic_vector(1032,11);
WHEN "1101111101" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(3505534,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(215725830,28);
logexp <= conv_std_logic_vector(1032,11);
WHEN "1101111110" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(3528247,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(228291988,28);
logexp <= conv_std_logic_vector(1032,11);
WHEN "1101111111" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(3550960,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(240858147,28);
logexp <= conv_std_logic_vector(1032,11);
WHEN "1110000000" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(3573673,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(253424305,28);
logexp <= conv_std_logic_vector(1032,11);
WHEN "1110000001" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(3596386,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(265990464,28);
logexp <= conv_std_logic_vector(1032,11);
WHEN "1110000010" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(3619100,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(10121166,28);
logexp <= conv_std_logic_vector(1032,11);
WHEN "1110000011" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(3641813,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(22687325,28);
logexp <= conv_std_logic_vector(1032,11);
WHEN "1110000100" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(3664526,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(35253483,28);
logexp <= conv_std_logic_vector(1032,11);
WHEN "1110000101" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(3687239,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(47819642,28);
logexp <= conv_std_logic_vector(1032,11);
WHEN "1110000110" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(3709952,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(60385800,28);
logexp <= conv_std_logic_vector(1032,11);
WHEN "1110000111" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(3732665,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(72951959,28);
logexp <= conv_std_logic_vector(1032,11);
WHEN "1110001000" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(3755378,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(85518117,28);
logexp <= conv_std_logic_vector(1032,11);
WHEN "1110001001" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(3778091,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(98084276,28);
logexp <= conv_std_logic_vector(1032,11);
WHEN "1110001010" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(3800804,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(110650434,28);
logexp <= conv_std_logic_vector(1032,11);
WHEN "1110001011" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(3823517,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(123216593,28);
logexp <= conv_std_logic_vector(1032,11);
WHEN "1110001100" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(3846230,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(135782751,28);
logexp <= conv_std_logic_vector(1032,11);
WHEN "1110001101" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(3868943,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(148348910,28);
logexp <= conv_std_logic_vector(1032,11);
WHEN "1110001110" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(3891656,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(160915068,28);
logexp <= conv_std_logic_vector(1032,11);
WHEN "1110001111" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(3914369,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(173481227,28);
logexp <= conv_std_logic_vector(1032,11);
WHEN "1110010000" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(3937082,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(186047385,28);
logexp <= conv_std_logic_vector(1032,11);
WHEN "1110010001" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(3959795,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(198613544,28);
logexp <= conv_std_logic_vector(1032,11);
WHEN "1110010010" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(3982508,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(211179702,28);
logexp <= conv_std_logic_vector(1032,11);
WHEN "1110010011" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(4005221,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(223745860,28);
logexp <= conv_std_logic_vector(1032,11);
WHEN "1110010100" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(4027934,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(236312019,28);
logexp <= conv_std_logic_vector(1032,11);
WHEN "1110010101" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(4050647,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(248878177,28);
logexp <= conv_std_logic_vector(1032,11);
WHEN "1110010110" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(4073360,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(261444336,28);
logexp <= conv_std_logic_vector(1032,11);
WHEN "1110010111" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(4096074,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(5575038,28);
logexp <= conv_std_logic_vector(1032,11);
WHEN "1110011000" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(4118787,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(18141197,28);
logexp <= conv_std_logic_vector(1032,11);
WHEN "1110011001" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(4141500,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(30707355,28);
logexp <= conv_std_logic_vector(1032,11);
WHEN "1110011010" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(4164213,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(43273514,28);
logexp <= conv_std_logic_vector(1032,11);
WHEN "1110011011" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(4186926,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(55839672,28);
logexp <= conv_std_logic_vector(1032,11);
WHEN "1110011100" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(4209639,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(68405831,28);
logexp <= conv_std_logic_vector(1032,11);
WHEN "1110011101" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(4232352,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(80971989,28);
logexp <= conv_std_logic_vector(1032,11);
WHEN "1110011110" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(4255065,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(93538148,28);
logexp <= conv_std_logic_vector(1032,11);
WHEN "1110011111" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(4277778,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(106104306,28);
logexp <= conv_std_logic_vector(1032,11);
WHEN "1110100000" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(4300491,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(118670465,28);
logexp <= conv_std_logic_vector(1032,11);
WHEN "1110100001" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(4323204,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(131236623,28);
logexp <= conv_std_logic_vector(1032,11);
WHEN "1110100010" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(4345917,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(143802782,28);
logexp <= conv_std_logic_vector(1032,11);
WHEN "1110100011" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(4368630,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(156368940,28);
logexp <= conv_std_logic_vector(1032,11);
WHEN "1110100100" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(4391343,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(168935099,28);
logexp <= conv_std_logic_vector(1032,11);
WHEN "1110100101" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(4414056,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(181501257,28);
logexp <= conv_std_logic_vector(1032,11);
WHEN "1110100110" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(4436769,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(194067416,28);
logexp <= conv_std_logic_vector(1032,11);
WHEN "1110100111" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(4459482,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(206633574,28);
logexp <= conv_std_logic_vector(1032,11);
WHEN "1110101000" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(4482195,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(219199733,28);
logexp <= conv_std_logic_vector(1032,11);
WHEN "1110101001" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(4504908,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(231765891,28);
logexp <= conv_std_logic_vector(1032,11);
WHEN "1110101010" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(4527621,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(244332050,28);
logexp <= conv_std_logic_vector(1032,11);
WHEN "1110101011" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(4550334,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(256898208,28);
logexp <= conv_std_logic_vector(1032,11);
WHEN "1110101100" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(4573048,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(1028911,28);
logexp <= conv_std_logic_vector(1032,11);
WHEN "1110101101" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(4595761,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(13595069,28);
logexp <= conv_std_logic_vector(1032,11);
WHEN "1110101110" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(4618474,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(26161228,28);
logexp <= conv_std_logic_vector(1032,11);
WHEN "1110101111" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(4641187,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(38727386,28);
logexp <= conv_std_logic_vector(1032,11);
WHEN "1110110000" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(4663900,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(51293545,28);
logexp <= conv_std_logic_vector(1032,11);
WHEN "1110110001" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(4686613,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(63859703,28);
logexp <= conv_std_logic_vector(1032,11);
WHEN "1110110010" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(4709326,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(76425861,28);
logexp <= conv_std_logic_vector(1032,11);
WHEN "1110110011" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(4732039,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(88992020,28);
logexp <= conv_std_logic_vector(1032,11);
WHEN "1110110100" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(4754752,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(101558178,28);
logexp <= conv_std_logic_vector(1032,11);
WHEN "1110110101" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(4777465,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(114124337,28);
logexp <= conv_std_logic_vector(1032,11);
WHEN "1110110110" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(4800178,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(126690495,28);
logexp <= conv_std_logic_vector(1032,11);
WHEN "1110110111" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(4822891,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(139256654,28);
logexp <= conv_std_logic_vector(1032,11);
WHEN "1110111000" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(4845604,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(151822812,28);
logexp <= conv_std_logic_vector(1032,11);
WHEN "1110111001" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(4868317,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(164388971,28);
logexp <= conv_std_logic_vector(1032,11);
WHEN "1110111010" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(4891030,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(176955129,28);
logexp <= conv_std_logic_vector(1032,11);
WHEN "1110111011" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(4913743,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(189521288,28);
logexp <= conv_std_logic_vector(1032,11);
WHEN "1110111100" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(4936456,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(202087446,28);
logexp <= conv_std_logic_vector(1032,11);
WHEN "1110111101" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(4959169,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(214653605,28);
logexp <= conv_std_logic_vector(1032,11);
WHEN "1110111110" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(4981882,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(227219763,28);
logexp <= conv_std_logic_vector(1032,11);
WHEN "1110111111" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(5004595,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(239785922,28);
logexp <= conv_std_logic_vector(1032,11);
WHEN "1111000000" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(5027308,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(252352080,28);
logexp <= conv_std_logic_vector(1032,11);
WHEN "1111000001" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(5050021,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(264918239,28);
logexp <= conv_std_logic_vector(1032,11);
WHEN "1111000010" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(5072735,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(9048941,28);
logexp <= conv_std_logic_vector(1032,11);
WHEN "1111000011" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(5095448,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(21615100,28);
logexp <= conv_std_logic_vector(1032,11);
WHEN "1111000100" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(5118161,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(34181258,28);
logexp <= conv_std_logic_vector(1032,11);
WHEN "1111000101" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(5140874,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(46747417,28);
logexp <= conv_std_logic_vector(1032,11);
WHEN "1111000110" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(5163587,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(59313575,28);
logexp <= conv_std_logic_vector(1032,11);
WHEN "1111000111" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(5186300,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(71879734,28);
logexp <= conv_std_logic_vector(1032,11);
WHEN "1111001000" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(5209013,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(84445892,28);
logexp <= conv_std_logic_vector(1032,11);
WHEN "1111001001" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(5231726,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(97012051,28);
logexp <= conv_std_logic_vector(1032,11);
WHEN "1111001010" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(5254439,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(109578209,28);
logexp <= conv_std_logic_vector(1032,11);
WHEN "1111001011" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(5277152,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(122144368,28);
logexp <= conv_std_logic_vector(1032,11);
WHEN "1111001100" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(5299865,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(134710526,28);
logexp <= conv_std_logic_vector(1032,11);
WHEN "1111001101" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(5322578,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(147276685,28);
logexp <= conv_std_logic_vector(1032,11);
WHEN "1111001110" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(5345291,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(159842843,28);
logexp <= conv_std_logic_vector(1032,11);
WHEN "1111001111" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(5368004,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(172409002,28);
logexp <= conv_std_logic_vector(1032,11);
WHEN "1111010000" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(5390717,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(184975160,28);
logexp <= conv_std_logic_vector(1032,11);
WHEN "1111010001" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(5413430,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(197541318,28);
logexp <= conv_std_logic_vector(1032,11);
WHEN "1111010010" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(5436143,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(210107477,28);
logexp <= conv_std_logic_vector(1032,11);
WHEN "1111010011" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(5458856,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(222673635,28);
logexp <= conv_std_logic_vector(1032,11);
WHEN "1111010100" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(5481569,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(235239794,28);
logexp <= conv_std_logic_vector(1032,11);
WHEN "1111010101" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(5504282,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(247805952,28);
logexp <= conv_std_logic_vector(1032,11);
WHEN "1111010110" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(5526995,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(260372111,28);
logexp <= conv_std_logic_vector(1032,11);
WHEN "1111010111" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(5549709,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(4502813,28);
logexp <= conv_std_logic_vector(1032,11);
WHEN "1111011000" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(5572422,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(17068972,28);
logexp <= conv_std_logic_vector(1032,11);
WHEN "1111011001" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(5595135,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(29635130,28);
logexp <= conv_std_logic_vector(1032,11);
WHEN "1111011010" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(5617848,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(42201289,28);
logexp <= conv_std_logic_vector(1032,11);
WHEN "1111011011" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(5640561,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(54767447,28);
logexp <= conv_std_logic_vector(1032,11);
WHEN "1111011100" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(5663274,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(67333606,28);
logexp <= conv_std_logic_vector(1032,11);
WHEN "1111011101" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(5685987,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(79899764,28);
logexp <= conv_std_logic_vector(1032,11);
WHEN "1111011110" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(5708700,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(92465923,28);
logexp <= conv_std_logic_vector(1032,11);
WHEN "1111011111" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(5731413,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(105032081,28);
logexp <= conv_std_logic_vector(1032,11);
WHEN "1111100000" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(5754126,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(117598240,28);
logexp <= conv_std_logic_vector(1032,11);
WHEN "1111100001" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(5776839,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(130164398,28);
logexp <= conv_std_logic_vector(1032,11);
WHEN "1111100010" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(5799552,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(142730557,28);
logexp <= conv_std_logic_vector(1032,11);
WHEN "1111100011" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(5822265,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(155296715,28);
logexp <= conv_std_logic_vector(1032,11);
WHEN "1111100100" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(5844978,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(167862874,28);
logexp <= conv_std_logic_vector(1032,11);
WHEN "1111100101" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(5867691,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(180429032,28);
logexp <= conv_std_logic_vector(1032,11);
WHEN "1111100110" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(5890404,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(192995191,28);
logexp <= conv_std_logic_vector(1032,11);
WHEN "1111100111" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(5913117,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(205561349,28);
logexp <= conv_std_logic_vector(1032,11);
WHEN "1111101000" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(5935830,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(218127508,28);
logexp <= conv_std_logic_vector(1032,11);
WHEN "1111101001" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(5958543,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(230693666,28);
logexp <= conv_std_logic_vector(1032,11);
WHEN "1111101010" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(5981256,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(243259825,28);
logexp <= conv_std_logic_vector(1032,11);
WHEN "1111101011" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(6003969,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(255825983,28);
logexp <= conv_std_logic_vector(1032,11);
WHEN "1111101100" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(6026682,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(268392142,28);
logexp <= conv_std_logic_vector(1032,11);
WHEN "1111101101" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(6049396,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(12522844,28);
logexp <= conv_std_logic_vector(1032,11);
WHEN "1111101110" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(6072109,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(25089003,28);
logexp <= conv_std_logic_vector(1032,11);
WHEN "1111101111" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(6094822,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(37655161,28);
logexp <= conv_std_logic_vector(1032,11);
WHEN "1111110000" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(6117535,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(50221319,28);
logexp <= conv_std_logic_vector(1032,11);
WHEN "1111110001" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(6140248,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(62787478,28);
logexp <= conv_std_logic_vector(1032,11);
WHEN "1111110010" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(6162961,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(75353636,28);
logexp <= conv_std_logic_vector(1032,11);
WHEN "1111110011" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(6185674,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(87919795,28);
logexp <= conv_std_logic_vector(1032,11);
WHEN "1111110100" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(6208387,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(100485953,28);
logexp <= conv_std_logic_vector(1032,11);
WHEN "1111110101" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(6231100,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(113052112,28);
logexp <= conv_std_logic_vector(1032,11);
WHEN "1111110110" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(6253813,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(125618270,28);
logexp <= conv_std_logic_vector(1032,11);
WHEN "1111110111" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(6276526,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(138184429,28);
logexp <= conv_std_logic_vector(1032,11);
WHEN "1111111000" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(6299239,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(150750587,28);
logexp <= conv_std_logic_vector(1032,11);
WHEN "1111111001" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(6321952,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(163316746,28);
logexp <= conv_std_logic_vector(1032,11);
WHEN "1111111010" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(6344665,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(175882904,28);
logexp <= conv_std_logic_vector(1032,11);
WHEN "1111111011" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(6367378,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(188449063,28);
logexp <= conv_std_logic_vector(1032,11);
WHEN "1111111100" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(6390091,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(201015221,28);
logexp <= conv_std_logic_vector(1032,11);
WHEN "1111111101" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(6412804,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(213581380,28);
logexp <= conv_std_logic_vector(1032,11);
WHEN "1111111110" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(6435517,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(226147538,28);
logexp <= conv_std_logic_vector(1032,11);
WHEN "1111111111" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(6458230,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(238713697,28);
logexp <= conv_std_logic_vector(1032,11);
WHEN others =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(0,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(0,28);
logexp <= conv_std_logic_vector(0,11);
END CASE;
END PROCESS;
END rtl;
|
LIBRARY ieee;
USE ieee.std_logic_1164.all;
USE ieee.std_logic_unsigned.all;
USE ieee.std_logic_arith.all;
--***************************************************
--*** ***
--*** FLOATING POINT CORE LIBRARY ***
--*** ***
--*** DP_LNLUTPOW.VHD ***
--*** ***
--*** Function: Look Up Table - LN() ***
--*** ***
--*** Generated by MATLAB Utility ***
--*** ***
--*** 18/02/08 ML ***
--*** ***
--*** (c) 2008 Altera Corporation ***
--*** ***
--*** Change History ***
--*** ***
--*** ***
--*** ***
--*** ***
--*** ***
--***************************************************
ENTITY dp_lnlutpow IS
PORT (
add : IN STD_LOGIC_VECTOR (10 DOWNTO 1);
logman : OUT STD_LOGIC_VECTOR (52 DOWNTO 1);
logexp : OUT STD_LOGIC_VECTOR (11 DOWNTO 1)
);
END dp_lnlutpow;
ARCHITECTURE rtl OF dp_lnlutpow IS
BEGIN
pca: PROCESS (add)
BEGIN
CASE add IS
WHEN "0000000000" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(0,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(0,28);
logexp <= conv_std_logic_vector(0,11);
WHEN "0000000001" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(6480943,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(251279855,28);
logexp <= conv_std_logic_vector(1022,11);
WHEN "0000000010" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(6480943,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(251279855,28);
logexp <= conv_std_logic_vector(1023,11);
WHEN "0000000011" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(666403,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(255568755,28);
logexp <= conv_std_logic_vector(1024,11);
WHEN "0000000100" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(6480943,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(251279855,28);
logexp <= conv_std_logic_vector(1024,11);
WHEN "0000000101" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(12295483,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(246990955,28);
logexp <= conv_std_logic_vector(1024,11);
WHEN "0000000110" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(666403,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(255568755,28);
logexp <= conv_std_logic_vector(1025,11);
WHEN "0000000111" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(3573673,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(253424305,28);
logexp <= conv_std_logic_vector(1025,11);
WHEN "0000001000" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(6480943,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(251279855,28);
logexp <= conv_std_logic_vector(1025,11);
WHEN "0000001001" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(9388213,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(249135405,28);
logexp <= conv_std_logic_vector(1025,11);
WHEN "0000001010" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(12295483,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(246990955,28);
logexp <= conv_std_logic_vector(1025,11);
WHEN "0000001011" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(15202753,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(244846505,28);
logexp <= conv_std_logic_vector(1025,11);
WHEN "0000001100" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(666403,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(255568755,28);
logexp <= conv_std_logic_vector(1026,11);
WHEN "0000001101" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(2120038,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(254496530,28);
logexp <= conv_std_logic_vector(1026,11);
WHEN "0000001110" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(3573673,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(253424305,28);
logexp <= conv_std_logic_vector(1026,11);
WHEN "0000001111" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(5027308,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(252352080,28);
logexp <= conv_std_logic_vector(1026,11);
WHEN "0000010000" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(6480943,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(251279855,28);
logexp <= conv_std_logic_vector(1026,11);
WHEN "0000010001" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(7934578,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(250207630,28);
logexp <= conv_std_logic_vector(1026,11);
WHEN "0000010010" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(9388213,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(249135405,28);
logexp <= conv_std_logic_vector(1026,11);
WHEN "0000010011" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(10841848,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(248063180,28);
logexp <= conv_std_logic_vector(1026,11);
WHEN "0000010100" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(12295483,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(246990955,28);
logexp <= conv_std_logic_vector(1026,11);
WHEN "0000010101" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(13749118,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(245918730,28);
logexp <= conv_std_logic_vector(1026,11);
WHEN "0000010110" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(15202753,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(244846505,28);
logexp <= conv_std_logic_vector(1026,11);
WHEN "0000010111" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(16656388,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(243774280,28);
logexp <= conv_std_logic_vector(1026,11);
WHEN "0000011000" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(666403,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(255568755,28);
logexp <= conv_std_logic_vector(1027,11);
WHEN "0000011001" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(1393221,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(120814915,28);
logexp <= conv_std_logic_vector(1027,11);
WHEN "0000011010" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(2120038,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(254496530,28);
logexp <= conv_std_logic_vector(1027,11);
WHEN "0000011011" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(2846856,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(119742690,28);
logexp <= conv_std_logic_vector(1027,11);
WHEN "0000011100" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(3573673,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(253424305,28);
logexp <= conv_std_logic_vector(1027,11);
WHEN "0000011101" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(4300491,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(118670465,28);
logexp <= conv_std_logic_vector(1027,11);
WHEN "0000011110" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(5027308,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(252352080,28);
logexp <= conv_std_logic_vector(1027,11);
WHEN "0000011111" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(5754126,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(117598240,28);
logexp <= conv_std_logic_vector(1027,11);
WHEN "0000100000" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(6480943,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(251279855,28);
logexp <= conv_std_logic_vector(1027,11);
WHEN "0000100001" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(7207761,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(116526015,28);
logexp <= conv_std_logic_vector(1027,11);
WHEN "0000100010" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(7934578,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(250207630,28);
logexp <= conv_std_logic_vector(1027,11);
WHEN "0000100011" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(8661396,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(115453790,28);
logexp <= conv_std_logic_vector(1027,11);
WHEN "0000100100" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(9388213,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(249135405,28);
logexp <= conv_std_logic_vector(1027,11);
WHEN "0000100101" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(10115031,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(114381565,28);
logexp <= conv_std_logic_vector(1027,11);
WHEN "0000100110" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(10841848,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(248063180,28);
logexp <= conv_std_logic_vector(1027,11);
WHEN "0000100111" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(11568666,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(113309340,28);
logexp <= conv_std_logic_vector(1027,11);
WHEN "0000101000" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(12295483,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(246990955,28);
logexp <= conv_std_logic_vector(1027,11);
WHEN "0000101001" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(13022301,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(112237114,28);
logexp <= conv_std_logic_vector(1027,11);
WHEN "0000101010" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(13749118,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(245918730,28);
logexp <= conv_std_logic_vector(1027,11);
WHEN "0000101011" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(14475936,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(111164889,28);
logexp <= conv_std_logic_vector(1027,11);
WHEN "0000101100" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(15202753,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(244846505,28);
logexp <= conv_std_logic_vector(1027,11);
WHEN "0000101101" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(15929571,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(110092664,28);
logexp <= conv_std_logic_vector(1027,11);
WHEN "0000101110" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(16656388,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(243774280,28);
logexp <= conv_std_logic_vector(1027,11);
WHEN "0000101111" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(302995,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(54510220,28);
logexp <= conv_std_logic_vector(1028,11);
WHEN "0000110000" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(666403,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(255568755,28);
logexp <= conv_std_logic_vector(1028,11);
WHEN "0000110001" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(1029812,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(188191835,28);
logexp <= conv_std_logic_vector(1028,11);
WHEN "0000110010" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(1393221,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(120814915,28);
logexp <= conv_std_logic_vector(1028,11);
WHEN "0000110011" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(1756630,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(53437995,28);
logexp <= conv_std_logic_vector(1028,11);
WHEN "0000110100" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(2120038,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(254496530,28);
logexp <= conv_std_logic_vector(1028,11);
WHEN "0000110101" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(2483447,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(187119610,28);
logexp <= conv_std_logic_vector(1028,11);
WHEN "0000110110" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(2846856,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(119742690,28);
logexp <= conv_std_logic_vector(1028,11);
WHEN "0000110111" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(3210265,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(52365770,28);
logexp <= conv_std_logic_vector(1028,11);
WHEN "0000111000" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(3573673,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(253424305,28);
logexp <= conv_std_logic_vector(1028,11);
WHEN "0000111001" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(3937082,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(186047385,28);
logexp <= conv_std_logic_vector(1028,11);
WHEN "0000111010" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(4300491,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(118670465,28);
logexp <= conv_std_logic_vector(1028,11);
WHEN "0000111011" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(4663900,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(51293545,28);
logexp <= conv_std_logic_vector(1028,11);
WHEN "0000111100" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(5027308,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(252352080,28);
logexp <= conv_std_logic_vector(1028,11);
WHEN "0000111101" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(5390717,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(184975160,28);
logexp <= conv_std_logic_vector(1028,11);
WHEN "0000111110" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(5754126,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(117598240,28);
logexp <= conv_std_logic_vector(1028,11);
WHEN "0000111111" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(6117535,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(50221319,28);
logexp <= conv_std_logic_vector(1028,11);
WHEN "0001000000" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(6480943,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(251279855,28);
logexp <= conv_std_logic_vector(1028,11);
WHEN "0001000001" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(6844352,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(183902935,28);
logexp <= conv_std_logic_vector(1028,11);
WHEN "0001000010" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(7207761,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(116526015,28);
logexp <= conv_std_logic_vector(1028,11);
WHEN "0001000011" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(7571170,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(49149094,28);
logexp <= conv_std_logic_vector(1028,11);
WHEN "0001000100" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(7934578,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(250207630,28);
logexp <= conv_std_logic_vector(1028,11);
WHEN "0001000101" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(8297987,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(182830710,28);
logexp <= conv_std_logic_vector(1028,11);
WHEN "0001000110" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(8661396,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(115453790,28);
logexp <= conv_std_logic_vector(1028,11);
WHEN "0001000111" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(9024805,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(48076869,28);
logexp <= conv_std_logic_vector(1028,11);
WHEN "0001001000" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(9388213,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(249135405,28);
logexp <= conv_std_logic_vector(1028,11);
WHEN "0001001001" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(9751622,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(181758485,28);
logexp <= conv_std_logic_vector(1028,11);
WHEN "0001001010" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(10115031,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(114381565,28);
logexp <= conv_std_logic_vector(1028,11);
WHEN "0001001011" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(10478440,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(47004644,28);
logexp <= conv_std_logic_vector(1028,11);
WHEN "0001001100" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(10841848,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(248063180,28);
logexp <= conv_std_logic_vector(1028,11);
WHEN "0001001101" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(11205257,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(180686260,28);
logexp <= conv_std_logic_vector(1028,11);
WHEN "0001001110" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(11568666,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(113309340,28);
logexp <= conv_std_logic_vector(1028,11);
WHEN "0001001111" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(11932075,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(45932419,28);
logexp <= conv_std_logic_vector(1028,11);
WHEN "0001010000" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(12295483,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(246990955,28);
logexp <= conv_std_logic_vector(1028,11);
WHEN "0001010001" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(12658892,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(179614035,28);
logexp <= conv_std_logic_vector(1028,11);
WHEN "0001010010" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(13022301,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(112237114,28);
logexp <= conv_std_logic_vector(1028,11);
WHEN "0001010011" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(13385710,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(44860194,28);
logexp <= conv_std_logic_vector(1028,11);
WHEN "0001010100" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(13749118,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(245918730,28);
logexp <= conv_std_logic_vector(1028,11);
WHEN "0001010101" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(14112527,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(178541810,28);
logexp <= conv_std_logic_vector(1028,11);
WHEN "0001010110" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(14475936,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(111164889,28);
logexp <= conv_std_logic_vector(1028,11);
WHEN "0001010111" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(14839345,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(43787969,28);
logexp <= conv_std_logic_vector(1028,11);
WHEN "0001011000" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(15202753,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(244846505,28);
logexp <= conv_std_logic_vector(1028,11);
WHEN "0001011001" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(15566162,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(177469585,28);
logexp <= conv_std_logic_vector(1028,11);
WHEN "0001011010" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(15929571,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(110092664,28);
logexp <= conv_std_logic_vector(1028,11);
WHEN "0001011011" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(16292980,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(42715744,28);
logexp <= conv_std_logic_vector(1028,11);
WHEN "0001011100" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(16656388,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(243774280,28);
logexp <= conv_std_logic_vector(1028,11);
WHEN "0001011101" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(121290,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(222416408,28);
logexp <= conv_std_logic_vector(1029,11);
WHEN "0001011110" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(302995,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(54510220,28);
logexp <= conv_std_logic_vector(1029,11);
WHEN "0001011111" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(484699,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(155039488,28);
logexp <= conv_std_logic_vector(1029,11);
WHEN "0001100000" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(666403,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(255568755,28);
logexp <= conv_std_logic_vector(1029,11);
WHEN "0001100001" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(848108,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(87662567,28);
logexp <= conv_std_logic_vector(1029,11);
WHEN "0001100010" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(1029812,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(188191835,28);
logexp <= conv_std_logic_vector(1029,11);
WHEN "0001100011" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(1211517,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(20285647,28);
logexp <= conv_std_logic_vector(1029,11);
WHEN "0001100100" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(1393221,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(120814915,28);
logexp <= conv_std_logic_vector(1029,11);
WHEN "0001100101" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(1574925,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(221344183,28);
logexp <= conv_std_logic_vector(1029,11);
WHEN "0001100110" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(1756630,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(53437995,28);
logexp <= conv_std_logic_vector(1029,11);
WHEN "0001100111" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(1938334,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(153967262,28);
logexp <= conv_std_logic_vector(1029,11);
WHEN "0001101000" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(2120038,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(254496530,28);
logexp <= conv_std_logic_vector(1029,11);
WHEN "0001101001" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(2301743,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(86590342,28);
logexp <= conv_std_logic_vector(1029,11);
WHEN "0001101010" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(2483447,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(187119610,28);
logexp <= conv_std_logic_vector(1029,11);
WHEN "0001101011" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(2665152,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(19213422,28);
logexp <= conv_std_logic_vector(1029,11);
WHEN "0001101100" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(2846856,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(119742690,28);
logexp <= conv_std_logic_vector(1029,11);
WHEN "0001101101" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(3028560,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(220271958,28);
logexp <= conv_std_logic_vector(1029,11);
WHEN "0001101110" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(3210265,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(52365770,28);
logexp <= conv_std_logic_vector(1029,11);
WHEN "0001101111" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(3391969,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(152895037,28);
logexp <= conv_std_logic_vector(1029,11);
WHEN "0001110000" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(3573673,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(253424305,28);
logexp <= conv_std_logic_vector(1029,11);
WHEN "0001110001" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(3755378,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(85518117,28);
logexp <= conv_std_logic_vector(1029,11);
WHEN "0001110010" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(3937082,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(186047385,28);
logexp <= conv_std_logic_vector(1029,11);
WHEN "0001110011" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(4118787,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(18141197,28);
logexp <= conv_std_logic_vector(1029,11);
WHEN "0001110100" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(4300491,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(118670465,28);
logexp <= conv_std_logic_vector(1029,11);
WHEN "0001110101" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(4482195,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(219199733,28);
logexp <= conv_std_logic_vector(1029,11);
WHEN "0001110110" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(4663900,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(51293545,28);
logexp <= conv_std_logic_vector(1029,11);
WHEN "0001110111" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(4845604,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(151822812,28);
logexp <= conv_std_logic_vector(1029,11);
WHEN "0001111000" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(5027308,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(252352080,28);
logexp <= conv_std_logic_vector(1029,11);
WHEN "0001111001" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(5209013,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(84445892,28);
logexp <= conv_std_logic_vector(1029,11);
WHEN "0001111010" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(5390717,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(184975160,28);
logexp <= conv_std_logic_vector(1029,11);
WHEN "0001111011" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(5572422,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(17068972,28);
logexp <= conv_std_logic_vector(1029,11);
WHEN "0001111100" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(5754126,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(117598240,28);
logexp <= conv_std_logic_vector(1029,11);
WHEN "0001111101" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(5935830,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(218127508,28);
logexp <= conv_std_logic_vector(1029,11);
WHEN "0001111110" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(6117535,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(50221319,28);
logexp <= conv_std_logic_vector(1029,11);
WHEN "0001111111" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(6299239,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(150750587,28);
logexp <= conv_std_logic_vector(1029,11);
WHEN "0010000000" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(6480943,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(251279855,28);
logexp <= conv_std_logic_vector(1029,11);
WHEN "0010000001" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(6662648,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(83373667,28);
logexp <= conv_std_logic_vector(1029,11);
WHEN "0010000010" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(6844352,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(183902935,28);
logexp <= conv_std_logic_vector(1029,11);
WHEN "0010000011" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(7026057,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(15996747,28);
logexp <= conv_std_logic_vector(1029,11);
WHEN "0010000100" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(7207761,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(116526015,28);
logexp <= conv_std_logic_vector(1029,11);
WHEN "0010000101" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(7389465,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(217055283,28);
logexp <= conv_std_logic_vector(1029,11);
WHEN "0010000110" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(7571170,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(49149094,28);
logexp <= conv_std_logic_vector(1029,11);
WHEN "0010000111" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(7752874,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(149678362,28);
logexp <= conv_std_logic_vector(1029,11);
WHEN "0010001000" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(7934578,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(250207630,28);
logexp <= conv_std_logic_vector(1029,11);
WHEN "0010001001" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(8116283,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(82301442,28);
logexp <= conv_std_logic_vector(1029,11);
WHEN "0010001010" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(8297987,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(182830710,28);
logexp <= conv_std_logic_vector(1029,11);
WHEN "0010001011" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(8479692,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(14924522,28);
logexp <= conv_std_logic_vector(1029,11);
WHEN "0010001100" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(8661396,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(115453790,28);
logexp <= conv_std_logic_vector(1029,11);
WHEN "0010001101" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(8843100,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(215983058,28);
logexp <= conv_std_logic_vector(1029,11);
WHEN "0010001110" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(9024805,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(48076869,28);
logexp <= conv_std_logic_vector(1029,11);
WHEN "0010001111" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(9206509,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(148606137,28);
logexp <= conv_std_logic_vector(1029,11);
WHEN "0010010000" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(9388213,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(249135405,28);
logexp <= conv_std_logic_vector(1029,11);
WHEN "0010010001" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(9569918,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(81229217,28);
logexp <= conv_std_logic_vector(1029,11);
WHEN "0010010010" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(9751622,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(181758485,28);
logexp <= conv_std_logic_vector(1029,11);
WHEN "0010010011" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(9933327,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(13852297,28);
logexp <= conv_std_logic_vector(1029,11);
WHEN "0010010100" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(10115031,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(114381565,28);
logexp <= conv_std_logic_vector(1029,11);
WHEN "0010010101" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(10296735,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(214910832,28);
logexp <= conv_std_logic_vector(1029,11);
WHEN "0010010110" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(10478440,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(47004644,28);
logexp <= conv_std_logic_vector(1029,11);
WHEN "0010010111" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(10660144,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(147533912,28);
logexp <= conv_std_logic_vector(1029,11);
WHEN "0010011000" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(10841848,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(248063180,28);
logexp <= conv_std_logic_vector(1029,11);
WHEN "0010011001" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(11023553,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(80156992,28);
logexp <= conv_std_logic_vector(1029,11);
WHEN "0010011010" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(11205257,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(180686260,28);
logexp <= conv_std_logic_vector(1029,11);
WHEN "0010011011" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(11386962,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(12780072,28);
logexp <= conv_std_logic_vector(1029,11);
WHEN "0010011100" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(11568666,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(113309340,28);
logexp <= conv_std_logic_vector(1029,11);
WHEN "0010011101" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(11750370,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(213838607,28);
logexp <= conv_std_logic_vector(1029,11);
WHEN "0010011110" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(11932075,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(45932419,28);
logexp <= conv_std_logic_vector(1029,11);
WHEN "0010011111" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(12113779,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(146461687,28);
logexp <= conv_std_logic_vector(1029,11);
WHEN "0010100000" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(12295483,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(246990955,28);
logexp <= conv_std_logic_vector(1029,11);
WHEN "0010100001" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(12477188,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(79084767,28);
logexp <= conv_std_logic_vector(1029,11);
WHEN "0010100010" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(12658892,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(179614035,28);
logexp <= conv_std_logic_vector(1029,11);
WHEN "0010100011" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(12840597,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(11707847,28);
logexp <= conv_std_logic_vector(1029,11);
WHEN "0010100100" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(13022301,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(112237114,28);
logexp <= conv_std_logic_vector(1029,11);
WHEN "0010100101" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(13204005,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(212766382,28);
logexp <= conv_std_logic_vector(1029,11);
WHEN "0010100110" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(13385710,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(44860194,28);
logexp <= conv_std_logic_vector(1029,11);
WHEN "0010100111" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(13567414,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(145389462,28);
logexp <= conv_std_logic_vector(1029,11);
WHEN "0010101000" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(13749118,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(245918730,28);
logexp <= conv_std_logic_vector(1029,11);
WHEN "0010101001" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(13930823,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(78012542,28);
logexp <= conv_std_logic_vector(1029,11);
WHEN "0010101010" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(14112527,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(178541810,28);
logexp <= conv_std_logic_vector(1029,11);
WHEN "0010101011" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(14294232,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(10635622,28);
logexp <= conv_std_logic_vector(1029,11);
WHEN "0010101100" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(14475936,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(111164889,28);
logexp <= conv_std_logic_vector(1029,11);
WHEN "0010101101" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(14657640,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(211694157,28);
logexp <= conv_std_logic_vector(1029,11);
WHEN "0010101110" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(14839345,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(43787969,28);
logexp <= conv_std_logic_vector(1029,11);
WHEN "0010101111" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(15021049,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(144317237,28);
logexp <= conv_std_logic_vector(1029,11);
WHEN "0010110000" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(15202753,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(244846505,28);
logexp <= conv_std_logic_vector(1029,11);
WHEN "0010110001" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(15384458,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(76940317,28);
logexp <= conv_std_logic_vector(1029,11);
WHEN "0010110010" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(15566162,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(177469585,28);
logexp <= conv_std_logic_vector(1029,11);
WHEN "0010110011" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(15747867,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(9563397,28);
logexp <= conv_std_logic_vector(1029,11);
WHEN "0010110100" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(15929571,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(110092664,28);
logexp <= conv_std_logic_vector(1029,11);
WHEN "0010110101" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(16111275,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(210621932,28);
logexp <= conv_std_logic_vector(1029,11);
WHEN "0010110110" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(16292980,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(42715744,28);
logexp <= conv_std_logic_vector(1029,11);
WHEN "0010110111" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(16474684,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(143245012,28);
logexp <= conv_std_logic_vector(1029,11);
WHEN "0010111000" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(16656388,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(243774280,28);
logexp <= conv_std_logic_vector(1029,11);
WHEN "0010111001" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(30438,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(172151774,28);
logexp <= conv_std_logic_vector(1030,11);
WHEN "0010111010" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(121290,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(222416408,28);
logexp <= conv_std_logic_vector(1030,11);
WHEN "0010111011" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(212143,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(4245586,28);
logexp <= conv_std_logic_vector(1030,11);
WHEN "0010111100" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(302995,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(54510220,28);
logexp <= conv_std_logic_vector(1030,11);
WHEN "0010111101" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(393847,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(104774854,28);
logexp <= conv_std_logic_vector(1030,11);
WHEN "0010111110" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(484699,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(155039488,28);
logexp <= conv_std_logic_vector(1030,11);
WHEN "0010111111" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(575551,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(205304121,28);
logexp <= conv_std_logic_vector(1030,11);
WHEN "0011000000" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(666403,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(255568755,28);
logexp <= conv_std_logic_vector(1030,11);
WHEN "0011000001" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(757256,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(37397933,28);
logexp <= conv_std_logic_vector(1030,11);
WHEN "0011000010" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(848108,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(87662567,28);
logexp <= conv_std_logic_vector(1030,11);
WHEN "0011000011" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(938960,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(137927201,28);
logexp <= conv_std_logic_vector(1030,11);
WHEN "0011000100" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(1029812,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(188191835,28);
logexp <= conv_std_logic_vector(1030,11);
WHEN "0011000101" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(1120664,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(238456469,28);
logexp <= conv_std_logic_vector(1030,11);
WHEN "0011000110" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(1211517,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(20285647,28);
logexp <= conv_std_logic_vector(1030,11);
WHEN "0011000111" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(1302369,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(70550281,28);
logexp <= conv_std_logic_vector(1030,11);
WHEN "0011001000" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(1393221,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(120814915,28);
logexp <= conv_std_logic_vector(1030,11);
WHEN "0011001001" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(1484073,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(171079549,28);
logexp <= conv_std_logic_vector(1030,11);
WHEN "0011001010" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(1574925,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(221344183,28);
logexp <= conv_std_logic_vector(1030,11);
WHEN "0011001011" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(1665778,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(3173361,28);
logexp <= conv_std_logic_vector(1030,11);
WHEN "0011001100" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(1756630,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(53437995,28);
logexp <= conv_std_logic_vector(1030,11);
WHEN "0011001101" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(1847482,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(103702629,28);
logexp <= conv_std_logic_vector(1030,11);
WHEN "0011001110" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(1938334,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(153967262,28);
logexp <= conv_std_logic_vector(1030,11);
WHEN "0011001111" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(2029186,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(204231896,28);
logexp <= conv_std_logic_vector(1030,11);
WHEN "0011010000" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(2120038,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(254496530,28);
logexp <= conv_std_logic_vector(1030,11);
WHEN "0011010001" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(2210891,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(36325708,28);
logexp <= conv_std_logic_vector(1030,11);
WHEN "0011010010" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(2301743,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(86590342,28);
logexp <= conv_std_logic_vector(1030,11);
WHEN "0011010011" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(2392595,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(136854976,28);
logexp <= conv_std_logic_vector(1030,11);
WHEN "0011010100" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(2483447,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(187119610,28);
logexp <= conv_std_logic_vector(1030,11);
WHEN "0011010101" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(2574299,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(237384244,28);
logexp <= conv_std_logic_vector(1030,11);
WHEN "0011010110" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(2665152,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(19213422,28);
logexp <= conv_std_logic_vector(1030,11);
WHEN "0011010111" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(2756004,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(69478056,28);
logexp <= conv_std_logic_vector(1030,11);
WHEN "0011011000" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(2846856,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(119742690,28);
logexp <= conv_std_logic_vector(1030,11);
WHEN "0011011001" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(2937708,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(170007324,28);
logexp <= conv_std_logic_vector(1030,11);
WHEN "0011011010" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(3028560,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(220271958,28);
logexp <= conv_std_logic_vector(1030,11);
WHEN "0011011011" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(3119413,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(2101136,28);
logexp <= conv_std_logic_vector(1030,11);
WHEN "0011011100" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(3210265,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(52365770,28);
logexp <= conv_std_logic_vector(1030,11);
WHEN "0011011101" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(3301117,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(102630404,28);
logexp <= conv_std_logic_vector(1030,11);
WHEN "0011011110" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(3391969,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(152895037,28);
logexp <= conv_std_logic_vector(1030,11);
WHEN "0011011111" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(3482821,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(203159671,28);
logexp <= conv_std_logic_vector(1030,11);
WHEN "0011100000" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(3573673,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(253424305,28);
logexp <= conv_std_logic_vector(1030,11);
WHEN "0011100001" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(3664526,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(35253483,28);
logexp <= conv_std_logic_vector(1030,11);
WHEN "0011100010" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(3755378,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(85518117,28);
logexp <= conv_std_logic_vector(1030,11);
WHEN "0011100011" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(3846230,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(135782751,28);
logexp <= conv_std_logic_vector(1030,11);
WHEN "0011100100" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(3937082,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(186047385,28);
logexp <= conv_std_logic_vector(1030,11);
WHEN "0011100101" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(4027934,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(236312019,28);
logexp <= conv_std_logic_vector(1030,11);
WHEN "0011100110" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(4118787,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(18141197,28);
logexp <= conv_std_logic_vector(1030,11);
WHEN "0011100111" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(4209639,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(68405831,28);
logexp <= conv_std_logic_vector(1030,11);
WHEN "0011101000" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(4300491,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(118670465,28);
logexp <= conv_std_logic_vector(1030,11);
WHEN "0011101001" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(4391343,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(168935099,28);
logexp <= conv_std_logic_vector(1030,11);
WHEN "0011101010" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(4482195,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(219199733,28);
logexp <= conv_std_logic_vector(1030,11);
WHEN "0011101011" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(4573048,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(1028911,28);
logexp <= conv_std_logic_vector(1030,11);
WHEN "0011101100" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(4663900,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(51293545,28);
logexp <= conv_std_logic_vector(1030,11);
WHEN "0011101101" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(4754752,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(101558178,28);
logexp <= conv_std_logic_vector(1030,11);
WHEN "0011101110" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(4845604,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(151822812,28);
logexp <= conv_std_logic_vector(1030,11);
WHEN "0011101111" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(4936456,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(202087446,28);
logexp <= conv_std_logic_vector(1030,11);
WHEN "0011110000" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(5027308,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(252352080,28);
logexp <= conv_std_logic_vector(1030,11);
WHEN "0011110001" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(5118161,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(34181258,28);
logexp <= conv_std_logic_vector(1030,11);
WHEN "0011110010" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(5209013,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(84445892,28);
logexp <= conv_std_logic_vector(1030,11);
WHEN "0011110011" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(5299865,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(134710526,28);
logexp <= conv_std_logic_vector(1030,11);
WHEN "0011110100" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(5390717,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(184975160,28);
logexp <= conv_std_logic_vector(1030,11);
WHEN "0011110101" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(5481569,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(235239794,28);
logexp <= conv_std_logic_vector(1030,11);
WHEN "0011110110" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(5572422,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(17068972,28);
logexp <= conv_std_logic_vector(1030,11);
WHEN "0011110111" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(5663274,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(67333606,28);
logexp <= conv_std_logic_vector(1030,11);
WHEN "0011111000" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(5754126,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(117598240,28);
logexp <= conv_std_logic_vector(1030,11);
WHEN "0011111001" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(5844978,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(167862874,28);
logexp <= conv_std_logic_vector(1030,11);
WHEN "0011111010" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(5935830,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(218127508,28);
logexp <= conv_std_logic_vector(1030,11);
WHEN "0011111011" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(6026682,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(268392142,28);
logexp <= conv_std_logic_vector(1030,11);
WHEN "0011111100" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(6117535,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(50221319,28);
logexp <= conv_std_logic_vector(1030,11);
WHEN "0011111101" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(6208387,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(100485953,28);
logexp <= conv_std_logic_vector(1030,11);
WHEN "0011111110" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(6299239,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(150750587,28);
logexp <= conv_std_logic_vector(1030,11);
WHEN "0011111111" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(6390091,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(201015221,28);
logexp <= conv_std_logic_vector(1030,11);
WHEN "0100000000" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(6480943,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(251279855,28);
logexp <= conv_std_logic_vector(1030,11);
WHEN "0100000001" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(6571796,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(33109033,28);
logexp <= conv_std_logic_vector(1030,11);
WHEN "0100000010" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(6662648,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(83373667,28);
logexp <= conv_std_logic_vector(1030,11);
WHEN "0100000011" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(6753500,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(133638301,28);
logexp <= conv_std_logic_vector(1030,11);
WHEN "0100000100" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(6844352,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(183902935,28);
logexp <= conv_std_logic_vector(1030,11);
WHEN "0100000101" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(6935204,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(234167569,28);
logexp <= conv_std_logic_vector(1030,11);
WHEN "0100000110" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(7026057,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(15996747,28);
logexp <= conv_std_logic_vector(1030,11);
WHEN "0100000111" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(7116909,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(66261381,28);
logexp <= conv_std_logic_vector(1030,11);
WHEN "0100001000" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(7207761,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(116526015,28);
logexp <= conv_std_logic_vector(1030,11);
WHEN "0100001001" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(7298613,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(166790649,28);
logexp <= conv_std_logic_vector(1030,11);
WHEN "0100001010" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(7389465,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(217055283,28);
logexp <= conv_std_logic_vector(1030,11);
WHEN "0100001011" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(7480317,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(267319916,28);
logexp <= conv_std_logic_vector(1030,11);
WHEN "0100001100" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(7571170,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(49149094,28);
logexp <= conv_std_logic_vector(1030,11);
WHEN "0100001101" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(7662022,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(99413728,28);
logexp <= conv_std_logic_vector(1030,11);
WHEN "0100001110" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(7752874,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(149678362,28);
logexp <= conv_std_logic_vector(1030,11);
WHEN "0100001111" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(7843726,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(199942996,28);
logexp <= conv_std_logic_vector(1030,11);
WHEN "0100010000" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(7934578,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(250207630,28);
logexp <= conv_std_logic_vector(1030,11);
WHEN "0100010001" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(8025431,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(32036808,28);
logexp <= conv_std_logic_vector(1030,11);
WHEN "0100010010" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(8116283,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(82301442,28);
logexp <= conv_std_logic_vector(1030,11);
WHEN "0100010011" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(8207135,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(132566076,28);
logexp <= conv_std_logic_vector(1030,11);
WHEN "0100010100" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(8297987,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(182830710,28);
logexp <= conv_std_logic_vector(1030,11);
WHEN "0100010101" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(8388839,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(233095344,28);
logexp <= conv_std_logic_vector(1030,11);
WHEN "0100010110" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(8479692,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(14924522,28);
logexp <= conv_std_logic_vector(1030,11);
WHEN "0100010111" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(8570544,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(65189156,28);
logexp <= conv_std_logic_vector(1030,11);
WHEN "0100011000" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(8661396,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(115453790,28);
logexp <= conv_std_logic_vector(1030,11);
WHEN "0100011001" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(8752248,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(165718424,28);
logexp <= conv_std_logic_vector(1030,11);
WHEN "0100011010" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(8843100,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(215983058,28);
logexp <= conv_std_logic_vector(1030,11);
WHEN "0100011011" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(8933952,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(266247691,28);
logexp <= conv_std_logic_vector(1030,11);
WHEN "0100011100" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(9024805,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(48076869,28);
logexp <= conv_std_logic_vector(1030,11);
WHEN "0100011101" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(9115657,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(98341503,28);
logexp <= conv_std_logic_vector(1030,11);
WHEN "0100011110" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(9206509,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(148606137,28);
logexp <= conv_std_logic_vector(1030,11);
WHEN "0100011111" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(9297361,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(198870771,28);
logexp <= conv_std_logic_vector(1030,11);
WHEN "0100100000" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(9388213,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(249135405,28);
logexp <= conv_std_logic_vector(1030,11);
WHEN "0100100001" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(9479066,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(30964583,28);
logexp <= conv_std_logic_vector(1030,11);
WHEN "0100100010" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(9569918,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(81229217,28);
logexp <= conv_std_logic_vector(1030,11);
WHEN "0100100011" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(9660770,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(131493851,28);
logexp <= conv_std_logic_vector(1030,11);
WHEN "0100100100" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(9751622,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(181758485,28);
logexp <= conv_std_logic_vector(1030,11);
WHEN "0100100101" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(9842474,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(232023119,28);
logexp <= conv_std_logic_vector(1030,11);
WHEN "0100100110" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(9933327,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(13852297,28);
logexp <= conv_std_logic_vector(1030,11);
WHEN "0100100111" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(10024179,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(64116931,28);
logexp <= conv_std_logic_vector(1030,11);
WHEN "0100101000" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(10115031,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(114381565,28);
logexp <= conv_std_logic_vector(1030,11);
WHEN "0100101001" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(10205883,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(164646199,28);
logexp <= conv_std_logic_vector(1030,11);
WHEN "0100101010" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(10296735,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(214910832,28);
logexp <= conv_std_logic_vector(1030,11);
WHEN "0100101011" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(10387587,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(265175466,28);
logexp <= conv_std_logic_vector(1030,11);
WHEN "0100101100" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(10478440,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(47004644,28);
logexp <= conv_std_logic_vector(1030,11);
WHEN "0100101101" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(10569292,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(97269278,28);
logexp <= conv_std_logic_vector(1030,11);
WHEN "0100101110" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(10660144,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(147533912,28);
logexp <= conv_std_logic_vector(1030,11);
WHEN "0100101111" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(10750996,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(197798546,28);
logexp <= conv_std_logic_vector(1030,11);
WHEN "0100110000" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(10841848,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(248063180,28);
logexp <= conv_std_logic_vector(1030,11);
WHEN "0100110001" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(10932701,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(29892358,28);
logexp <= conv_std_logic_vector(1030,11);
WHEN "0100110010" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(11023553,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(80156992,28);
logexp <= conv_std_logic_vector(1030,11);
WHEN "0100110011" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(11114405,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(130421626,28);
logexp <= conv_std_logic_vector(1030,11);
WHEN "0100110100" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(11205257,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(180686260,28);
logexp <= conv_std_logic_vector(1030,11);
WHEN "0100110101" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(11296109,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(230950894,28);
logexp <= conv_std_logic_vector(1030,11);
WHEN "0100110110" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(11386962,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(12780072,28);
logexp <= conv_std_logic_vector(1030,11);
WHEN "0100110111" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(11477814,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(63044706,28);
logexp <= conv_std_logic_vector(1030,11);
WHEN "0100111000" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(11568666,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(113309340,28);
logexp <= conv_std_logic_vector(1030,11);
WHEN "0100111001" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(11659518,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(163573973,28);
logexp <= conv_std_logic_vector(1030,11);
WHEN "0100111010" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(11750370,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(213838607,28);
logexp <= conv_std_logic_vector(1030,11);
WHEN "0100111011" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(11841222,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(264103241,28);
logexp <= conv_std_logic_vector(1030,11);
WHEN "0100111100" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(11932075,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(45932419,28);
logexp <= conv_std_logic_vector(1030,11);
WHEN "0100111101" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(12022927,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(96197053,28);
logexp <= conv_std_logic_vector(1030,11);
WHEN "0100111110" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(12113779,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(146461687,28);
logexp <= conv_std_logic_vector(1030,11);
WHEN "0100111111" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(12204631,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(196726321,28);
logexp <= conv_std_logic_vector(1030,11);
WHEN "0101000000" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(12295483,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(246990955,28);
logexp <= conv_std_logic_vector(1030,11);
WHEN "0101000001" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(12386336,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(28820133,28);
logexp <= conv_std_logic_vector(1030,11);
WHEN "0101000010" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(12477188,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(79084767,28);
logexp <= conv_std_logic_vector(1030,11);
WHEN "0101000011" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(12568040,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(129349401,28);
logexp <= conv_std_logic_vector(1030,11);
WHEN "0101000100" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(12658892,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(179614035,28);
logexp <= conv_std_logic_vector(1030,11);
WHEN "0101000101" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(12749744,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(229878669,28);
logexp <= conv_std_logic_vector(1030,11);
WHEN "0101000110" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(12840597,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(11707847,28);
logexp <= conv_std_logic_vector(1030,11);
WHEN "0101000111" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(12931449,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(61972481,28);
logexp <= conv_std_logic_vector(1030,11);
WHEN "0101001000" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(13022301,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(112237114,28);
logexp <= conv_std_logic_vector(1030,11);
WHEN "0101001001" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(13113153,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(162501748,28);
logexp <= conv_std_logic_vector(1030,11);
WHEN "0101001010" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(13204005,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(212766382,28);
logexp <= conv_std_logic_vector(1030,11);
WHEN "0101001011" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(13294857,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(263031016,28);
logexp <= conv_std_logic_vector(1030,11);
WHEN "0101001100" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(13385710,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(44860194,28);
logexp <= conv_std_logic_vector(1030,11);
WHEN "0101001101" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(13476562,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(95124828,28);
logexp <= conv_std_logic_vector(1030,11);
WHEN "0101001110" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(13567414,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(145389462,28);
logexp <= conv_std_logic_vector(1030,11);
WHEN "0101001111" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(13658266,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(195654096,28);
logexp <= conv_std_logic_vector(1030,11);
WHEN "0101010000" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(13749118,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(245918730,28);
logexp <= conv_std_logic_vector(1030,11);
WHEN "0101010001" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(13839971,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(27747908,28);
logexp <= conv_std_logic_vector(1030,11);
WHEN "0101010010" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(13930823,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(78012542,28);
logexp <= conv_std_logic_vector(1030,11);
WHEN "0101010011" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(14021675,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(128277176,28);
logexp <= conv_std_logic_vector(1030,11);
WHEN "0101010100" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(14112527,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(178541810,28);
logexp <= conv_std_logic_vector(1030,11);
WHEN "0101010101" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(14203379,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(228806444,28);
logexp <= conv_std_logic_vector(1030,11);
WHEN "0101010110" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(14294232,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(10635622,28);
logexp <= conv_std_logic_vector(1030,11);
WHEN "0101010111" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(14385084,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(60900256,28);
logexp <= conv_std_logic_vector(1030,11);
WHEN "0101011000" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(14475936,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(111164889,28);
logexp <= conv_std_logic_vector(1030,11);
WHEN "0101011001" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(14566788,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(161429523,28);
logexp <= conv_std_logic_vector(1030,11);
WHEN "0101011010" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(14657640,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(211694157,28);
logexp <= conv_std_logic_vector(1030,11);
WHEN "0101011011" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(14748492,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(261958791,28);
logexp <= conv_std_logic_vector(1030,11);
WHEN "0101011100" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(14839345,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(43787969,28);
logexp <= conv_std_logic_vector(1030,11);
WHEN "0101011101" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(14930197,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(94052603,28);
logexp <= conv_std_logic_vector(1030,11);
WHEN "0101011110" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(15021049,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(144317237,28);
logexp <= conv_std_logic_vector(1030,11);
WHEN "0101011111" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(15111901,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(194581871,28);
logexp <= conv_std_logic_vector(1030,11);
WHEN "0101100000" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(15202753,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(244846505,28);
logexp <= conv_std_logic_vector(1030,11);
WHEN "0101100001" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(15293606,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(26675683,28);
logexp <= conv_std_logic_vector(1030,11);
WHEN "0101100010" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(15384458,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(76940317,28);
logexp <= conv_std_logic_vector(1030,11);
WHEN "0101100011" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(15475310,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(127204951,28);
logexp <= conv_std_logic_vector(1030,11);
WHEN "0101100100" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(15566162,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(177469585,28);
logexp <= conv_std_logic_vector(1030,11);
WHEN "0101100101" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(15657014,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(227734219,28);
logexp <= conv_std_logic_vector(1030,11);
WHEN "0101100110" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(15747867,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(9563397,28);
logexp <= conv_std_logic_vector(1030,11);
WHEN "0101100111" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(15838719,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(59828030,28);
logexp <= conv_std_logic_vector(1030,11);
WHEN "0101101000" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(15929571,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(110092664,28);
logexp <= conv_std_logic_vector(1030,11);
WHEN "0101101001" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(16020423,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(160357298,28);
logexp <= conv_std_logic_vector(1030,11);
WHEN "0101101010" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(16111275,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(210621932,28);
logexp <= conv_std_logic_vector(1030,11);
WHEN "0101101011" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(16202127,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(260886566,28);
logexp <= conv_std_logic_vector(1030,11);
WHEN "0101101100" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(16292980,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(42715744,28);
logexp <= conv_std_logic_vector(1030,11);
WHEN "0101101101" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(16383832,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(92980378,28);
logexp <= conv_std_logic_vector(1030,11);
WHEN "0101101110" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(16474684,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(143245012,28);
logexp <= conv_std_logic_vector(1030,11);
WHEN "0101101111" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(16565536,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(193509646,28);
logexp <= conv_std_logic_vector(1030,11);
WHEN "0101110000" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(16656388,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(243774280,28);
logexp <= conv_std_logic_vector(1030,11);
WHEN "0101110001" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(16747241,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(25603458,28);
logexp <= conv_std_logic_vector(1030,11);
WHEN "0101110010" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(30438,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(172151774,28);
logexp <= conv_std_logic_vector(1031,11);
WHEN "0101110011" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(75864,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(197284091,28);
logexp <= conv_std_logic_vector(1031,11);
WHEN "0101110100" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(121290,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(222416408,28);
logexp <= conv_std_logic_vector(1031,11);
WHEN "0101110101" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(166716,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(247548725,28);
logexp <= conv_std_logic_vector(1031,11);
WHEN "0101110110" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(212143,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(4245586,28);
logexp <= conv_std_logic_vector(1031,11);
WHEN "0101110111" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(257569,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(29377903,28);
logexp <= conv_std_logic_vector(1031,11);
WHEN "0101111000" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(302995,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(54510220,28);
logexp <= conv_std_logic_vector(1031,11);
WHEN "0101111001" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(348421,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(79642537,28);
logexp <= conv_std_logic_vector(1031,11);
WHEN "0101111010" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(393847,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(104774854,28);
logexp <= conv_std_logic_vector(1031,11);
WHEN "0101111011" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(439273,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(129907171,28);
logexp <= conv_std_logic_vector(1031,11);
WHEN "0101111100" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(484699,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(155039488,28);
logexp <= conv_std_logic_vector(1031,11);
WHEN "0101111101" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(530125,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(180171805,28);
logexp <= conv_std_logic_vector(1031,11);
WHEN "0101111110" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(575551,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(205304121,28);
logexp <= conv_std_logic_vector(1031,11);
WHEN "0101111111" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(620977,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(230436438,28);
logexp <= conv_std_logic_vector(1031,11);
WHEN "0110000000" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(666403,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(255568755,28);
logexp <= conv_std_logic_vector(1031,11);
WHEN "0110000001" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(711830,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(12265616,28);
logexp <= conv_std_logic_vector(1031,11);
WHEN "0110000010" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(757256,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(37397933,28);
logexp <= conv_std_logic_vector(1031,11);
WHEN "0110000011" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(802682,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(62530250,28);
logexp <= conv_std_logic_vector(1031,11);
WHEN "0110000100" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(848108,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(87662567,28);
logexp <= conv_std_logic_vector(1031,11);
WHEN "0110000101" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(893534,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(112794884,28);
logexp <= conv_std_logic_vector(1031,11);
WHEN "0110000110" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(938960,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(137927201,28);
logexp <= conv_std_logic_vector(1031,11);
WHEN "0110000111" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(984386,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(163059518,28);
logexp <= conv_std_logic_vector(1031,11);
WHEN "0110001000" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(1029812,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(188191835,28);
logexp <= conv_std_logic_vector(1031,11);
WHEN "0110001001" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(1075238,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(213324152,28);
logexp <= conv_std_logic_vector(1031,11);
WHEN "0110001010" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(1120664,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(238456469,28);
logexp <= conv_std_logic_vector(1031,11);
WHEN "0110001011" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(1166090,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(263588786,28);
logexp <= conv_std_logic_vector(1031,11);
WHEN "0110001100" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(1211517,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(20285647,28);
logexp <= conv_std_logic_vector(1031,11);
WHEN "0110001101" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(1256943,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(45417964,28);
logexp <= conv_std_logic_vector(1031,11);
WHEN "0110001110" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(1302369,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(70550281,28);
logexp <= conv_std_logic_vector(1031,11);
WHEN "0110001111" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(1347795,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(95682598,28);
logexp <= conv_std_logic_vector(1031,11);
WHEN "0110010000" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(1393221,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(120814915,28);
logexp <= conv_std_logic_vector(1031,11);
WHEN "0110010001" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(1438647,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(145947232,28);
logexp <= conv_std_logic_vector(1031,11);
WHEN "0110010010" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(1484073,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(171079549,28);
logexp <= conv_std_logic_vector(1031,11);
WHEN "0110010011" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(1529499,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(196211866,28);
logexp <= conv_std_logic_vector(1031,11);
WHEN "0110010100" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(1574925,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(221344183,28);
logexp <= conv_std_logic_vector(1031,11);
WHEN "0110010101" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(1620351,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(246476500,28);
logexp <= conv_std_logic_vector(1031,11);
WHEN "0110010110" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(1665778,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(3173361,28);
logexp <= conv_std_logic_vector(1031,11);
WHEN "0110010111" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(1711204,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(28305678,28);
logexp <= conv_std_logic_vector(1031,11);
WHEN "0110011000" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(1756630,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(53437995,28);
logexp <= conv_std_logic_vector(1031,11);
WHEN "0110011001" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(1802056,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(78570312,28);
logexp <= conv_std_logic_vector(1031,11);
WHEN "0110011010" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(1847482,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(103702629,28);
logexp <= conv_std_logic_vector(1031,11);
WHEN "0110011011" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(1892908,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(128834946,28);
logexp <= conv_std_logic_vector(1031,11);
WHEN "0110011100" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(1938334,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(153967262,28);
logexp <= conv_std_logic_vector(1031,11);
WHEN "0110011101" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(1983760,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(179099579,28);
logexp <= conv_std_logic_vector(1031,11);
WHEN "0110011110" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(2029186,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(204231896,28);
logexp <= conv_std_logic_vector(1031,11);
WHEN "0110011111" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(2074612,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(229364213,28);
logexp <= conv_std_logic_vector(1031,11);
WHEN "0110100000" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(2120038,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(254496530,28);
logexp <= conv_std_logic_vector(1031,11);
WHEN "0110100001" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(2165465,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(11193391,28);
logexp <= conv_std_logic_vector(1031,11);
WHEN "0110100010" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(2210891,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(36325708,28);
logexp <= conv_std_logic_vector(1031,11);
WHEN "0110100011" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(2256317,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(61458025,28);
logexp <= conv_std_logic_vector(1031,11);
WHEN "0110100100" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(2301743,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(86590342,28);
logexp <= conv_std_logic_vector(1031,11);
WHEN "0110100101" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(2347169,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(111722659,28);
logexp <= conv_std_logic_vector(1031,11);
WHEN "0110100110" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(2392595,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(136854976,28);
logexp <= conv_std_logic_vector(1031,11);
WHEN "0110100111" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(2438021,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(161987293,28);
logexp <= conv_std_logic_vector(1031,11);
WHEN "0110101000" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(2483447,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(187119610,28);
logexp <= conv_std_logic_vector(1031,11);
WHEN "0110101001" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(2528873,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(212251927,28);
logexp <= conv_std_logic_vector(1031,11);
WHEN "0110101010" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(2574299,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(237384244,28);
logexp <= conv_std_logic_vector(1031,11);
WHEN "0110101011" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(2619725,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(262516561,28);
logexp <= conv_std_logic_vector(1031,11);
WHEN "0110101100" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(2665152,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(19213422,28);
logexp <= conv_std_logic_vector(1031,11);
WHEN "0110101101" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(2710578,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(44345739,28);
logexp <= conv_std_logic_vector(1031,11);
WHEN "0110101110" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(2756004,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(69478056,28);
logexp <= conv_std_logic_vector(1031,11);
WHEN "0110101111" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(2801430,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(94610373,28);
logexp <= conv_std_logic_vector(1031,11);
WHEN "0110110000" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(2846856,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(119742690,28);
logexp <= conv_std_logic_vector(1031,11);
WHEN "0110110001" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(2892282,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(144875007,28);
logexp <= conv_std_logic_vector(1031,11);
WHEN "0110110010" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(2937708,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(170007324,28);
logexp <= conv_std_logic_vector(1031,11);
WHEN "0110110011" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(2983134,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(195139641,28);
logexp <= conv_std_logic_vector(1031,11);
WHEN "0110110100" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(3028560,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(220271958,28);
logexp <= conv_std_logic_vector(1031,11);
WHEN "0110110101" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(3073986,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(245404275,28);
logexp <= conv_std_logic_vector(1031,11);
WHEN "0110110110" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(3119413,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(2101136,28);
logexp <= conv_std_logic_vector(1031,11);
WHEN "0110110111" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(3164839,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(27233453,28);
logexp <= conv_std_logic_vector(1031,11);
WHEN "0110111000" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(3210265,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(52365770,28);
logexp <= conv_std_logic_vector(1031,11);
WHEN "0110111001" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(3255691,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(77498087,28);
logexp <= conv_std_logic_vector(1031,11);
WHEN "0110111010" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(3301117,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(102630404,28);
logexp <= conv_std_logic_vector(1031,11);
WHEN "0110111011" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(3346543,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(127762720,28);
logexp <= conv_std_logic_vector(1031,11);
WHEN "0110111100" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(3391969,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(152895037,28);
logexp <= conv_std_logic_vector(1031,11);
WHEN "0110111101" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(3437395,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(178027354,28);
logexp <= conv_std_logic_vector(1031,11);
WHEN "0110111110" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(3482821,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(203159671,28);
logexp <= conv_std_logic_vector(1031,11);
WHEN "0110111111" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(3528247,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(228291988,28);
logexp <= conv_std_logic_vector(1031,11);
WHEN "0111000000" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(3573673,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(253424305,28);
logexp <= conv_std_logic_vector(1031,11);
WHEN "0111000001" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(3619100,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(10121166,28);
logexp <= conv_std_logic_vector(1031,11);
WHEN "0111000010" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(3664526,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(35253483,28);
logexp <= conv_std_logic_vector(1031,11);
WHEN "0111000011" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(3709952,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(60385800,28);
logexp <= conv_std_logic_vector(1031,11);
WHEN "0111000100" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(3755378,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(85518117,28);
logexp <= conv_std_logic_vector(1031,11);
WHEN "0111000101" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(3800804,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(110650434,28);
logexp <= conv_std_logic_vector(1031,11);
WHEN "0111000110" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(3846230,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(135782751,28);
logexp <= conv_std_logic_vector(1031,11);
WHEN "0111000111" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(3891656,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(160915068,28);
logexp <= conv_std_logic_vector(1031,11);
WHEN "0111001000" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(3937082,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(186047385,28);
logexp <= conv_std_logic_vector(1031,11);
WHEN "0111001001" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(3982508,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(211179702,28);
logexp <= conv_std_logic_vector(1031,11);
WHEN "0111001010" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(4027934,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(236312019,28);
logexp <= conv_std_logic_vector(1031,11);
WHEN "0111001011" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(4073360,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(261444336,28);
logexp <= conv_std_logic_vector(1031,11);
WHEN "0111001100" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(4118787,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(18141197,28);
logexp <= conv_std_logic_vector(1031,11);
WHEN "0111001101" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(4164213,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(43273514,28);
logexp <= conv_std_logic_vector(1031,11);
WHEN "0111001110" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(4209639,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(68405831,28);
logexp <= conv_std_logic_vector(1031,11);
WHEN "0111001111" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(4255065,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(93538148,28);
logexp <= conv_std_logic_vector(1031,11);
WHEN "0111010000" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(4300491,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(118670465,28);
logexp <= conv_std_logic_vector(1031,11);
WHEN "0111010001" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(4345917,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(143802782,28);
logexp <= conv_std_logic_vector(1031,11);
WHEN "0111010010" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(4391343,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(168935099,28);
logexp <= conv_std_logic_vector(1031,11);
WHEN "0111010011" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(4436769,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(194067416,28);
logexp <= conv_std_logic_vector(1031,11);
WHEN "0111010100" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(4482195,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(219199733,28);
logexp <= conv_std_logic_vector(1031,11);
WHEN "0111010101" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(4527621,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(244332050,28);
logexp <= conv_std_logic_vector(1031,11);
WHEN "0111010110" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(4573048,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(1028911,28);
logexp <= conv_std_logic_vector(1031,11);
WHEN "0111010111" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(4618474,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(26161228,28);
logexp <= conv_std_logic_vector(1031,11);
WHEN "0111011000" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(4663900,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(51293545,28);
logexp <= conv_std_logic_vector(1031,11);
WHEN "0111011001" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(4709326,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(76425861,28);
logexp <= conv_std_logic_vector(1031,11);
WHEN "0111011010" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(4754752,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(101558178,28);
logexp <= conv_std_logic_vector(1031,11);
WHEN "0111011011" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(4800178,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(126690495,28);
logexp <= conv_std_logic_vector(1031,11);
WHEN "0111011100" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(4845604,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(151822812,28);
logexp <= conv_std_logic_vector(1031,11);
WHEN "0111011101" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(4891030,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(176955129,28);
logexp <= conv_std_logic_vector(1031,11);
WHEN "0111011110" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(4936456,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(202087446,28);
logexp <= conv_std_logic_vector(1031,11);
WHEN "0111011111" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(4981882,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(227219763,28);
logexp <= conv_std_logic_vector(1031,11);
WHEN "0111100000" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(5027308,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(252352080,28);
logexp <= conv_std_logic_vector(1031,11);
WHEN "0111100001" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(5072735,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(9048941,28);
logexp <= conv_std_logic_vector(1031,11);
WHEN "0111100010" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(5118161,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(34181258,28);
logexp <= conv_std_logic_vector(1031,11);
WHEN "0111100011" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(5163587,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(59313575,28);
logexp <= conv_std_logic_vector(1031,11);
WHEN "0111100100" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(5209013,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(84445892,28);
logexp <= conv_std_logic_vector(1031,11);
WHEN "0111100101" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(5254439,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(109578209,28);
logexp <= conv_std_logic_vector(1031,11);
WHEN "0111100110" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(5299865,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(134710526,28);
logexp <= conv_std_logic_vector(1031,11);
WHEN "0111100111" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(5345291,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(159842843,28);
logexp <= conv_std_logic_vector(1031,11);
WHEN "0111101000" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(5390717,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(184975160,28);
logexp <= conv_std_logic_vector(1031,11);
WHEN "0111101001" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(5436143,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(210107477,28);
logexp <= conv_std_logic_vector(1031,11);
WHEN "0111101010" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(5481569,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(235239794,28);
logexp <= conv_std_logic_vector(1031,11);
WHEN "0111101011" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(5526995,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(260372111,28);
logexp <= conv_std_logic_vector(1031,11);
WHEN "0111101100" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(5572422,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(17068972,28);
logexp <= conv_std_logic_vector(1031,11);
WHEN "0111101101" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(5617848,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(42201289,28);
logexp <= conv_std_logic_vector(1031,11);
WHEN "0111101110" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(5663274,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(67333606,28);
logexp <= conv_std_logic_vector(1031,11);
WHEN "0111101111" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(5708700,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(92465923,28);
logexp <= conv_std_logic_vector(1031,11);
WHEN "0111110000" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(5754126,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(117598240,28);
logexp <= conv_std_logic_vector(1031,11);
WHEN "0111110001" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(5799552,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(142730557,28);
logexp <= conv_std_logic_vector(1031,11);
WHEN "0111110010" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(5844978,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(167862874,28);
logexp <= conv_std_logic_vector(1031,11);
WHEN "0111110011" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(5890404,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(192995191,28);
logexp <= conv_std_logic_vector(1031,11);
WHEN "0111110100" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(5935830,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(218127508,28);
logexp <= conv_std_logic_vector(1031,11);
WHEN "0111110101" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(5981256,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(243259825,28);
logexp <= conv_std_logic_vector(1031,11);
WHEN "0111110110" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(6026682,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(268392142,28);
logexp <= conv_std_logic_vector(1031,11);
WHEN "0111110111" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(6072109,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(25089003,28);
logexp <= conv_std_logic_vector(1031,11);
WHEN "0111111000" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(6117535,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(50221319,28);
logexp <= conv_std_logic_vector(1031,11);
WHEN "0111111001" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(6162961,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(75353636,28);
logexp <= conv_std_logic_vector(1031,11);
WHEN "0111111010" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(6208387,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(100485953,28);
logexp <= conv_std_logic_vector(1031,11);
WHEN "0111111011" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(6253813,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(125618270,28);
logexp <= conv_std_logic_vector(1031,11);
WHEN "0111111100" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(6299239,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(150750587,28);
logexp <= conv_std_logic_vector(1031,11);
WHEN "0111111101" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(6344665,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(175882904,28);
logexp <= conv_std_logic_vector(1031,11);
WHEN "0111111110" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(6390091,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(201015221,28);
logexp <= conv_std_logic_vector(1031,11);
WHEN "0111111111" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(6435517,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(226147538,28);
logexp <= conv_std_logic_vector(1031,11);
WHEN "1000000000" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(6480943,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(251279855,28);
logexp <= conv_std_logic_vector(1031,11);
WHEN "1000000001" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(6526370,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(7976716,28);
logexp <= conv_std_logic_vector(1031,11);
WHEN "1000000010" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(6571796,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(33109033,28);
logexp <= conv_std_logic_vector(1031,11);
WHEN "1000000011" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(6617222,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(58241350,28);
logexp <= conv_std_logic_vector(1031,11);
WHEN "1000000100" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(6662648,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(83373667,28);
logexp <= conv_std_logic_vector(1031,11);
WHEN "1000000101" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(6708074,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(108505984,28);
logexp <= conv_std_logic_vector(1031,11);
WHEN "1000000110" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(6753500,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(133638301,28);
logexp <= conv_std_logic_vector(1031,11);
WHEN "1000000111" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(6798926,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(158770618,28);
logexp <= conv_std_logic_vector(1031,11);
WHEN "1000001000" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(6844352,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(183902935,28);
logexp <= conv_std_logic_vector(1031,11);
WHEN "1000001001" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(6889778,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(209035252,28);
logexp <= conv_std_logic_vector(1031,11);
WHEN "1000001010" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(6935204,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(234167569,28);
logexp <= conv_std_logic_vector(1031,11);
WHEN "1000001011" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(6980630,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(259299886,28);
logexp <= conv_std_logic_vector(1031,11);
WHEN "1000001100" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(7026057,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(15996747,28);
logexp <= conv_std_logic_vector(1031,11);
WHEN "1000001101" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(7071483,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(41129064,28);
logexp <= conv_std_logic_vector(1031,11);
WHEN "1000001110" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(7116909,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(66261381,28);
logexp <= conv_std_logic_vector(1031,11);
WHEN "1000001111" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(7162335,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(91393698,28);
logexp <= conv_std_logic_vector(1031,11);
WHEN "1000010000" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(7207761,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(116526015,28);
logexp <= conv_std_logic_vector(1031,11);
WHEN "1000010001" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(7253187,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(141658332,28);
logexp <= conv_std_logic_vector(1031,11);
WHEN "1000010010" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(7298613,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(166790649,28);
logexp <= conv_std_logic_vector(1031,11);
WHEN "1000010011" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(7344039,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(191922966,28);
logexp <= conv_std_logic_vector(1031,11);
WHEN "1000010100" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(7389465,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(217055283,28);
logexp <= conv_std_logic_vector(1031,11);
WHEN "1000010101" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(7434891,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(242187600,28);
logexp <= conv_std_logic_vector(1031,11);
WHEN "1000010110" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(7480317,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(267319916,28);
logexp <= conv_std_logic_vector(1031,11);
WHEN "1000010111" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(7525744,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(24016777,28);
logexp <= conv_std_logic_vector(1031,11);
WHEN "1000011000" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(7571170,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(49149094,28);
logexp <= conv_std_logic_vector(1031,11);
WHEN "1000011001" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(7616596,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(74281411,28);
logexp <= conv_std_logic_vector(1031,11);
WHEN "1000011010" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(7662022,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(99413728,28);
logexp <= conv_std_logic_vector(1031,11);
WHEN "1000011011" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(7707448,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(124546045,28);
logexp <= conv_std_logic_vector(1031,11);
WHEN "1000011100" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(7752874,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(149678362,28);
logexp <= conv_std_logic_vector(1031,11);
WHEN "1000011101" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(7798300,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(174810679,28);
logexp <= conv_std_logic_vector(1031,11);
WHEN "1000011110" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(7843726,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(199942996,28);
logexp <= conv_std_logic_vector(1031,11);
WHEN "1000011111" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(7889152,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(225075313,28);
logexp <= conv_std_logic_vector(1031,11);
WHEN "1000100000" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(7934578,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(250207630,28);
logexp <= conv_std_logic_vector(1031,11);
WHEN "1000100001" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(7980005,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(6904491,28);
logexp <= conv_std_logic_vector(1031,11);
WHEN "1000100010" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(8025431,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(32036808,28);
logexp <= conv_std_logic_vector(1031,11);
WHEN "1000100011" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(8070857,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(57169125,28);
logexp <= conv_std_logic_vector(1031,11);
WHEN "1000100100" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(8116283,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(82301442,28);
logexp <= conv_std_logic_vector(1031,11);
WHEN "1000100101" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(8161709,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(107433759,28);
logexp <= conv_std_logic_vector(1031,11);
WHEN "1000100110" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(8207135,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(132566076,28);
logexp <= conv_std_logic_vector(1031,11);
WHEN "1000100111" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(8252561,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(157698393,28);
logexp <= conv_std_logic_vector(1031,11);
WHEN "1000101000" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(8297987,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(182830710,28);
logexp <= conv_std_logic_vector(1031,11);
WHEN "1000101001" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(8343413,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(207963027,28);
logexp <= conv_std_logic_vector(1031,11);
WHEN "1000101010" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(8388839,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(233095344,28);
logexp <= conv_std_logic_vector(1031,11);
WHEN "1000101011" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(8434265,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(258227661,28);
logexp <= conv_std_logic_vector(1031,11);
WHEN "1000101100" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(8479692,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(14924522,28);
logexp <= conv_std_logic_vector(1031,11);
WHEN "1000101101" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(8525118,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(40056839,28);
logexp <= conv_std_logic_vector(1031,11);
WHEN "1000101110" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(8570544,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(65189156,28);
logexp <= conv_std_logic_vector(1031,11);
WHEN "1000101111" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(8615970,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(90321473,28);
logexp <= conv_std_logic_vector(1031,11);
WHEN "1000110000" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(8661396,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(115453790,28);
logexp <= conv_std_logic_vector(1031,11);
WHEN "1000110001" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(8706822,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(140586107,28);
logexp <= conv_std_logic_vector(1031,11);
WHEN "1000110010" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(8752248,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(165718424,28);
logexp <= conv_std_logic_vector(1031,11);
WHEN "1000110011" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(8797674,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(190850741,28);
logexp <= conv_std_logic_vector(1031,11);
WHEN "1000110100" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(8843100,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(215983058,28);
logexp <= conv_std_logic_vector(1031,11);
WHEN "1000110101" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(8888526,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(241115374,28);
logexp <= conv_std_logic_vector(1031,11);
WHEN "1000110110" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(8933952,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(266247691,28);
logexp <= conv_std_logic_vector(1031,11);
WHEN "1000110111" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(8979379,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(22944552,28);
logexp <= conv_std_logic_vector(1031,11);
WHEN "1000111000" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(9024805,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(48076869,28);
logexp <= conv_std_logic_vector(1031,11);
WHEN "1000111001" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(9070231,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(73209186,28);
logexp <= conv_std_logic_vector(1031,11);
WHEN "1000111010" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(9115657,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(98341503,28);
logexp <= conv_std_logic_vector(1031,11);
WHEN "1000111011" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(9161083,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(123473820,28);
logexp <= conv_std_logic_vector(1031,11);
WHEN "1000111100" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(9206509,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(148606137,28);
logexp <= conv_std_logic_vector(1031,11);
WHEN "1000111101" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(9251935,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(173738454,28);
logexp <= conv_std_logic_vector(1031,11);
WHEN "1000111110" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(9297361,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(198870771,28);
logexp <= conv_std_logic_vector(1031,11);
WHEN "1000111111" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(9342787,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(224003088,28);
logexp <= conv_std_logic_vector(1031,11);
WHEN "1001000000" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(9388213,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(249135405,28);
logexp <= conv_std_logic_vector(1031,11);
WHEN "1001000001" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(9433640,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(5832266,28);
logexp <= conv_std_logic_vector(1031,11);
WHEN "1001000010" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(9479066,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(30964583,28);
logexp <= conv_std_logic_vector(1031,11);
WHEN "1001000011" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(9524492,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(56096900,28);
logexp <= conv_std_logic_vector(1031,11);
WHEN "1001000100" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(9569918,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(81229217,28);
logexp <= conv_std_logic_vector(1031,11);
WHEN "1001000101" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(9615344,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(106361534,28);
logexp <= conv_std_logic_vector(1031,11);
WHEN "1001000110" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(9660770,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(131493851,28);
logexp <= conv_std_logic_vector(1031,11);
WHEN "1001000111" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(9706196,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(156626168,28);
logexp <= conv_std_logic_vector(1031,11);
WHEN "1001001000" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(9751622,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(181758485,28);
logexp <= conv_std_logic_vector(1031,11);
WHEN "1001001001" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(9797048,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(206890802,28);
logexp <= conv_std_logic_vector(1031,11);
WHEN "1001001010" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(9842474,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(232023119,28);
logexp <= conv_std_logic_vector(1031,11);
WHEN "1001001011" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(9887900,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(257155436,28);
logexp <= conv_std_logic_vector(1031,11);
WHEN "1001001100" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(9933327,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(13852297,28);
logexp <= conv_std_logic_vector(1031,11);
WHEN "1001001101" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(9978753,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(38984614,28);
logexp <= conv_std_logic_vector(1031,11);
WHEN "1001001110" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(10024179,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(64116931,28);
logexp <= conv_std_logic_vector(1031,11);
WHEN "1001001111" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(10069605,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(89249248,28);
logexp <= conv_std_logic_vector(1031,11);
WHEN "1001010000" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(10115031,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(114381565,28);
logexp <= conv_std_logic_vector(1031,11);
WHEN "1001010001" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(10160457,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(139513882,28);
logexp <= conv_std_logic_vector(1031,11);
WHEN "1001010010" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(10205883,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(164646199,28);
logexp <= conv_std_logic_vector(1031,11);
WHEN "1001010011" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(10251309,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(189778515,28);
logexp <= conv_std_logic_vector(1031,11);
WHEN "1001010100" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(10296735,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(214910832,28);
logexp <= conv_std_logic_vector(1031,11);
WHEN "1001010101" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(10342161,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(240043149,28);
logexp <= conv_std_logic_vector(1031,11);
WHEN "1001010110" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(10387587,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(265175466,28);
logexp <= conv_std_logic_vector(1031,11);
WHEN "1001010111" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(10433014,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(21872327,28);
logexp <= conv_std_logic_vector(1031,11);
WHEN "1001011000" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(10478440,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(47004644,28);
logexp <= conv_std_logic_vector(1031,11);
WHEN "1001011001" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(10523866,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(72136961,28);
logexp <= conv_std_logic_vector(1031,11);
WHEN "1001011010" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(10569292,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(97269278,28);
logexp <= conv_std_logic_vector(1031,11);
WHEN "1001011011" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(10614718,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(122401595,28);
logexp <= conv_std_logic_vector(1031,11);
WHEN "1001011100" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(10660144,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(147533912,28);
logexp <= conv_std_logic_vector(1031,11);
WHEN "1001011101" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(10705570,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(172666229,28);
logexp <= conv_std_logic_vector(1031,11);
WHEN "1001011110" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(10750996,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(197798546,28);
logexp <= conv_std_logic_vector(1031,11);
WHEN "1001011111" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(10796422,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(222930863,28);
logexp <= conv_std_logic_vector(1031,11);
WHEN "1001100000" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(10841848,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(248063180,28);
logexp <= conv_std_logic_vector(1031,11);
WHEN "1001100001" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(10887275,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(4760041,28);
logexp <= conv_std_logic_vector(1031,11);
WHEN "1001100010" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(10932701,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(29892358,28);
logexp <= conv_std_logic_vector(1031,11);
WHEN "1001100011" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(10978127,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(55024675,28);
logexp <= conv_std_logic_vector(1031,11);
WHEN "1001100100" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(11023553,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(80156992,28);
logexp <= conv_std_logic_vector(1031,11);
WHEN "1001100101" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(11068979,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(105289309,28);
logexp <= conv_std_logic_vector(1031,11);
WHEN "1001100110" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(11114405,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(130421626,28);
logexp <= conv_std_logic_vector(1031,11);
WHEN "1001100111" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(11159831,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(155553943,28);
logexp <= conv_std_logic_vector(1031,11);
WHEN "1001101000" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(11205257,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(180686260,28);
logexp <= conv_std_logic_vector(1031,11);
WHEN "1001101001" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(11250683,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(205818577,28);
logexp <= conv_std_logic_vector(1031,11);
WHEN "1001101010" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(11296109,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(230950894,28);
logexp <= conv_std_logic_vector(1031,11);
WHEN "1001101011" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(11341535,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(256083211,28);
logexp <= conv_std_logic_vector(1031,11);
WHEN "1001101100" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(11386962,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(12780072,28);
logexp <= conv_std_logic_vector(1031,11);
WHEN "1001101101" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(11432388,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(37912389,28);
logexp <= conv_std_logic_vector(1031,11);
WHEN "1001101110" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(11477814,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(63044706,28);
logexp <= conv_std_logic_vector(1031,11);
WHEN "1001101111" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(11523240,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(88177023,28);
logexp <= conv_std_logic_vector(1031,11);
WHEN "1001110000" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(11568666,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(113309340,28);
logexp <= conv_std_logic_vector(1031,11);
WHEN "1001110001" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(11614092,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(138441657,28);
logexp <= conv_std_logic_vector(1031,11);
WHEN "1001110010" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(11659518,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(163573973,28);
logexp <= conv_std_logic_vector(1031,11);
WHEN "1001110011" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(11704944,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(188706290,28);
logexp <= conv_std_logic_vector(1031,11);
WHEN "1001110100" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(11750370,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(213838607,28);
logexp <= conv_std_logic_vector(1031,11);
WHEN "1001110101" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(11795796,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(238970924,28);
logexp <= conv_std_logic_vector(1031,11);
WHEN "1001110110" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(11841222,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(264103241,28);
logexp <= conv_std_logic_vector(1031,11);
WHEN "1001110111" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(11886649,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(20800102,28);
logexp <= conv_std_logic_vector(1031,11);
WHEN "1001111000" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(11932075,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(45932419,28);
logexp <= conv_std_logic_vector(1031,11);
WHEN "1001111001" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(11977501,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(71064736,28);
logexp <= conv_std_logic_vector(1031,11);
WHEN "1001111010" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(12022927,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(96197053,28);
logexp <= conv_std_logic_vector(1031,11);
WHEN "1001111011" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(12068353,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(121329370,28);
logexp <= conv_std_logic_vector(1031,11);
WHEN "1001111100" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(12113779,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(146461687,28);
logexp <= conv_std_logic_vector(1031,11);
WHEN "1001111101" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(12159205,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(171594004,28);
logexp <= conv_std_logic_vector(1031,11);
WHEN "1001111110" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(12204631,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(196726321,28);
logexp <= conv_std_logic_vector(1031,11);
WHEN "1001111111" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(12250057,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(221858638,28);
logexp <= conv_std_logic_vector(1031,11);
WHEN "1010000000" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(12295483,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(246990955,28);
logexp <= conv_std_logic_vector(1031,11);
WHEN "1010000001" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(12340910,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(3687816,28);
logexp <= conv_std_logic_vector(1031,11);
WHEN "1010000010" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(12386336,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(28820133,28);
logexp <= conv_std_logic_vector(1031,11);
WHEN "1010000011" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(12431762,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(53952450,28);
logexp <= conv_std_logic_vector(1031,11);
WHEN "1010000100" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(12477188,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(79084767,28);
logexp <= conv_std_logic_vector(1031,11);
WHEN "1010000101" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(12522614,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(104217084,28);
logexp <= conv_std_logic_vector(1031,11);
WHEN "1010000110" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(12568040,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(129349401,28);
logexp <= conv_std_logic_vector(1031,11);
WHEN "1010000111" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(12613466,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(154481718,28);
logexp <= conv_std_logic_vector(1031,11);
WHEN "1010001000" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(12658892,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(179614035,28);
logexp <= conv_std_logic_vector(1031,11);
WHEN "1010001001" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(12704318,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(204746352,28);
logexp <= conv_std_logic_vector(1031,11);
WHEN "1010001010" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(12749744,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(229878669,28);
logexp <= conv_std_logic_vector(1031,11);
WHEN "1010001011" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(12795170,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(255010986,28);
logexp <= conv_std_logic_vector(1031,11);
WHEN "1010001100" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(12840597,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(11707847,28);
logexp <= conv_std_logic_vector(1031,11);
WHEN "1010001101" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(12886023,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(36840164,28);
logexp <= conv_std_logic_vector(1031,11);
WHEN "1010001110" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(12931449,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(61972481,28);
logexp <= conv_std_logic_vector(1031,11);
WHEN "1010001111" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(12976875,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(87104798,28);
logexp <= conv_std_logic_vector(1031,11);
WHEN "1010010000" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(13022301,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(112237114,28);
logexp <= conv_std_logic_vector(1031,11);
WHEN "1010010001" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(13067727,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(137369431,28);
logexp <= conv_std_logic_vector(1031,11);
WHEN "1010010010" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(13113153,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(162501748,28);
logexp <= conv_std_logic_vector(1031,11);
WHEN "1010010011" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(13158579,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(187634065,28);
logexp <= conv_std_logic_vector(1031,11);
WHEN "1010010100" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(13204005,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(212766382,28);
logexp <= conv_std_logic_vector(1031,11);
WHEN "1010010101" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(13249431,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(237898699,28);
logexp <= conv_std_logic_vector(1031,11);
WHEN "1010010110" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(13294857,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(263031016,28);
logexp <= conv_std_logic_vector(1031,11);
WHEN "1010010111" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(13340284,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(19727877,28);
logexp <= conv_std_logic_vector(1031,11);
WHEN "1010011000" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(13385710,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(44860194,28);
logexp <= conv_std_logic_vector(1031,11);
WHEN "1010011001" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(13431136,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(69992511,28);
logexp <= conv_std_logic_vector(1031,11);
WHEN "1010011010" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(13476562,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(95124828,28);
logexp <= conv_std_logic_vector(1031,11);
WHEN "1010011011" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(13521988,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(120257145,28);
logexp <= conv_std_logic_vector(1031,11);
WHEN "1010011100" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(13567414,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(145389462,28);
logexp <= conv_std_logic_vector(1031,11);
WHEN "1010011101" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(13612840,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(170521779,28);
logexp <= conv_std_logic_vector(1031,11);
WHEN "1010011110" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(13658266,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(195654096,28);
logexp <= conv_std_logic_vector(1031,11);
WHEN "1010011111" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(13703692,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(220786413,28);
logexp <= conv_std_logic_vector(1031,11);
WHEN "1010100000" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(13749118,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(245918730,28);
logexp <= conv_std_logic_vector(1031,11);
WHEN "1010100001" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(13794545,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(2615591,28);
logexp <= conv_std_logic_vector(1031,11);
WHEN "1010100010" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(13839971,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(27747908,28);
logexp <= conv_std_logic_vector(1031,11);
WHEN "1010100011" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(13885397,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(52880225,28);
logexp <= conv_std_logic_vector(1031,11);
WHEN "1010100100" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(13930823,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(78012542,28);
logexp <= conv_std_logic_vector(1031,11);
WHEN "1010100101" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(13976249,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(103144859,28);
logexp <= conv_std_logic_vector(1031,11);
WHEN "1010100110" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(14021675,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(128277176,28);
logexp <= conv_std_logic_vector(1031,11);
WHEN "1010100111" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(14067101,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(153409493,28);
logexp <= conv_std_logic_vector(1031,11);
WHEN "1010101000" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(14112527,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(178541810,28);
logexp <= conv_std_logic_vector(1031,11);
WHEN "1010101001" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(14157953,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(203674127,28);
logexp <= conv_std_logic_vector(1031,11);
WHEN "1010101010" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(14203379,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(228806444,28);
logexp <= conv_std_logic_vector(1031,11);
WHEN "1010101011" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(14248805,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(253938761,28);
logexp <= conv_std_logic_vector(1031,11);
WHEN "1010101100" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(14294232,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(10635622,28);
logexp <= conv_std_logic_vector(1031,11);
WHEN "1010101101" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(14339658,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(35767939,28);
logexp <= conv_std_logic_vector(1031,11);
WHEN "1010101110" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(14385084,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(60900256,28);
logexp <= conv_std_logic_vector(1031,11);
WHEN "1010101111" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(14430510,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(86032572,28);
logexp <= conv_std_logic_vector(1031,11);
WHEN "1010110000" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(14475936,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(111164889,28);
logexp <= conv_std_logic_vector(1031,11);
WHEN "1010110001" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(14521362,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(136297206,28);
logexp <= conv_std_logic_vector(1031,11);
WHEN "1010110010" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(14566788,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(161429523,28);
logexp <= conv_std_logic_vector(1031,11);
WHEN "1010110011" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(14612214,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(186561840,28);
logexp <= conv_std_logic_vector(1031,11);
WHEN "1010110100" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(14657640,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(211694157,28);
logexp <= conv_std_logic_vector(1031,11);
WHEN "1010110101" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(14703066,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(236826474,28);
logexp <= conv_std_logic_vector(1031,11);
WHEN "1010110110" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(14748492,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(261958791,28);
logexp <= conv_std_logic_vector(1031,11);
WHEN "1010110111" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(14793919,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(18655652,28);
logexp <= conv_std_logic_vector(1031,11);
WHEN "1010111000" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(14839345,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(43787969,28);
logexp <= conv_std_logic_vector(1031,11);
WHEN "1010111001" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(14884771,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(68920286,28);
logexp <= conv_std_logic_vector(1031,11);
WHEN "1010111010" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(14930197,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(94052603,28);
logexp <= conv_std_logic_vector(1031,11);
WHEN "1010111011" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(14975623,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(119184920,28);
logexp <= conv_std_logic_vector(1031,11);
WHEN "1010111100" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(15021049,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(144317237,28);
logexp <= conv_std_logic_vector(1031,11);
WHEN "1010111101" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(15066475,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(169449554,28);
logexp <= conv_std_logic_vector(1031,11);
WHEN "1010111110" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(15111901,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(194581871,28);
logexp <= conv_std_logic_vector(1031,11);
WHEN "1010111111" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(15157327,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(219714188,28);
logexp <= conv_std_logic_vector(1031,11);
WHEN "1011000000" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(15202753,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(244846505,28);
logexp <= conv_std_logic_vector(1031,11);
WHEN "1011000001" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(15248180,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(1543366,28);
logexp <= conv_std_logic_vector(1031,11);
WHEN "1011000010" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(15293606,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(26675683,28);
logexp <= conv_std_logic_vector(1031,11);
WHEN "1011000011" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(15339032,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(51808000,28);
logexp <= conv_std_logic_vector(1031,11);
WHEN "1011000100" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(15384458,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(76940317,28);
logexp <= conv_std_logic_vector(1031,11);
WHEN "1011000101" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(15429884,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(102072634,28);
logexp <= conv_std_logic_vector(1031,11);
WHEN "1011000110" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(15475310,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(127204951,28);
logexp <= conv_std_logic_vector(1031,11);
WHEN "1011000111" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(15520736,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(152337268,28);
logexp <= conv_std_logic_vector(1031,11);
WHEN "1011001000" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(15566162,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(177469585,28);
logexp <= conv_std_logic_vector(1031,11);
WHEN "1011001001" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(15611588,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(202601902,28);
logexp <= conv_std_logic_vector(1031,11);
WHEN "1011001010" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(15657014,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(227734219,28);
logexp <= conv_std_logic_vector(1031,11);
WHEN "1011001011" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(15702440,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(252866536,28);
logexp <= conv_std_logic_vector(1031,11);
WHEN "1011001100" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(15747867,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(9563397,28);
logexp <= conv_std_logic_vector(1031,11);
WHEN "1011001101" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(15793293,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(34695713,28);
logexp <= conv_std_logic_vector(1031,11);
WHEN "1011001110" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(15838719,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(59828030,28);
logexp <= conv_std_logic_vector(1031,11);
WHEN "1011001111" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(15884145,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(84960347,28);
logexp <= conv_std_logic_vector(1031,11);
WHEN "1011010000" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(15929571,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(110092664,28);
logexp <= conv_std_logic_vector(1031,11);
WHEN "1011010001" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(15974997,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(135224981,28);
logexp <= conv_std_logic_vector(1031,11);
WHEN "1011010010" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(16020423,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(160357298,28);
logexp <= conv_std_logic_vector(1031,11);
WHEN "1011010011" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(16065849,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(185489615,28);
logexp <= conv_std_logic_vector(1031,11);
WHEN "1011010100" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(16111275,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(210621932,28);
logexp <= conv_std_logic_vector(1031,11);
WHEN "1011010101" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(16156701,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(235754249,28);
logexp <= conv_std_logic_vector(1031,11);
WHEN "1011010110" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(16202127,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(260886566,28);
logexp <= conv_std_logic_vector(1031,11);
WHEN "1011010111" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(16247554,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(17583427,28);
logexp <= conv_std_logic_vector(1031,11);
WHEN "1011011000" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(16292980,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(42715744,28);
logexp <= conv_std_logic_vector(1031,11);
WHEN "1011011001" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(16338406,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(67848061,28);
logexp <= conv_std_logic_vector(1031,11);
WHEN "1011011010" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(16383832,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(92980378,28);
logexp <= conv_std_logic_vector(1031,11);
WHEN "1011011011" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(16429258,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(118112695,28);
logexp <= conv_std_logic_vector(1031,11);
WHEN "1011011100" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(16474684,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(143245012,28);
logexp <= conv_std_logic_vector(1031,11);
WHEN "1011011101" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(16520110,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(168377329,28);
logexp <= conv_std_logic_vector(1031,11);
WHEN "1011011110" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(16565536,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(193509646,28);
logexp <= conv_std_logic_vector(1031,11);
WHEN "1011011111" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(16610962,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(218641963,28);
logexp <= conv_std_logic_vector(1031,11);
WHEN "1011100000" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(16656388,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(243774280,28);
logexp <= conv_std_logic_vector(1031,11);
WHEN "1011100001" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(16701815,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(471141,28);
logexp <= conv_std_logic_vector(1031,11);
WHEN "1011100010" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(16747241,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(25603458,28);
logexp <= conv_std_logic_vector(1031,11);
WHEN "1011100011" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(7725,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(159585615,28);
logexp <= conv_std_logic_vector(1032,11);
WHEN "1011100100" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(30438,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(172151774,28);
logexp <= conv_std_logic_vector(1032,11);
WHEN "1011100101" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(53151,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(184717932,28);
logexp <= conv_std_logic_vector(1032,11);
WHEN "1011100110" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(75864,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(197284091,28);
logexp <= conv_std_logic_vector(1032,11);
WHEN "1011100111" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(98577,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(209850249,28);
logexp <= conv_std_logic_vector(1032,11);
WHEN "1011101000" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(121290,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(222416408,28);
logexp <= conv_std_logic_vector(1032,11);
WHEN "1011101001" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(144003,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(234982566,28);
logexp <= conv_std_logic_vector(1032,11);
WHEN "1011101010" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(166716,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(247548725,28);
logexp <= conv_std_logic_vector(1032,11);
WHEN "1011101011" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(189429,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(260114883,28);
logexp <= conv_std_logic_vector(1032,11);
WHEN "1011101100" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(212143,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(4245586,28);
logexp <= conv_std_logic_vector(1032,11);
WHEN "1011101101" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(234856,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(16811744,28);
logexp <= conv_std_logic_vector(1032,11);
WHEN "1011101110" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(257569,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(29377903,28);
logexp <= conv_std_logic_vector(1032,11);
WHEN "1011101111" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(280282,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(41944061,28);
logexp <= conv_std_logic_vector(1032,11);
WHEN "1011110000" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(302995,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(54510220,28);
logexp <= conv_std_logic_vector(1032,11);
WHEN "1011110001" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(325708,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(67076378,28);
logexp <= conv_std_logic_vector(1032,11);
WHEN "1011110010" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(348421,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(79642537,28);
logexp <= conv_std_logic_vector(1032,11);
WHEN "1011110011" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(371134,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(92208695,28);
logexp <= conv_std_logic_vector(1032,11);
WHEN "1011110100" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(393847,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(104774854,28);
logexp <= conv_std_logic_vector(1032,11);
WHEN "1011110101" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(416560,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(117341012,28);
logexp <= conv_std_logic_vector(1032,11);
WHEN "1011110110" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(439273,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(129907171,28);
logexp <= conv_std_logic_vector(1032,11);
WHEN "1011110111" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(461986,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(142473329,28);
logexp <= conv_std_logic_vector(1032,11);
WHEN "1011111000" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(484699,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(155039488,28);
logexp <= conv_std_logic_vector(1032,11);
WHEN "1011111001" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(507412,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(167605646,28);
logexp <= conv_std_logic_vector(1032,11);
WHEN "1011111010" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(530125,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(180171805,28);
logexp <= conv_std_logic_vector(1032,11);
WHEN "1011111011" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(552838,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(192737963,28);
logexp <= conv_std_logic_vector(1032,11);
WHEN "1011111100" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(575551,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(205304121,28);
logexp <= conv_std_logic_vector(1032,11);
WHEN "1011111101" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(598264,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(217870280,28);
logexp <= conv_std_logic_vector(1032,11);
WHEN "1011111110" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(620977,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(230436438,28);
logexp <= conv_std_logic_vector(1032,11);
WHEN "1011111111" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(643690,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(243002597,28);
logexp <= conv_std_logic_vector(1032,11);
WHEN "1100000000" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(666403,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(255568755,28);
logexp <= conv_std_logic_vector(1032,11);
WHEN "1100000001" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(689116,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(268134914,28);
logexp <= conv_std_logic_vector(1032,11);
WHEN "1100000010" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(711830,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(12265616,28);
logexp <= conv_std_logic_vector(1032,11);
WHEN "1100000011" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(734543,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(24831775,28);
logexp <= conv_std_logic_vector(1032,11);
WHEN "1100000100" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(757256,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(37397933,28);
logexp <= conv_std_logic_vector(1032,11);
WHEN "1100000101" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(779969,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(49964092,28);
logexp <= conv_std_logic_vector(1032,11);
WHEN "1100000110" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(802682,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(62530250,28);
logexp <= conv_std_logic_vector(1032,11);
WHEN "1100000111" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(825395,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(75096409,28);
logexp <= conv_std_logic_vector(1032,11);
WHEN "1100001000" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(848108,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(87662567,28);
logexp <= conv_std_logic_vector(1032,11);
WHEN "1100001001" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(870821,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(100228726,28);
logexp <= conv_std_logic_vector(1032,11);
WHEN "1100001010" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(893534,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(112794884,28);
logexp <= conv_std_logic_vector(1032,11);
WHEN "1100001011" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(916247,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(125361043,28);
logexp <= conv_std_logic_vector(1032,11);
WHEN "1100001100" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(938960,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(137927201,28);
logexp <= conv_std_logic_vector(1032,11);
WHEN "1100001101" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(961673,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(150493360,28);
logexp <= conv_std_logic_vector(1032,11);
WHEN "1100001110" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(984386,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(163059518,28);
logexp <= conv_std_logic_vector(1032,11);
WHEN "1100001111" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(1007099,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(175625677,28);
logexp <= conv_std_logic_vector(1032,11);
WHEN "1100010000" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(1029812,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(188191835,28);
logexp <= conv_std_logic_vector(1032,11);
WHEN "1100010001" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(1052525,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(200757994,28);
logexp <= conv_std_logic_vector(1032,11);
WHEN "1100010010" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(1075238,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(213324152,28);
logexp <= conv_std_logic_vector(1032,11);
WHEN "1100010011" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(1097951,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(225890311,28);
logexp <= conv_std_logic_vector(1032,11);
WHEN "1100010100" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(1120664,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(238456469,28);
logexp <= conv_std_logic_vector(1032,11);
WHEN "1100010101" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(1143377,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(251022628,28);
logexp <= conv_std_logic_vector(1032,11);
WHEN "1100010110" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(1166090,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(263588786,28);
logexp <= conv_std_logic_vector(1032,11);
WHEN "1100010111" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(1188804,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(7719489,28);
logexp <= conv_std_logic_vector(1032,11);
WHEN "1100011000" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(1211517,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(20285647,28);
logexp <= conv_std_logic_vector(1032,11);
WHEN "1100011001" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(1234230,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(32851805,28);
logexp <= conv_std_logic_vector(1032,11);
WHEN "1100011010" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(1256943,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(45417964,28);
logexp <= conv_std_logic_vector(1032,11);
WHEN "1100011011" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(1279656,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(57984122,28);
logexp <= conv_std_logic_vector(1032,11);
WHEN "1100011100" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(1302369,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(70550281,28);
logexp <= conv_std_logic_vector(1032,11);
WHEN "1100011101" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(1325082,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(83116439,28);
logexp <= conv_std_logic_vector(1032,11);
WHEN "1100011110" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(1347795,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(95682598,28);
logexp <= conv_std_logic_vector(1032,11);
WHEN "1100011111" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(1370508,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(108248756,28);
logexp <= conv_std_logic_vector(1032,11);
WHEN "1100100000" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(1393221,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(120814915,28);
logexp <= conv_std_logic_vector(1032,11);
WHEN "1100100001" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(1415934,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(133381073,28);
logexp <= conv_std_logic_vector(1032,11);
WHEN "1100100010" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(1438647,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(145947232,28);
logexp <= conv_std_logic_vector(1032,11);
WHEN "1100100011" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(1461360,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(158513390,28);
logexp <= conv_std_logic_vector(1032,11);
WHEN "1100100100" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(1484073,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(171079549,28);
logexp <= conv_std_logic_vector(1032,11);
WHEN "1100100101" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(1506786,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(183645707,28);
logexp <= conv_std_logic_vector(1032,11);
WHEN "1100100110" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(1529499,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(196211866,28);
logexp <= conv_std_logic_vector(1032,11);
WHEN "1100100111" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(1552212,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(208778024,28);
logexp <= conv_std_logic_vector(1032,11);
WHEN "1100101000" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(1574925,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(221344183,28);
logexp <= conv_std_logic_vector(1032,11);
WHEN "1100101001" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(1597638,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(233910341,28);
logexp <= conv_std_logic_vector(1032,11);
WHEN "1100101010" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(1620351,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(246476500,28);
logexp <= conv_std_logic_vector(1032,11);
WHEN "1100101011" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(1643064,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(259042658,28);
logexp <= conv_std_logic_vector(1032,11);
WHEN "1100101100" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(1665778,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(3173361,28);
logexp <= conv_std_logic_vector(1032,11);
WHEN "1100101101" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(1688491,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(15739519,28);
logexp <= conv_std_logic_vector(1032,11);
WHEN "1100101110" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(1711204,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(28305678,28);
logexp <= conv_std_logic_vector(1032,11);
WHEN "1100101111" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(1733917,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(40871836,28);
logexp <= conv_std_logic_vector(1032,11);
WHEN "1100110000" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(1756630,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(53437995,28);
logexp <= conv_std_logic_vector(1032,11);
WHEN "1100110001" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(1779343,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(66004153,28);
logexp <= conv_std_logic_vector(1032,11);
WHEN "1100110010" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(1802056,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(78570312,28);
logexp <= conv_std_logic_vector(1032,11);
WHEN "1100110011" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(1824769,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(91136470,28);
logexp <= conv_std_logic_vector(1032,11);
WHEN "1100110100" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(1847482,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(103702629,28);
logexp <= conv_std_logic_vector(1032,11);
WHEN "1100110101" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(1870195,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(116268787,28);
logexp <= conv_std_logic_vector(1032,11);
WHEN "1100110110" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(1892908,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(128834946,28);
logexp <= conv_std_logic_vector(1032,11);
WHEN "1100110111" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(1915621,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(141401104,28);
logexp <= conv_std_logic_vector(1032,11);
WHEN "1100111000" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(1938334,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(153967262,28);
logexp <= conv_std_logic_vector(1032,11);
WHEN "1100111001" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(1961047,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(166533421,28);
logexp <= conv_std_logic_vector(1032,11);
WHEN "1100111010" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(1983760,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(179099579,28);
logexp <= conv_std_logic_vector(1032,11);
WHEN "1100111011" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(2006473,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(191665738,28);
logexp <= conv_std_logic_vector(1032,11);
WHEN "1100111100" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(2029186,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(204231896,28);
logexp <= conv_std_logic_vector(1032,11);
WHEN "1100111101" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(2051899,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(216798055,28);
logexp <= conv_std_logic_vector(1032,11);
WHEN "1100111110" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(2074612,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(229364213,28);
logexp <= conv_std_logic_vector(1032,11);
WHEN "1100111111" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(2097325,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(241930372,28);
logexp <= conv_std_logic_vector(1032,11);
WHEN "1101000000" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(2120038,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(254496530,28);
logexp <= conv_std_logic_vector(1032,11);
WHEN "1101000001" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(2142751,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(267062689,28);
logexp <= conv_std_logic_vector(1032,11);
WHEN "1101000010" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(2165465,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(11193391,28);
logexp <= conv_std_logic_vector(1032,11);
WHEN "1101000011" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(2188178,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(23759550,28);
logexp <= conv_std_logic_vector(1032,11);
WHEN "1101000100" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(2210891,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(36325708,28);
logexp <= conv_std_logic_vector(1032,11);
WHEN "1101000101" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(2233604,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(48891867,28);
logexp <= conv_std_logic_vector(1032,11);
WHEN "1101000110" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(2256317,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(61458025,28);
logexp <= conv_std_logic_vector(1032,11);
WHEN "1101000111" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(2279030,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(74024184,28);
logexp <= conv_std_logic_vector(1032,11);
WHEN "1101001000" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(2301743,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(86590342,28);
logexp <= conv_std_logic_vector(1032,11);
WHEN "1101001001" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(2324456,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(99156501,28);
logexp <= conv_std_logic_vector(1032,11);
WHEN "1101001010" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(2347169,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(111722659,28);
logexp <= conv_std_logic_vector(1032,11);
WHEN "1101001011" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(2369882,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(124288818,28);
logexp <= conv_std_logic_vector(1032,11);
WHEN "1101001100" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(2392595,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(136854976,28);
logexp <= conv_std_logic_vector(1032,11);
WHEN "1101001101" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(2415308,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(149421135,28);
logexp <= conv_std_logic_vector(1032,11);
WHEN "1101001110" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(2438021,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(161987293,28);
logexp <= conv_std_logic_vector(1032,11);
WHEN "1101001111" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(2460734,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(174553452,28);
logexp <= conv_std_logic_vector(1032,11);
WHEN "1101010000" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(2483447,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(187119610,28);
logexp <= conv_std_logic_vector(1032,11);
WHEN "1101010001" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(2506160,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(199685769,28);
logexp <= conv_std_logic_vector(1032,11);
WHEN "1101010010" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(2528873,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(212251927,28);
logexp <= conv_std_logic_vector(1032,11);
WHEN "1101010011" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(2551586,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(224818086,28);
logexp <= conv_std_logic_vector(1032,11);
WHEN "1101010100" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(2574299,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(237384244,28);
logexp <= conv_std_logic_vector(1032,11);
WHEN "1101010101" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(2597012,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(249950403,28);
logexp <= conv_std_logic_vector(1032,11);
WHEN "1101010110" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(2619725,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(262516561,28);
logexp <= conv_std_logic_vector(1032,11);
WHEN "1101010111" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(2642439,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(6647263,28);
logexp <= conv_std_logic_vector(1032,11);
WHEN "1101011000" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(2665152,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(19213422,28);
logexp <= conv_std_logic_vector(1032,11);
WHEN "1101011001" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(2687865,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(31779580,28);
logexp <= conv_std_logic_vector(1032,11);
WHEN "1101011010" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(2710578,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(44345739,28);
logexp <= conv_std_logic_vector(1032,11);
WHEN "1101011011" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(2733291,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(56911897,28);
logexp <= conv_std_logic_vector(1032,11);
WHEN "1101011100" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(2756004,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(69478056,28);
logexp <= conv_std_logic_vector(1032,11);
WHEN "1101011101" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(2778717,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(82044214,28);
logexp <= conv_std_logic_vector(1032,11);
WHEN "1101011110" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(2801430,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(94610373,28);
logexp <= conv_std_logic_vector(1032,11);
WHEN "1101011111" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(2824143,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(107176531,28);
logexp <= conv_std_logic_vector(1032,11);
WHEN "1101100000" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(2846856,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(119742690,28);
logexp <= conv_std_logic_vector(1032,11);
WHEN "1101100001" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(2869569,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(132308848,28);
logexp <= conv_std_logic_vector(1032,11);
WHEN "1101100010" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(2892282,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(144875007,28);
logexp <= conv_std_logic_vector(1032,11);
WHEN "1101100011" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(2914995,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(157441165,28);
logexp <= conv_std_logic_vector(1032,11);
WHEN "1101100100" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(2937708,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(170007324,28);
logexp <= conv_std_logic_vector(1032,11);
WHEN "1101100101" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(2960421,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(182573482,28);
logexp <= conv_std_logic_vector(1032,11);
WHEN "1101100110" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(2983134,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(195139641,28);
logexp <= conv_std_logic_vector(1032,11);
WHEN "1101100111" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(3005847,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(207705799,28);
logexp <= conv_std_logic_vector(1032,11);
WHEN "1101101000" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(3028560,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(220271958,28);
logexp <= conv_std_logic_vector(1032,11);
WHEN "1101101001" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(3051273,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(232838116,28);
logexp <= conv_std_logic_vector(1032,11);
WHEN "1101101010" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(3073986,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(245404275,28);
logexp <= conv_std_logic_vector(1032,11);
WHEN "1101101011" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(3096699,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(257970433,28);
logexp <= conv_std_logic_vector(1032,11);
WHEN "1101101100" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(3119413,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(2101136,28);
logexp <= conv_std_logic_vector(1032,11);
WHEN "1101101101" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(3142126,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(14667294,28);
logexp <= conv_std_logic_vector(1032,11);
WHEN "1101101110" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(3164839,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(27233453,28);
logexp <= conv_std_logic_vector(1032,11);
WHEN "1101101111" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(3187552,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(39799611,28);
logexp <= conv_std_logic_vector(1032,11);
WHEN "1101110000" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(3210265,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(52365770,28);
logexp <= conv_std_logic_vector(1032,11);
WHEN "1101110001" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(3232978,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(64931928,28);
logexp <= conv_std_logic_vector(1032,11);
WHEN "1101110010" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(3255691,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(77498087,28);
logexp <= conv_std_logic_vector(1032,11);
WHEN "1101110011" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(3278404,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(90064245,28);
logexp <= conv_std_logic_vector(1032,11);
WHEN "1101110100" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(3301117,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(102630404,28);
logexp <= conv_std_logic_vector(1032,11);
WHEN "1101110101" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(3323830,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(115196562,28);
logexp <= conv_std_logic_vector(1032,11);
WHEN "1101110110" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(3346543,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(127762720,28);
logexp <= conv_std_logic_vector(1032,11);
WHEN "1101110111" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(3369256,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(140328879,28);
logexp <= conv_std_logic_vector(1032,11);
WHEN "1101111000" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(3391969,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(152895037,28);
logexp <= conv_std_logic_vector(1032,11);
WHEN "1101111001" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(3414682,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(165461196,28);
logexp <= conv_std_logic_vector(1032,11);
WHEN "1101111010" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(3437395,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(178027354,28);
logexp <= conv_std_logic_vector(1032,11);
WHEN "1101111011" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(3460108,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(190593513,28);
logexp <= conv_std_logic_vector(1032,11);
WHEN "1101111100" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(3482821,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(203159671,28);
logexp <= conv_std_logic_vector(1032,11);
WHEN "1101111101" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(3505534,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(215725830,28);
logexp <= conv_std_logic_vector(1032,11);
WHEN "1101111110" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(3528247,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(228291988,28);
logexp <= conv_std_logic_vector(1032,11);
WHEN "1101111111" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(3550960,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(240858147,28);
logexp <= conv_std_logic_vector(1032,11);
WHEN "1110000000" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(3573673,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(253424305,28);
logexp <= conv_std_logic_vector(1032,11);
WHEN "1110000001" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(3596386,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(265990464,28);
logexp <= conv_std_logic_vector(1032,11);
WHEN "1110000010" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(3619100,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(10121166,28);
logexp <= conv_std_logic_vector(1032,11);
WHEN "1110000011" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(3641813,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(22687325,28);
logexp <= conv_std_logic_vector(1032,11);
WHEN "1110000100" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(3664526,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(35253483,28);
logexp <= conv_std_logic_vector(1032,11);
WHEN "1110000101" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(3687239,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(47819642,28);
logexp <= conv_std_logic_vector(1032,11);
WHEN "1110000110" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(3709952,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(60385800,28);
logexp <= conv_std_logic_vector(1032,11);
WHEN "1110000111" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(3732665,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(72951959,28);
logexp <= conv_std_logic_vector(1032,11);
WHEN "1110001000" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(3755378,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(85518117,28);
logexp <= conv_std_logic_vector(1032,11);
WHEN "1110001001" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(3778091,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(98084276,28);
logexp <= conv_std_logic_vector(1032,11);
WHEN "1110001010" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(3800804,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(110650434,28);
logexp <= conv_std_logic_vector(1032,11);
WHEN "1110001011" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(3823517,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(123216593,28);
logexp <= conv_std_logic_vector(1032,11);
WHEN "1110001100" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(3846230,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(135782751,28);
logexp <= conv_std_logic_vector(1032,11);
WHEN "1110001101" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(3868943,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(148348910,28);
logexp <= conv_std_logic_vector(1032,11);
WHEN "1110001110" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(3891656,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(160915068,28);
logexp <= conv_std_logic_vector(1032,11);
WHEN "1110001111" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(3914369,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(173481227,28);
logexp <= conv_std_logic_vector(1032,11);
WHEN "1110010000" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(3937082,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(186047385,28);
logexp <= conv_std_logic_vector(1032,11);
WHEN "1110010001" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(3959795,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(198613544,28);
logexp <= conv_std_logic_vector(1032,11);
WHEN "1110010010" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(3982508,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(211179702,28);
logexp <= conv_std_logic_vector(1032,11);
WHEN "1110010011" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(4005221,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(223745860,28);
logexp <= conv_std_logic_vector(1032,11);
WHEN "1110010100" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(4027934,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(236312019,28);
logexp <= conv_std_logic_vector(1032,11);
WHEN "1110010101" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(4050647,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(248878177,28);
logexp <= conv_std_logic_vector(1032,11);
WHEN "1110010110" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(4073360,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(261444336,28);
logexp <= conv_std_logic_vector(1032,11);
WHEN "1110010111" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(4096074,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(5575038,28);
logexp <= conv_std_logic_vector(1032,11);
WHEN "1110011000" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(4118787,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(18141197,28);
logexp <= conv_std_logic_vector(1032,11);
WHEN "1110011001" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(4141500,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(30707355,28);
logexp <= conv_std_logic_vector(1032,11);
WHEN "1110011010" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(4164213,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(43273514,28);
logexp <= conv_std_logic_vector(1032,11);
WHEN "1110011011" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(4186926,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(55839672,28);
logexp <= conv_std_logic_vector(1032,11);
WHEN "1110011100" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(4209639,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(68405831,28);
logexp <= conv_std_logic_vector(1032,11);
WHEN "1110011101" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(4232352,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(80971989,28);
logexp <= conv_std_logic_vector(1032,11);
WHEN "1110011110" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(4255065,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(93538148,28);
logexp <= conv_std_logic_vector(1032,11);
WHEN "1110011111" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(4277778,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(106104306,28);
logexp <= conv_std_logic_vector(1032,11);
WHEN "1110100000" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(4300491,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(118670465,28);
logexp <= conv_std_logic_vector(1032,11);
WHEN "1110100001" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(4323204,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(131236623,28);
logexp <= conv_std_logic_vector(1032,11);
WHEN "1110100010" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(4345917,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(143802782,28);
logexp <= conv_std_logic_vector(1032,11);
WHEN "1110100011" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(4368630,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(156368940,28);
logexp <= conv_std_logic_vector(1032,11);
WHEN "1110100100" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(4391343,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(168935099,28);
logexp <= conv_std_logic_vector(1032,11);
WHEN "1110100101" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(4414056,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(181501257,28);
logexp <= conv_std_logic_vector(1032,11);
WHEN "1110100110" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(4436769,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(194067416,28);
logexp <= conv_std_logic_vector(1032,11);
WHEN "1110100111" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(4459482,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(206633574,28);
logexp <= conv_std_logic_vector(1032,11);
WHEN "1110101000" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(4482195,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(219199733,28);
logexp <= conv_std_logic_vector(1032,11);
WHEN "1110101001" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(4504908,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(231765891,28);
logexp <= conv_std_logic_vector(1032,11);
WHEN "1110101010" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(4527621,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(244332050,28);
logexp <= conv_std_logic_vector(1032,11);
WHEN "1110101011" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(4550334,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(256898208,28);
logexp <= conv_std_logic_vector(1032,11);
WHEN "1110101100" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(4573048,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(1028911,28);
logexp <= conv_std_logic_vector(1032,11);
WHEN "1110101101" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(4595761,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(13595069,28);
logexp <= conv_std_logic_vector(1032,11);
WHEN "1110101110" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(4618474,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(26161228,28);
logexp <= conv_std_logic_vector(1032,11);
WHEN "1110101111" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(4641187,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(38727386,28);
logexp <= conv_std_logic_vector(1032,11);
WHEN "1110110000" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(4663900,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(51293545,28);
logexp <= conv_std_logic_vector(1032,11);
WHEN "1110110001" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(4686613,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(63859703,28);
logexp <= conv_std_logic_vector(1032,11);
WHEN "1110110010" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(4709326,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(76425861,28);
logexp <= conv_std_logic_vector(1032,11);
WHEN "1110110011" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(4732039,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(88992020,28);
logexp <= conv_std_logic_vector(1032,11);
WHEN "1110110100" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(4754752,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(101558178,28);
logexp <= conv_std_logic_vector(1032,11);
WHEN "1110110101" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(4777465,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(114124337,28);
logexp <= conv_std_logic_vector(1032,11);
WHEN "1110110110" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(4800178,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(126690495,28);
logexp <= conv_std_logic_vector(1032,11);
WHEN "1110110111" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(4822891,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(139256654,28);
logexp <= conv_std_logic_vector(1032,11);
WHEN "1110111000" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(4845604,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(151822812,28);
logexp <= conv_std_logic_vector(1032,11);
WHEN "1110111001" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(4868317,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(164388971,28);
logexp <= conv_std_logic_vector(1032,11);
WHEN "1110111010" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(4891030,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(176955129,28);
logexp <= conv_std_logic_vector(1032,11);
WHEN "1110111011" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(4913743,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(189521288,28);
logexp <= conv_std_logic_vector(1032,11);
WHEN "1110111100" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(4936456,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(202087446,28);
logexp <= conv_std_logic_vector(1032,11);
WHEN "1110111101" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(4959169,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(214653605,28);
logexp <= conv_std_logic_vector(1032,11);
WHEN "1110111110" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(4981882,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(227219763,28);
logexp <= conv_std_logic_vector(1032,11);
WHEN "1110111111" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(5004595,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(239785922,28);
logexp <= conv_std_logic_vector(1032,11);
WHEN "1111000000" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(5027308,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(252352080,28);
logexp <= conv_std_logic_vector(1032,11);
WHEN "1111000001" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(5050021,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(264918239,28);
logexp <= conv_std_logic_vector(1032,11);
WHEN "1111000010" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(5072735,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(9048941,28);
logexp <= conv_std_logic_vector(1032,11);
WHEN "1111000011" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(5095448,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(21615100,28);
logexp <= conv_std_logic_vector(1032,11);
WHEN "1111000100" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(5118161,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(34181258,28);
logexp <= conv_std_logic_vector(1032,11);
WHEN "1111000101" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(5140874,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(46747417,28);
logexp <= conv_std_logic_vector(1032,11);
WHEN "1111000110" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(5163587,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(59313575,28);
logexp <= conv_std_logic_vector(1032,11);
WHEN "1111000111" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(5186300,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(71879734,28);
logexp <= conv_std_logic_vector(1032,11);
WHEN "1111001000" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(5209013,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(84445892,28);
logexp <= conv_std_logic_vector(1032,11);
WHEN "1111001001" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(5231726,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(97012051,28);
logexp <= conv_std_logic_vector(1032,11);
WHEN "1111001010" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(5254439,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(109578209,28);
logexp <= conv_std_logic_vector(1032,11);
WHEN "1111001011" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(5277152,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(122144368,28);
logexp <= conv_std_logic_vector(1032,11);
WHEN "1111001100" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(5299865,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(134710526,28);
logexp <= conv_std_logic_vector(1032,11);
WHEN "1111001101" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(5322578,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(147276685,28);
logexp <= conv_std_logic_vector(1032,11);
WHEN "1111001110" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(5345291,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(159842843,28);
logexp <= conv_std_logic_vector(1032,11);
WHEN "1111001111" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(5368004,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(172409002,28);
logexp <= conv_std_logic_vector(1032,11);
WHEN "1111010000" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(5390717,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(184975160,28);
logexp <= conv_std_logic_vector(1032,11);
WHEN "1111010001" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(5413430,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(197541318,28);
logexp <= conv_std_logic_vector(1032,11);
WHEN "1111010010" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(5436143,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(210107477,28);
logexp <= conv_std_logic_vector(1032,11);
WHEN "1111010011" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(5458856,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(222673635,28);
logexp <= conv_std_logic_vector(1032,11);
WHEN "1111010100" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(5481569,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(235239794,28);
logexp <= conv_std_logic_vector(1032,11);
WHEN "1111010101" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(5504282,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(247805952,28);
logexp <= conv_std_logic_vector(1032,11);
WHEN "1111010110" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(5526995,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(260372111,28);
logexp <= conv_std_logic_vector(1032,11);
WHEN "1111010111" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(5549709,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(4502813,28);
logexp <= conv_std_logic_vector(1032,11);
WHEN "1111011000" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(5572422,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(17068972,28);
logexp <= conv_std_logic_vector(1032,11);
WHEN "1111011001" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(5595135,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(29635130,28);
logexp <= conv_std_logic_vector(1032,11);
WHEN "1111011010" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(5617848,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(42201289,28);
logexp <= conv_std_logic_vector(1032,11);
WHEN "1111011011" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(5640561,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(54767447,28);
logexp <= conv_std_logic_vector(1032,11);
WHEN "1111011100" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(5663274,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(67333606,28);
logexp <= conv_std_logic_vector(1032,11);
WHEN "1111011101" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(5685987,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(79899764,28);
logexp <= conv_std_logic_vector(1032,11);
WHEN "1111011110" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(5708700,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(92465923,28);
logexp <= conv_std_logic_vector(1032,11);
WHEN "1111011111" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(5731413,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(105032081,28);
logexp <= conv_std_logic_vector(1032,11);
WHEN "1111100000" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(5754126,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(117598240,28);
logexp <= conv_std_logic_vector(1032,11);
WHEN "1111100001" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(5776839,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(130164398,28);
logexp <= conv_std_logic_vector(1032,11);
WHEN "1111100010" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(5799552,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(142730557,28);
logexp <= conv_std_logic_vector(1032,11);
WHEN "1111100011" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(5822265,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(155296715,28);
logexp <= conv_std_logic_vector(1032,11);
WHEN "1111100100" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(5844978,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(167862874,28);
logexp <= conv_std_logic_vector(1032,11);
WHEN "1111100101" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(5867691,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(180429032,28);
logexp <= conv_std_logic_vector(1032,11);
WHEN "1111100110" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(5890404,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(192995191,28);
logexp <= conv_std_logic_vector(1032,11);
WHEN "1111100111" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(5913117,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(205561349,28);
logexp <= conv_std_logic_vector(1032,11);
WHEN "1111101000" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(5935830,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(218127508,28);
logexp <= conv_std_logic_vector(1032,11);
WHEN "1111101001" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(5958543,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(230693666,28);
logexp <= conv_std_logic_vector(1032,11);
WHEN "1111101010" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(5981256,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(243259825,28);
logexp <= conv_std_logic_vector(1032,11);
WHEN "1111101011" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(6003969,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(255825983,28);
logexp <= conv_std_logic_vector(1032,11);
WHEN "1111101100" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(6026682,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(268392142,28);
logexp <= conv_std_logic_vector(1032,11);
WHEN "1111101101" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(6049396,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(12522844,28);
logexp <= conv_std_logic_vector(1032,11);
WHEN "1111101110" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(6072109,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(25089003,28);
logexp <= conv_std_logic_vector(1032,11);
WHEN "1111101111" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(6094822,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(37655161,28);
logexp <= conv_std_logic_vector(1032,11);
WHEN "1111110000" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(6117535,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(50221319,28);
logexp <= conv_std_logic_vector(1032,11);
WHEN "1111110001" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(6140248,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(62787478,28);
logexp <= conv_std_logic_vector(1032,11);
WHEN "1111110010" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(6162961,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(75353636,28);
logexp <= conv_std_logic_vector(1032,11);
WHEN "1111110011" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(6185674,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(87919795,28);
logexp <= conv_std_logic_vector(1032,11);
WHEN "1111110100" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(6208387,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(100485953,28);
logexp <= conv_std_logic_vector(1032,11);
WHEN "1111110101" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(6231100,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(113052112,28);
logexp <= conv_std_logic_vector(1032,11);
WHEN "1111110110" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(6253813,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(125618270,28);
logexp <= conv_std_logic_vector(1032,11);
WHEN "1111110111" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(6276526,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(138184429,28);
logexp <= conv_std_logic_vector(1032,11);
WHEN "1111111000" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(6299239,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(150750587,28);
logexp <= conv_std_logic_vector(1032,11);
WHEN "1111111001" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(6321952,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(163316746,28);
logexp <= conv_std_logic_vector(1032,11);
WHEN "1111111010" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(6344665,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(175882904,28);
logexp <= conv_std_logic_vector(1032,11);
WHEN "1111111011" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(6367378,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(188449063,28);
logexp <= conv_std_logic_vector(1032,11);
WHEN "1111111100" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(6390091,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(201015221,28);
logexp <= conv_std_logic_vector(1032,11);
WHEN "1111111101" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(6412804,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(213581380,28);
logexp <= conv_std_logic_vector(1032,11);
WHEN "1111111110" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(6435517,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(226147538,28);
logexp <= conv_std_logic_vector(1032,11);
WHEN "1111111111" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(6458230,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(238713697,28);
logexp <= conv_std_logic_vector(1032,11);
WHEN others =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(0,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(0,28);
logexp <= conv_std_logic_vector(0,11);
END CASE;
END PROCESS;
END rtl;
|
LIBRARY ieee;
USE ieee.std_logic_1164.all;
USE ieee.std_logic_unsigned.all;
USE ieee.std_logic_arith.all;
--***************************************************
--*** ***
--*** FLOATING POINT CORE LIBRARY ***
--*** ***
--*** DP_LNLUTPOW.VHD ***
--*** ***
--*** Function: Look Up Table - LN() ***
--*** ***
--*** Generated by MATLAB Utility ***
--*** ***
--*** 18/02/08 ML ***
--*** ***
--*** (c) 2008 Altera Corporation ***
--*** ***
--*** Change History ***
--*** ***
--*** ***
--*** ***
--*** ***
--*** ***
--***************************************************
ENTITY dp_lnlutpow IS
PORT (
add : IN STD_LOGIC_VECTOR (10 DOWNTO 1);
logman : OUT STD_LOGIC_VECTOR (52 DOWNTO 1);
logexp : OUT STD_LOGIC_VECTOR (11 DOWNTO 1)
);
END dp_lnlutpow;
ARCHITECTURE rtl OF dp_lnlutpow IS
BEGIN
pca: PROCESS (add)
BEGIN
CASE add IS
WHEN "0000000000" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(0,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(0,28);
logexp <= conv_std_logic_vector(0,11);
WHEN "0000000001" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(6480943,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(251279855,28);
logexp <= conv_std_logic_vector(1022,11);
WHEN "0000000010" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(6480943,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(251279855,28);
logexp <= conv_std_logic_vector(1023,11);
WHEN "0000000011" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(666403,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(255568755,28);
logexp <= conv_std_logic_vector(1024,11);
WHEN "0000000100" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(6480943,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(251279855,28);
logexp <= conv_std_logic_vector(1024,11);
WHEN "0000000101" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(12295483,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(246990955,28);
logexp <= conv_std_logic_vector(1024,11);
WHEN "0000000110" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(666403,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(255568755,28);
logexp <= conv_std_logic_vector(1025,11);
WHEN "0000000111" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(3573673,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(253424305,28);
logexp <= conv_std_logic_vector(1025,11);
WHEN "0000001000" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(6480943,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(251279855,28);
logexp <= conv_std_logic_vector(1025,11);
WHEN "0000001001" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(9388213,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(249135405,28);
logexp <= conv_std_logic_vector(1025,11);
WHEN "0000001010" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(12295483,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(246990955,28);
logexp <= conv_std_logic_vector(1025,11);
WHEN "0000001011" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(15202753,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(244846505,28);
logexp <= conv_std_logic_vector(1025,11);
WHEN "0000001100" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(666403,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(255568755,28);
logexp <= conv_std_logic_vector(1026,11);
WHEN "0000001101" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(2120038,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(254496530,28);
logexp <= conv_std_logic_vector(1026,11);
WHEN "0000001110" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(3573673,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(253424305,28);
logexp <= conv_std_logic_vector(1026,11);
WHEN "0000001111" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(5027308,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(252352080,28);
logexp <= conv_std_logic_vector(1026,11);
WHEN "0000010000" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(6480943,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(251279855,28);
logexp <= conv_std_logic_vector(1026,11);
WHEN "0000010001" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(7934578,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(250207630,28);
logexp <= conv_std_logic_vector(1026,11);
WHEN "0000010010" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(9388213,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(249135405,28);
logexp <= conv_std_logic_vector(1026,11);
WHEN "0000010011" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(10841848,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(248063180,28);
logexp <= conv_std_logic_vector(1026,11);
WHEN "0000010100" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(12295483,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(246990955,28);
logexp <= conv_std_logic_vector(1026,11);
WHEN "0000010101" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(13749118,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(245918730,28);
logexp <= conv_std_logic_vector(1026,11);
WHEN "0000010110" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(15202753,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(244846505,28);
logexp <= conv_std_logic_vector(1026,11);
WHEN "0000010111" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(16656388,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(243774280,28);
logexp <= conv_std_logic_vector(1026,11);
WHEN "0000011000" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(666403,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(255568755,28);
logexp <= conv_std_logic_vector(1027,11);
WHEN "0000011001" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(1393221,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(120814915,28);
logexp <= conv_std_logic_vector(1027,11);
WHEN "0000011010" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(2120038,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(254496530,28);
logexp <= conv_std_logic_vector(1027,11);
WHEN "0000011011" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(2846856,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(119742690,28);
logexp <= conv_std_logic_vector(1027,11);
WHEN "0000011100" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(3573673,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(253424305,28);
logexp <= conv_std_logic_vector(1027,11);
WHEN "0000011101" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(4300491,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(118670465,28);
logexp <= conv_std_logic_vector(1027,11);
WHEN "0000011110" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(5027308,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(252352080,28);
logexp <= conv_std_logic_vector(1027,11);
WHEN "0000011111" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(5754126,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(117598240,28);
logexp <= conv_std_logic_vector(1027,11);
WHEN "0000100000" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(6480943,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(251279855,28);
logexp <= conv_std_logic_vector(1027,11);
WHEN "0000100001" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(7207761,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(116526015,28);
logexp <= conv_std_logic_vector(1027,11);
WHEN "0000100010" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(7934578,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(250207630,28);
logexp <= conv_std_logic_vector(1027,11);
WHEN "0000100011" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(8661396,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(115453790,28);
logexp <= conv_std_logic_vector(1027,11);
WHEN "0000100100" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(9388213,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(249135405,28);
logexp <= conv_std_logic_vector(1027,11);
WHEN "0000100101" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(10115031,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(114381565,28);
logexp <= conv_std_logic_vector(1027,11);
WHEN "0000100110" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(10841848,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(248063180,28);
logexp <= conv_std_logic_vector(1027,11);
WHEN "0000100111" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(11568666,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(113309340,28);
logexp <= conv_std_logic_vector(1027,11);
WHEN "0000101000" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(12295483,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(246990955,28);
logexp <= conv_std_logic_vector(1027,11);
WHEN "0000101001" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(13022301,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(112237114,28);
logexp <= conv_std_logic_vector(1027,11);
WHEN "0000101010" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(13749118,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(245918730,28);
logexp <= conv_std_logic_vector(1027,11);
WHEN "0000101011" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(14475936,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(111164889,28);
logexp <= conv_std_logic_vector(1027,11);
WHEN "0000101100" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(15202753,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(244846505,28);
logexp <= conv_std_logic_vector(1027,11);
WHEN "0000101101" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(15929571,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(110092664,28);
logexp <= conv_std_logic_vector(1027,11);
WHEN "0000101110" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(16656388,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(243774280,28);
logexp <= conv_std_logic_vector(1027,11);
WHEN "0000101111" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(302995,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(54510220,28);
logexp <= conv_std_logic_vector(1028,11);
WHEN "0000110000" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(666403,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(255568755,28);
logexp <= conv_std_logic_vector(1028,11);
WHEN "0000110001" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(1029812,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(188191835,28);
logexp <= conv_std_logic_vector(1028,11);
WHEN "0000110010" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(1393221,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(120814915,28);
logexp <= conv_std_logic_vector(1028,11);
WHEN "0000110011" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(1756630,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(53437995,28);
logexp <= conv_std_logic_vector(1028,11);
WHEN "0000110100" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(2120038,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(254496530,28);
logexp <= conv_std_logic_vector(1028,11);
WHEN "0000110101" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(2483447,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(187119610,28);
logexp <= conv_std_logic_vector(1028,11);
WHEN "0000110110" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(2846856,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(119742690,28);
logexp <= conv_std_logic_vector(1028,11);
WHEN "0000110111" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(3210265,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(52365770,28);
logexp <= conv_std_logic_vector(1028,11);
WHEN "0000111000" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(3573673,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(253424305,28);
logexp <= conv_std_logic_vector(1028,11);
WHEN "0000111001" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(3937082,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(186047385,28);
logexp <= conv_std_logic_vector(1028,11);
WHEN "0000111010" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(4300491,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(118670465,28);
logexp <= conv_std_logic_vector(1028,11);
WHEN "0000111011" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(4663900,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(51293545,28);
logexp <= conv_std_logic_vector(1028,11);
WHEN "0000111100" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(5027308,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(252352080,28);
logexp <= conv_std_logic_vector(1028,11);
WHEN "0000111101" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(5390717,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(184975160,28);
logexp <= conv_std_logic_vector(1028,11);
WHEN "0000111110" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(5754126,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(117598240,28);
logexp <= conv_std_logic_vector(1028,11);
WHEN "0000111111" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(6117535,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(50221319,28);
logexp <= conv_std_logic_vector(1028,11);
WHEN "0001000000" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(6480943,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(251279855,28);
logexp <= conv_std_logic_vector(1028,11);
WHEN "0001000001" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(6844352,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(183902935,28);
logexp <= conv_std_logic_vector(1028,11);
WHEN "0001000010" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(7207761,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(116526015,28);
logexp <= conv_std_logic_vector(1028,11);
WHEN "0001000011" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(7571170,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(49149094,28);
logexp <= conv_std_logic_vector(1028,11);
WHEN "0001000100" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(7934578,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(250207630,28);
logexp <= conv_std_logic_vector(1028,11);
WHEN "0001000101" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(8297987,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(182830710,28);
logexp <= conv_std_logic_vector(1028,11);
WHEN "0001000110" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(8661396,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(115453790,28);
logexp <= conv_std_logic_vector(1028,11);
WHEN "0001000111" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(9024805,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(48076869,28);
logexp <= conv_std_logic_vector(1028,11);
WHEN "0001001000" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(9388213,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(249135405,28);
logexp <= conv_std_logic_vector(1028,11);
WHEN "0001001001" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(9751622,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(181758485,28);
logexp <= conv_std_logic_vector(1028,11);
WHEN "0001001010" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(10115031,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(114381565,28);
logexp <= conv_std_logic_vector(1028,11);
WHEN "0001001011" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(10478440,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(47004644,28);
logexp <= conv_std_logic_vector(1028,11);
WHEN "0001001100" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(10841848,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(248063180,28);
logexp <= conv_std_logic_vector(1028,11);
WHEN "0001001101" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(11205257,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(180686260,28);
logexp <= conv_std_logic_vector(1028,11);
WHEN "0001001110" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(11568666,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(113309340,28);
logexp <= conv_std_logic_vector(1028,11);
WHEN "0001001111" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(11932075,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(45932419,28);
logexp <= conv_std_logic_vector(1028,11);
WHEN "0001010000" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(12295483,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(246990955,28);
logexp <= conv_std_logic_vector(1028,11);
WHEN "0001010001" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(12658892,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(179614035,28);
logexp <= conv_std_logic_vector(1028,11);
WHEN "0001010010" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(13022301,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(112237114,28);
logexp <= conv_std_logic_vector(1028,11);
WHEN "0001010011" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(13385710,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(44860194,28);
logexp <= conv_std_logic_vector(1028,11);
WHEN "0001010100" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(13749118,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(245918730,28);
logexp <= conv_std_logic_vector(1028,11);
WHEN "0001010101" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(14112527,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(178541810,28);
logexp <= conv_std_logic_vector(1028,11);
WHEN "0001010110" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(14475936,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(111164889,28);
logexp <= conv_std_logic_vector(1028,11);
WHEN "0001010111" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(14839345,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(43787969,28);
logexp <= conv_std_logic_vector(1028,11);
WHEN "0001011000" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(15202753,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(244846505,28);
logexp <= conv_std_logic_vector(1028,11);
WHEN "0001011001" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(15566162,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(177469585,28);
logexp <= conv_std_logic_vector(1028,11);
WHEN "0001011010" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(15929571,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(110092664,28);
logexp <= conv_std_logic_vector(1028,11);
WHEN "0001011011" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(16292980,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(42715744,28);
logexp <= conv_std_logic_vector(1028,11);
WHEN "0001011100" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(16656388,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(243774280,28);
logexp <= conv_std_logic_vector(1028,11);
WHEN "0001011101" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(121290,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(222416408,28);
logexp <= conv_std_logic_vector(1029,11);
WHEN "0001011110" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(302995,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(54510220,28);
logexp <= conv_std_logic_vector(1029,11);
WHEN "0001011111" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(484699,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(155039488,28);
logexp <= conv_std_logic_vector(1029,11);
WHEN "0001100000" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(666403,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(255568755,28);
logexp <= conv_std_logic_vector(1029,11);
WHEN "0001100001" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(848108,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(87662567,28);
logexp <= conv_std_logic_vector(1029,11);
WHEN "0001100010" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(1029812,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(188191835,28);
logexp <= conv_std_logic_vector(1029,11);
WHEN "0001100011" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(1211517,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(20285647,28);
logexp <= conv_std_logic_vector(1029,11);
WHEN "0001100100" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(1393221,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(120814915,28);
logexp <= conv_std_logic_vector(1029,11);
WHEN "0001100101" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(1574925,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(221344183,28);
logexp <= conv_std_logic_vector(1029,11);
WHEN "0001100110" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(1756630,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(53437995,28);
logexp <= conv_std_logic_vector(1029,11);
WHEN "0001100111" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(1938334,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(153967262,28);
logexp <= conv_std_logic_vector(1029,11);
WHEN "0001101000" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(2120038,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(254496530,28);
logexp <= conv_std_logic_vector(1029,11);
WHEN "0001101001" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(2301743,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(86590342,28);
logexp <= conv_std_logic_vector(1029,11);
WHEN "0001101010" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(2483447,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(187119610,28);
logexp <= conv_std_logic_vector(1029,11);
WHEN "0001101011" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(2665152,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(19213422,28);
logexp <= conv_std_logic_vector(1029,11);
WHEN "0001101100" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(2846856,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(119742690,28);
logexp <= conv_std_logic_vector(1029,11);
WHEN "0001101101" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(3028560,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(220271958,28);
logexp <= conv_std_logic_vector(1029,11);
WHEN "0001101110" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(3210265,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(52365770,28);
logexp <= conv_std_logic_vector(1029,11);
WHEN "0001101111" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(3391969,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(152895037,28);
logexp <= conv_std_logic_vector(1029,11);
WHEN "0001110000" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(3573673,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(253424305,28);
logexp <= conv_std_logic_vector(1029,11);
WHEN "0001110001" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(3755378,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(85518117,28);
logexp <= conv_std_logic_vector(1029,11);
WHEN "0001110010" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(3937082,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(186047385,28);
logexp <= conv_std_logic_vector(1029,11);
WHEN "0001110011" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(4118787,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(18141197,28);
logexp <= conv_std_logic_vector(1029,11);
WHEN "0001110100" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(4300491,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(118670465,28);
logexp <= conv_std_logic_vector(1029,11);
WHEN "0001110101" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(4482195,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(219199733,28);
logexp <= conv_std_logic_vector(1029,11);
WHEN "0001110110" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(4663900,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(51293545,28);
logexp <= conv_std_logic_vector(1029,11);
WHEN "0001110111" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(4845604,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(151822812,28);
logexp <= conv_std_logic_vector(1029,11);
WHEN "0001111000" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(5027308,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(252352080,28);
logexp <= conv_std_logic_vector(1029,11);
WHEN "0001111001" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(5209013,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(84445892,28);
logexp <= conv_std_logic_vector(1029,11);
WHEN "0001111010" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(5390717,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(184975160,28);
logexp <= conv_std_logic_vector(1029,11);
WHEN "0001111011" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(5572422,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(17068972,28);
logexp <= conv_std_logic_vector(1029,11);
WHEN "0001111100" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(5754126,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(117598240,28);
logexp <= conv_std_logic_vector(1029,11);
WHEN "0001111101" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(5935830,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(218127508,28);
logexp <= conv_std_logic_vector(1029,11);
WHEN "0001111110" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(6117535,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(50221319,28);
logexp <= conv_std_logic_vector(1029,11);
WHEN "0001111111" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(6299239,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(150750587,28);
logexp <= conv_std_logic_vector(1029,11);
WHEN "0010000000" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(6480943,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(251279855,28);
logexp <= conv_std_logic_vector(1029,11);
WHEN "0010000001" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(6662648,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(83373667,28);
logexp <= conv_std_logic_vector(1029,11);
WHEN "0010000010" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(6844352,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(183902935,28);
logexp <= conv_std_logic_vector(1029,11);
WHEN "0010000011" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(7026057,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(15996747,28);
logexp <= conv_std_logic_vector(1029,11);
WHEN "0010000100" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(7207761,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(116526015,28);
logexp <= conv_std_logic_vector(1029,11);
WHEN "0010000101" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(7389465,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(217055283,28);
logexp <= conv_std_logic_vector(1029,11);
WHEN "0010000110" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(7571170,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(49149094,28);
logexp <= conv_std_logic_vector(1029,11);
WHEN "0010000111" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(7752874,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(149678362,28);
logexp <= conv_std_logic_vector(1029,11);
WHEN "0010001000" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(7934578,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(250207630,28);
logexp <= conv_std_logic_vector(1029,11);
WHEN "0010001001" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(8116283,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(82301442,28);
logexp <= conv_std_logic_vector(1029,11);
WHEN "0010001010" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(8297987,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(182830710,28);
logexp <= conv_std_logic_vector(1029,11);
WHEN "0010001011" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(8479692,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(14924522,28);
logexp <= conv_std_logic_vector(1029,11);
WHEN "0010001100" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(8661396,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(115453790,28);
logexp <= conv_std_logic_vector(1029,11);
WHEN "0010001101" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(8843100,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(215983058,28);
logexp <= conv_std_logic_vector(1029,11);
WHEN "0010001110" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(9024805,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(48076869,28);
logexp <= conv_std_logic_vector(1029,11);
WHEN "0010001111" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(9206509,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(148606137,28);
logexp <= conv_std_logic_vector(1029,11);
WHEN "0010010000" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(9388213,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(249135405,28);
logexp <= conv_std_logic_vector(1029,11);
WHEN "0010010001" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(9569918,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(81229217,28);
logexp <= conv_std_logic_vector(1029,11);
WHEN "0010010010" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(9751622,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(181758485,28);
logexp <= conv_std_logic_vector(1029,11);
WHEN "0010010011" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(9933327,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(13852297,28);
logexp <= conv_std_logic_vector(1029,11);
WHEN "0010010100" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(10115031,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(114381565,28);
logexp <= conv_std_logic_vector(1029,11);
WHEN "0010010101" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(10296735,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(214910832,28);
logexp <= conv_std_logic_vector(1029,11);
WHEN "0010010110" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(10478440,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(47004644,28);
logexp <= conv_std_logic_vector(1029,11);
WHEN "0010010111" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(10660144,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(147533912,28);
logexp <= conv_std_logic_vector(1029,11);
WHEN "0010011000" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(10841848,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(248063180,28);
logexp <= conv_std_logic_vector(1029,11);
WHEN "0010011001" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(11023553,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(80156992,28);
logexp <= conv_std_logic_vector(1029,11);
WHEN "0010011010" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(11205257,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(180686260,28);
logexp <= conv_std_logic_vector(1029,11);
WHEN "0010011011" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(11386962,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(12780072,28);
logexp <= conv_std_logic_vector(1029,11);
WHEN "0010011100" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(11568666,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(113309340,28);
logexp <= conv_std_logic_vector(1029,11);
WHEN "0010011101" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(11750370,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(213838607,28);
logexp <= conv_std_logic_vector(1029,11);
WHEN "0010011110" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(11932075,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(45932419,28);
logexp <= conv_std_logic_vector(1029,11);
WHEN "0010011111" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(12113779,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(146461687,28);
logexp <= conv_std_logic_vector(1029,11);
WHEN "0010100000" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(12295483,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(246990955,28);
logexp <= conv_std_logic_vector(1029,11);
WHEN "0010100001" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(12477188,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(79084767,28);
logexp <= conv_std_logic_vector(1029,11);
WHEN "0010100010" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(12658892,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(179614035,28);
logexp <= conv_std_logic_vector(1029,11);
WHEN "0010100011" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(12840597,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(11707847,28);
logexp <= conv_std_logic_vector(1029,11);
WHEN "0010100100" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(13022301,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(112237114,28);
logexp <= conv_std_logic_vector(1029,11);
WHEN "0010100101" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(13204005,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(212766382,28);
logexp <= conv_std_logic_vector(1029,11);
WHEN "0010100110" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(13385710,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(44860194,28);
logexp <= conv_std_logic_vector(1029,11);
WHEN "0010100111" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(13567414,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(145389462,28);
logexp <= conv_std_logic_vector(1029,11);
WHEN "0010101000" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(13749118,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(245918730,28);
logexp <= conv_std_logic_vector(1029,11);
WHEN "0010101001" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(13930823,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(78012542,28);
logexp <= conv_std_logic_vector(1029,11);
WHEN "0010101010" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(14112527,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(178541810,28);
logexp <= conv_std_logic_vector(1029,11);
WHEN "0010101011" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(14294232,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(10635622,28);
logexp <= conv_std_logic_vector(1029,11);
WHEN "0010101100" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(14475936,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(111164889,28);
logexp <= conv_std_logic_vector(1029,11);
WHEN "0010101101" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(14657640,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(211694157,28);
logexp <= conv_std_logic_vector(1029,11);
WHEN "0010101110" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(14839345,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(43787969,28);
logexp <= conv_std_logic_vector(1029,11);
WHEN "0010101111" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(15021049,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(144317237,28);
logexp <= conv_std_logic_vector(1029,11);
WHEN "0010110000" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(15202753,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(244846505,28);
logexp <= conv_std_logic_vector(1029,11);
WHEN "0010110001" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(15384458,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(76940317,28);
logexp <= conv_std_logic_vector(1029,11);
WHEN "0010110010" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(15566162,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(177469585,28);
logexp <= conv_std_logic_vector(1029,11);
WHEN "0010110011" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(15747867,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(9563397,28);
logexp <= conv_std_logic_vector(1029,11);
WHEN "0010110100" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(15929571,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(110092664,28);
logexp <= conv_std_logic_vector(1029,11);
WHEN "0010110101" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(16111275,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(210621932,28);
logexp <= conv_std_logic_vector(1029,11);
WHEN "0010110110" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(16292980,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(42715744,28);
logexp <= conv_std_logic_vector(1029,11);
WHEN "0010110111" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(16474684,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(143245012,28);
logexp <= conv_std_logic_vector(1029,11);
WHEN "0010111000" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(16656388,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(243774280,28);
logexp <= conv_std_logic_vector(1029,11);
WHEN "0010111001" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(30438,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(172151774,28);
logexp <= conv_std_logic_vector(1030,11);
WHEN "0010111010" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(121290,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(222416408,28);
logexp <= conv_std_logic_vector(1030,11);
WHEN "0010111011" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(212143,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(4245586,28);
logexp <= conv_std_logic_vector(1030,11);
WHEN "0010111100" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(302995,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(54510220,28);
logexp <= conv_std_logic_vector(1030,11);
WHEN "0010111101" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(393847,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(104774854,28);
logexp <= conv_std_logic_vector(1030,11);
WHEN "0010111110" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(484699,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(155039488,28);
logexp <= conv_std_logic_vector(1030,11);
WHEN "0010111111" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(575551,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(205304121,28);
logexp <= conv_std_logic_vector(1030,11);
WHEN "0011000000" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(666403,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(255568755,28);
logexp <= conv_std_logic_vector(1030,11);
WHEN "0011000001" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(757256,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(37397933,28);
logexp <= conv_std_logic_vector(1030,11);
WHEN "0011000010" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(848108,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(87662567,28);
logexp <= conv_std_logic_vector(1030,11);
WHEN "0011000011" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(938960,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(137927201,28);
logexp <= conv_std_logic_vector(1030,11);
WHEN "0011000100" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(1029812,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(188191835,28);
logexp <= conv_std_logic_vector(1030,11);
WHEN "0011000101" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(1120664,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(238456469,28);
logexp <= conv_std_logic_vector(1030,11);
WHEN "0011000110" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(1211517,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(20285647,28);
logexp <= conv_std_logic_vector(1030,11);
WHEN "0011000111" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(1302369,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(70550281,28);
logexp <= conv_std_logic_vector(1030,11);
WHEN "0011001000" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(1393221,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(120814915,28);
logexp <= conv_std_logic_vector(1030,11);
WHEN "0011001001" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(1484073,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(171079549,28);
logexp <= conv_std_logic_vector(1030,11);
WHEN "0011001010" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(1574925,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(221344183,28);
logexp <= conv_std_logic_vector(1030,11);
WHEN "0011001011" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(1665778,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(3173361,28);
logexp <= conv_std_logic_vector(1030,11);
WHEN "0011001100" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(1756630,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(53437995,28);
logexp <= conv_std_logic_vector(1030,11);
WHEN "0011001101" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(1847482,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(103702629,28);
logexp <= conv_std_logic_vector(1030,11);
WHEN "0011001110" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(1938334,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(153967262,28);
logexp <= conv_std_logic_vector(1030,11);
WHEN "0011001111" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(2029186,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(204231896,28);
logexp <= conv_std_logic_vector(1030,11);
WHEN "0011010000" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(2120038,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(254496530,28);
logexp <= conv_std_logic_vector(1030,11);
WHEN "0011010001" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(2210891,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(36325708,28);
logexp <= conv_std_logic_vector(1030,11);
WHEN "0011010010" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(2301743,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(86590342,28);
logexp <= conv_std_logic_vector(1030,11);
WHEN "0011010011" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(2392595,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(136854976,28);
logexp <= conv_std_logic_vector(1030,11);
WHEN "0011010100" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(2483447,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(187119610,28);
logexp <= conv_std_logic_vector(1030,11);
WHEN "0011010101" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(2574299,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(237384244,28);
logexp <= conv_std_logic_vector(1030,11);
WHEN "0011010110" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(2665152,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(19213422,28);
logexp <= conv_std_logic_vector(1030,11);
WHEN "0011010111" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(2756004,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(69478056,28);
logexp <= conv_std_logic_vector(1030,11);
WHEN "0011011000" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(2846856,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(119742690,28);
logexp <= conv_std_logic_vector(1030,11);
WHEN "0011011001" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(2937708,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(170007324,28);
logexp <= conv_std_logic_vector(1030,11);
WHEN "0011011010" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(3028560,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(220271958,28);
logexp <= conv_std_logic_vector(1030,11);
WHEN "0011011011" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(3119413,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(2101136,28);
logexp <= conv_std_logic_vector(1030,11);
WHEN "0011011100" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(3210265,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(52365770,28);
logexp <= conv_std_logic_vector(1030,11);
WHEN "0011011101" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(3301117,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(102630404,28);
logexp <= conv_std_logic_vector(1030,11);
WHEN "0011011110" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(3391969,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(152895037,28);
logexp <= conv_std_logic_vector(1030,11);
WHEN "0011011111" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(3482821,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(203159671,28);
logexp <= conv_std_logic_vector(1030,11);
WHEN "0011100000" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(3573673,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(253424305,28);
logexp <= conv_std_logic_vector(1030,11);
WHEN "0011100001" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(3664526,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(35253483,28);
logexp <= conv_std_logic_vector(1030,11);
WHEN "0011100010" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(3755378,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(85518117,28);
logexp <= conv_std_logic_vector(1030,11);
WHEN "0011100011" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(3846230,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(135782751,28);
logexp <= conv_std_logic_vector(1030,11);
WHEN "0011100100" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(3937082,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(186047385,28);
logexp <= conv_std_logic_vector(1030,11);
WHEN "0011100101" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(4027934,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(236312019,28);
logexp <= conv_std_logic_vector(1030,11);
WHEN "0011100110" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(4118787,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(18141197,28);
logexp <= conv_std_logic_vector(1030,11);
WHEN "0011100111" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(4209639,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(68405831,28);
logexp <= conv_std_logic_vector(1030,11);
WHEN "0011101000" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(4300491,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(118670465,28);
logexp <= conv_std_logic_vector(1030,11);
WHEN "0011101001" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(4391343,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(168935099,28);
logexp <= conv_std_logic_vector(1030,11);
WHEN "0011101010" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(4482195,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(219199733,28);
logexp <= conv_std_logic_vector(1030,11);
WHEN "0011101011" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(4573048,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(1028911,28);
logexp <= conv_std_logic_vector(1030,11);
WHEN "0011101100" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(4663900,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(51293545,28);
logexp <= conv_std_logic_vector(1030,11);
WHEN "0011101101" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(4754752,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(101558178,28);
logexp <= conv_std_logic_vector(1030,11);
WHEN "0011101110" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(4845604,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(151822812,28);
logexp <= conv_std_logic_vector(1030,11);
WHEN "0011101111" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(4936456,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(202087446,28);
logexp <= conv_std_logic_vector(1030,11);
WHEN "0011110000" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(5027308,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(252352080,28);
logexp <= conv_std_logic_vector(1030,11);
WHEN "0011110001" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(5118161,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(34181258,28);
logexp <= conv_std_logic_vector(1030,11);
WHEN "0011110010" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(5209013,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(84445892,28);
logexp <= conv_std_logic_vector(1030,11);
WHEN "0011110011" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(5299865,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(134710526,28);
logexp <= conv_std_logic_vector(1030,11);
WHEN "0011110100" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(5390717,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(184975160,28);
logexp <= conv_std_logic_vector(1030,11);
WHEN "0011110101" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(5481569,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(235239794,28);
logexp <= conv_std_logic_vector(1030,11);
WHEN "0011110110" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(5572422,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(17068972,28);
logexp <= conv_std_logic_vector(1030,11);
WHEN "0011110111" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(5663274,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(67333606,28);
logexp <= conv_std_logic_vector(1030,11);
WHEN "0011111000" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(5754126,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(117598240,28);
logexp <= conv_std_logic_vector(1030,11);
WHEN "0011111001" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(5844978,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(167862874,28);
logexp <= conv_std_logic_vector(1030,11);
WHEN "0011111010" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(5935830,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(218127508,28);
logexp <= conv_std_logic_vector(1030,11);
WHEN "0011111011" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(6026682,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(268392142,28);
logexp <= conv_std_logic_vector(1030,11);
WHEN "0011111100" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(6117535,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(50221319,28);
logexp <= conv_std_logic_vector(1030,11);
WHEN "0011111101" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(6208387,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(100485953,28);
logexp <= conv_std_logic_vector(1030,11);
WHEN "0011111110" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(6299239,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(150750587,28);
logexp <= conv_std_logic_vector(1030,11);
WHEN "0011111111" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(6390091,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(201015221,28);
logexp <= conv_std_logic_vector(1030,11);
WHEN "0100000000" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(6480943,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(251279855,28);
logexp <= conv_std_logic_vector(1030,11);
WHEN "0100000001" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(6571796,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(33109033,28);
logexp <= conv_std_logic_vector(1030,11);
WHEN "0100000010" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(6662648,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(83373667,28);
logexp <= conv_std_logic_vector(1030,11);
WHEN "0100000011" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(6753500,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(133638301,28);
logexp <= conv_std_logic_vector(1030,11);
WHEN "0100000100" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(6844352,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(183902935,28);
logexp <= conv_std_logic_vector(1030,11);
WHEN "0100000101" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(6935204,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(234167569,28);
logexp <= conv_std_logic_vector(1030,11);
WHEN "0100000110" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(7026057,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(15996747,28);
logexp <= conv_std_logic_vector(1030,11);
WHEN "0100000111" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(7116909,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(66261381,28);
logexp <= conv_std_logic_vector(1030,11);
WHEN "0100001000" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(7207761,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(116526015,28);
logexp <= conv_std_logic_vector(1030,11);
WHEN "0100001001" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(7298613,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(166790649,28);
logexp <= conv_std_logic_vector(1030,11);
WHEN "0100001010" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(7389465,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(217055283,28);
logexp <= conv_std_logic_vector(1030,11);
WHEN "0100001011" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(7480317,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(267319916,28);
logexp <= conv_std_logic_vector(1030,11);
WHEN "0100001100" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(7571170,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(49149094,28);
logexp <= conv_std_logic_vector(1030,11);
WHEN "0100001101" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(7662022,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(99413728,28);
logexp <= conv_std_logic_vector(1030,11);
WHEN "0100001110" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(7752874,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(149678362,28);
logexp <= conv_std_logic_vector(1030,11);
WHEN "0100001111" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(7843726,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(199942996,28);
logexp <= conv_std_logic_vector(1030,11);
WHEN "0100010000" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(7934578,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(250207630,28);
logexp <= conv_std_logic_vector(1030,11);
WHEN "0100010001" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(8025431,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(32036808,28);
logexp <= conv_std_logic_vector(1030,11);
WHEN "0100010010" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(8116283,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(82301442,28);
logexp <= conv_std_logic_vector(1030,11);
WHEN "0100010011" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(8207135,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(132566076,28);
logexp <= conv_std_logic_vector(1030,11);
WHEN "0100010100" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(8297987,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(182830710,28);
logexp <= conv_std_logic_vector(1030,11);
WHEN "0100010101" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(8388839,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(233095344,28);
logexp <= conv_std_logic_vector(1030,11);
WHEN "0100010110" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(8479692,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(14924522,28);
logexp <= conv_std_logic_vector(1030,11);
WHEN "0100010111" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(8570544,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(65189156,28);
logexp <= conv_std_logic_vector(1030,11);
WHEN "0100011000" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(8661396,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(115453790,28);
logexp <= conv_std_logic_vector(1030,11);
WHEN "0100011001" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(8752248,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(165718424,28);
logexp <= conv_std_logic_vector(1030,11);
WHEN "0100011010" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(8843100,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(215983058,28);
logexp <= conv_std_logic_vector(1030,11);
WHEN "0100011011" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(8933952,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(266247691,28);
logexp <= conv_std_logic_vector(1030,11);
WHEN "0100011100" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(9024805,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(48076869,28);
logexp <= conv_std_logic_vector(1030,11);
WHEN "0100011101" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(9115657,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(98341503,28);
logexp <= conv_std_logic_vector(1030,11);
WHEN "0100011110" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(9206509,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(148606137,28);
logexp <= conv_std_logic_vector(1030,11);
WHEN "0100011111" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(9297361,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(198870771,28);
logexp <= conv_std_logic_vector(1030,11);
WHEN "0100100000" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(9388213,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(249135405,28);
logexp <= conv_std_logic_vector(1030,11);
WHEN "0100100001" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(9479066,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(30964583,28);
logexp <= conv_std_logic_vector(1030,11);
WHEN "0100100010" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(9569918,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(81229217,28);
logexp <= conv_std_logic_vector(1030,11);
WHEN "0100100011" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(9660770,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(131493851,28);
logexp <= conv_std_logic_vector(1030,11);
WHEN "0100100100" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(9751622,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(181758485,28);
logexp <= conv_std_logic_vector(1030,11);
WHEN "0100100101" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(9842474,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(232023119,28);
logexp <= conv_std_logic_vector(1030,11);
WHEN "0100100110" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(9933327,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(13852297,28);
logexp <= conv_std_logic_vector(1030,11);
WHEN "0100100111" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(10024179,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(64116931,28);
logexp <= conv_std_logic_vector(1030,11);
WHEN "0100101000" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(10115031,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(114381565,28);
logexp <= conv_std_logic_vector(1030,11);
WHEN "0100101001" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(10205883,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(164646199,28);
logexp <= conv_std_logic_vector(1030,11);
WHEN "0100101010" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(10296735,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(214910832,28);
logexp <= conv_std_logic_vector(1030,11);
WHEN "0100101011" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(10387587,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(265175466,28);
logexp <= conv_std_logic_vector(1030,11);
WHEN "0100101100" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(10478440,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(47004644,28);
logexp <= conv_std_logic_vector(1030,11);
WHEN "0100101101" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(10569292,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(97269278,28);
logexp <= conv_std_logic_vector(1030,11);
WHEN "0100101110" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(10660144,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(147533912,28);
logexp <= conv_std_logic_vector(1030,11);
WHEN "0100101111" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(10750996,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(197798546,28);
logexp <= conv_std_logic_vector(1030,11);
WHEN "0100110000" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(10841848,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(248063180,28);
logexp <= conv_std_logic_vector(1030,11);
WHEN "0100110001" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(10932701,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(29892358,28);
logexp <= conv_std_logic_vector(1030,11);
WHEN "0100110010" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(11023553,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(80156992,28);
logexp <= conv_std_logic_vector(1030,11);
WHEN "0100110011" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(11114405,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(130421626,28);
logexp <= conv_std_logic_vector(1030,11);
WHEN "0100110100" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(11205257,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(180686260,28);
logexp <= conv_std_logic_vector(1030,11);
WHEN "0100110101" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(11296109,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(230950894,28);
logexp <= conv_std_logic_vector(1030,11);
WHEN "0100110110" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(11386962,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(12780072,28);
logexp <= conv_std_logic_vector(1030,11);
WHEN "0100110111" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(11477814,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(63044706,28);
logexp <= conv_std_logic_vector(1030,11);
WHEN "0100111000" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(11568666,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(113309340,28);
logexp <= conv_std_logic_vector(1030,11);
WHEN "0100111001" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(11659518,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(163573973,28);
logexp <= conv_std_logic_vector(1030,11);
WHEN "0100111010" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(11750370,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(213838607,28);
logexp <= conv_std_logic_vector(1030,11);
WHEN "0100111011" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(11841222,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(264103241,28);
logexp <= conv_std_logic_vector(1030,11);
WHEN "0100111100" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(11932075,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(45932419,28);
logexp <= conv_std_logic_vector(1030,11);
WHEN "0100111101" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(12022927,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(96197053,28);
logexp <= conv_std_logic_vector(1030,11);
WHEN "0100111110" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(12113779,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(146461687,28);
logexp <= conv_std_logic_vector(1030,11);
WHEN "0100111111" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(12204631,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(196726321,28);
logexp <= conv_std_logic_vector(1030,11);
WHEN "0101000000" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(12295483,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(246990955,28);
logexp <= conv_std_logic_vector(1030,11);
WHEN "0101000001" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(12386336,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(28820133,28);
logexp <= conv_std_logic_vector(1030,11);
WHEN "0101000010" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(12477188,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(79084767,28);
logexp <= conv_std_logic_vector(1030,11);
WHEN "0101000011" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(12568040,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(129349401,28);
logexp <= conv_std_logic_vector(1030,11);
WHEN "0101000100" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(12658892,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(179614035,28);
logexp <= conv_std_logic_vector(1030,11);
WHEN "0101000101" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(12749744,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(229878669,28);
logexp <= conv_std_logic_vector(1030,11);
WHEN "0101000110" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(12840597,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(11707847,28);
logexp <= conv_std_logic_vector(1030,11);
WHEN "0101000111" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(12931449,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(61972481,28);
logexp <= conv_std_logic_vector(1030,11);
WHEN "0101001000" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(13022301,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(112237114,28);
logexp <= conv_std_logic_vector(1030,11);
WHEN "0101001001" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(13113153,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(162501748,28);
logexp <= conv_std_logic_vector(1030,11);
WHEN "0101001010" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(13204005,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(212766382,28);
logexp <= conv_std_logic_vector(1030,11);
WHEN "0101001011" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(13294857,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(263031016,28);
logexp <= conv_std_logic_vector(1030,11);
WHEN "0101001100" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(13385710,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(44860194,28);
logexp <= conv_std_logic_vector(1030,11);
WHEN "0101001101" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(13476562,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(95124828,28);
logexp <= conv_std_logic_vector(1030,11);
WHEN "0101001110" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(13567414,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(145389462,28);
logexp <= conv_std_logic_vector(1030,11);
WHEN "0101001111" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(13658266,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(195654096,28);
logexp <= conv_std_logic_vector(1030,11);
WHEN "0101010000" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(13749118,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(245918730,28);
logexp <= conv_std_logic_vector(1030,11);
WHEN "0101010001" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(13839971,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(27747908,28);
logexp <= conv_std_logic_vector(1030,11);
WHEN "0101010010" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(13930823,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(78012542,28);
logexp <= conv_std_logic_vector(1030,11);
WHEN "0101010011" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(14021675,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(128277176,28);
logexp <= conv_std_logic_vector(1030,11);
WHEN "0101010100" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(14112527,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(178541810,28);
logexp <= conv_std_logic_vector(1030,11);
WHEN "0101010101" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(14203379,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(228806444,28);
logexp <= conv_std_logic_vector(1030,11);
WHEN "0101010110" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(14294232,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(10635622,28);
logexp <= conv_std_logic_vector(1030,11);
WHEN "0101010111" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(14385084,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(60900256,28);
logexp <= conv_std_logic_vector(1030,11);
WHEN "0101011000" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(14475936,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(111164889,28);
logexp <= conv_std_logic_vector(1030,11);
WHEN "0101011001" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(14566788,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(161429523,28);
logexp <= conv_std_logic_vector(1030,11);
WHEN "0101011010" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(14657640,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(211694157,28);
logexp <= conv_std_logic_vector(1030,11);
WHEN "0101011011" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(14748492,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(261958791,28);
logexp <= conv_std_logic_vector(1030,11);
WHEN "0101011100" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(14839345,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(43787969,28);
logexp <= conv_std_logic_vector(1030,11);
WHEN "0101011101" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(14930197,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(94052603,28);
logexp <= conv_std_logic_vector(1030,11);
WHEN "0101011110" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(15021049,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(144317237,28);
logexp <= conv_std_logic_vector(1030,11);
WHEN "0101011111" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(15111901,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(194581871,28);
logexp <= conv_std_logic_vector(1030,11);
WHEN "0101100000" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(15202753,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(244846505,28);
logexp <= conv_std_logic_vector(1030,11);
WHEN "0101100001" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(15293606,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(26675683,28);
logexp <= conv_std_logic_vector(1030,11);
WHEN "0101100010" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(15384458,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(76940317,28);
logexp <= conv_std_logic_vector(1030,11);
WHEN "0101100011" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(15475310,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(127204951,28);
logexp <= conv_std_logic_vector(1030,11);
WHEN "0101100100" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(15566162,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(177469585,28);
logexp <= conv_std_logic_vector(1030,11);
WHEN "0101100101" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(15657014,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(227734219,28);
logexp <= conv_std_logic_vector(1030,11);
WHEN "0101100110" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(15747867,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(9563397,28);
logexp <= conv_std_logic_vector(1030,11);
WHEN "0101100111" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(15838719,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(59828030,28);
logexp <= conv_std_logic_vector(1030,11);
WHEN "0101101000" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(15929571,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(110092664,28);
logexp <= conv_std_logic_vector(1030,11);
WHEN "0101101001" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(16020423,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(160357298,28);
logexp <= conv_std_logic_vector(1030,11);
WHEN "0101101010" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(16111275,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(210621932,28);
logexp <= conv_std_logic_vector(1030,11);
WHEN "0101101011" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(16202127,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(260886566,28);
logexp <= conv_std_logic_vector(1030,11);
WHEN "0101101100" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(16292980,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(42715744,28);
logexp <= conv_std_logic_vector(1030,11);
WHEN "0101101101" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(16383832,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(92980378,28);
logexp <= conv_std_logic_vector(1030,11);
WHEN "0101101110" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(16474684,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(143245012,28);
logexp <= conv_std_logic_vector(1030,11);
WHEN "0101101111" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(16565536,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(193509646,28);
logexp <= conv_std_logic_vector(1030,11);
WHEN "0101110000" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(16656388,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(243774280,28);
logexp <= conv_std_logic_vector(1030,11);
WHEN "0101110001" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(16747241,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(25603458,28);
logexp <= conv_std_logic_vector(1030,11);
WHEN "0101110010" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(30438,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(172151774,28);
logexp <= conv_std_logic_vector(1031,11);
WHEN "0101110011" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(75864,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(197284091,28);
logexp <= conv_std_logic_vector(1031,11);
WHEN "0101110100" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(121290,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(222416408,28);
logexp <= conv_std_logic_vector(1031,11);
WHEN "0101110101" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(166716,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(247548725,28);
logexp <= conv_std_logic_vector(1031,11);
WHEN "0101110110" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(212143,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(4245586,28);
logexp <= conv_std_logic_vector(1031,11);
WHEN "0101110111" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(257569,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(29377903,28);
logexp <= conv_std_logic_vector(1031,11);
WHEN "0101111000" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(302995,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(54510220,28);
logexp <= conv_std_logic_vector(1031,11);
WHEN "0101111001" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(348421,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(79642537,28);
logexp <= conv_std_logic_vector(1031,11);
WHEN "0101111010" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(393847,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(104774854,28);
logexp <= conv_std_logic_vector(1031,11);
WHEN "0101111011" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(439273,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(129907171,28);
logexp <= conv_std_logic_vector(1031,11);
WHEN "0101111100" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(484699,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(155039488,28);
logexp <= conv_std_logic_vector(1031,11);
WHEN "0101111101" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(530125,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(180171805,28);
logexp <= conv_std_logic_vector(1031,11);
WHEN "0101111110" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(575551,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(205304121,28);
logexp <= conv_std_logic_vector(1031,11);
WHEN "0101111111" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(620977,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(230436438,28);
logexp <= conv_std_logic_vector(1031,11);
WHEN "0110000000" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(666403,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(255568755,28);
logexp <= conv_std_logic_vector(1031,11);
WHEN "0110000001" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(711830,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(12265616,28);
logexp <= conv_std_logic_vector(1031,11);
WHEN "0110000010" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(757256,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(37397933,28);
logexp <= conv_std_logic_vector(1031,11);
WHEN "0110000011" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(802682,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(62530250,28);
logexp <= conv_std_logic_vector(1031,11);
WHEN "0110000100" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(848108,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(87662567,28);
logexp <= conv_std_logic_vector(1031,11);
WHEN "0110000101" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(893534,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(112794884,28);
logexp <= conv_std_logic_vector(1031,11);
WHEN "0110000110" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(938960,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(137927201,28);
logexp <= conv_std_logic_vector(1031,11);
WHEN "0110000111" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(984386,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(163059518,28);
logexp <= conv_std_logic_vector(1031,11);
WHEN "0110001000" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(1029812,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(188191835,28);
logexp <= conv_std_logic_vector(1031,11);
WHEN "0110001001" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(1075238,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(213324152,28);
logexp <= conv_std_logic_vector(1031,11);
WHEN "0110001010" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(1120664,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(238456469,28);
logexp <= conv_std_logic_vector(1031,11);
WHEN "0110001011" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(1166090,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(263588786,28);
logexp <= conv_std_logic_vector(1031,11);
WHEN "0110001100" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(1211517,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(20285647,28);
logexp <= conv_std_logic_vector(1031,11);
WHEN "0110001101" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(1256943,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(45417964,28);
logexp <= conv_std_logic_vector(1031,11);
WHEN "0110001110" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(1302369,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(70550281,28);
logexp <= conv_std_logic_vector(1031,11);
WHEN "0110001111" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(1347795,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(95682598,28);
logexp <= conv_std_logic_vector(1031,11);
WHEN "0110010000" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(1393221,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(120814915,28);
logexp <= conv_std_logic_vector(1031,11);
WHEN "0110010001" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(1438647,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(145947232,28);
logexp <= conv_std_logic_vector(1031,11);
WHEN "0110010010" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(1484073,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(171079549,28);
logexp <= conv_std_logic_vector(1031,11);
WHEN "0110010011" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(1529499,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(196211866,28);
logexp <= conv_std_logic_vector(1031,11);
WHEN "0110010100" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(1574925,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(221344183,28);
logexp <= conv_std_logic_vector(1031,11);
WHEN "0110010101" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(1620351,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(246476500,28);
logexp <= conv_std_logic_vector(1031,11);
WHEN "0110010110" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(1665778,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(3173361,28);
logexp <= conv_std_logic_vector(1031,11);
WHEN "0110010111" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(1711204,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(28305678,28);
logexp <= conv_std_logic_vector(1031,11);
WHEN "0110011000" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(1756630,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(53437995,28);
logexp <= conv_std_logic_vector(1031,11);
WHEN "0110011001" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(1802056,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(78570312,28);
logexp <= conv_std_logic_vector(1031,11);
WHEN "0110011010" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(1847482,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(103702629,28);
logexp <= conv_std_logic_vector(1031,11);
WHEN "0110011011" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(1892908,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(128834946,28);
logexp <= conv_std_logic_vector(1031,11);
WHEN "0110011100" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(1938334,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(153967262,28);
logexp <= conv_std_logic_vector(1031,11);
WHEN "0110011101" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(1983760,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(179099579,28);
logexp <= conv_std_logic_vector(1031,11);
WHEN "0110011110" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(2029186,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(204231896,28);
logexp <= conv_std_logic_vector(1031,11);
WHEN "0110011111" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(2074612,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(229364213,28);
logexp <= conv_std_logic_vector(1031,11);
WHEN "0110100000" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(2120038,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(254496530,28);
logexp <= conv_std_logic_vector(1031,11);
WHEN "0110100001" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(2165465,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(11193391,28);
logexp <= conv_std_logic_vector(1031,11);
WHEN "0110100010" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(2210891,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(36325708,28);
logexp <= conv_std_logic_vector(1031,11);
WHEN "0110100011" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(2256317,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(61458025,28);
logexp <= conv_std_logic_vector(1031,11);
WHEN "0110100100" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(2301743,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(86590342,28);
logexp <= conv_std_logic_vector(1031,11);
WHEN "0110100101" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(2347169,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(111722659,28);
logexp <= conv_std_logic_vector(1031,11);
WHEN "0110100110" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(2392595,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(136854976,28);
logexp <= conv_std_logic_vector(1031,11);
WHEN "0110100111" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(2438021,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(161987293,28);
logexp <= conv_std_logic_vector(1031,11);
WHEN "0110101000" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(2483447,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(187119610,28);
logexp <= conv_std_logic_vector(1031,11);
WHEN "0110101001" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(2528873,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(212251927,28);
logexp <= conv_std_logic_vector(1031,11);
WHEN "0110101010" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(2574299,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(237384244,28);
logexp <= conv_std_logic_vector(1031,11);
WHEN "0110101011" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(2619725,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(262516561,28);
logexp <= conv_std_logic_vector(1031,11);
WHEN "0110101100" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(2665152,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(19213422,28);
logexp <= conv_std_logic_vector(1031,11);
WHEN "0110101101" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(2710578,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(44345739,28);
logexp <= conv_std_logic_vector(1031,11);
WHEN "0110101110" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(2756004,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(69478056,28);
logexp <= conv_std_logic_vector(1031,11);
WHEN "0110101111" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(2801430,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(94610373,28);
logexp <= conv_std_logic_vector(1031,11);
WHEN "0110110000" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(2846856,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(119742690,28);
logexp <= conv_std_logic_vector(1031,11);
WHEN "0110110001" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(2892282,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(144875007,28);
logexp <= conv_std_logic_vector(1031,11);
WHEN "0110110010" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(2937708,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(170007324,28);
logexp <= conv_std_logic_vector(1031,11);
WHEN "0110110011" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(2983134,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(195139641,28);
logexp <= conv_std_logic_vector(1031,11);
WHEN "0110110100" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(3028560,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(220271958,28);
logexp <= conv_std_logic_vector(1031,11);
WHEN "0110110101" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(3073986,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(245404275,28);
logexp <= conv_std_logic_vector(1031,11);
WHEN "0110110110" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(3119413,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(2101136,28);
logexp <= conv_std_logic_vector(1031,11);
WHEN "0110110111" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(3164839,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(27233453,28);
logexp <= conv_std_logic_vector(1031,11);
WHEN "0110111000" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(3210265,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(52365770,28);
logexp <= conv_std_logic_vector(1031,11);
WHEN "0110111001" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(3255691,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(77498087,28);
logexp <= conv_std_logic_vector(1031,11);
WHEN "0110111010" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(3301117,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(102630404,28);
logexp <= conv_std_logic_vector(1031,11);
WHEN "0110111011" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(3346543,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(127762720,28);
logexp <= conv_std_logic_vector(1031,11);
WHEN "0110111100" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(3391969,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(152895037,28);
logexp <= conv_std_logic_vector(1031,11);
WHEN "0110111101" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(3437395,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(178027354,28);
logexp <= conv_std_logic_vector(1031,11);
WHEN "0110111110" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(3482821,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(203159671,28);
logexp <= conv_std_logic_vector(1031,11);
WHEN "0110111111" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(3528247,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(228291988,28);
logexp <= conv_std_logic_vector(1031,11);
WHEN "0111000000" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(3573673,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(253424305,28);
logexp <= conv_std_logic_vector(1031,11);
WHEN "0111000001" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(3619100,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(10121166,28);
logexp <= conv_std_logic_vector(1031,11);
WHEN "0111000010" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(3664526,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(35253483,28);
logexp <= conv_std_logic_vector(1031,11);
WHEN "0111000011" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(3709952,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(60385800,28);
logexp <= conv_std_logic_vector(1031,11);
WHEN "0111000100" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(3755378,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(85518117,28);
logexp <= conv_std_logic_vector(1031,11);
WHEN "0111000101" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(3800804,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(110650434,28);
logexp <= conv_std_logic_vector(1031,11);
WHEN "0111000110" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(3846230,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(135782751,28);
logexp <= conv_std_logic_vector(1031,11);
WHEN "0111000111" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(3891656,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(160915068,28);
logexp <= conv_std_logic_vector(1031,11);
WHEN "0111001000" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(3937082,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(186047385,28);
logexp <= conv_std_logic_vector(1031,11);
WHEN "0111001001" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(3982508,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(211179702,28);
logexp <= conv_std_logic_vector(1031,11);
WHEN "0111001010" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(4027934,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(236312019,28);
logexp <= conv_std_logic_vector(1031,11);
WHEN "0111001011" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(4073360,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(261444336,28);
logexp <= conv_std_logic_vector(1031,11);
WHEN "0111001100" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(4118787,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(18141197,28);
logexp <= conv_std_logic_vector(1031,11);
WHEN "0111001101" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(4164213,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(43273514,28);
logexp <= conv_std_logic_vector(1031,11);
WHEN "0111001110" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(4209639,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(68405831,28);
logexp <= conv_std_logic_vector(1031,11);
WHEN "0111001111" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(4255065,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(93538148,28);
logexp <= conv_std_logic_vector(1031,11);
WHEN "0111010000" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(4300491,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(118670465,28);
logexp <= conv_std_logic_vector(1031,11);
WHEN "0111010001" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(4345917,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(143802782,28);
logexp <= conv_std_logic_vector(1031,11);
WHEN "0111010010" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(4391343,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(168935099,28);
logexp <= conv_std_logic_vector(1031,11);
WHEN "0111010011" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(4436769,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(194067416,28);
logexp <= conv_std_logic_vector(1031,11);
WHEN "0111010100" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(4482195,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(219199733,28);
logexp <= conv_std_logic_vector(1031,11);
WHEN "0111010101" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(4527621,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(244332050,28);
logexp <= conv_std_logic_vector(1031,11);
WHEN "0111010110" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(4573048,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(1028911,28);
logexp <= conv_std_logic_vector(1031,11);
WHEN "0111010111" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(4618474,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(26161228,28);
logexp <= conv_std_logic_vector(1031,11);
WHEN "0111011000" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(4663900,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(51293545,28);
logexp <= conv_std_logic_vector(1031,11);
WHEN "0111011001" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(4709326,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(76425861,28);
logexp <= conv_std_logic_vector(1031,11);
WHEN "0111011010" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(4754752,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(101558178,28);
logexp <= conv_std_logic_vector(1031,11);
WHEN "0111011011" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(4800178,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(126690495,28);
logexp <= conv_std_logic_vector(1031,11);
WHEN "0111011100" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(4845604,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(151822812,28);
logexp <= conv_std_logic_vector(1031,11);
WHEN "0111011101" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(4891030,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(176955129,28);
logexp <= conv_std_logic_vector(1031,11);
WHEN "0111011110" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(4936456,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(202087446,28);
logexp <= conv_std_logic_vector(1031,11);
WHEN "0111011111" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(4981882,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(227219763,28);
logexp <= conv_std_logic_vector(1031,11);
WHEN "0111100000" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(5027308,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(252352080,28);
logexp <= conv_std_logic_vector(1031,11);
WHEN "0111100001" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(5072735,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(9048941,28);
logexp <= conv_std_logic_vector(1031,11);
WHEN "0111100010" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(5118161,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(34181258,28);
logexp <= conv_std_logic_vector(1031,11);
WHEN "0111100011" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(5163587,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(59313575,28);
logexp <= conv_std_logic_vector(1031,11);
WHEN "0111100100" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(5209013,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(84445892,28);
logexp <= conv_std_logic_vector(1031,11);
WHEN "0111100101" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(5254439,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(109578209,28);
logexp <= conv_std_logic_vector(1031,11);
WHEN "0111100110" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(5299865,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(134710526,28);
logexp <= conv_std_logic_vector(1031,11);
WHEN "0111100111" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(5345291,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(159842843,28);
logexp <= conv_std_logic_vector(1031,11);
WHEN "0111101000" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(5390717,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(184975160,28);
logexp <= conv_std_logic_vector(1031,11);
WHEN "0111101001" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(5436143,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(210107477,28);
logexp <= conv_std_logic_vector(1031,11);
WHEN "0111101010" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(5481569,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(235239794,28);
logexp <= conv_std_logic_vector(1031,11);
WHEN "0111101011" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(5526995,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(260372111,28);
logexp <= conv_std_logic_vector(1031,11);
WHEN "0111101100" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(5572422,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(17068972,28);
logexp <= conv_std_logic_vector(1031,11);
WHEN "0111101101" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(5617848,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(42201289,28);
logexp <= conv_std_logic_vector(1031,11);
WHEN "0111101110" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(5663274,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(67333606,28);
logexp <= conv_std_logic_vector(1031,11);
WHEN "0111101111" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(5708700,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(92465923,28);
logexp <= conv_std_logic_vector(1031,11);
WHEN "0111110000" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(5754126,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(117598240,28);
logexp <= conv_std_logic_vector(1031,11);
WHEN "0111110001" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(5799552,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(142730557,28);
logexp <= conv_std_logic_vector(1031,11);
WHEN "0111110010" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(5844978,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(167862874,28);
logexp <= conv_std_logic_vector(1031,11);
WHEN "0111110011" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(5890404,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(192995191,28);
logexp <= conv_std_logic_vector(1031,11);
WHEN "0111110100" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(5935830,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(218127508,28);
logexp <= conv_std_logic_vector(1031,11);
WHEN "0111110101" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(5981256,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(243259825,28);
logexp <= conv_std_logic_vector(1031,11);
WHEN "0111110110" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(6026682,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(268392142,28);
logexp <= conv_std_logic_vector(1031,11);
WHEN "0111110111" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(6072109,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(25089003,28);
logexp <= conv_std_logic_vector(1031,11);
WHEN "0111111000" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(6117535,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(50221319,28);
logexp <= conv_std_logic_vector(1031,11);
WHEN "0111111001" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(6162961,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(75353636,28);
logexp <= conv_std_logic_vector(1031,11);
WHEN "0111111010" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(6208387,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(100485953,28);
logexp <= conv_std_logic_vector(1031,11);
WHEN "0111111011" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(6253813,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(125618270,28);
logexp <= conv_std_logic_vector(1031,11);
WHEN "0111111100" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(6299239,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(150750587,28);
logexp <= conv_std_logic_vector(1031,11);
WHEN "0111111101" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(6344665,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(175882904,28);
logexp <= conv_std_logic_vector(1031,11);
WHEN "0111111110" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(6390091,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(201015221,28);
logexp <= conv_std_logic_vector(1031,11);
WHEN "0111111111" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(6435517,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(226147538,28);
logexp <= conv_std_logic_vector(1031,11);
WHEN "1000000000" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(6480943,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(251279855,28);
logexp <= conv_std_logic_vector(1031,11);
WHEN "1000000001" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(6526370,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(7976716,28);
logexp <= conv_std_logic_vector(1031,11);
WHEN "1000000010" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(6571796,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(33109033,28);
logexp <= conv_std_logic_vector(1031,11);
WHEN "1000000011" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(6617222,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(58241350,28);
logexp <= conv_std_logic_vector(1031,11);
WHEN "1000000100" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(6662648,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(83373667,28);
logexp <= conv_std_logic_vector(1031,11);
WHEN "1000000101" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(6708074,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(108505984,28);
logexp <= conv_std_logic_vector(1031,11);
WHEN "1000000110" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(6753500,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(133638301,28);
logexp <= conv_std_logic_vector(1031,11);
WHEN "1000000111" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(6798926,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(158770618,28);
logexp <= conv_std_logic_vector(1031,11);
WHEN "1000001000" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(6844352,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(183902935,28);
logexp <= conv_std_logic_vector(1031,11);
WHEN "1000001001" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(6889778,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(209035252,28);
logexp <= conv_std_logic_vector(1031,11);
WHEN "1000001010" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(6935204,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(234167569,28);
logexp <= conv_std_logic_vector(1031,11);
WHEN "1000001011" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(6980630,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(259299886,28);
logexp <= conv_std_logic_vector(1031,11);
WHEN "1000001100" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(7026057,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(15996747,28);
logexp <= conv_std_logic_vector(1031,11);
WHEN "1000001101" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(7071483,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(41129064,28);
logexp <= conv_std_logic_vector(1031,11);
WHEN "1000001110" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(7116909,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(66261381,28);
logexp <= conv_std_logic_vector(1031,11);
WHEN "1000001111" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(7162335,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(91393698,28);
logexp <= conv_std_logic_vector(1031,11);
WHEN "1000010000" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(7207761,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(116526015,28);
logexp <= conv_std_logic_vector(1031,11);
WHEN "1000010001" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(7253187,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(141658332,28);
logexp <= conv_std_logic_vector(1031,11);
WHEN "1000010010" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(7298613,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(166790649,28);
logexp <= conv_std_logic_vector(1031,11);
WHEN "1000010011" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(7344039,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(191922966,28);
logexp <= conv_std_logic_vector(1031,11);
WHEN "1000010100" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(7389465,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(217055283,28);
logexp <= conv_std_logic_vector(1031,11);
WHEN "1000010101" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(7434891,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(242187600,28);
logexp <= conv_std_logic_vector(1031,11);
WHEN "1000010110" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(7480317,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(267319916,28);
logexp <= conv_std_logic_vector(1031,11);
WHEN "1000010111" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(7525744,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(24016777,28);
logexp <= conv_std_logic_vector(1031,11);
WHEN "1000011000" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(7571170,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(49149094,28);
logexp <= conv_std_logic_vector(1031,11);
WHEN "1000011001" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(7616596,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(74281411,28);
logexp <= conv_std_logic_vector(1031,11);
WHEN "1000011010" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(7662022,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(99413728,28);
logexp <= conv_std_logic_vector(1031,11);
WHEN "1000011011" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(7707448,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(124546045,28);
logexp <= conv_std_logic_vector(1031,11);
WHEN "1000011100" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(7752874,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(149678362,28);
logexp <= conv_std_logic_vector(1031,11);
WHEN "1000011101" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(7798300,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(174810679,28);
logexp <= conv_std_logic_vector(1031,11);
WHEN "1000011110" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(7843726,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(199942996,28);
logexp <= conv_std_logic_vector(1031,11);
WHEN "1000011111" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(7889152,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(225075313,28);
logexp <= conv_std_logic_vector(1031,11);
WHEN "1000100000" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(7934578,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(250207630,28);
logexp <= conv_std_logic_vector(1031,11);
WHEN "1000100001" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(7980005,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(6904491,28);
logexp <= conv_std_logic_vector(1031,11);
WHEN "1000100010" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(8025431,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(32036808,28);
logexp <= conv_std_logic_vector(1031,11);
WHEN "1000100011" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(8070857,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(57169125,28);
logexp <= conv_std_logic_vector(1031,11);
WHEN "1000100100" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(8116283,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(82301442,28);
logexp <= conv_std_logic_vector(1031,11);
WHEN "1000100101" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(8161709,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(107433759,28);
logexp <= conv_std_logic_vector(1031,11);
WHEN "1000100110" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(8207135,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(132566076,28);
logexp <= conv_std_logic_vector(1031,11);
WHEN "1000100111" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(8252561,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(157698393,28);
logexp <= conv_std_logic_vector(1031,11);
WHEN "1000101000" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(8297987,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(182830710,28);
logexp <= conv_std_logic_vector(1031,11);
WHEN "1000101001" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(8343413,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(207963027,28);
logexp <= conv_std_logic_vector(1031,11);
WHEN "1000101010" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(8388839,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(233095344,28);
logexp <= conv_std_logic_vector(1031,11);
WHEN "1000101011" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(8434265,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(258227661,28);
logexp <= conv_std_logic_vector(1031,11);
WHEN "1000101100" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(8479692,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(14924522,28);
logexp <= conv_std_logic_vector(1031,11);
WHEN "1000101101" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(8525118,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(40056839,28);
logexp <= conv_std_logic_vector(1031,11);
WHEN "1000101110" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(8570544,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(65189156,28);
logexp <= conv_std_logic_vector(1031,11);
WHEN "1000101111" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(8615970,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(90321473,28);
logexp <= conv_std_logic_vector(1031,11);
WHEN "1000110000" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(8661396,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(115453790,28);
logexp <= conv_std_logic_vector(1031,11);
WHEN "1000110001" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(8706822,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(140586107,28);
logexp <= conv_std_logic_vector(1031,11);
WHEN "1000110010" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(8752248,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(165718424,28);
logexp <= conv_std_logic_vector(1031,11);
WHEN "1000110011" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(8797674,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(190850741,28);
logexp <= conv_std_logic_vector(1031,11);
WHEN "1000110100" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(8843100,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(215983058,28);
logexp <= conv_std_logic_vector(1031,11);
WHEN "1000110101" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(8888526,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(241115374,28);
logexp <= conv_std_logic_vector(1031,11);
WHEN "1000110110" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(8933952,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(266247691,28);
logexp <= conv_std_logic_vector(1031,11);
WHEN "1000110111" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(8979379,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(22944552,28);
logexp <= conv_std_logic_vector(1031,11);
WHEN "1000111000" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(9024805,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(48076869,28);
logexp <= conv_std_logic_vector(1031,11);
WHEN "1000111001" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(9070231,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(73209186,28);
logexp <= conv_std_logic_vector(1031,11);
WHEN "1000111010" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(9115657,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(98341503,28);
logexp <= conv_std_logic_vector(1031,11);
WHEN "1000111011" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(9161083,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(123473820,28);
logexp <= conv_std_logic_vector(1031,11);
WHEN "1000111100" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(9206509,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(148606137,28);
logexp <= conv_std_logic_vector(1031,11);
WHEN "1000111101" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(9251935,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(173738454,28);
logexp <= conv_std_logic_vector(1031,11);
WHEN "1000111110" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(9297361,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(198870771,28);
logexp <= conv_std_logic_vector(1031,11);
WHEN "1000111111" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(9342787,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(224003088,28);
logexp <= conv_std_logic_vector(1031,11);
WHEN "1001000000" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(9388213,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(249135405,28);
logexp <= conv_std_logic_vector(1031,11);
WHEN "1001000001" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(9433640,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(5832266,28);
logexp <= conv_std_logic_vector(1031,11);
WHEN "1001000010" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(9479066,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(30964583,28);
logexp <= conv_std_logic_vector(1031,11);
WHEN "1001000011" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(9524492,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(56096900,28);
logexp <= conv_std_logic_vector(1031,11);
WHEN "1001000100" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(9569918,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(81229217,28);
logexp <= conv_std_logic_vector(1031,11);
WHEN "1001000101" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(9615344,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(106361534,28);
logexp <= conv_std_logic_vector(1031,11);
WHEN "1001000110" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(9660770,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(131493851,28);
logexp <= conv_std_logic_vector(1031,11);
WHEN "1001000111" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(9706196,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(156626168,28);
logexp <= conv_std_logic_vector(1031,11);
WHEN "1001001000" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(9751622,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(181758485,28);
logexp <= conv_std_logic_vector(1031,11);
WHEN "1001001001" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(9797048,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(206890802,28);
logexp <= conv_std_logic_vector(1031,11);
WHEN "1001001010" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(9842474,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(232023119,28);
logexp <= conv_std_logic_vector(1031,11);
WHEN "1001001011" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(9887900,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(257155436,28);
logexp <= conv_std_logic_vector(1031,11);
WHEN "1001001100" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(9933327,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(13852297,28);
logexp <= conv_std_logic_vector(1031,11);
WHEN "1001001101" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(9978753,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(38984614,28);
logexp <= conv_std_logic_vector(1031,11);
WHEN "1001001110" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(10024179,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(64116931,28);
logexp <= conv_std_logic_vector(1031,11);
WHEN "1001001111" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(10069605,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(89249248,28);
logexp <= conv_std_logic_vector(1031,11);
WHEN "1001010000" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(10115031,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(114381565,28);
logexp <= conv_std_logic_vector(1031,11);
WHEN "1001010001" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(10160457,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(139513882,28);
logexp <= conv_std_logic_vector(1031,11);
WHEN "1001010010" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(10205883,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(164646199,28);
logexp <= conv_std_logic_vector(1031,11);
WHEN "1001010011" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(10251309,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(189778515,28);
logexp <= conv_std_logic_vector(1031,11);
WHEN "1001010100" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(10296735,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(214910832,28);
logexp <= conv_std_logic_vector(1031,11);
WHEN "1001010101" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(10342161,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(240043149,28);
logexp <= conv_std_logic_vector(1031,11);
WHEN "1001010110" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(10387587,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(265175466,28);
logexp <= conv_std_logic_vector(1031,11);
WHEN "1001010111" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(10433014,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(21872327,28);
logexp <= conv_std_logic_vector(1031,11);
WHEN "1001011000" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(10478440,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(47004644,28);
logexp <= conv_std_logic_vector(1031,11);
WHEN "1001011001" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(10523866,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(72136961,28);
logexp <= conv_std_logic_vector(1031,11);
WHEN "1001011010" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(10569292,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(97269278,28);
logexp <= conv_std_logic_vector(1031,11);
WHEN "1001011011" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(10614718,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(122401595,28);
logexp <= conv_std_logic_vector(1031,11);
WHEN "1001011100" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(10660144,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(147533912,28);
logexp <= conv_std_logic_vector(1031,11);
WHEN "1001011101" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(10705570,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(172666229,28);
logexp <= conv_std_logic_vector(1031,11);
WHEN "1001011110" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(10750996,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(197798546,28);
logexp <= conv_std_logic_vector(1031,11);
WHEN "1001011111" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(10796422,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(222930863,28);
logexp <= conv_std_logic_vector(1031,11);
WHEN "1001100000" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(10841848,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(248063180,28);
logexp <= conv_std_logic_vector(1031,11);
WHEN "1001100001" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(10887275,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(4760041,28);
logexp <= conv_std_logic_vector(1031,11);
WHEN "1001100010" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(10932701,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(29892358,28);
logexp <= conv_std_logic_vector(1031,11);
WHEN "1001100011" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(10978127,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(55024675,28);
logexp <= conv_std_logic_vector(1031,11);
WHEN "1001100100" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(11023553,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(80156992,28);
logexp <= conv_std_logic_vector(1031,11);
WHEN "1001100101" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(11068979,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(105289309,28);
logexp <= conv_std_logic_vector(1031,11);
WHEN "1001100110" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(11114405,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(130421626,28);
logexp <= conv_std_logic_vector(1031,11);
WHEN "1001100111" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(11159831,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(155553943,28);
logexp <= conv_std_logic_vector(1031,11);
WHEN "1001101000" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(11205257,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(180686260,28);
logexp <= conv_std_logic_vector(1031,11);
WHEN "1001101001" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(11250683,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(205818577,28);
logexp <= conv_std_logic_vector(1031,11);
WHEN "1001101010" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(11296109,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(230950894,28);
logexp <= conv_std_logic_vector(1031,11);
WHEN "1001101011" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(11341535,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(256083211,28);
logexp <= conv_std_logic_vector(1031,11);
WHEN "1001101100" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(11386962,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(12780072,28);
logexp <= conv_std_logic_vector(1031,11);
WHEN "1001101101" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(11432388,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(37912389,28);
logexp <= conv_std_logic_vector(1031,11);
WHEN "1001101110" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(11477814,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(63044706,28);
logexp <= conv_std_logic_vector(1031,11);
WHEN "1001101111" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(11523240,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(88177023,28);
logexp <= conv_std_logic_vector(1031,11);
WHEN "1001110000" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(11568666,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(113309340,28);
logexp <= conv_std_logic_vector(1031,11);
WHEN "1001110001" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(11614092,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(138441657,28);
logexp <= conv_std_logic_vector(1031,11);
WHEN "1001110010" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(11659518,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(163573973,28);
logexp <= conv_std_logic_vector(1031,11);
WHEN "1001110011" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(11704944,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(188706290,28);
logexp <= conv_std_logic_vector(1031,11);
WHEN "1001110100" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(11750370,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(213838607,28);
logexp <= conv_std_logic_vector(1031,11);
WHEN "1001110101" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(11795796,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(238970924,28);
logexp <= conv_std_logic_vector(1031,11);
WHEN "1001110110" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(11841222,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(264103241,28);
logexp <= conv_std_logic_vector(1031,11);
WHEN "1001110111" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(11886649,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(20800102,28);
logexp <= conv_std_logic_vector(1031,11);
WHEN "1001111000" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(11932075,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(45932419,28);
logexp <= conv_std_logic_vector(1031,11);
WHEN "1001111001" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(11977501,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(71064736,28);
logexp <= conv_std_logic_vector(1031,11);
WHEN "1001111010" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(12022927,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(96197053,28);
logexp <= conv_std_logic_vector(1031,11);
WHEN "1001111011" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(12068353,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(121329370,28);
logexp <= conv_std_logic_vector(1031,11);
WHEN "1001111100" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(12113779,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(146461687,28);
logexp <= conv_std_logic_vector(1031,11);
WHEN "1001111101" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(12159205,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(171594004,28);
logexp <= conv_std_logic_vector(1031,11);
WHEN "1001111110" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(12204631,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(196726321,28);
logexp <= conv_std_logic_vector(1031,11);
WHEN "1001111111" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(12250057,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(221858638,28);
logexp <= conv_std_logic_vector(1031,11);
WHEN "1010000000" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(12295483,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(246990955,28);
logexp <= conv_std_logic_vector(1031,11);
WHEN "1010000001" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(12340910,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(3687816,28);
logexp <= conv_std_logic_vector(1031,11);
WHEN "1010000010" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(12386336,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(28820133,28);
logexp <= conv_std_logic_vector(1031,11);
WHEN "1010000011" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(12431762,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(53952450,28);
logexp <= conv_std_logic_vector(1031,11);
WHEN "1010000100" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(12477188,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(79084767,28);
logexp <= conv_std_logic_vector(1031,11);
WHEN "1010000101" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(12522614,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(104217084,28);
logexp <= conv_std_logic_vector(1031,11);
WHEN "1010000110" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(12568040,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(129349401,28);
logexp <= conv_std_logic_vector(1031,11);
WHEN "1010000111" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(12613466,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(154481718,28);
logexp <= conv_std_logic_vector(1031,11);
WHEN "1010001000" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(12658892,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(179614035,28);
logexp <= conv_std_logic_vector(1031,11);
WHEN "1010001001" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(12704318,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(204746352,28);
logexp <= conv_std_logic_vector(1031,11);
WHEN "1010001010" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(12749744,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(229878669,28);
logexp <= conv_std_logic_vector(1031,11);
WHEN "1010001011" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(12795170,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(255010986,28);
logexp <= conv_std_logic_vector(1031,11);
WHEN "1010001100" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(12840597,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(11707847,28);
logexp <= conv_std_logic_vector(1031,11);
WHEN "1010001101" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(12886023,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(36840164,28);
logexp <= conv_std_logic_vector(1031,11);
WHEN "1010001110" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(12931449,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(61972481,28);
logexp <= conv_std_logic_vector(1031,11);
WHEN "1010001111" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(12976875,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(87104798,28);
logexp <= conv_std_logic_vector(1031,11);
WHEN "1010010000" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(13022301,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(112237114,28);
logexp <= conv_std_logic_vector(1031,11);
WHEN "1010010001" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(13067727,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(137369431,28);
logexp <= conv_std_logic_vector(1031,11);
WHEN "1010010010" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(13113153,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(162501748,28);
logexp <= conv_std_logic_vector(1031,11);
WHEN "1010010011" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(13158579,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(187634065,28);
logexp <= conv_std_logic_vector(1031,11);
WHEN "1010010100" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(13204005,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(212766382,28);
logexp <= conv_std_logic_vector(1031,11);
WHEN "1010010101" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(13249431,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(237898699,28);
logexp <= conv_std_logic_vector(1031,11);
WHEN "1010010110" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(13294857,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(263031016,28);
logexp <= conv_std_logic_vector(1031,11);
WHEN "1010010111" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(13340284,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(19727877,28);
logexp <= conv_std_logic_vector(1031,11);
WHEN "1010011000" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(13385710,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(44860194,28);
logexp <= conv_std_logic_vector(1031,11);
WHEN "1010011001" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(13431136,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(69992511,28);
logexp <= conv_std_logic_vector(1031,11);
WHEN "1010011010" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(13476562,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(95124828,28);
logexp <= conv_std_logic_vector(1031,11);
WHEN "1010011011" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(13521988,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(120257145,28);
logexp <= conv_std_logic_vector(1031,11);
WHEN "1010011100" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(13567414,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(145389462,28);
logexp <= conv_std_logic_vector(1031,11);
WHEN "1010011101" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(13612840,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(170521779,28);
logexp <= conv_std_logic_vector(1031,11);
WHEN "1010011110" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(13658266,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(195654096,28);
logexp <= conv_std_logic_vector(1031,11);
WHEN "1010011111" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(13703692,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(220786413,28);
logexp <= conv_std_logic_vector(1031,11);
WHEN "1010100000" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(13749118,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(245918730,28);
logexp <= conv_std_logic_vector(1031,11);
WHEN "1010100001" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(13794545,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(2615591,28);
logexp <= conv_std_logic_vector(1031,11);
WHEN "1010100010" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(13839971,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(27747908,28);
logexp <= conv_std_logic_vector(1031,11);
WHEN "1010100011" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(13885397,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(52880225,28);
logexp <= conv_std_logic_vector(1031,11);
WHEN "1010100100" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(13930823,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(78012542,28);
logexp <= conv_std_logic_vector(1031,11);
WHEN "1010100101" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(13976249,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(103144859,28);
logexp <= conv_std_logic_vector(1031,11);
WHEN "1010100110" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(14021675,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(128277176,28);
logexp <= conv_std_logic_vector(1031,11);
WHEN "1010100111" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(14067101,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(153409493,28);
logexp <= conv_std_logic_vector(1031,11);
WHEN "1010101000" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(14112527,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(178541810,28);
logexp <= conv_std_logic_vector(1031,11);
WHEN "1010101001" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(14157953,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(203674127,28);
logexp <= conv_std_logic_vector(1031,11);
WHEN "1010101010" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(14203379,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(228806444,28);
logexp <= conv_std_logic_vector(1031,11);
WHEN "1010101011" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(14248805,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(253938761,28);
logexp <= conv_std_logic_vector(1031,11);
WHEN "1010101100" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(14294232,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(10635622,28);
logexp <= conv_std_logic_vector(1031,11);
WHEN "1010101101" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(14339658,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(35767939,28);
logexp <= conv_std_logic_vector(1031,11);
WHEN "1010101110" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(14385084,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(60900256,28);
logexp <= conv_std_logic_vector(1031,11);
WHEN "1010101111" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(14430510,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(86032572,28);
logexp <= conv_std_logic_vector(1031,11);
WHEN "1010110000" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(14475936,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(111164889,28);
logexp <= conv_std_logic_vector(1031,11);
WHEN "1010110001" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(14521362,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(136297206,28);
logexp <= conv_std_logic_vector(1031,11);
WHEN "1010110010" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(14566788,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(161429523,28);
logexp <= conv_std_logic_vector(1031,11);
WHEN "1010110011" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(14612214,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(186561840,28);
logexp <= conv_std_logic_vector(1031,11);
WHEN "1010110100" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(14657640,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(211694157,28);
logexp <= conv_std_logic_vector(1031,11);
WHEN "1010110101" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(14703066,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(236826474,28);
logexp <= conv_std_logic_vector(1031,11);
WHEN "1010110110" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(14748492,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(261958791,28);
logexp <= conv_std_logic_vector(1031,11);
WHEN "1010110111" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(14793919,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(18655652,28);
logexp <= conv_std_logic_vector(1031,11);
WHEN "1010111000" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(14839345,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(43787969,28);
logexp <= conv_std_logic_vector(1031,11);
WHEN "1010111001" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(14884771,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(68920286,28);
logexp <= conv_std_logic_vector(1031,11);
WHEN "1010111010" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(14930197,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(94052603,28);
logexp <= conv_std_logic_vector(1031,11);
WHEN "1010111011" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(14975623,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(119184920,28);
logexp <= conv_std_logic_vector(1031,11);
WHEN "1010111100" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(15021049,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(144317237,28);
logexp <= conv_std_logic_vector(1031,11);
WHEN "1010111101" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(15066475,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(169449554,28);
logexp <= conv_std_logic_vector(1031,11);
WHEN "1010111110" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(15111901,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(194581871,28);
logexp <= conv_std_logic_vector(1031,11);
WHEN "1010111111" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(15157327,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(219714188,28);
logexp <= conv_std_logic_vector(1031,11);
WHEN "1011000000" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(15202753,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(244846505,28);
logexp <= conv_std_logic_vector(1031,11);
WHEN "1011000001" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(15248180,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(1543366,28);
logexp <= conv_std_logic_vector(1031,11);
WHEN "1011000010" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(15293606,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(26675683,28);
logexp <= conv_std_logic_vector(1031,11);
WHEN "1011000011" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(15339032,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(51808000,28);
logexp <= conv_std_logic_vector(1031,11);
WHEN "1011000100" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(15384458,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(76940317,28);
logexp <= conv_std_logic_vector(1031,11);
WHEN "1011000101" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(15429884,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(102072634,28);
logexp <= conv_std_logic_vector(1031,11);
WHEN "1011000110" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(15475310,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(127204951,28);
logexp <= conv_std_logic_vector(1031,11);
WHEN "1011000111" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(15520736,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(152337268,28);
logexp <= conv_std_logic_vector(1031,11);
WHEN "1011001000" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(15566162,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(177469585,28);
logexp <= conv_std_logic_vector(1031,11);
WHEN "1011001001" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(15611588,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(202601902,28);
logexp <= conv_std_logic_vector(1031,11);
WHEN "1011001010" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(15657014,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(227734219,28);
logexp <= conv_std_logic_vector(1031,11);
WHEN "1011001011" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(15702440,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(252866536,28);
logexp <= conv_std_logic_vector(1031,11);
WHEN "1011001100" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(15747867,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(9563397,28);
logexp <= conv_std_logic_vector(1031,11);
WHEN "1011001101" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(15793293,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(34695713,28);
logexp <= conv_std_logic_vector(1031,11);
WHEN "1011001110" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(15838719,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(59828030,28);
logexp <= conv_std_logic_vector(1031,11);
WHEN "1011001111" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(15884145,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(84960347,28);
logexp <= conv_std_logic_vector(1031,11);
WHEN "1011010000" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(15929571,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(110092664,28);
logexp <= conv_std_logic_vector(1031,11);
WHEN "1011010001" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(15974997,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(135224981,28);
logexp <= conv_std_logic_vector(1031,11);
WHEN "1011010010" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(16020423,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(160357298,28);
logexp <= conv_std_logic_vector(1031,11);
WHEN "1011010011" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(16065849,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(185489615,28);
logexp <= conv_std_logic_vector(1031,11);
WHEN "1011010100" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(16111275,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(210621932,28);
logexp <= conv_std_logic_vector(1031,11);
WHEN "1011010101" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(16156701,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(235754249,28);
logexp <= conv_std_logic_vector(1031,11);
WHEN "1011010110" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(16202127,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(260886566,28);
logexp <= conv_std_logic_vector(1031,11);
WHEN "1011010111" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(16247554,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(17583427,28);
logexp <= conv_std_logic_vector(1031,11);
WHEN "1011011000" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(16292980,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(42715744,28);
logexp <= conv_std_logic_vector(1031,11);
WHEN "1011011001" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(16338406,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(67848061,28);
logexp <= conv_std_logic_vector(1031,11);
WHEN "1011011010" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(16383832,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(92980378,28);
logexp <= conv_std_logic_vector(1031,11);
WHEN "1011011011" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(16429258,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(118112695,28);
logexp <= conv_std_logic_vector(1031,11);
WHEN "1011011100" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(16474684,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(143245012,28);
logexp <= conv_std_logic_vector(1031,11);
WHEN "1011011101" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(16520110,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(168377329,28);
logexp <= conv_std_logic_vector(1031,11);
WHEN "1011011110" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(16565536,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(193509646,28);
logexp <= conv_std_logic_vector(1031,11);
WHEN "1011011111" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(16610962,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(218641963,28);
logexp <= conv_std_logic_vector(1031,11);
WHEN "1011100000" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(16656388,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(243774280,28);
logexp <= conv_std_logic_vector(1031,11);
WHEN "1011100001" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(16701815,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(471141,28);
logexp <= conv_std_logic_vector(1031,11);
WHEN "1011100010" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(16747241,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(25603458,28);
logexp <= conv_std_logic_vector(1031,11);
WHEN "1011100011" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(7725,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(159585615,28);
logexp <= conv_std_logic_vector(1032,11);
WHEN "1011100100" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(30438,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(172151774,28);
logexp <= conv_std_logic_vector(1032,11);
WHEN "1011100101" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(53151,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(184717932,28);
logexp <= conv_std_logic_vector(1032,11);
WHEN "1011100110" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(75864,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(197284091,28);
logexp <= conv_std_logic_vector(1032,11);
WHEN "1011100111" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(98577,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(209850249,28);
logexp <= conv_std_logic_vector(1032,11);
WHEN "1011101000" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(121290,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(222416408,28);
logexp <= conv_std_logic_vector(1032,11);
WHEN "1011101001" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(144003,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(234982566,28);
logexp <= conv_std_logic_vector(1032,11);
WHEN "1011101010" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(166716,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(247548725,28);
logexp <= conv_std_logic_vector(1032,11);
WHEN "1011101011" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(189429,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(260114883,28);
logexp <= conv_std_logic_vector(1032,11);
WHEN "1011101100" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(212143,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(4245586,28);
logexp <= conv_std_logic_vector(1032,11);
WHEN "1011101101" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(234856,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(16811744,28);
logexp <= conv_std_logic_vector(1032,11);
WHEN "1011101110" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(257569,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(29377903,28);
logexp <= conv_std_logic_vector(1032,11);
WHEN "1011101111" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(280282,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(41944061,28);
logexp <= conv_std_logic_vector(1032,11);
WHEN "1011110000" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(302995,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(54510220,28);
logexp <= conv_std_logic_vector(1032,11);
WHEN "1011110001" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(325708,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(67076378,28);
logexp <= conv_std_logic_vector(1032,11);
WHEN "1011110010" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(348421,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(79642537,28);
logexp <= conv_std_logic_vector(1032,11);
WHEN "1011110011" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(371134,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(92208695,28);
logexp <= conv_std_logic_vector(1032,11);
WHEN "1011110100" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(393847,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(104774854,28);
logexp <= conv_std_logic_vector(1032,11);
WHEN "1011110101" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(416560,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(117341012,28);
logexp <= conv_std_logic_vector(1032,11);
WHEN "1011110110" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(439273,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(129907171,28);
logexp <= conv_std_logic_vector(1032,11);
WHEN "1011110111" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(461986,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(142473329,28);
logexp <= conv_std_logic_vector(1032,11);
WHEN "1011111000" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(484699,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(155039488,28);
logexp <= conv_std_logic_vector(1032,11);
WHEN "1011111001" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(507412,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(167605646,28);
logexp <= conv_std_logic_vector(1032,11);
WHEN "1011111010" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(530125,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(180171805,28);
logexp <= conv_std_logic_vector(1032,11);
WHEN "1011111011" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(552838,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(192737963,28);
logexp <= conv_std_logic_vector(1032,11);
WHEN "1011111100" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(575551,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(205304121,28);
logexp <= conv_std_logic_vector(1032,11);
WHEN "1011111101" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(598264,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(217870280,28);
logexp <= conv_std_logic_vector(1032,11);
WHEN "1011111110" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(620977,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(230436438,28);
logexp <= conv_std_logic_vector(1032,11);
WHEN "1011111111" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(643690,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(243002597,28);
logexp <= conv_std_logic_vector(1032,11);
WHEN "1100000000" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(666403,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(255568755,28);
logexp <= conv_std_logic_vector(1032,11);
WHEN "1100000001" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(689116,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(268134914,28);
logexp <= conv_std_logic_vector(1032,11);
WHEN "1100000010" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(711830,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(12265616,28);
logexp <= conv_std_logic_vector(1032,11);
WHEN "1100000011" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(734543,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(24831775,28);
logexp <= conv_std_logic_vector(1032,11);
WHEN "1100000100" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(757256,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(37397933,28);
logexp <= conv_std_logic_vector(1032,11);
WHEN "1100000101" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(779969,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(49964092,28);
logexp <= conv_std_logic_vector(1032,11);
WHEN "1100000110" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(802682,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(62530250,28);
logexp <= conv_std_logic_vector(1032,11);
WHEN "1100000111" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(825395,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(75096409,28);
logexp <= conv_std_logic_vector(1032,11);
WHEN "1100001000" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(848108,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(87662567,28);
logexp <= conv_std_logic_vector(1032,11);
WHEN "1100001001" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(870821,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(100228726,28);
logexp <= conv_std_logic_vector(1032,11);
WHEN "1100001010" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(893534,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(112794884,28);
logexp <= conv_std_logic_vector(1032,11);
WHEN "1100001011" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(916247,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(125361043,28);
logexp <= conv_std_logic_vector(1032,11);
WHEN "1100001100" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(938960,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(137927201,28);
logexp <= conv_std_logic_vector(1032,11);
WHEN "1100001101" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(961673,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(150493360,28);
logexp <= conv_std_logic_vector(1032,11);
WHEN "1100001110" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(984386,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(163059518,28);
logexp <= conv_std_logic_vector(1032,11);
WHEN "1100001111" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(1007099,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(175625677,28);
logexp <= conv_std_logic_vector(1032,11);
WHEN "1100010000" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(1029812,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(188191835,28);
logexp <= conv_std_logic_vector(1032,11);
WHEN "1100010001" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(1052525,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(200757994,28);
logexp <= conv_std_logic_vector(1032,11);
WHEN "1100010010" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(1075238,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(213324152,28);
logexp <= conv_std_logic_vector(1032,11);
WHEN "1100010011" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(1097951,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(225890311,28);
logexp <= conv_std_logic_vector(1032,11);
WHEN "1100010100" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(1120664,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(238456469,28);
logexp <= conv_std_logic_vector(1032,11);
WHEN "1100010101" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(1143377,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(251022628,28);
logexp <= conv_std_logic_vector(1032,11);
WHEN "1100010110" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(1166090,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(263588786,28);
logexp <= conv_std_logic_vector(1032,11);
WHEN "1100010111" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(1188804,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(7719489,28);
logexp <= conv_std_logic_vector(1032,11);
WHEN "1100011000" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(1211517,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(20285647,28);
logexp <= conv_std_logic_vector(1032,11);
WHEN "1100011001" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(1234230,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(32851805,28);
logexp <= conv_std_logic_vector(1032,11);
WHEN "1100011010" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(1256943,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(45417964,28);
logexp <= conv_std_logic_vector(1032,11);
WHEN "1100011011" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(1279656,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(57984122,28);
logexp <= conv_std_logic_vector(1032,11);
WHEN "1100011100" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(1302369,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(70550281,28);
logexp <= conv_std_logic_vector(1032,11);
WHEN "1100011101" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(1325082,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(83116439,28);
logexp <= conv_std_logic_vector(1032,11);
WHEN "1100011110" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(1347795,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(95682598,28);
logexp <= conv_std_logic_vector(1032,11);
WHEN "1100011111" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(1370508,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(108248756,28);
logexp <= conv_std_logic_vector(1032,11);
WHEN "1100100000" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(1393221,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(120814915,28);
logexp <= conv_std_logic_vector(1032,11);
WHEN "1100100001" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(1415934,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(133381073,28);
logexp <= conv_std_logic_vector(1032,11);
WHEN "1100100010" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(1438647,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(145947232,28);
logexp <= conv_std_logic_vector(1032,11);
WHEN "1100100011" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(1461360,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(158513390,28);
logexp <= conv_std_logic_vector(1032,11);
WHEN "1100100100" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(1484073,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(171079549,28);
logexp <= conv_std_logic_vector(1032,11);
WHEN "1100100101" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(1506786,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(183645707,28);
logexp <= conv_std_logic_vector(1032,11);
WHEN "1100100110" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(1529499,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(196211866,28);
logexp <= conv_std_logic_vector(1032,11);
WHEN "1100100111" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(1552212,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(208778024,28);
logexp <= conv_std_logic_vector(1032,11);
WHEN "1100101000" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(1574925,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(221344183,28);
logexp <= conv_std_logic_vector(1032,11);
WHEN "1100101001" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(1597638,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(233910341,28);
logexp <= conv_std_logic_vector(1032,11);
WHEN "1100101010" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(1620351,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(246476500,28);
logexp <= conv_std_logic_vector(1032,11);
WHEN "1100101011" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(1643064,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(259042658,28);
logexp <= conv_std_logic_vector(1032,11);
WHEN "1100101100" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(1665778,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(3173361,28);
logexp <= conv_std_logic_vector(1032,11);
WHEN "1100101101" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(1688491,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(15739519,28);
logexp <= conv_std_logic_vector(1032,11);
WHEN "1100101110" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(1711204,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(28305678,28);
logexp <= conv_std_logic_vector(1032,11);
WHEN "1100101111" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(1733917,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(40871836,28);
logexp <= conv_std_logic_vector(1032,11);
WHEN "1100110000" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(1756630,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(53437995,28);
logexp <= conv_std_logic_vector(1032,11);
WHEN "1100110001" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(1779343,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(66004153,28);
logexp <= conv_std_logic_vector(1032,11);
WHEN "1100110010" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(1802056,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(78570312,28);
logexp <= conv_std_logic_vector(1032,11);
WHEN "1100110011" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(1824769,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(91136470,28);
logexp <= conv_std_logic_vector(1032,11);
WHEN "1100110100" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(1847482,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(103702629,28);
logexp <= conv_std_logic_vector(1032,11);
WHEN "1100110101" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(1870195,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(116268787,28);
logexp <= conv_std_logic_vector(1032,11);
WHEN "1100110110" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(1892908,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(128834946,28);
logexp <= conv_std_logic_vector(1032,11);
WHEN "1100110111" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(1915621,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(141401104,28);
logexp <= conv_std_logic_vector(1032,11);
WHEN "1100111000" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(1938334,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(153967262,28);
logexp <= conv_std_logic_vector(1032,11);
WHEN "1100111001" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(1961047,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(166533421,28);
logexp <= conv_std_logic_vector(1032,11);
WHEN "1100111010" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(1983760,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(179099579,28);
logexp <= conv_std_logic_vector(1032,11);
WHEN "1100111011" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(2006473,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(191665738,28);
logexp <= conv_std_logic_vector(1032,11);
WHEN "1100111100" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(2029186,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(204231896,28);
logexp <= conv_std_logic_vector(1032,11);
WHEN "1100111101" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(2051899,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(216798055,28);
logexp <= conv_std_logic_vector(1032,11);
WHEN "1100111110" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(2074612,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(229364213,28);
logexp <= conv_std_logic_vector(1032,11);
WHEN "1100111111" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(2097325,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(241930372,28);
logexp <= conv_std_logic_vector(1032,11);
WHEN "1101000000" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(2120038,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(254496530,28);
logexp <= conv_std_logic_vector(1032,11);
WHEN "1101000001" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(2142751,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(267062689,28);
logexp <= conv_std_logic_vector(1032,11);
WHEN "1101000010" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(2165465,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(11193391,28);
logexp <= conv_std_logic_vector(1032,11);
WHEN "1101000011" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(2188178,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(23759550,28);
logexp <= conv_std_logic_vector(1032,11);
WHEN "1101000100" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(2210891,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(36325708,28);
logexp <= conv_std_logic_vector(1032,11);
WHEN "1101000101" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(2233604,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(48891867,28);
logexp <= conv_std_logic_vector(1032,11);
WHEN "1101000110" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(2256317,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(61458025,28);
logexp <= conv_std_logic_vector(1032,11);
WHEN "1101000111" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(2279030,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(74024184,28);
logexp <= conv_std_logic_vector(1032,11);
WHEN "1101001000" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(2301743,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(86590342,28);
logexp <= conv_std_logic_vector(1032,11);
WHEN "1101001001" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(2324456,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(99156501,28);
logexp <= conv_std_logic_vector(1032,11);
WHEN "1101001010" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(2347169,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(111722659,28);
logexp <= conv_std_logic_vector(1032,11);
WHEN "1101001011" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(2369882,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(124288818,28);
logexp <= conv_std_logic_vector(1032,11);
WHEN "1101001100" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(2392595,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(136854976,28);
logexp <= conv_std_logic_vector(1032,11);
WHEN "1101001101" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(2415308,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(149421135,28);
logexp <= conv_std_logic_vector(1032,11);
WHEN "1101001110" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(2438021,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(161987293,28);
logexp <= conv_std_logic_vector(1032,11);
WHEN "1101001111" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(2460734,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(174553452,28);
logexp <= conv_std_logic_vector(1032,11);
WHEN "1101010000" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(2483447,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(187119610,28);
logexp <= conv_std_logic_vector(1032,11);
WHEN "1101010001" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(2506160,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(199685769,28);
logexp <= conv_std_logic_vector(1032,11);
WHEN "1101010010" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(2528873,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(212251927,28);
logexp <= conv_std_logic_vector(1032,11);
WHEN "1101010011" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(2551586,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(224818086,28);
logexp <= conv_std_logic_vector(1032,11);
WHEN "1101010100" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(2574299,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(237384244,28);
logexp <= conv_std_logic_vector(1032,11);
WHEN "1101010101" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(2597012,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(249950403,28);
logexp <= conv_std_logic_vector(1032,11);
WHEN "1101010110" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(2619725,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(262516561,28);
logexp <= conv_std_logic_vector(1032,11);
WHEN "1101010111" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(2642439,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(6647263,28);
logexp <= conv_std_logic_vector(1032,11);
WHEN "1101011000" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(2665152,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(19213422,28);
logexp <= conv_std_logic_vector(1032,11);
WHEN "1101011001" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(2687865,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(31779580,28);
logexp <= conv_std_logic_vector(1032,11);
WHEN "1101011010" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(2710578,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(44345739,28);
logexp <= conv_std_logic_vector(1032,11);
WHEN "1101011011" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(2733291,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(56911897,28);
logexp <= conv_std_logic_vector(1032,11);
WHEN "1101011100" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(2756004,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(69478056,28);
logexp <= conv_std_logic_vector(1032,11);
WHEN "1101011101" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(2778717,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(82044214,28);
logexp <= conv_std_logic_vector(1032,11);
WHEN "1101011110" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(2801430,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(94610373,28);
logexp <= conv_std_logic_vector(1032,11);
WHEN "1101011111" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(2824143,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(107176531,28);
logexp <= conv_std_logic_vector(1032,11);
WHEN "1101100000" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(2846856,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(119742690,28);
logexp <= conv_std_logic_vector(1032,11);
WHEN "1101100001" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(2869569,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(132308848,28);
logexp <= conv_std_logic_vector(1032,11);
WHEN "1101100010" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(2892282,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(144875007,28);
logexp <= conv_std_logic_vector(1032,11);
WHEN "1101100011" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(2914995,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(157441165,28);
logexp <= conv_std_logic_vector(1032,11);
WHEN "1101100100" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(2937708,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(170007324,28);
logexp <= conv_std_logic_vector(1032,11);
WHEN "1101100101" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(2960421,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(182573482,28);
logexp <= conv_std_logic_vector(1032,11);
WHEN "1101100110" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(2983134,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(195139641,28);
logexp <= conv_std_logic_vector(1032,11);
WHEN "1101100111" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(3005847,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(207705799,28);
logexp <= conv_std_logic_vector(1032,11);
WHEN "1101101000" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(3028560,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(220271958,28);
logexp <= conv_std_logic_vector(1032,11);
WHEN "1101101001" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(3051273,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(232838116,28);
logexp <= conv_std_logic_vector(1032,11);
WHEN "1101101010" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(3073986,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(245404275,28);
logexp <= conv_std_logic_vector(1032,11);
WHEN "1101101011" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(3096699,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(257970433,28);
logexp <= conv_std_logic_vector(1032,11);
WHEN "1101101100" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(3119413,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(2101136,28);
logexp <= conv_std_logic_vector(1032,11);
WHEN "1101101101" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(3142126,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(14667294,28);
logexp <= conv_std_logic_vector(1032,11);
WHEN "1101101110" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(3164839,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(27233453,28);
logexp <= conv_std_logic_vector(1032,11);
WHEN "1101101111" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(3187552,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(39799611,28);
logexp <= conv_std_logic_vector(1032,11);
WHEN "1101110000" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(3210265,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(52365770,28);
logexp <= conv_std_logic_vector(1032,11);
WHEN "1101110001" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(3232978,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(64931928,28);
logexp <= conv_std_logic_vector(1032,11);
WHEN "1101110010" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(3255691,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(77498087,28);
logexp <= conv_std_logic_vector(1032,11);
WHEN "1101110011" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(3278404,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(90064245,28);
logexp <= conv_std_logic_vector(1032,11);
WHEN "1101110100" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(3301117,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(102630404,28);
logexp <= conv_std_logic_vector(1032,11);
WHEN "1101110101" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(3323830,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(115196562,28);
logexp <= conv_std_logic_vector(1032,11);
WHEN "1101110110" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(3346543,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(127762720,28);
logexp <= conv_std_logic_vector(1032,11);
WHEN "1101110111" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(3369256,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(140328879,28);
logexp <= conv_std_logic_vector(1032,11);
WHEN "1101111000" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(3391969,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(152895037,28);
logexp <= conv_std_logic_vector(1032,11);
WHEN "1101111001" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(3414682,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(165461196,28);
logexp <= conv_std_logic_vector(1032,11);
WHEN "1101111010" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(3437395,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(178027354,28);
logexp <= conv_std_logic_vector(1032,11);
WHEN "1101111011" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(3460108,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(190593513,28);
logexp <= conv_std_logic_vector(1032,11);
WHEN "1101111100" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(3482821,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(203159671,28);
logexp <= conv_std_logic_vector(1032,11);
WHEN "1101111101" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(3505534,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(215725830,28);
logexp <= conv_std_logic_vector(1032,11);
WHEN "1101111110" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(3528247,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(228291988,28);
logexp <= conv_std_logic_vector(1032,11);
WHEN "1101111111" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(3550960,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(240858147,28);
logexp <= conv_std_logic_vector(1032,11);
WHEN "1110000000" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(3573673,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(253424305,28);
logexp <= conv_std_logic_vector(1032,11);
WHEN "1110000001" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(3596386,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(265990464,28);
logexp <= conv_std_logic_vector(1032,11);
WHEN "1110000010" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(3619100,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(10121166,28);
logexp <= conv_std_logic_vector(1032,11);
WHEN "1110000011" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(3641813,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(22687325,28);
logexp <= conv_std_logic_vector(1032,11);
WHEN "1110000100" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(3664526,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(35253483,28);
logexp <= conv_std_logic_vector(1032,11);
WHEN "1110000101" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(3687239,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(47819642,28);
logexp <= conv_std_logic_vector(1032,11);
WHEN "1110000110" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(3709952,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(60385800,28);
logexp <= conv_std_logic_vector(1032,11);
WHEN "1110000111" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(3732665,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(72951959,28);
logexp <= conv_std_logic_vector(1032,11);
WHEN "1110001000" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(3755378,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(85518117,28);
logexp <= conv_std_logic_vector(1032,11);
WHEN "1110001001" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(3778091,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(98084276,28);
logexp <= conv_std_logic_vector(1032,11);
WHEN "1110001010" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(3800804,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(110650434,28);
logexp <= conv_std_logic_vector(1032,11);
WHEN "1110001011" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(3823517,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(123216593,28);
logexp <= conv_std_logic_vector(1032,11);
WHEN "1110001100" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(3846230,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(135782751,28);
logexp <= conv_std_logic_vector(1032,11);
WHEN "1110001101" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(3868943,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(148348910,28);
logexp <= conv_std_logic_vector(1032,11);
WHEN "1110001110" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(3891656,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(160915068,28);
logexp <= conv_std_logic_vector(1032,11);
WHEN "1110001111" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(3914369,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(173481227,28);
logexp <= conv_std_logic_vector(1032,11);
WHEN "1110010000" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(3937082,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(186047385,28);
logexp <= conv_std_logic_vector(1032,11);
WHEN "1110010001" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(3959795,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(198613544,28);
logexp <= conv_std_logic_vector(1032,11);
WHEN "1110010010" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(3982508,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(211179702,28);
logexp <= conv_std_logic_vector(1032,11);
WHEN "1110010011" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(4005221,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(223745860,28);
logexp <= conv_std_logic_vector(1032,11);
WHEN "1110010100" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(4027934,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(236312019,28);
logexp <= conv_std_logic_vector(1032,11);
WHEN "1110010101" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(4050647,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(248878177,28);
logexp <= conv_std_logic_vector(1032,11);
WHEN "1110010110" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(4073360,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(261444336,28);
logexp <= conv_std_logic_vector(1032,11);
WHEN "1110010111" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(4096074,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(5575038,28);
logexp <= conv_std_logic_vector(1032,11);
WHEN "1110011000" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(4118787,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(18141197,28);
logexp <= conv_std_logic_vector(1032,11);
WHEN "1110011001" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(4141500,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(30707355,28);
logexp <= conv_std_logic_vector(1032,11);
WHEN "1110011010" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(4164213,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(43273514,28);
logexp <= conv_std_logic_vector(1032,11);
WHEN "1110011011" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(4186926,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(55839672,28);
logexp <= conv_std_logic_vector(1032,11);
WHEN "1110011100" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(4209639,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(68405831,28);
logexp <= conv_std_logic_vector(1032,11);
WHEN "1110011101" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(4232352,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(80971989,28);
logexp <= conv_std_logic_vector(1032,11);
WHEN "1110011110" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(4255065,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(93538148,28);
logexp <= conv_std_logic_vector(1032,11);
WHEN "1110011111" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(4277778,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(106104306,28);
logexp <= conv_std_logic_vector(1032,11);
WHEN "1110100000" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(4300491,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(118670465,28);
logexp <= conv_std_logic_vector(1032,11);
WHEN "1110100001" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(4323204,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(131236623,28);
logexp <= conv_std_logic_vector(1032,11);
WHEN "1110100010" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(4345917,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(143802782,28);
logexp <= conv_std_logic_vector(1032,11);
WHEN "1110100011" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(4368630,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(156368940,28);
logexp <= conv_std_logic_vector(1032,11);
WHEN "1110100100" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(4391343,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(168935099,28);
logexp <= conv_std_logic_vector(1032,11);
WHEN "1110100101" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(4414056,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(181501257,28);
logexp <= conv_std_logic_vector(1032,11);
WHEN "1110100110" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(4436769,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(194067416,28);
logexp <= conv_std_logic_vector(1032,11);
WHEN "1110100111" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(4459482,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(206633574,28);
logexp <= conv_std_logic_vector(1032,11);
WHEN "1110101000" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(4482195,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(219199733,28);
logexp <= conv_std_logic_vector(1032,11);
WHEN "1110101001" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(4504908,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(231765891,28);
logexp <= conv_std_logic_vector(1032,11);
WHEN "1110101010" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(4527621,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(244332050,28);
logexp <= conv_std_logic_vector(1032,11);
WHEN "1110101011" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(4550334,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(256898208,28);
logexp <= conv_std_logic_vector(1032,11);
WHEN "1110101100" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(4573048,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(1028911,28);
logexp <= conv_std_logic_vector(1032,11);
WHEN "1110101101" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(4595761,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(13595069,28);
logexp <= conv_std_logic_vector(1032,11);
WHEN "1110101110" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(4618474,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(26161228,28);
logexp <= conv_std_logic_vector(1032,11);
WHEN "1110101111" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(4641187,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(38727386,28);
logexp <= conv_std_logic_vector(1032,11);
WHEN "1110110000" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(4663900,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(51293545,28);
logexp <= conv_std_logic_vector(1032,11);
WHEN "1110110001" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(4686613,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(63859703,28);
logexp <= conv_std_logic_vector(1032,11);
WHEN "1110110010" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(4709326,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(76425861,28);
logexp <= conv_std_logic_vector(1032,11);
WHEN "1110110011" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(4732039,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(88992020,28);
logexp <= conv_std_logic_vector(1032,11);
WHEN "1110110100" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(4754752,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(101558178,28);
logexp <= conv_std_logic_vector(1032,11);
WHEN "1110110101" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(4777465,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(114124337,28);
logexp <= conv_std_logic_vector(1032,11);
WHEN "1110110110" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(4800178,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(126690495,28);
logexp <= conv_std_logic_vector(1032,11);
WHEN "1110110111" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(4822891,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(139256654,28);
logexp <= conv_std_logic_vector(1032,11);
WHEN "1110111000" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(4845604,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(151822812,28);
logexp <= conv_std_logic_vector(1032,11);
WHEN "1110111001" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(4868317,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(164388971,28);
logexp <= conv_std_logic_vector(1032,11);
WHEN "1110111010" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(4891030,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(176955129,28);
logexp <= conv_std_logic_vector(1032,11);
WHEN "1110111011" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(4913743,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(189521288,28);
logexp <= conv_std_logic_vector(1032,11);
WHEN "1110111100" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(4936456,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(202087446,28);
logexp <= conv_std_logic_vector(1032,11);
WHEN "1110111101" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(4959169,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(214653605,28);
logexp <= conv_std_logic_vector(1032,11);
WHEN "1110111110" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(4981882,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(227219763,28);
logexp <= conv_std_logic_vector(1032,11);
WHEN "1110111111" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(5004595,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(239785922,28);
logexp <= conv_std_logic_vector(1032,11);
WHEN "1111000000" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(5027308,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(252352080,28);
logexp <= conv_std_logic_vector(1032,11);
WHEN "1111000001" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(5050021,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(264918239,28);
logexp <= conv_std_logic_vector(1032,11);
WHEN "1111000010" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(5072735,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(9048941,28);
logexp <= conv_std_logic_vector(1032,11);
WHEN "1111000011" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(5095448,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(21615100,28);
logexp <= conv_std_logic_vector(1032,11);
WHEN "1111000100" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(5118161,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(34181258,28);
logexp <= conv_std_logic_vector(1032,11);
WHEN "1111000101" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(5140874,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(46747417,28);
logexp <= conv_std_logic_vector(1032,11);
WHEN "1111000110" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(5163587,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(59313575,28);
logexp <= conv_std_logic_vector(1032,11);
WHEN "1111000111" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(5186300,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(71879734,28);
logexp <= conv_std_logic_vector(1032,11);
WHEN "1111001000" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(5209013,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(84445892,28);
logexp <= conv_std_logic_vector(1032,11);
WHEN "1111001001" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(5231726,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(97012051,28);
logexp <= conv_std_logic_vector(1032,11);
WHEN "1111001010" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(5254439,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(109578209,28);
logexp <= conv_std_logic_vector(1032,11);
WHEN "1111001011" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(5277152,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(122144368,28);
logexp <= conv_std_logic_vector(1032,11);
WHEN "1111001100" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(5299865,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(134710526,28);
logexp <= conv_std_logic_vector(1032,11);
WHEN "1111001101" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(5322578,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(147276685,28);
logexp <= conv_std_logic_vector(1032,11);
WHEN "1111001110" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(5345291,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(159842843,28);
logexp <= conv_std_logic_vector(1032,11);
WHEN "1111001111" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(5368004,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(172409002,28);
logexp <= conv_std_logic_vector(1032,11);
WHEN "1111010000" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(5390717,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(184975160,28);
logexp <= conv_std_logic_vector(1032,11);
WHEN "1111010001" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(5413430,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(197541318,28);
logexp <= conv_std_logic_vector(1032,11);
WHEN "1111010010" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(5436143,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(210107477,28);
logexp <= conv_std_logic_vector(1032,11);
WHEN "1111010011" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(5458856,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(222673635,28);
logexp <= conv_std_logic_vector(1032,11);
WHEN "1111010100" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(5481569,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(235239794,28);
logexp <= conv_std_logic_vector(1032,11);
WHEN "1111010101" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(5504282,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(247805952,28);
logexp <= conv_std_logic_vector(1032,11);
WHEN "1111010110" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(5526995,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(260372111,28);
logexp <= conv_std_logic_vector(1032,11);
WHEN "1111010111" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(5549709,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(4502813,28);
logexp <= conv_std_logic_vector(1032,11);
WHEN "1111011000" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(5572422,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(17068972,28);
logexp <= conv_std_logic_vector(1032,11);
WHEN "1111011001" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(5595135,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(29635130,28);
logexp <= conv_std_logic_vector(1032,11);
WHEN "1111011010" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(5617848,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(42201289,28);
logexp <= conv_std_logic_vector(1032,11);
WHEN "1111011011" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(5640561,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(54767447,28);
logexp <= conv_std_logic_vector(1032,11);
WHEN "1111011100" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(5663274,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(67333606,28);
logexp <= conv_std_logic_vector(1032,11);
WHEN "1111011101" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(5685987,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(79899764,28);
logexp <= conv_std_logic_vector(1032,11);
WHEN "1111011110" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(5708700,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(92465923,28);
logexp <= conv_std_logic_vector(1032,11);
WHEN "1111011111" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(5731413,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(105032081,28);
logexp <= conv_std_logic_vector(1032,11);
WHEN "1111100000" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(5754126,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(117598240,28);
logexp <= conv_std_logic_vector(1032,11);
WHEN "1111100001" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(5776839,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(130164398,28);
logexp <= conv_std_logic_vector(1032,11);
WHEN "1111100010" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(5799552,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(142730557,28);
logexp <= conv_std_logic_vector(1032,11);
WHEN "1111100011" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(5822265,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(155296715,28);
logexp <= conv_std_logic_vector(1032,11);
WHEN "1111100100" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(5844978,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(167862874,28);
logexp <= conv_std_logic_vector(1032,11);
WHEN "1111100101" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(5867691,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(180429032,28);
logexp <= conv_std_logic_vector(1032,11);
WHEN "1111100110" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(5890404,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(192995191,28);
logexp <= conv_std_logic_vector(1032,11);
WHEN "1111100111" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(5913117,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(205561349,28);
logexp <= conv_std_logic_vector(1032,11);
WHEN "1111101000" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(5935830,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(218127508,28);
logexp <= conv_std_logic_vector(1032,11);
WHEN "1111101001" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(5958543,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(230693666,28);
logexp <= conv_std_logic_vector(1032,11);
WHEN "1111101010" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(5981256,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(243259825,28);
logexp <= conv_std_logic_vector(1032,11);
WHEN "1111101011" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(6003969,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(255825983,28);
logexp <= conv_std_logic_vector(1032,11);
WHEN "1111101100" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(6026682,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(268392142,28);
logexp <= conv_std_logic_vector(1032,11);
WHEN "1111101101" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(6049396,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(12522844,28);
logexp <= conv_std_logic_vector(1032,11);
WHEN "1111101110" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(6072109,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(25089003,28);
logexp <= conv_std_logic_vector(1032,11);
WHEN "1111101111" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(6094822,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(37655161,28);
logexp <= conv_std_logic_vector(1032,11);
WHEN "1111110000" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(6117535,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(50221319,28);
logexp <= conv_std_logic_vector(1032,11);
WHEN "1111110001" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(6140248,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(62787478,28);
logexp <= conv_std_logic_vector(1032,11);
WHEN "1111110010" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(6162961,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(75353636,28);
logexp <= conv_std_logic_vector(1032,11);
WHEN "1111110011" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(6185674,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(87919795,28);
logexp <= conv_std_logic_vector(1032,11);
WHEN "1111110100" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(6208387,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(100485953,28);
logexp <= conv_std_logic_vector(1032,11);
WHEN "1111110101" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(6231100,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(113052112,28);
logexp <= conv_std_logic_vector(1032,11);
WHEN "1111110110" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(6253813,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(125618270,28);
logexp <= conv_std_logic_vector(1032,11);
WHEN "1111110111" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(6276526,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(138184429,28);
logexp <= conv_std_logic_vector(1032,11);
WHEN "1111111000" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(6299239,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(150750587,28);
logexp <= conv_std_logic_vector(1032,11);
WHEN "1111111001" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(6321952,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(163316746,28);
logexp <= conv_std_logic_vector(1032,11);
WHEN "1111111010" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(6344665,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(175882904,28);
logexp <= conv_std_logic_vector(1032,11);
WHEN "1111111011" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(6367378,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(188449063,28);
logexp <= conv_std_logic_vector(1032,11);
WHEN "1111111100" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(6390091,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(201015221,28);
logexp <= conv_std_logic_vector(1032,11);
WHEN "1111111101" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(6412804,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(213581380,28);
logexp <= conv_std_logic_vector(1032,11);
WHEN "1111111110" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(6435517,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(226147538,28);
logexp <= conv_std_logic_vector(1032,11);
WHEN "1111111111" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(6458230,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(238713697,28);
logexp <= conv_std_logic_vector(1032,11);
WHEN others =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(0,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(0,28);
logexp <= conv_std_logic_vector(0,11);
END CASE;
END PROCESS;
END rtl;
|
LIBRARY ieee;
USE ieee.std_logic_1164.all;
USE ieee.std_logic_unsigned.all;
USE ieee.std_logic_arith.all;
--***************************************************
--*** ***
--*** FLOATING POINT CORE LIBRARY ***
--*** ***
--*** DP_LNLUTPOW.VHD ***
--*** ***
--*** Function: Look Up Table - LN() ***
--*** ***
--*** Generated by MATLAB Utility ***
--*** ***
--*** 18/02/08 ML ***
--*** ***
--*** (c) 2008 Altera Corporation ***
--*** ***
--*** Change History ***
--*** ***
--*** ***
--*** ***
--*** ***
--*** ***
--***************************************************
ENTITY dp_lnlutpow IS
PORT (
add : IN STD_LOGIC_VECTOR (10 DOWNTO 1);
logman : OUT STD_LOGIC_VECTOR (52 DOWNTO 1);
logexp : OUT STD_LOGIC_VECTOR (11 DOWNTO 1)
);
END dp_lnlutpow;
ARCHITECTURE rtl OF dp_lnlutpow IS
BEGIN
pca: PROCESS (add)
BEGIN
CASE add IS
WHEN "0000000000" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(0,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(0,28);
logexp <= conv_std_logic_vector(0,11);
WHEN "0000000001" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(6480943,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(251279855,28);
logexp <= conv_std_logic_vector(1022,11);
WHEN "0000000010" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(6480943,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(251279855,28);
logexp <= conv_std_logic_vector(1023,11);
WHEN "0000000011" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(666403,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(255568755,28);
logexp <= conv_std_logic_vector(1024,11);
WHEN "0000000100" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(6480943,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(251279855,28);
logexp <= conv_std_logic_vector(1024,11);
WHEN "0000000101" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(12295483,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(246990955,28);
logexp <= conv_std_logic_vector(1024,11);
WHEN "0000000110" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(666403,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(255568755,28);
logexp <= conv_std_logic_vector(1025,11);
WHEN "0000000111" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(3573673,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(253424305,28);
logexp <= conv_std_logic_vector(1025,11);
WHEN "0000001000" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(6480943,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(251279855,28);
logexp <= conv_std_logic_vector(1025,11);
WHEN "0000001001" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(9388213,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(249135405,28);
logexp <= conv_std_logic_vector(1025,11);
WHEN "0000001010" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(12295483,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(246990955,28);
logexp <= conv_std_logic_vector(1025,11);
WHEN "0000001011" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(15202753,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(244846505,28);
logexp <= conv_std_logic_vector(1025,11);
WHEN "0000001100" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(666403,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(255568755,28);
logexp <= conv_std_logic_vector(1026,11);
WHEN "0000001101" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(2120038,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(254496530,28);
logexp <= conv_std_logic_vector(1026,11);
WHEN "0000001110" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(3573673,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(253424305,28);
logexp <= conv_std_logic_vector(1026,11);
WHEN "0000001111" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(5027308,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(252352080,28);
logexp <= conv_std_logic_vector(1026,11);
WHEN "0000010000" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(6480943,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(251279855,28);
logexp <= conv_std_logic_vector(1026,11);
WHEN "0000010001" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(7934578,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(250207630,28);
logexp <= conv_std_logic_vector(1026,11);
WHEN "0000010010" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(9388213,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(249135405,28);
logexp <= conv_std_logic_vector(1026,11);
WHEN "0000010011" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(10841848,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(248063180,28);
logexp <= conv_std_logic_vector(1026,11);
WHEN "0000010100" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(12295483,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(246990955,28);
logexp <= conv_std_logic_vector(1026,11);
WHEN "0000010101" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(13749118,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(245918730,28);
logexp <= conv_std_logic_vector(1026,11);
WHEN "0000010110" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(15202753,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(244846505,28);
logexp <= conv_std_logic_vector(1026,11);
WHEN "0000010111" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(16656388,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(243774280,28);
logexp <= conv_std_logic_vector(1026,11);
WHEN "0000011000" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(666403,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(255568755,28);
logexp <= conv_std_logic_vector(1027,11);
WHEN "0000011001" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(1393221,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(120814915,28);
logexp <= conv_std_logic_vector(1027,11);
WHEN "0000011010" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(2120038,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(254496530,28);
logexp <= conv_std_logic_vector(1027,11);
WHEN "0000011011" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(2846856,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(119742690,28);
logexp <= conv_std_logic_vector(1027,11);
WHEN "0000011100" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(3573673,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(253424305,28);
logexp <= conv_std_logic_vector(1027,11);
WHEN "0000011101" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(4300491,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(118670465,28);
logexp <= conv_std_logic_vector(1027,11);
WHEN "0000011110" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(5027308,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(252352080,28);
logexp <= conv_std_logic_vector(1027,11);
WHEN "0000011111" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(5754126,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(117598240,28);
logexp <= conv_std_logic_vector(1027,11);
WHEN "0000100000" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(6480943,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(251279855,28);
logexp <= conv_std_logic_vector(1027,11);
WHEN "0000100001" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(7207761,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(116526015,28);
logexp <= conv_std_logic_vector(1027,11);
WHEN "0000100010" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(7934578,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(250207630,28);
logexp <= conv_std_logic_vector(1027,11);
WHEN "0000100011" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(8661396,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(115453790,28);
logexp <= conv_std_logic_vector(1027,11);
WHEN "0000100100" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(9388213,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(249135405,28);
logexp <= conv_std_logic_vector(1027,11);
WHEN "0000100101" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(10115031,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(114381565,28);
logexp <= conv_std_logic_vector(1027,11);
WHEN "0000100110" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(10841848,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(248063180,28);
logexp <= conv_std_logic_vector(1027,11);
WHEN "0000100111" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(11568666,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(113309340,28);
logexp <= conv_std_logic_vector(1027,11);
WHEN "0000101000" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(12295483,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(246990955,28);
logexp <= conv_std_logic_vector(1027,11);
WHEN "0000101001" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(13022301,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(112237114,28);
logexp <= conv_std_logic_vector(1027,11);
WHEN "0000101010" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(13749118,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(245918730,28);
logexp <= conv_std_logic_vector(1027,11);
WHEN "0000101011" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(14475936,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(111164889,28);
logexp <= conv_std_logic_vector(1027,11);
WHEN "0000101100" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(15202753,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(244846505,28);
logexp <= conv_std_logic_vector(1027,11);
WHEN "0000101101" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(15929571,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(110092664,28);
logexp <= conv_std_logic_vector(1027,11);
WHEN "0000101110" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(16656388,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(243774280,28);
logexp <= conv_std_logic_vector(1027,11);
WHEN "0000101111" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(302995,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(54510220,28);
logexp <= conv_std_logic_vector(1028,11);
WHEN "0000110000" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(666403,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(255568755,28);
logexp <= conv_std_logic_vector(1028,11);
WHEN "0000110001" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(1029812,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(188191835,28);
logexp <= conv_std_logic_vector(1028,11);
WHEN "0000110010" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(1393221,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(120814915,28);
logexp <= conv_std_logic_vector(1028,11);
WHEN "0000110011" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(1756630,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(53437995,28);
logexp <= conv_std_logic_vector(1028,11);
WHEN "0000110100" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(2120038,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(254496530,28);
logexp <= conv_std_logic_vector(1028,11);
WHEN "0000110101" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(2483447,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(187119610,28);
logexp <= conv_std_logic_vector(1028,11);
WHEN "0000110110" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(2846856,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(119742690,28);
logexp <= conv_std_logic_vector(1028,11);
WHEN "0000110111" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(3210265,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(52365770,28);
logexp <= conv_std_logic_vector(1028,11);
WHEN "0000111000" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(3573673,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(253424305,28);
logexp <= conv_std_logic_vector(1028,11);
WHEN "0000111001" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(3937082,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(186047385,28);
logexp <= conv_std_logic_vector(1028,11);
WHEN "0000111010" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(4300491,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(118670465,28);
logexp <= conv_std_logic_vector(1028,11);
WHEN "0000111011" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(4663900,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(51293545,28);
logexp <= conv_std_logic_vector(1028,11);
WHEN "0000111100" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(5027308,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(252352080,28);
logexp <= conv_std_logic_vector(1028,11);
WHEN "0000111101" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(5390717,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(184975160,28);
logexp <= conv_std_logic_vector(1028,11);
WHEN "0000111110" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(5754126,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(117598240,28);
logexp <= conv_std_logic_vector(1028,11);
WHEN "0000111111" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(6117535,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(50221319,28);
logexp <= conv_std_logic_vector(1028,11);
WHEN "0001000000" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(6480943,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(251279855,28);
logexp <= conv_std_logic_vector(1028,11);
WHEN "0001000001" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(6844352,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(183902935,28);
logexp <= conv_std_logic_vector(1028,11);
WHEN "0001000010" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(7207761,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(116526015,28);
logexp <= conv_std_logic_vector(1028,11);
WHEN "0001000011" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(7571170,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(49149094,28);
logexp <= conv_std_logic_vector(1028,11);
WHEN "0001000100" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(7934578,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(250207630,28);
logexp <= conv_std_logic_vector(1028,11);
WHEN "0001000101" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(8297987,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(182830710,28);
logexp <= conv_std_logic_vector(1028,11);
WHEN "0001000110" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(8661396,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(115453790,28);
logexp <= conv_std_logic_vector(1028,11);
WHEN "0001000111" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(9024805,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(48076869,28);
logexp <= conv_std_logic_vector(1028,11);
WHEN "0001001000" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(9388213,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(249135405,28);
logexp <= conv_std_logic_vector(1028,11);
WHEN "0001001001" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(9751622,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(181758485,28);
logexp <= conv_std_logic_vector(1028,11);
WHEN "0001001010" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(10115031,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(114381565,28);
logexp <= conv_std_logic_vector(1028,11);
WHEN "0001001011" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(10478440,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(47004644,28);
logexp <= conv_std_logic_vector(1028,11);
WHEN "0001001100" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(10841848,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(248063180,28);
logexp <= conv_std_logic_vector(1028,11);
WHEN "0001001101" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(11205257,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(180686260,28);
logexp <= conv_std_logic_vector(1028,11);
WHEN "0001001110" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(11568666,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(113309340,28);
logexp <= conv_std_logic_vector(1028,11);
WHEN "0001001111" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(11932075,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(45932419,28);
logexp <= conv_std_logic_vector(1028,11);
WHEN "0001010000" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(12295483,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(246990955,28);
logexp <= conv_std_logic_vector(1028,11);
WHEN "0001010001" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(12658892,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(179614035,28);
logexp <= conv_std_logic_vector(1028,11);
WHEN "0001010010" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(13022301,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(112237114,28);
logexp <= conv_std_logic_vector(1028,11);
WHEN "0001010011" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(13385710,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(44860194,28);
logexp <= conv_std_logic_vector(1028,11);
WHEN "0001010100" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(13749118,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(245918730,28);
logexp <= conv_std_logic_vector(1028,11);
WHEN "0001010101" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(14112527,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(178541810,28);
logexp <= conv_std_logic_vector(1028,11);
WHEN "0001010110" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(14475936,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(111164889,28);
logexp <= conv_std_logic_vector(1028,11);
WHEN "0001010111" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(14839345,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(43787969,28);
logexp <= conv_std_logic_vector(1028,11);
WHEN "0001011000" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(15202753,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(244846505,28);
logexp <= conv_std_logic_vector(1028,11);
WHEN "0001011001" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(15566162,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(177469585,28);
logexp <= conv_std_logic_vector(1028,11);
WHEN "0001011010" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(15929571,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(110092664,28);
logexp <= conv_std_logic_vector(1028,11);
WHEN "0001011011" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(16292980,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(42715744,28);
logexp <= conv_std_logic_vector(1028,11);
WHEN "0001011100" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(16656388,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(243774280,28);
logexp <= conv_std_logic_vector(1028,11);
WHEN "0001011101" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(121290,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(222416408,28);
logexp <= conv_std_logic_vector(1029,11);
WHEN "0001011110" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(302995,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(54510220,28);
logexp <= conv_std_logic_vector(1029,11);
WHEN "0001011111" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(484699,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(155039488,28);
logexp <= conv_std_logic_vector(1029,11);
WHEN "0001100000" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(666403,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(255568755,28);
logexp <= conv_std_logic_vector(1029,11);
WHEN "0001100001" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(848108,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(87662567,28);
logexp <= conv_std_logic_vector(1029,11);
WHEN "0001100010" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(1029812,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(188191835,28);
logexp <= conv_std_logic_vector(1029,11);
WHEN "0001100011" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(1211517,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(20285647,28);
logexp <= conv_std_logic_vector(1029,11);
WHEN "0001100100" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(1393221,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(120814915,28);
logexp <= conv_std_logic_vector(1029,11);
WHEN "0001100101" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(1574925,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(221344183,28);
logexp <= conv_std_logic_vector(1029,11);
WHEN "0001100110" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(1756630,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(53437995,28);
logexp <= conv_std_logic_vector(1029,11);
WHEN "0001100111" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(1938334,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(153967262,28);
logexp <= conv_std_logic_vector(1029,11);
WHEN "0001101000" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(2120038,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(254496530,28);
logexp <= conv_std_logic_vector(1029,11);
WHEN "0001101001" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(2301743,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(86590342,28);
logexp <= conv_std_logic_vector(1029,11);
WHEN "0001101010" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(2483447,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(187119610,28);
logexp <= conv_std_logic_vector(1029,11);
WHEN "0001101011" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(2665152,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(19213422,28);
logexp <= conv_std_logic_vector(1029,11);
WHEN "0001101100" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(2846856,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(119742690,28);
logexp <= conv_std_logic_vector(1029,11);
WHEN "0001101101" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(3028560,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(220271958,28);
logexp <= conv_std_logic_vector(1029,11);
WHEN "0001101110" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(3210265,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(52365770,28);
logexp <= conv_std_logic_vector(1029,11);
WHEN "0001101111" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(3391969,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(152895037,28);
logexp <= conv_std_logic_vector(1029,11);
WHEN "0001110000" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(3573673,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(253424305,28);
logexp <= conv_std_logic_vector(1029,11);
WHEN "0001110001" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(3755378,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(85518117,28);
logexp <= conv_std_logic_vector(1029,11);
WHEN "0001110010" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(3937082,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(186047385,28);
logexp <= conv_std_logic_vector(1029,11);
WHEN "0001110011" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(4118787,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(18141197,28);
logexp <= conv_std_logic_vector(1029,11);
WHEN "0001110100" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(4300491,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(118670465,28);
logexp <= conv_std_logic_vector(1029,11);
WHEN "0001110101" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(4482195,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(219199733,28);
logexp <= conv_std_logic_vector(1029,11);
WHEN "0001110110" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(4663900,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(51293545,28);
logexp <= conv_std_logic_vector(1029,11);
WHEN "0001110111" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(4845604,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(151822812,28);
logexp <= conv_std_logic_vector(1029,11);
WHEN "0001111000" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(5027308,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(252352080,28);
logexp <= conv_std_logic_vector(1029,11);
WHEN "0001111001" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(5209013,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(84445892,28);
logexp <= conv_std_logic_vector(1029,11);
WHEN "0001111010" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(5390717,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(184975160,28);
logexp <= conv_std_logic_vector(1029,11);
WHEN "0001111011" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(5572422,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(17068972,28);
logexp <= conv_std_logic_vector(1029,11);
WHEN "0001111100" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(5754126,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(117598240,28);
logexp <= conv_std_logic_vector(1029,11);
WHEN "0001111101" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(5935830,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(218127508,28);
logexp <= conv_std_logic_vector(1029,11);
WHEN "0001111110" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(6117535,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(50221319,28);
logexp <= conv_std_logic_vector(1029,11);
WHEN "0001111111" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(6299239,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(150750587,28);
logexp <= conv_std_logic_vector(1029,11);
WHEN "0010000000" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(6480943,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(251279855,28);
logexp <= conv_std_logic_vector(1029,11);
WHEN "0010000001" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(6662648,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(83373667,28);
logexp <= conv_std_logic_vector(1029,11);
WHEN "0010000010" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(6844352,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(183902935,28);
logexp <= conv_std_logic_vector(1029,11);
WHEN "0010000011" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(7026057,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(15996747,28);
logexp <= conv_std_logic_vector(1029,11);
WHEN "0010000100" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(7207761,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(116526015,28);
logexp <= conv_std_logic_vector(1029,11);
WHEN "0010000101" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(7389465,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(217055283,28);
logexp <= conv_std_logic_vector(1029,11);
WHEN "0010000110" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(7571170,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(49149094,28);
logexp <= conv_std_logic_vector(1029,11);
WHEN "0010000111" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(7752874,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(149678362,28);
logexp <= conv_std_logic_vector(1029,11);
WHEN "0010001000" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(7934578,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(250207630,28);
logexp <= conv_std_logic_vector(1029,11);
WHEN "0010001001" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(8116283,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(82301442,28);
logexp <= conv_std_logic_vector(1029,11);
WHEN "0010001010" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(8297987,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(182830710,28);
logexp <= conv_std_logic_vector(1029,11);
WHEN "0010001011" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(8479692,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(14924522,28);
logexp <= conv_std_logic_vector(1029,11);
WHEN "0010001100" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(8661396,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(115453790,28);
logexp <= conv_std_logic_vector(1029,11);
WHEN "0010001101" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(8843100,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(215983058,28);
logexp <= conv_std_logic_vector(1029,11);
WHEN "0010001110" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(9024805,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(48076869,28);
logexp <= conv_std_logic_vector(1029,11);
WHEN "0010001111" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(9206509,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(148606137,28);
logexp <= conv_std_logic_vector(1029,11);
WHEN "0010010000" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(9388213,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(249135405,28);
logexp <= conv_std_logic_vector(1029,11);
WHEN "0010010001" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(9569918,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(81229217,28);
logexp <= conv_std_logic_vector(1029,11);
WHEN "0010010010" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(9751622,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(181758485,28);
logexp <= conv_std_logic_vector(1029,11);
WHEN "0010010011" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(9933327,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(13852297,28);
logexp <= conv_std_logic_vector(1029,11);
WHEN "0010010100" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(10115031,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(114381565,28);
logexp <= conv_std_logic_vector(1029,11);
WHEN "0010010101" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(10296735,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(214910832,28);
logexp <= conv_std_logic_vector(1029,11);
WHEN "0010010110" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(10478440,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(47004644,28);
logexp <= conv_std_logic_vector(1029,11);
WHEN "0010010111" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(10660144,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(147533912,28);
logexp <= conv_std_logic_vector(1029,11);
WHEN "0010011000" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(10841848,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(248063180,28);
logexp <= conv_std_logic_vector(1029,11);
WHEN "0010011001" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(11023553,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(80156992,28);
logexp <= conv_std_logic_vector(1029,11);
WHEN "0010011010" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(11205257,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(180686260,28);
logexp <= conv_std_logic_vector(1029,11);
WHEN "0010011011" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(11386962,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(12780072,28);
logexp <= conv_std_logic_vector(1029,11);
WHEN "0010011100" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(11568666,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(113309340,28);
logexp <= conv_std_logic_vector(1029,11);
WHEN "0010011101" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(11750370,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(213838607,28);
logexp <= conv_std_logic_vector(1029,11);
WHEN "0010011110" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(11932075,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(45932419,28);
logexp <= conv_std_logic_vector(1029,11);
WHEN "0010011111" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(12113779,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(146461687,28);
logexp <= conv_std_logic_vector(1029,11);
WHEN "0010100000" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(12295483,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(246990955,28);
logexp <= conv_std_logic_vector(1029,11);
WHEN "0010100001" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(12477188,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(79084767,28);
logexp <= conv_std_logic_vector(1029,11);
WHEN "0010100010" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(12658892,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(179614035,28);
logexp <= conv_std_logic_vector(1029,11);
WHEN "0010100011" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(12840597,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(11707847,28);
logexp <= conv_std_logic_vector(1029,11);
WHEN "0010100100" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(13022301,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(112237114,28);
logexp <= conv_std_logic_vector(1029,11);
WHEN "0010100101" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(13204005,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(212766382,28);
logexp <= conv_std_logic_vector(1029,11);
WHEN "0010100110" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(13385710,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(44860194,28);
logexp <= conv_std_logic_vector(1029,11);
WHEN "0010100111" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(13567414,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(145389462,28);
logexp <= conv_std_logic_vector(1029,11);
WHEN "0010101000" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(13749118,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(245918730,28);
logexp <= conv_std_logic_vector(1029,11);
WHEN "0010101001" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(13930823,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(78012542,28);
logexp <= conv_std_logic_vector(1029,11);
WHEN "0010101010" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(14112527,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(178541810,28);
logexp <= conv_std_logic_vector(1029,11);
WHEN "0010101011" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(14294232,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(10635622,28);
logexp <= conv_std_logic_vector(1029,11);
WHEN "0010101100" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(14475936,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(111164889,28);
logexp <= conv_std_logic_vector(1029,11);
WHEN "0010101101" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(14657640,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(211694157,28);
logexp <= conv_std_logic_vector(1029,11);
WHEN "0010101110" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(14839345,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(43787969,28);
logexp <= conv_std_logic_vector(1029,11);
WHEN "0010101111" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(15021049,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(144317237,28);
logexp <= conv_std_logic_vector(1029,11);
WHEN "0010110000" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(15202753,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(244846505,28);
logexp <= conv_std_logic_vector(1029,11);
WHEN "0010110001" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(15384458,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(76940317,28);
logexp <= conv_std_logic_vector(1029,11);
WHEN "0010110010" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(15566162,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(177469585,28);
logexp <= conv_std_logic_vector(1029,11);
WHEN "0010110011" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(15747867,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(9563397,28);
logexp <= conv_std_logic_vector(1029,11);
WHEN "0010110100" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(15929571,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(110092664,28);
logexp <= conv_std_logic_vector(1029,11);
WHEN "0010110101" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(16111275,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(210621932,28);
logexp <= conv_std_logic_vector(1029,11);
WHEN "0010110110" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(16292980,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(42715744,28);
logexp <= conv_std_logic_vector(1029,11);
WHEN "0010110111" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(16474684,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(143245012,28);
logexp <= conv_std_logic_vector(1029,11);
WHEN "0010111000" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(16656388,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(243774280,28);
logexp <= conv_std_logic_vector(1029,11);
WHEN "0010111001" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(30438,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(172151774,28);
logexp <= conv_std_logic_vector(1030,11);
WHEN "0010111010" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(121290,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(222416408,28);
logexp <= conv_std_logic_vector(1030,11);
WHEN "0010111011" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(212143,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(4245586,28);
logexp <= conv_std_logic_vector(1030,11);
WHEN "0010111100" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(302995,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(54510220,28);
logexp <= conv_std_logic_vector(1030,11);
WHEN "0010111101" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(393847,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(104774854,28);
logexp <= conv_std_logic_vector(1030,11);
WHEN "0010111110" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(484699,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(155039488,28);
logexp <= conv_std_logic_vector(1030,11);
WHEN "0010111111" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(575551,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(205304121,28);
logexp <= conv_std_logic_vector(1030,11);
WHEN "0011000000" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(666403,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(255568755,28);
logexp <= conv_std_logic_vector(1030,11);
WHEN "0011000001" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(757256,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(37397933,28);
logexp <= conv_std_logic_vector(1030,11);
WHEN "0011000010" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(848108,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(87662567,28);
logexp <= conv_std_logic_vector(1030,11);
WHEN "0011000011" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(938960,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(137927201,28);
logexp <= conv_std_logic_vector(1030,11);
WHEN "0011000100" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(1029812,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(188191835,28);
logexp <= conv_std_logic_vector(1030,11);
WHEN "0011000101" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(1120664,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(238456469,28);
logexp <= conv_std_logic_vector(1030,11);
WHEN "0011000110" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(1211517,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(20285647,28);
logexp <= conv_std_logic_vector(1030,11);
WHEN "0011000111" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(1302369,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(70550281,28);
logexp <= conv_std_logic_vector(1030,11);
WHEN "0011001000" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(1393221,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(120814915,28);
logexp <= conv_std_logic_vector(1030,11);
WHEN "0011001001" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(1484073,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(171079549,28);
logexp <= conv_std_logic_vector(1030,11);
WHEN "0011001010" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(1574925,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(221344183,28);
logexp <= conv_std_logic_vector(1030,11);
WHEN "0011001011" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(1665778,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(3173361,28);
logexp <= conv_std_logic_vector(1030,11);
WHEN "0011001100" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(1756630,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(53437995,28);
logexp <= conv_std_logic_vector(1030,11);
WHEN "0011001101" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(1847482,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(103702629,28);
logexp <= conv_std_logic_vector(1030,11);
WHEN "0011001110" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(1938334,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(153967262,28);
logexp <= conv_std_logic_vector(1030,11);
WHEN "0011001111" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(2029186,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(204231896,28);
logexp <= conv_std_logic_vector(1030,11);
WHEN "0011010000" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(2120038,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(254496530,28);
logexp <= conv_std_logic_vector(1030,11);
WHEN "0011010001" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(2210891,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(36325708,28);
logexp <= conv_std_logic_vector(1030,11);
WHEN "0011010010" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(2301743,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(86590342,28);
logexp <= conv_std_logic_vector(1030,11);
WHEN "0011010011" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(2392595,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(136854976,28);
logexp <= conv_std_logic_vector(1030,11);
WHEN "0011010100" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(2483447,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(187119610,28);
logexp <= conv_std_logic_vector(1030,11);
WHEN "0011010101" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(2574299,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(237384244,28);
logexp <= conv_std_logic_vector(1030,11);
WHEN "0011010110" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(2665152,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(19213422,28);
logexp <= conv_std_logic_vector(1030,11);
WHEN "0011010111" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(2756004,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(69478056,28);
logexp <= conv_std_logic_vector(1030,11);
WHEN "0011011000" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(2846856,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(119742690,28);
logexp <= conv_std_logic_vector(1030,11);
WHEN "0011011001" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(2937708,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(170007324,28);
logexp <= conv_std_logic_vector(1030,11);
WHEN "0011011010" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(3028560,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(220271958,28);
logexp <= conv_std_logic_vector(1030,11);
WHEN "0011011011" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(3119413,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(2101136,28);
logexp <= conv_std_logic_vector(1030,11);
WHEN "0011011100" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(3210265,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(52365770,28);
logexp <= conv_std_logic_vector(1030,11);
WHEN "0011011101" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(3301117,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(102630404,28);
logexp <= conv_std_logic_vector(1030,11);
WHEN "0011011110" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(3391969,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(152895037,28);
logexp <= conv_std_logic_vector(1030,11);
WHEN "0011011111" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(3482821,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(203159671,28);
logexp <= conv_std_logic_vector(1030,11);
WHEN "0011100000" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(3573673,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(253424305,28);
logexp <= conv_std_logic_vector(1030,11);
WHEN "0011100001" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(3664526,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(35253483,28);
logexp <= conv_std_logic_vector(1030,11);
WHEN "0011100010" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(3755378,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(85518117,28);
logexp <= conv_std_logic_vector(1030,11);
WHEN "0011100011" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(3846230,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(135782751,28);
logexp <= conv_std_logic_vector(1030,11);
WHEN "0011100100" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(3937082,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(186047385,28);
logexp <= conv_std_logic_vector(1030,11);
WHEN "0011100101" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(4027934,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(236312019,28);
logexp <= conv_std_logic_vector(1030,11);
WHEN "0011100110" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(4118787,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(18141197,28);
logexp <= conv_std_logic_vector(1030,11);
WHEN "0011100111" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(4209639,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(68405831,28);
logexp <= conv_std_logic_vector(1030,11);
WHEN "0011101000" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(4300491,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(118670465,28);
logexp <= conv_std_logic_vector(1030,11);
WHEN "0011101001" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(4391343,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(168935099,28);
logexp <= conv_std_logic_vector(1030,11);
WHEN "0011101010" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(4482195,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(219199733,28);
logexp <= conv_std_logic_vector(1030,11);
WHEN "0011101011" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(4573048,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(1028911,28);
logexp <= conv_std_logic_vector(1030,11);
WHEN "0011101100" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(4663900,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(51293545,28);
logexp <= conv_std_logic_vector(1030,11);
WHEN "0011101101" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(4754752,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(101558178,28);
logexp <= conv_std_logic_vector(1030,11);
WHEN "0011101110" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(4845604,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(151822812,28);
logexp <= conv_std_logic_vector(1030,11);
WHEN "0011101111" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(4936456,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(202087446,28);
logexp <= conv_std_logic_vector(1030,11);
WHEN "0011110000" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(5027308,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(252352080,28);
logexp <= conv_std_logic_vector(1030,11);
WHEN "0011110001" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(5118161,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(34181258,28);
logexp <= conv_std_logic_vector(1030,11);
WHEN "0011110010" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(5209013,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(84445892,28);
logexp <= conv_std_logic_vector(1030,11);
WHEN "0011110011" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(5299865,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(134710526,28);
logexp <= conv_std_logic_vector(1030,11);
WHEN "0011110100" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(5390717,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(184975160,28);
logexp <= conv_std_logic_vector(1030,11);
WHEN "0011110101" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(5481569,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(235239794,28);
logexp <= conv_std_logic_vector(1030,11);
WHEN "0011110110" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(5572422,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(17068972,28);
logexp <= conv_std_logic_vector(1030,11);
WHEN "0011110111" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(5663274,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(67333606,28);
logexp <= conv_std_logic_vector(1030,11);
WHEN "0011111000" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(5754126,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(117598240,28);
logexp <= conv_std_logic_vector(1030,11);
WHEN "0011111001" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(5844978,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(167862874,28);
logexp <= conv_std_logic_vector(1030,11);
WHEN "0011111010" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(5935830,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(218127508,28);
logexp <= conv_std_logic_vector(1030,11);
WHEN "0011111011" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(6026682,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(268392142,28);
logexp <= conv_std_logic_vector(1030,11);
WHEN "0011111100" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(6117535,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(50221319,28);
logexp <= conv_std_logic_vector(1030,11);
WHEN "0011111101" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(6208387,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(100485953,28);
logexp <= conv_std_logic_vector(1030,11);
WHEN "0011111110" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(6299239,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(150750587,28);
logexp <= conv_std_logic_vector(1030,11);
WHEN "0011111111" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(6390091,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(201015221,28);
logexp <= conv_std_logic_vector(1030,11);
WHEN "0100000000" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(6480943,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(251279855,28);
logexp <= conv_std_logic_vector(1030,11);
WHEN "0100000001" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(6571796,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(33109033,28);
logexp <= conv_std_logic_vector(1030,11);
WHEN "0100000010" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(6662648,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(83373667,28);
logexp <= conv_std_logic_vector(1030,11);
WHEN "0100000011" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(6753500,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(133638301,28);
logexp <= conv_std_logic_vector(1030,11);
WHEN "0100000100" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(6844352,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(183902935,28);
logexp <= conv_std_logic_vector(1030,11);
WHEN "0100000101" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(6935204,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(234167569,28);
logexp <= conv_std_logic_vector(1030,11);
WHEN "0100000110" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(7026057,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(15996747,28);
logexp <= conv_std_logic_vector(1030,11);
WHEN "0100000111" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(7116909,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(66261381,28);
logexp <= conv_std_logic_vector(1030,11);
WHEN "0100001000" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(7207761,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(116526015,28);
logexp <= conv_std_logic_vector(1030,11);
WHEN "0100001001" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(7298613,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(166790649,28);
logexp <= conv_std_logic_vector(1030,11);
WHEN "0100001010" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(7389465,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(217055283,28);
logexp <= conv_std_logic_vector(1030,11);
WHEN "0100001011" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(7480317,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(267319916,28);
logexp <= conv_std_logic_vector(1030,11);
WHEN "0100001100" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(7571170,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(49149094,28);
logexp <= conv_std_logic_vector(1030,11);
WHEN "0100001101" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(7662022,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(99413728,28);
logexp <= conv_std_logic_vector(1030,11);
WHEN "0100001110" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(7752874,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(149678362,28);
logexp <= conv_std_logic_vector(1030,11);
WHEN "0100001111" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(7843726,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(199942996,28);
logexp <= conv_std_logic_vector(1030,11);
WHEN "0100010000" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(7934578,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(250207630,28);
logexp <= conv_std_logic_vector(1030,11);
WHEN "0100010001" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(8025431,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(32036808,28);
logexp <= conv_std_logic_vector(1030,11);
WHEN "0100010010" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(8116283,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(82301442,28);
logexp <= conv_std_logic_vector(1030,11);
WHEN "0100010011" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(8207135,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(132566076,28);
logexp <= conv_std_logic_vector(1030,11);
WHEN "0100010100" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(8297987,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(182830710,28);
logexp <= conv_std_logic_vector(1030,11);
WHEN "0100010101" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(8388839,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(233095344,28);
logexp <= conv_std_logic_vector(1030,11);
WHEN "0100010110" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(8479692,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(14924522,28);
logexp <= conv_std_logic_vector(1030,11);
WHEN "0100010111" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(8570544,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(65189156,28);
logexp <= conv_std_logic_vector(1030,11);
WHEN "0100011000" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(8661396,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(115453790,28);
logexp <= conv_std_logic_vector(1030,11);
WHEN "0100011001" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(8752248,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(165718424,28);
logexp <= conv_std_logic_vector(1030,11);
WHEN "0100011010" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(8843100,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(215983058,28);
logexp <= conv_std_logic_vector(1030,11);
WHEN "0100011011" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(8933952,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(266247691,28);
logexp <= conv_std_logic_vector(1030,11);
WHEN "0100011100" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(9024805,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(48076869,28);
logexp <= conv_std_logic_vector(1030,11);
WHEN "0100011101" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(9115657,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(98341503,28);
logexp <= conv_std_logic_vector(1030,11);
WHEN "0100011110" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(9206509,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(148606137,28);
logexp <= conv_std_logic_vector(1030,11);
WHEN "0100011111" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(9297361,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(198870771,28);
logexp <= conv_std_logic_vector(1030,11);
WHEN "0100100000" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(9388213,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(249135405,28);
logexp <= conv_std_logic_vector(1030,11);
WHEN "0100100001" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(9479066,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(30964583,28);
logexp <= conv_std_logic_vector(1030,11);
WHEN "0100100010" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(9569918,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(81229217,28);
logexp <= conv_std_logic_vector(1030,11);
WHEN "0100100011" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(9660770,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(131493851,28);
logexp <= conv_std_logic_vector(1030,11);
WHEN "0100100100" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(9751622,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(181758485,28);
logexp <= conv_std_logic_vector(1030,11);
WHEN "0100100101" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(9842474,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(232023119,28);
logexp <= conv_std_logic_vector(1030,11);
WHEN "0100100110" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(9933327,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(13852297,28);
logexp <= conv_std_logic_vector(1030,11);
WHEN "0100100111" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(10024179,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(64116931,28);
logexp <= conv_std_logic_vector(1030,11);
WHEN "0100101000" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(10115031,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(114381565,28);
logexp <= conv_std_logic_vector(1030,11);
WHEN "0100101001" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(10205883,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(164646199,28);
logexp <= conv_std_logic_vector(1030,11);
WHEN "0100101010" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(10296735,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(214910832,28);
logexp <= conv_std_logic_vector(1030,11);
WHEN "0100101011" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(10387587,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(265175466,28);
logexp <= conv_std_logic_vector(1030,11);
WHEN "0100101100" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(10478440,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(47004644,28);
logexp <= conv_std_logic_vector(1030,11);
WHEN "0100101101" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(10569292,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(97269278,28);
logexp <= conv_std_logic_vector(1030,11);
WHEN "0100101110" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(10660144,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(147533912,28);
logexp <= conv_std_logic_vector(1030,11);
WHEN "0100101111" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(10750996,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(197798546,28);
logexp <= conv_std_logic_vector(1030,11);
WHEN "0100110000" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(10841848,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(248063180,28);
logexp <= conv_std_logic_vector(1030,11);
WHEN "0100110001" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(10932701,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(29892358,28);
logexp <= conv_std_logic_vector(1030,11);
WHEN "0100110010" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(11023553,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(80156992,28);
logexp <= conv_std_logic_vector(1030,11);
WHEN "0100110011" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(11114405,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(130421626,28);
logexp <= conv_std_logic_vector(1030,11);
WHEN "0100110100" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(11205257,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(180686260,28);
logexp <= conv_std_logic_vector(1030,11);
WHEN "0100110101" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(11296109,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(230950894,28);
logexp <= conv_std_logic_vector(1030,11);
WHEN "0100110110" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(11386962,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(12780072,28);
logexp <= conv_std_logic_vector(1030,11);
WHEN "0100110111" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(11477814,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(63044706,28);
logexp <= conv_std_logic_vector(1030,11);
WHEN "0100111000" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(11568666,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(113309340,28);
logexp <= conv_std_logic_vector(1030,11);
WHEN "0100111001" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(11659518,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(163573973,28);
logexp <= conv_std_logic_vector(1030,11);
WHEN "0100111010" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(11750370,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(213838607,28);
logexp <= conv_std_logic_vector(1030,11);
WHEN "0100111011" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(11841222,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(264103241,28);
logexp <= conv_std_logic_vector(1030,11);
WHEN "0100111100" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(11932075,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(45932419,28);
logexp <= conv_std_logic_vector(1030,11);
WHEN "0100111101" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(12022927,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(96197053,28);
logexp <= conv_std_logic_vector(1030,11);
WHEN "0100111110" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(12113779,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(146461687,28);
logexp <= conv_std_logic_vector(1030,11);
WHEN "0100111111" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(12204631,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(196726321,28);
logexp <= conv_std_logic_vector(1030,11);
WHEN "0101000000" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(12295483,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(246990955,28);
logexp <= conv_std_logic_vector(1030,11);
WHEN "0101000001" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(12386336,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(28820133,28);
logexp <= conv_std_logic_vector(1030,11);
WHEN "0101000010" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(12477188,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(79084767,28);
logexp <= conv_std_logic_vector(1030,11);
WHEN "0101000011" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(12568040,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(129349401,28);
logexp <= conv_std_logic_vector(1030,11);
WHEN "0101000100" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(12658892,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(179614035,28);
logexp <= conv_std_logic_vector(1030,11);
WHEN "0101000101" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(12749744,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(229878669,28);
logexp <= conv_std_logic_vector(1030,11);
WHEN "0101000110" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(12840597,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(11707847,28);
logexp <= conv_std_logic_vector(1030,11);
WHEN "0101000111" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(12931449,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(61972481,28);
logexp <= conv_std_logic_vector(1030,11);
WHEN "0101001000" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(13022301,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(112237114,28);
logexp <= conv_std_logic_vector(1030,11);
WHEN "0101001001" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(13113153,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(162501748,28);
logexp <= conv_std_logic_vector(1030,11);
WHEN "0101001010" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(13204005,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(212766382,28);
logexp <= conv_std_logic_vector(1030,11);
WHEN "0101001011" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(13294857,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(263031016,28);
logexp <= conv_std_logic_vector(1030,11);
WHEN "0101001100" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(13385710,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(44860194,28);
logexp <= conv_std_logic_vector(1030,11);
WHEN "0101001101" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(13476562,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(95124828,28);
logexp <= conv_std_logic_vector(1030,11);
WHEN "0101001110" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(13567414,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(145389462,28);
logexp <= conv_std_logic_vector(1030,11);
WHEN "0101001111" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(13658266,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(195654096,28);
logexp <= conv_std_logic_vector(1030,11);
WHEN "0101010000" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(13749118,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(245918730,28);
logexp <= conv_std_logic_vector(1030,11);
WHEN "0101010001" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(13839971,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(27747908,28);
logexp <= conv_std_logic_vector(1030,11);
WHEN "0101010010" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(13930823,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(78012542,28);
logexp <= conv_std_logic_vector(1030,11);
WHEN "0101010011" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(14021675,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(128277176,28);
logexp <= conv_std_logic_vector(1030,11);
WHEN "0101010100" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(14112527,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(178541810,28);
logexp <= conv_std_logic_vector(1030,11);
WHEN "0101010101" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(14203379,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(228806444,28);
logexp <= conv_std_logic_vector(1030,11);
WHEN "0101010110" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(14294232,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(10635622,28);
logexp <= conv_std_logic_vector(1030,11);
WHEN "0101010111" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(14385084,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(60900256,28);
logexp <= conv_std_logic_vector(1030,11);
WHEN "0101011000" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(14475936,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(111164889,28);
logexp <= conv_std_logic_vector(1030,11);
WHEN "0101011001" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(14566788,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(161429523,28);
logexp <= conv_std_logic_vector(1030,11);
WHEN "0101011010" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(14657640,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(211694157,28);
logexp <= conv_std_logic_vector(1030,11);
WHEN "0101011011" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(14748492,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(261958791,28);
logexp <= conv_std_logic_vector(1030,11);
WHEN "0101011100" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(14839345,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(43787969,28);
logexp <= conv_std_logic_vector(1030,11);
WHEN "0101011101" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(14930197,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(94052603,28);
logexp <= conv_std_logic_vector(1030,11);
WHEN "0101011110" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(15021049,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(144317237,28);
logexp <= conv_std_logic_vector(1030,11);
WHEN "0101011111" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(15111901,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(194581871,28);
logexp <= conv_std_logic_vector(1030,11);
WHEN "0101100000" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(15202753,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(244846505,28);
logexp <= conv_std_logic_vector(1030,11);
WHEN "0101100001" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(15293606,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(26675683,28);
logexp <= conv_std_logic_vector(1030,11);
WHEN "0101100010" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(15384458,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(76940317,28);
logexp <= conv_std_logic_vector(1030,11);
WHEN "0101100011" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(15475310,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(127204951,28);
logexp <= conv_std_logic_vector(1030,11);
WHEN "0101100100" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(15566162,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(177469585,28);
logexp <= conv_std_logic_vector(1030,11);
WHEN "0101100101" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(15657014,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(227734219,28);
logexp <= conv_std_logic_vector(1030,11);
WHEN "0101100110" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(15747867,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(9563397,28);
logexp <= conv_std_logic_vector(1030,11);
WHEN "0101100111" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(15838719,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(59828030,28);
logexp <= conv_std_logic_vector(1030,11);
WHEN "0101101000" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(15929571,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(110092664,28);
logexp <= conv_std_logic_vector(1030,11);
WHEN "0101101001" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(16020423,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(160357298,28);
logexp <= conv_std_logic_vector(1030,11);
WHEN "0101101010" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(16111275,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(210621932,28);
logexp <= conv_std_logic_vector(1030,11);
WHEN "0101101011" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(16202127,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(260886566,28);
logexp <= conv_std_logic_vector(1030,11);
WHEN "0101101100" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(16292980,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(42715744,28);
logexp <= conv_std_logic_vector(1030,11);
WHEN "0101101101" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(16383832,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(92980378,28);
logexp <= conv_std_logic_vector(1030,11);
WHEN "0101101110" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(16474684,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(143245012,28);
logexp <= conv_std_logic_vector(1030,11);
WHEN "0101101111" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(16565536,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(193509646,28);
logexp <= conv_std_logic_vector(1030,11);
WHEN "0101110000" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(16656388,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(243774280,28);
logexp <= conv_std_logic_vector(1030,11);
WHEN "0101110001" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(16747241,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(25603458,28);
logexp <= conv_std_logic_vector(1030,11);
WHEN "0101110010" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(30438,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(172151774,28);
logexp <= conv_std_logic_vector(1031,11);
WHEN "0101110011" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(75864,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(197284091,28);
logexp <= conv_std_logic_vector(1031,11);
WHEN "0101110100" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(121290,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(222416408,28);
logexp <= conv_std_logic_vector(1031,11);
WHEN "0101110101" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(166716,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(247548725,28);
logexp <= conv_std_logic_vector(1031,11);
WHEN "0101110110" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(212143,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(4245586,28);
logexp <= conv_std_logic_vector(1031,11);
WHEN "0101110111" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(257569,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(29377903,28);
logexp <= conv_std_logic_vector(1031,11);
WHEN "0101111000" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(302995,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(54510220,28);
logexp <= conv_std_logic_vector(1031,11);
WHEN "0101111001" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(348421,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(79642537,28);
logexp <= conv_std_logic_vector(1031,11);
WHEN "0101111010" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(393847,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(104774854,28);
logexp <= conv_std_logic_vector(1031,11);
WHEN "0101111011" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(439273,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(129907171,28);
logexp <= conv_std_logic_vector(1031,11);
WHEN "0101111100" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(484699,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(155039488,28);
logexp <= conv_std_logic_vector(1031,11);
WHEN "0101111101" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(530125,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(180171805,28);
logexp <= conv_std_logic_vector(1031,11);
WHEN "0101111110" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(575551,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(205304121,28);
logexp <= conv_std_logic_vector(1031,11);
WHEN "0101111111" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(620977,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(230436438,28);
logexp <= conv_std_logic_vector(1031,11);
WHEN "0110000000" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(666403,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(255568755,28);
logexp <= conv_std_logic_vector(1031,11);
WHEN "0110000001" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(711830,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(12265616,28);
logexp <= conv_std_logic_vector(1031,11);
WHEN "0110000010" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(757256,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(37397933,28);
logexp <= conv_std_logic_vector(1031,11);
WHEN "0110000011" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(802682,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(62530250,28);
logexp <= conv_std_logic_vector(1031,11);
WHEN "0110000100" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(848108,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(87662567,28);
logexp <= conv_std_logic_vector(1031,11);
WHEN "0110000101" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(893534,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(112794884,28);
logexp <= conv_std_logic_vector(1031,11);
WHEN "0110000110" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(938960,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(137927201,28);
logexp <= conv_std_logic_vector(1031,11);
WHEN "0110000111" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(984386,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(163059518,28);
logexp <= conv_std_logic_vector(1031,11);
WHEN "0110001000" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(1029812,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(188191835,28);
logexp <= conv_std_logic_vector(1031,11);
WHEN "0110001001" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(1075238,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(213324152,28);
logexp <= conv_std_logic_vector(1031,11);
WHEN "0110001010" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(1120664,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(238456469,28);
logexp <= conv_std_logic_vector(1031,11);
WHEN "0110001011" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(1166090,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(263588786,28);
logexp <= conv_std_logic_vector(1031,11);
WHEN "0110001100" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(1211517,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(20285647,28);
logexp <= conv_std_logic_vector(1031,11);
WHEN "0110001101" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(1256943,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(45417964,28);
logexp <= conv_std_logic_vector(1031,11);
WHEN "0110001110" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(1302369,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(70550281,28);
logexp <= conv_std_logic_vector(1031,11);
WHEN "0110001111" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(1347795,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(95682598,28);
logexp <= conv_std_logic_vector(1031,11);
WHEN "0110010000" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(1393221,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(120814915,28);
logexp <= conv_std_logic_vector(1031,11);
WHEN "0110010001" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(1438647,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(145947232,28);
logexp <= conv_std_logic_vector(1031,11);
WHEN "0110010010" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(1484073,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(171079549,28);
logexp <= conv_std_logic_vector(1031,11);
WHEN "0110010011" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(1529499,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(196211866,28);
logexp <= conv_std_logic_vector(1031,11);
WHEN "0110010100" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(1574925,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(221344183,28);
logexp <= conv_std_logic_vector(1031,11);
WHEN "0110010101" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(1620351,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(246476500,28);
logexp <= conv_std_logic_vector(1031,11);
WHEN "0110010110" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(1665778,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(3173361,28);
logexp <= conv_std_logic_vector(1031,11);
WHEN "0110010111" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(1711204,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(28305678,28);
logexp <= conv_std_logic_vector(1031,11);
WHEN "0110011000" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(1756630,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(53437995,28);
logexp <= conv_std_logic_vector(1031,11);
WHEN "0110011001" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(1802056,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(78570312,28);
logexp <= conv_std_logic_vector(1031,11);
WHEN "0110011010" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(1847482,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(103702629,28);
logexp <= conv_std_logic_vector(1031,11);
WHEN "0110011011" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(1892908,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(128834946,28);
logexp <= conv_std_logic_vector(1031,11);
WHEN "0110011100" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(1938334,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(153967262,28);
logexp <= conv_std_logic_vector(1031,11);
WHEN "0110011101" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(1983760,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(179099579,28);
logexp <= conv_std_logic_vector(1031,11);
WHEN "0110011110" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(2029186,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(204231896,28);
logexp <= conv_std_logic_vector(1031,11);
WHEN "0110011111" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(2074612,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(229364213,28);
logexp <= conv_std_logic_vector(1031,11);
WHEN "0110100000" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(2120038,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(254496530,28);
logexp <= conv_std_logic_vector(1031,11);
WHEN "0110100001" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(2165465,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(11193391,28);
logexp <= conv_std_logic_vector(1031,11);
WHEN "0110100010" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(2210891,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(36325708,28);
logexp <= conv_std_logic_vector(1031,11);
WHEN "0110100011" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(2256317,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(61458025,28);
logexp <= conv_std_logic_vector(1031,11);
WHEN "0110100100" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(2301743,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(86590342,28);
logexp <= conv_std_logic_vector(1031,11);
WHEN "0110100101" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(2347169,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(111722659,28);
logexp <= conv_std_logic_vector(1031,11);
WHEN "0110100110" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(2392595,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(136854976,28);
logexp <= conv_std_logic_vector(1031,11);
WHEN "0110100111" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(2438021,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(161987293,28);
logexp <= conv_std_logic_vector(1031,11);
WHEN "0110101000" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(2483447,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(187119610,28);
logexp <= conv_std_logic_vector(1031,11);
WHEN "0110101001" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(2528873,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(212251927,28);
logexp <= conv_std_logic_vector(1031,11);
WHEN "0110101010" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(2574299,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(237384244,28);
logexp <= conv_std_logic_vector(1031,11);
WHEN "0110101011" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(2619725,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(262516561,28);
logexp <= conv_std_logic_vector(1031,11);
WHEN "0110101100" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(2665152,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(19213422,28);
logexp <= conv_std_logic_vector(1031,11);
WHEN "0110101101" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(2710578,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(44345739,28);
logexp <= conv_std_logic_vector(1031,11);
WHEN "0110101110" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(2756004,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(69478056,28);
logexp <= conv_std_logic_vector(1031,11);
WHEN "0110101111" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(2801430,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(94610373,28);
logexp <= conv_std_logic_vector(1031,11);
WHEN "0110110000" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(2846856,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(119742690,28);
logexp <= conv_std_logic_vector(1031,11);
WHEN "0110110001" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(2892282,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(144875007,28);
logexp <= conv_std_logic_vector(1031,11);
WHEN "0110110010" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(2937708,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(170007324,28);
logexp <= conv_std_logic_vector(1031,11);
WHEN "0110110011" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(2983134,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(195139641,28);
logexp <= conv_std_logic_vector(1031,11);
WHEN "0110110100" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(3028560,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(220271958,28);
logexp <= conv_std_logic_vector(1031,11);
WHEN "0110110101" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(3073986,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(245404275,28);
logexp <= conv_std_logic_vector(1031,11);
WHEN "0110110110" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(3119413,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(2101136,28);
logexp <= conv_std_logic_vector(1031,11);
WHEN "0110110111" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(3164839,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(27233453,28);
logexp <= conv_std_logic_vector(1031,11);
WHEN "0110111000" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(3210265,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(52365770,28);
logexp <= conv_std_logic_vector(1031,11);
WHEN "0110111001" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(3255691,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(77498087,28);
logexp <= conv_std_logic_vector(1031,11);
WHEN "0110111010" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(3301117,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(102630404,28);
logexp <= conv_std_logic_vector(1031,11);
WHEN "0110111011" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(3346543,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(127762720,28);
logexp <= conv_std_logic_vector(1031,11);
WHEN "0110111100" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(3391969,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(152895037,28);
logexp <= conv_std_logic_vector(1031,11);
WHEN "0110111101" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(3437395,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(178027354,28);
logexp <= conv_std_logic_vector(1031,11);
WHEN "0110111110" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(3482821,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(203159671,28);
logexp <= conv_std_logic_vector(1031,11);
WHEN "0110111111" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(3528247,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(228291988,28);
logexp <= conv_std_logic_vector(1031,11);
WHEN "0111000000" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(3573673,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(253424305,28);
logexp <= conv_std_logic_vector(1031,11);
WHEN "0111000001" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(3619100,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(10121166,28);
logexp <= conv_std_logic_vector(1031,11);
WHEN "0111000010" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(3664526,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(35253483,28);
logexp <= conv_std_logic_vector(1031,11);
WHEN "0111000011" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(3709952,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(60385800,28);
logexp <= conv_std_logic_vector(1031,11);
WHEN "0111000100" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(3755378,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(85518117,28);
logexp <= conv_std_logic_vector(1031,11);
WHEN "0111000101" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(3800804,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(110650434,28);
logexp <= conv_std_logic_vector(1031,11);
WHEN "0111000110" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(3846230,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(135782751,28);
logexp <= conv_std_logic_vector(1031,11);
WHEN "0111000111" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(3891656,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(160915068,28);
logexp <= conv_std_logic_vector(1031,11);
WHEN "0111001000" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(3937082,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(186047385,28);
logexp <= conv_std_logic_vector(1031,11);
WHEN "0111001001" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(3982508,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(211179702,28);
logexp <= conv_std_logic_vector(1031,11);
WHEN "0111001010" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(4027934,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(236312019,28);
logexp <= conv_std_logic_vector(1031,11);
WHEN "0111001011" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(4073360,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(261444336,28);
logexp <= conv_std_logic_vector(1031,11);
WHEN "0111001100" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(4118787,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(18141197,28);
logexp <= conv_std_logic_vector(1031,11);
WHEN "0111001101" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(4164213,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(43273514,28);
logexp <= conv_std_logic_vector(1031,11);
WHEN "0111001110" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(4209639,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(68405831,28);
logexp <= conv_std_logic_vector(1031,11);
WHEN "0111001111" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(4255065,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(93538148,28);
logexp <= conv_std_logic_vector(1031,11);
WHEN "0111010000" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(4300491,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(118670465,28);
logexp <= conv_std_logic_vector(1031,11);
WHEN "0111010001" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(4345917,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(143802782,28);
logexp <= conv_std_logic_vector(1031,11);
WHEN "0111010010" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(4391343,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(168935099,28);
logexp <= conv_std_logic_vector(1031,11);
WHEN "0111010011" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(4436769,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(194067416,28);
logexp <= conv_std_logic_vector(1031,11);
WHEN "0111010100" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(4482195,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(219199733,28);
logexp <= conv_std_logic_vector(1031,11);
WHEN "0111010101" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(4527621,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(244332050,28);
logexp <= conv_std_logic_vector(1031,11);
WHEN "0111010110" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(4573048,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(1028911,28);
logexp <= conv_std_logic_vector(1031,11);
WHEN "0111010111" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(4618474,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(26161228,28);
logexp <= conv_std_logic_vector(1031,11);
WHEN "0111011000" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(4663900,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(51293545,28);
logexp <= conv_std_logic_vector(1031,11);
WHEN "0111011001" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(4709326,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(76425861,28);
logexp <= conv_std_logic_vector(1031,11);
WHEN "0111011010" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(4754752,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(101558178,28);
logexp <= conv_std_logic_vector(1031,11);
WHEN "0111011011" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(4800178,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(126690495,28);
logexp <= conv_std_logic_vector(1031,11);
WHEN "0111011100" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(4845604,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(151822812,28);
logexp <= conv_std_logic_vector(1031,11);
WHEN "0111011101" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(4891030,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(176955129,28);
logexp <= conv_std_logic_vector(1031,11);
WHEN "0111011110" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(4936456,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(202087446,28);
logexp <= conv_std_logic_vector(1031,11);
WHEN "0111011111" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(4981882,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(227219763,28);
logexp <= conv_std_logic_vector(1031,11);
WHEN "0111100000" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(5027308,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(252352080,28);
logexp <= conv_std_logic_vector(1031,11);
WHEN "0111100001" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(5072735,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(9048941,28);
logexp <= conv_std_logic_vector(1031,11);
WHEN "0111100010" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(5118161,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(34181258,28);
logexp <= conv_std_logic_vector(1031,11);
WHEN "0111100011" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(5163587,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(59313575,28);
logexp <= conv_std_logic_vector(1031,11);
WHEN "0111100100" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(5209013,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(84445892,28);
logexp <= conv_std_logic_vector(1031,11);
WHEN "0111100101" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(5254439,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(109578209,28);
logexp <= conv_std_logic_vector(1031,11);
WHEN "0111100110" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(5299865,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(134710526,28);
logexp <= conv_std_logic_vector(1031,11);
WHEN "0111100111" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(5345291,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(159842843,28);
logexp <= conv_std_logic_vector(1031,11);
WHEN "0111101000" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(5390717,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(184975160,28);
logexp <= conv_std_logic_vector(1031,11);
WHEN "0111101001" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(5436143,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(210107477,28);
logexp <= conv_std_logic_vector(1031,11);
WHEN "0111101010" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(5481569,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(235239794,28);
logexp <= conv_std_logic_vector(1031,11);
WHEN "0111101011" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(5526995,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(260372111,28);
logexp <= conv_std_logic_vector(1031,11);
WHEN "0111101100" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(5572422,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(17068972,28);
logexp <= conv_std_logic_vector(1031,11);
WHEN "0111101101" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(5617848,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(42201289,28);
logexp <= conv_std_logic_vector(1031,11);
WHEN "0111101110" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(5663274,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(67333606,28);
logexp <= conv_std_logic_vector(1031,11);
WHEN "0111101111" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(5708700,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(92465923,28);
logexp <= conv_std_logic_vector(1031,11);
WHEN "0111110000" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(5754126,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(117598240,28);
logexp <= conv_std_logic_vector(1031,11);
WHEN "0111110001" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(5799552,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(142730557,28);
logexp <= conv_std_logic_vector(1031,11);
WHEN "0111110010" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(5844978,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(167862874,28);
logexp <= conv_std_logic_vector(1031,11);
WHEN "0111110011" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(5890404,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(192995191,28);
logexp <= conv_std_logic_vector(1031,11);
WHEN "0111110100" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(5935830,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(218127508,28);
logexp <= conv_std_logic_vector(1031,11);
WHEN "0111110101" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(5981256,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(243259825,28);
logexp <= conv_std_logic_vector(1031,11);
WHEN "0111110110" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(6026682,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(268392142,28);
logexp <= conv_std_logic_vector(1031,11);
WHEN "0111110111" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(6072109,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(25089003,28);
logexp <= conv_std_logic_vector(1031,11);
WHEN "0111111000" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(6117535,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(50221319,28);
logexp <= conv_std_logic_vector(1031,11);
WHEN "0111111001" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(6162961,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(75353636,28);
logexp <= conv_std_logic_vector(1031,11);
WHEN "0111111010" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(6208387,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(100485953,28);
logexp <= conv_std_logic_vector(1031,11);
WHEN "0111111011" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(6253813,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(125618270,28);
logexp <= conv_std_logic_vector(1031,11);
WHEN "0111111100" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(6299239,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(150750587,28);
logexp <= conv_std_logic_vector(1031,11);
WHEN "0111111101" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(6344665,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(175882904,28);
logexp <= conv_std_logic_vector(1031,11);
WHEN "0111111110" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(6390091,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(201015221,28);
logexp <= conv_std_logic_vector(1031,11);
WHEN "0111111111" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(6435517,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(226147538,28);
logexp <= conv_std_logic_vector(1031,11);
WHEN "1000000000" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(6480943,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(251279855,28);
logexp <= conv_std_logic_vector(1031,11);
WHEN "1000000001" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(6526370,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(7976716,28);
logexp <= conv_std_logic_vector(1031,11);
WHEN "1000000010" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(6571796,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(33109033,28);
logexp <= conv_std_logic_vector(1031,11);
WHEN "1000000011" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(6617222,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(58241350,28);
logexp <= conv_std_logic_vector(1031,11);
WHEN "1000000100" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(6662648,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(83373667,28);
logexp <= conv_std_logic_vector(1031,11);
WHEN "1000000101" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(6708074,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(108505984,28);
logexp <= conv_std_logic_vector(1031,11);
WHEN "1000000110" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(6753500,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(133638301,28);
logexp <= conv_std_logic_vector(1031,11);
WHEN "1000000111" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(6798926,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(158770618,28);
logexp <= conv_std_logic_vector(1031,11);
WHEN "1000001000" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(6844352,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(183902935,28);
logexp <= conv_std_logic_vector(1031,11);
WHEN "1000001001" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(6889778,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(209035252,28);
logexp <= conv_std_logic_vector(1031,11);
WHEN "1000001010" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(6935204,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(234167569,28);
logexp <= conv_std_logic_vector(1031,11);
WHEN "1000001011" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(6980630,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(259299886,28);
logexp <= conv_std_logic_vector(1031,11);
WHEN "1000001100" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(7026057,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(15996747,28);
logexp <= conv_std_logic_vector(1031,11);
WHEN "1000001101" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(7071483,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(41129064,28);
logexp <= conv_std_logic_vector(1031,11);
WHEN "1000001110" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(7116909,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(66261381,28);
logexp <= conv_std_logic_vector(1031,11);
WHEN "1000001111" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(7162335,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(91393698,28);
logexp <= conv_std_logic_vector(1031,11);
WHEN "1000010000" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(7207761,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(116526015,28);
logexp <= conv_std_logic_vector(1031,11);
WHEN "1000010001" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(7253187,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(141658332,28);
logexp <= conv_std_logic_vector(1031,11);
WHEN "1000010010" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(7298613,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(166790649,28);
logexp <= conv_std_logic_vector(1031,11);
WHEN "1000010011" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(7344039,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(191922966,28);
logexp <= conv_std_logic_vector(1031,11);
WHEN "1000010100" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(7389465,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(217055283,28);
logexp <= conv_std_logic_vector(1031,11);
WHEN "1000010101" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(7434891,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(242187600,28);
logexp <= conv_std_logic_vector(1031,11);
WHEN "1000010110" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(7480317,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(267319916,28);
logexp <= conv_std_logic_vector(1031,11);
WHEN "1000010111" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(7525744,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(24016777,28);
logexp <= conv_std_logic_vector(1031,11);
WHEN "1000011000" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(7571170,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(49149094,28);
logexp <= conv_std_logic_vector(1031,11);
WHEN "1000011001" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(7616596,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(74281411,28);
logexp <= conv_std_logic_vector(1031,11);
WHEN "1000011010" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(7662022,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(99413728,28);
logexp <= conv_std_logic_vector(1031,11);
WHEN "1000011011" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(7707448,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(124546045,28);
logexp <= conv_std_logic_vector(1031,11);
WHEN "1000011100" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(7752874,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(149678362,28);
logexp <= conv_std_logic_vector(1031,11);
WHEN "1000011101" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(7798300,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(174810679,28);
logexp <= conv_std_logic_vector(1031,11);
WHEN "1000011110" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(7843726,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(199942996,28);
logexp <= conv_std_logic_vector(1031,11);
WHEN "1000011111" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(7889152,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(225075313,28);
logexp <= conv_std_logic_vector(1031,11);
WHEN "1000100000" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(7934578,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(250207630,28);
logexp <= conv_std_logic_vector(1031,11);
WHEN "1000100001" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(7980005,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(6904491,28);
logexp <= conv_std_logic_vector(1031,11);
WHEN "1000100010" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(8025431,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(32036808,28);
logexp <= conv_std_logic_vector(1031,11);
WHEN "1000100011" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(8070857,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(57169125,28);
logexp <= conv_std_logic_vector(1031,11);
WHEN "1000100100" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(8116283,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(82301442,28);
logexp <= conv_std_logic_vector(1031,11);
WHEN "1000100101" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(8161709,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(107433759,28);
logexp <= conv_std_logic_vector(1031,11);
WHEN "1000100110" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(8207135,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(132566076,28);
logexp <= conv_std_logic_vector(1031,11);
WHEN "1000100111" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(8252561,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(157698393,28);
logexp <= conv_std_logic_vector(1031,11);
WHEN "1000101000" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(8297987,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(182830710,28);
logexp <= conv_std_logic_vector(1031,11);
WHEN "1000101001" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(8343413,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(207963027,28);
logexp <= conv_std_logic_vector(1031,11);
WHEN "1000101010" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(8388839,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(233095344,28);
logexp <= conv_std_logic_vector(1031,11);
WHEN "1000101011" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(8434265,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(258227661,28);
logexp <= conv_std_logic_vector(1031,11);
WHEN "1000101100" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(8479692,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(14924522,28);
logexp <= conv_std_logic_vector(1031,11);
WHEN "1000101101" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(8525118,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(40056839,28);
logexp <= conv_std_logic_vector(1031,11);
WHEN "1000101110" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(8570544,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(65189156,28);
logexp <= conv_std_logic_vector(1031,11);
WHEN "1000101111" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(8615970,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(90321473,28);
logexp <= conv_std_logic_vector(1031,11);
WHEN "1000110000" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(8661396,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(115453790,28);
logexp <= conv_std_logic_vector(1031,11);
WHEN "1000110001" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(8706822,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(140586107,28);
logexp <= conv_std_logic_vector(1031,11);
WHEN "1000110010" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(8752248,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(165718424,28);
logexp <= conv_std_logic_vector(1031,11);
WHEN "1000110011" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(8797674,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(190850741,28);
logexp <= conv_std_logic_vector(1031,11);
WHEN "1000110100" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(8843100,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(215983058,28);
logexp <= conv_std_logic_vector(1031,11);
WHEN "1000110101" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(8888526,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(241115374,28);
logexp <= conv_std_logic_vector(1031,11);
WHEN "1000110110" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(8933952,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(266247691,28);
logexp <= conv_std_logic_vector(1031,11);
WHEN "1000110111" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(8979379,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(22944552,28);
logexp <= conv_std_logic_vector(1031,11);
WHEN "1000111000" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(9024805,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(48076869,28);
logexp <= conv_std_logic_vector(1031,11);
WHEN "1000111001" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(9070231,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(73209186,28);
logexp <= conv_std_logic_vector(1031,11);
WHEN "1000111010" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(9115657,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(98341503,28);
logexp <= conv_std_logic_vector(1031,11);
WHEN "1000111011" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(9161083,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(123473820,28);
logexp <= conv_std_logic_vector(1031,11);
WHEN "1000111100" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(9206509,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(148606137,28);
logexp <= conv_std_logic_vector(1031,11);
WHEN "1000111101" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(9251935,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(173738454,28);
logexp <= conv_std_logic_vector(1031,11);
WHEN "1000111110" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(9297361,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(198870771,28);
logexp <= conv_std_logic_vector(1031,11);
WHEN "1000111111" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(9342787,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(224003088,28);
logexp <= conv_std_logic_vector(1031,11);
WHEN "1001000000" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(9388213,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(249135405,28);
logexp <= conv_std_logic_vector(1031,11);
WHEN "1001000001" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(9433640,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(5832266,28);
logexp <= conv_std_logic_vector(1031,11);
WHEN "1001000010" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(9479066,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(30964583,28);
logexp <= conv_std_logic_vector(1031,11);
WHEN "1001000011" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(9524492,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(56096900,28);
logexp <= conv_std_logic_vector(1031,11);
WHEN "1001000100" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(9569918,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(81229217,28);
logexp <= conv_std_logic_vector(1031,11);
WHEN "1001000101" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(9615344,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(106361534,28);
logexp <= conv_std_logic_vector(1031,11);
WHEN "1001000110" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(9660770,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(131493851,28);
logexp <= conv_std_logic_vector(1031,11);
WHEN "1001000111" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(9706196,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(156626168,28);
logexp <= conv_std_logic_vector(1031,11);
WHEN "1001001000" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(9751622,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(181758485,28);
logexp <= conv_std_logic_vector(1031,11);
WHEN "1001001001" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(9797048,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(206890802,28);
logexp <= conv_std_logic_vector(1031,11);
WHEN "1001001010" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(9842474,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(232023119,28);
logexp <= conv_std_logic_vector(1031,11);
WHEN "1001001011" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(9887900,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(257155436,28);
logexp <= conv_std_logic_vector(1031,11);
WHEN "1001001100" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(9933327,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(13852297,28);
logexp <= conv_std_logic_vector(1031,11);
WHEN "1001001101" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(9978753,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(38984614,28);
logexp <= conv_std_logic_vector(1031,11);
WHEN "1001001110" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(10024179,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(64116931,28);
logexp <= conv_std_logic_vector(1031,11);
WHEN "1001001111" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(10069605,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(89249248,28);
logexp <= conv_std_logic_vector(1031,11);
WHEN "1001010000" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(10115031,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(114381565,28);
logexp <= conv_std_logic_vector(1031,11);
WHEN "1001010001" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(10160457,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(139513882,28);
logexp <= conv_std_logic_vector(1031,11);
WHEN "1001010010" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(10205883,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(164646199,28);
logexp <= conv_std_logic_vector(1031,11);
WHEN "1001010011" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(10251309,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(189778515,28);
logexp <= conv_std_logic_vector(1031,11);
WHEN "1001010100" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(10296735,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(214910832,28);
logexp <= conv_std_logic_vector(1031,11);
WHEN "1001010101" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(10342161,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(240043149,28);
logexp <= conv_std_logic_vector(1031,11);
WHEN "1001010110" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(10387587,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(265175466,28);
logexp <= conv_std_logic_vector(1031,11);
WHEN "1001010111" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(10433014,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(21872327,28);
logexp <= conv_std_logic_vector(1031,11);
WHEN "1001011000" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(10478440,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(47004644,28);
logexp <= conv_std_logic_vector(1031,11);
WHEN "1001011001" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(10523866,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(72136961,28);
logexp <= conv_std_logic_vector(1031,11);
WHEN "1001011010" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(10569292,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(97269278,28);
logexp <= conv_std_logic_vector(1031,11);
WHEN "1001011011" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(10614718,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(122401595,28);
logexp <= conv_std_logic_vector(1031,11);
WHEN "1001011100" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(10660144,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(147533912,28);
logexp <= conv_std_logic_vector(1031,11);
WHEN "1001011101" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(10705570,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(172666229,28);
logexp <= conv_std_logic_vector(1031,11);
WHEN "1001011110" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(10750996,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(197798546,28);
logexp <= conv_std_logic_vector(1031,11);
WHEN "1001011111" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(10796422,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(222930863,28);
logexp <= conv_std_logic_vector(1031,11);
WHEN "1001100000" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(10841848,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(248063180,28);
logexp <= conv_std_logic_vector(1031,11);
WHEN "1001100001" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(10887275,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(4760041,28);
logexp <= conv_std_logic_vector(1031,11);
WHEN "1001100010" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(10932701,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(29892358,28);
logexp <= conv_std_logic_vector(1031,11);
WHEN "1001100011" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(10978127,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(55024675,28);
logexp <= conv_std_logic_vector(1031,11);
WHEN "1001100100" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(11023553,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(80156992,28);
logexp <= conv_std_logic_vector(1031,11);
WHEN "1001100101" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(11068979,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(105289309,28);
logexp <= conv_std_logic_vector(1031,11);
WHEN "1001100110" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(11114405,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(130421626,28);
logexp <= conv_std_logic_vector(1031,11);
WHEN "1001100111" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(11159831,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(155553943,28);
logexp <= conv_std_logic_vector(1031,11);
WHEN "1001101000" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(11205257,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(180686260,28);
logexp <= conv_std_logic_vector(1031,11);
WHEN "1001101001" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(11250683,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(205818577,28);
logexp <= conv_std_logic_vector(1031,11);
WHEN "1001101010" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(11296109,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(230950894,28);
logexp <= conv_std_logic_vector(1031,11);
WHEN "1001101011" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(11341535,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(256083211,28);
logexp <= conv_std_logic_vector(1031,11);
WHEN "1001101100" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(11386962,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(12780072,28);
logexp <= conv_std_logic_vector(1031,11);
WHEN "1001101101" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(11432388,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(37912389,28);
logexp <= conv_std_logic_vector(1031,11);
WHEN "1001101110" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(11477814,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(63044706,28);
logexp <= conv_std_logic_vector(1031,11);
WHEN "1001101111" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(11523240,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(88177023,28);
logexp <= conv_std_logic_vector(1031,11);
WHEN "1001110000" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(11568666,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(113309340,28);
logexp <= conv_std_logic_vector(1031,11);
WHEN "1001110001" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(11614092,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(138441657,28);
logexp <= conv_std_logic_vector(1031,11);
WHEN "1001110010" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(11659518,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(163573973,28);
logexp <= conv_std_logic_vector(1031,11);
WHEN "1001110011" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(11704944,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(188706290,28);
logexp <= conv_std_logic_vector(1031,11);
WHEN "1001110100" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(11750370,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(213838607,28);
logexp <= conv_std_logic_vector(1031,11);
WHEN "1001110101" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(11795796,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(238970924,28);
logexp <= conv_std_logic_vector(1031,11);
WHEN "1001110110" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(11841222,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(264103241,28);
logexp <= conv_std_logic_vector(1031,11);
WHEN "1001110111" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(11886649,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(20800102,28);
logexp <= conv_std_logic_vector(1031,11);
WHEN "1001111000" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(11932075,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(45932419,28);
logexp <= conv_std_logic_vector(1031,11);
WHEN "1001111001" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(11977501,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(71064736,28);
logexp <= conv_std_logic_vector(1031,11);
WHEN "1001111010" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(12022927,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(96197053,28);
logexp <= conv_std_logic_vector(1031,11);
WHEN "1001111011" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(12068353,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(121329370,28);
logexp <= conv_std_logic_vector(1031,11);
WHEN "1001111100" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(12113779,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(146461687,28);
logexp <= conv_std_logic_vector(1031,11);
WHEN "1001111101" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(12159205,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(171594004,28);
logexp <= conv_std_logic_vector(1031,11);
WHEN "1001111110" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(12204631,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(196726321,28);
logexp <= conv_std_logic_vector(1031,11);
WHEN "1001111111" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(12250057,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(221858638,28);
logexp <= conv_std_logic_vector(1031,11);
WHEN "1010000000" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(12295483,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(246990955,28);
logexp <= conv_std_logic_vector(1031,11);
WHEN "1010000001" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(12340910,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(3687816,28);
logexp <= conv_std_logic_vector(1031,11);
WHEN "1010000010" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(12386336,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(28820133,28);
logexp <= conv_std_logic_vector(1031,11);
WHEN "1010000011" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(12431762,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(53952450,28);
logexp <= conv_std_logic_vector(1031,11);
WHEN "1010000100" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(12477188,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(79084767,28);
logexp <= conv_std_logic_vector(1031,11);
WHEN "1010000101" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(12522614,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(104217084,28);
logexp <= conv_std_logic_vector(1031,11);
WHEN "1010000110" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(12568040,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(129349401,28);
logexp <= conv_std_logic_vector(1031,11);
WHEN "1010000111" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(12613466,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(154481718,28);
logexp <= conv_std_logic_vector(1031,11);
WHEN "1010001000" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(12658892,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(179614035,28);
logexp <= conv_std_logic_vector(1031,11);
WHEN "1010001001" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(12704318,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(204746352,28);
logexp <= conv_std_logic_vector(1031,11);
WHEN "1010001010" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(12749744,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(229878669,28);
logexp <= conv_std_logic_vector(1031,11);
WHEN "1010001011" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(12795170,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(255010986,28);
logexp <= conv_std_logic_vector(1031,11);
WHEN "1010001100" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(12840597,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(11707847,28);
logexp <= conv_std_logic_vector(1031,11);
WHEN "1010001101" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(12886023,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(36840164,28);
logexp <= conv_std_logic_vector(1031,11);
WHEN "1010001110" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(12931449,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(61972481,28);
logexp <= conv_std_logic_vector(1031,11);
WHEN "1010001111" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(12976875,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(87104798,28);
logexp <= conv_std_logic_vector(1031,11);
WHEN "1010010000" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(13022301,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(112237114,28);
logexp <= conv_std_logic_vector(1031,11);
WHEN "1010010001" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(13067727,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(137369431,28);
logexp <= conv_std_logic_vector(1031,11);
WHEN "1010010010" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(13113153,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(162501748,28);
logexp <= conv_std_logic_vector(1031,11);
WHEN "1010010011" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(13158579,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(187634065,28);
logexp <= conv_std_logic_vector(1031,11);
WHEN "1010010100" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(13204005,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(212766382,28);
logexp <= conv_std_logic_vector(1031,11);
WHEN "1010010101" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(13249431,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(237898699,28);
logexp <= conv_std_logic_vector(1031,11);
WHEN "1010010110" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(13294857,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(263031016,28);
logexp <= conv_std_logic_vector(1031,11);
WHEN "1010010111" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(13340284,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(19727877,28);
logexp <= conv_std_logic_vector(1031,11);
WHEN "1010011000" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(13385710,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(44860194,28);
logexp <= conv_std_logic_vector(1031,11);
WHEN "1010011001" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(13431136,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(69992511,28);
logexp <= conv_std_logic_vector(1031,11);
WHEN "1010011010" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(13476562,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(95124828,28);
logexp <= conv_std_logic_vector(1031,11);
WHEN "1010011011" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(13521988,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(120257145,28);
logexp <= conv_std_logic_vector(1031,11);
WHEN "1010011100" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(13567414,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(145389462,28);
logexp <= conv_std_logic_vector(1031,11);
WHEN "1010011101" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(13612840,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(170521779,28);
logexp <= conv_std_logic_vector(1031,11);
WHEN "1010011110" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(13658266,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(195654096,28);
logexp <= conv_std_logic_vector(1031,11);
WHEN "1010011111" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(13703692,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(220786413,28);
logexp <= conv_std_logic_vector(1031,11);
WHEN "1010100000" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(13749118,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(245918730,28);
logexp <= conv_std_logic_vector(1031,11);
WHEN "1010100001" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(13794545,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(2615591,28);
logexp <= conv_std_logic_vector(1031,11);
WHEN "1010100010" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(13839971,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(27747908,28);
logexp <= conv_std_logic_vector(1031,11);
WHEN "1010100011" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(13885397,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(52880225,28);
logexp <= conv_std_logic_vector(1031,11);
WHEN "1010100100" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(13930823,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(78012542,28);
logexp <= conv_std_logic_vector(1031,11);
WHEN "1010100101" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(13976249,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(103144859,28);
logexp <= conv_std_logic_vector(1031,11);
WHEN "1010100110" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(14021675,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(128277176,28);
logexp <= conv_std_logic_vector(1031,11);
WHEN "1010100111" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(14067101,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(153409493,28);
logexp <= conv_std_logic_vector(1031,11);
WHEN "1010101000" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(14112527,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(178541810,28);
logexp <= conv_std_logic_vector(1031,11);
WHEN "1010101001" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(14157953,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(203674127,28);
logexp <= conv_std_logic_vector(1031,11);
WHEN "1010101010" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(14203379,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(228806444,28);
logexp <= conv_std_logic_vector(1031,11);
WHEN "1010101011" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(14248805,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(253938761,28);
logexp <= conv_std_logic_vector(1031,11);
WHEN "1010101100" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(14294232,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(10635622,28);
logexp <= conv_std_logic_vector(1031,11);
WHEN "1010101101" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(14339658,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(35767939,28);
logexp <= conv_std_logic_vector(1031,11);
WHEN "1010101110" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(14385084,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(60900256,28);
logexp <= conv_std_logic_vector(1031,11);
WHEN "1010101111" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(14430510,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(86032572,28);
logexp <= conv_std_logic_vector(1031,11);
WHEN "1010110000" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(14475936,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(111164889,28);
logexp <= conv_std_logic_vector(1031,11);
WHEN "1010110001" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(14521362,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(136297206,28);
logexp <= conv_std_logic_vector(1031,11);
WHEN "1010110010" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(14566788,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(161429523,28);
logexp <= conv_std_logic_vector(1031,11);
WHEN "1010110011" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(14612214,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(186561840,28);
logexp <= conv_std_logic_vector(1031,11);
WHEN "1010110100" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(14657640,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(211694157,28);
logexp <= conv_std_logic_vector(1031,11);
WHEN "1010110101" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(14703066,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(236826474,28);
logexp <= conv_std_logic_vector(1031,11);
WHEN "1010110110" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(14748492,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(261958791,28);
logexp <= conv_std_logic_vector(1031,11);
WHEN "1010110111" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(14793919,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(18655652,28);
logexp <= conv_std_logic_vector(1031,11);
WHEN "1010111000" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(14839345,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(43787969,28);
logexp <= conv_std_logic_vector(1031,11);
WHEN "1010111001" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(14884771,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(68920286,28);
logexp <= conv_std_logic_vector(1031,11);
WHEN "1010111010" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(14930197,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(94052603,28);
logexp <= conv_std_logic_vector(1031,11);
WHEN "1010111011" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(14975623,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(119184920,28);
logexp <= conv_std_logic_vector(1031,11);
WHEN "1010111100" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(15021049,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(144317237,28);
logexp <= conv_std_logic_vector(1031,11);
WHEN "1010111101" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(15066475,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(169449554,28);
logexp <= conv_std_logic_vector(1031,11);
WHEN "1010111110" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(15111901,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(194581871,28);
logexp <= conv_std_logic_vector(1031,11);
WHEN "1010111111" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(15157327,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(219714188,28);
logexp <= conv_std_logic_vector(1031,11);
WHEN "1011000000" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(15202753,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(244846505,28);
logexp <= conv_std_logic_vector(1031,11);
WHEN "1011000001" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(15248180,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(1543366,28);
logexp <= conv_std_logic_vector(1031,11);
WHEN "1011000010" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(15293606,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(26675683,28);
logexp <= conv_std_logic_vector(1031,11);
WHEN "1011000011" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(15339032,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(51808000,28);
logexp <= conv_std_logic_vector(1031,11);
WHEN "1011000100" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(15384458,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(76940317,28);
logexp <= conv_std_logic_vector(1031,11);
WHEN "1011000101" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(15429884,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(102072634,28);
logexp <= conv_std_logic_vector(1031,11);
WHEN "1011000110" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(15475310,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(127204951,28);
logexp <= conv_std_logic_vector(1031,11);
WHEN "1011000111" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(15520736,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(152337268,28);
logexp <= conv_std_logic_vector(1031,11);
WHEN "1011001000" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(15566162,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(177469585,28);
logexp <= conv_std_logic_vector(1031,11);
WHEN "1011001001" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(15611588,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(202601902,28);
logexp <= conv_std_logic_vector(1031,11);
WHEN "1011001010" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(15657014,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(227734219,28);
logexp <= conv_std_logic_vector(1031,11);
WHEN "1011001011" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(15702440,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(252866536,28);
logexp <= conv_std_logic_vector(1031,11);
WHEN "1011001100" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(15747867,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(9563397,28);
logexp <= conv_std_logic_vector(1031,11);
WHEN "1011001101" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(15793293,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(34695713,28);
logexp <= conv_std_logic_vector(1031,11);
WHEN "1011001110" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(15838719,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(59828030,28);
logexp <= conv_std_logic_vector(1031,11);
WHEN "1011001111" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(15884145,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(84960347,28);
logexp <= conv_std_logic_vector(1031,11);
WHEN "1011010000" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(15929571,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(110092664,28);
logexp <= conv_std_logic_vector(1031,11);
WHEN "1011010001" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(15974997,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(135224981,28);
logexp <= conv_std_logic_vector(1031,11);
WHEN "1011010010" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(16020423,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(160357298,28);
logexp <= conv_std_logic_vector(1031,11);
WHEN "1011010011" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(16065849,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(185489615,28);
logexp <= conv_std_logic_vector(1031,11);
WHEN "1011010100" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(16111275,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(210621932,28);
logexp <= conv_std_logic_vector(1031,11);
WHEN "1011010101" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(16156701,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(235754249,28);
logexp <= conv_std_logic_vector(1031,11);
WHEN "1011010110" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(16202127,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(260886566,28);
logexp <= conv_std_logic_vector(1031,11);
WHEN "1011010111" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(16247554,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(17583427,28);
logexp <= conv_std_logic_vector(1031,11);
WHEN "1011011000" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(16292980,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(42715744,28);
logexp <= conv_std_logic_vector(1031,11);
WHEN "1011011001" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(16338406,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(67848061,28);
logexp <= conv_std_logic_vector(1031,11);
WHEN "1011011010" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(16383832,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(92980378,28);
logexp <= conv_std_logic_vector(1031,11);
WHEN "1011011011" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(16429258,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(118112695,28);
logexp <= conv_std_logic_vector(1031,11);
WHEN "1011011100" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(16474684,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(143245012,28);
logexp <= conv_std_logic_vector(1031,11);
WHEN "1011011101" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(16520110,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(168377329,28);
logexp <= conv_std_logic_vector(1031,11);
WHEN "1011011110" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(16565536,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(193509646,28);
logexp <= conv_std_logic_vector(1031,11);
WHEN "1011011111" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(16610962,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(218641963,28);
logexp <= conv_std_logic_vector(1031,11);
WHEN "1011100000" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(16656388,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(243774280,28);
logexp <= conv_std_logic_vector(1031,11);
WHEN "1011100001" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(16701815,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(471141,28);
logexp <= conv_std_logic_vector(1031,11);
WHEN "1011100010" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(16747241,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(25603458,28);
logexp <= conv_std_logic_vector(1031,11);
WHEN "1011100011" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(7725,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(159585615,28);
logexp <= conv_std_logic_vector(1032,11);
WHEN "1011100100" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(30438,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(172151774,28);
logexp <= conv_std_logic_vector(1032,11);
WHEN "1011100101" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(53151,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(184717932,28);
logexp <= conv_std_logic_vector(1032,11);
WHEN "1011100110" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(75864,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(197284091,28);
logexp <= conv_std_logic_vector(1032,11);
WHEN "1011100111" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(98577,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(209850249,28);
logexp <= conv_std_logic_vector(1032,11);
WHEN "1011101000" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(121290,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(222416408,28);
logexp <= conv_std_logic_vector(1032,11);
WHEN "1011101001" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(144003,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(234982566,28);
logexp <= conv_std_logic_vector(1032,11);
WHEN "1011101010" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(166716,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(247548725,28);
logexp <= conv_std_logic_vector(1032,11);
WHEN "1011101011" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(189429,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(260114883,28);
logexp <= conv_std_logic_vector(1032,11);
WHEN "1011101100" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(212143,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(4245586,28);
logexp <= conv_std_logic_vector(1032,11);
WHEN "1011101101" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(234856,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(16811744,28);
logexp <= conv_std_logic_vector(1032,11);
WHEN "1011101110" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(257569,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(29377903,28);
logexp <= conv_std_logic_vector(1032,11);
WHEN "1011101111" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(280282,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(41944061,28);
logexp <= conv_std_logic_vector(1032,11);
WHEN "1011110000" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(302995,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(54510220,28);
logexp <= conv_std_logic_vector(1032,11);
WHEN "1011110001" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(325708,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(67076378,28);
logexp <= conv_std_logic_vector(1032,11);
WHEN "1011110010" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(348421,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(79642537,28);
logexp <= conv_std_logic_vector(1032,11);
WHEN "1011110011" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(371134,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(92208695,28);
logexp <= conv_std_logic_vector(1032,11);
WHEN "1011110100" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(393847,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(104774854,28);
logexp <= conv_std_logic_vector(1032,11);
WHEN "1011110101" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(416560,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(117341012,28);
logexp <= conv_std_logic_vector(1032,11);
WHEN "1011110110" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(439273,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(129907171,28);
logexp <= conv_std_logic_vector(1032,11);
WHEN "1011110111" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(461986,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(142473329,28);
logexp <= conv_std_logic_vector(1032,11);
WHEN "1011111000" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(484699,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(155039488,28);
logexp <= conv_std_logic_vector(1032,11);
WHEN "1011111001" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(507412,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(167605646,28);
logexp <= conv_std_logic_vector(1032,11);
WHEN "1011111010" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(530125,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(180171805,28);
logexp <= conv_std_logic_vector(1032,11);
WHEN "1011111011" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(552838,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(192737963,28);
logexp <= conv_std_logic_vector(1032,11);
WHEN "1011111100" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(575551,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(205304121,28);
logexp <= conv_std_logic_vector(1032,11);
WHEN "1011111101" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(598264,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(217870280,28);
logexp <= conv_std_logic_vector(1032,11);
WHEN "1011111110" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(620977,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(230436438,28);
logexp <= conv_std_logic_vector(1032,11);
WHEN "1011111111" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(643690,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(243002597,28);
logexp <= conv_std_logic_vector(1032,11);
WHEN "1100000000" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(666403,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(255568755,28);
logexp <= conv_std_logic_vector(1032,11);
WHEN "1100000001" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(689116,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(268134914,28);
logexp <= conv_std_logic_vector(1032,11);
WHEN "1100000010" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(711830,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(12265616,28);
logexp <= conv_std_logic_vector(1032,11);
WHEN "1100000011" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(734543,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(24831775,28);
logexp <= conv_std_logic_vector(1032,11);
WHEN "1100000100" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(757256,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(37397933,28);
logexp <= conv_std_logic_vector(1032,11);
WHEN "1100000101" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(779969,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(49964092,28);
logexp <= conv_std_logic_vector(1032,11);
WHEN "1100000110" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(802682,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(62530250,28);
logexp <= conv_std_logic_vector(1032,11);
WHEN "1100000111" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(825395,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(75096409,28);
logexp <= conv_std_logic_vector(1032,11);
WHEN "1100001000" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(848108,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(87662567,28);
logexp <= conv_std_logic_vector(1032,11);
WHEN "1100001001" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(870821,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(100228726,28);
logexp <= conv_std_logic_vector(1032,11);
WHEN "1100001010" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(893534,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(112794884,28);
logexp <= conv_std_logic_vector(1032,11);
WHEN "1100001011" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(916247,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(125361043,28);
logexp <= conv_std_logic_vector(1032,11);
WHEN "1100001100" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(938960,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(137927201,28);
logexp <= conv_std_logic_vector(1032,11);
WHEN "1100001101" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(961673,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(150493360,28);
logexp <= conv_std_logic_vector(1032,11);
WHEN "1100001110" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(984386,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(163059518,28);
logexp <= conv_std_logic_vector(1032,11);
WHEN "1100001111" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(1007099,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(175625677,28);
logexp <= conv_std_logic_vector(1032,11);
WHEN "1100010000" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(1029812,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(188191835,28);
logexp <= conv_std_logic_vector(1032,11);
WHEN "1100010001" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(1052525,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(200757994,28);
logexp <= conv_std_logic_vector(1032,11);
WHEN "1100010010" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(1075238,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(213324152,28);
logexp <= conv_std_logic_vector(1032,11);
WHEN "1100010011" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(1097951,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(225890311,28);
logexp <= conv_std_logic_vector(1032,11);
WHEN "1100010100" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(1120664,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(238456469,28);
logexp <= conv_std_logic_vector(1032,11);
WHEN "1100010101" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(1143377,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(251022628,28);
logexp <= conv_std_logic_vector(1032,11);
WHEN "1100010110" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(1166090,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(263588786,28);
logexp <= conv_std_logic_vector(1032,11);
WHEN "1100010111" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(1188804,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(7719489,28);
logexp <= conv_std_logic_vector(1032,11);
WHEN "1100011000" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(1211517,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(20285647,28);
logexp <= conv_std_logic_vector(1032,11);
WHEN "1100011001" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(1234230,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(32851805,28);
logexp <= conv_std_logic_vector(1032,11);
WHEN "1100011010" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(1256943,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(45417964,28);
logexp <= conv_std_logic_vector(1032,11);
WHEN "1100011011" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(1279656,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(57984122,28);
logexp <= conv_std_logic_vector(1032,11);
WHEN "1100011100" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(1302369,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(70550281,28);
logexp <= conv_std_logic_vector(1032,11);
WHEN "1100011101" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(1325082,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(83116439,28);
logexp <= conv_std_logic_vector(1032,11);
WHEN "1100011110" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(1347795,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(95682598,28);
logexp <= conv_std_logic_vector(1032,11);
WHEN "1100011111" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(1370508,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(108248756,28);
logexp <= conv_std_logic_vector(1032,11);
WHEN "1100100000" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(1393221,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(120814915,28);
logexp <= conv_std_logic_vector(1032,11);
WHEN "1100100001" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(1415934,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(133381073,28);
logexp <= conv_std_logic_vector(1032,11);
WHEN "1100100010" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(1438647,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(145947232,28);
logexp <= conv_std_logic_vector(1032,11);
WHEN "1100100011" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(1461360,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(158513390,28);
logexp <= conv_std_logic_vector(1032,11);
WHEN "1100100100" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(1484073,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(171079549,28);
logexp <= conv_std_logic_vector(1032,11);
WHEN "1100100101" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(1506786,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(183645707,28);
logexp <= conv_std_logic_vector(1032,11);
WHEN "1100100110" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(1529499,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(196211866,28);
logexp <= conv_std_logic_vector(1032,11);
WHEN "1100100111" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(1552212,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(208778024,28);
logexp <= conv_std_logic_vector(1032,11);
WHEN "1100101000" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(1574925,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(221344183,28);
logexp <= conv_std_logic_vector(1032,11);
WHEN "1100101001" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(1597638,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(233910341,28);
logexp <= conv_std_logic_vector(1032,11);
WHEN "1100101010" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(1620351,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(246476500,28);
logexp <= conv_std_logic_vector(1032,11);
WHEN "1100101011" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(1643064,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(259042658,28);
logexp <= conv_std_logic_vector(1032,11);
WHEN "1100101100" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(1665778,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(3173361,28);
logexp <= conv_std_logic_vector(1032,11);
WHEN "1100101101" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(1688491,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(15739519,28);
logexp <= conv_std_logic_vector(1032,11);
WHEN "1100101110" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(1711204,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(28305678,28);
logexp <= conv_std_logic_vector(1032,11);
WHEN "1100101111" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(1733917,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(40871836,28);
logexp <= conv_std_logic_vector(1032,11);
WHEN "1100110000" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(1756630,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(53437995,28);
logexp <= conv_std_logic_vector(1032,11);
WHEN "1100110001" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(1779343,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(66004153,28);
logexp <= conv_std_logic_vector(1032,11);
WHEN "1100110010" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(1802056,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(78570312,28);
logexp <= conv_std_logic_vector(1032,11);
WHEN "1100110011" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(1824769,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(91136470,28);
logexp <= conv_std_logic_vector(1032,11);
WHEN "1100110100" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(1847482,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(103702629,28);
logexp <= conv_std_logic_vector(1032,11);
WHEN "1100110101" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(1870195,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(116268787,28);
logexp <= conv_std_logic_vector(1032,11);
WHEN "1100110110" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(1892908,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(128834946,28);
logexp <= conv_std_logic_vector(1032,11);
WHEN "1100110111" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(1915621,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(141401104,28);
logexp <= conv_std_logic_vector(1032,11);
WHEN "1100111000" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(1938334,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(153967262,28);
logexp <= conv_std_logic_vector(1032,11);
WHEN "1100111001" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(1961047,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(166533421,28);
logexp <= conv_std_logic_vector(1032,11);
WHEN "1100111010" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(1983760,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(179099579,28);
logexp <= conv_std_logic_vector(1032,11);
WHEN "1100111011" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(2006473,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(191665738,28);
logexp <= conv_std_logic_vector(1032,11);
WHEN "1100111100" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(2029186,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(204231896,28);
logexp <= conv_std_logic_vector(1032,11);
WHEN "1100111101" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(2051899,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(216798055,28);
logexp <= conv_std_logic_vector(1032,11);
WHEN "1100111110" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(2074612,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(229364213,28);
logexp <= conv_std_logic_vector(1032,11);
WHEN "1100111111" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(2097325,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(241930372,28);
logexp <= conv_std_logic_vector(1032,11);
WHEN "1101000000" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(2120038,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(254496530,28);
logexp <= conv_std_logic_vector(1032,11);
WHEN "1101000001" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(2142751,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(267062689,28);
logexp <= conv_std_logic_vector(1032,11);
WHEN "1101000010" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(2165465,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(11193391,28);
logexp <= conv_std_logic_vector(1032,11);
WHEN "1101000011" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(2188178,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(23759550,28);
logexp <= conv_std_logic_vector(1032,11);
WHEN "1101000100" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(2210891,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(36325708,28);
logexp <= conv_std_logic_vector(1032,11);
WHEN "1101000101" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(2233604,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(48891867,28);
logexp <= conv_std_logic_vector(1032,11);
WHEN "1101000110" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(2256317,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(61458025,28);
logexp <= conv_std_logic_vector(1032,11);
WHEN "1101000111" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(2279030,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(74024184,28);
logexp <= conv_std_logic_vector(1032,11);
WHEN "1101001000" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(2301743,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(86590342,28);
logexp <= conv_std_logic_vector(1032,11);
WHEN "1101001001" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(2324456,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(99156501,28);
logexp <= conv_std_logic_vector(1032,11);
WHEN "1101001010" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(2347169,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(111722659,28);
logexp <= conv_std_logic_vector(1032,11);
WHEN "1101001011" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(2369882,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(124288818,28);
logexp <= conv_std_logic_vector(1032,11);
WHEN "1101001100" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(2392595,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(136854976,28);
logexp <= conv_std_logic_vector(1032,11);
WHEN "1101001101" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(2415308,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(149421135,28);
logexp <= conv_std_logic_vector(1032,11);
WHEN "1101001110" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(2438021,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(161987293,28);
logexp <= conv_std_logic_vector(1032,11);
WHEN "1101001111" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(2460734,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(174553452,28);
logexp <= conv_std_logic_vector(1032,11);
WHEN "1101010000" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(2483447,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(187119610,28);
logexp <= conv_std_logic_vector(1032,11);
WHEN "1101010001" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(2506160,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(199685769,28);
logexp <= conv_std_logic_vector(1032,11);
WHEN "1101010010" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(2528873,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(212251927,28);
logexp <= conv_std_logic_vector(1032,11);
WHEN "1101010011" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(2551586,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(224818086,28);
logexp <= conv_std_logic_vector(1032,11);
WHEN "1101010100" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(2574299,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(237384244,28);
logexp <= conv_std_logic_vector(1032,11);
WHEN "1101010101" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(2597012,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(249950403,28);
logexp <= conv_std_logic_vector(1032,11);
WHEN "1101010110" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(2619725,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(262516561,28);
logexp <= conv_std_logic_vector(1032,11);
WHEN "1101010111" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(2642439,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(6647263,28);
logexp <= conv_std_logic_vector(1032,11);
WHEN "1101011000" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(2665152,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(19213422,28);
logexp <= conv_std_logic_vector(1032,11);
WHEN "1101011001" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(2687865,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(31779580,28);
logexp <= conv_std_logic_vector(1032,11);
WHEN "1101011010" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(2710578,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(44345739,28);
logexp <= conv_std_logic_vector(1032,11);
WHEN "1101011011" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(2733291,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(56911897,28);
logexp <= conv_std_logic_vector(1032,11);
WHEN "1101011100" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(2756004,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(69478056,28);
logexp <= conv_std_logic_vector(1032,11);
WHEN "1101011101" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(2778717,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(82044214,28);
logexp <= conv_std_logic_vector(1032,11);
WHEN "1101011110" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(2801430,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(94610373,28);
logexp <= conv_std_logic_vector(1032,11);
WHEN "1101011111" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(2824143,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(107176531,28);
logexp <= conv_std_logic_vector(1032,11);
WHEN "1101100000" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(2846856,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(119742690,28);
logexp <= conv_std_logic_vector(1032,11);
WHEN "1101100001" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(2869569,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(132308848,28);
logexp <= conv_std_logic_vector(1032,11);
WHEN "1101100010" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(2892282,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(144875007,28);
logexp <= conv_std_logic_vector(1032,11);
WHEN "1101100011" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(2914995,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(157441165,28);
logexp <= conv_std_logic_vector(1032,11);
WHEN "1101100100" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(2937708,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(170007324,28);
logexp <= conv_std_logic_vector(1032,11);
WHEN "1101100101" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(2960421,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(182573482,28);
logexp <= conv_std_logic_vector(1032,11);
WHEN "1101100110" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(2983134,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(195139641,28);
logexp <= conv_std_logic_vector(1032,11);
WHEN "1101100111" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(3005847,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(207705799,28);
logexp <= conv_std_logic_vector(1032,11);
WHEN "1101101000" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(3028560,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(220271958,28);
logexp <= conv_std_logic_vector(1032,11);
WHEN "1101101001" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(3051273,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(232838116,28);
logexp <= conv_std_logic_vector(1032,11);
WHEN "1101101010" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(3073986,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(245404275,28);
logexp <= conv_std_logic_vector(1032,11);
WHEN "1101101011" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(3096699,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(257970433,28);
logexp <= conv_std_logic_vector(1032,11);
WHEN "1101101100" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(3119413,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(2101136,28);
logexp <= conv_std_logic_vector(1032,11);
WHEN "1101101101" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(3142126,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(14667294,28);
logexp <= conv_std_logic_vector(1032,11);
WHEN "1101101110" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(3164839,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(27233453,28);
logexp <= conv_std_logic_vector(1032,11);
WHEN "1101101111" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(3187552,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(39799611,28);
logexp <= conv_std_logic_vector(1032,11);
WHEN "1101110000" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(3210265,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(52365770,28);
logexp <= conv_std_logic_vector(1032,11);
WHEN "1101110001" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(3232978,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(64931928,28);
logexp <= conv_std_logic_vector(1032,11);
WHEN "1101110010" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(3255691,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(77498087,28);
logexp <= conv_std_logic_vector(1032,11);
WHEN "1101110011" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(3278404,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(90064245,28);
logexp <= conv_std_logic_vector(1032,11);
WHEN "1101110100" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(3301117,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(102630404,28);
logexp <= conv_std_logic_vector(1032,11);
WHEN "1101110101" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(3323830,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(115196562,28);
logexp <= conv_std_logic_vector(1032,11);
WHEN "1101110110" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(3346543,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(127762720,28);
logexp <= conv_std_logic_vector(1032,11);
WHEN "1101110111" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(3369256,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(140328879,28);
logexp <= conv_std_logic_vector(1032,11);
WHEN "1101111000" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(3391969,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(152895037,28);
logexp <= conv_std_logic_vector(1032,11);
WHEN "1101111001" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(3414682,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(165461196,28);
logexp <= conv_std_logic_vector(1032,11);
WHEN "1101111010" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(3437395,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(178027354,28);
logexp <= conv_std_logic_vector(1032,11);
WHEN "1101111011" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(3460108,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(190593513,28);
logexp <= conv_std_logic_vector(1032,11);
WHEN "1101111100" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(3482821,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(203159671,28);
logexp <= conv_std_logic_vector(1032,11);
WHEN "1101111101" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(3505534,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(215725830,28);
logexp <= conv_std_logic_vector(1032,11);
WHEN "1101111110" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(3528247,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(228291988,28);
logexp <= conv_std_logic_vector(1032,11);
WHEN "1101111111" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(3550960,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(240858147,28);
logexp <= conv_std_logic_vector(1032,11);
WHEN "1110000000" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(3573673,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(253424305,28);
logexp <= conv_std_logic_vector(1032,11);
WHEN "1110000001" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(3596386,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(265990464,28);
logexp <= conv_std_logic_vector(1032,11);
WHEN "1110000010" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(3619100,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(10121166,28);
logexp <= conv_std_logic_vector(1032,11);
WHEN "1110000011" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(3641813,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(22687325,28);
logexp <= conv_std_logic_vector(1032,11);
WHEN "1110000100" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(3664526,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(35253483,28);
logexp <= conv_std_logic_vector(1032,11);
WHEN "1110000101" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(3687239,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(47819642,28);
logexp <= conv_std_logic_vector(1032,11);
WHEN "1110000110" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(3709952,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(60385800,28);
logexp <= conv_std_logic_vector(1032,11);
WHEN "1110000111" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(3732665,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(72951959,28);
logexp <= conv_std_logic_vector(1032,11);
WHEN "1110001000" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(3755378,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(85518117,28);
logexp <= conv_std_logic_vector(1032,11);
WHEN "1110001001" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(3778091,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(98084276,28);
logexp <= conv_std_logic_vector(1032,11);
WHEN "1110001010" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(3800804,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(110650434,28);
logexp <= conv_std_logic_vector(1032,11);
WHEN "1110001011" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(3823517,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(123216593,28);
logexp <= conv_std_logic_vector(1032,11);
WHEN "1110001100" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(3846230,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(135782751,28);
logexp <= conv_std_logic_vector(1032,11);
WHEN "1110001101" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(3868943,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(148348910,28);
logexp <= conv_std_logic_vector(1032,11);
WHEN "1110001110" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(3891656,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(160915068,28);
logexp <= conv_std_logic_vector(1032,11);
WHEN "1110001111" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(3914369,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(173481227,28);
logexp <= conv_std_logic_vector(1032,11);
WHEN "1110010000" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(3937082,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(186047385,28);
logexp <= conv_std_logic_vector(1032,11);
WHEN "1110010001" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(3959795,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(198613544,28);
logexp <= conv_std_logic_vector(1032,11);
WHEN "1110010010" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(3982508,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(211179702,28);
logexp <= conv_std_logic_vector(1032,11);
WHEN "1110010011" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(4005221,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(223745860,28);
logexp <= conv_std_logic_vector(1032,11);
WHEN "1110010100" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(4027934,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(236312019,28);
logexp <= conv_std_logic_vector(1032,11);
WHEN "1110010101" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(4050647,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(248878177,28);
logexp <= conv_std_logic_vector(1032,11);
WHEN "1110010110" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(4073360,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(261444336,28);
logexp <= conv_std_logic_vector(1032,11);
WHEN "1110010111" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(4096074,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(5575038,28);
logexp <= conv_std_logic_vector(1032,11);
WHEN "1110011000" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(4118787,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(18141197,28);
logexp <= conv_std_logic_vector(1032,11);
WHEN "1110011001" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(4141500,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(30707355,28);
logexp <= conv_std_logic_vector(1032,11);
WHEN "1110011010" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(4164213,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(43273514,28);
logexp <= conv_std_logic_vector(1032,11);
WHEN "1110011011" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(4186926,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(55839672,28);
logexp <= conv_std_logic_vector(1032,11);
WHEN "1110011100" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(4209639,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(68405831,28);
logexp <= conv_std_logic_vector(1032,11);
WHEN "1110011101" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(4232352,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(80971989,28);
logexp <= conv_std_logic_vector(1032,11);
WHEN "1110011110" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(4255065,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(93538148,28);
logexp <= conv_std_logic_vector(1032,11);
WHEN "1110011111" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(4277778,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(106104306,28);
logexp <= conv_std_logic_vector(1032,11);
WHEN "1110100000" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(4300491,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(118670465,28);
logexp <= conv_std_logic_vector(1032,11);
WHEN "1110100001" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(4323204,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(131236623,28);
logexp <= conv_std_logic_vector(1032,11);
WHEN "1110100010" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(4345917,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(143802782,28);
logexp <= conv_std_logic_vector(1032,11);
WHEN "1110100011" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(4368630,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(156368940,28);
logexp <= conv_std_logic_vector(1032,11);
WHEN "1110100100" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(4391343,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(168935099,28);
logexp <= conv_std_logic_vector(1032,11);
WHEN "1110100101" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(4414056,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(181501257,28);
logexp <= conv_std_logic_vector(1032,11);
WHEN "1110100110" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(4436769,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(194067416,28);
logexp <= conv_std_logic_vector(1032,11);
WHEN "1110100111" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(4459482,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(206633574,28);
logexp <= conv_std_logic_vector(1032,11);
WHEN "1110101000" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(4482195,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(219199733,28);
logexp <= conv_std_logic_vector(1032,11);
WHEN "1110101001" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(4504908,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(231765891,28);
logexp <= conv_std_logic_vector(1032,11);
WHEN "1110101010" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(4527621,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(244332050,28);
logexp <= conv_std_logic_vector(1032,11);
WHEN "1110101011" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(4550334,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(256898208,28);
logexp <= conv_std_logic_vector(1032,11);
WHEN "1110101100" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(4573048,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(1028911,28);
logexp <= conv_std_logic_vector(1032,11);
WHEN "1110101101" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(4595761,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(13595069,28);
logexp <= conv_std_logic_vector(1032,11);
WHEN "1110101110" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(4618474,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(26161228,28);
logexp <= conv_std_logic_vector(1032,11);
WHEN "1110101111" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(4641187,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(38727386,28);
logexp <= conv_std_logic_vector(1032,11);
WHEN "1110110000" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(4663900,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(51293545,28);
logexp <= conv_std_logic_vector(1032,11);
WHEN "1110110001" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(4686613,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(63859703,28);
logexp <= conv_std_logic_vector(1032,11);
WHEN "1110110010" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(4709326,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(76425861,28);
logexp <= conv_std_logic_vector(1032,11);
WHEN "1110110011" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(4732039,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(88992020,28);
logexp <= conv_std_logic_vector(1032,11);
WHEN "1110110100" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(4754752,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(101558178,28);
logexp <= conv_std_logic_vector(1032,11);
WHEN "1110110101" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(4777465,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(114124337,28);
logexp <= conv_std_logic_vector(1032,11);
WHEN "1110110110" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(4800178,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(126690495,28);
logexp <= conv_std_logic_vector(1032,11);
WHEN "1110110111" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(4822891,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(139256654,28);
logexp <= conv_std_logic_vector(1032,11);
WHEN "1110111000" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(4845604,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(151822812,28);
logexp <= conv_std_logic_vector(1032,11);
WHEN "1110111001" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(4868317,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(164388971,28);
logexp <= conv_std_logic_vector(1032,11);
WHEN "1110111010" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(4891030,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(176955129,28);
logexp <= conv_std_logic_vector(1032,11);
WHEN "1110111011" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(4913743,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(189521288,28);
logexp <= conv_std_logic_vector(1032,11);
WHEN "1110111100" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(4936456,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(202087446,28);
logexp <= conv_std_logic_vector(1032,11);
WHEN "1110111101" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(4959169,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(214653605,28);
logexp <= conv_std_logic_vector(1032,11);
WHEN "1110111110" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(4981882,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(227219763,28);
logexp <= conv_std_logic_vector(1032,11);
WHEN "1110111111" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(5004595,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(239785922,28);
logexp <= conv_std_logic_vector(1032,11);
WHEN "1111000000" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(5027308,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(252352080,28);
logexp <= conv_std_logic_vector(1032,11);
WHEN "1111000001" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(5050021,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(264918239,28);
logexp <= conv_std_logic_vector(1032,11);
WHEN "1111000010" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(5072735,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(9048941,28);
logexp <= conv_std_logic_vector(1032,11);
WHEN "1111000011" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(5095448,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(21615100,28);
logexp <= conv_std_logic_vector(1032,11);
WHEN "1111000100" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(5118161,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(34181258,28);
logexp <= conv_std_logic_vector(1032,11);
WHEN "1111000101" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(5140874,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(46747417,28);
logexp <= conv_std_logic_vector(1032,11);
WHEN "1111000110" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(5163587,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(59313575,28);
logexp <= conv_std_logic_vector(1032,11);
WHEN "1111000111" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(5186300,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(71879734,28);
logexp <= conv_std_logic_vector(1032,11);
WHEN "1111001000" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(5209013,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(84445892,28);
logexp <= conv_std_logic_vector(1032,11);
WHEN "1111001001" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(5231726,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(97012051,28);
logexp <= conv_std_logic_vector(1032,11);
WHEN "1111001010" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(5254439,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(109578209,28);
logexp <= conv_std_logic_vector(1032,11);
WHEN "1111001011" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(5277152,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(122144368,28);
logexp <= conv_std_logic_vector(1032,11);
WHEN "1111001100" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(5299865,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(134710526,28);
logexp <= conv_std_logic_vector(1032,11);
WHEN "1111001101" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(5322578,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(147276685,28);
logexp <= conv_std_logic_vector(1032,11);
WHEN "1111001110" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(5345291,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(159842843,28);
logexp <= conv_std_logic_vector(1032,11);
WHEN "1111001111" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(5368004,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(172409002,28);
logexp <= conv_std_logic_vector(1032,11);
WHEN "1111010000" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(5390717,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(184975160,28);
logexp <= conv_std_logic_vector(1032,11);
WHEN "1111010001" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(5413430,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(197541318,28);
logexp <= conv_std_logic_vector(1032,11);
WHEN "1111010010" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(5436143,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(210107477,28);
logexp <= conv_std_logic_vector(1032,11);
WHEN "1111010011" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(5458856,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(222673635,28);
logexp <= conv_std_logic_vector(1032,11);
WHEN "1111010100" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(5481569,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(235239794,28);
logexp <= conv_std_logic_vector(1032,11);
WHEN "1111010101" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(5504282,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(247805952,28);
logexp <= conv_std_logic_vector(1032,11);
WHEN "1111010110" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(5526995,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(260372111,28);
logexp <= conv_std_logic_vector(1032,11);
WHEN "1111010111" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(5549709,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(4502813,28);
logexp <= conv_std_logic_vector(1032,11);
WHEN "1111011000" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(5572422,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(17068972,28);
logexp <= conv_std_logic_vector(1032,11);
WHEN "1111011001" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(5595135,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(29635130,28);
logexp <= conv_std_logic_vector(1032,11);
WHEN "1111011010" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(5617848,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(42201289,28);
logexp <= conv_std_logic_vector(1032,11);
WHEN "1111011011" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(5640561,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(54767447,28);
logexp <= conv_std_logic_vector(1032,11);
WHEN "1111011100" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(5663274,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(67333606,28);
logexp <= conv_std_logic_vector(1032,11);
WHEN "1111011101" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(5685987,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(79899764,28);
logexp <= conv_std_logic_vector(1032,11);
WHEN "1111011110" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(5708700,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(92465923,28);
logexp <= conv_std_logic_vector(1032,11);
WHEN "1111011111" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(5731413,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(105032081,28);
logexp <= conv_std_logic_vector(1032,11);
WHEN "1111100000" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(5754126,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(117598240,28);
logexp <= conv_std_logic_vector(1032,11);
WHEN "1111100001" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(5776839,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(130164398,28);
logexp <= conv_std_logic_vector(1032,11);
WHEN "1111100010" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(5799552,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(142730557,28);
logexp <= conv_std_logic_vector(1032,11);
WHEN "1111100011" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(5822265,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(155296715,28);
logexp <= conv_std_logic_vector(1032,11);
WHEN "1111100100" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(5844978,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(167862874,28);
logexp <= conv_std_logic_vector(1032,11);
WHEN "1111100101" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(5867691,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(180429032,28);
logexp <= conv_std_logic_vector(1032,11);
WHEN "1111100110" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(5890404,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(192995191,28);
logexp <= conv_std_logic_vector(1032,11);
WHEN "1111100111" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(5913117,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(205561349,28);
logexp <= conv_std_logic_vector(1032,11);
WHEN "1111101000" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(5935830,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(218127508,28);
logexp <= conv_std_logic_vector(1032,11);
WHEN "1111101001" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(5958543,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(230693666,28);
logexp <= conv_std_logic_vector(1032,11);
WHEN "1111101010" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(5981256,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(243259825,28);
logexp <= conv_std_logic_vector(1032,11);
WHEN "1111101011" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(6003969,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(255825983,28);
logexp <= conv_std_logic_vector(1032,11);
WHEN "1111101100" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(6026682,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(268392142,28);
logexp <= conv_std_logic_vector(1032,11);
WHEN "1111101101" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(6049396,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(12522844,28);
logexp <= conv_std_logic_vector(1032,11);
WHEN "1111101110" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(6072109,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(25089003,28);
logexp <= conv_std_logic_vector(1032,11);
WHEN "1111101111" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(6094822,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(37655161,28);
logexp <= conv_std_logic_vector(1032,11);
WHEN "1111110000" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(6117535,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(50221319,28);
logexp <= conv_std_logic_vector(1032,11);
WHEN "1111110001" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(6140248,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(62787478,28);
logexp <= conv_std_logic_vector(1032,11);
WHEN "1111110010" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(6162961,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(75353636,28);
logexp <= conv_std_logic_vector(1032,11);
WHEN "1111110011" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(6185674,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(87919795,28);
logexp <= conv_std_logic_vector(1032,11);
WHEN "1111110100" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(6208387,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(100485953,28);
logexp <= conv_std_logic_vector(1032,11);
WHEN "1111110101" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(6231100,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(113052112,28);
logexp <= conv_std_logic_vector(1032,11);
WHEN "1111110110" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(6253813,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(125618270,28);
logexp <= conv_std_logic_vector(1032,11);
WHEN "1111110111" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(6276526,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(138184429,28);
logexp <= conv_std_logic_vector(1032,11);
WHEN "1111111000" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(6299239,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(150750587,28);
logexp <= conv_std_logic_vector(1032,11);
WHEN "1111111001" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(6321952,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(163316746,28);
logexp <= conv_std_logic_vector(1032,11);
WHEN "1111111010" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(6344665,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(175882904,28);
logexp <= conv_std_logic_vector(1032,11);
WHEN "1111111011" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(6367378,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(188449063,28);
logexp <= conv_std_logic_vector(1032,11);
WHEN "1111111100" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(6390091,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(201015221,28);
logexp <= conv_std_logic_vector(1032,11);
WHEN "1111111101" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(6412804,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(213581380,28);
logexp <= conv_std_logic_vector(1032,11);
WHEN "1111111110" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(6435517,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(226147538,28);
logexp <= conv_std_logic_vector(1032,11);
WHEN "1111111111" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(6458230,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(238713697,28);
logexp <= conv_std_logic_vector(1032,11);
WHEN others =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(0,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(0,28);
logexp <= conv_std_logic_vector(0,11);
END CASE;
END PROCESS;
END rtl;
|
LIBRARY ieee;
USE ieee.std_logic_1164.all;
USE ieee.std_logic_unsigned.all;
USE ieee.std_logic_arith.all;
--***************************************************
--*** ***
--*** FLOATING POINT CORE LIBRARY ***
--*** ***
--*** DP_LNLUTPOW.VHD ***
--*** ***
--*** Function: Look Up Table - LN() ***
--*** ***
--*** Generated by MATLAB Utility ***
--*** ***
--*** 18/02/08 ML ***
--*** ***
--*** (c) 2008 Altera Corporation ***
--*** ***
--*** Change History ***
--*** ***
--*** ***
--*** ***
--*** ***
--*** ***
--***************************************************
ENTITY dp_lnlutpow IS
PORT (
add : IN STD_LOGIC_VECTOR (10 DOWNTO 1);
logman : OUT STD_LOGIC_VECTOR (52 DOWNTO 1);
logexp : OUT STD_LOGIC_VECTOR (11 DOWNTO 1)
);
END dp_lnlutpow;
ARCHITECTURE rtl OF dp_lnlutpow IS
BEGIN
pca: PROCESS (add)
BEGIN
CASE add IS
WHEN "0000000000" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(0,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(0,28);
logexp <= conv_std_logic_vector(0,11);
WHEN "0000000001" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(6480943,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(251279855,28);
logexp <= conv_std_logic_vector(1022,11);
WHEN "0000000010" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(6480943,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(251279855,28);
logexp <= conv_std_logic_vector(1023,11);
WHEN "0000000011" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(666403,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(255568755,28);
logexp <= conv_std_logic_vector(1024,11);
WHEN "0000000100" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(6480943,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(251279855,28);
logexp <= conv_std_logic_vector(1024,11);
WHEN "0000000101" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(12295483,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(246990955,28);
logexp <= conv_std_logic_vector(1024,11);
WHEN "0000000110" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(666403,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(255568755,28);
logexp <= conv_std_logic_vector(1025,11);
WHEN "0000000111" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(3573673,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(253424305,28);
logexp <= conv_std_logic_vector(1025,11);
WHEN "0000001000" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(6480943,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(251279855,28);
logexp <= conv_std_logic_vector(1025,11);
WHEN "0000001001" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(9388213,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(249135405,28);
logexp <= conv_std_logic_vector(1025,11);
WHEN "0000001010" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(12295483,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(246990955,28);
logexp <= conv_std_logic_vector(1025,11);
WHEN "0000001011" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(15202753,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(244846505,28);
logexp <= conv_std_logic_vector(1025,11);
WHEN "0000001100" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(666403,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(255568755,28);
logexp <= conv_std_logic_vector(1026,11);
WHEN "0000001101" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(2120038,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(254496530,28);
logexp <= conv_std_logic_vector(1026,11);
WHEN "0000001110" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(3573673,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(253424305,28);
logexp <= conv_std_logic_vector(1026,11);
WHEN "0000001111" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(5027308,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(252352080,28);
logexp <= conv_std_logic_vector(1026,11);
WHEN "0000010000" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(6480943,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(251279855,28);
logexp <= conv_std_logic_vector(1026,11);
WHEN "0000010001" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(7934578,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(250207630,28);
logexp <= conv_std_logic_vector(1026,11);
WHEN "0000010010" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(9388213,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(249135405,28);
logexp <= conv_std_logic_vector(1026,11);
WHEN "0000010011" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(10841848,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(248063180,28);
logexp <= conv_std_logic_vector(1026,11);
WHEN "0000010100" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(12295483,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(246990955,28);
logexp <= conv_std_logic_vector(1026,11);
WHEN "0000010101" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(13749118,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(245918730,28);
logexp <= conv_std_logic_vector(1026,11);
WHEN "0000010110" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(15202753,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(244846505,28);
logexp <= conv_std_logic_vector(1026,11);
WHEN "0000010111" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(16656388,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(243774280,28);
logexp <= conv_std_logic_vector(1026,11);
WHEN "0000011000" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(666403,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(255568755,28);
logexp <= conv_std_logic_vector(1027,11);
WHEN "0000011001" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(1393221,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(120814915,28);
logexp <= conv_std_logic_vector(1027,11);
WHEN "0000011010" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(2120038,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(254496530,28);
logexp <= conv_std_logic_vector(1027,11);
WHEN "0000011011" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(2846856,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(119742690,28);
logexp <= conv_std_logic_vector(1027,11);
WHEN "0000011100" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(3573673,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(253424305,28);
logexp <= conv_std_logic_vector(1027,11);
WHEN "0000011101" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(4300491,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(118670465,28);
logexp <= conv_std_logic_vector(1027,11);
WHEN "0000011110" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(5027308,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(252352080,28);
logexp <= conv_std_logic_vector(1027,11);
WHEN "0000011111" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(5754126,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(117598240,28);
logexp <= conv_std_logic_vector(1027,11);
WHEN "0000100000" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(6480943,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(251279855,28);
logexp <= conv_std_logic_vector(1027,11);
WHEN "0000100001" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(7207761,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(116526015,28);
logexp <= conv_std_logic_vector(1027,11);
WHEN "0000100010" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(7934578,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(250207630,28);
logexp <= conv_std_logic_vector(1027,11);
WHEN "0000100011" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(8661396,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(115453790,28);
logexp <= conv_std_logic_vector(1027,11);
WHEN "0000100100" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(9388213,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(249135405,28);
logexp <= conv_std_logic_vector(1027,11);
WHEN "0000100101" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(10115031,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(114381565,28);
logexp <= conv_std_logic_vector(1027,11);
WHEN "0000100110" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(10841848,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(248063180,28);
logexp <= conv_std_logic_vector(1027,11);
WHEN "0000100111" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(11568666,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(113309340,28);
logexp <= conv_std_logic_vector(1027,11);
WHEN "0000101000" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(12295483,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(246990955,28);
logexp <= conv_std_logic_vector(1027,11);
WHEN "0000101001" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(13022301,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(112237114,28);
logexp <= conv_std_logic_vector(1027,11);
WHEN "0000101010" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(13749118,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(245918730,28);
logexp <= conv_std_logic_vector(1027,11);
WHEN "0000101011" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(14475936,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(111164889,28);
logexp <= conv_std_logic_vector(1027,11);
WHEN "0000101100" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(15202753,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(244846505,28);
logexp <= conv_std_logic_vector(1027,11);
WHEN "0000101101" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(15929571,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(110092664,28);
logexp <= conv_std_logic_vector(1027,11);
WHEN "0000101110" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(16656388,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(243774280,28);
logexp <= conv_std_logic_vector(1027,11);
WHEN "0000101111" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(302995,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(54510220,28);
logexp <= conv_std_logic_vector(1028,11);
WHEN "0000110000" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(666403,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(255568755,28);
logexp <= conv_std_logic_vector(1028,11);
WHEN "0000110001" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(1029812,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(188191835,28);
logexp <= conv_std_logic_vector(1028,11);
WHEN "0000110010" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(1393221,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(120814915,28);
logexp <= conv_std_logic_vector(1028,11);
WHEN "0000110011" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(1756630,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(53437995,28);
logexp <= conv_std_logic_vector(1028,11);
WHEN "0000110100" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(2120038,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(254496530,28);
logexp <= conv_std_logic_vector(1028,11);
WHEN "0000110101" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(2483447,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(187119610,28);
logexp <= conv_std_logic_vector(1028,11);
WHEN "0000110110" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(2846856,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(119742690,28);
logexp <= conv_std_logic_vector(1028,11);
WHEN "0000110111" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(3210265,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(52365770,28);
logexp <= conv_std_logic_vector(1028,11);
WHEN "0000111000" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(3573673,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(253424305,28);
logexp <= conv_std_logic_vector(1028,11);
WHEN "0000111001" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(3937082,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(186047385,28);
logexp <= conv_std_logic_vector(1028,11);
WHEN "0000111010" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(4300491,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(118670465,28);
logexp <= conv_std_logic_vector(1028,11);
WHEN "0000111011" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(4663900,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(51293545,28);
logexp <= conv_std_logic_vector(1028,11);
WHEN "0000111100" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(5027308,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(252352080,28);
logexp <= conv_std_logic_vector(1028,11);
WHEN "0000111101" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(5390717,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(184975160,28);
logexp <= conv_std_logic_vector(1028,11);
WHEN "0000111110" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(5754126,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(117598240,28);
logexp <= conv_std_logic_vector(1028,11);
WHEN "0000111111" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(6117535,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(50221319,28);
logexp <= conv_std_logic_vector(1028,11);
WHEN "0001000000" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(6480943,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(251279855,28);
logexp <= conv_std_logic_vector(1028,11);
WHEN "0001000001" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(6844352,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(183902935,28);
logexp <= conv_std_logic_vector(1028,11);
WHEN "0001000010" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(7207761,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(116526015,28);
logexp <= conv_std_logic_vector(1028,11);
WHEN "0001000011" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(7571170,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(49149094,28);
logexp <= conv_std_logic_vector(1028,11);
WHEN "0001000100" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(7934578,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(250207630,28);
logexp <= conv_std_logic_vector(1028,11);
WHEN "0001000101" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(8297987,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(182830710,28);
logexp <= conv_std_logic_vector(1028,11);
WHEN "0001000110" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(8661396,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(115453790,28);
logexp <= conv_std_logic_vector(1028,11);
WHEN "0001000111" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(9024805,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(48076869,28);
logexp <= conv_std_logic_vector(1028,11);
WHEN "0001001000" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(9388213,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(249135405,28);
logexp <= conv_std_logic_vector(1028,11);
WHEN "0001001001" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(9751622,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(181758485,28);
logexp <= conv_std_logic_vector(1028,11);
WHEN "0001001010" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(10115031,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(114381565,28);
logexp <= conv_std_logic_vector(1028,11);
WHEN "0001001011" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(10478440,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(47004644,28);
logexp <= conv_std_logic_vector(1028,11);
WHEN "0001001100" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(10841848,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(248063180,28);
logexp <= conv_std_logic_vector(1028,11);
WHEN "0001001101" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(11205257,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(180686260,28);
logexp <= conv_std_logic_vector(1028,11);
WHEN "0001001110" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(11568666,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(113309340,28);
logexp <= conv_std_logic_vector(1028,11);
WHEN "0001001111" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(11932075,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(45932419,28);
logexp <= conv_std_logic_vector(1028,11);
WHEN "0001010000" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(12295483,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(246990955,28);
logexp <= conv_std_logic_vector(1028,11);
WHEN "0001010001" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(12658892,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(179614035,28);
logexp <= conv_std_logic_vector(1028,11);
WHEN "0001010010" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(13022301,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(112237114,28);
logexp <= conv_std_logic_vector(1028,11);
WHEN "0001010011" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(13385710,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(44860194,28);
logexp <= conv_std_logic_vector(1028,11);
WHEN "0001010100" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(13749118,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(245918730,28);
logexp <= conv_std_logic_vector(1028,11);
WHEN "0001010101" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(14112527,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(178541810,28);
logexp <= conv_std_logic_vector(1028,11);
WHEN "0001010110" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(14475936,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(111164889,28);
logexp <= conv_std_logic_vector(1028,11);
WHEN "0001010111" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(14839345,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(43787969,28);
logexp <= conv_std_logic_vector(1028,11);
WHEN "0001011000" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(15202753,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(244846505,28);
logexp <= conv_std_logic_vector(1028,11);
WHEN "0001011001" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(15566162,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(177469585,28);
logexp <= conv_std_logic_vector(1028,11);
WHEN "0001011010" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(15929571,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(110092664,28);
logexp <= conv_std_logic_vector(1028,11);
WHEN "0001011011" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(16292980,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(42715744,28);
logexp <= conv_std_logic_vector(1028,11);
WHEN "0001011100" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(16656388,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(243774280,28);
logexp <= conv_std_logic_vector(1028,11);
WHEN "0001011101" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(121290,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(222416408,28);
logexp <= conv_std_logic_vector(1029,11);
WHEN "0001011110" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(302995,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(54510220,28);
logexp <= conv_std_logic_vector(1029,11);
WHEN "0001011111" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(484699,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(155039488,28);
logexp <= conv_std_logic_vector(1029,11);
WHEN "0001100000" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(666403,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(255568755,28);
logexp <= conv_std_logic_vector(1029,11);
WHEN "0001100001" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(848108,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(87662567,28);
logexp <= conv_std_logic_vector(1029,11);
WHEN "0001100010" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(1029812,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(188191835,28);
logexp <= conv_std_logic_vector(1029,11);
WHEN "0001100011" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(1211517,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(20285647,28);
logexp <= conv_std_logic_vector(1029,11);
WHEN "0001100100" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(1393221,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(120814915,28);
logexp <= conv_std_logic_vector(1029,11);
WHEN "0001100101" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(1574925,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(221344183,28);
logexp <= conv_std_logic_vector(1029,11);
WHEN "0001100110" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(1756630,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(53437995,28);
logexp <= conv_std_logic_vector(1029,11);
WHEN "0001100111" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(1938334,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(153967262,28);
logexp <= conv_std_logic_vector(1029,11);
WHEN "0001101000" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(2120038,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(254496530,28);
logexp <= conv_std_logic_vector(1029,11);
WHEN "0001101001" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(2301743,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(86590342,28);
logexp <= conv_std_logic_vector(1029,11);
WHEN "0001101010" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(2483447,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(187119610,28);
logexp <= conv_std_logic_vector(1029,11);
WHEN "0001101011" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(2665152,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(19213422,28);
logexp <= conv_std_logic_vector(1029,11);
WHEN "0001101100" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(2846856,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(119742690,28);
logexp <= conv_std_logic_vector(1029,11);
WHEN "0001101101" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(3028560,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(220271958,28);
logexp <= conv_std_logic_vector(1029,11);
WHEN "0001101110" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(3210265,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(52365770,28);
logexp <= conv_std_logic_vector(1029,11);
WHEN "0001101111" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(3391969,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(152895037,28);
logexp <= conv_std_logic_vector(1029,11);
WHEN "0001110000" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(3573673,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(253424305,28);
logexp <= conv_std_logic_vector(1029,11);
WHEN "0001110001" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(3755378,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(85518117,28);
logexp <= conv_std_logic_vector(1029,11);
WHEN "0001110010" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(3937082,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(186047385,28);
logexp <= conv_std_logic_vector(1029,11);
WHEN "0001110011" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(4118787,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(18141197,28);
logexp <= conv_std_logic_vector(1029,11);
WHEN "0001110100" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(4300491,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(118670465,28);
logexp <= conv_std_logic_vector(1029,11);
WHEN "0001110101" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(4482195,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(219199733,28);
logexp <= conv_std_logic_vector(1029,11);
WHEN "0001110110" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(4663900,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(51293545,28);
logexp <= conv_std_logic_vector(1029,11);
WHEN "0001110111" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(4845604,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(151822812,28);
logexp <= conv_std_logic_vector(1029,11);
WHEN "0001111000" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(5027308,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(252352080,28);
logexp <= conv_std_logic_vector(1029,11);
WHEN "0001111001" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(5209013,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(84445892,28);
logexp <= conv_std_logic_vector(1029,11);
WHEN "0001111010" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(5390717,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(184975160,28);
logexp <= conv_std_logic_vector(1029,11);
WHEN "0001111011" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(5572422,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(17068972,28);
logexp <= conv_std_logic_vector(1029,11);
WHEN "0001111100" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(5754126,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(117598240,28);
logexp <= conv_std_logic_vector(1029,11);
WHEN "0001111101" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(5935830,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(218127508,28);
logexp <= conv_std_logic_vector(1029,11);
WHEN "0001111110" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(6117535,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(50221319,28);
logexp <= conv_std_logic_vector(1029,11);
WHEN "0001111111" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(6299239,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(150750587,28);
logexp <= conv_std_logic_vector(1029,11);
WHEN "0010000000" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(6480943,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(251279855,28);
logexp <= conv_std_logic_vector(1029,11);
WHEN "0010000001" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(6662648,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(83373667,28);
logexp <= conv_std_logic_vector(1029,11);
WHEN "0010000010" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(6844352,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(183902935,28);
logexp <= conv_std_logic_vector(1029,11);
WHEN "0010000011" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(7026057,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(15996747,28);
logexp <= conv_std_logic_vector(1029,11);
WHEN "0010000100" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(7207761,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(116526015,28);
logexp <= conv_std_logic_vector(1029,11);
WHEN "0010000101" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(7389465,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(217055283,28);
logexp <= conv_std_logic_vector(1029,11);
WHEN "0010000110" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(7571170,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(49149094,28);
logexp <= conv_std_logic_vector(1029,11);
WHEN "0010000111" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(7752874,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(149678362,28);
logexp <= conv_std_logic_vector(1029,11);
WHEN "0010001000" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(7934578,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(250207630,28);
logexp <= conv_std_logic_vector(1029,11);
WHEN "0010001001" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(8116283,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(82301442,28);
logexp <= conv_std_logic_vector(1029,11);
WHEN "0010001010" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(8297987,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(182830710,28);
logexp <= conv_std_logic_vector(1029,11);
WHEN "0010001011" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(8479692,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(14924522,28);
logexp <= conv_std_logic_vector(1029,11);
WHEN "0010001100" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(8661396,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(115453790,28);
logexp <= conv_std_logic_vector(1029,11);
WHEN "0010001101" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(8843100,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(215983058,28);
logexp <= conv_std_logic_vector(1029,11);
WHEN "0010001110" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(9024805,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(48076869,28);
logexp <= conv_std_logic_vector(1029,11);
WHEN "0010001111" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(9206509,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(148606137,28);
logexp <= conv_std_logic_vector(1029,11);
WHEN "0010010000" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(9388213,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(249135405,28);
logexp <= conv_std_logic_vector(1029,11);
WHEN "0010010001" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(9569918,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(81229217,28);
logexp <= conv_std_logic_vector(1029,11);
WHEN "0010010010" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(9751622,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(181758485,28);
logexp <= conv_std_logic_vector(1029,11);
WHEN "0010010011" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(9933327,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(13852297,28);
logexp <= conv_std_logic_vector(1029,11);
WHEN "0010010100" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(10115031,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(114381565,28);
logexp <= conv_std_logic_vector(1029,11);
WHEN "0010010101" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(10296735,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(214910832,28);
logexp <= conv_std_logic_vector(1029,11);
WHEN "0010010110" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(10478440,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(47004644,28);
logexp <= conv_std_logic_vector(1029,11);
WHEN "0010010111" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(10660144,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(147533912,28);
logexp <= conv_std_logic_vector(1029,11);
WHEN "0010011000" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(10841848,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(248063180,28);
logexp <= conv_std_logic_vector(1029,11);
WHEN "0010011001" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(11023553,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(80156992,28);
logexp <= conv_std_logic_vector(1029,11);
WHEN "0010011010" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(11205257,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(180686260,28);
logexp <= conv_std_logic_vector(1029,11);
WHEN "0010011011" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(11386962,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(12780072,28);
logexp <= conv_std_logic_vector(1029,11);
WHEN "0010011100" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(11568666,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(113309340,28);
logexp <= conv_std_logic_vector(1029,11);
WHEN "0010011101" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(11750370,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(213838607,28);
logexp <= conv_std_logic_vector(1029,11);
WHEN "0010011110" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(11932075,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(45932419,28);
logexp <= conv_std_logic_vector(1029,11);
WHEN "0010011111" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(12113779,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(146461687,28);
logexp <= conv_std_logic_vector(1029,11);
WHEN "0010100000" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(12295483,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(246990955,28);
logexp <= conv_std_logic_vector(1029,11);
WHEN "0010100001" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(12477188,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(79084767,28);
logexp <= conv_std_logic_vector(1029,11);
WHEN "0010100010" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(12658892,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(179614035,28);
logexp <= conv_std_logic_vector(1029,11);
WHEN "0010100011" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(12840597,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(11707847,28);
logexp <= conv_std_logic_vector(1029,11);
WHEN "0010100100" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(13022301,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(112237114,28);
logexp <= conv_std_logic_vector(1029,11);
WHEN "0010100101" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(13204005,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(212766382,28);
logexp <= conv_std_logic_vector(1029,11);
WHEN "0010100110" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(13385710,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(44860194,28);
logexp <= conv_std_logic_vector(1029,11);
WHEN "0010100111" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(13567414,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(145389462,28);
logexp <= conv_std_logic_vector(1029,11);
WHEN "0010101000" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(13749118,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(245918730,28);
logexp <= conv_std_logic_vector(1029,11);
WHEN "0010101001" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(13930823,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(78012542,28);
logexp <= conv_std_logic_vector(1029,11);
WHEN "0010101010" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(14112527,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(178541810,28);
logexp <= conv_std_logic_vector(1029,11);
WHEN "0010101011" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(14294232,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(10635622,28);
logexp <= conv_std_logic_vector(1029,11);
WHEN "0010101100" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(14475936,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(111164889,28);
logexp <= conv_std_logic_vector(1029,11);
WHEN "0010101101" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(14657640,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(211694157,28);
logexp <= conv_std_logic_vector(1029,11);
WHEN "0010101110" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(14839345,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(43787969,28);
logexp <= conv_std_logic_vector(1029,11);
WHEN "0010101111" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(15021049,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(144317237,28);
logexp <= conv_std_logic_vector(1029,11);
WHEN "0010110000" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(15202753,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(244846505,28);
logexp <= conv_std_logic_vector(1029,11);
WHEN "0010110001" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(15384458,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(76940317,28);
logexp <= conv_std_logic_vector(1029,11);
WHEN "0010110010" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(15566162,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(177469585,28);
logexp <= conv_std_logic_vector(1029,11);
WHEN "0010110011" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(15747867,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(9563397,28);
logexp <= conv_std_logic_vector(1029,11);
WHEN "0010110100" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(15929571,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(110092664,28);
logexp <= conv_std_logic_vector(1029,11);
WHEN "0010110101" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(16111275,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(210621932,28);
logexp <= conv_std_logic_vector(1029,11);
WHEN "0010110110" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(16292980,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(42715744,28);
logexp <= conv_std_logic_vector(1029,11);
WHEN "0010110111" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(16474684,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(143245012,28);
logexp <= conv_std_logic_vector(1029,11);
WHEN "0010111000" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(16656388,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(243774280,28);
logexp <= conv_std_logic_vector(1029,11);
WHEN "0010111001" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(30438,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(172151774,28);
logexp <= conv_std_logic_vector(1030,11);
WHEN "0010111010" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(121290,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(222416408,28);
logexp <= conv_std_logic_vector(1030,11);
WHEN "0010111011" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(212143,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(4245586,28);
logexp <= conv_std_logic_vector(1030,11);
WHEN "0010111100" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(302995,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(54510220,28);
logexp <= conv_std_logic_vector(1030,11);
WHEN "0010111101" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(393847,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(104774854,28);
logexp <= conv_std_logic_vector(1030,11);
WHEN "0010111110" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(484699,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(155039488,28);
logexp <= conv_std_logic_vector(1030,11);
WHEN "0010111111" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(575551,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(205304121,28);
logexp <= conv_std_logic_vector(1030,11);
WHEN "0011000000" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(666403,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(255568755,28);
logexp <= conv_std_logic_vector(1030,11);
WHEN "0011000001" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(757256,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(37397933,28);
logexp <= conv_std_logic_vector(1030,11);
WHEN "0011000010" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(848108,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(87662567,28);
logexp <= conv_std_logic_vector(1030,11);
WHEN "0011000011" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(938960,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(137927201,28);
logexp <= conv_std_logic_vector(1030,11);
WHEN "0011000100" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(1029812,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(188191835,28);
logexp <= conv_std_logic_vector(1030,11);
WHEN "0011000101" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(1120664,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(238456469,28);
logexp <= conv_std_logic_vector(1030,11);
WHEN "0011000110" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(1211517,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(20285647,28);
logexp <= conv_std_logic_vector(1030,11);
WHEN "0011000111" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(1302369,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(70550281,28);
logexp <= conv_std_logic_vector(1030,11);
WHEN "0011001000" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(1393221,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(120814915,28);
logexp <= conv_std_logic_vector(1030,11);
WHEN "0011001001" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(1484073,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(171079549,28);
logexp <= conv_std_logic_vector(1030,11);
WHEN "0011001010" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(1574925,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(221344183,28);
logexp <= conv_std_logic_vector(1030,11);
WHEN "0011001011" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(1665778,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(3173361,28);
logexp <= conv_std_logic_vector(1030,11);
WHEN "0011001100" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(1756630,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(53437995,28);
logexp <= conv_std_logic_vector(1030,11);
WHEN "0011001101" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(1847482,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(103702629,28);
logexp <= conv_std_logic_vector(1030,11);
WHEN "0011001110" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(1938334,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(153967262,28);
logexp <= conv_std_logic_vector(1030,11);
WHEN "0011001111" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(2029186,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(204231896,28);
logexp <= conv_std_logic_vector(1030,11);
WHEN "0011010000" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(2120038,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(254496530,28);
logexp <= conv_std_logic_vector(1030,11);
WHEN "0011010001" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(2210891,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(36325708,28);
logexp <= conv_std_logic_vector(1030,11);
WHEN "0011010010" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(2301743,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(86590342,28);
logexp <= conv_std_logic_vector(1030,11);
WHEN "0011010011" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(2392595,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(136854976,28);
logexp <= conv_std_logic_vector(1030,11);
WHEN "0011010100" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(2483447,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(187119610,28);
logexp <= conv_std_logic_vector(1030,11);
WHEN "0011010101" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(2574299,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(237384244,28);
logexp <= conv_std_logic_vector(1030,11);
WHEN "0011010110" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(2665152,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(19213422,28);
logexp <= conv_std_logic_vector(1030,11);
WHEN "0011010111" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(2756004,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(69478056,28);
logexp <= conv_std_logic_vector(1030,11);
WHEN "0011011000" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(2846856,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(119742690,28);
logexp <= conv_std_logic_vector(1030,11);
WHEN "0011011001" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(2937708,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(170007324,28);
logexp <= conv_std_logic_vector(1030,11);
WHEN "0011011010" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(3028560,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(220271958,28);
logexp <= conv_std_logic_vector(1030,11);
WHEN "0011011011" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(3119413,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(2101136,28);
logexp <= conv_std_logic_vector(1030,11);
WHEN "0011011100" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(3210265,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(52365770,28);
logexp <= conv_std_logic_vector(1030,11);
WHEN "0011011101" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(3301117,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(102630404,28);
logexp <= conv_std_logic_vector(1030,11);
WHEN "0011011110" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(3391969,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(152895037,28);
logexp <= conv_std_logic_vector(1030,11);
WHEN "0011011111" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(3482821,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(203159671,28);
logexp <= conv_std_logic_vector(1030,11);
WHEN "0011100000" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(3573673,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(253424305,28);
logexp <= conv_std_logic_vector(1030,11);
WHEN "0011100001" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(3664526,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(35253483,28);
logexp <= conv_std_logic_vector(1030,11);
WHEN "0011100010" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(3755378,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(85518117,28);
logexp <= conv_std_logic_vector(1030,11);
WHEN "0011100011" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(3846230,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(135782751,28);
logexp <= conv_std_logic_vector(1030,11);
WHEN "0011100100" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(3937082,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(186047385,28);
logexp <= conv_std_logic_vector(1030,11);
WHEN "0011100101" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(4027934,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(236312019,28);
logexp <= conv_std_logic_vector(1030,11);
WHEN "0011100110" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(4118787,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(18141197,28);
logexp <= conv_std_logic_vector(1030,11);
WHEN "0011100111" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(4209639,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(68405831,28);
logexp <= conv_std_logic_vector(1030,11);
WHEN "0011101000" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(4300491,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(118670465,28);
logexp <= conv_std_logic_vector(1030,11);
WHEN "0011101001" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(4391343,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(168935099,28);
logexp <= conv_std_logic_vector(1030,11);
WHEN "0011101010" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(4482195,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(219199733,28);
logexp <= conv_std_logic_vector(1030,11);
WHEN "0011101011" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(4573048,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(1028911,28);
logexp <= conv_std_logic_vector(1030,11);
WHEN "0011101100" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(4663900,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(51293545,28);
logexp <= conv_std_logic_vector(1030,11);
WHEN "0011101101" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(4754752,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(101558178,28);
logexp <= conv_std_logic_vector(1030,11);
WHEN "0011101110" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(4845604,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(151822812,28);
logexp <= conv_std_logic_vector(1030,11);
WHEN "0011101111" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(4936456,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(202087446,28);
logexp <= conv_std_logic_vector(1030,11);
WHEN "0011110000" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(5027308,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(252352080,28);
logexp <= conv_std_logic_vector(1030,11);
WHEN "0011110001" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(5118161,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(34181258,28);
logexp <= conv_std_logic_vector(1030,11);
WHEN "0011110010" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(5209013,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(84445892,28);
logexp <= conv_std_logic_vector(1030,11);
WHEN "0011110011" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(5299865,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(134710526,28);
logexp <= conv_std_logic_vector(1030,11);
WHEN "0011110100" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(5390717,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(184975160,28);
logexp <= conv_std_logic_vector(1030,11);
WHEN "0011110101" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(5481569,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(235239794,28);
logexp <= conv_std_logic_vector(1030,11);
WHEN "0011110110" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(5572422,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(17068972,28);
logexp <= conv_std_logic_vector(1030,11);
WHEN "0011110111" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(5663274,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(67333606,28);
logexp <= conv_std_logic_vector(1030,11);
WHEN "0011111000" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(5754126,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(117598240,28);
logexp <= conv_std_logic_vector(1030,11);
WHEN "0011111001" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(5844978,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(167862874,28);
logexp <= conv_std_logic_vector(1030,11);
WHEN "0011111010" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(5935830,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(218127508,28);
logexp <= conv_std_logic_vector(1030,11);
WHEN "0011111011" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(6026682,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(268392142,28);
logexp <= conv_std_logic_vector(1030,11);
WHEN "0011111100" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(6117535,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(50221319,28);
logexp <= conv_std_logic_vector(1030,11);
WHEN "0011111101" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(6208387,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(100485953,28);
logexp <= conv_std_logic_vector(1030,11);
WHEN "0011111110" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(6299239,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(150750587,28);
logexp <= conv_std_logic_vector(1030,11);
WHEN "0011111111" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(6390091,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(201015221,28);
logexp <= conv_std_logic_vector(1030,11);
WHEN "0100000000" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(6480943,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(251279855,28);
logexp <= conv_std_logic_vector(1030,11);
WHEN "0100000001" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(6571796,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(33109033,28);
logexp <= conv_std_logic_vector(1030,11);
WHEN "0100000010" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(6662648,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(83373667,28);
logexp <= conv_std_logic_vector(1030,11);
WHEN "0100000011" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(6753500,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(133638301,28);
logexp <= conv_std_logic_vector(1030,11);
WHEN "0100000100" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(6844352,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(183902935,28);
logexp <= conv_std_logic_vector(1030,11);
WHEN "0100000101" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(6935204,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(234167569,28);
logexp <= conv_std_logic_vector(1030,11);
WHEN "0100000110" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(7026057,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(15996747,28);
logexp <= conv_std_logic_vector(1030,11);
WHEN "0100000111" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(7116909,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(66261381,28);
logexp <= conv_std_logic_vector(1030,11);
WHEN "0100001000" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(7207761,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(116526015,28);
logexp <= conv_std_logic_vector(1030,11);
WHEN "0100001001" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(7298613,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(166790649,28);
logexp <= conv_std_logic_vector(1030,11);
WHEN "0100001010" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(7389465,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(217055283,28);
logexp <= conv_std_logic_vector(1030,11);
WHEN "0100001011" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(7480317,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(267319916,28);
logexp <= conv_std_logic_vector(1030,11);
WHEN "0100001100" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(7571170,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(49149094,28);
logexp <= conv_std_logic_vector(1030,11);
WHEN "0100001101" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(7662022,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(99413728,28);
logexp <= conv_std_logic_vector(1030,11);
WHEN "0100001110" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(7752874,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(149678362,28);
logexp <= conv_std_logic_vector(1030,11);
WHEN "0100001111" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(7843726,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(199942996,28);
logexp <= conv_std_logic_vector(1030,11);
WHEN "0100010000" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(7934578,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(250207630,28);
logexp <= conv_std_logic_vector(1030,11);
WHEN "0100010001" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(8025431,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(32036808,28);
logexp <= conv_std_logic_vector(1030,11);
WHEN "0100010010" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(8116283,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(82301442,28);
logexp <= conv_std_logic_vector(1030,11);
WHEN "0100010011" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(8207135,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(132566076,28);
logexp <= conv_std_logic_vector(1030,11);
WHEN "0100010100" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(8297987,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(182830710,28);
logexp <= conv_std_logic_vector(1030,11);
WHEN "0100010101" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(8388839,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(233095344,28);
logexp <= conv_std_logic_vector(1030,11);
WHEN "0100010110" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(8479692,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(14924522,28);
logexp <= conv_std_logic_vector(1030,11);
WHEN "0100010111" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(8570544,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(65189156,28);
logexp <= conv_std_logic_vector(1030,11);
WHEN "0100011000" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(8661396,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(115453790,28);
logexp <= conv_std_logic_vector(1030,11);
WHEN "0100011001" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(8752248,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(165718424,28);
logexp <= conv_std_logic_vector(1030,11);
WHEN "0100011010" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(8843100,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(215983058,28);
logexp <= conv_std_logic_vector(1030,11);
WHEN "0100011011" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(8933952,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(266247691,28);
logexp <= conv_std_logic_vector(1030,11);
WHEN "0100011100" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(9024805,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(48076869,28);
logexp <= conv_std_logic_vector(1030,11);
WHEN "0100011101" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(9115657,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(98341503,28);
logexp <= conv_std_logic_vector(1030,11);
WHEN "0100011110" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(9206509,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(148606137,28);
logexp <= conv_std_logic_vector(1030,11);
WHEN "0100011111" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(9297361,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(198870771,28);
logexp <= conv_std_logic_vector(1030,11);
WHEN "0100100000" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(9388213,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(249135405,28);
logexp <= conv_std_logic_vector(1030,11);
WHEN "0100100001" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(9479066,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(30964583,28);
logexp <= conv_std_logic_vector(1030,11);
WHEN "0100100010" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(9569918,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(81229217,28);
logexp <= conv_std_logic_vector(1030,11);
WHEN "0100100011" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(9660770,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(131493851,28);
logexp <= conv_std_logic_vector(1030,11);
WHEN "0100100100" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(9751622,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(181758485,28);
logexp <= conv_std_logic_vector(1030,11);
WHEN "0100100101" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(9842474,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(232023119,28);
logexp <= conv_std_logic_vector(1030,11);
WHEN "0100100110" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(9933327,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(13852297,28);
logexp <= conv_std_logic_vector(1030,11);
WHEN "0100100111" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(10024179,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(64116931,28);
logexp <= conv_std_logic_vector(1030,11);
WHEN "0100101000" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(10115031,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(114381565,28);
logexp <= conv_std_logic_vector(1030,11);
WHEN "0100101001" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(10205883,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(164646199,28);
logexp <= conv_std_logic_vector(1030,11);
WHEN "0100101010" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(10296735,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(214910832,28);
logexp <= conv_std_logic_vector(1030,11);
WHEN "0100101011" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(10387587,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(265175466,28);
logexp <= conv_std_logic_vector(1030,11);
WHEN "0100101100" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(10478440,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(47004644,28);
logexp <= conv_std_logic_vector(1030,11);
WHEN "0100101101" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(10569292,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(97269278,28);
logexp <= conv_std_logic_vector(1030,11);
WHEN "0100101110" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(10660144,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(147533912,28);
logexp <= conv_std_logic_vector(1030,11);
WHEN "0100101111" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(10750996,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(197798546,28);
logexp <= conv_std_logic_vector(1030,11);
WHEN "0100110000" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(10841848,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(248063180,28);
logexp <= conv_std_logic_vector(1030,11);
WHEN "0100110001" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(10932701,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(29892358,28);
logexp <= conv_std_logic_vector(1030,11);
WHEN "0100110010" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(11023553,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(80156992,28);
logexp <= conv_std_logic_vector(1030,11);
WHEN "0100110011" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(11114405,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(130421626,28);
logexp <= conv_std_logic_vector(1030,11);
WHEN "0100110100" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(11205257,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(180686260,28);
logexp <= conv_std_logic_vector(1030,11);
WHEN "0100110101" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(11296109,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(230950894,28);
logexp <= conv_std_logic_vector(1030,11);
WHEN "0100110110" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(11386962,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(12780072,28);
logexp <= conv_std_logic_vector(1030,11);
WHEN "0100110111" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(11477814,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(63044706,28);
logexp <= conv_std_logic_vector(1030,11);
WHEN "0100111000" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(11568666,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(113309340,28);
logexp <= conv_std_logic_vector(1030,11);
WHEN "0100111001" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(11659518,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(163573973,28);
logexp <= conv_std_logic_vector(1030,11);
WHEN "0100111010" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(11750370,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(213838607,28);
logexp <= conv_std_logic_vector(1030,11);
WHEN "0100111011" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(11841222,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(264103241,28);
logexp <= conv_std_logic_vector(1030,11);
WHEN "0100111100" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(11932075,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(45932419,28);
logexp <= conv_std_logic_vector(1030,11);
WHEN "0100111101" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(12022927,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(96197053,28);
logexp <= conv_std_logic_vector(1030,11);
WHEN "0100111110" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(12113779,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(146461687,28);
logexp <= conv_std_logic_vector(1030,11);
WHEN "0100111111" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(12204631,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(196726321,28);
logexp <= conv_std_logic_vector(1030,11);
WHEN "0101000000" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(12295483,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(246990955,28);
logexp <= conv_std_logic_vector(1030,11);
WHEN "0101000001" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(12386336,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(28820133,28);
logexp <= conv_std_logic_vector(1030,11);
WHEN "0101000010" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(12477188,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(79084767,28);
logexp <= conv_std_logic_vector(1030,11);
WHEN "0101000011" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(12568040,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(129349401,28);
logexp <= conv_std_logic_vector(1030,11);
WHEN "0101000100" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(12658892,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(179614035,28);
logexp <= conv_std_logic_vector(1030,11);
WHEN "0101000101" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(12749744,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(229878669,28);
logexp <= conv_std_logic_vector(1030,11);
WHEN "0101000110" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(12840597,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(11707847,28);
logexp <= conv_std_logic_vector(1030,11);
WHEN "0101000111" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(12931449,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(61972481,28);
logexp <= conv_std_logic_vector(1030,11);
WHEN "0101001000" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(13022301,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(112237114,28);
logexp <= conv_std_logic_vector(1030,11);
WHEN "0101001001" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(13113153,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(162501748,28);
logexp <= conv_std_logic_vector(1030,11);
WHEN "0101001010" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(13204005,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(212766382,28);
logexp <= conv_std_logic_vector(1030,11);
WHEN "0101001011" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(13294857,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(263031016,28);
logexp <= conv_std_logic_vector(1030,11);
WHEN "0101001100" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(13385710,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(44860194,28);
logexp <= conv_std_logic_vector(1030,11);
WHEN "0101001101" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(13476562,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(95124828,28);
logexp <= conv_std_logic_vector(1030,11);
WHEN "0101001110" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(13567414,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(145389462,28);
logexp <= conv_std_logic_vector(1030,11);
WHEN "0101001111" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(13658266,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(195654096,28);
logexp <= conv_std_logic_vector(1030,11);
WHEN "0101010000" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(13749118,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(245918730,28);
logexp <= conv_std_logic_vector(1030,11);
WHEN "0101010001" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(13839971,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(27747908,28);
logexp <= conv_std_logic_vector(1030,11);
WHEN "0101010010" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(13930823,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(78012542,28);
logexp <= conv_std_logic_vector(1030,11);
WHEN "0101010011" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(14021675,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(128277176,28);
logexp <= conv_std_logic_vector(1030,11);
WHEN "0101010100" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(14112527,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(178541810,28);
logexp <= conv_std_logic_vector(1030,11);
WHEN "0101010101" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(14203379,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(228806444,28);
logexp <= conv_std_logic_vector(1030,11);
WHEN "0101010110" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(14294232,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(10635622,28);
logexp <= conv_std_logic_vector(1030,11);
WHEN "0101010111" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(14385084,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(60900256,28);
logexp <= conv_std_logic_vector(1030,11);
WHEN "0101011000" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(14475936,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(111164889,28);
logexp <= conv_std_logic_vector(1030,11);
WHEN "0101011001" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(14566788,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(161429523,28);
logexp <= conv_std_logic_vector(1030,11);
WHEN "0101011010" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(14657640,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(211694157,28);
logexp <= conv_std_logic_vector(1030,11);
WHEN "0101011011" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(14748492,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(261958791,28);
logexp <= conv_std_logic_vector(1030,11);
WHEN "0101011100" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(14839345,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(43787969,28);
logexp <= conv_std_logic_vector(1030,11);
WHEN "0101011101" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(14930197,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(94052603,28);
logexp <= conv_std_logic_vector(1030,11);
WHEN "0101011110" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(15021049,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(144317237,28);
logexp <= conv_std_logic_vector(1030,11);
WHEN "0101011111" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(15111901,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(194581871,28);
logexp <= conv_std_logic_vector(1030,11);
WHEN "0101100000" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(15202753,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(244846505,28);
logexp <= conv_std_logic_vector(1030,11);
WHEN "0101100001" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(15293606,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(26675683,28);
logexp <= conv_std_logic_vector(1030,11);
WHEN "0101100010" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(15384458,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(76940317,28);
logexp <= conv_std_logic_vector(1030,11);
WHEN "0101100011" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(15475310,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(127204951,28);
logexp <= conv_std_logic_vector(1030,11);
WHEN "0101100100" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(15566162,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(177469585,28);
logexp <= conv_std_logic_vector(1030,11);
WHEN "0101100101" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(15657014,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(227734219,28);
logexp <= conv_std_logic_vector(1030,11);
WHEN "0101100110" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(15747867,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(9563397,28);
logexp <= conv_std_logic_vector(1030,11);
WHEN "0101100111" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(15838719,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(59828030,28);
logexp <= conv_std_logic_vector(1030,11);
WHEN "0101101000" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(15929571,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(110092664,28);
logexp <= conv_std_logic_vector(1030,11);
WHEN "0101101001" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(16020423,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(160357298,28);
logexp <= conv_std_logic_vector(1030,11);
WHEN "0101101010" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(16111275,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(210621932,28);
logexp <= conv_std_logic_vector(1030,11);
WHEN "0101101011" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(16202127,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(260886566,28);
logexp <= conv_std_logic_vector(1030,11);
WHEN "0101101100" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(16292980,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(42715744,28);
logexp <= conv_std_logic_vector(1030,11);
WHEN "0101101101" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(16383832,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(92980378,28);
logexp <= conv_std_logic_vector(1030,11);
WHEN "0101101110" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(16474684,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(143245012,28);
logexp <= conv_std_logic_vector(1030,11);
WHEN "0101101111" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(16565536,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(193509646,28);
logexp <= conv_std_logic_vector(1030,11);
WHEN "0101110000" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(16656388,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(243774280,28);
logexp <= conv_std_logic_vector(1030,11);
WHEN "0101110001" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(16747241,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(25603458,28);
logexp <= conv_std_logic_vector(1030,11);
WHEN "0101110010" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(30438,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(172151774,28);
logexp <= conv_std_logic_vector(1031,11);
WHEN "0101110011" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(75864,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(197284091,28);
logexp <= conv_std_logic_vector(1031,11);
WHEN "0101110100" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(121290,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(222416408,28);
logexp <= conv_std_logic_vector(1031,11);
WHEN "0101110101" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(166716,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(247548725,28);
logexp <= conv_std_logic_vector(1031,11);
WHEN "0101110110" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(212143,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(4245586,28);
logexp <= conv_std_logic_vector(1031,11);
WHEN "0101110111" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(257569,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(29377903,28);
logexp <= conv_std_logic_vector(1031,11);
WHEN "0101111000" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(302995,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(54510220,28);
logexp <= conv_std_logic_vector(1031,11);
WHEN "0101111001" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(348421,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(79642537,28);
logexp <= conv_std_logic_vector(1031,11);
WHEN "0101111010" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(393847,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(104774854,28);
logexp <= conv_std_logic_vector(1031,11);
WHEN "0101111011" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(439273,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(129907171,28);
logexp <= conv_std_logic_vector(1031,11);
WHEN "0101111100" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(484699,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(155039488,28);
logexp <= conv_std_logic_vector(1031,11);
WHEN "0101111101" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(530125,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(180171805,28);
logexp <= conv_std_logic_vector(1031,11);
WHEN "0101111110" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(575551,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(205304121,28);
logexp <= conv_std_logic_vector(1031,11);
WHEN "0101111111" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(620977,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(230436438,28);
logexp <= conv_std_logic_vector(1031,11);
WHEN "0110000000" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(666403,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(255568755,28);
logexp <= conv_std_logic_vector(1031,11);
WHEN "0110000001" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(711830,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(12265616,28);
logexp <= conv_std_logic_vector(1031,11);
WHEN "0110000010" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(757256,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(37397933,28);
logexp <= conv_std_logic_vector(1031,11);
WHEN "0110000011" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(802682,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(62530250,28);
logexp <= conv_std_logic_vector(1031,11);
WHEN "0110000100" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(848108,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(87662567,28);
logexp <= conv_std_logic_vector(1031,11);
WHEN "0110000101" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(893534,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(112794884,28);
logexp <= conv_std_logic_vector(1031,11);
WHEN "0110000110" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(938960,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(137927201,28);
logexp <= conv_std_logic_vector(1031,11);
WHEN "0110000111" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(984386,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(163059518,28);
logexp <= conv_std_logic_vector(1031,11);
WHEN "0110001000" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(1029812,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(188191835,28);
logexp <= conv_std_logic_vector(1031,11);
WHEN "0110001001" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(1075238,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(213324152,28);
logexp <= conv_std_logic_vector(1031,11);
WHEN "0110001010" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(1120664,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(238456469,28);
logexp <= conv_std_logic_vector(1031,11);
WHEN "0110001011" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(1166090,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(263588786,28);
logexp <= conv_std_logic_vector(1031,11);
WHEN "0110001100" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(1211517,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(20285647,28);
logexp <= conv_std_logic_vector(1031,11);
WHEN "0110001101" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(1256943,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(45417964,28);
logexp <= conv_std_logic_vector(1031,11);
WHEN "0110001110" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(1302369,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(70550281,28);
logexp <= conv_std_logic_vector(1031,11);
WHEN "0110001111" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(1347795,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(95682598,28);
logexp <= conv_std_logic_vector(1031,11);
WHEN "0110010000" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(1393221,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(120814915,28);
logexp <= conv_std_logic_vector(1031,11);
WHEN "0110010001" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(1438647,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(145947232,28);
logexp <= conv_std_logic_vector(1031,11);
WHEN "0110010010" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(1484073,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(171079549,28);
logexp <= conv_std_logic_vector(1031,11);
WHEN "0110010011" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(1529499,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(196211866,28);
logexp <= conv_std_logic_vector(1031,11);
WHEN "0110010100" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(1574925,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(221344183,28);
logexp <= conv_std_logic_vector(1031,11);
WHEN "0110010101" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(1620351,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(246476500,28);
logexp <= conv_std_logic_vector(1031,11);
WHEN "0110010110" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(1665778,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(3173361,28);
logexp <= conv_std_logic_vector(1031,11);
WHEN "0110010111" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(1711204,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(28305678,28);
logexp <= conv_std_logic_vector(1031,11);
WHEN "0110011000" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(1756630,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(53437995,28);
logexp <= conv_std_logic_vector(1031,11);
WHEN "0110011001" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(1802056,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(78570312,28);
logexp <= conv_std_logic_vector(1031,11);
WHEN "0110011010" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(1847482,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(103702629,28);
logexp <= conv_std_logic_vector(1031,11);
WHEN "0110011011" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(1892908,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(128834946,28);
logexp <= conv_std_logic_vector(1031,11);
WHEN "0110011100" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(1938334,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(153967262,28);
logexp <= conv_std_logic_vector(1031,11);
WHEN "0110011101" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(1983760,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(179099579,28);
logexp <= conv_std_logic_vector(1031,11);
WHEN "0110011110" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(2029186,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(204231896,28);
logexp <= conv_std_logic_vector(1031,11);
WHEN "0110011111" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(2074612,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(229364213,28);
logexp <= conv_std_logic_vector(1031,11);
WHEN "0110100000" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(2120038,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(254496530,28);
logexp <= conv_std_logic_vector(1031,11);
WHEN "0110100001" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(2165465,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(11193391,28);
logexp <= conv_std_logic_vector(1031,11);
WHEN "0110100010" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(2210891,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(36325708,28);
logexp <= conv_std_logic_vector(1031,11);
WHEN "0110100011" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(2256317,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(61458025,28);
logexp <= conv_std_logic_vector(1031,11);
WHEN "0110100100" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(2301743,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(86590342,28);
logexp <= conv_std_logic_vector(1031,11);
WHEN "0110100101" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(2347169,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(111722659,28);
logexp <= conv_std_logic_vector(1031,11);
WHEN "0110100110" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(2392595,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(136854976,28);
logexp <= conv_std_logic_vector(1031,11);
WHEN "0110100111" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(2438021,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(161987293,28);
logexp <= conv_std_logic_vector(1031,11);
WHEN "0110101000" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(2483447,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(187119610,28);
logexp <= conv_std_logic_vector(1031,11);
WHEN "0110101001" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(2528873,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(212251927,28);
logexp <= conv_std_logic_vector(1031,11);
WHEN "0110101010" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(2574299,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(237384244,28);
logexp <= conv_std_logic_vector(1031,11);
WHEN "0110101011" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(2619725,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(262516561,28);
logexp <= conv_std_logic_vector(1031,11);
WHEN "0110101100" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(2665152,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(19213422,28);
logexp <= conv_std_logic_vector(1031,11);
WHEN "0110101101" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(2710578,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(44345739,28);
logexp <= conv_std_logic_vector(1031,11);
WHEN "0110101110" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(2756004,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(69478056,28);
logexp <= conv_std_logic_vector(1031,11);
WHEN "0110101111" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(2801430,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(94610373,28);
logexp <= conv_std_logic_vector(1031,11);
WHEN "0110110000" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(2846856,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(119742690,28);
logexp <= conv_std_logic_vector(1031,11);
WHEN "0110110001" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(2892282,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(144875007,28);
logexp <= conv_std_logic_vector(1031,11);
WHEN "0110110010" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(2937708,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(170007324,28);
logexp <= conv_std_logic_vector(1031,11);
WHEN "0110110011" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(2983134,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(195139641,28);
logexp <= conv_std_logic_vector(1031,11);
WHEN "0110110100" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(3028560,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(220271958,28);
logexp <= conv_std_logic_vector(1031,11);
WHEN "0110110101" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(3073986,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(245404275,28);
logexp <= conv_std_logic_vector(1031,11);
WHEN "0110110110" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(3119413,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(2101136,28);
logexp <= conv_std_logic_vector(1031,11);
WHEN "0110110111" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(3164839,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(27233453,28);
logexp <= conv_std_logic_vector(1031,11);
WHEN "0110111000" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(3210265,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(52365770,28);
logexp <= conv_std_logic_vector(1031,11);
WHEN "0110111001" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(3255691,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(77498087,28);
logexp <= conv_std_logic_vector(1031,11);
WHEN "0110111010" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(3301117,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(102630404,28);
logexp <= conv_std_logic_vector(1031,11);
WHEN "0110111011" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(3346543,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(127762720,28);
logexp <= conv_std_logic_vector(1031,11);
WHEN "0110111100" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(3391969,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(152895037,28);
logexp <= conv_std_logic_vector(1031,11);
WHEN "0110111101" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(3437395,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(178027354,28);
logexp <= conv_std_logic_vector(1031,11);
WHEN "0110111110" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(3482821,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(203159671,28);
logexp <= conv_std_logic_vector(1031,11);
WHEN "0110111111" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(3528247,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(228291988,28);
logexp <= conv_std_logic_vector(1031,11);
WHEN "0111000000" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(3573673,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(253424305,28);
logexp <= conv_std_logic_vector(1031,11);
WHEN "0111000001" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(3619100,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(10121166,28);
logexp <= conv_std_logic_vector(1031,11);
WHEN "0111000010" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(3664526,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(35253483,28);
logexp <= conv_std_logic_vector(1031,11);
WHEN "0111000011" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(3709952,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(60385800,28);
logexp <= conv_std_logic_vector(1031,11);
WHEN "0111000100" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(3755378,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(85518117,28);
logexp <= conv_std_logic_vector(1031,11);
WHEN "0111000101" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(3800804,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(110650434,28);
logexp <= conv_std_logic_vector(1031,11);
WHEN "0111000110" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(3846230,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(135782751,28);
logexp <= conv_std_logic_vector(1031,11);
WHEN "0111000111" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(3891656,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(160915068,28);
logexp <= conv_std_logic_vector(1031,11);
WHEN "0111001000" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(3937082,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(186047385,28);
logexp <= conv_std_logic_vector(1031,11);
WHEN "0111001001" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(3982508,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(211179702,28);
logexp <= conv_std_logic_vector(1031,11);
WHEN "0111001010" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(4027934,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(236312019,28);
logexp <= conv_std_logic_vector(1031,11);
WHEN "0111001011" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(4073360,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(261444336,28);
logexp <= conv_std_logic_vector(1031,11);
WHEN "0111001100" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(4118787,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(18141197,28);
logexp <= conv_std_logic_vector(1031,11);
WHEN "0111001101" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(4164213,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(43273514,28);
logexp <= conv_std_logic_vector(1031,11);
WHEN "0111001110" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(4209639,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(68405831,28);
logexp <= conv_std_logic_vector(1031,11);
WHEN "0111001111" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(4255065,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(93538148,28);
logexp <= conv_std_logic_vector(1031,11);
WHEN "0111010000" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(4300491,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(118670465,28);
logexp <= conv_std_logic_vector(1031,11);
WHEN "0111010001" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(4345917,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(143802782,28);
logexp <= conv_std_logic_vector(1031,11);
WHEN "0111010010" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(4391343,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(168935099,28);
logexp <= conv_std_logic_vector(1031,11);
WHEN "0111010011" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(4436769,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(194067416,28);
logexp <= conv_std_logic_vector(1031,11);
WHEN "0111010100" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(4482195,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(219199733,28);
logexp <= conv_std_logic_vector(1031,11);
WHEN "0111010101" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(4527621,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(244332050,28);
logexp <= conv_std_logic_vector(1031,11);
WHEN "0111010110" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(4573048,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(1028911,28);
logexp <= conv_std_logic_vector(1031,11);
WHEN "0111010111" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(4618474,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(26161228,28);
logexp <= conv_std_logic_vector(1031,11);
WHEN "0111011000" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(4663900,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(51293545,28);
logexp <= conv_std_logic_vector(1031,11);
WHEN "0111011001" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(4709326,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(76425861,28);
logexp <= conv_std_logic_vector(1031,11);
WHEN "0111011010" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(4754752,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(101558178,28);
logexp <= conv_std_logic_vector(1031,11);
WHEN "0111011011" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(4800178,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(126690495,28);
logexp <= conv_std_logic_vector(1031,11);
WHEN "0111011100" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(4845604,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(151822812,28);
logexp <= conv_std_logic_vector(1031,11);
WHEN "0111011101" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(4891030,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(176955129,28);
logexp <= conv_std_logic_vector(1031,11);
WHEN "0111011110" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(4936456,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(202087446,28);
logexp <= conv_std_logic_vector(1031,11);
WHEN "0111011111" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(4981882,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(227219763,28);
logexp <= conv_std_logic_vector(1031,11);
WHEN "0111100000" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(5027308,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(252352080,28);
logexp <= conv_std_logic_vector(1031,11);
WHEN "0111100001" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(5072735,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(9048941,28);
logexp <= conv_std_logic_vector(1031,11);
WHEN "0111100010" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(5118161,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(34181258,28);
logexp <= conv_std_logic_vector(1031,11);
WHEN "0111100011" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(5163587,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(59313575,28);
logexp <= conv_std_logic_vector(1031,11);
WHEN "0111100100" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(5209013,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(84445892,28);
logexp <= conv_std_logic_vector(1031,11);
WHEN "0111100101" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(5254439,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(109578209,28);
logexp <= conv_std_logic_vector(1031,11);
WHEN "0111100110" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(5299865,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(134710526,28);
logexp <= conv_std_logic_vector(1031,11);
WHEN "0111100111" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(5345291,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(159842843,28);
logexp <= conv_std_logic_vector(1031,11);
WHEN "0111101000" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(5390717,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(184975160,28);
logexp <= conv_std_logic_vector(1031,11);
WHEN "0111101001" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(5436143,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(210107477,28);
logexp <= conv_std_logic_vector(1031,11);
WHEN "0111101010" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(5481569,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(235239794,28);
logexp <= conv_std_logic_vector(1031,11);
WHEN "0111101011" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(5526995,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(260372111,28);
logexp <= conv_std_logic_vector(1031,11);
WHEN "0111101100" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(5572422,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(17068972,28);
logexp <= conv_std_logic_vector(1031,11);
WHEN "0111101101" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(5617848,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(42201289,28);
logexp <= conv_std_logic_vector(1031,11);
WHEN "0111101110" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(5663274,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(67333606,28);
logexp <= conv_std_logic_vector(1031,11);
WHEN "0111101111" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(5708700,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(92465923,28);
logexp <= conv_std_logic_vector(1031,11);
WHEN "0111110000" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(5754126,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(117598240,28);
logexp <= conv_std_logic_vector(1031,11);
WHEN "0111110001" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(5799552,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(142730557,28);
logexp <= conv_std_logic_vector(1031,11);
WHEN "0111110010" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(5844978,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(167862874,28);
logexp <= conv_std_logic_vector(1031,11);
WHEN "0111110011" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(5890404,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(192995191,28);
logexp <= conv_std_logic_vector(1031,11);
WHEN "0111110100" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(5935830,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(218127508,28);
logexp <= conv_std_logic_vector(1031,11);
WHEN "0111110101" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(5981256,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(243259825,28);
logexp <= conv_std_logic_vector(1031,11);
WHEN "0111110110" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(6026682,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(268392142,28);
logexp <= conv_std_logic_vector(1031,11);
WHEN "0111110111" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(6072109,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(25089003,28);
logexp <= conv_std_logic_vector(1031,11);
WHEN "0111111000" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(6117535,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(50221319,28);
logexp <= conv_std_logic_vector(1031,11);
WHEN "0111111001" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(6162961,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(75353636,28);
logexp <= conv_std_logic_vector(1031,11);
WHEN "0111111010" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(6208387,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(100485953,28);
logexp <= conv_std_logic_vector(1031,11);
WHEN "0111111011" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(6253813,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(125618270,28);
logexp <= conv_std_logic_vector(1031,11);
WHEN "0111111100" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(6299239,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(150750587,28);
logexp <= conv_std_logic_vector(1031,11);
WHEN "0111111101" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(6344665,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(175882904,28);
logexp <= conv_std_logic_vector(1031,11);
WHEN "0111111110" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(6390091,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(201015221,28);
logexp <= conv_std_logic_vector(1031,11);
WHEN "0111111111" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(6435517,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(226147538,28);
logexp <= conv_std_logic_vector(1031,11);
WHEN "1000000000" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(6480943,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(251279855,28);
logexp <= conv_std_logic_vector(1031,11);
WHEN "1000000001" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(6526370,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(7976716,28);
logexp <= conv_std_logic_vector(1031,11);
WHEN "1000000010" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(6571796,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(33109033,28);
logexp <= conv_std_logic_vector(1031,11);
WHEN "1000000011" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(6617222,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(58241350,28);
logexp <= conv_std_logic_vector(1031,11);
WHEN "1000000100" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(6662648,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(83373667,28);
logexp <= conv_std_logic_vector(1031,11);
WHEN "1000000101" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(6708074,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(108505984,28);
logexp <= conv_std_logic_vector(1031,11);
WHEN "1000000110" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(6753500,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(133638301,28);
logexp <= conv_std_logic_vector(1031,11);
WHEN "1000000111" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(6798926,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(158770618,28);
logexp <= conv_std_logic_vector(1031,11);
WHEN "1000001000" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(6844352,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(183902935,28);
logexp <= conv_std_logic_vector(1031,11);
WHEN "1000001001" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(6889778,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(209035252,28);
logexp <= conv_std_logic_vector(1031,11);
WHEN "1000001010" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(6935204,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(234167569,28);
logexp <= conv_std_logic_vector(1031,11);
WHEN "1000001011" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(6980630,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(259299886,28);
logexp <= conv_std_logic_vector(1031,11);
WHEN "1000001100" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(7026057,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(15996747,28);
logexp <= conv_std_logic_vector(1031,11);
WHEN "1000001101" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(7071483,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(41129064,28);
logexp <= conv_std_logic_vector(1031,11);
WHEN "1000001110" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(7116909,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(66261381,28);
logexp <= conv_std_logic_vector(1031,11);
WHEN "1000001111" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(7162335,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(91393698,28);
logexp <= conv_std_logic_vector(1031,11);
WHEN "1000010000" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(7207761,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(116526015,28);
logexp <= conv_std_logic_vector(1031,11);
WHEN "1000010001" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(7253187,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(141658332,28);
logexp <= conv_std_logic_vector(1031,11);
WHEN "1000010010" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(7298613,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(166790649,28);
logexp <= conv_std_logic_vector(1031,11);
WHEN "1000010011" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(7344039,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(191922966,28);
logexp <= conv_std_logic_vector(1031,11);
WHEN "1000010100" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(7389465,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(217055283,28);
logexp <= conv_std_logic_vector(1031,11);
WHEN "1000010101" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(7434891,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(242187600,28);
logexp <= conv_std_logic_vector(1031,11);
WHEN "1000010110" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(7480317,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(267319916,28);
logexp <= conv_std_logic_vector(1031,11);
WHEN "1000010111" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(7525744,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(24016777,28);
logexp <= conv_std_logic_vector(1031,11);
WHEN "1000011000" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(7571170,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(49149094,28);
logexp <= conv_std_logic_vector(1031,11);
WHEN "1000011001" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(7616596,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(74281411,28);
logexp <= conv_std_logic_vector(1031,11);
WHEN "1000011010" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(7662022,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(99413728,28);
logexp <= conv_std_logic_vector(1031,11);
WHEN "1000011011" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(7707448,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(124546045,28);
logexp <= conv_std_logic_vector(1031,11);
WHEN "1000011100" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(7752874,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(149678362,28);
logexp <= conv_std_logic_vector(1031,11);
WHEN "1000011101" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(7798300,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(174810679,28);
logexp <= conv_std_logic_vector(1031,11);
WHEN "1000011110" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(7843726,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(199942996,28);
logexp <= conv_std_logic_vector(1031,11);
WHEN "1000011111" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(7889152,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(225075313,28);
logexp <= conv_std_logic_vector(1031,11);
WHEN "1000100000" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(7934578,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(250207630,28);
logexp <= conv_std_logic_vector(1031,11);
WHEN "1000100001" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(7980005,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(6904491,28);
logexp <= conv_std_logic_vector(1031,11);
WHEN "1000100010" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(8025431,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(32036808,28);
logexp <= conv_std_logic_vector(1031,11);
WHEN "1000100011" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(8070857,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(57169125,28);
logexp <= conv_std_logic_vector(1031,11);
WHEN "1000100100" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(8116283,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(82301442,28);
logexp <= conv_std_logic_vector(1031,11);
WHEN "1000100101" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(8161709,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(107433759,28);
logexp <= conv_std_logic_vector(1031,11);
WHEN "1000100110" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(8207135,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(132566076,28);
logexp <= conv_std_logic_vector(1031,11);
WHEN "1000100111" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(8252561,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(157698393,28);
logexp <= conv_std_logic_vector(1031,11);
WHEN "1000101000" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(8297987,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(182830710,28);
logexp <= conv_std_logic_vector(1031,11);
WHEN "1000101001" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(8343413,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(207963027,28);
logexp <= conv_std_logic_vector(1031,11);
WHEN "1000101010" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(8388839,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(233095344,28);
logexp <= conv_std_logic_vector(1031,11);
WHEN "1000101011" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(8434265,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(258227661,28);
logexp <= conv_std_logic_vector(1031,11);
WHEN "1000101100" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(8479692,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(14924522,28);
logexp <= conv_std_logic_vector(1031,11);
WHEN "1000101101" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(8525118,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(40056839,28);
logexp <= conv_std_logic_vector(1031,11);
WHEN "1000101110" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(8570544,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(65189156,28);
logexp <= conv_std_logic_vector(1031,11);
WHEN "1000101111" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(8615970,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(90321473,28);
logexp <= conv_std_logic_vector(1031,11);
WHEN "1000110000" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(8661396,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(115453790,28);
logexp <= conv_std_logic_vector(1031,11);
WHEN "1000110001" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(8706822,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(140586107,28);
logexp <= conv_std_logic_vector(1031,11);
WHEN "1000110010" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(8752248,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(165718424,28);
logexp <= conv_std_logic_vector(1031,11);
WHEN "1000110011" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(8797674,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(190850741,28);
logexp <= conv_std_logic_vector(1031,11);
WHEN "1000110100" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(8843100,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(215983058,28);
logexp <= conv_std_logic_vector(1031,11);
WHEN "1000110101" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(8888526,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(241115374,28);
logexp <= conv_std_logic_vector(1031,11);
WHEN "1000110110" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(8933952,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(266247691,28);
logexp <= conv_std_logic_vector(1031,11);
WHEN "1000110111" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(8979379,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(22944552,28);
logexp <= conv_std_logic_vector(1031,11);
WHEN "1000111000" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(9024805,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(48076869,28);
logexp <= conv_std_logic_vector(1031,11);
WHEN "1000111001" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(9070231,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(73209186,28);
logexp <= conv_std_logic_vector(1031,11);
WHEN "1000111010" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(9115657,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(98341503,28);
logexp <= conv_std_logic_vector(1031,11);
WHEN "1000111011" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(9161083,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(123473820,28);
logexp <= conv_std_logic_vector(1031,11);
WHEN "1000111100" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(9206509,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(148606137,28);
logexp <= conv_std_logic_vector(1031,11);
WHEN "1000111101" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(9251935,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(173738454,28);
logexp <= conv_std_logic_vector(1031,11);
WHEN "1000111110" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(9297361,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(198870771,28);
logexp <= conv_std_logic_vector(1031,11);
WHEN "1000111111" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(9342787,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(224003088,28);
logexp <= conv_std_logic_vector(1031,11);
WHEN "1001000000" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(9388213,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(249135405,28);
logexp <= conv_std_logic_vector(1031,11);
WHEN "1001000001" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(9433640,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(5832266,28);
logexp <= conv_std_logic_vector(1031,11);
WHEN "1001000010" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(9479066,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(30964583,28);
logexp <= conv_std_logic_vector(1031,11);
WHEN "1001000011" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(9524492,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(56096900,28);
logexp <= conv_std_logic_vector(1031,11);
WHEN "1001000100" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(9569918,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(81229217,28);
logexp <= conv_std_logic_vector(1031,11);
WHEN "1001000101" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(9615344,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(106361534,28);
logexp <= conv_std_logic_vector(1031,11);
WHEN "1001000110" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(9660770,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(131493851,28);
logexp <= conv_std_logic_vector(1031,11);
WHEN "1001000111" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(9706196,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(156626168,28);
logexp <= conv_std_logic_vector(1031,11);
WHEN "1001001000" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(9751622,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(181758485,28);
logexp <= conv_std_logic_vector(1031,11);
WHEN "1001001001" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(9797048,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(206890802,28);
logexp <= conv_std_logic_vector(1031,11);
WHEN "1001001010" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(9842474,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(232023119,28);
logexp <= conv_std_logic_vector(1031,11);
WHEN "1001001011" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(9887900,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(257155436,28);
logexp <= conv_std_logic_vector(1031,11);
WHEN "1001001100" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(9933327,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(13852297,28);
logexp <= conv_std_logic_vector(1031,11);
WHEN "1001001101" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(9978753,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(38984614,28);
logexp <= conv_std_logic_vector(1031,11);
WHEN "1001001110" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(10024179,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(64116931,28);
logexp <= conv_std_logic_vector(1031,11);
WHEN "1001001111" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(10069605,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(89249248,28);
logexp <= conv_std_logic_vector(1031,11);
WHEN "1001010000" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(10115031,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(114381565,28);
logexp <= conv_std_logic_vector(1031,11);
WHEN "1001010001" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(10160457,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(139513882,28);
logexp <= conv_std_logic_vector(1031,11);
WHEN "1001010010" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(10205883,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(164646199,28);
logexp <= conv_std_logic_vector(1031,11);
WHEN "1001010011" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(10251309,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(189778515,28);
logexp <= conv_std_logic_vector(1031,11);
WHEN "1001010100" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(10296735,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(214910832,28);
logexp <= conv_std_logic_vector(1031,11);
WHEN "1001010101" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(10342161,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(240043149,28);
logexp <= conv_std_logic_vector(1031,11);
WHEN "1001010110" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(10387587,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(265175466,28);
logexp <= conv_std_logic_vector(1031,11);
WHEN "1001010111" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(10433014,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(21872327,28);
logexp <= conv_std_logic_vector(1031,11);
WHEN "1001011000" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(10478440,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(47004644,28);
logexp <= conv_std_logic_vector(1031,11);
WHEN "1001011001" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(10523866,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(72136961,28);
logexp <= conv_std_logic_vector(1031,11);
WHEN "1001011010" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(10569292,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(97269278,28);
logexp <= conv_std_logic_vector(1031,11);
WHEN "1001011011" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(10614718,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(122401595,28);
logexp <= conv_std_logic_vector(1031,11);
WHEN "1001011100" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(10660144,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(147533912,28);
logexp <= conv_std_logic_vector(1031,11);
WHEN "1001011101" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(10705570,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(172666229,28);
logexp <= conv_std_logic_vector(1031,11);
WHEN "1001011110" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(10750996,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(197798546,28);
logexp <= conv_std_logic_vector(1031,11);
WHEN "1001011111" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(10796422,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(222930863,28);
logexp <= conv_std_logic_vector(1031,11);
WHEN "1001100000" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(10841848,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(248063180,28);
logexp <= conv_std_logic_vector(1031,11);
WHEN "1001100001" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(10887275,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(4760041,28);
logexp <= conv_std_logic_vector(1031,11);
WHEN "1001100010" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(10932701,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(29892358,28);
logexp <= conv_std_logic_vector(1031,11);
WHEN "1001100011" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(10978127,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(55024675,28);
logexp <= conv_std_logic_vector(1031,11);
WHEN "1001100100" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(11023553,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(80156992,28);
logexp <= conv_std_logic_vector(1031,11);
WHEN "1001100101" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(11068979,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(105289309,28);
logexp <= conv_std_logic_vector(1031,11);
WHEN "1001100110" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(11114405,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(130421626,28);
logexp <= conv_std_logic_vector(1031,11);
WHEN "1001100111" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(11159831,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(155553943,28);
logexp <= conv_std_logic_vector(1031,11);
WHEN "1001101000" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(11205257,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(180686260,28);
logexp <= conv_std_logic_vector(1031,11);
WHEN "1001101001" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(11250683,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(205818577,28);
logexp <= conv_std_logic_vector(1031,11);
WHEN "1001101010" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(11296109,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(230950894,28);
logexp <= conv_std_logic_vector(1031,11);
WHEN "1001101011" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(11341535,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(256083211,28);
logexp <= conv_std_logic_vector(1031,11);
WHEN "1001101100" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(11386962,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(12780072,28);
logexp <= conv_std_logic_vector(1031,11);
WHEN "1001101101" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(11432388,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(37912389,28);
logexp <= conv_std_logic_vector(1031,11);
WHEN "1001101110" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(11477814,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(63044706,28);
logexp <= conv_std_logic_vector(1031,11);
WHEN "1001101111" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(11523240,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(88177023,28);
logexp <= conv_std_logic_vector(1031,11);
WHEN "1001110000" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(11568666,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(113309340,28);
logexp <= conv_std_logic_vector(1031,11);
WHEN "1001110001" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(11614092,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(138441657,28);
logexp <= conv_std_logic_vector(1031,11);
WHEN "1001110010" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(11659518,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(163573973,28);
logexp <= conv_std_logic_vector(1031,11);
WHEN "1001110011" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(11704944,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(188706290,28);
logexp <= conv_std_logic_vector(1031,11);
WHEN "1001110100" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(11750370,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(213838607,28);
logexp <= conv_std_logic_vector(1031,11);
WHEN "1001110101" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(11795796,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(238970924,28);
logexp <= conv_std_logic_vector(1031,11);
WHEN "1001110110" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(11841222,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(264103241,28);
logexp <= conv_std_logic_vector(1031,11);
WHEN "1001110111" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(11886649,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(20800102,28);
logexp <= conv_std_logic_vector(1031,11);
WHEN "1001111000" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(11932075,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(45932419,28);
logexp <= conv_std_logic_vector(1031,11);
WHEN "1001111001" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(11977501,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(71064736,28);
logexp <= conv_std_logic_vector(1031,11);
WHEN "1001111010" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(12022927,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(96197053,28);
logexp <= conv_std_logic_vector(1031,11);
WHEN "1001111011" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(12068353,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(121329370,28);
logexp <= conv_std_logic_vector(1031,11);
WHEN "1001111100" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(12113779,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(146461687,28);
logexp <= conv_std_logic_vector(1031,11);
WHEN "1001111101" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(12159205,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(171594004,28);
logexp <= conv_std_logic_vector(1031,11);
WHEN "1001111110" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(12204631,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(196726321,28);
logexp <= conv_std_logic_vector(1031,11);
WHEN "1001111111" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(12250057,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(221858638,28);
logexp <= conv_std_logic_vector(1031,11);
WHEN "1010000000" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(12295483,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(246990955,28);
logexp <= conv_std_logic_vector(1031,11);
WHEN "1010000001" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(12340910,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(3687816,28);
logexp <= conv_std_logic_vector(1031,11);
WHEN "1010000010" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(12386336,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(28820133,28);
logexp <= conv_std_logic_vector(1031,11);
WHEN "1010000011" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(12431762,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(53952450,28);
logexp <= conv_std_logic_vector(1031,11);
WHEN "1010000100" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(12477188,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(79084767,28);
logexp <= conv_std_logic_vector(1031,11);
WHEN "1010000101" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(12522614,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(104217084,28);
logexp <= conv_std_logic_vector(1031,11);
WHEN "1010000110" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(12568040,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(129349401,28);
logexp <= conv_std_logic_vector(1031,11);
WHEN "1010000111" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(12613466,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(154481718,28);
logexp <= conv_std_logic_vector(1031,11);
WHEN "1010001000" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(12658892,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(179614035,28);
logexp <= conv_std_logic_vector(1031,11);
WHEN "1010001001" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(12704318,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(204746352,28);
logexp <= conv_std_logic_vector(1031,11);
WHEN "1010001010" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(12749744,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(229878669,28);
logexp <= conv_std_logic_vector(1031,11);
WHEN "1010001011" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(12795170,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(255010986,28);
logexp <= conv_std_logic_vector(1031,11);
WHEN "1010001100" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(12840597,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(11707847,28);
logexp <= conv_std_logic_vector(1031,11);
WHEN "1010001101" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(12886023,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(36840164,28);
logexp <= conv_std_logic_vector(1031,11);
WHEN "1010001110" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(12931449,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(61972481,28);
logexp <= conv_std_logic_vector(1031,11);
WHEN "1010001111" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(12976875,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(87104798,28);
logexp <= conv_std_logic_vector(1031,11);
WHEN "1010010000" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(13022301,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(112237114,28);
logexp <= conv_std_logic_vector(1031,11);
WHEN "1010010001" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(13067727,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(137369431,28);
logexp <= conv_std_logic_vector(1031,11);
WHEN "1010010010" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(13113153,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(162501748,28);
logexp <= conv_std_logic_vector(1031,11);
WHEN "1010010011" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(13158579,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(187634065,28);
logexp <= conv_std_logic_vector(1031,11);
WHEN "1010010100" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(13204005,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(212766382,28);
logexp <= conv_std_logic_vector(1031,11);
WHEN "1010010101" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(13249431,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(237898699,28);
logexp <= conv_std_logic_vector(1031,11);
WHEN "1010010110" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(13294857,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(263031016,28);
logexp <= conv_std_logic_vector(1031,11);
WHEN "1010010111" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(13340284,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(19727877,28);
logexp <= conv_std_logic_vector(1031,11);
WHEN "1010011000" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(13385710,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(44860194,28);
logexp <= conv_std_logic_vector(1031,11);
WHEN "1010011001" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(13431136,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(69992511,28);
logexp <= conv_std_logic_vector(1031,11);
WHEN "1010011010" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(13476562,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(95124828,28);
logexp <= conv_std_logic_vector(1031,11);
WHEN "1010011011" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(13521988,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(120257145,28);
logexp <= conv_std_logic_vector(1031,11);
WHEN "1010011100" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(13567414,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(145389462,28);
logexp <= conv_std_logic_vector(1031,11);
WHEN "1010011101" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(13612840,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(170521779,28);
logexp <= conv_std_logic_vector(1031,11);
WHEN "1010011110" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(13658266,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(195654096,28);
logexp <= conv_std_logic_vector(1031,11);
WHEN "1010011111" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(13703692,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(220786413,28);
logexp <= conv_std_logic_vector(1031,11);
WHEN "1010100000" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(13749118,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(245918730,28);
logexp <= conv_std_logic_vector(1031,11);
WHEN "1010100001" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(13794545,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(2615591,28);
logexp <= conv_std_logic_vector(1031,11);
WHEN "1010100010" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(13839971,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(27747908,28);
logexp <= conv_std_logic_vector(1031,11);
WHEN "1010100011" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(13885397,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(52880225,28);
logexp <= conv_std_logic_vector(1031,11);
WHEN "1010100100" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(13930823,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(78012542,28);
logexp <= conv_std_logic_vector(1031,11);
WHEN "1010100101" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(13976249,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(103144859,28);
logexp <= conv_std_logic_vector(1031,11);
WHEN "1010100110" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(14021675,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(128277176,28);
logexp <= conv_std_logic_vector(1031,11);
WHEN "1010100111" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(14067101,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(153409493,28);
logexp <= conv_std_logic_vector(1031,11);
WHEN "1010101000" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(14112527,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(178541810,28);
logexp <= conv_std_logic_vector(1031,11);
WHEN "1010101001" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(14157953,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(203674127,28);
logexp <= conv_std_logic_vector(1031,11);
WHEN "1010101010" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(14203379,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(228806444,28);
logexp <= conv_std_logic_vector(1031,11);
WHEN "1010101011" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(14248805,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(253938761,28);
logexp <= conv_std_logic_vector(1031,11);
WHEN "1010101100" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(14294232,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(10635622,28);
logexp <= conv_std_logic_vector(1031,11);
WHEN "1010101101" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(14339658,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(35767939,28);
logexp <= conv_std_logic_vector(1031,11);
WHEN "1010101110" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(14385084,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(60900256,28);
logexp <= conv_std_logic_vector(1031,11);
WHEN "1010101111" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(14430510,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(86032572,28);
logexp <= conv_std_logic_vector(1031,11);
WHEN "1010110000" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(14475936,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(111164889,28);
logexp <= conv_std_logic_vector(1031,11);
WHEN "1010110001" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(14521362,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(136297206,28);
logexp <= conv_std_logic_vector(1031,11);
WHEN "1010110010" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(14566788,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(161429523,28);
logexp <= conv_std_logic_vector(1031,11);
WHEN "1010110011" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(14612214,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(186561840,28);
logexp <= conv_std_logic_vector(1031,11);
WHEN "1010110100" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(14657640,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(211694157,28);
logexp <= conv_std_logic_vector(1031,11);
WHEN "1010110101" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(14703066,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(236826474,28);
logexp <= conv_std_logic_vector(1031,11);
WHEN "1010110110" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(14748492,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(261958791,28);
logexp <= conv_std_logic_vector(1031,11);
WHEN "1010110111" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(14793919,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(18655652,28);
logexp <= conv_std_logic_vector(1031,11);
WHEN "1010111000" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(14839345,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(43787969,28);
logexp <= conv_std_logic_vector(1031,11);
WHEN "1010111001" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(14884771,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(68920286,28);
logexp <= conv_std_logic_vector(1031,11);
WHEN "1010111010" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(14930197,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(94052603,28);
logexp <= conv_std_logic_vector(1031,11);
WHEN "1010111011" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(14975623,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(119184920,28);
logexp <= conv_std_logic_vector(1031,11);
WHEN "1010111100" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(15021049,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(144317237,28);
logexp <= conv_std_logic_vector(1031,11);
WHEN "1010111101" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(15066475,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(169449554,28);
logexp <= conv_std_logic_vector(1031,11);
WHEN "1010111110" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(15111901,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(194581871,28);
logexp <= conv_std_logic_vector(1031,11);
WHEN "1010111111" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(15157327,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(219714188,28);
logexp <= conv_std_logic_vector(1031,11);
WHEN "1011000000" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(15202753,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(244846505,28);
logexp <= conv_std_logic_vector(1031,11);
WHEN "1011000001" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(15248180,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(1543366,28);
logexp <= conv_std_logic_vector(1031,11);
WHEN "1011000010" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(15293606,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(26675683,28);
logexp <= conv_std_logic_vector(1031,11);
WHEN "1011000011" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(15339032,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(51808000,28);
logexp <= conv_std_logic_vector(1031,11);
WHEN "1011000100" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(15384458,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(76940317,28);
logexp <= conv_std_logic_vector(1031,11);
WHEN "1011000101" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(15429884,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(102072634,28);
logexp <= conv_std_logic_vector(1031,11);
WHEN "1011000110" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(15475310,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(127204951,28);
logexp <= conv_std_logic_vector(1031,11);
WHEN "1011000111" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(15520736,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(152337268,28);
logexp <= conv_std_logic_vector(1031,11);
WHEN "1011001000" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(15566162,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(177469585,28);
logexp <= conv_std_logic_vector(1031,11);
WHEN "1011001001" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(15611588,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(202601902,28);
logexp <= conv_std_logic_vector(1031,11);
WHEN "1011001010" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(15657014,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(227734219,28);
logexp <= conv_std_logic_vector(1031,11);
WHEN "1011001011" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(15702440,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(252866536,28);
logexp <= conv_std_logic_vector(1031,11);
WHEN "1011001100" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(15747867,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(9563397,28);
logexp <= conv_std_logic_vector(1031,11);
WHEN "1011001101" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(15793293,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(34695713,28);
logexp <= conv_std_logic_vector(1031,11);
WHEN "1011001110" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(15838719,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(59828030,28);
logexp <= conv_std_logic_vector(1031,11);
WHEN "1011001111" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(15884145,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(84960347,28);
logexp <= conv_std_logic_vector(1031,11);
WHEN "1011010000" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(15929571,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(110092664,28);
logexp <= conv_std_logic_vector(1031,11);
WHEN "1011010001" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(15974997,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(135224981,28);
logexp <= conv_std_logic_vector(1031,11);
WHEN "1011010010" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(16020423,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(160357298,28);
logexp <= conv_std_logic_vector(1031,11);
WHEN "1011010011" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(16065849,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(185489615,28);
logexp <= conv_std_logic_vector(1031,11);
WHEN "1011010100" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(16111275,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(210621932,28);
logexp <= conv_std_logic_vector(1031,11);
WHEN "1011010101" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(16156701,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(235754249,28);
logexp <= conv_std_logic_vector(1031,11);
WHEN "1011010110" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(16202127,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(260886566,28);
logexp <= conv_std_logic_vector(1031,11);
WHEN "1011010111" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(16247554,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(17583427,28);
logexp <= conv_std_logic_vector(1031,11);
WHEN "1011011000" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(16292980,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(42715744,28);
logexp <= conv_std_logic_vector(1031,11);
WHEN "1011011001" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(16338406,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(67848061,28);
logexp <= conv_std_logic_vector(1031,11);
WHEN "1011011010" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(16383832,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(92980378,28);
logexp <= conv_std_logic_vector(1031,11);
WHEN "1011011011" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(16429258,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(118112695,28);
logexp <= conv_std_logic_vector(1031,11);
WHEN "1011011100" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(16474684,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(143245012,28);
logexp <= conv_std_logic_vector(1031,11);
WHEN "1011011101" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(16520110,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(168377329,28);
logexp <= conv_std_logic_vector(1031,11);
WHEN "1011011110" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(16565536,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(193509646,28);
logexp <= conv_std_logic_vector(1031,11);
WHEN "1011011111" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(16610962,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(218641963,28);
logexp <= conv_std_logic_vector(1031,11);
WHEN "1011100000" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(16656388,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(243774280,28);
logexp <= conv_std_logic_vector(1031,11);
WHEN "1011100001" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(16701815,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(471141,28);
logexp <= conv_std_logic_vector(1031,11);
WHEN "1011100010" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(16747241,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(25603458,28);
logexp <= conv_std_logic_vector(1031,11);
WHEN "1011100011" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(7725,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(159585615,28);
logexp <= conv_std_logic_vector(1032,11);
WHEN "1011100100" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(30438,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(172151774,28);
logexp <= conv_std_logic_vector(1032,11);
WHEN "1011100101" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(53151,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(184717932,28);
logexp <= conv_std_logic_vector(1032,11);
WHEN "1011100110" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(75864,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(197284091,28);
logexp <= conv_std_logic_vector(1032,11);
WHEN "1011100111" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(98577,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(209850249,28);
logexp <= conv_std_logic_vector(1032,11);
WHEN "1011101000" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(121290,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(222416408,28);
logexp <= conv_std_logic_vector(1032,11);
WHEN "1011101001" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(144003,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(234982566,28);
logexp <= conv_std_logic_vector(1032,11);
WHEN "1011101010" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(166716,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(247548725,28);
logexp <= conv_std_logic_vector(1032,11);
WHEN "1011101011" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(189429,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(260114883,28);
logexp <= conv_std_logic_vector(1032,11);
WHEN "1011101100" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(212143,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(4245586,28);
logexp <= conv_std_logic_vector(1032,11);
WHEN "1011101101" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(234856,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(16811744,28);
logexp <= conv_std_logic_vector(1032,11);
WHEN "1011101110" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(257569,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(29377903,28);
logexp <= conv_std_logic_vector(1032,11);
WHEN "1011101111" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(280282,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(41944061,28);
logexp <= conv_std_logic_vector(1032,11);
WHEN "1011110000" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(302995,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(54510220,28);
logexp <= conv_std_logic_vector(1032,11);
WHEN "1011110001" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(325708,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(67076378,28);
logexp <= conv_std_logic_vector(1032,11);
WHEN "1011110010" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(348421,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(79642537,28);
logexp <= conv_std_logic_vector(1032,11);
WHEN "1011110011" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(371134,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(92208695,28);
logexp <= conv_std_logic_vector(1032,11);
WHEN "1011110100" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(393847,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(104774854,28);
logexp <= conv_std_logic_vector(1032,11);
WHEN "1011110101" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(416560,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(117341012,28);
logexp <= conv_std_logic_vector(1032,11);
WHEN "1011110110" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(439273,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(129907171,28);
logexp <= conv_std_logic_vector(1032,11);
WHEN "1011110111" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(461986,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(142473329,28);
logexp <= conv_std_logic_vector(1032,11);
WHEN "1011111000" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(484699,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(155039488,28);
logexp <= conv_std_logic_vector(1032,11);
WHEN "1011111001" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(507412,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(167605646,28);
logexp <= conv_std_logic_vector(1032,11);
WHEN "1011111010" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(530125,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(180171805,28);
logexp <= conv_std_logic_vector(1032,11);
WHEN "1011111011" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(552838,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(192737963,28);
logexp <= conv_std_logic_vector(1032,11);
WHEN "1011111100" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(575551,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(205304121,28);
logexp <= conv_std_logic_vector(1032,11);
WHEN "1011111101" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(598264,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(217870280,28);
logexp <= conv_std_logic_vector(1032,11);
WHEN "1011111110" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(620977,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(230436438,28);
logexp <= conv_std_logic_vector(1032,11);
WHEN "1011111111" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(643690,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(243002597,28);
logexp <= conv_std_logic_vector(1032,11);
WHEN "1100000000" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(666403,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(255568755,28);
logexp <= conv_std_logic_vector(1032,11);
WHEN "1100000001" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(689116,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(268134914,28);
logexp <= conv_std_logic_vector(1032,11);
WHEN "1100000010" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(711830,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(12265616,28);
logexp <= conv_std_logic_vector(1032,11);
WHEN "1100000011" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(734543,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(24831775,28);
logexp <= conv_std_logic_vector(1032,11);
WHEN "1100000100" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(757256,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(37397933,28);
logexp <= conv_std_logic_vector(1032,11);
WHEN "1100000101" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(779969,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(49964092,28);
logexp <= conv_std_logic_vector(1032,11);
WHEN "1100000110" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(802682,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(62530250,28);
logexp <= conv_std_logic_vector(1032,11);
WHEN "1100000111" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(825395,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(75096409,28);
logexp <= conv_std_logic_vector(1032,11);
WHEN "1100001000" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(848108,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(87662567,28);
logexp <= conv_std_logic_vector(1032,11);
WHEN "1100001001" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(870821,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(100228726,28);
logexp <= conv_std_logic_vector(1032,11);
WHEN "1100001010" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(893534,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(112794884,28);
logexp <= conv_std_logic_vector(1032,11);
WHEN "1100001011" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(916247,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(125361043,28);
logexp <= conv_std_logic_vector(1032,11);
WHEN "1100001100" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(938960,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(137927201,28);
logexp <= conv_std_logic_vector(1032,11);
WHEN "1100001101" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(961673,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(150493360,28);
logexp <= conv_std_logic_vector(1032,11);
WHEN "1100001110" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(984386,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(163059518,28);
logexp <= conv_std_logic_vector(1032,11);
WHEN "1100001111" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(1007099,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(175625677,28);
logexp <= conv_std_logic_vector(1032,11);
WHEN "1100010000" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(1029812,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(188191835,28);
logexp <= conv_std_logic_vector(1032,11);
WHEN "1100010001" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(1052525,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(200757994,28);
logexp <= conv_std_logic_vector(1032,11);
WHEN "1100010010" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(1075238,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(213324152,28);
logexp <= conv_std_logic_vector(1032,11);
WHEN "1100010011" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(1097951,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(225890311,28);
logexp <= conv_std_logic_vector(1032,11);
WHEN "1100010100" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(1120664,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(238456469,28);
logexp <= conv_std_logic_vector(1032,11);
WHEN "1100010101" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(1143377,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(251022628,28);
logexp <= conv_std_logic_vector(1032,11);
WHEN "1100010110" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(1166090,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(263588786,28);
logexp <= conv_std_logic_vector(1032,11);
WHEN "1100010111" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(1188804,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(7719489,28);
logexp <= conv_std_logic_vector(1032,11);
WHEN "1100011000" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(1211517,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(20285647,28);
logexp <= conv_std_logic_vector(1032,11);
WHEN "1100011001" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(1234230,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(32851805,28);
logexp <= conv_std_logic_vector(1032,11);
WHEN "1100011010" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(1256943,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(45417964,28);
logexp <= conv_std_logic_vector(1032,11);
WHEN "1100011011" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(1279656,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(57984122,28);
logexp <= conv_std_logic_vector(1032,11);
WHEN "1100011100" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(1302369,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(70550281,28);
logexp <= conv_std_logic_vector(1032,11);
WHEN "1100011101" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(1325082,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(83116439,28);
logexp <= conv_std_logic_vector(1032,11);
WHEN "1100011110" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(1347795,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(95682598,28);
logexp <= conv_std_logic_vector(1032,11);
WHEN "1100011111" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(1370508,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(108248756,28);
logexp <= conv_std_logic_vector(1032,11);
WHEN "1100100000" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(1393221,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(120814915,28);
logexp <= conv_std_logic_vector(1032,11);
WHEN "1100100001" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(1415934,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(133381073,28);
logexp <= conv_std_logic_vector(1032,11);
WHEN "1100100010" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(1438647,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(145947232,28);
logexp <= conv_std_logic_vector(1032,11);
WHEN "1100100011" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(1461360,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(158513390,28);
logexp <= conv_std_logic_vector(1032,11);
WHEN "1100100100" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(1484073,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(171079549,28);
logexp <= conv_std_logic_vector(1032,11);
WHEN "1100100101" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(1506786,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(183645707,28);
logexp <= conv_std_logic_vector(1032,11);
WHEN "1100100110" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(1529499,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(196211866,28);
logexp <= conv_std_logic_vector(1032,11);
WHEN "1100100111" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(1552212,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(208778024,28);
logexp <= conv_std_logic_vector(1032,11);
WHEN "1100101000" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(1574925,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(221344183,28);
logexp <= conv_std_logic_vector(1032,11);
WHEN "1100101001" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(1597638,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(233910341,28);
logexp <= conv_std_logic_vector(1032,11);
WHEN "1100101010" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(1620351,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(246476500,28);
logexp <= conv_std_logic_vector(1032,11);
WHEN "1100101011" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(1643064,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(259042658,28);
logexp <= conv_std_logic_vector(1032,11);
WHEN "1100101100" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(1665778,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(3173361,28);
logexp <= conv_std_logic_vector(1032,11);
WHEN "1100101101" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(1688491,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(15739519,28);
logexp <= conv_std_logic_vector(1032,11);
WHEN "1100101110" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(1711204,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(28305678,28);
logexp <= conv_std_logic_vector(1032,11);
WHEN "1100101111" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(1733917,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(40871836,28);
logexp <= conv_std_logic_vector(1032,11);
WHEN "1100110000" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(1756630,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(53437995,28);
logexp <= conv_std_logic_vector(1032,11);
WHEN "1100110001" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(1779343,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(66004153,28);
logexp <= conv_std_logic_vector(1032,11);
WHEN "1100110010" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(1802056,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(78570312,28);
logexp <= conv_std_logic_vector(1032,11);
WHEN "1100110011" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(1824769,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(91136470,28);
logexp <= conv_std_logic_vector(1032,11);
WHEN "1100110100" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(1847482,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(103702629,28);
logexp <= conv_std_logic_vector(1032,11);
WHEN "1100110101" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(1870195,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(116268787,28);
logexp <= conv_std_logic_vector(1032,11);
WHEN "1100110110" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(1892908,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(128834946,28);
logexp <= conv_std_logic_vector(1032,11);
WHEN "1100110111" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(1915621,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(141401104,28);
logexp <= conv_std_logic_vector(1032,11);
WHEN "1100111000" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(1938334,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(153967262,28);
logexp <= conv_std_logic_vector(1032,11);
WHEN "1100111001" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(1961047,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(166533421,28);
logexp <= conv_std_logic_vector(1032,11);
WHEN "1100111010" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(1983760,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(179099579,28);
logexp <= conv_std_logic_vector(1032,11);
WHEN "1100111011" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(2006473,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(191665738,28);
logexp <= conv_std_logic_vector(1032,11);
WHEN "1100111100" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(2029186,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(204231896,28);
logexp <= conv_std_logic_vector(1032,11);
WHEN "1100111101" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(2051899,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(216798055,28);
logexp <= conv_std_logic_vector(1032,11);
WHEN "1100111110" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(2074612,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(229364213,28);
logexp <= conv_std_logic_vector(1032,11);
WHEN "1100111111" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(2097325,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(241930372,28);
logexp <= conv_std_logic_vector(1032,11);
WHEN "1101000000" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(2120038,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(254496530,28);
logexp <= conv_std_logic_vector(1032,11);
WHEN "1101000001" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(2142751,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(267062689,28);
logexp <= conv_std_logic_vector(1032,11);
WHEN "1101000010" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(2165465,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(11193391,28);
logexp <= conv_std_logic_vector(1032,11);
WHEN "1101000011" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(2188178,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(23759550,28);
logexp <= conv_std_logic_vector(1032,11);
WHEN "1101000100" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(2210891,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(36325708,28);
logexp <= conv_std_logic_vector(1032,11);
WHEN "1101000101" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(2233604,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(48891867,28);
logexp <= conv_std_logic_vector(1032,11);
WHEN "1101000110" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(2256317,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(61458025,28);
logexp <= conv_std_logic_vector(1032,11);
WHEN "1101000111" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(2279030,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(74024184,28);
logexp <= conv_std_logic_vector(1032,11);
WHEN "1101001000" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(2301743,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(86590342,28);
logexp <= conv_std_logic_vector(1032,11);
WHEN "1101001001" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(2324456,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(99156501,28);
logexp <= conv_std_logic_vector(1032,11);
WHEN "1101001010" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(2347169,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(111722659,28);
logexp <= conv_std_logic_vector(1032,11);
WHEN "1101001011" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(2369882,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(124288818,28);
logexp <= conv_std_logic_vector(1032,11);
WHEN "1101001100" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(2392595,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(136854976,28);
logexp <= conv_std_logic_vector(1032,11);
WHEN "1101001101" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(2415308,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(149421135,28);
logexp <= conv_std_logic_vector(1032,11);
WHEN "1101001110" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(2438021,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(161987293,28);
logexp <= conv_std_logic_vector(1032,11);
WHEN "1101001111" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(2460734,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(174553452,28);
logexp <= conv_std_logic_vector(1032,11);
WHEN "1101010000" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(2483447,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(187119610,28);
logexp <= conv_std_logic_vector(1032,11);
WHEN "1101010001" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(2506160,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(199685769,28);
logexp <= conv_std_logic_vector(1032,11);
WHEN "1101010010" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(2528873,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(212251927,28);
logexp <= conv_std_logic_vector(1032,11);
WHEN "1101010011" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(2551586,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(224818086,28);
logexp <= conv_std_logic_vector(1032,11);
WHEN "1101010100" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(2574299,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(237384244,28);
logexp <= conv_std_logic_vector(1032,11);
WHEN "1101010101" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(2597012,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(249950403,28);
logexp <= conv_std_logic_vector(1032,11);
WHEN "1101010110" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(2619725,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(262516561,28);
logexp <= conv_std_logic_vector(1032,11);
WHEN "1101010111" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(2642439,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(6647263,28);
logexp <= conv_std_logic_vector(1032,11);
WHEN "1101011000" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(2665152,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(19213422,28);
logexp <= conv_std_logic_vector(1032,11);
WHEN "1101011001" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(2687865,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(31779580,28);
logexp <= conv_std_logic_vector(1032,11);
WHEN "1101011010" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(2710578,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(44345739,28);
logexp <= conv_std_logic_vector(1032,11);
WHEN "1101011011" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(2733291,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(56911897,28);
logexp <= conv_std_logic_vector(1032,11);
WHEN "1101011100" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(2756004,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(69478056,28);
logexp <= conv_std_logic_vector(1032,11);
WHEN "1101011101" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(2778717,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(82044214,28);
logexp <= conv_std_logic_vector(1032,11);
WHEN "1101011110" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(2801430,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(94610373,28);
logexp <= conv_std_logic_vector(1032,11);
WHEN "1101011111" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(2824143,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(107176531,28);
logexp <= conv_std_logic_vector(1032,11);
WHEN "1101100000" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(2846856,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(119742690,28);
logexp <= conv_std_logic_vector(1032,11);
WHEN "1101100001" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(2869569,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(132308848,28);
logexp <= conv_std_logic_vector(1032,11);
WHEN "1101100010" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(2892282,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(144875007,28);
logexp <= conv_std_logic_vector(1032,11);
WHEN "1101100011" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(2914995,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(157441165,28);
logexp <= conv_std_logic_vector(1032,11);
WHEN "1101100100" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(2937708,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(170007324,28);
logexp <= conv_std_logic_vector(1032,11);
WHEN "1101100101" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(2960421,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(182573482,28);
logexp <= conv_std_logic_vector(1032,11);
WHEN "1101100110" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(2983134,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(195139641,28);
logexp <= conv_std_logic_vector(1032,11);
WHEN "1101100111" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(3005847,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(207705799,28);
logexp <= conv_std_logic_vector(1032,11);
WHEN "1101101000" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(3028560,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(220271958,28);
logexp <= conv_std_logic_vector(1032,11);
WHEN "1101101001" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(3051273,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(232838116,28);
logexp <= conv_std_logic_vector(1032,11);
WHEN "1101101010" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(3073986,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(245404275,28);
logexp <= conv_std_logic_vector(1032,11);
WHEN "1101101011" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(3096699,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(257970433,28);
logexp <= conv_std_logic_vector(1032,11);
WHEN "1101101100" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(3119413,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(2101136,28);
logexp <= conv_std_logic_vector(1032,11);
WHEN "1101101101" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(3142126,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(14667294,28);
logexp <= conv_std_logic_vector(1032,11);
WHEN "1101101110" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(3164839,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(27233453,28);
logexp <= conv_std_logic_vector(1032,11);
WHEN "1101101111" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(3187552,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(39799611,28);
logexp <= conv_std_logic_vector(1032,11);
WHEN "1101110000" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(3210265,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(52365770,28);
logexp <= conv_std_logic_vector(1032,11);
WHEN "1101110001" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(3232978,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(64931928,28);
logexp <= conv_std_logic_vector(1032,11);
WHEN "1101110010" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(3255691,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(77498087,28);
logexp <= conv_std_logic_vector(1032,11);
WHEN "1101110011" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(3278404,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(90064245,28);
logexp <= conv_std_logic_vector(1032,11);
WHEN "1101110100" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(3301117,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(102630404,28);
logexp <= conv_std_logic_vector(1032,11);
WHEN "1101110101" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(3323830,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(115196562,28);
logexp <= conv_std_logic_vector(1032,11);
WHEN "1101110110" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(3346543,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(127762720,28);
logexp <= conv_std_logic_vector(1032,11);
WHEN "1101110111" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(3369256,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(140328879,28);
logexp <= conv_std_logic_vector(1032,11);
WHEN "1101111000" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(3391969,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(152895037,28);
logexp <= conv_std_logic_vector(1032,11);
WHEN "1101111001" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(3414682,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(165461196,28);
logexp <= conv_std_logic_vector(1032,11);
WHEN "1101111010" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(3437395,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(178027354,28);
logexp <= conv_std_logic_vector(1032,11);
WHEN "1101111011" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(3460108,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(190593513,28);
logexp <= conv_std_logic_vector(1032,11);
WHEN "1101111100" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(3482821,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(203159671,28);
logexp <= conv_std_logic_vector(1032,11);
WHEN "1101111101" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(3505534,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(215725830,28);
logexp <= conv_std_logic_vector(1032,11);
WHEN "1101111110" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(3528247,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(228291988,28);
logexp <= conv_std_logic_vector(1032,11);
WHEN "1101111111" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(3550960,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(240858147,28);
logexp <= conv_std_logic_vector(1032,11);
WHEN "1110000000" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(3573673,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(253424305,28);
logexp <= conv_std_logic_vector(1032,11);
WHEN "1110000001" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(3596386,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(265990464,28);
logexp <= conv_std_logic_vector(1032,11);
WHEN "1110000010" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(3619100,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(10121166,28);
logexp <= conv_std_logic_vector(1032,11);
WHEN "1110000011" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(3641813,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(22687325,28);
logexp <= conv_std_logic_vector(1032,11);
WHEN "1110000100" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(3664526,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(35253483,28);
logexp <= conv_std_logic_vector(1032,11);
WHEN "1110000101" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(3687239,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(47819642,28);
logexp <= conv_std_logic_vector(1032,11);
WHEN "1110000110" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(3709952,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(60385800,28);
logexp <= conv_std_logic_vector(1032,11);
WHEN "1110000111" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(3732665,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(72951959,28);
logexp <= conv_std_logic_vector(1032,11);
WHEN "1110001000" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(3755378,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(85518117,28);
logexp <= conv_std_logic_vector(1032,11);
WHEN "1110001001" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(3778091,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(98084276,28);
logexp <= conv_std_logic_vector(1032,11);
WHEN "1110001010" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(3800804,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(110650434,28);
logexp <= conv_std_logic_vector(1032,11);
WHEN "1110001011" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(3823517,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(123216593,28);
logexp <= conv_std_logic_vector(1032,11);
WHEN "1110001100" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(3846230,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(135782751,28);
logexp <= conv_std_logic_vector(1032,11);
WHEN "1110001101" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(3868943,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(148348910,28);
logexp <= conv_std_logic_vector(1032,11);
WHEN "1110001110" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(3891656,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(160915068,28);
logexp <= conv_std_logic_vector(1032,11);
WHEN "1110001111" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(3914369,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(173481227,28);
logexp <= conv_std_logic_vector(1032,11);
WHEN "1110010000" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(3937082,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(186047385,28);
logexp <= conv_std_logic_vector(1032,11);
WHEN "1110010001" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(3959795,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(198613544,28);
logexp <= conv_std_logic_vector(1032,11);
WHEN "1110010010" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(3982508,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(211179702,28);
logexp <= conv_std_logic_vector(1032,11);
WHEN "1110010011" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(4005221,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(223745860,28);
logexp <= conv_std_logic_vector(1032,11);
WHEN "1110010100" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(4027934,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(236312019,28);
logexp <= conv_std_logic_vector(1032,11);
WHEN "1110010101" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(4050647,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(248878177,28);
logexp <= conv_std_logic_vector(1032,11);
WHEN "1110010110" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(4073360,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(261444336,28);
logexp <= conv_std_logic_vector(1032,11);
WHEN "1110010111" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(4096074,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(5575038,28);
logexp <= conv_std_logic_vector(1032,11);
WHEN "1110011000" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(4118787,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(18141197,28);
logexp <= conv_std_logic_vector(1032,11);
WHEN "1110011001" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(4141500,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(30707355,28);
logexp <= conv_std_logic_vector(1032,11);
WHEN "1110011010" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(4164213,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(43273514,28);
logexp <= conv_std_logic_vector(1032,11);
WHEN "1110011011" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(4186926,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(55839672,28);
logexp <= conv_std_logic_vector(1032,11);
WHEN "1110011100" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(4209639,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(68405831,28);
logexp <= conv_std_logic_vector(1032,11);
WHEN "1110011101" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(4232352,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(80971989,28);
logexp <= conv_std_logic_vector(1032,11);
WHEN "1110011110" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(4255065,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(93538148,28);
logexp <= conv_std_logic_vector(1032,11);
WHEN "1110011111" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(4277778,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(106104306,28);
logexp <= conv_std_logic_vector(1032,11);
WHEN "1110100000" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(4300491,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(118670465,28);
logexp <= conv_std_logic_vector(1032,11);
WHEN "1110100001" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(4323204,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(131236623,28);
logexp <= conv_std_logic_vector(1032,11);
WHEN "1110100010" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(4345917,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(143802782,28);
logexp <= conv_std_logic_vector(1032,11);
WHEN "1110100011" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(4368630,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(156368940,28);
logexp <= conv_std_logic_vector(1032,11);
WHEN "1110100100" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(4391343,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(168935099,28);
logexp <= conv_std_logic_vector(1032,11);
WHEN "1110100101" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(4414056,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(181501257,28);
logexp <= conv_std_logic_vector(1032,11);
WHEN "1110100110" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(4436769,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(194067416,28);
logexp <= conv_std_logic_vector(1032,11);
WHEN "1110100111" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(4459482,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(206633574,28);
logexp <= conv_std_logic_vector(1032,11);
WHEN "1110101000" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(4482195,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(219199733,28);
logexp <= conv_std_logic_vector(1032,11);
WHEN "1110101001" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(4504908,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(231765891,28);
logexp <= conv_std_logic_vector(1032,11);
WHEN "1110101010" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(4527621,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(244332050,28);
logexp <= conv_std_logic_vector(1032,11);
WHEN "1110101011" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(4550334,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(256898208,28);
logexp <= conv_std_logic_vector(1032,11);
WHEN "1110101100" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(4573048,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(1028911,28);
logexp <= conv_std_logic_vector(1032,11);
WHEN "1110101101" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(4595761,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(13595069,28);
logexp <= conv_std_logic_vector(1032,11);
WHEN "1110101110" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(4618474,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(26161228,28);
logexp <= conv_std_logic_vector(1032,11);
WHEN "1110101111" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(4641187,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(38727386,28);
logexp <= conv_std_logic_vector(1032,11);
WHEN "1110110000" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(4663900,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(51293545,28);
logexp <= conv_std_logic_vector(1032,11);
WHEN "1110110001" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(4686613,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(63859703,28);
logexp <= conv_std_logic_vector(1032,11);
WHEN "1110110010" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(4709326,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(76425861,28);
logexp <= conv_std_logic_vector(1032,11);
WHEN "1110110011" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(4732039,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(88992020,28);
logexp <= conv_std_logic_vector(1032,11);
WHEN "1110110100" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(4754752,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(101558178,28);
logexp <= conv_std_logic_vector(1032,11);
WHEN "1110110101" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(4777465,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(114124337,28);
logexp <= conv_std_logic_vector(1032,11);
WHEN "1110110110" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(4800178,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(126690495,28);
logexp <= conv_std_logic_vector(1032,11);
WHEN "1110110111" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(4822891,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(139256654,28);
logexp <= conv_std_logic_vector(1032,11);
WHEN "1110111000" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(4845604,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(151822812,28);
logexp <= conv_std_logic_vector(1032,11);
WHEN "1110111001" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(4868317,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(164388971,28);
logexp <= conv_std_logic_vector(1032,11);
WHEN "1110111010" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(4891030,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(176955129,28);
logexp <= conv_std_logic_vector(1032,11);
WHEN "1110111011" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(4913743,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(189521288,28);
logexp <= conv_std_logic_vector(1032,11);
WHEN "1110111100" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(4936456,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(202087446,28);
logexp <= conv_std_logic_vector(1032,11);
WHEN "1110111101" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(4959169,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(214653605,28);
logexp <= conv_std_logic_vector(1032,11);
WHEN "1110111110" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(4981882,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(227219763,28);
logexp <= conv_std_logic_vector(1032,11);
WHEN "1110111111" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(5004595,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(239785922,28);
logexp <= conv_std_logic_vector(1032,11);
WHEN "1111000000" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(5027308,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(252352080,28);
logexp <= conv_std_logic_vector(1032,11);
WHEN "1111000001" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(5050021,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(264918239,28);
logexp <= conv_std_logic_vector(1032,11);
WHEN "1111000010" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(5072735,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(9048941,28);
logexp <= conv_std_logic_vector(1032,11);
WHEN "1111000011" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(5095448,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(21615100,28);
logexp <= conv_std_logic_vector(1032,11);
WHEN "1111000100" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(5118161,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(34181258,28);
logexp <= conv_std_logic_vector(1032,11);
WHEN "1111000101" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(5140874,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(46747417,28);
logexp <= conv_std_logic_vector(1032,11);
WHEN "1111000110" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(5163587,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(59313575,28);
logexp <= conv_std_logic_vector(1032,11);
WHEN "1111000111" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(5186300,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(71879734,28);
logexp <= conv_std_logic_vector(1032,11);
WHEN "1111001000" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(5209013,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(84445892,28);
logexp <= conv_std_logic_vector(1032,11);
WHEN "1111001001" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(5231726,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(97012051,28);
logexp <= conv_std_logic_vector(1032,11);
WHEN "1111001010" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(5254439,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(109578209,28);
logexp <= conv_std_logic_vector(1032,11);
WHEN "1111001011" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(5277152,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(122144368,28);
logexp <= conv_std_logic_vector(1032,11);
WHEN "1111001100" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(5299865,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(134710526,28);
logexp <= conv_std_logic_vector(1032,11);
WHEN "1111001101" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(5322578,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(147276685,28);
logexp <= conv_std_logic_vector(1032,11);
WHEN "1111001110" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(5345291,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(159842843,28);
logexp <= conv_std_logic_vector(1032,11);
WHEN "1111001111" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(5368004,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(172409002,28);
logexp <= conv_std_logic_vector(1032,11);
WHEN "1111010000" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(5390717,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(184975160,28);
logexp <= conv_std_logic_vector(1032,11);
WHEN "1111010001" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(5413430,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(197541318,28);
logexp <= conv_std_logic_vector(1032,11);
WHEN "1111010010" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(5436143,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(210107477,28);
logexp <= conv_std_logic_vector(1032,11);
WHEN "1111010011" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(5458856,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(222673635,28);
logexp <= conv_std_logic_vector(1032,11);
WHEN "1111010100" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(5481569,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(235239794,28);
logexp <= conv_std_logic_vector(1032,11);
WHEN "1111010101" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(5504282,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(247805952,28);
logexp <= conv_std_logic_vector(1032,11);
WHEN "1111010110" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(5526995,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(260372111,28);
logexp <= conv_std_logic_vector(1032,11);
WHEN "1111010111" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(5549709,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(4502813,28);
logexp <= conv_std_logic_vector(1032,11);
WHEN "1111011000" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(5572422,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(17068972,28);
logexp <= conv_std_logic_vector(1032,11);
WHEN "1111011001" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(5595135,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(29635130,28);
logexp <= conv_std_logic_vector(1032,11);
WHEN "1111011010" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(5617848,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(42201289,28);
logexp <= conv_std_logic_vector(1032,11);
WHEN "1111011011" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(5640561,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(54767447,28);
logexp <= conv_std_logic_vector(1032,11);
WHEN "1111011100" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(5663274,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(67333606,28);
logexp <= conv_std_logic_vector(1032,11);
WHEN "1111011101" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(5685987,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(79899764,28);
logexp <= conv_std_logic_vector(1032,11);
WHEN "1111011110" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(5708700,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(92465923,28);
logexp <= conv_std_logic_vector(1032,11);
WHEN "1111011111" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(5731413,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(105032081,28);
logexp <= conv_std_logic_vector(1032,11);
WHEN "1111100000" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(5754126,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(117598240,28);
logexp <= conv_std_logic_vector(1032,11);
WHEN "1111100001" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(5776839,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(130164398,28);
logexp <= conv_std_logic_vector(1032,11);
WHEN "1111100010" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(5799552,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(142730557,28);
logexp <= conv_std_logic_vector(1032,11);
WHEN "1111100011" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(5822265,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(155296715,28);
logexp <= conv_std_logic_vector(1032,11);
WHEN "1111100100" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(5844978,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(167862874,28);
logexp <= conv_std_logic_vector(1032,11);
WHEN "1111100101" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(5867691,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(180429032,28);
logexp <= conv_std_logic_vector(1032,11);
WHEN "1111100110" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(5890404,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(192995191,28);
logexp <= conv_std_logic_vector(1032,11);
WHEN "1111100111" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(5913117,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(205561349,28);
logexp <= conv_std_logic_vector(1032,11);
WHEN "1111101000" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(5935830,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(218127508,28);
logexp <= conv_std_logic_vector(1032,11);
WHEN "1111101001" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(5958543,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(230693666,28);
logexp <= conv_std_logic_vector(1032,11);
WHEN "1111101010" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(5981256,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(243259825,28);
logexp <= conv_std_logic_vector(1032,11);
WHEN "1111101011" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(6003969,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(255825983,28);
logexp <= conv_std_logic_vector(1032,11);
WHEN "1111101100" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(6026682,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(268392142,28);
logexp <= conv_std_logic_vector(1032,11);
WHEN "1111101101" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(6049396,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(12522844,28);
logexp <= conv_std_logic_vector(1032,11);
WHEN "1111101110" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(6072109,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(25089003,28);
logexp <= conv_std_logic_vector(1032,11);
WHEN "1111101111" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(6094822,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(37655161,28);
logexp <= conv_std_logic_vector(1032,11);
WHEN "1111110000" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(6117535,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(50221319,28);
logexp <= conv_std_logic_vector(1032,11);
WHEN "1111110001" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(6140248,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(62787478,28);
logexp <= conv_std_logic_vector(1032,11);
WHEN "1111110010" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(6162961,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(75353636,28);
logexp <= conv_std_logic_vector(1032,11);
WHEN "1111110011" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(6185674,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(87919795,28);
logexp <= conv_std_logic_vector(1032,11);
WHEN "1111110100" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(6208387,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(100485953,28);
logexp <= conv_std_logic_vector(1032,11);
WHEN "1111110101" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(6231100,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(113052112,28);
logexp <= conv_std_logic_vector(1032,11);
WHEN "1111110110" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(6253813,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(125618270,28);
logexp <= conv_std_logic_vector(1032,11);
WHEN "1111110111" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(6276526,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(138184429,28);
logexp <= conv_std_logic_vector(1032,11);
WHEN "1111111000" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(6299239,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(150750587,28);
logexp <= conv_std_logic_vector(1032,11);
WHEN "1111111001" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(6321952,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(163316746,28);
logexp <= conv_std_logic_vector(1032,11);
WHEN "1111111010" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(6344665,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(175882904,28);
logexp <= conv_std_logic_vector(1032,11);
WHEN "1111111011" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(6367378,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(188449063,28);
logexp <= conv_std_logic_vector(1032,11);
WHEN "1111111100" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(6390091,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(201015221,28);
logexp <= conv_std_logic_vector(1032,11);
WHEN "1111111101" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(6412804,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(213581380,28);
logexp <= conv_std_logic_vector(1032,11);
WHEN "1111111110" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(6435517,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(226147538,28);
logexp <= conv_std_logic_vector(1032,11);
WHEN "1111111111" =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(6458230,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(238713697,28);
logexp <= conv_std_logic_vector(1032,11);
WHEN others =>
logman(52 DOWNTO 29) <= conv_std_logic_vector(0,24);
logman(28 DOWNTO 1) <= conv_std_logic_vector(0,28);
logexp <= conv_std_logic_vector(0,11);
END CASE;
END PROCESS;
END rtl;
|
--------------------------------------------------------------------------------------------------------
-- UT4 ROM image as listed in BMP802 "Design Ideas Book for the CDP1802 COSMAC Microprocessor"
-- Author: Tom Pittman
-- Copyright: unkown
-- http://www.retrotechnology.com/memship/UT4_rom.html
--------------------------------------------------------------------------------------------------------
library ieee ;
use ieee.std_logic_1164.all;
use ieee.numeric_std.all;
entity ut4 is
port(
clock: in std_logic;
cs_n: in std_logic;
rd_n: in std_logic;
address: in std_logic_vector(8 downto 0);
data_out: out std_logic_vector(7 downto 0));
end ut4;
architecture rtl of ut4 is
type rom_type is array(0 to 511) of std_logic_vector(7 downto 0);
signal rom : rom_type := (
(X"C4"),(X"F8"),(X"80"),(X"B0"),(X"F8"),(X"8C"),(X"B1"),(X"F8"),
(X"1E"),(X"A1"),(X"F8"),(X"A0"),(X"B4"),(X"E1"),(X"F8"),(X"D0"),
(X"51"),(X"F3"),(X"3A"),(X"29"),(X"21"),(X"94"),(X"FC"),(X"70"),
(X"33"),(X"1C"),(X"FC"),(X"21"),(X"FC"),(X"7F"),(X"B4"),(X"51"),
(X"F3"),(X"3A"),(X"29"),(X"D1"),(X"51"),(X"21"),(X"21"),(X"30"),
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begin
process(clock)
begin
if(rising_edge(clock))then
if(rd_n = '0' and cs_n = '0')then
data_out <= rom(to_integer(unsigned(address)));
else
data_out <= "00000000";
end if;
end if;
end process;
end rtl;
|
--=============================================================================
-- This file is part of FPGA_NEURAL-Network.
--
-- FPGA_NEURAL-Network is free software: you can redistribute it and/or
-- modify it under the terms of the GNU General Public License as published
-- by the Free Software Foundation, either version 3 of the License, or
-- (at your option) any later version.
--
-- FPGA_NEURAL-Network is distributed in the hope that it will be useful,
-- but WITHOUT ANY WARRANTY; without even the implied warranty of
-- MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
-- GNU General Public License for more details.
--
-- You should have received a copy of the GNU General Public License
-- along with FPGA_NEURAL-Network.
-- If not, see <http://www.gnu.org/licenses/>.
--=============================================================================
-- FILE NAME : rs_232.vhd
-- PROJECT : FPGA_NEURAL-Network
-- ENTITY : rs_232
-- ARCHITECTURE : structure
--=============================================================================
-- AUTORS(s) : Barbosa, F
-- DEPARTMENT : Electrical Engineering (UFRGS)
-- DATE : NOV 29, 2014
--=============================================================================
-- Description:
--
--=============================================================================
library ieee;
use ieee.std_logic_1164.all;
--=============================================================================
-- Entity declaration for rs_232
--=============================================================================
entity rs_232 is
port (
-- async receiver/transmitter com ports
clk : in std_logic;
txStart : in std_logic;
txData : in std_logic_vector(7 downto 0);
rxD : in std_logic;
rxReady : out std_logic;
rxData : out std_logic_vector(7 downto 0);
txBusy : out std_logic;
txD : out std_logic
);
end rs_232;
--=============================================================================
-- architecture declaration
--=============================================================================
architecture structure of rs_232 is
component async_receiver
port (
clk : in std_logic;
RxD : in std_logic;
RxD_data : out std_logic_vector(7 downto 0);
RxD_data_ready : out std_logic
);
end component;
component async_transmitter
port (
clk : in std_logic;
TxD_start : in std_logic;
TxD_data : in std_logic_vector(7 downto 0);
TxD : out std_logic;
TxD_busy : out std_logic
);
end component;
--=============================================================================
-- architecture begin
--=============================================================================
begin
receiver : async_receiver
port map (
clk => clk,
RxD => rxD,
RxD_data => rxData,
RxD_data_ready => rxReady
);
transmitter : async_transmitter
port map (
clk => clk,
TxD_start => txStart,
TxD_data => txData,
TxD => txD,
TxD_busy => txBusy
);
end structure;
--=============================================================================
-- architecture end
--============================================================================= |
entity tb_repro1 is
end tb_repro1;
library ieee;
use ieee.std_logic_1164.all;
architecture behav of tb_repro1 is
signal clk : std_logic;
signal rst : std_logic;
signal din : std_logic;
signal dout : std_logic;
begin
dut: entity work.repro1
port map (
sig_out => dout,
sig_in => din,
clock => clk,
reset => rst);
process
procedure pulse is
begin
clk <= '0';
wait for 1 ns;
clk <= '1';
wait for 1 ns;
end pulse;
begin
rst <= '1';
wait for 1 ns;
assert dout = '0' severity failure;
rst <= '0';
din <= '1';
pulse;
assert dout = '1' severity failure;
din <= '0';
pulse;
assert dout = '0' severity failure;
din <= '1';
pulse;
assert dout = '1' severity failure;
rst <= '1';
wait for 1 ns;
assert dout = '0' severity failure;
wait;
end process;
end behav;
|
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|
`protect begin_protected
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`protect encrypt_agent_info = "Xilinx Encryption Tool 2013"
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`protect encoding = (enctype = "BASE64", line_length = 76, bytes = 64)
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`protect begin_protected
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|
`protect begin_protected
`protect version = 1
`protect encrypt_agent = "XILINX"
`protect encrypt_agent_info = "Xilinx Encryption Tool 2013"
`protect key_keyowner = "Cadence Design Systems.", key_keyname= "cds_rsa_key", key_method = "rsa"
`protect encoding = (enctype = "BASE64", line_length = 76, bytes = 64)
`protect key_block
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`protect key_keyowner = "Mentor Graphics Corporation", key_keyname= "MGC-VERIF-SIM-RSA-1", key_method = "rsa"
`protect encoding = (enctype = "BASE64", line_length = 76, bytes = 128)
`protect key_block
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`protect key_keyowner = "Xilinx", key_keyname= "xilinx_rsa_key", key_method = "rsa"
`protect encoding = (enctype = "BASE64", line_length = 76, bytes = 256)
`protect key_block
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`protect key_keyowner = "Synopsys", key_keyname= "SNPS-VCS-RSA-1", key_method = "rsa"
`protect encoding = (enctype = "BASE64", line_length = 76, bytes = 128)
`protect key_block
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`protect key_keyowner = "Aldec", key_keyname= "ALDEC08_001", key_method = "rsa"
`protect encoding = (enctype = "BASE64", line_length = 76, bytes = 256)
`protect key_block
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`protect data_method = "AES128-CBC"
`protect encoding = (enctype = "BASE64", line_length = 76, bytes = 20624)
`protect data_block
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|
`protect begin_protected
`protect version = 1
`protect encrypt_agent = "XILINX"
`protect encrypt_agent_info = "Xilinx Encryption Tool 2013"
`protect key_keyowner = "Cadence Design Systems.", key_keyname= "cds_rsa_key", key_method = "rsa"
`protect encoding = (enctype = "BASE64", line_length = 76, bytes = 64)
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`protect encoding = (enctype = "BASE64", line_length = 76, bytes = 128)
`protect key_block
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`protect encoding = (enctype = "BASE64", line_length = 76, bytes = 256)
`protect key_block
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`protect encoding = (enctype = "BASE64", line_length = 76, bytes = 128)
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`protect encoding = (enctype = "BASE64", line_length = 76, bytes = 256)
`protect key_block
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`protect data_method = "AES128-CBC"
`protect encoding = (enctype = "BASE64", line_length = 76, bytes = 20624)
`protect data_block
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|
`protect begin_protected
`protect version = 1
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`protect encrypt_agent_info = "Xilinx Encryption Tool 2013"
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`protect encoding = (enctype = "BASE64", line_length = 76, bytes = 64)
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`protect begin_protected
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|
`protect begin_protected
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`protect encoding = (enctype = "BASE64", line_length = 76, bytes = 64)
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`protect key_block
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`protect end_protected
|
`protect begin_protected
`protect version = 1
`protect encrypt_agent = "XILINX"
`protect encrypt_agent_info = "Xilinx Encryption Tool 2013"
`protect key_keyowner = "Cadence Design Systems.", key_keyname= "cds_rsa_key", key_method = "rsa"
`protect encoding = (enctype = "BASE64", line_length = 76, bytes = 64)
`protect key_block
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`protect key_keyowner = "Mentor Graphics Corporation", key_keyname= "MGC-VERIF-SIM-RSA-1", key_method = "rsa"
`protect encoding = (enctype = "BASE64", line_length = 76, bytes = 128)
`protect key_block
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`protect key_keyowner = "Xilinx", key_keyname= "xilinx_rsa_key", key_method = "rsa"
`protect encoding = (enctype = "BASE64", line_length = 76, bytes = 256)
`protect key_block
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`protect key_keyowner = "Synopsys", key_keyname= "SNPS-VCS-RSA-1", key_method = "rsa"
`protect encoding = (enctype = "BASE64", line_length = 76, bytes = 128)
`protect key_block
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`protect key_keyowner = "Aldec", key_keyname= "ALDEC08_001", key_method = "rsa"
`protect encoding = (enctype = "BASE64", line_length = 76, bytes = 256)
`protect key_block
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`protect data_method = "AES128-CBC"
`protect encoding = (enctype = "BASE64", line_length = 76, bytes = 20624)
`protect data_block
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`protect end_protected
|
-- Copyright 1986-2018 Xilinx, Inc. All Rights Reserved.
-- --------------------------------------------------------------------------------
-- Tool Version: Vivado v.2018.2 (win64) Build 2258646 Thu Jun 14 20:03:12 MDT 2018
-- Date : Tue Sep 17 15:50:55 2019
-- Host : varun-laptop running 64-bit Service Pack 1 (build 7601)
-- Command : write_vhdl -force -mode funcsim -rename_top decalper_eb_ot_sdeen_pot_pi_dehcac_xnilix -prefix
-- decalper_eb_ot_sdeen_pot_pi_dehcac_xnilix_ gcd_block_design_auto_pc_0_sim_netlist.vhdl
-- Design : gcd_block_design_auto_pc_0
-- Purpose : This VHDL netlist is a functional simulation representation of the design and should not be modified or
-- synthesized. This netlist cannot be used for SDF annotated simulation.
-- Device : xc7z010clg400-1
-- --------------------------------------------------------------------------------
library IEEE;
use IEEE.STD_LOGIC_1164.ALL;
library UNISIM;
use UNISIM.VCOMPONENTS.ALL;
entity decalper_eb_ot_sdeen_pot_pi_dehcac_xnilix_axi_protocol_converter_v2_1_17_b2s_incr_cmd is
port (
next_pending_r_reg_0 : out STD_LOGIC;
\axaddr_incr_reg[0]_0\ : out STD_LOGIC;
Q : out STD_LOGIC_VECTOR ( 0 to 0 );
\axlen_cnt_reg[2]_0\ : out STD_LOGIC;
\axaddr_incr_reg[11]_0\ : out STD_LOGIC_VECTOR ( 10 downto 0 );
\m_axi_awaddr[11]\ : out STD_LOGIC;
\m_axi_awaddr[5]\ : out STD_LOGIC;
S : out STD_LOGIC_VECTOR ( 3 downto 0 );
incr_next_pending : in STD_LOGIC;
aclk : in STD_LOGIC;
sel_first_reg_0 : in STD_LOGIC;
E : in STD_LOGIC_VECTOR ( 0 to 0 );
\m_payload_i_reg[46]\ : in STD_LOGIC_VECTOR ( 9 downto 0 );
\m_payload_i_reg[47]\ : in STD_LOGIC;
\next\ : in STD_LOGIC;
axaddr_incr : in STD_LOGIC_VECTOR ( 11 downto 0 );
\state_reg[0]\ : in STD_LOGIC_VECTOR ( 0 to 0 );
\state_reg[1]\ : in STD_LOGIC_VECTOR ( 0 to 0 );
\state_reg[0]_rep\ : in STD_LOGIC
);
end decalper_eb_ot_sdeen_pot_pi_dehcac_xnilix_axi_protocol_converter_v2_1_17_b2s_incr_cmd;
architecture STRUCTURE of decalper_eb_ot_sdeen_pot_pi_dehcac_xnilix_axi_protocol_converter_v2_1_17_b2s_incr_cmd is
signal \^q\ : STD_LOGIC_VECTOR ( 0 to 0 );
signal \axaddr_incr[0]_i_1_n_0\ : STD_LOGIC;
signal \axaddr_incr[10]_i_1_n_0\ : STD_LOGIC;
signal \axaddr_incr[11]_i_1_n_0\ : STD_LOGIC;
signal \axaddr_incr[11]_i_2_n_0\ : STD_LOGIC;
signal \axaddr_incr[1]_i_1_n_0\ : STD_LOGIC;
signal \axaddr_incr[2]_i_1_n_0\ : STD_LOGIC;
signal \axaddr_incr[3]_i_11_n_0\ : STD_LOGIC;
signal \axaddr_incr[3]_i_12_n_0\ : STD_LOGIC;
signal \axaddr_incr[3]_i_13_n_0\ : STD_LOGIC;
signal \axaddr_incr[3]_i_14_n_0\ : STD_LOGIC;
signal \axaddr_incr[3]_i_1_n_0\ : STD_LOGIC;
signal \axaddr_incr[4]_i_1_n_0\ : STD_LOGIC;
signal \axaddr_incr[5]_i_1_n_0\ : STD_LOGIC;
signal \axaddr_incr[6]_i_1_n_0\ : STD_LOGIC;
signal \axaddr_incr[7]_i_1_n_0\ : STD_LOGIC;
signal \axaddr_incr[8]_i_1_n_0\ : STD_LOGIC;
signal \axaddr_incr[9]_i_1_n_0\ : STD_LOGIC;
signal \^axaddr_incr_reg[0]_0\ : STD_LOGIC;
signal \^axaddr_incr_reg[11]_0\ : STD_LOGIC_VECTOR ( 10 downto 0 );
signal \axaddr_incr_reg[11]_i_4_n_1\ : STD_LOGIC;
signal \axaddr_incr_reg[11]_i_4_n_2\ : STD_LOGIC;
signal \axaddr_incr_reg[11]_i_4_n_3\ : STD_LOGIC;
signal \axaddr_incr_reg[11]_i_4_n_4\ : STD_LOGIC;
signal \axaddr_incr_reg[11]_i_4_n_5\ : STD_LOGIC;
signal \axaddr_incr_reg[11]_i_4_n_6\ : STD_LOGIC;
signal \axaddr_incr_reg[11]_i_4_n_7\ : STD_LOGIC;
signal \axaddr_incr_reg[3]_i_3_n_0\ : STD_LOGIC;
signal \axaddr_incr_reg[3]_i_3_n_1\ : STD_LOGIC;
signal \axaddr_incr_reg[3]_i_3_n_2\ : STD_LOGIC;
signal \axaddr_incr_reg[3]_i_3_n_3\ : STD_LOGIC;
signal \axaddr_incr_reg[3]_i_3_n_4\ : STD_LOGIC;
signal \axaddr_incr_reg[3]_i_3_n_5\ : STD_LOGIC;
signal \axaddr_incr_reg[3]_i_3_n_6\ : STD_LOGIC;
signal \axaddr_incr_reg[3]_i_3_n_7\ : STD_LOGIC;
signal \axaddr_incr_reg[7]_i_3_n_0\ : STD_LOGIC;
signal \axaddr_incr_reg[7]_i_3_n_1\ : STD_LOGIC;
signal \axaddr_incr_reg[7]_i_3_n_2\ : STD_LOGIC;
signal \axaddr_incr_reg[7]_i_3_n_3\ : STD_LOGIC;
signal \axaddr_incr_reg[7]_i_3_n_4\ : STD_LOGIC;
signal \axaddr_incr_reg[7]_i_3_n_5\ : STD_LOGIC;
signal \axaddr_incr_reg[7]_i_3_n_6\ : STD_LOGIC;
signal \axaddr_incr_reg[7]_i_3_n_7\ : STD_LOGIC;
signal \axaddr_incr_reg_n_0_[5]\ : STD_LOGIC;
signal \axlen_cnt[1]_i_1__0_n_0\ : STD_LOGIC;
signal \axlen_cnt[2]_i_1_n_0\ : STD_LOGIC;
signal \axlen_cnt[3]_i_2_n_0\ : STD_LOGIC;
signal \axlen_cnt[4]_i_1_n_0\ : STD_LOGIC;
signal \axlen_cnt[5]_i_1_n_0\ : STD_LOGIC;
signal \axlen_cnt[6]_i_1_n_0\ : STD_LOGIC;
signal \axlen_cnt[7]_i_2_n_0\ : STD_LOGIC;
signal \axlen_cnt[7]_i_3_n_0\ : STD_LOGIC;
signal \^axlen_cnt_reg[2]_0\ : STD_LOGIC;
signal \axlen_cnt_reg_n_0_[1]\ : STD_LOGIC;
signal \axlen_cnt_reg_n_0_[2]\ : STD_LOGIC;
signal \axlen_cnt_reg_n_0_[3]\ : STD_LOGIC;
signal \axlen_cnt_reg_n_0_[4]\ : STD_LOGIC;
signal \axlen_cnt_reg_n_0_[5]\ : STD_LOGIC;
signal \axlen_cnt_reg_n_0_[6]\ : STD_LOGIC;
signal \axlen_cnt_reg_n_0_[7]\ : STD_LOGIC;
signal next_pending_r_i_5_n_0 : STD_LOGIC;
signal \NLW_axaddr_incr_reg[11]_i_4_CO_UNCONNECTED\ : STD_LOGIC_VECTOR ( 3 to 3 );
attribute SOFT_HLUTNM : string;
attribute SOFT_HLUTNM of \axaddr_incr[0]_i_1\ : label is "soft_lutpair116";
attribute SOFT_HLUTNM of \axaddr_incr[10]_i_1\ : label is "soft_lutpair117";
attribute SOFT_HLUTNM of \axaddr_incr[11]_i_2\ : label is "soft_lutpair116";
attribute SOFT_HLUTNM of \axaddr_incr[1]_i_1\ : label is "soft_lutpair117";
attribute SOFT_HLUTNM of \axaddr_incr[2]_i_1\ : label is "soft_lutpair115";
attribute SOFT_HLUTNM of \axaddr_incr[3]_i_1\ : label is "soft_lutpair120";
attribute SOFT_HLUTNM of \axaddr_incr[4]_i_1\ : label is "soft_lutpair118";
attribute SOFT_HLUTNM of \axaddr_incr[5]_i_1\ : label is "soft_lutpair119";
attribute SOFT_HLUTNM of \axaddr_incr[6]_i_1\ : label is "soft_lutpair119";
attribute SOFT_HLUTNM of \axaddr_incr[7]_i_1\ : label is "soft_lutpair120";
attribute SOFT_HLUTNM of \axaddr_incr[8]_i_1\ : label is "soft_lutpair118";
attribute SOFT_HLUTNM of \axaddr_incr[9]_i_1\ : label is "soft_lutpair115";
attribute SOFT_HLUTNM of \axlen_cnt[4]_i_1\ : label is "soft_lutpair112";
attribute SOFT_HLUTNM of \axlen_cnt[6]_i_1\ : label is "soft_lutpair114";
attribute SOFT_HLUTNM of \axlen_cnt[7]_i_2\ : label is "soft_lutpair114";
attribute SOFT_HLUTNM of \axlen_cnt[7]_i_3\ : label is "soft_lutpair112";
attribute SOFT_HLUTNM of \m_axi_awaddr[11]_INST_0_i_1\ : label is "soft_lutpair113";
attribute SOFT_HLUTNM of \m_axi_awaddr[5]_INST_0_i_1\ : label is "soft_lutpair113";
begin
Q(0) <= \^q\(0);
\axaddr_incr_reg[0]_0\ <= \^axaddr_incr_reg[0]_0\;
\axaddr_incr_reg[11]_0\(10 downto 0) <= \^axaddr_incr_reg[11]_0\(10 downto 0);
\axlen_cnt_reg[2]_0\ <= \^axlen_cnt_reg[2]_0\;
\axaddr_incr[0]_i_1\: unisim.vcomponents.LUT3
generic map(
INIT => X"B8"
)
port map (
I0 => axaddr_incr(0),
I1 => \^axaddr_incr_reg[0]_0\,
I2 => \axaddr_incr_reg[3]_i_3_n_7\,
O => \axaddr_incr[0]_i_1_n_0\
);
\axaddr_incr[10]_i_1\: unisim.vcomponents.LUT3
generic map(
INIT => X"B8"
)
port map (
I0 => axaddr_incr(10),
I1 => \^axaddr_incr_reg[0]_0\,
I2 => \axaddr_incr_reg[11]_i_4_n_5\,
O => \axaddr_incr[10]_i_1_n_0\
);
\axaddr_incr[11]_i_1\: unisim.vcomponents.LUT2
generic map(
INIT => X"E"
)
port map (
I0 => \^axaddr_incr_reg[0]_0\,
I1 => \next\,
O => \axaddr_incr[11]_i_1_n_0\
);
\axaddr_incr[11]_i_2\: unisim.vcomponents.LUT3
generic map(
INIT => X"B8"
)
port map (
I0 => axaddr_incr(11),
I1 => \^axaddr_incr_reg[0]_0\,
I2 => \axaddr_incr_reg[11]_i_4_n_4\,
O => \axaddr_incr[11]_i_2_n_0\
);
\axaddr_incr[1]_i_1\: unisim.vcomponents.LUT3
generic map(
INIT => X"B8"
)
port map (
I0 => axaddr_incr(1),
I1 => \^axaddr_incr_reg[0]_0\,
I2 => \axaddr_incr_reg[3]_i_3_n_6\,
O => \axaddr_incr[1]_i_1_n_0\
);
\axaddr_incr[2]_i_1\: unisim.vcomponents.LUT3
generic map(
INIT => X"B8"
)
port map (
I0 => axaddr_incr(2),
I1 => \^axaddr_incr_reg[0]_0\,
I2 => \axaddr_incr_reg[3]_i_3_n_5\,
O => \axaddr_incr[2]_i_1_n_0\
);
\axaddr_incr[3]_i_1\: unisim.vcomponents.LUT3
generic map(
INIT => X"B8"
)
port map (
I0 => axaddr_incr(3),
I1 => \^axaddr_incr_reg[0]_0\,
I2 => \axaddr_incr_reg[3]_i_3_n_4\,
O => \axaddr_incr[3]_i_1_n_0\
);
\axaddr_incr[3]_i_10\: unisim.vcomponents.LUT4
generic map(
INIT => X"0102"
)
port map (
I0 => \m_payload_i_reg[46]\(0),
I1 => \m_payload_i_reg[46]\(6),
I2 => \m_payload_i_reg[46]\(5),
I3 => \next\,
O => S(0)
);
\axaddr_incr[3]_i_11\: unisim.vcomponents.LUT3
generic map(
INIT => X"6A"
)
port map (
I0 => \^axaddr_incr_reg[11]_0\(3),
I1 => \m_payload_i_reg[46]\(5),
I2 => \m_payload_i_reg[46]\(6),
O => \axaddr_incr[3]_i_11_n_0\
);
\axaddr_incr[3]_i_12\: unisim.vcomponents.LUT3
generic map(
INIT => X"9A"
)
port map (
I0 => \^axaddr_incr_reg[11]_0\(2),
I1 => \m_payload_i_reg[46]\(5),
I2 => \m_payload_i_reg[46]\(6),
O => \axaddr_incr[3]_i_12_n_0\
);
\axaddr_incr[3]_i_13\: unisim.vcomponents.LUT3
generic map(
INIT => X"9A"
)
port map (
I0 => \^axaddr_incr_reg[11]_0\(1),
I1 => \m_payload_i_reg[46]\(6),
I2 => \m_payload_i_reg[46]\(5),
O => \axaddr_incr[3]_i_13_n_0\
);
\axaddr_incr[3]_i_14\: unisim.vcomponents.LUT3
generic map(
INIT => X"A9"
)
port map (
I0 => \^axaddr_incr_reg[11]_0\(0),
I1 => \m_payload_i_reg[46]\(5),
I2 => \m_payload_i_reg[46]\(6),
O => \axaddr_incr[3]_i_14_n_0\
);
\axaddr_incr[3]_i_7\: unisim.vcomponents.LUT4
generic map(
INIT => X"6AAA"
)
port map (
I0 => \m_payload_i_reg[46]\(3),
I1 => \m_payload_i_reg[46]\(6),
I2 => \m_payload_i_reg[46]\(5),
I3 => \next\,
O => S(3)
);
\axaddr_incr[3]_i_8\: unisim.vcomponents.LUT4
generic map(
INIT => X"262A"
)
port map (
I0 => \m_payload_i_reg[46]\(2),
I1 => \m_payload_i_reg[46]\(6),
I2 => \m_payload_i_reg[46]\(5),
I3 => \next\,
O => S(2)
);
\axaddr_incr[3]_i_9\: unisim.vcomponents.LUT4
generic map(
INIT => X"060A"
)
port map (
I0 => \m_payload_i_reg[46]\(1),
I1 => \m_payload_i_reg[46]\(5),
I2 => \m_payload_i_reg[46]\(6),
I3 => \next\,
O => S(1)
);
\axaddr_incr[4]_i_1\: unisim.vcomponents.LUT3
generic map(
INIT => X"B8"
)
port map (
I0 => axaddr_incr(4),
I1 => \^axaddr_incr_reg[0]_0\,
I2 => \axaddr_incr_reg[7]_i_3_n_7\,
O => \axaddr_incr[4]_i_1_n_0\
);
\axaddr_incr[5]_i_1\: unisim.vcomponents.LUT3
generic map(
INIT => X"B8"
)
port map (
I0 => axaddr_incr(5),
I1 => \^axaddr_incr_reg[0]_0\,
I2 => \axaddr_incr_reg[7]_i_3_n_6\,
O => \axaddr_incr[5]_i_1_n_0\
);
\axaddr_incr[6]_i_1\: unisim.vcomponents.LUT3
generic map(
INIT => X"B8"
)
port map (
I0 => axaddr_incr(6),
I1 => \^axaddr_incr_reg[0]_0\,
I2 => \axaddr_incr_reg[7]_i_3_n_5\,
O => \axaddr_incr[6]_i_1_n_0\
);
\axaddr_incr[7]_i_1\: unisim.vcomponents.LUT3
generic map(
INIT => X"B8"
)
port map (
I0 => axaddr_incr(7),
I1 => \^axaddr_incr_reg[0]_0\,
I2 => \axaddr_incr_reg[7]_i_3_n_4\,
O => \axaddr_incr[7]_i_1_n_0\
);
\axaddr_incr[8]_i_1\: unisim.vcomponents.LUT3
generic map(
INIT => X"B8"
)
port map (
I0 => axaddr_incr(8),
I1 => \^axaddr_incr_reg[0]_0\,
I2 => \axaddr_incr_reg[11]_i_4_n_7\,
O => \axaddr_incr[8]_i_1_n_0\
);
\axaddr_incr[9]_i_1\: unisim.vcomponents.LUT3
generic map(
INIT => X"B8"
)
port map (
I0 => axaddr_incr(9),
I1 => \^axaddr_incr_reg[0]_0\,
I2 => \axaddr_incr_reg[11]_i_4_n_6\,
O => \axaddr_incr[9]_i_1_n_0\
);
\axaddr_incr_reg[0]\: unisim.vcomponents.FDRE
port map (
C => aclk,
CE => \axaddr_incr[11]_i_1_n_0\,
D => \axaddr_incr[0]_i_1_n_0\,
Q => \^axaddr_incr_reg[11]_0\(0),
R => '0'
);
\axaddr_incr_reg[10]\: unisim.vcomponents.FDRE
port map (
C => aclk,
CE => \axaddr_incr[11]_i_1_n_0\,
D => \axaddr_incr[10]_i_1_n_0\,
Q => \^axaddr_incr_reg[11]_0\(9),
R => '0'
);
\axaddr_incr_reg[11]\: unisim.vcomponents.FDRE
port map (
C => aclk,
CE => \axaddr_incr[11]_i_1_n_0\,
D => \axaddr_incr[11]_i_2_n_0\,
Q => \^axaddr_incr_reg[11]_0\(10),
R => '0'
);
\axaddr_incr_reg[11]_i_4\: unisim.vcomponents.CARRY4
port map (
CI => \axaddr_incr_reg[7]_i_3_n_0\,
CO(3) => \NLW_axaddr_incr_reg[11]_i_4_CO_UNCONNECTED\(3),
CO(2) => \axaddr_incr_reg[11]_i_4_n_1\,
CO(1) => \axaddr_incr_reg[11]_i_4_n_2\,
CO(0) => \axaddr_incr_reg[11]_i_4_n_3\,
CYINIT => '0',
DI(3 downto 0) => B"0000",
O(3) => \axaddr_incr_reg[11]_i_4_n_4\,
O(2) => \axaddr_incr_reg[11]_i_4_n_5\,
O(1) => \axaddr_incr_reg[11]_i_4_n_6\,
O(0) => \axaddr_incr_reg[11]_i_4_n_7\,
S(3 downto 0) => \^axaddr_incr_reg[11]_0\(10 downto 7)
);
\axaddr_incr_reg[1]\: unisim.vcomponents.FDRE
port map (
C => aclk,
CE => \axaddr_incr[11]_i_1_n_0\,
D => \axaddr_incr[1]_i_1_n_0\,
Q => \^axaddr_incr_reg[11]_0\(1),
R => '0'
);
\axaddr_incr_reg[2]\: unisim.vcomponents.FDRE
port map (
C => aclk,
CE => \axaddr_incr[11]_i_1_n_0\,
D => \axaddr_incr[2]_i_1_n_0\,
Q => \^axaddr_incr_reg[11]_0\(2),
R => '0'
);
\axaddr_incr_reg[3]\: unisim.vcomponents.FDRE
port map (
C => aclk,
CE => \axaddr_incr[11]_i_1_n_0\,
D => \axaddr_incr[3]_i_1_n_0\,
Q => \^axaddr_incr_reg[11]_0\(3),
R => '0'
);
\axaddr_incr_reg[3]_i_3\: unisim.vcomponents.CARRY4
port map (
CI => '0',
CO(3) => \axaddr_incr_reg[3]_i_3_n_0\,
CO(2) => \axaddr_incr_reg[3]_i_3_n_1\,
CO(1) => \axaddr_incr_reg[3]_i_3_n_2\,
CO(0) => \axaddr_incr_reg[3]_i_3_n_3\,
CYINIT => '0',
DI(3 downto 0) => \^axaddr_incr_reg[11]_0\(3 downto 0),
O(3) => \axaddr_incr_reg[3]_i_3_n_4\,
O(2) => \axaddr_incr_reg[3]_i_3_n_5\,
O(1) => \axaddr_incr_reg[3]_i_3_n_6\,
O(0) => \axaddr_incr_reg[3]_i_3_n_7\,
S(3) => \axaddr_incr[3]_i_11_n_0\,
S(2) => \axaddr_incr[3]_i_12_n_0\,
S(1) => \axaddr_incr[3]_i_13_n_0\,
S(0) => \axaddr_incr[3]_i_14_n_0\
);
\axaddr_incr_reg[4]\: unisim.vcomponents.FDRE
port map (
C => aclk,
CE => \axaddr_incr[11]_i_1_n_0\,
D => \axaddr_incr[4]_i_1_n_0\,
Q => \^axaddr_incr_reg[11]_0\(4),
R => '0'
);
\axaddr_incr_reg[5]\: unisim.vcomponents.FDRE
port map (
C => aclk,
CE => \axaddr_incr[11]_i_1_n_0\,
D => \axaddr_incr[5]_i_1_n_0\,
Q => \axaddr_incr_reg_n_0_[5]\,
R => '0'
);
\axaddr_incr_reg[6]\: unisim.vcomponents.FDRE
port map (
C => aclk,
CE => \axaddr_incr[11]_i_1_n_0\,
D => \axaddr_incr[6]_i_1_n_0\,
Q => \^axaddr_incr_reg[11]_0\(5),
R => '0'
);
\axaddr_incr_reg[7]\: unisim.vcomponents.FDRE
port map (
C => aclk,
CE => \axaddr_incr[11]_i_1_n_0\,
D => \axaddr_incr[7]_i_1_n_0\,
Q => \^axaddr_incr_reg[11]_0\(6),
R => '0'
);
\axaddr_incr_reg[7]_i_3\: unisim.vcomponents.CARRY4
port map (
CI => \axaddr_incr_reg[3]_i_3_n_0\,
CO(3) => \axaddr_incr_reg[7]_i_3_n_0\,
CO(2) => \axaddr_incr_reg[7]_i_3_n_1\,
CO(1) => \axaddr_incr_reg[7]_i_3_n_2\,
CO(0) => \axaddr_incr_reg[7]_i_3_n_3\,
CYINIT => '0',
DI(3 downto 0) => B"0000",
O(3) => \axaddr_incr_reg[7]_i_3_n_4\,
O(2) => \axaddr_incr_reg[7]_i_3_n_5\,
O(1) => \axaddr_incr_reg[7]_i_3_n_6\,
O(0) => \axaddr_incr_reg[7]_i_3_n_7\,
S(3 downto 2) => \^axaddr_incr_reg[11]_0\(6 downto 5),
S(1) => \axaddr_incr_reg_n_0_[5]\,
S(0) => \^axaddr_incr_reg[11]_0\(4)
);
\axaddr_incr_reg[8]\: unisim.vcomponents.FDRE
port map (
C => aclk,
CE => \axaddr_incr[11]_i_1_n_0\,
D => \axaddr_incr[8]_i_1_n_0\,
Q => \^axaddr_incr_reg[11]_0\(7),
R => '0'
);
\axaddr_incr_reg[9]\: unisim.vcomponents.FDRE
port map (
C => aclk,
CE => \axaddr_incr[11]_i_1_n_0\,
D => \axaddr_incr[9]_i_1_n_0\,
Q => \^axaddr_incr_reg[11]_0\(8),
R => '0'
);
\axlen_cnt[1]_i_1__0\: unisim.vcomponents.LUT5
generic map(
INIT => X"F88F8888"
)
port map (
I0 => E(0),
I1 => \m_payload_i_reg[46]\(8),
I2 => \axlen_cnt_reg_n_0_[1]\,
I3 => \^q\(0),
I4 => \^axlen_cnt_reg[2]_0\,
O => \axlen_cnt[1]_i_1__0_n_0\
);
\axlen_cnt[2]_i_1\: unisim.vcomponents.LUT6
generic map(
INIT => X"FFFFA900A900A900"
)
port map (
I0 => \axlen_cnt_reg_n_0_[2]\,
I1 => \^q\(0),
I2 => \axlen_cnt_reg_n_0_[1]\,
I3 => \^axlen_cnt_reg[2]_0\,
I4 => E(0),
I5 => \m_payload_i_reg[46]\(9),
O => \axlen_cnt[2]_i_1_n_0\
);
\axlen_cnt[3]_i_2\: unisim.vcomponents.LUT6
generic map(
INIT => X"EEEEEEEBAAAAAAAA"
)
port map (
I0 => \m_payload_i_reg[47]\,
I1 => \axlen_cnt_reg_n_0_[3]\,
I2 => \axlen_cnt_reg_n_0_[2]\,
I3 => \axlen_cnt_reg_n_0_[1]\,
I4 => \^q\(0),
I5 => \^axlen_cnt_reg[2]_0\,
O => \axlen_cnt[3]_i_2_n_0\
);
\axlen_cnt[4]_i_1\: unisim.vcomponents.LUT5
generic map(
INIT => X"AAAAAAA9"
)
port map (
I0 => \axlen_cnt_reg_n_0_[4]\,
I1 => \axlen_cnt_reg_n_0_[3]\,
I2 => \axlen_cnt_reg_n_0_[2]\,
I3 => \axlen_cnt_reg_n_0_[1]\,
I4 => \^q\(0),
O => \axlen_cnt[4]_i_1_n_0\
);
\axlen_cnt[5]_i_1\: unisim.vcomponents.LUT6
generic map(
INIT => X"AAAAAAAAAAAAAAA9"
)
port map (
I0 => \axlen_cnt_reg_n_0_[5]\,
I1 => \axlen_cnt_reg_n_0_[4]\,
I2 => \^q\(0),
I3 => \axlen_cnt_reg_n_0_[1]\,
I4 => \axlen_cnt_reg_n_0_[2]\,
I5 => \axlen_cnt_reg_n_0_[3]\,
O => \axlen_cnt[5]_i_1_n_0\
);
\axlen_cnt[6]_i_1\: unisim.vcomponents.LUT3
generic map(
INIT => X"9A"
)
port map (
I0 => \axlen_cnt_reg_n_0_[6]\,
I1 => \axlen_cnt_reg_n_0_[5]\,
I2 => \axlen_cnt[7]_i_3_n_0\,
O => \axlen_cnt[6]_i_1_n_0\
);
\axlen_cnt[7]_i_2\: unisim.vcomponents.LUT4
generic map(
INIT => X"A9AA"
)
port map (
I0 => \axlen_cnt_reg_n_0_[7]\,
I1 => \axlen_cnt_reg_n_0_[6]\,
I2 => \axlen_cnt_reg_n_0_[5]\,
I3 => \axlen_cnt[7]_i_3_n_0\,
O => \axlen_cnt[7]_i_2_n_0\
);
\axlen_cnt[7]_i_3\: unisim.vcomponents.LUT5
generic map(
INIT => X"00000001"
)
port map (
I0 => \axlen_cnt_reg_n_0_[3]\,
I1 => \axlen_cnt_reg_n_0_[2]\,
I2 => \axlen_cnt_reg_n_0_[1]\,
I3 => \^q\(0),
I4 => \axlen_cnt_reg_n_0_[4]\,
O => \axlen_cnt[7]_i_3_n_0\
);
\axlen_cnt_reg[0]\: unisim.vcomponents.FDRE
port map (
C => aclk,
CE => \state_reg[0]\(0),
D => \state_reg[1]\(0),
Q => \^q\(0),
R => '0'
);
\axlen_cnt_reg[1]\: unisim.vcomponents.FDRE
port map (
C => aclk,
CE => \state_reg[0]\(0),
D => \axlen_cnt[1]_i_1__0_n_0\,
Q => \axlen_cnt_reg_n_0_[1]\,
R => '0'
);
\axlen_cnt_reg[2]\: unisim.vcomponents.FDRE
port map (
C => aclk,
CE => \state_reg[0]\(0),
D => \axlen_cnt[2]_i_1_n_0\,
Q => \axlen_cnt_reg_n_0_[2]\,
R => '0'
);
\axlen_cnt_reg[3]\: unisim.vcomponents.FDRE
port map (
C => aclk,
CE => \state_reg[0]\(0),
D => \axlen_cnt[3]_i_2_n_0\,
Q => \axlen_cnt_reg_n_0_[3]\,
R => '0'
);
\axlen_cnt_reg[4]\: unisim.vcomponents.FDRE
port map (
C => aclk,
CE => \state_reg[0]\(0),
D => \axlen_cnt[4]_i_1_n_0\,
Q => \axlen_cnt_reg_n_0_[4]\,
R => \state_reg[0]_rep\
);
\axlen_cnt_reg[5]\: unisim.vcomponents.FDRE
port map (
C => aclk,
CE => \state_reg[0]\(0),
D => \axlen_cnt[5]_i_1_n_0\,
Q => \axlen_cnt_reg_n_0_[5]\,
R => \state_reg[0]_rep\
);
\axlen_cnt_reg[6]\: unisim.vcomponents.FDRE
port map (
C => aclk,
CE => \state_reg[0]\(0),
D => \axlen_cnt[6]_i_1_n_0\,
Q => \axlen_cnt_reg_n_0_[6]\,
R => \state_reg[0]_rep\
);
\axlen_cnt_reg[7]\: unisim.vcomponents.FDRE
port map (
C => aclk,
CE => \state_reg[0]\(0),
D => \axlen_cnt[7]_i_2_n_0\,
Q => \axlen_cnt_reg_n_0_[7]\,
R => \state_reg[0]_rep\
);
\m_axi_awaddr[11]_INST_0_i_1\: unisim.vcomponents.LUT2
generic map(
INIT => X"B"
)
port map (
I0 => \^axaddr_incr_reg[0]_0\,
I1 => \m_payload_i_reg[46]\(7),
O => \m_axi_awaddr[11]\
);
\m_axi_awaddr[5]_INST_0_i_1\: unisim.vcomponents.LUT4
generic map(
INIT => X"EF40"
)
port map (
I0 => \^axaddr_incr_reg[0]_0\,
I1 => \axaddr_incr_reg_n_0_[5]\,
I2 => \m_payload_i_reg[46]\(7),
I3 => \m_payload_i_reg[46]\(4),
O => \m_axi_awaddr[5]\
);
\next_pending_r_i_3__0\: unisim.vcomponents.LUT5
generic map(
INIT => X"55545555"
)
port map (
I0 => E(0),
I1 => \axlen_cnt_reg_n_0_[7]\,
I2 => \axlen_cnt_reg_n_0_[5]\,
I3 => \axlen_cnt_reg_n_0_[6]\,
I4 => next_pending_r_i_5_n_0,
O => \^axlen_cnt_reg[2]_0\
);
next_pending_r_i_5: unisim.vcomponents.LUT4
generic map(
INIT => X"0001"
)
port map (
I0 => \axlen_cnt_reg_n_0_[1]\,
I1 => \axlen_cnt_reg_n_0_[4]\,
I2 => \axlen_cnt_reg_n_0_[2]\,
I3 => \axlen_cnt_reg_n_0_[3]\,
O => next_pending_r_i_5_n_0
);
next_pending_r_reg: unisim.vcomponents.FDRE
port map (
C => aclk,
CE => '1',
D => incr_next_pending,
Q => next_pending_r_reg_0,
R => '0'
);
sel_first_reg: unisim.vcomponents.FDRE
port map (
C => aclk,
CE => '1',
D => sel_first_reg_0,
Q => \^axaddr_incr_reg[0]_0\,
R => '0'
);
end STRUCTURE;
library IEEE;
use IEEE.STD_LOGIC_1164.ALL;
library UNISIM;
use UNISIM.VCOMPONENTS.ALL;
entity decalper_eb_ot_sdeen_pot_pi_dehcac_xnilix_axi_protocol_converter_v2_1_17_b2s_incr_cmd_2 is
port (
incr_next_pending : out STD_LOGIC;
\axaddr_incr_reg[0]_0\ : out STD_LOGIC;
\axlen_cnt_reg[0]_0\ : out STD_LOGIC;
\axaddr_incr_reg[11]_0\ : out STD_LOGIC_VECTOR ( 7 downto 0 );
\m_axi_araddr[11]\ : out STD_LOGIC;
\m_axi_araddr[5]\ : out STD_LOGIC;
\m_axi_araddr[3]\ : out STD_LOGIC;
\m_axi_araddr[2]\ : out STD_LOGIC;
\m_axi_araddr[1]\ : out STD_LOGIC;
S : out STD_LOGIC_VECTOR ( 3 downto 0 );
aclk : in STD_LOGIC;
sel_first_reg_0 : in STD_LOGIC;
E : in STD_LOGIC_VECTOR ( 0 to 0 );
Q : in STD_LOGIC_VECTOR ( 10 downto 0 );
\m_payload_i_reg[47]\ : in STD_LOGIC;
\state_reg[1]_rep\ : in STD_LOGIC;
\m_payload_i_reg[47]_0\ : in STD_LOGIC;
O : in STD_LOGIC_VECTOR ( 3 downto 0 );
\m_payload_i_reg[7]\ : in STD_LOGIC_VECTOR ( 3 downto 0 );
\m_payload_i_reg[3]\ : in STD_LOGIC_VECTOR ( 3 downto 0 );
si_rs_arvalid : in STD_LOGIC;
\state_reg[0]_rep\ : in STD_LOGIC;
m_valid_i_reg : in STD_LOGIC_VECTOR ( 0 to 0 );
\state_reg[1]\ : in STD_LOGIC;
sel_first_reg_1 : in STD_LOGIC_VECTOR ( 0 to 0 );
\state_reg[1]_0\ : in STD_LOGIC_VECTOR ( 1 downto 0 );
m_axi_arready : in STD_LOGIC
);
attribute ORIG_REF_NAME : string;
attribute ORIG_REF_NAME of decalper_eb_ot_sdeen_pot_pi_dehcac_xnilix_axi_protocol_converter_v2_1_17_b2s_incr_cmd_2 : entity is "axi_protocol_converter_v2_1_17_b2s_incr_cmd";
end decalper_eb_ot_sdeen_pot_pi_dehcac_xnilix_axi_protocol_converter_v2_1_17_b2s_incr_cmd_2;
architecture STRUCTURE of decalper_eb_ot_sdeen_pot_pi_dehcac_xnilix_axi_protocol_converter_v2_1_17_b2s_incr_cmd_2 is
signal \axaddr_incr[0]_i_1__0_n_0\ : STD_LOGIC;
signal \axaddr_incr[10]_i_1__0_n_0\ : STD_LOGIC;
signal \axaddr_incr[11]_i_2__0_n_0\ : STD_LOGIC;
signal \axaddr_incr[1]_i_1__0_n_0\ : STD_LOGIC;
signal \axaddr_incr[2]_i_1__0_n_0\ : STD_LOGIC;
signal \axaddr_incr[3]_i_11_n_0\ : STD_LOGIC;
signal \axaddr_incr[3]_i_12_n_0\ : STD_LOGIC;
signal \axaddr_incr[3]_i_13_n_0\ : STD_LOGIC;
signal \axaddr_incr[3]_i_14_n_0\ : STD_LOGIC;
signal \axaddr_incr[3]_i_1__0_n_0\ : STD_LOGIC;
signal \axaddr_incr[4]_i_1__0_n_0\ : STD_LOGIC;
signal \axaddr_incr[5]_i_1__0_n_0\ : STD_LOGIC;
signal \axaddr_incr[6]_i_1__0_n_0\ : STD_LOGIC;
signal \axaddr_incr[7]_i_1__0_n_0\ : STD_LOGIC;
signal \axaddr_incr[8]_i_1__0_n_0\ : STD_LOGIC;
signal \axaddr_incr[9]_i_1__0_n_0\ : STD_LOGIC;
signal \^axaddr_incr_reg[0]_0\ : STD_LOGIC;
signal \^axaddr_incr_reg[11]_0\ : STD_LOGIC_VECTOR ( 7 downto 0 );
signal \axaddr_incr_reg[11]_i_4__0_n_1\ : STD_LOGIC;
signal \axaddr_incr_reg[11]_i_4__0_n_2\ : STD_LOGIC;
signal \axaddr_incr_reg[11]_i_4__0_n_3\ : STD_LOGIC;
signal \axaddr_incr_reg[11]_i_4__0_n_4\ : STD_LOGIC;
signal \axaddr_incr_reg[11]_i_4__0_n_5\ : STD_LOGIC;
signal \axaddr_incr_reg[11]_i_4__0_n_6\ : STD_LOGIC;
signal \axaddr_incr_reg[11]_i_4__0_n_7\ : STD_LOGIC;
signal \axaddr_incr_reg[3]_i_3__0_n_0\ : STD_LOGIC;
signal \axaddr_incr_reg[3]_i_3__0_n_1\ : STD_LOGIC;
signal \axaddr_incr_reg[3]_i_3__0_n_2\ : STD_LOGIC;
signal \axaddr_incr_reg[3]_i_3__0_n_3\ : STD_LOGIC;
signal \axaddr_incr_reg[3]_i_3__0_n_4\ : STD_LOGIC;
signal \axaddr_incr_reg[3]_i_3__0_n_5\ : STD_LOGIC;
signal \axaddr_incr_reg[3]_i_3__0_n_6\ : STD_LOGIC;
signal \axaddr_incr_reg[3]_i_3__0_n_7\ : STD_LOGIC;
signal \axaddr_incr_reg[7]_i_3__0_n_0\ : STD_LOGIC;
signal \axaddr_incr_reg[7]_i_3__0_n_1\ : STD_LOGIC;
signal \axaddr_incr_reg[7]_i_3__0_n_2\ : STD_LOGIC;
signal \axaddr_incr_reg[7]_i_3__0_n_3\ : STD_LOGIC;
signal \axaddr_incr_reg[7]_i_3__0_n_4\ : STD_LOGIC;
signal \axaddr_incr_reg[7]_i_3__0_n_5\ : STD_LOGIC;
signal \axaddr_incr_reg[7]_i_3__0_n_6\ : STD_LOGIC;
signal \axaddr_incr_reg[7]_i_3__0_n_7\ : STD_LOGIC;
signal \axaddr_incr_reg_n_0_[1]\ : STD_LOGIC;
signal \axaddr_incr_reg_n_0_[2]\ : STD_LOGIC;
signal \axaddr_incr_reg_n_0_[3]\ : STD_LOGIC;
signal \axaddr_incr_reg_n_0_[5]\ : STD_LOGIC;
signal \axlen_cnt[0]_i_1__2_n_0\ : STD_LOGIC;
signal \axlen_cnt[1]_i_1__1_n_0\ : STD_LOGIC;
signal \axlen_cnt[2]_i_1__1_n_0\ : STD_LOGIC;
signal \axlen_cnt[3]_i_2__0_n_0\ : STD_LOGIC;
signal \axlen_cnt[4]_i_1__0_n_0\ : STD_LOGIC;
signal \axlen_cnt[5]_i_1__0_n_0\ : STD_LOGIC;
signal \axlen_cnt[6]_i_1__0_n_0\ : STD_LOGIC;
signal \axlen_cnt[7]_i_2__0_n_0\ : STD_LOGIC;
signal \axlen_cnt[7]_i_3__0_n_0\ : STD_LOGIC;
signal \^axlen_cnt_reg[0]_0\ : STD_LOGIC;
signal \axlen_cnt_reg_n_0_[0]\ : STD_LOGIC;
signal \axlen_cnt_reg_n_0_[1]\ : STD_LOGIC;
signal \axlen_cnt_reg_n_0_[2]\ : STD_LOGIC;
signal \axlen_cnt_reg_n_0_[3]\ : STD_LOGIC;
signal \axlen_cnt_reg_n_0_[4]\ : STD_LOGIC;
signal \axlen_cnt_reg_n_0_[5]\ : STD_LOGIC;
signal \axlen_cnt_reg_n_0_[6]\ : STD_LOGIC;
signal \axlen_cnt_reg_n_0_[7]\ : STD_LOGIC;
signal \^incr_next_pending\ : STD_LOGIC;
signal \next_pending_r_i_2__0_n_0\ : STD_LOGIC;
signal \next_pending_r_i_4__0_n_0\ : STD_LOGIC;
signal next_pending_r_reg_n_0 : STD_LOGIC;
signal \NLW_axaddr_incr_reg[11]_i_4__0_CO_UNCONNECTED\ : STD_LOGIC_VECTOR ( 3 to 3 );
attribute SOFT_HLUTNM : string;
attribute SOFT_HLUTNM of \axaddr_incr[0]_i_1__0\ : label is "soft_lutpair12";
attribute SOFT_HLUTNM of \axaddr_incr[10]_i_1__0\ : label is "soft_lutpair12";
attribute SOFT_HLUTNM of \axaddr_incr[11]_i_2__0\ : label is "soft_lutpair11";
attribute SOFT_HLUTNM of \axaddr_incr[1]_i_1__0\ : label is "soft_lutpair15";
attribute SOFT_HLUTNM of \axaddr_incr[2]_i_1__0\ : label is "soft_lutpair15";
attribute SOFT_HLUTNM of \axaddr_incr[3]_i_1__0\ : label is "soft_lutpair13";
attribute SOFT_HLUTNM of \axaddr_incr[4]_i_1__0\ : label is "soft_lutpair14";
attribute SOFT_HLUTNM of \axaddr_incr[5]_i_1__0\ : label is "soft_lutpair11";
attribute SOFT_HLUTNM of \axaddr_incr[6]_i_1__0\ : label is "soft_lutpair14";
attribute SOFT_HLUTNM of \axaddr_incr[7]_i_1__0\ : label is "soft_lutpair10";
attribute SOFT_HLUTNM of \axaddr_incr[8]_i_1__0\ : label is "soft_lutpair13";
attribute SOFT_HLUTNM of \axaddr_incr[9]_i_1__0\ : label is "soft_lutpair10";
attribute SOFT_HLUTNM of \axlen_cnt[3]_i_4\ : label is "soft_lutpair7";
attribute SOFT_HLUTNM of \axlen_cnt[4]_i_1__0\ : label is "soft_lutpair6";
attribute SOFT_HLUTNM of \axlen_cnt[6]_i_1__0\ : label is "soft_lutpair9";
attribute SOFT_HLUTNM of \axlen_cnt[7]_i_2__0\ : label is "soft_lutpair9";
attribute SOFT_HLUTNM of \axlen_cnt[7]_i_3__0\ : label is "soft_lutpair6";
attribute SOFT_HLUTNM of \m_axi_araddr[11]_INST_0_i_1\ : label is "soft_lutpair8";
attribute SOFT_HLUTNM of \m_axi_araddr[1]_INST_0_i_1\ : label is "soft_lutpair8";
attribute SOFT_HLUTNM of \next_pending_r_i_2__0\ : label is "soft_lutpair7";
begin
\axaddr_incr_reg[0]_0\ <= \^axaddr_incr_reg[0]_0\;
\axaddr_incr_reg[11]_0\(7 downto 0) <= \^axaddr_incr_reg[11]_0\(7 downto 0);
\axlen_cnt_reg[0]_0\ <= \^axlen_cnt_reg[0]_0\;
incr_next_pending <= \^incr_next_pending\;
\axaddr_incr[0]_i_1__0\: unisim.vcomponents.LUT3
generic map(
INIT => X"B8"
)
port map (
I0 => \m_payload_i_reg[3]\(0),
I1 => \^axaddr_incr_reg[0]_0\,
I2 => \axaddr_incr_reg[3]_i_3__0_n_7\,
O => \axaddr_incr[0]_i_1__0_n_0\
);
\axaddr_incr[10]_i_1__0\: unisim.vcomponents.LUT3
generic map(
INIT => X"B8"
)
port map (
I0 => O(2),
I1 => \^axaddr_incr_reg[0]_0\,
I2 => \axaddr_incr_reg[11]_i_4__0_n_5\,
O => \axaddr_incr[10]_i_1__0_n_0\
);
\axaddr_incr[11]_i_2__0\: unisim.vcomponents.LUT3
generic map(
INIT => X"B8"
)
port map (
I0 => O(3),
I1 => \^axaddr_incr_reg[0]_0\,
I2 => \axaddr_incr_reg[11]_i_4__0_n_4\,
O => \axaddr_incr[11]_i_2__0_n_0\
);
\axaddr_incr[1]_i_1__0\: unisim.vcomponents.LUT3
generic map(
INIT => X"B8"
)
port map (
I0 => \m_payload_i_reg[3]\(1),
I1 => \^axaddr_incr_reg[0]_0\,
I2 => \axaddr_incr_reg[3]_i_3__0_n_6\,
O => \axaddr_incr[1]_i_1__0_n_0\
);
\axaddr_incr[2]_i_1__0\: unisim.vcomponents.LUT3
generic map(
INIT => X"B8"
)
port map (
I0 => \m_payload_i_reg[3]\(2),
I1 => \^axaddr_incr_reg[0]_0\,
I2 => \axaddr_incr_reg[3]_i_3__0_n_5\,
O => \axaddr_incr[2]_i_1__0_n_0\
);
\axaddr_incr[3]_i_10\: unisim.vcomponents.LUT6
generic map(
INIT => X"0201020202020202"
)
port map (
I0 => Q(0),
I1 => Q(6),
I2 => Q(5),
I3 => \state_reg[1]_0\(1),
I4 => \state_reg[1]_0\(0),
I5 => m_axi_arready,
O => S(0)
);
\axaddr_incr[3]_i_11\: unisim.vcomponents.LUT3
generic map(
INIT => X"6A"
)
port map (
I0 => \axaddr_incr_reg_n_0_[3]\,
I1 => Q(5),
I2 => Q(6),
O => \axaddr_incr[3]_i_11_n_0\
);
\axaddr_incr[3]_i_12\: unisim.vcomponents.LUT3
generic map(
INIT => X"9A"
)
port map (
I0 => \axaddr_incr_reg_n_0_[2]\,
I1 => Q(5),
I2 => Q(6),
O => \axaddr_incr[3]_i_12_n_0\
);
\axaddr_incr[3]_i_13\: unisim.vcomponents.LUT3
generic map(
INIT => X"9A"
)
port map (
I0 => \axaddr_incr_reg_n_0_[1]\,
I1 => Q(6),
I2 => Q(5),
O => \axaddr_incr[3]_i_13_n_0\
);
\axaddr_incr[3]_i_14\: unisim.vcomponents.LUT3
generic map(
INIT => X"A9"
)
port map (
I0 => \^axaddr_incr_reg[11]_0\(0),
I1 => Q(5),
I2 => Q(6),
O => \axaddr_incr[3]_i_14_n_0\
);
\axaddr_incr[3]_i_1__0\: unisim.vcomponents.LUT3
generic map(
INIT => X"B8"
)
port map (
I0 => \m_payload_i_reg[3]\(3),
I1 => \^axaddr_incr_reg[0]_0\,
I2 => \axaddr_incr_reg[3]_i_3__0_n_4\,
O => \axaddr_incr[3]_i_1__0_n_0\
);
\axaddr_incr[3]_i_7\: unisim.vcomponents.LUT6
generic map(
INIT => X"AA6AAAAAAAAAAAAA"
)
port map (
I0 => Q(3),
I1 => Q(6),
I2 => Q(5),
I3 => \state_reg[1]_0\(1),
I4 => \state_reg[1]_0\(0),
I5 => m_axi_arready,
O => S(3)
);
\axaddr_incr[3]_i_8\: unisim.vcomponents.LUT6
generic map(
INIT => X"2A262A2A2A2A2A2A"
)
port map (
I0 => Q(2),
I1 => Q(6),
I2 => Q(5),
I3 => \state_reg[1]_0\(1),
I4 => \state_reg[1]_0\(0),
I5 => m_axi_arready,
O => S(2)
);
\axaddr_incr[3]_i_9\: unisim.vcomponents.LUT6
generic map(
INIT => X"0A060A0A0A0A0A0A"
)
port map (
I0 => Q(1),
I1 => Q(5),
I2 => Q(6),
I3 => \state_reg[1]_0\(1),
I4 => \state_reg[1]_0\(0),
I5 => m_axi_arready,
O => S(1)
);
\axaddr_incr[4]_i_1__0\: unisim.vcomponents.LUT3
generic map(
INIT => X"B8"
)
port map (
I0 => \m_payload_i_reg[7]\(0),
I1 => \^axaddr_incr_reg[0]_0\,
I2 => \axaddr_incr_reg[7]_i_3__0_n_7\,
O => \axaddr_incr[4]_i_1__0_n_0\
);
\axaddr_incr[5]_i_1__0\: unisim.vcomponents.LUT3
generic map(
INIT => X"B8"
)
port map (
I0 => \m_payload_i_reg[7]\(1),
I1 => \^axaddr_incr_reg[0]_0\,
I2 => \axaddr_incr_reg[7]_i_3__0_n_6\,
O => \axaddr_incr[5]_i_1__0_n_0\
);
\axaddr_incr[6]_i_1__0\: unisim.vcomponents.LUT3
generic map(
INIT => X"B8"
)
port map (
I0 => \m_payload_i_reg[7]\(2),
I1 => \^axaddr_incr_reg[0]_0\,
I2 => \axaddr_incr_reg[7]_i_3__0_n_5\,
O => \axaddr_incr[6]_i_1__0_n_0\
);
\axaddr_incr[7]_i_1__0\: unisim.vcomponents.LUT3
generic map(
INIT => X"B8"
)
port map (
I0 => \m_payload_i_reg[7]\(3),
I1 => \^axaddr_incr_reg[0]_0\,
I2 => \axaddr_incr_reg[7]_i_3__0_n_4\,
O => \axaddr_incr[7]_i_1__0_n_0\
);
\axaddr_incr[8]_i_1__0\: unisim.vcomponents.LUT3
generic map(
INIT => X"B8"
)
port map (
I0 => O(0),
I1 => \^axaddr_incr_reg[0]_0\,
I2 => \axaddr_incr_reg[11]_i_4__0_n_7\,
O => \axaddr_incr[8]_i_1__0_n_0\
);
\axaddr_incr[9]_i_1__0\: unisim.vcomponents.LUT3
generic map(
INIT => X"B8"
)
port map (
I0 => O(1),
I1 => \^axaddr_incr_reg[0]_0\,
I2 => \axaddr_incr_reg[11]_i_4__0_n_6\,
O => \axaddr_incr[9]_i_1__0_n_0\
);
\axaddr_incr_reg[0]\: unisim.vcomponents.FDRE
port map (
C => aclk,
CE => sel_first_reg_1(0),
D => \axaddr_incr[0]_i_1__0_n_0\,
Q => \^axaddr_incr_reg[11]_0\(0),
R => '0'
);
\axaddr_incr_reg[10]\: unisim.vcomponents.FDRE
port map (
C => aclk,
CE => sel_first_reg_1(0),
D => \axaddr_incr[10]_i_1__0_n_0\,
Q => \^axaddr_incr_reg[11]_0\(6),
R => '0'
);
\axaddr_incr_reg[11]\: unisim.vcomponents.FDRE
port map (
C => aclk,
CE => sel_first_reg_1(0),
D => \axaddr_incr[11]_i_2__0_n_0\,
Q => \^axaddr_incr_reg[11]_0\(7),
R => '0'
);
\axaddr_incr_reg[11]_i_4__0\: unisim.vcomponents.CARRY4
port map (
CI => \axaddr_incr_reg[7]_i_3__0_n_0\,
CO(3) => \NLW_axaddr_incr_reg[11]_i_4__0_CO_UNCONNECTED\(3),
CO(2) => \axaddr_incr_reg[11]_i_4__0_n_1\,
CO(1) => \axaddr_incr_reg[11]_i_4__0_n_2\,
CO(0) => \axaddr_incr_reg[11]_i_4__0_n_3\,
CYINIT => '0',
DI(3 downto 0) => B"0000",
O(3) => \axaddr_incr_reg[11]_i_4__0_n_4\,
O(2) => \axaddr_incr_reg[11]_i_4__0_n_5\,
O(1) => \axaddr_incr_reg[11]_i_4__0_n_6\,
O(0) => \axaddr_incr_reg[11]_i_4__0_n_7\,
S(3 downto 0) => \^axaddr_incr_reg[11]_0\(7 downto 4)
);
\axaddr_incr_reg[1]\: unisim.vcomponents.FDRE
port map (
C => aclk,
CE => sel_first_reg_1(0),
D => \axaddr_incr[1]_i_1__0_n_0\,
Q => \axaddr_incr_reg_n_0_[1]\,
R => '0'
);
\axaddr_incr_reg[2]\: unisim.vcomponents.FDRE
port map (
C => aclk,
CE => sel_first_reg_1(0),
D => \axaddr_incr[2]_i_1__0_n_0\,
Q => \axaddr_incr_reg_n_0_[2]\,
R => '0'
);
\axaddr_incr_reg[3]\: unisim.vcomponents.FDRE
port map (
C => aclk,
CE => sel_first_reg_1(0),
D => \axaddr_incr[3]_i_1__0_n_0\,
Q => \axaddr_incr_reg_n_0_[3]\,
R => '0'
);
\axaddr_incr_reg[3]_i_3__0\: unisim.vcomponents.CARRY4
port map (
CI => '0',
CO(3) => \axaddr_incr_reg[3]_i_3__0_n_0\,
CO(2) => \axaddr_incr_reg[3]_i_3__0_n_1\,
CO(1) => \axaddr_incr_reg[3]_i_3__0_n_2\,
CO(0) => \axaddr_incr_reg[3]_i_3__0_n_3\,
CYINIT => '0',
DI(3) => \axaddr_incr_reg_n_0_[3]\,
DI(2) => \axaddr_incr_reg_n_0_[2]\,
DI(1) => \axaddr_incr_reg_n_0_[1]\,
DI(0) => \^axaddr_incr_reg[11]_0\(0),
O(3) => \axaddr_incr_reg[3]_i_3__0_n_4\,
O(2) => \axaddr_incr_reg[3]_i_3__0_n_5\,
O(1) => \axaddr_incr_reg[3]_i_3__0_n_6\,
O(0) => \axaddr_incr_reg[3]_i_3__0_n_7\,
S(3) => \axaddr_incr[3]_i_11_n_0\,
S(2) => \axaddr_incr[3]_i_12_n_0\,
S(1) => \axaddr_incr[3]_i_13_n_0\,
S(0) => \axaddr_incr[3]_i_14_n_0\
);
\axaddr_incr_reg[4]\: unisim.vcomponents.FDRE
port map (
C => aclk,
CE => sel_first_reg_1(0),
D => \axaddr_incr[4]_i_1__0_n_0\,
Q => \^axaddr_incr_reg[11]_0\(1),
R => '0'
);
\axaddr_incr_reg[5]\: unisim.vcomponents.FDRE
port map (
C => aclk,
CE => sel_first_reg_1(0),
D => \axaddr_incr[5]_i_1__0_n_0\,
Q => \axaddr_incr_reg_n_0_[5]\,
R => '0'
);
\axaddr_incr_reg[6]\: unisim.vcomponents.FDRE
port map (
C => aclk,
CE => sel_first_reg_1(0),
D => \axaddr_incr[6]_i_1__0_n_0\,
Q => \^axaddr_incr_reg[11]_0\(2),
R => '0'
);
\axaddr_incr_reg[7]\: unisim.vcomponents.FDRE
port map (
C => aclk,
CE => sel_first_reg_1(0),
D => \axaddr_incr[7]_i_1__0_n_0\,
Q => \^axaddr_incr_reg[11]_0\(3),
R => '0'
);
\axaddr_incr_reg[7]_i_3__0\: unisim.vcomponents.CARRY4
port map (
CI => \axaddr_incr_reg[3]_i_3__0_n_0\,
CO(3) => \axaddr_incr_reg[7]_i_3__0_n_0\,
CO(2) => \axaddr_incr_reg[7]_i_3__0_n_1\,
CO(1) => \axaddr_incr_reg[7]_i_3__0_n_2\,
CO(0) => \axaddr_incr_reg[7]_i_3__0_n_3\,
CYINIT => '0',
DI(3 downto 0) => B"0000",
O(3) => \axaddr_incr_reg[7]_i_3__0_n_4\,
O(2) => \axaddr_incr_reg[7]_i_3__0_n_5\,
O(1) => \axaddr_incr_reg[7]_i_3__0_n_6\,
O(0) => \axaddr_incr_reg[7]_i_3__0_n_7\,
S(3 downto 2) => \^axaddr_incr_reg[11]_0\(3 downto 2),
S(1) => \axaddr_incr_reg_n_0_[5]\,
S(0) => \^axaddr_incr_reg[11]_0\(1)
);
\axaddr_incr_reg[8]\: unisim.vcomponents.FDRE
port map (
C => aclk,
CE => sel_first_reg_1(0),
D => \axaddr_incr[8]_i_1__0_n_0\,
Q => \^axaddr_incr_reg[11]_0\(4),
R => '0'
);
\axaddr_incr_reg[9]\: unisim.vcomponents.FDRE
port map (
C => aclk,
CE => sel_first_reg_1(0),
D => \axaddr_incr[9]_i_1__0_n_0\,
Q => \^axaddr_incr_reg[11]_0\(5),
R => '0'
);
\axlen_cnt[0]_i_1__2\: unisim.vcomponents.LUT5
generic map(
INIT => X"20FF2020"
)
port map (
I0 => si_rs_arvalid,
I1 => \state_reg[0]_rep\,
I2 => Q(8),
I3 => \axlen_cnt_reg_n_0_[0]\,
I4 => \^axlen_cnt_reg[0]_0\,
O => \axlen_cnt[0]_i_1__2_n_0\
);
\axlen_cnt[1]_i_1__1\: unisim.vcomponents.LUT5
generic map(
INIT => X"F88F8888"
)
port map (
I0 => E(0),
I1 => Q(9),
I2 => \axlen_cnt_reg_n_0_[1]\,
I3 => \axlen_cnt_reg_n_0_[0]\,
I4 => \^axlen_cnt_reg[0]_0\,
O => \axlen_cnt[1]_i_1__1_n_0\
);
\axlen_cnt[2]_i_1__1\: unisim.vcomponents.LUT6
generic map(
INIT => X"FFFFA900A900A900"
)
port map (
I0 => \axlen_cnt_reg_n_0_[2]\,
I1 => \axlen_cnt_reg_n_0_[0]\,
I2 => \axlen_cnt_reg_n_0_[1]\,
I3 => \^axlen_cnt_reg[0]_0\,
I4 => E(0),
I5 => Q(10),
O => \axlen_cnt[2]_i_1__1_n_0\
);
\axlen_cnt[3]_i_2__0\: unisim.vcomponents.LUT6
generic map(
INIT => X"EEEEEEEBAAAAAAAA"
)
port map (
I0 => \m_payload_i_reg[47]\,
I1 => \axlen_cnt_reg_n_0_[3]\,
I2 => \axlen_cnt_reg_n_0_[1]\,
I3 => \axlen_cnt_reg_n_0_[0]\,
I4 => \axlen_cnt_reg_n_0_[2]\,
I5 => \^axlen_cnt_reg[0]_0\,
O => \axlen_cnt[3]_i_2__0_n_0\
);
\axlen_cnt[3]_i_4\: unisim.vcomponents.LUT5
generic map(
INIT => X"55545555"
)
port map (
I0 => E(0),
I1 => \axlen_cnt_reg_n_0_[7]\,
I2 => \axlen_cnt_reg_n_0_[5]\,
I3 => \axlen_cnt_reg_n_0_[6]\,
I4 => \next_pending_r_i_4__0_n_0\,
O => \^axlen_cnt_reg[0]_0\
);
\axlen_cnt[4]_i_1__0\: unisim.vcomponents.LUT5
generic map(
INIT => X"AAAAAAA9"
)
port map (
I0 => \axlen_cnt_reg_n_0_[4]\,
I1 => \axlen_cnt_reg_n_0_[1]\,
I2 => \axlen_cnt_reg_n_0_[0]\,
I3 => \axlen_cnt_reg_n_0_[3]\,
I4 => \axlen_cnt_reg_n_0_[2]\,
O => \axlen_cnt[4]_i_1__0_n_0\
);
\axlen_cnt[5]_i_1__0\: unisim.vcomponents.LUT6
generic map(
INIT => X"AAAAAAAAAAAAAAA9"
)
port map (
I0 => \axlen_cnt_reg_n_0_[5]\,
I1 => \axlen_cnt_reg_n_0_[0]\,
I2 => \axlen_cnt_reg_n_0_[2]\,
I3 => \axlen_cnt_reg_n_0_[3]\,
I4 => \axlen_cnt_reg_n_0_[1]\,
I5 => \axlen_cnt_reg_n_0_[4]\,
O => \axlen_cnt[5]_i_1__0_n_0\
);
\axlen_cnt[6]_i_1__0\: unisim.vcomponents.LUT3
generic map(
INIT => X"9A"
)
port map (
I0 => \axlen_cnt_reg_n_0_[6]\,
I1 => \axlen_cnt_reg_n_0_[5]\,
I2 => \axlen_cnt[7]_i_3__0_n_0\,
O => \axlen_cnt[6]_i_1__0_n_0\
);
\axlen_cnt[7]_i_2__0\: unisim.vcomponents.LUT4
generic map(
INIT => X"A9AA"
)
port map (
I0 => \axlen_cnt_reg_n_0_[7]\,
I1 => \axlen_cnt_reg_n_0_[6]\,
I2 => \axlen_cnt_reg_n_0_[5]\,
I3 => \axlen_cnt[7]_i_3__0_n_0\,
O => \axlen_cnt[7]_i_2__0_n_0\
);
\axlen_cnt[7]_i_3__0\: unisim.vcomponents.LUT5
generic map(
INIT => X"00000001"
)
port map (
I0 => \axlen_cnt_reg_n_0_[4]\,
I1 => \axlen_cnt_reg_n_0_[1]\,
I2 => \axlen_cnt_reg_n_0_[3]\,
I3 => \axlen_cnt_reg_n_0_[2]\,
I4 => \axlen_cnt_reg_n_0_[0]\,
O => \axlen_cnt[7]_i_3__0_n_0\
);
\axlen_cnt_reg[0]\: unisim.vcomponents.FDRE
port map (
C => aclk,
CE => m_valid_i_reg(0),
D => \axlen_cnt[0]_i_1__2_n_0\,
Q => \axlen_cnt_reg_n_0_[0]\,
R => '0'
);
\axlen_cnt_reg[1]\: unisim.vcomponents.FDRE
port map (
C => aclk,
CE => m_valid_i_reg(0),
D => \axlen_cnt[1]_i_1__1_n_0\,
Q => \axlen_cnt_reg_n_0_[1]\,
R => '0'
);
\axlen_cnt_reg[2]\: unisim.vcomponents.FDRE
port map (
C => aclk,
CE => m_valid_i_reg(0),
D => \axlen_cnt[2]_i_1__1_n_0\,
Q => \axlen_cnt_reg_n_0_[2]\,
R => '0'
);
\axlen_cnt_reg[3]\: unisim.vcomponents.FDRE
port map (
C => aclk,
CE => m_valid_i_reg(0),
D => \axlen_cnt[3]_i_2__0_n_0\,
Q => \axlen_cnt_reg_n_0_[3]\,
R => '0'
);
\axlen_cnt_reg[4]\: unisim.vcomponents.FDRE
port map (
C => aclk,
CE => m_valid_i_reg(0),
D => \axlen_cnt[4]_i_1__0_n_0\,
Q => \axlen_cnt_reg_n_0_[4]\,
R => \state_reg[1]\
);
\axlen_cnt_reg[5]\: unisim.vcomponents.FDRE
port map (
C => aclk,
CE => m_valid_i_reg(0),
D => \axlen_cnt[5]_i_1__0_n_0\,
Q => \axlen_cnt_reg_n_0_[5]\,
R => \state_reg[1]\
);
\axlen_cnt_reg[6]\: unisim.vcomponents.FDRE
port map (
C => aclk,
CE => m_valid_i_reg(0),
D => \axlen_cnt[6]_i_1__0_n_0\,
Q => \axlen_cnt_reg_n_0_[6]\,
R => \state_reg[1]\
);
\axlen_cnt_reg[7]\: unisim.vcomponents.FDRE
port map (
C => aclk,
CE => m_valid_i_reg(0),
D => \axlen_cnt[7]_i_2__0_n_0\,
Q => \axlen_cnt_reg_n_0_[7]\,
R => \state_reg[1]\
);
\m_axi_araddr[11]_INST_0_i_1\: unisim.vcomponents.LUT2
generic map(
INIT => X"B"
)
port map (
I0 => \^axaddr_incr_reg[0]_0\,
I1 => Q(7),
O => \m_axi_araddr[11]\
);
\m_axi_araddr[1]_INST_0_i_1\: unisim.vcomponents.LUT4
generic map(
INIT => X"EF40"
)
port map (
I0 => \^axaddr_incr_reg[0]_0\,
I1 => \axaddr_incr_reg_n_0_[1]\,
I2 => Q(7),
I3 => Q(1),
O => \m_axi_araddr[1]\
);
\m_axi_araddr[2]_INST_0_i_1\: unisim.vcomponents.LUT4
generic map(
INIT => X"EF40"
)
port map (
I0 => \^axaddr_incr_reg[0]_0\,
I1 => \axaddr_incr_reg_n_0_[2]\,
I2 => Q(7),
I3 => Q(2),
O => \m_axi_araddr[2]\
);
\m_axi_araddr[3]_INST_0_i_1\: unisim.vcomponents.LUT4
generic map(
INIT => X"EF40"
)
port map (
I0 => \^axaddr_incr_reg[0]_0\,
I1 => \axaddr_incr_reg_n_0_[3]\,
I2 => Q(7),
I3 => Q(3),
O => \m_axi_araddr[3]\
);
\m_axi_araddr[5]_INST_0_i_1\: unisim.vcomponents.LUT4
generic map(
INIT => X"EF40"
)
port map (
I0 => \^axaddr_incr_reg[0]_0\,
I1 => \axaddr_incr_reg_n_0_[5]\,
I2 => Q(7),
I3 => Q(4),
O => \m_axi_araddr[5]\
);
\next_pending_r_i_1__2\: unisim.vcomponents.LUT5
generic map(
INIT => X"FFFF505C"
)
port map (
I0 => \next_pending_r_i_2__0_n_0\,
I1 => next_pending_r_reg_n_0,
I2 => \state_reg[1]_rep\,
I3 => E(0),
I4 => \m_payload_i_reg[47]_0\,
O => \^incr_next_pending\
);
\next_pending_r_i_2__0\: unisim.vcomponents.LUT4
generic map(
INIT => X"0002"
)
port map (
I0 => \next_pending_r_i_4__0_n_0\,
I1 => \axlen_cnt_reg_n_0_[6]\,
I2 => \axlen_cnt_reg_n_0_[5]\,
I3 => \axlen_cnt_reg_n_0_[7]\,
O => \next_pending_r_i_2__0_n_0\
);
\next_pending_r_i_4__0\: unisim.vcomponents.LUT4
generic map(
INIT => X"0001"
)
port map (
I0 => \axlen_cnt_reg_n_0_[2]\,
I1 => \axlen_cnt_reg_n_0_[3]\,
I2 => \axlen_cnt_reg_n_0_[1]\,
I3 => \axlen_cnt_reg_n_0_[4]\,
O => \next_pending_r_i_4__0_n_0\
);
next_pending_r_reg: unisim.vcomponents.FDRE
port map (
C => aclk,
CE => '1',
D => \^incr_next_pending\,
Q => next_pending_r_reg_n_0,
R => '0'
);
sel_first_reg: unisim.vcomponents.FDRE
port map (
C => aclk,
CE => '1',
D => sel_first_reg_0,
Q => \^axaddr_incr_reg[0]_0\,
R => '0'
);
end STRUCTURE;
library IEEE;
use IEEE.STD_LOGIC_1164.ALL;
library UNISIM;
use UNISIM.VCOMPONENTS.ALL;
entity decalper_eb_ot_sdeen_pot_pi_dehcac_xnilix_axi_protocol_converter_v2_1_17_b2s_rd_cmd_fsm is
port (
\axlen_cnt_reg[7]\ : out STD_LOGIC;
Q : out STD_LOGIC_VECTOR ( 1 downto 0 );
r_push_r_reg : out STD_LOGIC;
\m_payload_i_reg[0]\ : out STD_LOGIC;
\m_payload_i_reg[0]_0\ : out STD_LOGIC;
D : out STD_LOGIC_VECTOR ( 0 to 0 );
\wrap_second_len_r_reg[0]\ : out STD_LOGIC_VECTOR ( 0 to 0 );
E : out STD_LOGIC_VECTOR ( 0 to 0 );
sel_first_reg : out STD_LOGIC;
sel_first_reg_0 : out STD_LOGIC;
sel_first_i : out STD_LOGIC;
\wrap_cnt_r_reg[3]\ : out STD_LOGIC;
\axaddr_offset_r_reg[2]\ : out STD_LOGIC_VECTOR ( 0 to 0 );
\wrap_cnt_r_reg[3]_0\ : out STD_LOGIC;
\wrap_boundary_axaddr_r_reg[11]\ : out STD_LOGIC_VECTOR ( 0 to 0 );
\axaddr_incr_reg[0]\ : out STD_LOGIC_VECTOR ( 0 to 0 );
m_axi_arvalid : out STD_LOGIC;
m_valid_i0 : out STD_LOGIC;
s_ready_i0 : out STD_LOGIC;
\m_payload_i_reg[0]_1\ : out STD_LOGIC_VECTOR ( 0 to 0 );
m_axi_arready : in STD_LOGIC;
si_rs_arvalid : in STD_LOGIC;
\axlen_cnt_reg[7]_0\ : in STD_LOGIC;
s_axburst_eq1_reg : in STD_LOGIC;
\cnt_read_reg[2]_rep__0\ : in STD_LOGIC;
\wrap_second_len_r_reg[0]_0\ : in STD_LOGIC_VECTOR ( 0 to 0 );
\axaddr_offset_r_reg[3]\ : in STD_LOGIC;
axaddr_offset : in STD_LOGIC_VECTOR ( 0 to 0 );
sel_first_reg_1 : in STD_LOGIC;
areset_d1 : in STD_LOGIC;
sel_first : in STD_LOGIC;
sel_first_reg_2 : in STD_LOGIC;
\axaddr_offset_r_reg[3]_0\ : in STD_LOGIC_VECTOR ( 1 downto 0 );
\m_payload_i_reg[46]\ : in STD_LOGIC_VECTOR ( 0 to 0 );
\m_payload_i_reg[5]\ : in STD_LOGIC;
s_axi_arvalid : in STD_LOGIC;
s_ready_i_reg : in STD_LOGIC;
aclk : in STD_LOGIC
);
end decalper_eb_ot_sdeen_pot_pi_dehcac_xnilix_axi_protocol_converter_v2_1_17_b2s_rd_cmd_fsm;
architecture STRUCTURE of decalper_eb_ot_sdeen_pot_pi_dehcac_xnilix_axi_protocol_converter_v2_1_17_b2s_rd_cmd_fsm is
signal \^q\ : STD_LOGIC_VECTOR ( 1 downto 0 );
signal \^m_payload_i_reg[0]\ : STD_LOGIC;
signal \^m_payload_i_reg[0]_0\ : STD_LOGIC;
signal \next_state__0\ : STD_LOGIC_VECTOR ( 1 downto 0 );
attribute SOFT_HLUTNM : string;
attribute SOFT_HLUTNM of \axaddr_incr[11]_i_1__0\ : label is "soft_lutpair5";
attribute SOFT_HLUTNM of \axlen_cnt[3]_i_1__2\ : label is "soft_lutpair1";
attribute SOFT_HLUTNM of \axlen_cnt[7]_i_1\ : label is "soft_lutpair1";
attribute SOFT_HLUTNM of m_axi_arvalid_INST_0 : label is "soft_lutpair5";
attribute SOFT_HLUTNM of \m_payload_i[31]_i_1__0\ : label is "soft_lutpair4";
attribute SOFT_HLUTNM of \m_valid_i_i_1__1\ : label is "soft_lutpair0";
attribute SOFT_HLUTNM of r_push_r_i_1 : label is "soft_lutpair2";
attribute SOFT_HLUTNM of \s_ready_i_i_1__0\ : label is "soft_lutpair0";
attribute SOFT_HLUTNM of \state[1]_i_1\ : label is "soft_lutpair2";
attribute FSM_ENCODED_STATES : string;
attribute FSM_ENCODED_STATES of \state_reg[0]\ : label is "SM_IDLE:00,SM_CMD_EN:01,SM_CMD_ACCEPTED:10,SM_DONE:11";
attribute KEEP : string;
attribute KEEP of \state_reg[0]\ : label is "yes";
attribute ORIG_CELL_NAME : string;
attribute ORIG_CELL_NAME of \state_reg[0]\ : label is "state_reg[0]";
attribute FSM_ENCODED_STATES of \state_reg[0]_rep\ : label is "SM_IDLE:00,SM_CMD_EN:01,SM_CMD_ACCEPTED:10,SM_DONE:11";
attribute IS_FANOUT_CONSTRAINED : integer;
attribute IS_FANOUT_CONSTRAINED of \state_reg[0]_rep\ : label is 1;
attribute KEEP of \state_reg[0]_rep\ : label is "yes";
attribute ORIG_CELL_NAME of \state_reg[0]_rep\ : label is "state_reg[0]";
attribute FSM_ENCODED_STATES of \state_reg[1]\ : label is "SM_IDLE:00,SM_CMD_EN:01,SM_CMD_ACCEPTED:10,SM_DONE:11";
attribute KEEP of \state_reg[1]\ : label is "yes";
attribute ORIG_CELL_NAME of \state_reg[1]\ : label is "state_reg[1]";
attribute FSM_ENCODED_STATES of \state_reg[1]_rep\ : label is "SM_IDLE:00,SM_CMD_EN:01,SM_CMD_ACCEPTED:10,SM_DONE:11";
attribute IS_FANOUT_CONSTRAINED of \state_reg[1]_rep\ : label is 1;
attribute KEEP of \state_reg[1]_rep\ : label is "yes";
attribute ORIG_CELL_NAME of \state_reg[1]_rep\ : label is "state_reg[1]";
attribute SOFT_HLUTNM of \wrap_boundary_axaddr_r[11]_i_1__0\ : label is "soft_lutpair3";
attribute SOFT_HLUTNM of \wrap_cnt_r[3]_i_4__0\ : label is "soft_lutpair3";
attribute SOFT_HLUTNM of \wrap_cnt_r[3]_i_6__0\ : label is "soft_lutpair4";
begin
Q(1 downto 0) <= \^q\(1 downto 0);
\m_payload_i_reg[0]\ <= \^m_payload_i_reg[0]\;
\m_payload_i_reg[0]_0\ <= \^m_payload_i_reg[0]_0\;
\axaddr_incr[11]_i_1__0\: unisim.vcomponents.LUT4
generic map(
INIT => X"AAEA"
)
port map (
I0 => sel_first,
I1 => m_axi_arready,
I2 => \^m_payload_i_reg[0]_0\,
I3 => \^m_payload_i_reg[0]\,
O => \axaddr_incr_reg[0]\(0)
);
\axaddr_offset_r[2]_i_1__0\: unisim.vcomponents.LUT6
generic map(
INIT => X"AAAAACAAAAAAA0AA"
)
port map (
I0 => \axaddr_offset_r_reg[3]_0\(0),
I1 => \m_payload_i_reg[46]\(0),
I2 => \^m_payload_i_reg[0]_0\,
I3 => si_rs_arvalid,
I4 => \^m_payload_i_reg[0]\,
I5 => \m_payload_i_reg[5]\,
O => \axaddr_offset_r_reg[2]\(0)
);
\axlen_cnt[3]_i_1__2\: unisim.vcomponents.LUT4
generic map(
INIT => X"00CA"
)
port map (
I0 => si_rs_arvalid,
I1 => m_axi_arready,
I2 => \^q\(0),
I3 => \^q\(1),
O => E(0)
);
\axlen_cnt[7]_i_1\: unisim.vcomponents.LUT5
generic map(
INIT => X"00005140"
)
port map (
I0 => \^q\(1),
I1 => \^q\(0),
I2 => m_axi_arready,
I3 => si_rs_arvalid,
I4 => \axlen_cnt_reg[7]_0\,
O => \axlen_cnt_reg[7]\
);
m_axi_arvalid_INST_0: unisim.vcomponents.LUT2
generic map(
INIT => X"2"
)
port map (
I0 => \^m_payload_i_reg[0]_0\,
I1 => \^m_payload_i_reg[0]\,
O => m_axi_arvalid
);
\m_payload_i[31]_i_1__0\: unisim.vcomponents.LUT3
generic map(
INIT => X"D5"
)
port map (
I0 => si_rs_arvalid,
I1 => \^m_payload_i_reg[0]\,
I2 => \^m_payload_i_reg[0]_0\,
O => \m_payload_i_reg[0]_1\(0)
);
\m_valid_i_i_1__1\: unisim.vcomponents.LUT5
generic map(
INIT => X"FF70FFFF"
)
port map (
I0 => \^m_payload_i_reg[0]_0\,
I1 => \^m_payload_i_reg[0]\,
I2 => si_rs_arvalid,
I3 => s_axi_arvalid,
I4 => s_ready_i_reg,
O => m_valid_i0
);
r_push_r_i_1: unisim.vcomponents.LUT3
generic map(
INIT => X"40"
)
port map (
I0 => \^m_payload_i_reg[0]\,
I1 => \^m_payload_i_reg[0]_0\,
I2 => m_axi_arready,
O => r_push_r_reg
);
\s_ready_i_i_1__0\: unisim.vcomponents.LUT5
generic map(
INIT => X"8FFF8F8F"
)
port map (
I0 => \^m_payload_i_reg[0]_0\,
I1 => \^m_payload_i_reg[0]\,
I2 => si_rs_arvalid,
I3 => s_axi_arvalid,
I4 => s_ready_i_reg,
O => s_ready_i0
);
\sel_first_i_1__2\: unisim.vcomponents.LUT6
generic map(
INIT => X"FFFFFFFFC4C4CFCC"
)
port map (
I0 => m_axi_arready,
I1 => sel_first_reg_1,
I2 => \^q\(1),
I3 => si_rs_arvalid,
I4 => \^q\(0),
I5 => areset_d1,
O => sel_first_reg
);
\sel_first_i_1__3\: unisim.vcomponents.LUT6
generic map(
INIT => X"FFFFFFFFC4C4CFCC"
)
port map (
I0 => m_axi_arready,
I1 => sel_first,
I2 => \^m_payload_i_reg[0]\,
I3 => si_rs_arvalid,
I4 => \^m_payload_i_reg[0]_0\,
I5 => areset_d1,
O => sel_first_reg_0
);
\sel_first_i_1__4\: unisim.vcomponents.LUT6
generic map(
INIT => X"FCFFFFFFCCCECCCE"
)
port map (
I0 => si_rs_arvalid,
I1 => areset_d1,
I2 => \^m_payload_i_reg[0]\,
I3 => \^m_payload_i_reg[0]_0\,
I4 => m_axi_arready,
I5 => sel_first_reg_2,
O => sel_first_i
);
\state[0]_i_1__0\: unisim.vcomponents.LUT6
generic map(
INIT => X"003030303E3E3E3E"
)
port map (
I0 => si_rs_arvalid,
I1 => \^q\(1),
I2 => \^q\(0),
I3 => m_axi_arready,
I4 => s_axburst_eq1_reg,
I5 => \cnt_read_reg[2]_rep__0\,
O => \next_state__0\(0)
);
\state[1]_i_1\: unisim.vcomponents.LUT5
generic map(
INIT => X"00AAB000"
)
port map (
I0 => \cnt_read_reg[2]_rep__0\,
I1 => s_axburst_eq1_reg,
I2 => m_axi_arready,
I3 => \^m_payload_i_reg[0]_0\,
I4 => \^m_payload_i_reg[0]\,
O => \next_state__0\(1)
);
\state_reg[0]\: unisim.vcomponents.FDRE
generic map(
INIT => '0'
)
port map (
C => aclk,
CE => '1',
D => \next_state__0\(0),
Q => \^q\(0),
R => areset_d1
);
\state_reg[0]_rep\: unisim.vcomponents.FDRE
generic map(
INIT => '0'
)
port map (
C => aclk,
CE => '1',
D => \next_state__0\(0),
Q => \^m_payload_i_reg[0]_0\,
R => areset_d1
);
\state_reg[1]\: unisim.vcomponents.FDRE
generic map(
INIT => '0'
)
port map (
C => aclk,
CE => '1',
D => \next_state__0\(1),
Q => \^q\(1),
R => areset_d1
);
\state_reg[1]_rep\: unisim.vcomponents.FDRE
generic map(
INIT => '0'
)
port map (
C => aclk,
CE => '1',
D => \next_state__0\(1),
Q => \^m_payload_i_reg[0]\,
R => areset_d1
);
\wrap_boundary_axaddr_r[11]_i_1__0\: unisim.vcomponents.LUT3
generic map(
INIT => X"04"
)
port map (
I0 => \^m_payload_i_reg[0]\,
I1 => si_rs_arvalid,
I2 => \^m_payload_i_reg[0]_0\,
O => \wrap_boundary_axaddr_r_reg[11]\(0)
);
\wrap_cnt_r[0]_i_1__0\: unisim.vcomponents.LUT6
generic map(
INIT => X"AA8A5575AA8A5545"
)
port map (
I0 => \wrap_second_len_r_reg[0]_0\(0),
I1 => \^q\(0),
I2 => si_rs_arvalid,
I3 => \^q\(1),
I4 => \axaddr_offset_r_reg[3]\,
I5 => axaddr_offset(0),
O => D(0)
);
\wrap_cnt_r[3]_i_4__0\: unisim.vcomponents.LUT4
generic map(
INIT => X"AA8A"
)
port map (
I0 => \axaddr_offset_r_reg[3]_0\(1),
I1 => \^m_payload_i_reg[0]_0\,
I2 => si_rs_arvalid,
I3 => \^m_payload_i_reg[0]\,
O => \wrap_cnt_r_reg[3]\
);
\wrap_cnt_r[3]_i_6__0\: unisim.vcomponents.LUT4
generic map(
INIT => X"AA8A"
)
port map (
I0 => \axaddr_offset_r_reg[3]_0\(0),
I1 => \^m_payload_i_reg[0]_0\,
I2 => si_rs_arvalid,
I3 => \^m_payload_i_reg[0]\,
O => \wrap_cnt_r_reg[3]_0\
);
\wrap_second_len_r[0]_i_1__0\: unisim.vcomponents.LUT6
generic map(
INIT => X"AA8AAA8AAA8AAABA"
)
port map (
I0 => \wrap_second_len_r_reg[0]_0\(0),
I1 => \^q\(0),
I2 => si_rs_arvalid,
I3 => \^q\(1),
I4 => \axaddr_offset_r_reg[3]\,
I5 => axaddr_offset(0),
O => \wrap_second_len_r_reg[0]\(0)
);
end STRUCTURE;
library IEEE;
use IEEE.STD_LOGIC_1164.ALL;
library UNISIM;
use UNISIM.VCOMPONENTS.ALL;
entity decalper_eb_ot_sdeen_pot_pi_dehcac_xnilix_axi_protocol_converter_v2_1_17_b2s_simple_fifo is
port (
\cnt_read_reg[0]_rep__0_0\ : out STD_LOGIC;
\cnt_read_reg[1]_rep__0_0\ : out STD_LOGIC;
SR : out STD_LOGIC_VECTOR ( 0 to 0 );
D : out STD_LOGIC_VECTOR ( 0 to 0 );
bresp_push : out STD_LOGIC;
bvalid_i_reg : out STD_LOGIC;
\out\ : out STD_LOGIC_VECTOR ( 11 downto 0 );
b_push : in STD_LOGIC;
shandshake_r : in STD_LOGIC;
areset_d1 : in STD_LOGIC;
Q : in STD_LOGIC_VECTOR ( 1 downto 0 );
\bresp_cnt_reg[7]\ : in STD_LOGIC_VECTOR ( 7 downto 0 );
mhandshake_r : in STD_LOGIC;
si_rs_bready : in STD_LOGIC;
bvalid_i_reg_0 : in STD_LOGIC;
\in\ : in STD_LOGIC_VECTOR ( 15 downto 0 );
aclk : in STD_LOGIC
);
end decalper_eb_ot_sdeen_pot_pi_dehcac_xnilix_axi_protocol_converter_v2_1_17_b2s_simple_fifo;
architecture STRUCTURE of decalper_eb_ot_sdeen_pot_pi_dehcac_xnilix_axi_protocol_converter_v2_1_17_b2s_simple_fifo is
signal \bresp_cnt[7]_i_3_n_0\ : STD_LOGIC;
signal \bresp_cnt[7]_i_4_n_0\ : STD_LOGIC;
signal \bresp_cnt[7]_i_5_n_0\ : STD_LOGIC;
signal \^bresp_push\ : STD_LOGIC;
signal bvalid_i_i_2_n_0 : STD_LOGIC;
signal cnt_read : STD_LOGIC_VECTOR ( 1 downto 0 );
signal \cnt_read[0]_i_1__2_n_0\ : STD_LOGIC;
signal \cnt_read[1]_i_1_n_0\ : STD_LOGIC;
signal \^cnt_read_reg[0]_rep__0_0\ : STD_LOGIC;
signal \cnt_read_reg[0]_rep_n_0\ : STD_LOGIC;
signal \^cnt_read_reg[1]_rep__0_0\ : STD_LOGIC;
signal \cnt_read_reg[1]_rep_n_0\ : STD_LOGIC;
signal \memory_reg[3][0]_srl4_i_2__0_n_0\ : STD_LOGIC;
signal \memory_reg[3][0]_srl4_i_3_n_0\ : STD_LOGIC;
signal \memory_reg[3][0]_srl4_n_0\ : STD_LOGIC;
signal \memory_reg[3][1]_srl4_n_0\ : STD_LOGIC;
signal \memory_reg[3][2]_srl4_n_0\ : STD_LOGIC;
signal \memory_reg[3][3]_srl4_n_0\ : STD_LOGIC;
attribute SOFT_HLUTNM : string;
attribute SOFT_HLUTNM of \cnt_read[0]_i_1__2\ : label is "soft_lutpair121";
attribute SOFT_HLUTNM of \cnt_read[1]_i_1\ : label is "soft_lutpair121";
attribute KEEP : string;
attribute KEEP of \cnt_read_reg[0]\ : label is "yes";
attribute ORIG_CELL_NAME : string;
attribute ORIG_CELL_NAME of \cnt_read_reg[0]\ : label is "cnt_read_reg[0]";
attribute IS_FANOUT_CONSTRAINED : integer;
attribute IS_FANOUT_CONSTRAINED of \cnt_read_reg[0]_rep\ : label is 1;
attribute KEEP of \cnt_read_reg[0]_rep\ : label is "yes";
attribute ORIG_CELL_NAME of \cnt_read_reg[0]_rep\ : label is "cnt_read_reg[0]";
attribute IS_FANOUT_CONSTRAINED of \cnt_read_reg[0]_rep__0\ : label is 1;
attribute KEEP of \cnt_read_reg[0]_rep__0\ : label is "yes";
attribute ORIG_CELL_NAME of \cnt_read_reg[0]_rep__0\ : label is "cnt_read_reg[0]";
attribute KEEP of \cnt_read_reg[1]\ : label is "yes";
attribute ORIG_CELL_NAME of \cnt_read_reg[1]\ : label is "cnt_read_reg[1]";
attribute IS_FANOUT_CONSTRAINED of \cnt_read_reg[1]_rep\ : label is 1;
attribute KEEP of \cnt_read_reg[1]_rep\ : label is "yes";
attribute ORIG_CELL_NAME of \cnt_read_reg[1]_rep\ : label is "cnt_read_reg[1]";
attribute IS_FANOUT_CONSTRAINED of \cnt_read_reg[1]_rep__0\ : label is 1;
attribute KEEP of \cnt_read_reg[1]_rep__0\ : label is "yes";
attribute ORIG_CELL_NAME of \cnt_read_reg[1]_rep__0\ : label is "cnt_read_reg[1]";
attribute srl_bus_name : string;
attribute srl_bus_name of \memory_reg[3][0]_srl4\ : label is "inst/\gen_axilite.gen_b2s_conv.axilite_b2s/WR.b_channel_0/bid_fifo_0/memory_reg[3] ";
attribute srl_name : string;
attribute srl_name of \memory_reg[3][0]_srl4\ : label is "inst/\gen_axilite.gen_b2s_conv.axilite_b2s/WR.b_channel_0/bid_fifo_0/memory_reg[3][0]_srl4 ";
attribute srl_bus_name of \memory_reg[3][10]_srl4\ : label is "inst/\gen_axilite.gen_b2s_conv.axilite_b2s/WR.b_channel_0/bid_fifo_0/memory_reg[3] ";
attribute srl_name of \memory_reg[3][10]_srl4\ : label is "inst/\gen_axilite.gen_b2s_conv.axilite_b2s/WR.b_channel_0/bid_fifo_0/memory_reg[3][10]_srl4 ";
attribute srl_bus_name of \memory_reg[3][11]_srl4\ : label is "inst/\gen_axilite.gen_b2s_conv.axilite_b2s/WR.b_channel_0/bid_fifo_0/memory_reg[3] ";
attribute srl_name of \memory_reg[3][11]_srl4\ : label is "inst/\gen_axilite.gen_b2s_conv.axilite_b2s/WR.b_channel_0/bid_fifo_0/memory_reg[3][11]_srl4 ";
attribute srl_bus_name of \memory_reg[3][12]_srl4\ : label is "inst/\gen_axilite.gen_b2s_conv.axilite_b2s/WR.b_channel_0/bid_fifo_0/memory_reg[3] ";
attribute srl_name of \memory_reg[3][12]_srl4\ : label is "inst/\gen_axilite.gen_b2s_conv.axilite_b2s/WR.b_channel_0/bid_fifo_0/memory_reg[3][12]_srl4 ";
attribute srl_bus_name of \memory_reg[3][13]_srl4\ : label is "inst/\gen_axilite.gen_b2s_conv.axilite_b2s/WR.b_channel_0/bid_fifo_0/memory_reg[3] ";
attribute srl_name of \memory_reg[3][13]_srl4\ : label is "inst/\gen_axilite.gen_b2s_conv.axilite_b2s/WR.b_channel_0/bid_fifo_0/memory_reg[3][13]_srl4 ";
attribute srl_bus_name of \memory_reg[3][14]_srl4\ : label is "inst/\gen_axilite.gen_b2s_conv.axilite_b2s/WR.b_channel_0/bid_fifo_0/memory_reg[3] ";
attribute srl_name of \memory_reg[3][14]_srl4\ : label is "inst/\gen_axilite.gen_b2s_conv.axilite_b2s/WR.b_channel_0/bid_fifo_0/memory_reg[3][14]_srl4 ";
attribute srl_bus_name of \memory_reg[3][15]_srl4\ : label is "inst/\gen_axilite.gen_b2s_conv.axilite_b2s/WR.b_channel_0/bid_fifo_0/memory_reg[3] ";
attribute srl_name of \memory_reg[3][15]_srl4\ : label is "inst/\gen_axilite.gen_b2s_conv.axilite_b2s/WR.b_channel_0/bid_fifo_0/memory_reg[3][15]_srl4 ";
attribute srl_bus_name of \memory_reg[3][16]_srl4\ : label is "inst/\gen_axilite.gen_b2s_conv.axilite_b2s/WR.b_channel_0/bid_fifo_0/memory_reg[3] ";
attribute srl_name of \memory_reg[3][16]_srl4\ : label is "inst/\gen_axilite.gen_b2s_conv.axilite_b2s/WR.b_channel_0/bid_fifo_0/memory_reg[3][16]_srl4 ";
attribute srl_bus_name of \memory_reg[3][17]_srl4\ : label is "inst/\gen_axilite.gen_b2s_conv.axilite_b2s/WR.b_channel_0/bid_fifo_0/memory_reg[3] ";
attribute srl_name of \memory_reg[3][17]_srl4\ : label is "inst/\gen_axilite.gen_b2s_conv.axilite_b2s/WR.b_channel_0/bid_fifo_0/memory_reg[3][17]_srl4 ";
attribute srl_bus_name of \memory_reg[3][18]_srl4\ : label is "inst/\gen_axilite.gen_b2s_conv.axilite_b2s/WR.b_channel_0/bid_fifo_0/memory_reg[3] ";
attribute srl_name of \memory_reg[3][18]_srl4\ : label is "inst/\gen_axilite.gen_b2s_conv.axilite_b2s/WR.b_channel_0/bid_fifo_0/memory_reg[3][18]_srl4 ";
attribute srl_bus_name of \memory_reg[3][19]_srl4\ : label is "inst/\gen_axilite.gen_b2s_conv.axilite_b2s/WR.b_channel_0/bid_fifo_0/memory_reg[3] ";
attribute srl_name of \memory_reg[3][19]_srl4\ : label is "inst/\gen_axilite.gen_b2s_conv.axilite_b2s/WR.b_channel_0/bid_fifo_0/memory_reg[3][19]_srl4 ";
attribute srl_bus_name of \memory_reg[3][1]_srl4\ : label is "inst/\gen_axilite.gen_b2s_conv.axilite_b2s/WR.b_channel_0/bid_fifo_0/memory_reg[3] ";
attribute srl_name of \memory_reg[3][1]_srl4\ : label is "inst/\gen_axilite.gen_b2s_conv.axilite_b2s/WR.b_channel_0/bid_fifo_0/memory_reg[3][1]_srl4 ";
attribute srl_bus_name of \memory_reg[3][2]_srl4\ : label is "inst/\gen_axilite.gen_b2s_conv.axilite_b2s/WR.b_channel_0/bid_fifo_0/memory_reg[3] ";
attribute srl_name of \memory_reg[3][2]_srl4\ : label is "inst/\gen_axilite.gen_b2s_conv.axilite_b2s/WR.b_channel_0/bid_fifo_0/memory_reg[3][2]_srl4 ";
attribute srl_bus_name of \memory_reg[3][3]_srl4\ : label is "inst/\gen_axilite.gen_b2s_conv.axilite_b2s/WR.b_channel_0/bid_fifo_0/memory_reg[3] ";
attribute srl_name of \memory_reg[3][3]_srl4\ : label is "inst/\gen_axilite.gen_b2s_conv.axilite_b2s/WR.b_channel_0/bid_fifo_0/memory_reg[3][3]_srl4 ";
attribute srl_bus_name of \memory_reg[3][8]_srl4\ : label is "inst/\gen_axilite.gen_b2s_conv.axilite_b2s/WR.b_channel_0/bid_fifo_0/memory_reg[3] ";
attribute srl_name of \memory_reg[3][8]_srl4\ : label is "inst/\gen_axilite.gen_b2s_conv.axilite_b2s/WR.b_channel_0/bid_fifo_0/memory_reg[3][8]_srl4 ";
attribute srl_bus_name of \memory_reg[3][9]_srl4\ : label is "inst/\gen_axilite.gen_b2s_conv.axilite_b2s/WR.b_channel_0/bid_fifo_0/memory_reg[3] ";
attribute srl_name of \memory_reg[3][9]_srl4\ : label is "inst/\gen_axilite.gen_b2s_conv.axilite_b2s/WR.b_channel_0/bid_fifo_0/memory_reg[3][9]_srl4 ";
begin
bresp_push <= \^bresp_push\;
\cnt_read_reg[0]_rep__0_0\ <= \^cnt_read_reg[0]_rep__0_0\;
\cnt_read_reg[1]_rep__0_0\ <= \^cnt_read_reg[1]_rep__0_0\;
\bresp_cnt[7]_i_1\: unisim.vcomponents.LUT4
generic map(
INIT => X"ABAA"
)
port map (
I0 => areset_d1,
I1 => \bresp_cnt[7]_i_3_n_0\,
I2 => \bresp_cnt[7]_i_4_n_0\,
I3 => \bresp_cnt[7]_i_5_n_0\,
O => SR(0)
);
\bresp_cnt[7]_i_3\: unisim.vcomponents.LUT6
generic map(
INIT => X"EEFEFFFFFFFFEEFE"
)
port map (
I0 => \bresp_cnt_reg[7]\(7),
I1 => \bresp_cnt_reg[7]\(6),
I2 => \bresp_cnt_reg[7]\(0),
I3 => \memory_reg[3][0]_srl4_n_0\,
I4 => \bresp_cnt_reg[7]\(3),
I5 => \memory_reg[3][3]_srl4_n_0\,
O => \bresp_cnt[7]_i_3_n_0\
);
\bresp_cnt[7]_i_4\: unisim.vcomponents.LUT5
generic map(
INIT => X"FFF6FFFF"
)
port map (
I0 => \bresp_cnt_reg[7]\(1),
I1 => \memory_reg[3][1]_srl4_n_0\,
I2 => \bresp_cnt_reg[7]\(4),
I3 => \bresp_cnt_reg[7]\(5),
I4 => mhandshake_r,
O => \bresp_cnt[7]_i_4_n_0\
);
\bresp_cnt[7]_i_5\: unisim.vcomponents.LUT6
generic map(
INIT => X"0000D00DD00DD00D"
)
port map (
I0 => \memory_reg[3][0]_srl4_n_0\,
I1 => \bresp_cnt_reg[7]\(0),
I2 => \bresp_cnt_reg[7]\(2),
I3 => \memory_reg[3][2]_srl4_n_0\,
I4 => \^cnt_read_reg[1]_rep__0_0\,
I5 => \^cnt_read_reg[0]_rep__0_0\,
O => \bresp_cnt[7]_i_5_n_0\
);
bvalid_i_i_1: unisim.vcomponents.LUT4
generic map(
INIT => X"0444"
)
port map (
I0 => areset_d1,
I1 => bvalid_i_i_2_n_0,
I2 => si_rs_bready,
I3 => bvalid_i_reg_0,
O => bvalid_i_reg
);
bvalid_i_i_2: unisim.vcomponents.LUT6
generic map(
INIT => X"FFFFFFFF00070707"
)
port map (
I0 => \^cnt_read_reg[1]_rep__0_0\,
I1 => \^cnt_read_reg[0]_rep__0_0\,
I2 => shandshake_r,
I3 => Q(1),
I4 => Q(0),
I5 => bvalid_i_reg_0,
O => bvalid_i_i_2_n_0
);
\cnt_read[0]_i_1\: unisim.vcomponents.LUT3
generic map(
INIT => X"96"
)
port map (
I0 => \^bresp_push\,
I1 => shandshake_r,
I2 => Q(0),
O => D(0)
);
\cnt_read[0]_i_1__2\: unisim.vcomponents.LUT3
generic map(
INIT => X"96"
)
port map (
I0 => \^cnt_read_reg[0]_rep__0_0\,
I1 => b_push,
I2 => shandshake_r,
O => \cnt_read[0]_i_1__2_n_0\
);
\cnt_read[1]_i_1\: unisim.vcomponents.LUT4
generic map(
INIT => X"E718"
)
port map (
I0 => \^cnt_read_reg[0]_rep__0_0\,
I1 => b_push,
I2 => shandshake_r,
I3 => \^cnt_read_reg[1]_rep__0_0\,
O => \cnt_read[1]_i_1_n_0\
);
\cnt_read_reg[0]\: unisim.vcomponents.FDSE
generic map(
INIT => '1'
)
port map (
C => aclk,
CE => '1',
D => \cnt_read[0]_i_1__2_n_0\,
Q => cnt_read(0),
S => areset_d1
);
\cnt_read_reg[0]_rep\: unisim.vcomponents.FDSE
generic map(
INIT => '1'
)
port map (
C => aclk,
CE => '1',
D => \cnt_read[0]_i_1__2_n_0\,
Q => \cnt_read_reg[0]_rep_n_0\,
S => areset_d1
);
\cnt_read_reg[0]_rep__0\: unisim.vcomponents.FDSE
generic map(
INIT => '1'
)
port map (
C => aclk,
CE => '1',
D => \cnt_read[0]_i_1__2_n_0\,
Q => \^cnt_read_reg[0]_rep__0_0\,
S => areset_d1
);
\cnt_read_reg[1]\: unisim.vcomponents.FDSE
generic map(
INIT => '1'
)
port map (
C => aclk,
CE => '1',
D => \cnt_read[1]_i_1_n_0\,
Q => cnt_read(1),
S => areset_d1
);
\cnt_read_reg[1]_rep\: unisim.vcomponents.FDSE
generic map(
INIT => '1'
)
port map (
C => aclk,
CE => '1',
D => \cnt_read[1]_i_1_n_0\,
Q => \cnt_read_reg[1]_rep_n_0\,
S => areset_d1
);
\cnt_read_reg[1]_rep__0\: unisim.vcomponents.FDSE
generic map(
INIT => '1'
)
port map (
C => aclk,
CE => '1',
D => \cnt_read[1]_i_1_n_0\,
Q => \^cnt_read_reg[1]_rep__0_0\,
S => areset_d1
);
\memory_reg[3][0]_srl4\: unisim.vcomponents.SRL16E
generic map(
INIT => X"0000"
)
port map (
A0 => \cnt_read_reg[0]_rep_n_0\,
A1 => \cnt_read_reg[1]_rep_n_0\,
A2 => '0',
A3 => '0',
CE => b_push,
CLK => aclk,
D => \in\(0),
Q => \memory_reg[3][0]_srl4_n_0\
);
\memory_reg[3][0]_srl4_i_1__0\: unisim.vcomponents.LUT6
generic map(
INIT => X"0000000041004141"
)
port map (
I0 => \memory_reg[3][0]_srl4_i_2__0_n_0\,
I1 => \memory_reg[3][2]_srl4_n_0\,
I2 => \bresp_cnt_reg[7]\(2),
I3 => \bresp_cnt_reg[7]\(0),
I4 => \memory_reg[3][0]_srl4_n_0\,
I5 => \memory_reg[3][0]_srl4_i_3_n_0\,
O => \^bresp_push\
);
\memory_reg[3][0]_srl4_i_2__0\: unisim.vcomponents.LUT2
generic map(
INIT => X"8"
)
port map (
I0 => \^cnt_read_reg[1]_rep__0_0\,
I1 => \^cnt_read_reg[0]_rep__0_0\,
O => \memory_reg[3][0]_srl4_i_2__0_n_0\
);
\memory_reg[3][0]_srl4_i_3\: unisim.vcomponents.LUT6
generic map(
INIT => X"FFFBFFFFFFFFFFFB"
)
port map (
I0 => \bresp_cnt[7]_i_3_n_0\,
I1 => mhandshake_r,
I2 => \bresp_cnt_reg[7]\(5),
I3 => \bresp_cnt_reg[7]\(4),
I4 => \memory_reg[3][1]_srl4_n_0\,
I5 => \bresp_cnt_reg[7]\(1),
O => \memory_reg[3][0]_srl4_i_3_n_0\
);
\memory_reg[3][10]_srl4\: unisim.vcomponents.SRL16E
generic map(
INIT => X"0000"
)
port map (
A0 => \cnt_read_reg[0]_rep_n_0\,
A1 => \cnt_read_reg[1]_rep_n_0\,
A2 => '0',
A3 => '0',
CE => b_push,
CLK => aclk,
D => \in\(6),
Q => \out\(2)
);
\memory_reg[3][11]_srl4\: unisim.vcomponents.SRL16E
generic map(
INIT => X"0000"
)
port map (
A0 => \cnt_read_reg[0]_rep_n_0\,
A1 => \cnt_read_reg[1]_rep_n_0\,
A2 => '0',
A3 => '0',
CE => b_push,
CLK => aclk,
D => \in\(7),
Q => \out\(3)
);
\memory_reg[3][12]_srl4\: unisim.vcomponents.SRL16E
generic map(
INIT => X"0000"
)
port map (
A0 => cnt_read(0),
A1 => cnt_read(1),
A2 => '0',
A3 => '0',
CE => b_push,
CLK => aclk,
D => \in\(8),
Q => \out\(4)
);
\memory_reg[3][13]_srl4\: unisim.vcomponents.SRL16E
generic map(
INIT => X"0000"
)
port map (
A0 => cnt_read(0),
A1 => cnt_read(1),
A2 => '0',
A3 => '0',
CE => b_push,
CLK => aclk,
D => \in\(9),
Q => \out\(5)
);
\memory_reg[3][14]_srl4\: unisim.vcomponents.SRL16E
generic map(
INIT => X"0000"
)
port map (
A0 => cnt_read(0),
A1 => cnt_read(1),
A2 => '0',
A3 => '0',
CE => b_push,
CLK => aclk,
D => \in\(10),
Q => \out\(6)
);
\memory_reg[3][15]_srl4\: unisim.vcomponents.SRL16E
generic map(
INIT => X"0000"
)
port map (
A0 => cnt_read(0),
A1 => cnt_read(1),
A2 => '0',
A3 => '0',
CE => b_push,
CLK => aclk,
D => \in\(11),
Q => \out\(7)
);
\memory_reg[3][16]_srl4\: unisim.vcomponents.SRL16E
generic map(
INIT => X"0000"
)
port map (
A0 => cnt_read(0),
A1 => cnt_read(1),
A2 => '0',
A3 => '0',
CE => b_push,
CLK => aclk,
D => \in\(12),
Q => \out\(8)
);
\memory_reg[3][17]_srl4\: unisim.vcomponents.SRL16E
generic map(
INIT => X"0000"
)
port map (
A0 => cnt_read(0),
A1 => cnt_read(1),
A2 => '0',
A3 => '0',
CE => b_push,
CLK => aclk,
D => \in\(13),
Q => \out\(9)
);
\memory_reg[3][18]_srl4\: unisim.vcomponents.SRL16E
generic map(
INIT => X"0000"
)
port map (
A0 => cnt_read(0),
A1 => cnt_read(1),
A2 => '0',
A3 => '0',
CE => b_push,
CLK => aclk,
D => \in\(14),
Q => \out\(10)
);
\memory_reg[3][19]_srl4\: unisim.vcomponents.SRL16E
generic map(
INIT => X"0000"
)
port map (
A0 => cnt_read(0),
A1 => cnt_read(1),
A2 => '0',
A3 => '0',
CE => b_push,
CLK => aclk,
D => \in\(15),
Q => \out\(11)
);
\memory_reg[3][1]_srl4\: unisim.vcomponents.SRL16E
generic map(
INIT => X"0000"
)
port map (
A0 => \cnt_read_reg[0]_rep_n_0\,
A1 => \cnt_read_reg[1]_rep_n_0\,
A2 => '0',
A3 => '0',
CE => b_push,
CLK => aclk,
D => \in\(1),
Q => \memory_reg[3][1]_srl4_n_0\
);
\memory_reg[3][2]_srl4\: unisim.vcomponents.SRL16E
generic map(
INIT => X"0000"
)
port map (
A0 => \cnt_read_reg[0]_rep_n_0\,
A1 => \cnt_read_reg[1]_rep_n_0\,
A2 => '0',
A3 => '0',
CE => b_push,
CLK => aclk,
D => \in\(2),
Q => \memory_reg[3][2]_srl4_n_0\
);
\memory_reg[3][3]_srl4\: unisim.vcomponents.SRL16E
generic map(
INIT => X"0000"
)
port map (
A0 => \cnt_read_reg[0]_rep_n_0\,
A1 => \cnt_read_reg[1]_rep_n_0\,
A2 => '0',
A3 => '0',
CE => b_push,
CLK => aclk,
D => \in\(3),
Q => \memory_reg[3][3]_srl4_n_0\
);
\memory_reg[3][8]_srl4\: unisim.vcomponents.SRL16E
generic map(
INIT => X"0000"
)
port map (
A0 => \cnt_read_reg[0]_rep_n_0\,
A1 => \cnt_read_reg[1]_rep_n_0\,
A2 => '0',
A3 => '0',
CE => b_push,
CLK => aclk,
D => \in\(4),
Q => \out\(0)
);
\memory_reg[3][9]_srl4\: unisim.vcomponents.SRL16E
generic map(
INIT => X"0000"
)
port map (
A0 => \cnt_read_reg[0]_rep_n_0\,
A1 => \cnt_read_reg[1]_rep_n_0\,
A2 => '0',
A3 => '0',
CE => b_push,
CLK => aclk,
D => \in\(5),
Q => \out\(1)
);
end STRUCTURE;
library IEEE;
use IEEE.STD_LOGIC_1164.ALL;
library UNISIM;
use UNISIM.VCOMPONENTS.ALL;
entity \decalper_eb_ot_sdeen_pot_pi_dehcac_xnilix_axi_protocol_converter_v2_1_17_b2s_simple_fifo__parameterized0\ is
port (
Q : out STD_LOGIC_VECTOR ( 1 downto 0 );
mhandshake : out STD_LOGIC;
m_axi_bready : out STD_LOGIC;
\skid_buffer_reg[1]\ : out STD_LOGIC_VECTOR ( 1 downto 0 );
shandshake_r : in STD_LOGIC;
sel : in STD_LOGIC;
m_axi_bvalid : in STD_LOGIC;
mhandshake_r : in STD_LOGIC;
\in\ : in STD_LOGIC_VECTOR ( 1 downto 0 );
aclk : in STD_LOGIC;
areset_d1 : in STD_LOGIC;
D : in STD_LOGIC_VECTOR ( 0 to 0 )
);
attribute ORIG_REF_NAME : string;
attribute ORIG_REF_NAME of \decalper_eb_ot_sdeen_pot_pi_dehcac_xnilix_axi_protocol_converter_v2_1_17_b2s_simple_fifo__parameterized0\ : entity is "axi_protocol_converter_v2_1_17_b2s_simple_fifo";
end \decalper_eb_ot_sdeen_pot_pi_dehcac_xnilix_axi_protocol_converter_v2_1_17_b2s_simple_fifo__parameterized0\;
architecture STRUCTURE of \decalper_eb_ot_sdeen_pot_pi_dehcac_xnilix_axi_protocol_converter_v2_1_17_b2s_simple_fifo__parameterized0\ is
signal \^q\ : STD_LOGIC_VECTOR ( 1 downto 0 );
signal \cnt_read[1]_i_1__0_n_0\ : STD_LOGIC;
attribute SOFT_HLUTNM : string;
attribute SOFT_HLUTNM of \cnt_read[1]_i_1__0\ : label is "soft_lutpair122";
attribute KEEP : string;
attribute KEEP of \cnt_read_reg[0]\ : label is "yes";
attribute KEEP of \cnt_read_reg[1]\ : label is "yes";
attribute SOFT_HLUTNM of m_axi_bready_INST_0 : label is "soft_lutpair122";
attribute srl_bus_name : string;
attribute srl_bus_name of \memory_reg[3][0]_srl4\ : label is "inst/\gen_axilite.gen_b2s_conv.axilite_b2s/WR.b_channel_0/bresp_fifo_0/memory_reg[3] ";
attribute srl_name : string;
attribute srl_name of \memory_reg[3][0]_srl4\ : label is "inst/\gen_axilite.gen_b2s_conv.axilite_b2s/WR.b_channel_0/bresp_fifo_0/memory_reg[3][0]_srl4 ";
attribute srl_bus_name of \memory_reg[3][1]_srl4\ : label is "inst/\gen_axilite.gen_b2s_conv.axilite_b2s/WR.b_channel_0/bresp_fifo_0/memory_reg[3] ";
attribute srl_name of \memory_reg[3][1]_srl4\ : label is "inst/\gen_axilite.gen_b2s_conv.axilite_b2s/WR.b_channel_0/bresp_fifo_0/memory_reg[3][1]_srl4 ";
begin
Q(1 downto 0) <= \^q\(1 downto 0);
\cnt_read[1]_i_1__0\: unisim.vcomponents.LUT4
generic map(
INIT => X"A69A"
)
port map (
I0 => \^q\(1),
I1 => \^q\(0),
I2 => shandshake_r,
I3 => sel,
O => \cnt_read[1]_i_1__0_n_0\
);
\cnt_read_reg[0]\: unisim.vcomponents.FDSE
generic map(
INIT => '1'
)
port map (
C => aclk,
CE => '1',
D => D(0),
Q => \^q\(0),
S => areset_d1
);
\cnt_read_reg[1]\: unisim.vcomponents.FDSE
generic map(
INIT => '1'
)
port map (
C => aclk,
CE => '1',
D => \cnt_read[1]_i_1__0_n_0\,
Q => \^q\(1),
S => areset_d1
);
m_axi_bready_INST_0: unisim.vcomponents.LUT3
generic map(
INIT => X"08"
)
port map (
I0 => \^q\(1),
I1 => \^q\(0),
I2 => mhandshake_r,
O => m_axi_bready
);
\memory_reg[3][0]_srl4\: unisim.vcomponents.SRL16E
generic map(
INIT => X"0000"
)
port map (
A0 => \^q\(0),
A1 => \^q\(1),
A2 => '0',
A3 => '0',
CE => sel,
CLK => aclk,
D => \in\(0),
Q => \skid_buffer_reg[1]\(0)
);
\memory_reg[3][1]_srl4\: unisim.vcomponents.SRL16E
generic map(
INIT => X"0000"
)
port map (
A0 => \^q\(0),
A1 => \^q\(1),
A2 => '0',
A3 => '0',
CE => sel,
CLK => aclk,
D => \in\(1),
Q => \skid_buffer_reg[1]\(1)
);
mhandshake_r_i_1: unisim.vcomponents.LUT4
generic map(
INIT => X"2000"
)
port map (
I0 => m_axi_bvalid,
I1 => mhandshake_r,
I2 => \^q\(0),
I3 => \^q\(1),
O => mhandshake
);
end STRUCTURE;
library IEEE;
use IEEE.STD_LOGIC_1164.ALL;
library UNISIM;
use UNISIM.VCOMPONENTS.ALL;
entity \decalper_eb_ot_sdeen_pot_pi_dehcac_xnilix_axi_protocol_converter_v2_1_17_b2s_simple_fifo__parameterized1\ is
port (
\cnt_read_reg[4]_rep__2_0\ : out STD_LOGIC;
\cnt_read_reg[4]_rep__2_1\ : out STD_LOGIC;
\cnt_read_reg[4]_rep__2_2\ : out STD_LOGIC;
m_axi_rready : out STD_LOGIC;
\state_reg[1]_rep\ : out STD_LOGIC;
\out\ : out STD_LOGIC_VECTOR ( 33 downto 0 );
s_ready_i_reg : in STD_LOGIC;
\cnt_read_reg[4]_rep__0_0\ : in STD_LOGIC;
si_rs_rready : in STD_LOGIC;
m_axi_rvalid : in STD_LOGIC;
\in\ : in STD_LOGIC_VECTOR ( 33 downto 0 );
aclk : in STD_LOGIC;
areset_d1 : in STD_LOGIC
);
attribute ORIG_REF_NAME : string;
attribute ORIG_REF_NAME of \decalper_eb_ot_sdeen_pot_pi_dehcac_xnilix_axi_protocol_converter_v2_1_17_b2s_simple_fifo__parameterized1\ : entity is "axi_protocol_converter_v2_1_17_b2s_simple_fifo";
end \decalper_eb_ot_sdeen_pot_pi_dehcac_xnilix_axi_protocol_converter_v2_1_17_b2s_simple_fifo__parameterized1\;
architecture STRUCTURE of \decalper_eb_ot_sdeen_pot_pi_dehcac_xnilix_axi_protocol_converter_v2_1_17_b2s_simple_fifo__parameterized1\ is
signal cnt_read : STD_LOGIC_VECTOR ( 4 downto 0 );
signal \cnt_read[0]_i_1__1_n_0\ : STD_LOGIC;
signal \cnt_read[1]_i_1__2_n_0\ : STD_LOGIC;
signal \cnt_read[2]_i_1_n_0\ : STD_LOGIC;
signal \cnt_read[3]_i_1__0_n_0\ : STD_LOGIC;
signal \cnt_read[4]_i_1_n_0\ : STD_LOGIC;
signal \cnt_read[4]_i_3__0_n_0\ : STD_LOGIC;
signal \cnt_read[4]_i_5_n_0\ : STD_LOGIC;
signal \cnt_read_reg[0]_rep__0_n_0\ : STD_LOGIC;
signal \cnt_read_reg[0]_rep__1_n_0\ : STD_LOGIC;
signal \cnt_read_reg[0]_rep__2_n_0\ : STD_LOGIC;
signal \cnt_read_reg[0]_rep__3_n_0\ : STD_LOGIC;
signal \cnt_read_reg[0]_rep_n_0\ : STD_LOGIC;
signal \cnt_read_reg[1]_rep__0_n_0\ : STD_LOGIC;
signal \cnt_read_reg[1]_rep__1_n_0\ : STD_LOGIC;
signal \cnt_read_reg[1]_rep__2_n_0\ : STD_LOGIC;
signal \cnt_read_reg[1]_rep_n_0\ : STD_LOGIC;
signal \cnt_read_reg[2]_rep__0_n_0\ : STD_LOGIC;
signal \cnt_read_reg[2]_rep__1_n_0\ : STD_LOGIC;
signal \cnt_read_reg[2]_rep__2_n_0\ : STD_LOGIC;
signal \cnt_read_reg[2]_rep_n_0\ : STD_LOGIC;
signal \cnt_read_reg[3]_rep__0_n_0\ : STD_LOGIC;
signal \cnt_read_reg[3]_rep__1_n_0\ : STD_LOGIC;
signal \cnt_read_reg[3]_rep_n_0\ : STD_LOGIC;
signal \cnt_read_reg[4]_rep__0_n_0\ : STD_LOGIC;
signal \cnt_read_reg[4]_rep__1_n_0\ : STD_LOGIC;
signal \^cnt_read_reg[4]_rep__2_0\ : STD_LOGIC;
signal \^cnt_read_reg[4]_rep__2_1\ : STD_LOGIC;
signal \^cnt_read_reg[4]_rep__2_2\ : STD_LOGIC;
signal \cnt_read_reg[4]_rep_n_0\ : STD_LOGIC;
signal wr_en0 : STD_LOGIC;
signal \NLW_memory_reg[31][0]_srl32_Q31_UNCONNECTED\ : STD_LOGIC;
signal \NLW_memory_reg[31][10]_srl32_Q31_UNCONNECTED\ : STD_LOGIC;
signal \NLW_memory_reg[31][11]_srl32_Q31_UNCONNECTED\ : STD_LOGIC;
signal \NLW_memory_reg[31][12]_srl32_Q31_UNCONNECTED\ : STD_LOGIC;
signal \NLW_memory_reg[31][13]_srl32_Q31_UNCONNECTED\ : STD_LOGIC;
signal \NLW_memory_reg[31][14]_srl32_Q31_UNCONNECTED\ : STD_LOGIC;
signal \NLW_memory_reg[31][15]_srl32_Q31_UNCONNECTED\ : STD_LOGIC;
signal \NLW_memory_reg[31][16]_srl32_Q31_UNCONNECTED\ : STD_LOGIC;
signal \NLW_memory_reg[31][17]_srl32_Q31_UNCONNECTED\ : STD_LOGIC;
signal \NLW_memory_reg[31][18]_srl32_Q31_UNCONNECTED\ : STD_LOGIC;
signal \NLW_memory_reg[31][19]_srl32_Q31_UNCONNECTED\ : STD_LOGIC;
signal \NLW_memory_reg[31][1]_srl32_Q31_UNCONNECTED\ : STD_LOGIC;
signal \NLW_memory_reg[31][20]_srl32_Q31_UNCONNECTED\ : STD_LOGIC;
signal \NLW_memory_reg[31][21]_srl32_Q31_UNCONNECTED\ : STD_LOGIC;
signal \NLW_memory_reg[31][22]_srl32_Q31_UNCONNECTED\ : STD_LOGIC;
signal \NLW_memory_reg[31][23]_srl32_Q31_UNCONNECTED\ : STD_LOGIC;
signal \NLW_memory_reg[31][24]_srl32_Q31_UNCONNECTED\ : STD_LOGIC;
signal \NLW_memory_reg[31][25]_srl32_Q31_UNCONNECTED\ : STD_LOGIC;
signal \NLW_memory_reg[31][26]_srl32_Q31_UNCONNECTED\ : STD_LOGIC;
signal \NLW_memory_reg[31][27]_srl32_Q31_UNCONNECTED\ : STD_LOGIC;
signal \NLW_memory_reg[31][28]_srl32_Q31_UNCONNECTED\ : STD_LOGIC;
signal \NLW_memory_reg[31][29]_srl32_Q31_UNCONNECTED\ : STD_LOGIC;
signal \NLW_memory_reg[31][2]_srl32_Q31_UNCONNECTED\ : STD_LOGIC;
signal \NLW_memory_reg[31][30]_srl32_Q31_UNCONNECTED\ : STD_LOGIC;
signal \NLW_memory_reg[31][31]_srl32_Q31_UNCONNECTED\ : STD_LOGIC;
signal \NLW_memory_reg[31][32]_srl32_Q31_UNCONNECTED\ : STD_LOGIC;
signal \NLW_memory_reg[31][33]_srl32_Q31_UNCONNECTED\ : STD_LOGIC;
signal \NLW_memory_reg[31][3]_srl32_Q31_UNCONNECTED\ : STD_LOGIC;
signal \NLW_memory_reg[31][4]_srl32_Q31_UNCONNECTED\ : STD_LOGIC;
signal \NLW_memory_reg[31][5]_srl32_Q31_UNCONNECTED\ : STD_LOGIC;
signal \NLW_memory_reg[31][6]_srl32_Q31_UNCONNECTED\ : STD_LOGIC;
signal \NLW_memory_reg[31][7]_srl32_Q31_UNCONNECTED\ : STD_LOGIC;
signal \NLW_memory_reg[31][8]_srl32_Q31_UNCONNECTED\ : STD_LOGIC;
signal \NLW_memory_reg[31][9]_srl32_Q31_UNCONNECTED\ : STD_LOGIC;
attribute SOFT_HLUTNM : string;
attribute SOFT_HLUTNM of \cnt_read[1]_i_1__2\ : label is "soft_lutpair18";
attribute SOFT_HLUTNM of \cnt_read[2]_i_1\ : label is "soft_lutpair18";
attribute KEEP : string;
attribute KEEP of \cnt_read_reg[0]\ : label is "yes";
attribute ORIG_CELL_NAME : string;
attribute ORIG_CELL_NAME of \cnt_read_reg[0]\ : label is "cnt_read_reg[0]";
attribute IS_FANOUT_CONSTRAINED : integer;
attribute IS_FANOUT_CONSTRAINED of \cnt_read_reg[0]_rep\ : label is 1;
attribute KEEP of \cnt_read_reg[0]_rep\ : label is "yes";
attribute ORIG_CELL_NAME of \cnt_read_reg[0]_rep\ : label is "cnt_read_reg[0]";
attribute IS_FANOUT_CONSTRAINED of \cnt_read_reg[0]_rep__0\ : label is 1;
attribute KEEP of \cnt_read_reg[0]_rep__0\ : label is "yes";
attribute ORIG_CELL_NAME of \cnt_read_reg[0]_rep__0\ : label is "cnt_read_reg[0]";
attribute IS_FANOUT_CONSTRAINED of \cnt_read_reg[0]_rep__1\ : label is 1;
attribute KEEP of \cnt_read_reg[0]_rep__1\ : label is "yes";
attribute ORIG_CELL_NAME of \cnt_read_reg[0]_rep__1\ : label is "cnt_read_reg[0]";
attribute IS_FANOUT_CONSTRAINED of \cnt_read_reg[0]_rep__2\ : label is 1;
attribute KEEP of \cnt_read_reg[0]_rep__2\ : label is "yes";
attribute ORIG_CELL_NAME of \cnt_read_reg[0]_rep__2\ : label is "cnt_read_reg[0]";
attribute IS_FANOUT_CONSTRAINED of \cnt_read_reg[0]_rep__3\ : label is 1;
attribute KEEP of \cnt_read_reg[0]_rep__3\ : label is "yes";
attribute ORIG_CELL_NAME of \cnt_read_reg[0]_rep__3\ : label is "cnt_read_reg[0]";
attribute KEEP of \cnt_read_reg[1]\ : label is "yes";
attribute ORIG_CELL_NAME of \cnt_read_reg[1]\ : label is "cnt_read_reg[1]";
attribute IS_FANOUT_CONSTRAINED of \cnt_read_reg[1]_rep\ : label is 1;
attribute KEEP of \cnt_read_reg[1]_rep\ : label is "yes";
attribute ORIG_CELL_NAME of \cnt_read_reg[1]_rep\ : label is "cnt_read_reg[1]";
attribute IS_FANOUT_CONSTRAINED of \cnt_read_reg[1]_rep__0\ : label is 1;
attribute KEEP of \cnt_read_reg[1]_rep__0\ : label is "yes";
attribute ORIG_CELL_NAME of \cnt_read_reg[1]_rep__0\ : label is "cnt_read_reg[1]";
attribute IS_FANOUT_CONSTRAINED of \cnt_read_reg[1]_rep__1\ : label is 1;
attribute KEEP of \cnt_read_reg[1]_rep__1\ : label is "yes";
attribute ORIG_CELL_NAME of \cnt_read_reg[1]_rep__1\ : label is "cnt_read_reg[1]";
attribute IS_FANOUT_CONSTRAINED of \cnt_read_reg[1]_rep__2\ : label is 1;
attribute KEEP of \cnt_read_reg[1]_rep__2\ : label is "yes";
attribute ORIG_CELL_NAME of \cnt_read_reg[1]_rep__2\ : label is "cnt_read_reg[1]";
attribute KEEP of \cnt_read_reg[2]\ : label is "yes";
attribute ORIG_CELL_NAME of \cnt_read_reg[2]\ : label is "cnt_read_reg[2]";
attribute IS_FANOUT_CONSTRAINED of \cnt_read_reg[2]_rep\ : label is 1;
attribute KEEP of \cnt_read_reg[2]_rep\ : label is "yes";
attribute ORIG_CELL_NAME of \cnt_read_reg[2]_rep\ : label is "cnt_read_reg[2]";
attribute IS_FANOUT_CONSTRAINED of \cnt_read_reg[2]_rep__0\ : label is 1;
attribute KEEP of \cnt_read_reg[2]_rep__0\ : label is "yes";
attribute ORIG_CELL_NAME of \cnt_read_reg[2]_rep__0\ : label is "cnt_read_reg[2]";
attribute IS_FANOUT_CONSTRAINED of \cnt_read_reg[2]_rep__1\ : label is 1;
attribute KEEP of \cnt_read_reg[2]_rep__1\ : label is "yes";
attribute ORIG_CELL_NAME of \cnt_read_reg[2]_rep__1\ : label is "cnt_read_reg[2]";
attribute IS_FANOUT_CONSTRAINED of \cnt_read_reg[2]_rep__2\ : label is 1;
attribute KEEP of \cnt_read_reg[2]_rep__2\ : label is "yes";
attribute ORIG_CELL_NAME of \cnt_read_reg[2]_rep__2\ : label is "cnt_read_reg[2]";
attribute KEEP of \cnt_read_reg[3]\ : label is "yes";
attribute ORIG_CELL_NAME of \cnt_read_reg[3]\ : label is "cnt_read_reg[3]";
attribute IS_FANOUT_CONSTRAINED of \cnt_read_reg[3]_rep\ : label is 1;
attribute KEEP of \cnt_read_reg[3]_rep\ : label is "yes";
attribute ORIG_CELL_NAME of \cnt_read_reg[3]_rep\ : label is "cnt_read_reg[3]";
attribute IS_FANOUT_CONSTRAINED of \cnt_read_reg[3]_rep__0\ : label is 1;
attribute KEEP of \cnt_read_reg[3]_rep__0\ : label is "yes";
attribute ORIG_CELL_NAME of \cnt_read_reg[3]_rep__0\ : label is "cnt_read_reg[3]";
attribute IS_FANOUT_CONSTRAINED of \cnt_read_reg[3]_rep__1\ : label is 1;
attribute KEEP of \cnt_read_reg[3]_rep__1\ : label is "yes";
attribute ORIG_CELL_NAME of \cnt_read_reg[3]_rep__1\ : label is "cnt_read_reg[3]";
attribute IS_FANOUT_CONSTRAINED of \cnt_read_reg[3]_rep__2\ : label is 1;
attribute KEEP of \cnt_read_reg[3]_rep__2\ : label is "yes";
attribute ORIG_CELL_NAME of \cnt_read_reg[3]_rep__2\ : label is "cnt_read_reg[3]";
attribute KEEP of \cnt_read_reg[4]\ : label is "yes";
attribute ORIG_CELL_NAME of \cnt_read_reg[4]\ : label is "cnt_read_reg[4]";
attribute IS_FANOUT_CONSTRAINED of \cnt_read_reg[4]_rep\ : label is 1;
attribute KEEP of \cnt_read_reg[4]_rep\ : label is "yes";
attribute ORIG_CELL_NAME of \cnt_read_reg[4]_rep\ : label is "cnt_read_reg[4]";
attribute IS_FANOUT_CONSTRAINED of \cnt_read_reg[4]_rep__0\ : label is 1;
attribute KEEP of \cnt_read_reg[4]_rep__0\ : label is "yes";
attribute ORIG_CELL_NAME of \cnt_read_reg[4]_rep__0\ : label is "cnt_read_reg[4]";
attribute IS_FANOUT_CONSTRAINED of \cnt_read_reg[4]_rep__1\ : label is 1;
attribute KEEP of \cnt_read_reg[4]_rep__1\ : label is "yes";
attribute ORIG_CELL_NAME of \cnt_read_reg[4]_rep__1\ : label is "cnt_read_reg[4]";
attribute IS_FANOUT_CONSTRAINED of \cnt_read_reg[4]_rep__2\ : label is 1;
attribute KEEP of \cnt_read_reg[4]_rep__2\ : label is "yes";
attribute ORIG_CELL_NAME of \cnt_read_reg[4]_rep__2\ : label is "cnt_read_reg[4]";
attribute SOFT_HLUTNM of m_axi_rready_INST_0 : label is "soft_lutpair19";
attribute srl_bus_name : string;
attribute srl_bus_name of \memory_reg[31][0]_srl32\ : label is "inst/\gen_axilite.gen_b2s_conv.axilite_b2s/RD.r_channel_0/rd_data_fifo_0/memory_reg[31] ";
attribute srl_name : string;
attribute srl_name of \memory_reg[31][0]_srl32\ : label is "inst/\gen_axilite.gen_b2s_conv.axilite_b2s/RD.r_channel_0/rd_data_fifo_0/memory_reg[31][0]_srl32 ";
attribute srl_bus_name of \memory_reg[31][10]_srl32\ : label is "inst/\gen_axilite.gen_b2s_conv.axilite_b2s/RD.r_channel_0/rd_data_fifo_0/memory_reg[31] ";
attribute srl_name of \memory_reg[31][10]_srl32\ : label is "inst/\gen_axilite.gen_b2s_conv.axilite_b2s/RD.r_channel_0/rd_data_fifo_0/memory_reg[31][10]_srl32 ";
attribute srl_bus_name of \memory_reg[31][11]_srl32\ : label is "inst/\gen_axilite.gen_b2s_conv.axilite_b2s/RD.r_channel_0/rd_data_fifo_0/memory_reg[31] ";
attribute srl_name of \memory_reg[31][11]_srl32\ : label is "inst/\gen_axilite.gen_b2s_conv.axilite_b2s/RD.r_channel_0/rd_data_fifo_0/memory_reg[31][11]_srl32 ";
attribute srl_bus_name of \memory_reg[31][12]_srl32\ : label is "inst/\gen_axilite.gen_b2s_conv.axilite_b2s/RD.r_channel_0/rd_data_fifo_0/memory_reg[31] ";
attribute srl_name of \memory_reg[31][12]_srl32\ : label is "inst/\gen_axilite.gen_b2s_conv.axilite_b2s/RD.r_channel_0/rd_data_fifo_0/memory_reg[31][12]_srl32 ";
attribute srl_bus_name of \memory_reg[31][13]_srl32\ : label is "inst/\gen_axilite.gen_b2s_conv.axilite_b2s/RD.r_channel_0/rd_data_fifo_0/memory_reg[31] ";
attribute srl_name of \memory_reg[31][13]_srl32\ : label is "inst/\gen_axilite.gen_b2s_conv.axilite_b2s/RD.r_channel_0/rd_data_fifo_0/memory_reg[31][13]_srl32 ";
attribute srl_bus_name of \memory_reg[31][14]_srl32\ : label is "inst/\gen_axilite.gen_b2s_conv.axilite_b2s/RD.r_channel_0/rd_data_fifo_0/memory_reg[31] ";
attribute srl_name of \memory_reg[31][14]_srl32\ : label is "inst/\gen_axilite.gen_b2s_conv.axilite_b2s/RD.r_channel_0/rd_data_fifo_0/memory_reg[31][14]_srl32 ";
attribute srl_bus_name of \memory_reg[31][15]_srl32\ : label is "inst/\gen_axilite.gen_b2s_conv.axilite_b2s/RD.r_channel_0/rd_data_fifo_0/memory_reg[31] ";
attribute srl_name of \memory_reg[31][15]_srl32\ : label is "inst/\gen_axilite.gen_b2s_conv.axilite_b2s/RD.r_channel_0/rd_data_fifo_0/memory_reg[31][15]_srl32 ";
attribute srl_bus_name of \memory_reg[31][16]_srl32\ : label is "inst/\gen_axilite.gen_b2s_conv.axilite_b2s/RD.r_channel_0/rd_data_fifo_0/memory_reg[31] ";
attribute srl_name of \memory_reg[31][16]_srl32\ : label is "inst/\gen_axilite.gen_b2s_conv.axilite_b2s/RD.r_channel_0/rd_data_fifo_0/memory_reg[31][16]_srl32 ";
attribute srl_bus_name of \memory_reg[31][17]_srl32\ : label is "inst/\gen_axilite.gen_b2s_conv.axilite_b2s/RD.r_channel_0/rd_data_fifo_0/memory_reg[31] ";
attribute srl_name of \memory_reg[31][17]_srl32\ : label is "inst/\gen_axilite.gen_b2s_conv.axilite_b2s/RD.r_channel_0/rd_data_fifo_0/memory_reg[31][17]_srl32 ";
attribute srl_bus_name of \memory_reg[31][18]_srl32\ : label is "inst/\gen_axilite.gen_b2s_conv.axilite_b2s/RD.r_channel_0/rd_data_fifo_0/memory_reg[31] ";
attribute srl_name of \memory_reg[31][18]_srl32\ : label is "inst/\gen_axilite.gen_b2s_conv.axilite_b2s/RD.r_channel_0/rd_data_fifo_0/memory_reg[31][18]_srl32 ";
attribute srl_bus_name of \memory_reg[31][19]_srl32\ : label is "inst/\gen_axilite.gen_b2s_conv.axilite_b2s/RD.r_channel_0/rd_data_fifo_0/memory_reg[31] ";
attribute srl_name of \memory_reg[31][19]_srl32\ : label is "inst/\gen_axilite.gen_b2s_conv.axilite_b2s/RD.r_channel_0/rd_data_fifo_0/memory_reg[31][19]_srl32 ";
attribute srl_bus_name of \memory_reg[31][1]_srl32\ : label is "inst/\gen_axilite.gen_b2s_conv.axilite_b2s/RD.r_channel_0/rd_data_fifo_0/memory_reg[31] ";
attribute srl_name of \memory_reg[31][1]_srl32\ : label is "inst/\gen_axilite.gen_b2s_conv.axilite_b2s/RD.r_channel_0/rd_data_fifo_0/memory_reg[31][1]_srl32 ";
attribute srl_bus_name of \memory_reg[31][20]_srl32\ : label is "inst/\gen_axilite.gen_b2s_conv.axilite_b2s/RD.r_channel_0/rd_data_fifo_0/memory_reg[31] ";
attribute srl_name of \memory_reg[31][20]_srl32\ : label is "inst/\gen_axilite.gen_b2s_conv.axilite_b2s/RD.r_channel_0/rd_data_fifo_0/memory_reg[31][20]_srl32 ";
attribute srl_bus_name of \memory_reg[31][21]_srl32\ : label is "inst/\gen_axilite.gen_b2s_conv.axilite_b2s/RD.r_channel_0/rd_data_fifo_0/memory_reg[31] ";
attribute srl_name of \memory_reg[31][21]_srl32\ : label is "inst/\gen_axilite.gen_b2s_conv.axilite_b2s/RD.r_channel_0/rd_data_fifo_0/memory_reg[31][21]_srl32 ";
attribute srl_bus_name of \memory_reg[31][22]_srl32\ : label is "inst/\gen_axilite.gen_b2s_conv.axilite_b2s/RD.r_channel_0/rd_data_fifo_0/memory_reg[31] ";
attribute srl_name of \memory_reg[31][22]_srl32\ : label is "inst/\gen_axilite.gen_b2s_conv.axilite_b2s/RD.r_channel_0/rd_data_fifo_0/memory_reg[31][22]_srl32 ";
attribute srl_bus_name of \memory_reg[31][23]_srl32\ : label is "inst/\gen_axilite.gen_b2s_conv.axilite_b2s/RD.r_channel_0/rd_data_fifo_0/memory_reg[31] ";
attribute srl_name of \memory_reg[31][23]_srl32\ : label is "inst/\gen_axilite.gen_b2s_conv.axilite_b2s/RD.r_channel_0/rd_data_fifo_0/memory_reg[31][23]_srl32 ";
attribute srl_bus_name of \memory_reg[31][24]_srl32\ : label is "inst/\gen_axilite.gen_b2s_conv.axilite_b2s/RD.r_channel_0/rd_data_fifo_0/memory_reg[31] ";
attribute srl_name of \memory_reg[31][24]_srl32\ : label is "inst/\gen_axilite.gen_b2s_conv.axilite_b2s/RD.r_channel_0/rd_data_fifo_0/memory_reg[31][24]_srl32 ";
attribute srl_bus_name of \memory_reg[31][25]_srl32\ : label is "inst/\gen_axilite.gen_b2s_conv.axilite_b2s/RD.r_channel_0/rd_data_fifo_0/memory_reg[31] ";
attribute srl_name of \memory_reg[31][25]_srl32\ : label is "inst/\gen_axilite.gen_b2s_conv.axilite_b2s/RD.r_channel_0/rd_data_fifo_0/memory_reg[31][25]_srl32 ";
attribute srl_bus_name of \memory_reg[31][26]_srl32\ : label is "inst/\gen_axilite.gen_b2s_conv.axilite_b2s/RD.r_channel_0/rd_data_fifo_0/memory_reg[31] ";
attribute srl_name of \memory_reg[31][26]_srl32\ : label is "inst/\gen_axilite.gen_b2s_conv.axilite_b2s/RD.r_channel_0/rd_data_fifo_0/memory_reg[31][26]_srl32 ";
attribute srl_bus_name of \memory_reg[31][27]_srl32\ : label is "inst/\gen_axilite.gen_b2s_conv.axilite_b2s/RD.r_channel_0/rd_data_fifo_0/memory_reg[31] ";
attribute srl_name of \memory_reg[31][27]_srl32\ : label is "inst/\gen_axilite.gen_b2s_conv.axilite_b2s/RD.r_channel_0/rd_data_fifo_0/memory_reg[31][27]_srl32 ";
attribute srl_bus_name of \memory_reg[31][28]_srl32\ : label is "inst/\gen_axilite.gen_b2s_conv.axilite_b2s/RD.r_channel_0/rd_data_fifo_0/memory_reg[31] ";
attribute srl_name of \memory_reg[31][28]_srl32\ : label is "inst/\gen_axilite.gen_b2s_conv.axilite_b2s/RD.r_channel_0/rd_data_fifo_0/memory_reg[31][28]_srl32 ";
attribute srl_bus_name of \memory_reg[31][29]_srl32\ : label is "inst/\gen_axilite.gen_b2s_conv.axilite_b2s/RD.r_channel_0/rd_data_fifo_0/memory_reg[31] ";
attribute srl_name of \memory_reg[31][29]_srl32\ : label is "inst/\gen_axilite.gen_b2s_conv.axilite_b2s/RD.r_channel_0/rd_data_fifo_0/memory_reg[31][29]_srl32 ";
attribute srl_bus_name of \memory_reg[31][2]_srl32\ : label is "inst/\gen_axilite.gen_b2s_conv.axilite_b2s/RD.r_channel_0/rd_data_fifo_0/memory_reg[31] ";
attribute srl_name of \memory_reg[31][2]_srl32\ : label is "inst/\gen_axilite.gen_b2s_conv.axilite_b2s/RD.r_channel_0/rd_data_fifo_0/memory_reg[31][2]_srl32 ";
attribute srl_bus_name of \memory_reg[31][30]_srl32\ : label is "inst/\gen_axilite.gen_b2s_conv.axilite_b2s/RD.r_channel_0/rd_data_fifo_0/memory_reg[31] ";
attribute srl_name of \memory_reg[31][30]_srl32\ : label is "inst/\gen_axilite.gen_b2s_conv.axilite_b2s/RD.r_channel_0/rd_data_fifo_0/memory_reg[31][30]_srl32 ";
attribute srl_bus_name of \memory_reg[31][31]_srl32\ : label is "inst/\gen_axilite.gen_b2s_conv.axilite_b2s/RD.r_channel_0/rd_data_fifo_0/memory_reg[31] ";
attribute srl_name of \memory_reg[31][31]_srl32\ : label is "inst/\gen_axilite.gen_b2s_conv.axilite_b2s/RD.r_channel_0/rd_data_fifo_0/memory_reg[31][31]_srl32 ";
attribute srl_bus_name of \memory_reg[31][32]_srl32\ : label is "inst/\gen_axilite.gen_b2s_conv.axilite_b2s/RD.r_channel_0/rd_data_fifo_0/memory_reg[31] ";
attribute srl_name of \memory_reg[31][32]_srl32\ : label is "inst/\gen_axilite.gen_b2s_conv.axilite_b2s/RD.r_channel_0/rd_data_fifo_0/memory_reg[31][32]_srl32 ";
attribute srl_bus_name of \memory_reg[31][33]_srl32\ : label is "inst/\gen_axilite.gen_b2s_conv.axilite_b2s/RD.r_channel_0/rd_data_fifo_0/memory_reg[31] ";
attribute srl_name of \memory_reg[31][33]_srl32\ : label is "inst/\gen_axilite.gen_b2s_conv.axilite_b2s/RD.r_channel_0/rd_data_fifo_0/memory_reg[31][33]_srl32 ";
attribute srl_bus_name of \memory_reg[31][3]_srl32\ : label is "inst/\gen_axilite.gen_b2s_conv.axilite_b2s/RD.r_channel_0/rd_data_fifo_0/memory_reg[31] ";
attribute srl_name of \memory_reg[31][3]_srl32\ : label is "inst/\gen_axilite.gen_b2s_conv.axilite_b2s/RD.r_channel_0/rd_data_fifo_0/memory_reg[31][3]_srl32 ";
attribute srl_bus_name of \memory_reg[31][4]_srl32\ : label is "inst/\gen_axilite.gen_b2s_conv.axilite_b2s/RD.r_channel_0/rd_data_fifo_0/memory_reg[31] ";
attribute srl_name of \memory_reg[31][4]_srl32\ : label is "inst/\gen_axilite.gen_b2s_conv.axilite_b2s/RD.r_channel_0/rd_data_fifo_0/memory_reg[31][4]_srl32 ";
attribute srl_bus_name of \memory_reg[31][5]_srl32\ : label is "inst/\gen_axilite.gen_b2s_conv.axilite_b2s/RD.r_channel_0/rd_data_fifo_0/memory_reg[31] ";
attribute srl_name of \memory_reg[31][5]_srl32\ : label is "inst/\gen_axilite.gen_b2s_conv.axilite_b2s/RD.r_channel_0/rd_data_fifo_0/memory_reg[31][5]_srl32 ";
attribute srl_bus_name of \memory_reg[31][6]_srl32\ : label is "inst/\gen_axilite.gen_b2s_conv.axilite_b2s/RD.r_channel_0/rd_data_fifo_0/memory_reg[31] ";
attribute srl_name of \memory_reg[31][6]_srl32\ : label is "inst/\gen_axilite.gen_b2s_conv.axilite_b2s/RD.r_channel_0/rd_data_fifo_0/memory_reg[31][6]_srl32 ";
attribute srl_bus_name of \memory_reg[31][7]_srl32\ : label is "inst/\gen_axilite.gen_b2s_conv.axilite_b2s/RD.r_channel_0/rd_data_fifo_0/memory_reg[31] ";
attribute srl_name of \memory_reg[31][7]_srl32\ : label is "inst/\gen_axilite.gen_b2s_conv.axilite_b2s/RD.r_channel_0/rd_data_fifo_0/memory_reg[31][7]_srl32 ";
attribute srl_bus_name of \memory_reg[31][8]_srl32\ : label is "inst/\gen_axilite.gen_b2s_conv.axilite_b2s/RD.r_channel_0/rd_data_fifo_0/memory_reg[31] ";
attribute srl_name of \memory_reg[31][8]_srl32\ : label is "inst/\gen_axilite.gen_b2s_conv.axilite_b2s/RD.r_channel_0/rd_data_fifo_0/memory_reg[31][8]_srl32 ";
attribute srl_bus_name of \memory_reg[31][9]_srl32\ : label is "inst/\gen_axilite.gen_b2s_conv.axilite_b2s/RD.r_channel_0/rd_data_fifo_0/memory_reg[31] ";
attribute srl_name of \memory_reg[31][9]_srl32\ : label is "inst/\gen_axilite.gen_b2s_conv.axilite_b2s/RD.r_channel_0/rd_data_fifo_0/memory_reg[31][9]_srl32 ";
attribute SOFT_HLUTNM of \state[1]_i_4\ : label is "soft_lutpair19";
begin
\cnt_read_reg[4]_rep__2_0\ <= \^cnt_read_reg[4]_rep__2_0\;
\cnt_read_reg[4]_rep__2_1\ <= \^cnt_read_reg[4]_rep__2_1\;
\cnt_read_reg[4]_rep__2_2\ <= \^cnt_read_reg[4]_rep__2_2\;
\cnt_read[0]_i_1__1\: unisim.vcomponents.LUT3
generic map(
INIT => X"69"
)
port map (
I0 => \cnt_read_reg[0]_rep__2_n_0\,
I1 => s_ready_i_reg,
I2 => \cnt_read[4]_i_5_n_0\,
O => \cnt_read[0]_i_1__1_n_0\
);
\cnt_read[1]_i_1__2\: unisim.vcomponents.LUT4
generic map(
INIT => X"9AA6"
)
port map (
I0 => \cnt_read_reg[1]_rep__2_n_0\,
I1 => \cnt_read_reg[0]_rep__2_n_0\,
I2 => s_ready_i_reg,
I3 => \cnt_read[4]_i_5_n_0\,
O => \cnt_read[1]_i_1__2_n_0\
);
\cnt_read[2]_i_1\: unisim.vcomponents.LUT5
generic map(
INIT => X"A9AAAA6A"
)
port map (
I0 => \cnt_read_reg[2]_rep__2_n_0\,
I1 => \cnt_read_reg[1]_rep__2_n_0\,
I2 => \cnt_read_reg[0]_rep__2_n_0\,
I3 => \cnt_read[4]_i_5_n_0\,
I4 => s_ready_i_reg,
O => \cnt_read[2]_i_1_n_0\
);
\cnt_read[3]_i_1__0\: unisim.vcomponents.LUT6
generic map(
INIT => X"AAAAAA6AA9AAAAAA"
)
port map (
I0 => \^cnt_read_reg[4]_rep__2_0\,
I1 => \cnt_read_reg[2]_rep__2_n_0\,
I2 => \cnt_read_reg[1]_rep__2_n_0\,
I3 => \cnt_read[4]_i_5_n_0\,
I4 => s_ready_i_reg,
I5 => \cnt_read_reg[0]_rep__2_n_0\,
O => \cnt_read[3]_i_1__0_n_0\
);
\cnt_read[4]_i_1\: unisim.vcomponents.LUT6
generic map(
INIT => X"99AA99AA99AA55A6"
)
port map (
I0 => \^cnt_read_reg[4]_rep__2_1\,
I1 => \^cnt_read_reg[4]_rep__2_0\,
I2 => \^cnt_read_reg[4]_rep__2_2\,
I3 => \cnt_read[4]_i_3__0_n_0\,
I4 => s_ready_i_reg,
I5 => \cnt_read[4]_i_5_n_0\,
O => \cnt_read[4]_i_1_n_0\
);
\cnt_read[4]_i_2__0\: unisim.vcomponents.LUT3
generic map(
INIT => X"7F"
)
port map (
I0 => \cnt_read_reg[0]_rep__3_n_0\,
I1 => \cnt_read_reg[1]_rep__2_n_0\,
I2 => \cnt_read_reg[2]_rep__2_n_0\,
O => \^cnt_read_reg[4]_rep__2_2\
);
\cnt_read[4]_i_3__0\: unisim.vcomponents.LUT6
generic map(
INIT => X"0000000000100000"
)
port map (
I0 => \cnt_read_reg[2]_rep__2_n_0\,
I1 => \cnt_read_reg[1]_rep__2_n_0\,
I2 => \cnt_read[4]_i_5_n_0\,
I3 => \cnt_read_reg[4]_rep__0_0\,
I4 => si_rs_rready,
I5 => \cnt_read_reg[0]_rep__2_n_0\,
O => \cnt_read[4]_i_3__0_n_0\
);
\cnt_read[4]_i_5\: unisim.vcomponents.LUT6
generic map(
INIT => X"6000E000FFFFFFFF"
)
port map (
I0 => \cnt_read_reg[2]_rep__2_n_0\,
I1 => \cnt_read_reg[1]_rep__2_n_0\,
I2 => \^cnt_read_reg[4]_rep__2_1\,
I3 => \^cnt_read_reg[4]_rep__2_0\,
I4 => \cnt_read_reg[0]_rep__3_n_0\,
I5 => m_axi_rvalid,
O => \cnt_read[4]_i_5_n_0\
);
\cnt_read_reg[0]\: unisim.vcomponents.FDSE
generic map(
INIT => '1'
)
port map (
C => aclk,
CE => '1',
D => \cnt_read[0]_i_1__1_n_0\,
Q => cnt_read(0),
S => areset_d1
);
\cnt_read_reg[0]_rep\: unisim.vcomponents.FDSE
generic map(
INIT => '1'
)
port map (
C => aclk,
CE => '1',
D => \cnt_read[0]_i_1__1_n_0\,
Q => \cnt_read_reg[0]_rep_n_0\,
S => areset_d1
);
\cnt_read_reg[0]_rep__0\: unisim.vcomponents.FDSE
generic map(
INIT => '1'
)
port map (
C => aclk,
CE => '1',
D => \cnt_read[0]_i_1__1_n_0\,
Q => \cnt_read_reg[0]_rep__0_n_0\,
S => areset_d1
);
\cnt_read_reg[0]_rep__1\: unisim.vcomponents.FDSE
generic map(
INIT => '1'
)
port map (
C => aclk,
CE => '1',
D => \cnt_read[0]_i_1__1_n_0\,
Q => \cnt_read_reg[0]_rep__1_n_0\,
S => areset_d1
);
\cnt_read_reg[0]_rep__2\: unisim.vcomponents.FDSE
generic map(
INIT => '1'
)
port map (
C => aclk,
CE => '1',
D => \cnt_read[0]_i_1__1_n_0\,
Q => \cnt_read_reg[0]_rep__2_n_0\,
S => areset_d1
);
\cnt_read_reg[0]_rep__3\: unisim.vcomponents.FDSE
generic map(
INIT => '1'
)
port map (
C => aclk,
CE => '1',
D => \cnt_read[0]_i_1__1_n_0\,
Q => \cnt_read_reg[0]_rep__3_n_0\,
S => areset_d1
);
\cnt_read_reg[1]\: unisim.vcomponents.FDSE
generic map(
INIT => '1'
)
port map (
C => aclk,
CE => '1',
D => \cnt_read[1]_i_1__2_n_0\,
Q => cnt_read(1),
S => areset_d1
);
\cnt_read_reg[1]_rep\: unisim.vcomponents.FDSE
generic map(
INIT => '1'
)
port map (
C => aclk,
CE => '1',
D => \cnt_read[1]_i_1__2_n_0\,
Q => \cnt_read_reg[1]_rep_n_0\,
S => areset_d1
);
\cnt_read_reg[1]_rep__0\: unisim.vcomponents.FDSE
generic map(
INIT => '1'
)
port map (
C => aclk,
CE => '1',
D => \cnt_read[1]_i_1__2_n_0\,
Q => \cnt_read_reg[1]_rep__0_n_0\,
S => areset_d1
);
\cnt_read_reg[1]_rep__1\: unisim.vcomponents.FDSE
generic map(
INIT => '1'
)
port map (
C => aclk,
CE => '1',
D => \cnt_read[1]_i_1__2_n_0\,
Q => \cnt_read_reg[1]_rep__1_n_0\,
S => areset_d1
);
\cnt_read_reg[1]_rep__2\: unisim.vcomponents.FDSE
generic map(
INIT => '1'
)
port map (
C => aclk,
CE => '1',
D => \cnt_read[1]_i_1__2_n_0\,
Q => \cnt_read_reg[1]_rep__2_n_0\,
S => areset_d1
);
\cnt_read_reg[2]\: unisim.vcomponents.FDSE
generic map(
INIT => '1'
)
port map (
C => aclk,
CE => '1',
D => \cnt_read[2]_i_1_n_0\,
Q => cnt_read(2),
S => areset_d1
);
\cnt_read_reg[2]_rep\: unisim.vcomponents.FDSE
generic map(
INIT => '1'
)
port map (
C => aclk,
CE => '1',
D => \cnt_read[2]_i_1_n_0\,
Q => \cnt_read_reg[2]_rep_n_0\,
S => areset_d1
);
\cnt_read_reg[2]_rep__0\: unisim.vcomponents.FDSE
generic map(
INIT => '1'
)
port map (
C => aclk,
CE => '1',
D => \cnt_read[2]_i_1_n_0\,
Q => \cnt_read_reg[2]_rep__0_n_0\,
S => areset_d1
);
\cnt_read_reg[2]_rep__1\: unisim.vcomponents.FDSE
generic map(
INIT => '1'
)
port map (
C => aclk,
CE => '1',
D => \cnt_read[2]_i_1_n_0\,
Q => \cnt_read_reg[2]_rep__1_n_0\,
S => areset_d1
);
\cnt_read_reg[2]_rep__2\: unisim.vcomponents.FDSE
generic map(
INIT => '1'
)
port map (
C => aclk,
CE => '1',
D => \cnt_read[2]_i_1_n_0\,
Q => \cnt_read_reg[2]_rep__2_n_0\,
S => areset_d1
);
\cnt_read_reg[3]\: unisim.vcomponents.FDSE
generic map(
INIT => '1'
)
port map (
C => aclk,
CE => '1',
D => \cnt_read[3]_i_1__0_n_0\,
Q => cnt_read(3),
S => areset_d1
);
\cnt_read_reg[3]_rep\: unisim.vcomponents.FDSE
generic map(
INIT => '1'
)
port map (
C => aclk,
CE => '1',
D => \cnt_read[3]_i_1__0_n_0\,
Q => \cnt_read_reg[3]_rep_n_0\,
S => areset_d1
);
\cnt_read_reg[3]_rep__0\: unisim.vcomponents.FDSE
generic map(
INIT => '1'
)
port map (
C => aclk,
CE => '1',
D => \cnt_read[3]_i_1__0_n_0\,
Q => \cnt_read_reg[3]_rep__0_n_0\,
S => areset_d1
);
\cnt_read_reg[3]_rep__1\: unisim.vcomponents.FDSE
generic map(
INIT => '1'
)
port map (
C => aclk,
CE => '1',
D => \cnt_read[3]_i_1__0_n_0\,
Q => \cnt_read_reg[3]_rep__1_n_0\,
S => areset_d1
);
\cnt_read_reg[3]_rep__2\: unisim.vcomponents.FDSE
generic map(
INIT => '1'
)
port map (
C => aclk,
CE => '1',
D => \cnt_read[3]_i_1__0_n_0\,
Q => \^cnt_read_reg[4]_rep__2_0\,
S => areset_d1
);
\cnt_read_reg[4]\: unisim.vcomponents.FDSE
generic map(
INIT => '1'
)
port map (
C => aclk,
CE => '1',
D => \cnt_read[4]_i_1_n_0\,
Q => cnt_read(4),
S => areset_d1
);
\cnt_read_reg[4]_rep\: unisim.vcomponents.FDSE
generic map(
INIT => '1'
)
port map (
C => aclk,
CE => '1',
D => \cnt_read[4]_i_1_n_0\,
Q => \cnt_read_reg[4]_rep_n_0\,
S => areset_d1
);
\cnt_read_reg[4]_rep__0\: unisim.vcomponents.FDSE
generic map(
INIT => '1'
)
port map (
C => aclk,
CE => '1',
D => \cnt_read[4]_i_1_n_0\,
Q => \cnt_read_reg[4]_rep__0_n_0\,
S => areset_d1
);
\cnt_read_reg[4]_rep__1\: unisim.vcomponents.FDSE
generic map(
INIT => '1'
)
port map (
C => aclk,
CE => '1',
D => \cnt_read[4]_i_1_n_0\,
Q => \cnt_read_reg[4]_rep__1_n_0\,
S => areset_d1
);
\cnt_read_reg[4]_rep__2\: unisim.vcomponents.FDSE
generic map(
INIT => '1'
)
port map (
C => aclk,
CE => '1',
D => \cnt_read[4]_i_1_n_0\,
Q => \^cnt_read_reg[4]_rep__2_1\,
S => areset_d1
);
m_axi_rready_INST_0: unisim.vcomponents.LUT5
generic map(
INIT => X"9FFF1FFF"
)
port map (
I0 => \cnt_read_reg[2]_rep__2_n_0\,
I1 => \cnt_read_reg[1]_rep__2_n_0\,
I2 => \^cnt_read_reg[4]_rep__2_1\,
I3 => \^cnt_read_reg[4]_rep__2_0\,
I4 => \cnt_read_reg[0]_rep__3_n_0\,
O => m_axi_rready
);
\memory_reg[31][0]_srl32\: unisim.vcomponents.SRLC32E
generic map(
INIT => X"00000000"
)
port map (
A(4) => \cnt_read_reg[4]_rep__1_n_0\,
A(3) => \cnt_read_reg[3]_rep__1_n_0\,
A(2) => \cnt_read_reg[2]_rep__1_n_0\,
A(1) => \cnt_read_reg[1]_rep__1_n_0\,
A(0) => \cnt_read_reg[0]_rep__1_n_0\,
CE => wr_en0,
CLK => aclk,
D => \in\(0),
Q => \out\(0),
Q31 => \NLW_memory_reg[31][0]_srl32_Q31_UNCONNECTED\
);
\memory_reg[31][0]_srl32_i_1\: unisim.vcomponents.LUT6
generic map(
INIT => X"8AAA0AAA0AAAAAAA"
)
port map (
I0 => m_axi_rvalid,
I1 => \cnt_read_reg[0]_rep__3_n_0\,
I2 => \^cnt_read_reg[4]_rep__2_0\,
I3 => \^cnt_read_reg[4]_rep__2_1\,
I4 => \cnt_read_reg[1]_rep__2_n_0\,
I5 => \cnt_read_reg[2]_rep__2_n_0\,
O => wr_en0
);
\memory_reg[31][10]_srl32\: unisim.vcomponents.SRLC32E
generic map(
INIT => X"00000000"
)
port map (
A(4) => \cnt_read_reg[4]_rep__0_n_0\,
A(3) => \cnt_read_reg[3]_rep__0_n_0\,
A(2) => \cnt_read_reg[2]_rep__0_n_0\,
A(1) => \cnt_read_reg[1]_rep__0_n_0\,
A(0) => \cnt_read_reg[0]_rep__0_n_0\,
CE => wr_en0,
CLK => aclk,
D => \in\(10),
Q => \out\(10),
Q31 => \NLW_memory_reg[31][10]_srl32_Q31_UNCONNECTED\
);
\memory_reg[31][11]_srl32\: unisim.vcomponents.SRLC32E
generic map(
INIT => X"00000000"
)
port map (
A(4) => \cnt_read_reg[4]_rep__0_n_0\,
A(3) => \cnt_read_reg[3]_rep__0_n_0\,
A(2) => \cnt_read_reg[2]_rep__0_n_0\,
A(1) => \cnt_read_reg[1]_rep__0_n_0\,
A(0) => \cnt_read_reg[0]_rep__0_n_0\,
CE => wr_en0,
CLK => aclk,
D => \in\(11),
Q => \out\(11),
Q31 => \NLW_memory_reg[31][11]_srl32_Q31_UNCONNECTED\
);
\memory_reg[31][12]_srl32\: unisim.vcomponents.SRLC32E
generic map(
INIT => X"00000000"
)
port map (
A(4) => \cnt_read_reg[4]_rep__0_n_0\,
A(3) => \cnt_read_reg[3]_rep__0_n_0\,
A(2) => \cnt_read_reg[2]_rep__0_n_0\,
A(1) => \cnt_read_reg[1]_rep__0_n_0\,
A(0) => \cnt_read_reg[0]_rep__0_n_0\,
CE => wr_en0,
CLK => aclk,
D => \in\(12),
Q => \out\(12),
Q31 => \NLW_memory_reg[31][12]_srl32_Q31_UNCONNECTED\
);
\memory_reg[31][13]_srl32\: unisim.vcomponents.SRLC32E
generic map(
INIT => X"00000000"
)
port map (
A(4) => \cnt_read_reg[4]_rep__0_n_0\,
A(3) => \cnt_read_reg[3]_rep__0_n_0\,
A(2) => \cnt_read_reg[2]_rep__0_n_0\,
A(1) => \cnt_read_reg[1]_rep__0_n_0\,
A(0) => \cnt_read_reg[0]_rep__0_n_0\,
CE => wr_en0,
CLK => aclk,
D => \in\(13),
Q => \out\(13),
Q31 => \NLW_memory_reg[31][13]_srl32_Q31_UNCONNECTED\
);
\memory_reg[31][14]_srl32\: unisim.vcomponents.SRLC32E
generic map(
INIT => X"00000000"
)
port map (
A(4) => \cnt_read_reg[4]_rep__0_n_0\,
A(3) => \cnt_read_reg[3]_rep__0_n_0\,
A(2) => \cnt_read_reg[2]_rep__0_n_0\,
A(1) => \cnt_read_reg[1]_rep__0_n_0\,
A(0) => \cnt_read_reg[0]_rep__0_n_0\,
CE => wr_en0,
CLK => aclk,
D => \in\(14),
Q => \out\(14),
Q31 => \NLW_memory_reg[31][14]_srl32_Q31_UNCONNECTED\
);
\memory_reg[31][15]_srl32\: unisim.vcomponents.SRLC32E
generic map(
INIT => X"00000000"
)
port map (
A(4) => \cnt_read_reg[4]_rep__0_n_0\,
A(3) => \cnt_read_reg[3]_rep__0_n_0\,
A(2) => \cnt_read_reg[2]_rep__0_n_0\,
A(1) => \cnt_read_reg[1]_rep__0_n_0\,
A(0) => \cnt_read_reg[0]_rep__0_n_0\,
CE => wr_en0,
CLK => aclk,
D => \in\(15),
Q => \out\(15),
Q31 => \NLW_memory_reg[31][15]_srl32_Q31_UNCONNECTED\
);
\memory_reg[31][16]_srl32\: unisim.vcomponents.SRLC32E
generic map(
INIT => X"00000000"
)
port map (
A(4) => \cnt_read_reg[4]_rep_n_0\,
A(3) => \cnt_read_reg[3]_rep_n_0\,
A(2) => \cnt_read_reg[2]_rep_n_0\,
A(1) => \cnt_read_reg[1]_rep_n_0\,
A(0) => \cnt_read_reg[0]_rep_n_0\,
CE => wr_en0,
CLK => aclk,
D => \in\(16),
Q => \out\(16),
Q31 => \NLW_memory_reg[31][16]_srl32_Q31_UNCONNECTED\
);
\memory_reg[31][17]_srl32\: unisim.vcomponents.SRLC32E
generic map(
INIT => X"00000000"
)
port map (
A(4) => \cnt_read_reg[4]_rep_n_0\,
A(3) => \cnt_read_reg[3]_rep_n_0\,
A(2) => \cnt_read_reg[2]_rep_n_0\,
A(1) => \cnt_read_reg[1]_rep_n_0\,
A(0) => \cnt_read_reg[0]_rep_n_0\,
CE => wr_en0,
CLK => aclk,
D => \in\(17),
Q => \out\(17),
Q31 => \NLW_memory_reg[31][17]_srl32_Q31_UNCONNECTED\
);
\memory_reg[31][18]_srl32\: unisim.vcomponents.SRLC32E
generic map(
INIT => X"00000000"
)
port map (
A(4) => \cnt_read_reg[4]_rep_n_0\,
A(3) => \cnt_read_reg[3]_rep_n_0\,
A(2) => \cnt_read_reg[2]_rep_n_0\,
A(1) => \cnt_read_reg[1]_rep_n_0\,
A(0) => \cnt_read_reg[0]_rep_n_0\,
CE => wr_en0,
CLK => aclk,
D => \in\(18),
Q => \out\(18),
Q31 => \NLW_memory_reg[31][18]_srl32_Q31_UNCONNECTED\
);
\memory_reg[31][19]_srl32\: unisim.vcomponents.SRLC32E
generic map(
INIT => X"00000000"
)
port map (
A(4) => \cnt_read_reg[4]_rep_n_0\,
A(3) => \cnt_read_reg[3]_rep_n_0\,
A(2) => \cnt_read_reg[2]_rep_n_0\,
A(1) => \cnt_read_reg[1]_rep_n_0\,
A(0) => \cnt_read_reg[0]_rep_n_0\,
CE => wr_en0,
CLK => aclk,
D => \in\(19),
Q => \out\(19),
Q31 => \NLW_memory_reg[31][19]_srl32_Q31_UNCONNECTED\
);
\memory_reg[31][1]_srl32\: unisim.vcomponents.SRLC32E
generic map(
INIT => X"00000000"
)
port map (
A(4) => \cnt_read_reg[4]_rep__1_n_0\,
A(3) => \cnt_read_reg[3]_rep__1_n_0\,
A(2) => \cnt_read_reg[2]_rep__1_n_0\,
A(1) => \cnt_read_reg[1]_rep__1_n_0\,
A(0) => \cnt_read_reg[0]_rep__1_n_0\,
CE => wr_en0,
CLK => aclk,
D => \in\(1),
Q => \out\(1),
Q31 => \NLW_memory_reg[31][1]_srl32_Q31_UNCONNECTED\
);
\memory_reg[31][20]_srl32\: unisim.vcomponents.SRLC32E
generic map(
INIT => X"00000000"
)
port map (
A(4) => \cnt_read_reg[4]_rep_n_0\,
A(3) => \cnt_read_reg[3]_rep_n_0\,
A(2) => \cnt_read_reg[2]_rep_n_0\,
A(1) => \cnt_read_reg[1]_rep_n_0\,
A(0) => \cnt_read_reg[0]_rep_n_0\,
CE => wr_en0,
CLK => aclk,
D => \in\(20),
Q => \out\(20),
Q31 => \NLW_memory_reg[31][20]_srl32_Q31_UNCONNECTED\
);
\memory_reg[31][21]_srl32\: unisim.vcomponents.SRLC32E
generic map(
INIT => X"00000000"
)
port map (
A(4) => \cnt_read_reg[4]_rep_n_0\,
A(3) => \cnt_read_reg[3]_rep_n_0\,
A(2) => \cnt_read_reg[2]_rep_n_0\,
A(1) => \cnt_read_reg[1]_rep_n_0\,
A(0) => \cnt_read_reg[0]_rep_n_0\,
CE => wr_en0,
CLK => aclk,
D => \in\(21),
Q => \out\(21),
Q31 => \NLW_memory_reg[31][21]_srl32_Q31_UNCONNECTED\
);
\memory_reg[31][22]_srl32\: unisim.vcomponents.SRLC32E
generic map(
INIT => X"00000000"
)
port map (
A(4) => \cnt_read_reg[4]_rep_n_0\,
A(3) => \cnt_read_reg[3]_rep_n_0\,
A(2) => \cnt_read_reg[2]_rep_n_0\,
A(1) => \cnt_read_reg[1]_rep_n_0\,
A(0) => \cnt_read_reg[0]_rep_n_0\,
CE => wr_en0,
CLK => aclk,
D => \in\(22),
Q => \out\(22),
Q31 => \NLW_memory_reg[31][22]_srl32_Q31_UNCONNECTED\
);
\memory_reg[31][23]_srl32\: unisim.vcomponents.SRLC32E
generic map(
INIT => X"00000000"
)
port map (
A(4) => \cnt_read_reg[4]_rep_n_0\,
A(3) => \cnt_read_reg[3]_rep_n_0\,
A(2) => \cnt_read_reg[2]_rep_n_0\,
A(1) => \cnt_read_reg[1]_rep_n_0\,
A(0) => \cnt_read_reg[0]_rep_n_0\,
CE => wr_en0,
CLK => aclk,
D => \in\(23),
Q => \out\(23),
Q31 => \NLW_memory_reg[31][23]_srl32_Q31_UNCONNECTED\
);
\memory_reg[31][24]_srl32\: unisim.vcomponents.SRLC32E
generic map(
INIT => X"00000000"
)
port map (
A(4) => \cnt_read_reg[4]_rep_n_0\,
A(3) => \cnt_read_reg[3]_rep_n_0\,
A(2) => \cnt_read_reg[2]_rep_n_0\,
A(1) => \cnt_read_reg[1]_rep_n_0\,
A(0) => \cnt_read_reg[0]_rep_n_0\,
CE => wr_en0,
CLK => aclk,
D => \in\(24),
Q => \out\(24),
Q31 => \NLW_memory_reg[31][24]_srl32_Q31_UNCONNECTED\
);
\memory_reg[31][25]_srl32\: unisim.vcomponents.SRLC32E
generic map(
INIT => X"00000000"
)
port map (
A(4 downto 0) => cnt_read(4 downto 0),
CE => wr_en0,
CLK => aclk,
D => \in\(25),
Q => \out\(25),
Q31 => \NLW_memory_reg[31][25]_srl32_Q31_UNCONNECTED\
);
\memory_reg[31][26]_srl32\: unisim.vcomponents.SRLC32E
generic map(
INIT => X"00000000"
)
port map (
A(4 downto 0) => cnt_read(4 downto 0),
CE => wr_en0,
CLK => aclk,
D => \in\(26),
Q => \out\(26),
Q31 => \NLW_memory_reg[31][26]_srl32_Q31_UNCONNECTED\
);
\memory_reg[31][27]_srl32\: unisim.vcomponents.SRLC32E
generic map(
INIT => X"00000000"
)
port map (
A(4 downto 0) => cnt_read(4 downto 0),
CE => wr_en0,
CLK => aclk,
D => \in\(27),
Q => \out\(27),
Q31 => \NLW_memory_reg[31][27]_srl32_Q31_UNCONNECTED\
);
\memory_reg[31][28]_srl32\: unisim.vcomponents.SRLC32E
generic map(
INIT => X"00000000"
)
port map (
A(4 downto 0) => cnt_read(4 downto 0),
CE => wr_en0,
CLK => aclk,
D => \in\(28),
Q => \out\(28),
Q31 => \NLW_memory_reg[31][28]_srl32_Q31_UNCONNECTED\
);
\memory_reg[31][29]_srl32\: unisim.vcomponents.SRLC32E
generic map(
INIT => X"00000000"
)
port map (
A(4 downto 0) => cnt_read(4 downto 0),
CE => wr_en0,
CLK => aclk,
D => \in\(29),
Q => \out\(29),
Q31 => \NLW_memory_reg[31][29]_srl32_Q31_UNCONNECTED\
);
\memory_reg[31][2]_srl32\: unisim.vcomponents.SRLC32E
generic map(
INIT => X"00000000"
)
port map (
A(4) => \cnt_read_reg[4]_rep__1_n_0\,
A(3) => \cnt_read_reg[3]_rep__1_n_0\,
A(2) => \cnt_read_reg[2]_rep__1_n_0\,
A(1) => \cnt_read_reg[1]_rep__1_n_0\,
A(0) => \cnt_read_reg[0]_rep__1_n_0\,
CE => wr_en0,
CLK => aclk,
D => \in\(2),
Q => \out\(2),
Q31 => \NLW_memory_reg[31][2]_srl32_Q31_UNCONNECTED\
);
\memory_reg[31][30]_srl32\: unisim.vcomponents.SRLC32E
generic map(
INIT => X"00000000"
)
port map (
A(4 downto 0) => cnt_read(4 downto 0),
CE => wr_en0,
CLK => aclk,
D => \in\(30),
Q => \out\(30),
Q31 => \NLW_memory_reg[31][30]_srl32_Q31_UNCONNECTED\
);
\memory_reg[31][31]_srl32\: unisim.vcomponents.SRLC32E
generic map(
INIT => X"00000000"
)
port map (
A(4 downto 0) => cnt_read(4 downto 0),
CE => wr_en0,
CLK => aclk,
D => \in\(31),
Q => \out\(31),
Q31 => \NLW_memory_reg[31][31]_srl32_Q31_UNCONNECTED\
);
\memory_reg[31][32]_srl32\: unisim.vcomponents.SRLC32E
generic map(
INIT => X"00000000"
)
port map (
A(4 downto 0) => cnt_read(4 downto 0),
CE => wr_en0,
CLK => aclk,
D => \in\(32),
Q => \out\(32),
Q31 => \NLW_memory_reg[31][32]_srl32_Q31_UNCONNECTED\
);
\memory_reg[31][33]_srl32\: unisim.vcomponents.SRLC32E
generic map(
INIT => X"00000000"
)
port map (
A(4 downto 0) => cnt_read(4 downto 0),
CE => wr_en0,
CLK => aclk,
D => \in\(33),
Q => \out\(33),
Q31 => \NLW_memory_reg[31][33]_srl32_Q31_UNCONNECTED\
);
\memory_reg[31][3]_srl32\: unisim.vcomponents.SRLC32E
generic map(
INIT => X"00000000"
)
port map (
A(4) => \cnt_read_reg[4]_rep__1_n_0\,
A(3) => \cnt_read_reg[3]_rep__1_n_0\,
A(2) => \cnt_read_reg[2]_rep__1_n_0\,
A(1) => \cnt_read_reg[1]_rep__1_n_0\,
A(0) => \cnt_read_reg[0]_rep__1_n_0\,
CE => wr_en0,
CLK => aclk,
D => \in\(3),
Q => \out\(3),
Q31 => \NLW_memory_reg[31][3]_srl32_Q31_UNCONNECTED\
);
\memory_reg[31][4]_srl32\: unisim.vcomponents.SRLC32E
generic map(
INIT => X"00000000"
)
port map (
A(4) => \cnt_read_reg[4]_rep__1_n_0\,
A(3) => \cnt_read_reg[3]_rep__1_n_0\,
A(2) => \cnt_read_reg[2]_rep__1_n_0\,
A(1) => \cnt_read_reg[1]_rep__1_n_0\,
A(0) => \cnt_read_reg[0]_rep__1_n_0\,
CE => wr_en0,
CLK => aclk,
D => \in\(4),
Q => \out\(4),
Q31 => \NLW_memory_reg[31][4]_srl32_Q31_UNCONNECTED\
);
\memory_reg[31][5]_srl32\: unisim.vcomponents.SRLC32E
generic map(
INIT => X"00000000"
)
port map (
A(4) => \cnt_read_reg[4]_rep__1_n_0\,
A(3) => \cnt_read_reg[3]_rep__1_n_0\,
A(2) => \cnt_read_reg[2]_rep__1_n_0\,
A(1) => \cnt_read_reg[1]_rep__1_n_0\,
A(0) => \cnt_read_reg[0]_rep__1_n_0\,
CE => wr_en0,
CLK => aclk,
D => \in\(5),
Q => \out\(5),
Q31 => \NLW_memory_reg[31][5]_srl32_Q31_UNCONNECTED\
);
\memory_reg[31][6]_srl32\: unisim.vcomponents.SRLC32E
generic map(
INIT => X"00000000"
)
port map (
A(4) => \cnt_read_reg[4]_rep__1_n_0\,
A(3) => \cnt_read_reg[3]_rep__1_n_0\,
A(2) => \cnt_read_reg[2]_rep__1_n_0\,
A(1) => \cnt_read_reg[1]_rep__1_n_0\,
A(0) => \cnt_read_reg[0]_rep__1_n_0\,
CE => wr_en0,
CLK => aclk,
D => \in\(6),
Q => \out\(6),
Q31 => \NLW_memory_reg[31][6]_srl32_Q31_UNCONNECTED\
);
\memory_reg[31][7]_srl32\: unisim.vcomponents.SRLC32E
generic map(
INIT => X"00000000"
)
port map (
A(4) => \cnt_read_reg[4]_rep__0_n_0\,
A(3) => \cnt_read_reg[3]_rep__0_n_0\,
A(2) => \cnt_read_reg[2]_rep__0_n_0\,
A(1) => \cnt_read_reg[1]_rep__0_n_0\,
A(0) => \cnt_read_reg[0]_rep__0_n_0\,
CE => wr_en0,
CLK => aclk,
D => \in\(7),
Q => \out\(7),
Q31 => \NLW_memory_reg[31][7]_srl32_Q31_UNCONNECTED\
);
\memory_reg[31][8]_srl32\: unisim.vcomponents.SRLC32E
generic map(
INIT => X"00000000"
)
port map (
A(4) => \cnt_read_reg[4]_rep__0_n_0\,
A(3) => \cnt_read_reg[3]_rep__0_n_0\,
A(2) => \cnt_read_reg[2]_rep__0_n_0\,
A(1) => \cnt_read_reg[1]_rep__0_n_0\,
A(0) => \cnt_read_reg[0]_rep__0_n_0\,
CE => wr_en0,
CLK => aclk,
D => \in\(8),
Q => \out\(8),
Q31 => \NLW_memory_reg[31][8]_srl32_Q31_UNCONNECTED\
);
\memory_reg[31][9]_srl32\: unisim.vcomponents.SRLC32E
generic map(
INIT => X"00000000"
)
port map (
A(4) => \cnt_read_reg[4]_rep__0_n_0\,
A(3) => \cnt_read_reg[3]_rep__0_n_0\,
A(2) => \cnt_read_reg[2]_rep__0_n_0\,
A(1) => \cnt_read_reg[1]_rep__0_n_0\,
A(0) => \cnt_read_reg[0]_rep__0_n_0\,
CE => wr_en0,
CLK => aclk,
D => \in\(9),
Q => \out\(9),
Q31 => \NLW_memory_reg[31][9]_srl32_Q31_UNCONNECTED\
);
\state[1]_i_4\: unisim.vcomponents.LUT5
generic map(
INIT => X"40C0C000"
)
port map (
I0 => \cnt_read_reg[0]_rep__3_n_0\,
I1 => \^cnt_read_reg[4]_rep__2_0\,
I2 => \^cnt_read_reg[4]_rep__2_1\,
I3 => \cnt_read_reg[1]_rep__2_n_0\,
I4 => \cnt_read_reg[2]_rep__2_n_0\,
O => \state_reg[1]_rep\
);
end STRUCTURE;
library IEEE;
use IEEE.STD_LOGIC_1164.ALL;
library UNISIM;
use UNISIM.VCOMPONENTS.ALL;
entity \decalper_eb_ot_sdeen_pot_pi_dehcac_xnilix_axi_protocol_converter_v2_1_17_b2s_simple_fifo__parameterized2\ is
port (
m_valid_i_reg : out STD_LOGIC;
\state_reg[1]_rep\ : out STD_LOGIC;
\skid_buffer_reg[46]\ : out STD_LOGIC_VECTOR ( 12 downto 0 );
s_ready_i_reg : in STD_LOGIC;
r_push_r : in STD_LOGIC;
si_rs_rready : in STD_LOGIC;
\cnt_read_reg[3]_rep__2\ : in STD_LOGIC;
\cnt_read_reg[4]_rep__2\ : in STD_LOGIC;
\cnt_read_reg[0]_rep__3\ : in STD_LOGIC;
\cnt_read_reg[0]_rep__3_0\ : in STD_LOGIC;
\in\ : in STD_LOGIC_VECTOR ( 12 downto 0 );
aclk : in STD_LOGIC;
areset_d1 : in STD_LOGIC
);
attribute ORIG_REF_NAME : string;
attribute ORIG_REF_NAME of \decalper_eb_ot_sdeen_pot_pi_dehcac_xnilix_axi_protocol_converter_v2_1_17_b2s_simple_fifo__parameterized2\ : entity is "axi_protocol_converter_v2_1_17_b2s_simple_fifo";
end \decalper_eb_ot_sdeen_pot_pi_dehcac_xnilix_axi_protocol_converter_v2_1_17_b2s_simple_fifo__parameterized2\;
architecture STRUCTURE of \decalper_eb_ot_sdeen_pot_pi_dehcac_xnilix_axi_protocol_converter_v2_1_17_b2s_simple_fifo__parameterized2\ is
signal cnt_read : STD_LOGIC_VECTOR ( 4 downto 0 );
signal \cnt_read[0]_i_1__0_n_0\ : STD_LOGIC;
signal \cnt_read[1]_i_1__1_n_0\ : STD_LOGIC;
signal \cnt_read[2]_i_1__0_n_0\ : STD_LOGIC;
signal \cnt_read[3]_i_1_n_0\ : STD_LOGIC;
signal \cnt_read[4]_i_1__0_n_0\ : STD_LOGIC;
signal \cnt_read[4]_i_2_n_0\ : STD_LOGIC;
signal \cnt_read[4]_i_3_n_0\ : STD_LOGIC;
signal \cnt_read_reg[0]_rep__0_n_0\ : STD_LOGIC;
signal \cnt_read_reg[0]_rep__1_n_0\ : STD_LOGIC;
signal \cnt_read_reg[0]_rep_n_0\ : STD_LOGIC;
signal \cnt_read_reg[1]_rep__0_n_0\ : STD_LOGIC;
signal \cnt_read_reg[1]_rep_n_0\ : STD_LOGIC;
signal \cnt_read_reg[2]_rep__0_n_0\ : STD_LOGIC;
signal \cnt_read_reg[2]_rep_n_0\ : STD_LOGIC;
signal \cnt_read_reg[3]_rep__0_n_0\ : STD_LOGIC;
signal \cnt_read_reg[3]_rep_n_0\ : STD_LOGIC;
signal \cnt_read_reg[4]_rep__0_n_0\ : STD_LOGIC;
signal \cnt_read_reg[4]_rep_n_0\ : STD_LOGIC;
signal m_valid_i_i_3_n_0 : STD_LOGIC;
signal \^m_valid_i_reg\ : STD_LOGIC;
signal \NLW_memory_reg[31][0]_srl32_Q31_UNCONNECTED\ : STD_LOGIC;
signal \NLW_memory_reg[31][10]_srl32_Q31_UNCONNECTED\ : STD_LOGIC;
signal \NLW_memory_reg[31][11]_srl32_Q31_UNCONNECTED\ : STD_LOGIC;
signal \NLW_memory_reg[31][12]_srl32_Q31_UNCONNECTED\ : STD_LOGIC;
signal \NLW_memory_reg[31][1]_srl32_Q31_UNCONNECTED\ : STD_LOGIC;
signal \NLW_memory_reg[31][2]_srl32_Q31_UNCONNECTED\ : STD_LOGIC;
signal \NLW_memory_reg[31][3]_srl32_Q31_UNCONNECTED\ : STD_LOGIC;
signal \NLW_memory_reg[31][4]_srl32_Q31_UNCONNECTED\ : STD_LOGIC;
signal \NLW_memory_reg[31][5]_srl32_Q31_UNCONNECTED\ : STD_LOGIC;
signal \NLW_memory_reg[31][6]_srl32_Q31_UNCONNECTED\ : STD_LOGIC;
signal \NLW_memory_reg[31][7]_srl32_Q31_UNCONNECTED\ : STD_LOGIC;
signal \NLW_memory_reg[31][8]_srl32_Q31_UNCONNECTED\ : STD_LOGIC;
signal \NLW_memory_reg[31][9]_srl32_Q31_UNCONNECTED\ : STD_LOGIC;
attribute SOFT_HLUTNM : string;
attribute SOFT_HLUTNM of \cnt_read[1]_i_1__1\ : label is "soft_lutpair20";
attribute SOFT_HLUTNM of \cnt_read[2]_i_1__0\ : label is "soft_lutpair20";
attribute KEEP : string;
attribute KEEP of \cnt_read_reg[0]\ : label is "yes";
attribute ORIG_CELL_NAME : string;
attribute ORIG_CELL_NAME of \cnt_read_reg[0]\ : label is "cnt_read_reg[0]";
attribute IS_FANOUT_CONSTRAINED : integer;
attribute IS_FANOUT_CONSTRAINED of \cnt_read_reg[0]_rep\ : label is 1;
attribute KEEP of \cnt_read_reg[0]_rep\ : label is "yes";
attribute ORIG_CELL_NAME of \cnt_read_reg[0]_rep\ : label is "cnt_read_reg[0]";
attribute IS_FANOUT_CONSTRAINED of \cnt_read_reg[0]_rep__0\ : label is 1;
attribute KEEP of \cnt_read_reg[0]_rep__0\ : label is "yes";
attribute ORIG_CELL_NAME of \cnt_read_reg[0]_rep__0\ : label is "cnt_read_reg[0]";
attribute IS_FANOUT_CONSTRAINED of \cnt_read_reg[0]_rep__1\ : label is 1;
attribute KEEP of \cnt_read_reg[0]_rep__1\ : label is "yes";
attribute ORIG_CELL_NAME of \cnt_read_reg[0]_rep__1\ : label is "cnt_read_reg[0]";
attribute KEEP of \cnt_read_reg[1]\ : label is "yes";
attribute ORIG_CELL_NAME of \cnt_read_reg[1]\ : label is "cnt_read_reg[1]";
attribute IS_FANOUT_CONSTRAINED of \cnt_read_reg[1]_rep\ : label is 1;
attribute KEEP of \cnt_read_reg[1]_rep\ : label is "yes";
attribute ORIG_CELL_NAME of \cnt_read_reg[1]_rep\ : label is "cnt_read_reg[1]";
attribute IS_FANOUT_CONSTRAINED of \cnt_read_reg[1]_rep__0\ : label is 1;
attribute KEEP of \cnt_read_reg[1]_rep__0\ : label is "yes";
attribute ORIG_CELL_NAME of \cnt_read_reg[1]_rep__0\ : label is "cnt_read_reg[1]";
attribute KEEP of \cnt_read_reg[2]\ : label is "yes";
attribute ORIG_CELL_NAME of \cnt_read_reg[2]\ : label is "cnt_read_reg[2]";
attribute IS_FANOUT_CONSTRAINED of \cnt_read_reg[2]_rep\ : label is 1;
attribute KEEP of \cnt_read_reg[2]_rep\ : label is "yes";
attribute ORIG_CELL_NAME of \cnt_read_reg[2]_rep\ : label is "cnt_read_reg[2]";
attribute IS_FANOUT_CONSTRAINED of \cnt_read_reg[2]_rep__0\ : label is 1;
attribute KEEP of \cnt_read_reg[2]_rep__0\ : label is "yes";
attribute ORIG_CELL_NAME of \cnt_read_reg[2]_rep__0\ : label is "cnt_read_reg[2]";
attribute KEEP of \cnt_read_reg[3]\ : label is "yes";
attribute ORIG_CELL_NAME of \cnt_read_reg[3]\ : label is "cnt_read_reg[3]";
attribute IS_FANOUT_CONSTRAINED of \cnt_read_reg[3]_rep\ : label is 1;
attribute KEEP of \cnt_read_reg[3]_rep\ : label is "yes";
attribute ORIG_CELL_NAME of \cnt_read_reg[3]_rep\ : label is "cnt_read_reg[3]";
attribute IS_FANOUT_CONSTRAINED of \cnt_read_reg[3]_rep__0\ : label is 1;
attribute KEEP of \cnt_read_reg[3]_rep__0\ : label is "yes";
attribute ORIG_CELL_NAME of \cnt_read_reg[3]_rep__0\ : label is "cnt_read_reg[3]";
attribute KEEP of \cnt_read_reg[4]\ : label is "yes";
attribute ORIG_CELL_NAME of \cnt_read_reg[4]\ : label is "cnt_read_reg[4]";
attribute IS_FANOUT_CONSTRAINED of \cnt_read_reg[4]_rep\ : label is 1;
attribute KEEP of \cnt_read_reg[4]_rep\ : label is "yes";
attribute ORIG_CELL_NAME of \cnt_read_reg[4]_rep\ : label is "cnt_read_reg[4]";
attribute IS_FANOUT_CONSTRAINED of \cnt_read_reg[4]_rep__0\ : label is 1;
attribute KEEP of \cnt_read_reg[4]_rep__0\ : label is "yes";
attribute ORIG_CELL_NAME of \cnt_read_reg[4]_rep__0\ : label is "cnt_read_reg[4]";
attribute srl_bus_name : string;
attribute srl_bus_name of \memory_reg[31][0]_srl32\ : label is "inst/\gen_axilite.gen_b2s_conv.axilite_b2s/RD.r_channel_0/transaction_fifo_0/memory_reg[31] ";
attribute srl_name : string;
attribute srl_name of \memory_reg[31][0]_srl32\ : label is "inst/\gen_axilite.gen_b2s_conv.axilite_b2s/RD.r_channel_0/transaction_fifo_0/memory_reg[31][0]_srl32 ";
attribute srl_bus_name of \memory_reg[31][10]_srl32\ : label is "inst/\gen_axilite.gen_b2s_conv.axilite_b2s/RD.r_channel_0/transaction_fifo_0/memory_reg[31] ";
attribute srl_name of \memory_reg[31][10]_srl32\ : label is "inst/\gen_axilite.gen_b2s_conv.axilite_b2s/RD.r_channel_0/transaction_fifo_0/memory_reg[31][10]_srl32 ";
attribute srl_bus_name of \memory_reg[31][11]_srl32\ : label is "inst/\gen_axilite.gen_b2s_conv.axilite_b2s/RD.r_channel_0/transaction_fifo_0/memory_reg[31] ";
attribute srl_name of \memory_reg[31][11]_srl32\ : label is "inst/\gen_axilite.gen_b2s_conv.axilite_b2s/RD.r_channel_0/transaction_fifo_0/memory_reg[31][11]_srl32 ";
attribute srl_bus_name of \memory_reg[31][12]_srl32\ : label is "inst/\gen_axilite.gen_b2s_conv.axilite_b2s/RD.r_channel_0/transaction_fifo_0/memory_reg[31] ";
attribute srl_name of \memory_reg[31][12]_srl32\ : label is "inst/\gen_axilite.gen_b2s_conv.axilite_b2s/RD.r_channel_0/transaction_fifo_0/memory_reg[31][12]_srl32 ";
attribute srl_bus_name of \memory_reg[31][1]_srl32\ : label is "inst/\gen_axilite.gen_b2s_conv.axilite_b2s/RD.r_channel_0/transaction_fifo_0/memory_reg[31] ";
attribute srl_name of \memory_reg[31][1]_srl32\ : label is "inst/\gen_axilite.gen_b2s_conv.axilite_b2s/RD.r_channel_0/transaction_fifo_0/memory_reg[31][1]_srl32 ";
attribute srl_bus_name of \memory_reg[31][2]_srl32\ : label is "inst/\gen_axilite.gen_b2s_conv.axilite_b2s/RD.r_channel_0/transaction_fifo_0/memory_reg[31] ";
attribute srl_name of \memory_reg[31][2]_srl32\ : label is "inst/\gen_axilite.gen_b2s_conv.axilite_b2s/RD.r_channel_0/transaction_fifo_0/memory_reg[31][2]_srl32 ";
attribute srl_bus_name of \memory_reg[31][3]_srl32\ : label is "inst/\gen_axilite.gen_b2s_conv.axilite_b2s/RD.r_channel_0/transaction_fifo_0/memory_reg[31] ";
attribute srl_name of \memory_reg[31][3]_srl32\ : label is "inst/\gen_axilite.gen_b2s_conv.axilite_b2s/RD.r_channel_0/transaction_fifo_0/memory_reg[31][3]_srl32 ";
attribute srl_bus_name of \memory_reg[31][4]_srl32\ : label is "inst/\gen_axilite.gen_b2s_conv.axilite_b2s/RD.r_channel_0/transaction_fifo_0/memory_reg[31] ";
attribute srl_name of \memory_reg[31][4]_srl32\ : label is "inst/\gen_axilite.gen_b2s_conv.axilite_b2s/RD.r_channel_0/transaction_fifo_0/memory_reg[31][4]_srl32 ";
attribute srl_bus_name of \memory_reg[31][5]_srl32\ : label is "inst/\gen_axilite.gen_b2s_conv.axilite_b2s/RD.r_channel_0/transaction_fifo_0/memory_reg[31] ";
attribute srl_name of \memory_reg[31][5]_srl32\ : label is "inst/\gen_axilite.gen_b2s_conv.axilite_b2s/RD.r_channel_0/transaction_fifo_0/memory_reg[31][5]_srl32 ";
attribute srl_bus_name of \memory_reg[31][6]_srl32\ : label is "inst/\gen_axilite.gen_b2s_conv.axilite_b2s/RD.r_channel_0/transaction_fifo_0/memory_reg[31] ";
attribute srl_name of \memory_reg[31][6]_srl32\ : label is "inst/\gen_axilite.gen_b2s_conv.axilite_b2s/RD.r_channel_0/transaction_fifo_0/memory_reg[31][6]_srl32 ";
attribute srl_bus_name of \memory_reg[31][7]_srl32\ : label is "inst/\gen_axilite.gen_b2s_conv.axilite_b2s/RD.r_channel_0/transaction_fifo_0/memory_reg[31] ";
attribute srl_name of \memory_reg[31][7]_srl32\ : label is "inst/\gen_axilite.gen_b2s_conv.axilite_b2s/RD.r_channel_0/transaction_fifo_0/memory_reg[31][7]_srl32 ";
attribute srl_bus_name of \memory_reg[31][8]_srl32\ : label is "inst/\gen_axilite.gen_b2s_conv.axilite_b2s/RD.r_channel_0/transaction_fifo_0/memory_reg[31] ";
attribute srl_name of \memory_reg[31][8]_srl32\ : label is "inst/\gen_axilite.gen_b2s_conv.axilite_b2s/RD.r_channel_0/transaction_fifo_0/memory_reg[31][8]_srl32 ";
attribute srl_bus_name of \memory_reg[31][9]_srl32\ : label is "inst/\gen_axilite.gen_b2s_conv.axilite_b2s/RD.r_channel_0/transaction_fifo_0/memory_reg[31] ";
attribute srl_name of \memory_reg[31][9]_srl32\ : label is "inst/\gen_axilite.gen_b2s_conv.axilite_b2s/RD.r_channel_0/transaction_fifo_0/memory_reg[31][9]_srl32 ";
begin
m_valid_i_reg <= \^m_valid_i_reg\;
\cnt_read[0]_i_1__0\: unisim.vcomponents.LUT3
generic map(
INIT => X"96"
)
port map (
I0 => \cnt_read_reg[0]_rep__0_n_0\,
I1 => r_push_r,
I2 => s_ready_i_reg,
O => \cnt_read[0]_i_1__0_n_0\
);
\cnt_read[1]_i_1__1\: unisim.vcomponents.LUT4
generic map(
INIT => X"DB24"
)
port map (
I0 => \cnt_read_reg[0]_rep__0_n_0\,
I1 => s_ready_i_reg,
I2 => r_push_r,
I3 => \cnt_read_reg[1]_rep__0_n_0\,
O => \cnt_read[1]_i_1__1_n_0\
);
\cnt_read[2]_i_1__0\: unisim.vcomponents.LUT5
generic map(
INIT => X"9AAAAAA6"
)
port map (
I0 => \cnt_read_reg[2]_rep__0_n_0\,
I1 => s_ready_i_reg,
I2 => r_push_r,
I3 => \cnt_read_reg[0]_rep__0_n_0\,
I4 => \cnt_read_reg[1]_rep__0_n_0\,
O => \cnt_read[2]_i_1__0_n_0\
);
\cnt_read[3]_i_1\: unisim.vcomponents.LUT6
generic map(
INIT => X"FF7F0080FEFF0100"
)
port map (
I0 => \cnt_read_reg[1]_rep__0_n_0\,
I1 => \cnt_read_reg[0]_rep__0_n_0\,
I2 => r_push_r,
I3 => s_ready_i_reg,
I4 => \cnt_read_reg[3]_rep__0_n_0\,
I5 => \cnt_read_reg[2]_rep__0_n_0\,
O => \cnt_read[3]_i_1_n_0\
);
\cnt_read[4]_i_1__0\: unisim.vcomponents.LUT5
generic map(
INIT => X"9A999AAA"
)
port map (
I0 => \cnt_read_reg[4]_rep__0_n_0\,
I1 => \cnt_read[4]_i_2_n_0\,
I2 => \cnt_read_reg[2]_rep__0_n_0\,
I3 => \cnt_read_reg[3]_rep__0_n_0\,
I4 => \cnt_read[4]_i_3_n_0\,
O => \cnt_read[4]_i_1__0_n_0\
);
\cnt_read[4]_i_2\: unisim.vcomponents.LUT6
generic map(
INIT => X"2AAAAAAA2AAA2AAA"
)
port map (
I0 => \cnt_read_reg[2]_rep__0_n_0\,
I1 => \cnt_read_reg[1]_rep__0_n_0\,
I2 => \cnt_read_reg[0]_rep__1_n_0\,
I3 => r_push_r,
I4 => \^m_valid_i_reg\,
I5 => si_rs_rready,
O => \cnt_read[4]_i_2_n_0\
);
\cnt_read[4]_i_3\: unisim.vcomponents.LUT5
generic map(
INIT => X"00000004"
)
port map (
I0 => r_push_r,
I1 => si_rs_rready,
I2 => \^m_valid_i_reg\,
I3 => \cnt_read_reg[0]_rep__1_n_0\,
I4 => \cnt_read_reg[1]_rep__0_n_0\,
O => \cnt_read[4]_i_3_n_0\
);
\cnt_read_reg[0]\: unisim.vcomponents.FDSE
generic map(
INIT => '1'
)
port map (
C => aclk,
CE => '1',
D => \cnt_read[0]_i_1__0_n_0\,
Q => cnt_read(0),
S => areset_d1
);
\cnt_read_reg[0]_rep\: unisim.vcomponents.FDSE
generic map(
INIT => '1'
)
port map (
C => aclk,
CE => '1',
D => \cnt_read[0]_i_1__0_n_0\,
Q => \cnt_read_reg[0]_rep_n_0\,
S => areset_d1
);
\cnt_read_reg[0]_rep__0\: unisim.vcomponents.FDSE
generic map(
INIT => '1'
)
port map (
C => aclk,
CE => '1',
D => \cnt_read[0]_i_1__0_n_0\,
Q => \cnt_read_reg[0]_rep__0_n_0\,
S => areset_d1
);
\cnt_read_reg[0]_rep__1\: unisim.vcomponents.FDSE
generic map(
INIT => '1'
)
port map (
C => aclk,
CE => '1',
D => \cnt_read[0]_i_1__0_n_0\,
Q => \cnt_read_reg[0]_rep__1_n_0\,
S => areset_d1
);
\cnt_read_reg[1]\: unisim.vcomponents.FDSE
generic map(
INIT => '1'
)
port map (
C => aclk,
CE => '1',
D => \cnt_read[1]_i_1__1_n_0\,
Q => cnt_read(1),
S => areset_d1
);
\cnt_read_reg[1]_rep\: unisim.vcomponents.FDSE
generic map(
INIT => '1'
)
port map (
C => aclk,
CE => '1',
D => \cnt_read[1]_i_1__1_n_0\,
Q => \cnt_read_reg[1]_rep_n_0\,
S => areset_d1
);
\cnt_read_reg[1]_rep__0\: unisim.vcomponents.FDSE
generic map(
INIT => '1'
)
port map (
C => aclk,
CE => '1',
D => \cnt_read[1]_i_1__1_n_0\,
Q => \cnt_read_reg[1]_rep__0_n_0\,
S => areset_d1
);
\cnt_read_reg[2]\: unisim.vcomponents.FDSE
generic map(
INIT => '1'
)
port map (
C => aclk,
CE => '1',
D => \cnt_read[2]_i_1__0_n_0\,
Q => cnt_read(2),
S => areset_d1
);
\cnt_read_reg[2]_rep\: unisim.vcomponents.FDSE
generic map(
INIT => '1'
)
port map (
C => aclk,
CE => '1',
D => \cnt_read[2]_i_1__0_n_0\,
Q => \cnt_read_reg[2]_rep_n_0\,
S => areset_d1
);
\cnt_read_reg[2]_rep__0\: unisim.vcomponents.FDSE
generic map(
INIT => '1'
)
port map (
C => aclk,
CE => '1',
D => \cnt_read[2]_i_1__0_n_0\,
Q => \cnt_read_reg[2]_rep__0_n_0\,
S => areset_d1
);
\cnt_read_reg[3]\: unisim.vcomponents.FDSE
generic map(
INIT => '1'
)
port map (
C => aclk,
CE => '1',
D => \cnt_read[3]_i_1_n_0\,
Q => cnt_read(3),
S => areset_d1
);
\cnt_read_reg[3]_rep\: unisim.vcomponents.FDSE
generic map(
INIT => '1'
)
port map (
C => aclk,
CE => '1',
D => \cnt_read[3]_i_1_n_0\,
Q => \cnt_read_reg[3]_rep_n_0\,
S => areset_d1
);
\cnt_read_reg[3]_rep__0\: unisim.vcomponents.FDSE
generic map(
INIT => '1'
)
port map (
C => aclk,
CE => '1',
D => \cnt_read[3]_i_1_n_0\,
Q => \cnt_read_reg[3]_rep__0_n_0\,
S => areset_d1
);
\cnt_read_reg[4]\: unisim.vcomponents.FDSE
generic map(
INIT => '1'
)
port map (
C => aclk,
CE => '1',
D => \cnt_read[4]_i_1__0_n_0\,
Q => cnt_read(4),
S => areset_d1
);
\cnt_read_reg[4]_rep\: unisim.vcomponents.FDSE
generic map(
INIT => '1'
)
port map (
C => aclk,
CE => '1',
D => \cnt_read[4]_i_1__0_n_0\,
Q => \cnt_read_reg[4]_rep_n_0\,
S => areset_d1
);
\cnt_read_reg[4]_rep__0\: unisim.vcomponents.FDSE
generic map(
INIT => '1'
)
port map (
C => aclk,
CE => '1',
D => \cnt_read[4]_i_1__0_n_0\,
Q => \cnt_read_reg[4]_rep__0_n_0\,
S => areset_d1
);
m_valid_i_i_2: unisim.vcomponents.LUT6
generic map(
INIT => X"80808080FF808080"
)
port map (
I0 => \cnt_read_reg[4]_rep__0_n_0\,
I1 => \cnt_read_reg[3]_rep__0_n_0\,
I2 => m_valid_i_i_3_n_0,
I3 => \cnt_read_reg[3]_rep__2\,
I4 => \cnt_read_reg[4]_rep__2\,
I5 => \cnt_read_reg[0]_rep__3\,
O => \^m_valid_i_reg\
);
m_valid_i_i_3: unisim.vcomponents.LUT3
generic map(
INIT => X"80"
)
port map (
I0 => \cnt_read_reg[2]_rep__0_n_0\,
I1 => \cnt_read_reg[0]_rep__1_n_0\,
I2 => \cnt_read_reg[1]_rep__0_n_0\,
O => m_valid_i_i_3_n_0
);
\memory_reg[31][0]_srl32\: unisim.vcomponents.SRLC32E
generic map(
INIT => X"00000000"
)
port map (
A(4) => \cnt_read_reg[4]_rep_n_0\,
A(3) => \cnt_read_reg[3]_rep_n_0\,
A(2) => \cnt_read_reg[2]_rep_n_0\,
A(1) => \cnt_read_reg[1]_rep_n_0\,
A(0) => \cnt_read_reg[0]_rep_n_0\,
CE => r_push_r,
CLK => aclk,
D => \in\(0),
Q => \skid_buffer_reg[46]\(0),
Q31 => \NLW_memory_reg[31][0]_srl32_Q31_UNCONNECTED\
);
\memory_reg[31][10]_srl32\: unisim.vcomponents.SRLC32E
generic map(
INIT => X"00000000"
)
port map (
A(4 downto 0) => cnt_read(4 downto 0),
CE => r_push_r,
CLK => aclk,
D => \in\(10),
Q => \skid_buffer_reg[46]\(10),
Q31 => \NLW_memory_reg[31][10]_srl32_Q31_UNCONNECTED\
);
\memory_reg[31][11]_srl32\: unisim.vcomponents.SRLC32E
generic map(
INIT => X"00000000"
)
port map (
A(4 downto 0) => cnt_read(4 downto 0),
CE => r_push_r,
CLK => aclk,
D => \in\(11),
Q => \skid_buffer_reg[46]\(11),
Q31 => \NLW_memory_reg[31][11]_srl32_Q31_UNCONNECTED\
);
\memory_reg[31][12]_srl32\: unisim.vcomponents.SRLC32E
generic map(
INIT => X"00000000"
)
port map (
A(4 downto 0) => cnt_read(4 downto 0),
CE => r_push_r,
CLK => aclk,
D => \in\(12),
Q => \skid_buffer_reg[46]\(12),
Q31 => \NLW_memory_reg[31][12]_srl32_Q31_UNCONNECTED\
);
\memory_reg[31][1]_srl32\: unisim.vcomponents.SRLC32E
generic map(
INIT => X"00000000"
)
port map (
A(4) => \cnt_read_reg[4]_rep_n_0\,
A(3) => \cnt_read_reg[3]_rep_n_0\,
A(2) => \cnt_read_reg[2]_rep_n_0\,
A(1) => \cnt_read_reg[1]_rep_n_0\,
A(0) => \cnt_read_reg[0]_rep_n_0\,
CE => r_push_r,
CLK => aclk,
D => \in\(1),
Q => \skid_buffer_reg[46]\(1),
Q31 => \NLW_memory_reg[31][1]_srl32_Q31_UNCONNECTED\
);
\memory_reg[31][2]_srl32\: unisim.vcomponents.SRLC32E
generic map(
INIT => X"00000000"
)
port map (
A(4) => \cnt_read_reg[4]_rep_n_0\,
A(3) => \cnt_read_reg[3]_rep_n_0\,
A(2) => \cnt_read_reg[2]_rep_n_0\,
A(1) => \cnt_read_reg[1]_rep_n_0\,
A(0) => \cnt_read_reg[0]_rep_n_0\,
CE => r_push_r,
CLK => aclk,
D => \in\(2),
Q => \skid_buffer_reg[46]\(2),
Q31 => \NLW_memory_reg[31][2]_srl32_Q31_UNCONNECTED\
);
\memory_reg[31][3]_srl32\: unisim.vcomponents.SRLC32E
generic map(
INIT => X"00000000"
)
port map (
A(4) => \cnt_read_reg[4]_rep_n_0\,
A(3) => \cnt_read_reg[3]_rep_n_0\,
A(2) => \cnt_read_reg[2]_rep_n_0\,
A(1) => \cnt_read_reg[1]_rep_n_0\,
A(0) => \cnt_read_reg[0]_rep_n_0\,
CE => r_push_r,
CLK => aclk,
D => \in\(3),
Q => \skid_buffer_reg[46]\(3),
Q31 => \NLW_memory_reg[31][3]_srl32_Q31_UNCONNECTED\
);
\memory_reg[31][4]_srl32\: unisim.vcomponents.SRLC32E
generic map(
INIT => X"00000000"
)
port map (
A(4) => \cnt_read_reg[4]_rep_n_0\,
A(3) => \cnt_read_reg[3]_rep_n_0\,
A(2) => \cnt_read_reg[2]_rep_n_0\,
A(1) => \cnt_read_reg[1]_rep_n_0\,
A(0) => \cnt_read_reg[0]_rep_n_0\,
CE => r_push_r,
CLK => aclk,
D => \in\(4),
Q => \skid_buffer_reg[46]\(4),
Q31 => \NLW_memory_reg[31][4]_srl32_Q31_UNCONNECTED\
);
\memory_reg[31][5]_srl32\: unisim.vcomponents.SRLC32E
generic map(
INIT => X"00000000"
)
port map (
A(4) => \cnt_read_reg[4]_rep_n_0\,
A(3) => \cnt_read_reg[3]_rep_n_0\,
A(2) => \cnt_read_reg[2]_rep_n_0\,
A(1) => \cnt_read_reg[1]_rep_n_0\,
A(0) => \cnt_read_reg[0]_rep_n_0\,
CE => r_push_r,
CLK => aclk,
D => \in\(5),
Q => \skid_buffer_reg[46]\(5),
Q31 => \NLW_memory_reg[31][5]_srl32_Q31_UNCONNECTED\
);
\memory_reg[31][6]_srl32\: unisim.vcomponents.SRLC32E
generic map(
INIT => X"00000000"
)
port map (
A(4 downto 0) => cnt_read(4 downto 0),
CE => r_push_r,
CLK => aclk,
D => \in\(6),
Q => \skid_buffer_reg[46]\(6),
Q31 => \NLW_memory_reg[31][6]_srl32_Q31_UNCONNECTED\
);
\memory_reg[31][7]_srl32\: unisim.vcomponents.SRLC32E
generic map(
INIT => X"00000000"
)
port map (
A(4 downto 0) => cnt_read(4 downto 0),
CE => r_push_r,
CLK => aclk,
D => \in\(7),
Q => \skid_buffer_reg[46]\(7),
Q31 => \NLW_memory_reg[31][7]_srl32_Q31_UNCONNECTED\
);
\memory_reg[31][8]_srl32\: unisim.vcomponents.SRLC32E
generic map(
INIT => X"00000000"
)
port map (
A(4 downto 0) => cnt_read(4 downto 0),
CE => r_push_r,
CLK => aclk,
D => \in\(8),
Q => \skid_buffer_reg[46]\(8),
Q31 => \NLW_memory_reg[31][8]_srl32_Q31_UNCONNECTED\
);
\memory_reg[31][9]_srl32\: unisim.vcomponents.SRLC32E
generic map(
INIT => X"00000000"
)
port map (
A(4 downto 0) => cnt_read(4 downto 0),
CE => r_push_r,
CLK => aclk,
D => \in\(9),
Q => \skid_buffer_reg[46]\(9),
Q31 => \NLW_memory_reg[31][9]_srl32_Q31_UNCONNECTED\
);
\state[1]_i_2\: unisim.vcomponents.LUT6
generic map(
INIT => X"BFEEAAAAAAAAAAAA"
)
port map (
I0 => \cnt_read_reg[0]_rep__3_0\,
I1 => \cnt_read_reg[2]_rep__0_n_0\,
I2 => \cnt_read_reg[0]_rep__1_n_0\,
I3 => \cnt_read_reg[1]_rep__0_n_0\,
I4 => \cnt_read_reg[3]_rep__0_n_0\,
I5 => \cnt_read_reg[4]_rep__0_n_0\,
O => \state_reg[1]_rep\
);
end STRUCTURE;
library IEEE;
use IEEE.STD_LOGIC_1164.ALL;
library UNISIM;
use UNISIM.VCOMPONENTS.ALL;
entity decalper_eb_ot_sdeen_pot_pi_dehcac_xnilix_axi_protocol_converter_v2_1_17_b2s_wr_cmd_fsm is
port (
\axlen_cnt_reg[7]\ : out STD_LOGIC;
\axlen_cnt_reg[7]_0\ : out STD_LOGIC;
\axlen_cnt_reg[7]_1\ : out STD_LOGIC;
\next\ : out STD_LOGIC;
Q : out STD_LOGIC_VECTOR ( 1 downto 0 );
D : out STD_LOGIC_VECTOR ( 0 to 0 );
\wrap_second_len_r_reg[0]\ : out STD_LOGIC_VECTOR ( 0 to 0 );
\axlen_cnt_reg[0]\ : out STD_LOGIC_VECTOR ( 0 to 0 );
s_axburst_eq0_reg : out STD_LOGIC;
incr_next_pending : out STD_LOGIC;
sel_first_i : out STD_LOGIC;
s_axburst_eq1_reg : out STD_LOGIC;
E : out STD_LOGIC_VECTOR ( 0 to 0 );
\axaddr_wrap_reg[11]\ : out STD_LOGIC_VECTOR ( 0 to 0 );
sel_first_reg : out STD_LOGIC;
sel_first_reg_0 : out STD_LOGIC;
\wrap_cnt_r_reg[3]\ : out STD_LOGIC;
\axaddr_offset_r_reg[2]\ : out STD_LOGIC_VECTOR ( 0 to 0 );
\wrap_cnt_r_reg[3]_0\ : out STD_LOGIC;
\m_payload_i_reg[0]\ : out STD_LOGIC_VECTOR ( 0 to 0 );
b_push : out STD_LOGIC;
m_axi_awvalid : out STD_LOGIC;
s_axburst_eq1_reg_0 : in STD_LOGIC;
\cnt_read_reg[1]_rep__0\ : in STD_LOGIC;
\cnt_read_reg[0]_rep__0\ : in STD_LOGIC;
m_axi_awready : in STD_LOGIC;
si_rs_awvalid : in STD_LOGIC;
\axlen_cnt_reg[7]_2\ : in STD_LOGIC;
\wrap_second_len_r_reg[0]_0\ : in STD_LOGIC_VECTOR ( 0 to 0 );
\axaddr_offset_r_reg[3]\ : in STD_LOGIC;
axaddr_offset : in STD_LOGIC_VECTOR ( 0 to 0 );
\m_payload_i_reg[46]\ : in STD_LOGIC_VECTOR ( 2 downto 0 );
\axlen_cnt_reg[0]_0\ : in STD_LOGIC_VECTOR ( 0 to 0 );
wrap_next_pending : in STD_LOGIC;
next_pending_r_reg : in STD_LOGIC;
\m_payload_i_reg[47]\ : in STD_LOGIC;
sel_first : in STD_LOGIC;
areset_d1 : in STD_LOGIC;
sel_first_0 : in STD_LOGIC;
sel_first_reg_1 : in STD_LOGIC;
\axaddr_offset_r_reg[3]_0\ : in STD_LOGIC_VECTOR ( 1 downto 0 );
\m_payload_i_reg[5]\ : in STD_LOGIC;
aclk : in STD_LOGIC
);
end decalper_eb_ot_sdeen_pot_pi_dehcac_xnilix_axi_protocol_converter_v2_1_17_b2s_wr_cmd_fsm;
architecture STRUCTURE of decalper_eb_ot_sdeen_pot_pi_dehcac_xnilix_axi_protocol_converter_v2_1_17_b2s_wr_cmd_fsm is
signal \^e\ : STD_LOGIC_VECTOR ( 0 to 0 );
signal \^q\ : STD_LOGIC_VECTOR ( 1 downto 0 );
signal \^axlen_cnt_reg[7]\ : STD_LOGIC;
signal \^axlen_cnt_reg[7]_0\ : STD_LOGIC;
signal \^b_push\ : STD_LOGIC;
signal \^incr_next_pending\ : STD_LOGIC;
signal \^next\ : STD_LOGIC;
signal \^sel_first_i\ : STD_LOGIC;
signal \state[0]_i_1_n_0\ : STD_LOGIC;
signal \state[0]_i_2_n_0\ : STD_LOGIC;
signal \state[1]_i_1__0_n_0\ : STD_LOGIC;
attribute SOFT_HLUTNM : string;
attribute SOFT_HLUTNM of \axlen_cnt[3]_i_1__0\ : label is "soft_lutpair109";
attribute SOFT_HLUTNM of \axlen_cnt[7]_i_1__0\ : label is "soft_lutpair108";
attribute SOFT_HLUTNM of s_axburst_eq0_i_1 : label is "soft_lutpair110";
attribute SOFT_HLUTNM of s_axburst_eq1_i_1 : label is "soft_lutpair110";
attribute SOFT_HLUTNM of \state[0]_i_1\ : label is "soft_lutpair109";
attribute KEEP : string;
attribute KEEP of \state_reg[0]\ : label is "yes";
attribute ORIG_CELL_NAME : string;
attribute ORIG_CELL_NAME of \state_reg[0]\ : label is "state_reg[0]";
attribute IS_FANOUT_CONSTRAINED : integer;
attribute IS_FANOUT_CONSTRAINED of \state_reg[0]_rep\ : label is 1;
attribute KEEP of \state_reg[0]_rep\ : label is "yes";
attribute ORIG_CELL_NAME of \state_reg[0]_rep\ : label is "state_reg[0]";
attribute KEEP of \state_reg[1]\ : label is "yes";
attribute ORIG_CELL_NAME of \state_reg[1]\ : label is "state_reg[1]";
attribute IS_FANOUT_CONSTRAINED of \state_reg[1]_rep\ : label is 1;
attribute KEEP of \state_reg[1]_rep\ : label is "yes";
attribute ORIG_CELL_NAME of \state_reg[1]_rep\ : label is "state_reg[1]";
attribute SOFT_HLUTNM of \wrap_boundary_axaddr_r[11]_i_1\ : label is "soft_lutpair108";
attribute SOFT_HLUTNM of \wrap_cnt_r[3]_i_4\ : label is "soft_lutpair111";
attribute SOFT_HLUTNM of \wrap_cnt_r[3]_i_6\ : label is "soft_lutpair111";
begin
E(0) <= \^e\(0);
Q(1 downto 0) <= \^q\(1 downto 0);
\axlen_cnt_reg[7]\ <= \^axlen_cnt_reg[7]\;
\axlen_cnt_reg[7]_0\ <= \^axlen_cnt_reg[7]_0\;
b_push <= \^b_push\;
incr_next_pending <= \^incr_next_pending\;
\next\ <= \^next\;
sel_first_i <= \^sel_first_i\;
\axaddr_offset_r[2]_i_1\: unisim.vcomponents.LUT6
generic map(
INIT => X"AAAAACAAAAAAA0AA"
)
port map (
I0 => \axaddr_offset_r_reg[3]_0\(0),
I1 => \m_payload_i_reg[46]\(2),
I2 => \^axlen_cnt_reg[7]_0\,
I3 => si_rs_awvalid,
I4 => \^axlen_cnt_reg[7]\,
I5 => \m_payload_i_reg[5]\,
O => \axaddr_offset_r_reg[2]\(0)
);
\axlen_cnt[0]_i_1__0\: unisim.vcomponents.LUT6
generic map(
INIT => X"0400FFFF04000400"
)
port map (
I0 => \^q\(1),
I1 => si_rs_awvalid,
I2 => \^q\(0),
I3 => \m_payload_i_reg[46]\(1),
I4 => \axlen_cnt_reg[0]_0\(0),
I5 => \axlen_cnt_reg[7]_2\,
O => \axlen_cnt_reg[0]\(0)
);
\axlen_cnt[3]_i_1__0\: unisim.vcomponents.LUT4
generic map(
INIT => X"FF04"
)
port map (
I0 => \^q\(0),
I1 => si_rs_awvalid,
I2 => \^q\(1),
I3 => \^next\,
O => \axaddr_wrap_reg[11]\(0)
);
\axlen_cnt[7]_i_1__0\: unisim.vcomponents.LUT5
generic map(
INIT => X"0000FF04"
)
port map (
I0 => \^axlen_cnt_reg[7]_0\,
I1 => si_rs_awvalid,
I2 => \^axlen_cnt_reg[7]\,
I3 => \^next\,
I4 => \axlen_cnt_reg[7]_2\,
O => \axlen_cnt_reg[7]_1\
);
m_axi_awvalid_INST_0: unisim.vcomponents.LUT2
generic map(
INIT => X"2"
)
port map (
I0 => \^axlen_cnt_reg[7]_0\,
I1 => \^axlen_cnt_reg[7]\,
O => m_axi_awvalid
);
\m_payload_i[31]_i_1\: unisim.vcomponents.LUT2
generic map(
INIT => X"B"
)
port map (
I0 => \^b_push\,
I1 => si_rs_awvalid,
O => \m_payload_i_reg[0]\(0)
);
\memory_reg[3][0]_srl4_i_1\: unisim.vcomponents.LUT6
generic map(
INIT => X"88008888A800A8A8"
)
port map (
I0 => \^axlen_cnt_reg[7]_0\,
I1 => \^axlen_cnt_reg[7]\,
I2 => m_axi_awready,
I3 => \cnt_read_reg[0]_rep__0\,
I4 => \cnt_read_reg[1]_rep__0\,
I5 => s_axburst_eq1_reg_0,
O => \^b_push\
);
next_pending_r_i_1: unisim.vcomponents.LUT5
generic map(
INIT => X"FFFFF404"
)
port map (
I0 => \^e\(0),
I1 => next_pending_r_reg,
I2 => \^next\,
I3 => \axlen_cnt_reg[7]_2\,
I4 => \m_payload_i_reg[47]\,
O => \^incr_next_pending\
);
next_pending_r_i_2: unisim.vcomponents.LUT6
generic map(
INIT => X"F3F3FFFF51000000"
)
port map (
I0 => s_axburst_eq1_reg_0,
I1 => \cnt_read_reg[1]_rep__0\,
I2 => \cnt_read_reg[0]_rep__0\,
I3 => m_axi_awready,
I4 => \^axlen_cnt_reg[7]_0\,
I5 => \^axlen_cnt_reg[7]\,
O => \^next\
);
s_axburst_eq0_i_1: unisim.vcomponents.LUT4
generic map(
INIT => X"BA8A"
)
port map (
I0 => \^incr_next_pending\,
I1 => \^sel_first_i\,
I2 => \m_payload_i_reg[46]\(0),
I3 => wrap_next_pending,
O => s_axburst_eq0_reg
);
s_axburst_eq1_i_1: unisim.vcomponents.LUT4
generic map(
INIT => X"FE02"
)
port map (
I0 => \^incr_next_pending\,
I1 => \m_payload_i_reg[46]\(0),
I2 => \^sel_first_i\,
I3 => wrap_next_pending,
O => s_axburst_eq1_reg
);
sel_first_i_1: unisim.vcomponents.LUT6
generic map(
INIT => X"FFFFFFFF44444F44"
)
port map (
I0 => \^next\,
I1 => sel_first,
I2 => \^q\(1),
I3 => si_rs_awvalid,
I4 => \^q\(0),
I5 => areset_d1,
O => sel_first_reg
);
\sel_first_i_1__0\: unisim.vcomponents.LUT6
generic map(
INIT => X"FFFFFFFF44444F44"
)
port map (
I0 => \^next\,
I1 => sel_first_0,
I2 => \^q\(1),
I3 => si_rs_awvalid,
I4 => \^q\(0),
I5 => areset_d1,
O => sel_first_reg_0
);
\sel_first_i_1__1\: unisim.vcomponents.LUT6
generic map(
INIT => X"FF04FFFFFF04FF04"
)
port map (
I0 => \^axlen_cnt_reg[7]\,
I1 => si_rs_awvalid,
I2 => \^axlen_cnt_reg[7]_0\,
I3 => areset_d1,
I4 => \^next\,
I5 => sel_first_reg_1,
O => \^sel_first_i\
);
\state[0]_i_1\: unisim.vcomponents.LUT4
generic map(
INIT => X"BBBA"
)
port map (
I0 => \state[0]_i_2_n_0\,
I1 => \^q\(0),
I2 => si_rs_awvalid,
I3 => \^q\(1),
O => \state[0]_i_1_n_0\
);
\state[0]_i_2\: unisim.vcomponents.LUT6
generic map(
INIT => X"00F000F055750000"
)
port map (
I0 => m_axi_awready,
I1 => s_axburst_eq1_reg_0,
I2 => \cnt_read_reg[1]_rep__0\,
I3 => \cnt_read_reg[0]_rep__0\,
I4 => \^axlen_cnt_reg[7]_0\,
I5 => \^axlen_cnt_reg[7]\,
O => \state[0]_i_2_n_0\
);
\state[1]_i_1__0\: unisim.vcomponents.LUT6
generic map(
INIT => X"0C0CAE0000000000"
)
port map (
I0 => s_axburst_eq1_reg_0,
I1 => \cnt_read_reg[1]_rep__0\,
I2 => \cnt_read_reg[0]_rep__0\,
I3 => m_axi_awready,
I4 => \^axlen_cnt_reg[7]\,
I5 => \^axlen_cnt_reg[7]_0\,
O => \state[1]_i_1__0_n_0\
);
\state_reg[0]\: unisim.vcomponents.FDRE
generic map(
INIT => '0'
)
port map (
C => aclk,
CE => '1',
D => \state[0]_i_1_n_0\,
Q => \^q\(0),
R => areset_d1
);
\state_reg[0]_rep\: unisim.vcomponents.FDRE
generic map(
INIT => '0'
)
port map (
C => aclk,
CE => '1',
D => \state[0]_i_1_n_0\,
Q => \^axlen_cnt_reg[7]_0\,
R => areset_d1
);
\state_reg[1]\: unisim.vcomponents.FDRE
generic map(
INIT => '0'
)
port map (
C => aclk,
CE => '1',
D => \state[1]_i_1__0_n_0\,
Q => \^q\(1),
R => areset_d1
);
\state_reg[1]_rep\: unisim.vcomponents.FDRE
generic map(
INIT => '0'
)
port map (
C => aclk,
CE => '1',
D => \state[1]_i_1__0_n_0\,
Q => \^axlen_cnt_reg[7]\,
R => areset_d1
);
\wrap_boundary_axaddr_r[11]_i_1\: unisim.vcomponents.LUT3
generic map(
INIT => X"04"
)
port map (
I0 => \^axlen_cnt_reg[7]\,
I1 => si_rs_awvalid,
I2 => \^axlen_cnt_reg[7]_0\,
O => \^e\(0)
);
\wrap_cnt_r[0]_i_1\: unisim.vcomponents.LUT6
generic map(
INIT => X"AA8A5575AA8A5545"
)
port map (
I0 => \wrap_second_len_r_reg[0]_0\(0),
I1 => \^q\(0),
I2 => si_rs_awvalid,
I3 => \^q\(1),
I4 => \axaddr_offset_r_reg[3]\,
I5 => axaddr_offset(0),
O => D(0)
);
\wrap_cnt_r[3]_i_4\: unisim.vcomponents.LUT4
generic map(
INIT => X"AA8A"
)
port map (
I0 => \axaddr_offset_r_reg[3]_0\(1),
I1 => \^axlen_cnt_reg[7]_0\,
I2 => si_rs_awvalid,
I3 => \^axlen_cnt_reg[7]\,
O => \wrap_cnt_r_reg[3]\
);
\wrap_cnt_r[3]_i_6\: unisim.vcomponents.LUT4
generic map(
INIT => X"AA8A"
)
port map (
I0 => \axaddr_offset_r_reg[3]_0\(0),
I1 => \^axlen_cnt_reg[7]_0\,
I2 => si_rs_awvalid,
I3 => \^axlen_cnt_reg[7]\,
O => \wrap_cnt_r_reg[3]_0\
);
\wrap_second_len_r[0]_i_1\: unisim.vcomponents.LUT6
generic map(
INIT => X"AA8AAA8AAA8AAABA"
)
port map (
I0 => \wrap_second_len_r_reg[0]_0\(0),
I1 => \^q\(0),
I2 => si_rs_awvalid,
I3 => \^q\(1),
I4 => \axaddr_offset_r_reg[3]\,
I5 => axaddr_offset(0),
O => \wrap_second_len_r_reg[0]\(0)
);
end STRUCTURE;
library IEEE;
use IEEE.STD_LOGIC_1164.ALL;
library UNISIM;
use UNISIM.VCOMPONENTS.ALL;
entity decalper_eb_ot_sdeen_pot_pi_dehcac_xnilix_axi_protocol_converter_v2_1_17_b2s_wrap_cmd is
port (
wrap_next_pending : out STD_LOGIC;
sel_first_reg_0 : out STD_LOGIC;
\wrap_cnt_r_reg[3]_0\ : out STD_LOGIC;
\wrap_second_len_r_reg[3]_0\ : out STD_LOGIC_VECTOR ( 3 downto 0 );
m_axi_awaddr : out STD_LOGIC_VECTOR ( 11 downto 0 );
\axaddr_offset_r_reg[3]_0\ : out STD_LOGIC_VECTOR ( 3 downto 0 );
aclk : in STD_LOGIC;
sel_first_reg_1 : in STD_LOGIC;
E : in STD_LOGIC_VECTOR ( 0 to 0 );
\m_payload_i_reg[47]\ : in STD_LOGIC_VECTOR ( 18 downto 0 );
\state_reg[1]\ : in STD_LOGIC_VECTOR ( 1 downto 0 );
si_rs_awvalid : in STD_LOGIC;
\axaddr_offset_r_reg[3]_1\ : in STD_LOGIC;
D : in STD_LOGIC_VECTOR ( 3 downto 0 );
\m_payload_i_reg[47]_0\ : in STD_LOGIC;
\next\ : in STD_LOGIC;
sel_first_reg_2 : in STD_LOGIC;
\axaddr_incr_reg[11]\ : in STD_LOGIC_VECTOR ( 10 downto 0 );
sel_first_reg_3 : in STD_LOGIC;
\axaddr_offset_r_reg[3]_2\ : in STD_LOGIC;
\wrap_second_len_r_reg[3]_1\ : in STD_LOGIC_VECTOR ( 3 downto 0 );
\state_reg[0]\ : in STD_LOGIC_VECTOR ( 0 to 0 );
\wrap_second_len_r_reg[3]_2\ : in STD_LOGIC_VECTOR ( 2 downto 0 );
\m_payload_i_reg[6]\ : in STD_LOGIC_VECTOR ( 6 downto 0 )
);
end decalper_eb_ot_sdeen_pot_pi_dehcac_xnilix_axi_protocol_converter_v2_1_17_b2s_wrap_cmd;
architecture STRUCTURE of decalper_eb_ot_sdeen_pot_pi_dehcac_xnilix_axi_protocol_converter_v2_1_17_b2s_wrap_cmd is
signal axaddr_wrap : STD_LOGIC_VECTOR ( 11 downto 0 );
signal axaddr_wrap0 : STD_LOGIC_VECTOR ( 11 downto 0 );
signal \axaddr_wrap[0]_i_1_n_0\ : STD_LOGIC;
signal \axaddr_wrap[10]_i_1_n_0\ : STD_LOGIC;
signal \axaddr_wrap[11]_i_1_n_0\ : STD_LOGIC;
signal \axaddr_wrap[11]_i_2_n_0\ : STD_LOGIC;
signal \axaddr_wrap[11]_i_4_n_0\ : STD_LOGIC;
signal \axaddr_wrap[1]_i_1_n_0\ : STD_LOGIC;
signal \axaddr_wrap[2]_i_1_n_0\ : STD_LOGIC;
signal \axaddr_wrap[3]_i_1_n_0\ : STD_LOGIC;
signal \axaddr_wrap[3]_i_3_n_0\ : STD_LOGIC;
signal \axaddr_wrap[3]_i_4_n_0\ : STD_LOGIC;
signal \axaddr_wrap[3]_i_5_n_0\ : STD_LOGIC;
signal \axaddr_wrap[3]_i_6_n_0\ : STD_LOGIC;
signal \axaddr_wrap[4]_i_1_n_0\ : STD_LOGIC;
signal \axaddr_wrap[5]_i_1_n_0\ : STD_LOGIC;
signal \axaddr_wrap[6]_i_1_n_0\ : STD_LOGIC;
signal \axaddr_wrap[7]_i_1_n_0\ : STD_LOGIC;
signal \axaddr_wrap[8]_i_1_n_0\ : STD_LOGIC;
signal \axaddr_wrap[9]_i_1_n_0\ : STD_LOGIC;
signal \axaddr_wrap_reg[11]_i_3_n_1\ : STD_LOGIC;
signal \axaddr_wrap_reg[11]_i_3_n_2\ : STD_LOGIC;
signal \axaddr_wrap_reg[11]_i_3_n_3\ : STD_LOGIC;
signal \axaddr_wrap_reg[3]_i_2_n_0\ : STD_LOGIC;
signal \axaddr_wrap_reg[3]_i_2_n_1\ : STD_LOGIC;
signal \axaddr_wrap_reg[3]_i_2_n_2\ : STD_LOGIC;
signal \axaddr_wrap_reg[3]_i_2_n_3\ : STD_LOGIC;
signal \axaddr_wrap_reg[7]_i_2_n_0\ : STD_LOGIC;
signal \axaddr_wrap_reg[7]_i_2_n_1\ : STD_LOGIC;
signal \axaddr_wrap_reg[7]_i_2_n_2\ : STD_LOGIC;
signal \axaddr_wrap_reg[7]_i_2_n_3\ : STD_LOGIC;
signal \axlen_cnt[0]_i_1_n_0\ : STD_LOGIC;
signal \axlen_cnt[1]_i_1_n_0\ : STD_LOGIC;
signal \axlen_cnt[2]_i_1__0_n_0\ : STD_LOGIC;
signal \axlen_cnt[3]_i_1_n_0\ : STD_LOGIC;
signal \axlen_cnt_reg_n_0_[0]\ : STD_LOGIC;
signal \axlen_cnt_reg_n_0_[1]\ : STD_LOGIC;
signal \axlen_cnt_reg_n_0_[2]\ : STD_LOGIC;
signal \axlen_cnt_reg_n_0_[3]\ : STD_LOGIC;
signal \next_pending_r_i_2__1_n_0\ : STD_LOGIC;
signal next_pending_r_reg_n_0 : STD_LOGIC;
signal \^sel_first_reg_0\ : STD_LOGIC;
signal wrap_boundary_axaddr_r : STD_LOGIC_VECTOR ( 11 downto 0 );
signal wrap_cnt : STD_LOGIC_VECTOR ( 1 to 1 );
signal wrap_cnt_r : STD_LOGIC_VECTOR ( 3 downto 0 );
signal \^wrap_next_pending\ : STD_LOGIC;
signal \^wrap_second_len_r_reg[3]_0\ : STD_LOGIC_VECTOR ( 3 downto 0 );
signal \NLW_axaddr_wrap_reg[11]_i_3_CO_UNCONNECTED\ : STD_LOGIC_VECTOR ( 3 to 3 );
begin
sel_first_reg_0 <= \^sel_first_reg_0\;
wrap_next_pending <= \^wrap_next_pending\;
\wrap_second_len_r_reg[3]_0\(3 downto 0) <= \^wrap_second_len_r_reg[3]_0\(3 downto 0);
\axaddr_offset_r_reg[0]\: unisim.vcomponents.FDRE
port map (
C => aclk,
CE => '1',
D => D(0),
Q => \axaddr_offset_r_reg[3]_0\(0),
R => '0'
);
\axaddr_offset_r_reg[1]\: unisim.vcomponents.FDRE
port map (
C => aclk,
CE => '1',
D => D(1),
Q => \axaddr_offset_r_reg[3]_0\(1),
R => '0'
);
\axaddr_offset_r_reg[2]\: unisim.vcomponents.FDRE
port map (
C => aclk,
CE => '1',
D => D(2),
Q => \axaddr_offset_r_reg[3]_0\(2),
R => '0'
);
\axaddr_offset_r_reg[3]\: unisim.vcomponents.FDRE
port map (
C => aclk,
CE => '1',
D => D(3),
Q => \axaddr_offset_r_reg[3]_0\(3),
R => '0'
);
\axaddr_wrap[0]_i_1\: unisim.vcomponents.LUT5
generic map(
INIT => X"B8FFB800"
)
port map (
I0 => wrap_boundary_axaddr_r(0),
I1 => \axaddr_wrap[11]_i_2_n_0\,
I2 => axaddr_wrap0(0),
I3 => \next\,
I4 => \m_payload_i_reg[47]\(0),
O => \axaddr_wrap[0]_i_1_n_0\
);
\axaddr_wrap[10]_i_1\: unisim.vcomponents.LUT5
generic map(
INIT => X"B8FFB800"
)
port map (
I0 => wrap_boundary_axaddr_r(10),
I1 => \axaddr_wrap[11]_i_2_n_0\,
I2 => axaddr_wrap0(10),
I3 => \next\,
I4 => \m_payload_i_reg[47]\(10),
O => \axaddr_wrap[10]_i_1_n_0\
);
\axaddr_wrap[11]_i_1\: unisim.vcomponents.LUT5
generic map(
INIT => X"B8FFB800"
)
port map (
I0 => wrap_boundary_axaddr_r(11),
I1 => \axaddr_wrap[11]_i_2_n_0\,
I2 => axaddr_wrap0(11),
I3 => \next\,
I4 => \m_payload_i_reg[47]\(11),
O => \axaddr_wrap[11]_i_1_n_0\
);
\axaddr_wrap[11]_i_2\: unisim.vcomponents.LUT3
generic map(
INIT => X"41"
)
port map (
I0 => \axaddr_wrap[11]_i_4_n_0\,
I1 => wrap_cnt_r(3),
I2 => \axlen_cnt_reg_n_0_[3]\,
O => \axaddr_wrap[11]_i_2_n_0\
);
\axaddr_wrap[11]_i_4\: unisim.vcomponents.LUT6
generic map(
INIT => X"6FF6FFFFFFFF6FF6"
)
port map (
I0 => wrap_cnt_r(0),
I1 => \axlen_cnt_reg_n_0_[0]\,
I2 => \axlen_cnt_reg_n_0_[1]\,
I3 => wrap_cnt_r(1),
I4 => \axlen_cnt_reg_n_0_[2]\,
I5 => wrap_cnt_r(2),
O => \axaddr_wrap[11]_i_4_n_0\
);
\axaddr_wrap[1]_i_1\: unisim.vcomponents.LUT5
generic map(
INIT => X"B8FFB800"
)
port map (
I0 => wrap_boundary_axaddr_r(1),
I1 => \axaddr_wrap[11]_i_2_n_0\,
I2 => axaddr_wrap0(1),
I3 => \next\,
I4 => \m_payload_i_reg[47]\(1),
O => \axaddr_wrap[1]_i_1_n_0\
);
\axaddr_wrap[2]_i_1\: unisim.vcomponents.LUT5
generic map(
INIT => X"B8FFB800"
)
port map (
I0 => wrap_boundary_axaddr_r(2),
I1 => \axaddr_wrap[11]_i_2_n_0\,
I2 => axaddr_wrap0(2),
I3 => \next\,
I4 => \m_payload_i_reg[47]\(2),
O => \axaddr_wrap[2]_i_1_n_0\
);
\axaddr_wrap[3]_i_1\: unisim.vcomponents.LUT5
generic map(
INIT => X"B8FFB800"
)
port map (
I0 => wrap_boundary_axaddr_r(3),
I1 => \axaddr_wrap[11]_i_2_n_0\,
I2 => axaddr_wrap0(3),
I3 => \next\,
I4 => \m_payload_i_reg[47]\(3),
O => \axaddr_wrap[3]_i_1_n_0\
);
\axaddr_wrap[3]_i_3\: unisim.vcomponents.LUT3
generic map(
INIT => X"6A"
)
port map (
I0 => axaddr_wrap(3),
I1 => \m_payload_i_reg[47]\(12),
I2 => \m_payload_i_reg[47]\(13),
O => \axaddr_wrap[3]_i_3_n_0\
);
\axaddr_wrap[3]_i_4\: unisim.vcomponents.LUT3
generic map(
INIT => X"9A"
)
port map (
I0 => axaddr_wrap(2),
I1 => \m_payload_i_reg[47]\(12),
I2 => \m_payload_i_reg[47]\(13),
O => \axaddr_wrap[3]_i_4_n_0\
);
\axaddr_wrap[3]_i_5\: unisim.vcomponents.LUT3
generic map(
INIT => X"9A"
)
port map (
I0 => axaddr_wrap(1),
I1 => \m_payload_i_reg[47]\(13),
I2 => \m_payload_i_reg[47]\(12),
O => \axaddr_wrap[3]_i_5_n_0\
);
\axaddr_wrap[3]_i_6\: unisim.vcomponents.LUT3
generic map(
INIT => X"A9"
)
port map (
I0 => axaddr_wrap(0),
I1 => \m_payload_i_reg[47]\(12),
I2 => \m_payload_i_reg[47]\(13),
O => \axaddr_wrap[3]_i_6_n_0\
);
\axaddr_wrap[4]_i_1\: unisim.vcomponents.LUT5
generic map(
INIT => X"B8FFB800"
)
port map (
I0 => wrap_boundary_axaddr_r(4),
I1 => \axaddr_wrap[11]_i_2_n_0\,
I2 => axaddr_wrap0(4),
I3 => \next\,
I4 => \m_payload_i_reg[47]\(4),
O => \axaddr_wrap[4]_i_1_n_0\
);
\axaddr_wrap[5]_i_1\: unisim.vcomponents.LUT5
generic map(
INIT => X"B8FFB800"
)
port map (
I0 => wrap_boundary_axaddr_r(5),
I1 => \axaddr_wrap[11]_i_2_n_0\,
I2 => axaddr_wrap0(5),
I3 => \next\,
I4 => \m_payload_i_reg[47]\(5),
O => \axaddr_wrap[5]_i_1_n_0\
);
\axaddr_wrap[6]_i_1\: unisim.vcomponents.LUT5
generic map(
INIT => X"B8FFB800"
)
port map (
I0 => wrap_boundary_axaddr_r(6),
I1 => \axaddr_wrap[11]_i_2_n_0\,
I2 => axaddr_wrap0(6),
I3 => \next\,
I4 => \m_payload_i_reg[47]\(6),
O => \axaddr_wrap[6]_i_1_n_0\
);
\axaddr_wrap[7]_i_1\: unisim.vcomponents.LUT5
generic map(
INIT => X"B8FFB800"
)
port map (
I0 => wrap_boundary_axaddr_r(7),
I1 => \axaddr_wrap[11]_i_2_n_0\,
I2 => axaddr_wrap0(7),
I3 => \next\,
I4 => \m_payload_i_reg[47]\(7),
O => \axaddr_wrap[7]_i_1_n_0\
);
\axaddr_wrap[8]_i_1\: unisim.vcomponents.LUT5
generic map(
INIT => X"B8FFB800"
)
port map (
I0 => wrap_boundary_axaddr_r(8),
I1 => \axaddr_wrap[11]_i_2_n_0\,
I2 => axaddr_wrap0(8),
I3 => \next\,
I4 => \m_payload_i_reg[47]\(8),
O => \axaddr_wrap[8]_i_1_n_0\
);
\axaddr_wrap[9]_i_1\: unisim.vcomponents.LUT5
generic map(
INIT => X"B8FFB800"
)
port map (
I0 => wrap_boundary_axaddr_r(9),
I1 => \axaddr_wrap[11]_i_2_n_0\,
I2 => axaddr_wrap0(9),
I3 => \next\,
I4 => \m_payload_i_reg[47]\(9),
O => \axaddr_wrap[9]_i_1_n_0\
);
\axaddr_wrap_reg[0]\: unisim.vcomponents.FDRE
port map (
C => aclk,
CE => \state_reg[0]\(0),
D => \axaddr_wrap[0]_i_1_n_0\,
Q => axaddr_wrap(0),
R => '0'
);
\axaddr_wrap_reg[10]\: unisim.vcomponents.FDRE
port map (
C => aclk,
CE => \state_reg[0]\(0),
D => \axaddr_wrap[10]_i_1_n_0\,
Q => axaddr_wrap(10),
R => '0'
);
\axaddr_wrap_reg[11]\: unisim.vcomponents.FDRE
port map (
C => aclk,
CE => \state_reg[0]\(0),
D => \axaddr_wrap[11]_i_1_n_0\,
Q => axaddr_wrap(11),
R => '0'
);
\axaddr_wrap_reg[11]_i_3\: unisim.vcomponents.CARRY4
port map (
CI => \axaddr_wrap_reg[7]_i_2_n_0\,
CO(3) => \NLW_axaddr_wrap_reg[11]_i_3_CO_UNCONNECTED\(3),
CO(2) => \axaddr_wrap_reg[11]_i_3_n_1\,
CO(1) => \axaddr_wrap_reg[11]_i_3_n_2\,
CO(0) => \axaddr_wrap_reg[11]_i_3_n_3\,
CYINIT => '0',
DI(3 downto 0) => B"0000",
O(3 downto 0) => axaddr_wrap0(11 downto 8),
S(3 downto 0) => axaddr_wrap(11 downto 8)
);
\axaddr_wrap_reg[1]\: unisim.vcomponents.FDRE
port map (
C => aclk,
CE => \state_reg[0]\(0),
D => \axaddr_wrap[1]_i_1_n_0\,
Q => axaddr_wrap(1),
R => '0'
);
\axaddr_wrap_reg[2]\: unisim.vcomponents.FDRE
port map (
C => aclk,
CE => \state_reg[0]\(0),
D => \axaddr_wrap[2]_i_1_n_0\,
Q => axaddr_wrap(2),
R => '0'
);
\axaddr_wrap_reg[3]\: unisim.vcomponents.FDRE
port map (
C => aclk,
CE => \state_reg[0]\(0),
D => \axaddr_wrap[3]_i_1_n_0\,
Q => axaddr_wrap(3),
R => '0'
);
\axaddr_wrap_reg[3]_i_2\: unisim.vcomponents.CARRY4
port map (
CI => '0',
CO(3) => \axaddr_wrap_reg[3]_i_2_n_0\,
CO(2) => \axaddr_wrap_reg[3]_i_2_n_1\,
CO(1) => \axaddr_wrap_reg[3]_i_2_n_2\,
CO(0) => \axaddr_wrap_reg[3]_i_2_n_3\,
CYINIT => '0',
DI(3 downto 0) => axaddr_wrap(3 downto 0),
O(3 downto 0) => axaddr_wrap0(3 downto 0),
S(3) => \axaddr_wrap[3]_i_3_n_0\,
S(2) => \axaddr_wrap[3]_i_4_n_0\,
S(1) => \axaddr_wrap[3]_i_5_n_0\,
S(0) => \axaddr_wrap[3]_i_6_n_0\
);
\axaddr_wrap_reg[4]\: unisim.vcomponents.FDRE
port map (
C => aclk,
CE => \state_reg[0]\(0),
D => \axaddr_wrap[4]_i_1_n_0\,
Q => axaddr_wrap(4),
R => '0'
);
\axaddr_wrap_reg[5]\: unisim.vcomponents.FDRE
port map (
C => aclk,
CE => \state_reg[0]\(0),
D => \axaddr_wrap[5]_i_1_n_0\,
Q => axaddr_wrap(5),
R => '0'
);
\axaddr_wrap_reg[6]\: unisim.vcomponents.FDRE
port map (
C => aclk,
CE => \state_reg[0]\(0),
D => \axaddr_wrap[6]_i_1_n_0\,
Q => axaddr_wrap(6),
R => '0'
);
\axaddr_wrap_reg[7]\: unisim.vcomponents.FDRE
port map (
C => aclk,
CE => \state_reg[0]\(0),
D => \axaddr_wrap[7]_i_1_n_0\,
Q => axaddr_wrap(7),
R => '0'
);
\axaddr_wrap_reg[7]_i_2\: unisim.vcomponents.CARRY4
port map (
CI => \axaddr_wrap_reg[3]_i_2_n_0\,
CO(3) => \axaddr_wrap_reg[7]_i_2_n_0\,
CO(2) => \axaddr_wrap_reg[7]_i_2_n_1\,
CO(1) => \axaddr_wrap_reg[7]_i_2_n_2\,
CO(0) => \axaddr_wrap_reg[7]_i_2_n_3\,
CYINIT => '0',
DI(3 downto 0) => B"0000",
O(3 downto 0) => axaddr_wrap0(7 downto 4),
S(3 downto 0) => axaddr_wrap(7 downto 4)
);
\axaddr_wrap_reg[8]\: unisim.vcomponents.FDRE
port map (
C => aclk,
CE => \state_reg[0]\(0),
D => \axaddr_wrap[8]_i_1_n_0\,
Q => axaddr_wrap(8),
R => '0'
);
\axaddr_wrap_reg[9]\: unisim.vcomponents.FDRE
port map (
C => aclk,
CE => \state_reg[0]\(0),
D => \axaddr_wrap[9]_i_1_n_0\,
Q => axaddr_wrap(9),
R => '0'
);
\axlen_cnt[0]_i_1\: unisim.vcomponents.LUT6
generic map(
INIT => X"A3A3A3A3A3A3A3A0"
)
port map (
I0 => \m_payload_i_reg[47]\(15),
I1 => \axlen_cnt_reg_n_0_[0]\,
I2 => E(0),
I3 => \axlen_cnt_reg_n_0_[3]\,
I4 => \axlen_cnt_reg_n_0_[2]\,
I5 => \axlen_cnt_reg_n_0_[1]\,
O => \axlen_cnt[0]_i_1_n_0\
);
\axlen_cnt[1]_i_1\: unisim.vcomponents.LUT6
generic map(
INIT => X"AAC3AAC3AAC3AAC0"
)
port map (
I0 => \m_payload_i_reg[47]\(16),
I1 => \axlen_cnt_reg_n_0_[1]\,
I2 => \axlen_cnt_reg_n_0_[0]\,
I3 => E(0),
I4 => \axlen_cnt_reg_n_0_[3]\,
I5 => \axlen_cnt_reg_n_0_[2]\,
O => \axlen_cnt[1]_i_1_n_0\
);
\axlen_cnt[2]_i_1__0\: unisim.vcomponents.LUT6
generic map(
INIT => X"FFFFA9A80000A9A8"
)
port map (
I0 => \axlen_cnt_reg_n_0_[2]\,
I1 => \axlen_cnt_reg_n_0_[0]\,
I2 => \axlen_cnt_reg_n_0_[1]\,
I3 => \axlen_cnt_reg_n_0_[3]\,
I4 => E(0),
I5 => \m_payload_i_reg[47]\(17),
O => \axlen_cnt[2]_i_1__0_n_0\
);
\axlen_cnt[3]_i_1\: unisim.vcomponents.LUT6
generic map(
INIT => X"AAAAAAAACCCCCCC0"
)
port map (
I0 => \m_payload_i_reg[47]\(18),
I1 => \axlen_cnt_reg_n_0_[3]\,
I2 => \axlen_cnt_reg_n_0_[2]\,
I3 => \axlen_cnt_reg_n_0_[1]\,
I4 => \axlen_cnt_reg_n_0_[0]\,
I5 => E(0),
O => \axlen_cnt[3]_i_1_n_0\
);
\axlen_cnt_reg[0]\: unisim.vcomponents.FDRE
port map (
C => aclk,
CE => \state_reg[0]\(0),
D => \axlen_cnt[0]_i_1_n_0\,
Q => \axlen_cnt_reg_n_0_[0]\,
R => '0'
);
\axlen_cnt_reg[1]\: unisim.vcomponents.FDRE
port map (
C => aclk,
CE => \state_reg[0]\(0),
D => \axlen_cnt[1]_i_1_n_0\,
Q => \axlen_cnt_reg_n_0_[1]\,
R => '0'
);
\axlen_cnt_reg[2]\: unisim.vcomponents.FDRE
port map (
C => aclk,
CE => \state_reg[0]\(0),
D => \axlen_cnt[2]_i_1__0_n_0\,
Q => \axlen_cnt_reg_n_0_[2]\,
R => '0'
);
\axlen_cnt_reg[3]\: unisim.vcomponents.FDRE
port map (
C => aclk,
CE => \state_reg[0]\(0),
D => \axlen_cnt[3]_i_1_n_0\,
Q => \axlen_cnt_reg_n_0_[3]\,
R => '0'
);
\m_axi_awaddr[0]_INST_0\: unisim.vcomponents.LUT6
generic map(
INIT => X"EF40EF4FEF40E040"
)
port map (
I0 => \^sel_first_reg_0\,
I1 => axaddr_wrap(0),
I2 => \m_payload_i_reg[47]\(14),
I3 => \m_payload_i_reg[47]\(0),
I4 => sel_first_reg_2,
I5 => \axaddr_incr_reg[11]\(0),
O => m_axi_awaddr(0)
);
\m_axi_awaddr[10]_INST_0\: unisim.vcomponents.LUT6
generic map(
INIT => X"EF40EF4FEF40E040"
)
port map (
I0 => \^sel_first_reg_0\,
I1 => axaddr_wrap(10),
I2 => \m_payload_i_reg[47]\(14),
I3 => \m_payload_i_reg[47]\(10),
I4 => sel_first_reg_2,
I5 => \axaddr_incr_reg[11]\(9),
O => m_axi_awaddr(10)
);
\m_axi_awaddr[11]_INST_0\: unisim.vcomponents.LUT6
generic map(
INIT => X"EF40EF4FEF40E040"
)
port map (
I0 => \^sel_first_reg_0\,
I1 => axaddr_wrap(11),
I2 => \m_payload_i_reg[47]\(14),
I3 => \m_payload_i_reg[47]\(11),
I4 => sel_first_reg_2,
I5 => \axaddr_incr_reg[11]\(10),
O => m_axi_awaddr(11)
);
\m_axi_awaddr[1]_INST_0\: unisim.vcomponents.LUT6
generic map(
INIT => X"EF40EF4FEF40E040"
)
port map (
I0 => \^sel_first_reg_0\,
I1 => axaddr_wrap(1),
I2 => \m_payload_i_reg[47]\(14),
I3 => \m_payload_i_reg[47]\(1),
I4 => sel_first_reg_2,
I5 => \axaddr_incr_reg[11]\(1),
O => m_axi_awaddr(1)
);
\m_axi_awaddr[2]_INST_0\: unisim.vcomponents.LUT6
generic map(
INIT => X"EF40EF4FEF40E040"
)
port map (
I0 => \^sel_first_reg_0\,
I1 => axaddr_wrap(2),
I2 => \m_payload_i_reg[47]\(14),
I3 => \m_payload_i_reg[47]\(2),
I4 => sel_first_reg_2,
I5 => \axaddr_incr_reg[11]\(2),
O => m_axi_awaddr(2)
);
\m_axi_awaddr[3]_INST_0\: unisim.vcomponents.LUT6
generic map(
INIT => X"EF40EF4FEF40E040"
)
port map (
I0 => \^sel_first_reg_0\,
I1 => axaddr_wrap(3),
I2 => \m_payload_i_reg[47]\(14),
I3 => \m_payload_i_reg[47]\(3),
I4 => sel_first_reg_2,
I5 => \axaddr_incr_reg[11]\(3),
O => m_axi_awaddr(3)
);
\m_axi_awaddr[4]_INST_0\: unisim.vcomponents.LUT6
generic map(
INIT => X"EF40EF4FEF40E040"
)
port map (
I0 => \^sel_first_reg_0\,
I1 => axaddr_wrap(4),
I2 => \m_payload_i_reg[47]\(14),
I3 => \m_payload_i_reg[47]\(4),
I4 => sel_first_reg_2,
I5 => \axaddr_incr_reg[11]\(4),
O => m_axi_awaddr(4)
);
\m_axi_awaddr[5]_INST_0\: unisim.vcomponents.LUT5
generic map(
INIT => X"B8FFB800"
)
port map (
I0 => \m_payload_i_reg[47]\(5),
I1 => \^sel_first_reg_0\,
I2 => axaddr_wrap(5),
I3 => \m_payload_i_reg[47]\(14),
I4 => sel_first_reg_3,
O => m_axi_awaddr(5)
);
\m_axi_awaddr[6]_INST_0\: unisim.vcomponents.LUT6
generic map(
INIT => X"EF40EF4FEF40E040"
)
port map (
I0 => \^sel_first_reg_0\,
I1 => axaddr_wrap(6),
I2 => \m_payload_i_reg[47]\(14),
I3 => \m_payload_i_reg[47]\(6),
I4 => sel_first_reg_2,
I5 => \axaddr_incr_reg[11]\(5),
O => m_axi_awaddr(6)
);
\m_axi_awaddr[7]_INST_0\: unisim.vcomponents.LUT6
generic map(
INIT => X"EF40EF4FEF40E040"
)
port map (
I0 => \^sel_first_reg_0\,
I1 => axaddr_wrap(7),
I2 => \m_payload_i_reg[47]\(14),
I3 => \m_payload_i_reg[47]\(7),
I4 => sel_first_reg_2,
I5 => \axaddr_incr_reg[11]\(6),
O => m_axi_awaddr(7)
);
\m_axi_awaddr[8]_INST_0\: unisim.vcomponents.LUT6
generic map(
INIT => X"EF40EF4FEF40E040"
)
port map (
I0 => \^sel_first_reg_0\,
I1 => axaddr_wrap(8),
I2 => \m_payload_i_reg[47]\(14),
I3 => \m_payload_i_reg[47]\(8),
I4 => sel_first_reg_2,
I5 => \axaddr_incr_reg[11]\(7),
O => m_axi_awaddr(8)
);
\m_axi_awaddr[9]_INST_0\: unisim.vcomponents.LUT6
generic map(
INIT => X"EF40EF4FEF40E040"
)
port map (
I0 => \^sel_first_reg_0\,
I1 => axaddr_wrap(9),
I2 => \m_payload_i_reg[47]\(14),
I3 => \m_payload_i_reg[47]\(9),
I4 => sel_first_reg_2,
I5 => \axaddr_incr_reg[11]\(8),
O => m_axi_awaddr(9)
);
\next_pending_r_i_1__0\: unisim.vcomponents.LUT5
generic map(
INIT => X"FEAAFEAE"
)
port map (
I0 => \m_payload_i_reg[47]_0\,
I1 => next_pending_r_reg_n_0,
I2 => \next\,
I3 => \next_pending_r_i_2__1_n_0\,
I4 => E(0),
O => \^wrap_next_pending\
);
\next_pending_r_i_2__1\: unisim.vcomponents.LUT6
generic map(
INIT => X"FBFBFBFBFBFBFB00"
)
port map (
I0 => \state_reg[1]\(0),
I1 => si_rs_awvalid,
I2 => \state_reg[1]\(1),
I3 => \axlen_cnt_reg_n_0_[3]\,
I4 => \axlen_cnt_reg_n_0_[2]\,
I5 => \axlen_cnt_reg_n_0_[1]\,
O => \next_pending_r_i_2__1_n_0\
);
next_pending_r_reg: unisim.vcomponents.FDRE
port map (
C => aclk,
CE => '1',
D => \^wrap_next_pending\,
Q => next_pending_r_reg_n_0,
R => '0'
);
sel_first_reg: unisim.vcomponents.FDRE
port map (
C => aclk,
CE => '1',
D => sel_first_reg_1,
Q => \^sel_first_reg_0\,
R => '0'
);
\wrap_boundary_axaddr_r_reg[0]\: unisim.vcomponents.FDRE
port map (
C => aclk,
CE => E(0),
D => \m_payload_i_reg[6]\(0),
Q => wrap_boundary_axaddr_r(0),
R => '0'
);
\wrap_boundary_axaddr_r_reg[10]\: unisim.vcomponents.FDRE
port map (
C => aclk,
CE => E(0),
D => \m_payload_i_reg[47]\(10),
Q => wrap_boundary_axaddr_r(10),
R => '0'
);
\wrap_boundary_axaddr_r_reg[11]\: unisim.vcomponents.FDRE
port map (
C => aclk,
CE => E(0),
D => \m_payload_i_reg[47]\(11),
Q => wrap_boundary_axaddr_r(11),
R => '0'
);
\wrap_boundary_axaddr_r_reg[1]\: unisim.vcomponents.FDRE
port map (
C => aclk,
CE => E(0),
D => \m_payload_i_reg[6]\(1),
Q => wrap_boundary_axaddr_r(1),
R => '0'
);
\wrap_boundary_axaddr_r_reg[2]\: unisim.vcomponents.FDRE
port map (
C => aclk,
CE => E(0),
D => \m_payload_i_reg[6]\(2),
Q => wrap_boundary_axaddr_r(2),
R => '0'
);
\wrap_boundary_axaddr_r_reg[3]\: unisim.vcomponents.FDRE
port map (
C => aclk,
CE => E(0),
D => \m_payload_i_reg[6]\(3),
Q => wrap_boundary_axaddr_r(3),
R => '0'
);
\wrap_boundary_axaddr_r_reg[4]\: unisim.vcomponents.FDRE
port map (
C => aclk,
CE => E(0),
D => \m_payload_i_reg[6]\(4),
Q => wrap_boundary_axaddr_r(4),
R => '0'
);
\wrap_boundary_axaddr_r_reg[5]\: unisim.vcomponents.FDRE
port map (
C => aclk,
CE => E(0),
D => \m_payload_i_reg[6]\(5),
Q => wrap_boundary_axaddr_r(5),
R => '0'
);
\wrap_boundary_axaddr_r_reg[6]\: unisim.vcomponents.FDRE
port map (
C => aclk,
CE => E(0),
D => \m_payload_i_reg[6]\(6),
Q => wrap_boundary_axaddr_r(6),
R => '0'
);
\wrap_boundary_axaddr_r_reg[7]\: unisim.vcomponents.FDRE
port map (
C => aclk,
CE => E(0),
D => \m_payload_i_reg[47]\(7),
Q => wrap_boundary_axaddr_r(7),
R => '0'
);
\wrap_boundary_axaddr_r_reg[8]\: unisim.vcomponents.FDRE
port map (
C => aclk,
CE => E(0),
D => \m_payload_i_reg[47]\(8),
Q => wrap_boundary_axaddr_r(8),
R => '0'
);
\wrap_boundary_axaddr_r_reg[9]\: unisim.vcomponents.FDRE
port map (
C => aclk,
CE => E(0),
D => \m_payload_i_reg[47]\(9),
Q => wrap_boundary_axaddr_r(9),
R => '0'
);
\wrap_cnt_r[1]_i_1\: unisim.vcomponents.LUT5
generic map(
INIT => X"3D310E02"
)
port map (
I0 => \^wrap_second_len_r_reg[3]_0\(0),
I1 => E(0),
I2 => \axaddr_offset_r_reg[3]_2\,
I3 => D(1),
I4 => \^wrap_second_len_r_reg[3]_0\(1),
O => wrap_cnt(1)
);
\wrap_cnt_r[3]_i_2\: unisim.vcomponents.LUT6
generic map(
INIT => X"000CAAA8000C0000"
)
port map (
I0 => \^wrap_second_len_r_reg[3]_0\(1),
I1 => \axaddr_offset_r_reg[3]_1\,
I2 => D(1),
I3 => D(0),
I4 => E(0),
I5 => \^wrap_second_len_r_reg[3]_0\(0),
O => \wrap_cnt_r_reg[3]_0\
);
\wrap_cnt_r_reg[0]\: unisim.vcomponents.FDRE
port map (
C => aclk,
CE => '1',
D => \wrap_second_len_r_reg[3]_2\(0),
Q => wrap_cnt_r(0),
R => '0'
);
\wrap_cnt_r_reg[1]\: unisim.vcomponents.FDRE
port map (
C => aclk,
CE => '1',
D => wrap_cnt(1),
Q => wrap_cnt_r(1),
R => '0'
);
\wrap_cnt_r_reg[2]\: unisim.vcomponents.FDRE
port map (
C => aclk,
CE => '1',
D => \wrap_second_len_r_reg[3]_2\(1),
Q => wrap_cnt_r(2),
R => '0'
);
\wrap_cnt_r_reg[3]\: unisim.vcomponents.FDRE
port map (
C => aclk,
CE => '1',
D => \wrap_second_len_r_reg[3]_2\(2),
Q => wrap_cnt_r(3),
R => '0'
);
\wrap_second_len_r_reg[0]\: unisim.vcomponents.FDRE
port map (
C => aclk,
CE => '1',
D => \wrap_second_len_r_reg[3]_1\(0),
Q => \^wrap_second_len_r_reg[3]_0\(0),
R => '0'
);
\wrap_second_len_r_reg[1]\: unisim.vcomponents.FDRE
port map (
C => aclk,
CE => '1',
D => \wrap_second_len_r_reg[3]_1\(1),
Q => \^wrap_second_len_r_reg[3]_0\(1),
R => '0'
);
\wrap_second_len_r_reg[2]\: unisim.vcomponents.FDRE
port map (
C => aclk,
CE => '1',
D => \wrap_second_len_r_reg[3]_1\(2),
Q => \^wrap_second_len_r_reg[3]_0\(2),
R => '0'
);
\wrap_second_len_r_reg[3]\: unisim.vcomponents.FDRE
port map (
C => aclk,
CE => '1',
D => \wrap_second_len_r_reg[3]_1\(3),
Q => \^wrap_second_len_r_reg[3]_0\(3),
R => '0'
);
end STRUCTURE;
library IEEE;
use IEEE.STD_LOGIC_1164.ALL;
library UNISIM;
use UNISIM.VCOMPONENTS.ALL;
entity decalper_eb_ot_sdeen_pot_pi_dehcac_xnilix_axi_protocol_converter_v2_1_17_b2s_wrap_cmd_3 is
port (
sel_first_reg_0 : out STD_LOGIC;
\wrap_cnt_r_reg[3]_0\ : out STD_LOGIC;
\wrap_second_len_r_reg[3]_0\ : out STD_LOGIC_VECTOR ( 3 downto 0 );
s_axburst_eq0_reg : out STD_LOGIC;
s_axburst_eq1_reg : out STD_LOGIC;
m_axi_araddr : out STD_LOGIC_VECTOR ( 11 downto 0 );
\axaddr_offset_r_reg[3]_0\ : out STD_LOGIC_VECTOR ( 3 downto 0 );
aclk : in STD_LOGIC;
sel_first_reg_1 : in STD_LOGIC;
E : in STD_LOGIC_VECTOR ( 0 to 0 );
Q : in STD_LOGIC_VECTOR ( 18 downto 0 );
\state_reg[1]\ : in STD_LOGIC_VECTOR ( 1 downto 0 );
si_rs_arvalid : in STD_LOGIC;
\axaddr_offset_r_reg[3]_1\ : in STD_LOGIC;
D : in STD_LOGIC_VECTOR ( 3 downto 0 );
sel_first_i : in STD_LOGIC;
incr_next_pending : in STD_LOGIC;
\m_payload_i_reg[47]\ : in STD_LOGIC;
\state_reg[1]_rep\ : in STD_LOGIC;
sel_first_reg_2 : in STD_LOGIC;
\axaddr_incr_reg[11]\ : in STD_LOGIC_VECTOR ( 7 downto 0 );
sel_first_reg_3 : in STD_LOGIC;
sel_first_reg_4 : in STD_LOGIC;
sel_first_reg_5 : in STD_LOGIC;
sel_first_reg_6 : in STD_LOGIC;
\axaddr_offset_r_reg[3]_2\ : in STD_LOGIC;
\wrap_second_len_r_reg[3]_1\ : in STD_LOGIC_VECTOR ( 3 downto 0 );
m_valid_i_reg : in STD_LOGIC_VECTOR ( 0 to 0 );
\wrap_second_len_r_reg[3]_2\ : in STD_LOGIC_VECTOR ( 2 downto 0 );
\m_payload_i_reg[6]\ : in STD_LOGIC_VECTOR ( 6 downto 0 )
);
attribute ORIG_REF_NAME : string;
attribute ORIG_REF_NAME of decalper_eb_ot_sdeen_pot_pi_dehcac_xnilix_axi_protocol_converter_v2_1_17_b2s_wrap_cmd_3 : entity is "axi_protocol_converter_v2_1_17_b2s_wrap_cmd";
end decalper_eb_ot_sdeen_pot_pi_dehcac_xnilix_axi_protocol_converter_v2_1_17_b2s_wrap_cmd_3;
architecture STRUCTURE of decalper_eb_ot_sdeen_pot_pi_dehcac_xnilix_axi_protocol_converter_v2_1_17_b2s_wrap_cmd_3 is
signal \axaddr_wrap[0]_i_1__0_n_0\ : STD_LOGIC;
signal \axaddr_wrap[10]_i_1__0_n_0\ : STD_LOGIC;
signal \axaddr_wrap[11]_i_1__0_n_0\ : STD_LOGIC;
signal \axaddr_wrap[11]_i_2__0_n_0\ : STD_LOGIC;
signal \axaddr_wrap[11]_i_4__0_n_0\ : STD_LOGIC;
signal \axaddr_wrap[1]_i_1__0_n_0\ : STD_LOGIC;
signal \axaddr_wrap[2]_i_1__0_n_0\ : STD_LOGIC;
signal \axaddr_wrap[3]_i_1__0_n_0\ : STD_LOGIC;
signal \axaddr_wrap[3]_i_3_n_0\ : STD_LOGIC;
signal \axaddr_wrap[3]_i_4_n_0\ : STD_LOGIC;
signal \axaddr_wrap[3]_i_5_n_0\ : STD_LOGIC;
signal \axaddr_wrap[3]_i_6_n_0\ : STD_LOGIC;
signal \axaddr_wrap[4]_i_1__0_n_0\ : STD_LOGIC;
signal \axaddr_wrap[5]_i_1__0_n_0\ : STD_LOGIC;
signal \axaddr_wrap[6]_i_1__0_n_0\ : STD_LOGIC;
signal \axaddr_wrap[7]_i_1__0_n_0\ : STD_LOGIC;
signal \axaddr_wrap[8]_i_1__0_n_0\ : STD_LOGIC;
signal \axaddr_wrap[9]_i_1__0_n_0\ : STD_LOGIC;
signal \axaddr_wrap_reg[11]_i_3__0_n_1\ : STD_LOGIC;
signal \axaddr_wrap_reg[11]_i_3__0_n_2\ : STD_LOGIC;
signal \axaddr_wrap_reg[11]_i_3__0_n_3\ : STD_LOGIC;
signal \axaddr_wrap_reg[11]_i_3__0_n_4\ : STD_LOGIC;
signal \axaddr_wrap_reg[11]_i_3__0_n_5\ : STD_LOGIC;
signal \axaddr_wrap_reg[11]_i_3__0_n_6\ : STD_LOGIC;
signal \axaddr_wrap_reg[11]_i_3__0_n_7\ : STD_LOGIC;
signal \axaddr_wrap_reg[3]_i_2__0_n_0\ : STD_LOGIC;
signal \axaddr_wrap_reg[3]_i_2__0_n_1\ : STD_LOGIC;
signal \axaddr_wrap_reg[3]_i_2__0_n_2\ : STD_LOGIC;
signal \axaddr_wrap_reg[3]_i_2__0_n_3\ : STD_LOGIC;
signal \axaddr_wrap_reg[3]_i_2__0_n_4\ : STD_LOGIC;
signal \axaddr_wrap_reg[3]_i_2__0_n_5\ : STD_LOGIC;
signal \axaddr_wrap_reg[3]_i_2__0_n_6\ : STD_LOGIC;
signal \axaddr_wrap_reg[3]_i_2__0_n_7\ : STD_LOGIC;
signal \axaddr_wrap_reg[7]_i_2__0_n_0\ : STD_LOGIC;
signal \axaddr_wrap_reg[7]_i_2__0_n_1\ : STD_LOGIC;
signal \axaddr_wrap_reg[7]_i_2__0_n_2\ : STD_LOGIC;
signal \axaddr_wrap_reg[7]_i_2__0_n_3\ : STD_LOGIC;
signal \axaddr_wrap_reg[7]_i_2__0_n_4\ : STD_LOGIC;
signal \axaddr_wrap_reg[7]_i_2__0_n_5\ : STD_LOGIC;
signal \axaddr_wrap_reg[7]_i_2__0_n_6\ : STD_LOGIC;
signal \axaddr_wrap_reg[7]_i_2__0_n_7\ : STD_LOGIC;
signal \axaddr_wrap_reg_n_0_[0]\ : STD_LOGIC;
signal \axaddr_wrap_reg_n_0_[10]\ : STD_LOGIC;
signal \axaddr_wrap_reg_n_0_[11]\ : STD_LOGIC;
signal \axaddr_wrap_reg_n_0_[1]\ : STD_LOGIC;
signal \axaddr_wrap_reg_n_0_[2]\ : STD_LOGIC;
signal \axaddr_wrap_reg_n_0_[3]\ : STD_LOGIC;
signal \axaddr_wrap_reg_n_0_[4]\ : STD_LOGIC;
signal \axaddr_wrap_reg_n_0_[5]\ : STD_LOGIC;
signal \axaddr_wrap_reg_n_0_[6]\ : STD_LOGIC;
signal \axaddr_wrap_reg_n_0_[7]\ : STD_LOGIC;
signal \axaddr_wrap_reg_n_0_[8]\ : STD_LOGIC;
signal \axaddr_wrap_reg_n_0_[9]\ : STD_LOGIC;
signal \axlen_cnt[0]_i_1__1_n_0\ : STD_LOGIC;
signal \axlen_cnt[1]_i_1__2_n_0\ : STD_LOGIC;
signal \axlen_cnt[2]_i_1__2_n_0\ : STD_LOGIC;
signal \axlen_cnt[3]_i_1__1_n_0\ : STD_LOGIC;
signal \axlen_cnt_reg_n_0_[0]\ : STD_LOGIC;
signal \axlen_cnt_reg_n_0_[1]\ : STD_LOGIC;
signal \axlen_cnt_reg_n_0_[2]\ : STD_LOGIC;
signal \axlen_cnt_reg_n_0_[3]\ : STD_LOGIC;
signal \next_pending_r_i_2__2_n_0\ : STD_LOGIC;
signal next_pending_r_reg_n_0 : STD_LOGIC;
signal \^sel_first_reg_0\ : STD_LOGIC;
signal \wrap_boundary_axaddr_r_reg_n_0_[0]\ : STD_LOGIC;
signal \wrap_boundary_axaddr_r_reg_n_0_[10]\ : STD_LOGIC;
signal \wrap_boundary_axaddr_r_reg_n_0_[11]\ : STD_LOGIC;
signal \wrap_boundary_axaddr_r_reg_n_0_[1]\ : STD_LOGIC;
signal \wrap_boundary_axaddr_r_reg_n_0_[2]\ : STD_LOGIC;
signal \wrap_boundary_axaddr_r_reg_n_0_[3]\ : STD_LOGIC;
signal \wrap_boundary_axaddr_r_reg_n_0_[4]\ : STD_LOGIC;
signal \wrap_boundary_axaddr_r_reg_n_0_[5]\ : STD_LOGIC;
signal \wrap_boundary_axaddr_r_reg_n_0_[6]\ : STD_LOGIC;
signal \wrap_boundary_axaddr_r_reg_n_0_[7]\ : STD_LOGIC;
signal \wrap_boundary_axaddr_r_reg_n_0_[8]\ : STD_LOGIC;
signal \wrap_boundary_axaddr_r_reg_n_0_[9]\ : STD_LOGIC;
signal \wrap_cnt_r[1]_i_1__0_n_0\ : STD_LOGIC;
signal \wrap_cnt_r_reg_n_0_[0]\ : STD_LOGIC;
signal \wrap_cnt_r_reg_n_0_[1]\ : STD_LOGIC;
signal \wrap_cnt_r_reg_n_0_[2]\ : STD_LOGIC;
signal \wrap_cnt_r_reg_n_0_[3]\ : STD_LOGIC;
signal wrap_next_pending : STD_LOGIC;
signal \^wrap_second_len_r_reg[3]_0\ : STD_LOGIC_VECTOR ( 3 downto 0 );
signal \NLW_axaddr_wrap_reg[11]_i_3__0_CO_UNCONNECTED\ : STD_LOGIC_VECTOR ( 3 to 3 );
attribute SOFT_HLUTNM : string;
attribute SOFT_HLUTNM of \s_axburst_eq0_i_1__0\ : label is "soft_lutpair16";
attribute SOFT_HLUTNM of \s_axburst_eq1_i_1__0\ : label is "soft_lutpair16";
begin
sel_first_reg_0 <= \^sel_first_reg_0\;
\wrap_second_len_r_reg[3]_0\(3 downto 0) <= \^wrap_second_len_r_reg[3]_0\(3 downto 0);
\axaddr_offset_r_reg[0]\: unisim.vcomponents.FDRE
port map (
C => aclk,
CE => '1',
D => D(0),
Q => \axaddr_offset_r_reg[3]_0\(0),
R => '0'
);
\axaddr_offset_r_reg[1]\: unisim.vcomponents.FDRE
port map (
C => aclk,
CE => '1',
D => D(1),
Q => \axaddr_offset_r_reg[3]_0\(1),
R => '0'
);
\axaddr_offset_r_reg[2]\: unisim.vcomponents.FDRE
port map (
C => aclk,
CE => '1',
D => D(2),
Q => \axaddr_offset_r_reg[3]_0\(2),
R => '0'
);
\axaddr_offset_r_reg[3]\: unisim.vcomponents.FDRE
port map (
C => aclk,
CE => '1',
D => D(3),
Q => \axaddr_offset_r_reg[3]_0\(3),
R => '0'
);
\axaddr_wrap[0]_i_1__0\: unisim.vcomponents.LUT5
generic map(
INIT => X"B8FFB800"
)
port map (
I0 => \wrap_boundary_axaddr_r_reg_n_0_[0]\,
I1 => \axaddr_wrap[11]_i_2__0_n_0\,
I2 => \axaddr_wrap_reg[3]_i_2__0_n_7\,
I3 => \state_reg[1]_rep\,
I4 => Q(0),
O => \axaddr_wrap[0]_i_1__0_n_0\
);
\axaddr_wrap[10]_i_1__0\: unisim.vcomponents.LUT5
generic map(
INIT => X"B8FFB800"
)
port map (
I0 => \wrap_boundary_axaddr_r_reg_n_0_[10]\,
I1 => \axaddr_wrap[11]_i_2__0_n_0\,
I2 => \axaddr_wrap_reg[11]_i_3__0_n_5\,
I3 => \state_reg[1]_rep\,
I4 => Q(10),
O => \axaddr_wrap[10]_i_1__0_n_0\
);
\axaddr_wrap[11]_i_1__0\: unisim.vcomponents.LUT5
generic map(
INIT => X"B8FFB800"
)
port map (
I0 => \wrap_boundary_axaddr_r_reg_n_0_[11]\,
I1 => \axaddr_wrap[11]_i_2__0_n_0\,
I2 => \axaddr_wrap_reg[11]_i_3__0_n_4\,
I3 => \state_reg[1]_rep\,
I4 => Q(11),
O => \axaddr_wrap[11]_i_1__0_n_0\
);
\axaddr_wrap[11]_i_2__0\: unisim.vcomponents.LUT3
generic map(
INIT => X"41"
)
port map (
I0 => \axaddr_wrap[11]_i_4__0_n_0\,
I1 => \wrap_cnt_r_reg_n_0_[3]\,
I2 => \axlen_cnt_reg_n_0_[3]\,
O => \axaddr_wrap[11]_i_2__0_n_0\
);
\axaddr_wrap[11]_i_4__0\: unisim.vcomponents.LUT6
generic map(
INIT => X"6FF6FFFFFFFF6FF6"
)
port map (
I0 => \wrap_cnt_r_reg_n_0_[0]\,
I1 => \axlen_cnt_reg_n_0_[0]\,
I2 => \axlen_cnt_reg_n_0_[2]\,
I3 => \wrap_cnt_r_reg_n_0_[2]\,
I4 => \axlen_cnt_reg_n_0_[1]\,
I5 => \wrap_cnt_r_reg_n_0_[1]\,
O => \axaddr_wrap[11]_i_4__0_n_0\
);
\axaddr_wrap[1]_i_1__0\: unisim.vcomponents.LUT5
generic map(
INIT => X"B8FFB800"
)
port map (
I0 => \wrap_boundary_axaddr_r_reg_n_0_[1]\,
I1 => \axaddr_wrap[11]_i_2__0_n_0\,
I2 => \axaddr_wrap_reg[3]_i_2__0_n_6\,
I3 => \state_reg[1]_rep\,
I4 => Q(1),
O => \axaddr_wrap[1]_i_1__0_n_0\
);
\axaddr_wrap[2]_i_1__0\: unisim.vcomponents.LUT5
generic map(
INIT => X"B8FFB800"
)
port map (
I0 => \wrap_boundary_axaddr_r_reg_n_0_[2]\,
I1 => \axaddr_wrap[11]_i_2__0_n_0\,
I2 => \axaddr_wrap_reg[3]_i_2__0_n_5\,
I3 => \state_reg[1]_rep\,
I4 => Q(2),
O => \axaddr_wrap[2]_i_1__0_n_0\
);
\axaddr_wrap[3]_i_1__0\: unisim.vcomponents.LUT5
generic map(
INIT => X"B8FFB800"
)
port map (
I0 => \wrap_boundary_axaddr_r_reg_n_0_[3]\,
I1 => \axaddr_wrap[11]_i_2__0_n_0\,
I2 => \axaddr_wrap_reg[3]_i_2__0_n_4\,
I3 => \state_reg[1]_rep\,
I4 => Q(3),
O => \axaddr_wrap[3]_i_1__0_n_0\
);
\axaddr_wrap[3]_i_3\: unisim.vcomponents.LUT3
generic map(
INIT => X"6A"
)
port map (
I0 => \axaddr_wrap_reg_n_0_[3]\,
I1 => Q(12),
I2 => Q(13),
O => \axaddr_wrap[3]_i_3_n_0\
);
\axaddr_wrap[3]_i_4\: unisim.vcomponents.LUT3
generic map(
INIT => X"9A"
)
port map (
I0 => \axaddr_wrap_reg_n_0_[2]\,
I1 => Q(12),
I2 => Q(13),
O => \axaddr_wrap[3]_i_4_n_0\
);
\axaddr_wrap[3]_i_5\: unisim.vcomponents.LUT3
generic map(
INIT => X"9A"
)
port map (
I0 => \axaddr_wrap_reg_n_0_[1]\,
I1 => Q(13),
I2 => Q(12),
O => \axaddr_wrap[3]_i_5_n_0\
);
\axaddr_wrap[3]_i_6\: unisim.vcomponents.LUT3
generic map(
INIT => X"A9"
)
port map (
I0 => \axaddr_wrap_reg_n_0_[0]\,
I1 => Q(12),
I2 => Q(13),
O => \axaddr_wrap[3]_i_6_n_0\
);
\axaddr_wrap[4]_i_1__0\: unisim.vcomponents.LUT5
generic map(
INIT => X"B8FFB800"
)
port map (
I0 => \wrap_boundary_axaddr_r_reg_n_0_[4]\,
I1 => \axaddr_wrap[11]_i_2__0_n_0\,
I2 => \axaddr_wrap_reg[7]_i_2__0_n_7\,
I3 => \state_reg[1]_rep\,
I4 => Q(4),
O => \axaddr_wrap[4]_i_1__0_n_0\
);
\axaddr_wrap[5]_i_1__0\: unisim.vcomponents.LUT5
generic map(
INIT => X"B8FFB800"
)
port map (
I0 => \wrap_boundary_axaddr_r_reg_n_0_[5]\,
I1 => \axaddr_wrap[11]_i_2__0_n_0\,
I2 => \axaddr_wrap_reg[7]_i_2__0_n_6\,
I3 => \state_reg[1]_rep\,
I4 => Q(5),
O => \axaddr_wrap[5]_i_1__0_n_0\
);
\axaddr_wrap[6]_i_1__0\: unisim.vcomponents.LUT5
generic map(
INIT => X"B8FFB800"
)
port map (
I0 => \wrap_boundary_axaddr_r_reg_n_0_[6]\,
I1 => \axaddr_wrap[11]_i_2__0_n_0\,
I2 => \axaddr_wrap_reg[7]_i_2__0_n_5\,
I3 => \state_reg[1]_rep\,
I4 => Q(6),
O => \axaddr_wrap[6]_i_1__0_n_0\
);
\axaddr_wrap[7]_i_1__0\: unisim.vcomponents.LUT5
generic map(
INIT => X"B8FFB800"
)
port map (
I0 => \wrap_boundary_axaddr_r_reg_n_0_[7]\,
I1 => \axaddr_wrap[11]_i_2__0_n_0\,
I2 => \axaddr_wrap_reg[7]_i_2__0_n_4\,
I3 => \state_reg[1]_rep\,
I4 => Q(7),
O => \axaddr_wrap[7]_i_1__0_n_0\
);
\axaddr_wrap[8]_i_1__0\: unisim.vcomponents.LUT5
generic map(
INIT => X"B8FFB800"
)
port map (
I0 => \wrap_boundary_axaddr_r_reg_n_0_[8]\,
I1 => \axaddr_wrap[11]_i_2__0_n_0\,
I2 => \axaddr_wrap_reg[11]_i_3__0_n_7\,
I3 => \state_reg[1]_rep\,
I4 => Q(8),
O => \axaddr_wrap[8]_i_1__0_n_0\
);
\axaddr_wrap[9]_i_1__0\: unisim.vcomponents.LUT5
generic map(
INIT => X"B8FFB800"
)
port map (
I0 => \wrap_boundary_axaddr_r_reg_n_0_[9]\,
I1 => \axaddr_wrap[11]_i_2__0_n_0\,
I2 => \axaddr_wrap_reg[11]_i_3__0_n_6\,
I3 => \state_reg[1]_rep\,
I4 => Q(9),
O => \axaddr_wrap[9]_i_1__0_n_0\
);
\axaddr_wrap_reg[0]\: unisim.vcomponents.FDRE
port map (
C => aclk,
CE => m_valid_i_reg(0),
D => \axaddr_wrap[0]_i_1__0_n_0\,
Q => \axaddr_wrap_reg_n_0_[0]\,
R => '0'
);
\axaddr_wrap_reg[10]\: unisim.vcomponents.FDRE
port map (
C => aclk,
CE => m_valid_i_reg(0),
D => \axaddr_wrap[10]_i_1__0_n_0\,
Q => \axaddr_wrap_reg_n_0_[10]\,
R => '0'
);
\axaddr_wrap_reg[11]\: unisim.vcomponents.FDRE
port map (
C => aclk,
CE => m_valid_i_reg(0),
D => \axaddr_wrap[11]_i_1__0_n_0\,
Q => \axaddr_wrap_reg_n_0_[11]\,
R => '0'
);
\axaddr_wrap_reg[11]_i_3__0\: unisim.vcomponents.CARRY4
port map (
CI => \axaddr_wrap_reg[7]_i_2__0_n_0\,
CO(3) => \NLW_axaddr_wrap_reg[11]_i_3__0_CO_UNCONNECTED\(3),
CO(2) => \axaddr_wrap_reg[11]_i_3__0_n_1\,
CO(1) => \axaddr_wrap_reg[11]_i_3__0_n_2\,
CO(0) => \axaddr_wrap_reg[11]_i_3__0_n_3\,
CYINIT => '0',
DI(3 downto 0) => B"0000",
O(3) => \axaddr_wrap_reg[11]_i_3__0_n_4\,
O(2) => \axaddr_wrap_reg[11]_i_3__0_n_5\,
O(1) => \axaddr_wrap_reg[11]_i_3__0_n_6\,
O(0) => \axaddr_wrap_reg[11]_i_3__0_n_7\,
S(3) => \axaddr_wrap_reg_n_0_[11]\,
S(2) => \axaddr_wrap_reg_n_0_[10]\,
S(1) => \axaddr_wrap_reg_n_0_[9]\,
S(0) => \axaddr_wrap_reg_n_0_[8]\
);
\axaddr_wrap_reg[1]\: unisim.vcomponents.FDRE
port map (
C => aclk,
CE => m_valid_i_reg(0),
D => \axaddr_wrap[1]_i_1__0_n_0\,
Q => \axaddr_wrap_reg_n_0_[1]\,
R => '0'
);
\axaddr_wrap_reg[2]\: unisim.vcomponents.FDRE
port map (
C => aclk,
CE => m_valid_i_reg(0),
D => \axaddr_wrap[2]_i_1__0_n_0\,
Q => \axaddr_wrap_reg_n_0_[2]\,
R => '0'
);
\axaddr_wrap_reg[3]\: unisim.vcomponents.FDRE
port map (
C => aclk,
CE => m_valid_i_reg(0),
D => \axaddr_wrap[3]_i_1__0_n_0\,
Q => \axaddr_wrap_reg_n_0_[3]\,
R => '0'
);
\axaddr_wrap_reg[3]_i_2__0\: unisim.vcomponents.CARRY4
port map (
CI => '0',
CO(3) => \axaddr_wrap_reg[3]_i_2__0_n_0\,
CO(2) => \axaddr_wrap_reg[3]_i_2__0_n_1\,
CO(1) => \axaddr_wrap_reg[3]_i_2__0_n_2\,
CO(0) => \axaddr_wrap_reg[3]_i_2__0_n_3\,
CYINIT => '0',
DI(3) => \axaddr_wrap_reg_n_0_[3]\,
DI(2) => \axaddr_wrap_reg_n_0_[2]\,
DI(1) => \axaddr_wrap_reg_n_0_[1]\,
DI(0) => \axaddr_wrap_reg_n_0_[0]\,
O(3) => \axaddr_wrap_reg[3]_i_2__0_n_4\,
O(2) => \axaddr_wrap_reg[3]_i_2__0_n_5\,
O(1) => \axaddr_wrap_reg[3]_i_2__0_n_6\,
O(0) => \axaddr_wrap_reg[3]_i_2__0_n_7\,
S(3) => \axaddr_wrap[3]_i_3_n_0\,
S(2) => \axaddr_wrap[3]_i_4_n_0\,
S(1) => \axaddr_wrap[3]_i_5_n_0\,
S(0) => \axaddr_wrap[3]_i_6_n_0\
);
\axaddr_wrap_reg[4]\: unisim.vcomponents.FDRE
port map (
C => aclk,
CE => m_valid_i_reg(0),
D => \axaddr_wrap[4]_i_1__0_n_0\,
Q => \axaddr_wrap_reg_n_0_[4]\,
R => '0'
);
\axaddr_wrap_reg[5]\: unisim.vcomponents.FDRE
port map (
C => aclk,
CE => m_valid_i_reg(0),
D => \axaddr_wrap[5]_i_1__0_n_0\,
Q => \axaddr_wrap_reg_n_0_[5]\,
R => '0'
);
\axaddr_wrap_reg[6]\: unisim.vcomponents.FDRE
port map (
C => aclk,
CE => m_valid_i_reg(0),
D => \axaddr_wrap[6]_i_1__0_n_0\,
Q => \axaddr_wrap_reg_n_0_[6]\,
R => '0'
);
\axaddr_wrap_reg[7]\: unisim.vcomponents.FDRE
port map (
C => aclk,
CE => m_valid_i_reg(0),
D => \axaddr_wrap[7]_i_1__0_n_0\,
Q => \axaddr_wrap_reg_n_0_[7]\,
R => '0'
);
\axaddr_wrap_reg[7]_i_2__0\: unisim.vcomponents.CARRY4
port map (
CI => \axaddr_wrap_reg[3]_i_2__0_n_0\,
CO(3) => \axaddr_wrap_reg[7]_i_2__0_n_0\,
CO(2) => \axaddr_wrap_reg[7]_i_2__0_n_1\,
CO(1) => \axaddr_wrap_reg[7]_i_2__0_n_2\,
CO(0) => \axaddr_wrap_reg[7]_i_2__0_n_3\,
CYINIT => '0',
DI(3 downto 0) => B"0000",
O(3) => \axaddr_wrap_reg[7]_i_2__0_n_4\,
O(2) => \axaddr_wrap_reg[7]_i_2__0_n_5\,
O(1) => \axaddr_wrap_reg[7]_i_2__0_n_6\,
O(0) => \axaddr_wrap_reg[7]_i_2__0_n_7\,
S(3) => \axaddr_wrap_reg_n_0_[7]\,
S(2) => \axaddr_wrap_reg_n_0_[6]\,
S(1) => \axaddr_wrap_reg_n_0_[5]\,
S(0) => \axaddr_wrap_reg_n_0_[4]\
);
\axaddr_wrap_reg[8]\: unisim.vcomponents.FDRE
port map (
C => aclk,
CE => m_valid_i_reg(0),
D => \axaddr_wrap[8]_i_1__0_n_0\,
Q => \axaddr_wrap_reg_n_0_[8]\,
R => '0'
);
\axaddr_wrap_reg[9]\: unisim.vcomponents.FDRE
port map (
C => aclk,
CE => m_valid_i_reg(0),
D => \axaddr_wrap[9]_i_1__0_n_0\,
Q => \axaddr_wrap_reg_n_0_[9]\,
R => '0'
);
\axlen_cnt[0]_i_1__1\: unisim.vcomponents.LUT6
generic map(
INIT => X"A3A3A3A3A3A3A3A0"
)
port map (
I0 => Q(15),
I1 => \axlen_cnt_reg_n_0_[0]\,
I2 => E(0),
I3 => \axlen_cnt_reg_n_0_[3]\,
I4 => \axlen_cnt_reg_n_0_[2]\,
I5 => \axlen_cnt_reg_n_0_[1]\,
O => \axlen_cnt[0]_i_1__1_n_0\
);
\axlen_cnt[1]_i_1__2\: unisim.vcomponents.LUT6
generic map(
INIT => X"AAC3AAC3AAC3AAC0"
)
port map (
I0 => Q(16),
I1 => \axlen_cnt_reg_n_0_[1]\,
I2 => \axlen_cnt_reg_n_0_[0]\,
I3 => E(0),
I4 => \axlen_cnt_reg_n_0_[3]\,
I5 => \axlen_cnt_reg_n_0_[2]\,
O => \axlen_cnt[1]_i_1__2_n_0\
);
\axlen_cnt[2]_i_1__2\: unisim.vcomponents.LUT6
generic map(
INIT => X"FFFFA9A80000A9A8"
)
port map (
I0 => \axlen_cnt_reg_n_0_[2]\,
I1 => \axlen_cnt_reg_n_0_[0]\,
I2 => \axlen_cnt_reg_n_0_[1]\,
I3 => \axlen_cnt_reg_n_0_[3]\,
I4 => E(0),
I5 => Q(17),
O => \axlen_cnt[2]_i_1__2_n_0\
);
\axlen_cnt[3]_i_1__1\: unisim.vcomponents.LUT6
generic map(
INIT => X"AAAAAAAACCCCCCC0"
)
port map (
I0 => Q(18),
I1 => \axlen_cnt_reg_n_0_[3]\,
I2 => \axlen_cnt_reg_n_0_[2]\,
I3 => \axlen_cnt_reg_n_0_[1]\,
I4 => \axlen_cnt_reg_n_0_[0]\,
I5 => E(0),
O => \axlen_cnt[3]_i_1__1_n_0\
);
\axlen_cnt_reg[0]\: unisim.vcomponents.FDRE
port map (
C => aclk,
CE => m_valid_i_reg(0),
D => \axlen_cnt[0]_i_1__1_n_0\,
Q => \axlen_cnt_reg_n_0_[0]\,
R => '0'
);
\axlen_cnt_reg[1]\: unisim.vcomponents.FDRE
port map (
C => aclk,
CE => m_valid_i_reg(0),
D => \axlen_cnt[1]_i_1__2_n_0\,
Q => \axlen_cnt_reg_n_0_[1]\,
R => '0'
);
\axlen_cnt_reg[2]\: unisim.vcomponents.FDRE
port map (
C => aclk,
CE => m_valid_i_reg(0),
D => \axlen_cnt[2]_i_1__2_n_0\,
Q => \axlen_cnt_reg_n_0_[2]\,
R => '0'
);
\axlen_cnt_reg[3]\: unisim.vcomponents.FDRE
port map (
C => aclk,
CE => m_valid_i_reg(0),
D => \axlen_cnt[3]_i_1__1_n_0\,
Q => \axlen_cnt_reg_n_0_[3]\,
R => '0'
);
\m_axi_araddr[0]_INST_0\: unisim.vcomponents.LUT6
generic map(
INIT => X"EF40EF4FEF40E040"
)
port map (
I0 => \^sel_first_reg_0\,
I1 => \axaddr_wrap_reg_n_0_[0]\,
I2 => Q(14),
I3 => Q(0),
I4 => sel_first_reg_2,
I5 => \axaddr_incr_reg[11]\(0),
O => m_axi_araddr(0)
);
\m_axi_araddr[10]_INST_0\: unisim.vcomponents.LUT6
generic map(
INIT => X"EF40EF4FEF40E040"
)
port map (
I0 => \^sel_first_reg_0\,
I1 => \axaddr_wrap_reg_n_0_[10]\,
I2 => Q(14),
I3 => Q(10),
I4 => sel_first_reg_2,
I5 => \axaddr_incr_reg[11]\(6),
O => m_axi_araddr(10)
);
\m_axi_araddr[11]_INST_0\: unisim.vcomponents.LUT6
generic map(
INIT => X"EF40EF4FEF40E040"
)
port map (
I0 => \^sel_first_reg_0\,
I1 => \axaddr_wrap_reg_n_0_[11]\,
I2 => Q(14),
I3 => Q(11),
I4 => sel_first_reg_2,
I5 => \axaddr_incr_reg[11]\(7),
O => m_axi_araddr(11)
);
\m_axi_araddr[1]_INST_0\: unisim.vcomponents.LUT5
generic map(
INIT => X"B8FFB800"
)
port map (
I0 => Q(1),
I1 => \^sel_first_reg_0\,
I2 => \axaddr_wrap_reg_n_0_[1]\,
I3 => Q(14),
I4 => sel_first_reg_6,
O => m_axi_araddr(1)
);
\m_axi_araddr[2]_INST_0\: unisim.vcomponents.LUT5
generic map(
INIT => X"B8FFB800"
)
port map (
I0 => Q(2),
I1 => \^sel_first_reg_0\,
I2 => \axaddr_wrap_reg_n_0_[2]\,
I3 => Q(14),
I4 => sel_first_reg_5,
O => m_axi_araddr(2)
);
\m_axi_araddr[3]_INST_0\: unisim.vcomponents.LUT5
generic map(
INIT => X"B8FFB800"
)
port map (
I0 => Q(3),
I1 => \^sel_first_reg_0\,
I2 => \axaddr_wrap_reg_n_0_[3]\,
I3 => Q(14),
I4 => sel_first_reg_4,
O => m_axi_araddr(3)
);
\m_axi_araddr[4]_INST_0\: unisim.vcomponents.LUT6
generic map(
INIT => X"EF40EF4FEF40E040"
)
port map (
I0 => \^sel_first_reg_0\,
I1 => \axaddr_wrap_reg_n_0_[4]\,
I2 => Q(14),
I3 => Q(4),
I4 => sel_first_reg_2,
I5 => \axaddr_incr_reg[11]\(1),
O => m_axi_araddr(4)
);
\m_axi_araddr[5]_INST_0\: unisim.vcomponents.LUT5
generic map(
INIT => X"B8FFB800"
)
port map (
I0 => Q(5),
I1 => \^sel_first_reg_0\,
I2 => \axaddr_wrap_reg_n_0_[5]\,
I3 => Q(14),
I4 => sel_first_reg_3,
O => m_axi_araddr(5)
);
\m_axi_araddr[6]_INST_0\: unisim.vcomponents.LUT6
generic map(
INIT => X"EF40EF4FEF40E040"
)
port map (
I0 => \^sel_first_reg_0\,
I1 => \axaddr_wrap_reg_n_0_[6]\,
I2 => Q(14),
I3 => Q(6),
I4 => sel_first_reg_2,
I5 => \axaddr_incr_reg[11]\(2),
O => m_axi_araddr(6)
);
\m_axi_araddr[7]_INST_0\: unisim.vcomponents.LUT6
generic map(
INIT => X"EF40EF4FEF40E040"
)
port map (
I0 => \^sel_first_reg_0\,
I1 => \axaddr_wrap_reg_n_0_[7]\,
I2 => Q(14),
I3 => Q(7),
I4 => sel_first_reg_2,
I5 => \axaddr_incr_reg[11]\(3),
O => m_axi_araddr(7)
);
\m_axi_araddr[8]_INST_0\: unisim.vcomponents.LUT6
generic map(
INIT => X"EF40EF4FEF40E040"
)
port map (
I0 => \^sel_first_reg_0\,
I1 => \axaddr_wrap_reg_n_0_[8]\,
I2 => Q(14),
I3 => Q(8),
I4 => sel_first_reg_2,
I5 => \axaddr_incr_reg[11]\(4),
O => m_axi_araddr(8)
);
\m_axi_araddr[9]_INST_0\: unisim.vcomponents.LUT6
generic map(
INIT => X"EF40EF4FEF40E040"
)
port map (
I0 => \^sel_first_reg_0\,
I1 => \axaddr_wrap_reg_n_0_[9]\,
I2 => Q(14),
I3 => Q(9),
I4 => sel_first_reg_2,
I5 => \axaddr_incr_reg[11]\(5),
O => m_axi_araddr(9)
);
\next_pending_r_i_1__1\: unisim.vcomponents.LUT5
generic map(
INIT => X"FEAAFEAE"
)
port map (
I0 => \m_payload_i_reg[47]\,
I1 => next_pending_r_reg_n_0,
I2 => \state_reg[1]_rep\,
I3 => \next_pending_r_i_2__2_n_0\,
I4 => E(0),
O => wrap_next_pending
);
\next_pending_r_i_2__2\: unisim.vcomponents.LUT6
generic map(
INIT => X"FBFBFBFBFBFBFB00"
)
port map (
I0 => \state_reg[1]\(0),
I1 => si_rs_arvalid,
I2 => \state_reg[1]\(1),
I3 => \axlen_cnt_reg_n_0_[3]\,
I4 => \axlen_cnt_reg_n_0_[2]\,
I5 => \axlen_cnt_reg_n_0_[1]\,
O => \next_pending_r_i_2__2_n_0\
);
next_pending_r_reg: unisim.vcomponents.FDRE
port map (
C => aclk,
CE => '1',
D => wrap_next_pending,
Q => next_pending_r_reg_n_0,
R => '0'
);
\s_axburst_eq0_i_1__0\: unisim.vcomponents.LUT4
generic map(
INIT => X"FB08"
)
port map (
I0 => wrap_next_pending,
I1 => Q(14),
I2 => sel_first_i,
I3 => incr_next_pending,
O => s_axburst_eq0_reg
);
\s_axburst_eq1_i_1__0\: unisim.vcomponents.LUT4
generic map(
INIT => X"ABA8"
)
port map (
I0 => wrap_next_pending,
I1 => Q(14),
I2 => sel_first_i,
I3 => incr_next_pending,
O => s_axburst_eq1_reg
);
sel_first_reg: unisim.vcomponents.FDRE
port map (
C => aclk,
CE => '1',
D => sel_first_reg_1,
Q => \^sel_first_reg_0\,
R => '0'
);
\wrap_boundary_axaddr_r_reg[0]\: unisim.vcomponents.FDRE
port map (
C => aclk,
CE => E(0),
D => \m_payload_i_reg[6]\(0),
Q => \wrap_boundary_axaddr_r_reg_n_0_[0]\,
R => '0'
);
\wrap_boundary_axaddr_r_reg[10]\: unisim.vcomponents.FDRE
port map (
C => aclk,
CE => E(0),
D => Q(10),
Q => \wrap_boundary_axaddr_r_reg_n_0_[10]\,
R => '0'
);
\wrap_boundary_axaddr_r_reg[11]\: unisim.vcomponents.FDRE
port map (
C => aclk,
CE => E(0),
D => Q(11),
Q => \wrap_boundary_axaddr_r_reg_n_0_[11]\,
R => '0'
);
\wrap_boundary_axaddr_r_reg[1]\: unisim.vcomponents.FDRE
port map (
C => aclk,
CE => E(0),
D => \m_payload_i_reg[6]\(1),
Q => \wrap_boundary_axaddr_r_reg_n_0_[1]\,
R => '0'
);
\wrap_boundary_axaddr_r_reg[2]\: unisim.vcomponents.FDRE
port map (
C => aclk,
CE => E(0),
D => \m_payload_i_reg[6]\(2),
Q => \wrap_boundary_axaddr_r_reg_n_0_[2]\,
R => '0'
);
\wrap_boundary_axaddr_r_reg[3]\: unisim.vcomponents.FDRE
port map (
C => aclk,
CE => E(0),
D => \m_payload_i_reg[6]\(3),
Q => \wrap_boundary_axaddr_r_reg_n_0_[3]\,
R => '0'
);
\wrap_boundary_axaddr_r_reg[4]\: unisim.vcomponents.FDRE
port map (
C => aclk,
CE => E(0),
D => \m_payload_i_reg[6]\(4),
Q => \wrap_boundary_axaddr_r_reg_n_0_[4]\,
R => '0'
);
\wrap_boundary_axaddr_r_reg[5]\: unisim.vcomponents.FDRE
port map (
C => aclk,
CE => E(0),
D => \m_payload_i_reg[6]\(5),
Q => \wrap_boundary_axaddr_r_reg_n_0_[5]\,
R => '0'
);
\wrap_boundary_axaddr_r_reg[6]\: unisim.vcomponents.FDRE
port map (
C => aclk,
CE => E(0),
D => \m_payload_i_reg[6]\(6),
Q => \wrap_boundary_axaddr_r_reg_n_0_[6]\,
R => '0'
);
\wrap_boundary_axaddr_r_reg[7]\: unisim.vcomponents.FDRE
port map (
C => aclk,
CE => E(0),
D => Q(7),
Q => \wrap_boundary_axaddr_r_reg_n_0_[7]\,
R => '0'
);
\wrap_boundary_axaddr_r_reg[8]\: unisim.vcomponents.FDRE
port map (
C => aclk,
CE => E(0),
D => Q(8),
Q => \wrap_boundary_axaddr_r_reg_n_0_[8]\,
R => '0'
);
\wrap_boundary_axaddr_r_reg[9]\: unisim.vcomponents.FDRE
port map (
C => aclk,
CE => E(0),
D => Q(9),
Q => \wrap_boundary_axaddr_r_reg_n_0_[9]\,
R => '0'
);
\wrap_cnt_r[1]_i_1__0\: unisim.vcomponents.LUT5
generic map(
INIT => X"3D310E02"
)
port map (
I0 => \^wrap_second_len_r_reg[3]_0\(0),
I1 => E(0),
I2 => \axaddr_offset_r_reg[3]_2\,
I3 => D(1),
I4 => \^wrap_second_len_r_reg[3]_0\(1),
O => \wrap_cnt_r[1]_i_1__0_n_0\
);
\wrap_cnt_r[3]_i_2__0\: unisim.vcomponents.LUT6
generic map(
INIT => X"000CAAA8000C0000"
)
port map (
I0 => \^wrap_second_len_r_reg[3]_0\(1),
I1 => \axaddr_offset_r_reg[3]_1\,
I2 => D(1),
I3 => D(0),
I4 => E(0),
I5 => \^wrap_second_len_r_reg[3]_0\(0),
O => \wrap_cnt_r_reg[3]_0\
);
\wrap_cnt_r_reg[0]\: unisim.vcomponents.FDRE
port map (
C => aclk,
CE => '1',
D => \wrap_second_len_r_reg[3]_2\(0),
Q => \wrap_cnt_r_reg_n_0_[0]\,
R => '0'
);
\wrap_cnt_r_reg[1]\: unisim.vcomponents.FDRE
port map (
C => aclk,
CE => '1',
D => \wrap_cnt_r[1]_i_1__0_n_0\,
Q => \wrap_cnt_r_reg_n_0_[1]\,
R => '0'
);
\wrap_cnt_r_reg[2]\: unisim.vcomponents.FDRE
port map (
C => aclk,
CE => '1',
D => \wrap_second_len_r_reg[3]_2\(1),
Q => \wrap_cnt_r_reg_n_0_[2]\,
R => '0'
);
\wrap_cnt_r_reg[3]\: unisim.vcomponents.FDRE
port map (
C => aclk,
CE => '1',
D => \wrap_second_len_r_reg[3]_2\(2),
Q => \wrap_cnt_r_reg_n_0_[3]\,
R => '0'
);
\wrap_second_len_r_reg[0]\: unisim.vcomponents.FDRE
port map (
C => aclk,
CE => '1',
D => \wrap_second_len_r_reg[3]_1\(0),
Q => \^wrap_second_len_r_reg[3]_0\(0),
R => '0'
);
\wrap_second_len_r_reg[1]\: unisim.vcomponents.FDRE
port map (
C => aclk,
CE => '1',
D => \wrap_second_len_r_reg[3]_1\(1),
Q => \^wrap_second_len_r_reg[3]_0\(1),
R => '0'
);
\wrap_second_len_r_reg[2]\: unisim.vcomponents.FDRE
port map (
C => aclk,
CE => '1',
D => \wrap_second_len_r_reg[3]_1\(2),
Q => \^wrap_second_len_r_reg[3]_0\(2),
R => '0'
);
\wrap_second_len_r_reg[3]\: unisim.vcomponents.FDRE
port map (
C => aclk,
CE => '1',
D => \wrap_second_len_r_reg[3]_1\(3),
Q => \^wrap_second_len_r_reg[3]_0\(3),
R => '0'
);
end STRUCTURE;
library IEEE;
use IEEE.STD_LOGIC_1164.ALL;
library UNISIM;
use UNISIM.VCOMPONENTS.ALL;
entity decalper_eb_ot_sdeen_pot_pi_dehcac_xnilix_axi_register_slice_v2_1_17_axic_register_slice is
port (
s_axi_arready : out STD_LOGIC;
\axaddr_offset_r_reg[3]\ : out STD_LOGIC;
m_valid_i_reg_0 : out STD_LOGIC;
\axlen_cnt_reg[3]\ : out STD_LOGIC;
Q : out STD_LOGIC_VECTOR ( 54 downto 0 );
\axaddr_incr_reg[3]\ : out STD_LOGIC_VECTOR ( 3 downto 0 );
\axaddr_incr_reg[7]\ : out STD_LOGIC_VECTOR ( 3 downto 0 );
O : out STD_LOGIC_VECTOR ( 3 downto 0 );
\wrap_cnt_r_reg[3]\ : out STD_LOGIC_VECTOR ( 1 downto 0 );
\wrap_second_len_r_reg[3]\ : out STD_LOGIC_VECTOR ( 2 downto 0 );
\wrap_cnt_r_reg[2]\ : out STD_LOGIC;
\axaddr_offset_r_reg[0]\ : out STD_LOGIC;
axaddr_offset_0 : out STD_LOGIC_VECTOR ( 1 downto 0 );
\wrap_cnt_r_reg[3]_0\ : out STD_LOGIC;
\axaddr_offset_r_reg[2]\ : out STD_LOGIC;
next_pending_r_reg : out STD_LOGIC;
\wrap_boundary_axaddr_r_reg[6]\ : out STD_LOGIC_VECTOR ( 6 downto 0 );
\aresetn_d_reg[0]\ : in STD_LOGIC;
s_ready_i0 : in STD_LOGIC;
aclk : in STD_LOGIC;
m_valid_i0 : in STD_LOGIC;
\aresetn_d_reg[0]_0\ : in STD_LOGIC;
\state_reg[1]\ : in STD_LOGIC_VECTOR ( 1 downto 0 );
\m_payload_i_reg[3]_0\ : in STD_LOGIC_VECTOR ( 3 downto 0 );
\wrap_second_len_r_reg[3]_0\ : in STD_LOGIC_VECTOR ( 3 downto 0 );
\state_reg[1]_rep\ : in STD_LOGIC;
\wrap_second_len_r_reg[1]\ : in STD_LOGIC;
\axaddr_offset_r_reg[2]_0\ : in STD_LOGIC_VECTOR ( 0 to 0 );
\axaddr_offset_r_reg[3]_0\ : in STD_LOGIC_VECTOR ( 2 downto 0 );
\axaddr_offset_r_reg[3]_1\ : in STD_LOGIC;
\axaddr_offset_r_reg[2]_1\ : in STD_LOGIC;
\state_reg[0]_rep\ : in STD_LOGIC;
\state_reg[1]_rep_0\ : in STD_LOGIC;
s_axi_arid : in STD_LOGIC_VECTOR ( 11 downto 0 );
s_axi_arlen : in STD_LOGIC_VECTOR ( 3 downto 0 );
s_axi_arburst : in STD_LOGIC_VECTOR ( 1 downto 0 );
s_axi_arsize : in STD_LOGIC_VECTOR ( 1 downto 0 );
s_axi_arprot : in STD_LOGIC_VECTOR ( 2 downto 0 );
s_axi_araddr : in STD_LOGIC_VECTOR ( 31 downto 0 );
m_valid_i_reg_1 : in STD_LOGIC_VECTOR ( 0 to 0 )
);
end decalper_eb_ot_sdeen_pot_pi_dehcac_xnilix_axi_register_slice_v2_1_17_axic_register_slice;
architecture STRUCTURE of decalper_eb_ot_sdeen_pot_pi_dehcac_xnilix_axi_register_slice_v2_1_17_axic_register_slice is
signal \^q\ : STD_LOGIC_VECTOR ( 54 downto 0 );
signal \axaddr_incr[3]_i_4__0_n_0\ : STD_LOGIC;
signal \axaddr_incr[3]_i_5__0_n_0\ : STD_LOGIC;
signal \axaddr_incr[3]_i_6__0_n_0\ : STD_LOGIC;
signal \axaddr_incr_reg[11]_i_3__0_n_1\ : STD_LOGIC;
signal \axaddr_incr_reg[11]_i_3__0_n_2\ : STD_LOGIC;
signal \axaddr_incr_reg[11]_i_3__0_n_3\ : STD_LOGIC;
signal \axaddr_incr_reg[3]_i_2__0_n_0\ : STD_LOGIC;
signal \axaddr_incr_reg[3]_i_2__0_n_1\ : STD_LOGIC;
signal \axaddr_incr_reg[3]_i_2__0_n_2\ : STD_LOGIC;
signal \axaddr_incr_reg[3]_i_2__0_n_3\ : STD_LOGIC;
signal \axaddr_incr_reg[7]_i_2__0_n_0\ : STD_LOGIC;
signal \axaddr_incr_reg[7]_i_2__0_n_1\ : STD_LOGIC;
signal \axaddr_incr_reg[7]_i_2__0_n_2\ : STD_LOGIC;
signal \axaddr_incr_reg[7]_i_2__0_n_3\ : STD_LOGIC;
signal \^axaddr_offset_0\ : STD_LOGIC_VECTOR ( 1 downto 0 );
signal \axaddr_offset_r[0]_i_2__0_n_0\ : STD_LOGIC;
signal \axaddr_offset_r[1]_i_2__0_n_0\ : STD_LOGIC;
signal \axaddr_offset_r[3]_i_2__0_n_0\ : STD_LOGIC;
signal \^axaddr_offset_r_reg[0]\ : STD_LOGIC;
signal \^axaddr_offset_r_reg[2]\ : STD_LOGIC;
signal \^axaddr_offset_r_reg[3]\ : STD_LOGIC;
signal \^axlen_cnt_reg[3]\ : STD_LOGIC;
signal \m_payload_i[0]_i_1__0_n_0\ : STD_LOGIC;
signal \m_payload_i[10]_i_1__0_n_0\ : STD_LOGIC;
signal \m_payload_i[11]_i_1__0_n_0\ : STD_LOGIC;
signal \m_payload_i[12]_i_1__0_n_0\ : STD_LOGIC;
signal \m_payload_i[13]_i_1__1_n_0\ : STD_LOGIC;
signal \m_payload_i[14]_i_1__0_n_0\ : STD_LOGIC;
signal \m_payload_i[15]_i_1__0_n_0\ : STD_LOGIC;
signal \m_payload_i[16]_i_1__0_n_0\ : STD_LOGIC;
signal \m_payload_i[17]_i_1__0_n_0\ : STD_LOGIC;
signal \m_payload_i[18]_i_1__0_n_0\ : STD_LOGIC;
signal \m_payload_i[19]_i_1__0_n_0\ : STD_LOGIC;
signal \m_payload_i[1]_i_1__0_n_0\ : STD_LOGIC;
signal \m_payload_i[20]_i_1__0_n_0\ : STD_LOGIC;
signal \m_payload_i[21]_i_1__0_n_0\ : STD_LOGIC;
signal \m_payload_i[22]_i_1__0_n_0\ : STD_LOGIC;
signal \m_payload_i[23]_i_1__0_n_0\ : STD_LOGIC;
signal \m_payload_i[24]_i_1__0_n_0\ : STD_LOGIC;
signal \m_payload_i[25]_i_1__0_n_0\ : STD_LOGIC;
signal \m_payload_i[26]_i_1__0_n_0\ : STD_LOGIC;
signal \m_payload_i[27]_i_1__0_n_0\ : STD_LOGIC;
signal \m_payload_i[28]_i_1__0_n_0\ : STD_LOGIC;
signal \m_payload_i[29]_i_1__0_n_0\ : STD_LOGIC;
signal \m_payload_i[2]_i_1__0_n_0\ : STD_LOGIC;
signal \m_payload_i[30]_i_1__0_n_0\ : STD_LOGIC;
signal \m_payload_i[31]_i_2__0_n_0\ : STD_LOGIC;
signal \m_payload_i[32]_i_1__0_n_0\ : STD_LOGIC;
signal \m_payload_i[33]_i_1__0_n_0\ : STD_LOGIC;
signal \m_payload_i[34]_i_1__0_n_0\ : STD_LOGIC;
signal \m_payload_i[35]_i_1__0_n_0\ : STD_LOGIC;
signal \m_payload_i[36]_i_1__0_n_0\ : STD_LOGIC;
signal \m_payload_i[38]_i_1__0_n_0\ : STD_LOGIC;
signal \m_payload_i[39]_i_1__0_n_0\ : STD_LOGIC;
signal \m_payload_i[3]_i_1__0_n_0\ : STD_LOGIC;
signal \m_payload_i[44]_i_1__0_n_0\ : STD_LOGIC;
signal \m_payload_i[45]_i_1__0_n_0\ : STD_LOGIC;
signal \m_payload_i[46]_i_1__1_n_0\ : STD_LOGIC;
signal \m_payload_i[47]_i_1__0_n_0\ : STD_LOGIC;
signal \m_payload_i[4]_i_1__0_n_0\ : STD_LOGIC;
signal \m_payload_i[50]_i_1__0_n_0\ : STD_LOGIC;
signal \m_payload_i[51]_i_1__0_n_0\ : STD_LOGIC;
signal \m_payload_i[52]_i_1__0_n_0\ : STD_LOGIC;
signal \m_payload_i[53]_i_1__0_n_0\ : STD_LOGIC;
signal \m_payload_i[54]_i_1__0_n_0\ : STD_LOGIC;
signal \m_payload_i[55]_i_1__0_n_0\ : STD_LOGIC;
signal \m_payload_i[56]_i_1__0_n_0\ : STD_LOGIC;
signal \m_payload_i[57]_i_1__0_n_0\ : STD_LOGIC;
signal \m_payload_i[58]_i_1__0_n_0\ : STD_LOGIC;
signal \m_payload_i[59]_i_1__0_n_0\ : STD_LOGIC;
signal \m_payload_i[5]_i_1__0_n_0\ : STD_LOGIC;
signal \m_payload_i[60]_i_1__0_n_0\ : STD_LOGIC;
signal \m_payload_i[61]_i_1__0_n_0\ : STD_LOGIC;
signal \m_payload_i[6]_i_1__0_n_0\ : STD_LOGIC;
signal \m_payload_i[7]_i_1__0_n_0\ : STD_LOGIC;
signal \m_payload_i[8]_i_1__0_n_0\ : STD_LOGIC;
signal \m_payload_i[9]_i_1__0_n_0\ : STD_LOGIC;
signal \^m_valid_i_reg_0\ : STD_LOGIC;
signal \^s_axi_arready\ : STD_LOGIC;
signal \skid_buffer_reg_n_0_[0]\ : STD_LOGIC;
signal \skid_buffer_reg_n_0_[10]\ : STD_LOGIC;
signal \skid_buffer_reg_n_0_[11]\ : STD_LOGIC;
signal \skid_buffer_reg_n_0_[12]\ : STD_LOGIC;
signal \skid_buffer_reg_n_0_[13]\ : STD_LOGIC;
signal \skid_buffer_reg_n_0_[14]\ : STD_LOGIC;
signal \skid_buffer_reg_n_0_[15]\ : STD_LOGIC;
signal \skid_buffer_reg_n_0_[16]\ : STD_LOGIC;
signal \skid_buffer_reg_n_0_[17]\ : STD_LOGIC;
signal \skid_buffer_reg_n_0_[18]\ : STD_LOGIC;
signal \skid_buffer_reg_n_0_[19]\ : STD_LOGIC;
signal \skid_buffer_reg_n_0_[1]\ : STD_LOGIC;
signal \skid_buffer_reg_n_0_[20]\ : STD_LOGIC;
signal \skid_buffer_reg_n_0_[21]\ : STD_LOGIC;
signal \skid_buffer_reg_n_0_[22]\ : STD_LOGIC;
signal \skid_buffer_reg_n_0_[23]\ : STD_LOGIC;
signal \skid_buffer_reg_n_0_[24]\ : STD_LOGIC;
signal \skid_buffer_reg_n_0_[25]\ : STD_LOGIC;
signal \skid_buffer_reg_n_0_[26]\ : STD_LOGIC;
signal \skid_buffer_reg_n_0_[27]\ : STD_LOGIC;
signal \skid_buffer_reg_n_0_[28]\ : STD_LOGIC;
signal \skid_buffer_reg_n_0_[29]\ : STD_LOGIC;
signal \skid_buffer_reg_n_0_[2]\ : STD_LOGIC;
signal \skid_buffer_reg_n_0_[30]\ : STD_LOGIC;
signal \skid_buffer_reg_n_0_[31]\ : STD_LOGIC;
signal \skid_buffer_reg_n_0_[32]\ : STD_LOGIC;
signal \skid_buffer_reg_n_0_[33]\ : STD_LOGIC;
signal \skid_buffer_reg_n_0_[34]\ : STD_LOGIC;
signal \skid_buffer_reg_n_0_[35]\ : STD_LOGIC;
signal \skid_buffer_reg_n_0_[36]\ : STD_LOGIC;
signal \skid_buffer_reg_n_0_[38]\ : STD_LOGIC;
signal \skid_buffer_reg_n_0_[39]\ : STD_LOGIC;
signal \skid_buffer_reg_n_0_[3]\ : STD_LOGIC;
signal \skid_buffer_reg_n_0_[44]\ : STD_LOGIC;
signal \skid_buffer_reg_n_0_[45]\ : STD_LOGIC;
signal \skid_buffer_reg_n_0_[46]\ : STD_LOGIC;
signal \skid_buffer_reg_n_0_[47]\ : STD_LOGIC;
signal \skid_buffer_reg_n_0_[4]\ : STD_LOGIC;
signal \skid_buffer_reg_n_0_[50]\ : STD_LOGIC;
signal \skid_buffer_reg_n_0_[51]\ : STD_LOGIC;
signal \skid_buffer_reg_n_0_[52]\ : STD_LOGIC;
signal \skid_buffer_reg_n_0_[53]\ : STD_LOGIC;
signal \skid_buffer_reg_n_0_[54]\ : STD_LOGIC;
signal \skid_buffer_reg_n_0_[55]\ : STD_LOGIC;
signal \skid_buffer_reg_n_0_[56]\ : STD_LOGIC;
signal \skid_buffer_reg_n_0_[57]\ : STD_LOGIC;
signal \skid_buffer_reg_n_0_[58]\ : STD_LOGIC;
signal \skid_buffer_reg_n_0_[59]\ : STD_LOGIC;
signal \skid_buffer_reg_n_0_[5]\ : STD_LOGIC;
signal \skid_buffer_reg_n_0_[60]\ : STD_LOGIC;
signal \skid_buffer_reg_n_0_[61]\ : STD_LOGIC;
signal \skid_buffer_reg_n_0_[6]\ : STD_LOGIC;
signal \skid_buffer_reg_n_0_[7]\ : STD_LOGIC;
signal \skid_buffer_reg_n_0_[8]\ : STD_LOGIC;
signal \skid_buffer_reg_n_0_[9]\ : STD_LOGIC;
signal \wrap_boundary_axaddr_r[3]_i_2__0_n_0\ : STD_LOGIC;
signal \wrap_cnt_r[3]_i_5__0_n_0\ : STD_LOGIC;
signal \^wrap_cnt_r_reg[2]\ : STD_LOGIC;
signal \wrap_second_len_r[3]_i_2__0_n_0\ : STD_LOGIC;
signal \wrap_second_len_r[3]_i_3__0_n_0\ : STD_LOGIC;
signal \^wrap_second_len_r_reg[3]\ : STD_LOGIC_VECTOR ( 2 downto 0 );
signal \NLW_axaddr_incr_reg[11]_i_3__0_CO_UNCONNECTED\ : STD_LOGIC_VECTOR ( 3 to 3 );
attribute SOFT_HLUTNM : string;
attribute SOFT_HLUTNM of \m_payload_i[10]_i_1__0\ : label is "soft_lutpair44";
attribute SOFT_HLUTNM of \m_payload_i[11]_i_1__0\ : label is "soft_lutpair43";
attribute SOFT_HLUTNM of \m_payload_i[12]_i_1__0\ : label is "soft_lutpair43";
attribute SOFT_HLUTNM of \m_payload_i[13]_i_1__1\ : label is "soft_lutpair42";
attribute SOFT_HLUTNM of \m_payload_i[14]_i_1__0\ : label is "soft_lutpair42";
attribute SOFT_HLUTNM of \m_payload_i[15]_i_1__0\ : label is "soft_lutpair41";
attribute SOFT_HLUTNM of \m_payload_i[16]_i_1__0\ : label is "soft_lutpair41";
attribute SOFT_HLUTNM of \m_payload_i[17]_i_1__0\ : label is "soft_lutpair40";
attribute SOFT_HLUTNM of \m_payload_i[18]_i_1__0\ : label is "soft_lutpair40";
attribute SOFT_HLUTNM of \m_payload_i[19]_i_1__0\ : label is "soft_lutpair39";
attribute SOFT_HLUTNM of \m_payload_i[1]_i_1__0\ : label is "soft_lutpair48";
attribute SOFT_HLUTNM of \m_payload_i[20]_i_1__0\ : label is "soft_lutpair39";
attribute SOFT_HLUTNM of \m_payload_i[21]_i_1__0\ : label is "soft_lutpair38";
attribute SOFT_HLUTNM of \m_payload_i[22]_i_1__0\ : label is "soft_lutpair38";
attribute SOFT_HLUTNM of \m_payload_i[23]_i_1__0\ : label is "soft_lutpair37";
attribute SOFT_HLUTNM of \m_payload_i[24]_i_1__0\ : label is "soft_lutpair37";
attribute SOFT_HLUTNM of \m_payload_i[25]_i_1__0\ : label is "soft_lutpair36";
attribute SOFT_HLUTNM of \m_payload_i[26]_i_1__0\ : label is "soft_lutpair36";
attribute SOFT_HLUTNM of \m_payload_i[27]_i_1__0\ : label is "soft_lutpair35";
attribute SOFT_HLUTNM of \m_payload_i[28]_i_1__0\ : label is "soft_lutpair35";
attribute SOFT_HLUTNM of \m_payload_i[29]_i_1__0\ : label is "soft_lutpair34";
attribute SOFT_HLUTNM of \m_payload_i[2]_i_1__0\ : label is "soft_lutpair48";
attribute SOFT_HLUTNM of \m_payload_i[30]_i_1__0\ : label is "soft_lutpair34";
attribute SOFT_HLUTNM of \m_payload_i[31]_i_2__0\ : label is "soft_lutpair33";
attribute SOFT_HLUTNM of \m_payload_i[32]_i_1__0\ : label is "soft_lutpair33";
attribute SOFT_HLUTNM of \m_payload_i[33]_i_1__0\ : label is "soft_lutpair32";
attribute SOFT_HLUTNM of \m_payload_i[34]_i_1__0\ : label is "soft_lutpair32";
attribute SOFT_HLUTNM of \m_payload_i[35]_i_1__0\ : label is "soft_lutpair31";
attribute SOFT_HLUTNM of \m_payload_i[36]_i_1__0\ : label is "soft_lutpair31";
attribute SOFT_HLUTNM of \m_payload_i[38]_i_1__0\ : label is "soft_lutpair30";
attribute SOFT_HLUTNM of \m_payload_i[39]_i_1__0\ : label is "soft_lutpair30";
attribute SOFT_HLUTNM of \m_payload_i[3]_i_1__0\ : label is "soft_lutpair47";
attribute SOFT_HLUTNM of \m_payload_i[44]_i_1__0\ : label is "soft_lutpair29";
attribute SOFT_HLUTNM of \m_payload_i[45]_i_1__0\ : label is "soft_lutpair29";
attribute SOFT_HLUTNM of \m_payload_i[46]_i_1__1\ : label is "soft_lutpair28";
attribute SOFT_HLUTNM of \m_payload_i[47]_i_1__0\ : label is "soft_lutpair28";
attribute SOFT_HLUTNM of \m_payload_i[4]_i_1__0\ : label is "soft_lutpair47";
attribute SOFT_HLUTNM of \m_payload_i[50]_i_1__0\ : label is "soft_lutpair27";
attribute SOFT_HLUTNM of \m_payload_i[51]_i_1__0\ : label is "soft_lutpair27";
attribute SOFT_HLUTNM of \m_payload_i[52]_i_1__0\ : label is "soft_lutpair26";
attribute SOFT_HLUTNM of \m_payload_i[53]_i_1__0\ : label is "soft_lutpair26";
attribute SOFT_HLUTNM of \m_payload_i[54]_i_1__0\ : label is "soft_lutpair25";
attribute SOFT_HLUTNM of \m_payload_i[55]_i_1__0\ : label is "soft_lutpair25";
attribute SOFT_HLUTNM of \m_payload_i[56]_i_1__0\ : label is "soft_lutpair24";
attribute SOFT_HLUTNM of \m_payload_i[57]_i_1__0\ : label is "soft_lutpair24";
attribute SOFT_HLUTNM of \m_payload_i[58]_i_1__0\ : label is "soft_lutpair23";
attribute SOFT_HLUTNM of \m_payload_i[59]_i_1__0\ : label is "soft_lutpair23";
attribute SOFT_HLUTNM of \m_payload_i[5]_i_1__0\ : label is "soft_lutpair46";
attribute SOFT_HLUTNM of \m_payload_i[60]_i_1__0\ : label is "soft_lutpair22";
attribute SOFT_HLUTNM of \m_payload_i[61]_i_1__0\ : label is "soft_lutpair22";
attribute SOFT_HLUTNM of \m_payload_i[6]_i_1__0\ : label is "soft_lutpair46";
attribute SOFT_HLUTNM of \m_payload_i[7]_i_1__0\ : label is "soft_lutpair45";
attribute SOFT_HLUTNM of \m_payload_i[8]_i_1__0\ : label is "soft_lutpair45";
attribute SOFT_HLUTNM of \m_payload_i[9]_i_1__0\ : label is "soft_lutpair44";
attribute SOFT_HLUTNM of \wrap_boundary_axaddr_r[3]_i_2__0\ : label is "soft_lutpair21";
attribute SOFT_HLUTNM of \wrap_boundary_axaddr_r[5]_i_1__0\ : label is "soft_lutpair21";
begin
Q(54 downto 0) <= \^q\(54 downto 0);
axaddr_offset_0(1 downto 0) <= \^axaddr_offset_0\(1 downto 0);
\axaddr_offset_r_reg[0]\ <= \^axaddr_offset_r_reg[0]\;
\axaddr_offset_r_reg[2]\ <= \^axaddr_offset_r_reg[2]\;
\axaddr_offset_r_reg[3]\ <= \^axaddr_offset_r_reg[3]\;
\axlen_cnt_reg[3]\ <= \^axlen_cnt_reg[3]\;
m_valid_i_reg_0 <= \^m_valid_i_reg_0\;
s_axi_arready <= \^s_axi_arready\;
\wrap_cnt_r_reg[2]\ <= \^wrap_cnt_r_reg[2]\;
\wrap_second_len_r_reg[3]\(2 downto 0) <= \^wrap_second_len_r_reg[3]\(2 downto 0);
\aresetn_d_reg[1]_inv\: unisim.vcomponents.FDRE
generic map(
INIT => '1'
)
port map (
C => aclk,
CE => '1',
D => \aresetn_d_reg[0]_0\,
Q => \^m_valid_i_reg_0\,
R => '0'
);
\axaddr_incr[3]_i_4__0\: unisim.vcomponents.LUT3
generic map(
INIT => X"2A"
)
port map (
I0 => \^q\(2),
I1 => \^q\(35),
I2 => \^q\(36),
O => \axaddr_incr[3]_i_4__0_n_0\
);
\axaddr_incr[3]_i_5__0\: unisim.vcomponents.LUT2
generic map(
INIT => X"2"
)
port map (
I0 => \^q\(1),
I1 => \^q\(36),
O => \axaddr_incr[3]_i_5__0_n_0\
);
\axaddr_incr[3]_i_6__0\: unisim.vcomponents.LUT3
generic map(
INIT => X"02"
)
port map (
I0 => \^q\(0),
I1 => \^q\(35),
I2 => \^q\(36),
O => \axaddr_incr[3]_i_6__0_n_0\
);
\axaddr_incr_reg[11]_i_3__0\: unisim.vcomponents.CARRY4
port map (
CI => \axaddr_incr_reg[7]_i_2__0_n_0\,
CO(3) => \NLW_axaddr_incr_reg[11]_i_3__0_CO_UNCONNECTED\(3),
CO(2) => \axaddr_incr_reg[11]_i_3__0_n_1\,
CO(1) => \axaddr_incr_reg[11]_i_3__0_n_2\,
CO(0) => \axaddr_incr_reg[11]_i_3__0_n_3\,
CYINIT => '0',
DI(3 downto 0) => B"0000",
O(3 downto 0) => O(3 downto 0),
S(3 downto 0) => \^q\(11 downto 8)
);
\axaddr_incr_reg[3]_i_2__0\: unisim.vcomponents.CARRY4
port map (
CI => '0',
CO(3) => \axaddr_incr_reg[3]_i_2__0_n_0\,
CO(2) => \axaddr_incr_reg[3]_i_2__0_n_1\,
CO(1) => \axaddr_incr_reg[3]_i_2__0_n_2\,
CO(0) => \axaddr_incr_reg[3]_i_2__0_n_3\,
CYINIT => '0',
DI(3) => \^q\(3),
DI(2) => \axaddr_incr[3]_i_4__0_n_0\,
DI(1) => \axaddr_incr[3]_i_5__0_n_0\,
DI(0) => \axaddr_incr[3]_i_6__0_n_0\,
O(3 downto 0) => \axaddr_incr_reg[3]\(3 downto 0),
S(3 downto 0) => \m_payload_i_reg[3]_0\(3 downto 0)
);
\axaddr_incr_reg[7]_i_2__0\: unisim.vcomponents.CARRY4
port map (
CI => \axaddr_incr_reg[3]_i_2__0_n_0\,
CO(3) => \axaddr_incr_reg[7]_i_2__0_n_0\,
CO(2) => \axaddr_incr_reg[7]_i_2__0_n_1\,
CO(1) => \axaddr_incr_reg[7]_i_2__0_n_2\,
CO(0) => \axaddr_incr_reg[7]_i_2__0_n_3\,
CYINIT => '0',
DI(3 downto 0) => B"0000",
O(3 downto 0) => \axaddr_incr_reg[7]\(3 downto 0),
S(3 downto 0) => \^q\(7 downto 4)
);
\axaddr_offset_r[0]_i_1__0\: unisim.vcomponents.LUT6
generic map(
INIT => X"FFFFF8FF00000800"
)
port map (
I0 => \axaddr_offset_r[0]_i_2__0_n_0\,
I1 => \^q\(39),
I2 => \state_reg[1]\(1),
I3 => \^axaddr_offset_r_reg[3]\,
I4 => \state_reg[1]\(0),
I5 => \axaddr_offset_r_reg[3]_0\(0),
O => \^axaddr_offset_r_reg[0]\
);
\axaddr_offset_r[0]_i_2__0\: unisim.vcomponents.LUT6
generic map(
INIT => X"AFA0CFCFAFA0C0C0"
)
port map (
I0 => \^q\(3),
I1 => \^q\(2),
I2 => \^q\(36),
I3 => \^q\(1),
I4 => \^q\(35),
I5 => \^q\(0),
O => \axaddr_offset_r[0]_i_2__0_n_0\
);
\axaddr_offset_r[1]_i_1__0\: unisim.vcomponents.LUT6
generic map(
INIT => X"FFFFF8FF00000800"
)
port map (
I0 => \axaddr_offset_r[1]_i_2__0_n_0\,
I1 => \^q\(40),
I2 => \state_reg[1]\(1),
I3 => \^axaddr_offset_r_reg[3]\,
I4 => \state_reg[1]\(0),
I5 => \axaddr_offset_r_reg[3]_0\(1),
O => \^axaddr_offset_0\(0)
);
\axaddr_offset_r[1]_i_2__0\: unisim.vcomponents.LUT6
generic map(
INIT => X"AFA0CFCFAFA0C0C0"
)
port map (
I0 => \^q\(4),
I1 => \^q\(3),
I2 => \^q\(36),
I3 => \^q\(2),
I4 => \^q\(35),
I5 => \^q\(1),
O => \axaddr_offset_r[1]_i_2__0_n_0\
);
\axaddr_offset_r[2]_i_2__0\: unisim.vcomponents.LUT6
generic map(
INIT => X"AFA0CFCFAFA0C0C0"
)
port map (
I0 => \^q\(5),
I1 => \^q\(4),
I2 => \^q\(36),
I3 => \^q\(3),
I4 => \^q\(35),
I5 => \^q\(2),
O => \^axaddr_offset_r_reg[2]\
);
\axaddr_offset_r[3]_i_1__0\: unisim.vcomponents.LUT6
generic map(
INIT => X"FFFFF8FF00000800"
)
port map (
I0 => \axaddr_offset_r[3]_i_2__0_n_0\,
I1 => \^q\(42),
I2 => \state_reg[1]\(1),
I3 => \^axaddr_offset_r_reg[3]\,
I4 => \state_reg[1]\(0),
I5 => \axaddr_offset_r_reg[3]_0\(2),
O => \^axaddr_offset_0\(1)
);
\axaddr_offset_r[3]_i_2__0\: unisim.vcomponents.LUT6
generic map(
INIT => X"AFA0CFCFAFA0C0C0"
)
port map (
I0 => \^q\(6),
I1 => \^q\(5),
I2 => \^q\(36),
I3 => \^q\(4),
I4 => \^q\(35),
I5 => \^q\(3),
O => \axaddr_offset_r[3]_i_2__0_n_0\
);
\axlen_cnt[3]_i_3__0\: unisim.vcomponents.LUT4
generic map(
INIT => X"0020"
)
port map (
I0 => \^q\(42),
I1 => \state_reg[1]\(0),
I2 => \^axaddr_offset_r_reg[3]\,
I3 => \state_reg[1]\(1),
O => \^axlen_cnt_reg[3]\
);
\m_payload_i[0]_i_1__0\: unisim.vcomponents.LUT3
generic map(
INIT => X"B8"
)
port map (
I0 => s_axi_araddr(0),
I1 => \^s_axi_arready\,
I2 => \skid_buffer_reg_n_0_[0]\,
O => \m_payload_i[0]_i_1__0_n_0\
);
\m_payload_i[10]_i_1__0\: unisim.vcomponents.LUT3
generic map(
INIT => X"B8"
)
port map (
I0 => s_axi_araddr(10),
I1 => \^s_axi_arready\,
I2 => \skid_buffer_reg_n_0_[10]\,
O => \m_payload_i[10]_i_1__0_n_0\
);
\m_payload_i[11]_i_1__0\: unisim.vcomponents.LUT3
generic map(
INIT => X"B8"
)
port map (
I0 => s_axi_araddr(11),
I1 => \^s_axi_arready\,
I2 => \skid_buffer_reg_n_0_[11]\,
O => \m_payload_i[11]_i_1__0_n_0\
);
\m_payload_i[12]_i_1__0\: unisim.vcomponents.LUT3
generic map(
INIT => X"B8"
)
port map (
I0 => s_axi_araddr(12),
I1 => \^s_axi_arready\,
I2 => \skid_buffer_reg_n_0_[12]\,
O => \m_payload_i[12]_i_1__0_n_0\
);
\m_payload_i[13]_i_1__1\: unisim.vcomponents.LUT3
generic map(
INIT => X"B8"
)
port map (
I0 => s_axi_araddr(13),
I1 => \^s_axi_arready\,
I2 => \skid_buffer_reg_n_0_[13]\,
O => \m_payload_i[13]_i_1__1_n_0\
);
\m_payload_i[14]_i_1__0\: unisim.vcomponents.LUT3
generic map(
INIT => X"B8"
)
port map (
I0 => s_axi_araddr(14),
I1 => \^s_axi_arready\,
I2 => \skid_buffer_reg_n_0_[14]\,
O => \m_payload_i[14]_i_1__0_n_0\
);
\m_payload_i[15]_i_1__0\: unisim.vcomponents.LUT3
generic map(
INIT => X"B8"
)
port map (
I0 => s_axi_araddr(15),
I1 => \^s_axi_arready\,
I2 => \skid_buffer_reg_n_0_[15]\,
O => \m_payload_i[15]_i_1__0_n_0\
);
\m_payload_i[16]_i_1__0\: unisim.vcomponents.LUT3
generic map(
INIT => X"B8"
)
port map (
I0 => s_axi_araddr(16),
I1 => \^s_axi_arready\,
I2 => \skid_buffer_reg_n_0_[16]\,
O => \m_payload_i[16]_i_1__0_n_0\
);
\m_payload_i[17]_i_1__0\: unisim.vcomponents.LUT3
generic map(
INIT => X"B8"
)
port map (
I0 => s_axi_araddr(17),
I1 => \^s_axi_arready\,
I2 => \skid_buffer_reg_n_0_[17]\,
O => \m_payload_i[17]_i_1__0_n_0\
);
\m_payload_i[18]_i_1__0\: unisim.vcomponents.LUT3
generic map(
INIT => X"B8"
)
port map (
I0 => s_axi_araddr(18),
I1 => \^s_axi_arready\,
I2 => \skid_buffer_reg_n_0_[18]\,
O => \m_payload_i[18]_i_1__0_n_0\
);
\m_payload_i[19]_i_1__0\: unisim.vcomponents.LUT3
generic map(
INIT => X"B8"
)
port map (
I0 => s_axi_araddr(19),
I1 => \^s_axi_arready\,
I2 => \skid_buffer_reg_n_0_[19]\,
O => \m_payload_i[19]_i_1__0_n_0\
);
\m_payload_i[1]_i_1__0\: unisim.vcomponents.LUT3
generic map(
INIT => X"B8"
)
port map (
I0 => s_axi_araddr(1),
I1 => \^s_axi_arready\,
I2 => \skid_buffer_reg_n_0_[1]\,
O => \m_payload_i[1]_i_1__0_n_0\
);
\m_payload_i[20]_i_1__0\: unisim.vcomponents.LUT3
generic map(
INIT => X"B8"
)
port map (
I0 => s_axi_araddr(20),
I1 => \^s_axi_arready\,
I2 => \skid_buffer_reg_n_0_[20]\,
O => \m_payload_i[20]_i_1__0_n_0\
);
\m_payload_i[21]_i_1__0\: unisim.vcomponents.LUT3
generic map(
INIT => X"B8"
)
port map (
I0 => s_axi_araddr(21),
I1 => \^s_axi_arready\,
I2 => \skid_buffer_reg_n_0_[21]\,
O => \m_payload_i[21]_i_1__0_n_0\
);
\m_payload_i[22]_i_1__0\: unisim.vcomponents.LUT3
generic map(
INIT => X"B8"
)
port map (
I0 => s_axi_araddr(22),
I1 => \^s_axi_arready\,
I2 => \skid_buffer_reg_n_0_[22]\,
O => \m_payload_i[22]_i_1__0_n_0\
);
\m_payload_i[23]_i_1__0\: unisim.vcomponents.LUT3
generic map(
INIT => X"B8"
)
port map (
I0 => s_axi_araddr(23),
I1 => \^s_axi_arready\,
I2 => \skid_buffer_reg_n_0_[23]\,
O => \m_payload_i[23]_i_1__0_n_0\
);
\m_payload_i[24]_i_1__0\: unisim.vcomponents.LUT3
generic map(
INIT => X"B8"
)
port map (
I0 => s_axi_araddr(24),
I1 => \^s_axi_arready\,
I2 => \skid_buffer_reg_n_0_[24]\,
O => \m_payload_i[24]_i_1__0_n_0\
);
\m_payload_i[25]_i_1__0\: unisim.vcomponents.LUT3
generic map(
INIT => X"B8"
)
port map (
I0 => s_axi_araddr(25),
I1 => \^s_axi_arready\,
I2 => \skid_buffer_reg_n_0_[25]\,
O => \m_payload_i[25]_i_1__0_n_0\
);
\m_payload_i[26]_i_1__0\: unisim.vcomponents.LUT3
generic map(
INIT => X"B8"
)
port map (
I0 => s_axi_araddr(26),
I1 => \^s_axi_arready\,
I2 => \skid_buffer_reg_n_0_[26]\,
O => \m_payload_i[26]_i_1__0_n_0\
);
\m_payload_i[27]_i_1__0\: unisim.vcomponents.LUT3
generic map(
INIT => X"B8"
)
port map (
I0 => s_axi_araddr(27),
I1 => \^s_axi_arready\,
I2 => \skid_buffer_reg_n_0_[27]\,
O => \m_payload_i[27]_i_1__0_n_0\
);
\m_payload_i[28]_i_1__0\: unisim.vcomponents.LUT3
generic map(
INIT => X"B8"
)
port map (
I0 => s_axi_araddr(28),
I1 => \^s_axi_arready\,
I2 => \skid_buffer_reg_n_0_[28]\,
O => \m_payload_i[28]_i_1__0_n_0\
);
\m_payload_i[29]_i_1__0\: unisim.vcomponents.LUT3
generic map(
INIT => X"B8"
)
port map (
I0 => s_axi_araddr(29),
I1 => \^s_axi_arready\,
I2 => \skid_buffer_reg_n_0_[29]\,
O => \m_payload_i[29]_i_1__0_n_0\
);
\m_payload_i[2]_i_1__0\: unisim.vcomponents.LUT3
generic map(
INIT => X"B8"
)
port map (
I0 => s_axi_araddr(2),
I1 => \^s_axi_arready\,
I2 => \skid_buffer_reg_n_0_[2]\,
O => \m_payload_i[2]_i_1__0_n_0\
);
\m_payload_i[30]_i_1__0\: unisim.vcomponents.LUT3
generic map(
INIT => X"B8"
)
port map (
I0 => s_axi_araddr(30),
I1 => \^s_axi_arready\,
I2 => \skid_buffer_reg_n_0_[30]\,
O => \m_payload_i[30]_i_1__0_n_0\
);
\m_payload_i[31]_i_2__0\: unisim.vcomponents.LUT3
generic map(
INIT => X"B8"
)
port map (
I0 => s_axi_araddr(31),
I1 => \^s_axi_arready\,
I2 => \skid_buffer_reg_n_0_[31]\,
O => \m_payload_i[31]_i_2__0_n_0\
);
\m_payload_i[32]_i_1__0\: unisim.vcomponents.LUT3
generic map(
INIT => X"B8"
)
port map (
I0 => s_axi_arprot(0),
I1 => \^s_axi_arready\,
I2 => \skid_buffer_reg_n_0_[32]\,
O => \m_payload_i[32]_i_1__0_n_0\
);
\m_payload_i[33]_i_1__0\: unisim.vcomponents.LUT3
generic map(
INIT => X"B8"
)
port map (
I0 => s_axi_arprot(1),
I1 => \^s_axi_arready\,
I2 => \skid_buffer_reg_n_0_[33]\,
O => \m_payload_i[33]_i_1__0_n_0\
);
\m_payload_i[34]_i_1__0\: unisim.vcomponents.LUT3
generic map(
INIT => X"B8"
)
port map (
I0 => s_axi_arprot(2),
I1 => \^s_axi_arready\,
I2 => \skid_buffer_reg_n_0_[34]\,
O => \m_payload_i[34]_i_1__0_n_0\
);
\m_payload_i[35]_i_1__0\: unisim.vcomponents.LUT3
generic map(
INIT => X"B8"
)
port map (
I0 => s_axi_arsize(0),
I1 => \^s_axi_arready\,
I2 => \skid_buffer_reg_n_0_[35]\,
O => \m_payload_i[35]_i_1__0_n_0\
);
\m_payload_i[36]_i_1__0\: unisim.vcomponents.LUT3
generic map(
INIT => X"B8"
)
port map (
I0 => s_axi_arsize(1),
I1 => \^s_axi_arready\,
I2 => \skid_buffer_reg_n_0_[36]\,
O => \m_payload_i[36]_i_1__0_n_0\
);
\m_payload_i[38]_i_1__0\: unisim.vcomponents.LUT3
generic map(
INIT => X"B8"
)
port map (
I0 => s_axi_arburst(0),
I1 => \^s_axi_arready\,
I2 => \skid_buffer_reg_n_0_[38]\,
O => \m_payload_i[38]_i_1__0_n_0\
);
\m_payload_i[39]_i_1__0\: unisim.vcomponents.LUT3
generic map(
INIT => X"B8"
)
port map (
I0 => s_axi_arburst(1),
I1 => \^s_axi_arready\,
I2 => \skid_buffer_reg_n_0_[39]\,
O => \m_payload_i[39]_i_1__0_n_0\
);
\m_payload_i[3]_i_1__0\: unisim.vcomponents.LUT3
generic map(
INIT => X"B8"
)
port map (
I0 => s_axi_araddr(3),
I1 => \^s_axi_arready\,
I2 => \skid_buffer_reg_n_0_[3]\,
O => \m_payload_i[3]_i_1__0_n_0\
);
\m_payload_i[44]_i_1__0\: unisim.vcomponents.LUT3
generic map(
INIT => X"B8"
)
port map (
I0 => s_axi_arlen(0),
I1 => \^s_axi_arready\,
I2 => \skid_buffer_reg_n_0_[44]\,
O => \m_payload_i[44]_i_1__0_n_0\
);
\m_payload_i[45]_i_1__0\: unisim.vcomponents.LUT3
generic map(
INIT => X"B8"
)
port map (
I0 => s_axi_arlen(1),
I1 => \^s_axi_arready\,
I2 => \skid_buffer_reg_n_0_[45]\,
O => \m_payload_i[45]_i_1__0_n_0\
);
\m_payload_i[46]_i_1__1\: unisim.vcomponents.LUT3
generic map(
INIT => X"B8"
)
port map (
I0 => s_axi_arlen(2),
I1 => \^s_axi_arready\,
I2 => \skid_buffer_reg_n_0_[46]\,
O => \m_payload_i[46]_i_1__1_n_0\
);
\m_payload_i[47]_i_1__0\: unisim.vcomponents.LUT3
generic map(
INIT => X"B8"
)
port map (
I0 => s_axi_arlen(3),
I1 => \^s_axi_arready\,
I2 => \skid_buffer_reg_n_0_[47]\,
O => \m_payload_i[47]_i_1__0_n_0\
);
\m_payload_i[4]_i_1__0\: unisim.vcomponents.LUT3
generic map(
INIT => X"B8"
)
port map (
I0 => s_axi_araddr(4),
I1 => \^s_axi_arready\,
I2 => \skid_buffer_reg_n_0_[4]\,
O => \m_payload_i[4]_i_1__0_n_0\
);
\m_payload_i[50]_i_1__0\: unisim.vcomponents.LUT3
generic map(
INIT => X"B8"
)
port map (
I0 => s_axi_arid(0),
I1 => \^s_axi_arready\,
I2 => \skid_buffer_reg_n_0_[50]\,
O => \m_payload_i[50]_i_1__0_n_0\
);
\m_payload_i[51]_i_1__0\: unisim.vcomponents.LUT3
generic map(
INIT => X"B8"
)
port map (
I0 => s_axi_arid(1),
I1 => \^s_axi_arready\,
I2 => \skid_buffer_reg_n_0_[51]\,
O => \m_payload_i[51]_i_1__0_n_0\
);
\m_payload_i[52]_i_1__0\: unisim.vcomponents.LUT3
generic map(
INIT => X"B8"
)
port map (
I0 => s_axi_arid(2),
I1 => \^s_axi_arready\,
I2 => \skid_buffer_reg_n_0_[52]\,
O => \m_payload_i[52]_i_1__0_n_0\
);
\m_payload_i[53]_i_1__0\: unisim.vcomponents.LUT3
generic map(
INIT => X"B8"
)
port map (
I0 => s_axi_arid(3),
I1 => \^s_axi_arready\,
I2 => \skid_buffer_reg_n_0_[53]\,
O => \m_payload_i[53]_i_1__0_n_0\
);
\m_payload_i[54]_i_1__0\: unisim.vcomponents.LUT3
generic map(
INIT => X"B8"
)
port map (
I0 => s_axi_arid(4),
I1 => \^s_axi_arready\,
I2 => \skid_buffer_reg_n_0_[54]\,
O => \m_payload_i[54]_i_1__0_n_0\
);
\m_payload_i[55]_i_1__0\: unisim.vcomponents.LUT3
generic map(
INIT => X"B8"
)
port map (
I0 => s_axi_arid(5),
I1 => \^s_axi_arready\,
I2 => \skid_buffer_reg_n_0_[55]\,
O => \m_payload_i[55]_i_1__0_n_0\
);
\m_payload_i[56]_i_1__0\: unisim.vcomponents.LUT3
generic map(
INIT => X"B8"
)
port map (
I0 => s_axi_arid(6),
I1 => \^s_axi_arready\,
I2 => \skid_buffer_reg_n_0_[56]\,
O => \m_payload_i[56]_i_1__0_n_0\
);
\m_payload_i[57]_i_1__0\: unisim.vcomponents.LUT3
generic map(
INIT => X"B8"
)
port map (
I0 => s_axi_arid(7),
I1 => \^s_axi_arready\,
I2 => \skid_buffer_reg_n_0_[57]\,
O => \m_payload_i[57]_i_1__0_n_0\
);
\m_payload_i[58]_i_1__0\: unisim.vcomponents.LUT3
generic map(
INIT => X"B8"
)
port map (
I0 => s_axi_arid(8),
I1 => \^s_axi_arready\,
I2 => \skid_buffer_reg_n_0_[58]\,
O => \m_payload_i[58]_i_1__0_n_0\
);
\m_payload_i[59]_i_1__0\: unisim.vcomponents.LUT3
generic map(
INIT => X"B8"
)
port map (
I0 => s_axi_arid(9),
I1 => \^s_axi_arready\,
I2 => \skid_buffer_reg_n_0_[59]\,
O => \m_payload_i[59]_i_1__0_n_0\
);
\m_payload_i[5]_i_1__0\: unisim.vcomponents.LUT3
generic map(
INIT => X"B8"
)
port map (
I0 => s_axi_araddr(5),
I1 => \^s_axi_arready\,
I2 => \skid_buffer_reg_n_0_[5]\,
O => \m_payload_i[5]_i_1__0_n_0\
);
\m_payload_i[60]_i_1__0\: unisim.vcomponents.LUT3
generic map(
INIT => X"B8"
)
port map (
I0 => s_axi_arid(10),
I1 => \^s_axi_arready\,
I2 => \skid_buffer_reg_n_0_[60]\,
O => \m_payload_i[60]_i_1__0_n_0\
);
\m_payload_i[61]_i_1__0\: unisim.vcomponents.LUT3
generic map(
INIT => X"B8"
)
port map (
I0 => s_axi_arid(11),
I1 => \^s_axi_arready\,
I2 => \skid_buffer_reg_n_0_[61]\,
O => \m_payload_i[61]_i_1__0_n_0\
);
\m_payload_i[6]_i_1__0\: unisim.vcomponents.LUT3
generic map(
INIT => X"B8"
)
port map (
I0 => s_axi_araddr(6),
I1 => \^s_axi_arready\,
I2 => \skid_buffer_reg_n_0_[6]\,
O => \m_payload_i[6]_i_1__0_n_0\
);
\m_payload_i[7]_i_1__0\: unisim.vcomponents.LUT3
generic map(
INIT => X"B8"
)
port map (
I0 => s_axi_araddr(7),
I1 => \^s_axi_arready\,
I2 => \skid_buffer_reg_n_0_[7]\,
O => \m_payload_i[7]_i_1__0_n_0\
);
\m_payload_i[8]_i_1__0\: unisim.vcomponents.LUT3
generic map(
INIT => X"B8"
)
port map (
I0 => s_axi_araddr(8),
I1 => \^s_axi_arready\,
I2 => \skid_buffer_reg_n_0_[8]\,
O => \m_payload_i[8]_i_1__0_n_0\
);
\m_payload_i[9]_i_1__0\: unisim.vcomponents.LUT3
generic map(
INIT => X"B8"
)
port map (
I0 => s_axi_araddr(9),
I1 => \^s_axi_arready\,
I2 => \skid_buffer_reg_n_0_[9]\,
O => \m_payload_i[9]_i_1__0_n_0\
);
\m_payload_i_reg[0]\: unisim.vcomponents.FDRE
port map (
C => aclk,
CE => m_valid_i_reg_1(0),
D => \m_payload_i[0]_i_1__0_n_0\,
Q => \^q\(0),
R => '0'
);
\m_payload_i_reg[10]\: unisim.vcomponents.FDRE
port map (
C => aclk,
CE => m_valid_i_reg_1(0),
D => \m_payload_i[10]_i_1__0_n_0\,
Q => \^q\(10),
R => '0'
);
\m_payload_i_reg[11]\: unisim.vcomponents.FDRE
port map (
C => aclk,
CE => m_valid_i_reg_1(0),
D => \m_payload_i[11]_i_1__0_n_0\,
Q => \^q\(11),
R => '0'
);
\m_payload_i_reg[12]\: unisim.vcomponents.FDRE
port map (
C => aclk,
CE => m_valid_i_reg_1(0),
D => \m_payload_i[12]_i_1__0_n_0\,
Q => \^q\(12),
R => '0'
);
\m_payload_i_reg[13]\: unisim.vcomponents.FDRE
port map (
C => aclk,
CE => m_valid_i_reg_1(0),
D => \m_payload_i[13]_i_1__1_n_0\,
Q => \^q\(13),
R => '0'
);
\m_payload_i_reg[14]\: unisim.vcomponents.FDRE
port map (
C => aclk,
CE => m_valid_i_reg_1(0),
D => \m_payload_i[14]_i_1__0_n_0\,
Q => \^q\(14),
R => '0'
);
\m_payload_i_reg[15]\: unisim.vcomponents.FDRE
port map (
C => aclk,
CE => m_valid_i_reg_1(0),
D => \m_payload_i[15]_i_1__0_n_0\,
Q => \^q\(15),
R => '0'
);
\m_payload_i_reg[16]\: unisim.vcomponents.FDRE
port map (
C => aclk,
CE => m_valid_i_reg_1(0),
D => \m_payload_i[16]_i_1__0_n_0\,
Q => \^q\(16),
R => '0'
);
\m_payload_i_reg[17]\: unisim.vcomponents.FDRE
port map (
C => aclk,
CE => m_valid_i_reg_1(0),
D => \m_payload_i[17]_i_1__0_n_0\,
Q => \^q\(17),
R => '0'
);
\m_payload_i_reg[18]\: unisim.vcomponents.FDRE
port map (
C => aclk,
CE => m_valid_i_reg_1(0),
D => \m_payload_i[18]_i_1__0_n_0\,
Q => \^q\(18),
R => '0'
);
\m_payload_i_reg[19]\: unisim.vcomponents.FDRE
port map (
C => aclk,
CE => m_valid_i_reg_1(0),
D => \m_payload_i[19]_i_1__0_n_0\,
Q => \^q\(19),
R => '0'
);
\m_payload_i_reg[1]\: unisim.vcomponents.FDRE
port map (
C => aclk,
CE => m_valid_i_reg_1(0),
D => \m_payload_i[1]_i_1__0_n_0\,
Q => \^q\(1),
R => '0'
);
\m_payload_i_reg[20]\: unisim.vcomponents.FDRE
port map (
C => aclk,
CE => m_valid_i_reg_1(0),
D => \m_payload_i[20]_i_1__0_n_0\,
Q => \^q\(20),
R => '0'
);
\m_payload_i_reg[21]\: unisim.vcomponents.FDRE
port map (
C => aclk,
CE => m_valid_i_reg_1(0),
D => \m_payload_i[21]_i_1__0_n_0\,
Q => \^q\(21),
R => '0'
);
\m_payload_i_reg[22]\: unisim.vcomponents.FDRE
port map (
C => aclk,
CE => m_valid_i_reg_1(0),
D => \m_payload_i[22]_i_1__0_n_0\,
Q => \^q\(22),
R => '0'
);
\m_payload_i_reg[23]\: unisim.vcomponents.FDRE
port map (
C => aclk,
CE => m_valid_i_reg_1(0),
D => \m_payload_i[23]_i_1__0_n_0\,
Q => \^q\(23),
R => '0'
);
\m_payload_i_reg[24]\: unisim.vcomponents.FDRE
port map (
C => aclk,
CE => m_valid_i_reg_1(0),
D => \m_payload_i[24]_i_1__0_n_0\,
Q => \^q\(24),
R => '0'
);
\m_payload_i_reg[25]\: unisim.vcomponents.FDRE
port map (
C => aclk,
CE => m_valid_i_reg_1(0),
D => \m_payload_i[25]_i_1__0_n_0\,
Q => \^q\(25),
R => '0'
);
\m_payload_i_reg[26]\: unisim.vcomponents.FDRE
port map (
C => aclk,
CE => m_valid_i_reg_1(0),
D => \m_payload_i[26]_i_1__0_n_0\,
Q => \^q\(26),
R => '0'
);
\m_payload_i_reg[27]\: unisim.vcomponents.FDRE
port map (
C => aclk,
CE => m_valid_i_reg_1(0),
D => \m_payload_i[27]_i_1__0_n_0\,
Q => \^q\(27),
R => '0'
);
\m_payload_i_reg[28]\: unisim.vcomponents.FDRE
port map (
C => aclk,
CE => m_valid_i_reg_1(0),
D => \m_payload_i[28]_i_1__0_n_0\,
Q => \^q\(28),
R => '0'
);
\m_payload_i_reg[29]\: unisim.vcomponents.FDRE
port map (
C => aclk,
CE => m_valid_i_reg_1(0),
D => \m_payload_i[29]_i_1__0_n_0\,
Q => \^q\(29),
R => '0'
);
\m_payload_i_reg[2]\: unisim.vcomponents.FDRE
port map (
C => aclk,
CE => m_valid_i_reg_1(0),
D => \m_payload_i[2]_i_1__0_n_0\,
Q => \^q\(2),
R => '0'
);
\m_payload_i_reg[30]\: unisim.vcomponents.FDRE
port map (
C => aclk,
CE => m_valid_i_reg_1(0),
D => \m_payload_i[30]_i_1__0_n_0\,
Q => \^q\(30),
R => '0'
);
\m_payload_i_reg[31]\: unisim.vcomponents.FDRE
port map (
C => aclk,
CE => m_valid_i_reg_1(0),
D => \m_payload_i[31]_i_2__0_n_0\,
Q => \^q\(31),
R => '0'
);
\m_payload_i_reg[32]\: unisim.vcomponents.FDRE
port map (
C => aclk,
CE => m_valid_i_reg_1(0),
D => \m_payload_i[32]_i_1__0_n_0\,
Q => \^q\(32),
R => '0'
);
\m_payload_i_reg[33]\: unisim.vcomponents.FDRE
port map (
C => aclk,
CE => m_valid_i_reg_1(0),
D => \m_payload_i[33]_i_1__0_n_0\,
Q => \^q\(33),
R => '0'
);
\m_payload_i_reg[34]\: unisim.vcomponents.FDRE
port map (
C => aclk,
CE => m_valid_i_reg_1(0),
D => \m_payload_i[34]_i_1__0_n_0\,
Q => \^q\(34),
R => '0'
);
\m_payload_i_reg[35]\: unisim.vcomponents.FDRE
port map (
C => aclk,
CE => m_valid_i_reg_1(0),
D => \m_payload_i[35]_i_1__0_n_0\,
Q => \^q\(35),
R => '0'
);
\m_payload_i_reg[36]\: unisim.vcomponents.FDRE
port map (
C => aclk,
CE => m_valid_i_reg_1(0),
D => \m_payload_i[36]_i_1__0_n_0\,
Q => \^q\(36),
R => '0'
);
\m_payload_i_reg[38]\: unisim.vcomponents.FDRE
port map (
C => aclk,
CE => m_valid_i_reg_1(0),
D => \m_payload_i[38]_i_1__0_n_0\,
Q => \^q\(37),
R => '0'
);
\m_payload_i_reg[39]\: unisim.vcomponents.FDRE
port map (
C => aclk,
CE => m_valid_i_reg_1(0),
D => \m_payload_i[39]_i_1__0_n_0\,
Q => \^q\(38),
R => '0'
);
\m_payload_i_reg[3]\: unisim.vcomponents.FDRE
port map (
C => aclk,
CE => m_valid_i_reg_1(0),
D => \m_payload_i[3]_i_1__0_n_0\,
Q => \^q\(3),
R => '0'
);
\m_payload_i_reg[44]\: unisim.vcomponents.FDRE
port map (
C => aclk,
CE => m_valid_i_reg_1(0),
D => \m_payload_i[44]_i_1__0_n_0\,
Q => \^q\(39),
R => '0'
);
\m_payload_i_reg[45]\: unisim.vcomponents.FDRE
port map (
C => aclk,
CE => m_valid_i_reg_1(0),
D => \m_payload_i[45]_i_1__0_n_0\,
Q => \^q\(40),
R => '0'
);
\m_payload_i_reg[46]\: unisim.vcomponents.FDRE
port map (
C => aclk,
CE => m_valid_i_reg_1(0),
D => \m_payload_i[46]_i_1__1_n_0\,
Q => \^q\(41),
R => '0'
);
\m_payload_i_reg[47]\: unisim.vcomponents.FDRE
port map (
C => aclk,
CE => m_valid_i_reg_1(0),
D => \m_payload_i[47]_i_1__0_n_0\,
Q => \^q\(42),
R => '0'
);
\m_payload_i_reg[4]\: unisim.vcomponents.FDRE
port map (
C => aclk,
CE => m_valid_i_reg_1(0),
D => \m_payload_i[4]_i_1__0_n_0\,
Q => \^q\(4),
R => '0'
);
\m_payload_i_reg[50]\: unisim.vcomponents.FDRE
port map (
C => aclk,
CE => m_valid_i_reg_1(0),
D => \m_payload_i[50]_i_1__0_n_0\,
Q => \^q\(43),
R => '0'
);
\m_payload_i_reg[51]\: unisim.vcomponents.FDRE
port map (
C => aclk,
CE => m_valid_i_reg_1(0),
D => \m_payload_i[51]_i_1__0_n_0\,
Q => \^q\(44),
R => '0'
);
\m_payload_i_reg[52]\: unisim.vcomponents.FDRE
port map (
C => aclk,
CE => m_valid_i_reg_1(0),
D => \m_payload_i[52]_i_1__0_n_0\,
Q => \^q\(45),
R => '0'
);
\m_payload_i_reg[53]\: unisim.vcomponents.FDRE
port map (
C => aclk,
CE => m_valid_i_reg_1(0),
D => \m_payload_i[53]_i_1__0_n_0\,
Q => \^q\(46),
R => '0'
);
\m_payload_i_reg[54]\: unisim.vcomponents.FDRE
port map (
C => aclk,
CE => m_valid_i_reg_1(0),
D => \m_payload_i[54]_i_1__0_n_0\,
Q => \^q\(47),
R => '0'
);
\m_payload_i_reg[55]\: unisim.vcomponents.FDRE
port map (
C => aclk,
CE => m_valid_i_reg_1(0),
D => \m_payload_i[55]_i_1__0_n_0\,
Q => \^q\(48),
R => '0'
);
\m_payload_i_reg[56]\: unisim.vcomponents.FDRE
port map (
C => aclk,
CE => m_valid_i_reg_1(0),
D => \m_payload_i[56]_i_1__0_n_0\,
Q => \^q\(49),
R => '0'
);
\m_payload_i_reg[57]\: unisim.vcomponents.FDRE
port map (
C => aclk,
CE => m_valid_i_reg_1(0),
D => \m_payload_i[57]_i_1__0_n_0\,
Q => \^q\(50),
R => '0'
);
\m_payload_i_reg[58]\: unisim.vcomponents.FDRE
port map (
C => aclk,
CE => m_valid_i_reg_1(0),
D => \m_payload_i[58]_i_1__0_n_0\,
Q => \^q\(51),
R => '0'
);
\m_payload_i_reg[59]\: unisim.vcomponents.FDRE
port map (
C => aclk,
CE => m_valid_i_reg_1(0),
D => \m_payload_i[59]_i_1__0_n_0\,
Q => \^q\(52),
R => '0'
);
\m_payload_i_reg[5]\: unisim.vcomponents.FDRE
port map (
C => aclk,
CE => m_valid_i_reg_1(0),
D => \m_payload_i[5]_i_1__0_n_0\,
Q => \^q\(5),
R => '0'
);
\m_payload_i_reg[60]\: unisim.vcomponents.FDRE
port map (
C => aclk,
CE => m_valid_i_reg_1(0),
D => \m_payload_i[60]_i_1__0_n_0\,
Q => \^q\(53),
R => '0'
);
\m_payload_i_reg[61]\: unisim.vcomponents.FDRE
port map (
C => aclk,
CE => m_valid_i_reg_1(0),
D => \m_payload_i[61]_i_1__0_n_0\,
Q => \^q\(54),
R => '0'
);
\m_payload_i_reg[6]\: unisim.vcomponents.FDRE
port map (
C => aclk,
CE => m_valid_i_reg_1(0),
D => \m_payload_i[6]_i_1__0_n_0\,
Q => \^q\(6),
R => '0'
);
\m_payload_i_reg[7]\: unisim.vcomponents.FDRE
port map (
C => aclk,
CE => m_valid_i_reg_1(0),
D => \m_payload_i[7]_i_1__0_n_0\,
Q => \^q\(7),
R => '0'
);
\m_payload_i_reg[8]\: unisim.vcomponents.FDRE
port map (
C => aclk,
CE => m_valid_i_reg_1(0),
D => \m_payload_i[8]_i_1__0_n_0\,
Q => \^q\(8),
R => '0'
);
\m_payload_i_reg[9]\: unisim.vcomponents.FDRE
port map (
C => aclk,
CE => m_valid_i_reg_1(0),
D => \m_payload_i[9]_i_1__0_n_0\,
Q => \^q\(9),
R => '0'
);
m_valid_i_reg: unisim.vcomponents.FDRE
generic map(
INIT => '0'
)
port map (
C => aclk,
CE => '1',
D => m_valid_i0,
Q => \^axaddr_offset_r_reg[3]\,
R => \^m_valid_i_reg_0\
);
next_pending_r_i_3: unisim.vcomponents.LUT5
generic map(
INIT => X"AAAAAAA8"
)
port map (
I0 => \state_reg[1]_rep\,
I1 => \^q\(42),
I2 => \^q\(40),
I3 => \^q\(39),
I4 => \^q\(41),
O => next_pending_r_reg
);
s_ready_i_reg: unisim.vcomponents.FDRE
generic map(
INIT => '0'
)
port map (
C => aclk,
CE => '1',
D => s_ready_i0,
Q => \^s_axi_arready\,
R => \aresetn_d_reg[0]\
);
\skid_buffer_reg[0]\: unisim.vcomponents.FDRE
port map (
C => aclk,
CE => \^s_axi_arready\,
D => s_axi_araddr(0),
Q => \skid_buffer_reg_n_0_[0]\,
R => '0'
);
\skid_buffer_reg[10]\: unisim.vcomponents.FDRE
port map (
C => aclk,
CE => \^s_axi_arready\,
D => s_axi_araddr(10),
Q => \skid_buffer_reg_n_0_[10]\,
R => '0'
);
\skid_buffer_reg[11]\: unisim.vcomponents.FDRE
port map (
C => aclk,
CE => \^s_axi_arready\,
D => s_axi_araddr(11),
Q => \skid_buffer_reg_n_0_[11]\,
R => '0'
);
\skid_buffer_reg[12]\: unisim.vcomponents.FDRE
port map (
C => aclk,
CE => \^s_axi_arready\,
D => s_axi_araddr(12),
Q => \skid_buffer_reg_n_0_[12]\,
R => '0'
);
\skid_buffer_reg[13]\: unisim.vcomponents.FDRE
port map (
C => aclk,
CE => \^s_axi_arready\,
D => s_axi_araddr(13),
Q => \skid_buffer_reg_n_0_[13]\,
R => '0'
);
\skid_buffer_reg[14]\: unisim.vcomponents.FDRE
port map (
C => aclk,
CE => \^s_axi_arready\,
D => s_axi_araddr(14),
Q => \skid_buffer_reg_n_0_[14]\,
R => '0'
);
\skid_buffer_reg[15]\: unisim.vcomponents.FDRE
port map (
C => aclk,
CE => \^s_axi_arready\,
D => s_axi_araddr(15),
Q => \skid_buffer_reg_n_0_[15]\,
R => '0'
);
\skid_buffer_reg[16]\: unisim.vcomponents.FDRE
port map (
C => aclk,
CE => \^s_axi_arready\,
D => s_axi_araddr(16),
Q => \skid_buffer_reg_n_0_[16]\,
R => '0'
);
\skid_buffer_reg[17]\: unisim.vcomponents.FDRE
port map (
C => aclk,
CE => \^s_axi_arready\,
D => s_axi_araddr(17),
Q => \skid_buffer_reg_n_0_[17]\,
R => '0'
);
\skid_buffer_reg[18]\: unisim.vcomponents.FDRE
port map (
C => aclk,
CE => \^s_axi_arready\,
D => s_axi_araddr(18),
Q => \skid_buffer_reg_n_0_[18]\,
R => '0'
);
\skid_buffer_reg[19]\: unisim.vcomponents.FDRE
port map (
C => aclk,
CE => \^s_axi_arready\,
D => s_axi_araddr(19),
Q => \skid_buffer_reg_n_0_[19]\,
R => '0'
);
\skid_buffer_reg[1]\: unisim.vcomponents.FDRE
port map (
C => aclk,
CE => \^s_axi_arready\,
D => s_axi_araddr(1),
Q => \skid_buffer_reg_n_0_[1]\,
R => '0'
);
\skid_buffer_reg[20]\: unisim.vcomponents.FDRE
port map (
C => aclk,
CE => \^s_axi_arready\,
D => s_axi_araddr(20),
Q => \skid_buffer_reg_n_0_[20]\,
R => '0'
);
\skid_buffer_reg[21]\: unisim.vcomponents.FDRE
port map (
C => aclk,
CE => \^s_axi_arready\,
D => s_axi_araddr(21),
Q => \skid_buffer_reg_n_0_[21]\,
R => '0'
);
\skid_buffer_reg[22]\: unisim.vcomponents.FDRE
port map (
C => aclk,
CE => \^s_axi_arready\,
D => s_axi_araddr(22),
Q => \skid_buffer_reg_n_0_[22]\,
R => '0'
);
\skid_buffer_reg[23]\: unisim.vcomponents.FDRE
port map (
C => aclk,
CE => \^s_axi_arready\,
D => s_axi_araddr(23),
Q => \skid_buffer_reg_n_0_[23]\,
R => '0'
);
\skid_buffer_reg[24]\: unisim.vcomponents.FDRE
port map (
C => aclk,
CE => \^s_axi_arready\,
D => s_axi_araddr(24),
Q => \skid_buffer_reg_n_0_[24]\,
R => '0'
);
\skid_buffer_reg[25]\: unisim.vcomponents.FDRE
port map (
C => aclk,
CE => \^s_axi_arready\,
D => s_axi_araddr(25),
Q => \skid_buffer_reg_n_0_[25]\,
R => '0'
);
\skid_buffer_reg[26]\: unisim.vcomponents.FDRE
port map (
C => aclk,
CE => \^s_axi_arready\,
D => s_axi_araddr(26),
Q => \skid_buffer_reg_n_0_[26]\,
R => '0'
);
\skid_buffer_reg[27]\: unisim.vcomponents.FDRE
port map (
C => aclk,
CE => \^s_axi_arready\,
D => s_axi_araddr(27),
Q => \skid_buffer_reg_n_0_[27]\,
R => '0'
);
\skid_buffer_reg[28]\: unisim.vcomponents.FDRE
port map (
C => aclk,
CE => \^s_axi_arready\,
D => s_axi_araddr(28),
Q => \skid_buffer_reg_n_0_[28]\,
R => '0'
);
\skid_buffer_reg[29]\: unisim.vcomponents.FDRE
port map (
C => aclk,
CE => \^s_axi_arready\,
D => s_axi_araddr(29),
Q => \skid_buffer_reg_n_0_[29]\,
R => '0'
);
\skid_buffer_reg[2]\: unisim.vcomponents.FDRE
port map (
C => aclk,
CE => \^s_axi_arready\,
D => s_axi_araddr(2),
Q => \skid_buffer_reg_n_0_[2]\,
R => '0'
);
\skid_buffer_reg[30]\: unisim.vcomponents.FDRE
port map (
C => aclk,
CE => \^s_axi_arready\,
D => s_axi_araddr(30),
Q => \skid_buffer_reg_n_0_[30]\,
R => '0'
);
\skid_buffer_reg[31]\: unisim.vcomponents.FDRE
port map (
C => aclk,
CE => \^s_axi_arready\,
D => s_axi_araddr(31),
Q => \skid_buffer_reg_n_0_[31]\,
R => '0'
);
\skid_buffer_reg[32]\: unisim.vcomponents.FDRE
port map (
C => aclk,
CE => \^s_axi_arready\,
D => s_axi_arprot(0),
Q => \skid_buffer_reg_n_0_[32]\,
R => '0'
);
\skid_buffer_reg[33]\: unisim.vcomponents.FDRE
port map (
C => aclk,
CE => \^s_axi_arready\,
D => s_axi_arprot(1),
Q => \skid_buffer_reg_n_0_[33]\,
R => '0'
);
\skid_buffer_reg[34]\: unisim.vcomponents.FDRE
port map (
C => aclk,
CE => \^s_axi_arready\,
D => s_axi_arprot(2),
Q => \skid_buffer_reg_n_0_[34]\,
R => '0'
);
\skid_buffer_reg[35]\: unisim.vcomponents.FDRE
port map (
C => aclk,
CE => \^s_axi_arready\,
D => s_axi_arsize(0),
Q => \skid_buffer_reg_n_0_[35]\,
R => '0'
);
\skid_buffer_reg[36]\: unisim.vcomponents.FDRE
port map (
C => aclk,
CE => \^s_axi_arready\,
D => s_axi_arsize(1),
Q => \skid_buffer_reg_n_0_[36]\,
R => '0'
);
\skid_buffer_reg[38]\: unisim.vcomponents.FDRE
port map (
C => aclk,
CE => \^s_axi_arready\,
D => s_axi_arburst(0),
Q => \skid_buffer_reg_n_0_[38]\,
R => '0'
);
\skid_buffer_reg[39]\: unisim.vcomponents.FDRE
port map (
C => aclk,
CE => \^s_axi_arready\,
D => s_axi_arburst(1),
Q => \skid_buffer_reg_n_0_[39]\,
R => '0'
);
\skid_buffer_reg[3]\: unisim.vcomponents.FDRE
port map (
C => aclk,
CE => \^s_axi_arready\,
D => s_axi_araddr(3),
Q => \skid_buffer_reg_n_0_[3]\,
R => '0'
);
\skid_buffer_reg[44]\: unisim.vcomponents.FDRE
port map (
C => aclk,
CE => \^s_axi_arready\,
D => s_axi_arlen(0),
Q => \skid_buffer_reg_n_0_[44]\,
R => '0'
);
\skid_buffer_reg[45]\: unisim.vcomponents.FDRE
port map (
C => aclk,
CE => \^s_axi_arready\,
D => s_axi_arlen(1),
Q => \skid_buffer_reg_n_0_[45]\,
R => '0'
);
\skid_buffer_reg[46]\: unisim.vcomponents.FDRE
port map (
C => aclk,
CE => \^s_axi_arready\,
D => s_axi_arlen(2),
Q => \skid_buffer_reg_n_0_[46]\,
R => '0'
);
\skid_buffer_reg[47]\: unisim.vcomponents.FDRE
port map (
C => aclk,
CE => \^s_axi_arready\,
D => s_axi_arlen(3),
Q => \skid_buffer_reg_n_0_[47]\,
R => '0'
);
\skid_buffer_reg[4]\: unisim.vcomponents.FDRE
port map (
C => aclk,
CE => \^s_axi_arready\,
D => s_axi_araddr(4),
Q => \skid_buffer_reg_n_0_[4]\,
R => '0'
);
\skid_buffer_reg[50]\: unisim.vcomponents.FDRE
port map (
C => aclk,
CE => \^s_axi_arready\,
D => s_axi_arid(0),
Q => \skid_buffer_reg_n_0_[50]\,
R => '0'
);
\skid_buffer_reg[51]\: unisim.vcomponents.FDRE
port map (
C => aclk,
CE => \^s_axi_arready\,
D => s_axi_arid(1),
Q => \skid_buffer_reg_n_0_[51]\,
R => '0'
);
\skid_buffer_reg[52]\: unisim.vcomponents.FDRE
port map (
C => aclk,
CE => \^s_axi_arready\,
D => s_axi_arid(2),
Q => \skid_buffer_reg_n_0_[52]\,
R => '0'
);
\skid_buffer_reg[53]\: unisim.vcomponents.FDRE
port map (
C => aclk,
CE => \^s_axi_arready\,
D => s_axi_arid(3),
Q => \skid_buffer_reg_n_0_[53]\,
R => '0'
);
\skid_buffer_reg[54]\: unisim.vcomponents.FDRE
port map (
C => aclk,
CE => \^s_axi_arready\,
D => s_axi_arid(4),
Q => \skid_buffer_reg_n_0_[54]\,
R => '0'
);
\skid_buffer_reg[55]\: unisim.vcomponents.FDRE
port map (
C => aclk,
CE => \^s_axi_arready\,
D => s_axi_arid(5),
Q => \skid_buffer_reg_n_0_[55]\,
R => '0'
);
\skid_buffer_reg[56]\: unisim.vcomponents.FDRE
port map (
C => aclk,
CE => \^s_axi_arready\,
D => s_axi_arid(6),
Q => \skid_buffer_reg_n_0_[56]\,
R => '0'
);
\skid_buffer_reg[57]\: unisim.vcomponents.FDRE
port map (
C => aclk,
CE => \^s_axi_arready\,
D => s_axi_arid(7),
Q => \skid_buffer_reg_n_0_[57]\,
R => '0'
);
\skid_buffer_reg[58]\: unisim.vcomponents.FDRE
port map (
C => aclk,
CE => \^s_axi_arready\,
D => s_axi_arid(8),
Q => \skid_buffer_reg_n_0_[58]\,
R => '0'
);
\skid_buffer_reg[59]\: unisim.vcomponents.FDRE
port map (
C => aclk,
CE => \^s_axi_arready\,
D => s_axi_arid(9),
Q => \skid_buffer_reg_n_0_[59]\,
R => '0'
);
\skid_buffer_reg[5]\: unisim.vcomponents.FDRE
port map (
C => aclk,
CE => \^s_axi_arready\,
D => s_axi_araddr(5),
Q => \skid_buffer_reg_n_0_[5]\,
R => '0'
);
\skid_buffer_reg[60]\: unisim.vcomponents.FDRE
port map (
C => aclk,
CE => \^s_axi_arready\,
D => s_axi_arid(10),
Q => \skid_buffer_reg_n_0_[60]\,
R => '0'
);
\skid_buffer_reg[61]\: unisim.vcomponents.FDRE
port map (
C => aclk,
CE => \^s_axi_arready\,
D => s_axi_arid(11),
Q => \skid_buffer_reg_n_0_[61]\,
R => '0'
);
\skid_buffer_reg[6]\: unisim.vcomponents.FDRE
port map (
C => aclk,
CE => \^s_axi_arready\,
D => s_axi_araddr(6),
Q => \skid_buffer_reg_n_0_[6]\,
R => '0'
);
\skid_buffer_reg[7]\: unisim.vcomponents.FDRE
port map (
C => aclk,
CE => \^s_axi_arready\,
D => s_axi_araddr(7),
Q => \skid_buffer_reg_n_0_[7]\,
R => '0'
);
\skid_buffer_reg[8]\: unisim.vcomponents.FDRE
port map (
C => aclk,
CE => \^s_axi_arready\,
D => s_axi_araddr(8),
Q => \skid_buffer_reg_n_0_[8]\,
R => '0'
);
\skid_buffer_reg[9]\: unisim.vcomponents.FDRE
port map (
C => aclk,
CE => \^s_axi_arready\,
D => s_axi_araddr(9),
Q => \skid_buffer_reg_n_0_[9]\,
R => '0'
);
\wrap_boundary_axaddr_r[0]_i_1__0\: unisim.vcomponents.LUT4
generic map(
INIT => X"AA8A"
)
port map (
I0 => \^q\(0),
I1 => \^q\(35),
I2 => \^q\(39),
I3 => \^q\(36),
O => \wrap_boundary_axaddr_r_reg[6]\(0)
);
\wrap_boundary_axaddr_r[1]_i_1__0\: unisim.vcomponents.LUT5
generic map(
INIT => X"8A888AAA"
)
port map (
I0 => \^q\(1),
I1 => \^q\(36),
I2 => \^q\(39),
I3 => \^q\(35),
I4 => \^q\(40),
O => \wrap_boundary_axaddr_r_reg[6]\(1)
);
\wrap_boundary_axaddr_r[2]_i_1__0\: unisim.vcomponents.LUT6
generic map(
INIT => X"FF0F553300000000"
)
port map (
I0 => \^q\(40),
I1 => \^q\(41),
I2 => \^q\(39),
I3 => \^q\(35),
I4 => \^q\(36),
I5 => \^q\(2),
O => \wrap_boundary_axaddr_r_reg[6]\(2)
);
\wrap_boundary_axaddr_r[3]_i_1__0\: unisim.vcomponents.LUT6
generic map(
INIT => X"020202A2A2A202A2"
)
port map (
I0 => \^q\(3),
I1 => \wrap_boundary_axaddr_r[3]_i_2__0_n_0\,
I2 => \^q\(36),
I3 => \^q\(40),
I4 => \^q\(35),
I5 => \^q\(39),
O => \wrap_boundary_axaddr_r_reg[6]\(3)
);
\wrap_boundary_axaddr_r[3]_i_2__0\: unisim.vcomponents.LUT3
generic map(
INIT => X"B8"
)
port map (
I0 => \^q\(41),
I1 => \^q\(35),
I2 => \^q\(42),
O => \wrap_boundary_axaddr_r[3]_i_2__0_n_0\
);
\wrap_boundary_axaddr_r[4]_i_1__0\: unisim.vcomponents.LUT6
generic map(
INIT => X"503F5F3F00000000"
)
port map (
I0 => \^q\(40),
I1 => \^q\(41),
I2 => \^q\(36),
I3 => \^q\(35),
I4 => \^q\(42),
I5 => \^q\(4),
O => \wrap_boundary_axaddr_r_reg[6]\(4)
);
\wrap_boundary_axaddr_r[5]_i_1__0\: unisim.vcomponents.LUT5
generic map(
INIT => X"2A222AAA"
)
port map (
I0 => \^q\(5),
I1 => \^q\(36),
I2 => \^q\(41),
I3 => \^q\(35),
I4 => \^q\(42),
O => \wrap_boundary_axaddr_r_reg[6]\(5)
);
\wrap_boundary_axaddr_r[6]_i_1__0\: unisim.vcomponents.LUT4
generic map(
INIT => X"2AAA"
)
port map (
I0 => \^q\(6),
I1 => \^q\(42),
I2 => \^q\(35),
I3 => \^q\(36),
O => \wrap_boundary_axaddr_r_reg[6]\(6)
);
\wrap_cnt_r[2]_i_1__0\: unisim.vcomponents.LUT6
generic map(
INIT => X"AAA6AA56AAAAAAAA"
)
port map (
I0 => \^wrap_second_len_r_reg[3]\(1),
I1 => \wrap_second_len_r_reg[3]_0\(0),
I2 => \state_reg[1]_rep\,
I3 => \^wrap_cnt_r_reg[2]\,
I4 => \^axaddr_offset_r_reg[0]\,
I5 => \^wrap_second_len_r_reg[3]\(0),
O => \wrap_cnt_r_reg[3]\(0)
);
\wrap_cnt_r[3]_i_1__0\: unisim.vcomponents.LUT3
generic map(
INIT => X"6A"
)
port map (
I0 => \^wrap_second_len_r_reg[3]\(2),
I1 => \wrap_second_len_r_reg[1]\,
I2 => \^wrap_second_len_r_reg[3]\(1),
O => \wrap_cnt_r_reg[3]\(1)
);
\wrap_cnt_r[3]_i_3__0\: unisim.vcomponents.LUT6
generic map(
INIT => X"FFFFFFFFEAEAFFEA"
)
port map (
I0 => \axaddr_offset_r_reg[3]_1\,
I1 => \^axlen_cnt_reg[3]\,
I2 => \axaddr_offset_r[3]_i_2__0_n_0\,
I3 => \^axaddr_offset_r_reg[2]\,
I4 => \wrap_cnt_r[3]_i_5__0_n_0\,
I5 => \axaddr_offset_r_reg[2]_1\,
O => \wrap_cnt_r_reg[3]_0\
);
\wrap_cnt_r[3]_i_5__0\: unisim.vcomponents.LUT4
generic map(
INIT => X"FFDF"
)
port map (
I0 => \^q\(41),
I1 => \state_reg[0]_rep\,
I2 => \^axaddr_offset_r_reg[3]\,
I3 => \state_reg[1]_rep_0\,
O => \wrap_cnt_r[3]_i_5__0_n_0\
);
\wrap_second_len_r[0]_i_2__0\: unisim.vcomponents.LUT6
generic map(
INIT => X"0001000000010001"
)
port map (
I0 => \^axaddr_offset_r_reg[0]\,
I1 => \^axaddr_offset_0\(0),
I2 => \axaddr_offset_r_reg[2]_0\(0),
I3 => \wrap_second_len_r[3]_i_2__0_n_0\,
I4 => \state_reg[1]_rep\,
I5 => \axaddr_offset_r_reg[3]_0\(2),
O => \^wrap_cnt_r_reg[2]\
);
\wrap_second_len_r[1]_i_1__0\: unisim.vcomponents.LUT6
generic map(
INIT => X"F00EFFFFF00E0000"
)
port map (
I0 => \^axaddr_offset_0\(1),
I1 => \axaddr_offset_r_reg[2]_0\(0),
I2 => \^axaddr_offset_r_reg[0]\,
I3 => \^axaddr_offset_0\(0),
I4 => \state_reg[1]_rep\,
I5 => \wrap_second_len_r_reg[3]_0\(1),
O => \^wrap_second_len_r_reg[3]\(0)
);
\wrap_second_len_r[2]_i_1__0\: unisim.vcomponents.LUT6
generic map(
INIT => X"CCC2FFFFCCC20000"
)
port map (
I0 => \^axaddr_offset_0\(1),
I1 => \axaddr_offset_r_reg[2]_0\(0),
I2 => \^axaddr_offset_0\(0),
I3 => \^axaddr_offset_r_reg[0]\,
I4 => \state_reg[1]_rep\,
I5 => \wrap_second_len_r_reg[3]_0\(2),
O => \^wrap_second_len_r_reg[3]\(1)
);
\wrap_second_len_r[3]_i_1__0\: unisim.vcomponents.LUT6
generic map(
INIT => X"FE00FFFFFE00FE00"
)
port map (
I0 => \^axaddr_offset_r_reg[0]\,
I1 => \^axaddr_offset_0\(0),
I2 => \axaddr_offset_r_reg[2]_0\(0),
I3 => \wrap_second_len_r[3]_i_2__0_n_0\,
I4 => \state_reg[1]_rep\,
I5 => \wrap_second_len_r_reg[3]_0\(3),
O => \^wrap_second_len_r_reg[3]\(2)
);
\wrap_second_len_r[3]_i_2__0\: unisim.vcomponents.LUT6
generic map(
INIT => X"A8A8A8080808A808"
)
port map (
I0 => \^axlen_cnt_reg[3]\,
I1 => \wrap_second_len_r[3]_i_3__0_n_0\,
I2 => \^q\(36),
I3 => \^q\(5),
I4 => \^q\(35),
I5 => \^q\(6),
O => \wrap_second_len_r[3]_i_2__0_n_0\
);
\wrap_second_len_r[3]_i_3__0\: unisim.vcomponents.LUT3
generic map(
INIT => X"B8"
)
port map (
I0 => \^q\(4),
I1 => \^q\(35),
I2 => \^q\(3),
O => \wrap_second_len_r[3]_i_3__0_n_0\
);
end STRUCTURE;
library IEEE;
use IEEE.STD_LOGIC_1164.ALL;
library UNISIM;
use UNISIM.VCOMPONENTS.ALL;
entity decalper_eb_ot_sdeen_pot_pi_dehcac_xnilix_axi_register_slice_v2_1_17_axic_register_slice_0 is
port (
s_axi_awready : out STD_LOGIC;
s_ready_i_reg_0 : out STD_LOGIC;
m_valid_i_reg_0 : out STD_LOGIC;
\axlen_cnt_reg[3]\ : out STD_LOGIC;
Q : out STD_LOGIC_VECTOR ( 54 downto 0 );
axaddr_incr : out STD_LOGIC_VECTOR ( 11 downto 0 );
D : out STD_LOGIC_VECTOR ( 1 downto 0 );
\wrap_second_len_r_reg[3]\ : out STD_LOGIC_VECTOR ( 2 downto 0 );
\wrap_cnt_r_reg[2]\ : out STD_LOGIC;
\axaddr_offset_r_reg[0]\ : out STD_LOGIC;
axaddr_offset : out STD_LOGIC_VECTOR ( 1 downto 0 );
\wrap_cnt_r_reg[3]\ : out STD_LOGIC;
\axaddr_offset_r_reg[2]\ : out STD_LOGIC;
next_pending_r_reg : out STD_LOGIC;
\wrap_boundary_axaddr_r_reg[6]\ : out STD_LOGIC_VECTOR ( 6 downto 0 );
\aresetn_d_reg[1]_inv\ : out STD_LOGIC;
aclk : in STD_LOGIC;
\aresetn_d_reg[1]_inv_0\ : in STD_LOGIC;
aresetn : in STD_LOGIC;
\state_reg[1]\ : in STD_LOGIC_VECTOR ( 1 downto 0 );
S : in STD_LOGIC_VECTOR ( 3 downto 0 );
\wrap_second_len_r_reg[3]_0\ : in STD_LOGIC_VECTOR ( 3 downto 0 );
\state_reg[1]_rep\ : in STD_LOGIC;
\wrap_second_len_r_reg[1]\ : in STD_LOGIC;
\axaddr_offset_r_reg[2]_0\ : in STD_LOGIC_VECTOR ( 0 to 0 );
\axaddr_offset_r_reg[3]\ : in STD_LOGIC_VECTOR ( 2 downto 0 );
\axaddr_offset_r_reg[3]_0\ : in STD_LOGIC;
\axaddr_offset_r_reg[2]_1\ : in STD_LOGIC;
\state_reg[0]_rep\ : in STD_LOGIC;
\state_reg[1]_rep_0\ : in STD_LOGIC;
s_axi_awvalid : in STD_LOGIC;
b_push : in STD_LOGIC;
s_axi_awid : in STD_LOGIC_VECTOR ( 11 downto 0 );
s_axi_awlen : in STD_LOGIC_VECTOR ( 3 downto 0 );
s_axi_awburst : in STD_LOGIC_VECTOR ( 1 downto 0 );
s_axi_awsize : in STD_LOGIC_VECTOR ( 1 downto 0 );
s_axi_awprot : in STD_LOGIC_VECTOR ( 2 downto 0 );
s_axi_awaddr : in STD_LOGIC_VECTOR ( 31 downto 0 );
E : in STD_LOGIC_VECTOR ( 0 to 0 )
);
attribute ORIG_REF_NAME : string;
attribute ORIG_REF_NAME of decalper_eb_ot_sdeen_pot_pi_dehcac_xnilix_axi_register_slice_v2_1_17_axic_register_slice_0 : entity is "axi_register_slice_v2_1_17_axic_register_slice";
end decalper_eb_ot_sdeen_pot_pi_dehcac_xnilix_axi_register_slice_v2_1_17_axic_register_slice_0;
architecture STRUCTURE of decalper_eb_ot_sdeen_pot_pi_dehcac_xnilix_axi_register_slice_v2_1_17_axic_register_slice_0 is
signal \^q\ : STD_LOGIC_VECTOR ( 54 downto 0 );
signal \aresetn_d_reg_n_0_[0]\ : STD_LOGIC;
signal \axaddr_incr[3]_i_4_n_0\ : STD_LOGIC;
signal \axaddr_incr[3]_i_5_n_0\ : STD_LOGIC;
signal \axaddr_incr[3]_i_6_n_0\ : STD_LOGIC;
signal \axaddr_incr_reg[11]_i_3_n_1\ : STD_LOGIC;
signal \axaddr_incr_reg[11]_i_3_n_2\ : STD_LOGIC;
signal \axaddr_incr_reg[11]_i_3_n_3\ : STD_LOGIC;
signal \axaddr_incr_reg[3]_i_2_n_0\ : STD_LOGIC;
signal \axaddr_incr_reg[3]_i_2_n_1\ : STD_LOGIC;
signal \axaddr_incr_reg[3]_i_2_n_2\ : STD_LOGIC;
signal \axaddr_incr_reg[3]_i_2_n_3\ : STD_LOGIC;
signal \axaddr_incr_reg[7]_i_2_n_0\ : STD_LOGIC;
signal \axaddr_incr_reg[7]_i_2_n_1\ : STD_LOGIC;
signal \axaddr_incr_reg[7]_i_2_n_2\ : STD_LOGIC;
signal \axaddr_incr_reg[7]_i_2_n_3\ : STD_LOGIC;
signal \^axaddr_offset\ : STD_LOGIC_VECTOR ( 1 downto 0 );
signal \axaddr_offset_r[0]_i_2_n_0\ : STD_LOGIC;
signal \axaddr_offset_r[1]_i_2_n_0\ : STD_LOGIC;
signal \axaddr_offset_r[3]_i_2_n_0\ : STD_LOGIC;
signal \^axaddr_offset_r_reg[0]\ : STD_LOGIC;
signal \^axaddr_offset_r_reg[2]\ : STD_LOGIC;
signal \^axlen_cnt_reg[3]\ : STD_LOGIC;
signal m_valid_i0 : STD_LOGIC;
signal \^m_valid_i_reg_0\ : STD_LOGIC;
signal \^s_axi_awready\ : STD_LOGIC;
signal s_ready_i0 : STD_LOGIC;
signal \^s_ready_i_reg_0\ : STD_LOGIC;
signal skid_buffer : STD_LOGIC_VECTOR ( 61 downto 0 );
signal \skid_buffer_reg_n_0_[0]\ : STD_LOGIC;
signal \skid_buffer_reg_n_0_[10]\ : STD_LOGIC;
signal \skid_buffer_reg_n_0_[11]\ : STD_LOGIC;
signal \skid_buffer_reg_n_0_[12]\ : STD_LOGIC;
signal \skid_buffer_reg_n_0_[13]\ : STD_LOGIC;
signal \skid_buffer_reg_n_0_[14]\ : STD_LOGIC;
signal \skid_buffer_reg_n_0_[15]\ : STD_LOGIC;
signal \skid_buffer_reg_n_0_[16]\ : STD_LOGIC;
signal \skid_buffer_reg_n_0_[17]\ : STD_LOGIC;
signal \skid_buffer_reg_n_0_[18]\ : STD_LOGIC;
signal \skid_buffer_reg_n_0_[19]\ : STD_LOGIC;
signal \skid_buffer_reg_n_0_[1]\ : STD_LOGIC;
signal \skid_buffer_reg_n_0_[20]\ : STD_LOGIC;
signal \skid_buffer_reg_n_0_[21]\ : STD_LOGIC;
signal \skid_buffer_reg_n_0_[22]\ : STD_LOGIC;
signal \skid_buffer_reg_n_0_[23]\ : STD_LOGIC;
signal \skid_buffer_reg_n_0_[24]\ : STD_LOGIC;
signal \skid_buffer_reg_n_0_[25]\ : STD_LOGIC;
signal \skid_buffer_reg_n_0_[26]\ : STD_LOGIC;
signal \skid_buffer_reg_n_0_[27]\ : STD_LOGIC;
signal \skid_buffer_reg_n_0_[28]\ : STD_LOGIC;
signal \skid_buffer_reg_n_0_[29]\ : STD_LOGIC;
signal \skid_buffer_reg_n_0_[2]\ : STD_LOGIC;
signal \skid_buffer_reg_n_0_[30]\ : STD_LOGIC;
signal \skid_buffer_reg_n_0_[31]\ : STD_LOGIC;
signal \skid_buffer_reg_n_0_[32]\ : STD_LOGIC;
signal \skid_buffer_reg_n_0_[33]\ : STD_LOGIC;
signal \skid_buffer_reg_n_0_[34]\ : STD_LOGIC;
signal \skid_buffer_reg_n_0_[35]\ : STD_LOGIC;
signal \skid_buffer_reg_n_0_[36]\ : STD_LOGIC;
signal \skid_buffer_reg_n_0_[38]\ : STD_LOGIC;
signal \skid_buffer_reg_n_0_[39]\ : STD_LOGIC;
signal \skid_buffer_reg_n_0_[3]\ : STD_LOGIC;
signal \skid_buffer_reg_n_0_[44]\ : STD_LOGIC;
signal \skid_buffer_reg_n_0_[45]\ : STD_LOGIC;
signal \skid_buffer_reg_n_0_[46]\ : STD_LOGIC;
signal \skid_buffer_reg_n_0_[47]\ : STD_LOGIC;
signal \skid_buffer_reg_n_0_[4]\ : STD_LOGIC;
signal \skid_buffer_reg_n_0_[50]\ : STD_LOGIC;
signal \skid_buffer_reg_n_0_[51]\ : STD_LOGIC;
signal \skid_buffer_reg_n_0_[52]\ : STD_LOGIC;
signal \skid_buffer_reg_n_0_[53]\ : STD_LOGIC;
signal \skid_buffer_reg_n_0_[54]\ : STD_LOGIC;
signal \skid_buffer_reg_n_0_[55]\ : STD_LOGIC;
signal \skid_buffer_reg_n_0_[56]\ : STD_LOGIC;
signal \skid_buffer_reg_n_0_[57]\ : STD_LOGIC;
signal \skid_buffer_reg_n_0_[58]\ : STD_LOGIC;
signal \skid_buffer_reg_n_0_[59]\ : STD_LOGIC;
signal \skid_buffer_reg_n_0_[5]\ : STD_LOGIC;
signal \skid_buffer_reg_n_0_[60]\ : STD_LOGIC;
signal \skid_buffer_reg_n_0_[61]\ : STD_LOGIC;
signal \skid_buffer_reg_n_0_[6]\ : STD_LOGIC;
signal \skid_buffer_reg_n_0_[7]\ : STD_LOGIC;
signal \skid_buffer_reg_n_0_[8]\ : STD_LOGIC;
signal \skid_buffer_reg_n_0_[9]\ : STD_LOGIC;
signal \wrap_boundary_axaddr_r[3]_i_2_n_0\ : STD_LOGIC;
signal \wrap_cnt_r[3]_i_5_n_0\ : STD_LOGIC;
signal \^wrap_cnt_r_reg[2]\ : STD_LOGIC;
signal \wrap_second_len_r[3]_i_2_n_0\ : STD_LOGIC;
signal \wrap_second_len_r[3]_i_3_n_0\ : STD_LOGIC;
signal \^wrap_second_len_r_reg[3]\ : STD_LOGIC_VECTOR ( 2 downto 0 );
signal \NLW_axaddr_incr_reg[11]_i_3_CO_UNCONNECTED\ : STD_LOGIC_VECTOR ( 3 to 3 );
attribute SOFT_HLUTNM : string;
attribute SOFT_HLUTNM of \m_payload_i[10]_i_1\ : label is "soft_lutpair72";
attribute SOFT_HLUTNM of \m_payload_i[11]_i_1\ : label is "soft_lutpair71";
attribute SOFT_HLUTNM of \m_payload_i[12]_i_1\ : label is "soft_lutpair71";
attribute SOFT_HLUTNM of \m_payload_i[13]_i_1__0\ : label is "soft_lutpair70";
attribute SOFT_HLUTNM of \m_payload_i[14]_i_1\ : label is "soft_lutpair70";
attribute SOFT_HLUTNM of \m_payload_i[15]_i_1\ : label is "soft_lutpair69";
attribute SOFT_HLUTNM of \m_payload_i[16]_i_1\ : label is "soft_lutpair69";
attribute SOFT_HLUTNM of \m_payload_i[17]_i_1\ : label is "soft_lutpair68";
attribute SOFT_HLUTNM of \m_payload_i[18]_i_1\ : label is "soft_lutpair68";
attribute SOFT_HLUTNM of \m_payload_i[19]_i_1\ : label is "soft_lutpair67";
attribute SOFT_HLUTNM of \m_payload_i[1]_i_1\ : label is "soft_lutpair76";
attribute SOFT_HLUTNM of \m_payload_i[20]_i_1\ : label is "soft_lutpair67";
attribute SOFT_HLUTNM of \m_payload_i[21]_i_1\ : label is "soft_lutpair66";
attribute SOFT_HLUTNM of \m_payload_i[22]_i_1\ : label is "soft_lutpair66";
attribute SOFT_HLUTNM of \m_payload_i[23]_i_1\ : label is "soft_lutpair65";
attribute SOFT_HLUTNM of \m_payload_i[24]_i_1\ : label is "soft_lutpair65";
attribute SOFT_HLUTNM of \m_payload_i[25]_i_1\ : label is "soft_lutpair64";
attribute SOFT_HLUTNM of \m_payload_i[26]_i_1\ : label is "soft_lutpair64";
attribute SOFT_HLUTNM of \m_payload_i[27]_i_1\ : label is "soft_lutpair63";
attribute SOFT_HLUTNM of \m_payload_i[28]_i_1\ : label is "soft_lutpair63";
attribute SOFT_HLUTNM of \m_payload_i[29]_i_1\ : label is "soft_lutpair62";
attribute SOFT_HLUTNM of \m_payload_i[2]_i_1\ : label is "soft_lutpair76";
attribute SOFT_HLUTNM of \m_payload_i[30]_i_1\ : label is "soft_lutpair62";
attribute SOFT_HLUTNM of \m_payload_i[31]_i_2\ : label is "soft_lutpair61";
attribute SOFT_HLUTNM of \m_payload_i[32]_i_1\ : label is "soft_lutpair61";
attribute SOFT_HLUTNM of \m_payload_i[33]_i_1\ : label is "soft_lutpair60";
attribute SOFT_HLUTNM of \m_payload_i[34]_i_1\ : label is "soft_lutpair60";
attribute SOFT_HLUTNM of \m_payload_i[35]_i_1\ : label is "soft_lutpair59";
attribute SOFT_HLUTNM of \m_payload_i[36]_i_1\ : label is "soft_lutpair59";
attribute SOFT_HLUTNM of \m_payload_i[38]_i_1\ : label is "soft_lutpair58";
attribute SOFT_HLUTNM of \m_payload_i[39]_i_1\ : label is "soft_lutpair58";
attribute SOFT_HLUTNM of \m_payload_i[3]_i_1\ : label is "soft_lutpair75";
attribute SOFT_HLUTNM of \m_payload_i[44]_i_1\ : label is "soft_lutpair57";
attribute SOFT_HLUTNM of \m_payload_i[45]_i_1\ : label is "soft_lutpair57";
attribute SOFT_HLUTNM of \m_payload_i[46]_i_1__0\ : label is "soft_lutpair56";
attribute SOFT_HLUTNM of \m_payload_i[47]_i_1\ : label is "soft_lutpair56";
attribute SOFT_HLUTNM of \m_payload_i[4]_i_1\ : label is "soft_lutpair75";
attribute SOFT_HLUTNM of \m_payload_i[50]_i_1\ : label is "soft_lutpair55";
attribute SOFT_HLUTNM of \m_payload_i[51]_i_1\ : label is "soft_lutpair55";
attribute SOFT_HLUTNM of \m_payload_i[52]_i_1\ : label is "soft_lutpair54";
attribute SOFT_HLUTNM of \m_payload_i[53]_i_1\ : label is "soft_lutpair54";
attribute SOFT_HLUTNM of \m_payload_i[54]_i_1\ : label is "soft_lutpair53";
attribute SOFT_HLUTNM of \m_payload_i[55]_i_1\ : label is "soft_lutpair53";
attribute SOFT_HLUTNM of \m_payload_i[56]_i_1\ : label is "soft_lutpair52";
attribute SOFT_HLUTNM of \m_payload_i[57]_i_1\ : label is "soft_lutpair52";
attribute SOFT_HLUTNM of \m_payload_i[58]_i_1\ : label is "soft_lutpair51";
attribute SOFT_HLUTNM of \m_payload_i[59]_i_1\ : label is "soft_lutpair51";
attribute SOFT_HLUTNM of \m_payload_i[5]_i_1\ : label is "soft_lutpair74";
attribute SOFT_HLUTNM of \m_payload_i[60]_i_1\ : label is "soft_lutpair50";
attribute SOFT_HLUTNM of \m_payload_i[61]_i_1\ : label is "soft_lutpair50";
attribute SOFT_HLUTNM of \m_payload_i[6]_i_1\ : label is "soft_lutpair74";
attribute SOFT_HLUTNM of \m_payload_i[7]_i_1\ : label is "soft_lutpair73";
attribute SOFT_HLUTNM of \m_payload_i[8]_i_1\ : label is "soft_lutpair73";
attribute SOFT_HLUTNM of \m_payload_i[9]_i_1\ : label is "soft_lutpair72";
attribute SOFT_HLUTNM of \wrap_boundary_axaddr_r[3]_i_2\ : label is "soft_lutpair49";
attribute SOFT_HLUTNM of \wrap_boundary_axaddr_r[5]_i_1\ : label is "soft_lutpair49";
begin
Q(54 downto 0) <= \^q\(54 downto 0);
axaddr_offset(1 downto 0) <= \^axaddr_offset\(1 downto 0);
\axaddr_offset_r_reg[0]\ <= \^axaddr_offset_r_reg[0]\;
\axaddr_offset_r_reg[2]\ <= \^axaddr_offset_r_reg[2]\;
\axlen_cnt_reg[3]\ <= \^axlen_cnt_reg[3]\;
m_valid_i_reg_0 <= \^m_valid_i_reg_0\;
s_axi_awready <= \^s_axi_awready\;
s_ready_i_reg_0 <= \^s_ready_i_reg_0\;
\wrap_cnt_r_reg[2]\ <= \^wrap_cnt_r_reg[2]\;
\wrap_second_len_r_reg[3]\(2 downto 0) <= \^wrap_second_len_r_reg[3]\(2 downto 0);
\aresetn_d[1]_inv_i_1\: unisim.vcomponents.LUT2
generic map(
INIT => X"7"
)
port map (
I0 => \aresetn_d_reg_n_0_[0]\,
I1 => aresetn,
O => \aresetn_d_reg[1]_inv\
);
\aresetn_d_reg[0]\: unisim.vcomponents.FDRE
generic map(
INIT => '0'
)
port map (
C => aclk,
CE => '1',
D => aresetn,
Q => \aresetn_d_reg_n_0_[0]\,
R => '0'
);
\axaddr_incr[3]_i_4\: unisim.vcomponents.LUT3
generic map(
INIT => X"2A"
)
port map (
I0 => \^q\(2),
I1 => \^q\(35),
I2 => \^q\(36),
O => \axaddr_incr[3]_i_4_n_0\
);
\axaddr_incr[3]_i_5\: unisim.vcomponents.LUT2
generic map(
INIT => X"2"
)
port map (
I0 => \^q\(1),
I1 => \^q\(36),
O => \axaddr_incr[3]_i_5_n_0\
);
\axaddr_incr[3]_i_6\: unisim.vcomponents.LUT3
generic map(
INIT => X"02"
)
port map (
I0 => \^q\(0),
I1 => \^q\(35),
I2 => \^q\(36),
O => \axaddr_incr[3]_i_6_n_0\
);
\axaddr_incr_reg[11]_i_3\: unisim.vcomponents.CARRY4
port map (
CI => \axaddr_incr_reg[7]_i_2_n_0\,
CO(3) => \NLW_axaddr_incr_reg[11]_i_3_CO_UNCONNECTED\(3),
CO(2) => \axaddr_incr_reg[11]_i_3_n_1\,
CO(1) => \axaddr_incr_reg[11]_i_3_n_2\,
CO(0) => \axaddr_incr_reg[11]_i_3_n_3\,
CYINIT => '0',
DI(3 downto 0) => B"0000",
O(3 downto 0) => axaddr_incr(11 downto 8),
S(3 downto 0) => \^q\(11 downto 8)
);
\axaddr_incr_reg[3]_i_2\: unisim.vcomponents.CARRY4
port map (
CI => '0',
CO(3) => \axaddr_incr_reg[3]_i_2_n_0\,
CO(2) => \axaddr_incr_reg[3]_i_2_n_1\,
CO(1) => \axaddr_incr_reg[3]_i_2_n_2\,
CO(0) => \axaddr_incr_reg[3]_i_2_n_3\,
CYINIT => '0',
DI(3) => \^q\(3),
DI(2) => \axaddr_incr[3]_i_4_n_0\,
DI(1) => \axaddr_incr[3]_i_5_n_0\,
DI(0) => \axaddr_incr[3]_i_6_n_0\,
O(3 downto 0) => axaddr_incr(3 downto 0),
S(3 downto 0) => S(3 downto 0)
);
\axaddr_incr_reg[7]_i_2\: unisim.vcomponents.CARRY4
port map (
CI => \axaddr_incr_reg[3]_i_2_n_0\,
CO(3) => \axaddr_incr_reg[7]_i_2_n_0\,
CO(2) => \axaddr_incr_reg[7]_i_2_n_1\,
CO(1) => \axaddr_incr_reg[7]_i_2_n_2\,
CO(0) => \axaddr_incr_reg[7]_i_2_n_3\,
CYINIT => '0',
DI(3 downto 0) => B"0000",
O(3 downto 0) => axaddr_incr(7 downto 4),
S(3 downto 0) => \^q\(7 downto 4)
);
\axaddr_offset_r[0]_i_1\: unisim.vcomponents.LUT6
generic map(
INIT => X"FFFFF8FF00000800"
)
port map (
I0 => \axaddr_offset_r[0]_i_2_n_0\,
I1 => \^q\(39),
I2 => \state_reg[1]\(1),
I3 => \^m_valid_i_reg_0\,
I4 => \state_reg[1]\(0),
I5 => \axaddr_offset_r_reg[3]\(0),
O => \^axaddr_offset_r_reg[0]\
);
\axaddr_offset_r[0]_i_2\: unisim.vcomponents.LUT6
generic map(
INIT => X"AFA0CFCFAFA0C0C0"
)
port map (
I0 => \^q\(3),
I1 => \^q\(2),
I2 => \^q\(36),
I3 => \^q\(1),
I4 => \^q\(35),
I5 => \^q\(0),
O => \axaddr_offset_r[0]_i_2_n_0\
);
\axaddr_offset_r[1]_i_1\: unisim.vcomponents.LUT6
generic map(
INIT => X"FFFFF8FF00000800"
)
port map (
I0 => \axaddr_offset_r[1]_i_2_n_0\,
I1 => \^q\(40),
I2 => \state_reg[1]\(1),
I3 => \^m_valid_i_reg_0\,
I4 => \state_reg[1]\(0),
I5 => \axaddr_offset_r_reg[3]\(1),
O => \^axaddr_offset\(0)
);
\axaddr_offset_r[1]_i_2\: unisim.vcomponents.LUT6
generic map(
INIT => X"AFA0CFCFAFA0C0C0"
)
port map (
I0 => \^q\(4),
I1 => \^q\(3),
I2 => \^q\(36),
I3 => \^q\(2),
I4 => \^q\(35),
I5 => \^q\(1),
O => \axaddr_offset_r[1]_i_2_n_0\
);
\axaddr_offset_r[2]_i_2\: unisim.vcomponents.LUT6
generic map(
INIT => X"AFA0CFCFAFA0C0C0"
)
port map (
I0 => \^q\(5),
I1 => \^q\(4),
I2 => \^q\(36),
I3 => \^q\(3),
I4 => \^q\(35),
I5 => \^q\(2),
O => \^axaddr_offset_r_reg[2]\
);
\axaddr_offset_r[3]_i_1\: unisim.vcomponents.LUT6
generic map(
INIT => X"FFFFF8FF00000800"
)
port map (
I0 => \axaddr_offset_r[3]_i_2_n_0\,
I1 => \^q\(42),
I2 => \state_reg[1]\(1),
I3 => \^m_valid_i_reg_0\,
I4 => \state_reg[1]\(0),
I5 => \axaddr_offset_r_reg[3]\(2),
O => \^axaddr_offset\(1)
);
\axaddr_offset_r[3]_i_2\: unisim.vcomponents.LUT6
generic map(
INIT => X"AFA0CFCFAFA0C0C0"
)
port map (
I0 => \^q\(6),
I1 => \^q\(5),
I2 => \^q\(36),
I3 => \^q\(4),
I4 => \^q\(35),
I5 => \^q\(3),
O => \axaddr_offset_r[3]_i_2_n_0\
);
\axlen_cnt[3]_i_3\: unisim.vcomponents.LUT4
generic map(
INIT => X"0020"
)
port map (
I0 => \^q\(42),
I1 => \state_reg[1]\(0),
I2 => \^m_valid_i_reg_0\,
I3 => \state_reg[1]\(1),
O => \^axlen_cnt_reg[3]\
);
\m_payload_i[0]_i_1\: unisim.vcomponents.LUT3
generic map(
INIT => X"B8"
)
port map (
I0 => s_axi_awaddr(0),
I1 => \^s_axi_awready\,
I2 => \skid_buffer_reg_n_0_[0]\,
O => skid_buffer(0)
);
\m_payload_i[10]_i_1\: unisim.vcomponents.LUT3
generic map(
INIT => X"B8"
)
port map (
I0 => s_axi_awaddr(10),
I1 => \^s_axi_awready\,
I2 => \skid_buffer_reg_n_0_[10]\,
O => skid_buffer(10)
);
\m_payload_i[11]_i_1\: unisim.vcomponents.LUT3
generic map(
INIT => X"B8"
)
port map (
I0 => s_axi_awaddr(11),
I1 => \^s_axi_awready\,
I2 => \skid_buffer_reg_n_0_[11]\,
O => skid_buffer(11)
);
\m_payload_i[12]_i_1\: unisim.vcomponents.LUT3
generic map(
INIT => X"B8"
)
port map (
I0 => s_axi_awaddr(12),
I1 => \^s_axi_awready\,
I2 => \skid_buffer_reg_n_0_[12]\,
O => skid_buffer(12)
);
\m_payload_i[13]_i_1__0\: unisim.vcomponents.LUT3
generic map(
INIT => X"B8"
)
port map (
I0 => s_axi_awaddr(13),
I1 => \^s_axi_awready\,
I2 => \skid_buffer_reg_n_0_[13]\,
O => skid_buffer(13)
);
\m_payload_i[14]_i_1\: unisim.vcomponents.LUT3
generic map(
INIT => X"B8"
)
port map (
I0 => s_axi_awaddr(14),
I1 => \^s_axi_awready\,
I2 => \skid_buffer_reg_n_0_[14]\,
O => skid_buffer(14)
);
\m_payload_i[15]_i_1\: unisim.vcomponents.LUT3
generic map(
INIT => X"B8"
)
port map (
I0 => s_axi_awaddr(15),
I1 => \^s_axi_awready\,
I2 => \skid_buffer_reg_n_0_[15]\,
O => skid_buffer(15)
);
\m_payload_i[16]_i_1\: unisim.vcomponents.LUT3
generic map(
INIT => X"B8"
)
port map (
I0 => s_axi_awaddr(16),
I1 => \^s_axi_awready\,
I2 => \skid_buffer_reg_n_0_[16]\,
O => skid_buffer(16)
);
\m_payload_i[17]_i_1\: unisim.vcomponents.LUT3
generic map(
INIT => X"B8"
)
port map (
I0 => s_axi_awaddr(17),
I1 => \^s_axi_awready\,
I2 => \skid_buffer_reg_n_0_[17]\,
O => skid_buffer(17)
);
\m_payload_i[18]_i_1\: unisim.vcomponents.LUT3
generic map(
INIT => X"B8"
)
port map (
I0 => s_axi_awaddr(18),
I1 => \^s_axi_awready\,
I2 => \skid_buffer_reg_n_0_[18]\,
O => skid_buffer(18)
);
\m_payload_i[19]_i_1\: unisim.vcomponents.LUT3
generic map(
INIT => X"B8"
)
port map (
I0 => s_axi_awaddr(19),
I1 => \^s_axi_awready\,
I2 => \skid_buffer_reg_n_0_[19]\,
O => skid_buffer(19)
);
\m_payload_i[1]_i_1\: unisim.vcomponents.LUT3
generic map(
INIT => X"B8"
)
port map (
I0 => s_axi_awaddr(1),
I1 => \^s_axi_awready\,
I2 => \skid_buffer_reg_n_0_[1]\,
O => skid_buffer(1)
);
\m_payload_i[20]_i_1\: unisim.vcomponents.LUT3
generic map(
INIT => X"B8"
)
port map (
I0 => s_axi_awaddr(20),
I1 => \^s_axi_awready\,
I2 => \skid_buffer_reg_n_0_[20]\,
O => skid_buffer(20)
);
\m_payload_i[21]_i_1\: unisim.vcomponents.LUT3
generic map(
INIT => X"B8"
)
port map (
I0 => s_axi_awaddr(21),
I1 => \^s_axi_awready\,
I2 => \skid_buffer_reg_n_0_[21]\,
O => skid_buffer(21)
);
\m_payload_i[22]_i_1\: unisim.vcomponents.LUT3
generic map(
INIT => X"B8"
)
port map (
I0 => s_axi_awaddr(22),
I1 => \^s_axi_awready\,
I2 => \skid_buffer_reg_n_0_[22]\,
O => skid_buffer(22)
);
\m_payload_i[23]_i_1\: unisim.vcomponents.LUT3
generic map(
INIT => X"B8"
)
port map (
I0 => s_axi_awaddr(23),
I1 => \^s_axi_awready\,
I2 => \skid_buffer_reg_n_0_[23]\,
O => skid_buffer(23)
);
\m_payload_i[24]_i_1\: unisim.vcomponents.LUT3
generic map(
INIT => X"B8"
)
port map (
I0 => s_axi_awaddr(24),
I1 => \^s_axi_awready\,
I2 => \skid_buffer_reg_n_0_[24]\,
O => skid_buffer(24)
);
\m_payload_i[25]_i_1\: unisim.vcomponents.LUT3
generic map(
INIT => X"B8"
)
port map (
I0 => s_axi_awaddr(25),
I1 => \^s_axi_awready\,
I2 => \skid_buffer_reg_n_0_[25]\,
O => skid_buffer(25)
);
\m_payload_i[26]_i_1\: unisim.vcomponents.LUT3
generic map(
INIT => X"B8"
)
port map (
I0 => s_axi_awaddr(26),
I1 => \^s_axi_awready\,
I2 => \skid_buffer_reg_n_0_[26]\,
O => skid_buffer(26)
);
\m_payload_i[27]_i_1\: unisim.vcomponents.LUT3
generic map(
INIT => X"B8"
)
port map (
I0 => s_axi_awaddr(27),
I1 => \^s_axi_awready\,
I2 => \skid_buffer_reg_n_0_[27]\,
O => skid_buffer(27)
);
\m_payload_i[28]_i_1\: unisim.vcomponents.LUT3
generic map(
INIT => X"B8"
)
port map (
I0 => s_axi_awaddr(28),
I1 => \^s_axi_awready\,
I2 => \skid_buffer_reg_n_0_[28]\,
O => skid_buffer(28)
);
\m_payload_i[29]_i_1\: unisim.vcomponents.LUT3
generic map(
INIT => X"B8"
)
port map (
I0 => s_axi_awaddr(29),
I1 => \^s_axi_awready\,
I2 => \skid_buffer_reg_n_0_[29]\,
O => skid_buffer(29)
);
\m_payload_i[2]_i_1\: unisim.vcomponents.LUT3
generic map(
INIT => X"B8"
)
port map (
I0 => s_axi_awaddr(2),
I1 => \^s_axi_awready\,
I2 => \skid_buffer_reg_n_0_[2]\,
O => skid_buffer(2)
);
\m_payload_i[30]_i_1\: unisim.vcomponents.LUT3
generic map(
INIT => X"B8"
)
port map (
I0 => s_axi_awaddr(30),
I1 => \^s_axi_awready\,
I2 => \skid_buffer_reg_n_0_[30]\,
O => skid_buffer(30)
);
\m_payload_i[31]_i_2\: unisim.vcomponents.LUT3
generic map(
INIT => X"B8"
)
port map (
I0 => s_axi_awaddr(31),
I1 => \^s_axi_awready\,
I2 => \skid_buffer_reg_n_0_[31]\,
O => skid_buffer(31)
);
\m_payload_i[32]_i_1\: unisim.vcomponents.LUT3
generic map(
INIT => X"B8"
)
port map (
I0 => s_axi_awprot(0),
I1 => \^s_axi_awready\,
I2 => \skid_buffer_reg_n_0_[32]\,
O => skid_buffer(32)
);
\m_payload_i[33]_i_1\: unisim.vcomponents.LUT3
generic map(
INIT => X"B8"
)
port map (
I0 => s_axi_awprot(1),
I1 => \^s_axi_awready\,
I2 => \skid_buffer_reg_n_0_[33]\,
O => skid_buffer(33)
);
\m_payload_i[34]_i_1\: unisim.vcomponents.LUT3
generic map(
INIT => X"B8"
)
port map (
I0 => s_axi_awprot(2),
I1 => \^s_axi_awready\,
I2 => \skid_buffer_reg_n_0_[34]\,
O => skid_buffer(34)
);
\m_payload_i[35]_i_1\: unisim.vcomponents.LUT3
generic map(
INIT => X"B8"
)
port map (
I0 => s_axi_awsize(0),
I1 => \^s_axi_awready\,
I2 => \skid_buffer_reg_n_0_[35]\,
O => skid_buffer(35)
);
\m_payload_i[36]_i_1\: unisim.vcomponents.LUT3
generic map(
INIT => X"B8"
)
port map (
I0 => s_axi_awsize(1),
I1 => \^s_axi_awready\,
I2 => \skid_buffer_reg_n_0_[36]\,
O => skid_buffer(36)
);
\m_payload_i[38]_i_1\: unisim.vcomponents.LUT3
generic map(
INIT => X"B8"
)
port map (
I0 => s_axi_awburst(0),
I1 => \^s_axi_awready\,
I2 => \skid_buffer_reg_n_0_[38]\,
O => skid_buffer(38)
);
\m_payload_i[39]_i_1\: unisim.vcomponents.LUT3
generic map(
INIT => X"B8"
)
port map (
I0 => s_axi_awburst(1),
I1 => \^s_axi_awready\,
I2 => \skid_buffer_reg_n_0_[39]\,
O => skid_buffer(39)
);
\m_payload_i[3]_i_1\: unisim.vcomponents.LUT3
generic map(
INIT => X"B8"
)
port map (
I0 => s_axi_awaddr(3),
I1 => \^s_axi_awready\,
I2 => \skid_buffer_reg_n_0_[3]\,
O => skid_buffer(3)
);
\m_payload_i[44]_i_1\: unisim.vcomponents.LUT3
generic map(
INIT => X"B8"
)
port map (
I0 => s_axi_awlen(0),
I1 => \^s_axi_awready\,
I2 => \skid_buffer_reg_n_0_[44]\,
O => skid_buffer(44)
);
\m_payload_i[45]_i_1\: unisim.vcomponents.LUT3
generic map(
INIT => X"B8"
)
port map (
I0 => s_axi_awlen(1),
I1 => \^s_axi_awready\,
I2 => \skid_buffer_reg_n_0_[45]\,
O => skid_buffer(45)
);
\m_payload_i[46]_i_1__0\: unisim.vcomponents.LUT3
generic map(
INIT => X"B8"
)
port map (
I0 => s_axi_awlen(2),
I1 => \^s_axi_awready\,
I2 => \skid_buffer_reg_n_0_[46]\,
O => skid_buffer(46)
);
\m_payload_i[47]_i_1\: unisim.vcomponents.LUT3
generic map(
INIT => X"B8"
)
port map (
I0 => s_axi_awlen(3),
I1 => \^s_axi_awready\,
I2 => \skid_buffer_reg_n_0_[47]\,
O => skid_buffer(47)
);
\m_payload_i[4]_i_1\: unisim.vcomponents.LUT3
generic map(
INIT => X"B8"
)
port map (
I0 => s_axi_awaddr(4),
I1 => \^s_axi_awready\,
I2 => \skid_buffer_reg_n_0_[4]\,
O => skid_buffer(4)
);
\m_payload_i[50]_i_1\: unisim.vcomponents.LUT3
generic map(
INIT => X"B8"
)
port map (
I0 => s_axi_awid(0),
I1 => \^s_axi_awready\,
I2 => \skid_buffer_reg_n_0_[50]\,
O => skid_buffer(50)
);
\m_payload_i[51]_i_1\: unisim.vcomponents.LUT3
generic map(
INIT => X"B8"
)
port map (
I0 => s_axi_awid(1),
I1 => \^s_axi_awready\,
I2 => \skid_buffer_reg_n_0_[51]\,
O => skid_buffer(51)
);
\m_payload_i[52]_i_1\: unisim.vcomponents.LUT3
generic map(
INIT => X"B8"
)
port map (
I0 => s_axi_awid(2),
I1 => \^s_axi_awready\,
I2 => \skid_buffer_reg_n_0_[52]\,
O => skid_buffer(52)
);
\m_payload_i[53]_i_1\: unisim.vcomponents.LUT3
generic map(
INIT => X"B8"
)
port map (
I0 => s_axi_awid(3),
I1 => \^s_axi_awready\,
I2 => \skid_buffer_reg_n_0_[53]\,
O => skid_buffer(53)
);
\m_payload_i[54]_i_1\: unisim.vcomponents.LUT3
generic map(
INIT => X"B8"
)
port map (
I0 => s_axi_awid(4),
I1 => \^s_axi_awready\,
I2 => \skid_buffer_reg_n_0_[54]\,
O => skid_buffer(54)
);
\m_payload_i[55]_i_1\: unisim.vcomponents.LUT3
generic map(
INIT => X"B8"
)
port map (
I0 => s_axi_awid(5),
I1 => \^s_axi_awready\,
I2 => \skid_buffer_reg_n_0_[55]\,
O => skid_buffer(55)
);
\m_payload_i[56]_i_1\: unisim.vcomponents.LUT3
generic map(
INIT => X"B8"
)
port map (
I0 => s_axi_awid(6),
I1 => \^s_axi_awready\,
I2 => \skid_buffer_reg_n_0_[56]\,
O => skid_buffer(56)
);
\m_payload_i[57]_i_1\: unisim.vcomponents.LUT3
generic map(
INIT => X"B8"
)
port map (
I0 => s_axi_awid(7),
I1 => \^s_axi_awready\,
I2 => \skid_buffer_reg_n_0_[57]\,
O => skid_buffer(57)
);
\m_payload_i[58]_i_1\: unisim.vcomponents.LUT3
generic map(
INIT => X"B8"
)
port map (
I0 => s_axi_awid(8),
I1 => \^s_axi_awready\,
I2 => \skid_buffer_reg_n_0_[58]\,
O => skid_buffer(58)
);
\m_payload_i[59]_i_1\: unisim.vcomponents.LUT3
generic map(
INIT => X"B8"
)
port map (
I0 => s_axi_awid(9),
I1 => \^s_axi_awready\,
I2 => \skid_buffer_reg_n_0_[59]\,
O => skid_buffer(59)
);
\m_payload_i[5]_i_1\: unisim.vcomponents.LUT3
generic map(
INIT => X"B8"
)
port map (
I0 => s_axi_awaddr(5),
I1 => \^s_axi_awready\,
I2 => \skid_buffer_reg_n_0_[5]\,
O => skid_buffer(5)
);
\m_payload_i[60]_i_1\: unisim.vcomponents.LUT3
generic map(
INIT => X"B8"
)
port map (
I0 => s_axi_awid(10),
I1 => \^s_axi_awready\,
I2 => \skid_buffer_reg_n_0_[60]\,
O => skid_buffer(60)
);
\m_payload_i[61]_i_1\: unisim.vcomponents.LUT3
generic map(
INIT => X"B8"
)
port map (
I0 => s_axi_awid(11),
I1 => \^s_axi_awready\,
I2 => \skid_buffer_reg_n_0_[61]\,
O => skid_buffer(61)
);
\m_payload_i[6]_i_1\: unisim.vcomponents.LUT3
generic map(
INIT => X"B8"
)
port map (
I0 => s_axi_awaddr(6),
I1 => \^s_axi_awready\,
I2 => \skid_buffer_reg_n_0_[6]\,
O => skid_buffer(6)
);
\m_payload_i[7]_i_1\: unisim.vcomponents.LUT3
generic map(
INIT => X"B8"
)
port map (
I0 => s_axi_awaddr(7),
I1 => \^s_axi_awready\,
I2 => \skid_buffer_reg_n_0_[7]\,
O => skid_buffer(7)
);
\m_payload_i[8]_i_1\: unisim.vcomponents.LUT3
generic map(
INIT => X"B8"
)
port map (
I0 => s_axi_awaddr(8),
I1 => \^s_axi_awready\,
I2 => \skid_buffer_reg_n_0_[8]\,
O => skid_buffer(8)
);
\m_payload_i[9]_i_1\: unisim.vcomponents.LUT3
generic map(
INIT => X"B8"
)
port map (
I0 => s_axi_awaddr(9),
I1 => \^s_axi_awready\,
I2 => \skid_buffer_reg_n_0_[9]\,
O => skid_buffer(9)
);
\m_payload_i_reg[0]\: unisim.vcomponents.FDRE
port map (
C => aclk,
CE => E(0),
D => skid_buffer(0),
Q => \^q\(0),
R => '0'
);
\m_payload_i_reg[10]\: unisim.vcomponents.FDRE
port map (
C => aclk,
CE => E(0),
D => skid_buffer(10),
Q => \^q\(10),
R => '0'
);
\m_payload_i_reg[11]\: unisim.vcomponents.FDRE
port map (
C => aclk,
CE => E(0),
D => skid_buffer(11),
Q => \^q\(11),
R => '0'
);
\m_payload_i_reg[12]\: unisim.vcomponents.FDRE
port map (
C => aclk,
CE => E(0),
D => skid_buffer(12),
Q => \^q\(12),
R => '0'
);
\m_payload_i_reg[13]\: unisim.vcomponents.FDRE
port map (
C => aclk,
CE => E(0),
D => skid_buffer(13),
Q => \^q\(13),
R => '0'
);
\m_payload_i_reg[14]\: unisim.vcomponents.FDRE
port map (
C => aclk,
CE => E(0),
D => skid_buffer(14),
Q => \^q\(14),
R => '0'
);
\m_payload_i_reg[15]\: unisim.vcomponents.FDRE
port map (
C => aclk,
CE => E(0),
D => skid_buffer(15),
Q => \^q\(15),
R => '0'
);
\m_payload_i_reg[16]\: unisim.vcomponents.FDRE
port map (
C => aclk,
CE => E(0),
D => skid_buffer(16),
Q => \^q\(16),
R => '0'
);
\m_payload_i_reg[17]\: unisim.vcomponents.FDRE
port map (
C => aclk,
CE => E(0),
D => skid_buffer(17),
Q => \^q\(17),
R => '0'
);
\m_payload_i_reg[18]\: unisim.vcomponents.FDRE
port map (
C => aclk,
CE => E(0),
D => skid_buffer(18),
Q => \^q\(18),
R => '0'
);
\m_payload_i_reg[19]\: unisim.vcomponents.FDRE
port map (
C => aclk,
CE => E(0),
D => skid_buffer(19),
Q => \^q\(19),
R => '0'
);
\m_payload_i_reg[1]\: unisim.vcomponents.FDRE
port map (
C => aclk,
CE => E(0),
D => skid_buffer(1),
Q => \^q\(1),
R => '0'
);
\m_payload_i_reg[20]\: unisim.vcomponents.FDRE
port map (
C => aclk,
CE => E(0),
D => skid_buffer(20),
Q => \^q\(20),
R => '0'
);
\m_payload_i_reg[21]\: unisim.vcomponents.FDRE
port map (
C => aclk,
CE => E(0),
D => skid_buffer(21),
Q => \^q\(21),
R => '0'
);
\m_payload_i_reg[22]\: unisim.vcomponents.FDRE
port map (
C => aclk,
CE => E(0),
D => skid_buffer(22),
Q => \^q\(22),
R => '0'
);
\m_payload_i_reg[23]\: unisim.vcomponents.FDRE
port map (
C => aclk,
CE => E(0),
D => skid_buffer(23),
Q => \^q\(23),
R => '0'
);
\m_payload_i_reg[24]\: unisim.vcomponents.FDRE
port map (
C => aclk,
CE => E(0),
D => skid_buffer(24),
Q => \^q\(24),
R => '0'
);
\m_payload_i_reg[25]\: unisim.vcomponents.FDRE
port map (
C => aclk,
CE => E(0),
D => skid_buffer(25),
Q => \^q\(25),
R => '0'
);
\m_payload_i_reg[26]\: unisim.vcomponents.FDRE
port map (
C => aclk,
CE => E(0),
D => skid_buffer(26),
Q => \^q\(26),
R => '0'
);
\m_payload_i_reg[27]\: unisim.vcomponents.FDRE
port map (
C => aclk,
CE => E(0),
D => skid_buffer(27),
Q => \^q\(27),
R => '0'
);
\m_payload_i_reg[28]\: unisim.vcomponents.FDRE
port map (
C => aclk,
CE => E(0),
D => skid_buffer(28),
Q => \^q\(28),
R => '0'
);
\m_payload_i_reg[29]\: unisim.vcomponents.FDRE
port map (
C => aclk,
CE => E(0),
D => skid_buffer(29),
Q => \^q\(29),
R => '0'
);
\m_payload_i_reg[2]\: unisim.vcomponents.FDRE
port map (
C => aclk,
CE => E(0),
D => skid_buffer(2),
Q => \^q\(2),
R => '0'
);
\m_payload_i_reg[30]\: unisim.vcomponents.FDRE
port map (
C => aclk,
CE => E(0),
D => skid_buffer(30),
Q => \^q\(30),
R => '0'
);
\m_payload_i_reg[31]\: unisim.vcomponents.FDRE
port map (
C => aclk,
CE => E(0),
D => skid_buffer(31),
Q => \^q\(31),
R => '0'
);
\m_payload_i_reg[32]\: unisim.vcomponents.FDRE
port map (
C => aclk,
CE => E(0),
D => skid_buffer(32),
Q => \^q\(32),
R => '0'
);
\m_payload_i_reg[33]\: unisim.vcomponents.FDRE
port map (
C => aclk,
CE => E(0),
D => skid_buffer(33),
Q => \^q\(33),
R => '0'
);
\m_payload_i_reg[34]\: unisim.vcomponents.FDRE
port map (
C => aclk,
CE => E(0),
D => skid_buffer(34),
Q => \^q\(34),
R => '0'
);
\m_payload_i_reg[35]\: unisim.vcomponents.FDRE
port map (
C => aclk,
CE => E(0),
D => skid_buffer(35),
Q => \^q\(35),
R => '0'
);
\m_payload_i_reg[36]\: unisim.vcomponents.FDRE
port map (
C => aclk,
CE => E(0),
D => skid_buffer(36),
Q => \^q\(36),
R => '0'
);
\m_payload_i_reg[38]\: unisim.vcomponents.FDRE
port map (
C => aclk,
CE => E(0),
D => skid_buffer(38),
Q => \^q\(37),
R => '0'
);
\m_payload_i_reg[39]\: unisim.vcomponents.FDRE
port map (
C => aclk,
CE => E(0),
D => skid_buffer(39),
Q => \^q\(38),
R => '0'
);
\m_payload_i_reg[3]\: unisim.vcomponents.FDRE
port map (
C => aclk,
CE => E(0),
D => skid_buffer(3),
Q => \^q\(3),
R => '0'
);
\m_payload_i_reg[44]\: unisim.vcomponents.FDRE
port map (
C => aclk,
CE => E(0),
D => skid_buffer(44),
Q => \^q\(39),
R => '0'
);
\m_payload_i_reg[45]\: unisim.vcomponents.FDRE
port map (
C => aclk,
CE => E(0),
D => skid_buffer(45),
Q => \^q\(40),
R => '0'
);
\m_payload_i_reg[46]\: unisim.vcomponents.FDRE
port map (
C => aclk,
CE => E(0),
D => skid_buffer(46),
Q => \^q\(41),
R => '0'
);
\m_payload_i_reg[47]\: unisim.vcomponents.FDRE
port map (
C => aclk,
CE => E(0),
D => skid_buffer(47),
Q => \^q\(42),
R => '0'
);
\m_payload_i_reg[4]\: unisim.vcomponents.FDRE
port map (
C => aclk,
CE => E(0),
D => skid_buffer(4),
Q => \^q\(4),
R => '0'
);
\m_payload_i_reg[50]\: unisim.vcomponents.FDRE
port map (
C => aclk,
CE => E(0),
D => skid_buffer(50),
Q => \^q\(43),
R => '0'
);
\m_payload_i_reg[51]\: unisim.vcomponents.FDRE
port map (
C => aclk,
CE => E(0),
D => skid_buffer(51),
Q => \^q\(44),
R => '0'
);
\m_payload_i_reg[52]\: unisim.vcomponents.FDRE
port map (
C => aclk,
CE => E(0),
D => skid_buffer(52),
Q => \^q\(45),
R => '0'
);
\m_payload_i_reg[53]\: unisim.vcomponents.FDRE
port map (
C => aclk,
CE => E(0),
D => skid_buffer(53),
Q => \^q\(46),
R => '0'
);
\m_payload_i_reg[54]\: unisim.vcomponents.FDRE
port map (
C => aclk,
CE => E(0),
D => skid_buffer(54),
Q => \^q\(47),
R => '0'
);
\m_payload_i_reg[55]\: unisim.vcomponents.FDRE
port map (
C => aclk,
CE => E(0),
D => skid_buffer(55),
Q => \^q\(48),
R => '0'
);
\m_payload_i_reg[56]\: unisim.vcomponents.FDRE
port map (
C => aclk,
CE => E(0),
D => skid_buffer(56),
Q => \^q\(49),
R => '0'
);
\m_payload_i_reg[57]\: unisim.vcomponents.FDRE
port map (
C => aclk,
CE => E(0),
D => skid_buffer(57),
Q => \^q\(50),
R => '0'
);
\m_payload_i_reg[58]\: unisim.vcomponents.FDRE
port map (
C => aclk,
CE => E(0),
D => skid_buffer(58),
Q => \^q\(51),
R => '0'
);
\m_payload_i_reg[59]\: unisim.vcomponents.FDRE
port map (
C => aclk,
CE => E(0),
D => skid_buffer(59),
Q => \^q\(52),
R => '0'
);
\m_payload_i_reg[5]\: unisim.vcomponents.FDRE
port map (
C => aclk,
CE => E(0),
D => skid_buffer(5),
Q => \^q\(5),
R => '0'
);
\m_payload_i_reg[60]\: unisim.vcomponents.FDRE
port map (
C => aclk,
CE => E(0),
D => skid_buffer(60),
Q => \^q\(53),
R => '0'
);
\m_payload_i_reg[61]\: unisim.vcomponents.FDRE
port map (
C => aclk,
CE => E(0),
D => skid_buffer(61),
Q => \^q\(54),
R => '0'
);
\m_payload_i_reg[6]\: unisim.vcomponents.FDRE
port map (
C => aclk,
CE => E(0),
D => skid_buffer(6),
Q => \^q\(6),
R => '0'
);
\m_payload_i_reg[7]\: unisim.vcomponents.FDRE
port map (
C => aclk,
CE => E(0),
D => skid_buffer(7),
Q => \^q\(7),
R => '0'
);
\m_payload_i_reg[8]\: unisim.vcomponents.FDRE
port map (
C => aclk,
CE => E(0),
D => skid_buffer(8),
Q => \^q\(8),
R => '0'
);
\m_payload_i_reg[9]\: unisim.vcomponents.FDRE
port map (
C => aclk,
CE => E(0),
D => skid_buffer(9),
Q => \^q\(9),
R => '0'
);
m_valid_i_i_1: unisim.vcomponents.LUT4
generic map(
INIT => X"F4FF"
)
port map (
I0 => b_push,
I1 => \^m_valid_i_reg_0\,
I2 => s_axi_awvalid,
I3 => \^s_axi_awready\,
O => m_valid_i0
);
m_valid_i_reg: unisim.vcomponents.FDRE
generic map(
INIT => '0'
)
port map (
C => aclk,
CE => '1',
D => m_valid_i0,
Q => \^m_valid_i_reg_0\,
R => \aresetn_d_reg[1]_inv_0\
);
next_pending_r_i_4: unisim.vcomponents.LUT5
generic map(
INIT => X"AAAAAAA8"
)
port map (
I0 => \state_reg[1]_rep\,
I1 => \^q\(42),
I2 => \^q\(40),
I3 => \^q\(39),
I4 => \^q\(41),
O => next_pending_r_reg
);
\s_ready_i_i_1__1\: unisim.vcomponents.LUT1
generic map(
INIT => X"1"
)
port map (
I0 => \aresetn_d_reg_n_0_[0]\,
O => \^s_ready_i_reg_0\
);
s_ready_i_i_2: unisim.vcomponents.LUT4
generic map(
INIT => X"F4FF"
)
port map (
I0 => s_axi_awvalid,
I1 => \^s_axi_awready\,
I2 => b_push,
I3 => \^m_valid_i_reg_0\,
O => s_ready_i0
);
s_ready_i_reg: unisim.vcomponents.FDRE
generic map(
INIT => '0'
)
port map (
C => aclk,
CE => '1',
D => s_ready_i0,
Q => \^s_axi_awready\,
R => \^s_ready_i_reg_0\
);
\skid_buffer_reg[0]\: unisim.vcomponents.FDRE
port map (
C => aclk,
CE => \^s_axi_awready\,
D => s_axi_awaddr(0),
Q => \skid_buffer_reg_n_0_[0]\,
R => '0'
);
\skid_buffer_reg[10]\: unisim.vcomponents.FDRE
port map (
C => aclk,
CE => \^s_axi_awready\,
D => s_axi_awaddr(10),
Q => \skid_buffer_reg_n_0_[10]\,
R => '0'
);
\skid_buffer_reg[11]\: unisim.vcomponents.FDRE
port map (
C => aclk,
CE => \^s_axi_awready\,
D => s_axi_awaddr(11),
Q => \skid_buffer_reg_n_0_[11]\,
R => '0'
);
\skid_buffer_reg[12]\: unisim.vcomponents.FDRE
port map (
C => aclk,
CE => \^s_axi_awready\,
D => s_axi_awaddr(12),
Q => \skid_buffer_reg_n_0_[12]\,
R => '0'
);
\skid_buffer_reg[13]\: unisim.vcomponents.FDRE
port map (
C => aclk,
CE => \^s_axi_awready\,
D => s_axi_awaddr(13),
Q => \skid_buffer_reg_n_0_[13]\,
R => '0'
);
\skid_buffer_reg[14]\: unisim.vcomponents.FDRE
port map (
C => aclk,
CE => \^s_axi_awready\,
D => s_axi_awaddr(14),
Q => \skid_buffer_reg_n_0_[14]\,
R => '0'
);
\skid_buffer_reg[15]\: unisim.vcomponents.FDRE
port map (
C => aclk,
CE => \^s_axi_awready\,
D => s_axi_awaddr(15),
Q => \skid_buffer_reg_n_0_[15]\,
R => '0'
);
\skid_buffer_reg[16]\: unisim.vcomponents.FDRE
port map (
C => aclk,
CE => \^s_axi_awready\,
D => s_axi_awaddr(16),
Q => \skid_buffer_reg_n_0_[16]\,
R => '0'
);
\skid_buffer_reg[17]\: unisim.vcomponents.FDRE
port map (
C => aclk,
CE => \^s_axi_awready\,
D => s_axi_awaddr(17),
Q => \skid_buffer_reg_n_0_[17]\,
R => '0'
);
\skid_buffer_reg[18]\: unisim.vcomponents.FDRE
port map (
C => aclk,
CE => \^s_axi_awready\,
D => s_axi_awaddr(18),
Q => \skid_buffer_reg_n_0_[18]\,
R => '0'
);
\skid_buffer_reg[19]\: unisim.vcomponents.FDRE
port map (
C => aclk,
CE => \^s_axi_awready\,
D => s_axi_awaddr(19),
Q => \skid_buffer_reg_n_0_[19]\,
R => '0'
);
\skid_buffer_reg[1]\: unisim.vcomponents.FDRE
port map (
C => aclk,
CE => \^s_axi_awready\,
D => s_axi_awaddr(1),
Q => \skid_buffer_reg_n_0_[1]\,
R => '0'
);
\skid_buffer_reg[20]\: unisim.vcomponents.FDRE
port map (
C => aclk,
CE => \^s_axi_awready\,
D => s_axi_awaddr(20),
Q => \skid_buffer_reg_n_0_[20]\,
R => '0'
);
\skid_buffer_reg[21]\: unisim.vcomponents.FDRE
port map (
C => aclk,
CE => \^s_axi_awready\,
D => s_axi_awaddr(21),
Q => \skid_buffer_reg_n_0_[21]\,
R => '0'
);
\skid_buffer_reg[22]\: unisim.vcomponents.FDRE
port map (
C => aclk,
CE => \^s_axi_awready\,
D => s_axi_awaddr(22),
Q => \skid_buffer_reg_n_0_[22]\,
R => '0'
);
\skid_buffer_reg[23]\: unisim.vcomponents.FDRE
port map (
C => aclk,
CE => \^s_axi_awready\,
D => s_axi_awaddr(23),
Q => \skid_buffer_reg_n_0_[23]\,
R => '0'
);
\skid_buffer_reg[24]\: unisim.vcomponents.FDRE
port map (
C => aclk,
CE => \^s_axi_awready\,
D => s_axi_awaddr(24),
Q => \skid_buffer_reg_n_0_[24]\,
R => '0'
);
\skid_buffer_reg[25]\: unisim.vcomponents.FDRE
port map (
C => aclk,
CE => \^s_axi_awready\,
D => s_axi_awaddr(25),
Q => \skid_buffer_reg_n_0_[25]\,
R => '0'
);
\skid_buffer_reg[26]\: unisim.vcomponents.FDRE
port map (
C => aclk,
CE => \^s_axi_awready\,
D => s_axi_awaddr(26),
Q => \skid_buffer_reg_n_0_[26]\,
R => '0'
);
\skid_buffer_reg[27]\: unisim.vcomponents.FDRE
port map (
C => aclk,
CE => \^s_axi_awready\,
D => s_axi_awaddr(27),
Q => \skid_buffer_reg_n_0_[27]\,
R => '0'
);
\skid_buffer_reg[28]\: unisim.vcomponents.FDRE
port map (
C => aclk,
CE => \^s_axi_awready\,
D => s_axi_awaddr(28),
Q => \skid_buffer_reg_n_0_[28]\,
R => '0'
);
\skid_buffer_reg[29]\: unisim.vcomponents.FDRE
port map (
C => aclk,
CE => \^s_axi_awready\,
D => s_axi_awaddr(29),
Q => \skid_buffer_reg_n_0_[29]\,
R => '0'
);
\skid_buffer_reg[2]\: unisim.vcomponents.FDRE
port map (
C => aclk,
CE => \^s_axi_awready\,
D => s_axi_awaddr(2),
Q => \skid_buffer_reg_n_0_[2]\,
R => '0'
);
\skid_buffer_reg[30]\: unisim.vcomponents.FDRE
port map (
C => aclk,
CE => \^s_axi_awready\,
D => s_axi_awaddr(30),
Q => \skid_buffer_reg_n_0_[30]\,
R => '0'
);
\skid_buffer_reg[31]\: unisim.vcomponents.FDRE
port map (
C => aclk,
CE => \^s_axi_awready\,
D => s_axi_awaddr(31),
Q => \skid_buffer_reg_n_0_[31]\,
R => '0'
);
\skid_buffer_reg[32]\: unisim.vcomponents.FDRE
port map (
C => aclk,
CE => \^s_axi_awready\,
D => s_axi_awprot(0),
Q => \skid_buffer_reg_n_0_[32]\,
R => '0'
);
\skid_buffer_reg[33]\: unisim.vcomponents.FDRE
port map (
C => aclk,
CE => \^s_axi_awready\,
D => s_axi_awprot(1),
Q => \skid_buffer_reg_n_0_[33]\,
R => '0'
);
\skid_buffer_reg[34]\: unisim.vcomponents.FDRE
port map (
C => aclk,
CE => \^s_axi_awready\,
D => s_axi_awprot(2),
Q => \skid_buffer_reg_n_0_[34]\,
R => '0'
);
\skid_buffer_reg[35]\: unisim.vcomponents.FDRE
port map (
C => aclk,
CE => \^s_axi_awready\,
D => s_axi_awsize(0),
Q => \skid_buffer_reg_n_0_[35]\,
R => '0'
);
\skid_buffer_reg[36]\: unisim.vcomponents.FDRE
port map (
C => aclk,
CE => \^s_axi_awready\,
D => s_axi_awsize(1),
Q => \skid_buffer_reg_n_0_[36]\,
R => '0'
);
\skid_buffer_reg[38]\: unisim.vcomponents.FDRE
port map (
C => aclk,
CE => \^s_axi_awready\,
D => s_axi_awburst(0),
Q => \skid_buffer_reg_n_0_[38]\,
R => '0'
);
\skid_buffer_reg[39]\: unisim.vcomponents.FDRE
port map (
C => aclk,
CE => \^s_axi_awready\,
D => s_axi_awburst(1),
Q => \skid_buffer_reg_n_0_[39]\,
R => '0'
);
\skid_buffer_reg[3]\: unisim.vcomponents.FDRE
port map (
C => aclk,
CE => \^s_axi_awready\,
D => s_axi_awaddr(3),
Q => \skid_buffer_reg_n_0_[3]\,
R => '0'
);
\skid_buffer_reg[44]\: unisim.vcomponents.FDRE
port map (
C => aclk,
CE => \^s_axi_awready\,
D => s_axi_awlen(0),
Q => \skid_buffer_reg_n_0_[44]\,
R => '0'
);
\skid_buffer_reg[45]\: unisim.vcomponents.FDRE
port map (
C => aclk,
CE => \^s_axi_awready\,
D => s_axi_awlen(1),
Q => \skid_buffer_reg_n_0_[45]\,
R => '0'
);
\skid_buffer_reg[46]\: unisim.vcomponents.FDRE
port map (
C => aclk,
CE => \^s_axi_awready\,
D => s_axi_awlen(2),
Q => \skid_buffer_reg_n_0_[46]\,
R => '0'
);
\skid_buffer_reg[47]\: unisim.vcomponents.FDRE
port map (
C => aclk,
CE => \^s_axi_awready\,
D => s_axi_awlen(3),
Q => \skid_buffer_reg_n_0_[47]\,
R => '0'
);
\skid_buffer_reg[4]\: unisim.vcomponents.FDRE
port map (
C => aclk,
CE => \^s_axi_awready\,
D => s_axi_awaddr(4),
Q => \skid_buffer_reg_n_0_[4]\,
R => '0'
);
\skid_buffer_reg[50]\: unisim.vcomponents.FDRE
port map (
C => aclk,
CE => \^s_axi_awready\,
D => s_axi_awid(0),
Q => \skid_buffer_reg_n_0_[50]\,
R => '0'
);
\skid_buffer_reg[51]\: unisim.vcomponents.FDRE
port map (
C => aclk,
CE => \^s_axi_awready\,
D => s_axi_awid(1),
Q => \skid_buffer_reg_n_0_[51]\,
R => '0'
);
\skid_buffer_reg[52]\: unisim.vcomponents.FDRE
port map (
C => aclk,
CE => \^s_axi_awready\,
D => s_axi_awid(2),
Q => \skid_buffer_reg_n_0_[52]\,
R => '0'
);
\skid_buffer_reg[53]\: unisim.vcomponents.FDRE
port map (
C => aclk,
CE => \^s_axi_awready\,
D => s_axi_awid(3),
Q => \skid_buffer_reg_n_0_[53]\,
R => '0'
);
\skid_buffer_reg[54]\: unisim.vcomponents.FDRE
port map (
C => aclk,
CE => \^s_axi_awready\,
D => s_axi_awid(4),
Q => \skid_buffer_reg_n_0_[54]\,
R => '0'
);
\skid_buffer_reg[55]\: unisim.vcomponents.FDRE
port map (
C => aclk,
CE => \^s_axi_awready\,
D => s_axi_awid(5),
Q => \skid_buffer_reg_n_0_[55]\,
R => '0'
);
\skid_buffer_reg[56]\: unisim.vcomponents.FDRE
port map (
C => aclk,
CE => \^s_axi_awready\,
D => s_axi_awid(6),
Q => \skid_buffer_reg_n_0_[56]\,
R => '0'
);
\skid_buffer_reg[57]\: unisim.vcomponents.FDRE
port map (
C => aclk,
CE => \^s_axi_awready\,
D => s_axi_awid(7),
Q => \skid_buffer_reg_n_0_[57]\,
R => '0'
);
\skid_buffer_reg[58]\: unisim.vcomponents.FDRE
port map (
C => aclk,
CE => \^s_axi_awready\,
D => s_axi_awid(8),
Q => \skid_buffer_reg_n_0_[58]\,
R => '0'
);
\skid_buffer_reg[59]\: unisim.vcomponents.FDRE
port map (
C => aclk,
CE => \^s_axi_awready\,
D => s_axi_awid(9),
Q => \skid_buffer_reg_n_0_[59]\,
R => '0'
);
\skid_buffer_reg[5]\: unisim.vcomponents.FDRE
port map (
C => aclk,
CE => \^s_axi_awready\,
D => s_axi_awaddr(5),
Q => \skid_buffer_reg_n_0_[5]\,
R => '0'
);
\skid_buffer_reg[60]\: unisim.vcomponents.FDRE
port map (
C => aclk,
CE => \^s_axi_awready\,
D => s_axi_awid(10),
Q => \skid_buffer_reg_n_0_[60]\,
R => '0'
);
\skid_buffer_reg[61]\: unisim.vcomponents.FDRE
port map (
C => aclk,
CE => \^s_axi_awready\,
D => s_axi_awid(11),
Q => \skid_buffer_reg_n_0_[61]\,
R => '0'
);
\skid_buffer_reg[6]\: unisim.vcomponents.FDRE
port map (
C => aclk,
CE => \^s_axi_awready\,
D => s_axi_awaddr(6),
Q => \skid_buffer_reg_n_0_[6]\,
R => '0'
);
\skid_buffer_reg[7]\: unisim.vcomponents.FDRE
port map (
C => aclk,
CE => \^s_axi_awready\,
D => s_axi_awaddr(7),
Q => \skid_buffer_reg_n_0_[7]\,
R => '0'
);
\skid_buffer_reg[8]\: unisim.vcomponents.FDRE
port map (
C => aclk,
CE => \^s_axi_awready\,
D => s_axi_awaddr(8),
Q => \skid_buffer_reg_n_0_[8]\,
R => '0'
);
\skid_buffer_reg[9]\: unisim.vcomponents.FDRE
port map (
C => aclk,
CE => \^s_axi_awready\,
D => s_axi_awaddr(9),
Q => \skid_buffer_reg_n_0_[9]\,
R => '0'
);
\wrap_boundary_axaddr_r[0]_i_1\: unisim.vcomponents.LUT4
generic map(
INIT => X"AA8A"
)
port map (
I0 => \^q\(0),
I1 => \^q\(35),
I2 => \^q\(39),
I3 => \^q\(36),
O => \wrap_boundary_axaddr_r_reg[6]\(0)
);
\wrap_boundary_axaddr_r[1]_i_1\: unisim.vcomponents.LUT5
generic map(
INIT => X"8A888AAA"
)
port map (
I0 => \^q\(1),
I1 => \^q\(36),
I2 => \^q\(39),
I3 => \^q\(35),
I4 => \^q\(40),
O => \wrap_boundary_axaddr_r_reg[6]\(1)
);
\wrap_boundary_axaddr_r[2]_i_1\: unisim.vcomponents.LUT6
generic map(
INIT => X"FF0F553300000000"
)
port map (
I0 => \^q\(40),
I1 => \^q\(41),
I2 => \^q\(39),
I3 => \^q\(35),
I4 => \^q\(36),
I5 => \^q\(2),
O => \wrap_boundary_axaddr_r_reg[6]\(2)
);
\wrap_boundary_axaddr_r[3]_i_1\: unisim.vcomponents.LUT6
generic map(
INIT => X"020202A2A2A202A2"
)
port map (
I0 => \^q\(3),
I1 => \wrap_boundary_axaddr_r[3]_i_2_n_0\,
I2 => \^q\(36),
I3 => \^q\(40),
I4 => \^q\(35),
I5 => \^q\(39),
O => \wrap_boundary_axaddr_r_reg[6]\(3)
);
\wrap_boundary_axaddr_r[3]_i_2\: unisim.vcomponents.LUT3
generic map(
INIT => X"B8"
)
port map (
I0 => \^q\(41),
I1 => \^q\(35),
I2 => \^q\(42),
O => \wrap_boundary_axaddr_r[3]_i_2_n_0\
);
\wrap_boundary_axaddr_r[4]_i_1\: unisim.vcomponents.LUT6
generic map(
INIT => X"503F5F3F00000000"
)
port map (
I0 => \^q\(40),
I1 => \^q\(41),
I2 => \^q\(36),
I3 => \^q\(35),
I4 => \^q\(42),
I5 => \^q\(4),
O => \wrap_boundary_axaddr_r_reg[6]\(4)
);
\wrap_boundary_axaddr_r[5]_i_1\: unisim.vcomponents.LUT5
generic map(
INIT => X"2A222AAA"
)
port map (
I0 => \^q\(5),
I1 => \^q\(36),
I2 => \^q\(41),
I3 => \^q\(35),
I4 => \^q\(42),
O => \wrap_boundary_axaddr_r_reg[6]\(5)
);
\wrap_boundary_axaddr_r[6]_i_1\: unisim.vcomponents.LUT4
generic map(
INIT => X"2AAA"
)
port map (
I0 => \^q\(6),
I1 => \^q\(42),
I2 => \^q\(35),
I3 => \^q\(36),
O => \wrap_boundary_axaddr_r_reg[6]\(6)
);
\wrap_cnt_r[2]_i_1\: unisim.vcomponents.LUT6
generic map(
INIT => X"AAA6AA56AAAAAAAA"
)
port map (
I0 => \^wrap_second_len_r_reg[3]\(1),
I1 => \wrap_second_len_r_reg[3]_0\(0),
I2 => \state_reg[1]_rep\,
I3 => \^wrap_cnt_r_reg[2]\,
I4 => \^axaddr_offset_r_reg[0]\,
I5 => \^wrap_second_len_r_reg[3]\(0),
O => D(0)
);
\wrap_cnt_r[3]_i_1\: unisim.vcomponents.LUT3
generic map(
INIT => X"6A"
)
port map (
I0 => \^wrap_second_len_r_reg[3]\(2),
I1 => \wrap_second_len_r_reg[1]\,
I2 => \^wrap_second_len_r_reg[3]\(1),
O => D(1)
);
\wrap_cnt_r[3]_i_3\: unisim.vcomponents.LUT6
generic map(
INIT => X"FFFFFFFFEAEAFFEA"
)
port map (
I0 => \axaddr_offset_r_reg[3]_0\,
I1 => \^axlen_cnt_reg[3]\,
I2 => \axaddr_offset_r[3]_i_2_n_0\,
I3 => \^axaddr_offset_r_reg[2]\,
I4 => \wrap_cnt_r[3]_i_5_n_0\,
I5 => \axaddr_offset_r_reg[2]_1\,
O => \wrap_cnt_r_reg[3]\
);
\wrap_cnt_r[3]_i_5\: unisim.vcomponents.LUT4
generic map(
INIT => X"FFDF"
)
port map (
I0 => \^q\(41),
I1 => \state_reg[0]_rep\,
I2 => \^m_valid_i_reg_0\,
I3 => \state_reg[1]_rep_0\,
O => \wrap_cnt_r[3]_i_5_n_0\
);
\wrap_second_len_r[0]_i_2\: unisim.vcomponents.LUT6
generic map(
INIT => X"0001000000010001"
)
port map (
I0 => \^axaddr_offset_r_reg[0]\,
I1 => \^axaddr_offset\(0),
I2 => \axaddr_offset_r_reg[2]_0\(0),
I3 => \wrap_second_len_r[3]_i_2_n_0\,
I4 => \state_reg[1]_rep\,
I5 => \axaddr_offset_r_reg[3]\(2),
O => \^wrap_cnt_r_reg[2]\
);
\wrap_second_len_r[1]_i_1\: unisim.vcomponents.LUT6
generic map(
INIT => X"F00EFFFFF00E0000"
)
port map (
I0 => \^axaddr_offset\(1),
I1 => \axaddr_offset_r_reg[2]_0\(0),
I2 => \^axaddr_offset_r_reg[0]\,
I3 => \^axaddr_offset\(0),
I4 => \state_reg[1]_rep\,
I5 => \wrap_second_len_r_reg[3]_0\(1),
O => \^wrap_second_len_r_reg[3]\(0)
);
\wrap_second_len_r[2]_i_1\: unisim.vcomponents.LUT6
generic map(
INIT => X"CCC2FFFFCCC20000"
)
port map (
I0 => \^axaddr_offset\(1),
I1 => \axaddr_offset_r_reg[2]_0\(0),
I2 => \^axaddr_offset\(0),
I3 => \^axaddr_offset_r_reg[0]\,
I4 => \state_reg[1]_rep\,
I5 => \wrap_second_len_r_reg[3]_0\(2),
O => \^wrap_second_len_r_reg[3]\(1)
);
\wrap_second_len_r[3]_i_1\: unisim.vcomponents.LUT6
generic map(
INIT => X"FE00FFFFFE00FE00"
)
port map (
I0 => \^axaddr_offset_r_reg[0]\,
I1 => \^axaddr_offset\(0),
I2 => \axaddr_offset_r_reg[2]_0\(0),
I3 => \wrap_second_len_r[3]_i_2_n_0\,
I4 => \state_reg[1]_rep\,
I5 => \wrap_second_len_r_reg[3]_0\(3),
O => \^wrap_second_len_r_reg[3]\(2)
);
\wrap_second_len_r[3]_i_2\: unisim.vcomponents.LUT6
generic map(
INIT => X"A8A8A8080808A808"
)
port map (
I0 => \^axlen_cnt_reg[3]\,
I1 => \wrap_second_len_r[3]_i_3_n_0\,
I2 => \^q\(36),
I3 => \^q\(5),
I4 => \^q\(35),
I5 => \^q\(6),
O => \wrap_second_len_r[3]_i_2_n_0\
);
\wrap_second_len_r[3]_i_3\: unisim.vcomponents.LUT3
generic map(
INIT => X"B8"
)
port map (
I0 => \^q\(4),
I1 => \^q\(35),
I2 => \^q\(3),
O => \wrap_second_len_r[3]_i_3_n_0\
);
end STRUCTURE;
library IEEE;
use IEEE.STD_LOGIC_1164.ALL;
library UNISIM;
use UNISIM.VCOMPONENTS.ALL;
entity \decalper_eb_ot_sdeen_pot_pi_dehcac_xnilix_axi_register_slice_v2_1_17_axic_register_slice__parameterized1\ is
port (
s_axi_bvalid : out STD_LOGIC;
\skid_buffer_reg[0]_0\ : out STD_LOGIC;
\s_axi_bid[11]\ : out STD_LOGIC_VECTOR ( 13 downto 0 );
\aresetn_d_reg[1]_inv\ : in STD_LOGIC;
aclk : in STD_LOGIC;
\aresetn_d_reg[0]\ : in STD_LOGIC;
si_rs_bvalid : in STD_LOGIC;
s_axi_bready : in STD_LOGIC;
\out\ : in STD_LOGIC_VECTOR ( 11 downto 0 );
\s_bresp_acc_reg[1]\ : in STD_LOGIC_VECTOR ( 1 downto 0 )
);
attribute ORIG_REF_NAME : string;
attribute ORIG_REF_NAME of \decalper_eb_ot_sdeen_pot_pi_dehcac_xnilix_axi_register_slice_v2_1_17_axic_register_slice__parameterized1\ : entity is "axi_register_slice_v2_1_17_axic_register_slice";
end \decalper_eb_ot_sdeen_pot_pi_dehcac_xnilix_axi_register_slice_v2_1_17_axic_register_slice__parameterized1\;
architecture STRUCTURE of \decalper_eb_ot_sdeen_pot_pi_dehcac_xnilix_axi_register_slice_v2_1_17_axic_register_slice__parameterized1\ is
signal \m_payload_i[0]_i_1__1_n_0\ : STD_LOGIC;
signal \m_payload_i[10]_i_1__1_n_0\ : STD_LOGIC;
signal \m_payload_i[11]_i_1__1_n_0\ : STD_LOGIC;
signal \m_payload_i[12]_i_1__1_n_0\ : STD_LOGIC;
signal \m_payload_i[13]_i_2_n_0\ : STD_LOGIC;
signal \m_payload_i[1]_i_1__1_n_0\ : STD_LOGIC;
signal \m_payload_i[2]_i_1__1_n_0\ : STD_LOGIC;
signal \m_payload_i[3]_i_1__1_n_0\ : STD_LOGIC;
signal \m_payload_i[4]_i_1__1_n_0\ : STD_LOGIC;
signal \m_payload_i[5]_i_1__1_n_0\ : STD_LOGIC;
signal \m_payload_i[6]_i_1__1_n_0\ : STD_LOGIC;
signal \m_payload_i[7]_i_1__1_n_0\ : STD_LOGIC;
signal \m_payload_i[8]_i_1__1_n_0\ : STD_LOGIC;
signal \m_payload_i[9]_i_1__1_n_0\ : STD_LOGIC;
signal m_valid_i0 : STD_LOGIC;
signal p_1_in : STD_LOGIC;
signal \^s_axi_bvalid\ : STD_LOGIC;
signal s_ready_i0 : STD_LOGIC;
signal \^skid_buffer_reg[0]_0\ : STD_LOGIC;
signal \skid_buffer_reg_n_0_[0]\ : STD_LOGIC;
signal \skid_buffer_reg_n_0_[10]\ : STD_LOGIC;
signal \skid_buffer_reg_n_0_[11]\ : STD_LOGIC;
signal \skid_buffer_reg_n_0_[12]\ : STD_LOGIC;
signal \skid_buffer_reg_n_0_[13]\ : STD_LOGIC;
signal \skid_buffer_reg_n_0_[1]\ : STD_LOGIC;
signal \skid_buffer_reg_n_0_[2]\ : STD_LOGIC;
signal \skid_buffer_reg_n_0_[3]\ : STD_LOGIC;
signal \skid_buffer_reg_n_0_[4]\ : STD_LOGIC;
signal \skid_buffer_reg_n_0_[5]\ : STD_LOGIC;
signal \skid_buffer_reg_n_0_[6]\ : STD_LOGIC;
signal \skid_buffer_reg_n_0_[7]\ : STD_LOGIC;
signal \skid_buffer_reg_n_0_[8]\ : STD_LOGIC;
signal \skid_buffer_reg_n_0_[9]\ : STD_LOGIC;
attribute SOFT_HLUTNM : string;
attribute SOFT_HLUTNM of \m_payload_i[0]_i_1__1\ : label is "soft_lutpair83";
attribute SOFT_HLUTNM of \m_payload_i[10]_i_1__1\ : label is "soft_lutpair78";
attribute SOFT_HLUTNM of \m_payload_i[11]_i_1__1\ : label is "soft_lutpair77";
attribute SOFT_HLUTNM of \m_payload_i[12]_i_1__1\ : label is "soft_lutpair78";
attribute SOFT_HLUTNM of \m_payload_i[13]_i_2\ : label is "soft_lutpair77";
attribute SOFT_HLUTNM of \m_payload_i[1]_i_1__1\ : label is "soft_lutpair83";
attribute SOFT_HLUTNM of \m_payload_i[2]_i_1__1\ : label is "soft_lutpair82";
attribute SOFT_HLUTNM of \m_payload_i[3]_i_1__1\ : label is "soft_lutpair82";
attribute SOFT_HLUTNM of \m_payload_i[4]_i_1__1\ : label is "soft_lutpair81";
attribute SOFT_HLUTNM of \m_payload_i[5]_i_1__1\ : label is "soft_lutpair81";
attribute SOFT_HLUTNM of \m_payload_i[6]_i_1__1\ : label is "soft_lutpair80";
attribute SOFT_HLUTNM of \m_payload_i[7]_i_1__1\ : label is "soft_lutpair80";
attribute SOFT_HLUTNM of \m_payload_i[8]_i_1__1\ : label is "soft_lutpair79";
attribute SOFT_HLUTNM of \m_payload_i[9]_i_1__1\ : label is "soft_lutpair79";
begin
s_axi_bvalid <= \^s_axi_bvalid\;
\skid_buffer_reg[0]_0\ <= \^skid_buffer_reg[0]_0\;
\m_payload_i[0]_i_1__1\: unisim.vcomponents.LUT3
generic map(
INIT => X"B8"
)
port map (
I0 => \s_bresp_acc_reg[1]\(0),
I1 => \^skid_buffer_reg[0]_0\,
I2 => \skid_buffer_reg_n_0_[0]\,
O => \m_payload_i[0]_i_1__1_n_0\
);
\m_payload_i[10]_i_1__1\: unisim.vcomponents.LUT3
generic map(
INIT => X"B8"
)
port map (
I0 => \out\(8),
I1 => \^skid_buffer_reg[0]_0\,
I2 => \skid_buffer_reg_n_0_[10]\,
O => \m_payload_i[10]_i_1__1_n_0\
);
\m_payload_i[11]_i_1__1\: unisim.vcomponents.LUT3
generic map(
INIT => X"B8"
)
port map (
I0 => \out\(9),
I1 => \^skid_buffer_reg[0]_0\,
I2 => \skid_buffer_reg_n_0_[11]\,
O => \m_payload_i[11]_i_1__1_n_0\
);
\m_payload_i[12]_i_1__1\: unisim.vcomponents.LUT3
generic map(
INIT => X"B8"
)
port map (
I0 => \out\(10),
I1 => \^skid_buffer_reg[0]_0\,
I2 => \skid_buffer_reg_n_0_[12]\,
O => \m_payload_i[12]_i_1__1_n_0\
);
\m_payload_i[13]_i_1\: unisim.vcomponents.LUT2
generic map(
INIT => X"B"
)
port map (
I0 => s_axi_bready,
I1 => \^s_axi_bvalid\,
O => p_1_in
);
\m_payload_i[13]_i_2\: unisim.vcomponents.LUT3
generic map(
INIT => X"B8"
)
port map (
I0 => \out\(11),
I1 => \^skid_buffer_reg[0]_0\,
I2 => \skid_buffer_reg_n_0_[13]\,
O => \m_payload_i[13]_i_2_n_0\
);
\m_payload_i[1]_i_1__1\: unisim.vcomponents.LUT3
generic map(
INIT => X"B8"
)
port map (
I0 => \s_bresp_acc_reg[1]\(1),
I1 => \^skid_buffer_reg[0]_0\,
I2 => \skid_buffer_reg_n_0_[1]\,
O => \m_payload_i[1]_i_1__1_n_0\
);
\m_payload_i[2]_i_1__1\: unisim.vcomponents.LUT3
generic map(
INIT => X"B8"
)
port map (
I0 => \out\(0),
I1 => \^skid_buffer_reg[0]_0\,
I2 => \skid_buffer_reg_n_0_[2]\,
O => \m_payload_i[2]_i_1__1_n_0\
);
\m_payload_i[3]_i_1__1\: unisim.vcomponents.LUT3
generic map(
INIT => X"B8"
)
port map (
I0 => \out\(1),
I1 => \^skid_buffer_reg[0]_0\,
I2 => \skid_buffer_reg_n_0_[3]\,
O => \m_payload_i[3]_i_1__1_n_0\
);
\m_payload_i[4]_i_1__1\: unisim.vcomponents.LUT3
generic map(
INIT => X"B8"
)
port map (
I0 => \out\(2),
I1 => \^skid_buffer_reg[0]_0\,
I2 => \skid_buffer_reg_n_0_[4]\,
O => \m_payload_i[4]_i_1__1_n_0\
);
\m_payload_i[5]_i_1__1\: unisim.vcomponents.LUT3
generic map(
INIT => X"B8"
)
port map (
I0 => \out\(3),
I1 => \^skid_buffer_reg[0]_0\,
I2 => \skid_buffer_reg_n_0_[5]\,
O => \m_payload_i[5]_i_1__1_n_0\
);
\m_payload_i[6]_i_1__1\: unisim.vcomponents.LUT3
generic map(
INIT => X"B8"
)
port map (
I0 => \out\(4),
I1 => \^skid_buffer_reg[0]_0\,
I2 => \skid_buffer_reg_n_0_[6]\,
O => \m_payload_i[6]_i_1__1_n_0\
);
\m_payload_i[7]_i_1__1\: unisim.vcomponents.LUT3
generic map(
INIT => X"B8"
)
port map (
I0 => \out\(5),
I1 => \^skid_buffer_reg[0]_0\,
I2 => \skid_buffer_reg_n_0_[7]\,
O => \m_payload_i[7]_i_1__1_n_0\
);
\m_payload_i[8]_i_1__1\: unisim.vcomponents.LUT3
generic map(
INIT => X"B8"
)
port map (
I0 => \out\(6),
I1 => \^skid_buffer_reg[0]_0\,
I2 => \skid_buffer_reg_n_0_[8]\,
O => \m_payload_i[8]_i_1__1_n_0\
);
\m_payload_i[9]_i_1__1\: unisim.vcomponents.LUT3
generic map(
INIT => X"B8"
)
port map (
I0 => \out\(7),
I1 => \^skid_buffer_reg[0]_0\,
I2 => \skid_buffer_reg_n_0_[9]\,
O => \m_payload_i[9]_i_1__1_n_0\
);
\m_payload_i_reg[0]\: unisim.vcomponents.FDRE
port map (
C => aclk,
CE => p_1_in,
D => \m_payload_i[0]_i_1__1_n_0\,
Q => \s_axi_bid[11]\(0),
R => '0'
);
\m_payload_i_reg[10]\: unisim.vcomponents.FDRE
port map (
C => aclk,
CE => p_1_in,
D => \m_payload_i[10]_i_1__1_n_0\,
Q => \s_axi_bid[11]\(10),
R => '0'
);
\m_payload_i_reg[11]\: unisim.vcomponents.FDRE
port map (
C => aclk,
CE => p_1_in,
D => \m_payload_i[11]_i_1__1_n_0\,
Q => \s_axi_bid[11]\(11),
R => '0'
);
\m_payload_i_reg[12]\: unisim.vcomponents.FDRE
port map (
C => aclk,
CE => p_1_in,
D => \m_payload_i[12]_i_1__1_n_0\,
Q => \s_axi_bid[11]\(12),
R => '0'
);
\m_payload_i_reg[13]\: unisim.vcomponents.FDRE
port map (
C => aclk,
CE => p_1_in,
D => \m_payload_i[13]_i_2_n_0\,
Q => \s_axi_bid[11]\(13),
R => '0'
);
\m_payload_i_reg[1]\: unisim.vcomponents.FDRE
port map (
C => aclk,
CE => p_1_in,
D => \m_payload_i[1]_i_1__1_n_0\,
Q => \s_axi_bid[11]\(1),
R => '0'
);
\m_payload_i_reg[2]\: unisim.vcomponents.FDRE
port map (
C => aclk,
CE => p_1_in,
D => \m_payload_i[2]_i_1__1_n_0\,
Q => \s_axi_bid[11]\(2),
R => '0'
);
\m_payload_i_reg[3]\: unisim.vcomponents.FDRE
port map (
C => aclk,
CE => p_1_in,
D => \m_payload_i[3]_i_1__1_n_0\,
Q => \s_axi_bid[11]\(3),
R => '0'
);
\m_payload_i_reg[4]\: unisim.vcomponents.FDRE
port map (
C => aclk,
CE => p_1_in,
D => \m_payload_i[4]_i_1__1_n_0\,
Q => \s_axi_bid[11]\(4),
R => '0'
);
\m_payload_i_reg[5]\: unisim.vcomponents.FDRE
port map (
C => aclk,
CE => p_1_in,
D => \m_payload_i[5]_i_1__1_n_0\,
Q => \s_axi_bid[11]\(5),
R => '0'
);
\m_payload_i_reg[6]\: unisim.vcomponents.FDRE
port map (
C => aclk,
CE => p_1_in,
D => \m_payload_i[6]_i_1__1_n_0\,
Q => \s_axi_bid[11]\(6),
R => '0'
);
\m_payload_i_reg[7]\: unisim.vcomponents.FDRE
port map (
C => aclk,
CE => p_1_in,
D => \m_payload_i[7]_i_1__1_n_0\,
Q => \s_axi_bid[11]\(7),
R => '0'
);
\m_payload_i_reg[8]\: unisim.vcomponents.FDRE
port map (
C => aclk,
CE => p_1_in,
D => \m_payload_i[8]_i_1__1_n_0\,
Q => \s_axi_bid[11]\(8),
R => '0'
);
\m_payload_i_reg[9]\: unisim.vcomponents.FDRE
port map (
C => aclk,
CE => p_1_in,
D => \m_payload_i[9]_i_1__1_n_0\,
Q => \s_axi_bid[11]\(9),
R => '0'
);
\m_valid_i_i_1__0\: unisim.vcomponents.LUT4
generic map(
INIT => X"F4FF"
)
port map (
I0 => s_axi_bready,
I1 => \^s_axi_bvalid\,
I2 => si_rs_bvalid,
I3 => \^skid_buffer_reg[0]_0\,
O => m_valid_i0
);
m_valid_i_reg: unisim.vcomponents.FDRE
generic map(
INIT => '0'
)
port map (
C => aclk,
CE => '1',
D => m_valid_i0,
Q => \^s_axi_bvalid\,
R => \aresetn_d_reg[1]_inv\
);
s_ready_i_i_1: unisim.vcomponents.LUT4
generic map(
INIT => X"F4FF"
)
port map (
I0 => si_rs_bvalid,
I1 => \^skid_buffer_reg[0]_0\,
I2 => s_axi_bready,
I3 => \^s_axi_bvalid\,
O => s_ready_i0
);
s_ready_i_reg: unisim.vcomponents.FDRE
generic map(
INIT => '0'
)
port map (
C => aclk,
CE => '1',
D => s_ready_i0,
Q => \^skid_buffer_reg[0]_0\,
R => \aresetn_d_reg[0]\
);
\skid_buffer_reg[0]\: unisim.vcomponents.FDRE
port map (
C => aclk,
CE => \^skid_buffer_reg[0]_0\,
D => \s_bresp_acc_reg[1]\(0),
Q => \skid_buffer_reg_n_0_[0]\,
R => '0'
);
\skid_buffer_reg[10]\: unisim.vcomponents.FDRE
port map (
C => aclk,
CE => \^skid_buffer_reg[0]_0\,
D => \out\(8),
Q => \skid_buffer_reg_n_0_[10]\,
R => '0'
);
\skid_buffer_reg[11]\: unisim.vcomponents.FDRE
port map (
C => aclk,
CE => \^skid_buffer_reg[0]_0\,
D => \out\(9),
Q => \skid_buffer_reg_n_0_[11]\,
R => '0'
);
\skid_buffer_reg[12]\: unisim.vcomponents.FDRE
port map (
C => aclk,
CE => \^skid_buffer_reg[0]_0\,
D => \out\(10),
Q => \skid_buffer_reg_n_0_[12]\,
R => '0'
);
\skid_buffer_reg[13]\: unisim.vcomponents.FDRE
port map (
C => aclk,
CE => \^skid_buffer_reg[0]_0\,
D => \out\(11),
Q => \skid_buffer_reg_n_0_[13]\,
R => '0'
);
\skid_buffer_reg[1]\: unisim.vcomponents.FDRE
port map (
C => aclk,
CE => \^skid_buffer_reg[0]_0\,
D => \s_bresp_acc_reg[1]\(1),
Q => \skid_buffer_reg_n_0_[1]\,
R => '0'
);
\skid_buffer_reg[2]\: unisim.vcomponents.FDRE
port map (
C => aclk,
CE => \^skid_buffer_reg[0]_0\,
D => \out\(0),
Q => \skid_buffer_reg_n_0_[2]\,
R => '0'
);
\skid_buffer_reg[3]\: unisim.vcomponents.FDRE
port map (
C => aclk,
CE => \^skid_buffer_reg[0]_0\,
D => \out\(1),
Q => \skid_buffer_reg_n_0_[3]\,
R => '0'
);
\skid_buffer_reg[4]\: unisim.vcomponents.FDRE
port map (
C => aclk,
CE => \^skid_buffer_reg[0]_0\,
D => \out\(2),
Q => \skid_buffer_reg_n_0_[4]\,
R => '0'
);
\skid_buffer_reg[5]\: unisim.vcomponents.FDRE
port map (
C => aclk,
CE => \^skid_buffer_reg[0]_0\,
D => \out\(3),
Q => \skid_buffer_reg_n_0_[5]\,
R => '0'
);
\skid_buffer_reg[6]\: unisim.vcomponents.FDRE
port map (
C => aclk,
CE => \^skid_buffer_reg[0]_0\,
D => \out\(4),
Q => \skid_buffer_reg_n_0_[6]\,
R => '0'
);
\skid_buffer_reg[7]\: unisim.vcomponents.FDRE
port map (
C => aclk,
CE => \^skid_buffer_reg[0]_0\,
D => \out\(5),
Q => \skid_buffer_reg_n_0_[7]\,
R => '0'
);
\skid_buffer_reg[8]\: unisim.vcomponents.FDRE
port map (
C => aclk,
CE => \^skid_buffer_reg[0]_0\,
D => \out\(6),
Q => \skid_buffer_reg_n_0_[8]\,
R => '0'
);
\skid_buffer_reg[9]\: unisim.vcomponents.FDRE
port map (
C => aclk,
CE => \^skid_buffer_reg[0]_0\,
D => \out\(7),
Q => \skid_buffer_reg_n_0_[9]\,
R => '0'
);
end STRUCTURE;
library IEEE;
use IEEE.STD_LOGIC_1164.ALL;
library UNISIM;
use UNISIM.VCOMPONENTS.ALL;
entity \decalper_eb_ot_sdeen_pot_pi_dehcac_xnilix_axi_register_slice_v2_1_17_axic_register_slice__parameterized2\ is
port (
s_axi_rvalid : out STD_LOGIC;
\skid_buffer_reg[0]_0\ : out STD_LOGIC;
\cnt_read_reg[2]_rep__0\ : out STD_LOGIC;
\s_axi_rid[11]\ : out STD_LOGIC_VECTOR ( 46 downto 0 );
\aresetn_d_reg[1]_inv\ : in STD_LOGIC;
aclk : in STD_LOGIC;
\aresetn_d_reg[0]\ : in STD_LOGIC;
\cnt_read_reg[4]_rep__0\ : in STD_LOGIC;
s_axi_rready : in STD_LOGIC;
r_push_r_reg : in STD_LOGIC_VECTOR ( 12 downto 0 );
\cnt_read_reg[4]\ : in STD_LOGIC_VECTOR ( 33 downto 0 )
);
attribute ORIG_REF_NAME : string;
attribute ORIG_REF_NAME of \decalper_eb_ot_sdeen_pot_pi_dehcac_xnilix_axi_register_slice_v2_1_17_axic_register_slice__parameterized2\ : entity is "axi_register_slice_v2_1_17_axic_register_slice";
end \decalper_eb_ot_sdeen_pot_pi_dehcac_xnilix_axi_register_slice_v2_1_17_axic_register_slice__parameterized2\;
architecture STRUCTURE of \decalper_eb_ot_sdeen_pot_pi_dehcac_xnilix_axi_register_slice_v2_1_17_axic_register_slice__parameterized2\ is
signal \m_payload_i[0]_i_1__2_n_0\ : STD_LOGIC;
signal \m_payload_i[10]_i_1__2_n_0\ : STD_LOGIC;
signal \m_payload_i[11]_i_1__2_n_0\ : STD_LOGIC;
signal \m_payload_i[12]_i_1__2_n_0\ : STD_LOGIC;
signal \m_payload_i[13]_i_1__2_n_0\ : STD_LOGIC;
signal \m_payload_i[14]_i_1__1_n_0\ : STD_LOGIC;
signal \m_payload_i[15]_i_1__1_n_0\ : STD_LOGIC;
signal \m_payload_i[16]_i_1__1_n_0\ : STD_LOGIC;
signal \m_payload_i[17]_i_1__1_n_0\ : STD_LOGIC;
signal \m_payload_i[18]_i_1__1_n_0\ : STD_LOGIC;
signal \m_payload_i[19]_i_1__1_n_0\ : STD_LOGIC;
signal \m_payload_i[1]_i_1__2_n_0\ : STD_LOGIC;
signal \m_payload_i[20]_i_1__1_n_0\ : STD_LOGIC;
signal \m_payload_i[21]_i_1__1_n_0\ : STD_LOGIC;
signal \m_payload_i[22]_i_1__1_n_0\ : STD_LOGIC;
signal \m_payload_i[23]_i_1__1_n_0\ : STD_LOGIC;
signal \m_payload_i[24]_i_1__1_n_0\ : STD_LOGIC;
signal \m_payload_i[25]_i_1__1_n_0\ : STD_LOGIC;
signal \m_payload_i[26]_i_1__1_n_0\ : STD_LOGIC;
signal \m_payload_i[27]_i_1__1_n_0\ : STD_LOGIC;
signal \m_payload_i[28]_i_1__1_n_0\ : STD_LOGIC;
signal \m_payload_i[29]_i_1__1_n_0\ : STD_LOGIC;
signal \m_payload_i[2]_i_1__2_n_0\ : STD_LOGIC;
signal \m_payload_i[30]_i_1__1_n_0\ : STD_LOGIC;
signal \m_payload_i[31]_i_1__1_n_0\ : STD_LOGIC;
signal \m_payload_i[32]_i_1__1_n_0\ : STD_LOGIC;
signal \m_payload_i[33]_i_1__1_n_0\ : STD_LOGIC;
signal \m_payload_i[34]_i_1__1_n_0\ : STD_LOGIC;
signal \m_payload_i[35]_i_1__1_n_0\ : STD_LOGIC;
signal \m_payload_i[36]_i_1__1_n_0\ : STD_LOGIC;
signal \m_payload_i[37]_i_1_n_0\ : STD_LOGIC;
signal \m_payload_i[38]_i_1__1_n_0\ : STD_LOGIC;
signal \m_payload_i[39]_i_1__1_n_0\ : STD_LOGIC;
signal \m_payload_i[3]_i_1__2_n_0\ : STD_LOGIC;
signal \m_payload_i[40]_i_1_n_0\ : STD_LOGIC;
signal \m_payload_i[41]_i_1_n_0\ : STD_LOGIC;
signal \m_payload_i[42]_i_1_n_0\ : STD_LOGIC;
signal \m_payload_i[43]_i_1_n_0\ : STD_LOGIC;
signal \m_payload_i[44]_i_1__1_n_0\ : STD_LOGIC;
signal \m_payload_i[45]_i_1__1_n_0\ : STD_LOGIC;
signal \m_payload_i[46]_i_2_n_0\ : STD_LOGIC;
signal \m_payload_i[4]_i_1__2_n_0\ : STD_LOGIC;
signal \m_payload_i[5]_i_1__2_n_0\ : STD_LOGIC;
signal \m_payload_i[6]_i_1__2_n_0\ : STD_LOGIC;
signal \m_payload_i[7]_i_1__2_n_0\ : STD_LOGIC;
signal \m_payload_i[8]_i_1__2_n_0\ : STD_LOGIC;
signal \m_payload_i[9]_i_1__2_n_0\ : STD_LOGIC;
signal \m_valid_i_i_1__2_n_0\ : STD_LOGIC;
signal p_1_in : STD_LOGIC;
signal \^s_axi_rvalid\ : STD_LOGIC;
signal \s_ready_i_i_1__2_n_0\ : STD_LOGIC;
signal \^skid_buffer_reg[0]_0\ : STD_LOGIC;
signal \skid_buffer_reg_n_0_[0]\ : STD_LOGIC;
signal \skid_buffer_reg_n_0_[10]\ : STD_LOGIC;
signal \skid_buffer_reg_n_0_[11]\ : STD_LOGIC;
signal \skid_buffer_reg_n_0_[12]\ : STD_LOGIC;
signal \skid_buffer_reg_n_0_[13]\ : STD_LOGIC;
signal \skid_buffer_reg_n_0_[14]\ : STD_LOGIC;
signal \skid_buffer_reg_n_0_[15]\ : STD_LOGIC;
signal \skid_buffer_reg_n_0_[16]\ : STD_LOGIC;
signal \skid_buffer_reg_n_0_[17]\ : STD_LOGIC;
signal \skid_buffer_reg_n_0_[18]\ : STD_LOGIC;
signal \skid_buffer_reg_n_0_[19]\ : STD_LOGIC;
signal \skid_buffer_reg_n_0_[1]\ : STD_LOGIC;
signal \skid_buffer_reg_n_0_[20]\ : STD_LOGIC;
signal \skid_buffer_reg_n_0_[21]\ : STD_LOGIC;
signal \skid_buffer_reg_n_0_[22]\ : STD_LOGIC;
signal \skid_buffer_reg_n_0_[23]\ : STD_LOGIC;
signal \skid_buffer_reg_n_0_[24]\ : STD_LOGIC;
signal \skid_buffer_reg_n_0_[25]\ : STD_LOGIC;
signal \skid_buffer_reg_n_0_[26]\ : STD_LOGIC;
signal \skid_buffer_reg_n_0_[27]\ : STD_LOGIC;
signal \skid_buffer_reg_n_0_[28]\ : STD_LOGIC;
signal \skid_buffer_reg_n_0_[29]\ : STD_LOGIC;
signal \skid_buffer_reg_n_0_[2]\ : STD_LOGIC;
signal \skid_buffer_reg_n_0_[30]\ : STD_LOGIC;
signal \skid_buffer_reg_n_0_[31]\ : STD_LOGIC;
signal \skid_buffer_reg_n_0_[32]\ : STD_LOGIC;
signal \skid_buffer_reg_n_0_[33]\ : STD_LOGIC;
signal \skid_buffer_reg_n_0_[34]\ : STD_LOGIC;
signal \skid_buffer_reg_n_0_[35]\ : STD_LOGIC;
signal \skid_buffer_reg_n_0_[36]\ : STD_LOGIC;
signal \skid_buffer_reg_n_0_[37]\ : STD_LOGIC;
signal \skid_buffer_reg_n_0_[38]\ : STD_LOGIC;
signal \skid_buffer_reg_n_0_[39]\ : STD_LOGIC;
signal \skid_buffer_reg_n_0_[3]\ : STD_LOGIC;
signal \skid_buffer_reg_n_0_[40]\ : STD_LOGIC;
signal \skid_buffer_reg_n_0_[41]\ : STD_LOGIC;
signal \skid_buffer_reg_n_0_[42]\ : STD_LOGIC;
signal \skid_buffer_reg_n_0_[43]\ : STD_LOGIC;
signal \skid_buffer_reg_n_0_[44]\ : STD_LOGIC;
signal \skid_buffer_reg_n_0_[45]\ : STD_LOGIC;
signal \skid_buffer_reg_n_0_[46]\ : STD_LOGIC;
signal \skid_buffer_reg_n_0_[4]\ : STD_LOGIC;
signal \skid_buffer_reg_n_0_[5]\ : STD_LOGIC;
signal \skid_buffer_reg_n_0_[6]\ : STD_LOGIC;
signal \skid_buffer_reg_n_0_[7]\ : STD_LOGIC;
signal \skid_buffer_reg_n_0_[8]\ : STD_LOGIC;
signal \skid_buffer_reg_n_0_[9]\ : STD_LOGIC;
attribute SOFT_HLUTNM : string;
attribute SOFT_HLUTNM of \cnt_read[4]_i_4\ : label is "soft_lutpair84";
attribute SOFT_HLUTNM of \m_payload_i[10]_i_1__2\ : label is "soft_lutpair103";
attribute SOFT_HLUTNM of \m_payload_i[11]_i_1__2\ : label is "soft_lutpair102";
attribute SOFT_HLUTNM of \m_payload_i[12]_i_1__2\ : label is "soft_lutpair102";
attribute SOFT_HLUTNM of \m_payload_i[13]_i_1__2\ : label is "soft_lutpair101";
attribute SOFT_HLUTNM of \m_payload_i[14]_i_1__1\ : label is "soft_lutpair101";
attribute SOFT_HLUTNM of \m_payload_i[15]_i_1__1\ : label is "soft_lutpair100";
attribute SOFT_HLUTNM of \m_payload_i[16]_i_1__1\ : label is "soft_lutpair100";
attribute SOFT_HLUTNM of \m_payload_i[17]_i_1__1\ : label is "soft_lutpair99";
attribute SOFT_HLUTNM of \m_payload_i[18]_i_1__1\ : label is "soft_lutpair99";
attribute SOFT_HLUTNM of \m_payload_i[19]_i_1__1\ : label is "soft_lutpair98";
attribute SOFT_HLUTNM of \m_payload_i[1]_i_1__2\ : label is "soft_lutpair107";
attribute SOFT_HLUTNM of \m_payload_i[20]_i_1__1\ : label is "soft_lutpair98";
attribute SOFT_HLUTNM of \m_payload_i[21]_i_1__1\ : label is "soft_lutpair97";
attribute SOFT_HLUTNM of \m_payload_i[22]_i_1__1\ : label is "soft_lutpair97";
attribute SOFT_HLUTNM of \m_payload_i[23]_i_1__1\ : label is "soft_lutpair96";
attribute SOFT_HLUTNM of \m_payload_i[24]_i_1__1\ : label is "soft_lutpair96";
attribute SOFT_HLUTNM of \m_payload_i[25]_i_1__1\ : label is "soft_lutpair95";
attribute SOFT_HLUTNM of \m_payload_i[26]_i_1__1\ : label is "soft_lutpair95";
attribute SOFT_HLUTNM of \m_payload_i[27]_i_1__1\ : label is "soft_lutpair94";
attribute SOFT_HLUTNM of \m_payload_i[28]_i_1__1\ : label is "soft_lutpair94";
attribute SOFT_HLUTNM of \m_payload_i[29]_i_1__1\ : label is "soft_lutpair93";
attribute SOFT_HLUTNM of \m_payload_i[2]_i_1__2\ : label is "soft_lutpair107";
attribute SOFT_HLUTNM of \m_payload_i[30]_i_1__1\ : label is "soft_lutpair93";
attribute SOFT_HLUTNM of \m_payload_i[31]_i_1__1\ : label is "soft_lutpair92";
attribute SOFT_HLUTNM of \m_payload_i[32]_i_1__1\ : label is "soft_lutpair92";
attribute SOFT_HLUTNM of \m_payload_i[33]_i_1__1\ : label is "soft_lutpair91";
attribute SOFT_HLUTNM of \m_payload_i[34]_i_1__1\ : label is "soft_lutpair91";
attribute SOFT_HLUTNM of \m_payload_i[35]_i_1__1\ : label is "soft_lutpair90";
attribute SOFT_HLUTNM of \m_payload_i[36]_i_1__1\ : label is "soft_lutpair90";
attribute SOFT_HLUTNM of \m_payload_i[37]_i_1\ : label is "soft_lutpair89";
attribute SOFT_HLUTNM of \m_payload_i[38]_i_1__1\ : label is "soft_lutpair89";
attribute SOFT_HLUTNM of \m_payload_i[39]_i_1__1\ : label is "soft_lutpair88";
attribute SOFT_HLUTNM of \m_payload_i[3]_i_1__2\ : label is "soft_lutpair106";
attribute SOFT_HLUTNM of \m_payload_i[40]_i_1\ : label is "soft_lutpair88";
attribute SOFT_HLUTNM of \m_payload_i[41]_i_1\ : label is "soft_lutpair87";
attribute SOFT_HLUTNM of \m_payload_i[42]_i_1\ : label is "soft_lutpair87";
attribute SOFT_HLUTNM of \m_payload_i[43]_i_1\ : label is "soft_lutpair86";
attribute SOFT_HLUTNM of \m_payload_i[44]_i_1__1\ : label is "soft_lutpair85";
attribute SOFT_HLUTNM of \m_payload_i[45]_i_1__1\ : label is "soft_lutpair86";
attribute SOFT_HLUTNM of \m_payload_i[46]_i_2\ : label is "soft_lutpair85";
attribute SOFT_HLUTNM of \m_payload_i[4]_i_1__2\ : label is "soft_lutpair106";
attribute SOFT_HLUTNM of \m_payload_i[5]_i_1__2\ : label is "soft_lutpair105";
attribute SOFT_HLUTNM of \m_payload_i[6]_i_1__2\ : label is "soft_lutpair105";
attribute SOFT_HLUTNM of \m_payload_i[7]_i_1__2\ : label is "soft_lutpair104";
attribute SOFT_HLUTNM of \m_payload_i[8]_i_1__2\ : label is "soft_lutpair104";
attribute SOFT_HLUTNM of \m_payload_i[9]_i_1__2\ : label is "soft_lutpair103";
attribute SOFT_HLUTNM of \s_ready_i_i_1__2\ : label is "soft_lutpair84";
begin
s_axi_rvalid <= \^s_axi_rvalid\;
\skid_buffer_reg[0]_0\ <= \^skid_buffer_reg[0]_0\;
\cnt_read[4]_i_4\: unisim.vcomponents.LUT2
generic map(
INIT => X"2"
)
port map (
I0 => \^skid_buffer_reg[0]_0\,
I1 => \cnt_read_reg[4]_rep__0\,
O => \cnt_read_reg[2]_rep__0\
);
\m_payload_i[0]_i_1__2\: unisim.vcomponents.LUT3
generic map(
INIT => X"B8"
)
port map (
I0 => \cnt_read_reg[4]\(0),
I1 => \^skid_buffer_reg[0]_0\,
I2 => \skid_buffer_reg_n_0_[0]\,
O => \m_payload_i[0]_i_1__2_n_0\
);
\m_payload_i[10]_i_1__2\: unisim.vcomponents.LUT3
generic map(
INIT => X"B8"
)
port map (
I0 => \cnt_read_reg[4]\(10),
I1 => \^skid_buffer_reg[0]_0\,
I2 => \skid_buffer_reg_n_0_[10]\,
O => \m_payload_i[10]_i_1__2_n_0\
);
\m_payload_i[11]_i_1__2\: unisim.vcomponents.LUT3
generic map(
INIT => X"B8"
)
port map (
I0 => \cnt_read_reg[4]\(11),
I1 => \^skid_buffer_reg[0]_0\,
I2 => \skid_buffer_reg_n_0_[11]\,
O => \m_payload_i[11]_i_1__2_n_0\
);
\m_payload_i[12]_i_1__2\: unisim.vcomponents.LUT3
generic map(
INIT => X"B8"
)
port map (
I0 => \cnt_read_reg[4]\(12),
I1 => \^skid_buffer_reg[0]_0\,
I2 => \skid_buffer_reg_n_0_[12]\,
O => \m_payload_i[12]_i_1__2_n_0\
);
\m_payload_i[13]_i_1__2\: unisim.vcomponents.LUT3
generic map(
INIT => X"B8"
)
port map (
I0 => \cnt_read_reg[4]\(13),
I1 => \^skid_buffer_reg[0]_0\,
I2 => \skid_buffer_reg_n_0_[13]\,
O => \m_payload_i[13]_i_1__2_n_0\
);
\m_payload_i[14]_i_1__1\: unisim.vcomponents.LUT3
generic map(
INIT => X"B8"
)
port map (
I0 => \cnt_read_reg[4]\(14),
I1 => \^skid_buffer_reg[0]_0\,
I2 => \skid_buffer_reg_n_0_[14]\,
O => \m_payload_i[14]_i_1__1_n_0\
);
\m_payload_i[15]_i_1__1\: unisim.vcomponents.LUT3
generic map(
INIT => X"B8"
)
port map (
I0 => \cnt_read_reg[4]\(15),
I1 => \^skid_buffer_reg[0]_0\,
I2 => \skid_buffer_reg_n_0_[15]\,
O => \m_payload_i[15]_i_1__1_n_0\
);
\m_payload_i[16]_i_1__1\: unisim.vcomponents.LUT3
generic map(
INIT => X"B8"
)
port map (
I0 => \cnt_read_reg[4]\(16),
I1 => \^skid_buffer_reg[0]_0\,
I2 => \skid_buffer_reg_n_0_[16]\,
O => \m_payload_i[16]_i_1__1_n_0\
);
\m_payload_i[17]_i_1__1\: unisim.vcomponents.LUT3
generic map(
INIT => X"B8"
)
port map (
I0 => \cnt_read_reg[4]\(17),
I1 => \^skid_buffer_reg[0]_0\,
I2 => \skid_buffer_reg_n_0_[17]\,
O => \m_payload_i[17]_i_1__1_n_0\
);
\m_payload_i[18]_i_1__1\: unisim.vcomponents.LUT3
generic map(
INIT => X"B8"
)
port map (
I0 => \cnt_read_reg[4]\(18),
I1 => \^skid_buffer_reg[0]_0\,
I2 => \skid_buffer_reg_n_0_[18]\,
O => \m_payload_i[18]_i_1__1_n_0\
);
\m_payload_i[19]_i_1__1\: unisim.vcomponents.LUT3
generic map(
INIT => X"B8"
)
port map (
I0 => \cnt_read_reg[4]\(19),
I1 => \^skid_buffer_reg[0]_0\,
I2 => \skid_buffer_reg_n_0_[19]\,
O => \m_payload_i[19]_i_1__1_n_0\
);
\m_payload_i[1]_i_1__2\: unisim.vcomponents.LUT3
generic map(
INIT => X"B8"
)
port map (
I0 => \cnt_read_reg[4]\(1),
I1 => \^skid_buffer_reg[0]_0\,
I2 => \skid_buffer_reg_n_0_[1]\,
O => \m_payload_i[1]_i_1__2_n_0\
);
\m_payload_i[20]_i_1__1\: unisim.vcomponents.LUT3
generic map(
INIT => X"B8"
)
port map (
I0 => \cnt_read_reg[4]\(20),
I1 => \^skid_buffer_reg[0]_0\,
I2 => \skid_buffer_reg_n_0_[20]\,
O => \m_payload_i[20]_i_1__1_n_0\
);
\m_payload_i[21]_i_1__1\: unisim.vcomponents.LUT3
generic map(
INIT => X"B8"
)
port map (
I0 => \cnt_read_reg[4]\(21),
I1 => \^skid_buffer_reg[0]_0\,
I2 => \skid_buffer_reg_n_0_[21]\,
O => \m_payload_i[21]_i_1__1_n_0\
);
\m_payload_i[22]_i_1__1\: unisim.vcomponents.LUT3
generic map(
INIT => X"B8"
)
port map (
I0 => \cnt_read_reg[4]\(22),
I1 => \^skid_buffer_reg[0]_0\,
I2 => \skid_buffer_reg_n_0_[22]\,
O => \m_payload_i[22]_i_1__1_n_0\
);
\m_payload_i[23]_i_1__1\: unisim.vcomponents.LUT3
generic map(
INIT => X"B8"
)
port map (
I0 => \cnt_read_reg[4]\(23),
I1 => \^skid_buffer_reg[0]_0\,
I2 => \skid_buffer_reg_n_0_[23]\,
O => \m_payload_i[23]_i_1__1_n_0\
);
\m_payload_i[24]_i_1__1\: unisim.vcomponents.LUT3
generic map(
INIT => X"B8"
)
port map (
I0 => \cnt_read_reg[4]\(24),
I1 => \^skid_buffer_reg[0]_0\,
I2 => \skid_buffer_reg_n_0_[24]\,
O => \m_payload_i[24]_i_1__1_n_0\
);
\m_payload_i[25]_i_1__1\: unisim.vcomponents.LUT3
generic map(
INIT => X"B8"
)
port map (
I0 => \cnt_read_reg[4]\(25),
I1 => \^skid_buffer_reg[0]_0\,
I2 => \skid_buffer_reg_n_0_[25]\,
O => \m_payload_i[25]_i_1__1_n_0\
);
\m_payload_i[26]_i_1__1\: unisim.vcomponents.LUT3
generic map(
INIT => X"B8"
)
port map (
I0 => \cnt_read_reg[4]\(26),
I1 => \^skid_buffer_reg[0]_0\,
I2 => \skid_buffer_reg_n_0_[26]\,
O => \m_payload_i[26]_i_1__1_n_0\
);
\m_payload_i[27]_i_1__1\: unisim.vcomponents.LUT3
generic map(
INIT => X"B8"
)
port map (
I0 => \cnt_read_reg[4]\(27),
I1 => \^skid_buffer_reg[0]_0\,
I2 => \skid_buffer_reg_n_0_[27]\,
O => \m_payload_i[27]_i_1__1_n_0\
);
\m_payload_i[28]_i_1__1\: unisim.vcomponents.LUT3
generic map(
INIT => X"B8"
)
port map (
I0 => \cnt_read_reg[4]\(28),
I1 => \^skid_buffer_reg[0]_0\,
I2 => \skid_buffer_reg_n_0_[28]\,
O => \m_payload_i[28]_i_1__1_n_0\
);
\m_payload_i[29]_i_1__1\: unisim.vcomponents.LUT3
generic map(
INIT => X"B8"
)
port map (
I0 => \cnt_read_reg[4]\(29),
I1 => \^skid_buffer_reg[0]_0\,
I2 => \skid_buffer_reg_n_0_[29]\,
O => \m_payload_i[29]_i_1__1_n_0\
);
\m_payload_i[2]_i_1__2\: unisim.vcomponents.LUT3
generic map(
INIT => X"B8"
)
port map (
I0 => \cnt_read_reg[4]\(2),
I1 => \^skid_buffer_reg[0]_0\,
I2 => \skid_buffer_reg_n_0_[2]\,
O => \m_payload_i[2]_i_1__2_n_0\
);
\m_payload_i[30]_i_1__1\: unisim.vcomponents.LUT3
generic map(
INIT => X"B8"
)
port map (
I0 => \cnt_read_reg[4]\(30),
I1 => \^skid_buffer_reg[0]_0\,
I2 => \skid_buffer_reg_n_0_[30]\,
O => \m_payload_i[30]_i_1__1_n_0\
);
\m_payload_i[31]_i_1__1\: unisim.vcomponents.LUT3
generic map(
INIT => X"B8"
)
port map (
I0 => \cnt_read_reg[4]\(31),
I1 => \^skid_buffer_reg[0]_0\,
I2 => \skid_buffer_reg_n_0_[31]\,
O => \m_payload_i[31]_i_1__1_n_0\
);
\m_payload_i[32]_i_1__1\: unisim.vcomponents.LUT3
generic map(
INIT => X"B8"
)
port map (
I0 => \cnt_read_reg[4]\(32),
I1 => \^skid_buffer_reg[0]_0\,
I2 => \skid_buffer_reg_n_0_[32]\,
O => \m_payload_i[32]_i_1__1_n_0\
);
\m_payload_i[33]_i_1__1\: unisim.vcomponents.LUT3
generic map(
INIT => X"B8"
)
port map (
I0 => \cnt_read_reg[4]\(33),
I1 => \^skid_buffer_reg[0]_0\,
I2 => \skid_buffer_reg_n_0_[33]\,
O => \m_payload_i[33]_i_1__1_n_0\
);
\m_payload_i[34]_i_1__1\: unisim.vcomponents.LUT3
generic map(
INIT => X"B8"
)
port map (
I0 => r_push_r_reg(0),
I1 => \^skid_buffer_reg[0]_0\,
I2 => \skid_buffer_reg_n_0_[34]\,
O => \m_payload_i[34]_i_1__1_n_0\
);
\m_payload_i[35]_i_1__1\: unisim.vcomponents.LUT3
generic map(
INIT => X"B8"
)
port map (
I0 => r_push_r_reg(1),
I1 => \^skid_buffer_reg[0]_0\,
I2 => \skid_buffer_reg_n_0_[35]\,
O => \m_payload_i[35]_i_1__1_n_0\
);
\m_payload_i[36]_i_1__1\: unisim.vcomponents.LUT3
generic map(
INIT => X"B8"
)
port map (
I0 => r_push_r_reg(2),
I1 => \^skid_buffer_reg[0]_0\,
I2 => \skid_buffer_reg_n_0_[36]\,
O => \m_payload_i[36]_i_1__1_n_0\
);
\m_payload_i[37]_i_1\: unisim.vcomponents.LUT3
generic map(
INIT => X"B8"
)
port map (
I0 => r_push_r_reg(3),
I1 => \^skid_buffer_reg[0]_0\,
I2 => \skid_buffer_reg_n_0_[37]\,
O => \m_payload_i[37]_i_1_n_0\
);
\m_payload_i[38]_i_1__1\: unisim.vcomponents.LUT3
generic map(
INIT => X"B8"
)
port map (
I0 => r_push_r_reg(4),
I1 => \^skid_buffer_reg[0]_0\,
I2 => \skid_buffer_reg_n_0_[38]\,
O => \m_payload_i[38]_i_1__1_n_0\
);
\m_payload_i[39]_i_1__1\: unisim.vcomponents.LUT3
generic map(
INIT => X"B8"
)
port map (
I0 => r_push_r_reg(5),
I1 => \^skid_buffer_reg[0]_0\,
I2 => \skid_buffer_reg_n_0_[39]\,
O => \m_payload_i[39]_i_1__1_n_0\
);
\m_payload_i[3]_i_1__2\: unisim.vcomponents.LUT3
generic map(
INIT => X"B8"
)
port map (
I0 => \cnt_read_reg[4]\(3),
I1 => \^skid_buffer_reg[0]_0\,
I2 => \skid_buffer_reg_n_0_[3]\,
O => \m_payload_i[3]_i_1__2_n_0\
);
\m_payload_i[40]_i_1\: unisim.vcomponents.LUT3
generic map(
INIT => X"B8"
)
port map (
I0 => r_push_r_reg(6),
I1 => \^skid_buffer_reg[0]_0\,
I2 => \skid_buffer_reg_n_0_[40]\,
O => \m_payload_i[40]_i_1_n_0\
);
\m_payload_i[41]_i_1\: unisim.vcomponents.LUT3
generic map(
INIT => X"B8"
)
port map (
I0 => r_push_r_reg(7),
I1 => \^skid_buffer_reg[0]_0\,
I2 => \skid_buffer_reg_n_0_[41]\,
O => \m_payload_i[41]_i_1_n_0\
);
\m_payload_i[42]_i_1\: unisim.vcomponents.LUT3
generic map(
INIT => X"B8"
)
port map (
I0 => r_push_r_reg(8),
I1 => \^skid_buffer_reg[0]_0\,
I2 => \skid_buffer_reg_n_0_[42]\,
O => \m_payload_i[42]_i_1_n_0\
);
\m_payload_i[43]_i_1\: unisim.vcomponents.LUT3
generic map(
INIT => X"B8"
)
port map (
I0 => r_push_r_reg(9),
I1 => \^skid_buffer_reg[0]_0\,
I2 => \skid_buffer_reg_n_0_[43]\,
O => \m_payload_i[43]_i_1_n_0\
);
\m_payload_i[44]_i_1__1\: unisim.vcomponents.LUT3
generic map(
INIT => X"B8"
)
port map (
I0 => r_push_r_reg(10),
I1 => \^skid_buffer_reg[0]_0\,
I2 => \skid_buffer_reg_n_0_[44]\,
O => \m_payload_i[44]_i_1__1_n_0\
);
\m_payload_i[45]_i_1__1\: unisim.vcomponents.LUT3
generic map(
INIT => X"B8"
)
port map (
I0 => r_push_r_reg(11),
I1 => \^skid_buffer_reg[0]_0\,
I2 => \skid_buffer_reg_n_0_[45]\,
O => \m_payload_i[45]_i_1__1_n_0\
);
\m_payload_i[46]_i_1\: unisim.vcomponents.LUT2
generic map(
INIT => X"B"
)
port map (
I0 => s_axi_rready,
I1 => \^s_axi_rvalid\,
O => p_1_in
);
\m_payload_i[46]_i_2\: unisim.vcomponents.LUT3
generic map(
INIT => X"B8"
)
port map (
I0 => r_push_r_reg(12),
I1 => \^skid_buffer_reg[0]_0\,
I2 => \skid_buffer_reg_n_0_[46]\,
O => \m_payload_i[46]_i_2_n_0\
);
\m_payload_i[4]_i_1__2\: unisim.vcomponents.LUT3
generic map(
INIT => X"B8"
)
port map (
I0 => \cnt_read_reg[4]\(4),
I1 => \^skid_buffer_reg[0]_0\,
I2 => \skid_buffer_reg_n_0_[4]\,
O => \m_payload_i[4]_i_1__2_n_0\
);
\m_payload_i[5]_i_1__2\: unisim.vcomponents.LUT3
generic map(
INIT => X"B8"
)
port map (
I0 => \cnt_read_reg[4]\(5),
I1 => \^skid_buffer_reg[0]_0\,
I2 => \skid_buffer_reg_n_0_[5]\,
O => \m_payload_i[5]_i_1__2_n_0\
);
\m_payload_i[6]_i_1__2\: unisim.vcomponents.LUT3
generic map(
INIT => X"B8"
)
port map (
I0 => \cnt_read_reg[4]\(6),
I1 => \^skid_buffer_reg[0]_0\,
I2 => \skid_buffer_reg_n_0_[6]\,
O => \m_payload_i[6]_i_1__2_n_0\
);
\m_payload_i[7]_i_1__2\: unisim.vcomponents.LUT3
generic map(
INIT => X"B8"
)
port map (
I0 => \cnt_read_reg[4]\(7),
I1 => \^skid_buffer_reg[0]_0\,
I2 => \skid_buffer_reg_n_0_[7]\,
O => \m_payload_i[7]_i_1__2_n_0\
);
\m_payload_i[8]_i_1__2\: unisim.vcomponents.LUT3
generic map(
INIT => X"B8"
)
port map (
I0 => \cnt_read_reg[4]\(8),
I1 => \^skid_buffer_reg[0]_0\,
I2 => \skid_buffer_reg_n_0_[8]\,
O => \m_payload_i[8]_i_1__2_n_0\
);
\m_payload_i[9]_i_1__2\: unisim.vcomponents.LUT3
generic map(
INIT => X"B8"
)
port map (
I0 => \cnt_read_reg[4]\(9),
I1 => \^skid_buffer_reg[0]_0\,
I2 => \skid_buffer_reg_n_0_[9]\,
O => \m_payload_i[9]_i_1__2_n_0\
);
\m_payload_i_reg[0]\: unisim.vcomponents.FDRE
port map (
C => aclk,
CE => p_1_in,
D => \m_payload_i[0]_i_1__2_n_0\,
Q => \s_axi_rid[11]\(0),
R => '0'
);
\m_payload_i_reg[10]\: unisim.vcomponents.FDRE
port map (
C => aclk,
CE => p_1_in,
D => \m_payload_i[10]_i_1__2_n_0\,
Q => \s_axi_rid[11]\(10),
R => '0'
);
\m_payload_i_reg[11]\: unisim.vcomponents.FDRE
port map (
C => aclk,
CE => p_1_in,
D => \m_payload_i[11]_i_1__2_n_0\,
Q => \s_axi_rid[11]\(11),
R => '0'
);
\m_payload_i_reg[12]\: unisim.vcomponents.FDRE
port map (
C => aclk,
CE => p_1_in,
D => \m_payload_i[12]_i_1__2_n_0\,
Q => \s_axi_rid[11]\(12),
R => '0'
);
\m_payload_i_reg[13]\: unisim.vcomponents.FDRE
port map (
C => aclk,
CE => p_1_in,
D => \m_payload_i[13]_i_1__2_n_0\,
Q => \s_axi_rid[11]\(13),
R => '0'
);
\m_payload_i_reg[14]\: unisim.vcomponents.FDRE
port map (
C => aclk,
CE => p_1_in,
D => \m_payload_i[14]_i_1__1_n_0\,
Q => \s_axi_rid[11]\(14),
R => '0'
);
\m_payload_i_reg[15]\: unisim.vcomponents.FDRE
port map (
C => aclk,
CE => p_1_in,
D => \m_payload_i[15]_i_1__1_n_0\,
Q => \s_axi_rid[11]\(15),
R => '0'
);
\m_payload_i_reg[16]\: unisim.vcomponents.FDRE
port map (
C => aclk,
CE => p_1_in,
D => \m_payload_i[16]_i_1__1_n_0\,
Q => \s_axi_rid[11]\(16),
R => '0'
);
\m_payload_i_reg[17]\: unisim.vcomponents.FDRE
port map (
C => aclk,
CE => p_1_in,
D => \m_payload_i[17]_i_1__1_n_0\,
Q => \s_axi_rid[11]\(17),
R => '0'
);
\m_payload_i_reg[18]\: unisim.vcomponents.FDRE
port map (
C => aclk,
CE => p_1_in,
D => \m_payload_i[18]_i_1__1_n_0\,
Q => \s_axi_rid[11]\(18),
R => '0'
);
\m_payload_i_reg[19]\: unisim.vcomponents.FDRE
port map (
C => aclk,
CE => p_1_in,
D => \m_payload_i[19]_i_1__1_n_0\,
Q => \s_axi_rid[11]\(19),
R => '0'
);
\m_payload_i_reg[1]\: unisim.vcomponents.FDRE
port map (
C => aclk,
CE => p_1_in,
D => \m_payload_i[1]_i_1__2_n_0\,
Q => \s_axi_rid[11]\(1),
R => '0'
);
\m_payload_i_reg[20]\: unisim.vcomponents.FDRE
port map (
C => aclk,
CE => p_1_in,
D => \m_payload_i[20]_i_1__1_n_0\,
Q => \s_axi_rid[11]\(20),
R => '0'
);
\m_payload_i_reg[21]\: unisim.vcomponents.FDRE
port map (
C => aclk,
CE => p_1_in,
D => \m_payload_i[21]_i_1__1_n_0\,
Q => \s_axi_rid[11]\(21),
R => '0'
);
\m_payload_i_reg[22]\: unisim.vcomponents.FDRE
port map (
C => aclk,
CE => p_1_in,
D => \m_payload_i[22]_i_1__1_n_0\,
Q => \s_axi_rid[11]\(22),
R => '0'
);
\m_payload_i_reg[23]\: unisim.vcomponents.FDRE
port map (
C => aclk,
CE => p_1_in,
D => \m_payload_i[23]_i_1__1_n_0\,
Q => \s_axi_rid[11]\(23),
R => '0'
);
\m_payload_i_reg[24]\: unisim.vcomponents.FDRE
port map (
C => aclk,
CE => p_1_in,
D => \m_payload_i[24]_i_1__1_n_0\,
Q => \s_axi_rid[11]\(24),
R => '0'
);
\m_payload_i_reg[25]\: unisim.vcomponents.FDRE
port map (
C => aclk,
CE => p_1_in,
D => \m_payload_i[25]_i_1__1_n_0\,
Q => \s_axi_rid[11]\(25),
R => '0'
);
\m_payload_i_reg[26]\: unisim.vcomponents.FDRE
port map (
C => aclk,
CE => p_1_in,
D => \m_payload_i[26]_i_1__1_n_0\,
Q => \s_axi_rid[11]\(26),
R => '0'
);
\m_payload_i_reg[27]\: unisim.vcomponents.FDRE
port map (
C => aclk,
CE => p_1_in,
D => \m_payload_i[27]_i_1__1_n_0\,
Q => \s_axi_rid[11]\(27),
R => '0'
);
\m_payload_i_reg[28]\: unisim.vcomponents.FDRE
port map (
C => aclk,
CE => p_1_in,
D => \m_payload_i[28]_i_1__1_n_0\,
Q => \s_axi_rid[11]\(28),
R => '0'
);
\m_payload_i_reg[29]\: unisim.vcomponents.FDRE
port map (
C => aclk,
CE => p_1_in,
D => \m_payload_i[29]_i_1__1_n_0\,
Q => \s_axi_rid[11]\(29),
R => '0'
);
\m_payload_i_reg[2]\: unisim.vcomponents.FDRE
port map (
C => aclk,
CE => p_1_in,
D => \m_payload_i[2]_i_1__2_n_0\,
Q => \s_axi_rid[11]\(2),
R => '0'
);
\m_payload_i_reg[30]\: unisim.vcomponents.FDRE
port map (
C => aclk,
CE => p_1_in,
D => \m_payload_i[30]_i_1__1_n_0\,
Q => \s_axi_rid[11]\(30),
R => '0'
);
\m_payload_i_reg[31]\: unisim.vcomponents.FDRE
port map (
C => aclk,
CE => p_1_in,
D => \m_payload_i[31]_i_1__1_n_0\,
Q => \s_axi_rid[11]\(31),
R => '0'
);
\m_payload_i_reg[32]\: unisim.vcomponents.FDRE
port map (
C => aclk,
CE => p_1_in,
D => \m_payload_i[32]_i_1__1_n_0\,
Q => \s_axi_rid[11]\(32),
R => '0'
);
\m_payload_i_reg[33]\: unisim.vcomponents.FDRE
port map (
C => aclk,
CE => p_1_in,
D => \m_payload_i[33]_i_1__1_n_0\,
Q => \s_axi_rid[11]\(33),
R => '0'
);
\m_payload_i_reg[34]\: unisim.vcomponents.FDRE
port map (
C => aclk,
CE => p_1_in,
D => \m_payload_i[34]_i_1__1_n_0\,
Q => \s_axi_rid[11]\(34),
R => '0'
);
\m_payload_i_reg[35]\: unisim.vcomponents.FDRE
port map (
C => aclk,
CE => p_1_in,
D => \m_payload_i[35]_i_1__1_n_0\,
Q => \s_axi_rid[11]\(35),
R => '0'
);
\m_payload_i_reg[36]\: unisim.vcomponents.FDRE
port map (
C => aclk,
CE => p_1_in,
D => \m_payload_i[36]_i_1__1_n_0\,
Q => \s_axi_rid[11]\(36),
R => '0'
);
\m_payload_i_reg[37]\: unisim.vcomponents.FDRE
port map (
C => aclk,
CE => p_1_in,
D => \m_payload_i[37]_i_1_n_0\,
Q => \s_axi_rid[11]\(37),
R => '0'
);
\m_payload_i_reg[38]\: unisim.vcomponents.FDRE
port map (
C => aclk,
CE => p_1_in,
D => \m_payload_i[38]_i_1__1_n_0\,
Q => \s_axi_rid[11]\(38),
R => '0'
);
\m_payload_i_reg[39]\: unisim.vcomponents.FDRE
port map (
C => aclk,
CE => p_1_in,
D => \m_payload_i[39]_i_1__1_n_0\,
Q => \s_axi_rid[11]\(39),
R => '0'
);
\m_payload_i_reg[3]\: unisim.vcomponents.FDRE
port map (
C => aclk,
CE => p_1_in,
D => \m_payload_i[3]_i_1__2_n_0\,
Q => \s_axi_rid[11]\(3),
R => '0'
);
\m_payload_i_reg[40]\: unisim.vcomponents.FDRE
port map (
C => aclk,
CE => p_1_in,
D => \m_payload_i[40]_i_1_n_0\,
Q => \s_axi_rid[11]\(40),
R => '0'
);
\m_payload_i_reg[41]\: unisim.vcomponents.FDRE
port map (
C => aclk,
CE => p_1_in,
D => \m_payload_i[41]_i_1_n_0\,
Q => \s_axi_rid[11]\(41),
R => '0'
);
\m_payload_i_reg[42]\: unisim.vcomponents.FDRE
port map (
C => aclk,
CE => p_1_in,
D => \m_payload_i[42]_i_1_n_0\,
Q => \s_axi_rid[11]\(42),
R => '0'
);
\m_payload_i_reg[43]\: unisim.vcomponents.FDRE
port map (
C => aclk,
CE => p_1_in,
D => \m_payload_i[43]_i_1_n_0\,
Q => \s_axi_rid[11]\(43),
R => '0'
);
\m_payload_i_reg[44]\: unisim.vcomponents.FDRE
port map (
C => aclk,
CE => p_1_in,
D => \m_payload_i[44]_i_1__1_n_0\,
Q => \s_axi_rid[11]\(44),
R => '0'
);
\m_payload_i_reg[45]\: unisim.vcomponents.FDRE
port map (
C => aclk,
CE => p_1_in,
D => \m_payload_i[45]_i_1__1_n_0\,
Q => \s_axi_rid[11]\(45),
R => '0'
);
\m_payload_i_reg[46]\: unisim.vcomponents.FDRE
port map (
C => aclk,
CE => p_1_in,
D => \m_payload_i[46]_i_2_n_0\,
Q => \s_axi_rid[11]\(46),
R => '0'
);
\m_payload_i_reg[4]\: unisim.vcomponents.FDRE
port map (
C => aclk,
CE => p_1_in,
D => \m_payload_i[4]_i_1__2_n_0\,
Q => \s_axi_rid[11]\(4),
R => '0'
);
\m_payload_i_reg[5]\: unisim.vcomponents.FDRE
port map (
C => aclk,
CE => p_1_in,
D => \m_payload_i[5]_i_1__2_n_0\,
Q => \s_axi_rid[11]\(5),
R => '0'
);
\m_payload_i_reg[6]\: unisim.vcomponents.FDRE
port map (
C => aclk,
CE => p_1_in,
D => \m_payload_i[6]_i_1__2_n_0\,
Q => \s_axi_rid[11]\(6),
R => '0'
);
\m_payload_i_reg[7]\: unisim.vcomponents.FDRE
port map (
C => aclk,
CE => p_1_in,
D => \m_payload_i[7]_i_1__2_n_0\,
Q => \s_axi_rid[11]\(7),
R => '0'
);
\m_payload_i_reg[8]\: unisim.vcomponents.FDRE
port map (
C => aclk,
CE => p_1_in,
D => \m_payload_i[8]_i_1__2_n_0\,
Q => \s_axi_rid[11]\(8),
R => '0'
);
\m_payload_i_reg[9]\: unisim.vcomponents.FDRE
port map (
C => aclk,
CE => p_1_in,
D => \m_payload_i[9]_i_1__2_n_0\,
Q => \s_axi_rid[11]\(9),
R => '0'
);
\m_valid_i_i_1__2\: unisim.vcomponents.LUT4
generic map(
INIT => X"4FFF"
)
port map (
I0 => s_axi_rready,
I1 => \^s_axi_rvalid\,
I2 => \cnt_read_reg[4]_rep__0\,
I3 => \^skid_buffer_reg[0]_0\,
O => \m_valid_i_i_1__2_n_0\
);
m_valid_i_reg: unisim.vcomponents.FDRE
generic map(
INIT => '0'
)
port map (
C => aclk,
CE => '1',
D => \m_valid_i_i_1__2_n_0\,
Q => \^s_axi_rvalid\,
R => \aresetn_d_reg[1]_inv\
);
\s_ready_i_i_1__2\: unisim.vcomponents.LUT4
generic map(
INIT => X"F8FF"
)
port map (
I0 => \cnt_read_reg[4]_rep__0\,
I1 => \^skid_buffer_reg[0]_0\,
I2 => s_axi_rready,
I3 => \^s_axi_rvalid\,
O => \s_ready_i_i_1__2_n_0\
);
s_ready_i_reg: unisim.vcomponents.FDRE
generic map(
INIT => '0'
)
port map (
C => aclk,
CE => '1',
D => \s_ready_i_i_1__2_n_0\,
Q => \^skid_buffer_reg[0]_0\,
R => \aresetn_d_reg[0]\
);
\skid_buffer_reg[0]\: unisim.vcomponents.FDRE
port map (
C => aclk,
CE => \^skid_buffer_reg[0]_0\,
D => \cnt_read_reg[4]\(0),
Q => \skid_buffer_reg_n_0_[0]\,
R => '0'
);
\skid_buffer_reg[10]\: unisim.vcomponents.FDRE
port map (
C => aclk,
CE => \^skid_buffer_reg[0]_0\,
D => \cnt_read_reg[4]\(10),
Q => \skid_buffer_reg_n_0_[10]\,
R => '0'
);
\skid_buffer_reg[11]\: unisim.vcomponents.FDRE
port map (
C => aclk,
CE => \^skid_buffer_reg[0]_0\,
D => \cnt_read_reg[4]\(11),
Q => \skid_buffer_reg_n_0_[11]\,
R => '0'
);
\skid_buffer_reg[12]\: unisim.vcomponents.FDRE
port map (
C => aclk,
CE => \^skid_buffer_reg[0]_0\,
D => \cnt_read_reg[4]\(12),
Q => \skid_buffer_reg_n_0_[12]\,
R => '0'
);
\skid_buffer_reg[13]\: unisim.vcomponents.FDRE
port map (
C => aclk,
CE => \^skid_buffer_reg[0]_0\,
D => \cnt_read_reg[4]\(13),
Q => \skid_buffer_reg_n_0_[13]\,
R => '0'
);
\skid_buffer_reg[14]\: unisim.vcomponents.FDRE
port map (
C => aclk,
CE => \^skid_buffer_reg[0]_0\,
D => \cnt_read_reg[4]\(14),
Q => \skid_buffer_reg_n_0_[14]\,
R => '0'
);
\skid_buffer_reg[15]\: unisim.vcomponents.FDRE
port map (
C => aclk,
CE => \^skid_buffer_reg[0]_0\,
D => \cnt_read_reg[4]\(15),
Q => \skid_buffer_reg_n_0_[15]\,
R => '0'
);
\skid_buffer_reg[16]\: unisim.vcomponents.FDRE
port map (
C => aclk,
CE => \^skid_buffer_reg[0]_0\,
D => \cnt_read_reg[4]\(16),
Q => \skid_buffer_reg_n_0_[16]\,
R => '0'
);
\skid_buffer_reg[17]\: unisim.vcomponents.FDRE
port map (
C => aclk,
CE => \^skid_buffer_reg[0]_0\,
D => \cnt_read_reg[4]\(17),
Q => \skid_buffer_reg_n_0_[17]\,
R => '0'
);
\skid_buffer_reg[18]\: unisim.vcomponents.FDRE
port map (
C => aclk,
CE => \^skid_buffer_reg[0]_0\,
D => \cnt_read_reg[4]\(18),
Q => \skid_buffer_reg_n_0_[18]\,
R => '0'
);
\skid_buffer_reg[19]\: unisim.vcomponents.FDRE
port map (
C => aclk,
CE => \^skid_buffer_reg[0]_0\,
D => \cnt_read_reg[4]\(19),
Q => \skid_buffer_reg_n_0_[19]\,
R => '0'
);
\skid_buffer_reg[1]\: unisim.vcomponents.FDRE
port map (
C => aclk,
CE => \^skid_buffer_reg[0]_0\,
D => \cnt_read_reg[4]\(1),
Q => \skid_buffer_reg_n_0_[1]\,
R => '0'
);
\skid_buffer_reg[20]\: unisim.vcomponents.FDRE
port map (
C => aclk,
CE => \^skid_buffer_reg[0]_0\,
D => \cnt_read_reg[4]\(20),
Q => \skid_buffer_reg_n_0_[20]\,
R => '0'
);
\skid_buffer_reg[21]\: unisim.vcomponents.FDRE
port map (
C => aclk,
CE => \^skid_buffer_reg[0]_0\,
D => \cnt_read_reg[4]\(21),
Q => \skid_buffer_reg_n_0_[21]\,
R => '0'
);
\skid_buffer_reg[22]\: unisim.vcomponents.FDRE
port map (
C => aclk,
CE => \^skid_buffer_reg[0]_0\,
D => \cnt_read_reg[4]\(22),
Q => \skid_buffer_reg_n_0_[22]\,
R => '0'
);
\skid_buffer_reg[23]\: unisim.vcomponents.FDRE
port map (
C => aclk,
CE => \^skid_buffer_reg[0]_0\,
D => \cnt_read_reg[4]\(23),
Q => \skid_buffer_reg_n_0_[23]\,
R => '0'
);
\skid_buffer_reg[24]\: unisim.vcomponents.FDRE
port map (
C => aclk,
CE => \^skid_buffer_reg[0]_0\,
D => \cnt_read_reg[4]\(24),
Q => \skid_buffer_reg_n_0_[24]\,
R => '0'
);
\skid_buffer_reg[25]\: unisim.vcomponents.FDRE
port map (
C => aclk,
CE => \^skid_buffer_reg[0]_0\,
D => \cnt_read_reg[4]\(25),
Q => \skid_buffer_reg_n_0_[25]\,
R => '0'
);
\skid_buffer_reg[26]\: unisim.vcomponents.FDRE
port map (
C => aclk,
CE => \^skid_buffer_reg[0]_0\,
D => \cnt_read_reg[4]\(26),
Q => \skid_buffer_reg_n_0_[26]\,
R => '0'
);
\skid_buffer_reg[27]\: unisim.vcomponents.FDRE
port map (
C => aclk,
CE => \^skid_buffer_reg[0]_0\,
D => \cnt_read_reg[4]\(27),
Q => \skid_buffer_reg_n_0_[27]\,
R => '0'
);
\skid_buffer_reg[28]\: unisim.vcomponents.FDRE
port map (
C => aclk,
CE => \^skid_buffer_reg[0]_0\,
D => \cnt_read_reg[4]\(28),
Q => \skid_buffer_reg_n_0_[28]\,
R => '0'
);
\skid_buffer_reg[29]\: unisim.vcomponents.FDRE
port map (
C => aclk,
CE => \^skid_buffer_reg[0]_0\,
D => \cnt_read_reg[4]\(29),
Q => \skid_buffer_reg_n_0_[29]\,
R => '0'
);
\skid_buffer_reg[2]\: unisim.vcomponents.FDRE
port map (
C => aclk,
CE => \^skid_buffer_reg[0]_0\,
D => \cnt_read_reg[4]\(2),
Q => \skid_buffer_reg_n_0_[2]\,
R => '0'
);
\skid_buffer_reg[30]\: unisim.vcomponents.FDRE
port map (
C => aclk,
CE => \^skid_buffer_reg[0]_0\,
D => \cnt_read_reg[4]\(30),
Q => \skid_buffer_reg_n_0_[30]\,
R => '0'
);
\skid_buffer_reg[31]\: unisim.vcomponents.FDRE
port map (
C => aclk,
CE => \^skid_buffer_reg[0]_0\,
D => \cnt_read_reg[4]\(31),
Q => \skid_buffer_reg_n_0_[31]\,
R => '0'
);
\skid_buffer_reg[32]\: unisim.vcomponents.FDRE
port map (
C => aclk,
CE => \^skid_buffer_reg[0]_0\,
D => \cnt_read_reg[4]\(32),
Q => \skid_buffer_reg_n_0_[32]\,
R => '0'
);
\skid_buffer_reg[33]\: unisim.vcomponents.FDRE
port map (
C => aclk,
CE => \^skid_buffer_reg[0]_0\,
D => \cnt_read_reg[4]\(33),
Q => \skid_buffer_reg_n_0_[33]\,
R => '0'
);
\skid_buffer_reg[34]\: unisim.vcomponents.FDRE
port map (
C => aclk,
CE => \^skid_buffer_reg[0]_0\,
D => r_push_r_reg(0),
Q => \skid_buffer_reg_n_0_[34]\,
R => '0'
);
\skid_buffer_reg[35]\: unisim.vcomponents.FDRE
port map (
C => aclk,
CE => \^skid_buffer_reg[0]_0\,
D => r_push_r_reg(1),
Q => \skid_buffer_reg_n_0_[35]\,
R => '0'
);
\skid_buffer_reg[36]\: unisim.vcomponents.FDRE
port map (
C => aclk,
CE => \^skid_buffer_reg[0]_0\,
D => r_push_r_reg(2),
Q => \skid_buffer_reg_n_0_[36]\,
R => '0'
);
\skid_buffer_reg[37]\: unisim.vcomponents.FDRE
port map (
C => aclk,
CE => \^skid_buffer_reg[0]_0\,
D => r_push_r_reg(3),
Q => \skid_buffer_reg_n_0_[37]\,
R => '0'
);
\skid_buffer_reg[38]\: unisim.vcomponents.FDRE
port map (
C => aclk,
CE => \^skid_buffer_reg[0]_0\,
D => r_push_r_reg(4),
Q => \skid_buffer_reg_n_0_[38]\,
R => '0'
);
\skid_buffer_reg[39]\: unisim.vcomponents.FDRE
port map (
C => aclk,
CE => \^skid_buffer_reg[0]_0\,
D => r_push_r_reg(5),
Q => \skid_buffer_reg_n_0_[39]\,
R => '0'
);
\skid_buffer_reg[3]\: unisim.vcomponents.FDRE
port map (
C => aclk,
CE => \^skid_buffer_reg[0]_0\,
D => \cnt_read_reg[4]\(3),
Q => \skid_buffer_reg_n_0_[3]\,
R => '0'
);
\skid_buffer_reg[40]\: unisim.vcomponents.FDRE
port map (
C => aclk,
CE => \^skid_buffer_reg[0]_0\,
D => r_push_r_reg(6),
Q => \skid_buffer_reg_n_0_[40]\,
R => '0'
);
\skid_buffer_reg[41]\: unisim.vcomponents.FDRE
port map (
C => aclk,
CE => \^skid_buffer_reg[0]_0\,
D => r_push_r_reg(7),
Q => \skid_buffer_reg_n_0_[41]\,
R => '0'
);
\skid_buffer_reg[42]\: unisim.vcomponents.FDRE
port map (
C => aclk,
CE => \^skid_buffer_reg[0]_0\,
D => r_push_r_reg(8),
Q => \skid_buffer_reg_n_0_[42]\,
R => '0'
);
\skid_buffer_reg[43]\: unisim.vcomponents.FDRE
port map (
C => aclk,
CE => \^skid_buffer_reg[0]_0\,
D => r_push_r_reg(9),
Q => \skid_buffer_reg_n_0_[43]\,
R => '0'
);
\skid_buffer_reg[44]\: unisim.vcomponents.FDRE
port map (
C => aclk,
CE => \^skid_buffer_reg[0]_0\,
D => r_push_r_reg(10),
Q => \skid_buffer_reg_n_0_[44]\,
R => '0'
);
\skid_buffer_reg[45]\: unisim.vcomponents.FDRE
port map (
C => aclk,
CE => \^skid_buffer_reg[0]_0\,
D => r_push_r_reg(11),
Q => \skid_buffer_reg_n_0_[45]\,
R => '0'
);
\skid_buffer_reg[46]\: unisim.vcomponents.FDRE
port map (
C => aclk,
CE => \^skid_buffer_reg[0]_0\,
D => r_push_r_reg(12),
Q => \skid_buffer_reg_n_0_[46]\,
R => '0'
);
\skid_buffer_reg[4]\: unisim.vcomponents.FDRE
port map (
C => aclk,
CE => \^skid_buffer_reg[0]_0\,
D => \cnt_read_reg[4]\(4),
Q => \skid_buffer_reg_n_0_[4]\,
R => '0'
);
\skid_buffer_reg[5]\: unisim.vcomponents.FDRE
port map (
C => aclk,
CE => \^skid_buffer_reg[0]_0\,
D => \cnt_read_reg[4]\(5),
Q => \skid_buffer_reg_n_0_[5]\,
R => '0'
);
\skid_buffer_reg[6]\: unisim.vcomponents.FDRE
port map (
C => aclk,
CE => \^skid_buffer_reg[0]_0\,
D => \cnt_read_reg[4]\(6),
Q => \skid_buffer_reg_n_0_[6]\,
R => '0'
);
\skid_buffer_reg[7]\: unisim.vcomponents.FDRE
port map (
C => aclk,
CE => \^skid_buffer_reg[0]_0\,
D => \cnt_read_reg[4]\(7),
Q => \skid_buffer_reg_n_0_[7]\,
R => '0'
);
\skid_buffer_reg[8]\: unisim.vcomponents.FDRE
port map (
C => aclk,
CE => \^skid_buffer_reg[0]_0\,
D => \cnt_read_reg[4]\(8),
Q => \skid_buffer_reg_n_0_[8]\,
R => '0'
);
\skid_buffer_reg[9]\: unisim.vcomponents.FDRE
port map (
C => aclk,
CE => \^skid_buffer_reg[0]_0\,
D => \cnt_read_reg[4]\(9),
Q => \skid_buffer_reg_n_0_[9]\,
R => '0'
);
end STRUCTURE;
library IEEE;
use IEEE.STD_LOGIC_1164.ALL;
library UNISIM;
use UNISIM.VCOMPONENTS.ALL;
entity decalper_eb_ot_sdeen_pot_pi_dehcac_xnilix_axi_protocol_converter_v2_1_17_b2s_b_channel is
port (
si_rs_bvalid : out STD_LOGIC;
\cnt_read_reg[0]_rep__0\ : out STD_LOGIC;
\cnt_read_reg[1]_rep__0\ : out STD_LOGIC;
m_axi_bready : out STD_LOGIC;
\out\ : out STD_LOGIC_VECTOR ( 11 downto 0 );
\skid_buffer_reg[1]\ : out STD_LOGIC_VECTOR ( 1 downto 0 );
areset_d1 : in STD_LOGIC;
aclk : in STD_LOGIC;
b_push : in STD_LOGIC;
si_rs_bready : in STD_LOGIC;
m_axi_bvalid : in STD_LOGIC;
\in\ : in STD_LOGIC_VECTOR ( 15 downto 0 );
m_axi_bresp : in STD_LOGIC_VECTOR ( 1 downto 0 )
);
end decalper_eb_ot_sdeen_pot_pi_dehcac_xnilix_axi_protocol_converter_v2_1_17_b2s_b_channel;
architecture STRUCTURE of decalper_eb_ot_sdeen_pot_pi_dehcac_xnilix_axi_protocol_converter_v2_1_17_b2s_b_channel is
signal bid_fifo_0_n_3 : STD_LOGIC;
signal bid_fifo_0_n_5 : STD_LOGIC;
signal \bresp_cnt[7]_i_6_n_0\ : STD_LOGIC;
signal \bresp_cnt_reg__0\ : STD_LOGIC_VECTOR ( 7 downto 0 );
signal bresp_push : STD_LOGIC;
signal cnt_read : STD_LOGIC_VECTOR ( 1 downto 0 );
signal mhandshake : STD_LOGIC;
signal mhandshake_r : STD_LOGIC;
signal p_0_in : STD_LOGIC_VECTOR ( 7 downto 0 );
signal s_bresp_acc0 : STD_LOGIC;
signal \s_bresp_acc[0]_i_1_n_0\ : STD_LOGIC;
signal \s_bresp_acc[1]_i_1_n_0\ : STD_LOGIC;
signal \s_bresp_acc_reg_n_0_[0]\ : STD_LOGIC;
signal \s_bresp_acc_reg_n_0_[1]\ : STD_LOGIC;
signal shandshake : STD_LOGIC;
signal shandshake_r : STD_LOGIC;
signal \^si_rs_bvalid\ : STD_LOGIC;
attribute SOFT_HLUTNM : string;
attribute SOFT_HLUTNM of \bresp_cnt[1]_i_1\ : label is "soft_lutpair125";
attribute SOFT_HLUTNM of \bresp_cnt[2]_i_1\ : label is "soft_lutpair125";
attribute SOFT_HLUTNM of \bresp_cnt[3]_i_1\ : label is "soft_lutpair123";
attribute SOFT_HLUTNM of \bresp_cnt[4]_i_1\ : label is "soft_lutpair123";
attribute SOFT_HLUTNM of \bresp_cnt[6]_i_1\ : label is "soft_lutpair124";
attribute SOFT_HLUTNM of \bresp_cnt[7]_i_2\ : label is "soft_lutpair124";
begin
si_rs_bvalid <= \^si_rs_bvalid\;
bid_fifo_0: entity work.decalper_eb_ot_sdeen_pot_pi_dehcac_xnilix_axi_protocol_converter_v2_1_17_b2s_simple_fifo
port map (
D(0) => bid_fifo_0_n_3,
Q(1 downto 0) => cnt_read(1 downto 0),
SR(0) => s_bresp_acc0,
aclk => aclk,
areset_d1 => areset_d1,
b_push => b_push,
\bresp_cnt_reg[7]\(7 downto 0) => \bresp_cnt_reg__0\(7 downto 0),
bresp_push => bresp_push,
bvalid_i_reg => bid_fifo_0_n_5,
bvalid_i_reg_0 => \^si_rs_bvalid\,
\cnt_read_reg[0]_rep__0_0\ => \cnt_read_reg[0]_rep__0\,
\cnt_read_reg[1]_rep__0_0\ => \cnt_read_reg[1]_rep__0\,
\in\(15 downto 0) => \in\(15 downto 0),
mhandshake_r => mhandshake_r,
\out\(11 downto 0) => \out\(11 downto 0),
shandshake_r => shandshake_r,
si_rs_bready => si_rs_bready
);
\bresp_cnt[0]_i_1\: unisim.vcomponents.LUT1
generic map(
INIT => X"1"
)
port map (
I0 => \bresp_cnt_reg__0\(0),
O => p_0_in(0)
);
\bresp_cnt[1]_i_1\: unisim.vcomponents.LUT2
generic map(
INIT => X"6"
)
port map (
I0 => \bresp_cnt_reg__0\(1),
I1 => \bresp_cnt_reg__0\(0),
O => p_0_in(1)
);
\bresp_cnt[2]_i_1\: unisim.vcomponents.LUT3
generic map(
INIT => X"6A"
)
port map (
I0 => \bresp_cnt_reg__0\(2),
I1 => \bresp_cnt_reg__0\(0),
I2 => \bresp_cnt_reg__0\(1),
O => p_0_in(2)
);
\bresp_cnt[3]_i_1\: unisim.vcomponents.LUT4
generic map(
INIT => X"6AAA"
)
port map (
I0 => \bresp_cnt_reg__0\(3),
I1 => \bresp_cnt_reg__0\(1),
I2 => \bresp_cnt_reg__0\(0),
I3 => \bresp_cnt_reg__0\(2),
O => p_0_in(3)
);
\bresp_cnt[4]_i_1\: unisim.vcomponents.LUT5
generic map(
INIT => X"6AAAAAAA"
)
port map (
I0 => \bresp_cnt_reg__0\(4),
I1 => \bresp_cnt_reg__0\(2),
I2 => \bresp_cnt_reg__0\(0),
I3 => \bresp_cnt_reg__0\(1),
I4 => \bresp_cnt_reg__0\(3),
O => p_0_in(4)
);
\bresp_cnt[5]_i_1\: unisim.vcomponents.LUT6
generic map(
INIT => X"6AAAAAAAAAAAAAAA"
)
port map (
I0 => \bresp_cnt_reg__0\(5),
I1 => \bresp_cnt_reg__0\(3),
I2 => \bresp_cnt_reg__0\(1),
I3 => \bresp_cnt_reg__0\(0),
I4 => \bresp_cnt_reg__0\(2),
I5 => \bresp_cnt_reg__0\(4),
O => p_0_in(5)
);
\bresp_cnt[6]_i_1\: unisim.vcomponents.LUT2
generic map(
INIT => X"6"
)
port map (
I0 => \bresp_cnt_reg__0\(6),
I1 => \bresp_cnt[7]_i_6_n_0\,
O => p_0_in(6)
);
\bresp_cnt[7]_i_2\: unisim.vcomponents.LUT3
generic map(
INIT => X"6A"
)
port map (
I0 => \bresp_cnt_reg__0\(7),
I1 => \bresp_cnt[7]_i_6_n_0\,
I2 => \bresp_cnt_reg__0\(6),
O => p_0_in(7)
);
\bresp_cnt[7]_i_6\: unisim.vcomponents.LUT6
generic map(
INIT => X"8000000000000000"
)
port map (
I0 => \bresp_cnt_reg__0\(5),
I1 => \bresp_cnt_reg__0\(3),
I2 => \bresp_cnt_reg__0\(1),
I3 => \bresp_cnt_reg__0\(0),
I4 => \bresp_cnt_reg__0\(2),
I5 => \bresp_cnt_reg__0\(4),
O => \bresp_cnt[7]_i_6_n_0\
);
\bresp_cnt_reg[0]\: unisim.vcomponents.FDRE
port map (
C => aclk,
CE => mhandshake_r,
D => p_0_in(0),
Q => \bresp_cnt_reg__0\(0),
R => s_bresp_acc0
);
\bresp_cnt_reg[1]\: unisim.vcomponents.FDRE
port map (
C => aclk,
CE => mhandshake_r,
D => p_0_in(1),
Q => \bresp_cnt_reg__0\(1),
R => s_bresp_acc0
);
\bresp_cnt_reg[2]\: unisim.vcomponents.FDRE
port map (
C => aclk,
CE => mhandshake_r,
D => p_0_in(2),
Q => \bresp_cnt_reg__0\(2),
R => s_bresp_acc0
);
\bresp_cnt_reg[3]\: unisim.vcomponents.FDRE
port map (
C => aclk,
CE => mhandshake_r,
D => p_0_in(3),
Q => \bresp_cnt_reg__0\(3),
R => s_bresp_acc0
);
\bresp_cnt_reg[4]\: unisim.vcomponents.FDRE
port map (
C => aclk,
CE => mhandshake_r,
D => p_0_in(4),
Q => \bresp_cnt_reg__0\(4),
R => s_bresp_acc0
);
\bresp_cnt_reg[5]\: unisim.vcomponents.FDRE
port map (
C => aclk,
CE => mhandshake_r,
D => p_0_in(5),
Q => \bresp_cnt_reg__0\(5),
R => s_bresp_acc0
);
\bresp_cnt_reg[6]\: unisim.vcomponents.FDRE
port map (
C => aclk,
CE => mhandshake_r,
D => p_0_in(6),
Q => \bresp_cnt_reg__0\(6),
R => s_bresp_acc0
);
\bresp_cnt_reg[7]\: unisim.vcomponents.FDRE
port map (
C => aclk,
CE => mhandshake_r,
D => p_0_in(7),
Q => \bresp_cnt_reg__0\(7),
R => s_bresp_acc0
);
bresp_fifo_0: entity work.\decalper_eb_ot_sdeen_pot_pi_dehcac_xnilix_axi_protocol_converter_v2_1_17_b2s_simple_fifo__parameterized0\
port map (
D(0) => bid_fifo_0_n_3,
Q(1 downto 0) => cnt_read(1 downto 0),
aclk => aclk,
areset_d1 => areset_d1,
\in\(1) => \s_bresp_acc_reg_n_0_[1]\,
\in\(0) => \s_bresp_acc_reg_n_0_[0]\,
m_axi_bready => m_axi_bready,
m_axi_bvalid => m_axi_bvalid,
mhandshake => mhandshake,
mhandshake_r => mhandshake_r,
sel => bresp_push,
shandshake_r => shandshake_r,
\skid_buffer_reg[1]\(1 downto 0) => \skid_buffer_reg[1]\(1 downto 0)
);
bvalid_i_reg: unisim.vcomponents.FDRE
generic map(
INIT => '0'
)
port map (
C => aclk,
CE => '1',
D => bid_fifo_0_n_5,
Q => \^si_rs_bvalid\,
R => '0'
);
mhandshake_r_reg: unisim.vcomponents.FDRE
generic map(
INIT => '0'
)
port map (
C => aclk,
CE => '1',
D => mhandshake,
Q => mhandshake_r,
R => areset_d1
);
\s_bresp_acc[0]_i_1\: unisim.vcomponents.LUT6
generic map(
INIT => X"00000000EACEAAAA"
)
port map (
I0 => \s_bresp_acc_reg_n_0_[0]\,
I1 => m_axi_bresp(0),
I2 => m_axi_bresp(1),
I3 => \s_bresp_acc_reg_n_0_[1]\,
I4 => mhandshake,
I5 => s_bresp_acc0,
O => \s_bresp_acc[0]_i_1_n_0\
);
\s_bresp_acc[1]_i_1\: unisim.vcomponents.LUT4
generic map(
INIT => X"00EC"
)
port map (
I0 => m_axi_bresp(1),
I1 => \s_bresp_acc_reg_n_0_[1]\,
I2 => mhandshake,
I3 => s_bresp_acc0,
O => \s_bresp_acc[1]_i_1_n_0\
);
\s_bresp_acc_reg[0]\: unisim.vcomponents.FDRE
port map (
C => aclk,
CE => '1',
D => \s_bresp_acc[0]_i_1_n_0\,
Q => \s_bresp_acc_reg_n_0_[0]\,
R => '0'
);
\s_bresp_acc_reg[1]\: unisim.vcomponents.FDRE
port map (
C => aclk,
CE => '1',
D => \s_bresp_acc[1]_i_1_n_0\,
Q => \s_bresp_acc_reg_n_0_[1]\,
R => '0'
);
shandshake_r_i_1: unisim.vcomponents.LUT2
generic map(
INIT => X"8"
)
port map (
I0 => \^si_rs_bvalid\,
I1 => si_rs_bready,
O => shandshake
);
shandshake_r_reg: unisim.vcomponents.FDRE
generic map(
INIT => '0'
)
port map (
C => aclk,
CE => '1',
D => shandshake,
Q => shandshake_r,
R => areset_d1
);
end STRUCTURE;
library IEEE;
use IEEE.STD_LOGIC_1164.ALL;
library UNISIM;
use UNISIM.VCOMPONENTS.ALL;
entity decalper_eb_ot_sdeen_pot_pi_dehcac_xnilix_axi_protocol_converter_v2_1_17_b2s_cmd_translator is
port (
next_pending_r_reg : out STD_LOGIC;
wrap_next_pending : out STD_LOGIC;
sel_first_reg_0 : out STD_LOGIC;
sel_first_0 : out STD_LOGIC;
sel_first : out STD_LOGIC;
Q : out STD_LOGIC_VECTOR ( 0 to 0 );
\axlen_cnt_reg[2]\ : out STD_LOGIC;
\wrap_cnt_r_reg[3]\ : out STD_LOGIC;
\wrap_second_len_r_reg[3]\ : out STD_LOGIC_VECTOR ( 3 downto 0 );
\state_reg[1]_rep\ : out STD_LOGIC;
m_axi_awaddr : out STD_LOGIC_VECTOR ( 11 downto 0 );
\axaddr_offset_r_reg[3]\ : out STD_LOGIC_VECTOR ( 3 downto 0 );
S : out STD_LOGIC_VECTOR ( 3 downto 0 );
incr_next_pending : in STD_LOGIC;
aclk : in STD_LOGIC;
sel_first_i : in STD_LOGIC;
\m_payload_i_reg[39]\ : in STD_LOGIC;
\m_payload_i_reg[39]_0\ : in STD_LOGIC;
sel_first_reg_1 : in STD_LOGIC;
sel_first_reg_2 : in STD_LOGIC;
E : in STD_LOGIC_VECTOR ( 0 to 0 );
\m_payload_i_reg[47]\ : in STD_LOGIC_VECTOR ( 19 downto 0 );
\state_reg[1]\ : in STD_LOGIC_VECTOR ( 1 downto 0 );
si_rs_awvalid : in STD_LOGIC;
\axaddr_offset_r_reg[3]_0\ : in STD_LOGIC;
D : in STD_LOGIC_VECTOR ( 3 downto 0 );
\m_payload_i_reg[47]_0\ : in STD_LOGIC;
\m_payload_i_reg[47]_1\ : in STD_LOGIC;
\next\ : in STD_LOGIC;
axaddr_incr : in STD_LOGIC_VECTOR ( 11 downto 0 );
\wrap_second_len_r_reg[3]_0\ : in STD_LOGIC_VECTOR ( 2 downto 0 );
\axaddr_offset_r_reg[3]_1\ : in STD_LOGIC;
\state_reg[0]\ : in STD_LOGIC_VECTOR ( 0 to 0 );
\state_reg[1]_0\ : in STD_LOGIC_VECTOR ( 0 to 0 );
\state_reg[0]_rep\ : in STD_LOGIC;
\wrap_second_len_r_reg[3]_1\ : in STD_LOGIC_VECTOR ( 3 downto 0 );
\m_payload_i_reg[6]\ : in STD_LOGIC_VECTOR ( 6 downto 0 )
);
end decalper_eb_ot_sdeen_pot_pi_dehcac_xnilix_axi_protocol_converter_v2_1_17_b2s_cmd_translator;
architecture STRUCTURE of decalper_eb_ot_sdeen_pot_pi_dehcac_xnilix_axi_protocol_converter_v2_1_17_b2s_cmd_translator is
signal incr_cmd_0_n_10 : STD_LOGIC;
signal incr_cmd_0_n_11 : STD_LOGIC;
signal incr_cmd_0_n_12 : STD_LOGIC;
signal incr_cmd_0_n_13 : STD_LOGIC;
signal incr_cmd_0_n_14 : STD_LOGIC;
signal incr_cmd_0_n_15 : STD_LOGIC;
signal incr_cmd_0_n_16 : STD_LOGIC;
signal incr_cmd_0_n_4 : STD_LOGIC;
signal incr_cmd_0_n_5 : STD_LOGIC;
signal incr_cmd_0_n_6 : STD_LOGIC;
signal incr_cmd_0_n_7 : STD_LOGIC;
signal incr_cmd_0_n_8 : STD_LOGIC;
signal incr_cmd_0_n_9 : STD_LOGIC;
signal s_axburst_eq0 : STD_LOGIC;
signal s_axburst_eq1 : STD_LOGIC;
begin
incr_cmd_0: entity work.decalper_eb_ot_sdeen_pot_pi_dehcac_xnilix_axi_protocol_converter_v2_1_17_b2s_incr_cmd
port map (
E(0) => E(0),
Q(0) => Q(0),
S(3 downto 0) => S(3 downto 0),
aclk => aclk,
axaddr_incr(11 downto 0) => axaddr_incr(11 downto 0),
\axaddr_incr_reg[0]_0\ => sel_first_0,
\axaddr_incr_reg[11]_0\(10) => incr_cmd_0_n_4,
\axaddr_incr_reg[11]_0\(9) => incr_cmd_0_n_5,
\axaddr_incr_reg[11]_0\(8) => incr_cmd_0_n_6,
\axaddr_incr_reg[11]_0\(7) => incr_cmd_0_n_7,
\axaddr_incr_reg[11]_0\(6) => incr_cmd_0_n_8,
\axaddr_incr_reg[11]_0\(5) => incr_cmd_0_n_9,
\axaddr_incr_reg[11]_0\(4) => incr_cmd_0_n_10,
\axaddr_incr_reg[11]_0\(3) => incr_cmd_0_n_11,
\axaddr_incr_reg[11]_0\(2) => incr_cmd_0_n_12,
\axaddr_incr_reg[11]_0\(1) => incr_cmd_0_n_13,
\axaddr_incr_reg[11]_0\(0) => incr_cmd_0_n_14,
\axlen_cnt_reg[2]_0\ => \axlen_cnt_reg[2]\,
incr_next_pending => incr_next_pending,
\m_axi_awaddr[11]\ => incr_cmd_0_n_15,
\m_axi_awaddr[5]\ => incr_cmd_0_n_16,
\m_payload_i_reg[46]\(9 downto 8) => \m_payload_i_reg[47]\(18 downto 17),
\m_payload_i_reg[46]\(7 downto 5) => \m_payload_i_reg[47]\(14 downto 12),
\m_payload_i_reg[46]\(4) => \m_payload_i_reg[47]\(5),
\m_payload_i_reg[46]\(3 downto 0) => \m_payload_i_reg[47]\(3 downto 0),
\m_payload_i_reg[47]\ => \m_payload_i_reg[47]_0\,
\next\ => \next\,
next_pending_r_reg_0 => next_pending_r_reg,
sel_first_reg_0 => sel_first_reg_1,
\state_reg[0]\(0) => \state_reg[0]\(0),
\state_reg[0]_rep\ => \state_reg[0]_rep\,
\state_reg[1]\(0) => \state_reg[1]_0\(0)
);
\memory_reg[3][0]_srl4_i_2\: unisim.vcomponents.LUT3
generic map(
INIT => X"B8"
)
port map (
I0 => s_axburst_eq1,
I1 => \m_payload_i_reg[47]\(15),
I2 => s_axburst_eq0,
O => \state_reg[1]_rep\
);
s_axburst_eq0_reg: unisim.vcomponents.FDRE
port map (
C => aclk,
CE => '1',
D => \m_payload_i_reg[39]\,
Q => s_axburst_eq0,
R => '0'
);
s_axburst_eq1_reg: unisim.vcomponents.FDRE
port map (
C => aclk,
CE => '1',
D => \m_payload_i_reg[39]_0\,
Q => s_axburst_eq1,
R => '0'
);
sel_first_reg: unisim.vcomponents.FDRE
port map (
C => aclk,
CE => '1',
D => sel_first_i,
Q => sel_first_reg_0,
R => '0'
);
wrap_cmd_0: entity work.decalper_eb_ot_sdeen_pot_pi_dehcac_xnilix_axi_protocol_converter_v2_1_17_b2s_wrap_cmd
port map (
D(3 downto 0) => D(3 downto 0),
E(0) => E(0),
aclk => aclk,
\axaddr_incr_reg[11]\(10) => incr_cmd_0_n_4,
\axaddr_incr_reg[11]\(9) => incr_cmd_0_n_5,
\axaddr_incr_reg[11]\(8) => incr_cmd_0_n_6,
\axaddr_incr_reg[11]\(7) => incr_cmd_0_n_7,
\axaddr_incr_reg[11]\(6) => incr_cmd_0_n_8,
\axaddr_incr_reg[11]\(5) => incr_cmd_0_n_9,
\axaddr_incr_reg[11]\(4) => incr_cmd_0_n_10,
\axaddr_incr_reg[11]\(3) => incr_cmd_0_n_11,
\axaddr_incr_reg[11]\(2) => incr_cmd_0_n_12,
\axaddr_incr_reg[11]\(1) => incr_cmd_0_n_13,
\axaddr_incr_reg[11]\(0) => incr_cmd_0_n_14,
\axaddr_offset_r_reg[3]_0\(3 downto 0) => \axaddr_offset_r_reg[3]\(3 downto 0),
\axaddr_offset_r_reg[3]_1\ => \axaddr_offset_r_reg[3]_0\,
\axaddr_offset_r_reg[3]_2\ => \axaddr_offset_r_reg[3]_1\,
m_axi_awaddr(11 downto 0) => m_axi_awaddr(11 downto 0),
\m_payload_i_reg[47]\(18 downto 14) => \m_payload_i_reg[47]\(19 downto 15),
\m_payload_i_reg[47]\(13 downto 0) => \m_payload_i_reg[47]\(13 downto 0),
\m_payload_i_reg[47]_0\ => \m_payload_i_reg[47]_1\,
\m_payload_i_reg[6]\(6 downto 0) => \m_payload_i_reg[6]\(6 downto 0),
\next\ => \next\,
sel_first_reg_0 => sel_first,
sel_first_reg_1 => sel_first_reg_2,
sel_first_reg_2 => incr_cmd_0_n_15,
sel_first_reg_3 => incr_cmd_0_n_16,
si_rs_awvalid => si_rs_awvalid,
\state_reg[0]\(0) => \state_reg[0]\(0),
\state_reg[1]\(1 downto 0) => \state_reg[1]\(1 downto 0),
\wrap_cnt_r_reg[3]_0\ => \wrap_cnt_r_reg[3]\,
wrap_next_pending => wrap_next_pending,
\wrap_second_len_r_reg[3]_0\(3 downto 0) => \wrap_second_len_r_reg[3]\(3 downto 0),
\wrap_second_len_r_reg[3]_1\(3 downto 0) => \wrap_second_len_r_reg[3]_1\(3 downto 0),
\wrap_second_len_r_reg[3]_2\(2 downto 0) => \wrap_second_len_r_reg[3]_0\(2 downto 0)
);
end STRUCTURE;
library IEEE;
use IEEE.STD_LOGIC_1164.ALL;
library UNISIM;
use UNISIM.VCOMPONENTS.ALL;
entity decalper_eb_ot_sdeen_pot_pi_dehcac_xnilix_axi_protocol_converter_v2_1_17_b2s_cmd_translator_1 is
port (
sel_first_reg_0 : out STD_LOGIC;
sel_first : out STD_LOGIC;
sel_first_reg_1 : out STD_LOGIC;
\axlen_cnt_reg[0]\ : out STD_LOGIC;
\wrap_cnt_r_reg[3]\ : out STD_LOGIC;
\wrap_second_len_r_reg[3]\ : out STD_LOGIC_VECTOR ( 3 downto 0 );
r_rlast : out STD_LOGIC;
\state_reg[0]_rep\ : out STD_LOGIC;
m_axi_araddr : out STD_LOGIC_VECTOR ( 11 downto 0 );
\axaddr_offset_r_reg[3]\ : out STD_LOGIC_VECTOR ( 3 downto 0 );
S : out STD_LOGIC_VECTOR ( 3 downto 0 );
aclk : in STD_LOGIC;
sel_first_i : in STD_LOGIC;
sel_first_reg_2 : in STD_LOGIC;
sel_first_reg_3 : in STD_LOGIC;
E : in STD_LOGIC_VECTOR ( 0 to 0 );
Q : in STD_LOGIC_VECTOR ( 19 downto 0 );
\state_reg[1]\ : in STD_LOGIC_VECTOR ( 1 downto 0 );
si_rs_arvalid : in STD_LOGIC;
\m_payload_i_reg[47]\ : in STD_LOGIC;
\axaddr_offset_r_reg[3]_0\ : in STD_LOGIC;
D : in STD_LOGIC_VECTOR ( 3 downto 0 );
\m_payload_i_reg[47]_0\ : in STD_LOGIC;
\state_reg[1]_rep\ : in STD_LOGIC;
O : in STD_LOGIC_VECTOR ( 3 downto 0 );
\m_payload_i_reg[7]\ : in STD_LOGIC_VECTOR ( 3 downto 0 );
\m_payload_i_reg[3]\ : in STD_LOGIC_VECTOR ( 3 downto 0 );
\state_reg[0]_rep_0\ : in STD_LOGIC;
\axaddr_offset_r_reg[3]_1\ : in STD_LOGIC;
m_valid_i_reg : in STD_LOGIC_VECTOR ( 0 to 0 );
\state_reg[1]_0\ : in STD_LOGIC;
\wrap_second_len_r_reg[3]_0\ : in STD_LOGIC_VECTOR ( 3 downto 0 );
\wrap_second_len_r_reg[3]_1\ : in STD_LOGIC_VECTOR ( 2 downto 0 );
\m_payload_i_reg[6]\ : in STD_LOGIC_VECTOR ( 6 downto 0 );
sel_first_reg_4 : in STD_LOGIC_VECTOR ( 0 to 0 );
m_axi_arready : in STD_LOGIC
);
attribute ORIG_REF_NAME : string;
attribute ORIG_REF_NAME of decalper_eb_ot_sdeen_pot_pi_dehcac_xnilix_axi_protocol_converter_v2_1_17_b2s_cmd_translator_1 : entity is "axi_protocol_converter_v2_1_17_b2s_cmd_translator";
end decalper_eb_ot_sdeen_pot_pi_dehcac_xnilix_axi_protocol_converter_v2_1_17_b2s_cmd_translator_1;
architecture STRUCTURE of decalper_eb_ot_sdeen_pot_pi_dehcac_xnilix_axi_protocol_converter_v2_1_17_b2s_cmd_translator_1 is
signal incr_cmd_0_n_10 : STD_LOGIC;
signal incr_cmd_0_n_11 : STD_LOGIC;
signal incr_cmd_0_n_12 : STD_LOGIC;
signal incr_cmd_0_n_13 : STD_LOGIC;
signal incr_cmd_0_n_14 : STD_LOGIC;
signal incr_cmd_0_n_15 : STD_LOGIC;
signal incr_cmd_0_n_3 : STD_LOGIC;
signal incr_cmd_0_n_4 : STD_LOGIC;
signal incr_cmd_0_n_5 : STD_LOGIC;
signal incr_cmd_0_n_6 : STD_LOGIC;
signal incr_cmd_0_n_7 : STD_LOGIC;
signal incr_cmd_0_n_8 : STD_LOGIC;
signal incr_cmd_0_n_9 : STD_LOGIC;
signal incr_next_pending : STD_LOGIC;
signal s_axburst_eq0 : STD_LOGIC;
signal s_axburst_eq1 : STD_LOGIC;
signal wrap_cmd_0_n_6 : STD_LOGIC;
signal wrap_cmd_0_n_7 : STD_LOGIC;
attribute SOFT_HLUTNM : string;
attribute SOFT_HLUTNM of r_rlast_r_i_1 : label is "soft_lutpair17";
attribute SOFT_HLUTNM of \state[1]_i_3\ : label is "soft_lutpair17";
begin
incr_cmd_0: entity work.decalper_eb_ot_sdeen_pot_pi_dehcac_xnilix_axi_protocol_converter_v2_1_17_b2s_incr_cmd_2
port map (
E(0) => E(0),
O(3 downto 0) => O(3 downto 0),
Q(10 downto 8) => Q(18 downto 16),
Q(7 downto 5) => Q(14 downto 12),
Q(4) => Q(5),
Q(3 downto 0) => Q(3 downto 0),
S(3 downto 0) => S(3 downto 0),
aclk => aclk,
\axaddr_incr_reg[0]_0\ => sel_first,
\axaddr_incr_reg[11]_0\(7) => incr_cmd_0_n_3,
\axaddr_incr_reg[11]_0\(6) => incr_cmd_0_n_4,
\axaddr_incr_reg[11]_0\(5) => incr_cmd_0_n_5,
\axaddr_incr_reg[11]_0\(4) => incr_cmd_0_n_6,
\axaddr_incr_reg[11]_0\(3) => incr_cmd_0_n_7,
\axaddr_incr_reg[11]_0\(2) => incr_cmd_0_n_8,
\axaddr_incr_reg[11]_0\(1) => incr_cmd_0_n_9,
\axaddr_incr_reg[11]_0\(0) => incr_cmd_0_n_10,
\axlen_cnt_reg[0]_0\ => \axlen_cnt_reg[0]\,
incr_next_pending => incr_next_pending,
\m_axi_araddr[11]\ => incr_cmd_0_n_11,
\m_axi_araddr[1]\ => incr_cmd_0_n_15,
\m_axi_araddr[2]\ => incr_cmd_0_n_14,
\m_axi_araddr[3]\ => incr_cmd_0_n_13,
\m_axi_araddr[5]\ => incr_cmd_0_n_12,
m_axi_arready => m_axi_arready,
\m_payload_i_reg[3]\(3 downto 0) => \m_payload_i_reg[3]\(3 downto 0),
\m_payload_i_reg[47]\ => \m_payload_i_reg[47]\,
\m_payload_i_reg[47]_0\ => \m_payload_i_reg[47]_0\,
\m_payload_i_reg[7]\(3 downto 0) => \m_payload_i_reg[7]\(3 downto 0),
m_valid_i_reg(0) => m_valid_i_reg(0),
sel_first_reg_0 => sel_first_reg_2,
sel_first_reg_1(0) => sel_first_reg_4(0),
si_rs_arvalid => si_rs_arvalid,
\state_reg[0]_rep\ => \state_reg[0]_rep_0\,
\state_reg[1]\ => \state_reg[1]_0\,
\state_reg[1]_0\(1 downto 0) => \state_reg[1]\(1 downto 0),
\state_reg[1]_rep\ => \state_reg[1]_rep\
);
r_rlast_r_i_1: unisim.vcomponents.LUT3
generic map(
INIT => X"1D"
)
port map (
I0 => s_axburst_eq0,
I1 => Q(15),
I2 => s_axburst_eq1,
O => r_rlast
);
s_axburst_eq0_reg: unisim.vcomponents.FDRE
port map (
C => aclk,
CE => '1',
D => wrap_cmd_0_n_6,
Q => s_axburst_eq0,
R => '0'
);
s_axburst_eq1_reg: unisim.vcomponents.FDRE
port map (
C => aclk,
CE => '1',
D => wrap_cmd_0_n_7,
Q => s_axburst_eq1,
R => '0'
);
sel_first_reg: unisim.vcomponents.FDRE
port map (
C => aclk,
CE => '1',
D => sel_first_i,
Q => sel_first_reg_0,
R => '0'
);
\state[1]_i_3\: unisim.vcomponents.LUT3
generic map(
INIT => X"B8"
)
port map (
I0 => s_axburst_eq1,
I1 => Q(15),
I2 => s_axburst_eq0,
O => \state_reg[0]_rep\
);
wrap_cmd_0: entity work.decalper_eb_ot_sdeen_pot_pi_dehcac_xnilix_axi_protocol_converter_v2_1_17_b2s_wrap_cmd_3
port map (
D(3 downto 0) => D(3 downto 0),
E(0) => E(0),
Q(18 downto 14) => Q(19 downto 15),
Q(13 downto 0) => Q(13 downto 0),
aclk => aclk,
\axaddr_incr_reg[11]\(7) => incr_cmd_0_n_3,
\axaddr_incr_reg[11]\(6) => incr_cmd_0_n_4,
\axaddr_incr_reg[11]\(5) => incr_cmd_0_n_5,
\axaddr_incr_reg[11]\(4) => incr_cmd_0_n_6,
\axaddr_incr_reg[11]\(3) => incr_cmd_0_n_7,
\axaddr_incr_reg[11]\(2) => incr_cmd_0_n_8,
\axaddr_incr_reg[11]\(1) => incr_cmd_0_n_9,
\axaddr_incr_reg[11]\(0) => incr_cmd_0_n_10,
\axaddr_offset_r_reg[3]_0\(3 downto 0) => \axaddr_offset_r_reg[3]\(3 downto 0),
\axaddr_offset_r_reg[3]_1\ => \axaddr_offset_r_reg[3]_0\,
\axaddr_offset_r_reg[3]_2\ => \axaddr_offset_r_reg[3]_1\,
incr_next_pending => incr_next_pending,
m_axi_araddr(11 downto 0) => m_axi_araddr(11 downto 0),
\m_payload_i_reg[47]\ => \m_payload_i_reg[47]_0\,
\m_payload_i_reg[6]\(6 downto 0) => \m_payload_i_reg[6]\(6 downto 0),
m_valid_i_reg(0) => m_valid_i_reg(0),
s_axburst_eq0_reg => wrap_cmd_0_n_6,
s_axburst_eq1_reg => wrap_cmd_0_n_7,
sel_first_i => sel_first_i,
sel_first_reg_0 => sel_first_reg_1,
sel_first_reg_1 => sel_first_reg_3,
sel_first_reg_2 => incr_cmd_0_n_11,
sel_first_reg_3 => incr_cmd_0_n_12,
sel_first_reg_4 => incr_cmd_0_n_13,
sel_first_reg_5 => incr_cmd_0_n_14,
sel_first_reg_6 => incr_cmd_0_n_15,
si_rs_arvalid => si_rs_arvalid,
\state_reg[1]\(1 downto 0) => \state_reg[1]\(1 downto 0),
\state_reg[1]_rep\ => \state_reg[1]_rep\,
\wrap_cnt_r_reg[3]_0\ => \wrap_cnt_r_reg[3]\,
\wrap_second_len_r_reg[3]_0\(3 downto 0) => \wrap_second_len_r_reg[3]\(3 downto 0),
\wrap_second_len_r_reg[3]_1\(3 downto 0) => \wrap_second_len_r_reg[3]_0\(3 downto 0),
\wrap_second_len_r_reg[3]_2\(2 downto 0) => \wrap_second_len_r_reg[3]_1\(2 downto 0)
);
end STRUCTURE;
library IEEE;
use IEEE.STD_LOGIC_1164.ALL;
library UNISIM;
use UNISIM.VCOMPONENTS.ALL;
entity decalper_eb_ot_sdeen_pot_pi_dehcac_xnilix_axi_protocol_converter_v2_1_17_b2s_r_channel is
port (
m_valid_i_reg : out STD_LOGIC;
\state_reg[1]_rep\ : out STD_LOGIC;
m_axi_rready : out STD_LOGIC;
\out\ : out STD_LOGIC_VECTOR ( 33 downto 0 );
\skid_buffer_reg[46]\ : out STD_LOGIC_VECTOR ( 12 downto 0 );
\state_reg[1]_rep_0\ : in STD_LOGIC;
aclk : in STD_LOGIC;
r_rlast : in STD_LOGIC;
s_ready_i_reg : in STD_LOGIC;
si_rs_rready : in STD_LOGIC;
m_axi_rvalid : in STD_LOGIC;
\in\ : in STD_LOGIC_VECTOR ( 33 downto 0 );
areset_d1 : in STD_LOGIC;
D : in STD_LOGIC_VECTOR ( 11 downto 0 )
);
end decalper_eb_ot_sdeen_pot_pi_dehcac_xnilix_axi_protocol_converter_v2_1_17_b2s_r_channel;
architecture STRUCTURE of decalper_eb_ot_sdeen_pot_pi_dehcac_xnilix_axi_protocol_converter_v2_1_17_b2s_r_channel is
signal \^m_valid_i_reg\ : STD_LOGIC;
signal r_push_r : STD_LOGIC;
signal rd_data_fifo_0_n_0 : STD_LOGIC;
signal rd_data_fifo_0_n_1 : STD_LOGIC;
signal rd_data_fifo_0_n_2 : STD_LOGIC;
signal rd_data_fifo_0_n_4 : STD_LOGIC;
signal trans_in : STD_LOGIC_VECTOR ( 12 downto 0 );
begin
m_valid_i_reg <= \^m_valid_i_reg\;
\r_arid_r_reg[0]\: unisim.vcomponents.FDRE
port map (
C => aclk,
CE => '1',
D => D(0),
Q => trans_in(1),
R => '0'
);
\r_arid_r_reg[10]\: unisim.vcomponents.FDRE
port map (
C => aclk,
CE => '1',
D => D(10),
Q => trans_in(11),
R => '0'
);
\r_arid_r_reg[11]\: unisim.vcomponents.FDRE
port map (
C => aclk,
CE => '1',
D => D(11),
Q => trans_in(12),
R => '0'
);
\r_arid_r_reg[1]\: unisim.vcomponents.FDRE
port map (
C => aclk,
CE => '1',
D => D(1),
Q => trans_in(2),
R => '0'
);
\r_arid_r_reg[2]\: unisim.vcomponents.FDRE
port map (
C => aclk,
CE => '1',
D => D(2),
Q => trans_in(3),
R => '0'
);
\r_arid_r_reg[3]\: unisim.vcomponents.FDRE
port map (
C => aclk,
CE => '1',
D => D(3),
Q => trans_in(4),
R => '0'
);
\r_arid_r_reg[4]\: unisim.vcomponents.FDRE
port map (
C => aclk,
CE => '1',
D => D(4),
Q => trans_in(5),
R => '0'
);
\r_arid_r_reg[5]\: unisim.vcomponents.FDRE
port map (
C => aclk,
CE => '1',
D => D(5),
Q => trans_in(6),
R => '0'
);
\r_arid_r_reg[6]\: unisim.vcomponents.FDRE
port map (
C => aclk,
CE => '1',
D => D(6),
Q => trans_in(7),
R => '0'
);
\r_arid_r_reg[7]\: unisim.vcomponents.FDRE
port map (
C => aclk,
CE => '1',
D => D(7),
Q => trans_in(8),
R => '0'
);
\r_arid_r_reg[8]\: unisim.vcomponents.FDRE
port map (
C => aclk,
CE => '1',
D => D(8),
Q => trans_in(9),
R => '0'
);
\r_arid_r_reg[9]\: unisim.vcomponents.FDRE
port map (
C => aclk,
CE => '1',
D => D(9),
Q => trans_in(10),
R => '0'
);
r_push_r_reg: unisim.vcomponents.FDRE
port map (
C => aclk,
CE => '1',
D => \state_reg[1]_rep_0\,
Q => r_push_r,
R => '0'
);
r_rlast_r_reg: unisim.vcomponents.FDRE
port map (
C => aclk,
CE => '1',
D => r_rlast,
Q => trans_in(0),
R => '0'
);
rd_data_fifo_0: entity work.\decalper_eb_ot_sdeen_pot_pi_dehcac_xnilix_axi_protocol_converter_v2_1_17_b2s_simple_fifo__parameterized1\
port map (
aclk => aclk,
areset_d1 => areset_d1,
\cnt_read_reg[4]_rep__0_0\ => \^m_valid_i_reg\,
\cnt_read_reg[4]_rep__2_0\ => rd_data_fifo_0_n_0,
\cnt_read_reg[4]_rep__2_1\ => rd_data_fifo_0_n_1,
\cnt_read_reg[4]_rep__2_2\ => rd_data_fifo_0_n_2,
\in\(33 downto 0) => \in\(33 downto 0),
m_axi_rready => m_axi_rready,
m_axi_rvalid => m_axi_rvalid,
\out\(33 downto 0) => \out\(33 downto 0),
s_ready_i_reg => s_ready_i_reg,
si_rs_rready => si_rs_rready,
\state_reg[1]_rep\ => rd_data_fifo_0_n_4
);
transaction_fifo_0: entity work.\decalper_eb_ot_sdeen_pot_pi_dehcac_xnilix_axi_protocol_converter_v2_1_17_b2s_simple_fifo__parameterized2\
port map (
aclk => aclk,
areset_d1 => areset_d1,
\cnt_read_reg[0]_rep__3\ => rd_data_fifo_0_n_2,
\cnt_read_reg[0]_rep__3_0\ => rd_data_fifo_0_n_4,
\cnt_read_reg[3]_rep__2\ => rd_data_fifo_0_n_0,
\cnt_read_reg[4]_rep__2\ => rd_data_fifo_0_n_1,
\in\(12 downto 0) => trans_in(12 downto 0),
m_valid_i_reg => \^m_valid_i_reg\,
r_push_r => r_push_r,
s_ready_i_reg => s_ready_i_reg,
si_rs_rready => si_rs_rready,
\skid_buffer_reg[46]\(12 downto 0) => \skid_buffer_reg[46]\(12 downto 0),
\state_reg[1]_rep\ => \state_reg[1]_rep\
);
end STRUCTURE;
library IEEE;
use IEEE.STD_LOGIC_1164.ALL;
library UNISIM;
use UNISIM.VCOMPONENTS.ALL;
entity decalper_eb_ot_sdeen_pot_pi_dehcac_xnilix_axi_register_slice_v2_1_17_axi_register_slice is
port (
s_axi_awready : out STD_LOGIC;
s_axi_arready : out STD_LOGIC;
si_rs_awvalid : out STD_LOGIC;
s_axi_bvalid : out STD_LOGIC;
si_rs_bready : out STD_LOGIC;
si_rs_arvalid : out STD_LOGIC;
s_axi_rvalid : out STD_LOGIC;
si_rs_rready : out STD_LOGIC;
\axlen_cnt_reg[3]\ : out STD_LOGIC;
Q : out STD_LOGIC_VECTOR ( 54 downto 0 );
\axlen_cnt_reg[3]_0\ : out STD_LOGIC;
\s_arid_r_reg[11]\ : out STD_LOGIC_VECTOR ( 54 downto 0 );
axaddr_incr : out STD_LOGIC_VECTOR ( 11 downto 0 );
\axaddr_incr_reg[3]\ : out STD_LOGIC_VECTOR ( 3 downto 0 );
\axaddr_incr_reg[7]\ : out STD_LOGIC_VECTOR ( 3 downto 0 );
O : out STD_LOGIC_VECTOR ( 3 downto 0 );
D : out STD_LOGIC_VECTOR ( 1 downto 0 );
\wrap_second_len_r_reg[3]\ : out STD_LOGIC_VECTOR ( 2 downto 0 );
\wrap_cnt_r_reg[2]\ : out STD_LOGIC;
axaddr_offset : out STD_LOGIC_VECTOR ( 2 downto 0 );
\wrap_cnt_r_reg[3]\ : out STD_LOGIC;
\axaddr_offset_r_reg[2]\ : out STD_LOGIC;
next_pending_r_reg : out STD_LOGIC;
\wrap_cnt_r_reg[3]_0\ : out STD_LOGIC_VECTOR ( 1 downto 0 );
\wrap_second_len_r_reg[3]_0\ : out STD_LOGIC_VECTOR ( 2 downto 0 );
\wrap_cnt_r_reg[2]_0\ : out STD_LOGIC;
axaddr_offset_0 : out STD_LOGIC_VECTOR ( 2 downto 0 );
\wrap_cnt_r_reg[3]_1\ : out STD_LOGIC;
\axaddr_offset_r_reg[2]_0\ : out STD_LOGIC;
next_pending_r_reg_0 : out STD_LOGIC;
\cnt_read_reg[2]_rep__0\ : out STD_LOGIC;
\wrap_boundary_axaddr_r_reg[6]\ : out STD_LOGIC_VECTOR ( 6 downto 0 );
\wrap_boundary_axaddr_r_reg[6]_0\ : out STD_LOGIC_VECTOR ( 6 downto 0 );
\s_axi_bid[11]\ : out STD_LOGIC_VECTOR ( 13 downto 0 );
\s_axi_rid[11]\ : out STD_LOGIC_VECTOR ( 46 downto 0 );
aclk : in STD_LOGIC;
s_ready_i0 : in STD_LOGIC;
m_valid_i0 : in STD_LOGIC;
aresetn : in STD_LOGIC;
\state_reg[1]\ : in STD_LOGIC_VECTOR ( 1 downto 0 );
\state_reg[1]_0\ : in STD_LOGIC_VECTOR ( 1 downto 0 );
\cnt_read_reg[4]_rep__0\ : in STD_LOGIC;
s_axi_rready : in STD_LOGIC;
S : in STD_LOGIC_VECTOR ( 3 downto 0 );
\m_payload_i_reg[3]\ : in STD_LOGIC_VECTOR ( 3 downto 0 );
\wrap_second_len_r_reg[3]_1\ : in STD_LOGIC_VECTOR ( 3 downto 0 );
\state_reg[1]_rep\ : in STD_LOGIC;
\wrap_second_len_r_reg[1]\ : in STD_LOGIC;
\axaddr_offset_r_reg[2]_1\ : in STD_LOGIC_VECTOR ( 0 to 0 );
\axaddr_offset_r_reg[3]\ : in STD_LOGIC_VECTOR ( 2 downto 0 );
\axaddr_offset_r_reg[3]_0\ : in STD_LOGIC;
\axaddr_offset_r_reg[2]_2\ : in STD_LOGIC;
\state_reg[0]_rep\ : in STD_LOGIC;
\state_reg[1]_rep_0\ : in STD_LOGIC;
s_axi_awvalid : in STD_LOGIC;
b_push : in STD_LOGIC;
\wrap_second_len_r_reg[3]_2\ : in STD_LOGIC_VECTOR ( 3 downto 0 );
\state_reg[1]_rep_1\ : in STD_LOGIC;
\wrap_second_len_r_reg[1]_0\ : in STD_LOGIC;
\axaddr_offset_r_reg[2]_3\ : in STD_LOGIC_VECTOR ( 0 to 0 );
\axaddr_offset_r_reg[3]_1\ : in STD_LOGIC_VECTOR ( 2 downto 0 );
\axaddr_offset_r_reg[3]_2\ : in STD_LOGIC;
\axaddr_offset_r_reg[2]_4\ : in STD_LOGIC;
\state_reg[0]_rep_0\ : in STD_LOGIC;
\state_reg[1]_rep_2\ : in STD_LOGIC;
si_rs_bvalid : in STD_LOGIC;
s_axi_bready : in STD_LOGIC;
s_axi_awid : in STD_LOGIC_VECTOR ( 11 downto 0 );
s_axi_awlen : in STD_LOGIC_VECTOR ( 3 downto 0 );
s_axi_awburst : in STD_LOGIC_VECTOR ( 1 downto 0 );
s_axi_awsize : in STD_LOGIC_VECTOR ( 1 downto 0 );
s_axi_awprot : in STD_LOGIC_VECTOR ( 2 downto 0 );
s_axi_awaddr : in STD_LOGIC_VECTOR ( 31 downto 0 );
s_axi_arid : in STD_LOGIC_VECTOR ( 11 downto 0 );
s_axi_arlen : in STD_LOGIC_VECTOR ( 3 downto 0 );
s_axi_arburst : in STD_LOGIC_VECTOR ( 1 downto 0 );
s_axi_arsize : in STD_LOGIC_VECTOR ( 1 downto 0 );
s_axi_arprot : in STD_LOGIC_VECTOR ( 2 downto 0 );
s_axi_araddr : in STD_LOGIC_VECTOR ( 31 downto 0 );
\out\ : in STD_LOGIC_VECTOR ( 11 downto 0 );
\s_bresp_acc_reg[1]\ : in STD_LOGIC_VECTOR ( 1 downto 0 );
r_push_r_reg : in STD_LOGIC_VECTOR ( 12 downto 0 );
\cnt_read_reg[4]\ : in STD_LOGIC_VECTOR ( 33 downto 0 );
E : in STD_LOGIC_VECTOR ( 0 to 0 );
m_valid_i_reg : in STD_LOGIC_VECTOR ( 0 to 0 )
);
end decalper_eb_ot_sdeen_pot_pi_dehcac_xnilix_axi_register_slice_v2_1_17_axi_register_slice;
architecture STRUCTURE of decalper_eb_ot_sdeen_pot_pi_dehcac_xnilix_axi_register_slice_v2_1_17_axi_register_slice is
signal \ar.ar_pipe_n_2\ : STD_LOGIC;
signal \aw.aw_pipe_n_1\ : STD_LOGIC;
signal \aw.aw_pipe_n_90\ : STD_LOGIC;
begin
\ar.ar_pipe\: entity work.decalper_eb_ot_sdeen_pot_pi_dehcac_xnilix_axi_register_slice_v2_1_17_axic_register_slice
port map (
O(3 downto 0) => O(3 downto 0),
Q(54 downto 0) => \s_arid_r_reg[11]\(54 downto 0),
aclk => aclk,
\aresetn_d_reg[0]\ => \aw.aw_pipe_n_1\,
\aresetn_d_reg[0]_0\ => \aw.aw_pipe_n_90\,
\axaddr_incr_reg[3]\(3 downto 0) => \axaddr_incr_reg[3]\(3 downto 0),
\axaddr_incr_reg[7]\(3 downto 0) => \axaddr_incr_reg[7]\(3 downto 0),
axaddr_offset_0(1 downto 0) => axaddr_offset_0(2 downto 1),
\axaddr_offset_r_reg[0]\ => axaddr_offset_0(0),
\axaddr_offset_r_reg[2]\ => \axaddr_offset_r_reg[2]_0\,
\axaddr_offset_r_reg[2]_0\(0) => \axaddr_offset_r_reg[2]_3\(0),
\axaddr_offset_r_reg[2]_1\ => \axaddr_offset_r_reg[2]_4\,
\axaddr_offset_r_reg[3]\ => si_rs_arvalid,
\axaddr_offset_r_reg[3]_0\(2 downto 0) => \axaddr_offset_r_reg[3]_1\(2 downto 0),
\axaddr_offset_r_reg[3]_1\ => \axaddr_offset_r_reg[3]_2\,
\axlen_cnt_reg[3]\ => \axlen_cnt_reg[3]_0\,
\m_payload_i_reg[3]_0\(3 downto 0) => \m_payload_i_reg[3]\(3 downto 0),
m_valid_i0 => m_valid_i0,
m_valid_i_reg_0 => \ar.ar_pipe_n_2\,
m_valid_i_reg_1(0) => m_valid_i_reg(0),
next_pending_r_reg => next_pending_r_reg_0,
s_axi_araddr(31 downto 0) => s_axi_araddr(31 downto 0),
s_axi_arburst(1 downto 0) => s_axi_arburst(1 downto 0),
s_axi_arid(11 downto 0) => s_axi_arid(11 downto 0),
s_axi_arlen(3 downto 0) => s_axi_arlen(3 downto 0),
s_axi_arprot(2 downto 0) => s_axi_arprot(2 downto 0),
s_axi_arready => s_axi_arready,
s_axi_arsize(1 downto 0) => s_axi_arsize(1 downto 0),
s_ready_i0 => s_ready_i0,
\state_reg[0]_rep\ => \state_reg[0]_rep_0\,
\state_reg[1]\(1 downto 0) => \state_reg[1]_0\(1 downto 0),
\state_reg[1]_rep\ => \state_reg[1]_rep_1\,
\state_reg[1]_rep_0\ => \state_reg[1]_rep_2\,
\wrap_boundary_axaddr_r_reg[6]\(6 downto 0) => \wrap_boundary_axaddr_r_reg[6]_0\(6 downto 0),
\wrap_cnt_r_reg[2]\ => \wrap_cnt_r_reg[2]_0\,
\wrap_cnt_r_reg[3]\(1 downto 0) => \wrap_cnt_r_reg[3]_0\(1 downto 0),
\wrap_cnt_r_reg[3]_0\ => \wrap_cnt_r_reg[3]_1\,
\wrap_second_len_r_reg[1]\ => \wrap_second_len_r_reg[1]_0\,
\wrap_second_len_r_reg[3]\(2 downto 0) => \wrap_second_len_r_reg[3]_0\(2 downto 0),
\wrap_second_len_r_reg[3]_0\(3 downto 0) => \wrap_second_len_r_reg[3]_2\(3 downto 0)
);
\aw.aw_pipe\: entity work.decalper_eb_ot_sdeen_pot_pi_dehcac_xnilix_axi_register_slice_v2_1_17_axic_register_slice_0
port map (
D(1 downto 0) => D(1 downto 0),
E(0) => E(0),
Q(54 downto 0) => Q(54 downto 0),
S(3 downto 0) => S(3 downto 0),
aclk => aclk,
aresetn => aresetn,
\aresetn_d_reg[1]_inv\ => \aw.aw_pipe_n_90\,
\aresetn_d_reg[1]_inv_0\ => \ar.ar_pipe_n_2\,
axaddr_incr(11 downto 0) => axaddr_incr(11 downto 0),
axaddr_offset(1 downto 0) => axaddr_offset(2 downto 1),
\axaddr_offset_r_reg[0]\ => axaddr_offset(0),
\axaddr_offset_r_reg[2]\ => \axaddr_offset_r_reg[2]\,
\axaddr_offset_r_reg[2]_0\(0) => \axaddr_offset_r_reg[2]_1\(0),
\axaddr_offset_r_reg[2]_1\ => \axaddr_offset_r_reg[2]_2\,
\axaddr_offset_r_reg[3]\(2 downto 0) => \axaddr_offset_r_reg[3]\(2 downto 0),
\axaddr_offset_r_reg[3]_0\ => \axaddr_offset_r_reg[3]_0\,
\axlen_cnt_reg[3]\ => \axlen_cnt_reg[3]\,
b_push => b_push,
m_valid_i_reg_0 => si_rs_awvalid,
next_pending_r_reg => next_pending_r_reg,
s_axi_awaddr(31 downto 0) => s_axi_awaddr(31 downto 0),
s_axi_awburst(1 downto 0) => s_axi_awburst(1 downto 0),
s_axi_awid(11 downto 0) => s_axi_awid(11 downto 0),
s_axi_awlen(3 downto 0) => s_axi_awlen(3 downto 0),
s_axi_awprot(2 downto 0) => s_axi_awprot(2 downto 0),
s_axi_awready => s_axi_awready,
s_axi_awsize(1 downto 0) => s_axi_awsize(1 downto 0),
s_axi_awvalid => s_axi_awvalid,
s_ready_i_reg_0 => \aw.aw_pipe_n_1\,
\state_reg[0]_rep\ => \state_reg[0]_rep\,
\state_reg[1]\(1 downto 0) => \state_reg[1]\(1 downto 0),
\state_reg[1]_rep\ => \state_reg[1]_rep\,
\state_reg[1]_rep_0\ => \state_reg[1]_rep_0\,
\wrap_boundary_axaddr_r_reg[6]\(6 downto 0) => \wrap_boundary_axaddr_r_reg[6]\(6 downto 0),
\wrap_cnt_r_reg[2]\ => \wrap_cnt_r_reg[2]\,
\wrap_cnt_r_reg[3]\ => \wrap_cnt_r_reg[3]\,
\wrap_second_len_r_reg[1]\ => \wrap_second_len_r_reg[1]\,
\wrap_second_len_r_reg[3]\(2 downto 0) => \wrap_second_len_r_reg[3]\(2 downto 0),
\wrap_second_len_r_reg[3]_0\(3 downto 0) => \wrap_second_len_r_reg[3]_1\(3 downto 0)
);
\b.b_pipe\: entity work.\decalper_eb_ot_sdeen_pot_pi_dehcac_xnilix_axi_register_slice_v2_1_17_axic_register_slice__parameterized1\
port map (
aclk => aclk,
\aresetn_d_reg[0]\ => \aw.aw_pipe_n_1\,
\aresetn_d_reg[1]_inv\ => \ar.ar_pipe_n_2\,
\out\(11 downto 0) => \out\(11 downto 0),
\s_axi_bid[11]\(13 downto 0) => \s_axi_bid[11]\(13 downto 0),
s_axi_bready => s_axi_bready,
s_axi_bvalid => s_axi_bvalid,
\s_bresp_acc_reg[1]\(1 downto 0) => \s_bresp_acc_reg[1]\(1 downto 0),
si_rs_bvalid => si_rs_bvalid,
\skid_buffer_reg[0]_0\ => si_rs_bready
);
\r.r_pipe\: entity work.\decalper_eb_ot_sdeen_pot_pi_dehcac_xnilix_axi_register_slice_v2_1_17_axic_register_slice__parameterized2\
port map (
aclk => aclk,
\aresetn_d_reg[0]\ => \aw.aw_pipe_n_1\,
\aresetn_d_reg[1]_inv\ => \ar.ar_pipe_n_2\,
\cnt_read_reg[2]_rep__0\ => \cnt_read_reg[2]_rep__0\,
\cnt_read_reg[4]\(33 downto 0) => \cnt_read_reg[4]\(33 downto 0),
\cnt_read_reg[4]_rep__0\ => \cnt_read_reg[4]_rep__0\,
r_push_r_reg(12 downto 0) => r_push_r_reg(12 downto 0),
\s_axi_rid[11]\(46 downto 0) => \s_axi_rid[11]\(46 downto 0),
s_axi_rready => s_axi_rready,
s_axi_rvalid => s_axi_rvalid,
\skid_buffer_reg[0]_0\ => si_rs_rready
);
end STRUCTURE;
library IEEE;
use IEEE.STD_LOGIC_1164.ALL;
library UNISIM;
use UNISIM.VCOMPONENTS.ALL;
entity decalper_eb_ot_sdeen_pot_pi_dehcac_xnilix_axi_protocol_converter_v2_1_17_b2s_ar_channel is
port (
\wrap_boundary_axaddr_r_reg[11]\ : out STD_LOGIC;
\state_reg[0]_rep\ : out STD_LOGIC_VECTOR ( 1 downto 0 );
r_push_r_reg : out STD_LOGIC;
\m_payload_i_reg[0]\ : out STD_LOGIC;
\m_payload_i_reg[0]_0\ : out STD_LOGIC;
\wrap_second_len_r_reg[3]\ : out STD_LOGIC_VECTOR ( 3 downto 0 );
\wrap_cnt_r_reg[3]\ : out STD_LOGIC;
\wrap_cnt_r_reg[3]_0\ : out STD_LOGIC;
\axaddr_offset_r_reg[3]\ : out STD_LOGIC_VECTOR ( 2 downto 0 );
\axaddr_offset_r_reg[2]\ : out STD_LOGIC_VECTOR ( 0 to 0 );
\wrap_cnt_r_reg[3]_1\ : out STD_LOGIC;
m_axi_arvalid : out STD_LOGIC;
m_valid_i0 : out STD_LOGIC;
s_ready_i0 : out STD_LOGIC;
E : out STD_LOGIC_VECTOR ( 0 to 0 );
r_rlast : out STD_LOGIC;
m_axi_araddr : out STD_LOGIC_VECTOR ( 11 downto 0 );
\r_arid_r_reg[11]\ : out STD_LOGIC_VECTOR ( 11 downto 0 );
S : out STD_LOGIC_VECTOR ( 3 downto 0 );
aclk : in STD_LOGIC;
Q : in STD_LOGIC_VECTOR ( 31 downto 0 );
m_axi_arready : in STD_LOGIC;
si_rs_arvalid : in STD_LOGIC;
\cnt_read_reg[2]_rep__0\ : in STD_LOGIC;
\m_payload_i_reg[47]\ : in STD_LOGIC;
\axaddr_offset_r_reg[3]_0\ : in STD_LOGIC;
axaddr_offset : in STD_LOGIC_VECTOR ( 2 downto 0 );
\axaddr_offset_r_reg[3]_1\ : in STD_LOGIC;
D : in STD_LOGIC_VECTOR ( 2 downto 0 );
\m_payload_i_reg[47]_0\ : in STD_LOGIC;
areset_d1 : in STD_LOGIC;
\m_payload_i_reg[5]\ : in STD_LOGIC;
s_axi_arvalid : in STD_LOGIC;
s_ready_i_reg : in STD_LOGIC;
O : in STD_LOGIC_VECTOR ( 3 downto 0 );
\m_payload_i_reg[7]\ : in STD_LOGIC_VECTOR ( 3 downto 0 );
\m_payload_i_reg[3]\ : in STD_LOGIC_VECTOR ( 3 downto 0 );
\wrap_second_len_r_reg[3]_0\ : in STD_LOGIC_VECTOR ( 1 downto 0 );
\m_payload_i_reg[6]\ : in STD_LOGIC_VECTOR ( 6 downto 0 )
);
end decalper_eb_ot_sdeen_pot_pi_dehcac_xnilix_axi_protocol_converter_v2_1_17_b2s_ar_channel;
architecture STRUCTURE of decalper_eb_ot_sdeen_pot_pi_dehcac_xnilix_axi_protocol_converter_v2_1_17_b2s_ar_channel is
signal ar_cmd_fsm_0_n_0 : STD_LOGIC;
signal ar_cmd_fsm_0_n_10 : STD_LOGIC;
signal ar_cmd_fsm_0_n_16 : STD_LOGIC;
signal ar_cmd_fsm_0_n_6 : STD_LOGIC;
signal ar_cmd_fsm_0_n_8 : STD_LOGIC;
signal ar_cmd_fsm_0_n_9 : STD_LOGIC;
signal \^axaddr_offset_r_reg[2]\ : STD_LOGIC_VECTOR ( 0 to 0 );
signal \^axaddr_offset_r_reg[3]\ : STD_LOGIC_VECTOR ( 2 downto 0 );
signal cmd_translator_0_n_0 : STD_LOGIC;
signal cmd_translator_0_n_10 : STD_LOGIC;
signal cmd_translator_0_n_2 : STD_LOGIC;
signal cmd_translator_0_n_3 : STD_LOGIC;
signal \incr_cmd_0/sel_first\ : STD_LOGIC;
signal \^m_payload_i_reg[0]_0\ : STD_LOGIC;
signal \^r_push_r_reg\ : STD_LOGIC;
signal sel_first_i : STD_LOGIC;
signal \^state_reg[0]_rep\ : STD_LOGIC_VECTOR ( 1 downto 0 );
signal \^wrap_boundary_axaddr_r_reg[11]\ : STD_LOGIC;
signal \wrap_cmd_0/axaddr_offset_r\ : STD_LOGIC_VECTOR ( 2 to 2 );
signal \wrap_cmd_0/wrap_second_len\ : STD_LOGIC_VECTOR ( 0 to 0 );
signal \^wrap_second_len_r_reg[3]\ : STD_LOGIC_VECTOR ( 3 downto 0 );
begin
\axaddr_offset_r_reg[2]\(0) <= \^axaddr_offset_r_reg[2]\(0);
\axaddr_offset_r_reg[3]\(2 downto 0) <= \^axaddr_offset_r_reg[3]\(2 downto 0);
\m_payload_i_reg[0]_0\ <= \^m_payload_i_reg[0]_0\;
r_push_r_reg <= \^r_push_r_reg\;
\state_reg[0]_rep\(1 downto 0) <= \^state_reg[0]_rep\(1 downto 0);
\wrap_boundary_axaddr_r_reg[11]\ <= \^wrap_boundary_axaddr_r_reg[11]\;
\wrap_second_len_r_reg[3]\(3 downto 0) <= \^wrap_second_len_r_reg[3]\(3 downto 0);
ar_cmd_fsm_0: entity work.decalper_eb_ot_sdeen_pot_pi_dehcac_xnilix_axi_protocol_converter_v2_1_17_b2s_rd_cmd_fsm
port map (
D(0) => ar_cmd_fsm_0_n_6,
E(0) => ar_cmd_fsm_0_n_8,
Q(1 downto 0) => \^state_reg[0]_rep\(1 downto 0),
aclk => aclk,
areset_d1 => areset_d1,
\axaddr_incr_reg[0]\(0) => ar_cmd_fsm_0_n_16,
axaddr_offset(0) => axaddr_offset(0),
\axaddr_offset_r_reg[2]\(0) => \^axaddr_offset_r_reg[2]\(0),
\axaddr_offset_r_reg[3]\ => \axaddr_offset_r_reg[3]_0\,
\axaddr_offset_r_reg[3]_0\(1) => \^axaddr_offset_r_reg[3]\(2),
\axaddr_offset_r_reg[3]_0\(0) => \wrap_cmd_0/axaddr_offset_r\(2),
\axlen_cnt_reg[7]\ => ar_cmd_fsm_0_n_0,
\axlen_cnt_reg[7]_0\ => cmd_translator_0_n_3,
\cnt_read_reg[2]_rep__0\ => \cnt_read_reg[2]_rep__0\,
m_axi_arready => m_axi_arready,
m_axi_arvalid => m_axi_arvalid,
\m_payload_i_reg[0]\ => \m_payload_i_reg[0]\,
\m_payload_i_reg[0]_0\ => \^m_payload_i_reg[0]_0\,
\m_payload_i_reg[0]_1\(0) => E(0),
\m_payload_i_reg[46]\(0) => Q(18),
\m_payload_i_reg[5]\ => \m_payload_i_reg[5]\,
m_valid_i0 => m_valid_i0,
r_push_r_reg => \^r_push_r_reg\,
s_axburst_eq1_reg => cmd_translator_0_n_10,
s_axi_arvalid => s_axi_arvalid,
s_ready_i0 => s_ready_i0,
s_ready_i_reg => s_ready_i_reg,
sel_first => \incr_cmd_0/sel_first\,
sel_first_i => sel_first_i,
sel_first_reg => ar_cmd_fsm_0_n_9,
sel_first_reg_0 => ar_cmd_fsm_0_n_10,
sel_first_reg_1 => cmd_translator_0_n_2,
sel_first_reg_2 => cmd_translator_0_n_0,
si_rs_arvalid => si_rs_arvalid,
\wrap_boundary_axaddr_r_reg[11]\(0) => \^wrap_boundary_axaddr_r_reg[11]\,
\wrap_cnt_r_reg[3]\ => \wrap_cnt_r_reg[3]_0\,
\wrap_cnt_r_reg[3]_0\ => \wrap_cnt_r_reg[3]_1\,
\wrap_second_len_r_reg[0]\(0) => \wrap_cmd_0/wrap_second_len\(0),
\wrap_second_len_r_reg[0]_0\(0) => \^wrap_second_len_r_reg[3]\(0)
);
cmd_translator_0: entity work.decalper_eb_ot_sdeen_pot_pi_dehcac_xnilix_axi_protocol_converter_v2_1_17_b2s_cmd_translator_1
port map (
D(3) => axaddr_offset(2),
D(2) => \^axaddr_offset_r_reg[2]\(0),
D(1 downto 0) => axaddr_offset(1 downto 0),
E(0) => \^wrap_boundary_axaddr_r_reg[11]\,
O(3 downto 0) => O(3 downto 0),
Q(19 downto 0) => Q(19 downto 0),
S(3 downto 0) => S(3 downto 0),
aclk => aclk,
\axaddr_offset_r_reg[3]\(3) => \^axaddr_offset_r_reg[3]\(2),
\axaddr_offset_r_reg[3]\(2) => \wrap_cmd_0/axaddr_offset_r\(2),
\axaddr_offset_r_reg[3]\(1 downto 0) => \^axaddr_offset_r_reg[3]\(1 downto 0),
\axaddr_offset_r_reg[3]_0\ => \axaddr_offset_r_reg[3]_1\,
\axaddr_offset_r_reg[3]_1\ => \axaddr_offset_r_reg[3]_0\,
\axlen_cnt_reg[0]\ => cmd_translator_0_n_3,
m_axi_araddr(11 downto 0) => m_axi_araddr(11 downto 0),
m_axi_arready => m_axi_arready,
\m_payload_i_reg[3]\(3 downto 0) => \m_payload_i_reg[3]\(3 downto 0),
\m_payload_i_reg[47]\ => \m_payload_i_reg[47]\,
\m_payload_i_reg[47]_0\ => \m_payload_i_reg[47]_0\,
\m_payload_i_reg[6]\(6 downto 0) => \m_payload_i_reg[6]\(6 downto 0),
\m_payload_i_reg[7]\(3 downto 0) => \m_payload_i_reg[7]\(3 downto 0),
m_valid_i_reg(0) => ar_cmd_fsm_0_n_8,
r_rlast => r_rlast,
sel_first => \incr_cmd_0/sel_first\,
sel_first_i => sel_first_i,
sel_first_reg_0 => cmd_translator_0_n_0,
sel_first_reg_1 => cmd_translator_0_n_2,
sel_first_reg_2 => ar_cmd_fsm_0_n_10,
sel_first_reg_3 => ar_cmd_fsm_0_n_9,
sel_first_reg_4(0) => ar_cmd_fsm_0_n_16,
si_rs_arvalid => si_rs_arvalid,
\state_reg[0]_rep\ => cmd_translator_0_n_10,
\state_reg[0]_rep_0\ => \^m_payload_i_reg[0]_0\,
\state_reg[1]\(1 downto 0) => \^state_reg[0]_rep\(1 downto 0),
\state_reg[1]_0\ => ar_cmd_fsm_0_n_0,
\state_reg[1]_rep\ => \^r_push_r_reg\,
\wrap_cnt_r_reg[3]\ => \wrap_cnt_r_reg[3]\,
\wrap_second_len_r_reg[3]\(3 downto 0) => \^wrap_second_len_r_reg[3]\(3 downto 0),
\wrap_second_len_r_reg[3]_0\(3 downto 1) => D(2 downto 0),
\wrap_second_len_r_reg[3]_0\(0) => \wrap_cmd_0/wrap_second_len\(0),
\wrap_second_len_r_reg[3]_1\(2 downto 1) => \wrap_second_len_r_reg[3]_0\(1 downto 0),
\wrap_second_len_r_reg[3]_1\(0) => ar_cmd_fsm_0_n_6
);
\s_arid_r_reg[0]\: unisim.vcomponents.FDRE
port map (
C => aclk,
CE => '1',
D => Q(20),
Q => \r_arid_r_reg[11]\(0),
R => '0'
);
\s_arid_r_reg[10]\: unisim.vcomponents.FDRE
port map (
C => aclk,
CE => '1',
D => Q(30),
Q => \r_arid_r_reg[11]\(10),
R => '0'
);
\s_arid_r_reg[11]\: unisim.vcomponents.FDRE
port map (
C => aclk,
CE => '1',
D => Q(31),
Q => \r_arid_r_reg[11]\(11),
R => '0'
);
\s_arid_r_reg[1]\: unisim.vcomponents.FDRE
port map (
C => aclk,
CE => '1',
D => Q(21),
Q => \r_arid_r_reg[11]\(1),
R => '0'
);
\s_arid_r_reg[2]\: unisim.vcomponents.FDRE
port map (
C => aclk,
CE => '1',
D => Q(22),
Q => \r_arid_r_reg[11]\(2),
R => '0'
);
\s_arid_r_reg[3]\: unisim.vcomponents.FDRE
port map (
C => aclk,
CE => '1',
D => Q(23),
Q => \r_arid_r_reg[11]\(3),
R => '0'
);
\s_arid_r_reg[4]\: unisim.vcomponents.FDRE
port map (
C => aclk,
CE => '1',
D => Q(24),
Q => \r_arid_r_reg[11]\(4),
R => '0'
);
\s_arid_r_reg[5]\: unisim.vcomponents.FDRE
port map (
C => aclk,
CE => '1',
D => Q(25),
Q => \r_arid_r_reg[11]\(5),
R => '0'
);
\s_arid_r_reg[6]\: unisim.vcomponents.FDRE
port map (
C => aclk,
CE => '1',
D => Q(26),
Q => \r_arid_r_reg[11]\(6),
R => '0'
);
\s_arid_r_reg[7]\: unisim.vcomponents.FDRE
port map (
C => aclk,
CE => '1',
D => Q(27),
Q => \r_arid_r_reg[11]\(7),
R => '0'
);
\s_arid_r_reg[8]\: unisim.vcomponents.FDRE
port map (
C => aclk,
CE => '1',
D => Q(28),
Q => \r_arid_r_reg[11]\(8),
R => '0'
);
\s_arid_r_reg[9]\: unisim.vcomponents.FDRE
port map (
C => aclk,
CE => '1',
D => Q(29),
Q => \r_arid_r_reg[11]\(9),
R => '0'
);
end STRUCTURE;
library IEEE;
use IEEE.STD_LOGIC_1164.ALL;
library UNISIM;
use UNISIM.VCOMPONENTS.ALL;
entity decalper_eb_ot_sdeen_pot_pi_dehcac_xnilix_axi_protocol_converter_v2_1_17_b2s_aw_channel is
port (
\wrap_boundary_axaddr_r_reg[11]\ : out STD_LOGIC;
\state_reg[0]_rep\ : out STD_LOGIC_VECTOR ( 1 downto 0 );
\axlen_cnt_reg[7]\ : out STD_LOGIC;
\axlen_cnt_reg[7]_0\ : out STD_LOGIC;
\wrap_second_len_r_reg[3]\ : out STD_LOGIC_VECTOR ( 3 downto 0 );
\wrap_cnt_r_reg[3]\ : out STD_LOGIC;
\wrap_cnt_r_reg[3]_0\ : out STD_LOGIC;
\axaddr_offset_r_reg[3]\ : out STD_LOGIC_VECTOR ( 2 downto 0 );
\axaddr_offset_r_reg[2]\ : out STD_LOGIC_VECTOR ( 0 to 0 );
\wrap_cnt_r_reg[3]_1\ : out STD_LOGIC;
E : out STD_LOGIC_VECTOR ( 0 to 0 );
b_push : out STD_LOGIC;
m_axi_awvalid : out STD_LOGIC;
m_axi_awaddr : out STD_LOGIC_VECTOR ( 11 downto 0 );
\in\ : out STD_LOGIC_VECTOR ( 15 downto 0 );
S : out STD_LOGIC_VECTOR ( 3 downto 0 );
aclk : in STD_LOGIC;
Q : in STD_LOGIC_VECTOR ( 31 downto 0 );
si_rs_awvalid : in STD_LOGIC;
\cnt_read_reg[1]_rep__0\ : in STD_LOGIC;
\cnt_read_reg[0]_rep__0\ : in STD_LOGIC;
m_axi_awready : in STD_LOGIC;
D : in STD_LOGIC_VECTOR ( 1 downto 0 );
\axaddr_offset_r_reg[3]_0\ : in STD_LOGIC;
axaddr_offset : in STD_LOGIC_VECTOR ( 2 downto 0 );
\axaddr_offset_r_reg[3]_1\ : in STD_LOGIC;
\wrap_second_len_r_reg[3]_0\ : in STD_LOGIC_VECTOR ( 2 downto 0 );
\m_payload_i_reg[47]\ : in STD_LOGIC;
\m_payload_i_reg[47]_0\ : in STD_LOGIC;
areset_d1 : in STD_LOGIC;
\m_payload_i_reg[5]\ : in STD_LOGIC;
axaddr_incr : in STD_LOGIC_VECTOR ( 11 downto 0 );
\m_payload_i_reg[6]\ : in STD_LOGIC_VECTOR ( 6 downto 0 )
);
end decalper_eb_ot_sdeen_pot_pi_dehcac_xnilix_axi_protocol_converter_v2_1_17_b2s_aw_channel;
architecture STRUCTURE of decalper_eb_ot_sdeen_pot_pi_dehcac_xnilix_axi_protocol_converter_v2_1_17_b2s_aw_channel is
signal aw_cmd_fsm_0_n_12 : STD_LOGIC;
signal aw_cmd_fsm_0_n_14 : STD_LOGIC;
signal aw_cmd_fsm_0_n_15 : STD_LOGIC;
signal aw_cmd_fsm_0_n_16 : STD_LOGIC;
signal aw_cmd_fsm_0_n_2 : STD_LOGIC;
signal aw_cmd_fsm_0_n_8 : STD_LOGIC;
signal aw_cmd_fsm_0_n_9 : STD_LOGIC;
signal \^axaddr_offset_r_reg[2]\ : STD_LOGIC_VECTOR ( 0 to 0 );
signal \^axaddr_offset_r_reg[3]\ : STD_LOGIC_VECTOR ( 2 downto 0 );
signal cmd_translator_0_n_0 : STD_LOGIC;
signal cmd_translator_0_n_12 : STD_LOGIC;
signal cmd_translator_0_n_2 : STD_LOGIC;
signal cmd_translator_0_n_5 : STD_LOGIC;
signal cmd_translator_0_n_6 : STD_LOGIC;
signal \incr_cmd_0/sel_first\ : STD_LOGIC;
signal incr_next_pending : STD_LOGIC;
signal \next\ : STD_LOGIC;
signal sel_first : STD_LOGIC;
signal sel_first_i : STD_LOGIC;
signal \^state_reg[0]_rep\ : STD_LOGIC_VECTOR ( 1 downto 0 );
signal \^wrap_boundary_axaddr_r_reg[11]\ : STD_LOGIC;
signal \wrap_cmd_0/axaddr_offset_r\ : STD_LOGIC_VECTOR ( 2 to 2 );
signal \wrap_cmd_0/wrap_second_len\ : STD_LOGIC_VECTOR ( 0 to 0 );
signal wrap_cnt : STD_LOGIC_VECTOR ( 0 to 0 );
signal wrap_next_pending : STD_LOGIC;
signal \^wrap_second_len_r_reg[3]\ : STD_LOGIC_VECTOR ( 3 downto 0 );
begin
\axaddr_offset_r_reg[2]\(0) <= \^axaddr_offset_r_reg[2]\(0);
\axaddr_offset_r_reg[3]\(2 downto 0) <= \^axaddr_offset_r_reg[3]\(2 downto 0);
\state_reg[0]_rep\(1 downto 0) <= \^state_reg[0]_rep\(1 downto 0);
\wrap_boundary_axaddr_r_reg[11]\ <= \^wrap_boundary_axaddr_r_reg[11]\;
\wrap_second_len_r_reg[3]\(3 downto 0) <= \^wrap_second_len_r_reg[3]\(3 downto 0);
aw_cmd_fsm_0: entity work.decalper_eb_ot_sdeen_pot_pi_dehcac_xnilix_axi_protocol_converter_v2_1_17_b2s_wr_cmd_fsm
port map (
D(0) => wrap_cnt(0),
E(0) => \^wrap_boundary_axaddr_r_reg[11]\,
Q(1 downto 0) => \^state_reg[0]_rep\(1 downto 0),
aclk => aclk,
areset_d1 => areset_d1,
axaddr_offset(0) => axaddr_offset(0),
\axaddr_offset_r_reg[2]\(0) => \^axaddr_offset_r_reg[2]\(0),
\axaddr_offset_r_reg[3]\ => \axaddr_offset_r_reg[3]_0\,
\axaddr_offset_r_reg[3]_0\(1) => \^axaddr_offset_r_reg[3]\(2),
\axaddr_offset_r_reg[3]_0\(0) => \wrap_cmd_0/axaddr_offset_r\(2),
\axaddr_wrap_reg[11]\(0) => aw_cmd_fsm_0_n_14,
\axlen_cnt_reg[0]\(0) => aw_cmd_fsm_0_n_8,
\axlen_cnt_reg[0]_0\(0) => cmd_translator_0_n_5,
\axlen_cnt_reg[7]\ => \axlen_cnt_reg[7]\,
\axlen_cnt_reg[7]_0\ => \axlen_cnt_reg[7]_0\,
\axlen_cnt_reg[7]_1\ => aw_cmd_fsm_0_n_2,
\axlen_cnt_reg[7]_2\ => cmd_translator_0_n_6,
b_push => b_push,
\cnt_read_reg[0]_rep__0\ => \cnt_read_reg[0]_rep__0\,
\cnt_read_reg[1]_rep__0\ => \cnt_read_reg[1]_rep__0\,
incr_next_pending => incr_next_pending,
m_axi_awready => m_axi_awready,
m_axi_awvalid => m_axi_awvalid,
\m_payload_i_reg[0]\(0) => E(0),
\m_payload_i_reg[46]\(2) => Q(18),
\m_payload_i_reg[46]\(1 downto 0) => Q(16 downto 15),
\m_payload_i_reg[47]\ => \m_payload_i_reg[47]_0\,
\m_payload_i_reg[5]\ => \m_payload_i_reg[5]\,
\next\ => \next\,
next_pending_r_reg => cmd_translator_0_n_0,
s_axburst_eq0_reg => aw_cmd_fsm_0_n_9,
s_axburst_eq1_reg => aw_cmd_fsm_0_n_12,
s_axburst_eq1_reg_0 => cmd_translator_0_n_12,
sel_first => sel_first,
sel_first_0 => \incr_cmd_0/sel_first\,
sel_first_i => sel_first_i,
sel_first_reg => aw_cmd_fsm_0_n_15,
sel_first_reg_0 => aw_cmd_fsm_0_n_16,
sel_first_reg_1 => cmd_translator_0_n_2,
si_rs_awvalid => si_rs_awvalid,
\wrap_cnt_r_reg[3]\ => \wrap_cnt_r_reg[3]_0\,
\wrap_cnt_r_reg[3]_0\ => \wrap_cnt_r_reg[3]_1\,
wrap_next_pending => wrap_next_pending,
\wrap_second_len_r_reg[0]\(0) => \wrap_cmd_0/wrap_second_len\(0),
\wrap_second_len_r_reg[0]_0\(0) => \^wrap_second_len_r_reg[3]\(0)
);
cmd_translator_0: entity work.decalper_eb_ot_sdeen_pot_pi_dehcac_xnilix_axi_protocol_converter_v2_1_17_b2s_cmd_translator
port map (
D(3) => axaddr_offset(2),
D(2) => \^axaddr_offset_r_reg[2]\(0),
D(1 downto 0) => axaddr_offset(1 downto 0),
E(0) => \^wrap_boundary_axaddr_r_reg[11]\,
Q(0) => cmd_translator_0_n_5,
S(3 downto 0) => S(3 downto 0),
aclk => aclk,
axaddr_incr(11 downto 0) => axaddr_incr(11 downto 0),
\axaddr_offset_r_reg[3]\(3) => \^axaddr_offset_r_reg[3]\(2),
\axaddr_offset_r_reg[3]\(2) => \wrap_cmd_0/axaddr_offset_r\(2),
\axaddr_offset_r_reg[3]\(1 downto 0) => \^axaddr_offset_r_reg[3]\(1 downto 0),
\axaddr_offset_r_reg[3]_0\ => \axaddr_offset_r_reg[3]_1\,
\axaddr_offset_r_reg[3]_1\ => \axaddr_offset_r_reg[3]_0\,
\axlen_cnt_reg[2]\ => cmd_translator_0_n_6,
incr_next_pending => incr_next_pending,
m_axi_awaddr(11 downto 0) => m_axi_awaddr(11 downto 0),
\m_payload_i_reg[39]\ => aw_cmd_fsm_0_n_9,
\m_payload_i_reg[39]_0\ => aw_cmd_fsm_0_n_12,
\m_payload_i_reg[47]\(19 downto 0) => Q(19 downto 0),
\m_payload_i_reg[47]_0\ => \m_payload_i_reg[47]\,
\m_payload_i_reg[47]_1\ => \m_payload_i_reg[47]_0\,
\m_payload_i_reg[6]\(6 downto 0) => \m_payload_i_reg[6]\(6 downto 0),
\next\ => \next\,
next_pending_r_reg => cmd_translator_0_n_0,
sel_first => sel_first,
sel_first_0 => \incr_cmd_0/sel_first\,
sel_first_i => sel_first_i,
sel_first_reg_0 => cmd_translator_0_n_2,
sel_first_reg_1 => aw_cmd_fsm_0_n_16,
sel_first_reg_2 => aw_cmd_fsm_0_n_15,
si_rs_awvalid => si_rs_awvalid,
\state_reg[0]\(0) => aw_cmd_fsm_0_n_14,
\state_reg[0]_rep\ => aw_cmd_fsm_0_n_2,
\state_reg[1]\(1 downto 0) => \^state_reg[0]_rep\(1 downto 0),
\state_reg[1]_0\(0) => aw_cmd_fsm_0_n_8,
\state_reg[1]_rep\ => cmd_translator_0_n_12,
\wrap_cnt_r_reg[3]\ => \wrap_cnt_r_reg[3]\,
wrap_next_pending => wrap_next_pending,
\wrap_second_len_r_reg[3]\(3 downto 0) => \^wrap_second_len_r_reg[3]\(3 downto 0),
\wrap_second_len_r_reg[3]_0\(2 downto 1) => D(1 downto 0),
\wrap_second_len_r_reg[3]_0\(0) => wrap_cnt(0),
\wrap_second_len_r_reg[3]_1\(3 downto 1) => \wrap_second_len_r_reg[3]_0\(2 downto 0),
\wrap_second_len_r_reg[3]_1\(0) => \wrap_cmd_0/wrap_second_len\(0)
);
\s_awid_r_reg[0]\: unisim.vcomponents.FDRE
port map (
C => aclk,
CE => '1',
D => Q(20),
Q => \in\(4),
R => '0'
);
\s_awid_r_reg[10]\: unisim.vcomponents.FDRE
port map (
C => aclk,
CE => '1',
D => Q(30),
Q => \in\(14),
R => '0'
);
\s_awid_r_reg[11]\: unisim.vcomponents.FDRE
port map (
C => aclk,
CE => '1',
D => Q(31),
Q => \in\(15),
R => '0'
);
\s_awid_r_reg[1]\: unisim.vcomponents.FDRE
port map (
C => aclk,
CE => '1',
D => Q(21),
Q => \in\(5),
R => '0'
);
\s_awid_r_reg[2]\: unisim.vcomponents.FDRE
port map (
C => aclk,
CE => '1',
D => Q(22),
Q => \in\(6),
R => '0'
);
\s_awid_r_reg[3]\: unisim.vcomponents.FDRE
port map (
C => aclk,
CE => '1',
D => Q(23),
Q => \in\(7),
R => '0'
);
\s_awid_r_reg[4]\: unisim.vcomponents.FDRE
port map (
C => aclk,
CE => '1',
D => Q(24),
Q => \in\(8),
R => '0'
);
\s_awid_r_reg[5]\: unisim.vcomponents.FDRE
port map (
C => aclk,
CE => '1',
D => Q(25),
Q => \in\(9),
R => '0'
);
\s_awid_r_reg[6]\: unisim.vcomponents.FDRE
port map (
C => aclk,
CE => '1',
D => Q(26),
Q => \in\(10),
R => '0'
);
\s_awid_r_reg[7]\: unisim.vcomponents.FDRE
port map (
C => aclk,
CE => '1',
D => Q(27),
Q => \in\(11),
R => '0'
);
\s_awid_r_reg[8]\: unisim.vcomponents.FDRE
port map (
C => aclk,
CE => '1',
D => Q(28),
Q => \in\(12),
R => '0'
);
\s_awid_r_reg[9]\: unisim.vcomponents.FDRE
port map (
C => aclk,
CE => '1',
D => Q(29),
Q => \in\(13),
R => '0'
);
\s_awlen_r_reg[0]\: unisim.vcomponents.FDRE
port map (
C => aclk,
CE => '1',
D => Q(16),
Q => \in\(0),
R => '0'
);
\s_awlen_r_reg[1]\: unisim.vcomponents.FDRE
port map (
C => aclk,
CE => '1',
D => Q(17),
Q => \in\(1),
R => '0'
);
\s_awlen_r_reg[2]\: unisim.vcomponents.FDRE
port map (
C => aclk,
CE => '1',
D => Q(18),
Q => \in\(2),
R => '0'
);
\s_awlen_r_reg[3]\: unisim.vcomponents.FDRE
port map (
C => aclk,
CE => '1',
D => Q(19),
Q => \in\(3),
R => '0'
);
end STRUCTURE;
library IEEE;
use IEEE.STD_LOGIC_1164.ALL;
library UNISIM;
use UNISIM.VCOMPONENTS.ALL;
entity decalper_eb_ot_sdeen_pot_pi_dehcac_xnilix_axi_protocol_converter_v2_1_17_b2s is
port (
s_axi_rvalid : out STD_LOGIC;
s_axi_awready : out STD_LOGIC;
Q : out STD_LOGIC_VECTOR ( 22 downto 0 );
s_axi_arready : out STD_LOGIC;
\m_axi_arprot[2]\ : out STD_LOGIC_VECTOR ( 22 downto 0 );
s_axi_bvalid : out STD_LOGIC;
\s_axi_bid[11]\ : out STD_LOGIC_VECTOR ( 13 downto 0 );
\s_axi_rid[11]\ : out STD_LOGIC_VECTOR ( 46 downto 0 );
m_axi_awvalid : out STD_LOGIC;
m_axi_bready : out STD_LOGIC;
m_axi_arvalid : out STD_LOGIC;
m_axi_rready : out STD_LOGIC;
m_axi_awaddr : out STD_LOGIC_VECTOR ( 11 downto 0 );
m_axi_araddr : out STD_LOGIC_VECTOR ( 11 downto 0 );
m_axi_awready : in STD_LOGIC;
m_axi_arready : in STD_LOGIC;
s_axi_rready : in STD_LOGIC;
aclk : in STD_LOGIC;
\in\ : in STD_LOGIC_VECTOR ( 33 downto 0 );
s_axi_awid : in STD_LOGIC_VECTOR ( 11 downto 0 );
s_axi_awlen : in STD_LOGIC_VECTOR ( 3 downto 0 );
s_axi_awburst : in STD_LOGIC_VECTOR ( 1 downto 0 );
s_axi_awsize : in STD_LOGIC_VECTOR ( 1 downto 0 );
s_axi_awprot : in STD_LOGIC_VECTOR ( 2 downto 0 );
s_axi_awaddr : in STD_LOGIC_VECTOR ( 31 downto 0 );
m_axi_bresp : in STD_LOGIC_VECTOR ( 1 downto 0 );
s_axi_arid : in STD_LOGIC_VECTOR ( 11 downto 0 );
s_axi_arlen : in STD_LOGIC_VECTOR ( 3 downto 0 );
s_axi_arburst : in STD_LOGIC_VECTOR ( 1 downto 0 );
s_axi_arsize : in STD_LOGIC_VECTOR ( 1 downto 0 );
s_axi_arprot : in STD_LOGIC_VECTOR ( 2 downto 0 );
s_axi_araddr : in STD_LOGIC_VECTOR ( 31 downto 0 );
s_axi_awvalid : in STD_LOGIC;
m_axi_bvalid : in STD_LOGIC;
m_axi_rvalid : in STD_LOGIC;
s_axi_bready : in STD_LOGIC;
s_axi_arvalid : in STD_LOGIC;
aresetn : in STD_LOGIC
);
end decalper_eb_ot_sdeen_pot_pi_dehcac_xnilix_axi_protocol_converter_v2_1_17_b2s;
architecture STRUCTURE of decalper_eb_ot_sdeen_pot_pi_dehcac_xnilix_axi_protocol_converter_v2_1_17_b2s is
signal \RD.ar_channel_0_n_0\ : STD_LOGIC;
signal \RD.ar_channel_0_n_10\ : STD_LOGIC;
signal \RD.ar_channel_0_n_11\ : STD_LOGIC;
signal \RD.ar_channel_0_n_16\ : STD_LOGIC;
signal \RD.ar_channel_0_n_3\ : STD_LOGIC;
signal \RD.ar_channel_0_n_4\ : STD_LOGIC;
signal \RD.ar_channel_0_n_46\ : STD_LOGIC;
signal \RD.ar_channel_0_n_47\ : STD_LOGIC;
signal \RD.ar_channel_0_n_48\ : STD_LOGIC;
signal \RD.ar_channel_0_n_49\ : STD_LOGIC;
signal \RD.ar_channel_0_n_5\ : STD_LOGIC;
signal \RD.r_channel_0_n_0\ : STD_LOGIC;
signal \RD.r_channel_0_n_1\ : STD_LOGIC;
signal SI_REG_n_132 : STD_LOGIC;
signal SI_REG_n_133 : STD_LOGIC;
signal SI_REG_n_134 : STD_LOGIC;
signal SI_REG_n_135 : STD_LOGIC;
signal SI_REG_n_136 : STD_LOGIC;
signal SI_REG_n_137 : STD_LOGIC;
signal SI_REG_n_138 : STD_LOGIC;
signal SI_REG_n_139 : STD_LOGIC;
signal SI_REG_n_140 : STD_LOGIC;
signal SI_REG_n_141 : STD_LOGIC;
signal SI_REG_n_142 : STD_LOGIC;
signal SI_REG_n_143 : STD_LOGIC;
signal SI_REG_n_149 : STD_LOGIC;
signal SI_REG_n_153 : STD_LOGIC;
signal SI_REG_n_154 : STD_LOGIC;
signal SI_REG_n_155 : STD_LOGIC;
signal SI_REG_n_156 : STD_LOGIC;
signal SI_REG_n_157 : STD_LOGIC;
signal SI_REG_n_161 : STD_LOGIC;
signal SI_REG_n_165 : STD_LOGIC;
signal SI_REG_n_166 : STD_LOGIC;
signal SI_REG_n_167 : STD_LOGIC;
signal SI_REG_n_168 : STD_LOGIC;
signal SI_REG_n_169 : STD_LOGIC;
signal SI_REG_n_170 : STD_LOGIC;
signal SI_REG_n_171 : STD_LOGIC;
signal SI_REG_n_172 : STD_LOGIC;
signal SI_REG_n_173 : STD_LOGIC;
signal SI_REG_n_174 : STD_LOGIC;
signal SI_REG_n_175 : STD_LOGIC;
signal SI_REG_n_176 : STD_LOGIC;
signal SI_REG_n_177 : STD_LOGIC;
signal SI_REG_n_178 : STD_LOGIC;
signal SI_REG_n_179 : STD_LOGIC;
signal SI_REG_n_180 : STD_LOGIC;
signal SI_REG_n_181 : STD_LOGIC;
signal SI_REG_n_182 : STD_LOGIC;
signal SI_REG_n_26 : STD_LOGIC;
signal SI_REG_n_64 : STD_LOGIC;
signal SI_REG_n_8 : STD_LOGIC;
signal SI_REG_n_82 : STD_LOGIC;
signal \WR.aw_channel_0_n_0\ : STD_LOGIC;
signal \WR.aw_channel_0_n_10\ : STD_LOGIC;
signal \WR.aw_channel_0_n_15\ : STD_LOGIC;
signal \WR.aw_channel_0_n_3\ : STD_LOGIC;
signal \WR.aw_channel_0_n_4\ : STD_LOGIC;
signal \WR.aw_channel_0_n_47\ : STD_LOGIC;
signal \WR.aw_channel_0_n_48\ : STD_LOGIC;
signal \WR.aw_channel_0_n_49\ : STD_LOGIC;
signal \WR.aw_channel_0_n_50\ : STD_LOGIC;
signal \WR.aw_channel_0_n_9\ : STD_LOGIC;
signal \WR.b_channel_0_n_1\ : STD_LOGIC;
signal \WR.b_channel_0_n_2\ : STD_LOGIC;
signal \ar.ar_pipe/m_valid_i0\ : STD_LOGIC;
signal \ar.ar_pipe/p_1_in\ : STD_LOGIC;
signal \ar.ar_pipe/s_ready_i0\ : STD_LOGIC;
signal \ar_cmd_fsm_0/state\ : STD_LOGIC_VECTOR ( 1 downto 0 );
signal areset_d1 : STD_LOGIC;
signal areset_d1_i_1_n_0 : STD_LOGIC;
signal \aw.aw_pipe/p_1_in\ : STD_LOGIC;
signal \aw_cmd_fsm_0/state\ : STD_LOGIC_VECTOR ( 1 downto 0 );
signal axaddr_incr : STD_LOGIC_VECTOR ( 11 downto 0 );
signal b_awid : STD_LOGIC_VECTOR ( 11 downto 0 );
signal b_awlen : STD_LOGIC_VECTOR ( 3 downto 0 );
signal b_push : STD_LOGIC;
signal \cmd_translator_0/wrap_cmd_0/axaddr_offset\ : STD_LOGIC_VECTOR ( 3 downto 0 );
signal \cmd_translator_0/wrap_cmd_0/axaddr_offset_0\ : STD_LOGIC_VECTOR ( 3 downto 0 );
signal \cmd_translator_0/wrap_cmd_0/axaddr_offset_r\ : STD_LOGIC_VECTOR ( 3 downto 0 );
signal \cmd_translator_0/wrap_cmd_0/axaddr_offset_r_2\ : STD_LOGIC_VECTOR ( 3 downto 0 );
signal \cmd_translator_0/wrap_cmd_0/wrap_second_len\ : STD_LOGIC_VECTOR ( 3 downto 1 );
signal \cmd_translator_0/wrap_cmd_0/wrap_second_len_1\ : STD_LOGIC_VECTOR ( 3 downto 1 );
signal \cmd_translator_0/wrap_cmd_0/wrap_second_len_r\ : STD_LOGIC_VECTOR ( 3 downto 0 );
signal \cmd_translator_0/wrap_cmd_0/wrap_second_len_r_3\ : STD_LOGIC_VECTOR ( 3 downto 0 );
signal r_rlast : STD_LOGIC;
signal s_arid : STD_LOGIC_VECTOR ( 11 downto 0 );
signal s_arid_r : STD_LOGIC_VECTOR ( 11 downto 0 );
signal s_awid : STD_LOGIC_VECTOR ( 11 downto 0 );
signal \^s_axi_arready\ : STD_LOGIC;
signal si_rs_araddr : STD_LOGIC_VECTOR ( 11 downto 0 );
signal si_rs_arburst : STD_LOGIC_VECTOR ( 1 to 1 );
signal si_rs_arlen : STD_LOGIC_VECTOR ( 3 downto 0 );
signal si_rs_arsize : STD_LOGIC_VECTOR ( 1 downto 0 );
signal si_rs_arvalid : STD_LOGIC;
signal si_rs_awaddr : STD_LOGIC_VECTOR ( 11 downto 0 );
signal si_rs_awburst : STD_LOGIC_VECTOR ( 1 to 1 );
signal si_rs_awlen : STD_LOGIC_VECTOR ( 3 downto 0 );
signal si_rs_awsize : STD_LOGIC_VECTOR ( 1 downto 0 );
signal si_rs_awvalid : STD_LOGIC;
signal si_rs_bid : STD_LOGIC_VECTOR ( 11 downto 0 );
signal si_rs_bready : STD_LOGIC;
signal si_rs_bresp : STD_LOGIC_VECTOR ( 1 downto 0 );
signal si_rs_bvalid : STD_LOGIC;
signal si_rs_rdata : STD_LOGIC_VECTOR ( 31 downto 0 );
signal si_rs_rid : STD_LOGIC_VECTOR ( 11 downto 0 );
signal si_rs_rlast : STD_LOGIC;
signal si_rs_rready : STD_LOGIC;
signal si_rs_rresp : STD_LOGIC_VECTOR ( 1 downto 0 );
signal wrap_cnt : STD_LOGIC_VECTOR ( 3 downto 2 );
begin
s_axi_arready <= \^s_axi_arready\;
\RD.ar_channel_0\: entity work.decalper_eb_ot_sdeen_pot_pi_dehcac_xnilix_axi_protocol_converter_v2_1_17_b2s_ar_channel
port map (
D(2 downto 0) => \cmd_translator_0/wrap_cmd_0/wrap_second_len\(3 downto 1),
E(0) => \ar.ar_pipe/p_1_in\,
O(3) => SI_REG_n_140,
O(2) => SI_REG_n_141,
O(1) => SI_REG_n_142,
O(0) => SI_REG_n_143,
Q(31 downto 20) => s_arid(11 downto 0),
Q(19 downto 16) => si_rs_arlen(3 downto 0),
Q(15) => si_rs_arburst(1),
Q(14) => SI_REG_n_82,
Q(13 downto 12) => si_rs_arsize(1 downto 0),
Q(11 downto 0) => si_rs_araddr(11 downto 0),
S(3) => \RD.ar_channel_0_n_46\,
S(2) => \RD.ar_channel_0_n_47\,
S(1) => \RD.ar_channel_0_n_48\,
S(0) => \RD.ar_channel_0_n_49\,
aclk => aclk,
areset_d1 => areset_d1,
axaddr_offset(2) => \cmd_translator_0/wrap_cmd_0/axaddr_offset\(3),
axaddr_offset(1 downto 0) => \cmd_translator_0/wrap_cmd_0/axaddr_offset\(1 downto 0),
\axaddr_offset_r_reg[2]\(0) => \cmd_translator_0/wrap_cmd_0/axaddr_offset\(2),
\axaddr_offset_r_reg[3]\(2) => \cmd_translator_0/wrap_cmd_0/axaddr_offset_r\(3),
\axaddr_offset_r_reg[3]\(1 downto 0) => \cmd_translator_0/wrap_cmd_0/axaddr_offset_r\(1 downto 0),
\axaddr_offset_r_reg[3]_0\ => SI_REG_n_161,
\axaddr_offset_r_reg[3]_1\ => SI_REG_n_165,
\cnt_read_reg[2]_rep__0\ => \RD.r_channel_0_n_1\,
m_axi_araddr(11 downto 0) => m_axi_araddr(11 downto 0),
m_axi_arready => m_axi_arready,
m_axi_arvalid => m_axi_arvalid,
\m_payload_i_reg[0]\ => \RD.ar_channel_0_n_4\,
\m_payload_i_reg[0]_0\ => \RD.ar_channel_0_n_5\,
\m_payload_i_reg[3]\(3) => SI_REG_n_132,
\m_payload_i_reg[3]\(2) => SI_REG_n_133,
\m_payload_i_reg[3]\(1) => SI_REG_n_134,
\m_payload_i_reg[3]\(0) => SI_REG_n_135,
\m_payload_i_reg[47]\ => SI_REG_n_64,
\m_payload_i_reg[47]_0\ => SI_REG_n_167,
\m_payload_i_reg[5]\ => SI_REG_n_166,
\m_payload_i_reg[6]\(6) => SI_REG_n_176,
\m_payload_i_reg[6]\(5) => SI_REG_n_177,
\m_payload_i_reg[6]\(4) => SI_REG_n_178,
\m_payload_i_reg[6]\(3) => SI_REG_n_179,
\m_payload_i_reg[6]\(2) => SI_REG_n_180,
\m_payload_i_reg[6]\(1) => SI_REG_n_181,
\m_payload_i_reg[6]\(0) => SI_REG_n_182,
\m_payload_i_reg[7]\(3) => SI_REG_n_136,
\m_payload_i_reg[7]\(2) => SI_REG_n_137,
\m_payload_i_reg[7]\(1) => SI_REG_n_138,
\m_payload_i_reg[7]\(0) => SI_REG_n_139,
m_valid_i0 => \ar.ar_pipe/m_valid_i0\,
\r_arid_r_reg[11]\(11 downto 0) => s_arid_r(11 downto 0),
r_push_r_reg => \RD.ar_channel_0_n_3\,
r_rlast => r_rlast,
s_axi_arvalid => s_axi_arvalid,
s_ready_i0 => \ar.ar_pipe/s_ready_i0\,
s_ready_i_reg => \^s_axi_arready\,
si_rs_arvalid => si_rs_arvalid,
\state_reg[0]_rep\(1 downto 0) => \ar_cmd_fsm_0/state\(1 downto 0),
\wrap_boundary_axaddr_r_reg[11]\ => \RD.ar_channel_0_n_0\,
\wrap_cnt_r_reg[3]\ => \RD.ar_channel_0_n_10\,
\wrap_cnt_r_reg[3]_0\ => \RD.ar_channel_0_n_11\,
\wrap_cnt_r_reg[3]_1\ => \RD.ar_channel_0_n_16\,
\wrap_second_len_r_reg[3]\(3 downto 0) => \cmd_translator_0/wrap_cmd_0/wrap_second_len_r\(3 downto 0),
\wrap_second_len_r_reg[3]_0\(1) => SI_REG_n_156,
\wrap_second_len_r_reg[3]_0\(0) => SI_REG_n_157
);
\RD.r_channel_0\: entity work.decalper_eb_ot_sdeen_pot_pi_dehcac_xnilix_axi_protocol_converter_v2_1_17_b2s_r_channel
port map (
D(11 downto 0) => s_arid_r(11 downto 0),
aclk => aclk,
areset_d1 => areset_d1,
\in\(33 downto 0) => \in\(33 downto 0),
m_axi_rready => m_axi_rready,
m_axi_rvalid => m_axi_rvalid,
m_valid_i_reg => \RD.r_channel_0_n_0\,
\out\(33 downto 32) => si_rs_rresp(1 downto 0),
\out\(31 downto 0) => si_rs_rdata(31 downto 0),
r_rlast => r_rlast,
s_ready_i_reg => SI_REG_n_168,
si_rs_rready => si_rs_rready,
\skid_buffer_reg[46]\(12 downto 1) => si_rs_rid(11 downto 0),
\skid_buffer_reg[46]\(0) => si_rs_rlast,
\state_reg[1]_rep\ => \RD.r_channel_0_n_1\,
\state_reg[1]_rep_0\ => \RD.ar_channel_0_n_3\
);
SI_REG: entity work.decalper_eb_ot_sdeen_pot_pi_dehcac_xnilix_axi_register_slice_v2_1_17_axi_register_slice
port map (
D(1 downto 0) => wrap_cnt(3 downto 2),
E(0) => \aw.aw_pipe/p_1_in\,
O(3) => SI_REG_n_140,
O(2) => SI_REG_n_141,
O(1) => SI_REG_n_142,
O(0) => SI_REG_n_143,
Q(54 downto 43) => s_awid(11 downto 0),
Q(42 downto 39) => si_rs_awlen(3 downto 0),
Q(38) => si_rs_awburst(1),
Q(37) => SI_REG_n_26,
Q(36 downto 35) => si_rs_awsize(1 downto 0),
Q(34 downto 12) => Q(22 downto 0),
Q(11 downto 0) => si_rs_awaddr(11 downto 0),
S(3) => \WR.aw_channel_0_n_47\,
S(2) => \WR.aw_channel_0_n_48\,
S(1) => \WR.aw_channel_0_n_49\,
S(0) => \WR.aw_channel_0_n_50\,
aclk => aclk,
aresetn => aresetn,
axaddr_incr(11 downto 0) => axaddr_incr(11 downto 0),
\axaddr_incr_reg[3]\(3) => SI_REG_n_132,
\axaddr_incr_reg[3]\(2) => SI_REG_n_133,
\axaddr_incr_reg[3]\(1) => SI_REG_n_134,
\axaddr_incr_reg[3]\(0) => SI_REG_n_135,
\axaddr_incr_reg[7]\(3) => SI_REG_n_136,
\axaddr_incr_reg[7]\(2) => SI_REG_n_137,
\axaddr_incr_reg[7]\(1) => SI_REG_n_138,
\axaddr_incr_reg[7]\(0) => SI_REG_n_139,
axaddr_offset(2) => \cmd_translator_0/wrap_cmd_0/axaddr_offset_0\(3),
axaddr_offset(1 downto 0) => \cmd_translator_0/wrap_cmd_0/axaddr_offset_0\(1 downto 0),
axaddr_offset_0(2) => \cmd_translator_0/wrap_cmd_0/axaddr_offset\(3),
axaddr_offset_0(1 downto 0) => \cmd_translator_0/wrap_cmd_0/axaddr_offset\(1 downto 0),
\axaddr_offset_r_reg[2]\ => SI_REG_n_154,
\axaddr_offset_r_reg[2]_0\ => SI_REG_n_166,
\axaddr_offset_r_reg[2]_1\(0) => \cmd_translator_0/wrap_cmd_0/axaddr_offset_0\(2),
\axaddr_offset_r_reg[2]_2\ => \WR.aw_channel_0_n_15\,
\axaddr_offset_r_reg[2]_3\(0) => \cmd_translator_0/wrap_cmd_0/axaddr_offset\(2),
\axaddr_offset_r_reg[2]_4\ => \RD.ar_channel_0_n_16\,
\axaddr_offset_r_reg[3]\(2) => \cmd_translator_0/wrap_cmd_0/axaddr_offset_r_2\(3),
\axaddr_offset_r_reg[3]\(1 downto 0) => \cmd_translator_0/wrap_cmd_0/axaddr_offset_r_2\(1 downto 0),
\axaddr_offset_r_reg[3]_0\ => \WR.aw_channel_0_n_10\,
\axaddr_offset_r_reg[3]_1\(2) => \cmd_translator_0/wrap_cmd_0/axaddr_offset_r\(3),
\axaddr_offset_r_reg[3]_1\(1 downto 0) => \cmd_translator_0/wrap_cmd_0/axaddr_offset_r\(1 downto 0),
\axaddr_offset_r_reg[3]_2\ => \RD.ar_channel_0_n_11\,
\axlen_cnt_reg[3]\ => SI_REG_n_8,
\axlen_cnt_reg[3]_0\ => SI_REG_n_64,
b_push => b_push,
\cnt_read_reg[2]_rep__0\ => SI_REG_n_168,
\cnt_read_reg[4]\(33 downto 32) => si_rs_rresp(1 downto 0),
\cnt_read_reg[4]\(31 downto 0) => si_rs_rdata(31 downto 0),
\cnt_read_reg[4]_rep__0\ => \RD.r_channel_0_n_0\,
\m_payload_i_reg[3]\(3) => \RD.ar_channel_0_n_46\,
\m_payload_i_reg[3]\(2) => \RD.ar_channel_0_n_47\,
\m_payload_i_reg[3]\(1) => \RD.ar_channel_0_n_48\,
\m_payload_i_reg[3]\(0) => \RD.ar_channel_0_n_49\,
m_valid_i0 => \ar.ar_pipe/m_valid_i0\,
m_valid_i_reg(0) => \ar.ar_pipe/p_1_in\,
next_pending_r_reg => SI_REG_n_155,
next_pending_r_reg_0 => SI_REG_n_167,
\out\(11 downto 0) => si_rs_bid(11 downto 0),
r_push_r_reg(12 downto 1) => si_rs_rid(11 downto 0),
r_push_r_reg(0) => si_rs_rlast,
\s_arid_r_reg[11]\(54 downto 43) => s_arid(11 downto 0),
\s_arid_r_reg[11]\(42 downto 39) => si_rs_arlen(3 downto 0),
\s_arid_r_reg[11]\(38) => si_rs_arburst(1),
\s_arid_r_reg[11]\(37) => SI_REG_n_82,
\s_arid_r_reg[11]\(36 downto 35) => si_rs_arsize(1 downto 0),
\s_arid_r_reg[11]\(34 downto 12) => \m_axi_arprot[2]\(22 downto 0),
\s_arid_r_reg[11]\(11 downto 0) => si_rs_araddr(11 downto 0),
s_axi_araddr(31 downto 0) => s_axi_araddr(31 downto 0),
s_axi_arburst(1 downto 0) => s_axi_arburst(1 downto 0),
s_axi_arid(11 downto 0) => s_axi_arid(11 downto 0),
s_axi_arlen(3 downto 0) => s_axi_arlen(3 downto 0),
s_axi_arprot(2 downto 0) => s_axi_arprot(2 downto 0),
s_axi_arready => \^s_axi_arready\,
s_axi_arsize(1 downto 0) => s_axi_arsize(1 downto 0),
s_axi_awaddr(31 downto 0) => s_axi_awaddr(31 downto 0),
s_axi_awburst(1 downto 0) => s_axi_awburst(1 downto 0),
s_axi_awid(11 downto 0) => s_axi_awid(11 downto 0),
s_axi_awlen(3 downto 0) => s_axi_awlen(3 downto 0),
s_axi_awprot(2 downto 0) => s_axi_awprot(2 downto 0),
s_axi_awready => s_axi_awready,
s_axi_awsize(1 downto 0) => s_axi_awsize(1 downto 0),
s_axi_awvalid => s_axi_awvalid,
\s_axi_bid[11]\(13 downto 0) => \s_axi_bid[11]\(13 downto 0),
s_axi_bready => s_axi_bready,
s_axi_bvalid => s_axi_bvalid,
\s_axi_rid[11]\(46 downto 0) => \s_axi_rid[11]\(46 downto 0),
s_axi_rready => s_axi_rready,
s_axi_rvalid => s_axi_rvalid,
\s_bresp_acc_reg[1]\(1 downto 0) => si_rs_bresp(1 downto 0),
s_ready_i0 => \ar.ar_pipe/s_ready_i0\,
si_rs_arvalid => si_rs_arvalid,
si_rs_awvalid => si_rs_awvalid,
si_rs_bready => si_rs_bready,
si_rs_bvalid => si_rs_bvalid,
si_rs_rready => si_rs_rready,
\state_reg[0]_rep\ => \WR.aw_channel_0_n_4\,
\state_reg[0]_rep_0\ => \RD.ar_channel_0_n_5\,
\state_reg[1]\(1 downto 0) => \aw_cmd_fsm_0/state\(1 downto 0),
\state_reg[1]_0\(1 downto 0) => \ar_cmd_fsm_0/state\(1 downto 0),
\state_reg[1]_rep\ => \WR.aw_channel_0_n_0\,
\state_reg[1]_rep_0\ => \WR.aw_channel_0_n_3\,
\state_reg[1]_rep_1\ => \RD.ar_channel_0_n_0\,
\state_reg[1]_rep_2\ => \RD.ar_channel_0_n_4\,
\wrap_boundary_axaddr_r_reg[6]\(6) => SI_REG_n_169,
\wrap_boundary_axaddr_r_reg[6]\(5) => SI_REG_n_170,
\wrap_boundary_axaddr_r_reg[6]\(4) => SI_REG_n_171,
\wrap_boundary_axaddr_r_reg[6]\(3) => SI_REG_n_172,
\wrap_boundary_axaddr_r_reg[6]\(2) => SI_REG_n_173,
\wrap_boundary_axaddr_r_reg[6]\(1) => SI_REG_n_174,
\wrap_boundary_axaddr_r_reg[6]\(0) => SI_REG_n_175,
\wrap_boundary_axaddr_r_reg[6]_0\(6) => SI_REG_n_176,
\wrap_boundary_axaddr_r_reg[6]_0\(5) => SI_REG_n_177,
\wrap_boundary_axaddr_r_reg[6]_0\(4) => SI_REG_n_178,
\wrap_boundary_axaddr_r_reg[6]_0\(3) => SI_REG_n_179,
\wrap_boundary_axaddr_r_reg[6]_0\(2) => SI_REG_n_180,
\wrap_boundary_axaddr_r_reg[6]_0\(1) => SI_REG_n_181,
\wrap_boundary_axaddr_r_reg[6]_0\(0) => SI_REG_n_182,
\wrap_cnt_r_reg[2]\ => SI_REG_n_149,
\wrap_cnt_r_reg[2]_0\ => SI_REG_n_161,
\wrap_cnt_r_reg[3]\ => SI_REG_n_153,
\wrap_cnt_r_reg[3]_0\(1) => SI_REG_n_156,
\wrap_cnt_r_reg[3]_0\(0) => SI_REG_n_157,
\wrap_cnt_r_reg[3]_1\ => SI_REG_n_165,
\wrap_second_len_r_reg[1]\ => \WR.aw_channel_0_n_9\,
\wrap_second_len_r_reg[1]_0\ => \RD.ar_channel_0_n_10\,
\wrap_second_len_r_reg[3]\(2 downto 0) => \cmd_translator_0/wrap_cmd_0/wrap_second_len_1\(3 downto 1),
\wrap_second_len_r_reg[3]_0\(2 downto 0) => \cmd_translator_0/wrap_cmd_0/wrap_second_len\(3 downto 1),
\wrap_second_len_r_reg[3]_1\(3 downto 0) => \cmd_translator_0/wrap_cmd_0/wrap_second_len_r_3\(3 downto 0),
\wrap_second_len_r_reg[3]_2\(3 downto 0) => \cmd_translator_0/wrap_cmd_0/wrap_second_len_r\(3 downto 0)
);
\WR.aw_channel_0\: entity work.decalper_eb_ot_sdeen_pot_pi_dehcac_xnilix_axi_protocol_converter_v2_1_17_b2s_aw_channel
port map (
D(1 downto 0) => wrap_cnt(3 downto 2),
E(0) => \aw.aw_pipe/p_1_in\,
Q(31 downto 20) => s_awid(11 downto 0),
Q(19 downto 16) => si_rs_awlen(3 downto 0),
Q(15) => si_rs_awburst(1),
Q(14) => SI_REG_n_26,
Q(13 downto 12) => si_rs_awsize(1 downto 0),
Q(11 downto 0) => si_rs_awaddr(11 downto 0),
S(3) => \WR.aw_channel_0_n_47\,
S(2) => \WR.aw_channel_0_n_48\,
S(1) => \WR.aw_channel_0_n_49\,
S(0) => \WR.aw_channel_0_n_50\,
aclk => aclk,
areset_d1 => areset_d1,
axaddr_incr(11 downto 0) => axaddr_incr(11 downto 0),
axaddr_offset(2) => \cmd_translator_0/wrap_cmd_0/axaddr_offset_0\(3),
axaddr_offset(1 downto 0) => \cmd_translator_0/wrap_cmd_0/axaddr_offset_0\(1 downto 0),
\axaddr_offset_r_reg[2]\(0) => \cmd_translator_0/wrap_cmd_0/axaddr_offset_0\(2),
\axaddr_offset_r_reg[3]\(2) => \cmd_translator_0/wrap_cmd_0/axaddr_offset_r_2\(3),
\axaddr_offset_r_reg[3]\(1 downto 0) => \cmd_translator_0/wrap_cmd_0/axaddr_offset_r_2\(1 downto 0),
\axaddr_offset_r_reg[3]_0\ => SI_REG_n_149,
\axaddr_offset_r_reg[3]_1\ => SI_REG_n_153,
\axlen_cnt_reg[7]\ => \WR.aw_channel_0_n_3\,
\axlen_cnt_reg[7]_0\ => \WR.aw_channel_0_n_4\,
b_push => b_push,
\cnt_read_reg[0]_rep__0\ => \WR.b_channel_0_n_1\,
\cnt_read_reg[1]_rep__0\ => \WR.b_channel_0_n_2\,
\in\(15 downto 4) => b_awid(11 downto 0),
\in\(3 downto 0) => b_awlen(3 downto 0),
m_axi_awaddr(11 downto 0) => m_axi_awaddr(11 downto 0),
m_axi_awready => m_axi_awready,
m_axi_awvalid => m_axi_awvalid,
\m_payload_i_reg[47]\ => SI_REG_n_8,
\m_payload_i_reg[47]_0\ => SI_REG_n_155,
\m_payload_i_reg[5]\ => SI_REG_n_154,
\m_payload_i_reg[6]\(6) => SI_REG_n_169,
\m_payload_i_reg[6]\(5) => SI_REG_n_170,
\m_payload_i_reg[6]\(4) => SI_REG_n_171,
\m_payload_i_reg[6]\(3) => SI_REG_n_172,
\m_payload_i_reg[6]\(2) => SI_REG_n_173,
\m_payload_i_reg[6]\(1) => SI_REG_n_174,
\m_payload_i_reg[6]\(0) => SI_REG_n_175,
si_rs_awvalid => si_rs_awvalid,
\state_reg[0]_rep\(1 downto 0) => \aw_cmd_fsm_0/state\(1 downto 0),
\wrap_boundary_axaddr_r_reg[11]\ => \WR.aw_channel_0_n_0\,
\wrap_cnt_r_reg[3]\ => \WR.aw_channel_0_n_9\,
\wrap_cnt_r_reg[3]_0\ => \WR.aw_channel_0_n_10\,
\wrap_cnt_r_reg[3]_1\ => \WR.aw_channel_0_n_15\,
\wrap_second_len_r_reg[3]\(3 downto 0) => \cmd_translator_0/wrap_cmd_0/wrap_second_len_r_3\(3 downto 0),
\wrap_second_len_r_reg[3]_0\(2 downto 0) => \cmd_translator_0/wrap_cmd_0/wrap_second_len_1\(3 downto 1)
);
\WR.b_channel_0\: entity work.decalper_eb_ot_sdeen_pot_pi_dehcac_xnilix_axi_protocol_converter_v2_1_17_b2s_b_channel
port map (
aclk => aclk,
areset_d1 => areset_d1,
b_push => b_push,
\cnt_read_reg[0]_rep__0\ => \WR.b_channel_0_n_1\,
\cnt_read_reg[1]_rep__0\ => \WR.b_channel_0_n_2\,
\in\(15 downto 4) => b_awid(11 downto 0),
\in\(3 downto 0) => b_awlen(3 downto 0),
m_axi_bready => m_axi_bready,
m_axi_bresp(1 downto 0) => m_axi_bresp(1 downto 0),
m_axi_bvalid => m_axi_bvalid,
\out\(11 downto 0) => si_rs_bid(11 downto 0),
si_rs_bready => si_rs_bready,
si_rs_bvalid => si_rs_bvalid,
\skid_buffer_reg[1]\(1 downto 0) => si_rs_bresp(1 downto 0)
);
areset_d1_i_1: unisim.vcomponents.LUT1
generic map(
INIT => X"1"
)
port map (
I0 => aresetn,
O => areset_d1_i_1_n_0
);
areset_d1_reg: unisim.vcomponents.FDRE
generic map(
INIT => '0'
)
port map (
C => aclk,
CE => '1',
D => areset_d1_i_1_n_0,
Q => areset_d1,
R => '0'
);
end STRUCTURE;
library IEEE;
use IEEE.STD_LOGIC_1164.ALL;
library UNISIM;
use UNISIM.VCOMPONENTS.ALL;
entity decalper_eb_ot_sdeen_pot_pi_dehcac_xnilix_axi_protocol_converter_v2_1_17_axi_protocol_converter is
port (
aclk : in STD_LOGIC;
aresetn : in STD_LOGIC;
s_axi_awid : in STD_LOGIC_VECTOR ( 11 downto 0 );
s_axi_awaddr : in STD_LOGIC_VECTOR ( 31 downto 0 );
s_axi_awlen : in STD_LOGIC_VECTOR ( 3 downto 0 );
s_axi_awsize : in STD_LOGIC_VECTOR ( 2 downto 0 );
s_axi_awburst : in STD_LOGIC_VECTOR ( 1 downto 0 );
s_axi_awlock : in STD_LOGIC_VECTOR ( 1 downto 0 );
s_axi_awcache : in STD_LOGIC_VECTOR ( 3 downto 0 );
s_axi_awprot : in STD_LOGIC_VECTOR ( 2 downto 0 );
s_axi_awregion : in STD_LOGIC_VECTOR ( 3 downto 0 );
s_axi_awqos : in STD_LOGIC_VECTOR ( 3 downto 0 );
s_axi_awuser : in STD_LOGIC_VECTOR ( 0 to 0 );
s_axi_awvalid : in STD_LOGIC;
s_axi_awready : out STD_LOGIC;
s_axi_wid : in STD_LOGIC_VECTOR ( 11 downto 0 );
s_axi_wdata : in STD_LOGIC_VECTOR ( 31 downto 0 );
s_axi_wstrb : in STD_LOGIC_VECTOR ( 3 downto 0 );
s_axi_wlast : in STD_LOGIC;
s_axi_wuser : in STD_LOGIC_VECTOR ( 0 to 0 );
s_axi_wvalid : in STD_LOGIC;
s_axi_wready : out STD_LOGIC;
s_axi_bid : out STD_LOGIC_VECTOR ( 11 downto 0 );
s_axi_bresp : out STD_LOGIC_VECTOR ( 1 downto 0 );
s_axi_buser : out STD_LOGIC_VECTOR ( 0 to 0 );
s_axi_bvalid : out STD_LOGIC;
s_axi_bready : in STD_LOGIC;
s_axi_arid : in STD_LOGIC_VECTOR ( 11 downto 0 );
s_axi_araddr : in STD_LOGIC_VECTOR ( 31 downto 0 );
s_axi_arlen : in STD_LOGIC_VECTOR ( 3 downto 0 );
s_axi_arsize : in STD_LOGIC_VECTOR ( 2 downto 0 );
s_axi_arburst : in STD_LOGIC_VECTOR ( 1 downto 0 );
s_axi_arlock : in STD_LOGIC_VECTOR ( 1 downto 0 );
s_axi_arcache : in STD_LOGIC_VECTOR ( 3 downto 0 );
s_axi_arprot : in STD_LOGIC_VECTOR ( 2 downto 0 );
s_axi_arregion : in STD_LOGIC_VECTOR ( 3 downto 0 );
s_axi_arqos : in STD_LOGIC_VECTOR ( 3 downto 0 );
s_axi_aruser : in STD_LOGIC_VECTOR ( 0 to 0 );
s_axi_arvalid : in STD_LOGIC;
s_axi_arready : out STD_LOGIC;
s_axi_rid : out STD_LOGIC_VECTOR ( 11 downto 0 );
s_axi_rdata : out STD_LOGIC_VECTOR ( 31 downto 0 );
s_axi_rresp : out STD_LOGIC_VECTOR ( 1 downto 0 );
s_axi_rlast : out STD_LOGIC;
s_axi_ruser : out STD_LOGIC_VECTOR ( 0 to 0 );
s_axi_rvalid : out STD_LOGIC;
s_axi_rready : in STD_LOGIC;
m_axi_awid : out STD_LOGIC_VECTOR ( 11 downto 0 );
m_axi_awaddr : out STD_LOGIC_VECTOR ( 31 downto 0 );
m_axi_awlen : out STD_LOGIC_VECTOR ( 7 downto 0 );
m_axi_awsize : out STD_LOGIC_VECTOR ( 2 downto 0 );
m_axi_awburst : out STD_LOGIC_VECTOR ( 1 downto 0 );
m_axi_awlock : out STD_LOGIC_VECTOR ( 0 to 0 );
m_axi_awcache : out STD_LOGIC_VECTOR ( 3 downto 0 );
m_axi_awprot : out STD_LOGIC_VECTOR ( 2 downto 0 );
m_axi_awregion : out STD_LOGIC_VECTOR ( 3 downto 0 );
m_axi_awqos : out STD_LOGIC_VECTOR ( 3 downto 0 );
m_axi_awuser : out STD_LOGIC_VECTOR ( 0 to 0 );
m_axi_awvalid : out STD_LOGIC;
m_axi_awready : in STD_LOGIC;
m_axi_wid : out STD_LOGIC_VECTOR ( 11 downto 0 );
m_axi_wdata : out STD_LOGIC_VECTOR ( 31 downto 0 );
m_axi_wstrb : out STD_LOGIC_VECTOR ( 3 downto 0 );
m_axi_wlast : out STD_LOGIC;
m_axi_wuser : out STD_LOGIC_VECTOR ( 0 to 0 );
m_axi_wvalid : out STD_LOGIC;
m_axi_wready : in STD_LOGIC;
m_axi_bid : in STD_LOGIC_VECTOR ( 11 downto 0 );
m_axi_bresp : in STD_LOGIC_VECTOR ( 1 downto 0 );
m_axi_buser : in STD_LOGIC_VECTOR ( 0 to 0 );
m_axi_bvalid : in STD_LOGIC;
m_axi_bready : out STD_LOGIC;
m_axi_arid : out STD_LOGIC_VECTOR ( 11 downto 0 );
m_axi_araddr : out STD_LOGIC_VECTOR ( 31 downto 0 );
m_axi_arlen : out STD_LOGIC_VECTOR ( 7 downto 0 );
m_axi_arsize : out STD_LOGIC_VECTOR ( 2 downto 0 );
m_axi_arburst : out STD_LOGIC_VECTOR ( 1 downto 0 );
m_axi_arlock : out STD_LOGIC_VECTOR ( 0 to 0 );
m_axi_arcache : out STD_LOGIC_VECTOR ( 3 downto 0 );
m_axi_arprot : out STD_LOGIC_VECTOR ( 2 downto 0 );
m_axi_arregion : out STD_LOGIC_VECTOR ( 3 downto 0 );
m_axi_arqos : out STD_LOGIC_VECTOR ( 3 downto 0 );
m_axi_aruser : out STD_LOGIC_VECTOR ( 0 to 0 );
m_axi_arvalid : out STD_LOGIC;
m_axi_arready : in STD_LOGIC;
m_axi_rid : in STD_LOGIC_VECTOR ( 11 downto 0 );
m_axi_rdata : in STD_LOGIC_VECTOR ( 31 downto 0 );
m_axi_rresp : in STD_LOGIC_VECTOR ( 1 downto 0 );
m_axi_rlast : in STD_LOGIC;
m_axi_ruser : in STD_LOGIC_VECTOR ( 0 to 0 );
m_axi_rvalid : in STD_LOGIC;
m_axi_rready : out STD_LOGIC
);
attribute C_AXI_ADDR_WIDTH : integer;
attribute C_AXI_ADDR_WIDTH of decalper_eb_ot_sdeen_pot_pi_dehcac_xnilix_axi_protocol_converter_v2_1_17_axi_protocol_converter : entity is 32;
attribute C_AXI_ARUSER_WIDTH : integer;
attribute C_AXI_ARUSER_WIDTH of decalper_eb_ot_sdeen_pot_pi_dehcac_xnilix_axi_protocol_converter_v2_1_17_axi_protocol_converter : entity is 1;
attribute C_AXI_AWUSER_WIDTH : integer;
attribute C_AXI_AWUSER_WIDTH of decalper_eb_ot_sdeen_pot_pi_dehcac_xnilix_axi_protocol_converter_v2_1_17_axi_protocol_converter : entity is 1;
attribute C_AXI_BUSER_WIDTH : integer;
attribute C_AXI_BUSER_WIDTH of decalper_eb_ot_sdeen_pot_pi_dehcac_xnilix_axi_protocol_converter_v2_1_17_axi_protocol_converter : entity is 1;
attribute C_AXI_DATA_WIDTH : integer;
attribute C_AXI_DATA_WIDTH of decalper_eb_ot_sdeen_pot_pi_dehcac_xnilix_axi_protocol_converter_v2_1_17_axi_protocol_converter : entity is 32;
attribute C_AXI_ID_WIDTH : integer;
attribute C_AXI_ID_WIDTH of decalper_eb_ot_sdeen_pot_pi_dehcac_xnilix_axi_protocol_converter_v2_1_17_axi_protocol_converter : entity is 12;
attribute C_AXI_RUSER_WIDTH : integer;
attribute C_AXI_RUSER_WIDTH of decalper_eb_ot_sdeen_pot_pi_dehcac_xnilix_axi_protocol_converter_v2_1_17_axi_protocol_converter : entity is 1;
attribute C_AXI_SUPPORTS_READ : integer;
attribute C_AXI_SUPPORTS_READ of decalper_eb_ot_sdeen_pot_pi_dehcac_xnilix_axi_protocol_converter_v2_1_17_axi_protocol_converter : entity is 1;
attribute C_AXI_SUPPORTS_USER_SIGNALS : integer;
attribute C_AXI_SUPPORTS_USER_SIGNALS of decalper_eb_ot_sdeen_pot_pi_dehcac_xnilix_axi_protocol_converter_v2_1_17_axi_protocol_converter : entity is 0;
attribute C_AXI_SUPPORTS_WRITE : integer;
attribute C_AXI_SUPPORTS_WRITE of decalper_eb_ot_sdeen_pot_pi_dehcac_xnilix_axi_protocol_converter_v2_1_17_axi_protocol_converter : entity is 1;
attribute C_AXI_WUSER_WIDTH : integer;
attribute C_AXI_WUSER_WIDTH of decalper_eb_ot_sdeen_pot_pi_dehcac_xnilix_axi_protocol_converter_v2_1_17_axi_protocol_converter : entity is 1;
attribute C_FAMILY : string;
attribute C_FAMILY of decalper_eb_ot_sdeen_pot_pi_dehcac_xnilix_axi_protocol_converter_v2_1_17_axi_protocol_converter : entity is "zynq";
attribute C_IGNORE_ID : integer;
attribute C_IGNORE_ID of decalper_eb_ot_sdeen_pot_pi_dehcac_xnilix_axi_protocol_converter_v2_1_17_axi_protocol_converter : entity is 0;
attribute C_M_AXI_PROTOCOL : integer;
attribute C_M_AXI_PROTOCOL of decalper_eb_ot_sdeen_pot_pi_dehcac_xnilix_axi_protocol_converter_v2_1_17_axi_protocol_converter : entity is 2;
attribute C_S_AXI_PROTOCOL : integer;
attribute C_S_AXI_PROTOCOL of decalper_eb_ot_sdeen_pot_pi_dehcac_xnilix_axi_protocol_converter_v2_1_17_axi_protocol_converter : entity is 1;
attribute C_TRANSLATION_MODE : integer;
attribute C_TRANSLATION_MODE of decalper_eb_ot_sdeen_pot_pi_dehcac_xnilix_axi_protocol_converter_v2_1_17_axi_protocol_converter : entity is 2;
attribute DowngradeIPIdentifiedWarnings : string;
attribute DowngradeIPIdentifiedWarnings of decalper_eb_ot_sdeen_pot_pi_dehcac_xnilix_axi_protocol_converter_v2_1_17_axi_protocol_converter : entity is "yes";
attribute P_AXI3 : integer;
attribute P_AXI3 of decalper_eb_ot_sdeen_pot_pi_dehcac_xnilix_axi_protocol_converter_v2_1_17_axi_protocol_converter : entity is 1;
attribute P_AXI4 : integer;
attribute P_AXI4 of decalper_eb_ot_sdeen_pot_pi_dehcac_xnilix_axi_protocol_converter_v2_1_17_axi_protocol_converter : entity is 0;
attribute P_AXILITE : integer;
attribute P_AXILITE of decalper_eb_ot_sdeen_pot_pi_dehcac_xnilix_axi_protocol_converter_v2_1_17_axi_protocol_converter : entity is 2;
attribute P_AXILITE_SIZE : string;
attribute P_AXILITE_SIZE of decalper_eb_ot_sdeen_pot_pi_dehcac_xnilix_axi_protocol_converter_v2_1_17_axi_protocol_converter : entity is "3'b010";
attribute P_CONVERSION : integer;
attribute P_CONVERSION of decalper_eb_ot_sdeen_pot_pi_dehcac_xnilix_axi_protocol_converter_v2_1_17_axi_protocol_converter : entity is 2;
attribute P_DECERR : string;
attribute P_DECERR of decalper_eb_ot_sdeen_pot_pi_dehcac_xnilix_axi_protocol_converter_v2_1_17_axi_protocol_converter : entity is "2'b11";
attribute P_INCR : string;
attribute P_INCR of decalper_eb_ot_sdeen_pot_pi_dehcac_xnilix_axi_protocol_converter_v2_1_17_axi_protocol_converter : entity is "2'b01";
attribute P_PROTECTION : integer;
attribute P_PROTECTION of decalper_eb_ot_sdeen_pot_pi_dehcac_xnilix_axi_protocol_converter_v2_1_17_axi_protocol_converter : entity is 1;
attribute P_SLVERR : string;
attribute P_SLVERR of decalper_eb_ot_sdeen_pot_pi_dehcac_xnilix_axi_protocol_converter_v2_1_17_axi_protocol_converter : entity is "2'b10";
end decalper_eb_ot_sdeen_pot_pi_dehcac_xnilix_axi_protocol_converter_v2_1_17_axi_protocol_converter;
architecture STRUCTURE of decalper_eb_ot_sdeen_pot_pi_dehcac_xnilix_axi_protocol_converter_v2_1_17_axi_protocol_converter is
signal \<const0>\ : STD_LOGIC;
signal \<const1>\ : STD_LOGIC;
signal \^m_axi_wready\ : STD_LOGIC;
signal \^s_axi_wdata\ : STD_LOGIC_VECTOR ( 31 downto 0 );
signal \^s_axi_wstrb\ : STD_LOGIC_VECTOR ( 3 downto 0 );
signal \^s_axi_wvalid\ : STD_LOGIC;
begin
\^m_axi_wready\ <= m_axi_wready;
\^s_axi_wdata\(31 downto 0) <= s_axi_wdata(31 downto 0);
\^s_axi_wstrb\(3 downto 0) <= s_axi_wstrb(3 downto 0);
\^s_axi_wvalid\ <= s_axi_wvalid;
m_axi_arburst(1) <= \<const0>\;
m_axi_arburst(0) <= \<const1>\;
m_axi_arcache(3) <= \<const0>\;
m_axi_arcache(2) <= \<const0>\;
m_axi_arcache(1) <= \<const0>\;
m_axi_arcache(0) <= \<const0>\;
m_axi_arid(11) <= \<const0>\;
m_axi_arid(10) <= \<const0>\;
m_axi_arid(9) <= \<const0>\;
m_axi_arid(8) <= \<const0>\;
m_axi_arid(7) <= \<const0>\;
m_axi_arid(6) <= \<const0>\;
m_axi_arid(5) <= \<const0>\;
m_axi_arid(4) <= \<const0>\;
m_axi_arid(3) <= \<const0>\;
m_axi_arid(2) <= \<const0>\;
m_axi_arid(1) <= \<const0>\;
m_axi_arid(0) <= \<const0>\;
m_axi_arlen(7) <= \<const0>\;
m_axi_arlen(6) <= \<const0>\;
m_axi_arlen(5) <= \<const0>\;
m_axi_arlen(4) <= \<const0>\;
m_axi_arlen(3) <= \<const0>\;
m_axi_arlen(2) <= \<const0>\;
m_axi_arlen(1) <= \<const0>\;
m_axi_arlen(0) <= \<const0>\;
m_axi_arlock(0) <= \<const0>\;
m_axi_arqos(3) <= \<const0>\;
m_axi_arqos(2) <= \<const0>\;
m_axi_arqos(1) <= \<const0>\;
m_axi_arqos(0) <= \<const0>\;
m_axi_arregion(3) <= \<const0>\;
m_axi_arregion(2) <= \<const0>\;
m_axi_arregion(1) <= \<const0>\;
m_axi_arregion(0) <= \<const0>\;
m_axi_arsize(2) <= \<const0>\;
m_axi_arsize(1) <= \<const1>\;
m_axi_arsize(0) <= \<const0>\;
m_axi_aruser(0) <= \<const0>\;
m_axi_awburst(1) <= \<const0>\;
m_axi_awburst(0) <= \<const1>\;
m_axi_awcache(3) <= \<const0>\;
m_axi_awcache(2) <= \<const0>\;
m_axi_awcache(1) <= \<const0>\;
m_axi_awcache(0) <= \<const0>\;
m_axi_awid(11) <= \<const0>\;
m_axi_awid(10) <= \<const0>\;
m_axi_awid(9) <= \<const0>\;
m_axi_awid(8) <= \<const0>\;
m_axi_awid(7) <= \<const0>\;
m_axi_awid(6) <= \<const0>\;
m_axi_awid(5) <= \<const0>\;
m_axi_awid(4) <= \<const0>\;
m_axi_awid(3) <= \<const0>\;
m_axi_awid(2) <= \<const0>\;
m_axi_awid(1) <= \<const0>\;
m_axi_awid(0) <= \<const0>\;
m_axi_awlen(7) <= \<const0>\;
m_axi_awlen(6) <= \<const0>\;
m_axi_awlen(5) <= \<const0>\;
m_axi_awlen(4) <= \<const0>\;
m_axi_awlen(3) <= \<const0>\;
m_axi_awlen(2) <= \<const0>\;
m_axi_awlen(1) <= \<const0>\;
m_axi_awlen(0) <= \<const0>\;
m_axi_awlock(0) <= \<const0>\;
m_axi_awqos(3) <= \<const0>\;
m_axi_awqos(2) <= \<const0>\;
m_axi_awqos(1) <= \<const0>\;
m_axi_awqos(0) <= \<const0>\;
m_axi_awregion(3) <= \<const0>\;
m_axi_awregion(2) <= \<const0>\;
m_axi_awregion(1) <= \<const0>\;
m_axi_awregion(0) <= \<const0>\;
m_axi_awsize(2) <= \<const0>\;
m_axi_awsize(1) <= \<const1>\;
m_axi_awsize(0) <= \<const0>\;
m_axi_awuser(0) <= \<const0>\;
m_axi_wdata(31 downto 0) <= \^s_axi_wdata\(31 downto 0);
m_axi_wid(11) <= \<const0>\;
m_axi_wid(10) <= \<const0>\;
m_axi_wid(9) <= \<const0>\;
m_axi_wid(8) <= \<const0>\;
m_axi_wid(7) <= \<const0>\;
m_axi_wid(6) <= \<const0>\;
m_axi_wid(5) <= \<const0>\;
m_axi_wid(4) <= \<const0>\;
m_axi_wid(3) <= \<const0>\;
m_axi_wid(2) <= \<const0>\;
m_axi_wid(1) <= \<const0>\;
m_axi_wid(0) <= \<const0>\;
m_axi_wlast <= \<const1>\;
m_axi_wstrb(3 downto 0) <= \^s_axi_wstrb\(3 downto 0);
m_axi_wuser(0) <= \<const0>\;
m_axi_wvalid <= \^s_axi_wvalid\;
s_axi_buser(0) <= \<const0>\;
s_axi_ruser(0) <= \<const0>\;
s_axi_wready <= \^m_axi_wready\;
GND: unisim.vcomponents.GND
port map (
G => \<const0>\
);
VCC: unisim.vcomponents.VCC
port map (
P => \<const1>\
);
\gen_axilite.gen_b2s_conv.axilite_b2s\: entity work.decalper_eb_ot_sdeen_pot_pi_dehcac_xnilix_axi_protocol_converter_v2_1_17_b2s
port map (
Q(22 downto 20) => m_axi_awprot(2 downto 0),
Q(19 downto 0) => m_axi_awaddr(31 downto 12),
aclk => aclk,
aresetn => aresetn,
\in\(33 downto 32) => m_axi_rresp(1 downto 0),
\in\(31 downto 0) => m_axi_rdata(31 downto 0),
m_axi_araddr(11 downto 0) => m_axi_araddr(11 downto 0),
\m_axi_arprot[2]\(22 downto 20) => m_axi_arprot(2 downto 0),
\m_axi_arprot[2]\(19 downto 0) => m_axi_araddr(31 downto 12),
m_axi_arready => m_axi_arready,
m_axi_arvalid => m_axi_arvalid,
m_axi_awaddr(11 downto 0) => m_axi_awaddr(11 downto 0),
m_axi_awready => m_axi_awready,
m_axi_awvalid => m_axi_awvalid,
m_axi_bready => m_axi_bready,
m_axi_bresp(1 downto 0) => m_axi_bresp(1 downto 0),
m_axi_bvalid => m_axi_bvalid,
m_axi_rready => m_axi_rready,
m_axi_rvalid => m_axi_rvalid,
s_axi_araddr(31 downto 0) => s_axi_araddr(31 downto 0),
s_axi_arburst(1 downto 0) => s_axi_arburst(1 downto 0),
s_axi_arid(11 downto 0) => s_axi_arid(11 downto 0),
s_axi_arlen(3 downto 0) => s_axi_arlen(3 downto 0),
s_axi_arprot(2 downto 0) => s_axi_arprot(2 downto 0),
s_axi_arready => s_axi_arready,
s_axi_arsize(1 downto 0) => s_axi_arsize(1 downto 0),
s_axi_arvalid => s_axi_arvalid,
s_axi_awaddr(31 downto 0) => s_axi_awaddr(31 downto 0),
s_axi_awburst(1 downto 0) => s_axi_awburst(1 downto 0),
s_axi_awid(11 downto 0) => s_axi_awid(11 downto 0),
s_axi_awlen(3 downto 0) => s_axi_awlen(3 downto 0),
s_axi_awprot(2 downto 0) => s_axi_awprot(2 downto 0),
s_axi_awready => s_axi_awready,
s_axi_awsize(1 downto 0) => s_axi_awsize(1 downto 0),
s_axi_awvalid => s_axi_awvalid,
\s_axi_bid[11]\(13 downto 2) => s_axi_bid(11 downto 0),
\s_axi_bid[11]\(1 downto 0) => s_axi_bresp(1 downto 0),
s_axi_bready => s_axi_bready,
s_axi_bvalid => s_axi_bvalid,
\s_axi_rid[11]\(46 downto 35) => s_axi_rid(11 downto 0),
\s_axi_rid[11]\(34) => s_axi_rlast,
\s_axi_rid[11]\(33 downto 32) => s_axi_rresp(1 downto 0),
\s_axi_rid[11]\(31 downto 0) => s_axi_rdata(31 downto 0),
s_axi_rready => s_axi_rready,
s_axi_rvalid => s_axi_rvalid
);
end STRUCTURE;
library IEEE;
use IEEE.STD_LOGIC_1164.ALL;
library UNISIM;
use UNISIM.VCOMPONENTS.ALL;
entity decalper_eb_ot_sdeen_pot_pi_dehcac_xnilix is
port (
aclk : in STD_LOGIC;
aresetn : in STD_LOGIC;
s_axi_awid : in STD_LOGIC_VECTOR ( 11 downto 0 );
s_axi_awaddr : in STD_LOGIC_VECTOR ( 31 downto 0 );
s_axi_awlen : in STD_LOGIC_VECTOR ( 3 downto 0 );
s_axi_awsize : in STD_LOGIC_VECTOR ( 2 downto 0 );
s_axi_awburst : in STD_LOGIC_VECTOR ( 1 downto 0 );
s_axi_awlock : in STD_LOGIC_VECTOR ( 1 downto 0 );
s_axi_awcache : in STD_LOGIC_VECTOR ( 3 downto 0 );
s_axi_awprot : in STD_LOGIC_VECTOR ( 2 downto 0 );
s_axi_awqos : in STD_LOGIC_VECTOR ( 3 downto 0 );
s_axi_awvalid : in STD_LOGIC;
s_axi_awready : out STD_LOGIC;
s_axi_wid : in STD_LOGIC_VECTOR ( 11 downto 0 );
s_axi_wdata : in STD_LOGIC_VECTOR ( 31 downto 0 );
s_axi_wstrb : in STD_LOGIC_VECTOR ( 3 downto 0 );
s_axi_wlast : in STD_LOGIC;
s_axi_wvalid : in STD_LOGIC;
s_axi_wready : out STD_LOGIC;
s_axi_bid : out STD_LOGIC_VECTOR ( 11 downto 0 );
s_axi_bresp : out STD_LOGIC_VECTOR ( 1 downto 0 );
s_axi_bvalid : out STD_LOGIC;
s_axi_bready : in STD_LOGIC;
s_axi_arid : in STD_LOGIC_VECTOR ( 11 downto 0 );
s_axi_araddr : in STD_LOGIC_VECTOR ( 31 downto 0 );
s_axi_arlen : in STD_LOGIC_VECTOR ( 3 downto 0 );
s_axi_arsize : in STD_LOGIC_VECTOR ( 2 downto 0 );
s_axi_arburst : in STD_LOGIC_VECTOR ( 1 downto 0 );
s_axi_arlock : in STD_LOGIC_VECTOR ( 1 downto 0 );
s_axi_arcache : in STD_LOGIC_VECTOR ( 3 downto 0 );
s_axi_arprot : in STD_LOGIC_VECTOR ( 2 downto 0 );
s_axi_arqos : in STD_LOGIC_VECTOR ( 3 downto 0 );
s_axi_arvalid : in STD_LOGIC;
s_axi_arready : out STD_LOGIC;
s_axi_rid : out STD_LOGIC_VECTOR ( 11 downto 0 );
s_axi_rdata : out STD_LOGIC_VECTOR ( 31 downto 0 );
s_axi_rresp : out STD_LOGIC_VECTOR ( 1 downto 0 );
s_axi_rlast : out STD_LOGIC;
s_axi_rvalid : out STD_LOGIC;
s_axi_rready : in STD_LOGIC;
m_axi_awaddr : out STD_LOGIC_VECTOR ( 31 downto 0 );
m_axi_awprot : out STD_LOGIC_VECTOR ( 2 downto 0 );
m_axi_awvalid : out STD_LOGIC;
m_axi_awready : in STD_LOGIC;
m_axi_wdata : out STD_LOGIC_VECTOR ( 31 downto 0 );
m_axi_wstrb : out STD_LOGIC_VECTOR ( 3 downto 0 );
m_axi_wvalid : out STD_LOGIC;
m_axi_wready : in STD_LOGIC;
m_axi_bresp : in STD_LOGIC_VECTOR ( 1 downto 0 );
m_axi_bvalid : in STD_LOGIC;
m_axi_bready : out STD_LOGIC;
m_axi_araddr : out STD_LOGIC_VECTOR ( 31 downto 0 );
m_axi_arprot : out STD_LOGIC_VECTOR ( 2 downto 0 );
m_axi_arvalid : out STD_LOGIC;
m_axi_arready : in STD_LOGIC;
m_axi_rdata : in STD_LOGIC_VECTOR ( 31 downto 0 );
m_axi_rresp : in STD_LOGIC_VECTOR ( 1 downto 0 );
m_axi_rvalid : in STD_LOGIC;
m_axi_rready : out STD_LOGIC
);
attribute NotValidForBitStream : boolean;
attribute NotValidForBitStream of decalper_eb_ot_sdeen_pot_pi_dehcac_xnilix : entity is true;
attribute CHECK_LICENSE_TYPE : string;
attribute CHECK_LICENSE_TYPE of decalper_eb_ot_sdeen_pot_pi_dehcac_xnilix : entity is "gcd_block_design_auto_pc_0,axi_protocol_converter_v2_1_17_axi_protocol_converter,{}";
attribute DowngradeIPIdentifiedWarnings : string;
attribute DowngradeIPIdentifiedWarnings of decalper_eb_ot_sdeen_pot_pi_dehcac_xnilix : entity is "yes";
attribute X_CORE_INFO : string;
attribute X_CORE_INFO of decalper_eb_ot_sdeen_pot_pi_dehcac_xnilix : entity is "axi_protocol_converter_v2_1_17_axi_protocol_converter,Vivado 2018.2";
end decalper_eb_ot_sdeen_pot_pi_dehcac_xnilix;
architecture STRUCTURE of decalper_eb_ot_sdeen_pot_pi_dehcac_xnilix is
signal NLW_inst_m_axi_wlast_UNCONNECTED : STD_LOGIC;
signal NLW_inst_m_axi_arburst_UNCONNECTED : STD_LOGIC_VECTOR ( 1 downto 0 );
signal NLW_inst_m_axi_arcache_UNCONNECTED : STD_LOGIC_VECTOR ( 3 downto 0 );
signal NLW_inst_m_axi_arid_UNCONNECTED : STD_LOGIC_VECTOR ( 11 downto 0 );
signal NLW_inst_m_axi_arlen_UNCONNECTED : STD_LOGIC_VECTOR ( 7 downto 0 );
signal NLW_inst_m_axi_arlock_UNCONNECTED : STD_LOGIC_VECTOR ( 0 to 0 );
signal NLW_inst_m_axi_arqos_UNCONNECTED : STD_LOGIC_VECTOR ( 3 downto 0 );
signal NLW_inst_m_axi_arregion_UNCONNECTED : STD_LOGIC_VECTOR ( 3 downto 0 );
signal NLW_inst_m_axi_arsize_UNCONNECTED : STD_LOGIC_VECTOR ( 2 downto 0 );
signal NLW_inst_m_axi_aruser_UNCONNECTED : STD_LOGIC_VECTOR ( 0 to 0 );
signal NLW_inst_m_axi_awburst_UNCONNECTED : STD_LOGIC_VECTOR ( 1 downto 0 );
signal NLW_inst_m_axi_awcache_UNCONNECTED : STD_LOGIC_VECTOR ( 3 downto 0 );
signal NLW_inst_m_axi_awid_UNCONNECTED : STD_LOGIC_VECTOR ( 11 downto 0 );
signal NLW_inst_m_axi_awlen_UNCONNECTED : STD_LOGIC_VECTOR ( 7 downto 0 );
signal NLW_inst_m_axi_awlock_UNCONNECTED : STD_LOGIC_VECTOR ( 0 to 0 );
signal NLW_inst_m_axi_awqos_UNCONNECTED : STD_LOGIC_VECTOR ( 3 downto 0 );
signal NLW_inst_m_axi_awregion_UNCONNECTED : STD_LOGIC_VECTOR ( 3 downto 0 );
signal NLW_inst_m_axi_awsize_UNCONNECTED : STD_LOGIC_VECTOR ( 2 downto 0 );
signal NLW_inst_m_axi_awuser_UNCONNECTED : STD_LOGIC_VECTOR ( 0 to 0 );
signal NLW_inst_m_axi_wid_UNCONNECTED : STD_LOGIC_VECTOR ( 11 downto 0 );
signal NLW_inst_m_axi_wuser_UNCONNECTED : STD_LOGIC_VECTOR ( 0 to 0 );
signal NLW_inst_s_axi_buser_UNCONNECTED : STD_LOGIC_VECTOR ( 0 to 0 );
signal NLW_inst_s_axi_ruser_UNCONNECTED : STD_LOGIC_VECTOR ( 0 to 0 );
attribute C_AXI_ADDR_WIDTH : integer;
attribute C_AXI_ADDR_WIDTH of inst : label is 32;
attribute C_AXI_ARUSER_WIDTH : integer;
attribute C_AXI_ARUSER_WIDTH of inst : label is 1;
attribute C_AXI_AWUSER_WIDTH : integer;
attribute C_AXI_AWUSER_WIDTH of inst : label is 1;
attribute C_AXI_BUSER_WIDTH : integer;
attribute C_AXI_BUSER_WIDTH of inst : label is 1;
attribute C_AXI_DATA_WIDTH : integer;
attribute C_AXI_DATA_WIDTH of inst : label is 32;
attribute C_AXI_ID_WIDTH : integer;
attribute C_AXI_ID_WIDTH of inst : label is 12;
attribute C_AXI_RUSER_WIDTH : integer;
attribute C_AXI_RUSER_WIDTH of inst : label is 1;
attribute C_AXI_SUPPORTS_READ : integer;
attribute C_AXI_SUPPORTS_READ of inst : label is 1;
attribute C_AXI_SUPPORTS_USER_SIGNALS : integer;
attribute C_AXI_SUPPORTS_USER_SIGNALS of inst : label is 0;
attribute C_AXI_SUPPORTS_WRITE : integer;
attribute C_AXI_SUPPORTS_WRITE of inst : label is 1;
attribute C_AXI_WUSER_WIDTH : integer;
attribute C_AXI_WUSER_WIDTH of inst : label is 1;
attribute C_FAMILY : string;
attribute C_FAMILY of inst : label is "zynq";
attribute C_IGNORE_ID : integer;
attribute C_IGNORE_ID of inst : label is 0;
attribute C_M_AXI_PROTOCOL : integer;
attribute C_M_AXI_PROTOCOL of inst : label is 2;
attribute C_S_AXI_PROTOCOL : integer;
attribute C_S_AXI_PROTOCOL of inst : label is 1;
attribute C_TRANSLATION_MODE : integer;
attribute C_TRANSLATION_MODE of inst : label is 2;
attribute DowngradeIPIdentifiedWarnings of inst : label is "yes";
attribute P_AXI3 : integer;
attribute P_AXI3 of inst : label is 1;
attribute P_AXI4 : integer;
attribute P_AXI4 of inst : label is 0;
attribute P_AXILITE : integer;
attribute P_AXILITE of inst : label is 2;
attribute P_AXILITE_SIZE : string;
attribute P_AXILITE_SIZE of inst : label is "3'b010";
attribute P_CONVERSION : integer;
attribute P_CONVERSION of inst : label is 2;
attribute P_DECERR : string;
attribute P_DECERR of inst : label is "2'b11";
attribute P_INCR : string;
attribute P_INCR of inst : label is "2'b01";
attribute P_PROTECTION : integer;
attribute P_PROTECTION of inst : label is 1;
attribute P_SLVERR : string;
attribute P_SLVERR of inst : label is "2'b10";
attribute X_INTERFACE_INFO : string;
attribute X_INTERFACE_INFO of aclk : signal is "xilinx.com:signal:clock:1.0 CLK CLK";
attribute X_INTERFACE_PARAMETER : string;
attribute X_INTERFACE_PARAMETER of aclk : signal is "XIL_INTERFACENAME CLK, FREQ_HZ 50000000, PHASE 0.000, CLK_DOMAIN gcd_block_design_processing_system7_0_0_FCLK_CLK0, ASSOCIATED_BUSIF S_AXI:M_AXI, ASSOCIATED_RESET ARESETN";
attribute X_INTERFACE_INFO of aresetn : signal is "xilinx.com:signal:reset:1.0 RST RST";
attribute X_INTERFACE_PARAMETER of aresetn : signal is "XIL_INTERFACENAME RST, POLARITY ACTIVE_LOW, TYPE INTERCONNECT";
attribute X_INTERFACE_INFO of m_axi_arready : signal is "xilinx.com:interface:aximm:1.0 M_AXI ARREADY";
attribute X_INTERFACE_INFO of m_axi_arvalid : signal is "xilinx.com:interface:aximm:1.0 M_AXI ARVALID";
attribute X_INTERFACE_INFO of m_axi_awready : signal is "xilinx.com:interface:aximm:1.0 M_AXI AWREADY";
attribute X_INTERFACE_INFO of m_axi_awvalid : signal is "xilinx.com:interface:aximm:1.0 M_AXI AWVALID";
attribute X_INTERFACE_INFO of m_axi_bready : signal is "xilinx.com:interface:aximm:1.0 M_AXI BREADY";
attribute X_INTERFACE_INFO of m_axi_bvalid : signal is "xilinx.com:interface:aximm:1.0 M_AXI BVALID";
attribute X_INTERFACE_INFO of m_axi_rready : signal is "xilinx.com:interface:aximm:1.0 M_AXI RREADY";
attribute X_INTERFACE_PARAMETER of m_axi_rready : signal is "XIL_INTERFACENAME M_AXI, DATA_WIDTH 32, PROTOCOL AXI4LITE, FREQ_HZ 50000000, ID_WIDTH 0, ADDR_WIDTH 32, AWUSER_WIDTH 0, ARUSER_WIDTH 0, WUSER_WIDTH 0, RUSER_WIDTH 0, BUSER_WIDTH 0, READ_WRITE_MODE READ_WRITE, HAS_BURST 0, HAS_LOCK 0, HAS_PROT 1, HAS_CACHE 0, HAS_QOS 0, HAS_REGION 0, HAS_WSTRB 1, HAS_BRESP 1, HAS_RRESP 1, SUPPORTS_NARROW_BURST 0, NUM_READ_OUTSTANDING 8, NUM_WRITE_OUTSTANDING 8, MAX_BURST_LENGTH 1, PHASE 0.000, CLK_DOMAIN gcd_block_design_processing_system7_0_0_FCLK_CLK0, NUM_READ_THREADS 4, NUM_WRITE_THREADS 4, RUSER_BITS_PER_BYTE 0, WUSER_BITS_PER_BYTE 0";
attribute X_INTERFACE_INFO of m_axi_rvalid : signal is "xilinx.com:interface:aximm:1.0 M_AXI RVALID";
attribute X_INTERFACE_INFO of m_axi_wready : signal is "xilinx.com:interface:aximm:1.0 M_AXI WREADY";
attribute X_INTERFACE_INFO of m_axi_wvalid : signal is "xilinx.com:interface:aximm:1.0 M_AXI WVALID";
attribute X_INTERFACE_INFO of s_axi_arready : signal is "xilinx.com:interface:aximm:1.0 S_AXI ARREADY";
attribute X_INTERFACE_INFO of s_axi_arvalid : signal is "xilinx.com:interface:aximm:1.0 S_AXI ARVALID";
attribute X_INTERFACE_INFO of s_axi_awready : signal is "xilinx.com:interface:aximm:1.0 S_AXI AWREADY";
attribute X_INTERFACE_INFO of s_axi_awvalid : signal is "xilinx.com:interface:aximm:1.0 S_AXI AWVALID";
attribute X_INTERFACE_INFO of s_axi_bready : signal is "xilinx.com:interface:aximm:1.0 S_AXI BREADY";
attribute X_INTERFACE_INFO of s_axi_bvalid : signal is "xilinx.com:interface:aximm:1.0 S_AXI BVALID";
attribute X_INTERFACE_INFO of s_axi_rlast : signal is "xilinx.com:interface:aximm:1.0 S_AXI RLAST";
attribute X_INTERFACE_INFO of s_axi_rready : signal is "xilinx.com:interface:aximm:1.0 S_AXI RREADY";
attribute X_INTERFACE_PARAMETER of s_axi_rready : signal is "XIL_INTERFACENAME S_AXI, DATA_WIDTH 32, PROTOCOL AXI3, FREQ_HZ 50000000, ID_WIDTH 12, ADDR_WIDTH 32, AWUSER_WIDTH 0, ARUSER_WIDTH 0, WUSER_WIDTH 0, RUSER_WIDTH 0, BUSER_WIDTH 0, READ_WRITE_MODE READ_WRITE, HAS_BURST 1, HAS_LOCK 1, HAS_PROT 1, HAS_CACHE 1, HAS_QOS 1, HAS_REGION 0, HAS_WSTRB 1, HAS_BRESP 1, HAS_RRESP 1, SUPPORTS_NARROW_BURST 0, NUM_READ_OUTSTANDING 8, NUM_WRITE_OUTSTANDING 8, MAX_BURST_LENGTH 16, PHASE 0.000, CLK_DOMAIN gcd_block_design_processing_system7_0_0_FCLK_CLK0, NUM_READ_THREADS 4, NUM_WRITE_THREADS 4, RUSER_BITS_PER_BYTE 0, WUSER_BITS_PER_BYTE 0";
attribute X_INTERFACE_INFO of s_axi_rvalid : signal is "xilinx.com:interface:aximm:1.0 S_AXI RVALID";
attribute X_INTERFACE_INFO of s_axi_wlast : signal is "xilinx.com:interface:aximm:1.0 S_AXI WLAST";
attribute X_INTERFACE_INFO of s_axi_wready : signal is "xilinx.com:interface:aximm:1.0 S_AXI WREADY";
attribute X_INTERFACE_INFO of s_axi_wvalid : signal is "xilinx.com:interface:aximm:1.0 S_AXI WVALID";
attribute X_INTERFACE_INFO of m_axi_araddr : signal is "xilinx.com:interface:aximm:1.0 M_AXI ARADDR";
attribute X_INTERFACE_INFO of m_axi_arprot : signal is "xilinx.com:interface:aximm:1.0 M_AXI ARPROT";
attribute X_INTERFACE_INFO of m_axi_awaddr : signal is "xilinx.com:interface:aximm:1.0 M_AXI AWADDR";
attribute X_INTERFACE_INFO of m_axi_awprot : signal is "xilinx.com:interface:aximm:1.0 M_AXI AWPROT";
attribute X_INTERFACE_INFO of m_axi_bresp : signal is "xilinx.com:interface:aximm:1.0 M_AXI BRESP";
attribute X_INTERFACE_INFO of m_axi_rdata : signal is "xilinx.com:interface:aximm:1.0 M_AXI RDATA";
attribute X_INTERFACE_INFO of m_axi_rresp : signal is "xilinx.com:interface:aximm:1.0 M_AXI RRESP";
attribute X_INTERFACE_INFO of m_axi_wdata : signal is "xilinx.com:interface:aximm:1.0 M_AXI WDATA";
attribute X_INTERFACE_INFO of m_axi_wstrb : signal is "xilinx.com:interface:aximm:1.0 M_AXI WSTRB";
attribute X_INTERFACE_INFO of s_axi_araddr : signal is "xilinx.com:interface:aximm:1.0 S_AXI ARADDR";
attribute X_INTERFACE_INFO of s_axi_arburst : signal is "xilinx.com:interface:aximm:1.0 S_AXI ARBURST";
attribute X_INTERFACE_INFO of s_axi_arcache : signal is "xilinx.com:interface:aximm:1.0 S_AXI ARCACHE";
attribute X_INTERFACE_INFO of s_axi_arid : signal is "xilinx.com:interface:aximm:1.0 S_AXI ARID";
attribute X_INTERFACE_INFO of s_axi_arlen : signal is "xilinx.com:interface:aximm:1.0 S_AXI ARLEN";
attribute X_INTERFACE_INFO of s_axi_arlock : signal is "xilinx.com:interface:aximm:1.0 S_AXI ARLOCK";
attribute X_INTERFACE_INFO of s_axi_arprot : signal is "xilinx.com:interface:aximm:1.0 S_AXI ARPROT";
attribute X_INTERFACE_INFO of s_axi_arqos : signal is "xilinx.com:interface:aximm:1.0 S_AXI ARQOS";
attribute X_INTERFACE_INFO of s_axi_arsize : signal is "xilinx.com:interface:aximm:1.0 S_AXI ARSIZE";
attribute X_INTERFACE_INFO of s_axi_awaddr : signal is "xilinx.com:interface:aximm:1.0 S_AXI AWADDR";
attribute X_INTERFACE_INFO of s_axi_awburst : signal is "xilinx.com:interface:aximm:1.0 S_AXI AWBURST";
attribute X_INTERFACE_INFO of s_axi_awcache : signal is "xilinx.com:interface:aximm:1.0 S_AXI AWCACHE";
attribute X_INTERFACE_INFO of s_axi_awid : signal is "xilinx.com:interface:aximm:1.0 S_AXI AWID";
attribute X_INTERFACE_INFO of s_axi_awlen : signal is "xilinx.com:interface:aximm:1.0 S_AXI AWLEN";
attribute X_INTERFACE_INFO of s_axi_awlock : signal is "xilinx.com:interface:aximm:1.0 S_AXI AWLOCK";
attribute X_INTERFACE_INFO of s_axi_awprot : signal is "xilinx.com:interface:aximm:1.0 S_AXI AWPROT";
attribute X_INTERFACE_INFO of s_axi_awqos : signal is "xilinx.com:interface:aximm:1.0 S_AXI AWQOS";
attribute X_INTERFACE_INFO of s_axi_awsize : signal is "xilinx.com:interface:aximm:1.0 S_AXI AWSIZE";
attribute X_INTERFACE_INFO of s_axi_bid : signal is "xilinx.com:interface:aximm:1.0 S_AXI BID";
attribute X_INTERFACE_INFO of s_axi_bresp : signal is "xilinx.com:interface:aximm:1.0 S_AXI BRESP";
attribute X_INTERFACE_INFO of s_axi_rdata : signal is "xilinx.com:interface:aximm:1.0 S_AXI RDATA";
attribute X_INTERFACE_INFO of s_axi_rid : signal is "xilinx.com:interface:aximm:1.0 S_AXI RID";
attribute X_INTERFACE_INFO of s_axi_rresp : signal is "xilinx.com:interface:aximm:1.0 S_AXI RRESP";
attribute X_INTERFACE_INFO of s_axi_wdata : signal is "xilinx.com:interface:aximm:1.0 S_AXI WDATA";
attribute X_INTERFACE_INFO of s_axi_wid : signal is "xilinx.com:interface:aximm:1.0 S_AXI WID";
attribute X_INTERFACE_INFO of s_axi_wstrb : signal is "xilinx.com:interface:aximm:1.0 S_AXI WSTRB";
begin
inst: entity work.decalper_eb_ot_sdeen_pot_pi_dehcac_xnilix_axi_protocol_converter_v2_1_17_axi_protocol_converter
port map (
aclk => aclk,
aresetn => aresetn,
m_axi_araddr(31 downto 0) => m_axi_araddr(31 downto 0),
m_axi_arburst(1 downto 0) => NLW_inst_m_axi_arburst_UNCONNECTED(1 downto 0),
m_axi_arcache(3 downto 0) => NLW_inst_m_axi_arcache_UNCONNECTED(3 downto 0),
m_axi_arid(11 downto 0) => NLW_inst_m_axi_arid_UNCONNECTED(11 downto 0),
m_axi_arlen(7 downto 0) => NLW_inst_m_axi_arlen_UNCONNECTED(7 downto 0),
m_axi_arlock(0) => NLW_inst_m_axi_arlock_UNCONNECTED(0),
m_axi_arprot(2 downto 0) => m_axi_arprot(2 downto 0),
m_axi_arqos(3 downto 0) => NLW_inst_m_axi_arqos_UNCONNECTED(3 downto 0),
m_axi_arready => m_axi_arready,
m_axi_arregion(3 downto 0) => NLW_inst_m_axi_arregion_UNCONNECTED(3 downto 0),
m_axi_arsize(2 downto 0) => NLW_inst_m_axi_arsize_UNCONNECTED(2 downto 0),
m_axi_aruser(0) => NLW_inst_m_axi_aruser_UNCONNECTED(0),
m_axi_arvalid => m_axi_arvalid,
m_axi_awaddr(31 downto 0) => m_axi_awaddr(31 downto 0),
m_axi_awburst(1 downto 0) => NLW_inst_m_axi_awburst_UNCONNECTED(1 downto 0),
m_axi_awcache(3 downto 0) => NLW_inst_m_axi_awcache_UNCONNECTED(3 downto 0),
m_axi_awid(11 downto 0) => NLW_inst_m_axi_awid_UNCONNECTED(11 downto 0),
m_axi_awlen(7 downto 0) => NLW_inst_m_axi_awlen_UNCONNECTED(7 downto 0),
m_axi_awlock(0) => NLW_inst_m_axi_awlock_UNCONNECTED(0),
m_axi_awprot(2 downto 0) => m_axi_awprot(2 downto 0),
m_axi_awqos(3 downto 0) => NLW_inst_m_axi_awqos_UNCONNECTED(3 downto 0),
m_axi_awready => m_axi_awready,
m_axi_awregion(3 downto 0) => NLW_inst_m_axi_awregion_UNCONNECTED(3 downto 0),
m_axi_awsize(2 downto 0) => NLW_inst_m_axi_awsize_UNCONNECTED(2 downto 0),
m_axi_awuser(0) => NLW_inst_m_axi_awuser_UNCONNECTED(0),
m_axi_awvalid => m_axi_awvalid,
m_axi_bid(11 downto 0) => B"000000000000",
m_axi_bready => m_axi_bready,
m_axi_bresp(1 downto 0) => m_axi_bresp(1 downto 0),
m_axi_buser(0) => '0',
m_axi_bvalid => m_axi_bvalid,
m_axi_rdata(31 downto 0) => m_axi_rdata(31 downto 0),
m_axi_rid(11 downto 0) => B"000000000000",
m_axi_rlast => '1',
m_axi_rready => m_axi_rready,
m_axi_rresp(1 downto 0) => m_axi_rresp(1 downto 0),
m_axi_ruser(0) => '0',
m_axi_rvalid => m_axi_rvalid,
m_axi_wdata(31 downto 0) => m_axi_wdata(31 downto 0),
m_axi_wid(11 downto 0) => NLW_inst_m_axi_wid_UNCONNECTED(11 downto 0),
m_axi_wlast => NLW_inst_m_axi_wlast_UNCONNECTED,
m_axi_wready => m_axi_wready,
m_axi_wstrb(3 downto 0) => m_axi_wstrb(3 downto 0),
m_axi_wuser(0) => NLW_inst_m_axi_wuser_UNCONNECTED(0),
m_axi_wvalid => m_axi_wvalid,
s_axi_araddr(31 downto 0) => s_axi_araddr(31 downto 0),
s_axi_arburst(1 downto 0) => s_axi_arburst(1 downto 0),
s_axi_arcache(3 downto 0) => s_axi_arcache(3 downto 0),
s_axi_arid(11 downto 0) => s_axi_arid(11 downto 0),
s_axi_arlen(3 downto 0) => s_axi_arlen(3 downto 0),
s_axi_arlock(1 downto 0) => s_axi_arlock(1 downto 0),
s_axi_arprot(2 downto 0) => s_axi_arprot(2 downto 0),
s_axi_arqos(3 downto 0) => s_axi_arqos(3 downto 0),
s_axi_arready => s_axi_arready,
s_axi_arregion(3 downto 0) => B"0000",
s_axi_arsize(2 downto 0) => s_axi_arsize(2 downto 0),
s_axi_aruser(0) => '0',
s_axi_arvalid => s_axi_arvalid,
s_axi_awaddr(31 downto 0) => s_axi_awaddr(31 downto 0),
s_axi_awburst(1 downto 0) => s_axi_awburst(1 downto 0),
s_axi_awcache(3 downto 0) => s_axi_awcache(3 downto 0),
s_axi_awid(11 downto 0) => s_axi_awid(11 downto 0),
s_axi_awlen(3 downto 0) => s_axi_awlen(3 downto 0),
s_axi_awlock(1 downto 0) => s_axi_awlock(1 downto 0),
s_axi_awprot(2 downto 0) => s_axi_awprot(2 downto 0),
s_axi_awqos(3 downto 0) => s_axi_awqos(3 downto 0),
s_axi_awready => s_axi_awready,
s_axi_awregion(3 downto 0) => B"0000",
s_axi_awsize(2 downto 0) => s_axi_awsize(2 downto 0),
s_axi_awuser(0) => '0',
s_axi_awvalid => s_axi_awvalid,
s_axi_bid(11 downto 0) => s_axi_bid(11 downto 0),
s_axi_bready => s_axi_bready,
s_axi_bresp(1 downto 0) => s_axi_bresp(1 downto 0),
s_axi_buser(0) => NLW_inst_s_axi_buser_UNCONNECTED(0),
s_axi_bvalid => s_axi_bvalid,
s_axi_rdata(31 downto 0) => s_axi_rdata(31 downto 0),
s_axi_rid(11 downto 0) => s_axi_rid(11 downto 0),
s_axi_rlast => s_axi_rlast,
s_axi_rready => s_axi_rready,
s_axi_rresp(1 downto 0) => s_axi_rresp(1 downto 0),
s_axi_ruser(0) => NLW_inst_s_axi_ruser_UNCONNECTED(0),
s_axi_rvalid => s_axi_rvalid,
s_axi_wdata(31 downto 0) => s_axi_wdata(31 downto 0),
s_axi_wid(11 downto 0) => s_axi_wid(11 downto 0),
s_axi_wlast => s_axi_wlast,
s_axi_wready => s_axi_wready,
s_axi_wstrb(3 downto 0) => s_axi_wstrb(3 downto 0),
s_axi_wuser(0) => '0',
s_axi_wvalid => s_axi_wvalid
);
end STRUCTURE;
|
library IEEE;
use IEEE.STD_LOGIC_1164.ALL;
use IEEE.NUMERIC_STD.ALL;
entity video is
port (
CLK : in std_logic;
VGA_CLK : in std_logic;
RESET : in std_logic;
VA : in std_logic_vector(11 downto 0);
VDI : in std_logic_vector(7 downto 0);
VDO : out std_logic_vector(15 downto 0);
VWR : in std_logic;
VATTR : in std_logic_vector(7 downto 0);
VGA_R : out std_logic_vector(3 downto 0);
VGA_G : out std_logic_vector(3 downto 0);
VGA_B : out std_logic_vector(3 downto 0);
VGA_HSYNC : out std_logic;
VGA_VSYNC : out std_logic
);
end video;
architecture Behavioral of video is
signal V_COUNTER : unsigned(9 downto 0); -- Vertical Counter
signal H_COUNTER : unsigned(11 downto 0); -- Horizontal Counter
signal PAPER : std_logic;
signal PAPER_ENA : std_logic;
signal PIX : std_logic_vector(7 downto 0);
signal PIX_LT : std_logic_vector(7 downto 0);
signal ATTR : std_logic_vector(7 downto 0);
signal ATTR_LT : std_logic_vector(7 downto 0);
constant HSIZE : integer := 640; -- Paper H_size --1024
constant VSIZE : integer := 480; -- Paper V_size --768
constant HFP : integer := 16; --24;
constant HS : integer := 96; --136;
constant HB : integer := 48; --160;
constant VFP : integer := 19; --3;
constant VS : integer := 2; --6;
constant VB : integer := 33; --29;
signal FONTROM_A : std_logic_vector(11 downto 0);
signal FONTROM_DO : std_logic_vector(7 downto 0);
signal VRAM_WR : std_logic_vector(0 downto 0);
signal VRAM_RA : std_logic_vector(11 downto 0);
signal VRAM_RDO : std_logic_vector(15 downto 0);
begin
--##########################
VRAM_WR <= "1" when VWR = '1' else "0";
u_FONTROM : entity work.fontrom
port map(
clka => VGA_CLK,
addra => FONTROM_A,
douta => FONTROM_DO );
u_VRAM : entity work.vram
port map(
clka => CLK,
wea => VRAM_WR,
addra => VA,
dina => VATTR & VDI,
douta => VDO,
clkb => VGA_CLK,
web => "0",
addrb => VRAM_RA,
dinb => X"0000",
doutb => VRAM_RDO );
process (VGA_CLK)
begin
if rising_edge(VGA_CLK) then
if RESET = '1' then
H_COUNTER <= (others=>'0');
V_COUNTER <= (others=>'0');
else
H_COUNTER <= H_COUNTER + 1;
if H_COUNTER = (HSIZE + HFP + HS + HB - 1) then
H_COUNTER <= (others=>'0');
V_COUNTER <= V_COUNTER + 1;
if V_COUNTER = (VSIZE + VFP + VS + VB - 1) then
V_COUNTER <= (others=>'0');
end if;
end if;
end if;
VGA_HSYNC <= '1';
VGA_VSYNC <= '1';
PAPER <= '0';
if H_COUNTER >= (HSIZE + HFP) and H_COUNTER < (HSIZE + HFP + HS)then
VGA_HSYNC <= '0';
end if;
if V_COUNTER >= (VSIZE + VFP) and V_COUNTER < (VSIZE + VFP + VS)then
VGA_VSYNC <= '0';
end if;
if H_COUNTER < HSIZE and V_COUNTER < VSIZE then
PAPER <= '1';
end if;
end if;
end process;
process (VGA_CLK)
begin
if rising_edge(VGA_CLK) then
case H_COUNTER(2 downto 0) is
when "000" =>
VRAM_RA <= std_logic_vector(V_COUNTER(8 downto 4)) & std_logic_vector(H_COUNTER(9 downto 3));
when "010" =>
FONTROM_A <= VRAM_RDO(7 downto 0) & std_logic_vector(V_COUNTER(3 downto 0));
ATTR <= VRAM_RDO(15 downto 8);
when "100" =>
PIX <= FONTROM_DO;
when "111" =>
PAPER_ENA <= PAPER;
PIX_LT <= PIX;
ATTR_LT <= ATTR;
when others => NULL;
end case;
end if;
end process;
process (VGA_CLK)
begin
if rising_edge(VGA_CLK) then
if PAPER_ENA = '1' then
if PIX_LT(7 - to_integer(H_COUNTER(2 downto 0))) = '1' then
VGA_R(3) <= ATTR_LT(2);
VGA_R(2) <= ATTR_LT(2) and ATTR_LT(3);
VGA_R(1) <= ATTR_LT(2) and ATTR_LT(3);
VGA_R(0) <= ATTR_LT(2);
VGA_G(3) <= ATTR_LT(1);
VGA_G(2) <= ATTR_LT(1) and ATTR_LT(3);
VGA_G(1) <= ATTR_LT(1) and ATTR_LT(3);
VGA_G(0) <= ATTR_LT(1);
VGA_B(3) <= ATTR_LT(0);
VGA_B(2) <= ATTR_LT(0) and ATTR_LT(3);
VGA_B(1) <= ATTR_LT(0) and ATTR_LT(3);
VGA_B(0) <= ATTR_LT(0);
else
VGA_R(3) <= ATTR_LT(6);
VGA_R(2) <= ATTR_LT(6) and ATTR_LT(7);
VGA_R(1) <= ATTR_LT(6) and ATTR_LT(7);
VGA_R(0) <= ATTR_LT(6);
VGA_G(3) <= ATTR_LT(5);
VGA_G(2) <= ATTR_LT(5) and ATTR_LT(7);
VGA_G(1) <= ATTR_LT(5) and ATTR_LT(7);
VGA_G(0) <= ATTR_LT(5);
VGA_B(3) <= ATTR_LT(4);
VGA_B(2) <= ATTR_LT(4) and ATTR_LT(7);
VGA_B(1) <= ATTR_LT(4) and ATTR_LT(7);
VGA_B(0) <= ATTR_LT(4);
end if;
else
VGA_G <= "0000";
VGA_R <= "0000";
VGA_B <= "0000";
end if;
end if;
end process;
--process (VGA_CLK)
--begin
-- if rising_edge(VGA_CLK) then
-- VGA_R <= "0000";
-- VGA_G <= "0000";
-- VGA_B <= "0000";
-- if PAPER = '1' then
-- VGA_B <= "1111";
-- end if;
-- end if;
--end process;
end Behavioral;
|
architecture RTL of FIFO is
begin
process
begin
end process;
process (a, b)
begin
end process;
process (a, b) is
begin
end process;
-- Violations below
process
begin
end process;
process (a, b)
begin
end process;
process (a, b) is
begin
end process;
end architecture RTL;
|
--------------------------------------------------------------------------------
--
-- Title : rtl_game_int.vhd
-- Design : Example
-- Author : Kapitanov
-- Company : InSys
--
-- Version : 1.0
--------------------------------------------------------------------------------
--
-- Description : Debounce module: remove glitches
--
--------------------------------------------------------------------------------
library ieee;
use ieee.std_logic_1164.all;
use ieee.std_logic_unsigned.all;
entity ctrl_jazz is
port(
clk : in std_logic; --! clock
button : in std_logic; --! button in
reset : in std_logic; --! reset
clrbutton : out std_logic --! button out
);
end ctrl_jazz;
architecture ctrl_jazz of ctrl_jazz is
signal gcnt : std_logic_vector(23 downto 0);
signal glbut : std_logic;
begin
CLRBUTTON <= glbut;
glbut <= gcnt(23) when rising_edge(clk);
pr_glitches: process(clk, reset) is
begin
if reset = '0' then
gcnt <= (others => '0');
elsif rising_edge(clk) then
if button = '0' then
gcnt <= gcnt + '1';
else
gcnt <= (others => '0');
end if;
end if;
end process;
end ctrl_jazz; |
library IEEE;
use IEEE.STD_LOGIC_1164.ALL;
use IEEE.STD_LOGIC_UNSIGNED.ALL;
use IEEE.STD_LOGIC_ARITH.ALL;
-- 1 bit adder
entity add_1_bit is
port (
x: in std_logic;
y: in std_logic;
cin: in std_logic;
sum: out std_logic;
cout: out std_logic
);
end add_1_bit;
architecture main of add_1_bit is
begin
sum <= x xor y xor cin;
cout <= (x and y) or (x and cin) or (y and cin);
end main;
library IEEE;
use IEEE.STD_LOGIC_1164.ALL;
use IEEE.STD_LOGIC_UNSIGNED.ALL;
use IEEE.STD_LOGIC_ARITH.ALL;
-- 4 bit adder
entity add_4_bits is
port (
x: in std_logic_vector(3 downto 0);
y: in std_logic_vector(3 downto 0);
cin: in std_logic;
sum: out std_logic_vector(3 downto 0);
cout: out std_logic
);
end add_4_bits;
architecture main of add_4_bits is
component add_1_bit
port (
x: in std_logic;
y: in std_logic;
cin: in std_logic;
sum: out std_logic;
cout: out std_logic
);
end component;
signal i_carry: std_logic_vector(2 downto 0);
begin
cell_1: add_1_bit
port map (x(0), y(0), cin, sum(0), i_carry(0));
cell_2: add_1_bit
port map (x(1), y(1), i_carry(0), sum(1), i_carry(1));
cell_3: add_1_bit
port map (x(2), y(2), i_carry(1), sum(2), i_carry(2));
cell_4: add_1_bit
port map (x(3), y(3), i_carry(2), sum(3), cout);
end main;
|
library ieee;
use ieee.numeric_std.all;
use ieee.std_logic_1164.all;
entity bbtas_rnd is
port(
clock: in std_logic;
input: in std_logic_vector(1 downto 0);
output: out std_logic_vector(1 downto 0)
);
end bbtas_rnd;
architecture behaviour of bbtas_rnd is
constant st0: std_logic_vector(2 downto 0) := "101";
constant st1: std_logic_vector(2 downto 0) := "010";
constant st2: std_logic_vector(2 downto 0) := "011";
constant st3: std_logic_vector(2 downto 0) := "110";
constant st4: std_logic_vector(2 downto 0) := "111";
constant st5: std_logic_vector(2 downto 0) := "001";
signal current_state, next_state: std_logic_vector(2 downto 0);
begin
process(clock) begin
if rising_edge(clock) then current_state <= next_state;
end if;
end process;
process(input, current_state) begin
next_state <= "---"; output <= "--";
case current_state is
when st0 =>
if std_match(input, "00") then next_state <= st0; output <= "00";
elsif std_match(input, "01") then next_state <= st1; output <= "00";
elsif std_match(input, "10") then next_state <= st1; output <= "00";
elsif std_match(input, "11") then next_state <= st1; output <= "00";
end if;
when st1 =>
if std_match(input, "00") then next_state <= st0; output <= "00";
elsif std_match(input, "01") then next_state <= st2; output <= "00";
elsif std_match(input, "10") then next_state <= st2; output <= "00";
elsif std_match(input, "11") then next_state <= st2; output <= "00";
end if;
when st2 =>
if std_match(input, "00") then next_state <= st1; output <= "00";
elsif std_match(input, "01") then next_state <= st3; output <= "00";
elsif std_match(input, "10") then next_state <= st3; output <= "00";
elsif std_match(input, "11") then next_state <= st3; output <= "00";
end if;
when st3 =>
if std_match(input, "00") then next_state <= st4; output <= "00";
elsif std_match(input, "01") then next_state <= st3; output <= "01";
elsif std_match(input, "10") then next_state <= st3; output <= "10";
elsif std_match(input, "11") then next_state <= st3; output <= "11";
end if;
when st4 =>
if std_match(input, "00") then next_state <= st5; output <= "00";
elsif std_match(input, "01") then next_state <= st4; output <= "00";
elsif std_match(input, "10") then next_state <= st4; output <= "00";
elsif std_match(input, "11") then next_state <= st4; output <= "00";
end if;
when st5 =>
if std_match(input, "00") then next_state <= st0; output <= "00";
elsif std_match(input, "01") then next_state <= st5; output <= "00";
elsif std_match(input, "10") then next_state <= st5; output <= "00";
elsif std_match(input, "11") then next_state <= st5; output <= "00";
end if;
when others => next_state <= "---"; output <= "--";
end case;
end process;
end behaviour;
|
library ieee;
use ieee.std_logic_1164.all;
use ieee.numeric_std.all;
use std.textio.all;
entity file_RAM is
generic (
filename: string
);
port (
clock : in std_logic;
write_enable : in std_logic;
address : in std_logic_vector;
data_in : in std_logic_vector;
data_out : out std_logic_vector
);
end entity file_RAM;
architecture behavioural of file_RAM is
type memory is array(integer range 0 to (2**address'length-1)) of std_logic_vector(data_in'range);
function read_file(filename: string) return memory is
variable contents : memory;
variable mem_temp : bit_vector(data_in'range);
file data_file : text open read_mode is filename;
variable data_line, output_line: line;
begin
for i in memory'range loop
readline(data_file, data_line);
read(data_line, mem_temp);
contents(i) := to_stdlogicvector(mem_temp);
end loop;
return contents;
end function read_file;
signal storage : memory := read_file(filename);
begin
process(clock)
begin
if rising_edge(clock) then
data_out <= storage(to_integer(unsigned(address)));
if write_enable = '1' then
storage(to_integer(unsigned(address))) <= data_in;
end if;
end if;
end process;
end behavioural;
|
-- Copyright (C) 2001 Bill Billowitch.
-- Some of the work to develop this test suite was done with Air Force
-- support. The Air Force and Bill Billowitch assume no
-- responsibilities for this software.
-- This file is part of VESTs (Vhdl tESTs).
-- VESTs is free software; you can redistribute it and/or modify it
-- under the terms of the GNU General Public License as published by the
-- Free Software Foundation; either version 2 of the License, or (at
-- your option) any later version.
-- VESTs is distributed in the hope that it will be useful, but WITHOUT
-- ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
-- FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License
-- for more details.
-- You should have received a copy of the GNU General Public License
-- along with VESTs; if not, write to the Free Software Foundation,
-- Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
-- ---------------------------------------------------------------------
--
-- $Id: tc2598.vhd,v 1.2 2001-10-26 16:30:20 paw Exp $
-- $Revision: 1.2 $
--
-- ---------------------------------------------------------------------
ENTITY c13s03b01x00p02n01i02598ent IS
END c13s03b01x00p02n01i02598ent;
ARCHITECTURE c13s03b01x00p02n01i02598arch OF c13s03b01x00p02n01i02598ent IS
BEGIN
TESTING: PROCESS
variable k; : integer := 0;
BEGIN
assert FALSE
report "***FAILED TEST: c13s03b01x00p02n01i02598 - Identifier can not end with ';'."
severity ERROR;
wait;
END PROCESS TESTING;
END c13s03b01x00p02n01i02598arch;
|
-- Copyright (C) 2001 Bill Billowitch.
-- Some of the work to develop this test suite was done with Air Force
-- support. The Air Force and Bill Billowitch assume no
-- responsibilities for this software.
-- This file is part of VESTs (Vhdl tESTs).
-- VESTs is free software; you can redistribute it and/or modify it
-- under the terms of the GNU General Public License as published by the
-- Free Software Foundation; either version 2 of the License, or (at
-- your option) any later version.
-- VESTs is distributed in the hope that it will be useful, but WITHOUT
-- ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
-- FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License
-- for more details.
-- You should have received a copy of the GNU General Public License
-- along with VESTs; if not, write to the Free Software Foundation,
-- Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
-- ---------------------------------------------------------------------
--
-- $Id: tc2598.vhd,v 1.2 2001-10-26 16:30:20 paw Exp $
-- $Revision: 1.2 $
--
-- ---------------------------------------------------------------------
ENTITY c13s03b01x00p02n01i02598ent IS
END c13s03b01x00p02n01i02598ent;
ARCHITECTURE c13s03b01x00p02n01i02598arch OF c13s03b01x00p02n01i02598ent IS
BEGIN
TESTING: PROCESS
variable k; : integer := 0;
BEGIN
assert FALSE
report "***FAILED TEST: c13s03b01x00p02n01i02598 - Identifier can not end with ';'."
severity ERROR;
wait;
END PROCESS TESTING;
END c13s03b01x00p02n01i02598arch;
|
-- Copyright (C) 2001 Bill Billowitch.
-- Some of the work to develop this test suite was done with Air Force
-- support. The Air Force and Bill Billowitch assume no
-- responsibilities for this software.
-- This file is part of VESTs (Vhdl tESTs).
-- VESTs is free software; you can redistribute it and/or modify it
-- under the terms of the GNU General Public License as published by the
-- Free Software Foundation; either version 2 of the License, or (at
-- your option) any later version.
-- VESTs is distributed in the hope that it will be useful, but WITHOUT
-- ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
-- FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License
-- for more details.
-- You should have received a copy of the GNU General Public License
-- along with VESTs; if not, write to the Free Software Foundation,
-- Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
-- ---------------------------------------------------------------------
--
-- $Id: tc2598.vhd,v 1.2 2001-10-26 16:30:20 paw Exp $
-- $Revision: 1.2 $
--
-- ---------------------------------------------------------------------
ENTITY c13s03b01x00p02n01i02598ent IS
END c13s03b01x00p02n01i02598ent;
ARCHITECTURE c13s03b01x00p02n01i02598arch OF c13s03b01x00p02n01i02598ent IS
BEGIN
TESTING: PROCESS
variable k; : integer := 0;
BEGIN
assert FALSE
report "***FAILED TEST: c13s03b01x00p02n01i02598 - Identifier can not end with ';'."
severity ERROR;
wait;
END PROCESS TESTING;
END c13s03b01x00p02n01i02598arch;
|
------------------------------------------------------------------------------
-- This file is a part of the GRLIB VHDL IP LIBRARY
-- Copyright (C) 2003 - 2008, Gaisler Research
-- Copyright (C) 2008 - 2014, Aeroflex Gaisler
--
-- This program is free software; you can redistribute it and/or modify
-- it under the terms of the GNU General Public License as published by
-- the Free Software Foundation; either version 2 of the License, or
-- (at your option) any later version.
--
-- This program is distributed in the hope that it will be useful,
-- but WITHOUT ANY WARRANTY; without even the implied warranty of
-- MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
-- GNU General Public License for more details.
--
-- You should have received a copy of the GNU General Public License
-- along with this program; if not, write to the Free Software
-- Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
-----------------------------------------------------------------------------
-- Entity: outpad_ds
-- File: outpad_ds.vhd
-- Author: Jiri Gaisler - Gaisler Research
-- Description: Differential output pad with technology wrapper
------------------------------------------------------------------------------
library ieee;
use ieee.std_logic_1164.all;
library techmap;
use techmap.gencomp.all;
use techmap.allpads.all;
entity outpad_ds is
generic (tech : integer := 0; level : integer := lvds;
voltage : integer := x33v; oepol : integer := 0; slew : integer := 0);
port (padp, padn : out std_ulogic; i, en : in std_ulogic);
end;
architecture rtl of outpad_ds is
signal gnd, oen : std_ulogic;
begin
gnd <= '0';
oen <= not en when oepol /= padoen_polarity(tech) else en;
gen0 : if has_ds_pads(tech) = 0 generate
padp <= i
-- pragma translate_off
after 1 ns
-- pragma translate_on
;
padn <= not i
-- pragma translate_off
after 1 ns
-- pragma translate_on
;
end generate;
xcv : if (is_unisim(tech) = 1) generate
u0 : unisim_outpad_ds generic map (level, slew, voltage) port map (padp, padn, i);
end generate;
axc : if (tech = axcel) or (tech = axdsp) generate
u0 : axcel_outpad_ds generic map (level, voltage) port map (padp, padn, i);
end generate;
pa3 : if (tech = apa3) generate
u0 : apa3_outpad_ds generic map (level) port map (padp, padn, i);
end generate;
pa3e : if (tech = apa3e) generate
u0 : apa3e_outpad_ds generic map (level) port map (padp, padn, i);
end generate;
pa3l : if (tech = apa3l) generate
u0 : apa3l_outpad_ds generic map (level) port map (padp, padn, i);
end generate;
fus : if (tech = actfus) generate
u0 : fusion_outpad_ds generic map (level) port map (padp, padn, i);
end generate;
rht : if (tech = rhlib18t) generate
u0 : rh_lib18t_outpad_ds port map (padp, padn, i, oen);
end generate;
n2x : if (tech = easic45) generate
u0 : n2x_outpad_ds generic map (level, voltage) port map (padp, padn, i);
end generate;
end;
library ieee;
use ieee.std_logic_1164.all;
library techmap;
use techmap.gencomp.all;
entity outpad_dsv is
generic (tech : integer := 0; level : integer := x33v;
voltage : integer := lvds; width : integer := 1;
oepol : integer := 0; slew : integer := 0);
port (
padp : out std_logic_vector(width-1 downto 0);
padn : out std_logic_vector(width-1 downto 0);
i, en: in std_logic_vector(width-1 downto 0));
end;
architecture rtl of outpad_dsv is
begin
v : for j in width-1 downto 0 generate
u0 : outpad_ds generic map (tech, level, voltage, oepol, slew)
port map (padp(j), padn(j), i(j), en(j));
end generate;
end;
|
--------------------------------------------------------------------------------
-- Entity: acia6551
-- Date:2018-11-24
-- Author: gideon
--
-- Description: This is the testbench for the 6551.
--------------------------------------------------------------------------------
library ieee;
use ieee.std_logic_1164.all;
use ieee.numeric_std.all;
use work.io_bus_pkg.all;
use work.io_bus_bfm_pkg.all;
use work.slot_bus_pkg.all;
use work.slot_bus_master_bfm_pkg.all;
use work.acia6551_pkg.all;
use work.tl_string_util_pkg.all;
entity tb_acia6551 is
end entity;
architecture testbench of tb_acia6551 is
signal clock : std_logic := '0';
signal reset : std_logic;
signal slot_req : t_slot_req;
signal slot_resp : t_slot_resp;
signal io_req : t_io_req;
signal io_resp : t_io_resp;
signal io_irq : std_logic;
begin
clock <= not clock after 10 ns;
reset <= '1', '0' after 100 ns;
i_acia: entity work.acia6551
port map (
clock => clock,
reset => reset,
slot_req => slot_req,
slot_resp => slot_resp,
io_req => io_req,
io_resp => io_resp,
io_irq => io_irq
);
i_io_master: entity work.io_bus_bfm
generic map (
g_name => "io"
)
port map (
clock => clock,
req => io_req,
resp => io_resp
);
i_slot_master: entity work.slot_bus_master_bfm
generic map (
g_name => "slot"
)
port map (
clock => clock,
req => slot_req,
resp => slot_resp
);
p_test: process
variable io : p_io_bus_bfm_object;
variable slot : p_slot_bus_master_bfm_object;
variable data : std_logic_vector(7 downto 0);
variable status : std_logic_vector(7 downto 0);
procedure check_io_irq(level : std_logic; flags : std_logic_vector(7 downto 0) := X"00") is
variable reg : std_logic_vector(7 downto 0);
begin
wait until clock = '1';
wait until clock = '1';
wait until clock = '1';
assert level = io_irq report "Level of IO_irq is wrong." severity error;
if level = '1' then
io_read(io, c_reg_irq_source, reg);
assert flags = reg report "IRQ flags unexpected. " & hstr(reg) & "/=" & hstr(flags)
severity error;
io_write(io, c_reg_irq_source, flags);
end if;
end procedure;
procedure read_status_and_data(exp: boolean := false; expdata : std_logic_vector(7 downto 0) := X"00") is
begin
slot_io_read(slot, c_addr_status_register, status);
slot_io_read(slot, c_addr_data_register, data);
report hstr(status) & ":" & hstr(data);
if exp and status(3) = '0' then
report "Rx Data expected, but not available."
severity error;
end if;
if not exp and status(3) = '1' then
report "NO data expected, but there is Rx data available."
severity error;
end if;
if exp and status(3) = '1' and data /= expdata then
report "Wrong Rx data read."
severity error;
end if;
end procedure;
procedure read_tx(exp: boolean := false; expdata : std_logic_vector(7 downto 0) := X"00") is
variable head, tail : std_logic_vector(7 downto 0);
begin
io_read(io, c_reg_tx_head, head);
io_read(io, c_reg_tx_tail, tail);
io_read(io, unsigned(tail) + X"800", data);
report hstr(head) & ":" & hstr(tail) & ":" & hstr(data);
if head /= tail then
io_write(io, c_reg_tx_tail, std_logic_vector(unsigned(tail) + 1));
assert exp report "There is data, but you didn't expected any." severity error;
assert data = expdata report "Data is not as expected?" severity error;
else
assert not exp report "There is no data, but you did expect some!" severity error;
end if;
end procedure;
begin
bind_io_bus_bfm("io", io);
bind_slot_bus_master_bfm("slot", slot);
wait until reset = '0';
check_io_irq('0');
-- Enable and pass four bytes to the RX of the Host
io_write(io, c_reg_enable, X"19" ); -- enable IRQ on DTR change and control write
io_write(io, X"900", X"47");
io_write(io, X"901", X"69");
io_write(io, X"902", X"64");
io_write(io, X"903", X"65");
io_write(io, c_reg_rx_head, X"04" );
-- On the host side, read status. It should show no data, since DTR is not set
read_status_and_data;
-- Set DTR
slot_io_write(slot, c_addr_command_register, X"03");
check_io_irq('1', X"12"); -- Checks and clears IRQ
check_io_irq('0');
-- set the virtual baud rate
slot_io_write(slot, c_addr_control_register, X"1A");
check_io_irq('1', X"0A"); -- Checks and clears IRQ
check_io_irq('0');
io_read(io, c_reg_control, status);
assert status = X"1A" report "Control read register is different from what we wrote earlier." severity error;
-- Now that DTR is set, reading the host status should show that there is data available
read_status_and_data(true, X"47");
read_status_and_data(true, X"69");
read_status_and_data(true, X"64");
read_status_and_data(true, X"65");
read_status_and_data;
io_write(io, X"904", X"6f");
io_write(io, X"905", X"6e");
io_write(io, c_reg_rx_head, X"06" );
read_status_and_data(true, X"6F");
read_status_and_data(true, X"6E");
read_status_and_data;
io_write(io, c_reg_enable, X"05"); -- enable Tx Interrupt
assert io_irq = '0' report "IO IRQ should be zero now." severity error;
-- Now the other way around (from Host to Appl)
slot_io_write(slot, c_addr_data_register, X"01");
slot_io_write(slot, c_addr_data_register, X"02");
slot_io_write(slot, c_addr_data_register, X"03");
slot_io_write(slot, c_addr_data_register, X"04");
assert io_irq = '1' report "IO IRQ should be active now." severity error;
read_tx(true, X"01");
read_tx(true, X"02");
read_tx(true, X"03");
read_tx(true, X"04");
read_tx;
for i in 0 to 260 loop
slot_io_write(slot, c_addr_data_register, std_logic_vector(to_unsigned((i + 6) mod 256, 8)));
end loop;
read_tx(true, X"06");
read_tx(true, X"07");
read_tx(true, X"08");
read_tx(true, X"09");
read_tx(true, X"0A");
wait;
end process;
end architecture;
|
library ieee;
use ieee.std_logic_1164.all;
use ieee.numeric_std.all;
--STEP 3
--This component shifts the number so that exponents match and completes the new bits with 1's or 0's according to signs
entity number_shifter is
generic(
BITS : natural := 32;
EXP_BITS : natural := 6
);
port(
sign_1_in : in std_logic;
sign_2_in : in std_logic;
greater_exp : in std_logic_vector(EXP_BITS - 1 downto 0);
smaller_exp : in std_logic_vector(EXP_BITS - 1 downto 0);
man_in : in std_logic_vector(BITS - 1 downto 0);
man_out : out std_logic_vector(BITS - 1 downto 0);
rounding_bit : out std_logic
);
end number_shifter;
architecture number_shifter_arq of number_shifter is
begin
process(sign_1_in, sign_2_in,greater_exp,smaller_exp, man_in) is
variable number_to_shift : std_logic_vector(BITS downto 0) := (others => '0'); --one more for the rounding bit
variable shifted_number : std_logic_vector(BITS downto 0) := (others => '0'); --one more for the rounding bit
variable shifting_difference : integer := 0;
begin
shifting_difference := to_integer(unsigned(greater_exp) - unsigned(smaller_exp));
number_to_shift := man_in & '0';
shifted_number := std_logic_vector(shift_right(unsigned(number_to_shift), shifting_difference));
if (sign_1_in /= sign_2_in) then
if(BITS + 1 >= shifting_difference) then
shifted_number(BITS downto BITS + 1 - shifting_difference) := (others => '1');
else
shifted_number := (others => '1');
end if;
end if;
man_out <= shifted_number(BITS downto 1);
rounding_bit <= shifted_number(0);
end process;
end;
|
library ieee;
use ieee.std_logic_1164.all;
use ieee.numeric_std.all;
library ims;
use ims.coprocessor.all;
ENTITY INTERFACE_COMB_2 IS
PORT (
inp : IN custom32_in_type;
outp : OUT custom32_out_type
);
END;
ARCHITECTURE RTL OF INTERFACE_COMB_2 IS
-------------------------------------------------------------------------
-- PRAGMA BEGIN DECLARATION
-- PRAGMA END DECLARATION
-------------------------------------------------------------------------
-------------------------------------------------------------------------
-- PRAGMA BEGIN SIGNAL
-- PRAGMA END SIGNAL
-------------------------------------------------------------------------
BEGIN
-------------------------------------------------------------------------
-- synthesis translate_off
PROCESS
BEGIN
WAIT FOR 1 ns;
printmsg("(IMS) INTERFACE_COMB_2 : ALLOCATION OK !");
WAIT;
END PROCESS;
-- synthesis translate_on
-------------------------------------------------------------------------
-------------------------------------------------------------------------
-- PRAGMA BEGIN INSTANCIATION
-- PRAGMA END INSTANCIATION
-------------------------------------------------------------------------
-------------------------------------------------------------------------
-- PRAGMA BEGIN RESULT SELECTION
outp.result <= inp.op1(31 downto 0) AND inp.op2(31 downto 0);
-- PRAGMA END RESULT SELECTION
-------------------------------------------------------------------------
end;
|
library ieee;
use ieee.std_logic_1164.all;
library alib;
entity tb3 is
end;
architecture arch of tb3 is
signal a, b : std_logic := '0';
begin
ainst: alib.apkg.acomp
port map (a, b);
process is
begin
a <= '0';
wait for 1 ns;
assert b = '0' report "component is missing" severity failure;
a <= '1';
wait for 1 ns;
assert b = '1' report "component is missing" severity failure;
wait;
end process;
end architecture;
|
library ieee;
use ieee.std_logic_1164.all;
library alib;
entity tb3 is
end;
architecture arch of tb3 is
signal a, b : std_logic := '0';
begin
ainst: alib.apkg.acomp
port map (a, b);
process is
begin
a <= '0';
wait for 1 ns;
assert b = '0' report "component is missing" severity failure;
a <= '1';
wait for 1 ns;
assert b = '1' report "component is missing" severity failure;
wait;
end process;
end architecture;
|
--------------------------------------------------------------------------------
-- Company:
-- Engineer:
--
-- Create Date: 14:08:44 03/06/2013
-- Design Name:
-- Module Name: /home/frank/Dropbox/Workspaces/Workspace_xilinx/reg_file/data_memory_tb.vhd
-- Project Name: reg_file
-- Target Device:
-- Tool versions:
-- Description:
--
-- VHDL Test Bench Created by ISE for module: data_memory
--
-- Dependencies:
--
-- Revision:
-- Revision 0.01 - File Created
-- Additional Comments:
--
-- Notes:
-- This testbench has been automatically generated using types std_logic and
-- std_logic_vector for the ports of the unit under test. Xilinx recommends
-- that these types always be used for the top-level I/O of a design in order
-- to guarantee that the testbench will bind correctly to the post-implementation
-- simulation model.
--------------------------------------------------------------------------------
LIBRARY ieee;
USE ieee.std_logic_1164.ALL;
use ieee.std_logic_arith.all;
use ieee.std_logic_unsigned.all;
-- Uncomment the following library declaration if using
-- arithmetic functions with Signed or Unsigned values
--USE ieee.numeric_std.ALL;
ENTITY data_memory_tb IS
END data_memory_tb;
ARCHITECTURE behavior OF data_memory_tb IS
-- Component Declaration for the Unit Under Test (UUT)
COMPONENT data_memory
PORT(
clk : IN std_logic;
MemWrite : IN std_logic;
MemRead : IN std_logic;
adress : IN std_logic_vector(31 downto 0);
write_data : IN std_logic_vector(31 downto 0);
read_data : OUT std_logic_vector(31 downto 0)
);
END COMPONENT;
--Inputs
signal clk : std_logic := '0';
signal MemWrite : std_logic := '0';
signal MemRead : std_logic := '0';
signal adress : std_logic_vector(31 downto 0) := (others => '0');
signal write_data : std_logic_vector(31 downto 0) := (others => '0');
--Outputs
signal read_data : std_logic_vector(31 downto 0);
-- Clock period definitions
constant clk_period : time := 10 ns;
BEGIN
-- Instantiate the Unit Under Test (UUT)
uut: data_memory PORT MAP (
clk => clk,
MemWrite => MemWrite,
MemRead => MemRead,
adress => adress,
write_data => write_data,
read_data => read_data
);
-- Clock process definitions
clk_process :process
begin
clk <= '0';
wait for clk_period/2;
clk <= '1';
wait for clk_period/2;
end process;
-- Stimulus process
stim_proc: process
begin
-- hold reset state for 100 ns.
wait for 100 ns;
wait for clk_period*10;
MemWrite <= '1';
adress <= X"00000000";
write_data <= X"FFFFFFFF";
wait until rising_edge(clk);
MemWrite <= '0';
MemRead <= '1';
wait until rising_edge(clk);
assert read_data = X"FFFFFFFF" report "Data has not been written correctly";
wait;
end process;
END;
|
-- Copyright (C) 2001 Bill Billowitch.
-- Some of the work to develop this test suite was done with Air Force
-- support. The Air Force and Bill Billowitch assume no
-- responsibilities for this software.
-- This file is part of VESTs (Vhdl tESTs).
-- VESTs is free software; you can redistribute it and/or modify it
-- under the terms of the GNU General Public License as published by the
-- Free Software Foundation; either version 2 of the License, or (at
-- your option) any later version.
-- VESTs is distributed in the hope that it will be useful, but WITHOUT
-- ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
-- FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License
-- for more details.
-- You should have received a copy of the GNU General Public License
-- along with VESTs; if not, write to the Free Software Foundation,
-- Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
-- ---------------------------------------------------------------------
--
-- $Id: tc407.vhd,v 1.2 2001-10-26 16:29:53 paw Exp $
-- $Revision: 1.2 $
--
-- ---------------------------------------------------------------------
ENTITY model IS
PORT
(
F1: OUT integer := 3;
F2: INOUT integer := 3;
F3: IN integer
);
END model;
architecture model of model is
begin
process
begin
wait for 1 ns;
assert F3= 3
report"wrong initialization of F3 through type conversion" severity failure;
assert F2 = 3
report"wrong initialization of F2 through type conversion" severity failure;
wait;
end process;
end;
ENTITY c03s02b01x01p19n01i00407ent IS
END c03s02b01x01p19n01i00407ent;
ARCHITECTURE c03s02b01x01p19n01i00407arch OF c03s02b01x01p19n01i00407ent IS
constant C1 : bit := '1';
function complex_scalar(s : bit) return integer is
begin
return 3;
end complex_scalar;
function scalar_complex(s : integer) return bit is
begin
return C1;
end scalar_complex;
component model1
PORT
(
F1: OUT integer;
F2: INOUT integer;
F3: IN integer
);
end component;
for T1 : model1 use entity work.model(model);
signal S1 : bit;
signal S2 : bit;
signal S3 : bit := C1;
BEGIN
T1: model1
port map (
scalar_complex(F1) => S1,
scalar_complex(F2) => complex_scalar(S2),
F3 => complex_scalar(S3)
);
TESTING: PROCESS
BEGIN
wait for 1 ns;
assert NOT((S1 = C1) and (S2 = C1))
report "***PASSED TEST: c03s02b01x01p19n01i00407"
severity NOTE;
assert ((S1 = C1) and (S2 = C1))
report "***FAILED TEST: c03s02b01x01p19n01i00407 - For an interface object of mode out, buffer, inout, or linkage, if the formal part includes a type conversion function, then the parameter subtype of that function must be a constrained array subtype."
severity ERROR;
wait;
END PROCESS TESTING;
END c03s02b01x01p19n01i00407arch;
|
-- Copyright (C) 2001 Bill Billowitch.
-- Some of the work to develop this test suite was done with Air Force
-- support. The Air Force and Bill Billowitch assume no
-- responsibilities for this software.
-- This file is part of VESTs (Vhdl tESTs).
-- VESTs is free software; you can redistribute it and/or modify it
-- under the terms of the GNU General Public License as published by the
-- Free Software Foundation; either version 2 of the License, or (at
-- your option) any later version.
-- VESTs is distributed in the hope that it will be useful, but WITHOUT
-- ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
-- FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License
-- for more details.
-- You should have received a copy of the GNU General Public License
-- along with VESTs; if not, write to the Free Software Foundation,
-- Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
-- ---------------------------------------------------------------------
--
-- $Id: tc407.vhd,v 1.2 2001-10-26 16:29:53 paw Exp $
-- $Revision: 1.2 $
--
-- ---------------------------------------------------------------------
ENTITY model IS
PORT
(
F1: OUT integer := 3;
F2: INOUT integer := 3;
F3: IN integer
);
END model;
architecture model of model is
begin
process
begin
wait for 1 ns;
assert F3= 3
report"wrong initialization of F3 through type conversion" severity failure;
assert F2 = 3
report"wrong initialization of F2 through type conversion" severity failure;
wait;
end process;
end;
ENTITY c03s02b01x01p19n01i00407ent IS
END c03s02b01x01p19n01i00407ent;
ARCHITECTURE c03s02b01x01p19n01i00407arch OF c03s02b01x01p19n01i00407ent IS
constant C1 : bit := '1';
function complex_scalar(s : bit) return integer is
begin
return 3;
end complex_scalar;
function scalar_complex(s : integer) return bit is
begin
return C1;
end scalar_complex;
component model1
PORT
(
F1: OUT integer;
F2: INOUT integer;
F3: IN integer
);
end component;
for T1 : model1 use entity work.model(model);
signal S1 : bit;
signal S2 : bit;
signal S3 : bit := C1;
BEGIN
T1: model1
port map (
scalar_complex(F1) => S1,
scalar_complex(F2) => complex_scalar(S2),
F3 => complex_scalar(S3)
);
TESTING: PROCESS
BEGIN
wait for 1 ns;
assert NOT((S1 = C1) and (S2 = C1))
report "***PASSED TEST: c03s02b01x01p19n01i00407"
severity NOTE;
assert ((S1 = C1) and (S2 = C1))
report "***FAILED TEST: c03s02b01x01p19n01i00407 - For an interface object of mode out, buffer, inout, or linkage, if the formal part includes a type conversion function, then the parameter subtype of that function must be a constrained array subtype."
severity ERROR;
wait;
END PROCESS TESTING;
END c03s02b01x01p19n01i00407arch;
|
-- Copyright (C) 2001 Bill Billowitch.
-- Some of the work to develop this test suite was done with Air Force
-- support. The Air Force and Bill Billowitch assume no
-- responsibilities for this software.
-- This file is part of VESTs (Vhdl tESTs).
-- VESTs is free software; you can redistribute it and/or modify it
-- under the terms of the GNU General Public License as published by the
-- Free Software Foundation; either version 2 of the License, or (at
-- your option) any later version.
-- VESTs is distributed in the hope that it will be useful, but WITHOUT
-- ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
-- FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License
-- for more details.
-- You should have received a copy of the GNU General Public License
-- along with VESTs; if not, write to the Free Software Foundation,
-- Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
-- ---------------------------------------------------------------------
--
-- $Id: tc407.vhd,v 1.2 2001-10-26 16:29:53 paw Exp $
-- $Revision: 1.2 $
--
-- ---------------------------------------------------------------------
ENTITY model IS
PORT
(
F1: OUT integer := 3;
F2: INOUT integer := 3;
F3: IN integer
);
END model;
architecture model of model is
begin
process
begin
wait for 1 ns;
assert F3= 3
report"wrong initialization of F3 through type conversion" severity failure;
assert F2 = 3
report"wrong initialization of F2 through type conversion" severity failure;
wait;
end process;
end;
ENTITY c03s02b01x01p19n01i00407ent IS
END c03s02b01x01p19n01i00407ent;
ARCHITECTURE c03s02b01x01p19n01i00407arch OF c03s02b01x01p19n01i00407ent IS
constant C1 : bit := '1';
function complex_scalar(s : bit) return integer is
begin
return 3;
end complex_scalar;
function scalar_complex(s : integer) return bit is
begin
return C1;
end scalar_complex;
component model1
PORT
(
F1: OUT integer;
F2: INOUT integer;
F3: IN integer
);
end component;
for T1 : model1 use entity work.model(model);
signal S1 : bit;
signal S2 : bit;
signal S3 : bit := C1;
BEGIN
T1: model1
port map (
scalar_complex(F1) => S1,
scalar_complex(F2) => complex_scalar(S2),
F3 => complex_scalar(S3)
);
TESTING: PROCESS
BEGIN
wait for 1 ns;
assert NOT((S1 = C1) and (S2 = C1))
report "***PASSED TEST: c03s02b01x01p19n01i00407"
severity NOTE;
assert ((S1 = C1) and (S2 = C1))
report "***FAILED TEST: c03s02b01x01p19n01i00407 - For an interface object of mode out, buffer, inout, or linkage, if the formal part includes a type conversion function, then the parameter subtype of that function must be a constrained array subtype."
severity ERROR;
wait;
END PROCESS TESTING;
END c03s02b01x01p19n01i00407arch;
|
-- EMACS settings: -*- tab-width: 2; indent-tabs-mode: t -*-
-- vim: tabstop=2:shiftwidth=2:noexpandtab
-- kate: tab-width 2; replace-tabs off; indent-width 2;
--
-- =============================================================================
-- Authors: Thomas B. Preusser
-- Martin Zabel
-- Patrick Lehmann
--
-- Package: Project specific configuration.
--
-- Description:
-- ------------------------------------
-- This file was created from template <PoCRoot>/src/common/my_config.template.vhdl.
--
--
-- License:
-- =============================================================================
-- Copyright 2007-2015 Technische Universitaet Dresden - Germany,
-- Chair for VLSI-Design, Diagnostics and Architecture
--
-- Licensed under the Apache License, Version 2.0 (the "License");
-- you may not use this file except in compliance with the License.
-- You may obtain a copy of the License at
--
-- http://www.apache.org/licenses/LICENSE-2.0
--
-- Unless required by applicable law or agreed to in writing, software
-- distributed under the License is distributed on an "AS IS" BASIS,
-- WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
-- See the License for the specific language governing permissions and
-- limitations under the License.
-- =============================================================================
library PoC;
package my_config is
-- Change these lines to setup configuration.
constant MY_BOARD : string := "KC705"; -- KC705 - Xilinx Kintex 7 reference design board: XC7K325T
constant MY_DEVICE : string := "None"; -- infer from MY_BOARD
-- For internal use only
constant MY_VERBOSE : boolean := FALSE;
end package;
|
-- EMACS settings: -*- tab-width: 2; indent-tabs-mode: t -*-
-- vim: tabstop=2:shiftwidth=2:noexpandtab
-- kate: tab-width 2; replace-tabs off; indent-width 2;
--
-- =============================================================================
-- Authors: Thomas B. Preusser
-- Martin Zabel
-- Patrick Lehmann
--
-- Package: Project specific configuration.
--
-- Description:
-- ------------------------------------
-- This file was created from template <PoCRoot>/src/common/my_config.template.vhdl.
--
--
-- License:
-- =============================================================================
-- Copyright 2007-2015 Technische Universitaet Dresden - Germany,
-- Chair for VLSI-Design, Diagnostics and Architecture
--
-- Licensed under the Apache License, Version 2.0 (the "License");
-- you may not use this file except in compliance with the License.
-- You may obtain a copy of the License at
--
-- http://www.apache.org/licenses/LICENSE-2.0
--
-- Unless required by applicable law or agreed to in writing, software
-- distributed under the License is distributed on an "AS IS" BASIS,
-- WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
-- See the License for the specific language governing permissions and
-- limitations under the License.
-- =============================================================================
library PoC;
package my_config is
-- Change these lines to setup configuration.
constant MY_BOARD : string := "KC705"; -- KC705 - Xilinx Kintex 7 reference design board: XC7K325T
constant MY_DEVICE : string := "None"; -- infer from MY_BOARD
-- For internal use only
constant MY_VERBOSE : boolean := FALSE;
end package;
|
-----------------------------------------------------------------------------
-- Filename: gh_Pulse_Generator.vhd
--
-- Description:
-- A Pulse Generator
--
-- Copyright (c) 2005, 2006 by George Huber
-- an OpenCores.org Project
-- free to use, but see documentation for conditions
--
-- Revision History:
-- Revision Date Author Comment
-- -------- ---------- --------- -----------
-- 1.0 09/24/05 S A Dodd Initial revision
-- 1.1 02/18/06 G Huber add gh_ to name
-- 1.2 03/09/06 S A Dodd fix typo's, add Period reload
-- if Period_count > Period
--
-----------------------------------------------------------------------------
library IEEE;
USE ieee.std_logic_1164.all;
USE ieee.std_logic_unsigned.all;
USE ieee.std_logic_arith.all;
entity gh_Pulse_Generator is
GENERIC(size_Period: INTEGER := 32);
port(
clk : in std_logic;
rst : in std_logic;
Period : in std_logic_vector (size_Period-1 downto 0);
Pulse_Width : in std_logic_vector (size_Period-1 downto 0);
ENABLE : in std_logic;
Pulse : out std_logic
);
end entity;
architecture a of gh_Pulse_Generator is
COMPONENT gh_counter_down_ce_ld is
GENERIC (size: INTEGER :=32);
PORT(
CLK : IN STD_LOGIC;
rst : IN STD_LOGIC;
LOAD : IN STD_LOGIC;
CE : IN STD_LOGIC;
D : IN STD_LOGIC_VECTOR(size-1 DOWNTO 0);
Q : OUT STD_LOGIC_VECTOR(size-1 DOWNTO 0)
);
END COMPONENT;
signal trigger : std_logic;
signal LD_Period : std_logic;
signal Period_Count : std_logic_vector(size_Period-1 downto 0);
signal Width_Count : std_logic_vector(size_Period-1 downto 0);
signal Period_cmp : std_logic_vector(size_Period-1 downto 0);
signal Width_cmp : std_logic_vector(size_Period-1 downto 0);
signal LD_width : std_logic;
signal E_width : std_logic;
begin
-- constant compare values -----------------------------------
Period_cmp(size_Period-1 downto 1) <= (others =>'0');
Period_cmp(0) <= '1';
Width_cmp <= (others => '0');
---------------------------------------------------------------
U1 : gh_counter_down_ce_ld
Generic Map(size_Period)
PORT MAP(
clk => clk,
rst => rst,
LOAD => LD_Period,
CE => ENABLE,
D => Period,
Q => Period_Count
);
LD_Period <= trigger or (not ENABLE);
trigger <= '1' when (Period_Count > Period) else
'1' when (Period_Count = Period_cmp) else
'0';
-----------------------------------------------------------
U2 : gh_counter_down_ce_ld
Generic Map(size_Period)
PORT MAP(
clk => clk,
rst => rst,
LOAD => LD_width,
CE => E_width,
D => Pulse_Width,
Q => Width_Count
);
LD_width <= trigger;
E_width <= '0' when (Width_Count = Width_cmp) else
'1';
Pulse <= E_width;
end a;
|
library verilog;
use verilog.vl_types.all;
entity select3_8 is
port(
in1 : in vl_logic_vector(7 downto 0);
in2 : in vl_logic_vector(7 downto 0);
in3 : in vl_logic_vector(7 downto 0);
choose : in vl_logic_vector(1 downto 0);
\out\ : out vl_logic_vector(7 downto 0)
);
end select3_8;
|
----------------------------------------------------------------------------------
-- Company: CPE233
-- Engineer: Justin Nguyen, Quinn Mikelson
--
-- Create Date: 20:59:29 02/04/2013
-- Design Name:
-- Module Name: RAT_CPU - Behavioral
-- Project Name: RAT MCU
-- Target Devices:
-- Tool versions:
-- Description: This is the control unit of the RAT MCU.
--
-- Dependencies:
--
-- Revision:
-- Revision 0.01 - File Created
-- Additional Comments:
--
----------------------------------------------------------------------------------
library IEEE;
use IEEE.STD_LOGIC_1164.ALL;
use IEEE.NUMERIC_STD.ALL;
entity ControlUnit is
Port (
CLK : in STD_LOGIC;
C : in STD_LOGIC;
Z : in STD_LOGIC;
INT : in STD_LOGIC;
RST : in STD_LOGIC;
OPCODE_HI_5 : in STD_LOGIC_VECTOR (4 downto 0);
OPCODE_LO_2 : in STD_LOGIC_VECTOR (1 downto 0);
PC_LD : out STD_LOGIC;
PC_INC : out STD_LOGIC;
PC_RESET : out STD_LOGIC;
PC_OE : out STD_LOGIC;
PC_MUX_SEL : out STD_LOGIC_VECTOR (1 downto 0);
SP_LD : out STD_LOGIC;
SP_MUX_SEL : out STD_LOGIC_VECTOR (1 downto 0);
SP_RESET : out STD_LOGIC;
RF_WR : out STD_LOGIC;
RF_WR_SEL : out STD_LOGIC_VECTOR (1 downto 0);
RF_OE : out STD_LOGIC;
REG_IMMED_SEL : out STD_LOGIC;
ALU_SEL : out STD_LOGIC_VECTOR (3 downto 0);
ALU_OPY_SEL : out STD_LOGIC;
SCR_WR : out STD_LOGIC;
SCR_OE : out STD_LOGIC;
SCR_ADDR_SEL : out STD_LOGIC_VECTOR (1 downto 0);
C_FLAG_SEL : out STD_LOGIC;
C_FLAG_LD : out STD_LOGIC;
C_FLAG_SET : out STD_LOGIC;
C_FLAG_CLR : out STD_LOGIC;
SHAD_C_LD : out STD_LOGIC;
Z_FLAG_SEL : out STD_LOGIC;
Z_FLAG_LD : out STD_LOGIC;
Z_FLAG_SET : out STD_LOGIC;
Z_FLAG_CLR : out STD_LOGIC;
SHAD_Z_LD : out STD_LOGIC;
I_FLAG_SET : out STD_LOGIC;
I_FLAG_CLR : out STD_LOGIC;
IO_OE : out STD_LOGIC);
end ControlUnit;
architecture Behavioral of ControlUnit is
-- State machine signals
type state_type is (ST_init, ST_fet, ST_exec, ST_int);
signal PS,NS : state_type;
-- Opcode
signal sig_OPCODE_7: std_logic_vector (6 downto 0);
begin
-- Assign next state
sync_p: process (CLK, NS, RST)
begin
if (RST = '1') then
PS <= ST_init;
elsif (rising_edge(CLK)) then
PS <= NS;
end if;
end process sync_p;
-- Translate instruction to signals
comb_p: process (OPCODE_HI_5, OPCODE_LO_2, sig_OPCODE_7, C, Z, PS, NS, INT) begin
sig_OPCODE_7 <= OPCODE_HI_5 & OPCODE_LO_2;
case PS is
-- STATE: the init cycle ------------------------------------
when ST_init =>
NS <= ST_fet;
-- Initialize all control outputs to non-active states and reset the PC and SP to all zeros.
PC_LD <= '1'; PC_MUX_SEL <= "00"; PC_RESET <= '1'; PC_OE <= '0'; PC_INC <= '0';
SP_LD <= '0'; SP_MUX_SEL <= "00"; SP_RESET <= '1';
RF_WR <= '0'; RF_WR_SEL <= "00"; RF_OE <= '0';
REG_IMMED_SEL <= '0'; ALU_SEL <= "0000";
SCR_WR <= '0'; SCR_OE <= '0'; SCR_ADDR_SEL <= "00";
C_FLAG_SEL <= '0'; C_FLAG_LD <= '0'; C_FLAG_SET <= '0'; C_FLAG_CLR <= '0'; SHAD_C_LD <= '0';
Z_FLAG_SEL <= '0'; Z_FLAG_LD <= '0'; Z_FLAG_SET <= '0'; Z_FLAG_CLR <= '0'; SHAD_Z_LD <= '0';
I_FLAG_SET <= '0'; I_FLAG_CLR <= '0'; IO_OE <= '0';
--WRITE_STROBE <= '0'; READ_STROBE <= '0';
-- STATE: the fetch cycle -----------------------------------
when ST_fet =>
NS <= ST_exec;
PC_LD <= '0'; PC_MUX_SEL <= "00"; PC_RESET <= '0'; PC_OE <= '0'; PC_INC <= '1';
SP_LD <= '0'; SP_MUX_SEL <= "00"; SP_RESET <= '0';
RF_WR <= '0'; RF_WR_SEL <= "00"; RF_OE <= '0';
REG_IMMED_SEL <= '0'; ALU_SEL <= "0000";
SCR_WR <= '0'; SCR_OE <= '0'; SCR_ADDR_SEL <= "00";
C_FLAG_SEL <= '0'; C_FLAG_LD <= '0'; C_FLAG_SET <= '0'; C_FLAG_CLR <= '0'; SHAD_C_LD <= '0';
Z_FLAG_SEL <= '0'; Z_FLAG_LD <= '0'; Z_FLAG_SET <= '0'; Z_FLAG_CLR <= '0'; SHAD_Z_LD <= '0';
I_FLAG_SET <= '0'; I_FLAG_CLR <= '0'; IO_OE <= '0';
--WRITE_STROBE <= '0'; READ_STROBE <= '0';
-- STATE: the execute cycle ---------------------------------
when ST_exec =>
if (INT = '1') then
NS <= ST_int;
else
NS <= ST_fet;
end if;
-- Repeat the default block for all variables here, noting that any output values desired to be different
-- from init values shown below will be assigned in the following case statements for each opcode.
PC_LD <= '0'; PC_MUX_SEL <= "00"; PC_RESET <= '0'; PC_OE <= '0'; PC_INC <= '0';
SP_LD <= '0'; SP_MUX_SEL <= "00"; SP_RESET <= '0';
RF_WR <= '0'; RF_WR_SEL <= "00"; RF_OE <= '0';
REG_IMMED_SEL <= '0'; ALU_SEL <= "0000"; ALU_OPY_SEL <= '0';
SCR_WR <= '0'; SCR_OE <= '0'; SCR_ADDR_SEL <= "00";
C_FLAG_SEL <= '0'; C_FLAG_LD <= '0'; C_FLAG_SET <= '0'; C_FLAG_CLR <= '0'; SHAD_C_LD <= '0';
Z_FLAG_SEL <= '0'; Z_FLAG_LD <= '0'; Z_FLAG_SET <= '0'; Z_FLAG_CLR <= '0'; SHAD_Z_LD <= '0';
I_FLAG_SET <= '0'; I_FLAG_CLR <= '0'; IO_OE <= '0';
--WRITE_STROBE <= '0'; READ_STROBE <= '0';
if (sig_OPCODE_7 = "0010000") then -- BRN
PC_LD <= '1';
elsif (sig_OPCODE_7 = "0000010") then -- EXOR reg-reg
RF_WR <= '1';
RF_OE <= '1';
ALU_SEL <= "0111";
C_FLAG_LD <= '1';
Z_FLAG_LD <= '1';
elsif (OPCODE_HI_5 = "10010" ) then -- EXOR reg-immed
RF_WR <= '1';
RF_OE <= '1';
ALU_SEL <= "0111";
ALU_OPY_SEL <= '1';
C_FLAG_LD <= '1';
Z_FLAG_LD <= '1';
elsif (OPCODE_HI_5 = "11001" ) then -- IN
RF_WR <= '1';
RF_WR_SEL <= "11";
elsif (sig_OPCODE_7 = "0001001") then -- MOV reg-reg
RF_WR <= '1';
ALU_SEL <= "1110";
elsif (OPCODE_HI_5 = "11011" ) then -- MOV reg-immed
RF_WR <= '1';
ALU_SEL <= "1110";
ALU_OPY_SEL <= '1';
elsif (OPCODE_HI_5 = "11010" ) then -- OUT
RF_OE <= '1';
IO_OE <= '1';
else
-- repeat the default block here to avoid incompletely specified outputs and hence avoid
-- the problem of inadvertently created latches within the synthesized system.
PC_LD <= '0'; PC_MUX_SEL <= "00"; PC_RESET <= '0'; PC_OE <= '0'; PC_INC <= '0';
SP_LD <= '0'; SP_MUX_SEL <= "00"; SP_RESET <= '0';
RF_WR <= '0'; RF_WR_SEL <= "00"; RF_OE <= '0';
REG_IMMED_SEL <= '0'; ALU_SEL <= "0000";
SCR_WR <= '0'; SCR_OE <= '0'; SCR_ADDR_SEL <= "00";
C_FLAG_SEL <= '0'; C_FLAG_LD <= '0'; C_FLAG_SET <= '0'; C_FLAG_CLR <= '0'; SHAD_C_LD <= '0';
Z_FLAG_SEL <= '0'; Z_FLAG_LD <= '0'; Z_FLAG_SET <= '0'; Z_FLAG_CLR <= '0'; SHAD_Z_LD <= '0';
I_FLAG_SET <= '0'; I_FLAG_CLR <= '0'; IO_OE <= '0';
--WRITE_STROBE <= '0'; READ_STROBE <= '0';
end if;
when ST_int =>
NS <= ST_fet;
-- Repeat the default block for all variables here, noting that any output values desired to be different
-- from init values shown below will be assigned in the following case statements for each opcode.
PC_LD <= '1'; PC_MUX_SEL <= "10"; PC_RESET <= '0'; PC_OE <= '1'; PC_INC <= '0';
SP_LD <= '1'; SP_MUX_SEL <= "10"; SP_RESET <= '0';
RF_WR <= '0'; RF_WR_SEL <= "00"; RF_OE <= '0';
REG_IMMED_SEL <= '0'; ALU_SEL <= "0000";
SCR_WR <= '1'; SCR_OE <= '0'; SCR_ADDR_SEL <= "11";
C_FLAG_SEL <= '0'; C_FLAG_LD <= '0'; C_FLAG_SET <= '0'; C_FLAG_CLR <= '0'; SHAD_C_LD <= '0';
Z_FLAG_SEL <= '0'; Z_FLAG_LD <= '0'; Z_FLAG_SET <= '0'; Z_FLAG_CLR <= '0'; SHAD_Z_LD <= '0';
I_FLAG_SET <= '0'; I_FLAG_CLR <= '1'; IO_OE <= '0';
when others =>
NS <= ST_fet;
-- repeat the default block here to avoid incompletely specified outputs and hence avoid
-- the problem of inadvertently created latches within the synthesized system.
PC_LD <= '0'; PC_MUX_SEL <= "00"; PC_RESET <= '0'; PC_OE <= '0'; PC_INC <= '0';
SP_LD <= '0'; SP_MUX_SEL <= "00"; SP_RESET <= '0';
RF_WR <= '0'; RF_WR_SEL <= "00"; RF_OE <= '0';
REG_IMMED_SEL <= '0'; ALU_SEL <= "0000";
SCR_WR <= '0'; SCR_OE <= '0'; SCR_ADDR_SEL <= "00";
C_FLAG_SEL <= '0'; C_FLAG_LD <= '0'; C_FLAG_SET <= '0'; C_FLAG_CLR <= '0'; SHAD_C_LD <= '0';
Z_FLAG_SEL <= '0'; Z_FLAG_LD <= '0'; Z_FLAG_SET <= '0'; Z_FLAG_CLR <= '0'; SHAD_Z_LD <= '0';
I_FLAG_SET <= '0'; I_FLAG_CLR <= '0'; IO_OE <= '0';
--WRITE_STROBE <= '0'; READ_STROBE <= '0';
end case;
end process comb_p;
end Behavioral; |
package STRSYN is
attribute SigDir : string;
attribute SigType : string;
attribute SigBias : string;
end STRSYN;
entity op is
port (
terminal in1: electrical;
terminal in2: electrical;
terminal out1: electrical;
terminal vbias1: electrical;
terminal vdd: electrical;
terminal gnd: electrical;
terminal vbias2: electrical;
terminal vbias3: electrical;
terminal vbias4: electrical);
end op;
architecture simple of op is
-- Attributes for Ports
attribute SigDir of in1:terminal is "input";
attribute SigType of in1:terminal is "voltage";
attribute SigDir of in2:terminal is "input";
attribute SigType of in2:terminal is "voltage";
attribute SigDir of out1:terminal is "output";
attribute SigType of out1:terminal is "voltage";
attribute SigDir of vbias1:terminal is "reference";
attribute SigType of vbias1:terminal is "voltage";
attribute SigDir of vdd:terminal is "reference";
attribute SigType of vdd:terminal is "current";
attribute SigBias of vdd:terminal is "positive";
attribute SigDir of gnd:terminal is "reference";
attribute SigType of gnd:terminal is "current";
attribute SigBias of gnd:terminal is "negative";
attribute SigDir of vbias2:terminal is "reference";
attribute SigType of vbias2:terminal is "voltage";
attribute SigDir of vbias3:terminal is "reference";
attribute SigType of vbias3:terminal is "voltage";
attribute SigDir of vbias4:terminal is "reference";
attribute SigType of vbias4:terminal is "voltage";
terminal net1: electrical;
terminal net2: electrical;
terminal net3: electrical;
terminal net4: electrical;
terminal net5: electrical;
begin
subnet0_subnet0_m1 : entity pmos(behave)
generic map(
L => Ldiff_0,
W => Wdiff_0,
scope => private
)
port map(
D => net2,
G => in1,
S => net4
);
subnet0_subnet0_m2 : entity pmos(behave)
generic map(
L => Ldiff_0,
W => Wdiff_0,
scope => private
)
port map(
D => net1,
G => in2,
S => net4
);
subnet0_subnet0_m3 : entity pmos(behave)
generic map(
L => LBias,
W => W_0
)
port map(
D => net4,
G => vbias1,
S => vdd
);
subnet0_subnet1_m1 : entity nmos(behave)
generic map(
L => Lcm_2,
W => Wcm_2,
scope => private,
symmetry_scope => sym_1
)
port map(
D => net1,
G => net1,
S => gnd
);
subnet0_subnet1_m2 : entity nmos(behave)
generic map(
L => Lcm_2,
W => Wcmcout_2,
scope => private,
symmetry_scope => sym_1
)
port map(
D => net3,
G => net1,
S => gnd
);
subnet0_subnet2_m1 : entity nmos(behave)
generic map(
L => Lcm_2,
W => Wcm_2,
scope => private,
symmetry_scope => sym_1
)
port map(
D => net2,
G => net2,
S => gnd
);
subnet0_subnet2_m2 : entity nmos(behave)
generic map(
L => Lcm_2,
W => Wcmcout_2,
scope => private,
symmetry_scope => sym_1
)
port map(
D => out1,
G => net2,
S => gnd
);
subnet0_subnet3_m1 : entity pmos(behave)
generic map(
L => Lcm_1,
W => Wcm_1,
scope => private
)
port map(
D => net3,
G => net3,
S => vdd
);
subnet0_subnet3_m2 : entity pmos(behave)
generic map(
L => Lcm_1,
W => Wcmout_1,
scope => private
)
port map(
D => out1,
G => net3,
S => vdd
);
subnet0_subnet3_c1 : entity cap(behave)
generic map(
C => Ccurmir_1,
scope => private
)
port map(
P => out1,
N => net3
);
subnet1_subnet0_m1 : entity pmos(behave)
generic map(
L => LBias,
W => (pfak)*(WBias)
)
port map(
D => vbias1,
G => vbias1,
S => vdd
);
subnet1_subnet0_m2 : entity pmos(behave)
generic map(
L => (pfak)*(LBias),
W => (pfak)*(WBias)
)
port map(
D => vbias2,
G => vbias2,
S => vbias1
);
subnet1_subnet0_i1 : entity idc(behave)
generic map(
I => 1.145e-05
)
port map(
P => vdd,
N => vbias3
);
subnet1_subnet0_m3 : entity nmos(behave)
generic map(
L => (pfak)*(LBias),
W => WBias
)
port map(
D => vbias3,
G => vbias3,
S => vbias4
);
subnet1_subnet0_m4 : entity nmos(behave)
generic map(
L => LBias,
W => WBias
)
port map(
D => vbias2,
G => vbias3,
S => net5
);
subnet1_subnet0_m5 : entity nmos(behave)
generic map(
L => LBias,
W => WBias
)
port map(
D => vbias4,
G => vbias4,
S => gnd
);
subnet1_subnet0_m6 : entity nmos(behave)
generic map(
L => LBias,
W => WBias
)
port map(
D => net5,
G => vbias4,
S => gnd
);
end simple;
|
--============================================================================--
-- Design unit : AMBA (Package declaration)
--
-- File name : amba.vhd
--
-- Purpose : This package declares types to be used with the
-- Advanced Microcontroller Bus Architecture (AMBA).
--
-- Reference : AMBA(TM) Specification (Rev 2.0), ARM IHI 0011A,
-- 13th May 1999, issue A, first release, ARM Limited
--
-- The document can be retrieved from http://www.arm.com
--
-- AMBA is a trademark of ARM Limited.
-- ARM is a registered trademark of ARM Limited.
--
-- Note : Naming convention according to AMBA(TM) Specification:
-- Signal names are in upper case, except for the following:
-- A lower case n in the name indicates that the signal is
-- active low. A lower case x in the name suffix indicates that
-- the signal is unique to a module. Constant names are in upper
-- case.
--
-- The least significant bit of an array is located to the right,
-- carrying the index number zero.
--
-- Library : AMBA_Lib {recommended}
--
-- Author : European Space Agency (ESA)
-- P.O. Box 299
-- NL-2200 AG Noordwijk ZH
-- The Netherlands
--
-- Contact : mailto:microelectronics@estec.esa.nl
-- http://www.estec.esa.nl/microelectronics
--
-- Copyright (C): European Space Agency (ESA) 2000. This source code may be
-- redistributed provided that the source code and this notice
-- remain intact. This source code may not under any
-- circumstances be resold or redistributed for compensation
-- of any kind without prior written permission.
--
-- Disclaimer : All information is provided "as is", there is no warranty that
-- the information is correct or suitable for any purpose,
-- neither implicit nor explicit. This information does not
-- necessarily reflect the policy of the European Space Agency.
--------------------------------------------------------------------------------
-- Version Author Date Changes
--
-- 0.2 ESA 5 Jul 2000 Package created
-- 0.3 ESA 10 Jul 2000 Additional HREADY slave input,
-- Std_ULogic usage for non-array signals,
-- Additional comments on casing and addressing
-- 0.4 ESA 14 Jul 2000 HRESETn removed from AHB Slave input record
-- Additional comments on clocking and reset
-- Additional comments on AHB endianness
-- Additional comments on APB addressing
-- 0.5 ESA 18 Jul 2000 Re-defined vector types for AHB arbiter
-- and APB master
--------------------------------------------------------------------------------
library IEEE;
use IEEE.Std_Logic_1164.all;
package AMBA is
-----------------------------------------------------------------------------
-- Definitions for AMBA(TM) Advanced High-performance Bus (AHB)
-----------------------------------------------------------------------------
-- Records are defined for the input and output of an AHB Master, as well as
-- for an AHB Slave. These records are grouped in arrays, for scalability,
-- and new records using these arrays are defined for the input and output of
-- an AHB Arbiter/Decoder.
--
-- The routing of the clock and reset signals defined in the AMBA(TM)
-- Specification is not covered in this package, since being dependent on
-- the clock and reset conventions defined at system level.
--
-- The HCLK and HRESETn signals are routed separately:
-- HCLK: Std_ULogic; -- rising edge
-- HRESETn: Std_ULogic; -- active low reset
--
-- The address bus HADDR contains byte addresses. The relation between the
-- byte address and the n-byte data bus HDATA can either be little-endian or
-- big-endian according to the AMBA(TM) Specification.
--
-- It is recommended that only big-endian modules are implemented using
-- this package.
--
-----------------------------------------------------------------------------
-- Constant definitions for AMBA(TM) AHB
-----------------------------------------------------------------------------
constant HDMAX: Positive range 32 to 1024 := 32; -- data width
constant HAMAX: Positive range 32 to 32 := 32; -- address width
-- constant HMMAX: Positive range 1 to 16 := 16; -- number of masters
-- constant HSMAX: Positive := 16; -- number of slaves
-----------------------------------------------------------------------------
-- Definitions for AMBA(TM) AHB Masters
-----------------------------------------------------------------------------
-- AHB master inputs (HCLK and HRESETn routed separately)
type AHB_Mst_In_Type is
record
HGRANT: Std_ULogic; -- bus grant
HREADY: Std_ULogic; -- transfer done
HRESP: Std_Logic_Vector(1 downto 0); -- response type
HRDATA: Std_Logic_Vector(HDMAX-1 downto 0); -- read data bus
end record;
-- AHB master outputs
type AHB_Mst_Out_Type is
record
HBUSREQ: Std_ULogic; -- bus request
HLOCK: Std_ULogic; -- lock request
HTRANS: Std_Logic_Vector(1 downto 0); -- transfer type
HADDR: Std_Logic_Vector(HAMAX-1 downto 0); -- address bus (byte)
HWRITE: Std_ULogic; -- read/write
HSIZE: Std_Logic_Vector(2 downto 0); -- transfer size
HBURST: Std_Logic_Vector(2 downto 0); -- burst type
HPROT: Std_Logic_Vector(3 downto 0); -- protection control
HWDATA: Std_Logic_Vector(HDMAX-1 downto 0); -- write data bus
end record;
-----------------------------------------------------------------------------
-- Definitions for AMBA(TM) AHB Slaves
-----------------------------------------------------------------------------
-- AHB slave inputs (HCLK and HRESETn routed separately)
type AHB_Slv_In_Type is
record
HSEL: Std_Logic; -- slave select
HADDR: Std_Logic_Vector(HAMAX-1 downto 0); -- address bus (byte)
HWRITE: Std_Logic; -- read/write
HTRANS: Std_Logic_Vector(1 downto 0); -- transfer type
HSIZE: Std_Logic_Vector(2 downto 0); -- transfer size
HBURST: Std_Logic_Vector(2 downto 0); -- burst type
HWDATA: Std_Logic_Vector(HDMAX-1 downto 0); -- write data bus
HPROT: Std_Logic_Vector(3 downto 0); -- protection control
HREADY: Std_Logic; -- transfer done
HMASTER: Std_Logic_Vector(3 downto 0); -- current master
HMASTLOCK: Std_Logic; -- locked access
end record;
-- AHB slave outputs
type AHB_Slv_Out_Type is
record
HREADY: Std_Logic; -- transfer done
HRESP: Std_Logic_Vector(1 downto 0); -- response type
HRDATA: Std_Logic_Vector(HDMAX-1 downto 0); -- read data bus
HSPLIT: Std_Logic_Vector(15 downto 0); -- split completion
end record;
-----------------------------------------------------------------------------
-- Definitions for AMBA(TM) AHB Arbiter/Decoder
-----------------------------------------------------------------------------
-- supporting array types
type AHB_Mst_In_Vector is array (Natural Range <> ) of AHB_Mst_In_Type;
type AHB_Mst_Out_Vector is array (Natural Range <> ) of AHB_Mst_Out_Type;
type AHB_Slv_In_Vector is array (Natural Range <> ) of AHB_Slv_In_Type;
type AHB_Slv_Out_Vector is array (Natural Range <> ) of AHB_Slv_Out_Type;
-- An AHB arbiter could be defined as follows:
-- entity AHBarbiter is
-- generic (
-- masters : integer := 2; -- number of masters
-- slaves : integer := 2; -- number of slaves
-- );
-- port (
-- clk : in std_ulogic;
-- rst : in std_ulogic;
-- msti : out ahb_mst_in_vector(0 to masters-1);
-- msto : in ahb_mst_out_vector(0 to masters-1);
-- slvi : out ahb_slv_in_vector(0 to slaves-1);
-- slvo : in ahb_slv_out_vector(0 to slaves-1)
-- );
-- end;
-----------------------------------------------------------------------------
-- Auxiliary constant definitions for AMBA(TM) AHB
-----------------------------------------------------------------------------
-- constants for HTRANS (transition type, slave output)
constant HTRANS_IDLE: Std_Logic_Vector(1 downto 0) := "00";
constant HTRANS_BUSY: Std_Logic_Vector(1 downto 0) := "01";
constant HTRANS_NONSEQ: Std_Logic_Vector(1 downto 0) := "10";
constant HTRANS_SEQ: Std_Logic_Vector(1 downto 0) := "11";
-- constants for HBURST (burst type, master output)
constant HBURST_SINGLE: Std_Logic_Vector(2 downto 0) := "000";
constant HBURST_INCR: Std_Logic_Vector(2 downto 0) := "001";
constant HBURST_WRAP4: Std_Logic_Vector(2 downto 0) := "010";
constant HBURST_INCR4: Std_Logic_Vector(2 downto 0) := "011";
constant HBURST_WRAP8: Std_Logic_Vector(2 downto 0) := "100";
constant HBURST_INCR8: Std_Logic_Vector(2 downto 0) := "101";
constant HBURST_WRAP16: Std_Logic_Vector(2 downto 0) := "110";
constant HBURST_INCR16: Std_Logic_Vector(2 downto 0) := "111";
-- constants for HSIZE (transfer size, master output)
constant HSIZE_BYTE: Std_Logic_Vector(2 downto 0) := "000";
constant HSIZE_HWORD: Std_Logic_Vector(2 downto 0) := "001";
constant HSIZE_WORD: Std_Logic_Vector(2 downto 0) := "010";
constant HSIZE_DWORD: Std_Logic_Vector(2 downto 0) := "011";
constant HSIZE_4WORD: Std_Logic_Vector(2 downto 0) := "100";
constant HSIZE_8WORD: Std_Logic_Vector(2 downto 0) := "101";
constant HSIZE_16WORD: Std_Logic_Vector(2 downto 0) := "110";
constant HSIZE_32WORD: Std_Logic_Vector(2 downto 0) := "111";
-- constants for HRESP (response, slave output)
constant HRESP_OKAY: Std_Logic_Vector(1 downto 0) := "00";
constant HRESP_ERROR: Std_Logic_Vector(1 downto 0) := "01";
constant HRESP_RETRY: Std_Logic_Vector(1 downto 0) := "10";
constant HRESP_SPLIT: Std_Logic_Vector(1 downto 0) := "11";
-----------------------------------------------------------------------------
-- Definitions for AMBA(TM) Advanced Peripheral Bus (APB)
-----------------------------------------------------------------------------
-- Records are defined for the input and output of an APB Slave. These
-- records are grouped in arrays, for scalability, and new records using
-- these arrays are defined for the input and output of an APB Bridge.
--
-- The routing of the clock and reset signals defined in the AMBA(TM)
-- Specification is not covered in this package, since being dependent on
-- the clock and reset conventions defined at system level.
--
-- The PCLK and PRESETn signals are routed separately:
-- PCLK: Std_ULogic; -- rising edge
-- PRESETn: Std_ULogic; -- active low reset
--
-- The characteristics of the address bus PADDR are undefined in the
-- AMBA(TM) Specification.
--
-- When implementing modules with this package, it is recommended that the
-- information on the address bus PADDR is interpreted as byte addresses, but
-- it should only be used for 32-bit word addressing, i.e. the value of
-- address bits 0 and 1 should always be logical 0. For modules not
-- supporting full 32-bit words on the data bus PDATA, e.g. only supporting
-- 16-bit halfwords or 8-bit bytes, the addressing will still be word based.
-- Consequently, one halfword or byte will be accessed for each word address.
-- Modules only supporting byte sized data should exchange data on bit 7 to 0
-- on the PDATA data bus. Modules only supporting halfword sized data should
-- exchange data on bit 15 to 0 on the PDATA data bus. Modules supporting
-- word sized data should exchange data on bit 31 to 0 on the PDATA data bus.
--
-----------------------------------------------------------------------------
-- Constant definitions for AMBA(TM) APB
-----------------------------------------------------------------------------
constant PDMAX: Positive range 8 to 32 := 32; -- data width
constant PAMAX: Positive range 8 to 32 := 32; -- address width
-----------------------------------------------------------------------------
-- Definitions for AMBA(TM) APB Slaves
-----------------------------------------------------------------------------
-- APB slave inputs (PCLK and PRESETn routed separately)
type APB_Slv_In_Type is
record
PSEL: Std_ULogic; -- slave select
PENABLE: Std_ULogic; -- strobe
PADDR: Std_Logic_Vector(PAMAX-1 downto 0); -- address bus (byte)
PWRITE: Std_ULogic; -- write
PWDATA: Std_Logic_Vector(PDMAX-1 downto 0); -- write data bus
end record;
-- APB slave outputs
type APB_Slv_Out_Type is
record
PRDATA: Std_Logic_Vector(PDMAX-1 downto 0); -- read data bus
end record;
-----------------------------------------------------------------------------
-- Definitions for AMBA(TM) APB Bridge
-----------------------------------------------------------------------------
-- supporting array types
type APB_Slv_In_Vector is array (Natural Range <> ) of APB_Slv_In_Type;
type APB_Slv_Out_Vector is array (Natural Range <> ) of APB_Slv_Out_Type;
-- An AHB/APB bridge could be defined as follows:
-- entity apbmst is
-- generic (slaves : natural := 32);
-- port (
-- clk : in std_ulogic;
-- rst : in std_ulogic;
-- ahbi : in ahb_slv_in_type;
-- ahbo : out ahb_slv_out_type;
-- apbi : in apb_slv_out_vector(0 to slaves-1);
-- apbo : out apb_slv_in_vector(0 to slaves-1)
-- );
-- end;
end AMBA; --==================================================================-- |
library ieee;
use ieee.std_logic_1164.all;
entity dff09 is
port (q : out std_logic_vector(3 downto 0);
d : std_logic_vector(3 downto 0);
clk : std_logic;
rst : std_logic);
end dff09;
architecture behav of dff09 is
begin
process (clk, rst) is
begin
if rst = '1' then
for i in q'range loop
q(i) <= '0';
end loop;
-- q <= x"0";
elsif rising_edge (clk) then
q <= d;
end if;
end process;
end behav;
|
--------------------------------------------------------------------------------
-- Create Date: 13:28:56 05/02/2017
-- Module Name: C:/Users/vinic/Documents/GitHub/SD/BANCADA_TesteBench.vhd
--------------------------------------------------------------------------------
LIBRARY ieee;
USE ieee.std_logic_1164.ALL;
ENTITY BANCADA_TesteBench IS
END BANCADA_TesteBench;
ARCHITECTURE behavior OF BANCADA_TesteBench IS
-- Component Declaration for the Unit Under Test (UUT)
COMPONENT BANCADA_TESTE
PORT(
Controle : IN std_logic_vector(2 downto 0);
clockFPGA : IN std_logic;
LedSaida : OUT std_logic_vector(7 downto 0)
);
END COMPONENT;
-- 0 component Divisor de Clocks é chamado para ditar o tempo em que as entradas
-- são geradas e tamhém o tempo que cada um dos operandos e que o resultado são impressos nos LEDs adequados.
component DivisorDeClock is
port(clockIn: in std_LOGIC ;
counter : buffer integer;
clockOut : out std_LOGIC );
end component;
-- O componente Gerador de entrada é chamado para gerar as entradas conforme o sinal de clock que é recebido
-- são gerados vetores de 8 bits de 0000 0000 até 1111 1111, onde será assumido que os 4 bits mais significativos
-- representam o vetor A e os 4 bits menos significativos representam o vetor B. Dessa forma, podemos mapear todas as
-- possíveis entradas de 4 bits.
component GeradorDeEntradas is
Port ( Saida : buffer STD_LOGIC_VECTOR (7 downto 0);
clock : in STD_LOGIC );
end component;
component ULA_MODUL0 is
port ( A: in STD_LOGIC_VECTOR (3 downto 0); -- EntradaA
B: in STD_LOGIC_VECTOR (3 downto 0); -- EntradaB
Controle : in STD_LOGIC_VECTOR (2 downto 0); -- Vetor de Controle(S2S1S0)
Z: out STD_LOGIC_VECTOR(7 downto 0) -- Saída
);
end component;
--Inputs
signal Controle : std_logic_vector(2 downto 0) := (others => '0');
signal clockFPGA : std_logic := '0';
--Outputs
signal LedSaida : std_logic_vector(7 downto 0);
-- Clock period definitions
constant clockFPGA_period : time := 20 ns;
BEGIN
-- Instantiate the Unit Under Test (UUT)
uut: BANCADA_TESTE PORT MAP (
Controle => Controle,
clockFPGA => clockFPGA,
LedSaida => LedSaida
);
-- Clock process definitions
clockFPGA_process :process
begin
clockFPGA <= '0';
wait for clockFPGA_period/2;
clockFPGA <= '1';
wait for clockFPGA_period/2;
end process;
-- Stimulus process
stim_proc: process
begin
-- hold reset state for 100 ns.
wait for 100 ns;
wait for clockFPGA_period*10;
-- insert stimulus here
wait;
end process;
END;
|
-------------------------------------------------------------------------------
--
-- SD/MMC Bootloader
--
-- $Id: tb_elem-sd-c.vhd,v 1.1 2005/02/08 21:09:20 arniml Exp $
--
-------------------------------------------------------------------------------
configuration tb_elem_behav_sd of tb_elem is
for behav
for dut_b : chip
use configuration work.chip_sd_c0;
end for;
for card_b : card
use configuration work.card_behav_c0;
end for;
end for;
end tb_elem_behav_sd;
|
library ieee;
use ieee.std_logic_1164.all;
library ieee;
use ieee.numeric_std.all;
entity add_175 is
port (
result : out std_logic_vector(26 downto 0);
in_a : in std_logic_vector(26 downto 0);
in_b : in std_logic_vector(26 downto 0)
);
end add_175;
architecture augh of add_175 is
signal carry_inA : std_logic_vector(28 downto 0);
signal carry_inB : std_logic_vector(28 downto 0);
signal carry_res : std_logic_vector(28 downto 0);
begin
-- To handle the CI input, the operation is '1' + CI
-- If CI is not present, the operation is '1' + '0'
carry_inA <= '0' & in_a & '1';
carry_inB <= '0' & in_b & '0';
-- Compute the result
carry_res <= std_logic_vector(unsigned(carry_inA) + unsigned(carry_inB));
-- Set the outputs
result <= carry_res(27 downto 1);
end architecture;
|
library ieee;
use ieee.std_logic_1164.all;
library ieee;
use ieee.numeric_std.all;
entity add_175 is
port (
result : out std_logic_vector(26 downto 0);
in_a : in std_logic_vector(26 downto 0);
in_b : in std_logic_vector(26 downto 0)
);
end add_175;
architecture augh of add_175 is
signal carry_inA : std_logic_vector(28 downto 0);
signal carry_inB : std_logic_vector(28 downto 0);
signal carry_res : std_logic_vector(28 downto 0);
begin
-- To handle the CI input, the operation is '1' + CI
-- If CI is not present, the operation is '1' + '0'
carry_inA <= '0' & in_a & '1';
carry_inB <= '0' & in_b & '0';
-- Compute the result
carry_res <= std_logic_vector(unsigned(carry_inA) + unsigned(carry_inB));
-- Set the outputs
result <= carry_res(27 downto 1);
end architecture;
|
-- $Id: ibdr_lp11_buf.vhd 1181 2019-07-08 17:00:50Z mueller $
-- SPDX-License-Identifier: GPL-3.0-or-later
-- Copyright 2019- by Walter F.J. Mueller <W.F.J.Mueller@gsi.de>
--
------------------------------------------------------------------------------
-- Module Name: ibdr_lp11_buf - syn
-- Description: ibus dev(rem): LP11
--
-- Dependencies: fifo_simple_dram
-- ib_rlim_slv
-- Test bench: -
-- Target Devices: generic
-- Tool versions: ise 8.2-14.7; viv 2017.2-2018.3; ghdl 0.35
--
-- Revision History:
-- Date Rev Version Comment
-- 2019-05-31 1156 1.0.4 size->fuse rename; re-organize rlim handling
-- 2019-04-24 1138 1.0.3 add csr.ir (intreq monitor)
-- 2019-04-20 1134 1.0.2 remove fifo clear on BRESET
-- 2019-04-14 1131 1.0.1 RLIM_CEV now slv8
-- 2019-03-17 1123 1.0 Initial version
-- 2019-03-10 1121 0.1 First draft (derived from ibdr_lp11)
------------------------------------------------------------------------------
--
-- Notes:
-- - the ERR bit is just a status flag
-- - no hardware interlock (DONE forced 0 when ERR=1), like in simh
-- - also no interrupt when ERR goes 1, like in simh
library ieee;
use ieee.std_logic_1164.all;
use ieee.numeric_std.all;
use work.slvtypes.all;
use work.memlib.all;
use work.iblib.all;
-- ----------------------------------------------------------------------------
entity ibdr_lp11_buf is -- ibus dev(rem): LP11 (buffered)
-- fixed address: 177514
generic (
AWIDTH : natural := 5); -- fifo address width
port (
CLK : in slbit; -- clock
RESET : in slbit; -- system reset
BRESET : in slbit; -- ibus reset
RLIM_CEV : in slv8; -- clock enable vector
RB_LAM : out slbit; -- remote attention
IB_MREQ : in ib_mreq_type; -- ibus request
IB_SRES : out ib_sres_type; -- ibus response
EI_REQ : out slbit; -- interrupt request
EI_ACK : in slbit -- interrupt acknowledge
);
end ibdr_lp11_buf;
architecture syn of ibdr_lp11_buf is
constant ibaddr_lp11 : slv16 := slv(to_unsigned(8#177514#,16));
constant ibaddr_csr : slv1 := "0"; -- csr address offset
constant ibaddr_buf : slv1 := "1"; -- buf address offset
constant csr_ibf_err : integer := 15;
subtype csr_ibf_rlim is integer range 14 downto 12;
subtype csr_ibf_type is integer range 10 downto 8;
constant csr_ibf_done : integer := 7;
constant csr_ibf_ie : integer := 6;
constant csr_ibf_ir : integer := 5;
constant buf_ibf_val : integer := 15;
subtype buf_ibf_fuse is integer range AWIDTH-1+8 downto 8;
subtype buf_ibf_data is integer range 6 downto 0;
type regs_type is record -- state registers
ibsel : slbit; -- ibus select
err : slbit; -- csr: error flag
rlim : slv3; -- csr: rate limit
done : slbit; -- csr: done flag
ie : slbit; -- csr: interrupt enable
intreq : slbit; -- interrupt request
end record regs_type;
constant regs_init : regs_type := (
'0', -- ibsel
'1', -- err !! is set !!
"000", -- rlim
'1', -- done !! is set !!
'0', -- ie
'0' -- intreq
);
signal R_REGS : regs_type := regs_init;
signal N_REGS : regs_type := regs_init;
signal PBUF_CE : slbit := '0';
signal PBUF_WE : slbit := '0';
signal PBUF_DO : slv7 := (others=>'0');
signal PBUF_RESET : slbit := '0';
signal PBUF_EMPTY : slbit := '0';
signal PBUF_FULL : slbit := '0';
signal PBUF_FUSE : slv(AWIDTH-1 downto 0) := (others=>'0');
signal RLIM_START : slbit := '0';
signal RLIM_BUSY : slbit := '0';
begin
assert AWIDTH>=4 and AWIDTH<=7
report "assert(AWIDTH>=4 and AWIDTH<=7): unsupported AWIDTH"
severity failure;
PBUF : fifo_simple_dram
generic map (
AWIDTH => AWIDTH,
DWIDTH => 7)
port map (
CLK => CLK,
RESET => PBUF_RESET,
CE => PBUF_CE,
WE => PBUF_WE,
DI => IB_MREQ.din(buf_ibf_data),
DO => PBUF_DO,
EMPTY => PBUF_EMPTY,
FULL => PBUF_FULL,
SIZE => PBUF_FUSE
);
RLIM : ib_rlim_slv
port map (
CLK => CLK,
RESET => RESET,
RLIM_CEV => RLIM_CEV,
SEL => R_REGS.rlim,
START => RLIM_START,
STOP => BRESET,
DONE => open,
BUSY => RLIM_BUSY
);
proc_regs: process (CLK)
begin
if rising_edge(CLK) then
if BRESET = '1' then -- BRESET is 1 for system and ibus reset
R_REGS <= regs_init;
if RESET = '0' then -- if RESET=0 we do just an ibus reset
R_REGS.err <= N_REGS.err; -- keep ERR flag
R_REGS.rlim <= N_REGS.rlim; -- keep RLIM flag
end if;
else
R_REGS <= N_REGS;
end if;
end if;
end process proc_regs;
proc_next : process (R_REGS, IB_MREQ, EI_ACK, RESET, BRESET,
PBUF_DO, PBUF_EMPTY, PBUF_FULL, PBUF_FUSE, RLIM_BUSY)
variable r : regs_type := regs_init;
variable n : regs_type := regs_init;
variable idout : slv16 := (others=>'0');
variable ibreq : slbit := '0';
variable iback : slbit := '0';
variable ibrd : slbit := '0';
variable ibw0 : slbit := '0';
variable ibw1 : slbit := '0';
variable ilam : slbit := '0';
variable ipbufce : slbit := '0';
variable ipbufwe : slbit := '0';
variable irlimsta : slbit := '0';
begin
r := R_REGS;
n := R_REGS;
idout := (others=>'0');
ibreq := IB_MREQ.re or IB_MREQ.we;
iback := r.ibsel and ibreq;
ibrd := IB_MREQ.re;
ibw0 := IB_MREQ.we and IB_MREQ.be0;
ibw1 := IB_MREQ.we and IB_MREQ.be1;
ilam := '0';
ipbufce := '0';
ipbufwe := '0';
irlimsta := '0';
-- ibus address decoder
n.ibsel := '0';
if IB_MREQ.aval='1' and
IB_MREQ.addr(12 downto 2)=ibaddr_lp11(12 downto 2) then
n.ibsel := '1';
end if;
-- ibus transactions
if r.ibsel = '1' then -- ibus selected ---------------------
case IB_MREQ.addr(1 downto 1) is
when ibaddr_csr => -- CSR -- control status -------------
idout(csr_ibf_err) := r.err;
idout(csr_ibf_done) := r.done;
idout(csr_ibf_ie) := r.ie;
if IB_MREQ.racc = '0' then -- cpu
if ibw0 = '1' then
n.ie := IB_MREQ.din(csr_ibf_ie);
if IB_MREQ.din(csr_ibf_ie) = '1' then
if r.done='1' and r.ie='0' then -- ie set while done=1
n.intreq := '1'; -- request interrupt
end if;
else
n.intreq := '0';
end if;
end if;
else -- rri
idout(csr_ibf_rlim) := r.rlim;
idout(csr_ibf_type) := slv(to_unsigned(AWIDTH,3));
idout(csr_ibf_ir) := r.intreq;
if ibw1 = '1' then
n.err := IB_MREQ.din(csr_ibf_err);
n.rlim := IB_MREQ.din(csr_ibf_rlim);
if IB_MREQ.din(csr_ibf_err) = '1' then
n.done := '1';
n.intreq := '0'; -- clear irupt (like simh!)
end if;
end if;
end if;
when ibaddr_buf => -- BUF -- data buffer ----------------
if IB_MREQ.racc = '0' then -- cpu
if ibw0 = '1' then
if r.done = '1' then -- ignore buf write when done=0
n.done := '0'; -- clear done
n.intreq := '0'; -- clear interrupt
if r.err = '0' then -- if online (handle via rbus)
if PBUF_FULL = '0' then -- fifo not full
ipbufce := '1'; -- write to fifo
ipbufwe := '1';
if PBUF_EMPTY = '1' then -- first write to empty fifo
ilam := '1'; -- request attention
end if;
end if; -- PBUF_FULL = '0'
else -- if offline (discard locally)
null;
end if; -- r.err = '0'
end if; -- r.done = '1'
end if; -- ibw0 = '1'
else -- rri
idout(buf_ibf_val) := not PBUF_EMPTY;
idout(buf_ibf_fuse) := PBUF_FUSE;
idout(buf_ibf_data) := PBUF_DO;
if ibrd = '1' then
if PBUF_EMPTY = '0' then -- fifo not empty
ipbufce := '1'; -- read from fifo
ipbufwe := '0';
else -- read from empty fifo
iback := '0'; -- signal nak
end if;
end if;
end if;
when others => null;
end case;
else -- ibus not selected -----------------
-- handle done, timer and interrupt
if PBUF_FULL='0' and RLIM_BUSY='0' then -- not full and not busy ?
if r.done = '0' then -- done not set ?
n.done := '1'; -- set done
irlimsta := '1'; -- start timer
if r.err='0' and r.ie='1' then -- err=0 and irupt enabled ?
n.intreq := '1'; -- request interrupt
end if;
end if;
end if;
end if; -- else r.ibsel='1'
-- other state changes
if EI_ACK = '1' then
n.intreq := '0';
end if;
N_REGS <= n;
PBUF_RESET <= RESET or r.err;
PBUF_CE <= ipbufce;
PBUF_WE <= ipbufwe;
RLIM_START <= irlimsta;
IB_SRES.dout <= idout;
IB_SRES.ack <= iback;
IB_SRES.busy <= '0';
RB_LAM <= ilam;
EI_REQ <= r.intreq;
end process proc_next;
end syn;
|
-- file: dcm_6_tb.vhd
--
-- (c) Copyright 2008 - 2011 Xilinx, Inc. All rights reserved.
--
-- This file contains confidential and proprietary information
-- of Xilinx, Inc. and is protected under U.S. and
-- international copyright and other intellectual property
-- laws.
--
-- DISCLAIMER
-- This disclaimer is not a license and does not grant any
-- rights to the materials distributed herewith. Except as
-- otherwise provided in a valid license issued to you by
-- Xilinx, and to the maximum extent permitted by applicable
-- law: (1) THESE MATERIALS ARE MADE AVAILABLE "AS IS" AND
-- WITH ALL FAULTS, AND XILINX HEREBY DISCLAIMS ALL WARRANTIES
-- AND CONDITIONS, EXPRESS, IMPLIED, OR STATUTORY, INCLUDING
-- BUT NOT LIMITED TO WARRANTIES OF MERCHANTABILITY, NON-
-- INFRINGEMENT, OR FITNESS FOR ANY PARTICULAR PURPOSE; and
-- (2) Xilinx shall not be liable (whether in contract or tort,
-- including negligence, or under any other theory of
-- liability) for any loss or damage of any kind or nature
-- related to, arising under or in connection with these
-- materials, including for any direct, or any indirect,
-- special, incidental, or consequential loss or damage
-- (including loss of data, profits, goodwill, or any type of
-- loss or damage suffered as a result of any action brought
-- by a third party) even if such damage or loss was
-- reasonably foreseeable or Xilinx had been advised of the
-- possibility of the same.
--
-- CRITICAL APPLICATIONS
-- Xilinx products are not designed or intended to be fail-
-- safe, or for use in any application requiring fail-safe
-- performance, such as life-support or safety devices or
-- systems, Class III medical devices, nuclear facilities,
-- applications related to the deployment of airbags, or any
-- other applications that could lead to death, personal
-- injury, or severe property or environmental damage
-- (individually and collectively, "Critical
-- Applications"). Customer assumes the sole risk and
-- liability of any use of Xilinx products in Critical
-- Applications, subject only to applicable laws and
-- regulations governing limitations on product liability.
--
-- THIS COPYRIGHT NOTICE AND DISCLAIMER MUST BE RETAINED AS
-- PART OF THIS FILE AT ALL TIMES.
--
------------------------------------------------------------------------------
-- Clocking wizard demonstration testbench
------------------------------------------------------------------------------
-- This demonstration testbench instantiates the example design for the
-- clocking wizard. Input clocks are toggled, which cause the clocking
-- network to lock and the counters to increment.
------------------------------------------------------------------------------
library ieee;
use ieee.std_logic_1164.all;
use ieee.std_logic_unsigned.all;
use ieee.std_logic_arith.all;
use ieee.numeric_std.all;
use ieee.std_logic_textio.all;
library std;
use std.textio.all;
library work;
use work.all;
entity dcm_6_tb is
end dcm_6_tb;
architecture test of dcm_6_tb is
-- Clock to Q delay of 100 ps
constant TCQ : time := 100 ps;
-- timescale is 1ps
constant ONE_NS : time := 1 ns;
-- how many cycles to run
constant COUNT_PHASE : integer := 1024 + 1;
-- we'll be using the period in many locations
constant PER1 : time := 31.25 ns;
-- Declare the input clock signals
signal CLK_IN1 : std_logic := '1';
-- The high bits of the sampling counters
signal COUNT : std_logic_vector(2 downto 1);
-- Status and control signals
signal RESET : std_logic := '0';
signal COUNTER_RESET : std_logic := '0';
signal timeout_counter : std_logic_vector (13 downto 0) := (others => '0');
-- signal defined to stop mti simulation without severity failure in the report
signal end_of_sim : std_logic := '0';
signal CLK_OUT : std_logic_vector(2 downto 1);
--Freq Check using the M & D values setting and actual Frequency generated
component dcm_6_exdes
port
(-- Clock in ports
CLK_IN1 : in std_logic;
-- Reset that only drives logic in example design
COUNTER_RESET : in std_logic;
CLK_OUT : out std_logic_vector(2 downto 1) ;
-- High bits of counters driven by clocks
COUNT : out std_logic_vector(2 downto 1);
-- Status and control signals
RESET : in std_logic
);
end component;
begin
-- Input clock generation
--------------------------------------
process begin
CLK_IN1 <= not CLK_IN1; wait for (PER1/2);
end process;
-- Test sequence
process
procedure simtimeprint is
variable outline : line;
begin
write(outline, string'("## SYSTEM_CYCLE_COUNTER "));
write(outline, NOW/PER1);
write(outline, string'(" ns"));
writeline(output,outline);
end simtimeprint;
procedure simfreqprint (period : time; clk_num : integer) is
variable outputline : LINE;
variable str1 : string(1 to 16);
variable str2 : integer;
variable str3 : string(1 to 2);
variable str4 : integer;
variable str5 : string(1 to 4);
begin
str1 := "Freq of CLK_OUT(";
str2 := clk_num;
str3 := ") ";
str4 := 1000000 ps/period ;
str5 := " MHz" ;
write(outputline, str1 );
write(outputline, str2);
write(outputline, str3);
write(outputline, str4);
write(outputline, str5);
writeline(output, outputline);
end simfreqprint;
begin
report "Timing checks are not valid" severity note;
RESET <= '1';
wait for (PER1*6);
RESET <= '0';
-- can't probe into hierarchy, wait "some time" for lock
wait for (PER1*2500);
wait for (PER1*20);
COUNTER_RESET <= '1';
wait for (PER1*19.5);
COUNTER_RESET <= '0';
wait for (PER1*1);
report "Timing checks are valid" severity note;
wait for (PER1*COUNT_PHASE);
simtimeprint;
end_of_sim <= '1';
wait for 1 ps;
report "Simulation Stopped." severity failure;
wait;
end process;
-- Instantiation of the example design containing the clock
-- network and sampling counters
-----------------------------------------------------------
dut : dcm_6_exdes
port map
(-- Clock in ports
CLK_IN1 => CLK_IN1,
-- Reset for logic in example design
COUNTER_RESET => COUNTER_RESET,
CLK_OUT => CLK_OUT,
-- High bits of the counters
COUNT => COUNT,
-- Status and control signals
RESET => RESET);
-- Freq Check
end test;
|
entity tb_dpram3 is
end tb_dpram3;
library ieee;
use ieee.std_logic_1164.all;
architecture behav of tb_dpram3 is
signal raddr : std_logic_vector(3 downto 0);
signal rdat : std_logic_vector(7 downto 0);
signal waddr : std_logic_vector(3 downto 0);
signal wdat : std_logic_vector(7 downto 0);
signal clk : std_logic;
begin
dut: entity work.dpram3
port map (raddr => raddr, rdat => rdat, waddr => waddr, wdat => wdat,
clk => clk);
process
procedure pulse is
begin
clk <= '0';
wait for 1 ns;
clk <= '1';
wait for 1 ns;
end pulse;
begin
raddr <= "0000";
waddr <= x"a";
wdat <= x"5a";
pulse;
raddr <= x"a";
waddr <= x"7";
wdat <= x"87";
pulse;
assert rdat = x"5a" severity failure;
raddr <= x"7";
waddr <= x"1";
wdat <= x"e1";
pulse;
assert rdat = x"87" severity failure;
raddr <= x"1";
waddr <= x"3";
wdat <= x"c3";
pulse;
assert rdat = x"e1" severity failure;
wait;
end process;
end behav;
|
library ieee;
use ieee.std_logic_1164.all;
use ieee.numeric_std.all;
entity mem16k is
generic (
simulation : boolean := false );
port (
clock : in std_logic;
reset : in std_logic;
address : in std_logic_vector(26 downto 0);
request : in std_logic;
mwrite : in std_logic;
wdata : in std_logic_vector(7 downto 0);
rdata : out std_logic_vector(7 downto 0);
rack : out std_logic;
dack : out std_logic;
claimed : out std_logic );
attribute keep_hierarchy : string;
attribute keep_hierarchy of mem16k : entity is "yes";
end mem16k;
architecture gideon of mem16k is
subtype t_byte is std_logic_vector(7 downto 0);
type t_byte_array is array(natural range <>) of t_byte;
shared variable my_mem : t_byte_array(0 to 16383);
signal claimed_i : std_logic;
signal do_write : std_logic;
-- attribute ram_style : string;
-- attribute ram_style of my_mem : signal is "block";
begin
claimed_i <= '1' when address(26 downto 14) = "0000000000000"
else '0';
claimed <= claimed_i;
rack <= claimed_i and request;
do_write <= claimed_i and request and mwrite;
-- synthesis translate_off
model: if simulation generate
mram: entity work.bram_model_8sp
generic map("intram", 14) -- 16k
port map (
CLK => clock,
SSR => reset,
EN => request,
WE => do_write,
ADDR => address(13 downto 0),
DI => wdata,
DO => rdata );
end generate;
-- synthesis translate_on
process(clock)
begin
if rising_edge(clock) then
if do_write='1' then
my_mem(to_integer(unsigned(address(13 downto 0)))) := wdata;
end if;
if not simulation then
rdata <= my_mem(to_integer(unsigned(address(13 downto 0))));
else
rdata <= (others => 'Z');
end if;
dack <= claimed_i and request;
end if;
end process;
end gideon;
|
library ieee;
use ieee.std_logic_1164.all;
use ieee.numeric_std.all;
entity mem16k is
generic (
simulation : boolean := false );
port (
clock : in std_logic;
reset : in std_logic;
address : in std_logic_vector(26 downto 0);
request : in std_logic;
mwrite : in std_logic;
wdata : in std_logic_vector(7 downto 0);
rdata : out std_logic_vector(7 downto 0);
rack : out std_logic;
dack : out std_logic;
claimed : out std_logic );
attribute keep_hierarchy : string;
attribute keep_hierarchy of mem16k : entity is "yes";
end mem16k;
architecture gideon of mem16k is
subtype t_byte is std_logic_vector(7 downto 0);
type t_byte_array is array(natural range <>) of t_byte;
shared variable my_mem : t_byte_array(0 to 16383);
signal claimed_i : std_logic;
signal do_write : std_logic;
-- attribute ram_style : string;
-- attribute ram_style of my_mem : signal is "block";
begin
claimed_i <= '1' when address(26 downto 14) = "0000000000000"
else '0';
claimed <= claimed_i;
rack <= claimed_i and request;
do_write <= claimed_i and request and mwrite;
-- synthesis translate_off
model: if simulation generate
mram: entity work.bram_model_8sp
generic map("intram", 14) -- 16k
port map (
CLK => clock,
SSR => reset,
EN => request,
WE => do_write,
ADDR => address(13 downto 0),
DI => wdata,
DO => rdata );
end generate;
-- synthesis translate_on
process(clock)
begin
if rising_edge(clock) then
if do_write='1' then
my_mem(to_integer(unsigned(address(13 downto 0)))) := wdata;
end if;
if not simulation then
rdata <= my_mem(to_integer(unsigned(address(13 downto 0))));
else
rdata <= (others => 'Z');
end if;
dack <= claimed_i and request;
end if;
end process;
end gideon;
|
library ieee;
use ieee.std_logic_1164.all;
use ieee.numeric_std.all;
entity mem16k is
generic (
simulation : boolean := false );
port (
clock : in std_logic;
reset : in std_logic;
address : in std_logic_vector(26 downto 0);
request : in std_logic;
mwrite : in std_logic;
wdata : in std_logic_vector(7 downto 0);
rdata : out std_logic_vector(7 downto 0);
rack : out std_logic;
dack : out std_logic;
claimed : out std_logic );
attribute keep_hierarchy : string;
attribute keep_hierarchy of mem16k : entity is "yes";
end mem16k;
architecture gideon of mem16k is
subtype t_byte is std_logic_vector(7 downto 0);
type t_byte_array is array(natural range <>) of t_byte;
shared variable my_mem : t_byte_array(0 to 16383);
signal claimed_i : std_logic;
signal do_write : std_logic;
-- attribute ram_style : string;
-- attribute ram_style of my_mem : signal is "block";
begin
claimed_i <= '1' when address(26 downto 14) = "0000000000000"
else '0';
claimed <= claimed_i;
rack <= claimed_i and request;
do_write <= claimed_i and request and mwrite;
-- synthesis translate_off
model: if simulation generate
mram: entity work.bram_model_8sp
generic map("intram", 14) -- 16k
port map (
CLK => clock,
SSR => reset,
EN => request,
WE => do_write,
ADDR => address(13 downto 0),
DI => wdata,
DO => rdata );
end generate;
-- synthesis translate_on
process(clock)
begin
if rising_edge(clock) then
if do_write='1' then
my_mem(to_integer(unsigned(address(13 downto 0)))) := wdata;
end if;
if not simulation then
rdata <= my_mem(to_integer(unsigned(address(13 downto 0))));
else
rdata <= (others => 'Z');
end if;
dack <= claimed_i and request;
end if;
end process;
end gideon;
|
library ieee;
use ieee.std_logic_1164.all;
use ieee.numeric_std.all;
entity mem16k is
generic (
simulation : boolean := false );
port (
clock : in std_logic;
reset : in std_logic;
address : in std_logic_vector(26 downto 0);
request : in std_logic;
mwrite : in std_logic;
wdata : in std_logic_vector(7 downto 0);
rdata : out std_logic_vector(7 downto 0);
rack : out std_logic;
dack : out std_logic;
claimed : out std_logic );
attribute keep_hierarchy : string;
attribute keep_hierarchy of mem16k : entity is "yes";
end mem16k;
architecture gideon of mem16k is
subtype t_byte is std_logic_vector(7 downto 0);
type t_byte_array is array(natural range <>) of t_byte;
shared variable my_mem : t_byte_array(0 to 16383);
signal claimed_i : std_logic;
signal do_write : std_logic;
-- attribute ram_style : string;
-- attribute ram_style of my_mem : signal is "block";
begin
claimed_i <= '1' when address(26 downto 14) = "0000000000000"
else '0';
claimed <= claimed_i;
rack <= claimed_i and request;
do_write <= claimed_i and request and mwrite;
-- synthesis translate_off
model: if simulation generate
mram: entity work.bram_model_8sp
generic map("intram", 14) -- 16k
port map (
CLK => clock,
SSR => reset,
EN => request,
WE => do_write,
ADDR => address(13 downto 0),
DI => wdata,
DO => rdata );
end generate;
-- synthesis translate_on
process(clock)
begin
if rising_edge(clock) then
if do_write='1' then
my_mem(to_integer(unsigned(address(13 downto 0)))) := wdata;
end if;
if not simulation then
rdata <= my_mem(to_integer(unsigned(address(13 downto 0))));
else
rdata <= (others => 'Z');
end if;
dack <= claimed_i and request;
end if;
end process;
end gideon;
|
library ieee;
use ieee.std_logic_1164.all;
use ieee.numeric_std.all;
entity mem16k is
generic (
simulation : boolean := false );
port (
clock : in std_logic;
reset : in std_logic;
address : in std_logic_vector(26 downto 0);
request : in std_logic;
mwrite : in std_logic;
wdata : in std_logic_vector(7 downto 0);
rdata : out std_logic_vector(7 downto 0);
rack : out std_logic;
dack : out std_logic;
claimed : out std_logic );
attribute keep_hierarchy : string;
attribute keep_hierarchy of mem16k : entity is "yes";
end mem16k;
architecture gideon of mem16k is
subtype t_byte is std_logic_vector(7 downto 0);
type t_byte_array is array(natural range <>) of t_byte;
shared variable my_mem : t_byte_array(0 to 16383);
signal claimed_i : std_logic;
signal do_write : std_logic;
-- attribute ram_style : string;
-- attribute ram_style of my_mem : signal is "block";
begin
claimed_i <= '1' when address(26 downto 14) = "0000000000000"
else '0';
claimed <= claimed_i;
rack <= claimed_i and request;
do_write <= claimed_i and request and mwrite;
-- synthesis translate_off
model: if simulation generate
mram: entity work.bram_model_8sp
generic map("intram", 14) -- 16k
port map (
CLK => clock,
SSR => reset,
EN => request,
WE => do_write,
ADDR => address(13 downto 0),
DI => wdata,
DO => rdata );
end generate;
-- synthesis translate_on
process(clock)
begin
if rising_edge(clock) then
if do_write='1' then
my_mem(to_integer(unsigned(address(13 downto 0)))) := wdata;
end if;
if not simulation then
rdata <= my_mem(to_integer(unsigned(address(13 downto 0))));
else
rdata <= (others => 'Z');
end if;
dack <= claimed_i and request;
end if;
end process;
end gideon;
|
-------------------------------------------------------------------------------
-- Entity: ram
-- Author: Waj
-- Date : 11-May-13
-------------------------------------------------------------------------------
-- Description: (ECS Uebung 9)
-- GPIO block for simple von-Neumann MCU.
-------------------------------------------------------------------------------
-- Total # of FFs: ... tbd ...
-------------------------------------------------------------------------------
library ieee;
use ieee.std_logic_1164.all;
use ieee.numeric_std.all;
use work.mcu_pkg.all;
entity gpio is
port(rst : in std_logic;
clk : in std_logic;
-- GPIO bus signals
bus_in : in t_bus2rws;
bus_out : out t_rws2bus;
-- LED, Switches and Buttons
to_LED : out std_logic_vector(7 downto 0);
from_SW : in std_logic_vector(3 downto 0);
from_BTN_ROT_C : in std_logic;
from_BTN_EAST : in std_logic;
from_BTN_WEST : in std_logic;
from_BTN_NORTH : in std_logic;
-- Floppy connection
step_to_floppy : out std_logic;
dir_to_floppy : out std_logic
en_to_floppy : out std_logic
);
end gpio;
architecture rtl of gpio is
component floppy is
port(
rst : in std_logic;
clk : in std_logic;
-- input signals from cpu
enable : in std_logic;
mode : in std_logic;
pitch_fix : in std_logic_vector(15 downto 0);
-- output signals to cpu
status_init : out std_logic;
status_melody : out std_logic;
-- output signals to floppy
floppy_step : out std_logic;
floppy_dir : out std_logic
floppy_en : out std_logic
);
end component floppy;
signal in_1, in_2 : std_logic_vector(7 downto 0);
signal next_out, current_out : std_logic_vector(7 downto 0);
signal f_status_init : std_logic;
signal f_status_melody : std_logic;
signal f_enable : std_logic;
signal f_mode : std_logic;
signal f_pitch_fix : std_logic_vector(15 downto 0);
begin
floppy1 : floppy
port map(
rst => rst,
clk => clk,
enable => f_enable,
mode => f_mode,
pitch_fix => f_pitch_fix,
status_init => f_status_init,
status_melody => f_status_melody,
floppy_step => step_to_floppy,
floppy_dir => dir_to_floppy,
floppy_en => en_to_floppy
);
-----------------------------------------------------------------------------
-- sequential process: DUMMY to avoid logic optimization
-- To be replaced.....
-- # of FFs: ......
-----------------------------------------------------------------------------
-- For testing only !!! inout without CPU
-- to_LED(7 downto 4) <= from_SW;
-- to_LED(3) <= from_BTN_ROT_C;
-- to_LED(2) <= from_BTN_EAST;
-- to_LED(1) <= from_BTN_WEST;
-- to_LED(7) <= from_BTN_NORTH;
P_synch : process(rst,clk) -- for synchronizing the inputs with 2 FFs
begin
if rst = '1' then
in_1 <= (others => '0');
in_2 <= (others => '0');
elsif rising_edge(clk) then
in_1(3 downto 0) <= from_SW;
in_1(4) <= from_BTN_EAST;
in_1(5) <= from_BTN_NORTH;
in_1(6) <= from_BTN_WEST;
in_1(7) <= from_BTN_ROT_C;
in_2 <= in_1;
end if;
end process;
-- Connecting the internal Signals
to_LED <= current_out;
current_out <= next_out;
P_busaccess : process(rst, clk)
begin
if rst = '1' then
bus_out.data <= (others => '0');
elsif rising_edge(clk) then
next_out <= current_out; -- take the same output if no new data avaiable
if unsigned(bus_in.addr) = to_unsigned(16#00#,AWL) then
bus_out.data(7 downto 0) <= in_2; -- Only the low byte is used !
bus_out.data(15 downto 8) <= (others => '0');
elsif unsigned(bus_in.addr) = to_unsigned(16#01#,AWL) then
bus_out.data(7 downto 0) <= current_out; -- Only the low byte is used !
bus_out.data(15 downto 8) <= (others => '0');
elsif unsigned(bus_in.addr) = to_unsigned(16#02#,AWL) then
bus_out.data(0) <= f_enable;
bus_out.data(15 downto 1) <= (others => '0');
elsif unsigned(bus_in.addr) = to_unsigned(16#03#,AWL) then
bus_out.data(0) <= f_mode;
bus_out.data(15 downto 1) <= (others => '0');
elsif unsigned(bus_in.addr) = to_unsigned(16#04#,AWL) then
bus_out.data(0) <= f_status_init;
bus_out.data(15 downto 1) <= (others => '0');
elsif unsigned(bus_in.addr) = to_unsigned(16#05#,AWL) then
bus_out.data(0) <= f_status_melody;
bus_out.data(15 downto 1) <= (others => '0');
elsif unsigned(bus_in.addr) = to_unsigned(16#06#,AWL) then
bus_out.data(15 downto 0) <= f_pitch_fix;
end if;
if bus_in.we = '1' then -- write to register
if unsigned(bus_in.addr) = to_unsigned(16#01#,AWL) then
next_out <= bus_in.data(7 downto 0);--<= "01010111";
elsif unsigned(bus_in.addr) = to_unsigned(16#02#,AWL) then
f_enable <= bus_in.data(0);
elsif unsigned(bus_in.addr) = to_unsigned(16#03#,AWL) then
f_mode <= bus_in.data(0);
elsif unsigned(bus_in.addr) = to_unsigned(16#06#,AWL) then
f_pitch_fix <= bus_in.data;
end if;
end if;
end if;
end process;
end rtl;
|
-- Copyright (C) 2001 Bill Billowitch.
-- Some of the work to develop this test suite was done with Air Force
-- support. The Air Force and Bill Billowitch assume no
-- responsibilities for this software.
-- This file is part of VESTs (Vhdl tESTs).
-- VESTs is free software; you can redistribute it and/or modify it
-- under the terms of the GNU General Public License as published by the
-- Free Software Foundation; either version 2 of the License, or (at
-- your option) any later version.
-- VESTs is distributed in the hope that it will be useful, but WITHOUT
-- ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
-- FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License
-- for more details.
-- You should have received a copy of the GNU General Public License
-- along with VESTs; if not, write to the Free Software Foundation,
-- Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
-- ---------------------------------------------------------------------
--
-- $Id: tc1238.vhd,v 1.2 2001-10-26 16:30:07 paw Exp $
-- $Revision: 1.2 $
--
-- ---------------------------------------------------------------------
ENTITY c08s02b00x00p03n01i01238ent IS
END c08s02b00x00p03n01i01238ent;
ARCHITECTURE c08s02b00x00p03n01i01238arch OF c08s02b00x00p03n01i01238ent IS
BEGIN
TESTING: PROCESS
variable k : BIT;
BEGIN
assert k;
assert FALSE
report "***FAILED TEST: c08s02b00x00p03n01i01238 - The condition in the assert statement is not of type boolean"
severity ERROR;
wait;
END PROCESS TESTING;
END c08s02b00x00p03n01i01238arch;
|
-- Copyright (C) 2001 Bill Billowitch.
-- Some of the work to develop this test suite was done with Air Force
-- support. The Air Force and Bill Billowitch assume no
-- responsibilities for this software.
-- This file is part of VESTs (Vhdl tESTs).
-- VESTs is free software; you can redistribute it and/or modify it
-- under the terms of the GNU General Public License as published by the
-- Free Software Foundation; either version 2 of the License, or (at
-- your option) any later version.
-- VESTs is distributed in the hope that it will be useful, but WITHOUT
-- ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
-- FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License
-- for more details.
-- You should have received a copy of the GNU General Public License
-- along with VESTs; if not, write to the Free Software Foundation,
-- Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
-- ---------------------------------------------------------------------
--
-- $Id: tc1238.vhd,v 1.2 2001-10-26 16:30:07 paw Exp $
-- $Revision: 1.2 $
--
-- ---------------------------------------------------------------------
ENTITY c08s02b00x00p03n01i01238ent IS
END c08s02b00x00p03n01i01238ent;
ARCHITECTURE c08s02b00x00p03n01i01238arch OF c08s02b00x00p03n01i01238ent IS
BEGIN
TESTING: PROCESS
variable k : BIT;
BEGIN
assert k;
assert FALSE
report "***FAILED TEST: c08s02b00x00p03n01i01238 - The condition in the assert statement is not of type boolean"
severity ERROR;
wait;
END PROCESS TESTING;
END c08s02b00x00p03n01i01238arch;
|
-- Copyright (C) 2001 Bill Billowitch.
-- Some of the work to develop this test suite was done with Air Force
-- support. The Air Force and Bill Billowitch assume no
-- responsibilities for this software.
-- This file is part of VESTs (Vhdl tESTs).
-- VESTs is free software; you can redistribute it and/or modify it
-- under the terms of the GNU General Public License as published by the
-- Free Software Foundation; either version 2 of the License, or (at
-- your option) any later version.
-- VESTs is distributed in the hope that it will be useful, but WITHOUT
-- ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
-- FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License
-- for more details.
-- You should have received a copy of the GNU General Public License
-- along with VESTs; if not, write to the Free Software Foundation,
-- Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
-- ---------------------------------------------------------------------
--
-- $Id: tc1238.vhd,v 1.2 2001-10-26 16:30:07 paw Exp $
-- $Revision: 1.2 $
--
-- ---------------------------------------------------------------------
ENTITY c08s02b00x00p03n01i01238ent IS
END c08s02b00x00p03n01i01238ent;
ARCHITECTURE c08s02b00x00p03n01i01238arch OF c08s02b00x00p03n01i01238ent IS
BEGIN
TESTING: PROCESS
variable k : BIT;
BEGIN
assert k;
assert FALSE
report "***FAILED TEST: c08s02b00x00p03n01i01238 - The condition in the assert statement is not of type boolean"
severity ERROR;
wait;
END PROCESS TESTING;
END c08s02b00x00p03n01i01238arch;
|
-------------------------------------------------------------------------------
--
-- (c) B&R, 2011
--
-- Redistribution and use in source and binary forms, with or without
-- modification, are permitted provided that the following conditions
-- are met:
--
-- 1. Redistributions of source code must retain the above copyright
-- notice, this list of conditions and the following disclaimer.
--
-- 2. Redistributions in binary form must reproduce the above copyright
-- notice, this list of conditions and the following disclaimer in the
-- documentation and/or other materials provided with the distribution.
--
-- 3. Neither the name of B&R nor the names of its
-- contributors may be used to endorse or promote products derived
-- from this software without prior written permission. For written
-- permission, please contact office@br-automation.com
--
-- THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
-- "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
-- LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
-- FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
-- COPYRIGHT HOLDERS OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
-- INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
-- BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
-- LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
-- CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
-- LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
-- ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
-- POSSIBILITY OF SUCH DAMAGE.
--
-------------------------------------------------------------------------------
--
-- This is a 32-to-16 bit converter which is necessary for e.g. Xilinx PLB.
-- The component has to be connected to openMAC_Ethernet or powerlink.
-- NOT use this directly with openMAC!
--
-------------------------------------------------------------------------------
LIBRARY ieee;
USE ieee.std_logic_unsigned.ALL;
USE ieee.std_logic_1164.ALL;
USE ieee.std_logic_arith.ALL;
entity openMAC_16to32conv is
generic(
gEndian : string := "little";
bus_address_width : integer := 10
);
port(
clk : in std_logic;
rst : in std_logic;
--port from 32bit bus
bus_select : in std_logic;
bus_write : in std_logic;
bus_read : in std_logic;
bus_byteenable : in std_logic_vector(3 downto 0);
bus_writedata : in std_logic_vector(31 downto 0);
bus_readdata : out std_logic_vector(31 downto 0);
bus_address : in std_logic_vector(bus_address_width-1 downto 0);
bus_ack_wr : out std_logic;
bus_ack_rd : out std_logic;
--port to openMAC_Ethernet
s_chipselect : out std_logic;
s_write : out std_logic;
s_read : out std_logic;
s_address : out std_logic_vector(bus_address_width-1 downto 0);
s_byteenable : out std_logic_vector(1 downto 0);
s_waitrequest : in std_logic;
s_readdata : in std_logic_vector(15 downto 0);
s_writedata : out std_logic_vector(15 downto 0)
);
end openMAC_16to32conv;
architecture rtl of openMAC_16to32conv is
-- types
type fsm_t is (idle, doAccess);
type bus_access_t is (none, dword, word);
-- fsm
signal fsm, fsm_next : fsm_t;
signal bus_access : bus_access_t;
-- cnt
signal cnt, cnt_next, cnt_load_val : std_logic_vector(1 downto 0);
signal cnt_load, cnt_dec, cnt_zero : std_logic;
signal bus_ack : std_logic;
-- word register
signal word_reg, word_reg_next : std_logic_vector(15 downto 0);
begin
process(clk, rst)
begin
if rst = '1' then
cnt <= (others => '0');
fsm <= idle;
word_reg <= (others => '0');
elsif clk = '1' and clk'event then
cnt <= cnt_next;
fsm <= fsm_next;
word_reg <= word_reg_next;
end if;
end process;
word_reg_next <= s_readdata when bus_access = dword and cnt = 2 and s_waitrequest = '0' else
word_reg;
s_chipselect <= bus_select; --not cnt_zero;
s_write <= bus_write and bus_select;
s_read <= bus_read and bus_select;
cnt_dec <= (not s_waitrequest) and bus_select;
bus_readdata <= s_readdata & word_reg when bus_access = dword else
s_readdata & s_readdata;
bus_ack <= '1' when cnt = 1 and s_waitrequest = '0' and bus_access = dword else
'1' when s_waitrequest = '0' and bus_access = word else
'0';
bus_ack_wr <= bus_ack and bus_write;
bus_ack_rd <= bus_ack and bus_read;
s_address(bus_address_width-1 downto 1) <= '0' & bus_address(bus_address_width-1 downto 2);
--word address set to +0 (little) when first dword access or word access with selected word/byte
s_address(0) <= '0' when bus_access = dword and (cnt = 2 or cnt = 0) and gEndian = "little" else --first word of dword access
'1' when bus_access = dword and cnt = 1 and gEndian = "little" else
'1' when bus_access = dword and (cnt = 2 or cnt = 0) and gEndian = "big" else
'0' when bus_access = dword and cnt = 1 and gEndian = "big" else --first word of dword access
bus_address(1);
s_byteenable <= "11" when bus_access = dword else
bus_byteenable(3 downto 2) or bus_byteenable(1 downto 0);
s_writedata <= bus_writedata(15 downto 0) when bus_access = dword and (cnt = 2 or cnt = 0) else
bus_writedata(31 downto 16) when bus_access = dword and cnt = 1 else
bus_writedata(15 downto 0) when bus_address(1) = '0' else
bus_writedata(31 downto 16); --when bus_address(1) = '1' else
--fsm
bus_access <= none when bus_select /= '1' else
dword when bus_byteenable = "1111" else
word;
fsm_next <= doAccess when fsm = idle and cnt_zero = '1' and bus_access = dword else
idle when fsm = doAccess and cnt_zero = '1' and bus_access = none else
fsm;
--if dword, access twice, otherwise (byte, word) access once
cnt_load_val <= "10" when bus_byteenable = "1111" and bus_read = '1' else "01";
cnt_load <= '1' when fsm_next = doAccess and fsm = idle else '0';
--counter
cnt_next <= cnt_load_val when cnt_load = '1' else
cnt - 1 when cnt_dec = '1' and bus_access = dword else
cnt;
cnt_zero <= '1' when cnt = 0 else '0';
end rtl;
|
-------------------------------------------------------------------------------
--
-- (c) B&R, 2011
--
-- Redistribution and use in source and binary forms, with or without
-- modification, are permitted provided that the following conditions
-- are met:
--
-- 1. Redistributions of source code must retain the above copyright
-- notice, this list of conditions and the following disclaimer.
--
-- 2. Redistributions in binary form must reproduce the above copyright
-- notice, this list of conditions and the following disclaimer in the
-- documentation and/or other materials provided with the distribution.
--
-- 3. Neither the name of B&R nor the names of its
-- contributors may be used to endorse or promote products derived
-- from this software without prior written permission. For written
-- permission, please contact office@br-automation.com
--
-- THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
-- "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
-- LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
-- FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
-- COPYRIGHT HOLDERS OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
-- INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
-- BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
-- LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
-- CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
-- LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
-- ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
-- POSSIBILITY OF SUCH DAMAGE.
--
-------------------------------------------------------------------------------
--
-- This is a 32-to-16 bit converter which is necessary for e.g. Xilinx PLB.
-- The component has to be connected to openMAC_Ethernet or powerlink.
-- NOT use this directly with openMAC!
--
-------------------------------------------------------------------------------
LIBRARY ieee;
USE ieee.std_logic_unsigned.ALL;
USE ieee.std_logic_1164.ALL;
USE ieee.std_logic_arith.ALL;
entity openMAC_16to32conv is
generic(
gEndian : string := "little";
bus_address_width : integer := 10
);
port(
clk : in std_logic;
rst : in std_logic;
--port from 32bit bus
bus_select : in std_logic;
bus_write : in std_logic;
bus_read : in std_logic;
bus_byteenable : in std_logic_vector(3 downto 0);
bus_writedata : in std_logic_vector(31 downto 0);
bus_readdata : out std_logic_vector(31 downto 0);
bus_address : in std_logic_vector(bus_address_width-1 downto 0);
bus_ack_wr : out std_logic;
bus_ack_rd : out std_logic;
--port to openMAC_Ethernet
s_chipselect : out std_logic;
s_write : out std_logic;
s_read : out std_logic;
s_address : out std_logic_vector(bus_address_width-1 downto 0);
s_byteenable : out std_logic_vector(1 downto 0);
s_waitrequest : in std_logic;
s_readdata : in std_logic_vector(15 downto 0);
s_writedata : out std_logic_vector(15 downto 0)
);
end openMAC_16to32conv;
architecture rtl of openMAC_16to32conv is
-- types
type fsm_t is (idle, doAccess);
type bus_access_t is (none, dword, word);
-- fsm
signal fsm, fsm_next : fsm_t;
signal bus_access : bus_access_t;
-- cnt
signal cnt, cnt_next, cnt_load_val : std_logic_vector(1 downto 0);
signal cnt_load, cnt_dec, cnt_zero : std_logic;
signal bus_ack : std_logic;
-- word register
signal word_reg, word_reg_next : std_logic_vector(15 downto 0);
begin
process(clk, rst)
begin
if rst = '1' then
cnt <= (others => '0');
fsm <= idle;
word_reg <= (others => '0');
elsif clk = '1' and clk'event then
cnt <= cnt_next;
fsm <= fsm_next;
word_reg <= word_reg_next;
end if;
end process;
word_reg_next <= s_readdata when bus_access = dword and cnt = 2 and s_waitrequest = '0' else
word_reg;
s_chipselect <= bus_select; --not cnt_zero;
s_write <= bus_write and bus_select;
s_read <= bus_read and bus_select;
cnt_dec <= (not s_waitrequest) and bus_select;
bus_readdata <= s_readdata & word_reg when bus_access = dword else
s_readdata & s_readdata;
bus_ack <= '1' when cnt = 1 and s_waitrequest = '0' and bus_access = dword else
'1' when s_waitrequest = '0' and bus_access = word else
'0';
bus_ack_wr <= bus_ack and bus_write;
bus_ack_rd <= bus_ack and bus_read;
s_address(bus_address_width-1 downto 1) <= '0' & bus_address(bus_address_width-1 downto 2);
--word address set to +0 (little) when first dword access or word access with selected word/byte
s_address(0) <= '0' when bus_access = dword and (cnt = 2 or cnt = 0) and gEndian = "little" else --first word of dword access
'1' when bus_access = dword and cnt = 1 and gEndian = "little" else
'1' when bus_access = dword and (cnt = 2 or cnt = 0) and gEndian = "big" else
'0' when bus_access = dword and cnt = 1 and gEndian = "big" else --first word of dword access
bus_address(1);
s_byteenable <= "11" when bus_access = dword else
bus_byteenable(3 downto 2) or bus_byteenable(1 downto 0);
s_writedata <= bus_writedata(15 downto 0) when bus_access = dword and (cnt = 2 or cnt = 0) else
bus_writedata(31 downto 16) when bus_access = dword and cnt = 1 else
bus_writedata(15 downto 0) when bus_address(1) = '0' else
bus_writedata(31 downto 16); --when bus_address(1) = '1' else
--fsm
bus_access <= none when bus_select /= '1' else
dword when bus_byteenable = "1111" else
word;
fsm_next <= doAccess when fsm = idle and cnt_zero = '1' and bus_access = dword else
idle when fsm = doAccess and cnt_zero = '1' and bus_access = none else
fsm;
--if dword, access twice, otherwise (byte, word) access once
cnt_load_val <= "10" when bus_byteenable = "1111" and bus_read = '1' else "01";
cnt_load <= '1' when fsm_next = doAccess and fsm = idle else '0';
--counter
cnt_next <= cnt_load_val when cnt_load = '1' else
cnt - 1 when cnt_dec = '1' and bus_access = dword else
cnt;
cnt_zero <= '1' when cnt = 0 else '0';
end rtl;
|
-- NEED RESULT: ARCH00670: Variable default initial values - dynamic subtypes passed
-------------------------------------------------------------------------------
--
-- Copyright (c) 1989 by Intermetrics, Inc.
-- All rights reserved.
--
-------------------------------------------------------------------------------
--
-- TEST NAME:
--
-- CT00670
--
-- AUTHOR:
--
-- A. Wilmot
--
-- TEST OBJECTIVES:
--
-- 4.3.1.3 (1)
-- 4.3.1.3 (2)
-- 4.3.1.3 (3)
-- 4.3.1.3 (4)
--
-- DESIGN UNIT ORDERING:
--
-- E00000(ARCH00670)
-- ENT00670_Test_Bench(ARCH00670_Test_Bench)
--
-- REVISION HISTORY:
--
-- 01-SEP-1987 - initial revision
--
-- NOTES:
--
-- self-checking
-- automatically generated
--
use WORK.STANDARD_TYPES.all ;
--
architecture ARCH00670 of E00000 is
procedure p1 is
variable correct : boolean := true ;
variable va_boolean_1 : boolean ;
variable va_boolean_2 : boolean
:= d_boolean ;
variable va_bit_1 : bit ;
variable va_bit_2 : bit
:= d_bit ;
variable va_severity_level_1 : severity_level ;
variable va_severity_level_2 : severity_level
:= d_severity_level ;
variable va_character_1 : character ;
variable va_character_2 : character
:= d_character ;
variable va_t_enum1_1 : t_enum1 ;
variable va_t_enum1_2 : t_enum1
:= d_t_enum1 ;
variable va_st_enum1_1 : st_enum1 ;
variable va_st_enum1_2 : st_enum1
:= d_st_enum1 ;
variable va_integer_1 : integer ;
variable va_integer_2 : integer
:= d_integer ;
variable va_t_int1_1 : t_int1 ;
variable va_t_int1_2 : t_int1
:= d_t_int1 ;
variable va_st_int1_1 : st_int1 ;
variable va_st_int1_2 : st_int1
:= d_st_int1 ;
variable va_time_1 : time ;
variable va_time_2 : time
:= d_time ;
variable va_t_phys1_1 : t_phys1 ;
variable va_t_phys1_2 : t_phys1
:= d_t_phys1 ;
variable va_st_phys1_1 : st_phys1 ;
variable va_st_phys1_2 : st_phys1
:= d_st_phys1 ;
variable va_real_1 : real ;
variable va_real_2 : real
:= d_real ;
variable va_t_real1_1 : t_real1 ;
variable va_t_real1_2 : t_real1
:= d_t_real1 ;
variable va_st_real1_1 : st_real1 ;
variable va_st_real1_2 : st_real1
:= d_st_real1 ;
begin
correct := correct and
va_boolean_1 = va_boolean_2 and
va_boolean_2 = d_boolean ;
correct := correct and
va_bit_1 = va_bit_2 and
va_bit_2 = d_bit ;
correct := correct and
va_severity_level_1 = va_severity_level_2 and
va_severity_level_2 = d_severity_level ;
correct := correct and
va_character_1 = va_character_2 and
va_character_2 = d_character ;
correct := correct and
va_t_enum1_1 = va_t_enum1_2 and
va_t_enum1_2 = d_t_enum1 ;
correct := correct and
va_st_enum1_1 = va_st_enum1_2 and
va_st_enum1_2 = d_st_enum1 ;
correct := correct and
va_integer_1 = va_integer_2 and
va_integer_2 = d_integer ;
correct := correct and
va_t_int1_1 = va_t_int1_2 and
va_t_int1_2 = d_t_int1 ;
correct := correct and
va_st_int1_1 = va_st_int1_2 and
va_st_int1_2 = d_st_int1 ;
correct := correct and
va_time_1 = va_time_2 and
va_time_2 = d_time ;
correct := correct and
va_t_phys1_1 = va_t_phys1_2 and
va_t_phys1_2 = d_t_phys1 ;
correct := correct and
va_st_phys1_1 = va_st_phys1_2 and
va_st_phys1_2 = d_st_phys1 ;
correct := correct and
va_real_1 = va_real_2 and
va_real_2 = d_real ;
correct := correct and
va_t_real1_1 = va_t_real1_2 and
va_t_real1_2 = d_t_real1 ;
correct := correct and
va_st_real1_1 = va_st_real1_2 and
va_st_real1_2 = d_st_real1 ;
test_report ( "ARCH00670" ,
"Variable default initial values - dynamic subtypes" ,
correct) ;
end p1 ;
begin
process
begin
p1 ;
wait ;
end process ;
end ARCH00670 ;
--
entity ENT00670_Test_Bench is
end ENT00670_Test_Bench ;
--
architecture ARCH00670_Test_Bench of ENT00670_Test_Bench is
begin
L1:
block
component UUT
end component ;
for CIS1 : UUT use entity WORK.E00000 ( ARCH00670 ) ;
begin
CIS1 : UUT ;
end block L1 ;
end ARCH00670_Test_Bench ;
|
-------------------------------------------------------------------------------
-- axi_datamover.vhd
-------------------------------------------------------------------------------
--
-- *************************************************************************
--
-- (c) Copyright 2010-2011 Xilinx, Inc. All rights reserved.
--
-- This file contains confidential and proprietary information
-- of Xilinx, Inc. and is protected under U.S. and
-- international copyright and other intellectual property
-- laws.
--
-- DISCLAIMER
-- This disclaimer is not a license and does not grant any
-- rights to the materials distributed herewith. Except as
-- otherwise provided in a valid license issued to you by
-- Xilinx, and to the maximum extent permitted by applicable
-- law: (1) THESE MATERIALS ARE MADE AVAILABLE "AS IS" AND
-- WITH ALL FAULTS, AND XILINX HEREBY DISCLAIMS ALL WARRANTIES
-- AND CONDITIONS, EXPRESS, IMPLIED, OR STATUTORY, INCLUDING
-- BUT NOT LIMITED TO WARRANTIES OF MERCHANTABILITY, NON-
-- INFRINGEMENT, OR FITNESS FOR ANY PARTICULAR PURPOSE; and
-- (2) Xilinx shall not be liable (whether in contract or tort,
-- including negligence, or under any other theory of
-- liability) for any loss or damage of any kind or nature
-- related to, arising under or in connection with these
-- materials, including for any direct, or any indirect,
-- special, incidental, or consequential loss or damage
-- (including loss of data, profits, goodwill, or any type of
-- loss or damage suffered as a result of any action brought
-- by a third party) even if such damage or loss was
-- reasonably foreseeable or Xilinx had been advised of the
-- possibility of the same.
--
-- CRITICAL APPLICATIONS
-- Xilinx products are not designed or intended to be fail-
-- safe, or for use in any application requiring fail-safe
-- performance, such as life-support or safety devices or
-- systems, Class III medical devices, nuclear facilities,
-- applications related to the deployment of airbags, or any
-- other applications that could lead to death, personal
-- injury, or severe property or environmental damage
-- (individually and collectively, "Critical
-- Applications"). Customer assumes the sole risk and
-- liability of any use of Xilinx products in Critical
-- Applications, subject only to applicable laws and
-- regulations governing limitations on product liability.
--
-- THIS COPYRIGHT NOTICE AND DISCLAIMER MUST BE RETAINED AS
-- PART OF THIS FILE AT ALL TIMES.
--
-- *************************************************************************
--
-------------------------------------------------------------------------------
-- Filename: axi_datamover.vhd
--
-- Description:
-- Top level VHDL wrapper for the AXI DataMover
--
--
--
--
-- VHDL-Standard: VHDL'93
-------------------------------------------------------------------------------
-------------------------------------------------------------------------------
library IEEE;
use IEEE.std_logic_1164.all;
use IEEE.numeric_std.all;
library axi_datamover_v5_1;
use axi_datamover_v5_1.axi_datamover_mm2s_omit_wrap ;
use axi_datamover_v5_1.axi_datamover_mm2s_full_wrap ;
use axi_datamover_v5_1.axi_datamover_mm2s_basic_wrap;
use axi_datamover_v5_1.axi_datamover_s2mm_omit_wrap ;
use axi_datamover_v5_1.axi_datamover_s2mm_full_wrap ;
use axi_datamover_v5_1.axi_datamover_s2mm_basic_wrap;
-------------------------------------------------------------------------------
entity axi_datamover is
generic (
C_INCLUDE_MM2S : Integer range 0 to 2 := 2;
-- Specifies the type of MM2S function to include
-- 0 = Omit MM2S functionality
-- 1 = Full MM2S Functionality
-- 2 = Basic MM2S functionality
C_M_AXI_MM2S_ARID : Integer range 0 to 255 := 0;
-- Specifies the constant value to output on
-- the ARID output port
C_M_AXI_MM2S_ID_WIDTH : Integer range 1 to 8 := 4;
-- Specifies the width of the MM2S ID port
C_M_AXI_MM2S_ADDR_WIDTH : Integer range 32 to 64 := 32;
-- Specifies the width of the MMap Read Address Channel
-- Address bus
C_M_AXI_MM2S_DATA_WIDTH : Integer range 32 to 1024 := 32;
-- Specifies the width of the MMap Read Data Channel
-- data bus
C_M_AXIS_MM2S_TDATA_WIDTH : Integer range 8 to 1024 := 32;
-- Specifies the width of the MM2S Master Stream Data
-- Channel data bus
C_INCLUDE_MM2S_STSFIFO : Integer range 0 to 1 := 1;
-- Specifies if a Status FIFO is to be implemented
-- 0 = Omit MM2S Status FIFO
-- 1 = Include MM2S Status FIFO
C_MM2S_STSCMD_FIFO_DEPTH : Integer range 1 to 16 := 4;
-- Specifies the depth of the MM2S Command FIFO and the
-- optional Status FIFO
-- Valid values are 1,4,8,16
C_MM2S_STSCMD_IS_ASYNC : Integer range 0 to 1 := 0;
-- Specifies if the Status and Command interfaces need to
-- be asynchronous to the primary data path clocking
-- 0 = Use same clocking as data path
-- 1 = Use special Status/Command clock for the interfaces
C_INCLUDE_MM2S_DRE : Integer range 0 to 1 := 1;
-- Specifies if DRE is to be included in the MM2S function
-- 0 = Omit DRE
-- 1 = Include DRE
C_MM2S_BURST_SIZE : Integer range 2 to 256 := 16;
-- Specifies the max number of databeats to use for MMap
-- burst transfers by the MM2S function
C_MM2S_BTT_USED : Integer range 8 to 23 := 16;
-- Specifies the number of bits used from the BTT field
-- of the input Command Word of the MM2S Command Interface
C_MM2S_ADDR_PIPE_DEPTH : Integer range 1 to 30 := 3;
-- This parameter specifies the depth of the MM2S internal
-- child command queues in the Read Address Controller and
-- the Read Data Controller. Increasing this value will
-- allow more Read Addresses to be issued to the AXI4 Read
-- Address Channel before receipt of the associated read
-- data on the Read Data Channel.
C_MM2S_INCLUDE_SF : Integer range 0 to 1 := 1 ;
-- This parameter specifies the inclusion/omission of the
-- MM2S (Read) Store and Forward function
-- 0 = Omit MM2S Store and Forward
-- 1 = Include MM2S Store and Forward
C_INCLUDE_S2MM : Integer range 0 to 4 := 2;
-- Specifies the type of S2MM function to include
-- 0 = Omit S2MM functionality
-- 1 = Full S2MM Functionality
-- 2 = Basic S2MM functionality
C_M_AXI_S2MM_AWID : Integer range 0 to 255 := 1;
-- Specifies the constant value to output on
-- the ARID output port
C_M_AXI_S2MM_ID_WIDTH : Integer range 1 to 8 := 4;
-- Specifies the width of the S2MM ID port
C_M_AXI_S2MM_ADDR_WIDTH : Integer range 32 to 64 := 32;
-- Specifies the width of the MMap Read Address Channel
-- Address bus
C_M_AXI_S2MM_DATA_WIDTH : Integer range 32 to 1024 := 32;
-- Specifies the width of the MMap Read Data Channel
-- data bus
C_S_AXIS_S2MM_TDATA_WIDTH : Integer range 8 to 1024 := 32;
-- Specifies the width of the S2MM Master Stream Data
-- Channel data bus
C_INCLUDE_S2MM_STSFIFO : Integer range 0 to 1 := 1;
-- Specifies if a Status FIFO is to be implemented
-- 0 = Omit S2MM Status FIFO
-- 1 = Include S2MM Status FIFO
C_S2MM_STSCMD_FIFO_DEPTH : Integer range 1 to 16 := 4;
-- Specifies the depth of the S2MM Command FIFO and the
-- optional Status FIFO
-- Valid values are 1,4,8,16
C_S2MM_STSCMD_IS_ASYNC : Integer range 0 to 1 := 0;
-- Specifies if the Status and Command interfaces need to
-- be asynchronous to the primary data path clocking
-- 0 = Use same clocking as data path
-- 1 = Use special Status/Command clock for the interfaces
C_INCLUDE_S2MM_DRE : Integer range 0 to 1 := 1;
-- Specifies if DRE is to be included in the S2MM function
-- 0 = Omit DRE
-- 1 = Include DRE
C_S2MM_BURST_SIZE : Integer range 2 to 256 := 16;
-- Specifies the max number of databeats to use for MMap
-- burst transfers by the S2MM function
C_S2MM_BTT_USED : Integer range 8 to 23 := 16;
-- Specifies the number of bits used from the BTT field
-- of the input Command Word of the S2MM Command Interface
C_S2MM_SUPPORT_INDET_BTT : Integer range 0 to 1 := 0;
-- Specifies if support for indeterminate packet lengths
-- are to be received on the input Stream interface
-- 0 = Omit support (User MUST transfer the exact number of
-- bytes on the Stream interface as specified in the BTT
-- field of the Corresponding DataMover Command)
-- 1 = Include support for indeterminate packet lengths
-- This causes FIFOs to be added and "Store and Forward"
-- behavior of the S2MM function
C_S2MM_ADDR_PIPE_DEPTH : Integer range 1 to 30 := 3;
-- This parameter specifies the depth of the S2MM internal
-- address pipeline queues in the Write Address Controller
-- and the Write Data Controller. Increasing this value will
-- allow more Write Addresses to be issued to the AXI4 Write
-- Address Channel before transmission of the associated
-- write data on the Write Data Channel.
C_S2MM_INCLUDE_SF : Integer range 0 to 1 := 1 ;
-- This parameter specifies the inclusion/omission of the
-- S2MM (Write) Store and Forward function
-- 0 = Omit S2MM Store and Forward
-- 1 = Include S2MM Store and Forward
C_ENABLE_CACHE_USER : integer range 0 to 1 := 0;
C_ENABLE_SKID_BUF : string := "11111";
C_ENABLE_MM2S_TKEEP : integer range 0 to 1 := 1;
C_ENABLE_S2MM_TKEEP : integer range 0 to 1 := 1;
C_ENABLE_S2MM_ADV_SIG : integer range 0 to 1 := 0;
C_ENABLE_MM2S_ADV_SIG : integer range 0 to 1 := 0;
C_MICRO_DMA : integer range 0 to 1 := 0;
C_CMD_WIDTH : integer range 72 to 112 := 72;
C_FAMILY : String := "virtex7"
-- Specifies the target FPGA family type
);
port (
-- MM2S Primary Clock input ----------------------------------
m_axi_mm2s_aclk : in std_logic; --
-- Primary synchronization clock for the Master side --
-- interface and internal logic. It is also used --
-- for the User interface synchronization when --
-- C_STSCMD_IS_ASYNC = 0. --
--
-- MM2S Primary Reset input --
m_axi_mm2s_aresetn : in std_logic; --
-- Reset used for the internal master logic --
--------------------------------------------------------------
-- MM2S Halt request input control --------------------
mm2s_halt : in std_logic; --
-- Active high soft shutdown request --
--
-- MM2S Halt Complete status flag --
mm2s_halt_cmplt : Out std_logic; --
-- Active high soft shutdown complete status --
-------------------------------------------------------
-- Error discrete output -------------------------
mm2s_err : Out std_logic; --
-- Composite Error indication --
--------------------------------------------------
-- Memory Map to Stream Command FIFO and Status FIFO I/O ---------
m_axis_mm2s_cmdsts_aclk : in std_logic; --
-- Secondary Clock input for async CMD/Status interface --
--
m_axis_mm2s_cmdsts_aresetn : in std_logic; --
-- Secondary Reset input for async CMD/Status interface --
------------------------------------------------------------------
-- User Command Interface Ports (AXI Stream) -------------------------------------------------
s_axis_mm2s_cmd_tvalid : in std_logic; --
s_axis_mm2s_cmd_tready : out std_logic; --
s_axis_mm2s_cmd_tdata : in std_logic_vector(C_CMD_WIDTH-1 downto 0); --
----------------------------------------------------------------------------------------------
-- User Status Interface Ports (AXI Stream) ------------------------
m_axis_mm2s_sts_tvalid : out std_logic; --
m_axis_mm2s_sts_tready : in std_logic; --
m_axis_mm2s_sts_tdata : out std_logic_vector(7 downto 0); --
m_axis_mm2s_sts_tkeep : out std_logic_vector(0 downto 0); --
m_axis_mm2s_sts_tlast : out std_logic; --
--------------------------------------------------------------------
-- Address Posting contols -----------------------
mm2s_allow_addr_req : in std_logic; --
mm2s_addr_req_posted : out std_logic; --
mm2s_rd_xfer_cmplt : out std_logic; --
--------------------------------------------------
-- MM2S AXI Address Channel I/O --------------------------------------------------
m_axi_mm2s_arid : out std_logic_vector(C_M_AXI_MM2S_ID_WIDTH-1 downto 0); --
-- AXI Address Channel ID output --
--
m_axi_mm2s_araddr : out std_logic_vector(C_M_AXI_MM2S_ADDR_WIDTH-1 downto 0); --
-- AXI Address Channel Address output --
--
m_axi_mm2s_arlen : out std_logic_vector(7 downto 0); --
-- AXI Address Channel LEN output --
-- Sized to support 256 data beat bursts --
--
m_axi_mm2s_arsize : out std_logic_vector(2 downto 0); --
-- AXI Address Channel SIZE output --
--
m_axi_mm2s_arburst : out std_logic_vector(1 downto 0); --
-- AXI Address Channel BURST output --
--
m_axi_mm2s_arprot : out std_logic_vector(2 downto 0); --
-- AXI Address Channel PROT output --
--
m_axi_mm2s_arcache : out std_logic_vector(3 downto 0); --
-- AXI Address Channel CACHE output --
m_axi_mm2s_aruser : out std_logic_vector(3 downto 0); --
-- AXI Address Channel USER output --
--
m_axi_mm2s_arvalid : out std_logic; --
-- AXI Address Channel VALID output --
--
m_axi_mm2s_arready : in std_logic; --
-- AXI Address Channel READY input --
-----------------------------------------------------------------------------------
-- Currently unsupported AXI Address Channel output signals -------
-- m_axi_mm2s_alock : out std_logic_vector(2 downto 0); --
-- m_axi_mm2s_acache : out std_logic_vector(4 downto 0); --
-- m_axi_mm2s_aqos : out std_logic_vector(3 downto 0); --
-- m_axi_mm2s_aregion : out std_logic_vector(3 downto 0); --
-------------------------------------------------------------------
-- MM2S AXI MMap Read Data Channel I/O ------------------------------------------------
m_axi_mm2s_rdata : In std_logic_vector(C_M_AXI_MM2S_DATA_WIDTH-1 downto 0); --
m_axi_mm2s_rresp : In std_logic_vector(1 downto 0); --
m_axi_mm2s_rlast : In std_logic; --
m_axi_mm2s_rvalid : In std_logic; --
m_axi_mm2s_rready : Out std_logic; --
----------------------------------------------------------------------------------------
-- MM2S AXI Master Stream Channel I/O -------------------------------------------------------
m_axis_mm2s_tdata : Out std_logic_vector(C_M_AXIS_MM2S_TDATA_WIDTH-1 downto 0); --
m_axis_mm2s_tkeep : Out std_logic_vector((C_M_AXIS_MM2S_TDATA_WIDTH/8)-1 downto 0); --
m_axis_mm2s_tlast : Out std_logic; --
m_axis_mm2s_tvalid : Out std_logic; --
m_axis_mm2s_tready : In std_logic; --
----------------------------------------------------------------------------------------------
-- Testing Support I/O --------------------------------------------------------
mm2s_dbg_sel : in std_logic_vector( 3 downto 0); --
mm2s_dbg_data : out std_logic_vector(31 downto 0) ; --
-------------------------------------------------------------------------------
-- S2MM Primary Clock input ---------------------------------
m_axi_s2mm_aclk : in std_logic; --
-- Primary synchronization clock for the Master side --
-- interface and internal logic. It is also used --
-- for the User interface synchronization when --
-- C_STSCMD_IS_ASYNC = 0. --
--
-- S2MM Primary Reset input --
m_axi_s2mm_aresetn : in std_logic; --
-- Reset used for the internal master logic --
-------------------------------------------------------------
-- S2MM Halt request input control ------------------
s2mm_halt : in std_logic; --
-- Active high soft shutdown request --
--
-- S2MM Halt Complete status flag --
s2mm_halt_cmplt : out std_logic; --
-- Active high soft shutdown complete status --
-----------------------------------------------------
-- S2MM Error discrete output ------------------
s2mm_err : Out std_logic; --
-- Composite Error indication --
------------------------------------------------
-- Memory Map to Stream Command FIFO and Status FIFO I/O -----------------
m_axis_s2mm_cmdsts_awclk : in std_logic; --
-- Secondary Clock input for async CMD/Status interface --
--
m_axis_s2mm_cmdsts_aresetn : in std_logic; --
-- Secondary Reset input for async CMD/Status interface --
--------------------------------------------------------------------------
-- User Command Interface Ports (AXI Stream) --------------------------------------------------
s_axis_s2mm_cmd_tvalid : in std_logic; --
s_axis_s2mm_cmd_tready : out std_logic; --
s_axis_s2mm_cmd_tdata : in std_logic_vector(C_CMD_WIDTH-1 downto 0); --
-----------------------------------------------------------------------------------------------
-- User Status Interface Ports (AXI Stream) -----------------------------------------------------------
m_axis_s2mm_sts_tvalid : out std_logic; --
m_axis_s2mm_sts_tready : in std_logic; --
m_axis_s2mm_sts_tdata : out std_logic_vector(((C_S2MM_SUPPORT_INDET_BTT*24)+8)-1 downto 0); --
m_axis_s2mm_sts_tkeep : out std_logic_vector((((C_S2MM_SUPPORT_INDET_BTT*24)+8)/8)-1 downto 0); --
m_axis_s2mm_sts_tlast : out std_logic; --
-------------------------------------------------------------------------------------------------------
-- Address posting controls -----------------------------------------
s2mm_allow_addr_req : in std_logic; --
s2mm_addr_req_posted : out std_logic; --
s2mm_wr_xfer_cmplt : out std_logic; --
s2mm_ld_nxt_len : out std_logic; --
s2mm_wr_len : out std_logic_vector(7 downto 0); --
---------------------------------------------------------------------
-- S2MM AXI Address Channel I/O ----------------------------------------------------
m_axi_s2mm_awid : out std_logic_vector(C_M_AXI_S2MM_ID_WIDTH-1 downto 0); --
-- AXI Address Channel ID output --
--
m_axi_s2mm_awaddr : out std_logic_vector(C_M_AXI_S2MM_ADDR_WIDTH-1 downto 0); --
-- AXI Address Channel Address output --
--
m_axi_s2mm_awlen : out std_logic_vector(7 downto 0); --
-- AXI Address Channel LEN output --
-- Sized to support 256 data beat bursts --
--
m_axi_s2mm_awsize : out std_logic_vector(2 downto 0); --
-- AXI Address Channel SIZE output --
--
m_axi_s2mm_awburst : out std_logic_vector(1 downto 0); --
-- AXI Address Channel BURST output --
--
m_axi_s2mm_awprot : out std_logic_vector(2 downto 0); --
-- AXI Address Channel PROT output --
--
m_axi_s2mm_awcache : out std_logic_vector(3 downto 0); --
-- AXI Address Channel CACHE output --
m_axi_s2mm_awuser : out std_logic_vector(3 downto 0); --
-- AXI Address Channel USER output --
--
m_axi_s2mm_awvalid : out std_logic; --
-- AXI Address Channel VALID output --
--
m_axi_s2mm_awready : in std_logic; --
-- AXI Address Channel READY input --
-------------------------------------------------------------------------------------
-- Currently unsupported AXI Address Channel output signals -------
-- m_axi_s2mm__awlock : out std_logic_vector(2 downto 0); --
-- m_axi_s2mm__awcache : out std_logic_vector(4 downto 0); --
-- m_axi_s2mm__awqos : out std_logic_vector(3 downto 0); --
-- m_axi_s2mm__awregion : out std_logic_vector(3 downto 0); --
-------------------------------------------------------------------
-- S2MM AXI MMap Write Data Channel I/O --------------------------------------------------
m_axi_s2mm_wdata : Out std_logic_vector(C_M_AXI_S2MM_DATA_WIDTH-1 downto 0); --
m_axi_s2mm_wstrb : Out std_logic_vector((C_M_AXI_S2MM_DATA_WIDTH/8)-1 downto 0); --
m_axi_s2mm_wlast : Out std_logic; --
m_axi_s2mm_wvalid : Out std_logic; --
m_axi_s2mm_wready : In std_logic; --
-------------------------------------------------------------------------------------------
-- S2MM AXI MMap Write response Channel I/O -------------------------
m_axi_s2mm_bresp : In std_logic_vector(1 downto 0); --
m_axi_s2mm_bvalid : In std_logic; --
m_axi_s2mm_bready : Out std_logic; --
----------------------------------------------------------------------
-- S2MM AXI Slave Stream Channel I/O -------------------------------------------------------
s_axis_s2mm_tdata : In std_logic_vector(C_S_AXIS_S2MM_TDATA_WIDTH-1 downto 0); --
s_axis_s2mm_tkeep : In std_logic_vector((C_S_AXIS_S2MM_TDATA_WIDTH/8)-1 downto 0); --
s_axis_s2mm_tlast : In std_logic; --
s_axis_s2mm_tvalid : In std_logic; --
s_axis_s2mm_tready : Out std_logic; --
---------------------------------------------------------------------------------------------
-- Testing Support I/O ------------------------------------------------
s2mm_dbg_sel : in std_logic_vector( 3 downto 0); --
s2mm_dbg_data : out std_logic_vector(31 downto 0) --
------------------------------------------------------------------------
);
end entity axi_datamover;
architecture implementation of axi_datamover is
attribute DowngradeIPIdentifiedWarnings: string;
attribute DowngradeIPIdentifiedWarnings of implementation : architecture is "yes";
-- Function Declarations
-------------------------------------------------------------------
-- Function
--
-- Function Name: funct_clip_brst_len
--
-- Function Description:
-- This function is used to limit the parameterized max burst
-- databeats when the tranfer data width is 256 bits or greater.
-- This is required to keep from crossing the 4K byte xfer
-- boundary required by AXI. This process is further complicated
-- by the inclusion/omission of upsizers or downsizers in the
-- data path.
--
-------------------------------------------------------------------
function funct_clip_brst_len (param_burst_beats : integer;
mmap_transfer_bit_width : integer;
stream_transfer_bit_width : integer;
down_up_sizers_enabled : integer) return integer is
constant FCONST_SIZERS_ENABLED : boolean := (down_up_sizers_enabled > 0);
Variable fvar_max_burst_dbeats : Integer;
begin
if (FCONST_SIZERS_ENABLED) then -- use MMap dwidth for calc
If (mmap_transfer_bit_width <= 128) Then -- allowed
fvar_max_burst_dbeats := param_burst_beats;
Elsif (mmap_transfer_bit_width <= 256) Then
If (param_burst_beats <= 128) Then
fvar_max_burst_dbeats := param_burst_beats;
Else
fvar_max_burst_dbeats := 128;
End if;
Elsif (mmap_transfer_bit_width <= 512) Then
If (param_burst_beats <= 64) Then
fvar_max_burst_dbeats := param_burst_beats;
Else
fvar_max_burst_dbeats := 64;
End if;
Else -- 1024 bit mmap width case
If (param_burst_beats <= 32) Then
fvar_max_burst_dbeats := param_burst_beats;
Else
fvar_max_burst_dbeats := 32;
End if;
End if;
else -- use stream dwidth for calc
If (stream_transfer_bit_width <= 128) Then -- allowed
fvar_max_burst_dbeats := param_burst_beats;
Elsif (stream_transfer_bit_width <= 256) Then
If (param_burst_beats <= 128) Then
fvar_max_burst_dbeats := param_burst_beats;
Else
fvar_max_burst_dbeats := 128;
End if;
Elsif (stream_transfer_bit_width <= 512) Then
If (param_burst_beats <= 64) Then
fvar_max_burst_dbeats := param_burst_beats;
Else
fvar_max_burst_dbeats := 64;
End if;
Else -- 1024 bit stream width case
If (param_burst_beats <= 32) Then
fvar_max_burst_dbeats := param_burst_beats;
Else
fvar_max_burst_dbeats := 32;
End if;
End if;
end if;
Return (fvar_max_burst_dbeats);
end function funct_clip_brst_len;
-------------------------------------------------------------------
-- Function
--
-- Function Name: funct_fix_depth_16
--
-- Function Description:
-- This function is used to fix the Command and Status FIFO depths to
-- 16 entries when Async clocking mode is enabled. This is required
-- due to the way the async_fifo_fg.vhd design in proc_common is
-- implemented.
-------------------------------------------------------------------
function funct_fix_depth_16 (async_clocking_mode : integer;
requested_depth : integer) return integer is
Variable fvar_depth_2_use : Integer;
begin
If (async_clocking_mode = 1) Then -- async mode so fix at 16
fvar_depth_2_use := 16;
Elsif (requested_depth > 16) Then -- limit at 16
fvar_depth_2_use := 16;
Else -- use requested depth
fvar_depth_2_use := requested_depth;
End if;
Return (fvar_depth_2_use);
end function funct_fix_depth_16;
-------------------------------------------------------------------
-- Function
--
-- Function Name: funct_get_min_btt_width
--
-- Function Description:
-- This function calculates the minimum required value
-- for the used width of the command BTT field.
--
-------------------------------------------------------------------
function funct_get_min_btt_width (max_burst_beats : integer;
bytes_per_beat : integer ) return integer is
Variable var_min_btt_needed : Integer;
Variable var_max_bytes_per_burst : Integer;
begin
var_max_bytes_per_burst := max_burst_beats*bytes_per_beat;
if (var_max_bytes_per_burst <= 16) then
var_min_btt_needed := 5;
elsif (var_max_bytes_per_burst <= 32) then
var_min_btt_needed := 6;
elsif (var_max_bytes_per_burst <= 64) then
var_min_btt_needed := 7;
elsif (var_max_bytes_per_burst <= 128) then
var_min_btt_needed := 8;
elsif (var_max_bytes_per_burst <= 256) then
var_min_btt_needed := 9;
elsif (var_max_bytes_per_burst <= 512) then
var_min_btt_needed := 10;
elsif (var_max_bytes_per_burst <= 1024) then
var_min_btt_needed := 11;
elsif (var_max_bytes_per_burst <= 2048) then
var_min_btt_needed := 12;
elsif (var_max_bytes_per_burst <= 4096) then
var_min_btt_needed := 13;
else -- 8K byte range
var_min_btt_needed := 14;
end if;
Return (var_min_btt_needed);
end function funct_get_min_btt_width;
-------------------------------------------------------------------
-- Function
--
-- Function Name: funct_get_xfer_bytes_per_dbeat
--
-- Function Description:
-- Calculates the nuber of bytes that will transfered per databeat
-- on the AXI4 MMap Bus.
--
-------------------------------------------------------------------
function funct_get_xfer_bytes_per_dbeat (mmap_transfer_bit_width : integer;
stream_transfer_bit_width : integer;
down_up_sizers_enabled : integer) return integer is
Variable temp_bytes_per_dbeat : Integer := 4;
begin
if (down_up_sizers_enabled > 0) then -- down/up sizers are in use, use full mmap dwidth
temp_bytes_per_dbeat := mmap_transfer_bit_width/8;
else -- No down/up sizers so use Stream data width
temp_bytes_per_dbeat := stream_transfer_bit_width/8;
end if;
Return (temp_bytes_per_dbeat);
end function funct_get_xfer_bytes_per_dbeat;
-------------------------------------------------------------------
-- Function
--
-- Function Name: funct_fix_btt_used
--
-- Function Description:
-- THis function makes sure the BTT width used is at least the
-- minimum needed.
--
-------------------------------------------------------------------
function funct_fix_btt_used (requested_btt_width : integer;
min_btt_width : integer) return integer is
Variable var_corrected_btt_width : Integer;
begin
If (requested_btt_width < min_btt_width) Then
var_corrected_btt_width := min_btt_width;
else
var_corrected_btt_width := requested_btt_width;
End if;
Return (var_corrected_btt_width);
end function funct_fix_btt_used;
function funct_fix_addr (in_addr_width : integer) return integer is
Variable new_addr_width : Integer;
begin
If (in_addr_width <= 32) Then
new_addr_width := 32;
elsif (in_addr_width > 32 and in_addr_width <= 40) Then
new_addr_width := 40;
elsif (in_addr_width > 40 and in_addr_width <= 48) Then
new_addr_width := 48;
elsif (in_addr_width > 48 and in_addr_width <= 56) Then
new_addr_width := 56;
else
new_addr_width := 64;
End if;
Return (new_addr_width);
end function funct_fix_addr;
-------------------------------------------------------------------
-- Constant Declarations
-------------------------------------------------------------------
Constant MM2S_TAG_WIDTH : integer := 4;
Constant S2MM_TAG_WIDTH : integer := 4;
Constant MM2S_DOWNSIZER_ENABLED : integer := C_MM2S_INCLUDE_SF;
Constant S2MM_UPSIZER_ENABLED : integer := C_S2MM_INCLUDE_SF + C_S2MM_SUPPORT_INDET_BTT;
Constant MM2S_MAX_BURST_BEATS : integer := funct_clip_brst_len(C_MM2S_BURST_SIZE,
C_M_AXI_MM2S_DATA_WIDTH,
C_M_AXIS_MM2S_TDATA_WIDTH,
MM2S_DOWNSIZER_ENABLED);
Constant S2MM_MAX_BURST_BEATS : integer := funct_clip_brst_len(C_S2MM_BURST_SIZE,
C_M_AXI_S2MM_DATA_WIDTH,
C_S_AXIS_S2MM_TDATA_WIDTH,
S2MM_UPSIZER_ENABLED);
Constant MM2S_CMDSTS_FIFO_DEPTH : integer := funct_fix_depth_16(C_MM2S_STSCMD_IS_ASYNC,
C_MM2S_STSCMD_FIFO_DEPTH);
Constant S2MM_CMDSTS_FIFO_DEPTH : integer := funct_fix_depth_16(C_S2MM_STSCMD_IS_ASYNC,
C_S2MM_STSCMD_FIFO_DEPTH);
Constant MM2S_BYTES_PER_BEAT : integer := funct_get_xfer_bytes_per_dbeat(C_M_AXI_MM2S_DATA_WIDTH,
C_M_AXIS_MM2S_TDATA_WIDTH,
MM2S_DOWNSIZER_ENABLED);
Constant MM2S_MIN_BTT_NEEDED : integer := funct_get_min_btt_width(MM2S_MAX_BURST_BEATS,
MM2S_BYTES_PER_BEAT);
Constant MM2S_CORRECTED_BTT_USED : integer := funct_fix_btt_used(C_MM2S_BTT_USED,
MM2S_MIN_BTT_NEEDED);
Constant S2MM_BYTES_PER_BEAT : integer := funct_get_xfer_bytes_per_dbeat(C_M_AXI_S2MM_DATA_WIDTH,
C_S_AXIS_S2MM_TDATA_WIDTH,
S2MM_UPSIZER_ENABLED);
Constant S2MM_MIN_BTT_NEEDED : integer := funct_get_min_btt_width(S2MM_MAX_BURST_BEATS,
S2MM_BYTES_PER_BEAT);
Constant S2MM_CORRECTED_BTT_USED : integer := funct_fix_btt_used(C_S2MM_BTT_USED,
S2MM_MIN_BTT_NEEDED);
constant C_M_AXI_MM2S_ADDR_WIDTH_int : integer := funct_fix_addr(C_M_AXI_MM2S_ADDR_WIDTH);
constant C_M_AXI_S2MM_ADDR_WIDTH_int : integer := funct_fix_addr(C_M_AXI_S2MM_ADDR_WIDTH);
-- Signals
signal sig_mm2s_tstrb : std_logic_vector((C_M_AXIS_MM2S_TDATA_WIDTH/8)-1 downto 0) := (others => '0');
signal sig_mm2s_sts_tstrb : std_logic_vector(0 downto 0) := (others => '0');
signal sig_s2mm_tstrb : std_logic_vector((C_S_AXIS_S2MM_TDATA_WIDTH/8)-1 downto 0) := (others => '0');
signal sig_s2mm_sts_tstrb : std_logic_vector((((C_S2MM_SUPPORT_INDET_BTT*24)+8)/8)-1 downto 0) := (others => '0');
signal m_axi_mm2s_araddr_int : std_logic_vector (C_M_AXI_MM2S_ADDR_WIDTH_int-1 downto 0) ;
signal m_axi_s2mm_awaddr_int : std_logic_vector (C_M_AXI_S2MM_ADDR_WIDTH_int-1 downto 0) ;
begin --(architecture implementation)
-------------------------------------------------------------
-- Conversion to tkeep for external stream connnections
-------------------------------------------------------------
-- MM2S Status Stream Output
m_axis_mm2s_sts_tkeep <= sig_mm2s_sts_tstrb ;
GEN_MM2S_TKEEP_ENABLE1 : if C_ENABLE_MM2S_TKEEP = 1 generate
begin
-- MM2S Stream Output
m_axis_mm2s_tkeep <= sig_mm2s_tstrb ;
end generate GEN_MM2S_TKEEP_ENABLE1;
GEN_MM2S_TKEEP_DISABLE1 : if C_ENABLE_MM2S_TKEEP = 0 generate
begin
m_axis_mm2s_tkeep <= (others => '1');
end generate GEN_MM2S_TKEEP_DISABLE1;
GEN_S2MM_TKEEP_ENABLE1 : if C_ENABLE_S2MM_TKEEP = 1 generate
begin
-- S2MM Stream Input
sig_s2mm_tstrb <= s_axis_s2mm_tkeep ;
end generate GEN_S2MM_TKEEP_ENABLE1;
GEN_S2MM_TKEEP_DISABLE1 : if C_ENABLE_S2MM_TKEEP = 0 generate
begin
sig_s2mm_tstrb <= (others => '1');
end generate GEN_S2MM_TKEEP_DISABLE1;
-- S2MM Status Stream Output
m_axis_s2mm_sts_tkeep <= sig_s2mm_sts_tstrb ;
------------------------------------------------------------
-- If Generate
--
-- Label: GEN_MM2S_OMIT
--
-- If Generate Description:
-- Instantiate the MM2S OMIT Wrapper
--
--
------------------------------------------------------------
GEN_MM2S_OMIT : if (C_INCLUDE_MM2S = 0) generate
begin
------------------------------------------------------------
-- Instance: I_MM2S_OMIT_WRAPPER
--
-- Description:
-- Read omit Wrapper Instance
--
------------------------------------------------------------
I_MM2S_OMIT_WRAPPER : entity axi_datamover_v5_1.axi_datamover_mm2s_omit_wrap
generic map (
C_INCLUDE_MM2S => C_INCLUDE_MM2S ,
C_MM2S_ARID => C_M_AXI_MM2S_ARID ,
C_MM2S_ID_WIDTH => C_M_AXI_MM2S_ID_WIDTH ,
C_MM2S_ADDR_WIDTH => C_M_AXI_MM2S_ADDR_WIDTH_int ,
C_MM2S_MDATA_WIDTH => C_M_AXI_MM2S_DATA_WIDTH ,
C_MM2S_SDATA_WIDTH => C_M_AXIS_MM2S_TDATA_WIDTH ,
C_INCLUDE_MM2S_STSFIFO => C_INCLUDE_MM2S_STSFIFO ,
C_MM2S_STSCMD_FIFO_DEPTH => MM2S_CMDSTS_FIFO_DEPTH ,
C_MM2S_STSCMD_IS_ASYNC => C_MM2S_STSCMD_IS_ASYNC ,
C_INCLUDE_MM2S_DRE => C_INCLUDE_MM2S_DRE ,
C_MM2S_BURST_SIZE => MM2S_MAX_BURST_BEATS ,
C_MM2S_BTT_USED => MM2S_CORRECTED_BTT_USED ,
C_MM2S_ADDR_PIPE_DEPTH => C_MM2S_ADDR_PIPE_DEPTH ,
C_TAG_WIDTH => MM2S_TAG_WIDTH ,
C_ENABLE_CACHE_USER => C_ENABLE_CACHE_USER ,
C_FAMILY => C_FAMILY
)
port map (
mm2s_aclk => m_axi_mm2s_aclk ,
mm2s_aresetn => m_axi_mm2s_aresetn ,
mm2s_halt => mm2s_halt ,
mm2s_halt_cmplt => mm2s_halt_cmplt ,
mm2s_err => mm2s_err ,
mm2s_cmdsts_awclk => m_axis_mm2s_cmdsts_aclk ,
mm2s_cmdsts_aresetn => m_axis_mm2s_cmdsts_aresetn ,
mm2s_cmd_wvalid => s_axis_mm2s_cmd_tvalid ,
mm2s_cmd_wready => s_axis_mm2s_cmd_tready ,
mm2s_cmd_wdata => s_axis_mm2s_cmd_tdata ,
mm2s_sts_wvalid => m_axis_mm2s_sts_tvalid ,
mm2s_sts_wready => m_axis_mm2s_sts_tready ,
mm2s_sts_wdata => m_axis_mm2s_sts_tdata ,
mm2s_sts_wstrb => sig_mm2s_sts_tstrb ,
mm2s_sts_wlast => m_axis_mm2s_sts_tlast ,
mm2s_allow_addr_req => mm2s_allow_addr_req ,
mm2s_addr_req_posted => mm2s_addr_req_posted ,
mm2s_rd_xfer_cmplt => mm2s_rd_xfer_cmplt ,
mm2s_arid => m_axi_mm2s_arid ,
mm2s_araddr => m_axi_mm2s_araddr_int ,
mm2s_arlen => m_axi_mm2s_arlen ,
mm2s_arsize => m_axi_mm2s_arsize ,
mm2s_arburst => m_axi_mm2s_arburst ,
mm2s_arprot => m_axi_mm2s_arprot ,
mm2s_arcache => m_axi_mm2s_arcache ,
mm2s_aruser => m_axi_mm2s_aruser ,
mm2s_arvalid => m_axi_mm2s_arvalid ,
mm2s_arready => m_axi_mm2s_arready ,
mm2s_rdata => m_axi_mm2s_rdata ,
mm2s_rresp => m_axi_mm2s_rresp ,
mm2s_rlast => m_axi_mm2s_rlast ,
mm2s_rvalid => m_axi_mm2s_rvalid ,
mm2s_rready => m_axi_mm2s_rready ,
mm2s_strm_wdata => m_axis_mm2s_tdata ,
mm2s_strm_wstrb => sig_mm2s_tstrb ,
mm2s_strm_wlast => m_axis_mm2s_tlast ,
mm2s_strm_wvalid => m_axis_mm2s_tvalid ,
mm2s_strm_wready => m_axis_mm2s_tready ,
mm2s_dbg_sel => mm2s_dbg_sel ,
mm2s_dbg_data => mm2s_dbg_data
);
end generate GEN_MM2S_OMIT;
------------------------------------------------------------
-- If Generate
--
-- Label: GEN_MM2S_FULL
--
-- If Generate Description:
-- Instantiate the MM2S Full Wrapper
--
--
------------------------------------------------------------
GEN_MM2S_FULL : if (C_INCLUDE_MM2S = 1) generate
begin
------------------------------------------------------------
-- Instance: I_MM2S_FULL_WRAPPER
--
-- Description:
-- Read Full Wrapper Instance
--
------------------------------------------------------------
I_MM2S_FULL_WRAPPER : entity axi_datamover_v5_1.axi_datamover_mm2s_full_wrap
generic map (
C_INCLUDE_MM2S => C_INCLUDE_MM2S ,
C_MM2S_ARID => C_M_AXI_MM2S_ARID ,
C_MM2S_ID_WIDTH => C_M_AXI_MM2S_ID_WIDTH ,
C_MM2S_ADDR_WIDTH => C_M_AXI_MM2S_ADDR_WIDTH_int ,
C_MM2S_MDATA_WIDTH => C_M_AXI_MM2S_DATA_WIDTH ,
C_MM2S_SDATA_WIDTH => C_M_AXIS_MM2S_TDATA_WIDTH ,
C_INCLUDE_MM2S_STSFIFO => C_INCLUDE_MM2S_STSFIFO ,
C_MM2S_STSCMD_FIFO_DEPTH => MM2S_CMDSTS_FIFO_DEPTH ,
C_MM2S_STSCMD_IS_ASYNC => C_MM2S_STSCMD_IS_ASYNC ,
C_INCLUDE_MM2S_DRE => C_INCLUDE_MM2S_DRE ,
C_MM2S_BURST_SIZE => MM2S_MAX_BURST_BEATS ,
C_MM2S_BTT_USED => MM2S_CORRECTED_BTT_USED ,
C_MM2S_ADDR_PIPE_DEPTH => C_MM2S_ADDR_PIPE_DEPTH ,
C_TAG_WIDTH => MM2S_TAG_WIDTH ,
C_INCLUDE_MM2S_GP_SF => C_MM2S_INCLUDE_SF ,
C_ENABLE_CACHE_USER => C_ENABLE_CACHE_USER ,
C_ENABLE_MM2S_TKEEP => C_ENABLE_MM2S_TKEEP ,
C_ENABLE_SKID_BUF => C_ENABLE_SKID_BUF ,
C_FAMILY => C_FAMILY
)
port map (
mm2s_aclk => m_axi_mm2s_aclk ,
mm2s_aresetn => m_axi_mm2s_aresetn ,
mm2s_halt => mm2s_halt ,
mm2s_halt_cmplt => mm2s_halt_cmplt ,
mm2s_err => mm2s_err ,
mm2s_cmdsts_awclk => m_axis_mm2s_cmdsts_aclk ,
mm2s_cmdsts_aresetn => m_axis_mm2s_cmdsts_aresetn ,
mm2s_cmd_wvalid => s_axis_mm2s_cmd_tvalid ,
mm2s_cmd_wready => s_axis_mm2s_cmd_tready ,
mm2s_cmd_wdata => s_axis_mm2s_cmd_tdata ,
mm2s_sts_wvalid => m_axis_mm2s_sts_tvalid ,
mm2s_sts_wready => m_axis_mm2s_sts_tready ,
mm2s_sts_wdata => m_axis_mm2s_sts_tdata ,
mm2s_sts_wstrb => sig_mm2s_sts_tstrb ,
mm2s_sts_wlast => m_axis_mm2s_sts_tlast ,
mm2s_allow_addr_req => mm2s_allow_addr_req ,
mm2s_addr_req_posted => mm2s_addr_req_posted ,
mm2s_rd_xfer_cmplt => mm2s_rd_xfer_cmplt ,
mm2s_arid => m_axi_mm2s_arid ,
mm2s_araddr => m_axi_mm2s_araddr_int ,
mm2s_arlen => m_axi_mm2s_arlen ,
mm2s_arsize => m_axi_mm2s_arsize ,
mm2s_arburst => m_axi_mm2s_arburst ,
mm2s_arprot => m_axi_mm2s_arprot ,
mm2s_arcache => m_axi_mm2s_arcache ,
mm2s_aruser => m_axi_mm2s_aruser ,
mm2s_arvalid => m_axi_mm2s_arvalid ,
mm2s_arready => m_axi_mm2s_arready ,
mm2s_rdata => m_axi_mm2s_rdata ,
mm2s_rresp => m_axi_mm2s_rresp ,
mm2s_rlast => m_axi_mm2s_rlast ,
mm2s_rvalid => m_axi_mm2s_rvalid ,
mm2s_rready => m_axi_mm2s_rready ,
mm2s_strm_wdata => m_axis_mm2s_tdata ,
mm2s_strm_wstrb => sig_mm2s_tstrb ,
mm2s_strm_wlast => m_axis_mm2s_tlast ,
mm2s_strm_wvalid => m_axis_mm2s_tvalid ,
mm2s_strm_wready => m_axis_mm2s_tready ,
mm2s_dbg_sel => mm2s_dbg_sel ,
mm2s_dbg_data => mm2s_dbg_data
);
end generate GEN_MM2S_FULL;
------------------------------------------------------------
-- If Generate
--
-- Label: GEN_MM2S_BASIC
--
-- If Generate Description:
-- Instantiate the MM2S Basic Wrapper
--
--
------------------------------------------------------------
GEN_MM2S_BASIC : if (C_INCLUDE_MM2S = 2) generate
begin
------------------------------------------------------------
-- Instance: I_MM2S_BASIC_WRAPPER
--
-- Description:
-- Read Basic Wrapper Instance
--
------------------------------------------------------------
I_MM2S_BASIC_WRAPPER : entity axi_datamover_v5_1.axi_datamover_mm2s_basic_wrap
generic map (
C_INCLUDE_MM2S => C_INCLUDE_MM2S ,
C_MM2S_ARID => C_M_AXI_MM2S_ARID ,
C_MM2S_ID_WIDTH => C_M_AXI_MM2S_ID_WIDTH ,
C_MM2S_ADDR_WIDTH => C_M_AXI_MM2S_ADDR_WIDTH_int ,
C_MM2S_MDATA_WIDTH => C_M_AXI_MM2S_DATA_WIDTH ,
C_MM2S_SDATA_WIDTH => C_M_AXIS_MM2S_TDATA_WIDTH ,
C_INCLUDE_MM2S_STSFIFO => C_INCLUDE_MM2S_STSFIFO ,
C_MM2S_STSCMD_FIFO_DEPTH => MM2S_CMDSTS_FIFO_DEPTH ,
C_MM2S_STSCMD_IS_ASYNC => C_MM2S_STSCMD_IS_ASYNC ,
C_INCLUDE_MM2S_DRE => C_INCLUDE_MM2S_DRE ,
C_MM2S_BURST_SIZE => MM2S_MAX_BURST_BEATS ,
C_MM2S_BTT_USED => MM2S_CORRECTED_BTT_USED ,
C_MM2S_ADDR_PIPE_DEPTH => C_MM2S_ADDR_PIPE_DEPTH ,
C_TAG_WIDTH => MM2S_TAG_WIDTH ,
C_ENABLE_CACHE_USER => C_ENABLE_CACHE_USER ,
C_ENABLE_SKID_BUF => C_ENABLE_SKID_BUF ,
C_MICRO_DMA => C_MICRO_DMA ,
C_FAMILY => C_FAMILY
)
port map (
mm2s_aclk => m_axi_mm2s_aclk ,
mm2s_aresetn => m_axi_mm2s_aresetn ,
mm2s_halt => mm2s_halt ,
mm2s_halt_cmplt => mm2s_halt_cmplt ,
mm2s_err => mm2s_err ,
mm2s_cmdsts_awclk => m_axis_mm2s_cmdsts_aclk ,
mm2s_cmdsts_aresetn => m_axis_mm2s_cmdsts_aresetn ,
mm2s_cmd_wvalid => s_axis_mm2s_cmd_tvalid ,
mm2s_cmd_wready => s_axis_mm2s_cmd_tready ,
mm2s_cmd_wdata => s_axis_mm2s_cmd_tdata ,
mm2s_sts_wvalid => m_axis_mm2s_sts_tvalid ,
mm2s_sts_wready => m_axis_mm2s_sts_tready ,
mm2s_sts_wdata => m_axis_mm2s_sts_tdata ,
mm2s_sts_wstrb => sig_mm2s_sts_tstrb ,
mm2s_sts_wlast => m_axis_mm2s_sts_tlast ,
mm2s_allow_addr_req => mm2s_allow_addr_req ,
mm2s_addr_req_posted => mm2s_addr_req_posted ,
mm2s_rd_xfer_cmplt => mm2s_rd_xfer_cmplt ,
mm2s_arid => m_axi_mm2s_arid ,
mm2s_araddr => m_axi_mm2s_araddr_int ,
mm2s_arlen => m_axi_mm2s_arlen ,
mm2s_arsize => m_axi_mm2s_arsize ,
mm2s_arburst => m_axi_mm2s_arburst ,
mm2s_arprot => m_axi_mm2s_arprot ,
mm2s_arcache => m_axi_mm2s_arcache ,
mm2s_aruser => m_axi_mm2s_aruser ,
mm2s_arvalid => m_axi_mm2s_arvalid ,
mm2s_arready => m_axi_mm2s_arready ,
mm2s_rdata => m_axi_mm2s_rdata ,
mm2s_rresp => m_axi_mm2s_rresp ,
mm2s_rlast => m_axi_mm2s_rlast ,
mm2s_rvalid => m_axi_mm2s_rvalid ,
mm2s_rready => m_axi_mm2s_rready ,
mm2s_strm_wdata => m_axis_mm2s_tdata ,
mm2s_strm_wstrb => sig_mm2s_tstrb ,
mm2s_strm_wlast => m_axis_mm2s_tlast ,
mm2s_strm_wvalid => m_axis_mm2s_tvalid ,
mm2s_strm_wready => m_axis_mm2s_tready ,
mm2s_dbg_sel => mm2s_dbg_sel ,
mm2s_dbg_data => mm2s_dbg_data
);
end generate GEN_MM2S_BASIC;
------------------------------------------------------------
-- If Generate
--
-- Label: GEN_S2MM_OMIT
--
-- If Generate Description:
-- Instantiate the S2MM OMIT Wrapper
--
--
------------------------------------------------------------
GEN_S2MM_OMIT : if (C_INCLUDE_S2MM = 0) generate
begin
------------------------------------------------------------
-- Instance: I_S2MM_OMIT_WRAPPER
--
-- Description:
-- Write Omit Wrapper Instance
--
------------------------------------------------------------
I_S2MM_OMIT_WRAPPER : entity axi_datamover_v5_1.axi_datamover_s2mm_omit_wrap
generic map (
C_INCLUDE_S2MM => C_INCLUDE_S2MM ,
C_S2MM_AWID => C_M_AXI_S2MM_AWID ,
C_S2MM_ID_WIDTH => C_M_AXI_S2MM_ID_WIDTH ,
C_S2MM_ADDR_WIDTH => C_M_AXI_S2MM_ADDR_WIDTH_int ,
C_S2MM_MDATA_WIDTH => C_M_AXI_S2MM_DATA_WIDTH ,
C_S2MM_SDATA_WIDTH => C_S_AXIS_S2MM_TDATA_WIDTH ,
C_INCLUDE_S2MM_STSFIFO => C_INCLUDE_S2MM_STSFIFO ,
C_S2MM_STSCMD_FIFO_DEPTH => S2MM_CMDSTS_FIFO_DEPTH ,
C_S2MM_STSCMD_IS_ASYNC => C_S2MM_STSCMD_IS_ASYNC ,
C_INCLUDE_S2MM_DRE => C_INCLUDE_S2MM_DRE ,
C_S2MM_BURST_SIZE => S2MM_MAX_BURST_BEATS ,
C_S2MM_SUPPORT_INDET_BTT => C_S2MM_SUPPORT_INDET_BTT ,
C_S2MM_ADDR_PIPE_DEPTH => C_S2MM_ADDR_PIPE_DEPTH ,
C_TAG_WIDTH => S2MM_TAG_WIDTH ,
C_ENABLE_CACHE_USER => C_ENABLE_CACHE_USER ,
C_FAMILY => C_FAMILY
)
port map (
s2mm_aclk => m_axi_s2mm_aclk ,
s2mm_aresetn => m_axi_s2mm_aresetn ,
s2mm_halt => s2mm_halt ,
s2mm_halt_cmplt => s2mm_halt_cmplt ,
s2mm_err => s2mm_err ,
s2mm_cmdsts_awclk => m_axis_s2mm_cmdsts_awclk ,
s2mm_cmdsts_aresetn => m_axis_s2mm_cmdsts_aresetn ,
s2mm_cmd_wvalid => s_axis_s2mm_cmd_tvalid ,
s2mm_cmd_wready => s_axis_s2mm_cmd_tready ,
s2mm_cmd_wdata => s_axis_s2mm_cmd_tdata ,
s2mm_sts_wvalid => m_axis_s2mm_sts_tvalid ,
s2mm_sts_wready => m_axis_s2mm_sts_tready ,
s2mm_sts_wdata => m_axis_s2mm_sts_tdata ,
s2mm_sts_wstrb => sig_s2mm_sts_tstrb ,
s2mm_sts_wlast => m_axis_s2mm_sts_tlast ,
s2mm_allow_addr_req => s2mm_allow_addr_req ,
s2mm_addr_req_posted => s2mm_addr_req_posted ,
s2mm_wr_xfer_cmplt => s2mm_wr_xfer_cmplt ,
s2mm_ld_nxt_len => s2mm_ld_nxt_len ,
s2mm_wr_len => s2mm_wr_len ,
s2mm_awid => m_axi_s2mm_awid ,
s2mm_awaddr => m_axi_s2mm_awaddr_int ,
s2mm_awlen => m_axi_s2mm_awlen ,
s2mm_awsize => m_axi_s2mm_awsize ,
s2mm_awburst => m_axi_s2mm_awburst ,
s2mm_awprot => m_axi_s2mm_awprot ,
s2mm_awcache => m_axi_s2mm_awcache ,
s2mm_awuser => m_axi_s2mm_awuser ,
s2mm_awvalid => m_axi_s2mm_awvalid ,
s2mm_awready => m_axi_s2mm_awready ,
s2mm_wdata => m_axi_s2mm_wdata ,
s2mm_wstrb => m_axi_s2mm_wstrb ,
s2mm_wlast => m_axi_s2mm_wlast ,
s2mm_wvalid => m_axi_s2mm_wvalid ,
s2mm_wready => m_axi_s2mm_wready ,
s2mm_bresp => m_axi_s2mm_bresp ,
s2mm_bvalid => m_axi_s2mm_bvalid ,
s2mm_bready => m_axi_s2mm_bready ,
s2mm_strm_wdata => s_axis_s2mm_tdata ,
s2mm_strm_wstrb => sig_s2mm_tstrb ,
s2mm_strm_wlast => s_axis_s2mm_tlast ,
s2mm_strm_wvalid => s_axis_s2mm_tvalid ,
s2mm_strm_wready => s_axis_s2mm_tready ,
s2mm_dbg_sel => s2mm_dbg_sel ,
s2mm_dbg_data => s2mm_dbg_data
);
end generate GEN_S2MM_OMIT;
------------------------------------------------------------
-- If Generate
--
-- Label: GEN_S2MM_FULL
--
-- If Generate Description:
-- Instantiate the S2MM FULL Wrapper
--
--
------------------------------------------------------------
GEN_S2MM_FULL : if (C_INCLUDE_S2MM = 1) generate
begin
------------------------------------------------------------
-- Instance: I_S2MM_FULL_WRAPPER
--
-- Description:
-- Write Full Wrapper Instance
--
------------------------------------------------------------
I_S2MM_FULL_WRAPPER : entity axi_datamover_v5_1.axi_datamover_s2mm_full_wrap
generic map (
C_INCLUDE_S2MM => C_INCLUDE_S2MM ,
C_S2MM_AWID => C_M_AXI_S2MM_AWID ,
C_S2MM_ID_WIDTH => C_M_AXI_S2MM_ID_WIDTH ,
C_S2MM_ADDR_WIDTH => C_M_AXI_S2MM_ADDR_WIDTH_int ,
C_S2MM_MDATA_WIDTH => C_M_AXI_S2MM_DATA_WIDTH ,
C_S2MM_SDATA_WIDTH => C_S_AXIS_S2MM_TDATA_WIDTH ,
C_INCLUDE_S2MM_STSFIFO => C_INCLUDE_S2MM_STSFIFO ,
C_S2MM_STSCMD_FIFO_DEPTH => S2MM_CMDSTS_FIFO_DEPTH ,
C_S2MM_STSCMD_IS_ASYNC => C_S2MM_STSCMD_IS_ASYNC ,
C_INCLUDE_S2MM_DRE => C_INCLUDE_S2MM_DRE ,
C_S2MM_BURST_SIZE => S2MM_MAX_BURST_BEATS ,
C_S2MM_BTT_USED => S2MM_CORRECTED_BTT_USED ,
C_S2MM_SUPPORT_INDET_BTT => C_S2MM_SUPPORT_INDET_BTT ,
C_S2MM_ADDR_PIPE_DEPTH => C_S2MM_ADDR_PIPE_DEPTH ,
C_TAG_WIDTH => S2MM_TAG_WIDTH ,
C_INCLUDE_S2MM_GP_SF => C_S2MM_INCLUDE_SF ,
C_ENABLE_CACHE_USER => C_ENABLE_CACHE_USER ,
C_ENABLE_S2MM_TKEEP => C_ENABLE_S2MM_TKEEP ,
C_ENABLE_SKID_BUF => C_ENABLE_SKID_BUF ,
C_FAMILY => C_FAMILY
)
port map (
s2mm_aclk => m_axi_s2mm_aclk ,
s2mm_aresetn => m_axi_s2mm_aresetn ,
s2mm_halt => s2mm_halt ,
s2mm_halt_cmplt => s2mm_halt_cmplt ,
s2mm_err => s2mm_err ,
s2mm_cmdsts_awclk => m_axis_s2mm_cmdsts_awclk ,
s2mm_cmdsts_aresetn => m_axis_s2mm_cmdsts_aresetn ,
s2mm_cmd_wvalid => s_axis_s2mm_cmd_tvalid ,
s2mm_cmd_wready => s_axis_s2mm_cmd_tready ,
s2mm_cmd_wdata => s_axis_s2mm_cmd_tdata ,
s2mm_sts_wvalid => m_axis_s2mm_sts_tvalid ,
s2mm_sts_wready => m_axis_s2mm_sts_tready ,
s2mm_sts_wdata => m_axis_s2mm_sts_tdata ,
s2mm_sts_wstrb => sig_s2mm_sts_tstrb ,
s2mm_sts_wlast => m_axis_s2mm_sts_tlast ,
s2mm_allow_addr_req => s2mm_allow_addr_req ,
s2mm_addr_req_posted => s2mm_addr_req_posted ,
s2mm_wr_xfer_cmplt => s2mm_wr_xfer_cmplt ,
s2mm_ld_nxt_len => s2mm_ld_nxt_len ,
s2mm_wr_len => s2mm_wr_len ,
s2mm_awid => m_axi_s2mm_awid ,
s2mm_awaddr => m_axi_s2mm_awaddr_int ,
s2mm_awlen => m_axi_s2mm_awlen ,
s2mm_awsize => m_axi_s2mm_awsize ,
s2mm_awburst => m_axi_s2mm_awburst ,
s2mm_awprot => m_axi_s2mm_awprot ,
s2mm_awcache => m_axi_s2mm_awcache ,
s2mm_awuser => m_axi_s2mm_awuser ,
s2mm_awvalid => m_axi_s2mm_awvalid ,
s2mm_awready => m_axi_s2mm_awready ,
s2mm_wdata => m_axi_s2mm_wdata ,
s2mm_wstrb => m_axi_s2mm_wstrb ,
s2mm_wlast => m_axi_s2mm_wlast ,
s2mm_wvalid => m_axi_s2mm_wvalid ,
s2mm_wready => m_axi_s2mm_wready ,
s2mm_bresp => m_axi_s2mm_bresp ,
s2mm_bvalid => m_axi_s2mm_bvalid ,
s2mm_bready => m_axi_s2mm_bready ,
s2mm_strm_wdata => s_axis_s2mm_tdata ,
s2mm_strm_wstrb => sig_s2mm_tstrb ,
s2mm_strm_wlast => s_axis_s2mm_tlast ,
s2mm_strm_wvalid => s_axis_s2mm_tvalid ,
s2mm_strm_wready => s_axis_s2mm_tready ,
s2mm_dbg_sel => s2mm_dbg_sel ,
s2mm_dbg_data => s2mm_dbg_data
);
end generate GEN_S2MM_FULL;
------------------------------------------------------------
-- If Generate
--
-- Label: GEN_S2MM_BASIC
--
-- If Generate Description:
-- Instantiate the S2MM Basic Wrapper
--
--
------------------------------------------------------------
GEN_S2MM_BASIC : if (C_INCLUDE_S2MM = 2) generate
begin
------------------------------------------------------------
-- Instance: I_S2MM_BASIC_WRAPPER
--
-- Description:
-- Write Basic Wrapper Instance
--
------------------------------------------------------------
I_S2MM_BASIC_WRAPPER : entity axi_datamover_v5_1.axi_datamover_s2mm_basic_wrap
generic map (
C_INCLUDE_S2MM => C_INCLUDE_S2MM ,
C_S2MM_AWID => C_M_AXI_S2MM_AWID ,
C_S2MM_ID_WIDTH => C_M_AXI_S2MM_ID_WIDTH ,
C_S2MM_ADDR_WIDTH => C_M_AXI_S2MM_ADDR_WIDTH_int ,
C_S2MM_MDATA_WIDTH => C_M_AXI_S2MM_DATA_WIDTH ,
C_S2MM_SDATA_WIDTH => C_S_AXIS_S2MM_TDATA_WIDTH ,
C_INCLUDE_S2MM_STSFIFO => C_INCLUDE_S2MM_STSFIFO ,
C_S2MM_STSCMD_FIFO_DEPTH => S2MM_CMDSTS_FIFO_DEPTH ,
C_S2MM_STSCMD_IS_ASYNC => C_S2MM_STSCMD_IS_ASYNC ,
C_INCLUDE_S2MM_DRE => C_INCLUDE_S2MM_DRE ,
C_S2MM_BURST_SIZE => S2MM_MAX_BURST_BEATS ,
C_S2MM_ADDR_PIPE_DEPTH => C_S2MM_ADDR_PIPE_DEPTH ,
C_TAG_WIDTH => S2MM_TAG_WIDTH ,
C_ENABLE_CACHE_USER => C_ENABLE_CACHE_USER ,
C_ENABLE_SKID_BUF => C_ENABLE_SKID_BUF ,
C_MICRO_DMA => C_MICRO_DMA ,
C_FAMILY => C_FAMILY
)
port map (
s2mm_aclk => m_axi_s2mm_aclk ,
s2mm_aresetn => m_axi_s2mm_aresetn ,
s2mm_halt => s2mm_halt ,
s2mm_halt_cmplt => s2mm_halt_cmplt ,
s2mm_err => s2mm_err ,
s2mm_cmdsts_awclk => m_axis_s2mm_cmdsts_awclk ,
s2mm_cmdsts_aresetn => m_axis_s2mm_cmdsts_aresetn ,
s2mm_cmd_wvalid => s_axis_s2mm_cmd_tvalid ,
s2mm_cmd_wready => s_axis_s2mm_cmd_tready ,
s2mm_cmd_wdata => s_axis_s2mm_cmd_tdata ,
s2mm_sts_wvalid => m_axis_s2mm_sts_tvalid ,
s2mm_sts_wready => m_axis_s2mm_sts_tready ,
s2mm_sts_wdata => m_axis_s2mm_sts_tdata ,
s2mm_sts_wstrb => sig_s2mm_sts_tstrb ,
s2mm_sts_wlast => m_axis_s2mm_sts_tlast ,
s2mm_allow_addr_req => s2mm_allow_addr_req ,
s2mm_addr_req_posted => s2mm_addr_req_posted ,
s2mm_wr_xfer_cmplt => s2mm_wr_xfer_cmplt ,
s2mm_ld_nxt_len => s2mm_ld_nxt_len ,
s2mm_wr_len => s2mm_wr_len ,
s2mm_awid => m_axi_s2mm_awid ,
s2mm_awaddr => m_axi_s2mm_awaddr_int ,
s2mm_awlen => m_axi_s2mm_awlen ,
s2mm_awsize => m_axi_s2mm_awsize ,
s2mm_awburst => m_axi_s2mm_awburst ,
s2mm_awprot => m_axi_s2mm_awprot ,
s2mm_awcache => m_axi_s2mm_awcache ,
s2mm_awuser => m_axi_s2mm_awuser ,
s2mm_awvalid => m_axi_s2mm_awvalid ,
s2mm_awready => m_axi_s2mm_awready ,
s2mm_wdata => m_axi_s2mm_wdata ,
s2mm_wstrb => m_axi_s2mm_wstrb ,
s2mm_wlast => m_axi_s2mm_wlast ,
s2mm_wvalid => m_axi_s2mm_wvalid ,
s2mm_wready => m_axi_s2mm_wready ,
s2mm_bresp => m_axi_s2mm_bresp ,
s2mm_bvalid => m_axi_s2mm_bvalid ,
s2mm_bready => m_axi_s2mm_bready ,
s2mm_strm_wdata => s_axis_s2mm_tdata ,
s2mm_strm_wstrb => sig_s2mm_tstrb ,
s2mm_strm_wlast => s_axis_s2mm_tlast ,
s2mm_strm_wvalid => s_axis_s2mm_tvalid ,
s2mm_strm_wready => s_axis_s2mm_tready ,
s2mm_dbg_sel => s2mm_dbg_sel ,
s2mm_dbg_data => s2mm_dbg_data
);
end generate GEN_S2MM_BASIC;
m_axi_mm2s_araddr <= m_axi_mm2s_araddr_int (C_M_AXI_MM2S_ADDR_WIDTH-1 downto 0);
m_axi_s2mm_awaddr <= m_axi_s2mm_awaddr_int (C_M_AXI_S2MM_ADDR_WIDTH-1 downto 0);
end implementation;
|
-- alu_ctrl.vhd
library ieee;
use ieee.std_logic_1164.all;
use work.myTypes.all;
entity alu_ctrl is
port (
OP : in AluOp;
ALU_WORD : out std_logic_vector(12 downto 0)
);
end alu_ctrl;
architecture bhe of alu_ctrl is
signal out_mux_sel : std_logic_vector(2 downto 0);
signal left_right : std_logic;
signal logic_arith : std_logic;
signal sign_to_adder : std_logic;
signal lu_ctrl : std_logic_vector(1 downto 0);
signal comp_sel : std_logic_vector(2 downto 0);
signal enable_to_booth : std_logic;
signal sign_to_booth : std_logic;
begin
enable_to_booth <= '1' when OP = MULTS or OP = MULTU else
'0';
ALU_WORD <= out_mux_sel&left_right&logic_arith&sign_to_adder&lu_ctrl&comp_sel&enable_to_booth&sign_to_booth;
-- combinatorial process used to send the right data to components
process(OP)
begin
case OP is
-- when NOP we do a random LU operation, maybe change this into something smarter??
when NOP =>
out_mux_sel <= "100";
sign_to_booth <= '0'; -- useless but avoids errors on simulation
when SLLS =>
out_mux_sel <= "010";
left_right <= '0';
logic_arith <= '0';
when SRLS =>
out_mux_sel <= "010";
left_right <= '1';
logic_arith <= '0';
when SRAS =>
out_mux_sel <= "010";
left_right <= '1';
logic_arith <= '1';
when ADDS =>
sign_to_adder <= '0';
out_mux_sel <= "000";
when ADDUS =>
sign_to_adder <= '0';
out_mux_sel <= "000";
when SUBS =>
sign_to_adder <= '1';
out_mux_sel <= "000";
when SUBUS =>
sign_to_adder <= '1';
out_mux_sel <= "000";
when ANDS =>
lu_ctrl <= "00";
out_mux_sel <= "001";
when ORS =>
lu_ctrl <= "01";
out_mux_sel <= "001";
when XORS =>
lu_ctrl <= "10";
out_mux_sel <= "001";
when SEQS =>
sign_to_adder <= '1';
comp_sel <= "100";
out_mux_sel <= "011";
sign_to_booth <= '0';
when SNES =>
sign_to_adder <= '1';
comp_sel <= "101";
out_mux_sel <= "011";
sign_to_booth <= '0';
when SLTS =>
sign_to_adder <= '1';
comp_sel <= "010";
out_mux_sel <= "011";
sign_to_booth <= '1';
when SGTS =>
sign_to_adder <= '1';
comp_sel <= "000";
out_mux_sel <= "011";
sign_to_booth <= '1';
when SLES =>
sign_to_adder <= '1';
comp_sel <= "011";
out_mux_sel <= "011";
sign_to_booth <= '1';
when SGES =>
sign_to_adder <= '1';
comp_sel <= "001";
out_mux_sel <= "011";
sign_to_booth <= '1';
-- UNIMPLEMENTED OPS
-- when MOVI2SS => DOUT <= (others => '0');
-- when MOVS2IS => DOUT <= (others => '0');
-- when MOVFS => DOUT <= (others => '0');
-- when MOVDS => DOUT <= (others => '0');
-- when MOVFP2IS => DOUT <= (others => '0');
-- when MOVI2FP => DOUT <= (others => '0');
-- when MOVI2TS => DOUT <= (others => '0');
-- when MOVT2IS => DOUT <= (others => '0');
when SLTUS =>
sign_to_adder <= '1';
comp_sel <= "010";
out_mux_sel <= "011";
sign_to_booth <= '0';
when SGTUS =>
sign_to_adder <= '1';
comp_sel <= "000";
out_mux_sel <= "011";
sign_to_booth <= '0';
when SLEUS =>
sign_to_adder <= '1';
comp_sel <= "011";
out_mux_sel <= "011";
sign_to_booth <= '0';
when SGEUS =>
sign_to_adder <= '1';
comp_sel <= "001";
out_mux_sel <= "011";
sign_to_booth <= '0';
when MULTU =>
out_mux_sel <= "101";
sign_to_booth <= '0';
when MULTS =>
out_mux_sel <= "101";
sign_to_booth <= '1';
when others => out_mux_sel <= "000";
end case;
end process;
end bhe;
|
-- -------------------------------------------------------------
--
-- Entity Declaration for inst_a_e
--
-- Generated
-- by: wig
-- on: Sat Mar 3 11:02:57 2007
-- cmd: /cygdrive/c/Documents and Settings/wig/My Documents/work/MIX/mix_0.pl -nodelta ../../udc.xls
--
-- !!! Do not edit this file! Autogenerated by MIX !!!
-- $Author: wig $
-- $Id: inst_a_e-e.vhd,v 1.1 2007/03/03 11:17:34 wig Exp $
-- $Date: 2007/03/03 11:17:34 $
-- $Log: inst_a_e-e.vhd,v $
-- Revision 1.1 2007/03/03 11:17:34 wig
-- Extended ::udc: language dependent %AINS% and %PINS%: e.g. <VHDL>...</VHDL>
--
--
-- Based on Mix Entity Template built into RCSfile: MixWriter.pm,v
-- Id: MixWriter.pm,v 1.101 2007/03/01 16:28:38 wig Exp
--
-- Generator: mix_0.pl Version: Revision: 1.47 , wilfried.gaensheimer@micronas.com
-- (C) 2003,2005 Micronas GmbH
--
-- --------------------------------------------------------------
library IEEE;
use IEEE.std_logic_1164.all;
-- No project specific VHDL libraries/enty
--
--
-- Start of Generated Entity inst_a_e
--
entity inst_a_e is
HOOK: global hook in entity
-- Generics:
-- No Generated Generics for Entity inst_a_e
-- Generated Port Declaration:
port(
-- Generated Port for Entity inst_a_e
p_mix_signal_aa_ba_go : out std_ulogic;
p_mix_signal_bb_ab_gi : in std_ulogic_vector(7 downto 0)
-- End of Generated Port for Entity inst_a_e
);
end inst_a_e;
--
-- End of Generated Entity inst_a_e
--
--
--!End of Entity/ies
-- --------------------------------------------------------------
|
-- ==============================================================
-- RTL generated by Vivado(TM) HLS - High-Level Synthesis from C, C++ and SystemC
-- Version: 2017.2
-- Copyright (C) 1986-2017 Xilinx, Inc. All Rights Reserved.
--
-- ===========================================================
library IEEE;
use IEEE.std_logic_1164.all;
use IEEE.numeric_std.all;
entity convolve_kernel is
port (
ap_clk : IN STD_LOGIC;
ap_rst : IN STD_LOGIC;
ap_start : IN STD_LOGIC;
ap_done : OUT STD_LOGIC;
ap_idle : OUT STD_LOGIC;
ap_ready : OUT STD_LOGIC;
bufw_Addr_A : OUT STD_LOGIC_VECTOR (31 downto 0);
bufw_EN_A : OUT STD_LOGIC;
bufw_WEN_A : OUT STD_LOGIC_VECTOR (3 downto 0);
bufw_Din_A : OUT STD_LOGIC_VECTOR (31 downto 0);
bufw_Dout_A : IN STD_LOGIC_VECTOR (31 downto 0);
bufw_Clk_A : OUT STD_LOGIC;
bufw_Rst_A : OUT STD_LOGIC;
bufi_Addr_A : OUT STD_LOGIC_VECTOR (31 downto 0);
bufi_EN_A : OUT STD_LOGIC;
bufi_WEN_A : OUT STD_LOGIC_VECTOR (3 downto 0);
bufi_Din_A : OUT STD_LOGIC_VECTOR (31 downto 0);
bufi_Dout_A : IN STD_LOGIC_VECTOR (31 downto 0);
bufi_Clk_A : OUT STD_LOGIC;
bufi_Rst_A : OUT STD_LOGIC;
bufo_Addr_A : OUT STD_LOGIC_VECTOR (31 downto 0);
bufo_EN_A : OUT STD_LOGIC;
bufo_WEN_A : OUT STD_LOGIC_VECTOR (3 downto 0);
bufo_Din_A : OUT STD_LOGIC_VECTOR (31 downto 0);
bufo_Dout_A : IN STD_LOGIC_VECTOR (31 downto 0);
bufo_Clk_A : OUT STD_LOGIC;
bufo_Rst_A : OUT STD_LOGIC );
end;
architecture behav of convolve_kernel is
attribute CORE_GENERATION_INFO : STRING;
attribute CORE_GENERATION_INFO of behav : architecture is
"convolve_kernel,hls_ip_2017_2,{HLS_INPUT_TYPE=cxx,HLS_INPUT_FLOAT=1,HLS_INPUT_FIXED=0,HLS_INPUT_PART=xc7z020clg484-1,HLS_INPUT_CLOCK=10.000000,HLS_INPUT_ARCH=others,HLS_SYN_CLOCK=8.174000,HLS_SYN_LAT=25351,HLS_SYN_TPT=none,HLS_SYN_MEM=0,HLS_SYN_DSP=5,HLS_SYN_FF=1399,HLS_SYN_LUT=1208}";
constant ap_const_logic_1 : STD_LOGIC := '1';
constant ap_const_logic_0 : STD_LOGIC := '0';
constant ap_ST_fsm_state1 : STD_LOGIC_VECTOR (17 downto 0) := "000000000000000001";
constant ap_ST_fsm_state2 : STD_LOGIC_VECTOR (17 downto 0) := "000000000000000010";
constant ap_ST_fsm_state3 : STD_LOGIC_VECTOR (17 downto 0) := "000000000000000100";
constant ap_ST_fsm_state4 : STD_LOGIC_VECTOR (17 downto 0) := "000000000000001000";
constant ap_ST_fsm_state5 : STD_LOGIC_VECTOR (17 downto 0) := "000000000000010000";
constant ap_ST_fsm_state6 : STD_LOGIC_VECTOR (17 downto 0) := "000000000000100000";
constant ap_ST_fsm_state7 : STD_LOGIC_VECTOR (17 downto 0) := "000000000001000000";
constant ap_ST_fsm_state8 : STD_LOGIC_VECTOR (17 downto 0) := "000000000010000000";
constant ap_ST_fsm_state9 : STD_LOGIC_VECTOR (17 downto 0) := "000000000100000000";
constant ap_ST_fsm_state10 : STD_LOGIC_VECTOR (17 downto 0) := "000000001000000000";
constant ap_ST_fsm_state11 : STD_LOGIC_VECTOR (17 downto 0) := "000000010000000000";
constant ap_ST_fsm_state12 : STD_LOGIC_VECTOR (17 downto 0) := "000000100000000000";
constant ap_ST_fsm_state13 : STD_LOGIC_VECTOR (17 downto 0) := "000001000000000000";
constant ap_ST_fsm_state14 : STD_LOGIC_VECTOR (17 downto 0) := "000010000000000000";
constant ap_ST_fsm_state15 : STD_LOGIC_VECTOR (17 downto 0) := "000100000000000000";
constant ap_ST_fsm_state16 : STD_LOGIC_VECTOR (17 downto 0) := "001000000000000000";
constant ap_ST_fsm_state17 : STD_LOGIC_VECTOR (17 downto 0) := "010000000000000000";
constant ap_ST_fsm_state18 : STD_LOGIC_VECTOR (17 downto 0) := "100000000000000000";
constant ap_const_lv32_0 : STD_LOGIC_VECTOR (31 downto 0) := "00000000000000000000000000000000";
constant ap_const_lv32_1 : STD_LOGIC_VECTOR (31 downto 0) := "00000000000000000000000000000001";
constant ap_const_lv32_2 : STD_LOGIC_VECTOR (31 downto 0) := "00000000000000000000000000000010";
constant ap_const_lv32_3 : STD_LOGIC_VECTOR (31 downto 0) := "00000000000000000000000000000011";
constant ap_const_lv32_4 : STD_LOGIC_VECTOR (31 downto 0) := "00000000000000000000000000000100";
constant ap_const_lv32_5 : STD_LOGIC_VECTOR (31 downto 0) := "00000000000000000000000000000101";
constant ap_const_lv1_0 : STD_LOGIC_VECTOR (0 downto 0) := "0";
constant ap_const_lv32_6 : STD_LOGIC_VECTOR (31 downto 0) := "00000000000000000000000000000110";
constant ap_const_lv32_7 : STD_LOGIC_VECTOR (31 downto 0) := "00000000000000000000000000000111";
constant ap_const_lv32_B : STD_LOGIC_VECTOR (31 downto 0) := "00000000000000000000000000001011";
constant ap_const_lv32_10 : STD_LOGIC_VECTOR (31 downto 0) := "00000000000000000000000000010000";
constant ap_const_lv2_0 : STD_LOGIC_VECTOR (1 downto 0) := "00";
constant ap_const_lv1_1 : STD_LOGIC_VECTOR (0 downto 0) := "1";
constant ap_const_lv3_0 : STD_LOGIC_VECTOR (2 downto 0) := "000";
constant ap_const_lv32_11 : STD_LOGIC_VECTOR (31 downto 0) := "00000000000000000000000000010001";
constant ap_const_lv32_A : STD_LOGIC_VECTOR (31 downto 0) := "00000000000000000000000000001010";
constant ap_const_lv4_0 : STD_LOGIC_VECTOR (3 downto 0) := "0000";
constant ap_const_lv4_F : STD_LOGIC_VECTOR (3 downto 0) := "1111";
constant ap_const_lv32_C : STD_LOGIC_VECTOR (31 downto 0) := "00000000000000000000000000001100";
constant ap_const_lv32_8 : STD_LOGIC_VECTOR (31 downto 0) := "00000000000000000000000000001000";
constant ap_const_lv2_3 : STD_LOGIC_VECTOR (1 downto 0) := "11";
constant ap_const_lv2_1 : STD_LOGIC_VECTOR (1 downto 0) := "01";
constant ap_const_lv6_2 : STD_LOGIC_VECTOR (5 downto 0) := "000010";
constant ap_const_lv3_5 : STD_LOGIC_VECTOR (2 downto 0) := "101";
constant ap_const_lv3_1 : STD_LOGIC_VECTOR (2 downto 0) := "001";
constant ap_const_boolean_1 : BOOLEAN := true;
signal ap_CS_fsm : STD_LOGIC_VECTOR (17 downto 0) := "000000000000000001";
attribute fsm_encoding : string;
attribute fsm_encoding of ap_CS_fsm : signal is "none";
signal ap_CS_fsm_state1 : STD_LOGIC;
attribute fsm_encoding of ap_CS_fsm_state1 : signal is "none";
signal row_b_cast6_cast_fu_161_p1 : STD_LOGIC_VECTOR (5 downto 0);
signal row_b_cast6_cast_reg_455 : STD_LOGIC_VECTOR (5 downto 0);
signal ap_CS_fsm_state2 : STD_LOGIC;
attribute fsm_encoding of ap_CS_fsm_state2 : signal is "none";
signal row_b_cast_fu_165_p1 : STD_LOGIC_VECTOR (2 downto 0);
signal row_b_cast_reg_460 : STD_LOGIC_VECTOR (2 downto 0);
signal row_b_1_fu_175_p2 : STD_LOGIC_VECTOR (1 downto 0);
signal row_b_1_reg_468 : STD_LOGIC_VECTOR (1 downto 0);
signal col_b_cast5_cast_fu_181_p1 : STD_LOGIC_VECTOR (5 downto 0);
signal col_b_cast5_cast_reg_473 : STD_LOGIC_VECTOR (5 downto 0);
signal ap_CS_fsm_state3 : STD_LOGIC;
attribute fsm_encoding of ap_CS_fsm_state3 : signal is "none";
signal col_b_cast_fu_185_p1 : STD_LOGIC_VECTOR (2 downto 0);
signal col_b_cast_reg_478 : STD_LOGIC_VECTOR (2 downto 0);
signal col_b_1_fu_195_p2 : STD_LOGIC_VECTOR (1 downto 0);
signal col_b_1_reg_486 : STD_LOGIC_VECTOR (1 downto 0);
signal tmp_10_cast_fu_223_p1 : STD_LOGIC_VECTOR (5 downto 0);
signal tmp_10_cast_reg_491 : STD_LOGIC_VECTOR (5 downto 0);
signal ap_CS_fsm_state4 : STD_LOGIC;
attribute fsm_encoding of ap_CS_fsm_state4 : signal is "none";
signal bufo_addr_reg_496 : STD_LOGIC_VECTOR (4 downto 0);
signal to_b_1_fu_260_p2 : STD_LOGIC_VECTOR (1 downto 0);
signal to_b_1_reg_504 : STD_LOGIC_VECTOR (1 downto 0);
signal tmp_17_fu_291_p2 : STD_LOGIC_VECTOR (63 downto 0);
signal tmp_17_reg_509 : STD_LOGIC_VECTOR (63 downto 0);
signal ap_CS_fsm_state5 : STD_LOGIC;
attribute fsm_encoding of ap_CS_fsm_state5 : signal is "none";
signal tmp_19_cast_fu_315_p1 : STD_LOGIC_VECTOR (6 downto 0);
signal tmp_19_cast_reg_514 : STD_LOGIC_VECTOR (6 downto 0);
signal ti_b_1_fu_325_p2 : STD_LOGIC_VECTOR (1 downto 0);
signal ti_b_1_reg_522 : STD_LOGIC_VECTOR (1 downto 0);
signal tmp_22_fu_356_p2 : STD_LOGIC_VECTOR (8 downto 0);
signal tmp_22_reg_527 : STD_LOGIC_VECTOR (8 downto 0);
signal ap_CS_fsm_state6 : STD_LOGIC;
attribute fsm_encoding of ap_CS_fsm_state6 : signal is "none";
signal i_1_fu_368_p2 : STD_LOGIC_VECTOR (2 downto 0);
signal i_1_reg_535 : STD_LOGIC_VECTOR (2 downto 0);
signal tmp_25_fu_404_p2 : STD_LOGIC_VECTOR (8 downto 0);
signal tmp_25_reg_540 : STD_LOGIC_VECTOR (8 downto 0);
signal tmp_7_fu_362_p2 : STD_LOGIC_VECTOR (0 downto 0);
signal ap_CS_fsm_state7 : STD_LOGIC;
attribute fsm_encoding of ap_CS_fsm_state7 : signal is "none";
signal j_1_fu_430_p2 : STD_LOGIC_VECTOR (2 downto 0);
signal j_1_reg_553 : STD_LOGIC_VECTOR (2 downto 0);
signal tmp_s_fu_424_p2 : STD_LOGIC_VECTOR (0 downto 0);
signal bufw_load_reg_563 : STD_LOGIC_VECTOR (31 downto 0);
signal ap_CS_fsm_state8 : STD_LOGIC;
attribute fsm_encoding of ap_CS_fsm_state8 : signal is "none";
signal bufi_load_reg_568 : STD_LOGIC_VECTOR (31 downto 0);
signal grp_fu_157_p2 : STD_LOGIC_VECTOR (31 downto 0);
signal tmp_4_reg_573 : STD_LOGIC_VECTOR (31 downto 0);
signal ap_CS_fsm_state12 : STD_LOGIC;
attribute fsm_encoding of ap_CS_fsm_state12 : signal is "none";
signal bufo_load_reg_578 : STD_LOGIC_VECTOR (31 downto 0);
signal grp_fu_153_p2 : STD_LOGIC_VECTOR (31 downto 0);
signal tmp_6_reg_583 : STD_LOGIC_VECTOR (31 downto 0);
signal ap_CS_fsm_state17 : STD_LOGIC;
attribute fsm_encoding of ap_CS_fsm_state17 : signal is "none";
signal row_b_reg_87 : STD_LOGIC_VECTOR (1 downto 0);
signal tmp_1_fu_189_p2 : STD_LOGIC_VECTOR (0 downto 0);
signal col_b_reg_98 : STD_LOGIC_VECTOR (1 downto 0);
signal tmp_3_fu_254_p2 : STD_LOGIC_VECTOR (0 downto 0);
signal tmp_fu_169_p2 : STD_LOGIC_VECTOR (0 downto 0);
signal to_b_reg_109 : STD_LOGIC_VECTOR (1 downto 0);
signal tmp_5_fu_319_p2 : STD_LOGIC_VECTOR (0 downto 0);
signal ti_b_reg_120 : STD_LOGIC_VECTOR (1 downto 0);
signal i_reg_131 : STD_LOGIC_VECTOR (2 downto 0);
signal j_reg_142 : STD_LOGIC_VECTOR (2 downto 0);
signal ap_CS_fsm_state18 : STD_LOGIC;
attribute fsm_encoding of ap_CS_fsm_state18 : signal is "none";
signal tmp_14_cast_fu_249_p1 : STD_LOGIC_VECTOR (63 downto 0);
signal tmp_26_cast_fu_419_p1 : STD_LOGIC_VECTOR (63 downto 0);
signal tmp_27_cast_fu_450_p1 : STD_LOGIC_VECTOR (63 downto 0);
signal bufw_Addr_A_orig : STD_LOGIC_VECTOR (31 downto 0);
signal bufi_Addr_A_orig : STD_LOGIC_VECTOR (31 downto 0);
signal ap_CS_fsm_state11 : STD_LOGIC;
attribute fsm_encoding of ap_CS_fsm_state11 : signal is "none";
signal bufo_Addr_A_orig : STD_LOGIC_VECTOR (31 downto 0);
signal ap_CS_fsm_state13 : STD_LOGIC;
attribute fsm_encoding of ap_CS_fsm_state13 : signal is "none";
signal ap_CS_fsm_state9 : STD_LOGIC;
attribute fsm_encoding of ap_CS_fsm_state9 : signal is "none";
signal tmp_8_fu_205_p3 : STD_LOGIC_VECTOR (3 downto 0);
signal p_shl1_cast_fu_213_p1 : STD_LOGIC_VECTOR (4 downto 0);
signal to_b_cast4_cast_fu_201_p1 : STD_LOGIC_VECTOR (4 downto 0);
signal tmp_10_fu_217_p2 : STD_LOGIC_VECTOR (4 downto 0);
signal tmp_11_fu_227_p2 : STD_LOGIC_VECTOR (5 downto 0);
signal tmp_12_fu_232_p2 : STD_LOGIC_VECTOR (5 downto 0);
signal tmp_13_fu_238_p2 : STD_LOGIC_VECTOR (5 downto 0);
signal tmp_14_fu_244_p2 : STD_LOGIC_VECTOR (5 downto 0);
signal ti_b_cast3_cast_fu_266_p1 : STD_LOGIC_VECTOR (5 downto 0);
signal tmp_15_fu_270_p2 : STD_LOGIC_VECTOR (5 downto 0);
signal tmp_16_fu_279_p3 : STD_LOGIC_VECTOR (7 downto 0);
signal tmp_15_cast_fu_275_p1 : STD_LOGIC_VECTOR (63 downto 0);
signal p_shl3_fu_287_p1 : STD_LOGIC_VECTOR (63 downto 0);
signal tmp_18_fu_297_p3 : STD_LOGIC_VECTOR (4 downto 0);
signal p_shl2_cast_fu_305_p1 : STD_LOGIC_VECTOR (5 downto 0);
signal tmp_19_fu_309_p2 : STD_LOGIC_VECTOR (5 downto 0);
signal i_cast2_fu_331_p1 : STD_LOGIC_VECTOR (63 downto 0);
signal tmp_20_fu_335_p2 : STD_LOGIC_VECTOR (63 downto 0);
signal tmp_24_fu_344_p1 : STD_LOGIC_VECTOR (6 downto 0);
signal tmp_21_fu_340_p1 : STD_LOGIC_VECTOR (8 downto 0);
signal p_shl4_cast_fu_348_p3 : STD_LOGIC_VECTOR (8 downto 0);
signal tmp_9_fu_374_p2 : STD_LOGIC_VECTOR (2 downto 0);
signal tmp_9_cast_cast_fu_379_p1 : STD_LOGIC_VECTOR (6 downto 0);
signal tmp_23_fu_383_p2 : STD_LOGIC_VECTOR (6 downto 0);
signal tmp_28_fu_392_p1 : STD_LOGIC_VECTOR (5 downto 0);
signal p_shl5_cast_fu_396_p3 : STD_LOGIC_VECTOR (8 downto 0);
signal tmp_23_cast_fu_388_p1 : STD_LOGIC_VECTOR (8 downto 0);
signal j_cast1_cast_fu_410_p1 : STD_LOGIC_VECTOR (8 downto 0);
signal tmp_26_fu_414_p2 : STD_LOGIC_VECTOR (8 downto 0);
signal tmp_2_fu_436_p2 : STD_LOGIC_VECTOR (2 downto 0);
signal tmp_2_cast_cast_fu_441_p1 : STD_LOGIC_VECTOR (8 downto 0);
signal tmp_27_fu_445_p2 : STD_LOGIC_VECTOR (8 downto 0);
signal ap_NS_fsm : STD_LOGIC_VECTOR (17 downto 0);
component convolve_kernel_fbkb IS
generic (
ID : INTEGER;
NUM_STAGE : INTEGER;
din0_WIDTH : INTEGER;
din1_WIDTH : INTEGER;
dout_WIDTH : INTEGER );
port (
clk : IN STD_LOGIC;
reset : IN STD_LOGIC;
din0 : IN STD_LOGIC_VECTOR (31 downto 0);
din1 : IN STD_LOGIC_VECTOR (31 downto 0);
ce : IN STD_LOGIC;
dout : OUT STD_LOGIC_VECTOR (31 downto 0) );
end component;
component convolve_kernel_fcud IS
generic (
ID : INTEGER;
NUM_STAGE : INTEGER;
din0_WIDTH : INTEGER;
din1_WIDTH : INTEGER;
dout_WIDTH : INTEGER );
port (
clk : IN STD_LOGIC;
reset : IN STD_LOGIC;
din0 : IN STD_LOGIC_VECTOR (31 downto 0);
din1 : IN STD_LOGIC_VECTOR (31 downto 0);
ce : IN STD_LOGIC;
dout : OUT STD_LOGIC_VECTOR (31 downto 0) );
end component;
begin
convolve_kernel_fbkb_U1 : component convolve_kernel_fbkb
generic map (
ID => 1,
NUM_STAGE => 5,
din0_WIDTH => 32,
din1_WIDTH => 32,
dout_WIDTH => 32)
port map (
clk => ap_clk,
reset => ap_rst,
din0 => bufo_load_reg_578,
din1 => tmp_4_reg_573,
ce => ap_const_logic_1,
dout => grp_fu_153_p2);
convolve_kernel_fcud_U2 : component convolve_kernel_fcud
generic map (
ID => 1,
NUM_STAGE => 4,
din0_WIDTH => 32,
din1_WIDTH => 32,
dout_WIDTH => 32)
port map (
clk => ap_clk,
reset => ap_rst,
din0 => bufw_load_reg_563,
din1 => bufi_load_reg_568,
ce => ap_const_logic_1,
dout => grp_fu_157_p2);
ap_CS_fsm_assign_proc : process(ap_clk)
begin
if (ap_clk'event and ap_clk = '1') then
if (ap_rst = '1') then
ap_CS_fsm <= ap_ST_fsm_state1;
else
ap_CS_fsm <= ap_NS_fsm;
end if;
end if;
end process;
col_b_reg_98_assign_proc : process (ap_clk)
begin
if (ap_clk'event and ap_clk = '1') then
if (((ap_const_logic_1 = ap_CS_fsm_state2) and (ap_const_lv1_0 = tmp_fu_169_p2))) then
col_b_reg_98 <= ap_const_lv2_0;
elsif (((ap_const_logic_1 = ap_CS_fsm_state4) and (ap_const_lv1_1 = tmp_3_fu_254_p2))) then
col_b_reg_98 <= col_b_1_reg_486;
end if;
end if;
end process;
i_reg_131_assign_proc : process (ap_clk)
begin
if (ap_clk'event and ap_clk = '1') then
if (((ap_const_logic_1 = ap_CS_fsm_state5) and (ap_const_lv1_0 = tmp_5_fu_319_p2))) then
i_reg_131 <= ap_const_lv3_0;
elsif (((ap_const_logic_1 = ap_CS_fsm_state7) and (tmp_s_fu_424_p2 = ap_const_lv1_1))) then
i_reg_131 <= i_1_reg_535;
end if;
end if;
end process;
j_reg_142_assign_proc : process (ap_clk)
begin
if (ap_clk'event and ap_clk = '1') then
if (((ap_const_logic_1 = ap_CS_fsm_state6) and (tmp_7_fu_362_p2 = ap_const_lv1_0))) then
j_reg_142 <= ap_const_lv3_0;
elsif ((ap_const_logic_1 = ap_CS_fsm_state18)) then
j_reg_142 <= j_1_reg_553;
end if;
end if;
end process;
row_b_reg_87_assign_proc : process (ap_clk)
begin
if (ap_clk'event and ap_clk = '1') then
if (((ap_const_logic_1 = ap_CS_fsm_state3) and (tmp_1_fu_189_p2 = ap_const_lv1_1))) then
row_b_reg_87 <= row_b_1_reg_468;
elsif (((ap_const_logic_1 = ap_CS_fsm_state1) and (ap_start = ap_const_logic_1))) then
row_b_reg_87 <= ap_const_lv2_0;
end if;
end if;
end process;
ti_b_reg_120_assign_proc : process (ap_clk)
begin
if (ap_clk'event and ap_clk = '1') then
if (((ap_const_logic_1 = ap_CS_fsm_state4) and (ap_const_lv1_0 = tmp_3_fu_254_p2))) then
ti_b_reg_120 <= ap_const_lv2_0;
elsif (((ap_const_logic_1 = ap_CS_fsm_state6) and (tmp_7_fu_362_p2 = ap_const_lv1_1))) then
ti_b_reg_120 <= ti_b_1_reg_522;
end if;
end if;
end process;
to_b_reg_109_assign_proc : process (ap_clk)
begin
if (ap_clk'event and ap_clk = '1') then
if (((ap_const_logic_1 = ap_CS_fsm_state3) and (ap_const_lv1_0 = tmp_1_fu_189_p2))) then
to_b_reg_109 <= ap_const_lv2_0;
elsif (((ap_const_logic_1 = ap_CS_fsm_state5) and (ap_const_lv1_1 = tmp_5_fu_319_p2))) then
to_b_reg_109 <= to_b_1_reg_504;
end if;
end if;
end process;
process (ap_clk)
begin
if (ap_clk'event and ap_clk = '1') then
if ((ap_const_logic_1 = ap_CS_fsm_state8)) then
bufi_load_reg_568 <= bufi_Dout_A;
bufw_load_reg_563 <= bufw_Dout_A;
end if;
end if;
end process;
process (ap_clk)
begin
if (ap_clk'event and ap_clk = '1') then
if ((ap_const_logic_1 = ap_CS_fsm_state4)) then
bufo_addr_reg_496 <= tmp_14_cast_fu_249_p1(5 - 1 downto 0);
tmp_10_cast_reg_491 <= tmp_10_cast_fu_223_p1;
to_b_1_reg_504 <= to_b_1_fu_260_p2;
end if;
end if;
end process;
process (ap_clk)
begin
if (ap_clk'event and ap_clk = '1') then
if ((ap_const_logic_1 = ap_CS_fsm_state12)) then
bufo_load_reg_578 <= bufo_Dout_A;
tmp_4_reg_573 <= grp_fu_157_p2;
end if;
end if;
end process;
process (ap_clk)
begin
if (ap_clk'event and ap_clk = '1') then
if ((ap_const_logic_1 = ap_CS_fsm_state3)) then
col_b_1_reg_486 <= col_b_1_fu_195_p2;
col_b_cast5_cast_reg_473(1 downto 0) <= col_b_cast5_cast_fu_181_p1(1 downto 0);
col_b_cast_reg_478(1 downto 0) <= col_b_cast_fu_185_p1(1 downto 0);
end if;
end if;
end process;
process (ap_clk)
begin
if (ap_clk'event and ap_clk = '1') then
if ((ap_const_logic_1 = ap_CS_fsm_state6)) then
i_1_reg_535 <= i_1_fu_368_p2;
tmp_22_reg_527 <= tmp_22_fu_356_p2;
end if;
end if;
end process;
process (ap_clk)
begin
if (ap_clk'event and ap_clk = '1') then
if ((ap_const_logic_1 = ap_CS_fsm_state7)) then
j_1_reg_553 <= j_1_fu_430_p2;
end if;
end if;
end process;
process (ap_clk)
begin
if (ap_clk'event and ap_clk = '1') then
if ((ap_const_logic_1 = ap_CS_fsm_state2)) then
row_b_1_reg_468 <= row_b_1_fu_175_p2;
row_b_cast6_cast_reg_455(1 downto 0) <= row_b_cast6_cast_fu_161_p1(1 downto 0);
row_b_cast_reg_460(1 downto 0) <= row_b_cast_fu_165_p1(1 downto 0);
end if;
end if;
end process;
process (ap_clk)
begin
if (ap_clk'event and ap_clk = '1') then
if ((ap_const_logic_1 = ap_CS_fsm_state5)) then
ti_b_1_reg_522 <= ti_b_1_fu_325_p2;
tmp_17_reg_509 <= tmp_17_fu_291_p2;
tmp_19_cast_reg_514 <= tmp_19_cast_fu_315_p1;
end if;
end if;
end process;
process (ap_clk)
begin
if (ap_clk'event and ap_clk = '1') then
if (((ap_const_logic_1 = ap_CS_fsm_state6) and (tmp_7_fu_362_p2 = ap_const_lv1_0))) then
tmp_25_reg_540 <= tmp_25_fu_404_p2;
end if;
end if;
end process;
process (ap_clk)
begin
if (ap_clk'event and ap_clk = '1') then
if ((ap_const_logic_1 = ap_CS_fsm_state17)) then
tmp_6_reg_583 <= grp_fu_153_p2;
end if;
end if;
end process;
row_b_cast6_cast_reg_455(5 downto 2) <= "0000";
row_b_cast_reg_460(2) <= '0';
col_b_cast5_cast_reg_473(5 downto 2) <= "0000";
col_b_cast_reg_478(2) <= '0';
ap_NS_fsm_assign_proc : process (ap_start, ap_CS_fsm, ap_CS_fsm_state1, ap_CS_fsm_state2, ap_CS_fsm_state3, ap_CS_fsm_state4, ap_CS_fsm_state5, ap_CS_fsm_state6, tmp_7_fu_362_p2, ap_CS_fsm_state7, tmp_s_fu_424_p2, tmp_1_fu_189_p2, tmp_3_fu_254_p2, tmp_fu_169_p2, tmp_5_fu_319_p2)
begin
case ap_CS_fsm is
when ap_ST_fsm_state1 =>
if (((ap_const_logic_1 = ap_CS_fsm_state1) and (ap_start = ap_const_logic_1))) then
ap_NS_fsm <= ap_ST_fsm_state2;
else
ap_NS_fsm <= ap_ST_fsm_state1;
end if;
when ap_ST_fsm_state2 =>
if (((ap_const_logic_1 = ap_CS_fsm_state2) and (ap_const_lv1_1 = tmp_fu_169_p2))) then
ap_NS_fsm <= ap_ST_fsm_state1;
else
ap_NS_fsm <= ap_ST_fsm_state3;
end if;
when ap_ST_fsm_state3 =>
if (((ap_const_logic_1 = ap_CS_fsm_state3) and (tmp_1_fu_189_p2 = ap_const_lv1_1))) then
ap_NS_fsm <= ap_ST_fsm_state2;
else
ap_NS_fsm <= ap_ST_fsm_state4;
end if;
when ap_ST_fsm_state4 =>
if (((ap_const_logic_1 = ap_CS_fsm_state4) and (ap_const_lv1_1 = tmp_3_fu_254_p2))) then
ap_NS_fsm <= ap_ST_fsm_state3;
else
ap_NS_fsm <= ap_ST_fsm_state5;
end if;
when ap_ST_fsm_state5 =>
if (((ap_const_logic_1 = ap_CS_fsm_state5) and (ap_const_lv1_1 = tmp_5_fu_319_p2))) then
ap_NS_fsm <= ap_ST_fsm_state4;
else
ap_NS_fsm <= ap_ST_fsm_state6;
end if;
when ap_ST_fsm_state6 =>
if (((ap_const_logic_1 = ap_CS_fsm_state6) and (tmp_7_fu_362_p2 = ap_const_lv1_1))) then
ap_NS_fsm <= ap_ST_fsm_state5;
else
ap_NS_fsm <= ap_ST_fsm_state7;
end if;
when ap_ST_fsm_state7 =>
if (((ap_const_logic_1 = ap_CS_fsm_state7) and (tmp_s_fu_424_p2 = ap_const_lv1_1))) then
ap_NS_fsm <= ap_ST_fsm_state6;
else
ap_NS_fsm <= ap_ST_fsm_state8;
end if;
when ap_ST_fsm_state8 =>
ap_NS_fsm <= ap_ST_fsm_state9;
when ap_ST_fsm_state9 =>
ap_NS_fsm <= ap_ST_fsm_state10;
when ap_ST_fsm_state10 =>
ap_NS_fsm <= ap_ST_fsm_state11;
when ap_ST_fsm_state11 =>
ap_NS_fsm <= ap_ST_fsm_state12;
when ap_ST_fsm_state12 =>
ap_NS_fsm <= ap_ST_fsm_state13;
when ap_ST_fsm_state13 =>
ap_NS_fsm <= ap_ST_fsm_state14;
when ap_ST_fsm_state14 =>
ap_NS_fsm <= ap_ST_fsm_state15;
when ap_ST_fsm_state15 =>
ap_NS_fsm <= ap_ST_fsm_state16;
when ap_ST_fsm_state16 =>
ap_NS_fsm <= ap_ST_fsm_state17;
when ap_ST_fsm_state17 =>
ap_NS_fsm <= ap_ST_fsm_state18;
when ap_ST_fsm_state18 =>
ap_NS_fsm <= ap_ST_fsm_state7;
when others =>
ap_NS_fsm <= "XXXXXXXXXXXXXXXXXX";
end case;
end process;
ap_CS_fsm_state1 <= ap_CS_fsm(0);
ap_CS_fsm_state11 <= ap_CS_fsm(10);
ap_CS_fsm_state12 <= ap_CS_fsm(11);
ap_CS_fsm_state13 <= ap_CS_fsm(12);
ap_CS_fsm_state17 <= ap_CS_fsm(16);
ap_CS_fsm_state18 <= ap_CS_fsm(17);
ap_CS_fsm_state2 <= ap_CS_fsm(1);
ap_CS_fsm_state3 <= ap_CS_fsm(2);
ap_CS_fsm_state4 <= ap_CS_fsm(3);
ap_CS_fsm_state5 <= ap_CS_fsm(4);
ap_CS_fsm_state6 <= ap_CS_fsm(5);
ap_CS_fsm_state7 <= ap_CS_fsm(6);
ap_CS_fsm_state8 <= ap_CS_fsm(7);
ap_CS_fsm_state9 <= ap_CS_fsm(8);
ap_done_assign_proc : process(ap_CS_fsm_state2, tmp_fu_169_p2)
begin
if (((ap_const_logic_1 = ap_CS_fsm_state2) and (ap_const_lv1_1 = tmp_fu_169_p2))) then
ap_done <= ap_const_logic_1;
else
ap_done <= ap_const_logic_0;
end if;
end process;
ap_idle_assign_proc : process(ap_start, ap_CS_fsm_state1)
begin
if (((ap_const_logic_0 = ap_start) and (ap_const_logic_1 = ap_CS_fsm_state1))) then
ap_idle <= ap_const_logic_1;
else
ap_idle <= ap_const_logic_0;
end if;
end process;
ap_ready_assign_proc : process(ap_CS_fsm_state2, tmp_fu_169_p2)
begin
if (((ap_const_logic_1 = ap_CS_fsm_state2) and (ap_const_lv1_1 = tmp_fu_169_p2))) then
ap_ready <= ap_const_logic_1;
else
ap_ready <= ap_const_logic_0;
end if;
end process;
bufi_Addr_A <= std_logic_vector(shift_left(unsigned(bufi_Addr_A_orig),to_integer(unsigned('0' & ap_const_lv32_2(31-1 downto 0)))));
bufi_Addr_A_orig <= tmp_27_cast_fu_450_p1(32 - 1 downto 0);
bufi_Clk_A <= ap_clk;
bufi_Din_A <= ap_const_lv32_0;
bufi_EN_A_assign_proc : process(ap_CS_fsm_state7)
begin
if ((ap_const_logic_1 = ap_CS_fsm_state7)) then
bufi_EN_A <= ap_const_logic_1;
else
bufi_EN_A <= ap_const_logic_0;
end if;
end process;
bufi_Rst_A <= ap_rst;
bufi_WEN_A <= ap_const_lv4_0;
bufo_Addr_A <= std_logic_vector(shift_left(unsigned(bufo_Addr_A_orig),to_integer(unsigned('0' & ap_const_lv32_2(31-1 downto 0)))));
bufo_Addr_A_orig <= std_logic_vector(IEEE.numeric_std.resize(unsigned(bufo_addr_reg_496),32));
bufo_Clk_A <= ap_clk;
bufo_Din_A <= tmp_6_reg_583;
bufo_EN_A_assign_proc : process(ap_CS_fsm_state18, ap_CS_fsm_state11)
begin
if (((ap_const_logic_1 = ap_CS_fsm_state18) or (ap_const_logic_1 = ap_CS_fsm_state11))) then
bufo_EN_A <= ap_const_logic_1;
else
bufo_EN_A <= ap_const_logic_0;
end if;
end process;
bufo_Rst_A <= ap_rst;
bufo_WEN_A_assign_proc : process(ap_CS_fsm_state18)
begin
if ((ap_const_logic_1 = ap_CS_fsm_state18)) then
bufo_WEN_A <= ap_const_lv4_F;
else
bufo_WEN_A <= ap_const_lv4_0;
end if;
end process;
bufw_Addr_A <= std_logic_vector(shift_left(unsigned(bufw_Addr_A_orig),to_integer(unsigned('0' & ap_const_lv32_2(31-1 downto 0)))));
bufw_Addr_A_orig <= tmp_26_cast_fu_419_p1(32 - 1 downto 0);
bufw_Clk_A <= ap_clk;
bufw_Din_A <= ap_const_lv32_0;
bufw_EN_A_assign_proc : process(ap_CS_fsm_state7)
begin
if ((ap_const_logic_1 = ap_CS_fsm_state7)) then
bufw_EN_A <= ap_const_logic_1;
else
bufw_EN_A <= ap_const_logic_0;
end if;
end process;
bufw_Rst_A <= ap_rst;
bufw_WEN_A <= ap_const_lv4_0;
col_b_1_fu_195_p2 <= std_logic_vector(unsigned(col_b_reg_98) + unsigned(ap_const_lv2_1));
col_b_cast5_cast_fu_181_p1 <= std_logic_vector(IEEE.numeric_std.resize(unsigned(col_b_reg_98),6));
col_b_cast_fu_185_p1 <= std_logic_vector(IEEE.numeric_std.resize(unsigned(col_b_reg_98),3));
i_1_fu_368_p2 <= std_logic_vector(unsigned(ap_const_lv3_1) + unsigned(i_reg_131));
i_cast2_fu_331_p1 <= std_logic_vector(IEEE.numeric_std.resize(unsigned(i_reg_131),64));
j_1_fu_430_p2 <= std_logic_vector(unsigned(j_reg_142) + unsigned(ap_const_lv3_1));
j_cast1_cast_fu_410_p1 <= std_logic_vector(IEEE.numeric_std.resize(unsigned(j_reg_142),9));
p_shl1_cast_fu_213_p1 <= std_logic_vector(IEEE.numeric_std.resize(unsigned(tmp_8_fu_205_p3),5));
p_shl2_cast_fu_305_p1 <= std_logic_vector(IEEE.numeric_std.resize(unsigned(tmp_18_fu_297_p3),6));
p_shl3_fu_287_p1 <= std_logic_vector(IEEE.numeric_std.resize(signed(tmp_16_fu_279_p3),64));
p_shl4_cast_fu_348_p3 <= (tmp_24_fu_344_p1 & ap_const_lv2_0);
p_shl5_cast_fu_396_p3 <= (tmp_28_fu_392_p1 & ap_const_lv3_0);
row_b_1_fu_175_p2 <= std_logic_vector(unsigned(row_b_reg_87) + unsigned(ap_const_lv2_1));
row_b_cast6_cast_fu_161_p1 <= std_logic_vector(IEEE.numeric_std.resize(unsigned(row_b_reg_87),6));
row_b_cast_fu_165_p1 <= std_logic_vector(IEEE.numeric_std.resize(unsigned(row_b_reg_87),3));
ti_b_1_fu_325_p2 <= std_logic_vector(unsigned(ti_b_reg_120) + unsigned(ap_const_lv2_1));
ti_b_cast3_cast_fu_266_p1 <= std_logic_vector(IEEE.numeric_std.resize(unsigned(ti_b_reg_120),6));
tmp_10_cast_fu_223_p1 <= std_logic_vector(IEEE.numeric_std.resize(signed(tmp_10_fu_217_p2),6));
tmp_10_fu_217_p2 <= std_logic_vector(unsigned(p_shl1_cast_fu_213_p1) - unsigned(to_b_cast4_cast_fu_201_p1));
tmp_11_fu_227_p2 <= std_logic_vector(unsigned(row_b_cast6_cast_reg_455) + unsigned(tmp_10_cast_fu_223_p1));
tmp_12_fu_232_p2 <= std_logic_vector(shift_left(unsigned(tmp_11_fu_227_p2),to_integer(unsigned('0' & ap_const_lv6_2(6-1 downto 0)))));
tmp_13_fu_238_p2 <= std_logic_vector(unsigned(tmp_12_fu_232_p2) - unsigned(tmp_11_fu_227_p2));
tmp_14_cast_fu_249_p1 <= std_logic_vector(IEEE.numeric_std.resize(unsigned(tmp_14_fu_244_p2),64));
tmp_14_fu_244_p2 <= std_logic_vector(unsigned(col_b_cast5_cast_reg_473) + unsigned(tmp_13_fu_238_p2));
tmp_15_cast_fu_275_p1 <= std_logic_vector(IEEE.numeric_std.resize(signed(tmp_15_fu_270_p2),64));
tmp_15_fu_270_p2 <= std_logic_vector(signed(tmp_10_cast_reg_491) + signed(ti_b_cast3_cast_fu_266_p1));
tmp_16_fu_279_p3 <= (tmp_15_fu_270_p2 & ap_const_lv2_0);
tmp_17_fu_291_p2 <= std_logic_vector(signed(tmp_15_cast_fu_275_p1) + signed(p_shl3_fu_287_p1));
tmp_18_fu_297_p3 <= (ti_b_reg_120 & ap_const_lv3_0);
tmp_19_cast_fu_315_p1 <= std_logic_vector(IEEE.numeric_std.resize(signed(tmp_19_fu_309_p2),7));
tmp_19_fu_309_p2 <= std_logic_vector(unsigned(p_shl2_cast_fu_305_p1) - unsigned(ti_b_cast3_cast_fu_266_p1));
tmp_1_fu_189_p2 <= "1" when (col_b_reg_98 = ap_const_lv2_3) else "0";
tmp_20_fu_335_p2 <= std_logic_vector(unsigned(tmp_17_reg_509) + unsigned(i_cast2_fu_331_p1));
tmp_21_fu_340_p1 <= tmp_20_fu_335_p2(9 - 1 downto 0);
tmp_22_fu_356_p2 <= std_logic_vector(unsigned(tmp_21_fu_340_p1) + unsigned(p_shl4_cast_fu_348_p3));
tmp_23_cast_fu_388_p1 <= std_logic_vector(IEEE.numeric_std.resize(signed(tmp_23_fu_383_p2),9));
tmp_23_fu_383_p2 <= std_logic_vector(unsigned(tmp_9_cast_cast_fu_379_p1) + unsigned(tmp_19_cast_reg_514));
tmp_24_fu_344_p1 <= tmp_20_fu_335_p2(7 - 1 downto 0);
tmp_25_fu_404_p2 <= std_logic_vector(unsigned(p_shl5_cast_fu_396_p3) - unsigned(tmp_23_cast_fu_388_p1));
tmp_26_cast_fu_419_p1 <= std_logic_vector(IEEE.numeric_std.resize(unsigned(tmp_26_fu_414_p2),64));
tmp_26_fu_414_p2 <= std_logic_vector(unsigned(tmp_22_reg_527) + unsigned(j_cast1_cast_fu_410_p1));
tmp_27_cast_fu_450_p1 <= std_logic_vector(IEEE.numeric_std.resize(unsigned(tmp_27_fu_445_p2),64));
tmp_27_fu_445_p2 <= std_logic_vector(unsigned(tmp_25_reg_540) + unsigned(tmp_2_cast_cast_fu_441_p1));
tmp_28_fu_392_p1 <= tmp_23_fu_383_p2(6 - 1 downto 0);
tmp_2_cast_cast_fu_441_p1 <= std_logic_vector(IEEE.numeric_std.resize(unsigned(tmp_2_fu_436_p2),9));
tmp_2_fu_436_p2 <= std_logic_vector(unsigned(col_b_cast_reg_478) + unsigned(j_reg_142));
tmp_3_fu_254_p2 <= "1" when (to_b_reg_109 = ap_const_lv2_3) else "0";
tmp_5_fu_319_p2 <= "1" when (ti_b_reg_120 = ap_const_lv2_3) else "0";
tmp_7_fu_362_p2 <= "1" when (i_reg_131 = ap_const_lv3_5) else "0";
tmp_8_fu_205_p3 <= (to_b_reg_109 & ap_const_lv2_0);
tmp_9_cast_cast_fu_379_p1 <= std_logic_vector(IEEE.numeric_std.resize(unsigned(tmp_9_fu_374_p2),7));
tmp_9_fu_374_p2 <= std_logic_vector(unsigned(i_reg_131) + unsigned(row_b_cast_reg_460));
tmp_fu_169_p2 <= "1" when (row_b_reg_87 = ap_const_lv2_3) else "0";
tmp_s_fu_424_p2 <= "1" when (j_reg_142 = ap_const_lv3_5) else "0";
to_b_1_fu_260_p2 <= std_logic_vector(unsigned(ap_const_lv2_1) + unsigned(to_b_reg_109));
to_b_cast4_cast_fu_201_p1 <= std_logic_vector(IEEE.numeric_std.resize(unsigned(to_b_reg_109),5));
end behav;
|
LIBRARY ieee;
USE ieee.std_logic_1164.ALL;
ENTITY bin2bcd9_tb IS
END bin2bcd9_tb;
ARCHITECTURE behavior OF bin2bcd9_tb IS
-- Declaración del componente de la unidad bajo prueba.
COMPONENT bin2bcd9
PORT(
num_bin : IN std_logic_vector(8 downto 0);
num_bcd : OUT std_logic_vector(10 downto 0)
);
END COMPONENT;
-- Entradas.
signal clk : std_logic := '0';
signal num_bin : std_logic_vector(8 downto 0) := (others => '0');
-- Salidas.
signal num_bcd : std_logic_vector(10 downto 0);
-- Definición de los relojes.
constant clk_period : time := 20 ns;
BEGIN
-- Instancia de la unidad bajo prueba.
uut: bin2bcd9 PORT MAP (
num_bin => num_bin,
num_bcd => num_bcd
);
-- Definición del proceso de reloj.
clk_process :process
begin
clk <= '0';
wait for clk_period/2;
clk <= '1';
wait for clk_period/2;
end process;
-- Proceso de estímulos.
stim_proc: process
begin
wait for 100 ns;
num_bin <= "000000001"; -- 1, 000 0000 0001
wait for 10 ms;
num_bin <= "000000010"; -- 2, 000 0000 0010
wait for 10 ms;
num_bin <= "000000100"; -- 4, 000 0000 0100
wait for 10 ms;
num_bin <= "000001000"; -- 8, 000 0000 1000
wait for 10 ms;
num_bin <= "000010000"; -- 16, 000 0001 0110
wait for 10 ms;
num_bin <= "000100000"; -- 32, 000 0011 0010
wait for 10 ms;
num_bin <= "001000000"; -- 64, 000 0110 0100
wait for 10 ms;
num_bin <= "010000000"; -- 128, 001 0010 1000
wait for 10 ms;
num_bin <= "100000000"; -- 256, 010 0101 0110
wait;
end process;
END; |
LIBRARY ieee;
USE ieee.std_logic_1164.ALL;
ENTITY bin2bcd9_tb IS
END bin2bcd9_tb;
ARCHITECTURE behavior OF bin2bcd9_tb IS
-- Declaración del componente de la unidad bajo prueba.
COMPONENT bin2bcd9
PORT(
num_bin : IN std_logic_vector(8 downto 0);
num_bcd : OUT std_logic_vector(10 downto 0)
);
END COMPONENT;
-- Entradas.
signal clk : std_logic := '0';
signal num_bin : std_logic_vector(8 downto 0) := (others => '0');
-- Salidas.
signal num_bcd : std_logic_vector(10 downto 0);
-- Definición de los relojes.
constant clk_period : time := 20 ns;
BEGIN
-- Instancia de la unidad bajo prueba.
uut: bin2bcd9 PORT MAP (
num_bin => num_bin,
num_bcd => num_bcd
);
-- Definición del proceso de reloj.
clk_process :process
begin
clk <= '0';
wait for clk_period/2;
clk <= '1';
wait for clk_period/2;
end process;
-- Proceso de estímulos.
stim_proc: process
begin
wait for 100 ns;
num_bin <= "000000001"; -- 1, 000 0000 0001
wait for 10 ms;
num_bin <= "000000010"; -- 2, 000 0000 0010
wait for 10 ms;
num_bin <= "000000100"; -- 4, 000 0000 0100
wait for 10 ms;
num_bin <= "000001000"; -- 8, 000 0000 1000
wait for 10 ms;
num_bin <= "000010000"; -- 16, 000 0001 0110
wait for 10 ms;
num_bin <= "000100000"; -- 32, 000 0011 0010
wait for 10 ms;
num_bin <= "001000000"; -- 64, 000 0110 0100
wait for 10 ms;
num_bin <= "010000000"; -- 128, 001 0010 1000
wait for 10 ms;
num_bin <= "100000000"; -- 256, 010 0101 0110
wait;
end process;
END; |
----------------------------------------------------------------------------------
-- Company:
-- Engineer: Nick LaRosa
--
-- Create Date: 17:25:37 12/31/2013
-- Design Name:
-- Module Name: CPU - Behavioral
-- Project Name:
-- Target Devices:
-- Tool versions:
-- Description:
--
-- Dependencies:
--
-- Revision:
-- Revision 0.01 - File Created
-- Additional Comments:
--
----------------------------------------------------------------------------------
library IEEE;
use IEEE.STD_LOGIC_1164.ALL;
-- Uncomment the following library declaration if using
-- arithmetic functions with Signed or Unsigned values
use IEEE.NUMERIC_STD.ALL;
-- Uncomment the following library declaration if instantiating
-- any Xilinx primitives in this code.
--library UNISIM;
--use UNISIM.VComponents.all;
entity CPU is
Generic ( data_width : integer := 16;
inst_width : integer := 16;
RAM_addr_width : integer := 16;
ROM_addr_width : integer := 16
);
Port ( inM : in std_logic_vector(data_width - 1 downto 0);
instruction : in std_logic_vector(inst_width - 1 downto 0);
reset : in std_logic;
writeM : out std_logic;
outM : out std_logic_vector(data_width - 1 downto 0);
addressM : out std_logic_vector(RAM_addr_width - 1 downto 0);
pc : out std_logic_vector(ROM_addr_width - 1 downto 0)
);
end CPU;
architecture Behavioral of CPU is
begin
end Behavioral;
|
architecture rtl of fifo is
begin
process
begin
var1 := '0' WHEN rd_en = '1' else '1';
var2 := '0' WHEN rd_en = '1' else '1';
wr_en_a <= force '0' WHEN rd_en = '1' else '1';
wr_en_b <= force '0' WHEN rd_en = '1' else '1';
end process;
concurrent_wr_en_a <= '0' WHEN rd_en = '1' else '1';
concurrent_wr_en_b <= '0' when rd_en = '1' else '1';
end architecture rtl;
|
-- IPIF Common Library Package
-------------------------------------------------------------------------------
--
-- *************************************************************************
-- ** **
-- ** DISCLAIMER OF LIABILITY **
-- ** **
-- ** This text/file contains proprietary, confidential **
-- ** information of Xilinx, Inc., is distributed under **
-- ** license from Xilinx, Inc., and may be used, copied **
-- ** and/or disclosed only pursuant to the terms of a valid **
-- ** license agreement with Xilinx, Inc. Xilinx hereby **
-- ** grants you a license to use this text/file solely for **
-- ** design, simulation, implementation and creation of **
-- ** design files limited to Xilinx devices or technologies. **
-- ** Use with non-Xilinx devices or technologies is expressly **
-- ** prohibited and immediately terminates your license unless **
-- ** covered by a separate agreement. **
-- ** **
-- ** Xilinx is providing this design, code, or information **
-- ** "as-is" solely for use in developing programs and **
-- ** solutions for Xilinx devices, with no obligation on the **
-- ** part of Xilinx to provide support. By providing this design, **
-- ** code, or information as one possible implementation of **
-- ** this feature, application or standard, Xilinx is making no **
-- ** representation that this implementation is free from any **
-- ** claims of infringement. You are responsible for obtaining **
-- ** any rights you may require for your implementation. **
-- ** Xilinx expressly disclaims any warranty whatsoever with **
-- ** respect to the adequacy of the implementation, including **
-- ** but not limited to any warranties or representations that this **
-- ** implementation is free from claims of infringement, implied **
-- ** warranties of merchantability or fitness for a particular **
-- ** purpose. **
-- ** **
-- ** Xilinx products are not intended for use in life support **
-- ** appliances, devices, or systems. Use in such applications is **
-- ** expressly prohibited. **
-- ** **
-- ** Any modifications that are made to the Source Code are **
-- ** done at the users sole risk and will be unsupported. **
-- ** The Xilinx Support Hotline does not have access to source **
-- ** code and therefore cannot answer specific questions related **
-- ** to source HDL. The Xilinx Hotline support of original source **
-- ** code IP shall only address issues and questions related **
-- ** to the standard Netlist version of the core (and thus **
-- ** indirectly, the original core source). **
-- ** **
-- ** Copyright (c) 2002-2010 Xilinx, Inc. All rights reserved. **
-- ** **
-- ** This copyright and support notice must be retained as part **
-- ** of this text at all times. **
-- ** **
-- *************************************************************************
--
-------------------------------------------------------------------------------
-- Filename: ipif_pkg.vhd
-- Version: Intital
-- Description: This file contains the constants and functions used in the
-- ipif common library components.
--
-------------------------------------------------------------------------------
-- Structure:
--
-------------------------------------------------------------------------------
-- Author: DET
-- History:
-- DET 02/21/02 -- Created from proc_common_pkg.vhd
--
-- DET 03/13/02 -- PLB IPIF development updates
-- ^^^^^^
-- - Commented out string types and string functions due to an XST
-- problem with string arrays and functions. THe string array
-- processing functions were replaced with comperable functions
-- operating on integer arrays.
-- ~~~~~~
--
--
-- DET 4/30/2002 Initial
-- ~~~~~~
-- - Added three functions: rebuild_slv32_array, rebuild_slv64_array, and
-- rebuild_int_array to support removal of unused elements from the
-- ARD arrays.
-- ^^^^^^ --
--
-- FLO 8/12/2002
-- ~~~~~~
-- - Added three functions: bits_needed_for_vac, bits_needed_for_occ,
-- and get_id_index_iboe.
-- (Removed provisional functions bits_needed_for_vacancy,
-- bits needed_for_occupancy, and bits_needed_for.)
-- ^^^^^^
--
-- FLO 3/24/2003
-- ~~~~~~
-- - Added dependent property paramters for channelized DMA.
-- - Added common property parameter array type.
-- - Definded the KEYHOLD_BURST common-property parameter.
-- ^^^^^^
--
-- FLO 10/22/2003
-- ~~~~~~
-- - Some adjustment to CHDMA parameterization.
-- - Cleanup of obsolete code and comments. (The former "XST workaround"
-- has become the officially deployed method.)
-- ^^^^^^
--
-- LSS 03/24/2004
-- ~~~~~~
-- - Added 5 functions
-- ^^^^^^
--
-- ALS 09/03/04
-- ^^^^^^
-- -- Added constants to describe the channel protocols used in MCH_OPB_IPIF
-- ~~~~~~
--
-- DET 1/17/2008 v4_0
-- ~~~~~~
-- - Changed proc_common library version to v4_0
-- - Incorporated new disclaimer header
-- ^^^^^^
--
-------------------------------------------------------------------------------
-- Naming Conventions:
-- active low signals: "*_n"
-- clock signals: "clk", "clk_div#", "clk_#x"
-- reset signals: "rst", "rst_n"
-- generics: "C_*"
-- user defined types: "*_TYPE"
-- state machine next state: "*_ns"
-- state machine current state: "*_cs"
-- combinatorial signals: "*_com"
-- pipelined or register delay signals: "*_d#"
-- counter signals: "*cnt*"
-- clock enable signals: "*_ce"
-- internal version of output port "*_i"
-- device pins: "*_pin"
-- ports: - Names begin with Uppercase
-- processes: "*_PROCESS"
-- component instantiations: "<ENTITY_>I_<#|FUNC>
-------------------------------------------------------------------------------
library ieee;
use ieee.std_logic_1164.all;
-- need conversion function to convert reals/integers to std logic vectors
use ieee.std_logic_arith.all;
use ieee.std_logic_arith.all;
use ieee.std_logic_unsigned.all;
package ipif_pkg is
-------------------------------------------------------------------------------
-- Type Declarations
-------------------------------------------------------------------------------
type SLV32_ARRAY_TYPE is array (natural range <>) of std_logic_vector(0 to 31);
subtype SLV64_TYPE is std_logic_vector(0 to 63);
type SLV64_ARRAY_TYPE is array (natural range <>) of SLV64_TYPE;
type INTEGER_ARRAY_TYPE is array (natural range <>) of integer;
-------------------------------------------------------------------------------
-- Function and Procedure Declarations
-------------------------------------------------------------------------------
function "=" (s1: in string; s2: in string) return boolean;
function equaluseCase( str1, str2 : STRING ) RETURN BOOLEAN;
function calc_num_ce (ce_num_array : INTEGER_ARRAY_TYPE) return integer;
function calc_start_ce_index (ce_num_array : INTEGER_ARRAY_TYPE;
index : integer) return integer;
function get_min_dwidth (dwidth_array: INTEGER_ARRAY_TYPE) return integer;
function get_max_dwidth (dwidth_array: INTEGER_ARRAY_TYPE) return integer;
function S32 (in_string : string) return string;
--------------------------------------------------------------------------------
-- ARD support functions.
-- These function can be useful when operating with the ARD parameterization.
--------------------------------------------------------------------------------
function get_id_index (id_array :INTEGER_ARRAY_TYPE;
id : integer)
return integer;
function get_id_index_iboe (id_array :INTEGER_ARRAY_TYPE;
id : integer)
return integer;
function find_ard_id (id_array : INTEGER_ARRAY_TYPE;
id : integer) return boolean;
function find_id_dwidth (id_array : INTEGER_ARRAY_TYPE;
dwidth_array: INTEGER_ARRAY_TYPE;
id : integer;
default : integer)
return integer;
function cnt_ipif_id_blks (id_array : INTEGER_ARRAY_TYPE) return integer;
function get_ipif_id_dbus_index (id_array : INTEGER_ARRAY_TYPE;
id : integer)
return integer ;
function rebuild_slv32_array (slv32_array : SLV32_ARRAY_TYPE;
num_valid_pairs : integer)
return SLV32_ARRAY_TYPE;
function rebuild_slv64_array (slv64_array : SLV64_ARRAY_TYPE;
num_valid_pairs : integer)
return SLV64_ARRAY_TYPE;
function rebuild_int_array (int_array : INTEGER_ARRAY_TYPE;
num_valid_entry : integer)
return INTEGER_ARRAY_TYPE;
-- 5 Functions Added 3/24/04
function populate_intr_mode_array (num_user_intr : integer;
intr_capture_mode : integer)
return INTEGER_ARRAY_TYPE ;
function add_intr_ard_id_array(include_intr : boolean;
ard_id_array : INTEGER_ARRAY_TYPE)
return INTEGER_ARRAY_TYPE;
function add_intr_ard_addr_range_array(include_intr : boolean;
ZERO_ADDR_PAD : std_logic_vector;
intr_baseaddr : std_logic_vector;
intr_highaddr : std_logic_vector;
ard_id_array : INTEGER_ARRAY_TYPE;
ard_addr_range_array : SLV64_ARRAY_TYPE)
return SLV64_ARRAY_TYPE;
function add_intr_ard_num_ce_array(include_intr : boolean;
ard_id_array : INTEGER_ARRAY_TYPE;
ard_num_ce_array : INTEGER_ARRAY_TYPE)
return INTEGER_ARRAY_TYPE;
function add_intr_ard_dwidth_array(include_intr : boolean;
intr_dwidth : integer;
ard_id_array : INTEGER_ARRAY_TYPE;
ard_dwidth_array : INTEGER_ARRAY_TYPE)
return INTEGER_ARRAY_TYPE;
function log2(x : natural) return integer;
function clog2(x : positive) return natural;
-------------------------------------------------------------------------------
-- Constant Declarations
-------------------------------------------------------------------------------
-------------------------------------------------------------------------------
-- Channel Protocols
-- The constant declarations below give symbolic-name aliases for values that
-- can be used in the C_MCH_PROTOCOL_ARRAY generic of the MCH_OPB_IPIF.
-------------------------------------------------------------------------------
constant XCL : integer := 0;
constant DAG : integer := 1;
--------------------------------------------------------------------------------
-- Address range types.
-- The constant declarations, below, give symbolic-name aliases for values
-- that can be used in the C_ARD_ID_ARRAY generic of IPIFs. The first set
-- gives aliases that are used to include IPIF services.
--------------------------------------------------------------------------------
-- IPIF module aliases
Constant IPIF_INTR : integer := 1;
Constant IPIF_RST : integer := 2;
Constant IPIF_SESR_SEAR : integer := 3;
Constant IPIF_DMA_SG : integer := 4;
Constant IPIF_WRFIFO_REG : integer := 5;
Constant IPIF_WRFIFO_DATA : integer := 6;
Constant IPIF_RDFIFO_REG : integer := 7;
Constant IPIF_RDFIFO_DATA : integer := 8;
Constant IPIF_CHDMA_CHANNELS : integer := 9;
Constant IPIF_CHDMA_GLOBAL_REGS : integer := 10;
Constant CHDMA_STATUS_FIFO : integer := 90;
-- Some predefined user module aliases
Constant USER_00 : integer := 100;
Constant USER_01 : integer := 101;
Constant USER_02 : integer := 102;
Constant USER_03 : integer := 103;
Constant USER_04 : integer := 104;
Constant USER_05 : integer := 105;
Constant USER_06 : integer := 106;
Constant USER_07 : integer := 107;
Constant USER_08 : integer := 108;
Constant USER_09 : integer := 109;
Constant USER_10 : integer := 110;
Constant USER_11 : integer := 111;
Constant USER_12 : integer := 112;
Constant USER_13 : integer := 113;
Constant USER_14 : integer := 114;
Constant USER_15 : integer := 115;
Constant USER_16 : integer := 116;
---( Start of Dependent Properties declarations
--------------------------------------------------------------------------------
-- Declarations for Dependent Properties (properties that depend on the type of
-- the address range, or in other words, address-range-specific parameters).
-- There is one property, i.e. one parameter, encoded as an integer at
-- each index of the properties array. There is one properties array for
-- each address range.
--
-- The C_ARD_DEPENDENT_PROPS_ARRAY generic parameter in (most) IPIFs is such
-- a properties array and it is usually giving its (static) value using a
-- VHDL aggregate construct. (--ToDo, give an example of this.)
--
-- The the "assigned" default value of a dependent property is zero. This value
-- is usually specified the aggregate by leaving its (index) name out so that
-- it is covered by an "others => 0" choice in the aggregate. Some parameters,
-- as noted in the definitions, below, have an "effective" default value that is
-- different from the assigned default value of zero. In such cases, the
-- function, eff_dp, given below, can be used to get the effective value of
-- the dependent property.
--------------------------------------------------------------------------------
constant DEPENDENT_PROPS_SIZE : integer := 32;
subtype DEPENDENT_PROPS_TYPE
is INTEGER_ARRAY_TYPE(0 to DEPENDENT_PROPS_SIZE-1);
type DEPENDENT_PROPS_ARRAY_TYPE
is array (natural range <>) of DEPENDENT_PROPS_TYPE;
--------------------------------------------------------------------------------
-- Below are the indices of dependent properties for the different types of
-- address ranges.
--
-- Example: Let C_ARD_DEPENDENT_PROPS_ARRAY hold the dependent properites
-- for a set of address ranges. Then, e.g.,
--
-- C_ARD_DEPENDENT_PROPS_ARRAY(i)(FIFO_CAPACITY_BITS)
--
-- gives the fifo capacity in bits, provided that the i'th address range
-- is of type IPIF_WRFIFO_DATA or IPIF_RDFIFO_DATA.
--
-- These indices should be referenced only by the names below and never
-- by numerical literals. (The right to change numerical index assignments
-- is reserved; applications using the names will not be affected by such
-- reassignments.)
--------------------------------------------------------------------------------
--
--ToDo, if the interrupt controller parameterization is ever moved to
-- C_ARD_DEPENDENT_PROPS_ARRAY, then the following declarations
-- could be uncommented and used.
---- IPIF_INTR IDX
---------------------------------------------------------------------------- ---
constant EXCLUDE_DEV_ISC : integer := 0;
-- 1 specifies that only the global interrupt
-- enable is present in the device interrupt source
-- controller and that the only source of interrupts
-- in the device is the IP interrupt source controller.
-- 0 specifies that the full device interrupt
-- source controller structure will be included.
constant INCLUDE_DEV_PENCODER : integer := 1;
-- 1 will include the Device IID in the device interrupt
-- source controller, 0 will exclude it.
--
-- IPIF_WRFIFO_DATA or IPIF_RDFIFO_DATA IDX
---------------------------------------------------------------------------- ---
constant FIFO_CAPACITY_BITS : integer := 0;
constant WR_WIDTH_BITS : integer := 1;
constant RD_WIDTH_BITS : integer := 2;
constant EXCLUDE_PACKET_MODE : integer := 3;
-- 1 Don't include packet mode features
-- 0 Include packet mode features
constant EXCLUDE_VACANCY : integer := 4;
-- 1 Don't include vacancy calculation
-- 0 Include vacancy calculation
-- See also the functions
-- bits_needed_for_vac and
-- bits_needed_for_occ that are declared below.
constant INCLUDE_DRE : integer := 5;
constant INCLUDE_AUTOPUSH_POP : integer := 6;
constant AUTOPUSH_POP_CE : integer := 7;
constant INCLUDE_CSUM : integer := 8;
--------------------------------------------------------------------------------
--
-- DMA_SG IDX
---------------------------------------------------------------------------- ---
--------------------------------------------------------------------------------
-- IPIF_CHDMA_CHANNELS IDX
---------------------------------------------------------------------------- ---
constant NUM_SUBS_FOR_PHYS_0 : integer :=0;
constant NUM_SUBS_FOR_PHYS_1 : integer :=1;
constant NUM_SUBS_FOR_PHYS_2 : integer :=2;
constant NUM_SUBS_FOR_PHYS_3 : integer :=3;
constant NUM_SUBS_FOR_PHYS_4 : integer :=4;
constant NUM_SUBS_FOR_PHYS_5 : integer :=5;
constant NUM_SUBS_FOR_PHYS_6 : integer :=6;
constant NUM_SUBS_FOR_PHYS_7 : integer :=7;
constant NUM_SUBS_FOR_PHYS_8 : integer :=8;
constant NUM_SUBS_FOR_PHYS_9 : integer :=9;
constant NUM_SUBS_FOR_PHYS_10 : integer :=10;
constant NUM_SUBS_FOR_PHYS_11 : integer :=11;
constant NUM_SUBS_FOR_PHYS_12 : integer :=12;
constant NUM_SUBS_FOR_PHYS_13 : integer :=13;
constant NUM_SUBS_FOR_PHYS_14 : integer :=14;
constant NUM_SUBS_FOR_PHYS_15 : integer :=15;
-- Gives the number of sub-channels for physical channel i.
--
-- These constants, which will be MAX_NUM_PHYS_CHANNELS in number (see
-- below), have consecutive values starting with 0 for
-- NUM_SUBS_FOR_PHYS_0. (The constants serve the purpose of giving symbolic
-- names for use in the dependent-properties aggregates that parameterize
-- an IPIF_CHDMA_CHANNELS address range.)
--
-- [Users can ignore this note for developers
-- If the number of physical channels changes, both the
-- IPIF_CHDMA_CHANNELS constants and MAX_NUM_PHYS_CHANNELS,
-- below, must be adjusted.
-- (Use of an array constant or a function of the form
-- NUM_SUBS_FOR_PHYS(i) to define the indices
-- runs afoul of LRM restrictions on non-locally static aggregate
-- choices. (Further, the LRM imposes perhaps unnecessarily
-- strict limits on what qualifies as a locally static primary.)
-- Note: This information is supplied for the benefit of anyone seeking
-- to improve the way that these NUM_SUBS_FOR_PHYS parameter
-- indices are defined.)
-- End of note for developers ]
--
-- The value associated with any index NUM_SUBS_FOR_PHYS_i in the
-- dependent-properties array must be even since TX and RX channels
-- come in pairs with the TX followed immediately by
-- the corresponding RX.
--
constant NUM_SIMPLE_DMA_CHANS : integer :=16;
-- The number of simple DMA channels.
constant NUM_SIMPLE_SG_CHANS : integer :=17;
-- The number of simple SG channels.
constant INTR_COALESCE : integer :=18;
-- 0 Interrupt coalescing is disabled
-- 1 Interrupt coalescing is enabled
constant CLK_PERIOD_PS : integer :=19;
-- The period of the OPB Bus clock in ps.
-- The default value of 0 is a special value that
-- is synonymous with 10000 ps (10 ns).
-- The value for CLK_PERIOD_PS is relevant only if (INTR_COALESCE = 1).
constant PACKET_WAIT_UNIT_NS : integer :=20;
-- Gives the unit for used for timing of pack-wait bounds.
-- The default value of 0 is a special value that
-- is synonymous with 1,000,000 ns (1 ms) and a non-default
-- value is typically only used for testing.
-- Relevant only if (INTR_COALESCE = 1).
constant BURST_SIZE : integer :=21;
-- 1, 2, 4, 8 or 16
-- The default value of 0 is a special value that
-- is synonymous with a burst size of 16.
-- Setting the BURST_SIZE to 1 effectively disables
-- bursts.
constant REMAINDER_AS_SINGLES : integer :=22;
-- 0 Remainder handled as a short burst
-- 1 Remainder handled as a series of singles
--------------------------------------------------------------------------------
-- The constant below is not the index of a dependent-properties
-- parameter (and, as such, would never appear as a choice in a
-- dependent-properties aggregate). Rather, it is fixed to the maximum
-- number of physical channels that an Address Range of type
-- IPIF_CHDMA_CHANNELS supports. It must be maintained in conjuction with
-- the constants named, e.g., NUM_SUBS_FOR_PHYS_15, above.
--------------------------------------------------------------------------------
constant MAX_NUM_PHYS_CHANNELS : natural := 16;
--------------------------------------------------------------------------
-- EXAMPLE: Here is an example dependent-properties aggregate for an
-- address range of type IPIF_CHDMA_CHANNELS.
-- To have a compact list of all of the CHDMA parameters, all are
-- shown, however three are commented out and the unneeded
-- MUM_SUBS_FOR_PHYS_x are excluded. The "OTHERS => 0" association
-- gives these parameters their default values, such that, for the example
--
-- - All physical channels above 2 have zero subchannels (effectively,
-- these physical channels are not used)
-- - There are no simple SG channels
-- - The packet-wait time unit is 1 ms
-- - Burst size is 16
--------------------------------------------------------------------------
-- (
-- NUM_SUBS_FOR_PHYS_0 => 8,
-- NUM_SUBS_FOR_PHYS_1 => 4,
-- NUM_SUBS_FOR_PHYS_2 => 14,
-- NUM_SIMPLE_DMA_CHANS => 1,
-- --NUM_SIMPLE_SG_CHANS => 5,
-- INTR_COALESCE => 1,
-- CLK_PERIOD_PS => 20000,
-- --PACKET_WAIT_UNIT_NS => 50000,
-- --BURST_SIZE => 1,
-- REMAINDER_AS_SINGLES => 1,
-- OTHERS => 0
-- )
--
--------------------------------------------------------------------------------
--------------------------------------------------------------------------------
-- Calculates the number of bits needed to convey the vacancy (emptiness) of
-- the fifo described by dependent_props, if fifo_present. If not fifo_present,
-- returns 0 (or the smallest value allowed by tool limitations on null arrays)
-- without making reference to dependent_props.
--------------------------------------------------------------------------------
function bits_needed_for_vac(
fifo_present: boolean;
dependent_props : DEPENDENT_PROPS_TYPE
) return integer;
--------------------------------------------------------------------------------
-- Calculates the number of bits needed to convey the occupancy (fullness) of
-- the fifo described by dependent_props, if fifo_present. If not fifo_present,
-- returns 0 (or the smallest value allowed by tool limitations on null arrays)
-- without making reference to dependent_props.
--------------------------------------------------------------------------------
function bits_needed_for_occ(
fifo_present: boolean;
dependent_props : DEPENDENT_PROPS_TYPE
) return integer;
--------------------------------------------------------------------------------
-- Function eff_dp.
--
-- For some of the dependent properties, the default value of zero is meant
-- to imply an effective default value of other than zero (see e.g.
-- PKT_WAIT_UNIT_NS for the IPIF_CHDMA_CHANNELS address-range type). The
-- following function is used to get the (possibly default-adjusted)
-- value for a dependent property.
--
-- Example call:
--
-- eff_value_of_param :=
-- eff_dp(
-- C_IPIF_CHDMA_CHANNELS,
-- PACKET_WAIT_UNIT_NS,
-- C_ARD_DEPENDENT_PROPS_ARRAY(i)(PACKET_WAIT_UNIT_NS)
-- );
--
-- where C_ARD_DEPENDENT_PROPS_ARRAY(i) is an object of type
-- DEPENDENT_PROPS_ARRAY_TYPE, that was parameterized for an address range of
-- type C_IPIF_CHDMA_CHANNELS.
--------------------------------------------------------------------------------
function eff_dp(id : integer; -- The type of address range.
dep_prop : integer; -- The index of the dependent prop.
value : integer -- The value at that index.
) return integer; -- The effective value, possibly adjusted
-- if value has the default value of 0.
---) End of Dependent Properties declarations
--------------------------------------------------------------------------------
-- Declarations for Common Properties (properties that apply regardless of the
-- type of the address range). Structurally, these work the same as
-- the dependent properties.
--------------------------------------------------------------------------------
constant COMMON_PROPS_SIZE : integer := 2;
subtype COMMON_PROPS_TYPE
is INTEGER_ARRAY_TYPE(0 to COMMON_PROPS_SIZE-1);
type COMMON_PROPS_ARRAY_TYPE
is array (natural range <>) of COMMON_PROPS_TYPE;
--------------------------------------------------------------------------------
-- Below are the indices of the common properties.
--
-- These indices should be referenced only by the names below and never
-- by numerical literals.
-- IDX
---------------------------------------------------------------------------- ---
constant KEYHOLE_BURST : integer := 0;
-- 1 All addresses of a burst are forced to the initial
-- address of the burst.
-- 0 Burst addresses follow the bus protocol.
-- IP interrupt mode array constants
Constant INTR_PASS_THRU : integer := 1;
Constant INTR_PASS_THRU_INV : integer := 2;
Constant INTR_REG_EVENT : integer := 3;
Constant INTR_REG_EVENT_INV : integer := 4;
Constant INTR_POS_EDGE_DETECT : integer := 5;
Constant INTR_NEG_EDGE_DETECT : integer := 6;
end ipif_pkg;
package body ipif_pkg is
-------------------------------------------------------------------------------
-- Function log2 -- returns number of bits needed to encode x choices
-- x = 0 returns 0
-- x = 1 returns 0
-- x = 2 returns 1
-- x = 4 returns 2, etc.
-------------------------------------------------------------------------------
--
function log2(x : natural) return integer is
variable i : integer := 0;
variable val: integer := 1;
begin
if x = 0 then return 0;
else
for j in 0 to 29 loop -- for loop for XST
if val >= x then null;
else
i := i+1;
val := val*2;
end if;
end loop;
-- Fix per CR520627 XST was ignoring this anyway and printing a
-- Warning in SRP file. This will get rid of the warning and not
-- impact simulation.
-- synthesis translate_off
assert val >= x
report "Function log2 received argument larger" &
" than its capability of 2^30. "
severity failure;
-- synthesis translate_on
return i;
end if;
end function log2;
--------------------------------------------------------------------------------
-- Function clog2 - returns the integer ceiling of the base 2 logarithm of x,
-- i.e., the least integer greater than or equal to log2(x).
--------------------------------------------------------------------------------
function clog2(x : positive) return natural is
variable r : natural := 0;
variable rp : natural := 1; -- rp tracks the value 2**r
begin
while rp < x loop -- Termination condition T: x <= 2**r
-- Loop invariant L: 2**(r-1) < x
r := r + 1;
if rp > integer'high - rp then exit; end if; -- If doubling rp overflows
-- the integer range, the doubled value would exceed x, so safe to exit.
rp := rp + rp;
end loop;
-- L and T <-> 2**(r-1) < x <= 2**r <-> (r-1) < log2(x) <= r
return r; --
end clog2;
-------------------------------------------------------------------------------
-- Function Definitions
-------------------------------------------------------------------------------
-----------------------------------------------------------------------------
-- Function "="
--
-- This function can be used to overload the "=" operator when comparing
-- strings.
-----------------------------------------------------------------------------
function "=" (s1: in string; s2: in string) return boolean is
constant tc: character := ' '; -- string termination character
variable i: integer := 1;
variable v1 : string(1 to s1'length) := s1;
variable v2 : string(1 to s2'length) := s2;
begin
while (i <= v1'length) and (v1(i) /= tc) and
(i <= v2'length) and (v2(i) /= tc) and
(v1(i) = v2(i))
loop
i := i+1;
end loop;
return ((i > v1'length) or (v1(i) = tc)) and
((i > v2'length) or (v2(i) = tc));
end;
----------------------------------------------------------------------------
-- Function equaluseCase
--
-- This function returns true if case sensitive string comparison determines
-- that str1 and str2 are the same.
-----------------------------------------------------------------------------
FUNCTION equaluseCase( str1, str2 : STRING ) RETURN BOOLEAN IS
CONSTANT len1 : INTEGER := str1'length;
CONSTANT len2 : INTEGER := str2'length;
VARIABLE equal : BOOLEAN := TRUE;
BEGIN
IF NOT (len1=len2) THEN
equal := FALSE;
ELSE
FOR i IN str1'range LOOP
IF NOT (str1(i) = str2(i)) THEN
equal := FALSE;
END IF;
END LOOP;
END IF;
RETURN equal;
END equaluseCase;
-----------------------------------------------------------------------------
-- Function calc_num_ce
--
-- This function is used to process the array specifying the number of Chip
-- Enables required for a Base Address specification. The array is input to
-- the function and an integer is returned reflecting the total number of
-- Chip Enables required for the CE, RdCE, and WrCE Buses
-----------------------------------------------------------------------------
function calc_num_ce (ce_num_array : INTEGER_ARRAY_TYPE) return integer is
Variable ce_num_sum : integer := 0;
begin
for i in 0 to (ce_num_array'length)-1 loop
ce_num_sum := ce_num_sum + ce_num_array(i);
End loop;
return(ce_num_sum);
end function calc_num_ce;
-----------------------------------------------------------------------------
-- Function calc_start_ce_index
--
-- This function is used to process the array specifying the number of Chip
-- Enables required for a Base Address specification. The CE Size array is
-- input to the function and an integer index representing the index of the
-- target module in the ce_num_array. An integer is returned reflecting the
-- starting index of the assigned Chip Enables within the CE, RdCE, and
-- WrCE Buses.
-----------------------------------------------------------------------------
function calc_start_ce_index (ce_num_array : INTEGER_ARRAY_TYPE;
index : integer) return integer is
Variable ce_num_sum : integer := 0;
begin
If (index = 0) Then
ce_num_sum := 0;
else
for i in 0 to index-1 loop
ce_num_sum := ce_num_sum + ce_num_array(i);
End loop;
End if;
return(ce_num_sum);
end function calc_start_ce_index;
-----------------------------------------------------------------------------
-- Function get_min_dwidth
--
-- This function is used to process the array specifying the data bus width
-- for each of the target modules. The dwidth_array is input to the function
-- and an integer is returned that is the smallest value found of all the
-- entries in the array.
-----------------------------------------------------------------------------
function get_min_dwidth (dwidth_array: INTEGER_ARRAY_TYPE) return integer is
Variable temp_min : Integer := 1024;
begin
for i in 0 to dwidth_array'length-1 loop
If (dwidth_array(i) < temp_min) Then
temp_min := dwidth_array(i);
else
null;
End if;
End loop;
return(temp_min);
end function get_min_dwidth;
-----------------------------------------------------------------------------
-- Function get_max_dwidth
--
-- This function is used to process the array specifying the data bus width
-- for each of the target modules. The dwidth_array is input to the function
-- and an integer is returned that is the largest value found of all the
-- entries in the array.
-----------------------------------------------------------------------------
function get_max_dwidth (dwidth_array: INTEGER_ARRAY_TYPE) return integer is
Variable temp_max : Integer := 0;
begin
for i in 0 to dwidth_array'length-1 loop
If (dwidth_array(i) > temp_max) Then
temp_max := dwidth_array(i);
else
null;
End if;
End loop;
return(temp_max);
end function get_max_dwidth;
-----------------------------------------------------------------------------
-- Function S32
--
-- This function is used to expand an input string to 32 characters by
-- padding with spaces. If the input string is larger than 32 characters,
-- it will truncate to 32 characters.
-----------------------------------------------------------------------------
function S32 (in_string : string) return string is
constant OUTPUT_STRING_LENGTH : integer := 32;
Constant space : character := ' ';
variable new_string : string(1 to 32);
Variable start_index : Integer := in_string'length+1;
begin
If (in_string'length < OUTPUT_STRING_LENGTH) Then
for i in 1 to in_string'length loop
new_string(i) := in_string(i);
End loop;
for j in start_index to OUTPUT_STRING_LENGTH loop
new_string(j) := space;
End loop;
else -- use first 32 chars of in_string (truncate the rest)
for k in 1 to OUTPUT_STRING_LENGTH loop
new_string(k) := in_string(k);
End loop;
End if;
return(new_string);
end function S32;
-----------------------------------------------------------------------------
-- Function get_id_index
--
-- This function is used to process the array specifying the target function
-- assigned to a Base Address pair address range. The id_array and a
-- id number is input to the function. A integer is returned reflecting the
-- array index of the id matching the id input number. This function
-- should only be called if the id number is known to exist in the
-- name_array input. This can be detirmined by using the find_ard_id
-- function.
-----------------------------------------------------------------------------
function get_id_index (id_array :INTEGER_ARRAY_TYPE;
id : integer) return integer is
Variable match : Boolean := false;
Variable match_index : Integer := 10000; -- a really big number!
begin
for array_index in 0 to id_array'length-1 loop
If (match = true) Then -- match already found so do nothing
null;
else -- compare the numbers one by one
match := (id_array(array_index) = id);
If (match) Then
match_index := array_index;
else
null;
End if;
End if;
End loop;
return(match_index);
end function get_id_index;
--------------------------------------------------------------------------------
-- get_id_index but return a value in bounds on error (iboe).
--
-- This function is the same as get_id_index, except that when id does
-- not exist in id_array, the value returned is any index that is
-- within the index range of id_array.
--
-- This function would normally only be used where function find_ard_id
-- is used to establish the existence of id but, even when non-existent,
-- an element of one of the ARD arrays will be computed from the
-- returned get_id_index_iboe value. See, e.g., function bits_needed_for_vac
-- and the example call, below
--
-- bits_needed_for_vac(
-- find_ard_id(C_ARD_ID_ARRAY, IPIF_RDFIFO_DATA),
-- C_ARD_DEPENDENT_PROPS_ARRAY(get_id_index_iboe(C_ARD_ID_ARRAY,
-- IPIF_RDFIFO_DATA))
-- )
--------------------------------------------------------------------------------
function get_id_index_iboe (id_array :INTEGER_ARRAY_TYPE;
id : integer) return integer is
Variable match : Boolean := false;
Variable match_index : Integer := id_array'left; -- any valid array index
begin
for array_index in 0 to id_array'length-1 loop
If (match = true) Then -- match already found so do nothing
null;
else -- compare the numbers one by one
match := (id_array(array_index) = id);
If (match) Then match_index := array_index;
else null;
End if;
End if;
End loop;
return(match_index);
end function get_id_index_iboe;
-----------------------------------------------------------------------------
-- Function find_ard_id
--
-- This function is used to process the array specifying the target function
-- assigned to a Base Address pair address range. The id_array and a
-- integer id is input to the function. A boolean is returned reflecting the
-- presence (or not) of a number in the array matching the id input number.
-----------------------------------------------------------------------------
function find_ard_id (id_array : INTEGER_ARRAY_TYPE;
id : integer) return boolean is
Variable match : Boolean := false;
begin
for array_index in 0 to id_array'length-1 loop
If (match = true) Then -- match already found so do nothing
null;
else -- compare the numbers one by one
match := (id_array(array_index) = id);
End if;
End loop;
return(match);
end function find_ard_id;
-----------------------------------------------------------------------------
-- Function find_id_dwidth
--
-- This function is used to find the data width of a target module. If the
-- target module exists, the data width is extracted from the input dwidth
-- array. If the module is not in the ID array, the default input is
-- returned. This function is needed to assign data port size constraints on
-- unconstrained port widths.
-----------------------------------------------------------------------------
function find_id_dwidth (id_array : INTEGER_ARRAY_TYPE;
dwidth_array: INTEGER_ARRAY_TYPE;
id : integer;
default : integer) return integer is
Variable id_present : Boolean := false;
Variable array_index : Integer := 0;
Variable dwidth : Integer := default;
begin
id_present := find_ard_id(id_array, id);
If (id_present) Then
array_index := get_id_index (id_array, id);
dwidth := dwidth_array(array_index);
else
null; -- use default input
End if;
Return (dwidth);
end function find_id_dwidth;
-----------------------------------------------------------------------------
-- Function cnt_ipif_id_blks
--
-- This function is used to detirmine the number of IPIF components specified
-- in the ARD ID Array. An integer is returned representing the number
-- of elements counted. User IDs are ignored in the counting process.
-----------------------------------------------------------------------------
function cnt_ipif_id_blks (id_array : INTEGER_ARRAY_TYPE)
return integer is
Variable blk_count : integer := 0;
Variable temp_id : integer;
begin
for array_index in 0 to id_array'length-1 loop
temp_id := id_array(array_index);
If (temp_id = IPIF_WRFIFO_DATA or
temp_id = IPIF_RDFIFO_DATA or
temp_id = IPIF_RST or
temp_id = IPIF_INTR or
temp_id = IPIF_DMA_SG or
temp_id = IPIF_SESR_SEAR
) Then -- IPIF block found
blk_count := blk_count+1;
else -- go to next loop iteration
null;
End if;
End loop;
return(blk_count);
end function cnt_ipif_id_blks;
-----------------------------------------------------------------------------
-- Function get_ipif_id_dbus_index
--
-- This function is used to detirmine the IPIF relative index of a given
-- ID value. User IDs are ignored in the index detirmination.
-----------------------------------------------------------------------------
function get_ipif_id_dbus_index (id_array : INTEGER_ARRAY_TYPE;
id : integer)
return integer is
Variable blk_index : integer := 0;
Variable temp_id : integer;
Variable id_found : Boolean := false;
begin
for array_index in 0 to id_array'length-1 loop
temp_id := id_array(array_index);
If (id_found) then
null;
elsif (temp_id = id) then
id_found := true;
elsif (temp_id = IPIF_WRFIFO_DATA or
temp_id = IPIF_RDFIFO_DATA or
temp_id = IPIF_RST or
temp_id = IPIF_INTR or
temp_id = IPIF_DMA_SG or
temp_id = IPIF_SESR_SEAR
) Then -- IPIF block found
blk_index := blk_index+1;
else -- user block so do nothing
null;
End if;
End loop;
return(blk_index);
end function get_ipif_id_dbus_index;
------------------------------------------------------------------------------
-- Function: rebuild_slv32_array
--
-- Description:
-- This function takes an input slv32 array and rebuilds an output slv32
-- array composed of the first "num_valid_entry" elements from the input
-- array.
------------------------------------------------------------------------------
function rebuild_slv32_array (slv32_array : SLV32_ARRAY_TYPE;
num_valid_pairs : integer)
return SLV32_ARRAY_TYPE is
--Constants
constant num_elements : Integer := num_valid_pairs * 2;
-- Variables
variable temp_baseaddr32_array : SLV32_ARRAY_TYPE( 0 to num_elements-1);
begin
for array_index in 0 to num_elements-1 loop
temp_baseaddr32_array(array_index) := slv32_array(array_index);
end loop;
return(temp_baseaddr32_array);
end function rebuild_slv32_array;
------------------------------------------------------------------------------
-- Function: rebuild_slv64_array
--
-- Description:
-- This function takes an input slv64 array and rebuilds an output slv64
-- array composed of the first "num_valid_entry" elements from the input
-- array.
------------------------------------------------------------------------------
function rebuild_slv64_array (slv64_array : SLV64_ARRAY_TYPE;
num_valid_pairs : integer)
return SLV64_ARRAY_TYPE is
--Constants
constant num_elements : Integer := num_valid_pairs * 2;
-- Variables
variable temp_baseaddr64_array : SLV64_ARRAY_TYPE( 0 to num_elements-1);
begin
for array_index in 0 to num_elements-1 loop
temp_baseaddr64_array(array_index) := slv64_array(array_index);
end loop;
return(temp_baseaddr64_array);
end function rebuild_slv64_array;
------------------------------------------------------------------------------
-- Function: rebuild_int_array
--
-- Description:
-- This function takes an input integer array and rebuilds an output integer
-- array composed of the first "num_valid_entry" elements from the input
-- array.
------------------------------------------------------------------------------
function rebuild_int_array (int_array : INTEGER_ARRAY_TYPE;
num_valid_entry : integer)
return INTEGER_ARRAY_TYPE is
-- Variables
variable temp_int_array : INTEGER_ARRAY_TYPE( 0 to num_valid_entry-1);
begin
for array_index in 0 to num_valid_entry-1 loop
temp_int_array(array_index) := int_array(array_index);
end loop;
return(temp_int_array);
end function rebuild_int_array;
function bits_needed_for_vac(
fifo_present: boolean;
dependent_props : DEPENDENT_PROPS_TYPE
) return integer is
begin
if not fifo_present then
return 1; -- Zero would be better but leads to "0 to -1" null
-- ranges that are not handled by XST Flint or earlier
-- because of the negative index.
else
return
log2(1 + dependent_props(FIFO_CAPACITY_BITS) /
dependent_props(RD_WIDTH_BITS)
);
end if;
end function bits_needed_for_vac;
function bits_needed_for_occ(
fifo_present: boolean;
dependent_props : DEPENDENT_PROPS_TYPE
) return integer is
begin
if not fifo_present then
return 1; -- Zero would be better but leads to "0 to -1" null
-- ranges that are not handled by XST Flint or earlier
-- because of the negative index.
else
return
log2(1 + dependent_props(FIFO_CAPACITY_BITS) /
dependent_props(WR_WIDTH_BITS)
);
end if;
end function bits_needed_for_occ;
function eff_dp(id : integer;
dep_prop : integer;
value : integer) return integer is
variable dp : integer := dep_prop;
type bo2na_type is array (boolean) of natural;
constant bo2na : bo2na_type := (0, 1);
begin
if value /= 0 then return value; end if; -- Not default
case id is
when IPIF_CHDMA_CHANNELS =>
-------------------
return( bo2na(dp = CLK_PERIOD_PS ) * 10000
+ bo2na(dp = PACKET_WAIT_UNIT_NS ) * 1000000
+ bo2na(dp = BURST_SIZE ) * 16
);
when others => return 0;
end case;
end eff_dp;
function populate_intr_mode_array (num_user_intr : integer;
intr_capture_mode : integer)
return INTEGER_ARRAY_TYPE is
variable intr_mode_array : INTEGER_ARRAY_TYPE(0 to num_user_intr-1);
begin
for i in 0 to num_user_intr-1 loop
intr_mode_array(i) := intr_capture_mode;
end loop;
return intr_mode_array;
end function populate_intr_mode_array;
function add_intr_ard_id_array(include_intr : boolean;
ard_id_array : INTEGER_ARRAY_TYPE)
return INTEGER_ARRAY_TYPE is
variable intr_ard_id_array : INTEGER_ARRAY_TYPE(0 to ard_id_array'length);
begin
intr_ard_id_array(0 to ard_id_array'length-1) := ard_id_array;
if include_intr then
intr_ard_id_array(ard_id_array'length) := IPIF_INTR;
return intr_ard_id_array;
else
return ard_id_array;
end if;
end function add_intr_ard_id_array;
function add_intr_ard_addr_range_array(include_intr : boolean;
ZERO_ADDR_PAD : std_logic_vector;
intr_baseaddr : std_logic_vector;
intr_highaddr : std_logic_vector;
ard_id_array : INTEGER_ARRAY_TYPE;
ard_addr_range_array : SLV64_ARRAY_TYPE)
return SLV64_ARRAY_TYPE is
variable intr_ard_addr_range_array : SLV64_ARRAY_TYPE(0 to ard_addr_range_array'length+1);
begin
intr_ard_addr_range_array(0 to ard_addr_range_array'length-1) := ard_addr_range_array;
if include_intr then
intr_ard_addr_range_array(2*get_id_index(ard_id_array,IPIF_INTR))
:= ZERO_ADDR_PAD & intr_baseaddr;
intr_ard_addr_range_array(2*get_id_index(ard_id_array,IPIF_INTR)+1)
:= ZERO_ADDR_PAD & intr_highaddr;
return intr_ard_addr_range_array;
else
return ard_addr_range_array;
end if;
end function add_intr_ard_addr_range_array;
function add_intr_ard_dwidth_array(include_intr : boolean;
intr_dwidth : integer;
ard_id_array : INTEGER_ARRAY_TYPE;
ard_dwidth_array : INTEGER_ARRAY_TYPE)
return INTEGER_ARRAY_TYPE is
variable intr_ard_dwidth_array : INTEGER_ARRAY_TYPE(0 to ard_dwidth_array'length);
begin
intr_ard_dwidth_array(0 to ard_dwidth_array'length-1) := ard_dwidth_array;
if include_intr then
intr_ard_dwidth_array(get_id_index(ard_id_array, IPIF_INTR)) := intr_dwidth;
return intr_ard_dwidth_array;
else
return ard_dwidth_array;
end if;
end function add_intr_ard_dwidth_array;
function add_intr_ard_num_ce_array(include_intr : boolean;
ard_id_array : INTEGER_ARRAY_TYPE;
ard_num_ce_array : INTEGER_ARRAY_TYPE)
return INTEGER_ARRAY_TYPE is
variable intr_ard_num_ce_array : INTEGER_ARRAY_TYPE(0 to ard_num_ce_array'length);
begin
intr_ard_num_ce_array(0 to ard_num_ce_array'length-1) := ard_num_ce_array;
if include_intr then
intr_ard_num_ce_array(get_id_index(ard_id_array, IPIF_INTR)) := 16;
return intr_ard_num_ce_array;
else
return ard_num_ce_array;
end if;
end function add_intr_ard_num_ce_array;
end package body ipif_pkg;
|
-- IPIF Common Library Package
-------------------------------------------------------------------------------
--
-- *************************************************************************
-- ** **
-- ** DISCLAIMER OF LIABILITY **
-- ** **
-- ** This text/file contains proprietary, confidential **
-- ** information of Xilinx, Inc., is distributed under **
-- ** license from Xilinx, Inc., and may be used, copied **
-- ** and/or disclosed only pursuant to the terms of a valid **
-- ** license agreement with Xilinx, Inc. Xilinx hereby **
-- ** grants you a license to use this text/file solely for **
-- ** design, simulation, implementation and creation of **
-- ** design files limited to Xilinx devices or technologies. **
-- ** Use with non-Xilinx devices or technologies is expressly **
-- ** prohibited and immediately terminates your license unless **
-- ** covered by a separate agreement. **
-- ** **
-- ** Xilinx is providing this design, code, or information **
-- ** "as-is" solely for use in developing programs and **
-- ** solutions for Xilinx devices, with no obligation on the **
-- ** part of Xilinx to provide support. By providing this design, **
-- ** code, or information as one possible implementation of **
-- ** this feature, application or standard, Xilinx is making no **
-- ** representation that this implementation is free from any **
-- ** claims of infringement. You are responsible for obtaining **
-- ** any rights you may require for your implementation. **
-- ** Xilinx expressly disclaims any warranty whatsoever with **
-- ** respect to the adequacy of the implementation, including **
-- ** but not limited to any warranties or representations that this **
-- ** implementation is free from claims of infringement, implied **
-- ** warranties of merchantability or fitness for a particular **
-- ** purpose. **
-- ** **
-- ** Xilinx products are not intended for use in life support **
-- ** appliances, devices, or systems. Use in such applications is **
-- ** expressly prohibited. **
-- ** **
-- ** Any modifications that are made to the Source Code are **
-- ** done at the users sole risk and will be unsupported. **
-- ** The Xilinx Support Hotline does not have access to source **
-- ** code and therefore cannot answer specific questions related **
-- ** to source HDL. The Xilinx Hotline support of original source **
-- ** code IP shall only address issues and questions related **
-- ** to the standard Netlist version of the core (and thus **
-- ** indirectly, the original core source). **
-- ** **
-- ** Copyright (c) 2002-2010 Xilinx, Inc. All rights reserved. **
-- ** **
-- ** This copyright and support notice must be retained as part **
-- ** of this text at all times. **
-- ** **
-- *************************************************************************
--
-------------------------------------------------------------------------------
-- Filename: ipif_pkg.vhd
-- Version: Intital
-- Description: This file contains the constants and functions used in the
-- ipif common library components.
--
-------------------------------------------------------------------------------
-- Structure:
--
-------------------------------------------------------------------------------
-- Author: DET
-- History:
-- DET 02/21/02 -- Created from proc_common_pkg.vhd
--
-- DET 03/13/02 -- PLB IPIF development updates
-- ^^^^^^
-- - Commented out string types and string functions due to an XST
-- problem with string arrays and functions. THe string array
-- processing functions were replaced with comperable functions
-- operating on integer arrays.
-- ~~~~~~
--
--
-- DET 4/30/2002 Initial
-- ~~~~~~
-- - Added three functions: rebuild_slv32_array, rebuild_slv64_array, and
-- rebuild_int_array to support removal of unused elements from the
-- ARD arrays.
-- ^^^^^^ --
--
-- FLO 8/12/2002
-- ~~~~~~
-- - Added three functions: bits_needed_for_vac, bits_needed_for_occ,
-- and get_id_index_iboe.
-- (Removed provisional functions bits_needed_for_vacancy,
-- bits needed_for_occupancy, and bits_needed_for.)
-- ^^^^^^
--
-- FLO 3/24/2003
-- ~~~~~~
-- - Added dependent property paramters for channelized DMA.
-- - Added common property parameter array type.
-- - Definded the KEYHOLD_BURST common-property parameter.
-- ^^^^^^
--
-- FLO 10/22/2003
-- ~~~~~~
-- - Some adjustment to CHDMA parameterization.
-- - Cleanup of obsolete code and comments. (The former "XST workaround"
-- has become the officially deployed method.)
-- ^^^^^^
--
-- LSS 03/24/2004
-- ~~~~~~
-- - Added 5 functions
-- ^^^^^^
--
-- ALS 09/03/04
-- ^^^^^^
-- -- Added constants to describe the channel protocols used in MCH_OPB_IPIF
-- ~~~~~~
--
-- DET 1/17/2008 v4_0
-- ~~~~~~
-- - Changed proc_common library version to v4_0
-- - Incorporated new disclaimer header
-- ^^^^^^
--
-------------------------------------------------------------------------------
-- Naming Conventions:
-- active low signals: "*_n"
-- clock signals: "clk", "clk_div#", "clk_#x"
-- reset signals: "rst", "rst_n"
-- generics: "C_*"
-- user defined types: "*_TYPE"
-- state machine next state: "*_ns"
-- state machine current state: "*_cs"
-- combinatorial signals: "*_com"
-- pipelined or register delay signals: "*_d#"
-- counter signals: "*cnt*"
-- clock enable signals: "*_ce"
-- internal version of output port "*_i"
-- device pins: "*_pin"
-- ports: - Names begin with Uppercase
-- processes: "*_PROCESS"
-- component instantiations: "<ENTITY_>I_<#|FUNC>
-------------------------------------------------------------------------------
library ieee;
use ieee.std_logic_1164.all;
-- need conversion function to convert reals/integers to std logic vectors
use ieee.std_logic_arith.all;
use ieee.std_logic_arith.all;
use ieee.std_logic_unsigned.all;
package ipif_pkg is
-------------------------------------------------------------------------------
-- Type Declarations
-------------------------------------------------------------------------------
type SLV32_ARRAY_TYPE is array (natural range <>) of std_logic_vector(0 to 31);
subtype SLV64_TYPE is std_logic_vector(0 to 63);
type SLV64_ARRAY_TYPE is array (natural range <>) of SLV64_TYPE;
type INTEGER_ARRAY_TYPE is array (natural range <>) of integer;
-------------------------------------------------------------------------------
-- Function and Procedure Declarations
-------------------------------------------------------------------------------
function "=" (s1: in string; s2: in string) return boolean;
function equaluseCase( str1, str2 : STRING ) RETURN BOOLEAN;
function calc_num_ce (ce_num_array : INTEGER_ARRAY_TYPE) return integer;
function calc_start_ce_index (ce_num_array : INTEGER_ARRAY_TYPE;
index : integer) return integer;
function get_min_dwidth (dwidth_array: INTEGER_ARRAY_TYPE) return integer;
function get_max_dwidth (dwidth_array: INTEGER_ARRAY_TYPE) return integer;
function S32 (in_string : string) return string;
--------------------------------------------------------------------------------
-- ARD support functions.
-- These function can be useful when operating with the ARD parameterization.
--------------------------------------------------------------------------------
function get_id_index (id_array :INTEGER_ARRAY_TYPE;
id : integer)
return integer;
function get_id_index_iboe (id_array :INTEGER_ARRAY_TYPE;
id : integer)
return integer;
function find_ard_id (id_array : INTEGER_ARRAY_TYPE;
id : integer) return boolean;
function find_id_dwidth (id_array : INTEGER_ARRAY_TYPE;
dwidth_array: INTEGER_ARRAY_TYPE;
id : integer;
default : integer)
return integer;
function cnt_ipif_id_blks (id_array : INTEGER_ARRAY_TYPE) return integer;
function get_ipif_id_dbus_index (id_array : INTEGER_ARRAY_TYPE;
id : integer)
return integer ;
function rebuild_slv32_array (slv32_array : SLV32_ARRAY_TYPE;
num_valid_pairs : integer)
return SLV32_ARRAY_TYPE;
function rebuild_slv64_array (slv64_array : SLV64_ARRAY_TYPE;
num_valid_pairs : integer)
return SLV64_ARRAY_TYPE;
function rebuild_int_array (int_array : INTEGER_ARRAY_TYPE;
num_valid_entry : integer)
return INTEGER_ARRAY_TYPE;
-- 5 Functions Added 3/24/04
function populate_intr_mode_array (num_user_intr : integer;
intr_capture_mode : integer)
return INTEGER_ARRAY_TYPE ;
function add_intr_ard_id_array(include_intr : boolean;
ard_id_array : INTEGER_ARRAY_TYPE)
return INTEGER_ARRAY_TYPE;
function add_intr_ard_addr_range_array(include_intr : boolean;
ZERO_ADDR_PAD : std_logic_vector;
intr_baseaddr : std_logic_vector;
intr_highaddr : std_logic_vector;
ard_id_array : INTEGER_ARRAY_TYPE;
ard_addr_range_array : SLV64_ARRAY_TYPE)
return SLV64_ARRAY_TYPE;
function add_intr_ard_num_ce_array(include_intr : boolean;
ard_id_array : INTEGER_ARRAY_TYPE;
ard_num_ce_array : INTEGER_ARRAY_TYPE)
return INTEGER_ARRAY_TYPE;
function add_intr_ard_dwidth_array(include_intr : boolean;
intr_dwidth : integer;
ard_id_array : INTEGER_ARRAY_TYPE;
ard_dwidth_array : INTEGER_ARRAY_TYPE)
return INTEGER_ARRAY_TYPE;
function log2(x : natural) return integer;
function clog2(x : positive) return natural;
-------------------------------------------------------------------------------
-- Constant Declarations
-------------------------------------------------------------------------------
-------------------------------------------------------------------------------
-- Channel Protocols
-- The constant declarations below give symbolic-name aliases for values that
-- can be used in the C_MCH_PROTOCOL_ARRAY generic of the MCH_OPB_IPIF.
-------------------------------------------------------------------------------
constant XCL : integer := 0;
constant DAG : integer := 1;
--------------------------------------------------------------------------------
-- Address range types.
-- The constant declarations, below, give symbolic-name aliases for values
-- that can be used in the C_ARD_ID_ARRAY generic of IPIFs. The first set
-- gives aliases that are used to include IPIF services.
--------------------------------------------------------------------------------
-- IPIF module aliases
Constant IPIF_INTR : integer := 1;
Constant IPIF_RST : integer := 2;
Constant IPIF_SESR_SEAR : integer := 3;
Constant IPIF_DMA_SG : integer := 4;
Constant IPIF_WRFIFO_REG : integer := 5;
Constant IPIF_WRFIFO_DATA : integer := 6;
Constant IPIF_RDFIFO_REG : integer := 7;
Constant IPIF_RDFIFO_DATA : integer := 8;
Constant IPIF_CHDMA_CHANNELS : integer := 9;
Constant IPIF_CHDMA_GLOBAL_REGS : integer := 10;
Constant CHDMA_STATUS_FIFO : integer := 90;
-- Some predefined user module aliases
Constant USER_00 : integer := 100;
Constant USER_01 : integer := 101;
Constant USER_02 : integer := 102;
Constant USER_03 : integer := 103;
Constant USER_04 : integer := 104;
Constant USER_05 : integer := 105;
Constant USER_06 : integer := 106;
Constant USER_07 : integer := 107;
Constant USER_08 : integer := 108;
Constant USER_09 : integer := 109;
Constant USER_10 : integer := 110;
Constant USER_11 : integer := 111;
Constant USER_12 : integer := 112;
Constant USER_13 : integer := 113;
Constant USER_14 : integer := 114;
Constant USER_15 : integer := 115;
Constant USER_16 : integer := 116;
---( Start of Dependent Properties declarations
--------------------------------------------------------------------------------
-- Declarations for Dependent Properties (properties that depend on the type of
-- the address range, or in other words, address-range-specific parameters).
-- There is one property, i.e. one parameter, encoded as an integer at
-- each index of the properties array. There is one properties array for
-- each address range.
--
-- The C_ARD_DEPENDENT_PROPS_ARRAY generic parameter in (most) IPIFs is such
-- a properties array and it is usually giving its (static) value using a
-- VHDL aggregate construct. (--ToDo, give an example of this.)
--
-- The the "assigned" default value of a dependent property is zero. This value
-- is usually specified the aggregate by leaving its (index) name out so that
-- it is covered by an "others => 0" choice in the aggregate. Some parameters,
-- as noted in the definitions, below, have an "effective" default value that is
-- different from the assigned default value of zero. In such cases, the
-- function, eff_dp, given below, can be used to get the effective value of
-- the dependent property.
--------------------------------------------------------------------------------
constant DEPENDENT_PROPS_SIZE : integer := 32;
subtype DEPENDENT_PROPS_TYPE
is INTEGER_ARRAY_TYPE(0 to DEPENDENT_PROPS_SIZE-1);
type DEPENDENT_PROPS_ARRAY_TYPE
is array (natural range <>) of DEPENDENT_PROPS_TYPE;
--------------------------------------------------------------------------------
-- Below are the indices of dependent properties for the different types of
-- address ranges.
--
-- Example: Let C_ARD_DEPENDENT_PROPS_ARRAY hold the dependent properites
-- for a set of address ranges. Then, e.g.,
--
-- C_ARD_DEPENDENT_PROPS_ARRAY(i)(FIFO_CAPACITY_BITS)
--
-- gives the fifo capacity in bits, provided that the i'th address range
-- is of type IPIF_WRFIFO_DATA or IPIF_RDFIFO_DATA.
--
-- These indices should be referenced only by the names below and never
-- by numerical literals. (The right to change numerical index assignments
-- is reserved; applications using the names will not be affected by such
-- reassignments.)
--------------------------------------------------------------------------------
--
--ToDo, if the interrupt controller parameterization is ever moved to
-- C_ARD_DEPENDENT_PROPS_ARRAY, then the following declarations
-- could be uncommented and used.
---- IPIF_INTR IDX
---------------------------------------------------------------------------- ---
constant EXCLUDE_DEV_ISC : integer := 0;
-- 1 specifies that only the global interrupt
-- enable is present in the device interrupt source
-- controller and that the only source of interrupts
-- in the device is the IP interrupt source controller.
-- 0 specifies that the full device interrupt
-- source controller structure will be included.
constant INCLUDE_DEV_PENCODER : integer := 1;
-- 1 will include the Device IID in the device interrupt
-- source controller, 0 will exclude it.
--
-- IPIF_WRFIFO_DATA or IPIF_RDFIFO_DATA IDX
---------------------------------------------------------------------------- ---
constant FIFO_CAPACITY_BITS : integer := 0;
constant WR_WIDTH_BITS : integer := 1;
constant RD_WIDTH_BITS : integer := 2;
constant EXCLUDE_PACKET_MODE : integer := 3;
-- 1 Don't include packet mode features
-- 0 Include packet mode features
constant EXCLUDE_VACANCY : integer := 4;
-- 1 Don't include vacancy calculation
-- 0 Include vacancy calculation
-- See also the functions
-- bits_needed_for_vac and
-- bits_needed_for_occ that are declared below.
constant INCLUDE_DRE : integer := 5;
constant INCLUDE_AUTOPUSH_POP : integer := 6;
constant AUTOPUSH_POP_CE : integer := 7;
constant INCLUDE_CSUM : integer := 8;
--------------------------------------------------------------------------------
--
-- DMA_SG IDX
---------------------------------------------------------------------------- ---
--------------------------------------------------------------------------------
-- IPIF_CHDMA_CHANNELS IDX
---------------------------------------------------------------------------- ---
constant NUM_SUBS_FOR_PHYS_0 : integer :=0;
constant NUM_SUBS_FOR_PHYS_1 : integer :=1;
constant NUM_SUBS_FOR_PHYS_2 : integer :=2;
constant NUM_SUBS_FOR_PHYS_3 : integer :=3;
constant NUM_SUBS_FOR_PHYS_4 : integer :=4;
constant NUM_SUBS_FOR_PHYS_5 : integer :=5;
constant NUM_SUBS_FOR_PHYS_6 : integer :=6;
constant NUM_SUBS_FOR_PHYS_7 : integer :=7;
constant NUM_SUBS_FOR_PHYS_8 : integer :=8;
constant NUM_SUBS_FOR_PHYS_9 : integer :=9;
constant NUM_SUBS_FOR_PHYS_10 : integer :=10;
constant NUM_SUBS_FOR_PHYS_11 : integer :=11;
constant NUM_SUBS_FOR_PHYS_12 : integer :=12;
constant NUM_SUBS_FOR_PHYS_13 : integer :=13;
constant NUM_SUBS_FOR_PHYS_14 : integer :=14;
constant NUM_SUBS_FOR_PHYS_15 : integer :=15;
-- Gives the number of sub-channels for physical channel i.
--
-- These constants, which will be MAX_NUM_PHYS_CHANNELS in number (see
-- below), have consecutive values starting with 0 for
-- NUM_SUBS_FOR_PHYS_0. (The constants serve the purpose of giving symbolic
-- names for use in the dependent-properties aggregates that parameterize
-- an IPIF_CHDMA_CHANNELS address range.)
--
-- [Users can ignore this note for developers
-- If the number of physical channels changes, both the
-- IPIF_CHDMA_CHANNELS constants and MAX_NUM_PHYS_CHANNELS,
-- below, must be adjusted.
-- (Use of an array constant or a function of the form
-- NUM_SUBS_FOR_PHYS(i) to define the indices
-- runs afoul of LRM restrictions on non-locally static aggregate
-- choices. (Further, the LRM imposes perhaps unnecessarily
-- strict limits on what qualifies as a locally static primary.)
-- Note: This information is supplied for the benefit of anyone seeking
-- to improve the way that these NUM_SUBS_FOR_PHYS parameter
-- indices are defined.)
-- End of note for developers ]
--
-- The value associated with any index NUM_SUBS_FOR_PHYS_i in the
-- dependent-properties array must be even since TX and RX channels
-- come in pairs with the TX followed immediately by
-- the corresponding RX.
--
constant NUM_SIMPLE_DMA_CHANS : integer :=16;
-- The number of simple DMA channels.
constant NUM_SIMPLE_SG_CHANS : integer :=17;
-- The number of simple SG channels.
constant INTR_COALESCE : integer :=18;
-- 0 Interrupt coalescing is disabled
-- 1 Interrupt coalescing is enabled
constant CLK_PERIOD_PS : integer :=19;
-- The period of the OPB Bus clock in ps.
-- The default value of 0 is a special value that
-- is synonymous with 10000 ps (10 ns).
-- The value for CLK_PERIOD_PS is relevant only if (INTR_COALESCE = 1).
constant PACKET_WAIT_UNIT_NS : integer :=20;
-- Gives the unit for used for timing of pack-wait bounds.
-- The default value of 0 is a special value that
-- is synonymous with 1,000,000 ns (1 ms) and a non-default
-- value is typically only used for testing.
-- Relevant only if (INTR_COALESCE = 1).
constant BURST_SIZE : integer :=21;
-- 1, 2, 4, 8 or 16
-- The default value of 0 is a special value that
-- is synonymous with a burst size of 16.
-- Setting the BURST_SIZE to 1 effectively disables
-- bursts.
constant REMAINDER_AS_SINGLES : integer :=22;
-- 0 Remainder handled as a short burst
-- 1 Remainder handled as a series of singles
--------------------------------------------------------------------------------
-- The constant below is not the index of a dependent-properties
-- parameter (and, as such, would never appear as a choice in a
-- dependent-properties aggregate). Rather, it is fixed to the maximum
-- number of physical channels that an Address Range of type
-- IPIF_CHDMA_CHANNELS supports. It must be maintained in conjuction with
-- the constants named, e.g., NUM_SUBS_FOR_PHYS_15, above.
--------------------------------------------------------------------------------
constant MAX_NUM_PHYS_CHANNELS : natural := 16;
--------------------------------------------------------------------------
-- EXAMPLE: Here is an example dependent-properties aggregate for an
-- address range of type IPIF_CHDMA_CHANNELS.
-- To have a compact list of all of the CHDMA parameters, all are
-- shown, however three are commented out and the unneeded
-- MUM_SUBS_FOR_PHYS_x are excluded. The "OTHERS => 0" association
-- gives these parameters their default values, such that, for the example
--
-- - All physical channels above 2 have zero subchannels (effectively,
-- these physical channels are not used)
-- - There are no simple SG channels
-- - The packet-wait time unit is 1 ms
-- - Burst size is 16
--------------------------------------------------------------------------
-- (
-- NUM_SUBS_FOR_PHYS_0 => 8,
-- NUM_SUBS_FOR_PHYS_1 => 4,
-- NUM_SUBS_FOR_PHYS_2 => 14,
-- NUM_SIMPLE_DMA_CHANS => 1,
-- --NUM_SIMPLE_SG_CHANS => 5,
-- INTR_COALESCE => 1,
-- CLK_PERIOD_PS => 20000,
-- --PACKET_WAIT_UNIT_NS => 50000,
-- --BURST_SIZE => 1,
-- REMAINDER_AS_SINGLES => 1,
-- OTHERS => 0
-- )
--
--------------------------------------------------------------------------------
--------------------------------------------------------------------------------
-- Calculates the number of bits needed to convey the vacancy (emptiness) of
-- the fifo described by dependent_props, if fifo_present. If not fifo_present,
-- returns 0 (or the smallest value allowed by tool limitations on null arrays)
-- without making reference to dependent_props.
--------------------------------------------------------------------------------
function bits_needed_for_vac(
fifo_present: boolean;
dependent_props : DEPENDENT_PROPS_TYPE
) return integer;
--------------------------------------------------------------------------------
-- Calculates the number of bits needed to convey the occupancy (fullness) of
-- the fifo described by dependent_props, if fifo_present. If not fifo_present,
-- returns 0 (or the smallest value allowed by tool limitations on null arrays)
-- without making reference to dependent_props.
--------------------------------------------------------------------------------
function bits_needed_for_occ(
fifo_present: boolean;
dependent_props : DEPENDENT_PROPS_TYPE
) return integer;
--------------------------------------------------------------------------------
-- Function eff_dp.
--
-- For some of the dependent properties, the default value of zero is meant
-- to imply an effective default value of other than zero (see e.g.
-- PKT_WAIT_UNIT_NS for the IPIF_CHDMA_CHANNELS address-range type). The
-- following function is used to get the (possibly default-adjusted)
-- value for a dependent property.
--
-- Example call:
--
-- eff_value_of_param :=
-- eff_dp(
-- C_IPIF_CHDMA_CHANNELS,
-- PACKET_WAIT_UNIT_NS,
-- C_ARD_DEPENDENT_PROPS_ARRAY(i)(PACKET_WAIT_UNIT_NS)
-- );
--
-- where C_ARD_DEPENDENT_PROPS_ARRAY(i) is an object of type
-- DEPENDENT_PROPS_ARRAY_TYPE, that was parameterized for an address range of
-- type C_IPIF_CHDMA_CHANNELS.
--------------------------------------------------------------------------------
function eff_dp(id : integer; -- The type of address range.
dep_prop : integer; -- The index of the dependent prop.
value : integer -- The value at that index.
) return integer; -- The effective value, possibly adjusted
-- if value has the default value of 0.
---) End of Dependent Properties declarations
--------------------------------------------------------------------------------
-- Declarations for Common Properties (properties that apply regardless of the
-- type of the address range). Structurally, these work the same as
-- the dependent properties.
--------------------------------------------------------------------------------
constant COMMON_PROPS_SIZE : integer := 2;
subtype COMMON_PROPS_TYPE
is INTEGER_ARRAY_TYPE(0 to COMMON_PROPS_SIZE-1);
type COMMON_PROPS_ARRAY_TYPE
is array (natural range <>) of COMMON_PROPS_TYPE;
--------------------------------------------------------------------------------
-- Below are the indices of the common properties.
--
-- These indices should be referenced only by the names below and never
-- by numerical literals.
-- IDX
---------------------------------------------------------------------------- ---
constant KEYHOLE_BURST : integer := 0;
-- 1 All addresses of a burst are forced to the initial
-- address of the burst.
-- 0 Burst addresses follow the bus protocol.
-- IP interrupt mode array constants
Constant INTR_PASS_THRU : integer := 1;
Constant INTR_PASS_THRU_INV : integer := 2;
Constant INTR_REG_EVENT : integer := 3;
Constant INTR_REG_EVENT_INV : integer := 4;
Constant INTR_POS_EDGE_DETECT : integer := 5;
Constant INTR_NEG_EDGE_DETECT : integer := 6;
end ipif_pkg;
package body ipif_pkg is
-------------------------------------------------------------------------------
-- Function log2 -- returns number of bits needed to encode x choices
-- x = 0 returns 0
-- x = 1 returns 0
-- x = 2 returns 1
-- x = 4 returns 2, etc.
-------------------------------------------------------------------------------
--
function log2(x : natural) return integer is
variable i : integer := 0;
variable val: integer := 1;
begin
if x = 0 then return 0;
else
for j in 0 to 29 loop -- for loop for XST
if val >= x then null;
else
i := i+1;
val := val*2;
end if;
end loop;
-- Fix per CR520627 XST was ignoring this anyway and printing a
-- Warning in SRP file. This will get rid of the warning and not
-- impact simulation.
-- synthesis translate_off
assert val >= x
report "Function log2 received argument larger" &
" than its capability of 2^30. "
severity failure;
-- synthesis translate_on
return i;
end if;
end function log2;
--------------------------------------------------------------------------------
-- Function clog2 - returns the integer ceiling of the base 2 logarithm of x,
-- i.e., the least integer greater than or equal to log2(x).
--------------------------------------------------------------------------------
function clog2(x : positive) return natural is
variable r : natural := 0;
variable rp : natural := 1; -- rp tracks the value 2**r
begin
while rp < x loop -- Termination condition T: x <= 2**r
-- Loop invariant L: 2**(r-1) < x
r := r + 1;
if rp > integer'high - rp then exit; end if; -- If doubling rp overflows
-- the integer range, the doubled value would exceed x, so safe to exit.
rp := rp + rp;
end loop;
-- L and T <-> 2**(r-1) < x <= 2**r <-> (r-1) < log2(x) <= r
return r; --
end clog2;
-------------------------------------------------------------------------------
-- Function Definitions
-------------------------------------------------------------------------------
-----------------------------------------------------------------------------
-- Function "="
--
-- This function can be used to overload the "=" operator when comparing
-- strings.
-----------------------------------------------------------------------------
function "=" (s1: in string; s2: in string) return boolean is
constant tc: character := ' '; -- string termination character
variable i: integer := 1;
variable v1 : string(1 to s1'length) := s1;
variable v2 : string(1 to s2'length) := s2;
begin
while (i <= v1'length) and (v1(i) /= tc) and
(i <= v2'length) and (v2(i) /= tc) and
(v1(i) = v2(i))
loop
i := i+1;
end loop;
return ((i > v1'length) or (v1(i) = tc)) and
((i > v2'length) or (v2(i) = tc));
end;
----------------------------------------------------------------------------
-- Function equaluseCase
--
-- This function returns true if case sensitive string comparison determines
-- that str1 and str2 are the same.
-----------------------------------------------------------------------------
FUNCTION equaluseCase( str1, str2 : STRING ) RETURN BOOLEAN IS
CONSTANT len1 : INTEGER := str1'length;
CONSTANT len2 : INTEGER := str2'length;
VARIABLE equal : BOOLEAN := TRUE;
BEGIN
IF NOT (len1=len2) THEN
equal := FALSE;
ELSE
FOR i IN str1'range LOOP
IF NOT (str1(i) = str2(i)) THEN
equal := FALSE;
END IF;
END LOOP;
END IF;
RETURN equal;
END equaluseCase;
-----------------------------------------------------------------------------
-- Function calc_num_ce
--
-- This function is used to process the array specifying the number of Chip
-- Enables required for a Base Address specification. The array is input to
-- the function and an integer is returned reflecting the total number of
-- Chip Enables required for the CE, RdCE, and WrCE Buses
-----------------------------------------------------------------------------
function calc_num_ce (ce_num_array : INTEGER_ARRAY_TYPE) return integer is
Variable ce_num_sum : integer := 0;
begin
for i in 0 to (ce_num_array'length)-1 loop
ce_num_sum := ce_num_sum + ce_num_array(i);
End loop;
return(ce_num_sum);
end function calc_num_ce;
-----------------------------------------------------------------------------
-- Function calc_start_ce_index
--
-- This function is used to process the array specifying the number of Chip
-- Enables required for a Base Address specification. The CE Size array is
-- input to the function and an integer index representing the index of the
-- target module in the ce_num_array. An integer is returned reflecting the
-- starting index of the assigned Chip Enables within the CE, RdCE, and
-- WrCE Buses.
-----------------------------------------------------------------------------
function calc_start_ce_index (ce_num_array : INTEGER_ARRAY_TYPE;
index : integer) return integer is
Variable ce_num_sum : integer := 0;
begin
If (index = 0) Then
ce_num_sum := 0;
else
for i in 0 to index-1 loop
ce_num_sum := ce_num_sum + ce_num_array(i);
End loop;
End if;
return(ce_num_sum);
end function calc_start_ce_index;
-----------------------------------------------------------------------------
-- Function get_min_dwidth
--
-- This function is used to process the array specifying the data bus width
-- for each of the target modules. The dwidth_array is input to the function
-- and an integer is returned that is the smallest value found of all the
-- entries in the array.
-----------------------------------------------------------------------------
function get_min_dwidth (dwidth_array: INTEGER_ARRAY_TYPE) return integer is
Variable temp_min : Integer := 1024;
begin
for i in 0 to dwidth_array'length-1 loop
If (dwidth_array(i) < temp_min) Then
temp_min := dwidth_array(i);
else
null;
End if;
End loop;
return(temp_min);
end function get_min_dwidth;
-----------------------------------------------------------------------------
-- Function get_max_dwidth
--
-- This function is used to process the array specifying the data bus width
-- for each of the target modules. The dwidth_array is input to the function
-- and an integer is returned that is the largest value found of all the
-- entries in the array.
-----------------------------------------------------------------------------
function get_max_dwidth (dwidth_array: INTEGER_ARRAY_TYPE) return integer is
Variable temp_max : Integer := 0;
begin
for i in 0 to dwidth_array'length-1 loop
If (dwidth_array(i) > temp_max) Then
temp_max := dwidth_array(i);
else
null;
End if;
End loop;
return(temp_max);
end function get_max_dwidth;
-----------------------------------------------------------------------------
-- Function S32
--
-- This function is used to expand an input string to 32 characters by
-- padding with spaces. If the input string is larger than 32 characters,
-- it will truncate to 32 characters.
-----------------------------------------------------------------------------
function S32 (in_string : string) return string is
constant OUTPUT_STRING_LENGTH : integer := 32;
Constant space : character := ' ';
variable new_string : string(1 to 32);
Variable start_index : Integer := in_string'length+1;
begin
If (in_string'length < OUTPUT_STRING_LENGTH) Then
for i in 1 to in_string'length loop
new_string(i) := in_string(i);
End loop;
for j in start_index to OUTPUT_STRING_LENGTH loop
new_string(j) := space;
End loop;
else -- use first 32 chars of in_string (truncate the rest)
for k in 1 to OUTPUT_STRING_LENGTH loop
new_string(k) := in_string(k);
End loop;
End if;
return(new_string);
end function S32;
-----------------------------------------------------------------------------
-- Function get_id_index
--
-- This function is used to process the array specifying the target function
-- assigned to a Base Address pair address range. The id_array and a
-- id number is input to the function. A integer is returned reflecting the
-- array index of the id matching the id input number. This function
-- should only be called if the id number is known to exist in the
-- name_array input. This can be detirmined by using the find_ard_id
-- function.
-----------------------------------------------------------------------------
function get_id_index (id_array :INTEGER_ARRAY_TYPE;
id : integer) return integer is
Variable match : Boolean := false;
Variable match_index : Integer := 10000; -- a really big number!
begin
for array_index in 0 to id_array'length-1 loop
If (match = true) Then -- match already found so do nothing
null;
else -- compare the numbers one by one
match := (id_array(array_index) = id);
If (match) Then
match_index := array_index;
else
null;
End if;
End if;
End loop;
return(match_index);
end function get_id_index;
--------------------------------------------------------------------------------
-- get_id_index but return a value in bounds on error (iboe).
--
-- This function is the same as get_id_index, except that when id does
-- not exist in id_array, the value returned is any index that is
-- within the index range of id_array.
--
-- This function would normally only be used where function find_ard_id
-- is used to establish the existence of id but, even when non-existent,
-- an element of one of the ARD arrays will be computed from the
-- returned get_id_index_iboe value. See, e.g., function bits_needed_for_vac
-- and the example call, below
--
-- bits_needed_for_vac(
-- find_ard_id(C_ARD_ID_ARRAY, IPIF_RDFIFO_DATA),
-- C_ARD_DEPENDENT_PROPS_ARRAY(get_id_index_iboe(C_ARD_ID_ARRAY,
-- IPIF_RDFIFO_DATA))
-- )
--------------------------------------------------------------------------------
function get_id_index_iboe (id_array :INTEGER_ARRAY_TYPE;
id : integer) return integer is
Variable match : Boolean := false;
Variable match_index : Integer := id_array'left; -- any valid array index
begin
for array_index in 0 to id_array'length-1 loop
If (match = true) Then -- match already found so do nothing
null;
else -- compare the numbers one by one
match := (id_array(array_index) = id);
If (match) Then match_index := array_index;
else null;
End if;
End if;
End loop;
return(match_index);
end function get_id_index_iboe;
-----------------------------------------------------------------------------
-- Function find_ard_id
--
-- This function is used to process the array specifying the target function
-- assigned to a Base Address pair address range. The id_array and a
-- integer id is input to the function. A boolean is returned reflecting the
-- presence (or not) of a number in the array matching the id input number.
-----------------------------------------------------------------------------
function find_ard_id (id_array : INTEGER_ARRAY_TYPE;
id : integer) return boolean is
Variable match : Boolean := false;
begin
for array_index in 0 to id_array'length-1 loop
If (match = true) Then -- match already found so do nothing
null;
else -- compare the numbers one by one
match := (id_array(array_index) = id);
End if;
End loop;
return(match);
end function find_ard_id;
-----------------------------------------------------------------------------
-- Function find_id_dwidth
--
-- This function is used to find the data width of a target module. If the
-- target module exists, the data width is extracted from the input dwidth
-- array. If the module is not in the ID array, the default input is
-- returned. This function is needed to assign data port size constraints on
-- unconstrained port widths.
-----------------------------------------------------------------------------
function find_id_dwidth (id_array : INTEGER_ARRAY_TYPE;
dwidth_array: INTEGER_ARRAY_TYPE;
id : integer;
default : integer) return integer is
Variable id_present : Boolean := false;
Variable array_index : Integer := 0;
Variable dwidth : Integer := default;
begin
id_present := find_ard_id(id_array, id);
If (id_present) Then
array_index := get_id_index (id_array, id);
dwidth := dwidth_array(array_index);
else
null; -- use default input
End if;
Return (dwidth);
end function find_id_dwidth;
-----------------------------------------------------------------------------
-- Function cnt_ipif_id_blks
--
-- This function is used to detirmine the number of IPIF components specified
-- in the ARD ID Array. An integer is returned representing the number
-- of elements counted. User IDs are ignored in the counting process.
-----------------------------------------------------------------------------
function cnt_ipif_id_blks (id_array : INTEGER_ARRAY_TYPE)
return integer is
Variable blk_count : integer := 0;
Variable temp_id : integer;
begin
for array_index in 0 to id_array'length-1 loop
temp_id := id_array(array_index);
If (temp_id = IPIF_WRFIFO_DATA or
temp_id = IPIF_RDFIFO_DATA or
temp_id = IPIF_RST or
temp_id = IPIF_INTR or
temp_id = IPIF_DMA_SG or
temp_id = IPIF_SESR_SEAR
) Then -- IPIF block found
blk_count := blk_count+1;
else -- go to next loop iteration
null;
End if;
End loop;
return(blk_count);
end function cnt_ipif_id_blks;
-----------------------------------------------------------------------------
-- Function get_ipif_id_dbus_index
--
-- This function is used to detirmine the IPIF relative index of a given
-- ID value. User IDs are ignored in the index detirmination.
-----------------------------------------------------------------------------
function get_ipif_id_dbus_index (id_array : INTEGER_ARRAY_TYPE;
id : integer)
return integer is
Variable blk_index : integer := 0;
Variable temp_id : integer;
Variable id_found : Boolean := false;
begin
for array_index in 0 to id_array'length-1 loop
temp_id := id_array(array_index);
If (id_found) then
null;
elsif (temp_id = id) then
id_found := true;
elsif (temp_id = IPIF_WRFIFO_DATA or
temp_id = IPIF_RDFIFO_DATA or
temp_id = IPIF_RST or
temp_id = IPIF_INTR or
temp_id = IPIF_DMA_SG or
temp_id = IPIF_SESR_SEAR
) Then -- IPIF block found
blk_index := blk_index+1;
else -- user block so do nothing
null;
End if;
End loop;
return(blk_index);
end function get_ipif_id_dbus_index;
------------------------------------------------------------------------------
-- Function: rebuild_slv32_array
--
-- Description:
-- This function takes an input slv32 array and rebuilds an output slv32
-- array composed of the first "num_valid_entry" elements from the input
-- array.
------------------------------------------------------------------------------
function rebuild_slv32_array (slv32_array : SLV32_ARRAY_TYPE;
num_valid_pairs : integer)
return SLV32_ARRAY_TYPE is
--Constants
constant num_elements : Integer := num_valid_pairs * 2;
-- Variables
variable temp_baseaddr32_array : SLV32_ARRAY_TYPE( 0 to num_elements-1);
begin
for array_index in 0 to num_elements-1 loop
temp_baseaddr32_array(array_index) := slv32_array(array_index);
end loop;
return(temp_baseaddr32_array);
end function rebuild_slv32_array;
------------------------------------------------------------------------------
-- Function: rebuild_slv64_array
--
-- Description:
-- This function takes an input slv64 array and rebuilds an output slv64
-- array composed of the first "num_valid_entry" elements from the input
-- array.
------------------------------------------------------------------------------
function rebuild_slv64_array (slv64_array : SLV64_ARRAY_TYPE;
num_valid_pairs : integer)
return SLV64_ARRAY_TYPE is
--Constants
constant num_elements : Integer := num_valid_pairs * 2;
-- Variables
variable temp_baseaddr64_array : SLV64_ARRAY_TYPE( 0 to num_elements-1);
begin
for array_index in 0 to num_elements-1 loop
temp_baseaddr64_array(array_index) := slv64_array(array_index);
end loop;
return(temp_baseaddr64_array);
end function rebuild_slv64_array;
------------------------------------------------------------------------------
-- Function: rebuild_int_array
--
-- Description:
-- This function takes an input integer array and rebuilds an output integer
-- array composed of the first "num_valid_entry" elements from the input
-- array.
------------------------------------------------------------------------------
function rebuild_int_array (int_array : INTEGER_ARRAY_TYPE;
num_valid_entry : integer)
return INTEGER_ARRAY_TYPE is
-- Variables
variable temp_int_array : INTEGER_ARRAY_TYPE( 0 to num_valid_entry-1);
begin
for array_index in 0 to num_valid_entry-1 loop
temp_int_array(array_index) := int_array(array_index);
end loop;
return(temp_int_array);
end function rebuild_int_array;
function bits_needed_for_vac(
fifo_present: boolean;
dependent_props : DEPENDENT_PROPS_TYPE
) return integer is
begin
if not fifo_present then
return 1; -- Zero would be better but leads to "0 to -1" null
-- ranges that are not handled by XST Flint or earlier
-- because of the negative index.
else
return
log2(1 + dependent_props(FIFO_CAPACITY_BITS) /
dependent_props(RD_WIDTH_BITS)
);
end if;
end function bits_needed_for_vac;
function bits_needed_for_occ(
fifo_present: boolean;
dependent_props : DEPENDENT_PROPS_TYPE
) return integer is
begin
if not fifo_present then
return 1; -- Zero would be better but leads to "0 to -1" null
-- ranges that are not handled by XST Flint or earlier
-- because of the negative index.
else
return
log2(1 + dependent_props(FIFO_CAPACITY_BITS) /
dependent_props(WR_WIDTH_BITS)
);
end if;
end function bits_needed_for_occ;
function eff_dp(id : integer;
dep_prop : integer;
value : integer) return integer is
variable dp : integer := dep_prop;
type bo2na_type is array (boolean) of natural;
constant bo2na : bo2na_type := (0, 1);
begin
if value /= 0 then return value; end if; -- Not default
case id is
when IPIF_CHDMA_CHANNELS =>
-------------------
return( bo2na(dp = CLK_PERIOD_PS ) * 10000
+ bo2na(dp = PACKET_WAIT_UNIT_NS ) * 1000000
+ bo2na(dp = BURST_SIZE ) * 16
);
when others => return 0;
end case;
end eff_dp;
function populate_intr_mode_array (num_user_intr : integer;
intr_capture_mode : integer)
return INTEGER_ARRAY_TYPE is
variable intr_mode_array : INTEGER_ARRAY_TYPE(0 to num_user_intr-1);
begin
for i in 0 to num_user_intr-1 loop
intr_mode_array(i) := intr_capture_mode;
end loop;
return intr_mode_array;
end function populate_intr_mode_array;
function add_intr_ard_id_array(include_intr : boolean;
ard_id_array : INTEGER_ARRAY_TYPE)
return INTEGER_ARRAY_TYPE is
variable intr_ard_id_array : INTEGER_ARRAY_TYPE(0 to ard_id_array'length);
begin
intr_ard_id_array(0 to ard_id_array'length-1) := ard_id_array;
if include_intr then
intr_ard_id_array(ard_id_array'length) := IPIF_INTR;
return intr_ard_id_array;
else
return ard_id_array;
end if;
end function add_intr_ard_id_array;
function add_intr_ard_addr_range_array(include_intr : boolean;
ZERO_ADDR_PAD : std_logic_vector;
intr_baseaddr : std_logic_vector;
intr_highaddr : std_logic_vector;
ard_id_array : INTEGER_ARRAY_TYPE;
ard_addr_range_array : SLV64_ARRAY_TYPE)
return SLV64_ARRAY_TYPE is
variable intr_ard_addr_range_array : SLV64_ARRAY_TYPE(0 to ard_addr_range_array'length+1);
begin
intr_ard_addr_range_array(0 to ard_addr_range_array'length-1) := ard_addr_range_array;
if include_intr then
intr_ard_addr_range_array(2*get_id_index(ard_id_array,IPIF_INTR))
:= ZERO_ADDR_PAD & intr_baseaddr;
intr_ard_addr_range_array(2*get_id_index(ard_id_array,IPIF_INTR)+1)
:= ZERO_ADDR_PAD & intr_highaddr;
return intr_ard_addr_range_array;
else
return ard_addr_range_array;
end if;
end function add_intr_ard_addr_range_array;
function add_intr_ard_dwidth_array(include_intr : boolean;
intr_dwidth : integer;
ard_id_array : INTEGER_ARRAY_TYPE;
ard_dwidth_array : INTEGER_ARRAY_TYPE)
return INTEGER_ARRAY_TYPE is
variable intr_ard_dwidth_array : INTEGER_ARRAY_TYPE(0 to ard_dwidth_array'length);
begin
intr_ard_dwidth_array(0 to ard_dwidth_array'length-1) := ard_dwidth_array;
if include_intr then
intr_ard_dwidth_array(get_id_index(ard_id_array, IPIF_INTR)) := intr_dwidth;
return intr_ard_dwidth_array;
else
return ard_dwidth_array;
end if;
end function add_intr_ard_dwidth_array;
function add_intr_ard_num_ce_array(include_intr : boolean;
ard_id_array : INTEGER_ARRAY_TYPE;
ard_num_ce_array : INTEGER_ARRAY_TYPE)
return INTEGER_ARRAY_TYPE is
variable intr_ard_num_ce_array : INTEGER_ARRAY_TYPE(0 to ard_num_ce_array'length);
begin
intr_ard_num_ce_array(0 to ard_num_ce_array'length-1) := ard_num_ce_array;
if include_intr then
intr_ard_num_ce_array(get_id_index(ard_id_array, IPIF_INTR)) := 16;
return intr_ard_num_ce_array;
else
return ard_num_ce_array;
end if;
end function add_intr_ard_num_ce_array;
end package body ipif_pkg;
|
-- IPIF Common Library Package
-------------------------------------------------------------------------------
--
-- *************************************************************************
-- ** **
-- ** DISCLAIMER OF LIABILITY **
-- ** **
-- ** This text/file contains proprietary, confidential **
-- ** information of Xilinx, Inc., is distributed under **
-- ** license from Xilinx, Inc., and may be used, copied **
-- ** and/or disclosed only pursuant to the terms of a valid **
-- ** license agreement with Xilinx, Inc. Xilinx hereby **
-- ** grants you a license to use this text/file solely for **
-- ** design, simulation, implementation and creation of **
-- ** design files limited to Xilinx devices or technologies. **
-- ** Use with non-Xilinx devices or technologies is expressly **
-- ** prohibited and immediately terminates your license unless **
-- ** covered by a separate agreement. **
-- ** **
-- ** Xilinx is providing this design, code, or information **
-- ** "as-is" solely for use in developing programs and **
-- ** solutions for Xilinx devices, with no obligation on the **
-- ** part of Xilinx to provide support. By providing this design, **
-- ** code, or information as one possible implementation of **
-- ** this feature, application or standard, Xilinx is making no **
-- ** representation that this implementation is free from any **
-- ** claims of infringement. You are responsible for obtaining **
-- ** any rights you may require for your implementation. **
-- ** Xilinx expressly disclaims any warranty whatsoever with **
-- ** respect to the adequacy of the implementation, including **
-- ** but not limited to any warranties or representations that this **
-- ** implementation is free from claims of infringement, implied **
-- ** warranties of merchantability or fitness for a particular **
-- ** purpose. **
-- ** **
-- ** Xilinx products are not intended for use in life support **
-- ** appliances, devices, or systems. Use in such applications is **
-- ** expressly prohibited. **
-- ** **
-- ** Any modifications that are made to the Source Code are **
-- ** done at the users sole risk and will be unsupported. **
-- ** The Xilinx Support Hotline does not have access to source **
-- ** code and therefore cannot answer specific questions related **
-- ** to source HDL. The Xilinx Hotline support of original source **
-- ** code IP shall only address issues and questions related **
-- ** to the standard Netlist version of the core (and thus **
-- ** indirectly, the original core source). **
-- ** **
-- ** Copyright (c) 2002-2010 Xilinx, Inc. All rights reserved. **
-- ** **
-- ** This copyright and support notice must be retained as part **
-- ** of this text at all times. **
-- ** **
-- *************************************************************************
--
-------------------------------------------------------------------------------
-- Filename: ipif_pkg.vhd
-- Version: Intital
-- Description: This file contains the constants and functions used in the
-- ipif common library components.
--
-------------------------------------------------------------------------------
-- Structure:
--
-------------------------------------------------------------------------------
-- Author: DET
-- History:
-- DET 02/21/02 -- Created from proc_common_pkg.vhd
--
-- DET 03/13/02 -- PLB IPIF development updates
-- ^^^^^^
-- - Commented out string types and string functions due to an XST
-- problem with string arrays and functions. THe string array
-- processing functions were replaced with comperable functions
-- operating on integer arrays.
-- ~~~~~~
--
--
-- DET 4/30/2002 Initial
-- ~~~~~~
-- - Added three functions: rebuild_slv32_array, rebuild_slv64_array, and
-- rebuild_int_array to support removal of unused elements from the
-- ARD arrays.
-- ^^^^^^ --
--
-- FLO 8/12/2002
-- ~~~~~~
-- - Added three functions: bits_needed_for_vac, bits_needed_for_occ,
-- and get_id_index_iboe.
-- (Removed provisional functions bits_needed_for_vacancy,
-- bits needed_for_occupancy, and bits_needed_for.)
-- ^^^^^^
--
-- FLO 3/24/2003
-- ~~~~~~
-- - Added dependent property paramters for channelized DMA.
-- - Added common property parameter array type.
-- - Definded the KEYHOLD_BURST common-property parameter.
-- ^^^^^^
--
-- FLO 10/22/2003
-- ~~~~~~
-- - Some adjustment to CHDMA parameterization.
-- - Cleanup of obsolete code and comments. (The former "XST workaround"
-- has become the officially deployed method.)
-- ^^^^^^
--
-- LSS 03/24/2004
-- ~~~~~~
-- - Added 5 functions
-- ^^^^^^
--
-- ALS 09/03/04
-- ^^^^^^
-- -- Added constants to describe the channel protocols used in MCH_OPB_IPIF
-- ~~~~~~
--
-- DET 1/17/2008 v4_0
-- ~~~~~~
-- - Changed proc_common library version to v4_0
-- - Incorporated new disclaimer header
-- ^^^^^^
--
-------------------------------------------------------------------------------
-- Naming Conventions:
-- active low signals: "*_n"
-- clock signals: "clk", "clk_div#", "clk_#x"
-- reset signals: "rst", "rst_n"
-- generics: "C_*"
-- user defined types: "*_TYPE"
-- state machine next state: "*_ns"
-- state machine current state: "*_cs"
-- combinatorial signals: "*_com"
-- pipelined or register delay signals: "*_d#"
-- counter signals: "*cnt*"
-- clock enable signals: "*_ce"
-- internal version of output port "*_i"
-- device pins: "*_pin"
-- ports: - Names begin with Uppercase
-- processes: "*_PROCESS"
-- component instantiations: "<ENTITY_>I_<#|FUNC>
-------------------------------------------------------------------------------
library ieee;
use ieee.std_logic_1164.all;
-- need conversion function to convert reals/integers to std logic vectors
use ieee.std_logic_arith.all;
use ieee.std_logic_arith.all;
use ieee.std_logic_unsigned.all;
package ipif_pkg is
-------------------------------------------------------------------------------
-- Type Declarations
-------------------------------------------------------------------------------
type SLV32_ARRAY_TYPE is array (natural range <>) of std_logic_vector(0 to 31);
subtype SLV64_TYPE is std_logic_vector(0 to 63);
type SLV64_ARRAY_TYPE is array (natural range <>) of SLV64_TYPE;
type INTEGER_ARRAY_TYPE is array (natural range <>) of integer;
-------------------------------------------------------------------------------
-- Function and Procedure Declarations
-------------------------------------------------------------------------------
function "=" (s1: in string; s2: in string) return boolean;
function equaluseCase( str1, str2 : STRING ) RETURN BOOLEAN;
function calc_num_ce (ce_num_array : INTEGER_ARRAY_TYPE) return integer;
function calc_start_ce_index (ce_num_array : INTEGER_ARRAY_TYPE;
index : integer) return integer;
function get_min_dwidth (dwidth_array: INTEGER_ARRAY_TYPE) return integer;
function get_max_dwidth (dwidth_array: INTEGER_ARRAY_TYPE) return integer;
function S32 (in_string : string) return string;
--------------------------------------------------------------------------------
-- ARD support functions.
-- These function can be useful when operating with the ARD parameterization.
--------------------------------------------------------------------------------
function get_id_index (id_array :INTEGER_ARRAY_TYPE;
id : integer)
return integer;
function get_id_index_iboe (id_array :INTEGER_ARRAY_TYPE;
id : integer)
return integer;
function find_ard_id (id_array : INTEGER_ARRAY_TYPE;
id : integer) return boolean;
function find_id_dwidth (id_array : INTEGER_ARRAY_TYPE;
dwidth_array: INTEGER_ARRAY_TYPE;
id : integer;
default : integer)
return integer;
function cnt_ipif_id_blks (id_array : INTEGER_ARRAY_TYPE) return integer;
function get_ipif_id_dbus_index (id_array : INTEGER_ARRAY_TYPE;
id : integer)
return integer ;
function rebuild_slv32_array (slv32_array : SLV32_ARRAY_TYPE;
num_valid_pairs : integer)
return SLV32_ARRAY_TYPE;
function rebuild_slv64_array (slv64_array : SLV64_ARRAY_TYPE;
num_valid_pairs : integer)
return SLV64_ARRAY_TYPE;
function rebuild_int_array (int_array : INTEGER_ARRAY_TYPE;
num_valid_entry : integer)
return INTEGER_ARRAY_TYPE;
-- 5 Functions Added 3/24/04
function populate_intr_mode_array (num_user_intr : integer;
intr_capture_mode : integer)
return INTEGER_ARRAY_TYPE ;
function add_intr_ard_id_array(include_intr : boolean;
ard_id_array : INTEGER_ARRAY_TYPE)
return INTEGER_ARRAY_TYPE;
function add_intr_ard_addr_range_array(include_intr : boolean;
ZERO_ADDR_PAD : std_logic_vector;
intr_baseaddr : std_logic_vector;
intr_highaddr : std_logic_vector;
ard_id_array : INTEGER_ARRAY_TYPE;
ard_addr_range_array : SLV64_ARRAY_TYPE)
return SLV64_ARRAY_TYPE;
function add_intr_ard_num_ce_array(include_intr : boolean;
ard_id_array : INTEGER_ARRAY_TYPE;
ard_num_ce_array : INTEGER_ARRAY_TYPE)
return INTEGER_ARRAY_TYPE;
function add_intr_ard_dwidth_array(include_intr : boolean;
intr_dwidth : integer;
ard_id_array : INTEGER_ARRAY_TYPE;
ard_dwidth_array : INTEGER_ARRAY_TYPE)
return INTEGER_ARRAY_TYPE;
function log2(x : natural) return integer;
function clog2(x : positive) return natural;
-------------------------------------------------------------------------------
-- Constant Declarations
-------------------------------------------------------------------------------
-------------------------------------------------------------------------------
-- Channel Protocols
-- The constant declarations below give symbolic-name aliases for values that
-- can be used in the C_MCH_PROTOCOL_ARRAY generic of the MCH_OPB_IPIF.
-------------------------------------------------------------------------------
constant XCL : integer := 0;
constant DAG : integer := 1;
--------------------------------------------------------------------------------
-- Address range types.
-- The constant declarations, below, give symbolic-name aliases for values
-- that can be used in the C_ARD_ID_ARRAY generic of IPIFs. The first set
-- gives aliases that are used to include IPIF services.
--------------------------------------------------------------------------------
-- IPIF module aliases
Constant IPIF_INTR : integer := 1;
Constant IPIF_RST : integer := 2;
Constant IPIF_SESR_SEAR : integer := 3;
Constant IPIF_DMA_SG : integer := 4;
Constant IPIF_WRFIFO_REG : integer := 5;
Constant IPIF_WRFIFO_DATA : integer := 6;
Constant IPIF_RDFIFO_REG : integer := 7;
Constant IPIF_RDFIFO_DATA : integer := 8;
Constant IPIF_CHDMA_CHANNELS : integer := 9;
Constant IPIF_CHDMA_GLOBAL_REGS : integer := 10;
Constant CHDMA_STATUS_FIFO : integer := 90;
-- Some predefined user module aliases
Constant USER_00 : integer := 100;
Constant USER_01 : integer := 101;
Constant USER_02 : integer := 102;
Constant USER_03 : integer := 103;
Constant USER_04 : integer := 104;
Constant USER_05 : integer := 105;
Constant USER_06 : integer := 106;
Constant USER_07 : integer := 107;
Constant USER_08 : integer := 108;
Constant USER_09 : integer := 109;
Constant USER_10 : integer := 110;
Constant USER_11 : integer := 111;
Constant USER_12 : integer := 112;
Constant USER_13 : integer := 113;
Constant USER_14 : integer := 114;
Constant USER_15 : integer := 115;
Constant USER_16 : integer := 116;
---( Start of Dependent Properties declarations
--------------------------------------------------------------------------------
-- Declarations for Dependent Properties (properties that depend on the type of
-- the address range, or in other words, address-range-specific parameters).
-- There is one property, i.e. one parameter, encoded as an integer at
-- each index of the properties array. There is one properties array for
-- each address range.
--
-- The C_ARD_DEPENDENT_PROPS_ARRAY generic parameter in (most) IPIFs is such
-- a properties array and it is usually giving its (static) value using a
-- VHDL aggregate construct. (--ToDo, give an example of this.)
--
-- The the "assigned" default value of a dependent property is zero. This value
-- is usually specified the aggregate by leaving its (index) name out so that
-- it is covered by an "others => 0" choice in the aggregate. Some parameters,
-- as noted in the definitions, below, have an "effective" default value that is
-- different from the assigned default value of zero. In such cases, the
-- function, eff_dp, given below, can be used to get the effective value of
-- the dependent property.
--------------------------------------------------------------------------------
constant DEPENDENT_PROPS_SIZE : integer := 32;
subtype DEPENDENT_PROPS_TYPE
is INTEGER_ARRAY_TYPE(0 to DEPENDENT_PROPS_SIZE-1);
type DEPENDENT_PROPS_ARRAY_TYPE
is array (natural range <>) of DEPENDENT_PROPS_TYPE;
--------------------------------------------------------------------------------
-- Below are the indices of dependent properties for the different types of
-- address ranges.
--
-- Example: Let C_ARD_DEPENDENT_PROPS_ARRAY hold the dependent properites
-- for a set of address ranges. Then, e.g.,
--
-- C_ARD_DEPENDENT_PROPS_ARRAY(i)(FIFO_CAPACITY_BITS)
--
-- gives the fifo capacity in bits, provided that the i'th address range
-- is of type IPIF_WRFIFO_DATA or IPIF_RDFIFO_DATA.
--
-- These indices should be referenced only by the names below and never
-- by numerical literals. (The right to change numerical index assignments
-- is reserved; applications using the names will not be affected by such
-- reassignments.)
--------------------------------------------------------------------------------
--
--ToDo, if the interrupt controller parameterization is ever moved to
-- C_ARD_DEPENDENT_PROPS_ARRAY, then the following declarations
-- could be uncommented and used.
---- IPIF_INTR IDX
---------------------------------------------------------------------------- ---
constant EXCLUDE_DEV_ISC : integer := 0;
-- 1 specifies that only the global interrupt
-- enable is present in the device interrupt source
-- controller and that the only source of interrupts
-- in the device is the IP interrupt source controller.
-- 0 specifies that the full device interrupt
-- source controller structure will be included.
constant INCLUDE_DEV_PENCODER : integer := 1;
-- 1 will include the Device IID in the device interrupt
-- source controller, 0 will exclude it.
--
-- IPIF_WRFIFO_DATA or IPIF_RDFIFO_DATA IDX
---------------------------------------------------------------------------- ---
constant FIFO_CAPACITY_BITS : integer := 0;
constant WR_WIDTH_BITS : integer := 1;
constant RD_WIDTH_BITS : integer := 2;
constant EXCLUDE_PACKET_MODE : integer := 3;
-- 1 Don't include packet mode features
-- 0 Include packet mode features
constant EXCLUDE_VACANCY : integer := 4;
-- 1 Don't include vacancy calculation
-- 0 Include vacancy calculation
-- See also the functions
-- bits_needed_for_vac and
-- bits_needed_for_occ that are declared below.
constant INCLUDE_DRE : integer := 5;
constant INCLUDE_AUTOPUSH_POP : integer := 6;
constant AUTOPUSH_POP_CE : integer := 7;
constant INCLUDE_CSUM : integer := 8;
--------------------------------------------------------------------------------
--
-- DMA_SG IDX
---------------------------------------------------------------------------- ---
--------------------------------------------------------------------------------
-- IPIF_CHDMA_CHANNELS IDX
---------------------------------------------------------------------------- ---
constant NUM_SUBS_FOR_PHYS_0 : integer :=0;
constant NUM_SUBS_FOR_PHYS_1 : integer :=1;
constant NUM_SUBS_FOR_PHYS_2 : integer :=2;
constant NUM_SUBS_FOR_PHYS_3 : integer :=3;
constant NUM_SUBS_FOR_PHYS_4 : integer :=4;
constant NUM_SUBS_FOR_PHYS_5 : integer :=5;
constant NUM_SUBS_FOR_PHYS_6 : integer :=6;
constant NUM_SUBS_FOR_PHYS_7 : integer :=7;
constant NUM_SUBS_FOR_PHYS_8 : integer :=8;
constant NUM_SUBS_FOR_PHYS_9 : integer :=9;
constant NUM_SUBS_FOR_PHYS_10 : integer :=10;
constant NUM_SUBS_FOR_PHYS_11 : integer :=11;
constant NUM_SUBS_FOR_PHYS_12 : integer :=12;
constant NUM_SUBS_FOR_PHYS_13 : integer :=13;
constant NUM_SUBS_FOR_PHYS_14 : integer :=14;
constant NUM_SUBS_FOR_PHYS_15 : integer :=15;
-- Gives the number of sub-channels for physical channel i.
--
-- These constants, which will be MAX_NUM_PHYS_CHANNELS in number (see
-- below), have consecutive values starting with 0 for
-- NUM_SUBS_FOR_PHYS_0. (The constants serve the purpose of giving symbolic
-- names for use in the dependent-properties aggregates that parameterize
-- an IPIF_CHDMA_CHANNELS address range.)
--
-- [Users can ignore this note for developers
-- If the number of physical channels changes, both the
-- IPIF_CHDMA_CHANNELS constants and MAX_NUM_PHYS_CHANNELS,
-- below, must be adjusted.
-- (Use of an array constant or a function of the form
-- NUM_SUBS_FOR_PHYS(i) to define the indices
-- runs afoul of LRM restrictions on non-locally static aggregate
-- choices. (Further, the LRM imposes perhaps unnecessarily
-- strict limits on what qualifies as a locally static primary.)
-- Note: This information is supplied for the benefit of anyone seeking
-- to improve the way that these NUM_SUBS_FOR_PHYS parameter
-- indices are defined.)
-- End of note for developers ]
--
-- The value associated with any index NUM_SUBS_FOR_PHYS_i in the
-- dependent-properties array must be even since TX and RX channels
-- come in pairs with the TX followed immediately by
-- the corresponding RX.
--
constant NUM_SIMPLE_DMA_CHANS : integer :=16;
-- The number of simple DMA channels.
constant NUM_SIMPLE_SG_CHANS : integer :=17;
-- The number of simple SG channels.
constant INTR_COALESCE : integer :=18;
-- 0 Interrupt coalescing is disabled
-- 1 Interrupt coalescing is enabled
constant CLK_PERIOD_PS : integer :=19;
-- The period of the OPB Bus clock in ps.
-- The default value of 0 is a special value that
-- is synonymous with 10000 ps (10 ns).
-- The value for CLK_PERIOD_PS is relevant only if (INTR_COALESCE = 1).
constant PACKET_WAIT_UNIT_NS : integer :=20;
-- Gives the unit for used for timing of pack-wait bounds.
-- The default value of 0 is a special value that
-- is synonymous with 1,000,000 ns (1 ms) and a non-default
-- value is typically only used for testing.
-- Relevant only if (INTR_COALESCE = 1).
constant BURST_SIZE : integer :=21;
-- 1, 2, 4, 8 or 16
-- The default value of 0 is a special value that
-- is synonymous with a burst size of 16.
-- Setting the BURST_SIZE to 1 effectively disables
-- bursts.
constant REMAINDER_AS_SINGLES : integer :=22;
-- 0 Remainder handled as a short burst
-- 1 Remainder handled as a series of singles
--------------------------------------------------------------------------------
-- The constant below is not the index of a dependent-properties
-- parameter (and, as such, would never appear as a choice in a
-- dependent-properties aggregate). Rather, it is fixed to the maximum
-- number of physical channels that an Address Range of type
-- IPIF_CHDMA_CHANNELS supports. It must be maintained in conjuction with
-- the constants named, e.g., NUM_SUBS_FOR_PHYS_15, above.
--------------------------------------------------------------------------------
constant MAX_NUM_PHYS_CHANNELS : natural := 16;
--------------------------------------------------------------------------
-- EXAMPLE: Here is an example dependent-properties aggregate for an
-- address range of type IPIF_CHDMA_CHANNELS.
-- To have a compact list of all of the CHDMA parameters, all are
-- shown, however three are commented out and the unneeded
-- MUM_SUBS_FOR_PHYS_x are excluded. The "OTHERS => 0" association
-- gives these parameters their default values, such that, for the example
--
-- - All physical channels above 2 have zero subchannels (effectively,
-- these physical channels are not used)
-- - There are no simple SG channels
-- - The packet-wait time unit is 1 ms
-- - Burst size is 16
--------------------------------------------------------------------------
-- (
-- NUM_SUBS_FOR_PHYS_0 => 8,
-- NUM_SUBS_FOR_PHYS_1 => 4,
-- NUM_SUBS_FOR_PHYS_2 => 14,
-- NUM_SIMPLE_DMA_CHANS => 1,
-- --NUM_SIMPLE_SG_CHANS => 5,
-- INTR_COALESCE => 1,
-- CLK_PERIOD_PS => 20000,
-- --PACKET_WAIT_UNIT_NS => 50000,
-- --BURST_SIZE => 1,
-- REMAINDER_AS_SINGLES => 1,
-- OTHERS => 0
-- )
--
--------------------------------------------------------------------------------
--------------------------------------------------------------------------------
-- Calculates the number of bits needed to convey the vacancy (emptiness) of
-- the fifo described by dependent_props, if fifo_present. If not fifo_present,
-- returns 0 (or the smallest value allowed by tool limitations on null arrays)
-- without making reference to dependent_props.
--------------------------------------------------------------------------------
function bits_needed_for_vac(
fifo_present: boolean;
dependent_props : DEPENDENT_PROPS_TYPE
) return integer;
--------------------------------------------------------------------------------
-- Calculates the number of bits needed to convey the occupancy (fullness) of
-- the fifo described by dependent_props, if fifo_present. If not fifo_present,
-- returns 0 (or the smallest value allowed by tool limitations on null arrays)
-- without making reference to dependent_props.
--------------------------------------------------------------------------------
function bits_needed_for_occ(
fifo_present: boolean;
dependent_props : DEPENDENT_PROPS_TYPE
) return integer;
--------------------------------------------------------------------------------
-- Function eff_dp.
--
-- For some of the dependent properties, the default value of zero is meant
-- to imply an effective default value of other than zero (see e.g.
-- PKT_WAIT_UNIT_NS for the IPIF_CHDMA_CHANNELS address-range type). The
-- following function is used to get the (possibly default-adjusted)
-- value for a dependent property.
--
-- Example call:
--
-- eff_value_of_param :=
-- eff_dp(
-- C_IPIF_CHDMA_CHANNELS,
-- PACKET_WAIT_UNIT_NS,
-- C_ARD_DEPENDENT_PROPS_ARRAY(i)(PACKET_WAIT_UNIT_NS)
-- );
--
-- where C_ARD_DEPENDENT_PROPS_ARRAY(i) is an object of type
-- DEPENDENT_PROPS_ARRAY_TYPE, that was parameterized for an address range of
-- type C_IPIF_CHDMA_CHANNELS.
--------------------------------------------------------------------------------
function eff_dp(id : integer; -- The type of address range.
dep_prop : integer; -- The index of the dependent prop.
value : integer -- The value at that index.
) return integer; -- The effective value, possibly adjusted
-- if value has the default value of 0.
---) End of Dependent Properties declarations
--------------------------------------------------------------------------------
-- Declarations for Common Properties (properties that apply regardless of the
-- type of the address range). Structurally, these work the same as
-- the dependent properties.
--------------------------------------------------------------------------------
constant COMMON_PROPS_SIZE : integer := 2;
subtype COMMON_PROPS_TYPE
is INTEGER_ARRAY_TYPE(0 to COMMON_PROPS_SIZE-1);
type COMMON_PROPS_ARRAY_TYPE
is array (natural range <>) of COMMON_PROPS_TYPE;
--------------------------------------------------------------------------------
-- Below are the indices of the common properties.
--
-- These indices should be referenced only by the names below and never
-- by numerical literals.
-- IDX
---------------------------------------------------------------------------- ---
constant KEYHOLE_BURST : integer := 0;
-- 1 All addresses of a burst are forced to the initial
-- address of the burst.
-- 0 Burst addresses follow the bus protocol.
-- IP interrupt mode array constants
Constant INTR_PASS_THRU : integer := 1;
Constant INTR_PASS_THRU_INV : integer := 2;
Constant INTR_REG_EVENT : integer := 3;
Constant INTR_REG_EVENT_INV : integer := 4;
Constant INTR_POS_EDGE_DETECT : integer := 5;
Constant INTR_NEG_EDGE_DETECT : integer := 6;
end ipif_pkg;
package body ipif_pkg is
-------------------------------------------------------------------------------
-- Function log2 -- returns number of bits needed to encode x choices
-- x = 0 returns 0
-- x = 1 returns 0
-- x = 2 returns 1
-- x = 4 returns 2, etc.
-------------------------------------------------------------------------------
--
function log2(x : natural) return integer is
variable i : integer := 0;
variable val: integer := 1;
begin
if x = 0 then return 0;
else
for j in 0 to 29 loop -- for loop for XST
if val >= x then null;
else
i := i+1;
val := val*2;
end if;
end loop;
-- Fix per CR520627 XST was ignoring this anyway and printing a
-- Warning in SRP file. This will get rid of the warning and not
-- impact simulation.
-- synthesis translate_off
assert val >= x
report "Function log2 received argument larger" &
" than its capability of 2^30. "
severity failure;
-- synthesis translate_on
return i;
end if;
end function log2;
--------------------------------------------------------------------------------
-- Function clog2 - returns the integer ceiling of the base 2 logarithm of x,
-- i.e., the least integer greater than or equal to log2(x).
--------------------------------------------------------------------------------
function clog2(x : positive) return natural is
variable r : natural := 0;
variable rp : natural := 1; -- rp tracks the value 2**r
begin
while rp < x loop -- Termination condition T: x <= 2**r
-- Loop invariant L: 2**(r-1) < x
r := r + 1;
if rp > integer'high - rp then exit; end if; -- If doubling rp overflows
-- the integer range, the doubled value would exceed x, so safe to exit.
rp := rp + rp;
end loop;
-- L and T <-> 2**(r-1) < x <= 2**r <-> (r-1) < log2(x) <= r
return r; --
end clog2;
-------------------------------------------------------------------------------
-- Function Definitions
-------------------------------------------------------------------------------
-----------------------------------------------------------------------------
-- Function "="
--
-- This function can be used to overload the "=" operator when comparing
-- strings.
-----------------------------------------------------------------------------
function "=" (s1: in string; s2: in string) return boolean is
constant tc: character := ' '; -- string termination character
variable i: integer := 1;
variable v1 : string(1 to s1'length) := s1;
variable v2 : string(1 to s2'length) := s2;
begin
while (i <= v1'length) and (v1(i) /= tc) and
(i <= v2'length) and (v2(i) /= tc) and
(v1(i) = v2(i))
loop
i := i+1;
end loop;
return ((i > v1'length) or (v1(i) = tc)) and
((i > v2'length) or (v2(i) = tc));
end;
----------------------------------------------------------------------------
-- Function equaluseCase
--
-- This function returns true if case sensitive string comparison determines
-- that str1 and str2 are the same.
-----------------------------------------------------------------------------
FUNCTION equaluseCase( str1, str2 : STRING ) RETURN BOOLEAN IS
CONSTANT len1 : INTEGER := str1'length;
CONSTANT len2 : INTEGER := str2'length;
VARIABLE equal : BOOLEAN := TRUE;
BEGIN
IF NOT (len1=len2) THEN
equal := FALSE;
ELSE
FOR i IN str1'range LOOP
IF NOT (str1(i) = str2(i)) THEN
equal := FALSE;
END IF;
END LOOP;
END IF;
RETURN equal;
END equaluseCase;
-----------------------------------------------------------------------------
-- Function calc_num_ce
--
-- This function is used to process the array specifying the number of Chip
-- Enables required for a Base Address specification. The array is input to
-- the function and an integer is returned reflecting the total number of
-- Chip Enables required for the CE, RdCE, and WrCE Buses
-----------------------------------------------------------------------------
function calc_num_ce (ce_num_array : INTEGER_ARRAY_TYPE) return integer is
Variable ce_num_sum : integer := 0;
begin
for i in 0 to (ce_num_array'length)-1 loop
ce_num_sum := ce_num_sum + ce_num_array(i);
End loop;
return(ce_num_sum);
end function calc_num_ce;
-----------------------------------------------------------------------------
-- Function calc_start_ce_index
--
-- This function is used to process the array specifying the number of Chip
-- Enables required for a Base Address specification. The CE Size array is
-- input to the function and an integer index representing the index of the
-- target module in the ce_num_array. An integer is returned reflecting the
-- starting index of the assigned Chip Enables within the CE, RdCE, and
-- WrCE Buses.
-----------------------------------------------------------------------------
function calc_start_ce_index (ce_num_array : INTEGER_ARRAY_TYPE;
index : integer) return integer is
Variable ce_num_sum : integer := 0;
begin
If (index = 0) Then
ce_num_sum := 0;
else
for i in 0 to index-1 loop
ce_num_sum := ce_num_sum + ce_num_array(i);
End loop;
End if;
return(ce_num_sum);
end function calc_start_ce_index;
-----------------------------------------------------------------------------
-- Function get_min_dwidth
--
-- This function is used to process the array specifying the data bus width
-- for each of the target modules. The dwidth_array is input to the function
-- and an integer is returned that is the smallest value found of all the
-- entries in the array.
-----------------------------------------------------------------------------
function get_min_dwidth (dwidth_array: INTEGER_ARRAY_TYPE) return integer is
Variable temp_min : Integer := 1024;
begin
for i in 0 to dwidth_array'length-1 loop
If (dwidth_array(i) < temp_min) Then
temp_min := dwidth_array(i);
else
null;
End if;
End loop;
return(temp_min);
end function get_min_dwidth;
-----------------------------------------------------------------------------
-- Function get_max_dwidth
--
-- This function is used to process the array specifying the data bus width
-- for each of the target modules. The dwidth_array is input to the function
-- and an integer is returned that is the largest value found of all the
-- entries in the array.
-----------------------------------------------------------------------------
function get_max_dwidth (dwidth_array: INTEGER_ARRAY_TYPE) return integer is
Variable temp_max : Integer := 0;
begin
for i in 0 to dwidth_array'length-1 loop
If (dwidth_array(i) > temp_max) Then
temp_max := dwidth_array(i);
else
null;
End if;
End loop;
return(temp_max);
end function get_max_dwidth;
-----------------------------------------------------------------------------
-- Function S32
--
-- This function is used to expand an input string to 32 characters by
-- padding with spaces. If the input string is larger than 32 characters,
-- it will truncate to 32 characters.
-----------------------------------------------------------------------------
function S32 (in_string : string) return string is
constant OUTPUT_STRING_LENGTH : integer := 32;
Constant space : character := ' ';
variable new_string : string(1 to 32);
Variable start_index : Integer := in_string'length+1;
begin
If (in_string'length < OUTPUT_STRING_LENGTH) Then
for i in 1 to in_string'length loop
new_string(i) := in_string(i);
End loop;
for j in start_index to OUTPUT_STRING_LENGTH loop
new_string(j) := space;
End loop;
else -- use first 32 chars of in_string (truncate the rest)
for k in 1 to OUTPUT_STRING_LENGTH loop
new_string(k) := in_string(k);
End loop;
End if;
return(new_string);
end function S32;
-----------------------------------------------------------------------------
-- Function get_id_index
--
-- This function is used to process the array specifying the target function
-- assigned to a Base Address pair address range. The id_array and a
-- id number is input to the function. A integer is returned reflecting the
-- array index of the id matching the id input number. This function
-- should only be called if the id number is known to exist in the
-- name_array input. This can be detirmined by using the find_ard_id
-- function.
-----------------------------------------------------------------------------
function get_id_index (id_array :INTEGER_ARRAY_TYPE;
id : integer) return integer is
Variable match : Boolean := false;
Variable match_index : Integer := 10000; -- a really big number!
begin
for array_index in 0 to id_array'length-1 loop
If (match = true) Then -- match already found so do nothing
null;
else -- compare the numbers one by one
match := (id_array(array_index) = id);
If (match) Then
match_index := array_index;
else
null;
End if;
End if;
End loop;
return(match_index);
end function get_id_index;
--------------------------------------------------------------------------------
-- get_id_index but return a value in bounds on error (iboe).
--
-- This function is the same as get_id_index, except that when id does
-- not exist in id_array, the value returned is any index that is
-- within the index range of id_array.
--
-- This function would normally only be used where function find_ard_id
-- is used to establish the existence of id but, even when non-existent,
-- an element of one of the ARD arrays will be computed from the
-- returned get_id_index_iboe value. See, e.g., function bits_needed_for_vac
-- and the example call, below
--
-- bits_needed_for_vac(
-- find_ard_id(C_ARD_ID_ARRAY, IPIF_RDFIFO_DATA),
-- C_ARD_DEPENDENT_PROPS_ARRAY(get_id_index_iboe(C_ARD_ID_ARRAY,
-- IPIF_RDFIFO_DATA))
-- )
--------------------------------------------------------------------------------
function get_id_index_iboe (id_array :INTEGER_ARRAY_TYPE;
id : integer) return integer is
Variable match : Boolean := false;
Variable match_index : Integer := id_array'left; -- any valid array index
begin
for array_index in 0 to id_array'length-1 loop
If (match = true) Then -- match already found so do nothing
null;
else -- compare the numbers one by one
match := (id_array(array_index) = id);
If (match) Then match_index := array_index;
else null;
End if;
End if;
End loop;
return(match_index);
end function get_id_index_iboe;
-----------------------------------------------------------------------------
-- Function find_ard_id
--
-- This function is used to process the array specifying the target function
-- assigned to a Base Address pair address range. The id_array and a
-- integer id is input to the function. A boolean is returned reflecting the
-- presence (or not) of a number in the array matching the id input number.
-----------------------------------------------------------------------------
function find_ard_id (id_array : INTEGER_ARRAY_TYPE;
id : integer) return boolean is
Variable match : Boolean := false;
begin
for array_index in 0 to id_array'length-1 loop
If (match = true) Then -- match already found so do nothing
null;
else -- compare the numbers one by one
match := (id_array(array_index) = id);
End if;
End loop;
return(match);
end function find_ard_id;
-----------------------------------------------------------------------------
-- Function find_id_dwidth
--
-- This function is used to find the data width of a target module. If the
-- target module exists, the data width is extracted from the input dwidth
-- array. If the module is not in the ID array, the default input is
-- returned. This function is needed to assign data port size constraints on
-- unconstrained port widths.
-----------------------------------------------------------------------------
function find_id_dwidth (id_array : INTEGER_ARRAY_TYPE;
dwidth_array: INTEGER_ARRAY_TYPE;
id : integer;
default : integer) return integer is
Variable id_present : Boolean := false;
Variable array_index : Integer := 0;
Variable dwidth : Integer := default;
begin
id_present := find_ard_id(id_array, id);
If (id_present) Then
array_index := get_id_index (id_array, id);
dwidth := dwidth_array(array_index);
else
null; -- use default input
End if;
Return (dwidth);
end function find_id_dwidth;
-----------------------------------------------------------------------------
-- Function cnt_ipif_id_blks
--
-- This function is used to detirmine the number of IPIF components specified
-- in the ARD ID Array. An integer is returned representing the number
-- of elements counted. User IDs are ignored in the counting process.
-----------------------------------------------------------------------------
function cnt_ipif_id_blks (id_array : INTEGER_ARRAY_TYPE)
return integer is
Variable blk_count : integer := 0;
Variable temp_id : integer;
begin
for array_index in 0 to id_array'length-1 loop
temp_id := id_array(array_index);
If (temp_id = IPIF_WRFIFO_DATA or
temp_id = IPIF_RDFIFO_DATA or
temp_id = IPIF_RST or
temp_id = IPIF_INTR or
temp_id = IPIF_DMA_SG or
temp_id = IPIF_SESR_SEAR
) Then -- IPIF block found
blk_count := blk_count+1;
else -- go to next loop iteration
null;
End if;
End loop;
return(blk_count);
end function cnt_ipif_id_blks;
-----------------------------------------------------------------------------
-- Function get_ipif_id_dbus_index
--
-- This function is used to detirmine the IPIF relative index of a given
-- ID value. User IDs are ignored in the index detirmination.
-----------------------------------------------------------------------------
function get_ipif_id_dbus_index (id_array : INTEGER_ARRAY_TYPE;
id : integer)
return integer is
Variable blk_index : integer := 0;
Variable temp_id : integer;
Variable id_found : Boolean := false;
begin
for array_index in 0 to id_array'length-1 loop
temp_id := id_array(array_index);
If (id_found) then
null;
elsif (temp_id = id) then
id_found := true;
elsif (temp_id = IPIF_WRFIFO_DATA or
temp_id = IPIF_RDFIFO_DATA or
temp_id = IPIF_RST or
temp_id = IPIF_INTR or
temp_id = IPIF_DMA_SG or
temp_id = IPIF_SESR_SEAR
) Then -- IPIF block found
blk_index := blk_index+1;
else -- user block so do nothing
null;
End if;
End loop;
return(blk_index);
end function get_ipif_id_dbus_index;
------------------------------------------------------------------------------
-- Function: rebuild_slv32_array
--
-- Description:
-- This function takes an input slv32 array and rebuilds an output slv32
-- array composed of the first "num_valid_entry" elements from the input
-- array.
------------------------------------------------------------------------------
function rebuild_slv32_array (slv32_array : SLV32_ARRAY_TYPE;
num_valid_pairs : integer)
return SLV32_ARRAY_TYPE is
--Constants
constant num_elements : Integer := num_valid_pairs * 2;
-- Variables
variable temp_baseaddr32_array : SLV32_ARRAY_TYPE( 0 to num_elements-1);
begin
for array_index in 0 to num_elements-1 loop
temp_baseaddr32_array(array_index) := slv32_array(array_index);
end loop;
return(temp_baseaddr32_array);
end function rebuild_slv32_array;
------------------------------------------------------------------------------
-- Function: rebuild_slv64_array
--
-- Description:
-- This function takes an input slv64 array and rebuilds an output slv64
-- array composed of the first "num_valid_entry" elements from the input
-- array.
------------------------------------------------------------------------------
function rebuild_slv64_array (slv64_array : SLV64_ARRAY_TYPE;
num_valid_pairs : integer)
return SLV64_ARRAY_TYPE is
--Constants
constant num_elements : Integer := num_valid_pairs * 2;
-- Variables
variable temp_baseaddr64_array : SLV64_ARRAY_TYPE( 0 to num_elements-1);
begin
for array_index in 0 to num_elements-1 loop
temp_baseaddr64_array(array_index) := slv64_array(array_index);
end loop;
return(temp_baseaddr64_array);
end function rebuild_slv64_array;
------------------------------------------------------------------------------
-- Function: rebuild_int_array
--
-- Description:
-- This function takes an input integer array and rebuilds an output integer
-- array composed of the first "num_valid_entry" elements from the input
-- array.
------------------------------------------------------------------------------
function rebuild_int_array (int_array : INTEGER_ARRAY_TYPE;
num_valid_entry : integer)
return INTEGER_ARRAY_TYPE is
-- Variables
variable temp_int_array : INTEGER_ARRAY_TYPE( 0 to num_valid_entry-1);
begin
for array_index in 0 to num_valid_entry-1 loop
temp_int_array(array_index) := int_array(array_index);
end loop;
return(temp_int_array);
end function rebuild_int_array;
function bits_needed_for_vac(
fifo_present: boolean;
dependent_props : DEPENDENT_PROPS_TYPE
) return integer is
begin
if not fifo_present then
return 1; -- Zero would be better but leads to "0 to -1" null
-- ranges that are not handled by XST Flint or earlier
-- because of the negative index.
else
return
log2(1 + dependent_props(FIFO_CAPACITY_BITS) /
dependent_props(RD_WIDTH_BITS)
);
end if;
end function bits_needed_for_vac;
function bits_needed_for_occ(
fifo_present: boolean;
dependent_props : DEPENDENT_PROPS_TYPE
) return integer is
begin
if not fifo_present then
return 1; -- Zero would be better but leads to "0 to -1" null
-- ranges that are not handled by XST Flint or earlier
-- because of the negative index.
else
return
log2(1 + dependent_props(FIFO_CAPACITY_BITS) /
dependent_props(WR_WIDTH_BITS)
);
end if;
end function bits_needed_for_occ;
function eff_dp(id : integer;
dep_prop : integer;
value : integer) return integer is
variable dp : integer := dep_prop;
type bo2na_type is array (boolean) of natural;
constant bo2na : bo2na_type := (0, 1);
begin
if value /= 0 then return value; end if; -- Not default
case id is
when IPIF_CHDMA_CHANNELS =>
-------------------
return( bo2na(dp = CLK_PERIOD_PS ) * 10000
+ bo2na(dp = PACKET_WAIT_UNIT_NS ) * 1000000
+ bo2na(dp = BURST_SIZE ) * 16
);
when others => return 0;
end case;
end eff_dp;
function populate_intr_mode_array (num_user_intr : integer;
intr_capture_mode : integer)
return INTEGER_ARRAY_TYPE is
variable intr_mode_array : INTEGER_ARRAY_TYPE(0 to num_user_intr-1);
begin
for i in 0 to num_user_intr-1 loop
intr_mode_array(i) := intr_capture_mode;
end loop;
return intr_mode_array;
end function populate_intr_mode_array;
function add_intr_ard_id_array(include_intr : boolean;
ard_id_array : INTEGER_ARRAY_TYPE)
return INTEGER_ARRAY_TYPE is
variable intr_ard_id_array : INTEGER_ARRAY_TYPE(0 to ard_id_array'length);
begin
intr_ard_id_array(0 to ard_id_array'length-1) := ard_id_array;
if include_intr then
intr_ard_id_array(ard_id_array'length) := IPIF_INTR;
return intr_ard_id_array;
else
return ard_id_array;
end if;
end function add_intr_ard_id_array;
function add_intr_ard_addr_range_array(include_intr : boolean;
ZERO_ADDR_PAD : std_logic_vector;
intr_baseaddr : std_logic_vector;
intr_highaddr : std_logic_vector;
ard_id_array : INTEGER_ARRAY_TYPE;
ard_addr_range_array : SLV64_ARRAY_TYPE)
return SLV64_ARRAY_TYPE is
variable intr_ard_addr_range_array : SLV64_ARRAY_TYPE(0 to ard_addr_range_array'length+1);
begin
intr_ard_addr_range_array(0 to ard_addr_range_array'length-1) := ard_addr_range_array;
if include_intr then
intr_ard_addr_range_array(2*get_id_index(ard_id_array,IPIF_INTR))
:= ZERO_ADDR_PAD & intr_baseaddr;
intr_ard_addr_range_array(2*get_id_index(ard_id_array,IPIF_INTR)+1)
:= ZERO_ADDR_PAD & intr_highaddr;
return intr_ard_addr_range_array;
else
return ard_addr_range_array;
end if;
end function add_intr_ard_addr_range_array;
function add_intr_ard_dwidth_array(include_intr : boolean;
intr_dwidth : integer;
ard_id_array : INTEGER_ARRAY_TYPE;
ard_dwidth_array : INTEGER_ARRAY_TYPE)
return INTEGER_ARRAY_TYPE is
variable intr_ard_dwidth_array : INTEGER_ARRAY_TYPE(0 to ard_dwidth_array'length);
begin
intr_ard_dwidth_array(0 to ard_dwidth_array'length-1) := ard_dwidth_array;
if include_intr then
intr_ard_dwidth_array(get_id_index(ard_id_array, IPIF_INTR)) := intr_dwidth;
return intr_ard_dwidth_array;
else
return ard_dwidth_array;
end if;
end function add_intr_ard_dwidth_array;
function add_intr_ard_num_ce_array(include_intr : boolean;
ard_id_array : INTEGER_ARRAY_TYPE;
ard_num_ce_array : INTEGER_ARRAY_TYPE)
return INTEGER_ARRAY_TYPE is
variable intr_ard_num_ce_array : INTEGER_ARRAY_TYPE(0 to ard_num_ce_array'length);
begin
intr_ard_num_ce_array(0 to ard_num_ce_array'length-1) := ard_num_ce_array;
if include_intr then
intr_ard_num_ce_array(get_id_index(ard_id_array, IPIF_INTR)) := 16;
return intr_ard_num_ce_array;
else
return ard_num_ce_array;
end if;
end function add_intr_ard_num_ce_array;
end package body ipif_pkg;
|
-- IPIF Common Library Package
-------------------------------------------------------------------------------
--
-- *************************************************************************
-- ** **
-- ** DISCLAIMER OF LIABILITY **
-- ** **
-- ** This text/file contains proprietary, confidential **
-- ** information of Xilinx, Inc., is distributed under **
-- ** license from Xilinx, Inc., and may be used, copied **
-- ** and/or disclosed only pursuant to the terms of a valid **
-- ** license agreement with Xilinx, Inc. Xilinx hereby **
-- ** grants you a license to use this text/file solely for **
-- ** design, simulation, implementation and creation of **
-- ** design files limited to Xilinx devices or technologies. **
-- ** Use with non-Xilinx devices or technologies is expressly **
-- ** prohibited and immediately terminates your license unless **
-- ** covered by a separate agreement. **
-- ** **
-- ** Xilinx is providing this design, code, or information **
-- ** "as-is" solely for use in developing programs and **
-- ** solutions for Xilinx devices, with no obligation on the **
-- ** part of Xilinx to provide support. By providing this design, **
-- ** code, or information as one possible implementation of **
-- ** this feature, application or standard, Xilinx is making no **
-- ** representation that this implementation is free from any **
-- ** claims of infringement. You are responsible for obtaining **
-- ** any rights you may require for your implementation. **
-- ** Xilinx expressly disclaims any warranty whatsoever with **
-- ** respect to the adequacy of the implementation, including **
-- ** but not limited to any warranties or representations that this **
-- ** implementation is free from claims of infringement, implied **
-- ** warranties of merchantability or fitness for a particular **
-- ** purpose. **
-- ** **
-- ** Xilinx products are not intended for use in life support **
-- ** appliances, devices, or systems. Use in such applications is **
-- ** expressly prohibited. **
-- ** **
-- ** Any modifications that are made to the Source Code are **
-- ** done at the users sole risk and will be unsupported. **
-- ** The Xilinx Support Hotline does not have access to source **
-- ** code and therefore cannot answer specific questions related **
-- ** to source HDL. The Xilinx Hotline support of original source **
-- ** code IP shall only address issues and questions related **
-- ** to the standard Netlist version of the core (and thus **
-- ** indirectly, the original core source). **
-- ** **
-- ** Copyright (c) 2002-2010 Xilinx, Inc. All rights reserved. **
-- ** **
-- ** This copyright and support notice must be retained as part **
-- ** of this text at all times. **
-- ** **
-- *************************************************************************
--
-------------------------------------------------------------------------------
-- Filename: ipif_pkg.vhd
-- Version: Intital
-- Description: This file contains the constants and functions used in the
-- ipif common library components.
--
-------------------------------------------------------------------------------
-- Structure:
--
-------------------------------------------------------------------------------
-- Author: DET
-- History:
-- DET 02/21/02 -- Created from proc_common_pkg.vhd
--
-- DET 03/13/02 -- PLB IPIF development updates
-- ^^^^^^
-- - Commented out string types and string functions due to an XST
-- problem with string arrays and functions. THe string array
-- processing functions were replaced with comperable functions
-- operating on integer arrays.
-- ~~~~~~
--
--
-- DET 4/30/2002 Initial
-- ~~~~~~
-- - Added three functions: rebuild_slv32_array, rebuild_slv64_array, and
-- rebuild_int_array to support removal of unused elements from the
-- ARD arrays.
-- ^^^^^^ --
--
-- FLO 8/12/2002
-- ~~~~~~
-- - Added three functions: bits_needed_for_vac, bits_needed_for_occ,
-- and get_id_index_iboe.
-- (Removed provisional functions bits_needed_for_vacancy,
-- bits needed_for_occupancy, and bits_needed_for.)
-- ^^^^^^
--
-- FLO 3/24/2003
-- ~~~~~~
-- - Added dependent property paramters for channelized DMA.
-- - Added common property parameter array type.
-- - Definded the KEYHOLD_BURST common-property parameter.
-- ^^^^^^
--
-- FLO 10/22/2003
-- ~~~~~~
-- - Some adjustment to CHDMA parameterization.
-- - Cleanup of obsolete code and comments. (The former "XST workaround"
-- has become the officially deployed method.)
-- ^^^^^^
--
-- LSS 03/24/2004
-- ~~~~~~
-- - Added 5 functions
-- ^^^^^^
--
-- ALS 09/03/04
-- ^^^^^^
-- -- Added constants to describe the channel protocols used in MCH_OPB_IPIF
-- ~~~~~~
--
-- DET 1/17/2008 v4_0
-- ~~~~~~
-- - Changed proc_common library version to v4_0
-- - Incorporated new disclaimer header
-- ^^^^^^
--
-------------------------------------------------------------------------------
-- Naming Conventions:
-- active low signals: "*_n"
-- clock signals: "clk", "clk_div#", "clk_#x"
-- reset signals: "rst", "rst_n"
-- generics: "C_*"
-- user defined types: "*_TYPE"
-- state machine next state: "*_ns"
-- state machine current state: "*_cs"
-- combinatorial signals: "*_com"
-- pipelined or register delay signals: "*_d#"
-- counter signals: "*cnt*"
-- clock enable signals: "*_ce"
-- internal version of output port "*_i"
-- device pins: "*_pin"
-- ports: - Names begin with Uppercase
-- processes: "*_PROCESS"
-- component instantiations: "<ENTITY_>I_<#|FUNC>
-------------------------------------------------------------------------------
library ieee;
use ieee.std_logic_1164.all;
-- need conversion function to convert reals/integers to std logic vectors
use ieee.std_logic_arith.all;
use ieee.std_logic_arith.all;
use ieee.std_logic_unsigned.all;
package ipif_pkg is
-------------------------------------------------------------------------------
-- Type Declarations
-------------------------------------------------------------------------------
type SLV32_ARRAY_TYPE is array (natural range <>) of std_logic_vector(0 to 31);
subtype SLV64_TYPE is std_logic_vector(0 to 63);
type SLV64_ARRAY_TYPE is array (natural range <>) of SLV64_TYPE;
type INTEGER_ARRAY_TYPE is array (natural range <>) of integer;
-------------------------------------------------------------------------------
-- Function and Procedure Declarations
-------------------------------------------------------------------------------
function "=" (s1: in string; s2: in string) return boolean;
function equaluseCase( str1, str2 : STRING ) RETURN BOOLEAN;
function calc_num_ce (ce_num_array : INTEGER_ARRAY_TYPE) return integer;
function calc_start_ce_index (ce_num_array : INTEGER_ARRAY_TYPE;
index : integer) return integer;
function get_min_dwidth (dwidth_array: INTEGER_ARRAY_TYPE) return integer;
function get_max_dwidth (dwidth_array: INTEGER_ARRAY_TYPE) return integer;
function S32 (in_string : string) return string;
--------------------------------------------------------------------------------
-- ARD support functions.
-- These function can be useful when operating with the ARD parameterization.
--------------------------------------------------------------------------------
function get_id_index (id_array :INTEGER_ARRAY_TYPE;
id : integer)
return integer;
function get_id_index_iboe (id_array :INTEGER_ARRAY_TYPE;
id : integer)
return integer;
function find_ard_id (id_array : INTEGER_ARRAY_TYPE;
id : integer) return boolean;
function find_id_dwidth (id_array : INTEGER_ARRAY_TYPE;
dwidth_array: INTEGER_ARRAY_TYPE;
id : integer;
default : integer)
return integer;
function cnt_ipif_id_blks (id_array : INTEGER_ARRAY_TYPE) return integer;
function get_ipif_id_dbus_index (id_array : INTEGER_ARRAY_TYPE;
id : integer)
return integer ;
function rebuild_slv32_array (slv32_array : SLV32_ARRAY_TYPE;
num_valid_pairs : integer)
return SLV32_ARRAY_TYPE;
function rebuild_slv64_array (slv64_array : SLV64_ARRAY_TYPE;
num_valid_pairs : integer)
return SLV64_ARRAY_TYPE;
function rebuild_int_array (int_array : INTEGER_ARRAY_TYPE;
num_valid_entry : integer)
return INTEGER_ARRAY_TYPE;
-- 5 Functions Added 3/24/04
function populate_intr_mode_array (num_user_intr : integer;
intr_capture_mode : integer)
return INTEGER_ARRAY_TYPE ;
function add_intr_ard_id_array(include_intr : boolean;
ard_id_array : INTEGER_ARRAY_TYPE)
return INTEGER_ARRAY_TYPE;
function add_intr_ard_addr_range_array(include_intr : boolean;
ZERO_ADDR_PAD : std_logic_vector;
intr_baseaddr : std_logic_vector;
intr_highaddr : std_logic_vector;
ard_id_array : INTEGER_ARRAY_TYPE;
ard_addr_range_array : SLV64_ARRAY_TYPE)
return SLV64_ARRAY_TYPE;
function add_intr_ard_num_ce_array(include_intr : boolean;
ard_id_array : INTEGER_ARRAY_TYPE;
ard_num_ce_array : INTEGER_ARRAY_TYPE)
return INTEGER_ARRAY_TYPE;
function add_intr_ard_dwidth_array(include_intr : boolean;
intr_dwidth : integer;
ard_id_array : INTEGER_ARRAY_TYPE;
ard_dwidth_array : INTEGER_ARRAY_TYPE)
return INTEGER_ARRAY_TYPE;
function log2(x : natural) return integer;
function clog2(x : positive) return natural;
-------------------------------------------------------------------------------
-- Constant Declarations
-------------------------------------------------------------------------------
-------------------------------------------------------------------------------
-- Channel Protocols
-- The constant declarations below give symbolic-name aliases for values that
-- can be used in the C_MCH_PROTOCOL_ARRAY generic of the MCH_OPB_IPIF.
-------------------------------------------------------------------------------
constant XCL : integer := 0;
constant DAG : integer := 1;
--------------------------------------------------------------------------------
-- Address range types.
-- The constant declarations, below, give symbolic-name aliases for values
-- that can be used in the C_ARD_ID_ARRAY generic of IPIFs. The first set
-- gives aliases that are used to include IPIF services.
--------------------------------------------------------------------------------
-- IPIF module aliases
Constant IPIF_INTR : integer := 1;
Constant IPIF_RST : integer := 2;
Constant IPIF_SESR_SEAR : integer := 3;
Constant IPIF_DMA_SG : integer := 4;
Constant IPIF_WRFIFO_REG : integer := 5;
Constant IPIF_WRFIFO_DATA : integer := 6;
Constant IPIF_RDFIFO_REG : integer := 7;
Constant IPIF_RDFIFO_DATA : integer := 8;
Constant IPIF_CHDMA_CHANNELS : integer := 9;
Constant IPIF_CHDMA_GLOBAL_REGS : integer := 10;
Constant CHDMA_STATUS_FIFO : integer := 90;
-- Some predefined user module aliases
Constant USER_00 : integer := 100;
Constant USER_01 : integer := 101;
Constant USER_02 : integer := 102;
Constant USER_03 : integer := 103;
Constant USER_04 : integer := 104;
Constant USER_05 : integer := 105;
Constant USER_06 : integer := 106;
Constant USER_07 : integer := 107;
Constant USER_08 : integer := 108;
Constant USER_09 : integer := 109;
Constant USER_10 : integer := 110;
Constant USER_11 : integer := 111;
Constant USER_12 : integer := 112;
Constant USER_13 : integer := 113;
Constant USER_14 : integer := 114;
Constant USER_15 : integer := 115;
Constant USER_16 : integer := 116;
---( Start of Dependent Properties declarations
--------------------------------------------------------------------------------
-- Declarations for Dependent Properties (properties that depend on the type of
-- the address range, or in other words, address-range-specific parameters).
-- There is one property, i.e. one parameter, encoded as an integer at
-- each index of the properties array. There is one properties array for
-- each address range.
--
-- The C_ARD_DEPENDENT_PROPS_ARRAY generic parameter in (most) IPIFs is such
-- a properties array and it is usually giving its (static) value using a
-- VHDL aggregate construct. (--ToDo, give an example of this.)
--
-- The the "assigned" default value of a dependent property is zero. This value
-- is usually specified the aggregate by leaving its (index) name out so that
-- it is covered by an "others => 0" choice in the aggregate. Some parameters,
-- as noted in the definitions, below, have an "effective" default value that is
-- different from the assigned default value of zero. In such cases, the
-- function, eff_dp, given below, can be used to get the effective value of
-- the dependent property.
--------------------------------------------------------------------------------
constant DEPENDENT_PROPS_SIZE : integer := 32;
subtype DEPENDENT_PROPS_TYPE
is INTEGER_ARRAY_TYPE(0 to DEPENDENT_PROPS_SIZE-1);
type DEPENDENT_PROPS_ARRAY_TYPE
is array (natural range <>) of DEPENDENT_PROPS_TYPE;
--------------------------------------------------------------------------------
-- Below are the indices of dependent properties for the different types of
-- address ranges.
--
-- Example: Let C_ARD_DEPENDENT_PROPS_ARRAY hold the dependent properites
-- for a set of address ranges. Then, e.g.,
--
-- C_ARD_DEPENDENT_PROPS_ARRAY(i)(FIFO_CAPACITY_BITS)
--
-- gives the fifo capacity in bits, provided that the i'th address range
-- is of type IPIF_WRFIFO_DATA or IPIF_RDFIFO_DATA.
--
-- These indices should be referenced only by the names below and never
-- by numerical literals. (The right to change numerical index assignments
-- is reserved; applications using the names will not be affected by such
-- reassignments.)
--------------------------------------------------------------------------------
--
--ToDo, if the interrupt controller parameterization is ever moved to
-- C_ARD_DEPENDENT_PROPS_ARRAY, then the following declarations
-- could be uncommented and used.
---- IPIF_INTR IDX
---------------------------------------------------------------------------- ---
constant EXCLUDE_DEV_ISC : integer := 0;
-- 1 specifies that only the global interrupt
-- enable is present in the device interrupt source
-- controller and that the only source of interrupts
-- in the device is the IP interrupt source controller.
-- 0 specifies that the full device interrupt
-- source controller structure will be included.
constant INCLUDE_DEV_PENCODER : integer := 1;
-- 1 will include the Device IID in the device interrupt
-- source controller, 0 will exclude it.
--
-- IPIF_WRFIFO_DATA or IPIF_RDFIFO_DATA IDX
---------------------------------------------------------------------------- ---
constant FIFO_CAPACITY_BITS : integer := 0;
constant WR_WIDTH_BITS : integer := 1;
constant RD_WIDTH_BITS : integer := 2;
constant EXCLUDE_PACKET_MODE : integer := 3;
-- 1 Don't include packet mode features
-- 0 Include packet mode features
constant EXCLUDE_VACANCY : integer := 4;
-- 1 Don't include vacancy calculation
-- 0 Include vacancy calculation
-- See also the functions
-- bits_needed_for_vac and
-- bits_needed_for_occ that are declared below.
constant INCLUDE_DRE : integer := 5;
constant INCLUDE_AUTOPUSH_POP : integer := 6;
constant AUTOPUSH_POP_CE : integer := 7;
constant INCLUDE_CSUM : integer := 8;
--------------------------------------------------------------------------------
--
-- DMA_SG IDX
---------------------------------------------------------------------------- ---
--------------------------------------------------------------------------------
-- IPIF_CHDMA_CHANNELS IDX
---------------------------------------------------------------------------- ---
constant NUM_SUBS_FOR_PHYS_0 : integer :=0;
constant NUM_SUBS_FOR_PHYS_1 : integer :=1;
constant NUM_SUBS_FOR_PHYS_2 : integer :=2;
constant NUM_SUBS_FOR_PHYS_3 : integer :=3;
constant NUM_SUBS_FOR_PHYS_4 : integer :=4;
constant NUM_SUBS_FOR_PHYS_5 : integer :=5;
constant NUM_SUBS_FOR_PHYS_6 : integer :=6;
constant NUM_SUBS_FOR_PHYS_7 : integer :=7;
constant NUM_SUBS_FOR_PHYS_8 : integer :=8;
constant NUM_SUBS_FOR_PHYS_9 : integer :=9;
constant NUM_SUBS_FOR_PHYS_10 : integer :=10;
constant NUM_SUBS_FOR_PHYS_11 : integer :=11;
constant NUM_SUBS_FOR_PHYS_12 : integer :=12;
constant NUM_SUBS_FOR_PHYS_13 : integer :=13;
constant NUM_SUBS_FOR_PHYS_14 : integer :=14;
constant NUM_SUBS_FOR_PHYS_15 : integer :=15;
-- Gives the number of sub-channels for physical channel i.
--
-- These constants, which will be MAX_NUM_PHYS_CHANNELS in number (see
-- below), have consecutive values starting with 0 for
-- NUM_SUBS_FOR_PHYS_0. (The constants serve the purpose of giving symbolic
-- names for use in the dependent-properties aggregates that parameterize
-- an IPIF_CHDMA_CHANNELS address range.)
--
-- [Users can ignore this note for developers
-- If the number of physical channels changes, both the
-- IPIF_CHDMA_CHANNELS constants and MAX_NUM_PHYS_CHANNELS,
-- below, must be adjusted.
-- (Use of an array constant or a function of the form
-- NUM_SUBS_FOR_PHYS(i) to define the indices
-- runs afoul of LRM restrictions on non-locally static aggregate
-- choices. (Further, the LRM imposes perhaps unnecessarily
-- strict limits on what qualifies as a locally static primary.)
-- Note: This information is supplied for the benefit of anyone seeking
-- to improve the way that these NUM_SUBS_FOR_PHYS parameter
-- indices are defined.)
-- End of note for developers ]
--
-- The value associated with any index NUM_SUBS_FOR_PHYS_i in the
-- dependent-properties array must be even since TX and RX channels
-- come in pairs with the TX followed immediately by
-- the corresponding RX.
--
constant NUM_SIMPLE_DMA_CHANS : integer :=16;
-- The number of simple DMA channels.
constant NUM_SIMPLE_SG_CHANS : integer :=17;
-- The number of simple SG channels.
constant INTR_COALESCE : integer :=18;
-- 0 Interrupt coalescing is disabled
-- 1 Interrupt coalescing is enabled
constant CLK_PERIOD_PS : integer :=19;
-- The period of the OPB Bus clock in ps.
-- The default value of 0 is a special value that
-- is synonymous with 10000 ps (10 ns).
-- The value for CLK_PERIOD_PS is relevant only if (INTR_COALESCE = 1).
constant PACKET_WAIT_UNIT_NS : integer :=20;
-- Gives the unit for used for timing of pack-wait bounds.
-- The default value of 0 is a special value that
-- is synonymous with 1,000,000 ns (1 ms) and a non-default
-- value is typically only used for testing.
-- Relevant only if (INTR_COALESCE = 1).
constant BURST_SIZE : integer :=21;
-- 1, 2, 4, 8 or 16
-- The default value of 0 is a special value that
-- is synonymous with a burst size of 16.
-- Setting the BURST_SIZE to 1 effectively disables
-- bursts.
constant REMAINDER_AS_SINGLES : integer :=22;
-- 0 Remainder handled as a short burst
-- 1 Remainder handled as a series of singles
--------------------------------------------------------------------------------
-- The constant below is not the index of a dependent-properties
-- parameter (and, as such, would never appear as a choice in a
-- dependent-properties aggregate). Rather, it is fixed to the maximum
-- number of physical channels that an Address Range of type
-- IPIF_CHDMA_CHANNELS supports. It must be maintained in conjuction with
-- the constants named, e.g., NUM_SUBS_FOR_PHYS_15, above.
--------------------------------------------------------------------------------
constant MAX_NUM_PHYS_CHANNELS : natural := 16;
--------------------------------------------------------------------------
-- EXAMPLE: Here is an example dependent-properties aggregate for an
-- address range of type IPIF_CHDMA_CHANNELS.
-- To have a compact list of all of the CHDMA parameters, all are
-- shown, however three are commented out and the unneeded
-- MUM_SUBS_FOR_PHYS_x are excluded. The "OTHERS => 0" association
-- gives these parameters their default values, such that, for the example
--
-- - All physical channels above 2 have zero subchannels (effectively,
-- these physical channels are not used)
-- - There are no simple SG channels
-- - The packet-wait time unit is 1 ms
-- - Burst size is 16
--------------------------------------------------------------------------
-- (
-- NUM_SUBS_FOR_PHYS_0 => 8,
-- NUM_SUBS_FOR_PHYS_1 => 4,
-- NUM_SUBS_FOR_PHYS_2 => 14,
-- NUM_SIMPLE_DMA_CHANS => 1,
-- --NUM_SIMPLE_SG_CHANS => 5,
-- INTR_COALESCE => 1,
-- CLK_PERIOD_PS => 20000,
-- --PACKET_WAIT_UNIT_NS => 50000,
-- --BURST_SIZE => 1,
-- REMAINDER_AS_SINGLES => 1,
-- OTHERS => 0
-- )
--
--------------------------------------------------------------------------------
--------------------------------------------------------------------------------
-- Calculates the number of bits needed to convey the vacancy (emptiness) of
-- the fifo described by dependent_props, if fifo_present. If not fifo_present,
-- returns 0 (or the smallest value allowed by tool limitations on null arrays)
-- without making reference to dependent_props.
--------------------------------------------------------------------------------
function bits_needed_for_vac(
fifo_present: boolean;
dependent_props : DEPENDENT_PROPS_TYPE
) return integer;
--------------------------------------------------------------------------------
-- Calculates the number of bits needed to convey the occupancy (fullness) of
-- the fifo described by dependent_props, if fifo_present. If not fifo_present,
-- returns 0 (or the smallest value allowed by tool limitations on null arrays)
-- without making reference to dependent_props.
--------------------------------------------------------------------------------
function bits_needed_for_occ(
fifo_present: boolean;
dependent_props : DEPENDENT_PROPS_TYPE
) return integer;
--------------------------------------------------------------------------------
-- Function eff_dp.
--
-- For some of the dependent properties, the default value of zero is meant
-- to imply an effective default value of other than zero (see e.g.
-- PKT_WAIT_UNIT_NS for the IPIF_CHDMA_CHANNELS address-range type). The
-- following function is used to get the (possibly default-adjusted)
-- value for a dependent property.
--
-- Example call:
--
-- eff_value_of_param :=
-- eff_dp(
-- C_IPIF_CHDMA_CHANNELS,
-- PACKET_WAIT_UNIT_NS,
-- C_ARD_DEPENDENT_PROPS_ARRAY(i)(PACKET_WAIT_UNIT_NS)
-- );
--
-- where C_ARD_DEPENDENT_PROPS_ARRAY(i) is an object of type
-- DEPENDENT_PROPS_ARRAY_TYPE, that was parameterized for an address range of
-- type C_IPIF_CHDMA_CHANNELS.
--------------------------------------------------------------------------------
function eff_dp(id : integer; -- The type of address range.
dep_prop : integer; -- The index of the dependent prop.
value : integer -- The value at that index.
) return integer; -- The effective value, possibly adjusted
-- if value has the default value of 0.
---) End of Dependent Properties declarations
--------------------------------------------------------------------------------
-- Declarations for Common Properties (properties that apply regardless of the
-- type of the address range). Structurally, these work the same as
-- the dependent properties.
--------------------------------------------------------------------------------
constant COMMON_PROPS_SIZE : integer := 2;
subtype COMMON_PROPS_TYPE
is INTEGER_ARRAY_TYPE(0 to COMMON_PROPS_SIZE-1);
type COMMON_PROPS_ARRAY_TYPE
is array (natural range <>) of COMMON_PROPS_TYPE;
--------------------------------------------------------------------------------
-- Below are the indices of the common properties.
--
-- These indices should be referenced only by the names below and never
-- by numerical literals.
-- IDX
---------------------------------------------------------------------------- ---
constant KEYHOLE_BURST : integer := 0;
-- 1 All addresses of a burst are forced to the initial
-- address of the burst.
-- 0 Burst addresses follow the bus protocol.
-- IP interrupt mode array constants
Constant INTR_PASS_THRU : integer := 1;
Constant INTR_PASS_THRU_INV : integer := 2;
Constant INTR_REG_EVENT : integer := 3;
Constant INTR_REG_EVENT_INV : integer := 4;
Constant INTR_POS_EDGE_DETECT : integer := 5;
Constant INTR_NEG_EDGE_DETECT : integer := 6;
end ipif_pkg;
package body ipif_pkg is
-------------------------------------------------------------------------------
-- Function log2 -- returns number of bits needed to encode x choices
-- x = 0 returns 0
-- x = 1 returns 0
-- x = 2 returns 1
-- x = 4 returns 2, etc.
-------------------------------------------------------------------------------
--
function log2(x : natural) return integer is
variable i : integer := 0;
variable val: integer := 1;
begin
if x = 0 then return 0;
else
for j in 0 to 29 loop -- for loop for XST
if val >= x then null;
else
i := i+1;
val := val*2;
end if;
end loop;
-- Fix per CR520627 XST was ignoring this anyway and printing a
-- Warning in SRP file. This will get rid of the warning and not
-- impact simulation.
-- synthesis translate_off
assert val >= x
report "Function log2 received argument larger" &
" than its capability of 2^30. "
severity failure;
-- synthesis translate_on
return i;
end if;
end function log2;
--------------------------------------------------------------------------------
-- Function clog2 - returns the integer ceiling of the base 2 logarithm of x,
-- i.e., the least integer greater than or equal to log2(x).
--------------------------------------------------------------------------------
function clog2(x : positive) return natural is
variable r : natural := 0;
variable rp : natural := 1; -- rp tracks the value 2**r
begin
while rp < x loop -- Termination condition T: x <= 2**r
-- Loop invariant L: 2**(r-1) < x
r := r + 1;
if rp > integer'high - rp then exit; end if; -- If doubling rp overflows
-- the integer range, the doubled value would exceed x, so safe to exit.
rp := rp + rp;
end loop;
-- L and T <-> 2**(r-1) < x <= 2**r <-> (r-1) < log2(x) <= r
return r; --
end clog2;
-------------------------------------------------------------------------------
-- Function Definitions
-------------------------------------------------------------------------------
-----------------------------------------------------------------------------
-- Function "="
--
-- This function can be used to overload the "=" operator when comparing
-- strings.
-----------------------------------------------------------------------------
function "=" (s1: in string; s2: in string) return boolean is
constant tc: character := ' '; -- string termination character
variable i: integer := 1;
variable v1 : string(1 to s1'length) := s1;
variable v2 : string(1 to s2'length) := s2;
begin
while (i <= v1'length) and (v1(i) /= tc) and
(i <= v2'length) and (v2(i) /= tc) and
(v1(i) = v2(i))
loop
i := i+1;
end loop;
return ((i > v1'length) or (v1(i) = tc)) and
((i > v2'length) or (v2(i) = tc));
end;
----------------------------------------------------------------------------
-- Function equaluseCase
--
-- This function returns true if case sensitive string comparison determines
-- that str1 and str2 are the same.
-----------------------------------------------------------------------------
FUNCTION equaluseCase( str1, str2 : STRING ) RETURN BOOLEAN IS
CONSTANT len1 : INTEGER := str1'length;
CONSTANT len2 : INTEGER := str2'length;
VARIABLE equal : BOOLEAN := TRUE;
BEGIN
IF NOT (len1=len2) THEN
equal := FALSE;
ELSE
FOR i IN str1'range LOOP
IF NOT (str1(i) = str2(i)) THEN
equal := FALSE;
END IF;
END LOOP;
END IF;
RETURN equal;
END equaluseCase;
-----------------------------------------------------------------------------
-- Function calc_num_ce
--
-- This function is used to process the array specifying the number of Chip
-- Enables required for a Base Address specification. The array is input to
-- the function and an integer is returned reflecting the total number of
-- Chip Enables required for the CE, RdCE, and WrCE Buses
-----------------------------------------------------------------------------
function calc_num_ce (ce_num_array : INTEGER_ARRAY_TYPE) return integer is
Variable ce_num_sum : integer := 0;
begin
for i in 0 to (ce_num_array'length)-1 loop
ce_num_sum := ce_num_sum + ce_num_array(i);
End loop;
return(ce_num_sum);
end function calc_num_ce;
-----------------------------------------------------------------------------
-- Function calc_start_ce_index
--
-- This function is used to process the array specifying the number of Chip
-- Enables required for a Base Address specification. The CE Size array is
-- input to the function and an integer index representing the index of the
-- target module in the ce_num_array. An integer is returned reflecting the
-- starting index of the assigned Chip Enables within the CE, RdCE, and
-- WrCE Buses.
-----------------------------------------------------------------------------
function calc_start_ce_index (ce_num_array : INTEGER_ARRAY_TYPE;
index : integer) return integer is
Variable ce_num_sum : integer := 0;
begin
If (index = 0) Then
ce_num_sum := 0;
else
for i in 0 to index-1 loop
ce_num_sum := ce_num_sum + ce_num_array(i);
End loop;
End if;
return(ce_num_sum);
end function calc_start_ce_index;
-----------------------------------------------------------------------------
-- Function get_min_dwidth
--
-- This function is used to process the array specifying the data bus width
-- for each of the target modules. The dwidth_array is input to the function
-- and an integer is returned that is the smallest value found of all the
-- entries in the array.
-----------------------------------------------------------------------------
function get_min_dwidth (dwidth_array: INTEGER_ARRAY_TYPE) return integer is
Variable temp_min : Integer := 1024;
begin
for i in 0 to dwidth_array'length-1 loop
If (dwidth_array(i) < temp_min) Then
temp_min := dwidth_array(i);
else
null;
End if;
End loop;
return(temp_min);
end function get_min_dwidth;
-----------------------------------------------------------------------------
-- Function get_max_dwidth
--
-- This function is used to process the array specifying the data bus width
-- for each of the target modules. The dwidth_array is input to the function
-- and an integer is returned that is the largest value found of all the
-- entries in the array.
-----------------------------------------------------------------------------
function get_max_dwidth (dwidth_array: INTEGER_ARRAY_TYPE) return integer is
Variable temp_max : Integer := 0;
begin
for i in 0 to dwidth_array'length-1 loop
If (dwidth_array(i) > temp_max) Then
temp_max := dwidth_array(i);
else
null;
End if;
End loop;
return(temp_max);
end function get_max_dwidth;
-----------------------------------------------------------------------------
-- Function S32
--
-- This function is used to expand an input string to 32 characters by
-- padding with spaces. If the input string is larger than 32 characters,
-- it will truncate to 32 characters.
-----------------------------------------------------------------------------
function S32 (in_string : string) return string is
constant OUTPUT_STRING_LENGTH : integer := 32;
Constant space : character := ' ';
variable new_string : string(1 to 32);
Variable start_index : Integer := in_string'length+1;
begin
If (in_string'length < OUTPUT_STRING_LENGTH) Then
for i in 1 to in_string'length loop
new_string(i) := in_string(i);
End loop;
for j in start_index to OUTPUT_STRING_LENGTH loop
new_string(j) := space;
End loop;
else -- use first 32 chars of in_string (truncate the rest)
for k in 1 to OUTPUT_STRING_LENGTH loop
new_string(k) := in_string(k);
End loop;
End if;
return(new_string);
end function S32;
-----------------------------------------------------------------------------
-- Function get_id_index
--
-- This function is used to process the array specifying the target function
-- assigned to a Base Address pair address range. The id_array and a
-- id number is input to the function. A integer is returned reflecting the
-- array index of the id matching the id input number. This function
-- should only be called if the id number is known to exist in the
-- name_array input. This can be detirmined by using the find_ard_id
-- function.
-----------------------------------------------------------------------------
function get_id_index (id_array :INTEGER_ARRAY_TYPE;
id : integer) return integer is
Variable match : Boolean := false;
Variable match_index : Integer := 10000; -- a really big number!
begin
for array_index in 0 to id_array'length-1 loop
If (match = true) Then -- match already found so do nothing
null;
else -- compare the numbers one by one
match := (id_array(array_index) = id);
If (match) Then
match_index := array_index;
else
null;
End if;
End if;
End loop;
return(match_index);
end function get_id_index;
--------------------------------------------------------------------------------
-- get_id_index but return a value in bounds on error (iboe).
--
-- This function is the same as get_id_index, except that when id does
-- not exist in id_array, the value returned is any index that is
-- within the index range of id_array.
--
-- This function would normally only be used where function find_ard_id
-- is used to establish the existence of id but, even when non-existent,
-- an element of one of the ARD arrays will be computed from the
-- returned get_id_index_iboe value. See, e.g., function bits_needed_for_vac
-- and the example call, below
--
-- bits_needed_for_vac(
-- find_ard_id(C_ARD_ID_ARRAY, IPIF_RDFIFO_DATA),
-- C_ARD_DEPENDENT_PROPS_ARRAY(get_id_index_iboe(C_ARD_ID_ARRAY,
-- IPIF_RDFIFO_DATA))
-- )
--------------------------------------------------------------------------------
function get_id_index_iboe (id_array :INTEGER_ARRAY_TYPE;
id : integer) return integer is
Variable match : Boolean := false;
Variable match_index : Integer := id_array'left; -- any valid array index
begin
for array_index in 0 to id_array'length-1 loop
If (match = true) Then -- match already found so do nothing
null;
else -- compare the numbers one by one
match := (id_array(array_index) = id);
If (match) Then match_index := array_index;
else null;
End if;
End if;
End loop;
return(match_index);
end function get_id_index_iboe;
-----------------------------------------------------------------------------
-- Function find_ard_id
--
-- This function is used to process the array specifying the target function
-- assigned to a Base Address pair address range. The id_array and a
-- integer id is input to the function. A boolean is returned reflecting the
-- presence (or not) of a number in the array matching the id input number.
-----------------------------------------------------------------------------
function find_ard_id (id_array : INTEGER_ARRAY_TYPE;
id : integer) return boolean is
Variable match : Boolean := false;
begin
for array_index in 0 to id_array'length-1 loop
If (match = true) Then -- match already found so do nothing
null;
else -- compare the numbers one by one
match := (id_array(array_index) = id);
End if;
End loop;
return(match);
end function find_ard_id;
-----------------------------------------------------------------------------
-- Function find_id_dwidth
--
-- This function is used to find the data width of a target module. If the
-- target module exists, the data width is extracted from the input dwidth
-- array. If the module is not in the ID array, the default input is
-- returned. This function is needed to assign data port size constraints on
-- unconstrained port widths.
-----------------------------------------------------------------------------
function find_id_dwidth (id_array : INTEGER_ARRAY_TYPE;
dwidth_array: INTEGER_ARRAY_TYPE;
id : integer;
default : integer) return integer is
Variable id_present : Boolean := false;
Variable array_index : Integer := 0;
Variable dwidth : Integer := default;
begin
id_present := find_ard_id(id_array, id);
If (id_present) Then
array_index := get_id_index (id_array, id);
dwidth := dwidth_array(array_index);
else
null; -- use default input
End if;
Return (dwidth);
end function find_id_dwidth;
-----------------------------------------------------------------------------
-- Function cnt_ipif_id_blks
--
-- This function is used to detirmine the number of IPIF components specified
-- in the ARD ID Array. An integer is returned representing the number
-- of elements counted. User IDs are ignored in the counting process.
-----------------------------------------------------------------------------
function cnt_ipif_id_blks (id_array : INTEGER_ARRAY_TYPE)
return integer is
Variable blk_count : integer := 0;
Variable temp_id : integer;
begin
for array_index in 0 to id_array'length-1 loop
temp_id := id_array(array_index);
If (temp_id = IPIF_WRFIFO_DATA or
temp_id = IPIF_RDFIFO_DATA or
temp_id = IPIF_RST or
temp_id = IPIF_INTR or
temp_id = IPIF_DMA_SG or
temp_id = IPIF_SESR_SEAR
) Then -- IPIF block found
blk_count := blk_count+1;
else -- go to next loop iteration
null;
End if;
End loop;
return(blk_count);
end function cnt_ipif_id_blks;
-----------------------------------------------------------------------------
-- Function get_ipif_id_dbus_index
--
-- This function is used to detirmine the IPIF relative index of a given
-- ID value. User IDs are ignored in the index detirmination.
-----------------------------------------------------------------------------
function get_ipif_id_dbus_index (id_array : INTEGER_ARRAY_TYPE;
id : integer)
return integer is
Variable blk_index : integer := 0;
Variable temp_id : integer;
Variable id_found : Boolean := false;
begin
for array_index in 0 to id_array'length-1 loop
temp_id := id_array(array_index);
If (id_found) then
null;
elsif (temp_id = id) then
id_found := true;
elsif (temp_id = IPIF_WRFIFO_DATA or
temp_id = IPIF_RDFIFO_DATA or
temp_id = IPIF_RST or
temp_id = IPIF_INTR or
temp_id = IPIF_DMA_SG or
temp_id = IPIF_SESR_SEAR
) Then -- IPIF block found
blk_index := blk_index+1;
else -- user block so do nothing
null;
End if;
End loop;
return(blk_index);
end function get_ipif_id_dbus_index;
------------------------------------------------------------------------------
-- Function: rebuild_slv32_array
--
-- Description:
-- This function takes an input slv32 array and rebuilds an output slv32
-- array composed of the first "num_valid_entry" elements from the input
-- array.
------------------------------------------------------------------------------
function rebuild_slv32_array (slv32_array : SLV32_ARRAY_TYPE;
num_valid_pairs : integer)
return SLV32_ARRAY_TYPE is
--Constants
constant num_elements : Integer := num_valid_pairs * 2;
-- Variables
variable temp_baseaddr32_array : SLV32_ARRAY_TYPE( 0 to num_elements-1);
begin
for array_index in 0 to num_elements-1 loop
temp_baseaddr32_array(array_index) := slv32_array(array_index);
end loop;
return(temp_baseaddr32_array);
end function rebuild_slv32_array;
------------------------------------------------------------------------------
-- Function: rebuild_slv64_array
--
-- Description:
-- This function takes an input slv64 array and rebuilds an output slv64
-- array composed of the first "num_valid_entry" elements from the input
-- array.
------------------------------------------------------------------------------
function rebuild_slv64_array (slv64_array : SLV64_ARRAY_TYPE;
num_valid_pairs : integer)
return SLV64_ARRAY_TYPE is
--Constants
constant num_elements : Integer := num_valid_pairs * 2;
-- Variables
variable temp_baseaddr64_array : SLV64_ARRAY_TYPE( 0 to num_elements-1);
begin
for array_index in 0 to num_elements-1 loop
temp_baseaddr64_array(array_index) := slv64_array(array_index);
end loop;
return(temp_baseaddr64_array);
end function rebuild_slv64_array;
------------------------------------------------------------------------------
-- Function: rebuild_int_array
--
-- Description:
-- This function takes an input integer array and rebuilds an output integer
-- array composed of the first "num_valid_entry" elements from the input
-- array.
------------------------------------------------------------------------------
function rebuild_int_array (int_array : INTEGER_ARRAY_TYPE;
num_valid_entry : integer)
return INTEGER_ARRAY_TYPE is
-- Variables
variable temp_int_array : INTEGER_ARRAY_TYPE( 0 to num_valid_entry-1);
begin
for array_index in 0 to num_valid_entry-1 loop
temp_int_array(array_index) := int_array(array_index);
end loop;
return(temp_int_array);
end function rebuild_int_array;
function bits_needed_for_vac(
fifo_present: boolean;
dependent_props : DEPENDENT_PROPS_TYPE
) return integer is
begin
if not fifo_present then
return 1; -- Zero would be better but leads to "0 to -1" null
-- ranges that are not handled by XST Flint or earlier
-- because of the negative index.
else
return
log2(1 + dependent_props(FIFO_CAPACITY_BITS) /
dependent_props(RD_WIDTH_BITS)
);
end if;
end function bits_needed_for_vac;
function bits_needed_for_occ(
fifo_present: boolean;
dependent_props : DEPENDENT_PROPS_TYPE
) return integer is
begin
if not fifo_present then
return 1; -- Zero would be better but leads to "0 to -1" null
-- ranges that are not handled by XST Flint or earlier
-- because of the negative index.
else
return
log2(1 + dependent_props(FIFO_CAPACITY_BITS) /
dependent_props(WR_WIDTH_BITS)
);
end if;
end function bits_needed_for_occ;
function eff_dp(id : integer;
dep_prop : integer;
value : integer) return integer is
variable dp : integer := dep_prop;
type bo2na_type is array (boolean) of natural;
constant bo2na : bo2na_type := (0, 1);
begin
if value /= 0 then return value; end if; -- Not default
case id is
when IPIF_CHDMA_CHANNELS =>
-------------------
return( bo2na(dp = CLK_PERIOD_PS ) * 10000
+ bo2na(dp = PACKET_WAIT_UNIT_NS ) * 1000000
+ bo2na(dp = BURST_SIZE ) * 16
);
when others => return 0;
end case;
end eff_dp;
function populate_intr_mode_array (num_user_intr : integer;
intr_capture_mode : integer)
return INTEGER_ARRAY_TYPE is
variable intr_mode_array : INTEGER_ARRAY_TYPE(0 to num_user_intr-1);
begin
for i in 0 to num_user_intr-1 loop
intr_mode_array(i) := intr_capture_mode;
end loop;
return intr_mode_array;
end function populate_intr_mode_array;
function add_intr_ard_id_array(include_intr : boolean;
ard_id_array : INTEGER_ARRAY_TYPE)
return INTEGER_ARRAY_TYPE is
variable intr_ard_id_array : INTEGER_ARRAY_TYPE(0 to ard_id_array'length);
begin
intr_ard_id_array(0 to ard_id_array'length-1) := ard_id_array;
if include_intr then
intr_ard_id_array(ard_id_array'length) := IPIF_INTR;
return intr_ard_id_array;
else
return ard_id_array;
end if;
end function add_intr_ard_id_array;
function add_intr_ard_addr_range_array(include_intr : boolean;
ZERO_ADDR_PAD : std_logic_vector;
intr_baseaddr : std_logic_vector;
intr_highaddr : std_logic_vector;
ard_id_array : INTEGER_ARRAY_TYPE;
ard_addr_range_array : SLV64_ARRAY_TYPE)
return SLV64_ARRAY_TYPE is
variable intr_ard_addr_range_array : SLV64_ARRAY_TYPE(0 to ard_addr_range_array'length+1);
begin
intr_ard_addr_range_array(0 to ard_addr_range_array'length-1) := ard_addr_range_array;
if include_intr then
intr_ard_addr_range_array(2*get_id_index(ard_id_array,IPIF_INTR))
:= ZERO_ADDR_PAD & intr_baseaddr;
intr_ard_addr_range_array(2*get_id_index(ard_id_array,IPIF_INTR)+1)
:= ZERO_ADDR_PAD & intr_highaddr;
return intr_ard_addr_range_array;
else
return ard_addr_range_array;
end if;
end function add_intr_ard_addr_range_array;
function add_intr_ard_dwidth_array(include_intr : boolean;
intr_dwidth : integer;
ard_id_array : INTEGER_ARRAY_TYPE;
ard_dwidth_array : INTEGER_ARRAY_TYPE)
return INTEGER_ARRAY_TYPE is
variable intr_ard_dwidth_array : INTEGER_ARRAY_TYPE(0 to ard_dwidth_array'length);
begin
intr_ard_dwidth_array(0 to ard_dwidth_array'length-1) := ard_dwidth_array;
if include_intr then
intr_ard_dwidth_array(get_id_index(ard_id_array, IPIF_INTR)) := intr_dwidth;
return intr_ard_dwidth_array;
else
return ard_dwidth_array;
end if;
end function add_intr_ard_dwidth_array;
function add_intr_ard_num_ce_array(include_intr : boolean;
ard_id_array : INTEGER_ARRAY_TYPE;
ard_num_ce_array : INTEGER_ARRAY_TYPE)
return INTEGER_ARRAY_TYPE is
variable intr_ard_num_ce_array : INTEGER_ARRAY_TYPE(0 to ard_num_ce_array'length);
begin
intr_ard_num_ce_array(0 to ard_num_ce_array'length-1) := ard_num_ce_array;
if include_intr then
intr_ard_num_ce_array(get_id_index(ard_id_array, IPIF_INTR)) := 16;
return intr_ard_num_ce_array;
else
return ard_num_ce_array;
end if;
end function add_intr_ard_num_ce_array;
end package body ipif_pkg;
|
-- IPIF Common Library Package
-------------------------------------------------------------------------------
--
-- *************************************************************************
-- ** **
-- ** DISCLAIMER OF LIABILITY **
-- ** **
-- ** This text/file contains proprietary, confidential **
-- ** information of Xilinx, Inc., is distributed under **
-- ** license from Xilinx, Inc., and may be used, copied **
-- ** and/or disclosed only pursuant to the terms of a valid **
-- ** license agreement with Xilinx, Inc. Xilinx hereby **
-- ** grants you a license to use this text/file solely for **
-- ** design, simulation, implementation and creation of **
-- ** design files limited to Xilinx devices or technologies. **
-- ** Use with non-Xilinx devices or technologies is expressly **
-- ** prohibited and immediately terminates your license unless **
-- ** covered by a separate agreement. **
-- ** **
-- ** Xilinx is providing this design, code, or information **
-- ** "as-is" solely for use in developing programs and **
-- ** solutions for Xilinx devices, with no obligation on the **
-- ** part of Xilinx to provide support. By providing this design, **
-- ** code, or information as one possible implementation of **
-- ** this feature, application or standard, Xilinx is making no **
-- ** representation that this implementation is free from any **
-- ** claims of infringement. You are responsible for obtaining **
-- ** any rights you may require for your implementation. **
-- ** Xilinx expressly disclaims any warranty whatsoever with **
-- ** respect to the adequacy of the implementation, including **
-- ** but not limited to any warranties or representations that this **
-- ** implementation is free from claims of infringement, implied **
-- ** warranties of merchantability or fitness for a particular **
-- ** purpose. **
-- ** **
-- ** Xilinx products are not intended for use in life support **
-- ** appliances, devices, or systems. Use in such applications is **
-- ** expressly prohibited. **
-- ** **
-- ** Any modifications that are made to the Source Code are **
-- ** done at the users sole risk and will be unsupported. **
-- ** The Xilinx Support Hotline does not have access to source **
-- ** code and therefore cannot answer specific questions related **
-- ** to source HDL. The Xilinx Hotline support of original source **
-- ** code IP shall only address issues and questions related **
-- ** to the standard Netlist version of the core (and thus **
-- ** indirectly, the original core source). **
-- ** **
-- ** Copyright (c) 2002-2010 Xilinx, Inc. All rights reserved. **
-- ** **
-- ** This copyright and support notice must be retained as part **
-- ** of this text at all times. **
-- ** **
-- *************************************************************************
--
-------------------------------------------------------------------------------
-- Filename: ipif_pkg.vhd
-- Version: Intital
-- Description: This file contains the constants and functions used in the
-- ipif common library components.
--
-------------------------------------------------------------------------------
-- Structure:
--
-------------------------------------------------------------------------------
-- Author: DET
-- History:
-- DET 02/21/02 -- Created from proc_common_pkg.vhd
--
-- DET 03/13/02 -- PLB IPIF development updates
-- ^^^^^^
-- - Commented out string types and string functions due to an XST
-- problem with string arrays and functions. THe string array
-- processing functions were replaced with comperable functions
-- operating on integer arrays.
-- ~~~~~~
--
--
-- DET 4/30/2002 Initial
-- ~~~~~~
-- - Added three functions: rebuild_slv32_array, rebuild_slv64_array, and
-- rebuild_int_array to support removal of unused elements from the
-- ARD arrays.
-- ^^^^^^ --
--
-- FLO 8/12/2002
-- ~~~~~~
-- - Added three functions: bits_needed_for_vac, bits_needed_for_occ,
-- and get_id_index_iboe.
-- (Removed provisional functions bits_needed_for_vacancy,
-- bits needed_for_occupancy, and bits_needed_for.)
-- ^^^^^^
--
-- FLO 3/24/2003
-- ~~~~~~
-- - Added dependent property paramters for channelized DMA.
-- - Added common property parameter array type.
-- - Definded the KEYHOLD_BURST common-property parameter.
-- ^^^^^^
--
-- FLO 10/22/2003
-- ~~~~~~
-- - Some adjustment to CHDMA parameterization.
-- - Cleanup of obsolete code and comments. (The former "XST workaround"
-- has become the officially deployed method.)
-- ^^^^^^
--
-- LSS 03/24/2004
-- ~~~~~~
-- - Added 5 functions
-- ^^^^^^
--
-- ALS 09/03/04
-- ^^^^^^
-- -- Added constants to describe the channel protocols used in MCH_OPB_IPIF
-- ~~~~~~
--
-- DET 1/17/2008 v4_0
-- ~~~~~~
-- - Changed proc_common library version to v4_0
-- - Incorporated new disclaimer header
-- ^^^^^^
--
-------------------------------------------------------------------------------
-- Naming Conventions:
-- active low signals: "*_n"
-- clock signals: "clk", "clk_div#", "clk_#x"
-- reset signals: "rst", "rst_n"
-- generics: "C_*"
-- user defined types: "*_TYPE"
-- state machine next state: "*_ns"
-- state machine current state: "*_cs"
-- combinatorial signals: "*_com"
-- pipelined or register delay signals: "*_d#"
-- counter signals: "*cnt*"
-- clock enable signals: "*_ce"
-- internal version of output port "*_i"
-- device pins: "*_pin"
-- ports: - Names begin with Uppercase
-- processes: "*_PROCESS"
-- component instantiations: "<ENTITY_>I_<#|FUNC>
-------------------------------------------------------------------------------
library ieee;
use ieee.std_logic_1164.all;
-- need conversion function to convert reals/integers to std logic vectors
use ieee.std_logic_arith.all;
use ieee.std_logic_arith.all;
use ieee.std_logic_unsigned.all;
package ipif_pkg is
-------------------------------------------------------------------------------
-- Type Declarations
-------------------------------------------------------------------------------
type SLV32_ARRAY_TYPE is array (natural range <>) of std_logic_vector(0 to 31);
subtype SLV64_TYPE is std_logic_vector(0 to 63);
type SLV64_ARRAY_TYPE is array (natural range <>) of SLV64_TYPE;
type INTEGER_ARRAY_TYPE is array (natural range <>) of integer;
-------------------------------------------------------------------------------
-- Function and Procedure Declarations
-------------------------------------------------------------------------------
function "=" (s1: in string; s2: in string) return boolean;
function equaluseCase( str1, str2 : STRING ) RETURN BOOLEAN;
function calc_num_ce (ce_num_array : INTEGER_ARRAY_TYPE) return integer;
function calc_start_ce_index (ce_num_array : INTEGER_ARRAY_TYPE;
index : integer) return integer;
function get_min_dwidth (dwidth_array: INTEGER_ARRAY_TYPE) return integer;
function get_max_dwidth (dwidth_array: INTEGER_ARRAY_TYPE) return integer;
function S32 (in_string : string) return string;
--------------------------------------------------------------------------------
-- ARD support functions.
-- These function can be useful when operating with the ARD parameterization.
--------------------------------------------------------------------------------
function get_id_index (id_array :INTEGER_ARRAY_TYPE;
id : integer)
return integer;
function get_id_index_iboe (id_array :INTEGER_ARRAY_TYPE;
id : integer)
return integer;
function find_ard_id (id_array : INTEGER_ARRAY_TYPE;
id : integer) return boolean;
function find_id_dwidth (id_array : INTEGER_ARRAY_TYPE;
dwidth_array: INTEGER_ARRAY_TYPE;
id : integer;
default : integer)
return integer;
function cnt_ipif_id_blks (id_array : INTEGER_ARRAY_TYPE) return integer;
function get_ipif_id_dbus_index (id_array : INTEGER_ARRAY_TYPE;
id : integer)
return integer ;
function rebuild_slv32_array (slv32_array : SLV32_ARRAY_TYPE;
num_valid_pairs : integer)
return SLV32_ARRAY_TYPE;
function rebuild_slv64_array (slv64_array : SLV64_ARRAY_TYPE;
num_valid_pairs : integer)
return SLV64_ARRAY_TYPE;
function rebuild_int_array (int_array : INTEGER_ARRAY_TYPE;
num_valid_entry : integer)
return INTEGER_ARRAY_TYPE;
-- 5 Functions Added 3/24/04
function populate_intr_mode_array (num_user_intr : integer;
intr_capture_mode : integer)
return INTEGER_ARRAY_TYPE ;
function add_intr_ard_id_array(include_intr : boolean;
ard_id_array : INTEGER_ARRAY_TYPE)
return INTEGER_ARRAY_TYPE;
function add_intr_ard_addr_range_array(include_intr : boolean;
ZERO_ADDR_PAD : std_logic_vector;
intr_baseaddr : std_logic_vector;
intr_highaddr : std_logic_vector;
ard_id_array : INTEGER_ARRAY_TYPE;
ard_addr_range_array : SLV64_ARRAY_TYPE)
return SLV64_ARRAY_TYPE;
function add_intr_ard_num_ce_array(include_intr : boolean;
ard_id_array : INTEGER_ARRAY_TYPE;
ard_num_ce_array : INTEGER_ARRAY_TYPE)
return INTEGER_ARRAY_TYPE;
function add_intr_ard_dwidth_array(include_intr : boolean;
intr_dwidth : integer;
ard_id_array : INTEGER_ARRAY_TYPE;
ard_dwidth_array : INTEGER_ARRAY_TYPE)
return INTEGER_ARRAY_TYPE;
function log2(x : natural) return integer;
function clog2(x : positive) return natural;
-------------------------------------------------------------------------------
-- Constant Declarations
-------------------------------------------------------------------------------
-------------------------------------------------------------------------------
-- Channel Protocols
-- The constant declarations below give symbolic-name aliases for values that
-- can be used in the C_MCH_PROTOCOL_ARRAY generic of the MCH_OPB_IPIF.
-------------------------------------------------------------------------------
constant XCL : integer := 0;
constant DAG : integer := 1;
--------------------------------------------------------------------------------
-- Address range types.
-- The constant declarations, below, give symbolic-name aliases for values
-- that can be used in the C_ARD_ID_ARRAY generic of IPIFs. The first set
-- gives aliases that are used to include IPIF services.
--------------------------------------------------------------------------------
-- IPIF module aliases
Constant IPIF_INTR : integer := 1;
Constant IPIF_RST : integer := 2;
Constant IPIF_SESR_SEAR : integer := 3;
Constant IPIF_DMA_SG : integer := 4;
Constant IPIF_WRFIFO_REG : integer := 5;
Constant IPIF_WRFIFO_DATA : integer := 6;
Constant IPIF_RDFIFO_REG : integer := 7;
Constant IPIF_RDFIFO_DATA : integer := 8;
Constant IPIF_CHDMA_CHANNELS : integer := 9;
Constant IPIF_CHDMA_GLOBAL_REGS : integer := 10;
Constant CHDMA_STATUS_FIFO : integer := 90;
-- Some predefined user module aliases
Constant USER_00 : integer := 100;
Constant USER_01 : integer := 101;
Constant USER_02 : integer := 102;
Constant USER_03 : integer := 103;
Constant USER_04 : integer := 104;
Constant USER_05 : integer := 105;
Constant USER_06 : integer := 106;
Constant USER_07 : integer := 107;
Constant USER_08 : integer := 108;
Constant USER_09 : integer := 109;
Constant USER_10 : integer := 110;
Constant USER_11 : integer := 111;
Constant USER_12 : integer := 112;
Constant USER_13 : integer := 113;
Constant USER_14 : integer := 114;
Constant USER_15 : integer := 115;
Constant USER_16 : integer := 116;
---( Start of Dependent Properties declarations
--------------------------------------------------------------------------------
-- Declarations for Dependent Properties (properties that depend on the type of
-- the address range, or in other words, address-range-specific parameters).
-- There is one property, i.e. one parameter, encoded as an integer at
-- each index of the properties array. There is one properties array for
-- each address range.
--
-- The C_ARD_DEPENDENT_PROPS_ARRAY generic parameter in (most) IPIFs is such
-- a properties array and it is usually giving its (static) value using a
-- VHDL aggregate construct. (--ToDo, give an example of this.)
--
-- The the "assigned" default value of a dependent property is zero. This value
-- is usually specified the aggregate by leaving its (index) name out so that
-- it is covered by an "others => 0" choice in the aggregate. Some parameters,
-- as noted in the definitions, below, have an "effective" default value that is
-- different from the assigned default value of zero. In such cases, the
-- function, eff_dp, given below, can be used to get the effective value of
-- the dependent property.
--------------------------------------------------------------------------------
constant DEPENDENT_PROPS_SIZE : integer := 32;
subtype DEPENDENT_PROPS_TYPE
is INTEGER_ARRAY_TYPE(0 to DEPENDENT_PROPS_SIZE-1);
type DEPENDENT_PROPS_ARRAY_TYPE
is array (natural range <>) of DEPENDENT_PROPS_TYPE;
--------------------------------------------------------------------------------
-- Below are the indices of dependent properties for the different types of
-- address ranges.
--
-- Example: Let C_ARD_DEPENDENT_PROPS_ARRAY hold the dependent properites
-- for a set of address ranges. Then, e.g.,
--
-- C_ARD_DEPENDENT_PROPS_ARRAY(i)(FIFO_CAPACITY_BITS)
--
-- gives the fifo capacity in bits, provided that the i'th address range
-- is of type IPIF_WRFIFO_DATA or IPIF_RDFIFO_DATA.
--
-- These indices should be referenced only by the names below and never
-- by numerical literals. (The right to change numerical index assignments
-- is reserved; applications using the names will not be affected by such
-- reassignments.)
--------------------------------------------------------------------------------
--
--ToDo, if the interrupt controller parameterization is ever moved to
-- C_ARD_DEPENDENT_PROPS_ARRAY, then the following declarations
-- could be uncommented and used.
---- IPIF_INTR IDX
---------------------------------------------------------------------------- ---
constant EXCLUDE_DEV_ISC : integer := 0;
-- 1 specifies that only the global interrupt
-- enable is present in the device interrupt source
-- controller and that the only source of interrupts
-- in the device is the IP interrupt source controller.
-- 0 specifies that the full device interrupt
-- source controller structure will be included.
constant INCLUDE_DEV_PENCODER : integer := 1;
-- 1 will include the Device IID in the device interrupt
-- source controller, 0 will exclude it.
--
-- IPIF_WRFIFO_DATA or IPIF_RDFIFO_DATA IDX
---------------------------------------------------------------------------- ---
constant FIFO_CAPACITY_BITS : integer := 0;
constant WR_WIDTH_BITS : integer := 1;
constant RD_WIDTH_BITS : integer := 2;
constant EXCLUDE_PACKET_MODE : integer := 3;
-- 1 Don't include packet mode features
-- 0 Include packet mode features
constant EXCLUDE_VACANCY : integer := 4;
-- 1 Don't include vacancy calculation
-- 0 Include vacancy calculation
-- See also the functions
-- bits_needed_for_vac and
-- bits_needed_for_occ that are declared below.
constant INCLUDE_DRE : integer := 5;
constant INCLUDE_AUTOPUSH_POP : integer := 6;
constant AUTOPUSH_POP_CE : integer := 7;
constant INCLUDE_CSUM : integer := 8;
--------------------------------------------------------------------------------
--
-- DMA_SG IDX
---------------------------------------------------------------------------- ---
--------------------------------------------------------------------------------
-- IPIF_CHDMA_CHANNELS IDX
---------------------------------------------------------------------------- ---
constant NUM_SUBS_FOR_PHYS_0 : integer :=0;
constant NUM_SUBS_FOR_PHYS_1 : integer :=1;
constant NUM_SUBS_FOR_PHYS_2 : integer :=2;
constant NUM_SUBS_FOR_PHYS_3 : integer :=3;
constant NUM_SUBS_FOR_PHYS_4 : integer :=4;
constant NUM_SUBS_FOR_PHYS_5 : integer :=5;
constant NUM_SUBS_FOR_PHYS_6 : integer :=6;
constant NUM_SUBS_FOR_PHYS_7 : integer :=7;
constant NUM_SUBS_FOR_PHYS_8 : integer :=8;
constant NUM_SUBS_FOR_PHYS_9 : integer :=9;
constant NUM_SUBS_FOR_PHYS_10 : integer :=10;
constant NUM_SUBS_FOR_PHYS_11 : integer :=11;
constant NUM_SUBS_FOR_PHYS_12 : integer :=12;
constant NUM_SUBS_FOR_PHYS_13 : integer :=13;
constant NUM_SUBS_FOR_PHYS_14 : integer :=14;
constant NUM_SUBS_FOR_PHYS_15 : integer :=15;
-- Gives the number of sub-channels for physical channel i.
--
-- These constants, which will be MAX_NUM_PHYS_CHANNELS in number (see
-- below), have consecutive values starting with 0 for
-- NUM_SUBS_FOR_PHYS_0. (The constants serve the purpose of giving symbolic
-- names for use in the dependent-properties aggregates that parameterize
-- an IPIF_CHDMA_CHANNELS address range.)
--
-- [Users can ignore this note for developers
-- If the number of physical channels changes, both the
-- IPIF_CHDMA_CHANNELS constants and MAX_NUM_PHYS_CHANNELS,
-- below, must be adjusted.
-- (Use of an array constant or a function of the form
-- NUM_SUBS_FOR_PHYS(i) to define the indices
-- runs afoul of LRM restrictions on non-locally static aggregate
-- choices. (Further, the LRM imposes perhaps unnecessarily
-- strict limits on what qualifies as a locally static primary.)
-- Note: This information is supplied for the benefit of anyone seeking
-- to improve the way that these NUM_SUBS_FOR_PHYS parameter
-- indices are defined.)
-- End of note for developers ]
--
-- The value associated with any index NUM_SUBS_FOR_PHYS_i in the
-- dependent-properties array must be even since TX and RX channels
-- come in pairs with the TX followed immediately by
-- the corresponding RX.
--
constant NUM_SIMPLE_DMA_CHANS : integer :=16;
-- The number of simple DMA channels.
constant NUM_SIMPLE_SG_CHANS : integer :=17;
-- The number of simple SG channels.
constant INTR_COALESCE : integer :=18;
-- 0 Interrupt coalescing is disabled
-- 1 Interrupt coalescing is enabled
constant CLK_PERIOD_PS : integer :=19;
-- The period of the OPB Bus clock in ps.
-- The default value of 0 is a special value that
-- is synonymous with 10000 ps (10 ns).
-- The value for CLK_PERIOD_PS is relevant only if (INTR_COALESCE = 1).
constant PACKET_WAIT_UNIT_NS : integer :=20;
-- Gives the unit for used for timing of pack-wait bounds.
-- The default value of 0 is a special value that
-- is synonymous with 1,000,000 ns (1 ms) and a non-default
-- value is typically only used for testing.
-- Relevant only if (INTR_COALESCE = 1).
constant BURST_SIZE : integer :=21;
-- 1, 2, 4, 8 or 16
-- The default value of 0 is a special value that
-- is synonymous with a burst size of 16.
-- Setting the BURST_SIZE to 1 effectively disables
-- bursts.
constant REMAINDER_AS_SINGLES : integer :=22;
-- 0 Remainder handled as a short burst
-- 1 Remainder handled as a series of singles
--------------------------------------------------------------------------------
-- The constant below is not the index of a dependent-properties
-- parameter (and, as such, would never appear as a choice in a
-- dependent-properties aggregate). Rather, it is fixed to the maximum
-- number of physical channels that an Address Range of type
-- IPIF_CHDMA_CHANNELS supports. It must be maintained in conjuction with
-- the constants named, e.g., NUM_SUBS_FOR_PHYS_15, above.
--------------------------------------------------------------------------------
constant MAX_NUM_PHYS_CHANNELS : natural := 16;
--------------------------------------------------------------------------
-- EXAMPLE: Here is an example dependent-properties aggregate for an
-- address range of type IPIF_CHDMA_CHANNELS.
-- To have a compact list of all of the CHDMA parameters, all are
-- shown, however three are commented out and the unneeded
-- MUM_SUBS_FOR_PHYS_x are excluded. The "OTHERS => 0" association
-- gives these parameters their default values, such that, for the example
--
-- - All physical channels above 2 have zero subchannels (effectively,
-- these physical channels are not used)
-- - There are no simple SG channels
-- - The packet-wait time unit is 1 ms
-- - Burst size is 16
--------------------------------------------------------------------------
-- (
-- NUM_SUBS_FOR_PHYS_0 => 8,
-- NUM_SUBS_FOR_PHYS_1 => 4,
-- NUM_SUBS_FOR_PHYS_2 => 14,
-- NUM_SIMPLE_DMA_CHANS => 1,
-- --NUM_SIMPLE_SG_CHANS => 5,
-- INTR_COALESCE => 1,
-- CLK_PERIOD_PS => 20000,
-- --PACKET_WAIT_UNIT_NS => 50000,
-- --BURST_SIZE => 1,
-- REMAINDER_AS_SINGLES => 1,
-- OTHERS => 0
-- )
--
--------------------------------------------------------------------------------
--------------------------------------------------------------------------------
-- Calculates the number of bits needed to convey the vacancy (emptiness) of
-- the fifo described by dependent_props, if fifo_present. If not fifo_present,
-- returns 0 (or the smallest value allowed by tool limitations on null arrays)
-- without making reference to dependent_props.
--------------------------------------------------------------------------------
function bits_needed_for_vac(
fifo_present: boolean;
dependent_props : DEPENDENT_PROPS_TYPE
) return integer;
--------------------------------------------------------------------------------
-- Calculates the number of bits needed to convey the occupancy (fullness) of
-- the fifo described by dependent_props, if fifo_present. If not fifo_present,
-- returns 0 (or the smallest value allowed by tool limitations on null arrays)
-- without making reference to dependent_props.
--------------------------------------------------------------------------------
function bits_needed_for_occ(
fifo_present: boolean;
dependent_props : DEPENDENT_PROPS_TYPE
) return integer;
--------------------------------------------------------------------------------
-- Function eff_dp.
--
-- For some of the dependent properties, the default value of zero is meant
-- to imply an effective default value of other than zero (see e.g.
-- PKT_WAIT_UNIT_NS for the IPIF_CHDMA_CHANNELS address-range type). The
-- following function is used to get the (possibly default-adjusted)
-- value for a dependent property.
--
-- Example call:
--
-- eff_value_of_param :=
-- eff_dp(
-- C_IPIF_CHDMA_CHANNELS,
-- PACKET_WAIT_UNIT_NS,
-- C_ARD_DEPENDENT_PROPS_ARRAY(i)(PACKET_WAIT_UNIT_NS)
-- );
--
-- where C_ARD_DEPENDENT_PROPS_ARRAY(i) is an object of type
-- DEPENDENT_PROPS_ARRAY_TYPE, that was parameterized for an address range of
-- type C_IPIF_CHDMA_CHANNELS.
--------------------------------------------------------------------------------
function eff_dp(id : integer; -- The type of address range.
dep_prop : integer; -- The index of the dependent prop.
value : integer -- The value at that index.
) return integer; -- The effective value, possibly adjusted
-- if value has the default value of 0.
---) End of Dependent Properties declarations
--------------------------------------------------------------------------------
-- Declarations for Common Properties (properties that apply regardless of the
-- type of the address range). Structurally, these work the same as
-- the dependent properties.
--------------------------------------------------------------------------------
constant COMMON_PROPS_SIZE : integer := 2;
subtype COMMON_PROPS_TYPE
is INTEGER_ARRAY_TYPE(0 to COMMON_PROPS_SIZE-1);
type COMMON_PROPS_ARRAY_TYPE
is array (natural range <>) of COMMON_PROPS_TYPE;
--------------------------------------------------------------------------------
-- Below are the indices of the common properties.
--
-- These indices should be referenced only by the names below and never
-- by numerical literals.
-- IDX
---------------------------------------------------------------------------- ---
constant KEYHOLE_BURST : integer := 0;
-- 1 All addresses of a burst are forced to the initial
-- address of the burst.
-- 0 Burst addresses follow the bus protocol.
-- IP interrupt mode array constants
Constant INTR_PASS_THRU : integer := 1;
Constant INTR_PASS_THRU_INV : integer := 2;
Constant INTR_REG_EVENT : integer := 3;
Constant INTR_REG_EVENT_INV : integer := 4;
Constant INTR_POS_EDGE_DETECT : integer := 5;
Constant INTR_NEG_EDGE_DETECT : integer := 6;
end ipif_pkg;
package body ipif_pkg is
-------------------------------------------------------------------------------
-- Function log2 -- returns number of bits needed to encode x choices
-- x = 0 returns 0
-- x = 1 returns 0
-- x = 2 returns 1
-- x = 4 returns 2, etc.
-------------------------------------------------------------------------------
--
function log2(x : natural) return integer is
variable i : integer := 0;
variable val: integer := 1;
begin
if x = 0 then return 0;
else
for j in 0 to 29 loop -- for loop for XST
if val >= x then null;
else
i := i+1;
val := val*2;
end if;
end loop;
-- Fix per CR520627 XST was ignoring this anyway and printing a
-- Warning in SRP file. This will get rid of the warning and not
-- impact simulation.
-- synthesis translate_off
assert val >= x
report "Function log2 received argument larger" &
" than its capability of 2^30. "
severity failure;
-- synthesis translate_on
return i;
end if;
end function log2;
--------------------------------------------------------------------------------
-- Function clog2 - returns the integer ceiling of the base 2 logarithm of x,
-- i.e., the least integer greater than or equal to log2(x).
--------------------------------------------------------------------------------
function clog2(x : positive) return natural is
variable r : natural := 0;
variable rp : natural := 1; -- rp tracks the value 2**r
begin
while rp < x loop -- Termination condition T: x <= 2**r
-- Loop invariant L: 2**(r-1) < x
r := r + 1;
if rp > integer'high - rp then exit; end if; -- If doubling rp overflows
-- the integer range, the doubled value would exceed x, so safe to exit.
rp := rp + rp;
end loop;
-- L and T <-> 2**(r-1) < x <= 2**r <-> (r-1) < log2(x) <= r
return r; --
end clog2;
-------------------------------------------------------------------------------
-- Function Definitions
-------------------------------------------------------------------------------
-----------------------------------------------------------------------------
-- Function "="
--
-- This function can be used to overload the "=" operator when comparing
-- strings.
-----------------------------------------------------------------------------
function "=" (s1: in string; s2: in string) return boolean is
constant tc: character := ' '; -- string termination character
variable i: integer := 1;
variable v1 : string(1 to s1'length) := s1;
variable v2 : string(1 to s2'length) := s2;
begin
while (i <= v1'length) and (v1(i) /= tc) and
(i <= v2'length) and (v2(i) /= tc) and
(v1(i) = v2(i))
loop
i := i+1;
end loop;
return ((i > v1'length) or (v1(i) = tc)) and
((i > v2'length) or (v2(i) = tc));
end;
----------------------------------------------------------------------------
-- Function equaluseCase
--
-- This function returns true if case sensitive string comparison determines
-- that str1 and str2 are the same.
-----------------------------------------------------------------------------
FUNCTION equaluseCase( str1, str2 : STRING ) RETURN BOOLEAN IS
CONSTANT len1 : INTEGER := str1'length;
CONSTANT len2 : INTEGER := str2'length;
VARIABLE equal : BOOLEAN := TRUE;
BEGIN
IF NOT (len1=len2) THEN
equal := FALSE;
ELSE
FOR i IN str1'range LOOP
IF NOT (str1(i) = str2(i)) THEN
equal := FALSE;
END IF;
END LOOP;
END IF;
RETURN equal;
END equaluseCase;
-----------------------------------------------------------------------------
-- Function calc_num_ce
--
-- This function is used to process the array specifying the number of Chip
-- Enables required for a Base Address specification. The array is input to
-- the function and an integer is returned reflecting the total number of
-- Chip Enables required for the CE, RdCE, and WrCE Buses
-----------------------------------------------------------------------------
function calc_num_ce (ce_num_array : INTEGER_ARRAY_TYPE) return integer is
Variable ce_num_sum : integer := 0;
begin
for i in 0 to (ce_num_array'length)-1 loop
ce_num_sum := ce_num_sum + ce_num_array(i);
End loop;
return(ce_num_sum);
end function calc_num_ce;
-----------------------------------------------------------------------------
-- Function calc_start_ce_index
--
-- This function is used to process the array specifying the number of Chip
-- Enables required for a Base Address specification. The CE Size array is
-- input to the function and an integer index representing the index of the
-- target module in the ce_num_array. An integer is returned reflecting the
-- starting index of the assigned Chip Enables within the CE, RdCE, and
-- WrCE Buses.
-----------------------------------------------------------------------------
function calc_start_ce_index (ce_num_array : INTEGER_ARRAY_TYPE;
index : integer) return integer is
Variable ce_num_sum : integer := 0;
begin
If (index = 0) Then
ce_num_sum := 0;
else
for i in 0 to index-1 loop
ce_num_sum := ce_num_sum + ce_num_array(i);
End loop;
End if;
return(ce_num_sum);
end function calc_start_ce_index;
-----------------------------------------------------------------------------
-- Function get_min_dwidth
--
-- This function is used to process the array specifying the data bus width
-- for each of the target modules. The dwidth_array is input to the function
-- and an integer is returned that is the smallest value found of all the
-- entries in the array.
-----------------------------------------------------------------------------
function get_min_dwidth (dwidth_array: INTEGER_ARRAY_TYPE) return integer is
Variable temp_min : Integer := 1024;
begin
for i in 0 to dwidth_array'length-1 loop
If (dwidth_array(i) < temp_min) Then
temp_min := dwidth_array(i);
else
null;
End if;
End loop;
return(temp_min);
end function get_min_dwidth;
-----------------------------------------------------------------------------
-- Function get_max_dwidth
--
-- This function is used to process the array specifying the data bus width
-- for each of the target modules. The dwidth_array is input to the function
-- and an integer is returned that is the largest value found of all the
-- entries in the array.
-----------------------------------------------------------------------------
function get_max_dwidth (dwidth_array: INTEGER_ARRAY_TYPE) return integer is
Variable temp_max : Integer := 0;
begin
for i in 0 to dwidth_array'length-1 loop
If (dwidth_array(i) > temp_max) Then
temp_max := dwidth_array(i);
else
null;
End if;
End loop;
return(temp_max);
end function get_max_dwidth;
-----------------------------------------------------------------------------
-- Function S32
--
-- This function is used to expand an input string to 32 characters by
-- padding with spaces. If the input string is larger than 32 characters,
-- it will truncate to 32 characters.
-----------------------------------------------------------------------------
function S32 (in_string : string) return string is
constant OUTPUT_STRING_LENGTH : integer := 32;
Constant space : character := ' ';
variable new_string : string(1 to 32);
Variable start_index : Integer := in_string'length+1;
begin
If (in_string'length < OUTPUT_STRING_LENGTH) Then
for i in 1 to in_string'length loop
new_string(i) := in_string(i);
End loop;
for j in start_index to OUTPUT_STRING_LENGTH loop
new_string(j) := space;
End loop;
else -- use first 32 chars of in_string (truncate the rest)
for k in 1 to OUTPUT_STRING_LENGTH loop
new_string(k) := in_string(k);
End loop;
End if;
return(new_string);
end function S32;
-----------------------------------------------------------------------------
-- Function get_id_index
--
-- This function is used to process the array specifying the target function
-- assigned to a Base Address pair address range. The id_array and a
-- id number is input to the function. A integer is returned reflecting the
-- array index of the id matching the id input number. This function
-- should only be called if the id number is known to exist in the
-- name_array input. This can be detirmined by using the find_ard_id
-- function.
-----------------------------------------------------------------------------
function get_id_index (id_array :INTEGER_ARRAY_TYPE;
id : integer) return integer is
Variable match : Boolean := false;
Variable match_index : Integer := 10000; -- a really big number!
begin
for array_index in 0 to id_array'length-1 loop
If (match = true) Then -- match already found so do nothing
null;
else -- compare the numbers one by one
match := (id_array(array_index) = id);
If (match) Then
match_index := array_index;
else
null;
End if;
End if;
End loop;
return(match_index);
end function get_id_index;
--------------------------------------------------------------------------------
-- get_id_index but return a value in bounds on error (iboe).
--
-- This function is the same as get_id_index, except that when id does
-- not exist in id_array, the value returned is any index that is
-- within the index range of id_array.
--
-- This function would normally only be used where function find_ard_id
-- is used to establish the existence of id but, even when non-existent,
-- an element of one of the ARD arrays will be computed from the
-- returned get_id_index_iboe value. See, e.g., function bits_needed_for_vac
-- and the example call, below
--
-- bits_needed_for_vac(
-- find_ard_id(C_ARD_ID_ARRAY, IPIF_RDFIFO_DATA),
-- C_ARD_DEPENDENT_PROPS_ARRAY(get_id_index_iboe(C_ARD_ID_ARRAY,
-- IPIF_RDFIFO_DATA))
-- )
--------------------------------------------------------------------------------
function get_id_index_iboe (id_array :INTEGER_ARRAY_TYPE;
id : integer) return integer is
Variable match : Boolean := false;
Variable match_index : Integer := id_array'left; -- any valid array index
begin
for array_index in 0 to id_array'length-1 loop
If (match = true) Then -- match already found so do nothing
null;
else -- compare the numbers one by one
match := (id_array(array_index) = id);
If (match) Then match_index := array_index;
else null;
End if;
End if;
End loop;
return(match_index);
end function get_id_index_iboe;
-----------------------------------------------------------------------------
-- Function find_ard_id
--
-- This function is used to process the array specifying the target function
-- assigned to a Base Address pair address range. The id_array and a
-- integer id is input to the function. A boolean is returned reflecting the
-- presence (or not) of a number in the array matching the id input number.
-----------------------------------------------------------------------------
function find_ard_id (id_array : INTEGER_ARRAY_TYPE;
id : integer) return boolean is
Variable match : Boolean := false;
begin
for array_index in 0 to id_array'length-1 loop
If (match = true) Then -- match already found so do nothing
null;
else -- compare the numbers one by one
match := (id_array(array_index) = id);
End if;
End loop;
return(match);
end function find_ard_id;
-----------------------------------------------------------------------------
-- Function find_id_dwidth
--
-- This function is used to find the data width of a target module. If the
-- target module exists, the data width is extracted from the input dwidth
-- array. If the module is not in the ID array, the default input is
-- returned. This function is needed to assign data port size constraints on
-- unconstrained port widths.
-----------------------------------------------------------------------------
function find_id_dwidth (id_array : INTEGER_ARRAY_TYPE;
dwidth_array: INTEGER_ARRAY_TYPE;
id : integer;
default : integer) return integer is
Variable id_present : Boolean := false;
Variable array_index : Integer := 0;
Variable dwidth : Integer := default;
begin
id_present := find_ard_id(id_array, id);
If (id_present) Then
array_index := get_id_index (id_array, id);
dwidth := dwidth_array(array_index);
else
null; -- use default input
End if;
Return (dwidth);
end function find_id_dwidth;
-----------------------------------------------------------------------------
-- Function cnt_ipif_id_blks
--
-- This function is used to detirmine the number of IPIF components specified
-- in the ARD ID Array. An integer is returned representing the number
-- of elements counted. User IDs are ignored in the counting process.
-----------------------------------------------------------------------------
function cnt_ipif_id_blks (id_array : INTEGER_ARRAY_TYPE)
return integer is
Variable blk_count : integer := 0;
Variable temp_id : integer;
begin
for array_index in 0 to id_array'length-1 loop
temp_id := id_array(array_index);
If (temp_id = IPIF_WRFIFO_DATA or
temp_id = IPIF_RDFIFO_DATA or
temp_id = IPIF_RST or
temp_id = IPIF_INTR or
temp_id = IPIF_DMA_SG or
temp_id = IPIF_SESR_SEAR
) Then -- IPIF block found
blk_count := blk_count+1;
else -- go to next loop iteration
null;
End if;
End loop;
return(blk_count);
end function cnt_ipif_id_blks;
-----------------------------------------------------------------------------
-- Function get_ipif_id_dbus_index
--
-- This function is used to detirmine the IPIF relative index of a given
-- ID value. User IDs are ignored in the index detirmination.
-----------------------------------------------------------------------------
function get_ipif_id_dbus_index (id_array : INTEGER_ARRAY_TYPE;
id : integer)
return integer is
Variable blk_index : integer := 0;
Variable temp_id : integer;
Variable id_found : Boolean := false;
begin
for array_index in 0 to id_array'length-1 loop
temp_id := id_array(array_index);
If (id_found) then
null;
elsif (temp_id = id) then
id_found := true;
elsif (temp_id = IPIF_WRFIFO_DATA or
temp_id = IPIF_RDFIFO_DATA or
temp_id = IPIF_RST or
temp_id = IPIF_INTR or
temp_id = IPIF_DMA_SG or
temp_id = IPIF_SESR_SEAR
) Then -- IPIF block found
blk_index := blk_index+1;
else -- user block so do nothing
null;
End if;
End loop;
return(blk_index);
end function get_ipif_id_dbus_index;
------------------------------------------------------------------------------
-- Function: rebuild_slv32_array
--
-- Description:
-- This function takes an input slv32 array and rebuilds an output slv32
-- array composed of the first "num_valid_entry" elements from the input
-- array.
------------------------------------------------------------------------------
function rebuild_slv32_array (slv32_array : SLV32_ARRAY_TYPE;
num_valid_pairs : integer)
return SLV32_ARRAY_TYPE is
--Constants
constant num_elements : Integer := num_valid_pairs * 2;
-- Variables
variable temp_baseaddr32_array : SLV32_ARRAY_TYPE( 0 to num_elements-1);
begin
for array_index in 0 to num_elements-1 loop
temp_baseaddr32_array(array_index) := slv32_array(array_index);
end loop;
return(temp_baseaddr32_array);
end function rebuild_slv32_array;
------------------------------------------------------------------------------
-- Function: rebuild_slv64_array
--
-- Description:
-- This function takes an input slv64 array and rebuilds an output slv64
-- array composed of the first "num_valid_entry" elements from the input
-- array.
------------------------------------------------------------------------------
function rebuild_slv64_array (slv64_array : SLV64_ARRAY_TYPE;
num_valid_pairs : integer)
return SLV64_ARRAY_TYPE is
--Constants
constant num_elements : Integer := num_valid_pairs * 2;
-- Variables
variable temp_baseaddr64_array : SLV64_ARRAY_TYPE( 0 to num_elements-1);
begin
for array_index in 0 to num_elements-1 loop
temp_baseaddr64_array(array_index) := slv64_array(array_index);
end loop;
return(temp_baseaddr64_array);
end function rebuild_slv64_array;
------------------------------------------------------------------------------
-- Function: rebuild_int_array
--
-- Description:
-- This function takes an input integer array and rebuilds an output integer
-- array composed of the first "num_valid_entry" elements from the input
-- array.
------------------------------------------------------------------------------
function rebuild_int_array (int_array : INTEGER_ARRAY_TYPE;
num_valid_entry : integer)
return INTEGER_ARRAY_TYPE is
-- Variables
variable temp_int_array : INTEGER_ARRAY_TYPE( 0 to num_valid_entry-1);
begin
for array_index in 0 to num_valid_entry-1 loop
temp_int_array(array_index) := int_array(array_index);
end loop;
return(temp_int_array);
end function rebuild_int_array;
function bits_needed_for_vac(
fifo_present: boolean;
dependent_props : DEPENDENT_PROPS_TYPE
) return integer is
begin
if not fifo_present then
return 1; -- Zero would be better but leads to "0 to -1" null
-- ranges that are not handled by XST Flint or earlier
-- because of the negative index.
else
return
log2(1 + dependent_props(FIFO_CAPACITY_BITS) /
dependent_props(RD_WIDTH_BITS)
);
end if;
end function bits_needed_for_vac;
function bits_needed_for_occ(
fifo_present: boolean;
dependent_props : DEPENDENT_PROPS_TYPE
) return integer is
begin
if not fifo_present then
return 1; -- Zero would be better but leads to "0 to -1" null
-- ranges that are not handled by XST Flint or earlier
-- because of the negative index.
else
return
log2(1 + dependent_props(FIFO_CAPACITY_BITS) /
dependent_props(WR_WIDTH_BITS)
);
end if;
end function bits_needed_for_occ;
function eff_dp(id : integer;
dep_prop : integer;
value : integer) return integer is
variable dp : integer := dep_prop;
type bo2na_type is array (boolean) of natural;
constant bo2na : bo2na_type := (0, 1);
begin
if value /= 0 then return value; end if; -- Not default
case id is
when IPIF_CHDMA_CHANNELS =>
-------------------
return( bo2na(dp = CLK_PERIOD_PS ) * 10000
+ bo2na(dp = PACKET_WAIT_UNIT_NS ) * 1000000
+ bo2na(dp = BURST_SIZE ) * 16
);
when others => return 0;
end case;
end eff_dp;
function populate_intr_mode_array (num_user_intr : integer;
intr_capture_mode : integer)
return INTEGER_ARRAY_TYPE is
variable intr_mode_array : INTEGER_ARRAY_TYPE(0 to num_user_intr-1);
begin
for i in 0 to num_user_intr-1 loop
intr_mode_array(i) := intr_capture_mode;
end loop;
return intr_mode_array;
end function populate_intr_mode_array;
function add_intr_ard_id_array(include_intr : boolean;
ard_id_array : INTEGER_ARRAY_TYPE)
return INTEGER_ARRAY_TYPE is
variable intr_ard_id_array : INTEGER_ARRAY_TYPE(0 to ard_id_array'length);
begin
intr_ard_id_array(0 to ard_id_array'length-1) := ard_id_array;
if include_intr then
intr_ard_id_array(ard_id_array'length) := IPIF_INTR;
return intr_ard_id_array;
else
return ard_id_array;
end if;
end function add_intr_ard_id_array;
function add_intr_ard_addr_range_array(include_intr : boolean;
ZERO_ADDR_PAD : std_logic_vector;
intr_baseaddr : std_logic_vector;
intr_highaddr : std_logic_vector;
ard_id_array : INTEGER_ARRAY_TYPE;
ard_addr_range_array : SLV64_ARRAY_TYPE)
return SLV64_ARRAY_TYPE is
variable intr_ard_addr_range_array : SLV64_ARRAY_TYPE(0 to ard_addr_range_array'length+1);
begin
intr_ard_addr_range_array(0 to ard_addr_range_array'length-1) := ard_addr_range_array;
if include_intr then
intr_ard_addr_range_array(2*get_id_index(ard_id_array,IPIF_INTR))
:= ZERO_ADDR_PAD & intr_baseaddr;
intr_ard_addr_range_array(2*get_id_index(ard_id_array,IPIF_INTR)+1)
:= ZERO_ADDR_PAD & intr_highaddr;
return intr_ard_addr_range_array;
else
return ard_addr_range_array;
end if;
end function add_intr_ard_addr_range_array;
function add_intr_ard_dwidth_array(include_intr : boolean;
intr_dwidth : integer;
ard_id_array : INTEGER_ARRAY_TYPE;
ard_dwidth_array : INTEGER_ARRAY_TYPE)
return INTEGER_ARRAY_TYPE is
variable intr_ard_dwidth_array : INTEGER_ARRAY_TYPE(0 to ard_dwidth_array'length);
begin
intr_ard_dwidth_array(0 to ard_dwidth_array'length-1) := ard_dwidth_array;
if include_intr then
intr_ard_dwidth_array(get_id_index(ard_id_array, IPIF_INTR)) := intr_dwidth;
return intr_ard_dwidth_array;
else
return ard_dwidth_array;
end if;
end function add_intr_ard_dwidth_array;
function add_intr_ard_num_ce_array(include_intr : boolean;
ard_id_array : INTEGER_ARRAY_TYPE;
ard_num_ce_array : INTEGER_ARRAY_TYPE)
return INTEGER_ARRAY_TYPE is
variable intr_ard_num_ce_array : INTEGER_ARRAY_TYPE(0 to ard_num_ce_array'length);
begin
intr_ard_num_ce_array(0 to ard_num_ce_array'length-1) := ard_num_ce_array;
if include_intr then
intr_ard_num_ce_array(get_id_index(ard_id_array, IPIF_INTR)) := 16;
return intr_ard_num_ce_array;
else
return ard_num_ce_array;
end if;
end function add_intr_ard_num_ce_array;
end package body ipif_pkg;
|
-- IPIF Common Library Package
-------------------------------------------------------------------------------
--
-- *************************************************************************
-- ** **
-- ** DISCLAIMER OF LIABILITY **
-- ** **
-- ** This text/file contains proprietary, confidential **
-- ** information of Xilinx, Inc., is distributed under **
-- ** license from Xilinx, Inc., and may be used, copied **
-- ** and/or disclosed only pursuant to the terms of a valid **
-- ** license agreement with Xilinx, Inc. Xilinx hereby **
-- ** grants you a license to use this text/file solely for **
-- ** design, simulation, implementation and creation of **
-- ** design files limited to Xilinx devices or technologies. **
-- ** Use with non-Xilinx devices or technologies is expressly **
-- ** prohibited and immediately terminates your license unless **
-- ** covered by a separate agreement. **
-- ** **
-- ** Xilinx is providing this design, code, or information **
-- ** "as-is" solely for use in developing programs and **
-- ** solutions for Xilinx devices, with no obligation on the **
-- ** part of Xilinx to provide support. By providing this design, **
-- ** code, or information as one possible implementation of **
-- ** this feature, application or standard, Xilinx is making no **
-- ** representation that this implementation is free from any **
-- ** claims of infringement. You are responsible for obtaining **
-- ** any rights you may require for your implementation. **
-- ** Xilinx expressly disclaims any warranty whatsoever with **
-- ** respect to the adequacy of the implementation, including **
-- ** but not limited to any warranties or representations that this **
-- ** implementation is free from claims of infringement, implied **
-- ** warranties of merchantability or fitness for a particular **
-- ** purpose. **
-- ** **
-- ** Xilinx products are not intended for use in life support **
-- ** appliances, devices, or systems. Use in such applications is **
-- ** expressly prohibited. **
-- ** **
-- ** Any modifications that are made to the Source Code are **
-- ** done at the users sole risk and will be unsupported. **
-- ** The Xilinx Support Hotline does not have access to source **
-- ** code and therefore cannot answer specific questions related **
-- ** to source HDL. The Xilinx Hotline support of original source **
-- ** code IP shall only address issues and questions related **
-- ** to the standard Netlist version of the core (and thus **
-- ** indirectly, the original core source). **
-- ** **
-- ** Copyright (c) 2002-2010 Xilinx, Inc. All rights reserved. **
-- ** **
-- ** This copyright and support notice must be retained as part **
-- ** of this text at all times. **
-- ** **
-- *************************************************************************
--
-------------------------------------------------------------------------------
-- Filename: ipif_pkg.vhd
-- Version: Intital
-- Description: This file contains the constants and functions used in the
-- ipif common library components.
--
-------------------------------------------------------------------------------
-- Structure:
--
-------------------------------------------------------------------------------
-- Author: DET
-- History:
-- DET 02/21/02 -- Created from proc_common_pkg.vhd
--
-- DET 03/13/02 -- PLB IPIF development updates
-- ^^^^^^
-- - Commented out string types and string functions due to an XST
-- problem with string arrays and functions. THe string array
-- processing functions were replaced with comperable functions
-- operating on integer arrays.
-- ~~~~~~
--
--
-- DET 4/30/2002 Initial
-- ~~~~~~
-- - Added three functions: rebuild_slv32_array, rebuild_slv64_array, and
-- rebuild_int_array to support removal of unused elements from the
-- ARD arrays.
-- ^^^^^^ --
--
-- FLO 8/12/2002
-- ~~~~~~
-- - Added three functions: bits_needed_for_vac, bits_needed_for_occ,
-- and get_id_index_iboe.
-- (Removed provisional functions bits_needed_for_vacancy,
-- bits needed_for_occupancy, and bits_needed_for.)
-- ^^^^^^
--
-- FLO 3/24/2003
-- ~~~~~~
-- - Added dependent property paramters for channelized DMA.
-- - Added common property parameter array type.
-- - Definded the KEYHOLD_BURST common-property parameter.
-- ^^^^^^
--
-- FLO 10/22/2003
-- ~~~~~~
-- - Some adjustment to CHDMA parameterization.
-- - Cleanup of obsolete code and comments. (The former "XST workaround"
-- has become the officially deployed method.)
-- ^^^^^^
--
-- LSS 03/24/2004
-- ~~~~~~
-- - Added 5 functions
-- ^^^^^^
--
-- ALS 09/03/04
-- ^^^^^^
-- -- Added constants to describe the channel protocols used in MCH_OPB_IPIF
-- ~~~~~~
--
-- DET 1/17/2008 v4_0
-- ~~~~~~
-- - Changed proc_common library version to v4_0
-- - Incorporated new disclaimer header
-- ^^^^^^
--
-------------------------------------------------------------------------------
-- Naming Conventions:
-- active low signals: "*_n"
-- clock signals: "clk", "clk_div#", "clk_#x"
-- reset signals: "rst", "rst_n"
-- generics: "C_*"
-- user defined types: "*_TYPE"
-- state machine next state: "*_ns"
-- state machine current state: "*_cs"
-- combinatorial signals: "*_com"
-- pipelined or register delay signals: "*_d#"
-- counter signals: "*cnt*"
-- clock enable signals: "*_ce"
-- internal version of output port "*_i"
-- device pins: "*_pin"
-- ports: - Names begin with Uppercase
-- processes: "*_PROCESS"
-- component instantiations: "<ENTITY_>I_<#|FUNC>
-------------------------------------------------------------------------------
library ieee;
use ieee.std_logic_1164.all;
-- need conversion function to convert reals/integers to std logic vectors
use ieee.std_logic_arith.all;
use ieee.std_logic_arith.all;
use ieee.std_logic_unsigned.all;
package ipif_pkg is
-------------------------------------------------------------------------------
-- Type Declarations
-------------------------------------------------------------------------------
type SLV32_ARRAY_TYPE is array (natural range <>) of std_logic_vector(0 to 31);
subtype SLV64_TYPE is std_logic_vector(0 to 63);
type SLV64_ARRAY_TYPE is array (natural range <>) of SLV64_TYPE;
type INTEGER_ARRAY_TYPE is array (natural range <>) of integer;
-------------------------------------------------------------------------------
-- Function and Procedure Declarations
-------------------------------------------------------------------------------
function "=" (s1: in string; s2: in string) return boolean;
function equaluseCase( str1, str2 : STRING ) RETURN BOOLEAN;
function calc_num_ce (ce_num_array : INTEGER_ARRAY_TYPE) return integer;
function calc_start_ce_index (ce_num_array : INTEGER_ARRAY_TYPE;
index : integer) return integer;
function get_min_dwidth (dwidth_array: INTEGER_ARRAY_TYPE) return integer;
function get_max_dwidth (dwidth_array: INTEGER_ARRAY_TYPE) return integer;
function S32 (in_string : string) return string;
--------------------------------------------------------------------------------
-- ARD support functions.
-- These function can be useful when operating with the ARD parameterization.
--------------------------------------------------------------------------------
function get_id_index (id_array :INTEGER_ARRAY_TYPE;
id : integer)
return integer;
function get_id_index_iboe (id_array :INTEGER_ARRAY_TYPE;
id : integer)
return integer;
function find_ard_id (id_array : INTEGER_ARRAY_TYPE;
id : integer) return boolean;
function find_id_dwidth (id_array : INTEGER_ARRAY_TYPE;
dwidth_array: INTEGER_ARRAY_TYPE;
id : integer;
default : integer)
return integer;
function cnt_ipif_id_blks (id_array : INTEGER_ARRAY_TYPE) return integer;
function get_ipif_id_dbus_index (id_array : INTEGER_ARRAY_TYPE;
id : integer)
return integer ;
function rebuild_slv32_array (slv32_array : SLV32_ARRAY_TYPE;
num_valid_pairs : integer)
return SLV32_ARRAY_TYPE;
function rebuild_slv64_array (slv64_array : SLV64_ARRAY_TYPE;
num_valid_pairs : integer)
return SLV64_ARRAY_TYPE;
function rebuild_int_array (int_array : INTEGER_ARRAY_TYPE;
num_valid_entry : integer)
return INTEGER_ARRAY_TYPE;
-- 5 Functions Added 3/24/04
function populate_intr_mode_array (num_user_intr : integer;
intr_capture_mode : integer)
return INTEGER_ARRAY_TYPE ;
function add_intr_ard_id_array(include_intr : boolean;
ard_id_array : INTEGER_ARRAY_TYPE)
return INTEGER_ARRAY_TYPE;
function add_intr_ard_addr_range_array(include_intr : boolean;
ZERO_ADDR_PAD : std_logic_vector;
intr_baseaddr : std_logic_vector;
intr_highaddr : std_logic_vector;
ard_id_array : INTEGER_ARRAY_TYPE;
ard_addr_range_array : SLV64_ARRAY_TYPE)
return SLV64_ARRAY_TYPE;
function add_intr_ard_num_ce_array(include_intr : boolean;
ard_id_array : INTEGER_ARRAY_TYPE;
ard_num_ce_array : INTEGER_ARRAY_TYPE)
return INTEGER_ARRAY_TYPE;
function add_intr_ard_dwidth_array(include_intr : boolean;
intr_dwidth : integer;
ard_id_array : INTEGER_ARRAY_TYPE;
ard_dwidth_array : INTEGER_ARRAY_TYPE)
return INTEGER_ARRAY_TYPE;
function log2(x : natural) return integer;
function clog2(x : positive) return natural;
-------------------------------------------------------------------------------
-- Constant Declarations
-------------------------------------------------------------------------------
-------------------------------------------------------------------------------
-- Channel Protocols
-- The constant declarations below give symbolic-name aliases for values that
-- can be used in the C_MCH_PROTOCOL_ARRAY generic of the MCH_OPB_IPIF.
-------------------------------------------------------------------------------
constant XCL : integer := 0;
constant DAG : integer := 1;
--------------------------------------------------------------------------------
-- Address range types.
-- The constant declarations, below, give symbolic-name aliases for values
-- that can be used in the C_ARD_ID_ARRAY generic of IPIFs. The first set
-- gives aliases that are used to include IPIF services.
--------------------------------------------------------------------------------
-- IPIF module aliases
Constant IPIF_INTR : integer := 1;
Constant IPIF_RST : integer := 2;
Constant IPIF_SESR_SEAR : integer := 3;
Constant IPIF_DMA_SG : integer := 4;
Constant IPIF_WRFIFO_REG : integer := 5;
Constant IPIF_WRFIFO_DATA : integer := 6;
Constant IPIF_RDFIFO_REG : integer := 7;
Constant IPIF_RDFIFO_DATA : integer := 8;
Constant IPIF_CHDMA_CHANNELS : integer := 9;
Constant IPIF_CHDMA_GLOBAL_REGS : integer := 10;
Constant CHDMA_STATUS_FIFO : integer := 90;
-- Some predefined user module aliases
Constant USER_00 : integer := 100;
Constant USER_01 : integer := 101;
Constant USER_02 : integer := 102;
Constant USER_03 : integer := 103;
Constant USER_04 : integer := 104;
Constant USER_05 : integer := 105;
Constant USER_06 : integer := 106;
Constant USER_07 : integer := 107;
Constant USER_08 : integer := 108;
Constant USER_09 : integer := 109;
Constant USER_10 : integer := 110;
Constant USER_11 : integer := 111;
Constant USER_12 : integer := 112;
Constant USER_13 : integer := 113;
Constant USER_14 : integer := 114;
Constant USER_15 : integer := 115;
Constant USER_16 : integer := 116;
---( Start of Dependent Properties declarations
--------------------------------------------------------------------------------
-- Declarations for Dependent Properties (properties that depend on the type of
-- the address range, or in other words, address-range-specific parameters).
-- There is one property, i.e. one parameter, encoded as an integer at
-- each index of the properties array. There is one properties array for
-- each address range.
--
-- The C_ARD_DEPENDENT_PROPS_ARRAY generic parameter in (most) IPIFs is such
-- a properties array and it is usually giving its (static) value using a
-- VHDL aggregate construct. (--ToDo, give an example of this.)
--
-- The the "assigned" default value of a dependent property is zero. This value
-- is usually specified the aggregate by leaving its (index) name out so that
-- it is covered by an "others => 0" choice in the aggregate. Some parameters,
-- as noted in the definitions, below, have an "effective" default value that is
-- different from the assigned default value of zero. In such cases, the
-- function, eff_dp, given below, can be used to get the effective value of
-- the dependent property.
--------------------------------------------------------------------------------
constant DEPENDENT_PROPS_SIZE : integer := 32;
subtype DEPENDENT_PROPS_TYPE
is INTEGER_ARRAY_TYPE(0 to DEPENDENT_PROPS_SIZE-1);
type DEPENDENT_PROPS_ARRAY_TYPE
is array (natural range <>) of DEPENDENT_PROPS_TYPE;
--------------------------------------------------------------------------------
-- Below are the indices of dependent properties for the different types of
-- address ranges.
--
-- Example: Let C_ARD_DEPENDENT_PROPS_ARRAY hold the dependent properites
-- for a set of address ranges. Then, e.g.,
--
-- C_ARD_DEPENDENT_PROPS_ARRAY(i)(FIFO_CAPACITY_BITS)
--
-- gives the fifo capacity in bits, provided that the i'th address range
-- is of type IPIF_WRFIFO_DATA or IPIF_RDFIFO_DATA.
--
-- These indices should be referenced only by the names below and never
-- by numerical literals. (The right to change numerical index assignments
-- is reserved; applications using the names will not be affected by such
-- reassignments.)
--------------------------------------------------------------------------------
--
--ToDo, if the interrupt controller parameterization is ever moved to
-- C_ARD_DEPENDENT_PROPS_ARRAY, then the following declarations
-- could be uncommented and used.
---- IPIF_INTR IDX
---------------------------------------------------------------------------- ---
constant EXCLUDE_DEV_ISC : integer := 0;
-- 1 specifies that only the global interrupt
-- enable is present in the device interrupt source
-- controller and that the only source of interrupts
-- in the device is the IP interrupt source controller.
-- 0 specifies that the full device interrupt
-- source controller structure will be included.
constant INCLUDE_DEV_PENCODER : integer := 1;
-- 1 will include the Device IID in the device interrupt
-- source controller, 0 will exclude it.
--
-- IPIF_WRFIFO_DATA or IPIF_RDFIFO_DATA IDX
---------------------------------------------------------------------------- ---
constant FIFO_CAPACITY_BITS : integer := 0;
constant WR_WIDTH_BITS : integer := 1;
constant RD_WIDTH_BITS : integer := 2;
constant EXCLUDE_PACKET_MODE : integer := 3;
-- 1 Don't include packet mode features
-- 0 Include packet mode features
constant EXCLUDE_VACANCY : integer := 4;
-- 1 Don't include vacancy calculation
-- 0 Include vacancy calculation
-- See also the functions
-- bits_needed_for_vac and
-- bits_needed_for_occ that are declared below.
constant INCLUDE_DRE : integer := 5;
constant INCLUDE_AUTOPUSH_POP : integer := 6;
constant AUTOPUSH_POP_CE : integer := 7;
constant INCLUDE_CSUM : integer := 8;
--------------------------------------------------------------------------------
--
-- DMA_SG IDX
---------------------------------------------------------------------------- ---
--------------------------------------------------------------------------------
-- IPIF_CHDMA_CHANNELS IDX
---------------------------------------------------------------------------- ---
constant NUM_SUBS_FOR_PHYS_0 : integer :=0;
constant NUM_SUBS_FOR_PHYS_1 : integer :=1;
constant NUM_SUBS_FOR_PHYS_2 : integer :=2;
constant NUM_SUBS_FOR_PHYS_3 : integer :=3;
constant NUM_SUBS_FOR_PHYS_4 : integer :=4;
constant NUM_SUBS_FOR_PHYS_5 : integer :=5;
constant NUM_SUBS_FOR_PHYS_6 : integer :=6;
constant NUM_SUBS_FOR_PHYS_7 : integer :=7;
constant NUM_SUBS_FOR_PHYS_8 : integer :=8;
constant NUM_SUBS_FOR_PHYS_9 : integer :=9;
constant NUM_SUBS_FOR_PHYS_10 : integer :=10;
constant NUM_SUBS_FOR_PHYS_11 : integer :=11;
constant NUM_SUBS_FOR_PHYS_12 : integer :=12;
constant NUM_SUBS_FOR_PHYS_13 : integer :=13;
constant NUM_SUBS_FOR_PHYS_14 : integer :=14;
constant NUM_SUBS_FOR_PHYS_15 : integer :=15;
-- Gives the number of sub-channels for physical channel i.
--
-- These constants, which will be MAX_NUM_PHYS_CHANNELS in number (see
-- below), have consecutive values starting with 0 for
-- NUM_SUBS_FOR_PHYS_0. (The constants serve the purpose of giving symbolic
-- names for use in the dependent-properties aggregates that parameterize
-- an IPIF_CHDMA_CHANNELS address range.)
--
-- [Users can ignore this note for developers
-- If the number of physical channels changes, both the
-- IPIF_CHDMA_CHANNELS constants and MAX_NUM_PHYS_CHANNELS,
-- below, must be adjusted.
-- (Use of an array constant or a function of the form
-- NUM_SUBS_FOR_PHYS(i) to define the indices
-- runs afoul of LRM restrictions on non-locally static aggregate
-- choices. (Further, the LRM imposes perhaps unnecessarily
-- strict limits on what qualifies as a locally static primary.)
-- Note: This information is supplied for the benefit of anyone seeking
-- to improve the way that these NUM_SUBS_FOR_PHYS parameter
-- indices are defined.)
-- End of note for developers ]
--
-- The value associated with any index NUM_SUBS_FOR_PHYS_i in the
-- dependent-properties array must be even since TX and RX channels
-- come in pairs with the TX followed immediately by
-- the corresponding RX.
--
constant NUM_SIMPLE_DMA_CHANS : integer :=16;
-- The number of simple DMA channels.
constant NUM_SIMPLE_SG_CHANS : integer :=17;
-- The number of simple SG channels.
constant INTR_COALESCE : integer :=18;
-- 0 Interrupt coalescing is disabled
-- 1 Interrupt coalescing is enabled
constant CLK_PERIOD_PS : integer :=19;
-- The period of the OPB Bus clock in ps.
-- The default value of 0 is a special value that
-- is synonymous with 10000 ps (10 ns).
-- The value for CLK_PERIOD_PS is relevant only if (INTR_COALESCE = 1).
constant PACKET_WAIT_UNIT_NS : integer :=20;
-- Gives the unit for used for timing of pack-wait bounds.
-- The default value of 0 is a special value that
-- is synonymous with 1,000,000 ns (1 ms) and a non-default
-- value is typically only used for testing.
-- Relevant only if (INTR_COALESCE = 1).
constant BURST_SIZE : integer :=21;
-- 1, 2, 4, 8 or 16
-- The default value of 0 is a special value that
-- is synonymous with a burst size of 16.
-- Setting the BURST_SIZE to 1 effectively disables
-- bursts.
constant REMAINDER_AS_SINGLES : integer :=22;
-- 0 Remainder handled as a short burst
-- 1 Remainder handled as a series of singles
--------------------------------------------------------------------------------
-- The constant below is not the index of a dependent-properties
-- parameter (and, as such, would never appear as a choice in a
-- dependent-properties aggregate). Rather, it is fixed to the maximum
-- number of physical channels that an Address Range of type
-- IPIF_CHDMA_CHANNELS supports. It must be maintained in conjuction with
-- the constants named, e.g., NUM_SUBS_FOR_PHYS_15, above.
--------------------------------------------------------------------------------
constant MAX_NUM_PHYS_CHANNELS : natural := 16;
--------------------------------------------------------------------------
-- EXAMPLE: Here is an example dependent-properties aggregate for an
-- address range of type IPIF_CHDMA_CHANNELS.
-- To have a compact list of all of the CHDMA parameters, all are
-- shown, however three are commented out and the unneeded
-- MUM_SUBS_FOR_PHYS_x are excluded. The "OTHERS => 0" association
-- gives these parameters their default values, such that, for the example
--
-- - All physical channels above 2 have zero subchannels (effectively,
-- these physical channels are not used)
-- - There are no simple SG channels
-- - The packet-wait time unit is 1 ms
-- - Burst size is 16
--------------------------------------------------------------------------
-- (
-- NUM_SUBS_FOR_PHYS_0 => 8,
-- NUM_SUBS_FOR_PHYS_1 => 4,
-- NUM_SUBS_FOR_PHYS_2 => 14,
-- NUM_SIMPLE_DMA_CHANS => 1,
-- --NUM_SIMPLE_SG_CHANS => 5,
-- INTR_COALESCE => 1,
-- CLK_PERIOD_PS => 20000,
-- --PACKET_WAIT_UNIT_NS => 50000,
-- --BURST_SIZE => 1,
-- REMAINDER_AS_SINGLES => 1,
-- OTHERS => 0
-- )
--
--------------------------------------------------------------------------------
--------------------------------------------------------------------------------
-- Calculates the number of bits needed to convey the vacancy (emptiness) of
-- the fifo described by dependent_props, if fifo_present. If not fifo_present,
-- returns 0 (or the smallest value allowed by tool limitations on null arrays)
-- without making reference to dependent_props.
--------------------------------------------------------------------------------
function bits_needed_for_vac(
fifo_present: boolean;
dependent_props : DEPENDENT_PROPS_TYPE
) return integer;
--------------------------------------------------------------------------------
-- Calculates the number of bits needed to convey the occupancy (fullness) of
-- the fifo described by dependent_props, if fifo_present. If not fifo_present,
-- returns 0 (or the smallest value allowed by tool limitations on null arrays)
-- without making reference to dependent_props.
--------------------------------------------------------------------------------
function bits_needed_for_occ(
fifo_present: boolean;
dependent_props : DEPENDENT_PROPS_TYPE
) return integer;
--------------------------------------------------------------------------------
-- Function eff_dp.
--
-- For some of the dependent properties, the default value of zero is meant
-- to imply an effective default value of other than zero (see e.g.
-- PKT_WAIT_UNIT_NS for the IPIF_CHDMA_CHANNELS address-range type). The
-- following function is used to get the (possibly default-adjusted)
-- value for a dependent property.
--
-- Example call:
--
-- eff_value_of_param :=
-- eff_dp(
-- C_IPIF_CHDMA_CHANNELS,
-- PACKET_WAIT_UNIT_NS,
-- C_ARD_DEPENDENT_PROPS_ARRAY(i)(PACKET_WAIT_UNIT_NS)
-- );
--
-- where C_ARD_DEPENDENT_PROPS_ARRAY(i) is an object of type
-- DEPENDENT_PROPS_ARRAY_TYPE, that was parameterized for an address range of
-- type C_IPIF_CHDMA_CHANNELS.
--------------------------------------------------------------------------------
function eff_dp(id : integer; -- The type of address range.
dep_prop : integer; -- The index of the dependent prop.
value : integer -- The value at that index.
) return integer; -- The effective value, possibly adjusted
-- if value has the default value of 0.
---) End of Dependent Properties declarations
--------------------------------------------------------------------------------
-- Declarations for Common Properties (properties that apply regardless of the
-- type of the address range). Structurally, these work the same as
-- the dependent properties.
--------------------------------------------------------------------------------
constant COMMON_PROPS_SIZE : integer := 2;
subtype COMMON_PROPS_TYPE
is INTEGER_ARRAY_TYPE(0 to COMMON_PROPS_SIZE-1);
type COMMON_PROPS_ARRAY_TYPE
is array (natural range <>) of COMMON_PROPS_TYPE;
--------------------------------------------------------------------------------
-- Below are the indices of the common properties.
--
-- These indices should be referenced only by the names below and never
-- by numerical literals.
-- IDX
---------------------------------------------------------------------------- ---
constant KEYHOLE_BURST : integer := 0;
-- 1 All addresses of a burst are forced to the initial
-- address of the burst.
-- 0 Burst addresses follow the bus protocol.
-- IP interrupt mode array constants
Constant INTR_PASS_THRU : integer := 1;
Constant INTR_PASS_THRU_INV : integer := 2;
Constant INTR_REG_EVENT : integer := 3;
Constant INTR_REG_EVENT_INV : integer := 4;
Constant INTR_POS_EDGE_DETECT : integer := 5;
Constant INTR_NEG_EDGE_DETECT : integer := 6;
end ipif_pkg;
package body ipif_pkg is
-------------------------------------------------------------------------------
-- Function log2 -- returns number of bits needed to encode x choices
-- x = 0 returns 0
-- x = 1 returns 0
-- x = 2 returns 1
-- x = 4 returns 2, etc.
-------------------------------------------------------------------------------
--
function log2(x : natural) return integer is
variable i : integer := 0;
variable val: integer := 1;
begin
if x = 0 then return 0;
else
for j in 0 to 29 loop -- for loop for XST
if val >= x then null;
else
i := i+1;
val := val*2;
end if;
end loop;
-- Fix per CR520627 XST was ignoring this anyway and printing a
-- Warning in SRP file. This will get rid of the warning and not
-- impact simulation.
-- synthesis translate_off
assert val >= x
report "Function log2 received argument larger" &
" than its capability of 2^30. "
severity failure;
-- synthesis translate_on
return i;
end if;
end function log2;
--------------------------------------------------------------------------------
-- Function clog2 - returns the integer ceiling of the base 2 logarithm of x,
-- i.e., the least integer greater than or equal to log2(x).
--------------------------------------------------------------------------------
function clog2(x : positive) return natural is
variable r : natural := 0;
variable rp : natural := 1; -- rp tracks the value 2**r
begin
while rp < x loop -- Termination condition T: x <= 2**r
-- Loop invariant L: 2**(r-1) < x
r := r + 1;
if rp > integer'high - rp then exit; end if; -- If doubling rp overflows
-- the integer range, the doubled value would exceed x, so safe to exit.
rp := rp + rp;
end loop;
-- L and T <-> 2**(r-1) < x <= 2**r <-> (r-1) < log2(x) <= r
return r; --
end clog2;
-------------------------------------------------------------------------------
-- Function Definitions
-------------------------------------------------------------------------------
-----------------------------------------------------------------------------
-- Function "="
--
-- This function can be used to overload the "=" operator when comparing
-- strings.
-----------------------------------------------------------------------------
function "=" (s1: in string; s2: in string) return boolean is
constant tc: character := ' '; -- string termination character
variable i: integer := 1;
variable v1 : string(1 to s1'length) := s1;
variable v2 : string(1 to s2'length) := s2;
begin
while (i <= v1'length) and (v1(i) /= tc) and
(i <= v2'length) and (v2(i) /= tc) and
(v1(i) = v2(i))
loop
i := i+1;
end loop;
return ((i > v1'length) or (v1(i) = tc)) and
((i > v2'length) or (v2(i) = tc));
end;
----------------------------------------------------------------------------
-- Function equaluseCase
--
-- This function returns true if case sensitive string comparison determines
-- that str1 and str2 are the same.
-----------------------------------------------------------------------------
FUNCTION equaluseCase( str1, str2 : STRING ) RETURN BOOLEAN IS
CONSTANT len1 : INTEGER := str1'length;
CONSTANT len2 : INTEGER := str2'length;
VARIABLE equal : BOOLEAN := TRUE;
BEGIN
IF NOT (len1=len2) THEN
equal := FALSE;
ELSE
FOR i IN str1'range LOOP
IF NOT (str1(i) = str2(i)) THEN
equal := FALSE;
END IF;
END LOOP;
END IF;
RETURN equal;
END equaluseCase;
-----------------------------------------------------------------------------
-- Function calc_num_ce
--
-- This function is used to process the array specifying the number of Chip
-- Enables required for a Base Address specification. The array is input to
-- the function and an integer is returned reflecting the total number of
-- Chip Enables required for the CE, RdCE, and WrCE Buses
-----------------------------------------------------------------------------
function calc_num_ce (ce_num_array : INTEGER_ARRAY_TYPE) return integer is
Variable ce_num_sum : integer := 0;
begin
for i in 0 to (ce_num_array'length)-1 loop
ce_num_sum := ce_num_sum + ce_num_array(i);
End loop;
return(ce_num_sum);
end function calc_num_ce;
-----------------------------------------------------------------------------
-- Function calc_start_ce_index
--
-- This function is used to process the array specifying the number of Chip
-- Enables required for a Base Address specification. The CE Size array is
-- input to the function and an integer index representing the index of the
-- target module in the ce_num_array. An integer is returned reflecting the
-- starting index of the assigned Chip Enables within the CE, RdCE, and
-- WrCE Buses.
-----------------------------------------------------------------------------
function calc_start_ce_index (ce_num_array : INTEGER_ARRAY_TYPE;
index : integer) return integer is
Variable ce_num_sum : integer := 0;
begin
If (index = 0) Then
ce_num_sum := 0;
else
for i in 0 to index-1 loop
ce_num_sum := ce_num_sum + ce_num_array(i);
End loop;
End if;
return(ce_num_sum);
end function calc_start_ce_index;
-----------------------------------------------------------------------------
-- Function get_min_dwidth
--
-- This function is used to process the array specifying the data bus width
-- for each of the target modules. The dwidth_array is input to the function
-- and an integer is returned that is the smallest value found of all the
-- entries in the array.
-----------------------------------------------------------------------------
function get_min_dwidth (dwidth_array: INTEGER_ARRAY_TYPE) return integer is
Variable temp_min : Integer := 1024;
begin
for i in 0 to dwidth_array'length-1 loop
If (dwidth_array(i) < temp_min) Then
temp_min := dwidth_array(i);
else
null;
End if;
End loop;
return(temp_min);
end function get_min_dwidth;
-----------------------------------------------------------------------------
-- Function get_max_dwidth
--
-- This function is used to process the array specifying the data bus width
-- for each of the target modules. The dwidth_array is input to the function
-- and an integer is returned that is the largest value found of all the
-- entries in the array.
-----------------------------------------------------------------------------
function get_max_dwidth (dwidth_array: INTEGER_ARRAY_TYPE) return integer is
Variable temp_max : Integer := 0;
begin
for i in 0 to dwidth_array'length-1 loop
If (dwidth_array(i) > temp_max) Then
temp_max := dwidth_array(i);
else
null;
End if;
End loop;
return(temp_max);
end function get_max_dwidth;
-----------------------------------------------------------------------------
-- Function S32
--
-- This function is used to expand an input string to 32 characters by
-- padding with spaces. If the input string is larger than 32 characters,
-- it will truncate to 32 characters.
-----------------------------------------------------------------------------
function S32 (in_string : string) return string is
constant OUTPUT_STRING_LENGTH : integer := 32;
Constant space : character := ' ';
variable new_string : string(1 to 32);
Variable start_index : Integer := in_string'length+1;
begin
If (in_string'length < OUTPUT_STRING_LENGTH) Then
for i in 1 to in_string'length loop
new_string(i) := in_string(i);
End loop;
for j in start_index to OUTPUT_STRING_LENGTH loop
new_string(j) := space;
End loop;
else -- use first 32 chars of in_string (truncate the rest)
for k in 1 to OUTPUT_STRING_LENGTH loop
new_string(k) := in_string(k);
End loop;
End if;
return(new_string);
end function S32;
-----------------------------------------------------------------------------
-- Function get_id_index
--
-- This function is used to process the array specifying the target function
-- assigned to a Base Address pair address range. The id_array and a
-- id number is input to the function. A integer is returned reflecting the
-- array index of the id matching the id input number. This function
-- should only be called if the id number is known to exist in the
-- name_array input. This can be detirmined by using the find_ard_id
-- function.
-----------------------------------------------------------------------------
function get_id_index (id_array :INTEGER_ARRAY_TYPE;
id : integer) return integer is
Variable match : Boolean := false;
Variable match_index : Integer := 10000; -- a really big number!
begin
for array_index in 0 to id_array'length-1 loop
If (match = true) Then -- match already found so do nothing
null;
else -- compare the numbers one by one
match := (id_array(array_index) = id);
If (match) Then
match_index := array_index;
else
null;
End if;
End if;
End loop;
return(match_index);
end function get_id_index;
--------------------------------------------------------------------------------
-- get_id_index but return a value in bounds on error (iboe).
--
-- This function is the same as get_id_index, except that when id does
-- not exist in id_array, the value returned is any index that is
-- within the index range of id_array.
--
-- This function would normally only be used where function find_ard_id
-- is used to establish the existence of id but, even when non-existent,
-- an element of one of the ARD arrays will be computed from the
-- returned get_id_index_iboe value. See, e.g., function bits_needed_for_vac
-- and the example call, below
--
-- bits_needed_for_vac(
-- find_ard_id(C_ARD_ID_ARRAY, IPIF_RDFIFO_DATA),
-- C_ARD_DEPENDENT_PROPS_ARRAY(get_id_index_iboe(C_ARD_ID_ARRAY,
-- IPIF_RDFIFO_DATA))
-- )
--------------------------------------------------------------------------------
function get_id_index_iboe (id_array :INTEGER_ARRAY_TYPE;
id : integer) return integer is
Variable match : Boolean := false;
Variable match_index : Integer := id_array'left; -- any valid array index
begin
for array_index in 0 to id_array'length-1 loop
If (match = true) Then -- match already found so do nothing
null;
else -- compare the numbers one by one
match := (id_array(array_index) = id);
If (match) Then match_index := array_index;
else null;
End if;
End if;
End loop;
return(match_index);
end function get_id_index_iboe;
-----------------------------------------------------------------------------
-- Function find_ard_id
--
-- This function is used to process the array specifying the target function
-- assigned to a Base Address pair address range. The id_array and a
-- integer id is input to the function. A boolean is returned reflecting the
-- presence (or not) of a number in the array matching the id input number.
-----------------------------------------------------------------------------
function find_ard_id (id_array : INTEGER_ARRAY_TYPE;
id : integer) return boolean is
Variable match : Boolean := false;
begin
for array_index in 0 to id_array'length-1 loop
If (match = true) Then -- match already found so do nothing
null;
else -- compare the numbers one by one
match := (id_array(array_index) = id);
End if;
End loop;
return(match);
end function find_ard_id;
-----------------------------------------------------------------------------
-- Function find_id_dwidth
--
-- This function is used to find the data width of a target module. If the
-- target module exists, the data width is extracted from the input dwidth
-- array. If the module is not in the ID array, the default input is
-- returned. This function is needed to assign data port size constraints on
-- unconstrained port widths.
-----------------------------------------------------------------------------
function find_id_dwidth (id_array : INTEGER_ARRAY_TYPE;
dwidth_array: INTEGER_ARRAY_TYPE;
id : integer;
default : integer) return integer is
Variable id_present : Boolean := false;
Variable array_index : Integer := 0;
Variable dwidth : Integer := default;
begin
id_present := find_ard_id(id_array, id);
If (id_present) Then
array_index := get_id_index (id_array, id);
dwidth := dwidth_array(array_index);
else
null; -- use default input
End if;
Return (dwidth);
end function find_id_dwidth;
-----------------------------------------------------------------------------
-- Function cnt_ipif_id_blks
--
-- This function is used to detirmine the number of IPIF components specified
-- in the ARD ID Array. An integer is returned representing the number
-- of elements counted. User IDs are ignored in the counting process.
-----------------------------------------------------------------------------
function cnt_ipif_id_blks (id_array : INTEGER_ARRAY_TYPE)
return integer is
Variable blk_count : integer := 0;
Variable temp_id : integer;
begin
for array_index in 0 to id_array'length-1 loop
temp_id := id_array(array_index);
If (temp_id = IPIF_WRFIFO_DATA or
temp_id = IPIF_RDFIFO_DATA or
temp_id = IPIF_RST or
temp_id = IPIF_INTR or
temp_id = IPIF_DMA_SG or
temp_id = IPIF_SESR_SEAR
) Then -- IPIF block found
blk_count := blk_count+1;
else -- go to next loop iteration
null;
End if;
End loop;
return(blk_count);
end function cnt_ipif_id_blks;
-----------------------------------------------------------------------------
-- Function get_ipif_id_dbus_index
--
-- This function is used to detirmine the IPIF relative index of a given
-- ID value. User IDs are ignored in the index detirmination.
-----------------------------------------------------------------------------
function get_ipif_id_dbus_index (id_array : INTEGER_ARRAY_TYPE;
id : integer)
return integer is
Variable blk_index : integer := 0;
Variable temp_id : integer;
Variable id_found : Boolean := false;
begin
for array_index in 0 to id_array'length-1 loop
temp_id := id_array(array_index);
If (id_found) then
null;
elsif (temp_id = id) then
id_found := true;
elsif (temp_id = IPIF_WRFIFO_DATA or
temp_id = IPIF_RDFIFO_DATA or
temp_id = IPIF_RST or
temp_id = IPIF_INTR or
temp_id = IPIF_DMA_SG or
temp_id = IPIF_SESR_SEAR
) Then -- IPIF block found
blk_index := blk_index+1;
else -- user block so do nothing
null;
End if;
End loop;
return(blk_index);
end function get_ipif_id_dbus_index;
------------------------------------------------------------------------------
-- Function: rebuild_slv32_array
--
-- Description:
-- This function takes an input slv32 array and rebuilds an output slv32
-- array composed of the first "num_valid_entry" elements from the input
-- array.
------------------------------------------------------------------------------
function rebuild_slv32_array (slv32_array : SLV32_ARRAY_TYPE;
num_valid_pairs : integer)
return SLV32_ARRAY_TYPE is
--Constants
constant num_elements : Integer := num_valid_pairs * 2;
-- Variables
variable temp_baseaddr32_array : SLV32_ARRAY_TYPE( 0 to num_elements-1);
begin
for array_index in 0 to num_elements-1 loop
temp_baseaddr32_array(array_index) := slv32_array(array_index);
end loop;
return(temp_baseaddr32_array);
end function rebuild_slv32_array;
------------------------------------------------------------------------------
-- Function: rebuild_slv64_array
--
-- Description:
-- This function takes an input slv64 array and rebuilds an output slv64
-- array composed of the first "num_valid_entry" elements from the input
-- array.
------------------------------------------------------------------------------
function rebuild_slv64_array (slv64_array : SLV64_ARRAY_TYPE;
num_valid_pairs : integer)
return SLV64_ARRAY_TYPE is
--Constants
constant num_elements : Integer := num_valid_pairs * 2;
-- Variables
variable temp_baseaddr64_array : SLV64_ARRAY_TYPE( 0 to num_elements-1);
begin
for array_index in 0 to num_elements-1 loop
temp_baseaddr64_array(array_index) := slv64_array(array_index);
end loop;
return(temp_baseaddr64_array);
end function rebuild_slv64_array;
------------------------------------------------------------------------------
-- Function: rebuild_int_array
--
-- Description:
-- This function takes an input integer array and rebuilds an output integer
-- array composed of the first "num_valid_entry" elements from the input
-- array.
------------------------------------------------------------------------------
function rebuild_int_array (int_array : INTEGER_ARRAY_TYPE;
num_valid_entry : integer)
return INTEGER_ARRAY_TYPE is
-- Variables
variable temp_int_array : INTEGER_ARRAY_TYPE( 0 to num_valid_entry-1);
begin
for array_index in 0 to num_valid_entry-1 loop
temp_int_array(array_index) := int_array(array_index);
end loop;
return(temp_int_array);
end function rebuild_int_array;
function bits_needed_for_vac(
fifo_present: boolean;
dependent_props : DEPENDENT_PROPS_TYPE
) return integer is
begin
if not fifo_present then
return 1; -- Zero would be better but leads to "0 to -1" null
-- ranges that are not handled by XST Flint or earlier
-- because of the negative index.
else
return
log2(1 + dependent_props(FIFO_CAPACITY_BITS) /
dependent_props(RD_WIDTH_BITS)
);
end if;
end function bits_needed_for_vac;
function bits_needed_for_occ(
fifo_present: boolean;
dependent_props : DEPENDENT_PROPS_TYPE
) return integer is
begin
if not fifo_present then
return 1; -- Zero would be better but leads to "0 to -1" null
-- ranges that are not handled by XST Flint or earlier
-- because of the negative index.
else
return
log2(1 + dependent_props(FIFO_CAPACITY_BITS) /
dependent_props(WR_WIDTH_BITS)
);
end if;
end function bits_needed_for_occ;
function eff_dp(id : integer;
dep_prop : integer;
value : integer) return integer is
variable dp : integer := dep_prop;
type bo2na_type is array (boolean) of natural;
constant bo2na : bo2na_type := (0, 1);
begin
if value /= 0 then return value; end if; -- Not default
case id is
when IPIF_CHDMA_CHANNELS =>
-------------------
return( bo2na(dp = CLK_PERIOD_PS ) * 10000
+ bo2na(dp = PACKET_WAIT_UNIT_NS ) * 1000000
+ bo2na(dp = BURST_SIZE ) * 16
);
when others => return 0;
end case;
end eff_dp;
function populate_intr_mode_array (num_user_intr : integer;
intr_capture_mode : integer)
return INTEGER_ARRAY_TYPE is
variable intr_mode_array : INTEGER_ARRAY_TYPE(0 to num_user_intr-1);
begin
for i in 0 to num_user_intr-1 loop
intr_mode_array(i) := intr_capture_mode;
end loop;
return intr_mode_array;
end function populate_intr_mode_array;
function add_intr_ard_id_array(include_intr : boolean;
ard_id_array : INTEGER_ARRAY_TYPE)
return INTEGER_ARRAY_TYPE is
variable intr_ard_id_array : INTEGER_ARRAY_TYPE(0 to ard_id_array'length);
begin
intr_ard_id_array(0 to ard_id_array'length-1) := ard_id_array;
if include_intr then
intr_ard_id_array(ard_id_array'length) := IPIF_INTR;
return intr_ard_id_array;
else
return ard_id_array;
end if;
end function add_intr_ard_id_array;
function add_intr_ard_addr_range_array(include_intr : boolean;
ZERO_ADDR_PAD : std_logic_vector;
intr_baseaddr : std_logic_vector;
intr_highaddr : std_logic_vector;
ard_id_array : INTEGER_ARRAY_TYPE;
ard_addr_range_array : SLV64_ARRAY_TYPE)
return SLV64_ARRAY_TYPE is
variable intr_ard_addr_range_array : SLV64_ARRAY_TYPE(0 to ard_addr_range_array'length+1);
begin
intr_ard_addr_range_array(0 to ard_addr_range_array'length-1) := ard_addr_range_array;
if include_intr then
intr_ard_addr_range_array(2*get_id_index(ard_id_array,IPIF_INTR))
:= ZERO_ADDR_PAD & intr_baseaddr;
intr_ard_addr_range_array(2*get_id_index(ard_id_array,IPIF_INTR)+1)
:= ZERO_ADDR_PAD & intr_highaddr;
return intr_ard_addr_range_array;
else
return ard_addr_range_array;
end if;
end function add_intr_ard_addr_range_array;
function add_intr_ard_dwidth_array(include_intr : boolean;
intr_dwidth : integer;
ard_id_array : INTEGER_ARRAY_TYPE;
ard_dwidth_array : INTEGER_ARRAY_TYPE)
return INTEGER_ARRAY_TYPE is
variable intr_ard_dwidth_array : INTEGER_ARRAY_TYPE(0 to ard_dwidth_array'length);
begin
intr_ard_dwidth_array(0 to ard_dwidth_array'length-1) := ard_dwidth_array;
if include_intr then
intr_ard_dwidth_array(get_id_index(ard_id_array, IPIF_INTR)) := intr_dwidth;
return intr_ard_dwidth_array;
else
return ard_dwidth_array;
end if;
end function add_intr_ard_dwidth_array;
function add_intr_ard_num_ce_array(include_intr : boolean;
ard_id_array : INTEGER_ARRAY_TYPE;
ard_num_ce_array : INTEGER_ARRAY_TYPE)
return INTEGER_ARRAY_TYPE is
variable intr_ard_num_ce_array : INTEGER_ARRAY_TYPE(0 to ard_num_ce_array'length);
begin
intr_ard_num_ce_array(0 to ard_num_ce_array'length-1) := ard_num_ce_array;
if include_intr then
intr_ard_num_ce_array(get_id_index(ard_id_array, IPIF_INTR)) := 16;
return intr_ard_num_ce_array;
else
return ard_num_ce_array;
end if;
end function add_intr_ard_num_ce_array;
end package body ipif_pkg;
|
-- IPIF Common Library Package
-------------------------------------------------------------------------------
--
-- *************************************************************************
-- ** **
-- ** DISCLAIMER OF LIABILITY **
-- ** **
-- ** This text/file contains proprietary, confidential **
-- ** information of Xilinx, Inc., is distributed under **
-- ** license from Xilinx, Inc., and may be used, copied **
-- ** and/or disclosed only pursuant to the terms of a valid **
-- ** license agreement with Xilinx, Inc. Xilinx hereby **
-- ** grants you a license to use this text/file solely for **
-- ** design, simulation, implementation and creation of **
-- ** design files limited to Xilinx devices or technologies. **
-- ** Use with non-Xilinx devices or technologies is expressly **
-- ** prohibited and immediately terminates your license unless **
-- ** covered by a separate agreement. **
-- ** **
-- ** Xilinx is providing this design, code, or information **
-- ** "as-is" solely for use in developing programs and **
-- ** solutions for Xilinx devices, with no obligation on the **
-- ** part of Xilinx to provide support. By providing this design, **
-- ** code, or information as one possible implementation of **
-- ** this feature, application or standard, Xilinx is making no **
-- ** representation that this implementation is free from any **
-- ** claims of infringement. You are responsible for obtaining **
-- ** any rights you may require for your implementation. **
-- ** Xilinx expressly disclaims any warranty whatsoever with **
-- ** respect to the adequacy of the implementation, including **
-- ** but not limited to any warranties or representations that this **
-- ** implementation is free from claims of infringement, implied **
-- ** warranties of merchantability or fitness for a particular **
-- ** purpose. **
-- ** **
-- ** Xilinx products are not intended for use in life support **
-- ** appliances, devices, or systems. Use in such applications is **
-- ** expressly prohibited. **
-- ** **
-- ** Any modifications that are made to the Source Code are **
-- ** done at the users sole risk and will be unsupported. **
-- ** The Xilinx Support Hotline does not have access to source **
-- ** code and therefore cannot answer specific questions related **
-- ** to source HDL. The Xilinx Hotline support of original source **
-- ** code IP shall only address issues and questions related **
-- ** to the standard Netlist version of the core (and thus **
-- ** indirectly, the original core source). **
-- ** **
-- ** Copyright (c) 2002-2010 Xilinx, Inc. All rights reserved. **
-- ** **
-- ** This copyright and support notice must be retained as part **
-- ** of this text at all times. **
-- ** **
-- *************************************************************************
--
-------------------------------------------------------------------------------
-- Filename: ipif_pkg.vhd
-- Version: Intital
-- Description: This file contains the constants and functions used in the
-- ipif common library components.
--
-------------------------------------------------------------------------------
-- Structure:
--
-------------------------------------------------------------------------------
-- Author: DET
-- History:
-- DET 02/21/02 -- Created from proc_common_pkg.vhd
--
-- DET 03/13/02 -- PLB IPIF development updates
-- ^^^^^^
-- - Commented out string types and string functions due to an XST
-- problem with string arrays and functions. THe string array
-- processing functions were replaced with comperable functions
-- operating on integer arrays.
-- ~~~~~~
--
--
-- DET 4/30/2002 Initial
-- ~~~~~~
-- - Added three functions: rebuild_slv32_array, rebuild_slv64_array, and
-- rebuild_int_array to support removal of unused elements from the
-- ARD arrays.
-- ^^^^^^ --
--
-- FLO 8/12/2002
-- ~~~~~~
-- - Added three functions: bits_needed_for_vac, bits_needed_for_occ,
-- and get_id_index_iboe.
-- (Removed provisional functions bits_needed_for_vacancy,
-- bits needed_for_occupancy, and bits_needed_for.)
-- ^^^^^^
--
-- FLO 3/24/2003
-- ~~~~~~
-- - Added dependent property paramters for channelized DMA.
-- - Added common property parameter array type.
-- - Definded the KEYHOLD_BURST common-property parameter.
-- ^^^^^^
--
-- FLO 10/22/2003
-- ~~~~~~
-- - Some adjustment to CHDMA parameterization.
-- - Cleanup of obsolete code and comments. (The former "XST workaround"
-- has become the officially deployed method.)
-- ^^^^^^
--
-- LSS 03/24/2004
-- ~~~~~~
-- - Added 5 functions
-- ^^^^^^
--
-- ALS 09/03/04
-- ^^^^^^
-- -- Added constants to describe the channel protocols used in MCH_OPB_IPIF
-- ~~~~~~
--
-- DET 1/17/2008 v4_0
-- ~~~~~~
-- - Changed proc_common library version to v4_0
-- - Incorporated new disclaimer header
-- ^^^^^^
--
-------------------------------------------------------------------------------
-- Naming Conventions:
-- active low signals: "*_n"
-- clock signals: "clk", "clk_div#", "clk_#x"
-- reset signals: "rst", "rst_n"
-- generics: "C_*"
-- user defined types: "*_TYPE"
-- state machine next state: "*_ns"
-- state machine current state: "*_cs"
-- combinatorial signals: "*_com"
-- pipelined or register delay signals: "*_d#"
-- counter signals: "*cnt*"
-- clock enable signals: "*_ce"
-- internal version of output port "*_i"
-- device pins: "*_pin"
-- ports: - Names begin with Uppercase
-- processes: "*_PROCESS"
-- component instantiations: "<ENTITY_>I_<#|FUNC>
-------------------------------------------------------------------------------
library ieee;
use ieee.std_logic_1164.all;
-- need conversion function to convert reals/integers to std logic vectors
use ieee.std_logic_arith.all;
use ieee.std_logic_arith.all;
use ieee.std_logic_unsigned.all;
package ipif_pkg is
-------------------------------------------------------------------------------
-- Type Declarations
-------------------------------------------------------------------------------
type SLV32_ARRAY_TYPE is array (natural range <>) of std_logic_vector(0 to 31);
subtype SLV64_TYPE is std_logic_vector(0 to 63);
type SLV64_ARRAY_TYPE is array (natural range <>) of SLV64_TYPE;
type INTEGER_ARRAY_TYPE is array (natural range <>) of integer;
-------------------------------------------------------------------------------
-- Function and Procedure Declarations
-------------------------------------------------------------------------------
function "=" (s1: in string; s2: in string) return boolean;
function equaluseCase( str1, str2 : STRING ) RETURN BOOLEAN;
function calc_num_ce (ce_num_array : INTEGER_ARRAY_TYPE) return integer;
function calc_start_ce_index (ce_num_array : INTEGER_ARRAY_TYPE;
index : integer) return integer;
function get_min_dwidth (dwidth_array: INTEGER_ARRAY_TYPE) return integer;
function get_max_dwidth (dwidth_array: INTEGER_ARRAY_TYPE) return integer;
function S32 (in_string : string) return string;
--------------------------------------------------------------------------------
-- ARD support functions.
-- These function can be useful when operating with the ARD parameterization.
--------------------------------------------------------------------------------
function get_id_index (id_array :INTEGER_ARRAY_TYPE;
id : integer)
return integer;
function get_id_index_iboe (id_array :INTEGER_ARRAY_TYPE;
id : integer)
return integer;
function find_ard_id (id_array : INTEGER_ARRAY_TYPE;
id : integer) return boolean;
function find_id_dwidth (id_array : INTEGER_ARRAY_TYPE;
dwidth_array: INTEGER_ARRAY_TYPE;
id : integer;
default : integer)
return integer;
function cnt_ipif_id_blks (id_array : INTEGER_ARRAY_TYPE) return integer;
function get_ipif_id_dbus_index (id_array : INTEGER_ARRAY_TYPE;
id : integer)
return integer ;
function rebuild_slv32_array (slv32_array : SLV32_ARRAY_TYPE;
num_valid_pairs : integer)
return SLV32_ARRAY_TYPE;
function rebuild_slv64_array (slv64_array : SLV64_ARRAY_TYPE;
num_valid_pairs : integer)
return SLV64_ARRAY_TYPE;
function rebuild_int_array (int_array : INTEGER_ARRAY_TYPE;
num_valid_entry : integer)
return INTEGER_ARRAY_TYPE;
-- 5 Functions Added 3/24/04
function populate_intr_mode_array (num_user_intr : integer;
intr_capture_mode : integer)
return INTEGER_ARRAY_TYPE ;
function add_intr_ard_id_array(include_intr : boolean;
ard_id_array : INTEGER_ARRAY_TYPE)
return INTEGER_ARRAY_TYPE;
function add_intr_ard_addr_range_array(include_intr : boolean;
ZERO_ADDR_PAD : std_logic_vector;
intr_baseaddr : std_logic_vector;
intr_highaddr : std_logic_vector;
ard_id_array : INTEGER_ARRAY_TYPE;
ard_addr_range_array : SLV64_ARRAY_TYPE)
return SLV64_ARRAY_TYPE;
function add_intr_ard_num_ce_array(include_intr : boolean;
ard_id_array : INTEGER_ARRAY_TYPE;
ard_num_ce_array : INTEGER_ARRAY_TYPE)
return INTEGER_ARRAY_TYPE;
function add_intr_ard_dwidth_array(include_intr : boolean;
intr_dwidth : integer;
ard_id_array : INTEGER_ARRAY_TYPE;
ard_dwidth_array : INTEGER_ARRAY_TYPE)
return INTEGER_ARRAY_TYPE;
function log2(x : natural) return integer;
function clog2(x : positive) return natural;
-------------------------------------------------------------------------------
-- Constant Declarations
-------------------------------------------------------------------------------
-------------------------------------------------------------------------------
-- Channel Protocols
-- The constant declarations below give symbolic-name aliases for values that
-- can be used in the C_MCH_PROTOCOL_ARRAY generic of the MCH_OPB_IPIF.
-------------------------------------------------------------------------------
constant XCL : integer := 0;
constant DAG : integer := 1;
--------------------------------------------------------------------------------
-- Address range types.
-- The constant declarations, below, give symbolic-name aliases for values
-- that can be used in the C_ARD_ID_ARRAY generic of IPIFs. The first set
-- gives aliases that are used to include IPIF services.
--------------------------------------------------------------------------------
-- IPIF module aliases
Constant IPIF_INTR : integer := 1;
Constant IPIF_RST : integer := 2;
Constant IPIF_SESR_SEAR : integer := 3;
Constant IPIF_DMA_SG : integer := 4;
Constant IPIF_WRFIFO_REG : integer := 5;
Constant IPIF_WRFIFO_DATA : integer := 6;
Constant IPIF_RDFIFO_REG : integer := 7;
Constant IPIF_RDFIFO_DATA : integer := 8;
Constant IPIF_CHDMA_CHANNELS : integer := 9;
Constant IPIF_CHDMA_GLOBAL_REGS : integer := 10;
Constant CHDMA_STATUS_FIFO : integer := 90;
-- Some predefined user module aliases
Constant USER_00 : integer := 100;
Constant USER_01 : integer := 101;
Constant USER_02 : integer := 102;
Constant USER_03 : integer := 103;
Constant USER_04 : integer := 104;
Constant USER_05 : integer := 105;
Constant USER_06 : integer := 106;
Constant USER_07 : integer := 107;
Constant USER_08 : integer := 108;
Constant USER_09 : integer := 109;
Constant USER_10 : integer := 110;
Constant USER_11 : integer := 111;
Constant USER_12 : integer := 112;
Constant USER_13 : integer := 113;
Constant USER_14 : integer := 114;
Constant USER_15 : integer := 115;
Constant USER_16 : integer := 116;
---( Start of Dependent Properties declarations
--------------------------------------------------------------------------------
-- Declarations for Dependent Properties (properties that depend on the type of
-- the address range, or in other words, address-range-specific parameters).
-- There is one property, i.e. one parameter, encoded as an integer at
-- each index of the properties array. There is one properties array for
-- each address range.
--
-- The C_ARD_DEPENDENT_PROPS_ARRAY generic parameter in (most) IPIFs is such
-- a properties array and it is usually giving its (static) value using a
-- VHDL aggregate construct. (--ToDo, give an example of this.)
--
-- The the "assigned" default value of a dependent property is zero. This value
-- is usually specified the aggregate by leaving its (index) name out so that
-- it is covered by an "others => 0" choice in the aggregate. Some parameters,
-- as noted in the definitions, below, have an "effective" default value that is
-- different from the assigned default value of zero. In such cases, the
-- function, eff_dp, given below, can be used to get the effective value of
-- the dependent property.
--------------------------------------------------------------------------------
constant DEPENDENT_PROPS_SIZE : integer := 32;
subtype DEPENDENT_PROPS_TYPE
is INTEGER_ARRAY_TYPE(0 to DEPENDENT_PROPS_SIZE-1);
type DEPENDENT_PROPS_ARRAY_TYPE
is array (natural range <>) of DEPENDENT_PROPS_TYPE;
--------------------------------------------------------------------------------
-- Below are the indices of dependent properties for the different types of
-- address ranges.
--
-- Example: Let C_ARD_DEPENDENT_PROPS_ARRAY hold the dependent properites
-- for a set of address ranges. Then, e.g.,
--
-- C_ARD_DEPENDENT_PROPS_ARRAY(i)(FIFO_CAPACITY_BITS)
--
-- gives the fifo capacity in bits, provided that the i'th address range
-- is of type IPIF_WRFIFO_DATA or IPIF_RDFIFO_DATA.
--
-- These indices should be referenced only by the names below and never
-- by numerical literals. (The right to change numerical index assignments
-- is reserved; applications using the names will not be affected by such
-- reassignments.)
--------------------------------------------------------------------------------
--
--ToDo, if the interrupt controller parameterization is ever moved to
-- C_ARD_DEPENDENT_PROPS_ARRAY, then the following declarations
-- could be uncommented and used.
---- IPIF_INTR IDX
---------------------------------------------------------------------------- ---
constant EXCLUDE_DEV_ISC : integer := 0;
-- 1 specifies that only the global interrupt
-- enable is present in the device interrupt source
-- controller and that the only source of interrupts
-- in the device is the IP interrupt source controller.
-- 0 specifies that the full device interrupt
-- source controller structure will be included.
constant INCLUDE_DEV_PENCODER : integer := 1;
-- 1 will include the Device IID in the device interrupt
-- source controller, 0 will exclude it.
--
-- IPIF_WRFIFO_DATA or IPIF_RDFIFO_DATA IDX
---------------------------------------------------------------------------- ---
constant FIFO_CAPACITY_BITS : integer := 0;
constant WR_WIDTH_BITS : integer := 1;
constant RD_WIDTH_BITS : integer := 2;
constant EXCLUDE_PACKET_MODE : integer := 3;
-- 1 Don't include packet mode features
-- 0 Include packet mode features
constant EXCLUDE_VACANCY : integer := 4;
-- 1 Don't include vacancy calculation
-- 0 Include vacancy calculation
-- See also the functions
-- bits_needed_for_vac and
-- bits_needed_for_occ that are declared below.
constant INCLUDE_DRE : integer := 5;
constant INCLUDE_AUTOPUSH_POP : integer := 6;
constant AUTOPUSH_POP_CE : integer := 7;
constant INCLUDE_CSUM : integer := 8;
--------------------------------------------------------------------------------
--
-- DMA_SG IDX
---------------------------------------------------------------------------- ---
--------------------------------------------------------------------------------
-- IPIF_CHDMA_CHANNELS IDX
---------------------------------------------------------------------------- ---
constant NUM_SUBS_FOR_PHYS_0 : integer :=0;
constant NUM_SUBS_FOR_PHYS_1 : integer :=1;
constant NUM_SUBS_FOR_PHYS_2 : integer :=2;
constant NUM_SUBS_FOR_PHYS_3 : integer :=3;
constant NUM_SUBS_FOR_PHYS_4 : integer :=4;
constant NUM_SUBS_FOR_PHYS_5 : integer :=5;
constant NUM_SUBS_FOR_PHYS_6 : integer :=6;
constant NUM_SUBS_FOR_PHYS_7 : integer :=7;
constant NUM_SUBS_FOR_PHYS_8 : integer :=8;
constant NUM_SUBS_FOR_PHYS_9 : integer :=9;
constant NUM_SUBS_FOR_PHYS_10 : integer :=10;
constant NUM_SUBS_FOR_PHYS_11 : integer :=11;
constant NUM_SUBS_FOR_PHYS_12 : integer :=12;
constant NUM_SUBS_FOR_PHYS_13 : integer :=13;
constant NUM_SUBS_FOR_PHYS_14 : integer :=14;
constant NUM_SUBS_FOR_PHYS_15 : integer :=15;
-- Gives the number of sub-channels for physical channel i.
--
-- These constants, which will be MAX_NUM_PHYS_CHANNELS in number (see
-- below), have consecutive values starting with 0 for
-- NUM_SUBS_FOR_PHYS_0. (The constants serve the purpose of giving symbolic
-- names for use in the dependent-properties aggregates that parameterize
-- an IPIF_CHDMA_CHANNELS address range.)
--
-- [Users can ignore this note for developers
-- If the number of physical channels changes, both the
-- IPIF_CHDMA_CHANNELS constants and MAX_NUM_PHYS_CHANNELS,
-- below, must be adjusted.
-- (Use of an array constant or a function of the form
-- NUM_SUBS_FOR_PHYS(i) to define the indices
-- runs afoul of LRM restrictions on non-locally static aggregate
-- choices. (Further, the LRM imposes perhaps unnecessarily
-- strict limits on what qualifies as a locally static primary.)
-- Note: This information is supplied for the benefit of anyone seeking
-- to improve the way that these NUM_SUBS_FOR_PHYS parameter
-- indices are defined.)
-- End of note for developers ]
--
-- The value associated with any index NUM_SUBS_FOR_PHYS_i in the
-- dependent-properties array must be even since TX and RX channels
-- come in pairs with the TX followed immediately by
-- the corresponding RX.
--
constant NUM_SIMPLE_DMA_CHANS : integer :=16;
-- The number of simple DMA channels.
constant NUM_SIMPLE_SG_CHANS : integer :=17;
-- The number of simple SG channels.
constant INTR_COALESCE : integer :=18;
-- 0 Interrupt coalescing is disabled
-- 1 Interrupt coalescing is enabled
constant CLK_PERIOD_PS : integer :=19;
-- The period of the OPB Bus clock in ps.
-- The default value of 0 is a special value that
-- is synonymous with 10000 ps (10 ns).
-- The value for CLK_PERIOD_PS is relevant only if (INTR_COALESCE = 1).
constant PACKET_WAIT_UNIT_NS : integer :=20;
-- Gives the unit for used for timing of pack-wait bounds.
-- The default value of 0 is a special value that
-- is synonymous with 1,000,000 ns (1 ms) and a non-default
-- value is typically only used for testing.
-- Relevant only if (INTR_COALESCE = 1).
constant BURST_SIZE : integer :=21;
-- 1, 2, 4, 8 or 16
-- The default value of 0 is a special value that
-- is synonymous with a burst size of 16.
-- Setting the BURST_SIZE to 1 effectively disables
-- bursts.
constant REMAINDER_AS_SINGLES : integer :=22;
-- 0 Remainder handled as a short burst
-- 1 Remainder handled as a series of singles
--------------------------------------------------------------------------------
-- The constant below is not the index of a dependent-properties
-- parameter (and, as such, would never appear as a choice in a
-- dependent-properties aggregate). Rather, it is fixed to the maximum
-- number of physical channels that an Address Range of type
-- IPIF_CHDMA_CHANNELS supports. It must be maintained in conjuction with
-- the constants named, e.g., NUM_SUBS_FOR_PHYS_15, above.
--------------------------------------------------------------------------------
constant MAX_NUM_PHYS_CHANNELS : natural := 16;
--------------------------------------------------------------------------
-- EXAMPLE: Here is an example dependent-properties aggregate for an
-- address range of type IPIF_CHDMA_CHANNELS.
-- To have a compact list of all of the CHDMA parameters, all are
-- shown, however three are commented out and the unneeded
-- MUM_SUBS_FOR_PHYS_x are excluded. The "OTHERS => 0" association
-- gives these parameters their default values, such that, for the example
--
-- - All physical channels above 2 have zero subchannels (effectively,
-- these physical channels are not used)
-- - There are no simple SG channels
-- - The packet-wait time unit is 1 ms
-- - Burst size is 16
--------------------------------------------------------------------------
-- (
-- NUM_SUBS_FOR_PHYS_0 => 8,
-- NUM_SUBS_FOR_PHYS_1 => 4,
-- NUM_SUBS_FOR_PHYS_2 => 14,
-- NUM_SIMPLE_DMA_CHANS => 1,
-- --NUM_SIMPLE_SG_CHANS => 5,
-- INTR_COALESCE => 1,
-- CLK_PERIOD_PS => 20000,
-- --PACKET_WAIT_UNIT_NS => 50000,
-- --BURST_SIZE => 1,
-- REMAINDER_AS_SINGLES => 1,
-- OTHERS => 0
-- )
--
--------------------------------------------------------------------------------
--------------------------------------------------------------------------------
-- Calculates the number of bits needed to convey the vacancy (emptiness) of
-- the fifo described by dependent_props, if fifo_present. If not fifo_present,
-- returns 0 (or the smallest value allowed by tool limitations on null arrays)
-- without making reference to dependent_props.
--------------------------------------------------------------------------------
function bits_needed_for_vac(
fifo_present: boolean;
dependent_props : DEPENDENT_PROPS_TYPE
) return integer;
--------------------------------------------------------------------------------
-- Calculates the number of bits needed to convey the occupancy (fullness) of
-- the fifo described by dependent_props, if fifo_present. If not fifo_present,
-- returns 0 (or the smallest value allowed by tool limitations on null arrays)
-- without making reference to dependent_props.
--------------------------------------------------------------------------------
function bits_needed_for_occ(
fifo_present: boolean;
dependent_props : DEPENDENT_PROPS_TYPE
) return integer;
--------------------------------------------------------------------------------
-- Function eff_dp.
--
-- For some of the dependent properties, the default value of zero is meant
-- to imply an effective default value of other than zero (see e.g.
-- PKT_WAIT_UNIT_NS for the IPIF_CHDMA_CHANNELS address-range type). The
-- following function is used to get the (possibly default-adjusted)
-- value for a dependent property.
--
-- Example call:
--
-- eff_value_of_param :=
-- eff_dp(
-- C_IPIF_CHDMA_CHANNELS,
-- PACKET_WAIT_UNIT_NS,
-- C_ARD_DEPENDENT_PROPS_ARRAY(i)(PACKET_WAIT_UNIT_NS)
-- );
--
-- where C_ARD_DEPENDENT_PROPS_ARRAY(i) is an object of type
-- DEPENDENT_PROPS_ARRAY_TYPE, that was parameterized for an address range of
-- type C_IPIF_CHDMA_CHANNELS.
--------------------------------------------------------------------------------
function eff_dp(id : integer; -- The type of address range.
dep_prop : integer; -- The index of the dependent prop.
value : integer -- The value at that index.
) return integer; -- The effective value, possibly adjusted
-- if value has the default value of 0.
---) End of Dependent Properties declarations
--------------------------------------------------------------------------------
-- Declarations for Common Properties (properties that apply regardless of the
-- type of the address range). Structurally, these work the same as
-- the dependent properties.
--------------------------------------------------------------------------------
constant COMMON_PROPS_SIZE : integer := 2;
subtype COMMON_PROPS_TYPE
is INTEGER_ARRAY_TYPE(0 to COMMON_PROPS_SIZE-1);
type COMMON_PROPS_ARRAY_TYPE
is array (natural range <>) of COMMON_PROPS_TYPE;
--------------------------------------------------------------------------------
-- Below are the indices of the common properties.
--
-- These indices should be referenced only by the names below and never
-- by numerical literals.
-- IDX
---------------------------------------------------------------------------- ---
constant KEYHOLE_BURST : integer := 0;
-- 1 All addresses of a burst are forced to the initial
-- address of the burst.
-- 0 Burst addresses follow the bus protocol.
-- IP interrupt mode array constants
Constant INTR_PASS_THRU : integer := 1;
Constant INTR_PASS_THRU_INV : integer := 2;
Constant INTR_REG_EVENT : integer := 3;
Constant INTR_REG_EVENT_INV : integer := 4;
Constant INTR_POS_EDGE_DETECT : integer := 5;
Constant INTR_NEG_EDGE_DETECT : integer := 6;
end ipif_pkg;
package body ipif_pkg is
-------------------------------------------------------------------------------
-- Function log2 -- returns number of bits needed to encode x choices
-- x = 0 returns 0
-- x = 1 returns 0
-- x = 2 returns 1
-- x = 4 returns 2, etc.
-------------------------------------------------------------------------------
--
function log2(x : natural) return integer is
variable i : integer := 0;
variable val: integer := 1;
begin
if x = 0 then return 0;
else
for j in 0 to 29 loop -- for loop for XST
if val >= x then null;
else
i := i+1;
val := val*2;
end if;
end loop;
-- Fix per CR520627 XST was ignoring this anyway and printing a
-- Warning in SRP file. This will get rid of the warning and not
-- impact simulation.
-- synthesis translate_off
assert val >= x
report "Function log2 received argument larger" &
" than its capability of 2^30. "
severity failure;
-- synthesis translate_on
return i;
end if;
end function log2;
--------------------------------------------------------------------------------
-- Function clog2 - returns the integer ceiling of the base 2 logarithm of x,
-- i.e., the least integer greater than or equal to log2(x).
--------------------------------------------------------------------------------
function clog2(x : positive) return natural is
variable r : natural := 0;
variable rp : natural := 1; -- rp tracks the value 2**r
begin
while rp < x loop -- Termination condition T: x <= 2**r
-- Loop invariant L: 2**(r-1) < x
r := r + 1;
if rp > integer'high - rp then exit; end if; -- If doubling rp overflows
-- the integer range, the doubled value would exceed x, so safe to exit.
rp := rp + rp;
end loop;
-- L and T <-> 2**(r-1) < x <= 2**r <-> (r-1) < log2(x) <= r
return r; --
end clog2;
-------------------------------------------------------------------------------
-- Function Definitions
-------------------------------------------------------------------------------
-----------------------------------------------------------------------------
-- Function "="
--
-- This function can be used to overload the "=" operator when comparing
-- strings.
-----------------------------------------------------------------------------
function "=" (s1: in string; s2: in string) return boolean is
constant tc: character := ' '; -- string termination character
variable i: integer := 1;
variable v1 : string(1 to s1'length) := s1;
variable v2 : string(1 to s2'length) := s2;
begin
while (i <= v1'length) and (v1(i) /= tc) and
(i <= v2'length) and (v2(i) /= tc) and
(v1(i) = v2(i))
loop
i := i+1;
end loop;
return ((i > v1'length) or (v1(i) = tc)) and
((i > v2'length) or (v2(i) = tc));
end;
----------------------------------------------------------------------------
-- Function equaluseCase
--
-- This function returns true if case sensitive string comparison determines
-- that str1 and str2 are the same.
-----------------------------------------------------------------------------
FUNCTION equaluseCase( str1, str2 : STRING ) RETURN BOOLEAN IS
CONSTANT len1 : INTEGER := str1'length;
CONSTANT len2 : INTEGER := str2'length;
VARIABLE equal : BOOLEAN := TRUE;
BEGIN
IF NOT (len1=len2) THEN
equal := FALSE;
ELSE
FOR i IN str1'range LOOP
IF NOT (str1(i) = str2(i)) THEN
equal := FALSE;
END IF;
END LOOP;
END IF;
RETURN equal;
END equaluseCase;
-----------------------------------------------------------------------------
-- Function calc_num_ce
--
-- This function is used to process the array specifying the number of Chip
-- Enables required for a Base Address specification. The array is input to
-- the function and an integer is returned reflecting the total number of
-- Chip Enables required for the CE, RdCE, and WrCE Buses
-----------------------------------------------------------------------------
function calc_num_ce (ce_num_array : INTEGER_ARRAY_TYPE) return integer is
Variable ce_num_sum : integer := 0;
begin
for i in 0 to (ce_num_array'length)-1 loop
ce_num_sum := ce_num_sum + ce_num_array(i);
End loop;
return(ce_num_sum);
end function calc_num_ce;
-----------------------------------------------------------------------------
-- Function calc_start_ce_index
--
-- This function is used to process the array specifying the number of Chip
-- Enables required for a Base Address specification. The CE Size array is
-- input to the function and an integer index representing the index of the
-- target module in the ce_num_array. An integer is returned reflecting the
-- starting index of the assigned Chip Enables within the CE, RdCE, and
-- WrCE Buses.
-----------------------------------------------------------------------------
function calc_start_ce_index (ce_num_array : INTEGER_ARRAY_TYPE;
index : integer) return integer is
Variable ce_num_sum : integer := 0;
begin
If (index = 0) Then
ce_num_sum := 0;
else
for i in 0 to index-1 loop
ce_num_sum := ce_num_sum + ce_num_array(i);
End loop;
End if;
return(ce_num_sum);
end function calc_start_ce_index;
-----------------------------------------------------------------------------
-- Function get_min_dwidth
--
-- This function is used to process the array specifying the data bus width
-- for each of the target modules. The dwidth_array is input to the function
-- and an integer is returned that is the smallest value found of all the
-- entries in the array.
-----------------------------------------------------------------------------
function get_min_dwidth (dwidth_array: INTEGER_ARRAY_TYPE) return integer is
Variable temp_min : Integer := 1024;
begin
for i in 0 to dwidth_array'length-1 loop
If (dwidth_array(i) < temp_min) Then
temp_min := dwidth_array(i);
else
null;
End if;
End loop;
return(temp_min);
end function get_min_dwidth;
-----------------------------------------------------------------------------
-- Function get_max_dwidth
--
-- This function is used to process the array specifying the data bus width
-- for each of the target modules. The dwidth_array is input to the function
-- and an integer is returned that is the largest value found of all the
-- entries in the array.
-----------------------------------------------------------------------------
function get_max_dwidth (dwidth_array: INTEGER_ARRAY_TYPE) return integer is
Variable temp_max : Integer := 0;
begin
for i in 0 to dwidth_array'length-1 loop
If (dwidth_array(i) > temp_max) Then
temp_max := dwidth_array(i);
else
null;
End if;
End loop;
return(temp_max);
end function get_max_dwidth;
-----------------------------------------------------------------------------
-- Function S32
--
-- This function is used to expand an input string to 32 characters by
-- padding with spaces. If the input string is larger than 32 characters,
-- it will truncate to 32 characters.
-----------------------------------------------------------------------------
function S32 (in_string : string) return string is
constant OUTPUT_STRING_LENGTH : integer := 32;
Constant space : character := ' ';
variable new_string : string(1 to 32);
Variable start_index : Integer := in_string'length+1;
begin
If (in_string'length < OUTPUT_STRING_LENGTH) Then
for i in 1 to in_string'length loop
new_string(i) := in_string(i);
End loop;
for j in start_index to OUTPUT_STRING_LENGTH loop
new_string(j) := space;
End loop;
else -- use first 32 chars of in_string (truncate the rest)
for k in 1 to OUTPUT_STRING_LENGTH loop
new_string(k) := in_string(k);
End loop;
End if;
return(new_string);
end function S32;
-----------------------------------------------------------------------------
-- Function get_id_index
--
-- This function is used to process the array specifying the target function
-- assigned to a Base Address pair address range. The id_array and a
-- id number is input to the function. A integer is returned reflecting the
-- array index of the id matching the id input number. This function
-- should only be called if the id number is known to exist in the
-- name_array input. This can be detirmined by using the find_ard_id
-- function.
-----------------------------------------------------------------------------
function get_id_index (id_array :INTEGER_ARRAY_TYPE;
id : integer) return integer is
Variable match : Boolean := false;
Variable match_index : Integer := 10000; -- a really big number!
begin
for array_index in 0 to id_array'length-1 loop
If (match = true) Then -- match already found so do nothing
null;
else -- compare the numbers one by one
match := (id_array(array_index) = id);
If (match) Then
match_index := array_index;
else
null;
End if;
End if;
End loop;
return(match_index);
end function get_id_index;
--------------------------------------------------------------------------------
-- get_id_index but return a value in bounds on error (iboe).
--
-- This function is the same as get_id_index, except that when id does
-- not exist in id_array, the value returned is any index that is
-- within the index range of id_array.
--
-- This function would normally only be used where function find_ard_id
-- is used to establish the existence of id but, even when non-existent,
-- an element of one of the ARD arrays will be computed from the
-- returned get_id_index_iboe value. See, e.g., function bits_needed_for_vac
-- and the example call, below
--
-- bits_needed_for_vac(
-- find_ard_id(C_ARD_ID_ARRAY, IPIF_RDFIFO_DATA),
-- C_ARD_DEPENDENT_PROPS_ARRAY(get_id_index_iboe(C_ARD_ID_ARRAY,
-- IPIF_RDFIFO_DATA))
-- )
--------------------------------------------------------------------------------
function get_id_index_iboe (id_array :INTEGER_ARRAY_TYPE;
id : integer) return integer is
Variable match : Boolean := false;
Variable match_index : Integer := id_array'left; -- any valid array index
begin
for array_index in 0 to id_array'length-1 loop
If (match = true) Then -- match already found so do nothing
null;
else -- compare the numbers one by one
match := (id_array(array_index) = id);
If (match) Then match_index := array_index;
else null;
End if;
End if;
End loop;
return(match_index);
end function get_id_index_iboe;
-----------------------------------------------------------------------------
-- Function find_ard_id
--
-- This function is used to process the array specifying the target function
-- assigned to a Base Address pair address range. The id_array and a
-- integer id is input to the function. A boolean is returned reflecting the
-- presence (or not) of a number in the array matching the id input number.
-----------------------------------------------------------------------------
function find_ard_id (id_array : INTEGER_ARRAY_TYPE;
id : integer) return boolean is
Variable match : Boolean := false;
begin
for array_index in 0 to id_array'length-1 loop
If (match = true) Then -- match already found so do nothing
null;
else -- compare the numbers one by one
match := (id_array(array_index) = id);
End if;
End loop;
return(match);
end function find_ard_id;
-----------------------------------------------------------------------------
-- Function find_id_dwidth
--
-- This function is used to find the data width of a target module. If the
-- target module exists, the data width is extracted from the input dwidth
-- array. If the module is not in the ID array, the default input is
-- returned. This function is needed to assign data port size constraints on
-- unconstrained port widths.
-----------------------------------------------------------------------------
function find_id_dwidth (id_array : INTEGER_ARRAY_TYPE;
dwidth_array: INTEGER_ARRAY_TYPE;
id : integer;
default : integer) return integer is
Variable id_present : Boolean := false;
Variable array_index : Integer := 0;
Variable dwidth : Integer := default;
begin
id_present := find_ard_id(id_array, id);
If (id_present) Then
array_index := get_id_index (id_array, id);
dwidth := dwidth_array(array_index);
else
null; -- use default input
End if;
Return (dwidth);
end function find_id_dwidth;
-----------------------------------------------------------------------------
-- Function cnt_ipif_id_blks
--
-- This function is used to detirmine the number of IPIF components specified
-- in the ARD ID Array. An integer is returned representing the number
-- of elements counted. User IDs are ignored in the counting process.
-----------------------------------------------------------------------------
function cnt_ipif_id_blks (id_array : INTEGER_ARRAY_TYPE)
return integer is
Variable blk_count : integer := 0;
Variable temp_id : integer;
begin
for array_index in 0 to id_array'length-1 loop
temp_id := id_array(array_index);
If (temp_id = IPIF_WRFIFO_DATA or
temp_id = IPIF_RDFIFO_DATA or
temp_id = IPIF_RST or
temp_id = IPIF_INTR or
temp_id = IPIF_DMA_SG or
temp_id = IPIF_SESR_SEAR
) Then -- IPIF block found
blk_count := blk_count+1;
else -- go to next loop iteration
null;
End if;
End loop;
return(blk_count);
end function cnt_ipif_id_blks;
-----------------------------------------------------------------------------
-- Function get_ipif_id_dbus_index
--
-- This function is used to detirmine the IPIF relative index of a given
-- ID value. User IDs are ignored in the index detirmination.
-----------------------------------------------------------------------------
function get_ipif_id_dbus_index (id_array : INTEGER_ARRAY_TYPE;
id : integer)
return integer is
Variable blk_index : integer := 0;
Variable temp_id : integer;
Variable id_found : Boolean := false;
begin
for array_index in 0 to id_array'length-1 loop
temp_id := id_array(array_index);
If (id_found) then
null;
elsif (temp_id = id) then
id_found := true;
elsif (temp_id = IPIF_WRFIFO_DATA or
temp_id = IPIF_RDFIFO_DATA or
temp_id = IPIF_RST or
temp_id = IPIF_INTR or
temp_id = IPIF_DMA_SG or
temp_id = IPIF_SESR_SEAR
) Then -- IPIF block found
blk_index := blk_index+1;
else -- user block so do nothing
null;
End if;
End loop;
return(blk_index);
end function get_ipif_id_dbus_index;
------------------------------------------------------------------------------
-- Function: rebuild_slv32_array
--
-- Description:
-- This function takes an input slv32 array and rebuilds an output slv32
-- array composed of the first "num_valid_entry" elements from the input
-- array.
------------------------------------------------------------------------------
function rebuild_slv32_array (slv32_array : SLV32_ARRAY_TYPE;
num_valid_pairs : integer)
return SLV32_ARRAY_TYPE is
--Constants
constant num_elements : Integer := num_valid_pairs * 2;
-- Variables
variable temp_baseaddr32_array : SLV32_ARRAY_TYPE( 0 to num_elements-1);
begin
for array_index in 0 to num_elements-1 loop
temp_baseaddr32_array(array_index) := slv32_array(array_index);
end loop;
return(temp_baseaddr32_array);
end function rebuild_slv32_array;
------------------------------------------------------------------------------
-- Function: rebuild_slv64_array
--
-- Description:
-- This function takes an input slv64 array and rebuilds an output slv64
-- array composed of the first "num_valid_entry" elements from the input
-- array.
------------------------------------------------------------------------------
function rebuild_slv64_array (slv64_array : SLV64_ARRAY_TYPE;
num_valid_pairs : integer)
return SLV64_ARRAY_TYPE is
--Constants
constant num_elements : Integer := num_valid_pairs * 2;
-- Variables
variable temp_baseaddr64_array : SLV64_ARRAY_TYPE( 0 to num_elements-1);
begin
for array_index in 0 to num_elements-1 loop
temp_baseaddr64_array(array_index) := slv64_array(array_index);
end loop;
return(temp_baseaddr64_array);
end function rebuild_slv64_array;
------------------------------------------------------------------------------
-- Function: rebuild_int_array
--
-- Description:
-- This function takes an input integer array and rebuilds an output integer
-- array composed of the first "num_valid_entry" elements from the input
-- array.
------------------------------------------------------------------------------
function rebuild_int_array (int_array : INTEGER_ARRAY_TYPE;
num_valid_entry : integer)
return INTEGER_ARRAY_TYPE is
-- Variables
variable temp_int_array : INTEGER_ARRAY_TYPE( 0 to num_valid_entry-1);
begin
for array_index in 0 to num_valid_entry-1 loop
temp_int_array(array_index) := int_array(array_index);
end loop;
return(temp_int_array);
end function rebuild_int_array;
function bits_needed_for_vac(
fifo_present: boolean;
dependent_props : DEPENDENT_PROPS_TYPE
) return integer is
begin
if not fifo_present then
return 1; -- Zero would be better but leads to "0 to -1" null
-- ranges that are not handled by XST Flint or earlier
-- because of the negative index.
else
return
log2(1 + dependent_props(FIFO_CAPACITY_BITS) /
dependent_props(RD_WIDTH_BITS)
);
end if;
end function bits_needed_for_vac;
function bits_needed_for_occ(
fifo_present: boolean;
dependent_props : DEPENDENT_PROPS_TYPE
) return integer is
begin
if not fifo_present then
return 1; -- Zero would be better but leads to "0 to -1" null
-- ranges that are not handled by XST Flint or earlier
-- because of the negative index.
else
return
log2(1 + dependent_props(FIFO_CAPACITY_BITS) /
dependent_props(WR_WIDTH_BITS)
);
end if;
end function bits_needed_for_occ;
function eff_dp(id : integer;
dep_prop : integer;
value : integer) return integer is
variable dp : integer := dep_prop;
type bo2na_type is array (boolean) of natural;
constant bo2na : bo2na_type := (0, 1);
begin
if value /= 0 then return value; end if; -- Not default
case id is
when IPIF_CHDMA_CHANNELS =>
-------------------
return( bo2na(dp = CLK_PERIOD_PS ) * 10000
+ bo2na(dp = PACKET_WAIT_UNIT_NS ) * 1000000
+ bo2na(dp = BURST_SIZE ) * 16
);
when others => return 0;
end case;
end eff_dp;
function populate_intr_mode_array (num_user_intr : integer;
intr_capture_mode : integer)
return INTEGER_ARRAY_TYPE is
variable intr_mode_array : INTEGER_ARRAY_TYPE(0 to num_user_intr-1);
begin
for i in 0 to num_user_intr-1 loop
intr_mode_array(i) := intr_capture_mode;
end loop;
return intr_mode_array;
end function populate_intr_mode_array;
function add_intr_ard_id_array(include_intr : boolean;
ard_id_array : INTEGER_ARRAY_TYPE)
return INTEGER_ARRAY_TYPE is
variable intr_ard_id_array : INTEGER_ARRAY_TYPE(0 to ard_id_array'length);
begin
intr_ard_id_array(0 to ard_id_array'length-1) := ard_id_array;
if include_intr then
intr_ard_id_array(ard_id_array'length) := IPIF_INTR;
return intr_ard_id_array;
else
return ard_id_array;
end if;
end function add_intr_ard_id_array;
function add_intr_ard_addr_range_array(include_intr : boolean;
ZERO_ADDR_PAD : std_logic_vector;
intr_baseaddr : std_logic_vector;
intr_highaddr : std_logic_vector;
ard_id_array : INTEGER_ARRAY_TYPE;
ard_addr_range_array : SLV64_ARRAY_TYPE)
return SLV64_ARRAY_TYPE is
variable intr_ard_addr_range_array : SLV64_ARRAY_TYPE(0 to ard_addr_range_array'length+1);
begin
intr_ard_addr_range_array(0 to ard_addr_range_array'length-1) := ard_addr_range_array;
if include_intr then
intr_ard_addr_range_array(2*get_id_index(ard_id_array,IPIF_INTR))
:= ZERO_ADDR_PAD & intr_baseaddr;
intr_ard_addr_range_array(2*get_id_index(ard_id_array,IPIF_INTR)+1)
:= ZERO_ADDR_PAD & intr_highaddr;
return intr_ard_addr_range_array;
else
return ard_addr_range_array;
end if;
end function add_intr_ard_addr_range_array;
function add_intr_ard_dwidth_array(include_intr : boolean;
intr_dwidth : integer;
ard_id_array : INTEGER_ARRAY_TYPE;
ard_dwidth_array : INTEGER_ARRAY_TYPE)
return INTEGER_ARRAY_TYPE is
variable intr_ard_dwidth_array : INTEGER_ARRAY_TYPE(0 to ard_dwidth_array'length);
begin
intr_ard_dwidth_array(0 to ard_dwidth_array'length-1) := ard_dwidth_array;
if include_intr then
intr_ard_dwidth_array(get_id_index(ard_id_array, IPIF_INTR)) := intr_dwidth;
return intr_ard_dwidth_array;
else
return ard_dwidth_array;
end if;
end function add_intr_ard_dwidth_array;
function add_intr_ard_num_ce_array(include_intr : boolean;
ard_id_array : INTEGER_ARRAY_TYPE;
ard_num_ce_array : INTEGER_ARRAY_TYPE)
return INTEGER_ARRAY_TYPE is
variable intr_ard_num_ce_array : INTEGER_ARRAY_TYPE(0 to ard_num_ce_array'length);
begin
intr_ard_num_ce_array(0 to ard_num_ce_array'length-1) := ard_num_ce_array;
if include_intr then
intr_ard_num_ce_array(get_id_index(ard_id_array, IPIF_INTR)) := 16;
return intr_ard_num_ce_array;
else
return ard_num_ce_array;
end if;
end function add_intr_ard_num_ce_array;
end package body ipif_pkg;
|
-- IPIF Common Library Package
-------------------------------------------------------------------------------
--
-- *************************************************************************
-- ** **
-- ** DISCLAIMER OF LIABILITY **
-- ** **
-- ** This text/file contains proprietary, confidential **
-- ** information of Xilinx, Inc., is distributed under **
-- ** license from Xilinx, Inc., and may be used, copied **
-- ** and/or disclosed only pursuant to the terms of a valid **
-- ** license agreement with Xilinx, Inc. Xilinx hereby **
-- ** grants you a license to use this text/file solely for **
-- ** design, simulation, implementation and creation of **
-- ** design files limited to Xilinx devices or technologies. **
-- ** Use with non-Xilinx devices or technologies is expressly **
-- ** prohibited and immediately terminates your license unless **
-- ** covered by a separate agreement. **
-- ** **
-- ** Xilinx is providing this design, code, or information **
-- ** "as-is" solely for use in developing programs and **
-- ** solutions for Xilinx devices, with no obligation on the **
-- ** part of Xilinx to provide support. By providing this design, **
-- ** code, or information as one possible implementation of **
-- ** this feature, application or standard, Xilinx is making no **
-- ** representation that this implementation is free from any **
-- ** claims of infringement. You are responsible for obtaining **
-- ** any rights you may require for your implementation. **
-- ** Xilinx expressly disclaims any warranty whatsoever with **
-- ** respect to the adequacy of the implementation, including **
-- ** but not limited to any warranties or representations that this **
-- ** implementation is free from claims of infringement, implied **
-- ** warranties of merchantability or fitness for a particular **
-- ** purpose. **
-- ** **
-- ** Xilinx products are not intended for use in life support **
-- ** appliances, devices, or systems. Use in such applications is **
-- ** expressly prohibited. **
-- ** **
-- ** Any modifications that are made to the Source Code are **
-- ** done at the users sole risk and will be unsupported. **
-- ** The Xilinx Support Hotline does not have access to source **
-- ** code and therefore cannot answer specific questions related **
-- ** to source HDL. The Xilinx Hotline support of original source **
-- ** code IP shall only address issues and questions related **
-- ** to the standard Netlist version of the core (and thus **
-- ** indirectly, the original core source). **
-- ** **
-- ** Copyright (c) 2002-2010 Xilinx, Inc. All rights reserved. **
-- ** **
-- ** This copyright and support notice must be retained as part **
-- ** of this text at all times. **
-- ** **
-- *************************************************************************
--
-------------------------------------------------------------------------------
-- Filename: ipif_pkg.vhd
-- Version: Intital
-- Description: This file contains the constants and functions used in the
-- ipif common library components.
--
-------------------------------------------------------------------------------
-- Structure:
--
-------------------------------------------------------------------------------
-- Author: DET
-- History:
-- DET 02/21/02 -- Created from proc_common_pkg.vhd
--
-- DET 03/13/02 -- PLB IPIF development updates
-- ^^^^^^
-- - Commented out string types and string functions due to an XST
-- problem with string arrays and functions. THe string array
-- processing functions were replaced with comperable functions
-- operating on integer arrays.
-- ~~~~~~
--
--
-- DET 4/30/2002 Initial
-- ~~~~~~
-- - Added three functions: rebuild_slv32_array, rebuild_slv64_array, and
-- rebuild_int_array to support removal of unused elements from the
-- ARD arrays.
-- ^^^^^^ --
--
-- FLO 8/12/2002
-- ~~~~~~
-- - Added three functions: bits_needed_for_vac, bits_needed_for_occ,
-- and get_id_index_iboe.
-- (Removed provisional functions bits_needed_for_vacancy,
-- bits needed_for_occupancy, and bits_needed_for.)
-- ^^^^^^
--
-- FLO 3/24/2003
-- ~~~~~~
-- - Added dependent property paramters for channelized DMA.
-- - Added common property parameter array type.
-- - Definded the KEYHOLD_BURST common-property parameter.
-- ^^^^^^
--
-- FLO 10/22/2003
-- ~~~~~~
-- - Some adjustment to CHDMA parameterization.
-- - Cleanup of obsolete code and comments. (The former "XST workaround"
-- has become the officially deployed method.)
-- ^^^^^^
--
-- LSS 03/24/2004
-- ~~~~~~
-- - Added 5 functions
-- ^^^^^^
--
-- ALS 09/03/04
-- ^^^^^^
-- -- Added constants to describe the channel protocols used in MCH_OPB_IPIF
-- ~~~~~~
--
-- DET 1/17/2008 v4_0
-- ~~~~~~
-- - Changed proc_common library version to v4_0
-- - Incorporated new disclaimer header
-- ^^^^^^
--
-------------------------------------------------------------------------------
-- Naming Conventions:
-- active low signals: "*_n"
-- clock signals: "clk", "clk_div#", "clk_#x"
-- reset signals: "rst", "rst_n"
-- generics: "C_*"
-- user defined types: "*_TYPE"
-- state machine next state: "*_ns"
-- state machine current state: "*_cs"
-- combinatorial signals: "*_com"
-- pipelined or register delay signals: "*_d#"
-- counter signals: "*cnt*"
-- clock enable signals: "*_ce"
-- internal version of output port "*_i"
-- device pins: "*_pin"
-- ports: - Names begin with Uppercase
-- processes: "*_PROCESS"
-- component instantiations: "<ENTITY_>I_<#|FUNC>
-------------------------------------------------------------------------------
library ieee;
use ieee.std_logic_1164.all;
-- need conversion function to convert reals/integers to std logic vectors
use ieee.std_logic_arith.all;
use ieee.std_logic_arith.all;
use ieee.std_logic_unsigned.all;
package ipif_pkg is
-------------------------------------------------------------------------------
-- Type Declarations
-------------------------------------------------------------------------------
type SLV32_ARRAY_TYPE is array (natural range <>) of std_logic_vector(0 to 31);
subtype SLV64_TYPE is std_logic_vector(0 to 63);
type SLV64_ARRAY_TYPE is array (natural range <>) of SLV64_TYPE;
type INTEGER_ARRAY_TYPE is array (natural range <>) of integer;
-------------------------------------------------------------------------------
-- Function and Procedure Declarations
-------------------------------------------------------------------------------
function "=" (s1: in string; s2: in string) return boolean;
function equaluseCase( str1, str2 : STRING ) RETURN BOOLEAN;
function calc_num_ce (ce_num_array : INTEGER_ARRAY_TYPE) return integer;
function calc_start_ce_index (ce_num_array : INTEGER_ARRAY_TYPE;
index : integer) return integer;
function get_min_dwidth (dwidth_array: INTEGER_ARRAY_TYPE) return integer;
function get_max_dwidth (dwidth_array: INTEGER_ARRAY_TYPE) return integer;
function S32 (in_string : string) return string;
--------------------------------------------------------------------------------
-- ARD support functions.
-- These function can be useful when operating with the ARD parameterization.
--------------------------------------------------------------------------------
function get_id_index (id_array :INTEGER_ARRAY_TYPE;
id : integer)
return integer;
function get_id_index_iboe (id_array :INTEGER_ARRAY_TYPE;
id : integer)
return integer;
function find_ard_id (id_array : INTEGER_ARRAY_TYPE;
id : integer) return boolean;
function find_id_dwidth (id_array : INTEGER_ARRAY_TYPE;
dwidth_array: INTEGER_ARRAY_TYPE;
id : integer;
default : integer)
return integer;
function cnt_ipif_id_blks (id_array : INTEGER_ARRAY_TYPE) return integer;
function get_ipif_id_dbus_index (id_array : INTEGER_ARRAY_TYPE;
id : integer)
return integer ;
function rebuild_slv32_array (slv32_array : SLV32_ARRAY_TYPE;
num_valid_pairs : integer)
return SLV32_ARRAY_TYPE;
function rebuild_slv64_array (slv64_array : SLV64_ARRAY_TYPE;
num_valid_pairs : integer)
return SLV64_ARRAY_TYPE;
function rebuild_int_array (int_array : INTEGER_ARRAY_TYPE;
num_valid_entry : integer)
return INTEGER_ARRAY_TYPE;
-- 5 Functions Added 3/24/04
function populate_intr_mode_array (num_user_intr : integer;
intr_capture_mode : integer)
return INTEGER_ARRAY_TYPE ;
function add_intr_ard_id_array(include_intr : boolean;
ard_id_array : INTEGER_ARRAY_TYPE)
return INTEGER_ARRAY_TYPE;
function add_intr_ard_addr_range_array(include_intr : boolean;
ZERO_ADDR_PAD : std_logic_vector;
intr_baseaddr : std_logic_vector;
intr_highaddr : std_logic_vector;
ard_id_array : INTEGER_ARRAY_TYPE;
ard_addr_range_array : SLV64_ARRAY_TYPE)
return SLV64_ARRAY_TYPE;
function add_intr_ard_num_ce_array(include_intr : boolean;
ard_id_array : INTEGER_ARRAY_TYPE;
ard_num_ce_array : INTEGER_ARRAY_TYPE)
return INTEGER_ARRAY_TYPE;
function add_intr_ard_dwidth_array(include_intr : boolean;
intr_dwidth : integer;
ard_id_array : INTEGER_ARRAY_TYPE;
ard_dwidth_array : INTEGER_ARRAY_TYPE)
return INTEGER_ARRAY_TYPE;
function log2(x : natural) return integer;
function clog2(x : positive) return natural;
-------------------------------------------------------------------------------
-- Constant Declarations
-------------------------------------------------------------------------------
-------------------------------------------------------------------------------
-- Channel Protocols
-- The constant declarations below give symbolic-name aliases for values that
-- can be used in the C_MCH_PROTOCOL_ARRAY generic of the MCH_OPB_IPIF.
-------------------------------------------------------------------------------
constant XCL : integer := 0;
constant DAG : integer := 1;
--------------------------------------------------------------------------------
-- Address range types.
-- The constant declarations, below, give symbolic-name aliases for values
-- that can be used in the C_ARD_ID_ARRAY generic of IPIFs. The first set
-- gives aliases that are used to include IPIF services.
--------------------------------------------------------------------------------
-- IPIF module aliases
Constant IPIF_INTR : integer := 1;
Constant IPIF_RST : integer := 2;
Constant IPIF_SESR_SEAR : integer := 3;
Constant IPIF_DMA_SG : integer := 4;
Constant IPIF_WRFIFO_REG : integer := 5;
Constant IPIF_WRFIFO_DATA : integer := 6;
Constant IPIF_RDFIFO_REG : integer := 7;
Constant IPIF_RDFIFO_DATA : integer := 8;
Constant IPIF_CHDMA_CHANNELS : integer := 9;
Constant IPIF_CHDMA_GLOBAL_REGS : integer := 10;
Constant CHDMA_STATUS_FIFO : integer := 90;
-- Some predefined user module aliases
Constant USER_00 : integer := 100;
Constant USER_01 : integer := 101;
Constant USER_02 : integer := 102;
Constant USER_03 : integer := 103;
Constant USER_04 : integer := 104;
Constant USER_05 : integer := 105;
Constant USER_06 : integer := 106;
Constant USER_07 : integer := 107;
Constant USER_08 : integer := 108;
Constant USER_09 : integer := 109;
Constant USER_10 : integer := 110;
Constant USER_11 : integer := 111;
Constant USER_12 : integer := 112;
Constant USER_13 : integer := 113;
Constant USER_14 : integer := 114;
Constant USER_15 : integer := 115;
Constant USER_16 : integer := 116;
---( Start of Dependent Properties declarations
--------------------------------------------------------------------------------
-- Declarations for Dependent Properties (properties that depend on the type of
-- the address range, or in other words, address-range-specific parameters).
-- There is one property, i.e. one parameter, encoded as an integer at
-- each index of the properties array. There is one properties array for
-- each address range.
--
-- The C_ARD_DEPENDENT_PROPS_ARRAY generic parameter in (most) IPIFs is such
-- a properties array and it is usually giving its (static) value using a
-- VHDL aggregate construct. (--ToDo, give an example of this.)
--
-- The the "assigned" default value of a dependent property is zero. This value
-- is usually specified the aggregate by leaving its (index) name out so that
-- it is covered by an "others => 0" choice in the aggregate. Some parameters,
-- as noted in the definitions, below, have an "effective" default value that is
-- different from the assigned default value of zero. In such cases, the
-- function, eff_dp, given below, can be used to get the effective value of
-- the dependent property.
--------------------------------------------------------------------------------
constant DEPENDENT_PROPS_SIZE : integer := 32;
subtype DEPENDENT_PROPS_TYPE
is INTEGER_ARRAY_TYPE(0 to DEPENDENT_PROPS_SIZE-1);
type DEPENDENT_PROPS_ARRAY_TYPE
is array (natural range <>) of DEPENDENT_PROPS_TYPE;
--------------------------------------------------------------------------------
-- Below are the indices of dependent properties for the different types of
-- address ranges.
--
-- Example: Let C_ARD_DEPENDENT_PROPS_ARRAY hold the dependent properites
-- for a set of address ranges. Then, e.g.,
--
-- C_ARD_DEPENDENT_PROPS_ARRAY(i)(FIFO_CAPACITY_BITS)
--
-- gives the fifo capacity in bits, provided that the i'th address range
-- is of type IPIF_WRFIFO_DATA or IPIF_RDFIFO_DATA.
--
-- These indices should be referenced only by the names below and never
-- by numerical literals. (The right to change numerical index assignments
-- is reserved; applications using the names will not be affected by such
-- reassignments.)
--------------------------------------------------------------------------------
--
--ToDo, if the interrupt controller parameterization is ever moved to
-- C_ARD_DEPENDENT_PROPS_ARRAY, then the following declarations
-- could be uncommented and used.
---- IPIF_INTR IDX
---------------------------------------------------------------------------- ---
constant EXCLUDE_DEV_ISC : integer := 0;
-- 1 specifies that only the global interrupt
-- enable is present in the device interrupt source
-- controller and that the only source of interrupts
-- in the device is the IP interrupt source controller.
-- 0 specifies that the full device interrupt
-- source controller structure will be included.
constant INCLUDE_DEV_PENCODER : integer := 1;
-- 1 will include the Device IID in the device interrupt
-- source controller, 0 will exclude it.
--
-- IPIF_WRFIFO_DATA or IPIF_RDFIFO_DATA IDX
---------------------------------------------------------------------------- ---
constant FIFO_CAPACITY_BITS : integer := 0;
constant WR_WIDTH_BITS : integer := 1;
constant RD_WIDTH_BITS : integer := 2;
constant EXCLUDE_PACKET_MODE : integer := 3;
-- 1 Don't include packet mode features
-- 0 Include packet mode features
constant EXCLUDE_VACANCY : integer := 4;
-- 1 Don't include vacancy calculation
-- 0 Include vacancy calculation
-- See also the functions
-- bits_needed_for_vac and
-- bits_needed_for_occ that are declared below.
constant INCLUDE_DRE : integer := 5;
constant INCLUDE_AUTOPUSH_POP : integer := 6;
constant AUTOPUSH_POP_CE : integer := 7;
constant INCLUDE_CSUM : integer := 8;
--------------------------------------------------------------------------------
--
-- DMA_SG IDX
---------------------------------------------------------------------------- ---
--------------------------------------------------------------------------------
-- IPIF_CHDMA_CHANNELS IDX
---------------------------------------------------------------------------- ---
constant NUM_SUBS_FOR_PHYS_0 : integer :=0;
constant NUM_SUBS_FOR_PHYS_1 : integer :=1;
constant NUM_SUBS_FOR_PHYS_2 : integer :=2;
constant NUM_SUBS_FOR_PHYS_3 : integer :=3;
constant NUM_SUBS_FOR_PHYS_4 : integer :=4;
constant NUM_SUBS_FOR_PHYS_5 : integer :=5;
constant NUM_SUBS_FOR_PHYS_6 : integer :=6;
constant NUM_SUBS_FOR_PHYS_7 : integer :=7;
constant NUM_SUBS_FOR_PHYS_8 : integer :=8;
constant NUM_SUBS_FOR_PHYS_9 : integer :=9;
constant NUM_SUBS_FOR_PHYS_10 : integer :=10;
constant NUM_SUBS_FOR_PHYS_11 : integer :=11;
constant NUM_SUBS_FOR_PHYS_12 : integer :=12;
constant NUM_SUBS_FOR_PHYS_13 : integer :=13;
constant NUM_SUBS_FOR_PHYS_14 : integer :=14;
constant NUM_SUBS_FOR_PHYS_15 : integer :=15;
-- Gives the number of sub-channels for physical channel i.
--
-- These constants, which will be MAX_NUM_PHYS_CHANNELS in number (see
-- below), have consecutive values starting with 0 for
-- NUM_SUBS_FOR_PHYS_0. (The constants serve the purpose of giving symbolic
-- names for use in the dependent-properties aggregates that parameterize
-- an IPIF_CHDMA_CHANNELS address range.)
--
-- [Users can ignore this note for developers
-- If the number of physical channels changes, both the
-- IPIF_CHDMA_CHANNELS constants and MAX_NUM_PHYS_CHANNELS,
-- below, must be adjusted.
-- (Use of an array constant or a function of the form
-- NUM_SUBS_FOR_PHYS(i) to define the indices
-- runs afoul of LRM restrictions on non-locally static aggregate
-- choices. (Further, the LRM imposes perhaps unnecessarily
-- strict limits on what qualifies as a locally static primary.)
-- Note: This information is supplied for the benefit of anyone seeking
-- to improve the way that these NUM_SUBS_FOR_PHYS parameter
-- indices are defined.)
-- End of note for developers ]
--
-- The value associated with any index NUM_SUBS_FOR_PHYS_i in the
-- dependent-properties array must be even since TX and RX channels
-- come in pairs with the TX followed immediately by
-- the corresponding RX.
--
constant NUM_SIMPLE_DMA_CHANS : integer :=16;
-- The number of simple DMA channels.
constant NUM_SIMPLE_SG_CHANS : integer :=17;
-- The number of simple SG channels.
constant INTR_COALESCE : integer :=18;
-- 0 Interrupt coalescing is disabled
-- 1 Interrupt coalescing is enabled
constant CLK_PERIOD_PS : integer :=19;
-- The period of the OPB Bus clock in ps.
-- The default value of 0 is a special value that
-- is synonymous with 10000 ps (10 ns).
-- The value for CLK_PERIOD_PS is relevant only if (INTR_COALESCE = 1).
constant PACKET_WAIT_UNIT_NS : integer :=20;
-- Gives the unit for used for timing of pack-wait bounds.
-- The default value of 0 is a special value that
-- is synonymous with 1,000,000 ns (1 ms) and a non-default
-- value is typically only used for testing.
-- Relevant only if (INTR_COALESCE = 1).
constant BURST_SIZE : integer :=21;
-- 1, 2, 4, 8 or 16
-- The default value of 0 is a special value that
-- is synonymous with a burst size of 16.
-- Setting the BURST_SIZE to 1 effectively disables
-- bursts.
constant REMAINDER_AS_SINGLES : integer :=22;
-- 0 Remainder handled as a short burst
-- 1 Remainder handled as a series of singles
--------------------------------------------------------------------------------
-- The constant below is not the index of a dependent-properties
-- parameter (and, as such, would never appear as a choice in a
-- dependent-properties aggregate). Rather, it is fixed to the maximum
-- number of physical channels that an Address Range of type
-- IPIF_CHDMA_CHANNELS supports. It must be maintained in conjuction with
-- the constants named, e.g., NUM_SUBS_FOR_PHYS_15, above.
--------------------------------------------------------------------------------
constant MAX_NUM_PHYS_CHANNELS : natural := 16;
--------------------------------------------------------------------------
-- EXAMPLE: Here is an example dependent-properties aggregate for an
-- address range of type IPIF_CHDMA_CHANNELS.
-- To have a compact list of all of the CHDMA parameters, all are
-- shown, however three are commented out and the unneeded
-- MUM_SUBS_FOR_PHYS_x are excluded. The "OTHERS => 0" association
-- gives these parameters their default values, such that, for the example
--
-- - All physical channels above 2 have zero subchannels (effectively,
-- these physical channels are not used)
-- - There are no simple SG channels
-- - The packet-wait time unit is 1 ms
-- - Burst size is 16
--------------------------------------------------------------------------
-- (
-- NUM_SUBS_FOR_PHYS_0 => 8,
-- NUM_SUBS_FOR_PHYS_1 => 4,
-- NUM_SUBS_FOR_PHYS_2 => 14,
-- NUM_SIMPLE_DMA_CHANS => 1,
-- --NUM_SIMPLE_SG_CHANS => 5,
-- INTR_COALESCE => 1,
-- CLK_PERIOD_PS => 20000,
-- --PACKET_WAIT_UNIT_NS => 50000,
-- --BURST_SIZE => 1,
-- REMAINDER_AS_SINGLES => 1,
-- OTHERS => 0
-- )
--
--------------------------------------------------------------------------------
--------------------------------------------------------------------------------
-- Calculates the number of bits needed to convey the vacancy (emptiness) of
-- the fifo described by dependent_props, if fifo_present. If not fifo_present,
-- returns 0 (or the smallest value allowed by tool limitations on null arrays)
-- without making reference to dependent_props.
--------------------------------------------------------------------------------
function bits_needed_for_vac(
fifo_present: boolean;
dependent_props : DEPENDENT_PROPS_TYPE
) return integer;
--------------------------------------------------------------------------------
-- Calculates the number of bits needed to convey the occupancy (fullness) of
-- the fifo described by dependent_props, if fifo_present. If not fifo_present,
-- returns 0 (or the smallest value allowed by tool limitations on null arrays)
-- without making reference to dependent_props.
--------------------------------------------------------------------------------
function bits_needed_for_occ(
fifo_present: boolean;
dependent_props : DEPENDENT_PROPS_TYPE
) return integer;
--------------------------------------------------------------------------------
-- Function eff_dp.
--
-- For some of the dependent properties, the default value of zero is meant
-- to imply an effective default value of other than zero (see e.g.
-- PKT_WAIT_UNIT_NS for the IPIF_CHDMA_CHANNELS address-range type). The
-- following function is used to get the (possibly default-adjusted)
-- value for a dependent property.
--
-- Example call:
--
-- eff_value_of_param :=
-- eff_dp(
-- C_IPIF_CHDMA_CHANNELS,
-- PACKET_WAIT_UNIT_NS,
-- C_ARD_DEPENDENT_PROPS_ARRAY(i)(PACKET_WAIT_UNIT_NS)
-- );
--
-- where C_ARD_DEPENDENT_PROPS_ARRAY(i) is an object of type
-- DEPENDENT_PROPS_ARRAY_TYPE, that was parameterized for an address range of
-- type C_IPIF_CHDMA_CHANNELS.
--------------------------------------------------------------------------------
function eff_dp(id : integer; -- The type of address range.
dep_prop : integer; -- The index of the dependent prop.
value : integer -- The value at that index.
) return integer; -- The effective value, possibly adjusted
-- if value has the default value of 0.
---) End of Dependent Properties declarations
--------------------------------------------------------------------------------
-- Declarations for Common Properties (properties that apply regardless of the
-- type of the address range). Structurally, these work the same as
-- the dependent properties.
--------------------------------------------------------------------------------
constant COMMON_PROPS_SIZE : integer := 2;
subtype COMMON_PROPS_TYPE
is INTEGER_ARRAY_TYPE(0 to COMMON_PROPS_SIZE-1);
type COMMON_PROPS_ARRAY_TYPE
is array (natural range <>) of COMMON_PROPS_TYPE;
--------------------------------------------------------------------------------
-- Below are the indices of the common properties.
--
-- These indices should be referenced only by the names below and never
-- by numerical literals.
-- IDX
---------------------------------------------------------------------------- ---
constant KEYHOLE_BURST : integer := 0;
-- 1 All addresses of a burst are forced to the initial
-- address of the burst.
-- 0 Burst addresses follow the bus protocol.
-- IP interrupt mode array constants
Constant INTR_PASS_THRU : integer := 1;
Constant INTR_PASS_THRU_INV : integer := 2;
Constant INTR_REG_EVENT : integer := 3;
Constant INTR_REG_EVENT_INV : integer := 4;
Constant INTR_POS_EDGE_DETECT : integer := 5;
Constant INTR_NEG_EDGE_DETECT : integer := 6;
end ipif_pkg;
package body ipif_pkg is
-------------------------------------------------------------------------------
-- Function log2 -- returns number of bits needed to encode x choices
-- x = 0 returns 0
-- x = 1 returns 0
-- x = 2 returns 1
-- x = 4 returns 2, etc.
-------------------------------------------------------------------------------
--
function log2(x : natural) return integer is
variable i : integer := 0;
variable val: integer := 1;
begin
if x = 0 then return 0;
else
for j in 0 to 29 loop -- for loop for XST
if val >= x then null;
else
i := i+1;
val := val*2;
end if;
end loop;
-- Fix per CR520627 XST was ignoring this anyway and printing a
-- Warning in SRP file. This will get rid of the warning and not
-- impact simulation.
-- synthesis translate_off
assert val >= x
report "Function log2 received argument larger" &
" than its capability of 2^30. "
severity failure;
-- synthesis translate_on
return i;
end if;
end function log2;
--------------------------------------------------------------------------------
-- Function clog2 - returns the integer ceiling of the base 2 logarithm of x,
-- i.e., the least integer greater than or equal to log2(x).
--------------------------------------------------------------------------------
function clog2(x : positive) return natural is
variable r : natural := 0;
variable rp : natural := 1; -- rp tracks the value 2**r
begin
while rp < x loop -- Termination condition T: x <= 2**r
-- Loop invariant L: 2**(r-1) < x
r := r + 1;
if rp > integer'high - rp then exit; end if; -- If doubling rp overflows
-- the integer range, the doubled value would exceed x, so safe to exit.
rp := rp + rp;
end loop;
-- L and T <-> 2**(r-1) < x <= 2**r <-> (r-1) < log2(x) <= r
return r; --
end clog2;
-------------------------------------------------------------------------------
-- Function Definitions
-------------------------------------------------------------------------------
-----------------------------------------------------------------------------
-- Function "="
--
-- This function can be used to overload the "=" operator when comparing
-- strings.
-----------------------------------------------------------------------------
function "=" (s1: in string; s2: in string) return boolean is
constant tc: character := ' '; -- string termination character
variable i: integer := 1;
variable v1 : string(1 to s1'length) := s1;
variable v2 : string(1 to s2'length) := s2;
begin
while (i <= v1'length) and (v1(i) /= tc) and
(i <= v2'length) and (v2(i) /= tc) and
(v1(i) = v2(i))
loop
i := i+1;
end loop;
return ((i > v1'length) or (v1(i) = tc)) and
((i > v2'length) or (v2(i) = tc));
end;
----------------------------------------------------------------------------
-- Function equaluseCase
--
-- This function returns true if case sensitive string comparison determines
-- that str1 and str2 are the same.
-----------------------------------------------------------------------------
FUNCTION equaluseCase( str1, str2 : STRING ) RETURN BOOLEAN IS
CONSTANT len1 : INTEGER := str1'length;
CONSTANT len2 : INTEGER := str2'length;
VARIABLE equal : BOOLEAN := TRUE;
BEGIN
IF NOT (len1=len2) THEN
equal := FALSE;
ELSE
FOR i IN str1'range LOOP
IF NOT (str1(i) = str2(i)) THEN
equal := FALSE;
END IF;
END LOOP;
END IF;
RETURN equal;
END equaluseCase;
-----------------------------------------------------------------------------
-- Function calc_num_ce
--
-- This function is used to process the array specifying the number of Chip
-- Enables required for a Base Address specification. The array is input to
-- the function and an integer is returned reflecting the total number of
-- Chip Enables required for the CE, RdCE, and WrCE Buses
-----------------------------------------------------------------------------
function calc_num_ce (ce_num_array : INTEGER_ARRAY_TYPE) return integer is
Variable ce_num_sum : integer := 0;
begin
for i in 0 to (ce_num_array'length)-1 loop
ce_num_sum := ce_num_sum + ce_num_array(i);
End loop;
return(ce_num_sum);
end function calc_num_ce;
-----------------------------------------------------------------------------
-- Function calc_start_ce_index
--
-- This function is used to process the array specifying the number of Chip
-- Enables required for a Base Address specification. The CE Size array is
-- input to the function and an integer index representing the index of the
-- target module in the ce_num_array. An integer is returned reflecting the
-- starting index of the assigned Chip Enables within the CE, RdCE, and
-- WrCE Buses.
-----------------------------------------------------------------------------
function calc_start_ce_index (ce_num_array : INTEGER_ARRAY_TYPE;
index : integer) return integer is
Variable ce_num_sum : integer := 0;
begin
If (index = 0) Then
ce_num_sum := 0;
else
for i in 0 to index-1 loop
ce_num_sum := ce_num_sum + ce_num_array(i);
End loop;
End if;
return(ce_num_sum);
end function calc_start_ce_index;
-----------------------------------------------------------------------------
-- Function get_min_dwidth
--
-- This function is used to process the array specifying the data bus width
-- for each of the target modules. The dwidth_array is input to the function
-- and an integer is returned that is the smallest value found of all the
-- entries in the array.
-----------------------------------------------------------------------------
function get_min_dwidth (dwidth_array: INTEGER_ARRAY_TYPE) return integer is
Variable temp_min : Integer := 1024;
begin
for i in 0 to dwidth_array'length-1 loop
If (dwidth_array(i) < temp_min) Then
temp_min := dwidth_array(i);
else
null;
End if;
End loop;
return(temp_min);
end function get_min_dwidth;
-----------------------------------------------------------------------------
-- Function get_max_dwidth
--
-- This function is used to process the array specifying the data bus width
-- for each of the target modules. The dwidth_array is input to the function
-- and an integer is returned that is the largest value found of all the
-- entries in the array.
-----------------------------------------------------------------------------
function get_max_dwidth (dwidth_array: INTEGER_ARRAY_TYPE) return integer is
Variable temp_max : Integer := 0;
begin
for i in 0 to dwidth_array'length-1 loop
If (dwidth_array(i) > temp_max) Then
temp_max := dwidth_array(i);
else
null;
End if;
End loop;
return(temp_max);
end function get_max_dwidth;
-----------------------------------------------------------------------------
-- Function S32
--
-- This function is used to expand an input string to 32 characters by
-- padding with spaces. If the input string is larger than 32 characters,
-- it will truncate to 32 characters.
-----------------------------------------------------------------------------
function S32 (in_string : string) return string is
constant OUTPUT_STRING_LENGTH : integer := 32;
Constant space : character := ' ';
variable new_string : string(1 to 32);
Variable start_index : Integer := in_string'length+1;
begin
If (in_string'length < OUTPUT_STRING_LENGTH) Then
for i in 1 to in_string'length loop
new_string(i) := in_string(i);
End loop;
for j in start_index to OUTPUT_STRING_LENGTH loop
new_string(j) := space;
End loop;
else -- use first 32 chars of in_string (truncate the rest)
for k in 1 to OUTPUT_STRING_LENGTH loop
new_string(k) := in_string(k);
End loop;
End if;
return(new_string);
end function S32;
-----------------------------------------------------------------------------
-- Function get_id_index
--
-- This function is used to process the array specifying the target function
-- assigned to a Base Address pair address range. The id_array and a
-- id number is input to the function. A integer is returned reflecting the
-- array index of the id matching the id input number. This function
-- should only be called if the id number is known to exist in the
-- name_array input. This can be detirmined by using the find_ard_id
-- function.
-----------------------------------------------------------------------------
function get_id_index (id_array :INTEGER_ARRAY_TYPE;
id : integer) return integer is
Variable match : Boolean := false;
Variable match_index : Integer := 10000; -- a really big number!
begin
for array_index in 0 to id_array'length-1 loop
If (match = true) Then -- match already found so do nothing
null;
else -- compare the numbers one by one
match := (id_array(array_index) = id);
If (match) Then
match_index := array_index;
else
null;
End if;
End if;
End loop;
return(match_index);
end function get_id_index;
--------------------------------------------------------------------------------
-- get_id_index but return a value in bounds on error (iboe).
--
-- This function is the same as get_id_index, except that when id does
-- not exist in id_array, the value returned is any index that is
-- within the index range of id_array.
--
-- This function would normally only be used where function find_ard_id
-- is used to establish the existence of id but, even when non-existent,
-- an element of one of the ARD arrays will be computed from the
-- returned get_id_index_iboe value. See, e.g., function bits_needed_for_vac
-- and the example call, below
--
-- bits_needed_for_vac(
-- find_ard_id(C_ARD_ID_ARRAY, IPIF_RDFIFO_DATA),
-- C_ARD_DEPENDENT_PROPS_ARRAY(get_id_index_iboe(C_ARD_ID_ARRAY,
-- IPIF_RDFIFO_DATA))
-- )
--------------------------------------------------------------------------------
function get_id_index_iboe (id_array :INTEGER_ARRAY_TYPE;
id : integer) return integer is
Variable match : Boolean := false;
Variable match_index : Integer := id_array'left; -- any valid array index
begin
for array_index in 0 to id_array'length-1 loop
If (match = true) Then -- match already found so do nothing
null;
else -- compare the numbers one by one
match := (id_array(array_index) = id);
If (match) Then match_index := array_index;
else null;
End if;
End if;
End loop;
return(match_index);
end function get_id_index_iboe;
-----------------------------------------------------------------------------
-- Function find_ard_id
--
-- This function is used to process the array specifying the target function
-- assigned to a Base Address pair address range. The id_array and a
-- integer id is input to the function. A boolean is returned reflecting the
-- presence (or not) of a number in the array matching the id input number.
-----------------------------------------------------------------------------
function find_ard_id (id_array : INTEGER_ARRAY_TYPE;
id : integer) return boolean is
Variable match : Boolean := false;
begin
for array_index in 0 to id_array'length-1 loop
If (match = true) Then -- match already found so do nothing
null;
else -- compare the numbers one by one
match := (id_array(array_index) = id);
End if;
End loop;
return(match);
end function find_ard_id;
-----------------------------------------------------------------------------
-- Function find_id_dwidth
--
-- This function is used to find the data width of a target module. If the
-- target module exists, the data width is extracted from the input dwidth
-- array. If the module is not in the ID array, the default input is
-- returned. This function is needed to assign data port size constraints on
-- unconstrained port widths.
-----------------------------------------------------------------------------
function find_id_dwidth (id_array : INTEGER_ARRAY_TYPE;
dwidth_array: INTEGER_ARRAY_TYPE;
id : integer;
default : integer) return integer is
Variable id_present : Boolean := false;
Variable array_index : Integer := 0;
Variable dwidth : Integer := default;
begin
id_present := find_ard_id(id_array, id);
If (id_present) Then
array_index := get_id_index (id_array, id);
dwidth := dwidth_array(array_index);
else
null; -- use default input
End if;
Return (dwidth);
end function find_id_dwidth;
-----------------------------------------------------------------------------
-- Function cnt_ipif_id_blks
--
-- This function is used to detirmine the number of IPIF components specified
-- in the ARD ID Array. An integer is returned representing the number
-- of elements counted. User IDs are ignored in the counting process.
-----------------------------------------------------------------------------
function cnt_ipif_id_blks (id_array : INTEGER_ARRAY_TYPE)
return integer is
Variable blk_count : integer := 0;
Variable temp_id : integer;
begin
for array_index in 0 to id_array'length-1 loop
temp_id := id_array(array_index);
If (temp_id = IPIF_WRFIFO_DATA or
temp_id = IPIF_RDFIFO_DATA or
temp_id = IPIF_RST or
temp_id = IPIF_INTR or
temp_id = IPIF_DMA_SG or
temp_id = IPIF_SESR_SEAR
) Then -- IPIF block found
blk_count := blk_count+1;
else -- go to next loop iteration
null;
End if;
End loop;
return(blk_count);
end function cnt_ipif_id_blks;
-----------------------------------------------------------------------------
-- Function get_ipif_id_dbus_index
--
-- This function is used to detirmine the IPIF relative index of a given
-- ID value. User IDs are ignored in the index detirmination.
-----------------------------------------------------------------------------
function get_ipif_id_dbus_index (id_array : INTEGER_ARRAY_TYPE;
id : integer)
return integer is
Variable blk_index : integer := 0;
Variable temp_id : integer;
Variable id_found : Boolean := false;
begin
for array_index in 0 to id_array'length-1 loop
temp_id := id_array(array_index);
If (id_found) then
null;
elsif (temp_id = id) then
id_found := true;
elsif (temp_id = IPIF_WRFIFO_DATA or
temp_id = IPIF_RDFIFO_DATA or
temp_id = IPIF_RST or
temp_id = IPIF_INTR or
temp_id = IPIF_DMA_SG or
temp_id = IPIF_SESR_SEAR
) Then -- IPIF block found
blk_index := blk_index+1;
else -- user block so do nothing
null;
End if;
End loop;
return(blk_index);
end function get_ipif_id_dbus_index;
------------------------------------------------------------------------------
-- Function: rebuild_slv32_array
--
-- Description:
-- This function takes an input slv32 array and rebuilds an output slv32
-- array composed of the first "num_valid_entry" elements from the input
-- array.
------------------------------------------------------------------------------
function rebuild_slv32_array (slv32_array : SLV32_ARRAY_TYPE;
num_valid_pairs : integer)
return SLV32_ARRAY_TYPE is
--Constants
constant num_elements : Integer := num_valid_pairs * 2;
-- Variables
variable temp_baseaddr32_array : SLV32_ARRAY_TYPE( 0 to num_elements-1);
begin
for array_index in 0 to num_elements-1 loop
temp_baseaddr32_array(array_index) := slv32_array(array_index);
end loop;
return(temp_baseaddr32_array);
end function rebuild_slv32_array;
------------------------------------------------------------------------------
-- Function: rebuild_slv64_array
--
-- Description:
-- This function takes an input slv64 array and rebuilds an output slv64
-- array composed of the first "num_valid_entry" elements from the input
-- array.
------------------------------------------------------------------------------
function rebuild_slv64_array (slv64_array : SLV64_ARRAY_TYPE;
num_valid_pairs : integer)
return SLV64_ARRAY_TYPE is
--Constants
constant num_elements : Integer := num_valid_pairs * 2;
-- Variables
variable temp_baseaddr64_array : SLV64_ARRAY_TYPE( 0 to num_elements-1);
begin
for array_index in 0 to num_elements-1 loop
temp_baseaddr64_array(array_index) := slv64_array(array_index);
end loop;
return(temp_baseaddr64_array);
end function rebuild_slv64_array;
------------------------------------------------------------------------------
-- Function: rebuild_int_array
--
-- Description:
-- This function takes an input integer array and rebuilds an output integer
-- array composed of the first "num_valid_entry" elements from the input
-- array.
------------------------------------------------------------------------------
function rebuild_int_array (int_array : INTEGER_ARRAY_TYPE;
num_valid_entry : integer)
return INTEGER_ARRAY_TYPE is
-- Variables
variable temp_int_array : INTEGER_ARRAY_TYPE( 0 to num_valid_entry-1);
begin
for array_index in 0 to num_valid_entry-1 loop
temp_int_array(array_index) := int_array(array_index);
end loop;
return(temp_int_array);
end function rebuild_int_array;
function bits_needed_for_vac(
fifo_present: boolean;
dependent_props : DEPENDENT_PROPS_TYPE
) return integer is
begin
if not fifo_present then
return 1; -- Zero would be better but leads to "0 to -1" null
-- ranges that are not handled by XST Flint or earlier
-- because of the negative index.
else
return
log2(1 + dependent_props(FIFO_CAPACITY_BITS) /
dependent_props(RD_WIDTH_BITS)
);
end if;
end function bits_needed_for_vac;
function bits_needed_for_occ(
fifo_present: boolean;
dependent_props : DEPENDENT_PROPS_TYPE
) return integer is
begin
if not fifo_present then
return 1; -- Zero would be better but leads to "0 to -1" null
-- ranges that are not handled by XST Flint or earlier
-- because of the negative index.
else
return
log2(1 + dependent_props(FIFO_CAPACITY_BITS) /
dependent_props(WR_WIDTH_BITS)
);
end if;
end function bits_needed_for_occ;
function eff_dp(id : integer;
dep_prop : integer;
value : integer) return integer is
variable dp : integer := dep_prop;
type bo2na_type is array (boolean) of natural;
constant bo2na : bo2na_type := (0, 1);
begin
if value /= 0 then return value; end if; -- Not default
case id is
when IPIF_CHDMA_CHANNELS =>
-------------------
return( bo2na(dp = CLK_PERIOD_PS ) * 10000
+ bo2na(dp = PACKET_WAIT_UNIT_NS ) * 1000000
+ bo2na(dp = BURST_SIZE ) * 16
);
when others => return 0;
end case;
end eff_dp;
function populate_intr_mode_array (num_user_intr : integer;
intr_capture_mode : integer)
return INTEGER_ARRAY_TYPE is
variable intr_mode_array : INTEGER_ARRAY_TYPE(0 to num_user_intr-1);
begin
for i in 0 to num_user_intr-1 loop
intr_mode_array(i) := intr_capture_mode;
end loop;
return intr_mode_array;
end function populate_intr_mode_array;
function add_intr_ard_id_array(include_intr : boolean;
ard_id_array : INTEGER_ARRAY_TYPE)
return INTEGER_ARRAY_TYPE is
variable intr_ard_id_array : INTEGER_ARRAY_TYPE(0 to ard_id_array'length);
begin
intr_ard_id_array(0 to ard_id_array'length-1) := ard_id_array;
if include_intr then
intr_ard_id_array(ard_id_array'length) := IPIF_INTR;
return intr_ard_id_array;
else
return ard_id_array;
end if;
end function add_intr_ard_id_array;
function add_intr_ard_addr_range_array(include_intr : boolean;
ZERO_ADDR_PAD : std_logic_vector;
intr_baseaddr : std_logic_vector;
intr_highaddr : std_logic_vector;
ard_id_array : INTEGER_ARRAY_TYPE;
ard_addr_range_array : SLV64_ARRAY_TYPE)
return SLV64_ARRAY_TYPE is
variable intr_ard_addr_range_array : SLV64_ARRAY_TYPE(0 to ard_addr_range_array'length+1);
begin
intr_ard_addr_range_array(0 to ard_addr_range_array'length-1) := ard_addr_range_array;
if include_intr then
intr_ard_addr_range_array(2*get_id_index(ard_id_array,IPIF_INTR))
:= ZERO_ADDR_PAD & intr_baseaddr;
intr_ard_addr_range_array(2*get_id_index(ard_id_array,IPIF_INTR)+1)
:= ZERO_ADDR_PAD & intr_highaddr;
return intr_ard_addr_range_array;
else
return ard_addr_range_array;
end if;
end function add_intr_ard_addr_range_array;
function add_intr_ard_dwidth_array(include_intr : boolean;
intr_dwidth : integer;
ard_id_array : INTEGER_ARRAY_TYPE;
ard_dwidth_array : INTEGER_ARRAY_TYPE)
return INTEGER_ARRAY_TYPE is
variable intr_ard_dwidth_array : INTEGER_ARRAY_TYPE(0 to ard_dwidth_array'length);
begin
intr_ard_dwidth_array(0 to ard_dwidth_array'length-1) := ard_dwidth_array;
if include_intr then
intr_ard_dwidth_array(get_id_index(ard_id_array, IPIF_INTR)) := intr_dwidth;
return intr_ard_dwidth_array;
else
return ard_dwidth_array;
end if;
end function add_intr_ard_dwidth_array;
function add_intr_ard_num_ce_array(include_intr : boolean;
ard_id_array : INTEGER_ARRAY_TYPE;
ard_num_ce_array : INTEGER_ARRAY_TYPE)
return INTEGER_ARRAY_TYPE is
variable intr_ard_num_ce_array : INTEGER_ARRAY_TYPE(0 to ard_num_ce_array'length);
begin
intr_ard_num_ce_array(0 to ard_num_ce_array'length-1) := ard_num_ce_array;
if include_intr then
intr_ard_num_ce_array(get_id_index(ard_id_array, IPIF_INTR)) := 16;
return intr_ard_num_ce_array;
else
return ard_num_ce_array;
end if;
end function add_intr_ard_num_ce_array;
end package body ipif_pkg;
|
-- IPIF Common Library Package
-------------------------------------------------------------------------------
--
-- *************************************************************************
-- ** **
-- ** DISCLAIMER OF LIABILITY **
-- ** **
-- ** This text/file contains proprietary, confidential **
-- ** information of Xilinx, Inc., is distributed under **
-- ** license from Xilinx, Inc., and may be used, copied **
-- ** and/or disclosed only pursuant to the terms of a valid **
-- ** license agreement with Xilinx, Inc. Xilinx hereby **
-- ** grants you a license to use this text/file solely for **
-- ** design, simulation, implementation and creation of **
-- ** design files limited to Xilinx devices or technologies. **
-- ** Use with non-Xilinx devices or technologies is expressly **
-- ** prohibited and immediately terminates your license unless **
-- ** covered by a separate agreement. **
-- ** **
-- ** Xilinx is providing this design, code, or information **
-- ** "as-is" solely for use in developing programs and **
-- ** solutions for Xilinx devices, with no obligation on the **
-- ** part of Xilinx to provide support. By providing this design, **
-- ** code, or information as one possible implementation of **
-- ** this feature, application or standard, Xilinx is making no **
-- ** representation that this implementation is free from any **
-- ** claims of infringement. You are responsible for obtaining **
-- ** any rights you may require for your implementation. **
-- ** Xilinx expressly disclaims any warranty whatsoever with **
-- ** respect to the adequacy of the implementation, including **
-- ** but not limited to any warranties or representations that this **
-- ** implementation is free from claims of infringement, implied **
-- ** warranties of merchantability or fitness for a particular **
-- ** purpose. **
-- ** **
-- ** Xilinx products are not intended for use in life support **
-- ** appliances, devices, or systems. Use in such applications is **
-- ** expressly prohibited. **
-- ** **
-- ** Any modifications that are made to the Source Code are **
-- ** done at the users sole risk and will be unsupported. **
-- ** The Xilinx Support Hotline does not have access to source **
-- ** code and therefore cannot answer specific questions related **
-- ** to source HDL. The Xilinx Hotline support of original source **
-- ** code IP shall only address issues and questions related **
-- ** to the standard Netlist version of the core (and thus **
-- ** indirectly, the original core source). **
-- ** **
-- ** Copyright (c) 2002-2010 Xilinx, Inc. All rights reserved. **
-- ** **
-- ** This copyright and support notice must be retained as part **
-- ** of this text at all times. **
-- ** **
-- *************************************************************************
--
-------------------------------------------------------------------------------
-- Filename: ipif_pkg.vhd
-- Version: Intital
-- Description: This file contains the constants and functions used in the
-- ipif common library components.
--
-------------------------------------------------------------------------------
-- Structure:
--
-------------------------------------------------------------------------------
-- Author: DET
-- History:
-- DET 02/21/02 -- Created from proc_common_pkg.vhd
--
-- DET 03/13/02 -- PLB IPIF development updates
-- ^^^^^^
-- - Commented out string types and string functions due to an XST
-- problem with string arrays and functions. THe string array
-- processing functions were replaced with comperable functions
-- operating on integer arrays.
-- ~~~~~~
--
--
-- DET 4/30/2002 Initial
-- ~~~~~~
-- - Added three functions: rebuild_slv32_array, rebuild_slv64_array, and
-- rebuild_int_array to support removal of unused elements from the
-- ARD arrays.
-- ^^^^^^ --
--
-- FLO 8/12/2002
-- ~~~~~~
-- - Added three functions: bits_needed_for_vac, bits_needed_for_occ,
-- and get_id_index_iboe.
-- (Removed provisional functions bits_needed_for_vacancy,
-- bits needed_for_occupancy, and bits_needed_for.)
-- ^^^^^^
--
-- FLO 3/24/2003
-- ~~~~~~
-- - Added dependent property paramters for channelized DMA.
-- - Added common property parameter array type.
-- - Definded the KEYHOLD_BURST common-property parameter.
-- ^^^^^^
--
-- FLO 10/22/2003
-- ~~~~~~
-- - Some adjustment to CHDMA parameterization.
-- - Cleanup of obsolete code and comments. (The former "XST workaround"
-- has become the officially deployed method.)
-- ^^^^^^
--
-- LSS 03/24/2004
-- ~~~~~~
-- - Added 5 functions
-- ^^^^^^
--
-- ALS 09/03/04
-- ^^^^^^
-- -- Added constants to describe the channel protocols used in MCH_OPB_IPIF
-- ~~~~~~
--
-- DET 1/17/2008 v4_0
-- ~~~~~~
-- - Changed proc_common library version to v4_0
-- - Incorporated new disclaimer header
-- ^^^^^^
--
-------------------------------------------------------------------------------
-- Naming Conventions:
-- active low signals: "*_n"
-- clock signals: "clk", "clk_div#", "clk_#x"
-- reset signals: "rst", "rst_n"
-- generics: "C_*"
-- user defined types: "*_TYPE"
-- state machine next state: "*_ns"
-- state machine current state: "*_cs"
-- combinatorial signals: "*_com"
-- pipelined or register delay signals: "*_d#"
-- counter signals: "*cnt*"
-- clock enable signals: "*_ce"
-- internal version of output port "*_i"
-- device pins: "*_pin"
-- ports: - Names begin with Uppercase
-- processes: "*_PROCESS"
-- component instantiations: "<ENTITY_>I_<#|FUNC>
-------------------------------------------------------------------------------
library ieee;
use ieee.std_logic_1164.all;
-- need conversion function to convert reals/integers to std logic vectors
use ieee.std_logic_arith.all;
use ieee.std_logic_arith.all;
use ieee.std_logic_unsigned.all;
package ipif_pkg is
-------------------------------------------------------------------------------
-- Type Declarations
-------------------------------------------------------------------------------
type SLV32_ARRAY_TYPE is array (natural range <>) of std_logic_vector(0 to 31);
subtype SLV64_TYPE is std_logic_vector(0 to 63);
type SLV64_ARRAY_TYPE is array (natural range <>) of SLV64_TYPE;
type INTEGER_ARRAY_TYPE is array (natural range <>) of integer;
-------------------------------------------------------------------------------
-- Function and Procedure Declarations
-------------------------------------------------------------------------------
function "=" (s1: in string; s2: in string) return boolean;
function equaluseCase( str1, str2 : STRING ) RETURN BOOLEAN;
function calc_num_ce (ce_num_array : INTEGER_ARRAY_TYPE) return integer;
function calc_start_ce_index (ce_num_array : INTEGER_ARRAY_TYPE;
index : integer) return integer;
function get_min_dwidth (dwidth_array: INTEGER_ARRAY_TYPE) return integer;
function get_max_dwidth (dwidth_array: INTEGER_ARRAY_TYPE) return integer;
function S32 (in_string : string) return string;
--------------------------------------------------------------------------------
-- ARD support functions.
-- These function can be useful when operating with the ARD parameterization.
--------------------------------------------------------------------------------
function get_id_index (id_array :INTEGER_ARRAY_TYPE;
id : integer)
return integer;
function get_id_index_iboe (id_array :INTEGER_ARRAY_TYPE;
id : integer)
return integer;
function find_ard_id (id_array : INTEGER_ARRAY_TYPE;
id : integer) return boolean;
function find_id_dwidth (id_array : INTEGER_ARRAY_TYPE;
dwidth_array: INTEGER_ARRAY_TYPE;
id : integer;
default : integer)
return integer;
function cnt_ipif_id_blks (id_array : INTEGER_ARRAY_TYPE) return integer;
function get_ipif_id_dbus_index (id_array : INTEGER_ARRAY_TYPE;
id : integer)
return integer ;
function rebuild_slv32_array (slv32_array : SLV32_ARRAY_TYPE;
num_valid_pairs : integer)
return SLV32_ARRAY_TYPE;
function rebuild_slv64_array (slv64_array : SLV64_ARRAY_TYPE;
num_valid_pairs : integer)
return SLV64_ARRAY_TYPE;
function rebuild_int_array (int_array : INTEGER_ARRAY_TYPE;
num_valid_entry : integer)
return INTEGER_ARRAY_TYPE;
-- 5 Functions Added 3/24/04
function populate_intr_mode_array (num_user_intr : integer;
intr_capture_mode : integer)
return INTEGER_ARRAY_TYPE ;
function add_intr_ard_id_array(include_intr : boolean;
ard_id_array : INTEGER_ARRAY_TYPE)
return INTEGER_ARRAY_TYPE;
function add_intr_ard_addr_range_array(include_intr : boolean;
ZERO_ADDR_PAD : std_logic_vector;
intr_baseaddr : std_logic_vector;
intr_highaddr : std_logic_vector;
ard_id_array : INTEGER_ARRAY_TYPE;
ard_addr_range_array : SLV64_ARRAY_TYPE)
return SLV64_ARRAY_TYPE;
function add_intr_ard_num_ce_array(include_intr : boolean;
ard_id_array : INTEGER_ARRAY_TYPE;
ard_num_ce_array : INTEGER_ARRAY_TYPE)
return INTEGER_ARRAY_TYPE;
function add_intr_ard_dwidth_array(include_intr : boolean;
intr_dwidth : integer;
ard_id_array : INTEGER_ARRAY_TYPE;
ard_dwidth_array : INTEGER_ARRAY_TYPE)
return INTEGER_ARRAY_TYPE;
function log2(x : natural) return integer;
function clog2(x : positive) return natural;
-------------------------------------------------------------------------------
-- Constant Declarations
-------------------------------------------------------------------------------
-------------------------------------------------------------------------------
-- Channel Protocols
-- The constant declarations below give symbolic-name aliases for values that
-- can be used in the C_MCH_PROTOCOL_ARRAY generic of the MCH_OPB_IPIF.
-------------------------------------------------------------------------------
constant XCL : integer := 0;
constant DAG : integer := 1;
--------------------------------------------------------------------------------
-- Address range types.
-- The constant declarations, below, give symbolic-name aliases for values
-- that can be used in the C_ARD_ID_ARRAY generic of IPIFs. The first set
-- gives aliases that are used to include IPIF services.
--------------------------------------------------------------------------------
-- IPIF module aliases
Constant IPIF_INTR : integer := 1;
Constant IPIF_RST : integer := 2;
Constant IPIF_SESR_SEAR : integer := 3;
Constant IPIF_DMA_SG : integer := 4;
Constant IPIF_WRFIFO_REG : integer := 5;
Constant IPIF_WRFIFO_DATA : integer := 6;
Constant IPIF_RDFIFO_REG : integer := 7;
Constant IPIF_RDFIFO_DATA : integer := 8;
Constant IPIF_CHDMA_CHANNELS : integer := 9;
Constant IPIF_CHDMA_GLOBAL_REGS : integer := 10;
Constant CHDMA_STATUS_FIFO : integer := 90;
-- Some predefined user module aliases
Constant USER_00 : integer := 100;
Constant USER_01 : integer := 101;
Constant USER_02 : integer := 102;
Constant USER_03 : integer := 103;
Constant USER_04 : integer := 104;
Constant USER_05 : integer := 105;
Constant USER_06 : integer := 106;
Constant USER_07 : integer := 107;
Constant USER_08 : integer := 108;
Constant USER_09 : integer := 109;
Constant USER_10 : integer := 110;
Constant USER_11 : integer := 111;
Constant USER_12 : integer := 112;
Constant USER_13 : integer := 113;
Constant USER_14 : integer := 114;
Constant USER_15 : integer := 115;
Constant USER_16 : integer := 116;
---( Start of Dependent Properties declarations
--------------------------------------------------------------------------------
-- Declarations for Dependent Properties (properties that depend on the type of
-- the address range, or in other words, address-range-specific parameters).
-- There is one property, i.e. one parameter, encoded as an integer at
-- each index of the properties array. There is one properties array for
-- each address range.
--
-- The C_ARD_DEPENDENT_PROPS_ARRAY generic parameter in (most) IPIFs is such
-- a properties array and it is usually giving its (static) value using a
-- VHDL aggregate construct. (--ToDo, give an example of this.)
--
-- The the "assigned" default value of a dependent property is zero. This value
-- is usually specified the aggregate by leaving its (index) name out so that
-- it is covered by an "others => 0" choice in the aggregate. Some parameters,
-- as noted in the definitions, below, have an "effective" default value that is
-- different from the assigned default value of zero. In such cases, the
-- function, eff_dp, given below, can be used to get the effective value of
-- the dependent property.
--------------------------------------------------------------------------------
constant DEPENDENT_PROPS_SIZE : integer := 32;
subtype DEPENDENT_PROPS_TYPE
is INTEGER_ARRAY_TYPE(0 to DEPENDENT_PROPS_SIZE-1);
type DEPENDENT_PROPS_ARRAY_TYPE
is array (natural range <>) of DEPENDENT_PROPS_TYPE;
--------------------------------------------------------------------------------
-- Below are the indices of dependent properties for the different types of
-- address ranges.
--
-- Example: Let C_ARD_DEPENDENT_PROPS_ARRAY hold the dependent properites
-- for a set of address ranges. Then, e.g.,
--
-- C_ARD_DEPENDENT_PROPS_ARRAY(i)(FIFO_CAPACITY_BITS)
--
-- gives the fifo capacity in bits, provided that the i'th address range
-- is of type IPIF_WRFIFO_DATA or IPIF_RDFIFO_DATA.
--
-- These indices should be referenced only by the names below and never
-- by numerical literals. (The right to change numerical index assignments
-- is reserved; applications using the names will not be affected by such
-- reassignments.)
--------------------------------------------------------------------------------
--
--ToDo, if the interrupt controller parameterization is ever moved to
-- C_ARD_DEPENDENT_PROPS_ARRAY, then the following declarations
-- could be uncommented and used.
---- IPIF_INTR IDX
---------------------------------------------------------------------------- ---
constant EXCLUDE_DEV_ISC : integer := 0;
-- 1 specifies that only the global interrupt
-- enable is present in the device interrupt source
-- controller and that the only source of interrupts
-- in the device is the IP interrupt source controller.
-- 0 specifies that the full device interrupt
-- source controller structure will be included.
constant INCLUDE_DEV_PENCODER : integer := 1;
-- 1 will include the Device IID in the device interrupt
-- source controller, 0 will exclude it.
--
-- IPIF_WRFIFO_DATA or IPIF_RDFIFO_DATA IDX
---------------------------------------------------------------------------- ---
constant FIFO_CAPACITY_BITS : integer := 0;
constant WR_WIDTH_BITS : integer := 1;
constant RD_WIDTH_BITS : integer := 2;
constant EXCLUDE_PACKET_MODE : integer := 3;
-- 1 Don't include packet mode features
-- 0 Include packet mode features
constant EXCLUDE_VACANCY : integer := 4;
-- 1 Don't include vacancy calculation
-- 0 Include vacancy calculation
-- See also the functions
-- bits_needed_for_vac and
-- bits_needed_for_occ that are declared below.
constant INCLUDE_DRE : integer := 5;
constant INCLUDE_AUTOPUSH_POP : integer := 6;
constant AUTOPUSH_POP_CE : integer := 7;
constant INCLUDE_CSUM : integer := 8;
--------------------------------------------------------------------------------
--
-- DMA_SG IDX
---------------------------------------------------------------------------- ---
--------------------------------------------------------------------------------
-- IPIF_CHDMA_CHANNELS IDX
---------------------------------------------------------------------------- ---
constant NUM_SUBS_FOR_PHYS_0 : integer :=0;
constant NUM_SUBS_FOR_PHYS_1 : integer :=1;
constant NUM_SUBS_FOR_PHYS_2 : integer :=2;
constant NUM_SUBS_FOR_PHYS_3 : integer :=3;
constant NUM_SUBS_FOR_PHYS_4 : integer :=4;
constant NUM_SUBS_FOR_PHYS_5 : integer :=5;
constant NUM_SUBS_FOR_PHYS_6 : integer :=6;
constant NUM_SUBS_FOR_PHYS_7 : integer :=7;
constant NUM_SUBS_FOR_PHYS_8 : integer :=8;
constant NUM_SUBS_FOR_PHYS_9 : integer :=9;
constant NUM_SUBS_FOR_PHYS_10 : integer :=10;
constant NUM_SUBS_FOR_PHYS_11 : integer :=11;
constant NUM_SUBS_FOR_PHYS_12 : integer :=12;
constant NUM_SUBS_FOR_PHYS_13 : integer :=13;
constant NUM_SUBS_FOR_PHYS_14 : integer :=14;
constant NUM_SUBS_FOR_PHYS_15 : integer :=15;
-- Gives the number of sub-channels for physical channel i.
--
-- These constants, which will be MAX_NUM_PHYS_CHANNELS in number (see
-- below), have consecutive values starting with 0 for
-- NUM_SUBS_FOR_PHYS_0. (The constants serve the purpose of giving symbolic
-- names for use in the dependent-properties aggregates that parameterize
-- an IPIF_CHDMA_CHANNELS address range.)
--
-- [Users can ignore this note for developers
-- If the number of physical channels changes, both the
-- IPIF_CHDMA_CHANNELS constants and MAX_NUM_PHYS_CHANNELS,
-- below, must be adjusted.
-- (Use of an array constant or a function of the form
-- NUM_SUBS_FOR_PHYS(i) to define the indices
-- runs afoul of LRM restrictions on non-locally static aggregate
-- choices. (Further, the LRM imposes perhaps unnecessarily
-- strict limits on what qualifies as a locally static primary.)
-- Note: This information is supplied for the benefit of anyone seeking
-- to improve the way that these NUM_SUBS_FOR_PHYS parameter
-- indices are defined.)
-- End of note for developers ]
--
-- The value associated with any index NUM_SUBS_FOR_PHYS_i in the
-- dependent-properties array must be even since TX and RX channels
-- come in pairs with the TX followed immediately by
-- the corresponding RX.
--
constant NUM_SIMPLE_DMA_CHANS : integer :=16;
-- The number of simple DMA channels.
constant NUM_SIMPLE_SG_CHANS : integer :=17;
-- The number of simple SG channels.
constant INTR_COALESCE : integer :=18;
-- 0 Interrupt coalescing is disabled
-- 1 Interrupt coalescing is enabled
constant CLK_PERIOD_PS : integer :=19;
-- The period of the OPB Bus clock in ps.
-- The default value of 0 is a special value that
-- is synonymous with 10000 ps (10 ns).
-- The value for CLK_PERIOD_PS is relevant only if (INTR_COALESCE = 1).
constant PACKET_WAIT_UNIT_NS : integer :=20;
-- Gives the unit for used for timing of pack-wait bounds.
-- The default value of 0 is a special value that
-- is synonymous with 1,000,000 ns (1 ms) and a non-default
-- value is typically only used for testing.
-- Relevant only if (INTR_COALESCE = 1).
constant BURST_SIZE : integer :=21;
-- 1, 2, 4, 8 or 16
-- The default value of 0 is a special value that
-- is synonymous with a burst size of 16.
-- Setting the BURST_SIZE to 1 effectively disables
-- bursts.
constant REMAINDER_AS_SINGLES : integer :=22;
-- 0 Remainder handled as a short burst
-- 1 Remainder handled as a series of singles
--------------------------------------------------------------------------------
-- The constant below is not the index of a dependent-properties
-- parameter (and, as such, would never appear as a choice in a
-- dependent-properties aggregate). Rather, it is fixed to the maximum
-- number of physical channels that an Address Range of type
-- IPIF_CHDMA_CHANNELS supports. It must be maintained in conjuction with
-- the constants named, e.g., NUM_SUBS_FOR_PHYS_15, above.
--------------------------------------------------------------------------------
constant MAX_NUM_PHYS_CHANNELS : natural := 16;
--------------------------------------------------------------------------
-- EXAMPLE: Here is an example dependent-properties aggregate for an
-- address range of type IPIF_CHDMA_CHANNELS.
-- To have a compact list of all of the CHDMA parameters, all are
-- shown, however three are commented out and the unneeded
-- MUM_SUBS_FOR_PHYS_x are excluded. The "OTHERS => 0" association
-- gives these parameters their default values, such that, for the example
--
-- - All physical channels above 2 have zero subchannels (effectively,
-- these physical channels are not used)
-- - There are no simple SG channels
-- - The packet-wait time unit is 1 ms
-- - Burst size is 16
--------------------------------------------------------------------------
-- (
-- NUM_SUBS_FOR_PHYS_0 => 8,
-- NUM_SUBS_FOR_PHYS_1 => 4,
-- NUM_SUBS_FOR_PHYS_2 => 14,
-- NUM_SIMPLE_DMA_CHANS => 1,
-- --NUM_SIMPLE_SG_CHANS => 5,
-- INTR_COALESCE => 1,
-- CLK_PERIOD_PS => 20000,
-- --PACKET_WAIT_UNIT_NS => 50000,
-- --BURST_SIZE => 1,
-- REMAINDER_AS_SINGLES => 1,
-- OTHERS => 0
-- )
--
--------------------------------------------------------------------------------
--------------------------------------------------------------------------------
-- Calculates the number of bits needed to convey the vacancy (emptiness) of
-- the fifo described by dependent_props, if fifo_present. If not fifo_present,
-- returns 0 (or the smallest value allowed by tool limitations on null arrays)
-- without making reference to dependent_props.
--------------------------------------------------------------------------------
function bits_needed_for_vac(
fifo_present: boolean;
dependent_props : DEPENDENT_PROPS_TYPE
) return integer;
--------------------------------------------------------------------------------
-- Calculates the number of bits needed to convey the occupancy (fullness) of
-- the fifo described by dependent_props, if fifo_present. If not fifo_present,
-- returns 0 (or the smallest value allowed by tool limitations on null arrays)
-- without making reference to dependent_props.
--------------------------------------------------------------------------------
function bits_needed_for_occ(
fifo_present: boolean;
dependent_props : DEPENDENT_PROPS_TYPE
) return integer;
--------------------------------------------------------------------------------
-- Function eff_dp.
--
-- For some of the dependent properties, the default value of zero is meant
-- to imply an effective default value of other than zero (see e.g.
-- PKT_WAIT_UNIT_NS for the IPIF_CHDMA_CHANNELS address-range type). The
-- following function is used to get the (possibly default-adjusted)
-- value for a dependent property.
--
-- Example call:
--
-- eff_value_of_param :=
-- eff_dp(
-- C_IPIF_CHDMA_CHANNELS,
-- PACKET_WAIT_UNIT_NS,
-- C_ARD_DEPENDENT_PROPS_ARRAY(i)(PACKET_WAIT_UNIT_NS)
-- );
--
-- where C_ARD_DEPENDENT_PROPS_ARRAY(i) is an object of type
-- DEPENDENT_PROPS_ARRAY_TYPE, that was parameterized for an address range of
-- type C_IPIF_CHDMA_CHANNELS.
--------------------------------------------------------------------------------
function eff_dp(id : integer; -- The type of address range.
dep_prop : integer; -- The index of the dependent prop.
value : integer -- The value at that index.
) return integer; -- The effective value, possibly adjusted
-- if value has the default value of 0.
---) End of Dependent Properties declarations
--------------------------------------------------------------------------------
-- Declarations for Common Properties (properties that apply regardless of the
-- type of the address range). Structurally, these work the same as
-- the dependent properties.
--------------------------------------------------------------------------------
constant COMMON_PROPS_SIZE : integer := 2;
subtype COMMON_PROPS_TYPE
is INTEGER_ARRAY_TYPE(0 to COMMON_PROPS_SIZE-1);
type COMMON_PROPS_ARRAY_TYPE
is array (natural range <>) of COMMON_PROPS_TYPE;
--------------------------------------------------------------------------------
-- Below are the indices of the common properties.
--
-- These indices should be referenced only by the names below and never
-- by numerical literals.
-- IDX
---------------------------------------------------------------------------- ---
constant KEYHOLE_BURST : integer := 0;
-- 1 All addresses of a burst are forced to the initial
-- address of the burst.
-- 0 Burst addresses follow the bus protocol.
-- IP interrupt mode array constants
Constant INTR_PASS_THRU : integer := 1;
Constant INTR_PASS_THRU_INV : integer := 2;
Constant INTR_REG_EVENT : integer := 3;
Constant INTR_REG_EVENT_INV : integer := 4;
Constant INTR_POS_EDGE_DETECT : integer := 5;
Constant INTR_NEG_EDGE_DETECT : integer := 6;
end ipif_pkg;
package body ipif_pkg is
-------------------------------------------------------------------------------
-- Function log2 -- returns number of bits needed to encode x choices
-- x = 0 returns 0
-- x = 1 returns 0
-- x = 2 returns 1
-- x = 4 returns 2, etc.
-------------------------------------------------------------------------------
--
function log2(x : natural) return integer is
variable i : integer := 0;
variable val: integer := 1;
begin
if x = 0 then return 0;
else
for j in 0 to 29 loop -- for loop for XST
if val >= x then null;
else
i := i+1;
val := val*2;
end if;
end loop;
-- Fix per CR520627 XST was ignoring this anyway and printing a
-- Warning in SRP file. This will get rid of the warning and not
-- impact simulation.
-- synthesis translate_off
assert val >= x
report "Function log2 received argument larger" &
" than its capability of 2^30. "
severity failure;
-- synthesis translate_on
return i;
end if;
end function log2;
--------------------------------------------------------------------------------
-- Function clog2 - returns the integer ceiling of the base 2 logarithm of x,
-- i.e., the least integer greater than or equal to log2(x).
--------------------------------------------------------------------------------
function clog2(x : positive) return natural is
variable r : natural := 0;
variable rp : natural := 1; -- rp tracks the value 2**r
begin
while rp < x loop -- Termination condition T: x <= 2**r
-- Loop invariant L: 2**(r-1) < x
r := r + 1;
if rp > integer'high - rp then exit; end if; -- If doubling rp overflows
-- the integer range, the doubled value would exceed x, so safe to exit.
rp := rp + rp;
end loop;
-- L and T <-> 2**(r-1) < x <= 2**r <-> (r-1) < log2(x) <= r
return r; --
end clog2;
-------------------------------------------------------------------------------
-- Function Definitions
-------------------------------------------------------------------------------
-----------------------------------------------------------------------------
-- Function "="
--
-- This function can be used to overload the "=" operator when comparing
-- strings.
-----------------------------------------------------------------------------
function "=" (s1: in string; s2: in string) return boolean is
constant tc: character := ' '; -- string termination character
variable i: integer := 1;
variable v1 : string(1 to s1'length) := s1;
variable v2 : string(1 to s2'length) := s2;
begin
while (i <= v1'length) and (v1(i) /= tc) and
(i <= v2'length) and (v2(i) /= tc) and
(v1(i) = v2(i))
loop
i := i+1;
end loop;
return ((i > v1'length) or (v1(i) = tc)) and
((i > v2'length) or (v2(i) = tc));
end;
----------------------------------------------------------------------------
-- Function equaluseCase
--
-- This function returns true if case sensitive string comparison determines
-- that str1 and str2 are the same.
-----------------------------------------------------------------------------
FUNCTION equaluseCase( str1, str2 : STRING ) RETURN BOOLEAN IS
CONSTANT len1 : INTEGER := str1'length;
CONSTANT len2 : INTEGER := str2'length;
VARIABLE equal : BOOLEAN := TRUE;
BEGIN
IF NOT (len1=len2) THEN
equal := FALSE;
ELSE
FOR i IN str1'range LOOP
IF NOT (str1(i) = str2(i)) THEN
equal := FALSE;
END IF;
END LOOP;
END IF;
RETURN equal;
END equaluseCase;
-----------------------------------------------------------------------------
-- Function calc_num_ce
--
-- This function is used to process the array specifying the number of Chip
-- Enables required for a Base Address specification. The array is input to
-- the function and an integer is returned reflecting the total number of
-- Chip Enables required for the CE, RdCE, and WrCE Buses
-----------------------------------------------------------------------------
function calc_num_ce (ce_num_array : INTEGER_ARRAY_TYPE) return integer is
Variable ce_num_sum : integer := 0;
begin
for i in 0 to (ce_num_array'length)-1 loop
ce_num_sum := ce_num_sum + ce_num_array(i);
End loop;
return(ce_num_sum);
end function calc_num_ce;
-----------------------------------------------------------------------------
-- Function calc_start_ce_index
--
-- This function is used to process the array specifying the number of Chip
-- Enables required for a Base Address specification. The CE Size array is
-- input to the function and an integer index representing the index of the
-- target module in the ce_num_array. An integer is returned reflecting the
-- starting index of the assigned Chip Enables within the CE, RdCE, and
-- WrCE Buses.
-----------------------------------------------------------------------------
function calc_start_ce_index (ce_num_array : INTEGER_ARRAY_TYPE;
index : integer) return integer is
Variable ce_num_sum : integer := 0;
begin
If (index = 0) Then
ce_num_sum := 0;
else
for i in 0 to index-1 loop
ce_num_sum := ce_num_sum + ce_num_array(i);
End loop;
End if;
return(ce_num_sum);
end function calc_start_ce_index;
-----------------------------------------------------------------------------
-- Function get_min_dwidth
--
-- This function is used to process the array specifying the data bus width
-- for each of the target modules. The dwidth_array is input to the function
-- and an integer is returned that is the smallest value found of all the
-- entries in the array.
-----------------------------------------------------------------------------
function get_min_dwidth (dwidth_array: INTEGER_ARRAY_TYPE) return integer is
Variable temp_min : Integer := 1024;
begin
for i in 0 to dwidth_array'length-1 loop
If (dwidth_array(i) < temp_min) Then
temp_min := dwidth_array(i);
else
null;
End if;
End loop;
return(temp_min);
end function get_min_dwidth;
-----------------------------------------------------------------------------
-- Function get_max_dwidth
--
-- This function is used to process the array specifying the data bus width
-- for each of the target modules. The dwidth_array is input to the function
-- and an integer is returned that is the largest value found of all the
-- entries in the array.
-----------------------------------------------------------------------------
function get_max_dwidth (dwidth_array: INTEGER_ARRAY_TYPE) return integer is
Variable temp_max : Integer := 0;
begin
for i in 0 to dwidth_array'length-1 loop
If (dwidth_array(i) > temp_max) Then
temp_max := dwidth_array(i);
else
null;
End if;
End loop;
return(temp_max);
end function get_max_dwidth;
-----------------------------------------------------------------------------
-- Function S32
--
-- This function is used to expand an input string to 32 characters by
-- padding with spaces. If the input string is larger than 32 characters,
-- it will truncate to 32 characters.
-----------------------------------------------------------------------------
function S32 (in_string : string) return string is
constant OUTPUT_STRING_LENGTH : integer := 32;
Constant space : character := ' ';
variable new_string : string(1 to 32);
Variable start_index : Integer := in_string'length+1;
begin
If (in_string'length < OUTPUT_STRING_LENGTH) Then
for i in 1 to in_string'length loop
new_string(i) := in_string(i);
End loop;
for j in start_index to OUTPUT_STRING_LENGTH loop
new_string(j) := space;
End loop;
else -- use first 32 chars of in_string (truncate the rest)
for k in 1 to OUTPUT_STRING_LENGTH loop
new_string(k) := in_string(k);
End loop;
End if;
return(new_string);
end function S32;
-----------------------------------------------------------------------------
-- Function get_id_index
--
-- This function is used to process the array specifying the target function
-- assigned to a Base Address pair address range. The id_array and a
-- id number is input to the function. A integer is returned reflecting the
-- array index of the id matching the id input number. This function
-- should only be called if the id number is known to exist in the
-- name_array input. This can be detirmined by using the find_ard_id
-- function.
-----------------------------------------------------------------------------
function get_id_index (id_array :INTEGER_ARRAY_TYPE;
id : integer) return integer is
Variable match : Boolean := false;
Variable match_index : Integer := 10000; -- a really big number!
begin
for array_index in 0 to id_array'length-1 loop
If (match = true) Then -- match already found so do nothing
null;
else -- compare the numbers one by one
match := (id_array(array_index) = id);
If (match) Then
match_index := array_index;
else
null;
End if;
End if;
End loop;
return(match_index);
end function get_id_index;
--------------------------------------------------------------------------------
-- get_id_index but return a value in bounds on error (iboe).
--
-- This function is the same as get_id_index, except that when id does
-- not exist in id_array, the value returned is any index that is
-- within the index range of id_array.
--
-- This function would normally only be used where function find_ard_id
-- is used to establish the existence of id but, even when non-existent,
-- an element of one of the ARD arrays will be computed from the
-- returned get_id_index_iboe value. See, e.g., function bits_needed_for_vac
-- and the example call, below
--
-- bits_needed_for_vac(
-- find_ard_id(C_ARD_ID_ARRAY, IPIF_RDFIFO_DATA),
-- C_ARD_DEPENDENT_PROPS_ARRAY(get_id_index_iboe(C_ARD_ID_ARRAY,
-- IPIF_RDFIFO_DATA))
-- )
--------------------------------------------------------------------------------
function get_id_index_iboe (id_array :INTEGER_ARRAY_TYPE;
id : integer) return integer is
Variable match : Boolean := false;
Variable match_index : Integer := id_array'left; -- any valid array index
begin
for array_index in 0 to id_array'length-1 loop
If (match = true) Then -- match already found so do nothing
null;
else -- compare the numbers one by one
match := (id_array(array_index) = id);
If (match) Then match_index := array_index;
else null;
End if;
End if;
End loop;
return(match_index);
end function get_id_index_iboe;
-----------------------------------------------------------------------------
-- Function find_ard_id
--
-- This function is used to process the array specifying the target function
-- assigned to a Base Address pair address range. The id_array and a
-- integer id is input to the function. A boolean is returned reflecting the
-- presence (or not) of a number in the array matching the id input number.
-----------------------------------------------------------------------------
function find_ard_id (id_array : INTEGER_ARRAY_TYPE;
id : integer) return boolean is
Variable match : Boolean := false;
begin
for array_index in 0 to id_array'length-1 loop
If (match = true) Then -- match already found so do nothing
null;
else -- compare the numbers one by one
match := (id_array(array_index) = id);
End if;
End loop;
return(match);
end function find_ard_id;
-----------------------------------------------------------------------------
-- Function find_id_dwidth
--
-- This function is used to find the data width of a target module. If the
-- target module exists, the data width is extracted from the input dwidth
-- array. If the module is not in the ID array, the default input is
-- returned. This function is needed to assign data port size constraints on
-- unconstrained port widths.
-----------------------------------------------------------------------------
function find_id_dwidth (id_array : INTEGER_ARRAY_TYPE;
dwidth_array: INTEGER_ARRAY_TYPE;
id : integer;
default : integer) return integer is
Variable id_present : Boolean := false;
Variable array_index : Integer := 0;
Variable dwidth : Integer := default;
begin
id_present := find_ard_id(id_array, id);
If (id_present) Then
array_index := get_id_index (id_array, id);
dwidth := dwidth_array(array_index);
else
null; -- use default input
End if;
Return (dwidth);
end function find_id_dwidth;
-----------------------------------------------------------------------------
-- Function cnt_ipif_id_blks
--
-- This function is used to detirmine the number of IPIF components specified
-- in the ARD ID Array. An integer is returned representing the number
-- of elements counted. User IDs are ignored in the counting process.
-----------------------------------------------------------------------------
function cnt_ipif_id_blks (id_array : INTEGER_ARRAY_TYPE)
return integer is
Variable blk_count : integer := 0;
Variable temp_id : integer;
begin
for array_index in 0 to id_array'length-1 loop
temp_id := id_array(array_index);
If (temp_id = IPIF_WRFIFO_DATA or
temp_id = IPIF_RDFIFO_DATA or
temp_id = IPIF_RST or
temp_id = IPIF_INTR or
temp_id = IPIF_DMA_SG or
temp_id = IPIF_SESR_SEAR
) Then -- IPIF block found
blk_count := blk_count+1;
else -- go to next loop iteration
null;
End if;
End loop;
return(blk_count);
end function cnt_ipif_id_blks;
-----------------------------------------------------------------------------
-- Function get_ipif_id_dbus_index
--
-- This function is used to detirmine the IPIF relative index of a given
-- ID value. User IDs are ignored in the index detirmination.
-----------------------------------------------------------------------------
function get_ipif_id_dbus_index (id_array : INTEGER_ARRAY_TYPE;
id : integer)
return integer is
Variable blk_index : integer := 0;
Variable temp_id : integer;
Variable id_found : Boolean := false;
begin
for array_index in 0 to id_array'length-1 loop
temp_id := id_array(array_index);
If (id_found) then
null;
elsif (temp_id = id) then
id_found := true;
elsif (temp_id = IPIF_WRFIFO_DATA or
temp_id = IPIF_RDFIFO_DATA or
temp_id = IPIF_RST or
temp_id = IPIF_INTR or
temp_id = IPIF_DMA_SG or
temp_id = IPIF_SESR_SEAR
) Then -- IPIF block found
blk_index := blk_index+1;
else -- user block so do nothing
null;
End if;
End loop;
return(blk_index);
end function get_ipif_id_dbus_index;
------------------------------------------------------------------------------
-- Function: rebuild_slv32_array
--
-- Description:
-- This function takes an input slv32 array and rebuilds an output slv32
-- array composed of the first "num_valid_entry" elements from the input
-- array.
------------------------------------------------------------------------------
function rebuild_slv32_array (slv32_array : SLV32_ARRAY_TYPE;
num_valid_pairs : integer)
return SLV32_ARRAY_TYPE is
--Constants
constant num_elements : Integer := num_valid_pairs * 2;
-- Variables
variable temp_baseaddr32_array : SLV32_ARRAY_TYPE( 0 to num_elements-1);
begin
for array_index in 0 to num_elements-1 loop
temp_baseaddr32_array(array_index) := slv32_array(array_index);
end loop;
return(temp_baseaddr32_array);
end function rebuild_slv32_array;
------------------------------------------------------------------------------
-- Function: rebuild_slv64_array
--
-- Description:
-- This function takes an input slv64 array and rebuilds an output slv64
-- array composed of the first "num_valid_entry" elements from the input
-- array.
------------------------------------------------------------------------------
function rebuild_slv64_array (slv64_array : SLV64_ARRAY_TYPE;
num_valid_pairs : integer)
return SLV64_ARRAY_TYPE is
--Constants
constant num_elements : Integer := num_valid_pairs * 2;
-- Variables
variable temp_baseaddr64_array : SLV64_ARRAY_TYPE( 0 to num_elements-1);
begin
for array_index in 0 to num_elements-1 loop
temp_baseaddr64_array(array_index) := slv64_array(array_index);
end loop;
return(temp_baseaddr64_array);
end function rebuild_slv64_array;
------------------------------------------------------------------------------
-- Function: rebuild_int_array
--
-- Description:
-- This function takes an input integer array and rebuilds an output integer
-- array composed of the first "num_valid_entry" elements from the input
-- array.
------------------------------------------------------------------------------
function rebuild_int_array (int_array : INTEGER_ARRAY_TYPE;
num_valid_entry : integer)
return INTEGER_ARRAY_TYPE is
-- Variables
variable temp_int_array : INTEGER_ARRAY_TYPE( 0 to num_valid_entry-1);
begin
for array_index in 0 to num_valid_entry-1 loop
temp_int_array(array_index) := int_array(array_index);
end loop;
return(temp_int_array);
end function rebuild_int_array;
function bits_needed_for_vac(
fifo_present: boolean;
dependent_props : DEPENDENT_PROPS_TYPE
) return integer is
begin
if not fifo_present then
return 1; -- Zero would be better but leads to "0 to -1" null
-- ranges that are not handled by XST Flint or earlier
-- because of the negative index.
else
return
log2(1 + dependent_props(FIFO_CAPACITY_BITS) /
dependent_props(RD_WIDTH_BITS)
);
end if;
end function bits_needed_for_vac;
function bits_needed_for_occ(
fifo_present: boolean;
dependent_props : DEPENDENT_PROPS_TYPE
) return integer is
begin
if not fifo_present then
return 1; -- Zero would be better but leads to "0 to -1" null
-- ranges that are not handled by XST Flint or earlier
-- because of the negative index.
else
return
log2(1 + dependent_props(FIFO_CAPACITY_BITS) /
dependent_props(WR_WIDTH_BITS)
);
end if;
end function bits_needed_for_occ;
function eff_dp(id : integer;
dep_prop : integer;
value : integer) return integer is
variable dp : integer := dep_prop;
type bo2na_type is array (boolean) of natural;
constant bo2na : bo2na_type := (0, 1);
begin
if value /= 0 then return value; end if; -- Not default
case id is
when IPIF_CHDMA_CHANNELS =>
-------------------
return( bo2na(dp = CLK_PERIOD_PS ) * 10000
+ bo2na(dp = PACKET_WAIT_UNIT_NS ) * 1000000
+ bo2na(dp = BURST_SIZE ) * 16
);
when others => return 0;
end case;
end eff_dp;
function populate_intr_mode_array (num_user_intr : integer;
intr_capture_mode : integer)
return INTEGER_ARRAY_TYPE is
variable intr_mode_array : INTEGER_ARRAY_TYPE(0 to num_user_intr-1);
begin
for i in 0 to num_user_intr-1 loop
intr_mode_array(i) := intr_capture_mode;
end loop;
return intr_mode_array;
end function populate_intr_mode_array;
function add_intr_ard_id_array(include_intr : boolean;
ard_id_array : INTEGER_ARRAY_TYPE)
return INTEGER_ARRAY_TYPE is
variable intr_ard_id_array : INTEGER_ARRAY_TYPE(0 to ard_id_array'length);
begin
intr_ard_id_array(0 to ard_id_array'length-1) := ard_id_array;
if include_intr then
intr_ard_id_array(ard_id_array'length) := IPIF_INTR;
return intr_ard_id_array;
else
return ard_id_array;
end if;
end function add_intr_ard_id_array;
function add_intr_ard_addr_range_array(include_intr : boolean;
ZERO_ADDR_PAD : std_logic_vector;
intr_baseaddr : std_logic_vector;
intr_highaddr : std_logic_vector;
ard_id_array : INTEGER_ARRAY_TYPE;
ard_addr_range_array : SLV64_ARRAY_TYPE)
return SLV64_ARRAY_TYPE is
variable intr_ard_addr_range_array : SLV64_ARRAY_TYPE(0 to ard_addr_range_array'length+1);
begin
intr_ard_addr_range_array(0 to ard_addr_range_array'length-1) := ard_addr_range_array;
if include_intr then
intr_ard_addr_range_array(2*get_id_index(ard_id_array,IPIF_INTR))
:= ZERO_ADDR_PAD & intr_baseaddr;
intr_ard_addr_range_array(2*get_id_index(ard_id_array,IPIF_INTR)+1)
:= ZERO_ADDR_PAD & intr_highaddr;
return intr_ard_addr_range_array;
else
return ard_addr_range_array;
end if;
end function add_intr_ard_addr_range_array;
function add_intr_ard_dwidth_array(include_intr : boolean;
intr_dwidth : integer;
ard_id_array : INTEGER_ARRAY_TYPE;
ard_dwidth_array : INTEGER_ARRAY_TYPE)
return INTEGER_ARRAY_TYPE is
variable intr_ard_dwidth_array : INTEGER_ARRAY_TYPE(0 to ard_dwidth_array'length);
begin
intr_ard_dwidth_array(0 to ard_dwidth_array'length-1) := ard_dwidth_array;
if include_intr then
intr_ard_dwidth_array(get_id_index(ard_id_array, IPIF_INTR)) := intr_dwidth;
return intr_ard_dwidth_array;
else
return ard_dwidth_array;
end if;
end function add_intr_ard_dwidth_array;
function add_intr_ard_num_ce_array(include_intr : boolean;
ard_id_array : INTEGER_ARRAY_TYPE;
ard_num_ce_array : INTEGER_ARRAY_TYPE)
return INTEGER_ARRAY_TYPE is
variable intr_ard_num_ce_array : INTEGER_ARRAY_TYPE(0 to ard_num_ce_array'length);
begin
intr_ard_num_ce_array(0 to ard_num_ce_array'length-1) := ard_num_ce_array;
if include_intr then
intr_ard_num_ce_array(get_id_index(ard_id_array, IPIF_INTR)) := 16;
return intr_ard_num_ce_array;
else
return ard_num_ce_array;
end if;
end function add_intr_ard_num_ce_array;
end package body ipif_pkg;
|
-- IPIF Common Library Package
-------------------------------------------------------------------------------
--
-- *************************************************************************
-- ** **
-- ** DISCLAIMER OF LIABILITY **
-- ** **
-- ** This text/file contains proprietary, confidential **
-- ** information of Xilinx, Inc., is distributed under **
-- ** license from Xilinx, Inc., and may be used, copied **
-- ** and/or disclosed only pursuant to the terms of a valid **
-- ** license agreement with Xilinx, Inc. Xilinx hereby **
-- ** grants you a license to use this text/file solely for **
-- ** design, simulation, implementation and creation of **
-- ** design files limited to Xilinx devices or technologies. **
-- ** Use with non-Xilinx devices or technologies is expressly **
-- ** prohibited and immediately terminates your license unless **
-- ** covered by a separate agreement. **
-- ** **
-- ** Xilinx is providing this design, code, or information **
-- ** "as-is" solely for use in developing programs and **
-- ** solutions for Xilinx devices, with no obligation on the **
-- ** part of Xilinx to provide support. By providing this design, **
-- ** code, or information as one possible implementation of **
-- ** this feature, application or standard, Xilinx is making no **
-- ** representation that this implementation is free from any **
-- ** claims of infringement. You are responsible for obtaining **
-- ** any rights you may require for your implementation. **
-- ** Xilinx expressly disclaims any warranty whatsoever with **
-- ** respect to the adequacy of the implementation, including **
-- ** but not limited to any warranties or representations that this **
-- ** implementation is free from claims of infringement, implied **
-- ** warranties of merchantability or fitness for a particular **
-- ** purpose. **
-- ** **
-- ** Xilinx products are not intended for use in life support **
-- ** appliances, devices, or systems. Use in such applications is **
-- ** expressly prohibited. **
-- ** **
-- ** Any modifications that are made to the Source Code are **
-- ** done at the users sole risk and will be unsupported. **
-- ** The Xilinx Support Hotline does not have access to source **
-- ** code and therefore cannot answer specific questions related **
-- ** to source HDL. The Xilinx Hotline support of original source **
-- ** code IP shall only address issues and questions related **
-- ** to the standard Netlist version of the core (and thus **
-- ** indirectly, the original core source). **
-- ** **
-- ** Copyright (c) 2002-2010 Xilinx, Inc. All rights reserved. **
-- ** **
-- ** This copyright and support notice must be retained as part **
-- ** of this text at all times. **
-- ** **
-- *************************************************************************
--
-------------------------------------------------------------------------------
-- Filename: ipif_pkg.vhd
-- Version: Intital
-- Description: This file contains the constants and functions used in the
-- ipif common library components.
--
-------------------------------------------------------------------------------
-- Structure:
--
-------------------------------------------------------------------------------
-- Author: DET
-- History:
-- DET 02/21/02 -- Created from proc_common_pkg.vhd
--
-- DET 03/13/02 -- PLB IPIF development updates
-- ^^^^^^
-- - Commented out string types and string functions due to an XST
-- problem with string arrays and functions. THe string array
-- processing functions were replaced with comperable functions
-- operating on integer arrays.
-- ~~~~~~
--
--
-- DET 4/30/2002 Initial
-- ~~~~~~
-- - Added three functions: rebuild_slv32_array, rebuild_slv64_array, and
-- rebuild_int_array to support removal of unused elements from the
-- ARD arrays.
-- ^^^^^^ --
--
-- FLO 8/12/2002
-- ~~~~~~
-- - Added three functions: bits_needed_for_vac, bits_needed_for_occ,
-- and get_id_index_iboe.
-- (Removed provisional functions bits_needed_for_vacancy,
-- bits needed_for_occupancy, and bits_needed_for.)
-- ^^^^^^
--
-- FLO 3/24/2003
-- ~~~~~~
-- - Added dependent property paramters for channelized DMA.
-- - Added common property parameter array type.
-- - Definded the KEYHOLD_BURST common-property parameter.
-- ^^^^^^
--
-- FLO 10/22/2003
-- ~~~~~~
-- - Some adjustment to CHDMA parameterization.
-- - Cleanup of obsolete code and comments. (The former "XST workaround"
-- has become the officially deployed method.)
-- ^^^^^^
--
-- LSS 03/24/2004
-- ~~~~~~
-- - Added 5 functions
-- ^^^^^^
--
-- ALS 09/03/04
-- ^^^^^^
-- -- Added constants to describe the channel protocols used in MCH_OPB_IPIF
-- ~~~~~~
--
-- DET 1/17/2008 v4_0
-- ~~~~~~
-- - Changed proc_common library version to v4_0
-- - Incorporated new disclaimer header
-- ^^^^^^
--
-------------------------------------------------------------------------------
-- Naming Conventions:
-- active low signals: "*_n"
-- clock signals: "clk", "clk_div#", "clk_#x"
-- reset signals: "rst", "rst_n"
-- generics: "C_*"
-- user defined types: "*_TYPE"
-- state machine next state: "*_ns"
-- state machine current state: "*_cs"
-- combinatorial signals: "*_com"
-- pipelined or register delay signals: "*_d#"
-- counter signals: "*cnt*"
-- clock enable signals: "*_ce"
-- internal version of output port "*_i"
-- device pins: "*_pin"
-- ports: - Names begin with Uppercase
-- processes: "*_PROCESS"
-- component instantiations: "<ENTITY_>I_<#|FUNC>
-------------------------------------------------------------------------------
library ieee;
use ieee.std_logic_1164.all;
-- need conversion function to convert reals/integers to std logic vectors
use ieee.std_logic_arith.all;
use ieee.std_logic_arith.all;
use ieee.std_logic_unsigned.all;
package ipif_pkg is
-------------------------------------------------------------------------------
-- Type Declarations
-------------------------------------------------------------------------------
type SLV32_ARRAY_TYPE is array (natural range <>) of std_logic_vector(0 to 31);
subtype SLV64_TYPE is std_logic_vector(0 to 63);
type SLV64_ARRAY_TYPE is array (natural range <>) of SLV64_TYPE;
type INTEGER_ARRAY_TYPE is array (natural range <>) of integer;
-------------------------------------------------------------------------------
-- Function and Procedure Declarations
-------------------------------------------------------------------------------
function "=" (s1: in string; s2: in string) return boolean;
function equaluseCase( str1, str2 : STRING ) RETURN BOOLEAN;
function calc_num_ce (ce_num_array : INTEGER_ARRAY_TYPE) return integer;
function calc_start_ce_index (ce_num_array : INTEGER_ARRAY_TYPE;
index : integer) return integer;
function get_min_dwidth (dwidth_array: INTEGER_ARRAY_TYPE) return integer;
function get_max_dwidth (dwidth_array: INTEGER_ARRAY_TYPE) return integer;
function S32 (in_string : string) return string;
--------------------------------------------------------------------------------
-- ARD support functions.
-- These function can be useful when operating with the ARD parameterization.
--------------------------------------------------------------------------------
function get_id_index (id_array :INTEGER_ARRAY_TYPE;
id : integer)
return integer;
function get_id_index_iboe (id_array :INTEGER_ARRAY_TYPE;
id : integer)
return integer;
function find_ard_id (id_array : INTEGER_ARRAY_TYPE;
id : integer) return boolean;
function find_id_dwidth (id_array : INTEGER_ARRAY_TYPE;
dwidth_array: INTEGER_ARRAY_TYPE;
id : integer;
default : integer)
return integer;
function cnt_ipif_id_blks (id_array : INTEGER_ARRAY_TYPE) return integer;
function get_ipif_id_dbus_index (id_array : INTEGER_ARRAY_TYPE;
id : integer)
return integer ;
function rebuild_slv32_array (slv32_array : SLV32_ARRAY_TYPE;
num_valid_pairs : integer)
return SLV32_ARRAY_TYPE;
function rebuild_slv64_array (slv64_array : SLV64_ARRAY_TYPE;
num_valid_pairs : integer)
return SLV64_ARRAY_TYPE;
function rebuild_int_array (int_array : INTEGER_ARRAY_TYPE;
num_valid_entry : integer)
return INTEGER_ARRAY_TYPE;
-- 5 Functions Added 3/24/04
function populate_intr_mode_array (num_user_intr : integer;
intr_capture_mode : integer)
return INTEGER_ARRAY_TYPE ;
function add_intr_ard_id_array(include_intr : boolean;
ard_id_array : INTEGER_ARRAY_TYPE)
return INTEGER_ARRAY_TYPE;
function add_intr_ard_addr_range_array(include_intr : boolean;
ZERO_ADDR_PAD : std_logic_vector;
intr_baseaddr : std_logic_vector;
intr_highaddr : std_logic_vector;
ard_id_array : INTEGER_ARRAY_TYPE;
ard_addr_range_array : SLV64_ARRAY_TYPE)
return SLV64_ARRAY_TYPE;
function add_intr_ard_num_ce_array(include_intr : boolean;
ard_id_array : INTEGER_ARRAY_TYPE;
ard_num_ce_array : INTEGER_ARRAY_TYPE)
return INTEGER_ARRAY_TYPE;
function add_intr_ard_dwidth_array(include_intr : boolean;
intr_dwidth : integer;
ard_id_array : INTEGER_ARRAY_TYPE;
ard_dwidth_array : INTEGER_ARRAY_TYPE)
return INTEGER_ARRAY_TYPE;
function log2(x : natural) return integer;
function clog2(x : positive) return natural;
-------------------------------------------------------------------------------
-- Constant Declarations
-------------------------------------------------------------------------------
-------------------------------------------------------------------------------
-- Channel Protocols
-- The constant declarations below give symbolic-name aliases for values that
-- can be used in the C_MCH_PROTOCOL_ARRAY generic of the MCH_OPB_IPIF.
-------------------------------------------------------------------------------
constant XCL : integer := 0;
constant DAG : integer := 1;
--------------------------------------------------------------------------------
-- Address range types.
-- The constant declarations, below, give symbolic-name aliases for values
-- that can be used in the C_ARD_ID_ARRAY generic of IPIFs. The first set
-- gives aliases that are used to include IPIF services.
--------------------------------------------------------------------------------
-- IPIF module aliases
Constant IPIF_INTR : integer := 1;
Constant IPIF_RST : integer := 2;
Constant IPIF_SESR_SEAR : integer := 3;
Constant IPIF_DMA_SG : integer := 4;
Constant IPIF_WRFIFO_REG : integer := 5;
Constant IPIF_WRFIFO_DATA : integer := 6;
Constant IPIF_RDFIFO_REG : integer := 7;
Constant IPIF_RDFIFO_DATA : integer := 8;
Constant IPIF_CHDMA_CHANNELS : integer := 9;
Constant IPIF_CHDMA_GLOBAL_REGS : integer := 10;
Constant CHDMA_STATUS_FIFO : integer := 90;
-- Some predefined user module aliases
Constant USER_00 : integer := 100;
Constant USER_01 : integer := 101;
Constant USER_02 : integer := 102;
Constant USER_03 : integer := 103;
Constant USER_04 : integer := 104;
Constant USER_05 : integer := 105;
Constant USER_06 : integer := 106;
Constant USER_07 : integer := 107;
Constant USER_08 : integer := 108;
Constant USER_09 : integer := 109;
Constant USER_10 : integer := 110;
Constant USER_11 : integer := 111;
Constant USER_12 : integer := 112;
Constant USER_13 : integer := 113;
Constant USER_14 : integer := 114;
Constant USER_15 : integer := 115;
Constant USER_16 : integer := 116;
---( Start of Dependent Properties declarations
--------------------------------------------------------------------------------
-- Declarations for Dependent Properties (properties that depend on the type of
-- the address range, or in other words, address-range-specific parameters).
-- There is one property, i.e. one parameter, encoded as an integer at
-- each index of the properties array. There is one properties array for
-- each address range.
--
-- The C_ARD_DEPENDENT_PROPS_ARRAY generic parameter in (most) IPIFs is such
-- a properties array and it is usually giving its (static) value using a
-- VHDL aggregate construct. (--ToDo, give an example of this.)
--
-- The the "assigned" default value of a dependent property is zero. This value
-- is usually specified the aggregate by leaving its (index) name out so that
-- it is covered by an "others => 0" choice in the aggregate. Some parameters,
-- as noted in the definitions, below, have an "effective" default value that is
-- different from the assigned default value of zero. In such cases, the
-- function, eff_dp, given below, can be used to get the effective value of
-- the dependent property.
--------------------------------------------------------------------------------
constant DEPENDENT_PROPS_SIZE : integer := 32;
subtype DEPENDENT_PROPS_TYPE
is INTEGER_ARRAY_TYPE(0 to DEPENDENT_PROPS_SIZE-1);
type DEPENDENT_PROPS_ARRAY_TYPE
is array (natural range <>) of DEPENDENT_PROPS_TYPE;
--------------------------------------------------------------------------------
-- Below are the indices of dependent properties for the different types of
-- address ranges.
--
-- Example: Let C_ARD_DEPENDENT_PROPS_ARRAY hold the dependent properites
-- for a set of address ranges. Then, e.g.,
--
-- C_ARD_DEPENDENT_PROPS_ARRAY(i)(FIFO_CAPACITY_BITS)
--
-- gives the fifo capacity in bits, provided that the i'th address range
-- is of type IPIF_WRFIFO_DATA or IPIF_RDFIFO_DATA.
--
-- These indices should be referenced only by the names below and never
-- by numerical literals. (The right to change numerical index assignments
-- is reserved; applications using the names will not be affected by such
-- reassignments.)
--------------------------------------------------------------------------------
--
--ToDo, if the interrupt controller parameterization is ever moved to
-- C_ARD_DEPENDENT_PROPS_ARRAY, then the following declarations
-- could be uncommented and used.
---- IPIF_INTR IDX
---------------------------------------------------------------------------- ---
constant EXCLUDE_DEV_ISC : integer := 0;
-- 1 specifies that only the global interrupt
-- enable is present in the device interrupt source
-- controller and that the only source of interrupts
-- in the device is the IP interrupt source controller.
-- 0 specifies that the full device interrupt
-- source controller structure will be included.
constant INCLUDE_DEV_PENCODER : integer := 1;
-- 1 will include the Device IID in the device interrupt
-- source controller, 0 will exclude it.
--
-- IPIF_WRFIFO_DATA or IPIF_RDFIFO_DATA IDX
---------------------------------------------------------------------------- ---
constant FIFO_CAPACITY_BITS : integer := 0;
constant WR_WIDTH_BITS : integer := 1;
constant RD_WIDTH_BITS : integer := 2;
constant EXCLUDE_PACKET_MODE : integer := 3;
-- 1 Don't include packet mode features
-- 0 Include packet mode features
constant EXCLUDE_VACANCY : integer := 4;
-- 1 Don't include vacancy calculation
-- 0 Include vacancy calculation
-- See also the functions
-- bits_needed_for_vac and
-- bits_needed_for_occ that are declared below.
constant INCLUDE_DRE : integer := 5;
constant INCLUDE_AUTOPUSH_POP : integer := 6;
constant AUTOPUSH_POP_CE : integer := 7;
constant INCLUDE_CSUM : integer := 8;
--------------------------------------------------------------------------------
--
-- DMA_SG IDX
---------------------------------------------------------------------------- ---
--------------------------------------------------------------------------------
-- IPIF_CHDMA_CHANNELS IDX
---------------------------------------------------------------------------- ---
constant NUM_SUBS_FOR_PHYS_0 : integer :=0;
constant NUM_SUBS_FOR_PHYS_1 : integer :=1;
constant NUM_SUBS_FOR_PHYS_2 : integer :=2;
constant NUM_SUBS_FOR_PHYS_3 : integer :=3;
constant NUM_SUBS_FOR_PHYS_4 : integer :=4;
constant NUM_SUBS_FOR_PHYS_5 : integer :=5;
constant NUM_SUBS_FOR_PHYS_6 : integer :=6;
constant NUM_SUBS_FOR_PHYS_7 : integer :=7;
constant NUM_SUBS_FOR_PHYS_8 : integer :=8;
constant NUM_SUBS_FOR_PHYS_9 : integer :=9;
constant NUM_SUBS_FOR_PHYS_10 : integer :=10;
constant NUM_SUBS_FOR_PHYS_11 : integer :=11;
constant NUM_SUBS_FOR_PHYS_12 : integer :=12;
constant NUM_SUBS_FOR_PHYS_13 : integer :=13;
constant NUM_SUBS_FOR_PHYS_14 : integer :=14;
constant NUM_SUBS_FOR_PHYS_15 : integer :=15;
-- Gives the number of sub-channels for physical channel i.
--
-- These constants, which will be MAX_NUM_PHYS_CHANNELS in number (see
-- below), have consecutive values starting with 0 for
-- NUM_SUBS_FOR_PHYS_0. (The constants serve the purpose of giving symbolic
-- names for use in the dependent-properties aggregates that parameterize
-- an IPIF_CHDMA_CHANNELS address range.)
--
-- [Users can ignore this note for developers
-- If the number of physical channels changes, both the
-- IPIF_CHDMA_CHANNELS constants and MAX_NUM_PHYS_CHANNELS,
-- below, must be adjusted.
-- (Use of an array constant or a function of the form
-- NUM_SUBS_FOR_PHYS(i) to define the indices
-- runs afoul of LRM restrictions on non-locally static aggregate
-- choices. (Further, the LRM imposes perhaps unnecessarily
-- strict limits on what qualifies as a locally static primary.)
-- Note: This information is supplied for the benefit of anyone seeking
-- to improve the way that these NUM_SUBS_FOR_PHYS parameter
-- indices are defined.)
-- End of note for developers ]
--
-- The value associated with any index NUM_SUBS_FOR_PHYS_i in the
-- dependent-properties array must be even since TX and RX channels
-- come in pairs with the TX followed immediately by
-- the corresponding RX.
--
constant NUM_SIMPLE_DMA_CHANS : integer :=16;
-- The number of simple DMA channels.
constant NUM_SIMPLE_SG_CHANS : integer :=17;
-- The number of simple SG channels.
constant INTR_COALESCE : integer :=18;
-- 0 Interrupt coalescing is disabled
-- 1 Interrupt coalescing is enabled
constant CLK_PERIOD_PS : integer :=19;
-- The period of the OPB Bus clock in ps.
-- The default value of 0 is a special value that
-- is synonymous with 10000 ps (10 ns).
-- The value for CLK_PERIOD_PS is relevant only if (INTR_COALESCE = 1).
constant PACKET_WAIT_UNIT_NS : integer :=20;
-- Gives the unit for used for timing of pack-wait bounds.
-- The default value of 0 is a special value that
-- is synonymous with 1,000,000 ns (1 ms) and a non-default
-- value is typically only used for testing.
-- Relevant only if (INTR_COALESCE = 1).
constant BURST_SIZE : integer :=21;
-- 1, 2, 4, 8 or 16
-- The default value of 0 is a special value that
-- is synonymous with a burst size of 16.
-- Setting the BURST_SIZE to 1 effectively disables
-- bursts.
constant REMAINDER_AS_SINGLES : integer :=22;
-- 0 Remainder handled as a short burst
-- 1 Remainder handled as a series of singles
--------------------------------------------------------------------------------
-- The constant below is not the index of a dependent-properties
-- parameter (and, as such, would never appear as a choice in a
-- dependent-properties aggregate). Rather, it is fixed to the maximum
-- number of physical channels that an Address Range of type
-- IPIF_CHDMA_CHANNELS supports. It must be maintained in conjuction with
-- the constants named, e.g., NUM_SUBS_FOR_PHYS_15, above.
--------------------------------------------------------------------------------
constant MAX_NUM_PHYS_CHANNELS : natural := 16;
--------------------------------------------------------------------------
-- EXAMPLE: Here is an example dependent-properties aggregate for an
-- address range of type IPIF_CHDMA_CHANNELS.
-- To have a compact list of all of the CHDMA parameters, all are
-- shown, however three are commented out and the unneeded
-- MUM_SUBS_FOR_PHYS_x are excluded. The "OTHERS => 0" association
-- gives these parameters their default values, such that, for the example
--
-- - All physical channels above 2 have zero subchannels (effectively,
-- these physical channels are not used)
-- - There are no simple SG channels
-- - The packet-wait time unit is 1 ms
-- - Burst size is 16
--------------------------------------------------------------------------
-- (
-- NUM_SUBS_FOR_PHYS_0 => 8,
-- NUM_SUBS_FOR_PHYS_1 => 4,
-- NUM_SUBS_FOR_PHYS_2 => 14,
-- NUM_SIMPLE_DMA_CHANS => 1,
-- --NUM_SIMPLE_SG_CHANS => 5,
-- INTR_COALESCE => 1,
-- CLK_PERIOD_PS => 20000,
-- --PACKET_WAIT_UNIT_NS => 50000,
-- --BURST_SIZE => 1,
-- REMAINDER_AS_SINGLES => 1,
-- OTHERS => 0
-- )
--
--------------------------------------------------------------------------------
--------------------------------------------------------------------------------
-- Calculates the number of bits needed to convey the vacancy (emptiness) of
-- the fifo described by dependent_props, if fifo_present. If not fifo_present,
-- returns 0 (or the smallest value allowed by tool limitations on null arrays)
-- without making reference to dependent_props.
--------------------------------------------------------------------------------
function bits_needed_for_vac(
fifo_present: boolean;
dependent_props : DEPENDENT_PROPS_TYPE
) return integer;
--------------------------------------------------------------------------------
-- Calculates the number of bits needed to convey the occupancy (fullness) of
-- the fifo described by dependent_props, if fifo_present. If not fifo_present,
-- returns 0 (or the smallest value allowed by tool limitations on null arrays)
-- without making reference to dependent_props.
--------------------------------------------------------------------------------
function bits_needed_for_occ(
fifo_present: boolean;
dependent_props : DEPENDENT_PROPS_TYPE
) return integer;
--------------------------------------------------------------------------------
-- Function eff_dp.
--
-- For some of the dependent properties, the default value of zero is meant
-- to imply an effective default value of other than zero (see e.g.
-- PKT_WAIT_UNIT_NS for the IPIF_CHDMA_CHANNELS address-range type). The
-- following function is used to get the (possibly default-adjusted)
-- value for a dependent property.
--
-- Example call:
--
-- eff_value_of_param :=
-- eff_dp(
-- C_IPIF_CHDMA_CHANNELS,
-- PACKET_WAIT_UNIT_NS,
-- C_ARD_DEPENDENT_PROPS_ARRAY(i)(PACKET_WAIT_UNIT_NS)
-- );
--
-- where C_ARD_DEPENDENT_PROPS_ARRAY(i) is an object of type
-- DEPENDENT_PROPS_ARRAY_TYPE, that was parameterized for an address range of
-- type C_IPIF_CHDMA_CHANNELS.
--------------------------------------------------------------------------------
function eff_dp(id : integer; -- The type of address range.
dep_prop : integer; -- The index of the dependent prop.
value : integer -- The value at that index.
) return integer; -- The effective value, possibly adjusted
-- if value has the default value of 0.
---) End of Dependent Properties declarations
--------------------------------------------------------------------------------
-- Declarations for Common Properties (properties that apply regardless of the
-- type of the address range). Structurally, these work the same as
-- the dependent properties.
--------------------------------------------------------------------------------
constant COMMON_PROPS_SIZE : integer := 2;
subtype COMMON_PROPS_TYPE
is INTEGER_ARRAY_TYPE(0 to COMMON_PROPS_SIZE-1);
type COMMON_PROPS_ARRAY_TYPE
is array (natural range <>) of COMMON_PROPS_TYPE;
--------------------------------------------------------------------------------
-- Below are the indices of the common properties.
--
-- These indices should be referenced only by the names below and never
-- by numerical literals.
-- IDX
---------------------------------------------------------------------------- ---
constant KEYHOLE_BURST : integer := 0;
-- 1 All addresses of a burst are forced to the initial
-- address of the burst.
-- 0 Burst addresses follow the bus protocol.
-- IP interrupt mode array constants
Constant INTR_PASS_THRU : integer := 1;
Constant INTR_PASS_THRU_INV : integer := 2;
Constant INTR_REG_EVENT : integer := 3;
Constant INTR_REG_EVENT_INV : integer := 4;
Constant INTR_POS_EDGE_DETECT : integer := 5;
Constant INTR_NEG_EDGE_DETECT : integer := 6;
end ipif_pkg;
package body ipif_pkg is
-------------------------------------------------------------------------------
-- Function log2 -- returns number of bits needed to encode x choices
-- x = 0 returns 0
-- x = 1 returns 0
-- x = 2 returns 1
-- x = 4 returns 2, etc.
-------------------------------------------------------------------------------
--
function log2(x : natural) return integer is
variable i : integer := 0;
variable val: integer := 1;
begin
if x = 0 then return 0;
else
for j in 0 to 29 loop -- for loop for XST
if val >= x then null;
else
i := i+1;
val := val*2;
end if;
end loop;
-- Fix per CR520627 XST was ignoring this anyway and printing a
-- Warning in SRP file. This will get rid of the warning and not
-- impact simulation.
-- synthesis translate_off
assert val >= x
report "Function log2 received argument larger" &
" than its capability of 2^30. "
severity failure;
-- synthesis translate_on
return i;
end if;
end function log2;
--------------------------------------------------------------------------------
-- Function clog2 - returns the integer ceiling of the base 2 logarithm of x,
-- i.e., the least integer greater than or equal to log2(x).
--------------------------------------------------------------------------------
function clog2(x : positive) return natural is
variable r : natural := 0;
variable rp : natural := 1; -- rp tracks the value 2**r
begin
while rp < x loop -- Termination condition T: x <= 2**r
-- Loop invariant L: 2**(r-1) < x
r := r + 1;
if rp > integer'high - rp then exit; end if; -- If doubling rp overflows
-- the integer range, the doubled value would exceed x, so safe to exit.
rp := rp + rp;
end loop;
-- L and T <-> 2**(r-1) < x <= 2**r <-> (r-1) < log2(x) <= r
return r; --
end clog2;
-------------------------------------------------------------------------------
-- Function Definitions
-------------------------------------------------------------------------------
-----------------------------------------------------------------------------
-- Function "="
--
-- This function can be used to overload the "=" operator when comparing
-- strings.
-----------------------------------------------------------------------------
function "=" (s1: in string; s2: in string) return boolean is
constant tc: character := ' '; -- string termination character
variable i: integer := 1;
variable v1 : string(1 to s1'length) := s1;
variable v2 : string(1 to s2'length) := s2;
begin
while (i <= v1'length) and (v1(i) /= tc) and
(i <= v2'length) and (v2(i) /= tc) and
(v1(i) = v2(i))
loop
i := i+1;
end loop;
return ((i > v1'length) or (v1(i) = tc)) and
((i > v2'length) or (v2(i) = tc));
end;
----------------------------------------------------------------------------
-- Function equaluseCase
--
-- This function returns true if case sensitive string comparison determines
-- that str1 and str2 are the same.
-----------------------------------------------------------------------------
FUNCTION equaluseCase( str1, str2 : STRING ) RETURN BOOLEAN IS
CONSTANT len1 : INTEGER := str1'length;
CONSTANT len2 : INTEGER := str2'length;
VARIABLE equal : BOOLEAN := TRUE;
BEGIN
IF NOT (len1=len2) THEN
equal := FALSE;
ELSE
FOR i IN str1'range LOOP
IF NOT (str1(i) = str2(i)) THEN
equal := FALSE;
END IF;
END LOOP;
END IF;
RETURN equal;
END equaluseCase;
-----------------------------------------------------------------------------
-- Function calc_num_ce
--
-- This function is used to process the array specifying the number of Chip
-- Enables required for a Base Address specification. The array is input to
-- the function and an integer is returned reflecting the total number of
-- Chip Enables required for the CE, RdCE, and WrCE Buses
-----------------------------------------------------------------------------
function calc_num_ce (ce_num_array : INTEGER_ARRAY_TYPE) return integer is
Variable ce_num_sum : integer := 0;
begin
for i in 0 to (ce_num_array'length)-1 loop
ce_num_sum := ce_num_sum + ce_num_array(i);
End loop;
return(ce_num_sum);
end function calc_num_ce;
-----------------------------------------------------------------------------
-- Function calc_start_ce_index
--
-- This function is used to process the array specifying the number of Chip
-- Enables required for a Base Address specification. The CE Size array is
-- input to the function and an integer index representing the index of the
-- target module in the ce_num_array. An integer is returned reflecting the
-- starting index of the assigned Chip Enables within the CE, RdCE, and
-- WrCE Buses.
-----------------------------------------------------------------------------
function calc_start_ce_index (ce_num_array : INTEGER_ARRAY_TYPE;
index : integer) return integer is
Variable ce_num_sum : integer := 0;
begin
If (index = 0) Then
ce_num_sum := 0;
else
for i in 0 to index-1 loop
ce_num_sum := ce_num_sum + ce_num_array(i);
End loop;
End if;
return(ce_num_sum);
end function calc_start_ce_index;
-----------------------------------------------------------------------------
-- Function get_min_dwidth
--
-- This function is used to process the array specifying the data bus width
-- for each of the target modules. The dwidth_array is input to the function
-- and an integer is returned that is the smallest value found of all the
-- entries in the array.
-----------------------------------------------------------------------------
function get_min_dwidth (dwidth_array: INTEGER_ARRAY_TYPE) return integer is
Variable temp_min : Integer := 1024;
begin
for i in 0 to dwidth_array'length-1 loop
If (dwidth_array(i) < temp_min) Then
temp_min := dwidth_array(i);
else
null;
End if;
End loop;
return(temp_min);
end function get_min_dwidth;
-----------------------------------------------------------------------------
-- Function get_max_dwidth
--
-- This function is used to process the array specifying the data bus width
-- for each of the target modules. The dwidth_array is input to the function
-- and an integer is returned that is the largest value found of all the
-- entries in the array.
-----------------------------------------------------------------------------
function get_max_dwidth (dwidth_array: INTEGER_ARRAY_TYPE) return integer is
Variable temp_max : Integer := 0;
begin
for i in 0 to dwidth_array'length-1 loop
If (dwidth_array(i) > temp_max) Then
temp_max := dwidth_array(i);
else
null;
End if;
End loop;
return(temp_max);
end function get_max_dwidth;
-----------------------------------------------------------------------------
-- Function S32
--
-- This function is used to expand an input string to 32 characters by
-- padding with spaces. If the input string is larger than 32 characters,
-- it will truncate to 32 characters.
-----------------------------------------------------------------------------
function S32 (in_string : string) return string is
constant OUTPUT_STRING_LENGTH : integer := 32;
Constant space : character := ' ';
variable new_string : string(1 to 32);
Variable start_index : Integer := in_string'length+1;
begin
If (in_string'length < OUTPUT_STRING_LENGTH) Then
for i in 1 to in_string'length loop
new_string(i) := in_string(i);
End loop;
for j in start_index to OUTPUT_STRING_LENGTH loop
new_string(j) := space;
End loop;
else -- use first 32 chars of in_string (truncate the rest)
for k in 1 to OUTPUT_STRING_LENGTH loop
new_string(k) := in_string(k);
End loop;
End if;
return(new_string);
end function S32;
-----------------------------------------------------------------------------
-- Function get_id_index
--
-- This function is used to process the array specifying the target function
-- assigned to a Base Address pair address range. The id_array and a
-- id number is input to the function. A integer is returned reflecting the
-- array index of the id matching the id input number. This function
-- should only be called if the id number is known to exist in the
-- name_array input. This can be detirmined by using the find_ard_id
-- function.
-----------------------------------------------------------------------------
function get_id_index (id_array :INTEGER_ARRAY_TYPE;
id : integer) return integer is
Variable match : Boolean := false;
Variable match_index : Integer := 10000; -- a really big number!
begin
for array_index in 0 to id_array'length-1 loop
If (match = true) Then -- match already found so do nothing
null;
else -- compare the numbers one by one
match := (id_array(array_index) = id);
If (match) Then
match_index := array_index;
else
null;
End if;
End if;
End loop;
return(match_index);
end function get_id_index;
--------------------------------------------------------------------------------
-- get_id_index but return a value in bounds on error (iboe).
--
-- This function is the same as get_id_index, except that when id does
-- not exist in id_array, the value returned is any index that is
-- within the index range of id_array.
--
-- This function would normally only be used where function find_ard_id
-- is used to establish the existence of id but, even when non-existent,
-- an element of one of the ARD arrays will be computed from the
-- returned get_id_index_iboe value. See, e.g., function bits_needed_for_vac
-- and the example call, below
--
-- bits_needed_for_vac(
-- find_ard_id(C_ARD_ID_ARRAY, IPIF_RDFIFO_DATA),
-- C_ARD_DEPENDENT_PROPS_ARRAY(get_id_index_iboe(C_ARD_ID_ARRAY,
-- IPIF_RDFIFO_DATA))
-- )
--------------------------------------------------------------------------------
function get_id_index_iboe (id_array :INTEGER_ARRAY_TYPE;
id : integer) return integer is
Variable match : Boolean := false;
Variable match_index : Integer := id_array'left; -- any valid array index
begin
for array_index in 0 to id_array'length-1 loop
If (match = true) Then -- match already found so do nothing
null;
else -- compare the numbers one by one
match := (id_array(array_index) = id);
If (match) Then match_index := array_index;
else null;
End if;
End if;
End loop;
return(match_index);
end function get_id_index_iboe;
-----------------------------------------------------------------------------
-- Function find_ard_id
--
-- This function is used to process the array specifying the target function
-- assigned to a Base Address pair address range. The id_array and a
-- integer id is input to the function. A boolean is returned reflecting the
-- presence (or not) of a number in the array matching the id input number.
-----------------------------------------------------------------------------
function find_ard_id (id_array : INTEGER_ARRAY_TYPE;
id : integer) return boolean is
Variable match : Boolean := false;
begin
for array_index in 0 to id_array'length-1 loop
If (match = true) Then -- match already found so do nothing
null;
else -- compare the numbers one by one
match := (id_array(array_index) = id);
End if;
End loop;
return(match);
end function find_ard_id;
-----------------------------------------------------------------------------
-- Function find_id_dwidth
--
-- This function is used to find the data width of a target module. If the
-- target module exists, the data width is extracted from the input dwidth
-- array. If the module is not in the ID array, the default input is
-- returned. This function is needed to assign data port size constraints on
-- unconstrained port widths.
-----------------------------------------------------------------------------
function find_id_dwidth (id_array : INTEGER_ARRAY_TYPE;
dwidth_array: INTEGER_ARRAY_TYPE;
id : integer;
default : integer) return integer is
Variable id_present : Boolean := false;
Variable array_index : Integer := 0;
Variable dwidth : Integer := default;
begin
id_present := find_ard_id(id_array, id);
If (id_present) Then
array_index := get_id_index (id_array, id);
dwidth := dwidth_array(array_index);
else
null; -- use default input
End if;
Return (dwidth);
end function find_id_dwidth;
-----------------------------------------------------------------------------
-- Function cnt_ipif_id_blks
--
-- This function is used to detirmine the number of IPIF components specified
-- in the ARD ID Array. An integer is returned representing the number
-- of elements counted. User IDs are ignored in the counting process.
-----------------------------------------------------------------------------
function cnt_ipif_id_blks (id_array : INTEGER_ARRAY_TYPE)
return integer is
Variable blk_count : integer := 0;
Variable temp_id : integer;
begin
for array_index in 0 to id_array'length-1 loop
temp_id := id_array(array_index);
If (temp_id = IPIF_WRFIFO_DATA or
temp_id = IPIF_RDFIFO_DATA or
temp_id = IPIF_RST or
temp_id = IPIF_INTR or
temp_id = IPIF_DMA_SG or
temp_id = IPIF_SESR_SEAR
) Then -- IPIF block found
blk_count := blk_count+1;
else -- go to next loop iteration
null;
End if;
End loop;
return(blk_count);
end function cnt_ipif_id_blks;
-----------------------------------------------------------------------------
-- Function get_ipif_id_dbus_index
--
-- This function is used to detirmine the IPIF relative index of a given
-- ID value. User IDs are ignored in the index detirmination.
-----------------------------------------------------------------------------
function get_ipif_id_dbus_index (id_array : INTEGER_ARRAY_TYPE;
id : integer)
return integer is
Variable blk_index : integer := 0;
Variable temp_id : integer;
Variable id_found : Boolean := false;
begin
for array_index in 0 to id_array'length-1 loop
temp_id := id_array(array_index);
If (id_found) then
null;
elsif (temp_id = id) then
id_found := true;
elsif (temp_id = IPIF_WRFIFO_DATA or
temp_id = IPIF_RDFIFO_DATA or
temp_id = IPIF_RST or
temp_id = IPIF_INTR or
temp_id = IPIF_DMA_SG or
temp_id = IPIF_SESR_SEAR
) Then -- IPIF block found
blk_index := blk_index+1;
else -- user block so do nothing
null;
End if;
End loop;
return(blk_index);
end function get_ipif_id_dbus_index;
------------------------------------------------------------------------------
-- Function: rebuild_slv32_array
--
-- Description:
-- This function takes an input slv32 array and rebuilds an output slv32
-- array composed of the first "num_valid_entry" elements from the input
-- array.
------------------------------------------------------------------------------
function rebuild_slv32_array (slv32_array : SLV32_ARRAY_TYPE;
num_valid_pairs : integer)
return SLV32_ARRAY_TYPE is
--Constants
constant num_elements : Integer := num_valid_pairs * 2;
-- Variables
variable temp_baseaddr32_array : SLV32_ARRAY_TYPE( 0 to num_elements-1);
begin
for array_index in 0 to num_elements-1 loop
temp_baseaddr32_array(array_index) := slv32_array(array_index);
end loop;
return(temp_baseaddr32_array);
end function rebuild_slv32_array;
------------------------------------------------------------------------------
-- Function: rebuild_slv64_array
--
-- Description:
-- This function takes an input slv64 array and rebuilds an output slv64
-- array composed of the first "num_valid_entry" elements from the input
-- array.
------------------------------------------------------------------------------
function rebuild_slv64_array (slv64_array : SLV64_ARRAY_TYPE;
num_valid_pairs : integer)
return SLV64_ARRAY_TYPE is
--Constants
constant num_elements : Integer := num_valid_pairs * 2;
-- Variables
variable temp_baseaddr64_array : SLV64_ARRAY_TYPE( 0 to num_elements-1);
begin
for array_index in 0 to num_elements-1 loop
temp_baseaddr64_array(array_index) := slv64_array(array_index);
end loop;
return(temp_baseaddr64_array);
end function rebuild_slv64_array;
------------------------------------------------------------------------------
-- Function: rebuild_int_array
--
-- Description:
-- This function takes an input integer array and rebuilds an output integer
-- array composed of the first "num_valid_entry" elements from the input
-- array.
------------------------------------------------------------------------------
function rebuild_int_array (int_array : INTEGER_ARRAY_TYPE;
num_valid_entry : integer)
return INTEGER_ARRAY_TYPE is
-- Variables
variable temp_int_array : INTEGER_ARRAY_TYPE( 0 to num_valid_entry-1);
begin
for array_index in 0 to num_valid_entry-1 loop
temp_int_array(array_index) := int_array(array_index);
end loop;
return(temp_int_array);
end function rebuild_int_array;
function bits_needed_for_vac(
fifo_present: boolean;
dependent_props : DEPENDENT_PROPS_TYPE
) return integer is
begin
if not fifo_present then
return 1; -- Zero would be better but leads to "0 to -1" null
-- ranges that are not handled by XST Flint or earlier
-- because of the negative index.
else
return
log2(1 + dependent_props(FIFO_CAPACITY_BITS) /
dependent_props(RD_WIDTH_BITS)
);
end if;
end function bits_needed_for_vac;
function bits_needed_for_occ(
fifo_present: boolean;
dependent_props : DEPENDENT_PROPS_TYPE
) return integer is
begin
if not fifo_present then
return 1; -- Zero would be better but leads to "0 to -1" null
-- ranges that are not handled by XST Flint or earlier
-- because of the negative index.
else
return
log2(1 + dependent_props(FIFO_CAPACITY_BITS) /
dependent_props(WR_WIDTH_BITS)
);
end if;
end function bits_needed_for_occ;
function eff_dp(id : integer;
dep_prop : integer;
value : integer) return integer is
variable dp : integer := dep_prop;
type bo2na_type is array (boolean) of natural;
constant bo2na : bo2na_type := (0, 1);
begin
if value /= 0 then return value; end if; -- Not default
case id is
when IPIF_CHDMA_CHANNELS =>
-------------------
return( bo2na(dp = CLK_PERIOD_PS ) * 10000
+ bo2na(dp = PACKET_WAIT_UNIT_NS ) * 1000000
+ bo2na(dp = BURST_SIZE ) * 16
);
when others => return 0;
end case;
end eff_dp;
function populate_intr_mode_array (num_user_intr : integer;
intr_capture_mode : integer)
return INTEGER_ARRAY_TYPE is
variable intr_mode_array : INTEGER_ARRAY_TYPE(0 to num_user_intr-1);
begin
for i in 0 to num_user_intr-1 loop
intr_mode_array(i) := intr_capture_mode;
end loop;
return intr_mode_array;
end function populate_intr_mode_array;
function add_intr_ard_id_array(include_intr : boolean;
ard_id_array : INTEGER_ARRAY_TYPE)
return INTEGER_ARRAY_TYPE is
variable intr_ard_id_array : INTEGER_ARRAY_TYPE(0 to ard_id_array'length);
begin
intr_ard_id_array(0 to ard_id_array'length-1) := ard_id_array;
if include_intr then
intr_ard_id_array(ard_id_array'length) := IPIF_INTR;
return intr_ard_id_array;
else
return ard_id_array;
end if;
end function add_intr_ard_id_array;
function add_intr_ard_addr_range_array(include_intr : boolean;
ZERO_ADDR_PAD : std_logic_vector;
intr_baseaddr : std_logic_vector;
intr_highaddr : std_logic_vector;
ard_id_array : INTEGER_ARRAY_TYPE;
ard_addr_range_array : SLV64_ARRAY_TYPE)
return SLV64_ARRAY_TYPE is
variable intr_ard_addr_range_array : SLV64_ARRAY_TYPE(0 to ard_addr_range_array'length+1);
begin
intr_ard_addr_range_array(0 to ard_addr_range_array'length-1) := ard_addr_range_array;
if include_intr then
intr_ard_addr_range_array(2*get_id_index(ard_id_array,IPIF_INTR))
:= ZERO_ADDR_PAD & intr_baseaddr;
intr_ard_addr_range_array(2*get_id_index(ard_id_array,IPIF_INTR)+1)
:= ZERO_ADDR_PAD & intr_highaddr;
return intr_ard_addr_range_array;
else
return ard_addr_range_array;
end if;
end function add_intr_ard_addr_range_array;
function add_intr_ard_dwidth_array(include_intr : boolean;
intr_dwidth : integer;
ard_id_array : INTEGER_ARRAY_TYPE;
ard_dwidth_array : INTEGER_ARRAY_TYPE)
return INTEGER_ARRAY_TYPE is
variable intr_ard_dwidth_array : INTEGER_ARRAY_TYPE(0 to ard_dwidth_array'length);
begin
intr_ard_dwidth_array(0 to ard_dwidth_array'length-1) := ard_dwidth_array;
if include_intr then
intr_ard_dwidth_array(get_id_index(ard_id_array, IPIF_INTR)) := intr_dwidth;
return intr_ard_dwidth_array;
else
return ard_dwidth_array;
end if;
end function add_intr_ard_dwidth_array;
function add_intr_ard_num_ce_array(include_intr : boolean;
ard_id_array : INTEGER_ARRAY_TYPE;
ard_num_ce_array : INTEGER_ARRAY_TYPE)
return INTEGER_ARRAY_TYPE is
variable intr_ard_num_ce_array : INTEGER_ARRAY_TYPE(0 to ard_num_ce_array'length);
begin
intr_ard_num_ce_array(0 to ard_num_ce_array'length-1) := ard_num_ce_array;
if include_intr then
intr_ard_num_ce_array(get_id_index(ard_id_array, IPIF_INTR)) := 16;
return intr_ard_num_ce_array;
else
return ard_num_ce_array;
end if;
end function add_intr_ard_num_ce_array;
end package body ipif_pkg;
|
-- IPIF Common Library Package
-------------------------------------------------------------------------------
--
-- *************************************************************************
-- ** **
-- ** DISCLAIMER OF LIABILITY **
-- ** **
-- ** This text/file contains proprietary, confidential **
-- ** information of Xilinx, Inc., is distributed under **
-- ** license from Xilinx, Inc., and may be used, copied **
-- ** and/or disclosed only pursuant to the terms of a valid **
-- ** license agreement with Xilinx, Inc. Xilinx hereby **
-- ** grants you a license to use this text/file solely for **
-- ** design, simulation, implementation and creation of **
-- ** design files limited to Xilinx devices or technologies. **
-- ** Use with non-Xilinx devices or technologies is expressly **
-- ** prohibited and immediately terminates your license unless **
-- ** covered by a separate agreement. **
-- ** **
-- ** Xilinx is providing this design, code, or information **
-- ** "as-is" solely for use in developing programs and **
-- ** solutions for Xilinx devices, with no obligation on the **
-- ** part of Xilinx to provide support. By providing this design, **
-- ** code, or information as one possible implementation of **
-- ** this feature, application or standard, Xilinx is making no **
-- ** representation that this implementation is free from any **
-- ** claims of infringement. You are responsible for obtaining **
-- ** any rights you may require for your implementation. **
-- ** Xilinx expressly disclaims any warranty whatsoever with **
-- ** respect to the adequacy of the implementation, including **
-- ** but not limited to any warranties or representations that this **
-- ** implementation is free from claims of infringement, implied **
-- ** warranties of merchantability or fitness for a particular **
-- ** purpose. **
-- ** **
-- ** Xilinx products are not intended for use in life support **
-- ** appliances, devices, or systems. Use in such applications is **
-- ** expressly prohibited. **
-- ** **
-- ** Any modifications that are made to the Source Code are **
-- ** done at the users sole risk and will be unsupported. **
-- ** The Xilinx Support Hotline does not have access to source **
-- ** code and therefore cannot answer specific questions related **
-- ** to source HDL. The Xilinx Hotline support of original source **
-- ** code IP shall only address issues and questions related **
-- ** to the standard Netlist version of the core (and thus **
-- ** indirectly, the original core source). **
-- ** **
-- ** Copyright (c) 2002-2010 Xilinx, Inc. All rights reserved. **
-- ** **
-- ** This copyright and support notice must be retained as part **
-- ** of this text at all times. **
-- ** **
-- *************************************************************************
--
-------------------------------------------------------------------------------
-- Filename: ipif_pkg.vhd
-- Version: Intital
-- Description: This file contains the constants and functions used in the
-- ipif common library components.
--
-------------------------------------------------------------------------------
-- Structure:
--
-------------------------------------------------------------------------------
-- Author: DET
-- History:
-- DET 02/21/02 -- Created from proc_common_pkg.vhd
--
-- DET 03/13/02 -- PLB IPIF development updates
-- ^^^^^^
-- - Commented out string types and string functions due to an XST
-- problem with string arrays and functions. THe string array
-- processing functions were replaced with comperable functions
-- operating on integer arrays.
-- ~~~~~~
--
--
-- DET 4/30/2002 Initial
-- ~~~~~~
-- - Added three functions: rebuild_slv32_array, rebuild_slv64_array, and
-- rebuild_int_array to support removal of unused elements from the
-- ARD arrays.
-- ^^^^^^ --
--
-- FLO 8/12/2002
-- ~~~~~~
-- - Added three functions: bits_needed_for_vac, bits_needed_for_occ,
-- and get_id_index_iboe.
-- (Removed provisional functions bits_needed_for_vacancy,
-- bits needed_for_occupancy, and bits_needed_for.)
-- ^^^^^^
--
-- FLO 3/24/2003
-- ~~~~~~
-- - Added dependent property paramters for channelized DMA.
-- - Added common property parameter array type.
-- - Definded the KEYHOLD_BURST common-property parameter.
-- ^^^^^^
--
-- FLO 10/22/2003
-- ~~~~~~
-- - Some adjustment to CHDMA parameterization.
-- - Cleanup of obsolete code and comments. (The former "XST workaround"
-- has become the officially deployed method.)
-- ^^^^^^
--
-- LSS 03/24/2004
-- ~~~~~~
-- - Added 5 functions
-- ^^^^^^
--
-- ALS 09/03/04
-- ^^^^^^
-- -- Added constants to describe the channel protocols used in MCH_OPB_IPIF
-- ~~~~~~
--
-- DET 1/17/2008 v4_0
-- ~~~~~~
-- - Changed proc_common library version to v4_0
-- - Incorporated new disclaimer header
-- ^^^^^^
--
-------------------------------------------------------------------------------
-- Naming Conventions:
-- active low signals: "*_n"
-- clock signals: "clk", "clk_div#", "clk_#x"
-- reset signals: "rst", "rst_n"
-- generics: "C_*"
-- user defined types: "*_TYPE"
-- state machine next state: "*_ns"
-- state machine current state: "*_cs"
-- combinatorial signals: "*_com"
-- pipelined or register delay signals: "*_d#"
-- counter signals: "*cnt*"
-- clock enable signals: "*_ce"
-- internal version of output port "*_i"
-- device pins: "*_pin"
-- ports: - Names begin with Uppercase
-- processes: "*_PROCESS"
-- component instantiations: "<ENTITY_>I_<#|FUNC>
-------------------------------------------------------------------------------
library ieee;
use ieee.std_logic_1164.all;
-- need conversion function to convert reals/integers to std logic vectors
use ieee.std_logic_arith.all;
use ieee.std_logic_arith.all;
use ieee.std_logic_unsigned.all;
package ipif_pkg is
-------------------------------------------------------------------------------
-- Type Declarations
-------------------------------------------------------------------------------
type SLV32_ARRAY_TYPE is array (natural range <>) of std_logic_vector(0 to 31);
subtype SLV64_TYPE is std_logic_vector(0 to 63);
type SLV64_ARRAY_TYPE is array (natural range <>) of SLV64_TYPE;
type INTEGER_ARRAY_TYPE is array (natural range <>) of integer;
-------------------------------------------------------------------------------
-- Function and Procedure Declarations
-------------------------------------------------------------------------------
function "=" (s1: in string; s2: in string) return boolean;
function equaluseCase( str1, str2 : STRING ) RETURN BOOLEAN;
function calc_num_ce (ce_num_array : INTEGER_ARRAY_TYPE) return integer;
function calc_start_ce_index (ce_num_array : INTEGER_ARRAY_TYPE;
index : integer) return integer;
function get_min_dwidth (dwidth_array: INTEGER_ARRAY_TYPE) return integer;
function get_max_dwidth (dwidth_array: INTEGER_ARRAY_TYPE) return integer;
function S32 (in_string : string) return string;
--------------------------------------------------------------------------------
-- ARD support functions.
-- These function can be useful when operating with the ARD parameterization.
--------------------------------------------------------------------------------
function get_id_index (id_array :INTEGER_ARRAY_TYPE;
id : integer)
return integer;
function get_id_index_iboe (id_array :INTEGER_ARRAY_TYPE;
id : integer)
return integer;
function find_ard_id (id_array : INTEGER_ARRAY_TYPE;
id : integer) return boolean;
function find_id_dwidth (id_array : INTEGER_ARRAY_TYPE;
dwidth_array: INTEGER_ARRAY_TYPE;
id : integer;
default : integer)
return integer;
function cnt_ipif_id_blks (id_array : INTEGER_ARRAY_TYPE) return integer;
function get_ipif_id_dbus_index (id_array : INTEGER_ARRAY_TYPE;
id : integer)
return integer ;
function rebuild_slv32_array (slv32_array : SLV32_ARRAY_TYPE;
num_valid_pairs : integer)
return SLV32_ARRAY_TYPE;
function rebuild_slv64_array (slv64_array : SLV64_ARRAY_TYPE;
num_valid_pairs : integer)
return SLV64_ARRAY_TYPE;
function rebuild_int_array (int_array : INTEGER_ARRAY_TYPE;
num_valid_entry : integer)
return INTEGER_ARRAY_TYPE;
-- 5 Functions Added 3/24/04
function populate_intr_mode_array (num_user_intr : integer;
intr_capture_mode : integer)
return INTEGER_ARRAY_TYPE ;
function add_intr_ard_id_array(include_intr : boolean;
ard_id_array : INTEGER_ARRAY_TYPE)
return INTEGER_ARRAY_TYPE;
function add_intr_ard_addr_range_array(include_intr : boolean;
ZERO_ADDR_PAD : std_logic_vector;
intr_baseaddr : std_logic_vector;
intr_highaddr : std_logic_vector;
ard_id_array : INTEGER_ARRAY_TYPE;
ard_addr_range_array : SLV64_ARRAY_TYPE)
return SLV64_ARRAY_TYPE;
function add_intr_ard_num_ce_array(include_intr : boolean;
ard_id_array : INTEGER_ARRAY_TYPE;
ard_num_ce_array : INTEGER_ARRAY_TYPE)
return INTEGER_ARRAY_TYPE;
function add_intr_ard_dwidth_array(include_intr : boolean;
intr_dwidth : integer;
ard_id_array : INTEGER_ARRAY_TYPE;
ard_dwidth_array : INTEGER_ARRAY_TYPE)
return INTEGER_ARRAY_TYPE;
function log2(x : natural) return integer;
function clog2(x : positive) return natural;
-------------------------------------------------------------------------------
-- Constant Declarations
-------------------------------------------------------------------------------
-------------------------------------------------------------------------------
-- Channel Protocols
-- The constant declarations below give symbolic-name aliases for values that
-- can be used in the C_MCH_PROTOCOL_ARRAY generic of the MCH_OPB_IPIF.
-------------------------------------------------------------------------------
constant XCL : integer := 0;
constant DAG : integer := 1;
--------------------------------------------------------------------------------
-- Address range types.
-- The constant declarations, below, give symbolic-name aliases for values
-- that can be used in the C_ARD_ID_ARRAY generic of IPIFs. The first set
-- gives aliases that are used to include IPIF services.
--------------------------------------------------------------------------------
-- IPIF module aliases
Constant IPIF_INTR : integer := 1;
Constant IPIF_RST : integer := 2;
Constant IPIF_SESR_SEAR : integer := 3;
Constant IPIF_DMA_SG : integer := 4;
Constant IPIF_WRFIFO_REG : integer := 5;
Constant IPIF_WRFIFO_DATA : integer := 6;
Constant IPIF_RDFIFO_REG : integer := 7;
Constant IPIF_RDFIFO_DATA : integer := 8;
Constant IPIF_CHDMA_CHANNELS : integer := 9;
Constant IPIF_CHDMA_GLOBAL_REGS : integer := 10;
Constant CHDMA_STATUS_FIFO : integer := 90;
-- Some predefined user module aliases
Constant USER_00 : integer := 100;
Constant USER_01 : integer := 101;
Constant USER_02 : integer := 102;
Constant USER_03 : integer := 103;
Constant USER_04 : integer := 104;
Constant USER_05 : integer := 105;
Constant USER_06 : integer := 106;
Constant USER_07 : integer := 107;
Constant USER_08 : integer := 108;
Constant USER_09 : integer := 109;
Constant USER_10 : integer := 110;
Constant USER_11 : integer := 111;
Constant USER_12 : integer := 112;
Constant USER_13 : integer := 113;
Constant USER_14 : integer := 114;
Constant USER_15 : integer := 115;
Constant USER_16 : integer := 116;
---( Start of Dependent Properties declarations
--------------------------------------------------------------------------------
-- Declarations for Dependent Properties (properties that depend on the type of
-- the address range, or in other words, address-range-specific parameters).
-- There is one property, i.e. one parameter, encoded as an integer at
-- each index of the properties array. There is one properties array for
-- each address range.
--
-- The C_ARD_DEPENDENT_PROPS_ARRAY generic parameter in (most) IPIFs is such
-- a properties array and it is usually giving its (static) value using a
-- VHDL aggregate construct. (--ToDo, give an example of this.)
--
-- The the "assigned" default value of a dependent property is zero. This value
-- is usually specified the aggregate by leaving its (index) name out so that
-- it is covered by an "others => 0" choice in the aggregate. Some parameters,
-- as noted in the definitions, below, have an "effective" default value that is
-- different from the assigned default value of zero. In such cases, the
-- function, eff_dp, given below, can be used to get the effective value of
-- the dependent property.
--------------------------------------------------------------------------------
constant DEPENDENT_PROPS_SIZE : integer := 32;
subtype DEPENDENT_PROPS_TYPE
is INTEGER_ARRAY_TYPE(0 to DEPENDENT_PROPS_SIZE-1);
type DEPENDENT_PROPS_ARRAY_TYPE
is array (natural range <>) of DEPENDENT_PROPS_TYPE;
--------------------------------------------------------------------------------
-- Below are the indices of dependent properties for the different types of
-- address ranges.
--
-- Example: Let C_ARD_DEPENDENT_PROPS_ARRAY hold the dependent properites
-- for a set of address ranges. Then, e.g.,
--
-- C_ARD_DEPENDENT_PROPS_ARRAY(i)(FIFO_CAPACITY_BITS)
--
-- gives the fifo capacity in bits, provided that the i'th address range
-- is of type IPIF_WRFIFO_DATA or IPIF_RDFIFO_DATA.
--
-- These indices should be referenced only by the names below and never
-- by numerical literals. (The right to change numerical index assignments
-- is reserved; applications using the names will not be affected by such
-- reassignments.)
--------------------------------------------------------------------------------
--
--ToDo, if the interrupt controller parameterization is ever moved to
-- C_ARD_DEPENDENT_PROPS_ARRAY, then the following declarations
-- could be uncommented and used.
---- IPIF_INTR IDX
---------------------------------------------------------------------------- ---
constant EXCLUDE_DEV_ISC : integer := 0;
-- 1 specifies that only the global interrupt
-- enable is present in the device interrupt source
-- controller and that the only source of interrupts
-- in the device is the IP interrupt source controller.
-- 0 specifies that the full device interrupt
-- source controller structure will be included.
constant INCLUDE_DEV_PENCODER : integer := 1;
-- 1 will include the Device IID in the device interrupt
-- source controller, 0 will exclude it.
--
-- IPIF_WRFIFO_DATA or IPIF_RDFIFO_DATA IDX
---------------------------------------------------------------------------- ---
constant FIFO_CAPACITY_BITS : integer := 0;
constant WR_WIDTH_BITS : integer := 1;
constant RD_WIDTH_BITS : integer := 2;
constant EXCLUDE_PACKET_MODE : integer := 3;
-- 1 Don't include packet mode features
-- 0 Include packet mode features
constant EXCLUDE_VACANCY : integer := 4;
-- 1 Don't include vacancy calculation
-- 0 Include vacancy calculation
-- See also the functions
-- bits_needed_for_vac and
-- bits_needed_for_occ that are declared below.
constant INCLUDE_DRE : integer := 5;
constant INCLUDE_AUTOPUSH_POP : integer := 6;
constant AUTOPUSH_POP_CE : integer := 7;
constant INCLUDE_CSUM : integer := 8;
--------------------------------------------------------------------------------
--
-- DMA_SG IDX
---------------------------------------------------------------------------- ---
--------------------------------------------------------------------------------
-- IPIF_CHDMA_CHANNELS IDX
---------------------------------------------------------------------------- ---
constant NUM_SUBS_FOR_PHYS_0 : integer :=0;
constant NUM_SUBS_FOR_PHYS_1 : integer :=1;
constant NUM_SUBS_FOR_PHYS_2 : integer :=2;
constant NUM_SUBS_FOR_PHYS_3 : integer :=3;
constant NUM_SUBS_FOR_PHYS_4 : integer :=4;
constant NUM_SUBS_FOR_PHYS_5 : integer :=5;
constant NUM_SUBS_FOR_PHYS_6 : integer :=6;
constant NUM_SUBS_FOR_PHYS_7 : integer :=7;
constant NUM_SUBS_FOR_PHYS_8 : integer :=8;
constant NUM_SUBS_FOR_PHYS_9 : integer :=9;
constant NUM_SUBS_FOR_PHYS_10 : integer :=10;
constant NUM_SUBS_FOR_PHYS_11 : integer :=11;
constant NUM_SUBS_FOR_PHYS_12 : integer :=12;
constant NUM_SUBS_FOR_PHYS_13 : integer :=13;
constant NUM_SUBS_FOR_PHYS_14 : integer :=14;
constant NUM_SUBS_FOR_PHYS_15 : integer :=15;
-- Gives the number of sub-channels for physical channel i.
--
-- These constants, which will be MAX_NUM_PHYS_CHANNELS in number (see
-- below), have consecutive values starting with 0 for
-- NUM_SUBS_FOR_PHYS_0. (The constants serve the purpose of giving symbolic
-- names for use in the dependent-properties aggregates that parameterize
-- an IPIF_CHDMA_CHANNELS address range.)
--
-- [Users can ignore this note for developers
-- If the number of physical channels changes, both the
-- IPIF_CHDMA_CHANNELS constants and MAX_NUM_PHYS_CHANNELS,
-- below, must be adjusted.
-- (Use of an array constant or a function of the form
-- NUM_SUBS_FOR_PHYS(i) to define the indices
-- runs afoul of LRM restrictions on non-locally static aggregate
-- choices. (Further, the LRM imposes perhaps unnecessarily
-- strict limits on what qualifies as a locally static primary.)
-- Note: This information is supplied for the benefit of anyone seeking
-- to improve the way that these NUM_SUBS_FOR_PHYS parameter
-- indices are defined.)
-- End of note for developers ]
--
-- The value associated with any index NUM_SUBS_FOR_PHYS_i in the
-- dependent-properties array must be even since TX and RX channels
-- come in pairs with the TX followed immediately by
-- the corresponding RX.
--
constant NUM_SIMPLE_DMA_CHANS : integer :=16;
-- The number of simple DMA channels.
constant NUM_SIMPLE_SG_CHANS : integer :=17;
-- The number of simple SG channels.
constant INTR_COALESCE : integer :=18;
-- 0 Interrupt coalescing is disabled
-- 1 Interrupt coalescing is enabled
constant CLK_PERIOD_PS : integer :=19;
-- The period of the OPB Bus clock in ps.
-- The default value of 0 is a special value that
-- is synonymous with 10000 ps (10 ns).
-- The value for CLK_PERIOD_PS is relevant only if (INTR_COALESCE = 1).
constant PACKET_WAIT_UNIT_NS : integer :=20;
-- Gives the unit for used for timing of pack-wait bounds.
-- The default value of 0 is a special value that
-- is synonymous with 1,000,000 ns (1 ms) and a non-default
-- value is typically only used for testing.
-- Relevant only if (INTR_COALESCE = 1).
constant BURST_SIZE : integer :=21;
-- 1, 2, 4, 8 or 16
-- The default value of 0 is a special value that
-- is synonymous with a burst size of 16.
-- Setting the BURST_SIZE to 1 effectively disables
-- bursts.
constant REMAINDER_AS_SINGLES : integer :=22;
-- 0 Remainder handled as a short burst
-- 1 Remainder handled as a series of singles
--------------------------------------------------------------------------------
-- The constant below is not the index of a dependent-properties
-- parameter (and, as such, would never appear as a choice in a
-- dependent-properties aggregate). Rather, it is fixed to the maximum
-- number of physical channels that an Address Range of type
-- IPIF_CHDMA_CHANNELS supports. It must be maintained in conjuction with
-- the constants named, e.g., NUM_SUBS_FOR_PHYS_15, above.
--------------------------------------------------------------------------------
constant MAX_NUM_PHYS_CHANNELS : natural := 16;
--------------------------------------------------------------------------
-- EXAMPLE: Here is an example dependent-properties aggregate for an
-- address range of type IPIF_CHDMA_CHANNELS.
-- To have a compact list of all of the CHDMA parameters, all are
-- shown, however three are commented out and the unneeded
-- MUM_SUBS_FOR_PHYS_x are excluded. The "OTHERS => 0" association
-- gives these parameters their default values, such that, for the example
--
-- - All physical channels above 2 have zero subchannels (effectively,
-- these physical channels are not used)
-- - There are no simple SG channels
-- - The packet-wait time unit is 1 ms
-- - Burst size is 16
--------------------------------------------------------------------------
-- (
-- NUM_SUBS_FOR_PHYS_0 => 8,
-- NUM_SUBS_FOR_PHYS_1 => 4,
-- NUM_SUBS_FOR_PHYS_2 => 14,
-- NUM_SIMPLE_DMA_CHANS => 1,
-- --NUM_SIMPLE_SG_CHANS => 5,
-- INTR_COALESCE => 1,
-- CLK_PERIOD_PS => 20000,
-- --PACKET_WAIT_UNIT_NS => 50000,
-- --BURST_SIZE => 1,
-- REMAINDER_AS_SINGLES => 1,
-- OTHERS => 0
-- )
--
--------------------------------------------------------------------------------
--------------------------------------------------------------------------------
-- Calculates the number of bits needed to convey the vacancy (emptiness) of
-- the fifo described by dependent_props, if fifo_present. If not fifo_present,
-- returns 0 (or the smallest value allowed by tool limitations on null arrays)
-- without making reference to dependent_props.
--------------------------------------------------------------------------------
function bits_needed_for_vac(
fifo_present: boolean;
dependent_props : DEPENDENT_PROPS_TYPE
) return integer;
--------------------------------------------------------------------------------
-- Calculates the number of bits needed to convey the occupancy (fullness) of
-- the fifo described by dependent_props, if fifo_present. If not fifo_present,
-- returns 0 (or the smallest value allowed by tool limitations on null arrays)
-- without making reference to dependent_props.
--------------------------------------------------------------------------------
function bits_needed_for_occ(
fifo_present: boolean;
dependent_props : DEPENDENT_PROPS_TYPE
) return integer;
--------------------------------------------------------------------------------
-- Function eff_dp.
--
-- For some of the dependent properties, the default value of zero is meant
-- to imply an effective default value of other than zero (see e.g.
-- PKT_WAIT_UNIT_NS for the IPIF_CHDMA_CHANNELS address-range type). The
-- following function is used to get the (possibly default-adjusted)
-- value for a dependent property.
--
-- Example call:
--
-- eff_value_of_param :=
-- eff_dp(
-- C_IPIF_CHDMA_CHANNELS,
-- PACKET_WAIT_UNIT_NS,
-- C_ARD_DEPENDENT_PROPS_ARRAY(i)(PACKET_WAIT_UNIT_NS)
-- );
--
-- where C_ARD_DEPENDENT_PROPS_ARRAY(i) is an object of type
-- DEPENDENT_PROPS_ARRAY_TYPE, that was parameterized for an address range of
-- type C_IPIF_CHDMA_CHANNELS.
--------------------------------------------------------------------------------
function eff_dp(id : integer; -- The type of address range.
dep_prop : integer; -- The index of the dependent prop.
value : integer -- The value at that index.
) return integer; -- The effective value, possibly adjusted
-- if value has the default value of 0.
---) End of Dependent Properties declarations
--------------------------------------------------------------------------------
-- Declarations for Common Properties (properties that apply regardless of the
-- type of the address range). Structurally, these work the same as
-- the dependent properties.
--------------------------------------------------------------------------------
constant COMMON_PROPS_SIZE : integer := 2;
subtype COMMON_PROPS_TYPE
is INTEGER_ARRAY_TYPE(0 to COMMON_PROPS_SIZE-1);
type COMMON_PROPS_ARRAY_TYPE
is array (natural range <>) of COMMON_PROPS_TYPE;
--------------------------------------------------------------------------------
-- Below are the indices of the common properties.
--
-- These indices should be referenced only by the names below and never
-- by numerical literals.
-- IDX
---------------------------------------------------------------------------- ---
constant KEYHOLE_BURST : integer := 0;
-- 1 All addresses of a burst are forced to the initial
-- address of the burst.
-- 0 Burst addresses follow the bus protocol.
-- IP interrupt mode array constants
Constant INTR_PASS_THRU : integer := 1;
Constant INTR_PASS_THRU_INV : integer := 2;
Constant INTR_REG_EVENT : integer := 3;
Constant INTR_REG_EVENT_INV : integer := 4;
Constant INTR_POS_EDGE_DETECT : integer := 5;
Constant INTR_NEG_EDGE_DETECT : integer := 6;
end ipif_pkg;
package body ipif_pkg is
-------------------------------------------------------------------------------
-- Function log2 -- returns number of bits needed to encode x choices
-- x = 0 returns 0
-- x = 1 returns 0
-- x = 2 returns 1
-- x = 4 returns 2, etc.
-------------------------------------------------------------------------------
--
function log2(x : natural) return integer is
variable i : integer := 0;
variable val: integer := 1;
begin
if x = 0 then return 0;
else
for j in 0 to 29 loop -- for loop for XST
if val >= x then null;
else
i := i+1;
val := val*2;
end if;
end loop;
-- Fix per CR520627 XST was ignoring this anyway and printing a
-- Warning in SRP file. This will get rid of the warning and not
-- impact simulation.
-- synthesis translate_off
assert val >= x
report "Function log2 received argument larger" &
" than its capability of 2^30. "
severity failure;
-- synthesis translate_on
return i;
end if;
end function log2;
--------------------------------------------------------------------------------
-- Function clog2 - returns the integer ceiling of the base 2 logarithm of x,
-- i.e., the least integer greater than or equal to log2(x).
--------------------------------------------------------------------------------
function clog2(x : positive) return natural is
variable r : natural := 0;
variable rp : natural := 1; -- rp tracks the value 2**r
begin
while rp < x loop -- Termination condition T: x <= 2**r
-- Loop invariant L: 2**(r-1) < x
r := r + 1;
if rp > integer'high - rp then exit; end if; -- If doubling rp overflows
-- the integer range, the doubled value would exceed x, so safe to exit.
rp := rp + rp;
end loop;
-- L and T <-> 2**(r-1) < x <= 2**r <-> (r-1) < log2(x) <= r
return r; --
end clog2;
-------------------------------------------------------------------------------
-- Function Definitions
-------------------------------------------------------------------------------
-----------------------------------------------------------------------------
-- Function "="
--
-- This function can be used to overload the "=" operator when comparing
-- strings.
-----------------------------------------------------------------------------
function "=" (s1: in string; s2: in string) return boolean is
constant tc: character := ' '; -- string termination character
variable i: integer := 1;
variable v1 : string(1 to s1'length) := s1;
variable v2 : string(1 to s2'length) := s2;
begin
while (i <= v1'length) and (v1(i) /= tc) and
(i <= v2'length) and (v2(i) /= tc) and
(v1(i) = v2(i))
loop
i := i+1;
end loop;
return ((i > v1'length) or (v1(i) = tc)) and
((i > v2'length) or (v2(i) = tc));
end;
----------------------------------------------------------------------------
-- Function equaluseCase
--
-- This function returns true if case sensitive string comparison determines
-- that str1 and str2 are the same.
-----------------------------------------------------------------------------
FUNCTION equaluseCase( str1, str2 : STRING ) RETURN BOOLEAN IS
CONSTANT len1 : INTEGER := str1'length;
CONSTANT len2 : INTEGER := str2'length;
VARIABLE equal : BOOLEAN := TRUE;
BEGIN
IF NOT (len1=len2) THEN
equal := FALSE;
ELSE
FOR i IN str1'range LOOP
IF NOT (str1(i) = str2(i)) THEN
equal := FALSE;
END IF;
END LOOP;
END IF;
RETURN equal;
END equaluseCase;
-----------------------------------------------------------------------------
-- Function calc_num_ce
--
-- This function is used to process the array specifying the number of Chip
-- Enables required for a Base Address specification. The array is input to
-- the function and an integer is returned reflecting the total number of
-- Chip Enables required for the CE, RdCE, and WrCE Buses
-----------------------------------------------------------------------------
function calc_num_ce (ce_num_array : INTEGER_ARRAY_TYPE) return integer is
Variable ce_num_sum : integer := 0;
begin
for i in 0 to (ce_num_array'length)-1 loop
ce_num_sum := ce_num_sum + ce_num_array(i);
End loop;
return(ce_num_sum);
end function calc_num_ce;
-----------------------------------------------------------------------------
-- Function calc_start_ce_index
--
-- This function is used to process the array specifying the number of Chip
-- Enables required for a Base Address specification. The CE Size array is
-- input to the function and an integer index representing the index of the
-- target module in the ce_num_array. An integer is returned reflecting the
-- starting index of the assigned Chip Enables within the CE, RdCE, and
-- WrCE Buses.
-----------------------------------------------------------------------------
function calc_start_ce_index (ce_num_array : INTEGER_ARRAY_TYPE;
index : integer) return integer is
Variable ce_num_sum : integer := 0;
begin
If (index = 0) Then
ce_num_sum := 0;
else
for i in 0 to index-1 loop
ce_num_sum := ce_num_sum + ce_num_array(i);
End loop;
End if;
return(ce_num_sum);
end function calc_start_ce_index;
-----------------------------------------------------------------------------
-- Function get_min_dwidth
--
-- This function is used to process the array specifying the data bus width
-- for each of the target modules. The dwidth_array is input to the function
-- and an integer is returned that is the smallest value found of all the
-- entries in the array.
-----------------------------------------------------------------------------
function get_min_dwidth (dwidth_array: INTEGER_ARRAY_TYPE) return integer is
Variable temp_min : Integer := 1024;
begin
for i in 0 to dwidth_array'length-1 loop
If (dwidth_array(i) < temp_min) Then
temp_min := dwidth_array(i);
else
null;
End if;
End loop;
return(temp_min);
end function get_min_dwidth;
-----------------------------------------------------------------------------
-- Function get_max_dwidth
--
-- This function is used to process the array specifying the data bus width
-- for each of the target modules. The dwidth_array is input to the function
-- and an integer is returned that is the largest value found of all the
-- entries in the array.
-----------------------------------------------------------------------------
function get_max_dwidth (dwidth_array: INTEGER_ARRAY_TYPE) return integer is
Variable temp_max : Integer := 0;
begin
for i in 0 to dwidth_array'length-1 loop
If (dwidth_array(i) > temp_max) Then
temp_max := dwidth_array(i);
else
null;
End if;
End loop;
return(temp_max);
end function get_max_dwidth;
-----------------------------------------------------------------------------
-- Function S32
--
-- This function is used to expand an input string to 32 characters by
-- padding with spaces. If the input string is larger than 32 characters,
-- it will truncate to 32 characters.
-----------------------------------------------------------------------------
function S32 (in_string : string) return string is
constant OUTPUT_STRING_LENGTH : integer := 32;
Constant space : character := ' ';
variable new_string : string(1 to 32);
Variable start_index : Integer := in_string'length+1;
begin
If (in_string'length < OUTPUT_STRING_LENGTH) Then
for i in 1 to in_string'length loop
new_string(i) := in_string(i);
End loop;
for j in start_index to OUTPUT_STRING_LENGTH loop
new_string(j) := space;
End loop;
else -- use first 32 chars of in_string (truncate the rest)
for k in 1 to OUTPUT_STRING_LENGTH loop
new_string(k) := in_string(k);
End loop;
End if;
return(new_string);
end function S32;
-----------------------------------------------------------------------------
-- Function get_id_index
--
-- This function is used to process the array specifying the target function
-- assigned to a Base Address pair address range. The id_array and a
-- id number is input to the function. A integer is returned reflecting the
-- array index of the id matching the id input number. This function
-- should only be called if the id number is known to exist in the
-- name_array input. This can be detirmined by using the find_ard_id
-- function.
-----------------------------------------------------------------------------
function get_id_index (id_array :INTEGER_ARRAY_TYPE;
id : integer) return integer is
Variable match : Boolean := false;
Variable match_index : Integer := 10000; -- a really big number!
begin
for array_index in 0 to id_array'length-1 loop
If (match = true) Then -- match already found so do nothing
null;
else -- compare the numbers one by one
match := (id_array(array_index) = id);
If (match) Then
match_index := array_index;
else
null;
End if;
End if;
End loop;
return(match_index);
end function get_id_index;
--------------------------------------------------------------------------------
-- get_id_index but return a value in bounds on error (iboe).
--
-- This function is the same as get_id_index, except that when id does
-- not exist in id_array, the value returned is any index that is
-- within the index range of id_array.
--
-- This function would normally only be used where function find_ard_id
-- is used to establish the existence of id but, even when non-existent,
-- an element of one of the ARD arrays will be computed from the
-- returned get_id_index_iboe value. See, e.g., function bits_needed_for_vac
-- and the example call, below
--
-- bits_needed_for_vac(
-- find_ard_id(C_ARD_ID_ARRAY, IPIF_RDFIFO_DATA),
-- C_ARD_DEPENDENT_PROPS_ARRAY(get_id_index_iboe(C_ARD_ID_ARRAY,
-- IPIF_RDFIFO_DATA))
-- )
--------------------------------------------------------------------------------
function get_id_index_iboe (id_array :INTEGER_ARRAY_TYPE;
id : integer) return integer is
Variable match : Boolean := false;
Variable match_index : Integer := id_array'left; -- any valid array index
begin
for array_index in 0 to id_array'length-1 loop
If (match = true) Then -- match already found so do nothing
null;
else -- compare the numbers one by one
match := (id_array(array_index) = id);
If (match) Then match_index := array_index;
else null;
End if;
End if;
End loop;
return(match_index);
end function get_id_index_iboe;
-----------------------------------------------------------------------------
-- Function find_ard_id
--
-- This function is used to process the array specifying the target function
-- assigned to a Base Address pair address range. The id_array and a
-- integer id is input to the function. A boolean is returned reflecting the
-- presence (or not) of a number in the array matching the id input number.
-----------------------------------------------------------------------------
function find_ard_id (id_array : INTEGER_ARRAY_TYPE;
id : integer) return boolean is
Variable match : Boolean := false;
begin
for array_index in 0 to id_array'length-1 loop
If (match = true) Then -- match already found so do nothing
null;
else -- compare the numbers one by one
match := (id_array(array_index) = id);
End if;
End loop;
return(match);
end function find_ard_id;
-----------------------------------------------------------------------------
-- Function find_id_dwidth
--
-- This function is used to find the data width of a target module. If the
-- target module exists, the data width is extracted from the input dwidth
-- array. If the module is not in the ID array, the default input is
-- returned. This function is needed to assign data port size constraints on
-- unconstrained port widths.
-----------------------------------------------------------------------------
function find_id_dwidth (id_array : INTEGER_ARRAY_TYPE;
dwidth_array: INTEGER_ARRAY_TYPE;
id : integer;
default : integer) return integer is
Variable id_present : Boolean := false;
Variable array_index : Integer := 0;
Variable dwidth : Integer := default;
begin
id_present := find_ard_id(id_array, id);
If (id_present) Then
array_index := get_id_index (id_array, id);
dwidth := dwidth_array(array_index);
else
null; -- use default input
End if;
Return (dwidth);
end function find_id_dwidth;
-----------------------------------------------------------------------------
-- Function cnt_ipif_id_blks
--
-- This function is used to detirmine the number of IPIF components specified
-- in the ARD ID Array. An integer is returned representing the number
-- of elements counted. User IDs are ignored in the counting process.
-----------------------------------------------------------------------------
function cnt_ipif_id_blks (id_array : INTEGER_ARRAY_TYPE)
return integer is
Variable blk_count : integer := 0;
Variable temp_id : integer;
begin
for array_index in 0 to id_array'length-1 loop
temp_id := id_array(array_index);
If (temp_id = IPIF_WRFIFO_DATA or
temp_id = IPIF_RDFIFO_DATA or
temp_id = IPIF_RST or
temp_id = IPIF_INTR or
temp_id = IPIF_DMA_SG or
temp_id = IPIF_SESR_SEAR
) Then -- IPIF block found
blk_count := blk_count+1;
else -- go to next loop iteration
null;
End if;
End loop;
return(blk_count);
end function cnt_ipif_id_blks;
-----------------------------------------------------------------------------
-- Function get_ipif_id_dbus_index
--
-- This function is used to detirmine the IPIF relative index of a given
-- ID value. User IDs are ignored in the index detirmination.
-----------------------------------------------------------------------------
function get_ipif_id_dbus_index (id_array : INTEGER_ARRAY_TYPE;
id : integer)
return integer is
Variable blk_index : integer := 0;
Variable temp_id : integer;
Variable id_found : Boolean := false;
begin
for array_index in 0 to id_array'length-1 loop
temp_id := id_array(array_index);
If (id_found) then
null;
elsif (temp_id = id) then
id_found := true;
elsif (temp_id = IPIF_WRFIFO_DATA or
temp_id = IPIF_RDFIFO_DATA or
temp_id = IPIF_RST or
temp_id = IPIF_INTR or
temp_id = IPIF_DMA_SG or
temp_id = IPIF_SESR_SEAR
) Then -- IPIF block found
blk_index := blk_index+1;
else -- user block so do nothing
null;
End if;
End loop;
return(blk_index);
end function get_ipif_id_dbus_index;
------------------------------------------------------------------------------
-- Function: rebuild_slv32_array
--
-- Description:
-- This function takes an input slv32 array and rebuilds an output slv32
-- array composed of the first "num_valid_entry" elements from the input
-- array.
------------------------------------------------------------------------------
function rebuild_slv32_array (slv32_array : SLV32_ARRAY_TYPE;
num_valid_pairs : integer)
return SLV32_ARRAY_TYPE is
--Constants
constant num_elements : Integer := num_valid_pairs * 2;
-- Variables
variable temp_baseaddr32_array : SLV32_ARRAY_TYPE( 0 to num_elements-1);
begin
for array_index in 0 to num_elements-1 loop
temp_baseaddr32_array(array_index) := slv32_array(array_index);
end loop;
return(temp_baseaddr32_array);
end function rebuild_slv32_array;
------------------------------------------------------------------------------
-- Function: rebuild_slv64_array
--
-- Description:
-- This function takes an input slv64 array and rebuilds an output slv64
-- array composed of the first "num_valid_entry" elements from the input
-- array.
------------------------------------------------------------------------------
function rebuild_slv64_array (slv64_array : SLV64_ARRAY_TYPE;
num_valid_pairs : integer)
return SLV64_ARRAY_TYPE is
--Constants
constant num_elements : Integer := num_valid_pairs * 2;
-- Variables
variable temp_baseaddr64_array : SLV64_ARRAY_TYPE( 0 to num_elements-1);
begin
for array_index in 0 to num_elements-1 loop
temp_baseaddr64_array(array_index) := slv64_array(array_index);
end loop;
return(temp_baseaddr64_array);
end function rebuild_slv64_array;
------------------------------------------------------------------------------
-- Function: rebuild_int_array
--
-- Description:
-- This function takes an input integer array and rebuilds an output integer
-- array composed of the first "num_valid_entry" elements from the input
-- array.
------------------------------------------------------------------------------
function rebuild_int_array (int_array : INTEGER_ARRAY_TYPE;
num_valid_entry : integer)
return INTEGER_ARRAY_TYPE is
-- Variables
variable temp_int_array : INTEGER_ARRAY_TYPE( 0 to num_valid_entry-1);
begin
for array_index in 0 to num_valid_entry-1 loop
temp_int_array(array_index) := int_array(array_index);
end loop;
return(temp_int_array);
end function rebuild_int_array;
function bits_needed_for_vac(
fifo_present: boolean;
dependent_props : DEPENDENT_PROPS_TYPE
) return integer is
begin
if not fifo_present then
return 1; -- Zero would be better but leads to "0 to -1" null
-- ranges that are not handled by XST Flint or earlier
-- because of the negative index.
else
return
log2(1 + dependent_props(FIFO_CAPACITY_BITS) /
dependent_props(RD_WIDTH_BITS)
);
end if;
end function bits_needed_for_vac;
function bits_needed_for_occ(
fifo_present: boolean;
dependent_props : DEPENDENT_PROPS_TYPE
) return integer is
begin
if not fifo_present then
return 1; -- Zero would be better but leads to "0 to -1" null
-- ranges that are not handled by XST Flint or earlier
-- because of the negative index.
else
return
log2(1 + dependent_props(FIFO_CAPACITY_BITS) /
dependent_props(WR_WIDTH_BITS)
);
end if;
end function bits_needed_for_occ;
function eff_dp(id : integer;
dep_prop : integer;
value : integer) return integer is
variable dp : integer := dep_prop;
type bo2na_type is array (boolean) of natural;
constant bo2na : bo2na_type := (0, 1);
begin
if value /= 0 then return value; end if; -- Not default
case id is
when IPIF_CHDMA_CHANNELS =>
-------------------
return( bo2na(dp = CLK_PERIOD_PS ) * 10000
+ bo2na(dp = PACKET_WAIT_UNIT_NS ) * 1000000
+ bo2na(dp = BURST_SIZE ) * 16
);
when others => return 0;
end case;
end eff_dp;
function populate_intr_mode_array (num_user_intr : integer;
intr_capture_mode : integer)
return INTEGER_ARRAY_TYPE is
variable intr_mode_array : INTEGER_ARRAY_TYPE(0 to num_user_intr-1);
begin
for i in 0 to num_user_intr-1 loop
intr_mode_array(i) := intr_capture_mode;
end loop;
return intr_mode_array;
end function populate_intr_mode_array;
function add_intr_ard_id_array(include_intr : boolean;
ard_id_array : INTEGER_ARRAY_TYPE)
return INTEGER_ARRAY_TYPE is
variable intr_ard_id_array : INTEGER_ARRAY_TYPE(0 to ard_id_array'length);
begin
intr_ard_id_array(0 to ard_id_array'length-1) := ard_id_array;
if include_intr then
intr_ard_id_array(ard_id_array'length) := IPIF_INTR;
return intr_ard_id_array;
else
return ard_id_array;
end if;
end function add_intr_ard_id_array;
function add_intr_ard_addr_range_array(include_intr : boolean;
ZERO_ADDR_PAD : std_logic_vector;
intr_baseaddr : std_logic_vector;
intr_highaddr : std_logic_vector;
ard_id_array : INTEGER_ARRAY_TYPE;
ard_addr_range_array : SLV64_ARRAY_TYPE)
return SLV64_ARRAY_TYPE is
variable intr_ard_addr_range_array : SLV64_ARRAY_TYPE(0 to ard_addr_range_array'length+1);
begin
intr_ard_addr_range_array(0 to ard_addr_range_array'length-1) := ard_addr_range_array;
if include_intr then
intr_ard_addr_range_array(2*get_id_index(ard_id_array,IPIF_INTR))
:= ZERO_ADDR_PAD & intr_baseaddr;
intr_ard_addr_range_array(2*get_id_index(ard_id_array,IPIF_INTR)+1)
:= ZERO_ADDR_PAD & intr_highaddr;
return intr_ard_addr_range_array;
else
return ard_addr_range_array;
end if;
end function add_intr_ard_addr_range_array;
function add_intr_ard_dwidth_array(include_intr : boolean;
intr_dwidth : integer;
ard_id_array : INTEGER_ARRAY_TYPE;
ard_dwidth_array : INTEGER_ARRAY_TYPE)
return INTEGER_ARRAY_TYPE is
variable intr_ard_dwidth_array : INTEGER_ARRAY_TYPE(0 to ard_dwidth_array'length);
begin
intr_ard_dwidth_array(0 to ard_dwidth_array'length-1) := ard_dwidth_array;
if include_intr then
intr_ard_dwidth_array(get_id_index(ard_id_array, IPIF_INTR)) := intr_dwidth;
return intr_ard_dwidth_array;
else
return ard_dwidth_array;
end if;
end function add_intr_ard_dwidth_array;
function add_intr_ard_num_ce_array(include_intr : boolean;
ard_id_array : INTEGER_ARRAY_TYPE;
ard_num_ce_array : INTEGER_ARRAY_TYPE)
return INTEGER_ARRAY_TYPE is
variable intr_ard_num_ce_array : INTEGER_ARRAY_TYPE(0 to ard_num_ce_array'length);
begin
intr_ard_num_ce_array(0 to ard_num_ce_array'length-1) := ard_num_ce_array;
if include_intr then
intr_ard_num_ce_array(get_id_index(ard_id_array, IPIF_INTR)) := 16;
return intr_ard_num_ce_array;
else
return ard_num_ce_array;
end if;
end function add_intr_ard_num_ce_array;
end package body ipif_pkg;
|
-- IPIF Common Library Package
-------------------------------------------------------------------------------
--
-- *************************************************************************
-- ** **
-- ** DISCLAIMER OF LIABILITY **
-- ** **
-- ** This text/file contains proprietary, confidential **
-- ** information of Xilinx, Inc., is distributed under **
-- ** license from Xilinx, Inc., and may be used, copied **
-- ** and/or disclosed only pursuant to the terms of a valid **
-- ** license agreement with Xilinx, Inc. Xilinx hereby **
-- ** grants you a license to use this text/file solely for **
-- ** design, simulation, implementation and creation of **
-- ** design files limited to Xilinx devices or technologies. **
-- ** Use with non-Xilinx devices or technologies is expressly **
-- ** prohibited and immediately terminates your license unless **
-- ** covered by a separate agreement. **
-- ** **
-- ** Xilinx is providing this design, code, or information **
-- ** "as-is" solely for use in developing programs and **
-- ** solutions for Xilinx devices, with no obligation on the **
-- ** part of Xilinx to provide support. By providing this design, **
-- ** code, or information as one possible implementation of **
-- ** this feature, application or standard, Xilinx is making no **
-- ** representation that this implementation is free from any **
-- ** claims of infringement. You are responsible for obtaining **
-- ** any rights you may require for your implementation. **
-- ** Xilinx expressly disclaims any warranty whatsoever with **
-- ** respect to the adequacy of the implementation, including **
-- ** but not limited to any warranties or representations that this **
-- ** implementation is free from claims of infringement, implied **
-- ** warranties of merchantability or fitness for a particular **
-- ** purpose. **
-- ** **
-- ** Xilinx products are not intended for use in life support **
-- ** appliances, devices, or systems. Use in such applications is **
-- ** expressly prohibited. **
-- ** **
-- ** Any modifications that are made to the Source Code are **
-- ** done at the users sole risk and will be unsupported. **
-- ** The Xilinx Support Hotline does not have access to source **
-- ** code and therefore cannot answer specific questions related **
-- ** to source HDL. The Xilinx Hotline support of original source **
-- ** code IP shall only address issues and questions related **
-- ** to the standard Netlist version of the core (and thus **
-- ** indirectly, the original core source). **
-- ** **
-- ** Copyright (c) 2002-2010 Xilinx, Inc. All rights reserved. **
-- ** **
-- ** This copyright and support notice must be retained as part **
-- ** of this text at all times. **
-- ** **
-- *************************************************************************
--
-------------------------------------------------------------------------------
-- Filename: ipif_pkg.vhd
-- Version: Intital
-- Description: This file contains the constants and functions used in the
-- ipif common library components.
--
-------------------------------------------------------------------------------
-- Structure:
--
-------------------------------------------------------------------------------
-- Author: DET
-- History:
-- DET 02/21/02 -- Created from proc_common_pkg.vhd
--
-- DET 03/13/02 -- PLB IPIF development updates
-- ^^^^^^
-- - Commented out string types and string functions due to an XST
-- problem with string arrays and functions. THe string array
-- processing functions were replaced with comperable functions
-- operating on integer arrays.
-- ~~~~~~
--
--
-- DET 4/30/2002 Initial
-- ~~~~~~
-- - Added three functions: rebuild_slv32_array, rebuild_slv64_array, and
-- rebuild_int_array to support removal of unused elements from the
-- ARD arrays.
-- ^^^^^^ --
--
-- FLO 8/12/2002
-- ~~~~~~
-- - Added three functions: bits_needed_for_vac, bits_needed_for_occ,
-- and get_id_index_iboe.
-- (Removed provisional functions bits_needed_for_vacancy,
-- bits needed_for_occupancy, and bits_needed_for.)
-- ^^^^^^
--
-- FLO 3/24/2003
-- ~~~~~~
-- - Added dependent property paramters for channelized DMA.
-- - Added common property parameter array type.
-- - Definded the KEYHOLD_BURST common-property parameter.
-- ^^^^^^
--
-- FLO 10/22/2003
-- ~~~~~~
-- - Some adjustment to CHDMA parameterization.
-- - Cleanup of obsolete code and comments. (The former "XST workaround"
-- has become the officially deployed method.)
-- ^^^^^^
--
-- LSS 03/24/2004
-- ~~~~~~
-- - Added 5 functions
-- ^^^^^^
--
-- ALS 09/03/04
-- ^^^^^^
-- -- Added constants to describe the channel protocols used in MCH_OPB_IPIF
-- ~~~~~~
--
-- DET 1/17/2008 v4_0
-- ~~~~~~
-- - Changed proc_common library version to v4_0
-- - Incorporated new disclaimer header
-- ^^^^^^
--
-------------------------------------------------------------------------------
-- Naming Conventions:
-- active low signals: "*_n"
-- clock signals: "clk", "clk_div#", "clk_#x"
-- reset signals: "rst", "rst_n"
-- generics: "C_*"
-- user defined types: "*_TYPE"
-- state machine next state: "*_ns"
-- state machine current state: "*_cs"
-- combinatorial signals: "*_com"
-- pipelined or register delay signals: "*_d#"
-- counter signals: "*cnt*"
-- clock enable signals: "*_ce"
-- internal version of output port "*_i"
-- device pins: "*_pin"
-- ports: - Names begin with Uppercase
-- processes: "*_PROCESS"
-- component instantiations: "<ENTITY_>I_<#|FUNC>
-------------------------------------------------------------------------------
library ieee;
use ieee.std_logic_1164.all;
-- need conversion function to convert reals/integers to std logic vectors
use ieee.std_logic_arith.all;
use ieee.std_logic_arith.all;
use ieee.std_logic_unsigned.all;
package ipif_pkg is
-------------------------------------------------------------------------------
-- Type Declarations
-------------------------------------------------------------------------------
type SLV32_ARRAY_TYPE is array (natural range <>) of std_logic_vector(0 to 31);
subtype SLV64_TYPE is std_logic_vector(0 to 63);
type SLV64_ARRAY_TYPE is array (natural range <>) of SLV64_TYPE;
type INTEGER_ARRAY_TYPE is array (natural range <>) of integer;
-------------------------------------------------------------------------------
-- Function and Procedure Declarations
-------------------------------------------------------------------------------
function "=" (s1: in string; s2: in string) return boolean;
function equaluseCase( str1, str2 : STRING ) RETURN BOOLEAN;
function calc_num_ce (ce_num_array : INTEGER_ARRAY_TYPE) return integer;
function calc_start_ce_index (ce_num_array : INTEGER_ARRAY_TYPE;
index : integer) return integer;
function get_min_dwidth (dwidth_array: INTEGER_ARRAY_TYPE) return integer;
function get_max_dwidth (dwidth_array: INTEGER_ARRAY_TYPE) return integer;
function S32 (in_string : string) return string;
--------------------------------------------------------------------------------
-- ARD support functions.
-- These function can be useful when operating with the ARD parameterization.
--------------------------------------------------------------------------------
function get_id_index (id_array :INTEGER_ARRAY_TYPE;
id : integer)
return integer;
function get_id_index_iboe (id_array :INTEGER_ARRAY_TYPE;
id : integer)
return integer;
function find_ard_id (id_array : INTEGER_ARRAY_TYPE;
id : integer) return boolean;
function find_id_dwidth (id_array : INTEGER_ARRAY_TYPE;
dwidth_array: INTEGER_ARRAY_TYPE;
id : integer;
default : integer)
return integer;
function cnt_ipif_id_blks (id_array : INTEGER_ARRAY_TYPE) return integer;
function get_ipif_id_dbus_index (id_array : INTEGER_ARRAY_TYPE;
id : integer)
return integer ;
function rebuild_slv32_array (slv32_array : SLV32_ARRAY_TYPE;
num_valid_pairs : integer)
return SLV32_ARRAY_TYPE;
function rebuild_slv64_array (slv64_array : SLV64_ARRAY_TYPE;
num_valid_pairs : integer)
return SLV64_ARRAY_TYPE;
function rebuild_int_array (int_array : INTEGER_ARRAY_TYPE;
num_valid_entry : integer)
return INTEGER_ARRAY_TYPE;
-- 5 Functions Added 3/24/04
function populate_intr_mode_array (num_user_intr : integer;
intr_capture_mode : integer)
return INTEGER_ARRAY_TYPE ;
function add_intr_ard_id_array(include_intr : boolean;
ard_id_array : INTEGER_ARRAY_TYPE)
return INTEGER_ARRAY_TYPE;
function add_intr_ard_addr_range_array(include_intr : boolean;
ZERO_ADDR_PAD : std_logic_vector;
intr_baseaddr : std_logic_vector;
intr_highaddr : std_logic_vector;
ard_id_array : INTEGER_ARRAY_TYPE;
ard_addr_range_array : SLV64_ARRAY_TYPE)
return SLV64_ARRAY_TYPE;
function add_intr_ard_num_ce_array(include_intr : boolean;
ard_id_array : INTEGER_ARRAY_TYPE;
ard_num_ce_array : INTEGER_ARRAY_TYPE)
return INTEGER_ARRAY_TYPE;
function add_intr_ard_dwidth_array(include_intr : boolean;
intr_dwidth : integer;
ard_id_array : INTEGER_ARRAY_TYPE;
ard_dwidth_array : INTEGER_ARRAY_TYPE)
return INTEGER_ARRAY_TYPE;
function log2(x : natural) return integer;
function clog2(x : positive) return natural;
-------------------------------------------------------------------------------
-- Constant Declarations
-------------------------------------------------------------------------------
-------------------------------------------------------------------------------
-- Channel Protocols
-- The constant declarations below give symbolic-name aliases for values that
-- can be used in the C_MCH_PROTOCOL_ARRAY generic of the MCH_OPB_IPIF.
-------------------------------------------------------------------------------
constant XCL : integer := 0;
constant DAG : integer := 1;
--------------------------------------------------------------------------------
-- Address range types.
-- The constant declarations, below, give symbolic-name aliases for values
-- that can be used in the C_ARD_ID_ARRAY generic of IPIFs. The first set
-- gives aliases that are used to include IPIF services.
--------------------------------------------------------------------------------
-- IPIF module aliases
Constant IPIF_INTR : integer := 1;
Constant IPIF_RST : integer := 2;
Constant IPIF_SESR_SEAR : integer := 3;
Constant IPIF_DMA_SG : integer := 4;
Constant IPIF_WRFIFO_REG : integer := 5;
Constant IPIF_WRFIFO_DATA : integer := 6;
Constant IPIF_RDFIFO_REG : integer := 7;
Constant IPIF_RDFIFO_DATA : integer := 8;
Constant IPIF_CHDMA_CHANNELS : integer := 9;
Constant IPIF_CHDMA_GLOBAL_REGS : integer := 10;
Constant CHDMA_STATUS_FIFO : integer := 90;
-- Some predefined user module aliases
Constant USER_00 : integer := 100;
Constant USER_01 : integer := 101;
Constant USER_02 : integer := 102;
Constant USER_03 : integer := 103;
Constant USER_04 : integer := 104;
Constant USER_05 : integer := 105;
Constant USER_06 : integer := 106;
Constant USER_07 : integer := 107;
Constant USER_08 : integer := 108;
Constant USER_09 : integer := 109;
Constant USER_10 : integer := 110;
Constant USER_11 : integer := 111;
Constant USER_12 : integer := 112;
Constant USER_13 : integer := 113;
Constant USER_14 : integer := 114;
Constant USER_15 : integer := 115;
Constant USER_16 : integer := 116;
---( Start of Dependent Properties declarations
--------------------------------------------------------------------------------
-- Declarations for Dependent Properties (properties that depend on the type of
-- the address range, or in other words, address-range-specific parameters).
-- There is one property, i.e. one parameter, encoded as an integer at
-- each index of the properties array. There is one properties array for
-- each address range.
--
-- The C_ARD_DEPENDENT_PROPS_ARRAY generic parameter in (most) IPIFs is such
-- a properties array and it is usually giving its (static) value using a
-- VHDL aggregate construct. (--ToDo, give an example of this.)
--
-- The the "assigned" default value of a dependent property is zero. This value
-- is usually specified the aggregate by leaving its (index) name out so that
-- it is covered by an "others => 0" choice in the aggregate. Some parameters,
-- as noted in the definitions, below, have an "effective" default value that is
-- different from the assigned default value of zero. In such cases, the
-- function, eff_dp, given below, can be used to get the effective value of
-- the dependent property.
--------------------------------------------------------------------------------
constant DEPENDENT_PROPS_SIZE : integer := 32;
subtype DEPENDENT_PROPS_TYPE
is INTEGER_ARRAY_TYPE(0 to DEPENDENT_PROPS_SIZE-1);
type DEPENDENT_PROPS_ARRAY_TYPE
is array (natural range <>) of DEPENDENT_PROPS_TYPE;
--------------------------------------------------------------------------------
-- Below are the indices of dependent properties for the different types of
-- address ranges.
--
-- Example: Let C_ARD_DEPENDENT_PROPS_ARRAY hold the dependent properites
-- for a set of address ranges. Then, e.g.,
--
-- C_ARD_DEPENDENT_PROPS_ARRAY(i)(FIFO_CAPACITY_BITS)
--
-- gives the fifo capacity in bits, provided that the i'th address range
-- is of type IPIF_WRFIFO_DATA or IPIF_RDFIFO_DATA.
--
-- These indices should be referenced only by the names below and never
-- by numerical literals. (The right to change numerical index assignments
-- is reserved; applications using the names will not be affected by such
-- reassignments.)
--------------------------------------------------------------------------------
--
--ToDo, if the interrupt controller parameterization is ever moved to
-- C_ARD_DEPENDENT_PROPS_ARRAY, then the following declarations
-- could be uncommented and used.
---- IPIF_INTR IDX
---------------------------------------------------------------------------- ---
constant EXCLUDE_DEV_ISC : integer := 0;
-- 1 specifies that only the global interrupt
-- enable is present in the device interrupt source
-- controller and that the only source of interrupts
-- in the device is the IP interrupt source controller.
-- 0 specifies that the full device interrupt
-- source controller structure will be included.
constant INCLUDE_DEV_PENCODER : integer := 1;
-- 1 will include the Device IID in the device interrupt
-- source controller, 0 will exclude it.
--
-- IPIF_WRFIFO_DATA or IPIF_RDFIFO_DATA IDX
---------------------------------------------------------------------------- ---
constant FIFO_CAPACITY_BITS : integer := 0;
constant WR_WIDTH_BITS : integer := 1;
constant RD_WIDTH_BITS : integer := 2;
constant EXCLUDE_PACKET_MODE : integer := 3;
-- 1 Don't include packet mode features
-- 0 Include packet mode features
constant EXCLUDE_VACANCY : integer := 4;
-- 1 Don't include vacancy calculation
-- 0 Include vacancy calculation
-- See also the functions
-- bits_needed_for_vac and
-- bits_needed_for_occ that are declared below.
constant INCLUDE_DRE : integer := 5;
constant INCLUDE_AUTOPUSH_POP : integer := 6;
constant AUTOPUSH_POP_CE : integer := 7;
constant INCLUDE_CSUM : integer := 8;
--------------------------------------------------------------------------------
--
-- DMA_SG IDX
---------------------------------------------------------------------------- ---
--------------------------------------------------------------------------------
-- IPIF_CHDMA_CHANNELS IDX
---------------------------------------------------------------------------- ---
constant NUM_SUBS_FOR_PHYS_0 : integer :=0;
constant NUM_SUBS_FOR_PHYS_1 : integer :=1;
constant NUM_SUBS_FOR_PHYS_2 : integer :=2;
constant NUM_SUBS_FOR_PHYS_3 : integer :=3;
constant NUM_SUBS_FOR_PHYS_4 : integer :=4;
constant NUM_SUBS_FOR_PHYS_5 : integer :=5;
constant NUM_SUBS_FOR_PHYS_6 : integer :=6;
constant NUM_SUBS_FOR_PHYS_7 : integer :=7;
constant NUM_SUBS_FOR_PHYS_8 : integer :=8;
constant NUM_SUBS_FOR_PHYS_9 : integer :=9;
constant NUM_SUBS_FOR_PHYS_10 : integer :=10;
constant NUM_SUBS_FOR_PHYS_11 : integer :=11;
constant NUM_SUBS_FOR_PHYS_12 : integer :=12;
constant NUM_SUBS_FOR_PHYS_13 : integer :=13;
constant NUM_SUBS_FOR_PHYS_14 : integer :=14;
constant NUM_SUBS_FOR_PHYS_15 : integer :=15;
-- Gives the number of sub-channels for physical channel i.
--
-- These constants, which will be MAX_NUM_PHYS_CHANNELS in number (see
-- below), have consecutive values starting with 0 for
-- NUM_SUBS_FOR_PHYS_0. (The constants serve the purpose of giving symbolic
-- names for use in the dependent-properties aggregates that parameterize
-- an IPIF_CHDMA_CHANNELS address range.)
--
-- [Users can ignore this note for developers
-- If the number of physical channels changes, both the
-- IPIF_CHDMA_CHANNELS constants and MAX_NUM_PHYS_CHANNELS,
-- below, must be adjusted.
-- (Use of an array constant or a function of the form
-- NUM_SUBS_FOR_PHYS(i) to define the indices
-- runs afoul of LRM restrictions on non-locally static aggregate
-- choices. (Further, the LRM imposes perhaps unnecessarily
-- strict limits on what qualifies as a locally static primary.)
-- Note: This information is supplied for the benefit of anyone seeking
-- to improve the way that these NUM_SUBS_FOR_PHYS parameter
-- indices are defined.)
-- End of note for developers ]
--
-- The value associated with any index NUM_SUBS_FOR_PHYS_i in the
-- dependent-properties array must be even since TX and RX channels
-- come in pairs with the TX followed immediately by
-- the corresponding RX.
--
constant NUM_SIMPLE_DMA_CHANS : integer :=16;
-- The number of simple DMA channels.
constant NUM_SIMPLE_SG_CHANS : integer :=17;
-- The number of simple SG channels.
constant INTR_COALESCE : integer :=18;
-- 0 Interrupt coalescing is disabled
-- 1 Interrupt coalescing is enabled
constant CLK_PERIOD_PS : integer :=19;
-- The period of the OPB Bus clock in ps.
-- The default value of 0 is a special value that
-- is synonymous with 10000 ps (10 ns).
-- The value for CLK_PERIOD_PS is relevant only if (INTR_COALESCE = 1).
constant PACKET_WAIT_UNIT_NS : integer :=20;
-- Gives the unit for used for timing of pack-wait bounds.
-- The default value of 0 is a special value that
-- is synonymous with 1,000,000 ns (1 ms) and a non-default
-- value is typically only used for testing.
-- Relevant only if (INTR_COALESCE = 1).
constant BURST_SIZE : integer :=21;
-- 1, 2, 4, 8 or 16
-- The default value of 0 is a special value that
-- is synonymous with a burst size of 16.
-- Setting the BURST_SIZE to 1 effectively disables
-- bursts.
constant REMAINDER_AS_SINGLES : integer :=22;
-- 0 Remainder handled as a short burst
-- 1 Remainder handled as a series of singles
--------------------------------------------------------------------------------
-- The constant below is not the index of a dependent-properties
-- parameter (and, as such, would never appear as a choice in a
-- dependent-properties aggregate). Rather, it is fixed to the maximum
-- number of physical channels that an Address Range of type
-- IPIF_CHDMA_CHANNELS supports. It must be maintained in conjuction with
-- the constants named, e.g., NUM_SUBS_FOR_PHYS_15, above.
--------------------------------------------------------------------------------
constant MAX_NUM_PHYS_CHANNELS : natural := 16;
--------------------------------------------------------------------------
-- EXAMPLE: Here is an example dependent-properties aggregate for an
-- address range of type IPIF_CHDMA_CHANNELS.
-- To have a compact list of all of the CHDMA parameters, all are
-- shown, however three are commented out and the unneeded
-- MUM_SUBS_FOR_PHYS_x are excluded. The "OTHERS => 0" association
-- gives these parameters their default values, such that, for the example
--
-- - All physical channels above 2 have zero subchannels (effectively,
-- these physical channels are not used)
-- - There are no simple SG channels
-- - The packet-wait time unit is 1 ms
-- - Burst size is 16
--------------------------------------------------------------------------
-- (
-- NUM_SUBS_FOR_PHYS_0 => 8,
-- NUM_SUBS_FOR_PHYS_1 => 4,
-- NUM_SUBS_FOR_PHYS_2 => 14,
-- NUM_SIMPLE_DMA_CHANS => 1,
-- --NUM_SIMPLE_SG_CHANS => 5,
-- INTR_COALESCE => 1,
-- CLK_PERIOD_PS => 20000,
-- --PACKET_WAIT_UNIT_NS => 50000,
-- --BURST_SIZE => 1,
-- REMAINDER_AS_SINGLES => 1,
-- OTHERS => 0
-- )
--
--------------------------------------------------------------------------------
--------------------------------------------------------------------------------
-- Calculates the number of bits needed to convey the vacancy (emptiness) of
-- the fifo described by dependent_props, if fifo_present. If not fifo_present,
-- returns 0 (or the smallest value allowed by tool limitations on null arrays)
-- without making reference to dependent_props.
--------------------------------------------------------------------------------
function bits_needed_for_vac(
fifo_present: boolean;
dependent_props : DEPENDENT_PROPS_TYPE
) return integer;
--------------------------------------------------------------------------------
-- Calculates the number of bits needed to convey the occupancy (fullness) of
-- the fifo described by dependent_props, if fifo_present. If not fifo_present,
-- returns 0 (or the smallest value allowed by tool limitations on null arrays)
-- without making reference to dependent_props.
--------------------------------------------------------------------------------
function bits_needed_for_occ(
fifo_present: boolean;
dependent_props : DEPENDENT_PROPS_TYPE
) return integer;
--------------------------------------------------------------------------------
-- Function eff_dp.
--
-- For some of the dependent properties, the default value of zero is meant
-- to imply an effective default value of other than zero (see e.g.
-- PKT_WAIT_UNIT_NS for the IPIF_CHDMA_CHANNELS address-range type). The
-- following function is used to get the (possibly default-adjusted)
-- value for a dependent property.
--
-- Example call:
--
-- eff_value_of_param :=
-- eff_dp(
-- C_IPIF_CHDMA_CHANNELS,
-- PACKET_WAIT_UNIT_NS,
-- C_ARD_DEPENDENT_PROPS_ARRAY(i)(PACKET_WAIT_UNIT_NS)
-- );
--
-- where C_ARD_DEPENDENT_PROPS_ARRAY(i) is an object of type
-- DEPENDENT_PROPS_ARRAY_TYPE, that was parameterized for an address range of
-- type C_IPIF_CHDMA_CHANNELS.
--------------------------------------------------------------------------------
function eff_dp(id : integer; -- The type of address range.
dep_prop : integer; -- The index of the dependent prop.
value : integer -- The value at that index.
) return integer; -- The effective value, possibly adjusted
-- if value has the default value of 0.
---) End of Dependent Properties declarations
--------------------------------------------------------------------------------
-- Declarations for Common Properties (properties that apply regardless of the
-- type of the address range). Structurally, these work the same as
-- the dependent properties.
--------------------------------------------------------------------------------
constant COMMON_PROPS_SIZE : integer := 2;
subtype COMMON_PROPS_TYPE
is INTEGER_ARRAY_TYPE(0 to COMMON_PROPS_SIZE-1);
type COMMON_PROPS_ARRAY_TYPE
is array (natural range <>) of COMMON_PROPS_TYPE;
--------------------------------------------------------------------------------
-- Below are the indices of the common properties.
--
-- These indices should be referenced only by the names below and never
-- by numerical literals.
-- IDX
---------------------------------------------------------------------------- ---
constant KEYHOLE_BURST : integer := 0;
-- 1 All addresses of a burst are forced to the initial
-- address of the burst.
-- 0 Burst addresses follow the bus protocol.
-- IP interrupt mode array constants
Constant INTR_PASS_THRU : integer := 1;
Constant INTR_PASS_THRU_INV : integer := 2;
Constant INTR_REG_EVENT : integer := 3;
Constant INTR_REG_EVENT_INV : integer := 4;
Constant INTR_POS_EDGE_DETECT : integer := 5;
Constant INTR_NEG_EDGE_DETECT : integer := 6;
end ipif_pkg;
package body ipif_pkg is
-------------------------------------------------------------------------------
-- Function log2 -- returns number of bits needed to encode x choices
-- x = 0 returns 0
-- x = 1 returns 0
-- x = 2 returns 1
-- x = 4 returns 2, etc.
-------------------------------------------------------------------------------
--
function log2(x : natural) return integer is
variable i : integer := 0;
variable val: integer := 1;
begin
if x = 0 then return 0;
else
for j in 0 to 29 loop -- for loop for XST
if val >= x then null;
else
i := i+1;
val := val*2;
end if;
end loop;
-- Fix per CR520627 XST was ignoring this anyway and printing a
-- Warning in SRP file. This will get rid of the warning and not
-- impact simulation.
-- synthesis translate_off
assert val >= x
report "Function log2 received argument larger" &
" than its capability of 2^30. "
severity failure;
-- synthesis translate_on
return i;
end if;
end function log2;
--------------------------------------------------------------------------------
-- Function clog2 - returns the integer ceiling of the base 2 logarithm of x,
-- i.e., the least integer greater than or equal to log2(x).
--------------------------------------------------------------------------------
function clog2(x : positive) return natural is
variable r : natural := 0;
variable rp : natural := 1; -- rp tracks the value 2**r
begin
while rp < x loop -- Termination condition T: x <= 2**r
-- Loop invariant L: 2**(r-1) < x
r := r + 1;
if rp > integer'high - rp then exit; end if; -- If doubling rp overflows
-- the integer range, the doubled value would exceed x, so safe to exit.
rp := rp + rp;
end loop;
-- L and T <-> 2**(r-1) < x <= 2**r <-> (r-1) < log2(x) <= r
return r; --
end clog2;
-------------------------------------------------------------------------------
-- Function Definitions
-------------------------------------------------------------------------------
-----------------------------------------------------------------------------
-- Function "="
--
-- This function can be used to overload the "=" operator when comparing
-- strings.
-----------------------------------------------------------------------------
function "=" (s1: in string; s2: in string) return boolean is
constant tc: character := ' '; -- string termination character
variable i: integer := 1;
variable v1 : string(1 to s1'length) := s1;
variable v2 : string(1 to s2'length) := s2;
begin
while (i <= v1'length) and (v1(i) /= tc) and
(i <= v2'length) and (v2(i) /= tc) and
(v1(i) = v2(i))
loop
i := i+1;
end loop;
return ((i > v1'length) or (v1(i) = tc)) and
((i > v2'length) or (v2(i) = tc));
end;
----------------------------------------------------------------------------
-- Function equaluseCase
--
-- This function returns true if case sensitive string comparison determines
-- that str1 and str2 are the same.
-----------------------------------------------------------------------------
FUNCTION equaluseCase( str1, str2 : STRING ) RETURN BOOLEAN IS
CONSTANT len1 : INTEGER := str1'length;
CONSTANT len2 : INTEGER := str2'length;
VARIABLE equal : BOOLEAN := TRUE;
BEGIN
IF NOT (len1=len2) THEN
equal := FALSE;
ELSE
FOR i IN str1'range LOOP
IF NOT (str1(i) = str2(i)) THEN
equal := FALSE;
END IF;
END LOOP;
END IF;
RETURN equal;
END equaluseCase;
-----------------------------------------------------------------------------
-- Function calc_num_ce
--
-- This function is used to process the array specifying the number of Chip
-- Enables required for a Base Address specification. The array is input to
-- the function and an integer is returned reflecting the total number of
-- Chip Enables required for the CE, RdCE, and WrCE Buses
-----------------------------------------------------------------------------
function calc_num_ce (ce_num_array : INTEGER_ARRAY_TYPE) return integer is
Variable ce_num_sum : integer := 0;
begin
for i in 0 to (ce_num_array'length)-1 loop
ce_num_sum := ce_num_sum + ce_num_array(i);
End loop;
return(ce_num_sum);
end function calc_num_ce;
-----------------------------------------------------------------------------
-- Function calc_start_ce_index
--
-- This function is used to process the array specifying the number of Chip
-- Enables required for a Base Address specification. The CE Size array is
-- input to the function and an integer index representing the index of the
-- target module in the ce_num_array. An integer is returned reflecting the
-- starting index of the assigned Chip Enables within the CE, RdCE, and
-- WrCE Buses.
-----------------------------------------------------------------------------
function calc_start_ce_index (ce_num_array : INTEGER_ARRAY_TYPE;
index : integer) return integer is
Variable ce_num_sum : integer := 0;
begin
If (index = 0) Then
ce_num_sum := 0;
else
for i in 0 to index-1 loop
ce_num_sum := ce_num_sum + ce_num_array(i);
End loop;
End if;
return(ce_num_sum);
end function calc_start_ce_index;
-----------------------------------------------------------------------------
-- Function get_min_dwidth
--
-- This function is used to process the array specifying the data bus width
-- for each of the target modules. The dwidth_array is input to the function
-- and an integer is returned that is the smallest value found of all the
-- entries in the array.
-----------------------------------------------------------------------------
function get_min_dwidth (dwidth_array: INTEGER_ARRAY_TYPE) return integer is
Variable temp_min : Integer := 1024;
begin
for i in 0 to dwidth_array'length-1 loop
If (dwidth_array(i) < temp_min) Then
temp_min := dwidth_array(i);
else
null;
End if;
End loop;
return(temp_min);
end function get_min_dwidth;
-----------------------------------------------------------------------------
-- Function get_max_dwidth
--
-- This function is used to process the array specifying the data bus width
-- for each of the target modules. The dwidth_array is input to the function
-- and an integer is returned that is the largest value found of all the
-- entries in the array.
-----------------------------------------------------------------------------
function get_max_dwidth (dwidth_array: INTEGER_ARRAY_TYPE) return integer is
Variable temp_max : Integer := 0;
begin
for i in 0 to dwidth_array'length-1 loop
If (dwidth_array(i) > temp_max) Then
temp_max := dwidth_array(i);
else
null;
End if;
End loop;
return(temp_max);
end function get_max_dwidth;
-----------------------------------------------------------------------------
-- Function S32
--
-- This function is used to expand an input string to 32 characters by
-- padding with spaces. If the input string is larger than 32 characters,
-- it will truncate to 32 characters.
-----------------------------------------------------------------------------
function S32 (in_string : string) return string is
constant OUTPUT_STRING_LENGTH : integer := 32;
Constant space : character := ' ';
variable new_string : string(1 to 32);
Variable start_index : Integer := in_string'length+1;
begin
If (in_string'length < OUTPUT_STRING_LENGTH) Then
for i in 1 to in_string'length loop
new_string(i) := in_string(i);
End loop;
for j in start_index to OUTPUT_STRING_LENGTH loop
new_string(j) := space;
End loop;
else -- use first 32 chars of in_string (truncate the rest)
for k in 1 to OUTPUT_STRING_LENGTH loop
new_string(k) := in_string(k);
End loop;
End if;
return(new_string);
end function S32;
-----------------------------------------------------------------------------
-- Function get_id_index
--
-- This function is used to process the array specifying the target function
-- assigned to a Base Address pair address range. The id_array and a
-- id number is input to the function. A integer is returned reflecting the
-- array index of the id matching the id input number. This function
-- should only be called if the id number is known to exist in the
-- name_array input. This can be detirmined by using the find_ard_id
-- function.
-----------------------------------------------------------------------------
function get_id_index (id_array :INTEGER_ARRAY_TYPE;
id : integer) return integer is
Variable match : Boolean := false;
Variable match_index : Integer := 10000; -- a really big number!
begin
for array_index in 0 to id_array'length-1 loop
If (match = true) Then -- match already found so do nothing
null;
else -- compare the numbers one by one
match := (id_array(array_index) = id);
If (match) Then
match_index := array_index;
else
null;
End if;
End if;
End loop;
return(match_index);
end function get_id_index;
--------------------------------------------------------------------------------
-- get_id_index but return a value in bounds on error (iboe).
--
-- This function is the same as get_id_index, except that when id does
-- not exist in id_array, the value returned is any index that is
-- within the index range of id_array.
--
-- This function would normally only be used where function find_ard_id
-- is used to establish the existence of id but, even when non-existent,
-- an element of one of the ARD arrays will be computed from the
-- returned get_id_index_iboe value. See, e.g., function bits_needed_for_vac
-- and the example call, below
--
-- bits_needed_for_vac(
-- find_ard_id(C_ARD_ID_ARRAY, IPIF_RDFIFO_DATA),
-- C_ARD_DEPENDENT_PROPS_ARRAY(get_id_index_iboe(C_ARD_ID_ARRAY,
-- IPIF_RDFIFO_DATA))
-- )
--------------------------------------------------------------------------------
function get_id_index_iboe (id_array :INTEGER_ARRAY_TYPE;
id : integer) return integer is
Variable match : Boolean := false;
Variable match_index : Integer := id_array'left; -- any valid array index
begin
for array_index in 0 to id_array'length-1 loop
If (match = true) Then -- match already found so do nothing
null;
else -- compare the numbers one by one
match := (id_array(array_index) = id);
If (match) Then match_index := array_index;
else null;
End if;
End if;
End loop;
return(match_index);
end function get_id_index_iboe;
-----------------------------------------------------------------------------
-- Function find_ard_id
--
-- This function is used to process the array specifying the target function
-- assigned to a Base Address pair address range. The id_array and a
-- integer id is input to the function. A boolean is returned reflecting the
-- presence (or not) of a number in the array matching the id input number.
-----------------------------------------------------------------------------
function find_ard_id (id_array : INTEGER_ARRAY_TYPE;
id : integer) return boolean is
Variable match : Boolean := false;
begin
for array_index in 0 to id_array'length-1 loop
If (match = true) Then -- match already found so do nothing
null;
else -- compare the numbers one by one
match := (id_array(array_index) = id);
End if;
End loop;
return(match);
end function find_ard_id;
-----------------------------------------------------------------------------
-- Function find_id_dwidth
--
-- This function is used to find the data width of a target module. If the
-- target module exists, the data width is extracted from the input dwidth
-- array. If the module is not in the ID array, the default input is
-- returned. This function is needed to assign data port size constraints on
-- unconstrained port widths.
-----------------------------------------------------------------------------
function find_id_dwidth (id_array : INTEGER_ARRAY_TYPE;
dwidth_array: INTEGER_ARRAY_TYPE;
id : integer;
default : integer) return integer is
Variable id_present : Boolean := false;
Variable array_index : Integer := 0;
Variable dwidth : Integer := default;
begin
id_present := find_ard_id(id_array, id);
If (id_present) Then
array_index := get_id_index (id_array, id);
dwidth := dwidth_array(array_index);
else
null; -- use default input
End if;
Return (dwidth);
end function find_id_dwidth;
-----------------------------------------------------------------------------
-- Function cnt_ipif_id_blks
--
-- This function is used to detirmine the number of IPIF components specified
-- in the ARD ID Array. An integer is returned representing the number
-- of elements counted. User IDs are ignored in the counting process.
-----------------------------------------------------------------------------
function cnt_ipif_id_blks (id_array : INTEGER_ARRAY_TYPE)
return integer is
Variable blk_count : integer := 0;
Variable temp_id : integer;
begin
for array_index in 0 to id_array'length-1 loop
temp_id := id_array(array_index);
If (temp_id = IPIF_WRFIFO_DATA or
temp_id = IPIF_RDFIFO_DATA or
temp_id = IPIF_RST or
temp_id = IPIF_INTR or
temp_id = IPIF_DMA_SG or
temp_id = IPIF_SESR_SEAR
) Then -- IPIF block found
blk_count := blk_count+1;
else -- go to next loop iteration
null;
End if;
End loop;
return(blk_count);
end function cnt_ipif_id_blks;
-----------------------------------------------------------------------------
-- Function get_ipif_id_dbus_index
--
-- This function is used to detirmine the IPIF relative index of a given
-- ID value. User IDs are ignored in the index detirmination.
-----------------------------------------------------------------------------
function get_ipif_id_dbus_index (id_array : INTEGER_ARRAY_TYPE;
id : integer)
return integer is
Variable blk_index : integer := 0;
Variable temp_id : integer;
Variable id_found : Boolean := false;
begin
for array_index in 0 to id_array'length-1 loop
temp_id := id_array(array_index);
If (id_found) then
null;
elsif (temp_id = id) then
id_found := true;
elsif (temp_id = IPIF_WRFIFO_DATA or
temp_id = IPIF_RDFIFO_DATA or
temp_id = IPIF_RST or
temp_id = IPIF_INTR or
temp_id = IPIF_DMA_SG or
temp_id = IPIF_SESR_SEAR
) Then -- IPIF block found
blk_index := blk_index+1;
else -- user block so do nothing
null;
End if;
End loop;
return(blk_index);
end function get_ipif_id_dbus_index;
------------------------------------------------------------------------------
-- Function: rebuild_slv32_array
--
-- Description:
-- This function takes an input slv32 array and rebuilds an output slv32
-- array composed of the first "num_valid_entry" elements from the input
-- array.
------------------------------------------------------------------------------
function rebuild_slv32_array (slv32_array : SLV32_ARRAY_TYPE;
num_valid_pairs : integer)
return SLV32_ARRAY_TYPE is
--Constants
constant num_elements : Integer := num_valid_pairs * 2;
-- Variables
variable temp_baseaddr32_array : SLV32_ARRAY_TYPE( 0 to num_elements-1);
begin
for array_index in 0 to num_elements-1 loop
temp_baseaddr32_array(array_index) := slv32_array(array_index);
end loop;
return(temp_baseaddr32_array);
end function rebuild_slv32_array;
------------------------------------------------------------------------------
-- Function: rebuild_slv64_array
--
-- Description:
-- This function takes an input slv64 array and rebuilds an output slv64
-- array composed of the first "num_valid_entry" elements from the input
-- array.
------------------------------------------------------------------------------
function rebuild_slv64_array (slv64_array : SLV64_ARRAY_TYPE;
num_valid_pairs : integer)
return SLV64_ARRAY_TYPE is
--Constants
constant num_elements : Integer := num_valid_pairs * 2;
-- Variables
variable temp_baseaddr64_array : SLV64_ARRAY_TYPE( 0 to num_elements-1);
begin
for array_index in 0 to num_elements-1 loop
temp_baseaddr64_array(array_index) := slv64_array(array_index);
end loop;
return(temp_baseaddr64_array);
end function rebuild_slv64_array;
------------------------------------------------------------------------------
-- Function: rebuild_int_array
--
-- Description:
-- This function takes an input integer array and rebuilds an output integer
-- array composed of the first "num_valid_entry" elements from the input
-- array.
------------------------------------------------------------------------------
function rebuild_int_array (int_array : INTEGER_ARRAY_TYPE;
num_valid_entry : integer)
return INTEGER_ARRAY_TYPE is
-- Variables
variable temp_int_array : INTEGER_ARRAY_TYPE( 0 to num_valid_entry-1);
begin
for array_index in 0 to num_valid_entry-1 loop
temp_int_array(array_index) := int_array(array_index);
end loop;
return(temp_int_array);
end function rebuild_int_array;
function bits_needed_for_vac(
fifo_present: boolean;
dependent_props : DEPENDENT_PROPS_TYPE
) return integer is
begin
if not fifo_present then
return 1; -- Zero would be better but leads to "0 to -1" null
-- ranges that are not handled by XST Flint or earlier
-- because of the negative index.
else
return
log2(1 + dependent_props(FIFO_CAPACITY_BITS) /
dependent_props(RD_WIDTH_BITS)
);
end if;
end function bits_needed_for_vac;
function bits_needed_for_occ(
fifo_present: boolean;
dependent_props : DEPENDENT_PROPS_TYPE
) return integer is
begin
if not fifo_present then
return 1; -- Zero would be better but leads to "0 to -1" null
-- ranges that are not handled by XST Flint or earlier
-- because of the negative index.
else
return
log2(1 + dependent_props(FIFO_CAPACITY_BITS) /
dependent_props(WR_WIDTH_BITS)
);
end if;
end function bits_needed_for_occ;
function eff_dp(id : integer;
dep_prop : integer;
value : integer) return integer is
variable dp : integer := dep_prop;
type bo2na_type is array (boolean) of natural;
constant bo2na : bo2na_type := (0, 1);
begin
if value /= 0 then return value; end if; -- Not default
case id is
when IPIF_CHDMA_CHANNELS =>
-------------------
return( bo2na(dp = CLK_PERIOD_PS ) * 10000
+ bo2na(dp = PACKET_WAIT_UNIT_NS ) * 1000000
+ bo2na(dp = BURST_SIZE ) * 16
);
when others => return 0;
end case;
end eff_dp;
function populate_intr_mode_array (num_user_intr : integer;
intr_capture_mode : integer)
return INTEGER_ARRAY_TYPE is
variable intr_mode_array : INTEGER_ARRAY_TYPE(0 to num_user_intr-1);
begin
for i in 0 to num_user_intr-1 loop
intr_mode_array(i) := intr_capture_mode;
end loop;
return intr_mode_array;
end function populate_intr_mode_array;
function add_intr_ard_id_array(include_intr : boolean;
ard_id_array : INTEGER_ARRAY_TYPE)
return INTEGER_ARRAY_TYPE is
variable intr_ard_id_array : INTEGER_ARRAY_TYPE(0 to ard_id_array'length);
begin
intr_ard_id_array(0 to ard_id_array'length-1) := ard_id_array;
if include_intr then
intr_ard_id_array(ard_id_array'length) := IPIF_INTR;
return intr_ard_id_array;
else
return ard_id_array;
end if;
end function add_intr_ard_id_array;
function add_intr_ard_addr_range_array(include_intr : boolean;
ZERO_ADDR_PAD : std_logic_vector;
intr_baseaddr : std_logic_vector;
intr_highaddr : std_logic_vector;
ard_id_array : INTEGER_ARRAY_TYPE;
ard_addr_range_array : SLV64_ARRAY_TYPE)
return SLV64_ARRAY_TYPE is
variable intr_ard_addr_range_array : SLV64_ARRAY_TYPE(0 to ard_addr_range_array'length+1);
begin
intr_ard_addr_range_array(0 to ard_addr_range_array'length-1) := ard_addr_range_array;
if include_intr then
intr_ard_addr_range_array(2*get_id_index(ard_id_array,IPIF_INTR))
:= ZERO_ADDR_PAD & intr_baseaddr;
intr_ard_addr_range_array(2*get_id_index(ard_id_array,IPIF_INTR)+1)
:= ZERO_ADDR_PAD & intr_highaddr;
return intr_ard_addr_range_array;
else
return ard_addr_range_array;
end if;
end function add_intr_ard_addr_range_array;
function add_intr_ard_dwidth_array(include_intr : boolean;
intr_dwidth : integer;
ard_id_array : INTEGER_ARRAY_TYPE;
ard_dwidth_array : INTEGER_ARRAY_TYPE)
return INTEGER_ARRAY_TYPE is
variable intr_ard_dwidth_array : INTEGER_ARRAY_TYPE(0 to ard_dwidth_array'length);
begin
intr_ard_dwidth_array(0 to ard_dwidth_array'length-1) := ard_dwidth_array;
if include_intr then
intr_ard_dwidth_array(get_id_index(ard_id_array, IPIF_INTR)) := intr_dwidth;
return intr_ard_dwidth_array;
else
return ard_dwidth_array;
end if;
end function add_intr_ard_dwidth_array;
function add_intr_ard_num_ce_array(include_intr : boolean;
ard_id_array : INTEGER_ARRAY_TYPE;
ard_num_ce_array : INTEGER_ARRAY_TYPE)
return INTEGER_ARRAY_TYPE is
variable intr_ard_num_ce_array : INTEGER_ARRAY_TYPE(0 to ard_num_ce_array'length);
begin
intr_ard_num_ce_array(0 to ard_num_ce_array'length-1) := ard_num_ce_array;
if include_intr then
intr_ard_num_ce_array(get_id_index(ard_id_array, IPIF_INTR)) := 16;
return intr_ard_num_ce_array;
else
return ard_num_ce_array;
end if;
end function add_intr_ard_num_ce_array;
end package body ipif_pkg;
|
-- IPIF Common Library Package
-------------------------------------------------------------------------------
--
-- *************************************************************************
-- ** **
-- ** DISCLAIMER OF LIABILITY **
-- ** **
-- ** This text/file contains proprietary, confidential **
-- ** information of Xilinx, Inc., is distributed under **
-- ** license from Xilinx, Inc., and may be used, copied **
-- ** and/or disclosed only pursuant to the terms of a valid **
-- ** license agreement with Xilinx, Inc. Xilinx hereby **
-- ** grants you a license to use this text/file solely for **
-- ** design, simulation, implementation and creation of **
-- ** design files limited to Xilinx devices or technologies. **
-- ** Use with non-Xilinx devices or technologies is expressly **
-- ** prohibited and immediately terminates your license unless **
-- ** covered by a separate agreement. **
-- ** **
-- ** Xilinx is providing this design, code, or information **
-- ** "as-is" solely for use in developing programs and **
-- ** solutions for Xilinx devices, with no obligation on the **
-- ** part of Xilinx to provide support. By providing this design, **
-- ** code, or information as one possible implementation of **
-- ** this feature, application or standard, Xilinx is making no **
-- ** representation that this implementation is free from any **
-- ** claims of infringement. You are responsible for obtaining **
-- ** any rights you may require for your implementation. **
-- ** Xilinx expressly disclaims any warranty whatsoever with **
-- ** respect to the adequacy of the implementation, including **
-- ** but not limited to any warranties or representations that this **
-- ** implementation is free from claims of infringement, implied **
-- ** warranties of merchantability or fitness for a particular **
-- ** purpose. **
-- ** **
-- ** Xilinx products are not intended for use in life support **
-- ** appliances, devices, or systems. Use in such applications is **
-- ** expressly prohibited. **
-- ** **
-- ** Any modifications that are made to the Source Code are **
-- ** done at the users sole risk and will be unsupported. **
-- ** The Xilinx Support Hotline does not have access to source **
-- ** code and therefore cannot answer specific questions related **
-- ** to source HDL. The Xilinx Hotline support of original source **
-- ** code IP shall only address issues and questions related **
-- ** to the standard Netlist version of the core (and thus **
-- ** indirectly, the original core source). **
-- ** **
-- ** Copyright (c) 2002-2010 Xilinx, Inc. All rights reserved. **
-- ** **
-- ** This copyright and support notice must be retained as part **
-- ** of this text at all times. **
-- ** **
-- *************************************************************************
--
-------------------------------------------------------------------------------
-- Filename: ipif_pkg.vhd
-- Version: Intital
-- Description: This file contains the constants and functions used in the
-- ipif common library components.
--
-------------------------------------------------------------------------------
-- Structure:
--
-------------------------------------------------------------------------------
-- Author: DET
-- History:
-- DET 02/21/02 -- Created from proc_common_pkg.vhd
--
-- DET 03/13/02 -- PLB IPIF development updates
-- ^^^^^^
-- - Commented out string types and string functions due to an XST
-- problem with string arrays and functions. THe string array
-- processing functions were replaced with comperable functions
-- operating on integer arrays.
-- ~~~~~~
--
--
-- DET 4/30/2002 Initial
-- ~~~~~~
-- - Added three functions: rebuild_slv32_array, rebuild_slv64_array, and
-- rebuild_int_array to support removal of unused elements from the
-- ARD arrays.
-- ^^^^^^ --
--
-- FLO 8/12/2002
-- ~~~~~~
-- - Added three functions: bits_needed_for_vac, bits_needed_for_occ,
-- and get_id_index_iboe.
-- (Removed provisional functions bits_needed_for_vacancy,
-- bits needed_for_occupancy, and bits_needed_for.)
-- ^^^^^^
--
-- FLO 3/24/2003
-- ~~~~~~
-- - Added dependent property paramters for channelized DMA.
-- - Added common property parameter array type.
-- - Definded the KEYHOLD_BURST common-property parameter.
-- ^^^^^^
--
-- FLO 10/22/2003
-- ~~~~~~
-- - Some adjustment to CHDMA parameterization.
-- - Cleanup of obsolete code and comments. (The former "XST workaround"
-- has become the officially deployed method.)
-- ^^^^^^
--
-- LSS 03/24/2004
-- ~~~~~~
-- - Added 5 functions
-- ^^^^^^
--
-- ALS 09/03/04
-- ^^^^^^
-- -- Added constants to describe the channel protocols used in MCH_OPB_IPIF
-- ~~~~~~
--
-- DET 1/17/2008 v4_0
-- ~~~~~~
-- - Changed proc_common library version to v4_0
-- - Incorporated new disclaimer header
-- ^^^^^^
--
-------------------------------------------------------------------------------
-- Naming Conventions:
-- active low signals: "*_n"
-- clock signals: "clk", "clk_div#", "clk_#x"
-- reset signals: "rst", "rst_n"
-- generics: "C_*"
-- user defined types: "*_TYPE"
-- state machine next state: "*_ns"
-- state machine current state: "*_cs"
-- combinatorial signals: "*_com"
-- pipelined or register delay signals: "*_d#"
-- counter signals: "*cnt*"
-- clock enable signals: "*_ce"
-- internal version of output port "*_i"
-- device pins: "*_pin"
-- ports: - Names begin with Uppercase
-- processes: "*_PROCESS"
-- component instantiations: "<ENTITY_>I_<#|FUNC>
-------------------------------------------------------------------------------
library ieee;
use ieee.std_logic_1164.all;
-- need conversion function to convert reals/integers to std logic vectors
use ieee.std_logic_arith.all;
use ieee.std_logic_arith.all;
use ieee.std_logic_unsigned.all;
package ipif_pkg is
-------------------------------------------------------------------------------
-- Type Declarations
-------------------------------------------------------------------------------
type SLV32_ARRAY_TYPE is array (natural range <>) of std_logic_vector(0 to 31);
subtype SLV64_TYPE is std_logic_vector(0 to 63);
type SLV64_ARRAY_TYPE is array (natural range <>) of SLV64_TYPE;
type INTEGER_ARRAY_TYPE is array (natural range <>) of integer;
-------------------------------------------------------------------------------
-- Function and Procedure Declarations
-------------------------------------------------------------------------------
function "=" (s1: in string; s2: in string) return boolean;
function equaluseCase( str1, str2 : STRING ) RETURN BOOLEAN;
function calc_num_ce (ce_num_array : INTEGER_ARRAY_TYPE) return integer;
function calc_start_ce_index (ce_num_array : INTEGER_ARRAY_TYPE;
index : integer) return integer;
function get_min_dwidth (dwidth_array: INTEGER_ARRAY_TYPE) return integer;
function get_max_dwidth (dwidth_array: INTEGER_ARRAY_TYPE) return integer;
function S32 (in_string : string) return string;
--------------------------------------------------------------------------------
-- ARD support functions.
-- These function can be useful when operating with the ARD parameterization.
--------------------------------------------------------------------------------
function get_id_index (id_array :INTEGER_ARRAY_TYPE;
id : integer)
return integer;
function get_id_index_iboe (id_array :INTEGER_ARRAY_TYPE;
id : integer)
return integer;
function find_ard_id (id_array : INTEGER_ARRAY_TYPE;
id : integer) return boolean;
function find_id_dwidth (id_array : INTEGER_ARRAY_TYPE;
dwidth_array: INTEGER_ARRAY_TYPE;
id : integer;
default : integer)
return integer;
function cnt_ipif_id_blks (id_array : INTEGER_ARRAY_TYPE) return integer;
function get_ipif_id_dbus_index (id_array : INTEGER_ARRAY_TYPE;
id : integer)
return integer ;
function rebuild_slv32_array (slv32_array : SLV32_ARRAY_TYPE;
num_valid_pairs : integer)
return SLV32_ARRAY_TYPE;
function rebuild_slv64_array (slv64_array : SLV64_ARRAY_TYPE;
num_valid_pairs : integer)
return SLV64_ARRAY_TYPE;
function rebuild_int_array (int_array : INTEGER_ARRAY_TYPE;
num_valid_entry : integer)
return INTEGER_ARRAY_TYPE;
-- 5 Functions Added 3/24/04
function populate_intr_mode_array (num_user_intr : integer;
intr_capture_mode : integer)
return INTEGER_ARRAY_TYPE ;
function add_intr_ard_id_array(include_intr : boolean;
ard_id_array : INTEGER_ARRAY_TYPE)
return INTEGER_ARRAY_TYPE;
function add_intr_ard_addr_range_array(include_intr : boolean;
ZERO_ADDR_PAD : std_logic_vector;
intr_baseaddr : std_logic_vector;
intr_highaddr : std_logic_vector;
ard_id_array : INTEGER_ARRAY_TYPE;
ard_addr_range_array : SLV64_ARRAY_TYPE)
return SLV64_ARRAY_TYPE;
function add_intr_ard_num_ce_array(include_intr : boolean;
ard_id_array : INTEGER_ARRAY_TYPE;
ard_num_ce_array : INTEGER_ARRAY_TYPE)
return INTEGER_ARRAY_TYPE;
function add_intr_ard_dwidth_array(include_intr : boolean;
intr_dwidth : integer;
ard_id_array : INTEGER_ARRAY_TYPE;
ard_dwidth_array : INTEGER_ARRAY_TYPE)
return INTEGER_ARRAY_TYPE;
function log2(x : natural) return integer;
function clog2(x : positive) return natural;
-------------------------------------------------------------------------------
-- Constant Declarations
-------------------------------------------------------------------------------
-------------------------------------------------------------------------------
-- Channel Protocols
-- The constant declarations below give symbolic-name aliases for values that
-- can be used in the C_MCH_PROTOCOL_ARRAY generic of the MCH_OPB_IPIF.
-------------------------------------------------------------------------------
constant XCL : integer := 0;
constant DAG : integer := 1;
--------------------------------------------------------------------------------
-- Address range types.
-- The constant declarations, below, give symbolic-name aliases for values
-- that can be used in the C_ARD_ID_ARRAY generic of IPIFs. The first set
-- gives aliases that are used to include IPIF services.
--------------------------------------------------------------------------------
-- IPIF module aliases
Constant IPIF_INTR : integer := 1;
Constant IPIF_RST : integer := 2;
Constant IPIF_SESR_SEAR : integer := 3;
Constant IPIF_DMA_SG : integer := 4;
Constant IPIF_WRFIFO_REG : integer := 5;
Constant IPIF_WRFIFO_DATA : integer := 6;
Constant IPIF_RDFIFO_REG : integer := 7;
Constant IPIF_RDFIFO_DATA : integer := 8;
Constant IPIF_CHDMA_CHANNELS : integer := 9;
Constant IPIF_CHDMA_GLOBAL_REGS : integer := 10;
Constant CHDMA_STATUS_FIFO : integer := 90;
-- Some predefined user module aliases
Constant USER_00 : integer := 100;
Constant USER_01 : integer := 101;
Constant USER_02 : integer := 102;
Constant USER_03 : integer := 103;
Constant USER_04 : integer := 104;
Constant USER_05 : integer := 105;
Constant USER_06 : integer := 106;
Constant USER_07 : integer := 107;
Constant USER_08 : integer := 108;
Constant USER_09 : integer := 109;
Constant USER_10 : integer := 110;
Constant USER_11 : integer := 111;
Constant USER_12 : integer := 112;
Constant USER_13 : integer := 113;
Constant USER_14 : integer := 114;
Constant USER_15 : integer := 115;
Constant USER_16 : integer := 116;
---( Start of Dependent Properties declarations
--------------------------------------------------------------------------------
-- Declarations for Dependent Properties (properties that depend on the type of
-- the address range, or in other words, address-range-specific parameters).
-- There is one property, i.e. one parameter, encoded as an integer at
-- each index of the properties array. There is one properties array for
-- each address range.
--
-- The C_ARD_DEPENDENT_PROPS_ARRAY generic parameter in (most) IPIFs is such
-- a properties array and it is usually giving its (static) value using a
-- VHDL aggregate construct. (--ToDo, give an example of this.)
--
-- The the "assigned" default value of a dependent property is zero. This value
-- is usually specified the aggregate by leaving its (index) name out so that
-- it is covered by an "others => 0" choice in the aggregate. Some parameters,
-- as noted in the definitions, below, have an "effective" default value that is
-- different from the assigned default value of zero. In such cases, the
-- function, eff_dp, given below, can be used to get the effective value of
-- the dependent property.
--------------------------------------------------------------------------------
constant DEPENDENT_PROPS_SIZE : integer := 32;
subtype DEPENDENT_PROPS_TYPE
is INTEGER_ARRAY_TYPE(0 to DEPENDENT_PROPS_SIZE-1);
type DEPENDENT_PROPS_ARRAY_TYPE
is array (natural range <>) of DEPENDENT_PROPS_TYPE;
--------------------------------------------------------------------------------
-- Below are the indices of dependent properties for the different types of
-- address ranges.
--
-- Example: Let C_ARD_DEPENDENT_PROPS_ARRAY hold the dependent properites
-- for a set of address ranges. Then, e.g.,
--
-- C_ARD_DEPENDENT_PROPS_ARRAY(i)(FIFO_CAPACITY_BITS)
--
-- gives the fifo capacity in bits, provided that the i'th address range
-- is of type IPIF_WRFIFO_DATA or IPIF_RDFIFO_DATA.
--
-- These indices should be referenced only by the names below and never
-- by numerical literals. (The right to change numerical index assignments
-- is reserved; applications using the names will not be affected by such
-- reassignments.)
--------------------------------------------------------------------------------
--
--ToDo, if the interrupt controller parameterization is ever moved to
-- C_ARD_DEPENDENT_PROPS_ARRAY, then the following declarations
-- could be uncommented and used.
---- IPIF_INTR IDX
---------------------------------------------------------------------------- ---
constant EXCLUDE_DEV_ISC : integer := 0;
-- 1 specifies that only the global interrupt
-- enable is present in the device interrupt source
-- controller and that the only source of interrupts
-- in the device is the IP interrupt source controller.
-- 0 specifies that the full device interrupt
-- source controller structure will be included.
constant INCLUDE_DEV_PENCODER : integer := 1;
-- 1 will include the Device IID in the device interrupt
-- source controller, 0 will exclude it.
--
-- IPIF_WRFIFO_DATA or IPIF_RDFIFO_DATA IDX
---------------------------------------------------------------------------- ---
constant FIFO_CAPACITY_BITS : integer := 0;
constant WR_WIDTH_BITS : integer := 1;
constant RD_WIDTH_BITS : integer := 2;
constant EXCLUDE_PACKET_MODE : integer := 3;
-- 1 Don't include packet mode features
-- 0 Include packet mode features
constant EXCLUDE_VACANCY : integer := 4;
-- 1 Don't include vacancy calculation
-- 0 Include vacancy calculation
-- See also the functions
-- bits_needed_for_vac and
-- bits_needed_for_occ that are declared below.
constant INCLUDE_DRE : integer := 5;
constant INCLUDE_AUTOPUSH_POP : integer := 6;
constant AUTOPUSH_POP_CE : integer := 7;
constant INCLUDE_CSUM : integer := 8;
--------------------------------------------------------------------------------
--
-- DMA_SG IDX
---------------------------------------------------------------------------- ---
--------------------------------------------------------------------------------
-- IPIF_CHDMA_CHANNELS IDX
---------------------------------------------------------------------------- ---
constant NUM_SUBS_FOR_PHYS_0 : integer :=0;
constant NUM_SUBS_FOR_PHYS_1 : integer :=1;
constant NUM_SUBS_FOR_PHYS_2 : integer :=2;
constant NUM_SUBS_FOR_PHYS_3 : integer :=3;
constant NUM_SUBS_FOR_PHYS_4 : integer :=4;
constant NUM_SUBS_FOR_PHYS_5 : integer :=5;
constant NUM_SUBS_FOR_PHYS_6 : integer :=6;
constant NUM_SUBS_FOR_PHYS_7 : integer :=7;
constant NUM_SUBS_FOR_PHYS_8 : integer :=8;
constant NUM_SUBS_FOR_PHYS_9 : integer :=9;
constant NUM_SUBS_FOR_PHYS_10 : integer :=10;
constant NUM_SUBS_FOR_PHYS_11 : integer :=11;
constant NUM_SUBS_FOR_PHYS_12 : integer :=12;
constant NUM_SUBS_FOR_PHYS_13 : integer :=13;
constant NUM_SUBS_FOR_PHYS_14 : integer :=14;
constant NUM_SUBS_FOR_PHYS_15 : integer :=15;
-- Gives the number of sub-channels for physical channel i.
--
-- These constants, which will be MAX_NUM_PHYS_CHANNELS in number (see
-- below), have consecutive values starting with 0 for
-- NUM_SUBS_FOR_PHYS_0. (The constants serve the purpose of giving symbolic
-- names for use in the dependent-properties aggregates that parameterize
-- an IPIF_CHDMA_CHANNELS address range.)
--
-- [Users can ignore this note for developers
-- If the number of physical channels changes, both the
-- IPIF_CHDMA_CHANNELS constants and MAX_NUM_PHYS_CHANNELS,
-- below, must be adjusted.
-- (Use of an array constant or a function of the form
-- NUM_SUBS_FOR_PHYS(i) to define the indices
-- runs afoul of LRM restrictions on non-locally static aggregate
-- choices. (Further, the LRM imposes perhaps unnecessarily
-- strict limits on what qualifies as a locally static primary.)
-- Note: This information is supplied for the benefit of anyone seeking
-- to improve the way that these NUM_SUBS_FOR_PHYS parameter
-- indices are defined.)
-- End of note for developers ]
--
-- The value associated with any index NUM_SUBS_FOR_PHYS_i in the
-- dependent-properties array must be even since TX and RX channels
-- come in pairs with the TX followed immediately by
-- the corresponding RX.
--
constant NUM_SIMPLE_DMA_CHANS : integer :=16;
-- The number of simple DMA channels.
constant NUM_SIMPLE_SG_CHANS : integer :=17;
-- The number of simple SG channels.
constant INTR_COALESCE : integer :=18;
-- 0 Interrupt coalescing is disabled
-- 1 Interrupt coalescing is enabled
constant CLK_PERIOD_PS : integer :=19;
-- The period of the OPB Bus clock in ps.
-- The default value of 0 is a special value that
-- is synonymous with 10000 ps (10 ns).
-- The value for CLK_PERIOD_PS is relevant only if (INTR_COALESCE = 1).
constant PACKET_WAIT_UNIT_NS : integer :=20;
-- Gives the unit for used for timing of pack-wait bounds.
-- The default value of 0 is a special value that
-- is synonymous with 1,000,000 ns (1 ms) and a non-default
-- value is typically only used for testing.
-- Relevant only if (INTR_COALESCE = 1).
constant BURST_SIZE : integer :=21;
-- 1, 2, 4, 8 or 16
-- The default value of 0 is a special value that
-- is synonymous with a burst size of 16.
-- Setting the BURST_SIZE to 1 effectively disables
-- bursts.
constant REMAINDER_AS_SINGLES : integer :=22;
-- 0 Remainder handled as a short burst
-- 1 Remainder handled as a series of singles
--------------------------------------------------------------------------------
-- The constant below is not the index of a dependent-properties
-- parameter (and, as such, would never appear as a choice in a
-- dependent-properties aggregate). Rather, it is fixed to the maximum
-- number of physical channels that an Address Range of type
-- IPIF_CHDMA_CHANNELS supports. It must be maintained in conjuction with
-- the constants named, e.g., NUM_SUBS_FOR_PHYS_15, above.
--------------------------------------------------------------------------------
constant MAX_NUM_PHYS_CHANNELS : natural := 16;
--------------------------------------------------------------------------
-- EXAMPLE: Here is an example dependent-properties aggregate for an
-- address range of type IPIF_CHDMA_CHANNELS.
-- To have a compact list of all of the CHDMA parameters, all are
-- shown, however three are commented out and the unneeded
-- MUM_SUBS_FOR_PHYS_x are excluded. The "OTHERS => 0" association
-- gives these parameters their default values, such that, for the example
--
-- - All physical channels above 2 have zero subchannels (effectively,
-- these physical channels are not used)
-- - There are no simple SG channels
-- - The packet-wait time unit is 1 ms
-- - Burst size is 16
--------------------------------------------------------------------------
-- (
-- NUM_SUBS_FOR_PHYS_0 => 8,
-- NUM_SUBS_FOR_PHYS_1 => 4,
-- NUM_SUBS_FOR_PHYS_2 => 14,
-- NUM_SIMPLE_DMA_CHANS => 1,
-- --NUM_SIMPLE_SG_CHANS => 5,
-- INTR_COALESCE => 1,
-- CLK_PERIOD_PS => 20000,
-- --PACKET_WAIT_UNIT_NS => 50000,
-- --BURST_SIZE => 1,
-- REMAINDER_AS_SINGLES => 1,
-- OTHERS => 0
-- )
--
--------------------------------------------------------------------------------
--------------------------------------------------------------------------------
-- Calculates the number of bits needed to convey the vacancy (emptiness) of
-- the fifo described by dependent_props, if fifo_present. If not fifo_present,
-- returns 0 (or the smallest value allowed by tool limitations on null arrays)
-- without making reference to dependent_props.
--------------------------------------------------------------------------------
function bits_needed_for_vac(
fifo_present: boolean;
dependent_props : DEPENDENT_PROPS_TYPE
) return integer;
--------------------------------------------------------------------------------
-- Calculates the number of bits needed to convey the occupancy (fullness) of
-- the fifo described by dependent_props, if fifo_present. If not fifo_present,
-- returns 0 (or the smallest value allowed by tool limitations on null arrays)
-- without making reference to dependent_props.
--------------------------------------------------------------------------------
function bits_needed_for_occ(
fifo_present: boolean;
dependent_props : DEPENDENT_PROPS_TYPE
) return integer;
--------------------------------------------------------------------------------
-- Function eff_dp.
--
-- For some of the dependent properties, the default value of zero is meant
-- to imply an effective default value of other than zero (see e.g.
-- PKT_WAIT_UNIT_NS for the IPIF_CHDMA_CHANNELS address-range type). The
-- following function is used to get the (possibly default-adjusted)
-- value for a dependent property.
--
-- Example call:
--
-- eff_value_of_param :=
-- eff_dp(
-- C_IPIF_CHDMA_CHANNELS,
-- PACKET_WAIT_UNIT_NS,
-- C_ARD_DEPENDENT_PROPS_ARRAY(i)(PACKET_WAIT_UNIT_NS)
-- );
--
-- where C_ARD_DEPENDENT_PROPS_ARRAY(i) is an object of type
-- DEPENDENT_PROPS_ARRAY_TYPE, that was parameterized for an address range of
-- type C_IPIF_CHDMA_CHANNELS.
--------------------------------------------------------------------------------
function eff_dp(id : integer; -- The type of address range.
dep_prop : integer; -- The index of the dependent prop.
value : integer -- The value at that index.
) return integer; -- The effective value, possibly adjusted
-- if value has the default value of 0.
---) End of Dependent Properties declarations
--------------------------------------------------------------------------------
-- Declarations for Common Properties (properties that apply regardless of the
-- type of the address range). Structurally, these work the same as
-- the dependent properties.
--------------------------------------------------------------------------------
constant COMMON_PROPS_SIZE : integer := 2;
subtype COMMON_PROPS_TYPE
is INTEGER_ARRAY_TYPE(0 to COMMON_PROPS_SIZE-1);
type COMMON_PROPS_ARRAY_TYPE
is array (natural range <>) of COMMON_PROPS_TYPE;
--------------------------------------------------------------------------------
-- Below are the indices of the common properties.
--
-- These indices should be referenced only by the names below and never
-- by numerical literals.
-- IDX
---------------------------------------------------------------------------- ---
constant KEYHOLE_BURST : integer := 0;
-- 1 All addresses of a burst are forced to the initial
-- address of the burst.
-- 0 Burst addresses follow the bus protocol.
-- IP interrupt mode array constants
Constant INTR_PASS_THRU : integer := 1;
Constant INTR_PASS_THRU_INV : integer := 2;
Constant INTR_REG_EVENT : integer := 3;
Constant INTR_REG_EVENT_INV : integer := 4;
Constant INTR_POS_EDGE_DETECT : integer := 5;
Constant INTR_NEG_EDGE_DETECT : integer := 6;
end ipif_pkg;
package body ipif_pkg is
-------------------------------------------------------------------------------
-- Function log2 -- returns number of bits needed to encode x choices
-- x = 0 returns 0
-- x = 1 returns 0
-- x = 2 returns 1
-- x = 4 returns 2, etc.
-------------------------------------------------------------------------------
--
function log2(x : natural) return integer is
variable i : integer := 0;
variable val: integer := 1;
begin
if x = 0 then return 0;
else
for j in 0 to 29 loop -- for loop for XST
if val >= x then null;
else
i := i+1;
val := val*2;
end if;
end loop;
-- Fix per CR520627 XST was ignoring this anyway and printing a
-- Warning in SRP file. This will get rid of the warning and not
-- impact simulation.
-- synthesis translate_off
assert val >= x
report "Function log2 received argument larger" &
" than its capability of 2^30. "
severity failure;
-- synthesis translate_on
return i;
end if;
end function log2;
--------------------------------------------------------------------------------
-- Function clog2 - returns the integer ceiling of the base 2 logarithm of x,
-- i.e., the least integer greater than or equal to log2(x).
--------------------------------------------------------------------------------
function clog2(x : positive) return natural is
variable r : natural := 0;
variable rp : natural := 1; -- rp tracks the value 2**r
begin
while rp < x loop -- Termination condition T: x <= 2**r
-- Loop invariant L: 2**(r-1) < x
r := r + 1;
if rp > integer'high - rp then exit; end if; -- If doubling rp overflows
-- the integer range, the doubled value would exceed x, so safe to exit.
rp := rp + rp;
end loop;
-- L and T <-> 2**(r-1) < x <= 2**r <-> (r-1) < log2(x) <= r
return r; --
end clog2;
-------------------------------------------------------------------------------
-- Function Definitions
-------------------------------------------------------------------------------
-----------------------------------------------------------------------------
-- Function "="
--
-- This function can be used to overload the "=" operator when comparing
-- strings.
-----------------------------------------------------------------------------
function "=" (s1: in string; s2: in string) return boolean is
constant tc: character := ' '; -- string termination character
variable i: integer := 1;
variable v1 : string(1 to s1'length) := s1;
variable v2 : string(1 to s2'length) := s2;
begin
while (i <= v1'length) and (v1(i) /= tc) and
(i <= v2'length) and (v2(i) /= tc) and
(v1(i) = v2(i))
loop
i := i+1;
end loop;
return ((i > v1'length) or (v1(i) = tc)) and
((i > v2'length) or (v2(i) = tc));
end;
----------------------------------------------------------------------------
-- Function equaluseCase
--
-- This function returns true if case sensitive string comparison determines
-- that str1 and str2 are the same.
-----------------------------------------------------------------------------
FUNCTION equaluseCase( str1, str2 : STRING ) RETURN BOOLEAN IS
CONSTANT len1 : INTEGER := str1'length;
CONSTANT len2 : INTEGER := str2'length;
VARIABLE equal : BOOLEAN := TRUE;
BEGIN
IF NOT (len1=len2) THEN
equal := FALSE;
ELSE
FOR i IN str1'range LOOP
IF NOT (str1(i) = str2(i)) THEN
equal := FALSE;
END IF;
END LOOP;
END IF;
RETURN equal;
END equaluseCase;
-----------------------------------------------------------------------------
-- Function calc_num_ce
--
-- This function is used to process the array specifying the number of Chip
-- Enables required for a Base Address specification. The array is input to
-- the function and an integer is returned reflecting the total number of
-- Chip Enables required for the CE, RdCE, and WrCE Buses
-----------------------------------------------------------------------------
function calc_num_ce (ce_num_array : INTEGER_ARRAY_TYPE) return integer is
Variable ce_num_sum : integer := 0;
begin
for i in 0 to (ce_num_array'length)-1 loop
ce_num_sum := ce_num_sum + ce_num_array(i);
End loop;
return(ce_num_sum);
end function calc_num_ce;
-----------------------------------------------------------------------------
-- Function calc_start_ce_index
--
-- This function is used to process the array specifying the number of Chip
-- Enables required for a Base Address specification. The CE Size array is
-- input to the function and an integer index representing the index of the
-- target module in the ce_num_array. An integer is returned reflecting the
-- starting index of the assigned Chip Enables within the CE, RdCE, and
-- WrCE Buses.
-----------------------------------------------------------------------------
function calc_start_ce_index (ce_num_array : INTEGER_ARRAY_TYPE;
index : integer) return integer is
Variable ce_num_sum : integer := 0;
begin
If (index = 0) Then
ce_num_sum := 0;
else
for i in 0 to index-1 loop
ce_num_sum := ce_num_sum + ce_num_array(i);
End loop;
End if;
return(ce_num_sum);
end function calc_start_ce_index;
-----------------------------------------------------------------------------
-- Function get_min_dwidth
--
-- This function is used to process the array specifying the data bus width
-- for each of the target modules. The dwidth_array is input to the function
-- and an integer is returned that is the smallest value found of all the
-- entries in the array.
-----------------------------------------------------------------------------
function get_min_dwidth (dwidth_array: INTEGER_ARRAY_TYPE) return integer is
Variable temp_min : Integer := 1024;
begin
for i in 0 to dwidth_array'length-1 loop
If (dwidth_array(i) < temp_min) Then
temp_min := dwidth_array(i);
else
null;
End if;
End loop;
return(temp_min);
end function get_min_dwidth;
-----------------------------------------------------------------------------
-- Function get_max_dwidth
--
-- This function is used to process the array specifying the data bus width
-- for each of the target modules. The dwidth_array is input to the function
-- and an integer is returned that is the largest value found of all the
-- entries in the array.
-----------------------------------------------------------------------------
function get_max_dwidth (dwidth_array: INTEGER_ARRAY_TYPE) return integer is
Variable temp_max : Integer := 0;
begin
for i in 0 to dwidth_array'length-1 loop
If (dwidth_array(i) > temp_max) Then
temp_max := dwidth_array(i);
else
null;
End if;
End loop;
return(temp_max);
end function get_max_dwidth;
-----------------------------------------------------------------------------
-- Function S32
--
-- This function is used to expand an input string to 32 characters by
-- padding with spaces. If the input string is larger than 32 characters,
-- it will truncate to 32 characters.
-----------------------------------------------------------------------------
function S32 (in_string : string) return string is
constant OUTPUT_STRING_LENGTH : integer := 32;
Constant space : character := ' ';
variable new_string : string(1 to 32);
Variable start_index : Integer := in_string'length+1;
begin
If (in_string'length < OUTPUT_STRING_LENGTH) Then
for i in 1 to in_string'length loop
new_string(i) := in_string(i);
End loop;
for j in start_index to OUTPUT_STRING_LENGTH loop
new_string(j) := space;
End loop;
else -- use first 32 chars of in_string (truncate the rest)
for k in 1 to OUTPUT_STRING_LENGTH loop
new_string(k) := in_string(k);
End loop;
End if;
return(new_string);
end function S32;
-----------------------------------------------------------------------------
-- Function get_id_index
--
-- This function is used to process the array specifying the target function
-- assigned to a Base Address pair address range. The id_array and a
-- id number is input to the function. A integer is returned reflecting the
-- array index of the id matching the id input number. This function
-- should only be called if the id number is known to exist in the
-- name_array input. This can be detirmined by using the find_ard_id
-- function.
-----------------------------------------------------------------------------
function get_id_index (id_array :INTEGER_ARRAY_TYPE;
id : integer) return integer is
Variable match : Boolean := false;
Variable match_index : Integer := 10000; -- a really big number!
begin
for array_index in 0 to id_array'length-1 loop
If (match = true) Then -- match already found so do nothing
null;
else -- compare the numbers one by one
match := (id_array(array_index) = id);
If (match) Then
match_index := array_index;
else
null;
End if;
End if;
End loop;
return(match_index);
end function get_id_index;
--------------------------------------------------------------------------------
-- get_id_index but return a value in bounds on error (iboe).
--
-- This function is the same as get_id_index, except that when id does
-- not exist in id_array, the value returned is any index that is
-- within the index range of id_array.
--
-- This function would normally only be used where function find_ard_id
-- is used to establish the existence of id but, even when non-existent,
-- an element of one of the ARD arrays will be computed from the
-- returned get_id_index_iboe value. See, e.g., function bits_needed_for_vac
-- and the example call, below
--
-- bits_needed_for_vac(
-- find_ard_id(C_ARD_ID_ARRAY, IPIF_RDFIFO_DATA),
-- C_ARD_DEPENDENT_PROPS_ARRAY(get_id_index_iboe(C_ARD_ID_ARRAY,
-- IPIF_RDFIFO_DATA))
-- )
--------------------------------------------------------------------------------
function get_id_index_iboe (id_array :INTEGER_ARRAY_TYPE;
id : integer) return integer is
Variable match : Boolean := false;
Variable match_index : Integer := id_array'left; -- any valid array index
begin
for array_index in 0 to id_array'length-1 loop
If (match = true) Then -- match already found so do nothing
null;
else -- compare the numbers one by one
match := (id_array(array_index) = id);
If (match) Then match_index := array_index;
else null;
End if;
End if;
End loop;
return(match_index);
end function get_id_index_iboe;
-----------------------------------------------------------------------------
-- Function find_ard_id
--
-- This function is used to process the array specifying the target function
-- assigned to a Base Address pair address range. The id_array and a
-- integer id is input to the function. A boolean is returned reflecting the
-- presence (or not) of a number in the array matching the id input number.
-----------------------------------------------------------------------------
function find_ard_id (id_array : INTEGER_ARRAY_TYPE;
id : integer) return boolean is
Variable match : Boolean := false;
begin
for array_index in 0 to id_array'length-1 loop
If (match = true) Then -- match already found so do nothing
null;
else -- compare the numbers one by one
match := (id_array(array_index) = id);
End if;
End loop;
return(match);
end function find_ard_id;
-----------------------------------------------------------------------------
-- Function find_id_dwidth
--
-- This function is used to find the data width of a target module. If the
-- target module exists, the data width is extracted from the input dwidth
-- array. If the module is not in the ID array, the default input is
-- returned. This function is needed to assign data port size constraints on
-- unconstrained port widths.
-----------------------------------------------------------------------------
function find_id_dwidth (id_array : INTEGER_ARRAY_TYPE;
dwidth_array: INTEGER_ARRAY_TYPE;
id : integer;
default : integer) return integer is
Variable id_present : Boolean := false;
Variable array_index : Integer := 0;
Variable dwidth : Integer := default;
begin
id_present := find_ard_id(id_array, id);
If (id_present) Then
array_index := get_id_index (id_array, id);
dwidth := dwidth_array(array_index);
else
null; -- use default input
End if;
Return (dwidth);
end function find_id_dwidth;
-----------------------------------------------------------------------------
-- Function cnt_ipif_id_blks
--
-- This function is used to detirmine the number of IPIF components specified
-- in the ARD ID Array. An integer is returned representing the number
-- of elements counted. User IDs are ignored in the counting process.
-----------------------------------------------------------------------------
function cnt_ipif_id_blks (id_array : INTEGER_ARRAY_TYPE)
return integer is
Variable blk_count : integer := 0;
Variable temp_id : integer;
begin
for array_index in 0 to id_array'length-1 loop
temp_id := id_array(array_index);
If (temp_id = IPIF_WRFIFO_DATA or
temp_id = IPIF_RDFIFO_DATA or
temp_id = IPIF_RST or
temp_id = IPIF_INTR or
temp_id = IPIF_DMA_SG or
temp_id = IPIF_SESR_SEAR
) Then -- IPIF block found
blk_count := blk_count+1;
else -- go to next loop iteration
null;
End if;
End loop;
return(blk_count);
end function cnt_ipif_id_blks;
-----------------------------------------------------------------------------
-- Function get_ipif_id_dbus_index
--
-- This function is used to detirmine the IPIF relative index of a given
-- ID value. User IDs are ignored in the index detirmination.
-----------------------------------------------------------------------------
function get_ipif_id_dbus_index (id_array : INTEGER_ARRAY_TYPE;
id : integer)
return integer is
Variable blk_index : integer := 0;
Variable temp_id : integer;
Variable id_found : Boolean := false;
begin
for array_index in 0 to id_array'length-1 loop
temp_id := id_array(array_index);
If (id_found) then
null;
elsif (temp_id = id) then
id_found := true;
elsif (temp_id = IPIF_WRFIFO_DATA or
temp_id = IPIF_RDFIFO_DATA or
temp_id = IPIF_RST or
temp_id = IPIF_INTR or
temp_id = IPIF_DMA_SG or
temp_id = IPIF_SESR_SEAR
) Then -- IPIF block found
blk_index := blk_index+1;
else -- user block so do nothing
null;
End if;
End loop;
return(blk_index);
end function get_ipif_id_dbus_index;
------------------------------------------------------------------------------
-- Function: rebuild_slv32_array
--
-- Description:
-- This function takes an input slv32 array and rebuilds an output slv32
-- array composed of the first "num_valid_entry" elements from the input
-- array.
------------------------------------------------------------------------------
function rebuild_slv32_array (slv32_array : SLV32_ARRAY_TYPE;
num_valid_pairs : integer)
return SLV32_ARRAY_TYPE is
--Constants
constant num_elements : Integer := num_valid_pairs * 2;
-- Variables
variable temp_baseaddr32_array : SLV32_ARRAY_TYPE( 0 to num_elements-1);
begin
for array_index in 0 to num_elements-1 loop
temp_baseaddr32_array(array_index) := slv32_array(array_index);
end loop;
return(temp_baseaddr32_array);
end function rebuild_slv32_array;
------------------------------------------------------------------------------
-- Function: rebuild_slv64_array
--
-- Description:
-- This function takes an input slv64 array and rebuilds an output slv64
-- array composed of the first "num_valid_entry" elements from the input
-- array.
------------------------------------------------------------------------------
function rebuild_slv64_array (slv64_array : SLV64_ARRAY_TYPE;
num_valid_pairs : integer)
return SLV64_ARRAY_TYPE is
--Constants
constant num_elements : Integer := num_valid_pairs * 2;
-- Variables
variable temp_baseaddr64_array : SLV64_ARRAY_TYPE( 0 to num_elements-1);
begin
for array_index in 0 to num_elements-1 loop
temp_baseaddr64_array(array_index) := slv64_array(array_index);
end loop;
return(temp_baseaddr64_array);
end function rebuild_slv64_array;
------------------------------------------------------------------------------
-- Function: rebuild_int_array
--
-- Description:
-- This function takes an input integer array and rebuilds an output integer
-- array composed of the first "num_valid_entry" elements from the input
-- array.
------------------------------------------------------------------------------
function rebuild_int_array (int_array : INTEGER_ARRAY_TYPE;
num_valid_entry : integer)
return INTEGER_ARRAY_TYPE is
-- Variables
variable temp_int_array : INTEGER_ARRAY_TYPE( 0 to num_valid_entry-1);
begin
for array_index in 0 to num_valid_entry-1 loop
temp_int_array(array_index) := int_array(array_index);
end loop;
return(temp_int_array);
end function rebuild_int_array;
function bits_needed_for_vac(
fifo_present: boolean;
dependent_props : DEPENDENT_PROPS_TYPE
) return integer is
begin
if not fifo_present then
return 1; -- Zero would be better but leads to "0 to -1" null
-- ranges that are not handled by XST Flint or earlier
-- because of the negative index.
else
return
log2(1 + dependent_props(FIFO_CAPACITY_BITS) /
dependent_props(RD_WIDTH_BITS)
);
end if;
end function bits_needed_for_vac;
function bits_needed_for_occ(
fifo_present: boolean;
dependent_props : DEPENDENT_PROPS_TYPE
) return integer is
begin
if not fifo_present then
return 1; -- Zero would be better but leads to "0 to -1" null
-- ranges that are not handled by XST Flint or earlier
-- because of the negative index.
else
return
log2(1 + dependent_props(FIFO_CAPACITY_BITS) /
dependent_props(WR_WIDTH_BITS)
);
end if;
end function bits_needed_for_occ;
function eff_dp(id : integer;
dep_prop : integer;
value : integer) return integer is
variable dp : integer := dep_prop;
type bo2na_type is array (boolean) of natural;
constant bo2na : bo2na_type := (0, 1);
begin
if value /= 0 then return value; end if; -- Not default
case id is
when IPIF_CHDMA_CHANNELS =>
-------------------
return( bo2na(dp = CLK_PERIOD_PS ) * 10000
+ bo2na(dp = PACKET_WAIT_UNIT_NS ) * 1000000
+ bo2na(dp = BURST_SIZE ) * 16
);
when others => return 0;
end case;
end eff_dp;
function populate_intr_mode_array (num_user_intr : integer;
intr_capture_mode : integer)
return INTEGER_ARRAY_TYPE is
variable intr_mode_array : INTEGER_ARRAY_TYPE(0 to num_user_intr-1);
begin
for i in 0 to num_user_intr-1 loop
intr_mode_array(i) := intr_capture_mode;
end loop;
return intr_mode_array;
end function populate_intr_mode_array;
function add_intr_ard_id_array(include_intr : boolean;
ard_id_array : INTEGER_ARRAY_TYPE)
return INTEGER_ARRAY_TYPE is
variable intr_ard_id_array : INTEGER_ARRAY_TYPE(0 to ard_id_array'length);
begin
intr_ard_id_array(0 to ard_id_array'length-1) := ard_id_array;
if include_intr then
intr_ard_id_array(ard_id_array'length) := IPIF_INTR;
return intr_ard_id_array;
else
return ard_id_array;
end if;
end function add_intr_ard_id_array;
function add_intr_ard_addr_range_array(include_intr : boolean;
ZERO_ADDR_PAD : std_logic_vector;
intr_baseaddr : std_logic_vector;
intr_highaddr : std_logic_vector;
ard_id_array : INTEGER_ARRAY_TYPE;
ard_addr_range_array : SLV64_ARRAY_TYPE)
return SLV64_ARRAY_TYPE is
variable intr_ard_addr_range_array : SLV64_ARRAY_TYPE(0 to ard_addr_range_array'length+1);
begin
intr_ard_addr_range_array(0 to ard_addr_range_array'length-1) := ard_addr_range_array;
if include_intr then
intr_ard_addr_range_array(2*get_id_index(ard_id_array,IPIF_INTR))
:= ZERO_ADDR_PAD & intr_baseaddr;
intr_ard_addr_range_array(2*get_id_index(ard_id_array,IPIF_INTR)+1)
:= ZERO_ADDR_PAD & intr_highaddr;
return intr_ard_addr_range_array;
else
return ard_addr_range_array;
end if;
end function add_intr_ard_addr_range_array;
function add_intr_ard_dwidth_array(include_intr : boolean;
intr_dwidth : integer;
ard_id_array : INTEGER_ARRAY_TYPE;
ard_dwidth_array : INTEGER_ARRAY_TYPE)
return INTEGER_ARRAY_TYPE is
variable intr_ard_dwidth_array : INTEGER_ARRAY_TYPE(0 to ard_dwidth_array'length);
begin
intr_ard_dwidth_array(0 to ard_dwidth_array'length-1) := ard_dwidth_array;
if include_intr then
intr_ard_dwidth_array(get_id_index(ard_id_array, IPIF_INTR)) := intr_dwidth;
return intr_ard_dwidth_array;
else
return ard_dwidth_array;
end if;
end function add_intr_ard_dwidth_array;
function add_intr_ard_num_ce_array(include_intr : boolean;
ard_id_array : INTEGER_ARRAY_TYPE;
ard_num_ce_array : INTEGER_ARRAY_TYPE)
return INTEGER_ARRAY_TYPE is
variable intr_ard_num_ce_array : INTEGER_ARRAY_TYPE(0 to ard_num_ce_array'length);
begin
intr_ard_num_ce_array(0 to ard_num_ce_array'length-1) := ard_num_ce_array;
if include_intr then
intr_ard_num_ce_array(get_id_index(ard_id_array, IPIF_INTR)) := 16;
return intr_ard_num_ce_array;
else
return ard_num_ce_array;
end if;
end function add_intr_ard_num_ce_array;
end package body ipif_pkg;
|
-- IPIF Common Library Package
-------------------------------------------------------------------------------
--
-- *************************************************************************
-- ** **
-- ** DISCLAIMER OF LIABILITY **
-- ** **
-- ** This text/file contains proprietary, confidential **
-- ** information of Xilinx, Inc., is distributed under **
-- ** license from Xilinx, Inc., and may be used, copied **
-- ** and/or disclosed only pursuant to the terms of a valid **
-- ** license agreement with Xilinx, Inc. Xilinx hereby **
-- ** grants you a license to use this text/file solely for **
-- ** design, simulation, implementation and creation of **
-- ** design files limited to Xilinx devices or technologies. **
-- ** Use with non-Xilinx devices or technologies is expressly **
-- ** prohibited and immediately terminates your license unless **
-- ** covered by a separate agreement. **
-- ** **
-- ** Xilinx is providing this design, code, or information **
-- ** "as-is" solely for use in developing programs and **
-- ** solutions for Xilinx devices, with no obligation on the **
-- ** part of Xilinx to provide support. By providing this design, **
-- ** code, or information as one possible implementation of **
-- ** this feature, application or standard, Xilinx is making no **
-- ** representation that this implementation is free from any **
-- ** claims of infringement. You are responsible for obtaining **
-- ** any rights you may require for your implementation. **
-- ** Xilinx expressly disclaims any warranty whatsoever with **
-- ** respect to the adequacy of the implementation, including **
-- ** but not limited to any warranties or representations that this **
-- ** implementation is free from claims of infringement, implied **
-- ** warranties of merchantability or fitness for a particular **
-- ** purpose. **
-- ** **
-- ** Xilinx products are not intended for use in life support **
-- ** appliances, devices, or systems. Use in such applications is **
-- ** expressly prohibited. **
-- ** **
-- ** Any modifications that are made to the Source Code are **
-- ** done at the users sole risk and will be unsupported. **
-- ** The Xilinx Support Hotline does not have access to source **
-- ** code and therefore cannot answer specific questions related **
-- ** to source HDL. The Xilinx Hotline support of original source **
-- ** code IP shall only address issues and questions related **
-- ** to the standard Netlist version of the core (and thus **
-- ** indirectly, the original core source). **
-- ** **
-- ** Copyright (c) 2002-2010 Xilinx, Inc. All rights reserved. **
-- ** **
-- ** This copyright and support notice must be retained as part **
-- ** of this text at all times. **
-- ** **
-- *************************************************************************
--
-------------------------------------------------------------------------------
-- Filename: ipif_pkg.vhd
-- Version: Intital
-- Description: This file contains the constants and functions used in the
-- ipif common library components.
--
-------------------------------------------------------------------------------
-- Structure:
--
-------------------------------------------------------------------------------
-- Author: DET
-- History:
-- DET 02/21/02 -- Created from proc_common_pkg.vhd
--
-- DET 03/13/02 -- PLB IPIF development updates
-- ^^^^^^
-- - Commented out string types and string functions due to an XST
-- problem with string arrays and functions. THe string array
-- processing functions were replaced with comperable functions
-- operating on integer arrays.
-- ~~~~~~
--
--
-- DET 4/30/2002 Initial
-- ~~~~~~
-- - Added three functions: rebuild_slv32_array, rebuild_slv64_array, and
-- rebuild_int_array to support removal of unused elements from the
-- ARD arrays.
-- ^^^^^^ --
--
-- FLO 8/12/2002
-- ~~~~~~
-- - Added three functions: bits_needed_for_vac, bits_needed_for_occ,
-- and get_id_index_iboe.
-- (Removed provisional functions bits_needed_for_vacancy,
-- bits needed_for_occupancy, and bits_needed_for.)
-- ^^^^^^
--
-- FLO 3/24/2003
-- ~~~~~~
-- - Added dependent property paramters for channelized DMA.
-- - Added common property parameter array type.
-- - Definded the KEYHOLD_BURST common-property parameter.
-- ^^^^^^
--
-- FLO 10/22/2003
-- ~~~~~~
-- - Some adjustment to CHDMA parameterization.
-- - Cleanup of obsolete code and comments. (The former "XST workaround"
-- has become the officially deployed method.)
-- ^^^^^^
--
-- LSS 03/24/2004
-- ~~~~~~
-- - Added 5 functions
-- ^^^^^^
--
-- ALS 09/03/04
-- ^^^^^^
-- -- Added constants to describe the channel protocols used in MCH_OPB_IPIF
-- ~~~~~~
--
-- DET 1/17/2008 v4_0
-- ~~~~~~
-- - Changed proc_common library version to v4_0
-- - Incorporated new disclaimer header
-- ^^^^^^
--
-------------------------------------------------------------------------------
-- Naming Conventions:
-- active low signals: "*_n"
-- clock signals: "clk", "clk_div#", "clk_#x"
-- reset signals: "rst", "rst_n"
-- generics: "C_*"
-- user defined types: "*_TYPE"
-- state machine next state: "*_ns"
-- state machine current state: "*_cs"
-- combinatorial signals: "*_com"
-- pipelined or register delay signals: "*_d#"
-- counter signals: "*cnt*"
-- clock enable signals: "*_ce"
-- internal version of output port "*_i"
-- device pins: "*_pin"
-- ports: - Names begin with Uppercase
-- processes: "*_PROCESS"
-- component instantiations: "<ENTITY_>I_<#|FUNC>
-------------------------------------------------------------------------------
library ieee;
use ieee.std_logic_1164.all;
-- need conversion function to convert reals/integers to std logic vectors
use ieee.std_logic_arith.all;
use ieee.std_logic_arith.all;
use ieee.std_logic_unsigned.all;
package ipif_pkg is
-------------------------------------------------------------------------------
-- Type Declarations
-------------------------------------------------------------------------------
type SLV32_ARRAY_TYPE is array (natural range <>) of std_logic_vector(0 to 31);
subtype SLV64_TYPE is std_logic_vector(0 to 63);
type SLV64_ARRAY_TYPE is array (natural range <>) of SLV64_TYPE;
type INTEGER_ARRAY_TYPE is array (natural range <>) of integer;
-------------------------------------------------------------------------------
-- Function and Procedure Declarations
-------------------------------------------------------------------------------
function "=" (s1: in string; s2: in string) return boolean;
function equaluseCase( str1, str2 : STRING ) RETURN BOOLEAN;
function calc_num_ce (ce_num_array : INTEGER_ARRAY_TYPE) return integer;
function calc_start_ce_index (ce_num_array : INTEGER_ARRAY_TYPE;
index : integer) return integer;
function get_min_dwidth (dwidth_array: INTEGER_ARRAY_TYPE) return integer;
function get_max_dwidth (dwidth_array: INTEGER_ARRAY_TYPE) return integer;
function S32 (in_string : string) return string;
--------------------------------------------------------------------------------
-- ARD support functions.
-- These function can be useful when operating with the ARD parameterization.
--------------------------------------------------------------------------------
function get_id_index (id_array :INTEGER_ARRAY_TYPE;
id : integer)
return integer;
function get_id_index_iboe (id_array :INTEGER_ARRAY_TYPE;
id : integer)
return integer;
function find_ard_id (id_array : INTEGER_ARRAY_TYPE;
id : integer) return boolean;
function find_id_dwidth (id_array : INTEGER_ARRAY_TYPE;
dwidth_array: INTEGER_ARRAY_TYPE;
id : integer;
default : integer)
return integer;
function cnt_ipif_id_blks (id_array : INTEGER_ARRAY_TYPE) return integer;
function get_ipif_id_dbus_index (id_array : INTEGER_ARRAY_TYPE;
id : integer)
return integer ;
function rebuild_slv32_array (slv32_array : SLV32_ARRAY_TYPE;
num_valid_pairs : integer)
return SLV32_ARRAY_TYPE;
function rebuild_slv64_array (slv64_array : SLV64_ARRAY_TYPE;
num_valid_pairs : integer)
return SLV64_ARRAY_TYPE;
function rebuild_int_array (int_array : INTEGER_ARRAY_TYPE;
num_valid_entry : integer)
return INTEGER_ARRAY_TYPE;
-- 5 Functions Added 3/24/04
function populate_intr_mode_array (num_user_intr : integer;
intr_capture_mode : integer)
return INTEGER_ARRAY_TYPE ;
function add_intr_ard_id_array(include_intr : boolean;
ard_id_array : INTEGER_ARRAY_TYPE)
return INTEGER_ARRAY_TYPE;
function add_intr_ard_addr_range_array(include_intr : boolean;
ZERO_ADDR_PAD : std_logic_vector;
intr_baseaddr : std_logic_vector;
intr_highaddr : std_logic_vector;
ard_id_array : INTEGER_ARRAY_TYPE;
ard_addr_range_array : SLV64_ARRAY_TYPE)
return SLV64_ARRAY_TYPE;
function add_intr_ard_num_ce_array(include_intr : boolean;
ard_id_array : INTEGER_ARRAY_TYPE;
ard_num_ce_array : INTEGER_ARRAY_TYPE)
return INTEGER_ARRAY_TYPE;
function add_intr_ard_dwidth_array(include_intr : boolean;
intr_dwidth : integer;
ard_id_array : INTEGER_ARRAY_TYPE;
ard_dwidth_array : INTEGER_ARRAY_TYPE)
return INTEGER_ARRAY_TYPE;
function log2(x : natural) return integer;
function clog2(x : positive) return natural;
-------------------------------------------------------------------------------
-- Constant Declarations
-------------------------------------------------------------------------------
-------------------------------------------------------------------------------
-- Channel Protocols
-- The constant declarations below give symbolic-name aliases for values that
-- can be used in the C_MCH_PROTOCOL_ARRAY generic of the MCH_OPB_IPIF.
-------------------------------------------------------------------------------
constant XCL : integer := 0;
constant DAG : integer := 1;
--------------------------------------------------------------------------------
-- Address range types.
-- The constant declarations, below, give symbolic-name aliases for values
-- that can be used in the C_ARD_ID_ARRAY generic of IPIFs. The first set
-- gives aliases that are used to include IPIF services.
--------------------------------------------------------------------------------
-- IPIF module aliases
Constant IPIF_INTR : integer := 1;
Constant IPIF_RST : integer := 2;
Constant IPIF_SESR_SEAR : integer := 3;
Constant IPIF_DMA_SG : integer := 4;
Constant IPIF_WRFIFO_REG : integer := 5;
Constant IPIF_WRFIFO_DATA : integer := 6;
Constant IPIF_RDFIFO_REG : integer := 7;
Constant IPIF_RDFIFO_DATA : integer := 8;
Constant IPIF_CHDMA_CHANNELS : integer := 9;
Constant IPIF_CHDMA_GLOBAL_REGS : integer := 10;
Constant CHDMA_STATUS_FIFO : integer := 90;
-- Some predefined user module aliases
Constant USER_00 : integer := 100;
Constant USER_01 : integer := 101;
Constant USER_02 : integer := 102;
Constant USER_03 : integer := 103;
Constant USER_04 : integer := 104;
Constant USER_05 : integer := 105;
Constant USER_06 : integer := 106;
Constant USER_07 : integer := 107;
Constant USER_08 : integer := 108;
Constant USER_09 : integer := 109;
Constant USER_10 : integer := 110;
Constant USER_11 : integer := 111;
Constant USER_12 : integer := 112;
Constant USER_13 : integer := 113;
Constant USER_14 : integer := 114;
Constant USER_15 : integer := 115;
Constant USER_16 : integer := 116;
---( Start of Dependent Properties declarations
--------------------------------------------------------------------------------
-- Declarations for Dependent Properties (properties that depend on the type of
-- the address range, or in other words, address-range-specific parameters).
-- There is one property, i.e. one parameter, encoded as an integer at
-- each index of the properties array. There is one properties array for
-- each address range.
--
-- The C_ARD_DEPENDENT_PROPS_ARRAY generic parameter in (most) IPIFs is such
-- a properties array and it is usually giving its (static) value using a
-- VHDL aggregate construct. (--ToDo, give an example of this.)
--
-- The the "assigned" default value of a dependent property is zero. This value
-- is usually specified the aggregate by leaving its (index) name out so that
-- it is covered by an "others => 0" choice in the aggregate. Some parameters,
-- as noted in the definitions, below, have an "effective" default value that is
-- different from the assigned default value of zero. In such cases, the
-- function, eff_dp, given below, can be used to get the effective value of
-- the dependent property.
--------------------------------------------------------------------------------
constant DEPENDENT_PROPS_SIZE : integer := 32;
subtype DEPENDENT_PROPS_TYPE
is INTEGER_ARRAY_TYPE(0 to DEPENDENT_PROPS_SIZE-1);
type DEPENDENT_PROPS_ARRAY_TYPE
is array (natural range <>) of DEPENDENT_PROPS_TYPE;
--------------------------------------------------------------------------------
-- Below are the indices of dependent properties for the different types of
-- address ranges.
--
-- Example: Let C_ARD_DEPENDENT_PROPS_ARRAY hold the dependent properites
-- for a set of address ranges. Then, e.g.,
--
-- C_ARD_DEPENDENT_PROPS_ARRAY(i)(FIFO_CAPACITY_BITS)
--
-- gives the fifo capacity in bits, provided that the i'th address range
-- is of type IPIF_WRFIFO_DATA or IPIF_RDFIFO_DATA.
--
-- These indices should be referenced only by the names below and never
-- by numerical literals. (The right to change numerical index assignments
-- is reserved; applications using the names will not be affected by such
-- reassignments.)
--------------------------------------------------------------------------------
--
--ToDo, if the interrupt controller parameterization is ever moved to
-- C_ARD_DEPENDENT_PROPS_ARRAY, then the following declarations
-- could be uncommented and used.
---- IPIF_INTR IDX
---------------------------------------------------------------------------- ---
constant EXCLUDE_DEV_ISC : integer := 0;
-- 1 specifies that only the global interrupt
-- enable is present in the device interrupt source
-- controller and that the only source of interrupts
-- in the device is the IP interrupt source controller.
-- 0 specifies that the full device interrupt
-- source controller structure will be included.
constant INCLUDE_DEV_PENCODER : integer := 1;
-- 1 will include the Device IID in the device interrupt
-- source controller, 0 will exclude it.
--
-- IPIF_WRFIFO_DATA or IPIF_RDFIFO_DATA IDX
---------------------------------------------------------------------------- ---
constant FIFO_CAPACITY_BITS : integer := 0;
constant WR_WIDTH_BITS : integer := 1;
constant RD_WIDTH_BITS : integer := 2;
constant EXCLUDE_PACKET_MODE : integer := 3;
-- 1 Don't include packet mode features
-- 0 Include packet mode features
constant EXCLUDE_VACANCY : integer := 4;
-- 1 Don't include vacancy calculation
-- 0 Include vacancy calculation
-- See also the functions
-- bits_needed_for_vac and
-- bits_needed_for_occ that are declared below.
constant INCLUDE_DRE : integer := 5;
constant INCLUDE_AUTOPUSH_POP : integer := 6;
constant AUTOPUSH_POP_CE : integer := 7;
constant INCLUDE_CSUM : integer := 8;
--------------------------------------------------------------------------------
--
-- DMA_SG IDX
---------------------------------------------------------------------------- ---
--------------------------------------------------------------------------------
-- IPIF_CHDMA_CHANNELS IDX
---------------------------------------------------------------------------- ---
constant NUM_SUBS_FOR_PHYS_0 : integer :=0;
constant NUM_SUBS_FOR_PHYS_1 : integer :=1;
constant NUM_SUBS_FOR_PHYS_2 : integer :=2;
constant NUM_SUBS_FOR_PHYS_3 : integer :=3;
constant NUM_SUBS_FOR_PHYS_4 : integer :=4;
constant NUM_SUBS_FOR_PHYS_5 : integer :=5;
constant NUM_SUBS_FOR_PHYS_6 : integer :=6;
constant NUM_SUBS_FOR_PHYS_7 : integer :=7;
constant NUM_SUBS_FOR_PHYS_8 : integer :=8;
constant NUM_SUBS_FOR_PHYS_9 : integer :=9;
constant NUM_SUBS_FOR_PHYS_10 : integer :=10;
constant NUM_SUBS_FOR_PHYS_11 : integer :=11;
constant NUM_SUBS_FOR_PHYS_12 : integer :=12;
constant NUM_SUBS_FOR_PHYS_13 : integer :=13;
constant NUM_SUBS_FOR_PHYS_14 : integer :=14;
constant NUM_SUBS_FOR_PHYS_15 : integer :=15;
-- Gives the number of sub-channels for physical channel i.
--
-- These constants, which will be MAX_NUM_PHYS_CHANNELS in number (see
-- below), have consecutive values starting with 0 for
-- NUM_SUBS_FOR_PHYS_0. (The constants serve the purpose of giving symbolic
-- names for use in the dependent-properties aggregates that parameterize
-- an IPIF_CHDMA_CHANNELS address range.)
--
-- [Users can ignore this note for developers
-- If the number of physical channels changes, both the
-- IPIF_CHDMA_CHANNELS constants and MAX_NUM_PHYS_CHANNELS,
-- below, must be adjusted.
-- (Use of an array constant or a function of the form
-- NUM_SUBS_FOR_PHYS(i) to define the indices
-- runs afoul of LRM restrictions on non-locally static aggregate
-- choices. (Further, the LRM imposes perhaps unnecessarily
-- strict limits on what qualifies as a locally static primary.)
-- Note: This information is supplied for the benefit of anyone seeking
-- to improve the way that these NUM_SUBS_FOR_PHYS parameter
-- indices are defined.)
-- End of note for developers ]
--
-- The value associated with any index NUM_SUBS_FOR_PHYS_i in the
-- dependent-properties array must be even since TX and RX channels
-- come in pairs with the TX followed immediately by
-- the corresponding RX.
--
constant NUM_SIMPLE_DMA_CHANS : integer :=16;
-- The number of simple DMA channels.
constant NUM_SIMPLE_SG_CHANS : integer :=17;
-- The number of simple SG channels.
constant INTR_COALESCE : integer :=18;
-- 0 Interrupt coalescing is disabled
-- 1 Interrupt coalescing is enabled
constant CLK_PERIOD_PS : integer :=19;
-- The period of the OPB Bus clock in ps.
-- The default value of 0 is a special value that
-- is synonymous with 10000 ps (10 ns).
-- The value for CLK_PERIOD_PS is relevant only if (INTR_COALESCE = 1).
constant PACKET_WAIT_UNIT_NS : integer :=20;
-- Gives the unit for used for timing of pack-wait bounds.
-- The default value of 0 is a special value that
-- is synonymous with 1,000,000 ns (1 ms) and a non-default
-- value is typically only used for testing.
-- Relevant only if (INTR_COALESCE = 1).
constant BURST_SIZE : integer :=21;
-- 1, 2, 4, 8 or 16
-- The default value of 0 is a special value that
-- is synonymous with a burst size of 16.
-- Setting the BURST_SIZE to 1 effectively disables
-- bursts.
constant REMAINDER_AS_SINGLES : integer :=22;
-- 0 Remainder handled as a short burst
-- 1 Remainder handled as a series of singles
--------------------------------------------------------------------------------
-- The constant below is not the index of a dependent-properties
-- parameter (and, as such, would never appear as a choice in a
-- dependent-properties aggregate). Rather, it is fixed to the maximum
-- number of physical channels that an Address Range of type
-- IPIF_CHDMA_CHANNELS supports. It must be maintained in conjuction with
-- the constants named, e.g., NUM_SUBS_FOR_PHYS_15, above.
--------------------------------------------------------------------------------
constant MAX_NUM_PHYS_CHANNELS : natural := 16;
--------------------------------------------------------------------------
-- EXAMPLE: Here is an example dependent-properties aggregate for an
-- address range of type IPIF_CHDMA_CHANNELS.
-- To have a compact list of all of the CHDMA parameters, all are
-- shown, however three are commented out and the unneeded
-- MUM_SUBS_FOR_PHYS_x are excluded. The "OTHERS => 0" association
-- gives these parameters their default values, such that, for the example
--
-- - All physical channels above 2 have zero subchannels (effectively,
-- these physical channels are not used)
-- - There are no simple SG channels
-- - The packet-wait time unit is 1 ms
-- - Burst size is 16
--------------------------------------------------------------------------
-- (
-- NUM_SUBS_FOR_PHYS_0 => 8,
-- NUM_SUBS_FOR_PHYS_1 => 4,
-- NUM_SUBS_FOR_PHYS_2 => 14,
-- NUM_SIMPLE_DMA_CHANS => 1,
-- --NUM_SIMPLE_SG_CHANS => 5,
-- INTR_COALESCE => 1,
-- CLK_PERIOD_PS => 20000,
-- --PACKET_WAIT_UNIT_NS => 50000,
-- --BURST_SIZE => 1,
-- REMAINDER_AS_SINGLES => 1,
-- OTHERS => 0
-- )
--
--------------------------------------------------------------------------------
--------------------------------------------------------------------------------
-- Calculates the number of bits needed to convey the vacancy (emptiness) of
-- the fifo described by dependent_props, if fifo_present. If not fifo_present,
-- returns 0 (or the smallest value allowed by tool limitations on null arrays)
-- without making reference to dependent_props.
--------------------------------------------------------------------------------
function bits_needed_for_vac(
fifo_present: boolean;
dependent_props : DEPENDENT_PROPS_TYPE
) return integer;
--------------------------------------------------------------------------------
-- Calculates the number of bits needed to convey the occupancy (fullness) of
-- the fifo described by dependent_props, if fifo_present. If not fifo_present,
-- returns 0 (or the smallest value allowed by tool limitations on null arrays)
-- without making reference to dependent_props.
--------------------------------------------------------------------------------
function bits_needed_for_occ(
fifo_present: boolean;
dependent_props : DEPENDENT_PROPS_TYPE
) return integer;
--------------------------------------------------------------------------------
-- Function eff_dp.
--
-- For some of the dependent properties, the default value of zero is meant
-- to imply an effective default value of other than zero (see e.g.
-- PKT_WAIT_UNIT_NS for the IPIF_CHDMA_CHANNELS address-range type). The
-- following function is used to get the (possibly default-adjusted)
-- value for a dependent property.
--
-- Example call:
--
-- eff_value_of_param :=
-- eff_dp(
-- C_IPIF_CHDMA_CHANNELS,
-- PACKET_WAIT_UNIT_NS,
-- C_ARD_DEPENDENT_PROPS_ARRAY(i)(PACKET_WAIT_UNIT_NS)
-- );
--
-- where C_ARD_DEPENDENT_PROPS_ARRAY(i) is an object of type
-- DEPENDENT_PROPS_ARRAY_TYPE, that was parameterized for an address range of
-- type C_IPIF_CHDMA_CHANNELS.
--------------------------------------------------------------------------------
function eff_dp(id : integer; -- The type of address range.
dep_prop : integer; -- The index of the dependent prop.
value : integer -- The value at that index.
) return integer; -- The effective value, possibly adjusted
-- if value has the default value of 0.
---) End of Dependent Properties declarations
--------------------------------------------------------------------------------
-- Declarations for Common Properties (properties that apply regardless of the
-- type of the address range). Structurally, these work the same as
-- the dependent properties.
--------------------------------------------------------------------------------
constant COMMON_PROPS_SIZE : integer := 2;
subtype COMMON_PROPS_TYPE
is INTEGER_ARRAY_TYPE(0 to COMMON_PROPS_SIZE-1);
type COMMON_PROPS_ARRAY_TYPE
is array (natural range <>) of COMMON_PROPS_TYPE;
--------------------------------------------------------------------------------
-- Below are the indices of the common properties.
--
-- These indices should be referenced only by the names below and never
-- by numerical literals.
-- IDX
---------------------------------------------------------------------------- ---
constant KEYHOLE_BURST : integer := 0;
-- 1 All addresses of a burst are forced to the initial
-- address of the burst.
-- 0 Burst addresses follow the bus protocol.
-- IP interrupt mode array constants
Constant INTR_PASS_THRU : integer := 1;
Constant INTR_PASS_THRU_INV : integer := 2;
Constant INTR_REG_EVENT : integer := 3;
Constant INTR_REG_EVENT_INV : integer := 4;
Constant INTR_POS_EDGE_DETECT : integer := 5;
Constant INTR_NEG_EDGE_DETECT : integer := 6;
end ipif_pkg;
package body ipif_pkg is
-------------------------------------------------------------------------------
-- Function log2 -- returns number of bits needed to encode x choices
-- x = 0 returns 0
-- x = 1 returns 0
-- x = 2 returns 1
-- x = 4 returns 2, etc.
-------------------------------------------------------------------------------
--
function log2(x : natural) return integer is
variable i : integer := 0;
variable val: integer := 1;
begin
if x = 0 then return 0;
else
for j in 0 to 29 loop -- for loop for XST
if val >= x then null;
else
i := i+1;
val := val*2;
end if;
end loop;
-- Fix per CR520627 XST was ignoring this anyway and printing a
-- Warning in SRP file. This will get rid of the warning and not
-- impact simulation.
-- synthesis translate_off
assert val >= x
report "Function log2 received argument larger" &
" than its capability of 2^30. "
severity failure;
-- synthesis translate_on
return i;
end if;
end function log2;
--------------------------------------------------------------------------------
-- Function clog2 - returns the integer ceiling of the base 2 logarithm of x,
-- i.e., the least integer greater than or equal to log2(x).
--------------------------------------------------------------------------------
function clog2(x : positive) return natural is
variable r : natural := 0;
variable rp : natural := 1; -- rp tracks the value 2**r
begin
while rp < x loop -- Termination condition T: x <= 2**r
-- Loop invariant L: 2**(r-1) < x
r := r + 1;
if rp > integer'high - rp then exit; end if; -- If doubling rp overflows
-- the integer range, the doubled value would exceed x, so safe to exit.
rp := rp + rp;
end loop;
-- L and T <-> 2**(r-1) < x <= 2**r <-> (r-1) < log2(x) <= r
return r; --
end clog2;
-------------------------------------------------------------------------------
-- Function Definitions
-------------------------------------------------------------------------------
-----------------------------------------------------------------------------
-- Function "="
--
-- This function can be used to overload the "=" operator when comparing
-- strings.
-----------------------------------------------------------------------------
function "=" (s1: in string; s2: in string) return boolean is
constant tc: character := ' '; -- string termination character
variable i: integer := 1;
variable v1 : string(1 to s1'length) := s1;
variable v2 : string(1 to s2'length) := s2;
begin
while (i <= v1'length) and (v1(i) /= tc) and
(i <= v2'length) and (v2(i) /= tc) and
(v1(i) = v2(i))
loop
i := i+1;
end loop;
return ((i > v1'length) or (v1(i) = tc)) and
((i > v2'length) or (v2(i) = tc));
end;
----------------------------------------------------------------------------
-- Function equaluseCase
--
-- This function returns true if case sensitive string comparison determines
-- that str1 and str2 are the same.
-----------------------------------------------------------------------------
FUNCTION equaluseCase( str1, str2 : STRING ) RETURN BOOLEAN IS
CONSTANT len1 : INTEGER := str1'length;
CONSTANT len2 : INTEGER := str2'length;
VARIABLE equal : BOOLEAN := TRUE;
BEGIN
IF NOT (len1=len2) THEN
equal := FALSE;
ELSE
FOR i IN str1'range LOOP
IF NOT (str1(i) = str2(i)) THEN
equal := FALSE;
END IF;
END LOOP;
END IF;
RETURN equal;
END equaluseCase;
-----------------------------------------------------------------------------
-- Function calc_num_ce
--
-- This function is used to process the array specifying the number of Chip
-- Enables required for a Base Address specification. The array is input to
-- the function and an integer is returned reflecting the total number of
-- Chip Enables required for the CE, RdCE, and WrCE Buses
-----------------------------------------------------------------------------
function calc_num_ce (ce_num_array : INTEGER_ARRAY_TYPE) return integer is
Variable ce_num_sum : integer := 0;
begin
for i in 0 to (ce_num_array'length)-1 loop
ce_num_sum := ce_num_sum + ce_num_array(i);
End loop;
return(ce_num_sum);
end function calc_num_ce;
-----------------------------------------------------------------------------
-- Function calc_start_ce_index
--
-- This function is used to process the array specifying the number of Chip
-- Enables required for a Base Address specification. The CE Size array is
-- input to the function and an integer index representing the index of the
-- target module in the ce_num_array. An integer is returned reflecting the
-- starting index of the assigned Chip Enables within the CE, RdCE, and
-- WrCE Buses.
-----------------------------------------------------------------------------
function calc_start_ce_index (ce_num_array : INTEGER_ARRAY_TYPE;
index : integer) return integer is
Variable ce_num_sum : integer := 0;
begin
If (index = 0) Then
ce_num_sum := 0;
else
for i in 0 to index-1 loop
ce_num_sum := ce_num_sum + ce_num_array(i);
End loop;
End if;
return(ce_num_sum);
end function calc_start_ce_index;
-----------------------------------------------------------------------------
-- Function get_min_dwidth
--
-- This function is used to process the array specifying the data bus width
-- for each of the target modules. The dwidth_array is input to the function
-- and an integer is returned that is the smallest value found of all the
-- entries in the array.
-----------------------------------------------------------------------------
function get_min_dwidth (dwidth_array: INTEGER_ARRAY_TYPE) return integer is
Variable temp_min : Integer := 1024;
begin
for i in 0 to dwidth_array'length-1 loop
If (dwidth_array(i) < temp_min) Then
temp_min := dwidth_array(i);
else
null;
End if;
End loop;
return(temp_min);
end function get_min_dwidth;
-----------------------------------------------------------------------------
-- Function get_max_dwidth
--
-- This function is used to process the array specifying the data bus width
-- for each of the target modules. The dwidth_array is input to the function
-- and an integer is returned that is the largest value found of all the
-- entries in the array.
-----------------------------------------------------------------------------
function get_max_dwidth (dwidth_array: INTEGER_ARRAY_TYPE) return integer is
Variable temp_max : Integer := 0;
begin
for i in 0 to dwidth_array'length-1 loop
If (dwidth_array(i) > temp_max) Then
temp_max := dwidth_array(i);
else
null;
End if;
End loop;
return(temp_max);
end function get_max_dwidth;
-----------------------------------------------------------------------------
-- Function S32
--
-- This function is used to expand an input string to 32 characters by
-- padding with spaces. If the input string is larger than 32 characters,
-- it will truncate to 32 characters.
-----------------------------------------------------------------------------
function S32 (in_string : string) return string is
constant OUTPUT_STRING_LENGTH : integer := 32;
Constant space : character := ' ';
variable new_string : string(1 to 32);
Variable start_index : Integer := in_string'length+1;
begin
If (in_string'length < OUTPUT_STRING_LENGTH) Then
for i in 1 to in_string'length loop
new_string(i) := in_string(i);
End loop;
for j in start_index to OUTPUT_STRING_LENGTH loop
new_string(j) := space;
End loop;
else -- use first 32 chars of in_string (truncate the rest)
for k in 1 to OUTPUT_STRING_LENGTH loop
new_string(k) := in_string(k);
End loop;
End if;
return(new_string);
end function S32;
-----------------------------------------------------------------------------
-- Function get_id_index
--
-- This function is used to process the array specifying the target function
-- assigned to a Base Address pair address range. The id_array and a
-- id number is input to the function. A integer is returned reflecting the
-- array index of the id matching the id input number. This function
-- should only be called if the id number is known to exist in the
-- name_array input. This can be detirmined by using the find_ard_id
-- function.
-----------------------------------------------------------------------------
function get_id_index (id_array :INTEGER_ARRAY_TYPE;
id : integer) return integer is
Variable match : Boolean := false;
Variable match_index : Integer := 10000; -- a really big number!
begin
for array_index in 0 to id_array'length-1 loop
If (match = true) Then -- match already found so do nothing
null;
else -- compare the numbers one by one
match := (id_array(array_index) = id);
If (match) Then
match_index := array_index;
else
null;
End if;
End if;
End loop;
return(match_index);
end function get_id_index;
--------------------------------------------------------------------------------
-- get_id_index but return a value in bounds on error (iboe).
--
-- This function is the same as get_id_index, except that when id does
-- not exist in id_array, the value returned is any index that is
-- within the index range of id_array.
--
-- This function would normally only be used where function find_ard_id
-- is used to establish the existence of id but, even when non-existent,
-- an element of one of the ARD arrays will be computed from the
-- returned get_id_index_iboe value. See, e.g., function bits_needed_for_vac
-- and the example call, below
--
-- bits_needed_for_vac(
-- find_ard_id(C_ARD_ID_ARRAY, IPIF_RDFIFO_DATA),
-- C_ARD_DEPENDENT_PROPS_ARRAY(get_id_index_iboe(C_ARD_ID_ARRAY,
-- IPIF_RDFIFO_DATA))
-- )
--------------------------------------------------------------------------------
function get_id_index_iboe (id_array :INTEGER_ARRAY_TYPE;
id : integer) return integer is
Variable match : Boolean := false;
Variable match_index : Integer := id_array'left; -- any valid array index
begin
for array_index in 0 to id_array'length-1 loop
If (match = true) Then -- match already found so do nothing
null;
else -- compare the numbers one by one
match := (id_array(array_index) = id);
If (match) Then match_index := array_index;
else null;
End if;
End if;
End loop;
return(match_index);
end function get_id_index_iboe;
-----------------------------------------------------------------------------
-- Function find_ard_id
--
-- This function is used to process the array specifying the target function
-- assigned to a Base Address pair address range. The id_array and a
-- integer id is input to the function. A boolean is returned reflecting the
-- presence (or not) of a number in the array matching the id input number.
-----------------------------------------------------------------------------
function find_ard_id (id_array : INTEGER_ARRAY_TYPE;
id : integer) return boolean is
Variable match : Boolean := false;
begin
for array_index in 0 to id_array'length-1 loop
If (match = true) Then -- match already found so do nothing
null;
else -- compare the numbers one by one
match := (id_array(array_index) = id);
End if;
End loop;
return(match);
end function find_ard_id;
-----------------------------------------------------------------------------
-- Function find_id_dwidth
--
-- This function is used to find the data width of a target module. If the
-- target module exists, the data width is extracted from the input dwidth
-- array. If the module is not in the ID array, the default input is
-- returned. This function is needed to assign data port size constraints on
-- unconstrained port widths.
-----------------------------------------------------------------------------
function find_id_dwidth (id_array : INTEGER_ARRAY_TYPE;
dwidth_array: INTEGER_ARRAY_TYPE;
id : integer;
default : integer) return integer is
Variable id_present : Boolean := false;
Variable array_index : Integer := 0;
Variable dwidth : Integer := default;
begin
id_present := find_ard_id(id_array, id);
If (id_present) Then
array_index := get_id_index (id_array, id);
dwidth := dwidth_array(array_index);
else
null; -- use default input
End if;
Return (dwidth);
end function find_id_dwidth;
-----------------------------------------------------------------------------
-- Function cnt_ipif_id_blks
--
-- This function is used to detirmine the number of IPIF components specified
-- in the ARD ID Array. An integer is returned representing the number
-- of elements counted. User IDs are ignored in the counting process.
-----------------------------------------------------------------------------
function cnt_ipif_id_blks (id_array : INTEGER_ARRAY_TYPE)
return integer is
Variable blk_count : integer := 0;
Variable temp_id : integer;
begin
for array_index in 0 to id_array'length-1 loop
temp_id := id_array(array_index);
If (temp_id = IPIF_WRFIFO_DATA or
temp_id = IPIF_RDFIFO_DATA or
temp_id = IPIF_RST or
temp_id = IPIF_INTR or
temp_id = IPIF_DMA_SG or
temp_id = IPIF_SESR_SEAR
) Then -- IPIF block found
blk_count := blk_count+1;
else -- go to next loop iteration
null;
End if;
End loop;
return(blk_count);
end function cnt_ipif_id_blks;
-----------------------------------------------------------------------------
-- Function get_ipif_id_dbus_index
--
-- This function is used to detirmine the IPIF relative index of a given
-- ID value. User IDs are ignored in the index detirmination.
-----------------------------------------------------------------------------
function get_ipif_id_dbus_index (id_array : INTEGER_ARRAY_TYPE;
id : integer)
return integer is
Variable blk_index : integer := 0;
Variable temp_id : integer;
Variable id_found : Boolean := false;
begin
for array_index in 0 to id_array'length-1 loop
temp_id := id_array(array_index);
If (id_found) then
null;
elsif (temp_id = id) then
id_found := true;
elsif (temp_id = IPIF_WRFIFO_DATA or
temp_id = IPIF_RDFIFO_DATA or
temp_id = IPIF_RST or
temp_id = IPIF_INTR or
temp_id = IPIF_DMA_SG or
temp_id = IPIF_SESR_SEAR
) Then -- IPIF block found
blk_index := blk_index+1;
else -- user block so do nothing
null;
End if;
End loop;
return(blk_index);
end function get_ipif_id_dbus_index;
------------------------------------------------------------------------------
-- Function: rebuild_slv32_array
--
-- Description:
-- This function takes an input slv32 array and rebuilds an output slv32
-- array composed of the first "num_valid_entry" elements from the input
-- array.
------------------------------------------------------------------------------
function rebuild_slv32_array (slv32_array : SLV32_ARRAY_TYPE;
num_valid_pairs : integer)
return SLV32_ARRAY_TYPE is
--Constants
constant num_elements : Integer := num_valid_pairs * 2;
-- Variables
variable temp_baseaddr32_array : SLV32_ARRAY_TYPE( 0 to num_elements-1);
begin
for array_index in 0 to num_elements-1 loop
temp_baseaddr32_array(array_index) := slv32_array(array_index);
end loop;
return(temp_baseaddr32_array);
end function rebuild_slv32_array;
------------------------------------------------------------------------------
-- Function: rebuild_slv64_array
--
-- Description:
-- This function takes an input slv64 array and rebuilds an output slv64
-- array composed of the first "num_valid_entry" elements from the input
-- array.
------------------------------------------------------------------------------
function rebuild_slv64_array (slv64_array : SLV64_ARRAY_TYPE;
num_valid_pairs : integer)
return SLV64_ARRAY_TYPE is
--Constants
constant num_elements : Integer := num_valid_pairs * 2;
-- Variables
variable temp_baseaddr64_array : SLV64_ARRAY_TYPE( 0 to num_elements-1);
begin
for array_index in 0 to num_elements-1 loop
temp_baseaddr64_array(array_index) := slv64_array(array_index);
end loop;
return(temp_baseaddr64_array);
end function rebuild_slv64_array;
------------------------------------------------------------------------------
-- Function: rebuild_int_array
--
-- Description:
-- This function takes an input integer array and rebuilds an output integer
-- array composed of the first "num_valid_entry" elements from the input
-- array.
------------------------------------------------------------------------------
function rebuild_int_array (int_array : INTEGER_ARRAY_TYPE;
num_valid_entry : integer)
return INTEGER_ARRAY_TYPE is
-- Variables
variable temp_int_array : INTEGER_ARRAY_TYPE( 0 to num_valid_entry-1);
begin
for array_index in 0 to num_valid_entry-1 loop
temp_int_array(array_index) := int_array(array_index);
end loop;
return(temp_int_array);
end function rebuild_int_array;
function bits_needed_for_vac(
fifo_present: boolean;
dependent_props : DEPENDENT_PROPS_TYPE
) return integer is
begin
if not fifo_present then
return 1; -- Zero would be better but leads to "0 to -1" null
-- ranges that are not handled by XST Flint or earlier
-- because of the negative index.
else
return
log2(1 + dependent_props(FIFO_CAPACITY_BITS) /
dependent_props(RD_WIDTH_BITS)
);
end if;
end function bits_needed_for_vac;
function bits_needed_for_occ(
fifo_present: boolean;
dependent_props : DEPENDENT_PROPS_TYPE
) return integer is
begin
if not fifo_present then
return 1; -- Zero would be better but leads to "0 to -1" null
-- ranges that are not handled by XST Flint or earlier
-- because of the negative index.
else
return
log2(1 + dependent_props(FIFO_CAPACITY_BITS) /
dependent_props(WR_WIDTH_BITS)
);
end if;
end function bits_needed_for_occ;
function eff_dp(id : integer;
dep_prop : integer;
value : integer) return integer is
variable dp : integer := dep_prop;
type bo2na_type is array (boolean) of natural;
constant bo2na : bo2na_type := (0, 1);
begin
if value /= 0 then return value; end if; -- Not default
case id is
when IPIF_CHDMA_CHANNELS =>
-------------------
return( bo2na(dp = CLK_PERIOD_PS ) * 10000
+ bo2na(dp = PACKET_WAIT_UNIT_NS ) * 1000000
+ bo2na(dp = BURST_SIZE ) * 16
);
when others => return 0;
end case;
end eff_dp;
function populate_intr_mode_array (num_user_intr : integer;
intr_capture_mode : integer)
return INTEGER_ARRAY_TYPE is
variable intr_mode_array : INTEGER_ARRAY_TYPE(0 to num_user_intr-1);
begin
for i in 0 to num_user_intr-1 loop
intr_mode_array(i) := intr_capture_mode;
end loop;
return intr_mode_array;
end function populate_intr_mode_array;
function add_intr_ard_id_array(include_intr : boolean;
ard_id_array : INTEGER_ARRAY_TYPE)
return INTEGER_ARRAY_TYPE is
variable intr_ard_id_array : INTEGER_ARRAY_TYPE(0 to ard_id_array'length);
begin
intr_ard_id_array(0 to ard_id_array'length-1) := ard_id_array;
if include_intr then
intr_ard_id_array(ard_id_array'length) := IPIF_INTR;
return intr_ard_id_array;
else
return ard_id_array;
end if;
end function add_intr_ard_id_array;
function add_intr_ard_addr_range_array(include_intr : boolean;
ZERO_ADDR_PAD : std_logic_vector;
intr_baseaddr : std_logic_vector;
intr_highaddr : std_logic_vector;
ard_id_array : INTEGER_ARRAY_TYPE;
ard_addr_range_array : SLV64_ARRAY_TYPE)
return SLV64_ARRAY_TYPE is
variable intr_ard_addr_range_array : SLV64_ARRAY_TYPE(0 to ard_addr_range_array'length+1);
begin
intr_ard_addr_range_array(0 to ard_addr_range_array'length-1) := ard_addr_range_array;
if include_intr then
intr_ard_addr_range_array(2*get_id_index(ard_id_array,IPIF_INTR))
:= ZERO_ADDR_PAD & intr_baseaddr;
intr_ard_addr_range_array(2*get_id_index(ard_id_array,IPIF_INTR)+1)
:= ZERO_ADDR_PAD & intr_highaddr;
return intr_ard_addr_range_array;
else
return ard_addr_range_array;
end if;
end function add_intr_ard_addr_range_array;
function add_intr_ard_dwidth_array(include_intr : boolean;
intr_dwidth : integer;
ard_id_array : INTEGER_ARRAY_TYPE;
ard_dwidth_array : INTEGER_ARRAY_TYPE)
return INTEGER_ARRAY_TYPE is
variable intr_ard_dwidth_array : INTEGER_ARRAY_TYPE(0 to ard_dwidth_array'length);
begin
intr_ard_dwidth_array(0 to ard_dwidth_array'length-1) := ard_dwidth_array;
if include_intr then
intr_ard_dwidth_array(get_id_index(ard_id_array, IPIF_INTR)) := intr_dwidth;
return intr_ard_dwidth_array;
else
return ard_dwidth_array;
end if;
end function add_intr_ard_dwidth_array;
function add_intr_ard_num_ce_array(include_intr : boolean;
ard_id_array : INTEGER_ARRAY_TYPE;
ard_num_ce_array : INTEGER_ARRAY_TYPE)
return INTEGER_ARRAY_TYPE is
variable intr_ard_num_ce_array : INTEGER_ARRAY_TYPE(0 to ard_num_ce_array'length);
begin
intr_ard_num_ce_array(0 to ard_num_ce_array'length-1) := ard_num_ce_array;
if include_intr then
intr_ard_num_ce_array(get_id_index(ard_id_array, IPIF_INTR)) := 16;
return intr_ard_num_ce_array;
else
return ard_num_ce_array;
end if;
end function add_intr_ard_num_ce_array;
end package body ipif_pkg;
|
-- IPIF Common Library Package
-------------------------------------------------------------------------------
--
-- *************************************************************************
-- ** **
-- ** DISCLAIMER OF LIABILITY **
-- ** **
-- ** This text/file contains proprietary, confidential **
-- ** information of Xilinx, Inc., is distributed under **
-- ** license from Xilinx, Inc., and may be used, copied **
-- ** and/or disclosed only pursuant to the terms of a valid **
-- ** license agreement with Xilinx, Inc. Xilinx hereby **
-- ** grants you a license to use this text/file solely for **
-- ** design, simulation, implementation and creation of **
-- ** design files limited to Xilinx devices or technologies. **
-- ** Use with non-Xilinx devices or technologies is expressly **
-- ** prohibited and immediately terminates your license unless **
-- ** covered by a separate agreement. **
-- ** **
-- ** Xilinx is providing this design, code, or information **
-- ** "as-is" solely for use in developing programs and **
-- ** solutions for Xilinx devices, with no obligation on the **
-- ** part of Xilinx to provide support. By providing this design, **
-- ** code, or information as one possible implementation of **
-- ** this feature, application or standard, Xilinx is making no **
-- ** representation that this implementation is free from any **
-- ** claims of infringement. You are responsible for obtaining **
-- ** any rights you may require for your implementation. **
-- ** Xilinx expressly disclaims any warranty whatsoever with **
-- ** respect to the adequacy of the implementation, including **
-- ** but not limited to any warranties or representations that this **
-- ** implementation is free from claims of infringement, implied **
-- ** warranties of merchantability or fitness for a particular **
-- ** purpose. **
-- ** **
-- ** Xilinx products are not intended for use in life support **
-- ** appliances, devices, or systems. Use in such applications is **
-- ** expressly prohibited. **
-- ** **
-- ** Any modifications that are made to the Source Code are **
-- ** done at the users sole risk and will be unsupported. **
-- ** The Xilinx Support Hotline does not have access to source **
-- ** code and therefore cannot answer specific questions related **
-- ** to source HDL. The Xilinx Hotline support of original source **
-- ** code IP shall only address issues and questions related **
-- ** to the standard Netlist version of the core (and thus **
-- ** indirectly, the original core source). **
-- ** **
-- ** Copyright (c) 2002-2010 Xilinx, Inc. All rights reserved. **
-- ** **
-- ** This copyright and support notice must be retained as part **
-- ** of this text at all times. **
-- ** **
-- *************************************************************************
--
-------------------------------------------------------------------------------
-- Filename: ipif_pkg.vhd
-- Version: Intital
-- Description: This file contains the constants and functions used in the
-- ipif common library components.
--
-------------------------------------------------------------------------------
-- Structure:
--
-------------------------------------------------------------------------------
-- Author: DET
-- History:
-- DET 02/21/02 -- Created from proc_common_pkg.vhd
--
-- DET 03/13/02 -- PLB IPIF development updates
-- ^^^^^^
-- - Commented out string types and string functions due to an XST
-- problem with string arrays and functions. THe string array
-- processing functions were replaced with comperable functions
-- operating on integer arrays.
-- ~~~~~~
--
--
-- DET 4/30/2002 Initial
-- ~~~~~~
-- - Added three functions: rebuild_slv32_array, rebuild_slv64_array, and
-- rebuild_int_array to support removal of unused elements from the
-- ARD arrays.
-- ^^^^^^ --
--
-- FLO 8/12/2002
-- ~~~~~~
-- - Added three functions: bits_needed_for_vac, bits_needed_for_occ,
-- and get_id_index_iboe.
-- (Removed provisional functions bits_needed_for_vacancy,
-- bits needed_for_occupancy, and bits_needed_for.)
-- ^^^^^^
--
-- FLO 3/24/2003
-- ~~~~~~
-- - Added dependent property paramters for channelized DMA.
-- - Added common property parameter array type.
-- - Definded the KEYHOLD_BURST common-property parameter.
-- ^^^^^^
--
-- FLO 10/22/2003
-- ~~~~~~
-- - Some adjustment to CHDMA parameterization.
-- - Cleanup of obsolete code and comments. (The former "XST workaround"
-- has become the officially deployed method.)
-- ^^^^^^
--
-- LSS 03/24/2004
-- ~~~~~~
-- - Added 5 functions
-- ^^^^^^
--
-- ALS 09/03/04
-- ^^^^^^
-- -- Added constants to describe the channel protocols used in MCH_OPB_IPIF
-- ~~~~~~
--
-- DET 1/17/2008 v4_0
-- ~~~~~~
-- - Changed proc_common library version to v4_0
-- - Incorporated new disclaimer header
-- ^^^^^^
--
-------------------------------------------------------------------------------
-- Naming Conventions:
-- active low signals: "*_n"
-- clock signals: "clk", "clk_div#", "clk_#x"
-- reset signals: "rst", "rst_n"
-- generics: "C_*"
-- user defined types: "*_TYPE"
-- state machine next state: "*_ns"
-- state machine current state: "*_cs"
-- combinatorial signals: "*_com"
-- pipelined or register delay signals: "*_d#"
-- counter signals: "*cnt*"
-- clock enable signals: "*_ce"
-- internal version of output port "*_i"
-- device pins: "*_pin"
-- ports: - Names begin with Uppercase
-- processes: "*_PROCESS"
-- component instantiations: "<ENTITY_>I_<#|FUNC>
-------------------------------------------------------------------------------
library ieee;
use ieee.std_logic_1164.all;
-- need conversion function to convert reals/integers to std logic vectors
use ieee.std_logic_arith.all;
use ieee.std_logic_arith.all;
use ieee.std_logic_unsigned.all;
package ipif_pkg is
-------------------------------------------------------------------------------
-- Type Declarations
-------------------------------------------------------------------------------
type SLV32_ARRAY_TYPE is array (natural range <>) of std_logic_vector(0 to 31);
subtype SLV64_TYPE is std_logic_vector(0 to 63);
type SLV64_ARRAY_TYPE is array (natural range <>) of SLV64_TYPE;
type INTEGER_ARRAY_TYPE is array (natural range <>) of integer;
-------------------------------------------------------------------------------
-- Function and Procedure Declarations
-------------------------------------------------------------------------------
function "=" (s1: in string; s2: in string) return boolean;
function equaluseCase( str1, str2 : STRING ) RETURN BOOLEAN;
function calc_num_ce (ce_num_array : INTEGER_ARRAY_TYPE) return integer;
function calc_start_ce_index (ce_num_array : INTEGER_ARRAY_TYPE;
index : integer) return integer;
function get_min_dwidth (dwidth_array: INTEGER_ARRAY_TYPE) return integer;
function get_max_dwidth (dwidth_array: INTEGER_ARRAY_TYPE) return integer;
function S32 (in_string : string) return string;
--------------------------------------------------------------------------------
-- ARD support functions.
-- These function can be useful when operating with the ARD parameterization.
--------------------------------------------------------------------------------
function get_id_index (id_array :INTEGER_ARRAY_TYPE;
id : integer)
return integer;
function get_id_index_iboe (id_array :INTEGER_ARRAY_TYPE;
id : integer)
return integer;
function find_ard_id (id_array : INTEGER_ARRAY_TYPE;
id : integer) return boolean;
function find_id_dwidth (id_array : INTEGER_ARRAY_TYPE;
dwidth_array: INTEGER_ARRAY_TYPE;
id : integer;
default : integer)
return integer;
function cnt_ipif_id_blks (id_array : INTEGER_ARRAY_TYPE) return integer;
function get_ipif_id_dbus_index (id_array : INTEGER_ARRAY_TYPE;
id : integer)
return integer ;
function rebuild_slv32_array (slv32_array : SLV32_ARRAY_TYPE;
num_valid_pairs : integer)
return SLV32_ARRAY_TYPE;
function rebuild_slv64_array (slv64_array : SLV64_ARRAY_TYPE;
num_valid_pairs : integer)
return SLV64_ARRAY_TYPE;
function rebuild_int_array (int_array : INTEGER_ARRAY_TYPE;
num_valid_entry : integer)
return INTEGER_ARRAY_TYPE;
-- 5 Functions Added 3/24/04
function populate_intr_mode_array (num_user_intr : integer;
intr_capture_mode : integer)
return INTEGER_ARRAY_TYPE ;
function add_intr_ard_id_array(include_intr : boolean;
ard_id_array : INTEGER_ARRAY_TYPE)
return INTEGER_ARRAY_TYPE;
function add_intr_ard_addr_range_array(include_intr : boolean;
ZERO_ADDR_PAD : std_logic_vector;
intr_baseaddr : std_logic_vector;
intr_highaddr : std_logic_vector;
ard_id_array : INTEGER_ARRAY_TYPE;
ard_addr_range_array : SLV64_ARRAY_TYPE)
return SLV64_ARRAY_TYPE;
function add_intr_ard_num_ce_array(include_intr : boolean;
ard_id_array : INTEGER_ARRAY_TYPE;
ard_num_ce_array : INTEGER_ARRAY_TYPE)
return INTEGER_ARRAY_TYPE;
function add_intr_ard_dwidth_array(include_intr : boolean;
intr_dwidth : integer;
ard_id_array : INTEGER_ARRAY_TYPE;
ard_dwidth_array : INTEGER_ARRAY_TYPE)
return INTEGER_ARRAY_TYPE;
function log2(x : natural) return integer;
function clog2(x : positive) return natural;
-------------------------------------------------------------------------------
-- Constant Declarations
-------------------------------------------------------------------------------
-------------------------------------------------------------------------------
-- Channel Protocols
-- The constant declarations below give symbolic-name aliases for values that
-- can be used in the C_MCH_PROTOCOL_ARRAY generic of the MCH_OPB_IPIF.
-------------------------------------------------------------------------------
constant XCL : integer := 0;
constant DAG : integer := 1;
--------------------------------------------------------------------------------
-- Address range types.
-- The constant declarations, below, give symbolic-name aliases for values
-- that can be used in the C_ARD_ID_ARRAY generic of IPIFs. The first set
-- gives aliases that are used to include IPIF services.
--------------------------------------------------------------------------------
-- IPIF module aliases
Constant IPIF_INTR : integer := 1;
Constant IPIF_RST : integer := 2;
Constant IPIF_SESR_SEAR : integer := 3;
Constant IPIF_DMA_SG : integer := 4;
Constant IPIF_WRFIFO_REG : integer := 5;
Constant IPIF_WRFIFO_DATA : integer := 6;
Constant IPIF_RDFIFO_REG : integer := 7;
Constant IPIF_RDFIFO_DATA : integer := 8;
Constant IPIF_CHDMA_CHANNELS : integer := 9;
Constant IPIF_CHDMA_GLOBAL_REGS : integer := 10;
Constant CHDMA_STATUS_FIFO : integer := 90;
-- Some predefined user module aliases
Constant USER_00 : integer := 100;
Constant USER_01 : integer := 101;
Constant USER_02 : integer := 102;
Constant USER_03 : integer := 103;
Constant USER_04 : integer := 104;
Constant USER_05 : integer := 105;
Constant USER_06 : integer := 106;
Constant USER_07 : integer := 107;
Constant USER_08 : integer := 108;
Constant USER_09 : integer := 109;
Constant USER_10 : integer := 110;
Constant USER_11 : integer := 111;
Constant USER_12 : integer := 112;
Constant USER_13 : integer := 113;
Constant USER_14 : integer := 114;
Constant USER_15 : integer := 115;
Constant USER_16 : integer := 116;
---( Start of Dependent Properties declarations
--------------------------------------------------------------------------------
-- Declarations for Dependent Properties (properties that depend on the type of
-- the address range, or in other words, address-range-specific parameters).
-- There is one property, i.e. one parameter, encoded as an integer at
-- each index of the properties array. There is one properties array for
-- each address range.
--
-- The C_ARD_DEPENDENT_PROPS_ARRAY generic parameter in (most) IPIFs is such
-- a properties array and it is usually giving its (static) value using a
-- VHDL aggregate construct. (--ToDo, give an example of this.)
--
-- The the "assigned" default value of a dependent property is zero. This value
-- is usually specified the aggregate by leaving its (index) name out so that
-- it is covered by an "others => 0" choice in the aggregate. Some parameters,
-- as noted in the definitions, below, have an "effective" default value that is
-- different from the assigned default value of zero. In such cases, the
-- function, eff_dp, given below, can be used to get the effective value of
-- the dependent property.
--------------------------------------------------------------------------------
constant DEPENDENT_PROPS_SIZE : integer := 32;
subtype DEPENDENT_PROPS_TYPE
is INTEGER_ARRAY_TYPE(0 to DEPENDENT_PROPS_SIZE-1);
type DEPENDENT_PROPS_ARRAY_TYPE
is array (natural range <>) of DEPENDENT_PROPS_TYPE;
--------------------------------------------------------------------------------
-- Below are the indices of dependent properties for the different types of
-- address ranges.
--
-- Example: Let C_ARD_DEPENDENT_PROPS_ARRAY hold the dependent properites
-- for a set of address ranges. Then, e.g.,
--
-- C_ARD_DEPENDENT_PROPS_ARRAY(i)(FIFO_CAPACITY_BITS)
--
-- gives the fifo capacity in bits, provided that the i'th address range
-- is of type IPIF_WRFIFO_DATA or IPIF_RDFIFO_DATA.
--
-- These indices should be referenced only by the names below and never
-- by numerical literals. (The right to change numerical index assignments
-- is reserved; applications using the names will not be affected by such
-- reassignments.)
--------------------------------------------------------------------------------
--
--ToDo, if the interrupt controller parameterization is ever moved to
-- C_ARD_DEPENDENT_PROPS_ARRAY, then the following declarations
-- could be uncommented and used.
---- IPIF_INTR IDX
---------------------------------------------------------------------------- ---
constant EXCLUDE_DEV_ISC : integer := 0;
-- 1 specifies that only the global interrupt
-- enable is present in the device interrupt source
-- controller and that the only source of interrupts
-- in the device is the IP interrupt source controller.
-- 0 specifies that the full device interrupt
-- source controller structure will be included.
constant INCLUDE_DEV_PENCODER : integer := 1;
-- 1 will include the Device IID in the device interrupt
-- source controller, 0 will exclude it.
--
-- IPIF_WRFIFO_DATA or IPIF_RDFIFO_DATA IDX
---------------------------------------------------------------------------- ---
constant FIFO_CAPACITY_BITS : integer := 0;
constant WR_WIDTH_BITS : integer := 1;
constant RD_WIDTH_BITS : integer := 2;
constant EXCLUDE_PACKET_MODE : integer := 3;
-- 1 Don't include packet mode features
-- 0 Include packet mode features
constant EXCLUDE_VACANCY : integer := 4;
-- 1 Don't include vacancy calculation
-- 0 Include vacancy calculation
-- See also the functions
-- bits_needed_for_vac and
-- bits_needed_for_occ that are declared below.
constant INCLUDE_DRE : integer := 5;
constant INCLUDE_AUTOPUSH_POP : integer := 6;
constant AUTOPUSH_POP_CE : integer := 7;
constant INCLUDE_CSUM : integer := 8;
--------------------------------------------------------------------------------
--
-- DMA_SG IDX
---------------------------------------------------------------------------- ---
--------------------------------------------------------------------------------
-- IPIF_CHDMA_CHANNELS IDX
---------------------------------------------------------------------------- ---
constant NUM_SUBS_FOR_PHYS_0 : integer :=0;
constant NUM_SUBS_FOR_PHYS_1 : integer :=1;
constant NUM_SUBS_FOR_PHYS_2 : integer :=2;
constant NUM_SUBS_FOR_PHYS_3 : integer :=3;
constant NUM_SUBS_FOR_PHYS_4 : integer :=4;
constant NUM_SUBS_FOR_PHYS_5 : integer :=5;
constant NUM_SUBS_FOR_PHYS_6 : integer :=6;
constant NUM_SUBS_FOR_PHYS_7 : integer :=7;
constant NUM_SUBS_FOR_PHYS_8 : integer :=8;
constant NUM_SUBS_FOR_PHYS_9 : integer :=9;
constant NUM_SUBS_FOR_PHYS_10 : integer :=10;
constant NUM_SUBS_FOR_PHYS_11 : integer :=11;
constant NUM_SUBS_FOR_PHYS_12 : integer :=12;
constant NUM_SUBS_FOR_PHYS_13 : integer :=13;
constant NUM_SUBS_FOR_PHYS_14 : integer :=14;
constant NUM_SUBS_FOR_PHYS_15 : integer :=15;
-- Gives the number of sub-channels for physical channel i.
--
-- These constants, which will be MAX_NUM_PHYS_CHANNELS in number (see
-- below), have consecutive values starting with 0 for
-- NUM_SUBS_FOR_PHYS_0. (The constants serve the purpose of giving symbolic
-- names for use in the dependent-properties aggregates that parameterize
-- an IPIF_CHDMA_CHANNELS address range.)
--
-- [Users can ignore this note for developers
-- If the number of physical channels changes, both the
-- IPIF_CHDMA_CHANNELS constants and MAX_NUM_PHYS_CHANNELS,
-- below, must be adjusted.
-- (Use of an array constant or a function of the form
-- NUM_SUBS_FOR_PHYS(i) to define the indices
-- runs afoul of LRM restrictions on non-locally static aggregate
-- choices. (Further, the LRM imposes perhaps unnecessarily
-- strict limits on what qualifies as a locally static primary.)
-- Note: This information is supplied for the benefit of anyone seeking
-- to improve the way that these NUM_SUBS_FOR_PHYS parameter
-- indices are defined.)
-- End of note for developers ]
--
-- The value associated with any index NUM_SUBS_FOR_PHYS_i in the
-- dependent-properties array must be even since TX and RX channels
-- come in pairs with the TX followed immediately by
-- the corresponding RX.
--
constant NUM_SIMPLE_DMA_CHANS : integer :=16;
-- The number of simple DMA channels.
constant NUM_SIMPLE_SG_CHANS : integer :=17;
-- The number of simple SG channels.
constant INTR_COALESCE : integer :=18;
-- 0 Interrupt coalescing is disabled
-- 1 Interrupt coalescing is enabled
constant CLK_PERIOD_PS : integer :=19;
-- The period of the OPB Bus clock in ps.
-- The default value of 0 is a special value that
-- is synonymous with 10000 ps (10 ns).
-- The value for CLK_PERIOD_PS is relevant only if (INTR_COALESCE = 1).
constant PACKET_WAIT_UNIT_NS : integer :=20;
-- Gives the unit for used for timing of pack-wait bounds.
-- The default value of 0 is a special value that
-- is synonymous with 1,000,000 ns (1 ms) and a non-default
-- value is typically only used for testing.
-- Relevant only if (INTR_COALESCE = 1).
constant BURST_SIZE : integer :=21;
-- 1, 2, 4, 8 or 16
-- The default value of 0 is a special value that
-- is synonymous with a burst size of 16.
-- Setting the BURST_SIZE to 1 effectively disables
-- bursts.
constant REMAINDER_AS_SINGLES : integer :=22;
-- 0 Remainder handled as a short burst
-- 1 Remainder handled as a series of singles
--------------------------------------------------------------------------------
-- The constant below is not the index of a dependent-properties
-- parameter (and, as such, would never appear as a choice in a
-- dependent-properties aggregate). Rather, it is fixed to the maximum
-- number of physical channels that an Address Range of type
-- IPIF_CHDMA_CHANNELS supports. It must be maintained in conjuction with
-- the constants named, e.g., NUM_SUBS_FOR_PHYS_15, above.
--------------------------------------------------------------------------------
constant MAX_NUM_PHYS_CHANNELS : natural := 16;
--------------------------------------------------------------------------
-- EXAMPLE: Here is an example dependent-properties aggregate for an
-- address range of type IPIF_CHDMA_CHANNELS.
-- To have a compact list of all of the CHDMA parameters, all are
-- shown, however three are commented out and the unneeded
-- MUM_SUBS_FOR_PHYS_x are excluded. The "OTHERS => 0" association
-- gives these parameters their default values, such that, for the example
--
-- - All physical channels above 2 have zero subchannels (effectively,
-- these physical channels are not used)
-- - There are no simple SG channels
-- - The packet-wait time unit is 1 ms
-- - Burst size is 16
--------------------------------------------------------------------------
-- (
-- NUM_SUBS_FOR_PHYS_0 => 8,
-- NUM_SUBS_FOR_PHYS_1 => 4,
-- NUM_SUBS_FOR_PHYS_2 => 14,
-- NUM_SIMPLE_DMA_CHANS => 1,
-- --NUM_SIMPLE_SG_CHANS => 5,
-- INTR_COALESCE => 1,
-- CLK_PERIOD_PS => 20000,
-- --PACKET_WAIT_UNIT_NS => 50000,
-- --BURST_SIZE => 1,
-- REMAINDER_AS_SINGLES => 1,
-- OTHERS => 0
-- )
--
--------------------------------------------------------------------------------
--------------------------------------------------------------------------------
-- Calculates the number of bits needed to convey the vacancy (emptiness) of
-- the fifo described by dependent_props, if fifo_present. If not fifo_present,
-- returns 0 (or the smallest value allowed by tool limitations on null arrays)
-- without making reference to dependent_props.
--------------------------------------------------------------------------------
function bits_needed_for_vac(
fifo_present: boolean;
dependent_props : DEPENDENT_PROPS_TYPE
) return integer;
--------------------------------------------------------------------------------
-- Calculates the number of bits needed to convey the occupancy (fullness) of
-- the fifo described by dependent_props, if fifo_present. If not fifo_present,
-- returns 0 (or the smallest value allowed by tool limitations on null arrays)
-- without making reference to dependent_props.
--------------------------------------------------------------------------------
function bits_needed_for_occ(
fifo_present: boolean;
dependent_props : DEPENDENT_PROPS_TYPE
) return integer;
--------------------------------------------------------------------------------
-- Function eff_dp.
--
-- For some of the dependent properties, the default value of zero is meant
-- to imply an effective default value of other than zero (see e.g.
-- PKT_WAIT_UNIT_NS for the IPIF_CHDMA_CHANNELS address-range type). The
-- following function is used to get the (possibly default-adjusted)
-- value for a dependent property.
--
-- Example call:
--
-- eff_value_of_param :=
-- eff_dp(
-- C_IPIF_CHDMA_CHANNELS,
-- PACKET_WAIT_UNIT_NS,
-- C_ARD_DEPENDENT_PROPS_ARRAY(i)(PACKET_WAIT_UNIT_NS)
-- );
--
-- where C_ARD_DEPENDENT_PROPS_ARRAY(i) is an object of type
-- DEPENDENT_PROPS_ARRAY_TYPE, that was parameterized for an address range of
-- type C_IPIF_CHDMA_CHANNELS.
--------------------------------------------------------------------------------
function eff_dp(id : integer; -- The type of address range.
dep_prop : integer; -- The index of the dependent prop.
value : integer -- The value at that index.
) return integer; -- The effective value, possibly adjusted
-- if value has the default value of 0.
---) End of Dependent Properties declarations
--------------------------------------------------------------------------------
-- Declarations for Common Properties (properties that apply regardless of the
-- type of the address range). Structurally, these work the same as
-- the dependent properties.
--------------------------------------------------------------------------------
constant COMMON_PROPS_SIZE : integer := 2;
subtype COMMON_PROPS_TYPE
is INTEGER_ARRAY_TYPE(0 to COMMON_PROPS_SIZE-1);
type COMMON_PROPS_ARRAY_TYPE
is array (natural range <>) of COMMON_PROPS_TYPE;
--------------------------------------------------------------------------------
-- Below are the indices of the common properties.
--
-- These indices should be referenced only by the names below and never
-- by numerical literals.
-- IDX
---------------------------------------------------------------------------- ---
constant KEYHOLE_BURST : integer := 0;
-- 1 All addresses of a burst are forced to the initial
-- address of the burst.
-- 0 Burst addresses follow the bus protocol.
-- IP interrupt mode array constants
Constant INTR_PASS_THRU : integer := 1;
Constant INTR_PASS_THRU_INV : integer := 2;
Constant INTR_REG_EVENT : integer := 3;
Constant INTR_REG_EVENT_INV : integer := 4;
Constant INTR_POS_EDGE_DETECT : integer := 5;
Constant INTR_NEG_EDGE_DETECT : integer := 6;
end ipif_pkg;
package body ipif_pkg is
-------------------------------------------------------------------------------
-- Function log2 -- returns number of bits needed to encode x choices
-- x = 0 returns 0
-- x = 1 returns 0
-- x = 2 returns 1
-- x = 4 returns 2, etc.
-------------------------------------------------------------------------------
--
function log2(x : natural) return integer is
variable i : integer := 0;
variable val: integer := 1;
begin
if x = 0 then return 0;
else
for j in 0 to 29 loop -- for loop for XST
if val >= x then null;
else
i := i+1;
val := val*2;
end if;
end loop;
-- Fix per CR520627 XST was ignoring this anyway and printing a
-- Warning in SRP file. This will get rid of the warning and not
-- impact simulation.
-- synthesis translate_off
assert val >= x
report "Function log2 received argument larger" &
" than its capability of 2^30. "
severity failure;
-- synthesis translate_on
return i;
end if;
end function log2;
--------------------------------------------------------------------------------
-- Function clog2 - returns the integer ceiling of the base 2 logarithm of x,
-- i.e., the least integer greater than or equal to log2(x).
--------------------------------------------------------------------------------
function clog2(x : positive) return natural is
variable r : natural := 0;
variable rp : natural := 1; -- rp tracks the value 2**r
begin
while rp < x loop -- Termination condition T: x <= 2**r
-- Loop invariant L: 2**(r-1) < x
r := r + 1;
if rp > integer'high - rp then exit; end if; -- If doubling rp overflows
-- the integer range, the doubled value would exceed x, so safe to exit.
rp := rp + rp;
end loop;
-- L and T <-> 2**(r-1) < x <= 2**r <-> (r-1) < log2(x) <= r
return r; --
end clog2;
-------------------------------------------------------------------------------
-- Function Definitions
-------------------------------------------------------------------------------
-----------------------------------------------------------------------------
-- Function "="
--
-- This function can be used to overload the "=" operator when comparing
-- strings.
-----------------------------------------------------------------------------
function "=" (s1: in string; s2: in string) return boolean is
constant tc: character := ' '; -- string termination character
variable i: integer := 1;
variable v1 : string(1 to s1'length) := s1;
variable v2 : string(1 to s2'length) := s2;
begin
while (i <= v1'length) and (v1(i) /= tc) and
(i <= v2'length) and (v2(i) /= tc) and
(v1(i) = v2(i))
loop
i := i+1;
end loop;
return ((i > v1'length) or (v1(i) = tc)) and
((i > v2'length) or (v2(i) = tc));
end;
----------------------------------------------------------------------------
-- Function equaluseCase
--
-- This function returns true if case sensitive string comparison determines
-- that str1 and str2 are the same.
-----------------------------------------------------------------------------
FUNCTION equaluseCase( str1, str2 : STRING ) RETURN BOOLEAN IS
CONSTANT len1 : INTEGER := str1'length;
CONSTANT len2 : INTEGER := str2'length;
VARIABLE equal : BOOLEAN := TRUE;
BEGIN
IF NOT (len1=len2) THEN
equal := FALSE;
ELSE
FOR i IN str1'range LOOP
IF NOT (str1(i) = str2(i)) THEN
equal := FALSE;
END IF;
END LOOP;
END IF;
RETURN equal;
END equaluseCase;
-----------------------------------------------------------------------------
-- Function calc_num_ce
--
-- This function is used to process the array specifying the number of Chip
-- Enables required for a Base Address specification. The array is input to
-- the function and an integer is returned reflecting the total number of
-- Chip Enables required for the CE, RdCE, and WrCE Buses
-----------------------------------------------------------------------------
function calc_num_ce (ce_num_array : INTEGER_ARRAY_TYPE) return integer is
Variable ce_num_sum : integer := 0;
begin
for i in 0 to (ce_num_array'length)-1 loop
ce_num_sum := ce_num_sum + ce_num_array(i);
End loop;
return(ce_num_sum);
end function calc_num_ce;
-----------------------------------------------------------------------------
-- Function calc_start_ce_index
--
-- This function is used to process the array specifying the number of Chip
-- Enables required for a Base Address specification. The CE Size array is
-- input to the function and an integer index representing the index of the
-- target module in the ce_num_array. An integer is returned reflecting the
-- starting index of the assigned Chip Enables within the CE, RdCE, and
-- WrCE Buses.
-----------------------------------------------------------------------------
function calc_start_ce_index (ce_num_array : INTEGER_ARRAY_TYPE;
index : integer) return integer is
Variable ce_num_sum : integer := 0;
begin
If (index = 0) Then
ce_num_sum := 0;
else
for i in 0 to index-1 loop
ce_num_sum := ce_num_sum + ce_num_array(i);
End loop;
End if;
return(ce_num_sum);
end function calc_start_ce_index;
-----------------------------------------------------------------------------
-- Function get_min_dwidth
--
-- This function is used to process the array specifying the data bus width
-- for each of the target modules. The dwidth_array is input to the function
-- and an integer is returned that is the smallest value found of all the
-- entries in the array.
-----------------------------------------------------------------------------
function get_min_dwidth (dwidth_array: INTEGER_ARRAY_TYPE) return integer is
Variable temp_min : Integer := 1024;
begin
for i in 0 to dwidth_array'length-1 loop
If (dwidth_array(i) < temp_min) Then
temp_min := dwidth_array(i);
else
null;
End if;
End loop;
return(temp_min);
end function get_min_dwidth;
-----------------------------------------------------------------------------
-- Function get_max_dwidth
--
-- This function is used to process the array specifying the data bus width
-- for each of the target modules. The dwidth_array is input to the function
-- and an integer is returned that is the largest value found of all the
-- entries in the array.
-----------------------------------------------------------------------------
function get_max_dwidth (dwidth_array: INTEGER_ARRAY_TYPE) return integer is
Variable temp_max : Integer := 0;
begin
for i in 0 to dwidth_array'length-1 loop
If (dwidth_array(i) > temp_max) Then
temp_max := dwidth_array(i);
else
null;
End if;
End loop;
return(temp_max);
end function get_max_dwidth;
-----------------------------------------------------------------------------
-- Function S32
--
-- This function is used to expand an input string to 32 characters by
-- padding with spaces. If the input string is larger than 32 characters,
-- it will truncate to 32 characters.
-----------------------------------------------------------------------------
function S32 (in_string : string) return string is
constant OUTPUT_STRING_LENGTH : integer := 32;
Constant space : character := ' ';
variable new_string : string(1 to 32);
Variable start_index : Integer := in_string'length+1;
begin
If (in_string'length < OUTPUT_STRING_LENGTH) Then
for i in 1 to in_string'length loop
new_string(i) := in_string(i);
End loop;
for j in start_index to OUTPUT_STRING_LENGTH loop
new_string(j) := space;
End loop;
else -- use first 32 chars of in_string (truncate the rest)
for k in 1 to OUTPUT_STRING_LENGTH loop
new_string(k) := in_string(k);
End loop;
End if;
return(new_string);
end function S32;
-----------------------------------------------------------------------------
-- Function get_id_index
--
-- This function is used to process the array specifying the target function
-- assigned to a Base Address pair address range. The id_array and a
-- id number is input to the function. A integer is returned reflecting the
-- array index of the id matching the id input number. This function
-- should only be called if the id number is known to exist in the
-- name_array input. This can be detirmined by using the find_ard_id
-- function.
-----------------------------------------------------------------------------
function get_id_index (id_array :INTEGER_ARRAY_TYPE;
id : integer) return integer is
Variable match : Boolean := false;
Variable match_index : Integer := 10000; -- a really big number!
begin
for array_index in 0 to id_array'length-1 loop
If (match = true) Then -- match already found so do nothing
null;
else -- compare the numbers one by one
match := (id_array(array_index) = id);
If (match) Then
match_index := array_index;
else
null;
End if;
End if;
End loop;
return(match_index);
end function get_id_index;
--------------------------------------------------------------------------------
-- get_id_index but return a value in bounds on error (iboe).
--
-- This function is the same as get_id_index, except that when id does
-- not exist in id_array, the value returned is any index that is
-- within the index range of id_array.
--
-- This function would normally only be used where function find_ard_id
-- is used to establish the existence of id but, even when non-existent,
-- an element of one of the ARD arrays will be computed from the
-- returned get_id_index_iboe value. See, e.g., function bits_needed_for_vac
-- and the example call, below
--
-- bits_needed_for_vac(
-- find_ard_id(C_ARD_ID_ARRAY, IPIF_RDFIFO_DATA),
-- C_ARD_DEPENDENT_PROPS_ARRAY(get_id_index_iboe(C_ARD_ID_ARRAY,
-- IPIF_RDFIFO_DATA))
-- )
--------------------------------------------------------------------------------
function get_id_index_iboe (id_array :INTEGER_ARRAY_TYPE;
id : integer) return integer is
Variable match : Boolean := false;
Variable match_index : Integer := id_array'left; -- any valid array index
begin
for array_index in 0 to id_array'length-1 loop
If (match = true) Then -- match already found so do nothing
null;
else -- compare the numbers one by one
match := (id_array(array_index) = id);
If (match) Then match_index := array_index;
else null;
End if;
End if;
End loop;
return(match_index);
end function get_id_index_iboe;
-----------------------------------------------------------------------------
-- Function find_ard_id
--
-- This function is used to process the array specifying the target function
-- assigned to a Base Address pair address range. The id_array and a
-- integer id is input to the function. A boolean is returned reflecting the
-- presence (or not) of a number in the array matching the id input number.
-----------------------------------------------------------------------------
function find_ard_id (id_array : INTEGER_ARRAY_TYPE;
id : integer) return boolean is
Variable match : Boolean := false;
begin
for array_index in 0 to id_array'length-1 loop
If (match = true) Then -- match already found so do nothing
null;
else -- compare the numbers one by one
match := (id_array(array_index) = id);
End if;
End loop;
return(match);
end function find_ard_id;
-----------------------------------------------------------------------------
-- Function find_id_dwidth
--
-- This function is used to find the data width of a target module. If the
-- target module exists, the data width is extracted from the input dwidth
-- array. If the module is not in the ID array, the default input is
-- returned. This function is needed to assign data port size constraints on
-- unconstrained port widths.
-----------------------------------------------------------------------------
function find_id_dwidth (id_array : INTEGER_ARRAY_TYPE;
dwidth_array: INTEGER_ARRAY_TYPE;
id : integer;
default : integer) return integer is
Variable id_present : Boolean := false;
Variable array_index : Integer := 0;
Variable dwidth : Integer := default;
begin
id_present := find_ard_id(id_array, id);
If (id_present) Then
array_index := get_id_index (id_array, id);
dwidth := dwidth_array(array_index);
else
null; -- use default input
End if;
Return (dwidth);
end function find_id_dwidth;
-----------------------------------------------------------------------------
-- Function cnt_ipif_id_blks
--
-- This function is used to detirmine the number of IPIF components specified
-- in the ARD ID Array. An integer is returned representing the number
-- of elements counted. User IDs are ignored in the counting process.
-----------------------------------------------------------------------------
function cnt_ipif_id_blks (id_array : INTEGER_ARRAY_TYPE)
return integer is
Variable blk_count : integer := 0;
Variable temp_id : integer;
begin
for array_index in 0 to id_array'length-1 loop
temp_id := id_array(array_index);
If (temp_id = IPIF_WRFIFO_DATA or
temp_id = IPIF_RDFIFO_DATA or
temp_id = IPIF_RST or
temp_id = IPIF_INTR or
temp_id = IPIF_DMA_SG or
temp_id = IPIF_SESR_SEAR
) Then -- IPIF block found
blk_count := blk_count+1;
else -- go to next loop iteration
null;
End if;
End loop;
return(blk_count);
end function cnt_ipif_id_blks;
-----------------------------------------------------------------------------
-- Function get_ipif_id_dbus_index
--
-- This function is used to detirmine the IPIF relative index of a given
-- ID value. User IDs are ignored in the index detirmination.
-----------------------------------------------------------------------------
function get_ipif_id_dbus_index (id_array : INTEGER_ARRAY_TYPE;
id : integer)
return integer is
Variable blk_index : integer := 0;
Variable temp_id : integer;
Variable id_found : Boolean := false;
begin
for array_index in 0 to id_array'length-1 loop
temp_id := id_array(array_index);
If (id_found) then
null;
elsif (temp_id = id) then
id_found := true;
elsif (temp_id = IPIF_WRFIFO_DATA or
temp_id = IPIF_RDFIFO_DATA or
temp_id = IPIF_RST or
temp_id = IPIF_INTR or
temp_id = IPIF_DMA_SG or
temp_id = IPIF_SESR_SEAR
) Then -- IPIF block found
blk_index := blk_index+1;
else -- user block so do nothing
null;
End if;
End loop;
return(blk_index);
end function get_ipif_id_dbus_index;
------------------------------------------------------------------------------
-- Function: rebuild_slv32_array
--
-- Description:
-- This function takes an input slv32 array and rebuilds an output slv32
-- array composed of the first "num_valid_entry" elements from the input
-- array.
------------------------------------------------------------------------------
function rebuild_slv32_array (slv32_array : SLV32_ARRAY_TYPE;
num_valid_pairs : integer)
return SLV32_ARRAY_TYPE is
--Constants
constant num_elements : Integer := num_valid_pairs * 2;
-- Variables
variable temp_baseaddr32_array : SLV32_ARRAY_TYPE( 0 to num_elements-1);
begin
for array_index in 0 to num_elements-1 loop
temp_baseaddr32_array(array_index) := slv32_array(array_index);
end loop;
return(temp_baseaddr32_array);
end function rebuild_slv32_array;
------------------------------------------------------------------------------
-- Function: rebuild_slv64_array
--
-- Description:
-- This function takes an input slv64 array and rebuilds an output slv64
-- array composed of the first "num_valid_entry" elements from the input
-- array.
------------------------------------------------------------------------------
function rebuild_slv64_array (slv64_array : SLV64_ARRAY_TYPE;
num_valid_pairs : integer)
return SLV64_ARRAY_TYPE is
--Constants
constant num_elements : Integer := num_valid_pairs * 2;
-- Variables
variable temp_baseaddr64_array : SLV64_ARRAY_TYPE( 0 to num_elements-1);
begin
for array_index in 0 to num_elements-1 loop
temp_baseaddr64_array(array_index) := slv64_array(array_index);
end loop;
return(temp_baseaddr64_array);
end function rebuild_slv64_array;
------------------------------------------------------------------------------
-- Function: rebuild_int_array
--
-- Description:
-- This function takes an input integer array and rebuilds an output integer
-- array composed of the first "num_valid_entry" elements from the input
-- array.
------------------------------------------------------------------------------
function rebuild_int_array (int_array : INTEGER_ARRAY_TYPE;
num_valid_entry : integer)
return INTEGER_ARRAY_TYPE is
-- Variables
variable temp_int_array : INTEGER_ARRAY_TYPE( 0 to num_valid_entry-1);
begin
for array_index in 0 to num_valid_entry-1 loop
temp_int_array(array_index) := int_array(array_index);
end loop;
return(temp_int_array);
end function rebuild_int_array;
function bits_needed_for_vac(
fifo_present: boolean;
dependent_props : DEPENDENT_PROPS_TYPE
) return integer is
begin
if not fifo_present then
return 1; -- Zero would be better but leads to "0 to -1" null
-- ranges that are not handled by XST Flint or earlier
-- because of the negative index.
else
return
log2(1 + dependent_props(FIFO_CAPACITY_BITS) /
dependent_props(RD_WIDTH_BITS)
);
end if;
end function bits_needed_for_vac;
function bits_needed_for_occ(
fifo_present: boolean;
dependent_props : DEPENDENT_PROPS_TYPE
) return integer is
begin
if not fifo_present then
return 1; -- Zero would be better but leads to "0 to -1" null
-- ranges that are not handled by XST Flint or earlier
-- because of the negative index.
else
return
log2(1 + dependent_props(FIFO_CAPACITY_BITS) /
dependent_props(WR_WIDTH_BITS)
);
end if;
end function bits_needed_for_occ;
function eff_dp(id : integer;
dep_prop : integer;
value : integer) return integer is
variable dp : integer := dep_prop;
type bo2na_type is array (boolean) of natural;
constant bo2na : bo2na_type := (0, 1);
begin
if value /= 0 then return value; end if; -- Not default
case id is
when IPIF_CHDMA_CHANNELS =>
-------------------
return( bo2na(dp = CLK_PERIOD_PS ) * 10000
+ bo2na(dp = PACKET_WAIT_UNIT_NS ) * 1000000
+ bo2na(dp = BURST_SIZE ) * 16
);
when others => return 0;
end case;
end eff_dp;
function populate_intr_mode_array (num_user_intr : integer;
intr_capture_mode : integer)
return INTEGER_ARRAY_TYPE is
variable intr_mode_array : INTEGER_ARRAY_TYPE(0 to num_user_intr-1);
begin
for i in 0 to num_user_intr-1 loop
intr_mode_array(i) := intr_capture_mode;
end loop;
return intr_mode_array;
end function populate_intr_mode_array;
function add_intr_ard_id_array(include_intr : boolean;
ard_id_array : INTEGER_ARRAY_TYPE)
return INTEGER_ARRAY_TYPE is
variable intr_ard_id_array : INTEGER_ARRAY_TYPE(0 to ard_id_array'length);
begin
intr_ard_id_array(0 to ard_id_array'length-1) := ard_id_array;
if include_intr then
intr_ard_id_array(ard_id_array'length) := IPIF_INTR;
return intr_ard_id_array;
else
return ard_id_array;
end if;
end function add_intr_ard_id_array;
function add_intr_ard_addr_range_array(include_intr : boolean;
ZERO_ADDR_PAD : std_logic_vector;
intr_baseaddr : std_logic_vector;
intr_highaddr : std_logic_vector;
ard_id_array : INTEGER_ARRAY_TYPE;
ard_addr_range_array : SLV64_ARRAY_TYPE)
return SLV64_ARRAY_TYPE is
variable intr_ard_addr_range_array : SLV64_ARRAY_TYPE(0 to ard_addr_range_array'length+1);
begin
intr_ard_addr_range_array(0 to ard_addr_range_array'length-1) := ard_addr_range_array;
if include_intr then
intr_ard_addr_range_array(2*get_id_index(ard_id_array,IPIF_INTR))
:= ZERO_ADDR_PAD & intr_baseaddr;
intr_ard_addr_range_array(2*get_id_index(ard_id_array,IPIF_INTR)+1)
:= ZERO_ADDR_PAD & intr_highaddr;
return intr_ard_addr_range_array;
else
return ard_addr_range_array;
end if;
end function add_intr_ard_addr_range_array;
function add_intr_ard_dwidth_array(include_intr : boolean;
intr_dwidth : integer;
ard_id_array : INTEGER_ARRAY_TYPE;
ard_dwidth_array : INTEGER_ARRAY_TYPE)
return INTEGER_ARRAY_TYPE is
variable intr_ard_dwidth_array : INTEGER_ARRAY_TYPE(0 to ard_dwidth_array'length);
begin
intr_ard_dwidth_array(0 to ard_dwidth_array'length-1) := ard_dwidth_array;
if include_intr then
intr_ard_dwidth_array(get_id_index(ard_id_array, IPIF_INTR)) := intr_dwidth;
return intr_ard_dwidth_array;
else
return ard_dwidth_array;
end if;
end function add_intr_ard_dwidth_array;
function add_intr_ard_num_ce_array(include_intr : boolean;
ard_id_array : INTEGER_ARRAY_TYPE;
ard_num_ce_array : INTEGER_ARRAY_TYPE)
return INTEGER_ARRAY_TYPE is
variable intr_ard_num_ce_array : INTEGER_ARRAY_TYPE(0 to ard_num_ce_array'length);
begin
intr_ard_num_ce_array(0 to ard_num_ce_array'length-1) := ard_num_ce_array;
if include_intr then
intr_ard_num_ce_array(get_id_index(ard_id_array, IPIF_INTR)) := 16;
return intr_ard_num_ce_array;
else
return ard_num_ce_array;
end if;
end function add_intr_ard_num_ce_array;
end package body ipif_pkg;
|
-- IPIF Common Library Package
-------------------------------------------------------------------------------
--
-- *************************************************************************
-- ** **
-- ** DISCLAIMER OF LIABILITY **
-- ** **
-- ** This text/file contains proprietary, confidential **
-- ** information of Xilinx, Inc., is distributed under **
-- ** license from Xilinx, Inc., and may be used, copied **
-- ** and/or disclosed only pursuant to the terms of a valid **
-- ** license agreement with Xilinx, Inc. Xilinx hereby **
-- ** grants you a license to use this text/file solely for **
-- ** design, simulation, implementation and creation of **
-- ** design files limited to Xilinx devices or technologies. **
-- ** Use with non-Xilinx devices or technologies is expressly **
-- ** prohibited and immediately terminates your license unless **
-- ** covered by a separate agreement. **
-- ** **
-- ** Xilinx is providing this design, code, or information **
-- ** "as-is" solely for use in developing programs and **
-- ** solutions for Xilinx devices, with no obligation on the **
-- ** part of Xilinx to provide support. By providing this design, **
-- ** code, or information as one possible implementation of **
-- ** this feature, application or standard, Xilinx is making no **
-- ** representation that this implementation is free from any **
-- ** claims of infringement. You are responsible for obtaining **
-- ** any rights you may require for your implementation. **
-- ** Xilinx expressly disclaims any warranty whatsoever with **
-- ** respect to the adequacy of the implementation, including **
-- ** but not limited to any warranties or representations that this **
-- ** implementation is free from claims of infringement, implied **
-- ** warranties of merchantability or fitness for a particular **
-- ** purpose. **
-- ** **
-- ** Xilinx products are not intended for use in life support **
-- ** appliances, devices, or systems. Use in such applications is **
-- ** expressly prohibited. **
-- ** **
-- ** Any modifications that are made to the Source Code are **
-- ** done at the users sole risk and will be unsupported. **
-- ** The Xilinx Support Hotline does not have access to source **
-- ** code and therefore cannot answer specific questions related **
-- ** to source HDL. The Xilinx Hotline support of original source **
-- ** code IP shall only address issues and questions related **
-- ** to the standard Netlist version of the core (and thus **
-- ** indirectly, the original core source). **
-- ** **
-- ** Copyright (c) 2002-2010 Xilinx, Inc. All rights reserved. **
-- ** **
-- ** This copyright and support notice must be retained as part **
-- ** of this text at all times. **
-- ** **
-- *************************************************************************
--
-------------------------------------------------------------------------------
-- Filename: ipif_pkg.vhd
-- Version: Intital
-- Description: This file contains the constants and functions used in the
-- ipif common library components.
--
-------------------------------------------------------------------------------
-- Structure:
--
-------------------------------------------------------------------------------
-- Author: DET
-- History:
-- DET 02/21/02 -- Created from proc_common_pkg.vhd
--
-- DET 03/13/02 -- PLB IPIF development updates
-- ^^^^^^
-- - Commented out string types and string functions due to an XST
-- problem with string arrays and functions. THe string array
-- processing functions were replaced with comperable functions
-- operating on integer arrays.
-- ~~~~~~
--
--
-- DET 4/30/2002 Initial
-- ~~~~~~
-- - Added three functions: rebuild_slv32_array, rebuild_slv64_array, and
-- rebuild_int_array to support removal of unused elements from the
-- ARD arrays.
-- ^^^^^^ --
--
-- FLO 8/12/2002
-- ~~~~~~
-- - Added three functions: bits_needed_for_vac, bits_needed_for_occ,
-- and get_id_index_iboe.
-- (Removed provisional functions bits_needed_for_vacancy,
-- bits needed_for_occupancy, and bits_needed_for.)
-- ^^^^^^
--
-- FLO 3/24/2003
-- ~~~~~~
-- - Added dependent property paramters for channelized DMA.
-- - Added common property parameter array type.
-- - Definded the KEYHOLD_BURST common-property parameter.
-- ^^^^^^
--
-- FLO 10/22/2003
-- ~~~~~~
-- - Some adjustment to CHDMA parameterization.
-- - Cleanup of obsolete code and comments. (The former "XST workaround"
-- has become the officially deployed method.)
-- ^^^^^^
--
-- LSS 03/24/2004
-- ~~~~~~
-- - Added 5 functions
-- ^^^^^^
--
-- ALS 09/03/04
-- ^^^^^^
-- -- Added constants to describe the channel protocols used in MCH_OPB_IPIF
-- ~~~~~~
--
-- DET 1/17/2008 v4_0
-- ~~~~~~
-- - Changed proc_common library version to v4_0
-- - Incorporated new disclaimer header
-- ^^^^^^
--
-------------------------------------------------------------------------------
-- Naming Conventions:
-- active low signals: "*_n"
-- clock signals: "clk", "clk_div#", "clk_#x"
-- reset signals: "rst", "rst_n"
-- generics: "C_*"
-- user defined types: "*_TYPE"
-- state machine next state: "*_ns"
-- state machine current state: "*_cs"
-- combinatorial signals: "*_com"
-- pipelined or register delay signals: "*_d#"
-- counter signals: "*cnt*"
-- clock enable signals: "*_ce"
-- internal version of output port "*_i"
-- device pins: "*_pin"
-- ports: - Names begin with Uppercase
-- processes: "*_PROCESS"
-- component instantiations: "<ENTITY_>I_<#|FUNC>
-------------------------------------------------------------------------------
library ieee;
use ieee.std_logic_1164.all;
-- need conversion function to convert reals/integers to std logic vectors
use ieee.std_logic_arith.all;
use ieee.std_logic_arith.all;
use ieee.std_logic_unsigned.all;
package ipif_pkg is
-------------------------------------------------------------------------------
-- Type Declarations
-------------------------------------------------------------------------------
type SLV32_ARRAY_TYPE is array (natural range <>) of std_logic_vector(0 to 31);
subtype SLV64_TYPE is std_logic_vector(0 to 63);
type SLV64_ARRAY_TYPE is array (natural range <>) of SLV64_TYPE;
type INTEGER_ARRAY_TYPE is array (natural range <>) of integer;
-------------------------------------------------------------------------------
-- Function and Procedure Declarations
-------------------------------------------------------------------------------
function "=" (s1: in string; s2: in string) return boolean;
function equaluseCase( str1, str2 : STRING ) RETURN BOOLEAN;
function calc_num_ce (ce_num_array : INTEGER_ARRAY_TYPE) return integer;
function calc_start_ce_index (ce_num_array : INTEGER_ARRAY_TYPE;
index : integer) return integer;
function get_min_dwidth (dwidth_array: INTEGER_ARRAY_TYPE) return integer;
function get_max_dwidth (dwidth_array: INTEGER_ARRAY_TYPE) return integer;
function S32 (in_string : string) return string;
--------------------------------------------------------------------------------
-- ARD support functions.
-- These function can be useful when operating with the ARD parameterization.
--------------------------------------------------------------------------------
function get_id_index (id_array :INTEGER_ARRAY_TYPE;
id : integer)
return integer;
function get_id_index_iboe (id_array :INTEGER_ARRAY_TYPE;
id : integer)
return integer;
function find_ard_id (id_array : INTEGER_ARRAY_TYPE;
id : integer) return boolean;
function find_id_dwidth (id_array : INTEGER_ARRAY_TYPE;
dwidth_array: INTEGER_ARRAY_TYPE;
id : integer;
default : integer)
return integer;
function cnt_ipif_id_blks (id_array : INTEGER_ARRAY_TYPE) return integer;
function get_ipif_id_dbus_index (id_array : INTEGER_ARRAY_TYPE;
id : integer)
return integer ;
function rebuild_slv32_array (slv32_array : SLV32_ARRAY_TYPE;
num_valid_pairs : integer)
return SLV32_ARRAY_TYPE;
function rebuild_slv64_array (slv64_array : SLV64_ARRAY_TYPE;
num_valid_pairs : integer)
return SLV64_ARRAY_TYPE;
function rebuild_int_array (int_array : INTEGER_ARRAY_TYPE;
num_valid_entry : integer)
return INTEGER_ARRAY_TYPE;
-- 5 Functions Added 3/24/04
function populate_intr_mode_array (num_user_intr : integer;
intr_capture_mode : integer)
return INTEGER_ARRAY_TYPE ;
function add_intr_ard_id_array(include_intr : boolean;
ard_id_array : INTEGER_ARRAY_TYPE)
return INTEGER_ARRAY_TYPE;
function add_intr_ard_addr_range_array(include_intr : boolean;
ZERO_ADDR_PAD : std_logic_vector;
intr_baseaddr : std_logic_vector;
intr_highaddr : std_logic_vector;
ard_id_array : INTEGER_ARRAY_TYPE;
ard_addr_range_array : SLV64_ARRAY_TYPE)
return SLV64_ARRAY_TYPE;
function add_intr_ard_num_ce_array(include_intr : boolean;
ard_id_array : INTEGER_ARRAY_TYPE;
ard_num_ce_array : INTEGER_ARRAY_TYPE)
return INTEGER_ARRAY_TYPE;
function add_intr_ard_dwidth_array(include_intr : boolean;
intr_dwidth : integer;
ard_id_array : INTEGER_ARRAY_TYPE;
ard_dwidth_array : INTEGER_ARRAY_TYPE)
return INTEGER_ARRAY_TYPE;
function log2(x : natural) return integer;
function clog2(x : positive) return natural;
-------------------------------------------------------------------------------
-- Constant Declarations
-------------------------------------------------------------------------------
-------------------------------------------------------------------------------
-- Channel Protocols
-- The constant declarations below give symbolic-name aliases for values that
-- can be used in the C_MCH_PROTOCOL_ARRAY generic of the MCH_OPB_IPIF.
-------------------------------------------------------------------------------
constant XCL : integer := 0;
constant DAG : integer := 1;
--------------------------------------------------------------------------------
-- Address range types.
-- The constant declarations, below, give symbolic-name aliases for values
-- that can be used in the C_ARD_ID_ARRAY generic of IPIFs. The first set
-- gives aliases that are used to include IPIF services.
--------------------------------------------------------------------------------
-- IPIF module aliases
Constant IPIF_INTR : integer := 1;
Constant IPIF_RST : integer := 2;
Constant IPIF_SESR_SEAR : integer := 3;
Constant IPIF_DMA_SG : integer := 4;
Constant IPIF_WRFIFO_REG : integer := 5;
Constant IPIF_WRFIFO_DATA : integer := 6;
Constant IPIF_RDFIFO_REG : integer := 7;
Constant IPIF_RDFIFO_DATA : integer := 8;
Constant IPIF_CHDMA_CHANNELS : integer := 9;
Constant IPIF_CHDMA_GLOBAL_REGS : integer := 10;
Constant CHDMA_STATUS_FIFO : integer := 90;
-- Some predefined user module aliases
Constant USER_00 : integer := 100;
Constant USER_01 : integer := 101;
Constant USER_02 : integer := 102;
Constant USER_03 : integer := 103;
Constant USER_04 : integer := 104;
Constant USER_05 : integer := 105;
Constant USER_06 : integer := 106;
Constant USER_07 : integer := 107;
Constant USER_08 : integer := 108;
Constant USER_09 : integer := 109;
Constant USER_10 : integer := 110;
Constant USER_11 : integer := 111;
Constant USER_12 : integer := 112;
Constant USER_13 : integer := 113;
Constant USER_14 : integer := 114;
Constant USER_15 : integer := 115;
Constant USER_16 : integer := 116;
---( Start of Dependent Properties declarations
--------------------------------------------------------------------------------
-- Declarations for Dependent Properties (properties that depend on the type of
-- the address range, or in other words, address-range-specific parameters).
-- There is one property, i.e. one parameter, encoded as an integer at
-- each index of the properties array. There is one properties array for
-- each address range.
--
-- The C_ARD_DEPENDENT_PROPS_ARRAY generic parameter in (most) IPIFs is such
-- a properties array and it is usually giving its (static) value using a
-- VHDL aggregate construct. (--ToDo, give an example of this.)
--
-- The the "assigned" default value of a dependent property is zero. This value
-- is usually specified the aggregate by leaving its (index) name out so that
-- it is covered by an "others => 0" choice in the aggregate. Some parameters,
-- as noted in the definitions, below, have an "effective" default value that is
-- different from the assigned default value of zero. In such cases, the
-- function, eff_dp, given below, can be used to get the effective value of
-- the dependent property.
--------------------------------------------------------------------------------
constant DEPENDENT_PROPS_SIZE : integer := 32;
subtype DEPENDENT_PROPS_TYPE
is INTEGER_ARRAY_TYPE(0 to DEPENDENT_PROPS_SIZE-1);
type DEPENDENT_PROPS_ARRAY_TYPE
is array (natural range <>) of DEPENDENT_PROPS_TYPE;
--------------------------------------------------------------------------------
-- Below are the indices of dependent properties for the different types of
-- address ranges.
--
-- Example: Let C_ARD_DEPENDENT_PROPS_ARRAY hold the dependent properites
-- for a set of address ranges. Then, e.g.,
--
-- C_ARD_DEPENDENT_PROPS_ARRAY(i)(FIFO_CAPACITY_BITS)
--
-- gives the fifo capacity in bits, provided that the i'th address range
-- is of type IPIF_WRFIFO_DATA or IPIF_RDFIFO_DATA.
--
-- These indices should be referenced only by the names below and never
-- by numerical literals. (The right to change numerical index assignments
-- is reserved; applications using the names will not be affected by such
-- reassignments.)
--------------------------------------------------------------------------------
--
--ToDo, if the interrupt controller parameterization is ever moved to
-- C_ARD_DEPENDENT_PROPS_ARRAY, then the following declarations
-- could be uncommented and used.
---- IPIF_INTR IDX
---------------------------------------------------------------------------- ---
constant EXCLUDE_DEV_ISC : integer := 0;
-- 1 specifies that only the global interrupt
-- enable is present in the device interrupt source
-- controller and that the only source of interrupts
-- in the device is the IP interrupt source controller.
-- 0 specifies that the full device interrupt
-- source controller structure will be included.
constant INCLUDE_DEV_PENCODER : integer := 1;
-- 1 will include the Device IID in the device interrupt
-- source controller, 0 will exclude it.
--
-- IPIF_WRFIFO_DATA or IPIF_RDFIFO_DATA IDX
---------------------------------------------------------------------------- ---
constant FIFO_CAPACITY_BITS : integer := 0;
constant WR_WIDTH_BITS : integer := 1;
constant RD_WIDTH_BITS : integer := 2;
constant EXCLUDE_PACKET_MODE : integer := 3;
-- 1 Don't include packet mode features
-- 0 Include packet mode features
constant EXCLUDE_VACANCY : integer := 4;
-- 1 Don't include vacancy calculation
-- 0 Include vacancy calculation
-- See also the functions
-- bits_needed_for_vac and
-- bits_needed_for_occ that are declared below.
constant INCLUDE_DRE : integer := 5;
constant INCLUDE_AUTOPUSH_POP : integer := 6;
constant AUTOPUSH_POP_CE : integer := 7;
constant INCLUDE_CSUM : integer := 8;
--------------------------------------------------------------------------------
--
-- DMA_SG IDX
---------------------------------------------------------------------------- ---
--------------------------------------------------------------------------------
-- IPIF_CHDMA_CHANNELS IDX
---------------------------------------------------------------------------- ---
constant NUM_SUBS_FOR_PHYS_0 : integer :=0;
constant NUM_SUBS_FOR_PHYS_1 : integer :=1;
constant NUM_SUBS_FOR_PHYS_2 : integer :=2;
constant NUM_SUBS_FOR_PHYS_3 : integer :=3;
constant NUM_SUBS_FOR_PHYS_4 : integer :=4;
constant NUM_SUBS_FOR_PHYS_5 : integer :=5;
constant NUM_SUBS_FOR_PHYS_6 : integer :=6;
constant NUM_SUBS_FOR_PHYS_7 : integer :=7;
constant NUM_SUBS_FOR_PHYS_8 : integer :=8;
constant NUM_SUBS_FOR_PHYS_9 : integer :=9;
constant NUM_SUBS_FOR_PHYS_10 : integer :=10;
constant NUM_SUBS_FOR_PHYS_11 : integer :=11;
constant NUM_SUBS_FOR_PHYS_12 : integer :=12;
constant NUM_SUBS_FOR_PHYS_13 : integer :=13;
constant NUM_SUBS_FOR_PHYS_14 : integer :=14;
constant NUM_SUBS_FOR_PHYS_15 : integer :=15;
-- Gives the number of sub-channels for physical channel i.
--
-- These constants, which will be MAX_NUM_PHYS_CHANNELS in number (see
-- below), have consecutive values starting with 0 for
-- NUM_SUBS_FOR_PHYS_0. (The constants serve the purpose of giving symbolic
-- names for use in the dependent-properties aggregates that parameterize
-- an IPIF_CHDMA_CHANNELS address range.)
--
-- [Users can ignore this note for developers
-- If the number of physical channels changes, both the
-- IPIF_CHDMA_CHANNELS constants and MAX_NUM_PHYS_CHANNELS,
-- below, must be adjusted.
-- (Use of an array constant or a function of the form
-- NUM_SUBS_FOR_PHYS(i) to define the indices
-- runs afoul of LRM restrictions on non-locally static aggregate
-- choices. (Further, the LRM imposes perhaps unnecessarily
-- strict limits on what qualifies as a locally static primary.)
-- Note: This information is supplied for the benefit of anyone seeking
-- to improve the way that these NUM_SUBS_FOR_PHYS parameter
-- indices are defined.)
-- End of note for developers ]
--
-- The value associated with any index NUM_SUBS_FOR_PHYS_i in the
-- dependent-properties array must be even since TX and RX channels
-- come in pairs with the TX followed immediately by
-- the corresponding RX.
--
constant NUM_SIMPLE_DMA_CHANS : integer :=16;
-- The number of simple DMA channels.
constant NUM_SIMPLE_SG_CHANS : integer :=17;
-- The number of simple SG channels.
constant INTR_COALESCE : integer :=18;
-- 0 Interrupt coalescing is disabled
-- 1 Interrupt coalescing is enabled
constant CLK_PERIOD_PS : integer :=19;
-- The period of the OPB Bus clock in ps.
-- The default value of 0 is a special value that
-- is synonymous with 10000 ps (10 ns).
-- The value for CLK_PERIOD_PS is relevant only if (INTR_COALESCE = 1).
constant PACKET_WAIT_UNIT_NS : integer :=20;
-- Gives the unit for used for timing of pack-wait bounds.
-- The default value of 0 is a special value that
-- is synonymous with 1,000,000 ns (1 ms) and a non-default
-- value is typically only used for testing.
-- Relevant only if (INTR_COALESCE = 1).
constant BURST_SIZE : integer :=21;
-- 1, 2, 4, 8 or 16
-- The default value of 0 is a special value that
-- is synonymous with a burst size of 16.
-- Setting the BURST_SIZE to 1 effectively disables
-- bursts.
constant REMAINDER_AS_SINGLES : integer :=22;
-- 0 Remainder handled as a short burst
-- 1 Remainder handled as a series of singles
--------------------------------------------------------------------------------
-- The constant below is not the index of a dependent-properties
-- parameter (and, as such, would never appear as a choice in a
-- dependent-properties aggregate). Rather, it is fixed to the maximum
-- number of physical channels that an Address Range of type
-- IPIF_CHDMA_CHANNELS supports. It must be maintained in conjuction with
-- the constants named, e.g., NUM_SUBS_FOR_PHYS_15, above.
--------------------------------------------------------------------------------
constant MAX_NUM_PHYS_CHANNELS : natural := 16;
--------------------------------------------------------------------------
-- EXAMPLE: Here is an example dependent-properties aggregate for an
-- address range of type IPIF_CHDMA_CHANNELS.
-- To have a compact list of all of the CHDMA parameters, all are
-- shown, however three are commented out and the unneeded
-- MUM_SUBS_FOR_PHYS_x are excluded. The "OTHERS => 0" association
-- gives these parameters their default values, such that, for the example
--
-- - All physical channels above 2 have zero subchannels (effectively,
-- these physical channels are not used)
-- - There are no simple SG channels
-- - The packet-wait time unit is 1 ms
-- - Burst size is 16
--------------------------------------------------------------------------
-- (
-- NUM_SUBS_FOR_PHYS_0 => 8,
-- NUM_SUBS_FOR_PHYS_1 => 4,
-- NUM_SUBS_FOR_PHYS_2 => 14,
-- NUM_SIMPLE_DMA_CHANS => 1,
-- --NUM_SIMPLE_SG_CHANS => 5,
-- INTR_COALESCE => 1,
-- CLK_PERIOD_PS => 20000,
-- --PACKET_WAIT_UNIT_NS => 50000,
-- --BURST_SIZE => 1,
-- REMAINDER_AS_SINGLES => 1,
-- OTHERS => 0
-- )
--
--------------------------------------------------------------------------------
--------------------------------------------------------------------------------
-- Calculates the number of bits needed to convey the vacancy (emptiness) of
-- the fifo described by dependent_props, if fifo_present. If not fifo_present,
-- returns 0 (or the smallest value allowed by tool limitations on null arrays)
-- without making reference to dependent_props.
--------------------------------------------------------------------------------
function bits_needed_for_vac(
fifo_present: boolean;
dependent_props : DEPENDENT_PROPS_TYPE
) return integer;
--------------------------------------------------------------------------------
-- Calculates the number of bits needed to convey the occupancy (fullness) of
-- the fifo described by dependent_props, if fifo_present. If not fifo_present,
-- returns 0 (or the smallest value allowed by tool limitations on null arrays)
-- without making reference to dependent_props.
--------------------------------------------------------------------------------
function bits_needed_for_occ(
fifo_present: boolean;
dependent_props : DEPENDENT_PROPS_TYPE
) return integer;
--------------------------------------------------------------------------------
-- Function eff_dp.
--
-- For some of the dependent properties, the default value of zero is meant
-- to imply an effective default value of other than zero (see e.g.
-- PKT_WAIT_UNIT_NS for the IPIF_CHDMA_CHANNELS address-range type). The
-- following function is used to get the (possibly default-adjusted)
-- value for a dependent property.
--
-- Example call:
--
-- eff_value_of_param :=
-- eff_dp(
-- C_IPIF_CHDMA_CHANNELS,
-- PACKET_WAIT_UNIT_NS,
-- C_ARD_DEPENDENT_PROPS_ARRAY(i)(PACKET_WAIT_UNIT_NS)
-- );
--
-- where C_ARD_DEPENDENT_PROPS_ARRAY(i) is an object of type
-- DEPENDENT_PROPS_ARRAY_TYPE, that was parameterized for an address range of
-- type C_IPIF_CHDMA_CHANNELS.
--------------------------------------------------------------------------------
function eff_dp(id : integer; -- The type of address range.
dep_prop : integer; -- The index of the dependent prop.
value : integer -- The value at that index.
) return integer; -- The effective value, possibly adjusted
-- if value has the default value of 0.
---) End of Dependent Properties declarations
--------------------------------------------------------------------------------
-- Declarations for Common Properties (properties that apply regardless of the
-- type of the address range). Structurally, these work the same as
-- the dependent properties.
--------------------------------------------------------------------------------
constant COMMON_PROPS_SIZE : integer := 2;
subtype COMMON_PROPS_TYPE
is INTEGER_ARRAY_TYPE(0 to COMMON_PROPS_SIZE-1);
type COMMON_PROPS_ARRAY_TYPE
is array (natural range <>) of COMMON_PROPS_TYPE;
--------------------------------------------------------------------------------
-- Below are the indices of the common properties.
--
-- These indices should be referenced only by the names below and never
-- by numerical literals.
-- IDX
---------------------------------------------------------------------------- ---
constant KEYHOLE_BURST : integer := 0;
-- 1 All addresses of a burst are forced to the initial
-- address of the burst.
-- 0 Burst addresses follow the bus protocol.
-- IP interrupt mode array constants
Constant INTR_PASS_THRU : integer := 1;
Constant INTR_PASS_THRU_INV : integer := 2;
Constant INTR_REG_EVENT : integer := 3;
Constant INTR_REG_EVENT_INV : integer := 4;
Constant INTR_POS_EDGE_DETECT : integer := 5;
Constant INTR_NEG_EDGE_DETECT : integer := 6;
end ipif_pkg;
package body ipif_pkg is
-------------------------------------------------------------------------------
-- Function log2 -- returns number of bits needed to encode x choices
-- x = 0 returns 0
-- x = 1 returns 0
-- x = 2 returns 1
-- x = 4 returns 2, etc.
-------------------------------------------------------------------------------
--
function log2(x : natural) return integer is
variable i : integer := 0;
variable val: integer := 1;
begin
if x = 0 then return 0;
else
for j in 0 to 29 loop -- for loop for XST
if val >= x then null;
else
i := i+1;
val := val*2;
end if;
end loop;
-- Fix per CR520627 XST was ignoring this anyway and printing a
-- Warning in SRP file. This will get rid of the warning and not
-- impact simulation.
-- synthesis translate_off
assert val >= x
report "Function log2 received argument larger" &
" than its capability of 2^30. "
severity failure;
-- synthesis translate_on
return i;
end if;
end function log2;
--------------------------------------------------------------------------------
-- Function clog2 - returns the integer ceiling of the base 2 logarithm of x,
-- i.e., the least integer greater than or equal to log2(x).
--------------------------------------------------------------------------------
function clog2(x : positive) return natural is
variable r : natural := 0;
variable rp : natural := 1; -- rp tracks the value 2**r
begin
while rp < x loop -- Termination condition T: x <= 2**r
-- Loop invariant L: 2**(r-1) < x
r := r + 1;
if rp > integer'high - rp then exit; end if; -- If doubling rp overflows
-- the integer range, the doubled value would exceed x, so safe to exit.
rp := rp + rp;
end loop;
-- L and T <-> 2**(r-1) < x <= 2**r <-> (r-1) < log2(x) <= r
return r; --
end clog2;
-------------------------------------------------------------------------------
-- Function Definitions
-------------------------------------------------------------------------------
-----------------------------------------------------------------------------
-- Function "="
--
-- This function can be used to overload the "=" operator when comparing
-- strings.
-----------------------------------------------------------------------------
function "=" (s1: in string; s2: in string) return boolean is
constant tc: character := ' '; -- string termination character
variable i: integer := 1;
variable v1 : string(1 to s1'length) := s1;
variable v2 : string(1 to s2'length) := s2;
begin
while (i <= v1'length) and (v1(i) /= tc) and
(i <= v2'length) and (v2(i) /= tc) and
(v1(i) = v2(i))
loop
i := i+1;
end loop;
return ((i > v1'length) or (v1(i) = tc)) and
((i > v2'length) or (v2(i) = tc));
end;
----------------------------------------------------------------------------
-- Function equaluseCase
--
-- This function returns true if case sensitive string comparison determines
-- that str1 and str2 are the same.
-----------------------------------------------------------------------------
FUNCTION equaluseCase( str1, str2 : STRING ) RETURN BOOLEAN IS
CONSTANT len1 : INTEGER := str1'length;
CONSTANT len2 : INTEGER := str2'length;
VARIABLE equal : BOOLEAN := TRUE;
BEGIN
IF NOT (len1=len2) THEN
equal := FALSE;
ELSE
FOR i IN str1'range LOOP
IF NOT (str1(i) = str2(i)) THEN
equal := FALSE;
END IF;
END LOOP;
END IF;
RETURN equal;
END equaluseCase;
-----------------------------------------------------------------------------
-- Function calc_num_ce
--
-- This function is used to process the array specifying the number of Chip
-- Enables required for a Base Address specification. The array is input to
-- the function and an integer is returned reflecting the total number of
-- Chip Enables required for the CE, RdCE, and WrCE Buses
-----------------------------------------------------------------------------
function calc_num_ce (ce_num_array : INTEGER_ARRAY_TYPE) return integer is
Variable ce_num_sum : integer := 0;
begin
for i in 0 to (ce_num_array'length)-1 loop
ce_num_sum := ce_num_sum + ce_num_array(i);
End loop;
return(ce_num_sum);
end function calc_num_ce;
-----------------------------------------------------------------------------
-- Function calc_start_ce_index
--
-- This function is used to process the array specifying the number of Chip
-- Enables required for a Base Address specification. The CE Size array is
-- input to the function and an integer index representing the index of the
-- target module in the ce_num_array. An integer is returned reflecting the
-- starting index of the assigned Chip Enables within the CE, RdCE, and
-- WrCE Buses.
-----------------------------------------------------------------------------
function calc_start_ce_index (ce_num_array : INTEGER_ARRAY_TYPE;
index : integer) return integer is
Variable ce_num_sum : integer := 0;
begin
If (index = 0) Then
ce_num_sum := 0;
else
for i in 0 to index-1 loop
ce_num_sum := ce_num_sum + ce_num_array(i);
End loop;
End if;
return(ce_num_sum);
end function calc_start_ce_index;
-----------------------------------------------------------------------------
-- Function get_min_dwidth
--
-- This function is used to process the array specifying the data bus width
-- for each of the target modules. The dwidth_array is input to the function
-- and an integer is returned that is the smallest value found of all the
-- entries in the array.
-----------------------------------------------------------------------------
function get_min_dwidth (dwidth_array: INTEGER_ARRAY_TYPE) return integer is
Variable temp_min : Integer := 1024;
begin
for i in 0 to dwidth_array'length-1 loop
If (dwidth_array(i) < temp_min) Then
temp_min := dwidth_array(i);
else
null;
End if;
End loop;
return(temp_min);
end function get_min_dwidth;
-----------------------------------------------------------------------------
-- Function get_max_dwidth
--
-- This function is used to process the array specifying the data bus width
-- for each of the target modules. The dwidth_array is input to the function
-- and an integer is returned that is the largest value found of all the
-- entries in the array.
-----------------------------------------------------------------------------
function get_max_dwidth (dwidth_array: INTEGER_ARRAY_TYPE) return integer is
Variable temp_max : Integer := 0;
begin
for i in 0 to dwidth_array'length-1 loop
If (dwidth_array(i) > temp_max) Then
temp_max := dwidth_array(i);
else
null;
End if;
End loop;
return(temp_max);
end function get_max_dwidth;
-----------------------------------------------------------------------------
-- Function S32
--
-- This function is used to expand an input string to 32 characters by
-- padding with spaces. If the input string is larger than 32 characters,
-- it will truncate to 32 characters.
-----------------------------------------------------------------------------
function S32 (in_string : string) return string is
constant OUTPUT_STRING_LENGTH : integer := 32;
Constant space : character := ' ';
variable new_string : string(1 to 32);
Variable start_index : Integer := in_string'length+1;
begin
If (in_string'length < OUTPUT_STRING_LENGTH) Then
for i in 1 to in_string'length loop
new_string(i) := in_string(i);
End loop;
for j in start_index to OUTPUT_STRING_LENGTH loop
new_string(j) := space;
End loop;
else -- use first 32 chars of in_string (truncate the rest)
for k in 1 to OUTPUT_STRING_LENGTH loop
new_string(k) := in_string(k);
End loop;
End if;
return(new_string);
end function S32;
-----------------------------------------------------------------------------
-- Function get_id_index
--
-- This function is used to process the array specifying the target function
-- assigned to a Base Address pair address range. The id_array and a
-- id number is input to the function. A integer is returned reflecting the
-- array index of the id matching the id input number. This function
-- should only be called if the id number is known to exist in the
-- name_array input. This can be detirmined by using the find_ard_id
-- function.
-----------------------------------------------------------------------------
function get_id_index (id_array :INTEGER_ARRAY_TYPE;
id : integer) return integer is
Variable match : Boolean := false;
Variable match_index : Integer := 10000; -- a really big number!
begin
for array_index in 0 to id_array'length-1 loop
If (match = true) Then -- match already found so do nothing
null;
else -- compare the numbers one by one
match := (id_array(array_index) = id);
If (match) Then
match_index := array_index;
else
null;
End if;
End if;
End loop;
return(match_index);
end function get_id_index;
--------------------------------------------------------------------------------
-- get_id_index but return a value in bounds on error (iboe).
--
-- This function is the same as get_id_index, except that when id does
-- not exist in id_array, the value returned is any index that is
-- within the index range of id_array.
--
-- This function would normally only be used where function find_ard_id
-- is used to establish the existence of id but, even when non-existent,
-- an element of one of the ARD arrays will be computed from the
-- returned get_id_index_iboe value. See, e.g., function bits_needed_for_vac
-- and the example call, below
--
-- bits_needed_for_vac(
-- find_ard_id(C_ARD_ID_ARRAY, IPIF_RDFIFO_DATA),
-- C_ARD_DEPENDENT_PROPS_ARRAY(get_id_index_iboe(C_ARD_ID_ARRAY,
-- IPIF_RDFIFO_DATA))
-- )
--------------------------------------------------------------------------------
function get_id_index_iboe (id_array :INTEGER_ARRAY_TYPE;
id : integer) return integer is
Variable match : Boolean := false;
Variable match_index : Integer := id_array'left; -- any valid array index
begin
for array_index in 0 to id_array'length-1 loop
If (match = true) Then -- match already found so do nothing
null;
else -- compare the numbers one by one
match := (id_array(array_index) = id);
If (match) Then match_index := array_index;
else null;
End if;
End if;
End loop;
return(match_index);
end function get_id_index_iboe;
-----------------------------------------------------------------------------
-- Function find_ard_id
--
-- This function is used to process the array specifying the target function
-- assigned to a Base Address pair address range. The id_array and a
-- integer id is input to the function. A boolean is returned reflecting the
-- presence (or not) of a number in the array matching the id input number.
-----------------------------------------------------------------------------
function find_ard_id (id_array : INTEGER_ARRAY_TYPE;
id : integer) return boolean is
Variable match : Boolean := false;
begin
for array_index in 0 to id_array'length-1 loop
If (match = true) Then -- match already found so do nothing
null;
else -- compare the numbers one by one
match := (id_array(array_index) = id);
End if;
End loop;
return(match);
end function find_ard_id;
-----------------------------------------------------------------------------
-- Function find_id_dwidth
--
-- This function is used to find the data width of a target module. If the
-- target module exists, the data width is extracted from the input dwidth
-- array. If the module is not in the ID array, the default input is
-- returned. This function is needed to assign data port size constraints on
-- unconstrained port widths.
-----------------------------------------------------------------------------
function find_id_dwidth (id_array : INTEGER_ARRAY_TYPE;
dwidth_array: INTEGER_ARRAY_TYPE;
id : integer;
default : integer) return integer is
Variable id_present : Boolean := false;
Variable array_index : Integer := 0;
Variable dwidth : Integer := default;
begin
id_present := find_ard_id(id_array, id);
If (id_present) Then
array_index := get_id_index (id_array, id);
dwidth := dwidth_array(array_index);
else
null; -- use default input
End if;
Return (dwidth);
end function find_id_dwidth;
-----------------------------------------------------------------------------
-- Function cnt_ipif_id_blks
--
-- This function is used to detirmine the number of IPIF components specified
-- in the ARD ID Array. An integer is returned representing the number
-- of elements counted. User IDs are ignored in the counting process.
-----------------------------------------------------------------------------
function cnt_ipif_id_blks (id_array : INTEGER_ARRAY_TYPE)
return integer is
Variable blk_count : integer := 0;
Variable temp_id : integer;
begin
for array_index in 0 to id_array'length-1 loop
temp_id := id_array(array_index);
If (temp_id = IPIF_WRFIFO_DATA or
temp_id = IPIF_RDFIFO_DATA or
temp_id = IPIF_RST or
temp_id = IPIF_INTR or
temp_id = IPIF_DMA_SG or
temp_id = IPIF_SESR_SEAR
) Then -- IPIF block found
blk_count := blk_count+1;
else -- go to next loop iteration
null;
End if;
End loop;
return(blk_count);
end function cnt_ipif_id_blks;
-----------------------------------------------------------------------------
-- Function get_ipif_id_dbus_index
--
-- This function is used to detirmine the IPIF relative index of a given
-- ID value. User IDs are ignored in the index detirmination.
-----------------------------------------------------------------------------
function get_ipif_id_dbus_index (id_array : INTEGER_ARRAY_TYPE;
id : integer)
return integer is
Variable blk_index : integer := 0;
Variable temp_id : integer;
Variable id_found : Boolean := false;
begin
for array_index in 0 to id_array'length-1 loop
temp_id := id_array(array_index);
If (id_found) then
null;
elsif (temp_id = id) then
id_found := true;
elsif (temp_id = IPIF_WRFIFO_DATA or
temp_id = IPIF_RDFIFO_DATA or
temp_id = IPIF_RST or
temp_id = IPIF_INTR or
temp_id = IPIF_DMA_SG or
temp_id = IPIF_SESR_SEAR
) Then -- IPIF block found
blk_index := blk_index+1;
else -- user block so do nothing
null;
End if;
End loop;
return(blk_index);
end function get_ipif_id_dbus_index;
------------------------------------------------------------------------------
-- Function: rebuild_slv32_array
--
-- Description:
-- This function takes an input slv32 array and rebuilds an output slv32
-- array composed of the first "num_valid_entry" elements from the input
-- array.
------------------------------------------------------------------------------
function rebuild_slv32_array (slv32_array : SLV32_ARRAY_TYPE;
num_valid_pairs : integer)
return SLV32_ARRAY_TYPE is
--Constants
constant num_elements : Integer := num_valid_pairs * 2;
-- Variables
variable temp_baseaddr32_array : SLV32_ARRAY_TYPE( 0 to num_elements-1);
begin
for array_index in 0 to num_elements-1 loop
temp_baseaddr32_array(array_index) := slv32_array(array_index);
end loop;
return(temp_baseaddr32_array);
end function rebuild_slv32_array;
------------------------------------------------------------------------------
-- Function: rebuild_slv64_array
--
-- Description:
-- This function takes an input slv64 array and rebuilds an output slv64
-- array composed of the first "num_valid_entry" elements from the input
-- array.
------------------------------------------------------------------------------
function rebuild_slv64_array (slv64_array : SLV64_ARRAY_TYPE;
num_valid_pairs : integer)
return SLV64_ARRAY_TYPE is
--Constants
constant num_elements : Integer := num_valid_pairs * 2;
-- Variables
variable temp_baseaddr64_array : SLV64_ARRAY_TYPE( 0 to num_elements-1);
begin
for array_index in 0 to num_elements-1 loop
temp_baseaddr64_array(array_index) := slv64_array(array_index);
end loop;
return(temp_baseaddr64_array);
end function rebuild_slv64_array;
------------------------------------------------------------------------------
-- Function: rebuild_int_array
--
-- Description:
-- This function takes an input integer array and rebuilds an output integer
-- array composed of the first "num_valid_entry" elements from the input
-- array.
------------------------------------------------------------------------------
function rebuild_int_array (int_array : INTEGER_ARRAY_TYPE;
num_valid_entry : integer)
return INTEGER_ARRAY_TYPE is
-- Variables
variable temp_int_array : INTEGER_ARRAY_TYPE( 0 to num_valid_entry-1);
begin
for array_index in 0 to num_valid_entry-1 loop
temp_int_array(array_index) := int_array(array_index);
end loop;
return(temp_int_array);
end function rebuild_int_array;
function bits_needed_for_vac(
fifo_present: boolean;
dependent_props : DEPENDENT_PROPS_TYPE
) return integer is
begin
if not fifo_present then
return 1; -- Zero would be better but leads to "0 to -1" null
-- ranges that are not handled by XST Flint or earlier
-- because of the negative index.
else
return
log2(1 + dependent_props(FIFO_CAPACITY_BITS) /
dependent_props(RD_WIDTH_BITS)
);
end if;
end function bits_needed_for_vac;
function bits_needed_for_occ(
fifo_present: boolean;
dependent_props : DEPENDENT_PROPS_TYPE
) return integer is
begin
if not fifo_present then
return 1; -- Zero would be better but leads to "0 to -1" null
-- ranges that are not handled by XST Flint or earlier
-- because of the negative index.
else
return
log2(1 + dependent_props(FIFO_CAPACITY_BITS) /
dependent_props(WR_WIDTH_BITS)
);
end if;
end function bits_needed_for_occ;
function eff_dp(id : integer;
dep_prop : integer;
value : integer) return integer is
variable dp : integer := dep_prop;
type bo2na_type is array (boolean) of natural;
constant bo2na : bo2na_type := (0, 1);
begin
if value /= 0 then return value; end if; -- Not default
case id is
when IPIF_CHDMA_CHANNELS =>
-------------------
return( bo2na(dp = CLK_PERIOD_PS ) * 10000
+ bo2na(dp = PACKET_WAIT_UNIT_NS ) * 1000000
+ bo2na(dp = BURST_SIZE ) * 16
);
when others => return 0;
end case;
end eff_dp;
function populate_intr_mode_array (num_user_intr : integer;
intr_capture_mode : integer)
return INTEGER_ARRAY_TYPE is
variable intr_mode_array : INTEGER_ARRAY_TYPE(0 to num_user_intr-1);
begin
for i in 0 to num_user_intr-1 loop
intr_mode_array(i) := intr_capture_mode;
end loop;
return intr_mode_array;
end function populate_intr_mode_array;
function add_intr_ard_id_array(include_intr : boolean;
ard_id_array : INTEGER_ARRAY_TYPE)
return INTEGER_ARRAY_TYPE is
variable intr_ard_id_array : INTEGER_ARRAY_TYPE(0 to ard_id_array'length);
begin
intr_ard_id_array(0 to ard_id_array'length-1) := ard_id_array;
if include_intr then
intr_ard_id_array(ard_id_array'length) := IPIF_INTR;
return intr_ard_id_array;
else
return ard_id_array;
end if;
end function add_intr_ard_id_array;
function add_intr_ard_addr_range_array(include_intr : boolean;
ZERO_ADDR_PAD : std_logic_vector;
intr_baseaddr : std_logic_vector;
intr_highaddr : std_logic_vector;
ard_id_array : INTEGER_ARRAY_TYPE;
ard_addr_range_array : SLV64_ARRAY_TYPE)
return SLV64_ARRAY_TYPE is
variable intr_ard_addr_range_array : SLV64_ARRAY_TYPE(0 to ard_addr_range_array'length+1);
begin
intr_ard_addr_range_array(0 to ard_addr_range_array'length-1) := ard_addr_range_array;
if include_intr then
intr_ard_addr_range_array(2*get_id_index(ard_id_array,IPIF_INTR))
:= ZERO_ADDR_PAD & intr_baseaddr;
intr_ard_addr_range_array(2*get_id_index(ard_id_array,IPIF_INTR)+1)
:= ZERO_ADDR_PAD & intr_highaddr;
return intr_ard_addr_range_array;
else
return ard_addr_range_array;
end if;
end function add_intr_ard_addr_range_array;
function add_intr_ard_dwidth_array(include_intr : boolean;
intr_dwidth : integer;
ard_id_array : INTEGER_ARRAY_TYPE;
ard_dwidth_array : INTEGER_ARRAY_TYPE)
return INTEGER_ARRAY_TYPE is
variable intr_ard_dwidth_array : INTEGER_ARRAY_TYPE(0 to ard_dwidth_array'length);
begin
intr_ard_dwidth_array(0 to ard_dwidth_array'length-1) := ard_dwidth_array;
if include_intr then
intr_ard_dwidth_array(get_id_index(ard_id_array, IPIF_INTR)) := intr_dwidth;
return intr_ard_dwidth_array;
else
return ard_dwidth_array;
end if;
end function add_intr_ard_dwidth_array;
function add_intr_ard_num_ce_array(include_intr : boolean;
ard_id_array : INTEGER_ARRAY_TYPE;
ard_num_ce_array : INTEGER_ARRAY_TYPE)
return INTEGER_ARRAY_TYPE is
variable intr_ard_num_ce_array : INTEGER_ARRAY_TYPE(0 to ard_num_ce_array'length);
begin
intr_ard_num_ce_array(0 to ard_num_ce_array'length-1) := ard_num_ce_array;
if include_intr then
intr_ard_num_ce_array(get_id_index(ard_id_array, IPIF_INTR)) := 16;
return intr_ard_num_ce_array;
else
return ard_num_ce_array;
end if;
end function add_intr_ard_num_ce_array;
end package body ipif_pkg;
|
-- IPIF Common Library Package
-------------------------------------------------------------------------------
--
-- *************************************************************************
-- ** **
-- ** DISCLAIMER OF LIABILITY **
-- ** **
-- ** This text/file contains proprietary, confidential **
-- ** information of Xilinx, Inc., is distributed under **
-- ** license from Xilinx, Inc., and may be used, copied **
-- ** and/or disclosed only pursuant to the terms of a valid **
-- ** license agreement with Xilinx, Inc. Xilinx hereby **
-- ** grants you a license to use this text/file solely for **
-- ** design, simulation, implementation and creation of **
-- ** design files limited to Xilinx devices or technologies. **
-- ** Use with non-Xilinx devices or technologies is expressly **
-- ** prohibited and immediately terminates your license unless **
-- ** covered by a separate agreement. **
-- ** **
-- ** Xilinx is providing this design, code, or information **
-- ** "as-is" solely for use in developing programs and **
-- ** solutions for Xilinx devices, with no obligation on the **
-- ** part of Xilinx to provide support. By providing this design, **
-- ** code, or information as one possible implementation of **
-- ** this feature, application or standard, Xilinx is making no **
-- ** representation that this implementation is free from any **
-- ** claims of infringement. You are responsible for obtaining **
-- ** any rights you may require for your implementation. **
-- ** Xilinx expressly disclaims any warranty whatsoever with **
-- ** respect to the adequacy of the implementation, including **
-- ** but not limited to any warranties or representations that this **
-- ** implementation is free from claims of infringement, implied **
-- ** warranties of merchantability or fitness for a particular **
-- ** purpose. **
-- ** **
-- ** Xilinx products are not intended for use in life support **
-- ** appliances, devices, or systems. Use in such applications is **
-- ** expressly prohibited. **
-- ** **
-- ** Any modifications that are made to the Source Code are **
-- ** done at the users sole risk and will be unsupported. **
-- ** The Xilinx Support Hotline does not have access to source **
-- ** code and therefore cannot answer specific questions related **
-- ** to source HDL. The Xilinx Hotline support of original source **
-- ** code IP shall only address issues and questions related **
-- ** to the standard Netlist version of the core (and thus **
-- ** indirectly, the original core source). **
-- ** **
-- ** Copyright (c) 2002-2010 Xilinx, Inc. All rights reserved. **
-- ** **
-- ** This copyright and support notice must be retained as part **
-- ** of this text at all times. **
-- ** **
-- *************************************************************************
--
-------------------------------------------------------------------------------
-- Filename: ipif_pkg.vhd
-- Version: Intital
-- Description: This file contains the constants and functions used in the
-- ipif common library components.
--
-------------------------------------------------------------------------------
-- Structure:
--
-------------------------------------------------------------------------------
-- Author: DET
-- History:
-- DET 02/21/02 -- Created from proc_common_pkg.vhd
--
-- DET 03/13/02 -- PLB IPIF development updates
-- ^^^^^^
-- - Commented out string types and string functions due to an XST
-- problem with string arrays and functions. THe string array
-- processing functions were replaced with comperable functions
-- operating on integer arrays.
-- ~~~~~~
--
--
-- DET 4/30/2002 Initial
-- ~~~~~~
-- - Added three functions: rebuild_slv32_array, rebuild_slv64_array, and
-- rebuild_int_array to support removal of unused elements from the
-- ARD arrays.
-- ^^^^^^ --
--
-- FLO 8/12/2002
-- ~~~~~~
-- - Added three functions: bits_needed_for_vac, bits_needed_for_occ,
-- and get_id_index_iboe.
-- (Removed provisional functions bits_needed_for_vacancy,
-- bits needed_for_occupancy, and bits_needed_for.)
-- ^^^^^^
--
-- FLO 3/24/2003
-- ~~~~~~
-- - Added dependent property paramters for channelized DMA.
-- - Added common property parameter array type.
-- - Definded the KEYHOLD_BURST common-property parameter.
-- ^^^^^^
--
-- FLO 10/22/2003
-- ~~~~~~
-- - Some adjustment to CHDMA parameterization.
-- - Cleanup of obsolete code and comments. (The former "XST workaround"
-- has become the officially deployed method.)
-- ^^^^^^
--
-- LSS 03/24/2004
-- ~~~~~~
-- - Added 5 functions
-- ^^^^^^
--
-- ALS 09/03/04
-- ^^^^^^
-- -- Added constants to describe the channel protocols used in MCH_OPB_IPIF
-- ~~~~~~
--
-- DET 1/17/2008 v4_0
-- ~~~~~~
-- - Changed proc_common library version to v4_0
-- - Incorporated new disclaimer header
-- ^^^^^^
--
-------------------------------------------------------------------------------
-- Naming Conventions:
-- active low signals: "*_n"
-- clock signals: "clk", "clk_div#", "clk_#x"
-- reset signals: "rst", "rst_n"
-- generics: "C_*"
-- user defined types: "*_TYPE"
-- state machine next state: "*_ns"
-- state machine current state: "*_cs"
-- combinatorial signals: "*_com"
-- pipelined or register delay signals: "*_d#"
-- counter signals: "*cnt*"
-- clock enable signals: "*_ce"
-- internal version of output port "*_i"
-- device pins: "*_pin"
-- ports: - Names begin with Uppercase
-- processes: "*_PROCESS"
-- component instantiations: "<ENTITY_>I_<#|FUNC>
-------------------------------------------------------------------------------
library ieee;
use ieee.std_logic_1164.all;
-- need conversion function to convert reals/integers to std logic vectors
use ieee.std_logic_arith.all;
use ieee.std_logic_arith.all;
use ieee.std_logic_unsigned.all;
package ipif_pkg is
-------------------------------------------------------------------------------
-- Type Declarations
-------------------------------------------------------------------------------
type SLV32_ARRAY_TYPE is array (natural range <>) of std_logic_vector(0 to 31);
subtype SLV64_TYPE is std_logic_vector(0 to 63);
type SLV64_ARRAY_TYPE is array (natural range <>) of SLV64_TYPE;
type INTEGER_ARRAY_TYPE is array (natural range <>) of integer;
-------------------------------------------------------------------------------
-- Function and Procedure Declarations
-------------------------------------------------------------------------------
function "=" (s1: in string; s2: in string) return boolean;
function equaluseCase( str1, str2 : STRING ) RETURN BOOLEAN;
function calc_num_ce (ce_num_array : INTEGER_ARRAY_TYPE) return integer;
function calc_start_ce_index (ce_num_array : INTEGER_ARRAY_TYPE;
index : integer) return integer;
function get_min_dwidth (dwidth_array: INTEGER_ARRAY_TYPE) return integer;
function get_max_dwidth (dwidth_array: INTEGER_ARRAY_TYPE) return integer;
function S32 (in_string : string) return string;
--------------------------------------------------------------------------------
-- ARD support functions.
-- These function can be useful when operating with the ARD parameterization.
--------------------------------------------------------------------------------
function get_id_index (id_array :INTEGER_ARRAY_TYPE;
id : integer)
return integer;
function get_id_index_iboe (id_array :INTEGER_ARRAY_TYPE;
id : integer)
return integer;
function find_ard_id (id_array : INTEGER_ARRAY_TYPE;
id : integer) return boolean;
function find_id_dwidth (id_array : INTEGER_ARRAY_TYPE;
dwidth_array: INTEGER_ARRAY_TYPE;
id : integer;
default : integer)
return integer;
function cnt_ipif_id_blks (id_array : INTEGER_ARRAY_TYPE) return integer;
function get_ipif_id_dbus_index (id_array : INTEGER_ARRAY_TYPE;
id : integer)
return integer ;
function rebuild_slv32_array (slv32_array : SLV32_ARRAY_TYPE;
num_valid_pairs : integer)
return SLV32_ARRAY_TYPE;
function rebuild_slv64_array (slv64_array : SLV64_ARRAY_TYPE;
num_valid_pairs : integer)
return SLV64_ARRAY_TYPE;
function rebuild_int_array (int_array : INTEGER_ARRAY_TYPE;
num_valid_entry : integer)
return INTEGER_ARRAY_TYPE;
-- 5 Functions Added 3/24/04
function populate_intr_mode_array (num_user_intr : integer;
intr_capture_mode : integer)
return INTEGER_ARRAY_TYPE ;
function add_intr_ard_id_array(include_intr : boolean;
ard_id_array : INTEGER_ARRAY_TYPE)
return INTEGER_ARRAY_TYPE;
function add_intr_ard_addr_range_array(include_intr : boolean;
ZERO_ADDR_PAD : std_logic_vector;
intr_baseaddr : std_logic_vector;
intr_highaddr : std_logic_vector;
ard_id_array : INTEGER_ARRAY_TYPE;
ard_addr_range_array : SLV64_ARRAY_TYPE)
return SLV64_ARRAY_TYPE;
function add_intr_ard_num_ce_array(include_intr : boolean;
ard_id_array : INTEGER_ARRAY_TYPE;
ard_num_ce_array : INTEGER_ARRAY_TYPE)
return INTEGER_ARRAY_TYPE;
function add_intr_ard_dwidth_array(include_intr : boolean;
intr_dwidth : integer;
ard_id_array : INTEGER_ARRAY_TYPE;
ard_dwidth_array : INTEGER_ARRAY_TYPE)
return INTEGER_ARRAY_TYPE;
function log2(x : natural) return integer;
function clog2(x : positive) return natural;
-------------------------------------------------------------------------------
-- Constant Declarations
-------------------------------------------------------------------------------
-------------------------------------------------------------------------------
-- Channel Protocols
-- The constant declarations below give symbolic-name aliases for values that
-- can be used in the C_MCH_PROTOCOL_ARRAY generic of the MCH_OPB_IPIF.
-------------------------------------------------------------------------------
constant XCL : integer := 0;
constant DAG : integer := 1;
--------------------------------------------------------------------------------
-- Address range types.
-- The constant declarations, below, give symbolic-name aliases for values
-- that can be used in the C_ARD_ID_ARRAY generic of IPIFs. The first set
-- gives aliases that are used to include IPIF services.
--------------------------------------------------------------------------------
-- IPIF module aliases
Constant IPIF_INTR : integer := 1;
Constant IPIF_RST : integer := 2;
Constant IPIF_SESR_SEAR : integer := 3;
Constant IPIF_DMA_SG : integer := 4;
Constant IPIF_WRFIFO_REG : integer := 5;
Constant IPIF_WRFIFO_DATA : integer := 6;
Constant IPIF_RDFIFO_REG : integer := 7;
Constant IPIF_RDFIFO_DATA : integer := 8;
Constant IPIF_CHDMA_CHANNELS : integer := 9;
Constant IPIF_CHDMA_GLOBAL_REGS : integer := 10;
Constant CHDMA_STATUS_FIFO : integer := 90;
-- Some predefined user module aliases
Constant USER_00 : integer := 100;
Constant USER_01 : integer := 101;
Constant USER_02 : integer := 102;
Constant USER_03 : integer := 103;
Constant USER_04 : integer := 104;
Constant USER_05 : integer := 105;
Constant USER_06 : integer := 106;
Constant USER_07 : integer := 107;
Constant USER_08 : integer := 108;
Constant USER_09 : integer := 109;
Constant USER_10 : integer := 110;
Constant USER_11 : integer := 111;
Constant USER_12 : integer := 112;
Constant USER_13 : integer := 113;
Constant USER_14 : integer := 114;
Constant USER_15 : integer := 115;
Constant USER_16 : integer := 116;
---( Start of Dependent Properties declarations
--------------------------------------------------------------------------------
-- Declarations for Dependent Properties (properties that depend on the type of
-- the address range, or in other words, address-range-specific parameters).
-- There is one property, i.e. one parameter, encoded as an integer at
-- each index of the properties array. There is one properties array for
-- each address range.
--
-- The C_ARD_DEPENDENT_PROPS_ARRAY generic parameter in (most) IPIFs is such
-- a properties array and it is usually giving its (static) value using a
-- VHDL aggregate construct. (--ToDo, give an example of this.)
--
-- The the "assigned" default value of a dependent property is zero. This value
-- is usually specified the aggregate by leaving its (index) name out so that
-- it is covered by an "others => 0" choice in the aggregate. Some parameters,
-- as noted in the definitions, below, have an "effective" default value that is
-- different from the assigned default value of zero. In such cases, the
-- function, eff_dp, given below, can be used to get the effective value of
-- the dependent property.
--------------------------------------------------------------------------------
constant DEPENDENT_PROPS_SIZE : integer := 32;
subtype DEPENDENT_PROPS_TYPE
is INTEGER_ARRAY_TYPE(0 to DEPENDENT_PROPS_SIZE-1);
type DEPENDENT_PROPS_ARRAY_TYPE
is array (natural range <>) of DEPENDENT_PROPS_TYPE;
--------------------------------------------------------------------------------
-- Below are the indices of dependent properties for the different types of
-- address ranges.
--
-- Example: Let C_ARD_DEPENDENT_PROPS_ARRAY hold the dependent properites
-- for a set of address ranges. Then, e.g.,
--
-- C_ARD_DEPENDENT_PROPS_ARRAY(i)(FIFO_CAPACITY_BITS)
--
-- gives the fifo capacity in bits, provided that the i'th address range
-- is of type IPIF_WRFIFO_DATA or IPIF_RDFIFO_DATA.
--
-- These indices should be referenced only by the names below and never
-- by numerical literals. (The right to change numerical index assignments
-- is reserved; applications using the names will not be affected by such
-- reassignments.)
--------------------------------------------------------------------------------
--
--ToDo, if the interrupt controller parameterization is ever moved to
-- C_ARD_DEPENDENT_PROPS_ARRAY, then the following declarations
-- could be uncommented and used.
---- IPIF_INTR IDX
---------------------------------------------------------------------------- ---
constant EXCLUDE_DEV_ISC : integer := 0;
-- 1 specifies that only the global interrupt
-- enable is present in the device interrupt source
-- controller and that the only source of interrupts
-- in the device is the IP interrupt source controller.
-- 0 specifies that the full device interrupt
-- source controller structure will be included.
constant INCLUDE_DEV_PENCODER : integer := 1;
-- 1 will include the Device IID in the device interrupt
-- source controller, 0 will exclude it.
--
-- IPIF_WRFIFO_DATA or IPIF_RDFIFO_DATA IDX
---------------------------------------------------------------------------- ---
constant FIFO_CAPACITY_BITS : integer := 0;
constant WR_WIDTH_BITS : integer := 1;
constant RD_WIDTH_BITS : integer := 2;
constant EXCLUDE_PACKET_MODE : integer := 3;
-- 1 Don't include packet mode features
-- 0 Include packet mode features
constant EXCLUDE_VACANCY : integer := 4;
-- 1 Don't include vacancy calculation
-- 0 Include vacancy calculation
-- See also the functions
-- bits_needed_for_vac and
-- bits_needed_for_occ that are declared below.
constant INCLUDE_DRE : integer := 5;
constant INCLUDE_AUTOPUSH_POP : integer := 6;
constant AUTOPUSH_POP_CE : integer := 7;
constant INCLUDE_CSUM : integer := 8;
--------------------------------------------------------------------------------
--
-- DMA_SG IDX
---------------------------------------------------------------------------- ---
--------------------------------------------------------------------------------
-- IPIF_CHDMA_CHANNELS IDX
---------------------------------------------------------------------------- ---
constant NUM_SUBS_FOR_PHYS_0 : integer :=0;
constant NUM_SUBS_FOR_PHYS_1 : integer :=1;
constant NUM_SUBS_FOR_PHYS_2 : integer :=2;
constant NUM_SUBS_FOR_PHYS_3 : integer :=3;
constant NUM_SUBS_FOR_PHYS_4 : integer :=4;
constant NUM_SUBS_FOR_PHYS_5 : integer :=5;
constant NUM_SUBS_FOR_PHYS_6 : integer :=6;
constant NUM_SUBS_FOR_PHYS_7 : integer :=7;
constant NUM_SUBS_FOR_PHYS_8 : integer :=8;
constant NUM_SUBS_FOR_PHYS_9 : integer :=9;
constant NUM_SUBS_FOR_PHYS_10 : integer :=10;
constant NUM_SUBS_FOR_PHYS_11 : integer :=11;
constant NUM_SUBS_FOR_PHYS_12 : integer :=12;
constant NUM_SUBS_FOR_PHYS_13 : integer :=13;
constant NUM_SUBS_FOR_PHYS_14 : integer :=14;
constant NUM_SUBS_FOR_PHYS_15 : integer :=15;
-- Gives the number of sub-channels for physical channel i.
--
-- These constants, which will be MAX_NUM_PHYS_CHANNELS in number (see
-- below), have consecutive values starting with 0 for
-- NUM_SUBS_FOR_PHYS_0. (The constants serve the purpose of giving symbolic
-- names for use in the dependent-properties aggregates that parameterize
-- an IPIF_CHDMA_CHANNELS address range.)
--
-- [Users can ignore this note for developers
-- If the number of physical channels changes, both the
-- IPIF_CHDMA_CHANNELS constants and MAX_NUM_PHYS_CHANNELS,
-- below, must be adjusted.
-- (Use of an array constant or a function of the form
-- NUM_SUBS_FOR_PHYS(i) to define the indices
-- runs afoul of LRM restrictions on non-locally static aggregate
-- choices. (Further, the LRM imposes perhaps unnecessarily
-- strict limits on what qualifies as a locally static primary.)
-- Note: This information is supplied for the benefit of anyone seeking
-- to improve the way that these NUM_SUBS_FOR_PHYS parameter
-- indices are defined.)
-- End of note for developers ]
--
-- The value associated with any index NUM_SUBS_FOR_PHYS_i in the
-- dependent-properties array must be even since TX and RX channels
-- come in pairs with the TX followed immediately by
-- the corresponding RX.
--
constant NUM_SIMPLE_DMA_CHANS : integer :=16;
-- The number of simple DMA channels.
constant NUM_SIMPLE_SG_CHANS : integer :=17;
-- The number of simple SG channels.
constant INTR_COALESCE : integer :=18;
-- 0 Interrupt coalescing is disabled
-- 1 Interrupt coalescing is enabled
constant CLK_PERIOD_PS : integer :=19;
-- The period of the OPB Bus clock in ps.
-- The default value of 0 is a special value that
-- is synonymous with 10000 ps (10 ns).
-- The value for CLK_PERIOD_PS is relevant only if (INTR_COALESCE = 1).
constant PACKET_WAIT_UNIT_NS : integer :=20;
-- Gives the unit for used for timing of pack-wait bounds.
-- The default value of 0 is a special value that
-- is synonymous with 1,000,000 ns (1 ms) and a non-default
-- value is typically only used for testing.
-- Relevant only if (INTR_COALESCE = 1).
constant BURST_SIZE : integer :=21;
-- 1, 2, 4, 8 or 16
-- The default value of 0 is a special value that
-- is synonymous with a burst size of 16.
-- Setting the BURST_SIZE to 1 effectively disables
-- bursts.
constant REMAINDER_AS_SINGLES : integer :=22;
-- 0 Remainder handled as a short burst
-- 1 Remainder handled as a series of singles
--------------------------------------------------------------------------------
-- The constant below is not the index of a dependent-properties
-- parameter (and, as such, would never appear as a choice in a
-- dependent-properties aggregate). Rather, it is fixed to the maximum
-- number of physical channels that an Address Range of type
-- IPIF_CHDMA_CHANNELS supports. It must be maintained in conjuction with
-- the constants named, e.g., NUM_SUBS_FOR_PHYS_15, above.
--------------------------------------------------------------------------------
constant MAX_NUM_PHYS_CHANNELS : natural := 16;
--------------------------------------------------------------------------
-- EXAMPLE: Here is an example dependent-properties aggregate for an
-- address range of type IPIF_CHDMA_CHANNELS.
-- To have a compact list of all of the CHDMA parameters, all are
-- shown, however three are commented out and the unneeded
-- MUM_SUBS_FOR_PHYS_x are excluded. The "OTHERS => 0" association
-- gives these parameters their default values, such that, for the example
--
-- - All physical channels above 2 have zero subchannels (effectively,
-- these physical channels are not used)
-- - There are no simple SG channels
-- - The packet-wait time unit is 1 ms
-- - Burst size is 16
--------------------------------------------------------------------------
-- (
-- NUM_SUBS_FOR_PHYS_0 => 8,
-- NUM_SUBS_FOR_PHYS_1 => 4,
-- NUM_SUBS_FOR_PHYS_2 => 14,
-- NUM_SIMPLE_DMA_CHANS => 1,
-- --NUM_SIMPLE_SG_CHANS => 5,
-- INTR_COALESCE => 1,
-- CLK_PERIOD_PS => 20000,
-- --PACKET_WAIT_UNIT_NS => 50000,
-- --BURST_SIZE => 1,
-- REMAINDER_AS_SINGLES => 1,
-- OTHERS => 0
-- )
--
--------------------------------------------------------------------------------
--------------------------------------------------------------------------------
-- Calculates the number of bits needed to convey the vacancy (emptiness) of
-- the fifo described by dependent_props, if fifo_present. If not fifo_present,
-- returns 0 (or the smallest value allowed by tool limitations on null arrays)
-- without making reference to dependent_props.
--------------------------------------------------------------------------------
function bits_needed_for_vac(
fifo_present: boolean;
dependent_props : DEPENDENT_PROPS_TYPE
) return integer;
--------------------------------------------------------------------------------
-- Calculates the number of bits needed to convey the occupancy (fullness) of
-- the fifo described by dependent_props, if fifo_present. If not fifo_present,
-- returns 0 (or the smallest value allowed by tool limitations on null arrays)
-- without making reference to dependent_props.
--------------------------------------------------------------------------------
function bits_needed_for_occ(
fifo_present: boolean;
dependent_props : DEPENDENT_PROPS_TYPE
) return integer;
--------------------------------------------------------------------------------
-- Function eff_dp.
--
-- For some of the dependent properties, the default value of zero is meant
-- to imply an effective default value of other than zero (see e.g.
-- PKT_WAIT_UNIT_NS for the IPIF_CHDMA_CHANNELS address-range type). The
-- following function is used to get the (possibly default-adjusted)
-- value for a dependent property.
--
-- Example call:
--
-- eff_value_of_param :=
-- eff_dp(
-- C_IPIF_CHDMA_CHANNELS,
-- PACKET_WAIT_UNIT_NS,
-- C_ARD_DEPENDENT_PROPS_ARRAY(i)(PACKET_WAIT_UNIT_NS)
-- );
--
-- where C_ARD_DEPENDENT_PROPS_ARRAY(i) is an object of type
-- DEPENDENT_PROPS_ARRAY_TYPE, that was parameterized for an address range of
-- type C_IPIF_CHDMA_CHANNELS.
--------------------------------------------------------------------------------
function eff_dp(id : integer; -- The type of address range.
dep_prop : integer; -- The index of the dependent prop.
value : integer -- The value at that index.
) return integer; -- The effective value, possibly adjusted
-- if value has the default value of 0.
---) End of Dependent Properties declarations
--------------------------------------------------------------------------------
-- Declarations for Common Properties (properties that apply regardless of the
-- type of the address range). Structurally, these work the same as
-- the dependent properties.
--------------------------------------------------------------------------------
constant COMMON_PROPS_SIZE : integer := 2;
subtype COMMON_PROPS_TYPE
is INTEGER_ARRAY_TYPE(0 to COMMON_PROPS_SIZE-1);
type COMMON_PROPS_ARRAY_TYPE
is array (natural range <>) of COMMON_PROPS_TYPE;
--------------------------------------------------------------------------------
-- Below are the indices of the common properties.
--
-- These indices should be referenced only by the names below and never
-- by numerical literals.
-- IDX
---------------------------------------------------------------------------- ---
constant KEYHOLE_BURST : integer := 0;
-- 1 All addresses of a burst are forced to the initial
-- address of the burst.
-- 0 Burst addresses follow the bus protocol.
-- IP interrupt mode array constants
Constant INTR_PASS_THRU : integer := 1;
Constant INTR_PASS_THRU_INV : integer := 2;
Constant INTR_REG_EVENT : integer := 3;
Constant INTR_REG_EVENT_INV : integer := 4;
Constant INTR_POS_EDGE_DETECT : integer := 5;
Constant INTR_NEG_EDGE_DETECT : integer := 6;
end ipif_pkg;
package body ipif_pkg is
-------------------------------------------------------------------------------
-- Function log2 -- returns number of bits needed to encode x choices
-- x = 0 returns 0
-- x = 1 returns 0
-- x = 2 returns 1
-- x = 4 returns 2, etc.
-------------------------------------------------------------------------------
--
function log2(x : natural) return integer is
variable i : integer := 0;
variable val: integer := 1;
begin
if x = 0 then return 0;
else
for j in 0 to 29 loop -- for loop for XST
if val >= x then null;
else
i := i+1;
val := val*2;
end if;
end loop;
-- Fix per CR520627 XST was ignoring this anyway and printing a
-- Warning in SRP file. This will get rid of the warning and not
-- impact simulation.
-- synthesis translate_off
assert val >= x
report "Function log2 received argument larger" &
" than its capability of 2^30. "
severity failure;
-- synthesis translate_on
return i;
end if;
end function log2;
--------------------------------------------------------------------------------
-- Function clog2 - returns the integer ceiling of the base 2 logarithm of x,
-- i.e., the least integer greater than or equal to log2(x).
--------------------------------------------------------------------------------
function clog2(x : positive) return natural is
variable r : natural := 0;
variable rp : natural := 1; -- rp tracks the value 2**r
begin
while rp < x loop -- Termination condition T: x <= 2**r
-- Loop invariant L: 2**(r-1) < x
r := r + 1;
if rp > integer'high - rp then exit; end if; -- If doubling rp overflows
-- the integer range, the doubled value would exceed x, so safe to exit.
rp := rp + rp;
end loop;
-- L and T <-> 2**(r-1) < x <= 2**r <-> (r-1) < log2(x) <= r
return r; --
end clog2;
-------------------------------------------------------------------------------
-- Function Definitions
-------------------------------------------------------------------------------
-----------------------------------------------------------------------------
-- Function "="
--
-- This function can be used to overload the "=" operator when comparing
-- strings.
-----------------------------------------------------------------------------
function "=" (s1: in string; s2: in string) return boolean is
constant tc: character := ' '; -- string termination character
variable i: integer := 1;
variable v1 : string(1 to s1'length) := s1;
variable v2 : string(1 to s2'length) := s2;
begin
while (i <= v1'length) and (v1(i) /= tc) and
(i <= v2'length) and (v2(i) /= tc) and
(v1(i) = v2(i))
loop
i := i+1;
end loop;
return ((i > v1'length) or (v1(i) = tc)) and
((i > v2'length) or (v2(i) = tc));
end;
----------------------------------------------------------------------------
-- Function equaluseCase
--
-- This function returns true if case sensitive string comparison determines
-- that str1 and str2 are the same.
-----------------------------------------------------------------------------
FUNCTION equaluseCase( str1, str2 : STRING ) RETURN BOOLEAN IS
CONSTANT len1 : INTEGER := str1'length;
CONSTANT len2 : INTEGER := str2'length;
VARIABLE equal : BOOLEAN := TRUE;
BEGIN
IF NOT (len1=len2) THEN
equal := FALSE;
ELSE
FOR i IN str1'range LOOP
IF NOT (str1(i) = str2(i)) THEN
equal := FALSE;
END IF;
END LOOP;
END IF;
RETURN equal;
END equaluseCase;
-----------------------------------------------------------------------------
-- Function calc_num_ce
--
-- This function is used to process the array specifying the number of Chip
-- Enables required for a Base Address specification. The array is input to
-- the function and an integer is returned reflecting the total number of
-- Chip Enables required for the CE, RdCE, and WrCE Buses
-----------------------------------------------------------------------------
function calc_num_ce (ce_num_array : INTEGER_ARRAY_TYPE) return integer is
Variable ce_num_sum : integer := 0;
begin
for i in 0 to (ce_num_array'length)-1 loop
ce_num_sum := ce_num_sum + ce_num_array(i);
End loop;
return(ce_num_sum);
end function calc_num_ce;
-----------------------------------------------------------------------------
-- Function calc_start_ce_index
--
-- This function is used to process the array specifying the number of Chip
-- Enables required for a Base Address specification. The CE Size array is
-- input to the function and an integer index representing the index of the
-- target module in the ce_num_array. An integer is returned reflecting the
-- starting index of the assigned Chip Enables within the CE, RdCE, and
-- WrCE Buses.
-----------------------------------------------------------------------------
function calc_start_ce_index (ce_num_array : INTEGER_ARRAY_TYPE;
index : integer) return integer is
Variable ce_num_sum : integer := 0;
begin
If (index = 0) Then
ce_num_sum := 0;
else
for i in 0 to index-1 loop
ce_num_sum := ce_num_sum + ce_num_array(i);
End loop;
End if;
return(ce_num_sum);
end function calc_start_ce_index;
-----------------------------------------------------------------------------
-- Function get_min_dwidth
--
-- This function is used to process the array specifying the data bus width
-- for each of the target modules. The dwidth_array is input to the function
-- and an integer is returned that is the smallest value found of all the
-- entries in the array.
-----------------------------------------------------------------------------
function get_min_dwidth (dwidth_array: INTEGER_ARRAY_TYPE) return integer is
Variable temp_min : Integer := 1024;
begin
for i in 0 to dwidth_array'length-1 loop
If (dwidth_array(i) < temp_min) Then
temp_min := dwidth_array(i);
else
null;
End if;
End loop;
return(temp_min);
end function get_min_dwidth;
-----------------------------------------------------------------------------
-- Function get_max_dwidth
--
-- This function is used to process the array specifying the data bus width
-- for each of the target modules. The dwidth_array is input to the function
-- and an integer is returned that is the largest value found of all the
-- entries in the array.
-----------------------------------------------------------------------------
function get_max_dwidth (dwidth_array: INTEGER_ARRAY_TYPE) return integer is
Variable temp_max : Integer := 0;
begin
for i in 0 to dwidth_array'length-1 loop
If (dwidth_array(i) > temp_max) Then
temp_max := dwidth_array(i);
else
null;
End if;
End loop;
return(temp_max);
end function get_max_dwidth;
-----------------------------------------------------------------------------
-- Function S32
--
-- This function is used to expand an input string to 32 characters by
-- padding with spaces. If the input string is larger than 32 characters,
-- it will truncate to 32 characters.
-----------------------------------------------------------------------------
function S32 (in_string : string) return string is
constant OUTPUT_STRING_LENGTH : integer := 32;
Constant space : character := ' ';
variable new_string : string(1 to 32);
Variable start_index : Integer := in_string'length+1;
begin
If (in_string'length < OUTPUT_STRING_LENGTH) Then
for i in 1 to in_string'length loop
new_string(i) := in_string(i);
End loop;
for j in start_index to OUTPUT_STRING_LENGTH loop
new_string(j) := space;
End loop;
else -- use first 32 chars of in_string (truncate the rest)
for k in 1 to OUTPUT_STRING_LENGTH loop
new_string(k) := in_string(k);
End loop;
End if;
return(new_string);
end function S32;
-----------------------------------------------------------------------------
-- Function get_id_index
--
-- This function is used to process the array specifying the target function
-- assigned to a Base Address pair address range. The id_array and a
-- id number is input to the function. A integer is returned reflecting the
-- array index of the id matching the id input number. This function
-- should only be called if the id number is known to exist in the
-- name_array input. This can be detirmined by using the find_ard_id
-- function.
-----------------------------------------------------------------------------
function get_id_index (id_array :INTEGER_ARRAY_TYPE;
id : integer) return integer is
Variable match : Boolean := false;
Variable match_index : Integer := 10000; -- a really big number!
begin
for array_index in 0 to id_array'length-1 loop
If (match = true) Then -- match already found so do nothing
null;
else -- compare the numbers one by one
match := (id_array(array_index) = id);
If (match) Then
match_index := array_index;
else
null;
End if;
End if;
End loop;
return(match_index);
end function get_id_index;
--------------------------------------------------------------------------------
-- get_id_index but return a value in bounds on error (iboe).
--
-- This function is the same as get_id_index, except that when id does
-- not exist in id_array, the value returned is any index that is
-- within the index range of id_array.
--
-- This function would normally only be used where function find_ard_id
-- is used to establish the existence of id but, even when non-existent,
-- an element of one of the ARD arrays will be computed from the
-- returned get_id_index_iboe value. See, e.g., function bits_needed_for_vac
-- and the example call, below
--
-- bits_needed_for_vac(
-- find_ard_id(C_ARD_ID_ARRAY, IPIF_RDFIFO_DATA),
-- C_ARD_DEPENDENT_PROPS_ARRAY(get_id_index_iboe(C_ARD_ID_ARRAY,
-- IPIF_RDFIFO_DATA))
-- )
--------------------------------------------------------------------------------
function get_id_index_iboe (id_array :INTEGER_ARRAY_TYPE;
id : integer) return integer is
Variable match : Boolean := false;
Variable match_index : Integer := id_array'left; -- any valid array index
begin
for array_index in 0 to id_array'length-1 loop
If (match = true) Then -- match already found so do nothing
null;
else -- compare the numbers one by one
match := (id_array(array_index) = id);
If (match) Then match_index := array_index;
else null;
End if;
End if;
End loop;
return(match_index);
end function get_id_index_iboe;
-----------------------------------------------------------------------------
-- Function find_ard_id
--
-- This function is used to process the array specifying the target function
-- assigned to a Base Address pair address range. The id_array and a
-- integer id is input to the function. A boolean is returned reflecting the
-- presence (or not) of a number in the array matching the id input number.
-----------------------------------------------------------------------------
function find_ard_id (id_array : INTEGER_ARRAY_TYPE;
id : integer) return boolean is
Variable match : Boolean := false;
begin
for array_index in 0 to id_array'length-1 loop
If (match = true) Then -- match already found so do nothing
null;
else -- compare the numbers one by one
match := (id_array(array_index) = id);
End if;
End loop;
return(match);
end function find_ard_id;
-----------------------------------------------------------------------------
-- Function find_id_dwidth
--
-- This function is used to find the data width of a target module. If the
-- target module exists, the data width is extracted from the input dwidth
-- array. If the module is not in the ID array, the default input is
-- returned. This function is needed to assign data port size constraints on
-- unconstrained port widths.
-----------------------------------------------------------------------------
function find_id_dwidth (id_array : INTEGER_ARRAY_TYPE;
dwidth_array: INTEGER_ARRAY_TYPE;
id : integer;
default : integer) return integer is
Variable id_present : Boolean := false;
Variable array_index : Integer := 0;
Variable dwidth : Integer := default;
begin
id_present := find_ard_id(id_array, id);
If (id_present) Then
array_index := get_id_index (id_array, id);
dwidth := dwidth_array(array_index);
else
null; -- use default input
End if;
Return (dwidth);
end function find_id_dwidth;
-----------------------------------------------------------------------------
-- Function cnt_ipif_id_blks
--
-- This function is used to detirmine the number of IPIF components specified
-- in the ARD ID Array. An integer is returned representing the number
-- of elements counted. User IDs are ignored in the counting process.
-----------------------------------------------------------------------------
function cnt_ipif_id_blks (id_array : INTEGER_ARRAY_TYPE)
return integer is
Variable blk_count : integer := 0;
Variable temp_id : integer;
begin
for array_index in 0 to id_array'length-1 loop
temp_id := id_array(array_index);
If (temp_id = IPIF_WRFIFO_DATA or
temp_id = IPIF_RDFIFO_DATA or
temp_id = IPIF_RST or
temp_id = IPIF_INTR or
temp_id = IPIF_DMA_SG or
temp_id = IPIF_SESR_SEAR
) Then -- IPIF block found
blk_count := blk_count+1;
else -- go to next loop iteration
null;
End if;
End loop;
return(blk_count);
end function cnt_ipif_id_blks;
-----------------------------------------------------------------------------
-- Function get_ipif_id_dbus_index
--
-- This function is used to detirmine the IPIF relative index of a given
-- ID value. User IDs are ignored in the index detirmination.
-----------------------------------------------------------------------------
function get_ipif_id_dbus_index (id_array : INTEGER_ARRAY_TYPE;
id : integer)
return integer is
Variable blk_index : integer := 0;
Variable temp_id : integer;
Variable id_found : Boolean := false;
begin
for array_index in 0 to id_array'length-1 loop
temp_id := id_array(array_index);
If (id_found) then
null;
elsif (temp_id = id) then
id_found := true;
elsif (temp_id = IPIF_WRFIFO_DATA or
temp_id = IPIF_RDFIFO_DATA or
temp_id = IPIF_RST or
temp_id = IPIF_INTR or
temp_id = IPIF_DMA_SG or
temp_id = IPIF_SESR_SEAR
) Then -- IPIF block found
blk_index := blk_index+1;
else -- user block so do nothing
null;
End if;
End loop;
return(blk_index);
end function get_ipif_id_dbus_index;
------------------------------------------------------------------------------
-- Function: rebuild_slv32_array
--
-- Description:
-- This function takes an input slv32 array and rebuilds an output slv32
-- array composed of the first "num_valid_entry" elements from the input
-- array.
------------------------------------------------------------------------------
function rebuild_slv32_array (slv32_array : SLV32_ARRAY_TYPE;
num_valid_pairs : integer)
return SLV32_ARRAY_TYPE is
--Constants
constant num_elements : Integer := num_valid_pairs * 2;
-- Variables
variable temp_baseaddr32_array : SLV32_ARRAY_TYPE( 0 to num_elements-1);
begin
for array_index in 0 to num_elements-1 loop
temp_baseaddr32_array(array_index) := slv32_array(array_index);
end loop;
return(temp_baseaddr32_array);
end function rebuild_slv32_array;
------------------------------------------------------------------------------
-- Function: rebuild_slv64_array
--
-- Description:
-- This function takes an input slv64 array and rebuilds an output slv64
-- array composed of the first "num_valid_entry" elements from the input
-- array.
------------------------------------------------------------------------------
function rebuild_slv64_array (slv64_array : SLV64_ARRAY_TYPE;
num_valid_pairs : integer)
return SLV64_ARRAY_TYPE is
--Constants
constant num_elements : Integer := num_valid_pairs * 2;
-- Variables
variable temp_baseaddr64_array : SLV64_ARRAY_TYPE( 0 to num_elements-1);
begin
for array_index in 0 to num_elements-1 loop
temp_baseaddr64_array(array_index) := slv64_array(array_index);
end loop;
return(temp_baseaddr64_array);
end function rebuild_slv64_array;
------------------------------------------------------------------------------
-- Function: rebuild_int_array
--
-- Description:
-- This function takes an input integer array and rebuilds an output integer
-- array composed of the first "num_valid_entry" elements from the input
-- array.
------------------------------------------------------------------------------
function rebuild_int_array (int_array : INTEGER_ARRAY_TYPE;
num_valid_entry : integer)
return INTEGER_ARRAY_TYPE is
-- Variables
variable temp_int_array : INTEGER_ARRAY_TYPE( 0 to num_valid_entry-1);
begin
for array_index in 0 to num_valid_entry-1 loop
temp_int_array(array_index) := int_array(array_index);
end loop;
return(temp_int_array);
end function rebuild_int_array;
function bits_needed_for_vac(
fifo_present: boolean;
dependent_props : DEPENDENT_PROPS_TYPE
) return integer is
begin
if not fifo_present then
return 1; -- Zero would be better but leads to "0 to -1" null
-- ranges that are not handled by XST Flint or earlier
-- because of the negative index.
else
return
log2(1 + dependent_props(FIFO_CAPACITY_BITS) /
dependent_props(RD_WIDTH_BITS)
);
end if;
end function bits_needed_for_vac;
function bits_needed_for_occ(
fifo_present: boolean;
dependent_props : DEPENDENT_PROPS_TYPE
) return integer is
begin
if not fifo_present then
return 1; -- Zero would be better but leads to "0 to -1" null
-- ranges that are not handled by XST Flint or earlier
-- because of the negative index.
else
return
log2(1 + dependent_props(FIFO_CAPACITY_BITS) /
dependent_props(WR_WIDTH_BITS)
);
end if;
end function bits_needed_for_occ;
function eff_dp(id : integer;
dep_prop : integer;
value : integer) return integer is
variable dp : integer := dep_prop;
type bo2na_type is array (boolean) of natural;
constant bo2na : bo2na_type := (0, 1);
begin
if value /= 0 then return value; end if; -- Not default
case id is
when IPIF_CHDMA_CHANNELS =>
-------------------
return( bo2na(dp = CLK_PERIOD_PS ) * 10000
+ bo2na(dp = PACKET_WAIT_UNIT_NS ) * 1000000
+ bo2na(dp = BURST_SIZE ) * 16
);
when others => return 0;
end case;
end eff_dp;
function populate_intr_mode_array (num_user_intr : integer;
intr_capture_mode : integer)
return INTEGER_ARRAY_TYPE is
variable intr_mode_array : INTEGER_ARRAY_TYPE(0 to num_user_intr-1);
begin
for i in 0 to num_user_intr-1 loop
intr_mode_array(i) := intr_capture_mode;
end loop;
return intr_mode_array;
end function populate_intr_mode_array;
function add_intr_ard_id_array(include_intr : boolean;
ard_id_array : INTEGER_ARRAY_TYPE)
return INTEGER_ARRAY_TYPE is
variable intr_ard_id_array : INTEGER_ARRAY_TYPE(0 to ard_id_array'length);
begin
intr_ard_id_array(0 to ard_id_array'length-1) := ard_id_array;
if include_intr then
intr_ard_id_array(ard_id_array'length) := IPIF_INTR;
return intr_ard_id_array;
else
return ard_id_array;
end if;
end function add_intr_ard_id_array;
function add_intr_ard_addr_range_array(include_intr : boolean;
ZERO_ADDR_PAD : std_logic_vector;
intr_baseaddr : std_logic_vector;
intr_highaddr : std_logic_vector;
ard_id_array : INTEGER_ARRAY_TYPE;
ard_addr_range_array : SLV64_ARRAY_TYPE)
return SLV64_ARRAY_TYPE is
variable intr_ard_addr_range_array : SLV64_ARRAY_TYPE(0 to ard_addr_range_array'length+1);
begin
intr_ard_addr_range_array(0 to ard_addr_range_array'length-1) := ard_addr_range_array;
if include_intr then
intr_ard_addr_range_array(2*get_id_index(ard_id_array,IPIF_INTR))
:= ZERO_ADDR_PAD & intr_baseaddr;
intr_ard_addr_range_array(2*get_id_index(ard_id_array,IPIF_INTR)+1)
:= ZERO_ADDR_PAD & intr_highaddr;
return intr_ard_addr_range_array;
else
return ard_addr_range_array;
end if;
end function add_intr_ard_addr_range_array;
function add_intr_ard_dwidth_array(include_intr : boolean;
intr_dwidth : integer;
ard_id_array : INTEGER_ARRAY_TYPE;
ard_dwidth_array : INTEGER_ARRAY_TYPE)
return INTEGER_ARRAY_TYPE is
variable intr_ard_dwidth_array : INTEGER_ARRAY_TYPE(0 to ard_dwidth_array'length);
begin
intr_ard_dwidth_array(0 to ard_dwidth_array'length-1) := ard_dwidth_array;
if include_intr then
intr_ard_dwidth_array(get_id_index(ard_id_array, IPIF_INTR)) := intr_dwidth;
return intr_ard_dwidth_array;
else
return ard_dwidth_array;
end if;
end function add_intr_ard_dwidth_array;
function add_intr_ard_num_ce_array(include_intr : boolean;
ard_id_array : INTEGER_ARRAY_TYPE;
ard_num_ce_array : INTEGER_ARRAY_TYPE)
return INTEGER_ARRAY_TYPE is
variable intr_ard_num_ce_array : INTEGER_ARRAY_TYPE(0 to ard_num_ce_array'length);
begin
intr_ard_num_ce_array(0 to ard_num_ce_array'length-1) := ard_num_ce_array;
if include_intr then
intr_ard_num_ce_array(get_id_index(ard_id_array, IPIF_INTR)) := 16;
return intr_ard_num_ce_array;
else
return ard_num_ce_array;
end if;
end function add_intr_ard_num_ce_array;
end package body ipif_pkg;
|
-- IPIF Common Library Package
-------------------------------------------------------------------------------
--
-- *************************************************************************
-- ** **
-- ** DISCLAIMER OF LIABILITY **
-- ** **
-- ** This text/file contains proprietary, confidential **
-- ** information of Xilinx, Inc., is distributed under **
-- ** license from Xilinx, Inc., and may be used, copied **
-- ** and/or disclosed only pursuant to the terms of a valid **
-- ** license agreement with Xilinx, Inc. Xilinx hereby **
-- ** grants you a license to use this text/file solely for **
-- ** design, simulation, implementation and creation of **
-- ** design files limited to Xilinx devices or technologies. **
-- ** Use with non-Xilinx devices or technologies is expressly **
-- ** prohibited and immediately terminates your license unless **
-- ** covered by a separate agreement. **
-- ** **
-- ** Xilinx is providing this design, code, or information **
-- ** "as-is" solely for use in developing programs and **
-- ** solutions for Xilinx devices, with no obligation on the **
-- ** part of Xilinx to provide support. By providing this design, **
-- ** code, or information as one possible implementation of **
-- ** this feature, application or standard, Xilinx is making no **
-- ** representation that this implementation is free from any **
-- ** claims of infringement. You are responsible for obtaining **
-- ** any rights you may require for your implementation. **
-- ** Xilinx expressly disclaims any warranty whatsoever with **
-- ** respect to the adequacy of the implementation, including **
-- ** but not limited to any warranties or representations that this **
-- ** implementation is free from claims of infringement, implied **
-- ** warranties of merchantability or fitness for a particular **
-- ** purpose. **
-- ** **
-- ** Xilinx products are not intended for use in life support **
-- ** appliances, devices, or systems. Use in such applications is **
-- ** expressly prohibited. **
-- ** **
-- ** Any modifications that are made to the Source Code are **
-- ** done at the users sole risk and will be unsupported. **
-- ** The Xilinx Support Hotline does not have access to source **
-- ** code and therefore cannot answer specific questions related **
-- ** to source HDL. The Xilinx Hotline support of original source **
-- ** code IP shall only address issues and questions related **
-- ** to the standard Netlist version of the core (and thus **
-- ** indirectly, the original core source). **
-- ** **
-- ** Copyright (c) 2002-2010 Xilinx, Inc. All rights reserved. **
-- ** **
-- ** This copyright and support notice must be retained as part **
-- ** of this text at all times. **
-- ** **
-- *************************************************************************
--
-------------------------------------------------------------------------------
-- Filename: ipif_pkg.vhd
-- Version: Intital
-- Description: This file contains the constants and functions used in the
-- ipif common library components.
--
-------------------------------------------------------------------------------
-- Structure:
--
-------------------------------------------------------------------------------
-- Author: DET
-- History:
-- DET 02/21/02 -- Created from proc_common_pkg.vhd
--
-- DET 03/13/02 -- PLB IPIF development updates
-- ^^^^^^
-- - Commented out string types and string functions due to an XST
-- problem with string arrays and functions. THe string array
-- processing functions were replaced with comperable functions
-- operating on integer arrays.
-- ~~~~~~
--
--
-- DET 4/30/2002 Initial
-- ~~~~~~
-- - Added three functions: rebuild_slv32_array, rebuild_slv64_array, and
-- rebuild_int_array to support removal of unused elements from the
-- ARD arrays.
-- ^^^^^^ --
--
-- FLO 8/12/2002
-- ~~~~~~
-- - Added three functions: bits_needed_for_vac, bits_needed_for_occ,
-- and get_id_index_iboe.
-- (Removed provisional functions bits_needed_for_vacancy,
-- bits needed_for_occupancy, and bits_needed_for.)
-- ^^^^^^
--
-- FLO 3/24/2003
-- ~~~~~~
-- - Added dependent property paramters for channelized DMA.
-- - Added common property parameter array type.
-- - Definded the KEYHOLD_BURST common-property parameter.
-- ^^^^^^
--
-- FLO 10/22/2003
-- ~~~~~~
-- - Some adjustment to CHDMA parameterization.
-- - Cleanup of obsolete code and comments. (The former "XST workaround"
-- has become the officially deployed method.)
-- ^^^^^^
--
-- LSS 03/24/2004
-- ~~~~~~
-- - Added 5 functions
-- ^^^^^^
--
-- ALS 09/03/04
-- ^^^^^^
-- -- Added constants to describe the channel protocols used in MCH_OPB_IPIF
-- ~~~~~~
--
-- DET 1/17/2008 v4_0
-- ~~~~~~
-- - Changed proc_common library version to v4_0
-- - Incorporated new disclaimer header
-- ^^^^^^
--
-------------------------------------------------------------------------------
-- Naming Conventions:
-- active low signals: "*_n"
-- clock signals: "clk", "clk_div#", "clk_#x"
-- reset signals: "rst", "rst_n"
-- generics: "C_*"
-- user defined types: "*_TYPE"
-- state machine next state: "*_ns"
-- state machine current state: "*_cs"
-- combinatorial signals: "*_com"
-- pipelined or register delay signals: "*_d#"
-- counter signals: "*cnt*"
-- clock enable signals: "*_ce"
-- internal version of output port "*_i"
-- device pins: "*_pin"
-- ports: - Names begin with Uppercase
-- processes: "*_PROCESS"
-- component instantiations: "<ENTITY_>I_<#|FUNC>
-------------------------------------------------------------------------------
library ieee;
use ieee.std_logic_1164.all;
-- need conversion function to convert reals/integers to std logic vectors
use ieee.std_logic_arith.all;
use ieee.std_logic_arith.all;
use ieee.std_logic_unsigned.all;
package ipif_pkg is
-------------------------------------------------------------------------------
-- Type Declarations
-------------------------------------------------------------------------------
type SLV32_ARRAY_TYPE is array (natural range <>) of std_logic_vector(0 to 31);
subtype SLV64_TYPE is std_logic_vector(0 to 63);
type SLV64_ARRAY_TYPE is array (natural range <>) of SLV64_TYPE;
type INTEGER_ARRAY_TYPE is array (natural range <>) of integer;
-------------------------------------------------------------------------------
-- Function and Procedure Declarations
-------------------------------------------------------------------------------
function "=" (s1: in string; s2: in string) return boolean;
function equaluseCase( str1, str2 : STRING ) RETURN BOOLEAN;
function calc_num_ce (ce_num_array : INTEGER_ARRAY_TYPE) return integer;
function calc_start_ce_index (ce_num_array : INTEGER_ARRAY_TYPE;
index : integer) return integer;
function get_min_dwidth (dwidth_array: INTEGER_ARRAY_TYPE) return integer;
function get_max_dwidth (dwidth_array: INTEGER_ARRAY_TYPE) return integer;
function S32 (in_string : string) return string;
--------------------------------------------------------------------------------
-- ARD support functions.
-- These function can be useful when operating with the ARD parameterization.
--------------------------------------------------------------------------------
function get_id_index (id_array :INTEGER_ARRAY_TYPE;
id : integer)
return integer;
function get_id_index_iboe (id_array :INTEGER_ARRAY_TYPE;
id : integer)
return integer;
function find_ard_id (id_array : INTEGER_ARRAY_TYPE;
id : integer) return boolean;
function find_id_dwidth (id_array : INTEGER_ARRAY_TYPE;
dwidth_array: INTEGER_ARRAY_TYPE;
id : integer;
default : integer)
return integer;
function cnt_ipif_id_blks (id_array : INTEGER_ARRAY_TYPE) return integer;
function get_ipif_id_dbus_index (id_array : INTEGER_ARRAY_TYPE;
id : integer)
return integer ;
function rebuild_slv32_array (slv32_array : SLV32_ARRAY_TYPE;
num_valid_pairs : integer)
return SLV32_ARRAY_TYPE;
function rebuild_slv64_array (slv64_array : SLV64_ARRAY_TYPE;
num_valid_pairs : integer)
return SLV64_ARRAY_TYPE;
function rebuild_int_array (int_array : INTEGER_ARRAY_TYPE;
num_valid_entry : integer)
return INTEGER_ARRAY_TYPE;
-- 5 Functions Added 3/24/04
function populate_intr_mode_array (num_user_intr : integer;
intr_capture_mode : integer)
return INTEGER_ARRAY_TYPE ;
function add_intr_ard_id_array(include_intr : boolean;
ard_id_array : INTEGER_ARRAY_TYPE)
return INTEGER_ARRAY_TYPE;
function add_intr_ard_addr_range_array(include_intr : boolean;
ZERO_ADDR_PAD : std_logic_vector;
intr_baseaddr : std_logic_vector;
intr_highaddr : std_logic_vector;
ard_id_array : INTEGER_ARRAY_TYPE;
ard_addr_range_array : SLV64_ARRAY_TYPE)
return SLV64_ARRAY_TYPE;
function add_intr_ard_num_ce_array(include_intr : boolean;
ard_id_array : INTEGER_ARRAY_TYPE;
ard_num_ce_array : INTEGER_ARRAY_TYPE)
return INTEGER_ARRAY_TYPE;
function add_intr_ard_dwidth_array(include_intr : boolean;
intr_dwidth : integer;
ard_id_array : INTEGER_ARRAY_TYPE;
ard_dwidth_array : INTEGER_ARRAY_TYPE)
return INTEGER_ARRAY_TYPE;
function log2(x : natural) return integer;
function clog2(x : positive) return natural;
-------------------------------------------------------------------------------
-- Constant Declarations
-------------------------------------------------------------------------------
-------------------------------------------------------------------------------
-- Channel Protocols
-- The constant declarations below give symbolic-name aliases for values that
-- can be used in the C_MCH_PROTOCOL_ARRAY generic of the MCH_OPB_IPIF.
-------------------------------------------------------------------------------
constant XCL : integer := 0;
constant DAG : integer := 1;
--------------------------------------------------------------------------------
-- Address range types.
-- The constant declarations, below, give symbolic-name aliases for values
-- that can be used in the C_ARD_ID_ARRAY generic of IPIFs. The first set
-- gives aliases that are used to include IPIF services.
--------------------------------------------------------------------------------
-- IPIF module aliases
Constant IPIF_INTR : integer := 1;
Constant IPIF_RST : integer := 2;
Constant IPIF_SESR_SEAR : integer := 3;
Constant IPIF_DMA_SG : integer := 4;
Constant IPIF_WRFIFO_REG : integer := 5;
Constant IPIF_WRFIFO_DATA : integer := 6;
Constant IPIF_RDFIFO_REG : integer := 7;
Constant IPIF_RDFIFO_DATA : integer := 8;
Constant IPIF_CHDMA_CHANNELS : integer := 9;
Constant IPIF_CHDMA_GLOBAL_REGS : integer := 10;
Constant CHDMA_STATUS_FIFO : integer := 90;
-- Some predefined user module aliases
Constant USER_00 : integer := 100;
Constant USER_01 : integer := 101;
Constant USER_02 : integer := 102;
Constant USER_03 : integer := 103;
Constant USER_04 : integer := 104;
Constant USER_05 : integer := 105;
Constant USER_06 : integer := 106;
Constant USER_07 : integer := 107;
Constant USER_08 : integer := 108;
Constant USER_09 : integer := 109;
Constant USER_10 : integer := 110;
Constant USER_11 : integer := 111;
Constant USER_12 : integer := 112;
Constant USER_13 : integer := 113;
Constant USER_14 : integer := 114;
Constant USER_15 : integer := 115;
Constant USER_16 : integer := 116;
---( Start of Dependent Properties declarations
--------------------------------------------------------------------------------
-- Declarations for Dependent Properties (properties that depend on the type of
-- the address range, or in other words, address-range-specific parameters).
-- There is one property, i.e. one parameter, encoded as an integer at
-- each index of the properties array. There is one properties array for
-- each address range.
--
-- The C_ARD_DEPENDENT_PROPS_ARRAY generic parameter in (most) IPIFs is such
-- a properties array and it is usually giving its (static) value using a
-- VHDL aggregate construct. (--ToDo, give an example of this.)
--
-- The the "assigned" default value of a dependent property is zero. This value
-- is usually specified the aggregate by leaving its (index) name out so that
-- it is covered by an "others => 0" choice in the aggregate. Some parameters,
-- as noted in the definitions, below, have an "effective" default value that is
-- different from the assigned default value of zero. In such cases, the
-- function, eff_dp, given below, can be used to get the effective value of
-- the dependent property.
--------------------------------------------------------------------------------
constant DEPENDENT_PROPS_SIZE : integer := 32;
subtype DEPENDENT_PROPS_TYPE
is INTEGER_ARRAY_TYPE(0 to DEPENDENT_PROPS_SIZE-1);
type DEPENDENT_PROPS_ARRAY_TYPE
is array (natural range <>) of DEPENDENT_PROPS_TYPE;
--------------------------------------------------------------------------------
-- Below are the indices of dependent properties for the different types of
-- address ranges.
--
-- Example: Let C_ARD_DEPENDENT_PROPS_ARRAY hold the dependent properites
-- for a set of address ranges. Then, e.g.,
--
-- C_ARD_DEPENDENT_PROPS_ARRAY(i)(FIFO_CAPACITY_BITS)
--
-- gives the fifo capacity in bits, provided that the i'th address range
-- is of type IPIF_WRFIFO_DATA or IPIF_RDFIFO_DATA.
--
-- These indices should be referenced only by the names below and never
-- by numerical literals. (The right to change numerical index assignments
-- is reserved; applications using the names will not be affected by such
-- reassignments.)
--------------------------------------------------------------------------------
--
--ToDo, if the interrupt controller parameterization is ever moved to
-- C_ARD_DEPENDENT_PROPS_ARRAY, then the following declarations
-- could be uncommented and used.
---- IPIF_INTR IDX
---------------------------------------------------------------------------- ---
constant EXCLUDE_DEV_ISC : integer := 0;
-- 1 specifies that only the global interrupt
-- enable is present in the device interrupt source
-- controller and that the only source of interrupts
-- in the device is the IP interrupt source controller.
-- 0 specifies that the full device interrupt
-- source controller structure will be included.
constant INCLUDE_DEV_PENCODER : integer := 1;
-- 1 will include the Device IID in the device interrupt
-- source controller, 0 will exclude it.
--
-- IPIF_WRFIFO_DATA or IPIF_RDFIFO_DATA IDX
---------------------------------------------------------------------------- ---
constant FIFO_CAPACITY_BITS : integer := 0;
constant WR_WIDTH_BITS : integer := 1;
constant RD_WIDTH_BITS : integer := 2;
constant EXCLUDE_PACKET_MODE : integer := 3;
-- 1 Don't include packet mode features
-- 0 Include packet mode features
constant EXCLUDE_VACANCY : integer := 4;
-- 1 Don't include vacancy calculation
-- 0 Include vacancy calculation
-- See also the functions
-- bits_needed_for_vac and
-- bits_needed_for_occ that are declared below.
constant INCLUDE_DRE : integer := 5;
constant INCLUDE_AUTOPUSH_POP : integer := 6;
constant AUTOPUSH_POP_CE : integer := 7;
constant INCLUDE_CSUM : integer := 8;
--------------------------------------------------------------------------------
--
-- DMA_SG IDX
---------------------------------------------------------------------------- ---
--------------------------------------------------------------------------------
-- IPIF_CHDMA_CHANNELS IDX
---------------------------------------------------------------------------- ---
constant NUM_SUBS_FOR_PHYS_0 : integer :=0;
constant NUM_SUBS_FOR_PHYS_1 : integer :=1;
constant NUM_SUBS_FOR_PHYS_2 : integer :=2;
constant NUM_SUBS_FOR_PHYS_3 : integer :=3;
constant NUM_SUBS_FOR_PHYS_4 : integer :=4;
constant NUM_SUBS_FOR_PHYS_5 : integer :=5;
constant NUM_SUBS_FOR_PHYS_6 : integer :=6;
constant NUM_SUBS_FOR_PHYS_7 : integer :=7;
constant NUM_SUBS_FOR_PHYS_8 : integer :=8;
constant NUM_SUBS_FOR_PHYS_9 : integer :=9;
constant NUM_SUBS_FOR_PHYS_10 : integer :=10;
constant NUM_SUBS_FOR_PHYS_11 : integer :=11;
constant NUM_SUBS_FOR_PHYS_12 : integer :=12;
constant NUM_SUBS_FOR_PHYS_13 : integer :=13;
constant NUM_SUBS_FOR_PHYS_14 : integer :=14;
constant NUM_SUBS_FOR_PHYS_15 : integer :=15;
-- Gives the number of sub-channels for physical channel i.
--
-- These constants, which will be MAX_NUM_PHYS_CHANNELS in number (see
-- below), have consecutive values starting with 0 for
-- NUM_SUBS_FOR_PHYS_0. (The constants serve the purpose of giving symbolic
-- names for use in the dependent-properties aggregates that parameterize
-- an IPIF_CHDMA_CHANNELS address range.)
--
-- [Users can ignore this note for developers
-- If the number of physical channels changes, both the
-- IPIF_CHDMA_CHANNELS constants and MAX_NUM_PHYS_CHANNELS,
-- below, must be adjusted.
-- (Use of an array constant or a function of the form
-- NUM_SUBS_FOR_PHYS(i) to define the indices
-- runs afoul of LRM restrictions on non-locally static aggregate
-- choices. (Further, the LRM imposes perhaps unnecessarily
-- strict limits on what qualifies as a locally static primary.)
-- Note: This information is supplied for the benefit of anyone seeking
-- to improve the way that these NUM_SUBS_FOR_PHYS parameter
-- indices are defined.)
-- End of note for developers ]
--
-- The value associated with any index NUM_SUBS_FOR_PHYS_i in the
-- dependent-properties array must be even since TX and RX channels
-- come in pairs with the TX followed immediately by
-- the corresponding RX.
--
constant NUM_SIMPLE_DMA_CHANS : integer :=16;
-- The number of simple DMA channels.
constant NUM_SIMPLE_SG_CHANS : integer :=17;
-- The number of simple SG channels.
constant INTR_COALESCE : integer :=18;
-- 0 Interrupt coalescing is disabled
-- 1 Interrupt coalescing is enabled
constant CLK_PERIOD_PS : integer :=19;
-- The period of the OPB Bus clock in ps.
-- The default value of 0 is a special value that
-- is synonymous with 10000 ps (10 ns).
-- The value for CLK_PERIOD_PS is relevant only if (INTR_COALESCE = 1).
constant PACKET_WAIT_UNIT_NS : integer :=20;
-- Gives the unit for used for timing of pack-wait bounds.
-- The default value of 0 is a special value that
-- is synonymous with 1,000,000 ns (1 ms) and a non-default
-- value is typically only used for testing.
-- Relevant only if (INTR_COALESCE = 1).
constant BURST_SIZE : integer :=21;
-- 1, 2, 4, 8 or 16
-- The default value of 0 is a special value that
-- is synonymous with a burst size of 16.
-- Setting the BURST_SIZE to 1 effectively disables
-- bursts.
constant REMAINDER_AS_SINGLES : integer :=22;
-- 0 Remainder handled as a short burst
-- 1 Remainder handled as a series of singles
--------------------------------------------------------------------------------
-- The constant below is not the index of a dependent-properties
-- parameter (and, as such, would never appear as a choice in a
-- dependent-properties aggregate). Rather, it is fixed to the maximum
-- number of physical channels that an Address Range of type
-- IPIF_CHDMA_CHANNELS supports. It must be maintained in conjuction with
-- the constants named, e.g., NUM_SUBS_FOR_PHYS_15, above.
--------------------------------------------------------------------------------
constant MAX_NUM_PHYS_CHANNELS : natural := 16;
--------------------------------------------------------------------------
-- EXAMPLE: Here is an example dependent-properties aggregate for an
-- address range of type IPIF_CHDMA_CHANNELS.
-- To have a compact list of all of the CHDMA parameters, all are
-- shown, however three are commented out and the unneeded
-- MUM_SUBS_FOR_PHYS_x are excluded. The "OTHERS => 0" association
-- gives these parameters their default values, such that, for the example
--
-- - All physical channels above 2 have zero subchannels (effectively,
-- these physical channels are not used)
-- - There are no simple SG channels
-- - The packet-wait time unit is 1 ms
-- - Burst size is 16
--------------------------------------------------------------------------
-- (
-- NUM_SUBS_FOR_PHYS_0 => 8,
-- NUM_SUBS_FOR_PHYS_1 => 4,
-- NUM_SUBS_FOR_PHYS_2 => 14,
-- NUM_SIMPLE_DMA_CHANS => 1,
-- --NUM_SIMPLE_SG_CHANS => 5,
-- INTR_COALESCE => 1,
-- CLK_PERIOD_PS => 20000,
-- --PACKET_WAIT_UNIT_NS => 50000,
-- --BURST_SIZE => 1,
-- REMAINDER_AS_SINGLES => 1,
-- OTHERS => 0
-- )
--
--------------------------------------------------------------------------------
--------------------------------------------------------------------------------
-- Calculates the number of bits needed to convey the vacancy (emptiness) of
-- the fifo described by dependent_props, if fifo_present. If not fifo_present,
-- returns 0 (or the smallest value allowed by tool limitations on null arrays)
-- without making reference to dependent_props.
--------------------------------------------------------------------------------
function bits_needed_for_vac(
fifo_present: boolean;
dependent_props : DEPENDENT_PROPS_TYPE
) return integer;
--------------------------------------------------------------------------------
-- Calculates the number of bits needed to convey the occupancy (fullness) of
-- the fifo described by dependent_props, if fifo_present. If not fifo_present,
-- returns 0 (or the smallest value allowed by tool limitations on null arrays)
-- without making reference to dependent_props.
--------------------------------------------------------------------------------
function bits_needed_for_occ(
fifo_present: boolean;
dependent_props : DEPENDENT_PROPS_TYPE
) return integer;
--------------------------------------------------------------------------------
-- Function eff_dp.
--
-- For some of the dependent properties, the default value of zero is meant
-- to imply an effective default value of other than zero (see e.g.
-- PKT_WAIT_UNIT_NS for the IPIF_CHDMA_CHANNELS address-range type). The
-- following function is used to get the (possibly default-adjusted)
-- value for a dependent property.
--
-- Example call:
--
-- eff_value_of_param :=
-- eff_dp(
-- C_IPIF_CHDMA_CHANNELS,
-- PACKET_WAIT_UNIT_NS,
-- C_ARD_DEPENDENT_PROPS_ARRAY(i)(PACKET_WAIT_UNIT_NS)
-- );
--
-- where C_ARD_DEPENDENT_PROPS_ARRAY(i) is an object of type
-- DEPENDENT_PROPS_ARRAY_TYPE, that was parameterized for an address range of
-- type C_IPIF_CHDMA_CHANNELS.
--------------------------------------------------------------------------------
function eff_dp(id : integer; -- The type of address range.
dep_prop : integer; -- The index of the dependent prop.
value : integer -- The value at that index.
) return integer; -- The effective value, possibly adjusted
-- if value has the default value of 0.
---) End of Dependent Properties declarations
--------------------------------------------------------------------------------
-- Declarations for Common Properties (properties that apply regardless of the
-- type of the address range). Structurally, these work the same as
-- the dependent properties.
--------------------------------------------------------------------------------
constant COMMON_PROPS_SIZE : integer := 2;
subtype COMMON_PROPS_TYPE
is INTEGER_ARRAY_TYPE(0 to COMMON_PROPS_SIZE-1);
type COMMON_PROPS_ARRAY_TYPE
is array (natural range <>) of COMMON_PROPS_TYPE;
--------------------------------------------------------------------------------
-- Below are the indices of the common properties.
--
-- These indices should be referenced only by the names below and never
-- by numerical literals.
-- IDX
---------------------------------------------------------------------------- ---
constant KEYHOLE_BURST : integer := 0;
-- 1 All addresses of a burst are forced to the initial
-- address of the burst.
-- 0 Burst addresses follow the bus protocol.
-- IP interrupt mode array constants
Constant INTR_PASS_THRU : integer := 1;
Constant INTR_PASS_THRU_INV : integer := 2;
Constant INTR_REG_EVENT : integer := 3;
Constant INTR_REG_EVENT_INV : integer := 4;
Constant INTR_POS_EDGE_DETECT : integer := 5;
Constant INTR_NEG_EDGE_DETECT : integer := 6;
end ipif_pkg;
package body ipif_pkg is
-------------------------------------------------------------------------------
-- Function log2 -- returns number of bits needed to encode x choices
-- x = 0 returns 0
-- x = 1 returns 0
-- x = 2 returns 1
-- x = 4 returns 2, etc.
-------------------------------------------------------------------------------
--
function log2(x : natural) return integer is
variable i : integer := 0;
variable val: integer := 1;
begin
if x = 0 then return 0;
else
for j in 0 to 29 loop -- for loop for XST
if val >= x then null;
else
i := i+1;
val := val*2;
end if;
end loop;
-- Fix per CR520627 XST was ignoring this anyway and printing a
-- Warning in SRP file. This will get rid of the warning and not
-- impact simulation.
-- synthesis translate_off
assert val >= x
report "Function log2 received argument larger" &
" than its capability of 2^30. "
severity failure;
-- synthesis translate_on
return i;
end if;
end function log2;
--------------------------------------------------------------------------------
-- Function clog2 - returns the integer ceiling of the base 2 logarithm of x,
-- i.e., the least integer greater than or equal to log2(x).
--------------------------------------------------------------------------------
function clog2(x : positive) return natural is
variable r : natural := 0;
variable rp : natural := 1; -- rp tracks the value 2**r
begin
while rp < x loop -- Termination condition T: x <= 2**r
-- Loop invariant L: 2**(r-1) < x
r := r + 1;
if rp > integer'high - rp then exit; end if; -- If doubling rp overflows
-- the integer range, the doubled value would exceed x, so safe to exit.
rp := rp + rp;
end loop;
-- L and T <-> 2**(r-1) < x <= 2**r <-> (r-1) < log2(x) <= r
return r; --
end clog2;
-------------------------------------------------------------------------------
-- Function Definitions
-------------------------------------------------------------------------------
-----------------------------------------------------------------------------
-- Function "="
--
-- This function can be used to overload the "=" operator when comparing
-- strings.
-----------------------------------------------------------------------------
function "=" (s1: in string; s2: in string) return boolean is
constant tc: character := ' '; -- string termination character
variable i: integer := 1;
variable v1 : string(1 to s1'length) := s1;
variable v2 : string(1 to s2'length) := s2;
begin
while (i <= v1'length) and (v1(i) /= tc) and
(i <= v2'length) and (v2(i) /= tc) and
(v1(i) = v2(i))
loop
i := i+1;
end loop;
return ((i > v1'length) or (v1(i) = tc)) and
((i > v2'length) or (v2(i) = tc));
end;
----------------------------------------------------------------------------
-- Function equaluseCase
--
-- This function returns true if case sensitive string comparison determines
-- that str1 and str2 are the same.
-----------------------------------------------------------------------------
FUNCTION equaluseCase( str1, str2 : STRING ) RETURN BOOLEAN IS
CONSTANT len1 : INTEGER := str1'length;
CONSTANT len2 : INTEGER := str2'length;
VARIABLE equal : BOOLEAN := TRUE;
BEGIN
IF NOT (len1=len2) THEN
equal := FALSE;
ELSE
FOR i IN str1'range LOOP
IF NOT (str1(i) = str2(i)) THEN
equal := FALSE;
END IF;
END LOOP;
END IF;
RETURN equal;
END equaluseCase;
-----------------------------------------------------------------------------
-- Function calc_num_ce
--
-- This function is used to process the array specifying the number of Chip
-- Enables required for a Base Address specification. The array is input to
-- the function and an integer is returned reflecting the total number of
-- Chip Enables required for the CE, RdCE, and WrCE Buses
-----------------------------------------------------------------------------
function calc_num_ce (ce_num_array : INTEGER_ARRAY_TYPE) return integer is
Variable ce_num_sum : integer := 0;
begin
for i in 0 to (ce_num_array'length)-1 loop
ce_num_sum := ce_num_sum + ce_num_array(i);
End loop;
return(ce_num_sum);
end function calc_num_ce;
-----------------------------------------------------------------------------
-- Function calc_start_ce_index
--
-- This function is used to process the array specifying the number of Chip
-- Enables required for a Base Address specification. The CE Size array is
-- input to the function and an integer index representing the index of the
-- target module in the ce_num_array. An integer is returned reflecting the
-- starting index of the assigned Chip Enables within the CE, RdCE, and
-- WrCE Buses.
-----------------------------------------------------------------------------
function calc_start_ce_index (ce_num_array : INTEGER_ARRAY_TYPE;
index : integer) return integer is
Variable ce_num_sum : integer := 0;
begin
If (index = 0) Then
ce_num_sum := 0;
else
for i in 0 to index-1 loop
ce_num_sum := ce_num_sum + ce_num_array(i);
End loop;
End if;
return(ce_num_sum);
end function calc_start_ce_index;
-----------------------------------------------------------------------------
-- Function get_min_dwidth
--
-- This function is used to process the array specifying the data bus width
-- for each of the target modules. The dwidth_array is input to the function
-- and an integer is returned that is the smallest value found of all the
-- entries in the array.
-----------------------------------------------------------------------------
function get_min_dwidth (dwidth_array: INTEGER_ARRAY_TYPE) return integer is
Variable temp_min : Integer := 1024;
begin
for i in 0 to dwidth_array'length-1 loop
If (dwidth_array(i) < temp_min) Then
temp_min := dwidth_array(i);
else
null;
End if;
End loop;
return(temp_min);
end function get_min_dwidth;
-----------------------------------------------------------------------------
-- Function get_max_dwidth
--
-- This function is used to process the array specifying the data bus width
-- for each of the target modules. The dwidth_array is input to the function
-- and an integer is returned that is the largest value found of all the
-- entries in the array.
-----------------------------------------------------------------------------
function get_max_dwidth (dwidth_array: INTEGER_ARRAY_TYPE) return integer is
Variable temp_max : Integer := 0;
begin
for i in 0 to dwidth_array'length-1 loop
If (dwidth_array(i) > temp_max) Then
temp_max := dwidth_array(i);
else
null;
End if;
End loop;
return(temp_max);
end function get_max_dwidth;
-----------------------------------------------------------------------------
-- Function S32
--
-- This function is used to expand an input string to 32 characters by
-- padding with spaces. If the input string is larger than 32 characters,
-- it will truncate to 32 characters.
-----------------------------------------------------------------------------
function S32 (in_string : string) return string is
constant OUTPUT_STRING_LENGTH : integer := 32;
Constant space : character := ' ';
variable new_string : string(1 to 32);
Variable start_index : Integer := in_string'length+1;
begin
If (in_string'length < OUTPUT_STRING_LENGTH) Then
for i in 1 to in_string'length loop
new_string(i) := in_string(i);
End loop;
for j in start_index to OUTPUT_STRING_LENGTH loop
new_string(j) := space;
End loop;
else -- use first 32 chars of in_string (truncate the rest)
for k in 1 to OUTPUT_STRING_LENGTH loop
new_string(k) := in_string(k);
End loop;
End if;
return(new_string);
end function S32;
-----------------------------------------------------------------------------
-- Function get_id_index
--
-- This function is used to process the array specifying the target function
-- assigned to a Base Address pair address range. The id_array and a
-- id number is input to the function. A integer is returned reflecting the
-- array index of the id matching the id input number. This function
-- should only be called if the id number is known to exist in the
-- name_array input. This can be detirmined by using the find_ard_id
-- function.
-----------------------------------------------------------------------------
function get_id_index (id_array :INTEGER_ARRAY_TYPE;
id : integer) return integer is
Variable match : Boolean := false;
Variable match_index : Integer := 10000; -- a really big number!
begin
for array_index in 0 to id_array'length-1 loop
If (match = true) Then -- match already found so do nothing
null;
else -- compare the numbers one by one
match := (id_array(array_index) = id);
If (match) Then
match_index := array_index;
else
null;
End if;
End if;
End loop;
return(match_index);
end function get_id_index;
--------------------------------------------------------------------------------
-- get_id_index but return a value in bounds on error (iboe).
--
-- This function is the same as get_id_index, except that when id does
-- not exist in id_array, the value returned is any index that is
-- within the index range of id_array.
--
-- This function would normally only be used where function find_ard_id
-- is used to establish the existence of id but, even when non-existent,
-- an element of one of the ARD arrays will be computed from the
-- returned get_id_index_iboe value. See, e.g., function bits_needed_for_vac
-- and the example call, below
--
-- bits_needed_for_vac(
-- find_ard_id(C_ARD_ID_ARRAY, IPIF_RDFIFO_DATA),
-- C_ARD_DEPENDENT_PROPS_ARRAY(get_id_index_iboe(C_ARD_ID_ARRAY,
-- IPIF_RDFIFO_DATA))
-- )
--------------------------------------------------------------------------------
function get_id_index_iboe (id_array :INTEGER_ARRAY_TYPE;
id : integer) return integer is
Variable match : Boolean := false;
Variable match_index : Integer := id_array'left; -- any valid array index
begin
for array_index in 0 to id_array'length-1 loop
If (match = true) Then -- match already found so do nothing
null;
else -- compare the numbers one by one
match := (id_array(array_index) = id);
If (match) Then match_index := array_index;
else null;
End if;
End if;
End loop;
return(match_index);
end function get_id_index_iboe;
-----------------------------------------------------------------------------
-- Function find_ard_id
--
-- This function is used to process the array specifying the target function
-- assigned to a Base Address pair address range. The id_array and a
-- integer id is input to the function. A boolean is returned reflecting the
-- presence (or not) of a number in the array matching the id input number.
-----------------------------------------------------------------------------
function find_ard_id (id_array : INTEGER_ARRAY_TYPE;
id : integer) return boolean is
Variable match : Boolean := false;
begin
for array_index in 0 to id_array'length-1 loop
If (match = true) Then -- match already found so do nothing
null;
else -- compare the numbers one by one
match := (id_array(array_index) = id);
End if;
End loop;
return(match);
end function find_ard_id;
-----------------------------------------------------------------------------
-- Function find_id_dwidth
--
-- This function is used to find the data width of a target module. If the
-- target module exists, the data width is extracted from the input dwidth
-- array. If the module is not in the ID array, the default input is
-- returned. This function is needed to assign data port size constraints on
-- unconstrained port widths.
-----------------------------------------------------------------------------
function find_id_dwidth (id_array : INTEGER_ARRAY_TYPE;
dwidth_array: INTEGER_ARRAY_TYPE;
id : integer;
default : integer) return integer is
Variable id_present : Boolean := false;
Variable array_index : Integer := 0;
Variable dwidth : Integer := default;
begin
id_present := find_ard_id(id_array, id);
If (id_present) Then
array_index := get_id_index (id_array, id);
dwidth := dwidth_array(array_index);
else
null; -- use default input
End if;
Return (dwidth);
end function find_id_dwidth;
-----------------------------------------------------------------------------
-- Function cnt_ipif_id_blks
--
-- This function is used to detirmine the number of IPIF components specified
-- in the ARD ID Array. An integer is returned representing the number
-- of elements counted. User IDs are ignored in the counting process.
-----------------------------------------------------------------------------
function cnt_ipif_id_blks (id_array : INTEGER_ARRAY_TYPE)
return integer is
Variable blk_count : integer := 0;
Variable temp_id : integer;
begin
for array_index in 0 to id_array'length-1 loop
temp_id := id_array(array_index);
If (temp_id = IPIF_WRFIFO_DATA or
temp_id = IPIF_RDFIFO_DATA or
temp_id = IPIF_RST or
temp_id = IPIF_INTR or
temp_id = IPIF_DMA_SG or
temp_id = IPIF_SESR_SEAR
) Then -- IPIF block found
blk_count := blk_count+1;
else -- go to next loop iteration
null;
End if;
End loop;
return(blk_count);
end function cnt_ipif_id_blks;
-----------------------------------------------------------------------------
-- Function get_ipif_id_dbus_index
--
-- This function is used to detirmine the IPIF relative index of a given
-- ID value. User IDs are ignored in the index detirmination.
-----------------------------------------------------------------------------
function get_ipif_id_dbus_index (id_array : INTEGER_ARRAY_TYPE;
id : integer)
return integer is
Variable blk_index : integer := 0;
Variable temp_id : integer;
Variable id_found : Boolean := false;
begin
for array_index in 0 to id_array'length-1 loop
temp_id := id_array(array_index);
If (id_found) then
null;
elsif (temp_id = id) then
id_found := true;
elsif (temp_id = IPIF_WRFIFO_DATA or
temp_id = IPIF_RDFIFO_DATA or
temp_id = IPIF_RST or
temp_id = IPIF_INTR or
temp_id = IPIF_DMA_SG or
temp_id = IPIF_SESR_SEAR
) Then -- IPIF block found
blk_index := blk_index+1;
else -- user block so do nothing
null;
End if;
End loop;
return(blk_index);
end function get_ipif_id_dbus_index;
------------------------------------------------------------------------------
-- Function: rebuild_slv32_array
--
-- Description:
-- This function takes an input slv32 array and rebuilds an output slv32
-- array composed of the first "num_valid_entry" elements from the input
-- array.
------------------------------------------------------------------------------
function rebuild_slv32_array (slv32_array : SLV32_ARRAY_TYPE;
num_valid_pairs : integer)
return SLV32_ARRAY_TYPE is
--Constants
constant num_elements : Integer := num_valid_pairs * 2;
-- Variables
variable temp_baseaddr32_array : SLV32_ARRAY_TYPE( 0 to num_elements-1);
begin
for array_index in 0 to num_elements-1 loop
temp_baseaddr32_array(array_index) := slv32_array(array_index);
end loop;
return(temp_baseaddr32_array);
end function rebuild_slv32_array;
------------------------------------------------------------------------------
-- Function: rebuild_slv64_array
--
-- Description:
-- This function takes an input slv64 array and rebuilds an output slv64
-- array composed of the first "num_valid_entry" elements from the input
-- array.
------------------------------------------------------------------------------
function rebuild_slv64_array (slv64_array : SLV64_ARRAY_TYPE;
num_valid_pairs : integer)
return SLV64_ARRAY_TYPE is
--Constants
constant num_elements : Integer := num_valid_pairs * 2;
-- Variables
variable temp_baseaddr64_array : SLV64_ARRAY_TYPE( 0 to num_elements-1);
begin
for array_index in 0 to num_elements-1 loop
temp_baseaddr64_array(array_index) := slv64_array(array_index);
end loop;
return(temp_baseaddr64_array);
end function rebuild_slv64_array;
------------------------------------------------------------------------------
-- Function: rebuild_int_array
--
-- Description:
-- This function takes an input integer array and rebuilds an output integer
-- array composed of the first "num_valid_entry" elements from the input
-- array.
------------------------------------------------------------------------------
function rebuild_int_array (int_array : INTEGER_ARRAY_TYPE;
num_valid_entry : integer)
return INTEGER_ARRAY_TYPE is
-- Variables
variable temp_int_array : INTEGER_ARRAY_TYPE( 0 to num_valid_entry-1);
begin
for array_index in 0 to num_valid_entry-1 loop
temp_int_array(array_index) := int_array(array_index);
end loop;
return(temp_int_array);
end function rebuild_int_array;
function bits_needed_for_vac(
fifo_present: boolean;
dependent_props : DEPENDENT_PROPS_TYPE
) return integer is
begin
if not fifo_present then
return 1; -- Zero would be better but leads to "0 to -1" null
-- ranges that are not handled by XST Flint or earlier
-- because of the negative index.
else
return
log2(1 + dependent_props(FIFO_CAPACITY_BITS) /
dependent_props(RD_WIDTH_BITS)
);
end if;
end function bits_needed_for_vac;
function bits_needed_for_occ(
fifo_present: boolean;
dependent_props : DEPENDENT_PROPS_TYPE
) return integer is
begin
if not fifo_present then
return 1; -- Zero would be better but leads to "0 to -1" null
-- ranges that are not handled by XST Flint or earlier
-- because of the negative index.
else
return
log2(1 + dependent_props(FIFO_CAPACITY_BITS) /
dependent_props(WR_WIDTH_BITS)
);
end if;
end function bits_needed_for_occ;
function eff_dp(id : integer;
dep_prop : integer;
value : integer) return integer is
variable dp : integer := dep_prop;
type bo2na_type is array (boolean) of natural;
constant bo2na : bo2na_type := (0, 1);
begin
if value /= 0 then return value; end if; -- Not default
case id is
when IPIF_CHDMA_CHANNELS =>
-------------------
return( bo2na(dp = CLK_PERIOD_PS ) * 10000
+ bo2na(dp = PACKET_WAIT_UNIT_NS ) * 1000000
+ bo2na(dp = BURST_SIZE ) * 16
);
when others => return 0;
end case;
end eff_dp;
function populate_intr_mode_array (num_user_intr : integer;
intr_capture_mode : integer)
return INTEGER_ARRAY_TYPE is
variable intr_mode_array : INTEGER_ARRAY_TYPE(0 to num_user_intr-1);
begin
for i in 0 to num_user_intr-1 loop
intr_mode_array(i) := intr_capture_mode;
end loop;
return intr_mode_array;
end function populate_intr_mode_array;
function add_intr_ard_id_array(include_intr : boolean;
ard_id_array : INTEGER_ARRAY_TYPE)
return INTEGER_ARRAY_TYPE is
variable intr_ard_id_array : INTEGER_ARRAY_TYPE(0 to ard_id_array'length);
begin
intr_ard_id_array(0 to ard_id_array'length-1) := ard_id_array;
if include_intr then
intr_ard_id_array(ard_id_array'length) := IPIF_INTR;
return intr_ard_id_array;
else
return ard_id_array;
end if;
end function add_intr_ard_id_array;
function add_intr_ard_addr_range_array(include_intr : boolean;
ZERO_ADDR_PAD : std_logic_vector;
intr_baseaddr : std_logic_vector;
intr_highaddr : std_logic_vector;
ard_id_array : INTEGER_ARRAY_TYPE;
ard_addr_range_array : SLV64_ARRAY_TYPE)
return SLV64_ARRAY_TYPE is
variable intr_ard_addr_range_array : SLV64_ARRAY_TYPE(0 to ard_addr_range_array'length+1);
begin
intr_ard_addr_range_array(0 to ard_addr_range_array'length-1) := ard_addr_range_array;
if include_intr then
intr_ard_addr_range_array(2*get_id_index(ard_id_array,IPIF_INTR))
:= ZERO_ADDR_PAD & intr_baseaddr;
intr_ard_addr_range_array(2*get_id_index(ard_id_array,IPIF_INTR)+1)
:= ZERO_ADDR_PAD & intr_highaddr;
return intr_ard_addr_range_array;
else
return ard_addr_range_array;
end if;
end function add_intr_ard_addr_range_array;
function add_intr_ard_dwidth_array(include_intr : boolean;
intr_dwidth : integer;
ard_id_array : INTEGER_ARRAY_TYPE;
ard_dwidth_array : INTEGER_ARRAY_TYPE)
return INTEGER_ARRAY_TYPE is
variable intr_ard_dwidth_array : INTEGER_ARRAY_TYPE(0 to ard_dwidth_array'length);
begin
intr_ard_dwidth_array(0 to ard_dwidth_array'length-1) := ard_dwidth_array;
if include_intr then
intr_ard_dwidth_array(get_id_index(ard_id_array, IPIF_INTR)) := intr_dwidth;
return intr_ard_dwidth_array;
else
return ard_dwidth_array;
end if;
end function add_intr_ard_dwidth_array;
function add_intr_ard_num_ce_array(include_intr : boolean;
ard_id_array : INTEGER_ARRAY_TYPE;
ard_num_ce_array : INTEGER_ARRAY_TYPE)
return INTEGER_ARRAY_TYPE is
variable intr_ard_num_ce_array : INTEGER_ARRAY_TYPE(0 to ard_num_ce_array'length);
begin
intr_ard_num_ce_array(0 to ard_num_ce_array'length-1) := ard_num_ce_array;
if include_intr then
intr_ard_num_ce_array(get_id_index(ard_id_array, IPIF_INTR)) := 16;
return intr_ard_num_ce_array;
else
return ard_num_ce_array;
end if;
end function add_intr_ard_num_ce_array;
end package body ipif_pkg;
|
-- IPIF Common Library Package
-------------------------------------------------------------------------------
--
-- *************************************************************************
-- ** **
-- ** DISCLAIMER OF LIABILITY **
-- ** **
-- ** This text/file contains proprietary, confidential **
-- ** information of Xilinx, Inc., is distributed under **
-- ** license from Xilinx, Inc., and may be used, copied **
-- ** and/or disclosed only pursuant to the terms of a valid **
-- ** license agreement with Xilinx, Inc. Xilinx hereby **
-- ** grants you a license to use this text/file solely for **
-- ** design, simulation, implementation and creation of **
-- ** design files limited to Xilinx devices or technologies. **
-- ** Use with non-Xilinx devices or technologies is expressly **
-- ** prohibited and immediately terminates your license unless **
-- ** covered by a separate agreement. **
-- ** **
-- ** Xilinx is providing this design, code, or information **
-- ** "as-is" solely for use in developing programs and **
-- ** solutions for Xilinx devices, with no obligation on the **
-- ** part of Xilinx to provide support. By providing this design, **
-- ** code, or information as one possible implementation of **
-- ** this feature, application or standard, Xilinx is making no **
-- ** representation that this implementation is free from any **
-- ** claims of infringement. You are responsible for obtaining **
-- ** any rights you may require for your implementation. **
-- ** Xilinx expressly disclaims any warranty whatsoever with **
-- ** respect to the adequacy of the implementation, including **
-- ** but not limited to any warranties or representations that this **
-- ** implementation is free from claims of infringement, implied **
-- ** warranties of merchantability or fitness for a particular **
-- ** purpose. **
-- ** **
-- ** Xilinx products are not intended for use in life support **
-- ** appliances, devices, or systems. Use in such applications is **
-- ** expressly prohibited. **
-- ** **
-- ** Any modifications that are made to the Source Code are **
-- ** done at the users sole risk and will be unsupported. **
-- ** The Xilinx Support Hotline does not have access to source **
-- ** code and therefore cannot answer specific questions related **
-- ** to source HDL. The Xilinx Hotline support of original source **
-- ** code IP shall only address issues and questions related **
-- ** to the standard Netlist version of the core (and thus **
-- ** indirectly, the original core source). **
-- ** **
-- ** Copyright (c) 2002-2010 Xilinx, Inc. All rights reserved. **
-- ** **
-- ** This copyright and support notice must be retained as part **
-- ** of this text at all times. **
-- ** **
-- *************************************************************************
--
-------------------------------------------------------------------------------
-- Filename: ipif_pkg.vhd
-- Version: Intital
-- Description: This file contains the constants and functions used in the
-- ipif common library components.
--
-------------------------------------------------------------------------------
-- Structure:
--
-------------------------------------------------------------------------------
-- Author: DET
-- History:
-- DET 02/21/02 -- Created from proc_common_pkg.vhd
--
-- DET 03/13/02 -- PLB IPIF development updates
-- ^^^^^^
-- - Commented out string types and string functions due to an XST
-- problem with string arrays and functions. THe string array
-- processing functions were replaced with comperable functions
-- operating on integer arrays.
-- ~~~~~~
--
--
-- DET 4/30/2002 Initial
-- ~~~~~~
-- - Added three functions: rebuild_slv32_array, rebuild_slv64_array, and
-- rebuild_int_array to support removal of unused elements from the
-- ARD arrays.
-- ^^^^^^ --
--
-- FLO 8/12/2002
-- ~~~~~~
-- - Added three functions: bits_needed_for_vac, bits_needed_for_occ,
-- and get_id_index_iboe.
-- (Removed provisional functions bits_needed_for_vacancy,
-- bits needed_for_occupancy, and bits_needed_for.)
-- ^^^^^^
--
-- FLO 3/24/2003
-- ~~~~~~
-- - Added dependent property paramters for channelized DMA.
-- - Added common property parameter array type.
-- - Definded the KEYHOLD_BURST common-property parameter.
-- ^^^^^^
--
-- FLO 10/22/2003
-- ~~~~~~
-- - Some adjustment to CHDMA parameterization.
-- - Cleanup of obsolete code and comments. (The former "XST workaround"
-- has become the officially deployed method.)
-- ^^^^^^
--
-- LSS 03/24/2004
-- ~~~~~~
-- - Added 5 functions
-- ^^^^^^
--
-- ALS 09/03/04
-- ^^^^^^
-- -- Added constants to describe the channel protocols used in MCH_OPB_IPIF
-- ~~~~~~
--
-- DET 1/17/2008 v4_0
-- ~~~~~~
-- - Changed proc_common library version to v4_0
-- - Incorporated new disclaimer header
-- ^^^^^^
--
-------------------------------------------------------------------------------
-- Naming Conventions:
-- active low signals: "*_n"
-- clock signals: "clk", "clk_div#", "clk_#x"
-- reset signals: "rst", "rst_n"
-- generics: "C_*"
-- user defined types: "*_TYPE"
-- state machine next state: "*_ns"
-- state machine current state: "*_cs"
-- combinatorial signals: "*_com"
-- pipelined or register delay signals: "*_d#"
-- counter signals: "*cnt*"
-- clock enable signals: "*_ce"
-- internal version of output port "*_i"
-- device pins: "*_pin"
-- ports: - Names begin with Uppercase
-- processes: "*_PROCESS"
-- component instantiations: "<ENTITY_>I_<#|FUNC>
-------------------------------------------------------------------------------
library ieee;
use ieee.std_logic_1164.all;
-- need conversion function to convert reals/integers to std logic vectors
use ieee.std_logic_arith.all;
use ieee.std_logic_arith.all;
use ieee.std_logic_unsigned.all;
package ipif_pkg is
-------------------------------------------------------------------------------
-- Type Declarations
-------------------------------------------------------------------------------
type SLV32_ARRAY_TYPE is array (natural range <>) of std_logic_vector(0 to 31);
subtype SLV64_TYPE is std_logic_vector(0 to 63);
type SLV64_ARRAY_TYPE is array (natural range <>) of SLV64_TYPE;
type INTEGER_ARRAY_TYPE is array (natural range <>) of integer;
-------------------------------------------------------------------------------
-- Function and Procedure Declarations
-------------------------------------------------------------------------------
function "=" (s1: in string; s2: in string) return boolean;
function equaluseCase( str1, str2 : STRING ) RETURN BOOLEAN;
function calc_num_ce (ce_num_array : INTEGER_ARRAY_TYPE) return integer;
function calc_start_ce_index (ce_num_array : INTEGER_ARRAY_TYPE;
index : integer) return integer;
function get_min_dwidth (dwidth_array: INTEGER_ARRAY_TYPE) return integer;
function get_max_dwidth (dwidth_array: INTEGER_ARRAY_TYPE) return integer;
function S32 (in_string : string) return string;
--------------------------------------------------------------------------------
-- ARD support functions.
-- These function can be useful when operating with the ARD parameterization.
--------------------------------------------------------------------------------
function get_id_index (id_array :INTEGER_ARRAY_TYPE;
id : integer)
return integer;
function get_id_index_iboe (id_array :INTEGER_ARRAY_TYPE;
id : integer)
return integer;
function find_ard_id (id_array : INTEGER_ARRAY_TYPE;
id : integer) return boolean;
function find_id_dwidth (id_array : INTEGER_ARRAY_TYPE;
dwidth_array: INTEGER_ARRAY_TYPE;
id : integer;
default : integer)
return integer;
function cnt_ipif_id_blks (id_array : INTEGER_ARRAY_TYPE) return integer;
function get_ipif_id_dbus_index (id_array : INTEGER_ARRAY_TYPE;
id : integer)
return integer ;
function rebuild_slv32_array (slv32_array : SLV32_ARRAY_TYPE;
num_valid_pairs : integer)
return SLV32_ARRAY_TYPE;
function rebuild_slv64_array (slv64_array : SLV64_ARRAY_TYPE;
num_valid_pairs : integer)
return SLV64_ARRAY_TYPE;
function rebuild_int_array (int_array : INTEGER_ARRAY_TYPE;
num_valid_entry : integer)
return INTEGER_ARRAY_TYPE;
-- 5 Functions Added 3/24/04
function populate_intr_mode_array (num_user_intr : integer;
intr_capture_mode : integer)
return INTEGER_ARRAY_TYPE ;
function add_intr_ard_id_array(include_intr : boolean;
ard_id_array : INTEGER_ARRAY_TYPE)
return INTEGER_ARRAY_TYPE;
function add_intr_ard_addr_range_array(include_intr : boolean;
ZERO_ADDR_PAD : std_logic_vector;
intr_baseaddr : std_logic_vector;
intr_highaddr : std_logic_vector;
ard_id_array : INTEGER_ARRAY_TYPE;
ard_addr_range_array : SLV64_ARRAY_TYPE)
return SLV64_ARRAY_TYPE;
function add_intr_ard_num_ce_array(include_intr : boolean;
ard_id_array : INTEGER_ARRAY_TYPE;
ard_num_ce_array : INTEGER_ARRAY_TYPE)
return INTEGER_ARRAY_TYPE;
function add_intr_ard_dwidth_array(include_intr : boolean;
intr_dwidth : integer;
ard_id_array : INTEGER_ARRAY_TYPE;
ard_dwidth_array : INTEGER_ARRAY_TYPE)
return INTEGER_ARRAY_TYPE;
function log2(x : natural) return integer;
function clog2(x : positive) return natural;
-------------------------------------------------------------------------------
-- Constant Declarations
-------------------------------------------------------------------------------
-------------------------------------------------------------------------------
-- Channel Protocols
-- The constant declarations below give symbolic-name aliases for values that
-- can be used in the C_MCH_PROTOCOL_ARRAY generic of the MCH_OPB_IPIF.
-------------------------------------------------------------------------------
constant XCL : integer := 0;
constant DAG : integer := 1;
--------------------------------------------------------------------------------
-- Address range types.
-- The constant declarations, below, give symbolic-name aliases for values
-- that can be used in the C_ARD_ID_ARRAY generic of IPIFs. The first set
-- gives aliases that are used to include IPIF services.
--------------------------------------------------------------------------------
-- IPIF module aliases
Constant IPIF_INTR : integer := 1;
Constant IPIF_RST : integer := 2;
Constant IPIF_SESR_SEAR : integer := 3;
Constant IPIF_DMA_SG : integer := 4;
Constant IPIF_WRFIFO_REG : integer := 5;
Constant IPIF_WRFIFO_DATA : integer := 6;
Constant IPIF_RDFIFO_REG : integer := 7;
Constant IPIF_RDFIFO_DATA : integer := 8;
Constant IPIF_CHDMA_CHANNELS : integer := 9;
Constant IPIF_CHDMA_GLOBAL_REGS : integer := 10;
Constant CHDMA_STATUS_FIFO : integer := 90;
-- Some predefined user module aliases
Constant USER_00 : integer := 100;
Constant USER_01 : integer := 101;
Constant USER_02 : integer := 102;
Constant USER_03 : integer := 103;
Constant USER_04 : integer := 104;
Constant USER_05 : integer := 105;
Constant USER_06 : integer := 106;
Constant USER_07 : integer := 107;
Constant USER_08 : integer := 108;
Constant USER_09 : integer := 109;
Constant USER_10 : integer := 110;
Constant USER_11 : integer := 111;
Constant USER_12 : integer := 112;
Constant USER_13 : integer := 113;
Constant USER_14 : integer := 114;
Constant USER_15 : integer := 115;
Constant USER_16 : integer := 116;
---( Start of Dependent Properties declarations
--------------------------------------------------------------------------------
-- Declarations for Dependent Properties (properties that depend on the type of
-- the address range, or in other words, address-range-specific parameters).
-- There is one property, i.e. one parameter, encoded as an integer at
-- each index of the properties array. There is one properties array for
-- each address range.
--
-- The C_ARD_DEPENDENT_PROPS_ARRAY generic parameter in (most) IPIFs is such
-- a properties array and it is usually giving its (static) value using a
-- VHDL aggregate construct. (--ToDo, give an example of this.)
--
-- The the "assigned" default value of a dependent property is zero. This value
-- is usually specified the aggregate by leaving its (index) name out so that
-- it is covered by an "others => 0" choice in the aggregate. Some parameters,
-- as noted in the definitions, below, have an "effective" default value that is
-- different from the assigned default value of zero. In such cases, the
-- function, eff_dp, given below, can be used to get the effective value of
-- the dependent property.
--------------------------------------------------------------------------------
constant DEPENDENT_PROPS_SIZE : integer := 32;
subtype DEPENDENT_PROPS_TYPE
is INTEGER_ARRAY_TYPE(0 to DEPENDENT_PROPS_SIZE-1);
type DEPENDENT_PROPS_ARRAY_TYPE
is array (natural range <>) of DEPENDENT_PROPS_TYPE;
--------------------------------------------------------------------------------
-- Below are the indices of dependent properties for the different types of
-- address ranges.
--
-- Example: Let C_ARD_DEPENDENT_PROPS_ARRAY hold the dependent properites
-- for a set of address ranges. Then, e.g.,
--
-- C_ARD_DEPENDENT_PROPS_ARRAY(i)(FIFO_CAPACITY_BITS)
--
-- gives the fifo capacity in bits, provided that the i'th address range
-- is of type IPIF_WRFIFO_DATA or IPIF_RDFIFO_DATA.
--
-- These indices should be referenced only by the names below and never
-- by numerical literals. (The right to change numerical index assignments
-- is reserved; applications using the names will not be affected by such
-- reassignments.)
--------------------------------------------------------------------------------
--
--ToDo, if the interrupt controller parameterization is ever moved to
-- C_ARD_DEPENDENT_PROPS_ARRAY, then the following declarations
-- could be uncommented and used.
---- IPIF_INTR IDX
---------------------------------------------------------------------------- ---
constant EXCLUDE_DEV_ISC : integer := 0;
-- 1 specifies that only the global interrupt
-- enable is present in the device interrupt source
-- controller and that the only source of interrupts
-- in the device is the IP interrupt source controller.
-- 0 specifies that the full device interrupt
-- source controller structure will be included.
constant INCLUDE_DEV_PENCODER : integer := 1;
-- 1 will include the Device IID in the device interrupt
-- source controller, 0 will exclude it.
--
-- IPIF_WRFIFO_DATA or IPIF_RDFIFO_DATA IDX
---------------------------------------------------------------------------- ---
constant FIFO_CAPACITY_BITS : integer := 0;
constant WR_WIDTH_BITS : integer := 1;
constant RD_WIDTH_BITS : integer := 2;
constant EXCLUDE_PACKET_MODE : integer := 3;
-- 1 Don't include packet mode features
-- 0 Include packet mode features
constant EXCLUDE_VACANCY : integer := 4;
-- 1 Don't include vacancy calculation
-- 0 Include vacancy calculation
-- See also the functions
-- bits_needed_for_vac and
-- bits_needed_for_occ that are declared below.
constant INCLUDE_DRE : integer := 5;
constant INCLUDE_AUTOPUSH_POP : integer := 6;
constant AUTOPUSH_POP_CE : integer := 7;
constant INCLUDE_CSUM : integer := 8;
--------------------------------------------------------------------------------
--
-- DMA_SG IDX
---------------------------------------------------------------------------- ---
--------------------------------------------------------------------------------
-- IPIF_CHDMA_CHANNELS IDX
---------------------------------------------------------------------------- ---
constant NUM_SUBS_FOR_PHYS_0 : integer :=0;
constant NUM_SUBS_FOR_PHYS_1 : integer :=1;
constant NUM_SUBS_FOR_PHYS_2 : integer :=2;
constant NUM_SUBS_FOR_PHYS_3 : integer :=3;
constant NUM_SUBS_FOR_PHYS_4 : integer :=4;
constant NUM_SUBS_FOR_PHYS_5 : integer :=5;
constant NUM_SUBS_FOR_PHYS_6 : integer :=6;
constant NUM_SUBS_FOR_PHYS_7 : integer :=7;
constant NUM_SUBS_FOR_PHYS_8 : integer :=8;
constant NUM_SUBS_FOR_PHYS_9 : integer :=9;
constant NUM_SUBS_FOR_PHYS_10 : integer :=10;
constant NUM_SUBS_FOR_PHYS_11 : integer :=11;
constant NUM_SUBS_FOR_PHYS_12 : integer :=12;
constant NUM_SUBS_FOR_PHYS_13 : integer :=13;
constant NUM_SUBS_FOR_PHYS_14 : integer :=14;
constant NUM_SUBS_FOR_PHYS_15 : integer :=15;
-- Gives the number of sub-channels for physical channel i.
--
-- These constants, which will be MAX_NUM_PHYS_CHANNELS in number (see
-- below), have consecutive values starting with 0 for
-- NUM_SUBS_FOR_PHYS_0. (The constants serve the purpose of giving symbolic
-- names for use in the dependent-properties aggregates that parameterize
-- an IPIF_CHDMA_CHANNELS address range.)
--
-- [Users can ignore this note for developers
-- If the number of physical channels changes, both the
-- IPIF_CHDMA_CHANNELS constants and MAX_NUM_PHYS_CHANNELS,
-- below, must be adjusted.
-- (Use of an array constant or a function of the form
-- NUM_SUBS_FOR_PHYS(i) to define the indices
-- runs afoul of LRM restrictions on non-locally static aggregate
-- choices. (Further, the LRM imposes perhaps unnecessarily
-- strict limits on what qualifies as a locally static primary.)
-- Note: This information is supplied for the benefit of anyone seeking
-- to improve the way that these NUM_SUBS_FOR_PHYS parameter
-- indices are defined.)
-- End of note for developers ]
--
-- The value associated with any index NUM_SUBS_FOR_PHYS_i in the
-- dependent-properties array must be even since TX and RX channels
-- come in pairs with the TX followed immediately by
-- the corresponding RX.
--
constant NUM_SIMPLE_DMA_CHANS : integer :=16;
-- The number of simple DMA channels.
constant NUM_SIMPLE_SG_CHANS : integer :=17;
-- The number of simple SG channels.
constant INTR_COALESCE : integer :=18;
-- 0 Interrupt coalescing is disabled
-- 1 Interrupt coalescing is enabled
constant CLK_PERIOD_PS : integer :=19;
-- The period of the OPB Bus clock in ps.
-- The default value of 0 is a special value that
-- is synonymous with 10000 ps (10 ns).
-- The value for CLK_PERIOD_PS is relevant only if (INTR_COALESCE = 1).
constant PACKET_WAIT_UNIT_NS : integer :=20;
-- Gives the unit for used for timing of pack-wait bounds.
-- The default value of 0 is a special value that
-- is synonymous with 1,000,000 ns (1 ms) and a non-default
-- value is typically only used for testing.
-- Relevant only if (INTR_COALESCE = 1).
constant BURST_SIZE : integer :=21;
-- 1, 2, 4, 8 or 16
-- The default value of 0 is a special value that
-- is synonymous with a burst size of 16.
-- Setting the BURST_SIZE to 1 effectively disables
-- bursts.
constant REMAINDER_AS_SINGLES : integer :=22;
-- 0 Remainder handled as a short burst
-- 1 Remainder handled as a series of singles
--------------------------------------------------------------------------------
-- The constant below is not the index of a dependent-properties
-- parameter (and, as such, would never appear as a choice in a
-- dependent-properties aggregate). Rather, it is fixed to the maximum
-- number of physical channels that an Address Range of type
-- IPIF_CHDMA_CHANNELS supports. It must be maintained in conjuction with
-- the constants named, e.g., NUM_SUBS_FOR_PHYS_15, above.
--------------------------------------------------------------------------------
constant MAX_NUM_PHYS_CHANNELS : natural := 16;
--------------------------------------------------------------------------
-- EXAMPLE: Here is an example dependent-properties aggregate for an
-- address range of type IPIF_CHDMA_CHANNELS.
-- To have a compact list of all of the CHDMA parameters, all are
-- shown, however three are commented out and the unneeded
-- MUM_SUBS_FOR_PHYS_x are excluded. The "OTHERS => 0" association
-- gives these parameters their default values, such that, for the example
--
-- - All physical channels above 2 have zero subchannels (effectively,
-- these physical channels are not used)
-- - There are no simple SG channels
-- - The packet-wait time unit is 1 ms
-- - Burst size is 16
--------------------------------------------------------------------------
-- (
-- NUM_SUBS_FOR_PHYS_0 => 8,
-- NUM_SUBS_FOR_PHYS_1 => 4,
-- NUM_SUBS_FOR_PHYS_2 => 14,
-- NUM_SIMPLE_DMA_CHANS => 1,
-- --NUM_SIMPLE_SG_CHANS => 5,
-- INTR_COALESCE => 1,
-- CLK_PERIOD_PS => 20000,
-- --PACKET_WAIT_UNIT_NS => 50000,
-- --BURST_SIZE => 1,
-- REMAINDER_AS_SINGLES => 1,
-- OTHERS => 0
-- )
--
--------------------------------------------------------------------------------
--------------------------------------------------------------------------------
-- Calculates the number of bits needed to convey the vacancy (emptiness) of
-- the fifo described by dependent_props, if fifo_present. If not fifo_present,
-- returns 0 (or the smallest value allowed by tool limitations on null arrays)
-- without making reference to dependent_props.
--------------------------------------------------------------------------------
function bits_needed_for_vac(
fifo_present: boolean;
dependent_props : DEPENDENT_PROPS_TYPE
) return integer;
--------------------------------------------------------------------------------
-- Calculates the number of bits needed to convey the occupancy (fullness) of
-- the fifo described by dependent_props, if fifo_present. If not fifo_present,
-- returns 0 (or the smallest value allowed by tool limitations on null arrays)
-- without making reference to dependent_props.
--------------------------------------------------------------------------------
function bits_needed_for_occ(
fifo_present: boolean;
dependent_props : DEPENDENT_PROPS_TYPE
) return integer;
--------------------------------------------------------------------------------
-- Function eff_dp.
--
-- For some of the dependent properties, the default value of zero is meant
-- to imply an effective default value of other than zero (see e.g.
-- PKT_WAIT_UNIT_NS for the IPIF_CHDMA_CHANNELS address-range type). The
-- following function is used to get the (possibly default-adjusted)
-- value for a dependent property.
--
-- Example call:
--
-- eff_value_of_param :=
-- eff_dp(
-- C_IPIF_CHDMA_CHANNELS,
-- PACKET_WAIT_UNIT_NS,
-- C_ARD_DEPENDENT_PROPS_ARRAY(i)(PACKET_WAIT_UNIT_NS)
-- );
--
-- where C_ARD_DEPENDENT_PROPS_ARRAY(i) is an object of type
-- DEPENDENT_PROPS_ARRAY_TYPE, that was parameterized for an address range of
-- type C_IPIF_CHDMA_CHANNELS.
--------------------------------------------------------------------------------
function eff_dp(id : integer; -- The type of address range.
dep_prop : integer; -- The index of the dependent prop.
value : integer -- The value at that index.
) return integer; -- The effective value, possibly adjusted
-- if value has the default value of 0.
---) End of Dependent Properties declarations
--------------------------------------------------------------------------------
-- Declarations for Common Properties (properties that apply regardless of the
-- type of the address range). Structurally, these work the same as
-- the dependent properties.
--------------------------------------------------------------------------------
constant COMMON_PROPS_SIZE : integer := 2;
subtype COMMON_PROPS_TYPE
is INTEGER_ARRAY_TYPE(0 to COMMON_PROPS_SIZE-1);
type COMMON_PROPS_ARRAY_TYPE
is array (natural range <>) of COMMON_PROPS_TYPE;
--------------------------------------------------------------------------------
-- Below are the indices of the common properties.
--
-- These indices should be referenced only by the names below and never
-- by numerical literals.
-- IDX
---------------------------------------------------------------------------- ---
constant KEYHOLE_BURST : integer := 0;
-- 1 All addresses of a burst are forced to the initial
-- address of the burst.
-- 0 Burst addresses follow the bus protocol.
-- IP interrupt mode array constants
Constant INTR_PASS_THRU : integer := 1;
Constant INTR_PASS_THRU_INV : integer := 2;
Constant INTR_REG_EVENT : integer := 3;
Constant INTR_REG_EVENT_INV : integer := 4;
Constant INTR_POS_EDGE_DETECT : integer := 5;
Constant INTR_NEG_EDGE_DETECT : integer := 6;
end ipif_pkg;
package body ipif_pkg is
-------------------------------------------------------------------------------
-- Function log2 -- returns number of bits needed to encode x choices
-- x = 0 returns 0
-- x = 1 returns 0
-- x = 2 returns 1
-- x = 4 returns 2, etc.
-------------------------------------------------------------------------------
--
function log2(x : natural) return integer is
variable i : integer := 0;
variable val: integer := 1;
begin
if x = 0 then return 0;
else
for j in 0 to 29 loop -- for loop for XST
if val >= x then null;
else
i := i+1;
val := val*2;
end if;
end loop;
-- Fix per CR520627 XST was ignoring this anyway and printing a
-- Warning in SRP file. This will get rid of the warning and not
-- impact simulation.
-- synthesis translate_off
assert val >= x
report "Function log2 received argument larger" &
" than its capability of 2^30. "
severity failure;
-- synthesis translate_on
return i;
end if;
end function log2;
--------------------------------------------------------------------------------
-- Function clog2 - returns the integer ceiling of the base 2 logarithm of x,
-- i.e., the least integer greater than or equal to log2(x).
--------------------------------------------------------------------------------
function clog2(x : positive) return natural is
variable r : natural := 0;
variable rp : natural := 1; -- rp tracks the value 2**r
begin
while rp < x loop -- Termination condition T: x <= 2**r
-- Loop invariant L: 2**(r-1) < x
r := r + 1;
if rp > integer'high - rp then exit; end if; -- If doubling rp overflows
-- the integer range, the doubled value would exceed x, so safe to exit.
rp := rp + rp;
end loop;
-- L and T <-> 2**(r-1) < x <= 2**r <-> (r-1) < log2(x) <= r
return r; --
end clog2;
-------------------------------------------------------------------------------
-- Function Definitions
-------------------------------------------------------------------------------
-----------------------------------------------------------------------------
-- Function "="
--
-- This function can be used to overload the "=" operator when comparing
-- strings.
-----------------------------------------------------------------------------
function "=" (s1: in string; s2: in string) return boolean is
constant tc: character := ' '; -- string termination character
variable i: integer := 1;
variable v1 : string(1 to s1'length) := s1;
variable v2 : string(1 to s2'length) := s2;
begin
while (i <= v1'length) and (v1(i) /= tc) and
(i <= v2'length) and (v2(i) /= tc) and
(v1(i) = v2(i))
loop
i := i+1;
end loop;
return ((i > v1'length) or (v1(i) = tc)) and
((i > v2'length) or (v2(i) = tc));
end;
----------------------------------------------------------------------------
-- Function equaluseCase
--
-- This function returns true if case sensitive string comparison determines
-- that str1 and str2 are the same.
-----------------------------------------------------------------------------
FUNCTION equaluseCase( str1, str2 : STRING ) RETURN BOOLEAN IS
CONSTANT len1 : INTEGER := str1'length;
CONSTANT len2 : INTEGER := str2'length;
VARIABLE equal : BOOLEAN := TRUE;
BEGIN
IF NOT (len1=len2) THEN
equal := FALSE;
ELSE
FOR i IN str1'range LOOP
IF NOT (str1(i) = str2(i)) THEN
equal := FALSE;
END IF;
END LOOP;
END IF;
RETURN equal;
END equaluseCase;
-----------------------------------------------------------------------------
-- Function calc_num_ce
--
-- This function is used to process the array specifying the number of Chip
-- Enables required for a Base Address specification. The array is input to
-- the function and an integer is returned reflecting the total number of
-- Chip Enables required for the CE, RdCE, and WrCE Buses
-----------------------------------------------------------------------------
function calc_num_ce (ce_num_array : INTEGER_ARRAY_TYPE) return integer is
Variable ce_num_sum : integer := 0;
begin
for i in 0 to (ce_num_array'length)-1 loop
ce_num_sum := ce_num_sum + ce_num_array(i);
End loop;
return(ce_num_sum);
end function calc_num_ce;
-----------------------------------------------------------------------------
-- Function calc_start_ce_index
--
-- This function is used to process the array specifying the number of Chip
-- Enables required for a Base Address specification. The CE Size array is
-- input to the function and an integer index representing the index of the
-- target module in the ce_num_array. An integer is returned reflecting the
-- starting index of the assigned Chip Enables within the CE, RdCE, and
-- WrCE Buses.
-----------------------------------------------------------------------------
function calc_start_ce_index (ce_num_array : INTEGER_ARRAY_TYPE;
index : integer) return integer is
Variable ce_num_sum : integer := 0;
begin
If (index = 0) Then
ce_num_sum := 0;
else
for i in 0 to index-1 loop
ce_num_sum := ce_num_sum + ce_num_array(i);
End loop;
End if;
return(ce_num_sum);
end function calc_start_ce_index;
-----------------------------------------------------------------------------
-- Function get_min_dwidth
--
-- This function is used to process the array specifying the data bus width
-- for each of the target modules. The dwidth_array is input to the function
-- and an integer is returned that is the smallest value found of all the
-- entries in the array.
-----------------------------------------------------------------------------
function get_min_dwidth (dwidth_array: INTEGER_ARRAY_TYPE) return integer is
Variable temp_min : Integer := 1024;
begin
for i in 0 to dwidth_array'length-1 loop
If (dwidth_array(i) < temp_min) Then
temp_min := dwidth_array(i);
else
null;
End if;
End loop;
return(temp_min);
end function get_min_dwidth;
-----------------------------------------------------------------------------
-- Function get_max_dwidth
--
-- This function is used to process the array specifying the data bus width
-- for each of the target modules. The dwidth_array is input to the function
-- and an integer is returned that is the largest value found of all the
-- entries in the array.
-----------------------------------------------------------------------------
function get_max_dwidth (dwidth_array: INTEGER_ARRAY_TYPE) return integer is
Variable temp_max : Integer := 0;
begin
for i in 0 to dwidth_array'length-1 loop
If (dwidth_array(i) > temp_max) Then
temp_max := dwidth_array(i);
else
null;
End if;
End loop;
return(temp_max);
end function get_max_dwidth;
-----------------------------------------------------------------------------
-- Function S32
--
-- This function is used to expand an input string to 32 characters by
-- padding with spaces. If the input string is larger than 32 characters,
-- it will truncate to 32 characters.
-----------------------------------------------------------------------------
function S32 (in_string : string) return string is
constant OUTPUT_STRING_LENGTH : integer := 32;
Constant space : character := ' ';
variable new_string : string(1 to 32);
Variable start_index : Integer := in_string'length+1;
begin
If (in_string'length < OUTPUT_STRING_LENGTH) Then
for i in 1 to in_string'length loop
new_string(i) := in_string(i);
End loop;
for j in start_index to OUTPUT_STRING_LENGTH loop
new_string(j) := space;
End loop;
else -- use first 32 chars of in_string (truncate the rest)
for k in 1 to OUTPUT_STRING_LENGTH loop
new_string(k) := in_string(k);
End loop;
End if;
return(new_string);
end function S32;
-----------------------------------------------------------------------------
-- Function get_id_index
--
-- This function is used to process the array specifying the target function
-- assigned to a Base Address pair address range. The id_array and a
-- id number is input to the function. A integer is returned reflecting the
-- array index of the id matching the id input number. This function
-- should only be called if the id number is known to exist in the
-- name_array input. This can be detirmined by using the find_ard_id
-- function.
-----------------------------------------------------------------------------
function get_id_index (id_array :INTEGER_ARRAY_TYPE;
id : integer) return integer is
Variable match : Boolean := false;
Variable match_index : Integer := 10000; -- a really big number!
begin
for array_index in 0 to id_array'length-1 loop
If (match = true) Then -- match already found so do nothing
null;
else -- compare the numbers one by one
match := (id_array(array_index) = id);
If (match) Then
match_index := array_index;
else
null;
End if;
End if;
End loop;
return(match_index);
end function get_id_index;
--------------------------------------------------------------------------------
-- get_id_index but return a value in bounds on error (iboe).
--
-- This function is the same as get_id_index, except that when id does
-- not exist in id_array, the value returned is any index that is
-- within the index range of id_array.
--
-- This function would normally only be used where function find_ard_id
-- is used to establish the existence of id but, even when non-existent,
-- an element of one of the ARD arrays will be computed from the
-- returned get_id_index_iboe value. See, e.g., function bits_needed_for_vac
-- and the example call, below
--
-- bits_needed_for_vac(
-- find_ard_id(C_ARD_ID_ARRAY, IPIF_RDFIFO_DATA),
-- C_ARD_DEPENDENT_PROPS_ARRAY(get_id_index_iboe(C_ARD_ID_ARRAY,
-- IPIF_RDFIFO_DATA))
-- )
--------------------------------------------------------------------------------
function get_id_index_iboe (id_array :INTEGER_ARRAY_TYPE;
id : integer) return integer is
Variable match : Boolean := false;
Variable match_index : Integer := id_array'left; -- any valid array index
begin
for array_index in 0 to id_array'length-1 loop
If (match = true) Then -- match already found so do nothing
null;
else -- compare the numbers one by one
match := (id_array(array_index) = id);
If (match) Then match_index := array_index;
else null;
End if;
End if;
End loop;
return(match_index);
end function get_id_index_iboe;
-----------------------------------------------------------------------------
-- Function find_ard_id
--
-- This function is used to process the array specifying the target function
-- assigned to a Base Address pair address range. The id_array and a
-- integer id is input to the function. A boolean is returned reflecting the
-- presence (or not) of a number in the array matching the id input number.
-----------------------------------------------------------------------------
function find_ard_id (id_array : INTEGER_ARRAY_TYPE;
id : integer) return boolean is
Variable match : Boolean := false;
begin
for array_index in 0 to id_array'length-1 loop
If (match = true) Then -- match already found so do nothing
null;
else -- compare the numbers one by one
match := (id_array(array_index) = id);
End if;
End loop;
return(match);
end function find_ard_id;
-----------------------------------------------------------------------------
-- Function find_id_dwidth
--
-- This function is used to find the data width of a target module. If the
-- target module exists, the data width is extracted from the input dwidth
-- array. If the module is not in the ID array, the default input is
-- returned. This function is needed to assign data port size constraints on
-- unconstrained port widths.
-----------------------------------------------------------------------------
function find_id_dwidth (id_array : INTEGER_ARRAY_TYPE;
dwidth_array: INTEGER_ARRAY_TYPE;
id : integer;
default : integer) return integer is
Variable id_present : Boolean := false;
Variable array_index : Integer := 0;
Variable dwidth : Integer := default;
begin
id_present := find_ard_id(id_array, id);
If (id_present) Then
array_index := get_id_index (id_array, id);
dwidth := dwidth_array(array_index);
else
null; -- use default input
End if;
Return (dwidth);
end function find_id_dwidth;
-----------------------------------------------------------------------------
-- Function cnt_ipif_id_blks
--
-- This function is used to detirmine the number of IPIF components specified
-- in the ARD ID Array. An integer is returned representing the number
-- of elements counted. User IDs are ignored in the counting process.
-----------------------------------------------------------------------------
function cnt_ipif_id_blks (id_array : INTEGER_ARRAY_TYPE)
return integer is
Variable blk_count : integer := 0;
Variable temp_id : integer;
begin
for array_index in 0 to id_array'length-1 loop
temp_id := id_array(array_index);
If (temp_id = IPIF_WRFIFO_DATA or
temp_id = IPIF_RDFIFO_DATA or
temp_id = IPIF_RST or
temp_id = IPIF_INTR or
temp_id = IPIF_DMA_SG or
temp_id = IPIF_SESR_SEAR
) Then -- IPIF block found
blk_count := blk_count+1;
else -- go to next loop iteration
null;
End if;
End loop;
return(blk_count);
end function cnt_ipif_id_blks;
-----------------------------------------------------------------------------
-- Function get_ipif_id_dbus_index
--
-- This function is used to detirmine the IPIF relative index of a given
-- ID value. User IDs are ignored in the index detirmination.
-----------------------------------------------------------------------------
function get_ipif_id_dbus_index (id_array : INTEGER_ARRAY_TYPE;
id : integer)
return integer is
Variable blk_index : integer := 0;
Variable temp_id : integer;
Variable id_found : Boolean := false;
begin
for array_index in 0 to id_array'length-1 loop
temp_id := id_array(array_index);
If (id_found) then
null;
elsif (temp_id = id) then
id_found := true;
elsif (temp_id = IPIF_WRFIFO_DATA or
temp_id = IPIF_RDFIFO_DATA or
temp_id = IPIF_RST or
temp_id = IPIF_INTR or
temp_id = IPIF_DMA_SG or
temp_id = IPIF_SESR_SEAR
) Then -- IPIF block found
blk_index := blk_index+1;
else -- user block so do nothing
null;
End if;
End loop;
return(blk_index);
end function get_ipif_id_dbus_index;
------------------------------------------------------------------------------
-- Function: rebuild_slv32_array
--
-- Description:
-- This function takes an input slv32 array and rebuilds an output slv32
-- array composed of the first "num_valid_entry" elements from the input
-- array.
------------------------------------------------------------------------------
function rebuild_slv32_array (slv32_array : SLV32_ARRAY_TYPE;
num_valid_pairs : integer)
return SLV32_ARRAY_TYPE is
--Constants
constant num_elements : Integer := num_valid_pairs * 2;
-- Variables
variable temp_baseaddr32_array : SLV32_ARRAY_TYPE( 0 to num_elements-1);
begin
for array_index in 0 to num_elements-1 loop
temp_baseaddr32_array(array_index) := slv32_array(array_index);
end loop;
return(temp_baseaddr32_array);
end function rebuild_slv32_array;
------------------------------------------------------------------------------
-- Function: rebuild_slv64_array
--
-- Description:
-- This function takes an input slv64 array and rebuilds an output slv64
-- array composed of the first "num_valid_entry" elements from the input
-- array.
------------------------------------------------------------------------------
function rebuild_slv64_array (slv64_array : SLV64_ARRAY_TYPE;
num_valid_pairs : integer)
return SLV64_ARRAY_TYPE is
--Constants
constant num_elements : Integer := num_valid_pairs * 2;
-- Variables
variable temp_baseaddr64_array : SLV64_ARRAY_TYPE( 0 to num_elements-1);
begin
for array_index in 0 to num_elements-1 loop
temp_baseaddr64_array(array_index) := slv64_array(array_index);
end loop;
return(temp_baseaddr64_array);
end function rebuild_slv64_array;
------------------------------------------------------------------------------
-- Function: rebuild_int_array
--
-- Description:
-- This function takes an input integer array and rebuilds an output integer
-- array composed of the first "num_valid_entry" elements from the input
-- array.
------------------------------------------------------------------------------
function rebuild_int_array (int_array : INTEGER_ARRAY_TYPE;
num_valid_entry : integer)
return INTEGER_ARRAY_TYPE is
-- Variables
variable temp_int_array : INTEGER_ARRAY_TYPE( 0 to num_valid_entry-1);
begin
for array_index in 0 to num_valid_entry-1 loop
temp_int_array(array_index) := int_array(array_index);
end loop;
return(temp_int_array);
end function rebuild_int_array;
function bits_needed_for_vac(
fifo_present: boolean;
dependent_props : DEPENDENT_PROPS_TYPE
) return integer is
begin
if not fifo_present then
return 1; -- Zero would be better but leads to "0 to -1" null
-- ranges that are not handled by XST Flint or earlier
-- because of the negative index.
else
return
log2(1 + dependent_props(FIFO_CAPACITY_BITS) /
dependent_props(RD_WIDTH_BITS)
);
end if;
end function bits_needed_for_vac;
function bits_needed_for_occ(
fifo_present: boolean;
dependent_props : DEPENDENT_PROPS_TYPE
) return integer is
begin
if not fifo_present then
return 1; -- Zero would be better but leads to "0 to -1" null
-- ranges that are not handled by XST Flint or earlier
-- because of the negative index.
else
return
log2(1 + dependent_props(FIFO_CAPACITY_BITS) /
dependent_props(WR_WIDTH_BITS)
);
end if;
end function bits_needed_for_occ;
function eff_dp(id : integer;
dep_prop : integer;
value : integer) return integer is
variable dp : integer := dep_prop;
type bo2na_type is array (boolean) of natural;
constant bo2na : bo2na_type := (0, 1);
begin
if value /= 0 then return value; end if; -- Not default
case id is
when IPIF_CHDMA_CHANNELS =>
-------------------
return( bo2na(dp = CLK_PERIOD_PS ) * 10000
+ bo2na(dp = PACKET_WAIT_UNIT_NS ) * 1000000
+ bo2na(dp = BURST_SIZE ) * 16
);
when others => return 0;
end case;
end eff_dp;
function populate_intr_mode_array (num_user_intr : integer;
intr_capture_mode : integer)
return INTEGER_ARRAY_TYPE is
variable intr_mode_array : INTEGER_ARRAY_TYPE(0 to num_user_intr-1);
begin
for i in 0 to num_user_intr-1 loop
intr_mode_array(i) := intr_capture_mode;
end loop;
return intr_mode_array;
end function populate_intr_mode_array;
function add_intr_ard_id_array(include_intr : boolean;
ard_id_array : INTEGER_ARRAY_TYPE)
return INTEGER_ARRAY_TYPE is
variable intr_ard_id_array : INTEGER_ARRAY_TYPE(0 to ard_id_array'length);
begin
intr_ard_id_array(0 to ard_id_array'length-1) := ard_id_array;
if include_intr then
intr_ard_id_array(ard_id_array'length) := IPIF_INTR;
return intr_ard_id_array;
else
return ard_id_array;
end if;
end function add_intr_ard_id_array;
function add_intr_ard_addr_range_array(include_intr : boolean;
ZERO_ADDR_PAD : std_logic_vector;
intr_baseaddr : std_logic_vector;
intr_highaddr : std_logic_vector;
ard_id_array : INTEGER_ARRAY_TYPE;
ard_addr_range_array : SLV64_ARRAY_TYPE)
return SLV64_ARRAY_TYPE is
variable intr_ard_addr_range_array : SLV64_ARRAY_TYPE(0 to ard_addr_range_array'length+1);
begin
intr_ard_addr_range_array(0 to ard_addr_range_array'length-1) := ard_addr_range_array;
if include_intr then
intr_ard_addr_range_array(2*get_id_index(ard_id_array,IPIF_INTR))
:= ZERO_ADDR_PAD & intr_baseaddr;
intr_ard_addr_range_array(2*get_id_index(ard_id_array,IPIF_INTR)+1)
:= ZERO_ADDR_PAD & intr_highaddr;
return intr_ard_addr_range_array;
else
return ard_addr_range_array;
end if;
end function add_intr_ard_addr_range_array;
function add_intr_ard_dwidth_array(include_intr : boolean;
intr_dwidth : integer;
ard_id_array : INTEGER_ARRAY_TYPE;
ard_dwidth_array : INTEGER_ARRAY_TYPE)
return INTEGER_ARRAY_TYPE is
variable intr_ard_dwidth_array : INTEGER_ARRAY_TYPE(0 to ard_dwidth_array'length);
begin
intr_ard_dwidth_array(0 to ard_dwidth_array'length-1) := ard_dwidth_array;
if include_intr then
intr_ard_dwidth_array(get_id_index(ard_id_array, IPIF_INTR)) := intr_dwidth;
return intr_ard_dwidth_array;
else
return ard_dwidth_array;
end if;
end function add_intr_ard_dwidth_array;
function add_intr_ard_num_ce_array(include_intr : boolean;
ard_id_array : INTEGER_ARRAY_TYPE;
ard_num_ce_array : INTEGER_ARRAY_TYPE)
return INTEGER_ARRAY_TYPE is
variable intr_ard_num_ce_array : INTEGER_ARRAY_TYPE(0 to ard_num_ce_array'length);
begin
intr_ard_num_ce_array(0 to ard_num_ce_array'length-1) := ard_num_ce_array;
if include_intr then
intr_ard_num_ce_array(get_id_index(ard_id_array, IPIF_INTR)) := 16;
return intr_ard_num_ce_array;
else
return ard_num_ce_array;
end if;
end function add_intr_ard_num_ce_array;
end package body ipif_pkg;
|
-- IPIF Common Library Package
-------------------------------------------------------------------------------
--
-- *************************************************************************
-- ** **
-- ** DISCLAIMER OF LIABILITY **
-- ** **
-- ** This text/file contains proprietary, confidential **
-- ** information of Xilinx, Inc., is distributed under **
-- ** license from Xilinx, Inc., and may be used, copied **
-- ** and/or disclosed only pursuant to the terms of a valid **
-- ** license agreement with Xilinx, Inc. Xilinx hereby **
-- ** grants you a license to use this text/file solely for **
-- ** design, simulation, implementation and creation of **
-- ** design files limited to Xilinx devices or technologies. **
-- ** Use with non-Xilinx devices or technologies is expressly **
-- ** prohibited and immediately terminates your license unless **
-- ** covered by a separate agreement. **
-- ** **
-- ** Xilinx is providing this design, code, or information **
-- ** "as-is" solely for use in developing programs and **
-- ** solutions for Xilinx devices, with no obligation on the **
-- ** part of Xilinx to provide support. By providing this design, **
-- ** code, or information as one possible implementation of **
-- ** this feature, application or standard, Xilinx is making no **
-- ** representation that this implementation is free from any **
-- ** claims of infringement. You are responsible for obtaining **
-- ** any rights you may require for your implementation. **
-- ** Xilinx expressly disclaims any warranty whatsoever with **
-- ** respect to the adequacy of the implementation, including **
-- ** but not limited to any warranties or representations that this **
-- ** implementation is free from claims of infringement, implied **
-- ** warranties of merchantability or fitness for a particular **
-- ** purpose. **
-- ** **
-- ** Xilinx products are not intended for use in life support **
-- ** appliances, devices, or systems. Use in such applications is **
-- ** expressly prohibited. **
-- ** **
-- ** Any modifications that are made to the Source Code are **
-- ** done at the users sole risk and will be unsupported. **
-- ** The Xilinx Support Hotline does not have access to source **
-- ** code and therefore cannot answer specific questions related **
-- ** to source HDL. The Xilinx Hotline support of original source **
-- ** code IP shall only address issues and questions related **
-- ** to the standard Netlist version of the core (and thus **
-- ** indirectly, the original core source). **
-- ** **
-- ** Copyright (c) 2002-2010 Xilinx, Inc. All rights reserved. **
-- ** **
-- ** This copyright and support notice must be retained as part **
-- ** of this text at all times. **
-- ** **
-- *************************************************************************
--
-------------------------------------------------------------------------------
-- Filename: ipif_pkg.vhd
-- Version: Intital
-- Description: This file contains the constants and functions used in the
-- ipif common library components.
--
-------------------------------------------------------------------------------
-- Structure:
--
-------------------------------------------------------------------------------
-- Author: DET
-- History:
-- DET 02/21/02 -- Created from proc_common_pkg.vhd
--
-- DET 03/13/02 -- PLB IPIF development updates
-- ^^^^^^
-- - Commented out string types and string functions due to an XST
-- problem with string arrays and functions. THe string array
-- processing functions were replaced with comperable functions
-- operating on integer arrays.
-- ~~~~~~
--
--
-- DET 4/30/2002 Initial
-- ~~~~~~
-- - Added three functions: rebuild_slv32_array, rebuild_slv64_array, and
-- rebuild_int_array to support removal of unused elements from the
-- ARD arrays.
-- ^^^^^^ --
--
-- FLO 8/12/2002
-- ~~~~~~
-- - Added three functions: bits_needed_for_vac, bits_needed_for_occ,
-- and get_id_index_iboe.
-- (Removed provisional functions bits_needed_for_vacancy,
-- bits needed_for_occupancy, and bits_needed_for.)
-- ^^^^^^
--
-- FLO 3/24/2003
-- ~~~~~~
-- - Added dependent property paramters for channelized DMA.
-- - Added common property parameter array type.
-- - Definded the KEYHOLD_BURST common-property parameter.
-- ^^^^^^
--
-- FLO 10/22/2003
-- ~~~~~~
-- - Some adjustment to CHDMA parameterization.
-- - Cleanup of obsolete code and comments. (The former "XST workaround"
-- has become the officially deployed method.)
-- ^^^^^^
--
-- LSS 03/24/2004
-- ~~~~~~
-- - Added 5 functions
-- ^^^^^^
--
-- ALS 09/03/04
-- ^^^^^^
-- -- Added constants to describe the channel protocols used in MCH_OPB_IPIF
-- ~~~~~~
--
-- DET 1/17/2008 v4_0
-- ~~~~~~
-- - Changed proc_common library version to v4_0
-- - Incorporated new disclaimer header
-- ^^^^^^
--
-------------------------------------------------------------------------------
-- Naming Conventions:
-- active low signals: "*_n"
-- clock signals: "clk", "clk_div#", "clk_#x"
-- reset signals: "rst", "rst_n"
-- generics: "C_*"
-- user defined types: "*_TYPE"
-- state machine next state: "*_ns"
-- state machine current state: "*_cs"
-- combinatorial signals: "*_com"
-- pipelined or register delay signals: "*_d#"
-- counter signals: "*cnt*"
-- clock enable signals: "*_ce"
-- internal version of output port "*_i"
-- device pins: "*_pin"
-- ports: - Names begin with Uppercase
-- processes: "*_PROCESS"
-- component instantiations: "<ENTITY_>I_<#|FUNC>
-------------------------------------------------------------------------------
library ieee;
use ieee.std_logic_1164.all;
-- need conversion function to convert reals/integers to std logic vectors
use ieee.std_logic_arith.all;
use ieee.std_logic_arith.all;
use ieee.std_logic_unsigned.all;
package ipif_pkg is
-------------------------------------------------------------------------------
-- Type Declarations
-------------------------------------------------------------------------------
type SLV32_ARRAY_TYPE is array (natural range <>) of std_logic_vector(0 to 31);
subtype SLV64_TYPE is std_logic_vector(0 to 63);
type SLV64_ARRAY_TYPE is array (natural range <>) of SLV64_TYPE;
type INTEGER_ARRAY_TYPE is array (natural range <>) of integer;
-------------------------------------------------------------------------------
-- Function and Procedure Declarations
-------------------------------------------------------------------------------
function "=" (s1: in string; s2: in string) return boolean;
function equaluseCase( str1, str2 : STRING ) RETURN BOOLEAN;
function calc_num_ce (ce_num_array : INTEGER_ARRAY_TYPE) return integer;
function calc_start_ce_index (ce_num_array : INTEGER_ARRAY_TYPE;
index : integer) return integer;
function get_min_dwidth (dwidth_array: INTEGER_ARRAY_TYPE) return integer;
function get_max_dwidth (dwidth_array: INTEGER_ARRAY_TYPE) return integer;
function S32 (in_string : string) return string;
--------------------------------------------------------------------------------
-- ARD support functions.
-- These function can be useful when operating with the ARD parameterization.
--------------------------------------------------------------------------------
function get_id_index (id_array :INTEGER_ARRAY_TYPE;
id : integer)
return integer;
function get_id_index_iboe (id_array :INTEGER_ARRAY_TYPE;
id : integer)
return integer;
function find_ard_id (id_array : INTEGER_ARRAY_TYPE;
id : integer) return boolean;
function find_id_dwidth (id_array : INTEGER_ARRAY_TYPE;
dwidth_array: INTEGER_ARRAY_TYPE;
id : integer;
default : integer)
return integer;
function cnt_ipif_id_blks (id_array : INTEGER_ARRAY_TYPE) return integer;
function get_ipif_id_dbus_index (id_array : INTEGER_ARRAY_TYPE;
id : integer)
return integer ;
function rebuild_slv32_array (slv32_array : SLV32_ARRAY_TYPE;
num_valid_pairs : integer)
return SLV32_ARRAY_TYPE;
function rebuild_slv64_array (slv64_array : SLV64_ARRAY_TYPE;
num_valid_pairs : integer)
return SLV64_ARRAY_TYPE;
function rebuild_int_array (int_array : INTEGER_ARRAY_TYPE;
num_valid_entry : integer)
return INTEGER_ARRAY_TYPE;
-- 5 Functions Added 3/24/04
function populate_intr_mode_array (num_user_intr : integer;
intr_capture_mode : integer)
return INTEGER_ARRAY_TYPE ;
function add_intr_ard_id_array(include_intr : boolean;
ard_id_array : INTEGER_ARRAY_TYPE)
return INTEGER_ARRAY_TYPE;
function add_intr_ard_addr_range_array(include_intr : boolean;
ZERO_ADDR_PAD : std_logic_vector;
intr_baseaddr : std_logic_vector;
intr_highaddr : std_logic_vector;
ard_id_array : INTEGER_ARRAY_TYPE;
ard_addr_range_array : SLV64_ARRAY_TYPE)
return SLV64_ARRAY_TYPE;
function add_intr_ard_num_ce_array(include_intr : boolean;
ard_id_array : INTEGER_ARRAY_TYPE;
ard_num_ce_array : INTEGER_ARRAY_TYPE)
return INTEGER_ARRAY_TYPE;
function add_intr_ard_dwidth_array(include_intr : boolean;
intr_dwidth : integer;
ard_id_array : INTEGER_ARRAY_TYPE;
ard_dwidth_array : INTEGER_ARRAY_TYPE)
return INTEGER_ARRAY_TYPE;
function log2(x : natural) return integer;
function clog2(x : positive) return natural;
-------------------------------------------------------------------------------
-- Constant Declarations
-------------------------------------------------------------------------------
-------------------------------------------------------------------------------
-- Channel Protocols
-- The constant declarations below give symbolic-name aliases for values that
-- can be used in the C_MCH_PROTOCOL_ARRAY generic of the MCH_OPB_IPIF.
-------------------------------------------------------------------------------
constant XCL : integer := 0;
constant DAG : integer := 1;
--------------------------------------------------------------------------------
-- Address range types.
-- The constant declarations, below, give symbolic-name aliases for values
-- that can be used in the C_ARD_ID_ARRAY generic of IPIFs. The first set
-- gives aliases that are used to include IPIF services.
--------------------------------------------------------------------------------
-- IPIF module aliases
Constant IPIF_INTR : integer := 1;
Constant IPIF_RST : integer := 2;
Constant IPIF_SESR_SEAR : integer := 3;
Constant IPIF_DMA_SG : integer := 4;
Constant IPIF_WRFIFO_REG : integer := 5;
Constant IPIF_WRFIFO_DATA : integer := 6;
Constant IPIF_RDFIFO_REG : integer := 7;
Constant IPIF_RDFIFO_DATA : integer := 8;
Constant IPIF_CHDMA_CHANNELS : integer := 9;
Constant IPIF_CHDMA_GLOBAL_REGS : integer := 10;
Constant CHDMA_STATUS_FIFO : integer := 90;
-- Some predefined user module aliases
Constant USER_00 : integer := 100;
Constant USER_01 : integer := 101;
Constant USER_02 : integer := 102;
Constant USER_03 : integer := 103;
Constant USER_04 : integer := 104;
Constant USER_05 : integer := 105;
Constant USER_06 : integer := 106;
Constant USER_07 : integer := 107;
Constant USER_08 : integer := 108;
Constant USER_09 : integer := 109;
Constant USER_10 : integer := 110;
Constant USER_11 : integer := 111;
Constant USER_12 : integer := 112;
Constant USER_13 : integer := 113;
Constant USER_14 : integer := 114;
Constant USER_15 : integer := 115;
Constant USER_16 : integer := 116;
---( Start of Dependent Properties declarations
--------------------------------------------------------------------------------
-- Declarations for Dependent Properties (properties that depend on the type of
-- the address range, or in other words, address-range-specific parameters).
-- There is one property, i.e. one parameter, encoded as an integer at
-- each index of the properties array. There is one properties array for
-- each address range.
--
-- The C_ARD_DEPENDENT_PROPS_ARRAY generic parameter in (most) IPIFs is such
-- a properties array and it is usually giving its (static) value using a
-- VHDL aggregate construct. (--ToDo, give an example of this.)
--
-- The the "assigned" default value of a dependent property is zero. This value
-- is usually specified the aggregate by leaving its (index) name out so that
-- it is covered by an "others => 0" choice in the aggregate. Some parameters,
-- as noted in the definitions, below, have an "effective" default value that is
-- different from the assigned default value of zero. In such cases, the
-- function, eff_dp, given below, can be used to get the effective value of
-- the dependent property.
--------------------------------------------------------------------------------
constant DEPENDENT_PROPS_SIZE : integer := 32;
subtype DEPENDENT_PROPS_TYPE
is INTEGER_ARRAY_TYPE(0 to DEPENDENT_PROPS_SIZE-1);
type DEPENDENT_PROPS_ARRAY_TYPE
is array (natural range <>) of DEPENDENT_PROPS_TYPE;
--------------------------------------------------------------------------------
-- Below are the indices of dependent properties for the different types of
-- address ranges.
--
-- Example: Let C_ARD_DEPENDENT_PROPS_ARRAY hold the dependent properites
-- for a set of address ranges. Then, e.g.,
--
-- C_ARD_DEPENDENT_PROPS_ARRAY(i)(FIFO_CAPACITY_BITS)
--
-- gives the fifo capacity in bits, provided that the i'th address range
-- is of type IPIF_WRFIFO_DATA or IPIF_RDFIFO_DATA.
--
-- These indices should be referenced only by the names below and never
-- by numerical literals. (The right to change numerical index assignments
-- is reserved; applications using the names will not be affected by such
-- reassignments.)
--------------------------------------------------------------------------------
--
--ToDo, if the interrupt controller parameterization is ever moved to
-- C_ARD_DEPENDENT_PROPS_ARRAY, then the following declarations
-- could be uncommented and used.
---- IPIF_INTR IDX
---------------------------------------------------------------------------- ---
constant EXCLUDE_DEV_ISC : integer := 0;
-- 1 specifies that only the global interrupt
-- enable is present in the device interrupt source
-- controller and that the only source of interrupts
-- in the device is the IP interrupt source controller.
-- 0 specifies that the full device interrupt
-- source controller structure will be included.
constant INCLUDE_DEV_PENCODER : integer := 1;
-- 1 will include the Device IID in the device interrupt
-- source controller, 0 will exclude it.
--
-- IPIF_WRFIFO_DATA or IPIF_RDFIFO_DATA IDX
---------------------------------------------------------------------------- ---
constant FIFO_CAPACITY_BITS : integer := 0;
constant WR_WIDTH_BITS : integer := 1;
constant RD_WIDTH_BITS : integer := 2;
constant EXCLUDE_PACKET_MODE : integer := 3;
-- 1 Don't include packet mode features
-- 0 Include packet mode features
constant EXCLUDE_VACANCY : integer := 4;
-- 1 Don't include vacancy calculation
-- 0 Include vacancy calculation
-- See also the functions
-- bits_needed_for_vac and
-- bits_needed_for_occ that are declared below.
constant INCLUDE_DRE : integer := 5;
constant INCLUDE_AUTOPUSH_POP : integer := 6;
constant AUTOPUSH_POP_CE : integer := 7;
constant INCLUDE_CSUM : integer := 8;
--------------------------------------------------------------------------------
--
-- DMA_SG IDX
---------------------------------------------------------------------------- ---
--------------------------------------------------------------------------------
-- IPIF_CHDMA_CHANNELS IDX
---------------------------------------------------------------------------- ---
constant NUM_SUBS_FOR_PHYS_0 : integer :=0;
constant NUM_SUBS_FOR_PHYS_1 : integer :=1;
constant NUM_SUBS_FOR_PHYS_2 : integer :=2;
constant NUM_SUBS_FOR_PHYS_3 : integer :=3;
constant NUM_SUBS_FOR_PHYS_4 : integer :=4;
constant NUM_SUBS_FOR_PHYS_5 : integer :=5;
constant NUM_SUBS_FOR_PHYS_6 : integer :=6;
constant NUM_SUBS_FOR_PHYS_7 : integer :=7;
constant NUM_SUBS_FOR_PHYS_8 : integer :=8;
constant NUM_SUBS_FOR_PHYS_9 : integer :=9;
constant NUM_SUBS_FOR_PHYS_10 : integer :=10;
constant NUM_SUBS_FOR_PHYS_11 : integer :=11;
constant NUM_SUBS_FOR_PHYS_12 : integer :=12;
constant NUM_SUBS_FOR_PHYS_13 : integer :=13;
constant NUM_SUBS_FOR_PHYS_14 : integer :=14;
constant NUM_SUBS_FOR_PHYS_15 : integer :=15;
-- Gives the number of sub-channels for physical channel i.
--
-- These constants, which will be MAX_NUM_PHYS_CHANNELS in number (see
-- below), have consecutive values starting with 0 for
-- NUM_SUBS_FOR_PHYS_0. (The constants serve the purpose of giving symbolic
-- names for use in the dependent-properties aggregates that parameterize
-- an IPIF_CHDMA_CHANNELS address range.)
--
-- [Users can ignore this note for developers
-- If the number of physical channels changes, both the
-- IPIF_CHDMA_CHANNELS constants and MAX_NUM_PHYS_CHANNELS,
-- below, must be adjusted.
-- (Use of an array constant or a function of the form
-- NUM_SUBS_FOR_PHYS(i) to define the indices
-- runs afoul of LRM restrictions on non-locally static aggregate
-- choices. (Further, the LRM imposes perhaps unnecessarily
-- strict limits on what qualifies as a locally static primary.)
-- Note: This information is supplied for the benefit of anyone seeking
-- to improve the way that these NUM_SUBS_FOR_PHYS parameter
-- indices are defined.)
-- End of note for developers ]
--
-- The value associated with any index NUM_SUBS_FOR_PHYS_i in the
-- dependent-properties array must be even since TX and RX channels
-- come in pairs with the TX followed immediately by
-- the corresponding RX.
--
constant NUM_SIMPLE_DMA_CHANS : integer :=16;
-- The number of simple DMA channels.
constant NUM_SIMPLE_SG_CHANS : integer :=17;
-- The number of simple SG channels.
constant INTR_COALESCE : integer :=18;
-- 0 Interrupt coalescing is disabled
-- 1 Interrupt coalescing is enabled
constant CLK_PERIOD_PS : integer :=19;
-- The period of the OPB Bus clock in ps.
-- The default value of 0 is a special value that
-- is synonymous with 10000 ps (10 ns).
-- The value for CLK_PERIOD_PS is relevant only if (INTR_COALESCE = 1).
constant PACKET_WAIT_UNIT_NS : integer :=20;
-- Gives the unit for used for timing of pack-wait bounds.
-- The default value of 0 is a special value that
-- is synonymous with 1,000,000 ns (1 ms) and a non-default
-- value is typically only used for testing.
-- Relevant only if (INTR_COALESCE = 1).
constant BURST_SIZE : integer :=21;
-- 1, 2, 4, 8 or 16
-- The default value of 0 is a special value that
-- is synonymous with a burst size of 16.
-- Setting the BURST_SIZE to 1 effectively disables
-- bursts.
constant REMAINDER_AS_SINGLES : integer :=22;
-- 0 Remainder handled as a short burst
-- 1 Remainder handled as a series of singles
--------------------------------------------------------------------------------
-- The constant below is not the index of a dependent-properties
-- parameter (and, as such, would never appear as a choice in a
-- dependent-properties aggregate). Rather, it is fixed to the maximum
-- number of physical channels that an Address Range of type
-- IPIF_CHDMA_CHANNELS supports. It must be maintained in conjuction with
-- the constants named, e.g., NUM_SUBS_FOR_PHYS_15, above.
--------------------------------------------------------------------------------
constant MAX_NUM_PHYS_CHANNELS : natural := 16;
--------------------------------------------------------------------------
-- EXAMPLE: Here is an example dependent-properties aggregate for an
-- address range of type IPIF_CHDMA_CHANNELS.
-- To have a compact list of all of the CHDMA parameters, all are
-- shown, however three are commented out and the unneeded
-- MUM_SUBS_FOR_PHYS_x are excluded. The "OTHERS => 0" association
-- gives these parameters their default values, such that, for the example
--
-- - All physical channels above 2 have zero subchannels (effectively,
-- these physical channels are not used)
-- - There are no simple SG channels
-- - The packet-wait time unit is 1 ms
-- - Burst size is 16
--------------------------------------------------------------------------
-- (
-- NUM_SUBS_FOR_PHYS_0 => 8,
-- NUM_SUBS_FOR_PHYS_1 => 4,
-- NUM_SUBS_FOR_PHYS_2 => 14,
-- NUM_SIMPLE_DMA_CHANS => 1,
-- --NUM_SIMPLE_SG_CHANS => 5,
-- INTR_COALESCE => 1,
-- CLK_PERIOD_PS => 20000,
-- --PACKET_WAIT_UNIT_NS => 50000,
-- --BURST_SIZE => 1,
-- REMAINDER_AS_SINGLES => 1,
-- OTHERS => 0
-- )
--
--------------------------------------------------------------------------------
--------------------------------------------------------------------------------
-- Calculates the number of bits needed to convey the vacancy (emptiness) of
-- the fifo described by dependent_props, if fifo_present. If not fifo_present,
-- returns 0 (or the smallest value allowed by tool limitations on null arrays)
-- without making reference to dependent_props.
--------------------------------------------------------------------------------
function bits_needed_for_vac(
fifo_present: boolean;
dependent_props : DEPENDENT_PROPS_TYPE
) return integer;
--------------------------------------------------------------------------------
-- Calculates the number of bits needed to convey the occupancy (fullness) of
-- the fifo described by dependent_props, if fifo_present. If not fifo_present,
-- returns 0 (or the smallest value allowed by tool limitations on null arrays)
-- without making reference to dependent_props.
--------------------------------------------------------------------------------
function bits_needed_for_occ(
fifo_present: boolean;
dependent_props : DEPENDENT_PROPS_TYPE
) return integer;
--------------------------------------------------------------------------------
-- Function eff_dp.
--
-- For some of the dependent properties, the default value of zero is meant
-- to imply an effective default value of other than zero (see e.g.
-- PKT_WAIT_UNIT_NS for the IPIF_CHDMA_CHANNELS address-range type). The
-- following function is used to get the (possibly default-adjusted)
-- value for a dependent property.
--
-- Example call:
--
-- eff_value_of_param :=
-- eff_dp(
-- C_IPIF_CHDMA_CHANNELS,
-- PACKET_WAIT_UNIT_NS,
-- C_ARD_DEPENDENT_PROPS_ARRAY(i)(PACKET_WAIT_UNIT_NS)
-- );
--
-- where C_ARD_DEPENDENT_PROPS_ARRAY(i) is an object of type
-- DEPENDENT_PROPS_ARRAY_TYPE, that was parameterized for an address range of
-- type C_IPIF_CHDMA_CHANNELS.
--------------------------------------------------------------------------------
function eff_dp(id : integer; -- The type of address range.
dep_prop : integer; -- The index of the dependent prop.
value : integer -- The value at that index.
) return integer; -- The effective value, possibly adjusted
-- if value has the default value of 0.
---) End of Dependent Properties declarations
--------------------------------------------------------------------------------
-- Declarations for Common Properties (properties that apply regardless of the
-- type of the address range). Structurally, these work the same as
-- the dependent properties.
--------------------------------------------------------------------------------
constant COMMON_PROPS_SIZE : integer := 2;
subtype COMMON_PROPS_TYPE
is INTEGER_ARRAY_TYPE(0 to COMMON_PROPS_SIZE-1);
type COMMON_PROPS_ARRAY_TYPE
is array (natural range <>) of COMMON_PROPS_TYPE;
--------------------------------------------------------------------------------
-- Below are the indices of the common properties.
--
-- These indices should be referenced only by the names below and never
-- by numerical literals.
-- IDX
---------------------------------------------------------------------------- ---
constant KEYHOLE_BURST : integer := 0;
-- 1 All addresses of a burst are forced to the initial
-- address of the burst.
-- 0 Burst addresses follow the bus protocol.
-- IP interrupt mode array constants
Constant INTR_PASS_THRU : integer := 1;
Constant INTR_PASS_THRU_INV : integer := 2;
Constant INTR_REG_EVENT : integer := 3;
Constant INTR_REG_EVENT_INV : integer := 4;
Constant INTR_POS_EDGE_DETECT : integer := 5;
Constant INTR_NEG_EDGE_DETECT : integer := 6;
end ipif_pkg;
package body ipif_pkg is
-------------------------------------------------------------------------------
-- Function log2 -- returns number of bits needed to encode x choices
-- x = 0 returns 0
-- x = 1 returns 0
-- x = 2 returns 1
-- x = 4 returns 2, etc.
-------------------------------------------------------------------------------
--
function log2(x : natural) return integer is
variable i : integer := 0;
variable val: integer := 1;
begin
if x = 0 then return 0;
else
for j in 0 to 29 loop -- for loop for XST
if val >= x then null;
else
i := i+1;
val := val*2;
end if;
end loop;
-- Fix per CR520627 XST was ignoring this anyway and printing a
-- Warning in SRP file. This will get rid of the warning and not
-- impact simulation.
-- synthesis translate_off
assert val >= x
report "Function log2 received argument larger" &
" than its capability of 2^30. "
severity failure;
-- synthesis translate_on
return i;
end if;
end function log2;
--------------------------------------------------------------------------------
-- Function clog2 - returns the integer ceiling of the base 2 logarithm of x,
-- i.e., the least integer greater than or equal to log2(x).
--------------------------------------------------------------------------------
function clog2(x : positive) return natural is
variable r : natural := 0;
variable rp : natural := 1; -- rp tracks the value 2**r
begin
while rp < x loop -- Termination condition T: x <= 2**r
-- Loop invariant L: 2**(r-1) < x
r := r + 1;
if rp > integer'high - rp then exit; end if; -- If doubling rp overflows
-- the integer range, the doubled value would exceed x, so safe to exit.
rp := rp + rp;
end loop;
-- L and T <-> 2**(r-1) < x <= 2**r <-> (r-1) < log2(x) <= r
return r; --
end clog2;
-------------------------------------------------------------------------------
-- Function Definitions
-------------------------------------------------------------------------------
-----------------------------------------------------------------------------
-- Function "="
--
-- This function can be used to overload the "=" operator when comparing
-- strings.
-----------------------------------------------------------------------------
function "=" (s1: in string; s2: in string) return boolean is
constant tc: character := ' '; -- string termination character
variable i: integer := 1;
variable v1 : string(1 to s1'length) := s1;
variable v2 : string(1 to s2'length) := s2;
begin
while (i <= v1'length) and (v1(i) /= tc) and
(i <= v2'length) and (v2(i) /= tc) and
(v1(i) = v2(i))
loop
i := i+1;
end loop;
return ((i > v1'length) or (v1(i) = tc)) and
((i > v2'length) or (v2(i) = tc));
end;
----------------------------------------------------------------------------
-- Function equaluseCase
--
-- This function returns true if case sensitive string comparison determines
-- that str1 and str2 are the same.
-----------------------------------------------------------------------------
FUNCTION equaluseCase( str1, str2 : STRING ) RETURN BOOLEAN IS
CONSTANT len1 : INTEGER := str1'length;
CONSTANT len2 : INTEGER := str2'length;
VARIABLE equal : BOOLEAN := TRUE;
BEGIN
IF NOT (len1=len2) THEN
equal := FALSE;
ELSE
FOR i IN str1'range LOOP
IF NOT (str1(i) = str2(i)) THEN
equal := FALSE;
END IF;
END LOOP;
END IF;
RETURN equal;
END equaluseCase;
-----------------------------------------------------------------------------
-- Function calc_num_ce
--
-- This function is used to process the array specifying the number of Chip
-- Enables required for a Base Address specification. The array is input to
-- the function and an integer is returned reflecting the total number of
-- Chip Enables required for the CE, RdCE, and WrCE Buses
-----------------------------------------------------------------------------
function calc_num_ce (ce_num_array : INTEGER_ARRAY_TYPE) return integer is
Variable ce_num_sum : integer := 0;
begin
for i in 0 to (ce_num_array'length)-1 loop
ce_num_sum := ce_num_sum + ce_num_array(i);
End loop;
return(ce_num_sum);
end function calc_num_ce;
-----------------------------------------------------------------------------
-- Function calc_start_ce_index
--
-- This function is used to process the array specifying the number of Chip
-- Enables required for a Base Address specification. The CE Size array is
-- input to the function and an integer index representing the index of the
-- target module in the ce_num_array. An integer is returned reflecting the
-- starting index of the assigned Chip Enables within the CE, RdCE, and
-- WrCE Buses.
-----------------------------------------------------------------------------
function calc_start_ce_index (ce_num_array : INTEGER_ARRAY_TYPE;
index : integer) return integer is
Variable ce_num_sum : integer := 0;
begin
If (index = 0) Then
ce_num_sum := 0;
else
for i in 0 to index-1 loop
ce_num_sum := ce_num_sum + ce_num_array(i);
End loop;
End if;
return(ce_num_sum);
end function calc_start_ce_index;
-----------------------------------------------------------------------------
-- Function get_min_dwidth
--
-- This function is used to process the array specifying the data bus width
-- for each of the target modules. The dwidth_array is input to the function
-- and an integer is returned that is the smallest value found of all the
-- entries in the array.
-----------------------------------------------------------------------------
function get_min_dwidth (dwidth_array: INTEGER_ARRAY_TYPE) return integer is
Variable temp_min : Integer := 1024;
begin
for i in 0 to dwidth_array'length-1 loop
If (dwidth_array(i) < temp_min) Then
temp_min := dwidth_array(i);
else
null;
End if;
End loop;
return(temp_min);
end function get_min_dwidth;
-----------------------------------------------------------------------------
-- Function get_max_dwidth
--
-- This function is used to process the array specifying the data bus width
-- for each of the target modules. The dwidth_array is input to the function
-- and an integer is returned that is the largest value found of all the
-- entries in the array.
-----------------------------------------------------------------------------
function get_max_dwidth (dwidth_array: INTEGER_ARRAY_TYPE) return integer is
Variable temp_max : Integer := 0;
begin
for i in 0 to dwidth_array'length-1 loop
If (dwidth_array(i) > temp_max) Then
temp_max := dwidth_array(i);
else
null;
End if;
End loop;
return(temp_max);
end function get_max_dwidth;
-----------------------------------------------------------------------------
-- Function S32
--
-- This function is used to expand an input string to 32 characters by
-- padding with spaces. If the input string is larger than 32 characters,
-- it will truncate to 32 characters.
-----------------------------------------------------------------------------
function S32 (in_string : string) return string is
constant OUTPUT_STRING_LENGTH : integer := 32;
Constant space : character := ' ';
variable new_string : string(1 to 32);
Variable start_index : Integer := in_string'length+1;
begin
If (in_string'length < OUTPUT_STRING_LENGTH) Then
for i in 1 to in_string'length loop
new_string(i) := in_string(i);
End loop;
for j in start_index to OUTPUT_STRING_LENGTH loop
new_string(j) := space;
End loop;
else -- use first 32 chars of in_string (truncate the rest)
for k in 1 to OUTPUT_STRING_LENGTH loop
new_string(k) := in_string(k);
End loop;
End if;
return(new_string);
end function S32;
-----------------------------------------------------------------------------
-- Function get_id_index
--
-- This function is used to process the array specifying the target function
-- assigned to a Base Address pair address range. The id_array and a
-- id number is input to the function. A integer is returned reflecting the
-- array index of the id matching the id input number. This function
-- should only be called if the id number is known to exist in the
-- name_array input. This can be detirmined by using the find_ard_id
-- function.
-----------------------------------------------------------------------------
function get_id_index (id_array :INTEGER_ARRAY_TYPE;
id : integer) return integer is
Variable match : Boolean := false;
Variable match_index : Integer := 10000; -- a really big number!
begin
for array_index in 0 to id_array'length-1 loop
If (match = true) Then -- match already found so do nothing
null;
else -- compare the numbers one by one
match := (id_array(array_index) = id);
If (match) Then
match_index := array_index;
else
null;
End if;
End if;
End loop;
return(match_index);
end function get_id_index;
--------------------------------------------------------------------------------
-- get_id_index but return a value in bounds on error (iboe).
--
-- This function is the same as get_id_index, except that when id does
-- not exist in id_array, the value returned is any index that is
-- within the index range of id_array.
--
-- This function would normally only be used where function find_ard_id
-- is used to establish the existence of id but, even when non-existent,
-- an element of one of the ARD arrays will be computed from the
-- returned get_id_index_iboe value. See, e.g., function bits_needed_for_vac
-- and the example call, below
--
-- bits_needed_for_vac(
-- find_ard_id(C_ARD_ID_ARRAY, IPIF_RDFIFO_DATA),
-- C_ARD_DEPENDENT_PROPS_ARRAY(get_id_index_iboe(C_ARD_ID_ARRAY,
-- IPIF_RDFIFO_DATA))
-- )
--------------------------------------------------------------------------------
function get_id_index_iboe (id_array :INTEGER_ARRAY_TYPE;
id : integer) return integer is
Variable match : Boolean := false;
Variable match_index : Integer := id_array'left; -- any valid array index
begin
for array_index in 0 to id_array'length-1 loop
If (match = true) Then -- match already found so do nothing
null;
else -- compare the numbers one by one
match := (id_array(array_index) = id);
If (match) Then match_index := array_index;
else null;
End if;
End if;
End loop;
return(match_index);
end function get_id_index_iboe;
-----------------------------------------------------------------------------
-- Function find_ard_id
--
-- This function is used to process the array specifying the target function
-- assigned to a Base Address pair address range. The id_array and a
-- integer id is input to the function. A boolean is returned reflecting the
-- presence (or not) of a number in the array matching the id input number.
-----------------------------------------------------------------------------
function find_ard_id (id_array : INTEGER_ARRAY_TYPE;
id : integer) return boolean is
Variable match : Boolean := false;
begin
for array_index in 0 to id_array'length-1 loop
If (match = true) Then -- match already found so do nothing
null;
else -- compare the numbers one by one
match := (id_array(array_index) = id);
End if;
End loop;
return(match);
end function find_ard_id;
-----------------------------------------------------------------------------
-- Function find_id_dwidth
--
-- This function is used to find the data width of a target module. If the
-- target module exists, the data width is extracted from the input dwidth
-- array. If the module is not in the ID array, the default input is
-- returned. This function is needed to assign data port size constraints on
-- unconstrained port widths.
-----------------------------------------------------------------------------
function find_id_dwidth (id_array : INTEGER_ARRAY_TYPE;
dwidth_array: INTEGER_ARRAY_TYPE;
id : integer;
default : integer) return integer is
Variable id_present : Boolean := false;
Variable array_index : Integer := 0;
Variable dwidth : Integer := default;
begin
id_present := find_ard_id(id_array, id);
If (id_present) Then
array_index := get_id_index (id_array, id);
dwidth := dwidth_array(array_index);
else
null; -- use default input
End if;
Return (dwidth);
end function find_id_dwidth;
-----------------------------------------------------------------------------
-- Function cnt_ipif_id_blks
--
-- This function is used to detirmine the number of IPIF components specified
-- in the ARD ID Array. An integer is returned representing the number
-- of elements counted. User IDs are ignored in the counting process.
-----------------------------------------------------------------------------
function cnt_ipif_id_blks (id_array : INTEGER_ARRAY_TYPE)
return integer is
Variable blk_count : integer := 0;
Variable temp_id : integer;
begin
for array_index in 0 to id_array'length-1 loop
temp_id := id_array(array_index);
If (temp_id = IPIF_WRFIFO_DATA or
temp_id = IPIF_RDFIFO_DATA or
temp_id = IPIF_RST or
temp_id = IPIF_INTR or
temp_id = IPIF_DMA_SG or
temp_id = IPIF_SESR_SEAR
) Then -- IPIF block found
blk_count := blk_count+1;
else -- go to next loop iteration
null;
End if;
End loop;
return(blk_count);
end function cnt_ipif_id_blks;
-----------------------------------------------------------------------------
-- Function get_ipif_id_dbus_index
--
-- This function is used to detirmine the IPIF relative index of a given
-- ID value. User IDs are ignored in the index detirmination.
-----------------------------------------------------------------------------
function get_ipif_id_dbus_index (id_array : INTEGER_ARRAY_TYPE;
id : integer)
return integer is
Variable blk_index : integer := 0;
Variable temp_id : integer;
Variable id_found : Boolean := false;
begin
for array_index in 0 to id_array'length-1 loop
temp_id := id_array(array_index);
If (id_found) then
null;
elsif (temp_id = id) then
id_found := true;
elsif (temp_id = IPIF_WRFIFO_DATA or
temp_id = IPIF_RDFIFO_DATA or
temp_id = IPIF_RST or
temp_id = IPIF_INTR or
temp_id = IPIF_DMA_SG or
temp_id = IPIF_SESR_SEAR
) Then -- IPIF block found
blk_index := blk_index+1;
else -- user block so do nothing
null;
End if;
End loop;
return(blk_index);
end function get_ipif_id_dbus_index;
------------------------------------------------------------------------------
-- Function: rebuild_slv32_array
--
-- Description:
-- This function takes an input slv32 array and rebuilds an output slv32
-- array composed of the first "num_valid_entry" elements from the input
-- array.
------------------------------------------------------------------------------
function rebuild_slv32_array (slv32_array : SLV32_ARRAY_TYPE;
num_valid_pairs : integer)
return SLV32_ARRAY_TYPE is
--Constants
constant num_elements : Integer := num_valid_pairs * 2;
-- Variables
variable temp_baseaddr32_array : SLV32_ARRAY_TYPE( 0 to num_elements-1);
begin
for array_index in 0 to num_elements-1 loop
temp_baseaddr32_array(array_index) := slv32_array(array_index);
end loop;
return(temp_baseaddr32_array);
end function rebuild_slv32_array;
------------------------------------------------------------------------------
-- Function: rebuild_slv64_array
--
-- Description:
-- This function takes an input slv64 array and rebuilds an output slv64
-- array composed of the first "num_valid_entry" elements from the input
-- array.
------------------------------------------------------------------------------
function rebuild_slv64_array (slv64_array : SLV64_ARRAY_TYPE;
num_valid_pairs : integer)
return SLV64_ARRAY_TYPE is
--Constants
constant num_elements : Integer := num_valid_pairs * 2;
-- Variables
variable temp_baseaddr64_array : SLV64_ARRAY_TYPE( 0 to num_elements-1);
begin
for array_index in 0 to num_elements-1 loop
temp_baseaddr64_array(array_index) := slv64_array(array_index);
end loop;
return(temp_baseaddr64_array);
end function rebuild_slv64_array;
------------------------------------------------------------------------------
-- Function: rebuild_int_array
--
-- Description:
-- This function takes an input integer array and rebuilds an output integer
-- array composed of the first "num_valid_entry" elements from the input
-- array.
------------------------------------------------------------------------------
function rebuild_int_array (int_array : INTEGER_ARRAY_TYPE;
num_valid_entry : integer)
return INTEGER_ARRAY_TYPE is
-- Variables
variable temp_int_array : INTEGER_ARRAY_TYPE( 0 to num_valid_entry-1);
begin
for array_index in 0 to num_valid_entry-1 loop
temp_int_array(array_index) := int_array(array_index);
end loop;
return(temp_int_array);
end function rebuild_int_array;
function bits_needed_for_vac(
fifo_present: boolean;
dependent_props : DEPENDENT_PROPS_TYPE
) return integer is
begin
if not fifo_present then
return 1; -- Zero would be better but leads to "0 to -1" null
-- ranges that are not handled by XST Flint or earlier
-- because of the negative index.
else
return
log2(1 + dependent_props(FIFO_CAPACITY_BITS) /
dependent_props(RD_WIDTH_BITS)
);
end if;
end function bits_needed_for_vac;
function bits_needed_for_occ(
fifo_present: boolean;
dependent_props : DEPENDENT_PROPS_TYPE
) return integer is
begin
if not fifo_present then
return 1; -- Zero would be better but leads to "0 to -1" null
-- ranges that are not handled by XST Flint or earlier
-- because of the negative index.
else
return
log2(1 + dependent_props(FIFO_CAPACITY_BITS) /
dependent_props(WR_WIDTH_BITS)
);
end if;
end function bits_needed_for_occ;
function eff_dp(id : integer;
dep_prop : integer;
value : integer) return integer is
variable dp : integer := dep_prop;
type bo2na_type is array (boolean) of natural;
constant bo2na : bo2na_type := (0, 1);
begin
if value /= 0 then return value; end if; -- Not default
case id is
when IPIF_CHDMA_CHANNELS =>
-------------------
return( bo2na(dp = CLK_PERIOD_PS ) * 10000
+ bo2na(dp = PACKET_WAIT_UNIT_NS ) * 1000000
+ bo2na(dp = BURST_SIZE ) * 16
);
when others => return 0;
end case;
end eff_dp;
function populate_intr_mode_array (num_user_intr : integer;
intr_capture_mode : integer)
return INTEGER_ARRAY_TYPE is
variable intr_mode_array : INTEGER_ARRAY_TYPE(0 to num_user_intr-1);
begin
for i in 0 to num_user_intr-1 loop
intr_mode_array(i) := intr_capture_mode;
end loop;
return intr_mode_array;
end function populate_intr_mode_array;
function add_intr_ard_id_array(include_intr : boolean;
ard_id_array : INTEGER_ARRAY_TYPE)
return INTEGER_ARRAY_TYPE is
variable intr_ard_id_array : INTEGER_ARRAY_TYPE(0 to ard_id_array'length);
begin
intr_ard_id_array(0 to ard_id_array'length-1) := ard_id_array;
if include_intr then
intr_ard_id_array(ard_id_array'length) := IPIF_INTR;
return intr_ard_id_array;
else
return ard_id_array;
end if;
end function add_intr_ard_id_array;
function add_intr_ard_addr_range_array(include_intr : boolean;
ZERO_ADDR_PAD : std_logic_vector;
intr_baseaddr : std_logic_vector;
intr_highaddr : std_logic_vector;
ard_id_array : INTEGER_ARRAY_TYPE;
ard_addr_range_array : SLV64_ARRAY_TYPE)
return SLV64_ARRAY_TYPE is
variable intr_ard_addr_range_array : SLV64_ARRAY_TYPE(0 to ard_addr_range_array'length+1);
begin
intr_ard_addr_range_array(0 to ard_addr_range_array'length-1) := ard_addr_range_array;
if include_intr then
intr_ard_addr_range_array(2*get_id_index(ard_id_array,IPIF_INTR))
:= ZERO_ADDR_PAD & intr_baseaddr;
intr_ard_addr_range_array(2*get_id_index(ard_id_array,IPIF_INTR)+1)
:= ZERO_ADDR_PAD & intr_highaddr;
return intr_ard_addr_range_array;
else
return ard_addr_range_array;
end if;
end function add_intr_ard_addr_range_array;
function add_intr_ard_dwidth_array(include_intr : boolean;
intr_dwidth : integer;
ard_id_array : INTEGER_ARRAY_TYPE;
ard_dwidth_array : INTEGER_ARRAY_TYPE)
return INTEGER_ARRAY_TYPE is
variable intr_ard_dwidth_array : INTEGER_ARRAY_TYPE(0 to ard_dwidth_array'length);
begin
intr_ard_dwidth_array(0 to ard_dwidth_array'length-1) := ard_dwidth_array;
if include_intr then
intr_ard_dwidth_array(get_id_index(ard_id_array, IPIF_INTR)) := intr_dwidth;
return intr_ard_dwidth_array;
else
return ard_dwidth_array;
end if;
end function add_intr_ard_dwidth_array;
function add_intr_ard_num_ce_array(include_intr : boolean;
ard_id_array : INTEGER_ARRAY_TYPE;
ard_num_ce_array : INTEGER_ARRAY_TYPE)
return INTEGER_ARRAY_TYPE is
variable intr_ard_num_ce_array : INTEGER_ARRAY_TYPE(0 to ard_num_ce_array'length);
begin
intr_ard_num_ce_array(0 to ard_num_ce_array'length-1) := ard_num_ce_array;
if include_intr then
intr_ard_num_ce_array(get_id_index(ard_id_array, IPIF_INTR)) := 16;
return intr_ard_num_ce_array;
else
return ard_num_ce_array;
end if;
end function add_intr_ard_num_ce_array;
end package body ipif_pkg;
|
-- IPIF Common Library Package
-------------------------------------------------------------------------------
--
-- *************************************************************************
-- ** **
-- ** DISCLAIMER OF LIABILITY **
-- ** **
-- ** This text/file contains proprietary, confidential **
-- ** information of Xilinx, Inc., is distributed under **
-- ** license from Xilinx, Inc., and may be used, copied **
-- ** and/or disclosed only pursuant to the terms of a valid **
-- ** license agreement with Xilinx, Inc. Xilinx hereby **
-- ** grants you a license to use this text/file solely for **
-- ** design, simulation, implementation and creation of **
-- ** design files limited to Xilinx devices or technologies. **
-- ** Use with non-Xilinx devices or technologies is expressly **
-- ** prohibited and immediately terminates your license unless **
-- ** covered by a separate agreement. **
-- ** **
-- ** Xilinx is providing this design, code, or information **
-- ** "as-is" solely for use in developing programs and **
-- ** solutions for Xilinx devices, with no obligation on the **
-- ** part of Xilinx to provide support. By providing this design, **
-- ** code, or information as one possible implementation of **
-- ** this feature, application or standard, Xilinx is making no **
-- ** representation that this implementation is free from any **
-- ** claims of infringement. You are responsible for obtaining **
-- ** any rights you may require for your implementation. **
-- ** Xilinx expressly disclaims any warranty whatsoever with **
-- ** respect to the adequacy of the implementation, including **
-- ** but not limited to any warranties or representations that this **
-- ** implementation is free from claims of infringement, implied **
-- ** warranties of merchantability or fitness for a particular **
-- ** purpose. **
-- ** **
-- ** Xilinx products are not intended for use in life support **
-- ** appliances, devices, or systems. Use in such applications is **
-- ** expressly prohibited. **
-- ** **
-- ** Any modifications that are made to the Source Code are **
-- ** done at the users sole risk and will be unsupported. **
-- ** The Xilinx Support Hotline does not have access to source **
-- ** code and therefore cannot answer specific questions related **
-- ** to source HDL. The Xilinx Hotline support of original source **
-- ** code IP shall only address issues and questions related **
-- ** to the standard Netlist version of the core (and thus **
-- ** indirectly, the original core source). **
-- ** **
-- ** Copyright (c) 2002-2010 Xilinx, Inc. All rights reserved. **
-- ** **
-- ** This copyright and support notice must be retained as part **
-- ** of this text at all times. **
-- ** **
-- *************************************************************************
--
-------------------------------------------------------------------------------
-- Filename: ipif_pkg.vhd
-- Version: Intital
-- Description: This file contains the constants and functions used in the
-- ipif common library components.
--
-------------------------------------------------------------------------------
-- Structure:
--
-------------------------------------------------------------------------------
-- Author: DET
-- History:
-- DET 02/21/02 -- Created from proc_common_pkg.vhd
--
-- DET 03/13/02 -- PLB IPIF development updates
-- ^^^^^^
-- - Commented out string types and string functions due to an XST
-- problem with string arrays and functions. THe string array
-- processing functions were replaced with comperable functions
-- operating on integer arrays.
-- ~~~~~~
--
--
-- DET 4/30/2002 Initial
-- ~~~~~~
-- - Added three functions: rebuild_slv32_array, rebuild_slv64_array, and
-- rebuild_int_array to support removal of unused elements from the
-- ARD arrays.
-- ^^^^^^ --
--
-- FLO 8/12/2002
-- ~~~~~~
-- - Added three functions: bits_needed_for_vac, bits_needed_for_occ,
-- and get_id_index_iboe.
-- (Removed provisional functions bits_needed_for_vacancy,
-- bits needed_for_occupancy, and bits_needed_for.)
-- ^^^^^^
--
-- FLO 3/24/2003
-- ~~~~~~
-- - Added dependent property paramters for channelized DMA.
-- - Added common property parameter array type.
-- - Definded the KEYHOLD_BURST common-property parameter.
-- ^^^^^^
--
-- FLO 10/22/2003
-- ~~~~~~
-- - Some adjustment to CHDMA parameterization.
-- - Cleanup of obsolete code and comments. (The former "XST workaround"
-- has become the officially deployed method.)
-- ^^^^^^
--
-- LSS 03/24/2004
-- ~~~~~~
-- - Added 5 functions
-- ^^^^^^
--
-- ALS 09/03/04
-- ^^^^^^
-- -- Added constants to describe the channel protocols used in MCH_OPB_IPIF
-- ~~~~~~
--
-- DET 1/17/2008 v4_0
-- ~~~~~~
-- - Changed proc_common library version to v4_0
-- - Incorporated new disclaimer header
-- ^^^^^^
--
-------------------------------------------------------------------------------
-- Naming Conventions:
-- active low signals: "*_n"
-- clock signals: "clk", "clk_div#", "clk_#x"
-- reset signals: "rst", "rst_n"
-- generics: "C_*"
-- user defined types: "*_TYPE"
-- state machine next state: "*_ns"
-- state machine current state: "*_cs"
-- combinatorial signals: "*_com"
-- pipelined or register delay signals: "*_d#"
-- counter signals: "*cnt*"
-- clock enable signals: "*_ce"
-- internal version of output port "*_i"
-- device pins: "*_pin"
-- ports: - Names begin with Uppercase
-- processes: "*_PROCESS"
-- component instantiations: "<ENTITY_>I_<#|FUNC>
-------------------------------------------------------------------------------
library ieee;
use ieee.std_logic_1164.all;
-- need conversion function to convert reals/integers to std logic vectors
use ieee.std_logic_arith.all;
use ieee.std_logic_arith.all;
use ieee.std_logic_unsigned.all;
package ipif_pkg is
-------------------------------------------------------------------------------
-- Type Declarations
-------------------------------------------------------------------------------
type SLV32_ARRAY_TYPE is array (natural range <>) of std_logic_vector(0 to 31);
subtype SLV64_TYPE is std_logic_vector(0 to 63);
type SLV64_ARRAY_TYPE is array (natural range <>) of SLV64_TYPE;
type INTEGER_ARRAY_TYPE is array (natural range <>) of integer;
-------------------------------------------------------------------------------
-- Function and Procedure Declarations
-------------------------------------------------------------------------------
function "=" (s1: in string; s2: in string) return boolean;
function equaluseCase( str1, str2 : STRING ) RETURN BOOLEAN;
function calc_num_ce (ce_num_array : INTEGER_ARRAY_TYPE) return integer;
function calc_start_ce_index (ce_num_array : INTEGER_ARRAY_TYPE;
index : integer) return integer;
function get_min_dwidth (dwidth_array: INTEGER_ARRAY_TYPE) return integer;
function get_max_dwidth (dwidth_array: INTEGER_ARRAY_TYPE) return integer;
function S32 (in_string : string) return string;
--------------------------------------------------------------------------------
-- ARD support functions.
-- These function can be useful when operating with the ARD parameterization.
--------------------------------------------------------------------------------
function get_id_index (id_array :INTEGER_ARRAY_TYPE;
id : integer)
return integer;
function get_id_index_iboe (id_array :INTEGER_ARRAY_TYPE;
id : integer)
return integer;
function find_ard_id (id_array : INTEGER_ARRAY_TYPE;
id : integer) return boolean;
function find_id_dwidth (id_array : INTEGER_ARRAY_TYPE;
dwidth_array: INTEGER_ARRAY_TYPE;
id : integer;
default : integer)
return integer;
function cnt_ipif_id_blks (id_array : INTEGER_ARRAY_TYPE) return integer;
function get_ipif_id_dbus_index (id_array : INTEGER_ARRAY_TYPE;
id : integer)
return integer ;
function rebuild_slv32_array (slv32_array : SLV32_ARRAY_TYPE;
num_valid_pairs : integer)
return SLV32_ARRAY_TYPE;
function rebuild_slv64_array (slv64_array : SLV64_ARRAY_TYPE;
num_valid_pairs : integer)
return SLV64_ARRAY_TYPE;
function rebuild_int_array (int_array : INTEGER_ARRAY_TYPE;
num_valid_entry : integer)
return INTEGER_ARRAY_TYPE;
-- 5 Functions Added 3/24/04
function populate_intr_mode_array (num_user_intr : integer;
intr_capture_mode : integer)
return INTEGER_ARRAY_TYPE ;
function add_intr_ard_id_array(include_intr : boolean;
ard_id_array : INTEGER_ARRAY_TYPE)
return INTEGER_ARRAY_TYPE;
function add_intr_ard_addr_range_array(include_intr : boolean;
ZERO_ADDR_PAD : std_logic_vector;
intr_baseaddr : std_logic_vector;
intr_highaddr : std_logic_vector;
ard_id_array : INTEGER_ARRAY_TYPE;
ard_addr_range_array : SLV64_ARRAY_TYPE)
return SLV64_ARRAY_TYPE;
function add_intr_ard_num_ce_array(include_intr : boolean;
ard_id_array : INTEGER_ARRAY_TYPE;
ard_num_ce_array : INTEGER_ARRAY_TYPE)
return INTEGER_ARRAY_TYPE;
function add_intr_ard_dwidth_array(include_intr : boolean;
intr_dwidth : integer;
ard_id_array : INTEGER_ARRAY_TYPE;
ard_dwidth_array : INTEGER_ARRAY_TYPE)
return INTEGER_ARRAY_TYPE;
function log2(x : natural) return integer;
function clog2(x : positive) return natural;
-------------------------------------------------------------------------------
-- Constant Declarations
-------------------------------------------------------------------------------
-------------------------------------------------------------------------------
-- Channel Protocols
-- The constant declarations below give symbolic-name aliases for values that
-- can be used in the C_MCH_PROTOCOL_ARRAY generic of the MCH_OPB_IPIF.
-------------------------------------------------------------------------------
constant XCL : integer := 0;
constant DAG : integer := 1;
--------------------------------------------------------------------------------
-- Address range types.
-- The constant declarations, below, give symbolic-name aliases for values
-- that can be used in the C_ARD_ID_ARRAY generic of IPIFs. The first set
-- gives aliases that are used to include IPIF services.
--------------------------------------------------------------------------------
-- IPIF module aliases
Constant IPIF_INTR : integer := 1;
Constant IPIF_RST : integer := 2;
Constant IPIF_SESR_SEAR : integer := 3;
Constant IPIF_DMA_SG : integer := 4;
Constant IPIF_WRFIFO_REG : integer := 5;
Constant IPIF_WRFIFO_DATA : integer := 6;
Constant IPIF_RDFIFO_REG : integer := 7;
Constant IPIF_RDFIFO_DATA : integer := 8;
Constant IPIF_CHDMA_CHANNELS : integer := 9;
Constant IPIF_CHDMA_GLOBAL_REGS : integer := 10;
Constant CHDMA_STATUS_FIFO : integer := 90;
-- Some predefined user module aliases
Constant USER_00 : integer := 100;
Constant USER_01 : integer := 101;
Constant USER_02 : integer := 102;
Constant USER_03 : integer := 103;
Constant USER_04 : integer := 104;
Constant USER_05 : integer := 105;
Constant USER_06 : integer := 106;
Constant USER_07 : integer := 107;
Constant USER_08 : integer := 108;
Constant USER_09 : integer := 109;
Constant USER_10 : integer := 110;
Constant USER_11 : integer := 111;
Constant USER_12 : integer := 112;
Constant USER_13 : integer := 113;
Constant USER_14 : integer := 114;
Constant USER_15 : integer := 115;
Constant USER_16 : integer := 116;
---( Start of Dependent Properties declarations
--------------------------------------------------------------------------------
-- Declarations for Dependent Properties (properties that depend on the type of
-- the address range, or in other words, address-range-specific parameters).
-- There is one property, i.e. one parameter, encoded as an integer at
-- each index of the properties array. There is one properties array for
-- each address range.
--
-- The C_ARD_DEPENDENT_PROPS_ARRAY generic parameter in (most) IPIFs is such
-- a properties array and it is usually giving its (static) value using a
-- VHDL aggregate construct. (--ToDo, give an example of this.)
--
-- The the "assigned" default value of a dependent property is zero. This value
-- is usually specified the aggregate by leaving its (index) name out so that
-- it is covered by an "others => 0" choice in the aggregate. Some parameters,
-- as noted in the definitions, below, have an "effective" default value that is
-- different from the assigned default value of zero. In such cases, the
-- function, eff_dp, given below, can be used to get the effective value of
-- the dependent property.
--------------------------------------------------------------------------------
constant DEPENDENT_PROPS_SIZE : integer := 32;
subtype DEPENDENT_PROPS_TYPE
is INTEGER_ARRAY_TYPE(0 to DEPENDENT_PROPS_SIZE-1);
type DEPENDENT_PROPS_ARRAY_TYPE
is array (natural range <>) of DEPENDENT_PROPS_TYPE;
--------------------------------------------------------------------------------
-- Below are the indices of dependent properties for the different types of
-- address ranges.
--
-- Example: Let C_ARD_DEPENDENT_PROPS_ARRAY hold the dependent properites
-- for a set of address ranges. Then, e.g.,
--
-- C_ARD_DEPENDENT_PROPS_ARRAY(i)(FIFO_CAPACITY_BITS)
--
-- gives the fifo capacity in bits, provided that the i'th address range
-- is of type IPIF_WRFIFO_DATA or IPIF_RDFIFO_DATA.
--
-- These indices should be referenced only by the names below and never
-- by numerical literals. (The right to change numerical index assignments
-- is reserved; applications using the names will not be affected by such
-- reassignments.)
--------------------------------------------------------------------------------
--
--ToDo, if the interrupt controller parameterization is ever moved to
-- C_ARD_DEPENDENT_PROPS_ARRAY, then the following declarations
-- could be uncommented and used.
---- IPIF_INTR IDX
---------------------------------------------------------------------------- ---
constant EXCLUDE_DEV_ISC : integer := 0;
-- 1 specifies that only the global interrupt
-- enable is present in the device interrupt source
-- controller and that the only source of interrupts
-- in the device is the IP interrupt source controller.
-- 0 specifies that the full device interrupt
-- source controller structure will be included.
constant INCLUDE_DEV_PENCODER : integer := 1;
-- 1 will include the Device IID in the device interrupt
-- source controller, 0 will exclude it.
--
-- IPIF_WRFIFO_DATA or IPIF_RDFIFO_DATA IDX
---------------------------------------------------------------------------- ---
constant FIFO_CAPACITY_BITS : integer := 0;
constant WR_WIDTH_BITS : integer := 1;
constant RD_WIDTH_BITS : integer := 2;
constant EXCLUDE_PACKET_MODE : integer := 3;
-- 1 Don't include packet mode features
-- 0 Include packet mode features
constant EXCLUDE_VACANCY : integer := 4;
-- 1 Don't include vacancy calculation
-- 0 Include vacancy calculation
-- See also the functions
-- bits_needed_for_vac and
-- bits_needed_for_occ that are declared below.
constant INCLUDE_DRE : integer := 5;
constant INCLUDE_AUTOPUSH_POP : integer := 6;
constant AUTOPUSH_POP_CE : integer := 7;
constant INCLUDE_CSUM : integer := 8;
--------------------------------------------------------------------------------
--
-- DMA_SG IDX
---------------------------------------------------------------------------- ---
--------------------------------------------------------------------------------
-- IPIF_CHDMA_CHANNELS IDX
---------------------------------------------------------------------------- ---
constant NUM_SUBS_FOR_PHYS_0 : integer :=0;
constant NUM_SUBS_FOR_PHYS_1 : integer :=1;
constant NUM_SUBS_FOR_PHYS_2 : integer :=2;
constant NUM_SUBS_FOR_PHYS_3 : integer :=3;
constant NUM_SUBS_FOR_PHYS_4 : integer :=4;
constant NUM_SUBS_FOR_PHYS_5 : integer :=5;
constant NUM_SUBS_FOR_PHYS_6 : integer :=6;
constant NUM_SUBS_FOR_PHYS_7 : integer :=7;
constant NUM_SUBS_FOR_PHYS_8 : integer :=8;
constant NUM_SUBS_FOR_PHYS_9 : integer :=9;
constant NUM_SUBS_FOR_PHYS_10 : integer :=10;
constant NUM_SUBS_FOR_PHYS_11 : integer :=11;
constant NUM_SUBS_FOR_PHYS_12 : integer :=12;
constant NUM_SUBS_FOR_PHYS_13 : integer :=13;
constant NUM_SUBS_FOR_PHYS_14 : integer :=14;
constant NUM_SUBS_FOR_PHYS_15 : integer :=15;
-- Gives the number of sub-channels for physical channel i.
--
-- These constants, which will be MAX_NUM_PHYS_CHANNELS in number (see
-- below), have consecutive values starting with 0 for
-- NUM_SUBS_FOR_PHYS_0. (The constants serve the purpose of giving symbolic
-- names for use in the dependent-properties aggregates that parameterize
-- an IPIF_CHDMA_CHANNELS address range.)
--
-- [Users can ignore this note for developers
-- If the number of physical channels changes, both the
-- IPIF_CHDMA_CHANNELS constants and MAX_NUM_PHYS_CHANNELS,
-- below, must be adjusted.
-- (Use of an array constant or a function of the form
-- NUM_SUBS_FOR_PHYS(i) to define the indices
-- runs afoul of LRM restrictions on non-locally static aggregate
-- choices. (Further, the LRM imposes perhaps unnecessarily
-- strict limits on what qualifies as a locally static primary.)
-- Note: This information is supplied for the benefit of anyone seeking
-- to improve the way that these NUM_SUBS_FOR_PHYS parameter
-- indices are defined.)
-- End of note for developers ]
--
-- The value associated with any index NUM_SUBS_FOR_PHYS_i in the
-- dependent-properties array must be even since TX and RX channels
-- come in pairs with the TX followed immediately by
-- the corresponding RX.
--
constant NUM_SIMPLE_DMA_CHANS : integer :=16;
-- The number of simple DMA channels.
constant NUM_SIMPLE_SG_CHANS : integer :=17;
-- The number of simple SG channels.
constant INTR_COALESCE : integer :=18;
-- 0 Interrupt coalescing is disabled
-- 1 Interrupt coalescing is enabled
constant CLK_PERIOD_PS : integer :=19;
-- The period of the OPB Bus clock in ps.
-- The default value of 0 is a special value that
-- is synonymous with 10000 ps (10 ns).
-- The value for CLK_PERIOD_PS is relevant only if (INTR_COALESCE = 1).
constant PACKET_WAIT_UNIT_NS : integer :=20;
-- Gives the unit for used for timing of pack-wait bounds.
-- The default value of 0 is a special value that
-- is synonymous with 1,000,000 ns (1 ms) and a non-default
-- value is typically only used for testing.
-- Relevant only if (INTR_COALESCE = 1).
constant BURST_SIZE : integer :=21;
-- 1, 2, 4, 8 or 16
-- The default value of 0 is a special value that
-- is synonymous with a burst size of 16.
-- Setting the BURST_SIZE to 1 effectively disables
-- bursts.
constant REMAINDER_AS_SINGLES : integer :=22;
-- 0 Remainder handled as a short burst
-- 1 Remainder handled as a series of singles
--------------------------------------------------------------------------------
-- The constant below is not the index of a dependent-properties
-- parameter (and, as such, would never appear as a choice in a
-- dependent-properties aggregate). Rather, it is fixed to the maximum
-- number of physical channels that an Address Range of type
-- IPIF_CHDMA_CHANNELS supports. It must be maintained in conjuction with
-- the constants named, e.g., NUM_SUBS_FOR_PHYS_15, above.
--------------------------------------------------------------------------------
constant MAX_NUM_PHYS_CHANNELS : natural := 16;
--------------------------------------------------------------------------
-- EXAMPLE: Here is an example dependent-properties aggregate for an
-- address range of type IPIF_CHDMA_CHANNELS.
-- To have a compact list of all of the CHDMA parameters, all are
-- shown, however three are commented out and the unneeded
-- MUM_SUBS_FOR_PHYS_x are excluded. The "OTHERS => 0" association
-- gives these parameters their default values, such that, for the example
--
-- - All physical channels above 2 have zero subchannels (effectively,
-- these physical channels are not used)
-- - There are no simple SG channels
-- - The packet-wait time unit is 1 ms
-- - Burst size is 16
--------------------------------------------------------------------------
-- (
-- NUM_SUBS_FOR_PHYS_0 => 8,
-- NUM_SUBS_FOR_PHYS_1 => 4,
-- NUM_SUBS_FOR_PHYS_2 => 14,
-- NUM_SIMPLE_DMA_CHANS => 1,
-- --NUM_SIMPLE_SG_CHANS => 5,
-- INTR_COALESCE => 1,
-- CLK_PERIOD_PS => 20000,
-- --PACKET_WAIT_UNIT_NS => 50000,
-- --BURST_SIZE => 1,
-- REMAINDER_AS_SINGLES => 1,
-- OTHERS => 0
-- )
--
--------------------------------------------------------------------------------
--------------------------------------------------------------------------------
-- Calculates the number of bits needed to convey the vacancy (emptiness) of
-- the fifo described by dependent_props, if fifo_present. If not fifo_present,
-- returns 0 (or the smallest value allowed by tool limitations on null arrays)
-- without making reference to dependent_props.
--------------------------------------------------------------------------------
function bits_needed_for_vac(
fifo_present: boolean;
dependent_props : DEPENDENT_PROPS_TYPE
) return integer;
--------------------------------------------------------------------------------
-- Calculates the number of bits needed to convey the occupancy (fullness) of
-- the fifo described by dependent_props, if fifo_present. If not fifo_present,
-- returns 0 (or the smallest value allowed by tool limitations on null arrays)
-- without making reference to dependent_props.
--------------------------------------------------------------------------------
function bits_needed_for_occ(
fifo_present: boolean;
dependent_props : DEPENDENT_PROPS_TYPE
) return integer;
--------------------------------------------------------------------------------
-- Function eff_dp.
--
-- For some of the dependent properties, the default value of zero is meant
-- to imply an effective default value of other than zero (see e.g.
-- PKT_WAIT_UNIT_NS for the IPIF_CHDMA_CHANNELS address-range type). The
-- following function is used to get the (possibly default-adjusted)
-- value for a dependent property.
--
-- Example call:
--
-- eff_value_of_param :=
-- eff_dp(
-- C_IPIF_CHDMA_CHANNELS,
-- PACKET_WAIT_UNIT_NS,
-- C_ARD_DEPENDENT_PROPS_ARRAY(i)(PACKET_WAIT_UNIT_NS)
-- );
--
-- where C_ARD_DEPENDENT_PROPS_ARRAY(i) is an object of type
-- DEPENDENT_PROPS_ARRAY_TYPE, that was parameterized for an address range of
-- type C_IPIF_CHDMA_CHANNELS.
--------------------------------------------------------------------------------
function eff_dp(id : integer; -- The type of address range.
dep_prop : integer; -- The index of the dependent prop.
value : integer -- The value at that index.
) return integer; -- The effective value, possibly adjusted
-- if value has the default value of 0.
---) End of Dependent Properties declarations
--------------------------------------------------------------------------------
-- Declarations for Common Properties (properties that apply regardless of the
-- type of the address range). Structurally, these work the same as
-- the dependent properties.
--------------------------------------------------------------------------------
constant COMMON_PROPS_SIZE : integer := 2;
subtype COMMON_PROPS_TYPE
is INTEGER_ARRAY_TYPE(0 to COMMON_PROPS_SIZE-1);
type COMMON_PROPS_ARRAY_TYPE
is array (natural range <>) of COMMON_PROPS_TYPE;
--------------------------------------------------------------------------------
-- Below are the indices of the common properties.
--
-- These indices should be referenced only by the names below and never
-- by numerical literals.
-- IDX
---------------------------------------------------------------------------- ---
constant KEYHOLE_BURST : integer := 0;
-- 1 All addresses of a burst are forced to the initial
-- address of the burst.
-- 0 Burst addresses follow the bus protocol.
-- IP interrupt mode array constants
Constant INTR_PASS_THRU : integer := 1;
Constant INTR_PASS_THRU_INV : integer := 2;
Constant INTR_REG_EVENT : integer := 3;
Constant INTR_REG_EVENT_INV : integer := 4;
Constant INTR_POS_EDGE_DETECT : integer := 5;
Constant INTR_NEG_EDGE_DETECT : integer := 6;
end ipif_pkg;
package body ipif_pkg is
-------------------------------------------------------------------------------
-- Function log2 -- returns number of bits needed to encode x choices
-- x = 0 returns 0
-- x = 1 returns 0
-- x = 2 returns 1
-- x = 4 returns 2, etc.
-------------------------------------------------------------------------------
--
function log2(x : natural) return integer is
variable i : integer := 0;
variable val: integer := 1;
begin
if x = 0 then return 0;
else
for j in 0 to 29 loop -- for loop for XST
if val >= x then null;
else
i := i+1;
val := val*2;
end if;
end loop;
-- Fix per CR520627 XST was ignoring this anyway and printing a
-- Warning in SRP file. This will get rid of the warning and not
-- impact simulation.
-- synthesis translate_off
assert val >= x
report "Function log2 received argument larger" &
" than its capability of 2^30. "
severity failure;
-- synthesis translate_on
return i;
end if;
end function log2;
--------------------------------------------------------------------------------
-- Function clog2 - returns the integer ceiling of the base 2 logarithm of x,
-- i.e., the least integer greater than or equal to log2(x).
--------------------------------------------------------------------------------
function clog2(x : positive) return natural is
variable r : natural := 0;
variable rp : natural := 1; -- rp tracks the value 2**r
begin
while rp < x loop -- Termination condition T: x <= 2**r
-- Loop invariant L: 2**(r-1) < x
r := r + 1;
if rp > integer'high - rp then exit; end if; -- If doubling rp overflows
-- the integer range, the doubled value would exceed x, so safe to exit.
rp := rp + rp;
end loop;
-- L and T <-> 2**(r-1) < x <= 2**r <-> (r-1) < log2(x) <= r
return r; --
end clog2;
-------------------------------------------------------------------------------
-- Function Definitions
-------------------------------------------------------------------------------
-----------------------------------------------------------------------------
-- Function "="
--
-- This function can be used to overload the "=" operator when comparing
-- strings.
-----------------------------------------------------------------------------
function "=" (s1: in string; s2: in string) return boolean is
constant tc: character := ' '; -- string termination character
variable i: integer := 1;
variable v1 : string(1 to s1'length) := s1;
variable v2 : string(1 to s2'length) := s2;
begin
while (i <= v1'length) and (v1(i) /= tc) and
(i <= v2'length) and (v2(i) /= tc) and
(v1(i) = v2(i))
loop
i := i+1;
end loop;
return ((i > v1'length) or (v1(i) = tc)) and
((i > v2'length) or (v2(i) = tc));
end;
----------------------------------------------------------------------------
-- Function equaluseCase
--
-- This function returns true if case sensitive string comparison determines
-- that str1 and str2 are the same.
-----------------------------------------------------------------------------
FUNCTION equaluseCase( str1, str2 : STRING ) RETURN BOOLEAN IS
CONSTANT len1 : INTEGER := str1'length;
CONSTANT len2 : INTEGER := str2'length;
VARIABLE equal : BOOLEAN := TRUE;
BEGIN
IF NOT (len1=len2) THEN
equal := FALSE;
ELSE
FOR i IN str1'range LOOP
IF NOT (str1(i) = str2(i)) THEN
equal := FALSE;
END IF;
END LOOP;
END IF;
RETURN equal;
END equaluseCase;
-----------------------------------------------------------------------------
-- Function calc_num_ce
--
-- This function is used to process the array specifying the number of Chip
-- Enables required for a Base Address specification. The array is input to
-- the function and an integer is returned reflecting the total number of
-- Chip Enables required for the CE, RdCE, and WrCE Buses
-----------------------------------------------------------------------------
function calc_num_ce (ce_num_array : INTEGER_ARRAY_TYPE) return integer is
Variable ce_num_sum : integer := 0;
begin
for i in 0 to (ce_num_array'length)-1 loop
ce_num_sum := ce_num_sum + ce_num_array(i);
End loop;
return(ce_num_sum);
end function calc_num_ce;
-----------------------------------------------------------------------------
-- Function calc_start_ce_index
--
-- This function is used to process the array specifying the number of Chip
-- Enables required for a Base Address specification. The CE Size array is
-- input to the function and an integer index representing the index of the
-- target module in the ce_num_array. An integer is returned reflecting the
-- starting index of the assigned Chip Enables within the CE, RdCE, and
-- WrCE Buses.
-----------------------------------------------------------------------------
function calc_start_ce_index (ce_num_array : INTEGER_ARRAY_TYPE;
index : integer) return integer is
Variable ce_num_sum : integer := 0;
begin
If (index = 0) Then
ce_num_sum := 0;
else
for i in 0 to index-1 loop
ce_num_sum := ce_num_sum + ce_num_array(i);
End loop;
End if;
return(ce_num_sum);
end function calc_start_ce_index;
-----------------------------------------------------------------------------
-- Function get_min_dwidth
--
-- This function is used to process the array specifying the data bus width
-- for each of the target modules. The dwidth_array is input to the function
-- and an integer is returned that is the smallest value found of all the
-- entries in the array.
-----------------------------------------------------------------------------
function get_min_dwidth (dwidth_array: INTEGER_ARRAY_TYPE) return integer is
Variable temp_min : Integer := 1024;
begin
for i in 0 to dwidth_array'length-1 loop
If (dwidth_array(i) < temp_min) Then
temp_min := dwidth_array(i);
else
null;
End if;
End loop;
return(temp_min);
end function get_min_dwidth;
-----------------------------------------------------------------------------
-- Function get_max_dwidth
--
-- This function is used to process the array specifying the data bus width
-- for each of the target modules. The dwidth_array is input to the function
-- and an integer is returned that is the largest value found of all the
-- entries in the array.
-----------------------------------------------------------------------------
function get_max_dwidth (dwidth_array: INTEGER_ARRAY_TYPE) return integer is
Variable temp_max : Integer := 0;
begin
for i in 0 to dwidth_array'length-1 loop
If (dwidth_array(i) > temp_max) Then
temp_max := dwidth_array(i);
else
null;
End if;
End loop;
return(temp_max);
end function get_max_dwidth;
-----------------------------------------------------------------------------
-- Function S32
--
-- This function is used to expand an input string to 32 characters by
-- padding with spaces. If the input string is larger than 32 characters,
-- it will truncate to 32 characters.
-----------------------------------------------------------------------------
function S32 (in_string : string) return string is
constant OUTPUT_STRING_LENGTH : integer := 32;
Constant space : character := ' ';
variable new_string : string(1 to 32);
Variable start_index : Integer := in_string'length+1;
begin
If (in_string'length < OUTPUT_STRING_LENGTH) Then
for i in 1 to in_string'length loop
new_string(i) := in_string(i);
End loop;
for j in start_index to OUTPUT_STRING_LENGTH loop
new_string(j) := space;
End loop;
else -- use first 32 chars of in_string (truncate the rest)
for k in 1 to OUTPUT_STRING_LENGTH loop
new_string(k) := in_string(k);
End loop;
End if;
return(new_string);
end function S32;
-----------------------------------------------------------------------------
-- Function get_id_index
--
-- This function is used to process the array specifying the target function
-- assigned to a Base Address pair address range. The id_array and a
-- id number is input to the function. A integer is returned reflecting the
-- array index of the id matching the id input number. This function
-- should only be called if the id number is known to exist in the
-- name_array input. This can be detirmined by using the find_ard_id
-- function.
-----------------------------------------------------------------------------
function get_id_index (id_array :INTEGER_ARRAY_TYPE;
id : integer) return integer is
Variable match : Boolean := false;
Variable match_index : Integer := 10000; -- a really big number!
begin
for array_index in 0 to id_array'length-1 loop
If (match = true) Then -- match already found so do nothing
null;
else -- compare the numbers one by one
match := (id_array(array_index) = id);
If (match) Then
match_index := array_index;
else
null;
End if;
End if;
End loop;
return(match_index);
end function get_id_index;
--------------------------------------------------------------------------------
-- get_id_index but return a value in bounds on error (iboe).
--
-- This function is the same as get_id_index, except that when id does
-- not exist in id_array, the value returned is any index that is
-- within the index range of id_array.
--
-- This function would normally only be used where function find_ard_id
-- is used to establish the existence of id but, even when non-existent,
-- an element of one of the ARD arrays will be computed from the
-- returned get_id_index_iboe value. See, e.g., function bits_needed_for_vac
-- and the example call, below
--
-- bits_needed_for_vac(
-- find_ard_id(C_ARD_ID_ARRAY, IPIF_RDFIFO_DATA),
-- C_ARD_DEPENDENT_PROPS_ARRAY(get_id_index_iboe(C_ARD_ID_ARRAY,
-- IPIF_RDFIFO_DATA))
-- )
--------------------------------------------------------------------------------
function get_id_index_iboe (id_array :INTEGER_ARRAY_TYPE;
id : integer) return integer is
Variable match : Boolean := false;
Variable match_index : Integer := id_array'left; -- any valid array index
begin
for array_index in 0 to id_array'length-1 loop
If (match = true) Then -- match already found so do nothing
null;
else -- compare the numbers one by one
match := (id_array(array_index) = id);
If (match) Then match_index := array_index;
else null;
End if;
End if;
End loop;
return(match_index);
end function get_id_index_iboe;
-----------------------------------------------------------------------------
-- Function find_ard_id
--
-- This function is used to process the array specifying the target function
-- assigned to a Base Address pair address range. The id_array and a
-- integer id is input to the function. A boolean is returned reflecting the
-- presence (or not) of a number in the array matching the id input number.
-----------------------------------------------------------------------------
function find_ard_id (id_array : INTEGER_ARRAY_TYPE;
id : integer) return boolean is
Variable match : Boolean := false;
begin
for array_index in 0 to id_array'length-1 loop
If (match = true) Then -- match already found so do nothing
null;
else -- compare the numbers one by one
match := (id_array(array_index) = id);
End if;
End loop;
return(match);
end function find_ard_id;
-----------------------------------------------------------------------------
-- Function find_id_dwidth
--
-- This function is used to find the data width of a target module. If the
-- target module exists, the data width is extracted from the input dwidth
-- array. If the module is not in the ID array, the default input is
-- returned. This function is needed to assign data port size constraints on
-- unconstrained port widths.
-----------------------------------------------------------------------------
function find_id_dwidth (id_array : INTEGER_ARRAY_TYPE;
dwidth_array: INTEGER_ARRAY_TYPE;
id : integer;
default : integer) return integer is
Variable id_present : Boolean := false;
Variable array_index : Integer := 0;
Variable dwidth : Integer := default;
begin
id_present := find_ard_id(id_array, id);
If (id_present) Then
array_index := get_id_index (id_array, id);
dwidth := dwidth_array(array_index);
else
null; -- use default input
End if;
Return (dwidth);
end function find_id_dwidth;
-----------------------------------------------------------------------------
-- Function cnt_ipif_id_blks
--
-- This function is used to detirmine the number of IPIF components specified
-- in the ARD ID Array. An integer is returned representing the number
-- of elements counted. User IDs are ignored in the counting process.
-----------------------------------------------------------------------------
function cnt_ipif_id_blks (id_array : INTEGER_ARRAY_TYPE)
return integer is
Variable blk_count : integer := 0;
Variable temp_id : integer;
begin
for array_index in 0 to id_array'length-1 loop
temp_id := id_array(array_index);
If (temp_id = IPIF_WRFIFO_DATA or
temp_id = IPIF_RDFIFO_DATA or
temp_id = IPIF_RST or
temp_id = IPIF_INTR or
temp_id = IPIF_DMA_SG or
temp_id = IPIF_SESR_SEAR
) Then -- IPIF block found
blk_count := blk_count+1;
else -- go to next loop iteration
null;
End if;
End loop;
return(blk_count);
end function cnt_ipif_id_blks;
-----------------------------------------------------------------------------
-- Function get_ipif_id_dbus_index
--
-- This function is used to detirmine the IPIF relative index of a given
-- ID value. User IDs are ignored in the index detirmination.
-----------------------------------------------------------------------------
function get_ipif_id_dbus_index (id_array : INTEGER_ARRAY_TYPE;
id : integer)
return integer is
Variable blk_index : integer := 0;
Variable temp_id : integer;
Variable id_found : Boolean := false;
begin
for array_index in 0 to id_array'length-1 loop
temp_id := id_array(array_index);
If (id_found) then
null;
elsif (temp_id = id) then
id_found := true;
elsif (temp_id = IPIF_WRFIFO_DATA or
temp_id = IPIF_RDFIFO_DATA or
temp_id = IPIF_RST or
temp_id = IPIF_INTR or
temp_id = IPIF_DMA_SG or
temp_id = IPIF_SESR_SEAR
) Then -- IPIF block found
blk_index := blk_index+1;
else -- user block so do nothing
null;
End if;
End loop;
return(blk_index);
end function get_ipif_id_dbus_index;
------------------------------------------------------------------------------
-- Function: rebuild_slv32_array
--
-- Description:
-- This function takes an input slv32 array and rebuilds an output slv32
-- array composed of the first "num_valid_entry" elements from the input
-- array.
------------------------------------------------------------------------------
function rebuild_slv32_array (slv32_array : SLV32_ARRAY_TYPE;
num_valid_pairs : integer)
return SLV32_ARRAY_TYPE is
--Constants
constant num_elements : Integer := num_valid_pairs * 2;
-- Variables
variable temp_baseaddr32_array : SLV32_ARRAY_TYPE( 0 to num_elements-1);
begin
for array_index in 0 to num_elements-1 loop
temp_baseaddr32_array(array_index) := slv32_array(array_index);
end loop;
return(temp_baseaddr32_array);
end function rebuild_slv32_array;
------------------------------------------------------------------------------
-- Function: rebuild_slv64_array
--
-- Description:
-- This function takes an input slv64 array and rebuilds an output slv64
-- array composed of the first "num_valid_entry" elements from the input
-- array.
------------------------------------------------------------------------------
function rebuild_slv64_array (slv64_array : SLV64_ARRAY_TYPE;
num_valid_pairs : integer)
return SLV64_ARRAY_TYPE is
--Constants
constant num_elements : Integer := num_valid_pairs * 2;
-- Variables
variable temp_baseaddr64_array : SLV64_ARRAY_TYPE( 0 to num_elements-1);
begin
for array_index in 0 to num_elements-1 loop
temp_baseaddr64_array(array_index) := slv64_array(array_index);
end loop;
return(temp_baseaddr64_array);
end function rebuild_slv64_array;
------------------------------------------------------------------------------
-- Function: rebuild_int_array
--
-- Description:
-- This function takes an input integer array and rebuilds an output integer
-- array composed of the first "num_valid_entry" elements from the input
-- array.
------------------------------------------------------------------------------
function rebuild_int_array (int_array : INTEGER_ARRAY_TYPE;
num_valid_entry : integer)
return INTEGER_ARRAY_TYPE is
-- Variables
variable temp_int_array : INTEGER_ARRAY_TYPE( 0 to num_valid_entry-1);
begin
for array_index in 0 to num_valid_entry-1 loop
temp_int_array(array_index) := int_array(array_index);
end loop;
return(temp_int_array);
end function rebuild_int_array;
function bits_needed_for_vac(
fifo_present: boolean;
dependent_props : DEPENDENT_PROPS_TYPE
) return integer is
begin
if not fifo_present then
return 1; -- Zero would be better but leads to "0 to -1" null
-- ranges that are not handled by XST Flint or earlier
-- because of the negative index.
else
return
log2(1 + dependent_props(FIFO_CAPACITY_BITS) /
dependent_props(RD_WIDTH_BITS)
);
end if;
end function bits_needed_for_vac;
function bits_needed_for_occ(
fifo_present: boolean;
dependent_props : DEPENDENT_PROPS_TYPE
) return integer is
begin
if not fifo_present then
return 1; -- Zero would be better but leads to "0 to -1" null
-- ranges that are not handled by XST Flint or earlier
-- because of the negative index.
else
return
log2(1 + dependent_props(FIFO_CAPACITY_BITS) /
dependent_props(WR_WIDTH_BITS)
);
end if;
end function bits_needed_for_occ;
function eff_dp(id : integer;
dep_prop : integer;
value : integer) return integer is
variable dp : integer := dep_prop;
type bo2na_type is array (boolean) of natural;
constant bo2na : bo2na_type := (0, 1);
begin
if value /= 0 then return value; end if; -- Not default
case id is
when IPIF_CHDMA_CHANNELS =>
-------------------
return( bo2na(dp = CLK_PERIOD_PS ) * 10000
+ bo2na(dp = PACKET_WAIT_UNIT_NS ) * 1000000
+ bo2na(dp = BURST_SIZE ) * 16
);
when others => return 0;
end case;
end eff_dp;
function populate_intr_mode_array (num_user_intr : integer;
intr_capture_mode : integer)
return INTEGER_ARRAY_TYPE is
variable intr_mode_array : INTEGER_ARRAY_TYPE(0 to num_user_intr-1);
begin
for i in 0 to num_user_intr-1 loop
intr_mode_array(i) := intr_capture_mode;
end loop;
return intr_mode_array;
end function populate_intr_mode_array;
function add_intr_ard_id_array(include_intr : boolean;
ard_id_array : INTEGER_ARRAY_TYPE)
return INTEGER_ARRAY_TYPE is
variable intr_ard_id_array : INTEGER_ARRAY_TYPE(0 to ard_id_array'length);
begin
intr_ard_id_array(0 to ard_id_array'length-1) := ard_id_array;
if include_intr then
intr_ard_id_array(ard_id_array'length) := IPIF_INTR;
return intr_ard_id_array;
else
return ard_id_array;
end if;
end function add_intr_ard_id_array;
function add_intr_ard_addr_range_array(include_intr : boolean;
ZERO_ADDR_PAD : std_logic_vector;
intr_baseaddr : std_logic_vector;
intr_highaddr : std_logic_vector;
ard_id_array : INTEGER_ARRAY_TYPE;
ard_addr_range_array : SLV64_ARRAY_TYPE)
return SLV64_ARRAY_TYPE is
variable intr_ard_addr_range_array : SLV64_ARRAY_TYPE(0 to ard_addr_range_array'length+1);
begin
intr_ard_addr_range_array(0 to ard_addr_range_array'length-1) := ard_addr_range_array;
if include_intr then
intr_ard_addr_range_array(2*get_id_index(ard_id_array,IPIF_INTR))
:= ZERO_ADDR_PAD & intr_baseaddr;
intr_ard_addr_range_array(2*get_id_index(ard_id_array,IPIF_INTR)+1)
:= ZERO_ADDR_PAD & intr_highaddr;
return intr_ard_addr_range_array;
else
return ard_addr_range_array;
end if;
end function add_intr_ard_addr_range_array;
function add_intr_ard_dwidth_array(include_intr : boolean;
intr_dwidth : integer;
ard_id_array : INTEGER_ARRAY_TYPE;
ard_dwidth_array : INTEGER_ARRAY_TYPE)
return INTEGER_ARRAY_TYPE is
variable intr_ard_dwidth_array : INTEGER_ARRAY_TYPE(0 to ard_dwidth_array'length);
begin
intr_ard_dwidth_array(0 to ard_dwidth_array'length-1) := ard_dwidth_array;
if include_intr then
intr_ard_dwidth_array(get_id_index(ard_id_array, IPIF_INTR)) := intr_dwidth;
return intr_ard_dwidth_array;
else
return ard_dwidth_array;
end if;
end function add_intr_ard_dwidth_array;
function add_intr_ard_num_ce_array(include_intr : boolean;
ard_id_array : INTEGER_ARRAY_TYPE;
ard_num_ce_array : INTEGER_ARRAY_TYPE)
return INTEGER_ARRAY_TYPE is
variable intr_ard_num_ce_array : INTEGER_ARRAY_TYPE(0 to ard_num_ce_array'length);
begin
intr_ard_num_ce_array(0 to ard_num_ce_array'length-1) := ard_num_ce_array;
if include_intr then
intr_ard_num_ce_array(get_id_index(ard_id_array, IPIF_INTR)) := 16;
return intr_ard_num_ce_array;
else
return ard_num_ce_array;
end if;
end function add_intr_ard_num_ce_array;
end package body ipif_pkg;
|
-- IPIF Common Library Package
-------------------------------------------------------------------------------
--
-- *************************************************************************
-- ** **
-- ** DISCLAIMER OF LIABILITY **
-- ** **
-- ** This text/file contains proprietary, confidential **
-- ** information of Xilinx, Inc., is distributed under **
-- ** license from Xilinx, Inc., and may be used, copied **
-- ** and/or disclosed only pursuant to the terms of a valid **
-- ** license agreement with Xilinx, Inc. Xilinx hereby **
-- ** grants you a license to use this text/file solely for **
-- ** design, simulation, implementation and creation of **
-- ** design files limited to Xilinx devices or technologies. **
-- ** Use with non-Xilinx devices or technologies is expressly **
-- ** prohibited and immediately terminates your license unless **
-- ** covered by a separate agreement. **
-- ** **
-- ** Xilinx is providing this design, code, or information **
-- ** "as-is" solely for use in developing programs and **
-- ** solutions for Xilinx devices, with no obligation on the **
-- ** part of Xilinx to provide support. By providing this design, **
-- ** code, or information as one possible implementation of **
-- ** this feature, application or standard, Xilinx is making no **
-- ** representation that this implementation is free from any **
-- ** claims of infringement. You are responsible for obtaining **
-- ** any rights you may require for your implementation. **
-- ** Xilinx expressly disclaims any warranty whatsoever with **
-- ** respect to the adequacy of the implementation, including **
-- ** but not limited to any warranties or representations that this **
-- ** implementation is free from claims of infringement, implied **
-- ** warranties of merchantability or fitness for a particular **
-- ** purpose. **
-- ** **
-- ** Xilinx products are not intended for use in life support **
-- ** appliances, devices, or systems. Use in such applications is **
-- ** expressly prohibited. **
-- ** **
-- ** Any modifications that are made to the Source Code are **
-- ** done at the users sole risk and will be unsupported. **
-- ** The Xilinx Support Hotline does not have access to source **
-- ** code and therefore cannot answer specific questions related **
-- ** to source HDL. The Xilinx Hotline support of original source **
-- ** code IP shall only address issues and questions related **
-- ** to the standard Netlist version of the core (and thus **
-- ** indirectly, the original core source). **
-- ** **
-- ** Copyright (c) 2002-2010 Xilinx, Inc. All rights reserved. **
-- ** **
-- ** This copyright and support notice must be retained as part **
-- ** of this text at all times. **
-- ** **
-- *************************************************************************
--
-------------------------------------------------------------------------------
-- Filename: ipif_pkg.vhd
-- Version: Intital
-- Description: This file contains the constants and functions used in the
-- ipif common library components.
--
-------------------------------------------------------------------------------
-- Structure:
--
-------------------------------------------------------------------------------
-- Author: DET
-- History:
-- DET 02/21/02 -- Created from proc_common_pkg.vhd
--
-- DET 03/13/02 -- PLB IPIF development updates
-- ^^^^^^
-- - Commented out string types and string functions due to an XST
-- problem with string arrays and functions. THe string array
-- processing functions were replaced with comperable functions
-- operating on integer arrays.
-- ~~~~~~
--
--
-- DET 4/30/2002 Initial
-- ~~~~~~
-- - Added three functions: rebuild_slv32_array, rebuild_slv64_array, and
-- rebuild_int_array to support removal of unused elements from the
-- ARD arrays.
-- ^^^^^^ --
--
-- FLO 8/12/2002
-- ~~~~~~
-- - Added three functions: bits_needed_for_vac, bits_needed_for_occ,
-- and get_id_index_iboe.
-- (Removed provisional functions bits_needed_for_vacancy,
-- bits needed_for_occupancy, and bits_needed_for.)
-- ^^^^^^
--
-- FLO 3/24/2003
-- ~~~~~~
-- - Added dependent property paramters for channelized DMA.
-- - Added common property parameter array type.
-- - Definded the KEYHOLD_BURST common-property parameter.
-- ^^^^^^
--
-- FLO 10/22/2003
-- ~~~~~~
-- - Some adjustment to CHDMA parameterization.
-- - Cleanup of obsolete code and comments. (The former "XST workaround"
-- has become the officially deployed method.)
-- ^^^^^^
--
-- LSS 03/24/2004
-- ~~~~~~
-- - Added 5 functions
-- ^^^^^^
--
-- ALS 09/03/04
-- ^^^^^^
-- -- Added constants to describe the channel protocols used in MCH_OPB_IPIF
-- ~~~~~~
--
-- DET 1/17/2008 v4_0
-- ~~~~~~
-- - Changed proc_common library version to v4_0
-- - Incorporated new disclaimer header
-- ^^^^^^
--
-------------------------------------------------------------------------------
-- Naming Conventions:
-- active low signals: "*_n"
-- clock signals: "clk", "clk_div#", "clk_#x"
-- reset signals: "rst", "rst_n"
-- generics: "C_*"
-- user defined types: "*_TYPE"
-- state machine next state: "*_ns"
-- state machine current state: "*_cs"
-- combinatorial signals: "*_com"
-- pipelined or register delay signals: "*_d#"
-- counter signals: "*cnt*"
-- clock enable signals: "*_ce"
-- internal version of output port "*_i"
-- device pins: "*_pin"
-- ports: - Names begin with Uppercase
-- processes: "*_PROCESS"
-- component instantiations: "<ENTITY_>I_<#|FUNC>
-------------------------------------------------------------------------------
library ieee;
use ieee.std_logic_1164.all;
-- need conversion function to convert reals/integers to std logic vectors
use ieee.std_logic_arith.all;
use ieee.std_logic_arith.all;
use ieee.std_logic_unsigned.all;
package ipif_pkg is
-------------------------------------------------------------------------------
-- Type Declarations
-------------------------------------------------------------------------------
type SLV32_ARRAY_TYPE is array (natural range <>) of std_logic_vector(0 to 31);
subtype SLV64_TYPE is std_logic_vector(0 to 63);
type SLV64_ARRAY_TYPE is array (natural range <>) of SLV64_TYPE;
type INTEGER_ARRAY_TYPE is array (natural range <>) of integer;
-------------------------------------------------------------------------------
-- Function and Procedure Declarations
-------------------------------------------------------------------------------
function "=" (s1: in string; s2: in string) return boolean;
function equaluseCase( str1, str2 : STRING ) RETURN BOOLEAN;
function calc_num_ce (ce_num_array : INTEGER_ARRAY_TYPE) return integer;
function calc_start_ce_index (ce_num_array : INTEGER_ARRAY_TYPE;
index : integer) return integer;
function get_min_dwidth (dwidth_array: INTEGER_ARRAY_TYPE) return integer;
function get_max_dwidth (dwidth_array: INTEGER_ARRAY_TYPE) return integer;
function S32 (in_string : string) return string;
--------------------------------------------------------------------------------
-- ARD support functions.
-- These function can be useful when operating with the ARD parameterization.
--------------------------------------------------------------------------------
function get_id_index (id_array :INTEGER_ARRAY_TYPE;
id : integer)
return integer;
function get_id_index_iboe (id_array :INTEGER_ARRAY_TYPE;
id : integer)
return integer;
function find_ard_id (id_array : INTEGER_ARRAY_TYPE;
id : integer) return boolean;
function find_id_dwidth (id_array : INTEGER_ARRAY_TYPE;
dwidth_array: INTEGER_ARRAY_TYPE;
id : integer;
default : integer)
return integer;
function cnt_ipif_id_blks (id_array : INTEGER_ARRAY_TYPE) return integer;
function get_ipif_id_dbus_index (id_array : INTEGER_ARRAY_TYPE;
id : integer)
return integer ;
function rebuild_slv32_array (slv32_array : SLV32_ARRAY_TYPE;
num_valid_pairs : integer)
return SLV32_ARRAY_TYPE;
function rebuild_slv64_array (slv64_array : SLV64_ARRAY_TYPE;
num_valid_pairs : integer)
return SLV64_ARRAY_TYPE;
function rebuild_int_array (int_array : INTEGER_ARRAY_TYPE;
num_valid_entry : integer)
return INTEGER_ARRAY_TYPE;
-- 5 Functions Added 3/24/04
function populate_intr_mode_array (num_user_intr : integer;
intr_capture_mode : integer)
return INTEGER_ARRAY_TYPE ;
function add_intr_ard_id_array(include_intr : boolean;
ard_id_array : INTEGER_ARRAY_TYPE)
return INTEGER_ARRAY_TYPE;
function add_intr_ard_addr_range_array(include_intr : boolean;
ZERO_ADDR_PAD : std_logic_vector;
intr_baseaddr : std_logic_vector;
intr_highaddr : std_logic_vector;
ard_id_array : INTEGER_ARRAY_TYPE;
ard_addr_range_array : SLV64_ARRAY_TYPE)
return SLV64_ARRAY_TYPE;
function add_intr_ard_num_ce_array(include_intr : boolean;
ard_id_array : INTEGER_ARRAY_TYPE;
ard_num_ce_array : INTEGER_ARRAY_TYPE)
return INTEGER_ARRAY_TYPE;
function add_intr_ard_dwidth_array(include_intr : boolean;
intr_dwidth : integer;
ard_id_array : INTEGER_ARRAY_TYPE;
ard_dwidth_array : INTEGER_ARRAY_TYPE)
return INTEGER_ARRAY_TYPE;
function log2(x : natural) return integer;
function clog2(x : positive) return natural;
-------------------------------------------------------------------------------
-- Constant Declarations
-------------------------------------------------------------------------------
-------------------------------------------------------------------------------
-- Channel Protocols
-- The constant declarations below give symbolic-name aliases for values that
-- can be used in the C_MCH_PROTOCOL_ARRAY generic of the MCH_OPB_IPIF.
-------------------------------------------------------------------------------
constant XCL : integer := 0;
constant DAG : integer := 1;
--------------------------------------------------------------------------------
-- Address range types.
-- The constant declarations, below, give symbolic-name aliases for values
-- that can be used in the C_ARD_ID_ARRAY generic of IPIFs. The first set
-- gives aliases that are used to include IPIF services.
--------------------------------------------------------------------------------
-- IPIF module aliases
Constant IPIF_INTR : integer := 1;
Constant IPIF_RST : integer := 2;
Constant IPIF_SESR_SEAR : integer := 3;
Constant IPIF_DMA_SG : integer := 4;
Constant IPIF_WRFIFO_REG : integer := 5;
Constant IPIF_WRFIFO_DATA : integer := 6;
Constant IPIF_RDFIFO_REG : integer := 7;
Constant IPIF_RDFIFO_DATA : integer := 8;
Constant IPIF_CHDMA_CHANNELS : integer := 9;
Constant IPIF_CHDMA_GLOBAL_REGS : integer := 10;
Constant CHDMA_STATUS_FIFO : integer := 90;
-- Some predefined user module aliases
Constant USER_00 : integer := 100;
Constant USER_01 : integer := 101;
Constant USER_02 : integer := 102;
Constant USER_03 : integer := 103;
Constant USER_04 : integer := 104;
Constant USER_05 : integer := 105;
Constant USER_06 : integer := 106;
Constant USER_07 : integer := 107;
Constant USER_08 : integer := 108;
Constant USER_09 : integer := 109;
Constant USER_10 : integer := 110;
Constant USER_11 : integer := 111;
Constant USER_12 : integer := 112;
Constant USER_13 : integer := 113;
Constant USER_14 : integer := 114;
Constant USER_15 : integer := 115;
Constant USER_16 : integer := 116;
---( Start of Dependent Properties declarations
--------------------------------------------------------------------------------
-- Declarations for Dependent Properties (properties that depend on the type of
-- the address range, or in other words, address-range-specific parameters).
-- There is one property, i.e. one parameter, encoded as an integer at
-- each index of the properties array. There is one properties array for
-- each address range.
--
-- The C_ARD_DEPENDENT_PROPS_ARRAY generic parameter in (most) IPIFs is such
-- a properties array and it is usually giving its (static) value using a
-- VHDL aggregate construct. (--ToDo, give an example of this.)
--
-- The the "assigned" default value of a dependent property is zero. This value
-- is usually specified the aggregate by leaving its (index) name out so that
-- it is covered by an "others => 0" choice in the aggregate. Some parameters,
-- as noted in the definitions, below, have an "effective" default value that is
-- different from the assigned default value of zero. In such cases, the
-- function, eff_dp, given below, can be used to get the effective value of
-- the dependent property.
--------------------------------------------------------------------------------
constant DEPENDENT_PROPS_SIZE : integer := 32;
subtype DEPENDENT_PROPS_TYPE
is INTEGER_ARRAY_TYPE(0 to DEPENDENT_PROPS_SIZE-1);
type DEPENDENT_PROPS_ARRAY_TYPE
is array (natural range <>) of DEPENDENT_PROPS_TYPE;
--------------------------------------------------------------------------------
-- Below are the indices of dependent properties for the different types of
-- address ranges.
--
-- Example: Let C_ARD_DEPENDENT_PROPS_ARRAY hold the dependent properites
-- for a set of address ranges. Then, e.g.,
--
-- C_ARD_DEPENDENT_PROPS_ARRAY(i)(FIFO_CAPACITY_BITS)
--
-- gives the fifo capacity in bits, provided that the i'th address range
-- is of type IPIF_WRFIFO_DATA or IPIF_RDFIFO_DATA.
--
-- These indices should be referenced only by the names below and never
-- by numerical literals. (The right to change numerical index assignments
-- is reserved; applications using the names will not be affected by such
-- reassignments.)
--------------------------------------------------------------------------------
--
--ToDo, if the interrupt controller parameterization is ever moved to
-- C_ARD_DEPENDENT_PROPS_ARRAY, then the following declarations
-- could be uncommented and used.
---- IPIF_INTR IDX
---------------------------------------------------------------------------- ---
constant EXCLUDE_DEV_ISC : integer := 0;
-- 1 specifies that only the global interrupt
-- enable is present in the device interrupt source
-- controller and that the only source of interrupts
-- in the device is the IP interrupt source controller.
-- 0 specifies that the full device interrupt
-- source controller structure will be included.
constant INCLUDE_DEV_PENCODER : integer := 1;
-- 1 will include the Device IID in the device interrupt
-- source controller, 0 will exclude it.
--
-- IPIF_WRFIFO_DATA or IPIF_RDFIFO_DATA IDX
---------------------------------------------------------------------------- ---
constant FIFO_CAPACITY_BITS : integer := 0;
constant WR_WIDTH_BITS : integer := 1;
constant RD_WIDTH_BITS : integer := 2;
constant EXCLUDE_PACKET_MODE : integer := 3;
-- 1 Don't include packet mode features
-- 0 Include packet mode features
constant EXCLUDE_VACANCY : integer := 4;
-- 1 Don't include vacancy calculation
-- 0 Include vacancy calculation
-- See also the functions
-- bits_needed_for_vac and
-- bits_needed_for_occ that are declared below.
constant INCLUDE_DRE : integer := 5;
constant INCLUDE_AUTOPUSH_POP : integer := 6;
constant AUTOPUSH_POP_CE : integer := 7;
constant INCLUDE_CSUM : integer := 8;
--------------------------------------------------------------------------------
--
-- DMA_SG IDX
---------------------------------------------------------------------------- ---
--------------------------------------------------------------------------------
-- IPIF_CHDMA_CHANNELS IDX
---------------------------------------------------------------------------- ---
constant NUM_SUBS_FOR_PHYS_0 : integer :=0;
constant NUM_SUBS_FOR_PHYS_1 : integer :=1;
constant NUM_SUBS_FOR_PHYS_2 : integer :=2;
constant NUM_SUBS_FOR_PHYS_3 : integer :=3;
constant NUM_SUBS_FOR_PHYS_4 : integer :=4;
constant NUM_SUBS_FOR_PHYS_5 : integer :=5;
constant NUM_SUBS_FOR_PHYS_6 : integer :=6;
constant NUM_SUBS_FOR_PHYS_7 : integer :=7;
constant NUM_SUBS_FOR_PHYS_8 : integer :=8;
constant NUM_SUBS_FOR_PHYS_9 : integer :=9;
constant NUM_SUBS_FOR_PHYS_10 : integer :=10;
constant NUM_SUBS_FOR_PHYS_11 : integer :=11;
constant NUM_SUBS_FOR_PHYS_12 : integer :=12;
constant NUM_SUBS_FOR_PHYS_13 : integer :=13;
constant NUM_SUBS_FOR_PHYS_14 : integer :=14;
constant NUM_SUBS_FOR_PHYS_15 : integer :=15;
-- Gives the number of sub-channels for physical channel i.
--
-- These constants, which will be MAX_NUM_PHYS_CHANNELS in number (see
-- below), have consecutive values starting with 0 for
-- NUM_SUBS_FOR_PHYS_0. (The constants serve the purpose of giving symbolic
-- names for use in the dependent-properties aggregates that parameterize
-- an IPIF_CHDMA_CHANNELS address range.)
--
-- [Users can ignore this note for developers
-- If the number of physical channels changes, both the
-- IPIF_CHDMA_CHANNELS constants and MAX_NUM_PHYS_CHANNELS,
-- below, must be adjusted.
-- (Use of an array constant or a function of the form
-- NUM_SUBS_FOR_PHYS(i) to define the indices
-- runs afoul of LRM restrictions on non-locally static aggregate
-- choices. (Further, the LRM imposes perhaps unnecessarily
-- strict limits on what qualifies as a locally static primary.)
-- Note: This information is supplied for the benefit of anyone seeking
-- to improve the way that these NUM_SUBS_FOR_PHYS parameter
-- indices are defined.)
-- End of note for developers ]
--
-- The value associated with any index NUM_SUBS_FOR_PHYS_i in the
-- dependent-properties array must be even since TX and RX channels
-- come in pairs with the TX followed immediately by
-- the corresponding RX.
--
constant NUM_SIMPLE_DMA_CHANS : integer :=16;
-- The number of simple DMA channels.
constant NUM_SIMPLE_SG_CHANS : integer :=17;
-- The number of simple SG channels.
constant INTR_COALESCE : integer :=18;
-- 0 Interrupt coalescing is disabled
-- 1 Interrupt coalescing is enabled
constant CLK_PERIOD_PS : integer :=19;
-- The period of the OPB Bus clock in ps.
-- The default value of 0 is a special value that
-- is synonymous with 10000 ps (10 ns).
-- The value for CLK_PERIOD_PS is relevant only if (INTR_COALESCE = 1).
constant PACKET_WAIT_UNIT_NS : integer :=20;
-- Gives the unit for used for timing of pack-wait bounds.
-- The default value of 0 is a special value that
-- is synonymous with 1,000,000 ns (1 ms) and a non-default
-- value is typically only used for testing.
-- Relevant only if (INTR_COALESCE = 1).
constant BURST_SIZE : integer :=21;
-- 1, 2, 4, 8 or 16
-- The default value of 0 is a special value that
-- is synonymous with a burst size of 16.
-- Setting the BURST_SIZE to 1 effectively disables
-- bursts.
constant REMAINDER_AS_SINGLES : integer :=22;
-- 0 Remainder handled as a short burst
-- 1 Remainder handled as a series of singles
--------------------------------------------------------------------------------
-- The constant below is not the index of a dependent-properties
-- parameter (and, as such, would never appear as a choice in a
-- dependent-properties aggregate). Rather, it is fixed to the maximum
-- number of physical channels that an Address Range of type
-- IPIF_CHDMA_CHANNELS supports. It must be maintained in conjuction with
-- the constants named, e.g., NUM_SUBS_FOR_PHYS_15, above.
--------------------------------------------------------------------------------
constant MAX_NUM_PHYS_CHANNELS : natural := 16;
--------------------------------------------------------------------------
-- EXAMPLE: Here is an example dependent-properties aggregate for an
-- address range of type IPIF_CHDMA_CHANNELS.
-- To have a compact list of all of the CHDMA parameters, all are
-- shown, however three are commented out and the unneeded
-- MUM_SUBS_FOR_PHYS_x are excluded. The "OTHERS => 0" association
-- gives these parameters their default values, such that, for the example
--
-- - All physical channels above 2 have zero subchannels (effectively,
-- these physical channels are not used)
-- - There are no simple SG channels
-- - The packet-wait time unit is 1 ms
-- - Burst size is 16
--------------------------------------------------------------------------
-- (
-- NUM_SUBS_FOR_PHYS_0 => 8,
-- NUM_SUBS_FOR_PHYS_1 => 4,
-- NUM_SUBS_FOR_PHYS_2 => 14,
-- NUM_SIMPLE_DMA_CHANS => 1,
-- --NUM_SIMPLE_SG_CHANS => 5,
-- INTR_COALESCE => 1,
-- CLK_PERIOD_PS => 20000,
-- --PACKET_WAIT_UNIT_NS => 50000,
-- --BURST_SIZE => 1,
-- REMAINDER_AS_SINGLES => 1,
-- OTHERS => 0
-- )
--
--------------------------------------------------------------------------------
--------------------------------------------------------------------------------
-- Calculates the number of bits needed to convey the vacancy (emptiness) of
-- the fifo described by dependent_props, if fifo_present. If not fifo_present,
-- returns 0 (or the smallest value allowed by tool limitations on null arrays)
-- without making reference to dependent_props.
--------------------------------------------------------------------------------
function bits_needed_for_vac(
fifo_present: boolean;
dependent_props : DEPENDENT_PROPS_TYPE
) return integer;
--------------------------------------------------------------------------------
-- Calculates the number of bits needed to convey the occupancy (fullness) of
-- the fifo described by dependent_props, if fifo_present. If not fifo_present,
-- returns 0 (or the smallest value allowed by tool limitations on null arrays)
-- without making reference to dependent_props.
--------------------------------------------------------------------------------
function bits_needed_for_occ(
fifo_present: boolean;
dependent_props : DEPENDENT_PROPS_TYPE
) return integer;
--------------------------------------------------------------------------------
-- Function eff_dp.
--
-- For some of the dependent properties, the default value of zero is meant
-- to imply an effective default value of other than zero (see e.g.
-- PKT_WAIT_UNIT_NS for the IPIF_CHDMA_CHANNELS address-range type). The
-- following function is used to get the (possibly default-adjusted)
-- value for a dependent property.
--
-- Example call:
--
-- eff_value_of_param :=
-- eff_dp(
-- C_IPIF_CHDMA_CHANNELS,
-- PACKET_WAIT_UNIT_NS,
-- C_ARD_DEPENDENT_PROPS_ARRAY(i)(PACKET_WAIT_UNIT_NS)
-- );
--
-- where C_ARD_DEPENDENT_PROPS_ARRAY(i) is an object of type
-- DEPENDENT_PROPS_ARRAY_TYPE, that was parameterized for an address range of
-- type C_IPIF_CHDMA_CHANNELS.
--------------------------------------------------------------------------------
function eff_dp(id : integer; -- The type of address range.
dep_prop : integer; -- The index of the dependent prop.
value : integer -- The value at that index.
) return integer; -- The effective value, possibly adjusted
-- if value has the default value of 0.
---) End of Dependent Properties declarations
--------------------------------------------------------------------------------
-- Declarations for Common Properties (properties that apply regardless of the
-- type of the address range). Structurally, these work the same as
-- the dependent properties.
--------------------------------------------------------------------------------
constant COMMON_PROPS_SIZE : integer := 2;
subtype COMMON_PROPS_TYPE
is INTEGER_ARRAY_TYPE(0 to COMMON_PROPS_SIZE-1);
type COMMON_PROPS_ARRAY_TYPE
is array (natural range <>) of COMMON_PROPS_TYPE;
--------------------------------------------------------------------------------
-- Below are the indices of the common properties.
--
-- These indices should be referenced only by the names below and never
-- by numerical literals.
-- IDX
---------------------------------------------------------------------------- ---
constant KEYHOLE_BURST : integer := 0;
-- 1 All addresses of a burst are forced to the initial
-- address of the burst.
-- 0 Burst addresses follow the bus protocol.
-- IP interrupt mode array constants
Constant INTR_PASS_THRU : integer := 1;
Constant INTR_PASS_THRU_INV : integer := 2;
Constant INTR_REG_EVENT : integer := 3;
Constant INTR_REG_EVENT_INV : integer := 4;
Constant INTR_POS_EDGE_DETECT : integer := 5;
Constant INTR_NEG_EDGE_DETECT : integer := 6;
end ipif_pkg;
package body ipif_pkg is
-------------------------------------------------------------------------------
-- Function log2 -- returns number of bits needed to encode x choices
-- x = 0 returns 0
-- x = 1 returns 0
-- x = 2 returns 1
-- x = 4 returns 2, etc.
-------------------------------------------------------------------------------
--
function log2(x : natural) return integer is
variable i : integer := 0;
variable val: integer := 1;
begin
if x = 0 then return 0;
else
for j in 0 to 29 loop -- for loop for XST
if val >= x then null;
else
i := i+1;
val := val*2;
end if;
end loop;
-- Fix per CR520627 XST was ignoring this anyway and printing a
-- Warning in SRP file. This will get rid of the warning and not
-- impact simulation.
-- synthesis translate_off
assert val >= x
report "Function log2 received argument larger" &
" than its capability of 2^30. "
severity failure;
-- synthesis translate_on
return i;
end if;
end function log2;
--------------------------------------------------------------------------------
-- Function clog2 - returns the integer ceiling of the base 2 logarithm of x,
-- i.e., the least integer greater than or equal to log2(x).
--------------------------------------------------------------------------------
function clog2(x : positive) return natural is
variable r : natural := 0;
variable rp : natural := 1; -- rp tracks the value 2**r
begin
while rp < x loop -- Termination condition T: x <= 2**r
-- Loop invariant L: 2**(r-1) < x
r := r + 1;
if rp > integer'high - rp then exit; end if; -- If doubling rp overflows
-- the integer range, the doubled value would exceed x, so safe to exit.
rp := rp + rp;
end loop;
-- L and T <-> 2**(r-1) < x <= 2**r <-> (r-1) < log2(x) <= r
return r; --
end clog2;
-------------------------------------------------------------------------------
-- Function Definitions
-------------------------------------------------------------------------------
-----------------------------------------------------------------------------
-- Function "="
--
-- This function can be used to overload the "=" operator when comparing
-- strings.
-----------------------------------------------------------------------------
function "=" (s1: in string; s2: in string) return boolean is
constant tc: character := ' '; -- string termination character
variable i: integer := 1;
variable v1 : string(1 to s1'length) := s1;
variable v2 : string(1 to s2'length) := s2;
begin
while (i <= v1'length) and (v1(i) /= tc) and
(i <= v2'length) and (v2(i) /= tc) and
(v1(i) = v2(i))
loop
i := i+1;
end loop;
return ((i > v1'length) or (v1(i) = tc)) and
((i > v2'length) or (v2(i) = tc));
end;
----------------------------------------------------------------------------
-- Function equaluseCase
--
-- This function returns true if case sensitive string comparison determines
-- that str1 and str2 are the same.
-----------------------------------------------------------------------------
FUNCTION equaluseCase( str1, str2 : STRING ) RETURN BOOLEAN IS
CONSTANT len1 : INTEGER := str1'length;
CONSTANT len2 : INTEGER := str2'length;
VARIABLE equal : BOOLEAN := TRUE;
BEGIN
IF NOT (len1=len2) THEN
equal := FALSE;
ELSE
FOR i IN str1'range LOOP
IF NOT (str1(i) = str2(i)) THEN
equal := FALSE;
END IF;
END LOOP;
END IF;
RETURN equal;
END equaluseCase;
-----------------------------------------------------------------------------
-- Function calc_num_ce
--
-- This function is used to process the array specifying the number of Chip
-- Enables required for a Base Address specification. The array is input to
-- the function and an integer is returned reflecting the total number of
-- Chip Enables required for the CE, RdCE, and WrCE Buses
-----------------------------------------------------------------------------
function calc_num_ce (ce_num_array : INTEGER_ARRAY_TYPE) return integer is
Variable ce_num_sum : integer := 0;
begin
for i in 0 to (ce_num_array'length)-1 loop
ce_num_sum := ce_num_sum + ce_num_array(i);
End loop;
return(ce_num_sum);
end function calc_num_ce;
-----------------------------------------------------------------------------
-- Function calc_start_ce_index
--
-- This function is used to process the array specifying the number of Chip
-- Enables required for a Base Address specification. The CE Size array is
-- input to the function and an integer index representing the index of the
-- target module in the ce_num_array. An integer is returned reflecting the
-- starting index of the assigned Chip Enables within the CE, RdCE, and
-- WrCE Buses.
-----------------------------------------------------------------------------
function calc_start_ce_index (ce_num_array : INTEGER_ARRAY_TYPE;
index : integer) return integer is
Variable ce_num_sum : integer := 0;
begin
If (index = 0) Then
ce_num_sum := 0;
else
for i in 0 to index-1 loop
ce_num_sum := ce_num_sum + ce_num_array(i);
End loop;
End if;
return(ce_num_sum);
end function calc_start_ce_index;
-----------------------------------------------------------------------------
-- Function get_min_dwidth
--
-- This function is used to process the array specifying the data bus width
-- for each of the target modules. The dwidth_array is input to the function
-- and an integer is returned that is the smallest value found of all the
-- entries in the array.
-----------------------------------------------------------------------------
function get_min_dwidth (dwidth_array: INTEGER_ARRAY_TYPE) return integer is
Variable temp_min : Integer := 1024;
begin
for i in 0 to dwidth_array'length-1 loop
If (dwidth_array(i) < temp_min) Then
temp_min := dwidth_array(i);
else
null;
End if;
End loop;
return(temp_min);
end function get_min_dwidth;
-----------------------------------------------------------------------------
-- Function get_max_dwidth
--
-- This function is used to process the array specifying the data bus width
-- for each of the target modules. The dwidth_array is input to the function
-- and an integer is returned that is the largest value found of all the
-- entries in the array.
-----------------------------------------------------------------------------
function get_max_dwidth (dwidth_array: INTEGER_ARRAY_TYPE) return integer is
Variable temp_max : Integer := 0;
begin
for i in 0 to dwidth_array'length-1 loop
If (dwidth_array(i) > temp_max) Then
temp_max := dwidth_array(i);
else
null;
End if;
End loop;
return(temp_max);
end function get_max_dwidth;
-----------------------------------------------------------------------------
-- Function S32
--
-- This function is used to expand an input string to 32 characters by
-- padding with spaces. If the input string is larger than 32 characters,
-- it will truncate to 32 characters.
-----------------------------------------------------------------------------
function S32 (in_string : string) return string is
constant OUTPUT_STRING_LENGTH : integer := 32;
Constant space : character := ' ';
variable new_string : string(1 to 32);
Variable start_index : Integer := in_string'length+1;
begin
If (in_string'length < OUTPUT_STRING_LENGTH) Then
for i in 1 to in_string'length loop
new_string(i) := in_string(i);
End loop;
for j in start_index to OUTPUT_STRING_LENGTH loop
new_string(j) := space;
End loop;
else -- use first 32 chars of in_string (truncate the rest)
for k in 1 to OUTPUT_STRING_LENGTH loop
new_string(k) := in_string(k);
End loop;
End if;
return(new_string);
end function S32;
-----------------------------------------------------------------------------
-- Function get_id_index
--
-- This function is used to process the array specifying the target function
-- assigned to a Base Address pair address range. The id_array and a
-- id number is input to the function. A integer is returned reflecting the
-- array index of the id matching the id input number. This function
-- should only be called if the id number is known to exist in the
-- name_array input. This can be detirmined by using the find_ard_id
-- function.
-----------------------------------------------------------------------------
function get_id_index (id_array :INTEGER_ARRAY_TYPE;
id : integer) return integer is
Variable match : Boolean := false;
Variable match_index : Integer := 10000; -- a really big number!
begin
for array_index in 0 to id_array'length-1 loop
If (match = true) Then -- match already found so do nothing
null;
else -- compare the numbers one by one
match := (id_array(array_index) = id);
If (match) Then
match_index := array_index;
else
null;
End if;
End if;
End loop;
return(match_index);
end function get_id_index;
--------------------------------------------------------------------------------
-- get_id_index but return a value in bounds on error (iboe).
--
-- This function is the same as get_id_index, except that when id does
-- not exist in id_array, the value returned is any index that is
-- within the index range of id_array.
--
-- This function would normally only be used where function find_ard_id
-- is used to establish the existence of id but, even when non-existent,
-- an element of one of the ARD arrays will be computed from the
-- returned get_id_index_iboe value. See, e.g., function bits_needed_for_vac
-- and the example call, below
--
-- bits_needed_for_vac(
-- find_ard_id(C_ARD_ID_ARRAY, IPIF_RDFIFO_DATA),
-- C_ARD_DEPENDENT_PROPS_ARRAY(get_id_index_iboe(C_ARD_ID_ARRAY,
-- IPIF_RDFIFO_DATA))
-- )
--------------------------------------------------------------------------------
function get_id_index_iboe (id_array :INTEGER_ARRAY_TYPE;
id : integer) return integer is
Variable match : Boolean := false;
Variable match_index : Integer := id_array'left; -- any valid array index
begin
for array_index in 0 to id_array'length-1 loop
If (match = true) Then -- match already found so do nothing
null;
else -- compare the numbers one by one
match := (id_array(array_index) = id);
If (match) Then match_index := array_index;
else null;
End if;
End if;
End loop;
return(match_index);
end function get_id_index_iboe;
-----------------------------------------------------------------------------
-- Function find_ard_id
--
-- This function is used to process the array specifying the target function
-- assigned to a Base Address pair address range. The id_array and a
-- integer id is input to the function. A boolean is returned reflecting the
-- presence (or not) of a number in the array matching the id input number.
-----------------------------------------------------------------------------
function find_ard_id (id_array : INTEGER_ARRAY_TYPE;
id : integer) return boolean is
Variable match : Boolean := false;
begin
for array_index in 0 to id_array'length-1 loop
If (match = true) Then -- match already found so do nothing
null;
else -- compare the numbers one by one
match := (id_array(array_index) = id);
End if;
End loop;
return(match);
end function find_ard_id;
-----------------------------------------------------------------------------
-- Function find_id_dwidth
--
-- This function is used to find the data width of a target module. If the
-- target module exists, the data width is extracted from the input dwidth
-- array. If the module is not in the ID array, the default input is
-- returned. This function is needed to assign data port size constraints on
-- unconstrained port widths.
-----------------------------------------------------------------------------
function find_id_dwidth (id_array : INTEGER_ARRAY_TYPE;
dwidth_array: INTEGER_ARRAY_TYPE;
id : integer;
default : integer) return integer is
Variable id_present : Boolean := false;
Variable array_index : Integer := 0;
Variable dwidth : Integer := default;
begin
id_present := find_ard_id(id_array, id);
If (id_present) Then
array_index := get_id_index (id_array, id);
dwidth := dwidth_array(array_index);
else
null; -- use default input
End if;
Return (dwidth);
end function find_id_dwidth;
-----------------------------------------------------------------------------
-- Function cnt_ipif_id_blks
--
-- This function is used to detirmine the number of IPIF components specified
-- in the ARD ID Array. An integer is returned representing the number
-- of elements counted. User IDs are ignored in the counting process.
-----------------------------------------------------------------------------
function cnt_ipif_id_blks (id_array : INTEGER_ARRAY_TYPE)
return integer is
Variable blk_count : integer := 0;
Variable temp_id : integer;
begin
for array_index in 0 to id_array'length-1 loop
temp_id := id_array(array_index);
If (temp_id = IPIF_WRFIFO_DATA or
temp_id = IPIF_RDFIFO_DATA or
temp_id = IPIF_RST or
temp_id = IPIF_INTR or
temp_id = IPIF_DMA_SG or
temp_id = IPIF_SESR_SEAR
) Then -- IPIF block found
blk_count := blk_count+1;
else -- go to next loop iteration
null;
End if;
End loop;
return(blk_count);
end function cnt_ipif_id_blks;
-----------------------------------------------------------------------------
-- Function get_ipif_id_dbus_index
--
-- This function is used to detirmine the IPIF relative index of a given
-- ID value. User IDs are ignored in the index detirmination.
-----------------------------------------------------------------------------
function get_ipif_id_dbus_index (id_array : INTEGER_ARRAY_TYPE;
id : integer)
return integer is
Variable blk_index : integer := 0;
Variable temp_id : integer;
Variable id_found : Boolean := false;
begin
for array_index in 0 to id_array'length-1 loop
temp_id := id_array(array_index);
If (id_found) then
null;
elsif (temp_id = id) then
id_found := true;
elsif (temp_id = IPIF_WRFIFO_DATA or
temp_id = IPIF_RDFIFO_DATA or
temp_id = IPIF_RST or
temp_id = IPIF_INTR or
temp_id = IPIF_DMA_SG or
temp_id = IPIF_SESR_SEAR
) Then -- IPIF block found
blk_index := blk_index+1;
else -- user block so do nothing
null;
End if;
End loop;
return(blk_index);
end function get_ipif_id_dbus_index;
------------------------------------------------------------------------------
-- Function: rebuild_slv32_array
--
-- Description:
-- This function takes an input slv32 array and rebuilds an output slv32
-- array composed of the first "num_valid_entry" elements from the input
-- array.
------------------------------------------------------------------------------
function rebuild_slv32_array (slv32_array : SLV32_ARRAY_TYPE;
num_valid_pairs : integer)
return SLV32_ARRAY_TYPE is
--Constants
constant num_elements : Integer := num_valid_pairs * 2;
-- Variables
variable temp_baseaddr32_array : SLV32_ARRAY_TYPE( 0 to num_elements-1);
begin
for array_index in 0 to num_elements-1 loop
temp_baseaddr32_array(array_index) := slv32_array(array_index);
end loop;
return(temp_baseaddr32_array);
end function rebuild_slv32_array;
------------------------------------------------------------------------------
-- Function: rebuild_slv64_array
--
-- Description:
-- This function takes an input slv64 array and rebuilds an output slv64
-- array composed of the first "num_valid_entry" elements from the input
-- array.
------------------------------------------------------------------------------
function rebuild_slv64_array (slv64_array : SLV64_ARRAY_TYPE;
num_valid_pairs : integer)
return SLV64_ARRAY_TYPE is
--Constants
constant num_elements : Integer := num_valid_pairs * 2;
-- Variables
variable temp_baseaddr64_array : SLV64_ARRAY_TYPE( 0 to num_elements-1);
begin
for array_index in 0 to num_elements-1 loop
temp_baseaddr64_array(array_index) := slv64_array(array_index);
end loop;
return(temp_baseaddr64_array);
end function rebuild_slv64_array;
------------------------------------------------------------------------------
-- Function: rebuild_int_array
--
-- Description:
-- This function takes an input integer array and rebuilds an output integer
-- array composed of the first "num_valid_entry" elements from the input
-- array.
------------------------------------------------------------------------------
function rebuild_int_array (int_array : INTEGER_ARRAY_TYPE;
num_valid_entry : integer)
return INTEGER_ARRAY_TYPE is
-- Variables
variable temp_int_array : INTEGER_ARRAY_TYPE( 0 to num_valid_entry-1);
begin
for array_index in 0 to num_valid_entry-1 loop
temp_int_array(array_index) := int_array(array_index);
end loop;
return(temp_int_array);
end function rebuild_int_array;
function bits_needed_for_vac(
fifo_present: boolean;
dependent_props : DEPENDENT_PROPS_TYPE
) return integer is
begin
if not fifo_present then
return 1; -- Zero would be better but leads to "0 to -1" null
-- ranges that are not handled by XST Flint or earlier
-- because of the negative index.
else
return
log2(1 + dependent_props(FIFO_CAPACITY_BITS) /
dependent_props(RD_WIDTH_BITS)
);
end if;
end function bits_needed_for_vac;
function bits_needed_for_occ(
fifo_present: boolean;
dependent_props : DEPENDENT_PROPS_TYPE
) return integer is
begin
if not fifo_present then
return 1; -- Zero would be better but leads to "0 to -1" null
-- ranges that are not handled by XST Flint or earlier
-- because of the negative index.
else
return
log2(1 + dependent_props(FIFO_CAPACITY_BITS) /
dependent_props(WR_WIDTH_BITS)
);
end if;
end function bits_needed_for_occ;
function eff_dp(id : integer;
dep_prop : integer;
value : integer) return integer is
variable dp : integer := dep_prop;
type bo2na_type is array (boolean) of natural;
constant bo2na : bo2na_type := (0, 1);
begin
if value /= 0 then return value; end if; -- Not default
case id is
when IPIF_CHDMA_CHANNELS =>
-------------------
return( bo2na(dp = CLK_PERIOD_PS ) * 10000
+ bo2na(dp = PACKET_WAIT_UNIT_NS ) * 1000000
+ bo2na(dp = BURST_SIZE ) * 16
);
when others => return 0;
end case;
end eff_dp;
function populate_intr_mode_array (num_user_intr : integer;
intr_capture_mode : integer)
return INTEGER_ARRAY_TYPE is
variable intr_mode_array : INTEGER_ARRAY_TYPE(0 to num_user_intr-1);
begin
for i in 0 to num_user_intr-1 loop
intr_mode_array(i) := intr_capture_mode;
end loop;
return intr_mode_array;
end function populate_intr_mode_array;
function add_intr_ard_id_array(include_intr : boolean;
ard_id_array : INTEGER_ARRAY_TYPE)
return INTEGER_ARRAY_TYPE is
variable intr_ard_id_array : INTEGER_ARRAY_TYPE(0 to ard_id_array'length);
begin
intr_ard_id_array(0 to ard_id_array'length-1) := ard_id_array;
if include_intr then
intr_ard_id_array(ard_id_array'length) := IPIF_INTR;
return intr_ard_id_array;
else
return ard_id_array;
end if;
end function add_intr_ard_id_array;
function add_intr_ard_addr_range_array(include_intr : boolean;
ZERO_ADDR_PAD : std_logic_vector;
intr_baseaddr : std_logic_vector;
intr_highaddr : std_logic_vector;
ard_id_array : INTEGER_ARRAY_TYPE;
ard_addr_range_array : SLV64_ARRAY_TYPE)
return SLV64_ARRAY_TYPE is
variable intr_ard_addr_range_array : SLV64_ARRAY_TYPE(0 to ard_addr_range_array'length+1);
begin
intr_ard_addr_range_array(0 to ard_addr_range_array'length-1) := ard_addr_range_array;
if include_intr then
intr_ard_addr_range_array(2*get_id_index(ard_id_array,IPIF_INTR))
:= ZERO_ADDR_PAD & intr_baseaddr;
intr_ard_addr_range_array(2*get_id_index(ard_id_array,IPIF_INTR)+1)
:= ZERO_ADDR_PAD & intr_highaddr;
return intr_ard_addr_range_array;
else
return ard_addr_range_array;
end if;
end function add_intr_ard_addr_range_array;
function add_intr_ard_dwidth_array(include_intr : boolean;
intr_dwidth : integer;
ard_id_array : INTEGER_ARRAY_TYPE;
ard_dwidth_array : INTEGER_ARRAY_TYPE)
return INTEGER_ARRAY_TYPE is
variable intr_ard_dwidth_array : INTEGER_ARRAY_TYPE(0 to ard_dwidth_array'length);
begin
intr_ard_dwidth_array(0 to ard_dwidth_array'length-1) := ard_dwidth_array;
if include_intr then
intr_ard_dwidth_array(get_id_index(ard_id_array, IPIF_INTR)) := intr_dwidth;
return intr_ard_dwidth_array;
else
return ard_dwidth_array;
end if;
end function add_intr_ard_dwidth_array;
function add_intr_ard_num_ce_array(include_intr : boolean;
ard_id_array : INTEGER_ARRAY_TYPE;
ard_num_ce_array : INTEGER_ARRAY_TYPE)
return INTEGER_ARRAY_TYPE is
variable intr_ard_num_ce_array : INTEGER_ARRAY_TYPE(0 to ard_num_ce_array'length);
begin
intr_ard_num_ce_array(0 to ard_num_ce_array'length-1) := ard_num_ce_array;
if include_intr then
intr_ard_num_ce_array(get_id_index(ard_id_array, IPIF_INTR)) := 16;
return intr_ard_num_ce_array;
else
return ard_num_ce_array;
end if;
end function add_intr_ard_num_ce_array;
end package body ipif_pkg;
|
-- IPIF Common Library Package
-------------------------------------------------------------------------------
--
-- *************************************************************************
-- ** **
-- ** DISCLAIMER OF LIABILITY **
-- ** **
-- ** This text/file contains proprietary, confidential **
-- ** information of Xilinx, Inc., is distributed under **
-- ** license from Xilinx, Inc., and may be used, copied **
-- ** and/or disclosed only pursuant to the terms of a valid **
-- ** license agreement with Xilinx, Inc. Xilinx hereby **
-- ** grants you a license to use this text/file solely for **
-- ** design, simulation, implementation and creation of **
-- ** design files limited to Xilinx devices or technologies. **
-- ** Use with non-Xilinx devices or technologies is expressly **
-- ** prohibited and immediately terminates your license unless **
-- ** covered by a separate agreement. **
-- ** **
-- ** Xilinx is providing this design, code, or information **
-- ** "as-is" solely for use in developing programs and **
-- ** solutions for Xilinx devices, with no obligation on the **
-- ** part of Xilinx to provide support. By providing this design, **
-- ** code, or information as one possible implementation of **
-- ** this feature, application or standard, Xilinx is making no **
-- ** representation that this implementation is free from any **
-- ** claims of infringement. You are responsible for obtaining **
-- ** any rights you may require for your implementation. **
-- ** Xilinx expressly disclaims any warranty whatsoever with **
-- ** respect to the adequacy of the implementation, including **
-- ** but not limited to any warranties or representations that this **
-- ** implementation is free from claims of infringement, implied **
-- ** warranties of merchantability or fitness for a particular **
-- ** purpose. **
-- ** **
-- ** Xilinx products are not intended for use in life support **
-- ** appliances, devices, or systems. Use in such applications is **
-- ** expressly prohibited. **
-- ** **
-- ** Any modifications that are made to the Source Code are **
-- ** done at the users sole risk and will be unsupported. **
-- ** The Xilinx Support Hotline does not have access to source **
-- ** code and therefore cannot answer specific questions related **
-- ** to source HDL. The Xilinx Hotline support of original source **
-- ** code IP shall only address issues and questions related **
-- ** to the standard Netlist version of the core (and thus **
-- ** indirectly, the original core source). **
-- ** **
-- ** Copyright (c) 2002-2010 Xilinx, Inc. All rights reserved. **
-- ** **
-- ** This copyright and support notice must be retained as part **
-- ** of this text at all times. **
-- ** **
-- *************************************************************************
--
-------------------------------------------------------------------------------
-- Filename: ipif_pkg.vhd
-- Version: Intital
-- Description: This file contains the constants and functions used in the
-- ipif common library components.
--
-------------------------------------------------------------------------------
-- Structure:
--
-------------------------------------------------------------------------------
-- Author: DET
-- History:
-- DET 02/21/02 -- Created from proc_common_pkg.vhd
--
-- DET 03/13/02 -- PLB IPIF development updates
-- ^^^^^^
-- - Commented out string types and string functions due to an XST
-- problem with string arrays and functions. THe string array
-- processing functions were replaced with comperable functions
-- operating on integer arrays.
-- ~~~~~~
--
--
-- DET 4/30/2002 Initial
-- ~~~~~~
-- - Added three functions: rebuild_slv32_array, rebuild_slv64_array, and
-- rebuild_int_array to support removal of unused elements from the
-- ARD arrays.
-- ^^^^^^ --
--
-- FLO 8/12/2002
-- ~~~~~~
-- - Added three functions: bits_needed_for_vac, bits_needed_for_occ,
-- and get_id_index_iboe.
-- (Removed provisional functions bits_needed_for_vacancy,
-- bits needed_for_occupancy, and bits_needed_for.)
-- ^^^^^^
--
-- FLO 3/24/2003
-- ~~~~~~
-- - Added dependent property paramters for channelized DMA.
-- - Added common property parameter array type.
-- - Definded the KEYHOLD_BURST common-property parameter.
-- ^^^^^^
--
-- FLO 10/22/2003
-- ~~~~~~
-- - Some adjustment to CHDMA parameterization.
-- - Cleanup of obsolete code and comments. (The former "XST workaround"
-- has become the officially deployed method.)
-- ^^^^^^
--
-- LSS 03/24/2004
-- ~~~~~~
-- - Added 5 functions
-- ^^^^^^
--
-- ALS 09/03/04
-- ^^^^^^
-- -- Added constants to describe the channel protocols used in MCH_OPB_IPIF
-- ~~~~~~
--
-- DET 1/17/2008 v4_0
-- ~~~~~~
-- - Changed proc_common library version to v4_0
-- - Incorporated new disclaimer header
-- ^^^^^^
--
-------------------------------------------------------------------------------
-- Naming Conventions:
-- active low signals: "*_n"
-- clock signals: "clk", "clk_div#", "clk_#x"
-- reset signals: "rst", "rst_n"
-- generics: "C_*"
-- user defined types: "*_TYPE"
-- state machine next state: "*_ns"
-- state machine current state: "*_cs"
-- combinatorial signals: "*_com"
-- pipelined or register delay signals: "*_d#"
-- counter signals: "*cnt*"
-- clock enable signals: "*_ce"
-- internal version of output port "*_i"
-- device pins: "*_pin"
-- ports: - Names begin with Uppercase
-- processes: "*_PROCESS"
-- component instantiations: "<ENTITY_>I_<#|FUNC>
-------------------------------------------------------------------------------
library ieee;
use ieee.std_logic_1164.all;
-- need conversion function to convert reals/integers to std logic vectors
use ieee.std_logic_arith.all;
use ieee.std_logic_arith.all;
use ieee.std_logic_unsigned.all;
package ipif_pkg is
-------------------------------------------------------------------------------
-- Type Declarations
-------------------------------------------------------------------------------
type SLV32_ARRAY_TYPE is array (natural range <>) of std_logic_vector(0 to 31);
subtype SLV64_TYPE is std_logic_vector(0 to 63);
type SLV64_ARRAY_TYPE is array (natural range <>) of SLV64_TYPE;
type INTEGER_ARRAY_TYPE is array (natural range <>) of integer;
-------------------------------------------------------------------------------
-- Function and Procedure Declarations
-------------------------------------------------------------------------------
function "=" (s1: in string; s2: in string) return boolean;
function equaluseCase( str1, str2 : STRING ) RETURN BOOLEAN;
function calc_num_ce (ce_num_array : INTEGER_ARRAY_TYPE) return integer;
function calc_start_ce_index (ce_num_array : INTEGER_ARRAY_TYPE;
index : integer) return integer;
function get_min_dwidth (dwidth_array: INTEGER_ARRAY_TYPE) return integer;
function get_max_dwidth (dwidth_array: INTEGER_ARRAY_TYPE) return integer;
function S32 (in_string : string) return string;
--------------------------------------------------------------------------------
-- ARD support functions.
-- These function can be useful when operating with the ARD parameterization.
--------------------------------------------------------------------------------
function get_id_index (id_array :INTEGER_ARRAY_TYPE;
id : integer)
return integer;
function get_id_index_iboe (id_array :INTEGER_ARRAY_TYPE;
id : integer)
return integer;
function find_ard_id (id_array : INTEGER_ARRAY_TYPE;
id : integer) return boolean;
function find_id_dwidth (id_array : INTEGER_ARRAY_TYPE;
dwidth_array: INTEGER_ARRAY_TYPE;
id : integer;
default : integer)
return integer;
function cnt_ipif_id_blks (id_array : INTEGER_ARRAY_TYPE) return integer;
function get_ipif_id_dbus_index (id_array : INTEGER_ARRAY_TYPE;
id : integer)
return integer ;
function rebuild_slv32_array (slv32_array : SLV32_ARRAY_TYPE;
num_valid_pairs : integer)
return SLV32_ARRAY_TYPE;
function rebuild_slv64_array (slv64_array : SLV64_ARRAY_TYPE;
num_valid_pairs : integer)
return SLV64_ARRAY_TYPE;
function rebuild_int_array (int_array : INTEGER_ARRAY_TYPE;
num_valid_entry : integer)
return INTEGER_ARRAY_TYPE;
-- 5 Functions Added 3/24/04
function populate_intr_mode_array (num_user_intr : integer;
intr_capture_mode : integer)
return INTEGER_ARRAY_TYPE ;
function add_intr_ard_id_array(include_intr : boolean;
ard_id_array : INTEGER_ARRAY_TYPE)
return INTEGER_ARRAY_TYPE;
function add_intr_ard_addr_range_array(include_intr : boolean;
ZERO_ADDR_PAD : std_logic_vector;
intr_baseaddr : std_logic_vector;
intr_highaddr : std_logic_vector;
ard_id_array : INTEGER_ARRAY_TYPE;
ard_addr_range_array : SLV64_ARRAY_TYPE)
return SLV64_ARRAY_TYPE;
function add_intr_ard_num_ce_array(include_intr : boolean;
ard_id_array : INTEGER_ARRAY_TYPE;
ard_num_ce_array : INTEGER_ARRAY_TYPE)
return INTEGER_ARRAY_TYPE;
function add_intr_ard_dwidth_array(include_intr : boolean;
intr_dwidth : integer;
ard_id_array : INTEGER_ARRAY_TYPE;
ard_dwidth_array : INTEGER_ARRAY_TYPE)
return INTEGER_ARRAY_TYPE;
function log2(x : natural) return integer;
function clog2(x : positive) return natural;
-------------------------------------------------------------------------------
-- Constant Declarations
-------------------------------------------------------------------------------
-------------------------------------------------------------------------------
-- Channel Protocols
-- The constant declarations below give symbolic-name aliases for values that
-- can be used in the C_MCH_PROTOCOL_ARRAY generic of the MCH_OPB_IPIF.
-------------------------------------------------------------------------------
constant XCL : integer := 0;
constant DAG : integer := 1;
--------------------------------------------------------------------------------
-- Address range types.
-- The constant declarations, below, give symbolic-name aliases for values
-- that can be used in the C_ARD_ID_ARRAY generic of IPIFs. The first set
-- gives aliases that are used to include IPIF services.
--------------------------------------------------------------------------------
-- IPIF module aliases
Constant IPIF_INTR : integer := 1;
Constant IPIF_RST : integer := 2;
Constant IPIF_SESR_SEAR : integer := 3;
Constant IPIF_DMA_SG : integer := 4;
Constant IPIF_WRFIFO_REG : integer := 5;
Constant IPIF_WRFIFO_DATA : integer := 6;
Constant IPIF_RDFIFO_REG : integer := 7;
Constant IPIF_RDFIFO_DATA : integer := 8;
Constant IPIF_CHDMA_CHANNELS : integer := 9;
Constant IPIF_CHDMA_GLOBAL_REGS : integer := 10;
Constant CHDMA_STATUS_FIFO : integer := 90;
-- Some predefined user module aliases
Constant USER_00 : integer := 100;
Constant USER_01 : integer := 101;
Constant USER_02 : integer := 102;
Constant USER_03 : integer := 103;
Constant USER_04 : integer := 104;
Constant USER_05 : integer := 105;
Constant USER_06 : integer := 106;
Constant USER_07 : integer := 107;
Constant USER_08 : integer := 108;
Constant USER_09 : integer := 109;
Constant USER_10 : integer := 110;
Constant USER_11 : integer := 111;
Constant USER_12 : integer := 112;
Constant USER_13 : integer := 113;
Constant USER_14 : integer := 114;
Constant USER_15 : integer := 115;
Constant USER_16 : integer := 116;
---( Start of Dependent Properties declarations
--------------------------------------------------------------------------------
-- Declarations for Dependent Properties (properties that depend on the type of
-- the address range, or in other words, address-range-specific parameters).
-- There is one property, i.e. one parameter, encoded as an integer at
-- each index of the properties array. There is one properties array for
-- each address range.
--
-- The C_ARD_DEPENDENT_PROPS_ARRAY generic parameter in (most) IPIFs is such
-- a properties array and it is usually giving its (static) value using a
-- VHDL aggregate construct. (--ToDo, give an example of this.)
--
-- The the "assigned" default value of a dependent property is zero. This value
-- is usually specified the aggregate by leaving its (index) name out so that
-- it is covered by an "others => 0" choice in the aggregate. Some parameters,
-- as noted in the definitions, below, have an "effective" default value that is
-- different from the assigned default value of zero. In such cases, the
-- function, eff_dp, given below, can be used to get the effective value of
-- the dependent property.
--------------------------------------------------------------------------------
constant DEPENDENT_PROPS_SIZE : integer := 32;
subtype DEPENDENT_PROPS_TYPE
is INTEGER_ARRAY_TYPE(0 to DEPENDENT_PROPS_SIZE-1);
type DEPENDENT_PROPS_ARRAY_TYPE
is array (natural range <>) of DEPENDENT_PROPS_TYPE;
--------------------------------------------------------------------------------
-- Below are the indices of dependent properties for the different types of
-- address ranges.
--
-- Example: Let C_ARD_DEPENDENT_PROPS_ARRAY hold the dependent properites
-- for a set of address ranges. Then, e.g.,
--
-- C_ARD_DEPENDENT_PROPS_ARRAY(i)(FIFO_CAPACITY_BITS)
--
-- gives the fifo capacity in bits, provided that the i'th address range
-- is of type IPIF_WRFIFO_DATA or IPIF_RDFIFO_DATA.
--
-- These indices should be referenced only by the names below and never
-- by numerical literals. (The right to change numerical index assignments
-- is reserved; applications using the names will not be affected by such
-- reassignments.)
--------------------------------------------------------------------------------
--
--ToDo, if the interrupt controller parameterization is ever moved to
-- C_ARD_DEPENDENT_PROPS_ARRAY, then the following declarations
-- could be uncommented and used.
---- IPIF_INTR IDX
---------------------------------------------------------------------------- ---
constant EXCLUDE_DEV_ISC : integer := 0;
-- 1 specifies that only the global interrupt
-- enable is present in the device interrupt source
-- controller and that the only source of interrupts
-- in the device is the IP interrupt source controller.
-- 0 specifies that the full device interrupt
-- source controller structure will be included.
constant INCLUDE_DEV_PENCODER : integer := 1;
-- 1 will include the Device IID in the device interrupt
-- source controller, 0 will exclude it.
--
-- IPIF_WRFIFO_DATA or IPIF_RDFIFO_DATA IDX
---------------------------------------------------------------------------- ---
constant FIFO_CAPACITY_BITS : integer := 0;
constant WR_WIDTH_BITS : integer := 1;
constant RD_WIDTH_BITS : integer := 2;
constant EXCLUDE_PACKET_MODE : integer := 3;
-- 1 Don't include packet mode features
-- 0 Include packet mode features
constant EXCLUDE_VACANCY : integer := 4;
-- 1 Don't include vacancy calculation
-- 0 Include vacancy calculation
-- See also the functions
-- bits_needed_for_vac and
-- bits_needed_for_occ that are declared below.
constant INCLUDE_DRE : integer := 5;
constant INCLUDE_AUTOPUSH_POP : integer := 6;
constant AUTOPUSH_POP_CE : integer := 7;
constant INCLUDE_CSUM : integer := 8;
--------------------------------------------------------------------------------
--
-- DMA_SG IDX
---------------------------------------------------------------------------- ---
--------------------------------------------------------------------------------
-- IPIF_CHDMA_CHANNELS IDX
---------------------------------------------------------------------------- ---
constant NUM_SUBS_FOR_PHYS_0 : integer :=0;
constant NUM_SUBS_FOR_PHYS_1 : integer :=1;
constant NUM_SUBS_FOR_PHYS_2 : integer :=2;
constant NUM_SUBS_FOR_PHYS_3 : integer :=3;
constant NUM_SUBS_FOR_PHYS_4 : integer :=4;
constant NUM_SUBS_FOR_PHYS_5 : integer :=5;
constant NUM_SUBS_FOR_PHYS_6 : integer :=6;
constant NUM_SUBS_FOR_PHYS_7 : integer :=7;
constant NUM_SUBS_FOR_PHYS_8 : integer :=8;
constant NUM_SUBS_FOR_PHYS_9 : integer :=9;
constant NUM_SUBS_FOR_PHYS_10 : integer :=10;
constant NUM_SUBS_FOR_PHYS_11 : integer :=11;
constant NUM_SUBS_FOR_PHYS_12 : integer :=12;
constant NUM_SUBS_FOR_PHYS_13 : integer :=13;
constant NUM_SUBS_FOR_PHYS_14 : integer :=14;
constant NUM_SUBS_FOR_PHYS_15 : integer :=15;
-- Gives the number of sub-channels for physical channel i.
--
-- These constants, which will be MAX_NUM_PHYS_CHANNELS in number (see
-- below), have consecutive values starting with 0 for
-- NUM_SUBS_FOR_PHYS_0. (The constants serve the purpose of giving symbolic
-- names for use in the dependent-properties aggregates that parameterize
-- an IPIF_CHDMA_CHANNELS address range.)
--
-- [Users can ignore this note for developers
-- If the number of physical channels changes, both the
-- IPIF_CHDMA_CHANNELS constants and MAX_NUM_PHYS_CHANNELS,
-- below, must be adjusted.
-- (Use of an array constant or a function of the form
-- NUM_SUBS_FOR_PHYS(i) to define the indices
-- runs afoul of LRM restrictions on non-locally static aggregate
-- choices. (Further, the LRM imposes perhaps unnecessarily
-- strict limits on what qualifies as a locally static primary.)
-- Note: This information is supplied for the benefit of anyone seeking
-- to improve the way that these NUM_SUBS_FOR_PHYS parameter
-- indices are defined.)
-- End of note for developers ]
--
-- The value associated with any index NUM_SUBS_FOR_PHYS_i in the
-- dependent-properties array must be even since TX and RX channels
-- come in pairs with the TX followed immediately by
-- the corresponding RX.
--
constant NUM_SIMPLE_DMA_CHANS : integer :=16;
-- The number of simple DMA channels.
constant NUM_SIMPLE_SG_CHANS : integer :=17;
-- The number of simple SG channels.
constant INTR_COALESCE : integer :=18;
-- 0 Interrupt coalescing is disabled
-- 1 Interrupt coalescing is enabled
constant CLK_PERIOD_PS : integer :=19;
-- The period of the OPB Bus clock in ps.
-- The default value of 0 is a special value that
-- is synonymous with 10000 ps (10 ns).
-- The value for CLK_PERIOD_PS is relevant only if (INTR_COALESCE = 1).
constant PACKET_WAIT_UNIT_NS : integer :=20;
-- Gives the unit for used for timing of pack-wait bounds.
-- The default value of 0 is a special value that
-- is synonymous with 1,000,000 ns (1 ms) and a non-default
-- value is typically only used for testing.
-- Relevant only if (INTR_COALESCE = 1).
constant BURST_SIZE : integer :=21;
-- 1, 2, 4, 8 or 16
-- The default value of 0 is a special value that
-- is synonymous with a burst size of 16.
-- Setting the BURST_SIZE to 1 effectively disables
-- bursts.
constant REMAINDER_AS_SINGLES : integer :=22;
-- 0 Remainder handled as a short burst
-- 1 Remainder handled as a series of singles
--------------------------------------------------------------------------------
-- The constant below is not the index of a dependent-properties
-- parameter (and, as such, would never appear as a choice in a
-- dependent-properties aggregate). Rather, it is fixed to the maximum
-- number of physical channels that an Address Range of type
-- IPIF_CHDMA_CHANNELS supports. It must be maintained in conjuction with
-- the constants named, e.g., NUM_SUBS_FOR_PHYS_15, above.
--------------------------------------------------------------------------------
constant MAX_NUM_PHYS_CHANNELS : natural := 16;
--------------------------------------------------------------------------
-- EXAMPLE: Here is an example dependent-properties aggregate for an
-- address range of type IPIF_CHDMA_CHANNELS.
-- To have a compact list of all of the CHDMA parameters, all are
-- shown, however three are commented out and the unneeded
-- MUM_SUBS_FOR_PHYS_x are excluded. The "OTHERS => 0" association
-- gives these parameters their default values, such that, for the example
--
-- - All physical channels above 2 have zero subchannels (effectively,
-- these physical channels are not used)
-- - There are no simple SG channels
-- - The packet-wait time unit is 1 ms
-- - Burst size is 16
--------------------------------------------------------------------------
-- (
-- NUM_SUBS_FOR_PHYS_0 => 8,
-- NUM_SUBS_FOR_PHYS_1 => 4,
-- NUM_SUBS_FOR_PHYS_2 => 14,
-- NUM_SIMPLE_DMA_CHANS => 1,
-- --NUM_SIMPLE_SG_CHANS => 5,
-- INTR_COALESCE => 1,
-- CLK_PERIOD_PS => 20000,
-- --PACKET_WAIT_UNIT_NS => 50000,
-- --BURST_SIZE => 1,
-- REMAINDER_AS_SINGLES => 1,
-- OTHERS => 0
-- )
--
--------------------------------------------------------------------------------
--------------------------------------------------------------------------------
-- Calculates the number of bits needed to convey the vacancy (emptiness) of
-- the fifo described by dependent_props, if fifo_present. If not fifo_present,
-- returns 0 (or the smallest value allowed by tool limitations on null arrays)
-- without making reference to dependent_props.
--------------------------------------------------------------------------------
function bits_needed_for_vac(
fifo_present: boolean;
dependent_props : DEPENDENT_PROPS_TYPE
) return integer;
--------------------------------------------------------------------------------
-- Calculates the number of bits needed to convey the occupancy (fullness) of
-- the fifo described by dependent_props, if fifo_present. If not fifo_present,
-- returns 0 (or the smallest value allowed by tool limitations on null arrays)
-- without making reference to dependent_props.
--------------------------------------------------------------------------------
function bits_needed_for_occ(
fifo_present: boolean;
dependent_props : DEPENDENT_PROPS_TYPE
) return integer;
--------------------------------------------------------------------------------
-- Function eff_dp.
--
-- For some of the dependent properties, the default value of zero is meant
-- to imply an effective default value of other than zero (see e.g.
-- PKT_WAIT_UNIT_NS for the IPIF_CHDMA_CHANNELS address-range type). The
-- following function is used to get the (possibly default-adjusted)
-- value for a dependent property.
--
-- Example call:
--
-- eff_value_of_param :=
-- eff_dp(
-- C_IPIF_CHDMA_CHANNELS,
-- PACKET_WAIT_UNIT_NS,
-- C_ARD_DEPENDENT_PROPS_ARRAY(i)(PACKET_WAIT_UNIT_NS)
-- );
--
-- where C_ARD_DEPENDENT_PROPS_ARRAY(i) is an object of type
-- DEPENDENT_PROPS_ARRAY_TYPE, that was parameterized for an address range of
-- type C_IPIF_CHDMA_CHANNELS.
--------------------------------------------------------------------------------
function eff_dp(id : integer; -- The type of address range.
dep_prop : integer; -- The index of the dependent prop.
value : integer -- The value at that index.
) return integer; -- The effective value, possibly adjusted
-- if value has the default value of 0.
---) End of Dependent Properties declarations
--------------------------------------------------------------------------------
-- Declarations for Common Properties (properties that apply regardless of the
-- type of the address range). Structurally, these work the same as
-- the dependent properties.
--------------------------------------------------------------------------------
constant COMMON_PROPS_SIZE : integer := 2;
subtype COMMON_PROPS_TYPE
is INTEGER_ARRAY_TYPE(0 to COMMON_PROPS_SIZE-1);
type COMMON_PROPS_ARRAY_TYPE
is array (natural range <>) of COMMON_PROPS_TYPE;
--------------------------------------------------------------------------------
-- Below are the indices of the common properties.
--
-- These indices should be referenced only by the names below and never
-- by numerical literals.
-- IDX
---------------------------------------------------------------------------- ---
constant KEYHOLE_BURST : integer := 0;
-- 1 All addresses of a burst are forced to the initial
-- address of the burst.
-- 0 Burst addresses follow the bus protocol.
-- IP interrupt mode array constants
Constant INTR_PASS_THRU : integer := 1;
Constant INTR_PASS_THRU_INV : integer := 2;
Constant INTR_REG_EVENT : integer := 3;
Constant INTR_REG_EVENT_INV : integer := 4;
Constant INTR_POS_EDGE_DETECT : integer := 5;
Constant INTR_NEG_EDGE_DETECT : integer := 6;
end ipif_pkg;
package body ipif_pkg is
-------------------------------------------------------------------------------
-- Function log2 -- returns number of bits needed to encode x choices
-- x = 0 returns 0
-- x = 1 returns 0
-- x = 2 returns 1
-- x = 4 returns 2, etc.
-------------------------------------------------------------------------------
--
function log2(x : natural) return integer is
variable i : integer := 0;
variable val: integer := 1;
begin
if x = 0 then return 0;
else
for j in 0 to 29 loop -- for loop for XST
if val >= x then null;
else
i := i+1;
val := val*2;
end if;
end loop;
-- Fix per CR520627 XST was ignoring this anyway and printing a
-- Warning in SRP file. This will get rid of the warning and not
-- impact simulation.
-- synthesis translate_off
assert val >= x
report "Function log2 received argument larger" &
" than its capability of 2^30. "
severity failure;
-- synthesis translate_on
return i;
end if;
end function log2;
--------------------------------------------------------------------------------
-- Function clog2 - returns the integer ceiling of the base 2 logarithm of x,
-- i.e., the least integer greater than or equal to log2(x).
--------------------------------------------------------------------------------
function clog2(x : positive) return natural is
variable r : natural := 0;
variable rp : natural := 1; -- rp tracks the value 2**r
begin
while rp < x loop -- Termination condition T: x <= 2**r
-- Loop invariant L: 2**(r-1) < x
r := r + 1;
if rp > integer'high - rp then exit; end if; -- If doubling rp overflows
-- the integer range, the doubled value would exceed x, so safe to exit.
rp := rp + rp;
end loop;
-- L and T <-> 2**(r-1) < x <= 2**r <-> (r-1) < log2(x) <= r
return r; --
end clog2;
-------------------------------------------------------------------------------
-- Function Definitions
-------------------------------------------------------------------------------
-----------------------------------------------------------------------------
-- Function "="
--
-- This function can be used to overload the "=" operator when comparing
-- strings.
-----------------------------------------------------------------------------
function "=" (s1: in string; s2: in string) return boolean is
constant tc: character := ' '; -- string termination character
variable i: integer := 1;
variable v1 : string(1 to s1'length) := s1;
variable v2 : string(1 to s2'length) := s2;
begin
while (i <= v1'length) and (v1(i) /= tc) and
(i <= v2'length) and (v2(i) /= tc) and
(v1(i) = v2(i))
loop
i := i+1;
end loop;
return ((i > v1'length) or (v1(i) = tc)) and
((i > v2'length) or (v2(i) = tc));
end;
----------------------------------------------------------------------------
-- Function equaluseCase
--
-- This function returns true if case sensitive string comparison determines
-- that str1 and str2 are the same.
-----------------------------------------------------------------------------
FUNCTION equaluseCase( str1, str2 : STRING ) RETURN BOOLEAN IS
CONSTANT len1 : INTEGER := str1'length;
CONSTANT len2 : INTEGER := str2'length;
VARIABLE equal : BOOLEAN := TRUE;
BEGIN
IF NOT (len1=len2) THEN
equal := FALSE;
ELSE
FOR i IN str1'range LOOP
IF NOT (str1(i) = str2(i)) THEN
equal := FALSE;
END IF;
END LOOP;
END IF;
RETURN equal;
END equaluseCase;
-----------------------------------------------------------------------------
-- Function calc_num_ce
--
-- This function is used to process the array specifying the number of Chip
-- Enables required for a Base Address specification. The array is input to
-- the function and an integer is returned reflecting the total number of
-- Chip Enables required for the CE, RdCE, and WrCE Buses
-----------------------------------------------------------------------------
function calc_num_ce (ce_num_array : INTEGER_ARRAY_TYPE) return integer is
Variable ce_num_sum : integer := 0;
begin
for i in 0 to (ce_num_array'length)-1 loop
ce_num_sum := ce_num_sum + ce_num_array(i);
End loop;
return(ce_num_sum);
end function calc_num_ce;
-----------------------------------------------------------------------------
-- Function calc_start_ce_index
--
-- This function is used to process the array specifying the number of Chip
-- Enables required for a Base Address specification. The CE Size array is
-- input to the function and an integer index representing the index of the
-- target module in the ce_num_array. An integer is returned reflecting the
-- starting index of the assigned Chip Enables within the CE, RdCE, and
-- WrCE Buses.
-----------------------------------------------------------------------------
function calc_start_ce_index (ce_num_array : INTEGER_ARRAY_TYPE;
index : integer) return integer is
Variable ce_num_sum : integer := 0;
begin
If (index = 0) Then
ce_num_sum := 0;
else
for i in 0 to index-1 loop
ce_num_sum := ce_num_sum + ce_num_array(i);
End loop;
End if;
return(ce_num_sum);
end function calc_start_ce_index;
-----------------------------------------------------------------------------
-- Function get_min_dwidth
--
-- This function is used to process the array specifying the data bus width
-- for each of the target modules. The dwidth_array is input to the function
-- and an integer is returned that is the smallest value found of all the
-- entries in the array.
-----------------------------------------------------------------------------
function get_min_dwidth (dwidth_array: INTEGER_ARRAY_TYPE) return integer is
Variable temp_min : Integer := 1024;
begin
for i in 0 to dwidth_array'length-1 loop
If (dwidth_array(i) < temp_min) Then
temp_min := dwidth_array(i);
else
null;
End if;
End loop;
return(temp_min);
end function get_min_dwidth;
-----------------------------------------------------------------------------
-- Function get_max_dwidth
--
-- This function is used to process the array specifying the data bus width
-- for each of the target modules. The dwidth_array is input to the function
-- and an integer is returned that is the largest value found of all the
-- entries in the array.
-----------------------------------------------------------------------------
function get_max_dwidth (dwidth_array: INTEGER_ARRAY_TYPE) return integer is
Variable temp_max : Integer := 0;
begin
for i in 0 to dwidth_array'length-1 loop
If (dwidth_array(i) > temp_max) Then
temp_max := dwidth_array(i);
else
null;
End if;
End loop;
return(temp_max);
end function get_max_dwidth;
-----------------------------------------------------------------------------
-- Function S32
--
-- This function is used to expand an input string to 32 characters by
-- padding with spaces. If the input string is larger than 32 characters,
-- it will truncate to 32 characters.
-----------------------------------------------------------------------------
function S32 (in_string : string) return string is
constant OUTPUT_STRING_LENGTH : integer := 32;
Constant space : character := ' ';
variable new_string : string(1 to 32);
Variable start_index : Integer := in_string'length+1;
begin
If (in_string'length < OUTPUT_STRING_LENGTH) Then
for i in 1 to in_string'length loop
new_string(i) := in_string(i);
End loop;
for j in start_index to OUTPUT_STRING_LENGTH loop
new_string(j) := space;
End loop;
else -- use first 32 chars of in_string (truncate the rest)
for k in 1 to OUTPUT_STRING_LENGTH loop
new_string(k) := in_string(k);
End loop;
End if;
return(new_string);
end function S32;
-----------------------------------------------------------------------------
-- Function get_id_index
--
-- This function is used to process the array specifying the target function
-- assigned to a Base Address pair address range. The id_array and a
-- id number is input to the function. A integer is returned reflecting the
-- array index of the id matching the id input number. This function
-- should only be called if the id number is known to exist in the
-- name_array input. This can be detirmined by using the find_ard_id
-- function.
-----------------------------------------------------------------------------
function get_id_index (id_array :INTEGER_ARRAY_TYPE;
id : integer) return integer is
Variable match : Boolean := false;
Variable match_index : Integer := 10000; -- a really big number!
begin
for array_index in 0 to id_array'length-1 loop
If (match = true) Then -- match already found so do nothing
null;
else -- compare the numbers one by one
match := (id_array(array_index) = id);
If (match) Then
match_index := array_index;
else
null;
End if;
End if;
End loop;
return(match_index);
end function get_id_index;
--------------------------------------------------------------------------------
-- get_id_index but return a value in bounds on error (iboe).
--
-- This function is the same as get_id_index, except that when id does
-- not exist in id_array, the value returned is any index that is
-- within the index range of id_array.
--
-- This function would normally only be used where function find_ard_id
-- is used to establish the existence of id but, even when non-existent,
-- an element of one of the ARD arrays will be computed from the
-- returned get_id_index_iboe value. See, e.g., function bits_needed_for_vac
-- and the example call, below
--
-- bits_needed_for_vac(
-- find_ard_id(C_ARD_ID_ARRAY, IPIF_RDFIFO_DATA),
-- C_ARD_DEPENDENT_PROPS_ARRAY(get_id_index_iboe(C_ARD_ID_ARRAY,
-- IPIF_RDFIFO_DATA))
-- )
--------------------------------------------------------------------------------
function get_id_index_iboe (id_array :INTEGER_ARRAY_TYPE;
id : integer) return integer is
Variable match : Boolean := false;
Variable match_index : Integer := id_array'left; -- any valid array index
begin
for array_index in 0 to id_array'length-1 loop
If (match = true) Then -- match already found so do nothing
null;
else -- compare the numbers one by one
match := (id_array(array_index) = id);
If (match) Then match_index := array_index;
else null;
End if;
End if;
End loop;
return(match_index);
end function get_id_index_iboe;
-----------------------------------------------------------------------------
-- Function find_ard_id
--
-- This function is used to process the array specifying the target function
-- assigned to a Base Address pair address range. The id_array and a
-- integer id is input to the function. A boolean is returned reflecting the
-- presence (or not) of a number in the array matching the id input number.
-----------------------------------------------------------------------------
function find_ard_id (id_array : INTEGER_ARRAY_TYPE;
id : integer) return boolean is
Variable match : Boolean := false;
begin
for array_index in 0 to id_array'length-1 loop
If (match = true) Then -- match already found so do nothing
null;
else -- compare the numbers one by one
match := (id_array(array_index) = id);
End if;
End loop;
return(match);
end function find_ard_id;
-----------------------------------------------------------------------------
-- Function find_id_dwidth
--
-- This function is used to find the data width of a target module. If the
-- target module exists, the data width is extracted from the input dwidth
-- array. If the module is not in the ID array, the default input is
-- returned. This function is needed to assign data port size constraints on
-- unconstrained port widths.
-----------------------------------------------------------------------------
function find_id_dwidth (id_array : INTEGER_ARRAY_TYPE;
dwidth_array: INTEGER_ARRAY_TYPE;
id : integer;
default : integer) return integer is
Variable id_present : Boolean := false;
Variable array_index : Integer := 0;
Variable dwidth : Integer := default;
begin
id_present := find_ard_id(id_array, id);
If (id_present) Then
array_index := get_id_index (id_array, id);
dwidth := dwidth_array(array_index);
else
null; -- use default input
End if;
Return (dwidth);
end function find_id_dwidth;
-----------------------------------------------------------------------------
-- Function cnt_ipif_id_blks
--
-- This function is used to detirmine the number of IPIF components specified
-- in the ARD ID Array. An integer is returned representing the number
-- of elements counted. User IDs are ignored in the counting process.
-----------------------------------------------------------------------------
function cnt_ipif_id_blks (id_array : INTEGER_ARRAY_TYPE)
return integer is
Variable blk_count : integer := 0;
Variable temp_id : integer;
begin
for array_index in 0 to id_array'length-1 loop
temp_id := id_array(array_index);
If (temp_id = IPIF_WRFIFO_DATA or
temp_id = IPIF_RDFIFO_DATA or
temp_id = IPIF_RST or
temp_id = IPIF_INTR or
temp_id = IPIF_DMA_SG or
temp_id = IPIF_SESR_SEAR
) Then -- IPIF block found
blk_count := blk_count+1;
else -- go to next loop iteration
null;
End if;
End loop;
return(blk_count);
end function cnt_ipif_id_blks;
-----------------------------------------------------------------------------
-- Function get_ipif_id_dbus_index
--
-- This function is used to detirmine the IPIF relative index of a given
-- ID value. User IDs are ignored in the index detirmination.
-----------------------------------------------------------------------------
function get_ipif_id_dbus_index (id_array : INTEGER_ARRAY_TYPE;
id : integer)
return integer is
Variable blk_index : integer := 0;
Variable temp_id : integer;
Variable id_found : Boolean := false;
begin
for array_index in 0 to id_array'length-1 loop
temp_id := id_array(array_index);
If (id_found) then
null;
elsif (temp_id = id) then
id_found := true;
elsif (temp_id = IPIF_WRFIFO_DATA or
temp_id = IPIF_RDFIFO_DATA or
temp_id = IPIF_RST or
temp_id = IPIF_INTR or
temp_id = IPIF_DMA_SG or
temp_id = IPIF_SESR_SEAR
) Then -- IPIF block found
blk_index := blk_index+1;
else -- user block so do nothing
null;
End if;
End loop;
return(blk_index);
end function get_ipif_id_dbus_index;
------------------------------------------------------------------------------
-- Function: rebuild_slv32_array
--
-- Description:
-- This function takes an input slv32 array and rebuilds an output slv32
-- array composed of the first "num_valid_entry" elements from the input
-- array.
------------------------------------------------------------------------------
function rebuild_slv32_array (slv32_array : SLV32_ARRAY_TYPE;
num_valid_pairs : integer)
return SLV32_ARRAY_TYPE is
--Constants
constant num_elements : Integer := num_valid_pairs * 2;
-- Variables
variable temp_baseaddr32_array : SLV32_ARRAY_TYPE( 0 to num_elements-1);
begin
for array_index in 0 to num_elements-1 loop
temp_baseaddr32_array(array_index) := slv32_array(array_index);
end loop;
return(temp_baseaddr32_array);
end function rebuild_slv32_array;
------------------------------------------------------------------------------
-- Function: rebuild_slv64_array
--
-- Description:
-- This function takes an input slv64 array and rebuilds an output slv64
-- array composed of the first "num_valid_entry" elements from the input
-- array.
------------------------------------------------------------------------------
function rebuild_slv64_array (slv64_array : SLV64_ARRAY_TYPE;
num_valid_pairs : integer)
return SLV64_ARRAY_TYPE is
--Constants
constant num_elements : Integer := num_valid_pairs * 2;
-- Variables
variable temp_baseaddr64_array : SLV64_ARRAY_TYPE( 0 to num_elements-1);
begin
for array_index in 0 to num_elements-1 loop
temp_baseaddr64_array(array_index) := slv64_array(array_index);
end loop;
return(temp_baseaddr64_array);
end function rebuild_slv64_array;
------------------------------------------------------------------------------
-- Function: rebuild_int_array
--
-- Description:
-- This function takes an input integer array and rebuilds an output integer
-- array composed of the first "num_valid_entry" elements from the input
-- array.
------------------------------------------------------------------------------
function rebuild_int_array (int_array : INTEGER_ARRAY_TYPE;
num_valid_entry : integer)
return INTEGER_ARRAY_TYPE is
-- Variables
variable temp_int_array : INTEGER_ARRAY_TYPE( 0 to num_valid_entry-1);
begin
for array_index in 0 to num_valid_entry-1 loop
temp_int_array(array_index) := int_array(array_index);
end loop;
return(temp_int_array);
end function rebuild_int_array;
function bits_needed_for_vac(
fifo_present: boolean;
dependent_props : DEPENDENT_PROPS_TYPE
) return integer is
begin
if not fifo_present then
return 1; -- Zero would be better but leads to "0 to -1" null
-- ranges that are not handled by XST Flint or earlier
-- because of the negative index.
else
return
log2(1 + dependent_props(FIFO_CAPACITY_BITS) /
dependent_props(RD_WIDTH_BITS)
);
end if;
end function bits_needed_for_vac;
function bits_needed_for_occ(
fifo_present: boolean;
dependent_props : DEPENDENT_PROPS_TYPE
) return integer is
begin
if not fifo_present then
return 1; -- Zero would be better but leads to "0 to -1" null
-- ranges that are not handled by XST Flint or earlier
-- because of the negative index.
else
return
log2(1 + dependent_props(FIFO_CAPACITY_BITS) /
dependent_props(WR_WIDTH_BITS)
);
end if;
end function bits_needed_for_occ;
function eff_dp(id : integer;
dep_prop : integer;
value : integer) return integer is
variable dp : integer := dep_prop;
type bo2na_type is array (boolean) of natural;
constant bo2na : bo2na_type := (0, 1);
begin
if value /= 0 then return value; end if; -- Not default
case id is
when IPIF_CHDMA_CHANNELS =>
-------------------
return( bo2na(dp = CLK_PERIOD_PS ) * 10000
+ bo2na(dp = PACKET_WAIT_UNIT_NS ) * 1000000
+ bo2na(dp = BURST_SIZE ) * 16
);
when others => return 0;
end case;
end eff_dp;
function populate_intr_mode_array (num_user_intr : integer;
intr_capture_mode : integer)
return INTEGER_ARRAY_TYPE is
variable intr_mode_array : INTEGER_ARRAY_TYPE(0 to num_user_intr-1);
begin
for i in 0 to num_user_intr-1 loop
intr_mode_array(i) := intr_capture_mode;
end loop;
return intr_mode_array;
end function populate_intr_mode_array;
function add_intr_ard_id_array(include_intr : boolean;
ard_id_array : INTEGER_ARRAY_TYPE)
return INTEGER_ARRAY_TYPE is
variable intr_ard_id_array : INTEGER_ARRAY_TYPE(0 to ard_id_array'length);
begin
intr_ard_id_array(0 to ard_id_array'length-1) := ard_id_array;
if include_intr then
intr_ard_id_array(ard_id_array'length) := IPIF_INTR;
return intr_ard_id_array;
else
return ard_id_array;
end if;
end function add_intr_ard_id_array;
function add_intr_ard_addr_range_array(include_intr : boolean;
ZERO_ADDR_PAD : std_logic_vector;
intr_baseaddr : std_logic_vector;
intr_highaddr : std_logic_vector;
ard_id_array : INTEGER_ARRAY_TYPE;
ard_addr_range_array : SLV64_ARRAY_TYPE)
return SLV64_ARRAY_TYPE is
variable intr_ard_addr_range_array : SLV64_ARRAY_TYPE(0 to ard_addr_range_array'length+1);
begin
intr_ard_addr_range_array(0 to ard_addr_range_array'length-1) := ard_addr_range_array;
if include_intr then
intr_ard_addr_range_array(2*get_id_index(ard_id_array,IPIF_INTR))
:= ZERO_ADDR_PAD & intr_baseaddr;
intr_ard_addr_range_array(2*get_id_index(ard_id_array,IPIF_INTR)+1)
:= ZERO_ADDR_PAD & intr_highaddr;
return intr_ard_addr_range_array;
else
return ard_addr_range_array;
end if;
end function add_intr_ard_addr_range_array;
function add_intr_ard_dwidth_array(include_intr : boolean;
intr_dwidth : integer;
ard_id_array : INTEGER_ARRAY_TYPE;
ard_dwidth_array : INTEGER_ARRAY_TYPE)
return INTEGER_ARRAY_TYPE is
variable intr_ard_dwidth_array : INTEGER_ARRAY_TYPE(0 to ard_dwidth_array'length);
begin
intr_ard_dwidth_array(0 to ard_dwidth_array'length-1) := ard_dwidth_array;
if include_intr then
intr_ard_dwidth_array(get_id_index(ard_id_array, IPIF_INTR)) := intr_dwidth;
return intr_ard_dwidth_array;
else
return ard_dwidth_array;
end if;
end function add_intr_ard_dwidth_array;
function add_intr_ard_num_ce_array(include_intr : boolean;
ard_id_array : INTEGER_ARRAY_TYPE;
ard_num_ce_array : INTEGER_ARRAY_TYPE)
return INTEGER_ARRAY_TYPE is
variable intr_ard_num_ce_array : INTEGER_ARRAY_TYPE(0 to ard_num_ce_array'length);
begin
intr_ard_num_ce_array(0 to ard_num_ce_array'length-1) := ard_num_ce_array;
if include_intr then
intr_ard_num_ce_array(get_id_index(ard_id_array, IPIF_INTR)) := 16;
return intr_ard_num_ce_array;
else
return ard_num_ce_array;
end if;
end function add_intr_ard_num_ce_array;
end package body ipif_pkg;
|
-- IPIF Common Library Package
-------------------------------------------------------------------------------
--
-- *************************************************************************
-- ** **
-- ** DISCLAIMER OF LIABILITY **
-- ** **
-- ** This text/file contains proprietary, confidential **
-- ** information of Xilinx, Inc., is distributed under **
-- ** license from Xilinx, Inc., and may be used, copied **
-- ** and/or disclosed only pursuant to the terms of a valid **
-- ** license agreement with Xilinx, Inc. Xilinx hereby **
-- ** grants you a license to use this text/file solely for **
-- ** design, simulation, implementation and creation of **
-- ** design files limited to Xilinx devices or technologies. **
-- ** Use with non-Xilinx devices or technologies is expressly **
-- ** prohibited and immediately terminates your license unless **
-- ** covered by a separate agreement. **
-- ** **
-- ** Xilinx is providing this design, code, or information **
-- ** "as-is" solely for use in developing programs and **
-- ** solutions for Xilinx devices, with no obligation on the **
-- ** part of Xilinx to provide support. By providing this design, **
-- ** code, or information as one possible implementation of **
-- ** this feature, application or standard, Xilinx is making no **
-- ** representation that this implementation is free from any **
-- ** claims of infringement. You are responsible for obtaining **
-- ** any rights you may require for your implementation. **
-- ** Xilinx expressly disclaims any warranty whatsoever with **
-- ** respect to the adequacy of the implementation, including **
-- ** but not limited to any warranties or representations that this **
-- ** implementation is free from claims of infringement, implied **
-- ** warranties of merchantability or fitness for a particular **
-- ** purpose. **
-- ** **
-- ** Xilinx products are not intended for use in life support **
-- ** appliances, devices, or systems. Use in such applications is **
-- ** expressly prohibited. **
-- ** **
-- ** Any modifications that are made to the Source Code are **
-- ** done at the users sole risk and will be unsupported. **
-- ** The Xilinx Support Hotline does not have access to source **
-- ** code and therefore cannot answer specific questions related **
-- ** to source HDL. The Xilinx Hotline support of original source **
-- ** code IP shall only address issues and questions related **
-- ** to the standard Netlist version of the core (and thus **
-- ** indirectly, the original core source). **
-- ** **
-- ** Copyright (c) 2002-2010 Xilinx, Inc. All rights reserved. **
-- ** **
-- ** This copyright and support notice must be retained as part **
-- ** of this text at all times. **
-- ** **
-- *************************************************************************
--
-------------------------------------------------------------------------------
-- Filename: ipif_pkg.vhd
-- Version: Intital
-- Description: This file contains the constants and functions used in the
-- ipif common library components.
--
-------------------------------------------------------------------------------
-- Structure:
--
-------------------------------------------------------------------------------
-- Author: DET
-- History:
-- DET 02/21/02 -- Created from proc_common_pkg.vhd
--
-- DET 03/13/02 -- PLB IPIF development updates
-- ^^^^^^
-- - Commented out string types and string functions due to an XST
-- problem with string arrays and functions. THe string array
-- processing functions were replaced with comperable functions
-- operating on integer arrays.
-- ~~~~~~
--
--
-- DET 4/30/2002 Initial
-- ~~~~~~
-- - Added three functions: rebuild_slv32_array, rebuild_slv64_array, and
-- rebuild_int_array to support removal of unused elements from the
-- ARD arrays.
-- ^^^^^^ --
--
-- FLO 8/12/2002
-- ~~~~~~
-- - Added three functions: bits_needed_for_vac, bits_needed_for_occ,
-- and get_id_index_iboe.
-- (Removed provisional functions bits_needed_for_vacancy,
-- bits needed_for_occupancy, and bits_needed_for.)
-- ^^^^^^
--
-- FLO 3/24/2003
-- ~~~~~~
-- - Added dependent property paramters for channelized DMA.
-- - Added common property parameter array type.
-- - Definded the KEYHOLD_BURST common-property parameter.
-- ^^^^^^
--
-- FLO 10/22/2003
-- ~~~~~~
-- - Some adjustment to CHDMA parameterization.
-- - Cleanup of obsolete code and comments. (The former "XST workaround"
-- has become the officially deployed method.)
-- ^^^^^^
--
-- LSS 03/24/2004
-- ~~~~~~
-- - Added 5 functions
-- ^^^^^^
--
-- ALS 09/03/04
-- ^^^^^^
-- -- Added constants to describe the channel protocols used in MCH_OPB_IPIF
-- ~~~~~~
--
-- DET 1/17/2008 v4_0
-- ~~~~~~
-- - Changed proc_common library version to v4_0
-- - Incorporated new disclaimer header
-- ^^^^^^
--
-------------------------------------------------------------------------------
-- Naming Conventions:
-- active low signals: "*_n"
-- clock signals: "clk", "clk_div#", "clk_#x"
-- reset signals: "rst", "rst_n"
-- generics: "C_*"
-- user defined types: "*_TYPE"
-- state machine next state: "*_ns"
-- state machine current state: "*_cs"
-- combinatorial signals: "*_com"
-- pipelined or register delay signals: "*_d#"
-- counter signals: "*cnt*"
-- clock enable signals: "*_ce"
-- internal version of output port "*_i"
-- device pins: "*_pin"
-- ports: - Names begin with Uppercase
-- processes: "*_PROCESS"
-- component instantiations: "<ENTITY_>I_<#|FUNC>
-------------------------------------------------------------------------------
library ieee;
use ieee.std_logic_1164.all;
-- need conversion function to convert reals/integers to std logic vectors
use ieee.std_logic_arith.all;
use ieee.std_logic_arith.all;
use ieee.std_logic_unsigned.all;
package ipif_pkg is
-------------------------------------------------------------------------------
-- Type Declarations
-------------------------------------------------------------------------------
type SLV32_ARRAY_TYPE is array (natural range <>) of std_logic_vector(0 to 31);
subtype SLV64_TYPE is std_logic_vector(0 to 63);
type SLV64_ARRAY_TYPE is array (natural range <>) of SLV64_TYPE;
type INTEGER_ARRAY_TYPE is array (natural range <>) of integer;
-------------------------------------------------------------------------------
-- Function and Procedure Declarations
-------------------------------------------------------------------------------
function "=" (s1: in string; s2: in string) return boolean;
function equaluseCase( str1, str2 : STRING ) RETURN BOOLEAN;
function calc_num_ce (ce_num_array : INTEGER_ARRAY_TYPE) return integer;
function calc_start_ce_index (ce_num_array : INTEGER_ARRAY_TYPE;
index : integer) return integer;
function get_min_dwidth (dwidth_array: INTEGER_ARRAY_TYPE) return integer;
function get_max_dwidth (dwidth_array: INTEGER_ARRAY_TYPE) return integer;
function S32 (in_string : string) return string;
--------------------------------------------------------------------------------
-- ARD support functions.
-- These function can be useful when operating with the ARD parameterization.
--------------------------------------------------------------------------------
function get_id_index (id_array :INTEGER_ARRAY_TYPE;
id : integer)
return integer;
function get_id_index_iboe (id_array :INTEGER_ARRAY_TYPE;
id : integer)
return integer;
function find_ard_id (id_array : INTEGER_ARRAY_TYPE;
id : integer) return boolean;
function find_id_dwidth (id_array : INTEGER_ARRAY_TYPE;
dwidth_array: INTEGER_ARRAY_TYPE;
id : integer;
default : integer)
return integer;
function cnt_ipif_id_blks (id_array : INTEGER_ARRAY_TYPE) return integer;
function get_ipif_id_dbus_index (id_array : INTEGER_ARRAY_TYPE;
id : integer)
return integer ;
function rebuild_slv32_array (slv32_array : SLV32_ARRAY_TYPE;
num_valid_pairs : integer)
return SLV32_ARRAY_TYPE;
function rebuild_slv64_array (slv64_array : SLV64_ARRAY_TYPE;
num_valid_pairs : integer)
return SLV64_ARRAY_TYPE;
function rebuild_int_array (int_array : INTEGER_ARRAY_TYPE;
num_valid_entry : integer)
return INTEGER_ARRAY_TYPE;
-- 5 Functions Added 3/24/04
function populate_intr_mode_array (num_user_intr : integer;
intr_capture_mode : integer)
return INTEGER_ARRAY_TYPE ;
function add_intr_ard_id_array(include_intr : boolean;
ard_id_array : INTEGER_ARRAY_TYPE)
return INTEGER_ARRAY_TYPE;
function add_intr_ard_addr_range_array(include_intr : boolean;
ZERO_ADDR_PAD : std_logic_vector;
intr_baseaddr : std_logic_vector;
intr_highaddr : std_logic_vector;
ard_id_array : INTEGER_ARRAY_TYPE;
ard_addr_range_array : SLV64_ARRAY_TYPE)
return SLV64_ARRAY_TYPE;
function add_intr_ard_num_ce_array(include_intr : boolean;
ard_id_array : INTEGER_ARRAY_TYPE;
ard_num_ce_array : INTEGER_ARRAY_TYPE)
return INTEGER_ARRAY_TYPE;
function add_intr_ard_dwidth_array(include_intr : boolean;
intr_dwidth : integer;
ard_id_array : INTEGER_ARRAY_TYPE;
ard_dwidth_array : INTEGER_ARRAY_TYPE)
return INTEGER_ARRAY_TYPE;
function log2(x : natural) return integer;
function clog2(x : positive) return natural;
-------------------------------------------------------------------------------
-- Constant Declarations
-------------------------------------------------------------------------------
-------------------------------------------------------------------------------
-- Channel Protocols
-- The constant declarations below give symbolic-name aliases for values that
-- can be used in the C_MCH_PROTOCOL_ARRAY generic of the MCH_OPB_IPIF.
-------------------------------------------------------------------------------
constant XCL : integer := 0;
constant DAG : integer := 1;
--------------------------------------------------------------------------------
-- Address range types.
-- The constant declarations, below, give symbolic-name aliases for values
-- that can be used in the C_ARD_ID_ARRAY generic of IPIFs. The first set
-- gives aliases that are used to include IPIF services.
--------------------------------------------------------------------------------
-- IPIF module aliases
Constant IPIF_INTR : integer := 1;
Constant IPIF_RST : integer := 2;
Constant IPIF_SESR_SEAR : integer := 3;
Constant IPIF_DMA_SG : integer := 4;
Constant IPIF_WRFIFO_REG : integer := 5;
Constant IPIF_WRFIFO_DATA : integer := 6;
Constant IPIF_RDFIFO_REG : integer := 7;
Constant IPIF_RDFIFO_DATA : integer := 8;
Constant IPIF_CHDMA_CHANNELS : integer := 9;
Constant IPIF_CHDMA_GLOBAL_REGS : integer := 10;
Constant CHDMA_STATUS_FIFO : integer := 90;
-- Some predefined user module aliases
Constant USER_00 : integer := 100;
Constant USER_01 : integer := 101;
Constant USER_02 : integer := 102;
Constant USER_03 : integer := 103;
Constant USER_04 : integer := 104;
Constant USER_05 : integer := 105;
Constant USER_06 : integer := 106;
Constant USER_07 : integer := 107;
Constant USER_08 : integer := 108;
Constant USER_09 : integer := 109;
Constant USER_10 : integer := 110;
Constant USER_11 : integer := 111;
Constant USER_12 : integer := 112;
Constant USER_13 : integer := 113;
Constant USER_14 : integer := 114;
Constant USER_15 : integer := 115;
Constant USER_16 : integer := 116;
---( Start of Dependent Properties declarations
--------------------------------------------------------------------------------
-- Declarations for Dependent Properties (properties that depend on the type of
-- the address range, or in other words, address-range-specific parameters).
-- There is one property, i.e. one parameter, encoded as an integer at
-- each index of the properties array. There is one properties array for
-- each address range.
--
-- The C_ARD_DEPENDENT_PROPS_ARRAY generic parameter in (most) IPIFs is such
-- a properties array and it is usually giving its (static) value using a
-- VHDL aggregate construct. (--ToDo, give an example of this.)
--
-- The the "assigned" default value of a dependent property is zero. This value
-- is usually specified the aggregate by leaving its (index) name out so that
-- it is covered by an "others => 0" choice in the aggregate. Some parameters,
-- as noted in the definitions, below, have an "effective" default value that is
-- different from the assigned default value of zero. In such cases, the
-- function, eff_dp, given below, can be used to get the effective value of
-- the dependent property.
--------------------------------------------------------------------------------
constant DEPENDENT_PROPS_SIZE : integer := 32;
subtype DEPENDENT_PROPS_TYPE
is INTEGER_ARRAY_TYPE(0 to DEPENDENT_PROPS_SIZE-1);
type DEPENDENT_PROPS_ARRAY_TYPE
is array (natural range <>) of DEPENDENT_PROPS_TYPE;
--------------------------------------------------------------------------------
-- Below are the indices of dependent properties for the different types of
-- address ranges.
--
-- Example: Let C_ARD_DEPENDENT_PROPS_ARRAY hold the dependent properites
-- for a set of address ranges. Then, e.g.,
--
-- C_ARD_DEPENDENT_PROPS_ARRAY(i)(FIFO_CAPACITY_BITS)
--
-- gives the fifo capacity in bits, provided that the i'th address range
-- is of type IPIF_WRFIFO_DATA or IPIF_RDFIFO_DATA.
--
-- These indices should be referenced only by the names below and never
-- by numerical literals. (The right to change numerical index assignments
-- is reserved; applications using the names will not be affected by such
-- reassignments.)
--------------------------------------------------------------------------------
--
--ToDo, if the interrupt controller parameterization is ever moved to
-- C_ARD_DEPENDENT_PROPS_ARRAY, then the following declarations
-- could be uncommented and used.
---- IPIF_INTR IDX
---------------------------------------------------------------------------- ---
constant EXCLUDE_DEV_ISC : integer := 0;
-- 1 specifies that only the global interrupt
-- enable is present in the device interrupt source
-- controller and that the only source of interrupts
-- in the device is the IP interrupt source controller.
-- 0 specifies that the full device interrupt
-- source controller structure will be included.
constant INCLUDE_DEV_PENCODER : integer := 1;
-- 1 will include the Device IID in the device interrupt
-- source controller, 0 will exclude it.
--
-- IPIF_WRFIFO_DATA or IPIF_RDFIFO_DATA IDX
---------------------------------------------------------------------------- ---
constant FIFO_CAPACITY_BITS : integer := 0;
constant WR_WIDTH_BITS : integer := 1;
constant RD_WIDTH_BITS : integer := 2;
constant EXCLUDE_PACKET_MODE : integer := 3;
-- 1 Don't include packet mode features
-- 0 Include packet mode features
constant EXCLUDE_VACANCY : integer := 4;
-- 1 Don't include vacancy calculation
-- 0 Include vacancy calculation
-- See also the functions
-- bits_needed_for_vac and
-- bits_needed_for_occ that are declared below.
constant INCLUDE_DRE : integer := 5;
constant INCLUDE_AUTOPUSH_POP : integer := 6;
constant AUTOPUSH_POP_CE : integer := 7;
constant INCLUDE_CSUM : integer := 8;
--------------------------------------------------------------------------------
--
-- DMA_SG IDX
---------------------------------------------------------------------------- ---
--------------------------------------------------------------------------------
-- IPIF_CHDMA_CHANNELS IDX
---------------------------------------------------------------------------- ---
constant NUM_SUBS_FOR_PHYS_0 : integer :=0;
constant NUM_SUBS_FOR_PHYS_1 : integer :=1;
constant NUM_SUBS_FOR_PHYS_2 : integer :=2;
constant NUM_SUBS_FOR_PHYS_3 : integer :=3;
constant NUM_SUBS_FOR_PHYS_4 : integer :=4;
constant NUM_SUBS_FOR_PHYS_5 : integer :=5;
constant NUM_SUBS_FOR_PHYS_6 : integer :=6;
constant NUM_SUBS_FOR_PHYS_7 : integer :=7;
constant NUM_SUBS_FOR_PHYS_8 : integer :=8;
constant NUM_SUBS_FOR_PHYS_9 : integer :=9;
constant NUM_SUBS_FOR_PHYS_10 : integer :=10;
constant NUM_SUBS_FOR_PHYS_11 : integer :=11;
constant NUM_SUBS_FOR_PHYS_12 : integer :=12;
constant NUM_SUBS_FOR_PHYS_13 : integer :=13;
constant NUM_SUBS_FOR_PHYS_14 : integer :=14;
constant NUM_SUBS_FOR_PHYS_15 : integer :=15;
-- Gives the number of sub-channels for physical channel i.
--
-- These constants, which will be MAX_NUM_PHYS_CHANNELS in number (see
-- below), have consecutive values starting with 0 for
-- NUM_SUBS_FOR_PHYS_0. (The constants serve the purpose of giving symbolic
-- names for use in the dependent-properties aggregates that parameterize
-- an IPIF_CHDMA_CHANNELS address range.)
--
-- [Users can ignore this note for developers
-- If the number of physical channels changes, both the
-- IPIF_CHDMA_CHANNELS constants and MAX_NUM_PHYS_CHANNELS,
-- below, must be adjusted.
-- (Use of an array constant or a function of the form
-- NUM_SUBS_FOR_PHYS(i) to define the indices
-- runs afoul of LRM restrictions on non-locally static aggregate
-- choices. (Further, the LRM imposes perhaps unnecessarily
-- strict limits on what qualifies as a locally static primary.)
-- Note: This information is supplied for the benefit of anyone seeking
-- to improve the way that these NUM_SUBS_FOR_PHYS parameter
-- indices are defined.)
-- End of note for developers ]
--
-- The value associated with any index NUM_SUBS_FOR_PHYS_i in the
-- dependent-properties array must be even since TX and RX channels
-- come in pairs with the TX followed immediately by
-- the corresponding RX.
--
constant NUM_SIMPLE_DMA_CHANS : integer :=16;
-- The number of simple DMA channels.
constant NUM_SIMPLE_SG_CHANS : integer :=17;
-- The number of simple SG channels.
constant INTR_COALESCE : integer :=18;
-- 0 Interrupt coalescing is disabled
-- 1 Interrupt coalescing is enabled
constant CLK_PERIOD_PS : integer :=19;
-- The period of the OPB Bus clock in ps.
-- The default value of 0 is a special value that
-- is synonymous with 10000 ps (10 ns).
-- The value for CLK_PERIOD_PS is relevant only if (INTR_COALESCE = 1).
constant PACKET_WAIT_UNIT_NS : integer :=20;
-- Gives the unit for used for timing of pack-wait bounds.
-- The default value of 0 is a special value that
-- is synonymous with 1,000,000 ns (1 ms) and a non-default
-- value is typically only used for testing.
-- Relevant only if (INTR_COALESCE = 1).
constant BURST_SIZE : integer :=21;
-- 1, 2, 4, 8 or 16
-- The default value of 0 is a special value that
-- is synonymous with a burst size of 16.
-- Setting the BURST_SIZE to 1 effectively disables
-- bursts.
constant REMAINDER_AS_SINGLES : integer :=22;
-- 0 Remainder handled as a short burst
-- 1 Remainder handled as a series of singles
--------------------------------------------------------------------------------
-- The constant below is not the index of a dependent-properties
-- parameter (and, as such, would never appear as a choice in a
-- dependent-properties aggregate). Rather, it is fixed to the maximum
-- number of physical channels that an Address Range of type
-- IPIF_CHDMA_CHANNELS supports. It must be maintained in conjuction with
-- the constants named, e.g., NUM_SUBS_FOR_PHYS_15, above.
--------------------------------------------------------------------------------
constant MAX_NUM_PHYS_CHANNELS : natural := 16;
--------------------------------------------------------------------------
-- EXAMPLE: Here is an example dependent-properties aggregate for an
-- address range of type IPIF_CHDMA_CHANNELS.
-- To have a compact list of all of the CHDMA parameters, all are
-- shown, however three are commented out and the unneeded
-- MUM_SUBS_FOR_PHYS_x are excluded. The "OTHERS => 0" association
-- gives these parameters their default values, such that, for the example
--
-- - All physical channels above 2 have zero subchannels (effectively,
-- these physical channels are not used)
-- - There are no simple SG channels
-- - The packet-wait time unit is 1 ms
-- - Burst size is 16
--------------------------------------------------------------------------
-- (
-- NUM_SUBS_FOR_PHYS_0 => 8,
-- NUM_SUBS_FOR_PHYS_1 => 4,
-- NUM_SUBS_FOR_PHYS_2 => 14,
-- NUM_SIMPLE_DMA_CHANS => 1,
-- --NUM_SIMPLE_SG_CHANS => 5,
-- INTR_COALESCE => 1,
-- CLK_PERIOD_PS => 20000,
-- --PACKET_WAIT_UNIT_NS => 50000,
-- --BURST_SIZE => 1,
-- REMAINDER_AS_SINGLES => 1,
-- OTHERS => 0
-- )
--
--------------------------------------------------------------------------------
--------------------------------------------------------------------------------
-- Calculates the number of bits needed to convey the vacancy (emptiness) of
-- the fifo described by dependent_props, if fifo_present. If not fifo_present,
-- returns 0 (or the smallest value allowed by tool limitations on null arrays)
-- without making reference to dependent_props.
--------------------------------------------------------------------------------
function bits_needed_for_vac(
fifo_present: boolean;
dependent_props : DEPENDENT_PROPS_TYPE
) return integer;
--------------------------------------------------------------------------------
-- Calculates the number of bits needed to convey the occupancy (fullness) of
-- the fifo described by dependent_props, if fifo_present. If not fifo_present,
-- returns 0 (or the smallest value allowed by tool limitations on null arrays)
-- without making reference to dependent_props.
--------------------------------------------------------------------------------
function bits_needed_for_occ(
fifo_present: boolean;
dependent_props : DEPENDENT_PROPS_TYPE
) return integer;
--------------------------------------------------------------------------------
-- Function eff_dp.
--
-- For some of the dependent properties, the default value of zero is meant
-- to imply an effective default value of other than zero (see e.g.
-- PKT_WAIT_UNIT_NS for the IPIF_CHDMA_CHANNELS address-range type). The
-- following function is used to get the (possibly default-adjusted)
-- value for a dependent property.
--
-- Example call:
--
-- eff_value_of_param :=
-- eff_dp(
-- C_IPIF_CHDMA_CHANNELS,
-- PACKET_WAIT_UNIT_NS,
-- C_ARD_DEPENDENT_PROPS_ARRAY(i)(PACKET_WAIT_UNIT_NS)
-- );
--
-- where C_ARD_DEPENDENT_PROPS_ARRAY(i) is an object of type
-- DEPENDENT_PROPS_ARRAY_TYPE, that was parameterized for an address range of
-- type C_IPIF_CHDMA_CHANNELS.
--------------------------------------------------------------------------------
function eff_dp(id : integer; -- The type of address range.
dep_prop : integer; -- The index of the dependent prop.
value : integer -- The value at that index.
) return integer; -- The effective value, possibly adjusted
-- if value has the default value of 0.
---) End of Dependent Properties declarations
--------------------------------------------------------------------------------
-- Declarations for Common Properties (properties that apply regardless of the
-- type of the address range). Structurally, these work the same as
-- the dependent properties.
--------------------------------------------------------------------------------
constant COMMON_PROPS_SIZE : integer := 2;
subtype COMMON_PROPS_TYPE
is INTEGER_ARRAY_TYPE(0 to COMMON_PROPS_SIZE-1);
type COMMON_PROPS_ARRAY_TYPE
is array (natural range <>) of COMMON_PROPS_TYPE;
--------------------------------------------------------------------------------
-- Below are the indices of the common properties.
--
-- These indices should be referenced only by the names below and never
-- by numerical literals.
-- IDX
---------------------------------------------------------------------------- ---
constant KEYHOLE_BURST : integer := 0;
-- 1 All addresses of a burst are forced to the initial
-- address of the burst.
-- 0 Burst addresses follow the bus protocol.
-- IP interrupt mode array constants
Constant INTR_PASS_THRU : integer := 1;
Constant INTR_PASS_THRU_INV : integer := 2;
Constant INTR_REG_EVENT : integer := 3;
Constant INTR_REG_EVENT_INV : integer := 4;
Constant INTR_POS_EDGE_DETECT : integer := 5;
Constant INTR_NEG_EDGE_DETECT : integer := 6;
end ipif_pkg;
package body ipif_pkg is
-------------------------------------------------------------------------------
-- Function log2 -- returns number of bits needed to encode x choices
-- x = 0 returns 0
-- x = 1 returns 0
-- x = 2 returns 1
-- x = 4 returns 2, etc.
-------------------------------------------------------------------------------
--
function log2(x : natural) return integer is
variable i : integer := 0;
variable val: integer := 1;
begin
if x = 0 then return 0;
else
for j in 0 to 29 loop -- for loop for XST
if val >= x then null;
else
i := i+1;
val := val*2;
end if;
end loop;
-- Fix per CR520627 XST was ignoring this anyway and printing a
-- Warning in SRP file. This will get rid of the warning and not
-- impact simulation.
-- synthesis translate_off
assert val >= x
report "Function log2 received argument larger" &
" than its capability of 2^30. "
severity failure;
-- synthesis translate_on
return i;
end if;
end function log2;
--------------------------------------------------------------------------------
-- Function clog2 - returns the integer ceiling of the base 2 logarithm of x,
-- i.e., the least integer greater than or equal to log2(x).
--------------------------------------------------------------------------------
function clog2(x : positive) return natural is
variable r : natural := 0;
variable rp : natural := 1; -- rp tracks the value 2**r
begin
while rp < x loop -- Termination condition T: x <= 2**r
-- Loop invariant L: 2**(r-1) < x
r := r + 1;
if rp > integer'high - rp then exit; end if; -- If doubling rp overflows
-- the integer range, the doubled value would exceed x, so safe to exit.
rp := rp + rp;
end loop;
-- L and T <-> 2**(r-1) < x <= 2**r <-> (r-1) < log2(x) <= r
return r; --
end clog2;
-------------------------------------------------------------------------------
-- Function Definitions
-------------------------------------------------------------------------------
-----------------------------------------------------------------------------
-- Function "="
--
-- This function can be used to overload the "=" operator when comparing
-- strings.
-----------------------------------------------------------------------------
function "=" (s1: in string; s2: in string) return boolean is
constant tc: character := ' '; -- string termination character
variable i: integer := 1;
variable v1 : string(1 to s1'length) := s1;
variable v2 : string(1 to s2'length) := s2;
begin
while (i <= v1'length) and (v1(i) /= tc) and
(i <= v2'length) and (v2(i) /= tc) and
(v1(i) = v2(i))
loop
i := i+1;
end loop;
return ((i > v1'length) or (v1(i) = tc)) and
((i > v2'length) or (v2(i) = tc));
end;
----------------------------------------------------------------------------
-- Function equaluseCase
--
-- This function returns true if case sensitive string comparison determines
-- that str1 and str2 are the same.
-----------------------------------------------------------------------------
FUNCTION equaluseCase( str1, str2 : STRING ) RETURN BOOLEAN IS
CONSTANT len1 : INTEGER := str1'length;
CONSTANT len2 : INTEGER := str2'length;
VARIABLE equal : BOOLEAN := TRUE;
BEGIN
IF NOT (len1=len2) THEN
equal := FALSE;
ELSE
FOR i IN str1'range LOOP
IF NOT (str1(i) = str2(i)) THEN
equal := FALSE;
END IF;
END LOOP;
END IF;
RETURN equal;
END equaluseCase;
-----------------------------------------------------------------------------
-- Function calc_num_ce
--
-- This function is used to process the array specifying the number of Chip
-- Enables required for a Base Address specification. The array is input to
-- the function and an integer is returned reflecting the total number of
-- Chip Enables required for the CE, RdCE, and WrCE Buses
-----------------------------------------------------------------------------
function calc_num_ce (ce_num_array : INTEGER_ARRAY_TYPE) return integer is
Variable ce_num_sum : integer := 0;
begin
for i in 0 to (ce_num_array'length)-1 loop
ce_num_sum := ce_num_sum + ce_num_array(i);
End loop;
return(ce_num_sum);
end function calc_num_ce;
-----------------------------------------------------------------------------
-- Function calc_start_ce_index
--
-- This function is used to process the array specifying the number of Chip
-- Enables required for a Base Address specification. The CE Size array is
-- input to the function and an integer index representing the index of the
-- target module in the ce_num_array. An integer is returned reflecting the
-- starting index of the assigned Chip Enables within the CE, RdCE, and
-- WrCE Buses.
-----------------------------------------------------------------------------
function calc_start_ce_index (ce_num_array : INTEGER_ARRAY_TYPE;
index : integer) return integer is
Variable ce_num_sum : integer := 0;
begin
If (index = 0) Then
ce_num_sum := 0;
else
for i in 0 to index-1 loop
ce_num_sum := ce_num_sum + ce_num_array(i);
End loop;
End if;
return(ce_num_sum);
end function calc_start_ce_index;
-----------------------------------------------------------------------------
-- Function get_min_dwidth
--
-- This function is used to process the array specifying the data bus width
-- for each of the target modules. The dwidth_array is input to the function
-- and an integer is returned that is the smallest value found of all the
-- entries in the array.
-----------------------------------------------------------------------------
function get_min_dwidth (dwidth_array: INTEGER_ARRAY_TYPE) return integer is
Variable temp_min : Integer := 1024;
begin
for i in 0 to dwidth_array'length-1 loop
If (dwidth_array(i) < temp_min) Then
temp_min := dwidth_array(i);
else
null;
End if;
End loop;
return(temp_min);
end function get_min_dwidth;
-----------------------------------------------------------------------------
-- Function get_max_dwidth
--
-- This function is used to process the array specifying the data bus width
-- for each of the target modules. The dwidth_array is input to the function
-- and an integer is returned that is the largest value found of all the
-- entries in the array.
-----------------------------------------------------------------------------
function get_max_dwidth (dwidth_array: INTEGER_ARRAY_TYPE) return integer is
Variable temp_max : Integer := 0;
begin
for i in 0 to dwidth_array'length-1 loop
If (dwidth_array(i) > temp_max) Then
temp_max := dwidth_array(i);
else
null;
End if;
End loop;
return(temp_max);
end function get_max_dwidth;
-----------------------------------------------------------------------------
-- Function S32
--
-- This function is used to expand an input string to 32 characters by
-- padding with spaces. If the input string is larger than 32 characters,
-- it will truncate to 32 characters.
-----------------------------------------------------------------------------
function S32 (in_string : string) return string is
constant OUTPUT_STRING_LENGTH : integer := 32;
Constant space : character := ' ';
variable new_string : string(1 to 32);
Variable start_index : Integer := in_string'length+1;
begin
If (in_string'length < OUTPUT_STRING_LENGTH) Then
for i in 1 to in_string'length loop
new_string(i) := in_string(i);
End loop;
for j in start_index to OUTPUT_STRING_LENGTH loop
new_string(j) := space;
End loop;
else -- use first 32 chars of in_string (truncate the rest)
for k in 1 to OUTPUT_STRING_LENGTH loop
new_string(k) := in_string(k);
End loop;
End if;
return(new_string);
end function S32;
-----------------------------------------------------------------------------
-- Function get_id_index
--
-- This function is used to process the array specifying the target function
-- assigned to a Base Address pair address range. The id_array and a
-- id number is input to the function. A integer is returned reflecting the
-- array index of the id matching the id input number. This function
-- should only be called if the id number is known to exist in the
-- name_array input. This can be detirmined by using the find_ard_id
-- function.
-----------------------------------------------------------------------------
function get_id_index (id_array :INTEGER_ARRAY_TYPE;
id : integer) return integer is
Variable match : Boolean := false;
Variable match_index : Integer := 10000; -- a really big number!
begin
for array_index in 0 to id_array'length-1 loop
If (match = true) Then -- match already found so do nothing
null;
else -- compare the numbers one by one
match := (id_array(array_index) = id);
If (match) Then
match_index := array_index;
else
null;
End if;
End if;
End loop;
return(match_index);
end function get_id_index;
--------------------------------------------------------------------------------
-- get_id_index but return a value in bounds on error (iboe).
--
-- This function is the same as get_id_index, except that when id does
-- not exist in id_array, the value returned is any index that is
-- within the index range of id_array.
--
-- This function would normally only be used where function find_ard_id
-- is used to establish the existence of id but, even when non-existent,
-- an element of one of the ARD arrays will be computed from the
-- returned get_id_index_iboe value. See, e.g., function bits_needed_for_vac
-- and the example call, below
--
-- bits_needed_for_vac(
-- find_ard_id(C_ARD_ID_ARRAY, IPIF_RDFIFO_DATA),
-- C_ARD_DEPENDENT_PROPS_ARRAY(get_id_index_iboe(C_ARD_ID_ARRAY,
-- IPIF_RDFIFO_DATA))
-- )
--------------------------------------------------------------------------------
function get_id_index_iboe (id_array :INTEGER_ARRAY_TYPE;
id : integer) return integer is
Variable match : Boolean := false;
Variable match_index : Integer := id_array'left; -- any valid array index
begin
for array_index in 0 to id_array'length-1 loop
If (match = true) Then -- match already found so do nothing
null;
else -- compare the numbers one by one
match := (id_array(array_index) = id);
If (match) Then match_index := array_index;
else null;
End if;
End if;
End loop;
return(match_index);
end function get_id_index_iboe;
-----------------------------------------------------------------------------
-- Function find_ard_id
--
-- This function is used to process the array specifying the target function
-- assigned to a Base Address pair address range. The id_array and a
-- integer id is input to the function. A boolean is returned reflecting the
-- presence (or not) of a number in the array matching the id input number.
-----------------------------------------------------------------------------
function find_ard_id (id_array : INTEGER_ARRAY_TYPE;
id : integer) return boolean is
Variable match : Boolean := false;
begin
for array_index in 0 to id_array'length-1 loop
If (match = true) Then -- match already found so do nothing
null;
else -- compare the numbers one by one
match := (id_array(array_index) = id);
End if;
End loop;
return(match);
end function find_ard_id;
-----------------------------------------------------------------------------
-- Function find_id_dwidth
--
-- This function is used to find the data width of a target module. If the
-- target module exists, the data width is extracted from the input dwidth
-- array. If the module is not in the ID array, the default input is
-- returned. This function is needed to assign data port size constraints on
-- unconstrained port widths.
-----------------------------------------------------------------------------
function find_id_dwidth (id_array : INTEGER_ARRAY_TYPE;
dwidth_array: INTEGER_ARRAY_TYPE;
id : integer;
default : integer) return integer is
Variable id_present : Boolean := false;
Variable array_index : Integer := 0;
Variable dwidth : Integer := default;
begin
id_present := find_ard_id(id_array, id);
If (id_present) Then
array_index := get_id_index (id_array, id);
dwidth := dwidth_array(array_index);
else
null; -- use default input
End if;
Return (dwidth);
end function find_id_dwidth;
-----------------------------------------------------------------------------
-- Function cnt_ipif_id_blks
--
-- This function is used to detirmine the number of IPIF components specified
-- in the ARD ID Array. An integer is returned representing the number
-- of elements counted. User IDs are ignored in the counting process.
-----------------------------------------------------------------------------
function cnt_ipif_id_blks (id_array : INTEGER_ARRAY_TYPE)
return integer is
Variable blk_count : integer := 0;
Variable temp_id : integer;
begin
for array_index in 0 to id_array'length-1 loop
temp_id := id_array(array_index);
If (temp_id = IPIF_WRFIFO_DATA or
temp_id = IPIF_RDFIFO_DATA or
temp_id = IPIF_RST or
temp_id = IPIF_INTR or
temp_id = IPIF_DMA_SG or
temp_id = IPIF_SESR_SEAR
) Then -- IPIF block found
blk_count := blk_count+1;
else -- go to next loop iteration
null;
End if;
End loop;
return(blk_count);
end function cnt_ipif_id_blks;
-----------------------------------------------------------------------------
-- Function get_ipif_id_dbus_index
--
-- This function is used to detirmine the IPIF relative index of a given
-- ID value. User IDs are ignored in the index detirmination.
-----------------------------------------------------------------------------
function get_ipif_id_dbus_index (id_array : INTEGER_ARRAY_TYPE;
id : integer)
return integer is
Variable blk_index : integer := 0;
Variable temp_id : integer;
Variable id_found : Boolean := false;
begin
for array_index in 0 to id_array'length-1 loop
temp_id := id_array(array_index);
If (id_found) then
null;
elsif (temp_id = id) then
id_found := true;
elsif (temp_id = IPIF_WRFIFO_DATA or
temp_id = IPIF_RDFIFO_DATA or
temp_id = IPIF_RST or
temp_id = IPIF_INTR or
temp_id = IPIF_DMA_SG or
temp_id = IPIF_SESR_SEAR
) Then -- IPIF block found
blk_index := blk_index+1;
else -- user block so do nothing
null;
End if;
End loop;
return(blk_index);
end function get_ipif_id_dbus_index;
------------------------------------------------------------------------------
-- Function: rebuild_slv32_array
--
-- Description:
-- This function takes an input slv32 array and rebuilds an output slv32
-- array composed of the first "num_valid_entry" elements from the input
-- array.
------------------------------------------------------------------------------
function rebuild_slv32_array (slv32_array : SLV32_ARRAY_TYPE;
num_valid_pairs : integer)
return SLV32_ARRAY_TYPE is
--Constants
constant num_elements : Integer := num_valid_pairs * 2;
-- Variables
variable temp_baseaddr32_array : SLV32_ARRAY_TYPE( 0 to num_elements-1);
begin
for array_index in 0 to num_elements-1 loop
temp_baseaddr32_array(array_index) := slv32_array(array_index);
end loop;
return(temp_baseaddr32_array);
end function rebuild_slv32_array;
------------------------------------------------------------------------------
-- Function: rebuild_slv64_array
--
-- Description:
-- This function takes an input slv64 array and rebuilds an output slv64
-- array composed of the first "num_valid_entry" elements from the input
-- array.
------------------------------------------------------------------------------
function rebuild_slv64_array (slv64_array : SLV64_ARRAY_TYPE;
num_valid_pairs : integer)
return SLV64_ARRAY_TYPE is
--Constants
constant num_elements : Integer := num_valid_pairs * 2;
-- Variables
variable temp_baseaddr64_array : SLV64_ARRAY_TYPE( 0 to num_elements-1);
begin
for array_index in 0 to num_elements-1 loop
temp_baseaddr64_array(array_index) := slv64_array(array_index);
end loop;
return(temp_baseaddr64_array);
end function rebuild_slv64_array;
------------------------------------------------------------------------------
-- Function: rebuild_int_array
--
-- Description:
-- This function takes an input integer array and rebuilds an output integer
-- array composed of the first "num_valid_entry" elements from the input
-- array.
------------------------------------------------------------------------------
function rebuild_int_array (int_array : INTEGER_ARRAY_TYPE;
num_valid_entry : integer)
return INTEGER_ARRAY_TYPE is
-- Variables
variable temp_int_array : INTEGER_ARRAY_TYPE( 0 to num_valid_entry-1);
begin
for array_index in 0 to num_valid_entry-1 loop
temp_int_array(array_index) := int_array(array_index);
end loop;
return(temp_int_array);
end function rebuild_int_array;
function bits_needed_for_vac(
fifo_present: boolean;
dependent_props : DEPENDENT_PROPS_TYPE
) return integer is
begin
if not fifo_present then
return 1; -- Zero would be better but leads to "0 to -1" null
-- ranges that are not handled by XST Flint or earlier
-- because of the negative index.
else
return
log2(1 + dependent_props(FIFO_CAPACITY_BITS) /
dependent_props(RD_WIDTH_BITS)
);
end if;
end function bits_needed_for_vac;
function bits_needed_for_occ(
fifo_present: boolean;
dependent_props : DEPENDENT_PROPS_TYPE
) return integer is
begin
if not fifo_present then
return 1; -- Zero would be better but leads to "0 to -1" null
-- ranges that are not handled by XST Flint or earlier
-- because of the negative index.
else
return
log2(1 + dependent_props(FIFO_CAPACITY_BITS) /
dependent_props(WR_WIDTH_BITS)
);
end if;
end function bits_needed_for_occ;
function eff_dp(id : integer;
dep_prop : integer;
value : integer) return integer is
variable dp : integer := dep_prop;
type bo2na_type is array (boolean) of natural;
constant bo2na : bo2na_type := (0, 1);
begin
if value /= 0 then return value; end if; -- Not default
case id is
when IPIF_CHDMA_CHANNELS =>
-------------------
return( bo2na(dp = CLK_PERIOD_PS ) * 10000
+ bo2na(dp = PACKET_WAIT_UNIT_NS ) * 1000000
+ bo2na(dp = BURST_SIZE ) * 16
);
when others => return 0;
end case;
end eff_dp;
function populate_intr_mode_array (num_user_intr : integer;
intr_capture_mode : integer)
return INTEGER_ARRAY_TYPE is
variable intr_mode_array : INTEGER_ARRAY_TYPE(0 to num_user_intr-1);
begin
for i in 0 to num_user_intr-1 loop
intr_mode_array(i) := intr_capture_mode;
end loop;
return intr_mode_array;
end function populate_intr_mode_array;
function add_intr_ard_id_array(include_intr : boolean;
ard_id_array : INTEGER_ARRAY_TYPE)
return INTEGER_ARRAY_TYPE is
variable intr_ard_id_array : INTEGER_ARRAY_TYPE(0 to ard_id_array'length);
begin
intr_ard_id_array(0 to ard_id_array'length-1) := ard_id_array;
if include_intr then
intr_ard_id_array(ard_id_array'length) := IPIF_INTR;
return intr_ard_id_array;
else
return ard_id_array;
end if;
end function add_intr_ard_id_array;
function add_intr_ard_addr_range_array(include_intr : boolean;
ZERO_ADDR_PAD : std_logic_vector;
intr_baseaddr : std_logic_vector;
intr_highaddr : std_logic_vector;
ard_id_array : INTEGER_ARRAY_TYPE;
ard_addr_range_array : SLV64_ARRAY_TYPE)
return SLV64_ARRAY_TYPE is
variable intr_ard_addr_range_array : SLV64_ARRAY_TYPE(0 to ard_addr_range_array'length+1);
begin
intr_ard_addr_range_array(0 to ard_addr_range_array'length-1) := ard_addr_range_array;
if include_intr then
intr_ard_addr_range_array(2*get_id_index(ard_id_array,IPIF_INTR))
:= ZERO_ADDR_PAD & intr_baseaddr;
intr_ard_addr_range_array(2*get_id_index(ard_id_array,IPIF_INTR)+1)
:= ZERO_ADDR_PAD & intr_highaddr;
return intr_ard_addr_range_array;
else
return ard_addr_range_array;
end if;
end function add_intr_ard_addr_range_array;
function add_intr_ard_dwidth_array(include_intr : boolean;
intr_dwidth : integer;
ard_id_array : INTEGER_ARRAY_TYPE;
ard_dwidth_array : INTEGER_ARRAY_TYPE)
return INTEGER_ARRAY_TYPE is
variable intr_ard_dwidth_array : INTEGER_ARRAY_TYPE(0 to ard_dwidth_array'length);
begin
intr_ard_dwidth_array(0 to ard_dwidth_array'length-1) := ard_dwidth_array;
if include_intr then
intr_ard_dwidth_array(get_id_index(ard_id_array, IPIF_INTR)) := intr_dwidth;
return intr_ard_dwidth_array;
else
return ard_dwidth_array;
end if;
end function add_intr_ard_dwidth_array;
function add_intr_ard_num_ce_array(include_intr : boolean;
ard_id_array : INTEGER_ARRAY_TYPE;
ard_num_ce_array : INTEGER_ARRAY_TYPE)
return INTEGER_ARRAY_TYPE is
variable intr_ard_num_ce_array : INTEGER_ARRAY_TYPE(0 to ard_num_ce_array'length);
begin
intr_ard_num_ce_array(0 to ard_num_ce_array'length-1) := ard_num_ce_array;
if include_intr then
intr_ard_num_ce_array(get_id_index(ard_id_array, IPIF_INTR)) := 16;
return intr_ard_num_ce_array;
else
return ard_num_ce_array;
end if;
end function add_intr_ard_num_ce_array;
end package body ipif_pkg;
|
------------------------------------------------------------------------------
-- This file is a part of the GRLIB VHDL IP LIBRARY
-- Copyright (C) 2003 - 2008, Gaisler Research
-- Copyright (C) 2008 - 2014, Aeroflex Gaisler
-- Copyright (C) 2015, Cobham Gaisler
--
-- This program is free software; you can redistribute it and/or modify
-- it under the terms of the GNU General Public License as published by
-- the Free Software Foundation; either version 2 of the License, or
-- (at your option) any later version.
--
-- This program is distributed in the hope that it will be useful,
-- but WITHOUT ANY WARRANTY; without even the implied warranty of
-- MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
-- GNU General Public License for more details.
--
-- You should have received a copy of the GNU General Public License
-- along with this program; if not, write to the Free Software
-- Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
-----------------------------------------------------------------------------
-- Entity: sgmii
-- File: sgmii.vhd
-- Author: Fredrik Ringhage - Aeroflex Gaisler
-- Description: GMII to SGMII interface
------------------------------------------------------------------------------
--------------------------------------------------------------------------------
-- Description: This is the top level vhdl example design for the
-- Ethernet 1000BASE-X PCS/PMA core.
--
-- This design example instantiates IOB flip-flops
-- and input/output buffers on the GMII.
--
-- A Transmitter Elastic Buffer is instantiated on the Tx
-- GMII path to perform clock compenstation between the
-- core and the external MAC driving the Tx GMII.
--
-- This design example can be synthesised.
--
--
--
-- ----------------------------------------------------------------
-- | Example Design |
-- | |
-- | ---------------------------------------------- |
-- | | Core Block (wrapper) | |
-- | | | |
-- | | -------------- -------------- | |
-- | | | Core | | tranceiver | | |
-- | | | | | | | |
-- | --------- | | | | | | |
-- | | | | | | | | | |
-- | | Tx | | | | | | | |
-- ---->|Elastic|----->| GMII |--------->| TXP |--------->
-- | |Buffer | | | Tx | | TXN | | |
-- | | | | | | | | | |
-- | --------- | | | | | | |
-- | GMII | | | | | | |
-- | IOBs | | | | | | |
-- | | | | | | | |
-- | | | GMII | | RXP | | |
-- <-------------------| Rx |<---------| RXN |<---------
-- | | | | | | | |
-- | | -------------- -------------- | |
-- | | | |
-- | ---------------------------------------------- |
-- | |
-- ----------------------------------------------------------------
--
--------------------------------------------------------------------------------
library ieee;
use ieee.std_logic_1164.all;
use ieee.numeric_std.all;
library gaisler;
use gaisler.net.all;
use gaisler.misc.all;
library grlib;
use grlib.config_types.all;
use grlib.config.all;
use grlib.amba.all;
use grlib.stdlib.all;
use grlib.devices.all;
library techmap;
use techmap.gencomp.all;
use techmap.allclkgen.all;
library techmap;
use techmap.gencomp.all;
use techmap.allclkgen.all;
library eth;
use eth.grethpkg.all;
library unisim;
use unisim.vcomponents.all;
--------------------------------------------------------------------------------
-- The entity declaration for the example design
--------------------------------------------------------------------------------
entity sgmii_vc707 is
generic(
pindex : integer := 0;
paddr : integer := 0;
pmask : integer := 16#fff#;
abits : integer := 8;
autonegotiation : integer := 1;
pirq : integer := 0;
debugmem : integer := 0;
tech : integer := 0;
simulation : integer := 0
);
port(
-- Tranceiver Interface
sgmiii : in eth_sgmii_in_type;
sgmiio : out eth_sgmii_out_type;
-- GMII Interface (client MAC <=> PCS)
gmiii : out eth_in_type;
gmiio : in eth_out_type;
-- Asynchronous reset for entire core.
reset : in std_logic;
-- APB Status bus
apb_clk : in std_logic;
apb_rstn : in std_logic;
apbi : in apb_slv_in_type;
apbo : out apb_slv_out_type
);
end sgmii_vc707;
architecture top_level of sgmii_vc707 is
------------------------------------------------------------------------------
-- Component Declaration for the Core Block (core wrapper).
------------------------------------------------------------------------------
component sgmii
port(
-- Transceiver Interface
------------------------
gtrefclk : in std_logic; -- Very high quality 125MHz clock for GT transceiver
txp : out std_logic; -- Differential +ve of serial transmission from PMA to PMD.
txn : out std_logic; -- Differential -ve of serial transmission from PMA to PMD.
rxp : in std_logic; -- Differential +ve for serial reception from PMD to PMA.
rxn : in std_logic; -- Differential -ve for serial reception from PMD to PMA.
resetdone : out std_logic; -- The GT transceiver has completed its reset cycle
cplllock : out std_logic;
txoutclk : out std_logic; -- txoutclk from GT transceiver (62.5MHz)
rxoutclk : out std_logic; -- txoutclk from GT transceiver (62.5MHz)
userclk : in std_logic; -- 62.5MHz clock.
userclk2 : in std_logic; -- 125MHz clock.
rxuserclk : in std_logic; -- 125MHz clock.
rxuserclk2 : in std_logic; -- 125MHz clock.
independent_clock_bufg : in std_logic;
pma_reset : in std_logic; -- transceiver PMA reset signal
mmcm_locked : in std_logic; -- Locked signal from MMCM
-- GMII Interface
-----------------
sgmii_clk_r : out std_logic; -- Clock for client MAC (125Mhz, 12.5MHz or 1.25MHz).
sgmii_clk_f : out std_logic; -- Clock for client MAC (125Mhz, 12.5MHz or 1.25MHz).
sgmii_clk_en : out std_logic; -- Clock enable for client MAC
gmii_txd : in std_logic_vector(7 downto 0); -- Transmit data from client MAC.
gmii_tx_en : in std_logic; -- Transmit control signal from client MAC.
gmii_tx_er : in std_logic; -- Transmit control signal from client MAC.
gmii_rxd : out std_logic_vector(7 downto 0); -- Received Data to client MAC.
gmii_rx_dv : out std_logic; -- Received control signal to client MAC.
gmii_rx_er : out std_logic; -- Received control signal to client MAC.
gmii_isolate : out std_logic; -- Tristate control to electrically isolate GMII.
-- Management: MDIO Interface
-----------------------------
configuration_vector : in std_logic_vector(4 downto 0); -- Alternative to MDIO interface.
an_interrupt : out std_logic; -- Interrupt to processor to signal that Auto-Negotiation has completed
an_adv_config_vector : in std_logic_vector(15 downto 0); -- Alternate interface to program REG4 (AN ADV)
an_restart_config : in std_logic; -- Alternate signal to modify AN restart bit in REG0
-- Speed Control
----------------
speed_is_10_100 : in std_logic; -- Core should operate at either 10Mbps or 100Mbps speeds
speed_is_100 : in std_logic; -- Core should operate at 100Mbps speed
-- General IO's
---------------
status_vector : out std_logic_vector(15 downto 0); -- Core status.
reset : in std_logic; -- Asynchronous reset for entire core.
signal_detect : in std_logic; -- Input from PMD to indicate presence of optical input.
gt0_qplloutclk_in : in std_logic; -- Input from PMD to indicate presence of optical input.
gt0_qplloutrefclk_in : in std_logic -- Input from PMD to indicate presence of optical input.
);
end component;
component MMCME2_ADV
generic (
BANDWIDTH : string := "OPTIMIZED";
CLKFBOUT_MULT_F : real := 5.000;
CLKFBOUT_PHASE : real := 0.000;
--CLKFBOUT_USE_FINE_PS : boolean := FALSE;
CLKIN1_PERIOD : real := 0.000;
CLKIN2_PERIOD : real := 0.000;
CLKOUT0_DIVIDE_F : real := 1.000;
CLKOUT0_DUTY_CYCLE : real := 0.500;
CLKOUT0_PHASE : real := 0.000;
--CLKOUT0_USE_FINE_PS : boolean := FALSE;
CLKOUT1_DIVIDE : integer := 1;
CLKOUT1_DUTY_CYCLE : real := 0.500;
CLKOUT1_PHASE : real := 0.000;
--CLKOUT1_USE_FINE_PS : boolean := FALSE;
CLKOUT2_DIVIDE : integer := 1;
CLKOUT2_DUTY_CYCLE : real := 0.500;
CLKOUT2_PHASE : real := 0.000;
--CLKOUT2_USE_FINE_PS : boolean := FALSE;
CLKOUT3_DIVIDE : integer := 1;
CLKOUT3_DUTY_CYCLE : real := 0.500;
CLKOUT3_PHASE : real := 0.000;
--CLKOUT3_USE_FINE_PS : boolean := FALSE;
--CLKOUT4_CASCADE : boolean := FALSE;
CLKOUT4_DIVIDE : integer := 1;
CLKOUT4_DUTY_CYCLE : real := 0.500;
CLKOUT4_PHASE : real := 0.000;
--CLKOUT4_USE_FINE_PS : boolean := FALSE;
CLKOUT5_DIVIDE : integer := 1;
CLKOUT5_DUTY_CYCLE : real := 0.500;
CLKOUT5_PHASE : real := 0.000;
--CLKOUT5_USE_FINE_PS : boolean := FALSE;
CLKOUT6_DIVIDE : integer := 1;
CLKOUT6_DUTY_CYCLE : real := 0.500;
CLKOUT6_PHASE : real := 0.000;
--CLKOUT6_USE_FINE_PS : boolean := FALSE;
COMPENSATION : string := "ZHOLD";
DIVCLK_DIVIDE : integer := 1;
REF_JITTER1 : real := 0.0;
REF_JITTER2 : real := 0.0;
--SS_EN : string := "FALSE";
SS_MODE : string := "CENTER_HIGH";
SS_MOD_PERIOD : integer := 10000
);
port (
CLKFBOUT : out std_ulogic := '0';
CLKFBOUTB : out std_ulogic := '0';
CLKFBSTOPPED : out std_ulogic := '0';
CLKINSTOPPED : out std_ulogic := '0';
CLKOUT0 : out std_ulogic := '0';
CLKOUT0B : out std_ulogic := '0';
CLKOUT1 : out std_ulogic := '0';
CLKOUT1B : out std_ulogic := '0';
CLKOUT2 : out std_ulogic := '0';
CLKOUT2B : out std_ulogic := '0';
CLKOUT3 : out std_ulogic := '0';
CLKOUT3B : out std_ulogic := '0';
CLKOUT4 : out std_ulogic := '0';
CLKOUT5 : out std_ulogic := '0';
CLKOUT6 : out std_ulogic := '0';
DO : out std_logic_vector (15 downto 0);
DRDY : out std_ulogic := '0';
LOCKED : out std_ulogic := '0';
PSDONE : out std_ulogic := '0';
CLKFBIN : in std_ulogic;
CLKIN1 : in std_ulogic;
CLKIN2 : in std_ulogic;
CLKINSEL : in std_ulogic;
DADDR : in std_logic_vector(6 downto 0);
DCLK : in std_ulogic;
DEN : in std_ulogic;
DI : in std_logic_vector(15 downto 0);
DWE : in std_ulogic;
PSCLK : in std_ulogic;
PSEN : in std_ulogic;
PSINCDEC : in std_ulogic;
PWRDWN : in std_ulogic;
RST : in std_ulogic
);
end component;
----- component IBUFDS_GTE2 -----
component IBUFDS_GTE2
port (
O : out std_ulogic;
ODIV2 : out std_ulogic;
CEB : in std_ulogic;
I : in std_ulogic;
IB : in std_ulogic
);
end component;
----- component BUFHCE -----
component BUFHCE
generic (
CE_TYPE : string := "SYNC";
INIT_OUT : integer := 0
);
port (
O : out std_ulogic;
CE : in std_ulogic;
I : in std_ulogic
);
end component;
----- component BUFGMUX -----
component BUFGMUX
generic (
CLK_SEL_TYPE : string := "ASYNC"
);
port (
O : out std_ulogic := '0';
I0 : in std_ulogic := '0';
I1 : in std_ulogic := '0';
S : in std_ulogic := '0'
);
end component;
----- component ODDR -----
component ODDR
generic (
DDR_CLK_EDGE : string := "OPPOSITE_EDGE";
INIT : bit := '0';
SRTYPE : string := "SYNC"
);
port (
Q : out std_ulogic;
C : in std_ulogic;
CE : in std_ulogic;
D1 : in std_ulogic;
D2 : in std_ulogic;
R : in std_ulogic := 'L';
S : in std_ulogic := 'L'
);
end component;
constant REVISION : integer := 1;
constant pconfig : apb_config_type := (
0 => ahb_device_reg ( VENDOR_GAISLER, GAISLER_SGMII, 0, REVISION, pirq),
1 => apb_iobar(paddr, pmask));
type sgmiiregs is record
irq : std_logic_vector(31 downto 0); -- interrupt
mask : std_logic_vector(31 downto 0); -- interrupt enable
configuration_vector : std_logic_vector( 4 downto 0);
an_adv_config_vector : std_logic_vector(15 downto 0);
end record;
-- APB and RGMII control register
constant RESET_ALL : boolean := GRLIB_CONFIG_ARRAY(grlib_sync_reset_enable_all) = 1;
constant RES_configuration_vector : std_logic_vector(4 downto 0) := std_logic_vector(to_unsigned(autonegotiation,1)) & "0000";
constant RES : sgmiiregs :=
( irq => (others => '0'), mask => (others => '0'),
configuration_vector => RES_configuration_vector, an_adv_config_vector => "0001100000000001");
type rxregs is record
gmii_rxd : std_logic_vector(7 downto 0);
gmii_rxd_int : std_logic_vector(7 downto 0);
gmii_rx_dv : std_logic;
gmii_rx_er : std_logic;
count : integer;
gmii_dv : std_logic;
keepalive : integer;
end record;
constant RESRX : rxregs :=
( gmii_rxd => (others => '0'), gmii_rxd_int => (others => '0'),
gmii_rx_dv => '0', gmii_rx_er => '0',
count => 0, gmii_dv => '0', keepalive => 0
);
type txregs is record
gmii_txd : std_logic_vector(7 downto 0);
gmii_txd_int : std_logic_vector(7 downto 0);
gmii_tx_en : std_logic;
gmii_tx_en_int : std_logic;
gmii_tx_er : std_logic;
count : integer;
cnt_en : std_logic;
keepalive : integer;
end record;
constant RESTX : txregs :=
( gmii_txd => (others => '0'), gmii_txd_int => (others => '0'),
gmii_tx_en => '0', gmii_tx_en_int => '0', gmii_tx_er => '0',
count => 0, cnt_en => '0', keepalive => 0
);
------------------------------------------------------------------------------
-- internal signals used in this top level example design.
------------------------------------------------------------------------------
-- clock generation signals for tranceiver
signal gtrefclk : std_logic;
signal txoutclk : std_logic;
signal rxoutclk : std_logic;
signal resetdone : std_logic;
signal mmcm_locked : std_logic;
signal mmcm_reset : std_logic;
signal clkfbout : std_logic;
signal clkout0 : std_logic;
signal clkout1 : std_logic;
signal userclk : std_logic;
signal userclk2 : std_logic;
signal rxuserclk : std_logic;
-- PMA reset generation signals for tranceiver
signal pma_reset_pipe : std_logic_vector(3 downto 0);
signal pma_reset : std_logic;
-- clock generation signals for SGMII clock
signal sgmii_clk_r : std_logic;
signal sgmii_clk_f : std_logic;
signal sgmii_clk_en : std_logic;
-- GMII signals
signal gmii_txd : std_logic_vector(7 downto 0);
signal gmii_tx_en : std_logic;
signal gmii_tx_er : std_logic;
signal gmii_rxd : std_logic_vector(7 downto 0);
signal gmii_rx_dv : std_logic;
signal gmii_rx_er : std_logic;
signal gmii_isolate : std_logic;
-- Internal GMII signals from Xilinx SGMII block
signal gmii_rxd_int : std_logic_vector(7 downto 0);
signal gmii_rx_dv_int : std_logic;
signal gmii_rx_er_int : std_logic;
-- Extra registers to ease IOB placement
signal status_vector_int : std_logic_vector(15 downto 0);
signal status_vector_apb : std_logic_vector(15 downto 0);
signal status_vector_apb1 : std_logic_vector(31 downto 0);
signal status_vector_apb2 : std_logic_vector(31 downto 0);
-- These attributes will stop timing errors being reported in back annotated
-- SDF simulation.
attribute ASYNC_REG : string;
attribute ASYNC_REG of pma_reset_pipe : signal is "TRUE";
-- Configuration register
signal speed_is_10_100 : std_logic;
signal speed_is_100 : std_logic;
signal configuration_vector : std_logic_vector(4 downto 0);
signal an_interrupt : std_logic;
signal an_adv_config_vector : std_logic_vector(15 downto 0);
signal an_restart_config : std_logic;
signal link_timer_value : std_logic_vector(8 downto 0);
signal synchronization_done : std_logic;
signal linkup : std_logic;
signal signal_detect : std_logic;
-- Route gtrefclk through an IBUFG.
signal gtrefclk_buf_i : std_logic;
signal r, rin : sgmiiregs;
signal rrx,rinrx : rxregs;
signal rtx, rintx : txregs;
signal cnt_en : std_logic;
signal usr2rstn : std_logic;
-- debug signal
signal WMemRgmiioData : std_logic_vector(15 downto 0);
signal RMemRgmiioData : std_logic_vector(15 downto 0);
signal RMemRgmiioAddr : std_logic_vector(9 downto 0);
signal WMemRgmiioAddr : std_logic_vector(9 downto 0);
signal WMemRgmiioWrEn : std_logic;
signal WMemRgmiiiData : std_logic_vector(15 downto 0);
signal RMemRgmiiiData : std_logic_vector(15 downto 0);
signal RMemRgmiiiAddr : std_logic_vector(9 downto 0);
signal WMemRgmiiiAddr : std_logic_vector(9 downto 0);
signal WMemRgmiiiWrEn : std_logic;
signal RMemRgmiiiRead : std_logic;
signal RMemRgmiioRead : std_logic;
begin
-----------------------------------------------------------------------------
-- Default for VC707
-----------------------------------------------------------------------------
-- Remove AN during simulation i.e. "00000"
configuration_vector <= "10000" when (autonegotiation = 1) else "00000";
-- Configuration for Xilinx SGMII IP. See doc for SGMII IP for more information
an_adv_config_vector <= "0001100000000001";
an_restart_config <= '0';
link_timer_value <= "000110010";
-- Core Status vector outputs
synchronization_done <= status_vector_int(1);
linkup <= status_vector_int(0);
signal_detect <= '1';
gmiii.gtx_clk <= userclk2;
gmiii.tx_clk <= userclk2;
gmiii.rx_clk <= userclk2;
gmiii.rmii_clk <= userclk2;
gmiii.rxd <= gmii_rxd;
gmiii.rx_dv <= gmii_rx_dv;
gmiii.rx_er <= gmii_rx_er;
gmiii.rx_en <= gmii_rx_dv or sgmii_clk_en;
--gmiii.tx_dv <= '1';
gmiii.tx_dv <= cnt_en when gmiio.tx_en = '1' else '1';
-- GMII output controlled via generics
gmiii.edclsepahb <= '0';
gmiii.edcldisable <= '0';
gmiii.phyrstaddr <= (others => '0');
gmiii.edcladdr <= (others => '0');
-- Not used
gmiii.rx_col <= '0';
gmiii.rx_crs <= '0';
gmiii.tx_clk_90 <= '0';
sgmiio.mdio_o <= gmiio.mdio_o;
sgmiio.mdio_oe <= gmiio.mdio_oe;
gmiii.mdio_i <= sgmiii.mdio_i;
sgmiio.mdc <= gmiio.mdc;
gmiii.mdint <= sgmiii.mdint;
sgmiio.reset <= apb_rstn;
-----------------------------------------------------------------------------
-- Transceiver Clock Management
-----------------------------------------------------------------------------
sgmii1 : if simulation = 1 generate
end generate;
sgmii0 : if simulation = 0 generate
-- Clock circuitry for the GT Transceiver uses a differential input clock.
-- gtrefclk is routed to the tranceiver.
ibufds_gtrefclk : IBUFDS_GTE2
port map (
I => sgmiii.clkp,
IB => sgmiii.clkn,
CEB => '0',
O => gtrefclk_buf_i,
ODIV2 => open
);
bufhce_gtrefclk : BUFHCE
port map (
I => gtrefclk_buf_i,
CE => '1',
O => gtrefclk
);
-- The GT transceiver provides a 62.5MHz clock to the FPGA fabrix. This is
-- routed to an MMCM module where it is used to create phase and frequency
-- related 62.5MHz and 125MHz clock sources
mmcm_adv_inst : MMCME2_ADV
generic map
(BANDWIDTH => "OPTIMIZED",
--CLKOUT4_CASCADE => FALSE,
COMPENSATION => "ZHOLD",
-- STARTUP_WAIT => FALSE,
DIVCLK_DIVIDE => 1,
CLKFBOUT_MULT_F => 16.000,
CLKFBOUT_PHASE => 0.000,
--CLKFBOUT_USE_FINE_PS => FALSE,
CLKOUT0_DIVIDE_F => 8.000,
CLKOUT0_PHASE => 0.000,
CLKOUT0_DUTY_CYCLE => 0.5,
--CLKOUT0_USE_FINE_PS => FALSE,
CLKOUT1_DIVIDE => 16,
CLKOUT1_PHASE => 0.000,
CLKOUT1_DUTY_CYCLE => 0.5,
--CLKOUT1_USE_FINE_PS => FALSE,
CLKIN1_PERIOD => 16.0,
REF_JITTER1 => 0.010)
port map
-- Output clocks
(CLKFBOUT => clkfbout,
CLKFBOUTB => open,
CLKOUT0 => clkout0,
CLKOUT0B => open,
CLKOUT1 => clkout1,
CLKOUT1B => open,
CLKOUT2 => open,
CLKOUT2B => open,
CLKOUT3 => open,
CLKOUT3B => open,
CLKOUT4 => open,
CLKOUT5 => open,
CLKOUT6 => open,
-- Input clock control
CLKFBIN => clkfbout,
CLKIN1 => txoutclk,
CLKIN2 => '0',
-- Tied to always select the primary input clock
CLKINSEL => '1',
-- Ports for dynamic reconfiguration
DADDR => (others => '0'),
DCLK => '0',
DEN => '0',
DI => (others => '0'),
DO => open,
DRDY => open,
DWE => '0',
-- Ports for dynamic phase shift
PSCLK => '0',
PSEN => '0',
PSINCDEC => '0',
PSDONE => open,
-- Other control and status signals
LOCKED => mmcm_locked,
CLKINSTOPPED => open,
CLKFBSTOPPED => open,
PWRDWN => '0',
RST => mmcm_reset);
--mmcm_reset <= reset or (not resetdone);
mmcm_reset <= reset;
-- This 62.5MHz clock is placed onto global clock routing and is then used
-- for tranceiver TXUSRCLK/RXUSRCLK.
bufg_userclk: BUFG
port map (
I => clkout1,
O => userclk
);
-- This 125MHz clock is placed onto global clock routing and is then used
-- to clock all Ethernet core logic.
bufg_userclk2: BUFG
port map (
I => clkout0,
O => userclk2
);
-- This 62.5MHz clock is placed onto global clock routing and is then used
-- for tranceiver TXUSRCLK/RXUSRCLK.
bufg_rxuserclk: BUFG
port map (
I => rxoutclk,
O => rxuserclk
);
end generate;
-----------------------------------------------------------------------------
-- Sync Reset for user clock
-----------------------------------------------------------------------------
userclk2_rst : rstgen
generic map(syncin => 1, syncrst => 1)
port map(apb_rstn, userclk2, '1', usr2rstn, open);
-----------------------------------------------------------------------------
-- Transceiver PMA reset circuitry
-----------------------------------------------------------------------------
-- Create a reset pulse of a decent length
process(reset, apb_clk)
begin
if (reset = '1') then
pma_reset_pipe <= "1111";
elsif apb_clk'event and apb_clk = '1' then
pma_reset_pipe <= pma_reset_pipe(2 downto 0) & reset;
end if;
end process;
pma_reset <= pma_reset_pipe(3);
------------------------------------------------------------------------------
-- GMII (Aeroflex Gaisler) to GMII (Xilinx) style
------------------------------------------------------------------------------
-- 10/100Mbit TX Loic
process (usr2rstn,rtx,gmiio)
variable v : txregs;
begin
v := rtx;
v.cnt_en := '0';
v.gmii_tx_en_int := gmiio.tx_en;
if (gmiio.tx_en = '1' and rtx.gmii_tx_en_int = '0') then
v.count := 0;
elsif (v.count >= 9) and gmiio.speed = '1' then
v.count := 0;
elsif (v.count >= 99) and gmiio.speed = '0' then
v.count := 0;
else
v.count := rtx.count + 1;
end if;
case v.count is
when 0 =>
v.gmii_txd_int(3 downto 0) := gmiio.txd(3 downto 0);
v.cnt_en := '1';
when 5 =>
if gmiio.speed = '1' then
v.gmii_txd_int(7 downto 4) := gmiio.txd(3 downto 0);
v.cnt_en := '1';
end if;
when 50=>
if gmiio.speed = '0' then
v.gmii_txd_int(7 downto 4) := gmiio.txd(3 downto 0);
v.cnt_en := '1';
end if;
when 9 =>
if gmiio.speed = '1' then
v.gmii_txd := v.gmii_txd_int;
v.gmii_tx_en := '1';
v.gmii_tx_er := gmiio.tx_er;
if (gmiio.tx_en = '0' and rtx.keepalive <= 1) then v.gmii_tx_en := '0'; end if;
if (rtx.keepalive > 0) then v.keepalive := rtx.keepalive - 1; end if;
end if;
when 99 =>
if gmiio.speed = '0' then
v.gmii_txd := v.gmii_txd_int;
v.gmii_tx_en := '1';
v.gmii_tx_er := gmiio.tx_er;
if (gmiio.tx_en = '0' and rtx.keepalive <= 1) then v.gmii_tx_en := '0'; end if;
if (rtx.keepalive > 0) then v.keepalive := rtx.keepalive - 1; end if;
end if;
when others =>
null;
end case;
if (gmiio.tx_en = '0' and rtx.gmii_tx_en_int = '1') then
v.keepalive := 2;
end if;
if (gmiio.tx_en = '0' and rtx.gmii_tx_en_int = '0' and rtx.keepalive = 0) then
v := RESTX;
end if;
-- reset operation
if (not RESET_ALL) and (usr2rstn = '0') then
v := RESTX;
end if;
-- update registers
rintx <= v;
end process;
txegs : process(userclk2)
begin
if rising_edge(userclk2) then
rtx <= rintx;
if RESET_ALL and usr2rstn = '0' then
rtx <= RESTX;
end if;
end if;
end process;
-- 1000Mbit TX Logic (Bypass)
-- n/a
-- TX Mux Select
cnt_en <= '1' when (gmiio.gbit = '1') else rtx.cnt_en;
gmii_txd <= gmiio.txd when (gmiio.gbit = '1') else rtx.gmii_txd;
gmii_tx_en <= gmiio.tx_en when (gmiio.gbit = '1') else rtx.gmii_tx_en;
gmii_tx_er <= gmiio.tx_er when (gmiio.gbit = '1') else rtx.gmii_tx_er;
------------------------------------------------------------------------------
-- Instantiate the Core Block (core wrapper).
------------------------------------------------------------------------------
speed_is_10_100 <= not gmiio.gbit;
speed_is_100 <= gmiio.speed;
core_wrapper : sgmii
port map (
gtrefclk => gtrefclk,
txp => sgmiio.txp,
txn => sgmiio.txn,
rxp => sgmiii.rxp,
rxn => sgmiii.rxn,
resetdone => resetdone,
cplllock => OPEN ,
txoutclk => txoutclk,
rxoutclk => rxoutclk ,
userclk => userclk,
userclk2 => userclk2,
rxuserclk => rxuserclk ,
rxuserclk2 => rxuserclk ,
independent_clock_bufg => apb_clk,
pma_reset => pma_reset,
mmcm_locked => mmcm_locked,
sgmii_clk_r => sgmii_clk_r,
sgmii_clk_f => sgmii_clk_f,
sgmii_clk_en => sgmii_clk_en,
gmii_txd => gmii_txd,
gmii_tx_en => gmii_tx_en,
gmii_tx_er => gmii_tx_er,
gmii_rxd => gmii_rxd_int,
gmii_rx_dv => gmii_rx_dv_int,
gmii_rx_er => gmii_rx_er_int,
gmii_isolate => gmii_isolate,
configuration_vector => configuration_vector,
an_interrupt => an_interrupt,
an_adv_config_vector => an_adv_config_vector,
an_restart_config => an_restart_config,
speed_is_10_100 => speed_is_10_100,
speed_is_100 => speed_is_100,
status_vector => status_vector_int,
reset => reset,
signal_detect => signal_detect,
gt0_qplloutclk_in => '0',
gt0_qplloutrefclk_in => '0'
);
------------------------------------------------------------------------------
-- GMII (Xilinx) to GMII (Aeroflex Gailers) style
------------------------------------------------------------------------------
---- 10/100Mbit RX Loic
process (usr2rstn,rrx,gmii_rx_dv_int,gmii_rxd_int,gmii_rx_er_int,sgmii_clk_en)
variable v : rxregs;
begin
v := rrx;
if (gmii_rx_dv_int = '1' and sgmii_clk_en = '1') then
v.count := 0;
v.gmii_rxd_int := gmii_rxd_int;
v.gmii_dv := '1';
v.keepalive := 1;
elsif (v.count >= 9) and gmiio.speed = '1' then
v.count := 0;
v.keepalive := rrx.keepalive - 1;
elsif (v.count >= 99) and gmiio.speed = '0' then
v.count := 0;
v.keepalive := rrx.keepalive - 1;
else
v.count := rrx.count + 1;
end if;
case v.count is
when 0 =>
v.gmii_rxd := v.gmii_rxd_int(3 downto 0) & v.gmii_rxd_int(3 downto 0);
v.gmii_rx_dv := v.gmii_dv;
when 5 =>
if gmiio.speed = '1' then
v.gmii_rxd := v.gmii_rxd_int(7 downto 4) & v.gmii_rxd_int(7 downto 4);
v.gmii_rx_dv := v.gmii_dv;
v.gmii_dv := '0';
end if;
when 50 =>
if gmiio.speed = '0' then
v.gmii_rxd := v.gmii_rxd_int(7 downto 4) & v.gmii_rxd_int(7 downto 4);
v.gmii_rx_dv := v.gmii_dv;
v.gmii_dv := '0';
end if;
when others =>
v.gmii_rxd := v.gmii_rxd;
v.gmii_rx_dv := '0';
end case;
v.gmii_rx_er := gmii_rx_er_int;
if (rrx.keepalive = 0 and gmii_rx_dv_int = '0') then
v := RESRX;
end if;
-- reset operation
if (not RESET_ALL) and (usr2rstn = '0') then
v := RESRX;
end if;
-- update registers
rinrx <= v;
end process;
rx100regs : process(userclk2)
begin
if rising_edge(userclk2) then
rrx <= rinrx;
if RESET_ALL and usr2rstn = '0' then
rrx <= RESRX;
end if;
end if;
end process;
---- 1000Mbit RX Logic (Bypass)
-- n/a
---- RX Mux Select
gmii_rxd <= gmii_rxd_int when (gmiio.gbit = '1') else rinrx.gmii_rxd;
gmii_rx_dv <= gmii_rx_dv_int when (gmiio.gbit = '1') else rinrx.gmii_rx_dv;
gmii_rx_er <= gmii_rx_er_int when (gmiio.gbit = '1') else rinrx.gmii_rx_er;
-----------------------------------------------------------------------------
-- Extra registers to ease CDC placement
-----------------------------------------------------------------------------
process (apb_clk)
begin
if apb_clk'event and apb_clk = '1' then
status_vector_apb <= status_vector_int;
end if;
end process;
---------------------------------------------------------------------------------------
-- APB Section
---------------------------------------------------------------------------------------
apbo.pindex <= pindex;
apbo.pconfig <= pconfig;
-- Extra registers to ease CDC placement
process (apb_clk)
begin
if apb_clk'event and apb_clk = '1' then
status_vector_apb1 <= (others => '0');
status_vector_apb2 <= (others => '0');
-- Register to detect a speed change
status_vector_apb1(15 downto 0) <= status_vector_apb;
status_vector_apb2 <= status_vector_apb1;
end if;
end process;
rgmiiapb : process(apb_rstn, r, apbi, status_vector_apb1, status_vector_apb2, RMemRgmiiiData, RMemRgmiiiRead, RMemRgmiioRead )
variable rdata : std_logic_vector(31 downto 0);
variable paddress : std_logic_vector(7 downto 2);
variable v : sgmiiregs;
begin
v := r;
paddress := (others => '0');
paddress(abits-1 downto 2) := apbi.paddr(abits-1 downto 2);
rdata := (others => '0');
-- read/write registers
if (apbi.psel(pindex) and apbi.penable and (not apbi.pwrite)) = '1' then
case paddress(7 downto 2) is
when "000000" =>
rdata(31 downto 0) := status_vector_apb2;
when "000001" =>
rdata(31 downto 0) := r.irq;
v.irq := (others => '0'); -- Interrupt is clear on read
when "000010" =>
rdata(31 downto 0) := r.mask;
when "000011" =>
rdata(4 downto 0) := r.configuration_vector;
when "000100" =>
rdata(15 downto 0) := r.an_adv_config_vector;
when "000101" =>
if (autonegotiation /= 0) then rdata(0) := '1'; else rdata(0) := '0'; end if;
if (debugmem /= 0) then rdata(1) := '1'; else rdata(1) := '0'; end if;
when others =>
null;
end case;
end if;
if (apbi.psel(pindex) and apbi.penable and apbi.pwrite) = '1' then
case paddress(7 downto 2) is
when "000000" =>
null;
when "000001" =>
null;
when "000010" =>
v.mask := apbi.pwdata(31 downto 0);
when "000011" =>
v.configuration_vector := apbi.pwdata(4 downto 0);
when "000100" =>
v.an_adv_config_vector := apbi.pwdata(15 downto 0);
when "000101" =>
null;
when others =>
null;
end case;
end if;
-- Check interrupts
for i in 0 to status_vector_apb2'length-1 loop
if ((status_vector_apb1(i) xor status_vector_apb2(i)) and v.mask(i)) = '1' then
v.irq(i) := '1';
end if;
end loop;
-- reset operation
if (not RESET_ALL) and (apb_rstn = '0') then
v := RES;
end if;
-- update registers
rin <= v;
-- drive outputs
if apbi.psel(pindex) = '0' then
apbo.prdata <= (others => '0');
elsif RMemRgmiiiRead = '1' then
apbo.prdata(31 downto 16) <= (others => '0');
apbo.prdata(15 downto 0) <= RMemRgmiiiData;
elsif RMemRgmiioRead = '1' then
apbo.prdata(31 downto 16) <= (others => '0');
apbo.prdata(15 downto 0) <= RMemRgmiioData;
else
apbo.prdata <= rdata;
end if;
apbo.pirq <= (others => '0');
apbo.pirq(pirq) <= orv(v.irq);
end process;
regs : process(apb_clk)
begin
if rising_edge(apb_clk) then
r <= rin;
if RESET_ALL and apb_rstn = '0' then
r <= RES;
end if;
end if;
end process;
---------------------------------------------------------------------------------------
-- Debug Mem
---------------------------------------------------------------------------------------
debugmem1 : if (debugmem /= 0) generate
-- Write GMII IN data
process (userclk2)
begin -- process
if rising_edge(userclk2) then
WMemRgmiioData(15 downto 0) <= '0' & '0' & '0' & sgmii_clk_en & '0' & '0' & gmii_tx_er & gmii_tx_en & gmii_txd;
if (gmii_tx_en = '1') and ((WMemRgmiioAddr < "0111111110") or (WMemRgmiioAddr = "1111111111")) then
WMemRgmiioAddr <= WMemRgmiioAddr + 1;
WMemRgmiioWrEn <= '1';
else
if (gmii_tx_en = '0') then
WMemRgmiioAddr <= (others => '1');
else
WMemRgmiioAddr <= WMemRgmiioAddr;
end if;
WMemRgmiioWrEn <= '0';
end if;
if usr2rstn = '0' then
WMemRgmiioAddr <= (others => '0');
WMemRgmiioWrEn <= '0';
end if;
end if;
end process;
-- Read
RMemRgmiioRead <= apbi.paddr(10) and apbi.psel(pindex);
RMemRgmiioAddr <= "00" & apbi.paddr(10-1 downto 2);
gmiii0 : syncram_2p generic map (tech, 10, 16, 1, 0, 0) port map(
apb_clk, RMemRgmiioRead, RMemRgmiioAddr, RMemRgmiioData,
userclk2, WMemRgmiioWrEn, WMemRgmiioAddr(10-1 downto 0), WMemRgmiioData);
-- Write GMII IN data
process (userclk2)
begin -- process
if rising_edge(userclk2) then
if (gmii_rx_dv = '1') then
WMemRgmiiiData(15 downto 0) <= '0' & '0' & '0' &sgmii_clk_en & "00" & gmii_rx_er & gmii_rx_dv & gmii_rxd;
elsif (gmii_rx_dv_int = '0') then
WMemRgmiiiData(15 downto 0) <= (others => '0');
else
WMemRgmiiiData <= WMemRgmiiiData;
end if;
if (gmii_rx_dv = '1') and ((WMemRgmiiiAddr < "0111111110") or (WMemRgmiiiAddr = "1111111111")) then
WMemRgmiiiAddr <= WMemRgmiiiAddr + 1;
WMemRgmiiiWrEn <= '1';
else
if (gmii_rx_dv_int = '0') then
WMemRgmiiiAddr <= (others => '1');
WMemRgmiiiWrEn <= '0';
else
WMemRgmiiiAddr <= WMemRgmiiiAddr;
WMemRgmiiiWrEn <= '0';
end if;
end if;
if usr2rstn = '0' then
WMemRgmiiiAddr <= (others => '0');
WMemRgmiiiWrEn <= '0';
end if;
end if;
end process;
-- Read
RMemRgmiiiRead <= apbi.paddr(11) and apbi.psel(pindex);
RMemRgmiiiAddr <= "00" & apbi.paddr(10-1 downto 2);
rgmiii0 : syncram_2p generic map (tech, 10, 16, 1, 0, 0) port map(
apb_clk, RMemRgmiiiRead, RMemRgmiiiAddr, RMemRgmiiiData,
userclk2, WMemRgmiiiWrEn, WMemRgmiiiAddr(10-1 downto 0), WMemRgmiiiData);
end generate;
-- pragma translate_off
bootmsg : report_version
generic map ("sgmii" & tost(pindex) &
": SGMII rev " & tost(REVISION) & ", irq " & tost(pirq));
-- pragma translate_on
end top_level;
|
----------------------------------------------------------------------------------
-- Company:
-- Engineer:
--
-- Create Date: 10:58:50 10/27/2009
-- Design Name:
-- Module Name: GenReg - Behavioral
-- Project Name:
-- Target Devices:
-- Tool versions:
-- Description:
--
-- Dependencies:
--
-- Revision:
-- Revision 0.01 - File Created
-- Revision 0.90 - File written and syntax checked. No simulation necessary
-- Additional Comments:
----------------------------------------------------------------------------------
library IEEE;
use IEEE.STD_LOGIC_1164.ALL;
use IEEE.STD_LOGIC_ARITH.ALL;
use IEEE.STD_LOGIC_UNSIGNED.ALL;
---- Uncomment the following library declaration if instantiating
---- any Xilinx primitives in this code.
--library UNISIM;
--use UNISIM.VComponents.all;
entity GenReg is
generic (size : integer);
Port ( clock : in STD_LOGIC;
enable : in STD_LOGIC;
reset : in STD_LOGIC;
data : in STD_LOGIC_VECTOR ((size - 1) downto 0);
output : out STD_LOGIC_VECTOR ((size - 1) downto 0));
end GenReg;
architecture Behavioral of GenReg is
begin
main: process (clock, reset) is
variable data_reg : STD_LOGIC_VECTOR((size - 1) downto 0);
begin
if rising_edge(clock) then
if reset = '1' then
data_reg := (others => '0');
elsif enable = '1' then
data_reg := data;
end if;
end if;
output <= data_reg;
end process;
end Behavioral;
|
----------------------------------------------------------------------------------
-- Company:
-- Engineer:
--
-- Create Date: 10:58:50 10/27/2009
-- Design Name:
-- Module Name: GenReg - Behavioral
-- Project Name:
-- Target Devices:
-- Tool versions:
-- Description:
--
-- Dependencies:
--
-- Revision:
-- Revision 0.01 - File Created
-- Revision 0.90 - File written and syntax checked. No simulation necessary
-- Additional Comments:
----------------------------------------------------------------------------------
library IEEE;
use IEEE.STD_LOGIC_1164.ALL;
use IEEE.STD_LOGIC_ARITH.ALL;
use IEEE.STD_LOGIC_UNSIGNED.ALL;
---- Uncomment the following library declaration if instantiating
---- any Xilinx primitives in this code.
--library UNISIM;
--use UNISIM.VComponents.all;
entity GenReg is
generic (size : integer);
Port ( clock : in STD_LOGIC;
enable : in STD_LOGIC;
reset : in STD_LOGIC;
data : in STD_LOGIC_VECTOR ((size - 1) downto 0);
output : out STD_LOGIC_VECTOR ((size - 1) downto 0));
end GenReg;
architecture Behavioral of GenReg is
begin
main: process (clock, reset) is
variable data_reg : STD_LOGIC_VECTOR((size - 1) downto 0);
begin
if rising_edge(clock) then
if reset = '1' then
data_reg := (others => '0');
elsif enable = '1' then
data_reg := data;
end if;
end if;
output <= data_reg;
end process;
end Behavioral;
|
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