Unnamed: 0 int64 0 350k | level_0 int64 0 351k | ApplicationNumber int64 9.75M 96.1M | ArtUnit int64 1.6k 3.99k | Abstract stringlengths 1 8.37k | Claims stringlengths 3 292k | abstract-claims stringlengths 68 293k | TechCenter int64 1.6k 3.9k |
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12,000 | 12,000 | 15,810,693 | 2,846 | A system and method for sensing rotor position of a three-phase permanent magnet synchronous motor (PMSM) includes a controller coupled with the PMSM and causing a plurality of voltage pulses to be applied thereto. A timer and/or an analog-to-digital converter is coupled with the PMSM and measures a plurality of values (measured values) from a three-phase inverter coupled with the PMSM. Each measured value may correspond with one of the plurality of voltage pulses and includes a current value or time value corresponding with an inductance of the PMSM. One or more logic elements calculates, based on the measured values and on one or more position algorithms, a position of a rotor of the PMSM relative to a stator of the PMSM. The system is configured to calculate the position of the rotor when the rotor is in a stopped configuration and when the rotor is in a rotating configuration. | 1. A system for sensing rotor position of a motor, the system comprising:
a controller configured to couple with a star configuration three-phase permanent magnet synchronous motor (PMSM), the controller configured to cause a plurality of voltage pulses to be applied to the PMSM; an analog-to-digital converter (ADC) configured to couple with the PMSM and with the controller and configured to measure a plurality of values (measured values) from a three-phase inverter configured to couple with the PMSM, each of the measured values corresponding with one of the plurality of voltage pulses and comprising a current value corresponding with an inductance of the PMSM; and one or more logic elements configured to calculate, using one or more position algorithms, a position of a rotor of the PMSM relative to a stator of the PMSM; wherein the one or more position algorithms employ a least squares method with the measured values and one of a plurality of a plurality of measuring current vector phase values and a plurality of angular velocity values to calculate the position of the rotor when the rotor is in a stopped configuration and when the rotor is in a rotating configuration. 2. The system of claim 1, wherein the one or more logic elements are coupled with one or more shunt resistors that are coupled with the three-phase inverter. 3. The system of claim 1, wherein the system is configured to calculate a position of a rotor of a PMSM that is not controlled using vector control (field-oriented control). 4. The system of claim 1, wherein the PMSM comprises a surface permanent magnet synchronous motor (SPMSM). 5. The system of claim 1, wherein the PMSM comprises an interior permanent magnet synchronous motor (IPMSM). 6. The system of claim 1, wherein the one or more logic elements calculate the position of the rotor within 30 degrees of accuracy. 7. The system of claim 1, wherein the one or more position algorithms includes one of
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wherein each αi includes a value between 0 and 2π, each yi includes one of the measured values, each ω includes an angular velocity value, and each ti includes a measured time value. 8. The system of claim 1, wherein the system is configured to calculate a position of a rotor of a PMSM that is controlled using vector control (field-oriented control). 9. A system for sensing rotor position of a motor, the system comprising:
a controller configured to couple with a star configuration three-phase permanent magnet synchronous motor (PMSM), the controller configured to cause a plurality of voltage pulses to be applied to the PMSM; a timer coupled with at least one shunt resistor configured to couple with the PMSM and configured to measure a plurality of values (measured values), each of the measured values corresponding with one of the plurality of voltage pulses and comprising one of a value corresponding with an inductance of the PMSM, and; one or more logic elements configured to calculate, using one or more position algorithms, a position of a rotor of the PMSM relative to a stator of the PMSM; wherein the one or more position algorithms employ a least squares method with the measured values and one of a plurality of a plurality of measuring current vector phase values and a plurality of angular velocity values to calculate the position of the rotor when the rotor is in a stopped configuration and when the rotor is in a rotating configuration. 10. The system of claim 9, wherein the one or more logic elements calculate the position of the rotor within 30 degrees of accuracy. 11. The system of claim 9, wherein the system is configured to calculate a position of a rotor of a PMSM that is not controlled using vector control (field-oriented control). 12. The system of claim 9, wherein the system comprises the timer, the ADC, a comparator, and a multiplexer each coupled with the one or more logic elements. 13. The system of claim 9, wherein the system further comprises a sample and hold element (S/H) and an analog multiplexer (AMUX) coupled with the one or more logic elements. 14. The system of claim 9, wherein the one or more position algorithms includes one of
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wherein each αi includes a value between 0 and 2π, each yi includes one of the measured values, each ω includes an angular velocity value, and each ti includes a measured time value. 15. A method for sensing rotor position of a motor, the method comprising:
providing a controller and one of a timer and an analog-to-digital converter (ADC) each configured to couple with a star configuration three-phase permanent magnet synchronous motor (PMSM); applying, using the controller, a plurality of voltage pulses to the PMSM; measuring, with the one of the timer and the ADC, a plurality of values (measured values) from a three-phase inverter coupled with the PMSM, each of the measured values corresponding with one of the plurality of voltage pulses and comprising one of a current value corresponding with an inductance of the PMSM and a time value corresponding with an inductance of the PMSM; and calculating, with one or more logic elements coupled with the PMSM, using one or more position algorithms, a position of a rotor of the PMSM relative to a stator of the PMSM; wherein the one or more position algorithms employ a least squares method with the measured values and one of a plurality of a plurality of measuring current vector phase values and a plurality of angular velocity values to calculate the position of the rotor when the rotor is in a stopped configuration and when the rotor is in a rotating configuration; and wherein the one or more logic elements are configured to calculate a position of a rotor of a PMSM that is not controlled using vector control (field-oriented control). 16. The method of claim 15, wherein the one or more position algorithms includes one of
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wherein each αi includes a value between 0 and 2π, each yi includes one of the measured values, each ω includes an angular velocity value, and each ti includes a measured time value. 17. The method of claim 15, further comprising calculating, with the one or more logic elements, the position of the rotor relative to the stator when the rotor is in the stopped configuration. 18. The method of claim 15, further comprising coupling the timer with the PMSM and toggling the timer between a start configuration and a stop configuration using a signal processor in response to an input from a comparator. 19. The method of claim 15, further comprising coupling the ADC with the PMSM, converting an analog signal from the three-phase inverter to a digital signal using the ADC, and communicating the digital signal from the ADC to the one or more logic elements. 20. The method of claim 15, wherein the measured values are measured using one or more elements coupled with one or more shunt resistors that are coupled with the three-phase inverter. | A system and method for sensing rotor position of a three-phase permanent magnet synchronous motor (PMSM) includes a controller coupled with the PMSM and causing a plurality of voltage pulses to be applied thereto. A timer and/or an analog-to-digital converter is coupled with the PMSM and measures a plurality of values (measured values) from a three-phase inverter coupled with the PMSM. Each measured value may correspond with one of the plurality of voltage pulses and includes a current value or time value corresponding with an inductance of the PMSM. One or more logic elements calculates, based on the measured values and on one or more position algorithms, a position of a rotor of the PMSM relative to a stator of the PMSM. The system is configured to calculate the position of the rotor when the rotor is in a stopped configuration and when the rotor is in a rotating configuration.1. A system for sensing rotor position of a motor, the system comprising:
a controller configured to couple with a star configuration three-phase permanent magnet synchronous motor (PMSM), the controller configured to cause a plurality of voltage pulses to be applied to the PMSM; an analog-to-digital converter (ADC) configured to couple with the PMSM and with the controller and configured to measure a plurality of values (measured values) from a three-phase inverter configured to couple with the PMSM, each of the measured values corresponding with one of the plurality of voltage pulses and comprising a current value corresponding with an inductance of the PMSM; and one or more logic elements configured to calculate, using one or more position algorithms, a position of a rotor of the PMSM relative to a stator of the PMSM; wherein the one or more position algorithms employ a least squares method with the measured values and one of a plurality of a plurality of measuring current vector phase values and a plurality of angular velocity values to calculate the position of the rotor when the rotor is in a stopped configuration and when the rotor is in a rotating configuration. 2. The system of claim 1, wherein the one or more logic elements are coupled with one or more shunt resistors that are coupled with the three-phase inverter. 3. The system of claim 1, wherein the system is configured to calculate a position of a rotor of a PMSM that is not controlled using vector control (field-oriented control). 4. The system of claim 1, wherein the PMSM comprises a surface permanent magnet synchronous motor (SPMSM). 5. The system of claim 1, wherein the PMSM comprises an interior permanent magnet synchronous motor (IPMSM). 6. The system of claim 1, wherein the one or more logic elements calculate the position of the rotor within 30 degrees of accuracy. 7. The system of claim 1, wherein the one or more position algorithms includes one of
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wherein each αi includes a value between 0 and 2π, each yi includes one of the measured values, each ω includes an angular velocity value, and each ti includes a measured time value. 8. The system of claim 1, wherein the system is configured to calculate a position of a rotor of a PMSM that is controlled using vector control (field-oriented control). 9. A system for sensing rotor position of a motor, the system comprising:
a controller configured to couple with a star configuration three-phase permanent magnet synchronous motor (PMSM), the controller configured to cause a plurality of voltage pulses to be applied to the PMSM; a timer coupled with at least one shunt resistor configured to couple with the PMSM and configured to measure a plurality of values (measured values), each of the measured values corresponding with one of the plurality of voltage pulses and comprising one of a value corresponding with an inductance of the PMSM, and; one or more logic elements configured to calculate, using one or more position algorithms, a position of a rotor of the PMSM relative to a stator of the PMSM; wherein the one or more position algorithms employ a least squares method with the measured values and one of a plurality of a plurality of measuring current vector phase values and a plurality of angular velocity values to calculate the position of the rotor when the rotor is in a stopped configuration and when the rotor is in a rotating configuration. 10. The system of claim 9, wherein the one or more logic elements calculate the position of the rotor within 30 degrees of accuracy. 11. The system of claim 9, wherein the system is configured to calculate a position of a rotor of a PMSM that is not controlled using vector control (field-oriented control). 12. The system of claim 9, wherein the system comprises the timer, the ADC, a comparator, and a multiplexer each coupled with the one or more logic elements. 13. The system of claim 9, wherein the system further comprises a sample and hold element (S/H) and an analog multiplexer (AMUX) coupled with the one or more logic elements. 14. The system of claim 9, wherein the one or more position algorithms includes one of
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wherein each αi includes a value between 0 and 2π, each yi includes one of the measured values, each ω includes an angular velocity value, and each ti includes a measured time value. 15. A method for sensing rotor position of a motor, the method comprising:
providing a controller and one of a timer and an analog-to-digital converter (ADC) each configured to couple with a star configuration three-phase permanent magnet synchronous motor (PMSM); applying, using the controller, a plurality of voltage pulses to the PMSM; measuring, with the one of the timer and the ADC, a plurality of values (measured values) from a three-phase inverter coupled with the PMSM, each of the measured values corresponding with one of the plurality of voltage pulses and comprising one of a current value corresponding with an inductance of the PMSM and a time value corresponding with an inductance of the PMSM; and calculating, with one or more logic elements coupled with the PMSM, using one or more position algorithms, a position of a rotor of the PMSM relative to a stator of the PMSM; wherein the one or more position algorithms employ a least squares method with the measured values and one of a plurality of a plurality of measuring current vector phase values and a plurality of angular velocity values to calculate the position of the rotor when the rotor is in a stopped configuration and when the rotor is in a rotating configuration; and wherein the one or more logic elements are configured to calculate a position of a rotor of a PMSM that is not controlled using vector control (field-oriented control). 16. The method of claim 15, wherein the one or more position algorithms includes one of
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wherein each αi includes a value between 0 and 2π, each yi includes one of the measured values, each ω includes an angular velocity value, and each ti includes a measured time value. 17. The method of claim 15, further comprising calculating, with the one or more logic elements, the position of the rotor relative to the stator when the rotor is in the stopped configuration. 18. The method of claim 15, further comprising coupling the timer with the PMSM and toggling the timer between a start configuration and a stop configuration using a signal processor in response to an input from a comparator. 19. The method of claim 15, further comprising coupling the ADC with the PMSM, converting an analog signal from the three-phase inverter to a digital signal using the ADC, and communicating the digital signal from the ADC to the one or more logic elements. 20. The method of claim 15, wherein the measured values are measured using one or more elements coupled with one or more shunt resistors that are coupled with the three-phase inverter. | 2,800 |
12,001 | 12,001 | 15,817,810 | 2,822 | A power semiconductor device includes a semiconductor body configured to conduct a load current. A load terminal electrically connected with the semiconductor body is configured to couple the load current into and/or out of the semiconductor body. The load terminal includes a metallization having a frontside and a backside. The backside interfaces with a surface of the semiconductor body. The frontside is configured to interface with a wire structure having at least one wire configured to conduct at least a part of the load current. The frontside has a lateral structure formed at least by at least one local elevation of the metallization. The local elevation has a height in an extension direction defined by a distance between the base and top of the local elevation and, in a first lateral direction perpendicular to the extension direction, a base width at the base and a top width at the top. | 1. A power semiconductor device, comprising
a semiconductor body configured to conduct a load current; and a first load terminal electrically connected with the semiconductor body and configured to couple the load current into and/or out of the semiconductor body, wherein the first load terminal comprises a metallization having a frontside and a backside, the backside interfacing with a surface of the semiconductor body and the frontside being configured to interface with a wire structure having at least one wire configured to conduct at least a part of the load current, wherein the frontside of the metallization has a lateral structure that is formed at least by at least one local elevation of the metallization, wherein the at least one local elevation has a height in an extension direction defined by the distance between a base and a top of the at least one local elevation and, in a first lateral direction perpendicular to the extension direction, a base width at the base and a top width at the top, wherein the top width amounts to less than 90% of the base width. 2. The power semiconductor device of claim 1, wherein half of the difference between the base width and the top width is equal or greater to the height. 3. The power semiconductor device of claim 1, wherein the width of the at least one local elevation in the first lateral direction gradually increases along the extension direction from the top width to the base width. 4. The power semiconductor device of claim 1, wherein a change of the width of the at least one local elevation in the first lateral direction over the extension direction is constant for at least 50% of the height of the at least one local elevation. 5. The power semiconductor device of claim 1, wherein the width of the at least one local elevation in the first lateral direction increases step-like along the extension direction from the top width to the base width. 6. The power semiconductor device of claim 1, wherein the base has a base area and the top has a top area, the top area amounting to less than 80% of the base area. 7. The power semiconductor device of claim 1, wherein the metallization has a spatially homogenous material composition. 8. The power semiconductor device of claim 1, wherein the top of the at least one local elevation forms a contact surface configured to be contacted by a first end of the at least one wire. 9. The power semiconductor device of claim 1, wherein the frontside of the metallization is further formed by a base surface arranged coplanar with the base of the at least one local elevation. 10. The power semiconductor device of claim 9, further comprising an insulating encapsulation that covers the base surface and exposes at least a section of the top of the at least one local elevation. 11. A method of processing a power semiconductor device, the method comprising
providing a semiconductor body configured to conduct a load current; forming a first load terminal electrically connected with the semiconductor body and configured to couple the load current into and/or out of the semiconductor body, wherein the first load terminal comprises a metallization having a frontside and a backside, the backside interfacing with a surface of the semiconductor body and the frontside being configured to interface with a wire structure having at least one wire configured to conduct at least a part of the load current, wherein forming the first load terminal further comprises: laterally structuring the frontside of the metallization by forming at least one local elevation of the metallization, the at least one local elevation having a height in an extension direction defined by the distance between a base and a top of the local elevation and, in a first lateral direction perpendicular to the extension direction, a base width at the base and a top width at the top, wherein the at least one local elevation is formed such that the top width amounts to less than 90% of the base width. 12. The method of claim 11, wherein laterally structuring the frontside of the metallization comprises:
forming a conductive layer on top of the surface; providing a first mask on top of the conductive layer, the first mask including at least one first mask element; carrying out a first etch processing step to back-thin the conductive layer in sections not covered by the at least one first mask element, wherein the back-thinning of the conductive layer spatially confines the at least one local elevation, and wherein the back-thinning has a first lateral overlap with the at least one first mask element that amounts to at least 1 μm. 13. The method of claim 12, wherein the top width of the at least one local elevation is smaller than a width of the at least one first mask element by at least 1 μm. 14. The method of claim 12, wherein the first lateral overlap is formed by means of an etch undercut produced within the first etch processing step. 15. The method of claim 12, wherein, during the first etch processing step, the lateral extension of the at least one first mask element is reduced from an initial value to an end value, the end value amounting to less than 90% of the initial value. 16. The method of claim 12, wherein, during the first etch processing step, an etchant is used that is configured to etch each of the conductive layer and the at least one mask element. 17. The method of claim 12, further comprising, after carrying out the first etch processing step:
providing at least one second mask element in a recess section caused by the first lateral overlap; and carrying out a second etch processing step to further back-thin the conductive layer in sections not covered by the at least one second mask element, wherein the further back-thinning of the conductive layer spatially confines the at least one local elevation, and wherein the further back-thinning has a second lateral overlap with the at least one second mask element that amounts to at least 1 μm 18. The method of claim 17, wherein the second lateral overlap is formed by means of an etch undercut produced within the second etch processing step. 19. The method of claim 11, wherein laterally structuring the frontside of the metallization comprises:
forming a conductive layer on top of the surface by a first electroplating processing step; providing a first mask on top of the conductive layer, the first mask including at least one first mask element that spatially confines at least one first opening; and carrying out a second electroplating processing step to fill the at least one first opening with a conductive material, thereby forming the at least one local elevation. 20. The method of claim 11, wherein laterally structuring the frontside of the metallization comprises:
forming a conductive layer on top of the surface; providing a first mask on top of the conductive layer, the first mask including at least one first mask element that spatially confines at least one first opening; filling the at least one first opening with a conductive material; providing at least one second mask element on top of the at least one first mask element, the at least one second mask element laterally overlapping with the filled at least one first opening and defining at least one second opening; and filling the at least one second opening with a conductive material, thereby forming the at least one local elevation. 21. The method of claim 20, wherein forming the conductive layer, filling the at least one first opening and filling the at least one second opening each comprise carrying out a respective electroplating processing step. 22. The method of claim 11, wherein laterally structuring the frontside of the metallization comprises:
forming a conductive layer on top of the surface; providing a first mask on top of the conductive layer, the first mask including at least one first mask element that spatially confines at least one first opening, wherein the at least one first mask element has a width that decreases along the extension direction; and filling the at least one first opening with a conductive material, thereby forming the at least one local elevation. 23. The method of claim 22, wherein the difference between the base width and the top width of the at least one local elevation amounts to at least the value of the width decrease of the at least one first mask element. | A power semiconductor device includes a semiconductor body configured to conduct a load current. A load terminal electrically connected with the semiconductor body is configured to couple the load current into and/or out of the semiconductor body. The load terminal includes a metallization having a frontside and a backside. The backside interfaces with a surface of the semiconductor body. The frontside is configured to interface with a wire structure having at least one wire configured to conduct at least a part of the load current. The frontside has a lateral structure formed at least by at least one local elevation of the metallization. The local elevation has a height in an extension direction defined by a distance between the base and top of the local elevation and, in a first lateral direction perpendicular to the extension direction, a base width at the base and a top width at the top.1. A power semiconductor device, comprising
a semiconductor body configured to conduct a load current; and a first load terminal electrically connected with the semiconductor body and configured to couple the load current into and/or out of the semiconductor body, wherein the first load terminal comprises a metallization having a frontside and a backside, the backside interfacing with a surface of the semiconductor body and the frontside being configured to interface with a wire structure having at least one wire configured to conduct at least a part of the load current, wherein the frontside of the metallization has a lateral structure that is formed at least by at least one local elevation of the metallization, wherein the at least one local elevation has a height in an extension direction defined by the distance between a base and a top of the at least one local elevation and, in a first lateral direction perpendicular to the extension direction, a base width at the base and a top width at the top, wherein the top width amounts to less than 90% of the base width. 2. The power semiconductor device of claim 1, wherein half of the difference between the base width and the top width is equal or greater to the height. 3. The power semiconductor device of claim 1, wherein the width of the at least one local elevation in the first lateral direction gradually increases along the extension direction from the top width to the base width. 4. The power semiconductor device of claim 1, wherein a change of the width of the at least one local elevation in the first lateral direction over the extension direction is constant for at least 50% of the height of the at least one local elevation. 5. The power semiconductor device of claim 1, wherein the width of the at least one local elevation in the first lateral direction increases step-like along the extension direction from the top width to the base width. 6. The power semiconductor device of claim 1, wherein the base has a base area and the top has a top area, the top area amounting to less than 80% of the base area. 7. The power semiconductor device of claim 1, wherein the metallization has a spatially homogenous material composition. 8. The power semiconductor device of claim 1, wherein the top of the at least one local elevation forms a contact surface configured to be contacted by a first end of the at least one wire. 9. The power semiconductor device of claim 1, wherein the frontside of the metallization is further formed by a base surface arranged coplanar with the base of the at least one local elevation. 10. The power semiconductor device of claim 9, further comprising an insulating encapsulation that covers the base surface and exposes at least a section of the top of the at least one local elevation. 11. A method of processing a power semiconductor device, the method comprising
providing a semiconductor body configured to conduct a load current; forming a first load terminal electrically connected with the semiconductor body and configured to couple the load current into and/or out of the semiconductor body, wherein the first load terminal comprises a metallization having a frontside and a backside, the backside interfacing with a surface of the semiconductor body and the frontside being configured to interface with a wire structure having at least one wire configured to conduct at least a part of the load current, wherein forming the first load terminal further comprises: laterally structuring the frontside of the metallization by forming at least one local elevation of the metallization, the at least one local elevation having a height in an extension direction defined by the distance between a base and a top of the local elevation and, in a first lateral direction perpendicular to the extension direction, a base width at the base and a top width at the top, wherein the at least one local elevation is formed such that the top width amounts to less than 90% of the base width. 12. The method of claim 11, wherein laterally structuring the frontside of the metallization comprises:
forming a conductive layer on top of the surface; providing a first mask on top of the conductive layer, the first mask including at least one first mask element; carrying out a first etch processing step to back-thin the conductive layer in sections not covered by the at least one first mask element, wherein the back-thinning of the conductive layer spatially confines the at least one local elevation, and wherein the back-thinning has a first lateral overlap with the at least one first mask element that amounts to at least 1 μm. 13. The method of claim 12, wherein the top width of the at least one local elevation is smaller than a width of the at least one first mask element by at least 1 μm. 14. The method of claim 12, wherein the first lateral overlap is formed by means of an etch undercut produced within the first etch processing step. 15. The method of claim 12, wherein, during the first etch processing step, the lateral extension of the at least one first mask element is reduced from an initial value to an end value, the end value amounting to less than 90% of the initial value. 16. The method of claim 12, wherein, during the first etch processing step, an etchant is used that is configured to etch each of the conductive layer and the at least one mask element. 17. The method of claim 12, further comprising, after carrying out the first etch processing step:
providing at least one second mask element in a recess section caused by the first lateral overlap; and carrying out a second etch processing step to further back-thin the conductive layer in sections not covered by the at least one second mask element, wherein the further back-thinning of the conductive layer spatially confines the at least one local elevation, and wherein the further back-thinning has a second lateral overlap with the at least one second mask element that amounts to at least 1 μm 18. The method of claim 17, wherein the second lateral overlap is formed by means of an etch undercut produced within the second etch processing step. 19. The method of claim 11, wherein laterally structuring the frontside of the metallization comprises:
forming a conductive layer on top of the surface by a first electroplating processing step; providing a first mask on top of the conductive layer, the first mask including at least one first mask element that spatially confines at least one first opening; and carrying out a second electroplating processing step to fill the at least one first opening with a conductive material, thereby forming the at least one local elevation. 20. The method of claim 11, wherein laterally structuring the frontside of the metallization comprises:
forming a conductive layer on top of the surface; providing a first mask on top of the conductive layer, the first mask including at least one first mask element that spatially confines at least one first opening; filling the at least one first opening with a conductive material; providing at least one second mask element on top of the at least one first mask element, the at least one second mask element laterally overlapping with the filled at least one first opening and defining at least one second opening; and filling the at least one second opening with a conductive material, thereby forming the at least one local elevation. 21. The method of claim 20, wherein forming the conductive layer, filling the at least one first opening and filling the at least one second opening each comprise carrying out a respective electroplating processing step. 22. The method of claim 11, wherein laterally structuring the frontside of the metallization comprises:
forming a conductive layer on top of the surface; providing a first mask on top of the conductive layer, the first mask including at least one first mask element that spatially confines at least one first opening, wherein the at least one first mask element has a width that decreases along the extension direction; and filling the at least one first opening with a conductive material, thereby forming the at least one local elevation. 23. The method of claim 22, wherein the difference between the base width and the top width of the at least one local elevation amounts to at least the value of the width decrease of the at least one first mask element. | 2,800 |
12,002 | 12,002 | 15,260,332 | 2,882 | An optical device includes a phosphor wheel and two light sources. The phosphor wheel has two phosphor regions. The phosphor regions are located at different radial positions of the phosphor wheel and are not overlapped. Each of the phosphor regions has a plurality of color sections. The light sources emit two light beams so as to respectively provide two light spots on the phosphor wheel. During the rotation of the phosphor wheel, the light spots are located at the color sections having the same fluorescent characteristic respectively in the phosphor regions. | 1. An optical device, comprising:
a phosphor wheel having two phosphor regions, the phosphor regions being located at different radial positions of the phosphor wheel and not overlapped, each of the phosphor regions having a plurality of color sections; and two light sources emitting two light beams so as to respectively provide two light spots on the phosphor wheel, the light spots being respectively located at the phosphor regions, wherein during the rotation of the phosphor wheel, the light spots are located at the color sections having the same fluorescent characteristic respectively in the phosphor regions. 2. The optical device of claim 1, further comprising a color wheel configured to receive lights excited by the phosphor regions. 3. The optical device of claim 2, further comprising a condensing optical module configured to receive the lights excited by the phosphor regions and then guide the excited lights to the color wheel. 4. The optical device of claim 3, further comprising an integrator rod configured to receive the lights guided by the condensing optical module and then guide the lights to the color wheel. 5. The optical device of claim 2, further comprising:
a first driver configured to rotate the phosphor wheel; a second driver configured to rotate the color wheel; and a synchronization circuit electrically connected to the first driver and the second driver, the color wheel having a plurality of color regions respectively corresponding to the color sections of any of the phosphor regions, the synchronization circuit being configured to synchronously control the first driver and the second driver, so as to make the light excited by any of the color sections of the phosphor regions irradiate a corresponding one of the color regions of the color wheel during the rotation of the phosphor wheel and the color wheel. 6. The optical device of claim 5, further comprising a brightness control circuit electrically connected to the light sources and the synchronization circuit, the brightness control circuit being configured to control output powers of the light sources and collaborate with the synchronization circuit to make the light sources emit lights with different output powers respectively to the color sections having different fluorescent characteristics during the rotation of the phosphor wheel. 7. The optical device of claim 2, wherein central angles of at least two of the color sections having the same fluorescent characteristic of said two phosphor regions are equal. 8. The optical device of claim 7, wherein central angles of at least two of the color sections having different fluorescent characteristics of each of the phosphor regions are equal. 9. The optical device of claim 7, wherein the color wheel has a plurality of color regions respectively corresponding to the color sections of any of the phosphor regions, and central angles of at least two of the color regions having different colors are equal. 10. The optical device of claim 7, wherein central angles of at least two of the color sections having different fluorescent characteristics of each of the phosphor regions are not equal. 11. The optical device of claim 10, wherein the color wheel has a plurality of color regions respectively corresponding to the color sections of any of the phosphor regions, and central angles of at least two of the color regions having different colors are not equal. 12. The optical device of claim 1, wherein a straight connecting said two light spots passes through a center of the phosphor wheel. 13. The optical device of claim 1, wherein the phosphor wheel further has two light-transmissive portions, said two light-transmissive portions being configured for said two light beams to pass through, wherein when one of said two light-transmissive portions moves to one of the light spots by rotating the phosphor wheel, another of said two light-transmissive portions moves to another of the light spots. 14. An optical device, comprising:
a phosphor wheel having a radian; a first color section disposed at a first radial position of the phosphor wheel along the radian and forming a first central angle; a second color section disposed at a second radial position of the phosphor wheel along the radian and forming a second central angle, wherein the first color section and the second color section are coated with a first fluorescent material, and the first central angle and the second central angle are equal; and two light sources generating two light spots for respectively exciting the fluorescent material on the first color section and the second color section, wherein when the phosphor wheel rotates, said two light spots excite the first fluorescent material substantially at the same time. 15. The optical device of claim 14, wherein said two light spots excite the first fluorescent material on the first color section and the second color section at the same time. 16. The optical device of claim 14, further comprising:
a third color section disposed at the first radial position of the phosphor wheel along the radian and forming a third central angle; and a fourth color section disposed at the second radial position of the phosphor wheel along the radian and forming a fourth central angle, wherein the third color section and the fourth color section are coated with a second fluorescent material, and the third central angle and the fourth central angle are equal; wherein when the phosphor wheel rotates, said two light spots excite the second fluorescent material on the third color section and the fourth color section substantially at the same time. 17. The optical device of claim 16, wherein said two light spots excite the second fluorescent material on the third color section and the fourth color section at the same time. 18. The optical device of claim 16, wherein the first color section and the fourth color section are located in a sector area formed by the first central angle of the phosphor wheel. 19. The optical device of claim 14, further comprising two light-transmissive regions, said two light-transmissive regions being disposed on the phosphor wheel and spaced apart from the first color section and the second color section, wherein when the phosphor wheel rotates, said two light spots pass through said two light-transmissive regions substantially at the same time. 20. The optical device of claim 19, wherein said two light spots pass through said two light-transmissive regions at the same time. 21. The optical device of claim 14, further comprising a fifth color section and a sixth color section disposed on the phosphor wheel and spaced apart from the first color section and the second color section, wherein the fifth color section and the sixth color section are coated with a third fluorescent material, and when phosphor wheel rotates, said two light spots excite the third fluorescent material on the fifth color section and the sixth color section substantially at the same time. 22. The optical device of claim 21, wherein said two light spots excite the third fluorescent material on the fifth color section and the sixth color section at the same time. | An optical device includes a phosphor wheel and two light sources. The phosphor wheel has two phosphor regions. The phosphor regions are located at different radial positions of the phosphor wheel and are not overlapped. Each of the phosphor regions has a plurality of color sections. The light sources emit two light beams so as to respectively provide two light spots on the phosphor wheel. During the rotation of the phosphor wheel, the light spots are located at the color sections having the same fluorescent characteristic respectively in the phosphor regions.1. An optical device, comprising:
a phosphor wheel having two phosphor regions, the phosphor regions being located at different radial positions of the phosphor wheel and not overlapped, each of the phosphor regions having a plurality of color sections; and two light sources emitting two light beams so as to respectively provide two light spots on the phosphor wheel, the light spots being respectively located at the phosphor regions, wherein during the rotation of the phosphor wheel, the light spots are located at the color sections having the same fluorescent characteristic respectively in the phosphor regions. 2. The optical device of claim 1, further comprising a color wheel configured to receive lights excited by the phosphor regions. 3. The optical device of claim 2, further comprising a condensing optical module configured to receive the lights excited by the phosphor regions and then guide the excited lights to the color wheel. 4. The optical device of claim 3, further comprising an integrator rod configured to receive the lights guided by the condensing optical module and then guide the lights to the color wheel. 5. The optical device of claim 2, further comprising:
a first driver configured to rotate the phosphor wheel; a second driver configured to rotate the color wheel; and a synchronization circuit electrically connected to the first driver and the second driver, the color wheel having a plurality of color regions respectively corresponding to the color sections of any of the phosphor regions, the synchronization circuit being configured to synchronously control the first driver and the second driver, so as to make the light excited by any of the color sections of the phosphor regions irradiate a corresponding one of the color regions of the color wheel during the rotation of the phosphor wheel and the color wheel. 6. The optical device of claim 5, further comprising a brightness control circuit electrically connected to the light sources and the synchronization circuit, the brightness control circuit being configured to control output powers of the light sources and collaborate with the synchronization circuit to make the light sources emit lights with different output powers respectively to the color sections having different fluorescent characteristics during the rotation of the phosphor wheel. 7. The optical device of claim 2, wherein central angles of at least two of the color sections having the same fluorescent characteristic of said two phosphor regions are equal. 8. The optical device of claim 7, wherein central angles of at least two of the color sections having different fluorescent characteristics of each of the phosphor regions are equal. 9. The optical device of claim 7, wherein the color wheel has a plurality of color regions respectively corresponding to the color sections of any of the phosphor regions, and central angles of at least two of the color regions having different colors are equal. 10. The optical device of claim 7, wherein central angles of at least two of the color sections having different fluorescent characteristics of each of the phosphor regions are not equal. 11. The optical device of claim 10, wherein the color wheel has a plurality of color regions respectively corresponding to the color sections of any of the phosphor regions, and central angles of at least two of the color regions having different colors are not equal. 12. The optical device of claim 1, wherein a straight connecting said two light spots passes through a center of the phosphor wheel. 13. The optical device of claim 1, wherein the phosphor wheel further has two light-transmissive portions, said two light-transmissive portions being configured for said two light beams to pass through, wherein when one of said two light-transmissive portions moves to one of the light spots by rotating the phosphor wheel, another of said two light-transmissive portions moves to another of the light spots. 14. An optical device, comprising:
a phosphor wheel having a radian; a first color section disposed at a first radial position of the phosphor wheel along the radian and forming a first central angle; a second color section disposed at a second radial position of the phosphor wheel along the radian and forming a second central angle, wherein the first color section and the second color section are coated with a first fluorescent material, and the first central angle and the second central angle are equal; and two light sources generating two light spots for respectively exciting the fluorescent material on the first color section and the second color section, wherein when the phosphor wheel rotates, said two light spots excite the first fluorescent material substantially at the same time. 15. The optical device of claim 14, wherein said two light spots excite the first fluorescent material on the first color section and the second color section at the same time. 16. The optical device of claim 14, further comprising:
a third color section disposed at the first radial position of the phosphor wheel along the radian and forming a third central angle; and a fourth color section disposed at the second radial position of the phosphor wheel along the radian and forming a fourth central angle, wherein the third color section and the fourth color section are coated with a second fluorescent material, and the third central angle and the fourth central angle are equal; wherein when the phosphor wheel rotates, said two light spots excite the second fluorescent material on the third color section and the fourth color section substantially at the same time. 17. The optical device of claim 16, wherein said two light spots excite the second fluorescent material on the third color section and the fourth color section at the same time. 18. The optical device of claim 16, wherein the first color section and the fourth color section are located in a sector area formed by the first central angle of the phosphor wheel. 19. The optical device of claim 14, further comprising two light-transmissive regions, said two light-transmissive regions being disposed on the phosphor wheel and spaced apart from the first color section and the second color section, wherein when the phosphor wheel rotates, said two light spots pass through said two light-transmissive regions substantially at the same time. 20. The optical device of claim 19, wherein said two light spots pass through said two light-transmissive regions at the same time. 21. The optical device of claim 14, further comprising a fifth color section and a sixth color section disposed on the phosphor wheel and spaced apart from the first color section and the second color section, wherein the fifth color section and the sixth color section are coated with a third fluorescent material, and when phosphor wheel rotates, said two light spots excite the third fluorescent material on the fifth color section and the sixth color section substantially at the same time. 22. The optical device of claim 21, wherein said two light spots excite the third fluorescent material on the fifth color section and the sixth color section at the same time. | 2,800 |
12,003 | 12,003 | 15,676,614 | 2,853 | A conveyer mechanism ( 110 ) may include one or more composition inspection units provided along the intended product transport path. The product's composition, e.g., it's ink composition, is compared with a predetermined standard, to determine whether the product is acceptable. A bar code ( 48, 45.1, 47.1, 85 ) may be provided to an external surface of the article for identification/traceability purposes. | 1. A spin printer for providing bar codes on a surface of a plurality of capsules or a plurality of caplets, the spin printer comprising:
at least a first drum unit that spins about a drum axis with each of said capsules or each of said caplets carried by the first drum unit and having a product axis oriented substantially parallel to the drum axis, the first drum unit being structured to allow spinning of each of said capsules or each of said caplets along the product axis; and a bar code unit to provide a machine-readable bar code on a circumferential surface of each of the capsules or each of the caplets as each of said capsules or each of said caplets is spun about the product axis, wherein the bar code unit includes a laser unit configured to etch the bar code into each of said capsules or each of said caplets while each of said capsules or each of said caplets is spinning. 2. A spin printer according to claim 1, wherein the laser unit includes a stencil having cut outs in the shape of the bar code. 3. A spin printer according to claim 1, wherein the bar code is provided along the entire circumference of the capsules or caplets. 4. A spin printer according to claim 1, wherein the bar code is provided in a spiral along the product axis. 5. An apparatus for applying a bar code to pellet-shaped articles, the pellet-shaped articles having an elongate shape, a first end, a second end, a longitudinal axis between the first end and the second end, and a circumference around the longitudinal axis, the apparatus comprising:
a processing drum having a plurality of pockets to receive individual pellet-shaped articles; and a processing unit comprising a roller positioned adjacent to the processing drum such that the circumference of the roller is approximately tangential to the circumference of the processing drum, the roller being configured to engage and rotate each of the pellet-shaped articles within the corresponding pocket about the longitudinal axis of the pellet-shaped article, wherein the processing unit is configured to apply the bar code to the circumference of the pellet-shaped article while the pellet-shaped article is rotated by the roller within the corresponding pocket, wherein the processing unit further comprises a laser unit configured to etch the bar code into each pellet-shaped article while each pellet-shaped article is rotated by the roller within the corresponding pocket. 6. The apparatus of claim 5, wherein the bar code is applied about the entire circumference of each pellet-shaped article or a portion of the circumference of each pellet-shaped article. 7. The apparatus of claim 5, wherein the processing drum is configured to rotate about a processing drum axis,
wherein each pellet-shaped article includes a product axis oriented substantially parallel to the processing drum axis, and wherein the laser unit is configured to etch the bar code on each pellet-shaped article in a spiral along the product axis. 8. A method for applying a bar code to pellet-shaped articles with an apparatus, the pellet-shaped articles having an elongate shape, a first end, a second end, a longitudinal axis between the first end and the second end, and a circumference around the longitudinal axis, the method comprising:
receiving individual pellet-shaped articles within a corresponding one of a plurality of pockets of a processing drum that is rotating about an axis of rotation; engaging and rotating each of the pellet-shaped articles within the corresponding pocket about the longitudinal axis of the pellet-shaped article with a roller of a processing unit, the roller positioned adjacent to the processing drum such that the circumference of the roller is approximately tangential to the circumference of the processing drum; and
applying the bar code with the processing unit to the circumference of the pellet-shaped article while the pellet-shaped article is rotated by the roller within the corresponding pocket,
wherein the processing unit comprises a laser unit, and
wherein applying the bar code comprises etching the bar code into each pellet-shaped article with the laser unit while each pellet-shaped article is rotated within the corresponding pocket. 9. The method of claim 8, further comprising etching the bar code about the entire circumference of each pellet-shaped article or a portion of the circumference of each pellet-shaped article. 10. The method of claim 8, wherein the processing drum is configured to rotate about a processing drum axis,
wherein each pellet-shaped article includes a product axis oriented substantially parallel to the processing drum axis, and wherein the method further comprises etching the bar code on each pellet-shaped article in a spiral along the product axis. | A conveyer mechanism ( 110 ) may include one or more composition inspection units provided along the intended product transport path. The product's composition, e.g., it's ink composition, is compared with a predetermined standard, to determine whether the product is acceptable. A bar code ( 48, 45.1, 47.1, 85 ) may be provided to an external surface of the article for identification/traceability purposes.1. A spin printer for providing bar codes on a surface of a plurality of capsules or a plurality of caplets, the spin printer comprising:
at least a first drum unit that spins about a drum axis with each of said capsules or each of said caplets carried by the first drum unit and having a product axis oriented substantially parallel to the drum axis, the first drum unit being structured to allow spinning of each of said capsules or each of said caplets along the product axis; and a bar code unit to provide a machine-readable bar code on a circumferential surface of each of the capsules or each of the caplets as each of said capsules or each of said caplets is spun about the product axis, wherein the bar code unit includes a laser unit configured to etch the bar code into each of said capsules or each of said caplets while each of said capsules or each of said caplets is spinning. 2. A spin printer according to claim 1, wherein the laser unit includes a stencil having cut outs in the shape of the bar code. 3. A spin printer according to claim 1, wherein the bar code is provided along the entire circumference of the capsules or caplets. 4. A spin printer according to claim 1, wherein the bar code is provided in a spiral along the product axis. 5. An apparatus for applying a bar code to pellet-shaped articles, the pellet-shaped articles having an elongate shape, a first end, a second end, a longitudinal axis between the first end and the second end, and a circumference around the longitudinal axis, the apparatus comprising:
a processing drum having a plurality of pockets to receive individual pellet-shaped articles; and a processing unit comprising a roller positioned adjacent to the processing drum such that the circumference of the roller is approximately tangential to the circumference of the processing drum, the roller being configured to engage and rotate each of the pellet-shaped articles within the corresponding pocket about the longitudinal axis of the pellet-shaped article, wherein the processing unit is configured to apply the bar code to the circumference of the pellet-shaped article while the pellet-shaped article is rotated by the roller within the corresponding pocket, wherein the processing unit further comprises a laser unit configured to etch the bar code into each pellet-shaped article while each pellet-shaped article is rotated by the roller within the corresponding pocket. 6. The apparatus of claim 5, wherein the bar code is applied about the entire circumference of each pellet-shaped article or a portion of the circumference of each pellet-shaped article. 7. The apparatus of claim 5, wherein the processing drum is configured to rotate about a processing drum axis,
wherein each pellet-shaped article includes a product axis oriented substantially parallel to the processing drum axis, and wherein the laser unit is configured to etch the bar code on each pellet-shaped article in a spiral along the product axis. 8. A method for applying a bar code to pellet-shaped articles with an apparatus, the pellet-shaped articles having an elongate shape, a first end, a second end, a longitudinal axis between the first end and the second end, and a circumference around the longitudinal axis, the method comprising:
receiving individual pellet-shaped articles within a corresponding one of a plurality of pockets of a processing drum that is rotating about an axis of rotation; engaging and rotating each of the pellet-shaped articles within the corresponding pocket about the longitudinal axis of the pellet-shaped article with a roller of a processing unit, the roller positioned adjacent to the processing drum such that the circumference of the roller is approximately tangential to the circumference of the processing drum; and
applying the bar code with the processing unit to the circumference of the pellet-shaped article while the pellet-shaped article is rotated by the roller within the corresponding pocket,
wherein the processing unit comprises a laser unit, and
wherein applying the bar code comprises etching the bar code into each pellet-shaped article with the laser unit while each pellet-shaped article is rotated within the corresponding pocket. 9. The method of claim 8, further comprising etching the bar code about the entire circumference of each pellet-shaped article or a portion of the circumference of each pellet-shaped article. 10. The method of claim 8, wherein the processing drum is configured to rotate about a processing drum axis,
wherein each pellet-shaped article includes a product axis oriented substantially parallel to the processing drum axis, and wherein the method further comprises etching the bar code on each pellet-shaped article in a spiral along the product axis. | 2,800 |
12,004 | 12,004 | 15,897,338 | 2,837 | A musical instrument stand, including: a stand including a plurality of leg columns, a height of each of the plurality of leg columns being adjustable; a musical instrument mount which is installed on the stand and on which a musical instrument is to be mounted; and a connector including an elastic member and connecting the stand and the musical instrument mount. | 1. A musical instrument stand, comprising:
a stand including a plurality of leg columns, a height of each of the plurality of leg columns being adjustable; a musical instrument mount which is installed on the stand and on which a musical instrument is to be mounted; and a connector including an elastic member and connecting the stand and the musical instrument mount. 2. The musical instrument stand according to claim 1,
wherein the connector includes a first connecting portion connected to the musical instrument mount and a second connecting portion connected to the stand, and wherein the elastic member is disposed between the first connecting portion and the second connecting portion. 3. The musical instrument stand according to claim 2,
wherein the first connecting portion includes:
a plate extending along a facing surface of the musical instrument mount that faces the stand; and
a fixing member for fixing the plate to the facing surface of the musical instrument mount, and
wherein the plate is fixed to the facing surface of the musical instrument mount by the fixing member, so as to connect the first connecting portion to the musical instrument mount. 4. The musical instrument stand according to claim 3,
wherein the fixing member includes an externally threaded portion, wherein the plate has a through-hole that permits the externally threaded portion to pass therethrough, and wherein the musical instrument mount includes, on the facing surface, an internally threaded portion which is threadedly engaged with the externally threaded portion passing through the through-hole. 5. The musical instrument stand according to claim 1,
wherein the connector includes a first externally threaded portion which is threadedly engaged with a first internally threaded portion provided in the musical instrument mount and a second externally threaded portion which is threadedly engaged with a second internally threaded portion provided in the stand, and wherein, in a state in which the stand is connected to the musical instrument mount, the elastic member allows a first axial direction and a second axial direction to extend in mutually different directions, the first axial direction being an axial direction of the first externally threaded portion which is threadedly engaged with the first internally threaded portion, the second axial direction being an axial direction of the second externally threaded portion which is threadedly engaged with the second internally threaded portion. 6. The musical instrument stand according to claim 5, wherein at least one of the first externally threaded portion and the second externally threaded portion is formed integrally with the elastic member. 7. The musical instrument stand according to claim 5,
wherein the second externally threaded portion is formed integrally with the elastic member, and wherein the elastic member is attached to the stand by threadedly engaging the second externally threaded portion with the second internally threaded portion. 8. The musical instrument stand according to claim 7,
wherein the connector includes a plate disposed above the elastic member and a third externally threaded portion for connecting the plate to the elastic member, and wherein the elastic member includes a third internally threaded portion which is formed integrally therewith and which is threadedly engaged with the third externally threaded portion. 9. The musical instrument stand according to claim 8,
wherein the first externally threaded portion passes through the through-hole formed in the plate and is threadedly engaged with the first internally threaded portion. 10. The musical instrument stand according to claim 1, wherein the elastic member is rubber. | A musical instrument stand, including: a stand including a plurality of leg columns, a height of each of the plurality of leg columns being adjustable; a musical instrument mount which is installed on the stand and on which a musical instrument is to be mounted; and a connector including an elastic member and connecting the stand and the musical instrument mount.1. A musical instrument stand, comprising:
a stand including a plurality of leg columns, a height of each of the plurality of leg columns being adjustable; a musical instrument mount which is installed on the stand and on which a musical instrument is to be mounted; and a connector including an elastic member and connecting the stand and the musical instrument mount. 2. The musical instrument stand according to claim 1,
wherein the connector includes a first connecting portion connected to the musical instrument mount and a second connecting portion connected to the stand, and wherein the elastic member is disposed between the first connecting portion and the second connecting portion. 3. The musical instrument stand according to claim 2,
wherein the first connecting portion includes:
a plate extending along a facing surface of the musical instrument mount that faces the stand; and
a fixing member for fixing the plate to the facing surface of the musical instrument mount, and
wherein the plate is fixed to the facing surface of the musical instrument mount by the fixing member, so as to connect the first connecting portion to the musical instrument mount. 4. The musical instrument stand according to claim 3,
wherein the fixing member includes an externally threaded portion, wherein the plate has a through-hole that permits the externally threaded portion to pass therethrough, and wherein the musical instrument mount includes, on the facing surface, an internally threaded portion which is threadedly engaged with the externally threaded portion passing through the through-hole. 5. The musical instrument stand according to claim 1,
wherein the connector includes a first externally threaded portion which is threadedly engaged with a first internally threaded portion provided in the musical instrument mount and a second externally threaded portion which is threadedly engaged with a second internally threaded portion provided in the stand, and wherein, in a state in which the stand is connected to the musical instrument mount, the elastic member allows a first axial direction and a second axial direction to extend in mutually different directions, the first axial direction being an axial direction of the first externally threaded portion which is threadedly engaged with the first internally threaded portion, the second axial direction being an axial direction of the second externally threaded portion which is threadedly engaged with the second internally threaded portion. 6. The musical instrument stand according to claim 5, wherein at least one of the first externally threaded portion and the second externally threaded portion is formed integrally with the elastic member. 7. The musical instrument stand according to claim 5,
wherein the second externally threaded portion is formed integrally with the elastic member, and wherein the elastic member is attached to the stand by threadedly engaging the second externally threaded portion with the second internally threaded portion. 8. The musical instrument stand according to claim 7,
wherein the connector includes a plate disposed above the elastic member and a third externally threaded portion for connecting the plate to the elastic member, and wherein the elastic member includes a third internally threaded portion which is formed integrally therewith and which is threadedly engaged with the third externally threaded portion. 9. The musical instrument stand according to claim 8,
wherein the first externally threaded portion passes through the through-hole formed in the plate and is threadedly engaged with the first internally threaded portion. 10. The musical instrument stand according to claim 1, wherein the elastic member is rubber. | 2,800 |
12,005 | 12,005 | 15,625,867 | 2,864 | Energy usage of a plurality of appliances is measured using a single meter. A pattern of energy usage with respect to the plurality of appliances is determined dependent upon the measured energy usage, appliance details of the plurality of appliances, and usage hours of the plurality of appliances. The pattern is provided to a user of the appliances. | 1. An energy usage awareness system comprising:
an energy meter that measures energy usage of a building and stores measured energy usage as a measured power magnitude that is sampled at specified intervals and for a specified duration of time; a memory that stores appliance information about one or more energy using appliances within the building, the appliance information comprising:
a type of each of the energy using appliances;
a number of appliances of each type within the building;
ratings information for the one or more appliances; and
a listing of typical hours of usage during a typical day for each type of energy using appliances; and
wherein the appliance information and the listing of typical hours of usage during a typical day are entered by a user or users of the appliances; and a processor coupled to the energy meter and to the memory, wherein the processor infers an energy usage pattern for one or more of the energy using appliances using the measured power magnitude of the building and the appliance information. 2. The system of claim 1, further comprising:
a display; and wherein the display displays energy usage patterns for one or more of the energy using appliances by the processor. 3. The system of claim 2, wherein the display is located so as to be viewable by a user or users of the appliances but remotely from the energy meter. 4. The system of claim 1, wherein:
the energy meter is coupled to a tariff meter; and the tariff meter is coupled to an electrical service providing electricity to a building for the appliances. 5. The system of claim 4, further comprising:
a display; and wherein the display displays an energy usage pattern provided by the processor. 6. The system of claim 1, wherein the processor is coupled to the energy meter by a link, wherein the link comprises a wire link. 7. The system of claim 1, wherein:
the processor is coupled to the energy meter by a link; and the link comprises a wireless link. 8. An energy usage awareness system comprising:
an energy meter for measuring energy consumed by one or more energy using appliances within a building, wherein the energy meter comprises a memory for storing the measured energy consumed, wherein the measured energy is stored as discrete samples of the total power consumed within the building at specified intervals and for a specified duration of time; a processing apparatus coupled to the energy meter apparatus accessible to a user or users of the appliances within the building, the processing apparatus comprising:
an input device for inputting information about the one or more energy consuming devices within the building by the user or users of the appliances, the input information comprising:
a type of each of the energy using appliances;
a number of appliances of each type within the building; 'ratings information for the one or more appliances; and
a listing of typical hours of usage during a typical day for each of the energy using appliances;
a memory for storing the information received from the user;
a processor, wherein the processor infers an energy usage pattern for one or more of the energy using appliances using the power consumed within the building and the information input by the user; and
a display for displaying the energy usage pattern to the user. 9. The energy usage awareness system of claim 8, further comprising a wireless link between the energy meter and the processing apparatus. | Energy usage of a plurality of appliances is measured using a single meter. A pattern of energy usage with respect to the plurality of appliances is determined dependent upon the measured energy usage, appliance details of the plurality of appliances, and usage hours of the plurality of appliances. The pattern is provided to a user of the appliances.1. An energy usage awareness system comprising:
an energy meter that measures energy usage of a building and stores measured energy usage as a measured power magnitude that is sampled at specified intervals and for a specified duration of time; a memory that stores appliance information about one or more energy using appliances within the building, the appliance information comprising:
a type of each of the energy using appliances;
a number of appliances of each type within the building;
ratings information for the one or more appliances; and
a listing of typical hours of usage during a typical day for each type of energy using appliances; and
wherein the appliance information and the listing of typical hours of usage during a typical day are entered by a user or users of the appliances; and a processor coupled to the energy meter and to the memory, wherein the processor infers an energy usage pattern for one or more of the energy using appliances using the measured power magnitude of the building and the appliance information. 2. The system of claim 1, further comprising:
a display; and wherein the display displays energy usage patterns for one or more of the energy using appliances by the processor. 3. The system of claim 2, wherein the display is located so as to be viewable by a user or users of the appliances but remotely from the energy meter. 4. The system of claim 1, wherein:
the energy meter is coupled to a tariff meter; and the tariff meter is coupled to an electrical service providing electricity to a building for the appliances. 5. The system of claim 4, further comprising:
a display; and wherein the display displays an energy usage pattern provided by the processor. 6. The system of claim 1, wherein the processor is coupled to the energy meter by a link, wherein the link comprises a wire link. 7. The system of claim 1, wherein:
the processor is coupled to the energy meter by a link; and the link comprises a wireless link. 8. An energy usage awareness system comprising:
an energy meter for measuring energy consumed by one or more energy using appliances within a building, wherein the energy meter comprises a memory for storing the measured energy consumed, wherein the measured energy is stored as discrete samples of the total power consumed within the building at specified intervals and for a specified duration of time; a processing apparatus coupled to the energy meter apparatus accessible to a user or users of the appliances within the building, the processing apparatus comprising:
an input device for inputting information about the one or more energy consuming devices within the building by the user or users of the appliances, the input information comprising:
a type of each of the energy using appliances;
a number of appliances of each type within the building; 'ratings information for the one or more appliances; and
a listing of typical hours of usage during a typical day for each of the energy using appliances;
a memory for storing the information received from the user;
a processor, wherein the processor infers an energy usage pattern for one or more of the energy using appliances using the power consumed within the building and the information input by the user; and
a display for displaying the energy usage pattern to the user. 9. The energy usage awareness system of claim 8, further comprising a wireless link between the energy meter and the processing apparatus. | 2,800 |
12,006 | 12,006 | 14,274,519 | 2,836 | A fault detection circuit for use with a power converter includes an initiate fault check circuit coupled to generate an enable signal in response to a first sense signal coupled to be received from an output socket. A threshold detection circuit is coupled to generate a threshold detection output signal in response to a second sense signal coupled to be received from the power converter and a second reference signal. A logic circuit is coupled to generate a fault signal that is coupled to be received by the power converter in response to the threshold detection output signal and the enable signal. | 1. A fault detection circuit for use with a power converter, comprising:
an initiate fault check circuit coupled to generate an enable signal in response to a first sense signal coupled to be received from an output socket; a threshold detection circuit coupled to generate a threshold detection output signal in response to a second sense signal coupled to be received from the power converter and a second reference signal; and a logic circuit coupled to generate a fault signal coupled to be received by the power converter in response to the threshold detection output signal and the enable signal. 2. The fault detection circuit of claim 1 wherein the initiate fault check circuit comprises a first comparator coupled to generate the enable signal in response to the first sense signal and a first reference signal. 3. The fault detection circuit of claim 1 wherein the logic circuit comprises an AND gate coupled to output the fault signal in response to the threshold detection output signal and the enable signal. 4. The fault detection circuit of claim 1 wherein the first sense signal is coupled to be received from a terminal of an output socket. 5. The fault detection circuit of claim 1, wherein the first sense signal is coupled to be received from a data terminal of an output socket. 6. The fault detection circuit of claim 1 wherein the second sense signal is representative of an output current of the power converter. 7. The fault detection circuit of claim 1 wherein the second sense signal is responsive to a switching frequency of a synchronous rectifier circuit coupled to a secondary winding of the power converter. 8. The fault detection circuit of claim 1 wherein the second sense signal is representative of a switching frequency of the power converter. 9. The fault detection circuit of claim 1 wherein the second sense signal is coupled to be received from an RC circuit coupled to a secondary winding of the power converter. 10. The fault detection circuit of claim 1, wherein the second sense signal is representative of a temperature of the output socket. 11. The fault detection circuit of claim 1, wherein the fault signal is coupled to deactivate the power converter. 12. The fault detection circuit of claim 1 wherein the fault signal is coupled to be received by a controller circuit of the power converter to indicate that a fault condition is detected. 13. The fault detection circuit of claim 1 wherein the fault signal is coupled to be received by a controller circuit of the power converter through an opto-coupler to indicate that a fault condition is detected. 14. The fault detection circuit of claim 13 wherein the opto-coupler circuit is coupled to inject a current into the controller circuit in response to the fault signal to indicate that the fault condition is detected. 15. A charging device, comprising
a power converter coupled between a power converter input and an output socket to be coupled to a powered device; and an fault detection circuit coupled to the output socket and the power converter, the fault detection circuit including:
an initiate fault check circuit coupled to generate an enable signal in response to a first sense signal coupled to be received from the output socket;
a threshold detection circuit coupled to generate a threshold detection output signal in response to a second sense signal coupled to be received from the power converter and a second reference signal; and
a logic circuit coupled to generate a fault signal coupled to be received by the power converter in response to the threshold detection output signal and the enable signal. 16. The charging device of claim 15 wherein the power converter comprises:
an energy transfer element coupled between the power converter input and the output socket;
a power switch coupled to the energy transfer element and to the power converter input; and
a controller coupled to generate a primary drive signal to control switching of the power switch in response to a feedback signal representative of an output of the power converter coupled to the output socket, wherein the second sense signal is responsive to an output load coupled to the output socket, and wherein the power switch is coupled to be deactivated in response to fault signal. 17. The charging device of claim 16 wherein the energy transfer element includes a primary winding and a secondary winding, wherein the power switch is coupled to the primary winding and the power converter input. 18. The charging device of claim 17 wherein the charging device further comprises an RC circuit coupled to the secondary winding, wherein the initiate fault check circuit is coupled to receive the second sense signal from the RC circuit. 19. The charging device of claim 17 wherein the power converter further comprises a synchronous rectifier coupled to the secondary winding, wherein the second sense signal is responsive to a secondary drive signal coupled to control switching of the synchronous rectifier circuit. 20. The charging device of claim 17 wherein the second sense signal is representative of a switching frequency of the power converter. 21. The charging device of claim 17 wherein the second sense signal is representative of a temperature of the output socket. 22. The charging device of claim 15 wherein the controller is coupled to receive the fault signal from the fault detection circuit through an opto-coupler circuit. 23. The charging device of claim 22 wherein the opto-coupler circuit is coupled to inject current into the controller in response to the fault signal to indicate that a fault condition is detected. 24. The charging device of claim 15 wherein the initiate fault check circuit comprises a first comparator coupled to generate the enable signal in response to the first sense signal and a first reference signal. 25. The charging device of claim 15 wherein the logic circuit comprises an AND gate coupled to output the fault signal in response to the threshold detection output signal and the enable signal. 26. The charging device of claim 15 wherein the first sense signal is coupled to be received from a data terminal of the output socket of the charging device. 27. A power converter, comprising:
an energy transfer element coupled between a power converter input and an output socket; a power switch coupled to the energy transfer element and to the power converter input; a controller coupled to generate a primary drive signal to control switching of the power switch in response to a feedback signal representative of an output of the power converter coupled to the output socket, a fault detection circuit coupled to the output socket, the fault detection circuit including:
an initiate fault check circuit coupled to generate an enable signal in response to a first sense signal coupled to be received from the output socket;
a threshold detection circuit coupled to generate a threshold detection output signal in response to a second sense signal responsive to an output load coupled to the output of the power converter, and a second reference signal; and
a logic circuit coupled to generate a fault signal in response to the threshold detection output signal and the enable signal, and wherein the power switch is coupled to be deactivated in response to fault signal. 28. The power converter of claim 27 wherein the energy transfer element includes a primary winding and a secondary winding, wherein the power switch is coupled to the primary winding and the power converter input. 29. The power converter of claim 28 further comprising an RC circuit coupled to the secondary winding, wherein the initiate fault check circuit is coupled to receive the second sense signal from the RC circuit. 30. The power converter of claim 28 further comprising a synchronous rectifier coupled to the secondary winding, wherein the second sense signal is responsive to a secondary drive signal coupled to control switching of the synchronous rectifier circuit. 31. The power converter of claim 28 wherein the second sense signal is representative of a switching frequency of the power converter. 32. The power converter of claim 28 wherein the second sense signal is representative of a temperature of the output socket. 33. The power converter of claim 27 wherein the controller is coupled to receive the fault signal from the fault detection circuit through an opto-coupler circuit. 34. The power converter of claim 33 wherein the opto-coupler circuit is coupled to inject current into the controller in response to the fault signal to indicate that a fault condition is detected. 35. The power converter of claim 27 wherein the initiate fault check circuit comprises a first comparator coupled to generate the enable signal in response to the first sense signal and a first reference signal. 36. The power converter of claim 27 wherein the logic circuit comprises an AND gate coupled to output the fault signal in response to the threshold detection output signal and the enable signal. 37. The power converter of claim 27 wherein the first sense signal is coupled to be received from a data terminal of the output socket. | A fault detection circuit for use with a power converter includes an initiate fault check circuit coupled to generate an enable signal in response to a first sense signal coupled to be received from an output socket. A threshold detection circuit is coupled to generate a threshold detection output signal in response to a second sense signal coupled to be received from the power converter and a second reference signal. A logic circuit is coupled to generate a fault signal that is coupled to be received by the power converter in response to the threshold detection output signal and the enable signal.1. A fault detection circuit for use with a power converter, comprising:
an initiate fault check circuit coupled to generate an enable signal in response to a first sense signal coupled to be received from an output socket; a threshold detection circuit coupled to generate a threshold detection output signal in response to a second sense signal coupled to be received from the power converter and a second reference signal; and a logic circuit coupled to generate a fault signal coupled to be received by the power converter in response to the threshold detection output signal and the enable signal. 2. The fault detection circuit of claim 1 wherein the initiate fault check circuit comprises a first comparator coupled to generate the enable signal in response to the first sense signal and a first reference signal. 3. The fault detection circuit of claim 1 wherein the logic circuit comprises an AND gate coupled to output the fault signal in response to the threshold detection output signal and the enable signal. 4. The fault detection circuit of claim 1 wherein the first sense signal is coupled to be received from a terminal of an output socket. 5. The fault detection circuit of claim 1, wherein the first sense signal is coupled to be received from a data terminal of an output socket. 6. The fault detection circuit of claim 1 wherein the second sense signal is representative of an output current of the power converter. 7. The fault detection circuit of claim 1 wherein the second sense signal is responsive to a switching frequency of a synchronous rectifier circuit coupled to a secondary winding of the power converter. 8. The fault detection circuit of claim 1 wherein the second sense signal is representative of a switching frequency of the power converter. 9. The fault detection circuit of claim 1 wherein the second sense signal is coupled to be received from an RC circuit coupled to a secondary winding of the power converter. 10. The fault detection circuit of claim 1, wherein the second sense signal is representative of a temperature of the output socket. 11. The fault detection circuit of claim 1, wherein the fault signal is coupled to deactivate the power converter. 12. The fault detection circuit of claim 1 wherein the fault signal is coupled to be received by a controller circuit of the power converter to indicate that a fault condition is detected. 13. The fault detection circuit of claim 1 wherein the fault signal is coupled to be received by a controller circuit of the power converter through an opto-coupler to indicate that a fault condition is detected. 14. The fault detection circuit of claim 13 wherein the opto-coupler circuit is coupled to inject a current into the controller circuit in response to the fault signal to indicate that the fault condition is detected. 15. A charging device, comprising
a power converter coupled between a power converter input and an output socket to be coupled to a powered device; and an fault detection circuit coupled to the output socket and the power converter, the fault detection circuit including:
an initiate fault check circuit coupled to generate an enable signal in response to a first sense signal coupled to be received from the output socket;
a threshold detection circuit coupled to generate a threshold detection output signal in response to a second sense signal coupled to be received from the power converter and a second reference signal; and
a logic circuit coupled to generate a fault signal coupled to be received by the power converter in response to the threshold detection output signal and the enable signal. 16. The charging device of claim 15 wherein the power converter comprises:
an energy transfer element coupled between the power converter input and the output socket;
a power switch coupled to the energy transfer element and to the power converter input; and
a controller coupled to generate a primary drive signal to control switching of the power switch in response to a feedback signal representative of an output of the power converter coupled to the output socket, wherein the second sense signal is responsive to an output load coupled to the output socket, and wherein the power switch is coupled to be deactivated in response to fault signal. 17. The charging device of claim 16 wherein the energy transfer element includes a primary winding and a secondary winding, wherein the power switch is coupled to the primary winding and the power converter input. 18. The charging device of claim 17 wherein the charging device further comprises an RC circuit coupled to the secondary winding, wherein the initiate fault check circuit is coupled to receive the second sense signal from the RC circuit. 19. The charging device of claim 17 wherein the power converter further comprises a synchronous rectifier coupled to the secondary winding, wherein the second sense signal is responsive to a secondary drive signal coupled to control switching of the synchronous rectifier circuit. 20. The charging device of claim 17 wherein the second sense signal is representative of a switching frequency of the power converter. 21. The charging device of claim 17 wherein the second sense signal is representative of a temperature of the output socket. 22. The charging device of claim 15 wherein the controller is coupled to receive the fault signal from the fault detection circuit through an opto-coupler circuit. 23. The charging device of claim 22 wherein the opto-coupler circuit is coupled to inject current into the controller in response to the fault signal to indicate that a fault condition is detected. 24. The charging device of claim 15 wherein the initiate fault check circuit comprises a first comparator coupled to generate the enable signal in response to the first sense signal and a first reference signal. 25. The charging device of claim 15 wherein the logic circuit comprises an AND gate coupled to output the fault signal in response to the threshold detection output signal and the enable signal. 26. The charging device of claim 15 wherein the first sense signal is coupled to be received from a data terminal of the output socket of the charging device. 27. A power converter, comprising:
an energy transfer element coupled between a power converter input and an output socket; a power switch coupled to the energy transfer element and to the power converter input; a controller coupled to generate a primary drive signal to control switching of the power switch in response to a feedback signal representative of an output of the power converter coupled to the output socket, a fault detection circuit coupled to the output socket, the fault detection circuit including:
an initiate fault check circuit coupled to generate an enable signal in response to a first sense signal coupled to be received from the output socket;
a threshold detection circuit coupled to generate a threshold detection output signal in response to a second sense signal responsive to an output load coupled to the output of the power converter, and a second reference signal; and
a logic circuit coupled to generate a fault signal in response to the threshold detection output signal and the enable signal, and wherein the power switch is coupled to be deactivated in response to fault signal. 28. The power converter of claim 27 wherein the energy transfer element includes a primary winding and a secondary winding, wherein the power switch is coupled to the primary winding and the power converter input. 29. The power converter of claim 28 further comprising an RC circuit coupled to the secondary winding, wherein the initiate fault check circuit is coupled to receive the second sense signal from the RC circuit. 30. The power converter of claim 28 further comprising a synchronous rectifier coupled to the secondary winding, wherein the second sense signal is responsive to a secondary drive signal coupled to control switching of the synchronous rectifier circuit. 31. The power converter of claim 28 wherein the second sense signal is representative of a switching frequency of the power converter. 32. The power converter of claim 28 wherein the second sense signal is representative of a temperature of the output socket. 33. The power converter of claim 27 wherein the controller is coupled to receive the fault signal from the fault detection circuit through an opto-coupler circuit. 34. The power converter of claim 33 wherein the opto-coupler circuit is coupled to inject current into the controller in response to the fault signal to indicate that a fault condition is detected. 35. The power converter of claim 27 wherein the initiate fault check circuit comprises a first comparator coupled to generate the enable signal in response to the first sense signal and a first reference signal. 36. The power converter of claim 27 wherein the logic circuit comprises an AND gate coupled to output the fault signal in response to the threshold detection output signal and the enable signal. 37. The power converter of claim 27 wherein the first sense signal is coupled to be received from a data terminal of the output socket. | 2,800 |
12,007 | 12,007 | 15,796,890 | 2,892 | A silicon carbide semiconductor device includes plural p-type silicon carbide epitaxial layers provided on an n + -type silicon carbide substrate. In some of the p-type silicon carbide epitaxial layers, an n + source region is provided in at least a region of an upper portion. The n + source region contains arsenic. | 1. A silicon carbide semiconductor device comprising
an n-type semiconductor region in at least a region of an upper portion of a p-type silicon carbide region provided on an n-type silicon carbide substrate, the p-type silicon carbide region having an impurity concentration equal to or lower than 1.0×1018 cm−3, wherein the n-type semiconductor region contains arsenic. 2. The silicon carbide semiconductor device according to claim 1, wherein
the p-type silicon carbide region is an epitaxial region. 3. The silicon carbide semiconductor device according to claim 1, wherein
an arsenic concentration of the n-type semiconductor region is 1.0×1019 cm−3 to 5.0×1020 cm−3. 4. The silicon carbide semiconductor device according to claim 1, wherein
an arsenic concentration of the n-type semiconductor region is high on a surface side and tends to decrease in a depth direction. 5. The silicon carbide semiconductor device according to claim 1, wherein
an arsenic concentration of the n-type semiconductor region is low on a surface side and tends to increase in a depth direction. 6. The silicon carbide semiconductor device according to claim 1, wherein
the n-type semiconductor region is on a threading screw dislocation of the n-type silicon carbide substrate. 7. The silicon carbide semiconductor device according to claim 1, wherein
an area density of the threading screw dislocation of the n-type silicon carbide substrate is 1/cm2 to 3000/cm2. 8. The silicon carbide semiconductor device according to claim 1, wherein
the silicon carbide semiconductor device is a vertical MOSFET, the p-type silicon carbide region is a channel region, and the n-type semiconductor region is a source region. 9. The silicon carbide semiconductor device according to claim 8, wherein
the silicon carbide semiconductor device is a trench MOSFET. 10. The silicon carbide semiconductor device according to claim 1, wherein
the silicon carbide semiconductor device is a vertical IGBT, the p-type silicon carbide region is a channel region, and the n-type semiconductor region is an emitter region. 11. The silicon carbide semiconductor device according to claim 10, wherein
the silicon carbide semiconductor device is a trench IGBT. 12. A method of manufacturing a silicon carbide semiconductor device, the method comprising:
forming a p-type silicon carbide region on an n-type silicon carbide substrate; and forming an n-type silicon carbide region in at least a region of an upper portion of the p-type silicon carbide region, wherein some of a plurality of the p-type silicon carbide regions are formed to have an impurity concentration equal to or lower than 1.0×1018 cm−3, and the n-type silicon carbide region in the at least the region of the upper portion of the p-type silicon carbide region is formed by ion implantation using arsenic. 13. The method according to claim 12, wherein
the p-type silicon carbide region is formed by an epitaxial growth method. 14. The method according to claim 12, wherein
a concentration of arsenic of the n-type silicon carbide region is 1×1019 cm−3 to 5×1020 cm−3. 15. The method according to claim 12, wherein
the n-type silicon carbide region is formed on a threading screw dislocation of the n-type silicon carbide substrate. 16. The method according to claim 15, wherein
an area density of threading screw dislocations of the n-type silicon carbide substrate is 1/cm2 to 3000/cm2. | A silicon carbide semiconductor device includes plural p-type silicon carbide epitaxial layers provided on an n + -type silicon carbide substrate. In some of the p-type silicon carbide epitaxial layers, an n + source region is provided in at least a region of an upper portion. The n + source region contains arsenic.1. A silicon carbide semiconductor device comprising
an n-type semiconductor region in at least a region of an upper portion of a p-type silicon carbide region provided on an n-type silicon carbide substrate, the p-type silicon carbide region having an impurity concentration equal to or lower than 1.0×1018 cm−3, wherein the n-type semiconductor region contains arsenic. 2. The silicon carbide semiconductor device according to claim 1, wherein
the p-type silicon carbide region is an epitaxial region. 3. The silicon carbide semiconductor device according to claim 1, wherein
an arsenic concentration of the n-type semiconductor region is 1.0×1019 cm−3 to 5.0×1020 cm−3. 4. The silicon carbide semiconductor device according to claim 1, wherein
an arsenic concentration of the n-type semiconductor region is high on a surface side and tends to decrease in a depth direction. 5. The silicon carbide semiconductor device according to claim 1, wherein
an arsenic concentration of the n-type semiconductor region is low on a surface side and tends to increase in a depth direction. 6. The silicon carbide semiconductor device according to claim 1, wherein
the n-type semiconductor region is on a threading screw dislocation of the n-type silicon carbide substrate. 7. The silicon carbide semiconductor device according to claim 1, wherein
an area density of the threading screw dislocation of the n-type silicon carbide substrate is 1/cm2 to 3000/cm2. 8. The silicon carbide semiconductor device according to claim 1, wherein
the silicon carbide semiconductor device is a vertical MOSFET, the p-type silicon carbide region is a channel region, and the n-type semiconductor region is a source region. 9. The silicon carbide semiconductor device according to claim 8, wherein
the silicon carbide semiconductor device is a trench MOSFET. 10. The silicon carbide semiconductor device according to claim 1, wherein
the silicon carbide semiconductor device is a vertical IGBT, the p-type silicon carbide region is a channel region, and the n-type semiconductor region is an emitter region. 11. The silicon carbide semiconductor device according to claim 10, wherein
the silicon carbide semiconductor device is a trench IGBT. 12. A method of manufacturing a silicon carbide semiconductor device, the method comprising:
forming a p-type silicon carbide region on an n-type silicon carbide substrate; and forming an n-type silicon carbide region in at least a region of an upper portion of the p-type silicon carbide region, wherein some of a plurality of the p-type silicon carbide regions are formed to have an impurity concentration equal to or lower than 1.0×1018 cm−3, and the n-type silicon carbide region in the at least the region of the upper portion of the p-type silicon carbide region is formed by ion implantation using arsenic. 13. The method according to claim 12, wherein
the p-type silicon carbide region is formed by an epitaxial growth method. 14. The method according to claim 12, wherein
a concentration of arsenic of the n-type silicon carbide region is 1×1019 cm−3 to 5×1020 cm−3. 15. The method according to claim 12, wherein
the n-type silicon carbide region is formed on a threading screw dislocation of the n-type silicon carbide substrate. 16. The method according to claim 15, wherein
an area density of threading screw dislocations of the n-type silicon carbide substrate is 1/cm2 to 3000/cm2. | 2,800 |
12,008 | 12,008 | 15,681,503 | 2,883 | Keying may be used to indicate various features of cables, cable connectors, and/or equipment. The keying mechanisms of the connectors systems disclosed herein identifies whether each plug is a pinned plug or a pinless plug. The keying mechanisms disclosed herein identify the number of optical fibers terminated at each plug. For example, one type of keying mechanism may indicate a cable plug manufactured under a 40 Gb/sec standard and another type of keying mechanism may indicate a cable plug manufactured under a 100 Gb/sec standard. The keying mechanisms may indicate a cabling/wiring pattern to be used (e.g., indicates a polarity of the cable). The cables and/or plugs may be color coded based on the keying mechanism. Accordingly, the keying may alert a user to the features of the cable that are not readily apparent upon a cursory inspection. | 1. A plug to be inserted into a receptacle having a first geometry, the plug comprising:
a ferule that holds at least one optical fiber; a body having an exterior with a second geometry that corresponds to the first geometry such that the first and second geometries are mating pairs, the second geometry including a keying mechanism that identifies the number of the optical fibers terminated at the plug. 2. The plug as claimed in claim 1, wherein the keying mechanism includes a key. 3. The plug as claimed in claim 1, wherein the keying mechanism is part of a rotational alignment key of the plug. 4. The plug as claimed in claim 1, wherein the plug is color coded based on the keying mechanism. 5. The plug as claimed in claim 1, wherein the plug terminates a patchcord. 6. The plug as claimed in claim 1, wherein the plug includes tactile indicia that correspond to the keying mechanism. 7. The plug as claimed in claim 6, wherein the tactile indicia enable the user to determine the number of fibers terminated by the plug even when the plug is received in the receptacle. 8. The plug as claimed in claim 1, wherein the keying mechanism is disposed at a front of the body. 9. An optical system having a keying mechanism, the optical system comprising:
a first coupler including at least a first coupler port and a second coupler port, the second coupler port of the first coupler forming part of the keying mechanism; and a first patchcord extending between a first end terminated by a first connector and a second end terminated by a second connector, the first patchcord including a plurality of fibers, the first connector of the first patchcord forming a second part of the keying mechanism so that the first connector of the first patchcord plugs into the second coupler port of the first coupler, the keying mechanism identifying an amount of the optical fibers terminated at the first connector. 10. The optical system of claim 9, further comprising:
a second coupler including at least a first coupler port and a second coupler port, the second coupler port of the second coupler forming part of a respective keying mechanism; and a second patchcord having a first connector and a second connector, wherein the second connector of the second patchcord forms another part of the keying mechanism of the second coupler port of the second coupler so that the second connector of the second patchcord plugs into the second coupler port of the second coupler. 11. The optical system of claim 10, wherein the keying mechanism of the first coupler is a first keying mechanism and the keying mechanism of the second coupler is a second keying mechanism that is different from the first keying mechanism. 12. An optical connector for terminating an optical cable, the optical connector comprising:
a connector body holding a ferrule accessible from a front of the connector body; a keying mechanism disposed at the front of the connector body, the keying mechanism identifying an amount of optical fibers terminated at the optical connector; and a tactile indicia disposed at a rear of the connector body, the tactile indicia being associated with the keying mechanism to uniquely identify the keying mechanism. | Keying may be used to indicate various features of cables, cable connectors, and/or equipment. The keying mechanisms of the connectors systems disclosed herein identifies whether each plug is a pinned plug or a pinless plug. The keying mechanisms disclosed herein identify the number of optical fibers terminated at each plug. For example, one type of keying mechanism may indicate a cable plug manufactured under a 40 Gb/sec standard and another type of keying mechanism may indicate a cable plug manufactured under a 100 Gb/sec standard. The keying mechanisms may indicate a cabling/wiring pattern to be used (e.g., indicates a polarity of the cable). The cables and/or plugs may be color coded based on the keying mechanism. Accordingly, the keying may alert a user to the features of the cable that are not readily apparent upon a cursory inspection.1. A plug to be inserted into a receptacle having a first geometry, the plug comprising:
a ferule that holds at least one optical fiber; a body having an exterior with a second geometry that corresponds to the first geometry such that the first and second geometries are mating pairs, the second geometry including a keying mechanism that identifies the number of the optical fibers terminated at the plug. 2. The plug as claimed in claim 1, wherein the keying mechanism includes a key. 3. The plug as claimed in claim 1, wherein the keying mechanism is part of a rotational alignment key of the plug. 4. The plug as claimed in claim 1, wherein the plug is color coded based on the keying mechanism. 5. The plug as claimed in claim 1, wherein the plug terminates a patchcord. 6. The plug as claimed in claim 1, wherein the plug includes tactile indicia that correspond to the keying mechanism. 7. The plug as claimed in claim 6, wherein the tactile indicia enable the user to determine the number of fibers terminated by the plug even when the plug is received in the receptacle. 8. The plug as claimed in claim 1, wherein the keying mechanism is disposed at a front of the body. 9. An optical system having a keying mechanism, the optical system comprising:
a first coupler including at least a first coupler port and a second coupler port, the second coupler port of the first coupler forming part of the keying mechanism; and a first patchcord extending between a first end terminated by a first connector and a second end terminated by a second connector, the first patchcord including a plurality of fibers, the first connector of the first patchcord forming a second part of the keying mechanism so that the first connector of the first patchcord plugs into the second coupler port of the first coupler, the keying mechanism identifying an amount of the optical fibers terminated at the first connector. 10. The optical system of claim 9, further comprising:
a second coupler including at least a first coupler port and a second coupler port, the second coupler port of the second coupler forming part of a respective keying mechanism; and a second patchcord having a first connector and a second connector, wherein the second connector of the second patchcord forms another part of the keying mechanism of the second coupler port of the second coupler so that the second connector of the second patchcord plugs into the second coupler port of the second coupler. 11. The optical system of claim 10, wherein the keying mechanism of the first coupler is a first keying mechanism and the keying mechanism of the second coupler is a second keying mechanism that is different from the first keying mechanism. 12. An optical connector for terminating an optical cable, the optical connector comprising:
a connector body holding a ferrule accessible from a front of the connector body; a keying mechanism disposed at the front of the connector body, the keying mechanism identifying an amount of optical fibers terminated at the optical connector; and a tactile indicia disposed at a rear of the connector body, the tactile indicia being associated with the keying mechanism to uniquely identify the keying mechanism. | 2,800 |
12,009 | 12,009 | 15,306,528 | 2,859 | An electric toothbrush with a rechargeable battery includes a chassis having a rechargeable battery receiving section and a bobbin section, which are integrally formed to each other and are aligned along a common axis in said order. The rechargeable battery receiving section and the bobbin section are connected to each other by a pair of connecting arms extending generally parallel to each other. A rechargeable battery with tongue shaped terminals is accommodated in the rechargeable battery receiving section. In the chassis two openings are formed to have an easy access to the tongue shaped terminals. At a time of disposal of the electric toothbrush, a user can remove the rechargeable battery by cutting the arms to remove the bobbin section, and cutting the tongue shaped terminals to remove the body of the battery. In other embodiments, an inductive charger and method of forming the same is disclosed. | 1. An electric toothbrush with a rechargeable battery comprising:
a chassis having a motor receiving section, a rechargeable battery receiving section and a bobbin section, which are integrally formed to each other and are aligned along a common axis in said order; a DC motor accommodated in the motor receiving section; a rechargeable battery accommodated in the rechargeable battery receiving section; and a coil wound on the bobbin section. 2. The electric toothbrush according to claim 1, wherein the rechargeable battery receiving section and the bobbin section are connected to each other by a pair of connecting arms extending generally parallel to each other. 3. The electric toothbrush according to claim 2, wherein a thickness of each of the connecting arms is thinner than a wall forming the rechargeable battery receiving section and the bobbin section, whereby each of the connecting arms is capable of being cut by a cutting tool. 4. The electric toothbrush according to claim 1, wherein the bobbin section has a circle opening, and the rechargeable battery receiving section has a recessed wall such that a wall of the recessed wall is formed perpendicularly to the common axis and is formed at one end away from the bobbin section, wherein the circle opening of the bobbin section is adapted to fittingly engage with an elongated jig provided in a tool for winding the coil on the bobbin section, and a recess of the recessed wall of the rechargeable battery receiving section is adapted to fittingly receive an end of the elongated jig. 5. The electric toothbrush according to claim 1, further comprising an elongated circuit board mounted on the rechargeable battery receiving section. 6. (canceled) 7. (canceled) 8. (canceled) 9. The electric toothbrush according to claim 1, wherein the rechargeable battery has a cylindrical shape, and has first and second tongue shaped terminals extending from opposite ends of the battery, respectively, in a direction within a plane which is perpendicular to an axis of the cylindrical battery, but not crossing the axis. 10. The electric toothbrush according to claim 9, wherein the rechargeable battery section of the chassis is formed by first and second elongated curved walls opposing to each other, and an elongated center wall located between the first and second elongated curved walls to define an elongated opening for receiving the rechargeable battery such that the first and second tongue shaped terminals are located closer to the second elongated curved wall than the first elongated curved wall. 11. The electric toothbrush according to claim 10, wherein the second elongated curved wall is formed with a first opening adjacent a location where the first tongue shaped terminal exists, and a second opening adjacent a location where the second tongue shaped terminal exists, said first and second openings being formed for inserting a cutting tool to cut off the first and second tongue shaped terminals. 12. The electric toothbrush according to claim 10, further comprising an elongated circuit board mounted on the elongated center wall on a side opposite to a side where the rechargeable battery exists. 13. The electric toothbrush according to claim 10, wherein the elongated circuit board is formed with first and second slits for receiving ends of the first and second tongue shaped terminals. 14. An electric toothbrush with a rechargeable battery comprising:
a chassis having a rechargeable battery receiving section and a bobbin section, which are aligned along a common axis in said order; a pair of connecting arms extending generally parallel to each other for connecting the rechargeable battery receiving section and the bobbin section, the pair of connecting arms, the rechargeable battery receiving section and the bobbin section being formed integrally; a rechargeable battery with tongue shaped terminals being accommodated in the rechargeable battery receiving section; and walls in the chassis for defining two openings to have an easy access to the tongue shaped terminals. 15. An inductive charger for charging an oral care implement comprising:
a housing defining a housing cavity; a partition wall located within the housing that divides the housing cavity into a first chamber and a second chamber; a charging circuit comprising a circuit board, a first charging coil operably coupled to a first portion of the circuit board, and a pair of electrical power supply terminals, the charging circuit located within the housing cavity such that: (1) a first portion of the charging circuit is located within the first chamber, the first portion of the charging circuit comprising the first portion of the circuit board and the first charging coil; and (2) a second portion of the charging circuit is located within the second chamber, the second portion of the charging circuit comprising the pair of electrical power supply terminals; and a potting material in the first chamber that seals the first portion of the charging circuit located within the first chamber, the partition wall preventing the potting material from flowing into the second chamber to seal the pair of electrical power supply terminals of the second portion of the charging circuit. 16. The inductive charger according to claim 15 wherein the charging circuit further comprises a magnetic core, the first charging coil surrounding the magnetic core; and wherein the first portion of the charging circuit comprises the magnetic core, wherein the housing comprises a projection extending from an outer surface of the housing, the magnetic core extending into the projection, wherein the first charging coil surrounds a lower portion of the magnetic core and an upper portion of the magnetic core protrudes from the first charging coil, and wherein the upper portion of the magnetic core is located within the projection. 17. (canceled) 18. (canceled) 19. The inductive charger according to claim 15 wherein the partition wall comprises a through-hole that forms a passageway between the first chamber and the second chamber, the circuit board extending through the through-hole. 20. (canceled) 21. The inductive charger according to claim 19 wherein the through-hole has a closed-geometry and is located below an upper edge of the partition wall. 22. The inductive charger according to claim 19 further comprising:
one or more support members in the housing, the one or more support members comprises a deck located adjacent the through-hole; and
the circuit board positioned atop the one or more support members. 23. (canceled) 24. The inductive charger according to claim 15 wherein an uppermost surface of the circuit board is located below an upper edge of the partition wall. 25. The inductive charger according to claim 15 wherein the pair of electrical power supply terminals are located on a second portion of the circuit board and are not covered by the potting material. 26. (canceled) 27. (canceled) 28. An oral care implement assembly comprising:
the inductive charger according to claim 15; and an oral care implement comprising:
a rechargeable battery; and
a second charging coil operably coupled to the rechargeable battery and configured for inductance charging of the rechargeable battery when operably in cooperation with the first charging coil. 29. (canceled) 30. A method of forming an inductive charger for charging an oral care implement, the method comprising:
a) providing a housing defining a housing cavity, a partition wall located within the housing that divides the housing cavity into a first chamber and a second chamber; b) positioning a charging circuit comprising a circuit board, a first charging coil operably coupled to a first portion of the circuit board, and a pair of electrical power supply terminals in the housing cavity such that: (1) a first portion of the charging circuit is located within the first chamber, the first portion of the charging circuit comprising the first portion of the circuit board and the first charging coil; and (2) a second portion of the charging circuit is located within the second chamber, the second portion of the charging circuit comprising the pair of electrical power supply terminals; and c) flowing a potting material into the first chamber to seal the first portion of the charging circuit located within the first chamber, the partition wall preventing the potting material from flowing into the second chamber to seal the pair of electrical power supply terminals of the second portion of the charging circuit. 31. (canceled) 32. (canceled) 33. (canceled) 34. An electric toothbrush handle comprising:
a body; a stem extending from the body, the stem configured to be repetitively coupled and decoupled to a refill head; a motor; a connecting rod operably coupled to the motor for rotation about an axis, the connecting rod comprising a first portion formed a first material and an eccentric portion formed of a second material that is different than the first material; the eccentric portion comprising a lower transverse section, an upper transverse section axially spaced from the lower transverse section, a first axial section extending downwardly from the lower transverse section, a second axial section extending upwardly from the upper transverse section, and an offset axial section extending between and connecting the upper and lower transverse sections; the first portion comprising a bore and an upper flange; and the first axial section located within the bore and the upper flange positioned above and overlying at least a portion of the lower transverse section. 35. The electric toothbrush handle according to claim 33 wherein the first material is a plastic and the second material is a metal, wherein at least the eccentric portion of the connecting rod is located within a cavity of the stem, wherein the stem comprises a recessed hole at an upper end of the cavity, the second axial section located within the recess and in direct contact with an inner surface of the stem, and wherein the stem is formed of a self-lubricating plastic. 36. (canceled) 37. (canceled) 38. (canceled) | An electric toothbrush with a rechargeable battery includes a chassis having a rechargeable battery receiving section and a bobbin section, which are integrally formed to each other and are aligned along a common axis in said order. The rechargeable battery receiving section and the bobbin section are connected to each other by a pair of connecting arms extending generally parallel to each other. A rechargeable battery with tongue shaped terminals is accommodated in the rechargeable battery receiving section. In the chassis two openings are formed to have an easy access to the tongue shaped terminals. At a time of disposal of the electric toothbrush, a user can remove the rechargeable battery by cutting the arms to remove the bobbin section, and cutting the tongue shaped terminals to remove the body of the battery. In other embodiments, an inductive charger and method of forming the same is disclosed.1. An electric toothbrush with a rechargeable battery comprising:
a chassis having a motor receiving section, a rechargeable battery receiving section and a bobbin section, which are integrally formed to each other and are aligned along a common axis in said order; a DC motor accommodated in the motor receiving section; a rechargeable battery accommodated in the rechargeable battery receiving section; and a coil wound on the bobbin section. 2. The electric toothbrush according to claim 1, wherein the rechargeable battery receiving section and the bobbin section are connected to each other by a pair of connecting arms extending generally parallel to each other. 3. The electric toothbrush according to claim 2, wherein a thickness of each of the connecting arms is thinner than a wall forming the rechargeable battery receiving section and the bobbin section, whereby each of the connecting arms is capable of being cut by a cutting tool. 4. The electric toothbrush according to claim 1, wherein the bobbin section has a circle opening, and the rechargeable battery receiving section has a recessed wall such that a wall of the recessed wall is formed perpendicularly to the common axis and is formed at one end away from the bobbin section, wherein the circle opening of the bobbin section is adapted to fittingly engage with an elongated jig provided in a tool for winding the coil on the bobbin section, and a recess of the recessed wall of the rechargeable battery receiving section is adapted to fittingly receive an end of the elongated jig. 5. The electric toothbrush according to claim 1, further comprising an elongated circuit board mounted on the rechargeable battery receiving section. 6. (canceled) 7. (canceled) 8. (canceled) 9. The electric toothbrush according to claim 1, wherein the rechargeable battery has a cylindrical shape, and has first and second tongue shaped terminals extending from opposite ends of the battery, respectively, in a direction within a plane which is perpendicular to an axis of the cylindrical battery, but not crossing the axis. 10. The electric toothbrush according to claim 9, wherein the rechargeable battery section of the chassis is formed by first and second elongated curved walls opposing to each other, and an elongated center wall located between the first and second elongated curved walls to define an elongated opening for receiving the rechargeable battery such that the first and second tongue shaped terminals are located closer to the second elongated curved wall than the first elongated curved wall. 11. The electric toothbrush according to claim 10, wherein the second elongated curved wall is formed with a first opening adjacent a location where the first tongue shaped terminal exists, and a second opening adjacent a location where the second tongue shaped terminal exists, said first and second openings being formed for inserting a cutting tool to cut off the first and second tongue shaped terminals. 12. The electric toothbrush according to claim 10, further comprising an elongated circuit board mounted on the elongated center wall on a side opposite to a side where the rechargeable battery exists. 13. The electric toothbrush according to claim 10, wherein the elongated circuit board is formed with first and second slits for receiving ends of the first and second tongue shaped terminals. 14. An electric toothbrush with a rechargeable battery comprising:
a chassis having a rechargeable battery receiving section and a bobbin section, which are aligned along a common axis in said order; a pair of connecting arms extending generally parallel to each other for connecting the rechargeable battery receiving section and the bobbin section, the pair of connecting arms, the rechargeable battery receiving section and the bobbin section being formed integrally; a rechargeable battery with tongue shaped terminals being accommodated in the rechargeable battery receiving section; and walls in the chassis for defining two openings to have an easy access to the tongue shaped terminals. 15. An inductive charger for charging an oral care implement comprising:
a housing defining a housing cavity; a partition wall located within the housing that divides the housing cavity into a first chamber and a second chamber; a charging circuit comprising a circuit board, a first charging coil operably coupled to a first portion of the circuit board, and a pair of electrical power supply terminals, the charging circuit located within the housing cavity such that: (1) a first portion of the charging circuit is located within the first chamber, the first portion of the charging circuit comprising the first portion of the circuit board and the first charging coil; and (2) a second portion of the charging circuit is located within the second chamber, the second portion of the charging circuit comprising the pair of electrical power supply terminals; and a potting material in the first chamber that seals the first portion of the charging circuit located within the first chamber, the partition wall preventing the potting material from flowing into the second chamber to seal the pair of electrical power supply terminals of the second portion of the charging circuit. 16. The inductive charger according to claim 15 wherein the charging circuit further comprises a magnetic core, the first charging coil surrounding the magnetic core; and wherein the first portion of the charging circuit comprises the magnetic core, wherein the housing comprises a projection extending from an outer surface of the housing, the magnetic core extending into the projection, wherein the first charging coil surrounds a lower portion of the magnetic core and an upper portion of the magnetic core protrudes from the first charging coil, and wherein the upper portion of the magnetic core is located within the projection. 17. (canceled) 18. (canceled) 19. The inductive charger according to claim 15 wherein the partition wall comprises a through-hole that forms a passageway between the first chamber and the second chamber, the circuit board extending through the through-hole. 20. (canceled) 21. The inductive charger according to claim 19 wherein the through-hole has a closed-geometry and is located below an upper edge of the partition wall. 22. The inductive charger according to claim 19 further comprising:
one or more support members in the housing, the one or more support members comprises a deck located adjacent the through-hole; and
the circuit board positioned atop the one or more support members. 23. (canceled) 24. The inductive charger according to claim 15 wherein an uppermost surface of the circuit board is located below an upper edge of the partition wall. 25. The inductive charger according to claim 15 wherein the pair of electrical power supply terminals are located on a second portion of the circuit board and are not covered by the potting material. 26. (canceled) 27. (canceled) 28. An oral care implement assembly comprising:
the inductive charger according to claim 15; and an oral care implement comprising:
a rechargeable battery; and
a second charging coil operably coupled to the rechargeable battery and configured for inductance charging of the rechargeable battery when operably in cooperation with the first charging coil. 29. (canceled) 30. A method of forming an inductive charger for charging an oral care implement, the method comprising:
a) providing a housing defining a housing cavity, a partition wall located within the housing that divides the housing cavity into a first chamber and a second chamber; b) positioning a charging circuit comprising a circuit board, a first charging coil operably coupled to a first portion of the circuit board, and a pair of electrical power supply terminals in the housing cavity such that: (1) a first portion of the charging circuit is located within the first chamber, the first portion of the charging circuit comprising the first portion of the circuit board and the first charging coil; and (2) a second portion of the charging circuit is located within the second chamber, the second portion of the charging circuit comprising the pair of electrical power supply terminals; and c) flowing a potting material into the first chamber to seal the first portion of the charging circuit located within the first chamber, the partition wall preventing the potting material from flowing into the second chamber to seal the pair of electrical power supply terminals of the second portion of the charging circuit. 31. (canceled) 32. (canceled) 33. (canceled) 34. An electric toothbrush handle comprising:
a body; a stem extending from the body, the stem configured to be repetitively coupled and decoupled to a refill head; a motor; a connecting rod operably coupled to the motor for rotation about an axis, the connecting rod comprising a first portion formed a first material and an eccentric portion formed of a second material that is different than the first material; the eccentric portion comprising a lower transverse section, an upper transverse section axially spaced from the lower transverse section, a first axial section extending downwardly from the lower transverse section, a second axial section extending upwardly from the upper transverse section, and an offset axial section extending between and connecting the upper and lower transverse sections; the first portion comprising a bore and an upper flange; and the first axial section located within the bore and the upper flange positioned above and overlying at least a portion of the lower transverse section. 35. The electric toothbrush handle according to claim 33 wherein the first material is a plastic and the second material is a metal, wherein at least the eccentric portion of the connecting rod is located within a cavity of the stem, wherein the stem comprises a recessed hole at an upper end of the cavity, the second axial section located within the recess and in direct contact with an inner surface of the stem, and wherein the stem is formed of a self-lubricating plastic. 36. (canceled) 37. (canceled) 38. (canceled) | 2,800 |
12,010 | 12,010 | 15,040,518 | 2,872 | Disclosed are lenses and methods for verifying a lens with an induced aperture. The lenses can have a geometry that, among other things, maintains a centered position about a wearer's eye to prevent more than a permissible amount of movement of the lens relative to the eye. Further disclosed is a method for verifying the power profiles used with the lens, and a lens that can have a single power profile for a wide range of presbyopia. | 1. An ophthalmic lens comprising:
an apex area having distance vision correcting power and a power distribution creating a blurred region outside of the apex area so as to cause an induced aperture; a base curve between 7.9 mm and 8.5 mm; and a lens diameter between 14.0 and 14.5 mm. 2. The ophthalmic lens of claim 1, wherein the base curve is between 8.1 mm and 8.3 mm. 3. The ophthalmic lens of claim 1, further comprising a thickness profile having a center thickness of 100-120 microns, and a peripheral thickness of 220-310 microns. 4. The ophthalmic lens of claim 1, wherein the lens is made of polymacon, and further comprising a power profile having an aperture inducing power rise between +2.00 to +2.75. 5. The ophthalmic lens of claim 1, wherein the lens diameter is between 14.3 mm to 14.5 mm. 6. The ophthalmic lens of claim 4, wherein the aperture inducing power rise is a front surface tangential power rise as determined at the 1.5 mm radius away from a center of the apex area. 7. The ophthalmic lens of claim 1, wherein the lens is made of etafilcon, and further comprising a power profile having an aperture inducing power rise between +2.375 to +3.125 diopters. 8. The ophthalmic lens of claim 1, wherein a sag of the lens is between about 3.7 mm to 4.75 mm. 9. The ophthalmic lens of claim 8, wherein the sag of the lens is between about 3.9 mm to 4.75 mm. 10. The ophthalmic lens of claim 9, wherein the sag of the lens is between about 4.05 mm to 4.5 mm. 11. The ophthalmic lens of claim 7, wherein the aperture inducing power rise is a front surface tangential power rise as determined at the 1.5 mm radius away from a center of the apex area. 12. The ophthalmic lens of claim 1, wherein the lens is made of silicon hydrogel, and further comprising a power profile having an aperture inducing power rise between +2.00 to +3.25 diopters. 13. The ophthalmic lens of claim 1, wherein an edge thickness is 145 microns as measured at 0.3 mm in from an edge of the lens. 14. The ophthalmic lens of claim 1, further comprising a scotopic ring outside of the apex area and blurred region. 15. The ophthalmic lens of claim 14, wherein the scotopic ring begins at least 3.0 mm away from a center of the apex area. 16. An ophthalmic lens comprising:
an apex area having distance vision correcting power and a power distribution creating a blurred region outside of the apex area so as to cause an induced aperture, wherein the lens is made of polymacon, and wherein the power distribution includes a power profile having an aperture inducing power rise between +2.00 to +2.75 diopters. 17. The ophthalmic lens of claim 16, wherein the aperture inducing power rise is a front surface tangential power rise as determined at the 1.5 mm radius away from a center of the apex area. 18. An ophthalmic lens comprising:
an apex area having distance vision correcting power and a power distribution creating a blurred region outside of the apex area so as to cause an induced aperture, wherein the lens is made of etafilcon, and wherein the power distribution includes an aperture inducing power rise between +2.375 to +3.125. 19. The ophthalmic lens of claim 18, wherein the aperture inducing power rise is a front surface tangential power rise as determined at the 1.5 mm radius away from a center of the apex area. 20. An ophthalmic lens comprising:
an apex area having distance vision correcting power and a power distribution creating a blurred region outside of the apex area so as to cause an induced aperture, wherein the power distribution includes an aperture inducing power rise between +2.00 to +3.25 diopters. 21. The ophthalmic lens of claim 20, wherein the lens is made of silicon hydrogel. 22. An ophthalmic lens for a user requiring a labeled power for clear vision, the ophthalmic lens comprising:
an apex area having distance vision correcting power and a power distribution creating a blurred region outside of the apex area so as to cause an induced aperture, wherein the labeled power is an area weighted average of a sagittal power as a function of radius from a lens center. 23. The ophthalmic lens of claim 22, wherein the area weighted average is calculated from the lens center to about 2.00 mm from the lens center. 24. The ophthalmic lens of claim 22, wherein the labeled power is calculated according to the following equation:
Labeled
Power
=
∑
r
=
0
1
(
P
(
r
)
*
(
2
π
r
)
)
∑
r
=
0
1
(
2
π
r
)
where P(r) is a sagittal power of the lens as a function of a radius r from a lens center. 25. The ophthalmic lens of claim 22, wherein the power distribution includes an aperture inducing power calculated according to the following equation:
Aper
.
Ind
.
Power
=
∑
r
=
0
2
(
P
(
r
)
*
(
2
π
r
)
)
-
∑
r
=
0
1
(
P
(
r
)
*
(
2
π
r
)
)
∑
r
=
0
2
(
2
π
r
)
-
∑
r
=
0
1
(
2
π
r
)
-
Labeled
Power
where P(r) is the sagittal power of the lens as a function of the radius r from the lens center. 26. A combination of an ophthalmic lens and a package containing the ophthalmic lens, the combination comprising:
the ophthalmic lens including an apex area having distance vision correcting power and a power distribution creating a blurred region outside of the apex area so as to cause an induced aperture; and the package being marked with a labeled power that is substantially equivalent to an area weighted average of a sagittal power as a function of radius from a lens center. 27. The combination of claim 26, wherein the area weighted average is calculated from the lens center to about 2.00 mm from the lens center. 28. The combination of claim 27, wherein the labeled power is calculated according to the following equation:
Labeled
Power
=
∑
r
=
0
1
(
P
(
r
)
*
(
2
π
r
)
)
∑
r
=
0
1
(
2
π
r
)
where P(r) is a sagittal power of the lens as a function of a radius r from a lens center. 29. The combination of claim 27, wherein the power distribution includes an aperture inducing power calculated according to the following equation:
Aperture
Ind
.
Power
=
∑
r
=
0
2
(
P
(
r
)
*
(
2
π
r
)
)
-
∑
r
=
0
1
(
P
(
r
)
*
(
2
π
r
)
)
∑
r
=
0
2
(
2
π
r
)
-
∑
r
=
0
1
(
2
π
r
)
-
Labeled
Power
where P(r) is the sagittal power as a function of the radius r from lens center. 30. An ophthalmic lens comprising:
an apex area having distance vision correcting power and a power distribution creating a blurred region outside of the apex area so as to cause an induced aperture, wherein the lens has a sag between about 3.7 mm and 4.75 mm. 31. The ophthalmic lens of claim 30, wherein the sag of the lens is between about 3.9 mm to 4.75 mm. 32. The ophthalmic lens of claim 31, wherein the sag of the lens is between about 4.05 mm to 4.5 mm. | Disclosed are lenses and methods for verifying a lens with an induced aperture. The lenses can have a geometry that, among other things, maintains a centered position about a wearer's eye to prevent more than a permissible amount of movement of the lens relative to the eye. Further disclosed is a method for verifying the power profiles used with the lens, and a lens that can have a single power profile for a wide range of presbyopia.1. An ophthalmic lens comprising:
an apex area having distance vision correcting power and a power distribution creating a blurred region outside of the apex area so as to cause an induced aperture; a base curve between 7.9 mm and 8.5 mm; and a lens diameter between 14.0 and 14.5 mm. 2. The ophthalmic lens of claim 1, wherein the base curve is between 8.1 mm and 8.3 mm. 3. The ophthalmic lens of claim 1, further comprising a thickness profile having a center thickness of 100-120 microns, and a peripheral thickness of 220-310 microns. 4. The ophthalmic lens of claim 1, wherein the lens is made of polymacon, and further comprising a power profile having an aperture inducing power rise between +2.00 to +2.75. 5. The ophthalmic lens of claim 1, wherein the lens diameter is between 14.3 mm to 14.5 mm. 6. The ophthalmic lens of claim 4, wherein the aperture inducing power rise is a front surface tangential power rise as determined at the 1.5 mm radius away from a center of the apex area. 7. The ophthalmic lens of claim 1, wherein the lens is made of etafilcon, and further comprising a power profile having an aperture inducing power rise between +2.375 to +3.125 diopters. 8. The ophthalmic lens of claim 1, wherein a sag of the lens is between about 3.7 mm to 4.75 mm. 9. The ophthalmic lens of claim 8, wherein the sag of the lens is between about 3.9 mm to 4.75 mm. 10. The ophthalmic lens of claim 9, wherein the sag of the lens is between about 4.05 mm to 4.5 mm. 11. The ophthalmic lens of claim 7, wherein the aperture inducing power rise is a front surface tangential power rise as determined at the 1.5 mm radius away from a center of the apex area. 12. The ophthalmic lens of claim 1, wherein the lens is made of silicon hydrogel, and further comprising a power profile having an aperture inducing power rise between +2.00 to +3.25 diopters. 13. The ophthalmic lens of claim 1, wherein an edge thickness is 145 microns as measured at 0.3 mm in from an edge of the lens. 14. The ophthalmic lens of claim 1, further comprising a scotopic ring outside of the apex area and blurred region. 15. The ophthalmic lens of claim 14, wherein the scotopic ring begins at least 3.0 mm away from a center of the apex area. 16. An ophthalmic lens comprising:
an apex area having distance vision correcting power and a power distribution creating a blurred region outside of the apex area so as to cause an induced aperture, wherein the lens is made of polymacon, and wherein the power distribution includes a power profile having an aperture inducing power rise between +2.00 to +2.75 diopters. 17. The ophthalmic lens of claim 16, wherein the aperture inducing power rise is a front surface tangential power rise as determined at the 1.5 mm radius away from a center of the apex area. 18. An ophthalmic lens comprising:
an apex area having distance vision correcting power and a power distribution creating a blurred region outside of the apex area so as to cause an induced aperture, wherein the lens is made of etafilcon, and wherein the power distribution includes an aperture inducing power rise between +2.375 to +3.125. 19. The ophthalmic lens of claim 18, wherein the aperture inducing power rise is a front surface tangential power rise as determined at the 1.5 mm radius away from a center of the apex area. 20. An ophthalmic lens comprising:
an apex area having distance vision correcting power and a power distribution creating a blurred region outside of the apex area so as to cause an induced aperture, wherein the power distribution includes an aperture inducing power rise between +2.00 to +3.25 diopters. 21. The ophthalmic lens of claim 20, wherein the lens is made of silicon hydrogel. 22. An ophthalmic lens for a user requiring a labeled power for clear vision, the ophthalmic lens comprising:
an apex area having distance vision correcting power and a power distribution creating a blurred region outside of the apex area so as to cause an induced aperture, wherein the labeled power is an area weighted average of a sagittal power as a function of radius from a lens center. 23. The ophthalmic lens of claim 22, wherein the area weighted average is calculated from the lens center to about 2.00 mm from the lens center. 24. The ophthalmic lens of claim 22, wherein the labeled power is calculated according to the following equation:
Labeled
Power
=
∑
r
=
0
1
(
P
(
r
)
*
(
2
π
r
)
)
∑
r
=
0
1
(
2
π
r
)
where P(r) is a sagittal power of the lens as a function of a radius r from a lens center. 25. The ophthalmic lens of claim 22, wherein the power distribution includes an aperture inducing power calculated according to the following equation:
Aper
.
Ind
.
Power
=
∑
r
=
0
2
(
P
(
r
)
*
(
2
π
r
)
)
-
∑
r
=
0
1
(
P
(
r
)
*
(
2
π
r
)
)
∑
r
=
0
2
(
2
π
r
)
-
∑
r
=
0
1
(
2
π
r
)
-
Labeled
Power
where P(r) is the sagittal power of the lens as a function of the radius r from the lens center. 26. A combination of an ophthalmic lens and a package containing the ophthalmic lens, the combination comprising:
the ophthalmic lens including an apex area having distance vision correcting power and a power distribution creating a blurred region outside of the apex area so as to cause an induced aperture; and the package being marked with a labeled power that is substantially equivalent to an area weighted average of a sagittal power as a function of radius from a lens center. 27. The combination of claim 26, wherein the area weighted average is calculated from the lens center to about 2.00 mm from the lens center. 28. The combination of claim 27, wherein the labeled power is calculated according to the following equation:
Labeled
Power
=
∑
r
=
0
1
(
P
(
r
)
*
(
2
π
r
)
)
∑
r
=
0
1
(
2
π
r
)
where P(r) is a sagittal power of the lens as a function of a radius r from a lens center. 29. The combination of claim 27, wherein the power distribution includes an aperture inducing power calculated according to the following equation:
Aperture
Ind
.
Power
=
∑
r
=
0
2
(
P
(
r
)
*
(
2
π
r
)
)
-
∑
r
=
0
1
(
P
(
r
)
*
(
2
π
r
)
)
∑
r
=
0
2
(
2
π
r
)
-
∑
r
=
0
1
(
2
π
r
)
-
Labeled
Power
where P(r) is the sagittal power as a function of the radius r from lens center. 30. An ophthalmic lens comprising:
an apex area having distance vision correcting power and a power distribution creating a blurred region outside of the apex area so as to cause an induced aperture, wherein the lens has a sag between about 3.7 mm and 4.75 mm. 31. The ophthalmic lens of claim 30, wherein the sag of the lens is between about 3.9 mm to 4.75 mm. 32. The ophthalmic lens of claim 31, wherein the sag of the lens is between about 4.05 mm to 4.5 mm. | 2,800 |
12,011 | 12,011 | 15,608,071 | 2,836 | An integrated circuit for demagnetizing an inductive load includes a first switch to control current supplied by a voltage supply to the inductive load. A Zener diode includes an anode connected to a control terminal of the first switch and a cathode connected to the voltage supply. A second switch includes a control terminal and first and second terminals. A temperature sensing circuit is configured to sense a temperature of the first switch and to generate a sensed temperature. A comparing circuit includes inputs that receive a reference temperature and the sensed temperature and an output connected to the control terminal of the second switch. | 1-20. (canceled) 21. A discharge circuit for an inductive load, comprising:
a clamp circuit connected between a first reference potential and an output node, wherein the inductive load is connected to the output node; a temperature sensing circuit to generate a sensed temperature signal based on a temperature of the clamp circuit; and a first circuit including:
a first switch connected between the output node and a second reference potential; and
a comparing circuit to selectively open and close the switch based on the sensed temperature signal. 22. The discharge circuit of claim 21, wherein the clamp circuit includes:
a second switch having a first terminal connected to the first reference potential and a second terminal connected to the output node; and a Zener diode having an anode connected to the output node and a cathode connected to the first reference potential. 23. The discharge circuit of claim 22, wherein:
the first switch comprises first and second transistors including (DMOS) field effect transistor (FETs); and the second switch comprises a double-diffused metal oxide semiconductor DMOS FET. 24. The discharge circuit of claim 22, wherein the comparing circuit turns on the second switch when the sensed temperature signal is greater than a reference temperature signal and turns off the second switch when the sensed temperature signal falls below the reference temperature signal. 25. The discharge circuit of claim 22, wherein the comparing circuit turns on the second switch when the sensed temperature signal is greater than a reference temperature signal by a predetermined amount and turns off the second switch when the sensed temperature signal falls below the reference temperature signal by the predetermined amount. 26. The discharge circuit of claim 22, wherein:
the first switch includes first and second transistors including body to epitaxial diodes; and the second switch comprises a transistor including a body to epitaxial diode. 27. The discharge circuit of claim 21, wherein the discharge circuit is implemented as an integrated circuit. 28. A discharge circuit for an inductive load, comprising:
a first circuit including a first switch and a Zener diode, wherein the first circuit is connected to a first reference potential; a second switch connected to the first circuit and a second reference potential; an inductive load having a first terminal connected to the first circuit and the second switch and a second terminal connected to the second reference potential; and a second circuit to:
turn off the second switch when a sensed temperature signal corresponding to the first circuit is less than a reference temperature signal to cause power to be dissipated from the inductive load by the first circuit at a first rate; and
in response to the temperature of the first circuit being greater than or equal to the reference temperature signal, turn on the second switch to cause power to be dissipated from the inductive load by the second switch at a second rate that is less than the first rate. 29. The discharge circuit of claim 28, wherein:
the first switch comprises a double-diffused metal oxide semiconductor (DMOS) field effect transistor (FET); and the second switch comprises first and second transistors including DMOS FETs. 30. The discharge circuit of claim 28, wherein the second circuit turns on the second switch when the sensed temperature signal is greater than the reference temperature signal and turns off the second switch when the sensed temperature signal falls below the reference temperature signal. 31. The discharge circuit of claim 28, wherein the second circuit comprises a comparing circuit. 32. The discharge circuit of claim 28, wherein:
the second switch dissipates current at the second rate until the sensed temperature signal falls below the reference temperature signal by a predetermined amount the second switch dissipates current at the first rate after the sensed temperature signal falls below the reference temperature signal by the predetermined amount. 33. The discharge circuit of claim 28, wherein:
the first switch comprises a transistor including a body to epitaxial diode; and the second switch includes first and second transistors including body to epitaxial diodes. 34. The discharge circuit of claim 28, wherein the discharge circuit is implemented as an integrated circuit. | An integrated circuit for demagnetizing an inductive load includes a first switch to control current supplied by a voltage supply to the inductive load. A Zener diode includes an anode connected to a control terminal of the first switch and a cathode connected to the voltage supply. A second switch includes a control terminal and first and second terminals. A temperature sensing circuit is configured to sense a temperature of the first switch and to generate a sensed temperature. A comparing circuit includes inputs that receive a reference temperature and the sensed temperature and an output connected to the control terminal of the second switch.1-20. (canceled) 21. A discharge circuit for an inductive load, comprising:
a clamp circuit connected between a first reference potential and an output node, wherein the inductive load is connected to the output node; a temperature sensing circuit to generate a sensed temperature signal based on a temperature of the clamp circuit; and a first circuit including:
a first switch connected between the output node and a second reference potential; and
a comparing circuit to selectively open and close the switch based on the sensed temperature signal. 22. The discharge circuit of claim 21, wherein the clamp circuit includes:
a second switch having a first terminal connected to the first reference potential and a second terminal connected to the output node; and a Zener diode having an anode connected to the output node and a cathode connected to the first reference potential. 23. The discharge circuit of claim 22, wherein:
the first switch comprises first and second transistors including (DMOS) field effect transistor (FETs); and the second switch comprises a double-diffused metal oxide semiconductor DMOS FET. 24. The discharge circuit of claim 22, wherein the comparing circuit turns on the second switch when the sensed temperature signal is greater than a reference temperature signal and turns off the second switch when the sensed temperature signal falls below the reference temperature signal. 25. The discharge circuit of claim 22, wherein the comparing circuit turns on the second switch when the sensed temperature signal is greater than a reference temperature signal by a predetermined amount and turns off the second switch when the sensed temperature signal falls below the reference temperature signal by the predetermined amount. 26. The discharge circuit of claim 22, wherein:
the first switch includes first and second transistors including body to epitaxial diodes; and the second switch comprises a transistor including a body to epitaxial diode. 27. The discharge circuit of claim 21, wherein the discharge circuit is implemented as an integrated circuit. 28. A discharge circuit for an inductive load, comprising:
a first circuit including a first switch and a Zener diode, wherein the first circuit is connected to a first reference potential; a second switch connected to the first circuit and a second reference potential; an inductive load having a first terminal connected to the first circuit and the second switch and a second terminal connected to the second reference potential; and a second circuit to:
turn off the second switch when a sensed temperature signal corresponding to the first circuit is less than a reference temperature signal to cause power to be dissipated from the inductive load by the first circuit at a first rate; and
in response to the temperature of the first circuit being greater than or equal to the reference temperature signal, turn on the second switch to cause power to be dissipated from the inductive load by the second switch at a second rate that is less than the first rate. 29. The discharge circuit of claim 28, wherein:
the first switch comprises a double-diffused metal oxide semiconductor (DMOS) field effect transistor (FET); and the second switch comprises first and second transistors including DMOS FETs. 30. The discharge circuit of claim 28, wherein the second circuit turns on the second switch when the sensed temperature signal is greater than the reference temperature signal and turns off the second switch when the sensed temperature signal falls below the reference temperature signal. 31. The discharge circuit of claim 28, wherein the second circuit comprises a comparing circuit. 32. The discharge circuit of claim 28, wherein:
the second switch dissipates current at the second rate until the sensed temperature signal falls below the reference temperature signal by a predetermined amount the second switch dissipates current at the first rate after the sensed temperature signal falls below the reference temperature signal by the predetermined amount. 33. The discharge circuit of claim 28, wherein:
the first switch comprises a transistor including a body to epitaxial diode; and the second switch includes first and second transistors including body to epitaxial diodes. 34. The discharge circuit of claim 28, wherein the discharge circuit is implemented as an integrated circuit. | 2,800 |
12,012 | 12,012 | 16,115,828 | 2,851 | A method for design optimization of a quantum circuit includes analyzing a first quantum circuit design based on at least one of a set of design criteria, wherein the first quantum circuit design includes a set of quantum logic gates, and wherein a design criterion in the set of design criteria includes changing a size of a matrix of transformations corresponding to a number of qubits employed in the first quantum circuit design. The embodiment further includes in the method modifying the first quantum circuit design into a transformed quantum circuit design, the modifying causing the transformed quantum circuit design to perform an operation implemented in the first quantum circuit design with a changed matrix of transformations. | 1. A method for design optimization of a quantum circuit, comprising:
analyzing a first quantum circuit design based on at least one of a set of design criteria, wherein the first quantum circuit design comprises a set of quantum logic gates, and wherein a design criterion in the set of design criteria comprises changing a size of a matrix of transformations corresponding to a number of qubits employed in the first quantum circuit design; and modifying the first quantum circuit design into a transformed quantum circuit design, the modifying causing the transformed quantum circuit design to perform an operation implemented in the first quantum circuit design with a changed matrix of transformations. 2. The method of claim 1, further comprising decomposing a first quantum logic gate of the transformed quantum circuit design into at least two quantum logic gates. 3. The method of claim 1, further comprising reducing a total number of quantum logic gates of the first quantum circuit design. 4. The method of claim 1, further comprising replacing at least one quantum logic gate. 5. The method of claim 1, wherein analyzing the first quantum circuit design further comprises determining a depth of the first quantum circuit design. 6. The method of claim 1, further comprising analyzing the transformed quantum circuit design to determine a depth of the transformed quantum circuit design. 7. The method of claim 1, wherein analyzing the first quantum circuit design further comprises determining a first entanglement state of a first qubit. 8. The method of claim 7, further comprising analyzing the transformed quantum circuit design to determine a second entanglement state of the first qubit. 9. The method of claim 1, further comprising:
decomposing each instance of a single type of quantum logic gate. 10. The method of claim 1, wherein a total number of logic gates of the transformed quantum circuit design is less than a total number of logic gates of the first quantum circuit design. 11. A computer usable program product comprising a computer-readable storage device, and program instructions stored on the storage device, the stored program instructions comprising:
program instructions to analyze a first quantum circuit design based on at least one of a set of design criteria, wherein the first quantum circuit design comprises a set of quantum logic gates, and wherein a design criterion in the set of design criteria comprises changing a size of a matrix of transformations corresponding to a number of qubits employed in the first quantum circuit design; and program instructions to modify the first quantum circuit design into a transformed quantum circuit design, the modifying causing the transformed quantum circuit design to perform an operation implemented in the first quantum circuit design with a changed matrix of transformations. 12. The computer usable program product of claim 11, wherein the computer usable code is stored in a computer readable storage device in a data processing system, and wherein the computer usable code is transferred over a network from a remote data processing system. 13. The computer usable program product of claim 11, wherein the computer usable code is stored in a computer readable storage device in a server data processing system, and wherein the computer usable code is downloaded over a network to a remote data processing system for use in a computer readable storage device associated with the remote data processing system. 14. The computer usable program product of claim 11, the stored program instructions further comprising:
program instructions to decompose a first quantum logic gate of the transformed quantum circuit design into at least two quantum logic gates. 15. The computer usable program product of claim 11, the stored program instructions further comprising:
program instructions to reduce a total number of quantum logic gates of the first quantum circuit design. 16. The computer usable program product of claim 11, the stored program instructions further comprising:
program instructions to replace at least one quantum logic gate. 17. The computer usable program product of claim 11, wherein program instructions to analyze the first quantum circuit design further comprises:
program instructions to determine a depth of the first quantum circuit design. 18. The computer usable program product of claim 11, the stored program instructions further comprising:
program instructions to analyze the transformed quantum circuit design to determine a depth of the transformed quantum circuit design. 19. The computer usable program product of claim 11, the stored program instructions further comprising:
program instructions to decompose each instance of a single type of quantum logic gate. 20. A computer system comprising a processor, a computer-readable memory, and a computer-readable storage device, and program instructions stored on the storage device for execution by the processor via the memory, the stored program instructions comprising:
program instructions to analyze a first quantum circuit design based on at least one of a set of design criteria, wherein the first quantum circuit design comprises a set of quantum logic gates, and wherein a design criterion in the set of design criteria comprises changing a size of a matrix of transformations corresponding to a number of qubits employed in the quantum circuit design; and program instructions to modify the first quantum circuit design into a transformed quantum circuit design, the modifying causing the transformed quantum circuit design to perform an operation implemented in the first quantum circuit design with a changed matrix of transformations. | A method for design optimization of a quantum circuit includes analyzing a first quantum circuit design based on at least one of a set of design criteria, wherein the first quantum circuit design includes a set of quantum logic gates, and wherein a design criterion in the set of design criteria includes changing a size of a matrix of transformations corresponding to a number of qubits employed in the first quantum circuit design. The embodiment further includes in the method modifying the first quantum circuit design into a transformed quantum circuit design, the modifying causing the transformed quantum circuit design to perform an operation implemented in the first quantum circuit design with a changed matrix of transformations.1. A method for design optimization of a quantum circuit, comprising:
analyzing a first quantum circuit design based on at least one of a set of design criteria, wherein the first quantum circuit design comprises a set of quantum logic gates, and wherein a design criterion in the set of design criteria comprises changing a size of a matrix of transformations corresponding to a number of qubits employed in the first quantum circuit design; and modifying the first quantum circuit design into a transformed quantum circuit design, the modifying causing the transformed quantum circuit design to perform an operation implemented in the first quantum circuit design with a changed matrix of transformations. 2. The method of claim 1, further comprising decomposing a first quantum logic gate of the transformed quantum circuit design into at least two quantum logic gates. 3. The method of claim 1, further comprising reducing a total number of quantum logic gates of the first quantum circuit design. 4. The method of claim 1, further comprising replacing at least one quantum logic gate. 5. The method of claim 1, wherein analyzing the first quantum circuit design further comprises determining a depth of the first quantum circuit design. 6. The method of claim 1, further comprising analyzing the transformed quantum circuit design to determine a depth of the transformed quantum circuit design. 7. The method of claim 1, wherein analyzing the first quantum circuit design further comprises determining a first entanglement state of a first qubit. 8. The method of claim 7, further comprising analyzing the transformed quantum circuit design to determine a second entanglement state of the first qubit. 9. The method of claim 1, further comprising:
decomposing each instance of a single type of quantum logic gate. 10. The method of claim 1, wherein a total number of logic gates of the transformed quantum circuit design is less than a total number of logic gates of the first quantum circuit design. 11. A computer usable program product comprising a computer-readable storage device, and program instructions stored on the storage device, the stored program instructions comprising:
program instructions to analyze a first quantum circuit design based on at least one of a set of design criteria, wherein the first quantum circuit design comprises a set of quantum logic gates, and wherein a design criterion in the set of design criteria comprises changing a size of a matrix of transformations corresponding to a number of qubits employed in the first quantum circuit design; and program instructions to modify the first quantum circuit design into a transformed quantum circuit design, the modifying causing the transformed quantum circuit design to perform an operation implemented in the first quantum circuit design with a changed matrix of transformations. 12. The computer usable program product of claim 11, wherein the computer usable code is stored in a computer readable storage device in a data processing system, and wherein the computer usable code is transferred over a network from a remote data processing system. 13. The computer usable program product of claim 11, wherein the computer usable code is stored in a computer readable storage device in a server data processing system, and wherein the computer usable code is downloaded over a network to a remote data processing system for use in a computer readable storage device associated with the remote data processing system. 14. The computer usable program product of claim 11, the stored program instructions further comprising:
program instructions to decompose a first quantum logic gate of the transformed quantum circuit design into at least two quantum logic gates. 15. The computer usable program product of claim 11, the stored program instructions further comprising:
program instructions to reduce a total number of quantum logic gates of the first quantum circuit design. 16. The computer usable program product of claim 11, the stored program instructions further comprising:
program instructions to replace at least one quantum logic gate. 17. The computer usable program product of claim 11, wherein program instructions to analyze the first quantum circuit design further comprises:
program instructions to determine a depth of the first quantum circuit design. 18. The computer usable program product of claim 11, the stored program instructions further comprising:
program instructions to analyze the transformed quantum circuit design to determine a depth of the transformed quantum circuit design. 19. The computer usable program product of claim 11, the stored program instructions further comprising:
program instructions to decompose each instance of a single type of quantum logic gate. 20. A computer system comprising a processor, a computer-readable memory, and a computer-readable storage device, and program instructions stored on the storage device for execution by the processor via the memory, the stored program instructions comprising:
program instructions to analyze a first quantum circuit design based on at least one of a set of design criteria, wherein the first quantum circuit design comprises a set of quantum logic gates, and wherein a design criterion in the set of design criteria comprises changing a size of a matrix of transformations corresponding to a number of qubits employed in the quantum circuit design; and program instructions to modify the first quantum circuit design into a transformed quantum circuit design, the modifying causing the transformed quantum circuit design to perform an operation implemented in the first quantum circuit design with a changed matrix of transformations. | 2,800 |
12,013 | 12,013 | 16,427,836 | 2,861 | A turbidity measurement device for measuring turbidity of a fluid flowing in a flow tube. A first transducer transmits ultrasonic signals through the fluid in the turbidity measurement section so as to provide a first ultrasonic standing wave between the first and second section ends. A receiver transducer receives the ultrasonic scattered response from particles in the fluid flowing through the turbidity measurement section. A control circuit operates the transducers and generates a signal indicative of the turbidity of the fluid in response to signals received from the receiver transducer. Preferably, the device may comprise a second transducer for generating a second ultrasonic standing wave with the same frequency, and further the two transducers may be used to generate a measure of flow rate by means of known ultrasonic techniques. This flow rate may be used in the calculation of a measure of turbidity. Both turbidity facilities and flow rate facilities may be integrated in a consumption meter, such as a heat meter or a water meter. | 1-22. (canceled) 23. A device arranged to measure turbidity of a fluid flowing in a flow tube, the device comprising:
a flow tube having a through-going opening for passage of a fluid between an inlet and an outlet and a turbidity measurement section between a first section end and a second section end, a first transducer arranged to transmit ultrasonic signals through the fluid in the turbidity measurement section so as to provide a first ultrasonic wave between the first and second section ends, a receiver transducer arranged for receiving ultrasonic signals scattered on particles in the fluid flowing through the turbidity measurement section, wherein the receiver transducer has a receiving surface which is parallel to a propagation direction of the first ultrasonic wave, and a control circuit connected to the first transducer and the receiver transducer, the control circuit being arranged to operate the first transducer and to generate a signal indicative of the turbidity of the fluid in response to signals received from the receiver transducer. 24. The device according to claim 23, wherein the first transducer is arranged at said first section end, and wherein a reflecting element is arranged at the second section end for reflecting the ultrasonic signals. 25. The device according to claim 23, wherein a second transducer is arranged at the second section end, so as to provide a second ultrasonic wave between the second and first section ends, and wherein the control circuit is arranged to operate the first transducer and the second transducer. 26. The device according to claim 25, wherein the first and second ultrasonic waves have similar frequencies. 27. The device according to claim 25, wherein a frequency of the first ultrasonic wave is a rational number p/q times a frequency of the second wave, or wherein a frequency of the first ultrasonic wave and a frequency of the second ultrasonic wave differ by 0.1% to 10%. 28. The device according to claim 25, wherein the first and the second ultrasonic waves are standing waves. 29. The device according to claim 25, wherein the first and second ultrasonic waves are transient waves of similar frequency in the form of wave packets, which are shorter than the distance between the first section end and the second section end, so as to form a transient standing wave in at least part of the turbidity measurement section. 30. The device according to claim 23, wherein the first ultrasonic wave is a standing wave. 31. The device according to claim 23, wherein the control circuit is arranged to generate the signal indicative of the turbidity of the fluid in response to signals received from the receiver transducer and a flow rate of the fluid. 32. The device according to claim 23, comprising flow measurement means, wherein said flow measurement means comprises the first transducer. 33. The device according to claim 32, wherein the control circuit is arranged to operate the first transducer in a first and a second operation time interval, wherein the first and second operation time intervals are not overlapping, wherein the control circuit is arranged to operate the first transducer for measuring the turbidity of the fluid flowing in the flow tube during the first operation time interval, and wherein the control circuit is arranged to operate the first transducer for measuring the flow rate of the fluid flowing in the flow tube during the second operation time interval. 34. The device according to claim 32, wherein the control circuit is arranged to operate the first transducer at a first frequency for measuring the turbidity, and is further arranged to operate the first transducer at a second frequency for measuring the flow rate. 35. The device according to claim 23, comprising temperature measurement means, wherein said temperature measurement means comprises the first transducer. 36. The device according to claim 23, comprising a first ultrasonic reflector arranged to guide ultrasonic signals from the first transducer in a direction of the fluid flowing in the turbidity measurement section. 37. The device according to claim 23, wherein the receiver transducer is arranged in an opening in a wall of the flow tube. 38. The device according to claim 23, comprising an acoustic lens or an aperture arranged in relation to the receiver transducer, so as to limit a volume of the turbidity measurement section from which ultrasonic signals can reach the receiver transducer. 39. An ultrasonic consumption meter comprising a device according to claim 23. 40. A system for monitoring turbidity of fluid in a utility network, the system comprising:
a plurality of devices according to claim 23, wherein each of the plurality of devices is arranged to transmit signals indicative of the turbidity of the fluid, a communication system arranged to mediate said signals indicative of the turbidity of the fluid from the plurality of devices, and a processor system arranged to analyze said signals indicative of the turbidity of the fluid. 41. The device according to claim 23, wherein:
the through-going opening of the flow tube defines a flow path for passage of the fluid; the first transducer is arranged to transmit ultrasonic signals along a path through the fluid in the turbidity measurement section; and the receiver transducer is positioned outside of the flow path of the fluid and outside of the path of the transmitted ultrasound signals. 42. A method of measuring turbidity of a fluid flowing in a turbidity measurement section of a flow tube, the method comprising:
transmitting ultrasonic signals from a first transducer to generate an ultrasound wave between a first section end and a second section end, receiving, by means of a receiver transducer having a receiving surface which is parallel to a propagation direction of the first ultrasonic wave, ultrasonic signals scattered on particles in the fluid, and
generating a signal indicative of the turbidity of the fluid in response to signals received from the receiver transducer. | A turbidity measurement device for measuring turbidity of a fluid flowing in a flow tube. A first transducer transmits ultrasonic signals through the fluid in the turbidity measurement section so as to provide a first ultrasonic standing wave between the first and second section ends. A receiver transducer receives the ultrasonic scattered response from particles in the fluid flowing through the turbidity measurement section. A control circuit operates the transducers and generates a signal indicative of the turbidity of the fluid in response to signals received from the receiver transducer. Preferably, the device may comprise a second transducer for generating a second ultrasonic standing wave with the same frequency, and further the two transducers may be used to generate a measure of flow rate by means of known ultrasonic techniques. This flow rate may be used in the calculation of a measure of turbidity. Both turbidity facilities and flow rate facilities may be integrated in a consumption meter, such as a heat meter or a water meter.1-22. (canceled) 23. A device arranged to measure turbidity of a fluid flowing in a flow tube, the device comprising:
a flow tube having a through-going opening for passage of a fluid between an inlet and an outlet and a turbidity measurement section between a first section end and a second section end, a first transducer arranged to transmit ultrasonic signals through the fluid in the turbidity measurement section so as to provide a first ultrasonic wave between the first and second section ends, a receiver transducer arranged for receiving ultrasonic signals scattered on particles in the fluid flowing through the turbidity measurement section, wherein the receiver transducer has a receiving surface which is parallel to a propagation direction of the first ultrasonic wave, and a control circuit connected to the first transducer and the receiver transducer, the control circuit being arranged to operate the first transducer and to generate a signal indicative of the turbidity of the fluid in response to signals received from the receiver transducer. 24. The device according to claim 23, wherein the first transducer is arranged at said first section end, and wherein a reflecting element is arranged at the second section end for reflecting the ultrasonic signals. 25. The device according to claim 23, wherein a second transducer is arranged at the second section end, so as to provide a second ultrasonic wave between the second and first section ends, and wherein the control circuit is arranged to operate the first transducer and the second transducer. 26. The device according to claim 25, wherein the first and second ultrasonic waves have similar frequencies. 27. The device according to claim 25, wherein a frequency of the first ultrasonic wave is a rational number p/q times a frequency of the second wave, or wherein a frequency of the first ultrasonic wave and a frequency of the second ultrasonic wave differ by 0.1% to 10%. 28. The device according to claim 25, wherein the first and the second ultrasonic waves are standing waves. 29. The device according to claim 25, wherein the first and second ultrasonic waves are transient waves of similar frequency in the form of wave packets, which are shorter than the distance between the first section end and the second section end, so as to form a transient standing wave in at least part of the turbidity measurement section. 30. The device according to claim 23, wherein the first ultrasonic wave is a standing wave. 31. The device according to claim 23, wherein the control circuit is arranged to generate the signal indicative of the turbidity of the fluid in response to signals received from the receiver transducer and a flow rate of the fluid. 32. The device according to claim 23, comprising flow measurement means, wherein said flow measurement means comprises the first transducer. 33. The device according to claim 32, wherein the control circuit is arranged to operate the first transducer in a first and a second operation time interval, wherein the first and second operation time intervals are not overlapping, wherein the control circuit is arranged to operate the first transducer for measuring the turbidity of the fluid flowing in the flow tube during the first operation time interval, and wherein the control circuit is arranged to operate the first transducer for measuring the flow rate of the fluid flowing in the flow tube during the second operation time interval. 34. The device according to claim 32, wherein the control circuit is arranged to operate the first transducer at a first frequency for measuring the turbidity, and is further arranged to operate the first transducer at a second frequency for measuring the flow rate. 35. The device according to claim 23, comprising temperature measurement means, wherein said temperature measurement means comprises the first transducer. 36. The device according to claim 23, comprising a first ultrasonic reflector arranged to guide ultrasonic signals from the first transducer in a direction of the fluid flowing in the turbidity measurement section. 37. The device according to claim 23, wherein the receiver transducer is arranged in an opening in a wall of the flow tube. 38. The device according to claim 23, comprising an acoustic lens or an aperture arranged in relation to the receiver transducer, so as to limit a volume of the turbidity measurement section from which ultrasonic signals can reach the receiver transducer. 39. An ultrasonic consumption meter comprising a device according to claim 23. 40. A system for monitoring turbidity of fluid in a utility network, the system comprising:
a plurality of devices according to claim 23, wherein each of the plurality of devices is arranged to transmit signals indicative of the turbidity of the fluid, a communication system arranged to mediate said signals indicative of the turbidity of the fluid from the plurality of devices, and a processor system arranged to analyze said signals indicative of the turbidity of the fluid. 41. The device according to claim 23, wherein:
the through-going opening of the flow tube defines a flow path for passage of the fluid; the first transducer is arranged to transmit ultrasonic signals along a path through the fluid in the turbidity measurement section; and the receiver transducer is positioned outside of the flow path of the fluid and outside of the path of the transmitted ultrasound signals. 42. A method of measuring turbidity of a fluid flowing in a turbidity measurement section of a flow tube, the method comprising:
transmitting ultrasonic signals from a first transducer to generate an ultrasound wave between a first section end and a second section end, receiving, by means of a receiver transducer having a receiving surface which is parallel to a propagation direction of the first ultrasonic wave, ultrasonic signals scattered on particles in the fluid, and
generating a signal indicative of the turbidity of the fluid in response to signals received from the receiver transducer. | 2,800 |
12,014 | 12,014 | 15,292,191 | 2,837 | An electric machine may include a rotor. The electric machine may include a stator surrounding the rotor having teeth defining slots having at least two cross-sectional areas housing windings having uniform cross-sectional areas that fill each of the cross-sectional areas of the slots to substantially similar proportions relative to other slots such that slots housing windings having different phases have different cross-sectional areas than slots housing windings having same phases. | 1. An electric machine comprising:
a rotor; and a stator surrounding the rotor and including teeth defining slots having at least two cross-sectional areas housing windings having uniform cross-sectional areas that fill each of the cross-sectional areas of the slots to substantially similar proportions relative to other slots such that the slots housing windings having different phases have different cross-sectional areas than the slots housing windings having same phases. 2. The electric machine of claim 1, wherein the windings having different phases are separated by an insulator. 3. The electric machine of claim 2, wherein the insulator is phase insulation paper. 4. The electric machine of claim 1, wherein a width of the slots housing windings having different phases is greater than a width of slots housing windings of the same phase. 5. The electric machine of claim 4, wherein a depth of the slots housing windings having different phases and a depth of slots housing windings of the same phase is same. 6. The electric machine of claim 1, wherein a slots per pole per phase of the stator is integer. 7. The electrical machine of claim 1, wherein a width of each of the teeth is same. 8. The electrical machine of claim 1, wherein the substantially similar proportions is less than 90 percent of the cross-sectional area of the slot. 9. The electrical machine of claim 8, wherein the cross-sectional area of the slot is defined by an inner diameter of the stator and the teeth. 10. A stator comprising:
a plurality of windings having individually assigned phases; and teeth defining slots evenly and circumferentially distributed about the stator, a first set of the slots sized to house two layers of the windings having different phases and an insulator separating the different phases, a second set of the slots sized to house two layers of the windings having same phases, and the first set having a width greater than the second set. 11. The stator of claim 10, wherein a depth of the slots housing windings having different phases and a depth of slots housing windings of the same phase is same. 12. The stator of claim 10, wherein the slots of the first set have a larger cross-sectional area than slots of the second set. 13. The stator of claim 12, wherein the windings fill the cross-sectional areas of both the first set and second set to substantially equal proportions. 14. The stator of claim 13, wherein the windings fill the cross-sectional area of both the first set and second set to a necked portion of the slot. 15. An electric machine comprising:
a stator surrounding a rotor having teeth defining slots having a first cross-sectional area sized to house windings having a same phase and a second cross-sectional area sized to house windings of different phases separated by an insulator, wherein the first cross-sectional area and second cross-sectional area are sized to house windings having a uniform cross-sectional area and fill respective proportions of the cross-sectional areas to a necked area of the slot leading to a slot opening. 16. The electric machine of claim 15, wherein a width of the slots sized to house windings having different phases is greater than a width of slots sized to house windings of the same phase. 17. The electric machine of claim 16, wherein a depth of the slots sized to house windings having different phases and a depth of slots sized to house windings of the same phase is same. 18. The electric machine of claim 15, wherein the slots of the stator per pole of the rotor per phase of the stator is fractional. 19. The electrical machine of claim 15, wherein the respective proportions is less than 90 percent of the cross-sectional area of the slot. 20. The electrical machine of claim 19, wherein the cross-sectional area of the slot is defined by an inner diameter of the stator and the teeth. | An electric machine may include a rotor. The electric machine may include a stator surrounding the rotor having teeth defining slots having at least two cross-sectional areas housing windings having uniform cross-sectional areas that fill each of the cross-sectional areas of the slots to substantially similar proportions relative to other slots such that slots housing windings having different phases have different cross-sectional areas than slots housing windings having same phases.1. An electric machine comprising:
a rotor; and a stator surrounding the rotor and including teeth defining slots having at least two cross-sectional areas housing windings having uniform cross-sectional areas that fill each of the cross-sectional areas of the slots to substantially similar proportions relative to other slots such that the slots housing windings having different phases have different cross-sectional areas than the slots housing windings having same phases. 2. The electric machine of claim 1, wherein the windings having different phases are separated by an insulator. 3. The electric machine of claim 2, wherein the insulator is phase insulation paper. 4. The electric machine of claim 1, wherein a width of the slots housing windings having different phases is greater than a width of slots housing windings of the same phase. 5. The electric machine of claim 4, wherein a depth of the slots housing windings having different phases and a depth of slots housing windings of the same phase is same. 6. The electric machine of claim 1, wherein a slots per pole per phase of the stator is integer. 7. The electrical machine of claim 1, wherein a width of each of the teeth is same. 8. The electrical machine of claim 1, wherein the substantially similar proportions is less than 90 percent of the cross-sectional area of the slot. 9. The electrical machine of claim 8, wherein the cross-sectional area of the slot is defined by an inner diameter of the stator and the teeth. 10. A stator comprising:
a plurality of windings having individually assigned phases; and teeth defining slots evenly and circumferentially distributed about the stator, a first set of the slots sized to house two layers of the windings having different phases and an insulator separating the different phases, a second set of the slots sized to house two layers of the windings having same phases, and the first set having a width greater than the second set. 11. The stator of claim 10, wherein a depth of the slots housing windings having different phases and a depth of slots housing windings of the same phase is same. 12. The stator of claim 10, wherein the slots of the first set have a larger cross-sectional area than slots of the second set. 13. The stator of claim 12, wherein the windings fill the cross-sectional areas of both the first set and second set to substantially equal proportions. 14. The stator of claim 13, wherein the windings fill the cross-sectional area of both the first set and second set to a necked portion of the slot. 15. An electric machine comprising:
a stator surrounding a rotor having teeth defining slots having a first cross-sectional area sized to house windings having a same phase and a second cross-sectional area sized to house windings of different phases separated by an insulator, wherein the first cross-sectional area and second cross-sectional area are sized to house windings having a uniform cross-sectional area and fill respective proportions of the cross-sectional areas to a necked area of the slot leading to a slot opening. 16. The electric machine of claim 15, wherein a width of the slots sized to house windings having different phases is greater than a width of slots sized to house windings of the same phase. 17. The electric machine of claim 16, wherein a depth of the slots sized to house windings having different phases and a depth of slots sized to house windings of the same phase is same. 18. The electric machine of claim 15, wherein the slots of the stator per pole of the rotor per phase of the stator is fractional. 19. The electrical machine of claim 15, wherein the respective proportions is less than 90 percent of the cross-sectional area of the slot. 20. The electrical machine of claim 19, wherein the cross-sectional area of the slot is defined by an inner diameter of the stator and the teeth. | 2,800 |
12,015 | 12,015 | 15,160,244 | 2,858 | Embodiments relate to xMR sensors, including giant magnetoresistive (GMR), tunneling magnetoresistive (TMR) or anisotropic magnetoresistive (AMR), and the configuration of xMR strips within xMR sensors. In an embodiment, an xMR strip includes a plurality of differently sized and/or differently oriented serially connected portions. In another embodiment, an xMR strip includes a varying width or other characteristic. Such configurations can address discontinuities associated with conventional xMR sensors and improve xMR sensor performance. | 1. A magnetoresistive sensor element sensitive to a magnetic field strength, the sensor element comprising:
a magnetoresistive strip comprising a plurality of serial segments, adjacent ones of the segments having different tilt angles that are associated with, in the presence of a rotating magnetic field, discontinuities at different magnetic field angles at which edge magnetization switching occurs, wherein a tilt angle is an orientation between a shape anisotropy axis and an axis perpendicular to and in plane with a reference magnetization of a pinned layer for a given point on the magnetoresistive strip, wherein a first plurality of the plurality of serial segments form a first substrip and a second plurality of the plurality of serial segments comprise a second substrip, the first and second substrips being serially connected by connectors that magnetically decouple the substrips. 2. The magnetoresistive sensor element of claim 1, wherein a width of at least one of the plurality of serial segments varies from a width of at least one other of the plurality of serial segments. 3. The magnetoresistive sensor element of claim 1, wherein the magnetoresistive strip is one of a giant magnetoresistive (GMR) strip, or a tunneling magnetoresistive strip (TMR). 4. The magnetoresistive sensor element of claim 1, wherein the different tilt angles comprise positive and negative tilt angles. 5. The magnetoresistive sensor element of claim 1, wherein the different tilt angles comprise different degrees of tilt. 6. The magnetoresistive sensor element of claim 1, wherein the magnetoresistive strip comprises a center segment having a tilt angle of 0 degrees. 7. The magnetoresistive sensor element of claim 1, wherein the first and second substrips are arranged substantially parallel to one another. 8. The magnetoresistive sensor element of claim 1, wherein a first plurality of the plurality of serial segments form a first substrip and a second plurality of the plurality of serial segments comprise a second substrip, the first and second substrips being connected in parallel. 9. The magnetoresistive sensor element of claim 1, wherein a first plurality of the plurality of serial segments form a first substrip and a second plurality of the plurality of serial segments comprise a second substrip, the first and second substrips having different widths. 10. The magnetoresistive sensor element of claim 1, wherein the adjacent serial segments are connected by a connector. 11. A magnetoresistive sensor element sensitive to a magnetic field strength, the sensor element comprising:
a magnetoresistive strip comprising a plurality of serially coupled segments, adjacent ones of the plurality of serially coupled segments having different widths that are associated with, in the presence of a rotating magnetic field, discontinuities at different magnetic field angles at which edge magnetization switching occurs, wherein the plurality of serially coupled segments are serially coupled by connectors that magnetically decouple the substrips. | Embodiments relate to xMR sensors, including giant magnetoresistive (GMR), tunneling magnetoresistive (TMR) or anisotropic magnetoresistive (AMR), and the configuration of xMR strips within xMR sensors. In an embodiment, an xMR strip includes a plurality of differently sized and/or differently oriented serially connected portions. In another embodiment, an xMR strip includes a varying width or other characteristic. Such configurations can address discontinuities associated with conventional xMR sensors and improve xMR sensor performance.1. A magnetoresistive sensor element sensitive to a magnetic field strength, the sensor element comprising:
a magnetoresistive strip comprising a plurality of serial segments, adjacent ones of the segments having different tilt angles that are associated with, in the presence of a rotating magnetic field, discontinuities at different magnetic field angles at which edge magnetization switching occurs, wherein a tilt angle is an orientation between a shape anisotropy axis and an axis perpendicular to and in plane with a reference magnetization of a pinned layer for a given point on the magnetoresistive strip, wherein a first plurality of the plurality of serial segments form a first substrip and a second plurality of the plurality of serial segments comprise a second substrip, the first and second substrips being serially connected by connectors that magnetically decouple the substrips. 2. The magnetoresistive sensor element of claim 1, wherein a width of at least one of the plurality of serial segments varies from a width of at least one other of the plurality of serial segments. 3. The magnetoresistive sensor element of claim 1, wherein the magnetoresistive strip is one of a giant magnetoresistive (GMR) strip, or a tunneling magnetoresistive strip (TMR). 4. The magnetoresistive sensor element of claim 1, wherein the different tilt angles comprise positive and negative tilt angles. 5. The magnetoresistive sensor element of claim 1, wherein the different tilt angles comprise different degrees of tilt. 6. The magnetoresistive sensor element of claim 1, wherein the magnetoresistive strip comprises a center segment having a tilt angle of 0 degrees. 7. The magnetoresistive sensor element of claim 1, wherein the first and second substrips are arranged substantially parallel to one another. 8. The magnetoresistive sensor element of claim 1, wherein a first plurality of the plurality of serial segments form a first substrip and a second plurality of the plurality of serial segments comprise a second substrip, the first and second substrips being connected in parallel. 9. The magnetoresistive sensor element of claim 1, wherein a first plurality of the plurality of serial segments form a first substrip and a second plurality of the plurality of serial segments comprise a second substrip, the first and second substrips having different widths. 10. The magnetoresistive sensor element of claim 1, wherein the adjacent serial segments are connected by a connector. 11. A magnetoresistive sensor element sensitive to a magnetic field strength, the sensor element comprising:
a magnetoresistive strip comprising a plurality of serially coupled segments, adjacent ones of the plurality of serially coupled segments having different widths that are associated with, in the presence of a rotating magnetic field, discontinuities at different magnetic field angles at which edge magnetization switching occurs, wherein the plurality of serially coupled segments are serially coupled by connectors that magnetically decouple the substrips. | 2,800 |
12,016 | 12,016 | 14,491,113 | 2,862 | Devices and processes provide for geophysical oil, gas, or mineral prospecting and subsurface fluid monitoring, using a controlled source electromagnetic system that transmits a designed probe wave to create images of sub-surface structures and fluids either statically or while in motion. | 1. A system for determination of subsurface geophysical data, comprising:
a plurality of controlled source electromagnetic receivers, operatively distributed across a surface of the earth and synchronized with each other; and a controlled source electromagnetic transmitter operatively positioned relative to the plurality of controlled source electromagnetic receivers and synchronized with each the plurality of receivers, comprising:
a timing circuitry, comprising:
a geolocation timing receiver configured to produce a 1 pps clock signal;
an oscillator configured to produce a low clock rate signal; and
a timing control module configured to remove jitter and phase error from the low rate clock signal, producing a high clock rate clock signal with reduced jitter and phase error relative to the low rate clock signal that is synchronized with the 1 pps clock signal; and
a probe signal transmitter, coupled to the timing circuitry, configured to transmit a probe signal containing a predetermined binary waveform continuously during transmission. 2. The system of claim 1, wherein the predetermined binary waveform is a pseudo-random noise code. 3. The system of claim 1, wherein the predetermined binary waveform is a Walsh function. 4. The system of claim 1,
wherein the oscillator is an oven controlled oscillator, wherein the low clock rate signal is a 20 MHz or greater clock signal, and wherein the high clock rate signal has a clock rate of greater than 300 MHz. 5. The system of claim 1, wherein the predetermined binary waveform has a length of greater than 127 chips. 6. The system of claim 5, wherein the predetermined binary waveform has a length of at least 8191 chips. 7. The system of claim 1, wherein the predetermined binary waveform is designed not to terminate in a time period coincident with 60 Hz or 50 Hz timing. 8. The system of claim 1, where the plurality of receivers are conductively coupled to the transmitter. 9. The system of claim 1, wherein the predetermined binary waveform varies responsive to a desired subsurface depth. 10. The system of claim 1, further comprising:
cross-correlation circuitry configured to cross-correlate predetermined binary waveforms received by the plurality of receivers with the predetermined binary waveforms transmitted by transmitter. 11. The system of claim 1,
wherein the probe signal transmitter comprises:
an antenna assembly, and
wherein the probe signal transmitter controls power to the antenna assembly responsive to a calculated feed point impedance of the antenna assembly. 12. The system of claim 1, where the transmitter operates without stacking of the transmitted signal. 13. The system of claim 1, wherein the system allows measurement of real time changes in subsurface geology. 14. The system of claim 1, wherein at least one of the plurality of receivers is operatively positioned within 15 m of the transmitter. 15. A method of collecting subsurface geophysical data, comprising:
generating a probe signal by a transmitter, the probe signal comprising a continuously repeated predetermined binary waveform; receiving a reflection of the probe signal from a subsurface layer of interest by a receiver, the receiver synchronized with the transmitter; and generating resistance, velocity, and attenuation profiles of the subsurface layer of interest, wherein the subsurface layer of interest is greater than 800 m below a surface of the earth. 16. The method of claim 15, wherein the predetermined binary waveform is a pseudo random noise code of a length at least 8191. 17. The method of claim 15, wherein generating resistance, velocity, and attenuation profiles comprises:
cross-correlating received binary waveforms with the predetermined binary waveform, producing a cross-correlation data. 18. The method of claim 17, further comprising:
allocating the cross-correlation data into time bins; removing time bins within the cross-correlation data; and calculating resistance and velocity profiles for multiple subsurface layers, responsive to the removal of time bins. 19. The method of claim 17, wherein detecting injection of fluids injected into the layer of interest by detecting changes in the cross-correlation data over time. 20. The method of claim 15, wherein the probe signal comprises a sequence of predetermined binary waveforms, wherein successive elements of the sequence of predetermined binary waveforms are selected based on a sequence of different subsurface layer depths of interest. 21. The method of claim 15, further comprising:
positioning the transmitter and receiver between 15 m and 1 km of each other; and detecting changes in subsurface resistance resulting from an introduction of fluid into the subsurface layer of interest. | Devices and processes provide for geophysical oil, gas, or mineral prospecting and subsurface fluid monitoring, using a controlled source electromagnetic system that transmits a designed probe wave to create images of sub-surface structures and fluids either statically or while in motion.1. A system for determination of subsurface geophysical data, comprising:
a plurality of controlled source electromagnetic receivers, operatively distributed across a surface of the earth and synchronized with each other; and a controlled source electromagnetic transmitter operatively positioned relative to the plurality of controlled source electromagnetic receivers and synchronized with each the plurality of receivers, comprising:
a timing circuitry, comprising:
a geolocation timing receiver configured to produce a 1 pps clock signal;
an oscillator configured to produce a low clock rate signal; and
a timing control module configured to remove jitter and phase error from the low rate clock signal, producing a high clock rate clock signal with reduced jitter and phase error relative to the low rate clock signal that is synchronized with the 1 pps clock signal; and
a probe signal transmitter, coupled to the timing circuitry, configured to transmit a probe signal containing a predetermined binary waveform continuously during transmission. 2. The system of claim 1, wherein the predetermined binary waveform is a pseudo-random noise code. 3. The system of claim 1, wherein the predetermined binary waveform is a Walsh function. 4. The system of claim 1,
wherein the oscillator is an oven controlled oscillator, wherein the low clock rate signal is a 20 MHz or greater clock signal, and wherein the high clock rate signal has a clock rate of greater than 300 MHz. 5. The system of claim 1, wherein the predetermined binary waveform has a length of greater than 127 chips. 6. The system of claim 5, wherein the predetermined binary waveform has a length of at least 8191 chips. 7. The system of claim 1, wherein the predetermined binary waveform is designed not to terminate in a time period coincident with 60 Hz or 50 Hz timing. 8. The system of claim 1, where the plurality of receivers are conductively coupled to the transmitter. 9. The system of claim 1, wherein the predetermined binary waveform varies responsive to a desired subsurface depth. 10. The system of claim 1, further comprising:
cross-correlation circuitry configured to cross-correlate predetermined binary waveforms received by the plurality of receivers with the predetermined binary waveforms transmitted by transmitter. 11. The system of claim 1,
wherein the probe signal transmitter comprises:
an antenna assembly, and
wherein the probe signal transmitter controls power to the antenna assembly responsive to a calculated feed point impedance of the antenna assembly. 12. The system of claim 1, where the transmitter operates without stacking of the transmitted signal. 13. The system of claim 1, wherein the system allows measurement of real time changes in subsurface geology. 14. The system of claim 1, wherein at least one of the plurality of receivers is operatively positioned within 15 m of the transmitter. 15. A method of collecting subsurface geophysical data, comprising:
generating a probe signal by a transmitter, the probe signal comprising a continuously repeated predetermined binary waveform; receiving a reflection of the probe signal from a subsurface layer of interest by a receiver, the receiver synchronized with the transmitter; and generating resistance, velocity, and attenuation profiles of the subsurface layer of interest, wherein the subsurface layer of interest is greater than 800 m below a surface of the earth. 16. The method of claim 15, wherein the predetermined binary waveform is a pseudo random noise code of a length at least 8191. 17. The method of claim 15, wherein generating resistance, velocity, and attenuation profiles comprises:
cross-correlating received binary waveforms with the predetermined binary waveform, producing a cross-correlation data. 18. The method of claim 17, further comprising:
allocating the cross-correlation data into time bins; removing time bins within the cross-correlation data; and calculating resistance and velocity profiles for multiple subsurface layers, responsive to the removal of time bins. 19. The method of claim 17, wherein detecting injection of fluids injected into the layer of interest by detecting changes in the cross-correlation data over time. 20. The method of claim 15, wherein the probe signal comprises a sequence of predetermined binary waveforms, wherein successive elements of the sequence of predetermined binary waveforms are selected based on a sequence of different subsurface layer depths of interest. 21. The method of claim 15, further comprising:
positioning the transmitter and receiver between 15 m and 1 km of each other; and detecting changes in subsurface resistance resulting from an introduction of fluid into the subsurface layer of interest. | 2,800 |
12,017 | 12,017 | 14,511,266 | 2,837 | Electromagnetic inductor components include a magnetic core and a conductor assembled with the core and defining a winding completing a number of turns. The conductor is fabricated from a composite material including carbon nanotubes having an improved conductivity. The conductor has a cross section defined by an effective diameter. The conductor is fabricated to have performance parameters that are selected in view of a function of a ratio of conductivity and/or a function of a ratio of effective diameter of the composite conductor material relative to a reference conductor material as conventionally used in an inductor fabrication. | 1. An electromagnetic inductor component comprising:
a magnetic core; and a conductor fabricated from a conductive material having a first electrical conductivity, the conductor shaped to form a coil defining a winding completing a number of turns; and the conductor further shaped with a first cross sectional area and corresponding effective diameter that is determined by a ratio of electrical conductivity (β) of the first electrical conductivity of the conductor relative to a second electrical conductivity of a reference conductor in a reference electromagnetic inductor component; wherein the first electrical conductivity is greater than the second electrical conductivity. 2. The electromagnetic inductor component of claim 1, wherein the ratio of electrical conductivity (β) is within the range of about 1.1 to about 10. 3. The electromagnetic inductor component of claim 1, wherein the conductive material having the first electrical conductivity comprises a composite conductive material including carbon nanotubes. 4. The electromagnetic inductor component of claim 3, wherein the conductive material includes 0.1% to 100%, by weight, of carbon nanotubes. 5. The electromagnetic inductor component of claim 4, wherein the reference conductor material is one of copper and a copper alloy. 6. The electromagnetic inductor component of claim 1, wherein the conductive material having a first electrical conductivity comprises an ultra-conductive material. 7. The electromagnetic inductor component of claim 6:
wherein the reference conductor is fabricated from one of copper, copper alloy, aluminum, aluminum alloy, silver, or silver alloy. 8. The electromagnetic inductor component of claim 1, wherein the component is configured as a power inductor. 9. The electromagnetic inductor component of claim 1, wherein the component is configured as a non-power inductor. 10. The electromagnetic inductor component of claim 1, wherein the cross sectional area is not round. 11. The electromagnetic inductor component of claim 1:
wherein the ratio of electrical conductivity (β) defines an upper limit and a lower limit for the effective diameter of the conductor; and wherein the effective diameter is selected to be within a range defined by and including the upper and lower limits. 12. The electromagnetic inductor component of claim 11:
wherein the inductor component is configured to operate with a plurality of performance parameters comprising an inductance value, an effective permeability, a saturation current value, a core size, a number of turns, and a direct current resistance value when connected to electrical circuitry; and wherein one of the plurality of performance parameters matches a corresponding performance parameter of the reference inductor component, and wherein a performance value of at least one other of the plurality of performance parameters is selected to be within one of a plurality of respective bounded regions defined as a function of at least one of the electrical conductivity ratio (β) and an effective diameter ratio (δ) of the conductor relative to the reference conductor material. 13. The electromagnetic inductor component of claim 12, wherein a plurality of the performance parameters is each respectively selected to be within the respective one of the plurality of bounded regions. 14. The electromagnetic inductor component of claim 12, wherein the saturation current value matches a saturation current value for the reference inductor component. 15. The electromagnetic inductor component of claim 14, wherein the effective diameter ratio (δ) is within a range of about 1 to about β(−1/2). 16. The electromagnetic inductor component of claim 15, wherein the effective diameter ratio (δ) is within a range of about 1 to about β−1/4. 17. The electromagnetic inductor component of claim 16, wherein the inductance value is selected from or determined by a bounded region defined by and between an upper boundary value defined by a function (δ−2) and a lower boundary value of 1.0. 18. The electromagnetic inductor component of claim 16, wherein the direct current resistance (DCR) value is selected from or determined by a bounded region defined by and between an upper boundary valued defined by the function [β(−1)*δ(−4)] and a lower boundary value defined by a function [β(−1)*δ(−2)]. 19. The electromagnetic inductor component of claim 16, wherein a core volume of the magnetic core is selected from or determined by a bounded region defined by and between an upper boundary value of 1 and a lower boundary value defined by a function (δ2). 20. The electromagnetic inductor component of claim 16, wherein the effective permeability of the magnetic core is selected from or determined by a bounded region defined by and between an upper boundary defined by a function (δ2/3) and a lower boundary value defined by a function (δ2). 21. The electromagnetic inductor component of claim 16, wherein a number of turns in the winding is selected from or determined by a bounded region defined by and between an upper boundary defined by a function (δ−2) and a lower boundary value defined by a function (δ(−2/3)). 22. The electromagnetic inductor component of claim 16:
wherein the reference electromagnetic inductor component further has a reference core and a reference core size; wherein a core size in the magnetic core is proportionally reduced relative to the reference core size; and wherein the core size in the magnetic core is selected from or determined by a bounded region defined by and between an upper boundary value of 1 and a lower boundary value defined by a function δ2. 23. The electromagnetic inductor component of claim 16:
wherein the reference electromagnetic inductor component further has a reference core and a reference core size including a reference Window Area; wherein the height of the Window Area in the magnetic core is linearly reduced relative to the reference Window Area; and wherein the height of the Window Area in the magnetic core is selected from or determined by a bounded region defined by and between an upper boundary value defined by a function (δ−2) and lower boundary value of 1. 24. The electromagnetic inductor component of claim 16:
wherein the reference electromagnetic inductor component further has a reference core and a reference core size; wherein a core size in the magnetic core is proportionally reduced relative to the reference core size; and wherein an effective permeability of the magnetic core is selected from or determined by a bounded region defined by and between an upper boundary value defined by a function (δ2/3) and a lower boundary value defined by a function (δ(2)). 25. The electromagnetic inductor component of claim 16:
wherein the reference electromagnetic inductor component further has a reference core and a reference core size including a reference Window Area; wherein the height of the Window Area in the magnetic core is linearly reduced relative to the reference Window Area; and wherein an effective permeability of the magnetic core is selected from or determined by a bounded region defined by and between an upper boundary value of 1 and a lower boundary value defined by a function (δ(−2)). 26. The electromagnetic inductor component of claim 15, wherein an effective diameter ratio (δ) of the conductor relative to the reference conductor material is within a range of about β−1/4 to about β−1/2. 27. The electromagnetic inductor component of claim 26, wherein an inductance value of the component is selected from or determined by a bounded region defined by and between an upper boundary value defined by a function [β*δ2] and a lower boundary value of 1. 28. The electromagnetic inductor component of claim 26, wherein a direct current resistance (DCR) value of the component is selected from or determined by a bounded region defined by and between an upper boundary value of 1 and a lower boundary value defined by a function [β(−1)*δ(−2)]. 29. The electromagnetic inductor component of claim 26,
wherein the reference electromagnetic inductor component further has a reference core and a reference core size; wherein a core size in the magnetic core is proportionally reduced relative to the reference core size; and wherein a core size of the magnetic core is selected from or determined by a bounded region defined by and between an upper boundary value defined by a function [β*δ(4)] and a lower boundary value defined by a function (δ2). 30. The electromagnetic inductor component of claim 26:
wherein the reference electromagnetic inductor component further has a reference core and a reference core size including a reference Window Area; wherein the height of the Window Area in the magnetic core is linearly reduced relative to the reference Window Area; and wherein the height of the Window Area in the magnetic core is selected from or determined by a bounded region defined by and between an upper boundary value defined by a function (β*δ2) and lower boundary value of 1. 31. The electromagnetic inductor component of claim 26:
wherein the reference electromagnetic inductor component further has a reference core and a reference core size; wherein a core size in the magnetic core is proportionally reduced relative to the reference core size; and wherein an effective permeability of the magnetic core is selected from or determined by a bounded region defined by and between an upper boundary value defined by a function δ2/3 and a lower boundary value defined by a function [β(−2/3)*δ(−2/3)]. 32. The electromagnetic inductor component of claim 26:
wherein the reference electromagnetic inductor component further has a reference core and a reference core size including a reference Window Area; wherein the height of the Window Area in the magnetic core is linearly reduced relative to the reference Window Area; and wherein an effective permeability of the magnetic core is selected from or determined by a bounded region defined by and between an upper boundary value defined by a value of 1 and a lower boundary value defined by a function (β−1*δ−2). 33. The electromagnetic inductor component of claim 26:
wherein the reference electromagnetic inductor component further has a reference core and a reference core size; wherein a core size in the magnetic core is proportionally reduced relative to the reference core size; and wherein the number of turns is selected from or determined by a bounded region defined by and between an upper boundary value defined by a function [β(2/3)*δ(2/3)] and a lower boundary defined by a function (δ(−2/3)). 34. The electromagnetic inductor component of claim 26:
wherein the reference electromagnetic inductor component further has a reference core and a reference core size including a reference Window Area; wherein the height of the Window Area in the magnetic core is linearly reduced relative to the reference Window Area; and wherein the number of turns of the winding is selected from or determined by a bounded region defined by and between an upper boundary value defined by a function [β*δ2] and a lower boundary value of 1. 35. The electromagnetic inductor component of claim 1:
wherein the magnetic core defines a core volume containing the winding; wherein the core volume includes a Window Area (WA), a Mean Length Per Turn (MLT), and a Cross sectional Area (AC); and wherein one of the core volume and the selected number of turns is selected in view of one of the ratio of electrical conductivity (β) and the effective diameter ratio (δ) of the conductor relative to the reference conductor material. 36. A method of manufacturing an electromagnetic inductor component comprising:
selecting a reference inductor component including a reference magnetic core and a reference conductor material and having a plurality of reference performance parameters selected from the group of at least an inductance value, an effective permeability, a saturation current value, and a direct current resistance value when connected to electrical circuitry; providing a composite conductive material having a conductivity greater than a conductivity of the reference conductor material; determining a ratio of electrical conductivity (β) of the composite conductor relative to the electrical conductivity of the reference conductor material; based on the determined ratio of electrical conductivity (β), determining an upper limit and lower limit of an effective diameter of the composite conductive material; and selecting an effective diameter within the determined upper and lower limit. 37. The method of claim 36, further comprising fabricating a coil from the provided composite conductive material having the selected effective diameter and otherwise configured similarly to a reference coil in the reference inductor component. 38. The method of claim 36, wherein the electromagnetic inductor component is configured to operate with performance parameters corresponding to the reference performance parameters when connected to electrical circuitry;
wherein the method further comprises: determining an effective diameter ratio (δ) of the composite conductor relative to the reference conductor material; and selecting a value of at least one of the performance parameters from within a respective region of values defined by a function of at least one of the ratio of electrical conductivity (β) and the effective diameter ratio (δ). 39. The method of claim 36, further comprising selecting a core volume value and a number of turns of the coil to be within a respective bounded region of values defined by at least one function of the ratio of electrical conductivity (β) and the effective diameter ratio (δ). 40. The method of claim 39, further comprising:
fabricating a magnetic core having the selected core volume; and assembling a coil with the fabricated magnetic core, the coil being fabricated from the provided composite conductive material having the effective diameter, and the coil having a winding including the selected number of turns. 41. The method of claim 40, wherein fabricating the magnetic core comprises fabricating a magnetic core having a shape and volume that is proportionally decreased relative to the reference core of the reference inductor. 42. The method of claim 40, wherein fabricating the magnetic core comprises fabricating a magnetic core having a window area height that is proportionally changed relative to the reference inductor. 43. The method of claim 38, wherein selecting values of at least one of the performance parameters comprises selecting one of the performance parameters to match a corresponding one of the reference performance parameters, and selecting at least one other of the remaining performance parameters from one of the respective bounded regions of values, wherein each bounded region of values is defined by at an upper boundary or a lower boundary that is a function of at least one of the ratio of electrical conductivity (β) and the effective diameter ratio (δ). 44. The method of claim 44, further comprising fabricating an electromagnetic inductor component having a selected effective diameter and the selected conductivity value to achieve at least one of the selected performance parameters. | Electromagnetic inductor components include a magnetic core and a conductor assembled with the core and defining a winding completing a number of turns. The conductor is fabricated from a composite material including carbon nanotubes having an improved conductivity. The conductor has a cross section defined by an effective diameter. The conductor is fabricated to have performance parameters that are selected in view of a function of a ratio of conductivity and/or a function of a ratio of effective diameter of the composite conductor material relative to a reference conductor material as conventionally used in an inductor fabrication.1. An electromagnetic inductor component comprising:
a magnetic core; and a conductor fabricated from a conductive material having a first electrical conductivity, the conductor shaped to form a coil defining a winding completing a number of turns; and the conductor further shaped with a first cross sectional area and corresponding effective diameter that is determined by a ratio of electrical conductivity (β) of the first electrical conductivity of the conductor relative to a second electrical conductivity of a reference conductor in a reference electromagnetic inductor component; wherein the first electrical conductivity is greater than the second electrical conductivity. 2. The electromagnetic inductor component of claim 1, wherein the ratio of electrical conductivity (β) is within the range of about 1.1 to about 10. 3. The electromagnetic inductor component of claim 1, wherein the conductive material having the first electrical conductivity comprises a composite conductive material including carbon nanotubes. 4. The electromagnetic inductor component of claim 3, wherein the conductive material includes 0.1% to 100%, by weight, of carbon nanotubes. 5. The electromagnetic inductor component of claim 4, wherein the reference conductor material is one of copper and a copper alloy. 6. The electromagnetic inductor component of claim 1, wherein the conductive material having a first electrical conductivity comprises an ultra-conductive material. 7. The electromagnetic inductor component of claim 6:
wherein the reference conductor is fabricated from one of copper, copper alloy, aluminum, aluminum alloy, silver, or silver alloy. 8. The electromagnetic inductor component of claim 1, wherein the component is configured as a power inductor. 9. The electromagnetic inductor component of claim 1, wherein the component is configured as a non-power inductor. 10. The electromagnetic inductor component of claim 1, wherein the cross sectional area is not round. 11. The electromagnetic inductor component of claim 1:
wherein the ratio of electrical conductivity (β) defines an upper limit and a lower limit for the effective diameter of the conductor; and wherein the effective diameter is selected to be within a range defined by and including the upper and lower limits. 12. The electromagnetic inductor component of claim 11:
wherein the inductor component is configured to operate with a plurality of performance parameters comprising an inductance value, an effective permeability, a saturation current value, a core size, a number of turns, and a direct current resistance value when connected to electrical circuitry; and wherein one of the plurality of performance parameters matches a corresponding performance parameter of the reference inductor component, and wherein a performance value of at least one other of the plurality of performance parameters is selected to be within one of a plurality of respective bounded regions defined as a function of at least one of the electrical conductivity ratio (β) and an effective diameter ratio (δ) of the conductor relative to the reference conductor material. 13. The electromagnetic inductor component of claim 12, wherein a plurality of the performance parameters is each respectively selected to be within the respective one of the plurality of bounded regions. 14. The electromagnetic inductor component of claim 12, wherein the saturation current value matches a saturation current value for the reference inductor component. 15. The electromagnetic inductor component of claim 14, wherein the effective diameter ratio (δ) is within a range of about 1 to about β(−1/2). 16. The electromagnetic inductor component of claim 15, wherein the effective diameter ratio (δ) is within a range of about 1 to about β−1/4. 17. The electromagnetic inductor component of claim 16, wherein the inductance value is selected from or determined by a bounded region defined by and between an upper boundary value defined by a function (δ−2) and a lower boundary value of 1.0. 18. The electromagnetic inductor component of claim 16, wherein the direct current resistance (DCR) value is selected from or determined by a bounded region defined by and between an upper boundary valued defined by the function [β(−1)*δ(−4)] and a lower boundary value defined by a function [β(−1)*δ(−2)]. 19. The electromagnetic inductor component of claim 16, wherein a core volume of the magnetic core is selected from or determined by a bounded region defined by and between an upper boundary value of 1 and a lower boundary value defined by a function (δ2). 20. The electromagnetic inductor component of claim 16, wherein the effective permeability of the magnetic core is selected from or determined by a bounded region defined by and between an upper boundary defined by a function (δ2/3) and a lower boundary value defined by a function (δ2). 21. The electromagnetic inductor component of claim 16, wherein a number of turns in the winding is selected from or determined by a bounded region defined by and between an upper boundary defined by a function (δ−2) and a lower boundary value defined by a function (δ(−2/3)). 22. The electromagnetic inductor component of claim 16:
wherein the reference electromagnetic inductor component further has a reference core and a reference core size; wherein a core size in the magnetic core is proportionally reduced relative to the reference core size; and wherein the core size in the magnetic core is selected from or determined by a bounded region defined by and between an upper boundary value of 1 and a lower boundary value defined by a function δ2. 23. The electromagnetic inductor component of claim 16:
wherein the reference electromagnetic inductor component further has a reference core and a reference core size including a reference Window Area; wherein the height of the Window Area in the magnetic core is linearly reduced relative to the reference Window Area; and wherein the height of the Window Area in the magnetic core is selected from or determined by a bounded region defined by and between an upper boundary value defined by a function (δ−2) and lower boundary value of 1. 24. The electromagnetic inductor component of claim 16:
wherein the reference electromagnetic inductor component further has a reference core and a reference core size; wherein a core size in the magnetic core is proportionally reduced relative to the reference core size; and wherein an effective permeability of the magnetic core is selected from or determined by a bounded region defined by and between an upper boundary value defined by a function (δ2/3) and a lower boundary value defined by a function (δ(2)). 25. The electromagnetic inductor component of claim 16:
wherein the reference electromagnetic inductor component further has a reference core and a reference core size including a reference Window Area; wherein the height of the Window Area in the magnetic core is linearly reduced relative to the reference Window Area; and wherein an effective permeability of the magnetic core is selected from or determined by a bounded region defined by and between an upper boundary value of 1 and a lower boundary value defined by a function (δ(−2)). 26. The electromagnetic inductor component of claim 15, wherein an effective diameter ratio (δ) of the conductor relative to the reference conductor material is within a range of about β−1/4 to about β−1/2. 27. The electromagnetic inductor component of claim 26, wherein an inductance value of the component is selected from or determined by a bounded region defined by and between an upper boundary value defined by a function [β*δ2] and a lower boundary value of 1. 28. The electromagnetic inductor component of claim 26, wherein a direct current resistance (DCR) value of the component is selected from or determined by a bounded region defined by and between an upper boundary value of 1 and a lower boundary value defined by a function [β(−1)*δ(−2)]. 29. The electromagnetic inductor component of claim 26,
wherein the reference electromagnetic inductor component further has a reference core and a reference core size; wherein a core size in the magnetic core is proportionally reduced relative to the reference core size; and wherein a core size of the magnetic core is selected from or determined by a bounded region defined by and between an upper boundary value defined by a function [β*δ(4)] and a lower boundary value defined by a function (δ2). 30. The electromagnetic inductor component of claim 26:
wherein the reference electromagnetic inductor component further has a reference core and a reference core size including a reference Window Area; wherein the height of the Window Area in the magnetic core is linearly reduced relative to the reference Window Area; and wherein the height of the Window Area in the magnetic core is selected from or determined by a bounded region defined by and between an upper boundary value defined by a function (β*δ2) and lower boundary value of 1. 31. The electromagnetic inductor component of claim 26:
wherein the reference electromagnetic inductor component further has a reference core and a reference core size; wherein a core size in the magnetic core is proportionally reduced relative to the reference core size; and wherein an effective permeability of the magnetic core is selected from or determined by a bounded region defined by and between an upper boundary value defined by a function δ2/3 and a lower boundary value defined by a function [β(−2/3)*δ(−2/3)]. 32. The electromagnetic inductor component of claim 26:
wherein the reference electromagnetic inductor component further has a reference core and a reference core size including a reference Window Area; wherein the height of the Window Area in the magnetic core is linearly reduced relative to the reference Window Area; and wherein an effective permeability of the magnetic core is selected from or determined by a bounded region defined by and between an upper boundary value defined by a value of 1 and a lower boundary value defined by a function (β−1*δ−2). 33. The electromagnetic inductor component of claim 26:
wherein the reference electromagnetic inductor component further has a reference core and a reference core size; wherein a core size in the magnetic core is proportionally reduced relative to the reference core size; and wherein the number of turns is selected from or determined by a bounded region defined by and between an upper boundary value defined by a function [β(2/3)*δ(2/3)] and a lower boundary defined by a function (δ(−2/3)). 34. The electromagnetic inductor component of claim 26:
wherein the reference electromagnetic inductor component further has a reference core and a reference core size including a reference Window Area; wherein the height of the Window Area in the magnetic core is linearly reduced relative to the reference Window Area; and wherein the number of turns of the winding is selected from or determined by a bounded region defined by and between an upper boundary value defined by a function [β*δ2] and a lower boundary value of 1. 35. The electromagnetic inductor component of claim 1:
wherein the magnetic core defines a core volume containing the winding; wherein the core volume includes a Window Area (WA), a Mean Length Per Turn (MLT), and a Cross sectional Area (AC); and wherein one of the core volume and the selected number of turns is selected in view of one of the ratio of electrical conductivity (β) and the effective diameter ratio (δ) of the conductor relative to the reference conductor material. 36. A method of manufacturing an electromagnetic inductor component comprising:
selecting a reference inductor component including a reference magnetic core and a reference conductor material and having a plurality of reference performance parameters selected from the group of at least an inductance value, an effective permeability, a saturation current value, and a direct current resistance value when connected to electrical circuitry; providing a composite conductive material having a conductivity greater than a conductivity of the reference conductor material; determining a ratio of electrical conductivity (β) of the composite conductor relative to the electrical conductivity of the reference conductor material; based on the determined ratio of electrical conductivity (β), determining an upper limit and lower limit of an effective diameter of the composite conductive material; and selecting an effective diameter within the determined upper and lower limit. 37. The method of claim 36, further comprising fabricating a coil from the provided composite conductive material having the selected effective diameter and otherwise configured similarly to a reference coil in the reference inductor component. 38. The method of claim 36, wherein the electromagnetic inductor component is configured to operate with performance parameters corresponding to the reference performance parameters when connected to electrical circuitry;
wherein the method further comprises: determining an effective diameter ratio (δ) of the composite conductor relative to the reference conductor material; and selecting a value of at least one of the performance parameters from within a respective region of values defined by a function of at least one of the ratio of electrical conductivity (β) and the effective diameter ratio (δ). 39. The method of claim 36, further comprising selecting a core volume value and a number of turns of the coil to be within a respective bounded region of values defined by at least one function of the ratio of electrical conductivity (β) and the effective diameter ratio (δ). 40. The method of claim 39, further comprising:
fabricating a magnetic core having the selected core volume; and assembling a coil with the fabricated magnetic core, the coil being fabricated from the provided composite conductive material having the effective diameter, and the coil having a winding including the selected number of turns. 41. The method of claim 40, wherein fabricating the magnetic core comprises fabricating a magnetic core having a shape and volume that is proportionally decreased relative to the reference core of the reference inductor. 42. The method of claim 40, wherein fabricating the magnetic core comprises fabricating a magnetic core having a window area height that is proportionally changed relative to the reference inductor. 43. The method of claim 38, wherein selecting values of at least one of the performance parameters comprises selecting one of the performance parameters to match a corresponding one of the reference performance parameters, and selecting at least one other of the remaining performance parameters from one of the respective bounded regions of values, wherein each bounded region of values is defined by at an upper boundary or a lower boundary that is a function of at least one of the ratio of electrical conductivity (β) and the effective diameter ratio (δ). 44. The method of claim 44, further comprising fabricating an electromagnetic inductor component having a selected effective diameter and the selected conductivity value to achieve at least one of the selected performance parameters. | 2,800 |
12,018 | 12,018 | 15,849,271 | 2,851 | A technique capable of controlling a film thickness distribution formed on a surface of a substrate includes: forming a film on a substrate by performing a cycle a predetermined number of times, the cycle including: (a) supplying a source to the substrate accommodated in a process chamber; (b) exhausting the source from the process chamber; (c) supplying a reactant to the substrate accommodated in the process chamber; and (d) exhausting the reactant from the process chamber, wherein (a) through (d) are performed non-simultaneously, and the cycle further includes at least one of: (e) starting a next step with the source remaining in a center portion of a substrate surface after a first predetermined time elapses from a start of (b); and (f) starting a next step with the reactant remaining in the center portion of the substrate's surface after a second predetermined time elapses from a start of (d). | 1. A method of manufacturing a semiconductor device, comprising:
forming a film on a substrate by performing a cycle a predetermined number of times, the cycle comprising:
(a) supplying a source to the substrate accommodated in a process chamber;
(b) exhausting the source from the process chamber;
(c) supplying a reactant to the substrate accommodated in the process chamber; and
(d) exhausting the reactant from the process chamber,
wherein (a) through (d) are performed non-simultaneously, and the cycle further comprises at least one of:
(e) starting a next step with the source remaining in a center portion of a surface of the substrate after a first predetermined time elapses from a start of (b); and
(f) starting a next step with the reactant remaining in the center portion of the surface of the substrate after a second predetermined time elapses from a start of (d). 2. The method of claim 1, wherein the cycle is repeated, and each cycle comprises (f). 3. The method of claim 1, wherein the cycle is repeated, and each cycle comprises (e). 4. The method of claim 1, wherein an inner atmosphere of the process chamber is exhausted outward and radially from a peripheral portion of the substrate at least in one of (b) and (d). 5. The method of claim 1, wherein the source and reactant are supplied from a peripheral portion of the substrate toward the center portion of the surface of the substrate in (a) and (c), respectively. 6. The method of claim 1, wherein a purge gas is supplied into the process chamber in at least one of (b) and (d) at a flow rate such that the purge gas does not reach the center portion of the surface of the substrate. 7. The method of claim 1, wherein an atmosphere remaining in the process chamber is exhausted at an exhaust rate in at least one of (b) and (d) such that an amount of the atmosphere remaining in the center portion of the surface of the substrate is greater than that of the atmosphere remaining in the peripheral portion of the surface of the substrate. 8. The method of claim 1, wherein the substrate comprises a concave portion on the surface thereof, and the source and the reactant remaining in the concave portion at the center portion of the surface of the substrate are retained without being exhausted in (e) and (f), respectively. 9. The method of claim 8, wherein the source and the reactant physically adsorbed to a surface of the concave portion at the center portion of the surface of the substrate are retained without being exhausted in (e) and (f), respectively. 10. The method of claim 8, wherein the source remaining in the concave portion at the center portion of the surface of the substrate is mixed with the reactant supplied to the substrate to cause a vapor phase reaction when (c) is performed after (e), and the reactant remaining in the concave portion at the center portion of the surface of the substrate is mixed with the source supplied to the substrate to cause a vapor phase reaction when (a) is performed after (f). 11. The method of claim 10, wherein the vapor phase reaction is caused in the center portion of the surface of the substrate and a layer formed on a portion of the surface other than the center portion is subjected to a surface reaction with the reactant when (c) is performed after (e), and
wherein the vapor phase reaction is caused in the center portion of the surface of the substrate and the layer is formed on the portion of the surface other than the center portion when (a) is performed after (f). 12. The method of claim 1, wherein the source remaining in the center portion of the surface of the substrate is subjected to a vapor phase reaction with the reactant supplied to the substrate to form a layer containing a first element contained in the source and a second element contained in the reactant by depositing a material containing the first element and the second element and a layer containing the first element formed on a portion of the surface other than the center portion is modified to the layer containing the first element and the second element by reacting with the reactant supplied to the substrate when (c) is performed after (e). 13. The method of claim 1, wherein the source remaining in the center portion of the surface of the substrate is subjected to a vapor phase reaction with the reactant supplied to the substrate to form a layer containing a first element contained in the source and a second element contained in the reactant by depositing a material containing the first element and the second element and a layer containing the first element is formed on a portion of the surface other than the center portion when (a) is performed after (f). 14. A substrate processing apparatus comprising:
a process chamber where a substrate is processed; a source supply system configured to supply a source to the substrate accommodated in the process chamber; a reactant supply system configured to supply a reactant to the substrate accommodated in the process chamber; an exhaust system configured to exhaust an inside of the process chamber; and a controller configured to control the source supply system, the reactant supply system and the exhaust system to perform: forming a film on a substrate by performing a cycle a predetermined number of times, the cycle comprising: (a) supplying the source to the substrate accommodated in the process chamber; (b) exhausting the source from the process chamber; (c) supplying the reactant to the substrate accommodated in the process chamber; and (d) exhausting the reactant from the process chamber, wherein (a) through (d) are performed non-simultaneously, and the cycle further comprises at least one of: (e) starting a next step with the source remaining in a center portion of a surface of the substrate after a first predetermined time elapses from a start of (b); and (f) starting a next step with the reactant remaining in the center portion of the surface of the substrate after a second predetermined time elapses from a start of (d). 15. A non-transitory computer-readable recording medium storing a program that causes, by a computer, a substrate processing apparatus to perform: forming a film on a substrate by performing a cycle a predetermined number of times, the cycle comprising:
(a) supplying a source to the substrate accommodated in a process chamber; (b) exhausting the source from the process chamber; (c) supplying a reactant to the substrate accommodated in the process chamber; and (d) exhausting the reactant from the process chamber, wherein (a) through (d) are performed non-simultaneously, and the cycle further comprises at least one of: (e) starting a next step with the source remaining in a center portion of a surface of the substrate after a first predetermined time elapses from a start of (b); and (f) starting a next step with the reactant remaining in the center portion of the surface of the substrate after a second predetermined time elapses from a start of (d). | A technique capable of controlling a film thickness distribution formed on a surface of a substrate includes: forming a film on a substrate by performing a cycle a predetermined number of times, the cycle including: (a) supplying a source to the substrate accommodated in a process chamber; (b) exhausting the source from the process chamber; (c) supplying a reactant to the substrate accommodated in the process chamber; and (d) exhausting the reactant from the process chamber, wherein (a) through (d) are performed non-simultaneously, and the cycle further includes at least one of: (e) starting a next step with the source remaining in a center portion of a substrate surface after a first predetermined time elapses from a start of (b); and (f) starting a next step with the reactant remaining in the center portion of the substrate's surface after a second predetermined time elapses from a start of (d).1. A method of manufacturing a semiconductor device, comprising:
forming a film on a substrate by performing a cycle a predetermined number of times, the cycle comprising:
(a) supplying a source to the substrate accommodated in a process chamber;
(b) exhausting the source from the process chamber;
(c) supplying a reactant to the substrate accommodated in the process chamber; and
(d) exhausting the reactant from the process chamber,
wherein (a) through (d) are performed non-simultaneously, and the cycle further comprises at least one of:
(e) starting a next step with the source remaining in a center portion of a surface of the substrate after a first predetermined time elapses from a start of (b); and
(f) starting a next step with the reactant remaining in the center portion of the surface of the substrate after a second predetermined time elapses from a start of (d). 2. The method of claim 1, wherein the cycle is repeated, and each cycle comprises (f). 3. The method of claim 1, wherein the cycle is repeated, and each cycle comprises (e). 4. The method of claim 1, wherein an inner atmosphere of the process chamber is exhausted outward and radially from a peripheral portion of the substrate at least in one of (b) and (d). 5. The method of claim 1, wherein the source and reactant are supplied from a peripheral portion of the substrate toward the center portion of the surface of the substrate in (a) and (c), respectively. 6. The method of claim 1, wherein a purge gas is supplied into the process chamber in at least one of (b) and (d) at a flow rate such that the purge gas does not reach the center portion of the surface of the substrate. 7. The method of claim 1, wherein an atmosphere remaining in the process chamber is exhausted at an exhaust rate in at least one of (b) and (d) such that an amount of the atmosphere remaining in the center portion of the surface of the substrate is greater than that of the atmosphere remaining in the peripheral portion of the surface of the substrate. 8. The method of claim 1, wherein the substrate comprises a concave portion on the surface thereof, and the source and the reactant remaining in the concave portion at the center portion of the surface of the substrate are retained without being exhausted in (e) and (f), respectively. 9. The method of claim 8, wherein the source and the reactant physically adsorbed to a surface of the concave portion at the center portion of the surface of the substrate are retained without being exhausted in (e) and (f), respectively. 10. The method of claim 8, wherein the source remaining in the concave portion at the center portion of the surface of the substrate is mixed with the reactant supplied to the substrate to cause a vapor phase reaction when (c) is performed after (e), and the reactant remaining in the concave portion at the center portion of the surface of the substrate is mixed with the source supplied to the substrate to cause a vapor phase reaction when (a) is performed after (f). 11. The method of claim 10, wherein the vapor phase reaction is caused in the center portion of the surface of the substrate and a layer formed on a portion of the surface other than the center portion is subjected to a surface reaction with the reactant when (c) is performed after (e), and
wherein the vapor phase reaction is caused in the center portion of the surface of the substrate and the layer is formed on the portion of the surface other than the center portion when (a) is performed after (f). 12. The method of claim 1, wherein the source remaining in the center portion of the surface of the substrate is subjected to a vapor phase reaction with the reactant supplied to the substrate to form a layer containing a first element contained in the source and a second element contained in the reactant by depositing a material containing the first element and the second element and a layer containing the first element formed on a portion of the surface other than the center portion is modified to the layer containing the first element and the second element by reacting with the reactant supplied to the substrate when (c) is performed after (e). 13. The method of claim 1, wherein the source remaining in the center portion of the surface of the substrate is subjected to a vapor phase reaction with the reactant supplied to the substrate to form a layer containing a first element contained in the source and a second element contained in the reactant by depositing a material containing the first element and the second element and a layer containing the first element is formed on a portion of the surface other than the center portion when (a) is performed after (f). 14. A substrate processing apparatus comprising:
a process chamber where a substrate is processed; a source supply system configured to supply a source to the substrate accommodated in the process chamber; a reactant supply system configured to supply a reactant to the substrate accommodated in the process chamber; an exhaust system configured to exhaust an inside of the process chamber; and a controller configured to control the source supply system, the reactant supply system and the exhaust system to perform: forming a film on a substrate by performing a cycle a predetermined number of times, the cycle comprising: (a) supplying the source to the substrate accommodated in the process chamber; (b) exhausting the source from the process chamber; (c) supplying the reactant to the substrate accommodated in the process chamber; and (d) exhausting the reactant from the process chamber, wherein (a) through (d) are performed non-simultaneously, and the cycle further comprises at least one of: (e) starting a next step with the source remaining in a center portion of a surface of the substrate after a first predetermined time elapses from a start of (b); and (f) starting a next step with the reactant remaining in the center portion of the surface of the substrate after a second predetermined time elapses from a start of (d). 15. A non-transitory computer-readable recording medium storing a program that causes, by a computer, a substrate processing apparatus to perform: forming a film on a substrate by performing a cycle a predetermined number of times, the cycle comprising:
(a) supplying a source to the substrate accommodated in a process chamber; (b) exhausting the source from the process chamber; (c) supplying a reactant to the substrate accommodated in the process chamber; and (d) exhausting the reactant from the process chamber, wherein (a) through (d) are performed non-simultaneously, and the cycle further comprises at least one of: (e) starting a next step with the source remaining in a center portion of a surface of the substrate after a first predetermined time elapses from a start of (b); and (f) starting a next step with the reactant remaining in the center portion of the surface of the substrate after a second predetermined time elapses from a start of (d). | 2,800 |
12,019 | 12,019 | 15,354,178 | 2,892 | The present invention provides an organic emitting diode including a first electrode; a second electrode facing the first electrode; an emitting material layer between the first and second electrodes; and an intervening layer between the emitting material layer and the second electrode and including a base material and an electron injection material, wherein the intervening layer contacts the second electrode. | 1. An organic emitting diode, comprising:
a first electrode; a second electrode facing the first electrode; an emitting material layer between the first and second electrodes; and an intervening layer between the emitting material layer and the second electrode and including a base material and an electron injection material, wherein the intervening layer contacts the second electrode. 2. The organic emitting diode according to claim 1, wherein the base material is a host material of the emitting material layer. 3. The organic emitting diode according to claim 2, wherein the intervening layer has a LUMO energy level of about 3.0 eV to 2.6 eV and a triplet energy level of about 2.0 eV to about 2.5 eV. 4. The organic emitting diode according to claim 2, wherein the intervening layer has an electron mobility of about 10−6 cm2/Vs to about 10−4 cm2/Vs. 5. The organic emitting diode according to claim 1, wherein the base material is an electron transporting material. 6. The organic emitting diode according to claim 5, wherein the electron transporting material has a LUMO energy level of about 3.0 eV to 2.0 eV and the electron transporting layer has a triplet energy level of about 2.0 eV to about 2.5 eV. 7. The organic emitting diode according to claim 5, wherein the electron transporting material has an electron mobility of about 10−5 cm2/Vs to about 10−3 cm2/Vs. 8. The organic emitting diode according to claim 1, wherein the electron injection material has a first density in a lower portion, which is adjacent to the emitting material layer, of the intervening layer and a second density, which is larger than the first density, in an upper portion, which is adjacent to the second electrode, of the intervening layer. 9. The organic emitting diode according to claim 1, wherein the electron injection material includes an alkali metal. 10. An organic light emitting diode display device, comprising:
a substrate including a plurality of sub-pixels; a transistor in each sub-pixel; and an organic emitting diode positioned in each sub-pixel and connected to the transistor, the organic emitting diode including:
a first electrode;
a second electrode facing the first electrode;
an emitting material layer between the first and second electrodes; and
an intervening layer between the emitting material layer and the second electrode and including a base material and an electron injection material,
wherein the intervening layer contacts the second electrode. 11. The organic light emitting diode display device according to claim 10, wherein the base material is a host material of the emitting material layer. 12. The organic light emitting diode display device according to claim 11, wherein the intervening layer has a LUMO energy level of about 3.0 eV to 2.6 eV and a triplet energy level of about 2.0 eV to about 2.5 eV. 13. The organic light emitting diode display device according to claim 11, wherein the intervening layer has an electron mobility of about 10−6 cm2/Vs to about 10−4 cm2/Vs. 14. The organic light emitting diode display device according to claim 10, wherein the base material is an electron transporting material. 15. The organic light emitting diode display device according to claim 14, wherein the electron transporting material has a LUMO energy level of about 3.0 eV to 2.0 eV and the electron transporting layer has a triplet energy level of about 2.0 eV to about 2.5 eV. 16. The organic light emitting diode display device according to claim 14, wherein the electron transporting material has an electron mobility of about 10−5 cm2/Vs to about 10−3 cm2/Vs. 17. The organic light emitting diode display device according to claim 10, wherein the electron injection material has a first density in a lower portion, which is adjacent to the emitting material layer, of the intervening layer and a second density, which is larger than the first density, in an upper portion, which is adjacent to the second electrode, of the intervening layer. 18. The organic light emitting diode display device according to claim 10, wherein the electron injection material includes an alkali metal. 19. A method for manufacturing an organic emitting diode, comprising:
forming a first electrode; forming an emitting material layer on the first electrode; forming an intervening layer including a base material and an electron injection material on the emitting material layer; and forming a second electrode on the intervening layer to contact the intervening layer, wherein the emitting material layer and the intervening layer are formed by solution process. 20. The method according to claim 19, wherein the base material is a host material of the emitting material layer or an electron transporting material. 21. The method according to claim 20, wherein the solution process includes an inject printing process, a nozzle printing process, a transferring process, a thermal jet printing process a roll printing process, a gravure printing process and a spin coating process. 22. The method according to claim 20, wherein the emitting material layer is formed using an organic solvent; and the intervening layer is formed using a water-soluble material in which a water-soluble or fat soluble alkali metal as the electron injection material is dispersed. 23. The method according to claim 20, wherein the emitting material layer is formed using a water-soluble material; and the intervening layer is formed using an organic solvent in which a water-soluble or fat soluble alkali metal as the electron injection material is dispersed. | The present invention provides an organic emitting diode including a first electrode; a second electrode facing the first electrode; an emitting material layer between the first and second electrodes; and an intervening layer between the emitting material layer and the second electrode and including a base material and an electron injection material, wherein the intervening layer contacts the second electrode.1. An organic emitting diode, comprising:
a first electrode; a second electrode facing the first electrode; an emitting material layer between the first and second electrodes; and an intervening layer between the emitting material layer and the second electrode and including a base material and an electron injection material, wherein the intervening layer contacts the second electrode. 2. The organic emitting diode according to claim 1, wherein the base material is a host material of the emitting material layer. 3. The organic emitting diode according to claim 2, wherein the intervening layer has a LUMO energy level of about 3.0 eV to 2.6 eV and a triplet energy level of about 2.0 eV to about 2.5 eV. 4. The organic emitting diode according to claim 2, wherein the intervening layer has an electron mobility of about 10−6 cm2/Vs to about 10−4 cm2/Vs. 5. The organic emitting diode according to claim 1, wherein the base material is an electron transporting material. 6. The organic emitting diode according to claim 5, wherein the electron transporting material has a LUMO energy level of about 3.0 eV to 2.0 eV and the electron transporting layer has a triplet energy level of about 2.0 eV to about 2.5 eV. 7. The organic emitting diode according to claim 5, wherein the electron transporting material has an electron mobility of about 10−5 cm2/Vs to about 10−3 cm2/Vs. 8. The organic emitting diode according to claim 1, wherein the electron injection material has a first density in a lower portion, which is adjacent to the emitting material layer, of the intervening layer and a second density, which is larger than the first density, in an upper portion, which is adjacent to the second electrode, of the intervening layer. 9. The organic emitting diode according to claim 1, wherein the electron injection material includes an alkali metal. 10. An organic light emitting diode display device, comprising:
a substrate including a plurality of sub-pixels; a transistor in each sub-pixel; and an organic emitting diode positioned in each sub-pixel and connected to the transistor, the organic emitting diode including:
a first electrode;
a second electrode facing the first electrode;
an emitting material layer between the first and second electrodes; and
an intervening layer between the emitting material layer and the second electrode and including a base material and an electron injection material,
wherein the intervening layer contacts the second electrode. 11. The organic light emitting diode display device according to claim 10, wherein the base material is a host material of the emitting material layer. 12. The organic light emitting diode display device according to claim 11, wherein the intervening layer has a LUMO energy level of about 3.0 eV to 2.6 eV and a triplet energy level of about 2.0 eV to about 2.5 eV. 13. The organic light emitting diode display device according to claim 11, wherein the intervening layer has an electron mobility of about 10−6 cm2/Vs to about 10−4 cm2/Vs. 14. The organic light emitting diode display device according to claim 10, wherein the base material is an electron transporting material. 15. The organic light emitting diode display device according to claim 14, wherein the electron transporting material has a LUMO energy level of about 3.0 eV to 2.0 eV and the electron transporting layer has a triplet energy level of about 2.0 eV to about 2.5 eV. 16. The organic light emitting diode display device according to claim 14, wherein the electron transporting material has an electron mobility of about 10−5 cm2/Vs to about 10−3 cm2/Vs. 17. The organic light emitting diode display device according to claim 10, wherein the electron injection material has a first density in a lower portion, which is adjacent to the emitting material layer, of the intervening layer and a second density, which is larger than the first density, in an upper portion, which is adjacent to the second electrode, of the intervening layer. 18. The organic light emitting diode display device according to claim 10, wherein the electron injection material includes an alkali metal. 19. A method for manufacturing an organic emitting diode, comprising:
forming a first electrode; forming an emitting material layer on the first electrode; forming an intervening layer including a base material and an electron injection material on the emitting material layer; and forming a second electrode on the intervening layer to contact the intervening layer, wherein the emitting material layer and the intervening layer are formed by solution process. 20. The method according to claim 19, wherein the base material is a host material of the emitting material layer or an electron transporting material. 21. The method according to claim 20, wherein the solution process includes an inject printing process, a nozzle printing process, a transferring process, a thermal jet printing process a roll printing process, a gravure printing process and a spin coating process. 22. The method according to claim 20, wherein the emitting material layer is formed using an organic solvent; and the intervening layer is formed using a water-soluble material in which a water-soluble or fat soluble alkali metal as the electron injection material is dispersed. 23. The method according to claim 20, wherein the emitting material layer is formed using a water-soluble material; and the intervening layer is formed using an organic solvent in which a water-soluble or fat soluble alkali metal as the electron injection material is dispersed. | 2,800 |
12,020 | 12,020 | 16,058,749 | 2,845 | In some examples, an integrated circuit device includes a sampling switch configured to sample an input signal. The integrated circuit device also includes a first evaluation unit configured to receive the sampled input signal from the sampling switch and evaluate the sampled input signal. The integrated circuit device further includes a second evaluation unit configured to receive the sampled input signal from the sampling switch and evaluate the sampled input signal. The sampling switch is configured to deliver the sampled input signal to the first evaluation unit and deliver the sampled input signal to the second evaluation unit. | 1. An integrated circuit device comprising:
a sampling switch configured to sample an input signal; a first evaluation unit configured to:
receive the sampled input signal from the sampling switch; and
evaluate the sampled input signal; and
a second evaluation unit configured to:
receive the sampled input signal from the sampling switch; and
evaluate the sampled input signal,
wherein the sampling switch is configured to:
deliver the sampled input signal to the first evaluation unit; and
deliver the sampled input signal to the second evaluation unit, and
wherein an operating voltage range of the sampling switch is greater than an operating voltage range of at least one of the first evaluation unit or the second evaluation unit such that the sampling switch is configured to receive the input signal at a first voltage level and the at least one of the first evaluation unit or the second evaluation unit is configured to receive the sampled input signal at a second voltage level, and wherein the second voltage level is lower than the first voltage level. 2. (canceled) 3. The integrated circuit device of claim 1, wherein an operating voltage range of the first evaluation unit is different from an operating voltage range of the second evaluation unit. 4. The integrated circuit device of claim 1, wherein an evaluation scheme of the first evaluation unit is different from an evaluation scheme of the second evaluation unit. 5. The integrated circuit device of claim 1, further comprising:
a signal distribution unit; and a control circuit configured to:
control the sampling switch to sample the input signal; and
control the signal distribution unit,
wherein the first evaluation unit is configured to receive the sampled input signal when the signal distribution unit electrically connects the sampling switch to the first evaluation unit, and wherein the second evaluation unit is configured to receive the sampled input signal when the signal distribution unit electrically connects the sampling switch to the second evaluation unit. 6. The integrated circuit device of claim 5, wherein the control circuit is further configured to control a timing of a sampling phase of the sampling switch in accordance with a timing requirement of one or more of the first evaluation unit or the second evaluation unit. 7. The integrated circuit device of claim 5, wherein the control circuit is further configured to:
control a timing of an evaluation phase of the first evaluation unit; and control a timing of an evaluation phase of the second evaluation unit. 8. The integrated device of claim 7, wherein the timing of the evaluation phase of the first evaluation unit is different from the timing of the evaluation phase of the second evaluation unit. 9. The integrated device of claim 8, wherein the evaluation phase of the first evaluation unit does not overlap with the evaluation phase of the second evaluation unit in terms of timing. 10. The integrated circuit device of claim 5, wherein the signal distribution unit comprises:
a first distribution switch configured to electrically connect the sampling switch to the first evaluation unit when the first distribution switch is active; and a second distribution switch configured to electrically connect the sampling switch to the second evaluation unit when the second distribution switch is active. 11. The integrated circuit device of claim 1, further comprising a sampling unit configured to:
receive the sampled input signal; and deliver the sampled input signal to one or more of the first evaluation unit or the second evaluation unit. 12. The integrated circuit device of claim 11, further comprising a control circuit configured to control a timing of a sampling phase of the sampling switch in accordance with a timing requirement of the sampling unit. 13. The integrated circuit device of claim 1, further comprising a voltage divider circuit configured to:
receive the sampled input signal at the first voltage level from the sampling switch; and deliver a divided signal at the second voltage level to the at least one of the first evaluation circuit or the second evaluation unit based on the sampled input signal. 14. The integrated circuit device of claim 1, wherein the sampling switch is configured to:
be coupled to a first electrical component; and sample a voltage difference between a first terminal and a second terminal of the electrical component, wherein one or more of the first evaluation unit or the second evaluation unit is configured to receive the sampled voltage difference. 15. A method comprising:
controlling a first evaluation unit of an integrated circuit device to receive a sampled input signal from a sampling switch of the integrated circuit device and evaluate the sampled input signal; controlling a second evaluation unit of the integrated circuit device to receive the sampled input signal from the sampling switch and evaluate the sampled input signal; and controlling the sampling switch, wherein controlling the sampling switch comprises:
sampling the input signal;
delivering the sampled input signal to the first evaluation unit; and
delivering the sampled input signal to the second evaluation unit,
wherein an operating voltage range of the sampling switch is greater than an operating voltage range of at least one of the first evaluation unit or the second evaluation unit such that the sampling switch is configured to receive the input signal at a first voltage level and the at least one of the first evaluation unit or the second evaluation unit is configured to receive the sampled input signal at a second voltage level, and wherein the second voltage level is lower than the first voltage level. 16. The method of claim 15, wherein controlling the sampling switch further comprises controlling a timing of a sampling phase of the sampling switch in accordance with a timing requirement of one or more of the first evaluation unit or the second evaluation unit. 17. The method of claim 15, further comprising:
controlling a timing of an evaluation phase of the first evaluation unit; and controlling a timing of an evaluation phase of the second evaluation unit. 18. The method of claim 15, further comprising:
controlling a sampling unit to receive the sampled input signal; and controlling the sampling unit to deliver the sampled input signal to one or more of the first evaluation unit or the second evaluation unit. 19. A device comprising:
a sampling switch configured to sample an input signal; a first evaluation unit configured to:
receive the sampled input signal from the sampling switch; and
evaluate the sampled input signal; and
a second evaluation unit configured to:
receive the sampled input signal from the sampling switch; and
evaluate the sampled input signal,
wherein the first evaluation unit and the second evaluation unit are configured to share the sampling switch, wherein an operating voltage range of the sampling switch is greater than an operating voltage range of at least one of the first evaluation unit or the second evaluation unit such that the sampling switch is configured to receive the input signal at a first voltage level and the at least one of the first evaluation unit or the second evaluation unit is configured to receive the sampled input signal at a second voltage level, and wherein the second voltage level is lower than the first voltage level. 20. The device of claim 19, wherein the sampling switch, the first evaluation unit, and the second evaluation unit are integrated in a single semiconductor substrate. 21. The device of claim 19,
wherein an operating voltage range of the first evaluation unit is different from an operating voltage range of the second evaluation unit, and wherein an evaluation scheme of the first evaluation unit is different from an evaluation scheme of the second evaluation unit. | In some examples, an integrated circuit device includes a sampling switch configured to sample an input signal. The integrated circuit device also includes a first evaluation unit configured to receive the sampled input signal from the sampling switch and evaluate the sampled input signal. The integrated circuit device further includes a second evaluation unit configured to receive the sampled input signal from the sampling switch and evaluate the sampled input signal. The sampling switch is configured to deliver the sampled input signal to the first evaluation unit and deliver the sampled input signal to the second evaluation unit.1. An integrated circuit device comprising:
a sampling switch configured to sample an input signal; a first evaluation unit configured to:
receive the sampled input signal from the sampling switch; and
evaluate the sampled input signal; and
a second evaluation unit configured to:
receive the sampled input signal from the sampling switch; and
evaluate the sampled input signal,
wherein the sampling switch is configured to:
deliver the sampled input signal to the first evaluation unit; and
deliver the sampled input signal to the second evaluation unit, and
wherein an operating voltage range of the sampling switch is greater than an operating voltage range of at least one of the first evaluation unit or the second evaluation unit such that the sampling switch is configured to receive the input signal at a first voltage level and the at least one of the first evaluation unit or the second evaluation unit is configured to receive the sampled input signal at a second voltage level, and wherein the second voltage level is lower than the first voltage level. 2. (canceled) 3. The integrated circuit device of claim 1, wherein an operating voltage range of the first evaluation unit is different from an operating voltage range of the second evaluation unit. 4. The integrated circuit device of claim 1, wherein an evaluation scheme of the first evaluation unit is different from an evaluation scheme of the second evaluation unit. 5. The integrated circuit device of claim 1, further comprising:
a signal distribution unit; and a control circuit configured to:
control the sampling switch to sample the input signal; and
control the signal distribution unit,
wherein the first evaluation unit is configured to receive the sampled input signal when the signal distribution unit electrically connects the sampling switch to the first evaluation unit, and wherein the second evaluation unit is configured to receive the sampled input signal when the signal distribution unit electrically connects the sampling switch to the second evaluation unit. 6. The integrated circuit device of claim 5, wherein the control circuit is further configured to control a timing of a sampling phase of the sampling switch in accordance with a timing requirement of one or more of the first evaluation unit or the second evaluation unit. 7. The integrated circuit device of claim 5, wherein the control circuit is further configured to:
control a timing of an evaluation phase of the first evaluation unit; and control a timing of an evaluation phase of the second evaluation unit. 8. The integrated device of claim 7, wherein the timing of the evaluation phase of the first evaluation unit is different from the timing of the evaluation phase of the second evaluation unit. 9. The integrated device of claim 8, wherein the evaluation phase of the first evaluation unit does not overlap with the evaluation phase of the second evaluation unit in terms of timing. 10. The integrated circuit device of claim 5, wherein the signal distribution unit comprises:
a first distribution switch configured to electrically connect the sampling switch to the first evaluation unit when the first distribution switch is active; and a second distribution switch configured to electrically connect the sampling switch to the second evaluation unit when the second distribution switch is active. 11. The integrated circuit device of claim 1, further comprising a sampling unit configured to:
receive the sampled input signal; and deliver the sampled input signal to one or more of the first evaluation unit or the second evaluation unit. 12. The integrated circuit device of claim 11, further comprising a control circuit configured to control a timing of a sampling phase of the sampling switch in accordance with a timing requirement of the sampling unit. 13. The integrated circuit device of claim 1, further comprising a voltage divider circuit configured to:
receive the sampled input signal at the first voltage level from the sampling switch; and deliver a divided signal at the second voltage level to the at least one of the first evaluation circuit or the second evaluation unit based on the sampled input signal. 14. The integrated circuit device of claim 1, wherein the sampling switch is configured to:
be coupled to a first electrical component; and sample a voltage difference between a first terminal and a second terminal of the electrical component, wherein one or more of the first evaluation unit or the second evaluation unit is configured to receive the sampled voltage difference. 15. A method comprising:
controlling a first evaluation unit of an integrated circuit device to receive a sampled input signal from a sampling switch of the integrated circuit device and evaluate the sampled input signal; controlling a second evaluation unit of the integrated circuit device to receive the sampled input signal from the sampling switch and evaluate the sampled input signal; and controlling the sampling switch, wherein controlling the sampling switch comprises:
sampling the input signal;
delivering the sampled input signal to the first evaluation unit; and
delivering the sampled input signal to the second evaluation unit,
wherein an operating voltage range of the sampling switch is greater than an operating voltage range of at least one of the first evaluation unit or the second evaluation unit such that the sampling switch is configured to receive the input signal at a first voltage level and the at least one of the first evaluation unit or the second evaluation unit is configured to receive the sampled input signal at a second voltage level, and wherein the second voltage level is lower than the first voltage level. 16. The method of claim 15, wherein controlling the sampling switch further comprises controlling a timing of a sampling phase of the sampling switch in accordance with a timing requirement of one or more of the first evaluation unit or the second evaluation unit. 17. The method of claim 15, further comprising:
controlling a timing of an evaluation phase of the first evaluation unit; and controlling a timing of an evaluation phase of the second evaluation unit. 18. The method of claim 15, further comprising:
controlling a sampling unit to receive the sampled input signal; and controlling the sampling unit to deliver the sampled input signal to one or more of the first evaluation unit or the second evaluation unit. 19. A device comprising:
a sampling switch configured to sample an input signal; a first evaluation unit configured to:
receive the sampled input signal from the sampling switch; and
evaluate the sampled input signal; and
a second evaluation unit configured to:
receive the sampled input signal from the sampling switch; and
evaluate the sampled input signal,
wherein the first evaluation unit and the second evaluation unit are configured to share the sampling switch, wherein an operating voltage range of the sampling switch is greater than an operating voltage range of at least one of the first evaluation unit or the second evaluation unit such that the sampling switch is configured to receive the input signal at a first voltage level and the at least one of the first evaluation unit or the second evaluation unit is configured to receive the sampled input signal at a second voltage level, and wherein the second voltage level is lower than the first voltage level. 20. The device of claim 19, wherein the sampling switch, the first evaluation unit, and the second evaluation unit are integrated in a single semiconductor substrate. 21. The device of claim 19,
wherein an operating voltage range of the first evaluation unit is different from an operating voltage range of the second evaluation unit, and wherein an evaluation scheme of the first evaluation unit is different from an evaluation scheme of the second evaluation unit. | 2,800 |
12,021 | 12,021 | 15,432,150 | 2,838 | A method may include operating a DC-DC switch converter in a forced continuous conduction mode in which for each switching cycle of the switch converter during the forced continuous conduction mode, the switch converter operates in a series of phases including: a first phase in which an inductor current flowing in an inductor of the switch converter increases from zero to a controlled positive current magnitude with respect to a first terminal and a second terminal of the inductor; a second phase in which the inductor current decreases from the controlled positive current magnitude to approximately zero; a third phase in which the inductor current decreases from approximately zero to a controlled negative current magnitude with respect to a first terminal and a second terminal of the inductor; and a fourth phase in which the inductor current increases from the controlled negative current magnitude to approximately zero. | 1. A method of operating a direct current-to-direct current (DC-DC) switch converter, comprising operating the DC-DC switch converter in a forced continuous conduction mode in which for each switching cycle of the DC-DC switch converter during the forced continuous conduction mode, the DC-DC switch converter operates in a series of phases including:
a first phase in which a power inductor current flowing in a power inductor of the DC-DC switch converter increases from zero to a controlled positive current magnitude with respect to a first terminal and a second terminal of the power inductor; a second phase in which the power inductor current decreases from the controlled positive current magnitude to approximately zero; a third phase in which the power inductor current decreases from approximately zero to a controlled negative current magnitude with respect to a first terminal and a second terminal of the power inductor; a fourth phase in which the power inductor current increases from the controlled negative current magnitude to approximately zero; and a fifth phase in which the power inductor current is zero for the duration of the fifth phase. 2. The method of claim 1, wherein the second phase and the third phase are combined into a single control phase in which the power inductor current decreases from the controlled positive current magnitude to the controlled negative current magnitude. 3. The method of claim 1, wherein at least one of the controlled positive current magnitude and the controlled negative current magnitude is controlled based on a passage of time related to at least one of the phases. 4. The method of claim 1, wherein at least one of the controlled positive current magnitude and the controlled negative current magnitude is controlled based on a measurement of the power inductor current. 5. The method of claim 1, further comprising:
operating the DC-DC switch converter in the forced continuous conduction mode to generate a parameter of the DC-DC switch converter less than a threshold parameter; and operating the DC-DC switch converter in a continuous conduction mode to generate the parameter greater than the threshold parameter, in which for each switching cycle of the DC-DC switch converter in the continuous conduction mode, the power inductor current is positive with respect to the first terminal and the second terminal of the power inductor during an entirety of each switching cycle in the continuous conduction mode. 6. The method of claim 5, wherein:
the parameter is an output voltage at an output of the DC-DC switch converter and the threshold parameter is a threshold voltage; the parameter is an output power at an output of the DC-DC switch converter and the threshold parameter is a threshold power; or the parameter is an electrical parameter internal to the DC-DC switch converter and the threshold parameter is a threshold electrical parameter. 7. The method of claim 1, further comprising:
operating the DC-DC switch converter in the forced continuous conduction mode to generate a parameter of the DC-DC switch converter less than a first threshold parameter; operating the DC-DC switch converter in a discontinuous conduction mode to generate the parameter greater than the first threshold parameter and less than a second threshold parameter, in which for each switching cycle of the DC-DC switch converter in the discontinuous conduction mode:
the power inductor current is positive with respect to the first terminal and the second terminal of the power inductor during a first DCM phase of each switching cycle; and
the power inductor current of the power inductor is zero during a second DCM phase of each switching cycle; and
operating the DC-DC switch converter in a continuous conduction mode to generate the parameter greater than the second threshold parameter, in which for each switching cycle of the DC-DC switch converter in the continuous conduction mode, the power inductor current is positive with respect to the first terminal and the second terminal of the power inductor during an entirety of each switching cycle in the continuous conduction mode. 8. The method of claim 7, wherein:
the parameter is an output voltage at an output of the DC-DC switch converter, the first threshold parameter is a first threshold voltage, and the second threshold parameter is a second threshold voltage; the parameter is an output power at an output of the DC-DC switch converter, the first threshold parameter is a first threshold power, and the second threshold parameter is a second threshold power; or the parameter is an electrical parameter internal to the DC-DC switch converter, the first threshold parameter is a first threshold electrical parameter, and the second threshold parameter is a second threshold electrical parameter. 9. The method of claim 7, further comprising, during the discontinuous conduction mode, controlling a duration of the first DCM phase relative to a switching cycle period between a maximum duration and a minimum duration in order to control the output voltage. 10. The method of claim 9, further comprising, during the forced continuous conduction mode, operating the DC-DC switch converter in the first phase and the second phase of the forced continuous conduction mode for a second duration equal to the minimum duration. 11. The method of claim 1, further comprising, during the forced continuous conduction mode, controlling a duration of the fifth phase relative to a switching cycle period in order to control an output voltage. 12. A method of operating a direct current-to-direct current (DC-DC) switch converter, comprising operating the DC-DC switch converter in a forced continuous conduction mode in which:
for some switching cycles of the DC-DC switch converter during the forced continuous conduction mode, the DC-DC switch converter operates in a first series of phases including:
a first phase in which a power inductor current flowing in a power inductor of the DC-DC switch converter increases from zero to a controlled positive current magnitude with respect to a first terminal and a second terminal of the power inductor;
a second phase in which the power inductor current decreases from the controlled positive current magnitude to approximately zero;
a third phase in which the power inductor current decreases from approximately zero to a controlled negative current magnitude with respect to a first terminal and a second terminal of the power inductor; and
a fourth phase in which the power inductor current increases from the controlled negative current magnitude to approximately zero; and
for other switching cycles of the DC-DC switch converter during the forced continuous conduction mode, the DC-DC switch converter operates in a second series of phases including:
the first phase;
the second phase;
the third phase;
the fourth phase; and
a fifth phase in which the power inductor current is zero for the duration of the fifth phase. 13. The method of claim 12, wherein the second phase and the third phase are combined into a single control phase in which the power inductor current decreases from the controlled positive current magnitude to the controlled negative current magnitude. 14. The method of claim 12, wherein at least one of the controlled positive current magnitude and the controlled negative current magnitude is controlled based on a passage of time related to at least one of the phases. 15. The method of claim 12, wherein at least one of the controlled positive current magnitude and the controlled negative current magnitude is controlled based on a measurement of the power inductor current. 16. The method of claim 12, further comprising:
operating the DC-DC switch converter in the forced continuous conduction mode to generate a parameter of the DC-DC switch converter less than a threshold parameter; and operating the DC-DC switch converter in a continuous conduction mode to generate the parameter greater than the threshold parameter, in which for each switching cycle of the DC-DC switch converter in the continuous conduction mode, the power inductor current is positive with respect to the first terminal and the second terminal of the power inductor during an entirety of each switching cycle in the continuous conduction mode. 17. The method of claim 16, wherein:
the parameter is an output voltage at an output of the DC-DC switch converter and the threshold parameter is a threshold voltage; the parameter is an output power at an output of the DC-DC switch converter and the threshold parameter is a threshold power; or the parameter is an electrical parameter internal to the DC-DC switch converter and the threshold parameter is a threshold electrical parameter. 18. The method of claim 12, further comprising:
operating the DC-DC switch converter in the forced continuous conduction mode to generate a parameter of the DC-DC switch converter less than a first threshold parameter; operating the DC-DC switch converter in a discontinuous conduction mode to generate the parameter greater than the first threshold parameter and less than a second threshold parameter, in which for each switching cycle of the DC-DC switch converter in the discontinuous conduction mode:
the power inductor current is positive with respect to the first terminal and the second terminal of the power inductor during a first DCM phase of each switching cycle; and
the power inductor current of the power inductor is zero during a second DCM phase of each switching cycle; and
operating the DC-DC switch converter in a continuous conduction mode to generate the parameter greater than the second threshold parameter, in which for each switching cycle of the DC-DC switch converter in the continuous conduction mode, the power inductor current is positive with respect to the first terminal and the second terminal of the power inductor during an entirety of each switching cycle in the continuous conduction mode. 19. The method of claim 18, wherein:
the parameter is an output voltage at an output of the DC-DC switch converter, the first threshold parameter is a first threshold voltage, and the second threshold parameter is a second threshold voltage; the parameter is an output power at an output of the DC-DC switch converter, the first threshold parameter is a first threshold power, and the second threshold parameter is a second threshold power; or the parameter is an electrical parameter internal to the DC-DC switch converter, the first threshold parameter is a first threshold electrical parameter, and the second threshold parameter is a second threshold electrical parameter. 20. The method of claim 19, further comprising, during the discontinuous conduction mode, controlling a duration of the first DCM phase relative to a switching cycle period between a maximum duration and a minimum duration in order to control an output voltage. 21. The method of claim 20, further comprising, during the forced continuous conduction mode, operating the DC-DC switch converter in the first phase and the second phase of the forced continuous conduction mode for a second duration equal to the minimum duration. 22. The method of claim 12, further comprising, during the forced continuous conduction mode, controlling a duration of the fifth phase relative to a switching cycle period in order to control an output voltage. 23. A direct current-to-direct current (DC-DC) switch converter comprising:
a power inductor; and a plurality of switches coupled to the power inductor and configured to operate the DC-DC switch converter in a forced continuous conduction mode in which for each switching cycle of the DC-DC switch converter during the forced continuous conduction mode, the DC-DC switch converter operates in a series of phases including:
a first phase in which a power inductor current flowing in a power inductor of the DC-DC switch converter increases from zero to a controlled positive current magnitude with respect to a first terminal and a second terminal of the power inductor;
a second phase in which the power inductor current decreases from the controlled positive current magnitude to approximately zero;
a third phase in which the power inductor current decreases from approximately zero to a controlled negative current magnitude with respect to a first terminal and a second terminal of the power inductor;
a fourth phase in which the power inductor current increases from the controlled negative current magnitude to approximately zero; and
a fifth phase in which the power inductor current is zero for the duration of the fifth phase. 24. The DC-DC switch converter of claim 23, wherein the second phase and the third phase are combined into a single control phase in which the power inductor current decreases from the controlled positive current magnitude to the controlled negative current magnitude. 25. The DC-DC switch converter of claim 23, wherein at least one of the controlled positive current magnitude and the controlled negative current magnitude is controlled based on a passage of time related to at least one of the phases. 26. The DC-DC switch converter of claim 23, wherein at least one of the controlled positive current magnitude and the controlled negative current magnitude is controlled based on a measurement of the power inductor current. 27. The DC-DC switch converter of claim 23, wherein the plurality of switches is further configured to:
operate the DC-DC switch converter in the forced continuous conduction mode to generate a parameter of the DC-DC switch converter less than a threshold parameter; and operate the DC-DC switch converter in a continuous conduction mode to generate the parameter greater than the threshold parameter, in which for each switching cycle of the DC-DC switch converter in the continuous conduction mode, the power inductor current is positive with respect to the first terminal and the second terminal of the power inductor during an entirety of each switching cycle in the continuous conduction mode. 28. The DC-DC switch converter of claim 27, wherein:
the parameter is an output voltage at an output of the DC-DC switch converter and the threshold parameter is a threshold voltage; the parameter is an output power at an output of the DC-DC switch converter and the threshold parameter is a threshold power; or the parameter is an electrical parameter internal to the DC-DC switch converter and the threshold parameter is a threshold electrical parameter. 29. The DC-DC switch converter of claim 23, wherein the plurality of switches is further configured to:
operate the DC-DC switch converter in the forced continuous conduction mode to generate a parameter of the DC-DC switch converter less than a first threshold parameter; operate the DC-DC switch converter in a discontinuous conduction mode to generate the parameter greater than the first threshold parameter and less than a second threshold parameter, in which for each switching cycle of the DC-DC switch converter in the discontinuous conduction mode:
the power inductor current is positive with respect to the first terminal and the second terminal of the power inductor during a first DCM phase of each switching cycle; and
the power inductor current of the power inductor is zero during a second DCM phase of each switching cycle; and
operate the DC-DC switch converter in a continuous conduction mode to generate the parameter greater than the second threshold parameter, in which for each switching cycle of the DC-DC switch converter in the continuous conduction mode, the power inductor current is positive with respect to the first terminal and the second terminal of the power inductor during an entirety of each switching cycle in the continuous conduction mode. 30. The DC-DC switch converter of claim 29, wherein:
the parameter is an output voltage at an output of the DC-DC switch converter, the first threshold parameter is a first threshold voltage, and the second threshold parameter is a second threshold voltage; the parameter is an output power at an output of the DC-DC switch converter, the first threshold parameter is a first threshold power, and the second threshold parameter is a second threshold power; or the parameter is an electrical parameter internal to the DC-DC switch converter, the first threshold parameter is a first threshold electrical parameter, and the second threshold parameter is a second threshold electrical parameter. 31. The DC-DC switch converter of claim 30, wherein the plurality of switches is further configured to, during the discontinuous conduction mode, control a duration of the first DCM phase relative to a switching cycle period between a maximum duration and a minimum duration in order to control the output voltage. 32. The DC-DC switch converter of claim 31, wherein the plurality of switches is further configured to, during the forced continuous conduction mode, operate the DC-DC switch converter in the first phase and the second phase of the forced continuous conduction mode for a second duration equal to the minimum duration. 33. The DC-DC switch converter of claim 23, wherein the plurality of switches is further configured to, during the forced continuous conduction mode, control a duration of the fifth phase relative to a switching cycle period in order to control an output voltage. 34. A direct current-to-direct current (DC-DC) switch converter comprising:
a power inductor; and a plurality of switches coupled to the power inductor and configured to operate the DC-DC switch converter in a forced continuous conduction mode in which:
for some switching cycles of the DC-DC switch converter during the forced continuous conduction mode, the DC-DC switch converter operates in a first series of phases including:
a first phase in which a power inductor current flowing in a power inductor of the DC-DC switch converter increases from zero to a controlled positive current magnitude with respect to a first terminal and a second terminal of the power inductor;
a second phase in which the power inductor current decreases from the controlled positive current magnitude to approximately zero;
a third phase in which the power inductor current decreases from approximately zero to a controlled negative current magnitude with respect to a first terminal and a second terminal of the power inductor; and
a fourth phase in which the power inductor current increases from the controlled negative current magnitude to approximately zero; and
for other switching cycles of the DC-DC switch converter during the forced continuous conduction mode, the DC-DC switch converter operates in a second series of phases including:
the first phase;
the second phase;
the third phase;
the fourth phase; and
a fifth phase in which the power inductor current is zero for the duration of the fifth phase. 35. The DC-DC switch converter of claim 34, wherein the second phase and the third phase are combined into a single control phase in which the power inductor current decreases from the controlled positive current magnitude to the controlled negative current magnitude. 36. The DC-DC switch converter of claim 34, wherein at least one of the controlled positive current magnitude and the controlled negative current magnitude is controlled based on a passage of time related to at least one of the phases. 37. The DC-DC switch converter of claim 34, wherein at least one of the controlled positive current magnitude and the controlled negative current magnitude is controlled based on a measurement of the power inductor current. 38. The DC-DC switch converter of claim 34, wherein the plurality of switches is further configured to:
operate the DC-DC switch converter in the forced continuous conduction mode to generate a parameter of the DC-DC switch converter less than a threshold parameter; and operate the DC-DC switch converter in a continuous conduction mode to generate the parameter greater than the threshold parameter, in which for each switching cycle of the DC-DC switch converter in the continuous conduction mode, the power inductor current is positive with respect to the first terminal and the second terminal of the power inductor during an entirety of each switching cycle in the continuous conduction mode. 39. The DC-DC switch converter of claim 38, wherein:
the parameter is an output voltage at an output of the DC-DC switch converter and the threshold parameter is a threshold voltage; the parameter is an output power at an output of the DC-DC switch converter and the threshold parameter is a threshold power; or the parameter is an electrical parameter internal to the DC-DC switch converter and the threshold parameter is a threshold electrical parameter. 40. The DC-DC switch converter of claim 34, wherein the plurality of switches is further configured to:
operate the DC-DC switch converter in the forced continuous conduction mode to generate a parameter of the DC-DC switch converter less than a first threshold parameter; operate the DC-DC switch converter in a discontinuous conduction mode to generate the parameter greater than the first threshold parameter and less than a second threshold parameter, in which for each switching cycle of the DC-DC switch converter in the discontinuous conduction mode:
the power inductor current is positive with respect to the first terminal and the second terminal of the power inductor during a first DCM phase of each switching cycle; and
the power inductor current of the power inductor is zero during a second DCM phase of each switching cycle; and
operate the DC-DC switch converter in a continuous conduction mode to generate the parameter greater than the second threshold parameter, in which for each switching cycle of the DC-DC switch converter in the continuous conduction mode, the power inductor current is positive with respect to the first terminal and the second terminal of the power inductor during an entirety of each switching cycle in the continuous conduction mode. 41. The DC-DC switch converter of claim 40, wherein:
the parameter is an output voltage at an output of the DC-DC switch converter, the first threshold parameter is a first threshold voltage, and the second threshold parameter is a second threshold voltage; the parameter is an output power at an output of the DC-DC switch converter, the first threshold parameter is a first threshold power, and the second threshold parameter is a second threshold power; or the parameter is an electrical parameter internal to the DC-DC switch converter, the first threshold parameter is a first threshold electrical parameter, and the second threshold parameter is a second threshold electrical parameter. 42. The DC-DC switch converter of claim 41, wherein the plurality of switches is further configured to, during the discontinuous conduction mode, control a duration of the first DCM phase relative to a switching cycle period between a maximum duration and a minimum duration in order to control the output voltage. 43. The DC-DC switch converter of claim 42, wherein the plurality of switches is further configured to, during the forced continuous conduction mode, operate the DC-DC switch converter in the first phase and the second phase of the forced continuous conduction mode for a second duration equal to the minimum duration. 44. The DC-DC switch converter of claim 34, wherein the plurality of switches is further configured to, during the forced continuous conduction mode, control a duration of the fifth phase relative to a switching cycle period in order to control an output voltage. | A method may include operating a DC-DC switch converter in a forced continuous conduction mode in which for each switching cycle of the switch converter during the forced continuous conduction mode, the switch converter operates in a series of phases including: a first phase in which an inductor current flowing in an inductor of the switch converter increases from zero to a controlled positive current magnitude with respect to a first terminal and a second terminal of the inductor; a second phase in which the inductor current decreases from the controlled positive current magnitude to approximately zero; a third phase in which the inductor current decreases from approximately zero to a controlled negative current magnitude with respect to a first terminal and a second terminal of the inductor; and a fourth phase in which the inductor current increases from the controlled negative current magnitude to approximately zero.1. A method of operating a direct current-to-direct current (DC-DC) switch converter, comprising operating the DC-DC switch converter in a forced continuous conduction mode in which for each switching cycle of the DC-DC switch converter during the forced continuous conduction mode, the DC-DC switch converter operates in a series of phases including:
a first phase in which a power inductor current flowing in a power inductor of the DC-DC switch converter increases from zero to a controlled positive current magnitude with respect to a first terminal and a second terminal of the power inductor; a second phase in which the power inductor current decreases from the controlled positive current magnitude to approximately zero; a third phase in which the power inductor current decreases from approximately zero to a controlled negative current magnitude with respect to a first terminal and a second terminal of the power inductor; a fourth phase in which the power inductor current increases from the controlled negative current magnitude to approximately zero; and a fifth phase in which the power inductor current is zero for the duration of the fifth phase. 2. The method of claim 1, wherein the second phase and the third phase are combined into a single control phase in which the power inductor current decreases from the controlled positive current magnitude to the controlled negative current magnitude. 3. The method of claim 1, wherein at least one of the controlled positive current magnitude and the controlled negative current magnitude is controlled based on a passage of time related to at least one of the phases. 4. The method of claim 1, wherein at least one of the controlled positive current magnitude and the controlled negative current magnitude is controlled based on a measurement of the power inductor current. 5. The method of claim 1, further comprising:
operating the DC-DC switch converter in the forced continuous conduction mode to generate a parameter of the DC-DC switch converter less than a threshold parameter; and operating the DC-DC switch converter in a continuous conduction mode to generate the parameter greater than the threshold parameter, in which for each switching cycle of the DC-DC switch converter in the continuous conduction mode, the power inductor current is positive with respect to the first terminal and the second terminal of the power inductor during an entirety of each switching cycle in the continuous conduction mode. 6. The method of claim 5, wherein:
the parameter is an output voltage at an output of the DC-DC switch converter and the threshold parameter is a threshold voltage; the parameter is an output power at an output of the DC-DC switch converter and the threshold parameter is a threshold power; or the parameter is an electrical parameter internal to the DC-DC switch converter and the threshold parameter is a threshold electrical parameter. 7. The method of claim 1, further comprising:
operating the DC-DC switch converter in the forced continuous conduction mode to generate a parameter of the DC-DC switch converter less than a first threshold parameter; operating the DC-DC switch converter in a discontinuous conduction mode to generate the parameter greater than the first threshold parameter and less than a second threshold parameter, in which for each switching cycle of the DC-DC switch converter in the discontinuous conduction mode:
the power inductor current is positive with respect to the first terminal and the second terminal of the power inductor during a first DCM phase of each switching cycle; and
the power inductor current of the power inductor is zero during a second DCM phase of each switching cycle; and
operating the DC-DC switch converter in a continuous conduction mode to generate the parameter greater than the second threshold parameter, in which for each switching cycle of the DC-DC switch converter in the continuous conduction mode, the power inductor current is positive with respect to the first terminal and the second terminal of the power inductor during an entirety of each switching cycle in the continuous conduction mode. 8. The method of claim 7, wherein:
the parameter is an output voltage at an output of the DC-DC switch converter, the first threshold parameter is a first threshold voltage, and the second threshold parameter is a second threshold voltage; the parameter is an output power at an output of the DC-DC switch converter, the first threshold parameter is a first threshold power, and the second threshold parameter is a second threshold power; or the parameter is an electrical parameter internal to the DC-DC switch converter, the first threshold parameter is a first threshold electrical parameter, and the second threshold parameter is a second threshold electrical parameter. 9. The method of claim 7, further comprising, during the discontinuous conduction mode, controlling a duration of the first DCM phase relative to a switching cycle period between a maximum duration and a minimum duration in order to control the output voltage. 10. The method of claim 9, further comprising, during the forced continuous conduction mode, operating the DC-DC switch converter in the first phase and the second phase of the forced continuous conduction mode for a second duration equal to the minimum duration. 11. The method of claim 1, further comprising, during the forced continuous conduction mode, controlling a duration of the fifth phase relative to a switching cycle period in order to control an output voltage. 12. A method of operating a direct current-to-direct current (DC-DC) switch converter, comprising operating the DC-DC switch converter in a forced continuous conduction mode in which:
for some switching cycles of the DC-DC switch converter during the forced continuous conduction mode, the DC-DC switch converter operates in a first series of phases including:
a first phase in which a power inductor current flowing in a power inductor of the DC-DC switch converter increases from zero to a controlled positive current magnitude with respect to a first terminal and a second terminal of the power inductor;
a second phase in which the power inductor current decreases from the controlled positive current magnitude to approximately zero;
a third phase in which the power inductor current decreases from approximately zero to a controlled negative current magnitude with respect to a first terminal and a second terminal of the power inductor; and
a fourth phase in which the power inductor current increases from the controlled negative current magnitude to approximately zero; and
for other switching cycles of the DC-DC switch converter during the forced continuous conduction mode, the DC-DC switch converter operates in a second series of phases including:
the first phase;
the second phase;
the third phase;
the fourth phase; and
a fifth phase in which the power inductor current is zero for the duration of the fifth phase. 13. The method of claim 12, wherein the second phase and the third phase are combined into a single control phase in which the power inductor current decreases from the controlled positive current magnitude to the controlled negative current magnitude. 14. The method of claim 12, wherein at least one of the controlled positive current magnitude and the controlled negative current magnitude is controlled based on a passage of time related to at least one of the phases. 15. The method of claim 12, wherein at least one of the controlled positive current magnitude and the controlled negative current magnitude is controlled based on a measurement of the power inductor current. 16. The method of claim 12, further comprising:
operating the DC-DC switch converter in the forced continuous conduction mode to generate a parameter of the DC-DC switch converter less than a threshold parameter; and operating the DC-DC switch converter in a continuous conduction mode to generate the parameter greater than the threshold parameter, in which for each switching cycle of the DC-DC switch converter in the continuous conduction mode, the power inductor current is positive with respect to the first terminal and the second terminal of the power inductor during an entirety of each switching cycle in the continuous conduction mode. 17. The method of claim 16, wherein:
the parameter is an output voltage at an output of the DC-DC switch converter and the threshold parameter is a threshold voltage; the parameter is an output power at an output of the DC-DC switch converter and the threshold parameter is a threshold power; or the parameter is an electrical parameter internal to the DC-DC switch converter and the threshold parameter is a threshold electrical parameter. 18. The method of claim 12, further comprising:
operating the DC-DC switch converter in the forced continuous conduction mode to generate a parameter of the DC-DC switch converter less than a first threshold parameter; operating the DC-DC switch converter in a discontinuous conduction mode to generate the parameter greater than the first threshold parameter and less than a second threshold parameter, in which for each switching cycle of the DC-DC switch converter in the discontinuous conduction mode:
the power inductor current is positive with respect to the first terminal and the second terminal of the power inductor during a first DCM phase of each switching cycle; and
the power inductor current of the power inductor is zero during a second DCM phase of each switching cycle; and
operating the DC-DC switch converter in a continuous conduction mode to generate the parameter greater than the second threshold parameter, in which for each switching cycle of the DC-DC switch converter in the continuous conduction mode, the power inductor current is positive with respect to the first terminal and the second terminal of the power inductor during an entirety of each switching cycle in the continuous conduction mode. 19. The method of claim 18, wherein:
the parameter is an output voltage at an output of the DC-DC switch converter, the first threshold parameter is a first threshold voltage, and the second threshold parameter is a second threshold voltage; the parameter is an output power at an output of the DC-DC switch converter, the first threshold parameter is a first threshold power, and the second threshold parameter is a second threshold power; or the parameter is an electrical parameter internal to the DC-DC switch converter, the first threshold parameter is a first threshold electrical parameter, and the second threshold parameter is a second threshold electrical parameter. 20. The method of claim 19, further comprising, during the discontinuous conduction mode, controlling a duration of the first DCM phase relative to a switching cycle period between a maximum duration and a minimum duration in order to control an output voltage. 21. The method of claim 20, further comprising, during the forced continuous conduction mode, operating the DC-DC switch converter in the first phase and the second phase of the forced continuous conduction mode for a second duration equal to the minimum duration. 22. The method of claim 12, further comprising, during the forced continuous conduction mode, controlling a duration of the fifth phase relative to a switching cycle period in order to control an output voltage. 23. A direct current-to-direct current (DC-DC) switch converter comprising:
a power inductor; and a plurality of switches coupled to the power inductor and configured to operate the DC-DC switch converter in a forced continuous conduction mode in which for each switching cycle of the DC-DC switch converter during the forced continuous conduction mode, the DC-DC switch converter operates in a series of phases including:
a first phase in which a power inductor current flowing in a power inductor of the DC-DC switch converter increases from zero to a controlled positive current magnitude with respect to a first terminal and a second terminal of the power inductor;
a second phase in which the power inductor current decreases from the controlled positive current magnitude to approximately zero;
a third phase in which the power inductor current decreases from approximately zero to a controlled negative current magnitude with respect to a first terminal and a second terminal of the power inductor;
a fourth phase in which the power inductor current increases from the controlled negative current magnitude to approximately zero; and
a fifth phase in which the power inductor current is zero for the duration of the fifth phase. 24. The DC-DC switch converter of claim 23, wherein the second phase and the third phase are combined into a single control phase in which the power inductor current decreases from the controlled positive current magnitude to the controlled negative current magnitude. 25. The DC-DC switch converter of claim 23, wherein at least one of the controlled positive current magnitude and the controlled negative current magnitude is controlled based on a passage of time related to at least one of the phases. 26. The DC-DC switch converter of claim 23, wherein at least one of the controlled positive current magnitude and the controlled negative current magnitude is controlled based on a measurement of the power inductor current. 27. The DC-DC switch converter of claim 23, wherein the plurality of switches is further configured to:
operate the DC-DC switch converter in the forced continuous conduction mode to generate a parameter of the DC-DC switch converter less than a threshold parameter; and operate the DC-DC switch converter in a continuous conduction mode to generate the parameter greater than the threshold parameter, in which for each switching cycle of the DC-DC switch converter in the continuous conduction mode, the power inductor current is positive with respect to the first terminal and the second terminal of the power inductor during an entirety of each switching cycle in the continuous conduction mode. 28. The DC-DC switch converter of claim 27, wherein:
the parameter is an output voltage at an output of the DC-DC switch converter and the threshold parameter is a threshold voltage; the parameter is an output power at an output of the DC-DC switch converter and the threshold parameter is a threshold power; or the parameter is an electrical parameter internal to the DC-DC switch converter and the threshold parameter is a threshold electrical parameter. 29. The DC-DC switch converter of claim 23, wherein the plurality of switches is further configured to:
operate the DC-DC switch converter in the forced continuous conduction mode to generate a parameter of the DC-DC switch converter less than a first threshold parameter; operate the DC-DC switch converter in a discontinuous conduction mode to generate the parameter greater than the first threshold parameter and less than a second threshold parameter, in which for each switching cycle of the DC-DC switch converter in the discontinuous conduction mode:
the power inductor current is positive with respect to the first terminal and the second terminal of the power inductor during a first DCM phase of each switching cycle; and
the power inductor current of the power inductor is zero during a second DCM phase of each switching cycle; and
operate the DC-DC switch converter in a continuous conduction mode to generate the parameter greater than the second threshold parameter, in which for each switching cycle of the DC-DC switch converter in the continuous conduction mode, the power inductor current is positive with respect to the first terminal and the second terminal of the power inductor during an entirety of each switching cycle in the continuous conduction mode. 30. The DC-DC switch converter of claim 29, wherein:
the parameter is an output voltage at an output of the DC-DC switch converter, the first threshold parameter is a first threshold voltage, and the second threshold parameter is a second threshold voltage; the parameter is an output power at an output of the DC-DC switch converter, the first threshold parameter is a first threshold power, and the second threshold parameter is a second threshold power; or the parameter is an electrical parameter internal to the DC-DC switch converter, the first threshold parameter is a first threshold electrical parameter, and the second threshold parameter is a second threshold electrical parameter. 31. The DC-DC switch converter of claim 30, wherein the plurality of switches is further configured to, during the discontinuous conduction mode, control a duration of the first DCM phase relative to a switching cycle period between a maximum duration and a minimum duration in order to control the output voltage. 32. The DC-DC switch converter of claim 31, wherein the plurality of switches is further configured to, during the forced continuous conduction mode, operate the DC-DC switch converter in the first phase and the second phase of the forced continuous conduction mode for a second duration equal to the minimum duration. 33. The DC-DC switch converter of claim 23, wherein the plurality of switches is further configured to, during the forced continuous conduction mode, control a duration of the fifth phase relative to a switching cycle period in order to control an output voltage. 34. A direct current-to-direct current (DC-DC) switch converter comprising:
a power inductor; and a plurality of switches coupled to the power inductor and configured to operate the DC-DC switch converter in a forced continuous conduction mode in which:
for some switching cycles of the DC-DC switch converter during the forced continuous conduction mode, the DC-DC switch converter operates in a first series of phases including:
a first phase in which a power inductor current flowing in a power inductor of the DC-DC switch converter increases from zero to a controlled positive current magnitude with respect to a first terminal and a second terminal of the power inductor;
a second phase in which the power inductor current decreases from the controlled positive current magnitude to approximately zero;
a third phase in which the power inductor current decreases from approximately zero to a controlled negative current magnitude with respect to a first terminal and a second terminal of the power inductor; and
a fourth phase in which the power inductor current increases from the controlled negative current magnitude to approximately zero; and
for other switching cycles of the DC-DC switch converter during the forced continuous conduction mode, the DC-DC switch converter operates in a second series of phases including:
the first phase;
the second phase;
the third phase;
the fourth phase; and
a fifth phase in which the power inductor current is zero for the duration of the fifth phase. 35. The DC-DC switch converter of claim 34, wherein the second phase and the third phase are combined into a single control phase in which the power inductor current decreases from the controlled positive current magnitude to the controlled negative current magnitude. 36. The DC-DC switch converter of claim 34, wherein at least one of the controlled positive current magnitude and the controlled negative current magnitude is controlled based on a passage of time related to at least one of the phases. 37. The DC-DC switch converter of claim 34, wherein at least one of the controlled positive current magnitude and the controlled negative current magnitude is controlled based on a measurement of the power inductor current. 38. The DC-DC switch converter of claim 34, wherein the plurality of switches is further configured to:
operate the DC-DC switch converter in the forced continuous conduction mode to generate a parameter of the DC-DC switch converter less than a threshold parameter; and operate the DC-DC switch converter in a continuous conduction mode to generate the parameter greater than the threshold parameter, in which for each switching cycle of the DC-DC switch converter in the continuous conduction mode, the power inductor current is positive with respect to the first terminal and the second terminal of the power inductor during an entirety of each switching cycle in the continuous conduction mode. 39. The DC-DC switch converter of claim 38, wherein:
the parameter is an output voltage at an output of the DC-DC switch converter and the threshold parameter is a threshold voltage; the parameter is an output power at an output of the DC-DC switch converter and the threshold parameter is a threshold power; or the parameter is an electrical parameter internal to the DC-DC switch converter and the threshold parameter is a threshold electrical parameter. 40. The DC-DC switch converter of claim 34, wherein the plurality of switches is further configured to:
operate the DC-DC switch converter in the forced continuous conduction mode to generate a parameter of the DC-DC switch converter less than a first threshold parameter; operate the DC-DC switch converter in a discontinuous conduction mode to generate the parameter greater than the first threshold parameter and less than a second threshold parameter, in which for each switching cycle of the DC-DC switch converter in the discontinuous conduction mode:
the power inductor current is positive with respect to the first terminal and the second terminal of the power inductor during a first DCM phase of each switching cycle; and
the power inductor current of the power inductor is zero during a second DCM phase of each switching cycle; and
operate the DC-DC switch converter in a continuous conduction mode to generate the parameter greater than the second threshold parameter, in which for each switching cycle of the DC-DC switch converter in the continuous conduction mode, the power inductor current is positive with respect to the first terminal and the second terminal of the power inductor during an entirety of each switching cycle in the continuous conduction mode. 41. The DC-DC switch converter of claim 40, wherein:
the parameter is an output voltage at an output of the DC-DC switch converter, the first threshold parameter is a first threshold voltage, and the second threshold parameter is a second threshold voltage; the parameter is an output power at an output of the DC-DC switch converter, the first threshold parameter is a first threshold power, and the second threshold parameter is a second threshold power; or the parameter is an electrical parameter internal to the DC-DC switch converter, the first threshold parameter is a first threshold electrical parameter, and the second threshold parameter is a second threshold electrical parameter. 42. The DC-DC switch converter of claim 41, wherein the plurality of switches is further configured to, during the discontinuous conduction mode, control a duration of the first DCM phase relative to a switching cycle period between a maximum duration and a minimum duration in order to control the output voltage. 43. The DC-DC switch converter of claim 42, wherein the plurality of switches is further configured to, during the forced continuous conduction mode, operate the DC-DC switch converter in the first phase and the second phase of the forced continuous conduction mode for a second duration equal to the minimum duration. 44. The DC-DC switch converter of claim 34, wherein the plurality of switches is further configured to, during the forced continuous conduction mode, control a duration of the fifth phase relative to a switching cycle period in order to control an output voltage. | 2,800 |
12,022 | 12,022 | 16,011,985 | 2,886 | A hearing aid includes a speaker driver, an optical source secured directly to the speaker driver, an optical detector secured directly to the speaker driver, a first light guide extending outwardly from the optical source and in optical communication with the optical source, and a second light guide extending outwardly from the optical detector and in optical communication with the optical detector. The first light guide is configured to deliver light from the optical source into an ear region of the subject via a distal end thereof, and the second light guide is configured to collect light from the ear region via a distal end thereof and deliver collected light to the optical detector. The hearing aid may include at least one signal processor configured to process signals produced by the optical detector, and at least one of the following: an accelerometer, a humidity sensor, an altimeter, a temperature sensor. | 1. A headset, comprising:
a speaker driver; a printed circuit board (PCB) directly mounted on a surface of the speaker driver; and a sensor module supported by the PCB and electrically connected to the speaker driver, wherein the sensor module comprises an optical source and an optical detector, and wherein the sensor module is configured to detect and/or measure physiological information from a subject wearing the headset, wherein the PCB is an elongated, flexible PCB having a distal end portion, and wherein the optical source and optical detector are secured to the PCB at the distal end portion. 2. The headset of claim 1, further comprising a first light guide coupled to the optical source and/or a second light guide coupled to the optical detector, wherein the first light guide is configured to deliver light from the optical source into an ear region of the subject via a distal end thereof, and wherein the second light guide is configured to collect light from the ear region via a distal end thereof and deliver collected light to the optical detector. 3. The headset of claim 1, further comprising at least one of the following secured to the PCB: an accelerometer, a humidity sensor, an altimeter, a temperature sensor. 4. The headset of claim 1, further comprising at least one signal processor secured to the PCB that is configured to process signals produced by the optical detector. 5. The headset of claim 1, wherein the headset is in communication with a data processing unit configured to process signals produced by the optical detector. 6. The headset of claim 1, wherein the headset is a hearing aid. 7. A headset, comprising:
a speaker driver; a printed circuit board (PCB) directly mounted on a surface of the speaker driver; an optical emitter and optical detector secured to the PCB; and a light guide configured to guide light between the optical emitter and a body of a subject wearing the headset, wherein the light guide comprises a distal end that is configured to engage a portion of the ear of the subject, and wherein the light guide is configured to guide light from the optical emitter to the portion of the ear via the distal end thereof. 8. The headset of claim 7, further comprising a second light guide configured to guide light between the optical detector and the body of the subject. 9. The headset of claim 8, wherein the second light guide comprises a distal end that is configured to engage a second portion of the ear of the subject, and wherein the second light guide is configured to collect light from the second ear region via the distal end thereof and deliver collected light to the optical detector. 10. The headset of claim 7, wherein the PCB is a flexible circuit. 11. The headset of claim 7, wherein the headset is a hearing aid. 12. A hearing aid, comprising:
a speaker driver; an optical source secured directly to the speaker driver; an optical detector secured directly to the speaker driver; a first light guide extending outwardly from the optical source, wherein the first light guide is in optical communication with the optical source; and a second light guide extending outwardly from the optical detector, wherein the second light guide is in optical communication with the optical detector. 13. The hearing aid of claim 1, wherein the first light guide is configured to deliver light from the optical source into an ear region of the subject via a distal end thereof, and wherein the second light guide is configured to collect light from the ear region via a distal end thereof and deliver collected light to the optical detector. 14. The hearing aid of claim 12, further comprising at least one signal processor secured directly to the speaker driver and configured to process signals produced by the optical detector. 15. The hearing aid of claim 12, further comprising at least one of the following secured directly to the speaker driver: an accelerometer, a humidity sensor, an altimeter, a temperature sensor. 16. The hearing aid of claim 12, wherein the speaker driver comprises opposite front and rear portions, wherein sound is emitted through at least one aperture formed in the front portion, and wherein the optical source and the optical detector are directly secured to the rear portion of the speaker driver. | A hearing aid includes a speaker driver, an optical source secured directly to the speaker driver, an optical detector secured directly to the speaker driver, a first light guide extending outwardly from the optical source and in optical communication with the optical source, and a second light guide extending outwardly from the optical detector and in optical communication with the optical detector. The first light guide is configured to deliver light from the optical source into an ear region of the subject via a distal end thereof, and the second light guide is configured to collect light from the ear region via a distal end thereof and deliver collected light to the optical detector. The hearing aid may include at least one signal processor configured to process signals produced by the optical detector, and at least one of the following: an accelerometer, a humidity sensor, an altimeter, a temperature sensor.1. A headset, comprising:
a speaker driver; a printed circuit board (PCB) directly mounted on a surface of the speaker driver; and a sensor module supported by the PCB and electrically connected to the speaker driver, wherein the sensor module comprises an optical source and an optical detector, and wherein the sensor module is configured to detect and/or measure physiological information from a subject wearing the headset, wherein the PCB is an elongated, flexible PCB having a distal end portion, and wherein the optical source and optical detector are secured to the PCB at the distal end portion. 2. The headset of claim 1, further comprising a first light guide coupled to the optical source and/or a second light guide coupled to the optical detector, wherein the first light guide is configured to deliver light from the optical source into an ear region of the subject via a distal end thereof, and wherein the second light guide is configured to collect light from the ear region via a distal end thereof and deliver collected light to the optical detector. 3. The headset of claim 1, further comprising at least one of the following secured to the PCB: an accelerometer, a humidity sensor, an altimeter, a temperature sensor. 4. The headset of claim 1, further comprising at least one signal processor secured to the PCB that is configured to process signals produced by the optical detector. 5. The headset of claim 1, wherein the headset is in communication with a data processing unit configured to process signals produced by the optical detector. 6. The headset of claim 1, wherein the headset is a hearing aid. 7. A headset, comprising:
a speaker driver; a printed circuit board (PCB) directly mounted on a surface of the speaker driver; an optical emitter and optical detector secured to the PCB; and a light guide configured to guide light between the optical emitter and a body of a subject wearing the headset, wherein the light guide comprises a distal end that is configured to engage a portion of the ear of the subject, and wherein the light guide is configured to guide light from the optical emitter to the portion of the ear via the distal end thereof. 8. The headset of claim 7, further comprising a second light guide configured to guide light between the optical detector and the body of the subject. 9. The headset of claim 8, wherein the second light guide comprises a distal end that is configured to engage a second portion of the ear of the subject, and wherein the second light guide is configured to collect light from the second ear region via the distal end thereof and deliver collected light to the optical detector. 10. The headset of claim 7, wherein the PCB is a flexible circuit. 11. The headset of claim 7, wherein the headset is a hearing aid. 12. A hearing aid, comprising:
a speaker driver; an optical source secured directly to the speaker driver; an optical detector secured directly to the speaker driver; a first light guide extending outwardly from the optical source, wherein the first light guide is in optical communication with the optical source; and a second light guide extending outwardly from the optical detector, wherein the second light guide is in optical communication with the optical detector. 13. The hearing aid of claim 1, wherein the first light guide is configured to deliver light from the optical source into an ear region of the subject via a distal end thereof, and wherein the second light guide is configured to collect light from the ear region via a distal end thereof and deliver collected light to the optical detector. 14. The hearing aid of claim 12, further comprising at least one signal processor secured directly to the speaker driver and configured to process signals produced by the optical detector. 15. The hearing aid of claim 12, further comprising at least one of the following secured directly to the speaker driver: an accelerometer, a humidity sensor, an altimeter, a temperature sensor. 16. The hearing aid of claim 12, wherein the speaker driver comprises opposite front and rear portions, wherein sound is emitted through at least one aperture formed in the front portion, and wherein the optical source and the optical detector are directly secured to the rear portion of the speaker driver. | 2,800 |
12,023 | 12,023 | 15,301,772 | 2,816 | A method for mounting an electrical component on a substrate is disclosed. According to the method, joining is simplified using a cover, or hood, that includes a contact structure on an inner side of the hood, wherein when the hood is mounted, the contact structure is joined to the underlying structure at different joining levels simultaneously using an additional material. Moreover, a joining pressure, e.g., for diffusion or sintered bonds for electrical contacts, can be applied using such a hood. | 1. A method for mounting an electrical component on a substrate, wherein the component has a bottom side facing toward the substrate and a top side situated opposite said bottom side, the method comprising:
mounting the component onto the substrate, forming a cover including integrated conductor paths that define a contacting structure, mounting the cover onto a mounting side of the substrate and onto the top side of the component mounted on the substrate, such that:
the cover laterally traverses the component,
first contact surfaces of the contacting structure laterally outside the component contact the substrate at a first joining level defined at the mounting side of the substrate, and
electrical contact is generated between second contact surfaces of the contacting structure and the component at a second joining level defined at the top side of the component, the second joining level being different than the first joining level. 2. The method of claim 1, comprising, after mounting the component to the substrate and mounting the cover onto the substrate and the component, performing a temperature or pressure based joining process to complete joining connections between the cover and the component at the first joining level and between the cover and the substrate at the second joining level. 3. The method of claim 1, comprising mounting a rear side of the substrate, opposite the mounting side, to a component part at a third level, and
completing a joining connection between the substrate and the component part at the third joining level, simultaneous with the completion of the joining connections at the first and second joining levels, via the temperature or pressure based joining process. 4. The method of claim 1, wherein the cover has a planar outer surface that runs parallel to the substrate. 5. The method of claim 1, wherein a joining surface of the cover separate from the contacting structure enters into engagement with the top side of the electrical component during the mounting of the cover. 6. The method of claim 5, wherein a contact surface defined by the engagement of the joining surface with the top side of the electrical component is located outside the electrical contacting. 7. The method of claim 2 wherein the completion of the joining connections is performed by diffusion soldering or sintering. 8. The method of claim 1, comprising providing an additional material on contact surfaces of the contacting structure before mounting the cover onto the substrate. 9. A cover for an electrical assembly that includes a substrate and at least one component mounted on said substrate, the cover comprising:
a support surface on an inner side of the cover and configured to engage the substrate upon mounting the cover onto the substrate, a cavity configured to receive the component upon mounting the cover onto the substrate, conductor paths defining a contacting structure on an inner side of the cover, wherein the contact structure extends from the support surface into the cavity of the cover. 10. The cover of claim 9, comprising an additional material applied to contact surfaces of the contact structure. 11. The cover of claim 9, wherein the cover is a low temperature co-fired ceramics component or a molded interconnect devices (MID) component. 12. The cover of claim 9, wherein the support surface is formed by an edge of the cover. 13. The cover of claim 9, wherein an outer side of the cover is planar. | A method for mounting an electrical component on a substrate is disclosed. According to the method, joining is simplified using a cover, or hood, that includes a contact structure on an inner side of the hood, wherein when the hood is mounted, the contact structure is joined to the underlying structure at different joining levels simultaneously using an additional material. Moreover, a joining pressure, e.g., for diffusion or sintered bonds for electrical contacts, can be applied using such a hood.1. A method for mounting an electrical component on a substrate, wherein the component has a bottom side facing toward the substrate and a top side situated opposite said bottom side, the method comprising:
mounting the component onto the substrate, forming a cover including integrated conductor paths that define a contacting structure, mounting the cover onto a mounting side of the substrate and onto the top side of the component mounted on the substrate, such that:
the cover laterally traverses the component,
first contact surfaces of the contacting structure laterally outside the component contact the substrate at a first joining level defined at the mounting side of the substrate, and
electrical contact is generated between second contact surfaces of the contacting structure and the component at a second joining level defined at the top side of the component, the second joining level being different than the first joining level. 2. The method of claim 1, comprising, after mounting the component to the substrate and mounting the cover onto the substrate and the component, performing a temperature or pressure based joining process to complete joining connections between the cover and the component at the first joining level and between the cover and the substrate at the second joining level. 3. The method of claim 1, comprising mounting a rear side of the substrate, opposite the mounting side, to a component part at a third level, and
completing a joining connection between the substrate and the component part at the third joining level, simultaneous with the completion of the joining connections at the first and second joining levels, via the temperature or pressure based joining process. 4. The method of claim 1, wherein the cover has a planar outer surface that runs parallel to the substrate. 5. The method of claim 1, wherein a joining surface of the cover separate from the contacting structure enters into engagement with the top side of the electrical component during the mounting of the cover. 6. The method of claim 5, wherein a contact surface defined by the engagement of the joining surface with the top side of the electrical component is located outside the electrical contacting. 7. The method of claim 2 wherein the completion of the joining connections is performed by diffusion soldering or sintering. 8. The method of claim 1, comprising providing an additional material on contact surfaces of the contacting structure before mounting the cover onto the substrate. 9. A cover for an electrical assembly that includes a substrate and at least one component mounted on said substrate, the cover comprising:
a support surface on an inner side of the cover and configured to engage the substrate upon mounting the cover onto the substrate, a cavity configured to receive the component upon mounting the cover onto the substrate, conductor paths defining a contacting structure on an inner side of the cover, wherein the contact structure extends from the support surface into the cavity of the cover. 10. The cover of claim 9, comprising an additional material applied to contact surfaces of the contact structure. 11. The cover of claim 9, wherein the cover is a low temperature co-fired ceramics component or a molded interconnect devices (MID) component. 12. The cover of claim 9, wherein the support surface is formed by an edge of the cover. 13. The cover of claim 9, wherein an outer side of the cover is planar. | 2,800 |
12,024 | 12,024 | 14,804,031 | 2,853 | In an aspect, a system and method for assembling a semiconductor device on a receiving surface of a destination substrate is disclosed. In another aspect, a system and method for assembling a semiconductor device on a destination substrate with topographic features is disclosed. In another aspect, a gravity-assisted separation system and method for printing semiconductor device is disclosed. In another aspect, various features of a transfer device for printing semiconductor devices are disclosed. | 1. A conformable transfer device with reduced crowning, the transfer device comprising:
a bulk volume having a first surface and a second surface, opposite the first surface, and a side between the first surface and the second surface, wherein the bulk area comprises a tapered surface connecting the side to the first surface; and a plurality of printing posts disposed on the first surface of the bulk volume for picking up printable material, wherein the plurality of printing posts and the bulk volume are arranged such that a force applied to the second surface of the bulk volume is transmitted to the plurality of printing posts. 2. The device of claim 1, wherein an aspect ratio(height to width) of each post of the plurality of posts is less than or equal to 4:1 (e.g., from 2:1 to 4:1). 3-8. (canceled) 9. The device of claim 1, wherein the plurality of printing posts have a first Young's modulus and the base has a second Young's modulus, greater than the first Young's modulus. 10-16. (canceled) 17. The device of claim 1, wherein a least a portion of the posts are arranged on the first surface from 1 mm to 15 mm away from a edge of the first surface (e.g., from 1 mm to 5 mm or 5 mm to 10 mm, 10 mm to 15 mm from the edge). 18. The device of claim 1, wherein the bulk volume has a side surface between the first and second surfaces. 19. (canceled) 20. The devices of claim 18, wherein the side surface has a rounded profile (e.g., convex or concave). 21. The device of claim 18, wherein the side surface has a beveled edge forming an angle from horizontal (parallel to the first surface) of no greater than 75° (e.g., no greater than 60°, no greater than 45°, no greater than 30°, or no greater than 15°). 22. A conformable transfer device comprising an elastomer (e.g., PDMS) slab (e.g., bulk volume) having a mesa configuration with a surface upon which a plurality of (e.g., array of) posts are disposed, wherein one or more of the following holds [any of (i), (ii), and/or (iii)]:
(i) the edge of the mesa has a beveled and/or rounded edge so as to reduce distortion of the surface and allow accurate spacing of the plurality of posts; (ii) the plurality of posts are arranged on the surface at least 1 mm away from the edge (e.g., from 1 mm to 5 mm or 5 mm to 20 mm from the edge); and (iii) the mesa has a thickness no greater than 10 mm (e.g., from 1 to 5 mm). 23. The device of claim 22, wherein the edge of the mesa has a beveled edge forming an angle from horizontal (parallel to the surface) of no greater than 75° (e.g., no greater than 60°, no greater than 45°, no greater than 30°, or no greater than 15°). 24. The device of claim 22, wherein the edge of the mesa has a rounded profile (e.g., convex or concave). 25-32. (canceled) 33. The device of claim 22, wherein the posts have a first Young's modulus and the mesa has a second Young's modulus, greater than the first Young's modulus. 34-41. (canceled) 42. A conformable transfer device, the transfer device comprising:
a bulk volume having a first surface and a second surface, opposite the first surface; a mesa disposed on the bulk volume; a layer comprising a plurality of posts (e.g., array of posts) disposed on the mesa, opposite the bulk volume, for picking up printable material, wherein the plurality of posts, the mesa, and the bulk volume are arranged such that a force applied to the second surface of the bulk volume is transmitted to the plurality of posts. 43. The device of claim 42, wherein a thickness of the mesa is greater than a thickness of the posts. 44. The device of claim 42, wherein an aspect ratio(height to width) of each post of the plurality of posts is less than or equal to 4:1 (e.g., from 2:1 to 4:1). 45-47. (canceled) 48. The device of claim 42, wherein a ratio of a thickness of the posts to a thickness of the bulk volume is from 1:1 to 1:10 (e.g., from 1:1 to 1:2, 1:2 to 1:4, 1:4 to 1:6, 1:6 to 1:8, or 1:8 to 1:10). 49-50. (canceled) 51. The device of claim 42, wherein the posts have a first Young's modulus and the bulk volume has a second Young's modulus, greater than the first Young's modulus. 52. (canceled) 53. The device of claim 51, wherein the mesa has the second Young's modulus. 54-61. (canceled) 62. The device of claim 42, wherein the bulk volume has a side surface between the first and second surfaces. 63. (canceled) 64. The devices of claim 62, wherein the side surface has a rounded profile (e.g., convex or concave). 65. The device of claim 62, wherein the side surface has a beveled edge forming an angle from horizontal (parallel to the first surface) of no greater than 75° (e.g., no greater than 60°, no greater than 45°, no greater than 30°, or no greater than 15°). 66-86. (canceled) | In an aspect, a system and method for assembling a semiconductor device on a receiving surface of a destination substrate is disclosed. In another aspect, a system and method for assembling a semiconductor device on a destination substrate with topographic features is disclosed. In another aspect, a gravity-assisted separation system and method for printing semiconductor device is disclosed. In another aspect, various features of a transfer device for printing semiconductor devices are disclosed.1. A conformable transfer device with reduced crowning, the transfer device comprising:
a bulk volume having a first surface and a second surface, opposite the first surface, and a side between the first surface and the second surface, wherein the bulk area comprises a tapered surface connecting the side to the first surface; and a plurality of printing posts disposed on the first surface of the bulk volume for picking up printable material, wherein the plurality of printing posts and the bulk volume are arranged such that a force applied to the second surface of the bulk volume is transmitted to the plurality of printing posts. 2. The device of claim 1, wherein an aspect ratio(height to width) of each post of the plurality of posts is less than or equal to 4:1 (e.g., from 2:1 to 4:1). 3-8. (canceled) 9. The device of claim 1, wherein the plurality of printing posts have a first Young's modulus and the base has a second Young's modulus, greater than the first Young's modulus. 10-16. (canceled) 17. The device of claim 1, wherein a least a portion of the posts are arranged on the first surface from 1 mm to 15 mm away from a edge of the first surface (e.g., from 1 mm to 5 mm or 5 mm to 10 mm, 10 mm to 15 mm from the edge). 18. The device of claim 1, wherein the bulk volume has a side surface between the first and second surfaces. 19. (canceled) 20. The devices of claim 18, wherein the side surface has a rounded profile (e.g., convex or concave). 21. The device of claim 18, wherein the side surface has a beveled edge forming an angle from horizontal (parallel to the first surface) of no greater than 75° (e.g., no greater than 60°, no greater than 45°, no greater than 30°, or no greater than 15°). 22. A conformable transfer device comprising an elastomer (e.g., PDMS) slab (e.g., bulk volume) having a mesa configuration with a surface upon which a plurality of (e.g., array of) posts are disposed, wherein one or more of the following holds [any of (i), (ii), and/or (iii)]:
(i) the edge of the mesa has a beveled and/or rounded edge so as to reduce distortion of the surface and allow accurate spacing of the plurality of posts; (ii) the plurality of posts are arranged on the surface at least 1 mm away from the edge (e.g., from 1 mm to 5 mm or 5 mm to 20 mm from the edge); and (iii) the mesa has a thickness no greater than 10 mm (e.g., from 1 to 5 mm). 23. The device of claim 22, wherein the edge of the mesa has a beveled edge forming an angle from horizontal (parallel to the surface) of no greater than 75° (e.g., no greater than 60°, no greater than 45°, no greater than 30°, or no greater than 15°). 24. The device of claim 22, wherein the edge of the mesa has a rounded profile (e.g., convex or concave). 25-32. (canceled) 33. The device of claim 22, wherein the posts have a first Young's modulus and the mesa has a second Young's modulus, greater than the first Young's modulus. 34-41. (canceled) 42. A conformable transfer device, the transfer device comprising:
a bulk volume having a first surface and a second surface, opposite the first surface; a mesa disposed on the bulk volume; a layer comprising a plurality of posts (e.g., array of posts) disposed on the mesa, opposite the bulk volume, for picking up printable material, wherein the plurality of posts, the mesa, and the bulk volume are arranged such that a force applied to the second surface of the bulk volume is transmitted to the plurality of posts. 43. The device of claim 42, wherein a thickness of the mesa is greater than a thickness of the posts. 44. The device of claim 42, wherein an aspect ratio(height to width) of each post of the plurality of posts is less than or equal to 4:1 (e.g., from 2:1 to 4:1). 45-47. (canceled) 48. The device of claim 42, wherein a ratio of a thickness of the posts to a thickness of the bulk volume is from 1:1 to 1:10 (e.g., from 1:1 to 1:2, 1:2 to 1:4, 1:4 to 1:6, 1:6 to 1:8, or 1:8 to 1:10). 49-50. (canceled) 51. The device of claim 42, wherein the posts have a first Young's modulus and the bulk volume has a second Young's modulus, greater than the first Young's modulus. 52. (canceled) 53. The device of claim 51, wherein the mesa has the second Young's modulus. 54-61. (canceled) 62. The device of claim 42, wherein the bulk volume has a side surface between the first and second surfaces. 63. (canceled) 64. The devices of claim 62, wherein the side surface has a rounded profile (e.g., convex or concave). 65. The device of claim 62, wherein the side surface has a beveled edge forming an angle from horizontal (parallel to the first surface) of no greater than 75° (e.g., no greater than 60°, no greater than 45°, no greater than 30°, or no greater than 15°). 66-86. (canceled) | 2,800 |
12,025 | 12,025 | 14,603,877 | 2,884 | Electro-optical sighting systems and methods are provided. One example includes a optical transmitter configured to emit an infrared beam along an optical path toward a target, a beam director positioned in the optical path and having a plurality of optical elements configured to direct the infrared beam and to collect reflected infrared radiation from reflection of the beam from the target, a focal plane array detector configured to receive reflected infrared radiation from the beam director, an optical phased array (OPA) positioned in the optical path between the optical transmitter and the beam director, and a controller operatively coupled to the OPA and configured to direct the OPA to defocus the infrared beam to broaden a field of view of the optical transmitter for active illumination, and focus the infrared beam to narrow the field of view of the optical transmitter for range determination and/or target designation. | 1. An electro-optical sighting system comprising:
a first optical transmitter configured to emit an infrared beam along an optical path toward a target; a beam director positioned in the optical path and having a plurality of optical elements configured to direct the infrared beam and to collect reflected infrared radiation from reflection of the beam from the target; a focal plane array detector configured to receive collected reflected infrared radiation from the beam director; an optical phased array positioned in the optical path between the first optical transmitter and the beam director; and a controller operatively coupled to the optical phased array and configured to direct the optical phased array to defocus the infrared beam to broaden a field of view of the first optical transmitter for active illumination, and focus the infrared beam to narrow the field of view of the first optical transmitter for range determination and/or target designation. 2. The system of claim 1, further comprising a beam splitter configured to direct the reflected infrared radiation collected by the beam director onto the focal plane array detector. 3. The system of claim 2, wherein the controller is coupled to the focal plane array detector and further configured to generate images of a scene including the target from the reflected infrared radiation directed onto the focal plane array detector. 4. The system of claim 3, wherein the controller is further configured to direct the optical phased array to defocus the infrared beam to broaden the field of view of the first optical transmitter, and focus the infrared beam to narrow the field of view in response to analysis of the generated images of a scene including the target. 5. The system of claim 3, wherein the controller is further configured to direct the optical phased array to defocus the infrared beam to broaden the field of view of the first optical transmitter, and focus the infrared beam to narrow the field of view in response to receiving external input from one or more external sources. 6. The system of claim 1, wherein the first optical transmitter includes a short wave infrared active illumination laser. 7. The system of claim 6, wherein the focal plane array detector is configured to sense light in a wavelength range of 1.0 μm to 2.0 μm. 8. The system of claim 7, further comprising a second optical transmitter configured to emit a second infrared beam along the optical path. 9. The system of claim 8, wherein the second optical transmitter includes a target designation laser. 10. The system of claim 8, wherein the second optical transmitter includes a range finding laser. 11. The system of claim 8, wherein the controller further comprises a user interface configured to receive a user focus command to defocus the infrared beam to broaden the field of view of the first optical transmitter, and to focus the infrared illumination beam to narrow the field of view of the first optical transmitter. 12. A method of operating an electro-optical sighting system comprising:
emitting an infrared beam from a first optical transmitter along an optical path through an optical phased array toward a target; focusing the infrared beam onto the target with the optical phased array to define a first field of view of the first optical transmitter; receiving reflected infrared radiation from reflection of the beam from the target at a focal plane array; and responsive to receiving reflected infrared radiation, re-focusing the infrared beam with the optical phased array onto the target to define a second field of view of the first optical transmitter. 13. The method of claim 12, further comprising receiving external input from one or more external sources. 14. The method of claim 13, further comprising re-focusing the infrared beam with the optical phased array onto the target to define a second field of view of the first optical transmitter responsive to receiving external input. 15. The method of claim 12, wherein the first optical transmitter includes an active illumination laser, and wherein re-focusing the infrared beam with the optical phased array onto the target further comprises broadening the first field of view to increase active illumination of the target by the infrared beam. 16. The method of claim 12, wherein the first optical transmitter includes a target designation laser, and wherein re-focusing the infrared beam with the optical phased array onto the target further comprises ascertaining an infrared beam target indicator size and maintaining the infrared beam target indicator size. 17. The method of claim 12, wherein the first optical transmitter includes a range finding laser, and wherein re-focusing the infrared beam with the optical phased array onto the target further comprises narrowing the first field of view to maximize emission distance of the infrared beam. 18. The method of claim 12, further comprising emitting a second infrared beam from a second optical transmitter along the optical path through the optical phased array toward the target. | Electro-optical sighting systems and methods are provided. One example includes a optical transmitter configured to emit an infrared beam along an optical path toward a target, a beam director positioned in the optical path and having a plurality of optical elements configured to direct the infrared beam and to collect reflected infrared radiation from reflection of the beam from the target, a focal plane array detector configured to receive reflected infrared radiation from the beam director, an optical phased array (OPA) positioned in the optical path between the optical transmitter and the beam director, and a controller operatively coupled to the OPA and configured to direct the OPA to defocus the infrared beam to broaden a field of view of the optical transmitter for active illumination, and focus the infrared beam to narrow the field of view of the optical transmitter for range determination and/or target designation.1. An electro-optical sighting system comprising:
a first optical transmitter configured to emit an infrared beam along an optical path toward a target; a beam director positioned in the optical path and having a plurality of optical elements configured to direct the infrared beam and to collect reflected infrared radiation from reflection of the beam from the target; a focal plane array detector configured to receive collected reflected infrared radiation from the beam director; an optical phased array positioned in the optical path between the first optical transmitter and the beam director; and a controller operatively coupled to the optical phased array and configured to direct the optical phased array to defocus the infrared beam to broaden a field of view of the first optical transmitter for active illumination, and focus the infrared beam to narrow the field of view of the first optical transmitter for range determination and/or target designation. 2. The system of claim 1, further comprising a beam splitter configured to direct the reflected infrared radiation collected by the beam director onto the focal plane array detector. 3. The system of claim 2, wherein the controller is coupled to the focal plane array detector and further configured to generate images of a scene including the target from the reflected infrared radiation directed onto the focal plane array detector. 4. The system of claim 3, wherein the controller is further configured to direct the optical phased array to defocus the infrared beam to broaden the field of view of the first optical transmitter, and focus the infrared beam to narrow the field of view in response to analysis of the generated images of a scene including the target. 5. The system of claim 3, wherein the controller is further configured to direct the optical phased array to defocus the infrared beam to broaden the field of view of the first optical transmitter, and focus the infrared beam to narrow the field of view in response to receiving external input from one or more external sources. 6. The system of claim 1, wherein the first optical transmitter includes a short wave infrared active illumination laser. 7. The system of claim 6, wherein the focal plane array detector is configured to sense light in a wavelength range of 1.0 μm to 2.0 μm. 8. The system of claim 7, further comprising a second optical transmitter configured to emit a second infrared beam along the optical path. 9. The system of claim 8, wherein the second optical transmitter includes a target designation laser. 10. The system of claim 8, wherein the second optical transmitter includes a range finding laser. 11. The system of claim 8, wherein the controller further comprises a user interface configured to receive a user focus command to defocus the infrared beam to broaden the field of view of the first optical transmitter, and to focus the infrared illumination beam to narrow the field of view of the first optical transmitter. 12. A method of operating an electro-optical sighting system comprising:
emitting an infrared beam from a first optical transmitter along an optical path through an optical phased array toward a target; focusing the infrared beam onto the target with the optical phased array to define a first field of view of the first optical transmitter; receiving reflected infrared radiation from reflection of the beam from the target at a focal plane array; and responsive to receiving reflected infrared radiation, re-focusing the infrared beam with the optical phased array onto the target to define a second field of view of the first optical transmitter. 13. The method of claim 12, further comprising receiving external input from one or more external sources. 14. The method of claim 13, further comprising re-focusing the infrared beam with the optical phased array onto the target to define a second field of view of the first optical transmitter responsive to receiving external input. 15. The method of claim 12, wherein the first optical transmitter includes an active illumination laser, and wherein re-focusing the infrared beam with the optical phased array onto the target further comprises broadening the first field of view to increase active illumination of the target by the infrared beam. 16. The method of claim 12, wherein the first optical transmitter includes a target designation laser, and wherein re-focusing the infrared beam with the optical phased array onto the target further comprises ascertaining an infrared beam target indicator size and maintaining the infrared beam target indicator size. 17. The method of claim 12, wherein the first optical transmitter includes a range finding laser, and wherein re-focusing the infrared beam with the optical phased array onto the target further comprises narrowing the first field of view to maximize emission distance of the infrared beam. 18. The method of claim 12, further comprising emitting a second infrared beam from a second optical transmitter along the optical path through the optical phased array toward the target. | 2,800 |
12,026 | 12,026 | 15,250,172 | 2,846 | MCU ( 2001 ) determines whether at least one of double three-phase inverter ( 2030 ) or battery ( 2002 ) has a failure, or battery ( 2002 ) is fully charged, and switches control to be performed in inverter ( 2030 ) between all-phase shut off and three-phase short circuit based on a motor rotation speed of double three-phase motor ( 2050 ) when MCU ( 2001 ) determines that any one of inverter ( 2030 ) and battery ( 2002 ) has a failure, or battery ( 2002 ) is fully charged. Battery ( 2002 ) and inverter ( 2030 ) can be protected when current is inhibited from flowing from motor ( 2050 ) to battery ( 2002 ) due to a failure of inverter ( 2030 ) or battery ( 2002 ). | 1. A motor drive device to be mounted on a vehicle including an engine and a motor directly coupled to each other,
the vehicle comprising a DC power supply device that is configured to supply electric power to the motor, and is charged by output of the motor, the motor drive device comprising:
an inverter configured to convert DC electric power supplied from the DC power supply device into AC electric power, and to convert AC electric power obtained from the motor to DC electric power; and
a control device configured to control the inverter,
the control device comprising:
a failure determination unit configured to determine whether at least one of the inverter or the DC power supply device has a failure, to thereby determine whether or not current is inhibited from flowing from the motor to the DC power supply device;
a DC power supply state determination unit configured to determine whether or not the DC power supply device is fully charged, to thereby determine whether or not current is inhibited from flowing from the motor to the DC power supply device; and
a switching unit configured to, when one of the failure determination unit and the DC power supply state determination unit determines that the current is inhibited from flowing from the motor to the DC power supply device, select a control to be performed in the inverter from all-phase shut off and three-phase short circuit based on one of a motor rotation speed of the motor, and an induced voltage of the motor and a DC link voltage of the motor. 2. The motor drive device according to claim 1, wherein the switching unit is configured to:
perform the all-phase shut off in the inverter when the motor rotation speed is equal to or less than a threshold 1; and perform the three-phase short circuit in the inverter when the motor rotation speed is more than the threshold 1. 3. The motor drive device according to claim 2, wherein the threshold 1 is switched depending on the DC link voltage of the motor. 4. The motor drive device according to claim 1, wherein the switching unit is configured to:
perform the all-phase shut off in the inverter when the induced voltage of the motor is equal to or less than the DC link voltage; and perform the three-phase short circuit in the inverter when the induced voltage of the motor is more than the DC link voltage. 5. The motor drive device according to claim 1,
wherein the induced voltage of the motor comprises an estimated induced voltage that is obtained based on at least one of the motor rotation speed of the motor or a motor temperature of the motor, and wherein the switching unit is configured to:
perform the all-phase shut off in the inverter when the estimated induced voltage of the motor is equal to or less than the DC link voltage; and
perform the three-phase short circuit in the inverter when the estimated induced voltage of the motor is more than the DC link voltage. 6. The motor drive device according to claim 1,
wherein the motor and the inverter configured to drive the motor each comprise a first group having a U phase, a V phase, and a W phase, and a second group having an X phase, a Y phase, and a Z phase, and wherein the control device further comprises a three-phase short-circuit processing unit configured to, when a reduction amount of three-phase short-circuit torque is equal to or more than a threshold 4 while the inverter is performing the three-phase short circuit, perform control so that one of the first group and the second group performs power running and another one of the first group and the second group performs regeneration, to thereby achieve an increase and a decrease of direct current of zero. 7. The motor drive device according to claim 2,
wherein the motor and the inverter configured to drive the motor each comprise a first group having a U phase, a V phase, and a W phase, and a second group having an X phase, a Y phase, and a Z phase, and wherein the control device further comprises a three-phase short-circuit processing unit configured to, when a reduction amount of three-phase short-circuit torque is equal to or more than a threshold 4 while the inverter is performing the three-phase short circuit, perform control so that one of the first group and the second group performs power running and another one of the first group and the second group performs regeneration, to thereby achieve an increase and a decrease of direct current of zero. 8. The motor drive device according to claim 3,
wherein the motor and the inverter configured to drive the motor each comprise a first group having a U phase, a V phase, and a W phase, and a second group having an X phase, a Y phase, and a Z phase, and wherein the control device further comprises a three-phase short-circuit processing unit configured to, when a reduction amount of three-phase short-circuit torque is equal to or more than a threshold 4 while the inverter is performing the three-phase short circuit, perform control so that one of the first group and the second group performs power running and another one of the first group and the second group performs regeneration, to thereby achieve an increase and a decrease of direct current of zero. 9. The motor drive device according to claim 4,
wherein the motor and the inverter configured to drive the motor each comprise a first group having a U phase, a V phase, and a W phase, and a second group having an X phase, a Y phase, and a Z phase, and wherein the control device further comprises a three-phase short-circuit processing unit configured to, when a reduction amount of three-phase short-circuit torque is equal to or more than a threshold 4 while the inverter is performing the three-phase short circuit, perform control so that one of the first group and the second group performs power running and another one of the first group and the second group performs regeneration, to thereby achieve an increase and a decrease of direct current of zero. 10. The motor drive device according to claim 5,
wherein the motor and the inverter configured to drive the motor each comprise a first group having a U phase, a V phase, and a W phase, and a second group having an X phase, a Y phase, and a Z phase, and wherein the control device further comprises a three-phase short-circuit processing unit configured to, when a reduction amount of three-phase short-circuit torque is equal to or more than a threshold 4 while the inverter is performing the three-phase short circuit, perform control so that one of the first group and the second group performs power running and another one of the first group and the second group performs regeneration, to thereby achieve an increase and a decrease of direct current of zero. | MCU ( 2001 ) determines whether at least one of double three-phase inverter ( 2030 ) or battery ( 2002 ) has a failure, or battery ( 2002 ) is fully charged, and switches control to be performed in inverter ( 2030 ) between all-phase shut off and three-phase short circuit based on a motor rotation speed of double three-phase motor ( 2050 ) when MCU ( 2001 ) determines that any one of inverter ( 2030 ) and battery ( 2002 ) has a failure, or battery ( 2002 ) is fully charged. Battery ( 2002 ) and inverter ( 2030 ) can be protected when current is inhibited from flowing from motor ( 2050 ) to battery ( 2002 ) due to a failure of inverter ( 2030 ) or battery ( 2002 ).1. A motor drive device to be mounted on a vehicle including an engine and a motor directly coupled to each other,
the vehicle comprising a DC power supply device that is configured to supply electric power to the motor, and is charged by output of the motor, the motor drive device comprising:
an inverter configured to convert DC electric power supplied from the DC power supply device into AC electric power, and to convert AC electric power obtained from the motor to DC electric power; and
a control device configured to control the inverter,
the control device comprising:
a failure determination unit configured to determine whether at least one of the inverter or the DC power supply device has a failure, to thereby determine whether or not current is inhibited from flowing from the motor to the DC power supply device;
a DC power supply state determination unit configured to determine whether or not the DC power supply device is fully charged, to thereby determine whether or not current is inhibited from flowing from the motor to the DC power supply device; and
a switching unit configured to, when one of the failure determination unit and the DC power supply state determination unit determines that the current is inhibited from flowing from the motor to the DC power supply device, select a control to be performed in the inverter from all-phase shut off and three-phase short circuit based on one of a motor rotation speed of the motor, and an induced voltage of the motor and a DC link voltage of the motor. 2. The motor drive device according to claim 1, wherein the switching unit is configured to:
perform the all-phase shut off in the inverter when the motor rotation speed is equal to or less than a threshold 1; and perform the three-phase short circuit in the inverter when the motor rotation speed is more than the threshold 1. 3. The motor drive device according to claim 2, wherein the threshold 1 is switched depending on the DC link voltage of the motor. 4. The motor drive device according to claim 1, wherein the switching unit is configured to:
perform the all-phase shut off in the inverter when the induced voltage of the motor is equal to or less than the DC link voltage; and perform the three-phase short circuit in the inverter when the induced voltage of the motor is more than the DC link voltage. 5. The motor drive device according to claim 1,
wherein the induced voltage of the motor comprises an estimated induced voltage that is obtained based on at least one of the motor rotation speed of the motor or a motor temperature of the motor, and wherein the switching unit is configured to:
perform the all-phase shut off in the inverter when the estimated induced voltage of the motor is equal to or less than the DC link voltage; and
perform the three-phase short circuit in the inverter when the estimated induced voltage of the motor is more than the DC link voltage. 6. The motor drive device according to claim 1,
wherein the motor and the inverter configured to drive the motor each comprise a first group having a U phase, a V phase, and a W phase, and a second group having an X phase, a Y phase, and a Z phase, and wherein the control device further comprises a three-phase short-circuit processing unit configured to, when a reduction amount of three-phase short-circuit torque is equal to or more than a threshold 4 while the inverter is performing the three-phase short circuit, perform control so that one of the first group and the second group performs power running and another one of the first group and the second group performs regeneration, to thereby achieve an increase and a decrease of direct current of zero. 7. The motor drive device according to claim 2,
wherein the motor and the inverter configured to drive the motor each comprise a first group having a U phase, a V phase, and a W phase, and a second group having an X phase, a Y phase, and a Z phase, and wherein the control device further comprises a three-phase short-circuit processing unit configured to, when a reduction amount of three-phase short-circuit torque is equal to or more than a threshold 4 while the inverter is performing the three-phase short circuit, perform control so that one of the first group and the second group performs power running and another one of the first group and the second group performs regeneration, to thereby achieve an increase and a decrease of direct current of zero. 8. The motor drive device according to claim 3,
wherein the motor and the inverter configured to drive the motor each comprise a first group having a U phase, a V phase, and a W phase, and a second group having an X phase, a Y phase, and a Z phase, and wherein the control device further comprises a three-phase short-circuit processing unit configured to, when a reduction amount of three-phase short-circuit torque is equal to or more than a threshold 4 while the inverter is performing the three-phase short circuit, perform control so that one of the first group and the second group performs power running and another one of the first group and the second group performs regeneration, to thereby achieve an increase and a decrease of direct current of zero. 9. The motor drive device according to claim 4,
wherein the motor and the inverter configured to drive the motor each comprise a first group having a U phase, a V phase, and a W phase, and a second group having an X phase, a Y phase, and a Z phase, and wherein the control device further comprises a three-phase short-circuit processing unit configured to, when a reduction amount of three-phase short-circuit torque is equal to or more than a threshold 4 while the inverter is performing the three-phase short circuit, perform control so that one of the first group and the second group performs power running and another one of the first group and the second group performs regeneration, to thereby achieve an increase and a decrease of direct current of zero. 10. The motor drive device according to claim 5,
wherein the motor and the inverter configured to drive the motor each comprise a first group having a U phase, a V phase, and a W phase, and a second group having an X phase, a Y phase, and a Z phase, and wherein the control device further comprises a three-phase short-circuit processing unit configured to, when a reduction amount of three-phase short-circuit torque is equal to or more than a threshold 4 while the inverter is performing the three-phase short circuit, perform control so that one of the first group and the second group performs power running and another one of the first group and the second group performs regeneration, to thereby achieve an increase and a decrease of direct current of zero. | 2,800 |
12,027 | 12,027 | 15,831,697 | 2,813 | Implementations of image sensor packages may include an image sensor chip, a first layer including an opening therethrough coupled to a first side of the image sensor chip, and a optically transmissive cover coupled to the first layer. The optically transmissive cover, the first layer, and the image sensor chip may form a cavity within the image sensor. The image sensor package may also include at least one electrical contact coupled to a second side of the image sensor chip opposing the first side and an encapsulant coating an entirety of the sidewalls of the image sensor package. | 1. An image sensor package comprising:
an image sensor chip; a first layer comprising an opening therethrough coupled to a first side of the image sensor chip; an optically transmissive cover coupled to the first layer, wherein the optically transmissive cover, the first layer, and the image sensor chip comprise a cavity within the image sensor package; at least one electrical contact coupled to a second side of the image sensor chip opposing the first side; and an encapsulant coating an entirety of the sidewalls of the image sensor package; wherein a perimeter of the optically transmissive cover is the same size as a perimeter of the first side of the image sensor chip. 2. The package of claim 1, further comprising a redistribution layer covering the second side of the image sensor chip. 3. The package of claim 1, wherein the encapsulant comprises a solder mask. 4. The package of claim 1, wherein the at least one electrical contact is a bump. 5. The package of claim 1, wherein the encapsulant crosses all of the interfaces on the sidewalls of the package. 6. The package of claim 1, wherein the encapsulant substantially covers five sides of the package. 7.-20. (canceled) 21. An image sensor package comprising:
an image sensor chip; a first layer comprising a plurality of dams coupled to a first side of the image sensor chip; an optically transmissive cover coupled to the plurality of dams, wherein the optically transmissive cover, the plurality of dams, and the image sensor chip comprise a cavity within the image sensor package; a redistribution layer covering the second side of the image sensor chip; at least one electrical contact coupled to a second side of the image sensor chip opposing the first side; and an encapsulant coating an entirety of the sidewalls of the image sensor package; wherein the encapsulant is a single encapsulant substantially covering five sides of the package. 22. The package of claim 21, wherein the encapsulant comprises a solder mask. 23. The package of claim 21, wherein the at least one electrical contact is a bump. 24. The package of claim 21, wherein the encapsulant crosses all of the interfaces on the sidewalls of the package. 25. (canceled) | Implementations of image sensor packages may include an image sensor chip, a first layer including an opening therethrough coupled to a first side of the image sensor chip, and a optically transmissive cover coupled to the first layer. The optically transmissive cover, the first layer, and the image sensor chip may form a cavity within the image sensor. The image sensor package may also include at least one electrical contact coupled to a second side of the image sensor chip opposing the first side and an encapsulant coating an entirety of the sidewalls of the image sensor package.1. An image sensor package comprising:
an image sensor chip; a first layer comprising an opening therethrough coupled to a first side of the image sensor chip; an optically transmissive cover coupled to the first layer, wherein the optically transmissive cover, the first layer, and the image sensor chip comprise a cavity within the image sensor package; at least one electrical contact coupled to a second side of the image sensor chip opposing the first side; and an encapsulant coating an entirety of the sidewalls of the image sensor package; wherein a perimeter of the optically transmissive cover is the same size as a perimeter of the first side of the image sensor chip. 2. The package of claim 1, further comprising a redistribution layer covering the second side of the image sensor chip. 3. The package of claim 1, wherein the encapsulant comprises a solder mask. 4. The package of claim 1, wherein the at least one electrical contact is a bump. 5. The package of claim 1, wherein the encapsulant crosses all of the interfaces on the sidewalls of the package. 6. The package of claim 1, wherein the encapsulant substantially covers five sides of the package. 7.-20. (canceled) 21. An image sensor package comprising:
an image sensor chip; a first layer comprising a plurality of dams coupled to a first side of the image sensor chip; an optically transmissive cover coupled to the plurality of dams, wherein the optically transmissive cover, the plurality of dams, and the image sensor chip comprise a cavity within the image sensor package; a redistribution layer covering the second side of the image sensor chip; at least one electrical contact coupled to a second side of the image sensor chip opposing the first side; and an encapsulant coating an entirety of the sidewalls of the image sensor package; wherein the encapsulant is a single encapsulant substantially covering five sides of the package. 22. The package of claim 21, wherein the encapsulant comprises a solder mask. 23. The package of claim 21, wherein the at least one electrical contact is a bump. 24. The package of claim 21, wherein the encapsulant crosses all of the interfaces on the sidewalls of the package. 25. (canceled) | 2,800 |
12,028 | 12,028 | 15,235,547 | 2,861 | The present invention concerns a downhole logging tool adapted to be arranged in-line in a sucker rod string. The tool is adapted for monitoring and performing at least one of: logging tension/compression, torque, temperature, pressure, and position (acceleration), for the purpose of optimizing (oil)well production and identifying downhole mechanical problems. The tool can be utilized in vertical, deviated and/or horizontal wells. Multiple monitoring tools can be installed in the sucker rod system in order to detect wear issues. | 1. A downhole monitoring device arranged in-line with a sucker rod string, the monitoring device comprising:
a housing arranged in-line with the sucker rod string; a plurality of sensors arranged within the housing and configured for sensing at least one of: sucker rod string conditions and sucker rod string surrounding conditions; a data acquisition, storage and control electronic circuitry arranged within the housing; a power supply arranged within the housing connected to the monitoring device with electrical power, where the plurality of sensors, the data acquisition, storage and control electronic circuitry and the power supply are interconnected. 2. A monitoring device according to claim 1, wherein the plurality of sensors comprises at least one of: an accelerometer, a strain gauge and a pressure and temperature sensor. 3. A monitoring device according to claim 1, wherein the housing comprises a top sub, a bottom sub and a main sub, wherein the top sub is connected to the bottom sub through the intermediate main sub. 4. A monitoring device according to claim 1, wherein the plurality of sensors comprises at least one sensor adapted for measuring at least one of: tension, compression and torque in the sucker rod string. 5. A monitoring device according to claim 1, wherein the electronic circuitry is encapsulated and comprises an accelerometer and electronics configured for data acquisition, processing and storage. 6. A monitoring device according to claim 1, wherein the plurality of sensors further comprises sensors for measuring pressure and temperature in a well. 7. A monitoring device according to claim 3, wherein the sensors for measuring pressure and temperature in the well are arranged in the bottom sub of the downhole monitoring device. 8. A monitoring device according to claim 6, wherein the sensors for measuring pressure and temperature in the well are arranged in the bottom sub of the downhole monitoring device. 9. A monitoring device according to claim 3, wherein said at least one sensor for measuring at least one of: tension, compression and torque in the sucker rod string are arranged in the bottom sub of the downhole monitoring device. 10. A monitoring device according to claim 3, wherein the plurality of sensors are arranged in the bottom sub. 11. A monitoring device according to claim 3, wherein the plurality of sensors are arranged in the top sub. 12. A monitoring device according to claim 3, wherein the power supply is arranged in the top sub. 13. A monitoring device according to claim 3, wherein the power supply is arranged in the bottom sub. 14. A monitoring device according to claim 1, wherein the power supply comprises a battery pack. 15. A system for monitoring at least one of: logging tension, compression, torque, temperature, pressure, position and acceleration, for the purpose of optimizing production of a well and identifying any downhole mechanical problems, wherein the system comprises: at least one monitoring device according to claim 1; a sucker rod string; and a sucker rod pump; said at least one monitoring device being arranged in-line with the sucker rod string. | The present invention concerns a downhole logging tool adapted to be arranged in-line in a sucker rod string. The tool is adapted for monitoring and performing at least one of: logging tension/compression, torque, temperature, pressure, and position (acceleration), for the purpose of optimizing (oil)well production and identifying downhole mechanical problems. The tool can be utilized in vertical, deviated and/or horizontal wells. Multiple monitoring tools can be installed in the sucker rod system in order to detect wear issues.1. A downhole monitoring device arranged in-line with a sucker rod string, the monitoring device comprising:
a housing arranged in-line with the sucker rod string; a plurality of sensors arranged within the housing and configured for sensing at least one of: sucker rod string conditions and sucker rod string surrounding conditions; a data acquisition, storage and control electronic circuitry arranged within the housing; a power supply arranged within the housing connected to the monitoring device with electrical power, where the plurality of sensors, the data acquisition, storage and control electronic circuitry and the power supply are interconnected. 2. A monitoring device according to claim 1, wherein the plurality of sensors comprises at least one of: an accelerometer, a strain gauge and a pressure and temperature sensor. 3. A monitoring device according to claim 1, wherein the housing comprises a top sub, a bottom sub and a main sub, wherein the top sub is connected to the bottom sub through the intermediate main sub. 4. A monitoring device according to claim 1, wherein the plurality of sensors comprises at least one sensor adapted for measuring at least one of: tension, compression and torque in the sucker rod string. 5. A monitoring device according to claim 1, wherein the electronic circuitry is encapsulated and comprises an accelerometer and electronics configured for data acquisition, processing and storage. 6. A monitoring device according to claim 1, wherein the plurality of sensors further comprises sensors for measuring pressure and temperature in a well. 7. A monitoring device according to claim 3, wherein the sensors for measuring pressure and temperature in the well are arranged in the bottom sub of the downhole monitoring device. 8. A monitoring device according to claim 6, wherein the sensors for measuring pressure and temperature in the well are arranged in the bottom sub of the downhole monitoring device. 9. A monitoring device according to claim 3, wherein said at least one sensor for measuring at least one of: tension, compression and torque in the sucker rod string are arranged in the bottom sub of the downhole monitoring device. 10. A monitoring device according to claim 3, wherein the plurality of sensors are arranged in the bottom sub. 11. A monitoring device according to claim 3, wherein the plurality of sensors are arranged in the top sub. 12. A monitoring device according to claim 3, wherein the power supply is arranged in the top sub. 13. A monitoring device according to claim 3, wherein the power supply is arranged in the bottom sub. 14. A monitoring device according to claim 1, wherein the power supply comprises a battery pack. 15. A system for monitoring at least one of: logging tension, compression, torque, temperature, pressure, position and acceleration, for the purpose of optimizing production of a well and identifying any downhole mechanical problems, wherein the system comprises: at least one monitoring device according to claim 1; a sucker rod string; and a sucker rod pump; said at least one monitoring device being arranged in-line with the sucker rod string. | 2,800 |
12,029 | 12,029 | 15,037,244 | 2,824 | An automation system which includes a first and a second controller for controlling an appliance or an installation, first and second input and/or output (I/O) units for receiving an electronic signal from the installation appliance or the installation and/or for outputting an electronic signal to the appliance or the installation, a control program which includes a plurality of control program modules for controlling the appliance or the installation, and a superordinate controller that associates the control program modules with the first and/or second controllers such that the appliance or the installation is controlled or can be controlled in accordance with the control program when the control program modules are executed within the respective control units, where the automation system is additionally configured such that each of the two control units interchange electronic data for controlling the appliance or the installation both with the first and with the second I/O units. | 1.-13. (canceled) 14. An automation system comprising:
a first controller and a second controller for controlling a device or an installation; a first input and/or output (I/O) unit and a second I/O unit for at least one of (i) receiving an electronic signal from the device or the installation and (ii) outputting an electronic signal to the device or the installation, and a control program comprising multiple control program components, for controlling the device or the installation; and a superordinate controller configured to assign the control program components to at least one of the first and second controllers such that the device or the installation is controlled or is controllable in accordance with the control program when the control program components are executed within a respective controller of the first and second controllers; wherein the automation system is configured such that each of the first and second I/O units interchange electronic data for controlling the device or the installation with the first and second I/O units. 15. The automation system as claimed in claim 14, wherein the first and second I/O units each have an associated communication module for communication with at least one of the first and second controllers. 16. The automation system as claimed in claim 14, wherein the superordinate controller is configured to check the assignment of the control program components to the first and second control units in an event of a change in the automation system. 17. The automation system as claimed in claim 15, wherein the superordinate controller is configured to check the assignment of the control program components to the first and second control units in an event of a change in the automation system. 18. The automation system as claimed in claim 16, wherein the superordinate controller is configured to change the assignment of the control program components to the first and second controllers following the check in the event of a change in the automation system;
wherein the assignment is changed when the result of the check indicates control of the device or installation is one (i) impaired and (ii) becomes impossible with an existing assignment of the control program components as a result of the change in the automation system. 19. The automation system as claimed in claim 14, wherein the first and second input I/O units are each appended to at least one of the first and second controllers; and wherein the first and second I/O units are at least one of (i) visible to, (ii) activable and (iii) actuable by each of the first and second controllers. 20. The automation system as claimed in claim 19, wherein the first and second I/O units are each connected to a respective control unit, to which they are appended, via a backplane bus;
wherein the backplane bus is configured, and set up, such that each of the first and second I/O units is at least one of (i) addressable and (ii) activable from each of the first and second controllers. 21. The automation system as claimed in claim 20, wherein communication via the respective backplane buses is based on at least one of Transmission Control Protocol/Internet Protocol and (ii) an Internet protocol based on IPv4 or IPv6. 22. The automation system as claimed in claim 14, wherein the first and second I/O units and at least one of the first and second controllers each comprise modules or module combinations of a modular programmable logic controller. 23. A method for operating an automation system, comprising
assigning, by a superordinate controller, control program components to at least one of first and second controllers; executing the control program components within at least one of the first and second controllers such that a device to be controlled by the automation system or the installation to be controlled is controlled based on a control program. 24. The method as claimed in claim 23, wherein the superordinate controller checks the assignment of the control program modules to the first and second control units in the event of a change in the automation system. 25. The method as claimed in claim 24, wherein the assignment of the control program modules to the first and second control units is changed by the superordinate control unit if the result of the check is a nonfunctionality or an impaired functionality of the control of the device or the installation based on the control program as a result of the change in the automation system. 26. A superordinate controller for an automation system,
wherein the superordinate controller is configured to: assign control program components to at least one of first and second controllers such that a device or an installation is controlled or is controllable in accordance with a control program when the control program components are executed within a respective controller of the first and second controllers; and wherein the automation system is configured such that each of a first input and/or output (I/O) unit and a second I/O unit interchange electronic data for controlling the device or the installation with the first and second I/O units. 27. The superordinate control unit as claimed in claim 25, wherein the superordinate controller is further configured to:
execute the control program components within at least one of the first and second controllers such that a device to be controlled by the automation system or the installation to be controlled is controlled based on a control program. | An automation system which includes a first and a second controller for controlling an appliance or an installation, first and second input and/or output (I/O) units for receiving an electronic signal from the installation appliance or the installation and/or for outputting an electronic signal to the appliance or the installation, a control program which includes a plurality of control program modules for controlling the appliance or the installation, and a superordinate controller that associates the control program modules with the first and/or second controllers such that the appliance or the installation is controlled or can be controlled in accordance with the control program when the control program modules are executed within the respective control units, where the automation system is additionally configured such that each of the two control units interchange electronic data for controlling the appliance or the installation both with the first and with the second I/O units.1.-13. (canceled) 14. An automation system comprising:
a first controller and a second controller for controlling a device or an installation; a first input and/or output (I/O) unit and a second I/O unit for at least one of (i) receiving an electronic signal from the device or the installation and (ii) outputting an electronic signal to the device or the installation, and a control program comprising multiple control program components, for controlling the device or the installation; and a superordinate controller configured to assign the control program components to at least one of the first and second controllers such that the device or the installation is controlled or is controllable in accordance with the control program when the control program components are executed within a respective controller of the first and second controllers; wherein the automation system is configured such that each of the first and second I/O units interchange electronic data for controlling the device or the installation with the first and second I/O units. 15. The automation system as claimed in claim 14, wherein the first and second I/O units each have an associated communication module for communication with at least one of the first and second controllers. 16. The automation system as claimed in claim 14, wherein the superordinate controller is configured to check the assignment of the control program components to the first and second control units in an event of a change in the automation system. 17. The automation system as claimed in claim 15, wherein the superordinate controller is configured to check the assignment of the control program components to the first and second control units in an event of a change in the automation system. 18. The automation system as claimed in claim 16, wherein the superordinate controller is configured to change the assignment of the control program components to the first and second controllers following the check in the event of a change in the automation system;
wherein the assignment is changed when the result of the check indicates control of the device or installation is one (i) impaired and (ii) becomes impossible with an existing assignment of the control program components as a result of the change in the automation system. 19. The automation system as claimed in claim 14, wherein the first and second input I/O units are each appended to at least one of the first and second controllers; and wherein the first and second I/O units are at least one of (i) visible to, (ii) activable and (iii) actuable by each of the first and second controllers. 20. The automation system as claimed in claim 19, wherein the first and second I/O units are each connected to a respective control unit, to which they are appended, via a backplane bus;
wherein the backplane bus is configured, and set up, such that each of the first and second I/O units is at least one of (i) addressable and (ii) activable from each of the first and second controllers. 21. The automation system as claimed in claim 20, wherein communication via the respective backplane buses is based on at least one of Transmission Control Protocol/Internet Protocol and (ii) an Internet protocol based on IPv4 or IPv6. 22. The automation system as claimed in claim 14, wherein the first and second I/O units and at least one of the first and second controllers each comprise modules or module combinations of a modular programmable logic controller. 23. A method for operating an automation system, comprising
assigning, by a superordinate controller, control program components to at least one of first and second controllers; executing the control program components within at least one of the first and second controllers such that a device to be controlled by the automation system or the installation to be controlled is controlled based on a control program. 24. The method as claimed in claim 23, wherein the superordinate controller checks the assignment of the control program modules to the first and second control units in the event of a change in the automation system. 25. The method as claimed in claim 24, wherein the assignment of the control program modules to the first and second control units is changed by the superordinate control unit if the result of the check is a nonfunctionality or an impaired functionality of the control of the device or the installation based on the control program as a result of the change in the automation system. 26. A superordinate controller for an automation system,
wherein the superordinate controller is configured to: assign control program components to at least one of first and second controllers such that a device or an installation is controlled or is controllable in accordance with a control program when the control program components are executed within a respective controller of the first and second controllers; and wherein the automation system is configured such that each of a first input and/or output (I/O) unit and a second I/O unit interchange electronic data for controlling the device or the installation with the first and second I/O units. 27. The superordinate control unit as claimed in claim 25, wherein the superordinate controller is further configured to:
execute the control program components within at least one of the first and second controllers such that a device to be controlled by the automation system or the installation to be controlled is controlled based on a control program. | 2,800 |
12,030 | 12,030 | 14,212,991 | 2,815 | An IGBT device includes an IGBT stack, a collector contact, a gate contact, and an emitter contact. The IGBT stack includes an injector region, a drift region over the injector region, a spreading region over the drift region, and a pair of junction implants in the spreading region. The spreading region provides a first surface of the IGBT stack, which is opposite the drift region. The pair of junction implants is separated by a channel, and extends from the first surface of the IGBT stack along a lateral edge of the IGBT stack towards the drift region to a first depth, such that the thickness of the spreading region is at least one and a half times greater than the first depth. | 1. An insulated gate bipolar transistor (IGBT) device comprising:
an IGBT stack, wherein the IGBT stack includes:
an injector region;
a drift region over the injector region;
a spreading region over the drift region, the spreading region providing a first surface of the IGBT stack opposite the drift region; and
a pair of junction implants in the spreading region, wherein:
the pair of junction implants are separated by a channel and extend from the first surface of the IGBT stack along a lateral edge of the IGBT stack towards the drift region to a first depth; and
the thickness of the spreading region is at least one and a half times greater than the first depth;
a gate contact and an emitter contact on the first surface of the IGBT stack; and a collector contact on a second surface of the IGBT stack, which is provided by the injector region opposite the drift region. 2. The IGBT device of claim 1 wherein the thickness of the spreading region is less than four times greater than the first depth. 3. The IGBT device of claim 1 wherein the thickness of the spreading region is at least two times greater than the first depth. 4. The IGBT device of claim 1 wherein the IGBT stack is a wide band-gap semiconductor material. 5. The IGBT device of claim 1 wherein the IGBT stack is Silicon Carbide (SiC). 6. The IGBT device of claim 1 wherein each one of the pair of junction implants comprises:
a base well;
a source well; and
an ohmic well, wherein the doping concentration of the base well, the source well, and the ohmic well are different from one another. 7. The IGBT device of claim 6 wherein:
the gate contact partially overlaps and runs between each source well in the pair of junction implants; and
the emitter contact partially overlaps both the source well and the ohmic well in each one of the pair of junction implants, respectively, without contacting the gate contact. 8. The IGBT device of claim 7 further comprising a gate oxide layer between the gate contact and the first surface of the IGBT stack. 9. The IGBT device of claim 1 wherein:
the drift region is a lightly doped N region;
the injector region is a highly doped P region; and
the spreading region is a highly doped N region. 10. The IGBT device of claim 1 wherein:
the drift region is a lightly doped P region;
the injector region is a highly doped N region; and
the spreading region is a highly doped P region. 11. The IGBT device of claim 1 wherein:
the first depth is in the range of about 0.3 μm to about 1.0 μm; and
the thickness of the spreading region is in the range of about 1.5 μm to about 10 μm. 12. The IGBT device of claim 1 wherein a width of the IGBT stack is between about 1 μm to 4 μm. 13. An insulated gate bipolar transistor (IGBT) device comprising:
an IGBT stack, wherein the IGBT stack includes:
an injector region;
a drift region over the injector region;
a spreading region over the drift region, the spreading region providing a first surface of the IGBT stack opposite the drift region; and
a pair of junction implants in the spreading region, wherein:
the pair of junction implants are separated by a junction field-effect transistor (JFET) region and extend from the first surface of the IGBT stack along a lateral edge of the IGBT stack towards the drift region to a first depth; and
the spreading region extends beyond the first depth by at least 1.5 μm;
a gate contact and an emitter contact on the first surface of the IGBT stack; and a collector contact on a second surface of the IGBT stack, which is provided by the injector region opposite the drift region. 14. The IGBT device of claim 13 wherein the spreading region extends beyond the first depth by less than about 10.0 μm. 15. The IGBT device of claim 13 wherein the spreading region extends beyond the first depth by at least 2.0 μm. 16. The IGBT device of claim 13 wherein the IGBT stack comprises a wide band-gap semiconductor material. 17. The IGBT device of claim 13 wherein the IGBT stack comprises Silicon Carbide (SiC). 18. The IGBT device of claim 13 wherein each one of the pair of junction implants comprises:
a base well;
a source well; and
an ohmic well, wherein the doping concentration of the base well, the source well, and the ohmic well are different from one another. 19. The IGBT device of claim 18 wherein:
the gate contact partially overlaps and runs between each source well in the pair of junction implants; and
the emitter contact partially overlaps both the source well and the ohmic well in each one of the pair of junction implants, respectively, without contacting the gate contact. 20. The IGBT device of claim 19 further comprising a gate oxide layer between the gate contact and the first surface of the IGBT stack. 21. The IGBT device of claim 13 wherein:
the drift region is a lightly doped N region;
the injector region is a highly doped P region; and
the spreading region is a highly doped N region. 22. The IGBT device of claim 13 wherein:
the drift region is a lightly doped P region;
the injector region is a highly doped N region; and
the spreading region is a highly doped P region. 23. The IGBT device of claim 13 wherein the first depth is in the range of about 0.3 μm to about 1.5 μm. 24. The IGBT device of claim 13 wherein a width of the IGBT stack is between about 1 μm to 4 μm. 25. A method comprising:
providing an IGBT stack including an injector region, a drift region over the injector region, and a spreading region over the drift region, such that the spreading region provides a first surface of the IGBT stack opposite the drift layer; providing a pair of junction implants in the first surface of the IGBT stack such that the pair of junction implants are separated by a channel and extend from a first surface of the IGBT stack towards the drift region to a first depth, wherein the thickness of the spreading region is at least one and a half times greater than the first depth; providing a gate contact and an emitter contact on the first surface of the IGBT stack; and providing a collector contact on a second surface of the IGBT stack, which is provided by the injector region opposite the drift region. 26. The method of claim 25 wherein the thickness of the spreading region is less than four times greater than the first depth. 27. The method of claim 25 wherein the thickness of the spreading region is at least two times greater than the first depth. 28. The method of claim 25 wherein the IGBT stack is Silicon Carbide (SiC). 29. An insulated gate bipolar transistor (IGBT) device comprising:
an IGBT stack, wherein the IGBT stack includes:
an injector region;
a drift region over the injector region;
a spreading region over the drift region; and
a pair of junction implants in the spreading region, each of the pair of junction implants separated by a channel;
wherein the spreading region enables the width of the IGBT stack to remain less than about 4 μm. | An IGBT device includes an IGBT stack, a collector contact, a gate contact, and an emitter contact. The IGBT stack includes an injector region, a drift region over the injector region, a spreading region over the drift region, and a pair of junction implants in the spreading region. The spreading region provides a first surface of the IGBT stack, which is opposite the drift region. The pair of junction implants is separated by a channel, and extends from the first surface of the IGBT stack along a lateral edge of the IGBT stack towards the drift region to a first depth, such that the thickness of the spreading region is at least one and a half times greater than the first depth.1. An insulated gate bipolar transistor (IGBT) device comprising:
an IGBT stack, wherein the IGBT stack includes:
an injector region;
a drift region over the injector region;
a spreading region over the drift region, the spreading region providing a first surface of the IGBT stack opposite the drift region; and
a pair of junction implants in the spreading region, wherein:
the pair of junction implants are separated by a channel and extend from the first surface of the IGBT stack along a lateral edge of the IGBT stack towards the drift region to a first depth; and
the thickness of the spreading region is at least one and a half times greater than the first depth;
a gate contact and an emitter contact on the first surface of the IGBT stack; and a collector contact on a second surface of the IGBT stack, which is provided by the injector region opposite the drift region. 2. The IGBT device of claim 1 wherein the thickness of the spreading region is less than four times greater than the first depth. 3. The IGBT device of claim 1 wherein the thickness of the spreading region is at least two times greater than the first depth. 4. The IGBT device of claim 1 wherein the IGBT stack is a wide band-gap semiconductor material. 5. The IGBT device of claim 1 wherein the IGBT stack is Silicon Carbide (SiC). 6. The IGBT device of claim 1 wherein each one of the pair of junction implants comprises:
a base well;
a source well; and
an ohmic well, wherein the doping concentration of the base well, the source well, and the ohmic well are different from one another. 7. The IGBT device of claim 6 wherein:
the gate contact partially overlaps and runs between each source well in the pair of junction implants; and
the emitter contact partially overlaps both the source well and the ohmic well in each one of the pair of junction implants, respectively, without contacting the gate contact. 8. The IGBT device of claim 7 further comprising a gate oxide layer between the gate contact and the first surface of the IGBT stack. 9. The IGBT device of claim 1 wherein:
the drift region is a lightly doped N region;
the injector region is a highly doped P region; and
the spreading region is a highly doped N region. 10. The IGBT device of claim 1 wherein:
the drift region is a lightly doped P region;
the injector region is a highly doped N region; and
the spreading region is a highly doped P region. 11. The IGBT device of claim 1 wherein:
the first depth is in the range of about 0.3 μm to about 1.0 μm; and
the thickness of the spreading region is in the range of about 1.5 μm to about 10 μm. 12. The IGBT device of claim 1 wherein a width of the IGBT stack is between about 1 μm to 4 μm. 13. An insulated gate bipolar transistor (IGBT) device comprising:
an IGBT stack, wherein the IGBT stack includes:
an injector region;
a drift region over the injector region;
a spreading region over the drift region, the spreading region providing a first surface of the IGBT stack opposite the drift region; and
a pair of junction implants in the spreading region, wherein:
the pair of junction implants are separated by a junction field-effect transistor (JFET) region and extend from the first surface of the IGBT stack along a lateral edge of the IGBT stack towards the drift region to a first depth; and
the spreading region extends beyond the first depth by at least 1.5 μm;
a gate contact and an emitter contact on the first surface of the IGBT stack; and a collector contact on a second surface of the IGBT stack, which is provided by the injector region opposite the drift region. 14. The IGBT device of claim 13 wherein the spreading region extends beyond the first depth by less than about 10.0 μm. 15. The IGBT device of claim 13 wherein the spreading region extends beyond the first depth by at least 2.0 μm. 16. The IGBT device of claim 13 wherein the IGBT stack comprises a wide band-gap semiconductor material. 17. The IGBT device of claim 13 wherein the IGBT stack comprises Silicon Carbide (SiC). 18. The IGBT device of claim 13 wherein each one of the pair of junction implants comprises:
a base well;
a source well; and
an ohmic well, wherein the doping concentration of the base well, the source well, and the ohmic well are different from one another. 19. The IGBT device of claim 18 wherein:
the gate contact partially overlaps and runs between each source well in the pair of junction implants; and
the emitter contact partially overlaps both the source well and the ohmic well in each one of the pair of junction implants, respectively, without contacting the gate contact. 20. The IGBT device of claim 19 further comprising a gate oxide layer between the gate contact and the first surface of the IGBT stack. 21. The IGBT device of claim 13 wherein:
the drift region is a lightly doped N region;
the injector region is a highly doped P region; and
the spreading region is a highly doped N region. 22. The IGBT device of claim 13 wherein:
the drift region is a lightly doped P region;
the injector region is a highly doped N region; and
the spreading region is a highly doped P region. 23. The IGBT device of claim 13 wherein the first depth is in the range of about 0.3 μm to about 1.5 μm. 24. The IGBT device of claim 13 wherein a width of the IGBT stack is between about 1 μm to 4 μm. 25. A method comprising:
providing an IGBT stack including an injector region, a drift region over the injector region, and a spreading region over the drift region, such that the spreading region provides a first surface of the IGBT stack opposite the drift layer; providing a pair of junction implants in the first surface of the IGBT stack such that the pair of junction implants are separated by a channel and extend from a first surface of the IGBT stack towards the drift region to a first depth, wherein the thickness of the spreading region is at least one and a half times greater than the first depth; providing a gate contact and an emitter contact on the first surface of the IGBT stack; and providing a collector contact on a second surface of the IGBT stack, which is provided by the injector region opposite the drift region. 26. The method of claim 25 wherein the thickness of the spreading region is less than four times greater than the first depth. 27. The method of claim 25 wherein the thickness of the spreading region is at least two times greater than the first depth. 28. The method of claim 25 wherein the IGBT stack is Silicon Carbide (SiC). 29. An insulated gate bipolar transistor (IGBT) device comprising:
an IGBT stack, wherein the IGBT stack includes:
an injector region;
a drift region over the injector region;
a spreading region over the drift region; and
a pair of junction implants in the spreading region, each of the pair of junction implants separated by a channel;
wherein the spreading region enables the width of the IGBT stack to remain less than about 4 μm. | 2,800 |
12,031 | 12,031 | 15,782,659 | 2,828 | A system and method for scanning the wavelength of an external cavity laser uses synchronized angular motions of two mirrors. By adjusting the angular motions in a selected ratio, it is possible to change the lasing wavelength of the cavity without mode-hops. The mode-hop free ratio of angular motions is determined by simultaneously satisfying the conditions of wavelength selected by diffraction angle from a diffraction grating, and the length of the external cavity. | 1. An apparatus, comprising:
a first reflector rotatable about a first axis and situated to receive an intracavity laser beam of an external cavity laser from a diffraction grating and to direct the intracavity laser beam along a first direction; and a second reflector rotatable about a second axis and situated to retro-reflect the intracavity laser beam received from the first reflector back to the first reflector and to the diffraction grating. 2. The apparatus of claim 1, wherein the first reflector and second reflector are situated to rotate separately so as to vary an angle of the intracavity laser beam received from the diffraction grating that corresponds to a variation of a lasing wavelength of the external cavity laser over a predetermined range and so as to vary a cavity length of the external cavity laser. 3. The apparatus of claim 2, wherein a variation of the angle and a variation of the cavity length based on rotations of the first reflector and the second reflector correspond to the variation in the lasing wavelength of the external cavity laser without mode hopping over the predetermined range. 4. The apparatus of claim 2, wherein the predetermined range is larger than a longitudinal mode spacing of the external cavity laser. 5. The apparatus of claim 3, wherein the predetermined range corresponds to at least 0.04% of a center wavenumber of the intracavity laser beam. 6. The apparatus of claim 2, wherein a variation of the cavity length and a variation of the lasing wavelength based on rotations of the first reflector and the second reflector correspond to a product of external cavity length and center wavenumber that is constant or within ±0.01, ±0.1, ±0.25, or ±0.5 of a selected value over the predetermined range. 7. The apparatus of claim 2, wherein the first reflector and second reflector are situated to rotate according to a predetermined ratio associated with a mode hop reduction. 8. The apparatus of claim 7, wherein the predetermined ratio is variable with respect to an angle position of the first reflector or the second reflector. 9. The apparatus of claim 1, further comprising the diffraction grating situated to receive the intracavity laser beam from a laser source of the external cavity laser and to direct the intracavity laser beam to the first reflector and to direct an output beam in an output beam direction. 10. The apparatus of claim 1, further comprising a laser source situated to produce the intracavity laser beam and to direct the intracavity laser beam to the diffraction grating. 11. The apparatus of claim 10, further comprising one or more collimation optics situated to receive the intracavity laser beam from the laser source and to direct the intracavity laser beam to the diffraction grating as a collimated beam. 12. The apparatus of claim 1, further comprising a controller coupled to the first reflector and second reflector and situated to control a rotation of the first reflector about the first axis and a rotation of the second reflector about the second axis. 13. The apparatus of claim 12, further comprising a detector optically coupled to the intracavity laser beam or an output beam of the external cavity laser formed by the diffraction grating so as to detect an optical characteristic, wherein the controller is situated to control the rotation of the first reflector and second reflector based on the detected optical characteristic. 14. The apparatus of claim 1, wherein the first axis and second axis are parallel. 15. The apparatus of claim 10, wherein the laser source is a quantum cascade laser, interband cascade laser, or diode laser. 16. The apparatus of claim 10, wherein the laser source and the diffraction grating are situated in a fixed relationship relative to the first axis and the second axis. 17. The apparatus of claim 1, wherein the first reflector and the second reflector are galvanometer scan mirrors. 18. A system, comprising:
a plurality of reflectors of an external cavity laser, each situated to rotate about respective axes in relation to a diffraction grating and laser source situated in a fixed relation to each other; at least one processor; and one or more computer-readable storage media including stored instructions that, responsive to execution by the at least one processor, cause the system to rotate the plurality of reflectors so as to vary an external cavity length and an external cavity output beam wavelength. 19. A method, comprising:
directing an intracavity laser beam produced by a laser source to a diffraction grating; directing a first portion of the intracavity laser beam received by the diffraction grating along an output direction so as to form an output beam of an external cavity laser; and directing a second portion of the intracavity laser beam received by the diffraction grating to a first reflector rotatable about a first axis and to a second reflector rotatable about a second axis so as to retro-direct the second portion back to the first reflector, diffraction grating, and laser source; and wherein the first reflector and second reflector are situated to independently rotate about respective axes so as to vary a wavelength of the output beam. 20. The method of claim 19, wherein the first reflector and second reflector are situated to rotate about the respective axes so as to vary the wavelength of the output beam and a length of the external cavity. 21. The method of claim 20, wherein variations of the wavelength of the output beam and the length of the external cavity based on rotations about the respective axes corresponds to a mode-hop free variation of the wavelength across a predetermined wavelength range. 22. A method, comprising:
selecting an external cavity output beam wavelength of an external cavity laser that includes a diffraction grating and a laser source situated in a fixed relation to each other; and rotating an intracavity first reflector and an intracavity second reflector so as to vary a wavelength of the output beam and a length of the external cavity of the external cavity laser. 23. The method of claim 22, wherein variations of the wavelength and the length based on the rotations corresponds to a mode-hop free variation of the wavelength over a predetermined range. | A system and method for scanning the wavelength of an external cavity laser uses synchronized angular motions of two mirrors. By adjusting the angular motions in a selected ratio, it is possible to change the lasing wavelength of the cavity without mode-hops. The mode-hop free ratio of angular motions is determined by simultaneously satisfying the conditions of wavelength selected by diffraction angle from a diffraction grating, and the length of the external cavity.1. An apparatus, comprising:
a first reflector rotatable about a first axis and situated to receive an intracavity laser beam of an external cavity laser from a diffraction grating and to direct the intracavity laser beam along a first direction; and a second reflector rotatable about a second axis and situated to retro-reflect the intracavity laser beam received from the first reflector back to the first reflector and to the diffraction grating. 2. The apparatus of claim 1, wherein the first reflector and second reflector are situated to rotate separately so as to vary an angle of the intracavity laser beam received from the diffraction grating that corresponds to a variation of a lasing wavelength of the external cavity laser over a predetermined range and so as to vary a cavity length of the external cavity laser. 3. The apparatus of claim 2, wherein a variation of the angle and a variation of the cavity length based on rotations of the first reflector and the second reflector correspond to the variation in the lasing wavelength of the external cavity laser without mode hopping over the predetermined range. 4. The apparatus of claim 2, wherein the predetermined range is larger than a longitudinal mode spacing of the external cavity laser. 5. The apparatus of claim 3, wherein the predetermined range corresponds to at least 0.04% of a center wavenumber of the intracavity laser beam. 6. The apparatus of claim 2, wherein a variation of the cavity length and a variation of the lasing wavelength based on rotations of the first reflector and the second reflector correspond to a product of external cavity length and center wavenumber that is constant or within ±0.01, ±0.1, ±0.25, or ±0.5 of a selected value over the predetermined range. 7. The apparatus of claim 2, wherein the first reflector and second reflector are situated to rotate according to a predetermined ratio associated with a mode hop reduction. 8. The apparatus of claim 7, wherein the predetermined ratio is variable with respect to an angle position of the first reflector or the second reflector. 9. The apparatus of claim 1, further comprising the diffraction grating situated to receive the intracavity laser beam from a laser source of the external cavity laser and to direct the intracavity laser beam to the first reflector and to direct an output beam in an output beam direction. 10. The apparatus of claim 1, further comprising a laser source situated to produce the intracavity laser beam and to direct the intracavity laser beam to the diffraction grating. 11. The apparatus of claim 10, further comprising one or more collimation optics situated to receive the intracavity laser beam from the laser source and to direct the intracavity laser beam to the diffraction grating as a collimated beam. 12. The apparatus of claim 1, further comprising a controller coupled to the first reflector and second reflector and situated to control a rotation of the first reflector about the first axis and a rotation of the second reflector about the second axis. 13. The apparatus of claim 12, further comprising a detector optically coupled to the intracavity laser beam or an output beam of the external cavity laser formed by the diffraction grating so as to detect an optical characteristic, wherein the controller is situated to control the rotation of the first reflector and second reflector based on the detected optical characteristic. 14. The apparatus of claim 1, wherein the first axis and second axis are parallel. 15. The apparatus of claim 10, wherein the laser source is a quantum cascade laser, interband cascade laser, or diode laser. 16. The apparatus of claim 10, wherein the laser source and the diffraction grating are situated in a fixed relationship relative to the first axis and the second axis. 17. The apparatus of claim 1, wherein the first reflector and the second reflector are galvanometer scan mirrors. 18. A system, comprising:
a plurality of reflectors of an external cavity laser, each situated to rotate about respective axes in relation to a diffraction grating and laser source situated in a fixed relation to each other; at least one processor; and one or more computer-readable storage media including stored instructions that, responsive to execution by the at least one processor, cause the system to rotate the plurality of reflectors so as to vary an external cavity length and an external cavity output beam wavelength. 19. A method, comprising:
directing an intracavity laser beam produced by a laser source to a diffraction grating; directing a first portion of the intracavity laser beam received by the diffraction grating along an output direction so as to form an output beam of an external cavity laser; and directing a second portion of the intracavity laser beam received by the diffraction grating to a first reflector rotatable about a first axis and to a second reflector rotatable about a second axis so as to retro-direct the second portion back to the first reflector, diffraction grating, and laser source; and wherein the first reflector and second reflector are situated to independently rotate about respective axes so as to vary a wavelength of the output beam. 20. The method of claim 19, wherein the first reflector and second reflector are situated to rotate about the respective axes so as to vary the wavelength of the output beam and a length of the external cavity. 21. The method of claim 20, wherein variations of the wavelength of the output beam and the length of the external cavity based on rotations about the respective axes corresponds to a mode-hop free variation of the wavelength across a predetermined wavelength range. 22. A method, comprising:
selecting an external cavity output beam wavelength of an external cavity laser that includes a diffraction grating and a laser source situated in a fixed relation to each other; and rotating an intracavity first reflector and an intracavity second reflector so as to vary a wavelength of the output beam and a length of the external cavity of the external cavity laser. 23. The method of claim 22, wherein variations of the wavelength and the length based on the rotations corresponds to a mode-hop free variation of the wavelength over a predetermined range. | 2,800 |
12,032 | 12,032 | 14,503,366 | 2,859 | Methods and apparatuses for communicating across an inductive charging interface. Methods and apparatuses for improved efficiency of power transfer across an inductive charging interface. | 1.-49. (canceled) 50. An adaptive power control system for an electromagnetic induction power transfer apparatus comprising:
a signal receiver; a power supply with an active state and an inactive state, configured to switch between the active state and the inactive state at a selectable duty cycle; a power-transmitting inductor coupled to the power supply; wherein:
the duty cycle of the power supply is modified in response to a signal received from the signal receiver. 51. The adaptive power control system of claim 50, wherein the power supply is set to the inactive state in the absence of a signal received from the signal receiver. 52. The adaptive power control system of claim 50, wherein the signal is received when the power supply is in the inactive state. 53. The adaptive power control system of claim 50, wherein the signal received from the signal receiver is a signal sent from a portable electronic device having a power-receiving inductor and positioned inductively proximate the power-transmitting inductor. 54. The adaptive power control system of claim 53, wherein the signal comprises an instruction to increase the selectable duty cycle of the power supply. 55. The adaptive power control system of claim 53, wherein the signal comprises an instruction to decrease the selectable duty cycle of the power supply. 56. The adaptive power control system of claim 50, wherein the signal is received when the power supply in either the active state or the inactive state. 57. The adaptive power control system of claim 50, wherein the signal receiver is coupled to the power-transmitting inductor and configured to sense changes in inductive load to the power-transmitting inductor. 58. The adaptive power control system of claim 50, wherein the signal receiver is coupled to the power-transmitting inductor and configured to sense changes in voltage across the power-transmitting inductor. 59. An adaptive power system comprising:
a power transmitter comprising:
a signal receiver configured to receive an instruction;
a power supply with an active state and an inactive state, configured to switch between the active state and the inactive state at a selectable duty cycle; and
a power-transmitting inductor coupled to the power supply; and
a power receiver comprising:
a battery;
a power-receiving inductor having at least an active state and an inactive state; and
a signal transmitter coupled to the power-receiving inductor configured to send an instruction. 60. The adaptive power system of claim 59, wherein the power supply is set to the inactive state in the absence of an instruction received by the signal receiver. 61. The adaptive power system of claim 60, wherein the signal transmitter is configured to send an instruction to the signal receiver. 62. The adaptive power system of claim 61, wherein the instruction is sent during the inactive state of the power supply. 63. The adaptive power system of claim 61, wherein sending the instruction comprises coupling the power-receiving coil to a power source output, the power source output modulated to follow a selected waveform. 64. The adaptive power system of claim 63, wherein the selected waveform comprises a high frequency pulse, wherein the frequency of the pulse is selected such that at least one period of the pulse may be sent during the inactive state of the power supply. 65. The adaptive power system of claim 62, wherein the instruction comprises an indication to increase the duty cycle of the power supply. 66. The adaptive power system of claim 62, wherein the instruction comprises an indication to decrease the duty cycle of the power supply. 67. The adaptive power system of claim 62, wherein the instruction comprises an indication to increase a voltage output during the active state of the power supply. 68. The adaptive power system of claim 62, wherein the instruction comprises an indication to decrease a voltage output during the active state of the power supply. 69. An adaptive power system comprising:
a power transmitter comprising:
a power supply with an active state and an inactive state, configured to switch between the active state and the inactive state;
a first communication controller configured to request permission to enable the active state; and
a power-transmitting inductor coupled to the power supply; and
a power receiver comprising:
a battery;
a power-receiving inductor having at least an active state and an inactive state; and
a second communication controller coupled to the power-receiving inductor configured to receive the request;
wherein the second communication controller configured to send an indication to the first communication controller to enable the active state upon receipt of the request. | Methods and apparatuses for communicating across an inductive charging interface. Methods and apparatuses for improved efficiency of power transfer across an inductive charging interface.1.-49. (canceled) 50. An adaptive power control system for an electromagnetic induction power transfer apparatus comprising:
a signal receiver; a power supply with an active state and an inactive state, configured to switch between the active state and the inactive state at a selectable duty cycle; a power-transmitting inductor coupled to the power supply; wherein:
the duty cycle of the power supply is modified in response to a signal received from the signal receiver. 51. The adaptive power control system of claim 50, wherein the power supply is set to the inactive state in the absence of a signal received from the signal receiver. 52. The adaptive power control system of claim 50, wherein the signal is received when the power supply is in the inactive state. 53. The adaptive power control system of claim 50, wherein the signal received from the signal receiver is a signal sent from a portable electronic device having a power-receiving inductor and positioned inductively proximate the power-transmitting inductor. 54. The adaptive power control system of claim 53, wherein the signal comprises an instruction to increase the selectable duty cycle of the power supply. 55. The adaptive power control system of claim 53, wherein the signal comprises an instruction to decrease the selectable duty cycle of the power supply. 56. The adaptive power control system of claim 50, wherein the signal is received when the power supply in either the active state or the inactive state. 57. The adaptive power control system of claim 50, wherein the signal receiver is coupled to the power-transmitting inductor and configured to sense changes in inductive load to the power-transmitting inductor. 58. The adaptive power control system of claim 50, wherein the signal receiver is coupled to the power-transmitting inductor and configured to sense changes in voltage across the power-transmitting inductor. 59. An adaptive power system comprising:
a power transmitter comprising:
a signal receiver configured to receive an instruction;
a power supply with an active state and an inactive state, configured to switch between the active state and the inactive state at a selectable duty cycle; and
a power-transmitting inductor coupled to the power supply; and
a power receiver comprising:
a battery;
a power-receiving inductor having at least an active state and an inactive state; and
a signal transmitter coupled to the power-receiving inductor configured to send an instruction. 60. The adaptive power system of claim 59, wherein the power supply is set to the inactive state in the absence of an instruction received by the signal receiver. 61. The adaptive power system of claim 60, wherein the signal transmitter is configured to send an instruction to the signal receiver. 62. The adaptive power system of claim 61, wherein the instruction is sent during the inactive state of the power supply. 63. The adaptive power system of claim 61, wherein sending the instruction comprises coupling the power-receiving coil to a power source output, the power source output modulated to follow a selected waveform. 64. The adaptive power system of claim 63, wherein the selected waveform comprises a high frequency pulse, wherein the frequency of the pulse is selected such that at least one period of the pulse may be sent during the inactive state of the power supply. 65. The adaptive power system of claim 62, wherein the instruction comprises an indication to increase the duty cycle of the power supply. 66. The adaptive power system of claim 62, wherein the instruction comprises an indication to decrease the duty cycle of the power supply. 67. The adaptive power system of claim 62, wherein the instruction comprises an indication to increase a voltage output during the active state of the power supply. 68. The adaptive power system of claim 62, wherein the instruction comprises an indication to decrease a voltage output during the active state of the power supply. 69. An adaptive power system comprising:
a power transmitter comprising:
a power supply with an active state and an inactive state, configured to switch between the active state and the inactive state;
a first communication controller configured to request permission to enable the active state; and
a power-transmitting inductor coupled to the power supply; and
a power receiver comprising:
a battery;
a power-receiving inductor having at least an active state and an inactive state; and
a second communication controller coupled to the power-receiving inductor configured to receive the request;
wherein the second communication controller configured to send an indication to the first communication controller to enable the active state upon receipt of the request. | 2,800 |
12,033 | 12,033 | 15,164,665 | 2,824 | An apparatus is provided which comprises: a select line; a select transistor coupled to a resistive memory element and to the select line; a word-line coupled to a gate terminal of the select transistor; and a current mirror operable to be coupled to the select line during a first mode and to be de-coupled during a second mode. | 1. An apparatus comprising:
a select line; a select transistor coupled to a resistive memory element and to the select line; a word-line coupled to a gate terminal of the select transistor; a bit-line coupled to the resistive memory element; a first write driver to couple to the bit-line, wherein the first write driver comprises first and second transistors coupled in series and controllable by a first write enable and a second write enable, respectively; and a second write driver, separate from the first write driver, to couple to the select line, wherein the second write driver comprises a current mirror to be coupled to the select line during a first mode and to be de-coupled during a second mode. 2. The apparatus of claim 1 comprises a first access device coupled to the select line and the current mirror, wherein the first access device is controllable by a column select signal. 3. The apparatus of claim 2 comprises:
a second access device coupled to the bit-line, wherein the second access device is controllable by the column select signal. 4. The apparatus of claim 2 comprises a first transistor coupled to the first access device and a supply node, wherein the first transistor is controllable by a write low enable signal. 5. The apparatus of claim 4 comprises a second transistor coupled to the first access device and the first transistor, wherein the second transistor is controllable by a write high enable signal. 6. The apparatus of claim 3 comprises a third transistor coupled to the second access device and a supply node, wherein the third transistor is controllable by a write low enable signal. 7. The apparatus of claim 6 comprises a fourth transistor coupled to the second access device and the third transistor, wherein the fourth transistor is controllable by a write low enable signal. 8. The apparatus of claim 2 comprises a column decoder to generate the column select signal. 9. The apparatus of claim 1, wherein the first mode is a set mode while the second mode is a reset mode. 10. The apparatus of claim 1 comprises a sense amplifier coupled to the bit-line and the source-line. 11. The apparatus of claim 1, wherein the resistive memory element comprises at least one of:
a magnetic tunneling junction (MTJ) device; a phase change memory (PCM) cell; or a resistive random access memory (ReRAM) cell. 12. An apparatus comprising:
a select line; a select transistor coupled to a resistive memory element and to the select line; a word-line coupled to a gate terminal of the select transistor; a bit-line coupled to the resistive memory element; a first write driver to couple to the bit-line, wherein the first write driver comprises first and second transistors coupled in series and controllable by a first write enable and a second write enable, respectively; a second write driver, separate from the first write driver, to couple to the select line, wherein the second write driver comprises a current mirror; a first access device coupled to the select line and the current mirror, wherein the first access device is controllable by a column select signal; and a second access device coupled to the bit-line, wherein the second access device is controllable by the column select signal. 13. The apparatus of claim 12, wherein the current mirror is to be coupled to the select line during a first mode and to be de-coupled during a second mode. 14. The apparatus of claim 12 comprises a second transistor coupled to the first access device and the first transistor, wherein the second transistor is controllable by a write high enable signal. 15. The apparatus of claim 14 comprises a third transistor coupled to the second access device and a supply node, wherein the third transistor is controllable by a write low enable signal. 16. The apparatus of claim 15 comprises a fourth transistor coupled to the second access device and the third transistor, wherein the fourth transistor is controllable by a write low enable signal. 17. A system comprising:
a processor; a memory coupled to the processor, the memory including:
a select line;
a select transistor coupled to a resistive memory element and to the select line;
a word-line coupled to a gate terminal of the select transistor; and
a bit-line coupled to the resistive memory element;
a first write driver to couple to the bit-line, wherein the first write driver comprises first and second transistors coupled in series and controllable by a first write enable and a second write enable, respectively; and
a second write driver, separate from the first write driver, to couple to the select line, wherein the second write driver comprises a current mirror to be coupled to the select line during a first mode and to be de-coupled during a second mode; and
a wireless interface to communicatively coupling the processor to another device. 18. The system of claim 17, wherein the processor comprises one or more processor cores, and wherein the memory is an array of resistive memory bit-cells which is located in a different die than the one or more processor cores in a three dimensional (3D) integrated circuit. 19. The system of claim 17, wherein the first mode is a set mode while the second mode is a reset mode. 20. The system of claim 17, wherein the resistive memory element comprises at least one of:
magnetic tunneling junction (MTJ) device; a phase change memory (PCM) cell; or a resistive random access memory (ReRAM) cell. 21. An apparatus comprising:
a first driver comprising a push-pull circuitry; a second driver comprising a push-pull circuitry with a current mirror; and a resistive memory element coupled to source-line and bit-line, wherein the first driver is coupled to the bit-line via a first pass-gate, and wherein the second driver is coupled to the source-line via a second pass-gate. 22. The apparatus of claim 21, wherein the current mirror is an n-type current mirror which is connected to an n-type device of the push-pull circuitry of the second driver. 23. The apparatus of claim 21, wherein the current mirror is a p-type current mirror which is connected to a p-type device of the push-pull circuitry of the second driver. 24. The apparatus of claim 21, wherein the current mirror is shared by multiple drivers in a memory array. 25. The apparatus of claim 21, wherein the resistive memory element comprises at least one of: magnetic tunneling junction (MTJ) device; a phase change memory (PCM) cell; or a resistive random access memory (ReRAM) cell. | An apparatus is provided which comprises: a select line; a select transistor coupled to a resistive memory element and to the select line; a word-line coupled to a gate terminal of the select transistor; and a current mirror operable to be coupled to the select line during a first mode and to be de-coupled during a second mode.1. An apparatus comprising:
a select line; a select transistor coupled to a resistive memory element and to the select line; a word-line coupled to a gate terminal of the select transistor; a bit-line coupled to the resistive memory element; a first write driver to couple to the bit-line, wherein the first write driver comprises first and second transistors coupled in series and controllable by a first write enable and a second write enable, respectively; and a second write driver, separate from the first write driver, to couple to the select line, wherein the second write driver comprises a current mirror to be coupled to the select line during a first mode and to be de-coupled during a second mode. 2. The apparatus of claim 1 comprises a first access device coupled to the select line and the current mirror, wherein the first access device is controllable by a column select signal. 3. The apparatus of claim 2 comprises:
a second access device coupled to the bit-line, wherein the second access device is controllable by the column select signal. 4. The apparatus of claim 2 comprises a first transistor coupled to the first access device and a supply node, wherein the first transistor is controllable by a write low enable signal. 5. The apparatus of claim 4 comprises a second transistor coupled to the first access device and the first transistor, wherein the second transistor is controllable by a write high enable signal. 6. The apparatus of claim 3 comprises a third transistor coupled to the second access device and a supply node, wherein the third transistor is controllable by a write low enable signal. 7. The apparatus of claim 6 comprises a fourth transistor coupled to the second access device and the third transistor, wherein the fourth transistor is controllable by a write low enable signal. 8. The apparatus of claim 2 comprises a column decoder to generate the column select signal. 9. The apparatus of claim 1, wherein the first mode is a set mode while the second mode is a reset mode. 10. The apparatus of claim 1 comprises a sense amplifier coupled to the bit-line and the source-line. 11. The apparatus of claim 1, wherein the resistive memory element comprises at least one of:
a magnetic tunneling junction (MTJ) device; a phase change memory (PCM) cell; or a resistive random access memory (ReRAM) cell. 12. An apparatus comprising:
a select line; a select transistor coupled to a resistive memory element and to the select line; a word-line coupled to a gate terminal of the select transistor; a bit-line coupled to the resistive memory element; a first write driver to couple to the bit-line, wherein the first write driver comprises first and second transistors coupled in series and controllable by a first write enable and a second write enable, respectively; a second write driver, separate from the first write driver, to couple to the select line, wherein the second write driver comprises a current mirror; a first access device coupled to the select line and the current mirror, wherein the first access device is controllable by a column select signal; and a second access device coupled to the bit-line, wherein the second access device is controllable by the column select signal. 13. The apparatus of claim 12, wherein the current mirror is to be coupled to the select line during a first mode and to be de-coupled during a second mode. 14. The apparatus of claim 12 comprises a second transistor coupled to the first access device and the first transistor, wherein the second transistor is controllable by a write high enable signal. 15. The apparatus of claim 14 comprises a third transistor coupled to the second access device and a supply node, wherein the third transistor is controllable by a write low enable signal. 16. The apparatus of claim 15 comprises a fourth transistor coupled to the second access device and the third transistor, wherein the fourth transistor is controllable by a write low enable signal. 17. A system comprising:
a processor; a memory coupled to the processor, the memory including:
a select line;
a select transistor coupled to a resistive memory element and to the select line;
a word-line coupled to a gate terminal of the select transistor; and
a bit-line coupled to the resistive memory element;
a first write driver to couple to the bit-line, wherein the first write driver comprises first and second transistors coupled in series and controllable by a first write enable and a second write enable, respectively; and
a second write driver, separate from the first write driver, to couple to the select line, wherein the second write driver comprises a current mirror to be coupled to the select line during a first mode and to be de-coupled during a second mode; and
a wireless interface to communicatively coupling the processor to another device. 18. The system of claim 17, wherein the processor comprises one or more processor cores, and wherein the memory is an array of resistive memory bit-cells which is located in a different die than the one or more processor cores in a three dimensional (3D) integrated circuit. 19. The system of claim 17, wherein the first mode is a set mode while the second mode is a reset mode. 20. The system of claim 17, wherein the resistive memory element comprises at least one of:
magnetic tunneling junction (MTJ) device; a phase change memory (PCM) cell; or a resistive random access memory (ReRAM) cell. 21. An apparatus comprising:
a first driver comprising a push-pull circuitry; a second driver comprising a push-pull circuitry with a current mirror; and a resistive memory element coupled to source-line and bit-line, wherein the first driver is coupled to the bit-line via a first pass-gate, and wherein the second driver is coupled to the source-line via a second pass-gate. 22. The apparatus of claim 21, wherein the current mirror is an n-type current mirror which is connected to an n-type device of the push-pull circuitry of the second driver. 23. The apparatus of claim 21, wherein the current mirror is a p-type current mirror which is connected to a p-type device of the push-pull circuitry of the second driver. 24. The apparatus of claim 21, wherein the current mirror is shared by multiple drivers in a memory array. 25. The apparatus of claim 21, wherein the resistive memory element comprises at least one of: magnetic tunneling junction (MTJ) device; a phase change memory (PCM) cell; or a resistive random access memory (ReRAM) cell. | 2,800 |
12,034 | 12,034 | 15,093,563 | 2,877 | An immersion probe system is provided for simultaneously performing first analysis of a first portion of light originating from liquids and/or particles in a fluid and second analysis of a second portion of the light originating from the liquids and/or particles. The system defines an optical axis and includes a first component including a first analyzer, a window, and a first optical path extending between the window and the first analyzer. The system also includes a second component including a second analyzer, the window, and a second optical path extending between the window and the second analyzer. The system further includes a spectral selector placed in the first optical path and in the second optical path to direct the first portion of the light, which originates from the liquids and/or particles and passes through the window, to the first analyzer, and to direct the second portion of said light to the second analyzer. The system includes an illumination path that delivers illumination light or lights based on a beam(s) that passes through the window at an oblique or normal angle to the optical axis. The first component and the second component share a common optical path at least between the window and the spectral selector. | 1. A system for simultaneously performing first analysis of a first portion of light originating from liquids and/or particles in a fluid and second analysis of a second portion of the light originating from the liquids and/or particles, the system defining an optical axis and comprising:
a first component including a first analyzer, a window, and a first optical path extending between the window and the first analyzer; a second component including a second analyzer, the window, and a second optical path extending between the window and the second analyzer; a spectral selector placed in the first optical path and in the second optical path to direct the first portion of the light, which originates from the liquids and/or particles and passes through the window, to the first analyzer, and to direct the second portion of said light to the second analyzer; and a fluid-immersible probe, the probe including the window at its distal end, the probe further including an illumination path that delivers illumination light or lights based on a beam(s) that passes through the window at an oblique or normal angle to the optical axis; wherein a portion of the first optical path between the window and the spectral selector coincides with a portion of the second optical path between the window and the spectral selector such that the first component and the second component share a common optical path at least between the window and the spectral selector. 2. The system of claim 1, wherein the first analyzer and the second analyzer are an imager and a spectrometer. 3. The system of claim 1, wherein the first analyzer and the second analyzer are an imager and another imager. 4. The system of claim 1, wherein the first analyzer and the second analyzer are a spectrometer and another spectrometer. 5. The system of claim 1, wherein the first analyzer and the second analyzer are separately provided, and the spectral selector directs the first portion of the light to the first analyzer and the second portion of the light to the analyzer along two different paths. 6. The system of claim 1, wherein the first and second analyzers are integrally formed, the spectral selector directs the first and second portions of the light to the first and second analyzers along a single path, and the integrally formed first and second analyzers segment the light received along the single path into the first and second portions intended for the first and second analyzers, respectively. 7. The system of claim 1, wherein the spectral selector comprises switchable filters including a first filter and a second filter, the first filter being configured to direct the first portion of the light to the first analyzer and the second filter being configured to direct the second portion of the light to the second analyzer. 8. The system of claim 1, wherein the spectral selector comprises a beamsplitter configured to direct and/or select the first portion of the light to/for the first analyzer and to direct and/or select the second portion of the light to/for the second analyzer. 9. The system of claim 1, wherein the spectral selector is formed of one or more of a spectral filter, a dichroic mirror, and a wave guide. 10. The system of claim 1, further comprising a secondary spectral selector positioned in the second optical path between the spectral selector and the second analyzer, the secondary spectral selector being configured to receive the second portion of the light from the spectral selector and pass only a desired portion of the second portion to the second analyzer. 11. The system of claim 1, wherein the first portion of the light directed to the first analyzer and the second portion of the light directed to the second analyzer are split in terms of their wavelengths. 12. The system of claim 1, wherein the first portion of the light directed to the first analyzer and the second portion of the light directed to the second analyzer are split in terms of their intensity levels. 13. The system of claim 1, wherein the portions of the first and second optical paths forming the common optical path, the spectral selector, and at least one of the first analyzer and the second analyzer are housed in the probe. 14. The system of claim 11, wherein both the first analyzer and the second analyzer are housed in the probe. 15. The system of claim 11, further comprising a power source and a light source in the probe. 16. The system of claim 1, wherein the first analyzer and the second analyzer are selected from a group consisting of an image sensor, a back scatter imager, a Fluorescence microscopy imager, a Raman imager, a hyperspectral imager, a Raman spectrometer, a Fourier transform infrared spectroscopy (FTIR) spectrometer, a Fluorescence spectrometer, a Near Infrared (NIR) spectrometer, and a UV spectrometer. 17. The system of claim 1, further comprising one or more speckle reduction optical elements that are provided in the illumination path of the illumination light or lights which are laser(s), wherein the one or more speckle reduction optical elements are selected from a group consisting of: a scrambler type optical element configured to scramble a speckle pattern, and a mode multiplier type optical element configured to add spatial, temporal, or angular modes of propagation which in turn reduces speckle. 18. The system of claim 17, wherein the one or more speckle reduction optical elements is formed of one or a combination of a spinning or vibrating diffuser(s), prism(s), mirror(s), and/or fiber(s). 19. A method of simultaneously performing multiple optical analyses of liquids and/or particles in a fluid, the method comprising:
illuminating the liquids and/or particles through an observation window; receiving light originating from the illuminated liquids and/or particles back through the observation window along a single optical path; selecting a first portion of the light originating from the illuminated liquids and/or particles and directing the selected first portion of the light to a first optical analyzer; and selecting a second portion of the light originating from the illuminated liquids and/or particles and directing the selected second portion of the light to a second optical analyzer. 20. The method of claim 19, further comprising selecting a desired portion of the selected second portion of the light and directing the selected desired portion to the second optical analyzer. | An immersion probe system is provided for simultaneously performing first analysis of a first portion of light originating from liquids and/or particles in a fluid and second analysis of a second portion of the light originating from the liquids and/or particles. The system defines an optical axis and includes a first component including a first analyzer, a window, and a first optical path extending between the window and the first analyzer. The system also includes a second component including a second analyzer, the window, and a second optical path extending between the window and the second analyzer. The system further includes a spectral selector placed in the first optical path and in the second optical path to direct the first portion of the light, which originates from the liquids and/or particles and passes through the window, to the first analyzer, and to direct the second portion of said light to the second analyzer. The system includes an illumination path that delivers illumination light or lights based on a beam(s) that passes through the window at an oblique or normal angle to the optical axis. The first component and the second component share a common optical path at least between the window and the spectral selector.1. A system for simultaneously performing first analysis of a first portion of light originating from liquids and/or particles in a fluid and second analysis of a second portion of the light originating from the liquids and/or particles, the system defining an optical axis and comprising:
a first component including a first analyzer, a window, and a first optical path extending between the window and the first analyzer; a second component including a second analyzer, the window, and a second optical path extending between the window and the second analyzer; a spectral selector placed in the first optical path and in the second optical path to direct the first portion of the light, which originates from the liquids and/or particles and passes through the window, to the first analyzer, and to direct the second portion of said light to the second analyzer; and a fluid-immersible probe, the probe including the window at its distal end, the probe further including an illumination path that delivers illumination light or lights based on a beam(s) that passes through the window at an oblique or normal angle to the optical axis; wherein a portion of the first optical path between the window and the spectral selector coincides with a portion of the second optical path between the window and the spectral selector such that the first component and the second component share a common optical path at least between the window and the spectral selector. 2. The system of claim 1, wherein the first analyzer and the second analyzer are an imager and a spectrometer. 3. The system of claim 1, wherein the first analyzer and the second analyzer are an imager and another imager. 4. The system of claim 1, wherein the first analyzer and the second analyzer are a spectrometer and another spectrometer. 5. The system of claim 1, wherein the first analyzer and the second analyzer are separately provided, and the spectral selector directs the first portion of the light to the first analyzer and the second portion of the light to the analyzer along two different paths. 6. The system of claim 1, wherein the first and second analyzers are integrally formed, the spectral selector directs the first and second portions of the light to the first and second analyzers along a single path, and the integrally formed first and second analyzers segment the light received along the single path into the first and second portions intended for the first and second analyzers, respectively. 7. The system of claim 1, wherein the spectral selector comprises switchable filters including a first filter and a second filter, the first filter being configured to direct the first portion of the light to the first analyzer and the second filter being configured to direct the second portion of the light to the second analyzer. 8. The system of claim 1, wherein the spectral selector comprises a beamsplitter configured to direct and/or select the first portion of the light to/for the first analyzer and to direct and/or select the second portion of the light to/for the second analyzer. 9. The system of claim 1, wherein the spectral selector is formed of one or more of a spectral filter, a dichroic mirror, and a wave guide. 10. The system of claim 1, further comprising a secondary spectral selector positioned in the second optical path between the spectral selector and the second analyzer, the secondary spectral selector being configured to receive the second portion of the light from the spectral selector and pass only a desired portion of the second portion to the second analyzer. 11. The system of claim 1, wherein the first portion of the light directed to the first analyzer and the second portion of the light directed to the second analyzer are split in terms of their wavelengths. 12. The system of claim 1, wherein the first portion of the light directed to the first analyzer and the second portion of the light directed to the second analyzer are split in terms of their intensity levels. 13. The system of claim 1, wherein the portions of the first and second optical paths forming the common optical path, the spectral selector, and at least one of the first analyzer and the second analyzer are housed in the probe. 14. The system of claim 11, wherein both the first analyzer and the second analyzer are housed in the probe. 15. The system of claim 11, further comprising a power source and a light source in the probe. 16. The system of claim 1, wherein the first analyzer and the second analyzer are selected from a group consisting of an image sensor, a back scatter imager, a Fluorescence microscopy imager, a Raman imager, a hyperspectral imager, a Raman spectrometer, a Fourier transform infrared spectroscopy (FTIR) spectrometer, a Fluorescence spectrometer, a Near Infrared (NIR) spectrometer, and a UV spectrometer. 17. The system of claim 1, further comprising one or more speckle reduction optical elements that are provided in the illumination path of the illumination light or lights which are laser(s), wherein the one or more speckle reduction optical elements are selected from a group consisting of: a scrambler type optical element configured to scramble a speckle pattern, and a mode multiplier type optical element configured to add spatial, temporal, or angular modes of propagation which in turn reduces speckle. 18. The system of claim 17, wherein the one or more speckle reduction optical elements is formed of one or a combination of a spinning or vibrating diffuser(s), prism(s), mirror(s), and/or fiber(s). 19. A method of simultaneously performing multiple optical analyses of liquids and/or particles in a fluid, the method comprising:
illuminating the liquids and/or particles through an observation window; receiving light originating from the illuminated liquids and/or particles back through the observation window along a single optical path; selecting a first portion of the light originating from the illuminated liquids and/or particles and directing the selected first portion of the light to a first optical analyzer; and selecting a second portion of the light originating from the illuminated liquids and/or particles and directing the selected second portion of the light to a second optical analyzer. 20. The method of claim 19, further comprising selecting a desired portion of the selected second portion of the light and directing the selected desired portion to the second optical analyzer. | 2,800 |
12,035 | 12,035 | 16,400,530 | 2,874 | A fiber optic cable assembly a termination assembly attached at the first and second ends of the ribbon. The ferrule has a polished contact surface that exposes ends of the optical fibers, and the contact surface forms an oblique angle relative to a plane normal to axes defined by the fibers. Each contact surface is slightly rotated clockwise or slightly rotated counter-clockwise with respect to the normal of the plane defined by the fiber array, so that when the second end of one cable assembly is mated to the first end of a second cable assembly in Key-Up to Key-Up Method B adapter configuration, the angled ferrule surfaces abut. | 1. A fiber optic cable assembly, comprising:
a plurality of substantially parallel optical fibers formed into a ribbon, the ribbon extending in a longitudinal direction and having first and second ends; a termination assembly attached at each of the first and second ends of the ribbon, wherein each of the termination assemblies include a body and a ferrule, the body having a key on an upper surface thereof, and when viewed facing the contact surface with the key projecting upwardly, the outermost one of the fiber positions located on the left side is designated as fiber position 1 and the opposite outermost fiber position is designated position n, and wherein when the contact surface of the first end is viewed with the termination key up, optical fiber 1 is located in position 1, and wherein the contact surface of the second end when viewed with the termination key up, optical fiber 1 is located in position n, and wherein, the ferrule has a polished contact surface that exposes ends of the optical fibers, and the contact surface forms an oblique angle relative to a plane normal to axes defined by the fibers, and wherein either (a) each contact surface is slightly rotated clockwise, or (b) each contact surface is slightly rotated counter-clockwise with respect to the normal of the plane defined by the fiber array, so that when the second end of one cable assembly is mated to the first end of a second cable assembly in Key-Up to Key-Up Method B adapter configuration, the angled ferrule surfaces abut. 2. A fiber optical cable assembly as defined in claim 1, wherein the number n of fibers in the ferrule is 4. 3. A fiber optical cable assembly as defined in claim 1, wherein the number n of fibers in the ferrule is 8. 4. A fiber optical cable assembly as defined in claim 1, wherein the number n of fibers in the ferrule is 12. 5. A fiber optical cable assembly as defined in claim 1, wherein the number n of fibers in the ferrule is 16. 6. Wherein the angled surface is between 5 and 15 degrees. 7. The fiber optic cable assembly defined in claim 1, where the oblique angle is about 8 degrees. 8. The fiber optic cable assembly defined in claim 1, wherein the optical fibers are single-mode optical fibers. 9. A fiber optic cable assembly as defined in claim 1, wherein the optical fibers are multimode optical fibers. 10. A fiber optic cable assembly as defined in claim 1, wherein only the portion of the surface area containing the optical fibers is angle polished. 11. A fiber optic cable assembly as defined in claim 1, wherein the ferrule also includes alignment pins. | A fiber optic cable assembly a termination assembly attached at the first and second ends of the ribbon. The ferrule has a polished contact surface that exposes ends of the optical fibers, and the contact surface forms an oblique angle relative to a plane normal to axes defined by the fibers. Each contact surface is slightly rotated clockwise or slightly rotated counter-clockwise with respect to the normal of the plane defined by the fiber array, so that when the second end of one cable assembly is mated to the first end of a second cable assembly in Key-Up to Key-Up Method B adapter configuration, the angled ferrule surfaces abut.1. A fiber optic cable assembly, comprising:
a plurality of substantially parallel optical fibers formed into a ribbon, the ribbon extending in a longitudinal direction and having first and second ends; a termination assembly attached at each of the first and second ends of the ribbon, wherein each of the termination assemblies include a body and a ferrule, the body having a key on an upper surface thereof, and when viewed facing the contact surface with the key projecting upwardly, the outermost one of the fiber positions located on the left side is designated as fiber position 1 and the opposite outermost fiber position is designated position n, and wherein when the contact surface of the first end is viewed with the termination key up, optical fiber 1 is located in position 1, and wherein the contact surface of the second end when viewed with the termination key up, optical fiber 1 is located in position n, and wherein, the ferrule has a polished contact surface that exposes ends of the optical fibers, and the contact surface forms an oblique angle relative to a plane normal to axes defined by the fibers, and wherein either (a) each contact surface is slightly rotated clockwise, or (b) each contact surface is slightly rotated counter-clockwise with respect to the normal of the plane defined by the fiber array, so that when the second end of one cable assembly is mated to the first end of a second cable assembly in Key-Up to Key-Up Method B adapter configuration, the angled ferrule surfaces abut. 2. A fiber optical cable assembly as defined in claim 1, wherein the number n of fibers in the ferrule is 4. 3. A fiber optical cable assembly as defined in claim 1, wherein the number n of fibers in the ferrule is 8. 4. A fiber optical cable assembly as defined in claim 1, wherein the number n of fibers in the ferrule is 12. 5. A fiber optical cable assembly as defined in claim 1, wherein the number n of fibers in the ferrule is 16. 6. Wherein the angled surface is between 5 and 15 degrees. 7. The fiber optic cable assembly defined in claim 1, where the oblique angle is about 8 degrees. 8. The fiber optic cable assembly defined in claim 1, wherein the optical fibers are single-mode optical fibers. 9. A fiber optic cable assembly as defined in claim 1, wherein the optical fibers are multimode optical fibers. 10. A fiber optic cable assembly as defined in claim 1, wherein only the portion of the surface area containing the optical fibers is angle polished. 11. A fiber optic cable assembly as defined in claim 1, wherein the ferrule also includes alignment pins. | 2,800 |
12,036 | 12,036 | 16,325,868 | 2,844 | A lighting device (10) for operating from a main power supply or from an auxiliary power supply (25), in co-operation with a switching device transmitting a wireless control signal indicative of a power condition of the main power supply. The lighting device (10) accommodates in a single housing (11) a light emitting module (20), the auxiliary power supply (25) and a control circuit (30) for monitoring the wireless control signal and a power condition of the main power supply at the lighting device (10). The control circuit (30) is to operate the lighting device from the auxiliary power supply if both the monitored power condition and the control signal indicate absence of power, and is to deactivate the powering from the auxiliary power supply (25) if the monitoring reveals presence of power of the main power supply. | 1. A lighting device comprising terminals for connecting a main power supply, said lighting device comprising:
a light emitting module, a control circuit for monitoring a wireless control signal indicative of a power condition of said main power supply and for monitoring a power condition at said terminals, and an auxiliary power supply for powering said lighting device, wherein said control circuit is configured for powering said lighting device from said auxiliary power supply based on simultaneous absence of power on said monitored power condition at said terminals and absence of receipt of said wireless control signal. 2. The lighting device according to claim 1, wherein said auxiliary power supply comprises at least one rechargeable battery. 3. The lighting device according to claim 1, wherein said light emitting module comprises a plurality of light emitting diodes, and wherein said lighting device comprises a main driver circuit for powering said light emitting module from a main power supply. 4. The lighting device according to claim 3, comprising a further driver circuit configured for lighting a reduced number of said light emitting diodes if powered from said auxiliary power supply compared to being powered from said main power supply. 5. The lighting device according to claim 1, further comprising a status indicator light emitting diode, wherein said control circuit is arranged to operate said status indicator light emitting diode indicative of at least one of a power condition of said auxiliary power supply and a power condition of said main power supply indicated by said control signal. 6. The lighting device according to claim 1, wherein said light emitting module, main driver circuit, control circuit, auxiliary power supply and further driver circuit are accommodated in a single housing configured as a retrofit tube type or bulb type solid-state light source. 7. A switching device, comprising a housing accommodating a switch for making and breaking a power line from a main power supply for powering a lighting device, said switch having terminals for connecting said power supply and lighting device, a power monitoring circuit for monitoring a power condition at said terminals, and a transmitter for wirelessly transmitting a control signal indicative of presence of power by said power monitoring circuit. 8. The switching device according to claim 7, wherein said power monitoring circuit and said transmitter are configured for interrupting transmission of said control signal in absence of power of said main power supply in the event of a power outage of said main power supply as well as when said switch is in its current conducting or making state. 9. The switching device according to claim 7, further comprising a capacitive power supply unit connected across said terminals for powering said transmitter. 10. The switching device according to claim 7, arranged as an electric switch for flush wall mounting or surface wall mounting. 11. A lighting system, comprising at least one lighting device in accordance with claim 1 and at least one switching device. 12. A method of operating a lighting device comprising a light emitting module configured for being powered by one of a main power supply and an auxiliary power supply, said method comprising the steps of:
monitoring a wireless control signal indicative of a power condition of said main power supply, monitoring a power condition of said main power supply at said lighting device, powering said light emitting module by said auxiliary power supply based on simultaneous absence of power on said monitored power condition and absence of receipt of said monitored control signal. 13. The method according to claim 12, wherein said light emitting module comprises a plurality of light emitting diodes, wherein said step of powering comprises lighting of a reduced number of said light emitting diodes compared to being powered from said main power supply. | A lighting device (10) for operating from a main power supply or from an auxiliary power supply (25), in co-operation with a switching device transmitting a wireless control signal indicative of a power condition of the main power supply. The lighting device (10) accommodates in a single housing (11) a light emitting module (20), the auxiliary power supply (25) and a control circuit (30) for monitoring the wireless control signal and a power condition of the main power supply at the lighting device (10). The control circuit (30) is to operate the lighting device from the auxiliary power supply if both the monitored power condition and the control signal indicate absence of power, and is to deactivate the powering from the auxiliary power supply (25) if the monitoring reveals presence of power of the main power supply.1. A lighting device comprising terminals for connecting a main power supply, said lighting device comprising:
a light emitting module, a control circuit for monitoring a wireless control signal indicative of a power condition of said main power supply and for monitoring a power condition at said terminals, and an auxiliary power supply for powering said lighting device, wherein said control circuit is configured for powering said lighting device from said auxiliary power supply based on simultaneous absence of power on said monitored power condition at said terminals and absence of receipt of said wireless control signal. 2. The lighting device according to claim 1, wherein said auxiliary power supply comprises at least one rechargeable battery. 3. The lighting device according to claim 1, wherein said light emitting module comprises a plurality of light emitting diodes, and wherein said lighting device comprises a main driver circuit for powering said light emitting module from a main power supply. 4. The lighting device according to claim 3, comprising a further driver circuit configured for lighting a reduced number of said light emitting diodes if powered from said auxiliary power supply compared to being powered from said main power supply. 5. The lighting device according to claim 1, further comprising a status indicator light emitting diode, wherein said control circuit is arranged to operate said status indicator light emitting diode indicative of at least one of a power condition of said auxiliary power supply and a power condition of said main power supply indicated by said control signal. 6. The lighting device according to claim 1, wherein said light emitting module, main driver circuit, control circuit, auxiliary power supply and further driver circuit are accommodated in a single housing configured as a retrofit tube type or bulb type solid-state light source. 7. A switching device, comprising a housing accommodating a switch for making and breaking a power line from a main power supply for powering a lighting device, said switch having terminals for connecting said power supply and lighting device, a power monitoring circuit for monitoring a power condition at said terminals, and a transmitter for wirelessly transmitting a control signal indicative of presence of power by said power monitoring circuit. 8. The switching device according to claim 7, wherein said power monitoring circuit and said transmitter are configured for interrupting transmission of said control signal in absence of power of said main power supply in the event of a power outage of said main power supply as well as when said switch is in its current conducting or making state. 9. The switching device according to claim 7, further comprising a capacitive power supply unit connected across said terminals for powering said transmitter. 10. The switching device according to claim 7, arranged as an electric switch for flush wall mounting or surface wall mounting. 11. A lighting system, comprising at least one lighting device in accordance with claim 1 and at least one switching device. 12. A method of operating a lighting device comprising a light emitting module configured for being powered by one of a main power supply and an auxiliary power supply, said method comprising the steps of:
monitoring a wireless control signal indicative of a power condition of said main power supply, monitoring a power condition of said main power supply at said lighting device, powering said light emitting module by said auxiliary power supply based on simultaneous absence of power on said monitored power condition and absence of receipt of said monitored control signal. 13. The method according to claim 12, wherein said light emitting module comprises a plurality of light emitting diodes, wherein said step of powering comprises lighting of a reduced number of said light emitting diodes compared to being powered from said main power supply. | 2,800 |
12,037 | 12,037 | 14,905,959 | 2,815 | An LED die ( 40 ) includes an N-type layer ( 18 ), a P-type layer ( 22 ), and an active layer ( 20 ) epitaxially grown over a first surface of a transparent growth substrate ( 46 ). Light is emitted through a second surface of the substrate opposite the first surface and is wavelength converted by a phosphor layer ( 30 ). Openings ( 42, 44 ) are etched in the central areas ( 42 ) and along the edge ( 44 ) of the die to expose the first surface of the substrate ( 46 ). A highly reflective metal ( 50 ), such as silver, is deposited in the openings and insulated from the metal P-contact. The reflective metal may conduct current for the N-type layer by being electrically connected to an exposed side of the N-type layer along the inside edge of each opening. The reflective metal reflects downward light emitted by the phosphor layer to improve efficiency. The reflective areas provided by the reflective metal may form 10 %- 50 % of the die area. | 1. A light emitting diode (LED) die structure comprising:
LED semiconductor layers including an N-type layer, a P-type layer, and an active layer that emits light; a growth substrate having a first surface and a second surface opposing the first surface; the N-type layer, the P-type layer, and the active layer being grown on the first surface; the N-type layer, the P-type layer, and the active layer being arranged so that at least a portion of the light generated by the active layer enters the first surface of the substrate and exits through the second surface of the substrate; a wavelength conversion layer overlying the second surface of the substrate; the LED semiconductor layers having one or more openings distributed around the central portion of the die and at least one of the openings exposing the first surface of the substrate; and a reflective material deposited in the one or more openings and covering at least a portion of the first surface of the substrate so as to reflect light from the wavelength conversion layer. 2. The structure of claim 1 wherein the reflective material is a metal directly contacting the substrate. 3. The structure of claim 2 wherein the reflective material conducts current for the N-type layer. 4. The structure of claim 2 wherein the reflective material is electrically insulated from the N-type layer. 5. The structure of claim 1 further comprising one or more openings along an edge of the LED die. 6. (canceled) 7. The structure of claim 1 wherein the opening along the central portion of the LED die forms a cross shape. 8. The structure of claim 1 wherein the one or more openings comprise openings distributed across the LED die. 9. The structure of claim 7 wherein the one or more openings further comprises an opening along an edge of the LED die. 10. The structure of claim 1 wherein the one or more openings comprise openings distributed across the LED die, the structure further comprising an N-contact metal ring along an edge of each of the openings distributed across the LED die, but not in a central area of the openings, for electrically connecting the reflective material to the N-type layer. 11. The structure of claim 1 wherein the one or more openings comprise openings distributed across the LED die, the structure further comprising electrical contact areas between the N-type layer and the reflective material along an edge of each of the openings distributed across the LED die, but not in a central area of the openings, for electrically connecting the reflective material to the N-type layer. 12. The structure of claim 1 wherein the one or more openings comprise an opening in a central portion of the LED die, the structure further comprising a continuous electrical contact area between the N-type layer and the reflective material along an edge of the opening, but not in a central area of the opening, for electrically connecting the reflective material to the N-type layer. 13. The structure of claim 1 wherein the one or more openings comprise an opening along an edge of the LED die, the structure further comprising a continuous electrical contact area between the N-type layer and the reflective material along an inner edge of the opening, but not in a central area of the opening, for electrically connecting the reflective material to the N-type layer. 14. The structure of claim 1 wherein the reflective material comprises Ag. 15. The structure of claim 1 wherein the reflective material is a first metal layer electrically contacting the N-type layer, the structure further comprising a second metal layer electrically contacting the P-type layer, wherein the first metal layer and second metal layer terminate in anode and cathode electrodes on a bottom surface of the LED die. 16. The structure of claim 1 wherein the wavelength conversion layer is a phosphor layer also formed over side walls of the substrate. 17. The structure of claim 1 further comprising a reflector formed over side walls of the substrate. 18. The structure of claim 1 wherein the reflective material comprises a dielectric stack forming a distributed Bragg reflector. 19. The structure of claim 1 further comprising a dielectric layer between the substrate and the reflective material. 20. A light emitting diode (LED) die structure comprising:
LED semiconductor layers including an N-type layer, a P-type layer, and an active layer that emits light; a growth substrate having a first surface and a second surface opposing the first surface; the N-type layer, the P-type layer, and the active layer being grown on the first surface; the N-type layer, the P-type layer, and the active layer being arranged so that at least a portion of the light generated by the active layer enters the first surface of the substrate and exits through the second surface of the substrate; a wavelength conversion layer overlying the second surface of the substrate; the LED semiconductor layers having one or more openings distributed around the central portion of the die and at least one of the openings exposing the N-type layer; a dielectric layer formed over the exposed N-type layer; and a reflective material deposited in the one or more openings over the dielectric layer so as to reflect light from the wavelength conversion layer. | An LED die ( 40 ) includes an N-type layer ( 18 ), a P-type layer ( 22 ), and an active layer ( 20 ) epitaxially grown over a first surface of a transparent growth substrate ( 46 ). Light is emitted through a second surface of the substrate opposite the first surface and is wavelength converted by a phosphor layer ( 30 ). Openings ( 42, 44 ) are etched in the central areas ( 42 ) and along the edge ( 44 ) of the die to expose the first surface of the substrate ( 46 ). A highly reflective metal ( 50 ), such as silver, is deposited in the openings and insulated from the metal P-contact. The reflective metal may conduct current for the N-type layer by being electrically connected to an exposed side of the N-type layer along the inside edge of each opening. The reflective metal reflects downward light emitted by the phosphor layer to improve efficiency. The reflective areas provided by the reflective metal may form 10 %- 50 % of the die area.1. A light emitting diode (LED) die structure comprising:
LED semiconductor layers including an N-type layer, a P-type layer, and an active layer that emits light; a growth substrate having a first surface and a second surface opposing the first surface; the N-type layer, the P-type layer, and the active layer being grown on the first surface; the N-type layer, the P-type layer, and the active layer being arranged so that at least a portion of the light generated by the active layer enters the first surface of the substrate and exits through the second surface of the substrate; a wavelength conversion layer overlying the second surface of the substrate; the LED semiconductor layers having one or more openings distributed around the central portion of the die and at least one of the openings exposing the first surface of the substrate; and a reflective material deposited in the one or more openings and covering at least a portion of the first surface of the substrate so as to reflect light from the wavelength conversion layer. 2. The structure of claim 1 wherein the reflective material is a metal directly contacting the substrate. 3. The structure of claim 2 wherein the reflective material conducts current for the N-type layer. 4. The structure of claim 2 wherein the reflective material is electrically insulated from the N-type layer. 5. The structure of claim 1 further comprising one or more openings along an edge of the LED die. 6. (canceled) 7. The structure of claim 1 wherein the opening along the central portion of the LED die forms a cross shape. 8. The structure of claim 1 wherein the one or more openings comprise openings distributed across the LED die. 9. The structure of claim 7 wherein the one or more openings further comprises an opening along an edge of the LED die. 10. The structure of claim 1 wherein the one or more openings comprise openings distributed across the LED die, the structure further comprising an N-contact metal ring along an edge of each of the openings distributed across the LED die, but not in a central area of the openings, for electrically connecting the reflective material to the N-type layer. 11. The structure of claim 1 wherein the one or more openings comprise openings distributed across the LED die, the structure further comprising electrical contact areas between the N-type layer and the reflective material along an edge of each of the openings distributed across the LED die, but not in a central area of the openings, for electrically connecting the reflective material to the N-type layer. 12. The structure of claim 1 wherein the one or more openings comprise an opening in a central portion of the LED die, the structure further comprising a continuous electrical contact area between the N-type layer and the reflective material along an edge of the opening, but not in a central area of the opening, for electrically connecting the reflective material to the N-type layer. 13. The structure of claim 1 wherein the one or more openings comprise an opening along an edge of the LED die, the structure further comprising a continuous electrical contact area between the N-type layer and the reflective material along an inner edge of the opening, but not in a central area of the opening, for electrically connecting the reflective material to the N-type layer. 14. The structure of claim 1 wherein the reflective material comprises Ag. 15. The structure of claim 1 wherein the reflective material is a first metal layer electrically contacting the N-type layer, the structure further comprising a second metal layer electrically contacting the P-type layer, wherein the first metal layer and second metal layer terminate in anode and cathode electrodes on a bottom surface of the LED die. 16. The structure of claim 1 wherein the wavelength conversion layer is a phosphor layer also formed over side walls of the substrate. 17. The structure of claim 1 further comprising a reflector formed over side walls of the substrate. 18. The structure of claim 1 wherein the reflective material comprises a dielectric stack forming a distributed Bragg reflector. 19. The structure of claim 1 further comprising a dielectric layer between the substrate and the reflective material. 20. A light emitting diode (LED) die structure comprising:
LED semiconductor layers including an N-type layer, a P-type layer, and an active layer that emits light; a growth substrate having a first surface and a second surface opposing the first surface; the N-type layer, the P-type layer, and the active layer being grown on the first surface; the N-type layer, the P-type layer, and the active layer being arranged so that at least a portion of the light generated by the active layer enters the first surface of the substrate and exits through the second surface of the substrate; a wavelength conversion layer overlying the second surface of the substrate; the LED semiconductor layers having one or more openings distributed around the central portion of the die and at least one of the openings exposing the N-type layer; a dielectric layer formed over the exposed N-type layer; and a reflective material deposited in the one or more openings over the dielectric layer so as to reflect light from the wavelength conversion layer. | 2,800 |
12,038 | 12,038 | 16,007,087 | 2,842 | Provided is a power amplification module that includes: an amplification transistor that has a constant power supply voltage supplied to a collector thereof, a bias current supplied to a base thereof and that amplifies an input signal input to the base thereof and outputs an amplified signal from the collector thereof; a first current source that outputs a first current that corresponds to a level control voltage that is for controlling a signal level of the amplified signal; and a bias transistor that has the first current supplied to a collector thereof, a bias control voltage connected to a base thereof and that outputs the bias current from an emitter thereof. | 1. A power amplification module comprising:
an amplification transistor that has a constant power supply voltage supplied to a collector of the amplification transistor, that has a bias current supplied to a base of the amplification transistor and that amplifies an input signal input to the base of the amplification transistor and outputs an amplified signal from the collector of the amplification transistor; a first current source that outputs a first current that corresponds to a level control voltage that controls a signal level of the amplified signal; and a bias transistor that has the first current supplied to a collector of the bias transistor, a bias control voltage connected to a base of the bias transistor and that outputs the bias current from an emitter of the bias transistor. 2. The power amplification module according to claim 1, wherein when the level control voltage is at a second level, a rate of change of the first current is larger than a rate of change of the first current when the level control voltage is at a first level, the second level being higher than the first level. 3. The power amplification module according to claim 1, further comprising:
a first voltage source that supplies a constant first voltage to the collector of the bias transistor. 4. The power amplification module according to claim 2, further comprising:
a first voltage source that supplies a constant first voltage to the collector of the bias transistor. 5. The power amplification module according to claim 1, further comprising:
a first switch circuit; wherein when a first operation mode in which the bias current is controlled in accordance with the level control voltage, the first switch circuit supplies the first current to the collector of the bias transistor; and wherein when a second operation mode in which the bias current is not controlled in accordance with the level control voltage, the first switch circuit supplies the power supply voltage to the collector of the bias transistor. 6. The power amplification module according to claim 2, further comprising:
a first switch circuit; wherein when a first operation mode in which the bias current is controlled in accordance with the level control voltage, the first switch circuit supplies the first current to the collector of the bias transistor; and wherein when a second operation mode in which the bias current is not controlled in accordance with the level control voltage, the first switch circuit supplies the power supply voltage to the collector of the bias transistor. 7. The power amplification module according to claim 3, further comprising:
a first switch circuit; wherein when a first operation mode in which the bias current is controlled in accordance with the level control voltage, the first switch circuit supplies the first current to the collector of the bias transistor; and wherein when a second operation mode in which the bias current is not controlled in accordance with the level control voltage, the first switch circuit supplies the power supply voltage to the collector of the bias transistor. 8. The power amplification module according to claim 2, further comprising:
a first switch circuit; wherein when a first operation mode in which the bias current is controlled in accordance with the level control voltage, the first switch circuit supplies the first current to the collector of the bias transistor; and wherein when a second operation mode in which the bias current is not controlled in accordance with the level control voltage, the first switch circuit supplies the power supply voltage to the collector of the bias transistor. 9. The power amplification module according to claim 1, further comprising:
a second voltage source that generates a constant second voltage; and a second switch circuit, wherein when the level control voltage is smaller than a prescribed level, the second switch circuit supplies the second voltage to the collector of the bias transistor, and wherein when the level control voltage is larger than a prescribed level, the second switch circuit supplies the first current to the collector of the bias transistor. 10. The power amplification module according to claim 2, further comprising:
a second voltage source that generates a constant second voltage; and a second switch circuit, wherein when the level control voltage is smaller than a prescribed level, the second switch circuit supplies the second voltage to the collector of the bias transistor, and wherein when the level control voltage is larger than a prescribed level, the second switch circuit supplies the first current to the collector of the bias transistor. 11. The power amplification module according to claim 9,
wherein when a first operation mode in which the bias current is controlled in accordance with the level control voltage, the second switch circuit supplies the second voltage to the collector of the bias transistor when the level control voltage is smaller than a prescribed level and supplies the first current to the collector of the bias transistor when the level control voltage is larger than a prescribed level, and when a second operation mode in which the bias current is not controlled in accordance with the level control voltage, the second voltage source generates a constant third voltage that is higher than the second voltage and the second switch circuit supplies the third voltage to the collector of the bias transistor. 12. The power amplification module according to claim 10,
wherein when a first operation mode in which the bias current is controlled in accordance with the level control voltage, the second switch circuit supplies the second voltage to the collector of the bias transistor when the level control voltage is smaller than a prescribed level and supplies the first current to the collector of the bias transistor when the level control voltage is larger than a prescribed level, and when a second operation mode in which the bias current is not controlled in accordance with the level control voltage, the second voltage source generates a constant third voltage that is higher than the second voltage and the second switch circuit supplies the third voltage to the collector of the bias transistor. 13. The power amplification module according to claim 1, further comprising:
a level detection circuit that outputs a detected voltage that corresponds to the signal level of the amplified signal; and a voltage control circuit that controls the level control voltage on the basis of a reference voltage and the detected voltage. 14. The power amplification module according to claim 13,
wherein the voltage control circuit controls the level control voltage on the basis of the reference voltage and the detected voltage such that the signal level of the amplified signal comes to have a value that corresponds to the reference voltage 15. A power amplification module comprising:
an amplification transistor that has a constant power supply voltage supplied to a collector of the amplification transistor, that has a bias current supplied to a base of the amplification transistor and that amplifies an input signal input to the base of the amplification transistor and outputs an amplified signal; a third voltage source that outputs a fourth voltage that corresponds to a level control voltage that controls a signal level of the amplified signal; and a bias transistor that has the fourth voltage supplied to a collector of the bias transistor, a bias control voltage supplied to a base of the bias transistor and that outputs the bias current from an emitter of the bias transistor. 16. The power amplification module according to claim 15,
wherein when the level control voltage is at a second level, a rate of change of the fourth voltage is larger than a rate of change of the fourth voltage when the level control voltage is at a first level, the second level being higher than the first level. 17. The power amplification module according to claim 15, further comprising:
a level detection circuit that outputs a detected voltage that corresponds to the signal level of the amplified signal; and a voltage control circuit that controls the level control voltage on the basis of a reference voltage and the detected voltage. 18. The power amplification module according to claim 17,
wherein the voltage control circuit controls the level control voltage on the basis of the reference voltage and the detected voltage such that the signal level of the amplified signal comes to have a value that corresponds to the reference voltage. 19. The power amplification module according to claim 3, further comprising:
a level detection circuit that outputs a detected voltage that corresponds to the signal level of the amplified signal; and a voltage control circuit that controls the level control voltage on the basis of a reference voltage and the detected voltage. 20. The power amplification module according to claim 10, further comprising:
a level detection circuit that outputs a detected voltage that corresponds to the signal level of the amplified signal; and a voltage control circuit that controls the level control voltage on the basis of a reference voltage and the detected voltage. | Provided is a power amplification module that includes: an amplification transistor that has a constant power supply voltage supplied to a collector thereof, a bias current supplied to a base thereof and that amplifies an input signal input to the base thereof and outputs an amplified signal from the collector thereof; a first current source that outputs a first current that corresponds to a level control voltage that is for controlling a signal level of the amplified signal; and a bias transistor that has the first current supplied to a collector thereof, a bias control voltage connected to a base thereof and that outputs the bias current from an emitter thereof.1. A power amplification module comprising:
an amplification transistor that has a constant power supply voltage supplied to a collector of the amplification transistor, that has a bias current supplied to a base of the amplification transistor and that amplifies an input signal input to the base of the amplification transistor and outputs an amplified signal from the collector of the amplification transistor; a first current source that outputs a first current that corresponds to a level control voltage that controls a signal level of the amplified signal; and a bias transistor that has the first current supplied to a collector of the bias transistor, a bias control voltage connected to a base of the bias transistor and that outputs the bias current from an emitter of the bias transistor. 2. The power amplification module according to claim 1, wherein when the level control voltage is at a second level, a rate of change of the first current is larger than a rate of change of the first current when the level control voltage is at a first level, the second level being higher than the first level. 3. The power amplification module according to claim 1, further comprising:
a first voltage source that supplies a constant first voltage to the collector of the bias transistor. 4. The power amplification module according to claim 2, further comprising:
a first voltage source that supplies a constant first voltage to the collector of the bias transistor. 5. The power amplification module according to claim 1, further comprising:
a first switch circuit; wherein when a first operation mode in which the bias current is controlled in accordance with the level control voltage, the first switch circuit supplies the first current to the collector of the bias transistor; and wherein when a second operation mode in which the bias current is not controlled in accordance with the level control voltage, the first switch circuit supplies the power supply voltage to the collector of the bias transistor. 6. The power amplification module according to claim 2, further comprising:
a first switch circuit; wherein when a first operation mode in which the bias current is controlled in accordance with the level control voltage, the first switch circuit supplies the first current to the collector of the bias transistor; and wherein when a second operation mode in which the bias current is not controlled in accordance with the level control voltage, the first switch circuit supplies the power supply voltage to the collector of the bias transistor. 7. The power amplification module according to claim 3, further comprising:
a first switch circuit; wherein when a first operation mode in which the bias current is controlled in accordance with the level control voltage, the first switch circuit supplies the first current to the collector of the bias transistor; and wherein when a second operation mode in which the bias current is not controlled in accordance with the level control voltage, the first switch circuit supplies the power supply voltage to the collector of the bias transistor. 8. The power amplification module according to claim 2, further comprising:
a first switch circuit; wherein when a first operation mode in which the bias current is controlled in accordance with the level control voltage, the first switch circuit supplies the first current to the collector of the bias transistor; and wherein when a second operation mode in which the bias current is not controlled in accordance with the level control voltage, the first switch circuit supplies the power supply voltage to the collector of the bias transistor. 9. The power amplification module according to claim 1, further comprising:
a second voltage source that generates a constant second voltage; and a second switch circuit, wherein when the level control voltage is smaller than a prescribed level, the second switch circuit supplies the second voltage to the collector of the bias transistor, and wherein when the level control voltage is larger than a prescribed level, the second switch circuit supplies the first current to the collector of the bias transistor. 10. The power amplification module according to claim 2, further comprising:
a second voltage source that generates a constant second voltage; and a second switch circuit, wherein when the level control voltage is smaller than a prescribed level, the second switch circuit supplies the second voltage to the collector of the bias transistor, and wherein when the level control voltage is larger than a prescribed level, the second switch circuit supplies the first current to the collector of the bias transistor. 11. The power amplification module according to claim 9,
wherein when a first operation mode in which the bias current is controlled in accordance with the level control voltage, the second switch circuit supplies the second voltage to the collector of the bias transistor when the level control voltage is smaller than a prescribed level and supplies the first current to the collector of the bias transistor when the level control voltage is larger than a prescribed level, and when a second operation mode in which the bias current is not controlled in accordance with the level control voltage, the second voltage source generates a constant third voltage that is higher than the second voltage and the second switch circuit supplies the third voltage to the collector of the bias transistor. 12. The power amplification module according to claim 10,
wherein when a first operation mode in which the bias current is controlled in accordance with the level control voltage, the second switch circuit supplies the second voltage to the collector of the bias transistor when the level control voltage is smaller than a prescribed level and supplies the first current to the collector of the bias transistor when the level control voltage is larger than a prescribed level, and when a second operation mode in which the bias current is not controlled in accordance with the level control voltage, the second voltage source generates a constant third voltage that is higher than the second voltage and the second switch circuit supplies the third voltage to the collector of the bias transistor. 13. The power amplification module according to claim 1, further comprising:
a level detection circuit that outputs a detected voltage that corresponds to the signal level of the amplified signal; and a voltage control circuit that controls the level control voltage on the basis of a reference voltage and the detected voltage. 14. The power amplification module according to claim 13,
wherein the voltage control circuit controls the level control voltage on the basis of the reference voltage and the detected voltage such that the signal level of the amplified signal comes to have a value that corresponds to the reference voltage 15. A power amplification module comprising:
an amplification transistor that has a constant power supply voltage supplied to a collector of the amplification transistor, that has a bias current supplied to a base of the amplification transistor and that amplifies an input signal input to the base of the amplification transistor and outputs an amplified signal; a third voltage source that outputs a fourth voltage that corresponds to a level control voltage that controls a signal level of the amplified signal; and a bias transistor that has the fourth voltage supplied to a collector of the bias transistor, a bias control voltage supplied to a base of the bias transistor and that outputs the bias current from an emitter of the bias transistor. 16. The power amplification module according to claim 15,
wherein when the level control voltage is at a second level, a rate of change of the fourth voltage is larger than a rate of change of the fourth voltage when the level control voltage is at a first level, the second level being higher than the first level. 17. The power amplification module according to claim 15, further comprising:
a level detection circuit that outputs a detected voltage that corresponds to the signal level of the amplified signal; and a voltage control circuit that controls the level control voltage on the basis of a reference voltage and the detected voltage. 18. The power amplification module according to claim 17,
wherein the voltage control circuit controls the level control voltage on the basis of the reference voltage and the detected voltage such that the signal level of the amplified signal comes to have a value that corresponds to the reference voltage. 19. The power amplification module according to claim 3, further comprising:
a level detection circuit that outputs a detected voltage that corresponds to the signal level of the amplified signal; and a voltage control circuit that controls the level control voltage on the basis of a reference voltage and the detected voltage. 20. The power amplification module according to claim 10, further comprising:
a level detection circuit that outputs a detected voltage that corresponds to the signal level of the amplified signal; and a voltage control circuit that controls the level control voltage on the basis of a reference voltage and the detected voltage. | 2,800 |
12,039 | 12,039 | 15,586,497 | 2,853 | A MEMS sensor includes a proof mass that is suspended over a substrate. A sense electrode is located on a top surface of the substrate parallel to the proof mass, and forms a capacitor with the proof mass. The sense electrodes have a plurality of slots that provide improved performance for the MEMS sensor. A measured value sensed by the MEMS sensor is determined based on the movement of the proof mass relative to the slotted sense electrode. | 1. A system for providing for capacitive sensing of an external force on a microelectromechanical system (MEMS) device, the system comprising:
a substrate located in a first plane; a movable component of a MEMS device layer, the MEMS device layer coupled to the substrate, wherein the movable component moves along a first axis in response to the external force; and a sense electrode disposed on the substrate in the first plane, wherein a first capacitive sensing element is formed between the movable component and the first sense electrode, wherein the first capacitive sensing element is configured to be responsive to the motion of the movable component along the first axis, and wherein the sense electrode comprises a plurality of slots that substantially extend between two non-adjacent sides of the sense electrode. 2. The system of claim 1, wherein the plurality of slots substantially extend between two parallel sides of the sense electrode. 3. The system of claim 2, wherein the two parallel sides comprise two long sides of the sense electrode. 4. The system of claim 2, wherein the two parallel sides comprise two short sides of the sense electrode. 5. The system of claim 1, wherein the plurality of slots comprises a comb pattern. 6. The system of claim 1, wherein the plurality of slots comprise a partial hexagonal pattern. 7. The system of claim 1, wherein the plurality of slots comprise at least 8% of the surface area of the sense electrode. 8. The system of claim 7, wherein the plurality of slots comprise less than 20% of the surface area of the sense electrode. 9. The system of claim 1, wherein at least a portion of each of the plurality of slots is located parallel to another of the plurality of slots. 10. The system of claim 1, wherein the first axis is perpendicular to the first plane. 11. The system of claim 1, further comprising:
a second movable component of the MEMS device layer, wherein the second movable component moves along a second axis in response to the external force; and a second sense electrode disposed on the substrate in the first plane, wherein a second capacitive sensing element is formed between the second movable component and the second sense electrode, wherein the second capacitive sensing element is configured to be responsive to the motion of the second movable component along the second axis, and wherein the second sense electrode comprises a second plurality of slots that substantially extend between two non-adjacent sides of the second sense electrode. 12. The system of claim 11, further comprising a center point located in the first plane between the sense electrode and the second sense electrode, wherein the plurality of slots and the second plurality of slots are symmetrical about a line that passes through the center point in the first plane. 13. The system of claim 11, further comprising a processing unit coupled to the first sense electrode and the second sense electrode to determine a value of an external force based on a combined measurement of the first capacitive sensing element and the second capacitive sensing element. 14. The system of claim 1, wherein the plurality of slots comprises multiple angled slots. 15. The system of claim 14, wherein three of the angled slots intersect at 120 degree angles. 16. The system of claim 1, wherein the sense electrode comprises a folded strip electrode. 17. The system of claim 16, wherein the length of the folded strip electrode is longer than the length of the perimeter of the sense electrode. 18. The system of claim 16, wherein the folded strip electrode substantially forms a square wave pattern, a spiral pattern, a T-slot pattern, a Y-slot pattern, or a recessed slot pattern. 19. The system of claim 1, further comprising:
a second sense electrode disposed on the substrate in the first plane, wherein a second capacitive sensing element is formed between one or more components of the MEMS device layer and the second sense electrode; and processing circuitry coupled to the sense electrode and the second sense electrode to receive a first signal from the sense electrode and a second signal from the second sense electrode, the processing circuitry configured to combine the first signal and the second signal to output a signal responsive to movement of at least a portion of the MEMS device layer along the first axis. 20. A system for performing capacitive sensing, the system comprising:
a substrate located in a first plane; an electrode shield located on the first plane, wherein the electrode shield is formed of a first conductive material; and a plurality of sense electrodes disposed on the substrate in the first plane, wherein each of the plurality of sense electrodes is located adjacent to at least a portion of the electrode shield in the first plane, wherein each of the sense electrodes comprises a folded strip electrode, and wherein the length of the folded strip electrode is longer than the length of the perimeter of the sense electrode. 21. The system of claim 20, wherein the electrode shield comprises a plurality of slots that substantially extend between two non-adjacent sides of the electrode shield. 22. A method comprising:
applying, by one or more drive electrodes of a MEMS inertial sensor, a force to a suspended component of the MEMS inertial sensor; determining, by processing circuitry, a measured value corresponding to movement of the suspended component relative to a sense electrode of the MEMS inertial sensor as a result of the applied force; comparing, by the processing circuitry, the measured value to a baseline value for the applied force; identifying, by the processing circuitry, operational data associated with the MEMS inertial sensor, wherein the operational data is related to time in service of the MEMS inertial sensor, run time for the MEMS inertial sensor, or temperature of the MEMS inertial sensor; modifying, by the processing circuitry, the operation of the MEMS inertial sensor based on the comparison and the operational data, wherein the modification is related to a condition of the sense electrode. | A MEMS sensor includes a proof mass that is suspended over a substrate. A sense electrode is located on a top surface of the substrate parallel to the proof mass, and forms a capacitor with the proof mass. The sense electrodes have a plurality of slots that provide improved performance for the MEMS sensor. A measured value sensed by the MEMS sensor is determined based on the movement of the proof mass relative to the slotted sense electrode.1. A system for providing for capacitive sensing of an external force on a microelectromechanical system (MEMS) device, the system comprising:
a substrate located in a first plane; a movable component of a MEMS device layer, the MEMS device layer coupled to the substrate, wherein the movable component moves along a first axis in response to the external force; and a sense electrode disposed on the substrate in the first plane, wherein a first capacitive sensing element is formed between the movable component and the first sense electrode, wherein the first capacitive sensing element is configured to be responsive to the motion of the movable component along the first axis, and wherein the sense electrode comprises a plurality of slots that substantially extend between two non-adjacent sides of the sense electrode. 2. The system of claim 1, wherein the plurality of slots substantially extend between two parallel sides of the sense electrode. 3. The system of claim 2, wherein the two parallel sides comprise two long sides of the sense electrode. 4. The system of claim 2, wherein the two parallel sides comprise two short sides of the sense electrode. 5. The system of claim 1, wherein the plurality of slots comprises a comb pattern. 6. The system of claim 1, wherein the plurality of slots comprise a partial hexagonal pattern. 7. The system of claim 1, wherein the plurality of slots comprise at least 8% of the surface area of the sense electrode. 8. The system of claim 7, wherein the plurality of slots comprise less than 20% of the surface area of the sense electrode. 9. The system of claim 1, wherein at least a portion of each of the plurality of slots is located parallel to another of the plurality of slots. 10. The system of claim 1, wherein the first axis is perpendicular to the first plane. 11. The system of claim 1, further comprising:
a second movable component of the MEMS device layer, wherein the second movable component moves along a second axis in response to the external force; and a second sense electrode disposed on the substrate in the first plane, wherein a second capacitive sensing element is formed between the second movable component and the second sense electrode, wherein the second capacitive sensing element is configured to be responsive to the motion of the second movable component along the second axis, and wherein the second sense electrode comprises a second plurality of slots that substantially extend between two non-adjacent sides of the second sense electrode. 12. The system of claim 11, further comprising a center point located in the first plane between the sense electrode and the second sense electrode, wherein the plurality of slots and the second plurality of slots are symmetrical about a line that passes through the center point in the first plane. 13. The system of claim 11, further comprising a processing unit coupled to the first sense electrode and the second sense electrode to determine a value of an external force based on a combined measurement of the first capacitive sensing element and the second capacitive sensing element. 14. The system of claim 1, wherein the plurality of slots comprises multiple angled slots. 15. The system of claim 14, wherein three of the angled slots intersect at 120 degree angles. 16. The system of claim 1, wherein the sense electrode comprises a folded strip electrode. 17. The system of claim 16, wherein the length of the folded strip electrode is longer than the length of the perimeter of the sense electrode. 18. The system of claim 16, wherein the folded strip electrode substantially forms a square wave pattern, a spiral pattern, a T-slot pattern, a Y-slot pattern, or a recessed slot pattern. 19. The system of claim 1, further comprising:
a second sense electrode disposed on the substrate in the first plane, wherein a second capacitive sensing element is formed between one or more components of the MEMS device layer and the second sense electrode; and processing circuitry coupled to the sense electrode and the second sense electrode to receive a first signal from the sense electrode and a second signal from the second sense electrode, the processing circuitry configured to combine the first signal and the second signal to output a signal responsive to movement of at least a portion of the MEMS device layer along the first axis. 20. A system for performing capacitive sensing, the system comprising:
a substrate located in a first plane; an electrode shield located on the first plane, wherein the electrode shield is formed of a first conductive material; and a plurality of sense electrodes disposed on the substrate in the first plane, wherein each of the plurality of sense electrodes is located adjacent to at least a portion of the electrode shield in the first plane, wherein each of the sense electrodes comprises a folded strip electrode, and wherein the length of the folded strip electrode is longer than the length of the perimeter of the sense electrode. 21. The system of claim 20, wherein the electrode shield comprises a plurality of slots that substantially extend between two non-adjacent sides of the electrode shield. 22. A method comprising:
applying, by one or more drive electrodes of a MEMS inertial sensor, a force to a suspended component of the MEMS inertial sensor; determining, by processing circuitry, a measured value corresponding to movement of the suspended component relative to a sense electrode of the MEMS inertial sensor as a result of the applied force; comparing, by the processing circuitry, the measured value to a baseline value for the applied force; identifying, by the processing circuitry, operational data associated with the MEMS inertial sensor, wherein the operational data is related to time in service of the MEMS inertial sensor, run time for the MEMS inertial sensor, or temperature of the MEMS inertial sensor; modifying, by the processing circuitry, the operation of the MEMS inertial sensor based on the comparison and the operational data, wherein the modification is related to a condition of the sense electrode. | 2,800 |
12,040 | 12,040 | 15,964,916 | 2,846 | Conduction band control schemes are presented for reducing noise and/or lower harmonics in power tools. A controller in the tool is interfaced with a plurality of motor switches and, for each phase, operates to output a pulse-width modulated (PWM) signal to one or more of the motor switches to control power supplied to the electric motor. The controller is also configured to monitor a parameter indicative of the load on the motor. In response to detecting a load greater than a threshold, the controller controls power output of the motor by setting conduction band of the motor switches and the advance angle to baseline values predetermined values. In response to detecting a load less than the threshold, the controller reduces at least one of the conduction band and the advance angle to a value less than the baseline values. | 1. A power tool, comprising:
a brushless direct current (BLDC) motor having a stator defining a plurality of phases; a switching arrangement having a plurality of motor switches connected electrically between a power source and the BLDC motor and operates to deliver power to the BLDC motor; and a controller interfaced with the plurality of motor switches and, for each phase, operates to output a pulse-width modulated (PWM) signal to one or more of the plurality of motor switches to control power supplied to the BLDC motor, wherein the controller is configured to monitor a parameter indicative of load on the BLDC motor and, in response to the parameter being indicative of the load exceeding a threshold, controlling power output of the BLDC motor by setting conduction band of the plurality of motor switches and advance angle to baseline values, and in response to the parameter being indicative of the load being less than the threshold, reducing at least one of the conduction band and the advance angle to a value less than the corresponding baseline value. 2. The power tool of claim 1 wherein the controller is configured to measure rotational speed of the BDLC motor and compare the measured rotational speed to a target speed. 3. The power tool of claim 2, wherein the parameter corresponds to a difference between the measured rotational speed and the target speed. 4. The power tool of claim 1 wherein the controller, in response to detecting the parameter is less than the threshold, sets the value of the advance angle to zero. 5. The power tool of claim 4 the controller, in response to the parameter exceeding the threshold, maintains speed of the BDLC motor at a target speed using closed loop control. 6. The power tool of claim 1, wherein the controller receives positional signals associated with the motor from a plurality of positional sensors mechanically positioned at an angle with respect to the motor to achieve a mechanical advance angle, and in response to detecting the parameter is less than the threshold, the controller shifts the conduction band for each phase to counteract the mechanical advance angle. 7. The power tool of claim 1 wherein the controller is configured to determine tool startup and control power output of the BLDC motor by setting conduction band of the plurality of motor switches and advance angle to the baseline values during tool startup. 8. The power tool of claim 1 wherein the controller, in response to detecting a no load condition, decreases the conduction band for each phase to a value less than the predetermined value while maintain the duty cycle of the PWM signals at a fixed value to achieve a desired speed. 9. A power tool, comprising:
a brushless direct current (BLDC) motor having a stator defining a plurality of phases; a switching arrangement having a plurality of motor switches connected electrically between a power source and the BLDC motor and operates to deliver power to the BLDC motor; and a controller interfaced with the plurality of motor switches and, for each phase, operates to output a pulse-width modulated (PWM) signal to one or more of the plurality of motor switches to control power supplied to the BLDC motor, wherein the controller is configured to monitor a parameter indicative of the load on the BLDC motor and, in response to detecting the parameter being indicative that the load is greater than a threshold, controlling power output of the BLDC motor by setting conduction band of the plurality of motor switches and advance angle at predetermined values, and in response to detecting the parameter being indicative that the load is less than the threshold, sets the value of the advance angle to zero, thereby reducing noise during low load condition. 10. The power tool of claim 9 wherein the controller determines load on the BLDC motor by comparing a measured rotational speed of the BLDC motor with a target speed. 11. The power tool of claim 9 wherein the BLDC motor is configured to operate in three phases and the controller, in response to detecting the parameter is greater than the threshold, sets the conduction band to 120 degrees for each phase and the advance angle to 30 degrees for each phase. 12. A power tool, comprising:
a brushless direct current (BLDC) motor having a stator defining a plurality of phases; a switching arrangement having a plurality of motor switches connected electrically between a power source and the BLDC motor and operates to deliver power to the BLDC motor; and a controller interfaced with the plurality of motor switches and, for each phase, operates to output a pulse-width modulated (PWM) signal having a duty cycle to one or more of the plurality of motor switches to control power supplied to the BLDC motor, wherein the controller is configured to monitor a parameter indicative of load on the BLDC motor and, in response to detecting a load, controlling power output of the BLDC motor by setting conduction band of the plurality of motor switches and advance angle at predetermined values, and in response to detecting a no load condition, decreasing the conduction band for each phase to a value less than the predetermined value while maintain the duty cycle of the PWM signals at a fixed maximum value to achieve a target speed. 13. The power tool of claim 12 wherein the controller determines load on the BLDC motor by comparing a measured rotational speed of the BLDC motor with the target speed. 14. The power tool of claim 13, wherein the parameter corresponds to a difference between the measured rotational speed and the target speed. 15. The power tool of claim 14 wherein the controller determines a no load condition in response to the difference between the measured rotational speed and the target speed being less than a predetermined value. 16. The power tool of claim 12 wherein the controller maintain the duty cycle of the PWM signal at 100 percent. 17. The power tool of claim 12 wherein the controller, in response to detecting a no load condition, adjusts the conduction band for each phase to achieve a constant speed. 18. The power tool of claim 17 wherein the BLDC motor is configured to operate in three phases and the controller, in response to detecting a load greater than the threshold, sets the conduction band to 120 degrees for each phase and the advance angle to 30 degrees for each phase. 19. The power tool of claim 12 wherein the controller, in response to detecting a load greater than the threshold, maintains speed of the BDLC motor at a target speed by adjusting the duty cycle of the motor control signals. 20. A power tool comprising:
a brushless direct current (BLDC) motor having a stator defining a plurality of phases; a switching arrangement having a plurality of motor switches connected electrically between a power source and the BLDC motor and operates to deliver power to the BLDC motor; a controller interfaced with the plurality of motor switches and, for each phase, operates to output a pulse-width modulated (PWM) signal having a duty cycle to one or more of the plurality of motor switches to control power supplied to the BLDC motor, wherein the controller is configured to monitor a parameter indicative of load on the BLDC motor and, in response to detecting a load, maintains speed of the BDLC motor at a target speed using closed loop control and, in response to detecting a no load condition, maintains speed of the BDLC motor at the target speed using open loop control. 21. The power tool of claim 12, wherein in response to detecting a load, the controller maintains speed of the BDLC motor by adjusting at least one of the duty cycle of the PWM signals, the conduction band of the plurality of motor switches, and the advance angle based on a difference between a measured rotational speed of the BLDC motor and the target speed. | Conduction band control schemes are presented for reducing noise and/or lower harmonics in power tools. A controller in the tool is interfaced with a plurality of motor switches and, for each phase, operates to output a pulse-width modulated (PWM) signal to one or more of the motor switches to control power supplied to the electric motor. The controller is also configured to monitor a parameter indicative of the load on the motor. In response to detecting a load greater than a threshold, the controller controls power output of the motor by setting conduction band of the motor switches and the advance angle to baseline values predetermined values. In response to detecting a load less than the threshold, the controller reduces at least one of the conduction band and the advance angle to a value less than the baseline values.1. A power tool, comprising:
a brushless direct current (BLDC) motor having a stator defining a plurality of phases; a switching arrangement having a plurality of motor switches connected electrically between a power source and the BLDC motor and operates to deliver power to the BLDC motor; and a controller interfaced with the plurality of motor switches and, for each phase, operates to output a pulse-width modulated (PWM) signal to one or more of the plurality of motor switches to control power supplied to the BLDC motor, wherein the controller is configured to monitor a parameter indicative of load on the BLDC motor and, in response to the parameter being indicative of the load exceeding a threshold, controlling power output of the BLDC motor by setting conduction band of the plurality of motor switches and advance angle to baseline values, and in response to the parameter being indicative of the load being less than the threshold, reducing at least one of the conduction band and the advance angle to a value less than the corresponding baseline value. 2. The power tool of claim 1 wherein the controller is configured to measure rotational speed of the BDLC motor and compare the measured rotational speed to a target speed. 3. The power tool of claim 2, wherein the parameter corresponds to a difference between the measured rotational speed and the target speed. 4. The power tool of claim 1 wherein the controller, in response to detecting the parameter is less than the threshold, sets the value of the advance angle to zero. 5. The power tool of claim 4 the controller, in response to the parameter exceeding the threshold, maintains speed of the BDLC motor at a target speed using closed loop control. 6. The power tool of claim 1, wherein the controller receives positional signals associated with the motor from a plurality of positional sensors mechanically positioned at an angle with respect to the motor to achieve a mechanical advance angle, and in response to detecting the parameter is less than the threshold, the controller shifts the conduction band for each phase to counteract the mechanical advance angle. 7. The power tool of claim 1 wherein the controller is configured to determine tool startup and control power output of the BLDC motor by setting conduction band of the plurality of motor switches and advance angle to the baseline values during tool startup. 8. The power tool of claim 1 wherein the controller, in response to detecting a no load condition, decreases the conduction band for each phase to a value less than the predetermined value while maintain the duty cycle of the PWM signals at a fixed value to achieve a desired speed. 9. A power tool, comprising:
a brushless direct current (BLDC) motor having a stator defining a plurality of phases; a switching arrangement having a plurality of motor switches connected electrically between a power source and the BLDC motor and operates to deliver power to the BLDC motor; and a controller interfaced with the plurality of motor switches and, for each phase, operates to output a pulse-width modulated (PWM) signal to one or more of the plurality of motor switches to control power supplied to the BLDC motor, wherein the controller is configured to monitor a parameter indicative of the load on the BLDC motor and, in response to detecting the parameter being indicative that the load is greater than a threshold, controlling power output of the BLDC motor by setting conduction band of the plurality of motor switches and advance angle at predetermined values, and in response to detecting the parameter being indicative that the load is less than the threshold, sets the value of the advance angle to zero, thereby reducing noise during low load condition. 10. The power tool of claim 9 wherein the controller determines load on the BLDC motor by comparing a measured rotational speed of the BLDC motor with a target speed. 11. The power tool of claim 9 wherein the BLDC motor is configured to operate in three phases and the controller, in response to detecting the parameter is greater than the threshold, sets the conduction band to 120 degrees for each phase and the advance angle to 30 degrees for each phase. 12. A power tool, comprising:
a brushless direct current (BLDC) motor having a stator defining a plurality of phases; a switching arrangement having a plurality of motor switches connected electrically between a power source and the BLDC motor and operates to deliver power to the BLDC motor; and a controller interfaced with the plurality of motor switches and, for each phase, operates to output a pulse-width modulated (PWM) signal having a duty cycle to one or more of the plurality of motor switches to control power supplied to the BLDC motor, wherein the controller is configured to monitor a parameter indicative of load on the BLDC motor and, in response to detecting a load, controlling power output of the BLDC motor by setting conduction band of the plurality of motor switches and advance angle at predetermined values, and in response to detecting a no load condition, decreasing the conduction band for each phase to a value less than the predetermined value while maintain the duty cycle of the PWM signals at a fixed maximum value to achieve a target speed. 13. The power tool of claim 12 wherein the controller determines load on the BLDC motor by comparing a measured rotational speed of the BLDC motor with the target speed. 14. The power tool of claim 13, wherein the parameter corresponds to a difference between the measured rotational speed and the target speed. 15. The power tool of claim 14 wherein the controller determines a no load condition in response to the difference between the measured rotational speed and the target speed being less than a predetermined value. 16. The power tool of claim 12 wherein the controller maintain the duty cycle of the PWM signal at 100 percent. 17. The power tool of claim 12 wherein the controller, in response to detecting a no load condition, adjusts the conduction band for each phase to achieve a constant speed. 18. The power tool of claim 17 wherein the BLDC motor is configured to operate in three phases and the controller, in response to detecting a load greater than the threshold, sets the conduction band to 120 degrees for each phase and the advance angle to 30 degrees for each phase. 19. The power tool of claim 12 wherein the controller, in response to detecting a load greater than the threshold, maintains speed of the BDLC motor at a target speed by adjusting the duty cycle of the motor control signals. 20. A power tool comprising:
a brushless direct current (BLDC) motor having a stator defining a plurality of phases; a switching arrangement having a plurality of motor switches connected electrically between a power source and the BLDC motor and operates to deliver power to the BLDC motor; a controller interfaced with the plurality of motor switches and, for each phase, operates to output a pulse-width modulated (PWM) signal having a duty cycle to one or more of the plurality of motor switches to control power supplied to the BLDC motor, wherein the controller is configured to monitor a parameter indicative of load on the BLDC motor and, in response to detecting a load, maintains speed of the BDLC motor at a target speed using closed loop control and, in response to detecting a no load condition, maintains speed of the BDLC motor at the target speed using open loop control. 21. The power tool of claim 12, wherein in response to detecting a load, the controller maintains speed of the BDLC motor by adjusting at least one of the duty cycle of the PWM signals, the conduction band of the plurality of motor switches, and the advance angle based on a difference between a measured rotational speed of the BLDC motor and the target speed. | 2,800 |
12,041 | 12,041 | 16,001,314 | 2,875 | An indoor illumination lamp includes a housing to be attached to an interior ceiling of a vehicle and provided with an opening, an interior light lens arranged at the opening of the housing, a chamber provided in the housing and surrounding the opening where the interior light lens is arranged, a light emitting diode arranged at a corner of the chamber and capable of emitting light toward the interior light lens, and a reflector arranged on an inner face in the chamber. | 1. An indoor illumination lamp, comprising:
a housing to be attached to an interior ceiling of a vehicle and provided with an opening; a lens arranged at the opening of the housing; a chamber provided in the housing and surrounding the opening where the lens is arranged; a light emitting diode arranged at a corner of the chamber and capable of emitting light toward the lens; and a reflector arranged on an inner face in the chamber. 2. The indoor illumination lamp according to claim 1, wherein
the reflector is formed at a flat face part parallel to a plane of the lens, in an area of a ceiling face close to the light emitting diode, and at an inclined face part inclined with respect to the plane of the lens, in an area of the ceiling face far from the light emitting diode. 3. The indoor illumination lamp according to claim 1, wherein
the reflector is arranged over an entire inner face of the chamber. 4. The indoor illumination lamp according to claim 2, wherein
the reflector is arranged over an entire inner face of the chamber. 5. The indoor illumination lamp according to claim 2, wherein
the reflector comprises a surrounding rib on an outer face of the inclined face part. | An indoor illumination lamp includes a housing to be attached to an interior ceiling of a vehicle and provided with an opening, an interior light lens arranged at the opening of the housing, a chamber provided in the housing and surrounding the opening where the interior light lens is arranged, a light emitting diode arranged at a corner of the chamber and capable of emitting light toward the interior light lens, and a reflector arranged on an inner face in the chamber.1. An indoor illumination lamp, comprising:
a housing to be attached to an interior ceiling of a vehicle and provided with an opening; a lens arranged at the opening of the housing; a chamber provided in the housing and surrounding the opening where the lens is arranged; a light emitting diode arranged at a corner of the chamber and capable of emitting light toward the lens; and a reflector arranged on an inner face in the chamber. 2. The indoor illumination lamp according to claim 1, wherein
the reflector is formed at a flat face part parallel to a plane of the lens, in an area of a ceiling face close to the light emitting diode, and at an inclined face part inclined with respect to the plane of the lens, in an area of the ceiling face far from the light emitting diode. 3. The indoor illumination lamp according to claim 1, wherein
the reflector is arranged over an entire inner face of the chamber. 4. The indoor illumination lamp according to claim 2, wherein
the reflector is arranged over an entire inner face of the chamber. 5. The indoor illumination lamp according to claim 2, wherein
the reflector comprises a surrounding rib on an outer face of the inclined face part. | 2,800 |
12,042 | 12,042 | 13,338,644 | 2,872 | Certain example embodiments of this invention relate to sputtered aluminum second surface mirrors with permanent protective coatings optionally provided thereto, and/or methods of making the same. A mirror coating supported by a substrate may include, for example, first and second silicon-inclusive layers sandwiching a metallic or substantially metallic layer including aluminum, and an optional layer including Ni and/or Cr in direct contact with the metallic or substantially metallic layer comprising aluminum. A protective film is disposed directly over and contacting an outermost layer of the mirror coating, with the protective film having a peel strength of 200-500 cN/20 mm wide strip. The protective film is adapted to survive seven day exposure to an 85 degree C. temperature at 85% relative humidity, as well as seven day exposure to a 49 degree C. temperature at 100% relative humidity. | 1. A mirror, comprising:
a substrate; a multilayer thin film coating supported by the substrate, the multilayer thin film coating comprising, in order moving away from the substrate:
a first silicon-inclusive layer,
a metallic or substantially metallic layer comprising aluminum,
a 5-150 angstrom thick layer comprising Ni and/or Cr in direct contact with the metallic or substantially metallic layer comprising aluminum, and
a second silicon-inclusive layer in direct contact with the layer comprising Ni and/or Cr; and
a protective film disposed directly over and contacting an outermost layer of the multilayer thin film coating, the protective film having a peel strength of 200-500 cN/20 mm wide strip, wherein the protective film is adapted to survive seven day exposure to an 85 degree C. temperature at 85% relative humidity, as well as seven day exposure to a 49 degree C. temperature at 100% relative humidity. 2. A coated article, comprising:
a substrate; a multilayer thin film coating supported by the substrate, the multilayer thin film coating comprising a metallic or substantially metallic layer comprising aluminum sandwiched between inner and outer silicon-inclusive layers; and a protective film disposed directly over and contacting an outermost layer of the multilayer thin film coating. 3. The coated article of claim 2, wherein the protective film has a peel strength of 200-500 cN/20 mm wide strip. 4. The coated article of claim 2, wherein the protective film is capable of surviving seven day exposure to an 85 degree C. temperature at 85% relative humidity, as well as seven day exposure to a 49 degree C. temperature at 100% relative humidity. 5. The coated article of claim 2, wherein a layer comprising Ni and/or Cr is interposed between the metallic or substantially metallic layer comprising aluminum and the outer silicon-inclusive layer. 6. The coated article of claim 2, wherein the inner and outer silicon-inclusive layers each comprise silicon nitride. 7. The coated article of claim 2, wherein the inner and outer silicon-inclusive layers are less than 100 angstroms thick and 70-200 angstroms thick, respectively, and wherein the metallic or substantially metallic layer comprising aluminum is 250-650 angstroms thick. 8. The coated article of claim 2, wherein a layer comprising NiCr is interposed between the metallic or substantially metallic layer comprising aluminum and the outer silicon-inclusive layer, and wherein the layer comprising NiCr is 5-20 angstroms thick. 9. The coated article of claim 2, wherein the coated article has a glass side reflectance of at least 76%. 10. The coated article of claim 2, wherein the coated article has a glass side reflectance of at least 82%. 11. A method of making a coated article, the method comprising:
sputter-depositing on a glass substrate a coating comprising at least the following layers in the following order:
a first silicon-inclusive layer,
a metallic or substantially metallic layer comprising aluminum, and
a second silicon-inclusive layer; and
applying a protective film directly over and contacting an outermost layer of the coating, the protective film having a peel strength of 200-500 cN/20 mm wide strip. 12. The method of claim 11, wherein the protective film is adapted to survive seven day exposure to an 85 degree C. temperature at 85% relative humidity, as well as seven day exposure to a 49 degree C. temperature at 100% relative humidity, with no evidence of delamination of the protective film and no evidence of deterioration of the coating. 13. The method of claim 11, wherein a layer comprising Ni and/or Cr is sputter-deposited between the metallic or substantially metallic layer comprising aluminum and the second silicon-inclusive layer. 14. The method of claim 11, wherein the first and second silicon-inclusive layers each comprise silicon nitride. 15. The method of claim 11, wherein the first and second silicon-inclusive layers are less than 100 angstroms thick and 70-200 angstroms thick, respectively, and wherein the metallic or substantially metallic layer comprising aluminum is 250-650 angstroms thick. 16. The method of claim 11, wherein a layer comprising NiCr is sputter-deposited between the metallic or substantially metallic layer comprising aluminum and the second silicon-inclusive layer, and wherein the layer comprising NiCr is 5-150 angstroms thick. 17. The method of claim 16, wherein the layer comprising NiCr is 5-20 angstroms thick and the protective film is opaque. 18. The method of claim 16, wherein the layer comprising NiCr is 50-150 angstroms thick and the protective film is transparent. 19. The method of claim 16, wherein the first and second silicon-inclusive layers each comprise silicon nitride. 20. The coated article of claim 11, wherein the coated article has a glass side reflectance of at least 76%. 21. The coated article of claim 11, wherein the coated article has a glass side reflectance of at least 82%. 22. A method of making mirrors, the method comprising:
receiving, at a fabricator location, a coated article made in accordance with the method of claim 11; and cutting the coated article into pieces of one or more respective desired sizes in making the mirrors. | Certain example embodiments of this invention relate to sputtered aluminum second surface mirrors with permanent protective coatings optionally provided thereto, and/or methods of making the same. A mirror coating supported by a substrate may include, for example, first and second silicon-inclusive layers sandwiching a metallic or substantially metallic layer including aluminum, and an optional layer including Ni and/or Cr in direct contact with the metallic or substantially metallic layer comprising aluminum. A protective film is disposed directly over and contacting an outermost layer of the mirror coating, with the protective film having a peel strength of 200-500 cN/20 mm wide strip. The protective film is adapted to survive seven day exposure to an 85 degree C. temperature at 85% relative humidity, as well as seven day exposure to a 49 degree C. temperature at 100% relative humidity.1. A mirror, comprising:
a substrate; a multilayer thin film coating supported by the substrate, the multilayer thin film coating comprising, in order moving away from the substrate:
a first silicon-inclusive layer,
a metallic or substantially metallic layer comprising aluminum,
a 5-150 angstrom thick layer comprising Ni and/or Cr in direct contact with the metallic or substantially metallic layer comprising aluminum, and
a second silicon-inclusive layer in direct contact with the layer comprising Ni and/or Cr; and
a protective film disposed directly over and contacting an outermost layer of the multilayer thin film coating, the protective film having a peel strength of 200-500 cN/20 mm wide strip, wherein the protective film is adapted to survive seven day exposure to an 85 degree C. temperature at 85% relative humidity, as well as seven day exposure to a 49 degree C. temperature at 100% relative humidity. 2. A coated article, comprising:
a substrate; a multilayer thin film coating supported by the substrate, the multilayer thin film coating comprising a metallic or substantially metallic layer comprising aluminum sandwiched between inner and outer silicon-inclusive layers; and a protective film disposed directly over and contacting an outermost layer of the multilayer thin film coating. 3. The coated article of claim 2, wherein the protective film has a peel strength of 200-500 cN/20 mm wide strip. 4. The coated article of claim 2, wherein the protective film is capable of surviving seven day exposure to an 85 degree C. temperature at 85% relative humidity, as well as seven day exposure to a 49 degree C. temperature at 100% relative humidity. 5. The coated article of claim 2, wherein a layer comprising Ni and/or Cr is interposed between the metallic or substantially metallic layer comprising aluminum and the outer silicon-inclusive layer. 6. The coated article of claim 2, wherein the inner and outer silicon-inclusive layers each comprise silicon nitride. 7. The coated article of claim 2, wherein the inner and outer silicon-inclusive layers are less than 100 angstroms thick and 70-200 angstroms thick, respectively, and wherein the metallic or substantially metallic layer comprising aluminum is 250-650 angstroms thick. 8. The coated article of claim 2, wherein a layer comprising NiCr is interposed between the metallic or substantially metallic layer comprising aluminum and the outer silicon-inclusive layer, and wherein the layer comprising NiCr is 5-20 angstroms thick. 9. The coated article of claim 2, wherein the coated article has a glass side reflectance of at least 76%. 10. The coated article of claim 2, wherein the coated article has a glass side reflectance of at least 82%. 11. A method of making a coated article, the method comprising:
sputter-depositing on a glass substrate a coating comprising at least the following layers in the following order:
a first silicon-inclusive layer,
a metallic or substantially metallic layer comprising aluminum, and
a second silicon-inclusive layer; and
applying a protective film directly over and contacting an outermost layer of the coating, the protective film having a peel strength of 200-500 cN/20 mm wide strip. 12. The method of claim 11, wherein the protective film is adapted to survive seven day exposure to an 85 degree C. temperature at 85% relative humidity, as well as seven day exposure to a 49 degree C. temperature at 100% relative humidity, with no evidence of delamination of the protective film and no evidence of deterioration of the coating. 13. The method of claim 11, wherein a layer comprising Ni and/or Cr is sputter-deposited between the metallic or substantially metallic layer comprising aluminum and the second silicon-inclusive layer. 14. The method of claim 11, wherein the first and second silicon-inclusive layers each comprise silicon nitride. 15. The method of claim 11, wherein the first and second silicon-inclusive layers are less than 100 angstroms thick and 70-200 angstroms thick, respectively, and wherein the metallic or substantially metallic layer comprising aluminum is 250-650 angstroms thick. 16. The method of claim 11, wherein a layer comprising NiCr is sputter-deposited between the metallic or substantially metallic layer comprising aluminum and the second silicon-inclusive layer, and wherein the layer comprising NiCr is 5-150 angstroms thick. 17. The method of claim 16, wherein the layer comprising NiCr is 5-20 angstroms thick and the protective film is opaque. 18. The method of claim 16, wherein the layer comprising NiCr is 50-150 angstroms thick and the protective film is transparent. 19. The method of claim 16, wherein the first and second silicon-inclusive layers each comprise silicon nitride. 20. The coated article of claim 11, wherein the coated article has a glass side reflectance of at least 76%. 21. The coated article of claim 11, wherein the coated article has a glass side reflectance of at least 82%. 22. A method of making mirrors, the method comprising:
receiving, at a fabricator location, a coated article made in accordance with the method of claim 11; and cutting the coated article into pieces of one or more respective desired sizes in making the mirrors. | 2,800 |
12,043 | 12,043 | 15,457,736 | 2,822 | A semiconductor device has a plurality of semiconductor die. A first prefabricated insulating film is disposed over the semiconductor die. A conductive layer is formed over the first prefabricated insulating film. An interconnect structure is formed over the semiconductor die and first prefabricated insulating film. The first prefabricated insulating film is laminated over the semiconductor die. The first prefabricated insulating film includes glass cloth, glass fiber, or glass fillers. The semiconductor die is embedded within the first prefabricated insulating film with the first prefabricated insulating film covering first and side surfaces of the semiconductor die. The interconnect structure is formed over a second surface of the semiconductor die opposite the first surface. A portion of the first prefabricated insulating film is removed after disposing the first prefabricated insulating film over the semiconductor die. A second prefabricated insulating film is disposed over the first prefabricated insulating film. | 1. A method of making a semiconductor device, comprising:
providing a first reinforced insulating film; disposing a conductive layer over the first reinforced insulating film; providing a semiconductor die; disposing the semiconductor die on a carrier; laminating the first reinforced insulating film over the semiconductor die and carrier; and forming an interconnect structure over the semiconductor die and first reinforced insulating film opposite the conductive layer. 2. The method of claim 1, further including disposing the semiconductor die on the carrier with an active surface of the semiconductor die oriented toward the carrier. 3. The method of claim 2, wherein a surface of the first reinforced insulating film is coplanar with the active surface of the semiconductor die after laminating the first reinforced insulating film over the semiconductor die and carrier. 4. The method of claim 1, wherein the first reinforced insulating film includes glass cloth, glass fiber, or glass fillers. 5. The method of claim 1, further including disposing a laminating layer over the first reinforced insulating film opposite the conductive layer prior to laminating the first reinforced insulating film over the semiconductor die and carrier. 6. The method of claim 1, wherein forming the interconnect structure includes:
forming a first insulating layer over the semiconductor die and first reinforced insulating film; forming a second insulating layer over the first insulating layer; forming a plurality of openings through the first insulating layer and second insulating layer to expose the semiconductor die; and forming a conductive layer within the openings of the first insulating layer and second insulating layer. 7. A method of making a semiconductor device, comprising:
providing a first reinforced insulating film; disposing a conductive layer over the first reinforced insulating film; providing a semiconductor die; disposing the semiconductor die on a carrier; and laminating the first reinforced insulating film over the semiconductor die and carrier. 8. The method of claim 7, wherein the first insulating film is a multilayered reinforced film. 9. The method of claim 7, wherein the conductive layer is a copper foil. 10. The method of claim 7, further including laminating the first reinforced insulating film using a thermocompression process. 11. The method of claim 7, further including disposing a laminating film over the first reinforced insulating film. 12. The method of claim 7, further including forming a fan-out interconnect structure over the semiconductor die and first reinforced insulating film. 13. The method of claim 7, wherein a surface of the first reinforced insulating film is coplanar with an active surface of the semiconductor die. 14. A method of making a semiconductor device, comprising:
providing a semiconductor die; providing a first reinforced insulating film; forming a conductive layer over the first reinforced insulating film; and laminating the first reinforced insulating film over the semiconductor die after forming the conductive layer. 15. The method of claim 14, further including forming an interconnect structure over the semiconductor die after laminating the first reinforced insulating film over the semiconductor die. 16. The method of claim 15, wherein the interconnect structure includes a redistribution layer. 17. The method of claim 14, wherein laminating the first reinforced insulating film over the semiconductor die includes:
providing a vacuum hot press over the semiconductor die; embedding the semiconductor die within the first reinforced insulating film using the vacuum hot press; and curing the first insulating film with the semiconductor die embedded in the first reinforced insulating film. 18. The method of claim 14, wherein a surface of the first reinforced insulating film is coplanar with an active surface of the semiconductor die after laminating the first reinforced insulating film over the semiconductor die. 19. The method of claim 14, further including disposing a second reinforced insulating film over the first reinforced insulating film. 20. A method of making a semiconductor device, comprising:
providing a semiconductor die; providing a first reinforced insulating film; and laminating the first reinforced insulating film over the semiconductor die. 21. The method of claim 20, further including forming a redistribution layer over the semiconductor die after laminating the first reinforced insulating film over the semiconductor die. 22. The method of claim 20, further including disposing a second reinforced insulating film over the first reinforced insulating film. 23. The method of claim 20, further including disposing a conductive layer over the first reinforced insulating film. 24. The method of claim 20, wherein the first reinforced insulating film includes glass fibers, cloth, or fillers. 25. The method of claim 20, wherein the first reinforced insulating film is prefabricated. | A semiconductor device has a plurality of semiconductor die. A first prefabricated insulating film is disposed over the semiconductor die. A conductive layer is formed over the first prefabricated insulating film. An interconnect structure is formed over the semiconductor die and first prefabricated insulating film. The first prefabricated insulating film is laminated over the semiconductor die. The first prefabricated insulating film includes glass cloth, glass fiber, or glass fillers. The semiconductor die is embedded within the first prefabricated insulating film with the first prefabricated insulating film covering first and side surfaces of the semiconductor die. The interconnect structure is formed over a second surface of the semiconductor die opposite the first surface. A portion of the first prefabricated insulating film is removed after disposing the first prefabricated insulating film over the semiconductor die. A second prefabricated insulating film is disposed over the first prefabricated insulating film.1. A method of making a semiconductor device, comprising:
providing a first reinforced insulating film; disposing a conductive layer over the first reinforced insulating film; providing a semiconductor die; disposing the semiconductor die on a carrier; laminating the first reinforced insulating film over the semiconductor die and carrier; and forming an interconnect structure over the semiconductor die and first reinforced insulating film opposite the conductive layer. 2. The method of claim 1, further including disposing the semiconductor die on the carrier with an active surface of the semiconductor die oriented toward the carrier. 3. The method of claim 2, wherein a surface of the first reinforced insulating film is coplanar with the active surface of the semiconductor die after laminating the first reinforced insulating film over the semiconductor die and carrier. 4. The method of claim 1, wherein the first reinforced insulating film includes glass cloth, glass fiber, or glass fillers. 5. The method of claim 1, further including disposing a laminating layer over the first reinforced insulating film opposite the conductive layer prior to laminating the first reinforced insulating film over the semiconductor die and carrier. 6. The method of claim 1, wherein forming the interconnect structure includes:
forming a first insulating layer over the semiconductor die and first reinforced insulating film; forming a second insulating layer over the first insulating layer; forming a plurality of openings through the first insulating layer and second insulating layer to expose the semiconductor die; and forming a conductive layer within the openings of the first insulating layer and second insulating layer. 7. A method of making a semiconductor device, comprising:
providing a first reinforced insulating film; disposing a conductive layer over the first reinforced insulating film; providing a semiconductor die; disposing the semiconductor die on a carrier; and laminating the first reinforced insulating film over the semiconductor die and carrier. 8. The method of claim 7, wherein the first insulating film is a multilayered reinforced film. 9. The method of claim 7, wherein the conductive layer is a copper foil. 10. The method of claim 7, further including laminating the first reinforced insulating film using a thermocompression process. 11. The method of claim 7, further including disposing a laminating film over the first reinforced insulating film. 12. The method of claim 7, further including forming a fan-out interconnect structure over the semiconductor die and first reinforced insulating film. 13. The method of claim 7, wherein a surface of the first reinforced insulating film is coplanar with an active surface of the semiconductor die. 14. A method of making a semiconductor device, comprising:
providing a semiconductor die; providing a first reinforced insulating film; forming a conductive layer over the first reinforced insulating film; and laminating the first reinforced insulating film over the semiconductor die after forming the conductive layer. 15. The method of claim 14, further including forming an interconnect structure over the semiconductor die after laminating the first reinforced insulating film over the semiconductor die. 16. The method of claim 15, wherein the interconnect structure includes a redistribution layer. 17. The method of claim 14, wherein laminating the first reinforced insulating film over the semiconductor die includes:
providing a vacuum hot press over the semiconductor die; embedding the semiconductor die within the first reinforced insulating film using the vacuum hot press; and curing the first insulating film with the semiconductor die embedded in the first reinforced insulating film. 18. The method of claim 14, wherein a surface of the first reinforced insulating film is coplanar with an active surface of the semiconductor die after laminating the first reinforced insulating film over the semiconductor die. 19. The method of claim 14, further including disposing a second reinforced insulating film over the first reinforced insulating film. 20. A method of making a semiconductor device, comprising:
providing a semiconductor die; providing a first reinforced insulating film; and laminating the first reinforced insulating film over the semiconductor die. 21. The method of claim 20, further including forming a redistribution layer over the semiconductor die after laminating the first reinforced insulating film over the semiconductor die. 22. The method of claim 20, further including disposing a second reinforced insulating film over the first reinforced insulating film. 23. The method of claim 20, further including disposing a conductive layer over the first reinforced insulating film. 24. The method of claim 20, wherein the first reinforced insulating film includes glass fibers, cloth, or fillers. 25. The method of claim 20, wherein the first reinforced insulating film is prefabricated. | 2,800 |
12,044 | 12,044 | 15,120,198 | 2,844 | Various embodiments provide an apparatus and method to detect timing components of a timing system. A processor sends signals to timing components and compares the responses with each other and with stored characteristic responses to detect if a timing component is present, if its characteristics have changed, to identify the connected timing component, and, if communication protocols are used, exchange data. | 1. An apparatus configured to detect a timing component of a timing system, the apparatus comprising:
a connection mechanism configured to connect the timing component to the timing system, the connection mechanism comprising:
a communication component configured to send signals to and receive responses from the connected timing component; and
a processor configured to:
generate the signals;
store the responses to the signals from the connected timing component;
compare each of the responses to at least one of:
a different one or more of the responses, and
stored characteristic component responses; and
determine, based on the comparisons, at least one of:
a connection status of the connected timing component,
an identity of the connected timing component, and
if a characteristic of the connected timing component has changed. 2. The apparatus according to claim 1, wherein at least one of the signals is a step voltage. 3. The apparatus according to claim 1, wherein at least one of the received responses is a step response representing a component signature of the connected timing component. 4. The apparatus according to claim 1, wherein at least one of the sent signals is transmitted according to at least one electronic communication protocol. 5. The apparatus according to claim 1, wherein the sent signals comprise consecutively a step voltage and a signal transmitted according to at least one electronic communication protocol. 6. The apparatus according to claim 4, wherein the at least one electronic communication protocol is used to communicate data, states, and signals. 7. The apparatus according to claim 4, wherein the timing component comprises a processor, and wherein at least one of the received responses is provided by the processor of the timing component to the processor of the connection mechanism according to the at least one electronic communication protocol. 8. The apparatus according to claim 7, wherein the at least one electronic communication protocol is an RS232 protocol. 9. The apparatus according to claim 1, wherein the timing component comprises at least one of a plug and a jack. 10. The apparatus according to claim 9, wherein the timing system comprises at least one of a jack and a plug operable to mate with a corresponding at least one of the plug and the jack of the timing component. 11. The apparatus according to claim 10, wherein the each of the at least one of the jack and the plug of the timing system and the corresponding at least one of the plug and the jack of the timing component comprises a transceiver and an antenna. 12. The apparatus according to claim 11, wherein the transceiver and the antenna of each of the at least one of the jack and the plug of the timing system and the corresponding at least one of the plug and the jack of the timing component communicate according to an RFID protocol. 13. The apparatus according to claim 10, wherein the each of the at least one of the jack and the plug of the timing system and the corresponding at least one of the plug and the jack of the timing component is unique to a type of the timing component. 14. The apparatus according to claim 10, wherein the at least one of the jack and the plug of the timing system is integrated in one or more of:
a connection hub, and a cable harness. 15. The apparatus according to claim 10, wherein the plug is a two-pronged banana plug. 16. The apparatus according to claim 15, comprising circuitry configured for receiving the two-pronged banana plug at the jack in either polarity. 17. The apparatus according to claim 1, wherein the stored characteristic responses comprise a tolerance range having an upper limit and a lower limit. 18. The apparatus according to claim 1, wherein the timing component comprises a switch that is in an open position when providing the responses to the signals. 19. The apparatus according to claim 18, wherein the timing component is one or more of:
a touch pad, a push button, and a start device. 20. The apparatus according to claim 1, wherein the timing component is one or more of:
a speaker, and a relay judging platform (RJP) with a speed light. | Various embodiments provide an apparatus and method to detect timing components of a timing system. A processor sends signals to timing components and compares the responses with each other and with stored characteristic responses to detect if a timing component is present, if its characteristics have changed, to identify the connected timing component, and, if communication protocols are used, exchange data.1. An apparatus configured to detect a timing component of a timing system, the apparatus comprising:
a connection mechanism configured to connect the timing component to the timing system, the connection mechanism comprising:
a communication component configured to send signals to and receive responses from the connected timing component; and
a processor configured to:
generate the signals;
store the responses to the signals from the connected timing component;
compare each of the responses to at least one of:
a different one or more of the responses, and
stored characteristic component responses; and
determine, based on the comparisons, at least one of:
a connection status of the connected timing component,
an identity of the connected timing component, and
if a characteristic of the connected timing component has changed. 2. The apparatus according to claim 1, wherein at least one of the signals is a step voltage. 3. The apparatus according to claim 1, wherein at least one of the received responses is a step response representing a component signature of the connected timing component. 4. The apparatus according to claim 1, wherein at least one of the sent signals is transmitted according to at least one electronic communication protocol. 5. The apparatus according to claim 1, wherein the sent signals comprise consecutively a step voltage and a signal transmitted according to at least one electronic communication protocol. 6. The apparatus according to claim 4, wherein the at least one electronic communication protocol is used to communicate data, states, and signals. 7. The apparatus according to claim 4, wherein the timing component comprises a processor, and wherein at least one of the received responses is provided by the processor of the timing component to the processor of the connection mechanism according to the at least one electronic communication protocol. 8. The apparatus according to claim 7, wherein the at least one electronic communication protocol is an RS232 protocol. 9. The apparatus according to claim 1, wherein the timing component comprises at least one of a plug and a jack. 10. The apparatus according to claim 9, wherein the timing system comprises at least one of a jack and a plug operable to mate with a corresponding at least one of the plug and the jack of the timing component. 11. The apparatus according to claim 10, wherein the each of the at least one of the jack and the plug of the timing system and the corresponding at least one of the plug and the jack of the timing component comprises a transceiver and an antenna. 12. The apparatus according to claim 11, wherein the transceiver and the antenna of each of the at least one of the jack and the plug of the timing system and the corresponding at least one of the plug and the jack of the timing component communicate according to an RFID protocol. 13. The apparatus according to claim 10, wherein the each of the at least one of the jack and the plug of the timing system and the corresponding at least one of the plug and the jack of the timing component is unique to a type of the timing component. 14. The apparatus according to claim 10, wherein the at least one of the jack and the plug of the timing system is integrated in one or more of:
a connection hub, and a cable harness. 15. The apparatus according to claim 10, wherein the plug is a two-pronged banana plug. 16. The apparatus according to claim 15, comprising circuitry configured for receiving the two-pronged banana plug at the jack in either polarity. 17. The apparatus according to claim 1, wherein the stored characteristic responses comprise a tolerance range having an upper limit and a lower limit. 18. The apparatus according to claim 1, wherein the timing component comprises a switch that is in an open position when providing the responses to the signals. 19. The apparatus according to claim 18, wherein the timing component is one or more of:
a touch pad, a push button, and a start device. 20. The apparatus according to claim 1, wherein the timing component is one or more of:
a speaker, and a relay judging platform (RJP) with a speed light. | 2,800 |
12,045 | 12,045 | 15,681,669 | 2,845 | An antenna apparatus having a substrate, an antenna on the substrate, and a power supply circuit element on the substrate and connected to the antenna. The antenna includes coil-shaped first and second coil antenna units respectively having coil axes that intersect with the substrate. The first coil antenna unit and the second coil antenna unit are arranged on the substrate such that a direction in which a current flows through one of the coil antenna units is clockwise and a direction in which the current flows through the other of the coil antenna units is counterclockwise. The power supply circuit element is positioned between the first coil antenna unit and the second coil antenna unit. | 1. An antenna apparatus comprising:
a substrate; a power supply circuit element disposed on the substrate; and an antenna disposed on the substrate and connected to the power supply circuit element, the antenna including a first coil antenna unit and a second coil antenna unit, each antenna unit having a coil axis that intersects with the substrate, the first coil antenna unit and the second coil antenna unit being disposed at respective positions on the substrate such that a direction in which a current flows through one of the coil antenna units is clockwise and a direction in which a current flows through the other of the coil antenna units is counterclockwise, wherein the power supply circuit element is disposed at a position on the substrate and within a region between the first coil antenna unit and the second coil antenna unit. 2. The antenna apparatus according to claim 1, wherein the power supply circuit element includes an RFIC element configured to transmit and receive signals via the antenna. 3. The antenna apparatus according to claim 2, wherein the power supply circuit element includes a matching element that is connected to the antenna and the RFIC element. 4. The antenna apparatus according to claim 2, wherein the power supply circuit element includes a control IC element that is connected to the RFIC element and is configured to control the RFIC element. 5. The antenna apparatus according to claim 4, wherein
the first and second coil antenna units are circular shaped and are disposed in a planar configuration adjacent to each other on the substrate, a region where the first and second coil antenna units are closest to each other in a planar direction of the substrate defines a narrowest region, the RFIC element is disposed at a position on the substrate on one side of the narrowest region, the control IC element is disposed at a position on the substrate at an other side of the narrowest region, such that the RFIC element and the control IC element are disposed on opposite sides of the narrowest region, and a conductor is disposed on the substrate and passes through the narrowest region to connect the RFIC element with the control IC element. 6. The antenna apparatus according to claim 1,
wherein the power supply circuit element includes a conductor-for-signal through which a signal current flows, and a conductor-for-return through which a return current for the signal current flows, and wherein the conductor-for-signal and the conductor-for-return are in parallel with each other, and face each other in a direction perpendicular to the substrate. 7. The antenna apparatus according to claim 1, wherein the first coil antenna unit and the second coil antenna unit are helical-shaped. 8. The antenna apparatus according to claim 1, wherein each of the first and second coil antenna units includes a first coil conductor disposed on a first surface of the substrate on which the power supply circuit element is disposed, a second coil conductor disposed on a second surface of the substrate opposite the first surface, and a bridge conductor extending through the substrate and connecting the first coil conductor to the second coil conductor. 9. The antenna apparatus according to claim 1, wherein a low magnetic flux density region is provided above the substrate at a position where respective magnetic fluxes of the first and the second coil antenna units cancel each other out, and wherein the power supply circuit element is disposed in the low magnetic flux density region. 10. The antenna apparatus according to claim 1, wherein the coil axis of each of the first and second coil antenna units extends in a direction perpendicular to the substrate and each of the first and second coil antenna units comprise symmetric shapes with respect to each other relative to an imaginary plane passing a midpoint of a connecting straight line connecting the respective coil axes. 11. An antenna apparatus comprising:
a substrate; a power supply circuit disposed on the substrate; and an antenna disposed on the substrate and coupled to the power supply circuit, the antenna including a first coil antenna and a second coil antenna, with each coil antenna being coil-shaped and having a coil axis that intersects the substrate, wherein the first coil antenna and the second coil antenna are configured on the substrate such that a current provided by the power supply circuit flows through the first coil antenna in a clockwise direction and flows through the second coil antenna in a counterclockwise direction, and wherein the power supply circuit is positioned on the substrate on an imaginary straight line that is located equidistantly from the coil axis of the first coil antenna and the coil axis of the second coil antenna. 12. The antenna apparatus according to claim 11, wherein the power supply circuit includes an RFIC element configured to transmit and receive signals via the antenna. 13. The antenna apparatus according to claim 12, wherein the power supply circuit includes a matching element that is connected to the antenna and the RFIC element. 14. The antenna apparatus according to claim 12, wherein the power supply circuit includes a control IC element that is connected to the RFIC element and is configured to control the RFIC element. 15. The antenna apparatus according to claim 14, wherein
the first and second coil antennas are circular shaped and are disposed in a planar configuration adjacent to each other on the substrate, a region where the first and second coil antennas are closest to each other in a planar direction of the substrate defines a narrowest region, the RFIC element is disposed at a position on the substrate on one side of the narrowest region, the control IC element is disposed at a position on the substrate at an other side of the narrowest region, such that the RFIC element and the control IC element are disposed on opposite sides of the narrowest region, and a conductor is disposed on the substrate and passes through the narrowest region to connect the RFIC element with the control IC element. 16. The antenna apparatus according to claim 11, wherein each of the first and second coil antennas includes a first coil conductor disposed on a first surface of the substrate on which the power supply circuit is disposed, a second coil conductor disposed on a second surface of the substrate opposite the first surface, and a bridge conductor extending through the substrate and connecting the first coil conductor to the second coil conductor. 17. The antenna apparatus according to claim 11, wherein a low magnetic flux density region is provided above the substrate at a position where respective magnetic fluxes of the first and the second coil antennas cancel each other out, and wherein the power supply circuit is disposed in the low magnetic flux density region. 18. An RFID system comprising:
a product having an RFID tag; and an antenna apparatus that performs wireless communication with the RFID tag of the product, the antenna apparatus including:
a substrate;
a power supply circuit disposed on the substrate; and
an antenna disposed on the substrate and connected to the power supply circuit, the antenna including a first coil antenna unit and a second coil antenna unit, each antenna unit being coil-shaped and having a coil axis that intersects with the substrate, the first coil antenna unit and the second coil antenna unit being disposed at respective positions on the substrate such that a current provided by the power supply circuit flows through the first coil antenna unit in a clockwise direction and flows through the second coil antenna units in a counterclockwise direction, and
wherein the power supply circuit is disposed at a position on the substrate between the first coil antenna unit and the second coil antenna unit. 19. The RFID system according to claim 11, wherein the power supply circuit is positioned on the substrate on an imaginary straight line that is located equidistantly from the coil axis of the first coil antenna unit and the coil axis of the second coil antenna unit. 20. The RFID system according to claim 18, wherein the antenna apparatus includes placement portions on each of which the product is placed, and wherein the placement portions are provided respectively over the first coil antenna unit and the second coil antenna unit when viewed in a direction perpendicular to the substrate. | An antenna apparatus having a substrate, an antenna on the substrate, and a power supply circuit element on the substrate and connected to the antenna. The antenna includes coil-shaped first and second coil antenna units respectively having coil axes that intersect with the substrate. The first coil antenna unit and the second coil antenna unit are arranged on the substrate such that a direction in which a current flows through one of the coil antenna units is clockwise and a direction in which the current flows through the other of the coil antenna units is counterclockwise. The power supply circuit element is positioned between the first coil antenna unit and the second coil antenna unit.1. An antenna apparatus comprising:
a substrate; a power supply circuit element disposed on the substrate; and an antenna disposed on the substrate and connected to the power supply circuit element, the antenna including a first coil antenna unit and a second coil antenna unit, each antenna unit having a coil axis that intersects with the substrate, the first coil antenna unit and the second coil antenna unit being disposed at respective positions on the substrate such that a direction in which a current flows through one of the coil antenna units is clockwise and a direction in which a current flows through the other of the coil antenna units is counterclockwise, wherein the power supply circuit element is disposed at a position on the substrate and within a region between the first coil antenna unit and the second coil antenna unit. 2. The antenna apparatus according to claim 1, wherein the power supply circuit element includes an RFIC element configured to transmit and receive signals via the antenna. 3. The antenna apparatus according to claim 2, wherein the power supply circuit element includes a matching element that is connected to the antenna and the RFIC element. 4. The antenna apparatus according to claim 2, wherein the power supply circuit element includes a control IC element that is connected to the RFIC element and is configured to control the RFIC element. 5. The antenna apparatus according to claim 4, wherein
the first and second coil antenna units are circular shaped and are disposed in a planar configuration adjacent to each other on the substrate, a region where the first and second coil antenna units are closest to each other in a planar direction of the substrate defines a narrowest region, the RFIC element is disposed at a position on the substrate on one side of the narrowest region, the control IC element is disposed at a position on the substrate at an other side of the narrowest region, such that the RFIC element and the control IC element are disposed on opposite sides of the narrowest region, and a conductor is disposed on the substrate and passes through the narrowest region to connect the RFIC element with the control IC element. 6. The antenna apparatus according to claim 1,
wherein the power supply circuit element includes a conductor-for-signal through which a signal current flows, and a conductor-for-return through which a return current for the signal current flows, and wherein the conductor-for-signal and the conductor-for-return are in parallel with each other, and face each other in a direction perpendicular to the substrate. 7. The antenna apparatus according to claim 1, wherein the first coil antenna unit and the second coil antenna unit are helical-shaped. 8. The antenna apparatus according to claim 1, wherein each of the first and second coil antenna units includes a first coil conductor disposed on a first surface of the substrate on which the power supply circuit element is disposed, a second coil conductor disposed on a second surface of the substrate opposite the first surface, and a bridge conductor extending through the substrate and connecting the first coil conductor to the second coil conductor. 9. The antenna apparatus according to claim 1, wherein a low magnetic flux density region is provided above the substrate at a position where respective magnetic fluxes of the first and the second coil antenna units cancel each other out, and wherein the power supply circuit element is disposed in the low magnetic flux density region. 10. The antenna apparatus according to claim 1, wherein the coil axis of each of the first and second coil antenna units extends in a direction perpendicular to the substrate and each of the first and second coil antenna units comprise symmetric shapes with respect to each other relative to an imaginary plane passing a midpoint of a connecting straight line connecting the respective coil axes. 11. An antenna apparatus comprising:
a substrate; a power supply circuit disposed on the substrate; and an antenna disposed on the substrate and coupled to the power supply circuit, the antenna including a first coil antenna and a second coil antenna, with each coil antenna being coil-shaped and having a coil axis that intersects the substrate, wherein the first coil antenna and the second coil antenna are configured on the substrate such that a current provided by the power supply circuit flows through the first coil antenna in a clockwise direction and flows through the second coil antenna in a counterclockwise direction, and wherein the power supply circuit is positioned on the substrate on an imaginary straight line that is located equidistantly from the coil axis of the first coil antenna and the coil axis of the second coil antenna. 12. The antenna apparatus according to claim 11, wherein the power supply circuit includes an RFIC element configured to transmit and receive signals via the antenna. 13. The antenna apparatus according to claim 12, wherein the power supply circuit includes a matching element that is connected to the antenna and the RFIC element. 14. The antenna apparatus according to claim 12, wherein the power supply circuit includes a control IC element that is connected to the RFIC element and is configured to control the RFIC element. 15. The antenna apparatus according to claim 14, wherein
the first and second coil antennas are circular shaped and are disposed in a planar configuration adjacent to each other on the substrate, a region where the first and second coil antennas are closest to each other in a planar direction of the substrate defines a narrowest region, the RFIC element is disposed at a position on the substrate on one side of the narrowest region, the control IC element is disposed at a position on the substrate at an other side of the narrowest region, such that the RFIC element and the control IC element are disposed on opposite sides of the narrowest region, and a conductor is disposed on the substrate and passes through the narrowest region to connect the RFIC element with the control IC element. 16. The antenna apparatus according to claim 11, wherein each of the first and second coil antennas includes a first coil conductor disposed on a first surface of the substrate on which the power supply circuit is disposed, a second coil conductor disposed on a second surface of the substrate opposite the first surface, and a bridge conductor extending through the substrate and connecting the first coil conductor to the second coil conductor. 17. The antenna apparatus according to claim 11, wherein a low magnetic flux density region is provided above the substrate at a position where respective magnetic fluxes of the first and the second coil antennas cancel each other out, and wherein the power supply circuit is disposed in the low magnetic flux density region. 18. An RFID system comprising:
a product having an RFID tag; and an antenna apparatus that performs wireless communication with the RFID tag of the product, the antenna apparatus including:
a substrate;
a power supply circuit disposed on the substrate; and
an antenna disposed on the substrate and connected to the power supply circuit, the antenna including a first coil antenna unit and a second coil antenna unit, each antenna unit being coil-shaped and having a coil axis that intersects with the substrate, the first coil antenna unit and the second coil antenna unit being disposed at respective positions on the substrate such that a current provided by the power supply circuit flows through the first coil antenna unit in a clockwise direction and flows through the second coil antenna units in a counterclockwise direction, and
wherein the power supply circuit is disposed at a position on the substrate between the first coil antenna unit and the second coil antenna unit. 19. The RFID system according to claim 11, wherein the power supply circuit is positioned on the substrate on an imaginary straight line that is located equidistantly from the coil axis of the first coil antenna unit and the coil axis of the second coil antenna unit. 20. The RFID system according to claim 18, wherein the antenna apparatus includes placement portions on each of which the product is placed, and wherein the placement portions are provided respectively over the first coil antenna unit and the second coil antenna unit when viewed in a direction perpendicular to the substrate. | 2,800 |
12,046 | 12,046 | 15,323,836 | 2,894 | Methods and systems for enhancing workflow performance in the oil and gas industry may estimate the properties of drilling muds (e.g., density and/or viscosity) located downhole with methods that utilize real-time data, estimated drilling mud properties, and mathematical models. Further, the methods described herein may optionally account for the uncertainties induced by sensor readings and dynamic modeling. For example, a method may include circulating a drilling mud through a mud circulation system; performing a plurality of measurements from various sensors in a mud circulation system; modeling in real-time drilling mud flow dynamics in the drilling mud using a mathematical dynamics model; predicting physical states of the drilling mud with the mathematical dynamics model, thereby producing model physical state predictions; inputting the measurements into the mathematical dynamics model; and adjusting discrepancies between the model physical state predictions and the measurements using the mathematical dynamics model. | 1. A method comprising:
circulating a drilling mud through a mud circulation system; performing a plurality of measurements from various sensors in a mud circulation system; modeling in real-time drilling mud flow dynamics in the drilling mud using a mathematical dynamics model; predicting physical states of the drilling mud with the mathematical dynamics model, thereby producing model physical state predictions; inputting the measurements into the mathematical dynamics model; and adjusting discrepancies between the model physical state predictions and the measurements using the mathematical dynamics model. 2. The method of claim 1 further comprising:
estimating an uncertainty interval of the plurality of measurements and the mathematical dynamics model; and
updating the uncertainty intervals for the mathematical dynamics model and the measurements, thereby producing an updated mathematical dynamics model. 3. The method of claim 2 further comprising: repeating foregoing steps:
performing, modeling, estimating, and inputting steps with the updated mathematical dynamics model. 4. The method of claim 1 further comprising:
calculating a real-time downhole density of the drilling mud using the updated mathematical dynamics model. 5. The method of claim 1 further comprising:
calculating a real-time downhole viscosity of the drilling mud using the updated mathematical dynamics model. 6. The method of claim 1 further comprising:
calculating a real-time downhole density, a real-time downhole viscosity, or both of the drilling mud using the updated mathematical dynamics model; and
calculating an equivalent circulating density based on the real-time downhole density, the real-time downhole viscosity, or both. 7. The method of claim 6 further comprising:
changing an operational parameter of the mud circulation based on the equivalent circulating density. 8. The method of claim 6 further comprising:
changing a composition of the drilling mud of the mud circulation based on the equivalent circulating density. 9. A system comprising:
a mud circulation system having a drilling mud flowing therethrough; a plurality of sensors coupled to the mud circulation system configured to perform measurements related to the drilling mud; and a non-transitory computer-readable medium configured to receive the measurements and encoded with instructions that, when executed, cause the mud circulation system to perform a method comprising:
modeling in real-time drilling mud flow dynamics in the drilling mud using a mathematical dynamics model;
predicting physical states of the drilling mud with the mathematical dynamics model, thereby producing model physical state predictions;
inputting the measurements into the mathematical dynamics model; and
adjusting discrepancies between the model physical state predictions and the measurements using the mathematical dynamics model. 10. The system of claim 9, wherein the method further comprises: estimating an uncertainty interval of the plurality of measurements and the mathematical dynamics model;
and updating the uncertainty intervals for the mathematical dynamics model and the measurements, thereby producing an updated mathematical dynamics model. 11. The system of claim 10, wherein the method further comprises: repeating foregoing steps: performing, modeling, estimating, and inputting steps with the updated mathematical dynamics model. 12. The system of claim 9, wherein the method further comprises: calculating a real-time downhole density of the drilling mud using the updated mathematical dynamics model. 13. The system of claim 9, wherein the method further comprises: calculating a real-time downhole viscosity of the drilling mud using the updated mathematical dynamics model. 14. The system of claim 9, wherein the method further comprises: calculating a real-time downhole density, a real-time downhole viscosity, or both of the drilling mud using the updated mathematical dynamics model; and calculating an equivalent circulating density based on the real-time downhole density, the real-time downhole viscosity, or both. 15. The system of claim 14, wherein the method further comprises: changing an operational parameter of the mud circulation based on the equivalent circulating density. 16. The system of claim 14, wherein the method further comprises: changing a composition of the drilling mud of the mud circulation based on the equivalent circulating density. 17. A non-transitory computer-readable medium encoded with instructions that, when executed, cause a mud circulation system to perform a method comprising:
receiving a plurality of measurements from a plurality of sensors in the mud circulation system;
modeling in real-time drilling mud flow dynamics in the drilling mud using a mathematical dynamics model;
predicting physical states of the drilling mud with the mathematical dynamics model, thereby producing model physical state predictions;
inputting the measurements into the mathematical dynamics model; and
adjusting discrepancies between the model physical state predictions and the measurements using the mathematical dynamics model. 18. The non-transitory computer-readable medium of claim 17, wherein the method further comprises: estimating an uncertainty interval of the plurality of measurements and the mathematical dynamics model; and updating the uncertainty intervals for the mathematical dynamics model and the measurements, thereby producing an updated mathematical dynamics model. 19. The non-transitory computer-readable medium of claim 17, wherein the method further comprises calculating a real-time downhole density of the drilling mud using the updated mathematical dynamics model. 20. The non-transitory computer-readable medium of claim 17, wherein the method further comprises calculating a real-time downhole viscosity of the drilling mud using the updated mathematical dynamics model. | Methods and systems for enhancing workflow performance in the oil and gas industry may estimate the properties of drilling muds (e.g., density and/or viscosity) located downhole with methods that utilize real-time data, estimated drilling mud properties, and mathematical models. Further, the methods described herein may optionally account for the uncertainties induced by sensor readings and dynamic modeling. For example, a method may include circulating a drilling mud through a mud circulation system; performing a plurality of measurements from various sensors in a mud circulation system; modeling in real-time drilling mud flow dynamics in the drilling mud using a mathematical dynamics model; predicting physical states of the drilling mud with the mathematical dynamics model, thereby producing model physical state predictions; inputting the measurements into the mathematical dynamics model; and adjusting discrepancies between the model physical state predictions and the measurements using the mathematical dynamics model.1. A method comprising:
circulating a drilling mud through a mud circulation system; performing a plurality of measurements from various sensors in a mud circulation system; modeling in real-time drilling mud flow dynamics in the drilling mud using a mathematical dynamics model; predicting physical states of the drilling mud with the mathematical dynamics model, thereby producing model physical state predictions; inputting the measurements into the mathematical dynamics model; and adjusting discrepancies between the model physical state predictions and the measurements using the mathematical dynamics model. 2. The method of claim 1 further comprising:
estimating an uncertainty interval of the plurality of measurements and the mathematical dynamics model; and
updating the uncertainty intervals for the mathematical dynamics model and the measurements, thereby producing an updated mathematical dynamics model. 3. The method of claim 2 further comprising: repeating foregoing steps:
performing, modeling, estimating, and inputting steps with the updated mathematical dynamics model. 4. The method of claim 1 further comprising:
calculating a real-time downhole density of the drilling mud using the updated mathematical dynamics model. 5. The method of claim 1 further comprising:
calculating a real-time downhole viscosity of the drilling mud using the updated mathematical dynamics model. 6. The method of claim 1 further comprising:
calculating a real-time downhole density, a real-time downhole viscosity, or both of the drilling mud using the updated mathematical dynamics model; and
calculating an equivalent circulating density based on the real-time downhole density, the real-time downhole viscosity, or both. 7. The method of claim 6 further comprising:
changing an operational parameter of the mud circulation based on the equivalent circulating density. 8. The method of claim 6 further comprising:
changing a composition of the drilling mud of the mud circulation based on the equivalent circulating density. 9. A system comprising:
a mud circulation system having a drilling mud flowing therethrough; a plurality of sensors coupled to the mud circulation system configured to perform measurements related to the drilling mud; and a non-transitory computer-readable medium configured to receive the measurements and encoded with instructions that, when executed, cause the mud circulation system to perform a method comprising:
modeling in real-time drilling mud flow dynamics in the drilling mud using a mathematical dynamics model;
predicting physical states of the drilling mud with the mathematical dynamics model, thereby producing model physical state predictions;
inputting the measurements into the mathematical dynamics model; and
adjusting discrepancies between the model physical state predictions and the measurements using the mathematical dynamics model. 10. The system of claim 9, wherein the method further comprises: estimating an uncertainty interval of the plurality of measurements and the mathematical dynamics model;
and updating the uncertainty intervals for the mathematical dynamics model and the measurements, thereby producing an updated mathematical dynamics model. 11. The system of claim 10, wherein the method further comprises: repeating foregoing steps: performing, modeling, estimating, and inputting steps with the updated mathematical dynamics model. 12. The system of claim 9, wherein the method further comprises: calculating a real-time downhole density of the drilling mud using the updated mathematical dynamics model. 13. The system of claim 9, wherein the method further comprises: calculating a real-time downhole viscosity of the drilling mud using the updated mathematical dynamics model. 14. The system of claim 9, wherein the method further comprises: calculating a real-time downhole density, a real-time downhole viscosity, or both of the drilling mud using the updated mathematical dynamics model; and calculating an equivalent circulating density based on the real-time downhole density, the real-time downhole viscosity, or both. 15. The system of claim 14, wherein the method further comprises: changing an operational parameter of the mud circulation based on the equivalent circulating density. 16. The system of claim 14, wherein the method further comprises: changing a composition of the drilling mud of the mud circulation based on the equivalent circulating density. 17. A non-transitory computer-readable medium encoded with instructions that, when executed, cause a mud circulation system to perform a method comprising:
receiving a plurality of measurements from a plurality of sensors in the mud circulation system;
modeling in real-time drilling mud flow dynamics in the drilling mud using a mathematical dynamics model;
predicting physical states of the drilling mud with the mathematical dynamics model, thereby producing model physical state predictions;
inputting the measurements into the mathematical dynamics model; and
adjusting discrepancies between the model physical state predictions and the measurements using the mathematical dynamics model. 18. The non-transitory computer-readable medium of claim 17, wherein the method further comprises: estimating an uncertainty interval of the plurality of measurements and the mathematical dynamics model; and updating the uncertainty intervals for the mathematical dynamics model and the measurements, thereby producing an updated mathematical dynamics model. 19. The non-transitory computer-readable medium of claim 17, wherein the method further comprises calculating a real-time downhole density of the drilling mud using the updated mathematical dynamics model. 20. The non-transitory computer-readable medium of claim 17, wherein the method further comprises calculating a real-time downhole viscosity of the drilling mud using the updated mathematical dynamics model. | 2,800 |
12,047 | 12,047 | 16,047,987 | 2,881 | Systems and methods are provided for compensating dispersion of a beam separator in a single-beam or multi-beam apparatus. Embodiments of the present disclosure provide a dispersion device comprising an electrostatic deflector and a magnetic deflector configured to induce a beam dispersion set to cancel the dispersion generated by the beam separator. The combination of the electrostatic deflector and the magnetic deflector can be used to keep the deflection angle due to the dispersion device unchanged when the induced beam dispersion is changed to compensate for a change in the dispersion generated by the beam separator. In some embodiments, the deflection angle due to the dispersion device can be controlled to be zero and there is no change in primary beam axis due to the dispersion device. | 1. A charged particle beam apparatus comprising:
a source configured to provide a primary charged particle beam; a source conversion unit configured to form a plurality of parallel images of the source using a plurality of beamlets of the primary charged particle beam; a first projection system with an objective lens and configured to project the plurality of parallel images onto a sample and therefore form a plurality of primary probe spots thereon with the plurality of beamlets; a beam separator configured to separate the plurality of beamlets and a plurality of secondary charged particle beams generated from the sample by the plurality of primary probe spots; a detection device with a plurality of detection elements; a secondary projection system configured to focus the plurality of secondary charged particle beams onto the detection device and form a plurality of secondary probe spots thereon, and the plurality of secondary probe spots are detected by the plurality of detection elements; and a first dispersion device arranged upstream of the beam separator and configured to generate a plurality of first primary beam dispersions to the plurality of beamlets, wherein the plurality of first primary beam dispersions is adjusted to cancel impacts of a plurality of second primary beam dispersions generated by the beam separator to the plurality of primary probe spots,
wherein the first dispersion device comprises a first electrostatic deflector and a first magnetic deflector respectively exerting a first force and a second force on each of the plurality of beamlets, the first force and the second force are opposite to each other and form the corresponding first primary beam dispersion. 2. The charged particle beam apparatus of claim 1, wherein the beam separator comprises a second magnetic deflector. 3. The charged particle beam apparatus of claim 2, wherein a first deflection angle of one of the plurality of beamlets caused by the first dispersion device is zero. 4. The charged particle beam apparatus of claim 2 wherein a first deflection angle of one of the plurality of beamlets caused by the first dispersion device is equal and opposite to a second deflection angle of the one of plurality of beamlets caused by the beam separator. 5. The charged particle beam apparatus of claim 1, wherein the beam separator comprises a Wien Filter. 6. The charged particle beam apparatus of claim 5, wherein a first deflection angle of one of the plurality of beamlets caused by the first dispersion device is zero. 7. The charged particle beam apparatus of claim 1, further comprising one or more secondary deflectors which are between the beam separator and the secondary projection system, and configured to adjust at least one of a position and an angle of each of the plurality of secondary charged particle beams incident onto the secondary projection system. 8. The charged particle beam apparatus of claim 1, further comprising a first multi-pole lens configured to generate a quadrupole field to cancel impacts of astigmatism aberrations caused by at least one of the beam separator and the first dispersion device to the plurality of primary probe spots. 9. The charged particle beam apparatus of claim 8, wherein the first multi-pole lens is placed adjacent to one of the beam separator and the first dispersion device. 10. The charged particle beam apparatus of claim 1, wherein the beam separator comprises a second multi-pole lens configured to generate a quadrupole field to cancel impacts of astigmatism aberrations caused by at least one of the beam separator and the first dispersion device to the plurality of primary probe spots. 11. The charged particle beam system of claim 1, wherein the first dispersion device comprises a third multi-pole lens configured to generate a quadrupole field to cancel impacts of astigmatism aberrations caused by at least one of the beam separator and the first dispersion device to the plurality of primary probe spots. 12. The charged particle beam system of claim 1, wherein the source conversion unit comprises a plurality of sixth multi-pole lenses each configured to generate a quadrupole field to cancel impacts of astigmatism aberrations caused by at least one of the beam separator and the first dispersion device to the corresponding primary probe spot. 13. The charged particle beam apparatus of claim 1, further comprising a fourth multi-pole lens configured to generate a quadrupole field to cancel impacts of astigmatism aberrations caused by the beam separator to the plurality of secondary probe spots. 14. The charged particle beam system of claim 1, further comprising a second dispersion device which is between the beam separator and the detection device and generates a plurality of first secondary beam dispersions to the plurality of secondary charged particle beams, the second dispersion device comprising:
a third electrostatic deflector and a third magnetic deflector, respectively exerting a third force and a fourth force on each of the plurality of secondary charged particle beams, the third force and the fourth force are opposite to each other and form the corresponding first secondary beam dispersion,
wherein the plurality of first secondary beam dispersions is adjusted to cancel impacts of a plurality of second secondary beam dispersions generated by the beam separator to the plurality of secondary probe spots. 15. A method for controlling dispersion in a charged particle beam system with a beam separator, comprising:
providing a source conversion unit to form a plurality of images of a source by a plurality of beamlets of a primary charged particle beam generated by the source; providing a first dispersion device in paths of the plurality of beamlets; placing the first dispersion device upstream of the beam separator; generating a plurality of first primary beam dispersions to the plurality of beamlets by the first dispersion device; and adjusting the plurality of first primary beam dispersions to cancel impacts of a plurality of second primary beam dispersions generated by the beam separator to the plurality of beamlets,
wherein the first dispersion device comprises a first electrostatic deflector and a first magnetic deflector respectively exerting a first force and a second force on each of the plurality of beamlets, the first force and the second force are opposite to each other and form the corresponding first primary beam dispersion. | Systems and methods are provided for compensating dispersion of a beam separator in a single-beam or multi-beam apparatus. Embodiments of the present disclosure provide a dispersion device comprising an electrostatic deflector and a magnetic deflector configured to induce a beam dispersion set to cancel the dispersion generated by the beam separator. The combination of the electrostatic deflector and the magnetic deflector can be used to keep the deflection angle due to the dispersion device unchanged when the induced beam dispersion is changed to compensate for a change in the dispersion generated by the beam separator. In some embodiments, the deflection angle due to the dispersion device can be controlled to be zero and there is no change in primary beam axis due to the dispersion device.1. A charged particle beam apparatus comprising:
a source configured to provide a primary charged particle beam; a source conversion unit configured to form a plurality of parallel images of the source using a plurality of beamlets of the primary charged particle beam; a first projection system with an objective lens and configured to project the plurality of parallel images onto a sample and therefore form a plurality of primary probe spots thereon with the plurality of beamlets; a beam separator configured to separate the plurality of beamlets and a plurality of secondary charged particle beams generated from the sample by the plurality of primary probe spots; a detection device with a plurality of detection elements; a secondary projection system configured to focus the plurality of secondary charged particle beams onto the detection device and form a plurality of secondary probe spots thereon, and the plurality of secondary probe spots are detected by the plurality of detection elements; and a first dispersion device arranged upstream of the beam separator and configured to generate a plurality of first primary beam dispersions to the plurality of beamlets, wherein the plurality of first primary beam dispersions is adjusted to cancel impacts of a plurality of second primary beam dispersions generated by the beam separator to the plurality of primary probe spots,
wherein the first dispersion device comprises a first electrostatic deflector and a first magnetic deflector respectively exerting a first force and a second force on each of the plurality of beamlets, the first force and the second force are opposite to each other and form the corresponding first primary beam dispersion. 2. The charged particle beam apparatus of claim 1, wherein the beam separator comprises a second magnetic deflector. 3. The charged particle beam apparatus of claim 2, wherein a first deflection angle of one of the plurality of beamlets caused by the first dispersion device is zero. 4. The charged particle beam apparatus of claim 2 wherein a first deflection angle of one of the plurality of beamlets caused by the first dispersion device is equal and opposite to a second deflection angle of the one of plurality of beamlets caused by the beam separator. 5. The charged particle beam apparatus of claim 1, wherein the beam separator comprises a Wien Filter. 6. The charged particle beam apparatus of claim 5, wherein a first deflection angle of one of the plurality of beamlets caused by the first dispersion device is zero. 7. The charged particle beam apparatus of claim 1, further comprising one or more secondary deflectors which are between the beam separator and the secondary projection system, and configured to adjust at least one of a position and an angle of each of the plurality of secondary charged particle beams incident onto the secondary projection system. 8. The charged particle beam apparatus of claim 1, further comprising a first multi-pole lens configured to generate a quadrupole field to cancel impacts of astigmatism aberrations caused by at least one of the beam separator and the first dispersion device to the plurality of primary probe spots. 9. The charged particle beam apparatus of claim 8, wherein the first multi-pole lens is placed adjacent to one of the beam separator and the first dispersion device. 10. The charged particle beam apparatus of claim 1, wherein the beam separator comprises a second multi-pole lens configured to generate a quadrupole field to cancel impacts of astigmatism aberrations caused by at least one of the beam separator and the first dispersion device to the plurality of primary probe spots. 11. The charged particle beam system of claim 1, wherein the first dispersion device comprises a third multi-pole lens configured to generate a quadrupole field to cancel impacts of astigmatism aberrations caused by at least one of the beam separator and the first dispersion device to the plurality of primary probe spots. 12. The charged particle beam system of claim 1, wherein the source conversion unit comprises a plurality of sixth multi-pole lenses each configured to generate a quadrupole field to cancel impacts of astigmatism aberrations caused by at least one of the beam separator and the first dispersion device to the corresponding primary probe spot. 13. The charged particle beam apparatus of claim 1, further comprising a fourth multi-pole lens configured to generate a quadrupole field to cancel impacts of astigmatism aberrations caused by the beam separator to the plurality of secondary probe spots. 14. The charged particle beam system of claim 1, further comprising a second dispersion device which is between the beam separator and the detection device and generates a plurality of first secondary beam dispersions to the plurality of secondary charged particle beams, the second dispersion device comprising:
a third electrostatic deflector and a third magnetic deflector, respectively exerting a third force and a fourth force on each of the plurality of secondary charged particle beams, the third force and the fourth force are opposite to each other and form the corresponding first secondary beam dispersion,
wherein the plurality of first secondary beam dispersions is adjusted to cancel impacts of a plurality of second secondary beam dispersions generated by the beam separator to the plurality of secondary probe spots. 15. A method for controlling dispersion in a charged particle beam system with a beam separator, comprising:
providing a source conversion unit to form a plurality of images of a source by a plurality of beamlets of a primary charged particle beam generated by the source; providing a first dispersion device in paths of the plurality of beamlets; placing the first dispersion device upstream of the beam separator; generating a plurality of first primary beam dispersions to the plurality of beamlets by the first dispersion device; and adjusting the plurality of first primary beam dispersions to cancel impacts of a plurality of second primary beam dispersions generated by the beam separator to the plurality of beamlets,
wherein the first dispersion device comprises a first electrostatic deflector and a first magnetic deflector respectively exerting a first force and a second force on each of the plurality of beamlets, the first force and the second force are opposite to each other and form the corresponding first primary beam dispersion. | 2,800 |
12,048 | 12,048 | 16,044,363 | 2,891 | An integrated circuit interconnects are described herein that are suitable for forming integrated circuit chip packages. In one example, an integrated circuit interconnect is embodied in a wafer that includes a substrate having a plurality of integrated circuit (IC) dice formed thereon. The plurality of IC dice include a first IC die having first solid state circuitry and a second IC die having second solid state circuitry. A first contact pad is disposed on the substrate and is coupled to the first solid state circuitry. A first solder ball is disposed on the first contact pad. The first solder ball has a substantially uniform oxide coating formed thereon. | 1. A wafer comprising:
a substrate having a plurality of integrated circuit (IC) dice formed thereon, the plurality of IC dice including a first IC die having first solid state circuitry and a second IC die having second solid state circuitry; a first contact pad disposed on the substrate and coupled to the first solid state circuitry; a first solder ball disposed on the first contact pad; and a substantially uniform oxidation layer formed on the first solder ball. 2. The wafer of claim 1, wherein there are substantially no native oxides disposed between the oxidation layer and the first solder ball. 3. The wafer of claim 1, wherein the oxidation layer is formed from SnO. 4. The wafer of claim 1 further comprising:
a protective coating disposed over the oxidation layer. 5. The wafer of claim 4 further comprising:
a second contact pad disposed on the substrate and coupled to the second solid state circuitry;
a second solder ball disposed on the second contact pad. 6. The wafer of claim 5 further comprising:
a laser formed trench formed in a scribe lane of the wafer separating the first IC die from the second IC die. 7. A method for forming an interconnect of an integrated circuit package, the method comprising:
depositing a solder ball on a pillar coupled to first circuitry formed in a first substrate; exposing the solder ball to an oxygen containing environment to form an oxidation layer on the solder ball; and converting the oxidation layer on the solder ball to a non-oxide solder protection layer. 8. The method of claim 7 further comprising;
attaching the first substrate to a second substrate; and
reflowing the solder ball to remove the non-oxide solder protection layer, and mechanically and electrically connect the first substrate to the second substrate. 9. The method of claim 7, wherein exposing the solder ball to an oxygen containing environment further comprises:
exposing the solder ball to an oxygen containing plasma. 10. The method of claim 9, wherein exposing the solder ball to an oxygen containing plasma further comprises:
forming a plasma from at least one of O2 or ozone. 11. The method of claim 7, wherein converting the oxidation layer on the solder ball further comprises:
exposing the oxidation layer to a halogen containing plasma. 12. The method of claim 11, wherein exposing the oxidation layer to a halogen containing plasma further comprises:
etching through the substrate to separate the IC dice. 13. The method of claim 7 further comprising:
laser forming a trench between the IC dice. 14. The method of claim 13 further comprising:
removing a protective coating covering the solder balls. 15. The method of claim 14 further comprising:
depositing the protective coating over the solder balls prior to forming the oxidation layer. 16. The method of claim 14 further comprising:
depositing the protective coating over the solder balls after forming the oxidation layer. 17. The method of claim 7 further comprising:
removing native oxides from the solder balls prior to forming the oxidation layer. 18. A method for forming an interconnect of an integrated circuit package, the method comprising:
depositing a solder ball on a pillar coupled to first circuitry of a first integrated circuit (IC) die formed in a first substrate; exposing the solder ball to an oxygen containing environment to form an oxidation layer on the solder ball; removing native oxides from the solder ball prior to forming the oxidation layer; converting the oxidation layer on the solder ball to a non-oxide solder protection layer; attaching the solder ball coupled to first circuitry formed in the first IC die to a second IC die; and reflowing the solder ball to remove the non-oxide solder protection layer, and mechanically and electrically connect the first IC die to the second IC die. 19. The method of claim 18 further comprising:
depositing a protective coating over the solder ball;
forming a trench through the protective coating and into the first substrate;
removing the protective coating covering the solder ball; and
plasma etching the trench to separate the first IC die from an adjacent IC die. 20. The method of claim 19, wherein converting the oxidation layer on the solder ball to form a non-oxide solder protection layer and plasma etching the trench occur simultaneously in the presence of a halogen containing gas. | An integrated circuit interconnects are described herein that are suitable for forming integrated circuit chip packages. In one example, an integrated circuit interconnect is embodied in a wafer that includes a substrate having a plurality of integrated circuit (IC) dice formed thereon. The plurality of IC dice include a first IC die having first solid state circuitry and a second IC die having second solid state circuitry. A first contact pad is disposed on the substrate and is coupled to the first solid state circuitry. A first solder ball is disposed on the first contact pad. The first solder ball has a substantially uniform oxide coating formed thereon.1. A wafer comprising:
a substrate having a plurality of integrated circuit (IC) dice formed thereon, the plurality of IC dice including a first IC die having first solid state circuitry and a second IC die having second solid state circuitry; a first contact pad disposed on the substrate and coupled to the first solid state circuitry; a first solder ball disposed on the first contact pad; and a substantially uniform oxidation layer formed on the first solder ball. 2. The wafer of claim 1, wherein there are substantially no native oxides disposed between the oxidation layer and the first solder ball. 3. The wafer of claim 1, wherein the oxidation layer is formed from SnO. 4. The wafer of claim 1 further comprising:
a protective coating disposed over the oxidation layer. 5. The wafer of claim 4 further comprising:
a second contact pad disposed on the substrate and coupled to the second solid state circuitry;
a second solder ball disposed on the second contact pad. 6. The wafer of claim 5 further comprising:
a laser formed trench formed in a scribe lane of the wafer separating the first IC die from the second IC die. 7. A method for forming an interconnect of an integrated circuit package, the method comprising:
depositing a solder ball on a pillar coupled to first circuitry formed in a first substrate; exposing the solder ball to an oxygen containing environment to form an oxidation layer on the solder ball; and converting the oxidation layer on the solder ball to a non-oxide solder protection layer. 8. The method of claim 7 further comprising;
attaching the first substrate to a second substrate; and
reflowing the solder ball to remove the non-oxide solder protection layer, and mechanically and electrically connect the first substrate to the second substrate. 9. The method of claim 7, wherein exposing the solder ball to an oxygen containing environment further comprises:
exposing the solder ball to an oxygen containing plasma. 10. The method of claim 9, wherein exposing the solder ball to an oxygen containing plasma further comprises:
forming a plasma from at least one of O2 or ozone. 11. The method of claim 7, wherein converting the oxidation layer on the solder ball further comprises:
exposing the oxidation layer to a halogen containing plasma. 12. The method of claim 11, wherein exposing the oxidation layer to a halogen containing plasma further comprises:
etching through the substrate to separate the IC dice. 13. The method of claim 7 further comprising:
laser forming a trench between the IC dice. 14. The method of claim 13 further comprising:
removing a protective coating covering the solder balls. 15. The method of claim 14 further comprising:
depositing the protective coating over the solder balls prior to forming the oxidation layer. 16. The method of claim 14 further comprising:
depositing the protective coating over the solder balls after forming the oxidation layer. 17. The method of claim 7 further comprising:
removing native oxides from the solder balls prior to forming the oxidation layer. 18. A method for forming an interconnect of an integrated circuit package, the method comprising:
depositing a solder ball on a pillar coupled to first circuitry of a first integrated circuit (IC) die formed in a first substrate; exposing the solder ball to an oxygen containing environment to form an oxidation layer on the solder ball; removing native oxides from the solder ball prior to forming the oxidation layer; converting the oxidation layer on the solder ball to a non-oxide solder protection layer; attaching the solder ball coupled to first circuitry formed in the first IC die to a second IC die; and reflowing the solder ball to remove the non-oxide solder protection layer, and mechanically and electrically connect the first IC die to the second IC die. 19. The method of claim 18 further comprising:
depositing a protective coating over the solder ball;
forming a trench through the protective coating and into the first substrate;
removing the protective coating covering the solder ball; and
plasma etching the trench to separate the first IC die from an adjacent IC die. 20. The method of claim 19, wherein converting the oxidation layer on the solder ball to form a non-oxide solder protection layer and plasma etching the trench occur simultaneously in the presence of a halogen containing gas. | 2,800 |
12,049 | 12,049 | 15,440,967 | 2,816 | Implementations of semiconductor packages may include a metallic baseplate, a first insulative layer coupled to the metallic baseplate, a first plurality of metallic traces, each metallic trace of the first plurality of metallic traces coupled to the electrically insulative, one or more semiconductor devices coupled to each one of the first plurality of metallic traces, a second plurality of metallic traces coupled to the one or more semiconductor devices, and a second insulative layer coupled to the metallic traces of the second plurality of metallic traces. | 1. A semiconductor package, comprising:
a metallic baseplate comprising a first surface and a second surface opposing the first surface; a first insulative layer comprising a first surface coupled to the second surface of the metallic baseplate, the electrically insulative layer having a second surface opposing the first surface of the electrically insulative layer; a first plurality of metallic traces, each metallic trace of the first plurality of metallic traces coupled to the second surface of the electrically insulative layer at a first surface of the metallic trace, each metallic trace of the first plurality of metallic traces having a second surface opposing the first surface of the metallic trace; one or more semiconductor devices comprising a first surface and a second surface opposing the first surface, wherein the first surface of the one or more semiconductor devices are coupled to the second surface of each one of the first plurality of metallic traces; a second plurality of metallic traces comprising a first surface and a second surface, wherein the first surface of at least one metallic trace of the second plurality of metallic traces is coupled to the second surface of the one or more semiconductor devices; and a second insulative layer comprising a first surface coupled to the second surfaces of the metallic traces of the upper plurality of metallic traces. 2. The package of claim 1, further comprising a top metallic plate coupled to a second surface of the second insulative layer, wherein the second surface of the second insulative layer is opposite the first surface of the second insulative layer. 3. The package of claim 1, wherein the semiconductor devices include one of an IGBT, diode, MOSFET, a SiC device and a GaN device. 4. The package of claim 1, wherein the first insulative layer is one of a ceramic insulated layer and a laminate insulated layer. 5. The package of claim 1, wherein the second insulative layer is one of a ceramic insulated layer and a laminate insulated layer. 6. The package of claim 1, wherein the package does not comprise one of wire bonds and clips. 7. The package of claim 1, wherein the metallic base plate is patterned. 8. The package of claim 2, wherein the top metallic plate is patterned. 9. A semiconductor package, comprising:
a third plurality of metallic traces, each metallic trace comprising a first surface and a second surface opposing the first surface; a first insulative layer comprising a first surface coupled to the second surface of each metallic trace of the third plurality of metallic traces, the electrically insulative layer having a second surface opposing the first surface of the electrically insulative layer, the first insulative layer further comprising a plurality of openings therethrough; a first plurality of metallic traces, each metallic trace of the first plurality of metallic traces coupled to the second surface of the electrically insulative layer at a first surface of each metallic trace, each metallic trace of the first plurality of metallic traces having a second surface opposing the first surface of each metallic trace, wherein one or more of the metallic traces of the first plurality of metallic traces are electrically coupled to the third plurality of metallic traces through the openings in the first insulative layer; one or more semiconductor devices comprising a first surface and a second surface opposing the first surface, wherein the first surface of the one or more semiconductor devices are coupled to the second surface of one or more metallic traces of the first plurality of metallic traces; and a second plurality of metallic traces comprising a first surface and a second surface, wherein the first surface of at least one metallic trace of the second plurality of metallic traces is coupled to the second surface of the one or more semiconductor devices; a second insulative layer comprising a first surface coupled to the second surface of the second plurality of metallic traces, the second insulative layer comprising a second surface opposing the first surface, the second insulative layer comprising a plurality of openings therethrough; and a fourth plurality of metallic traces, each metallic trace of the fourth plurality of metallic traces comprising a first surface coupled to the second surface of the second insulative layer, wherein the fourth plurality of metallic traces is electrically coupled to one or more metallic traces of the upper plurality of metallic traces through the plurality of openings in the second insulative layer. 10. The package of claim 9, wherein the openings through the first and second insulative layer are plated through holes. 11. The package of claim 9, wherein the openings through the first and second insulative layer are vias. 12. The package of claim 9, wherein the package comprises one of no wire bonds and no clips. 13. The package of claim 9, wherein the package is formed using compression molding. 14. The package of claim 9, wherein the first insulative layer is one of a ceramic insulative layer and a laminate insulative layer. 15. The package of claim 9, wherein the second insulative layer is one of a ceramic insulative layer and a laminate insulative layer. 16. A semiconductor package comprising:
a lead frame coupled to a first surface of one or more semiconductor devices, the one or more semiconductor devices further comprising a second surface opposing the first surface; a clip comprising a first surface and a second surface opposing the first surface, wherein the first surface of the clip is coupled to the second surface of the one or more semiconductor devices; a metallic layer comprising a first surface coupled to the second surface of the clip, the metallic layer further comprising a second surface opposing the first surface; and an insulative layer comprising a first surface coupled to the second surface of the metallic layer. 17. The package of claim 16, further comprising a top metallic plate coupled to a second surface of the insulative material, wherein the second surface of the insulative material opposes the first surface of the insulative material, wherein the top metallic plate is configured to transfer heat to a heat sink. 18. The package of claim 16, wherein the metallic layer is patterned and configured to electrically couple with a motherboard. 19. The package of claim 17, wherein the top metallic plate is patterned. 20. A semiconductor package comprising:
a lead frame coupled to a first surface of one or more semiconductor devices, each of the one or more semiconductor devices further comprising a second surface opposing the first surface; a metallic layer comprising a first surface and a second surface opposing the first surface, the metallic layer further comprising a first plurality of traces in the first surface; and an insulative layer comprising a first surface coupled to the second surface of the metallic layer; wherein a first portion of the first plurality of traces comprises a first thickness and a second portion of the first plurality of traces comprises a second thickness where the first thickness and the second thickness are both measured perpendicular to the second surface of the metallic layer and the second thickness is greater than the first thickness; wherein the second surface of each of the one or more semiconductor devices is coupled with the first portion of the first plurality of traces; and wherein the leadframe is coupled with the second portion of the first plurality of traces. | Implementations of semiconductor packages may include a metallic baseplate, a first insulative layer coupled to the metallic baseplate, a first plurality of metallic traces, each metallic trace of the first plurality of metallic traces coupled to the electrically insulative, one or more semiconductor devices coupled to each one of the first plurality of metallic traces, a second plurality of metallic traces coupled to the one or more semiconductor devices, and a second insulative layer coupled to the metallic traces of the second plurality of metallic traces.1. A semiconductor package, comprising:
a metallic baseplate comprising a first surface and a second surface opposing the first surface; a first insulative layer comprising a first surface coupled to the second surface of the metallic baseplate, the electrically insulative layer having a second surface opposing the first surface of the electrically insulative layer; a first plurality of metallic traces, each metallic trace of the first plurality of metallic traces coupled to the second surface of the electrically insulative layer at a first surface of the metallic trace, each metallic trace of the first plurality of metallic traces having a second surface opposing the first surface of the metallic trace; one or more semiconductor devices comprising a first surface and a second surface opposing the first surface, wherein the first surface of the one or more semiconductor devices are coupled to the second surface of each one of the first plurality of metallic traces; a second plurality of metallic traces comprising a first surface and a second surface, wherein the first surface of at least one metallic trace of the second plurality of metallic traces is coupled to the second surface of the one or more semiconductor devices; and a second insulative layer comprising a first surface coupled to the second surfaces of the metallic traces of the upper plurality of metallic traces. 2. The package of claim 1, further comprising a top metallic plate coupled to a second surface of the second insulative layer, wherein the second surface of the second insulative layer is opposite the first surface of the second insulative layer. 3. The package of claim 1, wherein the semiconductor devices include one of an IGBT, diode, MOSFET, a SiC device and a GaN device. 4. The package of claim 1, wherein the first insulative layer is one of a ceramic insulated layer and a laminate insulated layer. 5. The package of claim 1, wherein the second insulative layer is one of a ceramic insulated layer and a laminate insulated layer. 6. The package of claim 1, wherein the package does not comprise one of wire bonds and clips. 7. The package of claim 1, wherein the metallic base plate is patterned. 8. The package of claim 2, wherein the top metallic plate is patterned. 9. A semiconductor package, comprising:
a third plurality of metallic traces, each metallic trace comprising a first surface and a second surface opposing the first surface; a first insulative layer comprising a first surface coupled to the second surface of each metallic trace of the third plurality of metallic traces, the electrically insulative layer having a second surface opposing the first surface of the electrically insulative layer, the first insulative layer further comprising a plurality of openings therethrough; a first plurality of metallic traces, each metallic trace of the first plurality of metallic traces coupled to the second surface of the electrically insulative layer at a first surface of each metallic trace, each metallic trace of the first plurality of metallic traces having a second surface opposing the first surface of each metallic trace, wherein one or more of the metallic traces of the first plurality of metallic traces are electrically coupled to the third plurality of metallic traces through the openings in the first insulative layer; one or more semiconductor devices comprising a first surface and a second surface opposing the first surface, wherein the first surface of the one or more semiconductor devices are coupled to the second surface of one or more metallic traces of the first plurality of metallic traces; and a second plurality of metallic traces comprising a first surface and a second surface, wherein the first surface of at least one metallic trace of the second plurality of metallic traces is coupled to the second surface of the one or more semiconductor devices; a second insulative layer comprising a first surface coupled to the second surface of the second plurality of metallic traces, the second insulative layer comprising a second surface opposing the first surface, the second insulative layer comprising a plurality of openings therethrough; and a fourth plurality of metallic traces, each metallic trace of the fourth plurality of metallic traces comprising a first surface coupled to the second surface of the second insulative layer, wherein the fourth plurality of metallic traces is electrically coupled to one or more metallic traces of the upper plurality of metallic traces through the plurality of openings in the second insulative layer. 10. The package of claim 9, wherein the openings through the first and second insulative layer are plated through holes. 11. The package of claim 9, wherein the openings through the first and second insulative layer are vias. 12. The package of claim 9, wherein the package comprises one of no wire bonds and no clips. 13. The package of claim 9, wherein the package is formed using compression molding. 14. The package of claim 9, wherein the first insulative layer is one of a ceramic insulative layer and a laminate insulative layer. 15. The package of claim 9, wherein the second insulative layer is one of a ceramic insulative layer and a laminate insulative layer. 16. A semiconductor package comprising:
a lead frame coupled to a first surface of one or more semiconductor devices, the one or more semiconductor devices further comprising a second surface opposing the first surface; a clip comprising a first surface and a second surface opposing the first surface, wherein the first surface of the clip is coupled to the second surface of the one or more semiconductor devices; a metallic layer comprising a first surface coupled to the second surface of the clip, the metallic layer further comprising a second surface opposing the first surface; and an insulative layer comprising a first surface coupled to the second surface of the metallic layer. 17. The package of claim 16, further comprising a top metallic plate coupled to a second surface of the insulative material, wherein the second surface of the insulative material opposes the first surface of the insulative material, wherein the top metallic plate is configured to transfer heat to a heat sink. 18. The package of claim 16, wherein the metallic layer is patterned and configured to electrically couple with a motherboard. 19. The package of claim 17, wherein the top metallic plate is patterned. 20. A semiconductor package comprising:
a lead frame coupled to a first surface of one or more semiconductor devices, each of the one or more semiconductor devices further comprising a second surface opposing the first surface; a metallic layer comprising a first surface and a second surface opposing the first surface, the metallic layer further comprising a first plurality of traces in the first surface; and an insulative layer comprising a first surface coupled to the second surface of the metallic layer; wherein a first portion of the first plurality of traces comprises a first thickness and a second portion of the first plurality of traces comprises a second thickness where the first thickness and the second thickness are both measured perpendicular to the second surface of the metallic layer and the second thickness is greater than the first thickness; wherein the second surface of each of the one or more semiconductor devices is coupled with the first portion of the first plurality of traces; and wherein the leadframe is coupled with the second portion of the first plurality of traces. | 2,800 |
12,050 | 12,050 | 16,233,358 | 2,813 | An embodiment is to include an inverted staggered (bottom gate structure) thin film transistor in which an oxide semiconductor film containing In, Ga, and Zn is used as a semiconductor layer and a buffer layer is provided between the semiconductor layer and a source and drain electrode layers. The buffer layer having higher carrier concentration than the semiconductor layer is provided intentionally between the source and drain electrode layers and the semiconductor layer, whereby an ohmic contact is formed. | 1. (canceled) 2. A semiconductor device comprising:
a gate electrode layer; a gate insulating layer over the gate electrode layer; a semiconductor layer over the gate insulating layer; a first layer over the semiconductor layer; a second layer over the semiconductor layer; a source electrode layer electrically connected to the semiconductor layer through the first layer; and a drain electrode layer electrically connected to the semiconductor layer through the second layer, wherein each of the source electrode layer and the drain electrode layer includes a stacked structure of a first conductive layer and a second conductive layer, wherein one of the first conductive layer and the second conductive layer includes copper, wherein, in plan view:
the semiconductor layer includes a first region projected beyond a periphery of the first layer,
the first layer includes a region projected beyond a periphery of the source electrode layer,
the semiconductor layer includes a second region projected beyond a periphery of the second layer, and
the second layer includes a region projected beyond a periphery of the drain electrode layer, and
wherein, in the semiconductor layer:
a thickness of the first region is smaller than a thickness of a region overlapping with the first layer, and
a thickness of the second region is smaller than a thickness of a region overlapping with the second layer. 3. The semiconductor device according to claim 2, wherein the gate electrode layer comprises copper. 4. A semiconductor device comprising:
a gate electrode layer; a gate insulating layer over the gate electrode layer; a semiconductor layer over the gate insulating layer; a first layer over the semiconductor layer; a second layer over the semiconductor layer; a source electrode layer electrically connected to the semiconductor layer through the first layer; and a drain electrode layer electrically connected to the semiconductor layer through the second layer, wherein each of the source electrode layer and the drain electrode layer includes a stacked structure of a first conductive layer and a second conductive layer, wherein one of the first conductive layer and the second conductive layer includes copper, wherein the semiconductor layer includes a channel formation region overlapping with the gate electrode layer, wherein, in plan view:
the semiconductor layer includes a first region projected beyond a periphery of the first layer,
the first layer includes a region projected beyond a periphery of the source electrode layer,
the semiconductor layer includes a second region projected beyond a periphery of the second layer, and
the second layer includes a region projected beyond a periphery of the drain electrode layer, and
wherein the semiconductor layer has a depression in the channel formation region. 5. The semiconductor device according to claim 4, wherein the gate electrode layer comprises copper. 6. A semiconductor device comprising:
a gate electrode layer; a gate insulating layer over the gate electrode layer; a semiconductor layer over the gate insulating layer; a first layer over the semiconductor layer; a second layer over the semiconductor layer; a source electrode layer electrically connected to the semiconductor layer through the first layer; and a drain electrode layer electrically connected to the semiconductor layer through the second layer, wherein each of the source electrode layer and the drain electrode layer includes a stacked structure of a first conductive layer and a second conductive layer, wherein one of the first conductive layer and the second conductive layer includes copper, wherein the semiconductor layer includes a channel formation region overlapping with the gate electrode layer, wherein, in plan view:
the semiconductor layer includes a first region projected beyond a periphery of the first layer,
the first layer includes a region projected beyond a periphery of the source electrode layer,
the semiconductor layer includes a second region projected beyond a periphery of the second layer, and
the second layer includes a region projected beyond a periphery of the drain electrode layer,
wherein the semiconductor layer has a depression in the channel formation region, and wherein, in the semiconductor layer:
a thickness of the first region is smaller than a thickness of a region overlapping with the first layer, and
a thickness of the second region is smaller than a thickness of a region overlapping with the second layer. 7. The semiconductor device according to claim 6, wherein the gate electrode layer comprises copper. | An embodiment is to include an inverted staggered (bottom gate structure) thin film transistor in which an oxide semiconductor film containing In, Ga, and Zn is used as a semiconductor layer and a buffer layer is provided between the semiconductor layer and a source and drain electrode layers. The buffer layer having higher carrier concentration than the semiconductor layer is provided intentionally between the source and drain electrode layers and the semiconductor layer, whereby an ohmic contact is formed.1. (canceled) 2. A semiconductor device comprising:
a gate electrode layer; a gate insulating layer over the gate electrode layer; a semiconductor layer over the gate insulating layer; a first layer over the semiconductor layer; a second layer over the semiconductor layer; a source electrode layer electrically connected to the semiconductor layer through the first layer; and a drain electrode layer electrically connected to the semiconductor layer through the second layer, wherein each of the source electrode layer and the drain electrode layer includes a stacked structure of a first conductive layer and a second conductive layer, wherein one of the first conductive layer and the second conductive layer includes copper, wherein, in plan view:
the semiconductor layer includes a first region projected beyond a periphery of the first layer,
the first layer includes a region projected beyond a periphery of the source electrode layer,
the semiconductor layer includes a second region projected beyond a periphery of the second layer, and
the second layer includes a region projected beyond a periphery of the drain electrode layer, and
wherein, in the semiconductor layer:
a thickness of the first region is smaller than a thickness of a region overlapping with the first layer, and
a thickness of the second region is smaller than a thickness of a region overlapping with the second layer. 3. The semiconductor device according to claim 2, wherein the gate electrode layer comprises copper. 4. A semiconductor device comprising:
a gate electrode layer; a gate insulating layer over the gate electrode layer; a semiconductor layer over the gate insulating layer; a first layer over the semiconductor layer; a second layer over the semiconductor layer; a source electrode layer electrically connected to the semiconductor layer through the first layer; and a drain electrode layer electrically connected to the semiconductor layer through the second layer, wherein each of the source electrode layer and the drain electrode layer includes a stacked structure of a first conductive layer and a second conductive layer, wherein one of the first conductive layer and the second conductive layer includes copper, wherein the semiconductor layer includes a channel formation region overlapping with the gate electrode layer, wherein, in plan view:
the semiconductor layer includes a first region projected beyond a periphery of the first layer,
the first layer includes a region projected beyond a periphery of the source electrode layer,
the semiconductor layer includes a second region projected beyond a periphery of the second layer, and
the second layer includes a region projected beyond a periphery of the drain electrode layer, and
wherein the semiconductor layer has a depression in the channel formation region. 5. The semiconductor device according to claim 4, wherein the gate electrode layer comprises copper. 6. A semiconductor device comprising:
a gate electrode layer; a gate insulating layer over the gate electrode layer; a semiconductor layer over the gate insulating layer; a first layer over the semiconductor layer; a second layer over the semiconductor layer; a source electrode layer electrically connected to the semiconductor layer through the first layer; and a drain electrode layer electrically connected to the semiconductor layer through the second layer, wherein each of the source electrode layer and the drain electrode layer includes a stacked structure of a first conductive layer and a second conductive layer, wherein one of the first conductive layer and the second conductive layer includes copper, wherein the semiconductor layer includes a channel formation region overlapping with the gate electrode layer, wherein, in plan view:
the semiconductor layer includes a first region projected beyond a periphery of the first layer,
the first layer includes a region projected beyond a periphery of the source electrode layer,
the semiconductor layer includes a second region projected beyond a periphery of the second layer, and
the second layer includes a region projected beyond a periphery of the drain electrode layer,
wherein the semiconductor layer has a depression in the channel formation region, and wherein, in the semiconductor layer:
a thickness of the first region is smaller than a thickness of a region overlapping with the first layer, and
a thickness of the second region is smaller than a thickness of a region overlapping with the second layer. 7. The semiconductor device according to claim 6, wherein the gate electrode layer comprises copper. | 2,800 |
12,051 | 12,051 | 15,555,323 | 2,832 | An engine includes at least one piston, a rotatable crankshaft, a starter motor, a lithium-ion battery, and a charging system. The rotatable crankshaft is coupled to the at least one piston. The starter motor is configured to selectively initiate rotation of the crankshaft. The lithium-ion battery is in electrical communication with the starter motor and has at least one cell. The charging system is powered by motion of at least one component of the engine. The charging system provides energy to the lithium-ion battery to charge the lithium-ion battery. The engine has a starting condition, a miming condition, and a stopping condition. The charging system continuously applies a voltage potential to the at least one cell while the engine is in a running condition. | 1. An engine comprising:
at least one piston; a rotatable crankshaft coupled to the at least one piston; a starter motor configured to selectively initiate rotation of the crankshaft; a lithium-ion battery in electrical communication with the starter motor, the lithium-ion battery having at least one cell; a charging system powered by motion of at least one component of the engine; wherein the charging system provides energy to the lithium-ion battery to charge the lithium-ion battery; wherein the engine has a starting condition, a running condition, and a stopping condition; wherein the charging system continuously applies a voltage potential to the at least one cell while the engine is in a running condition. 2. The engine of claim 1, wherein the lithium-ion battery comprises at least three cells. 3. The engine of claim 1, wherein the lithium-ion battery does not include battery management circuitry. 4. The engine of claim 1, wherein the at least one component includes a flywheel system comprising magnets. 5. The engine of claim 1, wherein no cell protection circuitry is provided between the charging system and the lithium-ion battery. 6. The engine of claim 1, wherein no charge control circuitry is provided between the charging system and the lithium-ion battery. 7. A starter battery system for an air cooled engine rated at less than 50 horsepower, the system comprising:
four lithium iron phosphate cells; and a charging circuit powered by rotation of the engine; wherein a voltage developed by the charging circuit is applied to the four lithium iron phosphate cells without battery management circuitry provided between the charging circuitry and the four lithium iron phosphate cells. 8. The system of claim 7, wherein the charging circuit includes an alternator and a voltage regulator. 9. The system of claim 7, wherein no cell protection circuitry is provided between the charging circuit and the four lithium iron phosphate cells. 10. The system of claim 7, wherein no charge control circuitry is provided between the charging circuit and the four lithium iron phosphate cells. 11. An engine comprising:
at least one piston; a rotatable crankshaft coupled to the at least one piston; a starter motor to selectively initiate rotation of the crankshaft; a lithium-ion battery in electrical communication with the starter motor, the lithium-ion battery having four lithium iron phosphate cells; a charging system powered by the engine; wherein the charging system provides energy to the lithium-ion battery to charge the lithium-ion battery; wherein no battery management circuitry is provided between the charging system and the lithium-ion battery. 12. The engine of claim 11, wherein the charging system includes an alternator. 13. The engine of claim 11, wherein the charging system comprises an ignition coil waste spark charging system. 14. The engine of claim 11, wherein no cell protection circuitry is provided between the charging system and the lithium-ion battery. 15. The engine of claim 11, wherein no charge control circuitry is provided between the charging system and the lithium-ion battery. 16. The engine of claim 11, further comprising a limiting system for limiting an output provided to the lithium-ion battery, wherein the output comprises a current and a voltage. 17. The engine of claim 16, wherein the limiting system comprises a switching system, wherein the switching system is configured to disconnect a connection between the charging system and the lithium-ion battery based on at least one of the current and the voltage. 18. The engine of claim 16, wherein the limiting system comprises a switching circuit, wherein the switching circuit is configured to modify the output using pulse width modification. 19. The engine of claim 16, wherein the limiting system comprises a filtering circuit configured to modify a waveform of the output. 20. The engine of claim 16, wherein the limiting system comprises a zener diode or a metal oxide varistor configured to clamp the at least one of the voltage and the current. | An engine includes at least one piston, a rotatable crankshaft, a starter motor, a lithium-ion battery, and a charging system. The rotatable crankshaft is coupled to the at least one piston. The starter motor is configured to selectively initiate rotation of the crankshaft. The lithium-ion battery is in electrical communication with the starter motor and has at least one cell. The charging system is powered by motion of at least one component of the engine. The charging system provides energy to the lithium-ion battery to charge the lithium-ion battery. The engine has a starting condition, a miming condition, and a stopping condition. The charging system continuously applies a voltage potential to the at least one cell while the engine is in a running condition.1. An engine comprising:
at least one piston; a rotatable crankshaft coupled to the at least one piston; a starter motor configured to selectively initiate rotation of the crankshaft; a lithium-ion battery in electrical communication with the starter motor, the lithium-ion battery having at least one cell; a charging system powered by motion of at least one component of the engine; wherein the charging system provides energy to the lithium-ion battery to charge the lithium-ion battery; wherein the engine has a starting condition, a running condition, and a stopping condition; wherein the charging system continuously applies a voltage potential to the at least one cell while the engine is in a running condition. 2. The engine of claim 1, wherein the lithium-ion battery comprises at least three cells. 3. The engine of claim 1, wherein the lithium-ion battery does not include battery management circuitry. 4. The engine of claim 1, wherein the at least one component includes a flywheel system comprising magnets. 5. The engine of claim 1, wherein no cell protection circuitry is provided between the charging system and the lithium-ion battery. 6. The engine of claim 1, wherein no charge control circuitry is provided between the charging system and the lithium-ion battery. 7. A starter battery system for an air cooled engine rated at less than 50 horsepower, the system comprising:
four lithium iron phosphate cells; and a charging circuit powered by rotation of the engine; wherein a voltage developed by the charging circuit is applied to the four lithium iron phosphate cells without battery management circuitry provided between the charging circuitry and the four lithium iron phosphate cells. 8. The system of claim 7, wherein the charging circuit includes an alternator and a voltage regulator. 9. The system of claim 7, wherein no cell protection circuitry is provided between the charging circuit and the four lithium iron phosphate cells. 10. The system of claim 7, wherein no charge control circuitry is provided between the charging circuit and the four lithium iron phosphate cells. 11. An engine comprising:
at least one piston; a rotatable crankshaft coupled to the at least one piston; a starter motor to selectively initiate rotation of the crankshaft; a lithium-ion battery in electrical communication with the starter motor, the lithium-ion battery having four lithium iron phosphate cells; a charging system powered by the engine; wherein the charging system provides energy to the lithium-ion battery to charge the lithium-ion battery; wherein no battery management circuitry is provided between the charging system and the lithium-ion battery. 12. The engine of claim 11, wherein the charging system includes an alternator. 13. The engine of claim 11, wherein the charging system comprises an ignition coil waste spark charging system. 14. The engine of claim 11, wherein no cell protection circuitry is provided between the charging system and the lithium-ion battery. 15. The engine of claim 11, wherein no charge control circuitry is provided between the charging system and the lithium-ion battery. 16. The engine of claim 11, further comprising a limiting system for limiting an output provided to the lithium-ion battery, wherein the output comprises a current and a voltage. 17. The engine of claim 16, wherein the limiting system comprises a switching system, wherein the switching system is configured to disconnect a connection between the charging system and the lithium-ion battery based on at least one of the current and the voltage. 18. The engine of claim 16, wherein the limiting system comprises a switching circuit, wherein the switching circuit is configured to modify the output using pulse width modification. 19. The engine of claim 16, wherein the limiting system comprises a filtering circuit configured to modify a waveform of the output. 20. The engine of claim 16, wherein the limiting system comprises a zener diode or a metal oxide varistor configured to clamp the at least one of the voltage and the current. | 2,800 |
12,052 | 12,052 | 15,240,421 | 2,857 | A method of monitoring the integrity of a fluid connection between first and second fluid containing systems based on at least one time-dependent measurement signal from a pressure sensor in the first fluid containing system. The pressure sensor detects first pulses originating from a first pulse generator in the first fluid containing system and second pulses originating from a second pulse generator in the second fluid containing system. A parameter value representing a distribution of signal values within a time window is calculated by analyzing the measurement signal in the time domain and/or by using information on the timing of the second pulses in the measurement signal. The parameter value may be calculated as a statistical dispersion measure of the signal values, or from matching the signal to a predicted temporal signal profile of the second pulse. The integrity of the fluid connection is determined from the parameter value. | 1. A method for monitoring the integrity of a fluid connection between first and second fluid containing systems based on at least one time-dependent measurement signal from at least one pressure sensor in the first fluid containing system, wherein the first fluid containing system includes an extracorporeal blood flow circuit comprising an arterial access device, a blood processing device, a venous access device and a first pulse generator, and the second fluid containing system includes a human blood system comprising a blood vessel access and a second pulse generator, wherein:
the arterial access device is for connecting to the human blood system, the venous access device is connected to the blood vessel access to form the fluid connection, the first pulse generator includes a pumping device arranged in the extracorporeal blood flow circuit to pump blood from the arterial access device through the blood processing device to the venous access device, and the at least one pressure sensor is arranged to detect first pulses originating from the first pulse generator and second pulses originating from the second pulse generator, said method comprising: receiving, at a processor, said at least one time-dependent measurement signal from the at least one pressure sensor; generating, by the processor, a time-dependent monitoring signal based on said at least one-time dependent measurement signal in which the first pulses are eliminated; calculating, by the processor, a parameter value based on signal values within a time window in the time-dependent monitoring signal, the parameter value representing a distribution of the signal values, wherein said calculating includes matching the signal values within the time window to a predicted temporal signal profile of the second pulses; and determining, by the processor, the integrity of the fluid connection based at least partly on the parameter value. 2. The method of claim 1, wherein said calculating comprises:
calculating the parameter value as a statistical dispersion measure of the signal values within the time window. 3. The method of claim 2, wherein the statistical dispersion measure includes at least one of: a standard deviation, a variance, a coefficient of variation, a sum of differences, an energy, a power, a sum of absolute deviations from an average value, and an average of absolute differences from an average value. 4. The method of claim 1, wherein the parameter value is a correlation value resulting from said matching. 5. The method of claim 1, wherein said calculating comprises:
calculating a cross-correlation between the signal values within the time window and the predicted temporal signal profile; and identifying a maximum correlation value in the cross-correlation, wherein said determining includes comparing the maximum correlation value to a threshold value. 6. The method of claim 5, wherein said calculating comprises:
obtaining a time point of the maximum correlation value, and validating the maximum correlation value by comparing the time point to a predicted time point. 7. The method of claim 1, further comprising the steps of (i) obtaining a reference pressure signal from a reference sensor in the first fluid containing system, wherein the reference sensor is arranged to detect said second pulses even if the fluid connection is compromised, and (ii) calculating the predicted temporal signal profile based on the reference pressure signal. 8. The method of claim 7, further comprising the steps of calculating a magnitude value indicative of a magnitude of the second pulses in the reference pressure signal, and comparing the magnitude value to a limit, wherein the step of calculating the predicted temporal signal profile based on the reference pressure signal is conditioned upon said comparing of the magnitude value to the limit. 9. The method of claim 7, wherein the step of calculating the predicted temporal signal profile comprises adjusting for a difference in transit time between the reference sensor and said at least one pressure sensor. 10. The method of claim 9, wherein said difference in transit time is given by a predefined value. 11. The method of claim 9, wherein said difference in transit time is calculated based on a difference in fluid pressure between a location of the reference sensor and said at least one pressure sensor. 12. The method of claim 1, wherein the time window is selected so as to contain at least one second pulse originating from the second pulse generator. 13. The method of claim 12, wherein the length of the time window is chosen to exceed a maximum pulse repetition interval of the second pulse generator. 14. The method of claim 12, wherein the time window is chosen based on timing information indicative of the timing of the second pulses in said at least one time-dependent measurement signal. 15. The method of claim 14, wherein the timing information is obtained from a pulse sensor coupled to the second fluid containing system. 16. The method of claim 14, wherein the timing information is based on the relative timing of previously detected second pulses in the time-dependent measurement signal. 17. The method of claim 14, wherein the at least one time dependent measurement signal comprises at least one venous measurement signal derived from at least one venous pressure sensor located downstream of the pumping device, and at least one arterial measurement signal derived from at least one arterial pressure sensor located upstream of the pumping device, and wherein the monitoring signal is generated based on said at least one venous measurement signal, said method comprising:
identifying at least one second pulse originating from the second pulse generator in said at least one arterial measurement signal; and calculating the timing information from the at least one identified second pulse. 18. The method of claim 14, further comprising:
intermittently turning off the first pulse generator; identifying at least one second pulse originating from the second pulse generator in said at least one time-dependent measurement signal; and calculating the timing information from the identified second pulse. 19. The method of claim 14, further comprising:
identifying a set of candidate second pulses based on said at least one time-dependent measurement signal; deriving a sequence of candidate time points based on the set of candidate second pulses; validating the sequence of candidate time points against a temporal criterion; and calculating the timing information as a function of the validated sequence of candidate time points. 20. The method of claim 1, wherein said calculating comprises:
identifying a candidate second pulse in the monitoring signal and a corresponding candidate time point; and validating the candidate second pulse based on the candidate time point in relation to timing information indicative of the timing of the second pulses in said at least one time-dependent measurement signal. 21. A non-transitory computer readable storage medium comprising instructions for causing a computer to perform the method of claim 1. 22. A device for monitoring the integrity of a fluid connection between an extracorporeal blood flow circuit and a human blood system wherein the extracorporeal blood flow circuit comprises an arterial access device connecting to the human blood system, a blood processing device, a venous access device, and a first pulse generator, and the human blood system comprises a blood vessel access and a second pulse generator, wherein:
the venous access device is configured to be connected to the blood vessel access to form the fluid connection, the first pulse generator includes a pumping device configured to be arranged in the extracorporeal blood flow circuit to pump blood from the arterial access device through the blood processing device to the venous access device, and at least one pressure sensor is configured to detect first pulses originating from the first pulse generator and second pulses originating from the second pulse generator, said device comprising: an input for at least one time-dependent measurement signal from the at least one pressure sensor in the extracorporeal blood flow circuit; and a signal processor connected to said input, said signal processor comprising a processing module configured to generate, based on said at least one time-dependent measurement signal, a time-dependent monitoring signal in which the first pulses are eliminated, and to calculate a parameter value based on signal values within a time window in the monitoring signal, the parameter value representing a distribution of the signal values, wherein said calculation includes matching the signal values within the time window to a predicted temporal signal profile of the second pulses, said signal processor being configured to determine the integrity of the fluid connection based at least partly on the parameter value. 23. A device for monitoring the integrity of a fluid connection between an extracorporeal blood flow circuit and a human blood system, wherein the extracorporeal blood flow circuit comprises an arterial access device connecting to the human blood system, a blood processing device, a venous access device, and a first pulse generator, and the human blood system comprises a blood vessel access and a second pulse generator, wherein:
the venous access device is configured to be connected to the blood vessel access to form the fluid connection, the first pulse generator includes a pumping device configured to be arranged in the extracorporeal blood flow circuit to pump blood from the arterial access device through the blood processing device to the venous access device, and at least one pressure sensor is configured to detect first pulses originating from the first pulse generator and second pulses originating from the second pulse generator, said device comprising: means for receiving said at least one time dependent measurement signal; means for generating, based on said at least one time-dependent measurement signal, a time-dependent monitoring signal in which the first pulses are eliminated; means for calculating a parameter value based on signal values within a time window in the monitoring signal, the parameter value representing a distribution of the signal values, wherein said calculating includes matching the signal values within the time window to a predicted temporal signal profile of the second pulses; and
means for determining the integrity of the fluid connection based at least partly on the parameter value. | A method of monitoring the integrity of a fluid connection between first and second fluid containing systems based on at least one time-dependent measurement signal from a pressure sensor in the first fluid containing system. The pressure sensor detects first pulses originating from a first pulse generator in the first fluid containing system and second pulses originating from a second pulse generator in the second fluid containing system. A parameter value representing a distribution of signal values within a time window is calculated by analyzing the measurement signal in the time domain and/or by using information on the timing of the second pulses in the measurement signal. The parameter value may be calculated as a statistical dispersion measure of the signal values, or from matching the signal to a predicted temporal signal profile of the second pulse. The integrity of the fluid connection is determined from the parameter value.1. A method for monitoring the integrity of a fluid connection between first and second fluid containing systems based on at least one time-dependent measurement signal from at least one pressure sensor in the first fluid containing system, wherein the first fluid containing system includes an extracorporeal blood flow circuit comprising an arterial access device, a blood processing device, a venous access device and a first pulse generator, and the second fluid containing system includes a human blood system comprising a blood vessel access and a second pulse generator, wherein:
the arterial access device is for connecting to the human blood system, the venous access device is connected to the blood vessel access to form the fluid connection, the first pulse generator includes a pumping device arranged in the extracorporeal blood flow circuit to pump blood from the arterial access device through the blood processing device to the venous access device, and the at least one pressure sensor is arranged to detect first pulses originating from the first pulse generator and second pulses originating from the second pulse generator, said method comprising: receiving, at a processor, said at least one time-dependent measurement signal from the at least one pressure sensor; generating, by the processor, a time-dependent monitoring signal based on said at least one-time dependent measurement signal in which the first pulses are eliminated; calculating, by the processor, a parameter value based on signal values within a time window in the time-dependent monitoring signal, the parameter value representing a distribution of the signal values, wherein said calculating includes matching the signal values within the time window to a predicted temporal signal profile of the second pulses; and determining, by the processor, the integrity of the fluid connection based at least partly on the parameter value. 2. The method of claim 1, wherein said calculating comprises:
calculating the parameter value as a statistical dispersion measure of the signal values within the time window. 3. The method of claim 2, wherein the statistical dispersion measure includes at least one of: a standard deviation, a variance, a coefficient of variation, a sum of differences, an energy, a power, a sum of absolute deviations from an average value, and an average of absolute differences from an average value. 4. The method of claim 1, wherein the parameter value is a correlation value resulting from said matching. 5. The method of claim 1, wherein said calculating comprises:
calculating a cross-correlation between the signal values within the time window and the predicted temporal signal profile; and identifying a maximum correlation value in the cross-correlation, wherein said determining includes comparing the maximum correlation value to a threshold value. 6. The method of claim 5, wherein said calculating comprises:
obtaining a time point of the maximum correlation value, and validating the maximum correlation value by comparing the time point to a predicted time point. 7. The method of claim 1, further comprising the steps of (i) obtaining a reference pressure signal from a reference sensor in the first fluid containing system, wherein the reference sensor is arranged to detect said second pulses even if the fluid connection is compromised, and (ii) calculating the predicted temporal signal profile based on the reference pressure signal. 8. The method of claim 7, further comprising the steps of calculating a magnitude value indicative of a magnitude of the second pulses in the reference pressure signal, and comparing the magnitude value to a limit, wherein the step of calculating the predicted temporal signal profile based on the reference pressure signal is conditioned upon said comparing of the magnitude value to the limit. 9. The method of claim 7, wherein the step of calculating the predicted temporal signal profile comprises adjusting for a difference in transit time between the reference sensor and said at least one pressure sensor. 10. The method of claim 9, wherein said difference in transit time is given by a predefined value. 11. The method of claim 9, wherein said difference in transit time is calculated based on a difference in fluid pressure between a location of the reference sensor and said at least one pressure sensor. 12. The method of claim 1, wherein the time window is selected so as to contain at least one second pulse originating from the second pulse generator. 13. The method of claim 12, wherein the length of the time window is chosen to exceed a maximum pulse repetition interval of the second pulse generator. 14. The method of claim 12, wherein the time window is chosen based on timing information indicative of the timing of the second pulses in said at least one time-dependent measurement signal. 15. The method of claim 14, wherein the timing information is obtained from a pulse sensor coupled to the second fluid containing system. 16. The method of claim 14, wherein the timing information is based on the relative timing of previously detected second pulses in the time-dependent measurement signal. 17. The method of claim 14, wherein the at least one time dependent measurement signal comprises at least one venous measurement signal derived from at least one venous pressure sensor located downstream of the pumping device, and at least one arterial measurement signal derived from at least one arterial pressure sensor located upstream of the pumping device, and wherein the monitoring signal is generated based on said at least one venous measurement signal, said method comprising:
identifying at least one second pulse originating from the second pulse generator in said at least one arterial measurement signal; and calculating the timing information from the at least one identified second pulse. 18. The method of claim 14, further comprising:
intermittently turning off the first pulse generator; identifying at least one second pulse originating from the second pulse generator in said at least one time-dependent measurement signal; and calculating the timing information from the identified second pulse. 19. The method of claim 14, further comprising:
identifying a set of candidate second pulses based on said at least one time-dependent measurement signal; deriving a sequence of candidate time points based on the set of candidate second pulses; validating the sequence of candidate time points against a temporal criterion; and calculating the timing information as a function of the validated sequence of candidate time points. 20. The method of claim 1, wherein said calculating comprises:
identifying a candidate second pulse in the monitoring signal and a corresponding candidate time point; and validating the candidate second pulse based on the candidate time point in relation to timing information indicative of the timing of the second pulses in said at least one time-dependent measurement signal. 21. A non-transitory computer readable storage medium comprising instructions for causing a computer to perform the method of claim 1. 22. A device for monitoring the integrity of a fluid connection between an extracorporeal blood flow circuit and a human blood system wherein the extracorporeal blood flow circuit comprises an arterial access device connecting to the human blood system, a blood processing device, a venous access device, and a first pulse generator, and the human blood system comprises a blood vessel access and a second pulse generator, wherein:
the venous access device is configured to be connected to the blood vessel access to form the fluid connection, the first pulse generator includes a pumping device configured to be arranged in the extracorporeal blood flow circuit to pump blood from the arterial access device through the blood processing device to the venous access device, and at least one pressure sensor is configured to detect first pulses originating from the first pulse generator and second pulses originating from the second pulse generator, said device comprising: an input for at least one time-dependent measurement signal from the at least one pressure sensor in the extracorporeal blood flow circuit; and a signal processor connected to said input, said signal processor comprising a processing module configured to generate, based on said at least one time-dependent measurement signal, a time-dependent monitoring signal in which the first pulses are eliminated, and to calculate a parameter value based on signal values within a time window in the monitoring signal, the parameter value representing a distribution of the signal values, wherein said calculation includes matching the signal values within the time window to a predicted temporal signal profile of the second pulses, said signal processor being configured to determine the integrity of the fluid connection based at least partly on the parameter value. 23. A device for monitoring the integrity of a fluid connection between an extracorporeal blood flow circuit and a human blood system, wherein the extracorporeal blood flow circuit comprises an arterial access device connecting to the human blood system, a blood processing device, a venous access device, and a first pulse generator, and the human blood system comprises a blood vessel access and a second pulse generator, wherein:
the venous access device is configured to be connected to the blood vessel access to form the fluid connection, the first pulse generator includes a pumping device configured to be arranged in the extracorporeal blood flow circuit to pump blood from the arterial access device through the blood processing device to the venous access device, and at least one pressure sensor is configured to detect first pulses originating from the first pulse generator and second pulses originating from the second pulse generator, said device comprising: means for receiving said at least one time dependent measurement signal; means for generating, based on said at least one time-dependent measurement signal, a time-dependent monitoring signal in which the first pulses are eliminated; means for calculating a parameter value based on signal values within a time window in the monitoring signal, the parameter value representing a distribution of the signal values, wherein said calculating includes matching the signal values within the time window to a predicted temporal signal profile of the second pulses; and
means for determining the integrity of the fluid connection based at least partly on the parameter value. | 2,800 |
12,053 | 12,053 | 16,084,115 | 2,844 | A motor vehicle having at least one headlight for illuminating the surroundings of the motor vehicle and a control device for controlling the headlight, wherein the headlight comprises a plurality of lighting segments that are arranged in the manner of a matrix and that can be actuated separately by the control device for providing a lighting brightness that can be predefined separately for the individual lighting segments, wherein the control parameter predefining the specific lighting brightness for each of the lighting segments can be calculated by the control device in at least one computing step as a function of input parameters that can be provided by at least one vehicle device, wherein the computing step or at least one of the computing steps may be executed in parallel by the control device for a plurality of the lighting segments. | 1-9. (canceled) 10. A motor vehicle having at least one headlight for illuminating the surroundings of the motor vehicle and a control device for controlling the at least one headlight, wherein the at least one headlight comprises a plurality of lighting segments that are arranged in a manner of a matrix, and can be actuated separately by the control device for providing a lighting brightness that can be predefined separately for the individual lighting segments, wherein a control parameter predefining the lighting brightness for each of the lighting segments can be calculated by the control device in at least one computing step as a function of input parameters that can be provided by at least one vehicle device, and wherein the at least one computing step may be executed in parallel by the control device for a plurality of the lighting segments. 11. The motor vehicle according to claim 10, wherein the control device comprises a graphics processor, and wherein the at least one computing step may be executed in parallel by the graphics processor. 12. The motor vehicle according to claim 10, wherein the control device is configured to execute the at least one computing step in parallel by executing a computing statement that determines a result parameter associated with a first lighting segment of the plurality of lighting segments in parallel to a plurality of computing parameters associated with at least one other lighting segment of the plurality of lighting segments, wherein the result parameter is predefined by the input parameters, or at least calculated therefrom, and the control parameter is predefined by the result parameter, or is calculated in a subsequent computing step using the result parameter. 13. The motor vehicle according to claim 10, wherein for each of the lighting segments, a result of the at least one computing step is a function of predefined lighting segment information describing at least one property of the lighting segment. 14. The motor vehicle according to claim 10, wherein the control device is configured to, as a function of the input parameters, select one of a plurality of predefined light patterns that describes a solid angle to be illuminated using the lighting segments, wherein, for at least one subset of the lighting segments, the result of the at least one computing step is a function of the selected light pattern. 15. The motor vehicle according to claim 10, wherein, the input parameters comprise movement data that are a function of an instantaneous and/or predicted future vehicle movement, wherein, for at least some of the lighting segments, a result of the at least one computing step is a function of the movement data. 16. The motor vehicle according to claim 10, wherein the input parameters comprise object information relating to at least one relevant object in the vehicle surroundings, and wherein, for at least one subset of the lighting segments, a result of the at least one computing step is a function of the object information. 17. The motor vehicle according to claim 10, wherein the input parameters, or 2D vector data determined from the input parameters using the control device, describe a 2D polygon list of 2D polygons of a light distribution, wherein different control parameters or control parameter courses are associated with each of the 2D polygons, and wherein the control parameters of the respective lighting segments may be calculated in parallel for a plurality of lighting segments from the 2D polygon list using the control device. 18. The motor vehicle according to claim 10, wherein the control device is configured to calculate, as a control parameter, a pulse width for a control voltage and/or a control current for each lighting segment. | A motor vehicle having at least one headlight for illuminating the surroundings of the motor vehicle and a control device for controlling the headlight, wherein the headlight comprises a plurality of lighting segments that are arranged in the manner of a matrix and that can be actuated separately by the control device for providing a lighting brightness that can be predefined separately for the individual lighting segments, wherein the control parameter predefining the specific lighting brightness for each of the lighting segments can be calculated by the control device in at least one computing step as a function of input parameters that can be provided by at least one vehicle device, wherein the computing step or at least one of the computing steps may be executed in parallel by the control device for a plurality of the lighting segments.1-9. (canceled) 10. A motor vehicle having at least one headlight for illuminating the surroundings of the motor vehicle and a control device for controlling the at least one headlight, wherein the at least one headlight comprises a plurality of lighting segments that are arranged in a manner of a matrix, and can be actuated separately by the control device for providing a lighting brightness that can be predefined separately for the individual lighting segments, wherein a control parameter predefining the lighting brightness for each of the lighting segments can be calculated by the control device in at least one computing step as a function of input parameters that can be provided by at least one vehicle device, and wherein the at least one computing step may be executed in parallel by the control device for a plurality of the lighting segments. 11. The motor vehicle according to claim 10, wherein the control device comprises a graphics processor, and wherein the at least one computing step may be executed in parallel by the graphics processor. 12. The motor vehicle according to claim 10, wherein the control device is configured to execute the at least one computing step in parallel by executing a computing statement that determines a result parameter associated with a first lighting segment of the plurality of lighting segments in parallel to a plurality of computing parameters associated with at least one other lighting segment of the plurality of lighting segments, wherein the result parameter is predefined by the input parameters, or at least calculated therefrom, and the control parameter is predefined by the result parameter, or is calculated in a subsequent computing step using the result parameter. 13. The motor vehicle according to claim 10, wherein for each of the lighting segments, a result of the at least one computing step is a function of predefined lighting segment information describing at least one property of the lighting segment. 14. The motor vehicle according to claim 10, wherein the control device is configured to, as a function of the input parameters, select one of a plurality of predefined light patterns that describes a solid angle to be illuminated using the lighting segments, wherein, for at least one subset of the lighting segments, the result of the at least one computing step is a function of the selected light pattern. 15. The motor vehicle according to claim 10, wherein, the input parameters comprise movement data that are a function of an instantaneous and/or predicted future vehicle movement, wherein, for at least some of the lighting segments, a result of the at least one computing step is a function of the movement data. 16. The motor vehicle according to claim 10, wherein the input parameters comprise object information relating to at least one relevant object in the vehicle surroundings, and wherein, for at least one subset of the lighting segments, a result of the at least one computing step is a function of the object information. 17. The motor vehicle according to claim 10, wherein the input parameters, or 2D vector data determined from the input parameters using the control device, describe a 2D polygon list of 2D polygons of a light distribution, wherein different control parameters or control parameter courses are associated with each of the 2D polygons, and wherein the control parameters of the respective lighting segments may be calculated in parallel for a plurality of lighting segments from the 2D polygon list using the control device. 18. The motor vehicle according to claim 10, wherein the control device is configured to calculate, as a control parameter, a pulse width for a control voltage and/or a control current for each lighting segment. | 2,800 |
12,054 | 12,054 | 14,292,246 | 2,872 | According to embodiments of the present application, a carbon dioxide sensing color changeable dye can comprise a carbon dioxide status indicator, a solvent, a polymer wherein the carbon dioxide status indicator is dispersed, an optional plasticizer, and an optional agent to facilitate mixing. The color changeable dye is a first color in the presence of a carbon dioxide rich environment and is capable of changing to a second color upon exposure to atmospheric condition for a period of time corresponding to the intended use time of a restricted, disposable or limited use product. Methods of making and using the color changeable dye and apparatuses incorporating such dye are also disclosed. | 1. A color changeable dye comprising:
a carbon dioxide status indicator, a solvent, and a polymer wherein the carbon dioxide status indicator is dispersed 2. The color changeable dye of claim 1 wherein said color changeable dye is a first color in the presence of a higher than atmospheric carbon dioxide environment, capable of changing to a second color after exposure to atmospheric conditions for a period of time corresponding to the intended use time of a restricted, disposable or limited use product. 3. The color changeable dye of claim 1 further comprising a plasticizer. 4. The color changeable dye of claim 1 further comprising an agent to facilitate mixing. 5. The color changeable dye of claim 1 wherein the carbon dioxide status indicator is selected from Cresol Red, Texas Red Hydrazine, Bromothymol Blue, M-Cresol Purple, Phenol Red, Congo Red and Natural Red. 6. The color changeable dye of claim 1 wherein the solvent is selected from acetone, alcohol, ethanol, methanol and water. 7. The color changeable dye of claim 1 wherein the polymer is selected from polyvinyl alcohol (PVA), hydroxyethyl cellulose (HEC), hydroxypropyl cellulose (HPC), polyvinyl butyral (PVB), polyvinyl chloride (PVC), polyethylene terephthalate (PET), or polymers made from vinylidene chloride along with other monomers. 8. The color changeable dye of claim 3 wherein the plasticizer is glycerol. 9. The color changeable dye of claim 4 wherein the agent to facilitate mixing is selected from bentonite nanoclay, glass microspheres, diatomaceous earth and cellulose acetate. 10. The color changeable dye of claim 2 wherein said period of time is less than about 60 minutes. 11. The color changeable dye of claim 2 wherein said period of time is between about 1 and about 168 hours. 12. A disposable ophthalmic or medical apparatus comprising:
a disposable ophthalmic or medical device; a color changeable dye
wherein said color changeable dye comprises a carbon dioxide status indicator, a solvent and a polymer. 13. The apparatus of claim 12 wherein the color changeable dye is a first color in the presence of a higher than atmospheric carbon dioxide environment, capable of changing to a second color after exposure to atmospheric conditions for a period of time corresponding to the intended use time of a disposable or limited use product. 14. The apparatus of claim 12 wherein said ophthalmic or medical apparatus is a contact lens. 15. The apparatus of claim 12 wherein said ophthalmic or medical apparatus is a scalpel. 16. The apparatus of claim 12 wherein said ophthalmic or medical apparatus is a syringe. 17. The apparatus of claim 12 wherein the color changeable dye further comprises a plasticizer. 18. The apparatus of claim 12 wherein said color changeable dye further comprises an agent to facilitate mixing. 19. An apparatus with time controlled color change indication comprising:
a restricted, disposable, or limited use apparatus; a color changeable dye disposed on the restricted, disposable, or limited use apparatus or its packaging,
wherein said color changeable dye comprises a carbon dioxide status indicator, a solvent and a polymer. 20. The apparatus of claim 19 wherein the color changeable dye is a first color in the presence of a higher than atmospheric carbon dioxide environment, capable of changing to a second color after exposure to atmospheric conditions for a period of time corresponding to the intended use time of a disposable or limited use product. 21. The apparatus of claim 19 wherein the color changeable dye further comprises a plasticizer. 22. The apparatus of claim 19 wherein said color changeable dye further comprises an agent to facilitate mixing. | According to embodiments of the present application, a carbon dioxide sensing color changeable dye can comprise a carbon dioxide status indicator, a solvent, a polymer wherein the carbon dioxide status indicator is dispersed, an optional plasticizer, and an optional agent to facilitate mixing. The color changeable dye is a first color in the presence of a carbon dioxide rich environment and is capable of changing to a second color upon exposure to atmospheric condition for a period of time corresponding to the intended use time of a restricted, disposable or limited use product. Methods of making and using the color changeable dye and apparatuses incorporating such dye are also disclosed.1. A color changeable dye comprising:
a carbon dioxide status indicator, a solvent, and a polymer wherein the carbon dioxide status indicator is dispersed 2. The color changeable dye of claim 1 wherein said color changeable dye is a first color in the presence of a higher than atmospheric carbon dioxide environment, capable of changing to a second color after exposure to atmospheric conditions for a period of time corresponding to the intended use time of a restricted, disposable or limited use product. 3. The color changeable dye of claim 1 further comprising a plasticizer. 4. The color changeable dye of claim 1 further comprising an agent to facilitate mixing. 5. The color changeable dye of claim 1 wherein the carbon dioxide status indicator is selected from Cresol Red, Texas Red Hydrazine, Bromothymol Blue, M-Cresol Purple, Phenol Red, Congo Red and Natural Red. 6. The color changeable dye of claim 1 wherein the solvent is selected from acetone, alcohol, ethanol, methanol and water. 7. The color changeable dye of claim 1 wherein the polymer is selected from polyvinyl alcohol (PVA), hydroxyethyl cellulose (HEC), hydroxypropyl cellulose (HPC), polyvinyl butyral (PVB), polyvinyl chloride (PVC), polyethylene terephthalate (PET), or polymers made from vinylidene chloride along with other monomers. 8. The color changeable dye of claim 3 wherein the plasticizer is glycerol. 9. The color changeable dye of claim 4 wherein the agent to facilitate mixing is selected from bentonite nanoclay, glass microspheres, diatomaceous earth and cellulose acetate. 10. The color changeable dye of claim 2 wherein said period of time is less than about 60 minutes. 11. The color changeable dye of claim 2 wherein said period of time is between about 1 and about 168 hours. 12. A disposable ophthalmic or medical apparatus comprising:
a disposable ophthalmic or medical device; a color changeable dye
wherein said color changeable dye comprises a carbon dioxide status indicator, a solvent and a polymer. 13. The apparatus of claim 12 wherein the color changeable dye is a first color in the presence of a higher than atmospheric carbon dioxide environment, capable of changing to a second color after exposure to atmospheric conditions for a period of time corresponding to the intended use time of a disposable or limited use product. 14. The apparatus of claim 12 wherein said ophthalmic or medical apparatus is a contact lens. 15. The apparatus of claim 12 wherein said ophthalmic or medical apparatus is a scalpel. 16. The apparatus of claim 12 wherein said ophthalmic or medical apparatus is a syringe. 17. The apparatus of claim 12 wherein the color changeable dye further comprises a plasticizer. 18. The apparatus of claim 12 wherein said color changeable dye further comprises an agent to facilitate mixing. 19. An apparatus with time controlled color change indication comprising:
a restricted, disposable, or limited use apparatus; a color changeable dye disposed on the restricted, disposable, or limited use apparatus or its packaging,
wherein said color changeable dye comprises a carbon dioxide status indicator, a solvent and a polymer. 20. The apparatus of claim 19 wherein the color changeable dye is a first color in the presence of a higher than atmospheric carbon dioxide environment, capable of changing to a second color after exposure to atmospheric conditions for a period of time corresponding to the intended use time of a disposable or limited use product. 21. The apparatus of claim 19 wherein the color changeable dye further comprises a plasticizer. 22. The apparatus of claim 19 wherein said color changeable dye further comprises an agent to facilitate mixing. | 2,800 |
12,055 | 12,055 | 14,898,326 | 2,859 | A charging system including an accumulator, a use of an MPP tracking method for charging an accumulator, and a method for charging an accumulator with the aid of a charging system, the charging system including a voltage source, a converter, and a rectifier, the current supplied and/or driven by the voltage source being supplied to the DC-voltage-side terminal of a converter, the converter having semiconductor switches, which are controllable in a pulse-width modulated manner, in order to generate an output-side AC voltage, the output-side AC voltage feeding a rectifier, whose output-side voltage, especially rectified voltage, functioning and/or acting as charging voltage for the accumulator, an arrangement for detecting the output current of the inverter being situated in the converter, the effective value of the output current in particular corresponding to the charge current of the converter, a current limiting arrangement of the converter limiting the output current of the inverter to a current value such that the charging power, i.e., the product of charging voltage and charge current, is controlled toward a maximum value. | 1-9. (canceled) 10. A charging system, comprising:
an accumulator; a voltage source; a converter including an inverter; and a rectifier, wherein:
a current at least one of supplied and driven by the voltage source is supplied to a DC-voltage-side terminal of the inverter,
the inverter includes semiconductor switches that are controllable in a pulse-width modulated manner for generating an output-side AC voltage,
the output-side AC voltage feeds the rectifier that produces a rectified output-side voltage that at least one of functions and acts as a charging voltage for the accumulator,
the converter includes an arrangement for detecting an output current of the inverter,
an effective value of the output current corresponds to a charge current of the converter,
the output-side AC voltage as a controlled variable is communicated to a controller, and
the converter includes a current limiting arrangement that limits the output current of the inverter to a current value such that a charging power is controlled toward a maximum value. 11. The charging system as recited in claim 10, wherein the output-side AC voltage is detected one of directly and indirectly. 12. The charging system as recited in claim 10, wherein the charging power is a product of the charging voltage and the charge current. 13. The charging system as recited in claim 10, wherein signal electronics of the converter includes an MPP tracker that sets the current value such that the charging power is regulated toward a maximum value. 14. The charging system as recited in claim 13, wherein the charging power is a product of charging voltage and the charge current. 15. The charging system as recited in claim 10, wherein:
the voltage source is one of a solar module and a solar module system, and a DC voltage supplied by the voltage source is supplied to an intermediate circuit of the converter. 16. The charging system as recited in claim 10, wherein:
the voltage source is a generator, and the AC voltage supplied by the voltage source feeds a rectifier of the frequency converter, a DC-voltage-side output of the converter feeding the intermediate circuit of the frequency converter. 17. The charging system as recited in claim 10, wherein:
the output-side AC voltage is a three-phase voltage, and the rectifier is developed as a rectifier for three-phase voltage. 18. The charging system as recited in claim 17, wherein the rectifier is a three-phase current bridge rectifier. 19. The charging system as recited in claim 10, further comprising:
an arrangement for ascertaining the charging voltage. 20. The charging system as recited in claim 19, wherein the arrangement for ascertaining is provided at the accumulator. 21. The charging system as recited in claim 10, further comprising:
an arrangement for ascertaining a voltage at the DC-voltage-side terminal of the inverter cooperates with an arrangement for ascertaining a pulse width modulation ratio. 22. The charging system as recited in claim 21, wherein the charging voltage is ascertained by multiplication from the voltage at the DC-voltage-side terminal and the pulse-width modulation ratio. 23. The charging system as recited in claim 10, wherein the output-side AC voltage of the inverter is set to a value that corresponds to a predefined charging voltage value when the charge current drops below a current limiting value. 24. The charging system as recited in claim 23, wherein the predefined charging voltage value is a final charging voltage of an energy store. 25. The charging system as recited in claim 10, wherein the charge current is higher than a voltage applied at the DC-voltage-side terminal of the inverter. 26. An MPP tracking method for charging an accumulator, comprising:
charging the accumulator by an inverter that is actuated in a pulse-width modulated manner and supplied from a voltage source; and limiting an output current of the inverter to a current value such that a charging power is controlled toward to a maximum value. 27. The method as recited in claim 26, wherein the charging power is controlled to the maximum value with regard to the current value. 28. The method as recited in claim 26, further comprising:
setting an output voltage of the inverter in such a way that the accumulator is fed from a provided charging voltage if a charge current drops below a current limiting value, 29. The method as recited in claim 28, further comprising generating the charging voltage by rectification of the output voltage of the inverter. 30. The method as recited in claim 29, wherein the rectification includes filtering, 31. The method as recited in claim 26, wherein the charging power is a product of a charging voltage and a charge current. 32. A method for charging an accumulator with the aid of a charging system that includes a voltage source, a converter, and a rectifier, the method comprising:
supplying a current that is one of supplied and driven by the voltage source to a DC-voltage-side terminal of an inverter; actuating semiconductor switches of the inverter in a pulse-width modulated manner in order to generate an output-side alternating voltage of the inverter; rectifying the output-side alternating voltage, wherein the output-side rectified voltage at least one of functioning and acting as a charging voltage for the accumulator; detecting an output current of the inverter; and limiting the output current of the inverter to a current value such that a charging power is controlled toward to maximum value. 33. The method as recited in claim 32, wherein the converter includes the inverter. 34. The method as recited in claim 32, wherein an effective value of the output current corresponds to a charge current of the converter. 35. The method as recited in claim 32, wherein the charging power is a product of the charging voltage and a charge current of the converter. | A charging system including an accumulator, a use of an MPP tracking method for charging an accumulator, and a method for charging an accumulator with the aid of a charging system, the charging system including a voltage source, a converter, and a rectifier, the current supplied and/or driven by the voltage source being supplied to the DC-voltage-side terminal of a converter, the converter having semiconductor switches, which are controllable in a pulse-width modulated manner, in order to generate an output-side AC voltage, the output-side AC voltage feeding a rectifier, whose output-side voltage, especially rectified voltage, functioning and/or acting as charging voltage for the accumulator, an arrangement for detecting the output current of the inverter being situated in the converter, the effective value of the output current in particular corresponding to the charge current of the converter, a current limiting arrangement of the converter limiting the output current of the inverter to a current value such that the charging power, i.e., the product of charging voltage and charge current, is controlled toward a maximum value.1-9. (canceled) 10. A charging system, comprising:
an accumulator; a voltage source; a converter including an inverter; and a rectifier, wherein:
a current at least one of supplied and driven by the voltage source is supplied to a DC-voltage-side terminal of the inverter,
the inverter includes semiconductor switches that are controllable in a pulse-width modulated manner for generating an output-side AC voltage,
the output-side AC voltage feeds the rectifier that produces a rectified output-side voltage that at least one of functions and acts as a charging voltage for the accumulator,
the converter includes an arrangement for detecting an output current of the inverter,
an effective value of the output current corresponds to a charge current of the converter,
the output-side AC voltage as a controlled variable is communicated to a controller, and
the converter includes a current limiting arrangement that limits the output current of the inverter to a current value such that a charging power is controlled toward a maximum value. 11. The charging system as recited in claim 10, wherein the output-side AC voltage is detected one of directly and indirectly. 12. The charging system as recited in claim 10, wherein the charging power is a product of the charging voltage and the charge current. 13. The charging system as recited in claim 10, wherein signal electronics of the converter includes an MPP tracker that sets the current value such that the charging power is regulated toward a maximum value. 14. The charging system as recited in claim 13, wherein the charging power is a product of charging voltage and the charge current. 15. The charging system as recited in claim 10, wherein:
the voltage source is one of a solar module and a solar module system, and a DC voltage supplied by the voltage source is supplied to an intermediate circuit of the converter. 16. The charging system as recited in claim 10, wherein:
the voltage source is a generator, and the AC voltage supplied by the voltage source feeds a rectifier of the frequency converter, a DC-voltage-side output of the converter feeding the intermediate circuit of the frequency converter. 17. The charging system as recited in claim 10, wherein:
the output-side AC voltage is a three-phase voltage, and the rectifier is developed as a rectifier for three-phase voltage. 18. The charging system as recited in claim 17, wherein the rectifier is a three-phase current bridge rectifier. 19. The charging system as recited in claim 10, further comprising:
an arrangement for ascertaining the charging voltage. 20. The charging system as recited in claim 19, wherein the arrangement for ascertaining is provided at the accumulator. 21. The charging system as recited in claim 10, further comprising:
an arrangement for ascertaining a voltage at the DC-voltage-side terminal of the inverter cooperates with an arrangement for ascertaining a pulse width modulation ratio. 22. The charging system as recited in claim 21, wherein the charging voltage is ascertained by multiplication from the voltage at the DC-voltage-side terminal and the pulse-width modulation ratio. 23. The charging system as recited in claim 10, wherein the output-side AC voltage of the inverter is set to a value that corresponds to a predefined charging voltage value when the charge current drops below a current limiting value. 24. The charging system as recited in claim 23, wherein the predefined charging voltage value is a final charging voltage of an energy store. 25. The charging system as recited in claim 10, wherein the charge current is higher than a voltage applied at the DC-voltage-side terminal of the inverter. 26. An MPP tracking method for charging an accumulator, comprising:
charging the accumulator by an inverter that is actuated in a pulse-width modulated manner and supplied from a voltage source; and limiting an output current of the inverter to a current value such that a charging power is controlled toward to a maximum value. 27. The method as recited in claim 26, wherein the charging power is controlled to the maximum value with regard to the current value. 28. The method as recited in claim 26, further comprising:
setting an output voltage of the inverter in such a way that the accumulator is fed from a provided charging voltage if a charge current drops below a current limiting value, 29. The method as recited in claim 28, further comprising generating the charging voltage by rectification of the output voltage of the inverter. 30. The method as recited in claim 29, wherein the rectification includes filtering, 31. The method as recited in claim 26, wherein the charging power is a product of a charging voltage and a charge current. 32. A method for charging an accumulator with the aid of a charging system that includes a voltage source, a converter, and a rectifier, the method comprising:
supplying a current that is one of supplied and driven by the voltage source to a DC-voltage-side terminal of an inverter; actuating semiconductor switches of the inverter in a pulse-width modulated manner in order to generate an output-side alternating voltage of the inverter; rectifying the output-side alternating voltage, wherein the output-side rectified voltage at least one of functioning and acting as a charging voltage for the accumulator; detecting an output current of the inverter; and limiting the output current of the inverter to a current value such that a charging power is controlled toward to maximum value. 33. The method as recited in claim 32, wherein the converter includes the inverter. 34. The method as recited in claim 32, wherein an effective value of the output current corresponds to a charge current of the converter. 35. The method as recited in claim 32, wherein the charging power is a product of the charging voltage and a charge current of the converter. | 2,800 |
12,056 | 12,056 | 15,372,554 | 2,822 | An oxide semiconductor film contains In, M (M is Al, Ga, Y, or Sn), and Zn and includes a region with a film density higher than or equal to 6.3 g/cm 3 and lower than 6.5 g/cm 3 . Alternatively, the oxide semiconductor film contains In, M (M is Al, Ga, Y, or Sn), and Zn and includes a region with etching at an etching rate higher than or equal to 10 nm/min and lower than or equal to 45 nm/min when a phosphoric acid aqueous solution obtained by diluting 85 vol % phosphoric acid with water 100 times is used for etching. | 1. An oxide semiconductor film comprising In, M (M is any one of Al, Ga, Y, and Sn), and Zn,
wherein the oxide semiconductor film includes a region with a film density higher than or equal to 6.3 g/cm3 and lower than 6.5 g/cm3. 2. The oxide semiconductor film according to claim 1,
wherein the oxide semiconductor film includes a crystal part, and wherein the crystal part includes a region having c-axis alignment and a region having alignment different from the c-axis alignment. 3. The oxide semiconductor film according to claim 1,
wherein an atomic ratio of the In, to the M and the Zn is in a neighborhood of 4:2:3, and wherein when a proportion of the In is 4, a proportion of the M is higher than or equal to 1.5 and lower than or equal to 2.5 and a proportion of the Zn is higher than or equal to 2 and lower than or equal to 4. 4. An oxide semiconductor film comprising In, M (M is any one of Al, Ga, Y, and Sn), and Zn,
wherein the oxide semiconductor film includes a region with an etching rate higher than or equal to 10 nm/min and lower than or equal to 45 nm/min when a phosphoric acid aqueous solution obtained by diluting 85 vol % phosphoric acid with water 100 times is used for etching. 5. The oxide semiconductor film according to claim 4,
wherein the oxide semiconductor film includes a crystal part, and wherein the crystal part includes a region having c-axis alignment and a region having alignment different from the c-axis alignment. 6. The oxide semiconductor film according to claim 4,
wherein an atomic ratio of the In, to the M and the Zn is in a neighborhood of 4:2:3, and wherein when a proportion of the In is 4, a proportion of the M is higher than or equal to 1.5 and lower than or equal to 2.5 and a proportion of the Zn is higher than or equal to 2 and lower than or equal to 4. 7. A semiconductor device comprising:
an oxide semiconductor film over a first insulating film; a gate insulating film over the oxide semiconductor film; a gate electrode over the gate insulating film; and a second insulating film over the oxide semiconductor film and the gate electrode, wherein the oxide semiconductor film comprises a channel region in contact with the gate insulating film, a source region in contact with the second insulating film, and a drain region in contact with the second insulating film, and wherein the oxide semiconductor film includes a region with a film density higher than or equal to 6.3 g/cm3 and lower than 6.5 g/cm3. 8. The semiconductor device according to claim 7,
wherein the oxide semiconductor film comprises In, M (M is any one of Al, Ga, Y, and Sn), and Zn. 9. The semiconductor device according to claim 7,
wherein the oxide semiconductor film includes a crystal part, and wherein the crystal part includes a region having c-axis alignment and a region having alignment different from the c-axis alignment. 10. A display device comprising:
the semiconductor device according to claim 7; and a display element. 11. A display module comprising:
the display device according to claim 10; and a touch sensor. 12. An electronic device comprising:
the semiconductor device according to claim 7; and any one of an operation key and a battery. 13. A semiconductor device comprising:
a gate electrode; a gate insulating film over the gate electrode; an oxide semiconductor film over the gate insulating film; and a pair of electrodes over the oxide semiconductor film, wherein the oxide semiconductor film includes a region with a film density higher than or equal to 6.3 g/cm3 and lower than 6.5 g/cm3. 14. The semiconductor device according to claim 13,
wherein the oxide semiconductor film comprises In, M (M is any one of Al, Ga, Y, and Sn), and Zn. 15. The semiconductor device according to claim 13,
wherein the oxide semiconductor film includes a crystal part, and wherein the crystal part includes a region having c-axis alignment and a region having alignment different from the c-axis alignment. 16. A display device comprising:
the semiconductor device according to claim 13; and a display element. 17. A display module comprising:
the display device according to claim 16; and a touch sensor. 18. An electronic device comprising:
the semiconductor device according to claim 13; and any one of an operation key and a battery. | An oxide semiconductor film contains In, M (M is Al, Ga, Y, or Sn), and Zn and includes a region with a film density higher than or equal to 6.3 g/cm 3 and lower than 6.5 g/cm 3 . Alternatively, the oxide semiconductor film contains In, M (M is Al, Ga, Y, or Sn), and Zn and includes a region with etching at an etching rate higher than or equal to 10 nm/min and lower than or equal to 45 nm/min when a phosphoric acid aqueous solution obtained by diluting 85 vol % phosphoric acid with water 100 times is used for etching.1. An oxide semiconductor film comprising In, M (M is any one of Al, Ga, Y, and Sn), and Zn,
wherein the oxide semiconductor film includes a region with a film density higher than or equal to 6.3 g/cm3 and lower than 6.5 g/cm3. 2. The oxide semiconductor film according to claim 1,
wherein the oxide semiconductor film includes a crystal part, and wherein the crystal part includes a region having c-axis alignment and a region having alignment different from the c-axis alignment. 3. The oxide semiconductor film according to claim 1,
wherein an atomic ratio of the In, to the M and the Zn is in a neighborhood of 4:2:3, and wherein when a proportion of the In is 4, a proportion of the M is higher than or equal to 1.5 and lower than or equal to 2.5 and a proportion of the Zn is higher than or equal to 2 and lower than or equal to 4. 4. An oxide semiconductor film comprising In, M (M is any one of Al, Ga, Y, and Sn), and Zn,
wherein the oxide semiconductor film includes a region with an etching rate higher than or equal to 10 nm/min and lower than or equal to 45 nm/min when a phosphoric acid aqueous solution obtained by diluting 85 vol % phosphoric acid with water 100 times is used for etching. 5. The oxide semiconductor film according to claim 4,
wherein the oxide semiconductor film includes a crystal part, and wherein the crystal part includes a region having c-axis alignment and a region having alignment different from the c-axis alignment. 6. The oxide semiconductor film according to claim 4,
wherein an atomic ratio of the In, to the M and the Zn is in a neighborhood of 4:2:3, and wherein when a proportion of the In is 4, a proportion of the M is higher than or equal to 1.5 and lower than or equal to 2.5 and a proportion of the Zn is higher than or equal to 2 and lower than or equal to 4. 7. A semiconductor device comprising:
an oxide semiconductor film over a first insulating film; a gate insulating film over the oxide semiconductor film; a gate electrode over the gate insulating film; and a second insulating film over the oxide semiconductor film and the gate electrode, wherein the oxide semiconductor film comprises a channel region in contact with the gate insulating film, a source region in contact with the second insulating film, and a drain region in contact with the second insulating film, and wherein the oxide semiconductor film includes a region with a film density higher than or equal to 6.3 g/cm3 and lower than 6.5 g/cm3. 8. The semiconductor device according to claim 7,
wherein the oxide semiconductor film comprises In, M (M is any one of Al, Ga, Y, and Sn), and Zn. 9. The semiconductor device according to claim 7,
wherein the oxide semiconductor film includes a crystal part, and wherein the crystal part includes a region having c-axis alignment and a region having alignment different from the c-axis alignment. 10. A display device comprising:
the semiconductor device according to claim 7; and a display element. 11. A display module comprising:
the display device according to claim 10; and a touch sensor. 12. An electronic device comprising:
the semiconductor device according to claim 7; and any one of an operation key and a battery. 13. A semiconductor device comprising:
a gate electrode; a gate insulating film over the gate electrode; an oxide semiconductor film over the gate insulating film; and a pair of electrodes over the oxide semiconductor film, wherein the oxide semiconductor film includes a region with a film density higher than or equal to 6.3 g/cm3 and lower than 6.5 g/cm3. 14. The semiconductor device according to claim 13,
wherein the oxide semiconductor film comprises In, M (M is any one of Al, Ga, Y, and Sn), and Zn. 15. The semiconductor device according to claim 13,
wherein the oxide semiconductor film includes a crystal part, and wherein the crystal part includes a region having c-axis alignment and a region having alignment different from the c-axis alignment. 16. A display device comprising:
the semiconductor device according to claim 13; and a display element. 17. A display module comprising:
the display device according to claim 16; and a touch sensor. 18. An electronic device comprising:
the semiconductor device according to claim 13; and any one of an operation key and a battery. | 2,800 |
12,057 | 12,057 | 15,850,031 | 2,813 | Implementations of semiconductor packages may include: a substrate including a first side and a second side and an image signal processor (ISP) including a first side and a second side where first side of the ISP is coupled to the first side of the substrate. A first mold compound may encapsulate the second side of the ISP and an image sensor having a first side and a second side. The first side of the image sensor is coupled to the first mold compound which may be substantially coextensive with a perimeter of the first side of the image sensor. Implementations of image sensor packages may also include an optically transmissive cover and a polymeric compound encapsulating a portion of the substrate, the first mold compound, the image sensor, and a portion of the optically transmissive cover. | 1. An image sensor package comprising:
a substrate comprising a first side and a second side; an image signal processor (ISP) comprising a first side and a second side, wherein the first side of the ISP is coupled to the first side of the substrate; a first mold compound encapsulating the second side of the ISP; an image sensor comprising a first side and a second side, wherein the first side is coupled to the first mold compound, the first mold compound substantially coextensive with a perimeter of the first side of the image sensor; an optically transmissive cover coupled to the second side of the image sensor; and a polymeric compound encapsulating a portion of the substrate, the first mold compound, the image sensor, and a portion of the optically transmissive cover. 2. The package of claim 1, further comprising a first plurality of wirebonds coupling the second side of the ISP with the first side of the substrate, wherein the first plurality of wirebonds is encapsulated by the first mold compound. 3. The package of claim 1, wherein the second side of the ISP is electrically coupled with the substrate through one or more electrical connectors. 4. The package of claim 1, further comprising a second plurality of wirebonds coupling the second side of the image sensor with the first side of the substrate, wherein the second plurality of wirebonds is encapsulated by the polymeric compound. 5. The package of claim 1, wherein the second side of the image sensor is electrically coupled with the substrate through one or more electrical connectors. 6. The package of claim 1, wherein a perimeter of the second side of the ISP is smaller than a perimeter of the first side of the image sensor. 7. The package of claim 1, wherein the entirety of the first side of the image sensor is directly supported by the first mold compound. 8. An image sensor package comprising:
a substrate comprising a first side and a second side; an image signal processor (ISP) comprising a first side and a second side, wherein the first side is coupled to the first side of the substrate; a first mold compound encapsulating the second side of the ISP, wherein the first mold compound encapsulates a first plurality of electrical connectors coupled to the first side of the substrate and to the second side of the ISP; an image sensor comprising a first side and a second side, wherein the first side is coupled to the first mold compound and the second side is electrically coupled to the substrate; an optically transmissive cover coupled to the second side of the image sensor; and a polymeric compound encapsulating a second plurality of electrical connectors coupled to the first side of the substrate and the second side of the image sensor; wherein a perimeter of the second side of the ISP is smaller than a perimeter of the first side of the image sensor; and wherein a perimeter of the first side of the image sensor is substantially the same size as a perimeter of the first mold compound. 9. The package of claim 8, wherein the encapsulant is a liquid encapsulant. 10. The package of claim 8, wherein the encapsulant is a second mold compound. 11. The package of claim 8, further comprising a plurality of electrical contacts coupled to the second side of the substrate. 12. The package of claim 8, further comprising a thermal conductive layer coupled between the first side of the substrate and the first side of the ISP. 13. The package of claim 8, wherein a thickness of the ISP and a thickness of the image sensor are each less than 100 micrometers. 14. The package of claim 8, wherein the first mold compound entirely covers the second side, a third side, a fourth side, a fifth side, and a sixth side of the ISP. 15. A method of forming an image sensor package comprising:
die bonding a first side of an image signal processor (ISP) to a first side of a substrate; electrically coupling a second side of the ISP to the first side of the substrate; forming a first mold compound over the second side of the ISP, the first mold compound comprising a flat image sensor mounting surface; coupling a first side of an image sensor to the flat image sensor mounting surface, wherein the entire first side of the image sensor is directly coupled to the first mold compound; electrically coupling a second side of the image sensor with the substrate; coupling an optically transmissive cover to the second side of the image sensor; and encapsulating a polymer material over a portion of the substrate, the first mold compound, the image sensor, and a portion of the optically transmissive cover. 16. The method of claim 15, further comprising forming a plurality of electrical contacts to a second side of the substrate. 17. The method of claim 15, wherein the flat image sensor mounting surface is formed by applying die attach film. 18. The method of claim 15, wherein the first mold compound is formed using one of a compression molding technique and a transfer molding technique. 19. The method of claim 15, further comprising thinning one of the ISP, the image sensor, and both the ISP and the image sensor. 20. The method of claim 15, wherein a perimeter of the flat image sensor mounting surface is substantially coextensive with a perimeter of the first side of the image sensor. | Implementations of semiconductor packages may include: a substrate including a first side and a second side and an image signal processor (ISP) including a first side and a second side where first side of the ISP is coupled to the first side of the substrate. A first mold compound may encapsulate the second side of the ISP and an image sensor having a first side and a second side. The first side of the image sensor is coupled to the first mold compound which may be substantially coextensive with a perimeter of the first side of the image sensor. Implementations of image sensor packages may also include an optically transmissive cover and a polymeric compound encapsulating a portion of the substrate, the first mold compound, the image sensor, and a portion of the optically transmissive cover.1. An image sensor package comprising:
a substrate comprising a first side and a second side; an image signal processor (ISP) comprising a first side and a second side, wherein the first side of the ISP is coupled to the first side of the substrate; a first mold compound encapsulating the second side of the ISP; an image sensor comprising a first side and a second side, wherein the first side is coupled to the first mold compound, the first mold compound substantially coextensive with a perimeter of the first side of the image sensor; an optically transmissive cover coupled to the second side of the image sensor; and a polymeric compound encapsulating a portion of the substrate, the first mold compound, the image sensor, and a portion of the optically transmissive cover. 2. The package of claim 1, further comprising a first plurality of wirebonds coupling the second side of the ISP with the first side of the substrate, wherein the first plurality of wirebonds is encapsulated by the first mold compound. 3. The package of claim 1, wherein the second side of the ISP is electrically coupled with the substrate through one or more electrical connectors. 4. The package of claim 1, further comprising a second plurality of wirebonds coupling the second side of the image sensor with the first side of the substrate, wherein the second plurality of wirebonds is encapsulated by the polymeric compound. 5. The package of claim 1, wherein the second side of the image sensor is electrically coupled with the substrate through one or more electrical connectors. 6. The package of claim 1, wherein a perimeter of the second side of the ISP is smaller than a perimeter of the first side of the image sensor. 7. The package of claim 1, wherein the entirety of the first side of the image sensor is directly supported by the first mold compound. 8. An image sensor package comprising:
a substrate comprising a first side and a second side; an image signal processor (ISP) comprising a first side and a second side, wherein the first side is coupled to the first side of the substrate; a first mold compound encapsulating the second side of the ISP, wherein the first mold compound encapsulates a first plurality of electrical connectors coupled to the first side of the substrate and to the second side of the ISP; an image sensor comprising a first side and a second side, wherein the first side is coupled to the first mold compound and the second side is electrically coupled to the substrate; an optically transmissive cover coupled to the second side of the image sensor; and a polymeric compound encapsulating a second plurality of electrical connectors coupled to the first side of the substrate and the second side of the image sensor; wherein a perimeter of the second side of the ISP is smaller than a perimeter of the first side of the image sensor; and wherein a perimeter of the first side of the image sensor is substantially the same size as a perimeter of the first mold compound. 9. The package of claim 8, wherein the encapsulant is a liquid encapsulant. 10. The package of claim 8, wherein the encapsulant is a second mold compound. 11. The package of claim 8, further comprising a plurality of electrical contacts coupled to the second side of the substrate. 12. The package of claim 8, further comprising a thermal conductive layer coupled between the first side of the substrate and the first side of the ISP. 13. The package of claim 8, wherein a thickness of the ISP and a thickness of the image sensor are each less than 100 micrometers. 14. The package of claim 8, wherein the first mold compound entirely covers the second side, a third side, a fourth side, a fifth side, and a sixth side of the ISP. 15. A method of forming an image sensor package comprising:
die bonding a first side of an image signal processor (ISP) to a first side of a substrate; electrically coupling a second side of the ISP to the first side of the substrate; forming a first mold compound over the second side of the ISP, the first mold compound comprising a flat image sensor mounting surface; coupling a first side of an image sensor to the flat image sensor mounting surface, wherein the entire first side of the image sensor is directly coupled to the first mold compound; electrically coupling a second side of the image sensor with the substrate; coupling an optically transmissive cover to the second side of the image sensor; and encapsulating a polymer material over a portion of the substrate, the first mold compound, the image sensor, and a portion of the optically transmissive cover. 16. The method of claim 15, further comprising forming a plurality of electrical contacts to a second side of the substrate. 17. The method of claim 15, wherein the flat image sensor mounting surface is formed by applying die attach film. 18. The method of claim 15, wherein the first mold compound is formed using one of a compression molding technique and a transfer molding technique. 19. The method of claim 15, further comprising thinning one of the ISP, the image sensor, and both the ISP and the image sensor. 20. The method of claim 15, wherein a perimeter of the flat image sensor mounting surface is substantially coextensive with a perimeter of the first side of the image sensor. | 2,800 |
12,058 | 12,058 | 16,204,097 | 2,813 | Implementations of semiconductor packages may include: a substrate coupled to one or more die and to one or more connectors, a glass lid coupled over one or more die by an adhesive and a housing comprising one or more sides and a bottom opening and a top opening. The substrate may be coupled to the housing at the bottom opening and the glass lid may be coupled under the housing at the top opening. | 1. A method of making a semiconductor package, the method comprising:
providing a substrate; coupling one or more die to the substrate; electrically coupling the one or more die to the substrate using one or more connectors; encapsulating one of the one or more connectors and at least a portion of one of the one or more die using a mold compound; coupling an additional die to one of the one or more die after encapsulating at least a portion of the one or the one or more die; and electrically coupling the additional die to the substrate with one or more connectors. 2. The method of claim 1, wherein the substrate is a ball grid array substrate. 3. The method of claim 1, further comprising coupling a housing to the substrate. 4. The method of claim 3, wherein the additional die comprises a perimeter greater than a perimeter of a die of the one or more die. 5. The method of claim 1, wherein a plurality of ball mounts is coupled to a second side of the substrate opposing a side of the substrate coupled to the die. 6. The method of claim 3, further comprising coupling one or more lenses to the housing in an optical path of an optically transmissive lid. 7. A method of making a semiconductor package, the method comprising:
providing a substrate; coupling a first die to the substrate; electrically coupling the first die to the substrate using one or more connectors; encapsulating one of the one or more connectors and at least a portion of the first die using a mold compound; coupling a second die to the first die after encapsulating at least a portion of the first die; and electrically coupling the second die to the substrate with one or more connectors. 8. The method of claim 7, wherein the substrate is a ball grid array substrate. 9. The method of claim 7, wherein the second die comprises a perimeter greater than a perimeter of the first die. 10. The method of claim 7, further comprising coupling a housing to the substrate at a bottom opening of the housing and over the glass lid at a top opening of the housing using an adhesive. 11. The method of claim 7, wherein a plurality of ball mounts is coupled to a second side of the substrate opposing a side of the substrate coupled to the die. 12. The method of claim 10, further comprising coupling one or more lenses to the housing in an optical path of an optically transmissive lid. 13. A method of making a semiconductor package, the method comprising:
providing a substrate; coupling a first die to the substrate; electrically coupling the first die to the substrate using one or more connectors; encapsulating one of the one or more connectors and at least a portion of the first die using a mold compound; coupling a second die over the first die after encapsulating at least a portion of the first die; electrically coupling the second die to the substrate with one or more connectors; and coupling a housing to the substrate at a bottom opening of the housing and over an optically transparent or translucent lid at a top opening of the housing using an adhesive. 14. The method of claim 13, wherein the substrate is a ball grid array substrate. 15. The method of claim 13, wherein the housing is made of an opaque material. 16. The method of claim 13, wherein the housing is formed through one of injection molding, transfer molding and any combination thereof. 17. The method of claim 13, wherein a plurality of ball mounts is coupled to a second side of the substrate opposing a side of the substrate coupled to the die. 18. The method of claim 13, further comprising coupling one or more lenses to the housing in an optical path of the optically transparent or translucent lid. 19. The method of claim 13, wherein an entire surface of the second die contacts the mold compound. 20. The method of claim 13, wherein the second die comprises a perimeter greater than a perimeter of the first die. | Implementations of semiconductor packages may include: a substrate coupled to one or more die and to one or more connectors, a glass lid coupled over one or more die by an adhesive and a housing comprising one or more sides and a bottom opening and a top opening. The substrate may be coupled to the housing at the bottom opening and the glass lid may be coupled under the housing at the top opening.1. A method of making a semiconductor package, the method comprising:
providing a substrate; coupling one or more die to the substrate; electrically coupling the one or more die to the substrate using one or more connectors; encapsulating one of the one or more connectors and at least a portion of one of the one or more die using a mold compound; coupling an additional die to one of the one or more die after encapsulating at least a portion of the one or the one or more die; and electrically coupling the additional die to the substrate with one or more connectors. 2. The method of claim 1, wherein the substrate is a ball grid array substrate. 3. The method of claim 1, further comprising coupling a housing to the substrate. 4. The method of claim 3, wherein the additional die comprises a perimeter greater than a perimeter of a die of the one or more die. 5. The method of claim 1, wherein a plurality of ball mounts is coupled to a second side of the substrate opposing a side of the substrate coupled to the die. 6. The method of claim 3, further comprising coupling one or more lenses to the housing in an optical path of an optically transmissive lid. 7. A method of making a semiconductor package, the method comprising:
providing a substrate; coupling a first die to the substrate; electrically coupling the first die to the substrate using one or more connectors; encapsulating one of the one or more connectors and at least a portion of the first die using a mold compound; coupling a second die to the first die after encapsulating at least a portion of the first die; and electrically coupling the second die to the substrate with one or more connectors. 8. The method of claim 7, wherein the substrate is a ball grid array substrate. 9. The method of claim 7, wherein the second die comprises a perimeter greater than a perimeter of the first die. 10. The method of claim 7, further comprising coupling a housing to the substrate at a bottom opening of the housing and over the glass lid at a top opening of the housing using an adhesive. 11. The method of claim 7, wherein a plurality of ball mounts is coupled to a second side of the substrate opposing a side of the substrate coupled to the die. 12. The method of claim 10, further comprising coupling one or more lenses to the housing in an optical path of an optically transmissive lid. 13. A method of making a semiconductor package, the method comprising:
providing a substrate; coupling a first die to the substrate; electrically coupling the first die to the substrate using one or more connectors; encapsulating one of the one or more connectors and at least a portion of the first die using a mold compound; coupling a second die over the first die after encapsulating at least a portion of the first die; electrically coupling the second die to the substrate with one or more connectors; and coupling a housing to the substrate at a bottom opening of the housing and over an optically transparent or translucent lid at a top opening of the housing using an adhesive. 14. The method of claim 13, wherein the substrate is a ball grid array substrate. 15. The method of claim 13, wherein the housing is made of an opaque material. 16. The method of claim 13, wherein the housing is formed through one of injection molding, transfer molding and any combination thereof. 17. The method of claim 13, wherein a plurality of ball mounts is coupled to a second side of the substrate opposing a side of the substrate coupled to the die. 18. The method of claim 13, further comprising coupling one or more lenses to the housing in an optical path of the optically transparent or translucent lid. 19. The method of claim 13, wherein an entire surface of the second die contacts the mold compound. 20. The method of claim 13, wherein the second die comprises a perimeter greater than a perimeter of the first die. | 2,800 |
12,059 | 12,059 | 15,507,431 | 2,847 | A reinforcing member for a flexible printed wiring board allows a ground wiring pattern of the flexible printed wiring board to conduct with an external ground potential. The reinforcing member includes a metal base and a nickel layer formed on a surface of the metal base. The nickel layer includes phosphorus in a range from 5.0 percent by mass to 20.0 percent by mass, the rest of the nickel layer is nickel and inevitable impurities, and the nickel layer is 0.2 μm to 0.9 μm thick. | 1. A reinforcing member for a flexible printed wiring board, which allows a ground wiring pattern of the flexible printed wiring board to conduct with an external ground potential, the reinforcing member comprising:
a metal base; and a nickel layer formed on a surface of the metal base, the nickel layer including phosphorus in a range from 5 percent by mass to 20 percent by mass, the rest of the nickel layer being nickel and inevitable impurities, and the nickel layer being 0.2 μm to 0.9 μm thick. 2. The reinforcing member according to claim 1, wherein, the metal base is made of stainless steel, aluminum, or aluminum alloy. 3. The reinforcing member according to claim 1, further comprising a conductive adhesive layer which is provided on the ground wiring pattern side of the metal base. 4. A flexible printed wiring board comprising the reinforcing member of claim 1. 5. The reinforcing member according to claim 2, further comprising a conductive adhesive layer which is provided on the ground wiring pattern side of the metal base. 6. A flexible printed wiring board comprising the reinforcing member of claim 2. 7. A flexible printed wiring board comprising the reinforcing member of claim 3. 8. A flexible printed wiring board comprising the reinforcing member of claim 5. | A reinforcing member for a flexible printed wiring board allows a ground wiring pattern of the flexible printed wiring board to conduct with an external ground potential. The reinforcing member includes a metal base and a nickel layer formed on a surface of the metal base. The nickel layer includes phosphorus in a range from 5.0 percent by mass to 20.0 percent by mass, the rest of the nickel layer is nickel and inevitable impurities, and the nickel layer is 0.2 μm to 0.9 μm thick.1. A reinforcing member for a flexible printed wiring board, which allows a ground wiring pattern of the flexible printed wiring board to conduct with an external ground potential, the reinforcing member comprising:
a metal base; and a nickel layer formed on a surface of the metal base, the nickel layer including phosphorus in a range from 5 percent by mass to 20 percent by mass, the rest of the nickel layer being nickel and inevitable impurities, and the nickel layer being 0.2 μm to 0.9 μm thick. 2. The reinforcing member according to claim 1, wherein, the metal base is made of stainless steel, aluminum, or aluminum alloy. 3. The reinforcing member according to claim 1, further comprising a conductive adhesive layer which is provided on the ground wiring pattern side of the metal base. 4. A flexible printed wiring board comprising the reinforcing member of claim 1. 5. The reinforcing member according to claim 2, further comprising a conductive adhesive layer which is provided on the ground wiring pattern side of the metal base. 6. A flexible printed wiring board comprising the reinforcing member of claim 2. 7. A flexible printed wiring board comprising the reinforcing member of claim 3. 8. A flexible printed wiring board comprising the reinforcing member of claim 5. | 2,800 |
12,060 | 12,060 | 16,262,675 | 2,875 | The invention describes a lighting assembly for use in a lighting arrangement of a vehicle. The lighting assembly includes a projection lens and a light source array, wherein a center of the light source array and an optical axis of the projection lens have a lateral offset, and light sources of the light source array are individually controllable to adjust a swivel angle of a light beam generated by that lighting assembly. The invention further describes a controller for controlling the light sources of such a lighting assembly. The invention also describes a lighting arrangement for a vehicle, comprising such a lighting assembly and such a controller for controlling the light sources of the lighting assembly to adjust the swivel angle of the light beam. The invention also describes a method of generating a front beam for a vehicle comprising such a lighting assembly. | 1. A lighting assembly for use in a lighting arrangement of a vehicle, comprising a projection lens and a light source array, wherein:
a center of the light source array and an optical axis of the projection lens have a lateral offset; and light sources of the light source array are individually controllable to adjust a swivel angle of a light beam generated by that lighting assembly. 2. The lighting assembly of claim 1, wherein the optical axis of the projection lens is arranged parallel to a longitudinal axis of the vehicle. 3. The lighting assembly of claim 1, wherein the lighting assembly generates a front left beam and the center of the light source array is offset to the right of the optical axis of the projection lens. 4. The lighting assembly according to claim 1, wherein the light source array is arranged essentially perpendicularly to the optical axis of the projection lens. 5. The lighting assembly according to claim 1, wherein a light source of the light source array comprises an LED. 6. A controller for controlling light sources of the light source array in the lighting assembly according to claim 1 to adjust the swivel angle of a light beam generated by that lighting assembly, the controller comprising a control signal generation unit for generating a control signal for selectively activating specific light sources of the lighting source array on the basis of the later offset between the center of the light source array and the optical axis of the projection lens. 7. A lighting arrangement for a vehicle, comprising a lighting assembly for generating a light beam, and a controller according to claim 6 for controlling the light sources of the light source array to adjust the swivel angle of the light beam. 8. A method of generating a front beam for a vehicle comprising a lighting assembly for generating the beam, wherein (1) a center of a light source array and an optical axis of a projection lens have a lateral offset and (2) the projection is positioned to receive and project light from each of the light sources in the array, the method comprising:
sensing an angle of turning of the vehicle; and generating a control signal for the lighting assembly on the basis of the asymmetry displacement and on the basis of the angle of turning to selectively activate specific light sources of the light source array to adjust a swivel angle of the beam. 9. The method of claim 8, wherein the optical axis of the projection lens is arranged parallel to a longitudinal axis of the vehicle. 10. The method of claim 8, wherein the lighting assembly generates a front left beam and the center of the light source array is offset to the right of the optical axis of the projection lens. 11. The method of claim 8, wherein the light source array is arranged essentially perpendicularly to the optical axis of the projection lens. 12. The method of claim 8, wherein a light source of the light source array comprises an LED. | The invention describes a lighting assembly for use in a lighting arrangement of a vehicle. The lighting assembly includes a projection lens and a light source array, wherein a center of the light source array and an optical axis of the projection lens have a lateral offset, and light sources of the light source array are individually controllable to adjust a swivel angle of a light beam generated by that lighting assembly. The invention further describes a controller for controlling the light sources of such a lighting assembly. The invention also describes a lighting arrangement for a vehicle, comprising such a lighting assembly and such a controller for controlling the light sources of the lighting assembly to adjust the swivel angle of the light beam. The invention also describes a method of generating a front beam for a vehicle comprising such a lighting assembly.1. A lighting assembly for use in a lighting arrangement of a vehicle, comprising a projection lens and a light source array, wherein:
a center of the light source array and an optical axis of the projection lens have a lateral offset; and light sources of the light source array are individually controllable to adjust a swivel angle of a light beam generated by that lighting assembly. 2. The lighting assembly of claim 1, wherein the optical axis of the projection lens is arranged parallel to a longitudinal axis of the vehicle. 3. The lighting assembly of claim 1, wherein the lighting assembly generates a front left beam and the center of the light source array is offset to the right of the optical axis of the projection lens. 4. The lighting assembly according to claim 1, wherein the light source array is arranged essentially perpendicularly to the optical axis of the projection lens. 5. The lighting assembly according to claim 1, wherein a light source of the light source array comprises an LED. 6. A controller for controlling light sources of the light source array in the lighting assembly according to claim 1 to adjust the swivel angle of a light beam generated by that lighting assembly, the controller comprising a control signal generation unit for generating a control signal for selectively activating specific light sources of the lighting source array on the basis of the later offset between the center of the light source array and the optical axis of the projection lens. 7. A lighting arrangement for a vehicle, comprising a lighting assembly for generating a light beam, and a controller according to claim 6 for controlling the light sources of the light source array to adjust the swivel angle of the light beam. 8. A method of generating a front beam for a vehicle comprising a lighting assembly for generating the beam, wherein (1) a center of a light source array and an optical axis of a projection lens have a lateral offset and (2) the projection is positioned to receive and project light from each of the light sources in the array, the method comprising:
sensing an angle of turning of the vehicle; and generating a control signal for the lighting assembly on the basis of the asymmetry displacement and on the basis of the angle of turning to selectively activate specific light sources of the light source array to adjust a swivel angle of the beam. 9. The method of claim 8, wherein the optical axis of the projection lens is arranged parallel to a longitudinal axis of the vehicle. 10. The method of claim 8, wherein the lighting assembly generates a front left beam and the center of the light source array is offset to the right of the optical axis of the projection lens. 11. The method of claim 8, wherein the light source array is arranged essentially perpendicularly to the optical axis of the projection lens. 12. The method of claim 8, wherein a light source of the light source array comprises an LED. | 2,800 |
12,061 | 12,061 | 15,543,859 | 2,832 | The invention relates to a power management system for one or more wind turbines where the one or more wind turbines are connected to a power supply with a limited capacity for providing power to a number of power consuming units, such as to an emergency power supply arranged for providing power in a grid loss situation. The power management system comprises a dispatcher connected to the power supply to access an available capacity of the power supply, and a requester connected to at least one power consuming unit, the requester being arranged to control the power consumption of the power consuming unit by either allows or deny the power consuming unit to consume power. | 1. A power management system for one or more wind turbines, the one or more wind turbines being connected to a power supply with a limited capacity, and the one or more wind turbines each comprising a number of power consuming units; wherein the power management system comprises:
a dispatcher connected to the power supply to access an available capacity of the power supply; a requester connected to a power consuming unit, the requester being arranged to control the power consumption of the power consuming unit; wherein the requester upon a need of the power consuming unit for consuming power forwards a request to the dispatcher for an amount of power, and wherein the dispatcher based on the available capacity of the power supply either allows the power consuming unit to consume the amount of power or denies the power consuming unit to consume the amount of power, and wherein the dispatcher is configured to send information to the requester about a base load, and wherein the power consuming unit is allowed to consume an amount of power up to the base load without the requester forwarding a respective request to the dispatcher. 2. The system according to claim 1, wherein the request at least comprises a power demand and a priority. 3. The system according to claim 1, wherein the request comprises a time period. 4. The system according to claim 1, wherein the dispatcher, upon receipt of a request, sends information to the requester including a permission to consume a specified amount of power. 5. The system according to claim 1, wherein the dispatcher allows the power consuming unit to consume the amount of power or denies the power consuming unit to consume the amount of power based on at least one further input directed to an operational state or physical state of one or more of the wind turbines or a power consuming unit 6. The system according to claim 1, wherein the power supply is an emergency power supply arranged for supplying power in the event of the one or more turbines being disconnected from the grid. 7. The system according to claim 1, wherein the requester is arranged to connect the power consuming unit to the power supply and draw the allow amount of power from the power supply when allowed by the dispatcher, and arranged to disconnect the power consuming unit from the power supply when denied by the dispatcher to consume power. 8. The system according to claim 1, wherein the one or more turbines is one turbine, and wherein the power supply is a single turbine emergency power supply. 9. The system according to claim 1, wherein the one or more turbines are two or more turbines arranged as a wind power plant, and wherein the power supply is a wind power plant emergency power supply. 10. The system according to claim 1, wherein the power supply is a diesel generator. 11. The system according to claim 1, wherein the power supply is a battery supply. 12. The system according to claim 10, wherein the battery supply is based on rechargeable batteries. 13. (canceled) 14. A method of power management of one or more wind turbines, the one or more wind turbines being connected to a power supply with a limited capacity, and the one or more wind turbines each comprising a number of power consuming units; the method comprising:
receiving an instruction to operate a power consuming unit; determining an amount of power for operating the power consuming unit; determining a base load up to which the unit is allowed to consume power; if the amount of power is less than the base load allow the power consuming unit to consume the amount of power; and if the amount of power is more than the base load:
request an amount of power for operating the power consuming unit;
access an available capacity of the power supply;
determine whether the amount of power can be used based on the available capacity of the power supply, and generate a request result; and
either allow the power consuming unit to consume the amount of power or deny the power consuming unit to consume the amount of power in accordance with the request result. 15. A wind turbine system comprising one or more wind turbines and a power management system for the one or more wind turbines, the one or more wind turbines being connected to a power supply with a limited capacity, and the one or more wind turbines each comprising a number of power consuming units; wherein the power management system comprises:
a dispatcher connected to the power supply to access an available capacity of the power supply; a requester connected to at least one power consuming unit, the requester being arranged to control the power consumption of the power consuming unit; wherein the requester upon a need of a power consuming unit for consuming power forwards a request to the dispatcher for an amount of power, and wherein the dispatcher based on the available capacity of the power supply either allows the power consuming unit to consume the amount of power or denies the power consuming unit to consume the amount of power and wherein the dispatcher is configured to send information to the requester about a base load, and wherein a power consuming unit is allowed to consume an amount of power up to the base load without the requester forwarding a request for an amount of power to the dispatcher. | The invention relates to a power management system for one or more wind turbines where the one or more wind turbines are connected to a power supply with a limited capacity for providing power to a number of power consuming units, such as to an emergency power supply arranged for providing power in a grid loss situation. The power management system comprises a dispatcher connected to the power supply to access an available capacity of the power supply, and a requester connected to at least one power consuming unit, the requester being arranged to control the power consumption of the power consuming unit by either allows or deny the power consuming unit to consume power.1. A power management system for one or more wind turbines, the one or more wind turbines being connected to a power supply with a limited capacity, and the one or more wind turbines each comprising a number of power consuming units; wherein the power management system comprises:
a dispatcher connected to the power supply to access an available capacity of the power supply; a requester connected to a power consuming unit, the requester being arranged to control the power consumption of the power consuming unit; wherein the requester upon a need of the power consuming unit for consuming power forwards a request to the dispatcher for an amount of power, and wherein the dispatcher based on the available capacity of the power supply either allows the power consuming unit to consume the amount of power or denies the power consuming unit to consume the amount of power, and wherein the dispatcher is configured to send information to the requester about a base load, and wherein the power consuming unit is allowed to consume an amount of power up to the base load without the requester forwarding a respective request to the dispatcher. 2. The system according to claim 1, wherein the request at least comprises a power demand and a priority. 3. The system according to claim 1, wherein the request comprises a time period. 4. The system according to claim 1, wherein the dispatcher, upon receipt of a request, sends information to the requester including a permission to consume a specified amount of power. 5. The system according to claim 1, wherein the dispatcher allows the power consuming unit to consume the amount of power or denies the power consuming unit to consume the amount of power based on at least one further input directed to an operational state or physical state of one or more of the wind turbines or a power consuming unit 6. The system according to claim 1, wherein the power supply is an emergency power supply arranged for supplying power in the event of the one or more turbines being disconnected from the grid. 7. The system according to claim 1, wherein the requester is arranged to connect the power consuming unit to the power supply and draw the allow amount of power from the power supply when allowed by the dispatcher, and arranged to disconnect the power consuming unit from the power supply when denied by the dispatcher to consume power. 8. The system according to claim 1, wherein the one or more turbines is one turbine, and wherein the power supply is a single turbine emergency power supply. 9. The system according to claim 1, wherein the one or more turbines are two or more turbines arranged as a wind power plant, and wherein the power supply is a wind power plant emergency power supply. 10. The system according to claim 1, wherein the power supply is a diesel generator. 11. The system according to claim 1, wherein the power supply is a battery supply. 12. The system according to claim 10, wherein the battery supply is based on rechargeable batteries. 13. (canceled) 14. A method of power management of one or more wind turbines, the one or more wind turbines being connected to a power supply with a limited capacity, and the one or more wind turbines each comprising a number of power consuming units; the method comprising:
receiving an instruction to operate a power consuming unit; determining an amount of power for operating the power consuming unit; determining a base load up to which the unit is allowed to consume power; if the amount of power is less than the base load allow the power consuming unit to consume the amount of power; and if the amount of power is more than the base load:
request an amount of power for operating the power consuming unit;
access an available capacity of the power supply;
determine whether the amount of power can be used based on the available capacity of the power supply, and generate a request result; and
either allow the power consuming unit to consume the amount of power or deny the power consuming unit to consume the amount of power in accordance with the request result. 15. A wind turbine system comprising one or more wind turbines and a power management system for the one or more wind turbines, the one or more wind turbines being connected to a power supply with a limited capacity, and the one or more wind turbines each comprising a number of power consuming units; wherein the power management system comprises:
a dispatcher connected to the power supply to access an available capacity of the power supply; a requester connected to at least one power consuming unit, the requester being arranged to control the power consumption of the power consuming unit; wherein the requester upon a need of a power consuming unit for consuming power forwards a request to the dispatcher for an amount of power, and wherein the dispatcher based on the available capacity of the power supply either allows the power consuming unit to consume the amount of power or denies the power consuming unit to consume the amount of power and wherein the dispatcher is configured to send information to the requester about a base load, and wherein a power consuming unit is allowed to consume an amount of power up to the base load without the requester forwarding a request for an amount of power to the dispatcher. | 2,800 |
12,062 | 12,062 | 15,903,184 | 2,883 | An optical communication cable includes a cable jacket formed from a first material, a plurality of core elements located within the cable jacket, and an armor layer surrounding the plurality of core elements within the cable jacket, wherein the armor layer is a multi-piece layer having a first armor segment extending a portion of the distance around the plurality of core elements and a second armor segment extending a portion of the distance around the plurality of core elements, wherein a first lateral edge of the first armor segment is adjacent a first lateral edge of the second armor segment and a second lateral edge of the first armor segment is adjacent a second lateral edge of the second armor segment such that the combination of the first armor segment and the second armor segment completely surround the plurality of core elements. | 1. An optical communication cable comprising:
a cable jacket formed from a first material; a plurality of core elements located within the cable jacket; and an armor layer surrounding the plurality of core elements within the cable jacket, wherein the armor layer is a multi-piece layer comprising:
a first armor segment extending a portion of the distance around the plurality of core elements, the first armor segment having a first lateral edge and an opposing second lateral edge; and
a second armor segment extending a portion of the distance around the plurality of core elements, the second armor segment having a first lateral edge and an opposing second lateral edge;
wherein the first lateral edge of the first armor segment is adjacent the first lateral edge of the second armor segment and the second lateral edge of the first armor segment is adjacent the second lateral edge of the second armor segment such that the combination of the first armor segment and the second armor segment completely surround the plurality of core elements. 2. The optical communication cable of claim 1, wherein the plurality of core elements comprises a single buffer tube. 3. The optical communication cable of claim 2, wherein the plurality of core elements further comprises a stack of fiber optic ribbons surrounded by the single buffer tube. 4. The optical communication cable of claim 1, wherein the first lateral edge of the first armor segment is coupled to the first lateral edge of the second armor segment and the second lateral edge of the first armor segment is coupled to the second lateral edge of the second armor segment. 5. The optical communication cable of claim 1, further comprising a first elongate strength member and a second elongate strength member embedded within the first material of the cable. 6. The optical communication cable of claim 5, wherein the first elongate strength member and the second elongate strength member act to couple the first armor segment and the second armor segment to form the armor layer. 7. The optical communication of claim 6, wherein the first elongate strength member comprises a first pair of elongate strength members and the second elongate strength member comprises a second pair of elongate strength members. 8. The optical communication cable of claim 7, wherein the first elongate strength member and the second elongate strength member are glass-reinforced plastic rods. 9. The optical communications cable of 3, further comprising a water-blocking layer surrounding the stack of fiber optic ribbons. 10. The optical communication cable of claim 9, wherein the water-blocking layer comprises a water-blocking tape, foam or gel. 11. The optical communication cable of claim 1, wherein the cable jacket comprises at least one access feature for opening the cable jacket to access the elongate optical transmission element. 12. The optical communication cable of claim 11, wherein the access feature comprises a coextruded material with low bonding relative to the first material of the cable jacket. 13. The optical communication cable of claim 11, wherein the first lateral edge of the first armor segment overlaps the first lateral edge of the second armor segment to define a first overlap section and the second lateral edge of the first armor segment overlaps the second lateral edge of the second armor segment to define a second overlap section, and wherein the at least one access feature is aligned with the first overlap section or the second overlap section. 14. The optical communication cable of claim 11, wherein the access feature is a ripcord embedded in the first material of the cable jacket. 15. The optical communication cable of claim 1, wherein the plurality of core elements comprise:
an elongate central strength member; and a plurality of elongate optical transmission elements wrapped around the elongate central strength member such that a portion of the length of the plurality of wrapped elongate optical transmission elements form a spiral pattern around the elongate central strength member; a film formed from an extruded second material, the film surrounding the plurality of elongate optical transmission elements and providing an inwardly directed force on to the plurality of elongate optical transmission elements such that the film acts to maintain the spiral pattern of the elongate optical transmission elements, wherein the armor layer is wrapped around the film such that an inner surface of the armor layer is bonded to an outer surface of the film such that the armor layer remains bound to the film upon opening of the cable jacket to expose the optical transmission elements within the cable. 16. The optical communication cable of claim 15, wherein the extruded first material is different than the extruded second material, wherein at least one of the plurality of optical transmission elements includes a buffer tube surrounding an optical fiber, wherein the spiral pattern is an S-Z stranding pattern. 17. The optical communication cable of claim 16, wherein an outer surface of the armor layer is bonded to the inner surface of the cable jacket, wherein the inner surface of the armor layer is bonded to the outer surface of the film by at least one of a bonding agent and a thermally activated bond, wherein the outer surface of the armor layer is bonded to the inner surface of the cable jacket by at least one of a bonding agent and a thermally activated bond. 18. The optical communication cable of claim 17, wherein the extruded first material is a polyethylene material and the extruded second material is at least one of a polyethylene material and a polyester material, wherein the armor layer is formed from a corrugated metal material. | An optical communication cable includes a cable jacket formed from a first material, a plurality of core elements located within the cable jacket, and an armor layer surrounding the plurality of core elements within the cable jacket, wherein the armor layer is a multi-piece layer having a first armor segment extending a portion of the distance around the plurality of core elements and a second armor segment extending a portion of the distance around the plurality of core elements, wherein a first lateral edge of the first armor segment is adjacent a first lateral edge of the second armor segment and a second lateral edge of the first armor segment is adjacent a second lateral edge of the second armor segment such that the combination of the first armor segment and the second armor segment completely surround the plurality of core elements.1. An optical communication cable comprising:
a cable jacket formed from a first material; a plurality of core elements located within the cable jacket; and an armor layer surrounding the plurality of core elements within the cable jacket, wherein the armor layer is a multi-piece layer comprising:
a first armor segment extending a portion of the distance around the plurality of core elements, the first armor segment having a first lateral edge and an opposing second lateral edge; and
a second armor segment extending a portion of the distance around the plurality of core elements, the second armor segment having a first lateral edge and an opposing second lateral edge;
wherein the first lateral edge of the first armor segment is adjacent the first lateral edge of the second armor segment and the second lateral edge of the first armor segment is adjacent the second lateral edge of the second armor segment such that the combination of the first armor segment and the second armor segment completely surround the plurality of core elements. 2. The optical communication cable of claim 1, wherein the plurality of core elements comprises a single buffer tube. 3. The optical communication cable of claim 2, wherein the plurality of core elements further comprises a stack of fiber optic ribbons surrounded by the single buffer tube. 4. The optical communication cable of claim 1, wherein the first lateral edge of the first armor segment is coupled to the first lateral edge of the second armor segment and the second lateral edge of the first armor segment is coupled to the second lateral edge of the second armor segment. 5. The optical communication cable of claim 1, further comprising a first elongate strength member and a second elongate strength member embedded within the first material of the cable. 6. The optical communication cable of claim 5, wherein the first elongate strength member and the second elongate strength member act to couple the first armor segment and the second armor segment to form the armor layer. 7. The optical communication of claim 6, wherein the first elongate strength member comprises a first pair of elongate strength members and the second elongate strength member comprises a second pair of elongate strength members. 8. The optical communication cable of claim 7, wherein the first elongate strength member and the second elongate strength member are glass-reinforced plastic rods. 9. The optical communications cable of 3, further comprising a water-blocking layer surrounding the stack of fiber optic ribbons. 10. The optical communication cable of claim 9, wherein the water-blocking layer comprises a water-blocking tape, foam or gel. 11. The optical communication cable of claim 1, wherein the cable jacket comprises at least one access feature for opening the cable jacket to access the elongate optical transmission element. 12. The optical communication cable of claim 11, wherein the access feature comprises a coextruded material with low bonding relative to the first material of the cable jacket. 13. The optical communication cable of claim 11, wherein the first lateral edge of the first armor segment overlaps the first lateral edge of the second armor segment to define a first overlap section and the second lateral edge of the first armor segment overlaps the second lateral edge of the second armor segment to define a second overlap section, and wherein the at least one access feature is aligned with the first overlap section or the second overlap section. 14. The optical communication cable of claim 11, wherein the access feature is a ripcord embedded in the first material of the cable jacket. 15. The optical communication cable of claim 1, wherein the plurality of core elements comprise:
an elongate central strength member; and a plurality of elongate optical transmission elements wrapped around the elongate central strength member such that a portion of the length of the plurality of wrapped elongate optical transmission elements form a spiral pattern around the elongate central strength member; a film formed from an extruded second material, the film surrounding the plurality of elongate optical transmission elements and providing an inwardly directed force on to the plurality of elongate optical transmission elements such that the film acts to maintain the spiral pattern of the elongate optical transmission elements, wherein the armor layer is wrapped around the film such that an inner surface of the armor layer is bonded to an outer surface of the film such that the armor layer remains bound to the film upon opening of the cable jacket to expose the optical transmission elements within the cable. 16. The optical communication cable of claim 15, wherein the extruded first material is different than the extruded second material, wherein at least one of the plurality of optical transmission elements includes a buffer tube surrounding an optical fiber, wherein the spiral pattern is an S-Z stranding pattern. 17. The optical communication cable of claim 16, wherein an outer surface of the armor layer is bonded to the inner surface of the cable jacket, wherein the inner surface of the armor layer is bonded to the outer surface of the film by at least one of a bonding agent and a thermally activated bond, wherein the outer surface of the armor layer is bonded to the inner surface of the cable jacket by at least one of a bonding agent and a thermally activated bond. 18. The optical communication cable of claim 17, wherein the extruded first material is a polyethylene material and the extruded second material is at least one of a polyethylene material and a polyester material, wherein the armor layer is formed from a corrugated metal material. | 2,800 |
12,063 | 12,063 | 15,364,715 | 2,899 | A semiconductor device has a plurality of interconnected modular units to form a 3D semiconductor package. Each modular unit is implemented as a vertical component or a horizontal component. The modular units are interconnected through a vertical conduction path and lateral conduction path within the vertical component or horizontal component. The vertical component and horizontal component each have an interconnect interposer or semiconductor die. A first conductive via is formed vertically through the interconnect interposer. A second conductive via is formed laterally through the interconnect interposer. The interconnect interposer can be programmable. A plurality of protrusions and recesses are formed on the vertical component or horizontal component, and a plurality of recesses on the vertical component or horizontal component. The protrusions are inserted into the recesses to interlock the vertical component and horizontal component. The 3D semiconductor package can be formed with multiple tiers of vertical components and horizontal components. | 1. A method of making a semiconductor device, comprising:
providing one or more vertical components; providing one or more horizontal components; and interconnecting the vertical components and horizontal components to form a 3D semiconductor package. 2. The method of claim 1, wherein the vertical components include an interconnect interposer or semiconductor die. 3. The method of claim 2, further including:
forming a conductive via vertically through the interconnect interposer; and forming a conductive layer laterally through the interconnect interposer. 4. The method of claim 2, wherein the interconnect interposer is programmable. 5. The method of claim 1, wherein the horizontal components include an interconnect interposer or semiconductor die. 6. The method of claim 1, further including:
forming a plurality of protrusions on the vertical component or horizontal component; forming a plurality of recesses on the vertical component or horizontal component; and inserting the protrusions into the recesses to interlock the vertical component and horizontal component. 7. A method of making a semiconductor device, comprising:
forming a 3D semiconductor package with a plurality of interconnected modular units, each modular unit implemented as a vertical component or a horizontal component; and electrically connecting the modular units through a vertical conduction path and lateral conduction path within the vertical component or horizontal component. 8. The method of claim 7, wherein the vertical component includes an interconnect interposer or semiconductor die. 9. The method of claim 8, further including:
forming a conductive via vertically through the interconnect interposer; and forming a conductive layer laterally through the interconnect interposer. 10. The method of claim 8, wherein the interconnect interposer is programmable. 11. The method of claim 7, wherein the horizontal component includes an interconnect interposer or semiconductor die. 12. The method of claim 7, further including:
forming a plurality of protrusions on the vertical component or horizontal component; forming a plurality of recesses on the vertical component or horizontal component; and inserting the protrusions into the recesses to interlock the vertical component and horizontal component. 13. The method of claim 7, further including forming the 3D semiconductor package with multiple tiers of vertical components and horizontal components. 14. A semiconductor device, comprising:
a vertical component; and a horizontal component, wherein the vertical component is interconnected to the horizontal component to form a 3D semiconductor package. 15. The semiconductor device of claim 14, wherein the vertical component includes an interconnect interposer or semiconductor die. 16. The semiconductor device of claim 15, further including:
a conductive via formed vertically through the interconnect interposer; and a conductive layer formed laterally through the interconnect interposer. 17. The semiconductor device of claim 15, wherein the interconnect interposer is programmable. 18. The semiconductor device of claim 14, wherein the horizontal component includes an interconnect interposer or semiconductor die. 19. The semiconductor device of claim 14, further including:
a plurality of protrusions formed on the vertical component or horizontal component; and a plurality of recesses formed on the vertical component or horizontal component, wherein the protrusions are inserted into the recesses to interlock the vertical component and horizontal component. 20. The semiconductor device of claim 14, wherein the 3D semiconductor package includes multiple tiers of vertical components and horizontal components. | A semiconductor device has a plurality of interconnected modular units to form a 3D semiconductor package. Each modular unit is implemented as a vertical component or a horizontal component. The modular units are interconnected through a vertical conduction path and lateral conduction path within the vertical component or horizontal component. The vertical component and horizontal component each have an interconnect interposer or semiconductor die. A first conductive via is formed vertically through the interconnect interposer. A second conductive via is formed laterally through the interconnect interposer. The interconnect interposer can be programmable. A plurality of protrusions and recesses are formed on the vertical component or horizontal component, and a plurality of recesses on the vertical component or horizontal component. The protrusions are inserted into the recesses to interlock the vertical component and horizontal component. The 3D semiconductor package can be formed with multiple tiers of vertical components and horizontal components.1. A method of making a semiconductor device, comprising:
providing one or more vertical components; providing one or more horizontal components; and interconnecting the vertical components and horizontal components to form a 3D semiconductor package. 2. The method of claim 1, wherein the vertical components include an interconnect interposer or semiconductor die. 3. The method of claim 2, further including:
forming a conductive via vertically through the interconnect interposer; and forming a conductive layer laterally through the interconnect interposer. 4. The method of claim 2, wherein the interconnect interposer is programmable. 5. The method of claim 1, wherein the horizontal components include an interconnect interposer or semiconductor die. 6. The method of claim 1, further including:
forming a plurality of protrusions on the vertical component or horizontal component; forming a plurality of recesses on the vertical component or horizontal component; and inserting the protrusions into the recesses to interlock the vertical component and horizontal component. 7. A method of making a semiconductor device, comprising:
forming a 3D semiconductor package with a plurality of interconnected modular units, each modular unit implemented as a vertical component or a horizontal component; and electrically connecting the modular units through a vertical conduction path and lateral conduction path within the vertical component or horizontal component. 8. The method of claim 7, wherein the vertical component includes an interconnect interposer or semiconductor die. 9. The method of claim 8, further including:
forming a conductive via vertically through the interconnect interposer; and forming a conductive layer laterally through the interconnect interposer. 10. The method of claim 8, wherein the interconnect interposer is programmable. 11. The method of claim 7, wherein the horizontal component includes an interconnect interposer or semiconductor die. 12. The method of claim 7, further including:
forming a plurality of protrusions on the vertical component or horizontal component; forming a plurality of recesses on the vertical component or horizontal component; and inserting the protrusions into the recesses to interlock the vertical component and horizontal component. 13. The method of claim 7, further including forming the 3D semiconductor package with multiple tiers of vertical components and horizontal components. 14. A semiconductor device, comprising:
a vertical component; and a horizontal component, wherein the vertical component is interconnected to the horizontal component to form a 3D semiconductor package. 15. The semiconductor device of claim 14, wherein the vertical component includes an interconnect interposer or semiconductor die. 16. The semiconductor device of claim 15, further including:
a conductive via formed vertically through the interconnect interposer; and a conductive layer formed laterally through the interconnect interposer. 17. The semiconductor device of claim 15, wherein the interconnect interposer is programmable. 18. The semiconductor device of claim 14, wherein the horizontal component includes an interconnect interposer or semiconductor die. 19. The semiconductor device of claim 14, further including:
a plurality of protrusions formed on the vertical component or horizontal component; and a plurality of recesses formed on the vertical component or horizontal component, wherein the protrusions are inserted into the recesses to interlock the vertical component and horizontal component. 20. The semiconductor device of claim 14, wherein the 3D semiconductor package includes multiple tiers of vertical components and horizontal components. | 2,800 |
12,064 | 12,064 | 15,684,620 | 2,814 | A leadframe wherein the outer sidewalls of the leadframe that are exposed by sawing during singulation are comprised of greater than 50% solder. A leadframe strip wherein the saw streets and the outer surface of the lead frames are comprised of greater than 50% solder. A method of forming a leadframe strip wherein the saw streets and the outer surface of the lead frames are comprised primarily of solder. A method of forming a leadframe strip wherein the saw streets and the outer surface of the lead frames are comprised entirely of solder. | 1. An integrated circuit (IC) package comprising:
a lead frame including a chip pad and a plurality of wire bond pads; an IC chip on the chip pad and electrically connected via wire bond to a horizontal surface of at least one of the plurality of wire bond pads; and a vertical surface of the at least one of the plurality of wire bond pads exposed from the IC package, the vertical surface in a vertical direction, the vertical surface including a base metal of the wire bond pad exposed between solder portions in the vertical direction, and surfaces of the base metal and the solder being coplanar. 2. The IC package of claim 1, wherein the vertical surface includes solder portions on a top edge and a bottom edge with base metal exposed in between, a portion of the top edge coplanar with the horizontal surface and a portion of the bottom edge coplanar with a surface of the IC package opposite and parallel to the horizontal surface. 3. The IC package of claim 1 further comprising a circuit board mechanically and electrically attached to the IC package. 4. The IC package of claim 1, wherein the base metal is one of a copper and a copper alloy. 5. The IC package of claim 1, wherein the IC package is a Quad Flat No-Lead IC package. 6. The IC package of claim 2, wherein the surface of the IC package opposite and parallel to the horizontal surface includes the base metal and a solder exposed from the IC package. 7. The IC package of claim 1 further comprising a plastic compound covering portions of the IC chip, the chip pad and the plurality of wire bond pads. 8. The IC package of claim 7, wherein the plastic compound includes a surface coplanar with the vertical surface. 9. An integrated circuit (IC) package comprising:
a lead frame including a chip pad and a plurality of wire bond pads; an IC chip on the chip pad and electrically connected via wire bond to a surface of at least one of the plurality of wire bond pads; and a sidewall of the at least one of the plurality of wire bond pads exposed from the IC package, the sidewall including a base metal of the wire bond pad between solder portions, wherein surfaces of the base metal and the solder comprise an entire portion of the sidewall, and wherein the base metal and the solder are coplanar. 10. The IC package of claim 9, wherein the solder portions include a rectangular cross sectional shape having angled edges. 11. The IC package of claim 9 further comprising a plastic compound covering portions of the IC chip, the chip pad, and the plurality of wire bond pads. 12. The IC package of claim 9, wherein the surface of at least one of the plurality of wire bond pads includes the base metal. 13. An integrated circuit (IC) package comprising:
a lead frame including a chip pad and a plurality of wire bond pads; an IC chip on the chip pad and electrically connected to a first surface of at least one of the plurality of wire bond pads; and a second surface of the at least one of the plurality of wire bond pads exposed from the IC package, the second surface being at an angle with the first surface, the second surface including a base metal of the wire bond pad exposed between solder portions in a first direction along the second surface, and surfaces of the base metal and the solder being coplanar. 14. The IC package of claim 13, wherein the IC chip is electrically connected to the first surface via wire bonds. 15. The IC package of claim 13, wherein the base metal is one of a copper and a copper alloy. 16. The IC package of claim 13, wherein the IC package is a Quad Flat No-Lead IC package. 17. The IC package of claim 13 further comprising a plastic compound covering portions of the IC chip, the chip pad and the plurality of wire bond pads. 18. The IC package of claim 13, wherein a portion of the chip pad is exposed from the IC package. | A leadframe wherein the outer sidewalls of the leadframe that are exposed by sawing during singulation are comprised of greater than 50% solder. A leadframe strip wherein the saw streets and the outer surface of the lead frames are comprised of greater than 50% solder. A method of forming a leadframe strip wherein the saw streets and the outer surface of the lead frames are comprised primarily of solder. A method of forming a leadframe strip wherein the saw streets and the outer surface of the lead frames are comprised entirely of solder.1. An integrated circuit (IC) package comprising:
a lead frame including a chip pad and a plurality of wire bond pads; an IC chip on the chip pad and electrically connected via wire bond to a horizontal surface of at least one of the plurality of wire bond pads; and a vertical surface of the at least one of the plurality of wire bond pads exposed from the IC package, the vertical surface in a vertical direction, the vertical surface including a base metal of the wire bond pad exposed between solder portions in the vertical direction, and surfaces of the base metal and the solder being coplanar. 2. The IC package of claim 1, wherein the vertical surface includes solder portions on a top edge and a bottom edge with base metal exposed in between, a portion of the top edge coplanar with the horizontal surface and a portion of the bottom edge coplanar with a surface of the IC package opposite and parallel to the horizontal surface. 3. The IC package of claim 1 further comprising a circuit board mechanically and electrically attached to the IC package. 4. The IC package of claim 1, wherein the base metal is one of a copper and a copper alloy. 5. The IC package of claim 1, wherein the IC package is a Quad Flat No-Lead IC package. 6. The IC package of claim 2, wherein the surface of the IC package opposite and parallel to the horizontal surface includes the base metal and a solder exposed from the IC package. 7. The IC package of claim 1 further comprising a plastic compound covering portions of the IC chip, the chip pad and the plurality of wire bond pads. 8. The IC package of claim 7, wherein the plastic compound includes a surface coplanar with the vertical surface. 9. An integrated circuit (IC) package comprising:
a lead frame including a chip pad and a plurality of wire bond pads; an IC chip on the chip pad and electrically connected via wire bond to a surface of at least one of the plurality of wire bond pads; and a sidewall of the at least one of the plurality of wire bond pads exposed from the IC package, the sidewall including a base metal of the wire bond pad between solder portions, wherein surfaces of the base metal and the solder comprise an entire portion of the sidewall, and wherein the base metal and the solder are coplanar. 10. The IC package of claim 9, wherein the solder portions include a rectangular cross sectional shape having angled edges. 11. The IC package of claim 9 further comprising a plastic compound covering portions of the IC chip, the chip pad, and the plurality of wire bond pads. 12. The IC package of claim 9, wherein the surface of at least one of the plurality of wire bond pads includes the base metal. 13. An integrated circuit (IC) package comprising:
a lead frame including a chip pad and a plurality of wire bond pads; an IC chip on the chip pad and electrically connected to a first surface of at least one of the plurality of wire bond pads; and a second surface of the at least one of the plurality of wire bond pads exposed from the IC package, the second surface being at an angle with the first surface, the second surface including a base metal of the wire bond pad exposed between solder portions in a first direction along the second surface, and surfaces of the base metal and the solder being coplanar. 14. The IC package of claim 13, wherein the IC chip is electrically connected to the first surface via wire bonds. 15. The IC package of claim 13, wherein the base metal is one of a copper and a copper alloy. 16. The IC package of claim 13, wherein the IC package is a Quad Flat No-Lead IC package. 17. The IC package of claim 13 further comprising a plastic compound covering portions of the IC chip, the chip pad and the plurality of wire bond pads. 18. The IC package of claim 13, wherein a portion of the chip pad is exposed from the IC package. | 2,800 |
12,065 | 12,065 | 15,230,100 | 2,837 | A wearable pressure sensor coupled to a controller and transmitter/receiver that when activated sends a control signal. | 1. A wearable controller, comprising:
a power supply; a transmitter coupled to the power supply; a sensor; and a processor coupled to the power supply and the transmitter associated with a housing where the housing is adapted to be worn on a finger and a signal be generated in response to the senor. 2. The wearable controller of claim 1, where the sensor is a pressure sensor. 3. The wearable controller of claim 2, where the pressure sensor generates the signal when pressure is applied to the pressure sensor. 4. The wearable controller of claim 1 where the transmitter transmits another signal in response to the signal from the sensor. 5. The wearable controller of claim 1 where the other signal is adapted for receipt of a controller hub. 6. The wearable controller of claim 5, where the controller hub is able to receive a plurality of other signals from a plurality of transmitters with each of the other signals being identified to only one of the plurality of transmitters. 7. The wearable controller of claim 5, where the controller hub is in a musical interment. 8. A wearable controller system, comprising:
a power supply; a transmitter coupled to the power supply; a sensor; a processor coupled to the power supply and the transmitter associated with a housing where the housing is adapted to be worn on a finger and a signal be generated in response to the senor; and a controller hub having a receiver in receipt of a signal from the transmitter. 9. The wearable controller of claim 8, where the sensor is a pressure sensor. 10. The wearable controller of claim 10, where the pressure sensor generates the signal when pressure is applied to the pressure sensor. 11. The wearable controller of claim 8 where the transmitter transmits another signal in response to the signal from the sensor. 12. The wearable controller of claim 8 where the other signal is adapted for receipt by the controller hub. 13. The wearable controller of claim 12, where the controller hub is able to receive a plurality of other signals from a plurality of transmitters with each of the other signals being identified to only one of the plurality of transmitters. 14. The wearable controller of claim 12, where the controller hub is in a musical interment. 15. A method for a wearable controller, comprising:
generating electrical power from a power supply; receiving electrical power at a transmitter coupled to the power supply; receiving electrical power at a sensor; and generating a signal by a processor coupled to the power supply and the transmitter associated with a housing where the housing is adapted to be worn on a finger and in response to the senor. 16. The method for a wearable controller of claim 15, where generating a signal further includes applying pressure to the sensor which is a pressure sensor. 17. The method for a wearable controller of claim 15 includes, transmitting with the transmitter another signal in response to the signal from the sensor. 18. The method of wearable controller of claim 15, where the other signal is adapted for receipt for a controller hub. 19. The method for wearable controller of claim 18 further includes, receiving at the controller hub a plurality of other signals from a plurality of transmitters with each of the other signals being identified to only one of the plurality of transmitters. 20. The method for a wearable controller of claim 18, includes securing the controller hub in a musical interment. | A wearable pressure sensor coupled to a controller and transmitter/receiver that when activated sends a control signal.1. A wearable controller, comprising:
a power supply; a transmitter coupled to the power supply; a sensor; and a processor coupled to the power supply and the transmitter associated with a housing where the housing is adapted to be worn on a finger and a signal be generated in response to the senor. 2. The wearable controller of claim 1, where the sensor is a pressure sensor. 3. The wearable controller of claim 2, where the pressure sensor generates the signal when pressure is applied to the pressure sensor. 4. The wearable controller of claim 1 where the transmitter transmits another signal in response to the signal from the sensor. 5. The wearable controller of claim 1 where the other signal is adapted for receipt of a controller hub. 6. The wearable controller of claim 5, where the controller hub is able to receive a plurality of other signals from a plurality of transmitters with each of the other signals being identified to only one of the plurality of transmitters. 7. The wearable controller of claim 5, where the controller hub is in a musical interment. 8. A wearable controller system, comprising:
a power supply; a transmitter coupled to the power supply; a sensor; a processor coupled to the power supply and the transmitter associated with a housing where the housing is adapted to be worn on a finger and a signal be generated in response to the senor; and a controller hub having a receiver in receipt of a signal from the transmitter. 9. The wearable controller of claim 8, where the sensor is a pressure sensor. 10. The wearable controller of claim 10, where the pressure sensor generates the signal when pressure is applied to the pressure sensor. 11. The wearable controller of claim 8 where the transmitter transmits another signal in response to the signal from the sensor. 12. The wearable controller of claim 8 where the other signal is adapted for receipt by the controller hub. 13. The wearable controller of claim 12, where the controller hub is able to receive a plurality of other signals from a plurality of transmitters with each of the other signals being identified to only one of the plurality of transmitters. 14. The wearable controller of claim 12, where the controller hub is in a musical interment. 15. A method for a wearable controller, comprising:
generating electrical power from a power supply; receiving electrical power at a transmitter coupled to the power supply; receiving electrical power at a sensor; and generating a signal by a processor coupled to the power supply and the transmitter associated with a housing where the housing is adapted to be worn on a finger and in response to the senor. 16. The method for a wearable controller of claim 15, where generating a signal further includes applying pressure to the sensor which is a pressure sensor. 17. The method for a wearable controller of claim 15 includes, transmitting with the transmitter another signal in response to the signal from the sensor. 18. The method of wearable controller of claim 15, where the other signal is adapted for receipt for a controller hub. 19. The method for wearable controller of claim 18 further includes, receiving at the controller hub a plurality of other signals from a plurality of transmitters with each of the other signals being identified to only one of the plurality of transmitters. 20. The method for a wearable controller of claim 18, includes securing the controller hub in a musical interment. | 2,800 |
12,066 | 12,066 | 15,250,254 | 2,847 | A cable core for a cable, in particular for an induction cable, contains multiple such cable cores which have a conductor that is interrupted in the longitudinal direction at specified longitudinal positions at multiple separation points, thereby forming two conductor ends. An insulating intermediate piece is provided for connecting the conductor ends, the conductor ends being arranged on both sides of the intermediate piece. The cable core is characterized in that the conductor and the intermediate piece are surrounded together by a continuous insulating jacket in order to form the cable core. In a preferred concept, a respective intermediate piece is to be arranged between two conductor ends by two adapter elements. In another preferred concept, a respective intermediate piece, in particular a ceramic intermediate piece, is to be connected directly to two conductor ends. A cable is formed from a plurality of such cable cores. | 1. A cable core configuration for a cable, the cable core comprising:
a plurality of cable cores each having a conductor being interrupted at a plurality of separation points at predetermined longitudinal positions in a longitudinal direction, forming two conductor ends; an insulating intermediate piece connecting said conductor ends, and on both sides of said insulating intermediate piece said conductor ends are disposed; and a continuous insulating sheath, said conductor and said insulting intermediate piece are jointly surrounded by said continuous insulating sheath to form the cable core configuration. 2. The cable core configuration according to claim 1, wherein:
said conductor has a number of conductor sections which are separated from one another by the predetermined longitudinal positions and each have a section length; and said insulating intermediate piece has an intermediate piece length which is at least 0.5% and at most 4% of the section length. 3. The cable core configuration according to claim 1, further comprising a sleeve-shaped adapter element, said conductor ends are spaced apart by an intermediate piece length and are each connected to said insulating intermediate piece via said sleeve-shaped adapter element. 4. The cable core configuration according to claim 1, wherein said insulating intermediate piece is configured as a flexible, tension-resistant element. 5. The cable core configuration according to claim 1, wherein said insulating intermediate piece contains a tension-resistant core and an insulating sheathing which surrounds said tension-resistant core. 6. The cable core configuration according to claim 1, further comprising an injection-molded joint, wherein each of said conductor ends is surrounded by said injection-molded joint which is in turn surrounded by said continuous insulating sheath. 7. The cable core configuration according to claim 1, wherein said continuous insulating sheath is configured in at least two layers having different materials which have different dielectric constants. 8. The cable core configuration according to claim 7, wherein in that one of said layers is produced from polytetrafluoroethylene (PTFE) and is sintered. 9. The cable core configuration according to claim 1, further comprising a conductor insulation surrounding said conductor. 10. The cable core configuration according to claim 1, wherein said insulating intermediate piece and said conductor are aligned in the longitudinal direction. 11. The cable core configuration according to claim 1, wherein said insulating intermediate piece has a lateral surface with undulating profiling. 12. The cable core configuration according to claim 1, wherein said insulating intermediate piece has a first end face and said conductor ends have a second end face facing said first end face, wherein said first and second end faces are each provided with a profile. 13. The cable core configuration according to claim 12, wherein said second end face is round and is embodied in an outwardly domed manner with respect to said conductor. 14. The cable core configuration according to claim 1, wherein said cable ends are configured in an edge-free manner. 15. The cable core configuration according to claim 1, wherein said insulating intermediate piece has metalized ends. 16. The cable core configuration according to claim 1, wherein said insulating intermediate piece is severed. 17. The cable core configuration according to claim 1, wherein said insulating intermediate piece is configured as a core end cap having an end with a recess formed therein and said conductor end fits in said recess. 18. The cable core configuration according to claim 17, wherein said recess has a cylindrical and profiled internal wall. 19. The cable core configuration according to claim 1, further comprising an adapter element attached to an end of said insulating intermediate piece to form a prepared intermediate piece. 20. A cable, comprising:
a plurality of cable cores which are stranded together, each of said cable cores containing:
a conductor being interrupted at a plurality of separation points at predetermined longitudinal positions in a longitudinal direction, forming two conductor ends;
an insulating intermediate piece connecting said conductor ends, and on both sides of said insulating intermediate piece said conductor ends are disposed; and
a continuous insulating sheath, said conductor and said insulting intermediate piece are jointly surrounded by said continuous insulating sheath to form a cable core. 21. The cable according to claim 20, wherein said plurality of cable cores are stranded together to form a core bundle, a plurality of core bundles are stranded together to form a part-cable and a plurality of part-cables are stranded together to form the cable. 22. The cable according to claim 20, wherein said insulating intermediate pieces disposed at each particular longitudinal position have an intermediate piece length which corresponds to at least 0.5% and at most 4% of a section length of said conductor. 23. The cable according to claim 20, wherein the cable has a nonround cross-sectional area in a manner of a rounded triangle. 24. The cable according to claim 20, wherein a number of said cable cores are combined in a manner of a ribbon cable, in which a plurality of conductors are disposed in a plane alongside one another and have said continuous insulating sheath functioning as a common, extruded insulating sheath. 25. The cable according to claim 20, further comprising a sensor module having at least one sensor for determining at least one operating parameter of the cable and/or at least one environmental parameter. 26. A method for producing a cable core, which comprises the steps of:
providing a sheathless conductor which is separated in a recurring manner at predetermined longitudinal positions such that there are two conductor ends spaced apart by an intermediate space; introducing an intermediate piece into the intermediate space; and jointly providing the conductor and the intermediate piece with a continuous insulating sheath to form the cable core. 27. The method according to claim 26, which further comprises separating the conductor at the predetermined longitudinal positions such that in a section having a particular length is separated out of it. 28. The method according to claim 26, which further comprises separating the intermediate piece into at least two subsections following a connection at a separation point. | A cable core for a cable, in particular for an induction cable, contains multiple such cable cores which have a conductor that is interrupted in the longitudinal direction at specified longitudinal positions at multiple separation points, thereby forming two conductor ends. An insulating intermediate piece is provided for connecting the conductor ends, the conductor ends being arranged on both sides of the intermediate piece. The cable core is characterized in that the conductor and the intermediate piece are surrounded together by a continuous insulating jacket in order to form the cable core. In a preferred concept, a respective intermediate piece is to be arranged between two conductor ends by two adapter elements. In another preferred concept, a respective intermediate piece, in particular a ceramic intermediate piece, is to be connected directly to two conductor ends. A cable is formed from a plurality of such cable cores.1. A cable core configuration for a cable, the cable core comprising:
a plurality of cable cores each having a conductor being interrupted at a plurality of separation points at predetermined longitudinal positions in a longitudinal direction, forming two conductor ends; an insulating intermediate piece connecting said conductor ends, and on both sides of said insulating intermediate piece said conductor ends are disposed; and a continuous insulating sheath, said conductor and said insulting intermediate piece are jointly surrounded by said continuous insulating sheath to form the cable core configuration. 2. The cable core configuration according to claim 1, wherein:
said conductor has a number of conductor sections which are separated from one another by the predetermined longitudinal positions and each have a section length; and said insulating intermediate piece has an intermediate piece length which is at least 0.5% and at most 4% of the section length. 3. The cable core configuration according to claim 1, further comprising a sleeve-shaped adapter element, said conductor ends are spaced apart by an intermediate piece length and are each connected to said insulating intermediate piece via said sleeve-shaped adapter element. 4. The cable core configuration according to claim 1, wherein said insulating intermediate piece is configured as a flexible, tension-resistant element. 5. The cable core configuration according to claim 1, wherein said insulating intermediate piece contains a tension-resistant core and an insulating sheathing which surrounds said tension-resistant core. 6. The cable core configuration according to claim 1, further comprising an injection-molded joint, wherein each of said conductor ends is surrounded by said injection-molded joint which is in turn surrounded by said continuous insulating sheath. 7. The cable core configuration according to claim 1, wherein said continuous insulating sheath is configured in at least two layers having different materials which have different dielectric constants. 8. The cable core configuration according to claim 7, wherein in that one of said layers is produced from polytetrafluoroethylene (PTFE) and is sintered. 9. The cable core configuration according to claim 1, further comprising a conductor insulation surrounding said conductor. 10. The cable core configuration according to claim 1, wherein said insulating intermediate piece and said conductor are aligned in the longitudinal direction. 11. The cable core configuration according to claim 1, wherein said insulating intermediate piece has a lateral surface with undulating profiling. 12. The cable core configuration according to claim 1, wherein said insulating intermediate piece has a first end face and said conductor ends have a second end face facing said first end face, wherein said first and second end faces are each provided with a profile. 13. The cable core configuration according to claim 12, wherein said second end face is round and is embodied in an outwardly domed manner with respect to said conductor. 14. The cable core configuration according to claim 1, wherein said cable ends are configured in an edge-free manner. 15. The cable core configuration according to claim 1, wherein said insulating intermediate piece has metalized ends. 16. The cable core configuration according to claim 1, wherein said insulating intermediate piece is severed. 17. The cable core configuration according to claim 1, wherein said insulating intermediate piece is configured as a core end cap having an end with a recess formed therein and said conductor end fits in said recess. 18. The cable core configuration according to claim 17, wherein said recess has a cylindrical and profiled internal wall. 19. The cable core configuration according to claim 1, further comprising an adapter element attached to an end of said insulating intermediate piece to form a prepared intermediate piece. 20. A cable, comprising:
a plurality of cable cores which are stranded together, each of said cable cores containing:
a conductor being interrupted at a plurality of separation points at predetermined longitudinal positions in a longitudinal direction, forming two conductor ends;
an insulating intermediate piece connecting said conductor ends, and on both sides of said insulating intermediate piece said conductor ends are disposed; and
a continuous insulating sheath, said conductor and said insulting intermediate piece are jointly surrounded by said continuous insulating sheath to form a cable core. 21. The cable according to claim 20, wherein said plurality of cable cores are stranded together to form a core bundle, a plurality of core bundles are stranded together to form a part-cable and a plurality of part-cables are stranded together to form the cable. 22. The cable according to claim 20, wherein said insulating intermediate pieces disposed at each particular longitudinal position have an intermediate piece length which corresponds to at least 0.5% and at most 4% of a section length of said conductor. 23. The cable according to claim 20, wherein the cable has a nonround cross-sectional area in a manner of a rounded triangle. 24. The cable according to claim 20, wherein a number of said cable cores are combined in a manner of a ribbon cable, in which a plurality of conductors are disposed in a plane alongside one another and have said continuous insulating sheath functioning as a common, extruded insulating sheath. 25. The cable according to claim 20, further comprising a sensor module having at least one sensor for determining at least one operating parameter of the cable and/or at least one environmental parameter. 26. A method for producing a cable core, which comprises the steps of:
providing a sheathless conductor which is separated in a recurring manner at predetermined longitudinal positions such that there are two conductor ends spaced apart by an intermediate space; introducing an intermediate piece into the intermediate space; and jointly providing the conductor and the intermediate piece with a continuous insulating sheath to form the cable core. 27. The method according to claim 26, which further comprises separating the conductor at the predetermined longitudinal positions such that in a section having a particular length is separated out of it. 28. The method according to claim 26, which further comprises separating the intermediate piece into at least two subsections following a connection at a separation point. | 2,800 |
12,067 | 12,067 | 15,384,883 | 2,846 | The present invention relates to an inverter which is capable of adjusting an output frequency of a three-phase voltage output to a motor based on a result of comparison in magnitude between the minimum operating voltage of the motor and a DC link voltage applied to a DC link. The inverter includes: a measurement part configured to measure a DC link voltage applied to a DC link; a conversion part configured to convert the DC link voltage into a three-phase voltage and output the three-phase voltage to the motor; and a control part configured to make comparison in magnitude between the DC link voltage and the minimum operating voltage of the motor and adjust an output frequency of the three-phase voltage based on a result of the comparison. | 1. An inverter for converting power and supplying the power to a motor, comprising:
a measurement part configured to measure a DC link voltage applied to a DC link; a conversion part configured to convert the DC link voltage into a three-phase voltage and output the three-phase voltage to the motor; and a control part configured to make comparison in magnitude between the DC link voltage and the minimum operating voltage of the motor and adjust an output frequency of the three-phase voltage based on a result of the comparison. 2. The inverter according to claim 1, wherein the control part adjusts the output frequency to the minimum operating frequency of the motor at the time of start of operation of the motor. 3. The inverter according to claim 2, wherein, when the output frequency reaches the minimum operating frequency, the control part keeps the output frequency at the minimum operating frequency. 4. The inverter according to claim 1, wherein, when the DC link voltage exceeds the minimum operating voltage, the control part increases the output frequency by a first frequency. 5. The inverter according to claim 4, wherein, when the DC link voltage is equal to or lower than the minimum operating voltage, the control part decreases the output frequency by a second frequency. | The present invention relates to an inverter which is capable of adjusting an output frequency of a three-phase voltage output to a motor based on a result of comparison in magnitude between the minimum operating voltage of the motor and a DC link voltage applied to a DC link. The inverter includes: a measurement part configured to measure a DC link voltage applied to a DC link; a conversion part configured to convert the DC link voltage into a three-phase voltage and output the three-phase voltage to the motor; and a control part configured to make comparison in magnitude between the DC link voltage and the minimum operating voltage of the motor and adjust an output frequency of the three-phase voltage based on a result of the comparison.1. An inverter for converting power and supplying the power to a motor, comprising:
a measurement part configured to measure a DC link voltage applied to a DC link; a conversion part configured to convert the DC link voltage into a three-phase voltage and output the three-phase voltage to the motor; and a control part configured to make comparison in magnitude between the DC link voltage and the minimum operating voltage of the motor and adjust an output frequency of the three-phase voltage based on a result of the comparison. 2. The inverter according to claim 1, wherein the control part adjusts the output frequency to the minimum operating frequency of the motor at the time of start of operation of the motor. 3. The inverter according to claim 2, wherein, when the output frequency reaches the minimum operating frequency, the control part keeps the output frequency at the minimum operating frequency. 4. The inverter according to claim 1, wherein, when the DC link voltage exceeds the minimum operating voltage, the control part increases the output frequency by a first frequency. 5. The inverter according to claim 4, wherein, when the DC link voltage is equal to or lower than the minimum operating voltage, the control part decreases the output frequency by a second frequency. | 2,800 |
12,068 | 12,068 | 15,960,917 | 2,837 | A method of manufacturing a ceramic electronic component such that Voids of the ceramic element and voids at the interfaces between the ceramic element and the external electrodes are filled with a resin composition by applying, to the ceramic electronic component, a resin-containing solution that has the function of etching the surface of the ceramic element to ionize constituent elements of the ceramic element. The resin composition includes a resin, and cationic elements among the constituent elements of the ceramic elements, which are ionized and deposited from the ceramic element. | 1. A method for manufacturing a ceramic electronic component, the method comprising:
providing, to a surface of a ceramic element, a resin-containing solution that etches the surface of the ceramic element so as to ionize constituent elements of the ceramic element to form a resin composition comprising a resin and a cationic element that is a constituent element of the ceramic element, the resin composition at least partially filling voids of the ceramic element and at an interface between the ceramic element and an electrode. 2. The method for manufacturing a ceramic electronic component according to claim 1, wherein a pH of the resin-containing solution containing the at least one anion is greater than 5 and less than 11. 3. The method for manufacturing a ceramic electronic component according to claim 1, wherein the method further comprises washing the ceramic electronic component after applying the resin-containing solution to the surface of the ceramic element. 4. The method for manufacturing a ceramic electronic component according to claim 1, wherein the resin composition is formed after forming the electrode on the ceramic element. 5. The method for manufacturing a ceramic electronic component according to claim 1, wherein the electrode is formed on the ceramic element after forming the resin composition. 6. The method for manufacturing a ceramic electronic component according to claim 1, wherein the resin composition is formed after forming the electrode and plating a surface of the electrode. 7. The method for manufacturing a ceramic electronic component according to claim 1, wherein the resin comprises at least one of an epoxy resin, a polyimide resin, a silicone resin, a polyamideimide resin, a polyetheretherketone resin, and a fluorine-containing resin. 8. The method for manufacturing a ceramic electronic component according to claim 1, wherein the method further comprises heating the resin composition so as to cross-link resin components thereof. 9. The method for manufacturing a ceramic electronic component according to claim 1, wherein the constituent element of the ceramic element includes at least one of Ba, Ti, Ca, Zr, Fe, Ni, Cu, Zn, Mn, Co, and Si. 10. The method for manufacturing a ceramic electronic component according to claim 1, wherein the resin has a thermal decomposition temperature of 240° C. or higher. 11. The method for manufacturing a ceramic electronic component according to claim 1, further comprising forming a plated film on a surface of the electrode. | A method of manufacturing a ceramic electronic component such that Voids of the ceramic element and voids at the interfaces between the ceramic element and the external electrodes are filled with a resin composition by applying, to the ceramic electronic component, a resin-containing solution that has the function of etching the surface of the ceramic element to ionize constituent elements of the ceramic element. The resin composition includes a resin, and cationic elements among the constituent elements of the ceramic elements, which are ionized and deposited from the ceramic element.1. A method for manufacturing a ceramic electronic component, the method comprising:
providing, to a surface of a ceramic element, a resin-containing solution that etches the surface of the ceramic element so as to ionize constituent elements of the ceramic element to form a resin composition comprising a resin and a cationic element that is a constituent element of the ceramic element, the resin composition at least partially filling voids of the ceramic element and at an interface between the ceramic element and an electrode. 2. The method for manufacturing a ceramic electronic component according to claim 1, wherein a pH of the resin-containing solution containing the at least one anion is greater than 5 and less than 11. 3. The method for manufacturing a ceramic electronic component according to claim 1, wherein the method further comprises washing the ceramic electronic component after applying the resin-containing solution to the surface of the ceramic element. 4. The method for manufacturing a ceramic electronic component according to claim 1, wherein the resin composition is formed after forming the electrode on the ceramic element. 5. The method for manufacturing a ceramic electronic component according to claim 1, wherein the electrode is formed on the ceramic element after forming the resin composition. 6. The method for manufacturing a ceramic electronic component according to claim 1, wherein the resin composition is formed after forming the electrode and plating a surface of the electrode. 7. The method for manufacturing a ceramic electronic component according to claim 1, wherein the resin comprises at least one of an epoxy resin, a polyimide resin, a silicone resin, a polyamideimide resin, a polyetheretherketone resin, and a fluorine-containing resin. 8. The method for manufacturing a ceramic electronic component according to claim 1, wherein the method further comprises heating the resin composition so as to cross-link resin components thereof. 9. The method for manufacturing a ceramic electronic component according to claim 1, wherein the constituent element of the ceramic element includes at least one of Ba, Ti, Ca, Zr, Fe, Ni, Cu, Zn, Mn, Co, and Si. 10. The method for manufacturing a ceramic electronic component according to claim 1, wherein the resin has a thermal decomposition temperature of 240° C. or higher. 11. The method for manufacturing a ceramic electronic component according to claim 1, further comprising forming a plated film on a surface of the electrode. | 2,800 |
12,069 | 12,069 | 15,796,121 | 2,898 | An embodiment of the invention may include a method, and resulting structure, of forming a semiconductor structure. The method may include forming a component hole from a first surface to a second surface of a base layer. The method may include placing an electrical component in the component hole. The electrical component has a conductive structure on both ends of the electrical component. The electrical component is substantially parallel to the first surface. The method may include forming a laminate layer on the first surface of the base layer, the second surface of the base layer, and between the base layer and the electrical component. The method may include creating a pair of via holes, where the pair of holes align with the conductive structures on both ends of the electrical component. The method may include forming a conductive via in the pair of via holes. | 1. A semiconductor structure comprising:
a base layer with a first surface and a second surface; a capacitor located in the base layer, wherein the capacitor is substantially parallel to the first surface, and wherein the capacitor comprises an electrical connection on each end of the capacitor; a laminate layer located on the first surface and the second surface of the base layer, and between the base layer and the capacitor; and a conductive via extending from each electrical connection to the first surface and the second surface. 2. The structure of claim 1, further comprising a semiconductor die electrically connected to the conductive via extending to the first surface. 3. The structure of claim 2, wherein the coefficient of thermal expansion of the base layer and the semiconductor die is substantially similar. 4. The structure of claim 2, further comprising a packaging substrate electrically connected to the conductive via extending to the second surface. 5. The structure of claim 4, further comprising an underfill layer between the second surface of the base layer and the packaging substrate. 6. The structure of claim 1, wherein the base layer comprises an epoxy polymer. | An embodiment of the invention may include a method, and resulting structure, of forming a semiconductor structure. The method may include forming a component hole from a first surface to a second surface of a base layer. The method may include placing an electrical component in the component hole. The electrical component has a conductive structure on both ends of the electrical component. The electrical component is substantially parallel to the first surface. The method may include forming a laminate layer on the first surface of the base layer, the second surface of the base layer, and between the base layer and the electrical component. The method may include creating a pair of via holes, where the pair of holes align with the conductive structures on both ends of the electrical component. The method may include forming a conductive via in the pair of via holes.1. A semiconductor structure comprising:
a base layer with a first surface and a second surface; a capacitor located in the base layer, wherein the capacitor is substantially parallel to the first surface, and wherein the capacitor comprises an electrical connection on each end of the capacitor; a laminate layer located on the first surface and the second surface of the base layer, and between the base layer and the capacitor; and a conductive via extending from each electrical connection to the first surface and the second surface. 2. The structure of claim 1, further comprising a semiconductor die electrically connected to the conductive via extending to the first surface. 3. The structure of claim 2, wherein the coefficient of thermal expansion of the base layer and the semiconductor die is substantially similar. 4. The structure of claim 2, further comprising a packaging substrate electrically connected to the conductive via extending to the second surface. 5. The structure of claim 4, further comprising an underfill layer between the second surface of the base layer and the packaging substrate. 6. The structure of claim 1, wherein the base layer comprises an epoxy polymer. | 2,800 |
12,070 | 12,070 | 16,035,088 | 2,841 | As described herein, an electrical enclosure is sealed against environmental contamination. An enclosure cabinet has an interior space. The interior space is accessible through an opening. A door or cover selectively closes the opening. The enclosure cabinet is manufactured of numerous parts and has holes, joints, gaps, seams and/or fasteners. Electrical control devices are mounted in the cabinet. A thick-film elastomeric coating is on an outer surface of the cabinet. The coating has a thickness of at least 0.6 mm to provide a monolithic bridging layer over holes, joints, gaps, seams and/or fasteners to prevent environmental contamination from penetrating the cabinet. | 1. An electrical enclosure sealed against environmental contamination comprising:
an enclosure cabinet having an interior space, the interior space being accessible through an opening, and a door or cover selectively closing the opening, the cabinet being manufactured of numerous parts and having holes, joints, gaps, seams and/or fasteners; and electrical control devices mounted in the cabinet; and a thick-film elastomeric coating on an outer surface of the cabinet, the coating having a thickness of at least 0.6 mm, to provide a monolithic bridging layer over holes, joints, gaps, seams and/or fasteners to prevent environmental contamination from penetrating the cabinet. 2. The electrical enclosure of claim 1 wherein the coating prevents ingress of dust and liquids. 3. The electrical enclosure of claim 1 wherein the coating is formed of 100 percent solids. 4. The electrical enclosure of claim 1 wherein the coating comprises a two-component system comprising resin and catalyst. 5. The electrical enclosure of claim 1 wherein the coating is composed of polyurethane, polyaspartic, or polyurea based elastomeric materials. 6. The electrical enclosure of claim 1 wherein the coating thickness is at least 0.6 mm. 7. The electrical enclosure of claim 1 wherein the coating conforms with International Protection rating of IP56. 8. The electrical enclosure of claim 1 wherein the coating conforms with International Protection rating of IP67. 9. The electrical enclosure of claim 1 wherein the coating conforms with the Underwriters Laboratory rating of Type 3. 10. The electrical enclosure of claim 1 wherein the coating conforms with the Underwriters Laboratory rating of Type 6. 11. The electrical enclosure of claim 1 wherein the coating conforms with the Underwriters Laboratory rating of Type 13. 12. The electrical enclosure of claim 1 wherein the door or cover includes a thick-film elastomeric coating, the coating having a thickness of at least 0.6 mm, to provide a monolithic bridging layer over holes, joints, gaps, seams and/or fasteners in the door or cover to prevent environmental contamination from penetrating the enclosure. 13. The electrical enclosure of claim 12 further comprising a gasket providing a seal between the door or cover and the cabinet. | As described herein, an electrical enclosure is sealed against environmental contamination. An enclosure cabinet has an interior space. The interior space is accessible through an opening. A door or cover selectively closes the opening. The enclosure cabinet is manufactured of numerous parts and has holes, joints, gaps, seams and/or fasteners. Electrical control devices are mounted in the cabinet. A thick-film elastomeric coating is on an outer surface of the cabinet. The coating has a thickness of at least 0.6 mm to provide a monolithic bridging layer over holes, joints, gaps, seams and/or fasteners to prevent environmental contamination from penetrating the cabinet.1. An electrical enclosure sealed against environmental contamination comprising:
an enclosure cabinet having an interior space, the interior space being accessible through an opening, and a door or cover selectively closing the opening, the cabinet being manufactured of numerous parts and having holes, joints, gaps, seams and/or fasteners; and electrical control devices mounted in the cabinet; and a thick-film elastomeric coating on an outer surface of the cabinet, the coating having a thickness of at least 0.6 mm, to provide a monolithic bridging layer over holes, joints, gaps, seams and/or fasteners to prevent environmental contamination from penetrating the cabinet. 2. The electrical enclosure of claim 1 wherein the coating prevents ingress of dust and liquids. 3. The electrical enclosure of claim 1 wherein the coating is formed of 100 percent solids. 4. The electrical enclosure of claim 1 wherein the coating comprises a two-component system comprising resin and catalyst. 5. The electrical enclosure of claim 1 wherein the coating is composed of polyurethane, polyaspartic, or polyurea based elastomeric materials. 6. The electrical enclosure of claim 1 wherein the coating thickness is at least 0.6 mm. 7. The electrical enclosure of claim 1 wherein the coating conforms with International Protection rating of IP56. 8. The electrical enclosure of claim 1 wherein the coating conforms with International Protection rating of IP67. 9. The electrical enclosure of claim 1 wherein the coating conforms with the Underwriters Laboratory rating of Type 3. 10. The electrical enclosure of claim 1 wherein the coating conforms with the Underwriters Laboratory rating of Type 6. 11. The electrical enclosure of claim 1 wherein the coating conforms with the Underwriters Laboratory rating of Type 13. 12. The electrical enclosure of claim 1 wherein the door or cover includes a thick-film elastomeric coating, the coating having a thickness of at least 0.6 mm, to provide a monolithic bridging layer over holes, joints, gaps, seams and/or fasteners in the door or cover to prevent environmental contamination from penetrating the enclosure. 13. The electrical enclosure of claim 12 further comprising a gasket providing a seal between the door or cover and the cabinet. | 2,800 |
12,071 | 12,071 | 15,411,160 | 2,836 | An on-board electrical system for a vehicle includes a first rechargeable constant voltage source ( 12 ), a second rechargeable constant voltage source ( 14 ), and a circuit breaker device ( 16 ) therebetween, including a first circuit breaker ( 18 ) and a second circuit breaker ( 20 ). Each circuit breaker ( 18, 20 ) permits current flow between input terminal (E 1, E 2 ) and output terminals (A 1, A 2 ) in both directions in a conductor state and permits current flow from the input terminal (E 1, E 2 ) to the output terminal (A 1, A 2 ) only in a diode state. The input terminal (E 1 ) of the first circuit breaker ( 18 ) is connected to the first constant voltage source ( 12 ), the output terminal (A 1 ) of the first circuit breaker ( 18 ) is connected to the output terminal (A 2 ) of the second circuit breaker ( 20 ), and the output terminal (A 2 ) of the second circuit breaker ( 20 ) is connected to the second constant voltage source ( 14 ). | 1. An on-board electrical system for a vehicle, the electrical system comprising:
a first rechargeable constant voltage source; a second rechargeable constant voltage source; a circuit breaker device between the first constant voltage source and the second constant voltage source, the circuit breaker device comprising a first circuit breaker with a first breaker input terminal and a first breaker output terminal, the first circuit breaker permitting a flow of current between the first breaker input terminal and the first breaker output terminal in a first breaker conductor state and permitting only a flow of current from the first breaker input terminal to the first breaker output terminal in a first breaker diode state and a second circuit breaker with a second breaker input terminal and a second breaker output terminal, the second circuit breaker permitting a flow of current between the second breaker input terminal and the second breaker output terminal in a second breaker conductor state and permitting only a flow of current from the second breaker input terminal to the second breaker output terminal in a second breaker diode state, wherein the first breaker input terminal is connected to the first constant voltage source, the first breaker output terminal is connected to the second breaker output terminal, and the second breaker output terminal is connected to the second constant voltage source. 2. An on-board electrical system in accordance with claim 1, wherein:
the first constant voltage source is a lead storage battery; or the second constant voltage source is a lithium ion battery; or the first constant voltage source is a lead storage battery and the second constant voltage source is a lithium ion battery. 3. An on-board electrical system in accordance with claim 1, further comprising a starter connected to the first constant voltage source and connected to the first breaker input terminal. 4. An on-board electrical system in accordance with claim 1, further comprising an alternator connected to the output terminal of the first circuit breaker and connected to the output terminal of the second circuit breaker. 5. An on-board electrical system in accordance with claim 1, further comprising a group of electrical energy consumers connected to the output terminal of the first circuit breaker and connected to the output terminal of the second circuit breaker. 6. An on-board electrical system in accordance with claim 1, further comprising a group of electrical energy consumers connected to the second constant voltage source and to the input terminal of the second circuit breaker. 7. An on-board electrical system in accordance with claim 1, further comprising:
a first group of electrical energy consumers connected to the output terminal of the first circuit breaker and connected to the output terminal of the second circuit breaker; and a second group of electrical energy consumers connected to the second constant voltage source and to the input terminal of the second circuit breaker. 8. An on-board electrical system in accordance with claim 1, further comprising an actuating device switching over the first circuit breaker and the second circuit breaker between the conductor state and the diode state, said actuating device being configured:
to switch the first circuit breaker into the diode state thereof in a starter operating state for starting an internal combustion engine; or to switch the first circuit breaker into the diode state thereof in a parking operating state; Or to switch the first circuit breaker into the conductor state thereof and the second circuit breaker into the diode state thereof in a charging operating state for the first constant voltage source; or to switch the first circuit breaker into the diode state thereof when the first constant voltage source reaches a predetermined state of charge; or to switch the second circuit breaker into the diode state thereof when the voltage on the output terminal of the second circuit breaker or on the input terminal of the second circuit breaker drops below a predetermined threshold voltage; or to switch the second circuit breaker into the diode state thereof when the voltage on the output terminal of the second circuit breaker and on the input terminal of the second circuit breaker drops below a predetermined threshold voltage; or to switch the first circuit breaker into the diode state thereof and the second circuit breaker into the conductor state thereof in a power supply operating state; or any combination of: to switch the first circuit breaker into the diode state thereof in a starter operating state for starting an internal combustion engine; and to switch the first circuit breaker into the diode state thereof in a parking operating state; and to switch the first circuit breaker into the conductor state thereof and the second circuit breaker into the diode state thereof in a charging operating state for the first constant voltage source; and to switch the first circuit breaker into the diode state thereof when the first constant voltage source reaches a predetermined state of charge; and to switch the second circuit breaker into the diode state thereof when the voltage on the output terminal of the second circuit breaker or on the input terminal of the second circuit breaker drops below a predetermined threshold voltage; and to switch the second circuit breaker into the diode state thereof when the voltage on the output terminal of the second circuit breaker and on the input terminal of the second circuit breaker drops below a predetermined threshold voltage; and to switch the first circuit breaker into the diode state thereof and the second circuit breaker into the conductor state thereof in a power supply operating state. 9. An on-board electrical system in accordance with claim 2, further comprising a starter connected to the first constant voltage source and connected to the first breaker input terminal. 10. An on-board electrical system in accordance with claim 2, further comprising an actuating device switching over the first circuit breaker and the second circuit breaker between the conductor state and the diode state, said actuating device being configured to switch the first circuit breaker into the diode state thereof in an operating state of the starter for starting an internal combustion engine. 11. An on-board electrical system in accordance with claim 2, further comprising an alternator connected to the output terminal of the first circuit breaker and connected to the output terminal of the second circuit breaker. 12. An on-board electrical system in accordance with claim 2, further comprising a group of electrical energy consumers connected to the output terminal of the first circuit breaker and connected to the output terminal of the second circuit breaker. 13. An on-board electrical system in accordance with claim 2, further comprising a group of electrical energy consumers connected to the second constant voltage source and to the input terminal of the second circuit breaker. 14. An on-board electrical system in accordance with claim 1, further comprising an actuating device switching over the first circuit breaker and the second circuit breaker between the conductor state and the diode state, said actuating device being configured to switch the first circuit breaker into the diode state thereof in a starter operating state for starting an internal combustion engine. 15. An on-board electrical system in accordance with claim 1, further comprising an actuating device switching over the first circuit breaker and the second circuit breaker between the conductor state and the diode state, said actuating device being configured to switch the first circuit breaker into the diode state thereof in a parking operating state. 16. An on-board electrical system in accordance with claim 1, further comprising an actuating device switching over the first circuit breaker and the second circuit breaker between the conductor state and the diode state, said actuating device being configured to switch the first circuit breaker into the conductor state thereof and the second circuit breaker into the diode state thereof in a charging operating state for the first constant voltage source. 17. An on-board electrical system in accordance with claim 1, further comprising an actuating device switching over the first circuit breaker and the second circuit breaker between the conductor state and the diode state, said actuating device being configured to switch the first circuit breaker into the diode state thereof when the first constant voltage source reaches a predetermined state of charge. 18. An on-board electrical system in accordance with claim 1, further comprising an actuating device switching over the first circuit breaker and the second circuit breaker between the conductor state and the diode state, said actuating device being configured to switch the second circuit breaker into the diode state thereof when the voltage on the output terminal of the second circuit breaker drops below a predetermined threshold voltage. 19. An on-board electrical system in accordance with claim 1, further comprising an actuating device switching over the first circuit breaker and the second circuit breaker between the conductor state and the diode state, said actuating device being configured to switch the second circuit breaker into the diode state thereof when the voltage on the input terminal of the second circuit breaker drops below a predetermined threshold voltage. 20. An on-board electrical system in accordance with claim 1, further comprising an actuating device switching over the first circuit breaker and the second circuit breaker between the conductor state and the diode state, said actuating device being configured to switch the first circuit breaker into the diode state thereof and the second circuit breaker into the conductor state thereof in a power supply operating state. | An on-board electrical system for a vehicle includes a first rechargeable constant voltage source ( 12 ), a second rechargeable constant voltage source ( 14 ), and a circuit breaker device ( 16 ) therebetween, including a first circuit breaker ( 18 ) and a second circuit breaker ( 20 ). Each circuit breaker ( 18, 20 ) permits current flow between input terminal (E 1, E 2 ) and output terminals (A 1, A 2 ) in both directions in a conductor state and permits current flow from the input terminal (E 1, E 2 ) to the output terminal (A 1, A 2 ) only in a diode state. The input terminal (E 1 ) of the first circuit breaker ( 18 ) is connected to the first constant voltage source ( 12 ), the output terminal (A 1 ) of the first circuit breaker ( 18 ) is connected to the output terminal (A 2 ) of the second circuit breaker ( 20 ), and the output terminal (A 2 ) of the second circuit breaker ( 20 ) is connected to the second constant voltage source ( 14 ).1. An on-board electrical system for a vehicle, the electrical system comprising:
a first rechargeable constant voltage source; a second rechargeable constant voltage source; a circuit breaker device between the first constant voltage source and the second constant voltage source, the circuit breaker device comprising a first circuit breaker with a first breaker input terminal and a first breaker output terminal, the first circuit breaker permitting a flow of current between the first breaker input terminal and the first breaker output terminal in a first breaker conductor state and permitting only a flow of current from the first breaker input terminal to the first breaker output terminal in a first breaker diode state and a second circuit breaker with a second breaker input terminal and a second breaker output terminal, the second circuit breaker permitting a flow of current between the second breaker input terminal and the second breaker output terminal in a second breaker conductor state and permitting only a flow of current from the second breaker input terminal to the second breaker output terminal in a second breaker diode state, wherein the first breaker input terminal is connected to the first constant voltage source, the first breaker output terminal is connected to the second breaker output terminal, and the second breaker output terminal is connected to the second constant voltage source. 2. An on-board electrical system in accordance with claim 1, wherein:
the first constant voltage source is a lead storage battery; or the second constant voltage source is a lithium ion battery; or the first constant voltage source is a lead storage battery and the second constant voltage source is a lithium ion battery. 3. An on-board electrical system in accordance with claim 1, further comprising a starter connected to the first constant voltage source and connected to the first breaker input terminal. 4. An on-board electrical system in accordance with claim 1, further comprising an alternator connected to the output terminal of the first circuit breaker and connected to the output terminal of the second circuit breaker. 5. An on-board electrical system in accordance with claim 1, further comprising a group of electrical energy consumers connected to the output terminal of the first circuit breaker and connected to the output terminal of the second circuit breaker. 6. An on-board electrical system in accordance with claim 1, further comprising a group of electrical energy consumers connected to the second constant voltage source and to the input terminal of the second circuit breaker. 7. An on-board electrical system in accordance with claim 1, further comprising:
a first group of electrical energy consumers connected to the output terminal of the first circuit breaker and connected to the output terminal of the second circuit breaker; and a second group of electrical energy consumers connected to the second constant voltage source and to the input terminal of the second circuit breaker. 8. An on-board electrical system in accordance with claim 1, further comprising an actuating device switching over the first circuit breaker and the second circuit breaker between the conductor state and the diode state, said actuating device being configured:
to switch the first circuit breaker into the diode state thereof in a starter operating state for starting an internal combustion engine; or to switch the first circuit breaker into the diode state thereof in a parking operating state; Or to switch the first circuit breaker into the conductor state thereof and the second circuit breaker into the diode state thereof in a charging operating state for the first constant voltage source; or to switch the first circuit breaker into the diode state thereof when the first constant voltage source reaches a predetermined state of charge; or to switch the second circuit breaker into the diode state thereof when the voltage on the output terminal of the second circuit breaker or on the input terminal of the second circuit breaker drops below a predetermined threshold voltage; or to switch the second circuit breaker into the diode state thereof when the voltage on the output terminal of the second circuit breaker and on the input terminal of the second circuit breaker drops below a predetermined threshold voltage; or to switch the first circuit breaker into the diode state thereof and the second circuit breaker into the conductor state thereof in a power supply operating state; or any combination of: to switch the first circuit breaker into the diode state thereof in a starter operating state for starting an internal combustion engine; and to switch the first circuit breaker into the diode state thereof in a parking operating state; and to switch the first circuit breaker into the conductor state thereof and the second circuit breaker into the diode state thereof in a charging operating state for the first constant voltage source; and to switch the first circuit breaker into the diode state thereof when the first constant voltage source reaches a predetermined state of charge; and to switch the second circuit breaker into the diode state thereof when the voltage on the output terminal of the second circuit breaker or on the input terminal of the second circuit breaker drops below a predetermined threshold voltage; and to switch the second circuit breaker into the diode state thereof when the voltage on the output terminal of the second circuit breaker and on the input terminal of the second circuit breaker drops below a predetermined threshold voltage; and to switch the first circuit breaker into the diode state thereof and the second circuit breaker into the conductor state thereof in a power supply operating state. 9. An on-board electrical system in accordance with claim 2, further comprising a starter connected to the first constant voltage source and connected to the first breaker input terminal. 10. An on-board electrical system in accordance with claim 2, further comprising an actuating device switching over the first circuit breaker and the second circuit breaker between the conductor state and the diode state, said actuating device being configured to switch the first circuit breaker into the diode state thereof in an operating state of the starter for starting an internal combustion engine. 11. An on-board electrical system in accordance with claim 2, further comprising an alternator connected to the output terminal of the first circuit breaker and connected to the output terminal of the second circuit breaker. 12. An on-board electrical system in accordance with claim 2, further comprising a group of electrical energy consumers connected to the output terminal of the first circuit breaker and connected to the output terminal of the second circuit breaker. 13. An on-board electrical system in accordance with claim 2, further comprising a group of electrical energy consumers connected to the second constant voltage source and to the input terminal of the second circuit breaker. 14. An on-board electrical system in accordance with claim 1, further comprising an actuating device switching over the first circuit breaker and the second circuit breaker between the conductor state and the diode state, said actuating device being configured to switch the first circuit breaker into the diode state thereof in a starter operating state for starting an internal combustion engine. 15. An on-board electrical system in accordance with claim 1, further comprising an actuating device switching over the first circuit breaker and the second circuit breaker between the conductor state and the diode state, said actuating device being configured to switch the first circuit breaker into the diode state thereof in a parking operating state. 16. An on-board electrical system in accordance with claim 1, further comprising an actuating device switching over the first circuit breaker and the second circuit breaker between the conductor state and the diode state, said actuating device being configured to switch the first circuit breaker into the conductor state thereof and the second circuit breaker into the diode state thereof in a charging operating state for the first constant voltage source. 17. An on-board electrical system in accordance with claim 1, further comprising an actuating device switching over the first circuit breaker and the second circuit breaker between the conductor state and the diode state, said actuating device being configured to switch the first circuit breaker into the diode state thereof when the first constant voltage source reaches a predetermined state of charge. 18. An on-board electrical system in accordance with claim 1, further comprising an actuating device switching over the first circuit breaker and the second circuit breaker between the conductor state and the diode state, said actuating device being configured to switch the second circuit breaker into the diode state thereof when the voltage on the output terminal of the second circuit breaker drops below a predetermined threshold voltage. 19. An on-board electrical system in accordance with claim 1, further comprising an actuating device switching over the first circuit breaker and the second circuit breaker between the conductor state and the diode state, said actuating device being configured to switch the second circuit breaker into the diode state thereof when the voltage on the input terminal of the second circuit breaker drops below a predetermined threshold voltage. 20. An on-board electrical system in accordance with claim 1, further comprising an actuating device switching over the first circuit breaker and the second circuit breaker between the conductor state and the diode state, said actuating device being configured to switch the first circuit breaker into the diode state thereof and the second circuit breaker into the conductor state thereof in a power supply operating state. | 2,800 |
12,072 | 12,072 | 16,154,416 | 2,894 | A solar cell is fabricated by etching one or more of its layers without substantially etching another layer of the solar cell. In one embodiment, a copper layer in the solar cell is etched without substantially etching a topmost metallic layer comprising tin. For example, an etchant comprising sulfuric acid and hydrogen peroxide may be employed to etch the copper layer selective to the tin layer. A particular example of the aforementioned etchant is a Co-Bra Etch® etchant modified to comprise about 1% by volume of sulfuric acid, about 4% by volume of phosphoric acid, and about 2% by volume of stabilized hydrogen peroxide. In one embodiment, an aluminum layer in the solar cell is etched without substantially etching the tin layer. For example, an etchant comprising potassium hydroxide may be employed to etch the aluminum layer without substantially etching the tin layer. | 1. A backside-contact solar cell comprising:
a substrate; a dielectric layer over the substrate; a first copper layer over the dielectric layer, the first copper layer being electrically coupled to a first doped region of the back-side contact solar cell; a first tin layer on the first copper layer; a second copper layer over the dielectric layer, the second copper layer being electrically coupled to a second doped region of the back-side contact solar cell; and a second tin layer on the second copper layer. 2. The back-side contact solar cell of claim 1, wherein the dielectric layer comprises an oxide. 3. The back-side contact solar cell of claim 1, further comprising:
a barrier layer between the first copper layer and the substrate. 4. The back-side contact solar cell of claim 3, wherein the barrier layer comprises titanium-tungsten. 5. The back-side contact solar cell of claim 3, further comprising:
an aluminum layer between the barrier layer and the dielectric layer. 6. The back-side contact solar cell of claim 5, further comprising:
a third copper layer between the first copper layer and the aluminum layer. 7. The back-side contact solar cell of claim 1, wherein the substrate comprises silicon. 8. A backside-contact solar cell comprising:
a substrate; a first copper layer over the substrate, the first copper layer being electrically coupled to a first doped region of the back-side contact solar cell; a first tin layer over the first copper layer; an aluminum layer between the first copper layer and the substrate; a second copper layer over the substrate, the second copper layer being electrically coupled to a second doped region of the back-side contact solar cell; and a second tin layer over the second copper layer. 9. The back-side contact solar cell of claim 8, further comprising:
a dielectric layer between the aluminum layer and the substrate. 10. The back-side contact solar cell of claim 9, wherein the dielectric layer comprises an oxide. 11. The back-side contact solar cell of claim 8, further comprising:
a barrier layer between the first copper layer and the substrate. 12. The back-side contact solar cell of claim 11, wherein the barrier layer comprises titanium-tungsten. 13. The back-side contact solar cell of claim 8, further comprising:
a third copper layer between the first copper layer and the aluminum layer. 14. The back-side contact solar cell of claim 8, wherein the substrate comprises silicon. 15. A backside-contact solar cell comprising:
a substrate; a first copper layer over the substrate, the first copper layer being electrically coupled to a doped region of the back-side contact solar cell; a tin layer over the copper layer; an aluminum layer between the first copper layer and the substrate; and a barrier layer between the first copper layer and the aluminum layer. 16. The back-side contact solar cell of claim 15, further comprising:
a dielectric layer between the aluminum layer and the substrate. 17. The back-side contact solar cell of claim 16, wherein the dielectric layer comprises an oxide. 18. The back-side contact solar cell of claim 15, wherein the barrier layer comprises titanium-tungsten. 19. The back-side contact solar cell of claim 15, wherein the first copper layer has a thickness of about 20 microns. 20. The back-side contact solar cell of claim 15, further comprising:
a second copper layer between the first copper layer and the aluminum layer. | A solar cell is fabricated by etching one or more of its layers without substantially etching another layer of the solar cell. In one embodiment, a copper layer in the solar cell is etched without substantially etching a topmost metallic layer comprising tin. For example, an etchant comprising sulfuric acid and hydrogen peroxide may be employed to etch the copper layer selective to the tin layer. A particular example of the aforementioned etchant is a Co-Bra Etch® etchant modified to comprise about 1% by volume of sulfuric acid, about 4% by volume of phosphoric acid, and about 2% by volume of stabilized hydrogen peroxide. In one embodiment, an aluminum layer in the solar cell is etched without substantially etching the tin layer. For example, an etchant comprising potassium hydroxide may be employed to etch the aluminum layer without substantially etching the tin layer.1. A backside-contact solar cell comprising:
a substrate; a dielectric layer over the substrate; a first copper layer over the dielectric layer, the first copper layer being electrically coupled to a first doped region of the back-side contact solar cell; a first tin layer on the first copper layer; a second copper layer over the dielectric layer, the second copper layer being electrically coupled to a second doped region of the back-side contact solar cell; and a second tin layer on the second copper layer. 2. The back-side contact solar cell of claim 1, wherein the dielectric layer comprises an oxide. 3. The back-side contact solar cell of claim 1, further comprising:
a barrier layer between the first copper layer and the substrate. 4. The back-side contact solar cell of claim 3, wherein the barrier layer comprises titanium-tungsten. 5. The back-side contact solar cell of claim 3, further comprising:
an aluminum layer between the barrier layer and the dielectric layer. 6. The back-side contact solar cell of claim 5, further comprising:
a third copper layer between the first copper layer and the aluminum layer. 7. The back-side contact solar cell of claim 1, wherein the substrate comprises silicon. 8. A backside-contact solar cell comprising:
a substrate; a first copper layer over the substrate, the first copper layer being electrically coupled to a first doped region of the back-side contact solar cell; a first tin layer over the first copper layer; an aluminum layer between the first copper layer and the substrate; a second copper layer over the substrate, the second copper layer being electrically coupled to a second doped region of the back-side contact solar cell; and a second tin layer over the second copper layer. 9. The back-side contact solar cell of claim 8, further comprising:
a dielectric layer between the aluminum layer and the substrate. 10. The back-side contact solar cell of claim 9, wherein the dielectric layer comprises an oxide. 11. The back-side contact solar cell of claim 8, further comprising:
a barrier layer between the first copper layer and the substrate. 12. The back-side contact solar cell of claim 11, wherein the barrier layer comprises titanium-tungsten. 13. The back-side contact solar cell of claim 8, further comprising:
a third copper layer between the first copper layer and the aluminum layer. 14. The back-side contact solar cell of claim 8, wherein the substrate comprises silicon. 15. A backside-contact solar cell comprising:
a substrate; a first copper layer over the substrate, the first copper layer being electrically coupled to a doped region of the back-side contact solar cell; a tin layer over the copper layer; an aluminum layer between the first copper layer and the substrate; and a barrier layer between the first copper layer and the aluminum layer. 16. The back-side contact solar cell of claim 15, further comprising:
a dielectric layer between the aluminum layer and the substrate. 17. The back-side contact solar cell of claim 16, wherein the dielectric layer comprises an oxide. 18. The back-side contact solar cell of claim 15, wherein the barrier layer comprises titanium-tungsten. 19. The back-side contact solar cell of claim 15, wherein the first copper layer has a thickness of about 20 microns. 20. The back-side contact solar cell of claim 15, further comprising:
a second copper layer between the first copper layer and the aluminum layer. | 2,800 |
12,073 | 12,073 | 15,362,741 | 2,865 | A system, method and computer program product are provided for selecting signals to be measured utilizing a metrology tool that optimizes the precision of the measurement. The technique includes the steps of simulating a set of signals for measuring one or more parameters of a metrology target. A normalized Jacobian matrix corresponding to the set of signals is generated, a subset of signals in the simulated set of signals is selected that optimizes a performance metric associated with measuring the one or more parameters of the metrology target based on the normalized Jacobian matrix, and a metrology tool is utilized to collect a measurement for each signal in the subset of signals for the metrology target. For a given number of signals collected by the metrology tool, this technique optimizes the precision of such measurements over conventional techniques that collect signals uniformly distributed over a range of process parameters. | 1. A method, comprising:
simulating, via a processor executing a simulator module, a set of signals for measuring one or more parameters of a metrology target, each signal in the set of signals having one or more configurations for measuring the one or more parameters of the metrology target; generating a normalized Jacobian matrix corresponding to the set of signals; selecting a subset of signals in the simulated set of signals that optimizes a performance metric associated with measuring the one or more parameters of the metrology target, based on the normalized Jacobian matrix, wherein the subset of signals includes fewer signals than the set of signals; and utilizing a metrology tool to collect a measurement for the one or more parameters of the metrology target using the selected subset of signals, wherein the metrology tool includes one of:
a spectroscopic ellipsometer (SE);
a SE with multiple angles of illumination;
a SE measuring Mueller matrix elements;
a single-wavelength ellipsometers;
a beam profile ellipsometer;
a beam profile reflectometer;
a broadband reflective spectrometer;
a single-wavelength reflectometer;
an angle-resolved reflectometer;
an imaging system;
a scatterometer;
a small-angle x-ray scattering (SAXS) device;
an x-ray powder diffraction (XRD) device;
an x-ray Fluorescence (XRF) device;
an x-ray photoelectron spectroscopy (XPS) device;
an x-ray reflectivity (XRR) device;
a Raman spectroscopy device;
a scanning electron microscopy (SEM) device;
a tunneling electron microscope (TEM) device; and
an atomic force microscope (AFM) device. 2. The method of claim 1, wherein selecting the subset of signals comprises:
generating a covariance matrix for the one or more parameters of the metrology target; calculating a normed projection value for each row of the normalized Jacobian matrix by projecting the row onto one or more eigenvectors of the covariance matrix; and selecting, as the subset of signals, a number of signals in the simulated set of signals corresponding with the rows of the normalized Jacobian matrix having the largest normed projection values. 3. The method of claim 2, wherein calculating the normed projection value for each row comprises multiplying by a weight. 4. The method of claim 3, wherein the weight is set according to criteria including at least one of a choice of the metrology tool, a wavelength, an incidence angle, an azimuth angle, a polarization, a focal length, an integration time, or other parameters associated with the measurements. 5. The method of claim 1, wherein the one or more parameters include at least one of a critical dimension of the metrology target and a material characteristic. 6. The method of claim 1, wherein the performance metric is based on a precision of the measurement of each parameter. 7. The method of claim 1, wherein the performance metric is a unified performance metric that combines multiple performance metrics utilizing weight coefficients. 8. The method of claim 1, wherein the simulator module comprises instructions that generate the set of signals based on a model of a system including the metrology tool and one or more metrology targets on a wafer defined by a set of modeling parameters. 9. (canceled) 10. The method of claim 1, further comprising:
utilizing the metrology tool to collect a measurement for the one or more parameters of one or more additional metrology targets using the selected subset of signals; and analyzing the measurements collected for the metrology target and the one or more additional metrology targets to determine the one or more parameters for each of the metrology targets, wherein determining the one or more parameters for a particular metrology target includes analysis of measurements associated with at least one other metrology target. 11. The method of claim 10, wherein the measurement collected for the metrology target and the one or more additional metrology targets are utilized as a reference set of signals to calibrate high-throughput metrology tools. 12. The method of claim 10, wherein the metrology tool is an x-ray metrology tool. 13. A computer program product embodied on a non-transitory computer readable medium, the computer program product including code adapted to be executed by a computer to perform a method comprising:
simulating, via a processor executing a simulator module, a set of signals for measuring one or more parameters of a metrology target, each signal in the set of signals having one or more configurations for measuring the one or more parameters of the metrology target; generating a normalized Jacobian matrix corresponding to the set of signals; selecting a subset of signals in the simulated set of signals that optimizes a performance metric associated with measuring the one or more parameters of the metrology target, based on the normalized Jacobian matrix, wherein the subset of signals includes fewer signals than the set of signals; and utilizing a metrology tool to collect a measurement for the one or more parameters of the metrology target using the selected subset of signals, wherein the metrology tool includes one of:
a spectroscopic ellipsometer (SE);
a SE with multiple angles of illumination;
a SE measuring Mueller matrix elements;
a single-wavelength ellipsometers;
a beam profile ellipsometer;
a beam profile reflectometer;
a broadband reflective spectrometer;
a single-wavelength reflectometer;
an angle-resolved reflectometer;
an imaging system;
a scatterometer;
a small-angle x-ray scattering (SAXS) device;
an x-ray powder diffraction (XRD) device;
an x-ray Fluorescence (XRF) device;
an x-ray photoelectron spectroscopy (XPS) device;
an x-ray reflectivity (XRR) device;
a Raman spectroscopy device;
a scanning electron microscopy (SEM) device;
a tunneling electron microscope (TEM) device; and
an atomic force microscope (AFM) device. 14. The computer program product of claim 13, wherein selecting the subset of signals comprises:
generating a covariance matrix for the one or more parameters of the metrology target; calculating a normed projection value for each row of the normalized Jacobian matrix by projecting the row onto one or more eigenvectors of the covariance matrix; and selecting, as the subset of signals, a number of signals in the simulated set of signals corresponding with the rows of the normalized Jacobian matrix having the largest normed projection values. 15. The computer program product of claim 13, wherein the simulator module comprises instructions that generate the set of signals based on a model of a system including the metrology tool and one or more metrology targets on a wafer defined by a set of modeling parameters. 16. The computer program product of claim 13, the method further comprising:
utilizing the metrology tool to collect a measurement for the one or more parameters of one or more additional metrology targets using the selected subset of signals; and analyzing the measurements collected for the metrology target and the one or more additional metrology targets to determine the one or more parameters for each of the metrology targets, wherein determining the one or more parameters for a particular metrology target includes analysis of measurements associated with at least one other metrology target. 17. A system, comprising:
a memory storing a simulator module; a metrology tool for collecting measurements associated with metrology targets on a wafer; and a processor coupled to the memory and configured to:
simulate, via the simulator module, a set of signals for measuring one or more parameters of a metrology target, each signal in the set of signals having one or more configurations for measuring the one or more parameters of the metrology target,
generate a normalized Jacobian matrix corresponding to the set of signals,
select a subset of signals in the simulated set of signals that optimizes a performance metric associated with measuring the one or more parameters of the metrology target, based on the normalized Jacobian matrix, wherein the subset of signals includes fewer signals than the set of signals, and
utilize the metrology tool to collect a measurement for the one or more parameters of the metrology target using the selected subset of signals, wherein the metrology tool includes one of:
a spectroscopic ellipsometer (SE);
a SE with multiple angles of illumination;
a SE measuring Mueller matrix elements;
a single-wavelength ellipsometers;
a beam profile ellipsometer;
a beam profile reflectometer;
a broadband reflective spectrometer;
a single-wavelength reflectometer;
an angle-resolved reflectometer;
an imaging system;
a scatterometer;
a small-angle x-ray scattering (SAXS) device;
an x-ray powder diffraction (XRD) device;
an x-ray Fluorescence (XRF) device;
an x-ray photoelectron spectroscopy (XPS) device;
an x-ray reflectivity (XRR) device;
a Raman spectroscopy device;
a scanning electron microscopy (SEM) device;
a tunneling electron microscope (TEM) device; and
an atomic force microscope (AFM) device. 18. The system of claim 17, wherein selecting the subset of signals comprises:
generating a covariance matrix for the one or more parameters of the metrology target; calculating a normed projection value for each row of the normalized Jacobian matrix by projecting the row onto one or more eigenvectors of the covariance matrix; and selecting, as the subset of signals, a number of signals in the simulated set of signals corresponding with the rows of the normalized Jacobian matrix having the largest normed projection values. 19. The system of claim 18, wherein calculating the normed projection value for each row comprises multiplying by a weight. 20. The system of claim 19, wherein the weight is set according to criteria including at least one of a choice of the metrology tool, a wavelength, an incidence angle, an azimuth angle, a polarization, a focal length, an integration time, or other parameters associated with the measurements. 21. The system of claim 17, wherein the one or more parameters include at least one of a critical dimension of the metrology target and a material characteristic. 22. The system of claim 17, wherein the performance metric is based on a precision of the measurement of each parameter. 23. The system of claim 17, wherein the performance metric is a unified performance metric that combines multiple performance metrics utilizing weight coefficients. 24. The system of claim 17, wherein the simulator module comprises instructions that generate the set of signals based on a model of a system including the metrology tool and one or more metrology targets on a wafer defined by a set of modeling parameters. 25. (canceled) 26. The system of claim 17, the processor further configured to:
utilize the metrology tool to collect a measurement for the one or more parameters of one or more additional metrology targets using the selected subset of signals; and analyze the measurements collected for the metrology target and the one or more additional metrology targets to determine the one or more parameters for each of the metrology targets, wherein determining the one or more parameters for a particular metrology target includes analysis of measurements associated with at least one other metrology target. 27. The system of claim 26, wherein the measurement collected for the metrology target and the one or more additional metrology targets are utilized as a reference set of signals to calibrate high-throughput metrology tools. 28. The system of claim 26, wherein the metrology tool is an x-ray metrology tool. | A system, method and computer program product are provided for selecting signals to be measured utilizing a metrology tool that optimizes the precision of the measurement. The technique includes the steps of simulating a set of signals for measuring one or more parameters of a metrology target. A normalized Jacobian matrix corresponding to the set of signals is generated, a subset of signals in the simulated set of signals is selected that optimizes a performance metric associated with measuring the one or more parameters of the metrology target based on the normalized Jacobian matrix, and a metrology tool is utilized to collect a measurement for each signal in the subset of signals for the metrology target. For a given number of signals collected by the metrology tool, this technique optimizes the precision of such measurements over conventional techniques that collect signals uniformly distributed over a range of process parameters.1. A method, comprising:
simulating, via a processor executing a simulator module, a set of signals for measuring one or more parameters of a metrology target, each signal in the set of signals having one or more configurations for measuring the one or more parameters of the metrology target; generating a normalized Jacobian matrix corresponding to the set of signals; selecting a subset of signals in the simulated set of signals that optimizes a performance metric associated with measuring the one or more parameters of the metrology target, based on the normalized Jacobian matrix, wherein the subset of signals includes fewer signals than the set of signals; and utilizing a metrology tool to collect a measurement for the one or more parameters of the metrology target using the selected subset of signals, wherein the metrology tool includes one of:
a spectroscopic ellipsometer (SE);
a SE with multiple angles of illumination;
a SE measuring Mueller matrix elements;
a single-wavelength ellipsometers;
a beam profile ellipsometer;
a beam profile reflectometer;
a broadband reflective spectrometer;
a single-wavelength reflectometer;
an angle-resolved reflectometer;
an imaging system;
a scatterometer;
a small-angle x-ray scattering (SAXS) device;
an x-ray powder diffraction (XRD) device;
an x-ray Fluorescence (XRF) device;
an x-ray photoelectron spectroscopy (XPS) device;
an x-ray reflectivity (XRR) device;
a Raman spectroscopy device;
a scanning electron microscopy (SEM) device;
a tunneling electron microscope (TEM) device; and
an atomic force microscope (AFM) device. 2. The method of claim 1, wherein selecting the subset of signals comprises:
generating a covariance matrix for the one or more parameters of the metrology target; calculating a normed projection value for each row of the normalized Jacobian matrix by projecting the row onto one or more eigenvectors of the covariance matrix; and selecting, as the subset of signals, a number of signals in the simulated set of signals corresponding with the rows of the normalized Jacobian matrix having the largest normed projection values. 3. The method of claim 2, wherein calculating the normed projection value for each row comprises multiplying by a weight. 4. The method of claim 3, wherein the weight is set according to criteria including at least one of a choice of the metrology tool, a wavelength, an incidence angle, an azimuth angle, a polarization, a focal length, an integration time, or other parameters associated with the measurements. 5. The method of claim 1, wherein the one or more parameters include at least one of a critical dimension of the metrology target and a material characteristic. 6. The method of claim 1, wherein the performance metric is based on a precision of the measurement of each parameter. 7. The method of claim 1, wherein the performance metric is a unified performance metric that combines multiple performance metrics utilizing weight coefficients. 8. The method of claim 1, wherein the simulator module comprises instructions that generate the set of signals based on a model of a system including the metrology tool and one or more metrology targets on a wafer defined by a set of modeling parameters. 9. (canceled) 10. The method of claim 1, further comprising:
utilizing the metrology tool to collect a measurement for the one or more parameters of one or more additional metrology targets using the selected subset of signals; and analyzing the measurements collected for the metrology target and the one or more additional metrology targets to determine the one or more parameters for each of the metrology targets, wherein determining the one or more parameters for a particular metrology target includes analysis of measurements associated with at least one other metrology target. 11. The method of claim 10, wherein the measurement collected for the metrology target and the one or more additional metrology targets are utilized as a reference set of signals to calibrate high-throughput metrology tools. 12. The method of claim 10, wherein the metrology tool is an x-ray metrology tool. 13. A computer program product embodied on a non-transitory computer readable medium, the computer program product including code adapted to be executed by a computer to perform a method comprising:
simulating, via a processor executing a simulator module, a set of signals for measuring one or more parameters of a metrology target, each signal in the set of signals having one or more configurations for measuring the one or more parameters of the metrology target; generating a normalized Jacobian matrix corresponding to the set of signals; selecting a subset of signals in the simulated set of signals that optimizes a performance metric associated with measuring the one or more parameters of the metrology target, based on the normalized Jacobian matrix, wherein the subset of signals includes fewer signals than the set of signals; and utilizing a metrology tool to collect a measurement for the one or more parameters of the metrology target using the selected subset of signals, wherein the metrology tool includes one of:
a spectroscopic ellipsometer (SE);
a SE with multiple angles of illumination;
a SE measuring Mueller matrix elements;
a single-wavelength ellipsometers;
a beam profile ellipsometer;
a beam profile reflectometer;
a broadband reflective spectrometer;
a single-wavelength reflectometer;
an angle-resolved reflectometer;
an imaging system;
a scatterometer;
a small-angle x-ray scattering (SAXS) device;
an x-ray powder diffraction (XRD) device;
an x-ray Fluorescence (XRF) device;
an x-ray photoelectron spectroscopy (XPS) device;
an x-ray reflectivity (XRR) device;
a Raman spectroscopy device;
a scanning electron microscopy (SEM) device;
a tunneling electron microscope (TEM) device; and
an atomic force microscope (AFM) device. 14. The computer program product of claim 13, wherein selecting the subset of signals comprises:
generating a covariance matrix for the one or more parameters of the metrology target; calculating a normed projection value for each row of the normalized Jacobian matrix by projecting the row onto one or more eigenvectors of the covariance matrix; and selecting, as the subset of signals, a number of signals in the simulated set of signals corresponding with the rows of the normalized Jacobian matrix having the largest normed projection values. 15. The computer program product of claim 13, wherein the simulator module comprises instructions that generate the set of signals based on a model of a system including the metrology tool and one or more metrology targets on a wafer defined by a set of modeling parameters. 16. The computer program product of claim 13, the method further comprising:
utilizing the metrology tool to collect a measurement for the one or more parameters of one or more additional metrology targets using the selected subset of signals; and analyzing the measurements collected for the metrology target and the one or more additional metrology targets to determine the one or more parameters for each of the metrology targets, wherein determining the one or more parameters for a particular metrology target includes analysis of measurements associated with at least one other metrology target. 17. A system, comprising:
a memory storing a simulator module; a metrology tool for collecting measurements associated with metrology targets on a wafer; and a processor coupled to the memory and configured to:
simulate, via the simulator module, a set of signals for measuring one or more parameters of a metrology target, each signal in the set of signals having one or more configurations for measuring the one or more parameters of the metrology target,
generate a normalized Jacobian matrix corresponding to the set of signals,
select a subset of signals in the simulated set of signals that optimizes a performance metric associated with measuring the one or more parameters of the metrology target, based on the normalized Jacobian matrix, wherein the subset of signals includes fewer signals than the set of signals, and
utilize the metrology tool to collect a measurement for the one or more parameters of the metrology target using the selected subset of signals, wherein the metrology tool includes one of:
a spectroscopic ellipsometer (SE);
a SE with multiple angles of illumination;
a SE measuring Mueller matrix elements;
a single-wavelength ellipsometers;
a beam profile ellipsometer;
a beam profile reflectometer;
a broadband reflective spectrometer;
a single-wavelength reflectometer;
an angle-resolved reflectometer;
an imaging system;
a scatterometer;
a small-angle x-ray scattering (SAXS) device;
an x-ray powder diffraction (XRD) device;
an x-ray Fluorescence (XRF) device;
an x-ray photoelectron spectroscopy (XPS) device;
an x-ray reflectivity (XRR) device;
a Raman spectroscopy device;
a scanning electron microscopy (SEM) device;
a tunneling electron microscope (TEM) device; and
an atomic force microscope (AFM) device. 18. The system of claim 17, wherein selecting the subset of signals comprises:
generating a covariance matrix for the one or more parameters of the metrology target; calculating a normed projection value for each row of the normalized Jacobian matrix by projecting the row onto one or more eigenvectors of the covariance matrix; and selecting, as the subset of signals, a number of signals in the simulated set of signals corresponding with the rows of the normalized Jacobian matrix having the largest normed projection values. 19. The system of claim 18, wherein calculating the normed projection value for each row comprises multiplying by a weight. 20. The system of claim 19, wherein the weight is set according to criteria including at least one of a choice of the metrology tool, a wavelength, an incidence angle, an azimuth angle, a polarization, a focal length, an integration time, or other parameters associated with the measurements. 21. The system of claim 17, wherein the one or more parameters include at least one of a critical dimension of the metrology target and a material characteristic. 22. The system of claim 17, wherein the performance metric is based on a precision of the measurement of each parameter. 23. The system of claim 17, wherein the performance metric is a unified performance metric that combines multiple performance metrics utilizing weight coefficients. 24. The system of claim 17, wherein the simulator module comprises instructions that generate the set of signals based on a model of a system including the metrology tool and one or more metrology targets on a wafer defined by a set of modeling parameters. 25. (canceled) 26. The system of claim 17, the processor further configured to:
utilize the metrology tool to collect a measurement for the one or more parameters of one or more additional metrology targets using the selected subset of signals; and analyze the measurements collected for the metrology target and the one or more additional metrology targets to determine the one or more parameters for each of the metrology targets, wherein determining the one or more parameters for a particular metrology target includes analysis of measurements associated with at least one other metrology target. 27. The system of claim 26, wherein the measurement collected for the metrology target and the one or more additional metrology targets are utilized as a reference set of signals to calibrate high-throughput metrology tools. 28. The system of claim 26, wherein the metrology tool is an x-ray metrology tool. | 2,800 |
12,074 | 12,074 | 16,130,362 | 2,819 | A semiconductor device includes a semiconductor substrate and a metal structure in electrical contact with the semiconductor substrate. The metal structure has copper as a main component. An encapsulation layer includes a matrix material and a releasable copper corrosion inhibitor dispersed in the matrix material. The matrix material of the encapsulation layer at least partially covers the metal structure. A protective layer is at least partially on and in contact with a surface of the metal structure, and disposed between the metal structure and the encapsulation layer. | 1. A semiconductor device, comprising:
a semiconductor substrate; a metal structure comprising a surface, the metal structure being in electrical contact with the semiconductor substrate, the metal structure comprising copper as a main component; an encapsulation layer comprising a matrix material and a releasable copper corrosion inhibitor dispersed in the matrix material, the matrix material at least partially covering the metal structure; and a protective layer at least partially on and in contact with a surface of the metal structure, and disposed between the metal structure and the encapsulation. 2. The semiconductor device of claim 1, wherein the protective layer comprises an inorganic material selected from the group consisting of metal oxides and metals which are more noble than copper. 3. The semiconductor device of claim 1, wherein the matrix material of the encapsulation layer comprises a polymeric material. 4. The semiconductor device of claim 1, wherein the encapsulation layer comprises carriers embedded in the matrix material and containing the copper corrosion inhibitor which are releasable from the carriers. 5. The semiconductor device of claim 4, wherein the carriers are selected from the group consisting of: SiO2-nanocapsules; SiO2-mesoporous particles; halloysites; hydroxyapatites; layered double hydroxides; and zeolites. 6. The semiconductor device of claim 4, wherein a mean size of the carriers is less than 1 μm. 7. The semiconductor device of claim 4, wherein a release of the copper corrosion inhibitor from the carriers is triggerable by mechanical rupture, time, and/or a chemical trigger. 8. The semiconductor device of claim 1, wherein the copper corrosion inhibitor comprises an inorganic compound, an organic compound, or a mixture of an inorganic compound and an organic compound. 9. The semiconductor device of claim 8, wherein the copper corrosion inhibitor comprises an inorganic cation. 10. The semiconductor device of claim 8, wherein the copper corrosion inhibitor comprises an inorganic anion. 11. The semiconductor device of claim 8, wherein the copper corrosion inhibitor comprises benzotriazole, salicylaldoxime, 8-hydroxyquinolone and/or quinaldic acid. 12. The semiconductor device of claim 8, wherein the copper corrosion inhibitor is a combination of an organic inhibitor and an inorganic inhibitor. 13. The semiconductor device of claim 4, wherein the carriers are SiO2 mesoporous particles, the copper corrosion inhibitor is in pores of the SiO2 mesoporous particles, and the release of the copper corrosion inhibitor is triggerable by a lowering of pH. 14. The semiconductor device of claim 1, wherein the protective layer is free of chromium. 15. The semiconductor device of claim 1, wherein the metal structure comprises a copper pad and/or a copper wire. 16. A semiconductor device, comprising:
a semiconductor chip; a conductive metal structure comprising a metal or a metal alloy and being in electrical contact with the semiconductor chip; a protective layer in direct contact with a surface of the conductive metal structure; and an encapsulation layer comprising a polymeric matrix material and carriers embedded in the polymeric matrix material of the encapsulation layer, the carriers containing a corrosion inhibitor for preventing or stopping corrosion of the metal or metal alloy of the conductive metal structure, the corrosion inhibitor being releasable from the carriers upon occurrence of a trigger, the conductive metal structure and the protective layer being at least partially in contact with the polymeric matrix material. 17. The semiconductor device of claim 16, wherein the carriers comprise inorganic porous particles having pores and containing the corrosion inhibitor, or a precursor of the corrosion inhibitor, in the pores. 18. The semiconductor device of claim 16, wherein the metal or metal alloy of the conductive metal structure comprises copper as a main component. 19. The semiconductor device of claim 16, wherein the protective layer comprises a metal oxide. 20. The semiconductor device of claim 16, wherein the corrosion inhibitor comprises an inorganic compound containing Ce+3, Zn+2, La+3, and/or MoO4 −2. 21. The semiconductor device of claim 16, wherein the corrosion inhibitor comprises an organic compound containing benzotriazole, salicylaldoxime, 8-hydroxyquinolone, and/or quinaldic acid. 22. A method of forming a corrosion resistant semiconductor device, the method comprising:
providing a semiconductor substrate comprising a metal structure with a surface, the metal structure being in electrical contact with the semiconductor substrate, the metal structure comprising copper as a main component; forming a protective layer at least partially on and in contact with the surface of the metal structure; and forming an encapsulation layer comprising a matrix material and a releasable copper corrosion inhibitor dispersed in the matrix material, the matrix material at least partially covering the metal structure, wherein the protective layer is disposed between the metal structure and the encapsulation layer. 23. The method of claim 22, wherein the encapsulation layer comprises carriers embedded in the matrix material of the encapsulation layer and containing the copper corrosion inhibitor which are releasable from the carriers. 24. The method of claim 22, wherein the protective layer comprises an inorganic material selected from the group consisting of metal oxides and metals which are more noble than copper. 25. The method of claim 22, wherein the copper corrosion inhibitor comprises an inorganic compound, an organic compound, or a mixture of an inorganic compound and an organic compound. 26. A semiconductor device, comprising:
a semiconductor chip; a conductive metal structure comprising a metal or a metal alloy and being in electrical contact with the semiconductor chip; and a protective layer in direct contact with a surface of the conductive metal structure, the protective layer comprising an inorganic matrix material and corrosion inhibitors embedded in the inorganic matrix material, the corrosion inhibitors configured to prevent or stop corrosion of the metal or metal alloy of the conductive metal structure. 27. The semiconductor device of claim 26, wherein the conductive metal structure comprises copper. | A semiconductor device includes a semiconductor substrate and a metal structure in electrical contact with the semiconductor substrate. The metal structure has copper as a main component. An encapsulation layer includes a matrix material and a releasable copper corrosion inhibitor dispersed in the matrix material. The matrix material of the encapsulation layer at least partially covers the metal structure. A protective layer is at least partially on and in contact with a surface of the metal structure, and disposed between the metal structure and the encapsulation layer.1. A semiconductor device, comprising:
a semiconductor substrate; a metal structure comprising a surface, the metal structure being in electrical contact with the semiconductor substrate, the metal structure comprising copper as a main component; an encapsulation layer comprising a matrix material and a releasable copper corrosion inhibitor dispersed in the matrix material, the matrix material at least partially covering the metal structure; and a protective layer at least partially on and in contact with a surface of the metal structure, and disposed between the metal structure and the encapsulation. 2. The semiconductor device of claim 1, wherein the protective layer comprises an inorganic material selected from the group consisting of metal oxides and metals which are more noble than copper. 3. The semiconductor device of claim 1, wherein the matrix material of the encapsulation layer comprises a polymeric material. 4. The semiconductor device of claim 1, wherein the encapsulation layer comprises carriers embedded in the matrix material and containing the copper corrosion inhibitor which are releasable from the carriers. 5. The semiconductor device of claim 4, wherein the carriers are selected from the group consisting of: SiO2-nanocapsules; SiO2-mesoporous particles; halloysites; hydroxyapatites; layered double hydroxides; and zeolites. 6. The semiconductor device of claim 4, wherein a mean size of the carriers is less than 1 μm. 7. The semiconductor device of claim 4, wherein a release of the copper corrosion inhibitor from the carriers is triggerable by mechanical rupture, time, and/or a chemical trigger. 8. The semiconductor device of claim 1, wherein the copper corrosion inhibitor comprises an inorganic compound, an organic compound, or a mixture of an inorganic compound and an organic compound. 9. The semiconductor device of claim 8, wherein the copper corrosion inhibitor comprises an inorganic cation. 10. The semiconductor device of claim 8, wherein the copper corrosion inhibitor comprises an inorganic anion. 11. The semiconductor device of claim 8, wherein the copper corrosion inhibitor comprises benzotriazole, salicylaldoxime, 8-hydroxyquinolone and/or quinaldic acid. 12. The semiconductor device of claim 8, wherein the copper corrosion inhibitor is a combination of an organic inhibitor and an inorganic inhibitor. 13. The semiconductor device of claim 4, wherein the carriers are SiO2 mesoporous particles, the copper corrosion inhibitor is in pores of the SiO2 mesoporous particles, and the release of the copper corrosion inhibitor is triggerable by a lowering of pH. 14. The semiconductor device of claim 1, wherein the protective layer is free of chromium. 15. The semiconductor device of claim 1, wherein the metal structure comprises a copper pad and/or a copper wire. 16. A semiconductor device, comprising:
a semiconductor chip; a conductive metal structure comprising a metal or a metal alloy and being in electrical contact with the semiconductor chip; a protective layer in direct contact with a surface of the conductive metal structure; and an encapsulation layer comprising a polymeric matrix material and carriers embedded in the polymeric matrix material of the encapsulation layer, the carriers containing a corrosion inhibitor for preventing or stopping corrosion of the metal or metal alloy of the conductive metal structure, the corrosion inhibitor being releasable from the carriers upon occurrence of a trigger, the conductive metal structure and the protective layer being at least partially in contact with the polymeric matrix material. 17. The semiconductor device of claim 16, wherein the carriers comprise inorganic porous particles having pores and containing the corrosion inhibitor, or a precursor of the corrosion inhibitor, in the pores. 18. The semiconductor device of claim 16, wherein the metal or metal alloy of the conductive metal structure comprises copper as a main component. 19. The semiconductor device of claim 16, wherein the protective layer comprises a metal oxide. 20. The semiconductor device of claim 16, wherein the corrosion inhibitor comprises an inorganic compound containing Ce+3, Zn+2, La+3, and/or MoO4 −2. 21. The semiconductor device of claim 16, wherein the corrosion inhibitor comprises an organic compound containing benzotriazole, salicylaldoxime, 8-hydroxyquinolone, and/or quinaldic acid. 22. A method of forming a corrosion resistant semiconductor device, the method comprising:
providing a semiconductor substrate comprising a metal structure with a surface, the metal structure being in electrical contact with the semiconductor substrate, the metal structure comprising copper as a main component; forming a protective layer at least partially on and in contact with the surface of the metal structure; and forming an encapsulation layer comprising a matrix material and a releasable copper corrosion inhibitor dispersed in the matrix material, the matrix material at least partially covering the metal structure, wherein the protective layer is disposed between the metal structure and the encapsulation layer. 23. The method of claim 22, wherein the encapsulation layer comprises carriers embedded in the matrix material of the encapsulation layer and containing the copper corrosion inhibitor which are releasable from the carriers. 24. The method of claim 22, wherein the protective layer comprises an inorganic material selected from the group consisting of metal oxides and metals which are more noble than copper. 25. The method of claim 22, wherein the copper corrosion inhibitor comprises an inorganic compound, an organic compound, or a mixture of an inorganic compound and an organic compound. 26. A semiconductor device, comprising:
a semiconductor chip; a conductive metal structure comprising a metal or a metal alloy and being in electrical contact with the semiconductor chip; and a protective layer in direct contact with a surface of the conductive metal structure, the protective layer comprising an inorganic matrix material and corrosion inhibitors embedded in the inorganic matrix material, the corrosion inhibitors configured to prevent or stop corrosion of the metal or metal alloy of the conductive metal structure. 27. The semiconductor device of claim 26, wherein the conductive metal structure comprises copper. | 2,800 |
12,075 | 12,075 | 14,956,323 | 2,841 | A display device includes a flexible display and a support frame. The flexible display includes a first portion, a second portion, and a third portion there between. The support frame includes a first display support supporting the first portion, a second display support supporting the second portion, and a third display support supporting the third portion. The third display support is connected to the first display support and the second display support. The first display support and the second display support are rotatably connected between a configuration for maintaining the flexible display in a closed position and a configuration for maintaining the flexible display in an open position. The third display support includes a panel movable according to the rotation of the first display support and the second display support, such that the panel contacts the third portion of the flexible display in an open position of the flexible display. | 1. A display device comprising:
a flexible display comprising a first portion, a second portion, and a third portion between the first portion and the second portion; and a support frame comprising a first display support supporting the first portion of the flexible display, a second display support supporting the second portion of the flexible display, and a third display support supporting the third portion of the flexible display, the third display support connected to the first display support and the second display support, wherein the first display support and the second display support are rotatably connected between a configuration for maintaining the flexible display in a closed position and a configuration for maintaining the flexible display in an open position, wherein while the first display support and the second display support are rotated between the configuration for maintaining the flexible display in a closed position and the configuration for maintaining the flexible display in an open position, the third display support comprises a panel to be movable according to the rotation of the first display support and the second display support, such that the panel contacts the third portion of the flexible display in the open position of the flexible display. 2. The display device of claim 1, wherein the first display support and the second display support are hingeably connected with each other by a hinge mechanism, and wherein in the open position of the flexible display the hinge mechanism creates a gap between the first display support and the second display support, the gap being filled by the third display support. 3. The display device of claim 2, wherein in the closed position of the flexible display between the first display support and the third display support and between the second display support and the third display support there is a free space enabling a partial curvature of the third portion without conflicting with each of the first display support and the second display support. 4. The display device of claim 3, wherein in the closed position of the flexible display the third display support facilitates a pre-defined curvature of the third portion. 5. The display device of claim 1, wherein the hinge mechanism comprises two hinges being mutually located at a distance, in the open position of the flexible display the third display support is arranged between the two hinges. 6. The display device of claim 5, wherein the third display support includes elongated support portions of the first display support and the second display support, the hinges being arranged between the support portions and the first display support and the second display support. 7. The display device of claim 1, wherein the third display support is in the open position at least partly tensioned, facilitating the support of the third portion. | A display device includes a flexible display and a support frame. The flexible display includes a first portion, a second portion, and a third portion there between. The support frame includes a first display support supporting the first portion, a second display support supporting the second portion, and a third display support supporting the third portion. The third display support is connected to the first display support and the second display support. The first display support and the second display support are rotatably connected between a configuration for maintaining the flexible display in a closed position and a configuration for maintaining the flexible display in an open position. The third display support includes a panel movable according to the rotation of the first display support and the second display support, such that the panel contacts the third portion of the flexible display in an open position of the flexible display.1. A display device comprising:
a flexible display comprising a first portion, a second portion, and a third portion between the first portion and the second portion; and a support frame comprising a first display support supporting the first portion of the flexible display, a second display support supporting the second portion of the flexible display, and a third display support supporting the third portion of the flexible display, the third display support connected to the first display support and the second display support, wherein the first display support and the second display support are rotatably connected between a configuration for maintaining the flexible display in a closed position and a configuration for maintaining the flexible display in an open position, wherein while the first display support and the second display support are rotated between the configuration for maintaining the flexible display in a closed position and the configuration for maintaining the flexible display in an open position, the third display support comprises a panel to be movable according to the rotation of the first display support and the second display support, such that the panel contacts the third portion of the flexible display in the open position of the flexible display. 2. The display device of claim 1, wherein the first display support and the second display support are hingeably connected with each other by a hinge mechanism, and wherein in the open position of the flexible display the hinge mechanism creates a gap between the first display support and the second display support, the gap being filled by the third display support. 3. The display device of claim 2, wherein in the closed position of the flexible display between the first display support and the third display support and between the second display support and the third display support there is a free space enabling a partial curvature of the third portion without conflicting with each of the first display support and the second display support. 4. The display device of claim 3, wherein in the closed position of the flexible display the third display support facilitates a pre-defined curvature of the third portion. 5. The display device of claim 1, wherein the hinge mechanism comprises two hinges being mutually located at a distance, in the open position of the flexible display the third display support is arranged between the two hinges. 6. The display device of claim 5, wherein the third display support includes elongated support portions of the first display support and the second display support, the hinges being arranged between the support portions and the first display support and the second display support. 7. The display device of claim 1, wherein the third display support is in the open position at least partly tensioned, facilitating the support of the third portion. | 2,800 |
12,076 | 12,076 | 15,603,126 | 2,886 | Apparatus and associated methods relate to determining the wavelength of a narrow-band light beam. The narrow-band light beam is passed through an optical filter. The optical filter has complementary and monotonically-varying transmission and reflection coefficients within a predetermined band of wavelengths. The predetermined band of wavelengths includes the wavelength of the narrow-band light beam. A first photodetector detects amplitude of a first portion of the narrow-band light beam transmitted by the optical filter. A second photodetector detects amplitude of a second portion of the narrow-band light beam reflected by the optical filter. The wavelength of the narrow-band light beam is determined, based on a ratio of the determined amplitudes of the first and second portions of the narrow-band light beam transmitted and reflected, respectively. | 1. A system for determining a wavelength of a narrow-band light beam, the system consisting of:
an optical filter having complementary transmission and reflection coefficients within a predetermined band of wavelengths inclusive of the wavelength of the narrow-band light beam, each of the transmission and reflection coefficients monotonically varying throughout the predetermined band of wavelengths; a first photodetector configured to detect amplitude of a first portion of the narrow-band light beam transmitted through the optical filter, and to generate a first output signal indicative of the detected amplitude of the first portion of the narrow-band light beam transmitted through the optical filter; a second photodetector configured to detect amplitude of a second portion of the narrow-band light beam reflected by the optical filter, and to generate a second output signal indicative of the detected amplitude of the narrow-band light beam reflected by the optical filter; and a processor configured to determine, based on a ratio of the first and second output signals, the wavelength of the narrow-band light beam. 2. A system for sensing a parameter, the system including the system for determining a wavelength of a narrow-band light stream of claim 1, and further comprising:
an optical sensor and/or transducer configured to produce the narrow-band light beam having wavelength indicative of a value of a sensed physical parameter. 3. The system of claim 2, wherein the processor is configured to determine the value of the sensed physical parameter based on the determined wavelength of the narrow-band light beam and a sensor specification. 4. The system of claim 2, further comprising:
an optical fiber optically coupling the optical sensor to the optical filter. 5. The system of claim 3, wherein the optical sensor is a Fiber Bragg Grating (FBG) within the optical fiber. 6. The system of claim 2, wherein the optical filter is a first optical filter, the system further comprising:
a second optical filter configured in a path of the narrow-band light beam, the second optical filter configured to transmit light within the predetermined band of wavelengths and to block transmission of light outside the predetermined band of wavelengths. 7. The system of claim 1, wherein the processor is further configured to determine, based on a sum of the first and second output signals, amplitude of the narrow-band light beam. 8. The system of claim 1, wherein the processor is further configured to determine, based on a comparison between the first and second output signals, whether the wavelength of the narrow-band light beam is greater than or less than a predetermined threshold. 9. The system of claim 8, wherein the predetermined threshold is equal to a wavelength at which the transmission and reflection coefficients of the optical filter are equal to one another. 10. The system of claim 2, further comprising:
an optical transmitter configured to transmit light having less than ten percent of its energy from light of wavelengths outside of the predetermined band of wavelengths. 11. The system of claim 1, wherein the first and second photodiodes are fast photodiodes capable of responding to changes in detected amplitudes of light of at least 100 ksps sampling rate, and wherein the processor is configured to determine the wavelength of the light detected by the first and second photodetectors at a sampling rate of at least 100 ksps. 12. The system of claim 1, wherein the first and second photodiodes are fast photodiodes capable of responding to changes in detected amplitudes of light of at least 1 Msps sampling rate, and wherein the processor is configured to determine the wavelength of the light detected by the first and second photodetectors at a sampling rate of at least 1 Msps. 13. A method for determining the wavelength of a narrow-band light beam using the system of claim 1, the method comprising:
optically filtering, using the optical filter having complementary transmission and reflection coefficients within the predetermined band of wavelengths inclusive of the wavelength of the narrow-band light beam, the narrow-band light beam, wherein each of the transmission and reflection coefficients monotonically varies throughout the predetermined band of wavelengths; detecting, using the first photodetector, amplitude a first portion of the narrow-band light beam reflected by the optical filter; generating the first output signal indicative of the detected amplitude of the first portion of the narrow-band light beam transmitted through the optical filter; detecting, using the second photodetector, amplitude of a second portion of the narrow-band light beam transmitted through the optical filter; generating the second output signal indicative of the detected amplitude of the second portion of the narrow-band light beam reflected by the optical filter; and determining, using the processor, the wavelength of the narrow-band light beam, based on the ratio of the first and second output signals. 14. The method of claim 13, further comprising:
filtering, using a bandpass filter configured to pass light within the predetermined band of wavelengths inclusive of the wavelength of the narrow-band light beam and to block transmission of light outside the predetermined band of wavelengths. 15. The method of claim 13, further comprising:
determining, using the processor, amplitude of the narrow-band light beam, based on a sum of the first and second output signals. 16. The method of claim 13, further comprising:
determining, using the processor, if the wavelength of the narrow-band beam of light is greater than or less than a predetermined threshold, based on a comparison between the first and second output signals. 17. The method of claim 16, wherein the predetermined threshold is equal to a wavelength at which the transmission and reflection coefficients of the optical filter are equal to one another. 18. The method of claim 13, further comprising:
transmitting, using an optical transmitter, light having less than ten percent of its energy from light of wavelengths outside of the predetermined band of wavelengths. 19. The system of claim 13, further comprising:
producing, using an optical sensor and/or transducer, an optical signal having an optical spectrum that is indicative of a measurement parameter. 20. The system of claim 13, further comprising:
determining, using the processor, a physical parameter based on the determined wavelength of the narrow-band light beam and a sensor specification. | Apparatus and associated methods relate to determining the wavelength of a narrow-band light beam. The narrow-band light beam is passed through an optical filter. The optical filter has complementary and monotonically-varying transmission and reflection coefficients within a predetermined band of wavelengths. The predetermined band of wavelengths includes the wavelength of the narrow-band light beam. A first photodetector detects amplitude of a first portion of the narrow-band light beam transmitted by the optical filter. A second photodetector detects amplitude of a second portion of the narrow-band light beam reflected by the optical filter. The wavelength of the narrow-band light beam is determined, based on a ratio of the determined amplitudes of the first and second portions of the narrow-band light beam transmitted and reflected, respectively.1. A system for determining a wavelength of a narrow-band light beam, the system consisting of:
an optical filter having complementary transmission and reflection coefficients within a predetermined band of wavelengths inclusive of the wavelength of the narrow-band light beam, each of the transmission and reflection coefficients monotonically varying throughout the predetermined band of wavelengths; a first photodetector configured to detect amplitude of a first portion of the narrow-band light beam transmitted through the optical filter, and to generate a first output signal indicative of the detected amplitude of the first portion of the narrow-band light beam transmitted through the optical filter; a second photodetector configured to detect amplitude of a second portion of the narrow-band light beam reflected by the optical filter, and to generate a second output signal indicative of the detected amplitude of the narrow-band light beam reflected by the optical filter; and a processor configured to determine, based on a ratio of the first and second output signals, the wavelength of the narrow-band light beam. 2. A system for sensing a parameter, the system including the system for determining a wavelength of a narrow-band light stream of claim 1, and further comprising:
an optical sensor and/or transducer configured to produce the narrow-band light beam having wavelength indicative of a value of a sensed physical parameter. 3. The system of claim 2, wherein the processor is configured to determine the value of the sensed physical parameter based on the determined wavelength of the narrow-band light beam and a sensor specification. 4. The system of claim 2, further comprising:
an optical fiber optically coupling the optical sensor to the optical filter. 5. The system of claim 3, wherein the optical sensor is a Fiber Bragg Grating (FBG) within the optical fiber. 6. The system of claim 2, wherein the optical filter is a first optical filter, the system further comprising:
a second optical filter configured in a path of the narrow-band light beam, the second optical filter configured to transmit light within the predetermined band of wavelengths and to block transmission of light outside the predetermined band of wavelengths. 7. The system of claim 1, wherein the processor is further configured to determine, based on a sum of the first and second output signals, amplitude of the narrow-band light beam. 8. The system of claim 1, wherein the processor is further configured to determine, based on a comparison between the first and second output signals, whether the wavelength of the narrow-band light beam is greater than or less than a predetermined threshold. 9. The system of claim 8, wherein the predetermined threshold is equal to a wavelength at which the transmission and reflection coefficients of the optical filter are equal to one another. 10. The system of claim 2, further comprising:
an optical transmitter configured to transmit light having less than ten percent of its energy from light of wavelengths outside of the predetermined band of wavelengths. 11. The system of claim 1, wherein the first and second photodiodes are fast photodiodes capable of responding to changes in detected amplitudes of light of at least 100 ksps sampling rate, and wherein the processor is configured to determine the wavelength of the light detected by the first and second photodetectors at a sampling rate of at least 100 ksps. 12. The system of claim 1, wherein the first and second photodiodes are fast photodiodes capable of responding to changes in detected amplitudes of light of at least 1 Msps sampling rate, and wherein the processor is configured to determine the wavelength of the light detected by the first and second photodetectors at a sampling rate of at least 1 Msps. 13. A method for determining the wavelength of a narrow-band light beam using the system of claim 1, the method comprising:
optically filtering, using the optical filter having complementary transmission and reflection coefficients within the predetermined band of wavelengths inclusive of the wavelength of the narrow-band light beam, the narrow-band light beam, wherein each of the transmission and reflection coefficients monotonically varies throughout the predetermined band of wavelengths; detecting, using the first photodetector, amplitude a first portion of the narrow-band light beam reflected by the optical filter; generating the first output signal indicative of the detected amplitude of the first portion of the narrow-band light beam transmitted through the optical filter; detecting, using the second photodetector, amplitude of a second portion of the narrow-band light beam transmitted through the optical filter; generating the second output signal indicative of the detected amplitude of the second portion of the narrow-band light beam reflected by the optical filter; and determining, using the processor, the wavelength of the narrow-band light beam, based on the ratio of the first and second output signals. 14. The method of claim 13, further comprising:
filtering, using a bandpass filter configured to pass light within the predetermined band of wavelengths inclusive of the wavelength of the narrow-band light beam and to block transmission of light outside the predetermined band of wavelengths. 15. The method of claim 13, further comprising:
determining, using the processor, amplitude of the narrow-band light beam, based on a sum of the first and second output signals. 16. The method of claim 13, further comprising:
determining, using the processor, if the wavelength of the narrow-band beam of light is greater than or less than a predetermined threshold, based on a comparison between the first and second output signals. 17. The method of claim 16, wherein the predetermined threshold is equal to a wavelength at which the transmission and reflection coefficients of the optical filter are equal to one another. 18. The method of claim 13, further comprising:
transmitting, using an optical transmitter, light having less than ten percent of its energy from light of wavelengths outside of the predetermined band of wavelengths. 19. The system of claim 13, further comprising:
producing, using an optical sensor and/or transducer, an optical signal having an optical spectrum that is indicative of a measurement parameter. 20. The system of claim 13, further comprising:
determining, using the processor, a physical parameter based on the determined wavelength of the narrow-band light beam and a sensor specification. | 2,800 |
12,077 | 12,077 | 15,916,773 | 2,853 | A behavior estimation method includes a first step of calculating number of earthquake resistant joints required for absorbing a fault displacement amount in a pipe orthogonal direction, based on an allowable deflection angle and a pipe effective length, and calculating a deflection range in a pipe axis direction, a second step of calculating a load, received by the pipe due to relative displacement between the pipe and ground corresponding to a ground spring model in the pipe orthogonal direction defined with spring constants respectively for relative displacements smaller and larger than a predetermined relative displacement, a third step of calculating a bending moment distribution of joint positions from a bending moment of a trapezoidal distribution load, and obtaining a pipe deflection angle at each of the joint positions based on a predetermined joint deflection spring model, and a deflection performance evaluation step. | 1. A behavior estimation method for a fault-crossing underground pipeline, the method comprising:
a first step of calculating a minimum number of earthquake resistant joints N, on one side of a fault surface, required for absorbing a fault displacement amount H in a pipe orthogonal direction, in fault displacement amounts, by using Formula 1, and calculating a deflection range L0 in a pipe axis direction corresponding to the minimum number of earthquake resistant joints N by using Formula 2, for a pipeline including joints defined with a predetermined joint deflection spring model with a bending moment set to be different values before and after an allowable bending angle θa and pipes having an effective length L,
H
2
≦
L
∑
k
=
1
N
sin
(
k
θ
a
)
[
Formula
1
]
L
0
=
L
×
N
;
[
Formula
2
]
a second step of calculating a load p(y), received by the pipe due to relative displacement y between the pipe and ground, as a trapezoidal distribution load by using Formula 3 corresponding to a ground spring model in the pipe orthogonal direction defined with spring constants k1y and k2y (k1y>k2y) respectively for relative displacements smaller and larger than predetermined relative displacement δgy,
p(y)=k 2y y+(k 1y −k 2y)δgy; [Formula 3]
a third step of calculating a bending moment distribution of joint positions from a bending moment M(x) of the trapezoidal distribution load at a position x in the pipe axis direction by using Formula 4, and obtaining a pipe bending angle θ at each of the joint positions based on the joint deflection spring model using the bending moment distribution obtained,
M
(
x
)
=
x
(
L
0
-
x
)
6
{
3
p
(
0
)
+
(
2
L
0
-
x
L
0
)
p
(
H
2
)
}
;
[
Formula
4
]
a bending performance evaluation step of evaluating bending performance based on whether the bending angle θ, obtained in the third step, does not exceed the allowable bending angle θa; and
a bending performance output step of outputting an evaluation result when the bending angle θ does not exceed the allowable bending angle θa as a document expressing earthquake resistance indicating bending resistance performance, wherein
the bending resistance performance is able to be evaluated only based on the fault displacement amount H in the pipe orthogonal direction, for various fault displacements with different fault displacement amounts in the pipe axis direction. 2. The behavior estimation method for a fault-crossing underground pipeline according to claim 1 further comprising:
a fourth step of calculating axial force f(y) by using Formula 7 corresponding to the ground spring model in the pipe axis direction defined with spring constants k1 and k2 (k1>k2) respectively for relative displacements smaller and larger than predetermined relative displacement δg, based on a relative displacement amount Xg between the pipe and the ground at a fault surface corresponding to a half value of a fault displacement amount in the pipe axis direction, in the fault displacement amounts, a joint expansion and contraction amount δ, a relative displacement amount y(x), between the pipe and the ground at the position x in the pipe axis direction relative to the fault surface, defined with Formula 5, and a range of influence X, in the pipe axis direction, defined by Formula 6,
y
(
x
)
=
-
δ
L
-
δ
x
+
X
g
,
[
Formula
5
]
X
=
L
-
δ
δ
X
g
,
and
[
Formula
6
]
f
(
y
)
=
k
2
y
+
(
k
1
-
k
2
)
δ
g
;
[
Formula
7
]
a fifth step of calculating axial force fmax at a fault position by using Formula 8,
f
m
a
x
=
∫
0
X
f
(
y
(
x
)
)
dx
=
k
2
(
L
-
δ
)
2
δ
X
g
2
+
δ
g
(
k
1
-
k
2
)
(
L
-
δ
)
δ
X
g
;
[
Formula
8
]
an axial force evaluation step of evaluating the axial force based on whether the axial force fmax obtained in the fifth step does not exceed a predetermined reference value; and
an axial force performance output step of outputting an evaluation result when the axial force fmax obtained in the fifth step does not exceed the predetermined reference value as a document expressing earthquake resistance indicating axial force resistance for a pipe connecting pipeline, wherein
axial force resistance performance is able to be evaluated for various fault displacements with different fault displacement amounts in the pipe orthogonal direction, only by using a fault displacement amount Xg in the pipe axis direction. 3. The behavior estimation method for a fault-crossing underground pipeline according to claim 2 further comprising:
a sixth step of setting, when the axial force fmax is evaluated to exceed the predetermined reference value in the axial force evaluation step, a arranged position of each of large displacement absorption units with a joint expansion and contraction amount Δ, the arranged position being a position where the bending angle θ obtained in the third step does not exceed a predetermined angle threshold θt;
a seventh step of calculating the axial force fmax by using Formula 10 for the range of influence X, in the pipe axis direction, defined by Formula 9 based on a disposed interval s of the large displacement absorption units, number Ng of the large displacement absorption units within the range of influence in the pipe axis direction, and number n1 of joints between the fault surface and one of the large displacement absorption units closest to the fault surface,
X
=
max
(
L
-
δ
δ
(
X
g
-
N
g
Δ
)
,
n
1
(
L
-
δ
)
+
(
N
g
-
1
)
n
(
L
-
δ
)
)
N
g
=
⌈
X
g
-
n
1
δ
n
δ
+
Δ
⌉
,
n
1
=
⌈
(
n
+
1
)
/
2
⌉
,
n
=
s
/
L
[
Formula
9
]
f
m
a
x
=
f
ab
-
f
b
f
ab
=
-
k
2
δ
2
(
L
-
δ
)
X
2
+
{
δ
g
(
k
1
-
k
2
)
+
k
2
X
g
}
X
f
b
=
max
(
0
,
N
g
(
N
g
-
1
)
2
f
b
1
)
+
f
b
2
N
g
f
b
1
=
{
k
2
Δ
+
δ
g
(
k
1
-
k
2
)
}
n
(
L
-
δ
)
f
b
2
=
f
b
1
X
-
X
1
n
(
L
-
δ
)
X
1
=
n
1
(
L
-
δ
)
+
(
N
g
-
1
)
n
(
L
-
δ
)
;
[
Formula
10
]
a large displacement absorption unit absorbing axial force evaluation step of evaluating the axial force based on whether the axial force fmax obtained in the seventh step does not exceed a predetermined reference value; and
an output step of outputting an evaluation result when the axial force fmax obtained in the seventh step does not exceed the predetermined reference value as a document expressing earthquake resistance indicating axial force resistance for a pipe connecting pipeline including the large displacement absorption units. 4. The behavior estimation method for a fault-crossing underground pipeline according to claim 2 further comprising:
an axial stress calculation step of calculating axial stress σa=fmax/A based on the axial force fmax and a pipe cross-sectional area A;
a bending stress calculation step of calculating bending stress σb=M/Z based on the bending moment M and a pipe section modulus Z;
a stress calculation step of calculating stress σ=σa+σb by adding the axial stress σa obtained in the axial stress calculation step and the bending stress σb obtained in the bending stress calculation step;
a stress evaluation step of evaluating the stress based on whether the stress σ obtained in the stress calculation step does not exceed a predetermined resistance; and
an output step of outputting an evaluation result when the stress σ obtained in the stress calculation step does not exceed the predetermined resistance as a document expressing earthquake resistance indicating resistance for a pipe connecting pipeline. 5. The behavior estimation method for a fault-crossing underground pipeline according to claim 3 further comprising:
an axial stress calculation step of calculating axial stress σa=fmax/A based on the axial force fmax and a pipe cross-sectional area A;
a bending stress calculation step of calculating bending stress σb=M/Z based on the bending moment M and a pipe section modulus Z;
a stress calculation step of calculating stress σ=σa+σb by adding the axial stress σa obtained in the axial stress calculation step and the bending stress σb obtained in the bending stress calculation step;
a stress evaluation step of evaluating the stress based on whether the stress σ obtained in the stress calculation step does not exceed a predetermined resistance; and
an output step of outputting an evaluation result when the stress σ obtained in the stress calculation step does not exceed the predetermined resistance as a document expressing earthquake resistance indicating resistance for a pipe connecting pipeline including large displacement absorption units. 6. A behavior estimation method for a fault-crossing underground pipeline, the method comprising:
a simple analysis executing step of executing the behavior estimation method for a fault-crossing underground pipeline according to claim 1; a detailed analysis executing step of executing a structural analysis method employing a finite element method after predetermined evaluation is obtained by the simple analysis executing step. 7. A method for laying a fault-crossing underground pipeline with resistance against fault displacement of a predetermined expected fault displacement amount in a pipe axis direction and/or a pipe orthogonal direction, the method comprising
laying a pipeline to have a pipeline configuration identified by the document expressing earthquake resistance obtained by the behavior estimation method for a fault-crossing underground pipeline according to claim 1 for a fault displacement of the predetermined fault displacement amount. 8. A behavior estimation device for a fault-crossing underground pipeline, the device comprising:
a behavior estimation calculation unit that executes the behavior estimation method for a fault-crossing underground pipeline, the behavior estimation calculation unit including a bending performance evaluation unit that executes a first step of calculating a minimum number of earthquake resistant joints N, on one side of a fault surface, required for absorbing a fault displacement amount H in a pipe orthogonal direction, in fault displacement amounts, by using Formula 1, and calculating a bending range L0 in a pipe axis direction corresponding to the minimum number of earthquake resistant joints N by using Formula 2, for a pipeline including joints defined with a predetermined joint deflection spring model with a bending moment set to be different values before and after an allowable bending angle θa and pipes having an effective length L,
H
2
≦
L
∑
k
=
1
N
sin
(
k
θ
a
)
[
Formula
1
]
L
0
=
L
×
N
;
[
Formula
2
]
a second step of calculating a load p(y), received by the pipe due to relative displacement y between the pipe and ground, as a trapezoidal distribution load by using Formula 3 corresponding to a ground spring model in the pipe orthogonal direction defined with spring constants k1y and k2y (k1y>k2y) respectively for relative displacements smaller and larger than predetermined relative displacement δgy,
p(y)=k 2y y+(k 1y −k 2y)δgy; [Formula 3]
a third step of calculating a bending moment distribution of joint positions from a bending moment M(x) of the trapezoidal distribution load at a position x in the pipe axis direction by using Formula 4, and obtaining a pipe bending angle θ at each of the joint positions based on the joint deflection spring model using the bending moment distribution obtained,
M
(
x
)
=
x
(
L
0
-
x
)
6
{
3
p
(
0
)
+
(
2
L
0
-
x
L
0
)
p
(
H
2
)
}
;
[
Formula
4
]
and
a bending performance evaluation step of evaluating bending performance based on whether the bending angle θ, obtained in the third step, does not exceed the allowable bending angle θa;
a condition input unit with which a calculation condition is set for the behavior estimation calculation unit;
a storage unit that stores calculation results obtained by the behavior estimation calculation unit;
a display unit that displays any one of the calculation results stored in the storage unit; and
an output unit that outputs a positive evaluation result stored in the storage unit as a document expressing earthquake resistance. 9. The behavior estimation device for a fault-crossing underground pipeline according to claim 8, wherein the behavior estimation calculation unit includes an axial force evaluation unit that executes
a fourth step of calculating axial force f(y) by using Formula 7 corresponding to the ground spring model in the pipe axis direction defined with spring constants k1 and k2 (k1>k2) respectively for relative displacements smaller and larger than predetermined relative displacement δg, based on a relative displacement amount Xg between the pipe and the ground at a fault surface corresponding to a half value of a fault displacement amount in the pipe axis direction, in the fault displacement amounts, a joint expansion and contraction amount δ, a relative displacement amount y(x), between the pipe and the ground at the position x in the pipe axis direction relative to the fault surface, defined with Formula 5, and a range of influence X, in the pipe axis direction, defined by Formula 6,
y
(
x
)
=
-
δ
L
-
δ
x
+
X
g
,
[
Formula
5
]
X
=
L
-
δ
δ
X
g
,
and
[
Formula
6
]
f
(
y
)
=
k
2
y
+
(
k
1
-
k
2
)
δ
g
;
[
Formula
7
]
a fifth step of calculating axial force fmax at a fault position by using Formula 8,
f
m
a
x
=
∫
0
X
f
(
y
(
x
)
)
dx
=
k
2
(
L
-
δ
)
2
δ
X
g
2
+
δ
g
(
k
1
-
k
2
)
(
L
-
δ
)
δ
X
g
;
[
Formula
8
]
and
an axial force evaluation step of evaluating the axial force based on whether the axial force fmax obtained in the fifth step does not exceed a predetermined reference value. 10. The behavior estimation device for a fault-crossing underground pipeline according to claim 8, wherein
the behavior estimation calculation unit includes a large displacement absorption unit absorbing axial force evaluation unit that executes
a sixth step of setting, when the axial force fmax is evaluated to exceed the predetermined reference value in the axial force evaluation step, a arranged position of each of large displacement absorption units with a joint expansion and contraction amount Δ, the arranged position being a position where the bending angle θ obtained in the third step does not exceed a predetermined angle threshold θt;
a seventh step of calculating the axial force fmax by using Formula 10 for the range of influence X, in the pipe axis direction, defined by Formula 9 based on a disposed interval s of the large displacement absorption units, number Ng of the large displacement absorption units within the range of influence in the pipe axis direction, and number n1 of joints between the fault surface and one of the large displacement absorption units closest to the fault surface,
X
=
max
(
L
-
δ
δ
(
X
g
-
N
g
Δ
)
,
n
1
(
L
-
δ
)
+
(
N
g
-
1
)
n
(
L
-
δ
)
)
N
g
=
⌈
X
g
-
n
1
δ
n
δ
+
Δ
⌉
,
n
1
=
⌈
(
n
+
1
)
/
2
⌉
,
n
=
s
/
L
[
Formula
9
]
f
m
a
x
=
f
ab
-
f
b
f
ab
=
-
k
2
δ
2
(
L
-
δ
)
X
2
+
{
δ
g
(
k
1
-
k
2
)
+
k
2
X
g
}
X
f
b
=
max
(
0
,
N
g
(
N
g
-
1
)
2
f
b
1
)
+
f
b
2
N
g
f
b
1
=
{
k
2
Δ
+
δ
g
(
k
1
-
k
2
)
}
n
(
L
-
δ
)
f
b
2
=
f
b
1
X
-
X
1
n
(
L
-
δ
)
X
1
=
n
1
(
L
-
δ
)
+
(
N
g
-
1
)
n
(
L
-
δ
)
;
[
Formula
10
]
and
a large displacement absorption unit absorbing axial force evaluation step of evaluating the axial force based on whether the axial force fmax obtained in the seventh step does not exceed a predetermined reference value. 11. The behavior estimation device for a fault-crossing underground pipeline according to claim 8, wherein
the behavior estimation calculation unit includes a stress evaluation unit that executes
an axial stress calculation step of calculating axial stress σa=fmax/A based on the axial force fmax and a pipe cross-sectional area A;
a bending stress calculation step of calculating bending stress σb=M/Z based on the bending moment M and a pipe section modulus Z;
a stress calculation step of calculating stress σ=σa+σb by adding the axial stress σa obtained in the axial stress calculation step and the bending stress σb obtained in the bending stress calculation step; and
a stress evaluation step of evaluating the stress based on whether the stress σ obtained in the stress calculation step does not exceed a predetermined resistance. | A behavior estimation method includes a first step of calculating number of earthquake resistant joints required for absorbing a fault displacement amount in a pipe orthogonal direction, based on an allowable deflection angle and a pipe effective length, and calculating a deflection range in a pipe axis direction, a second step of calculating a load, received by the pipe due to relative displacement between the pipe and ground corresponding to a ground spring model in the pipe orthogonal direction defined with spring constants respectively for relative displacements smaller and larger than a predetermined relative displacement, a third step of calculating a bending moment distribution of joint positions from a bending moment of a trapezoidal distribution load, and obtaining a pipe deflection angle at each of the joint positions based on a predetermined joint deflection spring model, and a deflection performance evaluation step.1. A behavior estimation method for a fault-crossing underground pipeline, the method comprising:
a first step of calculating a minimum number of earthquake resistant joints N, on one side of a fault surface, required for absorbing a fault displacement amount H in a pipe orthogonal direction, in fault displacement amounts, by using Formula 1, and calculating a deflection range L0 in a pipe axis direction corresponding to the minimum number of earthquake resistant joints N by using Formula 2, for a pipeline including joints defined with a predetermined joint deflection spring model with a bending moment set to be different values before and after an allowable bending angle θa and pipes having an effective length L,
H
2
≦
L
∑
k
=
1
N
sin
(
k
θ
a
)
[
Formula
1
]
L
0
=
L
×
N
;
[
Formula
2
]
a second step of calculating a load p(y), received by the pipe due to relative displacement y between the pipe and ground, as a trapezoidal distribution load by using Formula 3 corresponding to a ground spring model in the pipe orthogonal direction defined with spring constants k1y and k2y (k1y>k2y) respectively for relative displacements smaller and larger than predetermined relative displacement δgy,
p(y)=k 2y y+(k 1y −k 2y)δgy; [Formula 3]
a third step of calculating a bending moment distribution of joint positions from a bending moment M(x) of the trapezoidal distribution load at a position x in the pipe axis direction by using Formula 4, and obtaining a pipe bending angle θ at each of the joint positions based on the joint deflection spring model using the bending moment distribution obtained,
M
(
x
)
=
x
(
L
0
-
x
)
6
{
3
p
(
0
)
+
(
2
L
0
-
x
L
0
)
p
(
H
2
)
}
;
[
Formula
4
]
a bending performance evaluation step of evaluating bending performance based on whether the bending angle θ, obtained in the third step, does not exceed the allowable bending angle θa; and
a bending performance output step of outputting an evaluation result when the bending angle θ does not exceed the allowable bending angle θa as a document expressing earthquake resistance indicating bending resistance performance, wherein
the bending resistance performance is able to be evaluated only based on the fault displacement amount H in the pipe orthogonal direction, for various fault displacements with different fault displacement amounts in the pipe axis direction. 2. The behavior estimation method for a fault-crossing underground pipeline according to claim 1 further comprising:
a fourth step of calculating axial force f(y) by using Formula 7 corresponding to the ground spring model in the pipe axis direction defined with spring constants k1 and k2 (k1>k2) respectively for relative displacements smaller and larger than predetermined relative displacement δg, based on a relative displacement amount Xg between the pipe and the ground at a fault surface corresponding to a half value of a fault displacement amount in the pipe axis direction, in the fault displacement amounts, a joint expansion and contraction amount δ, a relative displacement amount y(x), between the pipe and the ground at the position x in the pipe axis direction relative to the fault surface, defined with Formula 5, and a range of influence X, in the pipe axis direction, defined by Formula 6,
y
(
x
)
=
-
δ
L
-
δ
x
+
X
g
,
[
Formula
5
]
X
=
L
-
δ
δ
X
g
,
and
[
Formula
6
]
f
(
y
)
=
k
2
y
+
(
k
1
-
k
2
)
δ
g
;
[
Formula
7
]
a fifth step of calculating axial force fmax at a fault position by using Formula 8,
f
m
a
x
=
∫
0
X
f
(
y
(
x
)
)
dx
=
k
2
(
L
-
δ
)
2
δ
X
g
2
+
δ
g
(
k
1
-
k
2
)
(
L
-
δ
)
δ
X
g
;
[
Formula
8
]
an axial force evaluation step of evaluating the axial force based on whether the axial force fmax obtained in the fifth step does not exceed a predetermined reference value; and
an axial force performance output step of outputting an evaluation result when the axial force fmax obtained in the fifth step does not exceed the predetermined reference value as a document expressing earthquake resistance indicating axial force resistance for a pipe connecting pipeline, wherein
axial force resistance performance is able to be evaluated for various fault displacements with different fault displacement amounts in the pipe orthogonal direction, only by using a fault displacement amount Xg in the pipe axis direction. 3. The behavior estimation method for a fault-crossing underground pipeline according to claim 2 further comprising:
a sixth step of setting, when the axial force fmax is evaluated to exceed the predetermined reference value in the axial force evaluation step, a arranged position of each of large displacement absorption units with a joint expansion and contraction amount Δ, the arranged position being a position where the bending angle θ obtained in the third step does not exceed a predetermined angle threshold θt;
a seventh step of calculating the axial force fmax by using Formula 10 for the range of influence X, in the pipe axis direction, defined by Formula 9 based on a disposed interval s of the large displacement absorption units, number Ng of the large displacement absorption units within the range of influence in the pipe axis direction, and number n1 of joints between the fault surface and one of the large displacement absorption units closest to the fault surface,
X
=
max
(
L
-
δ
δ
(
X
g
-
N
g
Δ
)
,
n
1
(
L
-
δ
)
+
(
N
g
-
1
)
n
(
L
-
δ
)
)
N
g
=
⌈
X
g
-
n
1
δ
n
δ
+
Δ
⌉
,
n
1
=
⌈
(
n
+
1
)
/
2
⌉
,
n
=
s
/
L
[
Formula
9
]
f
m
a
x
=
f
ab
-
f
b
f
ab
=
-
k
2
δ
2
(
L
-
δ
)
X
2
+
{
δ
g
(
k
1
-
k
2
)
+
k
2
X
g
}
X
f
b
=
max
(
0
,
N
g
(
N
g
-
1
)
2
f
b
1
)
+
f
b
2
N
g
f
b
1
=
{
k
2
Δ
+
δ
g
(
k
1
-
k
2
)
}
n
(
L
-
δ
)
f
b
2
=
f
b
1
X
-
X
1
n
(
L
-
δ
)
X
1
=
n
1
(
L
-
δ
)
+
(
N
g
-
1
)
n
(
L
-
δ
)
;
[
Formula
10
]
a large displacement absorption unit absorbing axial force evaluation step of evaluating the axial force based on whether the axial force fmax obtained in the seventh step does not exceed a predetermined reference value; and
an output step of outputting an evaluation result when the axial force fmax obtained in the seventh step does not exceed the predetermined reference value as a document expressing earthquake resistance indicating axial force resistance for a pipe connecting pipeline including the large displacement absorption units. 4. The behavior estimation method for a fault-crossing underground pipeline according to claim 2 further comprising:
an axial stress calculation step of calculating axial stress σa=fmax/A based on the axial force fmax and a pipe cross-sectional area A;
a bending stress calculation step of calculating bending stress σb=M/Z based on the bending moment M and a pipe section modulus Z;
a stress calculation step of calculating stress σ=σa+σb by adding the axial stress σa obtained in the axial stress calculation step and the bending stress σb obtained in the bending stress calculation step;
a stress evaluation step of evaluating the stress based on whether the stress σ obtained in the stress calculation step does not exceed a predetermined resistance; and
an output step of outputting an evaluation result when the stress σ obtained in the stress calculation step does not exceed the predetermined resistance as a document expressing earthquake resistance indicating resistance for a pipe connecting pipeline. 5. The behavior estimation method for a fault-crossing underground pipeline according to claim 3 further comprising:
an axial stress calculation step of calculating axial stress σa=fmax/A based on the axial force fmax and a pipe cross-sectional area A;
a bending stress calculation step of calculating bending stress σb=M/Z based on the bending moment M and a pipe section modulus Z;
a stress calculation step of calculating stress σ=σa+σb by adding the axial stress σa obtained in the axial stress calculation step and the bending stress σb obtained in the bending stress calculation step;
a stress evaluation step of evaluating the stress based on whether the stress σ obtained in the stress calculation step does not exceed a predetermined resistance; and
an output step of outputting an evaluation result when the stress σ obtained in the stress calculation step does not exceed the predetermined resistance as a document expressing earthquake resistance indicating resistance for a pipe connecting pipeline including large displacement absorption units. 6. A behavior estimation method for a fault-crossing underground pipeline, the method comprising:
a simple analysis executing step of executing the behavior estimation method for a fault-crossing underground pipeline according to claim 1; a detailed analysis executing step of executing a structural analysis method employing a finite element method after predetermined evaluation is obtained by the simple analysis executing step. 7. A method for laying a fault-crossing underground pipeline with resistance against fault displacement of a predetermined expected fault displacement amount in a pipe axis direction and/or a pipe orthogonal direction, the method comprising
laying a pipeline to have a pipeline configuration identified by the document expressing earthquake resistance obtained by the behavior estimation method for a fault-crossing underground pipeline according to claim 1 for a fault displacement of the predetermined fault displacement amount. 8. A behavior estimation device for a fault-crossing underground pipeline, the device comprising:
a behavior estimation calculation unit that executes the behavior estimation method for a fault-crossing underground pipeline, the behavior estimation calculation unit including a bending performance evaluation unit that executes a first step of calculating a minimum number of earthquake resistant joints N, on one side of a fault surface, required for absorbing a fault displacement amount H in a pipe orthogonal direction, in fault displacement amounts, by using Formula 1, and calculating a bending range L0 in a pipe axis direction corresponding to the minimum number of earthquake resistant joints N by using Formula 2, for a pipeline including joints defined with a predetermined joint deflection spring model with a bending moment set to be different values before and after an allowable bending angle θa and pipes having an effective length L,
H
2
≦
L
∑
k
=
1
N
sin
(
k
θ
a
)
[
Formula
1
]
L
0
=
L
×
N
;
[
Formula
2
]
a second step of calculating a load p(y), received by the pipe due to relative displacement y between the pipe and ground, as a trapezoidal distribution load by using Formula 3 corresponding to a ground spring model in the pipe orthogonal direction defined with spring constants k1y and k2y (k1y>k2y) respectively for relative displacements smaller and larger than predetermined relative displacement δgy,
p(y)=k 2y y+(k 1y −k 2y)δgy; [Formula 3]
a third step of calculating a bending moment distribution of joint positions from a bending moment M(x) of the trapezoidal distribution load at a position x in the pipe axis direction by using Formula 4, and obtaining a pipe bending angle θ at each of the joint positions based on the joint deflection spring model using the bending moment distribution obtained,
M
(
x
)
=
x
(
L
0
-
x
)
6
{
3
p
(
0
)
+
(
2
L
0
-
x
L
0
)
p
(
H
2
)
}
;
[
Formula
4
]
and
a bending performance evaluation step of evaluating bending performance based on whether the bending angle θ, obtained in the third step, does not exceed the allowable bending angle θa;
a condition input unit with which a calculation condition is set for the behavior estimation calculation unit;
a storage unit that stores calculation results obtained by the behavior estimation calculation unit;
a display unit that displays any one of the calculation results stored in the storage unit; and
an output unit that outputs a positive evaluation result stored in the storage unit as a document expressing earthquake resistance. 9. The behavior estimation device for a fault-crossing underground pipeline according to claim 8, wherein the behavior estimation calculation unit includes an axial force evaluation unit that executes
a fourth step of calculating axial force f(y) by using Formula 7 corresponding to the ground spring model in the pipe axis direction defined with spring constants k1 and k2 (k1>k2) respectively for relative displacements smaller and larger than predetermined relative displacement δg, based on a relative displacement amount Xg between the pipe and the ground at a fault surface corresponding to a half value of a fault displacement amount in the pipe axis direction, in the fault displacement amounts, a joint expansion and contraction amount δ, a relative displacement amount y(x), between the pipe and the ground at the position x in the pipe axis direction relative to the fault surface, defined with Formula 5, and a range of influence X, in the pipe axis direction, defined by Formula 6,
y
(
x
)
=
-
δ
L
-
δ
x
+
X
g
,
[
Formula
5
]
X
=
L
-
δ
δ
X
g
,
and
[
Formula
6
]
f
(
y
)
=
k
2
y
+
(
k
1
-
k
2
)
δ
g
;
[
Formula
7
]
a fifth step of calculating axial force fmax at a fault position by using Formula 8,
f
m
a
x
=
∫
0
X
f
(
y
(
x
)
)
dx
=
k
2
(
L
-
δ
)
2
δ
X
g
2
+
δ
g
(
k
1
-
k
2
)
(
L
-
δ
)
δ
X
g
;
[
Formula
8
]
and
an axial force evaluation step of evaluating the axial force based on whether the axial force fmax obtained in the fifth step does not exceed a predetermined reference value. 10. The behavior estimation device for a fault-crossing underground pipeline according to claim 8, wherein
the behavior estimation calculation unit includes a large displacement absorption unit absorbing axial force evaluation unit that executes
a sixth step of setting, when the axial force fmax is evaluated to exceed the predetermined reference value in the axial force evaluation step, a arranged position of each of large displacement absorption units with a joint expansion and contraction amount Δ, the arranged position being a position where the bending angle θ obtained in the third step does not exceed a predetermined angle threshold θt;
a seventh step of calculating the axial force fmax by using Formula 10 for the range of influence X, in the pipe axis direction, defined by Formula 9 based on a disposed interval s of the large displacement absorption units, number Ng of the large displacement absorption units within the range of influence in the pipe axis direction, and number n1 of joints between the fault surface and one of the large displacement absorption units closest to the fault surface,
X
=
max
(
L
-
δ
δ
(
X
g
-
N
g
Δ
)
,
n
1
(
L
-
δ
)
+
(
N
g
-
1
)
n
(
L
-
δ
)
)
N
g
=
⌈
X
g
-
n
1
δ
n
δ
+
Δ
⌉
,
n
1
=
⌈
(
n
+
1
)
/
2
⌉
,
n
=
s
/
L
[
Formula
9
]
f
m
a
x
=
f
ab
-
f
b
f
ab
=
-
k
2
δ
2
(
L
-
δ
)
X
2
+
{
δ
g
(
k
1
-
k
2
)
+
k
2
X
g
}
X
f
b
=
max
(
0
,
N
g
(
N
g
-
1
)
2
f
b
1
)
+
f
b
2
N
g
f
b
1
=
{
k
2
Δ
+
δ
g
(
k
1
-
k
2
)
}
n
(
L
-
δ
)
f
b
2
=
f
b
1
X
-
X
1
n
(
L
-
δ
)
X
1
=
n
1
(
L
-
δ
)
+
(
N
g
-
1
)
n
(
L
-
δ
)
;
[
Formula
10
]
and
a large displacement absorption unit absorbing axial force evaluation step of evaluating the axial force based on whether the axial force fmax obtained in the seventh step does not exceed a predetermined reference value. 11. The behavior estimation device for a fault-crossing underground pipeline according to claim 8, wherein
the behavior estimation calculation unit includes a stress evaluation unit that executes
an axial stress calculation step of calculating axial stress σa=fmax/A based on the axial force fmax and a pipe cross-sectional area A;
a bending stress calculation step of calculating bending stress σb=M/Z based on the bending moment M and a pipe section modulus Z;
a stress calculation step of calculating stress σ=σa+σb by adding the axial stress σa obtained in the axial stress calculation step and the bending stress σb obtained in the bending stress calculation step; and
a stress evaluation step of evaluating the stress based on whether the stress σ obtained in the stress calculation step does not exceed a predetermined resistance. | 2,800 |
12,078 | 12,078 | 13,166,073 | 2,814 | It is an object to provide a semiconductor device including an oxide semiconductor, which has stable electric characteristics and high reliability. A semiconductor device having a stacked-layer structure of a gate insulating layer; a first gate electrode in contact with one surface of the gate insulating layer; an oxide semiconductor layer in contact with the other surface of the gate insulating layer and overlapping with the first gate electrode; and a source electrode, a drain electrode, and an oxide insulating layer which are in contact with the oxide semiconductor layer is provided, in which the nitrogen concentration of the oxide semiconductor layer is 2×10 19 atoms/cm 3 or lower and the source electrode and the drain electrode include one or more of tungsten, platinum, and molybdenum. | 1. A semiconductor device comprising:
a gate insulating layer; a first gate electrode in contact with one surface of the gate insulating layer; an oxide semiconductor layer in contact with the other surface of the gate insulating layer and overlapping with the first gate electrode; and a source electrode, a drain electrode, and an oxide insulating layer which are in contact with the oxide semiconductor layer, wherein a nitrogen concentration of the oxide semiconductor layer is 2×1019 atoms/cm3 or lower, and wherein the source electrode and the drain electrode include at least one of tungsten, platinum, and molybdenum. 2. The semiconductor device according to claim 1, wherein the gate insulating layer includes at least one of gallium oxide, aluminum oxide, gallium aluminum oxide, and aluminum gallium oxide. 3. The semiconductor device according to claim 1, wherein the oxide insulating layer includes at least one of gallium oxide, aluminum oxide, gallium aluminum oxide, and aluminum gallium oxide. 4. The semiconductor device according to claim 1, wherein a thickness of the oxide semiconductor layer is greater than or equal to 3 nm and less than or equal to 30 nm. 5. The semiconductor device according to claim 1, further comprising a second gate electrode overlapping with the oxide semiconductor layer and the first gate electrode with the oxide insulating layer interposed therebetween. 6. The semiconductor device according to claim 1, wherein the oxide insulating layer contains a Group 13 element. 7. The semiconductor device according to claim 1, wherein the oxide insulating layer includes a region containing oxygen with a higher composition proportion than a stoichiometric composition proportion. 8. The semiconductor device according to claim 1, wherein the gate insulating layer includes a region containing oxygen with a higher composition proportion than a stoichiometric composition proportion. 9. The semiconductor device according to claim 1, wherein nitrogen concentrations of the source electrode and the drain electrode are 2×1019 atoms/cm3 or lower. 10. The semiconductor device according to claim 1, wherein the oxide insulating layer comprises a metal oxide. 11. A semiconductor device comprising:
a gate insulating layer; a first gate electrode in contact with one surface of the gate insulating layer; an oxide semiconductor layer in contact with the other surface of the gate insulating layer and overlapping with the first gate electrode; a buffer layer and an oxide insulating layer which are in contact with the oxide semiconductor layer; and a source electrode and a drain electrode which are electrically connected to the oxide semiconductor layer with the buffer layer interposed therebetween, wherein a nitrogen concentration of the oxide semiconductor layer is 2×1019 atoms/cm3 or lower, wherein a nitrogen concentration of the buffer layer is 2×1019 atoms/cm3 or lower, and wherein the source electrode and the drain electrode include at least one of tungsten, platinum, and molybdenum. 12. The semiconductor device according to claim 11, wherein the gate insulating layer includes at least one of gallium oxide, aluminum oxide, gallium aluminum oxide, and aluminum gallium oxide. 13. The semiconductor device according to claim 11, wherein the oxide insulating layer includes at least one of gallium oxide, aluminum oxide, gallium aluminum oxide, and aluminum gallium oxide. 14. The semiconductor device according to claim 11, wherein a thickness of the oxide semiconductor layer is greater than or equal to 3 nm and less than or equal to 30 nm. 15. The semiconductor device according to claim 11, further comprising a second gate electrode overlapping with the oxide semiconductor layer and the first gate electrode with the oxide insulating layer interposed therebetween. 16. The semiconductor device according to claim 11, wherein the oxide insulating layer contains a Group 13 element. 17. The semiconductor device according to claim 11, wherein the oxide insulating layer includes a region containing oxygen with a higher composition proportion than a stoichiometric composition proportion. 18. The semiconductor device according to claim 11, wherein the gate insulating layer includes a region containing oxygen with a higher composition proportion than a stoichiometric composition proportion. 19. The semiconductor device according to claim 11, wherein nitrogen concentrations of the source electrode and the drain electrode are 2×1019 atoms/cm3 or lower. 20. The semiconductor device according to claim 11, wherein the oxide insulating layer comprises a metal oxide. | It is an object to provide a semiconductor device including an oxide semiconductor, which has stable electric characteristics and high reliability. A semiconductor device having a stacked-layer structure of a gate insulating layer; a first gate electrode in contact with one surface of the gate insulating layer; an oxide semiconductor layer in contact with the other surface of the gate insulating layer and overlapping with the first gate electrode; and a source electrode, a drain electrode, and an oxide insulating layer which are in contact with the oxide semiconductor layer is provided, in which the nitrogen concentration of the oxide semiconductor layer is 2×10 19 atoms/cm 3 or lower and the source electrode and the drain electrode include one or more of tungsten, platinum, and molybdenum.1. A semiconductor device comprising:
a gate insulating layer; a first gate electrode in contact with one surface of the gate insulating layer; an oxide semiconductor layer in contact with the other surface of the gate insulating layer and overlapping with the first gate electrode; and a source electrode, a drain electrode, and an oxide insulating layer which are in contact with the oxide semiconductor layer, wherein a nitrogen concentration of the oxide semiconductor layer is 2×1019 atoms/cm3 or lower, and wherein the source electrode and the drain electrode include at least one of tungsten, platinum, and molybdenum. 2. The semiconductor device according to claim 1, wherein the gate insulating layer includes at least one of gallium oxide, aluminum oxide, gallium aluminum oxide, and aluminum gallium oxide. 3. The semiconductor device according to claim 1, wherein the oxide insulating layer includes at least one of gallium oxide, aluminum oxide, gallium aluminum oxide, and aluminum gallium oxide. 4. The semiconductor device according to claim 1, wherein a thickness of the oxide semiconductor layer is greater than or equal to 3 nm and less than or equal to 30 nm. 5. The semiconductor device according to claim 1, further comprising a second gate electrode overlapping with the oxide semiconductor layer and the first gate electrode with the oxide insulating layer interposed therebetween. 6. The semiconductor device according to claim 1, wherein the oxide insulating layer contains a Group 13 element. 7. The semiconductor device according to claim 1, wherein the oxide insulating layer includes a region containing oxygen with a higher composition proportion than a stoichiometric composition proportion. 8. The semiconductor device according to claim 1, wherein the gate insulating layer includes a region containing oxygen with a higher composition proportion than a stoichiometric composition proportion. 9. The semiconductor device according to claim 1, wherein nitrogen concentrations of the source electrode and the drain electrode are 2×1019 atoms/cm3 or lower. 10. The semiconductor device according to claim 1, wherein the oxide insulating layer comprises a metal oxide. 11. A semiconductor device comprising:
a gate insulating layer; a first gate electrode in contact with one surface of the gate insulating layer; an oxide semiconductor layer in contact with the other surface of the gate insulating layer and overlapping with the first gate electrode; a buffer layer and an oxide insulating layer which are in contact with the oxide semiconductor layer; and a source electrode and a drain electrode which are electrically connected to the oxide semiconductor layer with the buffer layer interposed therebetween, wherein a nitrogen concentration of the oxide semiconductor layer is 2×1019 atoms/cm3 or lower, wherein a nitrogen concentration of the buffer layer is 2×1019 atoms/cm3 or lower, and wherein the source electrode and the drain electrode include at least one of tungsten, platinum, and molybdenum. 12. The semiconductor device according to claim 11, wherein the gate insulating layer includes at least one of gallium oxide, aluminum oxide, gallium aluminum oxide, and aluminum gallium oxide. 13. The semiconductor device according to claim 11, wherein the oxide insulating layer includes at least one of gallium oxide, aluminum oxide, gallium aluminum oxide, and aluminum gallium oxide. 14. The semiconductor device according to claim 11, wherein a thickness of the oxide semiconductor layer is greater than or equal to 3 nm and less than or equal to 30 nm. 15. The semiconductor device according to claim 11, further comprising a second gate electrode overlapping with the oxide semiconductor layer and the first gate electrode with the oxide insulating layer interposed therebetween. 16. The semiconductor device according to claim 11, wherein the oxide insulating layer contains a Group 13 element. 17. The semiconductor device according to claim 11, wherein the oxide insulating layer includes a region containing oxygen with a higher composition proportion than a stoichiometric composition proportion. 18. The semiconductor device according to claim 11, wherein the gate insulating layer includes a region containing oxygen with a higher composition proportion than a stoichiometric composition proportion. 19. The semiconductor device according to claim 11, wherein nitrogen concentrations of the source electrode and the drain electrode are 2×1019 atoms/cm3 or lower. 20. The semiconductor device according to claim 11, wherein the oxide insulating layer comprises a metal oxide. | 2,800 |
12,079 | 12,079 | 15,247,259 | 2,811 | A semiconductor chip with conductive vias and a method of manufacturing the same are disclosed. The method includes forming a first plurality of conductive vias in a layer of a first semiconductor chip. The first plurality of conductive vias includes first ends and second ends. A first conductor pad is formed in ohmic contact with the first ends of the first plurality of conductive vias. | 1. An apparatus, comprising:
a first semiconductor chip including a layer; a first conductor pad coupled to the first semiconductor chip; a first plurality of conductive vias traversing the layer and having first ends and second ends; and a conductive via extension on each of the first ends of the first conductive vias and in ohmic contact with the first conductor pad. 2. The apparatus of claim 1, wherein the apparatus comprises a second conductor pad coupled to the first semiconductor chip and a second plurality of conductive vias traversing the layer and having third and fourth ends, the third ends in ohmic contact with the second conductor pad. 3. The apparatus of claim 1, comprising a conductor structure in ohmic contact with the second ends of the first plurality of conductive vias. 4. The apparatus of claim 3, wherein the conductor structure comprises a redistribution layer structure. 5. The apparatus of claim 1, comprising an input/output structure coupled to the first conductor pad. 6. The apparatus of claim 5, wherein the input/output structure comprises a solder bump or a conductive pillar. 7. The apparatus of claim 1, comprising a second semiconductor chip stacked on the first semiconductor chip. 8. The apparatus of claim 1, comprising a circuit board coupled to the first semiconductor chip. 9. The apparatus of claim 1, comprising a conductor structure in ohmic contact with the second ends of the first plurality of conductive vias. 10. The apparatus of claim 1, wherein the first conductive vias include a polymer core and a conductor jacket around the polymer core. 11. An apparatus, comprising:
a first semiconductor chip including a layer; a first plurality of conductive vias in the layer of the first semiconductor chip, each of the first plurality of conductive vias including a first end, a second end, a polymer core and a conductor jacket around the polymer core; and a first conductor pad in ohmic contact with the first ends of the first conductive vias. 12. The apparatus of claim 11, comprising a conductive via extension on each of the first ends of the first conductive vias and in ohmic contact with the first conductor pad. 13. The apparatus of claim 11, wherein the apparatus comprises a second conductor pad coupled to the first semiconductor chip and a second plurality of conductive vias traversing the layer and having third and fourth ends, the third ends in ohmic contact with the second conductor pad. 14. The apparatus of claim 11, comprising a conductor structure in ohmic contact with the second ends of the first plurality of conductive vias. 15. The apparatus of claim 14, wherein the conductor structure comprises a redistribution layer structure. 16. The apparatus of claim 11, comprising a solder bump or a conductive pillar coupled to the first conductor pad. 17. The apparatus of claim 11, comprising a second semiconductor chip stacked on the first semiconductor chip. 18. The apparatus of claim 11, comprising a circuit board coupled to the first semiconductor chip. 19. The apparatus of claim 11, comprising a conductor structure in ohmic contact with the second ends of the first plurality of conductive vias. 20. An apparatus, comprising:
a first semiconductor chip including a layer; a first conductor pad coupled to the first semiconductor chip; a first plurality of conductive vias traversing the stratum and having first ends and second ends; a conductive via extension on each of the first ends of the first conductive vias and in ohmic contact with the first conductor pad; and wherein the apparatus is embodied in instructions stored in a computer readable medium. | A semiconductor chip with conductive vias and a method of manufacturing the same are disclosed. The method includes forming a first plurality of conductive vias in a layer of a first semiconductor chip. The first plurality of conductive vias includes first ends and second ends. A first conductor pad is formed in ohmic contact with the first ends of the first plurality of conductive vias.1. An apparatus, comprising:
a first semiconductor chip including a layer; a first conductor pad coupled to the first semiconductor chip; a first plurality of conductive vias traversing the layer and having first ends and second ends; and a conductive via extension on each of the first ends of the first conductive vias and in ohmic contact with the first conductor pad. 2. The apparatus of claim 1, wherein the apparatus comprises a second conductor pad coupled to the first semiconductor chip and a second plurality of conductive vias traversing the layer and having third and fourth ends, the third ends in ohmic contact with the second conductor pad. 3. The apparatus of claim 1, comprising a conductor structure in ohmic contact with the second ends of the first plurality of conductive vias. 4. The apparatus of claim 3, wherein the conductor structure comprises a redistribution layer structure. 5. The apparatus of claim 1, comprising an input/output structure coupled to the first conductor pad. 6. The apparatus of claim 5, wherein the input/output structure comprises a solder bump or a conductive pillar. 7. The apparatus of claim 1, comprising a second semiconductor chip stacked on the first semiconductor chip. 8. The apparatus of claim 1, comprising a circuit board coupled to the first semiconductor chip. 9. The apparatus of claim 1, comprising a conductor structure in ohmic contact with the second ends of the first plurality of conductive vias. 10. The apparatus of claim 1, wherein the first conductive vias include a polymer core and a conductor jacket around the polymer core. 11. An apparatus, comprising:
a first semiconductor chip including a layer; a first plurality of conductive vias in the layer of the first semiconductor chip, each of the first plurality of conductive vias including a first end, a second end, a polymer core and a conductor jacket around the polymer core; and a first conductor pad in ohmic contact with the first ends of the first conductive vias. 12. The apparatus of claim 11, comprising a conductive via extension on each of the first ends of the first conductive vias and in ohmic contact with the first conductor pad. 13. The apparatus of claim 11, wherein the apparatus comprises a second conductor pad coupled to the first semiconductor chip and a second plurality of conductive vias traversing the layer and having third and fourth ends, the third ends in ohmic contact with the second conductor pad. 14. The apparatus of claim 11, comprising a conductor structure in ohmic contact with the second ends of the first plurality of conductive vias. 15. The apparatus of claim 14, wherein the conductor structure comprises a redistribution layer structure. 16. The apparatus of claim 11, comprising a solder bump or a conductive pillar coupled to the first conductor pad. 17. The apparatus of claim 11, comprising a second semiconductor chip stacked on the first semiconductor chip. 18. The apparatus of claim 11, comprising a circuit board coupled to the first semiconductor chip. 19. The apparatus of claim 11, comprising a conductor structure in ohmic contact with the second ends of the first plurality of conductive vias. 20. An apparatus, comprising:
a first semiconductor chip including a layer; a first conductor pad coupled to the first semiconductor chip; a first plurality of conductive vias traversing the stratum and having first ends and second ends; a conductive via extension on each of the first ends of the first conductive vias and in ohmic contact with the first conductor pad; and wherein the apparatus is embodied in instructions stored in a computer readable medium. | 2,800 |
12,080 | 12,080 | 16,069,946 | 2,829 | Provided is a thermal conducting sheet, including: a binder resin; insulating-coated carbon fibers; and a thermal conducting filler other than the insulating-coated carbon fibers, wherein the insulating-coated carbon fibers include carbon fibers and a coating film over at least a part of a surface of the carbon fibers, the coating film being formed of a cured product of a polymerizable material. | 1. A thermal conducting sheet, comprising:
a binder resin; insulating-coated carbon: fibers; and a thermal conducting filler other than the insulating-coated carbon fibers, wherein the insulating-coated carbon fibers comprise carbon fibers and a coating film over at least a part of a surface of the carbon fibers, the coating film being formed of a cured product of a polymerizable material, and, wherein the polymerizable material comprises a compound that comprises 2 or more radically polymerizable double bonds. 2. (canceled) 3. The thermal conducting sheet according to claim 1,
wherein an average thickness of the coating film observed when a cross-section of the coating film is observed with a TEM is 100 nm or greater. 4. The thermal conducting sheet according to claim 1,
wherein a volume resistivity of the thermal conducting sheet at an applied voltage of 1,000 V is 1.0×1010 Ω·cm or higher. 5. The thermal conducting sheet according to claim 1,
wherein a compressibility of the thermal conducting sheet at a load of 0.5 kgf/cm2 is 3% or higher. 6. The thermal conducting sheet according to claim 1,
wherein the thermal conducting filler comprises at least any one selected from the group consisting of aluminum oxide, aluminum nitride, and zinc oxide. 7. The thermal conducting sheet according to claim 1,
wherein the binder resin is a silicone resin. 8. A method for producing a thermal conducting sheet, the method comprising:
molding a thermal conducting resin composition that comprises a binder resin, insulating-coated carbon fibers, and a thermal conducting filler other than the insulating-coated carbon fibers into a predetermined shape and curing a resultant to obtain a molded body of the thermal conducting resin composition; and cutting the molded body into a sheet shape to obtain a sheet of the molded body, wherein the insulating-coated carbon fibers comprise carbon fibers and a coating film over at least a part of a surface of the carbon fibers, the coating film being formed of a cured product of a polymerizable material, and wherein the polymerizable material comprises 2 or more radically polymerizable double bonds. 9. (canceled) 10. The method for producing a thermal conducting sheet according to claim 8, further comprising:
applying an energy to a mixture obtained by mixing the polymerizable material, the carbon fibers, a polymerization initiator, and a solvent to activate the polymerization initiator to thereby form the coating film formed of the cured product of the polymerizable material over at least the part of the surface of the carbon fibers to obtain the insulating-coated carbon fibers. 11. A heat dissipation member, comprising:
a heat spreader configured to dissipate heat generated by an electronic part; and the thermal conducting sheet according to claim 1 provided on the heat spreader and interposed between the heat spreader and the electronic part. 12. A semiconductor device, comprising:
an electronic part; a heat spreader configured to dissipate heat generated by the electronic part; and the thermal conducting sheet according to claim 1 provided on the heat spreader and interposed between the heat spreader and the electronic part. 13. The semiconductor device according to claim 12, further comprising:
a heat sink, wherein a thermal conducting sheet is interposed between the heat spreader and the heat sink, wherein the thermal conducting sheet comprises a binder resin, insulating-coated carbon fibers, and a thermal conducting filler other than the insulating-coated carbon fibers, wherein the insulating-coated carbon fibers comprise carbon fibers and a coating film over at least a part of a surface of the carbon fibers, the coating film being formed of a cured product of a polymerizable material, and wherein the polymerizable material comprises a compound that comprises 2 or more radically polymerizable double bonds. 14. The thermal conducting sheet according to claim 1,
wherein the radically polymerizable double bonds of the polymerizable material are a vinyl group, an acryloyl group, or a methacryloyl group. 15. The thermal conducting sheet according to claim 1,
wherein the polymerizable material is divinylbenzene. 16. The method for producing a thermal conducting sheet according to claim 8,
wherein the radically polymerizable double bonds of the polymerizable material are a vinyl group, an acryloyl group, or a methacryloyl group. 17. The method for producing a thermal conducting sheet according to claim 8,
wherein the polymerizable material is divinylbenzene. | Provided is a thermal conducting sheet, including: a binder resin; insulating-coated carbon fibers; and a thermal conducting filler other than the insulating-coated carbon fibers, wherein the insulating-coated carbon fibers include carbon fibers and a coating film over at least a part of a surface of the carbon fibers, the coating film being formed of a cured product of a polymerizable material.1. A thermal conducting sheet, comprising:
a binder resin; insulating-coated carbon: fibers; and a thermal conducting filler other than the insulating-coated carbon fibers, wherein the insulating-coated carbon fibers comprise carbon fibers and a coating film over at least a part of a surface of the carbon fibers, the coating film being formed of a cured product of a polymerizable material, and, wherein the polymerizable material comprises a compound that comprises 2 or more radically polymerizable double bonds. 2. (canceled) 3. The thermal conducting sheet according to claim 1,
wherein an average thickness of the coating film observed when a cross-section of the coating film is observed with a TEM is 100 nm or greater. 4. The thermal conducting sheet according to claim 1,
wherein a volume resistivity of the thermal conducting sheet at an applied voltage of 1,000 V is 1.0×1010 Ω·cm or higher. 5. The thermal conducting sheet according to claim 1,
wherein a compressibility of the thermal conducting sheet at a load of 0.5 kgf/cm2 is 3% or higher. 6. The thermal conducting sheet according to claim 1,
wherein the thermal conducting filler comprises at least any one selected from the group consisting of aluminum oxide, aluminum nitride, and zinc oxide. 7. The thermal conducting sheet according to claim 1,
wherein the binder resin is a silicone resin. 8. A method for producing a thermal conducting sheet, the method comprising:
molding a thermal conducting resin composition that comprises a binder resin, insulating-coated carbon fibers, and a thermal conducting filler other than the insulating-coated carbon fibers into a predetermined shape and curing a resultant to obtain a molded body of the thermal conducting resin composition; and cutting the molded body into a sheet shape to obtain a sheet of the molded body, wherein the insulating-coated carbon fibers comprise carbon fibers and a coating film over at least a part of a surface of the carbon fibers, the coating film being formed of a cured product of a polymerizable material, and wherein the polymerizable material comprises 2 or more radically polymerizable double bonds. 9. (canceled) 10. The method for producing a thermal conducting sheet according to claim 8, further comprising:
applying an energy to a mixture obtained by mixing the polymerizable material, the carbon fibers, a polymerization initiator, and a solvent to activate the polymerization initiator to thereby form the coating film formed of the cured product of the polymerizable material over at least the part of the surface of the carbon fibers to obtain the insulating-coated carbon fibers. 11. A heat dissipation member, comprising:
a heat spreader configured to dissipate heat generated by an electronic part; and the thermal conducting sheet according to claim 1 provided on the heat spreader and interposed between the heat spreader and the electronic part. 12. A semiconductor device, comprising:
an electronic part; a heat spreader configured to dissipate heat generated by the electronic part; and the thermal conducting sheet according to claim 1 provided on the heat spreader and interposed between the heat spreader and the electronic part. 13. The semiconductor device according to claim 12, further comprising:
a heat sink, wherein a thermal conducting sheet is interposed between the heat spreader and the heat sink, wherein the thermal conducting sheet comprises a binder resin, insulating-coated carbon fibers, and a thermal conducting filler other than the insulating-coated carbon fibers, wherein the insulating-coated carbon fibers comprise carbon fibers and a coating film over at least a part of a surface of the carbon fibers, the coating film being formed of a cured product of a polymerizable material, and wherein the polymerizable material comprises a compound that comprises 2 or more radically polymerizable double bonds. 14. The thermal conducting sheet according to claim 1,
wherein the radically polymerizable double bonds of the polymerizable material are a vinyl group, an acryloyl group, or a methacryloyl group. 15. The thermal conducting sheet according to claim 1,
wherein the polymerizable material is divinylbenzene. 16. The method for producing a thermal conducting sheet according to claim 8,
wherein the radically polymerizable double bonds of the polymerizable material are a vinyl group, an acryloyl group, or a methacryloyl group. 17. The method for producing a thermal conducting sheet according to claim 8,
wherein the polymerizable material is divinylbenzene. | 2,800 |
12,081 | 12,081 | 14,218,131 | 2,872 | Presented is a method, apparatus and computer-readable medium for reducing error. The apparatus includes a rotatable element having a plurality of spaced light modifying ports located at set positions in the rotatable element, the rotatable element rotatable about an axis. The apparatus further includes a drive engagedly coupled to the rotatable element to rotate the rotatable element, wherein one periodic cycle of the rotatable element is an integer number of periodic cycles of the drive. | 1. An apparatus comprising:
(a) a rotatable element having a plurality of spaced light modifying ports located at set positions in the rotatable element, the rotatable element rotatable about an axis; and (b) a drive engagedly coupled to the rotatable element to rotate the rotatable element, wherein one periodic cycle of the rotatable element is an integer number of periodic cycles of the drive. 2. The apparatus according to claim 1, wherein the apparatus further comprises a housing for the rotatable element and the drive. 3. The apparatus according to claim 2, wherein the housing comprises at least one port alignable with at least one of the plurality of spaced light modifying ports of the rotatable element. 4. The apparatus according to claim 2, wherein the drive is engagedly coupled to the rotatable element. 5. The apparatus according to claim 2, wherein the rotatable element and the drive are engagedly coupled through at least one intermediate drive component, wherein one periodic cycle of the rotatable element is an integer number of periodic cycles of the at least one intermediate drive component. 6. The apparatus according to claim 5, wherein the at least one intermediate drive component is a band coupled to the housing by a plurality of rotatable members. 7. The apparatus according to claim 6, wherein the plurality of spaced light modifying ports are able to maintain optical components for modifying light. 8. The apparatus according to claim 7, wherein the rotatable element and the drive are preloaded to remove lash. 9. The apparatus according to claim 5, wherein the apparatus further comprises at least one processor operably connected to the drive. 10. A method of reducing a locating error, the method comprising:
(a) rotating, by a drive, a rotatable element having a plurality of spaced light modifying ports located at set positions in the rotatable element about an axis from a starting position to a predetermined position; and (b) returning, by the drive, the rotatable element to the starting position, wherein one periodic cycle of the rotatable element is an integer number of periodic cycles of the drive. 11. The method according to claim 10, wherein the drive and the rotatable element are in a housing. 12. The method according to claim 11, wherein the housing comprises at least one port alignable with at least one of the plurality of spaced light modifying ports of the rotatable element. 13. The method according to claim 12, wherein the predetermined position aligns at least one of the plurality of spaced light modifying ports with the at least one port of the housing. 14. The method according to claim 11, wherein the drive is engagedly coupled to the rotatable element. 15. The method according to claim 14, wherein the drive and the rotatable element are engagedly coupled through at least one intermediate drive component, wherein one periodic cycle of the rotatable element is an integer number of periodic cycles of the at least one intermediate drive component. 16. A non-transitory computer-readable medium tangibly comprising computer program instructions which when executed on a processor causes the processor to at least:
(a) rotate, by a drive, a rotatable element having a plurality of spaced light modifying ports located at set positions in the rotatable element about an axis from a starting position to a predetermined position; and (b) return, by the drive, the rotatable element to the starting position, wherein one periodic cycle of the rotatable element is an integer number of periodic cycles of the drive. 17. The non-transitory computer-readable medium according to claim 16, wherein the drive and the rotatable element are in a housing. 18. The non-transitory computer-readable medium according to claim 17, wherein the housing comprises at least one port alignable with at least one of the plurality of spaced light modifying ports of the rotatable element. 19. The non-transitory computer-readable medium according to claim 18, wherein the predetermined position aligns at least one of the plurality of spaced light modifying ports with the at least one port of the housing. 20. The non-transitory computer-readable medium according to claim 17, wherein the drive is engagedly coupled to the rotatable element. 21. The non-transitory computer-readable medium according to claim 20, wherein the drive and the rotatable element are engagedly coupled through at least one intermediate drive component, wherein one periodic cycle of the rotatable element is an integer number of periodic cycles of the at least one intermediate drive component. 22. A method of calibrating, the method comprising:
(a) loading a rotatable element having a plurality of spaced light modifying ports located at set positions in the rotatable element to a housing with a drive; and (b) determining a position of the plurality of spaced light modifying ports, wherein one periodic cycle of the rotatable element is an integer number of periodic cycles of the drive. 23. The method according to claim 22, wherein the drive is engagedly coupled to the rotatable element. 24. The method according to claim 23, wherein the rotatable element and the drive are engagedly coupled through at least one intermediate drive component, wherein one periodic cycle of the rotatable element is an integer number of periodic cycles of the at least one intermediate drive component. 25. The method according to claim 24, wherein the at least one intermediate drive component is a band coupled to the housing by a plurality of rotatable members. 26. The method according to claim 25, wherein the rotatable element and the drive are preloaded to remove lash. 27. The method according to claim 22, wherein the determining is performed with position indicators fixedly attached to the rotatable element relative to the plurality of spaced light modifying ports. | Presented is a method, apparatus and computer-readable medium for reducing error. The apparatus includes a rotatable element having a plurality of spaced light modifying ports located at set positions in the rotatable element, the rotatable element rotatable about an axis. The apparatus further includes a drive engagedly coupled to the rotatable element to rotate the rotatable element, wherein one periodic cycle of the rotatable element is an integer number of periodic cycles of the drive.1. An apparatus comprising:
(a) a rotatable element having a plurality of spaced light modifying ports located at set positions in the rotatable element, the rotatable element rotatable about an axis; and (b) a drive engagedly coupled to the rotatable element to rotate the rotatable element, wherein one periodic cycle of the rotatable element is an integer number of periodic cycles of the drive. 2. The apparatus according to claim 1, wherein the apparatus further comprises a housing for the rotatable element and the drive. 3. The apparatus according to claim 2, wherein the housing comprises at least one port alignable with at least one of the plurality of spaced light modifying ports of the rotatable element. 4. The apparatus according to claim 2, wherein the drive is engagedly coupled to the rotatable element. 5. The apparatus according to claim 2, wherein the rotatable element and the drive are engagedly coupled through at least one intermediate drive component, wherein one periodic cycle of the rotatable element is an integer number of periodic cycles of the at least one intermediate drive component. 6. The apparatus according to claim 5, wherein the at least one intermediate drive component is a band coupled to the housing by a plurality of rotatable members. 7. The apparatus according to claim 6, wherein the plurality of spaced light modifying ports are able to maintain optical components for modifying light. 8. The apparatus according to claim 7, wherein the rotatable element and the drive are preloaded to remove lash. 9. The apparatus according to claim 5, wherein the apparatus further comprises at least one processor operably connected to the drive. 10. A method of reducing a locating error, the method comprising:
(a) rotating, by a drive, a rotatable element having a plurality of spaced light modifying ports located at set positions in the rotatable element about an axis from a starting position to a predetermined position; and (b) returning, by the drive, the rotatable element to the starting position, wherein one periodic cycle of the rotatable element is an integer number of periodic cycles of the drive. 11. The method according to claim 10, wherein the drive and the rotatable element are in a housing. 12. The method according to claim 11, wherein the housing comprises at least one port alignable with at least one of the plurality of spaced light modifying ports of the rotatable element. 13. The method according to claim 12, wherein the predetermined position aligns at least one of the plurality of spaced light modifying ports with the at least one port of the housing. 14. The method according to claim 11, wherein the drive is engagedly coupled to the rotatable element. 15. The method according to claim 14, wherein the drive and the rotatable element are engagedly coupled through at least one intermediate drive component, wherein one periodic cycle of the rotatable element is an integer number of periodic cycles of the at least one intermediate drive component. 16. A non-transitory computer-readable medium tangibly comprising computer program instructions which when executed on a processor causes the processor to at least:
(a) rotate, by a drive, a rotatable element having a plurality of spaced light modifying ports located at set positions in the rotatable element about an axis from a starting position to a predetermined position; and (b) return, by the drive, the rotatable element to the starting position, wherein one periodic cycle of the rotatable element is an integer number of periodic cycles of the drive. 17. The non-transitory computer-readable medium according to claim 16, wherein the drive and the rotatable element are in a housing. 18. The non-transitory computer-readable medium according to claim 17, wherein the housing comprises at least one port alignable with at least one of the plurality of spaced light modifying ports of the rotatable element. 19. The non-transitory computer-readable medium according to claim 18, wherein the predetermined position aligns at least one of the plurality of spaced light modifying ports with the at least one port of the housing. 20. The non-transitory computer-readable medium according to claim 17, wherein the drive is engagedly coupled to the rotatable element. 21. The non-transitory computer-readable medium according to claim 20, wherein the drive and the rotatable element are engagedly coupled through at least one intermediate drive component, wherein one periodic cycle of the rotatable element is an integer number of periodic cycles of the at least one intermediate drive component. 22. A method of calibrating, the method comprising:
(a) loading a rotatable element having a plurality of spaced light modifying ports located at set positions in the rotatable element to a housing with a drive; and (b) determining a position of the plurality of spaced light modifying ports, wherein one periodic cycle of the rotatable element is an integer number of periodic cycles of the drive. 23. The method according to claim 22, wherein the drive is engagedly coupled to the rotatable element. 24. The method according to claim 23, wherein the rotatable element and the drive are engagedly coupled through at least one intermediate drive component, wherein one periodic cycle of the rotatable element is an integer number of periodic cycles of the at least one intermediate drive component. 25. The method according to claim 24, wherein the at least one intermediate drive component is a band coupled to the housing by a plurality of rotatable members. 26. The method according to claim 25, wherein the rotatable element and the drive are preloaded to remove lash. 27. The method according to claim 22, wherein the determining is performed with position indicators fixedly attached to the rotatable element relative to the plurality of spaced light modifying ports. | 2,800 |
12,082 | 12,082 | 15,643,427 | 2,852 | A monitoring system for a power grid includes one or more power transformer monitors. Each power transformer monitor includes a plurality of optical sensors disposed on one or more optical fibers that sense parameters of the power transformer. Each optical sensor is configured to sense a power transformer parameter that is different from a power transformer parameter sensed by at least one other sensor of the plurality of optical sensors. An optical coupler spatially disperses optical signals from the optical sensors according to wavelength. A detector unit converts optical signals of the optical sensors to electrical signals representative of the sensed power transformer parameters. | 1. A monitoring system comprising:
one or more power transformer monitors of a power grid system, each power transformer monitor comprising a plurality of optical sensors disposed on one or more optical fibers, the optical sensors configured to sense internal parameters of a power transformer, each optical sensor disposed at a location within or on a power transformer and configured to sense an internal transformer parameter that is different from an internal transformer parameter sensed by at least one other sensor of the plurality of optical sensors; one or more detector units, each detector unit configured to convert optical signals of the optical sensors of a corresponding power transformer monitor to electrical signals representative of the sensed transformer parameters; and at least one optical coupler disposed between the one or more optical fibers and the detector units, the optical coupler configured to spatially disperse optical signals from the optical sensors according to wavelength. 2. The system of claim 1, wherein each of the optical sensors are disposed on a single optical fiber. 3. The system of claim 1, wherein at least one of the optical sensors is disposed on a first optical fiber and at least one of the sensors is disposed on a second optical fiber. 4. The system of claim 1, wherein at least one of the optical sensors is configured to sense core strain. 5. The system of claim 1, wherein at least one of the optical sensors is configured to sense a dissolved gas. 6. The system of claim 5, wherein the dissolved gas is a hydrogen-containing gas. 7. The system of claim 1, wherein at least one of the optical sensors is a Pd-coated fiber Bragg grating. 8. The system of claim 1, wherein at least one of the optical sensors is configured to sense temperature. 9. The system of claim 1, wherein at least one of the optical sensors is configured to sense partial discharge. 10. The system of claim 1, wherein at least one of the optical sensors is configured to sense transformer core strain. 11. The system of claim 1, wherein at least one of the optical sensors is configured to sense vibration. 12. The system of claim 1, wherein at least one of the optical sensors is configured to sense a chemical. 13. The system of claim 1, wherein at least one of the optical sensors is configured to sense corrosion. 14. The system of claim 1, wherein at least one of the optical sensors is configured to sense moisture. 15. The system of claim 1, further comprising one or more optical sensor configured to sense an electrical parameter. 16. The system of claim 1, wherein each optical sensor operates within a different wavelength range and emanates output light in response to input light, the output light having a centroid wavelength that changes in response to the sensed internal parameter of the power transformer. 17. The system of claim 1, wherein the optical coupler spatially disperses light according to wavelength. 18. The system of claim 1, wherein the optical coupler comprises a linear variable filter. 19. The system of claim 1, wherein the optical coupler comprises an arrayed waveguide grating. 20. The system of claim 1, further comprising an optical multiplexer disposed between the optical fibers and the optical coupler. 21. The system of claim 20, wherein the optical multiplexer comprises a time division multiplexer, the time domain multiplexer comprising at least one of:
a set of M optical switches; and a single 1×M optical switch. 22. The system of claim 21, wherein the optical multiplexer comprises a wavelength division multiplexer. 23. The system of claim 1, wherein the monitoring system comprises:
multiple power transformer monitors; and control circuitry communicatively coupled to each of the power transformer monitors. 24. The system of claim 23, wherein the control circuitry includes the detection units and the detection units are communicatively coupled to each power transformer monitor by an optical communication channel. 25. The system of claim 24, wherein the optical communications channel includes an optical sensor configured to detect intrusion attacks. 26. The system of claim 23, wherein the control circuitry includes an analyzer configured to analyze the electrical signals and to predict, detect and/or diagnose one or more functional, state, and/or degradation conditions of the power transformer based on analysis of the electrical signals. 27. A monitoring system comprising:
one or more power grid component monitors for one or more components of a power grid transmission and distribution system, each power grid component monitor comprising a plurality of optical sensors disposed on one or more optical fibers, the optical sensors configured to sense parameters of the power grid component, each optical sensor disposed at a location within or on the power grid component and configured to sense a power grid component parameter that is different from a power grid component parameter sensed by at least one other sensor of the plurality of optical sensors; one or more detector units, each detector unit configured to convert optical signals of the optical sensors of a corresponding power grid component monitor to electrical signals representative of the sensed power grid component parameters; and at least one optical coupler disposed between the one or more optical fibers and the detector units, the optical coupler configured to spatially disperse optical signals from the optical sensors according to wavelength. 28. The system of claim 27, further comprising an analyzer configured to analyze the electrical signals and to predict, detect and/or diagnose one or more functional, state, and/or degradation conditions of the power grid components based on analysis of the electrical signals. 29. A method comprising:
optically sensing multiple parameters of a power grid component of a power grid transmission and distribution system using multiple optical sensors on an optical fiber disposed within or on the power grid component, at least one of the optical sensors configured to sense a different parameter than other optical sensors; combining the optical output signals from each sensor into a combined optical signal carried on the optical fiber; spatially dispersing the combined optical signal according to wavelength; and generating electrical signals in response to the spatially dispersed optical output signal, the electrical signals representing the sensed parameters of the power grid component. 30. The method of claim 29, further comprising analyzing the electrical signals to predict, detect and/or diagnose one or more of a functional condition, a state, and/or a degradation condition of the power grid component based on analysis of the electrical signals. 31. The method of claim 29, wherein:
the power grid component is a power grid transformer; and the optical sensors are configured to sense internal parameters of the power grid transformer, at least one of the optical sensors is configured to sense a different internal parameter than other optical sensors. | A monitoring system for a power grid includes one or more power transformer monitors. Each power transformer monitor includes a plurality of optical sensors disposed on one or more optical fibers that sense parameters of the power transformer. Each optical sensor is configured to sense a power transformer parameter that is different from a power transformer parameter sensed by at least one other sensor of the plurality of optical sensors. An optical coupler spatially disperses optical signals from the optical sensors according to wavelength. A detector unit converts optical signals of the optical sensors to electrical signals representative of the sensed power transformer parameters.1. A monitoring system comprising:
one or more power transformer monitors of a power grid system, each power transformer monitor comprising a plurality of optical sensors disposed on one or more optical fibers, the optical sensors configured to sense internal parameters of a power transformer, each optical sensor disposed at a location within or on a power transformer and configured to sense an internal transformer parameter that is different from an internal transformer parameter sensed by at least one other sensor of the plurality of optical sensors; one or more detector units, each detector unit configured to convert optical signals of the optical sensors of a corresponding power transformer monitor to electrical signals representative of the sensed transformer parameters; and at least one optical coupler disposed between the one or more optical fibers and the detector units, the optical coupler configured to spatially disperse optical signals from the optical sensors according to wavelength. 2. The system of claim 1, wherein each of the optical sensors are disposed on a single optical fiber. 3. The system of claim 1, wherein at least one of the optical sensors is disposed on a first optical fiber and at least one of the sensors is disposed on a second optical fiber. 4. The system of claim 1, wherein at least one of the optical sensors is configured to sense core strain. 5. The system of claim 1, wherein at least one of the optical sensors is configured to sense a dissolved gas. 6. The system of claim 5, wherein the dissolved gas is a hydrogen-containing gas. 7. The system of claim 1, wherein at least one of the optical sensors is a Pd-coated fiber Bragg grating. 8. The system of claim 1, wherein at least one of the optical sensors is configured to sense temperature. 9. The system of claim 1, wherein at least one of the optical sensors is configured to sense partial discharge. 10. The system of claim 1, wherein at least one of the optical sensors is configured to sense transformer core strain. 11. The system of claim 1, wherein at least one of the optical sensors is configured to sense vibration. 12. The system of claim 1, wherein at least one of the optical sensors is configured to sense a chemical. 13. The system of claim 1, wherein at least one of the optical sensors is configured to sense corrosion. 14. The system of claim 1, wherein at least one of the optical sensors is configured to sense moisture. 15. The system of claim 1, further comprising one or more optical sensor configured to sense an electrical parameter. 16. The system of claim 1, wherein each optical sensor operates within a different wavelength range and emanates output light in response to input light, the output light having a centroid wavelength that changes in response to the sensed internal parameter of the power transformer. 17. The system of claim 1, wherein the optical coupler spatially disperses light according to wavelength. 18. The system of claim 1, wherein the optical coupler comprises a linear variable filter. 19. The system of claim 1, wherein the optical coupler comprises an arrayed waveguide grating. 20. The system of claim 1, further comprising an optical multiplexer disposed between the optical fibers and the optical coupler. 21. The system of claim 20, wherein the optical multiplexer comprises a time division multiplexer, the time domain multiplexer comprising at least one of:
a set of M optical switches; and a single 1×M optical switch. 22. The system of claim 21, wherein the optical multiplexer comprises a wavelength division multiplexer. 23. The system of claim 1, wherein the monitoring system comprises:
multiple power transformer monitors; and control circuitry communicatively coupled to each of the power transformer monitors. 24. The system of claim 23, wherein the control circuitry includes the detection units and the detection units are communicatively coupled to each power transformer monitor by an optical communication channel. 25. The system of claim 24, wherein the optical communications channel includes an optical sensor configured to detect intrusion attacks. 26. The system of claim 23, wherein the control circuitry includes an analyzer configured to analyze the electrical signals and to predict, detect and/or diagnose one or more functional, state, and/or degradation conditions of the power transformer based on analysis of the electrical signals. 27. A monitoring system comprising:
one or more power grid component monitors for one or more components of a power grid transmission and distribution system, each power grid component monitor comprising a plurality of optical sensors disposed on one or more optical fibers, the optical sensors configured to sense parameters of the power grid component, each optical sensor disposed at a location within or on the power grid component and configured to sense a power grid component parameter that is different from a power grid component parameter sensed by at least one other sensor of the plurality of optical sensors; one or more detector units, each detector unit configured to convert optical signals of the optical sensors of a corresponding power grid component monitor to electrical signals representative of the sensed power grid component parameters; and at least one optical coupler disposed between the one or more optical fibers and the detector units, the optical coupler configured to spatially disperse optical signals from the optical sensors according to wavelength. 28. The system of claim 27, further comprising an analyzer configured to analyze the electrical signals and to predict, detect and/or diagnose one or more functional, state, and/or degradation conditions of the power grid components based on analysis of the electrical signals. 29. A method comprising:
optically sensing multiple parameters of a power grid component of a power grid transmission and distribution system using multiple optical sensors on an optical fiber disposed within or on the power grid component, at least one of the optical sensors configured to sense a different parameter than other optical sensors; combining the optical output signals from each sensor into a combined optical signal carried on the optical fiber; spatially dispersing the combined optical signal according to wavelength; and generating electrical signals in response to the spatially dispersed optical output signal, the electrical signals representing the sensed parameters of the power grid component. 30. The method of claim 29, further comprising analyzing the electrical signals to predict, detect and/or diagnose one or more of a functional condition, a state, and/or a degradation condition of the power grid component based on analysis of the electrical signals. 31. The method of claim 29, wherein:
the power grid component is a power grid transformer; and the optical sensors are configured to sense internal parameters of the power grid transformer, at least one of the optical sensors is configured to sense a different internal parameter than other optical sensors. | 2,800 |
12,083 | 12,083 | 16,254,846 | 2,813 | Electronic chip comprising:
an electronic circuit; a resistive element arranged on a rear face of a substrate; two conductive vias passing through the substrate, each connected to the electronic circuit and to one of the ends of the resistive element, and masked by the resistive element; and comprising a weakening structure formed of blind holes such that each of the blind holes comprises a section, at the rear face, of shape and of external dimensions similar to those of the conductive vias, and comprises a portion of the substrate masked by the resistive element, or in which the resistive element comprises first and second parts spaced apart from each other, arranged one above the other, electrically connected to each other and together forming a coil pattern and/or several alternating, intermingled, wound up or intertwined patterns. | 1. An electronic chip comprising at least:
an electronic circuit arranged on the side of a front face of a substrate; a resistive element arranged on the side of a rear face of the substrate and directly in line with at least one part of the electronic circuit; two electrically conductive vias passing through the substrate and extending between the front and rear faces of the substrate, each electrically connected to the electronic circuit and to one of at least two ends of the resistive element such that the value of the electrical resistance of the resistive element can be measured by the electronic circuit, and masked at least partially by the resistive element on the side of the rear face of the substrate; and further comprising a weakening structure formed of blind holes such that: each of the blind holes passes through the rear face of the substrate and a part of the thickness of the substrate, each of the blind holes comprises a section, at the rear face of the substrate, of shape and external dimensions substantially similar to those of each of the electrically conductive vias, and in each of the blind holes, at least one portion of the substrate extends between the rear face of the substrate and a bottom wall of the blind hole and is masked by the resistive element on the side of the rear face of the substrate, or in which the resistive element comprises first and second parts spaced apart from each other, arranged at least partially one above the other such that the first part is arranged between the rear face of the substrate and the second part, electrically connected to each other, and together forming at least one coil pattern, or several alternating patterns, or several intermingled patterns, or several wound up patterns, or several intertwined patterns. 2. The electronic chip according to claim 1, in which each of the portions of the substrate arranged in the blind holes forms a pillar surrounded by the side walls of one of the blind holes or is centred in one of the blind holes. 3. The electronic chip according to claim 1, in which, when the electronic chip comprises the weakening structure and when the resistive element does not comprise the first and second parts, the resistive element comprises at least one electrically conductive track having at least one coil pattern, or several alternating patterns, or several intermingled patterns, or several wound up patterns, or several intertwined patterns. 4. The electronic chip according to claim 1, in which the portions of the substrate arranged in the blind holes have shapes or dimensions different from each other, and the distances between the bottom walls of the blind holes and the front face of the substrate are different from each other. 5. The electronic chip according to claim 1, in which the two ends of the resistive element are formed at the first part of the resistive element. 6. The electronic chip according to claim 5, in which portions of the second part of the resistive element are arranged facing two ends of the resistive element. 7. The electronic chip according to claim 1, in which the pattern(s) of said at least one electrically conductive track of the first part of the resistive element are different from the pattern(s) of said at least one electrically conductive track of the second part of the resistive element. 8. The electronic chip according to claim 1, in which said at least one electrically conductive track of the first part of the resistive element comprises portions covering the internal walls of the blind holes. 9. A method for producing an electronic chip according to claim 1, in which the production of the electrically conductive vias and the blind holes comprises the implementation of the following steps:
producing an etching mask on the rear face of the substrate, of which the pattern defines the sections, in a plane parallel to the rear face of the substrate, of electrically conductive vias, blind holes and portions of the substrate intended to be kept in the blind holes; etching through the rear face of the substrate according to the pattern of the etching mask. 10. The method according to claim 9, in which the first part of the resistive element and at least one electrically conductive material of the electrically conductive vias are produced by the implementation of common steps. | Electronic chip comprising:
an electronic circuit; a resistive element arranged on a rear face of a substrate; two conductive vias passing through the substrate, each connected to the electronic circuit and to one of the ends of the resistive element, and masked by the resistive element; and comprising a weakening structure formed of blind holes such that each of the blind holes comprises a section, at the rear face, of shape and of external dimensions similar to those of the conductive vias, and comprises a portion of the substrate masked by the resistive element, or in which the resistive element comprises first and second parts spaced apart from each other, arranged one above the other, electrically connected to each other and together forming a coil pattern and/or several alternating, intermingled, wound up or intertwined patterns.1. An electronic chip comprising at least:
an electronic circuit arranged on the side of a front face of a substrate; a resistive element arranged on the side of a rear face of the substrate and directly in line with at least one part of the electronic circuit; two electrically conductive vias passing through the substrate and extending between the front and rear faces of the substrate, each electrically connected to the electronic circuit and to one of at least two ends of the resistive element such that the value of the electrical resistance of the resistive element can be measured by the electronic circuit, and masked at least partially by the resistive element on the side of the rear face of the substrate; and further comprising a weakening structure formed of blind holes such that: each of the blind holes passes through the rear face of the substrate and a part of the thickness of the substrate, each of the blind holes comprises a section, at the rear face of the substrate, of shape and external dimensions substantially similar to those of each of the electrically conductive vias, and in each of the blind holes, at least one portion of the substrate extends between the rear face of the substrate and a bottom wall of the blind hole and is masked by the resistive element on the side of the rear face of the substrate, or in which the resistive element comprises first and second parts spaced apart from each other, arranged at least partially one above the other such that the first part is arranged between the rear face of the substrate and the second part, electrically connected to each other, and together forming at least one coil pattern, or several alternating patterns, or several intermingled patterns, or several wound up patterns, or several intertwined patterns. 2. The electronic chip according to claim 1, in which each of the portions of the substrate arranged in the blind holes forms a pillar surrounded by the side walls of one of the blind holes or is centred in one of the blind holes. 3. The electronic chip according to claim 1, in which, when the electronic chip comprises the weakening structure and when the resistive element does not comprise the first and second parts, the resistive element comprises at least one electrically conductive track having at least one coil pattern, or several alternating patterns, or several intermingled patterns, or several wound up patterns, or several intertwined patterns. 4. The electronic chip according to claim 1, in which the portions of the substrate arranged in the blind holes have shapes or dimensions different from each other, and the distances between the bottom walls of the blind holes and the front face of the substrate are different from each other. 5. The electronic chip according to claim 1, in which the two ends of the resistive element are formed at the first part of the resistive element. 6. The electronic chip according to claim 5, in which portions of the second part of the resistive element are arranged facing two ends of the resistive element. 7. The electronic chip according to claim 1, in which the pattern(s) of said at least one electrically conductive track of the first part of the resistive element are different from the pattern(s) of said at least one electrically conductive track of the second part of the resistive element. 8. The electronic chip according to claim 1, in which said at least one electrically conductive track of the first part of the resistive element comprises portions covering the internal walls of the blind holes. 9. A method for producing an electronic chip according to claim 1, in which the production of the electrically conductive vias and the blind holes comprises the implementation of the following steps:
producing an etching mask on the rear face of the substrate, of which the pattern defines the sections, in a plane parallel to the rear face of the substrate, of electrically conductive vias, blind holes and portions of the substrate intended to be kept in the blind holes; etching through the rear face of the substrate according to the pattern of the etching mask. 10. The method according to claim 9, in which the first part of the resistive element and at least one electrically conductive material of the electrically conductive vias are produced by the implementation of common steps. | 2,800 |
12,084 | 12,084 | 15,191,734 | 2,819 | It is an object of the present invention to improve light source efficiency of “a light-emitting device capable of realizing a natural, vivid, highly visible and comfortable appearance of colors or an appearance of objects” already arrived at by adopting a spectral power distribution having a shape completely different from the shape of conventionally known spectral power distributions while maintaining favorable color appearance characteristics. | 1. A light-emitting device at least including, as light-emitting elements:
a blue semiconductor light-emitting element; a green phosphor; and a red phosphor, wherein light emitted from the light-emitting device in a main radiant direction satisfies all of Conditions 1 to 4 below Condition 1: when λ denotes wavelength, φSSL1(λ) denotes a spectral power distribution of light emitted from the light-emitting device in the main radiant direction, φref1(λ) denotes a spectral power distribution of reference light which is selected in accordance with a correlated color temperature TSSL1 of the light emitted from the light-emitting device in the main radiant direction, (XSSL1, YSSL1, ZSSL1) denote tristimulus values of the light emitted from the light-emitting device in the main radiant direction, and (Xref1, Yref1, Zref1) denote tristimulus values of the reference light which is selected in accordance with TSSL1 of the light emitted from the light-emitting device in the main radiant direction, and a normalized spectral power distribution SSSL1(λ) of the light emitted from the light-emitting device in the main radiant direction, a normalized spectral power distribution Sref1(λ) of the reference light which is selected in accordance with TSSL1 (K) of the light emitted from the light-emitting device in the main radiant direction, and a difference ΔSSSL1(λ) of between normalized spectral power distributions are respectively defined as
S SSL1(λ)=φSSL1(λ)/Y SSL1
S ref1(λ)=φref1(λ)/Y ref1
ΔS SSL1(λ)=S ref1(λ)−S SSL1(λ), and
in a case where λSSL1-RL-max (nm) represents a wavelength that provides a longest wavelength local maximum value of SSSL1(λ) in a wavelength range of 380 nm or more and 780 nm or less, and when a wavelength Λ4 that is represented by SSSL1(λSSL1-RL-max)/2 exists on a longer wavelength-side of λSSL1-RL-max, an index Acg(φSSL1(λ)) represented by the following formula (1-1) satisfies
−10.0<A cg(φSSL1(λ))≦120.0,
but
in a case where λSSL1-RL-max (nm) represents a wavelength that provides the longest wavelength local maximum value of SSSL1(λ) in a wavelength range of 380 nm or more and 780 nm or less, and when the wavelength Λ4 that is represented by SSSL1(λSSL1-RL-max)/2 does not exist on the longer wavelength-side of λSSL1-RL-max,
an index Acg(φSSL1(λ)) represented by the following formula (1-2) satisfies
−10.0<A cg(φSSL1(λ))≦120.0;
[Expression 1]
A cg(φSSL1(λ))=∫380 495 ΔS SSL1(λ)dλ+∫ 495 590(−ΔS SSL1(λ))dλ+∫ 590 Λ4ΔS SSL1(λ)dλ (1-1)
[Expression 2]
A cg(φSSL1(λ))=∫380 495 ΔS SSL1(λ)dλ+∫ 495 590(−ΔS SSL1(λ))dλ+∫ 590 780 ΔS SSL1(λ)dλ (1-2)
Condition 2:
a distance Duv(φSSL1(λ)) of the spectral power distribution φSSL1(λ) of light from a black-body radiation locus defined by ANSI C78.377 satisfies
−0.0220≦D uv(φSSL1(λ))≦−0.0070;
Condition 3:
when a maximum value of spectral intensity in a range of 430 nm or more and 495 nm or less is defined as φSSL1-BM-max and a minimum value of spectral intensity in a range of 465 nm or more and 525 nm or less is defined as φSSL1-BG-min, the spectral power distribution φSSL1(λ) of light satisfies
0.2250≦φSSL1-BG-min/φSSL1-BM-max≦0.7000; and
Condition 4:
in the spectral power distribution φSSL1(λ) of light, when a maximum value of spectral intensity in a range of 590 nm or more and 780 nm or less is defined as φSSL1-RM-max, a wavelength λSSL1-RM-max that provides φSSL1-RM-max satisfies
605 (nm)≦λSSL1-RM-max≦653 (nm). 2. The light-emitting device according to claim 1, wherein
in Condition 2,
−0.0184≦D uv(φSSL1(λ))≦−0.0084 is satisfied. 3. The light-emitting device according to claim 1, wherein
in Condition 4,
625 (nm)≦λSSL1-RM-max≦647 (nm) is satisfied. 4. The light-emitting device according to claim 1, wherein Condition 5 below is satisfied
Condition 5:
in the spectral power distribution φSSL1(λ) of light, a wavelength λSSL1-BM-max that provides φSSL1-BM-max satisfies
430 (nm)≦λSSL1-BM-max≦480 (nm). 5. The light-emitting device according to claim 1, wherein Condition 6 below is satisfied
Condition 6:
0.1800≦φSSL1-BG-min/φSSL1-RM-max≦0.8500. 6. The light-emitting device according to claim 5, wherein
in Condition 6,
0.1917≦φSSL1-BG-min/φSSL1-RM-max≦0.7300 is satisfied. 7. The light-emitting device according to claim 1, wherein a luminous efficacy of radiation KSSL1 (lm/W) in a wavelength range of 380 nm or more and 780 nm or less, which is derived from φSSL1(λ), satisfies Condition 7
Condition 7:
210.0 lm/W≦K SSL1≦290.0 lm/W. 8. The light-emitting device according to claim 1, wherein TSSL1 (K) satisfies Condition 8 below
Condition 8:
2600 K≦T SSL1≦7700 K. 9. The light-emitting device according to claim 1, wherein
φSSL1(λ) does not have effective intensity derived from the light-emitting element in a range of 380 nm or more and 405 nm or less. 10. The light-emitting device according to claim 1, wherein
the blue semiconductor light-emitting element is configured such that a dominant wavelength λCHIP-BM-dom of the blue semiconductor light-emitting element alone when pulse-driven is 445 nm or more and 475 nm or less. 11. The light-emitting device according to claim 1, wherein
the green phosphor is a wide-band green phosphor. 12. The light-emitting device according to claim 1, wherein
the green phosphor is configured such that a wavelength λPHOS-GM-max that provides maximum emission intensity when light is excited by the green phosphor alone is 511 nm or more and 543 nm or less, and a full-width at half-maximum WPHOS-GM-fwhm thereof is 90 nm or more and 110 nm or less. 13. The light-emitting device according to claim 1, wherein the light-emitting device includes substantially no yellow phosphor. 14. The light-emitting device according to claim 1, wherein
the red phosphor is configured such that a wavelength λPHOS-RM-max that provides maximum emission intensity when light is excited by the red phosphor alone is 622 nm or more and 663 nm or less, and a full-width at half-maximum WPHOS-RM-fwhm thereof is 80 nm or more and 105 nm or less. 15. The light-emitting device according to claim 1, wherein
the blue semiconductor light-emitting element is an AlInGaN light-emitting element. 16. The light-emitting device according to claim 1, wherein
the green phosphor is Ca3(Sc,Mg)2Si3O12:Ce (CSMS phosphor), CaSc2O4:Ce (CSO phosphor), Lu3Al5O12:Ce (LuAG phosphor), or Y3(Al,Ga)5O12:Ce (G-YAG phosphor). 17. The light-emitting device according to claim 1, wherein
the red phosphor includes (Sr,Ca)AlSiN3:Eu (SCASN phosphor), CaAlSi(ON)3:Eu (CASON phosphor), or CaAlSiN3:Eu (CASN phosphor). 18. The light-emitting device according to claim 1, wherein the blue semiconductor light-emitting element is an AlInGaN light-emitting element with a dominant wavelength λCHIP-BM-dom when the blue semiconductor light-emitting element alone is pulse-driven, of 452.5 nm or more and 470 nm or less,
the green phosphor is CaSc2O4:Ce (CSO phosphor) or Lu3Al5O12:Ce (LuAG phosphor) with a wavelength XPHOS-GM-max that provides maximum emission intensity when light is excited by the green phosphor alone, of 515 nm or more and 535 nm or less, and a full-width at half-maximum WPHOS-GM-fwhm of 90 nm or more and 110 nm or less, and
the red phosphor is CaAlSi(ON)3:Eu (CASON phosphor) or CaAlSiN3:Eu (CASN phosphor) with a wavelength that provides maximum emission intensity λPHOS-RM-max when light is excited by the red phosphor alone, of 640 nm or more and 663 nm or less, and a full-width at half-maximum WPHOS-RM-fwhm of 80 nm or more and 105 nm or less. 19. The light-emitting device according to claim 1, wherein the light-emitting device is a packaged LED, a chip-on-board LED, an LED module, an LED light bulb, an LED lighting fixture, or an LED lighting system. 20. The light-emitting device according to claim 1, wherein
the light emitted from the light-emitting device in the main radiant direction satisfies Conditions I to IV below
Condition I:
when a*nSSL1 and b*nSSL1 (where n is a natural number from 1 to 15) respectively denote the a* value and b* value in the CIE 1976 L*a*b* color space of the following 15 Munsell renotation color samples of #01 to #15 based on a mathematical assumption that illumination is performed by the light emitted from the light-emitting device in the main radiant direction, and
when a*nref1 and b*nref1 (where n is a natural number from 1 to 15) respectively denote the a* value and b* value in the CIE 1976 L*a*b* color space of the 15 Munsell renotation color samples based on a mathematical assumption that illumination is performed by reference light which is selected in accordance with the correlated color temperature TSSL1(K) of the light emitted in the main radiant direction, each saturation difference ΔCnSSL1 satisfies
−4.00≦ΔC nSSL1≦8.00 (where n is a natural number from 1 to 15);
Condition II:
an average saturation difference represented by the following formula (1-3) satisfies
(
1
-
3
)
∑
n
=
1
15
Δ
C
nSSL
1
15
[
Expression
3
]
0.50
≦
∑
n
=
1
15
Δ
C
nSSL
1
15
≦
4.00
;
[
Expression
4
]
Condition III:
when a maximum saturation difference value is denoted by ΔCSSL-max1 and a minimum saturation difference value is denoted by ΔCSSL-min1, a difference |ΔCSSL-max1−ΔCSSL-min1| between the maximum saturation difference value and the minimum saturation difference value satisfies
2.00≦|ΔC SSL-max1 −ΔC SSL-min1|≦10.00,
where ΔCnSSL1=√{(a*nSSL1)2+(b*nSSL1)2}−√{(a*nref1)2+(b*nref1)2},
with the 15 Munsell renotation color samples being:
#01
7.5P
4/10
#02
10PB
4/10
#03
5PB
4/12
#04
7.5B
5/10
#05
10BG
6/8
#06
2.5BG
6/10
#07
2.5G
6/12
#08
7.5GY
7/10
#09
2.5GY
8/10
#10
5Y
8.5/12
#11
10YR
7/12
#12
5YR
7/12
#13
10R
6/12
#14
5R
4/14
#15
7.5RP
4/12;
and
Condition IV:
when θnSSL1 (degrees) (where n is a natural number from 1 to 15) denotes a hue angle in the CIE 1976 L*a*b* color space of the 15 Munsell renotation color samples based on a mathematical assumption that illumination is performed by the light emitted from the light-emitting device in the main radiant direction, and
when θnref1 (degrees) (where n is a natural number from 1 to 15) denotes a hue angle in the CIE 1976 L*a*b* color space of the 15 Munsell renotation color samples based on a mathematical assumption that illumination is performed by reference light which is selected in accordance with the correlated color temperature TSSL1 of the light emitted in the main radiant direction, an absolute value of each difference in hue angles |ΔhnSSL1| satisfies
0.00 degree≦|Δh nSSL1|≦12.50 degrees (where n is a natural number from 1 to 15),
where ΔhnSSL1=θnSSL1−θnref1. | It is an object of the present invention to improve light source efficiency of “a light-emitting device capable of realizing a natural, vivid, highly visible and comfortable appearance of colors or an appearance of objects” already arrived at by adopting a spectral power distribution having a shape completely different from the shape of conventionally known spectral power distributions while maintaining favorable color appearance characteristics.1. A light-emitting device at least including, as light-emitting elements:
a blue semiconductor light-emitting element; a green phosphor; and a red phosphor, wherein light emitted from the light-emitting device in a main radiant direction satisfies all of Conditions 1 to 4 below Condition 1: when λ denotes wavelength, φSSL1(λ) denotes a spectral power distribution of light emitted from the light-emitting device in the main radiant direction, φref1(λ) denotes a spectral power distribution of reference light which is selected in accordance with a correlated color temperature TSSL1 of the light emitted from the light-emitting device in the main radiant direction, (XSSL1, YSSL1, ZSSL1) denote tristimulus values of the light emitted from the light-emitting device in the main radiant direction, and (Xref1, Yref1, Zref1) denote tristimulus values of the reference light which is selected in accordance with TSSL1 of the light emitted from the light-emitting device in the main radiant direction, and a normalized spectral power distribution SSSL1(λ) of the light emitted from the light-emitting device in the main radiant direction, a normalized spectral power distribution Sref1(λ) of the reference light which is selected in accordance with TSSL1 (K) of the light emitted from the light-emitting device in the main radiant direction, and a difference ΔSSSL1(λ) of between normalized spectral power distributions are respectively defined as
S SSL1(λ)=φSSL1(λ)/Y SSL1
S ref1(λ)=φref1(λ)/Y ref1
ΔS SSL1(λ)=S ref1(λ)−S SSL1(λ), and
in a case where λSSL1-RL-max (nm) represents a wavelength that provides a longest wavelength local maximum value of SSSL1(λ) in a wavelength range of 380 nm or more and 780 nm or less, and when a wavelength Λ4 that is represented by SSSL1(λSSL1-RL-max)/2 exists on a longer wavelength-side of λSSL1-RL-max, an index Acg(φSSL1(λ)) represented by the following formula (1-1) satisfies
−10.0<A cg(φSSL1(λ))≦120.0,
but
in a case where λSSL1-RL-max (nm) represents a wavelength that provides the longest wavelength local maximum value of SSSL1(λ) in a wavelength range of 380 nm or more and 780 nm or less, and when the wavelength Λ4 that is represented by SSSL1(λSSL1-RL-max)/2 does not exist on the longer wavelength-side of λSSL1-RL-max,
an index Acg(φSSL1(λ)) represented by the following formula (1-2) satisfies
−10.0<A cg(φSSL1(λ))≦120.0;
[Expression 1]
A cg(φSSL1(λ))=∫380 495 ΔS SSL1(λ)dλ+∫ 495 590(−ΔS SSL1(λ))dλ+∫ 590 Λ4ΔS SSL1(λ)dλ (1-1)
[Expression 2]
A cg(φSSL1(λ))=∫380 495 ΔS SSL1(λ)dλ+∫ 495 590(−ΔS SSL1(λ))dλ+∫ 590 780 ΔS SSL1(λ)dλ (1-2)
Condition 2:
a distance Duv(φSSL1(λ)) of the spectral power distribution φSSL1(λ) of light from a black-body radiation locus defined by ANSI C78.377 satisfies
−0.0220≦D uv(φSSL1(λ))≦−0.0070;
Condition 3:
when a maximum value of spectral intensity in a range of 430 nm or more and 495 nm or less is defined as φSSL1-BM-max and a minimum value of spectral intensity in a range of 465 nm or more and 525 nm or less is defined as φSSL1-BG-min, the spectral power distribution φSSL1(λ) of light satisfies
0.2250≦φSSL1-BG-min/φSSL1-BM-max≦0.7000; and
Condition 4:
in the spectral power distribution φSSL1(λ) of light, when a maximum value of spectral intensity in a range of 590 nm or more and 780 nm or less is defined as φSSL1-RM-max, a wavelength λSSL1-RM-max that provides φSSL1-RM-max satisfies
605 (nm)≦λSSL1-RM-max≦653 (nm). 2. The light-emitting device according to claim 1, wherein
in Condition 2,
−0.0184≦D uv(φSSL1(λ))≦−0.0084 is satisfied. 3. The light-emitting device according to claim 1, wherein
in Condition 4,
625 (nm)≦λSSL1-RM-max≦647 (nm) is satisfied. 4. The light-emitting device according to claim 1, wherein Condition 5 below is satisfied
Condition 5:
in the spectral power distribution φSSL1(λ) of light, a wavelength λSSL1-BM-max that provides φSSL1-BM-max satisfies
430 (nm)≦λSSL1-BM-max≦480 (nm). 5. The light-emitting device according to claim 1, wherein Condition 6 below is satisfied
Condition 6:
0.1800≦φSSL1-BG-min/φSSL1-RM-max≦0.8500. 6. The light-emitting device according to claim 5, wherein
in Condition 6,
0.1917≦φSSL1-BG-min/φSSL1-RM-max≦0.7300 is satisfied. 7. The light-emitting device according to claim 1, wherein a luminous efficacy of radiation KSSL1 (lm/W) in a wavelength range of 380 nm or more and 780 nm or less, which is derived from φSSL1(λ), satisfies Condition 7
Condition 7:
210.0 lm/W≦K SSL1≦290.0 lm/W. 8. The light-emitting device according to claim 1, wherein TSSL1 (K) satisfies Condition 8 below
Condition 8:
2600 K≦T SSL1≦7700 K. 9. The light-emitting device according to claim 1, wherein
φSSL1(λ) does not have effective intensity derived from the light-emitting element in a range of 380 nm or more and 405 nm or less. 10. The light-emitting device according to claim 1, wherein
the blue semiconductor light-emitting element is configured such that a dominant wavelength λCHIP-BM-dom of the blue semiconductor light-emitting element alone when pulse-driven is 445 nm or more and 475 nm or less. 11. The light-emitting device according to claim 1, wherein
the green phosphor is a wide-band green phosphor. 12. The light-emitting device according to claim 1, wherein
the green phosphor is configured such that a wavelength λPHOS-GM-max that provides maximum emission intensity when light is excited by the green phosphor alone is 511 nm or more and 543 nm or less, and a full-width at half-maximum WPHOS-GM-fwhm thereof is 90 nm or more and 110 nm or less. 13. The light-emitting device according to claim 1, wherein the light-emitting device includes substantially no yellow phosphor. 14. The light-emitting device according to claim 1, wherein
the red phosphor is configured such that a wavelength λPHOS-RM-max that provides maximum emission intensity when light is excited by the red phosphor alone is 622 nm or more and 663 nm or less, and a full-width at half-maximum WPHOS-RM-fwhm thereof is 80 nm or more and 105 nm or less. 15. The light-emitting device according to claim 1, wherein
the blue semiconductor light-emitting element is an AlInGaN light-emitting element. 16. The light-emitting device according to claim 1, wherein
the green phosphor is Ca3(Sc,Mg)2Si3O12:Ce (CSMS phosphor), CaSc2O4:Ce (CSO phosphor), Lu3Al5O12:Ce (LuAG phosphor), or Y3(Al,Ga)5O12:Ce (G-YAG phosphor). 17. The light-emitting device according to claim 1, wherein
the red phosphor includes (Sr,Ca)AlSiN3:Eu (SCASN phosphor), CaAlSi(ON)3:Eu (CASON phosphor), or CaAlSiN3:Eu (CASN phosphor). 18. The light-emitting device according to claim 1, wherein the blue semiconductor light-emitting element is an AlInGaN light-emitting element with a dominant wavelength λCHIP-BM-dom when the blue semiconductor light-emitting element alone is pulse-driven, of 452.5 nm or more and 470 nm or less,
the green phosphor is CaSc2O4:Ce (CSO phosphor) or Lu3Al5O12:Ce (LuAG phosphor) with a wavelength XPHOS-GM-max that provides maximum emission intensity when light is excited by the green phosphor alone, of 515 nm or more and 535 nm or less, and a full-width at half-maximum WPHOS-GM-fwhm of 90 nm or more and 110 nm or less, and
the red phosphor is CaAlSi(ON)3:Eu (CASON phosphor) or CaAlSiN3:Eu (CASN phosphor) with a wavelength that provides maximum emission intensity λPHOS-RM-max when light is excited by the red phosphor alone, of 640 nm or more and 663 nm or less, and a full-width at half-maximum WPHOS-RM-fwhm of 80 nm or more and 105 nm or less. 19. The light-emitting device according to claim 1, wherein the light-emitting device is a packaged LED, a chip-on-board LED, an LED module, an LED light bulb, an LED lighting fixture, or an LED lighting system. 20. The light-emitting device according to claim 1, wherein
the light emitted from the light-emitting device in the main radiant direction satisfies Conditions I to IV below
Condition I:
when a*nSSL1 and b*nSSL1 (where n is a natural number from 1 to 15) respectively denote the a* value and b* value in the CIE 1976 L*a*b* color space of the following 15 Munsell renotation color samples of #01 to #15 based on a mathematical assumption that illumination is performed by the light emitted from the light-emitting device in the main radiant direction, and
when a*nref1 and b*nref1 (where n is a natural number from 1 to 15) respectively denote the a* value and b* value in the CIE 1976 L*a*b* color space of the 15 Munsell renotation color samples based on a mathematical assumption that illumination is performed by reference light which is selected in accordance with the correlated color temperature TSSL1(K) of the light emitted in the main radiant direction, each saturation difference ΔCnSSL1 satisfies
−4.00≦ΔC nSSL1≦8.00 (where n is a natural number from 1 to 15);
Condition II:
an average saturation difference represented by the following formula (1-3) satisfies
(
1
-
3
)
∑
n
=
1
15
Δ
C
nSSL
1
15
[
Expression
3
]
0.50
≦
∑
n
=
1
15
Δ
C
nSSL
1
15
≦
4.00
;
[
Expression
4
]
Condition III:
when a maximum saturation difference value is denoted by ΔCSSL-max1 and a minimum saturation difference value is denoted by ΔCSSL-min1, a difference |ΔCSSL-max1−ΔCSSL-min1| between the maximum saturation difference value and the minimum saturation difference value satisfies
2.00≦|ΔC SSL-max1 −ΔC SSL-min1|≦10.00,
where ΔCnSSL1=√{(a*nSSL1)2+(b*nSSL1)2}−√{(a*nref1)2+(b*nref1)2},
with the 15 Munsell renotation color samples being:
#01
7.5P
4/10
#02
10PB
4/10
#03
5PB
4/12
#04
7.5B
5/10
#05
10BG
6/8
#06
2.5BG
6/10
#07
2.5G
6/12
#08
7.5GY
7/10
#09
2.5GY
8/10
#10
5Y
8.5/12
#11
10YR
7/12
#12
5YR
7/12
#13
10R
6/12
#14
5R
4/14
#15
7.5RP
4/12;
and
Condition IV:
when θnSSL1 (degrees) (where n is a natural number from 1 to 15) denotes a hue angle in the CIE 1976 L*a*b* color space of the 15 Munsell renotation color samples based on a mathematical assumption that illumination is performed by the light emitted from the light-emitting device in the main radiant direction, and
when θnref1 (degrees) (where n is a natural number from 1 to 15) denotes a hue angle in the CIE 1976 L*a*b* color space of the 15 Munsell renotation color samples based on a mathematical assumption that illumination is performed by reference light which is selected in accordance with the correlated color temperature TSSL1 of the light emitted in the main radiant direction, an absolute value of each difference in hue angles |ΔhnSSL1| satisfies
0.00 degree≦|Δh nSSL1|≦12.50 degrees (where n is a natural number from 1 to 15),
where ΔhnSSL1=θnSSL1−θnref1. | 2,800 |
12,085 | 12,085 | 15,637,884 | 2,886 | A method and a system for acquiring a hyperspectral image by using a kaleidoscope are provided. The method includes copying an input image to generate a specific number of images, generating coded-aperture passed images corresponding to the images by using at least one coded aperture, and acquiring a hyperspectral image for the input image based on the coded-aperture passed images. | 1. A camera device comprising:
mirrors configured to generate a specific number of images corresponding to an input image; at least one coded aperture configured to generate coded-aperture passed images corresponding to the images, respectively; and a controller configured to acquire a hyperspectral image for the input image based on the coded-aperture passed images. 2. The camera device of claim 1, further comprising:
a dispersive medium configured to provide dispersive image information for each of the coded-aperture passed images, wherein the controller is configured to acquire the hyperspectral image for the input image based on the dispersive image information. 3. The camera device of claim 2, wherein the dispersive medium includes at least one of a prism, a diffraction grating, and a bandpass filter. 4. The camera device of claim 1, wherein the mirrors include a kaleidoscope configured to generate the specific number of images. 5. The camera device of claim 1, wherein the controller is configured to:
perform geometric calibration with respect to the acquired hyperspectral image. 6. The camera device of claim 5, wherein the controller is configured to:
perform the geometric calibration with respect to the acquired hyperspectral image by calculating a homography matrix based on a photographed checkerboard as the checkerboard is photographed and by applying the calculated homography matrix to the acquired hyperspectral image. 7. The camera device of claim 6, wherein the controller is configured to:
perform the geometric calibration with respect to the acquired hyperspectral image by performing primary geometric calibration using the homographic matrix and by performing secondary geometric calibration using an optical flow algorithm. 8. The camera device of claim 1, wherein the controller is configured to:
calculate radiance of the acquired hyperspectral image; and perform color calibration with respect to the acquired hyperspectral image based on the calculated radiance. 9. A method of acquiring a hyperspectral image, the method comprising:
copying an input image to generate a specific number of images; generating coded-aperture passed images corresponding to the images by using at least one coded aperture; and acquiring a hyperspectral image for the input image based on the coded-aperture passed images. 10. The method of claim 9, further comprising:
acquiring dispersive image information for each of the coded-aperture passed image as each of the coded-aperture passed images is dispersed by a dispersive medium, wherein the acquiring of the hyperspectral image for the input image includes: acquiring the hyperspectral image for the input image based on the dispersive image information. 11. The method of claim 10, wherein the dispersive medium includes at least one of a prism, a diffraction grating, and a bandpass filter. 12. The method of claim 9, wherein the copying of the input image to generate the specific number of images includes:
copying the input image to generate the specific number of images by using a kaleidoscope. 13. The method of claim 9, further comprising:
performing geometric calibration with respect to the acquired hyperspectral image. 14. The method of claim 13, wherein the performing of the geometric calibration with respect to the acquired hyperspectral image includes:
performing the geometric calibration with respect to the acquired hyperspectral image by calculating a homography matrix based on a photographed checkerboard as a checkerboard is photographed and by applying the calculated homography matrix to the acquired hyperspectral image. 15. The method of claim 14, wherein the performing of the geometric calibration with respect to the acquired hyperspectral image includes:
performing the geometric calibration with respect to the acquired hyperspectral image by performing primary geometric calibration using the homographic matrix and by performing secondary geometric calibration using an optical flow algorithm. 16. The method of claim 9, further comprising:
calculating radiance of the acquired hyperspectral image; and performing color calibration with respect to the acquired hyperspectral image based on the calculated radiance. 17. A method of acquiring a hyperspectral image, the method comprising:
generating a specific number of images with respect to an input image; generating coded-aperture passed images corresponding to the generated images by applying different coded-apertures to the generated images; and acquiring a hyperspectral image for the input image in a single shot, based on the generated coded-aperture passed images. 18. The method of claim 17, further comprising:
acquiring dispersive image information for each of the coded-aperture passed images, wherein the acquiring of the hyperspectral image for the input image includes: acquiring the hyperspectral image for the input image in a single shot, based on the acquired dispersive image information. 19. The method of claim 17, further comprising:
performing geometric calibration with respect to the acquired hyperspectral image. 20. The method of claim 17, further comprising:
calculating radiance of the acquired hyperspectral image; and performing color calibration with respect to the acquired hyperspectral image based on the calculated radiance. | A method and a system for acquiring a hyperspectral image by using a kaleidoscope are provided. The method includes copying an input image to generate a specific number of images, generating coded-aperture passed images corresponding to the images by using at least one coded aperture, and acquiring a hyperspectral image for the input image based on the coded-aperture passed images.1. A camera device comprising:
mirrors configured to generate a specific number of images corresponding to an input image; at least one coded aperture configured to generate coded-aperture passed images corresponding to the images, respectively; and a controller configured to acquire a hyperspectral image for the input image based on the coded-aperture passed images. 2. The camera device of claim 1, further comprising:
a dispersive medium configured to provide dispersive image information for each of the coded-aperture passed images, wherein the controller is configured to acquire the hyperspectral image for the input image based on the dispersive image information. 3. The camera device of claim 2, wherein the dispersive medium includes at least one of a prism, a diffraction grating, and a bandpass filter. 4. The camera device of claim 1, wherein the mirrors include a kaleidoscope configured to generate the specific number of images. 5. The camera device of claim 1, wherein the controller is configured to:
perform geometric calibration with respect to the acquired hyperspectral image. 6. The camera device of claim 5, wherein the controller is configured to:
perform the geometric calibration with respect to the acquired hyperspectral image by calculating a homography matrix based on a photographed checkerboard as the checkerboard is photographed and by applying the calculated homography matrix to the acquired hyperspectral image. 7. The camera device of claim 6, wherein the controller is configured to:
perform the geometric calibration with respect to the acquired hyperspectral image by performing primary geometric calibration using the homographic matrix and by performing secondary geometric calibration using an optical flow algorithm. 8. The camera device of claim 1, wherein the controller is configured to:
calculate radiance of the acquired hyperspectral image; and perform color calibration with respect to the acquired hyperspectral image based on the calculated radiance. 9. A method of acquiring a hyperspectral image, the method comprising:
copying an input image to generate a specific number of images; generating coded-aperture passed images corresponding to the images by using at least one coded aperture; and acquiring a hyperspectral image for the input image based on the coded-aperture passed images. 10. The method of claim 9, further comprising:
acquiring dispersive image information for each of the coded-aperture passed image as each of the coded-aperture passed images is dispersed by a dispersive medium, wherein the acquiring of the hyperspectral image for the input image includes: acquiring the hyperspectral image for the input image based on the dispersive image information. 11. The method of claim 10, wherein the dispersive medium includes at least one of a prism, a diffraction grating, and a bandpass filter. 12. The method of claim 9, wherein the copying of the input image to generate the specific number of images includes:
copying the input image to generate the specific number of images by using a kaleidoscope. 13. The method of claim 9, further comprising:
performing geometric calibration with respect to the acquired hyperspectral image. 14. The method of claim 13, wherein the performing of the geometric calibration with respect to the acquired hyperspectral image includes:
performing the geometric calibration with respect to the acquired hyperspectral image by calculating a homography matrix based on a photographed checkerboard as a checkerboard is photographed and by applying the calculated homography matrix to the acquired hyperspectral image. 15. The method of claim 14, wherein the performing of the geometric calibration with respect to the acquired hyperspectral image includes:
performing the geometric calibration with respect to the acquired hyperspectral image by performing primary geometric calibration using the homographic matrix and by performing secondary geometric calibration using an optical flow algorithm. 16. The method of claim 9, further comprising:
calculating radiance of the acquired hyperspectral image; and performing color calibration with respect to the acquired hyperspectral image based on the calculated radiance. 17. A method of acquiring a hyperspectral image, the method comprising:
generating a specific number of images with respect to an input image; generating coded-aperture passed images corresponding to the generated images by applying different coded-apertures to the generated images; and acquiring a hyperspectral image for the input image in a single shot, based on the generated coded-aperture passed images. 18. The method of claim 17, further comprising:
acquiring dispersive image information for each of the coded-aperture passed images, wherein the acquiring of the hyperspectral image for the input image includes: acquiring the hyperspectral image for the input image in a single shot, based on the acquired dispersive image information. 19. The method of claim 17, further comprising:
performing geometric calibration with respect to the acquired hyperspectral image. 20. The method of claim 17, further comprising:
calculating radiance of the acquired hyperspectral image; and performing color calibration with respect to the acquired hyperspectral image based on the calculated radiance. | 2,800 |
12,086 | 12,086 | 16,239,008 | 2,815 | It is an object to provide a semiconductor device which has a large size and operates at high speed. A top gate transistor which includes a semiconductor layer of single-crystal and a bottom gate transistor which includes a semiconductor layer of amorphous silicon (microcrystalline silicon) are formed over the same substrate. Then, gate electrodes of each transistor are formed with the same layer, and source and drain electrodes are also formed with the same layer. Thus, manufacturing steps are reduced. In other words, two types of transistors can be manufactured by adding only a few steps to the manufacturing process of a bottom gate transistor. | 1. A semiconductor device comprising:
a first semiconductor layer over an insulating substrate; a first insulating layer over the first semiconductor layer; a first conductive layer and a second conductive layer over the first insulating layer; a second insulating layer over the first conductive layer and the second conductive layer; a second semiconductor layer over the second insulating layer; and a third conductive layer over the second semiconductor layer, wherein the first conductive layer is overlapped with the first semiconductor layer, and the second conductive layer is overlapped with the second semiconductor layer; wherein the first semiconductor layer serves as an active layer of a first transistor; wherein the second semiconductor layer serves as an active layer of a second transistor; and wherein a property of the first semiconductor layer is different from a property of the second semiconductor layer. | It is an object to provide a semiconductor device which has a large size and operates at high speed. A top gate transistor which includes a semiconductor layer of single-crystal and a bottom gate transistor which includes a semiconductor layer of amorphous silicon (microcrystalline silicon) are formed over the same substrate. Then, gate electrodes of each transistor are formed with the same layer, and source and drain electrodes are also formed with the same layer. Thus, manufacturing steps are reduced. In other words, two types of transistors can be manufactured by adding only a few steps to the manufacturing process of a bottom gate transistor.1. A semiconductor device comprising:
a first semiconductor layer over an insulating substrate; a first insulating layer over the first semiconductor layer; a first conductive layer and a second conductive layer over the first insulating layer; a second insulating layer over the first conductive layer and the second conductive layer; a second semiconductor layer over the second insulating layer; and a third conductive layer over the second semiconductor layer, wherein the first conductive layer is overlapped with the first semiconductor layer, and the second conductive layer is overlapped with the second semiconductor layer; wherein the first semiconductor layer serves as an active layer of a first transistor; wherein the second semiconductor layer serves as an active layer of a second transistor; and wherein a property of the first semiconductor layer is different from a property of the second semiconductor layer. | 2,800 |
12,087 | 12,087 | 14,258,552 | 2,862 | Systems and methods for attenuating residual acoustic energy in marine seismic data are disclosed. In one aspect, a number of gathers are recorded for consecutive activations of a marine source. Each recorded gather contains a record of acoustic reflections from a subterranean formation after activation of the source and residual acoustic energy from one or more previous activations of the source. The gathers are aligned to generate aligned gathers with the residual acoustic energy coherent between the aligned gathers and the reflections incoherent between the aligned gathers. A set of model gathers of the residual acoustic energy is generated from the aligned gathers. The model gathers are subtracted from one or more of the corresponding recorded gathers to generate one or more gathers with attenuated residual acoustic energy. | 1. A method for attenuating residual acoustic energy in seismic data comprising:
consecutively recording a number seismic data gathers with seismic receivers, each recorded gather is a record of acoustic reflections from a subterranean formation after activation of a source towed by a survey vessel and residual acoustic energy (“RAE”) from one or more previous activations of the source; aligning the recorded gathers in time to generate time-aligned gathers with the RAE coherent and the reflections incoherent between the time-aligned gathers; generating RAE model gathers of the RAE from the time-aligned gathers; aligning one or more of the RAE model gathers in time with the corresponding recorded gathers to generate one or more corresponding time-adjusted gathers; and subtracting one or more of the time-adjusted gathers from corresponding recorded gathers to generate one or more RAE attenuated gathers. 2. The method of claim 1 wherein a programmable computer is programmed to perform the method. 3. The method of claim 1 wherein the recorded gathers recorded for consecutive activations of the source further comprise reflections that are coherent between the gathers and residual acoustic energy that is not coherent between the gathers. 4. The method of claim 1 wherein time intervals between source activations vary in duration. 5. The method of claim 1 wherein the recorded gathers are recorded in recording time intervals of varying duration. 6. The method of claim 1 wherein the consecutively recorded seismic data gathers further comprise continuously recorded seismic data partitioned by source activation times with time intervals between source activations that vary in duration. 7. The method of claim 1 wherein aligning the recorded gathers to generate the time-aligned gathers further comprises
selecting one of the gathers; and
time shifting the recorded gathers with respect to the selected gather so that the RAE in the gathers is aligned in, time. 8. The method of claim 1 wherein generating the RAE model gathers further comprises:
for each trace index of the RAE models,
collecting traces with the same trace index from each of the RAE model gathers;
transforming the collection of traces from a space-time domain to a frequency-space domain to generate a spectrum for the collection of traces;
performing spatial f-x deconvolution to attenuate energy at each frequency associated with the reflections and retain energy at each frequency associated with the RAE; and
transforming the spectra from the frequency-space domain to the space-time domain to generate traces in the RAE model gathers with the reflections attenuated and the RAE retained. 9. The method of claim 1 wherein aligning one or more of the RAE model gathers in time with the corresponding recorded gathers to generate one or more corresponding time-adjusted gathers further comprises:
for each of the one or more RAE model gathers,
aligning the RAE model gather with the corresponding recorded gather so that the RAE in the RAE model gather is aligned in time with the RAE in the recorded gather to generate a time-aligned gather. 10. The method of claim 1 wherein the reflections further comprise primary reflections and multiple reflections. 11. The method of claim 1 further comprising processing the gathers with attenuated RAE to generate a geophysical data product. 12. The method of claim 8 further comprising storing the geophysical data product on a tangible, non-volatile computer-readable medium suitable for importing onshore. 13. The method of claim 9 further comprising performing geophysical analysis onshore on the geophysical data product. 14. A computer system for processing seismic data obtained from a marine seismic survey of a subterranean formation, the system comprising:
one or more processors; one or more data-storage devices; and a routine stored in one or more of data-storage devices and executed by the one or more processors, the routine directed to
receiving a number of consecutively recorded gathers, each recorded gather is a record of acoustic reflections from a subterranean formation after activation of a source towed by a survey vessel and residual acoustic energy (“RAE”) from one or more previous activations of the source;
aligning the recorded gathers in time to generate time-aligned gathers with the RAE coherent and the reflections incoherent between the time-aligned gathers;
generating RAE model gathers of the RAE from the time-aligned gathers;
aligning one or more of the RAE model gathers in time with one or more of the corresponding recorded gathers to generate one or more corresponding time-adjusted gathers; and
subtracting one or more the time-adjusted gathers from corresponding recorded gathers to generate one or more RAE attenuated gathers. 15. The system of claim 14 wherein the recorded gathers for consecutive activations of the source further comprise reflections that are coherent between the gathers and residual acoustic energy that is not coherent between the gathers. 16. The system of claim 14 wherein time intervals between source activations vary in duration. 17. The system of claim 14 wherein the recorded gathers are recorded in recording time intervals of varying duration. 18. The system of claim 14 wherein the consecutively recorded seismic data gathers further comprise continuously recorded seismic data partitioned by source activation times with time intervals between source activations that vary in duration. 19. The system of claim 14 wherein aligning the recorded gathers to generate the time aligned gathers further comprises
selecting one of the gathers; and
time shifting the recorded gathers with respect to the selected gather so that the RAE in the gathers are aligned in time. 20. The system of claim 14 wherein generating the RAE model gathers further comprises:
for each trace index of the RAE models,
collecting traces with the same trace index from each of the RAE model gathers;
transforming the collection of traces from a space-time domain to a frequency-space domain to generate a spectrum for the collection of traces;
performing spatial f−x deconvolution to attenuate energy at each frequency associated with the reflections and retain energy at each frequency associated with the RAE; and
transforming the spectra from the frequency-space domain to the space-time domain to generate traces in the RAE model gathers with the reflections attenuated and the RAE retained. 21. The system of claim 14 wherein aligning one or more of the RAE model gathers in time with one or more of the corresponding recorded gathers to generate one or more corresponding time-adjusted gathers further comprises:
for each of the one or more RAE model gathers,
aligning the RAE model gather with the corresponding recorded gather so that the RAE in the RAE model gather is aligned in time with the RAE in the recorded gather to generate residual time-aligned gather. 22. The system of claim 14 wherein the reflections further comprise primary reflections and multiple reflections. 23. The system of claim 14 further comprising processing the gathers with attenuated RAE to generate a geophysical data product. 24. The system of claim 23 further comprising storing the geophysical data product on a tangible, non-volatile computer-readable medium suitable for importing onshore. 25. The system of claim 24 further comprising performing geophysical analysis onshore on the geophysical data product. 26. A physical computer-readable medium having machine-readable instructions encoded thereon for enabling one or more processors of a computer system to perform the operations of
receiving a number of consecutively recorded gathers, each recorded gather is a record of acoustic reflections from a subterranean formation after activation of a source towed by a survey vessel and residual acoustic energy (“RAE”) from one or more previous activations of the source; aligning the recorded gathers in time to generate time-aligned gathers with the RAE coherent and the reflections incoherent between the time-aligned gathers; generating RAE model gathers of the RAE from the time-aligned gathers; aligning one or more of the RAE model gathers in time with one or more of the corresponding recorded gathers to generate one or more corresponding time-adjusted gathers; and subtracting one or more the time-adjusted gathers from corresponding recorded gathers to generate one or more RAE attenuated gathers. 27. The medium of claim 26 wherein the recorded gathers recorded for consecutive activations of the source further comprise reflections that are coherent between the gathers and residual acoustic energy that is not coherent between the gathers. 28. The medium of claim 26 wherein time intervals between source activations vary in duration. 29. The medium of claim 26 wherein the recorded gathers are recorded in recording time intervals of varying duration. 30. The medium of claim 26 wherein the consecutively recorded seismic data gathers further comprise continuously recorded seismic data partitioned by source activation times with time intervals between source activations that vary in duration. 31. The medium of claim 26 wherein aligning the recorded gathers to generate the time-aligned gathers further comprises
selecting one of the gathers; and
time shifting the recorded gathers with respect to the selected gather so that the RAE in the gathers are aligned in time. 32. The medium of claim 26 wherein generating the RAE model gathers further comprises:
for each trace index of the RAE models,
collecting traces with the same trace index from each of the RAE model gathers;
transforming the collection of traces from a space-time domain to a frequency-space domain to generate a spectrum for the collection of traces;
performing spatial f−x deconvolution to attenuate energy at each frequency associated with the reflections and retain energy at each frequency associated with the RAE; and
transforming the spectra from the frequency-space domain to the space-time domain to generate traces in the RAE model gathers with the reflections attenuated and the RAE retained. 33. The medium of claim 26 wherein aligning one or more of the RAE model gathers in time with one or more of the corresponding recorded gathers to generate one or more corresponding time-adjusted gathers further comprises:
for each of the one or more RAE model gathers,
aligning the RAE model gather with the corresponding recorded gather so that the RAE in the RAE model gather is aligned in time with the RAE in the recorded gather to generate a time-aligned gather. 34. The medium of claim 26 wherein the reflections further comprise primary reflections and multiple reflections. 35. The medium of claim 26 further comprising processing the gathers with attenuated RAE to generate a geophysical data product. 36. The medium of claim 35 further comprising storing the geophysical data product on a tangible, non-volatile computer-readable medium suitable for importing onshore. 37. The medium of claim 36 further comprising performing geophysical analysis onshore on the geophysical data product. | Systems and methods for attenuating residual acoustic energy in marine seismic data are disclosed. In one aspect, a number of gathers are recorded for consecutive activations of a marine source. Each recorded gather contains a record of acoustic reflections from a subterranean formation after activation of the source and residual acoustic energy from one or more previous activations of the source. The gathers are aligned to generate aligned gathers with the residual acoustic energy coherent between the aligned gathers and the reflections incoherent between the aligned gathers. A set of model gathers of the residual acoustic energy is generated from the aligned gathers. The model gathers are subtracted from one or more of the corresponding recorded gathers to generate one or more gathers with attenuated residual acoustic energy.1. A method for attenuating residual acoustic energy in seismic data comprising:
consecutively recording a number seismic data gathers with seismic receivers, each recorded gather is a record of acoustic reflections from a subterranean formation after activation of a source towed by a survey vessel and residual acoustic energy (“RAE”) from one or more previous activations of the source; aligning the recorded gathers in time to generate time-aligned gathers with the RAE coherent and the reflections incoherent between the time-aligned gathers; generating RAE model gathers of the RAE from the time-aligned gathers; aligning one or more of the RAE model gathers in time with the corresponding recorded gathers to generate one or more corresponding time-adjusted gathers; and subtracting one or more of the time-adjusted gathers from corresponding recorded gathers to generate one or more RAE attenuated gathers. 2. The method of claim 1 wherein a programmable computer is programmed to perform the method. 3. The method of claim 1 wherein the recorded gathers recorded for consecutive activations of the source further comprise reflections that are coherent between the gathers and residual acoustic energy that is not coherent between the gathers. 4. The method of claim 1 wherein time intervals between source activations vary in duration. 5. The method of claim 1 wherein the recorded gathers are recorded in recording time intervals of varying duration. 6. The method of claim 1 wherein the consecutively recorded seismic data gathers further comprise continuously recorded seismic data partitioned by source activation times with time intervals between source activations that vary in duration. 7. The method of claim 1 wherein aligning the recorded gathers to generate the time-aligned gathers further comprises
selecting one of the gathers; and
time shifting the recorded gathers with respect to the selected gather so that the RAE in the gathers is aligned in, time. 8. The method of claim 1 wherein generating the RAE model gathers further comprises:
for each trace index of the RAE models,
collecting traces with the same trace index from each of the RAE model gathers;
transforming the collection of traces from a space-time domain to a frequency-space domain to generate a spectrum for the collection of traces;
performing spatial f-x deconvolution to attenuate energy at each frequency associated with the reflections and retain energy at each frequency associated with the RAE; and
transforming the spectra from the frequency-space domain to the space-time domain to generate traces in the RAE model gathers with the reflections attenuated and the RAE retained. 9. The method of claim 1 wherein aligning one or more of the RAE model gathers in time with the corresponding recorded gathers to generate one or more corresponding time-adjusted gathers further comprises:
for each of the one or more RAE model gathers,
aligning the RAE model gather with the corresponding recorded gather so that the RAE in the RAE model gather is aligned in time with the RAE in the recorded gather to generate a time-aligned gather. 10. The method of claim 1 wherein the reflections further comprise primary reflections and multiple reflections. 11. The method of claim 1 further comprising processing the gathers with attenuated RAE to generate a geophysical data product. 12. The method of claim 8 further comprising storing the geophysical data product on a tangible, non-volatile computer-readable medium suitable for importing onshore. 13. The method of claim 9 further comprising performing geophysical analysis onshore on the geophysical data product. 14. A computer system for processing seismic data obtained from a marine seismic survey of a subterranean formation, the system comprising:
one or more processors; one or more data-storage devices; and a routine stored in one or more of data-storage devices and executed by the one or more processors, the routine directed to
receiving a number of consecutively recorded gathers, each recorded gather is a record of acoustic reflections from a subterranean formation after activation of a source towed by a survey vessel and residual acoustic energy (“RAE”) from one or more previous activations of the source;
aligning the recorded gathers in time to generate time-aligned gathers with the RAE coherent and the reflections incoherent between the time-aligned gathers;
generating RAE model gathers of the RAE from the time-aligned gathers;
aligning one or more of the RAE model gathers in time with one or more of the corresponding recorded gathers to generate one or more corresponding time-adjusted gathers; and
subtracting one or more the time-adjusted gathers from corresponding recorded gathers to generate one or more RAE attenuated gathers. 15. The system of claim 14 wherein the recorded gathers for consecutive activations of the source further comprise reflections that are coherent between the gathers and residual acoustic energy that is not coherent between the gathers. 16. The system of claim 14 wherein time intervals between source activations vary in duration. 17. The system of claim 14 wherein the recorded gathers are recorded in recording time intervals of varying duration. 18. The system of claim 14 wherein the consecutively recorded seismic data gathers further comprise continuously recorded seismic data partitioned by source activation times with time intervals between source activations that vary in duration. 19. The system of claim 14 wherein aligning the recorded gathers to generate the time aligned gathers further comprises
selecting one of the gathers; and
time shifting the recorded gathers with respect to the selected gather so that the RAE in the gathers are aligned in time. 20. The system of claim 14 wherein generating the RAE model gathers further comprises:
for each trace index of the RAE models,
collecting traces with the same trace index from each of the RAE model gathers;
transforming the collection of traces from a space-time domain to a frequency-space domain to generate a spectrum for the collection of traces;
performing spatial f−x deconvolution to attenuate energy at each frequency associated with the reflections and retain energy at each frequency associated with the RAE; and
transforming the spectra from the frequency-space domain to the space-time domain to generate traces in the RAE model gathers with the reflections attenuated and the RAE retained. 21. The system of claim 14 wherein aligning one or more of the RAE model gathers in time with one or more of the corresponding recorded gathers to generate one or more corresponding time-adjusted gathers further comprises:
for each of the one or more RAE model gathers,
aligning the RAE model gather with the corresponding recorded gather so that the RAE in the RAE model gather is aligned in time with the RAE in the recorded gather to generate residual time-aligned gather. 22. The system of claim 14 wherein the reflections further comprise primary reflections and multiple reflections. 23. The system of claim 14 further comprising processing the gathers with attenuated RAE to generate a geophysical data product. 24. The system of claim 23 further comprising storing the geophysical data product on a tangible, non-volatile computer-readable medium suitable for importing onshore. 25. The system of claim 24 further comprising performing geophysical analysis onshore on the geophysical data product. 26. A physical computer-readable medium having machine-readable instructions encoded thereon for enabling one or more processors of a computer system to perform the operations of
receiving a number of consecutively recorded gathers, each recorded gather is a record of acoustic reflections from a subterranean formation after activation of a source towed by a survey vessel and residual acoustic energy (“RAE”) from one or more previous activations of the source; aligning the recorded gathers in time to generate time-aligned gathers with the RAE coherent and the reflections incoherent between the time-aligned gathers; generating RAE model gathers of the RAE from the time-aligned gathers; aligning one or more of the RAE model gathers in time with one or more of the corresponding recorded gathers to generate one or more corresponding time-adjusted gathers; and subtracting one or more the time-adjusted gathers from corresponding recorded gathers to generate one or more RAE attenuated gathers. 27. The medium of claim 26 wherein the recorded gathers recorded for consecutive activations of the source further comprise reflections that are coherent between the gathers and residual acoustic energy that is not coherent between the gathers. 28. The medium of claim 26 wherein time intervals between source activations vary in duration. 29. The medium of claim 26 wherein the recorded gathers are recorded in recording time intervals of varying duration. 30. The medium of claim 26 wherein the consecutively recorded seismic data gathers further comprise continuously recorded seismic data partitioned by source activation times with time intervals between source activations that vary in duration. 31. The medium of claim 26 wherein aligning the recorded gathers to generate the time-aligned gathers further comprises
selecting one of the gathers; and
time shifting the recorded gathers with respect to the selected gather so that the RAE in the gathers are aligned in time. 32. The medium of claim 26 wherein generating the RAE model gathers further comprises:
for each trace index of the RAE models,
collecting traces with the same trace index from each of the RAE model gathers;
transforming the collection of traces from a space-time domain to a frequency-space domain to generate a spectrum for the collection of traces;
performing spatial f−x deconvolution to attenuate energy at each frequency associated with the reflections and retain energy at each frequency associated with the RAE; and
transforming the spectra from the frequency-space domain to the space-time domain to generate traces in the RAE model gathers with the reflections attenuated and the RAE retained. 33. The medium of claim 26 wherein aligning one or more of the RAE model gathers in time with one or more of the corresponding recorded gathers to generate one or more corresponding time-adjusted gathers further comprises:
for each of the one or more RAE model gathers,
aligning the RAE model gather with the corresponding recorded gather so that the RAE in the RAE model gather is aligned in time with the RAE in the recorded gather to generate a time-aligned gather. 34. The medium of claim 26 wherein the reflections further comprise primary reflections and multiple reflections. 35. The medium of claim 26 further comprising processing the gathers with attenuated RAE to generate a geophysical data product. 36. The medium of claim 35 further comprising storing the geophysical data product on a tangible, non-volatile computer-readable medium suitable for importing onshore. 37. The medium of claim 36 further comprising performing geophysical analysis onshore on the geophysical data product. | 2,800 |
12,088 | 12,088 | 13,246,971 | 2,863 | A pressure transmitter for use in measuring a pressure of a process fluid in an industrial process. The pressure transmitter includes a pressure sensor having a pressure output related to the pressure of the process fluid. Measurement circuitry is configured to calculate a process variable of the process fluid based upon the pressure output. Diagnostic circuitry diagnoses operation of the industrial process based upon a process parameter of the pressure output. Process parameter calculation circuitry calculates the process parameter based upon pressure output and reduces the effect of an abrupt change in the pressure output on the calculated process parameter. | 1. A pressure transmitter for use in measuring a pressure of a process fluid in an industrial process, comprising:
a pressure sensor having a pressure output related to the pressure of the process fluid; measurement circuitry configured to calculate a process variable of the process fluid based upon the pressure output; diagnostic circuitry configured to diagnose operation of the industrial process based upon a standard deviation; and standard deviation calculation circuitry configured to calculate a standard deviation based upon the pressure output and reduce an effect of an abrupt change in the pressure output on the calculated standard deviation. 2. The pressure transmitter of claim 1 wherein the standard deviation circuitry further includes a difference filter. 3. The pressure transmitter of claim 1 wherein the standard deviation circuitry discards a number of samples of the pressure output during calculation of the standard deviation. 4. The pressure transmitter of claim 3 wherein a sampled value of the pressure output is discarded if it exceeds a pressure change limit (a). 5. The pressure transmitter of claim 4 wherein the pressure change limit (a) comprises an absolute value. 6. The pressure transmitter of claim 4 wherein the pressure change limit (a) comprises a percentage value. 7. The pressure transmitter of claim 4 wherein the pressure change limit (a) is a function of measured pressure. 8. The pressure transmitter of claim 3 wherein a number of discarded samples are greater than one. 9. The pressure transmitter of claim 1 wherein the standard deviation circuitry divides a plurality of sampled values of the pressure output into buckets of samples. 10. The pressure transmitter of claim 9 wherein at least one of the buckets is discarded in the standard deviation calculation. 11. The pressure transmitter of claim 10 wherein the discarded bucket is at a high or low end of the standard deviation. 12. The pressure transmitter of claim 9 wherein the standard deviation circuitry calculates a variance for each of the plurality of buckets. 13. The pressure transmitter of claim 12 wherein at least one of the buckets is discarded from the standard deviation calculation based upon its calculated variance. 14. A method in a process transmitter of the type used to measure pressure of a process fluid in an industrial process, the method for diagnosing operation of the industrial process comprising:
receiving a pressure signal from a pressure sensor coupled to the process fluid; calculating a process variable of the process fluid based upon the pressure signal; calculating a standard deviation of the pressure signal and reducing an effecting of an abrupt change on a calculated standard deviation; and diagnosing operation of the industrial process based upon the calculated standard deviation. 15. The method of claim 14 wherein the standard deviation circuitry further includes a difference filter. 16. The method of claim 14 wherein the standard deviation circuitry discards a number of samples of the pressure output during calculation of the standard deviation. 17. The method of claim 16 wherein a sampled value of the pressure output is discarded if it exceeds a pressure change limit (a). 18. The method of claim 17 wherein the pressure change limit (a) comprises an absolute value. 19. The method of claim 17 wherein the pressure change limit (a) comprises a percentage value. 20. The method of claim 17 wherein the pressure change limit (a) is a function of measured pressure. 21. The method of claim 16 wherein a number of discarded samples are greater than one. 22. The method of claim 14 wherein the standard deviation circuitry divides a plurality of sampled values of the pressure output into buckets of samples. 23. The method of claim 22 wherein at least one of the buckets is discarded in the standard deviation calculation. 24. The method of claim 22 wherein the standard deviation circuitry calculates a variance for each of the plurality of buckets. 25. The method of claim 24 wherein at least one of the buckets is discarded from the standard deviation calculation based upon its calculated variance. 26. A process variable transmitter for use in measuring a process variable pressure of a process fluid in an industrial process, comprising:
a process variable sensor having a process variable output related to the sensed variable of the process fluid; measurement circuitry configured to measure the process variable of the process fluid based upon the process variable output; diagnostic circuitry configured to diagnose operation of the industrial process based upon a process parameter of the process variable; and process parameter calculation circuitry configured to calculate a process parameter based upon the process variable output and reduce an effect of an abrupt change in the pressure output on the calculated process parameter; wherein the process parameter is calculated based upon a plurality of individual process parameter calculations calculated using reduced numbers of samples of the process variable output. 27. The process variable transmitter of claim 26 wherein at least one of the individual process parameters are discarded prior to calculating the process parameter. 28. The process variable transmitter of claim 27 wherein the discarded process parameter is determined based upon a calculated variance. 29. A method in a process variable transmitter of the type used to measure process variable of a process fluid in an industrial process, the method for diagnosing operation of the industrial process comprising:
receiving a process variable signal from a process variable sensor coupled to the process fluid; calculating a process variable of the process fluid based upon the process variable signal; calculating a process parameter of the process variable signal and reducing an effect of an abrupt change on a calculated process parameter, wherein the calculating includes a dividing samples of the process variable sensor output into buckets and calculating a plurality of individual process parameters based upon the buckets, and further including discarding at least one of the individual process parameters calculations; and diagnosing operation of the industrial process based upon the calculated process parameter. 30. The method of claim 29 including discarding the at least one process parameters based upon a calculated variance. | A pressure transmitter for use in measuring a pressure of a process fluid in an industrial process. The pressure transmitter includes a pressure sensor having a pressure output related to the pressure of the process fluid. Measurement circuitry is configured to calculate a process variable of the process fluid based upon the pressure output. Diagnostic circuitry diagnoses operation of the industrial process based upon a process parameter of the pressure output. Process parameter calculation circuitry calculates the process parameter based upon pressure output and reduces the effect of an abrupt change in the pressure output on the calculated process parameter.1. A pressure transmitter for use in measuring a pressure of a process fluid in an industrial process, comprising:
a pressure sensor having a pressure output related to the pressure of the process fluid; measurement circuitry configured to calculate a process variable of the process fluid based upon the pressure output; diagnostic circuitry configured to diagnose operation of the industrial process based upon a standard deviation; and standard deviation calculation circuitry configured to calculate a standard deviation based upon the pressure output and reduce an effect of an abrupt change in the pressure output on the calculated standard deviation. 2. The pressure transmitter of claim 1 wherein the standard deviation circuitry further includes a difference filter. 3. The pressure transmitter of claim 1 wherein the standard deviation circuitry discards a number of samples of the pressure output during calculation of the standard deviation. 4. The pressure transmitter of claim 3 wherein a sampled value of the pressure output is discarded if it exceeds a pressure change limit (a). 5. The pressure transmitter of claim 4 wherein the pressure change limit (a) comprises an absolute value. 6. The pressure transmitter of claim 4 wherein the pressure change limit (a) comprises a percentage value. 7. The pressure transmitter of claim 4 wherein the pressure change limit (a) is a function of measured pressure. 8. The pressure transmitter of claim 3 wherein a number of discarded samples are greater than one. 9. The pressure transmitter of claim 1 wherein the standard deviation circuitry divides a plurality of sampled values of the pressure output into buckets of samples. 10. The pressure transmitter of claim 9 wherein at least one of the buckets is discarded in the standard deviation calculation. 11. The pressure transmitter of claim 10 wherein the discarded bucket is at a high or low end of the standard deviation. 12. The pressure transmitter of claim 9 wherein the standard deviation circuitry calculates a variance for each of the plurality of buckets. 13. The pressure transmitter of claim 12 wherein at least one of the buckets is discarded from the standard deviation calculation based upon its calculated variance. 14. A method in a process transmitter of the type used to measure pressure of a process fluid in an industrial process, the method for diagnosing operation of the industrial process comprising:
receiving a pressure signal from a pressure sensor coupled to the process fluid; calculating a process variable of the process fluid based upon the pressure signal; calculating a standard deviation of the pressure signal and reducing an effecting of an abrupt change on a calculated standard deviation; and diagnosing operation of the industrial process based upon the calculated standard deviation. 15. The method of claim 14 wherein the standard deviation circuitry further includes a difference filter. 16. The method of claim 14 wherein the standard deviation circuitry discards a number of samples of the pressure output during calculation of the standard deviation. 17. The method of claim 16 wherein a sampled value of the pressure output is discarded if it exceeds a pressure change limit (a). 18. The method of claim 17 wherein the pressure change limit (a) comprises an absolute value. 19. The method of claim 17 wherein the pressure change limit (a) comprises a percentage value. 20. The method of claim 17 wherein the pressure change limit (a) is a function of measured pressure. 21. The method of claim 16 wherein a number of discarded samples are greater than one. 22. The method of claim 14 wherein the standard deviation circuitry divides a plurality of sampled values of the pressure output into buckets of samples. 23. The method of claim 22 wherein at least one of the buckets is discarded in the standard deviation calculation. 24. The method of claim 22 wherein the standard deviation circuitry calculates a variance for each of the plurality of buckets. 25. The method of claim 24 wherein at least one of the buckets is discarded from the standard deviation calculation based upon its calculated variance. 26. A process variable transmitter for use in measuring a process variable pressure of a process fluid in an industrial process, comprising:
a process variable sensor having a process variable output related to the sensed variable of the process fluid; measurement circuitry configured to measure the process variable of the process fluid based upon the process variable output; diagnostic circuitry configured to diagnose operation of the industrial process based upon a process parameter of the process variable; and process parameter calculation circuitry configured to calculate a process parameter based upon the process variable output and reduce an effect of an abrupt change in the pressure output on the calculated process parameter; wherein the process parameter is calculated based upon a plurality of individual process parameter calculations calculated using reduced numbers of samples of the process variable output. 27. The process variable transmitter of claim 26 wherein at least one of the individual process parameters are discarded prior to calculating the process parameter. 28. The process variable transmitter of claim 27 wherein the discarded process parameter is determined based upon a calculated variance. 29. A method in a process variable transmitter of the type used to measure process variable of a process fluid in an industrial process, the method for diagnosing operation of the industrial process comprising:
receiving a process variable signal from a process variable sensor coupled to the process fluid; calculating a process variable of the process fluid based upon the process variable signal; calculating a process parameter of the process variable signal and reducing an effect of an abrupt change on a calculated process parameter, wherein the calculating includes a dividing samples of the process variable sensor output into buckets and calculating a plurality of individual process parameters based upon the buckets, and further including discarding at least one of the individual process parameters calculations; and diagnosing operation of the industrial process based upon the calculated process parameter. 30. The method of claim 29 including discarding the at least one process parameters based upon a calculated variance. | 2,800 |
12,089 | 12,089 | 16,682,261 | 2,844 | A method for providing assistance in aiming of one or more illumination devices in an area may include, by a processor, receiving photometric data for an area, and using the photometric data to determine an aiming vector for the illumination device. The area may include the illumination device. the method may further include receiving, from an orientation sensor module of the illumination device, orientation data for the illumination device, and using the orientation data and the aiming vector to determine if there is an error in the aiming of the illumination device. The response to determining that there is an error in the aiming of the illumination device, the method further includes causing a controller associated with a driving means of the illumination device for correcting the error in the aiming of the illumination device. | 1. A method for providing assistance in aiming of one or more illumination devices in an area comprising, by a processor:
receiving photometric data for an area that comprises an illumination device, wherein the photometric data comprises a measure of at least one light characteristic corresponding to light received from the illumination device at one or more reference points in the area; using the photometric data to determine, for the illumination device, an aiming vector corresponding to the photometric data; receiving, from an orientation sensor module of the illumination device, current orientation data for the illumination device; using the current orientation data and the aiming vector to determine if there is an error in aiming of the illumination device; and in response to determining that there is an error in the aiming of the illumination device, causing a controller associated with a driving means of the illumination device for correcting the error in the aiming of the illumination device, wherein the photometric data comprises a desired measure of at least one light characteristic corresponding to light received from the illumination device at one or more reference points in the area when the illumination device is oriented in accordance with the aiming vector. 2. The method of claim 1, further comprising in response to making the determination that there is an error in the aiming of the illumination device, generating an error message at a user interface of an electronic device. 3. The method of claim 2, wherein the generated error message also comprises an identifier corresponding to the illumination device. 4. The method of claim 1, wherein the orientation data comprises one or more of the following: orientation vectors, a linear acceleration, a yaw, a pitch, or a roll of the illumination device. 5. The method of claim 1, wherein the driving means control one or more connectors configured to attach the illumination device to a support structure. 6. The method of claim 1, wherein the orientation sensor module comprises one or more of the following: an accelerometer, a gyroscope, an altimeter, or a magnetometer. 7. The method of claim 1, wherein using the current orientation data and the aiming vector to determine if there is an error in the aiming of the illumination device comprises determining whether there is a threshold difference between the current orientation of the illumination device and a desired orientation of the illumination device, wherein the desired orientation corresponds to the aiming vector. 8. The method of claim 1, further comprising, in response to determining that there is an error in an aiming of the illumination device, determining a rate of change of orientation of the illumination device, wherein the rate of change of orientation is indicative of an event that resulted in the error in the aiming of the illumination device. 9. The method of claim 8, wherein the event is selected from at least one of the following:
an earthquake, wind, tampering, or collision with an object. 10. The method of claim 1, further comprising receiving a request for assistance in aiming of the illumination device via an electronic device of a user. 11. The method of claim 1, further comprising receiving a request for assistance in aiming of the illumination device from one or more sensors in the area, wherein the one or more sensors in the area may transmit the request upon determining that one or more characteristics of light provided by the illumination device and received by the one or more sensors. 12. A lighting control system, comprising:
an illumination device comprising one or more orientation sensors; a processor; and a non-transitory computer-readable medium containing programming instructions that, when executed, will cause the processor to:
receive photometric data for an area, wherein the photometric data comprises a measure of at least one light characteristic corresponding to light received from the illumination device at one or more reference points in the area;
use the photometric data to determine, for the illumination device, an aiming vector corresponding to the photometric data;
receive, from the one or more orientation sensors of the illumination device, current orientation data for the illumination device;
use the current orientation data and the aiming vector to determine if there is an error in the aiming of the illumination device;
in response to determining that there is an error in the aiming of the illumination device, cause a controller associated with a driving means of the illumination device for correcting the error in the aiming of the illumination device, and
wherein the photometric data comprises a desired measure of at least one light characteristic corresponding to light received from the illumination device at one or more reference points in the area when the illumination device is oriented in accordance with the aiming vector. 13. The system of claim 12, further comprising programming instructions that, when executed, will cause the processor to, in response to making the determination that there is an error in the aiming of the illumination device, generate an error message at a user interface of an electronic device. 14. The system of claim 13, wherein the generated error message also comprises an identifier corresponding to the illumination device. 15. The system of claim 12, wherein the orientation data comprises one or more of the following: orientation vectors, a linear acceleration, a yaw, a pitch, or a roll of the illumination device. 16. The system of claim 12, wherein the one or more orientation sensors comprise one or more of the following: an accelerometer, a gyroscope, an altimeter, a global positioning system (GPS) or a magnetometer. 17. The system of claim 12, wherein the programming instructions that, when executed, will cause the processor to use the current orientation data and the aiming vector to determine if there is an error in the aiming of the illumination device comprise programming instructions to determine whether there is a threshold difference between a current orientation of the illumination device and a desired orientation of the illumination device, wherein the desired orientation corresponds to the aiming vector. 18. The system of claim 12, further comprising programming instructions that, when executed, will cause the processor to determine a rate of change of orientation of the illumination device, wherein the rate of change of orientation is indicative of an event that resulted in the error in the aiming of the illumination device. 19. The system of claim 18, wherein the event is selected from at least one of the following: an earthquake, wind, tampering, or collision with an object. 20. The system of claim 12, further comprising programming instructions that, when executed, will cause the processor to, receive a request for assistance in aiming of the illumination device via an electronic device of a user. 21. The system of claim 12, further comprising programming instructions that, when executed, will cause the processor to, receive a request for assistance in aiming of the illumination device one or more sensors in the area, wherein the one or more sensors may transmit the request upon determining that one or more characteristics of light provided by the illumination device and received by one or more sensors is outside a desired range. 22. The system of claim 12, further comprising programming instructions that, when executed, will cause the processor to provide a control signal to a controller associated with a motor for correcting the error in the aiming of the illumination device, wherein the motor is configured to control orientation of the illumination device or a light emitting diode (LED) module included in the illumination device. 23. The system of claim 12, wherein the driving means control one or more connectors configured to attach the illumination device to a support structure. 24. The system of claim 12, wherein the at least one light characteristic comprises at least one of the following: intensity of light, amount of light, color of light, or flux of light. | A method for providing assistance in aiming of one or more illumination devices in an area may include, by a processor, receiving photometric data for an area, and using the photometric data to determine an aiming vector for the illumination device. The area may include the illumination device. the method may further include receiving, from an orientation sensor module of the illumination device, orientation data for the illumination device, and using the orientation data and the aiming vector to determine if there is an error in the aiming of the illumination device. The response to determining that there is an error in the aiming of the illumination device, the method further includes causing a controller associated with a driving means of the illumination device for correcting the error in the aiming of the illumination device.1. A method for providing assistance in aiming of one or more illumination devices in an area comprising, by a processor:
receiving photometric data for an area that comprises an illumination device, wherein the photometric data comprises a measure of at least one light characteristic corresponding to light received from the illumination device at one or more reference points in the area; using the photometric data to determine, for the illumination device, an aiming vector corresponding to the photometric data; receiving, from an orientation sensor module of the illumination device, current orientation data for the illumination device; using the current orientation data and the aiming vector to determine if there is an error in aiming of the illumination device; and in response to determining that there is an error in the aiming of the illumination device, causing a controller associated with a driving means of the illumination device for correcting the error in the aiming of the illumination device, wherein the photometric data comprises a desired measure of at least one light characteristic corresponding to light received from the illumination device at one or more reference points in the area when the illumination device is oriented in accordance with the aiming vector. 2. The method of claim 1, further comprising in response to making the determination that there is an error in the aiming of the illumination device, generating an error message at a user interface of an electronic device. 3. The method of claim 2, wherein the generated error message also comprises an identifier corresponding to the illumination device. 4. The method of claim 1, wherein the orientation data comprises one or more of the following: orientation vectors, a linear acceleration, a yaw, a pitch, or a roll of the illumination device. 5. The method of claim 1, wherein the driving means control one or more connectors configured to attach the illumination device to a support structure. 6. The method of claim 1, wherein the orientation sensor module comprises one or more of the following: an accelerometer, a gyroscope, an altimeter, or a magnetometer. 7. The method of claim 1, wherein using the current orientation data and the aiming vector to determine if there is an error in the aiming of the illumination device comprises determining whether there is a threshold difference between the current orientation of the illumination device and a desired orientation of the illumination device, wherein the desired orientation corresponds to the aiming vector. 8. The method of claim 1, further comprising, in response to determining that there is an error in an aiming of the illumination device, determining a rate of change of orientation of the illumination device, wherein the rate of change of orientation is indicative of an event that resulted in the error in the aiming of the illumination device. 9. The method of claim 8, wherein the event is selected from at least one of the following:
an earthquake, wind, tampering, or collision with an object. 10. The method of claim 1, further comprising receiving a request for assistance in aiming of the illumination device via an electronic device of a user. 11. The method of claim 1, further comprising receiving a request for assistance in aiming of the illumination device from one or more sensors in the area, wherein the one or more sensors in the area may transmit the request upon determining that one or more characteristics of light provided by the illumination device and received by the one or more sensors. 12. A lighting control system, comprising:
an illumination device comprising one or more orientation sensors; a processor; and a non-transitory computer-readable medium containing programming instructions that, when executed, will cause the processor to:
receive photometric data for an area, wherein the photometric data comprises a measure of at least one light characteristic corresponding to light received from the illumination device at one or more reference points in the area;
use the photometric data to determine, for the illumination device, an aiming vector corresponding to the photometric data;
receive, from the one or more orientation sensors of the illumination device, current orientation data for the illumination device;
use the current orientation data and the aiming vector to determine if there is an error in the aiming of the illumination device;
in response to determining that there is an error in the aiming of the illumination device, cause a controller associated with a driving means of the illumination device for correcting the error in the aiming of the illumination device, and
wherein the photometric data comprises a desired measure of at least one light characteristic corresponding to light received from the illumination device at one or more reference points in the area when the illumination device is oriented in accordance with the aiming vector. 13. The system of claim 12, further comprising programming instructions that, when executed, will cause the processor to, in response to making the determination that there is an error in the aiming of the illumination device, generate an error message at a user interface of an electronic device. 14. The system of claim 13, wherein the generated error message also comprises an identifier corresponding to the illumination device. 15. The system of claim 12, wherein the orientation data comprises one or more of the following: orientation vectors, a linear acceleration, a yaw, a pitch, or a roll of the illumination device. 16. The system of claim 12, wherein the one or more orientation sensors comprise one or more of the following: an accelerometer, a gyroscope, an altimeter, a global positioning system (GPS) or a magnetometer. 17. The system of claim 12, wherein the programming instructions that, when executed, will cause the processor to use the current orientation data and the aiming vector to determine if there is an error in the aiming of the illumination device comprise programming instructions to determine whether there is a threshold difference between a current orientation of the illumination device and a desired orientation of the illumination device, wherein the desired orientation corresponds to the aiming vector. 18. The system of claim 12, further comprising programming instructions that, when executed, will cause the processor to determine a rate of change of orientation of the illumination device, wherein the rate of change of orientation is indicative of an event that resulted in the error in the aiming of the illumination device. 19. The system of claim 18, wherein the event is selected from at least one of the following: an earthquake, wind, tampering, or collision with an object. 20. The system of claim 12, further comprising programming instructions that, when executed, will cause the processor to, receive a request for assistance in aiming of the illumination device via an electronic device of a user. 21. The system of claim 12, further comprising programming instructions that, when executed, will cause the processor to, receive a request for assistance in aiming of the illumination device one or more sensors in the area, wherein the one or more sensors may transmit the request upon determining that one or more characteristics of light provided by the illumination device and received by one or more sensors is outside a desired range. 22. The system of claim 12, further comprising programming instructions that, when executed, will cause the processor to provide a control signal to a controller associated with a motor for correcting the error in the aiming of the illumination device, wherein the motor is configured to control orientation of the illumination device or a light emitting diode (LED) module included in the illumination device. 23. The system of claim 12, wherein the driving means control one or more connectors configured to attach the illumination device to a support structure. 24. The system of claim 12, wherein the at least one light characteristic comprises at least one of the following: intensity of light, amount of light, color of light, or flux of light. | 2,800 |
12,090 | 12,090 | 15,215,673 | 2,834 | Brushed electric motor ( 10 ), comprising an outer case ( 11 ), two brushes and further a rotor ( 30 ) having a first inner end ( 31 ) and a second outer end ( 32 ) which is inserted within the outer case ( 11 ).
The brushed electric motor ( 10 ) is in particular usable in environments with a risk of fire or explosion or in presence of potentially explosive or flammable fluids, and comprises at least a filler element ( 20 ) made with a polymer based material which is positioned internally to the outer case ( 11 ) of said brushed electric motor ( 10 ) for minimize the free volume within the brushed electric motor ( 10 ) itself and for allow at the same time to maintain a high power and high performance characteristics of the brushed electric motor ( 10 ), by minimizing the possibility of triggering a burst or fire. | 1. Brushed electric motor (10) comprising an outer case (11), two brushes and also a rotor (30) having a first inner end (31) and a second outer end (32) which is inserted within said outer case (11), said brushed electric motor (10) is in particular usable in environments with risk of fire or explosion or in presence of potentially explosive or flammable fluids, characterized by comprising at least one filler element (20) made with a polymer based material which is positioned internally to said outer case (11) of said brushed electric motor (10), for minimize the free volume within said brushed electric motor (10) and for allow at the same time to maintain a high power and high performance characteristics of said brushed electric motor (10), so minimizing the possibility of trigger of a burst or fire. 2. Brushed electric motor (10) according to claim 1, characterized in that it comprises a printed circuit board (40) which is inserted internally to said outer case (11), and wherein said at least one filler element (20) comprises a housing (25) for said printed circuit board (40) for prevent short circuits due to dusts produced by said two brushes. 3. Brushed electric motor (10) according to claim 2, characterized in that it comprises two brush holders (41) which are preferably mounted on said printed circuit board (40) and in particular which are integrated with said printed circuit board (40), and wherein said housing (25) for said printed circuit board (40) comprises two housings for enclose said two brush holders (41) and for at least partially enclose said two brushes for prevent the passage of conductive dusts in particular produced by rubbing of said two brushes on said first inner end (31) of said rotor (30). 4. Brushed electric motor (10) according to claim 2, characterized by comprising an electric noise suppression device (50), which in particular a high pass filter preferably of the passive type, which is inserted internally to said outer case (11), and preferably also said electric noise suppression device (50) is connected to said two brushes of said brushed electric motor (10) for attenuate frequencies higher than the frequency of the electric network and in particular frequencies between 150 kHz and 30 MHz, for attenuate electromagnetic interferences and for obtain an electromagnetic compatibility of said brushed electric motor (10). 5. Brushed electric motor (10) according to claim 1, characterized in that said electric noise suppression device (50), and in particular said high pass filter, is mounted on said printed circuit board (40), and wherein said at least one filler element (20) comprises a second housing for said electric noise suppression device (50). 6. Brushed electric motor (10) according to claim 2, characterized in that said housing (25) reproduces as a negative the shape of said board of said printed circuit board (40), in particular said housing (25) comprises a plurality of further housings for at least one part of the electronic or electric components protruding from said printed circuit board (40) of which said printed circuit board (40) is provided, and in particular for each electronic or electric component of said printed circuit board (40) and preferably also of said electric noise suppression device (50) which is preferably mounted on or integrated with said printed circuit board (40). 7. Brushed electric motor (10) according to claim 2, characterized in that said printed circuit board (40) comprises a central through hole, within which a first inner end (31) of said rotor (30) is preferably inserted, said two brushes is are mounted on said printed circuit board (40) and also said two brushes include corresponding ends which protrude inside said through hole and are preferably diametrically opposed one to another with respect to said central through hole. 8. Brushed electric motor (10) according to claim 1, characterized in that said at least one filler element (20) is made of a plurality of filler elements (20), in particular a first filler element (20A) and a second filler element (20B), which are made with a polymeric material for attenuate the noise emissions of said brushed electric motor (10). 9. Brushed electric motor (10) according to claim 8, characterized in that in said first filler element (20A) is made said first housing for a first face of said printed circuit board (40), and also said second filler element (20B) comprises a second housing for a second face of said printed circuit board (40), for completely enclose said electric circuit and at least a part of the components of said printed circuit board (40). 10. Brushed electric motor (10) according to claim 2, characterized in that said at least one filler element (20) comprises a third filler element (20C) which comprises a through hole (22) substantially central within which said second outer end (32) of said rotor (30) is inserted, in particular said third filler element (20C) comprises an annular gasket (23) for prevent the entry of water or fluids within a portion of said brushed electric motor (10) in which said printed circuit board (40) is housed, and preferably said annular gasket (23) is made integral or made in a single piece with said third filler element (20C) and in particular the same is made integral or made in a single piece with said through hole (22) of the same. 11. Brushed electric motor (10) according to claim 10, characterized in that said third filler element (20C) comprises a groove which is coupled with an end of said outer case (11) and defines an inner substantially waterproof and watertight chamber, for further prevent the passage of water or fluids within a portion of said brushed electric motor (10) in which said printed circuit board (40) is housed, and also in particular said first filler element (20A) and said third filler element (20C) are positioned in opposite longitudinal portions with respect to said rotor (30) and also said first filler element (20A) and said third filler element (20C) comprise respective peripheral longitudinal portions for a connection between them and for prevent a contact with said rotor (30) and for maintain a correct mutual position and also advantageously for better absorb vibrations during the operation of said brushed electric motor (10). 12. Brushed electric motor (10) according to claim 1, characterized in that said polymeric based material is a polyamide based material, preferably nylon and in particular nylon 66. 13. Brushed electric motor (10) according to claim 1, characterized in that it is a brushed electric motor (10) for the handling of fluids in particular of liquids, and also preferably said brushed electric motor (10) is usable for pumping a coolant fluid or a combustion fluid, in particular chosen between a coolant fluid for refrigerators or heat pumps, a liquid or gaseous hydrocarbon, which are affected by the problem of a ignition of combustion or burst in the presence of electrical discharges or sparks, and in particular said at least one filler element (20) is used to reduce the free volume within said brushed electric motor (10) below a predetermined volume, in particular less than 100 cm3, below which the probability of fire and/or explosion of a determined fluid is drastically reduced. 14. Brushed electric motor (10) according to claim 1, characterized in that said brushed electric motor (10) is a direct current electric motor (10) and comprises a plurality of permanent magnets inserted within said outer case (11). 15. A pump (80) for fluids, preferably of the membrane type, or rotary type with palettes for handling of liquids, in particular for coolant fluids or fuels, which comprises a brushed electric motor (10) according to claim 1, where in particular said pump (80) is preferably integrated with said brushed electric motor (10). | Brushed electric motor ( 10 ), comprising an outer case ( 11 ), two brushes and further a rotor ( 30 ) having a first inner end ( 31 ) and a second outer end ( 32 ) which is inserted within the outer case ( 11 ).
The brushed electric motor ( 10 ) is in particular usable in environments with a risk of fire or explosion or in presence of potentially explosive or flammable fluids, and comprises at least a filler element ( 20 ) made with a polymer based material which is positioned internally to the outer case ( 11 ) of said brushed electric motor ( 10 ) for minimize the free volume within the brushed electric motor ( 10 ) itself and for allow at the same time to maintain a high power and high performance characteristics of the brushed electric motor ( 10 ), by minimizing the possibility of triggering a burst or fire.1. Brushed electric motor (10) comprising an outer case (11), two brushes and also a rotor (30) having a first inner end (31) and a second outer end (32) which is inserted within said outer case (11), said brushed electric motor (10) is in particular usable in environments with risk of fire or explosion or in presence of potentially explosive or flammable fluids, characterized by comprising at least one filler element (20) made with a polymer based material which is positioned internally to said outer case (11) of said brushed electric motor (10), for minimize the free volume within said brushed electric motor (10) and for allow at the same time to maintain a high power and high performance characteristics of said brushed electric motor (10), so minimizing the possibility of trigger of a burst or fire. 2. Brushed electric motor (10) according to claim 1, characterized in that it comprises a printed circuit board (40) which is inserted internally to said outer case (11), and wherein said at least one filler element (20) comprises a housing (25) for said printed circuit board (40) for prevent short circuits due to dusts produced by said two brushes. 3. Brushed electric motor (10) according to claim 2, characterized in that it comprises two brush holders (41) which are preferably mounted on said printed circuit board (40) and in particular which are integrated with said printed circuit board (40), and wherein said housing (25) for said printed circuit board (40) comprises two housings for enclose said two brush holders (41) and for at least partially enclose said two brushes for prevent the passage of conductive dusts in particular produced by rubbing of said two brushes on said first inner end (31) of said rotor (30). 4. Brushed electric motor (10) according to claim 2, characterized by comprising an electric noise suppression device (50), which in particular a high pass filter preferably of the passive type, which is inserted internally to said outer case (11), and preferably also said electric noise suppression device (50) is connected to said two brushes of said brushed electric motor (10) for attenuate frequencies higher than the frequency of the electric network and in particular frequencies between 150 kHz and 30 MHz, for attenuate electromagnetic interferences and for obtain an electromagnetic compatibility of said brushed electric motor (10). 5. Brushed electric motor (10) according to claim 1, characterized in that said electric noise suppression device (50), and in particular said high pass filter, is mounted on said printed circuit board (40), and wherein said at least one filler element (20) comprises a second housing for said electric noise suppression device (50). 6. Brushed electric motor (10) according to claim 2, characterized in that said housing (25) reproduces as a negative the shape of said board of said printed circuit board (40), in particular said housing (25) comprises a plurality of further housings for at least one part of the electronic or electric components protruding from said printed circuit board (40) of which said printed circuit board (40) is provided, and in particular for each electronic or electric component of said printed circuit board (40) and preferably also of said electric noise suppression device (50) which is preferably mounted on or integrated with said printed circuit board (40). 7. Brushed electric motor (10) according to claim 2, characterized in that said printed circuit board (40) comprises a central through hole, within which a first inner end (31) of said rotor (30) is preferably inserted, said two brushes is are mounted on said printed circuit board (40) and also said two brushes include corresponding ends which protrude inside said through hole and are preferably diametrically opposed one to another with respect to said central through hole. 8. Brushed electric motor (10) according to claim 1, characterized in that said at least one filler element (20) is made of a plurality of filler elements (20), in particular a first filler element (20A) and a second filler element (20B), which are made with a polymeric material for attenuate the noise emissions of said brushed electric motor (10). 9. Brushed electric motor (10) according to claim 8, characterized in that in said first filler element (20A) is made said first housing for a first face of said printed circuit board (40), and also said second filler element (20B) comprises a second housing for a second face of said printed circuit board (40), for completely enclose said electric circuit and at least a part of the components of said printed circuit board (40). 10. Brushed electric motor (10) according to claim 2, characterized in that said at least one filler element (20) comprises a third filler element (20C) which comprises a through hole (22) substantially central within which said second outer end (32) of said rotor (30) is inserted, in particular said third filler element (20C) comprises an annular gasket (23) for prevent the entry of water or fluids within a portion of said brushed electric motor (10) in which said printed circuit board (40) is housed, and preferably said annular gasket (23) is made integral or made in a single piece with said third filler element (20C) and in particular the same is made integral or made in a single piece with said through hole (22) of the same. 11. Brushed electric motor (10) according to claim 10, characterized in that said third filler element (20C) comprises a groove which is coupled with an end of said outer case (11) and defines an inner substantially waterproof and watertight chamber, for further prevent the passage of water or fluids within a portion of said brushed electric motor (10) in which said printed circuit board (40) is housed, and also in particular said first filler element (20A) and said third filler element (20C) are positioned in opposite longitudinal portions with respect to said rotor (30) and also said first filler element (20A) and said third filler element (20C) comprise respective peripheral longitudinal portions for a connection between them and for prevent a contact with said rotor (30) and for maintain a correct mutual position and also advantageously for better absorb vibrations during the operation of said brushed electric motor (10). 12. Brushed electric motor (10) according to claim 1, characterized in that said polymeric based material is a polyamide based material, preferably nylon and in particular nylon 66. 13. Brushed electric motor (10) according to claim 1, characterized in that it is a brushed electric motor (10) for the handling of fluids in particular of liquids, and also preferably said brushed electric motor (10) is usable for pumping a coolant fluid or a combustion fluid, in particular chosen between a coolant fluid for refrigerators or heat pumps, a liquid or gaseous hydrocarbon, which are affected by the problem of a ignition of combustion or burst in the presence of electrical discharges or sparks, and in particular said at least one filler element (20) is used to reduce the free volume within said brushed electric motor (10) below a predetermined volume, in particular less than 100 cm3, below which the probability of fire and/or explosion of a determined fluid is drastically reduced. 14. Brushed electric motor (10) according to claim 1, characterized in that said brushed electric motor (10) is a direct current electric motor (10) and comprises a plurality of permanent magnets inserted within said outer case (11). 15. A pump (80) for fluids, preferably of the membrane type, or rotary type with palettes for handling of liquids, in particular for coolant fluids or fuels, which comprises a brushed electric motor (10) according to claim 1, where in particular said pump (80) is preferably integrated with said brushed electric motor (10). | 2,800 |
12,091 | 12,091 | 15,636,899 | 2,851 | A Battery Management System (BMS) for an electronic device with bidirectional communication between The BMS and an Operating System (OS) of the electronic device for generating a charging pattern of charging the battery of the electronic device according to information received from the operating system. | 1. A method of managing a battery of an electronic device, the method comprising:
obtaining first information of functional parameters of the battery; obtaining second information of at least one of an operational status of the electronic device and user activity; and generating a charging pattern to charge the battery based on the first information and the second information. 2. The method of claim 1, further comprising:
obtaining heuristic information related to at least one of previous functional parameters of the battery, a previous status of the electronic device, and previous user activity, wherein the generating comprises generating the charging pattern based on the heuristic information. 3. The method of claim 2, further comprising:
obtaining information of actual power management of the electronic device based on the charging pattern to be stored as the heuristic information. 4. The method of claim 1, wherein the generating comprises:
determining a period of time during which the battery is capable of supporting operation of the electronic device based on the first information and the second information; and generating the charging pattern based on the period of time. 5. The method of claim 4, further comprising:
notifying a user of a time to charge the battery of the electronic device based on the period of time. 6. The method of claim 1, wherein priorities are set amongst the first information and the second information, and
wherein the generating comprises generating the charging pattern based on the priorities for the first information and the second information. 7. The method of claim 1, wherein the charging pattern comprises at least one of a time, a period, a rate, an interval, and an extent for charging of the battery. 8. The method of claim 1, wherein the operational status of the electronic device includes at least one of a parameter pertaining to applications in the electronic device, ambience of the electronic device, and operational parameters of the electronic device, and
wherein the user activity comprises at least one of an actual time and a period of charging the battery, a time and a period of using the electronic device, and information inputted by the user through applications of the electronic device. 9. An electronic device comprising:
a memory configured to store computer-readable instructions; and a processor configured to execute the computer-readable instructions, which when executed cause the BMS to obtain information of functional parameters of a battery of an electronic device, obtain first information of at least one of an operational status of the electronic device and user activity, generate at least one charging pattern to charge the battery based on the first information and the second information. 10. The device of claim 9, wherein the processor is further configured to obtain heuristic information related to at least one of previous functional parameters of the battery, a previous status of the electronic device, and previous user activity, and generate the charging pattern based on the heuristic information. 11. The device of claim 10, wherein the processor is further configured to obtain information of actual power management of the electronic device based on the charging pattern to be stored as the heuristic information. 12. The device of claim 9, wherein the processor is further configured to determine a period of time during which the battery is capable of supporting operation of the electronic device based on the first information and the second information, and generate the charging pattern based on the period of time. 13. The device of claim 12, wherein the processor is further configured to control output of an indication of a time to charge the battery of the electronic device based on the period of time to a user of the electronic device. 14. The device of claim 9, wherein the processor is further configured to set priorities amongst the first information and the second information, and generate the charging pattern based on the priorities for the first information and the second information. 15. A non-transitory computer-readable medium having stored thereon computer-executable instructions that when executed by a processor of an electronic device cause the processor to perform a method of managing a battery of the electronic device, the method comprising:
obtaining first information of functional parameters of the battery; obtaining second information of at least one of an operational status of the electronic device and user activity; and generating a charging pattern to charge the battery based on the first information and the second information. 16. The non-transitory computer-readable medium of claim 15, wherein the method further comprises:
obtaining heuristic information related to at least one of previous functional parameters of the battery, a previous status of the electronic device, and previous user activity, wherein the generating comprises generating the charging pattern based on the heuristic information. 17. The non-transitory computer-readable medium of claim 15, wherein the method further comprises:
obtaining information of actual power management of the electronic device based on the charging pattern to be stored as the heuristic information. 18. The non-transitory computer-readable medium of claim 15, wherein the generating comprises:
determining a period of time during which the battery is capable of supporting operation of the electronic device based on the first information and the second information; and generating the charging pattern based on the period of time. 19. The non-transitory computer-readable medium of claim 18, further comprising:
notifying a user of a time to charge the battery of the electronic device based on the period of time. 20. The non-transitory computer-readable medium method of claim 15, wherein priorities are set amongst the first information and the second information, and
wherein the generating comprises generating the charging pattern based on the priorities for the first information and the second information. | A Battery Management System (BMS) for an electronic device with bidirectional communication between The BMS and an Operating System (OS) of the electronic device for generating a charging pattern of charging the battery of the electronic device according to information received from the operating system.1. A method of managing a battery of an electronic device, the method comprising:
obtaining first information of functional parameters of the battery; obtaining second information of at least one of an operational status of the electronic device and user activity; and generating a charging pattern to charge the battery based on the first information and the second information. 2. The method of claim 1, further comprising:
obtaining heuristic information related to at least one of previous functional parameters of the battery, a previous status of the electronic device, and previous user activity, wherein the generating comprises generating the charging pattern based on the heuristic information. 3. The method of claim 2, further comprising:
obtaining information of actual power management of the electronic device based on the charging pattern to be stored as the heuristic information. 4. The method of claim 1, wherein the generating comprises:
determining a period of time during which the battery is capable of supporting operation of the electronic device based on the first information and the second information; and generating the charging pattern based on the period of time. 5. The method of claim 4, further comprising:
notifying a user of a time to charge the battery of the electronic device based on the period of time. 6. The method of claim 1, wherein priorities are set amongst the first information and the second information, and
wherein the generating comprises generating the charging pattern based on the priorities for the first information and the second information. 7. The method of claim 1, wherein the charging pattern comprises at least one of a time, a period, a rate, an interval, and an extent for charging of the battery. 8. The method of claim 1, wherein the operational status of the electronic device includes at least one of a parameter pertaining to applications in the electronic device, ambience of the electronic device, and operational parameters of the electronic device, and
wherein the user activity comprises at least one of an actual time and a period of charging the battery, a time and a period of using the electronic device, and information inputted by the user through applications of the electronic device. 9. An electronic device comprising:
a memory configured to store computer-readable instructions; and a processor configured to execute the computer-readable instructions, which when executed cause the BMS to obtain information of functional parameters of a battery of an electronic device, obtain first information of at least one of an operational status of the electronic device and user activity, generate at least one charging pattern to charge the battery based on the first information and the second information. 10. The device of claim 9, wherein the processor is further configured to obtain heuristic information related to at least one of previous functional parameters of the battery, a previous status of the electronic device, and previous user activity, and generate the charging pattern based on the heuristic information. 11. The device of claim 10, wherein the processor is further configured to obtain information of actual power management of the electronic device based on the charging pattern to be stored as the heuristic information. 12. The device of claim 9, wherein the processor is further configured to determine a period of time during which the battery is capable of supporting operation of the electronic device based on the first information and the second information, and generate the charging pattern based on the period of time. 13. The device of claim 12, wherein the processor is further configured to control output of an indication of a time to charge the battery of the electronic device based on the period of time to a user of the electronic device. 14. The device of claim 9, wherein the processor is further configured to set priorities amongst the first information and the second information, and generate the charging pattern based on the priorities for the first information and the second information. 15. A non-transitory computer-readable medium having stored thereon computer-executable instructions that when executed by a processor of an electronic device cause the processor to perform a method of managing a battery of the electronic device, the method comprising:
obtaining first information of functional parameters of the battery; obtaining second information of at least one of an operational status of the electronic device and user activity; and generating a charging pattern to charge the battery based on the first information and the second information. 16. The non-transitory computer-readable medium of claim 15, wherein the method further comprises:
obtaining heuristic information related to at least one of previous functional parameters of the battery, a previous status of the electronic device, and previous user activity, wherein the generating comprises generating the charging pattern based on the heuristic information. 17. The non-transitory computer-readable medium of claim 15, wherein the method further comprises:
obtaining information of actual power management of the electronic device based on the charging pattern to be stored as the heuristic information. 18. The non-transitory computer-readable medium of claim 15, wherein the generating comprises:
determining a period of time during which the battery is capable of supporting operation of the electronic device based on the first information and the second information; and generating the charging pattern based on the period of time. 19. The non-transitory computer-readable medium of claim 18, further comprising:
notifying a user of a time to charge the battery of the electronic device based on the period of time. 20. The non-transitory computer-readable medium method of claim 15, wherein priorities are set amongst the first information and the second information, and
wherein the generating comprises generating the charging pattern based on the priorities for the first information and the second information. | 2,800 |
12,092 | 12,092 | 15,968,209 | 2,838 | A system and method of controlling a power converter that includes at least one first switch of a first switch type and at least one second switch of a second switch type, includes converting, by the power converter, an input power at a converter input into output power at a converter output for a load. Converting the input power into the output power includes turning on, by a controller, the at least one first switch to conduct current from the converter input to the converter output; and turning on, by the controller, the at least one second switch to conduct current from the converter input to the converter output after a first threshold time period following turn-on of the at least one first switch. | 1. A method of controlling a power converter that includes at least one first switch of a first switch type, wherein the first switch type is a low gate charge field effect transistor, and at least one second switch of a second switch type, where in the second switch type is a low on-resistance field effect transistor, the method comprising:
converting, by the power converter, an input power at a converter input into output power at a converter output for a load, wherein converting the input power into the output power comprises:
turning on, by a controller, the at least one first switch to conduct current from the converter input to the converter output; and
turning on, by the controller, the at least one second switch to conduct current from the converter input to the converter output after a first threshold time period following turn-on of the at least one first switch. 2. The method of claim 1, wherein converting, by the power converter, the input power to the output power further comprises:
turning off, by the controller, the at least one second switch; and turning off, by the controller, the at least one first switch to terminate current flow from the converter input to the converter output after a second threshold time period following turn-off of the at least one second switch. 3. (canceled) 4. (canceled) 5. The method of claim 1, wherein the first threshold time period comprises an expected time for which the low gate charge field effect transistor will transition from off to substantially or fully conducting. 6. The method of claim 2, wherein the second threshold time period comprises an expected time for which the low on-resistance field effect transistor will transition from fully conducting to off. 7. The method of claim 1, wherein the at least one first switch comprises a plurality of first switches, and wherein the at least one second switch comprises a plurality of second switches each connected in parallel with the plurality of first switches, and wherein converting the input power into the output power further comprises:
turning on, by the controller, each of the plurality of first switches to conduct the current from the converter input to the converter output; and turning on, by the controller, each of the plurality of second switches to conduct current from the converter input to the converter output after the first threshold time period following turn-on of each of the plurality of first switches. 8. The method of claim 7, wherein turning on, by the controller, each of the plurality of first switches comprises providing a common gate drive signal to each of the plurality of first switches. 9. The method of claim 7, wherein turning on, by the controller, each of the plurality of second switches comprises providing a common gate drive signal to each of the plurality of second switches. 10. A method of controlling power from an input power to a load, the method comprising:
turning on, by a controller, one or more first switches to conduct current from the input power to the load, wherein each of the one or more first switches are of a first switch type and the first switch type is a low gate charge field effect transistor; and turning on, by the controller, one or more second switches, connected in parallel with the one or more first switches, to conduct current from the input power to the load after a first threshold time period following turn-on of the one or more first switches, wherein each of the one or more second switches are of a second switch type different from the first switch type and the second switch type is a low on-resistance field effect transistor. 11. The method of claim 10, further comprising:
turning off, by the controller, the one or more second switches; and turning off, by the controller, the one or more first switches to terminate current flow from the input power to the load after a second threshold time period following turn-off of the one or more second switches. 12. (canceled) 13. (canceled) 14. The method of claim 10, wherein the first threshold time period comprises an expected time for which the low gate charge field effect transistor will transition from off to substantially or fully conducting. 15. The method of claim 14, wherein the second threshold time period comprises an expected time for which the low on-resistance field effect transistor will transition from fully conducting to off. 16. The method of claim 10, wherein the one or more first switches comprise a plurality of first switches, and wherein the one or more second switches comprise a plurality of second switches each connected in parallel with the plurality of first switches, and wherein turning on, by the controller, the one or more first switches to conduct the current from the input power to the load comprises turning on, by the controller, each of the plurality of first switches to conduct the current from the input power to the load, and wherein turning on, by the controller, the one or more second switches to conduct current from the input power to the load comprises turning on, by the controller, each of the plurality of second switches to conduct current from the input power to the load after the first threshold time period. 17. The method of claim 16, wherein turning on, by the controller, each of the plurality of first switches comprises providing a common gate drive signal to each of the plurality of first switches. 18. The method of claim 16, wherein turning on, by the controller, each of the plurality of second switches comprises providing a common gate drive signal to each of the plurality of second switches. 19. A power converter system configured to convert an input power into an output power for a load, the system comprising:
at least one low gate charge switch; at least one low on-resistance switch connected in parallel with the at least one low gate charge switch; and a controller configured to turn the at least one low gate charge switch and the at least one low on-resistance switch on and off to convert the input power to the output power, wherein the controller is configured to turn on the at least one low gate charge switch and the at least one low on-resistance switch by turning on the at least one low gate charge switch, waiting a first threshold time period, and then turning on the at least one low on-resistance switch. 20. The power converter system of claim 19, wherein the controller is configured to turn off the at least one low gate charge switch and the at least one low on-resistance switch by turning off the at least one low on-resistance switch, waiting a second threshold time period, and then turning off the at least one low gate charge switch. 21. The method of claim 7, wherein converting the input power into the output power further comprises:
turning off, by the controller, each of the plurality of second switches; and turning off, by the controller, each of the plurality of first switches to terminate current flow from the converter input to the converter output after a second threshold time period following turn-off of each of the plurality of first switches. | A system and method of controlling a power converter that includes at least one first switch of a first switch type and at least one second switch of a second switch type, includes converting, by the power converter, an input power at a converter input into output power at a converter output for a load. Converting the input power into the output power includes turning on, by a controller, the at least one first switch to conduct current from the converter input to the converter output; and turning on, by the controller, the at least one second switch to conduct current from the converter input to the converter output after a first threshold time period following turn-on of the at least one first switch.1. A method of controlling a power converter that includes at least one first switch of a first switch type, wherein the first switch type is a low gate charge field effect transistor, and at least one second switch of a second switch type, where in the second switch type is a low on-resistance field effect transistor, the method comprising:
converting, by the power converter, an input power at a converter input into output power at a converter output for a load, wherein converting the input power into the output power comprises:
turning on, by a controller, the at least one first switch to conduct current from the converter input to the converter output; and
turning on, by the controller, the at least one second switch to conduct current from the converter input to the converter output after a first threshold time period following turn-on of the at least one first switch. 2. The method of claim 1, wherein converting, by the power converter, the input power to the output power further comprises:
turning off, by the controller, the at least one second switch; and turning off, by the controller, the at least one first switch to terminate current flow from the converter input to the converter output after a second threshold time period following turn-off of the at least one second switch. 3. (canceled) 4. (canceled) 5. The method of claim 1, wherein the first threshold time period comprises an expected time for which the low gate charge field effect transistor will transition from off to substantially or fully conducting. 6. The method of claim 2, wherein the second threshold time period comprises an expected time for which the low on-resistance field effect transistor will transition from fully conducting to off. 7. The method of claim 1, wherein the at least one first switch comprises a plurality of first switches, and wherein the at least one second switch comprises a plurality of second switches each connected in parallel with the plurality of first switches, and wherein converting the input power into the output power further comprises:
turning on, by the controller, each of the plurality of first switches to conduct the current from the converter input to the converter output; and turning on, by the controller, each of the plurality of second switches to conduct current from the converter input to the converter output after the first threshold time period following turn-on of each of the plurality of first switches. 8. The method of claim 7, wherein turning on, by the controller, each of the plurality of first switches comprises providing a common gate drive signal to each of the plurality of first switches. 9. The method of claim 7, wherein turning on, by the controller, each of the plurality of second switches comprises providing a common gate drive signal to each of the plurality of second switches. 10. A method of controlling power from an input power to a load, the method comprising:
turning on, by a controller, one or more first switches to conduct current from the input power to the load, wherein each of the one or more first switches are of a first switch type and the first switch type is a low gate charge field effect transistor; and turning on, by the controller, one or more second switches, connected in parallel with the one or more first switches, to conduct current from the input power to the load after a first threshold time period following turn-on of the one or more first switches, wherein each of the one or more second switches are of a second switch type different from the first switch type and the second switch type is a low on-resistance field effect transistor. 11. The method of claim 10, further comprising:
turning off, by the controller, the one or more second switches; and turning off, by the controller, the one or more first switches to terminate current flow from the input power to the load after a second threshold time period following turn-off of the one or more second switches. 12. (canceled) 13. (canceled) 14. The method of claim 10, wherein the first threshold time period comprises an expected time for which the low gate charge field effect transistor will transition from off to substantially or fully conducting. 15. The method of claim 14, wherein the second threshold time period comprises an expected time for which the low on-resistance field effect transistor will transition from fully conducting to off. 16. The method of claim 10, wherein the one or more first switches comprise a plurality of first switches, and wherein the one or more second switches comprise a plurality of second switches each connected in parallel with the plurality of first switches, and wherein turning on, by the controller, the one or more first switches to conduct the current from the input power to the load comprises turning on, by the controller, each of the plurality of first switches to conduct the current from the input power to the load, and wherein turning on, by the controller, the one or more second switches to conduct current from the input power to the load comprises turning on, by the controller, each of the plurality of second switches to conduct current from the input power to the load after the first threshold time period. 17. The method of claim 16, wherein turning on, by the controller, each of the plurality of first switches comprises providing a common gate drive signal to each of the plurality of first switches. 18. The method of claim 16, wherein turning on, by the controller, each of the plurality of second switches comprises providing a common gate drive signal to each of the plurality of second switches. 19. A power converter system configured to convert an input power into an output power for a load, the system comprising:
at least one low gate charge switch; at least one low on-resistance switch connected in parallel with the at least one low gate charge switch; and a controller configured to turn the at least one low gate charge switch and the at least one low on-resistance switch on and off to convert the input power to the output power, wherein the controller is configured to turn on the at least one low gate charge switch and the at least one low on-resistance switch by turning on the at least one low gate charge switch, waiting a first threshold time period, and then turning on the at least one low on-resistance switch. 20. The power converter system of claim 19, wherein the controller is configured to turn off the at least one low gate charge switch and the at least one low on-resistance switch by turning off the at least one low on-resistance switch, waiting a second threshold time period, and then turning off the at least one low gate charge switch. 21. The method of claim 7, wherein converting the input power into the output power further comprises:
turning off, by the controller, each of the plurality of second switches; and turning off, by the controller, each of the plurality of first switches to terminate current flow from the converter input to the converter output after a second threshold time period following turn-off of each of the plurality of first switches. | 2,800 |
12,093 | 12,093 | 15,443,690 | 2,831 | A coaxial connector in combination with a coaxial cable is provided with an inner conductor supported coaxial within an outer conductor, a polymer jacket surrounding the outer conductor. A unitary connector body with a bore is provided with an overbody surrounding an outer diameter of the connector body. The outer conductor is inserted within the bore. A molecular bond is formed between the outer conductor and the connector body and between the jacket and the overbody. An inner conductor end cap may also be provided coupled to the end of the inner conductor via a molecular bond. | 1. A coaxial connector-cable assembly, comprising:
a coaxial cable including an inner conductor, an outer conductor surrounding the inner conductor, and a dielectric material separating the inner conductor from the outer conductor, each of the inner and outer conductors having an end portion; a coaxial connector including an inner contact in electrical connection with the inner conductor of the cable and connector body, the connector body having a bore with an inner diameter; wherein a welded seam is located between the end portion of the outer conductor of the cable and the inner diameter of the bore of the connector body. 2. The assembly defined in claim 1 wherein the seam is located along an electrical interconnection between the outer conductor of the cable and the connector body. 3. The assembly defined in claim 1, wherein the seam directly contacts the end portion of the outer conductor. 4. The assembly defined in claim 1, wherein the seam directly contacts the inner diameter of the bore of the connector body. 5. The assembly defined in claim 1, wherein the seam is created by a laser beam that is oriented generally parallel with the inner and outer conductors of the cable. 6. A coaxial connector for interconnection with a coaxial cable with a solid outer conductor, comprising:
a monolithic connector body with a bore; and an overbody of polymeric material on an outer diameter of the connector body; wherein the overbody is directly molded onto the connector body and extends from a cable end of the connector body. 7. The connector of claim 6, wherein the overbody includes an alignment cylinder of a connection interface at a connector end of the connector. 8. The connector of claim 6, wherein the overbody includes a plurality of longitudinal support ridges extending from an outer diameter of the overbody to less than an inner diameter of a coupling nut dimensioned to seat upon the support ridges. 9. The connector of claim 8, wherein the coupling nut is retained on the support ridges between a flange of the overbody and an outward extending retention spur proximate a cable end of at least one of the support ridges. 10. The connector of claim 6, wherein the inner diameter of the overbody extending from the cable end of the connector body is provided as a friction surface with an interference fit upon an outer diameter of a jacket of the coaxial cable. 11. The connector of claim 10, wherein the friction surface is provided as a series of spaced apart annular peaks of a contour pattern of the inner diameter of the overbody. | A coaxial connector in combination with a coaxial cable is provided with an inner conductor supported coaxial within an outer conductor, a polymer jacket surrounding the outer conductor. A unitary connector body with a bore is provided with an overbody surrounding an outer diameter of the connector body. The outer conductor is inserted within the bore. A molecular bond is formed between the outer conductor and the connector body and between the jacket and the overbody. An inner conductor end cap may also be provided coupled to the end of the inner conductor via a molecular bond.1. A coaxial connector-cable assembly, comprising:
a coaxial cable including an inner conductor, an outer conductor surrounding the inner conductor, and a dielectric material separating the inner conductor from the outer conductor, each of the inner and outer conductors having an end portion; a coaxial connector including an inner contact in electrical connection with the inner conductor of the cable and connector body, the connector body having a bore with an inner diameter; wherein a welded seam is located between the end portion of the outer conductor of the cable and the inner diameter of the bore of the connector body. 2. The assembly defined in claim 1 wherein the seam is located along an electrical interconnection between the outer conductor of the cable and the connector body. 3. The assembly defined in claim 1, wherein the seam directly contacts the end portion of the outer conductor. 4. The assembly defined in claim 1, wherein the seam directly contacts the inner diameter of the bore of the connector body. 5. The assembly defined in claim 1, wherein the seam is created by a laser beam that is oriented generally parallel with the inner and outer conductors of the cable. 6. A coaxial connector for interconnection with a coaxial cable with a solid outer conductor, comprising:
a monolithic connector body with a bore; and an overbody of polymeric material on an outer diameter of the connector body; wherein the overbody is directly molded onto the connector body and extends from a cable end of the connector body. 7. The connector of claim 6, wherein the overbody includes an alignment cylinder of a connection interface at a connector end of the connector. 8. The connector of claim 6, wherein the overbody includes a plurality of longitudinal support ridges extending from an outer diameter of the overbody to less than an inner diameter of a coupling nut dimensioned to seat upon the support ridges. 9. The connector of claim 8, wherein the coupling nut is retained on the support ridges between a flange of the overbody and an outward extending retention spur proximate a cable end of at least one of the support ridges. 10. The connector of claim 6, wherein the inner diameter of the overbody extending from the cable end of the connector body is provided as a friction surface with an interference fit upon an outer diameter of a jacket of the coaxial cable. 11. The connector of claim 10, wherein the friction surface is provided as a series of spaced apart annular peaks of a contour pattern of the inner diameter of the overbody. | 2,800 |
12,094 | 12,094 | 15,415,306 | 2,855 | A method for testing a ceramic component for a fracture toughness includes changing the temperature of the component to a first temperature, for example, by heating the component, and changing the temperature of the component to a second temperature, for example, by cooling the component and testing the component for cracks. The temperature difference between the first temperature and the second temperature is determined based on a minimum fracture toughness. | 1. A method for testing a ceramic component for a fracture toughness, comprising:
changing the temperature of the component to a first temperature; and changing the temperature of the component to a second temperature; wherein a temperature difference between the first temperature and the second temperature is determined based on a minimum fracture toughness; and testing the component for cracks. 2. The method according to claim 1, wherein a value for the minimum fracture toughness is taken from a table. 3. The method according to claim 1, wherein the measured fracture toughness is at most +/−10% of a minimum required fracture toughness. 4. The method according to claim 1, wherein the fracture toughness is determined based on:
hf = 75000 Wm−2K−1
hf = 100000 Wm−2K−1
Bi
Ksurv
Kfrac
Bi
Ksurv
Kfrac
—
MPa m1/2
MPa m1/2
—
MPa m1/2
MPa m1/2
Set 1, D = 12.7 mm, HK10
22.0
5.3 ± 0.3
5.5 ± 0.3
29.3
5.7 ± 0.3
5.9 ± 0.3
Set 2, D = 5.55 mm, HK10
10.2
5.5 ± 0.3
5.9 ± 0.3
13.7
6.0 ± 0.3
6.4 ± 0.3
Set 3, D = 5.55 mm, HK7
10.6
5.7 ± 0.1
6.0 ± 0.2
14.2
6.2 ± 0.1
6.5 ± 0.2 5. The method according to claim 1, wherein testing the component for cracks comprises applying a black dye to the component. 6. The method according to claim 1, further comprising determining a fracture toughness of a test component that corresponds to the ceramic component in shape, size, and material. 7. A ceramic component, manufactured using the method according to claim 1. 8. The ceramic components according to claim 7, wherein the ceramic component comprises more than 50% by weight of the material Si3N4, SiAlON, SiC, Al2O3, ZrO2, or of their mixtures. 9. The ceramic components according to claim 7, wherein the ceramic component has a fracture toughness that is greater than or equal to 4 MPa√m. 10. The ceramic components according to claim 7, wherein the ceramic component has a roughness at least sectionally on its surface that is less than 15 μm. 11. The method according to claim 1, wherein changing the temperature of the component to the first temperature comprises heating the component and wherein changing the temperature of the component to the second temperature comprises cooling the component. 12. The method according to claim 1,
wherein the measured fracture toughness is at most +/−10% of a minimum required fracture toughness, wherein the fracture toughness is determined based on:
hf = 75000 Wm−2K−1
hf = 100000 Wm−2K−1
Bi
Ksurv
Kfrac
Bi
Ksurv
Kfrac
—
MPa m1/2
MPa m1/2
—
MPa m1/2
MPa m1/2
Set 1, D = 12.7 mm, HK10
22.0
5.3 ± 0.3
5.5 ± 0.3
29.3
5.7 ± 0.3
5.9 ± 0.3
Set 2, D = 5.55 mm, HK10
10.2
5.5 ± 0.3
5.9 ± 0.3
13.7
6.0 ± 0.3
6.4 ± 0.3
Set 3, D = 5.55 mm, HK7
10.6
5.7 ± 0.1
6.0 ± 0.2
14.2
6.2 ± 0.1
6.5 ± 0.2
and, wherein testing the component for cracks comprises applying a black dye to the component. | A method for testing a ceramic component for a fracture toughness includes changing the temperature of the component to a first temperature, for example, by heating the component, and changing the temperature of the component to a second temperature, for example, by cooling the component and testing the component for cracks. The temperature difference between the first temperature and the second temperature is determined based on a minimum fracture toughness.1. A method for testing a ceramic component for a fracture toughness, comprising:
changing the temperature of the component to a first temperature; and changing the temperature of the component to a second temperature; wherein a temperature difference between the first temperature and the second temperature is determined based on a minimum fracture toughness; and testing the component for cracks. 2. The method according to claim 1, wherein a value for the minimum fracture toughness is taken from a table. 3. The method according to claim 1, wherein the measured fracture toughness is at most +/−10% of a minimum required fracture toughness. 4. The method according to claim 1, wherein the fracture toughness is determined based on:
hf = 75000 Wm−2K−1
hf = 100000 Wm−2K−1
Bi
Ksurv
Kfrac
Bi
Ksurv
Kfrac
—
MPa m1/2
MPa m1/2
—
MPa m1/2
MPa m1/2
Set 1, D = 12.7 mm, HK10
22.0
5.3 ± 0.3
5.5 ± 0.3
29.3
5.7 ± 0.3
5.9 ± 0.3
Set 2, D = 5.55 mm, HK10
10.2
5.5 ± 0.3
5.9 ± 0.3
13.7
6.0 ± 0.3
6.4 ± 0.3
Set 3, D = 5.55 mm, HK7
10.6
5.7 ± 0.1
6.0 ± 0.2
14.2
6.2 ± 0.1
6.5 ± 0.2 5. The method according to claim 1, wherein testing the component for cracks comprises applying a black dye to the component. 6. The method according to claim 1, further comprising determining a fracture toughness of a test component that corresponds to the ceramic component in shape, size, and material. 7. A ceramic component, manufactured using the method according to claim 1. 8. The ceramic components according to claim 7, wherein the ceramic component comprises more than 50% by weight of the material Si3N4, SiAlON, SiC, Al2O3, ZrO2, or of their mixtures. 9. The ceramic components according to claim 7, wherein the ceramic component has a fracture toughness that is greater than or equal to 4 MPa√m. 10. The ceramic components according to claim 7, wherein the ceramic component has a roughness at least sectionally on its surface that is less than 15 μm. 11. The method according to claim 1, wherein changing the temperature of the component to the first temperature comprises heating the component and wherein changing the temperature of the component to the second temperature comprises cooling the component. 12. The method according to claim 1,
wherein the measured fracture toughness is at most +/−10% of a minimum required fracture toughness, wherein the fracture toughness is determined based on:
hf = 75000 Wm−2K−1
hf = 100000 Wm−2K−1
Bi
Ksurv
Kfrac
Bi
Ksurv
Kfrac
—
MPa m1/2
MPa m1/2
—
MPa m1/2
MPa m1/2
Set 1, D = 12.7 mm, HK10
22.0
5.3 ± 0.3
5.5 ± 0.3
29.3
5.7 ± 0.3
5.9 ± 0.3
Set 2, D = 5.55 mm, HK10
10.2
5.5 ± 0.3
5.9 ± 0.3
13.7
6.0 ± 0.3
6.4 ± 0.3
Set 3, D = 5.55 mm, HK7
10.6
5.7 ± 0.1
6.0 ± 0.2
14.2
6.2 ± 0.1
6.5 ± 0.2
and, wherein testing the component for cracks comprises applying a black dye to the component. | 2,800 |
12,095 | 12,095 | 13,970,340 | 2,859 | A non-contact power charging, in which power transmission can be interrupted when foreign materials are deposited on a charge plate of the non-contact power charging system. A charging operation can be continuously maintained at a stable voltage even if a non-contact power receiving apparatus moves by touching or displacement on the charge plate of the non-contact power charging system in the charging operation. Charging efficiency is improved. | 1. A non-contact power transmitting apparatus comprising:
a primary charge core which generates a magnetic field to wirelessly transmit a power signal to a power receiving apparatus; a received signal processing module which processes a signal transmitted from the power receiving apparatus and sends the processed signal to a central control unit, the signal including information on a received power of the power receiving apparatus; and a central control unit which interrupts or suspends charging operation of the non-contract power transmitting apparatus if a loss in the power signal is detected, due to changes of the magnetic field by a foreign substance. 2. The apparatus of claim 1, wherein the central control unit determines the loss based on the information on the received power. 3. The apparatus of claim 1, wherein the central control unit further interrupts or suspends the charging operation based on a temperature in the non-contract power transmitting apparatus. 4. The apparatus of claim 1, further comprising:
a display module which display a foreign substance error. 5. The apparatus of claim 1, wherein when the charging operation is interrupted or suspended, the non-contact power transmitting apparatus remains in a standby mode. 6. The apparatus of claim 5, wherein the non-contact power transmitting apparatus remains in a standby mode until a restarting signal is inputted from a user. 7. A method of controlling a non-contact power transmission apparatus, the method comprising:
generating a magnetic field to wirelessly transmit a power signal to a power receiving apparatus; processing a signal transmitted from the power receiving apparatus, the signal including information on a received power of the power receiving apparatus; and interrupting or suspending charging operation of the non-contact power transmission apparatus if a loss in the power signal is detected, due to changes of the magnetic field by a foreign substance. 8. The method of claim 7, further comprising:
determining the loss based on the information on received power. 9. The method of claim 7, wherein the charging operation is further interrupted or suspended based on a temperature in the non-contact power transmission apparatus. 10. The method of claim 7, further comprising:
displaying a foreign substance error. 11. The method of claim 7, wherein when the charging operation is interrupted or suspended, the non-contact power transmitting apparatus remains in a standby mode. 12. The method of claim 11, wherein the non-contact power transmitting apparatus remains in a standby mode until a restarting signal is inputted from a user. | A non-contact power charging, in which power transmission can be interrupted when foreign materials are deposited on a charge plate of the non-contact power charging system. A charging operation can be continuously maintained at a stable voltage even if a non-contact power receiving apparatus moves by touching or displacement on the charge plate of the non-contact power charging system in the charging operation. Charging efficiency is improved.1. A non-contact power transmitting apparatus comprising:
a primary charge core which generates a magnetic field to wirelessly transmit a power signal to a power receiving apparatus; a received signal processing module which processes a signal transmitted from the power receiving apparatus and sends the processed signal to a central control unit, the signal including information on a received power of the power receiving apparatus; and a central control unit which interrupts or suspends charging operation of the non-contract power transmitting apparatus if a loss in the power signal is detected, due to changes of the magnetic field by a foreign substance. 2. The apparatus of claim 1, wherein the central control unit determines the loss based on the information on the received power. 3. The apparatus of claim 1, wherein the central control unit further interrupts or suspends the charging operation based on a temperature in the non-contract power transmitting apparatus. 4. The apparatus of claim 1, further comprising:
a display module which display a foreign substance error. 5. The apparatus of claim 1, wherein when the charging operation is interrupted or suspended, the non-contact power transmitting apparatus remains in a standby mode. 6. The apparatus of claim 5, wherein the non-contact power transmitting apparatus remains in a standby mode until a restarting signal is inputted from a user. 7. A method of controlling a non-contact power transmission apparatus, the method comprising:
generating a magnetic field to wirelessly transmit a power signal to a power receiving apparatus; processing a signal transmitted from the power receiving apparatus, the signal including information on a received power of the power receiving apparatus; and interrupting or suspending charging operation of the non-contact power transmission apparatus if a loss in the power signal is detected, due to changes of the magnetic field by a foreign substance. 8. The method of claim 7, further comprising:
determining the loss based on the information on received power. 9. The method of claim 7, wherein the charging operation is further interrupted or suspended based on a temperature in the non-contact power transmission apparatus. 10. The method of claim 7, further comprising:
displaying a foreign substance error. 11. The method of claim 7, wherein when the charging operation is interrupted or suspended, the non-contact power transmitting apparatus remains in a standby mode. 12. The method of claim 11, wherein the non-contact power transmitting apparatus remains in a standby mode until a restarting signal is inputted from a user. | 2,800 |
12,096 | 12,096 | 16,299,305 | 2,835 | An apparatus includes an enclosure with a first data storage section, a second data storage section, a first cooling section positioned therebetween, and a second cooling section. The apparatus also includes an air-to-liquid heat exchanger positioned in the first cooling section and configured to cool air directed from the first data storage section towards the second data storage section and the second cooling section. | 1. An apparatus comprising:
an enclosure with a first data storage section, a second data storage section, a first cooling section positioned therebetween, and a second cooling section, the second cooling section including fan modules positioned therein; and an air-to-liquid heat exchanger including a tube and a plurality of fins thermally coupled to the tube, the air-to-liquid heat exchanger positioned in the first cooling section and configured to cool air as it passes through the air-to-liquid heat exchanger between the fins. 2. The apparatus of claim 1, further comprising:
data storage devices positioned within the first data storage section and the second data storage section. 3. The apparatus of claim 1, wherein the air-to-liquid heat exchanger is a double-pass heat exchanger. 4. The apparatus of claim 1, wherein the air-to-liquid heat exchanger is a single-pass heat exchanger. 5. (canceled) 6. The apparatus of claim 1, wherein the plurality of fins extends lengthwise along a longitudinal axis of the enclosure. 7. The apparatus of claim 1, wherein the enclosure includes a plurality of walls, wherein an input and an output to the air-to-liquid heat exchanger is positioned on the same wall of the enclosure. 8. The apparatus of claim 1, wherein the air-to-liquid heat exchanger extends partially between a first side wall and a second side wall of the enclosure, wherein a gap is positioned between the air-to-liquid heat exchanger and one of the first and the second side walls. 9. The apparatus of claim 1, further comprising:
a pump in fluid communication with the air-to-liquid heat exchanger. 10. The apparatus of claim 1, wherein the enclosure extends along a longitudinal axis, wherein air is directed along the longitudinal axis, wherein the air-to-liquid heat exchanger is arranged such that water flows through the air-to-liquid heat exchanger in a direction substantially perpendicular to the longitudinal axis. 11. The apparatus of claim 10, wherein the air-to-liquid heat exchanger is oriented such that air can pass through the air-to-liquid heat exchanger along the longitudinal axis. 12. The apparatus of claim 1, wherein the fan modules are positioned at a back end of the enclosure. 13. A system comprising:
a data storage system including a first data storage section, a second data storage section, a first cooling section positioned therebetween, and fan modules positioned within a second cooling section; and a cooling system including a pump, a fluid source, and a heat exchanger fluidly coupled to each other, the heat exchanger is positioned within the first cooling section and arranged to cool air as the air passes through the heat exchanger and is directed towards the fan modules, the fluid source positioned external to the data storage system. 14. The system of claim 13, further comprising:
hard disk drives or solid state drives positioned within the first data storage section and the second data storage section. 15. The system of claim 13, wherein the heat exchanger cools air passing through the heat exchanger by 2-20 degrees Celsius. 16. The system of claim 15, further comprising:
a plurality of enclosures housing the first and second data storage sections and the first and second cooling sections, each enclosure with the fan modules and heat exchanger positioned therein. 17. The system of claim 15, further comprising:
a fluid sink positioned external to the data storage system and fluidly coupled to the pump and the heat exchanger. 18. A method for cooling electronic components positioned in an enclosure with a first data section, a second data section, a first cooling section positioned therebetween, and a second cooling section, the method comprising:
powering fan modules positioned in the second cooling section to draw air across the first data section, the first cooling section, and the second data section; and pumping liquid through a tube of a heat exchanger, which includes a plurality of fins thermally coupled to the tube and which is positioned within the first cooling section, such that air passing through the heat exchanger between the plurality of fins is cooled to cool the second data section. 19. The method of claim 18, wherein the electronic components are data storage devices or data processing units. 20. (canceled) 21. The method of claim 18, wherein the liquid enters the enclosure at a first temperature and exits the enclosure at a second temperature that is greater than the first temperature. | An apparatus includes an enclosure with a first data storage section, a second data storage section, a first cooling section positioned therebetween, and a second cooling section. The apparatus also includes an air-to-liquid heat exchanger positioned in the first cooling section and configured to cool air directed from the first data storage section towards the second data storage section and the second cooling section.1. An apparatus comprising:
an enclosure with a first data storage section, a second data storage section, a first cooling section positioned therebetween, and a second cooling section, the second cooling section including fan modules positioned therein; and an air-to-liquid heat exchanger including a tube and a plurality of fins thermally coupled to the tube, the air-to-liquid heat exchanger positioned in the first cooling section and configured to cool air as it passes through the air-to-liquid heat exchanger between the fins. 2. The apparatus of claim 1, further comprising:
data storage devices positioned within the first data storage section and the second data storage section. 3. The apparatus of claim 1, wherein the air-to-liquid heat exchanger is a double-pass heat exchanger. 4. The apparatus of claim 1, wherein the air-to-liquid heat exchanger is a single-pass heat exchanger. 5. (canceled) 6. The apparatus of claim 1, wherein the plurality of fins extends lengthwise along a longitudinal axis of the enclosure. 7. The apparatus of claim 1, wherein the enclosure includes a plurality of walls, wherein an input and an output to the air-to-liquid heat exchanger is positioned on the same wall of the enclosure. 8. The apparatus of claim 1, wherein the air-to-liquid heat exchanger extends partially between a first side wall and a second side wall of the enclosure, wherein a gap is positioned between the air-to-liquid heat exchanger and one of the first and the second side walls. 9. The apparatus of claim 1, further comprising:
a pump in fluid communication with the air-to-liquid heat exchanger. 10. The apparatus of claim 1, wherein the enclosure extends along a longitudinal axis, wherein air is directed along the longitudinal axis, wherein the air-to-liquid heat exchanger is arranged such that water flows through the air-to-liquid heat exchanger in a direction substantially perpendicular to the longitudinal axis. 11. The apparatus of claim 10, wherein the air-to-liquid heat exchanger is oriented such that air can pass through the air-to-liquid heat exchanger along the longitudinal axis. 12. The apparatus of claim 1, wherein the fan modules are positioned at a back end of the enclosure. 13. A system comprising:
a data storage system including a first data storage section, a second data storage section, a first cooling section positioned therebetween, and fan modules positioned within a second cooling section; and a cooling system including a pump, a fluid source, and a heat exchanger fluidly coupled to each other, the heat exchanger is positioned within the first cooling section and arranged to cool air as the air passes through the heat exchanger and is directed towards the fan modules, the fluid source positioned external to the data storage system. 14. The system of claim 13, further comprising:
hard disk drives or solid state drives positioned within the first data storage section and the second data storage section. 15. The system of claim 13, wherein the heat exchanger cools air passing through the heat exchanger by 2-20 degrees Celsius. 16. The system of claim 15, further comprising:
a plurality of enclosures housing the first and second data storage sections and the first and second cooling sections, each enclosure with the fan modules and heat exchanger positioned therein. 17. The system of claim 15, further comprising:
a fluid sink positioned external to the data storage system and fluidly coupled to the pump and the heat exchanger. 18. A method for cooling electronic components positioned in an enclosure with a first data section, a second data section, a first cooling section positioned therebetween, and a second cooling section, the method comprising:
powering fan modules positioned in the second cooling section to draw air across the first data section, the first cooling section, and the second data section; and pumping liquid through a tube of a heat exchanger, which includes a plurality of fins thermally coupled to the tube and which is positioned within the first cooling section, such that air passing through the heat exchanger between the plurality of fins is cooled to cool the second data section. 19. The method of claim 18, wherein the electronic components are data storage devices or data processing units. 20. (canceled) 21. The method of claim 18, wherein the liquid enters the enclosure at a first temperature and exits the enclosure at a second temperature that is greater than the first temperature. | 2,800 |
12,097 | 12,097 | 16,253,740 | 2,835 | Systems and methods are involved with but are not limited to an apparatus including a first frame shaped and sized to receive a tablet-shaped computing device; and a second frame shaped and sized to receive the first frame. In addition, other aspects are described in the claims, drawings, and text forming a part of the present disclosure. | 1. A case comprising:
a first frame shaped and sized to receive a tablet-shaped computing device; and a second frame shaped and sized to receive the first frame. 2. The case of claim 1 wherein the second frame includes an inner periphery and the first frame includes an outer lip shaped and sized to abut with the inner periphery of the second frame. 3. The case of claim 1 wherein the first frame has an inner lip shaped and sized to abut with a periphery of a tablet-shaped computing device. 4. The case of claim 3 wherein the first frame has an inner wall extending from the inner lip keyboard to abut with a front periphery of the tablet-shaped computing device without abutting with the display of the tablet-shaped computing device. 5. The case of claim 1 wherein the first frame has an aperture sized and shaped to provide visual access to a display of a tablet-shaped computing device being received by the first frame. 6. The case of claim 1 wherein the first frame is configured to couple with a display side of a tablet-shaped computing device. 7. The case of claim 1 wherein the first frame is made of polycarbonate material. 8. The case of claim 1 wherein the second frame includes a continuous back to obscure a back of a tablet-shaped computing device being received by the case. 9. The case of claim 1 wherein the second frame includes a first material having a first hardness and a second material having a second hardness less than the first hardness in terms of Shore A, Shore D, or Rockwell measurement standards. 10. The case of claim 9 wherein one or more portions of the second frame are made from one or more thermoplastic polyurethane, thermoplastic elastomer, or silicone materials. 11. The case of claim 1 further comprising: one or more fasteners, wherein the one or more fasteners contribute in coupling the first frame and the second frame together. 12. The case of claim 11 wherein the one or more fasteners are screws. 13. The case of claim 1 wherein the first frame includes one or more stems threaded for receiving one or more screws. 14. The case of claim 13 wherein the second frame includes one or more apertures positioned to align with the one or more stems of the first frame. 15. The case of claim 1 wherein a portion of the first frame is contoured to provide access to a control of a tablet-sized being received by the first frame. 16. The case of claim 1 wherein the second frame includes a stand. 17. The case of claim 1 wherein the stand includes retracted and extended positions. 18. A case comprising:
a first frame shaped and sized to receive a tablet-shaped computing device, the first frame has an inner lip shaped and sized to abut with a periphery of a tablet-shaped computing device; and a second frame shaped and sized to receive the first frame. 19. The case of claim 18 wherein the first frame has an inner wall extending from the inner lip keyboard to abut with a front periphery of the tablet-shaped computing device without abutting with the display of the tablet-shaped computing device. 20. A case comprising:
a first frame shaped and sized to receive a tablet-shaped computing device; and a second frame shaped and sized to receive the first frame, the second frame includes an inner periphery and the first frame includes an outer lip shaped and sized to abut with the inner periphery of the second frame. | Systems and methods are involved with but are not limited to an apparatus including a first frame shaped and sized to receive a tablet-shaped computing device; and a second frame shaped and sized to receive the first frame. In addition, other aspects are described in the claims, drawings, and text forming a part of the present disclosure.1. A case comprising:
a first frame shaped and sized to receive a tablet-shaped computing device; and a second frame shaped and sized to receive the first frame. 2. The case of claim 1 wherein the second frame includes an inner periphery and the first frame includes an outer lip shaped and sized to abut with the inner periphery of the second frame. 3. The case of claim 1 wherein the first frame has an inner lip shaped and sized to abut with a periphery of a tablet-shaped computing device. 4. The case of claim 3 wherein the first frame has an inner wall extending from the inner lip keyboard to abut with a front periphery of the tablet-shaped computing device without abutting with the display of the tablet-shaped computing device. 5. The case of claim 1 wherein the first frame has an aperture sized and shaped to provide visual access to a display of a tablet-shaped computing device being received by the first frame. 6. The case of claim 1 wherein the first frame is configured to couple with a display side of a tablet-shaped computing device. 7. The case of claim 1 wherein the first frame is made of polycarbonate material. 8. The case of claim 1 wherein the second frame includes a continuous back to obscure a back of a tablet-shaped computing device being received by the case. 9. The case of claim 1 wherein the second frame includes a first material having a first hardness and a second material having a second hardness less than the first hardness in terms of Shore A, Shore D, or Rockwell measurement standards. 10. The case of claim 9 wherein one or more portions of the second frame are made from one or more thermoplastic polyurethane, thermoplastic elastomer, or silicone materials. 11. The case of claim 1 further comprising: one or more fasteners, wherein the one or more fasteners contribute in coupling the first frame and the second frame together. 12. The case of claim 11 wherein the one or more fasteners are screws. 13. The case of claim 1 wherein the first frame includes one or more stems threaded for receiving one or more screws. 14. The case of claim 13 wherein the second frame includes one or more apertures positioned to align with the one or more stems of the first frame. 15. The case of claim 1 wherein a portion of the first frame is contoured to provide access to a control of a tablet-sized being received by the first frame. 16. The case of claim 1 wherein the second frame includes a stand. 17. The case of claim 1 wherein the stand includes retracted and extended positions. 18. A case comprising:
a first frame shaped and sized to receive a tablet-shaped computing device, the first frame has an inner lip shaped and sized to abut with a periphery of a tablet-shaped computing device; and a second frame shaped and sized to receive the first frame. 19. The case of claim 18 wherein the first frame has an inner wall extending from the inner lip keyboard to abut with a front periphery of the tablet-shaped computing device without abutting with the display of the tablet-shaped computing device. 20. A case comprising:
a first frame shaped and sized to receive a tablet-shaped computing device; and a second frame shaped and sized to receive the first frame, the second frame includes an inner periphery and the first frame includes an outer lip shaped and sized to abut with the inner periphery of the second frame. | 2,800 |
12,098 | 12,098 | 16,866,836 | 2,864 | Physical-device anomalies and degradation can be mitigated by implementing some aspects described herein. For example, a system can determine a first data window and a second data window by applying a window function to streaming data. The system can determine a first principal eigenvector of the first data window and a first principal eigenvector of the second data window. The system can determine an angle change between the first principal eigenvectors of the two data windows. The system can then detect an anomaly based on determining that the angle change exceeds a predefined angle-change threshold. Additionally or alternatively, the system may compare the first principal eigenvector for the second data window to a baseline value to determine an absolute angle associated with the second data window. The system can then detect a degradation based on determining that the absolute angle exceeds a predefined absolute-angle threshold. | 1. A system comprising:
a processor; and a memory device comprising instructions that are executable by the processor for causing the processor to:
receive streaming data from a plurality of sensors, the streaming data being multidimensional data that includes a plurality of data points spanning a period of time;
determine a first data window by applying a window function to the streaming data, the first data window spanning a first timespan and having a predefined number of consecutive data points from the streaming data;
determine a first principal eigenvector of the first data window;
determine a second data window by applying the window function to the streaming data, the second data window spanning a second timespan that is subsequent to the first timespan and having the predefined number of consecutive data points from the streaming data, wherein the second data window includes at least one data point that is different from the first data window;
determine a first principal eigenvector of the second data window;
determine an angle change between first principal eigenvector of the first data window and the first principal eigenvector of the second data window;
determine that the angle change exceeds a predefined angle-change threshold;
detect an anomaly associated with a physical device based on determining that the angle change exceeds the predefined angle-change threshold, the physical device being associated with the plurality of sensors;
compare the first principal eigenvector for the second data window to a baseline unit vector to determine an absolute angle associated with the second data window;
determine that the absolute angle exceeds a predefined absolute-angle threshold;
detect a degradation associated with the physical device based on determining that the absolute angle exceeds the predefined absolute-angle threshold; and
generate one or more electronic signals indicating at least one of the anomaly or the degradation associated with the physical device. 2. The system of claim 1, wherein the memory device further comprises instructions that are executable by the processor for causing the processor to determine the absolute angle by:
determining a product of (i) the base unit vector and (ii) the first principal eigenvector of the second data window; determining a norm of the first principal eigenvector of the second data window; determining a result of dividing the product by the norm; and determining an inverse cosine of the result. 3. The system of claim 2, wherein:
determining the first principal eigenvector of the first data window involves determining the first principal eigenvector of the first data window without determining any other eigenvectors of the first data window; and determining the first principal eigenvector of the second data window involves determining the first principal eigenvector of the second data window without determining any other eigenvectors of the second data window. 4. The system of claim 1, wherein the memory device further comprises instructions that are executable by the processor for causing the processor to:
determine the first principal eigenvector of the first data window by performing principal component analysis on the first data window; and determine the first principal eigenvector of the second data window by performing principal component analysis on the second data window. 5. The system of claim 1, wherein the physical device is a sensor among the plurality of sensors, or the physical device is a machine to which the plurality of sensors are coupled for sensing characteristics of the machine. 6. The system of claim 1, wherein the anomaly is indicative of an operational problem with the physical device that is distinct from the degradation. 7. The system of claim 6, wherein the memory device further comprises instructions that are executable by the processor for causing the processor to generate an electronic communication configured to cause the operational problem to be mitigated. 8. The system of claim 7, wherein the memory device further comprises instructions that are executable by the processor for causing the processor to transmit the electronic communication over a network to a remote computing device, the electronic communication being configured to cause the remote computing device to assist with mitigating the operational problem. 9. The system of claim 1, wherein the memory device further comprises instructions that are executable by the processor for causing the processor to apply a sliding window based on the window function to the streaming data at successive time intervals to generate the first data window and the second data window. 10. The system of claim 1, wherein the memory device further comprises instructions that are executable by the processor for causing the processor to determine the angle change by:
determining a first product of (i) the first principal eigenvector of the first data window and (ii) the first principal eigenvector of the second data window; determining a second product of (i) a norm of the first principal eigenvector of the first data window and (ii) a norm of the first principal eigenvector of the second data window; determining a result of dividing the first product by the second product; and determining an inverse cosine of the result. 11. A method comprising:
receiving, by a processor, streaming data from a plurality of sensors, the streaming data being multidimensional data that includes a plurality of data points spanning a period of time; determining, by the processor, a first data window by applying a window function to the streaming data, the first data window spanning a first timespan and having a predefined number of consecutive data points from the streaming data; determining, by the processor, a first principal eigenvector of the first data window; determining, by the processor, a second data window by applying the window function to the streaming data, the second data window spanning a second timespan that is subsequent to the first timespan and having the predefined number of consecutive data points from the streaming data, wherein the second data window includes at least one data point that is different from the first data window; determining, by the processor, a first principal eigenvector of the second data window; determining, by the processor, an angle change between first principal eigenvector of the first data window and the first principal eigenvector of the second data window; determining, by the processor, that the angle change exceeds a predefined angle-change threshold; detecting, by the processor, an anomaly associated with a physical device based on determining that the angle change exceeds the predefined angle-change threshold, the physical device being associated with the plurality of sensors; comparing, by the processor, the first principal eigenvector for the second data window to a baseline unit vector to determine an absolute angle associated with the second data window; determining, by the processor, that the absolute angle exceeds a predefined absolute-angle threshold; detecting, by the processor, a degradation associated with the physical device based on determining that the absolute angle exceeds the predefined absolute-angle threshold; and generating, by the processor, one or more electronic signals indicating at least one of the anomaly or the degradation associated with the physical device. 12. The method of claim 11, further comprising determining the absolute angle by:
determining a product of (i) the base unit vector and (ii) the first principal eigenvector of the second data window; determining a norm of the first principal eigenvector of the second data window; determining a result of dividing the product by the norm; and determining an inverse cosine of the result. 13. The method of claim 11, wherein:
determining the first principal eigenvector of the first data window involves determining the first principal eigenvector of the first data window without determining any other eigenvectors of the first data window; and determining the first principal eigenvector of the second data window involves determining the first principal eigenvector of the second data window without determining any other eigenvectors of the second data window. 14. The method of claim 11, further comprising:
determine the first principal eigenvector of the first data window by performing principal component analysis on the first data window; and determine the first principal eigenvector of the second data window by performing principal component analysis on the second data window. 15. The method of claim 11, wherein the physical device is a sensor among the plurality of sensors, or the physical device is a machine to which the plurality of sensors are coupled for sensing characteristics of the machine. 16. The method of claim 11, wherein the anomaly is indicative of an operational problem with the physical device that is distinct from the degradation. 17. The method of claim 16, further comprising generating an electronic communication configured to cause the operational problem to be mitigated. 18. The method of claim 17, further comprising transmitting the electronic communication over a network to a remote computing device, the electronic communication being configured to cause the remote computing device to assist with mitigating the operational problem. 19. The method of claim 11, further comprising applying a sliding window based on the window function to the streaming data at successive time intervals to generate the first data window and the second data window. 20. The method of claim 11, further comprising determining the angle change by:
determining a first product of (i) the first principal eigenvector of the first data window and (ii) the first principal eigenvector of the second data window; determining a second product of (i) a norm of the first principal eigenvector of the first data window and (ii) a norm of the first principal eigenvector of the second data window; determining a result of dividing the first product by the second product; and determining an inverse cosine of the result. 21. A non-transitory computer-readable medium comprising program code that is executable by a processor for causing the processor to:
receive streaming data from a plurality of sensors, the streaming data being multidimensional data that includes a plurality of data points spanning a period of time; determine a first data window by applying a window function to the streaming data, the first data window spanning a first timespan and having a predefined number of consecutive data points from the streaming data; determine a first principal eigenvector of the first data window; determine a second data window by applying the window function to the streaming data, the second data window spanning a second timespan that is subsequent to the first timespan and having the predefined number of consecutive data points from the streaming data, wherein the second data window includes at least one data point that is different from the first data window; determine a first principal eigenvector of the second data window; determine an angle change between first principal eigenvector of the first data window and the first principal eigenvector of the second data window; determine that the angle change exceeds a predefined angle-change threshold; detect an anomaly associated with a physical device based on determining that the angle change exceeds the predefined angle-change threshold, the physical device being associated with the plurality of sensors; compare the first principal eigenvector for the second data window to a baseline unit vector to determine an absolute angle associated with the second data window; determine that the absolute angle exceeds a predefined absolute-angle threshold; detect a degradation associated with the physical device based on determining that the absolute angle exceeds the predefined absolute-angle threshold; and generate one or more electronic signals indicating at least one of the anomaly or the degradation associated with the physical device. 22. The non-transitory computer-readable medium of claim 21, further comprising program code that is executable by the processor for causing the processor to determine the absolute angle by:
determining a product of (i) the base unit vector and (ii) the first principal eigenvector of the second data window; determining a norm of the first principal eigenvector of the second data window; determining a result of dividing the product by the norm; and determining an inverse cosine of the result. 23. The non-transitory computer-readable medium of claim 22, wherein:
determining the first principal eigenvector of the first data window involves determining the first principal eigenvector of the first data window without determining any other eigenvectors of the first data window; and determining the first principal eigenvector of the second data window involves determining the first principal eigenvector of the second data window without determining any other eigenvectors of the second data window. 24. The non-transitory computer-readable medium of claim 21, further comprising program code that is executable by the processor for causing the processor to
determine the first principal eigenvector of the first data window by performing principal component analysis on the first data window; and determine the first principal eigenvector of the second data window by performing principal component analysis on the second data window. 25. (canceled) 26. The non-transitory computer-readable medium of claim 21, wherein the anomaly is indicative of an operational problem with the physical device that is distinct from the degradation. 27. The non-transitory computer-readable medium of claim 26, further comprising program code that is executable by the processor for causing the processor to generate an electronic communication configured to cause the operational problem to be mitigated. 28. The non-transitory computer-readable medium of claim 27, further comprising program code that is executable by the processor for causing the processor to transmit the electronic communication over a network to a remote computing device, the electronic communication being configured to cause the remote computing device to assist with mitigating the operational problem. 29. (canceled) 30. The non-transitory computer-readable medium of claim 21, further comprising program code that is executable by the processor for causing the processor to determine the angle change by:
determining a first product of (i) the first principal eigenvector of the first data window and (ii) the first principal eigenvector of the second data window; determining a second product of (i) a norm of the first principal eigenvector of the first data window and (ii) a norm of the first principal eigenvector of the second data window; determining a result of dividing the first product by the second product; and determining an inverse cosine of the result. 31. The system of claim 8, wherein the one or more electronic signals indicate a type or a severity of the anomaly, and wherein the remote computing device is configured to determine a countermeasure to implement for mitigating the anomaly based on the type or the severity of the anomaly. 32. The system of claim 1, wherein the system is configured to:
analyze streaming data that includes dozens of data points in substantially real time to identify one or more anomalies or one or more degradations impacting a performance of the physical device; and generate an electronic alert in response to identifying the one or more anomalies or the one or more degradations. | Physical-device anomalies and degradation can be mitigated by implementing some aspects described herein. For example, a system can determine a first data window and a second data window by applying a window function to streaming data. The system can determine a first principal eigenvector of the first data window and a first principal eigenvector of the second data window. The system can determine an angle change between the first principal eigenvectors of the two data windows. The system can then detect an anomaly based on determining that the angle change exceeds a predefined angle-change threshold. Additionally or alternatively, the system may compare the first principal eigenvector for the second data window to a baseline value to determine an absolute angle associated with the second data window. The system can then detect a degradation based on determining that the absolute angle exceeds a predefined absolute-angle threshold.1. A system comprising:
a processor; and a memory device comprising instructions that are executable by the processor for causing the processor to:
receive streaming data from a plurality of sensors, the streaming data being multidimensional data that includes a plurality of data points spanning a period of time;
determine a first data window by applying a window function to the streaming data, the first data window spanning a first timespan and having a predefined number of consecutive data points from the streaming data;
determine a first principal eigenvector of the first data window;
determine a second data window by applying the window function to the streaming data, the second data window spanning a second timespan that is subsequent to the first timespan and having the predefined number of consecutive data points from the streaming data, wherein the second data window includes at least one data point that is different from the first data window;
determine a first principal eigenvector of the second data window;
determine an angle change between first principal eigenvector of the first data window and the first principal eigenvector of the second data window;
determine that the angle change exceeds a predefined angle-change threshold;
detect an anomaly associated with a physical device based on determining that the angle change exceeds the predefined angle-change threshold, the physical device being associated with the plurality of sensors;
compare the first principal eigenvector for the second data window to a baseline unit vector to determine an absolute angle associated with the second data window;
determine that the absolute angle exceeds a predefined absolute-angle threshold;
detect a degradation associated with the physical device based on determining that the absolute angle exceeds the predefined absolute-angle threshold; and
generate one or more electronic signals indicating at least one of the anomaly or the degradation associated with the physical device. 2. The system of claim 1, wherein the memory device further comprises instructions that are executable by the processor for causing the processor to determine the absolute angle by:
determining a product of (i) the base unit vector and (ii) the first principal eigenvector of the second data window; determining a norm of the first principal eigenvector of the second data window; determining a result of dividing the product by the norm; and determining an inverse cosine of the result. 3. The system of claim 2, wherein:
determining the first principal eigenvector of the first data window involves determining the first principal eigenvector of the first data window without determining any other eigenvectors of the first data window; and determining the first principal eigenvector of the second data window involves determining the first principal eigenvector of the second data window without determining any other eigenvectors of the second data window. 4. The system of claim 1, wherein the memory device further comprises instructions that are executable by the processor for causing the processor to:
determine the first principal eigenvector of the first data window by performing principal component analysis on the first data window; and determine the first principal eigenvector of the second data window by performing principal component analysis on the second data window. 5. The system of claim 1, wherein the physical device is a sensor among the plurality of sensors, or the physical device is a machine to which the plurality of sensors are coupled for sensing characteristics of the machine. 6. The system of claim 1, wherein the anomaly is indicative of an operational problem with the physical device that is distinct from the degradation. 7. The system of claim 6, wherein the memory device further comprises instructions that are executable by the processor for causing the processor to generate an electronic communication configured to cause the operational problem to be mitigated. 8. The system of claim 7, wherein the memory device further comprises instructions that are executable by the processor for causing the processor to transmit the electronic communication over a network to a remote computing device, the electronic communication being configured to cause the remote computing device to assist with mitigating the operational problem. 9. The system of claim 1, wherein the memory device further comprises instructions that are executable by the processor for causing the processor to apply a sliding window based on the window function to the streaming data at successive time intervals to generate the first data window and the second data window. 10. The system of claim 1, wherein the memory device further comprises instructions that are executable by the processor for causing the processor to determine the angle change by:
determining a first product of (i) the first principal eigenvector of the first data window and (ii) the first principal eigenvector of the second data window; determining a second product of (i) a norm of the first principal eigenvector of the first data window and (ii) a norm of the first principal eigenvector of the second data window; determining a result of dividing the first product by the second product; and determining an inverse cosine of the result. 11. A method comprising:
receiving, by a processor, streaming data from a plurality of sensors, the streaming data being multidimensional data that includes a plurality of data points spanning a period of time; determining, by the processor, a first data window by applying a window function to the streaming data, the first data window spanning a first timespan and having a predefined number of consecutive data points from the streaming data; determining, by the processor, a first principal eigenvector of the first data window; determining, by the processor, a second data window by applying the window function to the streaming data, the second data window spanning a second timespan that is subsequent to the first timespan and having the predefined number of consecutive data points from the streaming data, wherein the second data window includes at least one data point that is different from the first data window; determining, by the processor, a first principal eigenvector of the second data window; determining, by the processor, an angle change between first principal eigenvector of the first data window and the first principal eigenvector of the second data window; determining, by the processor, that the angle change exceeds a predefined angle-change threshold; detecting, by the processor, an anomaly associated with a physical device based on determining that the angle change exceeds the predefined angle-change threshold, the physical device being associated with the plurality of sensors; comparing, by the processor, the first principal eigenvector for the second data window to a baseline unit vector to determine an absolute angle associated with the second data window; determining, by the processor, that the absolute angle exceeds a predefined absolute-angle threshold; detecting, by the processor, a degradation associated with the physical device based on determining that the absolute angle exceeds the predefined absolute-angle threshold; and generating, by the processor, one or more electronic signals indicating at least one of the anomaly or the degradation associated with the physical device. 12. The method of claim 11, further comprising determining the absolute angle by:
determining a product of (i) the base unit vector and (ii) the first principal eigenvector of the second data window; determining a norm of the first principal eigenvector of the second data window; determining a result of dividing the product by the norm; and determining an inverse cosine of the result. 13. The method of claim 11, wherein:
determining the first principal eigenvector of the first data window involves determining the first principal eigenvector of the first data window without determining any other eigenvectors of the first data window; and determining the first principal eigenvector of the second data window involves determining the first principal eigenvector of the second data window without determining any other eigenvectors of the second data window. 14. The method of claim 11, further comprising:
determine the first principal eigenvector of the first data window by performing principal component analysis on the first data window; and determine the first principal eigenvector of the second data window by performing principal component analysis on the second data window. 15. The method of claim 11, wherein the physical device is a sensor among the plurality of sensors, or the physical device is a machine to which the plurality of sensors are coupled for sensing characteristics of the machine. 16. The method of claim 11, wherein the anomaly is indicative of an operational problem with the physical device that is distinct from the degradation. 17. The method of claim 16, further comprising generating an electronic communication configured to cause the operational problem to be mitigated. 18. The method of claim 17, further comprising transmitting the electronic communication over a network to a remote computing device, the electronic communication being configured to cause the remote computing device to assist with mitigating the operational problem. 19. The method of claim 11, further comprising applying a sliding window based on the window function to the streaming data at successive time intervals to generate the first data window and the second data window. 20. The method of claim 11, further comprising determining the angle change by:
determining a first product of (i) the first principal eigenvector of the first data window and (ii) the first principal eigenvector of the second data window; determining a second product of (i) a norm of the first principal eigenvector of the first data window and (ii) a norm of the first principal eigenvector of the second data window; determining a result of dividing the first product by the second product; and determining an inverse cosine of the result. 21. A non-transitory computer-readable medium comprising program code that is executable by a processor for causing the processor to:
receive streaming data from a plurality of sensors, the streaming data being multidimensional data that includes a plurality of data points spanning a period of time; determine a first data window by applying a window function to the streaming data, the first data window spanning a first timespan and having a predefined number of consecutive data points from the streaming data; determine a first principal eigenvector of the first data window; determine a second data window by applying the window function to the streaming data, the second data window spanning a second timespan that is subsequent to the first timespan and having the predefined number of consecutive data points from the streaming data, wherein the second data window includes at least one data point that is different from the first data window; determine a first principal eigenvector of the second data window; determine an angle change between first principal eigenvector of the first data window and the first principal eigenvector of the second data window; determine that the angle change exceeds a predefined angle-change threshold; detect an anomaly associated with a physical device based on determining that the angle change exceeds the predefined angle-change threshold, the physical device being associated with the plurality of sensors; compare the first principal eigenvector for the second data window to a baseline unit vector to determine an absolute angle associated with the second data window; determine that the absolute angle exceeds a predefined absolute-angle threshold; detect a degradation associated with the physical device based on determining that the absolute angle exceeds the predefined absolute-angle threshold; and generate one or more electronic signals indicating at least one of the anomaly or the degradation associated with the physical device. 22. The non-transitory computer-readable medium of claim 21, further comprising program code that is executable by the processor for causing the processor to determine the absolute angle by:
determining a product of (i) the base unit vector and (ii) the first principal eigenvector of the second data window; determining a norm of the first principal eigenvector of the second data window; determining a result of dividing the product by the norm; and determining an inverse cosine of the result. 23. The non-transitory computer-readable medium of claim 22, wherein:
determining the first principal eigenvector of the first data window involves determining the first principal eigenvector of the first data window without determining any other eigenvectors of the first data window; and determining the first principal eigenvector of the second data window involves determining the first principal eigenvector of the second data window without determining any other eigenvectors of the second data window. 24. The non-transitory computer-readable medium of claim 21, further comprising program code that is executable by the processor for causing the processor to
determine the first principal eigenvector of the first data window by performing principal component analysis on the first data window; and determine the first principal eigenvector of the second data window by performing principal component analysis on the second data window. 25. (canceled) 26. The non-transitory computer-readable medium of claim 21, wherein the anomaly is indicative of an operational problem with the physical device that is distinct from the degradation. 27. The non-transitory computer-readable medium of claim 26, further comprising program code that is executable by the processor for causing the processor to generate an electronic communication configured to cause the operational problem to be mitigated. 28. The non-transitory computer-readable medium of claim 27, further comprising program code that is executable by the processor for causing the processor to transmit the electronic communication over a network to a remote computing device, the electronic communication being configured to cause the remote computing device to assist with mitigating the operational problem. 29. (canceled) 30. The non-transitory computer-readable medium of claim 21, further comprising program code that is executable by the processor for causing the processor to determine the angle change by:
determining a first product of (i) the first principal eigenvector of the first data window and (ii) the first principal eigenvector of the second data window; determining a second product of (i) a norm of the first principal eigenvector of the first data window and (ii) a norm of the first principal eigenvector of the second data window; determining a result of dividing the first product by the second product; and determining an inverse cosine of the result. 31. The system of claim 8, wherein the one or more electronic signals indicate a type or a severity of the anomaly, and wherein the remote computing device is configured to determine a countermeasure to implement for mitigating the anomaly based on the type or the severity of the anomaly. 32. The system of claim 1, wherein the system is configured to:
analyze streaming data that includes dozens of data points in substantially real time to identify one or more anomalies or one or more degradations impacting a performance of the physical device; and generate an electronic alert in response to identifying the one or more anomalies or the one or more degradations. | 2,800 |
12,099 | 12,099 | 15,013,558 | 2,861 | A system for monitoring water quality in a water meter data collection system having a plurality ol metering end points (E) for measuring consumption includes a plurality of chemical biological and environmental sensors (S 1, S 2 ) disposed in a distribution system near or within the distribution end points (A, B), with the sensors (S 1, S 2 ) generating electrical signals through a network (G) that can be processed and communicated with the water meter data to a collection station (D) from the metering end points (E). | 1. Apparatus for sensing water quality at a water metering system end point, the apparatus comprising:
a fluid flow metering element positioned in a flow stream supplying at least one water utility customer that converts metering signals or movements of a flow metering element to electrical signals representing units of consumption; communication interface circuitry for converting the electrical signals representing units of consumption to meter data signals; means for electronically communicating the meter data signals to an external data collection device; and a water quality sensor positioned in a same flow stream as the flow stream of the fluid flow metering element to sense a quality of the water, said sensor producing a water quality status signal to the communication interface circuitry, wherein the communication interface circuitry is responsive to the water quality status signal to incorporate said water quality status signal into a group of data signals including meter data signals, wherein said means for electronically communicating the meter data will also communicate the water quality status signal in a transmission to a collection station in a water meter data collection network, and wherein the flow stream supplies the at least one water utility customer downstream from the fluid flow metering element and the water quality sensor. 2. The apparatus of claim 1, wherein the means for communicating the meter data signals includes a data port for communicating meter data signals from the meter register device to an external transmitter. 3. The apparatus of claim 1, wherein the communication interface circuitry includes circuitry for producing radio frequency meter data signals and wherein the means for communicating the meter data signals to an external deice includes an antenna for communicating the radio frequency meter data signals to an external device. 4. The apparatus of claim 1, wherein the water quality status signal is representative of at least one of a chemical, biological or environmental parameter. 5. The apparatus of claim 1, wherein the apparatus is installed as part of metering system at a site of one water utility customer. 6. The apparatus of claim 1, wherein the apparatus is installed as a zone water consumption meter for measuring water quality in a branch of a water distribution system supplying a plurality of water utility customers and wherein the fluid flow metering element and the water quality sensor are adapted to be positioned in the flow stream that passes through said zone water consumption meter. 7. A system comprising a plurality of apparatuses as recited in claim 1, wherein the apparatuses are each associated with, and are adapted to electrically communicate with, respective sensors for sensing various different ones of a plurality of chemical biological, or environmental parameters of water quality in a water distribution system, said sensors generating electrical signals that can be communicated through a wireless network to a fixed, non-mobile meter data collection station. 8. The system of claim 7, wherein there are a plurality of different sensors for different respective biological, chemical or environmental parameters, said different sensors being distributed to respective distribution end points within a specified zone of the water metering, network and wherein said sensors generate electrical signals that are communicated to the data collection station, to provide data on a plurality of parameters related to water quality within the specified zone. 9. The system of claim 7, wherein there are no more than two biological, chemical or environmental sensors associated with each respective, water metering system end point. 10. The system of claim 7, wherein each water metering system end point comprises a meter and wherein at least one biological, chemical or environmental sensor that is adapted to be positioned in a same flow stream as the flow stream of a respective fluid flow metering element. 11. The system of claim 7, wherein each water metering system end point is represented by a meter and wherein the at least one sensor is located within the meter. 12. The system of claim 7, wherein the apparatuses are installed as part of a water metering system at respective sites for a plurality of respective residential customers. 13. The system of claim 7, wherein the apparatuses are installed as zone meters for measuring water quality in respective branches of a water distribution system, wherein said branches distribute water to respective pluralities of residential customers. 14. A method for sensing water quality at a water metering system end point, the method comprising:
utilizing a metering element to convert movements of a fluid flow in a flow stream supplying at least one water utility customer to electrical signals representing units of consumption; converting the electrical signals representing units of consumption to meter data signals; electronically communicating the meter data signals to an external data collection device; and sensing a quality of the water in the same flow stream as the flow stream of the fluid flow metering element prior to the flow stream being supplied to the at least one water utility customer, said sensor producing a water quality status signal; and including said water quality status signal in a group of meter data signals to be transmitted to a collection station; and electronically communicating the water status signal with the meter data to u collection station in a water meter data collection network, wherein the flow stream supplies the at least one water utility customer downstream from the fluid flow metering element and the water quality sensor. 15. The method of claim 14, wherein the water quality status signal is representative of at least one of a chemical, biological or environmental parameter. 16. The method of claim 14, wherein the water quality status signal is sensed by a water consumption meter adapted to be installed at the site of one water utility customer. 17. The method of claim 14, wherein the water quality status signal is sensed by a zone water consumption meter that is configured for measuring water quality in a branch of a water distribution system serving a plurality of water utility customers. 18. The method of claim 14, wherein respective sensors for sensing various different ones of a plurality of chemical biological, or environmental parameters of water quality are distributed with a plurality of water meters in a water distribution system, said sensors generating electrical signals through the water meter system end points and through a wireless network to a fixed, non-mobile meter data collection station. 19. The method of claim 14, wherein there are a plurality of sensors for different biological, chemical or environmental parameter that are distributed to respective meter data end points within a specified zone of the water metering network and wherein said sensors generate electrical signals that are communicated to the data collection station to provide data on a plurality of parameters related to water quality with the specified zone. | A system for monitoring water quality in a water meter data collection system having a plurality ol metering end points (E) for measuring consumption includes a plurality of chemical biological and environmental sensors (S 1, S 2 ) disposed in a distribution system near or within the distribution end points (A, B), with the sensors (S 1, S 2 ) generating electrical signals through a network (G) that can be processed and communicated with the water meter data to a collection station (D) from the metering end points (E).1. Apparatus for sensing water quality at a water metering system end point, the apparatus comprising:
a fluid flow metering element positioned in a flow stream supplying at least one water utility customer that converts metering signals or movements of a flow metering element to electrical signals representing units of consumption; communication interface circuitry for converting the electrical signals representing units of consumption to meter data signals; means for electronically communicating the meter data signals to an external data collection device; and a water quality sensor positioned in a same flow stream as the flow stream of the fluid flow metering element to sense a quality of the water, said sensor producing a water quality status signal to the communication interface circuitry, wherein the communication interface circuitry is responsive to the water quality status signal to incorporate said water quality status signal into a group of data signals including meter data signals, wherein said means for electronically communicating the meter data will also communicate the water quality status signal in a transmission to a collection station in a water meter data collection network, and wherein the flow stream supplies the at least one water utility customer downstream from the fluid flow metering element and the water quality sensor. 2. The apparatus of claim 1, wherein the means for communicating the meter data signals includes a data port for communicating meter data signals from the meter register device to an external transmitter. 3. The apparatus of claim 1, wherein the communication interface circuitry includes circuitry for producing radio frequency meter data signals and wherein the means for communicating the meter data signals to an external deice includes an antenna for communicating the radio frequency meter data signals to an external device. 4. The apparatus of claim 1, wherein the water quality status signal is representative of at least one of a chemical, biological or environmental parameter. 5. The apparatus of claim 1, wherein the apparatus is installed as part of metering system at a site of one water utility customer. 6. The apparatus of claim 1, wherein the apparatus is installed as a zone water consumption meter for measuring water quality in a branch of a water distribution system supplying a plurality of water utility customers and wherein the fluid flow metering element and the water quality sensor are adapted to be positioned in the flow stream that passes through said zone water consumption meter. 7. A system comprising a plurality of apparatuses as recited in claim 1, wherein the apparatuses are each associated with, and are adapted to electrically communicate with, respective sensors for sensing various different ones of a plurality of chemical biological, or environmental parameters of water quality in a water distribution system, said sensors generating electrical signals that can be communicated through a wireless network to a fixed, non-mobile meter data collection station. 8. The system of claim 7, wherein there are a plurality of different sensors for different respective biological, chemical or environmental parameters, said different sensors being distributed to respective distribution end points within a specified zone of the water metering, network and wherein said sensors generate electrical signals that are communicated to the data collection station, to provide data on a plurality of parameters related to water quality within the specified zone. 9. The system of claim 7, wherein there are no more than two biological, chemical or environmental sensors associated with each respective, water metering system end point. 10. The system of claim 7, wherein each water metering system end point comprises a meter and wherein at least one biological, chemical or environmental sensor that is adapted to be positioned in a same flow stream as the flow stream of a respective fluid flow metering element. 11. The system of claim 7, wherein each water metering system end point is represented by a meter and wherein the at least one sensor is located within the meter. 12. The system of claim 7, wherein the apparatuses are installed as part of a water metering system at respective sites for a plurality of respective residential customers. 13. The system of claim 7, wherein the apparatuses are installed as zone meters for measuring water quality in respective branches of a water distribution system, wherein said branches distribute water to respective pluralities of residential customers. 14. A method for sensing water quality at a water metering system end point, the method comprising:
utilizing a metering element to convert movements of a fluid flow in a flow stream supplying at least one water utility customer to electrical signals representing units of consumption; converting the electrical signals representing units of consumption to meter data signals; electronically communicating the meter data signals to an external data collection device; and sensing a quality of the water in the same flow stream as the flow stream of the fluid flow metering element prior to the flow stream being supplied to the at least one water utility customer, said sensor producing a water quality status signal; and including said water quality status signal in a group of meter data signals to be transmitted to a collection station; and electronically communicating the water status signal with the meter data to u collection station in a water meter data collection network, wherein the flow stream supplies the at least one water utility customer downstream from the fluid flow metering element and the water quality sensor. 15. The method of claim 14, wherein the water quality status signal is representative of at least one of a chemical, biological or environmental parameter. 16. The method of claim 14, wherein the water quality status signal is sensed by a water consumption meter adapted to be installed at the site of one water utility customer. 17. The method of claim 14, wherein the water quality status signal is sensed by a zone water consumption meter that is configured for measuring water quality in a branch of a water distribution system serving a plurality of water utility customers. 18. The method of claim 14, wherein respective sensors for sensing various different ones of a plurality of chemical biological, or environmental parameters of water quality are distributed with a plurality of water meters in a water distribution system, said sensors generating electrical signals through the water meter system end points and through a wireless network to a fixed, non-mobile meter data collection station. 19. The method of claim 14, wherein there are a plurality of sensors for different biological, chemical or environmental parameter that are distributed to respective meter data end points within a specified zone of the water metering network and wherein said sensors generate electrical signals that are communicated to the data collection station to provide data on a plurality of parameters related to water quality with the specified zone. | 2,800 |
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