system stringclasses 7 values | input stringlengths 10 94.5k | output stringlengths 14 55.5k |
|---|---|---|
You are a helpful coding assistant specialized in converting CUDA source code to CUDA host assembly. | #include <cuda.h>
#include <stdio.h>
#include <math.h>
#define SIZ 1024
__global__ //이게 device에서 실행될 function 각 thread가 일정량실행
void countnum(int* countarr,int* datarr,int n){ //threadIdx.x+blockDim.x*blockIdx.x
int i=threadIdx.x+blockDim.x * blockIdx.x;
if(i<n)
{
int num=datarr[i];
atomicAdd(&countarr[num],1);
}
//atomicAdd(&arr[0],1);
//printf(" %d ",arr[0]);
}
/*__global__
void countbignum(int* countarr,int* datarr,int n){
int offset=1;
if(offset<n)
{
int num=datarr[offset];
atomicAdd(&countarr[num],1);
}
}*/
__host__ void counting_sort(int arr[], int size, int max_val)
{
// fill in
int* counting;
counting=(int*)malloc(sizeof(int)*size);
int* counting_d;
int* datarr_d;//input array
cudaMalloc((void **)&counting_d,sizeof(int)*max_val);
cudaMemset(counting_d,0,max_val*(sizeof(int)));
cudaMalloc((void**) &datarr_d,sizeof(int)*size);
cudaMemcpy(datarr_d,arr,sizeof(int)*size,cudaMemcpyHostToDevice);
int blocknum;
blocknum=ceil((double)size/SIZ);
// countnum<<<1024,SIZ>>>(counting_d,datarr_d,size);
//countnum<<<65535,SIZ>>>(counting_d,datarr_d,size);//1024가 max
// countnum<<<2097152,SIZ>>>(counting_d,datarr_d,size);
//countnum<<<1048576,SIZ>>>(counting_d,datarr_d,size);
countnum<<<blocknum,SIZ>>>(counting_d,datarr_d,size);
cudaDeviceSynchronize();
cudaMemcpy(counting,counting_d,sizeof(int)*max_val,cudaMemcpyDeviceToHost);
int index;
index=0;
for(int j=0;j<max_val;j++)
{
for(int q=0;q<counting[j];q++)
{
arr[index++]=j;
}
}
free(counting);
cudaFree(counting_d);
cudaFree(datarr_d);
} | .file "tmpxft_0004e977_00000000-6_counting_sort.cudafe1.cpp"
.text
#APP
#NO_APP
.type _ZL26__cudaUnregisterBinaryUtilv, @function
_ZL26__cudaUnregisterBinaryUtilv:
.LFB2060:
.cfi_startproc
endbr64
subq $8, %rsp
.cfi_def_cfa_offset 16
movq _ZL20__cudaFatCubinHandle(%rip), %rdi
call __cudaUnregisterFatBinary@PLT
addq $8, %rsp
.cfi_def_cfa_offset 8
ret
.cfi_endproc
.LFE2060:
.size _ZL26__cudaUnregisterBinaryUtilv, .-_ZL26__cudaUnregisterBinaryUtilv
.globl _Z30__device_stub__Z8countnumPiS_iPiS_i
.type _Z30__device_stub__Z8countnumPiS_iPiS_i, @function
_Z30__device_stub__Z8countnumPiS_iPiS_i:
.LFB2082:
.cfi_startproc
endbr64
subq $136, %rsp
.cfi_def_cfa_offset 144
movq %rdi, 24(%rsp)
movq %rsi, 16(%rsp)
movl %edx, 12(%rsp)
movq %fs:40, %rax
movq %rax, 120(%rsp)
xorl %eax, %eax
leaq 24(%rsp), %rax
movq %rax, 96(%rsp)
leaq 16(%rsp), %rax
movq %rax, 104(%rsp)
leaq 12(%rsp), %rax
movq %rax, 112(%rsp)
movl $1, 48(%rsp)
movl $1, 52(%rsp)
movl $1, 56(%rsp)
movl $1, 60(%rsp)
movl $1, 64(%rsp)
movl $1, 68(%rsp)
leaq 40(%rsp), %rcx
leaq 32(%rsp), %rdx
leaq 60(%rsp), %rsi
leaq 48(%rsp), %rdi
call __cudaPopCallConfiguration@PLT
testl %eax, %eax
je .L7
.L3:
movq 120(%rsp), %rax
subq %fs:40, %rax
jne .L8
addq $136, %rsp
.cfi_remember_state
.cfi_def_cfa_offset 8
ret
.L7:
.cfi_restore_state
pushq 40(%rsp)
.cfi_def_cfa_offset 152
pushq 40(%rsp)
.cfi_def_cfa_offset 160
leaq 112(%rsp), %r9
movq 76(%rsp), %rcx
movl 84(%rsp), %r8d
movq 64(%rsp), %rsi
movl 72(%rsp), %edx
leaq _Z8countnumPiS_i(%rip), %rdi
call cudaLaunchKernel@PLT
addq $16, %rsp
.cfi_def_cfa_offset 144
jmp .L3
.L8:
call __stack_chk_fail@PLT
.cfi_endproc
.LFE2082:
.size _Z30__device_stub__Z8countnumPiS_iPiS_i, .-_Z30__device_stub__Z8countnumPiS_iPiS_i
.globl _Z8countnumPiS_i
.type _Z8countnumPiS_i, @function
_Z8countnumPiS_i:
.LFB2083:
.cfi_startproc
endbr64
subq $8, %rsp
.cfi_def_cfa_offset 16
call _Z30__device_stub__Z8countnumPiS_iPiS_i
addq $8, %rsp
.cfi_def_cfa_offset 8
ret
.cfi_endproc
.LFE2083:
.size _Z8countnumPiS_i, .-_Z8countnumPiS_i
.globl _Z13counting_sortPiii
.type _Z13counting_sortPiii, @function
_Z13counting_sortPiii:
.LFB2057:
.cfi_startproc
endbr64
pushq %r15
.cfi_def_cfa_offset 16
.cfi_offset 15, -16
pushq %r14
.cfi_def_cfa_offset 24
.cfi_offset 14, -24
pushq %r13
.cfi_def_cfa_offset 32
.cfi_offset 13, -32
pushq %r12
.cfi_def_cfa_offset 40
.cfi_offset 12, -40
pushq %rbp
.cfi_def_cfa_offset 48
.cfi_offset 6, -48
pushq %rbx
.cfi_def_cfa_offset 56
.cfi_offset 3, -56
subq $72, %rsp
.cfi_def_cfa_offset 128
movq %rdi, %rbx
movl %edx, %r14d
movq %fs:40, %rax
movq %rax, 56(%rsp)
xorl %eax, %eax
movl %esi, 12(%rsp)
movslq %esi, %r13
salq $2, %r13
movq %r13, %rdi
call malloc@PLT
movq %rax, %rbp
movslq %r14d, %r12
leaq 0(,%r12,4), %r15
leaq 16(%rsp), %rdi
movq %r15, %rsi
call cudaMalloc@PLT
movq %r15, %rdx
movl $0, %esi
movq 16(%rsp), %rdi
call cudaMemset@PLT
leaq 24(%rsp), %rdi
movq %r13, %rsi
call cudaMalloc@PLT
movl $1, %ecx
movq %r13, %rdx
movq %rbx, %rsi
movq 24(%rsp), %rdi
call cudaMemcpy@PLT
pxor %xmm0, %xmm0
cvtsi2sdl 12(%rsp), %xmm0
mulsd .LC0(%rip), %xmm0
movapd %xmm0, %xmm3
movsd .LC4(%rip), %xmm2
movapd %xmm0, %xmm1
andpd %xmm2, %xmm1
movsd .LC1(%rip), %xmm4
ucomisd %xmm1, %xmm4
jbe .L12
cvttsd2siq %xmm0, %rax
pxor %xmm1, %xmm1
cvtsi2sdq %rax, %xmm1
cmpnlesd %xmm1, %xmm3
movsd .LC3(%rip), %xmm4
andpd %xmm4, %xmm3
addsd %xmm1, %xmm3
andnpd %xmm0, %xmm2
orpd %xmm2, %xmm3
.L12:
movl $1024, 44(%rsp)
movl $1, 48(%rsp)
cvttsd2sil %xmm3, %eax
movl %eax, 32(%rsp)
movl $1, 36(%rsp)
movl $0, %r9d
movl $0, %r8d
movq 44(%rsp), %rdx
movl $1, %ecx
movq 32(%rsp), %rdi
movl $1, %esi
call __cudaPushCallConfiguration@PLT
testl %eax, %eax
je .L24
.L13:
call cudaDeviceSynchronize@PLT
movl $2, %ecx
movq %r15, %rdx
movq 16(%rsp), %rsi
movq %rbp, %rdi
call cudaMemcpy@PLT
movl $0, %esi
movl $0, %r8d
testl %r14d, %r14d
jg .L14
.L15:
movq %rbp, %rdi
call free@PLT
movq 16(%rsp), %rdi
call cudaFree@PLT
movq 24(%rsp), %rdi
call cudaFree@PLT
movq 56(%rsp), %rax
subq %fs:40, %rax
jne .L25
addq $72, %rsp
.cfi_remember_state
.cfi_def_cfa_offset 56
popq %rbx
.cfi_def_cfa_offset 48
popq %rbp
.cfi_def_cfa_offset 40
popq %r12
.cfi_def_cfa_offset 32
popq %r13
.cfi_def_cfa_offset 24
popq %r14
.cfi_def_cfa_offset 16
popq %r15
.cfi_def_cfa_offset 8
ret
.L24:
.cfi_restore_state
movl 12(%rsp), %edx
movq 24(%rsp), %rsi
movq 16(%rsp), %rdi
call _Z30__device_stub__Z8countnumPiS_iPiS_i
jmp .L13
.L17:
movslq %r8d, %r9
leaq (%rbx,%r9,4), %rax
movslq %edi, %rcx
addq %r9, %rcx
leaq (%rbx,%rcx,4), %rcx
.L16:
movl %edx, (%rax)
addq $4, %rax
cmpq %rcx, %rax
jne .L16
addl %edi, %r8d
.L18:
addq $1, %rsi
cmpq %rsi, %r12
je .L15
.L14:
movl %esi, %edx
movl 0(%rbp,%rsi,4), %edi
testl %edi, %edi
jg .L17
jmp .L18
.L25:
call __stack_chk_fail@PLT
.cfi_endproc
.LFE2057:
.size _Z13counting_sortPiii, .-_Z13counting_sortPiii
.section .rodata.str1.1,"aMS",@progbits,1
.LC5:
.string "_Z8countnumPiS_i"
.text
.type _ZL24__sti____cudaRegisterAllv, @function
_ZL24__sti____cudaRegisterAllv:
.LFB2085:
.cfi_startproc
endbr64
subq $8, %rsp
.cfi_def_cfa_offset 16
leaq _ZL15__fatDeviceText(%rip), %rdi
call __cudaRegisterFatBinary@PLT
movq %rax, %rdi
movq %rax, _ZL20__cudaFatCubinHandle(%rip)
pushq $0
.cfi_def_cfa_offset 24
pushq $0
.cfi_def_cfa_offset 32
pushq $0
.cfi_def_cfa_offset 40
pushq $0
.cfi_def_cfa_offset 48
movl $0, %r9d
movl $-1, %r8d
leaq .LC5(%rip), %rdx
movq %rdx, %rcx
leaq _Z8countnumPiS_i(%rip), %rsi
call __cudaRegisterFunction@PLT
addq $32, %rsp
.cfi_def_cfa_offset 16
movq _ZL20__cudaFatCubinHandle(%rip), %rdi
call __cudaRegisterFatBinaryEnd@PLT
leaq _ZL26__cudaUnregisterBinaryUtilv(%rip), %rdi
call atexit@PLT
addq $8, %rsp
.cfi_def_cfa_offset 8
ret
.cfi_endproc
.LFE2085:
.size _ZL24__sti____cudaRegisterAllv, .-_ZL24__sti____cudaRegisterAllv
.section .init_array,"aw"
.align 8
.quad _ZL24__sti____cudaRegisterAllv
.section .nvFatBinSegment,"aw"
.align 8
.type _ZL15__fatDeviceText, @object
.size _ZL15__fatDeviceText, 24
_ZL15__fatDeviceText:
.long 1180844977
.long 1
.quad fatbinData
.quad 0
.local _ZL20__cudaFatCubinHandle
.comm _ZL20__cudaFatCubinHandle,8,8
.section .rodata.cst8,"aM",@progbits,8
.align 8
.LC0:
.long 0
.long 1062207488
.align 8
.LC1:
.long 0
.long 1127219200
.align 8
.LC3:
.long 0
.long 1072693248
.align 8
.LC4:
.long -1
.long 2147483647
.ident "GCC: (Ubuntu 13.3.0-6ubuntu2~24.04) 13.3.0"
.section .note.GNU-stack,"",@progbits
.section .note.gnu.property,"a"
.align 8
.long 1f - 0f
.long 4f - 1f
.long 5
0:
.string "GNU"
1:
.align 8
.long 0xc0000002
.long 3f - 2f
2:
.long 0x3
3:
.align 8
4: |
You are a helpful coding assistant specialized in converting CUDA source code to HIP/AMD source code. | #include <cuda.h>
#include <stdio.h>
#include <math.h>
#define SIZ 1024
__global__ //이게 device에서 실행될 function 각 thread가 일정량실행
void countnum(int* countarr,int* datarr,int n){ //threadIdx.x+blockDim.x*blockIdx.x
int i=threadIdx.x+blockDim.x * blockIdx.x;
if(i<n)
{
int num=datarr[i];
atomicAdd(&countarr[num],1);
}
//atomicAdd(&arr[0],1);
//printf(" %d ",arr[0]);
}
/*__global__
void countbignum(int* countarr,int* datarr,int n){
int offset=1;
if(offset<n)
{
int num=datarr[offset];
atomicAdd(&countarr[num],1);
}
}*/
__host__ void counting_sort(int arr[], int size, int max_val)
{
// fill in
int* counting;
counting=(int*)malloc(sizeof(int)*size);
int* counting_d;
int* datarr_d;//input array
cudaMalloc((void **)&counting_d,sizeof(int)*max_val);
cudaMemset(counting_d,0,max_val*(sizeof(int)));
cudaMalloc((void**) &datarr_d,sizeof(int)*size);
cudaMemcpy(datarr_d,arr,sizeof(int)*size,cudaMemcpyHostToDevice);
int blocknum;
blocknum=ceil((double)size/SIZ);
// countnum<<<1024,SIZ>>>(counting_d,datarr_d,size);
//countnum<<<65535,SIZ>>>(counting_d,datarr_d,size);//1024가 max
// countnum<<<2097152,SIZ>>>(counting_d,datarr_d,size);
//countnum<<<1048576,SIZ>>>(counting_d,datarr_d,size);
countnum<<<blocknum,SIZ>>>(counting_d,datarr_d,size);
cudaDeviceSynchronize();
cudaMemcpy(counting,counting_d,sizeof(int)*max_val,cudaMemcpyDeviceToHost);
int index;
index=0;
for(int j=0;j<max_val;j++)
{
for(int q=0;q<counting[j];q++)
{
arr[index++]=j;
}
}
free(counting);
cudaFree(counting_d);
cudaFree(datarr_d);
} | #include <hip/hip_runtime.h>
#include <stdio.h>
#include <math.h>
#define SIZ 1024
__global__ //이게 device에서 실행될 function 각 thread가 일정량실행
void countnum(int* countarr,int* datarr,int n){ //threadIdx.x+blockDim.x*blockIdx.x
int i=threadIdx.x+blockDim.x * blockIdx.x;
if(i<n)
{
int num=datarr[i];
atomicAdd(&countarr[num],1);
}
//atomicAdd(&arr[0],1);
//printf(" %d ",arr[0]);
}
/*__global__
void countbignum(int* countarr,int* datarr,int n){
int offset=1;
if(offset<n)
{
int num=datarr[offset];
atomicAdd(&countarr[num],1);
}
}*/
__host__ void counting_sort(int arr[], int size, int max_val)
{
// fill in
int* counting;
counting=(int*)malloc(sizeof(int)*size);
int* counting_d;
int* datarr_d;//input array
hipMalloc((void **)&counting_d,sizeof(int)*max_val);
hipMemset(counting_d,0,max_val*(sizeof(int)));
hipMalloc((void**) &datarr_d,sizeof(int)*size);
hipMemcpy(datarr_d,arr,sizeof(int)*size,hipMemcpyHostToDevice);
int blocknum;
blocknum=ceil((double)size/SIZ);
// countnum<<<1024,SIZ>>>(counting_d,datarr_d,size);
//countnum<<<65535,SIZ>>>(counting_d,datarr_d,size);//1024가 max
// countnum<<<2097152,SIZ>>>(counting_d,datarr_d,size);
//countnum<<<1048576,SIZ>>>(counting_d,datarr_d,size);
countnum<<<blocknum,SIZ>>>(counting_d,datarr_d,size);
hipDeviceSynchronize();
hipMemcpy(counting,counting_d,sizeof(int)*max_val,hipMemcpyDeviceToHost);
int index;
index=0;
for(int j=0;j<max_val;j++)
{
for(int q=0;q<counting[j];q++)
{
arr[index++]=j;
}
}
free(counting);
hipFree(counting_d);
hipFree(datarr_d);
} |
You are a helpful coding assistant specialized in converting HIP source code to AMD device assembly. | #include <hip/hip_runtime.h>
#include <stdio.h>
#include <math.h>
#define SIZ 1024
__global__ //이게 device에서 실행될 function 각 thread가 일정량실행
void countnum(int* countarr,int* datarr,int n){ //threadIdx.x+blockDim.x*blockIdx.x
int i=threadIdx.x+blockDim.x * blockIdx.x;
if(i<n)
{
int num=datarr[i];
atomicAdd(&countarr[num],1);
}
//atomicAdd(&arr[0],1);
//printf(" %d ",arr[0]);
}
/*__global__
void countbignum(int* countarr,int* datarr,int n){
int offset=1;
if(offset<n)
{
int num=datarr[offset];
atomicAdd(&countarr[num],1);
}
}*/
__host__ void counting_sort(int arr[], int size, int max_val)
{
// fill in
int* counting;
counting=(int*)malloc(sizeof(int)*size);
int* counting_d;
int* datarr_d;//input array
hipMalloc((void **)&counting_d,sizeof(int)*max_val);
hipMemset(counting_d,0,max_val*(sizeof(int)));
hipMalloc((void**) &datarr_d,sizeof(int)*size);
hipMemcpy(datarr_d,arr,sizeof(int)*size,hipMemcpyHostToDevice);
int blocknum;
blocknum=ceil((double)size/SIZ);
// countnum<<<1024,SIZ>>>(counting_d,datarr_d,size);
//countnum<<<65535,SIZ>>>(counting_d,datarr_d,size);//1024가 max
// countnum<<<2097152,SIZ>>>(counting_d,datarr_d,size);
//countnum<<<1048576,SIZ>>>(counting_d,datarr_d,size);
countnum<<<blocknum,SIZ>>>(counting_d,datarr_d,size);
hipDeviceSynchronize();
hipMemcpy(counting,counting_d,sizeof(int)*max_val,hipMemcpyDeviceToHost);
int index;
index=0;
for(int j=0;j<max_val;j++)
{
for(int q=0;q<counting[j];q++)
{
arr[index++]=j;
}
}
free(counting);
hipFree(counting_d);
hipFree(datarr_d);
} | .text
.amdgcn_target "amdgcn-amd-amdhsa--gfx1100"
.protected _Z8countnumPiS_i
.globl _Z8countnumPiS_i
.p2align 8
.type _Z8countnumPiS_i,@function
_Z8countnumPiS_i:
s_clause 0x1
s_load_b32 s2, s[0:1], 0x24
s_load_b32 s3, s[0:1], 0x10
s_waitcnt lgkmcnt(0)
s_and_b32 s2, s2, 0xffff
s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
v_mad_u64_u32 v[1:2], null, s15, s2, v[0:1]
s_mov_b32 s2, exec_lo
v_cmpx_gt_i32_e64 s3, v1
s_cbranch_execz .LBB0_2
s_load_b128 s[0:3], s[0:1], 0x0
v_ashrrev_i32_e32 v2, 31, v1
s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_2) | instid1(VALU_DEP_2)
v_lshlrev_b64 v[0:1], 2, v[1:2]
v_mov_b32_e32 v2, 1
s_waitcnt lgkmcnt(0)
v_add_co_u32 v0, vcc_lo, s2, v0
s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_3) | instid1(VALU_DEP_1)
v_add_co_ci_u32_e32 v1, vcc_lo, s3, v1, vcc_lo
global_load_b32 v0, v[0:1], off
s_waitcnt vmcnt(0)
v_ashrrev_i32_e32 v1, 31, v0
v_lshlrev_b64 v[0:1], 2, v[0:1]
s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_2)
v_add_co_u32 v0, vcc_lo, s0, v0
v_add_co_ci_u32_e32 v1, vcc_lo, s1, v1, vcc_lo
global_atomic_add_u32 v[0:1], v2, off
.LBB0_2:
s_nop 0
s_sendmsg sendmsg(MSG_DEALLOC_VGPRS)
s_endpgm
.section .rodata,"a",@progbits
.p2align 6, 0x0
.amdhsa_kernel _Z8countnumPiS_i
.amdhsa_group_segment_fixed_size 0
.amdhsa_private_segment_fixed_size 0
.amdhsa_kernarg_size 280
.amdhsa_user_sgpr_count 15
.amdhsa_user_sgpr_dispatch_ptr 0
.amdhsa_user_sgpr_queue_ptr 0
.amdhsa_user_sgpr_kernarg_segment_ptr 1
.amdhsa_user_sgpr_dispatch_id 0
.amdhsa_user_sgpr_private_segment_size 0
.amdhsa_wavefront_size32 1
.amdhsa_uses_dynamic_stack 0
.amdhsa_enable_private_segment 0
.amdhsa_system_sgpr_workgroup_id_x 1
.amdhsa_system_sgpr_workgroup_id_y 0
.amdhsa_system_sgpr_workgroup_id_z 0
.amdhsa_system_sgpr_workgroup_info 0
.amdhsa_system_vgpr_workitem_id 0
.amdhsa_next_free_vgpr 3
.amdhsa_next_free_sgpr 16
.amdhsa_float_round_mode_32 0
.amdhsa_float_round_mode_16_64 0
.amdhsa_float_denorm_mode_32 3
.amdhsa_float_denorm_mode_16_64 3
.amdhsa_dx10_clamp 1
.amdhsa_ieee_mode 1
.amdhsa_fp16_overflow 0
.amdhsa_workgroup_processor_mode 1
.amdhsa_memory_ordered 1
.amdhsa_forward_progress 0
.amdhsa_shared_vgpr_count 0
.amdhsa_exception_fp_ieee_invalid_op 0
.amdhsa_exception_fp_denorm_src 0
.amdhsa_exception_fp_ieee_div_zero 0
.amdhsa_exception_fp_ieee_overflow 0
.amdhsa_exception_fp_ieee_underflow 0
.amdhsa_exception_fp_ieee_inexact 0
.amdhsa_exception_int_div_zero 0
.end_amdhsa_kernel
.text
.Lfunc_end0:
.size _Z8countnumPiS_i, .Lfunc_end0-_Z8countnumPiS_i
.section .AMDGPU.csdata,"",@progbits
.text
.p2alignl 7, 3214868480
.fill 96, 4, 3214868480
.type __hip_cuid_,@object
.section .bss,"aw",@nobits
.globl __hip_cuid_
__hip_cuid_:
.byte 0
.size __hip_cuid_, 1
.ident "AMD clang version 18.0.0git (https://github.com/RadeonOpenCompute/llvm-project roc-6.3.2 25012 e5bf7e55c91490b07c49d8960fa7983d864936c4)"
.section ".note.GNU-stack","",@progbits
.addrsig
.addrsig_sym __hip_cuid_
.amdgpu_metadata
---
amdhsa.kernels:
- .args:
- .address_space: global
.offset: 0
.size: 8
.value_kind: global_buffer
- .address_space: global
.offset: 8
.size: 8
.value_kind: global_buffer
- .offset: 16
.size: 4
.value_kind: by_value
- .offset: 24
.size: 4
.value_kind: hidden_block_count_x
- .offset: 28
.size: 4
.value_kind: hidden_block_count_y
- .offset: 32
.size: 4
.value_kind: hidden_block_count_z
- .offset: 36
.size: 2
.value_kind: hidden_group_size_x
- .offset: 38
.size: 2
.value_kind: hidden_group_size_y
- .offset: 40
.size: 2
.value_kind: hidden_group_size_z
- .offset: 42
.size: 2
.value_kind: hidden_remainder_x
- .offset: 44
.size: 2
.value_kind: hidden_remainder_y
- .offset: 46
.size: 2
.value_kind: hidden_remainder_z
- .offset: 64
.size: 8
.value_kind: hidden_global_offset_x
- .offset: 72
.size: 8
.value_kind: hidden_global_offset_y
- .offset: 80
.size: 8
.value_kind: hidden_global_offset_z
- .offset: 88
.size: 2
.value_kind: hidden_grid_dims
.group_segment_fixed_size: 0
.kernarg_segment_align: 8
.kernarg_segment_size: 280
.language: OpenCL C
.language_version:
- 2
- 0
.max_flat_workgroup_size: 1024
.name: _Z8countnumPiS_i
.private_segment_fixed_size: 0
.sgpr_count: 18
.sgpr_spill_count: 0
.symbol: _Z8countnumPiS_i.kd
.uniform_work_group_size: 1
.uses_dynamic_stack: false
.vgpr_count: 3
.vgpr_spill_count: 0
.wavefront_size: 32
.workgroup_processor_mode: 1
amdhsa.target: amdgcn-amd-amdhsa--gfx1100
amdhsa.version:
- 1
- 2
...
.end_amdgpu_metadata |
You are a helpful coding assistant specialized in converting HIP source code to AMD host assembly. | #include <hip/hip_runtime.h>
#include <stdio.h>
#include <math.h>
#define SIZ 1024
__global__ //이게 device에서 실행될 function 각 thread가 일정량실행
void countnum(int* countarr,int* datarr,int n){ //threadIdx.x+blockDim.x*blockIdx.x
int i=threadIdx.x+blockDim.x * blockIdx.x;
if(i<n)
{
int num=datarr[i];
atomicAdd(&countarr[num],1);
}
//atomicAdd(&arr[0],1);
//printf(" %d ",arr[0]);
}
/*__global__
void countbignum(int* countarr,int* datarr,int n){
int offset=1;
if(offset<n)
{
int num=datarr[offset];
atomicAdd(&countarr[num],1);
}
}*/
__host__ void counting_sort(int arr[], int size, int max_val)
{
// fill in
int* counting;
counting=(int*)malloc(sizeof(int)*size);
int* counting_d;
int* datarr_d;//input array
hipMalloc((void **)&counting_d,sizeof(int)*max_val);
hipMemset(counting_d,0,max_val*(sizeof(int)));
hipMalloc((void**) &datarr_d,sizeof(int)*size);
hipMemcpy(datarr_d,arr,sizeof(int)*size,hipMemcpyHostToDevice);
int blocknum;
blocknum=ceil((double)size/SIZ);
// countnum<<<1024,SIZ>>>(counting_d,datarr_d,size);
//countnum<<<65535,SIZ>>>(counting_d,datarr_d,size);//1024가 max
// countnum<<<2097152,SIZ>>>(counting_d,datarr_d,size);
//countnum<<<1048576,SIZ>>>(counting_d,datarr_d,size);
countnum<<<blocknum,SIZ>>>(counting_d,datarr_d,size);
hipDeviceSynchronize();
hipMemcpy(counting,counting_d,sizeof(int)*max_val,hipMemcpyDeviceToHost);
int index;
index=0;
for(int j=0;j<max_val;j++)
{
for(int q=0;q<counting[j];q++)
{
arr[index++]=j;
}
}
free(counting);
hipFree(counting_d);
hipFree(datarr_d);
} | .text
.file "counting_sort.hip"
.globl _Z23__device_stub__countnumPiS_i # -- Begin function _Z23__device_stub__countnumPiS_i
.p2align 4, 0x90
.type _Z23__device_stub__countnumPiS_i,@function
_Z23__device_stub__countnumPiS_i: # @_Z23__device_stub__countnumPiS_i
.cfi_startproc
# %bb.0:
subq $104, %rsp
.cfi_def_cfa_offset 112
movq %rdi, 72(%rsp)
movq %rsi, 64(%rsp)
movl %edx, 12(%rsp)
leaq 72(%rsp), %rax
movq %rax, 80(%rsp)
leaq 64(%rsp), %rax
movq %rax, 88(%rsp)
leaq 12(%rsp), %rax
movq %rax, 96(%rsp)
leaq 48(%rsp), %rdi
leaq 32(%rsp), %rsi
leaq 24(%rsp), %rdx
leaq 16(%rsp), %rcx
callq __hipPopCallConfiguration
movq 48(%rsp), %rsi
movl 56(%rsp), %edx
movq 32(%rsp), %rcx
movl 40(%rsp), %r8d
leaq 80(%rsp), %r9
movl $_Z8countnumPiS_i, %edi
pushq 16(%rsp)
.cfi_adjust_cfa_offset 8
pushq 32(%rsp)
.cfi_adjust_cfa_offset 8
callq hipLaunchKernel
addq $120, %rsp
.cfi_adjust_cfa_offset -120
retq
.Lfunc_end0:
.size _Z23__device_stub__countnumPiS_i, .Lfunc_end0-_Z23__device_stub__countnumPiS_i
.cfi_endproc
# -- End function
.section .rodata.cst8,"aM",@progbits,8
.p2align 3, 0x0 # -- Begin function _Z13counting_sortPiii
.LCPI1_0:
.quad 0x3f50000000000000 # double 9.765625E-4
.text
.globl _Z13counting_sortPiii
.p2align 4, 0x90
.type _Z13counting_sortPiii,@function
_Z13counting_sortPiii: # @_Z13counting_sortPiii
.cfi_startproc
# %bb.0:
pushq %rbp
.cfi_def_cfa_offset 16
pushq %r15
.cfi_def_cfa_offset 24
pushq %r14
.cfi_def_cfa_offset 32
pushq %r13
.cfi_def_cfa_offset 40
pushq %r12
.cfi_def_cfa_offset 48
pushq %rbx
.cfi_def_cfa_offset 56
subq $120, %rsp
.cfi_def_cfa_offset 176
.cfi_offset %rbx, -56
.cfi_offset %r12, -48
.cfi_offset %r13, -40
.cfi_offset %r14, -32
.cfi_offset %r15, -24
.cfi_offset %rbp, -16
movl %edx, %r12d
movq %rdi, %rbx
movl %esi, 24(%rsp) # 4-byte Spill
movslq %esi, %rbp
leaq (,%rbp,4), %r13
movq %r13, %rdi
callq malloc
movq %rax, %r14
movslq %r12d, %r15
shlq $2, %r15
leaq 8(%rsp), %rdi
movq %r15, %rsi
callq hipMalloc
movq 8(%rsp), %rdi
xorl %esi, %esi
movq %r15, %rdx
callq hipMemset
leaq 16(%rsp), %rdi
movq %r13, %rsi
callq hipMalloc
movq 16(%rsp), %rdi
movq %rbx, %rsi
movq %r13, %rdx
movl $1, %ecx
callq hipMemcpy
cvtsi2sd %ebp, %xmm0
mulsd .LCPI1_0(%rip), %xmm0
callq ceil@PLT
cvttsd2si %xmm0, %edi
movabsq $4294967296, %rdx # imm = 0x100000000
orq %rdx, %rdi
orq $1024, %rdx # imm = 0x400
movl $1, %esi
movl $1, %ecx
xorl %r8d, %r8d
xorl %r9d, %r9d
callq __hipPushCallConfiguration
testl %eax, %eax
jne .LBB1_2
# %bb.1:
movq 8(%rsp), %rax
movq 16(%rsp), %rcx
movq %rax, 88(%rsp)
movq %rcx, 80(%rsp)
movl 24(%rsp), %eax # 4-byte Reload
movl %eax, 28(%rsp)
leaq 88(%rsp), %rax
movq %rax, 96(%rsp)
leaq 80(%rsp), %rax
movq %rax, 104(%rsp)
leaq 28(%rsp), %rax
movq %rax, 112(%rsp)
leaq 64(%rsp), %rdi
leaq 48(%rsp), %rsi
leaq 40(%rsp), %rdx
leaq 32(%rsp), %rcx
callq __hipPopCallConfiguration
movq 64(%rsp), %rsi
movl 72(%rsp), %edx
movq 48(%rsp), %rcx
movl 56(%rsp), %r8d
leaq 96(%rsp), %r9
movl $_Z8countnumPiS_i, %edi
pushq 32(%rsp)
.cfi_adjust_cfa_offset 8
pushq 48(%rsp)
.cfi_adjust_cfa_offset 8
callq hipLaunchKernel
addq $16, %rsp
.cfi_adjust_cfa_offset -16
.LBB1_2:
callq hipDeviceSynchronize
movq 8(%rsp), %rsi
movq %r14, %rdi
movq %r15, %rdx
movl $2, %ecx
callq hipMemcpy
testl %r12d, %r12d
jle .LBB1_9
# %bb.3: # %.preheader.preheader
movl %r12d, %eax
xorl %ecx, %ecx
xorl %edx, %edx
jmp .LBB1_4
.p2align 4, 0x90
.LBB1_8: # %._crit_edge
# in Loop: Header=BB1_4 Depth=1
incq %rcx
cmpq %rax, %rcx
je .LBB1_9
.LBB1_4: # %.preheader
# =>This Loop Header: Depth=1
# Child Loop BB1_6 Depth 2
movl (%r14,%rcx,4), %esi
testl %esi, %esi
jle .LBB1_8
# %bb.5: # %.lr.ph.preheader
# in Loop: Header=BB1_4 Depth=1
movslq %edx, %rdi
leaq (%rbx,%rdi,4), %r8
xorl %edi, %edi
.p2align 4, 0x90
.LBB1_6: # %.lr.ph
# Parent Loop BB1_4 Depth=1
# => This Inner Loop Header: Depth=2
movl %ecx, (%r8,%rdi,4)
incq %rdi
cmpl %edi, %esi
jne .LBB1_6
# %bb.7: # %._crit_edge.loopexit
# in Loop: Header=BB1_4 Depth=1
addl %edi, %edx
jmp .LBB1_8
.LBB1_9: # %._crit_edge32
movq %r14, %rdi
callq free
movq 8(%rsp), %rdi
callq hipFree
movq 16(%rsp), %rdi
callq hipFree
addq $120, %rsp
.cfi_def_cfa_offset 56
popq %rbx
.cfi_def_cfa_offset 48
popq %r12
.cfi_def_cfa_offset 40
popq %r13
.cfi_def_cfa_offset 32
popq %r14
.cfi_def_cfa_offset 24
popq %r15
.cfi_def_cfa_offset 16
popq %rbp
.cfi_def_cfa_offset 8
retq
.Lfunc_end1:
.size _Z13counting_sortPiii, .Lfunc_end1-_Z13counting_sortPiii
.cfi_endproc
# -- End function
.p2align 4, 0x90 # -- Begin function __hip_module_ctor
.type __hip_module_ctor,@function
__hip_module_ctor: # @__hip_module_ctor
.cfi_startproc
# %bb.0:
subq $40, %rsp
.cfi_def_cfa_offset 48
cmpq $0, __hip_gpubin_handle(%rip)
jne .LBB2_2
# %bb.1:
movl $__hip_fatbin_wrapper, %edi
callq __hipRegisterFatBinary
movq %rax, __hip_gpubin_handle(%rip)
.LBB2_2:
movq __hip_gpubin_handle(%rip), %rdi
xorps %xmm0, %xmm0
movups %xmm0, 16(%rsp)
movups %xmm0, (%rsp)
movl $_Z8countnumPiS_i, %esi
movl $.L__unnamed_1, %edx
movl $.L__unnamed_1, %ecx
movl $-1, %r8d
xorl %r9d, %r9d
callq __hipRegisterFunction
movl $__hip_module_dtor, %edi
addq $40, %rsp
.cfi_def_cfa_offset 8
jmp atexit # TAILCALL
.Lfunc_end2:
.size __hip_module_ctor, .Lfunc_end2-__hip_module_ctor
.cfi_endproc
# -- End function
.p2align 4, 0x90 # -- Begin function __hip_module_dtor
.type __hip_module_dtor,@function
__hip_module_dtor: # @__hip_module_dtor
.cfi_startproc
# %bb.0:
movq __hip_gpubin_handle(%rip), %rdi
testq %rdi, %rdi
je .LBB3_2
# %bb.1:
pushq %rax
.cfi_def_cfa_offset 16
callq __hipUnregisterFatBinary
movq $0, __hip_gpubin_handle(%rip)
addq $8, %rsp
.cfi_def_cfa_offset 8
.LBB3_2:
retq
.Lfunc_end3:
.size __hip_module_dtor, .Lfunc_end3-__hip_module_dtor
.cfi_endproc
# -- End function
.type _Z8countnumPiS_i,@object # @_Z8countnumPiS_i
.section .rodata,"a",@progbits
.globl _Z8countnumPiS_i
.p2align 3, 0x0
_Z8countnumPiS_i:
.quad _Z23__device_stub__countnumPiS_i
.size _Z8countnumPiS_i, 8
.type .L__unnamed_1,@object # @0
.section .rodata.str1.1,"aMS",@progbits,1
.L__unnamed_1:
.asciz "_Z8countnumPiS_i"
.size .L__unnamed_1, 17
.type __hip_fatbin_wrapper,@object # @__hip_fatbin_wrapper
.section .hipFatBinSegment,"a",@progbits
.p2align 3, 0x0
__hip_fatbin_wrapper:
.long 1212764230 # 0x48495046
.long 1 # 0x1
.quad __hip_fatbin
.quad 0
.size __hip_fatbin_wrapper, 24
.type __hip_gpubin_handle,@object # @__hip_gpubin_handle
.local __hip_gpubin_handle
.comm __hip_gpubin_handle,8,8
.section .init_array,"aw",@init_array
.p2align 3, 0x0
.quad __hip_module_ctor
.type __hip_cuid_,@object # @__hip_cuid_
.bss
.globl __hip_cuid_
__hip_cuid_:
.byte 0 # 0x0
.size __hip_cuid_, 1
.section ".linker-options","e",@llvm_linker_options
.ident "AMD clang version 18.0.0git (https://github.com/RadeonOpenCompute/llvm-project roc-6.3.2 25012 e5bf7e55c91490b07c49d8960fa7983d864936c4)"
.section ".note.GNU-stack","",@progbits
.addrsig
.addrsig_sym _Z23__device_stub__countnumPiS_i
.addrsig_sym __hip_module_ctor
.addrsig_sym __hip_module_dtor
.addrsig_sym _Z8countnumPiS_i
.addrsig_sym __hip_fatbin
.addrsig_sym __hip_fatbin_wrapper
.addrsig_sym __hip_cuid_ |
You are a helpful coding assistant specialized in converting from CUDA device assembly to AMD device assembly. | code for sm_80
Function : _Z8countnumPiS_i
.headerflags @"EF_CUDA_TEXMODE_UNIFIED EF_CUDA_64BIT_ADDRESS EF_CUDA_SM80 EF_CUDA_VIRTUAL_SM(EF_CUDA_SM80)"
/*0000*/ MOV R1, c[0x0][0x28] ; /* 0x00000a0000017a02 */
/* 0x000fe40000000f00 */
/*0010*/ S2R R2, SR_TID.X ; /* 0x0000000000027919 */
/* 0x000e280000002100 */
/*0020*/ S2R R3, SR_CTAID.X ; /* 0x0000000000037919 */
/* 0x000e240000002500 */
/*0030*/ IMAD R2, R3, c[0x0][0x0], R2 ; /* 0x0000000003027a24 */
/* 0x001fca00078e0202 */
/*0040*/ ISETP.GE.AND P0, PT, R2, c[0x0][0x170], PT ; /* 0x00005c0002007a0c */
/* 0x000fda0003f06270 */
/*0050*/ @P0 EXIT ; /* 0x000000000000094d */
/* 0x000fea0003800000 */
/*0060*/ HFMA2.MMA R5, -RZ, RZ, 0, 2.384185791015625e-07 ; /* 0x00000004ff057435 */
/* 0x000fe200000001ff */
/*0070*/ ULDC.64 UR4, c[0x0][0x118] ; /* 0x0000460000047ab9 */
/* 0x000fd20000000a00 */
/*0080*/ IMAD.WIDE R2, R2, R5, c[0x0][0x168] ; /* 0x00005a0002027625 */
/* 0x000fcc00078e0205 */
/*0090*/ LDG.E R2, [R2.64] ; /* 0x0000000402027981 */
/* 0x000ea2000c1e1900 */
/*00a0*/ HFMA2.MMA R7, -RZ, RZ, 0, 5.9604644775390625e-08 ; /* 0x00000001ff077435 */
/* 0x000fe200000001ff */
/*00b0*/ IMAD.WIDE R4, R2, R5, c[0x0][0x160] ; /* 0x0000580002047625 */
/* 0x004fcc00078e0205 */
/*00c0*/ RED.E.ADD.STRONG.GPU [R4.64], R7 ; /* 0x000000070400798e */
/* 0x000fe2000c10e184 */
/*00d0*/ EXIT ; /* 0x000000000000794d */
/* 0x000fea0003800000 */
/*00e0*/ BRA 0xe0; /* 0xfffffff000007947 */
/* 0x000fc0000383ffff */
/*00f0*/ NOP; /* 0x0000000000007918 */
/* 0x000fc00000000000 */
/*0100*/ NOP; /* 0x0000000000007918 */
/* 0x000fc00000000000 */
/*0110*/ NOP; /* 0x0000000000007918 */
/* 0x000fc00000000000 */
/*0120*/ NOP; /* 0x0000000000007918 */
/* 0x000fc00000000000 */
/*0130*/ NOP; /* 0x0000000000007918 */
/* 0x000fc00000000000 */
/*0140*/ NOP; /* 0x0000000000007918 */
/* 0x000fc00000000000 */
/*0150*/ NOP; /* 0x0000000000007918 */
/* 0x000fc00000000000 */
/*0160*/ NOP; /* 0x0000000000007918 */
/* 0x000fc00000000000 */
/*0170*/ NOP; /* 0x0000000000007918 */
/* 0x000fc00000000000 */
.......... | .text
.amdgcn_target "amdgcn-amd-amdhsa--gfx1100"
.protected _Z8countnumPiS_i
.globl _Z8countnumPiS_i
.p2align 8
.type _Z8countnumPiS_i,@function
_Z8countnumPiS_i:
s_clause 0x1
s_load_b32 s2, s[0:1], 0x24
s_load_b32 s3, s[0:1], 0x10
s_waitcnt lgkmcnt(0)
s_and_b32 s2, s2, 0xffff
s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
v_mad_u64_u32 v[1:2], null, s15, s2, v[0:1]
s_mov_b32 s2, exec_lo
v_cmpx_gt_i32_e64 s3, v1
s_cbranch_execz .LBB0_2
s_load_b128 s[0:3], s[0:1], 0x0
v_ashrrev_i32_e32 v2, 31, v1
s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_2) | instid1(VALU_DEP_2)
v_lshlrev_b64 v[0:1], 2, v[1:2]
v_mov_b32_e32 v2, 1
s_waitcnt lgkmcnt(0)
v_add_co_u32 v0, vcc_lo, s2, v0
s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_3) | instid1(VALU_DEP_1)
v_add_co_ci_u32_e32 v1, vcc_lo, s3, v1, vcc_lo
global_load_b32 v0, v[0:1], off
s_waitcnt vmcnt(0)
v_ashrrev_i32_e32 v1, 31, v0
v_lshlrev_b64 v[0:1], 2, v[0:1]
s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_2)
v_add_co_u32 v0, vcc_lo, s0, v0
v_add_co_ci_u32_e32 v1, vcc_lo, s1, v1, vcc_lo
global_atomic_add_u32 v[0:1], v2, off
.LBB0_2:
s_nop 0
s_sendmsg sendmsg(MSG_DEALLOC_VGPRS)
s_endpgm
.section .rodata,"a",@progbits
.p2align 6, 0x0
.amdhsa_kernel _Z8countnumPiS_i
.amdhsa_group_segment_fixed_size 0
.amdhsa_private_segment_fixed_size 0
.amdhsa_kernarg_size 280
.amdhsa_user_sgpr_count 15
.amdhsa_user_sgpr_dispatch_ptr 0
.amdhsa_user_sgpr_queue_ptr 0
.amdhsa_user_sgpr_kernarg_segment_ptr 1
.amdhsa_user_sgpr_dispatch_id 0
.amdhsa_user_sgpr_private_segment_size 0
.amdhsa_wavefront_size32 1
.amdhsa_uses_dynamic_stack 0
.amdhsa_enable_private_segment 0
.amdhsa_system_sgpr_workgroup_id_x 1
.amdhsa_system_sgpr_workgroup_id_y 0
.amdhsa_system_sgpr_workgroup_id_z 0
.amdhsa_system_sgpr_workgroup_info 0
.amdhsa_system_vgpr_workitem_id 0
.amdhsa_next_free_vgpr 3
.amdhsa_next_free_sgpr 16
.amdhsa_float_round_mode_32 0
.amdhsa_float_round_mode_16_64 0
.amdhsa_float_denorm_mode_32 3
.amdhsa_float_denorm_mode_16_64 3
.amdhsa_dx10_clamp 1
.amdhsa_ieee_mode 1
.amdhsa_fp16_overflow 0
.amdhsa_workgroup_processor_mode 1
.amdhsa_memory_ordered 1
.amdhsa_forward_progress 0
.amdhsa_shared_vgpr_count 0
.amdhsa_exception_fp_ieee_invalid_op 0
.amdhsa_exception_fp_denorm_src 0
.amdhsa_exception_fp_ieee_div_zero 0
.amdhsa_exception_fp_ieee_overflow 0
.amdhsa_exception_fp_ieee_underflow 0
.amdhsa_exception_fp_ieee_inexact 0
.amdhsa_exception_int_div_zero 0
.end_amdhsa_kernel
.text
.Lfunc_end0:
.size _Z8countnumPiS_i, .Lfunc_end0-_Z8countnumPiS_i
.section .AMDGPU.csdata,"",@progbits
.text
.p2alignl 7, 3214868480
.fill 96, 4, 3214868480
.type __hip_cuid_,@object
.section .bss,"aw",@nobits
.globl __hip_cuid_
__hip_cuid_:
.byte 0
.size __hip_cuid_, 1
.ident "AMD clang version 18.0.0git (https://github.com/RadeonOpenCompute/llvm-project roc-6.3.2 25012 e5bf7e55c91490b07c49d8960fa7983d864936c4)"
.section ".note.GNU-stack","",@progbits
.addrsig
.addrsig_sym __hip_cuid_
.amdgpu_metadata
---
amdhsa.kernels:
- .args:
- .address_space: global
.offset: 0
.size: 8
.value_kind: global_buffer
- .address_space: global
.offset: 8
.size: 8
.value_kind: global_buffer
- .offset: 16
.size: 4
.value_kind: by_value
- .offset: 24
.size: 4
.value_kind: hidden_block_count_x
- .offset: 28
.size: 4
.value_kind: hidden_block_count_y
- .offset: 32
.size: 4
.value_kind: hidden_block_count_z
- .offset: 36
.size: 2
.value_kind: hidden_group_size_x
- .offset: 38
.size: 2
.value_kind: hidden_group_size_y
- .offset: 40
.size: 2
.value_kind: hidden_group_size_z
- .offset: 42
.size: 2
.value_kind: hidden_remainder_x
- .offset: 44
.size: 2
.value_kind: hidden_remainder_y
- .offset: 46
.size: 2
.value_kind: hidden_remainder_z
- .offset: 64
.size: 8
.value_kind: hidden_global_offset_x
- .offset: 72
.size: 8
.value_kind: hidden_global_offset_y
- .offset: 80
.size: 8
.value_kind: hidden_global_offset_z
- .offset: 88
.size: 2
.value_kind: hidden_grid_dims
.group_segment_fixed_size: 0
.kernarg_segment_align: 8
.kernarg_segment_size: 280
.language: OpenCL C
.language_version:
- 2
- 0
.max_flat_workgroup_size: 1024
.name: _Z8countnumPiS_i
.private_segment_fixed_size: 0
.sgpr_count: 18
.sgpr_spill_count: 0
.symbol: _Z8countnumPiS_i.kd
.uniform_work_group_size: 1
.uses_dynamic_stack: false
.vgpr_count: 3
.vgpr_spill_count: 0
.wavefront_size: 32
.workgroup_processor_mode: 1
amdhsa.target: amdgcn-amd-amdhsa--gfx1100
amdhsa.version:
- 1
- 2
...
.end_amdgpu_metadata |
You are a helpful coding assistant specialized in converting from CUDA host assembly to AMD host assembly. | .file "tmpxft_0004e977_00000000-6_counting_sort.cudafe1.cpp"
.text
#APP
#NO_APP
.type _ZL26__cudaUnregisterBinaryUtilv, @function
_ZL26__cudaUnregisterBinaryUtilv:
.LFB2060:
.cfi_startproc
endbr64
subq $8, %rsp
.cfi_def_cfa_offset 16
movq _ZL20__cudaFatCubinHandle(%rip), %rdi
call __cudaUnregisterFatBinary@PLT
addq $8, %rsp
.cfi_def_cfa_offset 8
ret
.cfi_endproc
.LFE2060:
.size _ZL26__cudaUnregisterBinaryUtilv, .-_ZL26__cudaUnregisterBinaryUtilv
.globl _Z30__device_stub__Z8countnumPiS_iPiS_i
.type _Z30__device_stub__Z8countnumPiS_iPiS_i, @function
_Z30__device_stub__Z8countnumPiS_iPiS_i:
.LFB2082:
.cfi_startproc
endbr64
subq $136, %rsp
.cfi_def_cfa_offset 144
movq %rdi, 24(%rsp)
movq %rsi, 16(%rsp)
movl %edx, 12(%rsp)
movq %fs:40, %rax
movq %rax, 120(%rsp)
xorl %eax, %eax
leaq 24(%rsp), %rax
movq %rax, 96(%rsp)
leaq 16(%rsp), %rax
movq %rax, 104(%rsp)
leaq 12(%rsp), %rax
movq %rax, 112(%rsp)
movl $1, 48(%rsp)
movl $1, 52(%rsp)
movl $1, 56(%rsp)
movl $1, 60(%rsp)
movl $1, 64(%rsp)
movl $1, 68(%rsp)
leaq 40(%rsp), %rcx
leaq 32(%rsp), %rdx
leaq 60(%rsp), %rsi
leaq 48(%rsp), %rdi
call __cudaPopCallConfiguration@PLT
testl %eax, %eax
je .L7
.L3:
movq 120(%rsp), %rax
subq %fs:40, %rax
jne .L8
addq $136, %rsp
.cfi_remember_state
.cfi_def_cfa_offset 8
ret
.L7:
.cfi_restore_state
pushq 40(%rsp)
.cfi_def_cfa_offset 152
pushq 40(%rsp)
.cfi_def_cfa_offset 160
leaq 112(%rsp), %r9
movq 76(%rsp), %rcx
movl 84(%rsp), %r8d
movq 64(%rsp), %rsi
movl 72(%rsp), %edx
leaq _Z8countnumPiS_i(%rip), %rdi
call cudaLaunchKernel@PLT
addq $16, %rsp
.cfi_def_cfa_offset 144
jmp .L3
.L8:
call __stack_chk_fail@PLT
.cfi_endproc
.LFE2082:
.size _Z30__device_stub__Z8countnumPiS_iPiS_i, .-_Z30__device_stub__Z8countnumPiS_iPiS_i
.globl _Z8countnumPiS_i
.type _Z8countnumPiS_i, @function
_Z8countnumPiS_i:
.LFB2083:
.cfi_startproc
endbr64
subq $8, %rsp
.cfi_def_cfa_offset 16
call _Z30__device_stub__Z8countnumPiS_iPiS_i
addq $8, %rsp
.cfi_def_cfa_offset 8
ret
.cfi_endproc
.LFE2083:
.size _Z8countnumPiS_i, .-_Z8countnumPiS_i
.globl _Z13counting_sortPiii
.type _Z13counting_sortPiii, @function
_Z13counting_sortPiii:
.LFB2057:
.cfi_startproc
endbr64
pushq %r15
.cfi_def_cfa_offset 16
.cfi_offset 15, -16
pushq %r14
.cfi_def_cfa_offset 24
.cfi_offset 14, -24
pushq %r13
.cfi_def_cfa_offset 32
.cfi_offset 13, -32
pushq %r12
.cfi_def_cfa_offset 40
.cfi_offset 12, -40
pushq %rbp
.cfi_def_cfa_offset 48
.cfi_offset 6, -48
pushq %rbx
.cfi_def_cfa_offset 56
.cfi_offset 3, -56
subq $72, %rsp
.cfi_def_cfa_offset 128
movq %rdi, %rbx
movl %edx, %r14d
movq %fs:40, %rax
movq %rax, 56(%rsp)
xorl %eax, %eax
movl %esi, 12(%rsp)
movslq %esi, %r13
salq $2, %r13
movq %r13, %rdi
call malloc@PLT
movq %rax, %rbp
movslq %r14d, %r12
leaq 0(,%r12,4), %r15
leaq 16(%rsp), %rdi
movq %r15, %rsi
call cudaMalloc@PLT
movq %r15, %rdx
movl $0, %esi
movq 16(%rsp), %rdi
call cudaMemset@PLT
leaq 24(%rsp), %rdi
movq %r13, %rsi
call cudaMalloc@PLT
movl $1, %ecx
movq %r13, %rdx
movq %rbx, %rsi
movq 24(%rsp), %rdi
call cudaMemcpy@PLT
pxor %xmm0, %xmm0
cvtsi2sdl 12(%rsp), %xmm0
mulsd .LC0(%rip), %xmm0
movapd %xmm0, %xmm3
movsd .LC4(%rip), %xmm2
movapd %xmm0, %xmm1
andpd %xmm2, %xmm1
movsd .LC1(%rip), %xmm4
ucomisd %xmm1, %xmm4
jbe .L12
cvttsd2siq %xmm0, %rax
pxor %xmm1, %xmm1
cvtsi2sdq %rax, %xmm1
cmpnlesd %xmm1, %xmm3
movsd .LC3(%rip), %xmm4
andpd %xmm4, %xmm3
addsd %xmm1, %xmm3
andnpd %xmm0, %xmm2
orpd %xmm2, %xmm3
.L12:
movl $1024, 44(%rsp)
movl $1, 48(%rsp)
cvttsd2sil %xmm3, %eax
movl %eax, 32(%rsp)
movl $1, 36(%rsp)
movl $0, %r9d
movl $0, %r8d
movq 44(%rsp), %rdx
movl $1, %ecx
movq 32(%rsp), %rdi
movl $1, %esi
call __cudaPushCallConfiguration@PLT
testl %eax, %eax
je .L24
.L13:
call cudaDeviceSynchronize@PLT
movl $2, %ecx
movq %r15, %rdx
movq 16(%rsp), %rsi
movq %rbp, %rdi
call cudaMemcpy@PLT
movl $0, %esi
movl $0, %r8d
testl %r14d, %r14d
jg .L14
.L15:
movq %rbp, %rdi
call free@PLT
movq 16(%rsp), %rdi
call cudaFree@PLT
movq 24(%rsp), %rdi
call cudaFree@PLT
movq 56(%rsp), %rax
subq %fs:40, %rax
jne .L25
addq $72, %rsp
.cfi_remember_state
.cfi_def_cfa_offset 56
popq %rbx
.cfi_def_cfa_offset 48
popq %rbp
.cfi_def_cfa_offset 40
popq %r12
.cfi_def_cfa_offset 32
popq %r13
.cfi_def_cfa_offset 24
popq %r14
.cfi_def_cfa_offset 16
popq %r15
.cfi_def_cfa_offset 8
ret
.L24:
.cfi_restore_state
movl 12(%rsp), %edx
movq 24(%rsp), %rsi
movq 16(%rsp), %rdi
call _Z30__device_stub__Z8countnumPiS_iPiS_i
jmp .L13
.L17:
movslq %r8d, %r9
leaq (%rbx,%r9,4), %rax
movslq %edi, %rcx
addq %r9, %rcx
leaq (%rbx,%rcx,4), %rcx
.L16:
movl %edx, (%rax)
addq $4, %rax
cmpq %rcx, %rax
jne .L16
addl %edi, %r8d
.L18:
addq $1, %rsi
cmpq %rsi, %r12
je .L15
.L14:
movl %esi, %edx
movl 0(%rbp,%rsi,4), %edi
testl %edi, %edi
jg .L17
jmp .L18
.L25:
call __stack_chk_fail@PLT
.cfi_endproc
.LFE2057:
.size _Z13counting_sortPiii, .-_Z13counting_sortPiii
.section .rodata.str1.1,"aMS",@progbits,1
.LC5:
.string "_Z8countnumPiS_i"
.text
.type _ZL24__sti____cudaRegisterAllv, @function
_ZL24__sti____cudaRegisterAllv:
.LFB2085:
.cfi_startproc
endbr64
subq $8, %rsp
.cfi_def_cfa_offset 16
leaq _ZL15__fatDeviceText(%rip), %rdi
call __cudaRegisterFatBinary@PLT
movq %rax, %rdi
movq %rax, _ZL20__cudaFatCubinHandle(%rip)
pushq $0
.cfi_def_cfa_offset 24
pushq $0
.cfi_def_cfa_offset 32
pushq $0
.cfi_def_cfa_offset 40
pushq $0
.cfi_def_cfa_offset 48
movl $0, %r9d
movl $-1, %r8d
leaq .LC5(%rip), %rdx
movq %rdx, %rcx
leaq _Z8countnumPiS_i(%rip), %rsi
call __cudaRegisterFunction@PLT
addq $32, %rsp
.cfi_def_cfa_offset 16
movq _ZL20__cudaFatCubinHandle(%rip), %rdi
call __cudaRegisterFatBinaryEnd@PLT
leaq _ZL26__cudaUnregisterBinaryUtilv(%rip), %rdi
call atexit@PLT
addq $8, %rsp
.cfi_def_cfa_offset 8
ret
.cfi_endproc
.LFE2085:
.size _ZL24__sti____cudaRegisterAllv, .-_ZL24__sti____cudaRegisterAllv
.section .init_array,"aw"
.align 8
.quad _ZL24__sti____cudaRegisterAllv
.section .nvFatBinSegment,"aw"
.align 8
.type _ZL15__fatDeviceText, @object
.size _ZL15__fatDeviceText, 24
_ZL15__fatDeviceText:
.long 1180844977
.long 1
.quad fatbinData
.quad 0
.local _ZL20__cudaFatCubinHandle
.comm _ZL20__cudaFatCubinHandle,8,8
.section .rodata.cst8,"aM",@progbits,8
.align 8
.LC0:
.long 0
.long 1062207488
.align 8
.LC1:
.long 0
.long 1127219200
.align 8
.LC3:
.long 0
.long 1072693248
.align 8
.LC4:
.long -1
.long 2147483647
.ident "GCC: (Ubuntu 13.3.0-6ubuntu2~24.04) 13.3.0"
.section .note.GNU-stack,"",@progbits
.section .note.gnu.property,"a"
.align 8
.long 1f - 0f
.long 4f - 1f
.long 5
0:
.string "GNU"
1:
.align 8
.long 0xc0000002
.long 3f - 2f
2:
.long 0x3
3:
.align 8
4: | .text
.file "counting_sort.hip"
.globl _Z23__device_stub__countnumPiS_i # -- Begin function _Z23__device_stub__countnumPiS_i
.p2align 4, 0x90
.type _Z23__device_stub__countnumPiS_i,@function
_Z23__device_stub__countnumPiS_i: # @_Z23__device_stub__countnumPiS_i
.cfi_startproc
# %bb.0:
subq $104, %rsp
.cfi_def_cfa_offset 112
movq %rdi, 72(%rsp)
movq %rsi, 64(%rsp)
movl %edx, 12(%rsp)
leaq 72(%rsp), %rax
movq %rax, 80(%rsp)
leaq 64(%rsp), %rax
movq %rax, 88(%rsp)
leaq 12(%rsp), %rax
movq %rax, 96(%rsp)
leaq 48(%rsp), %rdi
leaq 32(%rsp), %rsi
leaq 24(%rsp), %rdx
leaq 16(%rsp), %rcx
callq __hipPopCallConfiguration
movq 48(%rsp), %rsi
movl 56(%rsp), %edx
movq 32(%rsp), %rcx
movl 40(%rsp), %r8d
leaq 80(%rsp), %r9
movl $_Z8countnumPiS_i, %edi
pushq 16(%rsp)
.cfi_adjust_cfa_offset 8
pushq 32(%rsp)
.cfi_adjust_cfa_offset 8
callq hipLaunchKernel
addq $120, %rsp
.cfi_adjust_cfa_offset -120
retq
.Lfunc_end0:
.size _Z23__device_stub__countnumPiS_i, .Lfunc_end0-_Z23__device_stub__countnumPiS_i
.cfi_endproc
# -- End function
.section .rodata.cst8,"aM",@progbits,8
.p2align 3, 0x0 # -- Begin function _Z13counting_sortPiii
.LCPI1_0:
.quad 0x3f50000000000000 # double 9.765625E-4
.text
.globl _Z13counting_sortPiii
.p2align 4, 0x90
.type _Z13counting_sortPiii,@function
_Z13counting_sortPiii: # @_Z13counting_sortPiii
.cfi_startproc
# %bb.0:
pushq %rbp
.cfi_def_cfa_offset 16
pushq %r15
.cfi_def_cfa_offset 24
pushq %r14
.cfi_def_cfa_offset 32
pushq %r13
.cfi_def_cfa_offset 40
pushq %r12
.cfi_def_cfa_offset 48
pushq %rbx
.cfi_def_cfa_offset 56
subq $120, %rsp
.cfi_def_cfa_offset 176
.cfi_offset %rbx, -56
.cfi_offset %r12, -48
.cfi_offset %r13, -40
.cfi_offset %r14, -32
.cfi_offset %r15, -24
.cfi_offset %rbp, -16
movl %edx, %r12d
movq %rdi, %rbx
movl %esi, 24(%rsp) # 4-byte Spill
movslq %esi, %rbp
leaq (,%rbp,4), %r13
movq %r13, %rdi
callq malloc
movq %rax, %r14
movslq %r12d, %r15
shlq $2, %r15
leaq 8(%rsp), %rdi
movq %r15, %rsi
callq hipMalloc
movq 8(%rsp), %rdi
xorl %esi, %esi
movq %r15, %rdx
callq hipMemset
leaq 16(%rsp), %rdi
movq %r13, %rsi
callq hipMalloc
movq 16(%rsp), %rdi
movq %rbx, %rsi
movq %r13, %rdx
movl $1, %ecx
callq hipMemcpy
cvtsi2sd %ebp, %xmm0
mulsd .LCPI1_0(%rip), %xmm0
callq ceil@PLT
cvttsd2si %xmm0, %edi
movabsq $4294967296, %rdx # imm = 0x100000000
orq %rdx, %rdi
orq $1024, %rdx # imm = 0x400
movl $1, %esi
movl $1, %ecx
xorl %r8d, %r8d
xorl %r9d, %r9d
callq __hipPushCallConfiguration
testl %eax, %eax
jne .LBB1_2
# %bb.1:
movq 8(%rsp), %rax
movq 16(%rsp), %rcx
movq %rax, 88(%rsp)
movq %rcx, 80(%rsp)
movl 24(%rsp), %eax # 4-byte Reload
movl %eax, 28(%rsp)
leaq 88(%rsp), %rax
movq %rax, 96(%rsp)
leaq 80(%rsp), %rax
movq %rax, 104(%rsp)
leaq 28(%rsp), %rax
movq %rax, 112(%rsp)
leaq 64(%rsp), %rdi
leaq 48(%rsp), %rsi
leaq 40(%rsp), %rdx
leaq 32(%rsp), %rcx
callq __hipPopCallConfiguration
movq 64(%rsp), %rsi
movl 72(%rsp), %edx
movq 48(%rsp), %rcx
movl 56(%rsp), %r8d
leaq 96(%rsp), %r9
movl $_Z8countnumPiS_i, %edi
pushq 32(%rsp)
.cfi_adjust_cfa_offset 8
pushq 48(%rsp)
.cfi_adjust_cfa_offset 8
callq hipLaunchKernel
addq $16, %rsp
.cfi_adjust_cfa_offset -16
.LBB1_2:
callq hipDeviceSynchronize
movq 8(%rsp), %rsi
movq %r14, %rdi
movq %r15, %rdx
movl $2, %ecx
callq hipMemcpy
testl %r12d, %r12d
jle .LBB1_9
# %bb.3: # %.preheader.preheader
movl %r12d, %eax
xorl %ecx, %ecx
xorl %edx, %edx
jmp .LBB1_4
.p2align 4, 0x90
.LBB1_8: # %._crit_edge
# in Loop: Header=BB1_4 Depth=1
incq %rcx
cmpq %rax, %rcx
je .LBB1_9
.LBB1_4: # %.preheader
# =>This Loop Header: Depth=1
# Child Loop BB1_6 Depth 2
movl (%r14,%rcx,4), %esi
testl %esi, %esi
jle .LBB1_8
# %bb.5: # %.lr.ph.preheader
# in Loop: Header=BB1_4 Depth=1
movslq %edx, %rdi
leaq (%rbx,%rdi,4), %r8
xorl %edi, %edi
.p2align 4, 0x90
.LBB1_6: # %.lr.ph
# Parent Loop BB1_4 Depth=1
# => This Inner Loop Header: Depth=2
movl %ecx, (%r8,%rdi,4)
incq %rdi
cmpl %edi, %esi
jne .LBB1_6
# %bb.7: # %._crit_edge.loopexit
# in Loop: Header=BB1_4 Depth=1
addl %edi, %edx
jmp .LBB1_8
.LBB1_9: # %._crit_edge32
movq %r14, %rdi
callq free
movq 8(%rsp), %rdi
callq hipFree
movq 16(%rsp), %rdi
callq hipFree
addq $120, %rsp
.cfi_def_cfa_offset 56
popq %rbx
.cfi_def_cfa_offset 48
popq %r12
.cfi_def_cfa_offset 40
popq %r13
.cfi_def_cfa_offset 32
popq %r14
.cfi_def_cfa_offset 24
popq %r15
.cfi_def_cfa_offset 16
popq %rbp
.cfi_def_cfa_offset 8
retq
.Lfunc_end1:
.size _Z13counting_sortPiii, .Lfunc_end1-_Z13counting_sortPiii
.cfi_endproc
# -- End function
.p2align 4, 0x90 # -- Begin function __hip_module_ctor
.type __hip_module_ctor,@function
__hip_module_ctor: # @__hip_module_ctor
.cfi_startproc
# %bb.0:
subq $40, %rsp
.cfi_def_cfa_offset 48
cmpq $0, __hip_gpubin_handle(%rip)
jne .LBB2_2
# %bb.1:
movl $__hip_fatbin_wrapper, %edi
callq __hipRegisterFatBinary
movq %rax, __hip_gpubin_handle(%rip)
.LBB2_2:
movq __hip_gpubin_handle(%rip), %rdi
xorps %xmm0, %xmm0
movups %xmm0, 16(%rsp)
movups %xmm0, (%rsp)
movl $_Z8countnumPiS_i, %esi
movl $.L__unnamed_1, %edx
movl $.L__unnamed_1, %ecx
movl $-1, %r8d
xorl %r9d, %r9d
callq __hipRegisterFunction
movl $__hip_module_dtor, %edi
addq $40, %rsp
.cfi_def_cfa_offset 8
jmp atexit # TAILCALL
.Lfunc_end2:
.size __hip_module_ctor, .Lfunc_end2-__hip_module_ctor
.cfi_endproc
# -- End function
.p2align 4, 0x90 # -- Begin function __hip_module_dtor
.type __hip_module_dtor,@function
__hip_module_dtor: # @__hip_module_dtor
.cfi_startproc
# %bb.0:
movq __hip_gpubin_handle(%rip), %rdi
testq %rdi, %rdi
je .LBB3_2
# %bb.1:
pushq %rax
.cfi_def_cfa_offset 16
callq __hipUnregisterFatBinary
movq $0, __hip_gpubin_handle(%rip)
addq $8, %rsp
.cfi_def_cfa_offset 8
.LBB3_2:
retq
.Lfunc_end3:
.size __hip_module_dtor, .Lfunc_end3-__hip_module_dtor
.cfi_endproc
# -- End function
.type _Z8countnumPiS_i,@object # @_Z8countnumPiS_i
.section .rodata,"a",@progbits
.globl _Z8countnumPiS_i
.p2align 3, 0x0
_Z8countnumPiS_i:
.quad _Z23__device_stub__countnumPiS_i
.size _Z8countnumPiS_i, 8
.type .L__unnamed_1,@object # @0
.section .rodata.str1.1,"aMS",@progbits,1
.L__unnamed_1:
.asciz "_Z8countnumPiS_i"
.size .L__unnamed_1, 17
.type __hip_fatbin_wrapper,@object # @__hip_fatbin_wrapper
.section .hipFatBinSegment,"a",@progbits
.p2align 3, 0x0
__hip_fatbin_wrapper:
.long 1212764230 # 0x48495046
.long 1 # 0x1
.quad __hip_fatbin
.quad 0
.size __hip_fatbin_wrapper, 24
.type __hip_gpubin_handle,@object # @__hip_gpubin_handle
.local __hip_gpubin_handle
.comm __hip_gpubin_handle,8,8
.section .init_array,"aw",@init_array
.p2align 3, 0x0
.quad __hip_module_ctor
.type __hip_cuid_,@object # @__hip_cuid_
.bss
.globl __hip_cuid_
__hip_cuid_:
.byte 0 # 0x0
.size __hip_cuid_, 1
.section ".linker-options","e",@llvm_linker_options
.ident "AMD clang version 18.0.0git (https://github.com/RadeonOpenCompute/llvm-project roc-6.3.2 25012 e5bf7e55c91490b07c49d8960fa7983d864936c4)"
.section ".note.GNU-stack","",@progbits
.addrsig
.addrsig_sym _Z23__device_stub__countnumPiS_i
.addrsig_sym __hip_module_ctor
.addrsig_sym __hip_module_dtor
.addrsig_sym _Z8countnumPiS_i
.addrsig_sym __hip_fatbin
.addrsig_sym __hip_fatbin_wrapper
.addrsig_sym __hip_cuid_ |
You are a helpful coding assistant specialized in converting CUDA source code to CUDA device assembly. | #include<stdio.h>
#include <stdlib.h>
#define Nrows 3
#define Ncols 5
__global__ void fillMatrix (float *devPtr, size_t pitch)
{
int tid = blockIdx.x * blockDim.x + threadIdx.x;
if (tid < Ncols)
{
*((float * )((char *) devPtr + pitch * 0) + tid) = 1.0f;
*((float * )((char *) devPtr + pitch * 1) + tid) = 3.0f;
*((float * )((char *) devPtr + pitch * 2) + tid) = 5.0f;
}
}
/********/
/* MAIN */
/********/
int main()
{
float *hostPtr;
float *devPtr;
size_t pitch;
hostPtr = (float*)malloc(sizeof(float)*Nrows*Ncols);
cudaMallocPitch(&devPtr, &pitch, Ncols * sizeof(float), Nrows);
fillMatrix<<<1,64>>>(devPtr,pitch);
cudaMemcpy2D(hostPtr, Ncols * sizeof(float), devPtr, pitch, Ncols * sizeof(float), Nrows, cudaMemcpyDeviceToHost);
for (int i = 0; i < Nrows; i++)
for (int j = 0; j < Ncols; j++)
printf("row %i column %i value %f \n", i, j, hostPtr[i*Ncols+j]);
return 0;
} | code for sm_80
Function : _Z10fillMatrixPfm
.headerflags @"EF_CUDA_TEXMODE_UNIFIED EF_CUDA_64BIT_ADDRESS EF_CUDA_SM80 EF_CUDA_VIRTUAL_SM(EF_CUDA_SM80)"
/*0000*/ MOV R1, c[0x0][0x28] ; /* 0x00000a0000017a02 */
/* 0x000fe40000000f00 */
/*0010*/ S2R R3, SR_CTAID.X ; /* 0x0000000000037919 */
/* 0x000e280000002500 */
/*0020*/ S2R R0, SR_TID.X ; /* 0x0000000000007919 */
/* 0x000e240000002100 */
/*0030*/ IMAD R3, R3, c[0x0][0x0], R0 ; /* 0x0000000003037a24 */
/* 0x001fca00078e0200 */
/*0040*/ ISETP.GT.AND P0, PT, R3, 0x4, PT ; /* 0x000000040300780c */
/* 0x000fda0003f04270 */
/*0050*/ @P0 EXIT ; /* 0x000000000000094d */
/* 0x000fea0003800000 */
/*0060*/ ULDC.64 UR4, c[0x0][0x160] ; /* 0x0000580000047ab9 */
/* 0x000fe20000000a00 */
/*0070*/ HFMA2.MMA R2, -RZ, RZ, 0, 2.384185791015625e-07 ; /* 0x00000004ff027435 */
/* 0x000fe200000001ff */
/*0080*/ ULDC.64 UR6, c[0x0][0x168] ; /* 0x00005a0000067ab9 */
/* 0x000fe20000000a00 */
/*0090*/ IMAD.MOV.U32 R9, RZ, RZ, 0x3f800000 ; /* 0x3f800000ff097424 */
/* 0x000fe200078e00ff */
/*00a0*/ UIADD3 UR8, UP0, UR4, UR6, URZ ; /* 0x0000000604087290 */
/* 0x000fe2000ff1e03f */
/*00b0*/ HFMA2.MMA R13, -RZ, RZ, 2.3125, 0 ; /* 0x40a00000ff0d7435 */
/* 0x000fe200000001ff */
/*00c0*/ ULEA UR4, UP1, UR6, UR4, 0x1 ; /* 0x0000000406047291 */
/* 0x000fe2000f82083f */
/*00d0*/ MOV R11, 0x40400000 ; /* 0x40400000000b7802 */
/* 0x000fe20000000f00 */
/*00e0*/ UIADD3.X UR9, UR5, UR7, URZ, UP0, !UPT ; /* 0x0000000705097290 */
/* 0x000fe400087fe43f */
/*00f0*/ ULEA.HI.X UR5, UR6, UR5, UR7, 0x1, UP1 ; /* 0x0000000506057291 */
/* 0x000fe200088f0c07 */
/*0100*/ MOV R4, UR8 ; /* 0x0000000800047c02 */
/* 0x000fe20008000f00 */
/*0110*/ IMAD.U32 R6, RZ, RZ, UR4 ; /* 0x00000004ff067e24 */
/* 0x000fc4000f8e00ff */
/*0120*/ MOV R5, UR9 ; /* 0x0000000900057c02 */
/* 0x000fe40008000f00 */
/*0130*/ IMAD.U32 R7, RZ, RZ, UR5 ; /* 0x00000005ff077e24 */
/* 0x000fe2000f8e00ff */
/*0140*/ ULDC.64 UR4, c[0x0][0x118] ; /* 0x0000460000047ab9 */
/* 0x000fe40000000a00 */
/*0150*/ IMAD.WIDE R4, R3, 0x4, R4 ; /* 0x0000000403047825 */
/* 0x000fc800078e0204 */
/*0160*/ IMAD.WIDE R6, R3, 0x4, R6 ; /* 0x0000000403067825 */
/* 0x000fc800078e0206 */
/*0170*/ IMAD.WIDE R2, R3, R2, c[0x0][0x160] ; /* 0x0000580003027625 */
/* 0x000fca00078e0202 */
/*0180*/ STG.E [R2.64], R9 ; /* 0x0000000902007986 */
/* 0x000fe8000c101904 */
/*0190*/ STG.E [R4.64], R11 ; /* 0x0000000b04007986 */
/* 0x000fe8000c101904 */
/*01a0*/ STG.E [R6.64], R13 ; /* 0x0000000d06007986 */
/* 0x000fe2000c101904 */
/*01b0*/ EXIT ; /* 0x000000000000794d */
/* 0x000fea0003800000 */
/*01c0*/ BRA 0x1c0; /* 0xfffffff000007947 */
/* 0x000fc0000383ffff */
/*01d0*/ NOP; /* 0x0000000000007918 */
/* 0x000fc00000000000 */
/*01e0*/ NOP; /* 0x0000000000007918 */
/* 0x000fc00000000000 */
/*01f0*/ NOP; /* 0x0000000000007918 */
/* 0x000fc00000000000 */
/*0200*/ NOP; /* 0x0000000000007918 */
/* 0x000fc00000000000 */
/*0210*/ NOP; /* 0x0000000000007918 */
/* 0x000fc00000000000 */
/*0220*/ NOP; /* 0x0000000000007918 */
/* 0x000fc00000000000 */
/*0230*/ NOP; /* 0x0000000000007918 */
/* 0x000fc00000000000 */
/*0240*/ NOP; /* 0x0000000000007918 */
/* 0x000fc00000000000 */
/*0250*/ NOP; /* 0x0000000000007918 */
/* 0x000fc00000000000 */
/*0260*/ NOP; /* 0x0000000000007918 */
/* 0x000fc00000000000 */
/*0270*/ NOP; /* 0x0000000000007918 */
/* 0x000fc00000000000 */
.......... |
You are a helpful coding assistant specialized in converting CUDA source code to CUDA host assembly. | #include<stdio.h>
#include <stdlib.h>
#define Nrows 3
#define Ncols 5
__global__ void fillMatrix (float *devPtr, size_t pitch)
{
int tid = blockIdx.x * blockDim.x + threadIdx.x;
if (tid < Ncols)
{
*((float * )((char *) devPtr + pitch * 0) + tid) = 1.0f;
*((float * )((char *) devPtr + pitch * 1) + tid) = 3.0f;
*((float * )((char *) devPtr + pitch * 2) + tid) = 5.0f;
}
}
/********/
/* MAIN */
/********/
int main()
{
float *hostPtr;
float *devPtr;
size_t pitch;
hostPtr = (float*)malloc(sizeof(float)*Nrows*Ncols);
cudaMallocPitch(&devPtr, &pitch, Ncols * sizeof(float), Nrows);
fillMatrix<<<1,64>>>(devPtr,pitch);
cudaMemcpy2D(hostPtr, Ncols * sizeof(float), devPtr, pitch, Ncols * sizeof(float), Nrows, cudaMemcpyDeviceToHost);
for (int i = 0; i < Nrows; i++)
for (int j = 0; j < Ncols; j++)
printf("row %i column %i value %f \n", i, j, hostPtr[i*Ncols+j]);
return 0;
} | .file "tmpxft_0011ec93_00000000-6_test.cudafe1.cpp"
.text
#APP
#NO_APP
.type _ZL26__cudaUnregisterBinaryUtilv, @function
_ZL26__cudaUnregisterBinaryUtilv:
.LFB2060:
.cfi_startproc
endbr64
subq $8, %rsp
.cfi_def_cfa_offset 16
movq _ZL20__cudaFatCubinHandle(%rip), %rdi
call __cudaUnregisterFatBinary@PLT
addq $8, %rsp
.cfi_def_cfa_offset 8
ret
.cfi_endproc
.LFE2060:
.size _ZL26__cudaUnregisterBinaryUtilv, .-_ZL26__cudaUnregisterBinaryUtilv
.globl _Z31__device_stub__Z10fillMatrixPfmPfm
.type _Z31__device_stub__Z10fillMatrixPfmPfm, @function
_Z31__device_stub__Z10fillMatrixPfmPfm:
.LFB2082:
.cfi_startproc
endbr64
subq $120, %rsp
.cfi_def_cfa_offset 128
movq %rdi, 8(%rsp)
movq %rsi, (%rsp)
movq %fs:40, %rax
movq %rax, 104(%rsp)
xorl %eax, %eax
leaq 8(%rsp), %rax
movq %rax, 80(%rsp)
movq %rsp, %rax
movq %rax, 88(%rsp)
movl $1, 32(%rsp)
movl $1, 36(%rsp)
movl $1, 40(%rsp)
movl $1, 44(%rsp)
movl $1, 48(%rsp)
movl $1, 52(%rsp)
leaq 24(%rsp), %rcx
leaq 16(%rsp), %rdx
leaq 44(%rsp), %rsi
leaq 32(%rsp), %rdi
call __cudaPopCallConfiguration@PLT
testl %eax, %eax
je .L7
.L3:
movq 104(%rsp), %rax
subq %fs:40, %rax
jne .L8
addq $120, %rsp
.cfi_remember_state
.cfi_def_cfa_offset 8
ret
.L7:
.cfi_restore_state
pushq 24(%rsp)
.cfi_def_cfa_offset 136
pushq 24(%rsp)
.cfi_def_cfa_offset 144
leaq 96(%rsp), %r9
movq 60(%rsp), %rcx
movl 68(%rsp), %r8d
movq 48(%rsp), %rsi
movl 56(%rsp), %edx
leaq _Z10fillMatrixPfm(%rip), %rdi
call cudaLaunchKernel@PLT
addq $16, %rsp
.cfi_def_cfa_offset 128
jmp .L3
.L8:
call __stack_chk_fail@PLT
.cfi_endproc
.LFE2082:
.size _Z31__device_stub__Z10fillMatrixPfmPfm, .-_Z31__device_stub__Z10fillMatrixPfmPfm
.globl _Z10fillMatrixPfm
.type _Z10fillMatrixPfm, @function
_Z10fillMatrixPfm:
.LFB2083:
.cfi_startproc
endbr64
subq $8, %rsp
.cfi_def_cfa_offset 16
call _Z31__device_stub__Z10fillMatrixPfmPfm
addq $8, %rsp
.cfi_def_cfa_offset 8
ret
.cfi_endproc
.LFE2083:
.size _Z10fillMatrixPfm, .-_Z10fillMatrixPfm
.section .rodata.str1.1,"aMS",@progbits,1
.LC0:
.string "row %i column %i value %f \n"
.text
.globl main
.type main, @function
main:
.LFB2057:
.cfi_startproc
endbr64
pushq %r13
.cfi_def_cfa_offset 16
.cfi_offset 13, -16
pushq %r12
.cfi_def_cfa_offset 24
.cfi_offset 12, -24
pushq %rbp
.cfi_def_cfa_offset 32
.cfi_offset 6, -32
pushq %rbx
.cfi_def_cfa_offset 40
.cfi_offset 3, -40
subq $56, %rsp
.cfi_def_cfa_offset 96
movq %fs:40, %rax
movq %rax, 40(%rsp)
xorl %eax, %eax
movl $60, %edi
call malloc@PLT
movq %rax, %rbp
leaq 8(%rsp), %rsi
movq %rsp, %rdi
movl $3, %ecx
movl $20, %edx
call cudaMallocPitch@PLT
movl $64, 28(%rsp)
movl $1, 32(%rsp)
movl $1, 16(%rsp)
movl $1, 20(%rsp)
movl $0, %r9d
movl $0, %r8d
movq 28(%rsp), %rdx
movl $1, %ecx
movq 16(%rsp), %rdi
movl $1, %esi
call __cudaPushCallConfiguration@PLT
testl %eax, %eax
je .L19
.L12:
subq $8, %rsp
.cfi_def_cfa_offset 104
pushq $2
.cfi_def_cfa_offset 112
movl $3, %r9d
movl $20, %r8d
movq 24(%rsp), %rcx
movq 16(%rsp), %rdx
movl $20, %esi
movq %rbp, %rdi
call cudaMemcpy2D@PLT
addq $16, %rsp
.cfi_def_cfa_offset 96
movl $0, %r12d
leaq .LC0(%rip), %r13
.L13:
movl $0, %ebx
.L14:
pxor %xmm0, %xmm0
cvtss2sd 0(%rbp,%rbx,4), %xmm0
movl %ebx, %ecx
movl %r12d, %edx
movq %r13, %rsi
movl $2, %edi
movl $1, %eax
call __printf_chk@PLT
addq $1, %rbx
cmpq $5, %rbx
jne .L14
addl $1, %r12d
addq $20, %rbp
cmpl $3, %r12d
jne .L13
movq 40(%rsp), %rax
subq %fs:40, %rax
jne .L20
movl $0, %eax
addq $56, %rsp
.cfi_remember_state
.cfi_def_cfa_offset 40
popq %rbx
.cfi_def_cfa_offset 32
popq %rbp
.cfi_def_cfa_offset 24
popq %r12
.cfi_def_cfa_offset 16
popq %r13
.cfi_def_cfa_offset 8
ret
.L19:
.cfi_restore_state
movq 8(%rsp), %rsi
movq (%rsp), %rdi
call _Z31__device_stub__Z10fillMatrixPfmPfm
jmp .L12
.L20:
call __stack_chk_fail@PLT
.cfi_endproc
.LFE2057:
.size main, .-main
.section .rodata.str1.1
.LC1:
.string "_Z10fillMatrixPfm"
.text
.type _ZL24__sti____cudaRegisterAllv, @function
_ZL24__sti____cudaRegisterAllv:
.LFB2085:
.cfi_startproc
endbr64
subq $8, %rsp
.cfi_def_cfa_offset 16
leaq _ZL15__fatDeviceText(%rip), %rdi
call __cudaRegisterFatBinary@PLT
movq %rax, %rdi
movq %rax, _ZL20__cudaFatCubinHandle(%rip)
pushq $0
.cfi_def_cfa_offset 24
pushq $0
.cfi_def_cfa_offset 32
pushq $0
.cfi_def_cfa_offset 40
pushq $0
.cfi_def_cfa_offset 48
movl $0, %r9d
movl $-1, %r8d
leaq .LC1(%rip), %rdx
movq %rdx, %rcx
leaq _Z10fillMatrixPfm(%rip), %rsi
call __cudaRegisterFunction@PLT
addq $32, %rsp
.cfi_def_cfa_offset 16
movq _ZL20__cudaFatCubinHandle(%rip), %rdi
call __cudaRegisterFatBinaryEnd@PLT
leaq _ZL26__cudaUnregisterBinaryUtilv(%rip), %rdi
call atexit@PLT
addq $8, %rsp
.cfi_def_cfa_offset 8
ret
.cfi_endproc
.LFE2085:
.size _ZL24__sti____cudaRegisterAllv, .-_ZL24__sti____cudaRegisterAllv
.section .init_array,"aw"
.align 8
.quad _ZL24__sti____cudaRegisterAllv
.section .nvFatBinSegment,"aw"
.align 8
.type _ZL15__fatDeviceText, @object
.size _ZL15__fatDeviceText, 24
_ZL15__fatDeviceText:
.long 1180844977
.long 1
.quad fatbinData
.quad 0
.local _ZL20__cudaFatCubinHandle
.comm _ZL20__cudaFatCubinHandle,8,8
.ident "GCC: (Ubuntu 13.3.0-6ubuntu2~24.04) 13.3.0"
.section .note.GNU-stack,"",@progbits
.section .note.gnu.property,"a"
.align 8
.long 1f - 0f
.long 4f - 1f
.long 5
0:
.string "GNU"
1:
.align 8
.long 0xc0000002
.long 3f - 2f
2:
.long 0x3
3:
.align 8
4: |
You are a helpful coding assistant specialized in converting CUDA source code to HIP/AMD source code. | #include<stdio.h>
#include <stdlib.h>
#define Nrows 3
#define Ncols 5
__global__ void fillMatrix (float *devPtr, size_t pitch)
{
int tid = blockIdx.x * blockDim.x + threadIdx.x;
if (tid < Ncols)
{
*((float * )((char *) devPtr + pitch * 0) + tid) = 1.0f;
*((float * )((char *) devPtr + pitch * 1) + tid) = 3.0f;
*((float * )((char *) devPtr + pitch * 2) + tid) = 5.0f;
}
}
/********/
/* MAIN */
/********/
int main()
{
float *hostPtr;
float *devPtr;
size_t pitch;
hostPtr = (float*)malloc(sizeof(float)*Nrows*Ncols);
cudaMallocPitch(&devPtr, &pitch, Ncols * sizeof(float), Nrows);
fillMatrix<<<1,64>>>(devPtr,pitch);
cudaMemcpy2D(hostPtr, Ncols * sizeof(float), devPtr, pitch, Ncols * sizeof(float), Nrows, cudaMemcpyDeviceToHost);
for (int i = 0; i < Nrows; i++)
for (int j = 0; j < Ncols; j++)
printf("row %i column %i value %f \n", i, j, hostPtr[i*Ncols+j]);
return 0;
} | #include <hip/hip_runtime.h>
#include<stdio.h>
#include <stdlib.h>
#define Nrows 3
#define Ncols 5
__global__ void fillMatrix (float *devPtr, size_t pitch)
{
int tid = blockIdx.x * blockDim.x + threadIdx.x;
if (tid < Ncols)
{
*((float * )((char *) devPtr + pitch * 0) + tid) = 1.0f;
*((float * )((char *) devPtr + pitch * 1) + tid) = 3.0f;
*((float * )((char *) devPtr + pitch * 2) + tid) = 5.0f;
}
}
/********/
/* MAIN */
/********/
int main()
{
float *hostPtr;
float *devPtr;
size_t pitch;
hostPtr = (float*)malloc(sizeof(float)*Nrows*Ncols);
hipMallocPitch(&devPtr, &pitch, Ncols * sizeof(float), Nrows);
fillMatrix<<<1,64>>>(devPtr,pitch);
hipMemcpy2D(hostPtr, Ncols * sizeof(float), devPtr, pitch, Ncols * sizeof(float), Nrows, hipMemcpyDeviceToHost);
for (int i = 0; i < Nrows; i++)
for (int j = 0; j < Ncols; j++)
printf("row %i column %i value %f \n", i, j, hostPtr[i*Ncols+j]);
return 0;
} |
You are a helpful coding assistant specialized in converting HIP source code to AMD device assembly. | #include <hip/hip_runtime.h>
#include<stdio.h>
#include <stdlib.h>
#define Nrows 3
#define Ncols 5
__global__ void fillMatrix (float *devPtr, size_t pitch)
{
int tid = blockIdx.x * blockDim.x + threadIdx.x;
if (tid < Ncols)
{
*((float * )((char *) devPtr + pitch * 0) + tid) = 1.0f;
*((float * )((char *) devPtr + pitch * 1) + tid) = 3.0f;
*((float * )((char *) devPtr + pitch * 2) + tid) = 5.0f;
}
}
/********/
/* MAIN */
/********/
int main()
{
float *hostPtr;
float *devPtr;
size_t pitch;
hostPtr = (float*)malloc(sizeof(float)*Nrows*Ncols);
hipMallocPitch(&devPtr, &pitch, Ncols * sizeof(float), Nrows);
fillMatrix<<<1,64>>>(devPtr,pitch);
hipMemcpy2D(hostPtr, Ncols * sizeof(float), devPtr, pitch, Ncols * sizeof(float), Nrows, hipMemcpyDeviceToHost);
for (int i = 0; i < Nrows; i++)
for (int j = 0; j < Ncols; j++)
printf("row %i column %i value %f \n", i, j, hostPtr[i*Ncols+j]);
return 0;
} | .text
.amdgcn_target "amdgcn-amd-amdhsa--gfx1100"
.protected _Z10fillMatrixPfm
.globl _Z10fillMatrixPfm
.p2align 8
.type _Z10fillMatrixPfm,@function
_Z10fillMatrixPfm:
s_load_b32 s2, s[0:1], 0x1c
s_waitcnt lgkmcnt(0)
s_and_b32 s2, s2, 0xffff
s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
v_mad_u64_u32 v[1:2], null, s15, s2, v[0:1]
s_mov_b32 s2, exec_lo
v_cmpx_gt_i32_e32 5, v1
s_cbranch_execz .LBB0_2
s_load_b128 s[0:3], s[0:1], 0x0
v_ashrrev_i32_e32 v2, 31, v1
v_dual_mov_b32 v6, 1.0 :: v_dual_mov_b32 v7, 0x40400000
v_mov_b32_e32 v8, 0x40a00000
s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_1) | instid1(VALU_DEP_1)
v_lshlrev_b64 v[0:1], 2, v[1:2]
s_waitcnt lgkmcnt(0)
v_add_co_u32 v2, vcc_lo, s0, v0
s_add_u32 s4, s0, s2
s_delay_alu instid0(VALU_DEP_2)
v_add_co_ci_u32_e32 v3, vcc_lo, s1, v1, vcc_lo
s_addc_u32 s5, s1, s3
s_lshl_b64 s[2:3], s[2:3], 1
v_add_co_u32 v4, vcc_lo, s4, v0
s_add_u32 s0, s0, s2
v_add_co_ci_u32_e32 v5, vcc_lo, s5, v1, vcc_lo
s_addc_u32 s1, s1, s3
v_add_co_u32 v0, vcc_lo, s0, v0
v_add_co_ci_u32_e32 v1, vcc_lo, s1, v1, vcc_lo
s_clause 0x2
global_store_b32 v[2:3], v6, off
global_store_b32 v[4:5], v7, off
global_store_b32 v[0:1], v8, off
.LBB0_2:
s_nop 0
s_sendmsg sendmsg(MSG_DEALLOC_VGPRS)
s_endpgm
.section .rodata,"a",@progbits
.p2align 6, 0x0
.amdhsa_kernel _Z10fillMatrixPfm
.amdhsa_group_segment_fixed_size 0
.amdhsa_private_segment_fixed_size 0
.amdhsa_kernarg_size 272
.amdhsa_user_sgpr_count 15
.amdhsa_user_sgpr_dispatch_ptr 0
.amdhsa_user_sgpr_queue_ptr 0
.amdhsa_user_sgpr_kernarg_segment_ptr 1
.amdhsa_user_sgpr_dispatch_id 0
.amdhsa_user_sgpr_private_segment_size 0
.amdhsa_wavefront_size32 1
.amdhsa_uses_dynamic_stack 0
.amdhsa_enable_private_segment 0
.amdhsa_system_sgpr_workgroup_id_x 1
.amdhsa_system_sgpr_workgroup_id_y 0
.amdhsa_system_sgpr_workgroup_id_z 0
.amdhsa_system_sgpr_workgroup_info 0
.amdhsa_system_vgpr_workitem_id 0
.amdhsa_next_free_vgpr 9
.amdhsa_next_free_sgpr 16
.amdhsa_float_round_mode_32 0
.amdhsa_float_round_mode_16_64 0
.amdhsa_float_denorm_mode_32 3
.amdhsa_float_denorm_mode_16_64 3
.amdhsa_dx10_clamp 1
.amdhsa_ieee_mode 1
.amdhsa_fp16_overflow 0
.amdhsa_workgroup_processor_mode 1
.amdhsa_memory_ordered 1
.amdhsa_forward_progress 0
.amdhsa_shared_vgpr_count 0
.amdhsa_exception_fp_ieee_invalid_op 0
.amdhsa_exception_fp_denorm_src 0
.amdhsa_exception_fp_ieee_div_zero 0
.amdhsa_exception_fp_ieee_overflow 0
.amdhsa_exception_fp_ieee_underflow 0
.amdhsa_exception_fp_ieee_inexact 0
.amdhsa_exception_int_div_zero 0
.end_amdhsa_kernel
.text
.Lfunc_end0:
.size _Z10fillMatrixPfm, .Lfunc_end0-_Z10fillMatrixPfm
.section .AMDGPU.csdata,"",@progbits
.text
.p2alignl 7, 3214868480
.fill 96, 4, 3214868480
.type __hip_cuid_,@object
.section .bss,"aw",@nobits
.globl __hip_cuid_
__hip_cuid_:
.byte 0
.size __hip_cuid_, 1
.ident "AMD clang version 18.0.0git (https://github.com/RadeonOpenCompute/llvm-project roc-6.3.2 25012 e5bf7e55c91490b07c49d8960fa7983d864936c4)"
.section ".note.GNU-stack","",@progbits
.addrsig
.addrsig_sym __hip_cuid_
.amdgpu_metadata
---
amdhsa.kernels:
- .args:
- .address_space: global
.offset: 0
.size: 8
.value_kind: global_buffer
- .offset: 8
.size: 8
.value_kind: by_value
- .offset: 16
.size: 4
.value_kind: hidden_block_count_x
- .offset: 20
.size: 4
.value_kind: hidden_block_count_y
- .offset: 24
.size: 4
.value_kind: hidden_block_count_z
- .offset: 28
.size: 2
.value_kind: hidden_group_size_x
- .offset: 30
.size: 2
.value_kind: hidden_group_size_y
- .offset: 32
.size: 2
.value_kind: hidden_group_size_z
- .offset: 34
.size: 2
.value_kind: hidden_remainder_x
- .offset: 36
.size: 2
.value_kind: hidden_remainder_y
- .offset: 38
.size: 2
.value_kind: hidden_remainder_z
- .offset: 56
.size: 8
.value_kind: hidden_global_offset_x
- .offset: 64
.size: 8
.value_kind: hidden_global_offset_y
- .offset: 72
.size: 8
.value_kind: hidden_global_offset_z
- .offset: 80
.size: 2
.value_kind: hidden_grid_dims
.group_segment_fixed_size: 0
.kernarg_segment_align: 8
.kernarg_segment_size: 272
.language: OpenCL C
.language_version:
- 2
- 0
.max_flat_workgroup_size: 1024
.name: _Z10fillMatrixPfm
.private_segment_fixed_size: 0
.sgpr_count: 18
.sgpr_spill_count: 0
.symbol: _Z10fillMatrixPfm.kd
.uniform_work_group_size: 1
.uses_dynamic_stack: false
.vgpr_count: 9
.vgpr_spill_count: 0
.wavefront_size: 32
.workgroup_processor_mode: 1
amdhsa.target: amdgcn-amd-amdhsa--gfx1100
amdhsa.version:
- 1
- 2
...
.end_amdgpu_metadata |
You are a helpful coding assistant specialized in converting HIP source code to AMD host assembly. | #include <hip/hip_runtime.h>
#include<stdio.h>
#include <stdlib.h>
#define Nrows 3
#define Ncols 5
__global__ void fillMatrix (float *devPtr, size_t pitch)
{
int tid = blockIdx.x * blockDim.x + threadIdx.x;
if (tid < Ncols)
{
*((float * )((char *) devPtr + pitch * 0) + tid) = 1.0f;
*((float * )((char *) devPtr + pitch * 1) + tid) = 3.0f;
*((float * )((char *) devPtr + pitch * 2) + tid) = 5.0f;
}
}
/********/
/* MAIN */
/********/
int main()
{
float *hostPtr;
float *devPtr;
size_t pitch;
hostPtr = (float*)malloc(sizeof(float)*Nrows*Ncols);
hipMallocPitch(&devPtr, &pitch, Ncols * sizeof(float), Nrows);
fillMatrix<<<1,64>>>(devPtr,pitch);
hipMemcpy2D(hostPtr, Ncols * sizeof(float), devPtr, pitch, Ncols * sizeof(float), Nrows, hipMemcpyDeviceToHost);
for (int i = 0; i < Nrows; i++)
for (int j = 0; j < Ncols; j++)
printf("row %i column %i value %f \n", i, j, hostPtr[i*Ncols+j]);
return 0;
} | .text
.file "test.hip"
.globl _Z25__device_stub__fillMatrixPfm # -- Begin function _Z25__device_stub__fillMatrixPfm
.p2align 4, 0x90
.type _Z25__device_stub__fillMatrixPfm,@function
_Z25__device_stub__fillMatrixPfm: # @_Z25__device_stub__fillMatrixPfm
.cfi_startproc
# %bb.0:
subq $88, %rsp
.cfi_def_cfa_offset 96
movq %rdi, 56(%rsp)
movq %rsi, 48(%rsp)
leaq 56(%rsp), %rax
movq %rax, 64(%rsp)
leaq 48(%rsp), %rax
movq %rax, 72(%rsp)
leaq 32(%rsp), %rdi
leaq 16(%rsp), %rsi
leaq 8(%rsp), %rdx
movq %rsp, %rcx
callq __hipPopCallConfiguration
movq 32(%rsp), %rsi
movl 40(%rsp), %edx
movq 16(%rsp), %rcx
movl 24(%rsp), %r8d
leaq 64(%rsp), %r9
movl $_Z10fillMatrixPfm, %edi
pushq (%rsp)
.cfi_adjust_cfa_offset 8
pushq 16(%rsp)
.cfi_adjust_cfa_offset 8
callq hipLaunchKernel
addq $104, %rsp
.cfi_adjust_cfa_offset -104
retq
.Lfunc_end0:
.size _Z25__device_stub__fillMatrixPfm, .Lfunc_end0-_Z25__device_stub__fillMatrixPfm
.cfi_endproc
# -- End function
.globl main # -- Begin function main
.p2align 4, 0x90
.type main,@function
main: # @main
.cfi_startproc
# %bb.0:
pushq %r15
.cfi_def_cfa_offset 16
pushq %r14
.cfi_def_cfa_offset 24
pushq %rbx
.cfi_def_cfa_offset 32
subq $96, %rsp
.cfi_def_cfa_offset 128
.cfi_offset %rbx, -32
.cfi_offset %r14, -24
.cfi_offset %r15, -16
movl $60, %edi
callq malloc
movq %rax, %rbx
leaq 8(%rsp), %rdi
movq %rsp, %rsi
movl $20, %edx
movl $3, %ecx
callq hipMallocPitch
movabsq $4294967297, %rdi # imm = 0x100000001
leaq 63(%rdi), %rdx
movl $1, %esi
movl $1, %ecx
xorl %r8d, %r8d
xorl %r9d, %r9d
callq __hipPushCallConfiguration
testl %eax, %eax
jne .LBB1_2
# %bb.1:
movq 8(%rsp), %rax
movq (%rsp), %rcx
movq %rax, 72(%rsp)
movq %rcx, 64(%rsp)
leaq 72(%rsp), %rax
movq %rax, 80(%rsp)
leaq 64(%rsp), %rax
movq %rax, 88(%rsp)
leaq 48(%rsp), %rdi
leaq 32(%rsp), %rsi
leaq 24(%rsp), %rdx
leaq 16(%rsp), %rcx
callq __hipPopCallConfiguration
movq 48(%rsp), %rsi
movl 56(%rsp), %edx
movq 32(%rsp), %rcx
movl 40(%rsp), %r8d
leaq 80(%rsp), %r9
movl $_Z10fillMatrixPfm, %edi
pushq 16(%rsp)
.cfi_adjust_cfa_offset 8
pushq 32(%rsp)
.cfi_adjust_cfa_offset 8
callq hipLaunchKernel
addq $16, %rsp
.cfi_adjust_cfa_offset -16
.LBB1_2:
movq 8(%rsp), %rdx
movq (%rsp), %rcx
subq $8, %rsp
.cfi_adjust_cfa_offset 8
movl $20, %esi
movl $20, %r8d
movl $3, %r9d
movq %rbx, %rdi
pushq $2
.cfi_adjust_cfa_offset 8
callq hipMemcpy2D
addq $16, %rsp
.cfi_adjust_cfa_offset -16
xorl %r14d, %r14d
.p2align 4, 0x90
.LBB1_3: # %.preheader
# =>This Loop Header: Depth=1
# Child Loop BB1_4 Depth 2
xorl %r15d, %r15d
.p2align 4, 0x90
.LBB1_4: # Parent Loop BB1_3 Depth=1
# => This Inner Loop Header: Depth=2
movss (%rbx,%r15,4), %xmm0 # xmm0 = mem[0],zero,zero,zero
cvtss2sd %xmm0, %xmm0
movl $.L.str, %edi
movl %r14d, %esi
movl %r15d, %edx
movb $1, %al
callq printf
incq %r15
cmpq $5, %r15
jne .LBB1_4
# %bb.5: # in Loop: Header=BB1_3 Depth=1
incq %r14
addq $20, %rbx
cmpq $3, %r14
jne .LBB1_3
# %bb.6:
xorl %eax, %eax
addq $96, %rsp
.cfi_def_cfa_offset 32
popq %rbx
.cfi_def_cfa_offset 24
popq %r14
.cfi_def_cfa_offset 16
popq %r15
.cfi_def_cfa_offset 8
retq
.Lfunc_end1:
.size main, .Lfunc_end1-main
.cfi_endproc
# -- End function
.p2align 4, 0x90 # -- Begin function __hip_module_ctor
.type __hip_module_ctor,@function
__hip_module_ctor: # @__hip_module_ctor
.cfi_startproc
# %bb.0:
subq $40, %rsp
.cfi_def_cfa_offset 48
cmpq $0, __hip_gpubin_handle(%rip)
jne .LBB2_2
# %bb.1:
movl $__hip_fatbin_wrapper, %edi
callq __hipRegisterFatBinary
movq %rax, __hip_gpubin_handle(%rip)
.LBB2_2:
movq __hip_gpubin_handle(%rip), %rdi
xorps %xmm0, %xmm0
movups %xmm0, 16(%rsp)
movups %xmm0, (%rsp)
movl $_Z10fillMatrixPfm, %esi
movl $.L__unnamed_1, %edx
movl $.L__unnamed_1, %ecx
movl $-1, %r8d
xorl %r9d, %r9d
callq __hipRegisterFunction
movl $__hip_module_dtor, %edi
addq $40, %rsp
.cfi_def_cfa_offset 8
jmp atexit # TAILCALL
.Lfunc_end2:
.size __hip_module_ctor, .Lfunc_end2-__hip_module_ctor
.cfi_endproc
# -- End function
.p2align 4, 0x90 # -- Begin function __hip_module_dtor
.type __hip_module_dtor,@function
__hip_module_dtor: # @__hip_module_dtor
.cfi_startproc
# %bb.0:
movq __hip_gpubin_handle(%rip), %rdi
testq %rdi, %rdi
je .LBB3_2
# %bb.1:
pushq %rax
.cfi_def_cfa_offset 16
callq __hipUnregisterFatBinary
movq $0, __hip_gpubin_handle(%rip)
addq $8, %rsp
.cfi_def_cfa_offset 8
.LBB3_2:
retq
.Lfunc_end3:
.size __hip_module_dtor, .Lfunc_end3-__hip_module_dtor
.cfi_endproc
# -- End function
.type _Z10fillMatrixPfm,@object # @_Z10fillMatrixPfm
.section .rodata,"a",@progbits
.globl _Z10fillMatrixPfm
.p2align 3, 0x0
_Z10fillMatrixPfm:
.quad _Z25__device_stub__fillMatrixPfm
.size _Z10fillMatrixPfm, 8
.type .L.str,@object # @.str
.section .rodata.str1.1,"aMS",@progbits,1
.L.str:
.asciz "row %i column %i value %f \n"
.size .L.str, 28
.type .L__unnamed_1,@object # @0
.L__unnamed_1:
.asciz "_Z10fillMatrixPfm"
.size .L__unnamed_1, 18
.type __hip_fatbin_wrapper,@object # @__hip_fatbin_wrapper
.section .hipFatBinSegment,"a",@progbits
.p2align 3, 0x0
__hip_fatbin_wrapper:
.long 1212764230 # 0x48495046
.long 1 # 0x1
.quad __hip_fatbin
.quad 0
.size __hip_fatbin_wrapper, 24
.type __hip_gpubin_handle,@object # @__hip_gpubin_handle
.local __hip_gpubin_handle
.comm __hip_gpubin_handle,8,8
.section .init_array,"aw",@init_array
.p2align 3, 0x0
.quad __hip_module_ctor
.type __hip_cuid_,@object # @__hip_cuid_
.bss
.globl __hip_cuid_
__hip_cuid_:
.byte 0 # 0x0
.size __hip_cuid_, 1
.section ".linker-options","e",@llvm_linker_options
.ident "AMD clang version 18.0.0git (https://github.com/RadeonOpenCompute/llvm-project roc-6.3.2 25012 e5bf7e55c91490b07c49d8960fa7983d864936c4)"
.section ".note.GNU-stack","",@progbits
.addrsig
.addrsig_sym _Z25__device_stub__fillMatrixPfm
.addrsig_sym __hip_module_ctor
.addrsig_sym __hip_module_dtor
.addrsig_sym _Z10fillMatrixPfm
.addrsig_sym __hip_fatbin
.addrsig_sym __hip_fatbin_wrapper
.addrsig_sym __hip_cuid_ |
You are a helpful coding assistant specialized in converting from CUDA device assembly to AMD device assembly. | code for sm_80
Function : _Z10fillMatrixPfm
.headerflags @"EF_CUDA_TEXMODE_UNIFIED EF_CUDA_64BIT_ADDRESS EF_CUDA_SM80 EF_CUDA_VIRTUAL_SM(EF_CUDA_SM80)"
/*0000*/ MOV R1, c[0x0][0x28] ; /* 0x00000a0000017a02 */
/* 0x000fe40000000f00 */
/*0010*/ S2R R3, SR_CTAID.X ; /* 0x0000000000037919 */
/* 0x000e280000002500 */
/*0020*/ S2R R0, SR_TID.X ; /* 0x0000000000007919 */
/* 0x000e240000002100 */
/*0030*/ IMAD R3, R3, c[0x0][0x0], R0 ; /* 0x0000000003037a24 */
/* 0x001fca00078e0200 */
/*0040*/ ISETP.GT.AND P0, PT, R3, 0x4, PT ; /* 0x000000040300780c */
/* 0x000fda0003f04270 */
/*0050*/ @P0 EXIT ; /* 0x000000000000094d */
/* 0x000fea0003800000 */
/*0060*/ ULDC.64 UR4, c[0x0][0x160] ; /* 0x0000580000047ab9 */
/* 0x000fe20000000a00 */
/*0070*/ HFMA2.MMA R2, -RZ, RZ, 0, 2.384185791015625e-07 ; /* 0x00000004ff027435 */
/* 0x000fe200000001ff */
/*0080*/ ULDC.64 UR6, c[0x0][0x168] ; /* 0x00005a0000067ab9 */
/* 0x000fe20000000a00 */
/*0090*/ IMAD.MOV.U32 R9, RZ, RZ, 0x3f800000 ; /* 0x3f800000ff097424 */
/* 0x000fe200078e00ff */
/*00a0*/ UIADD3 UR8, UP0, UR4, UR6, URZ ; /* 0x0000000604087290 */
/* 0x000fe2000ff1e03f */
/*00b0*/ HFMA2.MMA R13, -RZ, RZ, 2.3125, 0 ; /* 0x40a00000ff0d7435 */
/* 0x000fe200000001ff */
/*00c0*/ ULEA UR4, UP1, UR6, UR4, 0x1 ; /* 0x0000000406047291 */
/* 0x000fe2000f82083f */
/*00d0*/ MOV R11, 0x40400000 ; /* 0x40400000000b7802 */
/* 0x000fe20000000f00 */
/*00e0*/ UIADD3.X UR9, UR5, UR7, URZ, UP0, !UPT ; /* 0x0000000705097290 */
/* 0x000fe400087fe43f */
/*00f0*/ ULEA.HI.X UR5, UR6, UR5, UR7, 0x1, UP1 ; /* 0x0000000506057291 */
/* 0x000fe200088f0c07 */
/*0100*/ MOV R4, UR8 ; /* 0x0000000800047c02 */
/* 0x000fe20008000f00 */
/*0110*/ IMAD.U32 R6, RZ, RZ, UR4 ; /* 0x00000004ff067e24 */
/* 0x000fc4000f8e00ff */
/*0120*/ MOV R5, UR9 ; /* 0x0000000900057c02 */
/* 0x000fe40008000f00 */
/*0130*/ IMAD.U32 R7, RZ, RZ, UR5 ; /* 0x00000005ff077e24 */
/* 0x000fe2000f8e00ff */
/*0140*/ ULDC.64 UR4, c[0x0][0x118] ; /* 0x0000460000047ab9 */
/* 0x000fe40000000a00 */
/*0150*/ IMAD.WIDE R4, R3, 0x4, R4 ; /* 0x0000000403047825 */
/* 0x000fc800078e0204 */
/*0160*/ IMAD.WIDE R6, R3, 0x4, R6 ; /* 0x0000000403067825 */
/* 0x000fc800078e0206 */
/*0170*/ IMAD.WIDE R2, R3, R2, c[0x0][0x160] ; /* 0x0000580003027625 */
/* 0x000fca00078e0202 */
/*0180*/ STG.E [R2.64], R9 ; /* 0x0000000902007986 */
/* 0x000fe8000c101904 */
/*0190*/ STG.E [R4.64], R11 ; /* 0x0000000b04007986 */
/* 0x000fe8000c101904 */
/*01a0*/ STG.E [R6.64], R13 ; /* 0x0000000d06007986 */
/* 0x000fe2000c101904 */
/*01b0*/ EXIT ; /* 0x000000000000794d */
/* 0x000fea0003800000 */
/*01c0*/ BRA 0x1c0; /* 0xfffffff000007947 */
/* 0x000fc0000383ffff */
/*01d0*/ NOP; /* 0x0000000000007918 */
/* 0x000fc00000000000 */
/*01e0*/ NOP; /* 0x0000000000007918 */
/* 0x000fc00000000000 */
/*01f0*/ NOP; /* 0x0000000000007918 */
/* 0x000fc00000000000 */
/*0200*/ NOP; /* 0x0000000000007918 */
/* 0x000fc00000000000 */
/*0210*/ NOP; /* 0x0000000000007918 */
/* 0x000fc00000000000 */
/*0220*/ NOP; /* 0x0000000000007918 */
/* 0x000fc00000000000 */
/*0230*/ NOP; /* 0x0000000000007918 */
/* 0x000fc00000000000 */
/*0240*/ NOP; /* 0x0000000000007918 */
/* 0x000fc00000000000 */
/*0250*/ NOP; /* 0x0000000000007918 */
/* 0x000fc00000000000 */
/*0260*/ NOP; /* 0x0000000000007918 */
/* 0x000fc00000000000 */
/*0270*/ NOP; /* 0x0000000000007918 */
/* 0x000fc00000000000 */
.......... | .text
.amdgcn_target "amdgcn-amd-amdhsa--gfx1100"
.protected _Z10fillMatrixPfm
.globl _Z10fillMatrixPfm
.p2align 8
.type _Z10fillMatrixPfm,@function
_Z10fillMatrixPfm:
s_load_b32 s2, s[0:1], 0x1c
s_waitcnt lgkmcnt(0)
s_and_b32 s2, s2, 0xffff
s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
v_mad_u64_u32 v[1:2], null, s15, s2, v[0:1]
s_mov_b32 s2, exec_lo
v_cmpx_gt_i32_e32 5, v1
s_cbranch_execz .LBB0_2
s_load_b128 s[0:3], s[0:1], 0x0
v_ashrrev_i32_e32 v2, 31, v1
v_dual_mov_b32 v6, 1.0 :: v_dual_mov_b32 v7, 0x40400000
v_mov_b32_e32 v8, 0x40a00000
s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_1) | instid1(VALU_DEP_1)
v_lshlrev_b64 v[0:1], 2, v[1:2]
s_waitcnt lgkmcnt(0)
v_add_co_u32 v2, vcc_lo, s0, v0
s_add_u32 s4, s0, s2
s_delay_alu instid0(VALU_DEP_2)
v_add_co_ci_u32_e32 v3, vcc_lo, s1, v1, vcc_lo
s_addc_u32 s5, s1, s3
s_lshl_b64 s[2:3], s[2:3], 1
v_add_co_u32 v4, vcc_lo, s4, v0
s_add_u32 s0, s0, s2
v_add_co_ci_u32_e32 v5, vcc_lo, s5, v1, vcc_lo
s_addc_u32 s1, s1, s3
v_add_co_u32 v0, vcc_lo, s0, v0
v_add_co_ci_u32_e32 v1, vcc_lo, s1, v1, vcc_lo
s_clause 0x2
global_store_b32 v[2:3], v6, off
global_store_b32 v[4:5], v7, off
global_store_b32 v[0:1], v8, off
.LBB0_2:
s_nop 0
s_sendmsg sendmsg(MSG_DEALLOC_VGPRS)
s_endpgm
.section .rodata,"a",@progbits
.p2align 6, 0x0
.amdhsa_kernel _Z10fillMatrixPfm
.amdhsa_group_segment_fixed_size 0
.amdhsa_private_segment_fixed_size 0
.amdhsa_kernarg_size 272
.amdhsa_user_sgpr_count 15
.amdhsa_user_sgpr_dispatch_ptr 0
.amdhsa_user_sgpr_queue_ptr 0
.amdhsa_user_sgpr_kernarg_segment_ptr 1
.amdhsa_user_sgpr_dispatch_id 0
.amdhsa_user_sgpr_private_segment_size 0
.amdhsa_wavefront_size32 1
.amdhsa_uses_dynamic_stack 0
.amdhsa_enable_private_segment 0
.amdhsa_system_sgpr_workgroup_id_x 1
.amdhsa_system_sgpr_workgroup_id_y 0
.amdhsa_system_sgpr_workgroup_id_z 0
.amdhsa_system_sgpr_workgroup_info 0
.amdhsa_system_vgpr_workitem_id 0
.amdhsa_next_free_vgpr 9
.amdhsa_next_free_sgpr 16
.amdhsa_float_round_mode_32 0
.amdhsa_float_round_mode_16_64 0
.amdhsa_float_denorm_mode_32 3
.amdhsa_float_denorm_mode_16_64 3
.amdhsa_dx10_clamp 1
.amdhsa_ieee_mode 1
.amdhsa_fp16_overflow 0
.amdhsa_workgroup_processor_mode 1
.amdhsa_memory_ordered 1
.amdhsa_forward_progress 0
.amdhsa_shared_vgpr_count 0
.amdhsa_exception_fp_ieee_invalid_op 0
.amdhsa_exception_fp_denorm_src 0
.amdhsa_exception_fp_ieee_div_zero 0
.amdhsa_exception_fp_ieee_overflow 0
.amdhsa_exception_fp_ieee_underflow 0
.amdhsa_exception_fp_ieee_inexact 0
.amdhsa_exception_int_div_zero 0
.end_amdhsa_kernel
.text
.Lfunc_end0:
.size _Z10fillMatrixPfm, .Lfunc_end0-_Z10fillMatrixPfm
.section .AMDGPU.csdata,"",@progbits
.text
.p2alignl 7, 3214868480
.fill 96, 4, 3214868480
.type __hip_cuid_,@object
.section .bss,"aw",@nobits
.globl __hip_cuid_
__hip_cuid_:
.byte 0
.size __hip_cuid_, 1
.ident "AMD clang version 18.0.0git (https://github.com/RadeonOpenCompute/llvm-project roc-6.3.2 25012 e5bf7e55c91490b07c49d8960fa7983d864936c4)"
.section ".note.GNU-stack","",@progbits
.addrsig
.addrsig_sym __hip_cuid_
.amdgpu_metadata
---
amdhsa.kernels:
- .args:
- .address_space: global
.offset: 0
.size: 8
.value_kind: global_buffer
- .offset: 8
.size: 8
.value_kind: by_value
- .offset: 16
.size: 4
.value_kind: hidden_block_count_x
- .offset: 20
.size: 4
.value_kind: hidden_block_count_y
- .offset: 24
.size: 4
.value_kind: hidden_block_count_z
- .offset: 28
.size: 2
.value_kind: hidden_group_size_x
- .offset: 30
.size: 2
.value_kind: hidden_group_size_y
- .offset: 32
.size: 2
.value_kind: hidden_group_size_z
- .offset: 34
.size: 2
.value_kind: hidden_remainder_x
- .offset: 36
.size: 2
.value_kind: hidden_remainder_y
- .offset: 38
.size: 2
.value_kind: hidden_remainder_z
- .offset: 56
.size: 8
.value_kind: hidden_global_offset_x
- .offset: 64
.size: 8
.value_kind: hidden_global_offset_y
- .offset: 72
.size: 8
.value_kind: hidden_global_offset_z
- .offset: 80
.size: 2
.value_kind: hidden_grid_dims
.group_segment_fixed_size: 0
.kernarg_segment_align: 8
.kernarg_segment_size: 272
.language: OpenCL C
.language_version:
- 2
- 0
.max_flat_workgroup_size: 1024
.name: _Z10fillMatrixPfm
.private_segment_fixed_size: 0
.sgpr_count: 18
.sgpr_spill_count: 0
.symbol: _Z10fillMatrixPfm.kd
.uniform_work_group_size: 1
.uses_dynamic_stack: false
.vgpr_count: 9
.vgpr_spill_count: 0
.wavefront_size: 32
.workgroup_processor_mode: 1
amdhsa.target: amdgcn-amd-amdhsa--gfx1100
amdhsa.version:
- 1
- 2
...
.end_amdgpu_metadata |
You are a helpful coding assistant specialized in converting from CUDA host assembly to AMD host assembly. | .file "tmpxft_0011ec93_00000000-6_test.cudafe1.cpp"
.text
#APP
#NO_APP
.type _ZL26__cudaUnregisterBinaryUtilv, @function
_ZL26__cudaUnregisterBinaryUtilv:
.LFB2060:
.cfi_startproc
endbr64
subq $8, %rsp
.cfi_def_cfa_offset 16
movq _ZL20__cudaFatCubinHandle(%rip), %rdi
call __cudaUnregisterFatBinary@PLT
addq $8, %rsp
.cfi_def_cfa_offset 8
ret
.cfi_endproc
.LFE2060:
.size _ZL26__cudaUnregisterBinaryUtilv, .-_ZL26__cudaUnregisterBinaryUtilv
.globl _Z31__device_stub__Z10fillMatrixPfmPfm
.type _Z31__device_stub__Z10fillMatrixPfmPfm, @function
_Z31__device_stub__Z10fillMatrixPfmPfm:
.LFB2082:
.cfi_startproc
endbr64
subq $120, %rsp
.cfi_def_cfa_offset 128
movq %rdi, 8(%rsp)
movq %rsi, (%rsp)
movq %fs:40, %rax
movq %rax, 104(%rsp)
xorl %eax, %eax
leaq 8(%rsp), %rax
movq %rax, 80(%rsp)
movq %rsp, %rax
movq %rax, 88(%rsp)
movl $1, 32(%rsp)
movl $1, 36(%rsp)
movl $1, 40(%rsp)
movl $1, 44(%rsp)
movl $1, 48(%rsp)
movl $1, 52(%rsp)
leaq 24(%rsp), %rcx
leaq 16(%rsp), %rdx
leaq 44(%rsp), %rsi
leaq 32(%rsp), %rdi
call __cudaPopCallConfiguration@PLT
testl %eax, %eax
je .L7
.L3:
movq 104(%rsp), %rax
subq %fs:40, %rax
jne .L8
addq $120, %rsp
.cfi_remember_state
.cfi_def_cfa_offset 8
ret
.L7:
.cfi_restore_state
pushq 24(%rsp)
.cfi_def_cfa_offset 136
pushq 24(%rsp)
.cfi_def_cfa_offset 144
leaq 96(%rsp), %r9
movq 60(%rsp), %rcx
movl 68(%rsp), %r8d
movq 48(%rsp), %rsi
movl 56(%rsp), %edx
leaq _Z10fillMatrixPfm(%rip), %rdi
call cudaLaunchKernel@PLT
addq $16, %rsp
.cfi_def_cfa_offset 128
jmp .L3
.L8:
call __stack_chk_fail@PLT
.cfi_endproc
.LFE2082:
.size _Z31__device_stub__Z10fillMatrixPfmPfm, .-_Z31__device_stub__Z10fillMatrixPfmPfm
.globl _Z10fillMatrixPfm
.type _Z10fillMatrixPfm, @function
_Z10fillMatrixPfm:
.LFB2083:
.cfi_startproc
endbr64
subq $8, %rsp
.cfi_def_cfa_offset 16
call _Z31__device_stub__Z10fillMatrixPfmPfm
addq $8, %rsp
.cfi_def_cfa_offset 8
ret
.cfi_endproc
.LFE2083:
.size _Z10fillMatrixPfm, .-_Z10fillMatrixPfm
.section .rodata.str1.1,"aMS",@progbits,1
.LC0:
.string "row %i column %i value %f \n"
.text
.globl main
.type main, @function
main:
.LFB2057:
.cfi_startproc
endbr64
pushq %r13
.cfi_def_cfa_offset 16
.cfi_offset 13, -16
pushq %r12
.cfi_def_cfa_offset 24
.cfi_offset 12, -24
pushq %rbp
.cfi_def_cfa_offset 32
.cfi_offset 6, -32
pushq %rbx
.cfi_def_cfa_offset 40
.cfi_offset 3, -40
subq $56, %rsp
.cfi_def_cfa_offset 96
movq %fs:40, %rax
movq %rax, 40(%rsp)
xorl %eax, %eax
movl $60, %edi
call malloc@PLT
movq %rax, %rbp
leaq 8(%rsp), %rsi
movq %rsp, %rdi
movl $3, %ecx
movl $20, %edx
call cudaMallocPitch@PLT
movl $64, 28(%rsp)
movl $1, 32(%rsp)
movl $1, 16(%rsp)
movl $1, 20(%rsp)
movl $0, %r9d
movl $0, %r8d
movq 28(%rsp), %rdx
movl $1, %ecx
movq 16(%rsp), %rdi
movl $1, %esi
call __cudaPushCallConfiguration@PLT
testl %eax, %eax
je .L19
.L12:
subq $8, %rsp
.cfi_def_cfa_offset 104
pushq $2
.cfi_def_cfa_offset 112
movl $3, %r9d
movl $20, %r8d
movq 24(%rsp), %rcx
movq 16(%rsp), %rdx
movl $20, %esi
movq %rbp, %rdi
call cudaMemcpy2D@PLT
addq $16, %rsp
.cfi_def_cfa_offset 96
movl $0, %r12d
leaq .LC0(%rip), %r13
.L13:
movl $0, %ebx
.L14:
pxor %xmm0, %xmm0
cvtss2sd 0(%rbp,%rbx,4), %xmm0
movl %ebx, %ecx
movl %r12d, %edx
movq %r13, %rsi
movl $2, %edi
movl $1, %eax
call __printf_chk@PLT
addq $1, %rbx
cmpq $5, %rbx
jne .L14
addl $1, %r12d
addq $20, %rbp
cmpl $3, %r12d
jne .L13
movq 40(%rsp), %rax
subq %fs:40, %rax
jne .L20
movl $0, %eax
addq $56, %rsp
.cfi_remember_state
.cfi_def_cfa_offset 40
popq %rbx
.cfi_def_cfa_offset 32
popq %rbp
.cfi_def_cfa_offset 24
popq %r12
.cfi_def_cfa_offset 16
popq %r13
.cfi_def_cfa_offset 8
ret
.L19:
.cfi_restore_state
movq 8(%rsp), %rsi
movq (%rsp), %rdi
call _Z31__device_stub__Z10fillMatrixPfmPfm
jmp .L12
.L20:
call __stack_chk_fail@PLT
.cfi_endproc
.LFE2057:
.size main, .-main
.section .rodata.str1.1
.LC1:
.string "_Z10fillMatrixPfm"
.text
.type _ZL24__sti____cudaRegisterAllv, @function
_ZL24__sti____cudaRegisterAllv:
.LFB2085:
.cfi_startproc
endbr64
subq $8, %rsp
.cfi_def_cfa_offset 16
leaq _ZL15__fatDeviceText(%rip), %rdi
call __cudaRegisterFatBinary@PLT
movq %rax, %rdi
movq %rax, _ZL20__cudaFatCubinHandle(%rip)
pushq $0
.cfi_def_cfa_offset 24
pushq $0
.cfi_def_cfa_offset 32
pushq $0
.cfi_def_cfa_offset 40
pushq $0
.cfi_def_cfa_offset 48
movl $0, %r9d
movl $-1, %r8d
leaq .LC1(%rip), %rdx
movq %rdx, %rcx
leaq _Z10fillMatrixPfm(%rip), %rsi
call __cudaRegisterFunction@PLT
addq $32, %rsp
.cfi_def_cfa_offset 16
movq _ZL20__cudaFatCubinHandle(%rip), %rdi
call __cudaRegisterFatBinaryEnd@PLT
leaq _ZL26__cudaUnregisterBinaryUtilv(%rip), %rdi
call atexit@PLT
addq $8, %rsp
.cfi_def_cfa_offset 8
ret
.cfi_endproc
.LFE2085:
.size _ZL24__sti____cudaRegisterAllv, .-_ZL24__sti____cudaRegisterAllv
.section .init_array,"aw"
.align 8
.quad _ZL24__sti____cudaRegisterAllv
.section .nvFatBinSegment,"aw"
.align 8
.type _ZL15__fatDeviceText, @object
.size _ZL15__fatDeviceText, 24
_ZL15__fatDeviceText:
.long 1180844977
.long 1
.quad fatbinData
.quad 0
.local _ZL20__cudaFatCubinHandle
.comm _ZL20__cudaFatCubinHandle,8,8
.ident "GCC: (Ubuntu 13.3.0-6ubuntu2~24.04) 13.3.0"
.section .note.GNU-stack,"",@progbits
.section .note.gnu.property,"a"
.align 8
.long 1f - 0f
.long 4f - 1f
.long 5
0:
.string "GNU"
1:
.align 8
.long 0xc0000002
.long 3f - 2f
2:
.long 0x3
3:
.align 8
4: | .text
.file "test.hip"
.globl _Z25__device_stub__fillMatrixPfm # -- Begin function _Z25__device_stub__fillMatrixPfm
.p2align 4, 0x90
.type _Z25__device_stub__fillMatrixPfm,@function
_Z25__device_stub__fillMatrixPfm: # @_Z25__device_stub__fillMatrixPfm
.cfi_startproc
# %bb.0:
subq $88, %rsp
.cfi_def_cfa_offset 96
movq %rdi, 56(%rsp)
movq %rsi, 48(%rsp)
leaq 56(%rsp), %rax
movq %rax, 64(%rsp)
leaq 48(%rsp), %rax
movq %rax, 72(%rsp)
leaq 32(%rsp), %rdi
leaq 16(%rsp), %rsi
leaq 8(%rsp), %rdx
movq %rsp, %rcx
callq __hipPopCallConfiguration
movq 32(%rsp), %rsi
movl 40(%rsp), %edx
movq 16(%rsp), %rcx
movl 24(%rsp), %r8d
leaq 64(%rsp), %r9
movl $_Z10fillMatrixPfm, %edi
pushq (%rsp)
.cfi_adjust_cfa_offset 8
pushq 16(%rsp)
.cfi_adjust_cfa_offset 8
callq hipLaunchKernel
addq $104, %rsp
.cfi_adjust_cfa_offset -104
retq
.Lfunc_end0:
.size _Z25__device_stub__fillMatrixPfm, .Lfunc_end0-_Z25__device_stub__fillMatrixPfm
.cfi_endproc
# -- End function
.globl main # -- Begin function main
.p2align 4, 0x90
.type main,@function
main: # @main
.cfi_startproc
# %bb.0:
pushq %r15
.cfi_def_cfa_offset 16
pushq %r14
.cfi_def_cfa_offset 24
pushq %rbx
.cfi_def_cfa_offset 32
subq $96, %rsp
.cfi_def_cfa_offset 128
.cfi_offset %rbx, -32
.cfi_offset %r14, -24
.cfi_offset %r15, -16
movl $60, %edi
callq malloc
movq %rax, %rbx
leaq 8(%rsp), %rdi
movq %rsp, %rsi
movl $20, %edx
movl $3, %ecx
callq hipMallocPitch
movabsq $4294967297, %rdi # imm = 0x100000001
leaq 63(%rdi), %rdx
movl $1, %esi
movl $1, %ecx
xorl %r8d, %r8d
xorl %r9d, %r9d
callq __hipPushCallConfiguration
testl %eax, %eax
jne .LBB1_2
# %bb.1:
movq 8(%rsp), %rax
movq (%rsp), %rcx
movq %rax, 72(%rsp)
movq %rcx, 64(%rsp)
leaq 72(%rsp), %rax
movq %rax, 80(%rsp)
leaq 64(%rsp), %rax
movq %rax, 88(%rsp)
leaq 48(%rsp), %rdi
leaq 32(%rsp), %rsi
leaq 24(%rsp), %rdx
leaq 16(%rsp), %rcx
callq __hipPopCallConfiguration
movq 48(%rsp), %rsi
movl 56(%rsp), %edx
movq 32(%rsp), %rcx
movl 40(%rsp), %r8d
leaq 80(%rsp), %r9
movl $_Z10fillMatrixPfm, %edi
pushq 16(%rsp)
.cfi_adjust_cfa_offset 8
pushq 32(%rsp)
.cfi_adjust_cfa_offset 8
callq hipLaunchKernel
addq $16, %rsp
.cfi_adjust_cfa_offset -16
.LBB1_2:
movq 8(%rsp), %rdx
movq (%rsp), %rcx
subq $8, %rsp
.cfi_adjust_cfa_offset 8
movl $20, %esi
movl $20, %r8d
movl $3, %r9d
movq %rbx, %rdi
pushq $2
.cfi_adjust_cfa_offset 8
callq hipMemcpy2D
addq $16, %rsp
.cfi_adjust_cfa_offset -16
xorl %r14d, %r14d
.p2align 4, 0x90
.LBB1_3: # %.preheader
# =>This Loop Header: Depth=1
# Child Loop BB1_4 Depth 2
xorl %r15d, %r15d
.p2align 4, 0x90
.LBB1_4: # Parent Loop BB1_3 Depth=1
# => This Inner Loop Header: Depth=2
movss (%rbx,%r15,4), %xmm0 # xmm0 = mem[0],zero,zero,zero
cvtss2sd %xmm0, %xmm0
movl $.L.str, %edi
movl %r14d, %esi
movl %r15d, %edx
movb $1, %al
callq printf
incq %r15
cmpq $5, %r15
jne .LBB1_4
# %bb.5: # in Loop: Header=BB1_3 Depth=1
incq %r14
addq $20, %rbx
cmpq $3, %r14
jne .LBB1_3
# %bb.6:
xorl %eax, %eax
addq $96, %rsp
.cfi_def_cfa_offset 32
popq %rbx
.cfi_def_cfa_offset 24
popq %r14
.cfi_def_cfa_offset 16
popq %r15
.cfi_def_cfa_offset 8
retq
.Lfunc_end1:
.size main, .Lfunc_end1-main
.cfi_endproc
# -- End function
.p2align 4, 0x90 # -- Begin function __hip_module_ctor
.type __hip_module_ctor,@function
__hip_module_ctor: # @__hip_module_ctor
.cfi_startproc
# %bb.0:
subq $40, %rsp
.cfi_def_cfa_offset 48
cmpq $0, __hip_gpubin_handle(%rip)
jne .LBB2_2
# %bb.1:
movl $__hip_fatbin_wrapper, %edi
callq __hipRegisterFatBinary
movq %rax, __hip_gpubin_handle(%rip)
.LBB2_2:
movq __hip_gpubin_handle(%rip), %rdi
xorps %xmm0, %xmm0
movups %xmm0, 16(%rsp)
movups %xmm0, (%rsp)
movl $_Z10fillMatrixPfm, %esi
movl $.L__unnamed_1, %edx
movl $.L__unnamed_1, %ecx
movl $-1, %r8d
xorl %r9d, %r9d
callq __hipRegisterFunction
movl $__hip_module_dtor, %edi
addq $40, %rsp
.cfi_def_cfa_offset 8
jmp atexit # TAILCALL
.Lfunc_end2:
.size __hip_module_ctor, .Lfunc_end2-__hip_module_ctor
.cfi_endproc
# -- End function
.p2align 4, 0x90 # -- Begin function __hip_module_dtor
.type __hip_module_dtor,@function
__hip_module_dtor: # @__hip_module_dtor
.cfi_startproc
# %bb.0:
movq __hip_gpubin_handle(%rip), %rdi
testq %rdi, %rdi
je .LBB3_2
# %bb.1:
pushq %rax
.cfi_def_cfa_offset 16
callq __hipUnregisterFatBinary
movq $0, __hip_gpubin_handle(%rip)
addq $8, %rsp
.cfi_def_cfa_offset 8
.LBB3_2:
retq
.Lfunc_end3:
.size __hip_module_dtor, .Lfunc_end3-__hip_module_dtor
.cfi_endproc
# -- End function
.type _Z10fillMatrixPfm,@object # @_Z10fillMatrixPfm
.section .rodata,"a",@progbits
.globl _Z10fillMatrixPfm
.p2align 3, 0x0
_Z10fillMatrixPfm:
.quad _Z25__device_stub__fillMatrixPfm
.size _Z10fillMatrixPfm, 8
.type .L.str,@object # @.str
.section .rodata.str1.1,"aMS",@progbits,1
.L.str:
.asciz "row %i column %i value %f \n"
.size .L.str, 28
.type .L__unnamed_1,@object # @0
.L__unnamed_1:
.asciz "_Z10fillMatrixPfm"
.size .L__unnamed_1, 18
.type __hip_fatbin_wrapper,@object # @__hip_fatbin_wrapper
.section .hipFatBinSegment,"a",@progbits
.p2align 3, 0x0
__hip_fatbin_wrapper:
.long 1212764230 # 0x48495046
.long 1 # 0x1
.quad __hip_fatbin
.quad 0
.size __hip_fatbin_wrapper, 24
.type __hip_gpubin_handle,@object # @__hip_gpubin_handle
.local __hip_gpubin_handle
.comm __hip_gpubin_handle,8,8
.section .init_array,"aw",@init_array
.p2align 3, 0x0
.quad __hip_module_ctor
.type __hip_cuid_,@object # @__hip_cuid_
.bss
.globl __hip_cuid_
__hip_cuid_:
.byte 0 # 0x0
.size __hip_cuid_, 1
.section ".linker-options","e",@llvm_linker_options
.ident "AMD clang version 18.0.0git (https://github.com/RadeonOpenCompute/llvm-project roc-6.3.2 25012 e5bf7e55c91490b07c49d8960fa7983d864936c4)"
.section ".note.GNU-stack","",@progbits
.addrsig
.addrsig_sym _Z25__device_stub__fillMatrixPfm
.addrsig_sym __hip_module_ctor
.addrsig_sym __hip_module_dtor
.addrsig_sym _Z10fillMatrixPfm
.addrsig_sym __hip_fatbin
.addrsig_sym __hip_fatbin_wrapper
.addrsig_sym __hip_cuid_ |
You are a helpful coding assistant specialized in converting CUDA source code to CUDA host assembly. | #include<stdio.h>
#include<cuda.h>
/* Producing twiddle factors */
#define NUM_OF_X_THREADS 10
#define NUM_OF_Y_THREADS 10
__global__ void inputKernel(float *x, int N)
{
int ix = blockIdx.x * blockDim.x + threadIdx.x;
int iy = blockIdx.y * blockDim.y + threadIdx.y;
int idx = iy * NUM_OF_X_THREADS + ix;
if (idx < N)
x[idx] = x[idx] + (float)idx;
}
__global__ void factorKernel(float *w, int N)
{
int ix = blockIdx.x * blockDim.x + threadIdx.x;
int idx = ix * 2;
int izx = N + idx;
const float pi = 3.1415;
float aw = (2.0 * pi) / (float)N;
float arg = aw * (float)ix;
/* Twiddle factors are symmetric along N/2. with change in sign, due to 180 degree phase change */
if (idx < N) {
w[idx] = cos(arg);
w[idx + 1] = sin(arg);
w[izx] = (-1) * w[idx];
w[izx+1] = (-1) * w[idx + 1];
}
}
__global__ void twiddleRealKernel(float *wr, float *w, int N)
{
int idx = blockIdx.x * blockDim.x + threadIdx.x;
int i = 0, index;
if (idx < N) {
if (idx == 0) {
for (i = 0; i < N; i++)
wr[idx * N + i] = 1;
} else {
wr[idx * N + 0] = 1;
for (i = 1; i < N; i++) {
index = (idx * i) % N;
wr[idx * N + i] = w[index * 2];
}
}
}
}
__global__ void twiddleImgKernel(float *wi, float *w, int N)
{
int idx = blockIdx.x * blockDim.x + threadIdx.x;
int i, index;
if (idx < N) {
if (idx == 0) {
for (i = 0; i < N; i++)
wi[idx * N + i] = 0;
} else {
wi[idx * N + 0] = 0;
for (i = 1; i < N; i++) {
index = (idx * i) % N;
wi[idx * N + i] = w[index * 2 + 1];
}
}
}
}
int main(int agrc, char** argv)
{
float *x, *w, *w_r, *w_i;
float *d_x, *d_w, *dw_r, *dw_i;
int N = 10000, n = N/2;
x = (float *)malloc(N * sizeof(float));
w = (float *)malloc(2 * N * sizeof(float));
w_r = (float *)malloc(N * N * sizeof(float));
w_i = (float *)malloc(N * N * sizeof(float));
dim3 numberOfThreads(NUM_OF_X_THREADS, NUM_OF_Y_THREADS);
dim3 numberOfBlocks( (100 + NUM_OF_X_THREADS -1)/NUM_OF_X_THREADS,
(100 + NUM_OF_Y_THREADS - 1)/NUM_OF_Y_THREADS );
cudaMalloc((void **)&d_x, N * sizeof(float));
cudaMalloc((void **)&d_w, 2 * N * sizeof(float));
cudaMalloc((void **)&dw_r, N * N * sizeof(float));
cudaMalloc((void **)&dw_i, N * N * sizeof(float));
cudaMemset(d_x, 0, N * sizeof(float));
cudaMemset(d_w, 0, 2 * N * sizeof(float));
cudaMemset(dw_r, 0, N * N * sizeof(float));
cudaMemset(dw_i, 0, N * N * sizeof(float));
inputKernel<<<numberOfBlocks, numberOfThreads>>>(d_x, N);
cudaMemcpy(x, d_x, N * sizeof(float), cudaMemcpyDeviceToHost);
printf("%f\n",x[100]);
// Calculating factor
factorKernel<<<n/512, 512>>>(d_w, (float)N);
cudaMemcpy(w, d_w, 2 * N * sizeof(float), cudaMemcpyDeviceToHost);
printf("%f %f\n", w[5], w[10005]);
// Calculating twiddle real matrix
twiddleRealKernel<<<n/512, 512>>>(dw_r, d_w, N);
cudaMemcpy(w_r, dw_r, N * N * sizeof(float), cudaMemcpyDeviceToHost);
// Calculating twiddle imaginary matrix
twiddleImgKernel<<<n/512, 512>>>(dw_i, d_w, N);
cudaMemcpy(w_i, dw_i, N * N * sizeof(float), cudaMemcpyDeviceToHost);
/* int i,j;
for(i = 0; i < 50; i++)
{
for(j = 0; j < 50; j++) {
printf("%f \t", w_r[i*N + j]);
}
printf("\n");
}
printf("*********************************************************************************\n");
for(i = 0; i < 50; i++) {
for(j = 0; j < 50; j++) {
printf("%f \t", w_i[i*N + j]);
}
printf("\n");
}
*/
return 0;
} | .file "tmpxft_0016dc56_00000000-6_twiddle.cudafe1.cpp"
.text
#APP
#NO_APP
.type _ZL26__cudaUnregisterBinaryUtilv, @function
_ZL26__cudaUnregisterBinaryUtilv:
.LFB2060:
.cfi_startproc
endbr64
subq $8, %rsp
.cfi_def_cfa_offset 16
movq _ZL20__cudaFatCubinHandle(%rip), %rdi
call __cudaUnregisterFatBinary@PLT
addq $8, %rsp
.cfi_def_cfa_offset 8
ret
.cfi_endproc
.LFE2060:
.size _ZL26__cudaUnregisterBinaryUtilv, .-_ZL26__cudaUnregisterBinaryUtilv
.globl _Z32__device_stub__Z11inputKernelPfiPfi
.type _Z32__device_stub__Z11inputKernelPfiPfi, @function
_Z32__device_stub__Z11inputKernelPfiPfi:
.LFB2082:
.cfi_startproc
endbr64
subq $120, %rsp
.cfi_def_cfa_offset 128
movq %rdi, 8(%rsp)
movl %esi, 4(%rsp)
movq %fs:40, %rax
movq %rax, 104(%rsp)
xorl %eax, %eax
leaq 8(%rsp), %rax
movq %rax, 80(%rsp)
leaq 4(%rsp), %rax
movq %rax, 88(%rsp)
movl $1, 32(%rsp)
movl $1, 36(%rsp)
movl $1, 40(%rsp)
movl $1, 44(%rsp)
movl $1, 48(%rsp)
movl $1, 52(%rsp)
leaq 24(%rsp), %rcx
leaq 16(%rsp), %rdx
leaq 44(%rsp), %rsi
leaq 32(%rsp), %rdi
call __cudaPopCallConfiguration@PLT
testl %eax, %eax
je .L7
.L3:
movq 104(%rsp), %rax
subq %fs:40, %rax
jne .L8
addq $120, %rsp
.cfi_remember_state
.cfi_def_cfa_offset 8
ret
.L7:
.cfi_restore_state
pushq 24(%rsp)
.cfi_def_cfa_offset 136
pushq 24(%rsp)
.cfi_def_cfa_offset 144
leaq 96(%rsp), %r9
movq 60(%rsp), %rcx
movl 68(%rsp), %r8d
movq 48(%rsp), %rsi
movl 56(%rsp), %edx
leaq _Z11inputKernelPfi(%rip), %rdi
call cudaLaunchKernel@PLT
addq $16, %rsp
.cfi_def_cfa_offset 128
jmp .L3
.L8:
call __stack_chk_fail@PLT
.cfi_endproc
.LFE2082:
.size _Z32__device_stub__Z11inputKernelPfiPfi, .-_Z32__device_stub__Z11inputKernelPfiPfi
.globl _Z11inputKernelPfi
.type _Z11inputKernelPfi, @function
_Z11inputKernelPfi:
.LFB2083:
.cfi_startproc
endbr64
subq $8, %rsp
.cfi_def_cfa_offset 16
call _Z32__device_stub__Z11inputKernelPfiPfi
addq $8, %rsp
.cfi_def_cfa_offset 8
ret
.cfi_endproc
.LFE2083:
.size _Z11inputKernelPfi, .-_Z11inputKernelPfi
.globl _Z33__device_stub__Z12factorKernelPfiPfi
.type _Z33__device_stub__Z12factorKernelPfiPfi, @function
_Z33__device_stub__Z12factorKernelPfiPfi:
.LFB2084:
.cfi_startproc
endbr64
subq $120, %rsp
.cfi_def_cfa_offset 128
movq %rdi, 8(%rsp)
movl %esi, 4(%rsp)
movq %fs:40, %rax
movq %rax, 104(%rsp)
xorl %eax, %eax
leaq 8(%rsp), %rax
movq %rax, 80(%rsp)
leaq 4(%rsp), %rax
movq %rax, 88(%rsp)
movl $1, 32(%rsp)
movl $1, 36(%rsp)
movl $1, 40(%rsp)
movl $1, 44(%rsp)
movl $1, 48(%rsp)
movl $1, 52(%rsp)
leaq 24(%rsp), %rcx
leaq 16(%rsp), %rdx
leaq 44(%rsp), %rsi
leaq 32(%rsp), %rdi
call __cudaPopCallConfiguration@PLT
testl %eax, %eax
je .L15
.L11:
movq 104(%rsp), %rax
subq %fs:40, %rax
jne .L16
addq $120, %rsp
.cfi_remember_state
.cfi_def_cfa_offset 8
ret
.L15:
.cfi_restore_state
pushq 24(%rsp)
.cfi_def_cfa_offset 136
pushq 24(%rsp)
.cfi_def_cfa_offset 144
leaq 96(%rsp), %r9
movq 60(%rsp), %rcx
movl 68(%rsp), %r8d
movq 48(%rsp), %rsi
movl 56(%rsp), %edx
leaq _Z12factorKernelPfi(%rip), %rdi
call cudaLaunchKernel@PLT
addq $16, %rsp
.cfi_def_cfa_offset 128
jmp .L11
.L16:
call __stack_chk_fail@PLT
.cfi_endproc
.LFE2084:
.size _Z33__device_stub__Z12factorKernelPfiPfi, .-_Z33__device_stub__Z12factorKernelPfiPfi
.globl _Z12factorKernelPfi
.type _Z12factorKernelPfi, @function
_Z12factorKernelPfi:
.LFB2085:
.cfi_startproc
endbr64
subq $8, %rsp
.cfi_def_cfa_offset 16
call _Z33__device_stub__Z12factorKernelPfiPfi
addq $8, %rsp
.cfi_def_cfa_offset 8
ret
.cfi_endproc
.LFE2085:
.size _Z12factorKernelPfi, .-_Z12factorKernelPfi
.globl _Z40__device_stub__Z17twiddleRealKernelPfS_iPfS_i
.type _Z40__device_stub__Z17twiddleRealKernelPfS_iPfS_i, @function
_Z40__device_stub__Z17twiddleRealKernelPfS_iPfS_i:
.LFB2086:
.cfi_startproc
endbr64
subq $136, %rsp
.cfi_def_cfa_offset 144
movq %rdi, 24(%rsp)
movq %rsi, 16(%rsp)
movl %edx, 12(%rsp)
movq %fs:40, %rax
movq %rax, 120(%rsp)
xorl %eax, %eax
leaq 24(%rsp), %rax
movq %rax, 96(%rsp)
leaq 16(%rsp), %rax
movq %rax, 104(%rsp)
leaq 12(%rsp), %rax
movq %rax, 112(%rsp)
movl $1, 48(%rsp)
movl $1, 52(%rsp)
movl $1, 56(%rsp)
movl $1, 60(%rsp)
movl $1, 64(%rsp)
movl $1, 68(%rsp)
leaq 40(%rsp), %rcx
leaq 32(%rsp), %rdx
leaq 60(%rsp), %rsi
leaq 48(%rsp), %rdi
call __cudaPopCallConfiguration@PLT
testl %eax, %eax
je .L23
.L19:
movq 120(%rsp), %rax
subq %fs:40, %rax
jne .L24
addq $136, %rsp
.cfi_remember_state
.cfi_def_cfa_offset 8
ret
.L23:
.cfi_restore_state
pushq 40(%rsp)
.cfi_def_cfa_offset 152
pushq 40(%rsp)
.cfi_def_cfa_offset 160
leaq 112(%rsp), %r9
movq 76(%rsp), %rcx
movl 84(%rsp), %r8d
movq 64(%rsp), %rsi
movl 72(%rsp), %edx
leaq _Z17twiddleRealKernelPfS_i(%rip), %rdi
call cudaLaunchKernel@PLT
addq $16, %rsp
.cfi_def_cfa_offset 144
jmp .L19
.L24:
call __stack_chk_fail@PLT
.cfi_endproc
.LFE2086:
.size _Z40__device_stub__Z17twiddleRealKernelPfS_iPfS_i, .-_Z40__device_stub__Z17twiddleRealKernelPfS_iPfS_i
.globl _Z17twiddleRealKernelPfS_i
.type _Z17twiddleRealKernelPfS_i, @function
_Z17twiddleRealKernelPfS_i:
.LFB2087:
.cfi_startproc
endbr64
subq $8, %rsp
.cfi_def_cfa_offset 16
call _Z40__device_stub__Z17twiddleRealKernelPfS_iPfS_i
addq $8, %rsp
.cfi_def_cfa_offset 8
ret
.cfi_endproc
.LFE2087:
.size _Z17twiddleRealKernelPfS_i, .-_Z17twiddleRealKernelPfS_i
.globl _Z39__device_stub__Z16twiddleImgKernelPfS_iPfS_i
.type _Z39__device_stub__Z16twiddleImgKernelPfS_iPfS_i, @function
_Z39__device_stub__Z16twiddleImgKernelPfS_iPfS_i:
.LFB2088:
.cfi_startproc
endbr64
subq $136, %rsp
.cfi_def_cfa_offset 144
movq %rdi, 24(%rsp)
movq %rsi, 16(%rsp)
movl %edx, 12(%rsp)
movq %fs:40, %rax
movq %rax, 120(%rsp)
xorl %eax, %eax
leaq 24(%rsp), %rax
movq %rax, 96(%rsp)
leaq 16(%rsp), %rax
movq %rax, 104(%rsp)
leaq 12(%rsp), %rax
movq %rax, 112(%rsp)
movl $1, 48(%rsp)
movl $1, 52(%rsp)
movl $1, 56(%rsp)
movl $1, 60(%rsp)
movl $1, 64(%rsp)
movl $1, 68(%rsp)
leaq 40(%rsp), %rcx
leaq 32(%rsp), %rdx
leaq 60(%rsp), %rsi
leaq 48(%rsp), %rdi
call __cudaPopCallConfiguration@PLT
testl %eax, %eax
je .L31
.L27:
movq 120(%rsp), %rax
subq %fs:40, %rax
jne .L32
addq $136, %rsp
.cfi_remember_state
.cfi_def_cfa_offset 8
ret
.L31:
.cfi_restore_state
pushq 40(%rsp)
.cfi_def_cfa_offset 152
pushq 40(%rsp)
.cfi_def_cfa_offset 160
leaq 112(%rsp), %r9
movq 76(%rsp), %rcx
movl 84(%rsp), %r8d
movq 64(%rsp), %rsi
movl 72(%rsp), %edx
leaq _Z16twiddleImgKernelPfS_i(%rip), %rdi
call cudaLaunchKernel@PLT
addq $16, %rsp
.cfi_def_cfa_offset 144
jmp .L27
.L32:
call __stack_chk_fail@PLT
.cfi_endproc
.LFE2088:
.size _Z39__device_stub__Z16twiddleImgKernelPfS_iPfS_i, .-_Z39__device_stub__Z16twiddleImgKernelPfS_iPfS_i
.globl _Z16twiddleImgKernelPfS_i
.type _Z16twiddleImgKernelPfS_i, @function
_Z16twiddleImgKernelPfS_i:
.LFB2089:
.cfi_startproc
endbr64
subq $8, %rsp
.cfi_def_cfa_offset 16
call _Z39__device_stub__Z16twiddleImgKernelPfS_iPfS_i
addq $8, %rsp
.cfi_def_cfa_offset 8
ret
.cfi_endproc
.LFE2089:
.size _Z16twiddleImgKernelPfS_i, .-_Z16twiddleImgKernelPfS_i
.section .rodata.str1.1,"aMS",@progbits,1
.LC0:
.string "%f\n"
.LC1:
.string "%f %f\n"
.text
.globl main
.type main, @function
main:
.LFB2057:
.cfi_startproc
endbr64
pushq %r13
.cfi_def_cfa_offset 16
.cfi_offset 13, -16
pushq %r12
.cfi_def_cfa_offset 24
.cfi_offset 12, -24
pushq %rbp
.cfi_def_cfa_offset 32
.cfi_offset 6, -32
pushq %rbx
.cfi_def_cfa_offset 40
.cfi_offset 3, -40
subq $104, %rsp
.cfi_def_cfa_offset 144
movq %fs:40, %rax
movq %rax, 88(%rsp)
xorl %eax, %eax
movl $40000, %edi
call malloc@PLT
movq %rax, %rbp
movl $80000, %edi
call malloc@PLT
movq %rax, %rbx
movl $400000000, %edi
call malloc@PLT
movq %rax, %r13
movl $400000000, %edi
call malloc@PLT
movq %rax, %r12
movl $10, 40(%rsp)
movl $10, 44(%rsp)
movl $1, 48(%rsp)
movl $10, 52(%rsp)
movl $10, 56(%rsp)
movl $1, 60(%rsp)
leaq 8(%rsp), %rdi
movl $40000, %esi
call cudaMalloc@PLT
leaq 16(%rsp), %rdi
movl $80000, %esi
call cudaMalloc@PLT
leaq 24(%rsp), %rdi
movl $400000000, %esi
call cudaMalloc@PLT
leaq 32(%rsp), %rdi
movl $400000000, %esi
call cudaMalloc@PLT
movl $40000, %edx
movl $0, %esi
movq 8(%rsp), %rdi
call cudaMemset@PLT
movl $80000, %edx
movl $0, %esi
movq 16(%rsp), %rdi
call cudaMemset@PLT
movl $400000000, %edx
movl $0, %esi
movq 24(%rsp), %rdi
call cudaMemset@PLT
movl $400000000, %edx
movl $0, %esi
movq 32(%rsp), %rdi
call cudaMemset@PLT
movl 48(%rsp), %ecx
movl $0, %r9d
movl $0, %r8d
movq 40(%rsp), %rdx
movq 52(%rsp), %rdi
movl 60(%rsp), %esi
call __cudaPushCallConfiguration@PLT
testl %eax, %eax
je .L42
.L36:
movl $2, %ecx
movl $40000, %edx
movq 8(%rsp), %rsi
movq %rbp, %rdi
call cudaMemcpy@PLT
pxor %xmm0, %xmm0
cvtss2sd 400(%rbp), %xmm0
leaq .LC0(%rip), %rsi
movl $2, %edi
movl $1, %eax
call __printf_chk@PLT
movl $512, 76(%rsp)
movl $1, 80(%rsp)
movl $1, 84(%rsp)
movl $9, 64(%rsp)
movl $1, 68(%rsp)
movl $1, 72(%rsp)
movl $0, %r9d
movl $0, %r8d
movq 76(%rsp), %rdx
movl $1, %ecx
movq 64(%rsp), %rdi
movl $1, %esi
call __cudaPushCallConfiguration@PLT
testl %eax, %eax
je .L43
.L37:
movl $2, %ecx
movl $80000, %edx
movq 16(%rsp), %rsi
movq %rbx, %rdi
call cudaMemcpy@PLT
pxor %xmm0, %xmm0
cvtss2sd 20(%rbx), %xmm0
pxor %xmm1, %xmm1
cvtss2sd 40020(%rbx), %xmm1
leaq .LC1(%rip), %rsi
movl $2, %edi
movl $2, %eax
call __printf_chk@PLT
movl $512, 76(%rsp)
movl $1, 80(%rsp)
movl $1, 84(%rsp)
movl $9, 64(%rsp)
movl $1, 68(%rsp)
movl $1, 72(%rsp)
movl $0, %r9d
movl $0, %r8d
movq 76(%rsp), %rdx
movl $1, %ecx
movq 64(%rsp), %rdi
movl $1, %esi
call __cudaPushCallConfiguration@PLT
testl %eax, %eax
je .L44
.L38:
movl $2, %ecx
movl $400000000, %edx
movq 24(%rsp), %rsi
movq %r13, %rdi
call cudaMemcpy@PLT
movl $512, 76(%rsp)
movl $1, 80(%rsp)
movl $1, 84(%rsp)
movl $9, 64(%rsp)
movl $1, 68(%rsp)
movl $1, 72(%rsp)
movl $0, %r9d
movl $0, %r8d
movq 76(%rsp), %rdx
movl $1, %ecx
movq 64(%rsp), %rdi
movl $1, %esi
call __cudaPushCallConfiguration@PLT
testl %eax, %eax
je .L45
.L39:
movl $2, %ecx
movl $400000000, %edx
movq 32(%rsp), %rsi
movq %r12, %rdi
call cudaMemcpy@PLT
movq 88(%rsp), %rax
subq %fs:40, %rax
jne .L46
movl $0, %eax
addq $104, %rsp
.cfi_remember_state
.cfi_def_cfa_offset 40
popq %rbx
.cfi_def_cfa_offset 32
popq %rbp
.cfi_def_cfa_offset 24
popq %r12
.cfi_def_cfa_offset 16
popq %r13
.cfi_def_cfa_offset 8
ret
.L42:
.cfi_restore_state
movl $10000, %esi
movq 8(%rsp), %rdi
call _Z32__device_stub__Z11inputKernelPfiPfi
jmp .L36
.L43:
movl $10000, %esi
movq 16(%rsp), %rdi
call _Z33__device_stub__Z12factorKernelPfiPfi
jmp .L37
.L44:
movl $10000, %edx
movq 16(%rsp), %rsi
movq 24(%rsp), %rdi
call _Z40__device_stub__Z17twiddleRealKernelPfS_iPfS_i
jmp .L38
.L45:
movl $10000, %edx
movq 16(%rsp), %rsi
movq 32(%rsp), %rdi
call _Z39__device_stub__Z16twiddleImgKernelPfS_iPfS_i
jmp .L39
.L46:
call __stack_chk_fail@PLT
.cfi_endproc
.LFE2057:
.size main, .-main
.section .rodata.str1.1
.LC2:
.string "_Z16twiddleImgKernelPfS_i"
.LC3:
.string "_Z17twiddleRealKernelPfS_i"
.LC4:
.string "_Z12factorKernelPfi"
.LC5:
.string "_Z11inputKernelPfi"
.text
.type _ZL24__sti____cudaRegisterAllv, @function
_ZL24__sti____cudaRegisterAllv:
.LFB2091:
.cfi_startproc
endbr64
pushq %rbx
.cfi_def_cfa_offset 16
.cfi_offset 3, -16
leaq _ZL15__fatDeviceText(%rip), %rdi
call __cudaRegisterFatBinary@PLT
movq %rax, %rbx
movq %rax, _ZL20__cudaFatCubinHandle(%rip)
pushq $0
.cfi_def_cfa_offset 24
pushq $0
.cfi_def_cfa_offset 32
pushq $0
.cfi_def_cfa_offset 40
pushq $0
.cfi_def_cfa_offset 48
movl $0, %r9d
movl $-1, %r8d
leaq .LC2(%rip), %rdx
movq %rdx, %rcx
leaq _Z16twiddleImgKernelPfS_i(%rip), %rsi
movq %rax, %rdi
call __cudaRegisterFunction@PLT
addq $32, %rsp
.cfi_def_cfa_offset 16
pushq $0
.cfi_def_cfa_offset 24
pushq $0
.cfi_def_cfa_offset 32
pushq $0
.cfi_def_cfa_offset 40
pushq $0
.cfi_def_cfa_offset 48
movl $0, %r9d
movl $-1, %r8d
leaq .LC3(%rip), %rdx
movq %rdx, %rcx
leaq _Z17twiddleRealKernelPfS_i(%rip), %rsi
movq %rbx, %rdi
call __cudaRegisterFunction@PLT
addq $32, %rsp
.cfi_def_cfa_offset 16
pushq $0
.cfi_def_cfa_offset 24
pushq $0
.cfi_def_cfa_offset 32
pushq $0
.cfi_def_cfa_offset 40
pushq $0
.cfi_def_cfa_offset 48
movl $0, %r9d
movl $-1, %r8d
leaq .LC4(%rip), %rdx
movq %rdx, %rcx
leaq _Z12factorKernelPfi(%rip), %rsi
movq %rbx, %rdi
call __cudaRegisterFunction@PLT
addq $32, %rsp
.cfi_def_cfa_offset 16
pushq $0
.cfi_def_cfa_offset 24
pushq $0
.cfi_def_cfa_offset 32
pushq $0
.cfi_def_cfa_offset 40
pushq $0
.cfi_def_cfa_offset 48
movl $0, %r9d
movl $-1, %r8d
leaq .LC5(%rip), %rdx
movq %rdx, %rcx
leaq _Z11inputKernelPfi(%rip), %rsi
movq %rbx, %rdi
call __cudaRegisterFunction@PLT
addq $32, %rsp
.cfi_def_cfa_offset 16
movq _ZL20__cudaFatCubinHandle(%rip), %rdi
call __cudaRegisterFatBinaryEnd@PLT
leaq _ZL26__cudaUnregisterBinaryUtilv(%rip), %rdi
call atexit@PLT
popq %rbx
.cfi_def_cfa_offset 8
ret
.cfi_endproc
.LFE2091:
.size _ZL24__sti____cudaRegisterAllv, .-_ZL24__sti____cudaRegisterAllv
.section .init_array,"aw"
.align 8
.quad _ZL24__sti____cudaRegisterAllv
.section .nvFatBinSegment,"aw"
.align 8
.type _ZL15__fatDeviceText, @object
.size _ZL15__fatDeviceText, 24
_ZL15__fatDeviceText:
.long 1180844977
.long 1
.quad fatbinData
.quad 0
.local _ZL20__cudaFatCubinHandle
.comm _ZL20__cudaFatCubinHandle,8,8
.ident "GCC: (Ubuntu 13.3.0-6ubuntu2~24.04) 13.3.0"
.section .note.GNU-stack,"",@progbits
.section .note.gnu.property,"a"
.align 8
.long 1f - 0f
.long 4f - 1f
.long 5
0:
.string "GNU"
1:
.align 8
.long 0xc0000002
.long 3f - 2f
2:
.long 0x3
3:
.align 8
4: |
You are a helpful coding assistant specialized in converting CUDA source code to HIP/AMD source code. | #include<stdio.h>
#include<cuda.h>
/* Producing twiddle factors */
#define NUM_OF_X_THREADS 10
#define NUM_OF_Y_THREADS 10
__global__ void inputKernel(float *x, int N)
{
int ix = blockIdx.x * blockDim.x + threadIdx.x;
int iy = blockIdx.y * blockDim.y + threadIdx.y;
int idx = iy * NUM_OF_X_THREADS + ix;
if (idx < N)
x[idx] = x[idx] + (float)idx;
}
__global__ void factorKernel(float *w, int N)
{
int ix = blockIdx.x * blockDim.x + threadIdx.x;
int idx = ix * 2;
int izx = N + idx;
const float pi = 3.1415;
float aw = (2.0 * pi) / (float)N;
float arg = aw * (float)ix;
/* Twiddle factors are symmetric along N/2. with change in sign, due to 180 degree phase change */
if (idx < N) {
w[idx] = cos(arg);
w[idx + 1] = sin(arg);
w[izx] = (-1) * w[idx];
w[izx+1] = (-1) * w[idx + 1];
}
}
__global__ void twiddleRealKernel(float *wr, float *w, int N)
{
int idx = blockIdx.x * blockDim.x + threadIdx.x;
int i = 0, index;
if (idx < N) {
if (idx == 0) {
for (i = 0; i < N; i++)
wr[idx * N + i] = 1;
} else {
wr[idx * N + 0] = 1;
for (i = 1; i < N; i++) {
index = (idx * i) % N;
wr[idx * N + i] = w[index * 2];
}
}
}
}
__global__ void twiddleImgKernel(float *wi, float *w, int N)
{
int idx = blockIdx.x * blockDim.x + threadIdx.x;
int i, index;
if (idx < N) {
if (idx == 0) {
for (i = 0; i < N; i++)
wi[idx * N + i] = 0;
} else {
wi[idx * N + 0] = 0;
for (i = 1; i < N; i++) {
index = (idx * i) % N;
wi[idx * N + i] = w[index * 2 + 1];
}
}
}
}
int main(int agrc, char** argv)
{
float *x, *w, *w_r, *w_i;
float *d_x, *d_w, *dw_r, *dw_i;
int N = 10000, n = N/2;
x = (float *)malloc(N * sizeof(float));
w = (float *)malloc(2 * N * sizeof(float));
w_r = (float *)malloc(N * N * sizeof(float));
w_i = (float *)malloc(N * N * sizeof(float));
dim3 numberOfThreads(NUM_OF_X_THREADS, NUM_OF_Y_THREADS);
dim3 numberOfBlocks( (100 + NUM_OF_X_THREADS -1)/NUM_OF_X_THREADS,
(100 + NUM_OF_Y_THREADS - 1)/NUM_OF_Y_THREADS );
cudaMalloc((void **)&d_x, N * sizeof(float));
cudaMalloc((void **)&d_w, 2 * N * sizeof(float));
cudaMalloc((void **)&dw_r, N * N * sizeof(float));
cudaMalloc((void **)&dw_i, N * N * sizeof(float));
cudaMemset(d_x, 0, N * sizeof(float));
cudaMemset(d_w, 0, 2 * N * sizeof(float));
cudaMemset(dw_r, 0, N * N * sizeof(float));
cudaMemset(dw_i, 0, N * N * sizeof(float));
inputKernel<<<numberOfBlocks, numberOfThreads>>>(d_x, N);
cudaMemcpy(x, d_x, N * sizeof(float), cudaMemcpyDeviceToHost);
printf("%f\n",x[100]);
// Calculating factor
factorKernel<<<n/512, 512>>>(d_w, (float)N);
cudaMemcpy(w, d_w, 2 * N * sizeof(float), cudaMemcpyDeviceToHost);
printf("%f %f\n", w[5], w[10005]);
// Calculating twiddle real matrix
twiddleRealKernel<<<n/512, 512>>>(dw_r, d_w, N);
cudaMemcpy(w_r, dw_r, N * N * sizeof(float), cudaMemcpyDeviceToHost);
// Calculating twiddle imaginary matrix
twiddleImgKernel<<<n/512, 512>>>(dw_i, d_w, N);
cudaMemcpy(w_i, dw_i, N * N * sizeof(float), cudaMemcpyDeviceToHost);
/* int i,j;
for(i = 0; i < 50; i++)
{
for(j = 0; j < 50; j++) {
printf("%f \t", w_r[i*N + j]);
}
printf("\n");
}
printf("*********************************************************************************\n");
for(i = 0; i < 50; i++) {
for(j = 0; j < 50; j++) {
printf("%f \t", w_i[i*N + j]);
}
printf("\n");
}
*/
return 0;
} | #include<stdio.h>
#include<hip/hip_runtime.h>
/* Producing twiddle factors */
#define NUM_OF_X_THREADS 10
#define NUM_OF_Y_THREADS 10
__global__ void inputKernel(float *x, int N)
{
int ix = blockIdx.x * blockDim.x + threadIdx.x;
int iy = blockIdx.y * blockDim.y + threadIdx.y;
int idx = iy * NUM_OF_X_THREADS + ix;
if (idx < N)
x[idx] = x[idx] + (float)idx;
}
__global__ void factorKernel(float *w, int N)
{
int ix = blockIdx.x * blockDim.x + threadIdx.x;
int idx = ix * 2;
int izx = N + idx;
const float pi = 3.1415;
float aw = (2.0 * pi) / (float)N;
float arg = aw * (float)ix;
/* Twiddle factors are symmetric along N/2. with change in sign, due to 180 degree phase change */
if (idx < N) {
w[idx] = cos(arg);
w[idx + 1] = sin(arg);
w[izx] = (-1) * w[idx];
w[izx+1] = (-1) * w[idx + 1];
}
}
__global__ void twiddleRealKernel(float *wr, float *w, int N)
{
int idx = blockIdx.x * blockDim.x + threadIdx.x;
int i = 0, index;
if (idx < N) {
if (idx == 0) {
for (i = 0; i < N; i++)
wr[idx * N + i] = 1;
} else {
wr[idx * N + 0] = 1;
for (i = 1; i < N; i++) {
index = (idx * i) % N;
wr[idx * N + i] = w[index * 2];
}
}
}
}
__global__ void twiddleImgKernel(float *wi, float *w, int N)
{
int idx = blockIdx.x * blockDim.x + threadIdx.x;
int i, index;
if (idx < N) {
if (idx == 0) {
for (i = 0; i < N; i++)
wi[idx * N + i] = 0;
} else {
wi[idx * N + 0] = 0;
for (i = 1; i < N; i++) {
index = (idx * i) % N;
wi[idx * N + i] = w[index * 2 + 1];
}
}
}
}
int main(int agrc, char** argv)
{
float *x, *w, *w_r, *w_i;
float *d_x, *d_w, *dw_r, *dw_i;
int N = 10000, n = N/2;
x = (float *)malloc(N * sizeof(float));
w = (float *)malloc(2 * N * sizeof(float));
w_r = (float *)malloc(N * N * sizeof(float));
w_i = (float *)malloc(N * N * sizeof(float));
dim3 numberOfThreads(NUM_OF_X_THREADS, NUM_OF_Y_THREADS);
dim3 numberOfBlocks( (100 + NUM_OF_X_THREADS -1)/NUM_OF_X_THREADS,
(100 + NUM_OF_Y_THREADS - 1)/NUM_OF_Y_THREADS );
hipMalloc((void **)&d_x, N * sizeof(float));
hipMalloc((void **)&d_w, 2 * N * sizeof(float));
hipMalloc((void **)&dw_r, N * N * sizeof(float));
hipMalloc((void **)&dw_i, N * N * sizeof(float));
hipMemset(d_x, 0, N * sizeof(float));
hipMemset(d_w, 0, 2 * N * sizeof(float));
hipMemset(dw_r, 0, N * N * sizeof(float));
hipMemset(dw_i, 0, N * N * sizeof(float));
inputKernel<<<numberOfBlocks, numberOfThreads>>>(d_x, N);
hipMemcpy(x, d_x, N * sizeof(float), hipMemcpyDeviceToHost);
printf("%f\n",x[100]);
// Calculating factor
factorKernel<<<n/512, 512>>>(d_w, (float)N);
hipMemcpy(w, d_w, 2 * N * sizeof(float), hipMemcpyDeviceToHost);
printf("%f %f\n", w[5], w[10005]);
// Calculating twiddle real matrix
twiddleRealKernel<<<n/512, 512>>>(dw_r, d_w, N);
hipMemcpy(w_r, dw_r, N * N * sizeof(float), hipMemcpyDeviceToHost);
// Calculating twiddle imaginary matrix
twiddleImgKernel<<<n/512, 512>>>(dw_i, d_w, N);
hipMemcpy(w_i, dw_i, N * N * sizeof(float), hipMemcpyDeviceToHost);
/* int i,j;
for(i = 0; i < 50; i++)
{
for(j = 0; j < 50; j++) {
printf("%f \t", w_r[i*N + j]);
}
printf("\n");
}
printf("*********************************************************************************\n");
for(i = 0; i < 50; i++) {
for(j = 0; j < 50; j++) {
printf("%f \t", w_i[i*N + j]);
}
printf("\n");
}
*/
return 0;
} |
You are a helpful coding assistant specialized in converting HIP source code to AMD device assembly. | #include<stdio.h>
#include<hip/hip_runtime.h>
/* Producing twiddle factors */
#define NUM_OF_X_THREADS 10
#define NUM_OF_Y_THREADS 10
__global__ void inputKernel(float *x, int N)
{
int ix = blockIdx.x * blockDim.x + threadIdx.x;
int iy = blockIdx.y * blockDim.y + threadIdx.y;
int idx = iy * NUM_OF_X_THREADS + ix;
if (idx < N)
x[idx] = x[idx] + (float)idx;
}
__global__ void factorKernel(float *w, int N)
{
int ix = blockIdx.x * blockDim.x + threadIdx.x;
int idx = ix * 2;
int izx = N + idx;
const float pi = 3.1415;
float aw = (2.0 * pi) / (float)N;
float arg = aw * (float)ix;
/* Twiddle factors are symmetric along N/2. with change in sign, due to 180 degree phase change */
if (idx < N) {
w[idx] = cos(arg);
w[idx + 1] = sin(arg);
w[izx] = (-1) * w[idx];
w[izx+1] = (-1) * w[idx + 1];
}
}
__global__ void twiddleRealKernel(float *wr, float *w, int N)
{
int idx = blockIdx.x * blockDim.x + threadIdx.x;
int i = 0, index;
if (idx < N) {
if (idx == 0) {
for (i = 0; i < N; i++)
wr[idx * N + i] = 1;
} else {
wr[idx * N + 0] = 1;
for (i = 1; i < N; i++) {
index = (idx * i) % N;
wr[idx * N + i] = w[index * 2];
}
}
}
}
__global__ void twiddleImgKernel(float *wi, float *w, int N)
{
int idx = blockIdx.x * blockDim.x + threadIdx.x;
int i, index;
if (idx < N) {
if (idx == 0) {
for (i = 0; i < N; i++)
wi[idx * N + i] = 0;
} else {
wi[idx * N + 0] = 0;
for (i = 1; i < N; i++) {
index = (idx * i) % N;
wi[idx * N + i] = w[index * 2 + 1];
}
}
}
}
int main(int agrc, char** argv)
{
float *x, *w, *w_r, *w_i;
float *d_x, *d_w, *dw_r, *dw_i;
int N = 10000, n = N/2;
x = (float *)malloc(N * sizeof(float));
w = (float *)malloc(2 * N * sizeof(float));
w_r = (float *)malloc(N * N * sizeof(float));
w_i = (float *)malloc(N * N * sizeof(float));
dim3 numberOfThreads(NUM_OF_X_THREADS, NUM_OF_Y_THREADS);
dim3 numberOfBlocks( (100 + NUM_OF_X_THREADS -1)/NUM_OF_X_THREADS,
(100 + NUM_OF_Y_THREADS - 1)/NUM_OF_Y_THREADS );
hipMalloc((void **)&d_x, N * sizeof(float));
hipMalloc((void **)&d_w, 2 * N * sizeof(float));
hipMalloc((void **)&dw_r, N * N * sizeof(float));
hipMalloc((void **)&dw_i, N * N * sizeof(float));
hipMemset(d_x, 0, N * sizeof(float));
hipMemset(d_w, 0, 2 * N * sizeof(float));
hipMemset(dw_r, 0, N * N * sizeof(float));
hipMemset(dw_i, 0, N * N * sizeof(float));
inputKernel<<<numberOfBlocks, numberOfThreads>>>(d_x, N);
hipMemcpy(x, d_x, N * sizeof(float), hipMemcpyDeviceToHost);
printf("%f\n",x[100]);
// Calculating factor
factorKernel<<<n/512, 512>>>(d_w, (float)N);
hipMemcpy(w, d_w, 2 * N * sizeof(float), hipMemcpyDeviceToHost);
printf("%f %f\n", w[5], w[10005]);
// Calculating twiddle real matrix
twiddleRealKernel<<<n/512, 512>>>(dw_r, d_w, N);
hipMemcpy(w_r, dw_r, N * N * sizeof(float), hipMemcpyDeviceToHost);
// Calculating twiddle imaginary matrix
twiddleImgKernel<<<n/512, 512>>>(dw_i, d_w, N);
hipMemcpy(w_i, dw_i, N * N * sizeof(float), hipMemcpyDeviceToHost);
/* int i,j;
for(i = 0; i < 50; i++)
{
for(j = 0; j < 50; j++) {
printf("%f \t", w_r[i*N + j]);
}
printf("\n");
}
printf("*********************************************************************************\n");
for(i = 0; i < 50; i++) {
for(j = 0; j < 50; j++) {
printf("%f \t", w_i[i*N + j]);
}
printf("\n");
}
*/
return 0;
} | .text
.amdgcn_target "amdgcn-amd-amdhsa--gfx1100"
.protected _Z11inputKernelPfi
.globl _Z11inputKernelPfi
.p2align 8
.type _Z11inputKernelPfi,@function
_Z11inputKernelPfi:
s_load_b32 s2, s[0:1], 0x1c
v_bfe_u32 v1, v0, 10, 10
v_and_b32_e32 v0, 0x3ff, v0
s_waitcnt lgkmcnt(0)
s_lshr_b32 s3, s2, 16
s_and_b32 s2, s2, 0xffff
v_mad_u64_u32 v[2:3], null, s15, s3, v[1:2]
s_load_b32 s3, s[0:1], 0x8
s_mul_i32 s14, s14, s2
s_mov_b32 s2, exec_lo
s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
v_mul_lo_u32 v1, v2, 10
v_add3_u32 v0, s14, v0, v1
s_waitcnt lgkmcnt(0)
s_delay_alu instid0(VALU_DEP_1)
v_cmpx_gt_i32_e64 s3, v0
s_cbranch_execz .LBB0_2
s_load_b64 s[0:1], s[0:1], 0x0
v_ashrrev_i32_e32 v1, 31, v0
s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_2) | instid1(VALU_DEP_2)
v_lshlrev_b64 v[1:2], 2, v[0:1]
v_cvt_f32_i32_e32 v0, v0
s_waitcnt lgkmcnt(0)
v_add_co_u32 v1, vcc_lo, s0, v1
s_delay_alu instid0(VALU_DEP_3)
v_add_co_ci_u32_e32 v2, vcc_lo, s1, v2, vcc_lo
global_load_b32 v3, v[1:2], off
s_waitcnt vmcnt(0)
v_add_f32_e32 v0, v3, v0
global_store_b32 v[1:2], v0, off
.LBB0_2:
s_nop 0
s_sendmsg sendmsg(MSG_DEALLOC_VGPRS)
s_endpgm
.section .rodata,"a",@progbits
.p2align 6, 0x0
.amdhsa_kernel _Z11inputKernelPfi
.amdhsa_group_segment_fixed_size 0
.amdhsa_private_segment_fixed_size 0
.amdhsa_kernarg_size 272
.amdhsa_user_sgpr_count 14
.amdhsa_user_sgpr_dispatch_ptr 0
.amdhsa_user_sgpr_queue_ptr 0
.amdhsa_user_sgpr_kernarg_segment_ptr 1
.amdhsa_user_sgpr_dispatch_id 0
.amdhsa_user_sgpr_private_segment_size 0
.amdhsa_wavefront_size32 1
.amdhsa_uses_dynamic_stack 0
.amdhsa_enable_private_segment 0
.amdhsa_system_sgpr_workgroup_id_x 1
.amdhsa_system_sgpr_workgroup_id_y 1
.amdhsa_system_sgpr_workgroup_id_z 0
.amdhsa_system_sgpr_workgroup_info 0
.amdhsa_system_vgpr_workitem_id 1
.amdhsa_next_free_vgpr 4
.amdhsa_next_free_sgpr 16
.amdhsa_float_round_mode_32 0
.amdhsa_float_round_mode_16_64 0
.amdhsa_float_denorm_mode_32 3
.amdhsa_float_denorm_mode_16_64 3
.amdhsa_dx10_clamp 1
.amdhsa_ieee_mode 1
.amdhsa_fp16_overflow 0
.amdhsa_workgroup_processor_mode 1
.amdhsa_memory_ordered 1
.amdhsa_forward_progress 0
.amdhsa_shared_vgpr_count 0
.amdhsa_exception_fp_ieee_invalid_op 0
.amdhsa_exception_fp_denorm_src 0
.amdhsa_exception_fp_ieee_div_zero 0
.amdhsa_exception_fp_ieee_overflow 0
.amdhsa_exception_fp_ieee_underflow 0
.amdhsa_exception_fp_ieee_inexact 0
.amdhsa_exception_int_div_zero 0
.end_amdhsa_kernel
.text
.Lfunc_end0:
.size _Z11inputKernelPfi, .Lfunc_end0-_Z11inputKernelPfi
.section .AMDGPU.csdata,"",@progbits
.text
.protected _Z12factorKernelPfi
.globl _Z12factorKernelPfi
.p2align 8
.type _Z12factorKernelPfi,@function
_Z12factorKernelPfi:
s_clause 0x1
s_load_b32 s2, s[0:1], 0x1c
s_load_b32 s6, s[0:1], 0x8
s_waitcnt lgkmcnt(0)
s_and_b32 s2, s2, 0xffff
s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
v_mad_u64_u32 v[1:2], null, s15, s2, v[0:1]
s_mov_b32 s2, exec_lo
v_lshlrev_b32_e32 v0, 1, v1
s_delay_alu instid0(VALU_DEP_1)
v_cmpx_gt_i32_e64 s6, v0
s_cbranch_execz .LBB1_10
v_cvt_f32_i32_e32 v2, s6
v_cvt_f32_i32_e32 v1, v1
s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_2)
v_div_scale_f32 v3, null, v2, v2, 0x40c90e56
v_div_scale_f32 v6, vcc_lo, 0x40c90e56, v2, 0x40c90e56
v_rcp_f32_e32 v4, v3
s_waitcnt_depctr 0xfff
v_fma_f32 v5, -v3, v4, 1.0
s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
v_fmac_f32_e32 v4, v5, v4
v_mul_f32_e32 v5, v6, v4
s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
v_fma_f32 v7, -v3, v5, v6
v_fmac_f32_e32 v5, v7, v4
s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
v_fma_f32 v3, -v3, v5, v6
v_div_fmas_f32 v3, v3, v4, v5
s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
v_div_fixup_f32 v2, v3, v2, 0x40c90e56
v_mul_f32_e32 v2, v2, v1
s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
v_and_b32_e32 v3, 0x7fffffff, v2
v_cmp_ngt_f32_e64 s7, 0x48000000, |v2|
s_and_saveexec_b32 s2, s7
s_delay_alu instid0(SALU_CYCLE_1)
s_xor_b32 s4, exec_lo, s2
s_cbranch_execz .LBB1_3
s_mov_b32 s2, 0x7fffff
v_mov_b32_e32 v6, 0
v_and_or_b32 v1, v3, s2, 0x800000
v_lshrrev_b32_e32 v11, 23, v3
s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
v_mad_u64_u32 v[4:5], null, v1, 0xfe5163ab, 0
v_add_nc_u32_e32 v12, 0xffffff88, v11
s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_3)
v_cmp_lt_u32_e32 vcc_lo, 63, v12
v_mad_u64_u32 v[7:8], null, v1, 0x3c439041, v[5:6]
v_cndmask_b32_e64 v13, 0, 0xffffffc0, vcc_lo
s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
v_mov_b32_e32 v5, v8
v_add_nc_u32_e32 v13, v13, v12
s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
v_mad_u64_u32 v[8:9], null, v1, 0xdb629599, v[5:6]
v_cmp_lt_u32_e64 s2, 31, v13
s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_3)
v_cndmask_b32_e64 v14, 0, 0xffffffe0, s2
v_dual_mov_b32 v5, v9 :: v_dual_cndmask_b32 v4, v8, v4
s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
v_add_nc_u32_e32 v14, v14, v13
v_mad_u64_u32 v[9:10], null, v1, 0xf534ddc0, v[5:6]
s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
v_cmp_lt_u32_e64 s3, 31, v14
v_mov_b32_e32 v5, v10
s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_2)
v_cndmask_b32_e32 v7, v9, v7, vcc_lo
v_mad_u64_u32 v[10:11], null, v1, 0xfc2757d1, v[5:6]
s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
v_cndmask_b32_e64 v4, v7, v4, s2
v_mov_b32_e32 v5, v11
s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
v_mad_u64_u32 v[11:12], null, v1, 0x4e441529, v[5:6]
v_mov_b32_e32 v5, v12
s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_4)
v_mad_u64_u32 v[12:13], null, v1, 0xa2f9836e, v[5:6]
v_cndmask_b32_e64 v1, 0, 0xffffffe0, s3
v_cndmask_b32_e32 v5, v11, v9, vcc_lo
s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_4)
v_add_nc_u32_e32 v1, v1, v14
v_dual_cndmask_b32 v6, v12, v10 :: v_dual_cndmask_b32 v11, v13, v11
v_cndmask_b32_e32 v10, v10, v8, vcc_lo
s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3)
v_cmp_eq_u32_e32 vcc_lo, 0, v1
v_cndmask_b32_e64 v9, v6, v5, s2
s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_4)
v_cndmask_b32_e64 v6, v11, v6, s2
v_cndmask_b32_e64 v5, v5, v10, s2
v_sub_nc_u32_e32 v11, 32, v1
v_cndmask_b32_e64 v10, v10, v7, s2
s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_4)
v_cndmask_b32_e64 v6, v6, v9, s3
v_cndmask_b32_e64 v9, v9, v5, s3
s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_1) | instid1(VALU_DEP_3)
v_cndmask_b32_e64 v5, v5, v10, s3
v_cndmask_b32_e64 v4, v10, v4, s3
v_alignbit_b32 v12, v6, v9, v11
s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3)
v_alignbit_b32 v8, v9, v5, v11
v_alignbit_b32 v10, v5, v4, v11
s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3)
v_cndmask_b32_e32 v1, v12, v6, vcc_lo
v_cndmask_b32_e32 v6, v8, v9, vcc_lo
s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_4)
v_bfe_u32 v7, v1, 29, 1
v_cndmask_b32_e32 v5, v10, v5, vcc_lo
s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3)
v_alignbit_b32 v8, v1, v6, 30
v_sub_nc_u32_e32 v9, 0, v7
s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_1) | instid1(VALU_DEP_3)
v_alignbit_b32 v6, v6, v5, 30
v_alignbit_b32 v4, v5, v4, 30
v_xor_b32_e32 v8, v8, v9
s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3)
v_xor_b32_e32 v5, v6, v9
v_xor_b32_e32 v4, v4, v9
s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_1)
v_clz_i32_u32_e32 v10, v8
v_min_u32_e32 v10, 32, v10
s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_2)
v_sub_nc_u32_e32 v6, 31, v10
v_lshlrev_b32_e32 v12, 23, v10
v_alignbit_b32 v8, v8, v5, v6
v_alignbit_b32 v4, v5, v4, v6
v_lshrrev_b32_e32 v6, 29, v1
s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
v_alignbit_b32 v5, v8, v4, 9
v_lshlrev_b32_e32 v6, 31, v6
v_lshrrev_b32_e32 v8, 9, v8
s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3)
v_clz_i32_u32_e32 v9, v5
v_or_b32_e32 v11, 0.5, v6
s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
v_min_u32_e32 v9, 32, v9
v_sub_nc_u32_e32 v11, v11, v12
s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
v_sub_nc_u32_e32 v13, 31, v9
v_alignbit_b32 v4, v5, v4, v13
s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_1) | instid1(VALU_DEP_3)
v_or_b32_e32 v5, v8, v11
v_add_lshl_u32 v8, v9, v10, 23
v_lshrrev_b32_e32 v4, 9, v4
s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_2)
v_mul_f32_e32 v9, 0x3fc90fda, v5
v_sub_nc_u32_e32 v4, v4, v8
s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
v_fma_f32 v8, v5, 0x3fc90fda, -v9
v_add_nc_u32_e32 v4, 0x33000000, v4
s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
v_fmamk_f32 v5, v5, 0x33a22168, v8
v_or_b32_e32 v4, v4, v6
s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
v_fmac_f32_e32 v5, 0x3fc90fda, v4
v_lshrrev_b32_e32 v4, 30, v1
v_dual_add_f32 v1, v9, v5 :: v_dual_add_nc_u32 v4, v7, v4
.LBB1_3:
s_and_not1_saveexec_b32 s2, s4
v_mul_f32_e64 v1, 0x3f22f983, |v2|
s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
v_rndne_f32_e32 v4, v1
v_fma_f32 v1, v4, 0xbfc90fda, |v2|
s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
v_fmamk_f32 v1, v4, 0xb3a22168, v1
v_fmamk_f32 v1, v4, 0xa7c234c4, v1
v_cvt_i32_f32_e32 v4, v4
s_or_b32 exec_lo, exec_lo, s2
s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_3) | instid1(VALU_DEP_1)
v_dual_mul_f32 v5, v1, v1 :: v_dual_and_b32 v8, 1, v4
s_mov_b32 s2, 0xb94c1982
s_mov_b32 s3, 0x37d75334
s_load_b64 s[4:5], s[0:1], 0x0
v_fmaak_f32 v6, s2, v5, 0x3c0881c4
v_cmp_eq_u32_e32 vcc_lo, 0, v8
v_lshlrev_b32_e32 v4, 30, v4
s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_1) | instid1(VALU_DEP_3)
v_fmaak_f32 v6, v5, v6, 0xbe2aaa9d
v_fmaak_f32 v7, s3, v5, 0xbab64f3b
v_and_b32_e32 v4, 0x80000000, v4
s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3)
v_mul_f32_e32 v6, v5, v6
v_fmaak_f32 v7, v5, v7, 0x3d2aabf7
s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
v_fmac_f32_e32 v1, v1, v6
v_fmaak_f32 v7, v5, v7, 0xbf000004
s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
v_fma_f32 v5, v5, v7, 1.0
v_cndmask_b32_e64 v5, -v1, v5, vcc_lo
v_ashrrev_i32_e32 v1, 31, v0
v_cmp_class_f32_e64 vcc_lo, v2, 0x1f8
s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3)
v_xor_b32_e32 v6, v4, v5
v_lshlrev_b64 v[4:5], 2, v[0:1]
s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_2)
v_cndmask_b32_e32 v1, 0x7fc00000, v6, vcc_lo
s_waitcnt lgkmcnt(0)
v_add_co_u32 v4, s0, s4, v4
s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_2) | instid1(SALU_CYCLE_1)
v_add_co_ci_u32_e64 v5, s0, s5, v5, s0
global_store_b32 v[4:5], v1, off
s_and_saveexec_b32 s0, s7
s_xor_b32 s3, exec_lo, s0
s_cbranch_execz .LBB1_7
s_mov_b32 s0, 0x7fffff
v_mov_b32_e32 v6, 0
v_and_or_b32 v14, v3, s0, 0x800000
v_lshrrev_b32_e32 v11, 23, v3
s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
v_mad_u64_u32 v[4:5], null, v14, 0xfe5163ab, 0
v_add_nc_u32_e32 v12, 0xffffff88, v11
s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_3)
v_cmp_lt_u32_e64 s0, 63, v12
v_mad_u64_u32 v[7:8], null, v14, 0x3c439041, v[5:6]
s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
v_cndmask_b32_e64 v13, 0, 0xffffffc0, s0
v_mov_b32_e32 v5, v8
s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
v_add_nc_u32_e32 v13, v13, v12
v_mad_u64_u32 v[8:9], null, v14, 0xdb629599, v[5:6]
s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
v_cmp_lt_u32_e64 s1, 31, v13
v_cndmask_b32_e64 v15, 0, 0xffffffe0, s1
s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_4)
v_mov_b32_e32 v5, v9
v_cndmask_b32_e64 v4, v8, v4, s0
s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3)
v_add_nc_u32_e32 v15, v15, v13
v_mad_u64_u32 v[9:10], null, v14, 0xf534ddc0, v[5:6]
s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
v_cmp_lt_u32_e64 s2, 31, v15
v_mov_b32_e32 v5, v10
s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_2)
v_cndmask_b32_e64 v7, v9, v7, s0
v_mad_u64_u32 v[10:11], null, v14, 0xfc2757d1, v[5:6]
s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
v_cndmask_b32_e64 v4, v7, v4, s1
v_mov_b32_e32 v5, v11
s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
v_mad_u64_u32 v[11:12], null, v14, 0x4e441529, v[5:6]
v_mov_b32_e32 v5, v12
s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_4)
v_mad_u64_u32 v[12:13], null, v14, 0xa2f9836e, v[5:6]
v_cndmask_b32_e64 v5, 0, 0xffffffe0, s2
v_cndmask_b32_e64 v6, v11, v9, s0
s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_4)
v_add_nc_u32_e32 v5, v5, v15
v_cndmask_b32_e64 v12, v12, v10, s0
v_cndmask_b32_e64 v11, v13, v11, s0
v_cndmask_b32_e64 v10, v10, v8, s0
s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_4)
v_cmp_eq_u32_e64 s0, 0, v5
v_cndmask_b32_e64 v9, v12, v6, s1
s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_4)
v_cndmask_b32_e64 v11, v11, v12, s1
v_cndmask_b32_e64 v6, v6, v10, s1
v_sub_nc_u32_e32 v12, 32, v5
v_cndmask_b32_e64 v10, v10, v7, s1
s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_4)
v_cndmask_b32_e64 v11, v11, v9, s2
v_cndmask_b32_e64 v9, v9, v6, s2
s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_1) | instid1(VALU_DEP_3)
v_cndmask_b32_e64 v6, v6, v10, s2
v_cndmask_b32_e64 v4, v10, v4, s2
v_alignbit_b32 v13, v11, v9, v12
s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_2)
v_alignbit_b32 v8, v9, v6, v12
v_cndmask_b32_e64 v5, v13, v11, s0
s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_3)
v_alignbit_b32 v11, v6, v4, v12
v_cndmask_b32_e64 v7, v8, v9, s0
s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3)
v_bfe_u32 v8, v5, 29, 1
v_cndmask_b32_e64 v6, v11, v6, s0
s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3)
v_alignbit_b32 v9, v5, v7, 30
v_sub_nc_u32_e32 v10, 0, v8
s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_1) | instid1(VALU_DEP_3)
v_alignbit_b32 v7, v7, v6, 30
v_alignbit_b32 v4, v6, v4, 30
v_xor_b32_e32 v9, v9, v10
s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3)
v_xor_b32_e32 v6, v7, v10
v_xor_b32_e32 v4, v4, v10
s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_1)
v_clz_i32_u32_e32 v11, v9
v_min_u32_e32 v11, 32, v11
s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_2)
v_sub_nc_u32_e32 v7, 31, v11
v_lshlrev_b32_e32 v13, 23, v11
v_alignbit_b32 v9, v9, v6, v7
v_alignbit_b32 v4, v6, v4, v7
v_lshrrev_b32_e32 v7, 29, v5
v_lshrrev_b32_e32 v5, 30, v5
s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3)
v_alignbit_b32 v6, v9, v4, 9
v_lshlrev_b32_e32 v7, 31, v7
v_lshrrev_b32_e32 v9, 9, v9
s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_4)
v_add_nc_u32_e32 v5, v8, v5
v_clz_i32_u32_e32 v10, v6
s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_2)
v_or_b32_e32 v12, 0.5, v7
v_min_u32_e32 v10, 32, v10
s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
v_sub_nc_u32_e32 v12, v12, v13
v_sub_nc_u32_e32 v14, 31, v10
s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_3)
v_alignbit_b32 v4, v6, v4, v14
v_or_b32_e32 v6, v9, v12
v_add_lshl_u32 v9, v10, v11, 23
s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3)
v_lshrrev_b32_e32 v4, 9, v4
v_mul_f32_e32 v10, 0x3fc90fda, v6
s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
v_sub_nc_u32_e32 v4, v4, v9
v_fma_f32 v9, v6, 0x3fc90fda, -v10
s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
v_add_nc_u32_e32 v4, 0x33000000, v4
v_fmamk_f32 v6, v6, 0x33a22168, v9
s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
v_or_b32_e32 v4, v4, v7
v_fmac_f32_e32 v6, 0x3fc90fda, v4
s_delay_alu instid0(VALU_DEP_1)
v_add_f32_e32 v4, v10, v6
.LBB1_7:
s_and_not1_saveexec_b32 s0, s3
v_mul_f32_e64 v4, 0x3f22f983, |v2|
s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
v_rndne_f32_e32 v5, v4
v_fma_f32 v4, v5, 0xbfc90fda, |v2|
s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
v_fmamk_f32 v4, v5, 0xb3a22168, v4
v_fmamk_f32 v4, v5, 0xa7c234c4, v4
v_cvt_i32_f32_e32 v5, v5
s_or_b32 exec_lo, exec_lo, s0
s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_2) | instid1(VALU_DEP_1)
v_dual_mul_f32 v7, v4, v4 :: v_dual_and_b32 v10, 1, v5
s_mov_b32 s0, 0xb94c1982
s_mov_b32 s1, 0x37d75334
v_fmaak_f32 v6, s0, v7, 0x3c0881c4
v_fmaak_f32 v8, s1, v7, 0xbab64f3b
v_cmp_eq_u32_e64 s0, 0, v10
s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3)
v_dual_fmaak_f32 v9, v7, v6, 0xbe2aaa9d :: v_dual_add_nc_u32 v6, s6, v0
v_fmaak_f32 v8, v7, v8, 0x3d2aabf7
s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
v_mul_f32_e32 v9, v7, v9
v_fmaak_f32 v11, v7, v8, 0xbf000004
v_or_b32_e32 v8, 1, v0
v_lshlrev_b32_e32 v0, 30, v5
v_xor_b32_e32 v5, v3, v2
v_fmac_f32_e32 v4, v4, v9
v_fma_f32 v2, v7, v11, 1.0
v_ashrrev_i32_e32 v9, 31, v8
v_and_b32_e32 v11, 0x80000000, v0
v_ashrrev_i32_e32 v7, 31, v6
s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_4)
v_cndmask_b32_e64 v4, v2, v4, s0
v_lshlrev_b64 v[2:3], 2, v[8:9]
v_xor_b32_e32 v8, 0x80000000, v1
s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_4)
v_lshlrev_b64 v[0:1], 2, v[6:7]
v_xor3_b32 v4, v5, v11, v4
s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_1)
v_add_co_u32 v2, s0, s4, v2
v_add_co_ci_u32_e64 v3, s0, s5, v3, s0
s_delay_alu instid0(VALU_DEP_3)
v_cndmask_b32_e32 v4, 0x7fc00000, v4, vcc_lo
v_add_co_u32 v0, vcc_lo, s4, v0
v_add_co_ci_u32_e32 v1, vcc_lo, s5, v1, vcc_lo
s_clause 0x1
global_store_b32 v[2:3], v4, off
global_store_b32 v[0:1], v8, off
global_load_b32 v2, v[2:3], off
s_waitcnt vmcnt(0)
v_xor_b32_e32 v2, 0x80000000, v2
global_store_b32 v[0:1], v2, off offset:4
.LBB1_10:
s_nop 0
s_sendmsg sendmsg(MSG_DEALLOC_VGPRS)
s_endpgm
.section .rodata,"a",@progbits
.p2align 6, 0x0
.amdhsa_kernel _Z12factorKernelPfi
.amdhsa_group_segment_fixed_size 0
.amdhsa_private_segment_fixed_size 0
.amdhsa_kernarg_size 272
.amdhsa_user_sgpr_count 15
.amdhsa_user_sgpr_dispatch_ptr 0
.amdhsa_user_sgpr_queue_ptr 0
.amdhsa_user_sgpr_kernarg_segment_ptr 1
.amdhsa_user_sgpr_dispatch_id 0
.amdhsa_user_sgpr_private_segment_size 0
.amdhsa_wavefront_size32 1
.amdhsa_uses_dynamic_stack 0
.amdhsa_enable_private_segment 0
.amdhsa_system_sgpr_workgroup_id_x 1
.amdhsa_system_sgpr_workgroup_id_y 0
.amdhsa_system_sgpr_workgroup_id_z 0
.amdhsa_system_sgpr_workgroup_info 0
.amdhsa_system_vgpr_workitem_id 0
.amdhsa_next_free_vgpr 16
.amdhsa_next_free_sgpr 16
.amdhsa_float_round_mode_32 0
.amdhsa_float_round_mode_16_64 0
.amdhsa_float_denorm_mode_32 3
.amdhsa_float_denorm_mode_16_64 3
.amdhsa_dx10_clamp 1
.amdhsa_ieee_mode 1
.amdhsa_fp16_overflow 0
.amdhsa_workgroup_processor_mode 1
.amdhsa_memory_ordered 1
.amdhsa_forward_progress 0
.amdhsa_shared_vgpr_count 0
.amdhsa_exception_fp_ieee_invalid_op 0
.amdhsa_exception_fp_denorm_src 0
.amdhsa_exception_fp_ieee_div_zero 0
.amdhsa_exception_fp_ieee_overflow 0
.amdhsa_exception_fp_ieee_underflow 0
.amdhsa_exception_fp_ieee_inexact 0
.amdhsa_exception_int_div_zero 0
.end_amdhsa_kernel
.text
.Lfunc_end1:
.size _Z12factorKernelPfi, .Lfunc_end1-_Z12factorKernelPfi
.section .AMDGPU.csdata,"",@progbits
.text
.protected _Z17twiddleRealKernelPfS_i
.globl _Z17twiddleRealKernelPfS_i
.p2align 8
.type _Z17twiddleRealKernelPfS_i,@function
_Z17twiddleRealKernelPfS_i:
s_clause 0x1
s_load_b32 s2, s[0:1], 0x24
s_load_b32 s4, s[0:1], 0x10
s_waitcnt lgkmcnt(0)
s_and_b32 s2, s2, 0xffff
s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
v_mad_u64_u32 v[1:2], null, s15, s2, v[0:1]
s_mov_b32 s2, exec_lo
v_cmpx_gt_i32_e64 s4, v1
s_cbranch_execz .LBB2_9
s_load_b64 s[2:3], s[0:1], 0x0
s_mov_b32 s5, exec_lo
v_cmpx_ne_u32_e32 0, v1
s_xor_b32 s5, exec_lo, s5
s_cbranch_execz .LBB2_5
v_mul_lo_u32 v2, v1, s4
v_mov_b32_e32 v0, 1.0
s_cmp_lt_i32 s4, 2
s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
v_ashrrev_i32_e32 v3, 31, v2
v_lshlrev_b64 v[3:4], 2, v[2:3]
s_waitcnt lgkmcnt(0)
s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_2)
v_add_co_u32 v3, vcc_lo, s2, v3
v_add_co_ci_u32_e32 v4, vcc_lo, s3, v4, vcc_lo
global_store_b32 v[3:4], v0, off
s_cbranch_scc1 .LBB2_5
s_ashr_i32 s6, s4, 31
s_load_b64 s[0:1], s[0:1], 0x8
s_add_i32 s7, s4, s6
s_delay_alu instid0(SALU_CYCLE_1) | instskip(NEXT) | instid1(SALU_CYCLE_1)
s_xor_b32 s6, s7, s6
v_cvt_f32_u32_e32 v0, s6
s_sub_i32 s7, 0, s6
s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_2) | instid1(VALU_DEP_1)
v_rcp_iflag_f32_e32 v0, v0
s_waitcnt_depctr 0xfff
v_mul_f32_e32 v0, 0x4f7ffffe, v0
v_cvt_u32_f32_e32 v0, v0
s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
v_mul_lo_u32 v3, s7, v0
s_mov_b32 s7, 1
v_mul_hi_u32 v3, v0, v3
s_delay_alu instid0(VALU_DEP_1)
v_dual_mov_b32 v3, v1 :: v_dual_add_nc_u32 v0, v0, v3
s_set_inst_prefetch_distance 0x1
.p2align 6
.LBB2_4:
s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
v_ashrrev_i32_e32 v4, 31, v3
v_add_nc_u32_e32 v5, v3, v4
v_add_nc_u32_e32 v3, v3, v1
s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
v_xor_b32_e32 v5, v5, v4
v_mul_hi_u32 v6, v5, v0
s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
v_mul_lo_u32 v6, v6, s6
v_sub_nc_u32_e32 v5, v5, v6
s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_2)
v_subrev_nc_u32_e32 v6, s6, v5
v_cmp_le_u32_e32 vcc_lo, s6, v5
v_cndmask_b32_e32 v5, v5, v6, vcc_lo
s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_2)
v_subrev_nc_u32_e32 v6, s6, v5
v_cmp_le_u32_e32 vcc_lo, s6, v5
v_cndmask_b32_e32 v5, v5, v6, vcc_lo
s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
v_xor_b32_e32 v5, v5, v4
v_sub_nc_u32_e32 v4, v5, v4
s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
v_lshlrev_b32_e32 v4, 1, v4
v_ashrrev_i32_e32 v5, 31, v4
s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
v_lshlrev_b64 v[4:5], 2, v[4:5]
s_waitcnt lgkmcnt(0)
v_add_co_u32 v4, vcc_lo, s0, v4
s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_3) | instid1(SALU_CYCLE_1)
v_add_co_ci_u32_e32 v5, vcc_lo, s1, v5, vcc_lo
global_load_b32 v6, v[4:5], off
v_add_nc_u32_e32 v4, s7, v2
s_add_i32 s7, s7, 1
s_cmp_lg_u32 s4, s7
s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
v_ashrrev_i32_e32 v5, 31, v4
v_lshlrev_b64 v[4:5], 2, v[4:5]
s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_2)
v_add_co_u32 v4, vcc_lo, s2, v4
v_add_co_ci_u32_e32 v5, vcc_lo, s3, v5, vcc_lo
s_waitcnt vmcnt(0)
global_store_b32 v[4:5], v6, off
s_cbranch_scc1 .LBB2_4
.LBB2_5:
s_set_inst_prefetch_distance 0x2
s_and_not1_saveexec_b32 s0, s5
s_cbranch_execz .LBB2_9
s_cmp_lt_i32 s4, 1
s_cbranch_scc1 .LBB2_9
v_dual_mov_b32 v0, 0 :: v_dual_mov_b32 v1, 1.0
.LBB2_8:
s_add_i32 s4, s4, -1
s_waitcnt lgkmcnt(0)
global_store_b32 v0, v1, s[2:3]
s_add_u32 s2, s2, 4
s_addc_u32 s3, s3, 0
s_cmp_eq_u32 s4, 0
s_cbranch_scc0 .LBB2_8
.LBB2_9:
s_nop 0
s_sendmsg sendmsg(MSG_DEALLOC_VGPRS)
s_endpgm
.section .rodata,"a",@progbits
.p2align 6, 0x0
.amdhsa_kernel _Z17twiddleRealKernelPfS_i
.amdhsa_group_segment_fixed_size 0
.amdhsa_private_segment_fixed_size 0
.amdhsa_kernarg_size 280
.amdhsa_user_sgpr_count 15
.amdhsa_user_sgpr_dispatch_ptr 0
.amdhsa_user_sgpr_queue_ptr 0
.amdhsa_user_sgpr_kernarg_segment_ptr 1
.amdhsa_user_sgpr_dispatch_id 0
.amdhsa_user_sgpr_private_segment_size 0
.amdhsa_wavefront_size32 1
.amdhsa_uses_dynamic_stack 0
.amdhsa_enable_private_segment 0
.amdhsa_system_sgpr_workgroup_id_x 1
.amdhsa_system_sgpr_workgroup_id_y 0
.amdhsa_system_sgpr_workgroup_id_z 0
.amdhsa_system_sgpr_workgroup_info 0
.amdhsa_system_vgpr_workitem_id 0
.amdhsa_next_free_vgpr 7
.amdhsa_next_free_sgpr 16
.amdhsa_float_round_mode_32 0
.amdhsa_float_round_mode_16_64 0
.amdhsa_float_denorm_mode_32 3
.amdhsa_float_denorm_mode_16_64 3
.amdhsa_dx10_clamp 1
.amdhsa_ieee_mode 1
.amdhsa_fp16_overflow 0
.amdhsa_workgroup_processor_mode 1
.amdhsa_memory_ordered 1
.amdhsa_forward_progress 0
.amdhsa_shared_vgpr_count 0
.amdhsa_exception_fp_ieee_invalid_op 0
.amdhsa_exception_fp_denorm_src 0
.amdhsa_exception_fp_ieee_div_zero 0
.amdhsa_exception_fp_ieee_overflow 0
.amdhsa_exception_fp_ieee_underflow 0
.amdhsa_exception_fp_ieee_inexact 0
.amdhsa_exception_int_div_zero 0
.end_amdhsa_kernel
.text
.Lfunc_end2:
.size _Z17twiddleRealKernelPfS_i, .Lfunc_end2-_Z17twiddleRealKernelPfS_i
.section .AMDGPU.csdata,"",@progbits
.text
.protected _Z16twiddleImgKernelPfS_i
.globl _Z16twiddleImgKernelPfS_i
.p2align 8
.type _Z16twiddleImgKernelPfS_i,@function
_Z16twiddleImgKernelPfS_i:
s_clause 0x1
s_load_b32 s2, s[0:1], 0x24
s_load_b32 s4, s[0:1], 0x10
s_waitcnt lgkmcnt(0)
s_and_b32 s2, s2, 0xffff
s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
v_mad_u64_u32 v[1:2], null, s15, s2, v[0:1]
s_mov_b32 s2, exec_lo
v_cmpx_gt_i32_e64 s4, v1
s_cbranch_execz .LBB3_9
s_load_b64 s[2:3], s[0:1], 0x0
s_mov_b32 s5, exec_lo
v_cmpx_ne_u32_e32 0, v1
s_xor_b32 s5, exec_lo, s5
s_cbranch_execz .LBB3_5
v_mul_lo_u32 v2, v1, s4
v_mov_b32_e32 v0, 0
s_cmp_lt_i32 s4, 2
s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
v_ashrrev_i32_e32 v3, 31, v2
v_lshlrev_b64 v[3:4], 2, v[2:3]
s_waitcnt lgkmcnt(0)
s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_2)
v_add_co_u32 v3, vcc_lo, s2, v3
v_add_co_ci_u32_e32 v4, vcc_lo, s3, v4, vcc_lo
global_store_b32 v[3:4], v0, off
s_cbranch_scc1 .LBB3_5
s_ashr_i32 s6, s4, 31
s_load_b64 s[0:1], s[0:1], 0x8
s_add_i32 s7, s4, s6
s_delay_alu instid0(SALU_CYCLE_1) | instskip(NEXT) | instid1(SALU_CYCLE_1)
s_xor_b32 s6, s7, s6
v_cvt_f32_u32_e32 v0, s6
s_sub_i32 s7, 0, s6
s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_2) | instid1(VALU_DEP_1)
v_rcp_iflag_f32_e32 v0, v0
s_waitcnt_depctr 0xfff
v_mul_f32_e32 v0, 0x4f7ffffe, v0
v_cvt_u32_f32_e32 v0, v0
s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
v_mul_lo_u32 v3, s7, v0
s_mov_b32 s7, 1
v_mul_hi_u32 v3, v0, v3
s_delay_alu instid0(VALU_DEP_1)
v_dual_mov_b32 v3, v1 :: v_dual_add_nc_u32 v0, v0, v3
s_set_inst_prefetch_distance 0x1
.p2align 6
.LBB3_4:
s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
v_ashrrev_i32_e32 v4, 31, v3
v_add_nc_u32_e32 v5, v3, v4
v_add_nc_u32_e32 v3, v3, v1
s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
v_xor_b32_e32 v5, v5, v4
v_mul_hi_u32 v6, v5, v0
s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
v_mul_lo_u32 v6, v6, s6
v_sub_nc_u32_e32 v5, v5, v6
s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_2)
v_subrev_nc_u32_e32 v6, s6, v5
v_cmp_le_u32_e32 vcc_lo, s6, v5
v_cndmask_b32_e32 v5, v5, v6, vcc_lo
s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_2)
v_subrev_nc_u32_e32 v6, s6, v5
v_cmp_le_u32_e32 vcc_lo, s6, v5
v_cndmask_b32_e32 v5, v5, v6, vcc_lo
s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
v_xor_b32_e32 v5, v5, v4
v_sub_nc_u32_e32 v4, v5, v4
s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
v_lshl_or_b32 v4, v4, 1, 1
v_ashrrev_i32_e32 v5, 31, v4
s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
v_lshlrev_b64 v[4:5], 2, v[4:5]
s_waitcnt lgkmcnt(0)
v_add_co_u32 v4, vcc_lo, s0, v4
s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_3) | instid1(SALU_CYCLE_1)
v_add_co_ci_u32_e32 v5, vcc_lo, s1, v5, vcc_lo
global_load_b32 v6, v[4:5], off
v_add_nc_u32_e32 v4, s7, v2
s_add_i32 s7, s7, 1
s_cmp_lg_u32 s4, s7
s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
v_ashrrev_i32_e32 v5, 31, v4
v_lshlrev_b64 v[4:5], 2, v[4:5]
s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_2)
v_add_co_u32 v4, vcc_lo, s2, v4
v_add_co_ci_u32_e32 v5, vcc_lo, s3, v5, vcc_lo
s_waitcnt vmcnt(0)
global_store_b32 v[4:5], v6, off
s_cbranch_scc1 .LBB3_4
.LBB3_5:
s_set_inst_prefetch_distance 0x2
s_and_not1_saveexec_b32 s0, s5
s_cbranch_execz .LBB3_9
s_cmp_lt_i32 s4, 1
s_cbranch_scc1 .LBB3_9
v_mov_b32_e32 v0, 0
.LBB3_8:
s_add_i32 s4, s4, -1
s_waitcnt lgkmcnt(0)
global_store_b32 v0, v0, s[2:3]
s_add_u32 s2, s2, 4
s_addc_u32 s3, s3, 0
s_cmp_eq_u32 s4, 0
s_cbranch_scc0 .LBB3_8
.LBB3_9:
s_nop 0
s_sendmsg sendmsg(MSG_DEALLOC_VGPRS)
s_endpgm
.section .rodata,"a",@progbits
.p2align 6, 0x0
.amdhsa_kernel _Z16twiddleImgKernelPfS_i
.amdhsa_group_segment_fixed_size 0
.amdhsa_private_segment_fixed_size 0
.amdhsa_kernarg_size 280
.amdhsa_user_sgpr_count 15
.amdhsa_user_sgpr_dispatch_ptr 0
.amdhsa_user_sgpr_queue_ptr 0
.amdhsa_user_sgpr_kernarg_segment_ptr 1
.amdhsa_user_sgpr_dispatch_id 0
.amdhsa_user_sgpr_private_segment_size 0
.amdhsa_wavefront_size32 1
.amdhsa_uses_dynamic_stack 0
.amdhsa_enable_private_segment 0
.amdhsa_system_sgpr_workgroup_id_x 1
.amdhsa_system_sgpr_workgroup_id_y 0
.amdhsa_system_sgpr_workgroup_id_z 0
.amdhsa_system_sgpr_workgroup_info 0
.amdhsa_system_vgpr_workitem_id 0
.amdhsa_next_free_vgpr 7
.amdhsa_next_free_sgpr 16
.amdhsa_float_round_mode_32 0
.amdhsa_float_round_mode_16_64 0
.amdhsa_float_denorm_mode_32 3
.amdhsa_float_denorm_mode_16_64 3
.amdhsa_dx10_clamp 1
.amdhsa_ieee_mode 1
.amdhsa_fp16_overflow 0
.amdhsa_workgroup_processor_mode 1
.amdhsa_memory_ordered 1
.amdhsa_forward_progress 0
.amdhsa_shared_vgpr_count 0
.amdhsa_exception_fp_ieee_invalid_op 0
.amdhsa_exception_fp_denorm_src 0
.amdhsa_exception_fp_ieee_div_zero 0
.amdhsa_exception_fp_ieee_overflow 0
.amdhsa_exception_fp_ieee_underflow 0
.amdhsa_exception_fp_ieee_inexact 0
.amdhsa_exception_int_div_zero 0
.end_amdhsa_kernel
.text
.Lfunc_end3:
.size _Z16twiddleImgKernelPfS_i, .Lfunc_end3-_Z16twiddleImgKernelPfS_i
.section .AMDGPU.csdata,"",@progbits
.text
.p2alignl 7, 3214868480
.fill 96, 4, 3214868480
.type __hip_cuid_,@object
.section .bss,"aw",@nobits
.globl __hip_cuid_
__hip_cuid_:
.byte 0
.size __hip_cuid_, 1
.ident "AMD clang version 18.0.0git (https://github.com/RadeonOpenCompute/llvm-project roc-6.3.2 25012 e5bf7e55c91490b07c49d8960fa7983d864936c4)"
.section ".note.GNU-stack","",@progbits
.addrsig
.addrsig_sym __hip_cuid_
.amdgpu_metadata
---
amdhsa.kernels:
- .args:
- .address_space: global
.offset: 0
.size: 8
.value_kind: global_buffer
- .offset: 8
.size: 4
.value_kind: by_value
- .offset: 16
.size: 4
.value_kind: hidden_block_count_x
- .offset: 20
.size: 4
.value_kind: hidden_block_count_y
- .offset: 24
.size: 4
.value_kind: hidden_block_count_z
- .offset: 28
.size: 2
.value_kind: hidden_group_size_x
- .offset: 30
.size: 2
.value_kind: hidden_group_size_y
- .offset: 32
.size: 2
.value_kind: hidden_group_size_z
- .offset: 34
.size: 2
.value_kind: hidden_remainder_x
- .offset: 36
.size: 2
.value_kind: hidden_remainder_y
- .offset: 38
.size: 2
.value_kind: hidden_remainder_z
- .offset: 56
.size: 8
.value_kind: hidden_global_offset_x
- .offset: 64
.size: 8
.value_kind: hidden_global_offset_y
- .offset: 72
.size: 8
.value_kind: hidden_global_offset_z
- .offset: 80
.size: 2
.value_kind: hidden_grid_dims
.group_segment_fixed_size: 0
.kernarg_segment_align: 8
.kernarg_segment_size: 272
.language: OpenCL C
.language_version:
- 2
- 0
.max_flat_workgroup_size: 1024
.name: _Z11inputKernelPfi
.private_segment_fixed_size: 0
.sgpr_count: 18
.sgpr_spill_count: 0
.symbol: _Z11inputKernelPfi.kd
.uniform_work_group_size: 1
.uses_dynamic_stack: false
.vgpr_count: 4
.vgpr_spill_count: 0
.wavefront_size: 32
.workgroup_processor_mode: 1
- .args:
- .address_space: global
.offset: 0
.size: 8
.value_kind: global_buffer
- .offset: 8
.size: 4
.value_kind: by_value
- .offset: 16
.size: 4
.value_kind: hidden_block_count_x
- .offset: 20
.size: 4
.value_kind: hidden_block_count_y
- .offset: 24
.size: 4
.value_kind: hidden_block_count_z
- .offset: 28
.size: 2
.value_kind: hidden_group_size_x
- .offset: 30
.size: 2
.value_kind: hidden_group_size_y
- .offset: 32
.size: 2
.value_kind: hidden_group_size_z
- .offset: 34
.size: 2
.value_kind: hidden_remainder_x
- .offset: 36
.size: 2
.value_kind: hidden_remainder_y
- .offset: 38
.size: 2
.value_kind: hidden_remainder_z
- .offset: 56
.size: 8
.value_kind: hidden_global_offset_x
- .offset: 64
.size: 8
.value_kind: hidden_global_offset_y
- .offset: 72
.size: 8
.value_kind: hidden_global_offset_z
- .offset: 80
.size: 2
.value_kind: hidden_grid_dims
.group_segment_fixed_size: 0
.kernarg_segment_align: 8
.kernarg_segment_size: 272
.language: OpenCL C
.language_version:
- 2
- 0
.max_flat_workgroup_size: 1024
.name: _Z12factorKernelPfi
.private_segment_fixed_size: 0
.sgpr_count: 18
.sgpr_spill_count: 0
.symbol: _Z12factorKernelPfi.kd
.uniform_work_group_size: 1
.uses_dynamic_stack: false
.vgpr_count: 16
.vgpr_spill_count: 0
.wavefront_size: 32
.workgroup_processor_mode: 1
- .args:
- .address_space: global
.offset: 0
.size: 8
.value_kind: global_buffer
- .address_space: global
.offset: 8
.size: 8
.value_kind: global_buffer
- .offset: 16
.size: 4
.value_kind: by_value
- .offset: 24
.size: 4
.value_kind: hidden_block_count_x
- .offset: 28
.size: 4
.value_kind: hidden_block_count_y
- .offset: 32
.size: 4
.value_kind: hidden_block_count_z
- .offset: 36
.size: 2
.value_kind: hidden_group_size_x
- .offset: 38
.size: 2
.value_kind: hidden_group_size_y
- .offset: 40
.size: 2
.value_kind: hidden_group_size_z
- .offset: 42
.size: 2
.value_kind: hidden_remainder_x
- .offset: 44
.size: 2
.value_kind: hidden_remainder_y
- .offset: 46
.size: 2
.value_kind: hidden_remainder_z
- .offset: 64
.size: 8
.value_kind: hidden_global_offset_x
- .offset: 72
.size: 8
.value_kind: hidden_global_offset_y
- .offset: 80
.size: 8
.value_kind: hidden_global_offset_z
- .offset: 88
.size: 2
.value_kind: hidden_grid_dims
.group_segment_fixed_size: 0
.kernarg_segment_align: 8
.kernarg_segment_size: 280
.language: OpenCL C
.language_version:
- 2
- 0
.max_flat_workgroup_size: 1024
.name: _Z17twiddleRealKernelPfS_i
.private_segment_fixed_size: 0
.sgpr_count: 18
.sgpr_spill_count: 0
.symbol: _Z17twiddleRealKernelPfS_i.kd
.uniform_work_group_size: 1
.uses_dynamic_stack: false
.vgpr_count: 7
.vgpr_spill_count: 0
.wavefront_size: 32
.workgroup_processor_mode: 1
- .args:
- .address_space: global
.offset: 0
.size: 8
.value_kind: global_buffer
- .address_space: global
.offset: 8
.size: 8
.value_kind: global_buffer
- .offset: 16
.size: 4
.value_kind: by_value
- .offset: 24
.size: 4
.value_kind: hidden_block_count_x
- .offset: 28
.size: 4
.value_kind: hidden_block_count_y
- .offset: 32
.size: 4
.value_kind: hidden_block_count_z
- .offset: 36
.size: 2
.value_kind: hidden_group_size_x
- .offset: 38
.size: 2
.value_kind: hidden_group_size_y
- .offset: 40
.size: 2
.value_kind: hidden_group_size_z
- .offset: 42
.size: 2
.value_kind: hidden_remainder_x
- .offset: 44
.size: 2
.value_kind: hidden_remainder_y
- .offset: 46
.size: 2
.value_kind: hidden_remainder_z
- .offset: 64
.size: 8
.value_kind: hidden_global_offset_x
- .offset: 72
.size: 8
.value_kind: hidden_global_offset_y
- .offset: 80
.size: 8
.value_kind: hidden_global_offset_z
- .offset: 88
.size: 2
.value_kind: hidden_grid_dims
.group_segment_fixed_size: 0
.kernarg_segment_align: 8
.kernarg_segment_size: 280
.language: OpenCL C
.language_version:
- 2
- 0
.max_flat_workgroup_size: 1024
.name: _Z16twiddleImgKernelPfS_i
.private_segment_fixed_size: 0
.sgpr_count: 18
.sgpr_spill_count: 0
.symbol: _Z16twiddleImgKernelPfS_i.kd
.uniform_work_group_size: 1
.uses_dynamic_stack: false
.vgpr_count: 7
.vgpr_spill_count: 0
.wavefront_size: 32
.workgroup_processor_mode: 1
amdhsa.target: amdgcn-amd-amdhsa--gfx1100
amdhsa.version:
- 1
- 2
...
.end_amdgpu_metadata |
You are a helpful coding assistant specialized in converting HIP source code to AMD host assembly. | #include<stdio.h>
#include<hip/hip_runtime.h>
/* Producing twiddle factors */
#define NUM_OF_X_THREADS 10
#define NUM_OF_Y_THREADS 10
__global__ void inputKernel(float *x, int N)
{
int ix = blockIdx.x * blockDim.x + threadIdx.x;
int iy = blockIdx.y * blockDim.y + threadIdx.y;
int idx = iy * NUM_OF_X_THREADS + ix;
if (idx < N)
x[idx] = x[idx] + (float)idx;
}
__global__ void factorKernel(float *w, int N)
{
int ix = blockIdx.x * blockDim.x + threadIdx.x;
int idx = ix * 2;
int izx = N + idx;
const float pi = 3.1415;
float aw = (2.0 * pi) / (float)N;
float arg = aw * (float)ix;
/* Twiddle factors are symmetric along N/2. with change in sign, due to 180 degree phase change */
if (idx < N) {
w[idx] = cos(arg);
w[idx + 1] = sin(arg);
w[izx] = (-1) * w[idx];
w[izx+1] = (-1) * w[idx + 1];
}
}
__global__ void twiddleRealKernel(float *wr, float *w, int N)
{
int idx = blockIdx.x * blockDim.x + threadIdx.x;
int i = 0, index;
if (idx < N) {
if (idx == 0) {
for (i = 0; i < N; i++)
wr[idx * N + i] = 1;
} else {
wr[idx * N + 0] = 1;
for (i = 1; i < N; i++) {
index = (idx * i) % N;
wr[idx * N + i] = w[index * 2];
}
}
}
}
__global__ void twiddleImgKernel(float *wi, float *w, int N)
{
int idx = blockIdx.x * blockDim.x + threadIdx.x;
int i, index;
if (idx < N) {
if (idx == 0) {
for (i = 0; i < N; i++)
wi[idx * N + i] = 0;
} else {
wi[idx * N + 0] = 0;
for (i = 1; i < N; i++) {
index = (idx * i) % N;
wi[idx * N + i] = w[index * 2 + 1];
}
}
}
}
int main(int agrc, char** argv)
{
float *x, *w, *w_r, *w_i;
float *d_x, *d_w, *dw_r, *dw_i;
int N = 10000, n = N/2;
x = (float *)malloc(N * sizeof(float));
w = (float *)malloc(2 * N * sizeof(float));
w_r = (float *)malloc(N * N * sizeof(float));
w_i = (float *)malloc(N * N * sizeof(float));
dim3 numberOfThreads(NUM_OF_X_THREADS, NUM_OF_Y_THREADS);
dim3 numberOfBlocks( (100 + NUM_OF_X_THREADS -1)/NUM_OF_X_THREADS,
(100 + NUM_OF_Y_THREADS - 1)/NUM_OF_Y_THREADS );
hipMalloc((void **)&d_x, N * sizeof(float));
hipMalloc((void **)&d_w, 2 * N * sizeof(float));
hipMalloc((void **)&dw_r, N * N * sizeof(float));
hipMalloc((void **)&dw_i, N * N * sizeof(float));
hipMemset(d_x, 0, N * sizeof(float));
hipMemset(d_w, 0, 2 * N * sizeof(float));
hipMemset(dw_r, 0, N * N * sizeof(float));
hipMemset(dw_i, 0, N * N * sizeof(float));
inputKernel<<<numberOfBlocks, numberOfThreads>>>(d_x, N);
hipMemcpy(x, d_x, N * sizeof(float), hipMemcpyDeviceToHost);
printf("%f\n",x[100]);
// Calculating factor
factorKernel<<<n/512, 512>>>(d_w, (float)N);
hipMemcpy(w, d_w, 2 * N * sizeof(float), hipMemcpyDeviceToHost);
printf("%f %f\n", w[5], w[10005]);
// Calculating twiddle real matrix
twiddleRealKernel<<<n/512, 512>>>(dw_r, d_w, N);
hipMemcpy(w_r, dw_r, N * N * sizeof(float), hipMemcpyDeviceToHost);
// Calculating twiddle imaginary matrix
twiddleImgKernel<<<n/512, 512>>>(dw_i, d_w, N);
hipMemcpy(w_i, dw_i, N * N * sizeof(float), hipMemcpyDeviceToHost);
/* int i,j;
for(i = 0; i < 50; i++)
{
for(j = 0; j < 50; j++) {
printf("%f \t", w_r[i*N + j]);
}
printf("\n");
}
printf("*********************************************************************************\n");
for(i = 0; i < 50; i++) {
for(j = 0; j < 50; j++) {
printf("%f \t", w_i[i*N + j]);
}
printf("\n");
}
*/
return 0;
} | .text
.file "twiddle.hip"
.globl _Z26__device_stub__inputKernelPfi # -- Begin function _Z26__device_stub__inputKernelPfi
.p2align 4, 0x90
.type _Z26__device_stub__inputKernelPfi,@function
_Z26__device_stub__inputKernelPfi: # @_Z26__device_stub__inputKernelPfi
.cfi_startproc
# %bb.0:
subq $88, %rsp
.cfi_def_cfa_offset 96
movq %rdi, 56(%rsp)
movl %esi, 4(%rsp)
leaq 56(%rsp), %rax
movq %rax, 64(%rsp)
leaq 4(%rsp), %rax
movq %rax, 72(%rsp)
leaq 40(%rsp), %rdi
leaq 24(%rsp), %rsi
leaq 16(%rsp), %rdx
leaq 8(%rsp), %rcx
callq __hipPopCallConfiguration
movq 40(%rsp), %rsi
movl 48(%rsp), %edx
movq 24(%rsp), %rcx
movl 32(%rsp), %r8d
leaq 64(%rsp), %r9
movl $_Z11inputKernelPfi, %edi
pushq 8(%rsp)
.cfi_adjust_cfa_offset 8
pushq 24(%rsp)
.cfi_adjust_cfa_offset 8
callq hipLaunchKernel
addq $104, %rsp
.cfi_adjust_cfa_offset -104
retq
.Lfunc_end0:
.size _Z26__device_stub__inputKernelPfi, .Lfunc_end0-_Z26__device_stub__inputKernelPfi
.cfi_endproc
# -- End function
.globl _Z27__device_stub__factorKernelPfi # -- Begin function _Z27__device_stub__factorKernelPfi
.p2align 4, 0x90
.type _Z27__device_stub__factorKernelPfi,@function
_Z27__device_stub__factorKernelPfi: # @_Z27__device_stub__factorKernelPfi
.cfi_startproc
# %bb.0:
subq $88, %rsp
.cfi_def_cfa_offset 96
movq %rdi, 56(%rsp)
movl %esi, 4(%rsp)
leaq 56(%rsp), %rax
movq %rax, 64(%rsp)
leaq 4(%rsp), %rax
movq %rax, 72(%rsp)
leaq 40(%rsp), %rdi
leaq 24(%rsp), %rsi
leaq 16(%rsp), %rdx
leaq 8(%rsp), %rcx
callq __hipPopCallConfiguration
movq 40(%rsp), %rsi
movl 48(%rsp), %edx
movq 24(%rsp), %rcx
movl 32(%rsp), %r8d
leaq 64(%rsp), %r9
movl $_Z12factorKernelPfi, %edi
pushq 8(%rsp)
.cfi_adjust_cfa_offset 8
pushq 24(%rsp)
.cfi_adjust_cfa_offset 8
callq hipLaunchKernel
addq $104, %rsp
.cfi_adjust_cfa_offset -104
retq
.Lfunc_end1:
.size _Z27__device_stub__factorKernelPfi, .Lfunc_end1-_Z27__device_stub__factorKernelPfi
.cfi_endproc
# -- End function
.globl _Z32__device_stub__twiddleRealKernelPfS_i # -- Begin function _Z32__device_stub__twiddleRealKernelPfS_i
.p2align 4, 0x90
.type _Z32__device_stub__twiddleRealKernelPfS_i,@function
_Z32__device_stub__twiddleRealKernelPfS_i: # @_Z32__device_stub__twiddleRealKernelPfS_i
.cfi_startproc
# %bb.0:
subq $104, %rsp
.cfi_def_cfa_offset 112
movq %rdi, 72(%rsp)
movq %rsi, 64(%rsp)
movl %edx, 12(%rsp)
leaq 72(%rsp), %rax
movq %rax, 80(%rsp)
leaq 64(%rsp), %rax
movq %rax, 88(%rsp)
leaq 12(%rsp), %rax
movq %rax, 96(%rsp)
leaq 48(%rsp), %rdi
leaq 32(%rsp), %rsi
leaq 24(%rsp), %rdx
leaq 16(%rsp), %rcx
callq __hipPopCallConfiguration
movq 48(%rsp), %rsi
movl 56(%rsp), %edx
movq 32(%rsp), %rcx
movl 40(%rsp), %r8d
leaq 80(%rsp), %r9
movl $_Z17twiddleRealKernelPfS_i, %edi
pushq 16(%rsp)
.cfi_adjust_cfa_offset 8
pushq 32(%rsp)
.cfi_adjust_cfa_offset 8
callq hipLaunchKernel
addq $120, %rsp
.cfi_adjust_cfa_offset -120
retq
.Lfunc_end2:
.size _Z32__device_stub__twiddleRealKernelPfS_i, .Lfunc_end2-_Z32__device_stub__twiddleRealKernelPfS_i
.cfi_endproc
# -- End function
.globl _Z31__device_stub__twiddleImgKernelPfS_i # -- Begin function _Z31__device_stub__twiddleImgKernelPfS_i
.p2align 4, 0x90
.type _Z31__device_stub__twiddleImgKernelPfS_i,@function
_Z31__device_stub__twiddleImgKernelPfS_i: # @_Z31__device_stub__twiddleImgKernelPfS_i
.cfi_startproc
# %bb.0:
subq $104, %rsp
.cfi_def_cfa_offset 112
movq %rdi, 72(%rsp)
movq %rsi, 64(%rsp)
movl %edx, 12(%rsp)
leaq 72(%rsp), %rax
movq %rax, 80(%rsp)
leaq 64(%rsp), %rax
movq %rax, 88(%rsp)
leaq 12(%rsp), %rax
movq %rax, 96(%rsp)
leaq 48(%rsp), %rdi
leaq 32(%rsp), %rsi
leaq 24(%rsp), %rdx
leaq 16(%rsp), %rcx
callq __hipPopCallConfiguration
movq 48(%rsp), %rsi
movl 56(%rsp), %edx
movq 32(%rsp), %rcx
movl 40(%rsp), %r8d
leaq 80(%rsp), %r9
movl $_Z16twiddleImgKernelPfS_i, %edi
pushq 16(%rsp)
.cfi_adjust_cfa_offset 8
pushq 32(%rsp)
.cfi_adjust_cfa_offset 8
callq hipLaunchKernel
addq $120, %rsp
.cfi_adjust_cfa_offset -120
retq
.Lfunc_end3:
.size _Z31__device_stub__twiddleImgKernelPfS_i, .Lfunc_end3-_Z31__device_stub__twiddleImgKernelPfS_i
.cfi_endproc
# -- End function
.globl main # -- Begin function main
.p2align 4, 0x90
.type main,@function
main: # @main
.cfi_startproc
# %bb.0:
pushq %r15
.cfi_def_cfa_offset 16
pushq %r14
.cfi_def_cfa_offset 24
pushq %r13
.cfi_def_cfa_offset 32
pushq %r12
.cfi_def_cfa_offset 40
pushq %rbx
.cfi_def_cfa_offset 48
subq $128, %rsp
.cfi_def_cfa_offset 176
.cfi_offset %rbx, -48
.cfi_offset %r12, -40
.cfi_offset %r13, -32
.cfi_offset %r14, -24
.cfi_offset %r15, -16
movl $40000, %edi # imm = 0x9C40
callq malloc
movq %rax, %r13
movl $80000, %edi # imm = 0x13880
callq malloc
movq %rax, %r15
movl $400000000, %edi # imm = 0x17D78400
callq malloc
movq %rax, %r14
movl $400000000, %edi # imm = 0x17D78400
callq malloc
movq %rax, %rbx
leaq 120(%rsp), %rdi
movl $40000, %esi # imm = 0x9C40
callq hipMalloc
leaq 72(%rsp), %rdi
movl $80000, %esi # imm = 0x13880
callq hipMalloc
leaq 112(%rsp), %rdi
movl $400000000, %esi # imm = 0x17D78400
callq hipMalloc
leaq 104(%rsp), %rdi
movl $400000000, %esi # imm = 0x17D78400
callq hipMalloc
movq 120(%rsp), %rdi
movl $40000, %edx # imm = 0x9C40
xorl %esi, %esi
callq hipMemset
movq 72(%rsp), %rdi
movl $80000, %edx # imm = 0x13880
xorl %esi, %esi
callq hipMemset
movq 112(%rsp), %rdi
movl $400000000, %edx # imm = 0x17D78400
xorl %esi, %esi
callq hipMemset
movq 104(%rsp), %rdi
movl $400000000, %edx # imm = 0x17D78400
xorl %esi, %esi
callq hipMemset
movabsq $42949672970, %rdi # imm = 0xA0000000A
movl $1, %esi
movq %rdi, %rdx
movl $1, %ecx
xorl %r8d, %r8d
xorl %r9d, %r9d
callq __hipPushCallConfiguration
testl %eax, %eax
jne .LBB4_2
# %bb.1:
movq 120(%rsp), %rax
movq %rax, 56(%rsp)
movl $10000, (%rsp) # imm = 0x2710
leaq 56(%rsp), %rax
movq %rax, 80(%rsp)
movq %rsp, %rax
movq %rax, 88(%rsp)
leaq 32(%rsp), %rdi
leaq 16(%rsp), %rsi
leaq 48(%rsp), %rdx
leaq 8(%rsp), %rcx
callq __hipPopCallConfiguration
movq 32(%rsp), %rsi
movl 40(%rsp), %edx
movq 16(%rsp), %rcx
movl 24(%rsp), %r8d
leaq 80(%rsp), %r9
movl $_Z11inputKernelPfi, %edi
pushq 8(%rsp)
.cfi_adjust_cfa_offset 8
pushq 56(%rsp)
.cfi_adjust_cfa_offset 8
callq hipLaunchKernel
addq $16, %rsp
.cfi_adjust_cfa_offset -16
.LBB4_2:
movabsq $4294967305, %r12 # imm = 0x100000009
movq 120(%rsp), %rsi
movl $40000, %edx # imm = 0x9C40
movq %r13, %rdi
movl $2, %ecx
callq hipMemcpy
movss 400(%r13), %xmm0 # xmm0 = mem[0],zero,zero,zero
cvtss2sd %xmm0, %xmm0
movl $.L.str, %edi
movb $1, %al
callq printf
leaq 503(%r12), %r13
movq %r12, %rdi
movl $1, %esi
movq %r13, %rdx
movl $1, %ecx
xorl %r8d, %r8d
xorl %r9d, %r9d
callq __hipPushCallConfiguration
testl %eax, %eax
jne .LBB4_4
# %bb.3:
movq 72(%rsp), %rax
movq %rax, 56(%rsp)
movl $10000, (%rsp) # imm = 0x2710
leaq 56(%rsp), %rax
movq %rax, 80(%rsp)
movq %rsp, %rax
movq %rax, 88(%rsp)
leaq 32(%rsp), %rdi
leaq 16(%rsp), %rsi
leaq 48(%rsp), %rdx
leaq 8(%rsp), %rcx
callq __hipPopCallConfiguration
movq 32(%rsp), %rsi
movl 40(%rsp), %edx
movq 16(%rsp), %rcx
movl 24(%rsp), %r8d
leaq 80(%rsp), %r9
movl $_Z12factorKernelPfi, %edi
pushq 8(%rsp)
.cfi_adjust_cfa_offset 8
pushq 56(%rsp)
.cfi_adjust_cfa_offset 8
callq hipLaunchKernel
addq $16, %rsp
.cfi_adjust_cfa_offset -16
.LBB4_4:
movq 72(%rsp), %rsi
movl $80000, %edx # imm = 0x13880
movq %r15, %rdi
movl $2, %ecx
callq hipMemcpy
movss 20(%r15), %xmm0 # xmm0 = mem[0],zero,zero,zero
cvtss2sd %xmm0, %xmm0
movss 40020(%r15), %xmm1 # xmm1 = mem[0],zero,zero,zero
cvtss2sd %xmm1, %xmm1
movl $.L.str.1, %edi
movb $2, %al
callq printf
movq %r12, %rdi
movl $1, %esi
movq %r13, %rdx
movl $1, %ecx
xorl %r8d, %r8d
xorl %r9d, %r9d
callq __hipPushCallConfiguration
testl %eax, %eax
jne .LBB4_6
# %bb.5:
movq 112(%rsp), %rax
movq 72(%rsp), %rcx
movq %rax, 56(%rsp)
movq %rcx, 48(%rsp)
movl $10000, 68(%rsp) # imm = 0x2710
leaq 56(%rsp), %rax
movq %rax, 80(%rsp)
leaq 48(%rsp), %rax
movq %rax, 88(%rsp)
leaq 68(%rsp), %rax
movq %rax, 96(%rsp)
leaq 32(%rsp), %rdi
leaq 16(%rsp), %rsi
leaq 8(%rsp), %rdx
movq %rsp, %rcx
callq __hipPopCallConfiguration
movq 32(%rsp), %rsi
movl 40(%rsp), %edx
movq 16(%rsp), %rcx
movl 24(%rsp), %r8d
leaq 80(%rsp), %r9
movl $_Z17twiddleRealKernelPfS_i, %edi
pushq (%rsp)
.cfi_adjust_cfa_offset 8
pushq 16(%rsp)
.cfi_adjust_cfa_offset 8
callq hipLaunchKernel
addq $16, %rsp
.cfi_adjust_cfa_offset -16
.LBB4_6:
movq 112(%rsp), %rsi
movl $400000000, %edx # imm = 0x17D78400
movq %r14, %rdi
movl $2, %ecx
callq hipMemcpy
movq %r12, %rdi
movl $1, %esi
movq %r13, %rdx
movl $1, %ecx
xorl %r8d, %r8d
xorl %r9d, %r9d
callq __hipPushCallConfiguration
testl %eax, %eax
jne .LBB4_8
# %bb.7:
movq 104(%rsp), %rax
movq 72(%rsp), %rcx
movq %rax, 56(%rsp)
movq %rcx, 48(%rsp)
movl $10000, 68(%rsp) # imm = 0x2710
leaq 56(%rsp), %rax
movq %rax, 80(%rsp)
leaq 48(%rsp), %rax
movq %rax, 88(%rsp)
leaq 68(%rsp), %rax
movq %rax, 96(%rsp)
leaq 32(%rsp), %rdi
leaq 16(%rsp), %rsi
leaq 8(%rsp), %rdx
movq %rsp, %rcx
callq __hipPopCallConfiguration
movq 32(%rsp), %rsi
movl 40(%rsp), %edx
movq 16(%rsp), %rcx
movl 24(%rsp), %r8d
leaq 80(%rsp), %r9
movl $_Z16twiddleImgKernelPfS_i, %edi
pushq (%rsp)
.cfi_adjust_cfa_offset 8
pushq 16(%rsp)
.cfi_adjust_cfa_offset 8
callq hipLaunchKernel
addq $16, %rsp
.cfi_adjust_cfa_offset -16
.LBB4_8:
movq 104(%rsp), %rsi
movl $400000000, %edx # imm = 0x17D78400
movq %rbx, %rdi
movl $2, %ecx
callq hipMemcpy
xorl %eax, %eax
addq $128, %rsp
.cfi_def_cfa_offset 48
popq %rbx
.cfi_def_cfa_offset 40
popq %r12
.cfi_def_cfa_offset 32
popq %r13
.cfi_def_cfa_offset 24
popq %r14
.cfi_def_cfa_offset 16
popq %r15
.cfi_def_cfa_offset 8
retq
.Lfunc_end4:
.size main, .Lfunc_end4-main
.cfi_endproc
# -- End function
.p2align 4, 0x90 # -- Begin function __hip_module_ctor
.type __hip_module_ctor,@function
__hip_module_ctor: # @__hip_module_ctor
.cfi_startproc
# %bb.0:
pushq %rbx
.cfi_def_cfa_offset 16
subq $32, %rsp
.cfi_def_cfa_offset 48
.cfi_offset %rbx, -16
cmpq $0, __hip_gpubin_handle(%rip)
jne .LBB5_2
# %bb.1:
movl $__hip_fatbin_wrapper, %edi
callq __hipRegisterFatBinary
movq %rax, __hip_gpubin_handle(%rip)
.LBB5_2:
movq __hip_gpubin_handle(%rip), %rbx
xorps %xmm0, %xmm0
movups %xmm0, 16(%rsp)
movups %xmm0, (%rsp)
movl $_Z11inputKernelPfi, %esi
movl $.L__unnamed_1, %edx
movl $.L__unnamed_1, %ecx
movq %rbx, %rdi
movl $-1, %r8d
xorl %r9d, %r9d
callq __hipRegisterFunction
xorps %xmm0, %xmm0
movups %xmm0, 16(%rsp)
movups %xmm0, (%rsp)
movl $_Z12factorKernelPfi, %esi
movl $.L__unnamed_2, %edx
movl $.L__unnamed_2, %ecx
movq %rbx, %rdi
movl $-1, %r8d
xorl %r9d, %r9d
callq __hipRegisterFunction
xorps %xmm0, %xmm0
movups %xmm0, 16(%rsp)
movups %xmm0, (%rsp)
movl $_Z17twiddleRealKernelPfS_i, %esi
movl $.L__unnamed_3, %edx
movl $.L__unnamed_3, %ecx
movq %rbx, %rdi
movl $-1, %r8d
xorl %r9d, %r9d
callq __hipRegisterFunction
xorps %xmm0, %xmm0
movups %xmm0, 16(%rsp)
movups %xmm0, (%rsp)
movl $_Z16twiddleImgKernelPfS_i, %esi
movl $.L__unnamed_4, %edx
movl $.L__unnamed_4, %ecx
movq %rbx, %rdi
movl $-1, %r8d
xorl %r9d, %r9d
callq __hipRegisterFunction
movl $__hip_module_dtor, %edi
addq $32, %rsp
.cfi_def_cfa_offset 16
popq %rbx
.cfi_def_cfa_offset 8
jmp atexit # TAILCALL
.Lfunc_end5:
.size __hip_module_ctor, .Lfunc_end5-__hip_module_ctor
.cfi_endproc
# -- End function
.p2align 4, 0x90 # -- Begin function __hip_module_dtor
.type __hip_module_dtor,@function
__hip_module_dtor: # @__hip_module_dtor
.cfi_startproc
# %bb.0:
movq __hip_gpubin_handle(%rip), %rdi
testq %rdi, %rdi
je .LBB6_2
# %bb.1:
pushq %rax
.cfi_def_cfa_offset 16
callq __hipUnregisterFatBinary
movq $0, __hip_gpubin_handle(%rip)
addq $8, %rsp
.cfi_def_cfa_offset 8
.LBB6_2:
retq
.Lfunc_end6:
.size __hip_module_dtor, .Lfunc_end6-__hip_module_dtor
.cfi_endproc
# -- End function
.type _Z11inputKernelPfi,@object # @_Z11inputKernelPfi
.section .rodata,"a",@progbits
.globl _Z11inputKernelPfi
.p2align 3, 0x0
_Z11inputKernelPfi:
.quad _Z26__device_stub__inputKernelPfi
.size _Z11inputKernelPfi, 8
.type _Z12factorKernelPfi,@object # @_Z12factorKernelPfi
.globl _Z12factorKernelPfi
.p2align 3, 0x0
_Z12factorKernelPfi:
.quad _Z27__device_stub__factorKernelPfi
.size _Z12factorKernelPfi, 8
.type _Z17twiddleRealKernelPfS_i,@object # @_Z17twiddleRealKernelPfS_i
.globl _Z17twiddleRealKernelPfS_i
.p2align 3, 0x0
_Z17twiddleRealKernelPfS_i:
.quad _Z32__device_stub__twiddleRealKernelPfS_i
.size _Z17twiddleRealKernelPfS_i, 8
.type _Z16twiddleImgKernelPfS_i,@object # @_Z16twiddleImgKernelPfS_i
.globl _Z16twiddleImgKernelPfS_i
.p2align 3, 0x0
_Z16twiddleImgKernelPfS_i:
.quad _Z31__device_stub__twiddleImgKernelPfS_i
.size _Z16twiddleImgKernelPfS_i, 8
.type .L.str,@object # @.str
.section .rodata.str1.1,"aMS",@progbits,1
.L.str:
.asciz "%f\n"
.size .L.str, 4
.type .L.str.1,@object # @.str.1
.L.str.1:
.asciz "%f %f\n"
.size .L.str.1, 7
.type .L__unnamed_1,@object # @0
.L__unnamed_1:
.asciz "_Z11inputKernelPfi"
.size .L__unnamed_1, 19
.type .L__unnamed_2,@object # @1
.L__unnamed_2:
.asciz "_Z12factorKernelPfi"
.size .L__unnamed_2, 20
.type .L__unnamed_3,@object # @2
.L__unnamed_3:
.asciz "_Z17twiddleRealKernelPfS_i"
.size .L__unnamed_3, 27
.type .L__unnamed_4,@object # @3
.L__unnamed_4:
.asciz "_Z16twiddleImgKernelPfS_i"
.size .L__unnamed_4, 26
.type __hip_fatbin_wrapper,@object # @__hip_fatbin_wrapper
.section .hipFatBinSegment,"a",@progbits
.p2align 3, 0x0
__hip_fatbin_wrapper:
.long 1212764230 # 0x48495046
.long 1 # 0x1
.quad __hip_fatbin
.quad 0
.size __hip_fatbin_wrapper, 24
.type __hip_gpubin_handle,@object # @__hip_gpubin_handle
.local __hip_gpubin_handle
.comm __hip_gpubin_handle,8,8
.section .init_array,"aw",@init_array
.p2align 3, 0x0
.quad __hip_module_ctor
.type __hip_cuid_,@object # @__hip_cuid_
.bss
.globl __hip_cuid_
__hip_cuid_:
.byte 0 # 0x0
.size __hip_cuid_, 1
.section ".linker-options","e",@llvm_linker_options
.ident "AMD clang version 18.0.0git (https://github.com/RadeonOpenCompute/llvm-project roc-6.3.2 25012 e5bf7e55c91490b07c49d8960fa7983d864936c4)"
.section ".note.GNU-stack","",@progbits
.addrsig
.addrsig_sym _Z26__device_stub__inputKernelPfi
.addrsig_sym _Z27__device_stub__factorKernelPfi
.addrsig_sym _Z32__device_stub__twiddleRealKernelPfS_i
.addrsig_sym _Z31__device_stub__twiddleImgKernelPfS_i
.addrsig_sym __hip_module_ctor
.addrsig_sym __hip_module_dtor
.addrsig_sym _Z11inputKernelPfi
.addrsig_sym _Z12factorKernelPfi
.addrsig_sym _Z17twiddleRealKernelPfS_i
.addrsig_sym _Z16twiddleImgKernelPfS_i
.addrsig_sym __hip_fatbin
.addrsig_sym __hip_fatbin_wrapper
.addrsig_sym __hip_cuid_ |
You are a helpful coding assistant specialized in converting from CUDA host assembly to AMD host assembly. | .file "tmpxft_0016dc56_00000000-6_twiddle.cudafe1.cpp"
.text
#APP
#NO_APP
.type _ZL26__cudaUnregisterBinaryUtilv, @function
_ZL26__cudaUnregisterBinaryUtilv:
.LFB2060:
.cfi_startproc
endbr64
subq $8, %rsp
.cfi_def_cfa_offset 16
movq _ZL20__cudaFatCubinHandle(%rip), %rdi
call __cudaUnregisterFatBinary@PLT
addq $8, %rsp
.cfi_def_cfa_offset 8
ret
.cfi_endproc
.LFE2060:
.size _ZL26__cudaUnregisterBinaryUtilv, .-_ZL26__cudaUnregisterBinaryUtilv
.globl _Z32__device_stub__Z11inputKernelPfiPfi
.type _Z32__device_stub__Z11inputKernelPfiPfi, @function
_Z32__device_stub__Z11inputKernelPfiPfi:
.LFB2082:
.cfi_startproc
endbr64
subq $120, %rsp
.cfi_def_cfa_offset 128
movq %rdi, 8(%rsp)
movl %esi, 4(%rsp)
movq %fs:40, %rax
movq %rax, 104(%rsp)
xorl %eax, %eax
leaq 8(%rsp), %rax
movq %rax, 80(%rsp)
leaq 4(%rsp), %rax
movq %rax, 88(%rsp)
movl $1, 32(%rsp)
movl $1, 36(%rsp)
movl $1, 40(%rsp)
movl $1, 44(%rsp)
movl $1, 48(%rsp)
movl $1, 52(%rsp)
leaq 24(%rsp), %rcx
leaq 16(%rsp), %rdx
leaq 44(%rsp), %rsi
leaq 32(%rsp), %rdi
call __cudaPopCallConfiguration@PLT
testl %eax, %eax
je .L7
.L3:
movq 104(%rsp), %rax
subq %fs:40, %rax
jne .L8
addq $120, %rsp
.cfi_remember_state
.cfi_def_cfa_offset 8
ret
.L7:
.cfi_restore_state
pushq 24(%rsp)
.cfi_def_cfa_offset 136
pushq 24(%rsp)
.cfi_def_cfa_offset 144
leaq 96(%rsp), %r9
movq 60(%rsp), %rcx
movl 68(%rsp), %r8d
movq 48(%rsp), %rsi
movl 56(%rsp), %edx
leaq _Z11inputKernelPfi(%rip), %rdi
call cudaLaunchKernel@PLT
addq $16, %rsp
.cfi_def_cfa_offset 128
jmp .L3
.L8:
call __stack_chk_fail@PLT
.cfi_endproc
.LFE2082:
.size _Z32__device_stub__Z11inputKernelPfiPfi, .-_Z32__device_stub__Z11inputKernelPfiPfi
.globl _Z11inputKernelPfi
.type _Z11inputKernelPfi, @function
_Z11inputKernelPfi:
.LFB2083:
.cfi_startproc
endbr64
subq $8, %rsp
.cfi_def_cfa_offset 16
call _Z32__device_stub__Z11inputKernelPfiPfi
addq $8, %rsp
.cfi_def_cfa_offset 8
ret
.cfi_endproc
.LFE2083:
.size _Z11inputKernelPfi, .-_Z11inputKernelPfi
.globl _Z33__device_stub__Z12factorKernelPfiPfi
.type _Z33__device_stub__Z12factorKernelPfiPfi, @function
_Z33__device_stub__Z12factorKernelPfiPfi:
.LFB2084:
.cfi_startproc
endbr64
subq $120, %rsp
.cfi_def_cfa_offset 128
movq %rdi, 8(%rsp)
movl %esi, 4(%rsp)
movq %fs:40, %rax
movq %rax, 104(%rsp)
xorl %eax, %eax
leaq 8(%rsp), %rax
movq %rax, 80(%rsp)
leaq 4(%rsp), %rax
movq %rax, 88(%rsp)
movl $1, 32(%rsp)
movl $1, 36(%rsp)
movl $1, 40(%rsp)
movl $1, 44(%rsp)
movl $1, 48(%rsp)
movl $1, 52(%rsp)
leaq 24(%rsp), %rcx
leaq 16(%rsp), %rdx
leaq 44(%rsp), %rsi
leaq 32(%rsp), %rdi
call __cudaPopCallConfiguration@PLT
testl %eax, %eax
je .L15
.L11:
movq 104(%rsp), %rax
subq %fs:40, %rax
jne .L16
addq $120, %rsp
.cfi_remember_state
.cfi_def_cfa_offset 8
ret
.L15:
.cfi_restore_state
pushq 24(%rsp)
.cfi_def_cfa_offset 136
pushq 24(%rsp)
.cfi_def_cfa_offset 144
leaq 96(%rsp), %r9
movq 60(%rsp), %rcx
movl 68(%rsp), %r8d
movq 48(%rsp), %rsi
movl 56(%rsp), %edx
leaq _Z12factorKernelPfi(%rip), %rdi
call cudaLaunchKernel@PLT
addq $16, %rsp
.cfi_def_cfa_offset 128
jmp .L11
.L16:
call __stack_chk_fail@PLT
.cfi_endproc
.LFE2084:
.size _Z33__device_stub__Z12factorKernelPfiPfi, .-_Z33__device_stub__Z12factorKernelPfiPfi
.globl _Z12factorKernelPfi
.type _Z12factorKernelPfi, @function
_Z12factorKernelPfi:
.LFB2085:
.cfi_startproc
endbr64
subq $8, %rsp
.cfi_def_cfa_offset 16
call _Z33__device_stub__Z12factorKernelPfiPfi
addq $8, %rsp
.cfi_def_cfa_offset 8
ret
.cfi_endproc
.LFE2085:
.size _Z12factorKernelPfi, .-_Z12factorKernelPfi
.globl _Z40__device_stub__Z17twiddleRealKernelPfS_iPfS_i
.type _Z40__device_stub__Z17twiddleRealKernelPfS_iPfS_i, @function
_Z40__device_stub__Z17twiddleRealKernelPfS_iPfS_i:
.LFB2086:
.cfi_startproc
endbr64
subq $136, %rsp
.cfi_def_cfa_offset 144
movq %rdi, 24(%rsp)
movq %rsi, 16(%rsp)
movl %edx, 12(%rsp)
movq %fs:40, %rax
movq %rax, 120(%rsp)
xorl %eax, %eax
leaq 24(%rsp), %rax
movq %rax, 96(%rsp)
leaq 16(%rsp), %rax
movq %rax, 104(%rsp)
leaq 12(%rsp), %rax
movq %rax, 112(%rsp)
movl $1, 48(%rsp)
movl $1, 52(%rsp)
movl $1, 56(%rsp)
movl $1, 60(%rsp)
movl $1, 64(%rsp)
movl $1, 68(%rsp)
leaq 40(%rsp), %rcx
leaq 32(%rsp), %rdx
leaq 60(%rsp), %rsi
leaq 48(%rsp), %rdi
call __cudaPopCallConfiguration@PLT
testl %eax, %eax
je .L23
.L19:
movq 120(%rsp), %rax
subq %fs:40, %rax
jne .L24
addq $136, %rsp
.cfi_remember_state
.cfi_def_cfa_offset 8
ret
.L23:
.cfi_restore_state
pushq 40(%rsp)
.cfi_def_cfa_offset 152
pushq 40(%rsp)
.cfi_def_cfa_offset 160
leaq 112(%rsp), %r9
movq 76(%rsp), %rcx
movl 84(%rsp), %r8d
movq 64(%rsp), %rsi
movl 72(%rsp), %edx
leaq _Z17twiddleRealKernelPfS_i(%rip), %rdi
call cudaLaunchKernel@PLT
addq $16, %rsp
.cfi_def_cfa_offset 144
jmp .L19
.L24:
call __stack_chk_fail@PLT
.cfi_endproc
.LFE2086:
.size _Z40__device_stub__Z17twiddleRealKernelPfS_iPfS_i, .-_Z40__device_stub__Z17twiddleRealKernelPfS_iPfS_i
.globl _Z17twiddleRealKernelPfS_i
.type _Z17twiddleRealKernelPfS_i, @function
_Z17twiddleRealKernelPfS_i:
.LFB2087:
.cfi_startproc
endbr64
subq $8, %rsp
.cfi_def_cfa_offset 16
call _Z40__device_stub__Z17twiddleRealKernelPfS_iPfS_i
addq $8, %rsp
.cfi_def_cfa_offset 8
ret
.cfi_endproc
.LFE2087:
.size _Z17twiddleRealKernelPfS_i, .-_Z17twiddleRealKernelPfS_i
.globl _Z39__device_stub__Z16twiddleImgKernelPfS_iPfS_i
.type _Z39__device_stub__Z16twiddleImgKernelPfS_iPfS_i, @function
_Z39__device_stub__Z16twiddleImgKernelPfS_iPfS_i:
.LFB2088:
.cfi_startproc
endbr64
subq $136, %rsp
.cfi_def_cfa_offset 144
movq %rdi, 24(%rsp)
movq %rsi, 16(%rsp)
movl %edx, 12(%rsp)
movq %fs:40, %rax
movq %rax, 120(%rsp)
xorl %eax, %eax
leaq 24(%rsp), %rax
movq %rax, 96(%rsp)
leaq 16(%rsp), %rax
movq %rax, 104(%rsp)
leaq 12(%rsp), %rax
movq %rax, 112(%rsp)
movl $1, 48(%rsp)
movl $1, 52(%rsp)
movl $1, 56(%rsp)
movl $1, 60(%rsp)
movl $1, 64(%rsp)
movl $1, 68(%rsp)
leaq 40(%rsp), %rcx
leaq 32(%rsp), %rdx
leaq 60(%rsp), %rsi
leaq 48(%rsp), %rdi
call __cudaPopCallConfiguration@PLT
testl %eax, %eax
je .L31
.L27:
movq 120(%rsp), %rax
subq %fs:40, %rax
jne .L32
addq $136, %rsp
.cfi_remember_state
.cfi_def_cfa_offset 8
ret
.L31:
.cfi_restore_state
pushq 40(%rsp)
.cfi_def_cfa_offset 152
pushq 40(%rsp)
.cfi_def_cfa_offset 160
leaq 112(%rsp), %r9
movq 76(%rsp), %rcx
movl 84(%rsp), %r8d
movq 64(%rsp), %rsi
movl 72(%rsp), %edx
leaq _Z16twiddleImgKernelPfS_i(%rip), %rdi
call cudaLaunchKernel@PLT
addq $16, %rsp
.cfi_def_cfa_offset 144
jmp .L27
.L32:
call __stack_chk_fail@PLT
.cfi_endproc
.LFE2088:
.size _Z39__device_stub__Z16twiddleImgKernelPfS_iPfS_i, .-_Z39__device_stub__Z16twiddleImgKernelPfS_iPfS_i
.globl _Z16twiddleImgKernelPfS_i
.type _Z16twiddleImgKernelPfS_i, @function
_Z16twiddleImgKernelPfS_i:
.LFB2089:
.cfi_startproc
endbr64
subq $8, %rsp
.cfi_def_cfa_offset 16
call _Z39__device_stub__Z16twiddleImgKernelPfS_iPfS_i
addq $8, %rsp
.cfi_def_cfa_offset 8
ret
.cfi_endproc
.LFE2089:
.size _Z16twiddleImgKernelPfS_i, .-_Z16twiddleImgKernelPfS_i
.section .rodata.str1.1,"aMS",@progbits,1
.LC0:
.string "%f\n"
.LC1:
.string "%f %f\n"
.text
.globl main
.type main, @function
main:
.LFB2057:
.cfi_startproc
endbr64
pushq %r13
.cfi_def_cfa_offset 16
.cfi_offset 13, -16
pushq %r12
.cfi_def_cfa_offset 24
.cfi_offset 12, -24
pushq %rbp
.cfi_def_cfa_offset 32
.cfi_offset 6, -32
pushq %rbx
.cfi_def_cfa_offset 40
.cfi_offset 3, -40
subq $104, %rsp
.cfi_def_cfa_offset 144
movq %fs:40, %rax
movq %rax, 88(%rsp)
xorl %eax, %eax
movl $40000, %edi
call malloc@PLT
movq %rax, %rbp
movl $80000, %edi
call malloc@PLT
movq %rax, %rbx
movl $400000000, %edi
call malloc@PLT
movq %rax, %r13
movl $400000000, %edi
call malloc@PLT
movq %rax, %r12
movl $10, 40(%rsp)
movl $10, 44(%rsp)
movl $1, 48(%rsp)
movl $10, 52(%rsp)
movl $10, 56(%rsp)
movl $1, 60(%rsp)
leaq 8(%rsp), %rdi
movl $40000, %esi
call cudaMalloc@PLT
leaq 16(%rsp), %rdi
movl $80000, %esi
call cudaMalloc@PLT
leaq 24(%rsp), %rdi
movl $400000000, %esi
call cudaMalloc@PLT
leaq 32(%rsp), %rdi
movl $400000000, %esi
call cudaMalloc@PLT
movl $40000, %edx
movl $0, %esi
movq 8(%rsp), %rdi
call cudaMemset@PLT
movl $80000, %edx
movl $0, %esi
movq 16(%rsp), %rdi
call cudaMemset@PLT
movl $400000000, %edx
movl $0, %esi
movq 24(%rsp), %rdi
call cudaMemset@PLT
movl $400000000, %edx
movl $0, %esi
movq 32(%rsp), %rdi
call cudaMemset@PLT
movl 48(%rsp), %ecx
movl $0, %r9d
movl $0, %r8d
movq 40(%rsp), %rdx
movq 52(%rsp), %rdi
movl 60(%rsp), %esi
call __cudaPushCallConfiguration@PLT
testl %eax, %eax
je .L42
.L36:
movl $2, %ecx
movl $40000, %edx
movq 8(%rsp), %rsi
movq %rbp, %rdi
call cudaMemcpy@PLT
pxor %xmm0, %xmm0
cvtss2sd 400(%rbp), %xmm0
leaq .LC0(%rip), %rsi
movl $2, %edi
movl $1, %eax
call __printf_chk@PLT
movl $512, 76(%rsp)
movl $1, 80(%rsp)
movl $1, 84(%rsp)
movl $9, 64(%rsp)
movl $1, 68(%rsp)
movl $1, 72(%rsp)
movl $0, %r9d
movl $0, %r8d
movq 76(%rsp), %rdx
movl $1, %ecx
movq 64(%rsp), %rdi
movl $1, %esi
call __cudaPushCallConfiguration@PLT
testl %eax, %eax
je .L43
.L37:
movl $2, %ecx
movl $80000, %edx
movq 16(%rsp), %rsi
movq %rbx, %rdi
call cudaMemcpy@PLT
pxor %xmm0, %xmm0
cvtss2sd 20(%rbx), %xmm0
pxor %xmm1, %xmm1
cvtss2sd 40020(%rbx), %xmm1
leaq .LC1(%rip), %rsi
movl $2, %edi
movl $2, %eax
call __printf_chk@PLT
movl $512, 76(%rsp)
movl $1, 80(%rsp)
movl $1, 84(%rsp)
movl $9, 64(%rsp)
movl $1, 68(%rsp)
movl $1, 72(%rsp)
movl $0, %r9d
movl $0, %r8d
movq 76(%rsp), %rdx
movl $1, %ecx
movq 64(%rsp), %rdi
movl $1, %esi
call __cudaPushCallConfiguration@PLT
testl %eax, %eax
je .L44
.L38:
movl $2, %ecx
movl $400000000, %edx
movq 24(%rsp), %rsi
movq %r13, %rdi
call cudaMemcpy@PLT
movl $512, 76(%rsp)
movl $1, 80(%rsp)
movl $1, 84(%rsp)
movl $9, 64(%rsp)
movl $1, 68(%rsp)
movl $1, 72(%rsp)
movl $0, %r9d
movl $0, %r8d
movq 76(%rsp), %rdx
movl $1, %ecx
movq 64(%rsp), %rdi
movl $1, %esi
call __cudaPushCallConfiguration@PLT
testl %eax, %eax
je .L45
.L39:
movl $2, %ecx
movl $400000000, %edx
movq 32(%rsp), %rsi
movq %r12, %rdi
call cudaMemcpy@PLT
movq 88(%rsp), %rax
subq %fs:40, %rax
jne .L46
movl $0, %eax
addq $104, %rsp
.cfi_remember_state
.cfi_def_cfa_offset 40
popq %rbx
.cfi_def_cfa_offset 32
popq %rbp
.cfi_def_cfa_offset 24
popq %r12
.cfi_def_cfa_offset 16
popq %r13
.cfi_def_cfa_offset 8
ret
.L42:
.cfi_restore_state
movl $10000, %esi
movq 8(%rsp), %rdi
call _Z32__device_stub__Z11inputKernelPfiPfi
jmp .L36
.L43:
movl $10000, %esi
movq 16(%rsp), %rdi
call _Z33__device_stub__Z12factorKernelPfiPfi
jmp .L37
.L44:
movl $10000, %edx
movq 16(%rsp), %rsi
movq 24(%rsp), %rdi
call _Z40__device_stub__Z17twiddleRealKernelPfS_iPfS_i
jmp .L38
.L45:
movl $10000, %edx
movq 16(%rsp), %rsi
movq 32(%rsp), %rdi
call _Z39__device_stub__Z16twiddleImgKernelPfS_iPfS_i
jmp .L39
.L46:
call __stack_chk_fail@PLT
.cfi_endproc
.LFE2057:
.size main, .-main
.section .rodata.str1.1
.LC2:
.string "_Z16twiddleImgKernelPfS_i"
.LC3:
.string "_Z17twiddleRealKernelPfS_i"
.LC4:
.string "_Z12factorKernelPfi"
.LC5:
.string "_Z11inputKernelPfi"
.text
.type _ZL24__sti____cudaRegisterAllv, @function
_ZL24__sti____cudaRegisterAllv:
.LFB2091:
.cfi_startproc
endbr64
pushq %rbx
.cfi_def_cfa_offset 16
.cfi_offset 3, -16
leaq _ZL15__fatDeviceText(%rip), %rdi
call __cudaRegisterFatBinary@PLT
movq %rax, %rbx
movq %rax, _ZL20__cudaFatCubinHandle(%rip)
pushq $0
.cfi_def_cfa_offset 24
pushq $0
.cfi_def_cfa_offset 32
pushq $0
.cfi_def_cfa_offset 40
pushq $0
.cfi_def_cfa_offset 48
movl $0, %r9d
movl $-1, %r8d
leaq .LC2(%rip), %rdx
movq %rdx, %rcx
leaq _Z16twiddleImgKernelPfS_i(%rip), %rsi
movq %rax, %rdi
call __cudaRegisterFunction@PLT
addq $32, %rsp
.cfi_def_cfa_offset 16
pushq $0
.cfi_def_cfa_offset 24
pushq $0
.cfi_def_cfa_offset 32
pushq $0
.cfi_def_cfa_offset 40
pushq $0
.cfi_def_cfa_offset 48
movl $0, %r9d
movl $-1, %r8d
leaq .LC3(%rip), %rdx
movq %rdx, %rcx
leaq _Z17twiddleRealKernelPfS_i(%rip), %rsi
movq %rbx, %rdi
call __cudaRegisterFunction@PLT
addq $32, %rsp
.cfi_def_cfa_offset 16
pushq $0
.cfi_def_cfa_offset 24
pushq $0
.cfi_def_cfa_offset 32
pushq $0
.cfi_def_cfa_offset 40
pushq $0
.cfi_def_cfa_offset 48
movl $0, %r9d
movl $-1, %r8d
leaq .LC4(%rip), %rdx
movq %rdx, %rcx
leaq _Z12factorKernelPfi(%rip), %rsi
movq %rbx, %rdi
call __cudaRegisterFunction@PLT
addq $32, %rsp
.cfi_def_cfa_offset 16
pushq $0
.cfi_def_cfa_offset 24
pushq $0
.cfi_def_cfa_offset 32
pushq $0
.cfi_def_cfa_offset 40
pushq $0
.cfi_def_cfa_offset 48
movl $0, %r9d
movl $-1, %r8d
leaq .LC5(%rip), %rdx
movq %rdx, %rcx
leaq _Z11inputKernelPfi(%rip), %rsi
movq %rbx, %rdi
call __cudaRegisterFunction@PLT
addq $32, %rsp
.cfi_def_cfa_offset 16
movq _ZL20__cudaFatCubinHandle(%rip), %rdi
call __cudaRegisterFatBinaryEnd@PLT
leaq _ZL26__cudaUnregisterBinaryUtilv(%rip), %rdi
call atexit@PLT
popq %rbx
.cfi_def_cfa_offset 8
ret
.cfi_endproc
.LFE2091:
.size _ZL24__sti____cudaRegisterAllv, .-_ZL24__sti____cudaRegisterAllv
.section .init_array,"aw"
.align 8
.quad _ZL24__sti____cudaRegisterAllv
.section .nvFatBinSegment,"aw"
.align 8
.type _ZL15__fatDeviceText, @object
.size _ZL15__fatDeviceText, 24
_ZL15__fatDeviceText:
.long 1180844977
.long 1
.quad fatbinData
.quad 0
.local _ZL20__cudaFatCubinHandle
.comm _ZL20__cudaFatCubinHandle,8,8
.ident "GCC: (Ubuntu 13.3.0-6ubuntu2~24.04) 13.3.0"
.section .note.GNU-stack,"",@progbits
.section .note.gnu.property,"a"
.align 8
.long 1f - 0f
.long 4f - 1f
.long 5
0:
.string "GNU"
1:
.align 8
.long 0xc0000002
.long 3f - 2f
2:
.long 0x3
3:
.align 8
4: | .text
.file "twiddle.hip"
.globl _Z26__device_stub__inputKernelPfi # -- Begin function _Z26__device_stub__inputKernelPfi
.p2align 4, 0x90
.type _Z26__device_stub__inputKernelPfi,@function
_Z26__device_stub__inputKernelPfi: # @_Z26__device_stub__inputKernelPfi
.cfi_startproc
# %bb.0:
subq $88, %rsp
.cfi_def_cfa_offset 96
movq %rdi, 56(%rsp)
movl %esi, 4(%rsp)
leaq 56(%rsp), %rax
movq %rax, 64(%rsp)
leaq 4(%rsp), %rax
movq %rax, 72(%rsp)
leaq 40(%rsp), %rdi
leaq 24(%rsp), %rsi
leaq 16(%rsp), %rdx
leaq 8(%rsp), %rcx
callq __hipPopCallConfiguration
movq 40(%rsp), %rsi
movl 48(%rsp), %edx
movq 24(%rsp), %rcx
movl 32(%rsp), %r8d
leaq 64(%rsp), %r9
movl $_Z11inputKernelPfi, %edi
pushq 8(%rsp)
.cfi_adjust_cfa_offset 8
pushq 24(%rsp)
.cfi_adjust_cfa_offset 8
callq hipLaunchKernel
addq $104, %rsp
.cfi_adjust_cfa_offset -104
retq
.Lfunc_end0:
.size _Z26__device_stub__inputKernelPfi, .Lfunc_end0-_Z26__device_stub__inputKernelPfi
.cfi_endproc
# -- End function
.globl _Z27__device_stub__factorKernelPfi # -- Begin function _Z27__device_stub__factorKernelPfi
.p2align 4, 0x90
.type _Z27__device_stub__factorKernelPfi,@function
_Z27__device_stub__factorKernelPfi: # @_Z27__device_stub__factorKernelPfi
.cfi_startproc
# %bb.0:
subq $88, %rsp
.cfi_def_cfa_offset 96
movq %rdi, 56(%rsp)
movl %esi, 4(%rsp)
leaq 56(%rsp), %rax
movq %rax, 64(%rsp)
leaq 4(%rsp), %rax
movq %rax, 72(%rsp)
leaq 40(%rsp), %rdi
leaq 24(%rsp), %rsi
leaq 16(%rsp), %rdx
leaq 8(%rsp), %rcx
callq __hipPopCallConfiguration
movq 40(%rsp), %rsi
movl 48(%rsp), %edx
movq 24(%rsp), %rcx
movl 32(%rsp), %r8d
leaq 64(%rsp), %r9
movl $_Z12factorKernelPfi, %edi
pushq 8(%rsp)
.cfi_adjust_cfa_offset 8
pushq 24(%rsp)
.cfi_adjust_cfa_offset 8
callq hipLaunchKernel
addq $104, %rsp
.cfi_adjust_cfa_offset -104
retq
.Lfunc_end1:
.size _Z27__device_stub__factorKernelPfi, .Lfunc_end1-_Z27__device_stub__factorKernelPfi
.cfi_endproc
# -- End function
.globl _Z32__device_stub__twiddleRealKernelPfS_i # -- Begin function _Z32__device_stub__twiddleRealKernelPfS_i
.p2align 4, 0x90
.type _Z32__device_stub__twiddleRealKernelPfS_i,@function
_Z32__device_stub__twiddleRealKernelPfS_i: # @_Z32__device_stub__twiddleRealKernelPfS_i
.cfi_startproc
# %bb.0:
subq $104, %rsp
.cfi_def_cfa_offset 112
movq %rdi, 72(%rsp)
movq %rsi, 64(%rsp)
movl %edx, 12(%rsp)
leaq 72(%rsp), %rax
movq %rax, 80(%rsp)
leaq 64(%rsp), %rax
movq %rax, 88(%rsp)
leaq 12(%rsp), %rax
movq %rax, 96(%rsp)
leaq 48(%rsp), %rdi
leaq 32(%rsp), %rsi
leaq 24(%rsp), %rdx
leaq 16(%rsp), %rcx
callq __hipPopCallConfiguration
movq 48(%rsp), %rsi
movl 56(%rsp), %edx
movq 32(%rsp), %rcx
movl 40(%rsp), %r8d
leaq 80(%rsp), %r9
movl $_Z17twiddleRealKernelPfS_i, %edi
pushq 16(%rsp)
.cfi_adjust_cfa_offset 8
pushq 32(%rsp)
.cfi_adjust_cfa_offset 8
callq hipLaunchKernel
addq $120, %rsp
.cfi_adjust_cfa_offset -120
retq
.Lfunc_end2:
.size _Z32__device_stub__twiddleRealKernelPfS_i, .Lfunc_end2-_Z32__device_stub__twiddleRealKernelPfS_i
.cfi_endproc
# -- End function
.globl _Z31__device_stub__twiddleImgKernelPfS_i # -- Begin function _Z31__device_stub__twiddleImgKernelPfS_i
.p2align 4, 0x90
.type _Z31__device_stub__twiddleImgKernelPfS_i,@function
_Z31__device_stub__twiddleImgKernelPfS_i: # @_Z31__device_stub__twiddleImgKernelPfS_i
.cfi_startproc
# %bb.0:
subq $104, %rsp
.cfi_def_cfa_offset 112
movq %rdi, 72(%rsp)
movq %rsi, 64(%rsp)
movl %edx, 12(%rsp)
leaq 72(%rsp), %rax
movq %rax, 80(%rsp)
leaq 64(%rsp), %rax
movq %rax, 88(%rsp)
leaq 12(%rsp), %rax
movq %rax, 96(%rsp)
leaq 48(%rsp), %rdi
leaq 32(%rsp), %rsi
leaq 24(%rsp), %rdx
leaq 16(%rsp), %rcx
callq __hipPopCallConfiguration
movq 48(%rsp), %rsi
movl 56(%rsp), %edx
movq 32(%rsp), %rcx
movl 40(%rsp), %r8d
leaq 80(%rsp), %r9
movl $_Z16twiddleImgKernelPfS_i, %edi
pushq 16(%rsp)
.cfi_adjust_cfa_offset 8
pushq 32(%rsp)
.cfi_adjust_cfa_offset 8
callq hipLaunchKernel
addq $120, %rsp
.cfi_adjust_cfa_offset -120
retq
.Lfunc_end3:
.size _Z31__device_stub__twiddleImgKernelPfS_i, .Lfunc_end3-_Z31__device_stub__twiddleImgKernelPfS_i
.cfi_endproc
# -- End function
.globl main # -- Begin function main
.p2align 4, 0x90
.type main,@function
main: # @main
.cfi_startproc
# %bb.0:
pushq %r15
.cfi_def_cfa_offset 16
pushq %r14
.cfi_def_cfa_offset 24
pushq %r13
.cfi_def_cfa_offset 32
pushq %r12
.cfi_def_cfa_offset 40
pushq %rbx
.cfi_def_cfa_offset 48
subq $128, %rsp
.cfi_def_cfa_offset 176
.cfi_offset %rbx, -48
.cfi_offset %r12, -40
.cfi_offset %r13, -32
.cfi_offset %r14, -24
.cfi_offset %r15, -16
movl $40000, %edi # imm = 0x9C40
callq malloc
movq %rax, %r13
movl $80000, %edi # imm = 0x13880
callq malloc
movq %rax, %r15
movl $400000000, %edi # imm = 0x17D78400
callq malloc
movq %rax, %r14
movl $400000000, %edi # imm = 0x17D78400
callq malloc
movq %rax, %rbx
leaq 120(%rsp), %rdi
movl $40000, %esi # imm = 0x9C40
callq hipMalloc
leaq 72(%rsp), %rdi
movl $80000, %esi # imm = 0x13880
callq hipMalloc
leaq 112(%rsp), %rdi
movl $400000000, %esi # imm = 0x17D78400
callq hipMalloc
leaq 104(%rsp), %rdi
movl $400000000, %esi # imm = 0x17D78400
callq hipMalloc
movq 120(%rsp), %rdi
movl $40000, %edx # imm = 0x9C40
xorl %esi, %esi
callq hipMemset
movq 72(%rsp), %rdi
movl $80000, %edx # imm = 0x13880
xorl %esi, %esi
callq hipMemset
movq 112(%rsp), %rdi
movl $400000000, %edx # imm = 0x17D78400
xorl %esi, %esi
callq hipMemset
movq 104(%rsp), %rdi
movl $400000000, %edx # imm = 0x17D78400
xorl %esi, %esi
callq hipMemset
movabsq $42949672970, %rdi # imm = 0xA0000000A
movl $1, %esi
movq %rdi, %rdx
movl $1, %ecx
xorl %r8d, %r8d
xorl %r9d, %r9d
callq __hipPushCallConfiguration
testl %eax, %eax
jne .LBB4_2
# %bb.1:
movq 120(%rsp), %rax
movq %rax, 56(%rsp)
movl $10000, (%rsp) # imm = 0x2710
leaq 56(%rsp), %rax
movq %rax, 80(%rsp)
movq %rsp, %rax
movq %rax, 88(%rsp)
leaq 32(%rsp), %rdi
leaq 16(%rsp), %rsi
leaq 48(%rsp), %rdx
leaq 8(%rsp), %rcx
callq __hipPopCallConfiguration
movq 32(%rsp), %rsi
movl 40(%rsp), %edx
movq 16(%rsp), %rcx
movl 24(%rsp), %r8d
leaq 80(%rsp), %r9
movl $_Z11inputKernelPfi, %edi
pushq 8(%rsp)
.cfi_adjust_cfa_offset 8
pushq 56(%rsp)
.cfi_adjust_cfa_offset 8
callq hipLaunchKernel
addq $16, %rsp
.cfi_adjust_cfa_offset -16
.LBB4_2:
movabsq $4294967305, %r12 # imm = 0x100000009
movq 120(%rsp), %rsi
movl $40000, %edx # imm = 0x9C40
movq %r13, %rdi
movl $2, %ecx
callq hipMemcpy
movss 400(%r13), %xmm0 # xmm0 = mem[0],zero,zero,zero
cvtss2sd %xmm0, %xmm0
movl $.L.str, %edi
movb $1, %al
callq printf
leaq 503(%r12), %r13
movq %r12, %rdi
movl $1, %esi
movq %r13, %rdx
movl $1, %ecx
xorl %r8d, %r8d
xorl %r9d, %r9d
callq __hipPushCallConfiguration
testl %eax, %eax
jne .LBB4_4
# %bb.3:
movq 72(%rsp), %rax
movq %rax, 56(%rsp)
movl $10000, (%rsp) # imm = 0x2710
leaq 56(%rsp), %rax
movq %rax, 80(%rsp)
movq %rsp, %rax
movq %rax, 88(%rsp)
leaq 32(%rsp), %rdi
leaq 16(%rsp), %rsi
leaq 48(%rsp), %rdx
leaq 8(%rsp), %rcx
callq __hipPopCallConfiguration
movq 32(%rsp), %rsi
movl 40(%rsp), %edx
movq 16(%rsp), %rcx
movl 24(%rsp), %r8d
leaq 80(%rsp), %r9
movl $_Z12factorKernelPfi, %edi
pushq 8(%rsp)
.cfi_adjust_cfa_offset 8
pushq 56(%rsp)
.cfi_adjust_cfa_offset 8
callq hipLaunchKernel
addq $16, %rsp
.cfi_adjust_cfa_offset -16
.LBB4_4:
movq 72(%rsp), %rsi
movl $80000, %edx # imm = 0x13880
movq %r15, %rdi
movl $2, %ecx
callq hipMemcpy
movss 20(%r15), %xmm0 # xmm0 = mem[0],zero,zero,zero
cvtss2sd %xmm0, %xmm0
movss 40020(%r15), %xmm1 # xmm1 = mem[0],zero,zero,zero
cvtss2sd %xmm1, %xmm1
movl $.L.str.1, %edi
movb $2, %al
callq printf
movq %r12, %rdi
movl $1, %esi
movq %r13, %rdx
movl $1, %ecx
xorl %r8d, %r8d
xorl %r9d, %r9d
callq __hipPushCallConfiguration
testl %eax, %eax
jne .LBB4_6
# %bb.5:
movq 112(%rsp), %rax
movq 72(%rsp), %rcx
movq %rax, 56(%rsp)
movq %rcx, 48(%rsp)
movl $10000, 68(%rsp) # imm = 0x2710
leaq 56(%rsp), %rax
movq %rax, 80(%rsp)
leaq 48(%rsp), %rax
movq %rax, 88(%rsp)
leaq 68(%rsp), %rax
movq %rax, 96(%rsp)
leaq 32(%rsp), %rdi
leaq 16(%rsp), %rsi
leaq 8(%rsp), %rdx
movq %rsp, %rcx
callq __hipPopCallConfiguration
movq 32(%rsp), %rsi
movl 40(%rsp), %edx
movq 16(%rsp), %rcx
movl 24(%rsp), %r8d
leaq 80(%rsp), %r9
movl $_Z17twiddleRealKernelPfS_i, %edi
pushq (%rsp)
.cfi_adjust_cfa_offset 8
pushq 16(%rsp)
.cfi_adjust_cfa_offset 8
callq hipLaunchKernel
addq $16, %rsp
.cfi_adjust_cfa_offset -16
.LBB4_6:
movq 112(%rsp), %rsi
movl $400000000, %edx # imm = 0x17D78400
movq %r14, %rdi
movl $2, %ecx
callq hipMemcpy
movq %r12, %rdi
movl $1, %esi
movq %r13, %rdx
movl $1, %ecx
xorl %r8d, %r8d
xorl %r9d, %r9d
callq __hipPushCallConfiguration
testl %eax, %eax
jne .LBB4_8
# %bb.7:
movq 104(%rsp), %rax
movq 72(%rsp), %rcx
movq %rax, 56(%rsp)
movq %rcx, 48(%rsp)
movl $10000, 68(%rsp) # imm = 0x2710
leaq 56(%rsp), %rax
movq %rax, 80(%rsp)
leaq 48(%rsp), %rax
movq %rax, 88(%rsp)
leaq 68(%rsp), %rax
movq %rax, 96(%rsp)
leaq 32(%rsp), %rdi
leaq 16(%rsp), %rsi
leaq 8(%rsp), %rdx
movq %rsp, %rcx
callq __hipPopCallConfiguration
movq 32(%rsp), %rsi
movl 40(%rsp), %edx
movq 16(%rsp), %rcx
movl 24(%rsp), %r8d
leaq 80(%rsp), %r9
movl $_Z16twiddleImgKernelPfS_i, %edi
pushq (%rsp)
.cfi_adjust_cfa_offset 8
pushq 16(%rsp)
.cfi_adjust_cfa_offset 8
callq hipLaunchKernel
addq $16, %rsp
.cfi_adjust_cfa_offset -16
.LBB4_8:
movq 104(%rsp), %rsi
movl $400000000, %edx # imm = 0x17D78400
movq %rbx, %rdi
movl $2, %ecx
callq hipMemcpy
xorl %eax, %eax
addq $128, %rsp
.cfi_def_cfa_offset 48
popq %rbx
.cfi_def_cfa_offset 40
popq %r12
.cfi_def_cfa_offset 32
popq %r13
.cfi_def_cfa_offset 24
popq %r14
.cfi_def_cfa_offset 16
popq %r15
.cfi_def_cfa_offset 8
retq
.Lfunc_end4:
.size main, .Lfunc_end4-main
.cfi_endproc
# -- End function
.p2align 4, 0x90 # -- Begin function __hip_module_ctor
.type __hip_module_ctor,@function
__hip_module_ctor: # @__hip_module_ctor
.cfi_startproc
# %bb.0:
pushq %rbx
.cfi_def_cfa_offset 16
subq $32, %rsp
.cfi_def_cfa_offset 48
.cfi_offset %rbx, -16
cmpq $0, __hip_gpubin_handle(%rip)
jne .LBB5_2
# %bb.1:
movl $__hip_fatbin_wrapper, %edi
callq __hipRegisterFatBinary
movq %rax, __hip_gpubin_handle(%rip)
.LBB5_2:
movq __hip_gpubin_handle(%rip), %rbx
xorps %xmm0, %xmm0
movups %xmm0, 16(%rsp)
movups %xmm0, (%rsp)
movl $_Z11inputKernelPfi, %esi
movl $.L__unnamed_1, %edx
movl $.L__unnamed_1, %ecx
movq %rbx, %rdi
movl $-1, %r8d
xorl %r9d, %r9d
callq __hipRegisterFunction
xorps %xmm0, %xmm0
movups %xmm0, 16(%rsp)
movups %xmm0, (%rsp)
movl $_Z12factorKernelPfi, %esi
movl $.L__unnamed_2, %edx
movl $.L__unnamed_2, %ecx
movq %rbx, %rdi
movl $-1, %r8d
xorl %r9d, %r9d
callq __hipRegisterFunction
xorps %xmm0, %xmm0
movups %xmm0, 16(%rsp)
movups %xmm0, (%rsp)
movl $_Z17twiddleRealKernelPfS_i, %esi
movl $.L__unnamed_3, %edx
movl $.L__unnamed_3, %ecx
movq %rbx, %rdi
movl $-1, %r8d
xorl %r9d, %r9d
callq __hipRegisterFunction
xorps %xmm0, %xmm0
movups %xmm0, 16(%rsp)
movups %xmm0, (%rsp)
movl $_Z16twiddleImgKernelPfS_i, %esi
movl $.L__unnamed_4, %edx
movl $.L__unnamed_4, %ecx
movq %rbx, %rdi
movl $-1, %r8d
xorl %r9d, %r9d
callq __hipRegisterFunction
movl $__hip_module_dtor, %edi
addq $32, %rsp
.cfi_def_cfa_offset 16
popq %rbx
.cfi_def_cfa_offset 8
jmp atexit # TAILCALL
.Lfunc_end5:
.size __hip_module_ctor, .Lfunc_end5-__hip_module_ctor
.cfi_endproc
# -- End function
.p2align 4, 0x90 # -- Begin function __hip_module_dtor
.type __hip_module_dtor,@function
__hip_module_dtor: # @__hip_module_dtor
.cfi_startproc
# %bb.0:
movq __hip_gpubin_handle(%rip), %rdi
testq %rdi, %rdi
je .LBB6_2
# %bb.1:
pushq %rax
.cfi_def_cfa_offset 16
callq __hipUnregisterFatBinary
movq $0, __hip_gpubin_handle(%rip)
addq $8, %rsp
.cfi_def_cfa_offset 8
.LBB6_2:
retq
.Lfunc_end6:
.size __hip_module_dtor, .Lfunc_end6-__hip_module_dtor
.cfi_endproc
# -- End function
.type _Z11inputKernelPfi,@object # @_Z11inputKernelPfi
.section .rodata,"a",@progbits
.globl _Z11inputKernelPfi
.p2align 3, 0x0
_Z11inputKernelPfi:
.quad _Z26__device_stub__inputKernelPfi
.size _Z11inputKernelPfi, 8
.type _Z12factorKernelPfi,@object # @_Z12factorKernelPfi
.globl _Z12factorKernelPfi
.p2align 3, 0x0
_Z12factorKernelPfi:
.quad _Z27__device_stub__factorKernelPfi
.size _Z12factorKernelPfi, 8
.type _Z17twiddleRealKernelPfS_i,@object # @_Z17twiddleRealKernelPfS_i
.globl _Z17twiddleRealKernelPfS_i
.p2align 3, 0x0
_Z17twiddleRealKernelPfS_i:
.quad _Z32__device_stub__twiddleRealKernelPfS_i
.size _Z17twiddleRealKernelPfS_i, 8
.type _Z16twiddleImgKernelPfS_i,@object # @_Z16twiddleImgKernelPfS_i
.globl _Z16twiddleImgKernelPfS_i
.p2align 3, 0x0
_Z16twiddleImgKernelPfS_i:
.quad _Z31__device_stub__twiddleImgKernelPfS_i
.size _Z16twiddleImgKernelPfS_i, 8
.type .L.str,@object # @.str
.section .rodata.str1.1,"aMS",@progbits,1
.L.str:
.asciz "%f\n"
.size .L.str, 4
.type .L.str.1,@object # @.str.1
.L.str.1:
.asciz "%f %f\n"
.size .L.str.1, 7
.type .L__unnamed_1,@object # @0
.L__unnamed_1:
.asciz "_Z11inputKernelPfi"
.size .L__unnamed_1, 19
.type .L__unnamed_2,@object # @1
.L__unnamed_2:
.asciz "_Z12factorKernelPfi"
.size .L__unnamed_2, 20
.type .L__unnamed_3,@object # @2
.L__unnamed_3:
.asciz "_Z17twiddleRealKernelPfS_i"
.size .L__unnamed_3, 27
.type .L__unnamed_4,@object # @3
.L__unnamed_4:
.asciz "_Z16twiddleImgKernelPfS_i"
.size .L__unnamed_4, 26
.type __hip_fatbin_wrapper,@object # @__hip_fatbin_wrapper
.section .hipFatBinSegment,"a",@progbits
.p2align 3, 0x0
__hip_fatbin_wrapper:
.long 1212764230 # 0x48495046
.long 1 # 0x1
.quad __hip_fatbin
.quad 0
.size __hip_fatbin_wrapper, 24
.type __hip_gpubin_handle,@object # @__hip_gpubin_handle
.local __hip_gpubin_handle
.comm __hip_gpubin_handle,8,8
.section .init_array,"aw",@init_array
.p2align 3, 0x0
.quad __hip_module_ctor
.type __hip_cuid_,@object # @__hip_cuid_
.bss
.globl __hip_cuid_
__hip_cuid_:
.byte 0 # 0x0
.size __hip_cuid_, 1
.section ".linker-options","e",@llvm_linker_options
.ident "AMD clang version 18.0.0git (https://github.com/RadeonOpenCompute/llvm-project roc-6.3.2 25012 e5bf7e55c91490b07c49d8960fa7983d864936c4)"
.section ".note.GNU-stack","",@progbits
.addrsig
.addrsig_sym _Z26__device_stub__inputKernelPfi
.addrsig_sym _Z27__device_stub__factorKernelPfi
.addrsig_sym _Z32__device_stub__twiddleRealKernelPfS_i
.addrsig_sym _Z31__device_stub__twiddleImgKernelPfS_i
.addrsig_sym __hip_module_ctor
.addrsig_sym __hip_module_dtor
.addrsig_sym _Z11inputKernelPfi
.addrsig_sym _Z12factorKernelPfi
.addrsig_sym _Z17twiddleRealKernelPfS_i
.addrsig_sym _Z16twiddleImgKernelPfS_i
.addrsig_sym __hip_fatbin
.addrsig_sym __hip_fatbin_wrapper
.addrsig_sym __hip_cuid_ |
You are a helpful coding assistant specialized in converting CUDA source code to CUDA device assembly. | #include "includes.h"
#define SIZ 20
#define num_inp 4
using namespace std;
typedef struct edge {
int first, second;
} edges;
__global__ void grads_w2_kernel(double * grads_W2,double * W2,double reg, int size)
{
int i = blockIdx.x;
int j = threadIdx.x;
grads_W2[i*size + j] += W2[i*size + j] * reg;
} | code for sm_80
Function : _Z15grads_w2_kernelPdS_di
.headerflags @"EF_CUDA_TEXMODE_UNIFIED EF_CUDA_64BIT_ADDRESS EF_CUDA_SM80 EF_CUDA_VIRTUAL_SM(EF_CUDA_SM80)"
/*0000*/ MOV R1, c[0x0][0x28] ; /* 0x00000a0000017a02 */
/* 0x000fe40000000f00 */
/*0010*/ S2R R4, SR_CTAID.X ; /* 0x0000000000047919 */
/* 0x000e220000002500 */
/*0020*/ HFMA2.MMA R5, -RZ, RZ, 0, 4.76837158203125e-07 ; /* 0x00000008ff057435 */
/* 0x000fe200000001ff */
/*0030*/ ULDC.64 UR4, c[0x0][0x118] ; /* 0x0000460000047ab9 */
/* 0x000fe40000000a00 */
/*0040*/ S2R R3, SR_TID.X ; /* 0x0000000000037919 */
/* 0x000e240000002100 */
/*0050*/ IMAD R4, R4, c[0x0][0x178], R3 ; /* 0x00005e0004047a24 */
/* 0x001fca00078e0203 */
/*0060*/ IMAD.WIDE R2, R4, R5, c[0x0][0x168] ; /* 0x00005a0004027625 */
/* 0x000fc800078e0205 */
/*0070*/ IMAD.WIDE R4, R4, R5, c[0x0][0x160] ; /* 0x0000580004047625 */
/* 0x000fe400078e0205 */
/*0080*/ LDG.E.64 R2, [R2.64] ; /* 0x0000000402027981 */
/* 0x000ea8000c1e1b00 */
/*0090*/ LDG.E.64 R6, [R4.64] ; /* 0x0000000404067981 */
/* 0x000ea4000c1e1b00 */
/*00a0*/ DFMA R6, R2, c[0x0][0x170], R6 ; /* 0x00005c0002067a2b */
/* 0x004e0e0000000006 */
/*00b0*/ STG.E.64 [R4.64], R6 ; /* 0x0000000604007986 */
/* 0x001fe2000c101b04 */
/*00c0*/ EXIT ; /* 0x000000000000794d */
/* 0x000fea0003800000 */
/*00d0*/ BRA 0xd0; /* 0xfffffff000007947 */
/* 0x000fc0000383ffff */
/*00e0*/ NOP; /* 0x0000000000007918 */
/* 0x000fc00000000000 */
/*00f0*/ NOP; /* 0x0000000000007918 */
/* 0x000fc00000000000 */
/*0100*/ NOP; /* 0x0000000000007918 */
/* 0x000fc00000000000 */
/*0110*/ NOP; /* 0x0000000000007918 */
/* 0x000fc00000000000 */
/*0120*/ NOP; /* 0x0000000000007918 */
/* 0x000fc00000000000 */
/*0130*/ NOP; /* 0x0000000000007918 */
/* 0x000fc00000000000 */
/*0140*/ NOP; /* 0x0000000000007918 */
/* 0x000fc00000000000 */
/*0150*/ NOP; /* 0x0000000000007918 */
/* 0x000fc00000000000 */
/*0160*/ NOP; /* 0x0000000000007918 */
/* 0x000fc00000000000 */
/*0170*/ NOP; /* 0x0000000000007918 */
/* 0x000fc00000000000 */
.......... |
You are a helpful coding assistant specialized in converting CUDA source code to CUDA host assembly. | #include "includes.h"
#define SIZ 20
#define num_inp 4
using namespace std;
typedef struct edge {
int first, second;
} edges;
__global__ void grads_w2_kernel(double * grads_W2,double * W2,double reg, int size)
{
int i = blockIdx.x;
int j = threadIdx.x;
grads_W2[i*size + j] += W2[i*size + j] * reg;
} | .file "tmpxft_0006539e_00000000-6_grads_w2_kernel.cudafe1.cpp"
.text
#APP
#NO_APP
.type _ZL26__cudaUnregisterBinaryUtilv, @function
_ZL26__cudaUnregisterBinaryUtilv:
.LFB2029:
.cfi_startproc
endbr64
subq $8, %rsp
.cfi_def_cfa_offset 16
movq _ZL20__cudaFatCubinHandle(%rip), %rdi
call __cudaUnregisterFatBinary@PLT
addq $8, %rsp
.cfi_def_cfa_offset 8
ret
.cfi_endproc
.LFE2029:
.size _ZL26__cudaUnregisterBinaryUtilv, .-_ZL26__cudaUnregisterBinaryUtilv
.globl _Z39__device_stub__Z15grads_w2_kernelPdS_diPdS_di
.type _Z39__device_stub__Z15grads_w2_kernelPdS_diPdS_di, @function
_Z39__device_stub__Z15grads_w2_kernelPdS_diPdS_di:
.LFB2051:
.cfi_startproc
endbr64
subq $152, %rsp
.cfi_def_cfa_offset 160
movq %rdi, 24(%rsp)
movq %rsi, 16(%rsp)
movsd %xmm0, 8(%rsp)
movl %edx, 4(%rsp)
movq %fs:40, %rax
movq %rax, 136(%rsp)
xorl %eax, %eax
leaq 24(%rsp), %rax
movq %rax, 96(%rsp)
leaq 16(%rsp), %rax
movq %rax, 104(%rsp)
leaq 8(%rsp), %rax
movq %rax, 112(%rsp)
leaq 4(%rsp), %rax
movq %rax, 120(%rsp)
movl $1, 48(%rsp)
movl $1, 52(%rsp)
movl $1, 56(%rsp)
movl $1, 60(%rsp)
movl $1, 64(%rsp)
movl $1, 68(%rsp)
leaq 40(%rsp), %rcx
leaq 32(%rsp), %rdx
leaq 60(%rsp), %rsi
leaq 48(%rsp), %rdi
call __cudaPopCallConfiguration@PLT
testl %eax, %eax
je .L7
.L3:
movq 136(%rsp), %rax
subq %fs:40, %rax
jne .L8
addq $152, %rsp
.cfi_remember_state
.cfi_def_cfa_offset 8
ret
.L7:
.cfi_restore_state
pushq 40(%rsp)
.cfi_def_cfa_offset 168
pushq 40(%rsp)
.cfi_def_cfa_offset 176
leaq 112(%rsp), %r9
movq 76(%rsp), %rcx
movl 84(%rsp), %r8d
movq 64(%rsp), %rsi
movl 72(%rsp), %edx
leaq _Z15grads_w2_kernelPdS_di(%rip), %rdi
call cudaLaunchKernel@PLT
addq $16, %rsp
.cfi_def_cfa_offset 160
jmp .L3
.L8:
call __stack_chk_fail@PLT
.cfi_endproc
.LFE2051:
.size _Z39__device_stub__Z15grads_w2_kernelPdS_diPdS_di, .-_Z39__device_stub__Z15grads_w2_kernelPdS_diPdS_di
.globl _Z15grads_w2_kernelPdS_di
.type _Z15grads_w2_kernelPdS_di, @function
_Z15grads_w2_kernelPdS_di:
.LFB2052:
.cfi_startproc
endbr64
subq $8, %rsp
.cfi_def_cfa_offset 16
call _Z39__device_stub__Z15grads_w2_kernelPdS_diPdS_di
addq $8, %rsp
.cfi_def_cfa_offset 8
ret
.cfi_endproc
.LFE2052:
.size _Z15grads_w2_kernelPdS_di, .-_Z15grads_w2_kernelPdS_di
.section .rodata.str1.1,"aMS",@progbits,1
.LC0:
.string "_Z15grads_w2_kernelPdS_di"
.text
.type _ZL24__sti____cudaRegisterAllv, @function
_ZL24__sti____cudaRegisterAllv:
.LFB2054:
.cfi_startproc
endbr64
subq $8, %rsp
.cfi_def_cfa_offset 16
leaq _ZL15__fatDeviceText(%rip), %rdi
call __cudaRegisterFatBinary@PLT
movq %rax, %rdi
movq %rax, _ZL20__cudaFatCubinHandle(%rip)
pushq $0
.cfi_def_cfa_offset 24
pushq $0
.cfi_def_cfa_offset 32
pushq $0
.cfi_def_cfa_offset 40
pushq $0
.cfi_def_cfa_offset 48
movl $0, %r9d
movl $-1, %r8d
leaq .LC0(%rip), %rdx
movq %rdx, %rcx
leaq _Z15grads_w2_kernelPdS_di(%rip), %rsi
call __cudaRegisterFunction@PLT
addq $32, %rsp
.cfi_def_cfa_offset 16
movq _ZL20__cudaFatCubinHandle(%rip), %rdi
call __cudaRegisterFatBinaryEnd@PLT
leaq _ZL26__cudaUnregisterBinaryUtilv(%rip), %rdi
call atexit@PLT
addq $8, %rsp
.cfi_def_cfa_offset 8
ret
.cfi_endproc
.LFE2054:
.size _ZL24__sti____cudaRegisterAllv, .-_ZL24__sti____cudaRegisterAllv
.section .init_array,"aw"
.align 8
.quad _ZL24__sti____cudaRegisterAllv
.section .nvFatBinSegment,"aw"
.align 8
.type _ZL15__fatDeviceText, @object
.size _ZL15__fatDeviceText, 24
_ZL15__fatDeviceText:
.long 1180844977
.long 1
.quad fatbinData
.quad 0
.local _ZL20__cudaFatCubinHandle
.comm _ZL20__cudaFatCubinHandle,8,8
.ident "GCC: (Ubuntu 13.3.0-6ubuntu2~24.04) 13.3.0"
.section .note.GNU-stack,"",@progbits
.section .note.gnu.property,"a"
.align 8
.long 1f - 0f
.long 4f - 1f
.long 5
0:
.string "GNU"
1:
.align 8
.long 0xc0000002
.long 3f - 2f
2:
.long 0x3
3:
.align 8
4: |
You are a helpful coding assistant specialized in converting CUDA source code to HIP/AMD source code. | #include "includes.h"
#define SIZ 20
#define num_inp 4
using namespace std;
typedef struct edge {
int first, second;
} edges;
__global__ void grads_w2_kernel(double * grads_W2,double * W2,double reg, int size)
{
int i = blockIdx.x;
int j = threadIdx.x;
grads_W2[i*size + j] += W2[i*size + j] * reg;
} | #include <hip/hip_runtime.h>
#include "includes.h"
#define SIZ 20
#define num_inp 4
using namespace std;
typedef struct edge {
int first, second;
} edges;
__global__ void grads_w2_kernel(double * grads_W2,double * W2,double reg, int size)
{
int i = blockIdx.x;
int j = threadIdx.x;
grads_W2[i*size + j] += W2[i*size + j] * reg;
} |
You are a helpful coding assistant specialized in converting HIP source code to AMD device assembly. | #include <hip/hip_runtime.h>
#include "includes.h"
#define SIZ 20
#define num_inp 4
using namespace std;
typedef struct edge {
int first, second;
} edges;
__global__ void grads_w2_kernel(double * grads_W2,double * W2,double reg, int size)
{
int i = blockIdx.x;
int j = threadIdx.x;
grads_W2[i*size + j] += W2[i*size + j] * reg;
} | .text
.amdgcn_target "amdgcn-amd-amdhsa--gfx1100"
.protected _Z15grads_w2_kernelPdS_di
.globl _Z15grads_w2_kernelPdS_di
.p2align 8
.type _Z15grads_w2_kernelPdS_di,@function
_Z15grads_w2_kernelPdS_di:
s_clause 0x2
s_load_b32 s2, s[0:1], 0x18
s_load_b128 s[4:7], s[0:1], 0x0
s_load_b64 s[0:1], s[0:1], 0x10
s_waitcnt lgkmcnt(0)
v_mad_u64_u32 v[1:2], null, s15, s2, v[0:1]
s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
v_ashrrev_i32_e32 v2, 31, v1
v_lshlrev_b64 v[0:1], 3, v[1:2]
s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_2)
v_add_co_u32 v2, vcc_lo, s6, v0
v_add_co_ci_u32_e32 v3, vcc_lo, s7, v1, vcc_lo
v_add_co_u32 v0, vcc_lo, s4, v0
v_add_co_ci_u32_e32 v1, vcc_lo, s5, v1, vcc_lo
global_load_b64 v[2:3], v[2:3], off
global_load_b64 v[4:5], v[0:1], off
s_waitcnt vmcnt(0)
v_fma_f64 v[2:3], v[2:3], s[0:1], v[4:5]
global_store_b64 v[0:1], v[2:3], off
s_nop 0
s_sendmsg sendmsg(MSG_DEALLOC_VGPRS)
s_endpgm
.section .rodata,"a",@progbits
.p2align 6, 0x0
.amdhsa_kernel _Z15grads_w2_kernelPdS_di
.amdhsa_group_segment_fixed_size 0
.amdhsa_private_segment_fixed_size 0
.amdhsa_kernarg_size 28
.amdhsa_user_sgpr_count 15
.amdhsa_user_sgpr_dispatch_ptr 0
.amdhsa_user_sgpr_queue_ptr 0
.amdhsa_user_sgpr_kernarg_segment_ptr 1
.amdhsa_user_sgpr_dispatch_id 0
.amdhsa_user_sgpr_private_segment_size 0
.amdhsa_wavefront_size32 1
.amdhsa_uses_dynamic_stack 0
.amdhsa_enable_private_segment 0
.amdhsa_system_sgpr_workgroup_id_x 1
.amdhsa_system_sgpr_workgroup_id_y 0
.amdhsa_system_sgpr_workgroup_id_z 0
.amdhsa_system_sgpr_workgroup_info 0
.amdhsa_system_vgpr_workitem_id 0
.amdhsa_next_free_vgpr 6
.amdhsa_next_free_sgpr 16
.amdhsa_float_round_mode_32 0
.amdhsa_float_round_mode_16_64 0
.amdhsa_float_denorm_mode_32 3
.amdhsa_float_denorm_mode_16_64 3
.amdhsa_dx10_clamp 1
.amdhsa_ieee_mode 1
.amdhsa_fp16_overflow 0
.amdhsa_workgroup_processor_mode 1
.amdhsa_memory_ordered 1
.amdhsa_forward_progress 0
.amdhsa_shared_vgpr_count 0
.amdhsa_exception_fp_ieee_invalid_op 0
.amdhsa_exception_fp_denorm_src 0
.amdhsa_exception_fp_ieee_div_zero 0
.amdhsa_exception_fp_ieee_overflow 0
.amdhsa_exception_fp_ieee_underflow 0
.amdhsa_exception_fp_ieee_inexact 0
.amdhsa_exception_int_div_zero 0
.end_amdhsa_kernel
.text
.Lfunc_end0:
.size _Z15grads_w2_kernelPdS_di, .Lfunc_end0-_Z15grads_w2_kernelPdS_di
.section .AMDGPU.csdata,"",@progbits
.text
.p2alignl 7, 3214868480
.fill 96, 4, 3214868480
.type __hip_cuid_,@object
.section .bss,"aw",@nobits
.globl __hip_cuid_
__hip_cuid_:
.byte 0
.size __hip_cuid_, 1
.ident "AMD clang version 18.0.0git (https://github.com/RadeonOpenCompute/llvm-project roc-6.3.2 25012 e5bf7e55c91490b07c49d8960fa7983d864936c4)"
.section ".note.GNU-stack","",@progbits
.addrsig
.addrsig_sym __hip_cuid_
.amdgpu_metadata
---
amdhsa.kernels:
- .args:
- .address_space: global
.offset: 0
.size: 8
.value_kind: global_buffer
- .address_space: global
.offset: 8
.size: 8
.value_kind: global_buffer
- .offset: 16
.size: 8
.value_kind: by_value
- .offset: 24
.size: 4
.value_kind: by_value
.group_segment_fixed_size: 0
.kernarg_segment_align: 8
.kernarg_segment_size: 28
.language: OpenCL C
.language_version:
- 2
- 0
.max_flat_workgroup_size: 1024
.name: _Z15grads_w2_kernelPdS_di
.private_segment_fixed_size: 0
.sgpr_count: 18
.sgpr_spill_count: 0
.symbol: _Z15grads_w2_kernelPdS_di.kd
.uniform_work_group_size: 1
.uses_dynamic_stack: false
.vgpr_count: 6
.vgpr_spill_count: 0
.wavefront_size: 32
.workgroup_processor_mode: 1
amdhsa.target: amdgcn-amd-amdhsa--gfx1100
amdhsa.version:
- 1
- 2
...
.end_amdgpu_metadata |
You are a helpful coding assistant specialized in converting HIP source code to AMD host assembly. | #include <hip/hip_runtime.h>
#include "includes.h"
#define SIZ 20
#define num_inp 4
using namespace std;
typedef struct edge {
int first, second;
} edges;
__global__ void grads_w2_kernel(double * grads_W2,double * W2,double reg, int size)
{
int i = blockIdx.x;
int j = threadIdx.x;
grads_W2[i*size + j] += W2[i*size + j] * reg;
} | .text
.file "grads_w2_kernel.hip"
.globl _Z30__device_stub__grads_w2_kernelPdS_di # -- Begin function _Z30__device_stub__grads_w2_kernelPdS_di
.p2align 4, 0x90
.type _Z30__device_stub__grads_w2_kernelPdS_di,@function
_Z30__device_stub__grads_w2_kernelPdS_di: # @_Z30__device_stub__grads_w2_kernelPdS_di
.cfi_startproc
# %bb.0:
subq $120, %rsp
.cfi_def_cfa_offset 128
movq %rdi, 72(%rsp)
movq %rsi, 64(%rsp)
movsd %xmm0, 56(%rsp)
movl %edx, 4(%rsp)
leaq 72(%rsp), %rax
movq %rax, 80(%rsp)
leaq 64(%rsp), %rax
movq %rax, 88(%rsp)
leaq 56(%rsp), %rax
movq %rax, 96(%rsp)
leaq 4(%rsp), %rax
movq %rax, 104(%rsp)
leaq 40(%rsp), %rdi
leaq 24(%rsp), %rsi
leaq 16(%rsp), %rdx
leaq 8(%rsp), %rcx
callq __hipPopCallConfiguration
movq 40(%rsp), %rsi
movl 48(%rsp), %edx
movq 24(%rsp), %rcx
movl 32(%rsp), %r8d
leaq 80(%rsp), %r9
movl $_Z15grads_w2_kernelPdS_di, %edi
pushq 8(%rsp)
.cfi_adjust_cfa_offset 8
pushq 24(%rsp)
.cfi_adjust_cfa_offset 8
callq hipLaunchKernel
addq $136, %rsp
.cfi_adjust_cfa_offset -136
retq
.Lfunc_end0:
.size _Z30__device_stub__grads_w2_kernelPdS_di, .Lfunc_end0-_Z30__device_stub__grads_w2_kernelPdS_di
.cfi_endproc
# -- End function
.p2align 4, 0x90 # -- Begin function __hip_module_ctor
.type __hip_module_ctor,@function
__hip_module_ctor: # @__hip_module_ctor
.cfi_startproc
# %bb.0:
subq $40, %rsp
.cfi_def_cfa_offset 48
cmpq $0, __hip_gpubin_handle(%rip)
jne .LBB1_2
# %bb.1:
movl $__hip_fatbin_wrapper, %edi
callq __hipRegisterFatBinary
movq %rax, __hip_gpubin_handle(%rip)
.LBB1_2:
movq __hip_gpubin_handle(%rip), %rdi
xorps %xmm0, %xmm0
movups %xmm0, 16(%rsp)
movups %xmm0, (%rsp)
movl $_Z15grads_w2_kernelPdS_di, %esi
movl $.L__unnamed_1, %edx
movl $.L__unnamed_1, %ecx
movl $-1, %r8d
xorl %r9d, %r9d
callq __hipRegisterFunction
movl $__hip_module_dtor, %edi
addq $40, %rsp
.cfi_def_cfa_offset 8
jmp atexit # TAILCALL
.Lfunc_end1:
.size __hip_module_ctor, .Lfunc_end1-__hip_module_ctor
.cfi_endproc
# -- End function
.p2align 4, 0x90 # -- Begin function __hip_module_dtor
.type __hip_module_dtor,@function
__hip_module_dtor: # @__hip_module_dtor
.cfi_startproc
# %bb.0:
movq __hip_gpubin_handle(%rip), %rdi
testq %rdi, %rdi
je .LBB2_2
# %bb.1:
pushq %rax
.cfi_def_cfa_offset 16
callq __hipUnregisterFatBinary
movq $0, __hip_gpubin_handle(%rip)
addq $8, %rsp
.cfi_def_cfa_offset 8
.LBB2_2:
retq
.Lfunc_end2:
.size __hip_module_dtor, .Lfunc_end2-__hip_module_dtor
.cfi_endproc
# -- End function
.type _Z15grads_w2_kernelPdS_di,@object # @_Z15grads_w2_kernelPdS_di
.section .rodata,"a",@progbits
.globl _Z15grads_w2_kernelPdS_di
.p2align 3, 0x0
_Z15grads_w2_kernelPdS_di:
.quad _Z30__device_stub__grads_w2_kernelPdS_di
.size _Z15grads_w2_kernelPdS_di, 8
.type .L__unnamed_1,@object # @0
.section .rodata.str1.1,"aMS",@progbits,1
.L__unnamed_1:
.asciz "_Z15grads_w2_kernelPdS_di"
.size .L__unnamed_1, 26
.type __hip_fatbin_wrapper,@object # @__hip_fatbin_wrapper
.section .hipFatBinSegment,"a",@progbits
.p2align 3, 0x0
__hip_fatbin_wrapper:
.long 1212764230 # 0x48495046
.long 1 # 0x1
.quad __hip_fatbin
.quad 0
.size __hip_fatbin_wrapper, 24
.type __hip_gpubin_handle,@object # @__hip_gpubin_handle
.local __hip_gpubin_handle
.comm __hip_gpubin_handle,8,8
.section .init_array,"aw",@init_array
.p2align 3, 0x0
.quad __hip_module_ctor
.type __hip_cuid_,@object # @__hip_cuid_
.bss
.globl __hip_cuid_
__hip_cuid_:
.byte 0 # 0x0
.size __hip_cuid_, 1
.section ".linker-options","e",@llvm_linker_options
.ident "AMD clang version 18.0.0git (https://github.com/RadeonOpenCompute/llvm-project roc-6.3.2 25012 e5bf7e55c91490b07c49d8960fa7983d864936c4)"
.section ".note.GNU-stack","",@progbits
.addrsig
.addrsig_sym _Z30__device_stub__grads_w2_kernelPdS_di
.addrsig_sym __hip_module_ctor
.addrsig_sym __hip_module_dtor
.addrsig_sym _Z15grads_w2_kernelPdS_di
.addrsig_sym __hip_fatbin
.addrsig_sym __hip_fatbin_wrapper
.addrsig_sym __hip_cuid_ |
You are a helpful coding assistant specialized in converting from CUDA device assembly to AMD device assembly. | code for sm_80
Function : _Z15grads_w2_kernelPdS_di
.headerflags @"EF_CUDA_TEXMODE_UNIFIED EF_CUDA_64BIT_ADDRESS EF_CUDA_SM80 EF_CUDA_VIRTUAL_SM(EF_CUDA_SM80)"
/*0000*/ MOV R1, c[0x0][0x28] ; /* 0x00000a0000017a02 */
/* 0x000fe40000000f00 */
/*0010*/ S2R R4, SR_CTAID.X ; /* 0x0000000000047919 */
/* 0x000e220000002500 */
/*0020*/ HFMA2.MMA R5, -RZ, RZ, 0, 4.76837158203125e-07 ; /* 0x00000008ff057435 */
/* 0x000fe200000001ff */
/*0030*/ ULDC.64 UR4, c[0x0][0x118] ; /* 0x0000460000047ab9 */
/* 0x000fe40000000a00 */
/*0040*/ S2R R3, SR_TID.X ; /* 0x0000000000037919 */
/* 0x000e240000002100 */
/*0050*/ IMAD R4, R4, c[0x0][0x178], R3 ; /* 0x00005e0004047a24 */
/* 0x001fca00078e0203 */
/*0060*/ IMAD.WIDE R2, R4, R5, c[0x0][0x168] ; /* 0x00005a0004027625 */
/* 0x000fc800078e0205 */
/*0070*/ IMAD.WIDE R4, R4, R5, c[0x0][0x160] ; /* 0x0000580004047625 */
/* 0x000fe400078e0205 */
/*0080*/ LDG.E.64 R2, [R2.64] ; /* 0x0000000402027981 */
/* 0x000ea8000c1e1b00 */
/*0090*/ LDG.E.64 R6, [R4.64] ; /* 0x0000000404067981 */
/* 0x000ea4000c1e1b00 */
/*00a0*/ DFMA R6, R2, c[0x0][0x170], R6 ; /* 0x00005c0002067a2b */
/* 0x004e0e0000000006 */
/*00b0*/ STG.E.64 [R4.64], R6 ; /* 0x0000000604007986 */
/* 0x001fe2000c101b04 */
/*00c0*/ EXIT ; /* 0x000000000000794d */
/* 0x000fea0003800000 */
/*00d0*/ BRA 0xd0; /* 0xfffffff000007947 */
/* 0x000fc0000383ffff */
/*00e0*/ NOP; /* 0x0000000000007918 */
/* 0x000fc00000000000 */
/*00f0*/ NOP; /* 0x0000000000007918 */
/* 0x000fc00000000000 */
/*0100*/ NOP; /* 0x0000000000007918 */
/* 0x000fc00000000000 */
/*0110*/ NOP; /* 0x0000000000007918 */
/* 0x000fc00000000000 */
/*0120*/ NOP; /* 0x0000000000007918 */
/* 0x000fc00000000000 */
/*0130*/ NOP; /* 0x0000000000007918 */
/* 0x000fc00000000000 */
/*0140*/ NOP; /* 0x0000000000007918 */
/* 0x000fc00000000000 */
/*0150*/ NOP; /* 0x0000000000007918 */
/* 0x000fc00000000000 */
/*0160*/ NOP; /* 0x0000000000007918 */
/* 0x000fc00000000000 */
/*0170*/ NOP; /* 0x0000000000007918 */
/* 0x000fc00000000000 */
.......... | .text
.amdgcn_target "amdgcn-amd-amdhsa--gfx1100"
.protected _Z15grads_w2_kernelPdS_di
.globl _Z15grads_w2_kernelPdS_di
.p2align 8
.type _Z15grads_w2_kernelPdS_di,@function
_Z15grads_w2_kernelPdS_di:
s_clause 0x2
s_load_b32 s2, s[0:1], 0x18
s_load_b128 s[4:7], s[0:1], 0x0
s_load_b64 s[0:1], s[0:1], 0x10
s_waitcnt lgkmcnt(0)
v_mad_u64_u32 v[1:2], null, s15, s2, v[0:1]
s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
v_ashrrev_i32_e32 v2, 31, v1
v_lshlrev_b64 v[0:1], 3, v[1:2]
s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_2)
v_add_co_u32 v2, vcc_lo, s6, v0
v_add_co_ci_u32_e32 v3, vcc_lo, s7, v1, vcc_lo
v_add_co_u32 v0, vcc_lo, s4, v0
v_add_co_ci_u32_e32 v1, vcc_lo, s5, v1, vcc_lo
global_load_b64 v[2:3], v[2:3], off
global_load_b64 v[4:5], v[0:1], off
s_waitcnt vmcnt(0)
v_fma_f64 v[2:3], v[2:3], s[0:1], v[4:5]
global_store_b64 v[0:1], v[2:3], off
s_nop 0
s_sendmsg sendmsg(MSG_DEALLOC_VGPRS)
s_endpgm
.section .rodata,"a",@progbits
.p2align 6, 0x0
.amdhsa_kernel _Z15grads_w2_kernelPdS_di
.amdhsa_group_segment_fixed_size 0
.amdhsa_private_segment_fixed_size 0
.amdhsa_kernarg_size 28
.amdhsa_user_sgpr_count 15
.amdhsa_user_sgpr_dispatch_ptr 0
.amdhsa_user_sgpr_queue_ptr 0
.amdhsa_user_sgpr_kernarg_segment_ptr 1
.amdhsa_user_sgpr_dispatch_id 0
.amdhsa_user_sgpr_private_segment_size 0
.amdhsa_wavefront_size32 1
.amdhsa_uses_dynamic_stack 0
.amdhsa_enable_private_segment 0
.amdhsa_system_sgpr_workgroup_id_x 1
.amdhsa_system_sgpr_workgroup_id_y 0
.amdhsa_system_sgpr_workgroup_id_z 0
.amdhsa_system_sgpr_workgroup_info 0
.amdhsa_system_vgpr_workitem_id 0
.amdhsa_next_free_vgpr 6
.amdhsa_next_free_sgpr 16
.amdhsa_float_round_mode_32 0
.amdhsa_float_round_mode_16_64 0
.amdhsa_float_denorm_mode_32 3
.amdhsa_float_denorm_mode_16_64 3
.amdhsa_dx10_clamp 1
.amdhsa_ieee_mode 1
.amdhsa_fp16_overflow 0
.amdhsa_workgroup_processor_mode 1
.amdhsa_memory_ordered 1
.amdhsa_forward_progress 0
.amdhsa_shared_vgpr_count 0
.amdhsa_exception_fp_ieee_invalid_op 0
.amdhsa_exception_fp_denorm_src 0
.amdhsa_exception_fp_ieee_div_zero 0
.amdhsa_exception_fp_ieee_overflow 0
.amdhsa_exception_fp_ieee_underflow 0
.amdhsa_exception_fp_ieee_inexact 0
.amdhsa_exception_int_div_zero 0
.end_amdhsa_kernel
.text
.Lfunc_end0:
.size _Z15grads_w2_kernelPdS_di, .Lfunc_end0-_Z15grads_w2_kernelPdS_di
.section .AMDGPU.csdata,"",@progbits
.text
.p2alignl 7, 3214868480
.fill 96, 4, 3214868480
.type __hip_cuid_,@object
.section .bss,"aw",@nobits
.globl __hip_cuid_
__hip_cuid_:
.byte 0
.size __hip_cuid_, 1
.ident "AMD clang version 18.0.0git (https://github.com/RadeonOpenCompute/llvm-project roc-6.3.2 25012 e5bf7e55c91490b07c49d8960fa7983d864936c4)"
.section ".note.GNU-stack","",@progbits
.addrsig
.addrsig_sym __hip_cuid_
.amdgpu_metadata
---
amdhsa.kernels:
- .args:
- .address_space: global
.offset: 0
.size: 8
.value_kind: global_buffer
- .address_space: global
.offset: 8
.size: 8
.value_kind: global_buffer
- .offset: 16
.size: 8
.value_kind: by_value
- .offset: 24
.size: 4
.value_kind: by_value
.group_segment_fixed_size: 0
.kernarg_segment_align: 8
.kernarg_segment_size: 28
.language: OpenCL C
.language_version:
- 2
- 0
.max_flat_workgroup_size: 1024
.name: _Z15grads_w2_kernelPdS_di
.private_segment_fixed_size: 0
.sgpr_count: 18
.sgpr_spill_count: 0
.symbol: _Z15grads_w2_kernelPdS_di.kd
.uniform_work_group_size: 1
.uses_dynamic_stack: false
.vgpr_count: 6
.vgpr_spill_count: 0
.wavefront_size: 32
.workgroup_processor_mode: 1
amdhsa.target: amdgcn-amd-amdhsa--gfx1100
amdhsa.version:
- 1
- 2
...
.end_amdgpu_metadata |
You are a helpful coding assistant specialized in converting from CUDA host assembly to AMD host assembly. | .file "tmpxft_0006539e_00000000-6_grads_w2_kernel.cudafe1.cpp"
.text
#APP
#NO_APP
.type _ZL26__cudaUnregisterBinaryUtilv, @function
_ZL26__cudaUnregisterBinaryUtilv:
.LFB2029:
.cfi_startproc
endbr64
subq $8, %rsp
.cfi_def_cfa_offset 16
movq _ZL20__cudaFatCubinHandle(%rip), %rdi
call __cudaUnregisterFatBinary@PLT
addq $8, %rsp
.cfi_def_cfa_offset 8
ret
.cfi_endproc
.LFE2029:
.size _ZL26__cudaUnregisterBinaryUtilv, .-_ZL26__cudaUnregisterBinaryUtilv
.globl _Z39__device_stub__Z15grads_w2_kernelPdS_diPdS_di
.type _Z39__device_stub__Z15grads_w2_kernelPdS_diPdS_di, @function
_Z39__device_stub__Z15grads_w2_kernelPdS_diPdS_di:
.LFB2051:
.cfi_startproc
endbr64
subq $152, %rsp
.cfi_def_cfa_offset 160
movq %rdi, 24(%rsp)
movq %rsi, 16(%rsp)
movsd %xmm0, 8(%rsp)
movl %edx, 4(%rsp)
movq %fs:40, %rax
movq %rax, 136(%rsp)
xorl %eax, %eax
leaq 24(%rsp), %rax
movq %rax, 96(%rsp)
leaq 16(%rsp), %rax
movq %rax, 104(%rsp)
leaq 8(%rsp), %rax
movq %rax, 112(%rsp)
leaq 4(%rsp), %rax
movq %rax, 120(%rsp)
movl $1, 48(%rsp)
movl $1, 52(%rsp)
movl $1, 56(%rsp)
movl $1, 60(%rsp)
movl $1, 64(%rsp)
movl $1, 68(%rsp)
leaq 40(%rsp), %rcx
leaq 32(%rsp), %rdx
leaq 60(%rsp), %rsi
leaq 48(%rsp), %rdi
call __cudaPopCallConfiguration@PLT
testl %eax, %eax
je .L7
.L3:
movq 136(%rsp), %rax
subq %fs:40, %rax
jne .L8
addq $152, %rsp
.cfi_remember_state
.cfi_def_cfa_offset 8
ret
.L7:
.cfi_restore_state
pushq 40(%rsp)
.cfi_def_cfa_offset 168
pushq 40(%rsp)
.cfi_def_cfa_offset 176
leaq 112(%rsp), %r9
movq 76(%rsp), %rcx
movl 84(%rsp), %r8d
movq 64(%rsp), %rsi
movl 72(%rsp), %edx
leaq _Z15grads_w2_kernelPdS_di(%rip), %rdi
call cudaLaunchKernel@PLT
addq $16, %rsp
.cfi_def_cfa_offset 160
jmp .L3
.L8:
call __stack_chk_fail@PLT
.cfi_endproc
.LFE2051:
.size _Z39__device_stub__Z15grads_w2_kernelPdS_diPdS_di, .-_Z39__device_stub__Z15grads_w2_kernelPdS_diPdS_di
.globl _Z15grads_w2_kernelPdS_di
.type _Z15grads_w2_kernelPdS_di, @function
_Z15grads_w2_kernelPdS_di:
.LFB2052:
.cfi_startproc
endbr64
subq $8, %rsp
.cfi_def_cfa_offset 16
call _Z39__device_stub__Z15grads_w2_kernelPdS_diPdS_di
addq $8, %rsp
.cfi_def_cfa_offset 8
ret
.cfi_endproc
.LFE2052:
.size _Z15grads_w2_kernelPdS_di, .-_Z15grads_w2_kernelPdS_di
.section .rodata.str1.1,"aMS",@progbits,1
.LC0:
.string "_Z15grads_w2_kernelPdS_di"
.text
.type _ZL24__sti____cudaRegisterAllv, @function
_ZL24__sti____cudaRegisterAllv:
.LFB2054:
.cfi_startproc
endbr64
subq $8, %rsp
.cfi_def_cfa_offset 16
leaq _ZL15__fatDeviceText(%rip), %rdi
call __cudaRegisterFatBinary@PLT
movq %rax, %rdi
movq %rax, _ZL20__cudaFatCubinHandle(%rip)
pushq $0
.cfi_def_cfa_offset 24
pushq $0
.cfi_def_cfa_offset 32
pushq $0
.cfi_def_cfa_offset 40
pushq $0
.cfi_def_cfa_offset 48
movl $0, %r9d
movl $-1, %r8d
leaq .LC0(%rip), %rdx
movq %rdx, %rcx
leaq _Z15grads_w2_kernelPdS_di(%rip), %rsi
call __cudaRegisterFunction@PLT
addq $32, %rsp
.cfi_def_cfa_offset 16
movq _ZL20__cudaFatCubinHandle(%rip), %rdi
call __cudaRegisterFatBinaryEnd@PLT
leaq _ZL26__cudaUnregisterBinaryUtilv(%rip), %rdi
call atexit@PLT
addq $8, %rsp
.cfi_def_cfa_offset 8
ret
.cfi_endproc
.LFE2054:
.size _ZL24__sti____cudaRegisterAllv, .-_ZL24__sti____cudaRegisterAllv
.section .init_array,"aw"
.align 8
.quad _ZL24__sti____cudaRegisterAllv
.section .nvFatBinSegment,"aw"
.align 8
.type _ZL15__fatDeviceText, @object
.size _ZL15__fatDeviceText, 24
_ZL15__fatDeviceText:
.long 1180844977
.long 1
.quad fatbinData
.quad 0
.local _ZL20__cudaFatCubinHandle
.comm _ZL20__cudaFatCubinHandle,8,8
.ident "GCC: (Ubuntu 13.3.0-6ubuntu2~24.04) 13.3.0"
.section .note.GNU-stack,"",@progbits
.section .note.gnu.property,"a"
.align 8
.long 1f - 0f
.long 4f - 1f
.long 5
0:
.string "GNU"
1:
.align 8
.long 0xc0000002
.long 3f - 2f
2:
.long 0x3
3:
.align 8
4: | .text
.file "grads_w2_kernel.hip"
.globl _Z30__device_stub__grads_w2_kernelPdS_di # -- Begin function _Z30__device_stub__grads_w2_kernelPdS_di
.p2align 4, 0x90
.type _Z30__device_stub__grads_w2_kernelPdS_di,@function
_Z30__device_stub__grads_w2_kernelPdS_di: # @_Z30__device_stub__grads_w2_kernelPdS_di
.cfi_startproc
# %bb.0:
subq $120, %rsp
.cfi_def_cfa_offset 128
movq %rdi, 72(%rsp)
movq %rsi, 64(%rsp)
movsd %xmm0, 56(%rsp)
movl %edx, 4(%rsp)
leaq 72(%rsp), %rax
movq %rax, 80(%rsp)
leaq 64(%rsp), %rax
movq %rax, 88(%rsp)
leaq 56(%rsp), %rax
movq %rax, 96(%rsp)
leaq 4(%rsp), %rax
movq %rax, 104(%rsp)
leaq 40(%rsp), %rdi
leaq 24(%rsp), %rsi
leaq 16(%rsp), %rdx
leaq 8(%rsp), %rcx
callq __hipPopCallConfiguration
movq 40(%rsp), %rsi
movl 48(%rsp), %edx
movq 24(%rsp), %rcx
movl 32(%rsp), %r8d
leaq 80(%rsp), %r9
movl $_Z15grads_w2_kernelPdS_di, %edi
pushq 8(%rsp)
.cfi_adjust_cfa_offset 8
pushq 24(%rsp)
.cfi_adjust_cfa_offset 8
callq hipLaunchKernel
addq $136, %rsp
.cfi_adjust_cfa_offset -136
retq
.Lfunc_end0:
.size _Z30__device_stub__grads_w2_kernelPdS_di, .Lfunc_end0-_Z30__device_stub__grads_w2_kernelPdS_di
.cfi_endproc
# -- End function
.p2align 4, 0x90 # -- Begin function __hip_module_ctor
.type __hip_module_ctor,@function
__hip_module_ctor: # @__hip_module_ctor
.cfi_startproc
# %bb.0:
subq $40, %rsp
.cfi_def_cfa_offset 48
cmpq $0, __hip_gpubin_handle(%rip)
jne .LBB1_2
# %bb.1:
movl $__hip_fatbin_wrapper, %edi
callq __hipRegisterFatBinary
movq %rax, __hip_gpubin_handle(%rip)
.LBB1_2:
movq __hip_gpubin_handle(%rip), %rdi
xorps %xmm0, %xmm0
movups %xmm0, 16(%rsp)
movups %xmm0, (%rsp)
movl $_Z15grads_w2_kernelPdS_di, %esi
movl $.L__unnamed_1, %edx
movl $.L__unnamed_1, %ecx
movl $-1, %r8d
xorl %r9d, %r9d
callq __hipRegisterFunction
movl $__hip_module_dtor, %edi
addq $40, %rsp
.cfi_def_cfa_offset 8
jmp atexit # TAILCALL
.Lfunc_end1:
.size __hip_module_ctor, .Lfunc_end1-__hip_module_ctor
.cfi_endproc
# -- End function
.p2align 4, 0x90 # -- Begin function __hip_module_dtor
.type __hip_module_dtor,@function
__hip_module_dtor: # @__hip_module_dtor
.cfi_startproc
# %bb.0:
movq __hip_gpubin_handle(%rip), %rdi
testq %rdi, %rdi
je .LBB2_2
# %bb.1:
pushq %rax
.cfi_def_cfa_offset 16
callq __hipUnregisterFatBinary
movq $0, __hip_gpubin_handle(%rip)
addq $8, %rsp
.cfi_def_cfa_offset 8
.LBB2_2:
retq
.Lfunc_end2:
.size __hip_module_dtor, .Lfunc_end2-__hip_module_dtor
.cfi_endproc
# -- End function
.type _Z15grads_w2_kernelPdS_di,@object # @_Z15grads_w2_kernelPdS_di
.section .rodata,"a",@progbits
.globl _Z15grads_w2_kernelPdS_di
.p2align 3, 0x0
_Z15grads_w2_kernelPdS_di:
.quad _Z30__device_stub__grads_w2_kernelPdS_di
.size _Z15grads_w2_kernelPdS_di, 8
.type .L__unnamed_1,@object # @0
.section .rodata.str1.1,"aMS",@progbits,1
.L__unnamed_1:
.asciz "_Z15grads_w2_kernelPdS_di"
.size .L__unnamed_1, 26
.type __hip_fatbin_wrapper,@object # @__hip_fatbin_wrapper
.section .hipFatBinSegment,"a",@progbits
.p2align 3, 0x0
__hip_fatbin_wrapper:
.long 1212764230 # 0x48495046
.long 1 # 0x1
.quad __hip_fatbin
.quad 0
.size __hip_fatbin_wrapper, 24
.type __hip_gpubin_handle,@object # @__hip_gpubin_handle
.local __hip_gpubin_handle
.comm __hip_gpubin_handle,8,8
.section .init_array,"aw",@init_array
.p2align 3, 0x0
.quad __hip_module_ctor
.type __hip_cuid_,@object # @__hip_cuid_
.bss
.globl __hip_cuid_
__hip_cuid_:
.byte 0 # 0x0
.size __hip_cuid_, 1
.section ".linker-options","e",@llvm_linker_options
.ident "AMD clang version 18.0.0git (https://github.com/RadeonOpenCompute/llvm-project roc-6.3.2 25012 e5bf7e55c91490b07c49d8960fa7983d864936c4)"
.section ".note.GNU-stack","",@progbits
.addrsig
.addrsig_sym _Z30__device_stub__grads_w2_kernelPdS_di
.addrsig_sym __hip_module_ctor
.addrsig_sym __hip_module_dtor
.addrsig_sym _Z15grads_w2_kernelPdS_di
.addrsig_sym __hip_fatbin
.addrsig_sym __hip_fatbin_wrapper
.addrsig_sym __hip_cuid_ |
You are a helpful coding assistant specialized in converting CUDA source code to CUDA host assembly. | /*
* This program uses the device CURAND API to calculate what
* proportion of pseudo-random ints have low bit set.
* It then generates uniform results to calculate how many
* are greater than .5.
* It then generates normal results to calculate how many
* are within one standard deviation of the mean.
*/
#include <stdio.h>
#include <stdlib.h>
#include <cuda.h>
#include <curand_kernel.h>
#define THREADS_PER_BLOCK 64
#define BLOCKS 64
#define SIMULTANEOUS_THREADS (THREADS_PER_BLOCK * BLOCKS)
#define RANDOMS_PER_ITERATION 10000
#define KERNEL_ITERATIONS 50
#define CUDA_CALL(x) do { if((x) != cudaSuccess) { \
printf("Error at %s:%d\n",__FILE__,__LINE__); \
return EXIT_FAILURE;}} while(0)
__global__ void setup_kernel(curandState *state)
{
int id = threadIdx.x + blockIdx.x * THREADS_PER_BLOCK;
/* Each thread gets same seed, a different sequence
number, no offset */
curand_init(1234, id, 0, &state[id]);
}
__global__ void generate_kernel(curandState *state,
unsigned int *result)
{
int id = threadIdx.x + blockIdx.x * THREADS_PER_BLOCK;
int count = 0;
unsigned int x;
/* Copy state to local memory for efficiency */
curandState localState = state[id];
/* Generate pseudo-random unsigned ints */
for(int n = 0; n < RANDOMS_PER_ITERATION; n++) {
x = curand(&localState);
/* Check if low bit set */
if(x & 1) {
count++;
}
}
/* Copy state back to global memory */
state[id] = localState;
/* Store results */
result[id] += count;
}
int main(int argc, char *argv[])
{
int i;
unsigned int total;
curandState *devStates;
unsigned int *devResults, *hostResults;
/* Allocate space for results on host */
hostResults = (unsigned int *)calloc(SIMULTANEOUS_THREADS, sizeof(unsigned int));
/* Allocate space for results on device */
CUDA_CALL(cudaMalloc((void **)&devResults, SIMULTANEOUS_THREADS *
sizeof(unsigned int)));
/* Set results to 0 */
CUDA_CALL(cudaMemset(devResults, 0, SIMULTANEOUS_THREADS *
sizeof(unsigned int)));
/* Allocate space for prng states on device */
CUDA_CALL(cudaMalloc((void **)&devStates, SIMULTANEOUS_THREADS *
sizeof(curandState)));
// Set up RNG state objects.
setup_kernel<<<BLOCKS, THREADS_PER_BLOCK>>>(devStates);
// Generate a ton of random numbers across 50 passes.
for(i = 0; i < KERNEL_ITERATIONS; i++) {
generate_kernel<<<BLOCKS, THREADS_PER_BLOCK>>>(devStates, devResults);
}
// Copy device memory to host.
CUDA_CALL(cudaMemcpy(hostResults, devResults, SIMULTANEOUS_THREADS *
sizeof(unsigned int), cudaMemcpyDeviceToHost));
// Show result.
total = 0;
for(i = 0; i < SIMULTANEOUS_THREADS; i++) {
total += hostResults[i];
}
printf("Fraction with low bit set was %10.13f\n",
(float)total / (1.0f * SIMULTANEOUS_THREADS * RANDOMS_PER_ITERATION * KERNEL_ITERATIONS));
/* Cleanup */
CUDA_CALL(cudaFree(devStates));
CUDA_CALL(cudaFree(devResults));
free(hostResults);
printf("^^^^ kernel_example PASSED\n");
return EXIT_SUCCESS;
} | .file "tmpxft_0010b8b5_00000000-6_example.cudafe1.cpp"
.text
#APP
#NO_APP
.type _ZL26__cudaUnregisterBinaryUtilv, @function
_ZL26__cudaUnregisterBinaryUtilv:
.LFB2274:
.cfi_startproc
endbr64
subq $8, %rsp
.cfi_def_cfa_offset 16
movq _ZL20__cudaFatCubinHandle(%rip), %rdi
call __cudaUnregisterFatBinary@PLT
addq $8, %rsp
.cfi_def_cfa_offset 8
ret
.cfi_endproc
.LFE2274:
.size _ZL26__cudaUnregisterBinaryUtilv, .-_ZL26__cudaUnregisterBinaryUtilv
.globl _Z50__device_stub__Z12setup_kernelP17curandStateXORWOWP17curandStateXORWOW
.type _Z50__device_stub__Z12setup_kernelP17curandStateXORWOWP17curandStateXORWOW, @function
_Z50__device_stub__Z12setup_kernelP17curandStateXORWOWP17curandStateXORWOW:
.LFB2296:
.cfi_startproc
endbr64
subq $104, %rsp
.cfi_def_cfa_offset 112
movq %rdi, 8(%rsp)
movq %fs:40, %rax
movq %rax, 88(%rsp)
xorl %eax, %eax
leaq 8(%rsp), %rax
movq %rax, 80(%rsp)
movl $1, 32(%rsp)
movl $1, 36(%rsp)
movl $1, 40(%rsp)
movl $1, 44(%rsp)
movl $1, 48(%rsp)
movl $1, 52(%rsp)
leaq 24(%rsp), %rcx
leaq 16(%rsp), %rdx
leaq 44(%rsp), %rsi
leaq 32(%rsp), %rdi
call __cudaPopCallConfiguration@PLT
testl %eax, %eax
je .L7
.L3:
movq 88(%rsp), %rax
subq %fs:40, %rax
jne .L8
addq $104, %rsp
.cfi_remember_state
.cfi_def_cfa_offset 8
ret
.L7:
.cfi_restore_state
pushq 24(%rsp)
.cfi_def_cfa_offset 120
pushq 24(%rsp)
.cfi_def_cfa_offset 128
leaq 96(%rsp), %r9
movq 60(%rsp), %rcx
movl 68(%rsp), %r8d
movq 48(%rsp), %rsi
movl 56(%rsp), %edx
leaq _Z12setup_kernelP17curandStateXORWOW(%rip), %rdi
call cudaLaunchKernel@PLT
addq $16, %rsp
.cfi_def_cfa_offset 112
jmp .L3
.L8:
call __stack_chk_fail@PLT
.cfi_endproc
.LFE2296:
.size _Z50__device_stub__Z12setup_kernelP17curandStateXORWOWP17curandStateXORWOW, .-_Z50__device_stub__Z12setup_kernelP17curandStateXORWOWP17curandStateXORWOW
.globl _Z12setup_kernelP17curandStateXORWOW
.type _Z12setup_kernelP17curandStateXORWOW, @function
_Z12setup_kernelP17curandStateXORWOW:
.LFB2297:
.cfi_startproc
endbr64
subq $8, %rsp
.cfi_def_cfa_offset 16
call _Z50__device_stub__Z12setup_kernelP17curandStateXORWOWP17curandStateXORWOW
addq $8, %rsp
.cfi_def_cfa_offset 8
ret
.cfi_endproc
.LFE2297:
.size _Z12setup_kernelP17curandStateXORWOW, .-_Z12setup_kernelP17curandStateXORWOW
.globl _Z55__device_stub__Z15generate_kernelP17curandStateXORWOWPjP17curandStateXORWOWPj
.type _Z55__device_stub__Z15generate_kernelP17curandStateXORWOWPjP17curandStateXORWOWPj, @function
_Z55__device_stub__Z15generate_kernelP17curandStateXORWOWPjP17curandStateXORWOWPj:
.LFB2298:
.cfi_startproc
endbr64
subq $120, %rsp
.cfi_def_cfa_offset 128
movq %rdi, 8(%rsp)
movq %rsi, (%rsp)
movq %fs:40, %rax
movq %rax, 104(%rsp)
xorl %eax, %eax
leaq 8(%rsp), %rax
movq %rax, 80(%rsp)
movq %rsp, %rax
movq %rax, 88(%rsp)
movl $1, 32(%rsp)
movl $1, 36(%rsp)
movl $1, 40(%rsp)
movl $1, 44(%rsp)
movl $1, 48(%rsp)
movl $1, 52(%rsp)
leaq 24(%rsp), %rcx
leaq 16(%rsp), %rdx
leaq 44(%rsp), %rsi
leaq 32(%rsp), %rdi
call __cudaPopCallConfiguration@PLT
testl %eax, %eax
je .L15
.L11:
movq 104(%rsp), %rax
subq %fs:40, %rax
jne .L16
addq $120, %rsp
.cfi_remember_state
.cfi_def_cfa_offset 8
ret
.L15:
.cfi_restore_state
pushq 24(%rsp)
.cfi_def_cfa_offset 136
pushq 24(%rsp)
.cfi_def_cfa_offset 144
leaq 96(%rsp), %r9
movq 60(%rsp), %rcx
movl 68(%rsp), %r8d
movq 48(%rsp), %rsi
movl 56(%rsp), %edx
leaq _Z15generate_kernelP17curandStateXORWOWPj(%rip), %rdi
call cudaLaunchKernel@PLT
addq $16, %rsp
.cfi_def_cfa_offset 128
jmp .L11
.L16:
call __stack_chk_fail@PLT
.cfi_endproc
.LFE2298:
.size _Z55__device_stub__Z15generate_kernelP17curandStateXORWOWPjP17curandStateXORWOWPj, .-_Z55__device_stub__Z15generate_kernelP17curandStateXORWOWPjP17curandStateXORWOWPj
.globl _Z15generate_kernelP17curandStateXORWOWPj
.type _Z15generate_kernelP17curandStateXORWOWPj, @function
_Z15generate_kernelP17curandStateXORWOWPj:
.LFB2299:
.cfi_startproc
endbr64
subq $8, %rsp
.cfi_def_cfa_offset 16
call _Z55__device_stub__Z15generate_kernelP17curandStateXORWOWPjP17curandStateXORWOWPj
addq $8, %rsp
.cfi_def_cfa_offset 8
ret
.cfi_endproc
.LFE2299:
.size _Z15generate_kernelP17curandStateXORWOWPj, .-_Z15generate_kernelP17curandStateXORWOWPj
.section .rodata.str1.8,"aMS",@progbits,1
.align 8
.LC0:
.string "/home/ubuntu/Datasets/stackv2/train-structured/MrJoy/where-is-everybody/master/simulator/src/etc/example.cu"
.section .rodata.str1.1,"aMS",@progbits,1
.LC1:
.string "Error at %s:%d\n"
.section .rodata.str1.8
.align 8
.LC3:
.string "Fraction with low bit set was %10.13f\n"
.section .rodata.str1.1
.LC4:
.string "^^^^ kernel_example PASSED\n"
.text
.globl main
.type main, @function
main:
.LFB2271:
.cfi_startproc
endbr64
pushq %rbp
.cfi_def_cfa_offset 16
.cfi_offset 6, -16
pushq %rbx
.cfi_def_cfa_offset 24
.cfi_offset 3, -24
subq $56, %rsp
.cfi_def_cfa_offset 80
movq %fs:40, %rax
movq %rax, 40(%rsp)
xorl %eax, %eax
movl $4, %esi
movl $4096, %edi
call calloc@PLT
movq %rax, %rbx
leaq 8(%rsp), %rdi
movl $16384, %esi
call cudaMalloc@PLT
testl %eax, %eax
jne .L37
movl $16384, %edx
movl $0, %esi
movq 8(%rsp), %rdi
call cudaMemset@PLT
testl %eax, %eax
jne .L38
movq %rsp, %rdi
movl $196608, %esi
call cudaMalloc@PLT
testl %eax, %eax
jne .L39
movl $64, 28(%rsp)
movl $1, 32(%rsp)
movl $1, 36(%rsp)
movl $64, 16(%rsp)
movl $1, 20(%rsp)
movl $1, 24(%rsp)
movl $0, %r9d
movl $0, %r8d
movq 28(%rsp), %rdx
movl $1, %ecx
movq 16(%rsp), %rdi
movl $1, %esi
call __cudaPushCallConfiguration@PLT
testl %eax, %eax
je .L40
.L24:
movl $50, %ebp
jmp .L26
.L37:
movl $66, %ecx
leaq .LC0(%rip), %rdx
leaq .LC1(%rip), %rsi
movl $2, %edi
movl $0, %eax
call __printf_chk@PLT
movl $1, %eax
.L19:
movq 40(%rsp), %rdx
subq %fs:40, %rdx
jne .L41
addq $56, %rsp
.cfi_remember_state
.cfi_def_cfa_offset 24
popq %rbx
.cfi_def_cfa_offset 16
popq %rbp
.cfi_def_cfa_offset 8
ret
.L38:
.cfi_restore_state
movl $70, %ecx
leaq .LC0(%rip), %rdx
leaq .LC1(%rip), %rsi
movl $2, %edi
movl $0, %eax
call __printf_chk@PLT
movl $1, %eax
jmp .L19
.L39:
movl $74, %ecx
leaq .LC0(%rip), %rdx
leaq .LC1(%rip), %rsi
movl $2, %edi
movl $0, %eax
call __printf_chk@PLT
movl $1, %eax
jmp .L19
.L40:
movq (%rsp), %rdi
call _Z50__device_stub__Z12setup_kernelP17curandStateXORWOWP17curandStateXORWOW
jmp .L24
.L25:
subl $1, %ebp
je .L42
.L26:
movl $64, 28(%rsp)
movl $1, 32(%rsp)
movl $1, 36(%rsp)
movl $64, 16(%rsp)
movl $1, 20(%rsp)
movl $1, 24(%rsp)
movl $0, %r9d
movl $0, %r8d
movq 28(%rsp), %rdx
movl $1, %ecx
movq 16(%rsp), %rdi
movl $1, %esi
call __cudaPushCallConfiguration@PLT
testl %eax, %eax
jne .L25
movq 8(%rsp), %rsi
movq (%rsp), %rdi
call _Z55__device_stub__Z15generate_kernelP17curandStateXORWOWPjP17curandStateXORWOWPj
jmp .L25
.L42:
movl $2, %ecx
movl $16384, %edx
movq 8(%rsp), %rsi
movq %rbx, %rdi
call cudaMemcpy@PLT
testl %eax, %eax
jne .L43
movq %rbx, %rdx
leaq 16384(%rbx), %rsi
.L28:
addl (%rdx), %eax
addq $4, %rdx
cmpq %rsi, %rdx
jne .L28
movl %eax, %ecx
pxor %xmm0, %xmm0
cvtsi2ssq %rcx, %xmm0
divss .LC2(%rip), %xmm0
cvtss2sd %xmm0, %xmm0
leaq .LC3(%rip), %rsi
movl $2, %edi
movl $1, %eax
call __printf_chk@PLT
movq (%rsp), %rdi
call cudaFree@PLT
testl %eax, %eax
jne .L44
movq 8(%rsp), %rdi
call cudaFree@PLT
testl %eax, %eax
jne .L45
movq %rbx, %rdi
call free@PLT
leaq .LC4(%rip), %rsi
movl $2, %edi
movl $0, %eax
call __printf_chk@PLT
movl $0, %eax
jmp .L19
.L43:
movl $89, %ecx
leaq .LC0(%rip), %rdx
leaq .LC1(%rip), %rsi
movl $2, %edi
movl $0, %eax
call __printf_chk@PLT
movl $1, %eax
jmp .L19
.L44:
movl $103, %ecx
leaq .LC0(%rip), %rdx
leaq .LC1(%rip), %rsi
movl $2, %edi
movl $0, %eax
call __printf_chk@PLT
movl $1, %eax
jmp .L19
.L45:
movl $104, %ecx
leaq .LC0(%rip), %rdx
leaq .LC1(%rip), %rsi
movl $2, %edi
movl $0, %eax
call __printf_chk@PLT
movl $1, %eax
jmp .L19
.L41:
call __stack_chk_fail@PLT
.cfi_endproc
.LFE2271:
.size main, .-main
.section .rodata.str1.8
.align 8
.LC5:
.string "_Z15generate_kernelP17curandStateXORWOWPj"
.align 8
.LC6:
.string "_Z12setup_kernelP17curandStateXORWOW"
.section .rodata.str1.1
.LC7:
.string "precalc_xorwow_matrix"
.LC8:
.string "precalc_xorwow_offset_matrix"
.LC9:
.string "mrg32k3aM1"
.LC10:
.string "mrg32k3aM2"
.LC11:
.string "mrg32k3aM1SubSeq"
.LC12:
.string "mrg32k3aM2SubSeq"
.LC13:
.string "mrg32k3aM1Seq"
.LC14:
.string "mrg32k3aM2Seq"
.LC15:
.string "__cr_lgamma_table"
.text
.type _ZL24__sti____cudaRegisterAllv, @function
_ZL24__sti____cudaRegisterAllv:
.LFB2301:
.cfi_startproc
endbr64
pushq %rbx
.cfi_def_cfa_offset 16
.cfi_offset 3, -16
leaq _ZL15__fatDeviceText(%rip), %rdi
call __cudaRegisterFatBinary@PLT
movq %rax, %rbx
movq %rax, _ZL20__cudaFatCubinHandle(%rip)
pushq $0
.cfi_def_cfa_offset 24
pushq $0
.cfi_def_cfa_offset 32
pushq $0
.cfi_def_cfa_offset 40
pushq $0
.cfi_def_cfa_offset 48
movl $0, %r9d
movl $-1, %r8d
leaq .LC5(%rip), %rdx
movq %rdx, %rcx
leaq _Z15generate_kernelP17curandStateXORWOWPj(%rip), %rsi
movq %rax, %rdi
call __cudaRegisterFunction@PLT
addq $32, %rsp
.cfi_def_cfa_offset 16
pushq $0
.cfi_def_cfa_offset 24
pushq $0
.cfi_def_cfa_offset 32
pushq $0
.cfi_def_cfa_offset 40
pushq $0
.cfi_def_cfa_offset 48
movl $0, %r9d
movl $-1, %r8d
leaq .LC6(%rip), %rdx
movq %rdx, %rcx
leaq _Z12setup_kernelP17curandStateXORWOW(%rip), %rsi
movq %rbx, %rdi
call __cudaRegisterFunction@PLT
addq $32, %rsp
.cfi_def_cfa_offset 16
pushq $0
.cfi_def_cfa_offset 24
pushq $0
.cfi_def_cfa_offset 32
movl $102400, %r9d
movl $0, %r8d
leaq .LC7(%rip), %rdx
movq %rdx, %rcx
leaq _ZL21precalc_xorwow_matrix(%rip), %rsi
movq %rbx, %rdi
call __cudaRegisterVar@PLT
addq $16, %rsp
.cfi_def_cfa_offset 16
pushq $0
.cfi_def_cfa_offset 24
pushq $0
.cfi_def_cfa_offset 32
movl $102400, %r9d
movl $0, %r8d
leaq .LC8(%rip), %rdx
movq %rdx, %rcx
leaq _ZL28precalc_xorwow_offset_matrix(%rip), %rsi
movq %rbx, %rdi
call __cudaRegisterVar@PLT
addq $16, %rsp
.cfi_def_cfa_offset 16
pushq $0
.cfi_def_cfa_offset 24
pushq $0
.cfi_def_cfa_offset 32
movl $2304, %r9d
movl $0, %r8d
leaq .LC9(%rip), %rdx
movq %rdx, %rcx
leaq _ZL10mrg32k3aM1(%rip), %rsi
movq %rbx, %rdi
call __cudaRegisterVar@PLT
addq $16, %rsp
.cfi_def_cfa_offset 16
pushq $0
.cfi_def_cfa_offset 24
pushq $0
.cfi_def_cfa_offset 32
movl $2304, %r9d
movl $0, %r8d
leaq .LC10(%rip), %rdx
movq %rdx, %rcx
leaq _ZL10mrg32k3aM2(%rip), %rsi
movq %rbx, %rdi
call __cudaRegisterVar@PLT
addq $16, %rsp
.cfi_def_cfa_offset 16
pushq $0
.cfi_def_cfa_offset 24
pushq $0
.cfi_def_cfa_offset 32
movl $2016, %r9d
movl $0, %r8d
leaq .LC11(%rip), %rdx
movq %rdx, %rcx
leaq _ZL16mrg32k3aM1SubSeq(%rip), %rsi
movq %rbx, %rdi
call __cudaRegisterVar@PLT
addq $16, %rsp
.cfi_def_cfa_offset 16
pushq $0
.cfi_def_cfa_offset 24
pushq $0
.cfi_def_cfa_offset 32
movl $2016, %r9d
movl $0, %r8d
leaq .LC12(%rip), %rdx
movq %rdx, %rcx
leaq _ZL16mrg32k3aM2SubSeq(%rip), %rsi
movq %rbx, %rdi
call __cudaRegisterVar@PLT
addq $16, %rsp
.cfi_def_cfa_offset 16
pushq $0
.cfi_def_cfa_offset 24
pushq $0
.cfi_def_cfa_offset 32
movl $2304, %r9d
movl $0, %r8d
leaq .LC13(%rip), %rdx
movq %rdx, %rcx
leaq _ZL13mrg32k3aM1Seq(%rip), %rsi
movq %rbx, %rdi
call __cudaRegisterVar@PLT
addq $16, %rsp
.cfi_def_cfa_offset 16
pushq $0
.cfi_def_cfa_offset 24
pushq $0
.cfi_def_cfa_offset 32
movl $2304, %r9d
movl $0, %r8d
leaq .LC14(%rip), %rdx
movq %rdx, %rcx
leaq _ZL13mrg32k3aM2Seq(%rip), %rsi
movq %rbx, %rdi
call __cudaRegisterVar@PLT
addq $16, %rsp
.cfi_def_cfa_offset 16
pushq $0
.cfi_def_cfa_offset 24
pushq $1
.cfi_def_cfa_offset 32
movl $72, %r9d
movl $0, %r8d
leaq .LC15(%rip), %rdx
movq %rdx, %rcx
leaq _ZL17__cr_lgamma_table(%rip), %rsi
movq %rbx, %rdi
call __cudaRegisterVar@PLT
addq $16, %rsp
.cfi_def_cfa_offset 16
movq _ZL20__cudaFatCubinHandle(%rip), %rdi
call __cudaRegisterFatBinaryEnd@PLT
leaq _ZL26__cudaUnregisterBinaryUtilv(%rip), %rdi
call atexit@PLT
popq %rbx
.cfi_def_cfa_offset 8
ret
.cfi_endproc
.LFE2301:
.size _ZL24__sti____cudaRegisterAllv, .-_ZL24__sti____cudaRegisterAllv
.section .init_array,"aw"
.align 8
.quad _ZL24__sti____cudaRegisterAllv
.section .nvFatBinSegment,"aw"
.align 8
.type _ZL15__fatDeviceText, @object
.size _ZL15__fatDeviceText, 24
_ZL15__fatDeviceText:
.long 1180844977
.long 1
.quad fatbinData
.quad 0
.local _ZL20__cudaFatCubinHandle
.comm _ZL20__cudaFatCubinHandle,8,8
.local _ZL17__cr_lgamma_table
.comm _ZL17__cr_lgamma_table,72,32
.local _ZL13mrg32k3aM2Seq
.comm _ZL13mrg32k3aM2Seq,2304,32
.local _ZL13mrg32k3aM1Seq
.comm _ZL13mrg32k3aM1Seq,2304,32
.local _ZL16mrg32k3aM2SubSeq
.comm _ZL16mrg32k3aM2SubSeq,2016,32
.local _ZL16mrg32k3aM1SubSeq
.comm _ZL16mrg32k3aM1SubSeq,2016,32
.local _ZL10mrg32k3aM2
.comm _ZL10mrg32k3aM2,2304,32
.local _ZL10mrg32k3aM1
.comm _ZL10mrg32k3aM1,2304,32
.local _ZL28precalc_xorwow_offset_matrix
.comm _ZL28precalc_xorwow_offset_matrix,102400,32
.local _ZL21precalc_xorwow_matrix
.comm _ZL21precalc_xorwow_matrix,102400,32
.section .rodata.cst4,"aM",@progbits,4
.align 4
.LC2:
.long 1324622848
.ident "GCC: (Ubuntu 13.3.0-6ubuntu2~24.04) 13.3.0"
.section .note.GNU-stack,"",@progbits
.section .note.gnu.property,"a"
.align 8
.long 1f - 0f
.long 4f - 1f
.long 5
0:
.string "GNU"
1:
.align 8
.long 0xc0000002
.long 3f - 2f
2:
.long 0x3
3:
.align 8
4: |
You are a helpful coding assistant specialized in converting CUDA source code to HIP/AMD source code. | /*
* This program uses the device CURAND API to calculate what
* proportion of pseudo-random ints have low bit set.
* It then generates uniform results to calculate how many
* are greater than .5.
* It then generates normal results to calculate how many
* are within one standard deviation of the mean.
*/
#include <stdio.h>
#include <stdlib.h>
#include <cuda.h>
#include <curand_kernel.h>
#define THREADS_PER_BLOCK 64
#define BLOCKS 64
#define SIMULTANEOUS_THREADS (THREADS_PER_BLOCK * BLOCKS)
#define RANDOMS_PER_ITERATION 10000
#define KERNEL_ITERATIONS 50
#define CUDA_CALL(x) do { if((x) != cudaSuccess) { \
printf("Error at %s:%d\n",__FILE__,__LINE__); \
return EXIT_FAILURE;}} while(0)
__global__ void setup_kernel(curandState *state)
{
int id = threadIdx.x + blockIdx.x * THREADS_PER_BLOCK;
/* Each thread gets same seed, a different sequence
number, no offset */
curand_init(1234, id, 0, &state[id]);
}
__global__ void generate_kernel(curandState *state,
unsigned int *result)
{
int id = threadIdx.x + blockIdx.x * THREADS_PER_BLOCK;
int count = 0;
unsigned int x;
/* Copy state to local memory for efficiency */
curandState localState = state[id];
/* Generate pseudo-random unsigned ints */
for(int n = 0; n < RANDOMS_PER_ITERATION; n++) {
x = curand(&localState);
/* Check if low bit set */
if(x & 1) {
count++;
}
}
/* Copy state back to global memory */
state[id] = localState;
/* Store results */
result[id] += count;
}
int main(int argc, char *argv[])
{
int i;
unsigned int total;
curandState *devStates;
unsigned int *devResults, *hostResults;
/* Allocate space for results on host */
hostResults = (unsigned int *)calloc(SIMULTANEOUS_THREADS, sizeof(unsigned int));
/* Allocate space for results on device */
CUDA_CALL(cudaMalloc((void **)&devResults, SIMULTANEOUS_THREADS *
sizeof(unsigned int)));
/* Set results to 0 */
CUDA_CALL(cudaMemset(devResults, 0, SIMULTANEOUS_THREADS *
sizeof(unsigned int)));
/* Allocate space for prng states on device */
CUDA_CALL(cudaMalloc((void **)&devStates, SIMULTANEOUS_THREADS *
sizeof(curandState)));
// Set up RNG state objects.
setup_kernel<<<BLOCKS, THREADS_PER_BLOCK>>>(devStates);
// Generate a ton of random numbers across 50 passes.
for(i = 0; i < KERNEL_ITERATIONS; i++) {
generate_kernel<<<BLOCKS, THREADS_PER_BLOCK>>>(devStates, devResults);
}
// Copy device memory to host.
CUDA_CALL(cudaMemcpy(hostResults, devResults, SIMULTANEOUS_THREADS *
sizeof(unsigned int), cudaMemcpyDeviceToHost));
// Show result.
total = 0;
for(i = 0; i < SIMULTANEOUS_THREADS; i++) {
total += hostResults[i];
}
printf("Fraction with low bit set was %10.13f\n",
(float)total / (1.0f * SIMULTANEOUS_THREADS * RANDOMS_PER_ITERATION * KERNEL_ITERATIONS));
/* Cleanup */
CUDA_CALL(cudaFree(devStates));
CUDA_CALL(cudaFree(devResults));
free(hostResults);
printf("^^^^ kernel_example PASSED\n");
return EXIT_SUCCESS;
} | /*
* This program uses the device CURAND API to calculate what
* proportion of pseudo-random ints have low bit set.
* It then generates uniform results to calculate how many
* are greater than .5.
* It then generates normal results to calculate how many
* are within one standard deviation of the mean.
*/
#include <stdio.h>
#include <stdlib.h>
#include <hip/hip_runtime.h>
#include <hiprand/hiprand_kernel.h>
#define THREADS_PER_BLOCK 64
#define BLOCKS 64
#define SIMULTANEOUS_THREADS (THREADS_PER_BLOCK * BLOCKS)
#define RANDOMS_PER_ITERATION 10000
#define KERNEL_ITERATIONS 50
#define CUDA_CALL(x) do { if((x) != hipSuccess) { \
printf("Error at %s:%d\n",__FILE__,__LINE__); \
return EXIT_FAILURE;}} while(0)
__global__ void setup_kernel(hiprandState *state)
{
int id = threadIdx.x + blockIdx.x * THREADS_PER_BLOCK;
/* Each thread gets same seed, a different sequence
number, no offset */
hiprand_init(1234, id, 0, &state[id]);
}
__global__ void generate_kernel(hiprandState *state,
unsigned int *result)
{
int id = threadIdx.x + blockIdx.x * THREADS_PER_BLOCK;
int count = 0;
unsigned int x;
/* Copy state to local memory for efficiency */
hiprandState localState = state[id];
/* Generate pseudo-random unsigned ints */
for(int n = 0; n < RANDOMS_PER_ITERATION; n++) {
x = hiprand(&localState);
/* Check if low bit set */
if(x & 1) {
count++;
}
}
/* Copy state back to global memory */
state[id] = localState;
/* Store results */
result[id] += count;
}
int main(int argc, char *argv[])
{
int i;
unsigned int total;
hiprandState *devStates;
unsigned int *devResults, *hostResults;
/* Allocate space for results on host */
hostResults = (unsigned int *)calloc(SIMULTANEOUS_THREADS, sizeof(unsigned int));
/* Allocate space for results on device */
CUDA_CALL(hipMalloc((void **)&devResults, SIMULTANEOUS_THREADS *
sizeof(unsigned int)));
/* Set results to 0 */
CUDA_CALL(hipMemset(devResults, 0, SIMULTANEOUS_THREADS *
sizeof(unsigned int)));
/* Allocate space for prng states on device */
CUDA_CALL(hipMalloc((void **)&devStates, SIMULTANEOUS_THREADS *
sizeof(hiprandState)));
// Set up RNG state objects.
setup_kernel<<<BLOCKS, THREADS_PER_BLOCK>>>(devStates);
// Generate a ton of random numbers across 50 passes.
for(i = 0; i < KERNEL_ITERATIONS; i++) {
generate_kernel<<<BLOCKS, THREADS_PER_BLOCK>>>(devStates, devResults);
}
// Copy device memory to host.
CUDA_CALL(hipMemcpy(hostResults, devResults, SIMULTANEOUS_THREADS *
sizeof(unsigned int), hipMemcpyDeviceToHost));
// Show result.
total = 0;
for(i = 0; i < SIMULTANEOUS_THREADS; i++) {
total += hostResults[i];
}
printf("Fraction with low bit set was %10.13f\n",
(float)total / (1.0f * SIMULTANEOUS_THREADS * RANDOMS_PER_ITERATION * KERNEL_ITERATIONS));
/* Cleanup */
CUDA_CALL(hipFree(devStates));
CUDA_CALL(hipFree(devResults));
free(hostResults);
printf("^^^^ kernel_example PASSED\n");
return EXIT_SUCCESS;
} |
You are a helpful coding assistant specialized in converting HIP source code to AMD host assembly. | /*
* This program uses the device CURAND API to calculate what
* proportion of pseudo-random ints have low bit set.
* It then generates uniform results to calculate how many
* are greater than .5.
* It then generates normal results to calculate how many
* are within one standard deviation of the mean.
*/
#include <stdio.h>
#include <stdlib.h>
#include <hip/hip_runtime.h>
#include <hiprand/hiprand_kernel.h>
#define THREADS_PER_BLOCK 64
#define BLOCKS 64
#define SIMULTANEOUS_THREADS (THREADS_PER_BLOCK * BLOCKS)
#define RANDOMS_PER_ITERATION 10000
#define KERNEL_ITERATIONS 50
#define CUDA_CALL(x) do { if((x) != hipSuccess) { \
printf("Error at %s:%d\n",__FILE__,__LINE__); \
return EXIT_FAILURE;}} while(0)
__global__ void setup_kernel(hiprandState *state)
{
int id = threadIdx.x + blockIdx.x * THREADS_PER_BLOCK;
/* Each thread gets same seed, a different sequence
number, no offset */
hiprand_init(1234, id, 0, &state[id]);
}
__global__ void generate_kernel(hiprandState *state,
unsigned int *result)
{
int id = threadIdx.x + blockIdx.x * THREADS_PER_BLOCK;
int count = 0;
unsigned int x;
/* Copy state to local memory for efficiency */
hiprandState localState = state[id];
/* Generate pseudo-random unsigned ints */
for(int n = 0; n < RANDOMS_PER_ITERATION; n++) {
x = hiprand(&localState);
/* Check if low bit set */
if(x & 1) {
count++;
}
}
/* Copy state back to global memory */
state[id] = localState;
/* Store results */
result[id] += count;
}
int main(int argc, char *argv[])
{
int i;
unsigned int total;
hiprandState *devStates;
unsigned int *devResults, *hostResults;
/* Allocate space for results on host */
hostResults = (unsigned int *)calloc(SIMULTANEOUS_THREADS, sizeof(unsigned int));
/* Allocate space for results on device */
CUDA_CALL(hipMalloc((void **)&devResults, SIMULTANEOUS_THREADS *
sizeof(unsigned int)));
/* Set results to 0 */
CUDA_CALL(hipMemset(devResults, 0, SIMULTANEOUS_THREADS *
sizeof(unsigned int)));
/* Allocate space for prng states on device */
CUDA_CALL(hipMalloc((void **)&devStates, SIMULTANEOUS_THREADS *
sizeof(hiprandState)));
// Set up RNG state objects.
setup_kernel<<<BLOCKS, THREADS_PER_BLOCK>>>(devStates);
// Generate a ton of random numbers across 50 passes.
for(i = 0; i < KERNEL_ITERATIONS; i++) {
generate_kernel<<<BLOCKS, THREADS_PER_BLOCK>>>(devStates, devResults);
}
// Copy device memory to host.
CUDA_CALL(hipMemcpy(hostResults, devResults, SIMULTANEOUS_THREADS *
sizeof(unsigned int), hipMemcpyDeviceToHost));
// Show result.
total = 0;
for(i = 0; i < SIMULTANEOUS_THREADS; i++) {
total += hostResults[i];
}
printf("Fraction with low bit set was %10.13f\n",
(float)total / (1.0f * SIMULTANEOUS_THREADS * RANDOMS_PER_ITERATION * KERNEL_ITERATIONS));
/* Cleanup */
CUDA_CALL(hipFree(devStates));
CUDA_CALL(hipFree(devResults));
free(hostResults);
printf("^^^^ kernel_example PASSED\n");
return EXIT_SUCCESS;
} | .text
.file "example.hip"
.globl _Z27__device_stub__setup_kernelP12hiprandState # -- Begin function _Z27__device_stub__setup_kernelP12hiprandState
.p2align 4, 0x90
.type _Z27__device_stub__setup_kernelP12hiprandState,@function
_Z27__device_stub__setup_kernelP12hiprandState: # @_Z27__device_stub__setup_kernelP12hiprandState
.cfi_startproc
# %bb.0:
subq $72, %rsp
.cfi_def_cfa_offset 80
movq %rdi, 64(%rsp)
leaq 64(%rsp), %rax
movq %rax, (%rsp)
leaq 48(%rsp), %rdi
leaq 32(%rsp), %rsi
leaq 24(%rsp), %rdx
leaq 16(%rsp), %rcx
callq __hipPopCallConfiguration
movq 48(%rsp), %rsi
movl 56(%rsp), %edx
movq 32(%rsp), %rcx
movl 40(%rsp), %r8d
movq %rsp, %r9
movl $_Z12setup_kernelP12hiprandState, %edi
pushq 16(%rsp)
.cfi_adjust_cfa_offset 8
pushq 32(%rsp)
.cfi_adjust_cfa_offset 8
callq hipLaunchKernel
addq $88, %rsp
.cfi_adjust_cfa_offset -88
retq
.Lfunc_end0:
.size _Z27__device_stub__setup_kernelP12hiprandState, .Lfunc_end0-_Z27__device_stub__setup_kernelP12hiprandState
.cfi_endproc
# -- End function
.globl _Z30__device_stub__generate_kernelP12hiprandStatePj # -- Begin function _Z30__device_stub__generate_kernelP12hiprandStatePj
.p2align 4, 0x90
.type _Z30__device_stub__generate_kernelP12hiprandStatePj,@function
_Z30__device_stub__generate_kernelP12hiprandStatePj: # @_Z30__device_stub__generate_kernelP12hiprandStatePj
.cfi_startproc
# %bb.0:
subq $88, %rsp
.cfi_def_cfa_offset 96
movq %rdi, 56(%rsp)
movq %rsi, 48(%rsp)
leaq 56(%rsp), %rax
movq %rax, 64(%rsp)
leaq 48(%rsp), %rax
movq %rax, 72(%rsp)
leaq 32(%rsp), %rdi
leaq 16(%rsp), %rsi
leaq 8(%rsp), %rdx
movq %rsp, %rcx
callq __hipPopCallConfiguration
movq 32(%rsp), %rsi
movl 40(%rsp), %edx
movq 16(%rsp), %rcx
movl 24(%rsp), %r8d
leaq 64(%rsp), %r9
movl $_Z15generate_kernelP12hiprandStatePj, %edi
pushq (%rsp)
.cfi_adjust_cfa_offset 8
pushq 16(%rsp)
.cfi_adjust_cfa_offset 8
callq hipLaunchKernel
addq $104, %rsp
.cfi_adjust_cfa_offset -104
retq
.Lfunc_end1:
.size _Z30__device_stub__generate_kernelP12hiprandStatePj, .Lfunc_end1-_Z30__device_stub__generate_kernelP12hiprandStatePj
.cfi_endproc
# -- End function
.section .rodata.cst4,"aM",@progbits,4
.p2align 2, 0x0 # -- Begin function main
.LCPI2_0:
.long 0x4ef42400 # float 2.048E+9
.text
.globl main
.p2align 4, 0x90
.type main,@function
main: # @main
.cfi_startproc
# %bb.0:
pushq %rbp
.cfi_def_cfa_offset 16
pushq %r15
.cfi_def_cfa_offset 24
pushq %r14
.cfi_def_cfa_offset 32
pushq %r13
.cfi_def_cfa_offset 40
pushq %r12
.cfi_def_cfa_offset 48
pushq %rbx
.cfi_def_cfa_offset 56
subq $104, %rsp
.cfi_def_cfa_offset 160
.cfi_offset %rbx, -56
.cfi_offset %r12, -48
.cfi_offset %r13, -40
.cfi_offset %r14, -32
.cfi_offset %r15, -24
.cfi_offset %rbp, -16
movl $4096, %edi # imm = 0x1000
movl $4, %esi
callq calloc
movq %rax, %rbx
movq %rsp, %rdi
movl $16384, %esi # imm = 0x4000
callq hipMalloc
testl %eax, %eax
je .LBB2_3
# %bb.1:
movl $.L.str, %edi
movl $.L.str.1, %esi
movl $67, %edx
jmp .LBB2_2
.LBB2_3:
movq (%rsp), %rdi
movl $16384, %edx # imm = 0x4000
xorl %esi, %esi
callq hipMemset
testl %eax, %eax
je .LBB2_5
# %bb.4:
movl $.L.str, %edi
movl $.L.str.1, %esi
movl $71, %edx
jmp .LBB2_2
.LBB2_5:
leaq 8(%rsp), %rdi
movl $196608, %esi # imm = 0x30000
callq hipMalloc
testl %eax, %eax
je .LBB2_7
# %bb.6:
movl $.L.str, %edi
movl $.L.str.1, %esi
movl $75, %edx
jmp .LBB2_2
.LBB2_7:
movabsq $4294967360, %r14 # imm = 0x100000040
movq %r14, %rdi
movl $1, %esi
movq %r14, %rdx
movl $1, %ecx
xorl %r8d, %r8d
xorl %r9d, %r9d
callq __hipPushCallConfiguration
testl %eax, %eax
jne .LBB2_9
# %bb.8:
movq 8(%rsp), %rdi
callq _Z27__device_stub__setup_kernelP12hiprandState
.LBB2_9:
movl $50, %r12d
leaq 24(%rsp), %r13
leaq 16(%rsp), %rbp
leaq 80(%rsp), %r15
jmp .LBB2_10
.p2align 4, 0x90
.LBB2_12: # in Loop: Header=BB2_10 Depth=1
decl %r12d
je .LBB2_13
.LBB2_10: # =>This Inner Loop Header: Depth=1
movq %r14, %rdi
movl $1, %esi
movq %r14, %rdx
movl $1, %ecx
xorl %r8d, %r8d
xorl %r9d, %r9d
callq __hipPushCallConfiguration
testl %eax, %eax
jne .LBB2_12
# %bb.11: # in Loop: Header=BB2_10 Depth=1
movq 8(%rsp), %rax
movq (%rsp), %rcx
movq %rax, 72(%rsp)
movq %rcx, 64(%rsp)
leaq 72(%rsp), %rax
movq %rax, 80(%rsp)
leaq 64(%rsp), %rax
movq %rax, 88(%rsp)
leaq 48(%rsp), %rdi
leaq 32(%rsp), %rsi
movq %r13, %rdx
movq %rbp, %rcx
callq __hipPopCallConfiguration
movq 48(%rsp), %rsi
movl 56(%rsp), %edx
movq 32(%rsp), %rcx
movl 40(%rsp), %r8d
movl $_Z15generate_kernelP12hiprandStatePj, %edi
movq %r15, %r9
pushq 16(%rsp)
.cfi_adjust_cfa_offset 8
pushq 32(%rsp)
.cfi_adjust_cfa_offset 8
callq hipLaunchKernel
addq $16, %rsp
.cfi_adjust_cfa_offset -16
jmp .LBB2_12
.LBB2_13:
movq (%rsp), %rsi
movl $16384, %edx # imm = 0x4000
movq %rbx, %rdi
movl $2, %ecx
callq hipMemcpy
testl %eax, %eax
je .LBB2_14
# %bb.22:
movl $.L.str, %edi
movl $.L.str.1, %esi
movl $90, %edx
jmp .LBB2_2
.LBB2_14: # %.preheader.preheader
xorl %eax, %eax
xorl %ecx, %ecx
.p2align 4, 0x90
.LBB2_15: # %.preheader
# =>This Inner Loop Header: Depth=1
addl (%rbx,%rax,4), %ecx
incq %rax
cmpq $4096, %rax # imm = 0x1000
jne .LBB2_15
# %bb.16:
movl %ecx, %eax
cvtsi2ss %rax, %xmm0
divss .LCPI2_0(%rip), %xmm0
cvtss2sd %xmm0, %xmm0
movl $.L.str.2, %edi
movb $1, %al
callq printf
movq 8(%rsp), %rdi
callq hipFree
testl %eax, %eax
je .LBB2_18
# %bb.17:
movl $.L.str, %edi
movl $.L.str.1, %esi
movl $103, %edx
jmp .LBB2_2
.LBB2_18:
movq (%rsp), %rdi
callq hipFree
testl %eax, %eax
je .LBB2_20
# %bb.19:
movl $.L.str, %edi
movl $.L.str.1, %esi
movl $104, %edx
.LBB2_2:
xorl %eax, %eax
callq printf
movl $1, %eax
.LBB2_21:
addq $104, %rsp
.cfi_def_cfa_offset 56
popq %rbx
.cfi_def_cfa_offset 48
popq %r12
.cfi_def_cfa_offset 40
popq %r13
.cfi_def_cfa_offset 32
popq %r14
.cfi_def_cfa_offset 24
popq %r15
.cfi_def_cfa_offset 16
popq %rbp
.cfi_def_cfa_offset 8
retq
.LBB2_20:
.cfi_def_cfa_offset 160
movq %rbx, %rdi
callq free
movl $.Lstr, %edi
callq puts@PLT
xorl %eax, %eax
jmp .LBB2_21
.Lfunc_end2:
.size main, .Lfunc_end2-main
.cfi_endproc
# -- End function
.p2align 4, 0x90 # -- Begin function __hip_module_ctor
.type __hip_module_ctor,@function
__hip_module_ctor: # @__hip_module_ctor
.cfi_startproc
# %bb.0:
pushq %rbx
.cfi_def_cfa_offset 16
subq $32, %rsp
.cfi_def_cfa_offset 48
.cfi_offset %rbx, -16
cmpq $0, __hip_gpubin_handle(%rip)
jne .LBB3_2
# %bb.1:
movl $__hip_fatbin_wrapper, %edi
callq __hipRegisterFatBinary
movq %rax, __hip_gpubin_handle(%rip)
.LBB3_2:
movq __hip_gpubin_handle(%rip), %rbx
xorps %xmm0, %xmm0
movups %xmm0, 16(%rsp)
movups %xmm0, (%rsp)
movl $_Z12setup_kernelP12hiprandState, %esi
movl $.L__unnamed_1, %edx
movl $.L__unnamed_1, %ecx
movq %rbx, %rdi
movl $-1, %r8d
xorl %r9d, %r9d
callq __hipRegisterFunction
xorps %xmm0, %xmm0
movups %xmm0, 16(%rsp)
movups %xmm0, (%rsp)
movl $_Z15generate_kernelP12hiprandStatePj, %esi
movl $.L__unnamed_2, %edx
movl $.L__unnamed_2, %ecx
movq %rbx, %rdi
movl $-1, %r8d
xorl %r9d, %r9d
callq __hipRegisterFunction
movl $__hip_module_dtor, %edi
addq $32, %rsp
.cfi_def_cfa_offset 16
popq %rbx
.cfi_def_cfa_offset 8
jmp atexit # TAILCALL
.Lfunc_end3:
.size __hip_module_ctor, .Lfunc_end3-__hip_module_ctor
.cfi_endproc
# -- End function
.p2align 4, 0x90 # -- Begin function __hip_module_dtor
.type __hip_module_dtor,@function
__hip_module_dtor: # @__hip_module_dtor
.cfi_startproc
# %bb.0:
movq __hip_gpubin_handle(%rip), %rdi
testq %rdi, %rdi
je .LBB4_2
# %bb.1:
pushq %rax
.cfi_def_cfa_offset 16
callq __hipUnregisterFatBinary
movq $0, __hip_gpubin_handle(%rip)
addq $8, %rsp
.cfi_def_cfa_offset 8
.LBB4_2:
retq
.Lfunc_end4:
.size __hip_module_dtor, .Lfunc_end4-__hip_module_dtor
.cfi_endproc
# -- End function
.type _Z12setup_kernelP12hiprandState,@object # @_Z12setup_kernelP12hiprandState
.section .rodata,"a",@progbits
.globl _Z12setup_kernelP12hiprandState
.p2align 3, 0x0
_Z12setup_kernelP12hiprandState:
.quad _Z27__device_stub__setup_kernelP12hiprandState
.size _Z12setup_kernelP12hiprandState, 8
.type _Z15generate_kernelP12hiprandStatePj,@object # @_Z15generate_kernelP12hiprandStatePj
.globl _Z15generate_kernelP12hiprandStatePj
.p2align 3, 0x0
_Z15generate_kernelP12hiprandStatePj:
.quad _Z30__device_stub__generate_kernelP12hiprandStatePj
.size _Z15generate_kernelP12hiprandStatePj, 8
.type .L.str,@object # @.str
.section .rodata.str1.1,"aMS",@progbits,1
.L.str:
.asciz "Error at %s:%d\n"
.size .L.str, 16
.type .L.str.1,@object # @.str.1
.L.str.1:
.asciz "/home/ubuntu/Datasets/stackv2/train-structured-repos-hip/MrJoy/where-is-everybody/master/simulator/src/etc/example.hip"
.size .L.str.1, 119
.type .L.str.2,@object # @.str.2
.L.str.2:
.asciz "Fraction with low bit set was %10.13f\n"
.size .L.str.2, 39
.type .L__unnamed_1,@object # @0
.L__unnamed_1:
.asciz "_Z12setup_kernelP12hiprandState"
.size .L__unnamed_1, 32
.type .L__unnamed_2,@object # @1
.L__unnamed_2:
.asciz "_Z15generate_kernelP12hiprandStatePj"
.size .L__unnamed_2, 37
.type __hip_fatbin_wrapper,@object # @__hip_fatbin_wrapper
.section .hipFatBinSegment,"a",@progbits
.p2align 3, 0x0
__hip_fatbin_wrapper:
.long 1212764230 # 0x48495046
.long 1 # 0x1
.quad __hip_fatbin
.quad 0
.size __hip_fatbin_wrapper, 24
.type __hip_gpubin_handle,@object # @__hip_gpubin_handle
.local __hip_gpubin_handle
.comm __hip_gpubin_handle,8,8
.section .init_array,"aw",@init_array
.p2align 3, 0x0
.quad __hip_module_ctor
.type __hip_cuid_,@object # @__hip_cuid_
.bss
.globl __hip_cuid_
__hip_cuid_:
.byte 0 # 0x0
.size __hip_cuid_, 1
.type .Lstr,@object # @str
.section .rodata.str1.1,"aMS",@progbits,1
.Lstr:
.asciz "^^^^ kernel_example PASSED"
.size .Lstr, 27
.section ".linker-options","e",@llvm_linker_options
.ident "AMD clang version 18.0.0git (https://github.com/RadeonOpenCompute/llvm-project roc-6.3.2 25012 e5bf7e55c91490b07c49d8960fa7983d864936c4)"
.section ".note.GNU-stack","",@progbits
.addrsig
.addrsig_sym _Z27__device_stub__setup_kernelP12hiprandState
.addrsig_sym _Z30__device_stub__generate_kernelP12hiprandStatePj
.addrsig_sym __hip_module_ctor
.addrsig_sym __hip_module_dtor
.addrsig_sym _Z12setup_kernelP12hiprandState
.addrsig_sym _Z15generate_kernelP12hiprandStatePj
.addrsig_sym __hip_fatbin
.addrsig_sym __hip_fatbin_wrapper
.addrsig_sym __hip_cuid_ |
You are a helpful coding assistant specialized in converting from CUDA host assembly to AMD host assembly. | .file "tmpxft_0010b8b5_00000000-6_example.cudafe1.cpp"
.text
#APP
#NO_APP
.type _ZL26__cudaUnregisterBinaryUtilv, @function
_ZL26__cudaUnregisterBinaryUtilv:
.LFB2274:
.cfi_startproc
endbr64
subq $8, %rsp
.cfi_def_cfa_offset 16
movq _ZL20__cudaFatCubinHandle(%rip), %rdi
call __cudaUnregisterFatBinary@PLT
addq $8, %rsp
.cfi_def_cfa_offset 8
ret
.cfi_endproc
.LFE2274:
.size _ZL26__cudaUnregisterBinaryUtilv, .-_ZL26__cudaUnregisterBinaryUtilv
.globl _Z50__device_stub__Z12setup_kernelP17curandStateXORWOWP17curandStateXORWOW
.type _Z50__device_stub__Z12setup_kernelP17curandStateXORWOWP17curandStateXORWOW, @function
_Z50__device_stub__Z12setup_kernelP17curandStateXORWOWP17curandStateXORWOW:
.LFB2296:
.cfi_startproc
endbr64
subq $104, %rsp
.cfi_def_cfa_offset 112
movq %rdi, 8(%rsp)
movq %fs:40, %rax
movq %rax, 88(%rsp)
xorl %eax, %eax
leaq 8(%rsp), %rax
movq %rax, 80(%rsp)
movl $1, 32(%rsp)
movl $1, 36(%rsp)
movl $1, 40(%rsp)
movl $1, 44(%rsp)
movl $1, 48(%rsp)
movl $1, 52(%rsp)
leaq 24(%rsp), %rcx
leaq 16(%rsp), %rdx
leaq 44(%rsp), %rsi
leaq 32(%rsp), %rdi
call __cudaPopCallConfiguration@PLT
testl %eax, %eax
je .L7
.L3:
movq 88(%rsp), %rax
subq %fs:40, %rax
jne .L8
addq $104, %rsp
.cfi_remember_state
.cfi_def_cfa_offset 8
ret
.L7:
.cfi_restore_state
pushq 24(%rsp)
.cfi_def_cfa_offset 120
pushq 24(%rsp)
.cfi_def_cfa_offset 128
leaq 96(%rsp), %r9
movq 60(%rsp), %rcx
movl 68(%rsp), %r8d
movq 48(%rsp), %rsi
movl 56(%rsp), %edx
leaq _Z12setup_kernelP17curandStateXORWOW(%rip), %rdi
call cudaLaunchKernel@PLT
addq $16, %rsp
.cfi_def_cfa_offset 112
jmp .L3
.L8:
call __stack_chk_fail@PLT
.cfi_endproc
.LFE2296:
.size _Z50__device_stub__Z12setup_kernelP17curandStateXORWOWP17curandStateXORWOW, .-_Z50__device_stub__Z12setup_kernelP17curandStateXORWOWP17curandStateXORWOW
.globl _Z12setup_kernelP17curandStateXORWOW
.type _Z12setup_kernelP17curandStateXORWOW, @function
_Z12setup_kernelP17curandStateXORWOW:
.LFB2297:
.cfi_startproc
endbr64
subq $8, %rsp
.cfi_def_cfa_offset 16
call _Z50__device_stub__Z12setup_kernelP17curandStateXORWOWP17curandStateXORWOW
addq $8, %rsp
.cfi_def_cfa_offset 8
ret
.cfi_endproc
.LFE2297:
.size _Z12setup_kernelP17curandStateXORWOW, .-_Z12setup_kernelP17curandStateXORWOW
.globl _Z55__device_stub__Z15generate_kernelP17curandStateXORWOWPjP17curandStateXORWOWPj
.type _Z55__device_stub__Z15generate_kernelP17curandStateXORWOWPjP17curandStateXORWOWPj, @function
_Z55__device_stub__Z15generate_kernelP17curandStateXORWOWPjP17curandStateXORWOWPj:
.LFB2298:
.cfi_startproc
endbr64
subq $120, %rsp
.cfi_def_cfa_offset 128
movq %rdi, 8(%rsp)
movq %rsi, (%rsp)
movq %fs:40, %rax
movq %rax, 104(%rsp)
xorl %eax, %eax
leaq 8(%rsp), %rax
movq %rax, 80(%rsp)
movq %rsp, %rax
movq %rax, 88(%rsp)
movl $1, 32(%rsp)
movl $1, 36(%rsp)
movl $1, 40(%rsp)
movl $1, 44(%rsp)
movl $1, 48(%rsp)
movl $1, 52(%rsp)
leaq 24(%rsp), %rcx
leaq 16(%rsp), %rdx
leaq 44(%rsp), %rsi
leaq 32(%rsp), %rdi
call __cudaPopCallConfiguration@PLT
testl %eax, %eax
je .L15
.L11:
movq 104(%rsp), %rax
subq %fs:40, %rax
jne .L16
addq $120, %rsp
.cfi_remember_state
.cfi_def_cfa_offset 8
ret
.L15:
.cfi_restore_state
pushq 24(%rsp)
.cfi_def_cfa_offset 136
pushq 24(%rsp)
.cfi_def_cfa_offset 144
leaq 96(%rsp), %r9
movq 60(%rsp), %rcx
movl 68(%rsp), %r8d
movq 48(%rsp), %rsi
movl 56(%rsp), %edx
leaq _Z15generate_kernelP17curandStateXORWOWPj(%rip), %rdi
call cudaLaunchKernel@PLT
addq $16, %rsp
.cfi_def_cfa_offset 128
jmp .L11
.L16:
call __stack_chk_fail@PLT
.cfi_endproc
.LFE2298:
.size _Z55__device_stub__Z15generate_kernelP17curandStateXORWOWPjP17curandStateXORWOWPj, .-_Z55__device_stub__Z15generate_kernelP17curandStateXORWOWPjP17curandStateXORWOWPj
.globl _Z15generate_kernelP17curandStateXORWOWPj
.type _Z15generate_kernelP17curandStateXORWOWPj, @function
_Z15generate_kernelP17curandStateXORWOWPj:
.LFB2299:
.cfi_startproc
endbr64
subq $8, %rsp
.cfi_def_cfa_offset 16
call _Z55__device_stub__Z15generate_kernelP17curandStateXORWOWPjP17curandStateXORWOWPj
addq $8, %rsp
.cfi_def_cfa_offset 8
ret
.cfi_endproc
.LFE2299:
.size _Z15generate_kernelP17curandStateXORWOWPj, .-_Z15generate_kernelP17curandStateXORWOWPj
.section .rodata.str1.8,"aMS",@progbits,1
.align 8
.LC0:
.string "/home/ubuntu/Datasets/stackv2/train-structured/MrJoy/where-is-everybody/master/simulator/src/etc/example.cu"
.section .rodata.str1.1,"aMS",@progbits,1
.LC1:
.string "Error at %s:%d\n"
.section .rodata.str1.8
.align 8
.LC3:
.string "Fraction with low bit set was %10.13f\n"
.section .rodata.str1.1
.LC4:
.string "^^^^ kernel_example PASSED\n"
.text
.globl main
.type main, @function
main:
.LFB2271:
.cfi_startproc
endbr64
pushq %rbp
.cfi_def_cfa_offset 16
.cfi_offset 6, -16
pushq %rbx
.cfi_def_cfa_offset 24
.cfi_offset 3, -24
subq $56, %rsp
.cfi_def_cfa_offset 80
movq %fs:40, %rax
movq %rax, 40(%rsp)
xorl %eax, %eax
movl $4, %esi
movl $4096, %edi
call calloc@PLT
movq %rax, %rbx
leaq 8(%rsp), %rdi
movl $16384, %esi
call cudaMalloc@PLT
testl %eax, %eax
jne .L37
movl $16384, %edx
movl $0, %esi
movq 8(%rsp), %rdi
call cudaMemset@PLT
testl %eax, %eax
jne .L38
movq %rsp, %rdi
movl $196608, %esi
call cudaMalloc@PLT
testl %eax, %eax
jne .L39
movl $64, 28(%rsp)
movl $1, 32(%rsp)
movl $1, 36(%rsp)
movl $64, 16(%rsp)
movl $1, 20(%rsp)
movl $1, 24(%rsp)
movl $0, %r9d
movl $0, %r8d
movq 28(%rsp), %rdx
movl $1, %ecx
movq 16(%rsp), %rdi
movl $1, %esi
call __cudaPushCallConfiguration@PLT
testl %eax, %eax
je .L40
.L24:
movl $50, %ebp
jmp .L26
.L37:
movl $66, %ecx
leaq .LC0(%rip), %rdx
leaq .LC1(%rip), %rsi
movl $2, %edi
movl $0, %eax
call __printf_chk@PLT
movl $1, %eax
.L19:
movq 40(%rsp), %rdx
subq %fs:40, %rdx
jne .L41
addq $56, %rsp
.cfi_remember_state
.cfi_def_cfa_offset 24
popq %rbx
.cfi_def_cfa_offset 16
popq %rbp
.cfi_def_cfa_offset 8
ret
.L38:
.cfi_restore_state
movl $70, %ecx
leaq .LC0(%rip), %rdx
leaq .LC1(%rip), %rsi
movl $2, %edi
movl $0, %eax
call __printf_chk@PLT
movl $1, %eax
jmp .L19
.L39:
movl $74, %ecx
leaq .LC0(%rip), %rdx
leaq .LC1(%rip), %rsi
movl $2, %edi
movl $0, %eax
call __printf_chk@PLT
movl $1, %eax
jmp .L19
.L40:
movq (%rsp), %rdi
call _Z50__device_stub__Z12setup_kernelP17curandStateXORWOWP17curandStateXORWOW
jmp .L24
.L25:
subl $1, %ebp
je .L42
.L26:
movl $64, 28(%rsp)
movl $1, 32(%rsp)
movl $1, 36(%rsp)
movl $64, 16(%rsp)
movl $1, 20(%rsp)
movl $1, 24(%rsp)
movl $0, %r9d
movl $0, %r8d
movq 28(%rsp), %rdx
movl $1, %ecx
movq 16(%rsp), %rdi
movl $1, %esi
call __cudaPushCallConfiguration@PLT
testl %eax, %eax
jne .L25
movq 8(%rsp), %rsi
movq (%rsp), %rdi
call _Z55__device_stub__Z15generate_kernelP17curandStateXORWOWPjP17curandStateXORWOWPj
jmp .L25
.L42:
movl $2, %ecx
movl $16384, %edx
movq 8(%rsp), %rsi
movq %rbx, %rdi
call cudaMemcpy@PLT
testl %eax, %eax
jne .L43
movq %rbx, %rdx
leaq 16384(%rbx), %rsi
.L28:
addl (%rdx), %eax
addq $4, %rdx
cmpq %rsi, %rdx
jne .L28
movl %eax, %ecx
pxor %xmm0, %xmm0
cvtsi2ssq %rcx, %xmm0
divss .LC2(%rip), %xmm0
cvtss2sd %xmm0, %xmm0
leaq .LC3(%rip), %rsi
movl $2, %edi
movl $1, %eax
call __printf_chk@PLT
movq (%rsp), %rdi
call cudaFree@PLT
testl %eax, %eax
jne .L44
movq 8(%rsp), %rdi
call cudaFree@PLT
testl %eax, %eax
jne .L45
movq %rbx, %rdi
call free@PLT
leaq .LC4(%rip), %rsi
movl $2, %edi
movl $0, %eax
call __printf_chk@PLT
movl $0, %eax
jmp .L19
.L43:
movl $89, %ecx
leaq .LC0(%rip), %rdx
leaq .LC1(%rip), %rsi
movl $2, %edi
movl $0, %eax
call __printf_chk@PLT
movl $1, %eax
jmp .L19
.L44:
movl $103, %ecx
leaq .LC0(%rip), %rdx
leaq .LC1(%rip), %rsi
movl $2, %edi
movl $0, %eax
call __printf_chk@PLT
movl $1, %eax
jmp .L19
.L45:
movl $104, %ecx
leaq .LC0(%rip), %rdx
leaq .LC1(%rip), %rsi
movl $2, %edi
movl $0, %eax
call __printf_chk@PLT
movl $1, %eax
jmp .L19
.L41:
call __stack_chk_fail@PLT
.cfi_endproc
.LFE2271:
.size main, .-main
.section .rodata.str1.8
.align 8
.LC5:
.string "_Z15generate_kernelP17curandStateXORWOWPj"
.align 8
.LC6:
.string "_Z12setup_kernelP17curandStateXORWOW"
.section .rodata.str1.1
.LC7:
.string "precalc_xorwow_matrix"
.LC8:
.string "precalc_xorwow_offset_matrix"
.LC9:
.string "mrg32k3aM1"
.LC10:
.string "mrg32k3aM2"
.LC11:
.string "mrg32k3aM1SubSeq"
.LC12:
.string "mrg32k3aM2SubSeq"
.LC13:
.string "mrg32k3aM1Seq"
.LC14:
.string "mrg32k3aM2Seq"
.LC15:
.string "__cr_lgamma_table"
.text
.type _ZL24__sti____cudaRegisterAllv, @function
_ZL24__sti____cudaRegisterAllv:
.LFB2301:
.cfi_startproc
endbr64
pushq %rbx
.cfi_def_cfa_offset 16
.cfi_offset 3, -16
leaq _ZL15__fatDeviceText(%rip), %rdi
call __cudaRegisterFatBinary@PLT
movq %rax, %rbx
movq %rax, _ZL20__cudaFatCubinHandle(%rip)
pushq $0
.cfi_def_cfa_offset 24
pushq $0
.cfi_def_cfa_offset 32
pushq $0
.cfi_def_cfa_offset 40
pushq $0
.cfi_def_cfa_offset 48
movl $0, %r9d
movl $-1, %r8d
leaq .LC5(%rip), %rdx
movq %rdx, %rcx
leaq _Z15generate_kernelP17curandStateXORWOWPj(%rip), %rsi
movq %rax, %rdi
call __cudaRegisterFunction@PLT
addq $32, %rsp
.cfi_def_cfa_offset 16
pushq $0
.cfi_def_cfa_offset 24
pushq $0
.cfi_def_cfa_offset 32
pushq $0
.cfi_def_cfa_offset 40
pushq $0
.cfi_def_cfa_offset 48
movl $0, %r9d
movl $-1, %r8d
leaq .LC6(%rip), %rdx
movq %rdx, %rcx
leaq _Z12setup_kernelP17curandStateXORWOW(%rip), %rsi
movq %rbx, %rdi
call __cudaRegisterFunction@PLT
addq $32, %rsp
.cfi_def_cfa_offset 16
pushq $0
.cfi_def_cfa_offset 24
pushq $0
.cfi_def_cfa_offset 32
movl $102400, %r9d
movl $0, %r8d
leaq .LC7(%rip), %rdx
movq %rdx, %rcx
leaq _ZL21precalc_xorwow_matrix(%rip), %rsi
movq %rbx, %rdi
call __cudaRegisterVar@PLT
addq $16, %rsp
.cfi_def_cfa_offset 16
pushq $0
.cfi_def_cfa_offset 24
pushq $0
.cfi_def_cfa_offset 32
movl $102400, %r9d
movl $0, %r8d
leaq .LC8(%rip), %rdx
movq %rdx, %rcx
leaq _ZL28precalc_xorwow_offset_matrix(%rip), %rsi
movq %rbx, %rdi
call __cudaRegisterVar@PLT
addq $16, %rsp
.cfi_def_cfa_offset 16
pushq $0
.cfi_def_cfa_offset 24
pushq $0
.cfi_def_cfa_offset 32
movl $2304, %r9d
movl $0, %r8d
leaq .LC9(%rip), %rdx
movq %rdx, %rcx
leaq _ZL10mrg32k3aM1(%rip), %rsi
movq %rbx, %rdi
call __cudaRegisterVar@PLT
addq $16, %rsp
.cfi_def_cfa_offset 16
pushq $0
.cfi_def_cfa_offset 24
pushq $0
.cfi_def_cfa_offset 32
movl $2304, %r9d
movl $0, %r8d
leaq .LC10(%rip), %rdx
movq %rdx, %rcx
leaq _ZL10mrg32k3aM2(%rip), %rsi
movq %rbx, %rdi
call __cudaRegisterVar@PLT
addq $16, %rsp
.cfi_def_cfa_offset 16
pushq $0
.cfi_def_cfa_offset 24
pushq $0
.cfi_def_cfa_offset 32
movl $2016, %r9d
movl $0, %r8d
leaq .LC11(%rip), %rdx
movq %rdx, %rcx
leaq _ZL16mrg32k3aM1SubSeq(%rip), %rsi
movq %rbx, %rdi
call __cudaRegisterVar@PLT
addq $16, %rsp
.cfi_def_cfa_offset 16
pushq $0
.cfi_def_cfa_offset 24
pushq $0
.cfi_def_cfa_offset 32
movl $2016, %r9d
movl $0, %r8d
leaq .LC12(%rip), %rdx
movq %rdx, %rcx
leaq _ZL16mrg32k3aM2SubSeq(%rip), %rsi
movq %rbx, %rdi
call __cudaRegisterVar@PLT
addq $16, %rsp
.cfi_def_cfa_offset 16
pushq $0
.cfi_def_cfa_offset 24
pushq $0
.cfi_def_cfa_offset 32
movl $2304, %r9d
movl $0, %r8d
leaq .LC13(%rip), %rdx
movq %rdx, %rcx
leaq _ZL13mrg32k3aM1Seq(%rip), %rsi
movq %rbx, %rdi
call __cudaRegisterVar@PLT
addq $16, %rsp
.cfi_def_cfa_offset 16
pushq $0
.cfi_def_cfa_offset 24
pushq $0
.cfi_def_cfa_offset 32
movl $2304, %r9d
movl $0, %r8d
leaq .LC14(%rip), %rdx
movq %rdx, %rcx
leaq _ZL13mrg32k3aM2Seq(%rip), %rsi
movq %rbx, %rdi
call __cudaRegisterVar@PLT
addq $16, %rsp
.cfi_def_cfa_offset 16
pushq $0
.cfi_def_cfa_offset 24
pushq $1
.cfi_def_cfa_offset 32
movl $72, %r9d
movl $0, %r8d
leaq .LC15(%rip), %rdx
movq %rdx, %rcx
leaq _ZL17__cr_lgamma_table(%rip), %rsi
movq %rbx, %rdi
call __cudaRegisterVar@PLT
addq $16, %rsp
.cfi_def_cfa_offset 16
movq _ZL20__cudaFatCubinHandle(%rip), %rdi
call __cudaRegisterFatBinaryEnd@PLT
leaq _ZL26__cudaUnregisterBinaryUtilv(%rip), %rdi
call atexit@PLT
popq %rbx
.cfi_def_cfa_offset 8
ret
.cfi_endproc
.LFE2301:
.size _ZL24__sti____cudaRegisterAllv, .-_ZL24__sti____cudaRegisterAllv
.section .init_array,"aw"
.align 8
.quad _ZL24__sti____cudaRegisterAllv
.section .nvFatBinSegment,"aw"
.align 8
.type _ZL15__fatDeviceText, @object
.size _ZL15__fatDeviceText, 24
_ZL15__fatDeviceText:
.long 1180844977
.long 1
.quad fatbinData
.quad 0
.local _ZL20__cudaFatCubinHandle
.comm _ZL20__cudaFatCubinHandle,8,8
.local _ZL17__cr_lgamma_table
.comm _ZL17__cr_lgamma_table,72,32
.local _ZL13mrg32k3aM2Seq
.comm _ZL13mrg32k3aM2Seq,2304,32
.local _ZL13mrg32k3aM1Seq
.comm _ZL13mrg32k3aM1Seq,2304,32
.local _ZL16mrg32k3aM2SubSeq
.comm _ZL16mrg32k3aM2SubSeq,2016,32
.local _ZL16mrg32k3aM1SubSeq
.comm _ZL16mrg32k3aM1SubSeq,2016,32
.local _ZL10mrg32k3aM2
.comm _ZL10mrg32k3aM2,2304,32
.local _ZL10mrg32k3aM1
.comm _ZL10mrg32k3aM1,2304,32
.local _ZL28precalc_xorwow_offset_matrix
.comm _ZL28precalc_xorwow_offset_matrix,102400,32
.local _ZL21precalc_xorwow_matrix
.comm _ZL21precalc_xorwow_matrix,102400,32
.section .rodata.cst4,"aM",@progbits,4
.align 4
.LC2:
.long 1324622848
.ident "GCC: (Ubuntu 13.3.0-6ubuntu2~24.04) 13.3.0"
.section .note.GNU-stack,"",@progbits
.section .note.gnu.property,"a"
.align 8
.long 1f - 0f
.long 4f - 1f
.long 5
0:
.string "GNU"
1:
.align 8
.long 0xc0000002
.long 3f - 2f
2:
.long 0x3
3:
.align 8
4: | .text
.file "example.hip"
.globl _Z27__device_stub__setup_kernelP12hiprandState # -- Begin function _Z27__device_stub__setup_kernelP12hiprandState
.p2align 4, 0x90
.type _Z27__device_stub__setup_kernelP12hiprandState,@function
_Z27__device_stub__setup_kernelP12hiprandState: # @_Z27__device_stub__setup_kernelP12hiprandState
.cfi_startproc
# %bb.0:
subq $72, %rsp
.cfi_def_cfa_offset 80
movq %rdi, 64(%rsp)
leaq 64(%rsp), %rax
movq %rax, (%rsp)
leaq 48(%rsp), %rdi
leaq 32(%rsp), %rsi
leaq 24(%rsp), %rdx
leaq 16(%rsp), %rcx
callq __hipPopCallConfiguration
movq 48(%rsp), %rsi
movl 56(%rsp), %edx
movq 32(%rsp), %rcx
movl 40(%rsp), %r8d
movq %rsp, %r9
movl $_Z12setup_kernelP12hiprandState, %edi
pushq 16(%rsp)
.cfi_adjust_cfa_offset 8
pushq 32(%rsp)
.cfi_adjust_cfa_offset 8
callq hipLaunchKernel
addq $88, %rsp
.cfi_adjust_cfa_offset -88
retq
.Lfunc_end0:
.size _Z27__device_stub__setup_kernelP12hiprandState, .Lfunc_end0-_Z27__device_stub__setup_kernelP12hiprandState
.cfi_endproc
# -- End function
.globl _Z30__device_stub__generate_kernelP12hiprandStatePj # -- Begin function _Z30__device_stub__generate_kernelP12hiprandStatePj
.p2align 4, 0x90
.type _Z30__device_stub__generate_kernelP12hiprandStatePj,@function
_Z30__device_stub__generate_kernelP12hiprandStatePj: # @_Z30__device_stub__generate_kernelP12hiprandStatePj
.cfi_startproc
# %bb.0:
subq $88, %rsp
.cfi_def_cfa_offset 96
movq %rdi, 56(%rsp)
movq %rsi, 48(%rsp)
leaq 56(%rsp), %rax
movq %rax, 64(%rsp)
leaq 48(%rsp), %rax
movq %rax, 72(%rsp)
leaq 32(%rsp), %rdi
leaq 16(%rsp), %rsi
leaq 8(%rsp), %rdx
movq %rsp, %rcx
callq __hipPopCallConfiguration
movq 32(%rsp), %rsi
movl 40(%rsp), %edx
movq 16(%rsp), %rcx
movl 24(%rsp), %r8d
leaq 64(%rsp), %r9
movl $_Z15generate_kernelP12hiprandStatePj, %edi
pushq (%rsp)
.cfi_adjust_cfa_offset 8
pushq 16(%rsp)
.cfi_adjust_cfa_offset 8
callq hipLaunchKernel
addq $104, %rsp
.cfi_adjust_cfa_offset -104
retq
.Lfunc_end1:
.size _Z30__device_stub__generate_kernelP12hiprandStatePj, .Lfunc_end1-_Z30__device_stub__generate_kernelP12hiprandStatePj
.cfi_endproc
# -- End function
.section .rodata.cst4,"aM",@progbits,4
.p2align 2, 0x0 # -- Begin function main
.LCPI2_0:
.long 0x4ef42400 # float 2.048E+9
.text
.globl main
.p2align 4, 0x90
.type main,@function
main: # @main
.cfi_startproc
# %bb.0:
pushq %rbp
.cfi_def_cfa_offset 16
pushq %r15
.cfi_def_cfa_offset 24
pushq %r14
.cfi_def_cfa_offset 32
pushq %r13
.cfi_def_cfa_offset 40
pushq %r12
.cfi_def_cfa_offset 48
pushq %rbx
.cfi_def_cfa_offset 56
subq $104, %rsp
.cfi_def_cfa_offset 160
.cfi_offset %rbx, -56
.cfi_offset %r12, -48
.cfi_offset %r13, -40
.cfi_offset %r14, -32
.cfi_offset %r15, -24
.cfi_offset %rbp, -16
movl $4096, %edi # imm = 0x1000
movl $4, %esi
callq calloc
movq %rax, %rbx
movq %rsp, %rdi
movl $16384, %esi # imm = 0x4000
callq hipMalloc
testl %eax, %eax
je .LBB2_3
# %bb.1:
movl $.L.str, %edi
movl $.L.str.1, %esi
movl $67, %edx
jmp .LBB2_2
.LBB2_3:
movq (%rsp), %rdi
movl $16384, %edx # imm = 0x4000
xorl %esi, %esi
callq hipMemset
testl %eax, %eax
je .LBB2_5
# %bb.4:
movl $.L.str, %edi
movl $.L.str.1, %esi
movl $71, %edx
jmp .LBB2_2
.LBB2_5:
leaq 8(%rsp), %rdi
movl $196608, %esi # imm = 0x30000
callq hipMalloc
testl %eax, %eax
je .LBB2_7
# %bb.6:
movl $.L.str, %edi
movl $.L.str.1, %esi
movl $75, %edx
jmp .LBB2_2
.LBB2_7:
movabsq $4294967360, %r14 # imm = 0x100000040
movq %r14, %rdi
movl $1, %esi
movq %r14, %rdx
movl $1, %ecx
xorl %r8d, %r8d
xorl %r9d, %r9d
callq __hipPushCallConfiguration
testl %eax, %eax
jne .LBB2_9
# %bb.8:
movq 8(%rsp), %rdi
callq _Z27__device_stub__setup_kernelP12hiprandState
.LBB2_9:
movl $50, %r12d
leaq 24(%rsp), %r13
leaq 16(%rsp), %rbp
leaq 80(%rsp), %r15
jmp .LBB2_10
.p2align 4, 0x90
.LBB2_12: # in Loop: Header=BB2_10 Depth=1
decl %r12d
je .LBB2_13
.LBB2_10: # =>This Inner Loop Header: Depth=1
movq %r14, %rdi
movl $1, %esi
movq %r14, %rdx
movl $1, %ecx
xorl %r8d, %r8d
xorl %r9d, %r9d
callq __hipPushCallConfiguration
testl %eax, %eax
jne .LBB2_12
# %bb.11: # in Loop: Header=BB2_10 Depth=1
movq 8(%rsp), %rax
movq (%rsp), %rcx
movq %rax, 72(%rsp)
movq %rcx, 64(%rsp)
leaq 72(%rsp), %rax
movq %rax, 80(%rsp)
leaq 64(%rsp), %rax
movq %rax, 88(%rsp)
leaq 48(%rsp), %rdi
leaq 32(%rsp), %rsi
movq %r13, %rdx
movq %rbp, %rcx
callq __hipPopCallConfiguration
movq 48(%rsp), %rsi
movl 56(%rsp), %edx
movq 32(%rsp), %rcx
movl 40(%rsp), %r8d
movl $_Z15generate_kernelP12hiprandStatePj, %edi
movq %r15, %r9
pushq 16(%rsp)
.cfi_adjust_cfa_offset 8
pushq 32(%rsp)
.cfi_adjust_cfa_offset 8
callq hipLaunchKernel
addq $16, %rsp
.cfi_adjust_cfa_offset -16
jmp .LBB2_12
.LBB2_13:
movq (%rsp), %rsi
movl $16384, %edx # imm = 0x4000
movq %rbx, %rdi
movl $2, %ecx
callq hipMemcpy
testl %eax, %eax
je .LBB2_14
# %bb.22:
movl $.L.str, %edi
movl $.L.str.1, %esi
movl $90, %edx
jmp .LBB2_2
.LBB2_14: # %.preheader.preheader
xorl %eax, %eax
xorl %ecx, %ecx
.p2align 4, 0x90
.LBB2_15: # %.preheader
# =>This Inner Loop Header: Depth=1
addl (%rbx,%rax,4), %ecx
incq %rax
cmpq $4096, %rax # imm = 0x1000
jne .LBB2_15
# %bb.16:
movl %ecx, %eax
cvtsi2ss %rax, %xmm0
divss .LCPI2_0(%rip), %xmm0
cvtss2sd %xmm0, %xmm0
movl $.L.str.2, %edi
movb $1, %al
callq printf
movq 8(%rsp), %rdi
callq hipFree
testl %eax, %eax
je .LBB2_18
# %bb.17:
movl $.L.str, %edi
movl $.L.str.1, %esi
movl $103, %edx
jmp .LBB2_2
.LBB2_18:
movq (%rsp), %rdi
callq hipFree
testl %eax, %eax
je .LBB2_20
# %bb.19:
movl $.L.str, %edi
movl $.L.str.1, %esi
movl $104, %edx
.LBB2_2:
xorl %eax, %eax
callq printf
movl $1, %eax
.LBB2_21:
addq $104, %rsp
.cfi_def_cfa_offset 56
popq %rbx
.cfi_def_cfa_offset 48
popq %r12
.cfi_def_cfa_offset 40
popq %r13
.cfi_def_cfa_offset 32
popq %r14
.cfi_def_cfa_offset 24
popq %r15
.cfi_def_cfa_offset 16
popq %rbp
.cfi_def_cfa_offset 8
retq
.LBB2_20:
.cfi_def_cfa_offset 160
movq %rbx, %rdi
callq free
movl $.Lstr, %edi
callq puts@PLT
xorl %eax, %eax
jmp .LBB2_21
.Lfunc_end2:
.size main, .Lfunc_end2-main
.cfi_endproc
# -- End function
.p2align 4, 0x90 # -- Begin function __hip_module_ctor
.type __hip_module_ctor,@function
__hip_module_ctor: # @__hip_module_ctor
.cfi_startproc
# %bb.0:
pushq %rbx
.cfi_def_cfa_offset 16
subq $32, %rsp
.cfi_def_cfa_offset 48
.cfi_offset %rbx, -16
cmpq $0, __hip_gpubin_handle(%rip)
jne .LBB3_2
# %bb.1:
movl $__hip_fatbin_wrapper, %edi
callq __hipRegisterFatBinary
movq %rax, __hip_gpubin_handle(%rip)
.LBB3_2:
movq __hip_gpubin_handle(%rip), %rbx
xorps %xmm0, %xmm0
movups %xmm0, 16(%rsp)
movups %xmm0, (%rsp)
movl $_Z12setup_kernelP12hiprandState, %esi
movl $.L__unnamed_1, %edx
movl $.L__unnamed_1, %ecx
movq %rbx, %rdi
movl $-1, %r8d
xorl %r9d, %r9d
callq __hipRegisterFunction
xorps %xmm0, %xmm0
movups %xmm0, 16(%rsp)
movups %xmm0, (%rsp)
movl $_Z15generate_kernelP12hiprandStatePj, %esi
movl $.L__unnamed_2, %edx
movl $.L__unnamed_2, %ecx
movq %rbx, %rdi
movl $-1, %r8d
xorl %r9d, %r9d
callq __hipRegisterFunction
movl $__hip_module_dtor, %edi
addq $32, %rsp
.cfi_def_cfa_offset 16
popq %rbx
.cfi_def_cfa_offset 8
jmp atexit # TAILCALL
.Lfunc_end3:
.size __hip_module_ctor, .Lfunc_end3-__hip_module_ctor
.cfi_endproc
# -- End function
.p2align 4, 0x90 # -- Begin function __hip_module_dtor
.type __hip_module_dtor,@function
__hip_module_dtor: # @__hip_module_dtor
.cfi_startproc
# %bb.0:
movq __hip_gpubin_handle(%rip), %rdi
testq %rdi, %rdi
je .LBB4_2
# %bb.1:
pushq %rax
.cfi_def_cfa_offset 16
callq __hipUnregisterFatBinary
movq $0, __hip_gpubin_handle(%rip)
addq $8, %rsp
.cfi_def_cfa_offset 8
.LBB4_2:
retq
.Lfunc_end4:
.size __hip_module_dtor, .Lfunc_end4-__hip_module_dtor
.cfi_endproc
# -- End function
.type _Z12setup_kernelP12hiprandState,@object # @_Z12setup_kernelP12hiprandState
.section .rodata,"a",@progbits
.globl _Z12setup_kernelP12hiprandState
.p2align 3, 0x0
_Z12setup_kernelP12hiprandState:
.quad _Z27__device_stub__setup_kernelP12hiprandState
.size _Z12setup_kernelP12hiprandState, 8
.type _Z15generate_kernelP12hiprandStatePj,@object # @_Z15generate_kernelP12hiprandStatePj
.globl _Z15generate_kernelP12hiprandStatePj
.p2align 3, 0x0
_Z15generate_kernelP12hiprandStatePj:
.quad _Z30__device_stub__generate_kernelP12hiprandStatePj
.size _Z15generate_kernelP12hiprandStatePj, 8
.type .L.str,@object # @.str
.section .rodata.str1.1,"aMS",@progbits,1
.L.str:
.asciz "Error at %s:%d\n"
.size .L.str, 16
.type .L.str.1,@object # @.str.1
.L.str.1:
.asciz "/home/ubuntu/Datasets/stackv2/train-structured-repos-hip/MrJoy/where-is-everybody/master/simulator/src/etc/example.hip"
.size .L.str.1, 119
.type .L.str.2,@object # @.str.2
.L.str.2:
.asciz "Fraction with low bit set was %10.13f\n"
.size .L.str.2, 39
.type .L__unnamed_1,@object # @0
.L__unnamed_1:
.asciz "_Z12setup_kernelP12hiprandState"
.size .L__unnamed_1, 32
.type .L__unnamed_2,@object # @1
.L__unnamed_2:
.asciz "_Z15generate_kernelP12hiprandStatePj"
.size .L__unnamed_2, 37
.type __hip_fatbin_wrapper,@object # @__hip_fatbin_wrapper
.section .hipFatBinSegment,"a",@progbits
.p2align 3, 0x0
__hip_fatbin_wrapper:
.long 1212764230 # 0x48495046
.long 1 # 0x1
.quad __hip_fatbin
.quad 0
.size __hip_fatbin_wrapper, 24
.type __hip_gpubin_handle,@object # @__hip_gpubin_handle
.local __hip_gpubin_handle
.comm __hip_gpubin_handle,8,8
.section .init_array,"aw",@init_array
.p2align 3, 0x0
.quad __hip_module_ctor
.type __hip_cuid_,@object # @__hip_cuid_
.bss
.globl __hip_cuid_
__hip_cuid_:
.byte 0 # 0x0
.size __hip_cuid_, 1
.type .Lstr,@object # @str
.section .rodata.str1.1,"aMS",@progbits,1
.Lstr:
.asciz "^^^^ kernel_example PASSED"
.size .Lstr, 27
.section ".linker-options","e",@llvm_linker_options
.ident "AMD clang version 18.0.0git (https://github.com/RadeonOpenCompute/llvm-project roc-6.3.2 25012 e5bf7e55c91490b07c49d8960fa7983d864936c4)"
.section ".note.GNU-stack","",@progbits
.addrsig
.addrsig_sym _Z27__device_stub__setup_kernelP12hiprandState
.addrsig_sym _Z30__device_stub__generate_kernelP12hiprandStatePj
.addrsig_sym __hip_module_ctor
.addrsig_sym __hip_module_dtor
.addrsig_sym _Z12setup_kernelP12hiprandState
.addrsig_sym _Z15generate_kernelP12hiprandStatePj
.addrsig_sym __hip_fatbin
.addrsig_sym __hip_fatbin_wrapper
.addrsig_sym __hip_cuid_ |
You are a helpful coding assistant specialized in converting CUDA source code to CUDA device assembly. | #include "cuda_runtime.h"
#include "device_launch_parameters.h"
#include <stdio.h>
#include <math.h>
#include <iostream>
__global__ void transposeMatrix(const int *a, const int *b)
{
int idx = blockIdx.x * blockDim.x + threadIdx.x;
}
int main()
{
const int MATRIX_SIZE = 3;
const int N = MATRIX_SIZE * MATRIX_SIZE;
float *a, *b, *c;
cudaMallocManaged(&a, N * sizeof(float));
cudaMallocManaged(&b, N * sizeof(float));
for (int i = 0; i < N; ++i)
{
a[i] = 1.0f;
b[i] = 2.0f;
}
return 0;
} | code for sm_80
Function : _Z15transposeMatrixPKiS0_
.headerflags @"EF_CUDA_TEXMODE_UNIFIED EF_CUDA_64BIT_ADDRESS EF_CUDA_SM80 EF_CUDA_VIRTUAL_SM(EF_CUDA_SM80)"
/*0000*/ MOV R1, c[0x0][0x28] ; /* 0x00000a0000017a02 */
/* 0x000fe40000000f00 */
/*0010*/ EXIT ; /* 0x000000000000794d */
/* 0x000fea0003800000 */
/*0020*/ BRA 0x20; /* 0xfffffff000007947 */
/* 0x000fc0000383ffff */
/*0030*/ NOP; /* 0x0000000000007918 */
/* 0x000fc00000000000 */
/*0040*/ NOP; /* 0x0000000000007918 */
/* 0x000fc00000000000 */
/*0050*/ NOP; /* 0x0000000000007918 */
/* 0x000fc00000000000 */
/*0060*/ NOP; /* 0x0000000000007918 */
/* 0x000fc00000000000 */
/*0070*/ NOP; /* 0x0000000000007918 */
/* 0x000fc00000000000 */
/*0080*/ NOP; /* 0x0000000000007918 */
/* 0x000fc00000000000 */
/*0090*/ NOP; /* 0x0000000000007918 */
/* 0x000fc00000000000 */
/*00a0*/ NOP; /* 0x0000000000007918 */
/* 0x000fc00000000000 */
/*00b0*/ NOP; /* 0x0000000000007918 */
/* 0x000fc00000000000 */
/*00c0*/ NOP; /* 0x0000000000007918 */
/* 0x000fc00000000000 */
/*00d0*/ NOP; /* 0x0000000000007918 */
/* 0x000fc00000000000 */
/*00e0*/ NOP; /* 0x0000000000007918 */
/* 0x000fc00000000000 */
/*00f0*/ NOP; /* 0x0000000000007918 */
/* 0x000fc00000000000 */
.......... |
You are a helpful coding assistant specialized in converting CUDA source code to CUDA host assembly. | #include "cuda_runtime.h"
#include "device_launch_parameters.h"
#include <stdio.h>
#include <math.h>
#include <iostream>
__global__ void transposeMatrix(const int *a, const int *b)
{
int idx = blockIdx.x * blockDim.x + threadIdx.x;
}
int main()
{
const int MATRIX_SIZE = 3;
const int N = MATRIX_SIZE * MATRIX_SIZE;
float *a, *b, *c;
cudaMallocManaged(&a, N * sizeof(float));
cudaMallocManaged(&b, N * sizeof(float));
for (int i = 0; i < N; ++i)
{
a[i] = 1.0f;
b[i] = 2.0f;
}
return 0;
} | .file "tmpxft_001605a9_00000000-6_kernel.cudafe1.cpp"
.text
#APP
.globl _ZSt21ios_base_library_initv
#NO_APP
.type _ZL26__cudaUnregisterBinaryUtilv, @function
_ZL26__cudaUnregisterBinaryUtilv:
.LFB3672:
.cfi_startproc
endbr64
subq $8, %rsp
.cfi_def_cfa_offset 16
movq _ZL20__cudaFatCubinHandle(%rip), %rdi
call __cudaUnregisterFatBinary@PLT
addq $8, %rsp
.cfi_def_cfa_offset 8
ret
.cfi_endproc
.LFE3672:
.size _ZL26__cudaUnregisterBinaryUtilv, .-_ZL26__cudaUnregisterBinaryUtilv
.globl main
.type main, @function
main:
.LFB3669:
.cfi_startproc
endbr64
subq $40, %rsp
.cfi_def_cfa_offset 48
movq %fs:40, %rax
movq %rax, 24(%rsp)
xorl %eax, %eax
leaq 8(%rsp), %rdi
movl $1, %edx
movl $36, %esi
call cudaMallocManaged@PLT
leaq 16(%rsp), %rdi
movl $1, %edx
movl $36, %esi
call cudaMallocManaged@PLT
movl $0, %eax
movss .LC0(%rip), %xmm1
movss .LC1(%rip), %xmm0
.L4:
movq 8(%rsp), %rdx
movss %xmm1, (%rdx,%rax)
movq 16(%rsp), %rdx
movss %xmm0, (%rdx,%rax)
addq $4, %rax
cmpq $36, %rax
jne .L4
movq 24(%rsp), %rax
subq %fs:40, %rax
jne .L8
movl $0, %eax
addq $40, %rsp
.cfi_remember_state
.cfi_def_cfa_offset 8
ret
.L8:
.cfi_restore_state
call __stack_chk_fail@PLT
.cfi_endproc
.LFE3669:
.size main, .-main
.globl _Z39__device_stub__Z15transposeMatrixPKiS0_PKiS0_
.type _Z39__device_stub__Z15transposeMatrixPKiS0_PKiS0_, @function
_Z39__device_stub__Z15transposeMatrixPKiS0_PKiS0_:
.LFB3694:
.cfi_startproc
endbr64
subq $120, %rsp
.cfi_def_cfa_offset 128
movq %rdi, 8(%rsp)
movq %rsi, (%rsp)
movq %fs:40, %rax
movq %rax, 104(%rsp)
xorl %eax, %eax
leaq 8(%rsp), %rax
movq %rax, 80(%rsp)
movq %rsp, %rax
movq %rax, 88(%rsp)
movl $1, 32(%rsp)
movl $1, 36(%rsp)
movl $1, 40(%rsp)
movl $1, 44(%rsp)
movl $1, 48(%rsp)
movl $1, 52(%rsp)
leaq 24(%rsp), %rcx
leaq 16(%rsp), %rdx
leaq 44(%rsp), %rsi
leaq 32(%rsp), %rdi
call __cudaPopCallConfiguration@PLT
testl %eax, %eax
je .L13
.L9:
movq 104(%rsp), %rax
subq %fs:40, %rax
jne .L14
addq $120, %rsp
.cfi_remember_state
.cfi_def_cfa_offset 8
ret
.L13:
.cfi_restore_state
pushq 24(%rsp)
.cfi_def_cfa_offset 136
pushq 24(%rsp)
.cfi_def_cfa_offset 144
leaq 96(%rsp), %r9
movq 60(%rsp), %rcx
movl 68(%rsp), %r8d
movq 48(%rsp), %rsi
movl 56(%rsp), %edx
leaq _Z15transposeMatrixPKiS0_(%rip), %rdi
call cudaLaunchKernel@PLT
addq $16, %rsp
.cfi_def_cfa_offset 128
jmp .L9
.L14:
call __stack_chk_fail@PLT
.cfi_endproc
.LFE3694:
.size _Z39__device_stub__Z15transposeMatrixPKiS0_PKiS0_, .-_Z39__device_stub__Z15transposeMatrixPKiS0_PKiS0_
.globl _Z15transposeMatrixPKiS0_
.type _Z15transposeMatrixPKiS0_, @function
_Z15transposeMatrixPKiS0_:
.LFB3695:
.cfi_startproc
endbr64
subq $8, %rsp
.cfi_def_cfa_offset 16
call _Z39__device_stub__Z15transposeMatrixPKiS0_PKiS0_
addq $8, %rsp
.cfi_def_cfa_offset 8
ret
.cfi_endproc
.LFE3695:
.size _Z15transposeMatrixPKiS0_, .-_Z15transposeMatrixPKiS0_
.section .rodata.str1.1,"aMS",@progbits,1
.LC2:
.string "_Z15transposeMatrixPKiS0_"
.text
.type _ZL24__sti____cudaRegisterAllv, @function
_ZL24__sti____cudaRegisterAllv:
.LFB3697:
.cfi_startproc
endbr64
subq $8, %rsp
.cfi_def_cfa_offset 16
leaq _ZL15__fatDeviceText(%rip), %rdi
call __cudaRegisterFatBinary@PLT
movq %rax, %rdi
movq %rax, _ZL20__cudaFatCubinHandle(%rip)
pushq $0
.cfi_def_cfa_offset 24
pushq $0
.cfi_def_cfa_offset 32
pushq $0
.cfi_def_cfa_offset 40
pushq $0
.cfi_def_cfa_offset 48
movl $0, %r9d
movl $-1, %r8d
leaq .LC2(%rip), %rdx
movq %rdx, %rcx
leaq _Z15transposeMatrixPKiS0_(%rip), %rsi
call __cudaRegisterFunction@PLT
addq $32, %rsp
.cfi_def_cfa_offset 16
movq _ZL20__cudaFatCubinHandle(%rip), %rdi
call __cudaRegisterFatBinaryEnd@PLT
leaq _ZL26__cudaUnregisterBinaryUtilv(%rip), %rdi
call atexit@PLT
addq $8, %rsp
.cfi_def_cfa_offset 8
ret
.cfi_endproc
.LFE3697:
.size _ZL24__sti____cudaRegisterAllv, .-_ZL24__sti____cudaRegisterAllv
.section .init_array,"aw"
.align 8
.quad _ZL24__sti____cudaRegisterAllv
.section .nvFatBinSegment,"aw"
.align 8
.type _ZL15__fatDeviceText, @object
.size _ZL15__fatDeviceText, 24
_ZL15__fatDeviceText:
.long 1180844977
.long 1
.quad fatbinData
.quad 0
.local _ZL20__cudaFatCubinHandle
.comm _ZL20__cudaFatCubinHandle,8,8
.section .rodata.cst4,"aM",@progbits,4
.align 4
.LC0:
.long 1065353216
.align 4
.LC1:
.long 1073741824
.ident "GCC: (Ubuntu 13.3.0-6ubuntu2~24.04) 13.3.0"
.section .note.GNU-stack,"",@progbits
.section .note.gnu.property,"a"
.align 8
.long 1f - 0f
.long 4f - 1f
.long 5
0:
.string "GNU"
1:
.align 8
.long 0xc0000002
.long 3f - 2f
2:
.long 0x3
3:
.align 8
4: |
You are a helpful coding assistant specialized in converting CUDA source code to HIP/AMD source code. | #include "cuda_runtime.h"
#include "device_launch_parameters.h"
#include <stdio.h>
#include <math.h>
#include <iostream>
__global__ void transposeMatrix(const int *a, const int *b)
{
int idx = blockIdx.x * blockDim.x + threadIdx.x;
}
int main()
{
const int MATRIX_SIZE = 3;
const int N = MATRIX_SIZE * MATRIX_SIZE;
float *a, *b, *c;
cudaMallocManaged(&a, N * sizeof(float));
cudaMallocManaged(&b, N * sizeof(float));
for (int i = 0; i < N; ++i)
{
a[i] = 1.0f;
b[i] = 2.0f;
}
return 0;
} | #include "hip/hip_runtime.h"
#include <stdio.h>
#include <math.h>
#include <iostream>
__global__ void transposeMatrix(const int *a, const int *b)
{
int idx = blockIdx.x * blockDim.x + threadIdx.x;
}
int main()
{
const int MATRIX_SIZE = 3;
const int N = MATRIX_SIZE * MATRIX_SIZE;
float *a, *b, *c;
hipMallocManaged(&a, N * sizeof(float));
hipMallocManaged(&b, N * sizeof(float));
for (int i = 0; i < N; ++i)
{
a[i] = 1.0f;
b[i] = 2.0f;
}
return 0;
} |
You are a helpful coding assistant specialized in converting HIP source code to AMD device assembly. | #include "hip/hip_runtime.h"
#include <stdio.h>
#include <math.h>
#include <iostream>
__global__ void transposeMatrix(const int *a, const int *b)
{
int idx = blockIdx.x * blockDim.x + threadIdx.x;
}
int main()
{
const int MATRIX_SIZE = 3;
const int N = MATRIX_SIZE * MATRIX_SIZE;
float *a, *b, *c;
hipMallocManaged(&a, N * sizeof(float));
hipMallocManaged(&b, N * sizeof(float));
for (int i = 0; i < N; ++i)
{
a[i] = 1.0f;
b[i] = 2.0f;
}
return 0;
} | .text
.amdgcn_target "amdgcn-amd-amdhsa--gfx1100"
.protected _Z15transposeMatrixPKiS0_
.globl _Z15transposeMatrixPKiS0_
.p2align 8
.type _Z15transposeMatrixPKiS0_,@function
_Z15transposeMatrixPKiS0_:
s_endpgm
.section .rodata,"a",@progbits
.p2align 6, 0x0
.amdhsa_kernel _Z15transposeMatrixPKiS0_
.amdhsa_group_segment_fixed_size 0
.amdhsa_private_segment_fixed_size 0
.amdhsa_kernarg_size 16
.amdhsa_user_sgpr_count 15
.amdhsa_user_sgpr_dispatch_ptr 0
.amdhsa_user_sgpr_queue_ptr 0
.amdhsa_user_sgpr_kernarg_segment_ptr 1
.amdhsa_user_sgpr_dispatch_id 0
.amdhsa_user_sgpr_private_segment_size 0
.amdhsa_wavefront_size32 1
.amdhsa_uses_dynamic_stack 0
.amdhsa_enable_private_segment 0
.amdhsa_system_sgpr_workgroup_id_x 1
.amdhsa_system_sgpr_workgroup_id_y 0
.amdhsa_system_sgpr_workgroup_id_z 0
.amdhsa_system_sgpr_workgroup_info 0
.amdhsa_system_vgpr_workitem_id 0
.amdhsa_next_free_vgpr 1
.amdhsa_next_free_sgpr 1
.amdhsa_reserve_vcc 0
.amdhsa_float_round_mode_32 0
.amdhsa_float_round_mode_16_64 0
.amdhsa_float_denorm_mode_32 3
.amdhsa_float_denorm_mode_16_64 3
.amdhsa_dx10_clamp 1
.amdhsa_ieee_mode 1
.amdhsa_fp16_overflow 0
.amdhsa_workgroup_processor_mode 1
.amdhsa_memory_ordered 1
.amdhsa_forward_progress 0
.amdhsa_shared_vgpr_count 0
.amdhsa_exception_fp_ieee_invalid_op 0
.amdhsa_exception_fp_denorm_src 0
.amdhsa_exception_fp_ieee_div_zero 0
.amdhsa_exception_fp_ieee_overflow 0
.amdhsa_exception_fp_ieee_underflow 0
.amdhsa_exception_fp_ieee_inexact 0
.amdhsa_exception_int_div_zero 0
.end_amdhsa_kernel
.text
.Lfunc_end0:
.size _Z15transposeMatrixPKiS0_, .Lfunc_end0-_Z15transposeMatrixPKiS0_
.section .AMDGPU.csdata,"",@progbits
.text
.p2alignl 7, 3214868480
.fill 96, 4, 3214868480
.type __hip_cuid_,@object
.section .bss,"aw",@nobits
.globl __hip_cuid_
__hip_cuid_:
.byte 0
.size __hip_cuid_, 1
.ident "AMD clang version 18.0.0git (https://github.com/RadeonOpenCompute/llvm-project roc-6.3.2 25012 e5bf7e55c91490b07c49d8960fa7983d864936c4)"
.section ".note.GNU-stack","",@progbits
.addrsig
.addrsig_sym __hip_cuid_
.amdgpu_metadata
---
amdhsa.kernels:
- .args:
- .address_space: global
.offset: 0
.size: 8
.value_kind: global_buffer
- .address_space: global
.offset: 8
.size: 8
.value_kind: global_buffer
.group_segment_fixed_size: 0
.kernarg_segment_align: 8
.kernarg_segment_size: 16
.language: OpenCL C
.language_version:
- 2
- 0
.max_flat_workgroup_size: 1024
.name: _Z15transposeMatrixPKiS0_
.private_segment_fixed_size: 0
.sgpr_count: 0
.sgpr_spill_count: 0
.symbol: _Z15transposeMatrixPKiS0_.kd
.uniform_work_group_size: 1
.uses_dynamic_stack: false
.vgpr_count: 0
.vgpr_spill_count: 0
.wavefront_size: 32
.workgroup_processor_mode: 1
amdhsa.target: amdgcn-amd-amdhsa--gfx1100
amdhsa.version:
- 1
- 2
...
.end_amdgpu_metadata |
You are a helpful coding assistant specialized in converting HIP source code to AMD host assembly. | #include "hip/hip_runtime.h"
#include <stdio.h>
#include <math.h>
#include <iostream>
__global__ void transposeMatrix(const int *a, const int *b)
{
int idx = blockIdx.x * blockDim.x + threadIdx.x;
}
int main()
{
const int MATRIX_SIZE = 3;
const int N = MATRIX_SIZE * MATRIX_SIZE;
float *a, *b, *c;
hipMallocManaged(&a, N * sizeof(float));
hipMallocManaged(&b, N * sizeof(float));
for (int i = 0; i < N; ++i)
{
a[i] = 1.0f;
b[i] = 2.0f;
}
return 0;
} | .text
.file "kernel.hip"
# Start of file scope inline assembly
.globl _ZSt21ios_base_library_initv
# End of file scope inline assembly
.globl _Z30__device_stub__transposeMatrixPKiS0_ # -- Begin function _Z30__device_stub__transposeMatrixPKiS0_
.p2align 4, 0x90
.type _Z30__device_stub__transposeMatrixPKiS0_,@function
_Z30__device_stub__transposeMatrixPKiS0_: # @_Z30__device_stub__transposeMatrixPKiS0_
.cfi_startproc
# %bb.0:
subq $88, %rsp
.cfi_def_cfa_offset 96
movq %rdi, 56(%rsp)
movq %rsi, 48(%rsp)
leaq 56(%rsp), %rax
movq %rax, 64(%rsp)
leaq 48(%rsp), %rax
movq %rax, 72(%rsp)
leaq 32(%rsp), %rdi
leaq 16(%rsp), %rsi
leaq 8(%rsp), %rdx
movq %rsp, %rcx
callq __hipPopCallConfiguration
movq 32(%rsp), %rsi
movl 40(%rsp), %edx
movq 16(%rsp), %rcx
movl 24(%rsp), %r8d
leaq 64(%rsp), %r9
movl $_Z15transposeMatrixPKiS0_, %edi
pushq (%rsp)
.cfi_adjust_cfa_offset 8
pushq 16(%rsp)
.cfi_adjust_cfa_offset 8
callq hipLaunchKernel
addq $104, %rsp
.cfi_adjust_cfa_offset -104
retq
.Lfunc_end0:
.size _Z30__device_stub__transposeMatrixPKiS0_, .Lfunc_end0-_Z30__device_stub__transposeMatrixPKiS0_
.cfi_endproc
# -- End function
.globl main # -- Begin function main
.p2align 4, 0x90
.type main,@function
main: # @main
.cfi_startproc
# %bb.0:
subq $24, %rsp
.cfi_def_cfa_offset 32
leaq 16(%rsp), %rdi
movl $36, %esi
movl $1, %edx
callq hipMallocManaged
leaq 8(%rsp), %rdi
movl $36, %esi
movl $1, %edx
callq hipMallocManaged
movq 16(%rsp), %rax
xorl %ecx, %ecx
movq 8(%rsp), %rdx
.p2align 4, 0x90
.LBB1_1: # =>This Inner Loop Header: Depth=1
movl $1065353216, (%rax,%rcx,4) # imm = 0x3F800000
movl $1073741824, (%rdx,%rcx,4) # imm = 0x40000000
incq %rcx
cmpq $9, %rcx
jne .LBB1_1
# %bb.2:
xorl %eax, %eax
addq $24, %rsp
.cfi_def_cfa_offset 8
retq
.Lfunc_end1:
.size main, .Lfunc_end1-main
.cfi_endproc
# -- End function
.p2align 4, 0x90 # -- Begin function __hip_module_ctor
.type __hip_module_ctor,@function
__hip_module_ctor: # @__hip_module_ctor
.cfi_startproc
# %bb.0:
subq $40, %rsp
.cfi_def_cfa_offset 48
cmpq $0, __hip_gpubin_handle(%rip)
jne .LBB2_2
# %bb.1:
movl $__hip_fatbin_wrapper, %edi
callq __hipRegisterFatBinary
movq %rax, __hip_gpubin_handle(%rip)
.LBB2_2:
movq __hip_gpubin_handle(%rip), %rdi
xorps %xmm0, %xmm0
movups %xmm0, 16(%rsp)
movups %xmm0, (%rsp)
movl $_Z15transposeMatrixPKiS0_, %esi
movl $.L__unnamed_1, %edx
movl $.L__unnamed_1, %ecx
movl $-1, %r8d
xorl %r9d, %r9d
callq __hipRegisterFunction
movl $__hip_module_dtor, %edi
addq $40, %rsp
.cfi_def_cfa_offset 8
jmp atexit # TAILCALL
.Lfunc_end2:
.size __hip_module_ctor, .Lfunc_end2-__hip_module_ctor
.cfi_endproc
# -- End function
.p2align 4, 0x90 # -- Begin function __hip_module_dtor
.type __hip_module_dtor,@function
__hip_module_dtor: # @__hip_module_dtor
.cfi_startproc
# %bb.0:
movq __hip_gpubin_handle(%rip), %rdi
testq %rdi, %rdi
je .LBB3_2
# %bb.1:
pushq %rax
.cfi_def_cfa_offset 16
callq __hipUnregisterFatBinary
movq $0, __hip_gpubin_handle(%rip)
addq $8, %rsp
.cfi_def_cfa_offset 8
.LBB3_2:
retq
.Lfunc_end3:
.size __hip_module_dtor, .Lfunc_end3-__hip_module_dtor
.cfi_endproc
# -- End function
.type _Z15transposeMatrixPKiS0_,@object # @_Z15transposeMatrixPKiS0_
.section .rodata,"a",@progbits
.globl _Z15transposeMatrixPKiS0_
.p2align 3, 0x0
_Z15transposeMatrixPKiS0_:
.quad _Z30__device_stub__transposeMatrixPKiS0_
.size _Z15transposeMatrixPKiS0_, 8
.type .L__unnamed_1,@object # @0
.section .rodata.str1.1,"aMS",@progbits,1
.L__unnamed_1:
.asciz "_Z15transposeMatrixPKiS0_"
.size .L__unnamed_1, 26
.type __hip_fatbin_wrapper,@object # @__hip_fatbin_wrapper
.section .hipFatBinSegment,"a",@progbits
.p2align 3, 0x0
__hip_fatbin_wrapper:
.long 1212764230 # 0x48495046
.long 1 # 0x1
.quad __hip_fatbin
.quad 0
.size __hip_fatbin_wrapper, 24
.type __hip_gpubin_handle,@object # @__hip_gpubin_handle
.local __hip_gpubin_handle
.comm __hip_gpubin_handle,8,8
.section .init_array,"aw",@init_array
.p2align 3, 0x0
.quad __hip_module_ctor
.type __hip_cuid_,@object # @__hip_cuid_
.bss
.globl __hip_cuid_
__hip_cuid_:
.byte 0 # 0x0
.size __hip_cuid_, 1
.section ".linker-options","e",@llvm_linker_options
.ident "AMD clang version 18.0.0git (https://github.com/RadeonOpenCompute/llvm-project roc-6.3.2 25012 e5bf7e55c91490b07c49d8960fa7983d864936c4)"
.section ".note.GNU-stack","",@progbits
.addrsig
.addrsig_sym _Z30__device_stub__transposeMatrixPKiS0_
.addrsig_sym __hip_module_ctor
.addrsig_sym __hip_module_dtor
.addrsig_sym _Z15transposeMatrixPKiS0_
.addrsig_sym __hip_fatbin
.addrsig_sym __hip_fatbin_wrapper
.addrsig_sym __hip_cuid_ |
You are a helpful coding assistant specialized in converting from CUDA device assembly to AMD device assembly. | code for sm_80
Function : _Z15transposeMatrixPKiS0_
.headerflags @"EF_CUDA_TEXMODE_UNIFIED EF_CUDA_64BIT_ADDRESS EF_CUDA_SM80 EF_CUDA_VIRTUAL_SM(EF_CUDA_SM80)"
/*0000*/ MOV R1, c[0x0][0x28] ; /* 0x00000a0000017a02 */
/* 0x000fe40000000f00 */
/*0010*/ EXIT ; /* 0x000000000000794d */
/* 0x000fea0003800000 */
/*0020*/ BRA 0x20; /* 0xfffffff000007947 */
/* 0x000fc0000383ffff */
/*0030*/ NOP; /* 0x0000000000007918 */
/* 0x000fc00000000000 */
/*0040*/ NOP; /* 0x0000000000007918 */
/* 0x000fc00000000000 */
/*0050*/ NOP; /* 0x0000000000007918 */
/* 0x000fc00000000000 */
/*0060*/ NOP; /* 0x0000000000007918 */
/* 0x000fc00000000000 */
/*0070*/ NOP; /* 0x0000000000007918 */
/* 0x000fc00000000000 */
/*0080*/ NOP; /* 0x0000000000007918 */
/* 0x000fc00000000000 */
/*0090*/ NOP; /* 0x0000000000007918 */
/* 0x000fc00000000000 */
/*00a0*/ NOP; /* 0x0000000000007918 */
/* 0x000fc00000000000 */
/*00b0*/ NOP; /* 0x0000000000007918 */
/* 0x000fc00000000000 */
/*00c0*/ NOP; /* 0x0000000000007918 */
/* 0x000fc00000000000 */
/*00d0*/ NOP; /* 0x0000000000007918 */
/* 0x000fc00000000000 */
/*00e0*/ NOP; /* 0x0000000000007918 */
/* 0x000fc00000000000 */
/*00f0*/ NOP; /* 0x0000000000007918 */
/* 0x000fc00000000000 */
.......... | .text
.amdgcn_target "amdgcn-amd-amdhsa--gfx1100"
.protected _Z15transposeMatrixPKiS0_
.globl _Z15transposeMatrixPKiS0_
.p2align 8
.type _Z15transposeMatrixPKiS0_,@function
_Z15transposeMatrixPKiS0_:
s_endpgm
.section .rodata,"a",@progbits
.p2align 6, 0x0
.amdhsa_kernel _Z15transposeMatrixPKiS0_
.amdhsa_group_segment_fixed_size 0
.amdhsa_private_segment_fixed_size 0
.amdhsa_kernarg_size 16
.amdhsa_user_sgpr_count 15
.amdhsa_user_sgpr_dispatch_ptr 0
.amdhsa_user_sgpr_queue_ptr 0
.amdhsa_user_sgpr_kernarg_segment_ptr 1
.amdhsa_user_sgpr_dispatch_id 0
.amdhsa_user_sgpr_private_segment_size 0
.amdhsa_wavefront_size32 1
.amdhsa_uses_dynamic_stack 0
.amdhsa_enable_private_segment 0
.amdhsa_system_sgpr_workgroup_id_x 1
.amdhsa_system_sgpr_workgroup_id_y 0
.amdhsa_system_sgpr_workgroup_id_z 0
.amdhsa_system_sgpr_workgroup_info 0
.amdhsa_system_vgpr_workitem_id 0
.amdhsa_next_free_vgpr 1
.amdhsa_next_free_sgpr 1
.amdhsa_reserve_vcc 0
.amdhsa_float_round_mode_32 0
.amdhsa_float_round_mode_16_64 0
.amdhsa_float_denorm_mode_32 3
.amdhsa_float_denorm_mode_16_64 3
.amdhsa_dx10_clamp 1
.amdhsa_ieee_mode 1
.amdhsa_fp16_overflow 0
.amdhsa_workgroup_processor_mode 1
.amdhsa_memory_ordered 1
.amdhsa_forward_progress 0
.amdhsa_shared_vgpr_count 0
.amdhsa_exception_fp_ieee_invalid_op 0
.amdhsa_exception_fp_denorm_src 0
.amdhsa_exception_fp_ieee_div_zero 0
.amdhsa_exception_fp_ieee_overflow 0
.amdhsa_exception_fp_ieee_underflow 0
.amdhsa_exception_fp_ieee_inexact 0
.amdhsa_exception_int_div_zero 0
.end_amdhsa_kernel
.text
.Lfunc_end0:
.size _Z15transposeMatrixPKiS0_, .Lfunc_end0-_Z15transposeMatrixPKiS0_
.section .AMDGPU.csdata,"",@progbits
.text
.p2alignl 7, 3214868480
.fill 96, 4, 3214868480
.type __hip_cuid_,@object
.section .bss,"aw",@nobits
.globl __hip_cuid_
__hip_cuid_:
.byte 0
.size __hip_cuid_, 1
.ident "AMD clang version 18.0.0git (https://github.com/RadeonOpenCompute/llvm-project roc-6.3.2 25012 e5bf7e55c91490b07c49d8960fa7983d864936c4)"
.section ".note.GNU-stack","",@progbits
.addrsig
.addrsig_sym __hip_cuid_
.amdgpu_metadata
---
amdhsa.kernels:
- .args:
- .address_space: global
.offset: 0
.size: 8
.value_kind: global_buffer
- .address_space: global
.offset: 8
.size: 8
.value_kind: global_buffer
.group_segment_fixed_size: 0
.kernarg_segment_align: 8
.kernarg_segment_size: 16
.language: OpenCL C
.language_version:
- 2
- 0
.max_flat_workgroup_size: 1024
.name: _Z15transposeMatrixPKiS0_
.private_segment_fixed_size: 0
.sgpr_count: 0
.sgpr_spill_count: 0
.symbol: _Z15transposeMatrixPKiS0_.kd
.uniform_work_group_size: 1
.uses_dynamic_stack: false
.vgpr_count: 0
.vgpr_spill_count: 0
.wavefront_size: 32
.workgroup_processor_mode: 1
amdhsa.target: amdgcn-amd-amdhsa--gfx1100
amdhsa.version:
- 1
- 2
...
.end_amdgpu_metadata |
You are a helpful coding assistant specialized in converting from CUDA host assembly to AMD host assembly. | .file "tmpxft_001605a9_00000000-6_kernel.cudafe1.cpp"
.text
#APP
.globl _ZSt21ios_base_library_initv
#NO_APP
.type _ZL26__cudaUnregisterBinaryUtilv, @function
_ZL26__cudaUnregisterBinaryUtilv:
.LFB3672:
.cfi_startproc
endbr64
subq $8, %rsp
.cfi_def_cfa_offset 16
movq _ZL20__cudaFatCubinHandle(%rip), %rdi
call __cudaUnregisterFatBinary@PLT
addq $8, %rsp
.cfi_def_cfa_offset 8
ret
.cfi_endproc
.LFE3672:
.size _ZL26__cudaUnregisterBinaryUtilv, .-_ZL26__cudaUnregisterBinaryUtilv
.globl main
.type main, @function
main:
.LFB3669:
.cfi_startproc
endbr64
subq $40, %rsp
.cfi_def_cfa_offset 48
movq %fs:40, %rax
movq %rax, 24(%rsp)
xorl %eax, %eax
leaq 8(%rsp), %rdi
movl $1, %edx
movl $36, %esi
call cudaMallocManaged@PLT
leaq 16(%rsp), %rdi
movl $1, %edx
movl $36, %esi
call cudaMallocManaged@PLT
movl $0, %eax
movss .LC0(%rip), %xmm1
movss .LC1(%rip), %xmm0
.L4:
movq 8(%rsp), %rdx
movss %xmm1, (%rdx,%rax)
movq 16(%rsp), %rdx
movss %xmm0, (%rdx,%rax)
addq $4, %rax
cmpq $36, %rax
jne .L4
movq 24(%rsp), %rax
subq %fs:40, %rax
jne .L8
movl $0, %eax
addq $40, %rsp
.cfi_remember_state
.cfi_def_cfa_offset 8
ret
.L8:
.cfi_restore_state
call __stack_chk_fail@PLT
.cfi_endproc
.LFE3669:
.size main, .-main
.globl _Z39__device_stub__Z15transposeMatrixPKiS0_PKiS0_
.type _Z39__device_stub__Z15transposeMatrixPKiS0_PKiS0_, @function
_Z39__device_stub__Z15transposeMatrixPKiS0_PKiS0_:
.LFB3694:
.cfi_startproc
endbr64
subq $120, %rsp
.cfi_def_cfa_offset 128
movq %rdi, 8(%rsp)
movq %rsi, (%rsp)
movq %fs:40, %rax
movq %rax, 104(%rsp)
xorl %eax, %eax
leaq 8(%rsp), %rax
movq %rax, 80(%rsp)
movq %rsp, %rax
movq %rax, 88(%rsp)
movl $1, 32(%rsp)
movl $1, 36(%rsp)
movl $1, 40(%rsp)
movl $1, 44(%rsp)
movl $1, 48(%rsp)
movl $1, 52(%rsp)
leaq 24(%rsp), %rcx
leaq 16(%rsp), %rdx
leaq 44(%rsp), %rsi
leaq 32(%rsp), %rdi
call __cudaPopCallConfiguration@PLT
testl %eax, %eax
je .L13
.L9:
movq 104(%rsp), %rax
subq %fs:40, %rax
jne .L14
addq $120, %rsp
.cfi_remember_state
.cfi_def_cfa_offset 8
ret
.L13:
.cfi_restore_state
pushq 24(%rsp)
.cfi_def_cfa_offset 136
pushq 24(%rsp)
.cfi_def_cfa_offset 144
leaq 96(%rsp), %r9
movq 60(%rsp), %rcx
movl 68(%rsp), %r8d
movq 48(%rsp), %rsi
movl 56(%rsp), %edx
leaq _Z15transposeMatrixPKiS0_(%rip), %rdi
call cudaLaunchKernel@PLT
addq $16, %rsp
.cfi_def_cfa_offset 128
jmp .L9
.L14:
call __stack_chk_fail@PLT
.cfi_endproc
.LFE3694:
.size _Z39__device_stub__Z15transposeMatrixPKiS0_PKiS0_, .-_Z39__device_stub__Z15transposeMatrixPKiS0_PKiS0_
.globl _Z15transposeMatrixPKiS0_
.type _Z15transposeMatrixPKiS0_, @function
_Z15transposeMatrixPKiS0_:
.LFB3695:
.cfi_startproc
endbr64
subq $8, %rsp
.cfi_def_cfa_offset 16
call _Z39__device_stub__Z15transposeMatrixPKiS0_PKiS0_
addq $8, %rsp
.cfi_def_cfa_offset 8
ret
.cfi_endproc
.LFE3695:
.size _Z15transposeMatrixPKiS0_, .-_Z15transposeMatrixPKiS0_
.section .rodata.str1.1,"aMS",@progbits,1
.LC2:
.string "_Z15transposeMatrixPKiS0_"
.text
.type _ZL24__sti____cudaRegisterAllv, @function
_ZL24__sti____cudaRegisterAllv:
.LFB3697:
.cfi_startproc
endbr64
subq $8, %rsp
.cfi_def_cfa_offset 16
leaq _ZL15__fatDeviceText(%rip), %rdi
call __cudaRegisterFatBinary@PLT
movq %rax, %rdi
movq %rax, _ZL20__cudaFatCubinHandle(%rip)
pushq $0
.cfi_def_cfa_offset 24
pushq $0
.cfi_def_cfa_offset 32
pushq $0
.cfi_def_cfa_offset 40
pushq $0
.cfi_def_cfa_offset 48
movl $0, %r9d
movl $-1, %r8d
leaq .LC2(%rip), %rdx
movq %rdx, %rcx
leaq _Z15transposeMatrixPKiS0_(%rip), %rsi
call __cudaRegisterFunction@PLT
addq $32, %rsp
.cfi_def_cfa_offset 16
movq _ZL20__cudaFatCubinHandle(%rip), %rdi
call __cudaRegisterFatBinaryEnd@PLT
leaq _ZL26__cudaUnregisterBinaryUtilv(%rip), %rdi
call atexit@PLT
addq $8, %rsp
.cfi_def_cfa_offset 8
ret
.cfi_endproc
.LFE3697:
.size _ZL24__sti____cudaRegisterAllv, .-_ZL24__sti____cudaRegisterAllv
.section .init_array,"aw"
.align 8
.quad _ZL24__sti____cudaRegisterAllv
.section .nvFatBinSegment,"aw"
.align 8
.type _ZL15__fatDeviceText, @object
.size _ZL15__fatDeviceText, 24
_ZL15__fatDeviceText:
.long 1180844977
.long 1
.quad fatbinData
.quad 0
.local _ZL20__cudaFatCubinHandle
.comm _ZL20__cudaFatCubinHandle,8,8
.section .rodata.cst4,"aM",@progbits,4
.align 4
.LC0:
.long 1065353216
.align 4
.LC1:
.long 1073741824
.ident "GCC: (Ubuntu 13.3.0-6ubuntu2~24.04) 13.3.0"
.section .note.GNU-stack,"",@progbits
.section .note.gnu.property,"a"
.align 8
.long 1f - 0f
.long 4f - 1f
.long 5
0:
.string "GNU"
1:
.align 8
.long 0xc0000002
.long 3f - 2f
2:
.long 0x3
3:
.align 8
4: | .text
.file "kernel.hip"
# Start of file scope inline assembly
.globl _ZSt21ios_base_library_initv
# End of file scope inline assembly
.globl _Z30__device_stub__transposeMatrixPKiS0_ # -- Begin function _Z30__device_stub__transposeMatrixPKiS0_
.p2align 4, 0x90
.type _Z30__device_stub__transposeMatrixPKiS0_,@function
_Z30__device_stub__transposeMatrixPKiS0_: # @_Z30__device_stub__transposeMatrixPKiS0_
.cfi_startproc
# %bb.0:
subq $88, %rsp
.cfi_def_cfa_offset 96
movq %rdi, 56(%rsp)
movq %rsi, 48(%rsp)
leaq 56(%rsp), %rax
movq %rax, 64(%rsp)
leaq 48(%rsp), %rax
movq %rax, 72(%rsp)
leaq 32(%rsp), %rdi
leaq 16(%rsp), %rsi
leaq 8(%rsp), %rdx
movq %rsp, %rcx
callq __hipPopCallConfiguration
movq 32(%rsp), %rsi
movl 40(%rsp), %edx
movq 16(%rsp), %rcx
movl 24(%rsp), %r8d
leaq 64(%rsp), %r9
movl $_Z15transposeMatrixPKiS0_, %edi
pushq (%rsp)
.cfi_adjust_cfa_offset 8
pushq 16(%rsp)
.cfi_adjust_cfa_offset 8
callq hipLaunchKernel
addq $104, %rsp
.cfi_adjust_cfa_offset -104
retq
.Lfunc_end0:
.size _Z30__device_stub__transposeMatrixPKiS0_, .Lfunc_end0-_Z30__device_stub__transposeMatrixPKiS0_
.cfi_endproc
# -- End function
.globl main # -- Begin function main
.p2align 4, 0x90
.type main,@function
main: # @main
.cfi_startproc
# %bb.0:
subq $24, %rsp
.cfi_def_cfa_offset 32
leaq 16(%rsp), %rdi
movl $36, %esi
movl $1, %edx
callq hipMallocManaged
leaq 8(%rsp), %rdi
movl $36, %esi
movl $1, %edx
callq hipMallocManaged
movq 16(%rsp), %rax
xorl %ecx, %ecx
movq 8(%rsp), %rdx
.p2align 4, 0x90
.LBB1_1: # =>This Inner Loop Header: Depth=1
movl $1065353216, (%rax,%rcx,4) # imm = 0x3F800000
movl $1073741824, (%rdx,%rcx,4) # imm = 0x40000000
incq %rcx
cmpq $9, %rcx
jne .LBB1_1
# %bb.2:
xorl %eax, %eax
addq $24, %rsp
.cfi_def_cfa_offset 8
retq
.Lfunc_end1:
.size main, .Lfunc_end1-main
.cfi_endproc
# -- End function
.p2align 4, 0x90 # -- Begin function __hip_module_ctor
.type __hip_module_ctor,@function
__hip_module_ctor: # @__hip_module_ctor
.cfi_startproc
# %bb.0:
subq $40, %rsp
.cfi_def_cfa_offset 48
cmpq $0, __hip_gpubin_handle(%rip)
jne .LBB2_2
# %bb.1:
movl $__hip_fatbin_wrapper, %edi
callq __hipRegisterFatBinary
movq %rax, __hip_gpubin_handle(%rip)
.LBB2_2:
movq __hip_gpubin_handle(%rip), %rdi
xorps %xmm0, %xmm0
movups %xmm0, 16(%rsp)
movups %xmm0, (%rsp)
movl $_Z15transposeMatrixPKiS0_, %esi
movl $.L__unnamed_1, %edx
movl $.L__unnamed_1, %ecx
movl $-1, %r8d
xorl %r9d, %r9d
callq __hipRegisterFunction
movl $__hip_module_dtor, %edi
addq $40, %rsp
.cfi_def_cfa_offset 8
jmp atexit # TAILCALL
.Lfunc_end2:
.size __hip_module_ctor, .Lfunc_end2-__hip_module_ctor
.cfi_endproc
# -- End function
.p2align 4, 0x90 # -- Begin function __hip_module_dtor
.type __hip_module_dtor,@function
__hip_module_dtor: # @__hip_module_dtor
.cfi_startproc
# %bb.0:
movq __hip_gpubin_handle(%rip), %rdi
testq %rdi, %rdi
je .LBB3_2
# %bb.1:
pushq %rax
.cfi_def_cfa_offset 16
callq __hipUnregisterFatBinary
movq $0, __hip_gpubin_handle(%rip)
addq $8, %rsp
.cfi_def_cfa_offset 8
.LBB3_2:
retq
.Lfunc_end3:
.size __hip_module_dtor, .Lfunc_end3-__hip_module_dtor
.cfi_endproc
# -- End function
.type _Z15transposeMatrixPKiS0_,@object # @_Z15transposeMatrixPKiS0_
.section .rodata,"a",@progbits
.globl _Z15transposeMatrixPKiS0_
.p2align 3, 0x0
_Z15transposeMatrixPKiS0_:
.quad _Z30__device_stub__transposeMatrixPKiS0_
.size _Z15transposeMatrixPKiS0_, 8
.type .L__unnamed_1,@object # @0
.section .rodata.str1.1,"aMS",@progbits,1
.L__unnamed_1:
.asciz "_Z15transposeMatrixPKiS0_"
.size .L__unnamed_1, 26
.type __hip_fatbin_wrapper,@object # @__hip_fatbin_wrapper
.section .hipFatBinSegment,"a",@progbits
.p2align 3, 0x0
__hip_fatbin_wrapper:
.long 1212764230 # 0x48495046
.long 1 # 0x1
.quad __hip_fatbin
.quad 0
.size __hip_fatbin_wrapper, 24
.type __hip_gpubin_handle,@object # @__hip_gpubin_handle
.local __hip_gpubin_handle
.comm __hip_gpubin_handle,8,8
.section .init_array,"aw",@init_array
.p2align 3, 0x0
.quad __hip_module_ctor
.type __hip_cuid_,@object # @__hip_cuid_
.bss
.globl __hip_cuid_
__hip_cuid_:
.byte 0 # 0x0
.size __hip_cuid_, 1
.section ".linker-options","e",@llvm_linker_options
.ident "AMD clang version 18.0.0git (https://github.com/RadeonOpenCompute/llvm-project roc-6.3.2 25012 e5bf7e55c91490b07c49d8960fa7983d864936c4)"
.section ".note.GNU-stack","",@progbits
.addrsig
.addrsig_sym _Z30__device_stub__transposeMatrixPKiS0_
.addrsig_sym __hip_module_ctor
.addrsig_sym __hip_module_dtor
.addrsig_sym _Z15transposeMatrixPKiS0_
.addrsig_sym __hip_fatbin
.addrsig_sym __hip_fatbin_wrapper
.addrsig_sym __hip_cuid_ |
You are a helpful coding assistant specialized in converting CUDA source code to CUDA device assembly. | #include "includes.h"
/**
* Project TACO: Parallel ACO algorithm for TSP
* 15-418 Parallel Algorithms - Final Project
* Ivan Wang, Carl Lin
*/
#define MAX_THREADS 128
__global__ void copyBestPath(int i, int *bestPathResult, int *pathResults) {
memcpy(bestPathResult, &pathResults[i * MAX_ANTS], MAX_CITIES * sizeof(int));
} | code for sm_80
Function : _Z12copyBestPathiPiS_
.headerflags @"EF_CUDA_TEXMODE_UNIFIED EF_CUDA_64BIT_ADDRESS EF_CUDA_SM80 EF_CUDA_VIRTUAL_SM(EF_CUDA_SM80)"
/*0000*/ MOV R1, c[0x0][0x28] ; /* 0x00000a0000017a02 */
/* 0x000fe40000000f00 */
/*0010*/ HFMA2.MMA R5, -RZ, RZ, 0, 2.384185791015625e-07 ; /* 0x00000004ff057435 */
/* 0x000fe200000001ff */
/*0020*/ MOV R4, c[0x0][0x160] ; /* 0x0000580000047a02 */
/* 0x000fe20000000f00 */
/*0030*/ ULDC.64 UR4, c[0x0][0x118] ; /* 0x0000460000047ab9 */
/* 0x000fc80000000a00 */
/*0040*/ IMAD R4, R4, 0x1e, RZ ; /* 0x0000001e04047824 */
/* 0x000fc800078e02ff */
/*0050*/ IMAD.WIDE R4, R4, R5, c[0x0][0x170] ; /* 0x00005c0004047625 */
/* 0x000fca00078e0205 */
/*0060*/ LDG.E.U8 R7, [R4.64] ; /* 0x0000000404077981 */
/* 0x000ea2000c1e1100 */
/*0070*/ MOV R2, c[0x0][0x168] ; /* 0x00005a0000027a02 */
/* 0x000fe40000000f00 */
/*0080*/ MOV R3, c[0x0][0x16c] ; /* 0x00005b0000037a02 */
/* 0x000fca0000000f00 */
/*0090*/ STG.E.U8 [R2.64], R7 ; /* 0x0000000702007986 */
/* 0x0041e8000c101104 */
/*00a0*/ LDG.E.U8 R9, [R4.64+0x1] ; /* 0x0000010404097981 */
/* 0x000ea8000c1e1100 */
/*00b0*/ STG.E.U8 [R2.64+0x1], R9 ; /* 0x0000010902007986 */
/* 0x0043e8000c101104 */
/*00c0*/ LDG.E.U8 R11, [R4.64+0x2] ; /* 0x00000204040b7981 */
/* 0x000ea8000c1e1100 */
/*00d0*/ STG.E.U8 [R2.64+0x2], R11 ; /* 0x0000020b02007986 */
/* 0x0045e8000c101104 */
/*00e0*/ LDG.E.U8 R13, [R4.64+0x3] ; /* 0x00000304040d7981 */
/* 0x000ee8000c1e1100 */
/*00f0*/ STG.E.U8 [R2.64+0x3], R13 ; /* 0x0000030d02007986 */
/* 0x0087e8000c101104 */
/*0100*/ LDG.E.U8 R15, [R4.64+0x4] ; /* 0x00000404040f7981 */
/* 0x000f28000c1e1100 */
/*0110*/ STG.E.U8 [R2.64+0x4], R15 ; /* 0x0000040f02007986 */
/* 0x0109e8000c101104 */
/*0120*/ LDG.E.U8 R17, [R4.64+0x5] ; /* 0x0000050404117981 */
/* 0x000f68000c1e1100 */
/*0130*/ STG.E.U8 [R2.64+0x5], R17 ; /* 0x0000051102007986 */
/* 0x020be8000c101104 */
/*0140*/ LDG.E.U8 R7, [R4.64+0x6] ; /* 0x0000060404077981 */
/* 0x001ea8000c1e1100 */
/*0150*/ STG.E.U8 [R2.64+0x6], R7 ; /* 0x0000060702007986 */
/* 0x0041e8000c101104 */
/*0160*/ LDG.E.U8 R9, [R4.64+0x7] ; /* 0x0000070404097981 */
/* 0x002ea8000c1e1100 */
/*0170*/ STG.E.U8 [R2.64+0x7], R9 ; /* 0x0000070902007986 */
/* 0x0043e8000c101104 */
/*0180*/ LDG.E.U8 R11, [R4.64+0x8] ; /* 0x00000804040b7981 */
/* 0x000ea8000c1e1100 */
/*0190*/ STG.E.U8 [R2.64+0x8], R11 ; /* 0x0000080b02007986 */
/* 0x0045e8000c101104 */
/*01a0*/ LDG.E.U8 R13, [R4.64+0x9] ; /* 0x00000904040d7981 */
/* 0x008ee8000c1e1100 */
/*01b0*/ STG.E.U8 [R2.64+0x9], R13 ; /* 0x0000090d02007986 */
/* 0x0087e8000c101104 */
/*01c0*/ LDG.E.U8 R15, [R4.64+0xa] ; /* 0x00000a04040f7981 */
/* 0x010f28000c1e1100 */
/*01d0*/ STG.E.U8 [R2.64+0xa], R15 ; /* 0x00000a0f02007986 */
/* 0x0109e8000c101104 */
/*01e0*/ LDG.E.U8 R17, [R4.64+0xb] ; /* 0x00000b0404117981 */
/* 0x020f68000c1e1100 */
/*01f0*/ STG.E.U8 [R2.64+0xb], R17 ; /* 0x00000b1102007986 */
/* 0x020be8000c101104 */
/*0200*/ LDG.E.U8 R7, [R4.64+0xc] ; /* 0x00000c0404077981 */
/* 0x001ea8000c1e1100 */
/*0210*/ STG.E.U8 [R2.64+0xc], R7 ; /* 0x00000c0702007986 */
/* 0x0041e8000c101104 */
/*0220*/ LDG.E.U8 R9, [R4.64+0xd] ; /* 0x00000d0404097981 */
/* 0x002ea8000c1e1100 */
/*0230*/ STG.E.U8 [R2.64+0xd], R9 ; /* 0x00000d0902007986 */
/* 0x0043e8000c101104 */
/*0240*/ LDG.E.U8 R11, [R4.64+0xe] ; /* 0x00000e04040b7981 */
/* 0x000ea8000c1e1100 */
/*0250*/ STG.E.U8 [R2.64+0xe], R11 ; /* 0x00000e0b02007986 */
/* 0x0045e8000c101104 */
/*0260*/ LDG.E.U8 R13, [R4.64+0xf] ; /* 0x00000f04040d7981 */
/* 0x008ee8000c1e1100 */
/*0270*/ STG.E.U8 [R2.64+0xf], R13 ; /* 0x00000f0d02007986 */
/* 0x0087e8000c101104 */
/*0280*/ LDG.E.U8 R15, [R4.64+0x10] ; /* 0x00001004040f7981 */
/* 0x010f28000c1e1100 */
/*0290*/ STG.E.U8 [R2.64+0x10], R15 ; /* 0x0000100f02007986 */
/* 0x0109e8000c101104 */
/*02a0*/ LDG.E.U8 R17, [R4.64+0x11] ; /* 0x0000110404117981 */
/* 0x020f68000c1e1100 */
/*02b0*/ STG.E.U8 [R2.64+0x11], R17 ; /* 0x0000111102007986 */
/* 0x020be8000c101104 */
/*02c0*/ LDG.E.U8 R7, [R4.64+0x12] ; /* 0x0000120404077981 */
/* 0x001ea8000c1e1100 */
/*02d0*/ STG.E.U8 [R2.64+0x12], R7 ; /* 0x0000120702007986 */
/* 0x0041e8000c101104 */
/*02e0*/ LDG.E.U8 R9, [R4.64+0x13] ; /* 0x0000130404097981 */
/* 0x002ea8000c1e1100 */
/*02f0*/ STG.E.U8 [R2.64+0x13], R9 ; /* 0x0000130902007986 */
/* 0x0043e8000c101104 */
/*0300*/ LDG.E.U8 R11, [R4.64+0x14] ; /* 0x00001404040b7981 */
/* 0x000ea8000c1e1100 */
/*0310*/ STG.E.U8 [R2.64+0x14], R11 ; /* 0x0000140b02007986 */
/* 0x0045e8000c101104 */
/*0320*/ LDG.E.U8 R13, [R4.64+0x15] ; /* 0x00001504040d7981 */
/* 0x008ee8000c1e1100 */
/*0330*/ STG.E.U8 [R2.64+0x15], R13 ; /* 0x0000150d02007986 */
/* 0x0087e8000c101104 */
/*0340*/ LDG.E.U8 R15, [R4.64+0x16] ; /* 0x00001604040f7981 */
/* 0x010f28000c1e1100 */
/*0350*/ STG.E.U8 [R2.64+0x16], R15 ; /* 0x0000160f02007986 */
/* 0x0109e8000c101104 */
/*0360*/ LDG.E.U8 R17, [R4.64+0x17] ; /* 0x0000170404117981 */
/* 0x020f68000c1e1100 */
/*0370*/ STG.E.U8 [R2.64+0x17], R17 ; /* 0x0000171102007986 */
/* 0x020be8000c101104 */
/*0380*/ LDG.E.U8 R7, [R4.64+0x18] ; /* 0x0000180404077981 */
/* 0x001ea8000c1e1100 */
/*0390*/ STG.E.U8 [R2.64+0x18], R7 ; /* 0x0000180702007986 */
/* 0x0041e8000c101104 */
/*03a0*/ LDG.E.U8 R9, [R4.64+0x19] ; /* 0x0000190404097981 */
/* 0x002ea8000c1e1100 */
/*03b0*/ STG.E.U8 [R2.64+0x19], R9 ; /* 0x0000190902007986 */
/* 0x0043e8000c101104 */
/*03c0*/ LDG.E.U8 R11, [R4.64+0x1a] ; /* 0x00001a04040b7981 */
/* 0x000ea8000c1e1100 */
/*03d0*/ STG.E.U8 [R2.64+0x1a], R11 ; /* 0x00001a0b02007986 */
/* 0x0045e8000c101104 */
/*03e0*/ LDG.E.U8 R13, [R4.64+0x1b] ; /* 0x00001b04040d7981 */
/* 0x008ee8000c1e1100 */
/*03f0*/ STG.E.U8 [R2.64+0x1b], R13 ; /* 0x00001b0d02007986 */
/* 0x0087e8000c101104 */
/*0400*/ LDG.E.U8 R15, [R4.64+0x1c] ; /* 0x00001c04040f7981 */
/* 0x010f28000c1e1100 */
/*0410*/ STG.E.U8 [R2.64+0x1c], R15 ; /* 0x00001c0f02007986 */
/* 0x0109e8000c101104 */
/*0420*/ LDG.E.U8 R17, [R4.64+0x1d] ; /* 0x00001d0404117981 */
/* 0x020f68000c1e1100 */
/*0430*/ STG.E.U8 [R2.64+0x1d], R17 ; /* 0x00001d1102007986 */
/* 0x020be8000c101104 */
/*0440*/ LDG.E.U8 R7, [R4.64+0x1e] ; /* 0x00001e0404077981 */
/* 0x001ea8000c1e1100 */
/*0450*/ STG.E.U8 [R2.64+0x1e], R7 ; /* 0x00001e0702007986 */
/* 0x0041e8000c101104 */
/*0460*/ LDG.E.U8 R9, [R4.64+0x1f] ; /* 0x00001f0404097981 */
/* 0x002ea8000c1e1100 */
/*0470*/ STG.E.U8 [R2.64+0x1f], R9 ; /* 0x00001f0902007986 */
/* 0x0043e8000c101104 */
/*0480*/ LDG.E.U8 R11, [R4.64+0x20] ; /* 0x00002004040b7981 */
/* 0x000ea8000c1e1100 */
/*0490*/ STG.E.U8 [R2.64+0x20], R11 ; /* 0x0000200b02007986 */
/* 0x0045e8000c101104 */
/*04a0*/ LDG.E.U8 R13, [R4.64+0x21] ; /* 0x00002104040d7981 */
/* 0x008ee8000c1e1100 */
/*04b0*/ STG.E.U8 [R2.64+0x21], R13 ; /* 0x0000210d02007986 */
/* 0x0087e8000c101104 */
/*04c0*/ LDG.E.U8 R15, [R4.64+0x22] ; /* 0x00002204040f7981 */
/* 0x010f28000c1e1100 */
/*04d0*/ STG.E.U8 [R2.64+0x22], R15 ; /* 0x0000220f02007986 */
/* 0x0109e8000c101104 */
/*04e0*/ LDG.E.U8 R17, [R4.64+0x23] ; /* 0x0000230404117981 */
/* 0x020f68000c1e1100 */
/*04f0*/ STG.E.U8 [R2.64+0x23], R17 ; /* 0x0000231102007986 */
/* 0x020be8000c101104 */
/*0500*/ LDG.E.U8 R7, [R4.64+0x24] ; /* 0x0000240404077981 */
/* 0x001ea8000c1e1100 */
/*0510*/ STG.E.U8 [R2.64+0x24], R7 ; /* 0x0000240702007986 */
/* 0x0041e8000c101104 */
/*0520*/ LDG.E.U8 R9, [R4.64+0x25] ; /* 0x0000250404097981 */
/* 0x002ea8000c1e1100 */
/*0530*/ STG.E.U8 [R2.64+0x25], R9 ; /* 0x0000250902007986 */
/* 0x0043e8000c101104 */
/*0540*/ LDG.E.U8 R11, [R4.64+0x26] ; /* 0x00002604040b7981 */
/* 0x000ea8000c1e1100 */
/*0550*/ STG.E.U8 [R2.64+0x26], R11 ; /* 0x0000260b02007986 */
/* 0x0045e8000c101104 */
/*0560*/ LDG.E.U8 R13, [R4.64+0x27] ; /* 0x00002704040d7981 */
/* 0x008ee8000c1e1100 */
/*0570*/ STG.E.U8 [R2.64+0x27], R13 ; /* 0x0000270d02007986 */
/* 0x0087e8000c101104 */
/*0580*/ LDG.E.U8 R15, [R4.64+0x28] ; /* 0x00002804040f7981 */
/* 0x010f28000c1e1100 */
/*0590*/ STG.E.U8 [R2.64+0x28], R15 ; /* 0x0000280f02007986 */
/* 0x0109e8000c101104 */
/*05a0*/ LDG.E.U8 R17, [R4.64+0x29] ; /* 0x0000290404117981 */
/* 0x020f68000c1e1100 */
/*05b0*/ STG.E.U8 [R2.64+0x29], R17 ; /* 0x0000291102007986 */
/* 0x020be8000c101104 */
/*05c0*/ LDG.E.U8 R7, [R4.64+0x2a] ; /* 0x00002a0404077981 */
/* 0x001ea8000c1e1100 */
/*05d0*/ STG.E.U8 [R2.64+0x2a], R7 ; /* 0x00002a0702007986 */
/* 0x0041e8000c101104 */
/*05e0*/ LDG.E.U8 R9, [R4.64+0x2b] ; /* 0x00002b0404097981 */
/* 0x002ea8000c1e1100 */
/*05f0*/ STG.E.U8 [R2.64+0x2b], R9 ; /* 0x00002b0902007986 */
/* 0x0043e8000c101104 */
/*0600*/ LDG.E.U8 R11, [R4.64+0x2c] ; /* 0x00002c04040b7981 */
/* 0x000ea8000c1e1100 */
/*0610*/ STG.E.U8 [R2.64+0x2c], R11 ; /* 0x00002c0b02007986 */
/* 0x0045e8000c101104 */
/*0620*/ LDG.E.U8 R13, [R4.64+0x2d] ; /* 0x00002d04040d7981 */
/* 0x008ee8000c1e1100 */
/*0630*/ STG.E.U8 [R2.64+0x2d], R13 ; /* 0x00002d0d02007986 */
/* 0x0087e8000c101104 */
/*0640*/ LDG.E.U8 R15, [R4.64+0x2e] ; /* 0x00002e04040f7981 */
/* 0x010f28000c1e1100 */
/*0650*/ STG.E.U8 [R2.64+0x2e], R15 ; /* 0x00002e0f02007986 */
/* 0x0109e8000c101104 */
/*0660*/ LDG.E.U8 R17, [R4.64+0x2f] ; /* 0x00002f0404117981 */
/* 0x020f68000c1e1100 */
/*0670*/ STG.E.U8 [R2.64+0x2f], R17 ; /* 0x00002f1102007986 */
/* 0x020be8000c101104 */
/*0680*/ LDG.E.U8 R7, [R4.64+0x30] ; /* 0x0000300404077981 */
/* 0x001ea8000c1e1100 */
/*0690*/ STG.E.U8 [R2.64+0x30], R7 ; /* 0x0000300702007986 */
/* 0x0041e8000c101104 */
/*06a0*/ LDG.E.U8 R9, [R4.64+0x31] ; /* 0x0000310404097981 */
/* 0x002ea8000c1e1100 */
/*06b0*/ STG.E.U8 [R2.64+0x31], R9 ; /* 0x0000310902007986 */
/* 0x0043e8000c101104 */
/*06c0*/ LDG.E.U8 R11, [R4.64+0x32] ; /* 0x00003204040b7981 */
/* 0x000ea8000c1e1100 */
/*06d0*/ STG.E.U8 [R2.64+0x32], R11 ; /* 0x0000320b02007986 */
/* 0x0045e8000c101104 */
/*06e0*/ LDG.E.U8 R13, [R4.64+0x33] ; /* 0x00003304040d7981 */
/* 0x008ee8000c1e1100 */
/*06f0*/ STG.E.U8 [R2.64+0x33], R13 ; /* 0x0000330d02007986 */
/* 0x0087e8000c101104 */
/*0700*/ LDG.E.U8 R15, [R4.64+0x34] ; /* 0x00003404040f7981 */
/* 0x010f28000c1e1100 */
/*0710*/ STG.E.U8 [R2.64+0x34], R15 ; /* 0x0000340f02007986 */
/* 0x0109e8000c101104 */
/*0720*/ LDG.E.U8 R17, [R4.64+0x35] ; /* 0x0000350404117981 */
/* 0x020f68000c1e1100 */
/*0730*/ STG.E.U8 [R2.64+0x35], R17 ; /* 0x0000351102007986 */
/* 0x020be8000c101104 */
/*0740*/ LDG.E.U8 R7, [R4.64+0x36] ; /* 0x0000360404077981 */
/* 0x001ea8000c1e1100 */
/*0750*/ STG.E.U8 [R2.64+0x36], R7 ; /* 0x0000360702007986 */
/* 0x0041e8000c101104 */
/*0760*/ LDG.E.U8 R9, [R4.64+0x37] ; /* 0x0000370404097981 */
/* 0x002ea8000c1e1100 */
/*0770*/ STG.E.U8 [R2.64+0x37], R9 ; /* 0x0000370902007986 */
/* 0x0043e8000c101104 */
/*0780*/ LDG.E.U8 R11, [R4.64+0x38] ; /* 0x00003804040b7981 */
/* 0x000ea8000c1e1100 */
/*0790*/ STG.E.U8 [R2.64+0x38], R11 ; /* 0x0000380b02007986 */
/* 0x0045e8000c101104 */
/*07a0*/ LDG.E.U8 R13, [R4.64+0x39] ; /* 0x00003904040d7981 */
/* 0x008ee8000c1e1100 */
/*07b0*/ STG.E.U8 [R2.64+0x39], R13 ; /* 0x0000390d02007986 */
/* 0x0087e8000c101104 */
/*07c0*/ LDG.E.U8 R15, [R4.64+0x3a] ; /* 0x00003a04040f7981 */
/* 0x010f28000c1e1100 */
/*07d0*/ STG.E.U8 [R2.64+0x3a], R15 ; /* 0x00003a0f02007986 */
/* 0x0109e8000c101104 */
/*07e0*/ LDG.E.U8 R17, [R4.64+0x3b] ; /* 0x00003b0404117981 */
/* 0x020f68000c1e1100 */
/*07f0*/ STG.E.U8 [R2.64+0x3b], R17 ; /* 0x00003b1102007986 */
/* 0x020be8000c101104 */
/*0800*/ LDG.E.U8 R7, [R4.64+0x3c] ; /* 0x00003c0404077981 */
/* 0x001ea8000c1e1100 */
/*0810*/ STG.E.U8 [R2.64+0x3c], R7 ; /* 0x00003c0702007986 */
/* 0x0041e8000c101104 */
/*0820*/ LDG.E.U8 R9, [R4.64+0x3d] ; /* 0x00003d0404097981 */
/* 0x002ea8000c1e1100 */
/*0830*/ STG.E.U8 [R2.64+0x3d], R9 ; /* 0x00003d0902007986 */
/* 0x0043e8000c101104 */
/*0840*/ LDG.E.U8 R11, [R4.64+0x3e] ; /* 0x00003e04040b7981 */
/* 0x000ea8000c1e1100 */
/*0850*/ STG.E.U8 [R2.64+0x3e], R11 ; /* 0x00003e0b02007986 */
/* 0x0045e8000c101104 */
/*0860*/ LDG.E.U8 R13, [R4.64+0x3f] ; /* 0x00003f04040d7981 */
/* 0x008ee8000c1e1100 */
/*0870*/ STG.E.U8 [R2.64+0x3f], R13 ; /* 0x00003f0d02007986 */
/* 0x0087e8000c101104 */
/*0880*/ LDG.E.U8 R15, [R4.64+0x40] ; /* 0x00004004040f7981 */
/* 0x010f28000c1e1100 */
/*0890*/ STG.E.U8 [R2.64+0x40], R15 ; /* 0x0000400f02007986 */
/* 0x0109e8000c101104 */
/*08a0*/ LDG.E.U8 R17, [R4.64+0x41] ; /* 0x0000410404117981 */
/* 0x020f68000c1e1100 */
/*08b0*/ STG.E.U8 [R2.64+0x41], R17 ; /* 0x0000411102007986 */
/* 0x020be8000c101104 */
/*08c0*/ LDG.E.U8 R7, [R4.64+0x42] ; /* 0x0000420404077981 */
/* 0x001ea8000c1e1100 */
/*08d0*/ STG.E.U8 [R2.64+0x42], R7 ; /* 0x0000420702007986 */
/* 0x0041e8000c101104 */
/*08e0*/ LDG.E.U8 R9, [R4.64+0x43] ; /* 0x0000430404097981 */
/* 0x002ea8000c1e1100 */
/*08f0*/ STG.E.U8 [R2.64+0x43], R9 ; /* 0x0000430902007986 */
/* 0x0043e8000c101104 */
/*0900*/ LDG.E.U8 R11, [R4.64+0x44] ; /* 0x00004404040b7981 */
/* 0x000ea8000c1e1100 */
/*0910*/ STG.E.U8 [R2.64+0x44], R11 ; /* 0x0000440b02007986 */
/* 0x0045e8000c101104 */
/*0920*/ LDG.E.U8 R13, [R4.64+0x45] ; /* 0x00004504040d7981 */
/* 0x008ee8000c1e1100 */
/*0930*/ STG.E.U8 [R2.64+0x45], R13 ; /* 0x0000450d02007986 */
/* 0x0087e8000c101104 */
/*0940*/ LDG.E.U8 R15, [R4.64+0x46] ; /* 0x00004604040f7981 */
/* 0x010f28000c1e1100 */
/*0950*/ STG.E.U8 [R2.64+0x46], R15 ; /* 0x0000460f02007986 */
/* 0x0109e8000c101104 */
/*0960*/ LDG.E.U8 R17, [R4.64+0x47] ; /* 0x0000470404117981 */
/* 0x020f68000c1e1100 */
/*0970*/ STG.E.U8 [R2.64+0x47], R17 ; /* 0x0000471102007986 */
/* 0x020be8000c101104 */
/*0980*/ LDG.E.U8 R7, [R4.64+0x48] ; /* 0x0000480404077981 */
/* 0x001ea8000c1e1100 */
/*0990*/ STG.E.U8 [R2.64+0x48], R7 ; /* 0x0000480702007986 */
/* 0x0041e8000c101104 */
/*09a0*/ LDG.E.U8 R9, [R4.64+0x49] ; /* 0x0000490404097981 */
/* 0x002ea8000c1e1100 */
/*09b0*/ STG.E.U8 [R2.64+0x49], R9 ; /* 0x0000490902007986 */
/* 0x0043e8000c101104 */
/*09c0*/ LDG.E.U8 R11, [R4.64+0x4a] ; /* 0x00004a04040b7981 */
/* 0x000ea8000c1e1100 */
/*09d0*/ STG.E.U8 [R2.64+0x4a], R11 ; /* 0x00004a0b02007986 */
/* 0x0045e8000c101104 */
/*09e0*/ LDG.E.U8 R13, [R4.64+0x4b] ; /* 0x00004b04040d7981 */
/* 0x008ee8000c1e1100 */
/*09f0*/ STG.E.U8 [R2.64+0x4b], R13 ; /* 0x00004b0d02007986 */
/* 0x0087e8000c101104 */
/*0a00*/ LDG.E.U8 R15, [R4.64+0x4c] ; /* 0x00004c04040f7981 */
/* 0x010f28000c1e1100 */
/*0a10*/ STG.E.U8 [R2.64+0x4c], R15 ; /* 0x00004c0f02007986 */
/* 0x0109e8000c101104 */
/*0a20*/ LDG.E.U8 R17, [R4.64+0x4d] ; /* 0x00004d0404117981 */
/* 0x020f68000c1e1100 */
/*0a30*/ STG.E.U8 [R2.64+0x4d], R17 ; /* 0x00004d1102007986 */
/* 0x020be8000c101104 */
/*0a40*/ LDG.E.U8 R7, [R4.64+0x4e] ; /* 0x00004e0404077981 */
/* 0x001ea8000c1e1100 */
/*0a50*/ STG.E.U8 [R2.64+0x4e], R7 ; /* 0x00004e0702007986 */
/* 0x0041e8000c101104 */
/*0a60*/ LDG.E.U8 R9, [R4.64+0x4f] ; /* 0x00004f0404097981 */
/* 0x002ea8000c1e1100 */
/*0a70*/ STG.E.U8 [R2.64+0x4f], R9 ; /* 0x00004f0902007986 */
/* 0x0043e8000c101104 */
/*0a80*/ LDG.E.U8 R11, [R4.64+0x50] ; /* 0x00005004040b7981 */
/* 0x000ea8000c1e1100 */
/*0a90*/ STG.E.U8 [R2.64+0x50], R11 ; /* 0x0000500b02007986 */
/* 0x0045e8000c101104 */
/*0aa0*/ LDG.E.U8 R13, [R4.64+0x51] ; /* 0x00005104040d7981 */
/* 0x008ee8000c1e1100 */
/*0ab0*/ STG.E.U8 [R2.64+0x51], R13 ; /* 0x0000510d02007986 */
/* 0x0087e8000c101104 */
/*0ac0*/ LDG.E.U8 R15, [R4.64+0x52] ; /* 0x00005204040f7981 */
/* 0x010f28000c1e1100 */
/*0ad0*/ STG.E.U8 [R2.64+0x52], R15 ; /* 0x0000520f02007986 */
/* 0x0109e8000c101104 */
/*0ae0*/ LDG.E.U8 R17, [R4.64+0x53] ; /* 0x0000530404117981 */
/* 0x020f68000c1e1100 */
/*0af0*/ STG.E.U8 [R2.64+0x53], R17 ; /* 0x0000531102007986 */
/* 0x020be8000c101104 */
/*0b00*/ LDG.E.U8 R7, [R4.64+0x54] ; /* 0x0000540404077981 */
/* 0x001ea8000c1e1100 */
/*0b10*/ STG.E.U8 [R2.64+0x54], R7 ; /* 0x0000540702007986 */
/* 0x0041e8000c101104 */
/*0b20*/ LDG.E.U8 R9, [R4.64+0x55] ; /* 0x0000550404097981 */
/* 0x002ea8000c1e1100 */
/*0b30*/ STG.E.U8 [R2.64+0x55], R9 ; /* 0x0000550902007986 */
/* 0x0043e8000c101104 */
/*0b40*/ LDG.E.U8 R11, [R4.64+0x56] ; /* 0x00005604040b7981 */
/* 0x000ea8000c1e1100 */
/*0b50*/ STG.E.U8 [R2.64+0x56], R11 ; /* 0x0000560b02007986 */
/* 0x0045e8000c101104 */
/*0b60*/ LDG.E.U8 R13, [R4.64+0x57] ; /* 0x00005704040d7981 */
/* 0x008ee8000c1e1100 */
/*0b70*/ STG.E.U8 [R2.64+0x57], R13 ; /* 0x0000570d02007986 */
/* 0x0087e8000c101104 */
/*0b80*/ LDG.E.U8 R15, [R4.64+0x58] ; /* 0x00005804040f7981 */
/* 0x010f28000c1e1100 */
/*0b90*/ STG.E.U8 [R2.64+0x58], R15 ; /* 0x0000580f02007986 */
/* 0x0109e8000c101104 */
/*0ba0*/ LDG.E.U8 R17, [R4.64+0x59] ; /* 0x0000590404117981 */
/* 0x020f68000c1e1100 */
/*0bb0*/ STG.E.U8 [R2.64+0x59], R17 ; /* 0x0000591102007986 */
/* 0x020be8000c101104 */
/*0bc0*/ LDG.E.U8 R7, [R4.64+0x5a] ; /* 0x00005a0404077981 */
/* 0x001ea8000c1e1100 */
/*0bd0*/ STG.E.U8 [R2.64+0x5a], R7 ; /* 0x00005a0702007986 */
/* 0x0041e8000c101104 */
/*0be0*/ LDG.E.U8 R9, [R4.64+0x5b] ; /* 0x00005b0404097981 */
/* 0x002ea8000c1e1100 */
/*0bf0*/ STG.E.U8 [R2.64+0x5b], R9 ; /* 0x00005b0902007986 */
/* 0x0043e8000c101104 */
/*0c00*/ LDG.E.U8 R11, [R4.64+0x5c] ; /* 0x00005c04040b7981 */
/* 0x000ea8000c1e1100 */
/*0c10*/ STG.E.U8 [R2.64+0x5c], R11 ; /* 0x00005c0b02007986 */
/* 0x0045e8000c101104 */
/*0c20*/ LDG.E.U8 R13, [R4.64+0x5d] ; /* 0x00005d04040d7981 */
/* 0x008ee8000c1e1100 */
/*0c30*/ STG.E.U8 [R2.64+0x5d], R13 ; /* 0x00005d0d02007986 */
/* 0x0087e8000c101104 */
/*0c40*/ LDG.E.U8 R15, [R4.64+0x5e] ; /* 0x00005e04040f7981 */
/* 0x010f28000c1e1100 */
/*0c50*/ STG.E.U8 [R2.64+0x5e], R15 ; /* 0x00005e0f02007986 */
/* 0x0109e8000c101104 */
/*0c60*/ LDG.E.U8 R17, [R4.64+0x5f] ; /* 0x00005f0404117981 */
/* 0x020f68000c1e1100 */
/*0c70*/ STG.E.U8 [R2.64+0x5f], R17 ; /* 0x00005f1102007986 */
/* 0x020be8000c101104 */
/*0c80*/ LDG.E.U8 R7, [R4.64+0x60] ; /* 0x0000600404077981 */
/* 0x001ea8000c1e1100 */
/*0c90*/ STG.E.U8 [R2.64+0x60], R7 ; /* 0x0000600702007986 */
/* 0x0041e8000c101104 */
/*0ca0*/ LDG.E.U8 R9, [R4.64+0x61] ; /* 0x0000610404097981 */
/* 0x002ea8000c1e1100 */
/*0cb0*/ STG.E.U8 [R2.64+0x61], R9 ; /* 0x0000610902007986 */
/* 0x0043e8000c101104 */
/*0cc0*/ LDG.E.U8 R11, [R4.64+0x62] ; /* 0x00006204040b7981 */
/* 0x000ea8000c1e1100 */
/*0cd0*/ STG.E.U8 [R2.64+0x62], R11 ; /* 0x0000620b02007986 */
/* 0x0045e8000c101104 */
/*0ce0*/ LDG.E.U8 R13, [R4.64+0x63] ; /* 0x00006304040d7981 */
/* 0x008ee8000c1e1100 */
/*0cf0*/ STG.E.U8 [R2.64+0x63], R13 ; /* 0x0000630d02007986 */
/* 0x0087e8000c101104 */
/*0d00*/ LDG.E.U8 R15, [R4.64+0x64] ; /* 0x00006404040f7981 */
/* 0x010f28000c1e1100 */
/*0d10*/ STG.E.U8 [R2.64+0x64], R15 ; /* 0x0000640f02007986 */
/* 0x0109e8000c101104 */
/*0d20*/ LDG.E.U8 R17, [R4.64+0x65] ; /* 0x0000650404117981 */
/* 0x020f68000c1e1100 */
/*0d30*/ STG.E.U8 [R2.64+0x65], R17 ; /* 0x0000651102007986 */
/* 0x020be8000c101104 */
/*0d40*/ LDG.E.U8 R7, [R4.64+0x66] ; /* 0x0000660404077981 */
/* 0x001ea8000c1e1100 */
/*0d50*/ STG.E.U8 [R2.64+0x66], R7 ; /* 0x0000660702007986 */
/* 0x0041e8000c101104 */
/*0d60*/ LDG.E.U8 R9, [R4.64+0x67] ; /* 0x0000670404097981 */
/* 0x002ea8000c1e1100 */
/*0d70*/ STG.E.U8 [R2.64+0x67], R9 ; /* 0x0000670902007986 */
/* 0x0043e8000c101104 */
/*0d80*/ LDG.E.U8 R11, [R4.64+0x68] ; /* 0x00006804040b7981 */
/* 0x000ea8000c1e1100 */
/*0d90*/ STG.E.U8 [R2.64+0x68], R11 ; /* 0x0000680b02007986 */
/* 0x0045e8000c101104 */
/*0da0*/ LDG.E.U8 R13, [R4.64+0x69] ; /* 0x00006904040d7981 */
/* 0x008ee8000c1e1100 */
/*0db0*/ STG.E.U8 [R2.64+0x69], R13 ; /* 0x0000690d02007986 */
/* 0x0087e8000c101104 */
/*0dc0*/ LDG.E.U8 R15, [R4.64+0x6a] ; /* 0x00006a04040f7981 */
/* 0x010f28000c1e1100 */
/*0dd0*/ STG.E.U8 [R2.64+0x6a], R15 ; /* 0x00006a0f02007986 */
/* 0x0109e8000c101104 */
/*0de0*/ LDG.E.U8 R17, [R4.64+0x6b] ; /* 0x00006b0404117981 */
/* 0x020f68000c1e1100 */
/*0df0*/ STG.E.U8 [R2.64+0x6b], R17 ; /* 0x00006b1102007986 */
/* 0x020be8000c101104 */
/*0e00*/ LDG.E.U8 R7, [R4.64+0x6c] ; /* 0x00006c0404077981 */
/* 0x001ea8000c1e1100 */
/*0e10*/ STG.E.U8 [R2.64+0x6c], R7 ; /* 0x00006c0702007986 */
/* 0x004fe8000c101104 */
/*0e20*/ LDG.E.U8 R9, [R4.64+0x6d] ; /* 0x00006d0404097981 */
/* 0x002ea8000c1e1100 */
/*0e30*/ STG.E.U8 [R2.64+0x6d], R9 ; /* 0x00006d0902007986 */
/* 0x0041e8000c101104 */
/*0e40*/ LDG.E.U8 R11, [R4.64+0x6e] ; /* 0x00006e04040b7981 */
/* 0x000ea8000c1e1100 */
/*0e50*/ STG.E.U8 [R2.64+0x6e], R11 ; /* 0x00006e0b02007986 */
/* 0x0043e8000c101104 */
/*0e60*/ LDG.E.U8 R13, [R4.64+0x6f] ; /* 0x00006f04040d7981 */
/* 0x008ea8000c1e1100 */
/*0e70*/ STG.E.U8 [R2.64+0x6f], R13 ; /* 0x00006f0d02007986 */
/* 0x0045e8000c101104 */
/*0e80*/ LDG.E.U8 R15, [R4.64+0x70] ; /* 0x00007004040f7981 */
/* 0x010ee8000c1e1100 */
/*0e90*/ STG.E.U8 [R2.64+0x70], R15 ; /* 0x0000700f02007986 */
/* 0x0087e8000c101104 */
/*0ea0*/ LDG.E.U8 R17, [R4.64+0x71] ; /* 0x0000710404117981 */
/* 0x020f28000c1e1100 */
/*0eb0*/ STG.E.U8 [R2.64+0x71], R17 ; /* 0x0000711102007986 */
/* 0x010fe8000c101104 */
/*0ec0*/ LDG.E.U8 R19, [R4.64+0x72] ; /* 0x0000720404137981 */
/* 0x000f28000c1e1100 */
/*0ed0*/ STG.E.U8 [R2.64+0x72], R19 ; /* 0x0000721302007986 */
/* 0x010fe8000c101104 */
/*0ee0*/ LDG.E.U8 R9, [R4.64+0x73] ; /* 0x0000730404097981 */
/* 0x001f28000c1e1100 */
/*0ef0*/ STG.E.U8 [R2.64+0x73], R9 ; /* 0x0000730902007986 */
/* 0x010fe8000c101104 */
/*0f00*/ LDG.E.U8 R11, [R4.64+0x74] ; /* 0x00007404040b7981 */
/* 0x002f28000c1e1100 */
/*0f10*/ STG.E.U8 [R2.64+0x74], R11 ; /* 0x0000740b02007986 */
/* 0x010fe8000c101104 */
/*0f20*/ LDG.E.U8 R13, [R4.64+0x75] ; /* 0x00007504040d7981 */
/* 0x004ea8000c1e1100 */
/*0f30*/ STG.E.U8 [R2.64+0x75], R13 ; /* 0x0000750d02007986 */
/* 0x004fe8000c101104 */
/*0f40*/ LDG.E.U8 R15, [R4.64+0x76] ; /* 0x00007604040f7981 */
/* 0x008ea8000c1e1100 */
/*0f50*/ STG.E.U8 [R2.64+0x76], R15 ; /* 0x0000760f02007986 */
/* 0x004fe8000c101104 */
/*0f60*/ LDG.E.U8 R7, [R4.64+0x77] ; /* 0x0000770404077981 */
/* 0x000ea8000c1e1100 */
/*0f70*/ STG.E.U8 [R2.64+0x77], R7 ; /* 0x0000770702007986 */
/* 0x004fe2000c101104 */
/*0f80*/ EXIT ; /* 0x000000000000794d */
/* 0x000fea0003800000 */
/*0f90*/ BRA 0xf90; /* 0xfffffff000007947 */
/* 0x000fc0000383ffff */
/*0fa0*/ NOP; /* 0x0000000000007918 */
/* 0x000fc00000000000 */
/*0fb0*/ NOP; /* 0x0000000000007918 */
/* 0x000fc00000000000 */
/*0fc0*/ NOP; /* 0x0000000000007918 */
/* 0x000fc00000000000 */
/*0fd0*/ NOP; /* 0x0000000000007918 */
/* 0x000fc00000000000 */
/*0fe0*/ NOP; /* 0x0000000000007918 */
/* 0x000fc00000000000 */
/*0ff0*/ NOP; /* 0x0000000000007918 */
/* 0x000fc00000000000 */
/*1000*/ NOP; /* 0x0000000000007918 */
/* 0x000fc00000000000 */
/*1010*/ NOP; /* 0x0000000000007918 */
/* 0x000fc00000000000 */
/*1020*/ NOP; /* 0x0000000000007918 */
/* 0x000fc00000000000 */
/*1030*/ NOP; /* 0x0000000000007918 */
/* 0x000fc00000000000 */
/*1040*/ NOP; /* 0x0000000000007918 */
/* 0x000fc00000000000 */
/*1050*/ NOP; /* 0x0000000000007918 */
/* 0x000fc00000000000 */
/*1060*/ NOP; /* 0x0000000000007918 */
/* 0x000fc00000000000 */
/*1070*/ NOP; /* 0x0000000000007918 */
/* 0x000fc00000000000 */
.......... |
You are a helpful coding assistant specialized in converting CUDA source code to CUDA host assembly. | #include "includes.h"
/**
* Project TACO: Parallel ACO algorithm for TSP
* 15-418 Parallel Algorithms - Final Project
* Ivan Wang, Carl Lin
*/
#define MAX_THREADS 128
__global__ void copyBestPath(int i, int *bestPathResult, int *pathResults) {
memcpy(bestPathResult, &pathResults[i * MAX_ANTS], MAX_CITIES * sizeof(int));
} | .file "tmpxft_00036e9f_00000000-6_copyBestPath.cudafe1.cpp"
.text
#APP
#NO_APP
.type _ZL26__cudaUnregisterBinaryUtilv, @function
_ZL26__cudaUnregisterBinaryUtilv:
.LFB2029:
.cfi_startproc
endbr64
subq $8, %rsp
.cfi_def_cfa_offset 16
movq _ZL20__cudaFatCubinHandle(%rip), %rdi
call __cudaUnregisterFatBinary@PLT
addq $8, %rsp
.cfi_def_cfa_offset 8
ret
.cfi_endproc
.LFE2029:
.size _ZL26__cudaUnregisterBinaryUtilv, .-_ZL26__cudaUnregisterBinaryUtilv
.globl _Z35__device_stub__Z12copyBestPathiPiS_iPiS_
.type _Z35__device_stub__Z12copyBestPathiPiS_iPiS_, @function
_Z35__device_stub__Z12copyBestPathiPiS_iPiS_:
.LFB2051:
.cfi_startproc
endbr64
subq $136, %rsp
.cfi_def_cfa_offset 144
movl %edi, 28(%rsp)
movq %rsi, 16(%rsp)
movq %rdx, 8(%rsp)
movq %fs:40, %rax
movq %rax, 120(%rsp)
xorl %eax, %eax
leaq 28(%rsp), %rax
movq %rax, 96(%rsp)
leaq 16(%rsp), %rax
movq %rax, 104(%rsp)
leaq 8(%rsp), %rax
movq %rax, 112(%rsp)
movl $1, 48(%rsp)
movl $1, 52(%rsp)
movl $1, 56(%rsp)
movl $1, 60(%rsp)
movl $1, 64(%rsp)
movl $1, 68(%rsp)
leaq 40(%rsp), %rcx
leaq 32(%rsp), %rdx
leaq 60(%rsp), %rsi
leaq 48(%rsp), %rdi
call __cudaPopCallConfiguration@PLT
testl %eax, %eax
je .L7
.L3:
movq 120(%rsp), %rax
subq %fs:40, %rax
jne .L8
addq $136, %rsp
.cfi_remember_state
.cfi_def_cfa_offset 8
ret
.L7:
.cfi_restore_state
pushq 40(%rsp)
.cfi_def_cfa_offset 152
pushq 40(%rsp)
.cfi_def_cfa_offset 160
leaq 112(%rsp), %r9
movq 76(%rsp), %rcx
movl 84(%rsp), %r8d
movq 64(%rsp), %rsi
movl 72(%rsp), %edx
leaq _Z12copyBestPathiPiS_(%rip), %rdi
call cudaLaunchKernel@PLT
addq $16, %rsp
.cfi_def_cfa_offset 144
jmp .L3
.L8:
call __stack_chk_fail@PLT
.cfi_endproc
.LFE2051:
.size _Z35__device_stub__Z12copyBestPathiPiS_iPiS_, .-_Z35__device_stub__Z12copyBestPathiPiS_iPiS_
.globl _Z12copyBestPathiPiS_
.type _Z12copyBestPathiPiS_, @function
_Z12copyBestPathiPiS_:
.LFB2052:
.cfi_startproc
endbr64
subq $8, %rsp
.cfi_def_cfa_offset 16
call _Z35__device_stub__Z12copyBestPathiPiS_iPiS_
addq $8, %rsp
.cfi_def_cfa_offset 8
ret
.cfi_endproc
.LFE2052:
.size _Z12copyBestPathiPiS_, .-_Z12copyBestPathiPiS_
.section .rodata.str1.1,"aMS",@progbits,1
.LC0:
.string "_Z12copyBestPathiPiS_"
.text
.type _ZL24__sti____cudaRegisterAllv, @function
_ZL24__sti____cudaRegisterAllv:
.LFB2054:
.cfi_startproc
endbr64
subq $8, %rsp
.cfi_def_cfa_offset 16
leaq _ZL15__fatDeviceText(%rip), %rdi
call __cudaRegisterFatBinary@PLT
movq %rax, %rdi
movq %rax, _ZL20__cudaFatCubinHandle(%rip)
pushq $0
.cfi_def_cfa_offset 24
pushq $0
.cfi_def_cfa_offset 32
pushq $0
.cfi_def_cfa_offset 40
pushq $0
.cfi_def_cfa_offset 48
movl $0, %r9d
movl $-1, %r8d
leaq .LC0(%rip), %rdx
movq %rdx, %rcx
leaq _Z12copyBestPathiPiS_(%rip), %rsi
call __cudaRegisterFunction@PLT
addq $32, %rsp
.cfi_def_cfa_offset 16
movq _ZL20__cudaFatCubinHandle(%rip), %rdi
call __cudaRegisterFatBinaryEnd@PLT
leaq _ZL26__cudaUnregisterBinaryUtilv(%rip), %rdi
call atexit@PLT
addq $8, %rsp
.cfi_def_cfa_offset 8
ret
.cfi_endproc
.LFE2054:
.size _ZL24__sti____cudaRegisterAllv, .-_ZL24__sti____cudaRegisterAllv
.section .init_array,"aw"
.align 8
.quad _ZL24__sti____cudaRegisterAllv
.section .nvFatBinSegment,"aw"
.align 8
.type _ZL15__fatDeviceText, @object
.size _ZL15__fatDeviceText, 24
_ZL15__fatDeviceText:
.long 1180844977
.long 1
.quad fatbinData
.quad 0
.local _ZL20__cudaFatCubinHandle
.comm _ZL20__cudaFatCubinHandle,8,8
.ident "GCC: (Ubuntu 13.3.0-6ubuntu2~24.04) 13.3.0"
.section .note.GNU-stack,"",@progbits
.section .note.gnu.property,"a"
.align 8
.long 1f - 0f
.long 4f - 1f
.long 5
0:
.string "GNU"
1:
.align 8
.long 0xc0000002
.long 3f - 2f
2:
.long 0x3
3:
.align 8
4: |
You are a helpful coding assistant specialized in converting CUDA source code to HIP/AMD source code. | #include "includes.h"
/**
* Project TACO: Parallel ACO algorithm for TSP
* 15-418 Parallel Algorithms - Final Project
* Ivan Wang, Carl Lin
*/
#define MAX_THREADS 128
__global__ void copyBestPath(int i, int *bestPathResult, int *pathResults) {
memcpy(bestPathResult, &pathResults[i * MAX_ANTS], MAX_CITIES * sizeof(int));
} | #include <hip/hip_runtime.h>
#include "includes.h"
/**
* Project TACO: Parallel ACO algorithm for TSP
* 15-418 Parallel Algorithms - Final Project
* Ivan Wang, Carl Lin
*/
#define MAX_THREADS 128
__global__ void copyBestPath(int i, int *bestPathResult, int *pathResults) {
memcpy(bestPathResult, &pathResults[i * MAX_ANTS], MAX_CITIES * sizeof(int));
} |
You are a helpful coding assistant specialized in converting HIP source code to AMD device assembly. | #include <hip/hip_runtime.h>
#include "includes.h"
/**
* Project TACO: Parallel ACO algorithm for TSP
* 15-418 Parallel Algorithms - Final Project
* Ivan Wang, Carl Lin
*/
#define MAX_THREADS 128
__global__ void copyBestPath(int i, int *bestPathResult, int *pathResults) {
memcpy(bestPathResult, &pathResults[i * MAX_ANTS], MAX_CITIES * sizeof(int));
} | .text
.amdgcn_target "amdgcn-amd-amdhsa--gfx1100"
.protected _Z12copyBestPathiPiS_
.globl _Z12copyBestPathiPiS_
.p2align 8
.type _Z12copyBestPathiPiS_,@function
_Z12copyBestPathiPiS_:
s_clause 0x1
s_load_b32 s4, s[0:1], 0x0
s_load_b128 s[0:3], s[0:1], 0x8
v_mov_b32_e32 v0, 0
s_waitcnt lgkmcnt(0)
s_mul_i32 s4, s4, 30
s_delay_alu instid0(SALU_CYCLE_1) | instskip(NEXT) | instid1(SALU_CYCLE_1)
s_ashr_i32 s5, s4, 31
s_lshl_b64 s[4:5], s[4:5], 2
s_delay_alu instid0(SALU_CYCLE_1)
s_add_u32 s4, s2, s4
s_addc_u32 s5, s3, s5
s_mov_b64 s[2:3], 0
.p2align 6
.LBB0_1:
s_delay_alu instid0(SALU_CYCLE_1)
s_add_u32 s6, s4, s2
s_addc_u32 s7, s5, s3
s_add_u32 s8, s0, s2
global_load_u8 v1, v0, s[6:7]
s_addc_u32 s9, s1, s3
s_add_u32 s2, s2, 4
s_addc_u32 s3, s3, 0
s_delay_alu instid0(SALU_CYCLE_1)
s_cmp_lg_u64 s[2:3], 0x78
s_waitcnt vmcnt(0)
global_store_b8 v0, v1, s[8:9]
global_load_u8 v1, v0, s[6:7] offset:1
s_waitcnt vmcnt(0)
global_store_b8 v0, v1, s[8:9] offset:1
global_load_u8 v1, v0, s[6:7] offset:2
s_waitcnt vmcnt(0)
global_store_b8 v0, v1, s[8:9] offset:2
global_load_u8 v1, v0, s[6:7] offset:3
s_waitcnt vmcnt(0)
global_store_b8 v0, v1, s[8:9] offset:3
s_cbranch_scc1 .LBB0_1
s_nop 0
s_sendmsg sendmsg(MSG_DEALLOC_VGPRS)
s_endpgm
.section .rodata,"a",@progbits
.p2align 6, 0x0
.amdhsa_kernel _Z12copyBestPathiPiS_
.amdhsa_group_segment_fixed_size 0
.amdhsa_private_segment_fixed_size 0
.amdhsa_kernarg_size 24
.amdhsa_user_sgpr_count 15
.amdhsa_user_sgpr_dispatch_ptr 0
.amdhsa_user_sgpr_queue_ptr 0
.amdhsa_user_sgpr_kernarg_segment_ptr 1
.amdhsa_user_sgpr_dispatch_id 0
.amdhsa_user_sgpr_private_segment_size 0
.amdhsa_wavefront_size32 1
.amdhsa_uses_dynamic_stack 0
.amdhsa_enable_private_segment 0
.amdhsa_system_sgpr_workgroup_id_x 1
.amdhsa_system_sgpr_workgroup_id_y 0
.amdhsa_system_sgpr_workgroup_id_z 0
.amdhsa_system_sgpr_workgroup_info 0
.amdhsa_system_vgpr_workitem_id 0
.amdhsa_next_free_vgpr 2
.amdhsa_next_free_sgpr 10
.amdhsa_reserve_vcc 0
.amdhsa_float_round_mode_32 0
.amdhsa_float_round_mode_16_64 0
.amdhsa_float_denorm_mode_32 3
.amdhsa_float_denorm_mode_16_64 3
.amdhsa_dx10_clamp 1
.amdhsa_ieee_mode 1
.amdhsa_fp16_overflow 0
.amdhsa_workgroup_processor_mode 1
.amdhsa_memory_ordered 1
.amdhsa_forward_progress 0
.amdhsa_shared_vgpr_count 0
.amdhsa_exception_fp_ieee_invalid_op 0
.amdhsa_exception_fp_denorm_src 0
.amdhsa_exception_fp_ieee_div_zero 0
.amdhsa_exception_fp_ieee_overflow 0
.amdhsa_exception_fp_ieee_underflow 0
.amdhsa_exception_fp_ieee_inexact 0
.amdhsa_exception_int_div_zero 0
.end_amdhsa_kernel
.text
.Lfunc_end0:
.size _Z12copyBestPathiPiS_, .Lfunc_end0-_Z12copyBestPathiPiS_
.section .AMDGPU.csdata,"",@progbits
.text
.p2alignl 7, 3214868480
.fill 96, 4, 3214868480
.type __hip_cuid_,@object
.section .bss,"aw",@nobits
.globl __hip_cuid_
__hip_cuid_:
.byte 0
.size __hip_cuid_, 1
.ident "AMD clang version 18.0.0git (https://github.com/RadeonOpenCompute/llvm-project roc-6.3.2 25012 e5bf7e55c91490b07c49d8960fa7983d864936c4)"
.section ".note.GNU-stack","",@progbits
.addrsig
.addrsig_sym __hip_cuid_
.amdgpu_metadata
---
amdhsa.kernels:
- .args:
- .offset: 0
.size: 4
.value_kind: by_value
- .address_space: global
.offset: 8
.size: 8
.value_kind: global_buffer
- .address_space: global
.offset: 16
.size: 8
.value_kind: global_buffer
.group_segment_fixed_size: 0
.kernarg_segment_align: 8
.kernarg_segment_size: 24
.language: OpenCL C
.language_version:
- 2
- 0
.max_flat_workgroup_size: 1024
.name: _Z12copyBestPathiPiS_
.private_segment_fixed_size: 0
.sgpr_count: 10
.sgpr_spill_count: 0
.symbol: _Z12copyBestPathiPiS_.kd
.uniform_work_group_size: 1
.uses_dynamic_stack: false
.vgpr_count: 2
.vgpr_spill_count: 0
.wavefront_size: 32
.workgroup_processor_mode: 1
amdhsa.target: amdgcn-amd-amdhsa--gfx1100
amdhsa.version:
- 1
- 2
...
.end_amdgpu_metadata |
You are a helpful coding assistant specialized in converting HIP source code to AMD host assembly. | #include <hip/hip_runtime.h>
#include "includes.h"
/**
* Project TACO: Parallel ACO algorithm for TSP
* 15-418 Parallel Algorithms - Final Project
* Ivan Wang, Carl Lin
*/
#define MAX_THREADS 128
__global__ void copyBestPath(int i, int *bestPathResult, int *pathResults) {
memcpy(bestPathResult, &pathResults[i * MAX_ANTS], MAX_CITIES * sizeof(int));
} | .text
.file "copyBestPath.hip"
.globl _Z27__device_stub__copyBestPathiPiS_ # -- Begin function _Z27__device_stub__copyBestPathiPiS_
.p2align 4, 0x90
.type _Z27__device_stub__copyBestPathiPiS_,@function
_Z27__device_stub__copyBestPathiPiS_: # @_Z27__device_stub__copyBestPathiPiS_
.cfi_startproc
# %bb.0:
subq $104, %rsp
.cfi_def_cfa_offset 112
movl %edi, 12(%rsp)
movq %rsi, 72(%rsp)
movq %rdx, 64(%rsp)
leaq 12(%rsp), %rax
movq %rax, 80(%rsp)
leaq 72(%rsp), %rax
movq %rax, 88(%rsp)
leaq 64(%rsp), %rax
movq %rax, 96(%rsp)
leaq 48(%rsp), %rdi
leaq 32(%rsp), %rsi
leaq 24(%rsp), %rdx
leaq 16(%rsp), %rcx
callq __hipPopCallConfiguration
movq 48(%rsp), %rsi
movl 56(%rsp), %edx
movq 32(%rsp), %rcx
movl 40(%rsp), %r8d
leaq 80(%rsp), %r9
movl $_Z12copyBestPathiPiS_, %edi
pushq 16(%rsp)
.cfi_adjust_cfa_offset 8
pushq 32(%rsp)
.cfi_adjust_cfa_offset 8
callq hipLaunchKernel
addq $120, %rsp
.cfi_adjust_cfa_offset -120
retq
.Lfunc_end0:
.size _Z27__device_stub__copyBestPathiPiS_, .Lfunc_end0-_Z27__device_stub__copyBestPathiPiS_
.cfi_endproc
# -- End function
.p2align 4, 0x90 # -- Begin function __hip_module_ctor
.type __hip_module_ctor,@function
__hip_module_ctor: # @__hip_module_ctor
.cfi_startproc
# %bb.0:
subq $40, %rsp
.cfi_def_cfa_offset 48
cmpq $0, __hip_gpubin_handle(%rip)
jne .LBB1_2
# %bb.1:
movl $__hip_fatbin_wrapper, %edi
callq __hipRegisterFatBinary
movq %rax, __hip_gpubin_handle(%rip)
.LBB1_2:
movq __hip_gpubin_handle(%rip), %rdi
xorps %xmm0, %xmm0
movups %xmm0, 16(%rsp)
movups %xmm0, (%rsp)
movl $_Z12copyBestPathiPiS_, %esi
movl $.L__unnamed_1, %edx
movl $.L__unnamed_1, %ecx
movl $-1, %r8d
xorl %r9d, %r9d
callq __hipRegisterFunction
movl $__hip_module_dtor, %edi
addq $40, %rsp
.cfi_def_cfa_offset 8
jmp atexit # TAILCALL
.Lfunc_end1:
.size __hip_module_ctor, .Lfunc_end1-__hip_module_ctor
.cfi_endproc
# -- End function
.p2align 4, 0x90 # -- Begin function __hip_module_dtor
.type __hip_module_dtor,@function
__hip_module_dtor: # @__hip_module_dtor
.cfi_startproc
# %bb.0:
movq __hip_gpubin_handle(%rip), %rdi
testq %rdi, %rdi
je .LBB2_2
# %bb.1:
pushq %rax
.cfi_def_cfa_offset 16
callq __hipUnregisterFatBinary
movq $0, __hip_gpubin_handle(%rip)
addq $8, %rsp
.cfi_def_cfa_offset 8
.LBB2_2:
retq
.Lfunc_end2:
.size __hip_module_dtor, .Lfunc_end2-__hip_module_dtor
.cfi_endproc
# -- End function
.type _Z12copyBestPathiPiS_,@object # @_Z12copyBestPathiPiS_
.section .rodata,"a",@progbits
.globl _Z12copyBestPathiPiS_
.p2align 3, 0x0
_Z12copyBestPathiPiS_:
.quad _Z27__device_stub__copyBestPathiPiS_
.size _Z12copyBestPathiPiS_, 8
.type .L__unnamed_1,@object # @0
.section .rodata.str1.1,"aMS",@progbits,1
.L__unnamed_1:
.asciz "_Z12copyBestPathiPiS_"
.size .L__unnamed_1, 22
.type __hip_fatbin_wrapper,@object # @__hip_fatbin_wrapper
.section .hipFatBinSegment,"a",@progbits
.p2align 3, 0x0
__hip_fatbin_wrapper:
.long 1212764230 # 0x48495046
.long 1 # 0x1
.quad __hip_fatbin
.quad 0
.size __hip_fatbin_wrapper, 24
.type __hip_gpubin_handle,@object # @__hip_gpubin_handle
.local __hip_gpubin_handle
.comm __hip_gpubin_handle,8,8
.section .init_array,"aw",@init_array
.p2align 3, 0x0
.quad __hip_module_ctor
.type __hip_cuid_,@object # @__hip_cuid_
.bss
.globl __hip_cuid_
__hip_cuid_:
.byte 0 # 0x0
.size __hip_cuid_, 1
.section ".linker-options","e",@llvm_linker_options
.ident "AMD clang version 18.0.0git (https://github.com/RadeonOpenCompute/llvm-project roc-6.3.2 25012 e5bf7e55c91490b07c49d8960fa7983d864936c4)"
.section ".note.GNU-stack","",@progbits
.addrsig
.addrsig_sym _Z27__device_stub__copyBestPathiPiS_
.addrsig_sym __hip_module_ctor
.addrsig_sym __hip_module_dtor
.addrsig_sym _Z12copyBestPathiPiS_
.addrsig_sym __hip_fatbin
.addrsig_sym __hip_fatbin_wrapper
.addrsig_sym __hip_cuid_ |
You are a helpful coding assistant specialized in converting from CUDA device assembly to AMD device assembly. | code for sm_80
Function : _Z12copyBestPathiPiS_
.headerflags @"EF_CUDA_TEXMODE_UNIFIED EF_CUDA_64BIT_ADDRESS EF_CUDA_SM80 EF_CUDA_VIRTUAL_SM(EF_CUDA_SM80)"
/*0000*/ MOV R1, c[0x0][0x28] ; /* 0x00000a0000017a02 */
/* 0x000fe40000000f00 */
/*0010*/ HFMA2.MMA R5, -RZ, RZ, 0, 2.384185791015625e-07 ; /* 0x00000004ff057435 */
/* 0x000fe200000001ff */
/*0020*/ MOV R4, c[0x0][0x160] ; /* 0x0000580000047a02 */
/* 0x000fe20000000f00 */
/*0030*/ ULDC.64 UR4, c[0x0][0x118] ; /* 0x0000460000047ab9 */
/* 0x000fc80000000a00 */
/*0040*/ IMAD R4, R4, 0x1e, RZ ; /* 0x0000001e04047824 */
/* 0x000fc800078e02ff */
/*0050*/ IMAD.WIDE R4, R4, R5, c[0x0][0x170] ; /* 0x00005c0004047625 */
/* 0x000fca00078e0205 */
/*0060*/ LDG.E.U8 R7, [R4.64] ; /* 0x0000000404077981 */
/* 0x000ea2000c1e1100 */
/*0070*/ MOV R2, c[0x0][0x168] ; /* 0x00005a0000027a02 */
/* 0x000fe40000000f00 */
/*0080*/ MOV R3, c[0x0][0x16c] ; /* 0x00005b0000037a02 */
/* 0x000fca0000000f00 */
/*0090*/ STG.E.U8 [R2.64], R7 ; /* 0x0000000702007986 */
/* 0x0041e8000c101104 */
/*00a0*/ LDG.E.U8 R9, [R4.64+0x1] ; /* 0x0000010404097981 */
/* 0x000ea8000c1e1100 */
/*00b0*/ STG.E.U8 [R2.64+0x1], R9 ; /* 0x0000010902007986 */
/* 0x0043e8000c101104 */
/*00c0*/ LDG.E.U8 R11, [R4.64+0x2] ; /* 0x00000204040b7981 */
/* 0x000ea8000c1e1100 */
/*00d0*/ STG.E.U8 [R2.64+0x2], R11 ; /* 0x0000020b02007986 */
/* 0x0045e8000c101104 */
/*00e0*/ LDG.E.U8 R13, [R4.64+0x3] ; /* 0x00000304040d7981 */
/* 0x000ee8000c1e1100 */
/*00f0*/ STG.E.U8 [R2.64+0x3], R13 ; /* 0x0000030d02007986 */
/* 0x0087e8000c101104 */
/*0100*/ LDG.E.U8 R15, [R4.64+0x4] ; /* 0x00000404040f7981 */
/* 0x000f28000c1e1100 */
/*0110*/ STG.E.U8 [R2.64+0x4], R15 ; /* 0x0000040f02007986 */
/* 0x0109e8000c101104 */
/*0120*/ LDG.E.U8 R17, [R4.64+0x5] ; /* 0x0000050404117981 */
/* 0x000f68000c1e1100 */
/*0130*/ STG.E.U8 [R2.64+0x5], R17 ; /* 0x0000051102007986 */
/* 0x020be8000c101104 */
/*0140*/ LDG.E.U8 R7, [R4.64+0x6] ; /* 0x0000060404077981 */
/* 0x001ea8000c1e1100 */
/*0150*/ STG.E.U8 [R2.64+0x6], R7 ; /* 0x0000060702007986 */
/* 0x0041e8000c101104 */
/*0160*/ LDG.E.U8 R9, [R4.64+0x7] ; /* 0x0000070404097981 */
/* 0x002ea8000c1e1100 */
/*0170*/ STG.E.U8 [R2.64+0x7], R9 ; /* 0x0000070902007986 */
/* 0x0043e8000c101104 */
/*0180*/ LDG.E.U8 R11, [R4.64+0x8] ; /* 0x00000804040b7981 */
/* 0x000ea8000c1e1100 */
/*0190*/ STG.E.U8 [R2.64+0x8], R11 ; /* 0x0000080b02007986 */
/* 0x0045e8000c101104 */
/*01a0*/ LDG.E.U8 R13, [R4.64+0x9] ; /* 0x00000904040d7981 */
/* 0x008ee8000c1e1100 */
/*01b0*/ STG.E.U8 [R2.64+0x9], R13 ; /* 0x0000090d02007986 */
/* 0x0087e8000c101104 */
/*01c0*/ LDG.E.U8 R15, [R4.64+0xa] ; /* 0x00000a04040f7981 */
/* 0x010f28000c1e1100 */
/*01d0*/ STG.E.U8 [R2.64+0xa], R15 ; /* 0x00000a0f02007986 */
/* 0x0109e8000c101104 */
/*01e0*/ LDG.E.U8 R17, [R4.64+0xb] ; /* 0x00000b0404117981 */
/* 0x020f68000c1e1100 */
/*01f0*/ STG.E.U8 [R2.64+0xb], R17 ; /* 0x00000b1102007986 */
/* 0x020be8000c101104 */
/*0200*/ LDG.E.U8 R7, [R4.64+0xc] ; /* 0x00000c0404077981 */
/* 0x001ea8000c1e1100 */
/*0210*/ STG.E.U8 [R2.64+0xc], R7 ; /* 0x00000c0702007986 */
/* 0x0041e8000c101104 */
/*0220*/ LDG.E.U8 R9, [R4.64+0xd] ; /* 0x00000d0404097981 */
/* 0x002ea8000c1e1100 */
/*0230*/ STG.E.U8 [R2.64+0xd], R9 ; /* 0x00000d0902007986 */
/* 0x0043e8000c101104 */
/*0240*/ LDG.E.U8 R11, [R4.64+0xe] ; /* 0x00000e04040b7981 */
/* 0x000ea8000c1e1100 */
/*0250*/ STG.E.U8 [R2.64+0xe], R11 ; /* 0x00000e0b02007986 */
/* 0x0045e8000c101104 */
/*0260*/ LDG.E.U8 R13, [R4.64+0xf] ; /* 0x00000f04040d7981 */
/* 0x008ee8000c1e1100 */
/*0270*/ STG.E.U8 [R2.64+0xf], R13 ; /* 0x00000f0d02007986 */
/* 0x0087e8000c101104 */
/*0280*/ LDG.E.U8 R15, [R4.64+0x10] ; /* 0x00001004040f7981 */
/* 0x010f28000c1e1100 */
/*0290*/ STG.E.U8 [R2.64+0x10], R15 ; /* 0x0000100f02007986 */
/* 0x0109e8000c101104 */
/*02a0*/ LDG.E.U8 R17, [R4.64+0x11] ; /* 0x0000110404117981 */
/* 0x020f68000c1e1100 */
/*02b0*/ STG.E.U8 [R2.64+0x11], R17 ; /* 0x0000111102007986 */
/* 0x020be8000c101104 */
/*02c0*/ LDG.E.U8 R7, [R4.64+0x12] ; /* 0x0000120404077981 */
/* 0x001ea8000c1e1100 */
/*02d0*/ STG.E.U8 [R2.64+0x12], R7 ; /* 0x0000120702007986 */
/* 0x0041e8000c101104 */
/*02e0*/ LDG.E.U8 R9, [R4.64+0x13] ; /* 0x0000130404097981 */
/* 0x002ea8000c1e1100 */
/*02f0*/ STG.E.U8 [R2.64+0x13], R9 ; /* 0x0000130902007986 */
/* 0x0043e8000c101104 */
/*0300*/ LDG.E.U8 R11, [R4.64+0x14] ; /* 0x00001404040b7981 */
/* 0x000ea8000c1e1100 */
/*0310*/ STG.E.U8 [R2.64+0x14], R11 ; /* 0x0000140b02007986 */
/* 0x0045e8000c101104 */
/*0320*/ LDG.E.U8 R13, [R4.64+0x15] ; /* 0x00001504040d7981 */
/* 0x008ee8000c1e1100 */
/*0330*/ STG.E.U8 [R2.64+0x15], R13 ; /* 0x0000150d02007986 */
/* 0x0087e8000c101104 */
/*0340*/ LDG.E.U8 R15, [R4.64+0x16] ; /* 0x00001604040f7981 */
/* 0x010f28000c1e1100 */
/*0350*/ STG.E.U8 [R2.64+0x16], R15 ; /* 0x0000160f02007986 */
/* 0x0109e8000c101104 */
/*0360*/ LDG.E.U8 R17, [R4.64+0x17] ; /* 0x0000170404117981 */
/* 0x020f68000c1e1100 */
/*0370*/ STG.E.U8 [R2.64+0x17], R17 ; /* 0x0000171102007986 */
/* 0x020be8000c101104 */
/*0380*/ LDG.E.U8 R7, [R4.64+0x18] ; /* 0x0000180404077981 */
/* 0x001ea8000c1e1100 */
/*0390*/ STG.E.U8 [R2.64+0x18], R7 ; /* 0x0000180702007986 */
/* 0x0041e8000c101104 */
/*03a0*/ LDG.E.U8 R9, [R4.64+0x19] ; /* 0x0000190404097981 */
/* 0x002ea8000c1e1100 */
/*03b0*/ STG.E.U8 [R2.64+0x19], R9 ; /* 0x0000190902007986 */
/* 0x0043e8000c101104 */
/*03c0*/ LDG.E.U8 R11, [R4.64+0x1a] ; /* 0x00001a04040b7981 */
/* 0x000ea8000c1e1100 */
/*03d0*/ STG.E.U8 [R2.64+0x1a], R11 ; /* 0x00001a0b02007986 */
/* 0x0045e8000c101104 */
/*03e0*/ LDG.E.U8 R13, [R4.64+0x1b] ; /* 0x00001b04040d7981 */
/* 0x008ee8000c1e1100 */
/*03f0*/ STG.E.U8 [R2.64+0x1b], R13 ; /* 0x00001b0d02007986 */
/* 0x0087e8000c101104 */
/*0400*/ LDG.E.U8 R15, [R4.64+0x1c] ; /* 0x00001c04040f7981 */
/* 0x010f28000c1e1100 */
/*0410*/ STG.E.U8 [R2.64+0x1c], R15 ; /* 0x00001c0f02007986 */
/* 0x0109e8000c101104 */
/*0420*/ LDG.E.U8 R17, [R4.64+0x1d] ; /* 0x00001d0404117981 */
/* 0x020f68000c1e1100 */
/*0430*/ STG.E.U8 [R2.64+0x1d], R17 ; /* 0x00001d1102007986 */
/* 0x020be8000c101104 */
/*0440*/ LDG.E.U8 R7, [R4.64+0x1e] ; /* 0x00001e0404077981 */
/* 0x001ea8000c1e1100 */
/*0450*/ STG.E.U8 [R2.64+0x1e], R7 ; /* 0x00001e0702007986 */
/* 0x0041e8000c101104 */
/*0460*/ LDG.E.U8 R9, [R4.64+0x1f] ; /* 0x00001f0404097981 */
/* 0x002ea8000c1e1100 */
/*0470*/ STG.E.U8 [R2.64+0x1f], R9 ; /* 0x00001f0902007986 */
/* 0x0043e8000c101104 */
/*0480*/ LDG.E.U8 R11, [R4.64+0x20] ; /* 0x00002004040b7981 */
/* 0x000ea8000c1e1100 */
/*0490*/ STG.E.U8 [R2.64+0x20], R11 ; /* 0x0000200b02007986 */
/* 0x0045e8000c101104 */
/*04a0*/ LDG.E.U8 R13, [R4.64+0x21] ; /* 0x00002104040d7981 */
/* 0x008ee8000c1e1100 */
/*04b0*/ STG.E.U8 [R2.64+0x21], R13 ; /* 0x0000210d02007986 */
/* 0x0087e8000c101104 */
/*04c0*/ LDG.E.U8 R15, [R4.64+0x22] ; /* 0x00002204040f7981 */
/* 0x010f28000c1e1100 */
/*04d0*/ STG.E.U8 [R2.64+0x22], R15 ; /* 0x0000220f02007986 */
/* 0x0109e8000c101104 */
/*04e0*/ LDG.E.U8 R17, [R4.64+0x23] ; /* 0x0000230404117981 */
/* 0x020f68000c1e1100 */
/*04f0*/ STG.E.U8 [R2.64+0x23], R17 ; /* 0x0000231102007986 */
/* 0x020be8000c101104 */
/*0500*/ LDG.E.U8 R7, [R4.64+0x24] ; /* 0x0000240404077981 */
/* 0x001ea8000c1e1100 */
/*0510*/ STG.E.U8 [R2.64+0x24], R7 ; /* 0x0000240702007986 */
/* 0x0041e8000c101104 */
/*0520*/ LDG.E.U8 R9, [R4.64+0x25] ; /* 0x0000250404097981 */
/* 0x002ea8000c1e1100 */
/*0530*/ STG.E.U8 [R2.64+0x25], R9 ; /* 0x0000250902007986 */
/* 0x0043e8000c101104 */
/*0540*/ LDG.E.U8 R11, [R4.64+0x26] ; /* 0x00002604040b7981 */
/* 0x000ea8000c1e1100 */
/*0550*/ STG.E.U8 [R2.64+0x26], R11 ; /* 0x0000260b02007986 */
/* 0x0045e8000c101104 */
/*0560*/ LDG.E.U8 R13, [R4.64+0x27] ; /* 0x00002704040d7981 */
/* 0x008ee8000c1e1100 */
/*0570*/ STG.E.U8 [R2.64+0x27], R13 ; /* 0x0000270d02007986 */
/* 0x0087e8000c101104 */
/*0580*/ LDG.E.U8 R15, [R4.64+0x28] ; /* 0x00002804040f7981 */
/* 0x010f28000c1e1100 */
/*0590*/ STG.E.U8 [R2.64+0x28], R15 ; /* 0x0000280f02007986 */
/* 0x0109e8000c101104 */
/*05a0*/ LDG.E.U8 R17, [R4.64+0x29] ; /* 0x0000290404117981 */
/* 0x020f68000c1e1100 */
/*05b0*/ STG.E.U8 [R2.64+0x29], R17 ; /* 0x0000291102007986 */
/* 0x020be8000c101104 */
/*05c0*/ LDG.E.U8 R7, [R4.64+0x2a] ; /* 0x00002a0404077981 */
/* 0x001ea8000c1e1100 */
/*05d0*/ STG.E.U8 [R2.64+0x2a], R7 ; /* 0x00002a0702007986 */
/* 0x0041e8000c101104 */
/*05e0*/ LDG.E.U8 R9, [R4.64+0x2b] ; /* 0x00002b0404097981 */
/* 0x002ea8000c1e1100 */
/*05f0*/ STG.E.U8 [R2.64+0x2b], R9 ; /* 0x00002b0902007986 */
/* 0x0043e8000c101104 */
/*0600*/ LDG.E.U8 R11, [R4.64+0x2c] ; /* 0x00002c04040b7981 */
/* 0x000ea8000c1e1100 */
/*0610*/ STG.E.U8 [R2.64+0x2c], R11 ; /* 0x00002c0b02007986 */
/* 0x0045e8000c101104 */
/*0620*/ LDG.E.U8 R13, [R4.64+0x2d] ; /* 0x00002d04040d7981 */
/* 0x008ee8000c1e1100 */
/*0630*/ STG.E.U8 [R2.64+0x2d], R13 ; /* 0x00002d0d02007986 */
/* 0x0087e8000c101104 */
/*0640*/ LDG.E.U8 R15, [R4.64+0x2e] ; /* 0x00002e04040f7981 */
/* 0x010f28000c1e1100 */
/*0650*/ STG.E.U8 [R2.64+0x2e], R15 ; /* 0x00002e0f02007986 */
/* 0x0109e8000c101104 */
/*0660*/ LDG.E.U8 R17, [R4.64+0x2f] ; /* 0x00002f0404117981 */
/* 0x020f68000c1e1100 */
/*0670*/ STG.E.U8 [R2.64+0x2f], R17 ; /* 0x00002f1102007986 */
/* 0x020be8000c101104 */
/*0680*/ LDG.E.U8 R7, [R4.64+0x30] ; /* 0x0000300404077981 */
/* 0x001ea8000c1e1100 */
/*0690*/ STG.E.U8 [R2.64+0x30], R7 ; /* 0x0000300702007986 */
/* 0x0041e8000c101104 */
/*06a0*/ LDG.E.U8 R9, [R4.64+0x31] ; /* 0x0000310404097981 */
/* 0x002ea8000c1e1100 */
/*06b0*/ STG.E.U8 [R2.64+0x31], R9 ; /* 0x0000310902007986 */
/* 0x0043e8000c101104 */
/*06c0*/ LDG.E.U8 R11, [R4.64+0x32] ; /* 0x00003204040b7981 */
/* 0x000ea8000c1e1100 */
/*06d0*/ STG.E.U8 [R2.64+0x32], R11 ; /* 0x0000320b02007986 */
/* 0x0045e8000c101104 */
/*06e0*/ LDG.E.U8 R13, [R4.64+0x33] ; /* 0x00003304040d7981 */
/* 0x008ee8000c1e1100 */
/*06f0*/ STG.E.U8 [R2.64+0x33], R13 ; /* 0x0000330d02007986 */
/* 0x0087e8000c101104 */
/*0700*/ LDG.E.U8 R15, [R4.64+0x34] ; /* 0x00003404040f7981 */
/* 0x010f28000c1e1100 */
/*0710*/ STG.E.U8 [R2.64+0x34], R15 ; /* 0x0000340f02007986 */
/* 0x0109e8000c101104 */
/*0720*/ LDG.E.U8 R17, [R4.64+0x35] ; /* 0x0000350404117981 */
/* 0x020f68000c1e1100 */
/*0730*/ STG.E.U8 [R2.64+0x35], R17 ; /* 0x0000351102007986 */
/* 0x020be8000c101104 */
/*0740*/ LDG.E.U8 R7, [R4.64+0x36] ; /* 0x0000360404077981 */
/* 0x001ea8000c1e1100 */
/*0750*/ STG.E.U8 [R2.64+0x36], R7 ; /* 0x0000360702007986 */
/* 0x0041e8000c101104 */
/*0760*/ LDG.E.U8 R9, [R4.64+0x37] ; /* 0x0000370404097981 */
/* 0x002ea8000c1e1100 */
/*0770*/ STG.E.U8 [R2.64+0x37], R9 ; /* 0x0000370902007986 */
/* 0x0043e8000c101104 */
/*0780*/ LDG.E.U8 R11, [R4.64+0x38] ; /* 0x00003804040b7981 */
/* 0x000ea8000c1e1100 */
/*0790*/ STG.E.U8 [R2.64+0x38], R11 ; /* 0x0000380b02007986 */
/* 0x0045e8000c101104 */
/*07a0*/ LDG.E.U8 R13, [R4.64+0x39] ; /* 0x00003904040d7981 */
/* 0x008ee8000c1e1100 */
/*07b0*/ STG.E.U8 [R2.64+0x39], R13 ; /* 0x0000390d02007986 */
/* 0x0087e8000c101104 */
/*07c0*/ LDG.E.U8 R15, [R4.64+0x3a] ; /* 0x00003a04040f7981 */
/* 0x010f28000c1e1100 */
/*07d0*/ STG.E.U8 [R2.64+0x3a], R15 ; /* 0x00003a0f02007986 */
/* 0x0109e8000c101104 */
/*07e0*/ LDG.E.U8 R17, [R4.64+0x3b] ; /* 0x00003b0404117981 */
/* 0x020f68000c1e1100 */
/*07f0*/ STG.E.U8 [R2.64+0x3b], R17 ; /* 0x00003b1102007986 */
/* 0x020be8000c101104 */
/*0800*/ LDG.E.U8 R7, [R4.64+0x3c] ; /* 0x00003c0404077981 */
/* 0x001ea8000c1e1100 */
/*0810*/ STG.E.U8 [R2.64+0x3c], R7 ; /* 0x00003c0702007986 */
/* 0x0041e8000c101104 */
/*0820*/ LDG.E.U8 R9, [R4.64+0x3d] ; /* 0x00003d0404097981 */
/* 0x002ea8000c1e1100 */
/*0830*/ STG.E.U8 [R2.64+0x3d], R9 ; /* 0x00003d0902007986 */
/* 0x0043e8000c101104 */
/*0840*/ LDG.E.U8 R11, [R4.64+0x3e] ; /* 0x00003e04040b7981 */
/* 0x000ea8000c1e1100 */
/*0850*/ STG.E.U8 [R2.64+0x3e], R11 ; /* 0x00003e0b02007986 */
/* 0x0045e8000c101104 */
/*0860*/ LDG.E.U8 R13, [R4.64+0x3f] ; /* 0x00003f04040d7981 */
/* 0x008ee8000c1e1100 */
/*0870*/ STG.E.U8 [R2.64+0x3f], R13 ; /* 0x00003f0d02007986 */
/* 0x0087e8000c101104 */
/*0880*/ LDG.E.U8 R15, [R4.64+0x40] ; /* 0x00004004040f7981 */
/* 0x010f28000c1e1100 */
/*0890*/ STG.E.U8 [R2.64+0x40], R15 ; /* 0x0000400f02007986 */
/* 0x0109e8000c101104 */
/*08a0*/ LDG.E.U8 R17, [R4.64+0x41] ; /* 0x0000410404117981 */
/* 0x020f68000c1e1100 */
/*08b0*/ STG.E.U8 [R2.64+0x41], R17 ; /* 0x0000411102007986 */
/* 0x020be8000c101104 */
/*08c0*/ LDG.E.U8 R7, [R4.64+0x42] ; /* 0x0000420404077981 */
/* 0x001ea8000c1e1100 */
/*08d0*/ STG.E.U8 [R2.64+0x42], R7 ; /* 0x0000420702007986 */
/* 0x0041e8000c101104 */
/*08e0*/ LDG.E.U8 R9, [R4.64+0x43] ; /* 0x0000430404097981 */
/* 0x002ea8000c1e1100 */
/*08f0*/ STG.E.U8 [R2.64+0x43], R9 ; /* 0x0000430902007986 */
/* 0x0043e8000c101104 */
/*0900*/ LDG.E.U8 R11, [R4.64+0x44] ; /* 0x00004404040b7981 */
/* 0x000ea8000c1e1100 */
/*0910*/ STG.E.U8 [R2.64+0x44], R11 ; /* 0x0000440b02007986 */
/* 0x0045e8000c101104 */
/*0920*/ LDG.E.U8 R13, [R4.64+0x45] ; /* 0x00004504040d7981 */
/* 0x008ee8000c1e1100 */
/*0930*/ STG.E.U8 [R2.64+0x45], R13 ; /* 0x0000450d02007986 */
/* 0x0087e8000c101104 */
/*0940*/ LDG.E.U8 R15, [R4.64+0x46] ; /* 0x00004604040f7981 */
/* 0x010f28000c1e1100 */
/*0950*/ STG.E.U8 [R2.64+0x46], R15 ; /* 0x0000460f02007986 */
/* 0x0109e8000c101104 */
/*0960*/ LDG.E.U8 R17, [R4.64+0x47] ; /* 0x0000470404117981 */
/* 0x020f68000c1e1100 */
/*0970*/ STG.E.U8 [R2.64+0x47], R17 ; /* 0x0000471102007986 */
/* 0x020be8000c101104 */
/*0980*/ LDG.E.U8 R7, [R4.64+0x48] ; /* 0x0000480404077981 */
/* 0x001ea8000c1e1100 */
/*0990*/ STG.E.U8 [R2.64+0x48], R7 ; /* 0x0000480702007986 */
/* 0x0041e8000c101104 */
/*09a0*/ LDG.E.U8 R9, [R4.64+0x49] ; /* 0x0000490404097981 */
/* 0x002ea8000c1e1100 */
/*09b0*/ STG.E.U8 [R2.64+0x49], R9 ; /* 0x0000490902007986 */
/* 0x0043e8000c101104 */
/*09c0*/ LDG.E.U8 R11, [R4.64+0x4a] ; /* 0x00004a04040b7981 */
/* 0x000ea8000c1e1100 */
/*09d0*/ STG.E.U8 [R2.64+0x4a], R11 ; /* 0x00004a0b02007986 */
/* 0x0045e8000c101104 */
/*09e0*/ LDG.E.U8 R13, [R4.64+0x4b] ; /* 0x00004b04040d7981 */
/* 0x008ee8000c1e1100 */
/*09f0*/ STG.E.U8 [R2.64+0x4b], R13 ; /* 0x00004b0d02007986 */
/* 0x0087e8000c101104 */
/*0a00*/ LDG.E.U8 R15, [R4.64+0x4c] ; /* 0x00004c04040f7981 */
/* 0x010f28000c1e1100 */
/*0a10*/ STG.E.U8 [R2.64+0x4c], R15 ; /* 0x00004c0f02007986 */
/* 0x0109e8000c101104 */
/*0a20*/ LDG.E.U8 R17, [R4.64+0x4d] ; /* 0x00004d0404117981 */
/* 0x020f68000c1e1100 */
/*0a30*/ STG.E.U8 [R2.64+0x4d], R17 ; /* 0x00004d1102007986 */
/* 0x020be8000c101104 */
/*0a40*/ LDG.E.U8 R7, [R4.64+0x4e] ; /* 0x00004e0404077981 */
/* 0x001ea8000c1e1100 */
/*0a50*/ STG.E.U8 [R2.64+0x4e], R7 ; /* 0x00004e0702007986 */
/* 0x0041e8000c101104 */
/*0a60*/ LDG.E.U8 R9, [R4.64+0x4f] ; /* 0x00004f0404097981 */
/* 0x002ea8000c1e1100 */
/*0a70*/ STG.E.U8 [R2.64+0x4f], R9 ; /* 0x00004f0902007986 */
/* 0x0043e8000c101104 */
/*0a80*/ LDG.E.U8 R11, [R4.64+0x50] ; /* 0x00005004040b7981 */
/* 0x000ea8000c1e1100 */
/*0a90*/ STG.E.U8 [R2.64+0x50], R11 ; /* 0x0000500b02007986 */
/* 0x0045e8000c101104 */
/*0aa0*/ LDG.E.U8 R13, [R4.64+0x51] ; /* 0x00005104040d7981 */
/* 0x008ee8000c1e1100 */
/*0ab0*/ STG.E.U8 [R2.64+0x51], R13 ; /* 0x0000510d02007986 */
/* 0x0087e8000c101104 */
/*0ac0*/ LDG.E.U8 R15, [R4.64+0x52] ; /* 0x00005204040f7981 */
/* 0x010f28000c1e1100 */
/*0ad0*/ STG.E.U8 [R2.64+0x52], R15 ; /* 0x0000520f02007986 */
/* 0x0109e8000c101104 */
/*0ae0*/ LDG.E.U8 R17, [R4.64+0x53] ; /* 0x0000530404117981 */
/* 0x020f68000c1e1100 */
/*0af0*/ STG.E.U8 [R2.64+0x53], R17 ; /* 0x0000531102007986 */
/* 0x020be8000c101104 */
/*0b00*/ LDG.E.U8 R7, [R4.64+0x54] ; /* 0x0000540404077981 */
/* 0x001ea8000c1e1100 */
/*0b10*/ STG.E.U8 [R2.64+0x54], R7 ; /* 0x0000540702007986 */
/* 0x0041e8000c101104 */
/*0b20*/ LDG.E.U8 R9, [R4.64+0x55] ; /* 0x0000550404097981 */
/* 0x002ea8000c1e1100 */
/*0b30*/ STG.E.U8 [R2.64+0x55], R9 ; /* 0x0000550902007986 */
/* 0x0043e8000c101104 */
/*0b40*/ LDG.E.U8 R11, [R4.64+0x56] ; /* 0x00005604040b7981 */
/* 0x000ea8000c1e1100 */
/*0b50*/ STG.E.U8 [R2.64+0x56], R11 ; /* 0x0000560b02007986 */
/* 0x0045e8000c101104 */
/*0b60*/ LDG.E.U8 R13, [R4.64+0x57] ; /* 0x00005704040d7981 */
/* 0x008ee8000c1e1100 */
/*0b70*/ STG.E.U8 [R2.64+0x57], R13 ; /* 0x0000570d02007986 */
/* 0x0087e8000c101104 */
/*0b80*/ LDG.E.U8 R15, [R4.64+0x58] ; /* 0x00005804040f7981 */
/* 0x010f28000c1e1100 */
/*0b90*/ STG.E.U8 [R2.64+0x58], R15 ; /* 0x0000580f02007986 */
/* 0x0109e8000c101104 */
/*0ba0*/ LDG.E.U8 R17, [R4.64+0x59] ; /* 0x0000590404117981 */
/* 0x020f68000c1e1100 */
/*0bb0*/ STG.E.U8 [R2.64+0x59], R17 ; /* 0x0000591102007986 */
/* 0x020be8000c101104 */
/*0bc0*/ LDG.E.U8 R7, [R4.64+0x5a] ; /* 0x00005a0404077981 */
/* 0x001ea8000c1e1100 */
/*0bd0*/ STG.E.U8 [R2.64+0x5a], R7 ; /* 0x00005a0702007986 */
/* 0x0041e8000c101104 */
/*0be0*/ LDG.E.U8 R9, [R4.64+0x5b] ; /* 0x00005b0404097981 */
/* 0x002ea8000c1e1100 */
/*0bf0*/ STG.E.U8 [R2.64+0x5b], R9 ; /* 0x00005b0902007986 */
/* 0x0043e8000c101104 */
/*0c00*/ LDG.E.U8 R11, [R4.64+0x5c] ; /* 0x00005c04040b7981 */
/* 0x000ea8000c1e1100 */
/*0c10*/ STG.E.U8 [R2.64+0x5c], R11 ; /* 0x00005c0b02007986 */
/* 0x0045e8000c101104 */
/*0c20*/ LDG.E.U8 R13, [R4.64+0x5d] ; /* 0x00005d04040d7981 */
/* 0x008ee8000c1e1100 */
/*0c30*/ STG.E.U8 [R2.64+0x5d], R13 ; /* 0x00005d0d02007986 */
/* 0x0087e8000c101104 */
/*0c40*/ LDG.E.U8 R15, [R4.64+0x5e] ; /* 0x00005e04040f7981 */
/* 0x010f28000c1e1100 */
/*0c50*/ STG.E.U8 [R2.64+0x5e], R15 ; /* 0x00005e0f02007986 */
/* 0x0109e8000c101104 */
/*0c60*/ LDG.E.U8 R17, [R4.64+0x5f] ; /* 0x00005f0404117981 */
/* 0x020f68000c1e1100 */
/*0c70*/ STG.E.U8 [R2.64+0x5f], R17 ; /* 0x00005f1102007986 */
/* 0x020be8000c101104 */
/*0c80*/ LDG.E.U8 R7, [R4.64+0x60] ; /* 0x0000600404077981 */
/* 0x001ea8000c1e1100 */
/*0c90*/ STG.E.U8 [R2.64+0x60], R7 ; /* 0x0000600702007986 */
/* 0x0041e8000c101104 */
/*0ca0*/ LDG.E.U8 R9, [R4.64+0x61] ; /* 0x0000610404097981 */
/* 0x002ea8000c1e1100 */
/*0cb0*/ STG.E.U8 [R2.64+0x61], R9 ; /* 0x0000610902007986 */
/* 0x0043e8000c101104 */
/*0cc0*/ LDG.E.U8 R11, [R4.64+0x62] ; /* 0x00006204040b7981 */
/* 0x000ea8000c1e1100 */
/*0cd0*/ STG.E.U8 [R2.64+0x62], R11 ; /* 0x0000620b02007986 */
/* 0x0045e8000c101104 */
/*0ce0*/ LDG.E.U8 R13, [R4.64+0x63] ; /* 0x00006304040d7981 */
/* 0x008ee8000c1e1100 */
/*0cf0*/ STG.E.U8 [R2.64+0x63], R13 ; /* 0x0000630d02007986 */
/* 0x0087e8000c101104 */
/*0d00*/ LDG.E.U8 R15, [R4.64+0x64] ; /* 0x00006404040f7981 */
/* 0x010f28000c1e1100 */
/*0d10*/ STG.E.U8 [R2.64+0x64], R15 ; /* 0x0000640f02007986 */
/* 0x0109e8000c101104 */
/*0d20*/ LDG.E.U8 R17, [R4.64+0x65] ; /* 0x0000650404117981 */
/* 0x020f68000c1e1100 */
/*0d30*/ STG.E.U8 [R2.64+0x65], R17 ; /* 0x0000651102007986 */
/* 0x020be8000c101104 */
/*0d40*/ LDG.E.U8 R7, [R4.64+0x66] ; /* 0x0000660404077981 */
/* 0x001ea8000c1e1100 */
/*0d50*/ STG.E.U8 [R2.64+0x66], R7 ; /* 0x0000660702007986 */
/* 0x0041e8000c101104 */
/*0d60*/ LDG.E.U8 R9, [R4.64+0x67] ; /* 0x0000670404097981 */
/* 0x002ea8000c1e1100 */
/*0d70*/ STG.E.U8 [R2.64+0x67], R9 ; /* 0x0000670902007986 */
/* 0x0043e8000c101104 */
/*0d80*/ LDG.E.U8 R11, [R4.64+0x68] ; /* 0x00006804040b7981 */
/* 0x000ea8000c1e1100 */
/*0d90*/ STG.E.U8 [R2.64+0x68], R11 ; /* 0x0000680b02007986 */
/* 0x0045e8000c101104 */
/*0da0*/ LDG.E.U8 R13, [R4.64+0x69] ; /* 0x00006904040d7981 */
/* 0x008ee8000c1e1100 */
/*0db0*/ STG.E.U8 [R2.64+0x69], R13 ; /* 0x0000690d02007986 */
/* 0x0087e8000c101104 */
/*0dc0*/ LDG.E.U8 R15, [R4.64+0x6a] ; /* 0x00006a04040f7981 */
/* 0x010f28000c1e1100 */
/*0dd0*/ STG.E.U8 [R2.64+0x6a], R15 ; /* 0x00006a0f02007986 */
/* 0x0109e8000c101104 */
/*0de0*/ LDG.E.U8 R17, [R4.64+0x6b] ; /* 0x00006b0404117981 */
/* 0x020f68000c1e1100 */
/*0df0*/ STG.E.U8 [R2.64+0x6b], R17 ; /* 0x00006b1102007986 */
/* 0x020be8000c101104 */
/*0e00*/ LDG.E.U8 R7, [R4.64+0x6c] ; /* 0x00006c0404077981 */
/* 0x001ea8000c1e1100 */
/*0e10*/ STG.E.U8 [R2.64+0x6c], R7 ; /* 0x00006c0702007986 */
/* 0x004fe8000c101104 */
/*0e20*/ LDG.E.U8 R9, [R4.64+0x6d] ; /* 0x00006d0404097981 */
/* 0x002ea8000c1e1100 */
/*0e30*/ STG.E.U8 [R2.64+0x6d], R9 ; /* 0x00006d0902007986 */
/* 0x0041e8000c101104 */
/*0e40*/ LDG.E.U8 R11, [R4.64+0x6e] ; /* 0x00006e04040b7981 */
/* 0x000ea8000c1e1100 */
/*0e50*/ STG.E.U8 [R2.64+0x6e], R11 ; /* 0x00006e0b02007986 */
/* 0x0043e8000c101104 */
/*0e60*/ LDG.E.U8 R13, [R4.64+0x6f] ; /* 0x00006f04040d7981 */
/* 0x008ea8000c1e1100 */
/*0e70*/ STG.E.U8 [R2.64+0x6f], R13 ; /* 0x00006f0d02007986 */
/* 0x0045e8000c101104 */
/*0e80*/ LDG.E.U8 R15, [R4.64+0x70] ; /* 0x00007004040f7981 */
/* 0x010ee8000c1e1100 */
/*0e90*/ STG.E.U8 [R2.64+0x70], R15 ; /* 0x0000700f02007986 */
/* 0x0087e8000c101104 */
/*0ea0*/ LDG.E.U8 R17, [R4.64+0x71] ; /* 0x0000710404117981 */
/* 0x020f28000c1e1100 */
/*0eb0*/ STG.E.U8 [R2.64+0x71], R17 ; /* 0x0000711102007986 */
/* 0x010fe8000c101104 */
/*0ec0*/ LDG.E.U8 R19, [R4.64+0x72] ; /* 0x0000720404137981 */
/* 0x000f28000c1e1100 */
/*0ed0*/ STG.E.U8 [R2.64+0x72], R19 ; /* 0x0000721302007986 */
/* 0x010fe8000c101104 */
/*0ee0*/ LDG.E.U8 R9, [R4.64+0x73] ; /* 0x0000730404097981 */
/* 0x001f28000c1e1100 */
/*0ef0*/ STG.E.U8 [R2.64+0x73], R9 ; /* 0x0000730902007986 */
/* 0x010fe8000c101104 */
/*0f00*/ LDG.E.U8 R11, [R4.64+0x74] ; /* 0x00007404040b7981 */
/* 0x002f28000c1e1100 */
/*0f10*/ STG.E.U8 [R2.64+0x74], R11 ; /* 0x0000740b02007986 */
/* 0x010fe8000c101104 */
/*0f20*/ LDG.E.U8 R13, [R4.64+0x75] ; /* 0x00007504040d7981 */
/* 0x004ea8000c1e1100 */
/*0f30*/ STG.E.U8 [R2.64+0x75], R13 ; /* 0x0000750d02007986 */
/* 0x004fe8000c101104 */
/*0f40*/ LDG.E.U8 R15, [R4.64+0x76] ; /* 0x00007604040f7981 */
/* 0x008ea8000c1e1100 */
/*0f50*/ STG.E.U8 [R2.64+0x76], R15 ; /* 0x0000760f02007986 */
/* 0x004fe8000c101104 */
/*0f60*/ LDG.E.U8 R7, [R4.64+0x77] ; /* 0x0000770404077981 */
/* 0x000ea8000c1e1100 */
/*0f70*/ STG.E.U8 [R2.64+0x77], R7 ; /* 0x0000770702007986 */
/* 0x004fe2000c101104 */
/*0f80*/ EXIT ; /* 0x000000000000794d */
/* 0x000fea0003800000 */
/*0f90*/ BRA 0xf90; /* 0xfffffff000007947 */
/* 0x000fc0000383ffff */
/*0fa0*/ NOP; /* 0x0000000000007918 */
/* 0x000fc00000000000 */
/*0fb0*/ NOP; /* 0x0000000000007918 */
/* 0x000fc00000000000 */
/*0fc0*/ NOP; /* 0x0000000000007918 */
/* 0x000fc00000000000 */
/*0fd0*/ NOP; /* 0x0000000000007918 */
/* 0x000fc00000000000 */
/*0fe0*/ NOP; /* 0x0000000000007918 */
/* 0x000fc00000000000 */
/*0ff0*/ NOP; /* 0x0000000000007918 */
/* 0x000fc00000000000 */
/*1000*/ NOP; /* 0x0000000000007918 */
/* 0x000fc00000000000 */
/*1010*/ NOP; /* 0x0000000000007918 */
/* 0x000fc00000000000 */
/*1020*/ NOP; /* 0x0000000000007918 */
/* 0x000fc00000000000 */
/*1030*/ NOP; /* 0x0000000000007918 */
/* 0x000fc00000000000 */
/*1040*/ NOP; /* 0x0000000000007918 */
/* 0x000fc00000000000 */
/*1050*/ NOP; /* 0x0000000000007918 */
/* 0x000fc00000000000 */
/*1060*/ NOP; /* 0x0000000000007918 */
/* 0x000fc00000000000 */
/*1070*/ NOP; /* 0x0000000000007918 */
/* 0x000fc00000000000 */
.......... | .text
.amdgcn_target "amdgcn-amd-amdhsa--gfx1100"
.protected _Z12copyBestPathiPiS_
.globl _Z12copyBestPathiPiS_
.p2align 8
.type _Z12copyBestPathiPiS_,@function
_Z12copyBestPathiPiS_:
s_clause 0x1
s_load_b32 s4, s[0:1], 0x0
s_load_b128 s[0:3], s[0:1], 0x8
v_mov_b32_e32 v0, 0
s_waitcnt lgkmcnt(0)
s_mul_i32 s4, s4, 30
s_delay_alu instid0(SALU_CYCLE_1) | instskip(NEXT) | instid1(SALU_CYCLE_1)
s_ashr_i32 s5, s4, 31
s_lshl_b64 s[4:5], s[4:5], 2
s_delay_alu instid0(SALU_CYCLE_1)
s_add_u32 s4, s2, s4
s_addc_u32 s5, s3, s5
s_mov_b64 s[2:3], 0
.p2align 6
.LBB0_1:
s_delay_alu instid0(SALU_CYCLE_1)
s_add_u32 s6, s4, s2
s_addc_u32 s7, s5, s3
s_add_u32 s8, s0, s2
global_load_u8 v1, v0, s[6:7]
s_addc_u32 s9, s1, s3
s_add_u32 s2, s2, 4
s_addc_u32 s3, s3, 0
s_delay_alu instid0(SALU_CYCLE_1)
s_cmp_lg_u64 s[2:3], 0x78
s_waitcnt vmcnt(0)
global_store_b8 v0, v1, s[8:9]
global_load_u8 v1, v0, s[6:7] offset:1
s_waitcnt vmcnt(0)
global_store_b8 v0, v1, s[8:9] offset:1
global_load_u8 v1, v0, s[6:7] offset:2
s_waitcnt vmcnt(0)
global_store_b8 v0, v1, s[8:9] offset:2
global_load_u8 v1, v0, s[6:7] offset:3
s_waitcnt vmcnt(0)
global_store_b8 v0, v1, s[8:9] offset:3
s_cbranch_scc1 .LBB0_1
s_nop 0
s_sendmsg sendmsg(MSG_DEALLOC_VGPRS)
s_endpgm
.section .rodata,"a",@progbits
.p2align 6, 0x0
.amdhsa_kernel _Z12copyBestPathiPiS_
.amdhsa_group_segment_fixed_size 0
.amdhsa_private_segment_fixed_size 0
.amdhsa_kernarg_size 24
.amdhsa_user_sgpr_count 15
.amdhsa_user_sgpr_dispatch_ptr 0
.amdhsa_user_sgpr_queue_ptr 0
.amdhsa_user_sgpr_kernarg_segment_ptr 1
.amdhsa_user_sgpr_dispatch_id 0
.amdhsa_user_sgpr_private_segment_size 0
.amdhsa_wavefront_size32 1
.amdhsa_uses_dynamic_stack 0
.amdhsa_enable_private_segment 0
.amdhsa_system_sgpr_workgroup_id_x 1
.amdhsa_system_sgpr_workgroup_id_y 0
.amdhsa_system_sgpr_workgroup_id_z 0
.amdhsa_system_sgpr_workgroup_info 0
.amdhsa_system_vgpr_workitem_id 0
.amdhsa_next_free_vgpr 2
.amdhsa_next_free_sgpr 10
.amdhsa_reserve_vcc 0
.amdhsa_float_round_mode_32 0
.amdhsa_float_round_mode_16_64 0
.amdhsa_float_denorm_mode_32 3
.amdhsa_float_denorm_mode_16_64 3
.amdhsa_dx10_clamp 1
.amdhsa_ieee_mode 1
.amdhsa_fp16_overflow 0
.amdhsa_workgroup_processor_mode 1
.amdhsa_memory_ordered 1
.amdhsa_forward_progress 0
.amdhsa_shared_vgpr_count 0
.amdhsa_exception_fp_ieee_invalid_op 0
.amdhsa_exception_fp_denorm_src 0
.amdhsa_exception_fp_ieee_div_zero 0
.amdhsa_exception_fp_ieee_overflow 0
.amdhsa_exception_fp_ieee_underflow 0
.amdhsa_exception_fp_ieee_inexact 0
.amdhsa_exception_int_div_zero 0
.end_amdhsa_kernel
.text
.Lfunc_end0:
.size _Z12copyBestPathiPiS_, .Lfunc_end0-_Z12copyBestPathiPiS_
.section .AMDGPU.csdata,"",@progbits
.text
.p2alignl 7, 3214868480
.fill 96, 4, 3214868480
.type __hip_cuid_,@object
.section .bss,"aw",@nobits
.globl __hip_cuid_
__hip_cuid_:
.byte 0
.size __hip_cuid_, 1
.ident "AMD clang version 18.0.0git (https://github.com/RadeonOpenCompute/llvm-project roc-6.3.2 25012 e5bf7e55c91490b07c49d8960fa7983d864936c4)"
.section ".note.GNU-stack","",@progbits
.addrsig
.addrsig_sym __hip_cuid_
.amdgpu_metadata
---
amdhsa.kernels:
- .args:
- .offset: 0
.size: 4
.value_kind: by_value
- .address_space: global
.offset: 8
.size: 8
.value_kind: global_buffer
- .address_space: global
.offset: 16
.size: 8
.value_kind: global_buffer
.group_segment_fixed_size: 0
.kernarg_segment_align: 8
.kernarg_segment_size: 24
.language: OpenCL C
.language_version:
- 2
- 0
.max_flat_workgroup_size: 1024
.name: _Z12copyBestPathiPiS_
.private_segment_fixed_size: 0
.sgpr_count: 10
.sgpr_spill_count: 0
.symbol: _Z12copyBestPathiPiS_.kd
.uniform_work_group_size: 1
.uses_dynamic_stack: false
.vgpr_count: 2
.vgpr_spill_count: 0
.wavefront_size: 32
.workgroup_processor_mode: 1
amdhsa.target: amdgcn-amd-amdhsa--gfx1100
amdhsa.version:
- 1
- 2
...
.end_amdgpu_metadata |
You are a helpful coding assistant specialized in converting from CUDA host assembly to AMD host assembly. | .file "tmpxft_00036e9f_00000000-6_copyBestPath.cudafe1.cpp"
.text
#APP
#NO_APP
.type _ZL26__cudaUnregisterBinaryUtilv, @function
_ZL26__cudaUnregisterBinaryUtilv:
.LFB2029:
.cfi_startproc
endbr64
subq $8, %rsp
.cfi_def_cfa_offset 16
movq _ZL20__cudaFatCubinHandle(%rip), %rdi
call __cudaUnregisterFatBinary@PLT
addq $8, %rsp
.cfi_def_cfa_offset 8
ret
.cfi_endproc
.LFE2029:
.size _ZL26__cudaUnregisterBinaryUtilv, .-_ZL26__cudaUnregisterBinaryUtilv
.globl _Z35__device_stub__Z12copyBestPathiPiS_iPiS_
.type _Z35__device_stub__Z12copyBestPathiPiS_iPiS_, @function
_Z35__device_stub__Z12copyBestPathiPiS_iPiS_:
.LFB2051:
.cfi_startproc
endbr64
subq $136, %rsp
.cfi_def_cfa_offset 144
movl %edi, 28(%rsp)
movq %rsi, 16(%rsp)
movq %rdx, 8(%rsp)
movq %fs:40, %rax
movq %rax, 120(%rsp)
xorl %eax, %eax
leaq 28(%rsp), %rax
movq %rax, 96(%rsp)
leaq 16(%rsp), %rax
movq %rax, 104(%rsp)
leaq 8(%rsp), %rax
movq %rax, 112(%rsp)
movl $1, 48(%rsp)
movl $1, 52(%rsp)
movl $1, 56(%rsp)
movl $1, 60(%rsp)
movl $1, 64(%rsp)
movl $1, 68(%rsp)
leaq 40(%rsp), %rcx
leaq 32(%rsp), %rdx
leaq 60(%rsp), %rsi
leaq 48(%rsp), %rdi
call __cudaPopCallConfiguration@PLT
testl %eax, %eax
je .L7
.L3:
movq 120(%rsp), %rax
subq %fs:40, %rax
jne .L8
addq $136, %rsp
.cfi_remember_state
.cfi_def_cfa_offset 8
ret
.L7:
.cfi_restore_state
pushq 40(%rsp)
.cfi_def_cfa_offset 152
pushq 40(%rsp)
.cfi_def_cfa_offset 160
leaq 112(%rsp), %r9
movq 76(%rsp), %rcx
movl 84(%rsp), %r8d
movq 64(%rsp), %rsi
movl 72(%rsp), %edx
leaq _Z12copyBestPathiPiS_(%rip), %rdi
call cudaLaunchKernel@PLT
addq $16, %rsp
.cfi_def_cfa_offset 144
jmp .L3
.L8:
call __stack_chk_fail@PLT
.cfi_endproc
.LFE2051:
.size _Z35__device_stub__Z12copyBestPathiPiS_iPiS_, .-_Z35__device_stub__Z12copyBestPathiPiS_iPiS_
.globl _Z12copyBestPathiPiS_
.type _Z12copyBestPathiPiS_, @function
_Z12copyBestPathiPiS_:
.LFB2052:
.cfi_startproc
endbr64
subq $8, %rsp
.cfi_def_cfa_offset 16
call _Z35__device_stub__Z12copyBestPathiPiS_iPiS_
addq $8, %rsp
.cfi_def_cfa_offset 8
ret
.cfi_endproc
.LFE2052:
.size _Z12copyBestPathiPiS_, .-_Z12copyBestPathiPiS_
.section .rodata.str1.1,"aMS",@progbits,1
.LC0:
.string "_Z12copyBestPathiPiS_"
.text
.type _ZL24__sti____cudaRegisterAllv, @function
_ZL24__sti____cudaRegisterAllv:
.LFB2054:
.cfi_startproc
endbr64
subq $8, %rsp
.cfi_def_cfa_offset 16
leaq _ZL15__fatDeviceText(%rip), %rdi
call __cudaRegisterFatBinary@PLT
movq %rax, %rdi
movq %rax, _ZL20__cudaFatCubinHandle(%rip)
pushq $0
.cfi_def_cfa_offset 24
pushq $0
.cfi_def_cfa_offset 32
pushq $0
.cfi_def_cfa_offset 40
pushq $0
.cfi_def_cfa_offset 48
movl $0, %r9d
movl $-1, %r8d
leaq .LC0(%rip), %rdx
movq %rdx, %rcx
leaq _Z12copyBestPathiPiS_(%rip), %rsi
call __cudaRegisterFunction@PLT
addq $32, %rsp
.cfi_def_cfa_offset 16
movq _ZL20__cudaFatCubinHandle(%rip), %rdi
call __cudaRegisterFatBinaryEnd@PLT
leaq _ZL26__cudaUnregisterBinaryUtilv(%rip), %rdi
call atexit@PLT
addq $8, %rsp
.cfi_def_cfa_offset 8
ret
.cfi_endproc
.LFE2054:
.size _ZL24__sti____cudaRegisterAllv, .-_ZL24__sti____cudaRegisterAllv
.section .init_array,"aw"
.align 8
.quad _ZL24__sti____cudaRegisterAllv
.section .nvFatBinSegment,"aw"
.align 8
.type _ZL15__fatDeviceText, @object
.size _ZL15__fatDeviceText, 24
_ZL15__fatDeviceText:
.long 1180844977
.long 1
.quad fatbinData
.quad 0
.local _ZL20__cudaFatCubinHandle
.comm _ZL20__cudaFatCubinHandle,8,8
.ident "GCC: (Ubuntu 13.3.0-6ubuntu2~24.04) 13.3.0"
.section .note.GNU-stack,"",@progbits
.section .note.gnu.property,"a"
.align 8
.long 1f - 0f
.long 4f - 1f
.long 5
0:
.string "GNU"
1:
.align 8
.long 0xc0000002
.long 3f - 2f
2:
.long 0x3
3:
.align 8
4: | .text
.file "copyBestPath.hip"
.globl _Z27__device_stub__copyBestPathiPiS_ # -- Begin function _Z27__device_stub__copyBestPathiPiS_
.p2align 4, 0x90
.type _Z27__device_stub__copyBestPathiPiS_,@function
_Z27__device_stub__copyBestPathiPiS_: # @_Z27__device_stub__copyBestPathiPiS_
.cfi_startproc
# %bb.0:
subq $104, %rsp
.cfi_def_cfa_offset 112
movl %edi, 12(%rsp)
movq %rsi, 72(%rsp)
movq %rdx, 64(%rsp)
leaq 12(%rsp), %rax
movq %rax, 80(%rsp)
leaq 72(%rsp), %rax
movq %rax, 88(%rsp)
leaq 64(%rsp), %rax
movq %rax, 96(%rsp)
leaq 48(%rsp), %rdi
leaq 32(%rsp), %rsi
leaq 24(%rsp), %rdx
leaq 16(%rsp), %rcx
callq __hipPopCallConfiguration
movq 48(%rsp), %rsi
movl 56(%rsp), %edx
movq 32(%rsp), %rcx
movl 40(%rsp), %r8d
leaq 80(%rsp), %r9
movl $_Z12copyBestPathiPiS_, %edi
pushq 16(%rsp)
.cfi_adjust_cfa_offset 8
pushq 32(%rsp)
.cfi_adjust_cfa_offset 8
callq hipLaunchKernel
addq $120, %rsp
.cfi_adjust_cfa_offset -120
retq
.Lfunc_end0:
.size _Z27__device_stub__copyBestPathiPiS_, .Lfunc_end0-_Z27__device_stub__copyBestPathiPiS_
.cfi_endproc
# -- End function
.p2align 4, 0x90 # -- Begin function __hip_module_ctor
.type __hip_module_ctor,@function
__hip_module_ctor: # @__hip_module_ctor
.cfi_startproc
# %bb.0:
subq $40, %rsp
.cfi_def_cfa_offset 48
cmpq $0, __hip_gpubin_handle(%rip)
jne .LBB1_2
# %bb.1:
movl $__hip_fatbin_wrapper, %edi
callq __hipRegisterFatBinary
movq %rax, __hip_gpubin_handle(%rip)
.LBB1_2:
movq __hip_gpubin_handle(%rip), %rdi
xorps %xmm0, %xmm0
movups %xmm0, 16(%rsp)
movups %xmm0, (%rsp)
movl $_Z12copyBestPathiPiS_, %esi
movl $.L__unnamed_1, %edx
movl $.L__unnamed_1, %ecx
movl $-1, %r8d
xorl %r9d, %r9d
callq __hipRegisterFunction
movl $__hip_module_dtor, %edi
addq $40, %rsp
.cfi_def_cfa_offset 8
jmp atexit # TAILCALL
.Lfunc_end1:
.size __hip_module_ctor, .Lfunc_end1-__hip_module_ctor
.cfi_endproc
# -- End function
.p2align 4, 0x90 # -- Begin function __hip_module_dtor
.type __hip_module_dtor,@function
__hip_module_dtor: # @__hip_module_dtor
.cfi_startproc
# %bb.0:
movq __hip_gpubin_handle(%rip), %rdi
testq %rdi, %rdi
je .LBB2_2
# %bb.1:
pushq %rax
.cfi_def_cfa_offset 16
callq __hipUnregisterFatBinary
movq $0, __hip_gpubin_handle(%rip)
addq $8, %rsp
.cfi_def_cfa_offset 8
.LBB2_2:
retq
.Lfunc_end2:
.size __hip_module_dtor, .Lfunc_end2-__hip_module_dtor
.cfi_endproc
# -- End function
.type _Z12copyBestPathiPiS_,@object # @_Z12copyBestPathiPiS_
.section .rodata,"a",@progbits
.globl _Z12copyBestPathiPiS_
.p2align 3, 0x0
_Z12copyBestPathiPiS_:
.quad _Z27__device_stub__copyBestPathiPiS_
.size _Z12copyBestPathiPiS_, 8
.type .L__unnamed_1,@object # @0
.section .rodata.str1.1,"aMS",@progbits,1
.L__unnamed_1:
.asciz "_Z12copyBestPathiPiS_"
.size .L__unnamed_1, 22
.type __hip_fatbin_wrapper,@object # @__hip_fatbin_wrapper
.section .hipFatBinSegment,"a",@progbits
.p2align 3, 0x0
__hip_fatbin_wrapper:
.long 1212764230 # 0x48495046
.long 1 # 0x1
.quad __hip_fatbin
.quad 0
.size __hip_fatbin_wrapper, 24
.type __hip_gpubin_handle,@object # @__hip_gpubin_handle
.local __hip_gpubin_handle
.comm __hip_gpubin_handle,8,8
.section .init_array,"aw",@init_array
.p2align 3, 0x0
.quad __hip_module_ctor
.type __hip_cuid_,@object # @__hip_cuid_
.bss
.globl __hip_cuid_
__hip_cuid_:
.byte 0 # 0x0
.size __hip_cuid_, 1
.section ".linker-options","e",@llvm_linker_options
.ident "AMD clang version 18.0.0git (https://github.com/RadeonOpenCompute/llvm-project roc-6.3.2 25012 e5bf7e55c91490b07c49d8960fa7983d864936c4)"
.section ".note.GNU-stack","",@progbits
.addrsig
.addrsig_sym _Z27__device_stub__copyBestPathiPiS_
.addrsig_sym __hip_module_ctor
.addrsig_sym __hip_module_dtor
.addrsig_sym _Z12copyBestPathiPiS_
.addrsig_sym __hip_fatbin
.addrsig_sym __hip_fatbin_wrapper
.addrsig_sym __hip_cuid_ |
You are a helpful coding assistant specialized in converting CUDA source code to CUDA host assembly. | #include <iostream>
#include <string>
#include <sstream>
#include <fstream>
#include <algorithm>
#include <chrono>
#include <stdio.h>
#include <stdlib.h>
#include <stdarg.h>
#include <cuda.h>
#include <unistd.h>
//#define _DEBUG_
//#define _TIME_MEASURE_
#ifdef _DEBUG_
#include <string>
#include <sstream>
int __print_step = 0;
void __pt_log(const char *h_, const char *f_, ...){
std::stringstream ss;
ss << h_ << f_ << '\n';
std::string format = ss.str();
va_list va;
va_start(va, f_);
vprintf(format.c_str(), va);
va_end(va);
__print_step++;
}
#define VA_ARGS(...) , ##__VA_ARGS__
#define LOG(f_, ...) __pt_log(\
"[LOG] Step %3d: ", (f_), \
__print_step VA_ARGS(__VA_ARGS__))
#else
#define LOG(f_, ...)
#endif
#define INF 1000000000
#define CEIL(a, b) (( (a) - 1 ) / (b) + 1 )
int **Dist;
int *data;
int block_size;
int vert, edge;
int vert2;
inline void init(){
vert2 = vert*vert;
Dist = new int*[vert];
data = new int[vert2];
std::fill(data, data + vert2, INF);
for(int i=0;i<vert;++i){
Dist[i] = data + i*vert;
Dist[i][i] = 0;
}
if(vert < block_size){
block_size = vert;
}
}
inline void finalize(){
delete[] Dist;
delete[] data;
}
void dump_from_file_and_init(const char *file){
std::ifstream fin(file);
std::stringstream ss;
ss << fin.rdbuf();
ss >> vert >> edge;
LOG("vert: %d, edge: %d", vert, edge);
init();
int i, j, w;
while(--edge >=0){
ss >> i >> j >> w;
Dist[i][j] = w;
}
fin.close();
}
void dump_to_file(const char *file){
std::ofstream fout(file);
fout.write((char*)data, sizeof(int)*vert2);
fout.close();
}
__global__ void init_gpu(int reps){
int idx = blockIdx.x * blockDim.x + threadIdx.x;
if(idx >= reps) return;
}
__global__ void phase_one(int32_t* const dist, int block_size, int round, int width, int vert){
const int tx = threadIdx.x;
const int ty = threadIdx.y;
const int c = block_size * round + ty;
const int r = block_size * round + tx;
const int cell = c*width+r;
if(c >= vert || r >= vert){ //out of bounds, filled in with INF for each element
dist[cell] = INF;
}
__syncthreads();
int low = block_size * round;
int up = low + block_size;
int n;
for( ; low<up ; ++low){
// min(dist[c][r], dist[c][low] + dist[low][r])
n = dist[ c*width+low ] + dist[ low*width+r ];
if(n < dist[cell]){
dist[cell] = n;
}
__syncthreads();
}
}
__global__ void phase_two(int32_t* const dist, int block_size, int round, int width, int vert){
const int tx = threadIdx.x;
const int ty = threadIdx.y;
int bx = blockIdx.x;
int by = blockIdx.y;
int c;
int r;
if(bx >= round)++bx; //shift
if(by == 0){ //horizontal
c = block_size * round + ty;
r = block_size * bx + tx;
}else{ //vertical
c = block_size * bx + ty;
r = block_size * round + tx;
}
int cell = c * width + r;
if(c >= vert || r >= vert){ //out of bounds, filled in with INF for each element
dist[cell] = INF;
}
__syncthreads();
int low = round*block_size;
int up = low + block_size;
int n;
for( ; low<up ; ++low){
// min(dist[c][r], dist[c][low] + dist[low][r])
n = dist[ c*width+low ] + dist[ low*width+r ];
if(n < dist[cell]){
dist[cell] = n;
}
__syncthreads();
}
}
__global__ void phase_three(int32_t* const dist, int block_size, int round, int width, int vert){
const int tx = threadIdx.x;
const int ty = threadIdx.y;
int bx = blockIdx.x;
int by = blockIdx.y;
if(bx >= round)++bx; //shift x
if(by >= round)++by; //shift y
const int c = block_size * by + ty;
const int r = block_size * bx + tx;
const int cell = c*width + r;
if(c >= vert || r >= vert){ //out of bounds, filled in with INF for each element
dist[cell] = INF;
}
__syncthreads();
int low = round * block_size;
int up = low + block_size;
int n;
for( ; low<up ; ++low){
// min(dist[c][r], dist[c][low] + dist[low][r])
n = dist[ c*width+low ] + dist[ low*width+r ];
if(n < dist[cell]){
dist[cell] = n;
}
__syncthreads();
}
}
extern __shared__ int S[];
void block_FW(){
#ifdef _TIME_MEASURE_
auto start = std::chrono::high_resolution_clock::now();
#endif
int Round = CEIL(vert, block_size);
int padded_size = Round * block_size;
size_t vert_w_bytes = vert * sizeof(int);
size_t padded_w_bytes = padded_size * sizeof(int);
int32_t *device_ptr;
//size_t pitch;
dim3 p2b(Round-1, 2, 1); //phase 2 block
dim3 p3b(Round-1, Round-1, 1); //phase 3 block
dim3 dimt(block_size, block_size, 1); //thread
//cudaMallocPitch(&device_ptr, &pitch, vert_byte, vert_byte, vert);
cudaMalloc(&device_ptr, padded_w_bytes * padded_size);
//size_t pitch_int = pitch / sizeof(int);
//LOG("pitch => %zu bytes (%zu words)", pitch, pitch_int);
LOG("the number of blocks: %d", Round);
//dst_ptr, dst_pitch, src, src_pitch, w, h, kind
cudaMemcpy2D(device_ptr, padded_w_bytes, data, vert_w_bytes,
vert_w_bytes, vert, cudaMemcpyHostToDevice);
for(int r=0; r < Round; ++r){
LOG("Round %d/%d", r+1, Round);
phase_one<<< 1 , dimt >>>(device_ptr, block_size, r, padded_size, vert);
phase_two<<< p2b , dimt >>>(device_ptr, block_size, r, padded_size, vert);
phase_three<<< p3b , dimt >>>(device_ptr, block_size, r, padded_size, vert);
}
cudaMemcpy2D(data, vert_w_bytes, device_ptr, padded_w_bytes,
vert_w_bytes, vert, cudaMemcpyDeviceToHost);
cudaFree(device_ptr);
#ifdef _TIME_MEASURE_
auto end = std::chrono::high_resolution_clock::now();
std::chrono::duration<double> diff = end - start;
double elapsed_time = diff.count() * 1000;
printf("Total time: %f ms (%f GFLOPS)\n", elapsed_time, 2*vert*vert*vert / (elapsed_time * 1e6));
#endif
}
int main(int argc, char **argv){
dump_from_file_and_init(argv[1]);
block_size = std::atoi(argv[3]);
block_FW();
dump_to_file(argv[2]);
finalize();
return 0;
} | .file "tmpxft_0003a00f_00000000-6_HW4_cuda_000_orig.cudafe1.cpp"
.text
#APP
.globl _ZSt21ios_base_library_initv
#NO_APP
.type _ZL26__cudaUnregisterBinaryUtilv, @function
_ZL26__cudaUnregisterBinaryUtilv:
.LFB4231:
.cfi_startproc
endbr64
subq $8, %rsp
.cfi_def_cfa_offset 16
movq _ZL20__cudaFatCubinHandle(%rip), %rdi
call __cudaUnregisterFatBinary@PLT
addq $8, %rsp
.cfi_def_cfa_offset 8
ret
.cfi_endproc
.LFE4231:
.size _ZL26__cudaUnregisterBinaryUtilv, .-_ZL26__cudaUnregisterBinaryUtilv
.globl _Z26__device_stub__Z8init_gpuii
.type _Z26__device_stub__Z8init_gpuii, @function
_Z26__device_stub__Z8init_gpuii:
.LFB4253:
.cfi_startproc
endbr64
subq $104, %rsp
.cfi_def_cfa_offset 112
movl %edi, 12(%rsp)
movq %fs:40, %rax
movq %rax, 88(%rsp)
xorl %eax, %eax
leaq 12(%rsp), %rax
movq %rax, 80(%rsp)
movl $1, 32(%rsp)
movl $1, 36(%rsp)
movl $1, 40(%rsp)
movl $1, 44(%rsp)
movl $1, 48(%rsp)
movl $1, 52(%rsp)
leaq 24(%rsp), %rcx
leaq 16(%rsp), %rdx
leaq 44(%rsp), %rsi
leaq 32(%rsp), %rdi
call __cudaPopCallConfiguration@PLT
testl %eax, %eax
je .L7
.L3:
movq 88(%rsp), %rax
subq %fs:40, %rax
jne .L8
addq $104, %rsp
.cfi_remember_state
.cfi_def_cfa_offset 8
ret
.L7:
.cfi_restore_state
pushq 24(%rsp)
.cfi_def_cfa_offset 120
pushq 24(%rsp)
.cfi_def_cfa_offset 128
leaq 96(%rsp), %r9
movq 60(%rsp), %rcx
movl 68(%rsp), %r8d
movq 48(%rsp), %rsi
movl 56(%rsp), %edx
leaq _Z8init_gpui(%rip), %rdi
call cudaLaunchKernel@PLT
addq $16, %rsp
.cfi_def_cfa_offset 112
jmp .L3
.L8:
call __stack_chk_fail@PLT
.cfi_endproc
.LFE4253:
.size _Z26__device_stub__Z8init_gpuii, .-_Z26__device_stub__Z8init_gpuii
.globl _Z8init_gpui
.type _Z8init_gpui, @function
_Z8init_gpui:
.LFB4254:
.cfi_startproc
endbr64
subq $8, %rsp
.cfi_def_cfa_offset 16
call _Z26__device_stub__Z8init_gpuii
addq $8, %rsp
.cfi_def_cfa_offset 8
ret
.cfi_endproc
.LFE4254:
.size _Z8init_gpui, .-_Z8init_gpui
.globl _Z32__device_stub__Z9phase_onePiiiiiPiiiii
.type _Z32__device_stub__Z9phase_onePiiiiiPiiiii, @function
_Z32__device_stub__Z9phase_onePiiiiiPiiiii:
.LFB4255:
.cfi_startproc
endbr64
subq $152, %rsp
.cfi_def_cfa_offset 160
movq %rdi, 24(%rsp)
movl %esi, 20(%rsp)
movl %edx, 16(%rsp)
movl %ecx, 12(%rsp)
movl %r8d, 8(%rsp)
movq %fs:40, %rax
movq %rax, 136(%rsp)
xorl %eax, %eax
leaq 24(%rsp), %rax
movq %rax, 96(%rsp)
leaq 20(%rsp), %rax
movq %rax, 104(%rsp)
leaq 16(%rsp), %rax
movq %rax, 112(%rsp)
leaq 12(%rsp), %rax
movq %rax, 120(%rsp)
leaq 8(%rsp), %rax
movq %rax, 128(%rsp)
movl $1, 48(%rsp)
movl $1, 52(%rsp)
movl $1, 56(%rsp)
movl $1, 60(%rsp)
movl $1, 64(%rsp)
movl $1, 68(%rsp)
leaq 40(%rsp), %rcx
leaq 32(%rsp), %rdx
leaq 60(%rsp), %rsi
leaq 48(%rsp), %rdi
call __cudaPopCallConfiguration@PLT
testl %eax, %eax
je .L15
.L11:
movq 136(%rsp), %rax
subq %fs:40, %rax
jne .L16
addq $152, %rsp
.cfi_remember_state
.cfi_def_cfa_offset 8
ret
.L15:
.cfi_restore_state
pushq 40(%rsp)
.cfi_def_cfa_offset 168
pushq 40(%rsp)
.cfi_def_cfa_offset 176
leaq 112(%rsp), %r9
movq 76(%rsp), %rcx
movl 84(%rsp), %r8d
movq 64(%rsp), %rsi
movl 72(%rsp), %edx
leaq _Z9phase_onePiiiii(%rip), %rdi
call cudaLaunchKernel@PLT
addq $16, %rsp
.cfi_def_cfa_offset 160
jmp .L11
.L16:
call __stack_chk_fail@PLT
.cfi_endproc
.LFE4255:
.size _Z32__device_stub__Z9phase_onePiiiiiPiiiii, .-_Z32__device_stub__Z9phase_onePiiiiiPiiiii
.globl _Z9phase_onePiiiii
.type _Z9phase_onePiiiii, @function
_Z9phase_onePiiiii:
.LFB4256:
.cfi_startproc
endbr64
subq $8, %rsp
.cfi_def_cfa_offset 16
call _Z32__device_stub__Z9phase_onePiiiiiPiiiii
addq $8, %rsp
.cfi_def_cfa_offset 8
ret
.cfi_endproc
.LFE4256:
.size _Z9phase_onePiiiii, .-_Z9phase_onePiiiii
.globl _Z32__device_stub__Z9phase_twoPiiiiiPiiiii
.type _Z32__device_stub__Z9phase_twoPiiiiiPiiiii, @function
_Z32__device_stub__Z9phase_twoPiiiiiPiiiii:
.LFB4257:
.cfi_startproc
endbr64
subq $152, %rsp
.cfi_def_cfa_offset 160
movq %rdi, 24(%rsp)
movl %esi, 20(%rsp)
movl %edx, 16(%rsp)
movl %ecx, 12(%rsp)
movl %r8d, 8(%rsp)
movq %fs:40, %rax
movq %rax, 136(%rsp)
xorl %eax, %eax
leaq 24(%rsp), %rax
movq %rax, 96(%rsp)
leaq 20(%rsp), %rax
movq %rax, 104(%rsp)
leaq 16(%rsp), %rax
movq %rax, 112(%rsp)
leaq 12(%rsp), %rax
movq %rax, 120(%rsp)
leaq 8(%rsp), %rax
movq %rax, 128(%rsp)
movl $1, 48(%rsp)
movl $1, 52(%rsp)
movl $1, 56(%rsp)
movl $1, 60(%rsp)
movl $1, 64(%rsp)
movl $1, 68(%rsp)
leaq 40(%rsp), %rcx
leaq 32(%rsp), %rdx
leaq 60(%rsp), %rsi
leaq 48(%rsp), %rdi
call __cudaPopCallConfiguration@PLT
testl %eax, %eax
je .L23
.L19:
movq 136(%rsp), %rax
subq %fs:40, %rax
jne .L24
addq $152, %rsp
.cfi_remember_state
.cfi_def_cfa_offset 8
ret
.L23:
.cfi_restore_state
pushq 40(%rsp)
.cfi_def_cfa_offset 168
pushq 40(%rsp)
.cfi_def_cfa_offset 176
leaq 112(%rsp), %r9
movq 76(%rsp), %rcx
movl 84(%rsp), %r8d
movq 64(%rsp), %rsi
movl 72(%rsp), %edx
leaq _Z9phase_twoPiiiii(%rip), %rdi
call cudaLaunchKernel@PLT
addq $16, %rsp
.cfi_def_cfa_offset 160
jmp .L19
.L24:
call __stack_chk_fail@PLT
.cfi_endproc
.LFE4257:
.size _Z32__device_stub__Z9phase_twoPiiiiiPiiiii, .-_Z32__device_stub__Z9phase_twoPiiiiiPiiiii
.globl _Z9phase_twoPiiiii
.type _Z9phase_twoPiiiii, @function
_Z9phase_twoPiiiii:
.LFB4258:
.cfi_startproc
endbr64
subq $8, %rsp
.cfi_def_cfa_offset 16
call _Z32__device_stub__Z9phase_twoPiiiiiPiiiii
addq $8, %rsp
.cfi_def_cfa_offset 8
ret
.cfi_endproc
.LFE4258:
.size _Z9phase_twoPiiiii, .-_Z9phase_twoPiiiii
.globl _Z35__device_stub__Z11phase_threePiiiiiPiiiii
.type _Z35__device_stub__Z11phase_threePiiiiiPiiiii, @function
_Z35__device_stub__Z11phase_threePiiiiiPiiiii:
.LFB4259:
.cfi_startproc
endbr64
subq $152, %rsp
.cfi_def_cfa_offset 160
movq %rdi, 24(%rsp)
movl %esi, 20(%rsp)
movl %edx, 16(%rsp)
movl %ecx, 12(%rsp)
movl %r8d, 8(%rsp)
movq %fs:40, %rax
movq %rax, 136(%rsp)
xorl %eax, %eax
leaq 24(%rsp), %rax
movq %rax, 96(%rsp)
leaq 20(%rsp), %rax
movq %rax, 104(%rsp)
leaq 16(%rsp), %rax
movq %rax, 112(%rsp)
leaq 12(%rsp), %rax
movq %rax, 120(%rsp)
leaq 8(%rsp), %rax
movq %rax, 128(%rsp)
movl $1, 48(%rsp)
movl $1, 52(%rsp)
movl $1, 56(%rsp)
movl $1, 60(%rsp)
movl $1, 64(%rsp)
movl $1, 68(%rsp)
leaq 40(%rsp), %rcx
leaq 32(%rsp), %rdx
leaq 60(%rsp), %rsi
leaq 48(%rsp), %rdi
call __cudaPopCallConfiguration@PLT
testl %eax, %eax
je .L31
.L27:
movq 136(%rsp), %rax
subq %fs:40, %rax
jne .L32
addq $152, %rsp
.cfi_remember_state
.cfi_def_cfa_offset 8
ret
.L31:
.cfi_restore_state
pushq 40(%rsp)
.cfi_def_cfa_offset 168
pushq 40(%rsp)
.cfi_def_cfa_offset 176
leaq 112(%rsp), %r9
movq 76(%rsp), %rcx
movl 84(%rsp), %r8d
movq 64(%rsp), %rsi
movl 72(%rsp), %edx
leaq _Z11phase_threePiiiii(%rip), %rdi
call cudaLaunchKernel@PLT
addq $16, %rsp
.cfi_def_cfa_offset 160
jmp .L27
.L32:
call __stack_chk_fail@PLT
.cfi_endproc
.LFE4259:
.size _Z35__device_stub__Z11phase_threePiiiiiPiiiii, .-_Z35__device_stub__Z11phase_threePiiiiiPiiiii
.globl _Z11phase_threePiiiii
.type _Z11phase_threePiiiii, @function
_Z11phase_threePiiiii:
.LFB4260:
.cfi_startproc
endbr64
subq $8, %rsp
.cfi_def_cfa_offset 16
call _Z35__device_stub__Z11phase_threePiiiiiPiiiii
addq $8, %rsp
.cfi_def_cfa_offset 8
ret
.cfi_endproc
.LFE4260:
.size _Z11phase_threePiiiii, .-_Z11phase_threePiiiii
.globl _Z8block_FWv
.type _Z8block_FWv, @function
_Z8block_FWv:
.LFB4227:
.cfi_startproc
endbr64
pushq %r14
.cfi_def_cfa_offset 16
.cfi_offset 14, -16
pushq %r13
.cfi_def_cfa_offset 24
.cfi_offset 13, -24
pushq %r12
.cfi_def_cfa_offset 32
.cfi_offset 12, -32
pushq %rbp
.cfi_def_cfa_offset 40
.cfi_offset 6, -40
pushq %rbx
.cfi_def_cfa_offset 48
.cfi_offset 3, -48
subq $64, %rsp
.cfi_def_cfa_offset 112
movq %fs:40, %rax
movq %rax, 56(%rsp)
xorl %eax, %eax
movl vert(%rip), %r12d
movl block_size(%rip), %ecx
leal -1(%r12), %ebp
movl %ebp, %eax
cltd
idivl %ecx
leal 1(%rax), %ebx
movl %ecx, %r13d
imull %ebx, %r13d
movslq %r12d, %r12
salq $2, %r12
movslq %r13d, %rsi
leaq 0(,%rsi,4), %r14
movl %eax, 8(%rsp)
movl $2, 12(%rsp)
movl $1, 16(%rsp)
movl %eax, 20(%rsp)
movl %eax, 24(%rsp)
movl $1, 28(%rsp)
movl %ecx, 32(%rsp)
movl %ecx, 36(%rsp)
movl $1, 40(%rsp)
imulq %r14, %rsi
movq %rsp, %rdi
call cudaMalloc@PLT
subq $8, %rsp
.cfi_def_cfa_offset 120
pushq $1
.cfi_def_cfa_offset 128
movslq vert(%rip), %r9
movq %r12, %r8
movq %r12, %rcx
movq data(%rip), %rdx
movq %r14, %rsi
movq 16(%rsp), %rdi
call cudaMemcpy2D@PLT
addq $16, %rsp
.cfi_def_cfa_offset 112
testl %ebx, %ebx
jle .L36
movl %ebx, %ebp
movl $0, %ebx
jmp .L40
.L44:
movl vert(%rip), %r8d
movl %r13d, %ecx
movl %ebx, %edx
movl block_size(%rip), %esi
movq (%rsp), %rdi
call _Z32__device_stub__Z9phase_onePiiiiiPiiiii
jmp .L37
.L45:
movl vert(%rip), %r8d
movl %r13d, %ecx
movl %ebx, %edx
movl block_size(%rip), %esi
movq (%rsp), %rdi
call _Z32__device_stub__Z9phase_twoPiiiiiPiiiii
jmp .L38
.L39:
addl $1, %ebx
cmpl %ebx, %ebp
je .L36
.L40:
movl $1, 44(%rsp)
movl $1, 48(%rsp)
movl 40(%rsp), %ecx
movl $0, %r9d
movl $0, %r8d
movq 32(%rsp), %rdx
movq 44(%rsp), %rdi
movl $1, %esi
call __cudaPushCallConfiguration@PLT
testl %eax, %eax
je .L44
.L37:
movl 40(%rsp), %ecx
movl $0, %r9d
movl $0, %r8d
movq 32(%rsp), %rdx
movq 8(%rsp), %rdi
movl 16(%rsp), %esi
call __cudaPushCallConfiguration@PLT
testl %eax, %eax
je .L45
.L38:
movl 40(%rsp), %ecx
movl $0, %r9d
movl $0, %r8d
movq 32(%rsp), %rdx
movq 20(%rsp), %rdi
movl 28(%rsp), %esi
call __cudaPushCallConfiguration@PLT
testl %eax, %eax
jne .L39
movl vert(%rip), %r8d
movl %r13d, %ecx
movl %ebx, %edx
movl block_size(%rip), %esi
movq (%rsp), %rdi
call _Z35__device_stub__Z11phase_threePiiiiiPiiiii
jmp .L39
.L36:
subq $8, %rsp
.cfi_def_cfa_offset 120
pushq $2
.cfi_def_cfa_offset 128
movslq vert(%rip), %r9
movq %r12, %r8
movq %r14, %rcx
movq 16(%rsp), %rdx
movq %r12, %rsi
movq data(%rip), %rdi
call cudaMemcpy2D@PLT
addq $16, %rsp
.cfi_def_cfa_offset 112
movq (%rsp), %rdi
call cudaFree@PLT
movq 56(%rsp), %rax
subq %fs:40, %rax
jne .L46
addq $64, %rsp
.cfi_remember_state
.cfi_def_cfa_offset 48
popq %rbx
.cfi_def_cfa_offset 40
popq %rbp
.cfi_def_cfa_offset 32
popq %r12
.cfi_def_cfa_offset 24
popq %r13
.cfi_def_cfa_offset 16
popq %r14
.cfi_def_cfa_offset 8
ret
.L46:
.cfi_restore_state
call __stack_chk_fail@PLT
.cfi_endproc
.LFE4227:
.size _Z8block_FWv, .-_Z8block_FWv
.section .rodata.str1.1,"aMS",@progbits,1
.LC0:
.string "_Z11phase_threePiiiii"
.LC1:
.string "_Z9phase_twoPiiiii"
.LC2:
.string "_Z9phase_onePiiiii"
.LC3:
.string "_Z8init_gpui"
.text
.type _ZL24__sti____cudaRegisterAllv, @function
_ZL24__sti____cudaRegisterAllv:
.LFB4262:
.cfi_startproc
endbr64
pushq %rbx
.cfi_def_cfa_offset 16
.cfi_offset 3, -16
leaq _ZL15__fatDeviceText(%rip), %rdi
call __cudaRegisterFatBinary@PLT
movq %rax, %rbx
movq %rax, _ZL20__cudaFatCubinHandle(%rip)
pushq $0
.cfi_def_cfa_offset 24
pushq $0
.cfi_def_cfa_offset 32
pushq $0
.cfi_def_cfa_offset 40
pushq $0
.cfi_def_cfa_offset 48
movl $0, %r9d
movl $-1, %r8d
leaq .LC0(%rip), %rdx
movq %rdx, %rcx
leaq _Z11phase_threePiiiii(%rip), %rsi
movq %rax, %rdi
call __cudaRegisterFunction@PLT
addq $32, %rsp
.cfi_def_cfa_offset 16
pushq $0
.cfi_def_cfa_offset 24
pushq $0
.cfi_def_cfa_offset 32
pushq $0
.cfi_def_cfa_offset 40
pushq $0
.cfi_def_cfa_offset 48
movl $0, %r9d
movl $-1, %r8d
leaq .LC1(%rip), %rdx
movq %rdx, %rcx
leaq _Z9phase_twoPiiiii(%rip), %rsi
movq %rbx, %rdi
call __cudaRegisterFunction@PLT
addq $32, %rsp
.cfi_def_cfa_offset 16
pushq $0
.cfi_def_cfa_offset 24
pushq $0
.cfi_def_cfa_offset 32
pushq $0
.cfi_def_cfa_offset 40
pushq $0
.cfi_def_cfa_offset 48
movl $0, %r9d
movl $-1, %r8d
leaq .LC2(%rip), %rdx
movq %rdx, %rcx
leaq _Z9phase_onePiiiii(%rip), %rsi
movq %rbx, %rdi
call __cudaRegisterFunction@PLT
addq $32, %rsp
.cfi_def_cfa_offset 16
pushq $0
.cfi_def_cfa_offset 24
pushq $0
.cfi_def_cfa_offset 32
pushq $0
.cfi_def_cfa_offset 40
pushq $0
.cfi_def_cfa_offset 48
movl $0, %r9d
movl $-1, %r8d
leaq .LC3(%rip), %rdx
movq %rdx, %rcx
leaq _Z8init_gpui(%rip), %rsi
movq %rbx, %rdi
call __cudaRegisterFunction@PLT
addq $32, %rsp
.cfi_def_cfa_offset 16
movq _ZL20__cudaFatCubinHandle(%rip), %rdi
call __cudaRegisterFatBinaryEnd@PLT
leaq _ZL26__cudaUnregisterBinaryUtilv(%rip), %rdi
call atexit@PLT
popq %rbx
.cfi_def_cfa_offset 8
ret
.cfi_endproc
.LFE4262:
.size _ZL24__sti____cudaRegisterAllv, .-_ZL24__sti____cudaRegisterAllv
.section .init_array,"aw"
.align 8
.quad _ZL24__sti____cudaRegisterAllv
.text
.globl _Z23dump_from_file_and_initPKc
.type _Z23dump_from_file_and_initPKc, @function
_Z23dump_from_file_and_initPKc:
.LFB4225:
.cfi_startproc
.cfi_personality 0x9b,DW.ref.__gxx_personality_v0
.cfi_lsda 0x1b,.LLSDA4225
endbr64
pushq %r15
.cfi_def_cfa_offset 16
.cfi_offset 15, -16
pushq %r14
.cfi_def_cfa_offset 24
.cfi_offset 14, -24
pushq %r13
.cfi_def_cfa_offset 32
.cfi_offset 13, -32
pushq %r12
.cfi_def_cfa_offset 40
.cfi_offset 12, -40
pushq %rbp
.cfi_def_cfa_offset 48
.cfi_offset 6, -48
pushq %rbx
.cfi_def_cfa_offset 56
.cfi_offset 3, -56
subq $952, %rsp
.cfi_def_cfa_offset 1008
movq %rdi, %rbx
movq %fs:40, %rax
movq %rax, 936(%rsp)
xorl %eax, %eax
leaq 416(%rsp), %r12
leaq 672(%rsp), %rdi
call _ZNSt8ios_baseC2Ev@PLT
leaq 16+_ZTVSt9basic_iosIcSt11char_traitsIcEE(%rip), %rax
movq %rax, 672(%rsp)
movq $0, 888(%rsp)
movb $0, 896(%rsp)
movb $0, 897(%rsp)
movq $0, 904(%rsp)
movq $0, 912(%rsp)
movq $0, 920(%rsp)
movq $0, 928(%rsp)
movq 8+_ZTTSt14basic_ifstreamIcSt11char_traitsIcEE(%rip), %rbp
movq %rbp, 416(%rsp)
movq -24(%rbp), %rax
movq 16+_ZTTSt14basic_ifstreamIcSt11char_traitsIcEE(%rip), %rcx
movq %rcx, 416(%rsp,%rax)
movq $0, 424(%rsp)
movq 416(%rsp), %rax
movq %r12, %rdi
addq -24(%rax), %rdi
movl $0, %esi
.LEHB0:
call _ZNSt9basic_iosIcSt11char_traitsIcEE4initEPSt15basic_streambufIcS1_E@PLT
.LEHE0:
leaq 24+_ZTVSt14basic_ifstreamIcSt11char_traitsIcEE(%rip), %rax
movq %rax, 416(%rsp)
leaq 40(%rax), %rax
movq %rax, 672(%rsp)
leaq 432(%rsp), %rdi
.LEHB1:
call _ZNSt13basic_filebufIcSt11char_traitsIcEEC1Ev@PLT
.LEHE1:
leaq 432(%rsp), %rsi
leaq 672(%rsp), %rdi
.LEHB2:
call _ZNSt9basic_iosIcSt11char_traitsIcEE4initEPSt15basic_streambufIcS1_E@PLT
leaq 432(%rsp), %rdi
movl $8, %edx
movq %rbx, %rsi
call _ZNSt13basic_filebufIcSt11char_traitsIcEE4openEPKcSt13_Ios_Openmode@PLT
testq %rax, %rax
je .L100
movq 416(%rsp), %rax
movq -24(%rax), %rax
leaq 416(%rsp,%rax), %rdi
movl $0, %esi
call _ZNSt9basic_iosIcSt11char_traitsIcEE5clearESt12_Ios_Iostate@PLT
jmp .L51
.L100:
movq 416(%rsp), %rax
movq -24(%rax), %rax
leaq 416(%rsp,%rax), %rdi
movl 32(%rdi), %esi
orl $4, %esi
call _ZNSt9basic_iosIcSt11char_traitsIcEE5clearESt12_Ios_Iostate@PLT
.LEHE2:
.L51:
leaq 16(%rsp), %rbx
leaq 144(%rsp), %rdi
call _ZNSt8ios_baseC2Ev@PLT
leaq 16+_ZTVSt9basic_iosIcSt11char_traitsIcEE(%rip), %rax
movq %rax, 144(%rsp)
movq $0, 360(%rsp)
movb $0, 368(%rsp)
movb $0, 369(%rsp)
movq $0, 376(%rsp)
movq $0, 384(%rsp)
movq $0, 392(%rsp)
movq $0, 400(%rsp)
movq 16+_ZTTNSt7__cxx1118basic_stringstreamIcSt11char_traitsIcESaIcEEE(%rip), %r12
movq %r12, 16(%rsp)
movq 24+_ZTTNSt7__cxx1118basic_stringstreamIcSt11char_traitsIcESaIcEEE(%rip), %r15
movq -24(%r12), %rax
movq %r15, 16(%rsp,%rax)
movq $0, 24(%rsp)
movq 16(%rsp), %rax
addq -24(%rax), %rbx
movq %rbx, %rdi
movl $0, %esi
.LEHB3:
call _ZNSt9basic_iosIcSt11char_traitsIcEE4initEPSt15basic_streambufIcS1_E@PLT
.LEHE3:
jmp .L101
.L88:
endbr64
movq %rax, %rbx
leaq 432(%rsp), %rdi
call _ZNSt13basic_filebufIcSt11char_traitsIcEED1Ev@PLT
.L54:
movq %rbp, 416(%rsp)
movq -24(%rbp), %rax
movq 16+_ZTTSt14basic_ifstreamIcSt11char_traitsIcEE(%rip), %rcx
movq %rcx, 416(%rsp,%rax)
movq $0, 424(%rsp)
.L55:
leaq 16+_ZTVSt9basic_iosIcSt11char_traitsIcEE(%rip), %rax
movq %rax, 672(%rsp)
leaq 672(%rsp), %rdi
call _ZNSt8ios_baseD2Ev@PLT
movq 936(%rsp), %rax
subq %fs:40, %rax
je .L56
call __stack_chk_fail@PLT
.L87:
endbr64
movq %rax, %rbx
jmp .L54
.L86:
endbr64
movq %rax, %rbx
jmp .L55
.L56:
movq %rbx, %rdi
.LEHB4:
call _Unwind_Resume@PLT
.LEHE4:
.L101:
movq 32+_ZTTNSt7__cxx1118basic_stringstreamIcSt11char_traitsIcESaIcEEE(%rip), %r13
movq %r13, 32(%rsp)
movq -24(%r13), %rax
movq 40+_ZTTNSt7__cxx1118basic_stringstreamIcSt11char_traitsIcESaIcEEE(%rip), %rbx
movq %rbx, 32(%rsp,%rax)
movq 32(%rsp), %rax
movq -24(%rax), %rax
leaq 32(%rsp,%rax), %rdi
movl $0, %esi
.LEHB5:
call _ZNSt9basic_iosIcSt11char_traitsIcEE4initEPSt15basic_streambufIcS1_E@PLT
.LEHE5:
movq 8+_ZTTNSt7__cxx1118basic_stringstreamIcSt11char_traitsIcESaIcEEE(%rip), %r14
movq %r14, 16(%rsp)
movq -24(%r14), %rax
movq 48+_ZTTNSt7__cxx1118basic_stringstreamIcSt11char_traitsIcESaIcEEE(%rip), %rbx
movq %rbx, 16(%rsp,%rax)
leaq 24+_ZTVNSt7__cxx1118basic_stringstreamIcSt11char_traitsIcESaIcEEE(%rip), %rax
movq %rax, 16(%rsp)
leaq 80(%rax), %rax
movq %rax, 144(%rsp)
leaq -40(%rax), %rax
movq %rax, 32(%rsp)
leaq 16+_ZTVSt15basic_streambufIcSt11char_traitsIcEE(%rip), %rax
movq %rax, 40(%rsp)
movq $0, 48(%rsp)
movq $0, 56(%rsp)
movq $0, 64(%rsp)
movq $0, 72(%rsp)
movq $0, 80(%rsp)
movq $0, 88(%rsp)
leaq 96(%rsp), %rdi
call _ZNSt6localeC1Ev@PLT
leaq 16+_ZTVNSt7__cxx1115basic_stringbufIcSt11char_traitsIcESaIcEEE(%rip), %rax
movq %rax, 40(%rsp)
movl $24, 104(%rsp)
leaq 128(%rsp), %rax
movq %rax, 112(%rsp)
movq $0, 120(%rsp)
movb $0, 128(%rsp)
leaq 40(%rsp), %rsi
leaq 144(%rsp), %rdi
.LEHB6:
call _ZNSt9basic_iosIcSt11char_traitsIcEE4initEPSt15basic_streambufIcS1_E@PLT
.LEHE6:
jmp .L102
.L89:
endbr64
movq %r12, 16(%rsp)
movq -24(%r12), %rdx
movq %r15, 16(%rsp,%rdx)
movq $0, 24(%rsp)
movq %rax, %rbx
.L59:
leaq 16+_ZTVSt9basic_iosIcSt11char_traitsIcEE(%rip), %rax
movq %rax, 144(%rsp)
leaq 144(%rsp), %rdi
call _ZNSt8ios_baseD2Ev@PLT
.L62:
leaq 416(%rsp), %rdi
call _ZNSt14basic_ifstreamIcSt11char_traitsIcEED1Ev@PLT
movq 936(%rsp), %rax
subq %fs:40, %rax
je .L80
call __stack_chk_fail@PLT
.L85:
endbr64
movq %rax, %rbx
leaq 16+_ZTVNSt7__cxx1115basic_stringbufIcSt11char_traitsIcESaIcEEE(%rip), %rax
movq %rax, 40(%rsp)
movq 112(%rsp), %rdi
leaq 128(%rsp), %rax
cmpq %rax, %rdi
je .L61
movq 128(%rsp), %rax
leaq 1(%rax), %rsi
call _ZdlPvm@PLT
.L61:
leaq 16+_ZTVSt15basic_streambufIcSt11char_traitsIcEE(%rip), %rax
movq %rax, 40(%rsp)
leaq 16(%rsp), %rbp
leaq 96(%rsp), %rdi
call _ZNSt6localeD1Ev@PLT
leaq 8+_ZTTNSt7__cxx1118basic_stringstreamIcSt11char_traitsIcESaIcEEE(%rip), %rsi
movq %rbp, %rdi
call _ZNSdD2Ev@PLT
jmp .L59
.L84:
endbr64
movq %rax, %rbx
jmp .L59
.L102:
leaq 432(%rsp), %rsi
leaq 32(%rsp), %rdi
.LEHB7:
call _ZNSolsEPSt15basic_streambufIcSt11char_traitsIcEE@PLT
leaq 16(%rsp), %rdi
leaq vert(%rip), %rsi
call _ZNSirsERi@PLT
movq %rax, %rdi
leaq edge(%rip), %rsi
call _ZNSirsERi@PLT
movl vert(%rip), %edi
movl %edi, %eax
imull %edi, %eax
movl %eax, vert2(%rip)
movslq %edi, %rdi
movq %rdi, %rax
shrq $60, %rax
jne .L63
salq $3, %rdi
call _Znam@PLT
movq %rax, Dist(%rip)
movslq vert2(%rip), %rdi
movabsq $2305843009213693950, %rax
cmpq %rdi, %rax
jb .L103
salq $2, %rdi
call _Znam@PLT
jmp .L104
.L63:
movq 936(%rsp), %rax
subq %fs:40, %rax
je .L66
call __stack_chk_fail@PLT
.L66:
call __cxa_throw_bad_array_new_length@PLT
.L83:
endbr64
movq %rax, %rbx
leaq 16(%rsp), %rdi
call _ZNSt7__cxx1118basic_stringstreamIcSt11char_traitsIcESaIcEED1Ev@PLT
jmp .L62
.L104:
movq %rax, data(%rip)
movslq vert2(%rip), %rdx
leaq (%rax,%rdx,4), %rdx
cmpq %rdx, %rax
je .L67
.L68:
movl $1000000000, (%rax)
addq $4, %rax
cmpq %rax, %rdx
jne .L68
.L67:
movl vert(%rip), %eax
movl $0, %edx
testl %eax, %eax
jle .L70
.L69:
imull %edx, %eax
cltq
movq data(%rip), %rcx
leaq (%rcx,%rax,4), %rcx
movq Dist(%rip), %rax
movq %rcx, (%rax,%rdx,8)
movq Dist(%rip), %rax
movq (%rax,%rdx,8), %rax
movl $0, (%rax,%rdx,4)
movl vert(%rip), %eax
addq $1, %rdx
cmpl %edx, %eax
jg .L69
.L70:
cmpl %eax, block_size(%rip)
jle .L72
movl %eax, block_size(%rip)
.L72:
movl edge(%rip), %eax
subl $1, %eax
movl %eax, edge(%rip)
js .L73
leaq 4(%rsp), %rbx
jmp .L74
.L103:
movq 936(%rsp), %rax
subq %fs:40, %rax
je .L71
call __stack_chk_fail@PLT
.L71:
call __cxa_throw_bad_array_new_length@PLT
.L105:
movq %rax, %rdi
leaq 8(%rsp), %rsi
call _ZNSirsERi@PLT
movq %rax, %rdi
leaq 12(%rsp), %rsi
call _ZNSirsERi@PLT
movslq 4(%rsp), %rcx
movslq 8(%rsp), %rdx
movq Dist(%rip), %rax
movq (%rax,%rcx,8), %rax
movl 12(%rsp), %ecx
movl %ecx, (%rax,%rdx,4)
movl edge(%rip), %eax
subl $1, %eax
movl %eax, edge(%rip)
js .L73
.L74:
leaq 16(%rsp), %rdi
movq %rbx, %rsi
call _ZNSirsERi@PLT
jmp .L105
.L73:
leaq 432(%rsp), %rdi
call _ZNSt13basic_filebufIcSt11char_traitsIcEE5closeEv@PLT
.LEHE7:
testq %rax, %rax
je .L106
.L75:
leaq 24+_ZTVNSt7__cxx1118basic_stringstreamIcSt11char_traitsIcESaIcEEE(%rip), %rax
movq %rax, 16(%rsp)
leaq 80(%rax), %rax
movq %rax, 144(%rsp)
leaq -40(%rax), %rax
movq %rax, 32(%rsp)
leaq 16+_ZTVNSt7__cxx1115basic_stringbufIcSt11char_traitsIcESaIcEEE(%rip), %rax
movq %rax, 40(%rsp)
movq 112(%rsp), %rdi
leaq 128(%rsp), %rax
cmpq %rax, %rdi
je .L76
movq 128(%rsp), %rax
leaq 1(%rax), %rsi
call _ZdlPvm@PLT
.L76:
leaq 16+_ZTVSt15basic_streambufIcSt11char_traitsIcEE(%rip), %rax
movq %rax, 40(%rsp)
leaq 96(%rsp), %rdi
call _ZNSt6localeD1Ev@PLT
movq %r14, 16(%rsp)
movq -24(%r14), %rax
movq 48+_ZTTNSt7__cxx1118basic_stringstreamIcSt11char_traitsIcESaIcEEE(%rip), %rbx
movq %rbx, 16(%rsp,%rax)
movq %r13, 32(%rsp)
movq -24(%r13), %rax
movq 40+_ZTTNSt7__cxx1118basic_stringstreamIcSt11char_traitsIcESaIcEEE(%rip), %rbx
movq %rbx, 32(%rsp,%rax)
movq %r12, 16(%rsp)
movq -24(%r12), %rax
movq %r15, 16(%rsp,%rax)
movq $0, 24(%rsp)
leaq 16+_ZTVSt9basic_iosIcSt11char_traitsIcEE(%rip), %rax
movq %rax, 144(%rsp)
leaq 144(%rsp), %rdi
call _ZNSt8ios_baseD2Ev@PLT
leaq 24+_ZTVSt14basic_ifstreamIcSt11char_traitsIcEE(%rip), %rax
movq %rax, 416(%rsp)
leaq 40(%rax), %rax
movq %rax, 672(%rsp)
leaq 16+_ZTVSt13basic_filebufIcSt11char_traitsIcEE(%rip), %rax
movq %rax, 432(%rsp)
leaq 432(%rsp), %rdi
.LEHB8:
call _ZNSt13basic_filebufIcSt11char_traitsIcEE5closeEv@PLT
.LEHE8:
jmp .L78
.L106:
movq 416(%rsp), %rax
movq -24(%rax), %rax
leaq 416(%rsp,%rax), %rdi
movl 32(%rdi), %esi
orl $4, %esi
.LEHB9:
call _ZNSt9basic_iosIcSt11char_traitsIcEE5clearESt12_Ios_Iostate@PLT
.LEHE9:
jmp .L75
.L90:
endbr64
movq %rax, %rdi
call __cxa_begin_catch@PLT
call __cxa_end_catch@PLT
.L78:
leaq 536(%rsp), %rdi
call _ZNSt12__basic_fileIcED1Ev@PLT
leaq 16+_ZTVSt15basic_streambufIcSt11char_traitsIcEE(%rip), %rax
movq %rax, 432(%rsp)
leaq 488(%rsp), %rdi
call _ZNSt6localeD1Ev@PLT
movq %rbp, 416(%rsp)
movq -24(%rbp), %rax
movq 16+_ZTTSt14basic_ifstreamIcSt11char_traitsIcEE(%rip), %rbx
movq %rbx, 416(%rsp,%rax)
movq $0, 424(%rsp)
leaq 16+_ZTVSt9basic_iosIcSt11char_traitsIcEE(%rip), %rax
movq %rax, 672(%rsp)
leaq 672(%rsp), %rdi
call _ZNSt8ios_baseD2Ev@PLT
movq 936(%rsp), %rax
subq %fs:40, %rax
jne .L107
addq $952, %rsp
.cfi_remember_state
.cfi_def_cfa_offset 56
popq %rbx
.cfi_def_cfa_offset 48
popq %rbp
.cfi_def_cfa_offset 40
popq %r12
.cfi_def_cfa_offset 32
popq %r13
.cfi_def_cfa_offset 24
popq %r14
.cfi_def_cfa_offset 16
popq %r15
.cfi_def_cfa_offset 8
ret
.L80:
.cfi_restore_state
movq %rbx, %rdi
.LEHB10:
call _Unwind_Resume@PLT
.LEHE10:
.L107:
call __stack_chk_fail@PLT
.cfi_endproc
.LFE4225:
.globl __gxx_personality_v0
.section .gcc_except_table,"a",@progbits
.align 4
.LLSDA4225:
.byte 0xff
.byte 0x9b
.uleb128 .LLSDATT4225-.LLSDATTD4225
.LLSDATTD4225:
.byte 0x1
.uleb128 .LLSDACSE4225-.LLSDACSB4225
.LLSDACSB4225:
.uleb128 .LEHB0-.LFB4225
.uleb128 .LEHE0-.LEHB0
.uleb128 .L86-.LFB4225
.uleb128 0
.uleb128 .LEHB1-.LFB4225
.uleb128 .LEHE1-.LEHB1
.uleb128 .L87-.LFB4225
.uleb128 0
.uleb128 .LEHB2-.LFB4225
.uleb128 .LEHE2-.LEHB2
.uleb128 .L88-.LFB4225
.uleb128 0
.uleb128 .LEHB3-.LFB4225
.uleb128 .LEHE3-.LEHB3
.uleb128 .L84-.LFB4225
.uleb128 0
.uleb128 .LEHB4-.LFB4225
.uleb128 .LEHE4-.LEHB4
.uleb128 0
.uleb128 0
.uleb128 .LEHB5-.LFB4225
.uleb128 .LEHE5-.LEHB5
.uleb128 .L89-.LFB4225
.uleb128 0
.uleb128 .LEHB6-.LFB4225
.uleb128 .LEHE6-.LEHB6
.uleb128 .L85-.LFB4225
.uleb128 0
.uleb128 .LEHB7-.LFB4225
.uleb128 .LEHE7-.LEHB7
.uleb128 .L83-.LFB4225
.uleb128 0
.uleb128 .LEHB8-.LFB4225
.uleb128 .LEHE8-.LEHB8
.uleb128 .L90-.LFB4225
.uleb128 0x1
.uleb128 .LEHB9-.LFB4225
.uleb128 .LEHE9-.LEHB9
.uleb128 .L83-.LFB4225
.uleb128 0
.uleb128 .LEHB10-.LFB4225
.uleb128 .LEHE10-.LEHB10
.uleb128 0
.uleb128 0
.LLSDACSE4225:
.byte 0x1
.byte 0
.align 4
.long 0
.LLSDATT4225:
.text
.size _Z23dump_from_file_and_initPKc, .-_Z23dump_from_file_and_initPKc
.globl _Z12dump_to_filePKc
.type _Z12dump_to_filePKc, @function
_Z12dump_to_filePKc:
.LFB4226:
.cfi_startproc
.cfi_personality 0x9b,DW.ref.__gxx_personality_v0
.cfi_lsda 0x1b,.LLSDA4226
endbr64
pushq %r13
.cfi_def_cfa_offset 16
.cfi_offset 13, -16
pushq %r12
.cfi_def_cfa_offset 24
.cfi_offset 12, -24
pushq %rbp
.cfi_def_cfa_offset 32
.cfi_offset 6, -32
pushq %rbx
.cfi_def_cfa_offset 40
.cfi_offset 3, -40
subq $536, %rsp
.cfi_def_cfa_offset 576
movq %rdi, %rbp
movq %fs:40, %rax
movq %rax, 520(%rsp)
xorl %eax, %eax
movq %rsp, %r12
leaq 248(%rsp), %rdi
call _ZNSt8ios_baseC2Ev@PLT
leaq 16+_ZTVSt9basic_iosIcSt11char_traitsIcEE(%rip), %rax
movq %rax, 248(%rsp)
movq $0, 464(%rsp)
movb $0, 472(%rsp)
movb $0, 473(%rsp)
movq $0, 480(%rsp)
movq $0, 488(%rsp)
movq $0, 496(%rsp)
movq $0, 504(%rsp)
movq 8+_ZTTSt14basic_ofstreamIcSt11char_traitsIcEE(%rip), %rbx
movq %rbx, (%rsp)
movq 16+_ZTTSt14basic_ofstreamIcSt11char_traitsIcEE(%rip), %r13
movq -24(%rbx), %rax
movq %r13, (%rsp,%rax)
movq (%rsp), %rax
movq %r12, %rdi
addq -24(%rax), %rdi
movl $0, %esi
.LEHB11:
call _ZNSt9basic_iosIcSt11char_traitsIcEE4initEPSt15basic_streambufIcS1_E@PLT
.LEHE11:
leaq 24+_ZTVSt14basic_ofstreamIcSt11char_traitsIcEE(%rip), %rax
movq %rax, (%rsp)
leaq 40(%rax), %rax
movq %rax, 248(%rsp)
leaq 8(%rsp), %rdi
.LEHB12:
call _ZNSt13basic_filebufIcSt11char_traitsIcEEC1Ev@PLT
.LEHE12:
leaq 8(%rsp), %rsi
leaq 248(%rsp), %rdi
.LEHB13:
call _ZNSt9basic_iosIcSt11char_traitsIcEE4initEPSt15basic_streambufIcS1_E@PLT
leaq 8(%rsp), %rdi
movl $16, %edx
movq %rbp, %rsi
call _ZNSt13basic_filebufIcSt11char_traitsIcEE4openEPKcSt13_Ios_Openmode@PLT
testq %rax, %rax
je .L130
movq (%rsp), %rax
movq -24(%rax), %rax
leaq (%rsp,%rax), %rdi
movl $0, %esi
call _ZNSt9basic_iosIcSt11char_traitsIcEE5clearESt12_Ios_Iostate@PLT
jmp .L110
.L130:
movq (%rsp), %rax
movq -24(%rax), %rax
leaq (%rsp,%rax), %rdi
movl 32(%rdi), %esi
orl $4, %esi
call _ZNSt9basic_iosIcSt11char_traitsIcEE5clearESt12_Ios_Iostate@PLT
.LEHE13:
.L110:
movslq vert2(%rip), %rdx
salq $2, %rdx
movq %rsp, %rdi
movq data(%rip), %rsi
.LEHB14:
call _ZNSo5writeEPKcl@PLT
.LEHE14:
jmp .L131
.L125:
endbr64
movq %rax, %rbp
leaq 8(%rsp), %rdi
call _ZNSt13basic_filebufIcSt11char_traitsIcEED1Ev@PLT
movq %rbp, %rax
.L113:
movq %rbx, (%rsp)
movq -24(%rbx), %rdx
movq %r13, (%rsp,%rdx)
movq %rax, %rbx
.L114:
leaq 16+_ZTVSt9basic_iosIcSt11char_traitsIcEE(%rip), %rax
movq %rax, 248(%rsp)
leaq 248(%rsp), %rdi
call _ZNSt8ios_baseD2Ev@PLT
movq 520(%rsp), %rax
subq %fs:40, %rax
je .L115
call __stack_chk_fail@PLT
.L124:
endbr64
jmp .L113
.L123:
endbr64
movq %rax, %rbx
jmp .L114
.L115:
movq %rbx, %rdi
.LEHB15:
call _Unwind_Resume@PLT
.LEHE15:
.L131:
leaq 8(%rsp), %rdi
.LEHB16:
call _ZNSt13basic_filebufIcSt11char_traitsIcEE5closeEv@PLT
.LEHE16:
testq %rax, %rax
je .L132
.L116:
leaq 24+_ZTVSt14basic_ofstreamIcSt11char_traitsIcEE(%rip), %rax
movq %rax, (%rsp)
leaq 40(%rax), %rax
movq %rax, 248(%rsp)
leaq 16+_ZTVSt13basic_filebufIcSt11char_traitsIcEE(%rip), %rax
movq %rax, 8(%rsp)
leaq 8(%rsp), %rdi
.LEHB17:
call _ZNSt13basic_filebufIcSt11char_traitsIcEE5closeEv@PLT
.LEHE17:
jmp .L118
.L132:
movq (%rsp), %rax
movq -24(%rax), %rax
leaq (%rsp,%rax), %rdi
movl 32(%rdi), %esi
orl $4, %esi
.LEHB18:
call _ZNSt9basic_iosIcSt11char_traitsIcEE5clearESt12_Ios_Iostate@PLT
.LEHE18:
jmp .L116
.L126:
endbr64
movq %rax, %rdi
call __cxa_begin_catch@PLT
call __cxa_end_catch@PLT
.L118:
leaq 112(%rsp), %rdi
call _ZNSt12__basic_fileIcED1Ev@PLT
leaq 16+_ZTVSt15basic_streambufIcSt11char_traitsIcEE(%rip), %rax
movq %rax, 8(%rsp)
leaq 64(%rsp), %rdi
call _ZNSt6localeD1Ev@PLT
movq %rbx, (%rsp)
movq -24(%rbx), %rax
movq %r13, (%rsp,%rax)
leaq 16+_ZTVSt9basic_iosIcSt11char_traitsIcEE(%rip), %rax
movq %rax, 248(%rsp)
leaq 248(%rsp), %rdi
call _ZNSt8ios_baseD2Ev@PLT
movq 520(%rsp), %rax
subq %fs:40, %rax
jne .L133
addq $536, %rsp
.cfi_remember_state
.cfi_def_cfa_offset 40
popq %rbx
.cfi_def_cfa_offset 32
popq %rbp
.cfi_def_cfa_offset 24
popq %r12
.cfi_def_cfa_offset 16
popq %r13
.cfi_def_cfa_offset 8
ret
.L122:
.cfi_restore_state
endbr64
movq %rax, %rbx
movq %rsp, %rdi
call _ZNSt14basic_ofstreamIcSt11char_traitsIcEED1Ev@PLT
movq 520(%rsp), %rax
subq %fs:40, %rax
je .L120
call __stack_chk_fail@PLT
.L120:
movq %rbx, %rdi
.LEHB19:
call _Unwind_Resume@PLT
.LEHE19:
.L133:
call __stack_chk_fail@PLT
.cfi_endproc
.LFE4226:
.section .gcc_except_table
.align 4
.LLSDA4226:
.byte 0xff
.byte 0x9b
.uleb128 .LLSDATT4226-.LLSDATTD4226
.LLSDATTD4226:
.byte 0x1
.uleb128 .LLSDACSE4226-.LLSDACSB4226
.LLSDACSB4226:
.uleb128 .LEHB11-.LFB4226
.uleb128 .LEHE11-.LEHB11
.uleb128 .L123-.LFB4226
.uleb128 0
.uleb128 .LEHB12-.LFB4226
.uleb128 .LEHE12-.LEHB12
.uleb128 .L124-.LFB4226
.uleb128 0
.uleb128 .LEHB13-.LFB4226
.uleb128 .LEHE13-.LEHB13
.uleb128 .L125-.LFB4226
.uleb128 0
.uleb128 .LEHB14-.LFB4226
.uleb128 .LEHE14-.LEHB14
.uleb128 .L122-.LFB4226
.uleb128 0
.uleb128 .LEHB15-.LFB4226
.uleb128 .LEHE15-.LEHB15
.uleb128 0
.uleb128 0
.uleb128 .LEHB16-.LFB4226
.uleb128 .LEHE16-.LEHB16
.uleb128 .L122-.LFB4226
.uleb128 0
.uleb128 .LEHB17-.LFB4226
.uleb128 .LEHE17-.LEHB17
.uleb128 .L126-.LFB4226
.uleb128 0x1
.uleb128 .LEHB18-.LFB4226
.uleb128 .LEHE18-.LEHB18
.uleb128 .L122-.LFB4226
.uleb128 0
.uleb128 .LEHB19-.LFB4226
.uleb128 .LEHE19-.LEHB19
.uleb128 0
.uleb128 0
.LLSDACSE4226:
.byte 0x1
.byte 0
.align 4
.long 0
.LLSDATT4226:
.text
.size _Z12dump_to_filePKc, .-_Z12dump_to_filePKc
.globl main
.type main, @function
main:
.LFB4228:
.cfi_startproc
endbr64
pushq %rbx
.cfi_def_cfa_offset 16
.cfi_offset 3, -16
movq %rsi, %rbx
movq 8(%rsi), %rdi
call _Z23dump_from_file_and_initPKc
movq 24(%rbx), %rdi
movl $10, %edx
movl $0, %esi
call __isoc23_strtol@PLT
movl %eax, block_size(%rip)
call _Z8block_FWv
movq 16(%rbx), %rdi
call _Z12dump_to_filePKc
movq Dist(%rip), %rdi
testq %rdi, %rdi
je .L135
call _ZdaPv@PLT
.L135:
movq data(%rip), %rdi
testq %rdi, %rdi
je .L136
call _ZdaPv@PLT
.L136:
movl $0, %eax
popq %rbx
.cfi_def_cfa_offset 8
ret
.cfi_endproc
.LFE4228:
.size main, .-main
.section .nvFatBinSegment,"aw"
.align 8
.type _ZL15__fatDeviceText, @object
.size _ZL15__fatDeviceText, 24
_ZL15__fatDeviceText:
.long 1180844977
.long 1
.quad fatbinData
.quad 0
.local _ZL20__cudaFatCubinHandle
.comm _ZL20__cudaFatCubinHandle,8,8
.globl vert2
.bss
.align 4
.type vert2, @object
.size vert2, 4
vert2:
.zero 4
.globl edge
.align 4
.type edge, @object
.size edge, 4
edge:
.zero 4
.globl vert
.align 4
.type vert, @object
.size vert, 4
vert:
.zero 4
.globl block_size
.align 4
.type block_size, @object
.size block_size, 4
block_size:
.zero 4
.globl data
.align 8
.type data, @object
.size data, 8
data:
.zero 8
.globl Dist
.align 8
.type Dist, @object
.size Dist, 8
Dist:
.zero 8
.hidden DW.ref.__gxx_personality_v0
.weak DW.ref.__gxx_personality_v0
.section .data.rel.local.DW.ref.__gxx_personality_v0,"awG",@progbits,DW.ref.__gxx_personality_v0,comdat
.align 8
.type DW.ref.__gxx_personality_v0, @object
.size DW.ref.__gxx_personality_v0, 8
DW.ref.__gxx_personality_v0:
.quad __gxx_personality_v0
.ident "GCC: (Ubuntu 13.3.0-6ubuntu2~24.04) 13.3.0"
.section .note.GNU-stack,"",@progbits
.section .note.gnu.property,"a"
.align 8
.long 1f - 0f
.long 4f - 1f
.long 5
0:
.string "GNU"
1:
.align 8
.long 0xc0000002
.long 3f - 2f
2:
.long 0x3
3:
.align 8
4: |
You are a helpful coding assistant specialized in converting CUDA source code to HIP/AMD source code. | #include <iostream>
#include <string>
#include <sstream>
#include <fstream>
#include <algorithm>
#include <chrono>
#include <stdio.h>
#include <stdlib.h>
#include <stdarg.h>
#include <cuda.h>
#include <unistd.h>
//#define _DEBUG_
//#define _TIME_MEASURE_
#ifdef _DEBUG_
#include <string>
#include <sstream>
int __print_step = 0;
void __pt_log(const char *h_, const char *f_, ...){
std::stringstream ss;
ss << h_ << f_ << '\n';
std::string format = ss.str();
va_list va;
va_start(va, f_);
vprintf(format.c_str(), va);
va_end(va);
__print_step++;
}
#define VA_ARGS(...) , ##__VA_ARGS__
#define LOG(f_, ...) __pt_log(\
"[LOG] Step %3d: ", (f_), \
__print_step VA_ARGS(__VA_ARGS__))
#else
#define LOG(f_, ...)
#endif
#define INF 1000000000
#define CEIL(a, b) (( (a) - 1 ) / (b) + 1 )
int **Dist;
int *data;
int block_size;
int vert, edge;
int vert2;
inline void init(){
vert2 = vert*vert;
Dist = new int*[vert];
data = new int[vert2];
std::fill(data, data + vert2, INF);
for(int i=0;i<vert;++i){
Dist[i] = data + i*vert;
Dist[i][i] = 0;
}
if(vert < block_size){
block_size = vert;
}
}
inline void finalize(){
delete[] Dist;
delete[] data;
}
void dump_from_file_and_init(const char *file){
std::ifstream fin(file);
std::stringstream ss;
ss << fin.rdbuf();
ss >> vert >> edge;
LOG("vert: %d, edge: %d", vert, edge);
init();
int i, j, w;
while(--edge >=0){
ss >> i >> j >> w;
Dist[i][j] = w;
}
fin.close();
}
void dump_to_file(const char *file){
std::ofstream fout(file);
fout.write((char*)data, sizeof(int)*vert2);
fout.close();
}
__global__ void init_gpu(int reps){
int idx = blockIdx.x * blockDim.x + threadIdx.x;
if(idx >= reps) return;
}
__global__ void phase_one(int32_t* const dist, int block_size, int round, int width, int vert){
const int tx = threadIdx.x;
const int ty = threadIdx.y;
const int c = block_size * round + ty;
const int r = block_size * round + tx;
const int cell = c*width+r;
if(c >= vert || r >= vert){ //out of bounds, filled in with INF for each element
dist[cell] = INF;
}
__syncthreads();
int low = block_size * round;
int up = low + block_size;
int n;
for( ; low<up ; ++low){
// min(dist[c][r], dist[c][low] + dist[low][r])
n = dist[ c*width+low ] + dist[ low*width+r ];
if(n < dist[cell]){
dist[cell] = n;
}
__syncthreads();
}
}
__global__ void phase_two(int32_t* const dist, int block_size, int round, int width, int vert){
const int tx = threadIdx.x;
const int ty = threadIdx.y;
int bx = blockIdx.x;
int by = blockIdx.y;
int c;
int r;
if(bx >= round)++bx; //shift
if(by == 0){ //horizontal
c = block_size * round + ty;
r = block_size * bx + tx;
}else{ //vertical
c = block_size * bx + ty;
r = block_size * round + tx;
}
int cell = c * width + r;
if(c >= vert || r >= vert){ //out of bounds, filled in with INF for each element
dist[cell] = INF;
}
__syncthreads();
int low = round*block_size;
int up = low + block_size;
int n;
for( ; low<up ; ++low){
// min(dist[c][r], dist[c][low] + dist[low][r])
n = dist[ c*width+low ] + dist[ low*width+r ];
if(n < dist[cell]){
dist[cell] = n;
}
__syncthreads();
}
}
__global__ void phase_three(int32_t* const dist, int block_size, int round, int width, int vert){
const int tx = threadIdx.x;
const int ty = threadIdx.y;
int bx = blockIdx.x;
int by = blockIdx.y;
if(bx >= round)++bx; //shift x
if(by >= round)++by; //shift y
const int c = block_size * by + ty;
const int r = block_size * bx + tx;
const int cell = c*width + r;
if(c >= vert || r >= vert){ //out of bounds, filled in with INF for each element
dist[cell] = INF;
}
__syncthreads();
int low = round * block_size;
int up = low + block_size;
int n;
for( ; low<up ; ++low){
// min(dist[c][r], dist[c][low] + dist[low][r])
n = dist[ c*width+low ] + dist[ low*width+r ];
if(n < dist[cell]){
dist[cell] = n;
}
__syncthreads();
}
}
extern __shared__ int S[];
void block_FW(){
#ifdef _TIME_MEASURE_
auto start = std::chrono::high_resolution_clock::now();
#endif
int Round = CEIL(vert, block_size);
int padded_size = Round * block_size;
size_t vert_w_bytes = vert * sizeof(int);
size_t padded_w_bytes = padded_size * sizeof(int);
int32_t *device_ptr;
//size_t pitch;
dim3 p2b(Round-1, 2, 1); //phase 2 block
dim3 p3b(Round-1, Round-1, 1); //phase 3 block
dim3 dimt(block_size, block_size, 1); //thread
//cudaMallocPitch(&device_ptr, &pitch, vert_byte, vert_byte, vert);
cudaMalloc(&device_ptr, padded_w_bytes * padded_size);
//size_t pitch_int = pitch / sizeof(int);
//LOG("pitch => %zu bytes (%zu words)", pitch, pitch_int);
LOG("the number of blocks: %d", Round);
//dst_ptr, dst_pitch, src, src_pitch, w, h, kind
cudaMemcpy2D(device_ptr, padded_w_bytes, data, vert_w_bytes,
vert_w_bytes, vert, cudaMemcpyHostToDevice);
for(int r=0; r < Round; ++r){
LOG("Round %d/%d", r+1, Round);
phase_one<<< 1 , dimt >>>(device_ptr, block_size, r, padded_size, vert);
phase_two<<< p2b , dimt >>>(device_ptr, block_size, r, padded_size, vert);
phase_three<<< p3b , dimt >>>(device_ptr, block_size, r, padded_size, vert);
}
cudaMemcpy2D(data, vert_w_bytes, device_ptr, padded_w_bytes,
vert_w_bytes, vert, cudaMemcpyDeviceToHost);
cudaFree(device_ptr);
#ifdef _TIME_MEASURE_
auto end = std::chrono::high_resolution_clock::now();
std::chrono::duration<double> diff = end - start;
double elapsed_time = diff.count() * 1000;
printf("Total time: %f ms (%f GFLOPS)\n", elapsed_time, 2*vert*vert*vert / (elapsed_time * 1e6));
#endif
}
int main(int argc, char **argv){
dump_from_file_and_init(argv[1]);
block_size = std::atoi(argv[3]);
block_FW();
dump_to_file(argv[2]);
finalize();
return 0;
} | #include <iostream>
#include <string>
#include <sstream>
#include <fstream>
#include <algorithm>
#include <chrono>
#include <stdio.h>
#include <stdlib.h>
#include <stdarg.h>
#include <hip/hip_runtime.h>
#include <unistd.h>
//#define _DEBUG_
//#define _TIME_MEASURE_
#ifdef _DEBUG_
#include <string>
#include <sstream>
int __print_step = 0;
void __pt_log(const char *h_, const char *f_, ...){
std::stringstream ss;
ss << h_ << f_ << '\n';
std::string format = ss.str();
va_list va;
va_start(va, f_);
vprintf(format.c_str(), va);
va_end(va);
__print_step++;
}
#define VA_ARGS(...) , ##__VA_ARGS__
#define LOG(f_, ...) __pt_log(\
"[LOG] Step %3d: ", (f_), \
__print_step VA_ARGS(__VA_ARGS__))
#else
#define LOG(f_, ...)
#endif
#define INF 1000000000
#define CEIL(a, b) (( (a) - 1 ) / (b) + 1 )
int **Dist;
int *data;
int block_size;
int vert, edge;
int vert2;
inline void init(){
vert2 = vert*vert;
Dist = new int*[vert];
data = new int[vert2];
std::fill(data, data + vert2, INF);
for(int i=0;i<vert;++i){
Dist[i] = data + i*vert;
Dist[i][i] = 0;
}
if(vert < block_size){
block_size = vert;
}
}
inline void finalize(){
delete[] Dist;
delete[] data;
}
void dump_from_file_and_init(const char *file){
std::ifstream fin(file);
std::stringstream ss;
ss << fin.rdbuf();
ss >> vert >> edge;
LOG("vert: %d, edge: %d", vert, edge);
init();
int i, j, w;
while(--edge >=0){
ss >> i >> j >> w;
Dist[i][j] = w;
}
fin.close();
}
void dump_to_file(const char *file){
std::ofstream fout(file);
fout.write((char*)data, sizeof(int)*vert2);
fout.close();
}
__global__ void init_gpu(int reps){
int idx = blockIdx.x * blockDim.x + threadIdx.x;
if(idx >= reps) return;
}
__global__ void phase_one(int32_t* const dist, int block_size, int round, int width, int vert){
const int tx = threadIdx.x;
const int ty = threadIdx.y;
const int c = block_size * round + ty;
const int r = block_size * round + tx;
const int cell = c*width+r;
if(c >= vert || r >= vert){ //out of bounds, filled in with INF for each element
dist[cell] = INF;
}
__syncthreads();
int low = block_size * round;
int up = low + block_size;
int n;
for( ; low<up ; ++low){
// min(dist[c][r], dist[c][low] + dist[low][r])
n = dist[ c*width+low ] + dist[ low*width+r ];
if(n < dist[cell]){
dist[cell] = n;
}
__syncthreads();
}
}
__global__ void phase_two(int32_t* const dist, int block_size, int round, int width, int vert){
const int tx = threadIdx.x;
const int ty = threadIdx.y;
int bx = blockIdx.x;
int by = blockIdx.y;
int c;
int r;
if(bx >= round)++bx; //shift
if(by == 0){ //horizontal
c = block_size * round + ty;
r = block_size * bx + tx;
}else{ //vertical
c = block_size * bx + ty;
r = block_size * round + tx;
}
int cell = c * width + r;
if(c >= vert || r >= vert){ //out of bounds, filled in with INF for each element
dist[cell] = INF;
}
__syncthreads();
int low = round*block_size;
int up = low + block_size;
int n;
for( ; low<up ; ++low){
// min(dist[c][r], dist[c][low] + dist[low][r])
n = dist[ c*width+low ] + dist[ low*width+r ];
if(n < dist[cell]){
dist[cell] = n;
}
__syncthreads();
}
}
__global__ void phase_three(int32_t* const dist, int block_size, int round, int width, int vert){
const int tx = threadIdx.x;
const int ty = threadIdx.y;
int bx = blockIdx.x;
int by = blockIdx.y;
if(bx >= round)++bx; //shift x
if(by >= round)++by; //shift y
const int c = block_size * by + ty;
const int r = block_size * bx + tx;
const int cell = c*width + r;
if(c >= vert || r >= vert){ //out of bounds, filled in with INF for each element
dist[cell] = INF;
}
__syncthreads();
int low = round * block_size;
int up = low + block_size;
int n;
for( ; low<up ; ++low){
// min(dist[c][r], dist[c][low] + dist[low][r])
n = dist[ c*width+low ] + dist[ low*width+r ];
if(n < dist[cell]){
dist[cell] = n;
}
__syncthreads();
}
}
extern __shared__ int S[];
void block_FW(){
#ifdef _TIME_MEASURE_
auto start = std::chrono::high_resolution_clock::now();
#endif
int Round = CEIL(vert, block_size);
int padded_size = Round * block_size;
size_t vert_w_bytes = vert * sizeof(int);
size_t padded_w_bytes = padded_size * sizeof(int);
int32_t *device_ptr;
//size_t pitch;
dim3 p2b(Round-1, 2, 1); //phase 2 block
dim3 p3b(Round-1, Round-1, 1); //phase 3 block
dim3 dimt(block_size, block_size, 1); //thread
//cudaMallocPitch(&device_ptr, &pitch, vert_byte, vert_byte, vert);
hipMalloc(&device_ptr, padded_w_bytes * padded_size);
//size_t pitch_int = pitch / sizeof(int);
//LOG("pitch => %zu bytes (%zu words)", pitch, pitch_int);
LOG("the number of blocks: %d", Round);
//dst_ptr, dst_pitch, src, src_pitch, w, h, kind
hipMemcpy2D(device_ptr, padded_w_bytes, data, vert_w_bytes,
vert_w_bytes, vert, hipMemcpyHostToDevice);
for(int r=0; r < Round; ++r){
LOG("Round %d/%d", r+1, Round);
phase_one<<< 1 , dimt >>>(device_ptr, block_size, r, padded_size, vert);
phase_two<<< p2b , dimt >>>(device_ptr, block_size, r, padded_size, vert);
phase_three<<< p3b , dimt >>>(device_ptr, block_size, r, padded_size, vert);
}
hipMemcpy2D(data, vert_w_bytes, device_ptr, padded_w_bytes,
vert_w_bytes, vert, hipMemcpyDeviceToHost);
hipFree(device_ptr);
#ifdef _TIME_MEASURE_
auto end = std::chrono::high_resolution_clock::now();
std::chrono::duration<double> diff = end - start;
double elapsed_time = diff.count() * 1000;
printf("Total time: %f ms (%f GFLOPS)\n", elapsed_time, 2*vert*vert*vert / (elapsed_time * 1e6));
#endif
}
int main(int argc, char **argv){
dump_from_file_and_init(argv[1]);
block_size = std::atoi(argv[3]);
block_FW();
dump_to_file(argv[2]);
finalize();
return 0;
} |
You are a helpful coding assistant specialized in converting HIP source code to AMD device assembly. | #include <iostream>
#include <string>
#include <sstream>
#include <fstream>
#include <algorithm>
#include <chrono>
#include <stdio.h>
#include <stdlib.h>
#include <stdarg.h>
#include <hip/hip_runtime.h>
#include <unistd.h>
//#define _DEBUG_
//#define _TIME_MEASURE_
#ifdef _DEBUG_
#include <string>
#include <sstream>
int __print_step = 0;
void __pt_log(const char *h_, const char *f_, ...){
std::stringstream ss;
ss << h_ << f_ << '\n';
std::string format = ss.str();
va_list va;
va_start(va, f_);
vprintf(format.c_str(), va);
va_end(va);
__print_step++;
}
#define VA_ARGS(...) , ##__VA_ARGS__
#define LOG(f_, ...) __pt_log(\
"[LOG] Step %3d: ", (f_), \
__print_step VA_ARGS(__VA_ARGS__))
#else
#define LOG(f_, ...)
#endif
#define INF 1000000000
#define CEIL(a, b) (( (a) - 1 ) / (b) + 1 )
int **Dist;
int *data;
int block_size;
int vert, edge;
int vert2;
inline void init(){
vert2 = vert*vert;
Dist = new int*[vert];
data = new int[vert2];
std::fill(data, data + vert2, INF);
for(int i=0;i<vert;++i){
Dist[i] = data + i*vert;
Dist[i][i] = 0;
}
if(vert < block_size){
block_size = vert;
}
}
inline void finalize(){
delete[] Dist;
delete[] data;
}
void dump_from_file_and_init(const char *file){
std::ifstream fin(file);
std::stringstream ss;
ss << fin.rdbuf();
ss >> vert >> edge;
LOG("vert: %d, edge: %d", vert, edge);
init();
int i, j, w;
while(--edge >=0){
ss >> i >> j >> w;
Dist[i][j] = w;
}
fin.close();
}
void dump_to_file(const char *file){
std::ofstream fout(file);
fout.write((char*)data, sizeof(int)*vert2);
fout.close();
}
__global__ void init_gpu(int reps){
int idx = blockIdx.x * blockDim.x + threadIdx.x;
if(idx >= reps) return;
}
__global__ void phase_one(int32_t* const dist, int block_size, int round, int width, int vert){
const int tx = threadIdx.x;
const int ty = threadIdx.y;
const int c = block_size * round + ty;
const int r = block_size * round + tx;
const int cell = c*width+r;
if(c >= vert || r >= vert){ //out of bounds, filled in with INF for each element
dist[cell] = INF;
}
__syncthreads();
int low = block_size * round;
int up = low + block_size;
int n;
for( ; low<up ; ++low){
// min(dist[c][r], dist[c][low] + dist[low][r])
n = dist[ c*width+low ] + dist[ low*width+r ];
if(n < dist[cell]){
dist[cell] = n;
}
__syncthreads();
}
}
__global__ void phase_two(int32_t* const dist, int block_size, int round, int width, int vert){
const int tx = threadIdx.x;
const int ty = threadIdx.y;
int bx = blockIdx.x;
int by = blockIdx.y;
int c;
int r;
if(bx >= round)++bx; //shift
if(by == 0){ //horizontal
c = block_size * round + ty;
r = block_size * bx + tx;
}else{ //vertical
c = block_size * bx + ty;
r = block_size * round + tx;
}
int cell = c * width + r;
if(c >= vert || r >= vert){ //out of bounds, filled in with INF for each element
dist[cell] = INF;
}
__syncthreads();
int low = round*block_size;
int up = low + block_size;
int n;
for( ; low<up ; ++low){
// min(dist[c][r], dist[c][low] + dist[low][r])
n = dist[ c*width+low ] + dist[ low*width+r ];
if(n < dist[cell]){
dist[cell] = n;
}
__syncthreads();
}
}
__global__ void phase_three(int32_t* const dist, int block_size, int round, int width, int vert){
const int tx = threadIdx.x;
const int ty = threadIdx.y;
int bx = blockIdx.x;
int by = blockIdx.y;
if(bx >= round)++bx; //shift x
if(by >= round)++by; //shift y
const int c = block_size * by + ty;
const int r = block_size * bx + tx;
const int cell = c*width + r;
if(c >= vert || r >= vert){ //out of bounds, filled in with INF for each element
dist[cell] = INF;
}
__syncthreads();
int low = round * block_size;
int up = low + block_size;
int n;
for( ; low<up ; ++low){
// min(dist[c][r], dist[c][low] + dist[low][r])
n = dist[ c*width+low ] + dist[ low*width+r ];
if(n < dist[cell]){
dist[cell] = n;
}
__syncthreads();
}
}
extern __shared__ int S[];
void block_FW(){
#ifdef _TIME_MEASURE_
auto start = std::chrono::high_resolution_clock::now();
#endif
int Round = CEIL(vert, block_size);
int padded_size = Round * block_size;
size_t vert_w_bytes = vert * sizeof(int);
size_t padded_w_bytes = padded_size * sizeof(int);
int32_t *device_ptr;
//size_t pitch;
dim3 p2b(Round-1, 2, 1); //phase 2 block
dim3 p3b(Round-1, Round-1, 1); //phase 3 block
dim3 dimt(block_size, block_size, 1); //thread
//cudaMallocPitch(&device_ptr, &pitch, vert_byte, vert_byte, vert);
hipMalloc(&device_ptr, padded_w_bytes * padded_size);
//size_t pitch_int = pitch / sizeof(int);
//LOG("pitch => %zu bytes (%zu words)", pitch, pitch_int);
LOG("the number of blocks: %d", Round);
//dst_ptr, dst_pitch, src, src_pitch, w, h, kind
hipMemcpy2D(device_ptr, padded_w_bytes, data, vert_w_bytes,
vert_w_bytes, vert, hipMemcpyHostToDevice);
for(int r=0; r < Round; ++r){
LOG("Round %d/%d", r+1, Round);
phase_one<<< 1 , dimt >>>(device_ptr, block_size, r, padded_size, vert);
phase_two<<< p2b , dimt >>>(device_ptr, block_size, r, padded_size, vert);
phase_three<<< p3b , dimt >>>(device_ptr, block_size, r, padded_size, vert);
}
hipMemcpy2D(data, vert_w_bytes, device_ptr, padded_w_bytes,
vert_w_bytes, vert, hipMemcpyDeviceToHost);
hipFree(device_ptr);
#ifdef _TIME_MEASURE_
auto end = std::chrono::high_resolution_clock::now();
std::chrono::duration<double> diff = end - start;
double elapsed_time = diff.count() * 1000;
printf("Total time: %f ms (%f GFLOPS)\n", elapsed_time, 2*vert*vert*vert / (elapsed_time * 1e6));
#endif
}
int main(int argc, char **argv){
dump_from_file_and_init(argv[1]);
block_size = std::atoi(argv[3]);
block_FW();
dump_to_file(argv[2]);
finalize();
return 0;
} | .text
.amdgcn_target "amdgcn-amd-amdhsa--gfx1100"
.protected _Z8init_gpui
.globl _Z8init_gpui
.p2align 8
.type _Z8init_gpui,@function
_Z8init_gpui:
s_endpgm
.section .rodata,"a",@progbits
.p2align 6, 0x0
.amdhsa_kernel _Z8init_gpui
.amdhsa_group_segment_fixed_size 0
.amdhsa_private_segment_fixed_size 0
.amdhsa_kernarg_size 4
.amdhsa_user_sgpr_count 15
.amdhsa_user_sgpr_dispatch_ptr 0
.amdhsa_user_sgpr_queue_ptr 0
.amdhsa_user_sgpr_kernarg_segment_ptr 1
.amdhsa_user_sgpr_dispatch_id 0
.amdhsa_user_sgpr_private_segment_size 0
.amdhsa_wavefront_size32 1
.amdhsa_uses_dynamic_stack 0
.amdhsa_enable_private_segment 0
.amdhsa_system_sgpr_workgroup_id_x 1
.amdhsa_system_sgpr_workgroup_id_y 0
.amdhsa_system_sgpr_workgroup_id_z 0
.amdhsa_system_sgpr_workgroup_info 0
.amdhsa_system_vgpr_workitem_id 0
.amdhsa_next_free_vgpr 1
.amdhsa_next_free_sgpr 1
.amdhsa_reserve_vcc 0
.amdhsa_float_round_mode_32 0
.amdhsa_float_round_mode_16_64 0
.amdhsa_float_denorm_mode_32 3
.amdhsa_float_denorm_mode_16_64 3
.amdhsa_dx10_clamp 1
.amdhsa_ieee_mode 1
.amdhsa_fp16_overflow 0
.amdhsa_workgroup_processor_mode 1
.amdhsa_memory_ordered 1
.amdhsa_forward_progress 0
.amdhsa_shared_vgpr_count 0
.amdhsa_exception_fp_ieee_invalid_op 0
.amdhsa_exception_fp_denorm_src 0
.amdhsa_exception_fp_ieee_div_zero 0
.amdhsa_exception_fp_ieee_overflow 0
.amdhsa_exception_fp_ieee_underflow 0
.amdhsa_exception_fp_ieee_inexact 0
.amdhsa_exception_int_div_zero 0
.end_amdhsa_kernel
.text
.Lfunc_end0:
.size _Z8init_gpui, .Lfunc_end0-_Z8init_gpui
.section .AMDGPU.csdata,"",@progbits
.text
.protected _Z9phase_onePiiiii
.globl _Z9phase_onePiiiii
.p2align 8
.type _Z9phase_onePiiiii,@function
_Z9phase_onePiiiii:
s_clause 0x1
s_load_b128 s[4:7], s[0:1], 0x0
s_load_b64 s[0:1], s[0:1], 0x10
v_bfe_u32 v1, v0, 10, 10
v_and_b32_e32 v2, 0x3ff, v0
s_waitcnt lgkmcnt(0)
s_mul_i32 s2, s7, s6
s_delay_alu instid0(VALU_DEP_2) | instid1(SALU_CYCLE_1)
v_add_nc_u32_e32 v1, s2, v1
s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
v_add_nc_u32_e32 v0, s2, v2
v_mul_lo_u32 v3, v1, s0
s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
v_max_i32_e32 v1, v1, v0
v_cmp_le_i32_e32 vcc_lo, s1, v1
s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_1)
v_add_nc_u32_e32 v0, v3, v0
v_ashrrev_i32_e32 v1, 31, v0
s_and_saveexec_b32 s1, vcc_lo
s_cbranch_execz .LBB1_2
s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_2)
v_lshlrev_b64 v[4:5], 2, v[0:1]
v_mov_b32_e32 v6, 0x3b9aca00
v_add_co_u32 v4, vcc_lo, s4, v4
s_delay_alu instid0(VALU_DEP_3)
v_add_co_ci_u32_e32 v5, vcc_lo, s5, v5, vcc_lo
global_store_b32 v[4:5], v6, off
.LBB1_2:
s_or_b32 exec_lo, exec_lo, s1
s_cmp_lt_i32 s6, 1
s_waitcnt_vscnt null, 0x0
s_barrier
buffer_gl0_inv
s_cbranch_scc1 .LBB1_7
v_add_nc_u32_e32 v3, s2, v3
v_lshlrev_b64 v[5:6], 2, v[0:1]
s_add_i32 s1, s0, 1
s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_3)
v_ashrrev_i32_e32 v4, 31, v3
v_mad_u64_u32 v[0:1], null, s2, s1, v[2:3]
v_add_co_u32 v2, vcc_lo, s4, v5
s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_2) | instid1(VALU_DEP_2)
v_lshlrev_b64 v[7:8], 2, v[3:4]
v_add_co_ci_u32_e32 v3, vcc_lo, s5, v6, vcc_lo
s_add_i32 s1, s2, s6
v_add_co_u32 v4, vcc_lo, s4, v7
s_delay_alu instid0(VALU_DEP_3)
v_add_co_ci_u32_e32 v5, vcc_lo, s5, v8, vcc_lo
s_set_inst_prefetch_distance 0x1
s_branch .LBB1_5
.p2align 6
.LBB1_4:
s_or_b32 exec_lo, exec_lo, s3
v_add_co_u32 v4, vcc_lo, v4, 4
v_add_nc_u32_e32 v0, s0, v0
v_add_co_ci_u32_e32 v5, vcc_lo, 0, v5, vcc_lo
s_add_i32 s2, s2, 1
s_waitcnt_vscnt null, 0x0
s_cmp_lt_i32 s2, s1
s_barrier
buffer_gl0_inv
s_cbranch_scc0 .LBB1_7
.LBB1_5:
v_ashrrev_i32_e32 v1, 31, v0
s_mov_b32 s3, exec_lo
s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
v_lshlrev_b64 v[6:7], 2, v[0:1]
v_add_co_u32 v6, vcc_lo, s4, v6
s_delay_alu instid0(VALU_DEP_2)
v_add_co_ci_u32_e32 v7, vcc_lo, s5, v7, vcc_lo
global_load_b32 v1, v[4:5], off
s_clause 0x1
global_load_b32 v6, v[6:7], off
global_load_b32 v7, v[2:3], off
s_waitcnt vmcnt(1)
v_add_nc_u32_e32 v1, v6, v1
s_waitcnt vmcnt(0)
s_delay_alu instid0(VALU_DEP_1)
v_cmpx_lt_i32_e64 v1, v7
s_cbranch_execz .LBB1_4
global_store_b32 v[2:3], v1, off
s_branch .LBB1_4
.LBB1_7:
s_set_inst_prefetch_distance 0x2
s_endpgm
.section .rodata,"a",@progbits
.p2align 6, 0x0
.amdhsa_kernel _Z9phase_onePiiiii
.amdhsa_group_segment_fixed_size 0
.amdhsa_private_segment_fixed_size 0
.amdhsa_kernarg_size 24
.amdhsa_user_sgpr_count 15
.amdhsa_user_sgpr_dispatch_ptr 0
.amdhsa_user_sgpr_queue_ptr 0
.amdhsa_user_sgpr_kernarg_segment_ptr 1
.amdhsa_user_sgpr_dispatch_id 0
.amdhsa_user_sgpr_private_segment_size 0
.amdhsa_wavefront_size32 1
.amdhsa_uses_dynamic_stack 0
.amdhsa_enable_private_segment 0
.amdhsa_system_sgpr_workgroup_id_x 1
.amdhsa_system_sgpr_workgroup_id_y 0
.amdhsa_system_sgpr_workgroup_id_z 0
.amdhsa_system_sgpr_workgroup_info 0
.amdhsa_system_vgpr_workitem_id 1
.amdhsa_next_free_vgpr 9
.amdhsa_next_free_sgpr 8
.amdhsa_float_round_mode_32 0
.amdhsa_float_round_mode_16_64 0
.amdhsa_float_denorm_mode_32 3
.amdhsa_float_denorm_mode_16_64 3
.amdhsa_dx10_clamp 1
.amdhsa_ieee_mode 1
.amdhsa_fp16_overflow 0
.amdhsa_workgroup_processor_mode 1
.amdhsa_memory_ordered 1
.amdhsa_forward_progress 0
.amdhsa_shared_vgpr_count 0
.amdhsa_exception_fp_ieee_invalid_op 0
.amdhsa_exception_fp_denorm_src 0
.amdhsa_exception_fp_ieee_div_zero 0
.amdhsa_exception_fp_ieee_overflow 0
.amdhsa_exception_fp_ieee_underflow 0
.amdhsa_exception_fp_ieee_inexact 0
.amdhsa_exception_int_div_zero 0
.end_amdhsa_kernel
.text
.Lfunc_end1:
.size _Z9phase_onePiiiii, .Lfunc_end1-_Z9phase_onePiiiii
.section .AMDGPU.csdata,"",@progbits
.text
.protected _Z9phase_twoPiiiii
.globl _Z9phase_twoPiiiii
.p2align 8
.type _Z9phase_twoPiiiii,@function
_Z9phase_twoPiiiii:
s_clause 0x1
s_load_b128 s[4:7], s[0:1], 0x0
s_load_b64 s[0:1], s[0:1], 0x10
v_bfe_u32 v1, v0, 10, 10
s_waitcnt lgkmcnt(0)
s_cmp_ge_i32 s14, s7
s_cselect_b32 s2, -1, 0
s_delay_alu instid0(SALU_CYCLE_1)
s_cmp_lg_u32 s2, 0
s_addc_u32 s2, s14, 0
s_cmp_eq_u32 s15, 0
s_cselect_b32 s3, s7, s2
s_cselect_b32 s2, s2, s7
v_mad_u64_u32 v[4:5], null, s3, s6, v[1:2]
v_and_b32_e32 v2, 0x3ff, v0
s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_3)
v_mad_u64_u32 v[0:1], null, s2, s6, v[2:3]
v_mul_lo_u32 v3, v4, s0
s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
v_max_i32_e32 v1, v4, v0
v_add_nc_u32_e32 v0, v3, v0
s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
v_cmp_le_i32_e32 vcc_lo, s1, v1
v_ashrrev_i32_e32 v1, 31, v0
s_and_saveexec_b32 s1, vcc_lo
s_cbranch_execz .LBB2_2
s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_2)
v_lshlrev_b64 v[4:5], 2, v[0:1]
v_mov_b32_e32 v6, 0x3b9aca00
v_add_co_u32 v4, vcc_lo, s4, v4
s_delay_alu instid0(VALU_DEP_3)
v_add_co_ci_u32_e32 v5, vcc_lo, s5, v5, vcc_lo
global_store_b32 v[4:5], v6, off
.LBB2_2:
s_or_b32 exec_lo, exec_lo, s1
s_cmp_lt_i32 s6, 1
s_waitcnt_vscnt null, 0x0
s_barrier
buffer_gl0_inv
s_cbranch_scc1 .LBB2_7
s_mul_i32 s1, s7, s6
v_lshlrev_b64 v[5:6], 2, v[0:1]
v_add_nc_u32_e32 v3, s1, v3
s_mul_i32 s3, s0, s7
s_delay_alu instid0(SALU_CYCLE_1) | instskip(NEXT) | instid1(VALU_DEP_1)
s_add_i32 s2, s2, s3
v_ashrrev_i32_e32 v4, 31, v3
v_mad_u64_u32 v[0:1], null, s6, s2, v[2:3]
v_add_co_u32 v2, vcc_lo, s4, v5
s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_2) | instid1(VALU_DEP_2)
v_lshlrev_b64 v[7:8], 2, v[3:4]
v_add_co_ci_u32_e32 v3, vcc_lo, s5, v6, vcc_lo
s_add_i32 s2, s1, s6
v_add_co_u32 v4, vcc_lo, s4, v7
s_delay_alu instid0(VALU_DEP_3)
v_add_co_ci_u32_e32 v5, vcc_lo, s5, v8, vcc_lo
s_set_inst_prefetch_distance 0x1
s_branch .LBB2_5
.p2align 6
.LBB2_4:
s_or_b32 exec_lo, exec_lo, s3
v_add_co_u32 v4, vcc_lo, v4, 4
v_add_nc_u32_e32 v0, s0, v0
v_add_co_ci_u32_e32 v5, vcc_lo, 0, v5, vcc_lo
s_add_i32 s1, s1, 1
s_waitcnt_vscnt null, 0x0
s_cmp_lt_i32 s1, s2
s_barrier
buffer_gl0_inv
s_cbranch_scc0 .LBB2_7
.LBB2_5:
v_ashrrev_i32_e32 v1, 31, v0
s_mov_b32 s3, exec_lo
s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
v_lshlrev_b64 v[6:7], 2, v[0:1]
v_add_co_u32 v6, vcc_lo, s4, v6
s_delay_alu instid0(VALU_DEP_2)
v_add_co_ci_u32_e32 v7, vcc_lo, s5, v7, vcc_lo
global_load_b32 v1, v[4:5], off
s_clause 0x1
global_load_b32 v6, v[6:7], off
global_load_b32 v7, v[2:3], off
s_waitcnt vmcnt(1)
v_add_nc_u32_e32 v1, v6, v1
s_waitcnt vmcnt(0)
s_delay_alu instid0(VALU_DEP_1)
v_cmpx_lt_i32_e64 v1, v7
s_cbranch_execz .LBB2_4
global_store_b32 v[2:3], v1, off
s_branch .LBB2_4
.LBB2_7:
s_set_inst_prefetch_distance 0x2
s_endpgm
.section .rodata,"a",@progbits
.p2align 6, 0x0
.amdhsa_kernel _Z9phase_twoPiiiii
.amdhsa_group_segment_fixed_size 0
.amdhsa_private_segment_fixed_size 0
.amdhsa_kernarg_size 24
.amdhsa_user_sgpr_count 14
.amdhsa_user_sgpr_dispatch_ptr 0
.amdhsa_user_sgpr_queue_ptr 0
.amdhsa_user_sgpr_kernarg_segment_ptr 1
.amdhsa_user_sgpr_dispatch_id 0
.amdhsa_user_sgpr_private_segment_size 0
.amdhsa_wavefront_size32 1
.amdhsa_uses_dynamic_stack 0
.amdhsa_enable_private_segment 0
.amdhsa_system_sgpr_workgroup_id_x 1
.amdhsa_system_sgpr_workgroup_id_y 1
.amdhsa_system_sgpr_workgroup_id_z 0
.amdhsa_system_sgpr_workgroup_info 0
.amdhsa_system_vgpr_workitem_id 1
.amdhsa_next_free_vgpr 9
.amdhsa_next_free_sgpr 16
.amdhsa_float_round_mode_32 0
.amdhsa_float_round_mode_16_64 0
.amdhsa_float_denorm_mode_32 3
.amdhsa_float_denorm_mode_16_64 3
.amdhsa_dx10_clamp 1
.amdhsa_ieee_mode 1
.amdhsa_fp16_overflow 0
.amdhsa_workgroup_processor_mode 1
.amdhsa_memory_ordered 1
.amdhsa_forward_progress 0
.amdhsa_shared_vgpr_count 0
.amdhsa_exception_fp_ieee_invalid_op 0
.amdhsa_exception_fp_denorm_src 0
.amdhsa_exception_fp_ieee_div_zero 0
.amdhsa_exception_fp_ieee_overflow 0
.amdhsa_exception_fp_ieee_underflow 0
.amdhsa_exception_fp_ieee_inexact 0
.amdhsa_exception_int_div_zero 0
.end_amdhsa_kernel
.text
.Lfunc_end2:
.size _Z9phase_twoPiiiii, .Lfunc_end2-_Z9phase_twoPiiiii
.section .AMDGPU.csdata,"",@progbits
.text
.protected _Z11phase_threePiiiii
.globl _Z11phase_threePiiiii
.p2align 8
.type _Z11phase_threePiiiii,@function
_Z11phase_threePiiiii:
s_clause 0x1
s_load_b128 s[4:7], s[0:1], 0x0
s_load_b64 s[0:1], s[0:1], 0x10
v_bfe_u32 v1, v0, 10, 10
v_and_b32_e32 v0, 0x3ff, v0
s_waitcnt lgkmcnt(0)
s_cmp_ge_i32 s14, s7
s_cselect_b32 s2, -1, 0
s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_4) | instid1(SALU_CYCLE_1)
s_cmp_lg_u32 s2, 0
s_addc_u32 s3, s14, 0
s_cmp_ge_i32 s15, s7
v_mad_u64_u32 v[4:5], null, s3, s6, v[0:1]
s_cselect_b32 s8, -1, 0
s_cmp_lg_u32 s8, 0
s_addc_u32 s8, s15, 0
s_delay_alu instid0(SALU_CYCLE_1) | instskip(NEXT) | instid1(VALU_DEP_1)
v_mad_u64_u32 v[2:3], null, s8, s6, v[1:2]
v_mul_lo_u32 v3, v2, s0
s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_1)
v_max_i32_e32 v2, v2, v4
v_cmp_le_i32_e32 vcc_lo, s1, v2
s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_1)
v_add_nc_u32_e32 v1, v3, v4
v_ashrrev_i32_e32 v2, 31, v1
s_and_saveexec_b32 s1, vcc_lo
s_cbranch_execz .LBB3_2
s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_2)
v_lshlrev_b64 v[4:5], 2, v[1:2]
v_mov_b32_e32 v6, 0x3b9aca00
v_add_co_u32 v4, vcc_lo, s4, v4
s_delay_alu instid0(VALU_DEP_3)
v_add_co_ci_u32_e32 v5, vcc_lo, s5, v5, vcc_lo
global_store_b32 v[4:5], v6, off
.LBB3_2:
s_or_b32 exec_lo, exec_lo, s1
s_cmp_lt_i32 s6, 1
s_waitcnt_vscnt null, 0x0
s_barrier
buffer_gl0_inv
s_cbranch_scc1 .LBB3_7
s_mul_i32 s1, s7, s6
v_lshlrev_b64 v[1:2], 2, v[1:2]
v_add_nc_u32_e32 v3, s1, v3
v_cndmask_b32_e64 v5, 0, 1, s2
s_mul_i32 s2, s0, s7
s_delay_alu instid0(SALU_CYCLE_1) | instskip(NEXT) | instid1(VALU_DEP_2)
s_add_i32 s14, s14, s2
v_ashrrev_i32_e32 v4, 31, v3
s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_2) | instid1(VALU_DEP_4)
v_add_nc_u32_e32 v7, s14, v5
v_add_co_u32 v1, vcc_lo, s4, v1
v_add_co_ci_u32_e32 v2, vcc_lo, s5, v2, vcc_lo
v_lshlrev_b64 v[5:6], 2, v[3:4]
s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_1) | instid1(VALU_DEP_2)
v_mad_u64_u32 v[3:4], null, s6, v7, v[0:1]
s_add_i32 s2, s1, s6
v_add_co_u32 v5, vcc_lo, s4, v5
s_delay_alu instid0(VALU_DEP_3)
v_add_co_ci_u32_e32 v6, vcc_lo, s5, v6, vcc_lo
s_set_inst_prefetch_distance 0x1
s_branch .LBB3_5
.p2align 6
.LBB3_4:
s_or_b32 exec_lo, exec_lo, s3
v_add_co_u32 v5, vcc_lo, v5, 4
v_add_nc_u32_e32 v3, s0, v3
v_add_co_ci_u32_e32 v6, vcc_lo, 0, v6, vcc_lo
s_add_i32 s1, s1, 1
s_waitcnt_vscnt null, 0x0
s_cmp_lt_i32 s1, s2
s_barrier
buffer_gl0_inv
s_cbranch_scc0 .LBB3_7
.LBB3_5:
s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_1) | instid1(VALU_DEP_1)
v_ashrrev_i32_e32 v4, 31, v3
s_mov_b32 s3, exec_lo
v_lshlrev_b64 v[7:8], 2, v[3:4]
s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_2)
v_add_co_u32 v7, vcc_lo, s4, v7
v_add_co_ci_u32_e32 v8, vcc_lo, s5, v8, vcc_lo
global_load_b32 v0, v[5:6], off
s_clause 0x1
global_load_b32 v4, v[7:8], off
global_load_b32 v7, v[1:2], off
s_waitcnt vmcnt(1)
v_add_nc_u32_e32 v0, v4, v0
s_waitcnt vmcnt(0)
s_delay_alu instid0(VALU_DEP_1)
v_cmpx_lt_i32_e64 v0, v7
s_cbranch_execz .LBB3_4
global_store_b32 v[1:2], v0, off
s_branch .LBB3_4
.LBB3_7:
s_set_inst_prefetch_distance 0x2
s_endpgm
.section .rodata,"a",@progbits
.p2align 6, 0x0
.amdhsa_kernel _Z11phase_threePiiiii
.amdhsa_group_segment_fixed_size 0
.amdhsa_private_segment_fixed_size 0
.amdhsa_kernarg_size 24
.amdhsa_user_sgpr_count 14
.amdhsa_user_sgpr_dispatch_ptr 0
.amdhsa_user_sgpr_queue_ptr 0
.amdhsa_user_sgpr_kernarg_segment_ptr 1
.amdhsa_user_sgpr_dispatch_id 0
.amdhsa_user_sgpr_private_segment_size 0
.amdhsa_wavefront_size32 1
.amdhsa_uses_dynamic_stack 0
.amdhsa_enable_private_segment 0
.amdhsa_system_sgpr_workgroup_id_x 1
.amdhsa_system_sgpr_workgroup_id_y 1
.amdhsa_system_sgpr_workgroup_id_z 0
.amdhsa_system_sgpr_workgroup_info 0
.amdhsa_system_vgpr_workitem_id 1
.amdhsa_next_free_vgpr 9
.amdhsa_next_free_sgpr 16
.amdhsa_float_round_mode_32 0
.amdhsa_float_round_mode_16_64 0
.amdhsa_float_denorm_mode_32 3
.amdhsa_float_denorm_mode_16_64 3
.amdhsa_dx10_clamp 1
.amdhsa_ieee_mode 1
.amdhsa_fp16_overflow 0
.amdhsa_workgroup_processor_mode 1
.amdhsa_memory_ordered 1
.amdhsa_forward_progress 0
.amdhsa_shared_vgpr_count 0
.amdhsa_exception_fp_ieee_invalid_op 0
.amdhsa_exception_fp_denorm_src 0
.amdhsa_exception_fp_ieee_div_zero 0
.amdhsa_exception_fp_ieee_overflow 0
.amdhsa_exception_fp_ieee_underflow 0
.amdhsa_exception_fp_ieee_inexact 0
.amdhsa_exception_int_div_zero 0
.end_amdhsa_kernel
.text
.Lfunc_end3:
.size _Z11phase_threePiiiii, .Lfunc_end3-_Z11phase_threePiiiii
.section .AMDGPU.csdata,"",@progbits
.text
.p2alignl 7, 3214868480
.fill 96, 4, 3214868480
.type __hip_cuid_,@object
.section .bss,"aw",@nobits
.globl __hip_cuid_
__hip_cuid_:
.byte 0
.size __hip_cuid_, 1
.ident "AMD clang version 18.0.0git (https://github.com/RadeonOpenCompute/llvm-project roc-6.3.2 25012 e5bf7e55c91490b07c49d8960fa7983d864936c4)"
.section ".note.GNU-stack","",@progbits
.addrsig
.addrsig_sym __hip_cuid_
.amdgpu_metadata
---
amdhsa.kernels:
- .args:
- .offset: 0
.size: 4
.value_kind: by_value
.group_segment_fixed_size: 0
.kernarg_segment_align: 4
.kernarg_segment_size: 4
.language: OpenCL C
.language_version:
- 2
- 0
.max_flat_workgroup_size: 1024
.name: _Z8init_gpui
.private_segment_fixed_size: 0
.sgpr_count: 0
.sgpr_spill_count: 0
.symbol: _Z8init_gpui.kd
.uniform_work_group_size: 1
.uses_dynamic_stack: false
.vgpr_count: 0
.vgpr_spill_count: 0
.wavefront_size: 32
.workgroup_processor_mode: 1
- .args:
- .address_space: global
.offset: 0
.size: 8
.value_kind: global_buffer
- .offset: 8
.size: 4
.value_kind: by_value
- .offset: 12
.size: 4
.value_kind: by_value
- .offset: 16
.size: 4
.value_kind: by_value
- .offset: 20
.size: 4
.value_kind: by_value
.group_segment_fixed_size: 0
.kernarg_segment_align: 8
.kernarg_segment_size: 24
.language: OpenCL C
.language_version:
- 2
- 0
.max_flat_workgroup_size: 1024
.name: _Z9phase_onePiiiii
.private_segment_fixed_size: 0
.sgpr_count: 10
.sgpr_spill_count: 0
.symbol: _Z9phase_onePiiiii.kd
.uniform_work_group_size: 1
.uses_dynamic_stack: false
.vgpr_count: 9
.vgpr_spill_count: 0
.wavefront_size: 32
.workgroup_processor_mode: 1
- .args:
- .address_space: global
.offset: 0
.size: 8
.value_kind: global_buffer
- .offset: 8
.size: 4
.value_kind: by_value
- .offset: 12
.size: 4
.value_kind: by_value
- .offset: 16
.size: 4
.value_kind: by_value
- .offset: 20
.size: 4
.value_kind: by_value
.group_segment_fixed_size: 0
.kernarg_segment_align: 8
.kernarg_segment_size: 24
.language: OpenCL C
.language_version:
- 2
- 0
.max_flat_workgroup_size: 1024
.name: _Z9phase_twoPiiiii
.private_segment_fixed_size: 0
.sgpr_count: 18
.sgpr_spill_count: 0
.symbol: _Z9phase_twoPiiiii.kd
.uniform_work_group_size: 1
.uses_dynamic_stack: false
.vgpr_count: 9
.vgpr_spill_count: 0
.wavefront_size: 32
.workgroup_processor_mode: 1
- .args:
- .address_space: global
.offset: 0
.size: 8
.value_kind: global_buffer
- .offset: 8
.size: 4
.value_kind: by_value
- .offset: 12
.size: 4
.value_kind: by_value
- .offset: 16
.size: 4
.value_kind: by_value
- .offset: 20
.size: 4
.value_kind: by_value
.group_segment_fixed_size: 0
.kernarg_segment_align: 8
.kernarg_segment_size: 24
.language: OpenCL C
.language_version:
- 2
- 0
.max_flat_workgroup_size: 1024
.name: _Z11phase_threePiiiii
.private_segment_fixed_size: 0
.sgpr_count: 18
.sgpr_spill_count: 0
.symbol: _Z11phase_threePiiiii.kd
.uniform_work_group_size: 1
.uses_dynamic_stack: false
.vgpr_count: 9
.vgpr_spill_count: 0
.wavefront_size: 32
.workgroup_processor_mode: 1
amdhsa.target: amdgcn-amd-amdhsa--gfx1100
amdhsa.version:
- 1
- 2
...
.end_amdgpu_metadata |
You are a helpful coding assistant specialized in converting HIP source code to AMD host assembly. | #include <iostream>
#include <string>
#include <sstream>
#include <fstream>
#include <algorithm>
#include <chrono>
#include <stdio.h>
#include <stdlib.h>
#include <stdarg.h>
#include <hip/hip_runtime.h>
#include <unistd.h>
//#define _DEBUG_
//#define _TIME_MEASURE_
#ifdef _DEBUG_
#include <string>
#include <sstream>
int __print_step = 0;
void __pt_log(const char *h_, const char *f_, ...){
std::stringstream ss;
ss << h_ << f_ << '\n';
std::string format = ss.str();
va_list va;
va_start(va, f_);
vprintf(format.c_str(), va);
va_end(va);
__print_step++;
}
#define VA_ARGS(...) , ##__VA_ARGS__
#define LOG(f_, ...) __pt_log(\
"[LOG] Step %3d: ", (f_), \
__print_step VA_ARGS(__VA_ARGS__))
#else
#define LOG(f_, ...)
#endif
#define INF 1000000000
#define CEIL(a, b) (( (a) - 1 ) / (b) + 1 )
int **Dist;
int *data;
int block_size;
int vert, edge;
int vert2;
inline void init(){
vert2 = vert*vert;
Dist = new int*[vert];
data = new int[vert2];
std::fill(data, data + vert2, INF);
for(int i=0;i<vert;++i){
Dist[i] = data + i*vert;
Dist[i][i] = 0;
}
if(vert < block_size){
block_size = vert;
}
}
inline void finalize(){
delete[] Dist;
delete[] data;
}
void dump_from_file_and_init(const char *file){
std::ifstream fin(file);
std::stringstream ss;
ss << fin.rdbuf();
ss >> vert >> edge;
LOG("vert: %d, edge: %d", vert, edge);
init();
int i, j, w;
while(--edge >=0){
ss >> i >> j >> w;
Dist[i][j] = w;
}
fin.close();
}
void dump_to_file(const char *file){
std::ofstream fout(file);
fout.write((char*)data, sizeof(int)*vert2);
fout.close();
}
__global__ void init_gpu(int reps){
int idx = blockIdx.x * blockDim.x + threadIdx.x;
if(idx >= reps) return;
}
__global__ void phase_one(int32_t* const dist, int block_size, int round, int width, int vert){
const int tx = threadIdx.x;
const int ty = threadIdx.y;
const int c = block_size * round + ty;
const int r = block_size * round + tx;
const int cell = c*width+r;
if(c >= vert || r >= vert){ //out of bounds, filled in with INF for each element
dist[cell] = INF;
}
__syncthreads();
int low = block_size * round;
int up = low + block_size;
int n;
for( ; low<up ; ++low){
// min(dist[c][r], dist[c][low] + dist[low][r])
n = dist[ c*width+low ] + dist[ low*width+r ];
if(n < dist[cell]){
dist[cell] = n;
}
__syncthreads();
}
}
__global__ void phase_two(int32_t* const dist, int block_size, int round, int width, int vert){
const int tx = threadIdx.x;
const int ty = threadIdx.y;
int bx = blockIdx.x;
int by = blockIdx.y;
int c;
int r;
if(bx >= round)++bx; //shift
if(by == 0){ //horizontal
c = block_size * round + ty;
r = block_size * bx + tx;
}else{ //vertical
c = block_size * bx + ty;
r = block_size * round + tx;
}
int cell = c * width + r;
if(c >= vert || r >= vert){ //out of bounds, filled in with INF for each element
dist[cell] = INF;
}
__syncthreads();
int low = round*block_size;
int up = low + block_size;
int n;
for( ; low<up ; ++low){
// min(dist[c][r], dist[c][low] + dist[low][r])
n = dist[ c*width+low ] + dist[ low*width+r ];
if(n < dist[cell]){
dist[cell] = n;
}
__syncthreads();
}
}
__global__ void phase_three(int32_t* const dist, int block_size, int round, int width, int vert){
const int tx = threadIdx.x;
const int ty = threadIdx.y;
int bx = blockIdx.x;
int by = blockIdx.y;
if(bx >= round)++bx; //shift x
if(by >= round)++by; //shift y
const int c = block_size * by + ty;
const int r = block_size * bx + tx;
const int cell = c*width + r;
if(c >= vert || r >= vert){ //out of bounds, filled in with INF for each element
dist[cell] = INF;
}
__syncthreads();
int low = round * block_size;
int up = low + block_size;
int n;
for( ; low<up ; ++low){
// min(dist[c][r], dist[c][low] + dist[low][r])
n = dist[ c*width+low ] + dist[ low*width+r ];
if(n < dist[cell]){
dist[cell] = n;
}
__syncthreads();
}
}
extern __shared__ int S[];
void block_FW(){
#ifdef _TIME_MEASURE_
auto start = std::chrono::high_resolution_clock::now();
#endif
int Round = CEIL(vert, block_size);
int padded_size = Round * block_size;
size_t vert_w_bytes = vert * sizeof(int);
size_t padded_w_bytes = padded_size * sizeof(int);
int32_t *device_ptr;
//size_t pitch;
dim3 p2b(Round-1, 2, 1); //phase 2 block
dim3 p3b(Round-1, Round-1, 1); //phase 3 block
dim3 dimt(block_size, block_size, 1); //thread
//cudaMallocPitch(&device_ptr, &pitch, vert_byte, vert_byte, vert);
hipMalloc(&device_ptr, padded_w_bytes * padded_size);
//size_t pitch_int = pitch / sizeof(int);
//LOG("pitch => %zu bytes (%zu words)", pitch, pitch_int);
LOG("the number of blocks: %d", Round);
//dst_ptr, dst_pitch, src, src_pitch, w, h, kind
hipMemcpy2D(device_ptr, padded_w_bytes, data, vert_w_bytes,
vert_w_bytes, vert, hipMemcpyHostToDevice);
for(int r=0; r < Round; ++r){
LOG("Round %d/%d", r+1, Round);
phase_one<<< 1 , dimt >>>(device_ptr, block_size, r, padded_size, vert);
phase_two<<< p2b , dimt >>>(device_ptr, block_size, r, padded_size, vert);
phase_three<<< p3b , dimt >>>(device_ptr, block_size, r, padded_size, vert);
}
hipMemcpy2D(data, vert_w_bytes, device_ptr, padded_w_bytes,
vert_w_bytes, vert, hipMemcpyDeviceToHost);
hipFree(device_ptr);
#ifdef _TIME_MEASURE_
auto end = std::chrono::high_resolution_clock::now();
std::chrono::duration<double> diff = end - start;
double elapsed_time = diff.count() * 1000;
printf("Total time: %f ms (%f GFLOPS)\n", elapsed_time, 2*vert*vert*vert / (elapsed_time * 1e6));
#endif
}
int main(int argc, char **argv){
dump_from_file_and_init(argv[1]);
block_size = std::atoi(argv[3]);
block_FW();
dump_to_file(argv[2]);
finalize();
return 0;
} | .text
.file "HW4_cuda_000_orig.hip"
# Start of file scope inline assembly
.globl _ZSt21ios_base_library_initv
# End of file scope inline assembly
.globl _Z23dump_from_file_and_initPKc # -- Begin function _Z23dump_from_file_and_initPKc
.p2align 4, 0x90
.type _Z23dump_from_file_and_initPKc,@function
_Z23dump_from_file_and_initPKc: # @_Z23dump_from_file_and_initPKc
.Lfunc_begin0:
.cfi_startproc
.cfi_personality 3, __gxx_personality_v0
.cfi_lsda 3, .Lexception0
# %bb.0:
pushq %rbp
.cfi_def_cfa_offset 16
pushq %r15
.cfi_def_cfa_offset 24
pushq %r14
.cfi_def_cfa_offset 32
pushq %r13
.cfi_def_cfa_offset 40
pushq %r12
.cfi_def_cfa_offset 48
pushq %rbx
.cfi_def_cfa_offset 56
subq $936, %rsp # imm = 0x3A8
.cfi_def_cfa_offset 992
.cfi_offset %rbx, -56
.cfi_offset %r12, -48
.cfi_offset %r13, -40
.cfi_offset %r14, -32
.cfi_offset %r15, -24
.cfi_offset %rbp, -16
movq %rdi, %rsi
leaq 416(%rsp), %rdi
movl $8, %edx
callq _ZNSt14basic_ifstreamIcSt11char_traitsIcEEC1EPKcSt13_Ios_Openmode
.Ltmp0:
leaq 24(%rsp), %rdi
callq _ZNSt7__cxx1118basic_stringstreamIcSt11char_traitsIcESaIcEEC1Ev
.Ltmp1:
# %bb.1:
leaq 40(%rsp), %rdi
leaq 432(%rsp), %rbx
.Ltmp3:
movq %rbx, %rsi
callq _ZNSolsEPSt15basic_streambufIcSt11char_traitsIcEE
.Ltmp4:
# %bb.2:
.Ltmp5:
leaq 24(%rsp), %rdi
movl $vert, %esi
callq _ZNSirsERi
.Ltmp6:
# %bb.3:
.Ltmp7:
movl $edge, %esi
movq %rax, %rdi
callq _ZNSirsERi
.Ltmp8:
# %bb.4:
movslq vert(%rip), %r15
movl %r15d, %ebp
imull %r15d, %ebp
leaq (,%r15,8), %rax
testq %r15, %r15
movl %ebp, vert2(%rip)
movq $-1, %rdi
cmovnsq %rax, %rdi
.Ltmp9:
callq _Znam
.Ltmp10:
# %bb.5: # %.noexc
movq %rax, Dist(%rip)
movl %ebp, %r14d
shlq $2, %r14
.Ltmp11:
movq %r14, %rdi
callq _Znam
.Ltmp12:
# %bb.6: # %.noexc6
movq %rax, data(%rip)
testl %r15d, %r15d
je .LBB0_9
# %bb.7: # %.lr.ph.i.i.i.i.preheader
xorl %ecx, %ecx
.p2align 4, 0x90
.LBB0_8: # %.lr.ph.i.i.i.i
# =>This Inner Loop Header: Depth=1
movl $1000000000, (%rax,%rcx) # imm = 0x3B9ACA00
addq $4, %rcx
cmpq %rcx, %r14
jne .LBB0_8
.LBB0_9: # %_ZSt4fillIPiiEvT_S1_RKT0_.exit.i
testl %r15d, %r15d
jle .LBB0_12
# %bb.10: # %.lr.ph.i.preheader
xorl %eax, %eax
.p2align 4, 0x90
.LBB0_11: # %.lr.ph.i
# =>This Inner Loop Header: Depth=1
movl %eax, %ecx
imull %r15d, %ecx
movslq %ecx, %rcx
shlq $2, %rcx
addq data(%rip), %rcx
movq Dist(%rip), %rdx
movq %rcx, (%rdx,%rax,8)
movq Dist(%rip), %rcx
movq (%rcx,%rax,8), %rcx
movl $0, (%rcx,%rax,4)
incq %rax
movslq vert(%rip), %r15
cmpq %r15, %rax
jl .LBB0_11
.LBB0_12: # %._crit_edge.i
cmpl block_size(%rip), %r15d
jge .LBB0_14
# %bb.13:
movl %r15d, block_size(%rip)
.LBB0_14: # %_Z4initv.exit
movl edge(%rip), %eax
leal -1(%rax), %ecx
movl %ecx, edge(%rip)
testl %eax, %eax
jle .LBB0_20
# %bb.15: # %.lr.ph.preheader
leaq 24(%rsp), %r14
leaq 20(%rsp), %r15
leaq 16(%rsp), %r12
leaq 12(%rsp), %r13
.p2align 4, 0x90
.LBB0_16: # %.lr.ph
# =>This Inner Loop Header: Depth=1
.Ltmp14:
movq %r14, %rdi
movq %r15, %rsi
callq _ZNSirsERi
.Ltmp15:
# %bb.17: # in Loop: Header=BB0_16 Depth=1
.Ltmp16:
movq %rax, %rdi
movq %r12, %rsi
callq _ZNSirsERi
.Ltmp17:
# %bb.18: # in Loop: Header=BB0_16 Depth=1
.Ltmp18:
movq %rax, %rdi
movq %r13, %rsi
callq _ZNSirsERi
.Ltmp19:
# %bb.19: # in Loop: Header=BB0_16 Depth=1
movl 12(%rsp), %eax
movq Dist(%rip), %rcx
movslq 20(%rsp), %rdx
movq (%rcx,%rdx,8), %rcx
movslq 16(%rsp), %rdx
movl %eax, (%rcx,%rdx,4)
movl edge(%rip), %eax
leal -1(%rax), %ecx
movl %ecx, edge(%rip)
testl %eax, %eax
jg .LBB0_16
.LBB0_20: # %._crit_edge
.Ltmp21:
movq %rbx, %rdi
callq _ZNSt13basic_filebufIcSt11char_traitsIcEE5closeEv
.Ltmp22:
# %bb.21: # %.noexc7
testq %rax, %rax
jne .LBB0_23
# %bb.22:
movq 416(%rsp), %rax
movq -24(%rax), %rax
leaq (%rsp,%rax), %rdi
addq $416, %rdi # imm = 0x1A0
movl 448(%rsp,%rax), %esi
orl $4, %esi
.Ltmp23:
callq _ZNSt9basic_iosIcSt11char_traitsIcEE5clearESt12_Ios_Iostate
.Ltmp24:
.LBB0_23: # %_ZNSt14basic_ifstreamIcSt11char_traitsIcEE5closeEv.exit
movq _ZTTNSt7__cxx1118basic_stringstreamIcSt11char_traitsIcESaIcEEE(%rip), %rax
movq %rax, 24(%rsp)
movq _ZTTNSt7__cxx1118basic_stringstreamIcSt11char_traitsIcESaIcEEE+64(%rip), %rcx
movq -24(%rax), %rax
movq %rcx, 24(%rsp,%rax)
movq _ZTTNSt7__cxx1118basic_stringstreamIcSt11char_traitsIcESaIcEEE+72(%rip), %rax
movq %rax, 40(%rsp)
movq $_ZTVNSt7__cxx1115basic_stringbufIcSt11char_traitsIcESaIcEEE+16, 48(%rsp)
movq 120(%rsp), %rdi
leaq 136(%rsp), %rax
cmpq %rax, %rdi
je .LBB0_25
# %bb.24: # %.critedge.i.i.i.i.i
callq _ZdlPv
.LBB0_25: # %_ZNSt7__cxx1118basic_stringstreamIcSt11char_traitsIcESaIcEED1Ev.exit
movq $_ZTVSt15basic_streambufIcSt11char_traitsIcEE+16, 48(%rsp)
leaq 104(%rsp), %rdi
callq _ZNSt6localeD1Ev
movq _ZTTNSt7__cxx1118basic_stringstreamIcSt11char_traitsIcESaIcEEE+16(%rip), %rax
movq %rax, 24(%rsp)
movq _ZTTNSt7__cxx1118basic_stringstreamIcSt11char_traitsIcESaIcEEE+24(%rip), %rcx
movq -24(%rax), %rax
movq %rcx, 24(%rsp,%rax)
movq $0, 32(%rsp)
leaq 152(%rsp), %rdi
callq _ZNSt8ios_baseD2Ev
leaq 416(%rsp), %rdi
movl $_ZTTSt14basic_ifstreamIcSt11char_traitsIcEE, %esi
callq _ZNSt14basic_ifstreamIcSt11char_traitsIcEED2Ev
leaq 672(%rsp), %rdi
callq _ZNSt8ios_baseD2Ev
addq $936, %rsp # imm = 0x3A8
.cfi_def_cfa_offset 56
popq %rbx
.cfi_def_cfa_offset 48
popq %r12
.cfi_def_cfa_offset 40
popq %r13
.cfi_def_cfa_offset 32
popq %r14
.cfi_def_cfa_offset 24
popq %r15
.cfi_def_cfa_offset 16
popq %rbp
.cfi_def_cfa_offset 8
retq
.LBB0_26:
.cfi_def_cfa_offset 992
.Ltmp2:
movq %rax, %rbx
jmp .LBB0_31
.LBB0_28: # %.loopexit.split-lp
.Ltmp25:
jmp .LBB0_30
.LBB0_29:
.Ltmp13:
jmp .LBB0_30
.LBB0_27: # %.loopexit
.Ltmp20:
.LBB0_30:
movq %rax, %rbx
leaq 24(%rsp), %rdi
callq _ZNSt7__cxx1118basic_stringstreamIcSt11char_traitsIcESaIcEED1Ev
.LBB0_31:
leaq 416(%rsp), %rdi
movl $_ZTTSt14basic_ifstreamIcSt11char_traitsIcEE, %esi
callq _ZNSt14basic_ifstreamIcSt11char_traitsIcEED2Ev
leaq 672(%rsp), %rdi
callq _ZNSt8ios_baseD2Ev
movq %rbx, %rdi
callq _Unwind_Resume@PLT
.Lfunc_end0:
.size _Z23dump_from_file_and_initPKc, .Lfunc_end0-_Z23dump_from_file_and_initPKc
.cfi_endproc
.section .gcc_except_table,"a",@progbits
.p2align 2, 0x0
GCC_except_table0:
.Lexception0:
.byte 255 # @LPStart Encoding = omit
.byte 255 # @TType Encoding = omit
.byte 1 # Call site Encoding = uleb128
.uleb128 .Lcst_end0-.Lcst_begin0
.Lcst_begin0:
.uleb128 .Lfunc_begin0-.Lfunc_begin0 # >> Call Site 1 <<
.uleb128 .Ltmp0-.Lfunc_begin0 # Call between .Lfunc_begin0 and .Ltmp0
.byte 0 # has no landing pad
.byte 0 # On action: cleanup
.uleb128 .Ltmp0-.Lfunc_begin0 # >> Call Site 2 <<
.uleb128 .Ltmp1-.Ltmp0 # Call between .Ltmp0 and .Ltmp1
.uleb128 .Ltmp2-.Lfunc_begin0 # jumps to .Ltmp2
.byte 0 # On action: cleanup
.uleb128 .Ltmp3-.Lfunc_begin0 # >> Call Site 3 <<
.uleb128 .Ltmp12-.Ltmp3 # Call between .Ltmp3 and .Ltmp12
.uleb128 .Ltmp13-.Lfunc_begin0 # jumps to .Ltmp13
.byte 0 # On action: cleanup
.uleb128 .Ltmp14-.Lfunc_begin0 # >> Call Site 4 <<
.uleb128 .Ltmp19-.Ltmp14 # Call between .Ltmp14 and .Ltmp19
.uleb128 .Ltmp20-.Lfunc_begin0 # jumps to .Ltmp20
.byte 0 # On action: cleanup
.uleb128 .Ltmp21-.Lfunc_begin0 # >> Call Site 5 <<
.uleb128 .Ltmp24-.Ltmp21 # Call between .Ltmp21 and .Ltmp24
.uleb128 .Ltmp25-.Lfunc_begin0 # jumps to .Ltmp25
.byte 0 # On action: cleanup
.uleb128 .Ltmp24-.Lfunc_begin0 # >> Call Site 6 <<
.uleb128 .Lfunc_end0-.Ltmp24 # Call between .Ltmp24 and .Lfunc_end0
.byte 0 # has no landing pad
.byte 0 # On action: cleanup
.Lcst_end0:
.p2align 2, 0x0
# -- End function
.text
.globl _Z12dump_to_filePKc # -- Begin function _Z12dump_to_filePKc
.p2align 4, 0x90
.type _Z12dump_to_filePKc,@function
_Z12dump_to_filePKc: # @_Z12dump_to_filePKc
.Lfunc_begin1:
.cfi_startproc
.cfi_personality 3, __gxx_personality_v0
.cfi_lsda 3, .Lexception1
# %bb.0:
pushq %rbx
.cfi_def_cfa_offset 16
subq $512, %rsp # imm = 0x200
.cfi_def_cfa_offset 528
.cfi_offset %rbx, -16
movq %rdi, %rsi
movq %rsp, %rbx
movq %rbx, %rdi
movl $16, %edx
callq _ZNSt14basic_ofstreamIcSt11char_traitsIcEEC1EPKcSt13_Ios_Openmode
movq data(%rip), %rsi
movslq vert2(%rip), %rdx
shlq $2, %rdx
.Ltmp26:
movq %rbx, %rdi
callq _ZNSo5writeEPKcl
.Ltmp27:
# %bb.1:
leaq 8(%rsp), %rdi
.Ltmp28:
callq _ZNSt13basic_filebufIcSt11char_traitsIcEE5closeEv
.Ltmp29:
# %bb.2: # %.noexc
testq %rax, %rax
jne .LBB1_4
# %bb.3:
movq (%rsp), %rax
movq -24(%rax), %rax
leaq (%rsp,%rax), %rdi
movl 32(%rsp,%rax), %esi
orl $4, %esi
.Ltmp30:
callq _ZNSt9basic_iosIcSt11char_traitsIcEE5clearESt12_Ios_Iostate
.Ltmp31:
.LBB1_4: # %_ZNSt14basic_ofstreamIcSt11char_traitsIcEE5closeEv.exit
movq %rsp, %rdi
callq _ZNSt14basic_ofstreamIcSt11char_traitsIcEED1Ev
addq $512, %rsp # imm = 0x200
.cfi_def_cfa_offset 16
popq %rbx
.cfi_def_cfa_offset 8
retq
.LBB1_5:
.cfi_def_cfa_offset 528
.Ltmp32:
movq %rax, %rbx
movq %rsp, %rdi
callq _ZNSt14basic_ofstreamIcSt11char_traitsIcEED1Ev
movq %rbx, %rdi
callq _Unwind_Resume@PLT
.Lfunc_end1:
.size _Z12dump_to_filePKc, .Lfunc_end1-_Z12dump_to_filePKc
.cfi_endproc
.section .gcc_except_table,"a",@progbits
.p2align 2, 0x0
GCC_except_table1:
.Lexception1:
.byte 255 # @LPStart Encoding = omit
.byte 255 # @TType Encoding = omit
.byte 1 # Call site Encoding = uleb128
.uleb128 .Lcst_end1-.Lcst_begin1
.Lcst_begin1:
.uleb128 .Lfunc_begin1-.Lfunc_begin1 # >> Call Site 1 <<
.uleb128 .Ltmp26-.Lfunc_begin1 # Call between .Lfunc_begin1 and .Ltmp26
.byte 0 # has no landing pad
.byte 0 # On action: cleanup
.uleb128 .Ltmp26-.Lfunc_begin1 # >> Call Site 2 <<
.uleb128 .Ltmp31-.Ltmp26 # Call between .Ltmp26 and .Ltmp31
.uleb128 .Ltmp32-.Lfunc_begin1 # jumps to .Ltmp32
.byte 0 # On action: cleanup
.uleb128 .Ltmp31-.Lfunc_begin1 # >> Call Site 3 <<
.uleb128 .Lfunc_end1-.Ltmp31 # Call between .Ltmp31 and .Lfunc_end1
.byte 0 # has no landing pad
.byte 0 # On action: cleanup
.Lcst_end1:
.p2align 2, 0x0
# -- End function
.text
.globl _Z23__device_stub__init_gpui # -- Begin function _Z23__device_stub__init_gpui
.p2align 4, 0x90
.type _Z23__device_stub__init_gpui,@function
_Z23__device_stub__init_gpui: # @_Z23__device_stub__init_gpui
.cfi_startproc
# %bb.0:
subq $72, %rsp
.cfi_def_cfa_offset 80
movl %edi, 12(%rsp)
leaq 12(%rsp), %rax
movq %rax, 16(%rsp)
leaq 56(%rsp), %rdi
leaq 40(%rsp), %rsi
leaq 32(%rsp), %rdx
leaq 24(%rsp), %rcx
callq __hipPopCallConfiguration
movq 56(%rsp), %rsi
movl 64(%rsp), %edx
movq 40(%rsp), %rcx
movl 48(%rsp), %r8d
leaq 16(%rsp), %r9
movl $_Z8init_gpui, %edi
pushq 24(%rsp)
.cfi_adjust_cfa_offset 8
pushq 40(%rsp)
.cfi_adjust_cfa_offset 8
callq hipLaunchKernel
addq $88, %rsp
.cfi_adjust_cfa_offset -88
retq
.Lfunc_end2:
.size _Z23__device_stub__init_gpui, .Lfunc_end2-_Z23__device_stub__init_gpui
.cfi_endproc
# -- End function
.globl _Z24__device_stub__phase_onePiiiii # -- Begin function _Z24__device_stub__phase_onePiiiii
.p2align 4, 0x90
.type _Z24__device_stub__phase_onePiiiii,@function
_Z24__device_stub__phase_onePiiiii: # @_Z24__device_stub__phase_onePiiiii
.cfi_startproc
# %bb.0:
subq $120, %rsp
.cfi_def_cfa_offset 128
movq %rdi, 72(%rsp)
movl %esi, 20(%rsp)
movl %edx, 16(%rsp)
movl %ecx, 12(%rsp)
movl %r8d, 8(%rsp)
leaq 72(%rsp), %rax
movq %rax, 80(%rsp)
leaq 20(%rsp), %rax
movq %rax, 88(%rsp)
leaq 16(%rsp), %rax
movq %rax, 96(%rsp)
leaq 12(%rsp), %rax
movq %rax, 104(%rsp)
leaq 8(%rsp), %rax
movq %rax, 112(%rsp)
leaq 56(%rsp), %rdi
leaq 40(%rsp), %rsi
leaq 32(%rsp), %rdx
leaq 24(%rsp), %rcx
callq __hipPopCallConfiguration
movq 56(%rsp), %rsi
movl 64(%rsp), %edx
movq 40(%rsp), %rcx
movl 48(%rsp), %r8d
leaq 80(%rsp), %r9
movl $_Z9phase_onePiiiii, %edi
pushq 24(%rsp)
.cfi_adjust_cfa_offset 8
pushq 40(%rsp)
.cfi_adjust_cfa_offset 8
callq hipLaunchKernel
addq $136, %rsp
.cfi_adjust_cfa_offset -136
retq
.Lfunc_end3:
.size _Z24__device_stub__phase_onePiiiii, .Lfunc_end3-_Z24__device_stub__phase_onePiiiii
.cfi_endproc
# -- End function
.globl _Z24__device_stub__phase_twoPiiiii # -- Begin function _Z24__device_stub__phase_twoPiiiii
.p2align 4, 0x90
.type _Z24__device_stub__phase_twoPiiiii,@function
_Z24__device_stub__phase_twoPiiiii: # @_Z24__device_stub__phase_twoPiiiii
.cfi_startproc
# %bb.0:
subq $120, %rsp
.cfi_def_cfa_offset 128
movq %rdi, 72(%rsp)
movl %esi, 20(%rsp)
movl %edx, 16(%rsp)
movl %ecx, 12(%rsp)
movl %r8d, 8(%rsp)
leaq 72(%rsp), %rax
movq %rax, 80(%rsp)
leaq 20(%rsp), %rax
movq %rax, 88(%rsp)
leaq 16(%rsp), %rax
movq %rax, 96(%rsp)
leaq 12(%rsp), %rax
movq %rax, 104(%rsp)
leaq 8(%rsp), %rax
movq %rax, 112(%rsp)
leaq 56(%rsp), %rdi
leaq 40(%rsp), %rsi
leaq 32(%rsp), %rdx
leaq 24(%rsp), %rcx
callq __hipPopCallConfiguration
movq 56(%rsp), %rsi
movl 64(%rsp), %edx
movq 40(%rsp), %rcx
movl 48(%rsp), %r8d
leaq 80(%rsp), %r9
movl $_Z9phase_twoPiiiii, %edi
pushq 24(%rsp)
.cfi_adjust_cfa_offset 8
pushq 40(%rsp)
.cfi_adjust_cfa_offset 8
callq hipLaunchKernel
addq $136, %rsp
.cfi_adjust_cfa_offset -136
retq
.Lfunc_end4:
.size _Z24__device_stub__phase_twoPiiiii, .Lfunc_end4-_Z24__device_stub__phase_twoPiiiii
.cfi_endproc
# -- End function
.globl _Z26__device_stub__phase_threePiiiii # -- Begin function _Z26__device_stub__phase_threePiiiii
.p2align 4, 0x90
.type _Z26__device_stub__phase_threePiiiii,@function
_Z26__device_stub__phase_threePiiiii: # @_Z26__device_stub__phase_threePiiiii
.cfi_startproc
# %bb.0:
subq $120, %rsp
.cfi_def_cfa_offset 128
movq %rdi, 72(%rsp)
movl %esi, 20(%rsp)
movl %edx, 16(%rsp)
movl %ecx, 12(%rsp)
movl %r8d, 8(%rsp)
leaq 72(%rsp), %rax
movq %rax, 80(%rsp)
leaq 20(%rsp), %rax
movq %rax, 88(%rsp)
leaq 16(%rsp), %rax
movq %rax, 96(%rsp)
leaq 12(%rsp), %rax
movq %rax, 104(%rsp)
leaq 8(%rsp), %rax
movq %rax, 112(%rsp)
leaq 56(%rsp), %rdi
leaq 40(%rsp), %rsi
leaq 32(%rsp), %rdx
leaq 24(%rsp), %rcx
callq __hipPopCallConfiguration
movq 56(%rsp), %rsi
movl 64(%rsp), %edx
movq 40(%rsp), %rcx
movl 48(%rsp), %r8d
leaq 80(%rsp), %r9
movl $_Z11phase_threePiiiii, %edi
pushq 24(%rsp)
.cfi_adjust_cfa_offset 8
pushq 40(%rsp)
.cfi_adjust_cfa_offset 8
callq hipLaunchKernel
addq $136, %rsp
.cfi_adjust_cfa_offset -136
retq
.Lfunc_end5:
.size _Z26__device_stub__phase_threePiiiii, .Lfunc_end5-_Z26__device_stub__phase_threePiiiii
.cfi_endproc
# -- End function
.globl _Z8block_FWv # -- Begin function _Z8block_FWv
.p2align 4, 0x90
.type _Z8block_FWv,@function
_Z8block_FWv: # @_Z8block_FWv
.cfi_startproc
# %bb.0:
pushq %rbp
.cfi_def_cfa_offset 16
pushq %r15
.cfi_def_cfa_offset 24
pushq %r14
.cfi_def_cfa_offset 32
pushq %r13
.cfi_def_cfa_offset 40
pushq %r12
.cfi_def_cfa_offset 48
pushq %rbx
.cfi_def_cfa_offset 56
subq $136, %rsp
.cfi_def_cfa_offset 192
.cfi_offset %rbx, -56
.cfi_offset %r12, -48
.cfi_offset %r13, -40
.cfi_offset %r14, -32
.cfi_offset %r15, -24
.cfi_offset %rbp, -16
movslq vert(%rip), %r12
leal -1(%r12), %eax
movl block_size(%rip), %ebp
cltd
idivl %ebp
movl %eax, %ebx
leal 1(%rbx), %r14d
movl %r14d, %r15d
imull %ebp, %r15d
shlq $2, %r12
movslq %r15d, %rsi
leaq (,%rsi,4), %r13
imulq %r13, %rsi
leaq 16(%rsp), %rdi
callq hipMalloc
movq 16(%rsp), %rdi
movq data(%rip), %rdx
movslq vert(%rip), %r9
subq $8, %rsp
.cfi_adjust_cfa_offset 8
movq %r13, 128(%rsp) # 8-byte Spill
movq %r13, %rsi
movq %r12, %rcx
movq %r12, 136(%rsp) # 8-byte Spill
movq %r12, %r8
pushq $1
.cfi_adjust_cfa_offset 8
callq hipMemcpy2D
addq $16, %rsp
.cfi_adjust_cfa_offset -16
testl %ebx, %ebx
js .LBB6_9
# %bb.1: # %.lr.ph
movabsq $8589934592, %r12 # imm = 0x200000000
orq %rbx, %r12
movq %rbx, %r13
shlq $32, %r13
orq %rbx, %r13
movq %rbp, %rax
shlq $32, %rbp
orq %rax, %rbp
xorl %ebx, %ebx
jmp .LBB6_2
.p2align 4, 0x90
.LBB6_8: # in Loop: Header=BB6_2 Depth=1
incl %ebx
cmpl %ebx, %r14d
je .LBB6_9
.LBB6_2: # =>This Inner Loop Header: Depth=1
movabsq $4294967297, %rdi # imm = 0x100000001
movl $1, %esi
movq %rbp, %rdx
movl $1, %ecx
xorl %r8d, %r8d
xorl %r9d, %r9d
callq __hipPushCallConfiguration
testl %eax, %eax
jne .LBB6_4
# %bb.3: # in Loop: Header=BB6_2 Depth=1
movq 16(%rsp), %rax
movl block_size(%rip), %ecx
movl vert(%rip), %edx
movq %rax, 72(%rsp)
movl %ecx, 12(%rsp)
movl %ebx, 8(%rsp)
movl %r15d, 4(%rsp)
movl %edx, (%rsp)
leaq 72(%rsp), %rax
movq %rax, 80(%rsp)
leaq 12(%rsp), %rax
movq %rax, 88(%rsp)
leaq 8(%rsp), %rax
movq %rax, 96(%rsp)
leaq 4(%rsp), %rax
movq %rax, 104(%rsp)
movq %rsp, %rax
movq %rax, 112(%rsp)
leaq 56(%rsp), %rdi
leaq 40(%rsp), %rsi
leaq 32(%rsp), %rdx
leaq 24(%rsp), %rcx
callq __hipPopCallConfiguration
movq 56(%rsp), %rsi
movl 64(%rsp), %edx
movq 40(%rsp), %rcx
movl 48(%rsp), %r8d
movl $_Z9phase_onePiiiii, %edi
leaq 80(%rsp), %r9
pushq 24(%rsp)
.cfi_adjust_cfa_offset 8
pushq 40(%rsp)
.cfi_adjust_cfa_offset 8
callq hipLaunchKernel
addq $16, %rsp
.cfi_adjust_cfa_offset -16
.LBB6_4: # in Loop: Header=BB6_2 Depth=1
movq %r12, %rdi
movl $1, %esi
movq %rbp, %rdx
movl $1, %ecx
xorl %r8d, %r8d
xorl %r9d, %r9d
callq __hipPushCallConfiguration
testl %eax, %eax
jne .LBB6_6
# %bb.5: # in Loop: Header=BB6_2 Depth=1
movq 16(%rsp), %rax
movl block_size(%rip), %ecx
movl vert(%rip), %edx
movq %rax, 72(%rsp)
movl %ecx, 12(%rsp)
movl %ebx, 8(%rsp)
movl %r15d, 4(%rsp)
movl %edx, (%rsp)
leaq 72(%rsp), %rax
movq %rax, 80(%rsp)
leaq 12(%rsp), %rax
movq %rax, 88(%rsp)
leaq 8(%rsp), %rax
movq %rax, 96(%rsp)
leaq 4(%rsp), %rax
movq %rax, 104(%rsp)
movq %rsp, %rax
movq %rax, 112(%rsp)
leaq 56(%rsp), %rdi
leaq 40(%rsp), %rsi
leaq 32(%rsp), %rdx
leaq 24(%rsp), %rcx
callq __hipPopCallConfiguration
movq 56(%rsp), %rsi
movl 64(%rsp), %edx
movq 40(%rsp), %rcx
movl 48(%rsp), %r8d
movl $_Z9phase_twoPiiiii, %edi
leaq 80(%rsp), %r9
pushq 24(%rsp)
.cfi_adjust_cfa_offset 8
pushq 40(%rsp)
.cfi_adjust_cfa_offset 8
callq hipLaunchKernel
addq $16, %rsp
.cfi_adjust_cfa_offset -16
.LBB6_6: # in Loop: Header=BB6_2 Depth=1
movq %r13, %rdi
movl $1, %esi
movq %rbp, %rdx
movl $1, %ecx
xorl %r8d, %r8d
xorl %r9d, %r9d
callq __hipPushCallConfiguration
testl %eax, %eax
jne .LBB6_8
# %bb.7: # in Loop: Header=BB6_2 Depth=1
movq 16(%rsp), %rax
movl block_size(%rip), %ecx
movl vert(%rip), %edx
movq %rax, 72(%rsp)
movl %ecx, 12(%rsp)
movl %ebx, 8(%rsp)
movl %r15d, 4(%rsp)
movl %edx, (%rsp)
leaq 72(%rsp), %rax
movq %rax, 80(%rsp)
leaq 12(%rsp), %rax
movq %rax, 88(%rsp)
leaq 8(%rsp), %rax
movq %rax, 96(%rsp)
leaq 4(%rsp), %rax
movq %rax, 104(%rsp)
movq %rsp, %rax
movq %rax, 112(%rsp)
leaq 56(%rsp), %rdi
leaq 40(%rsp), %rsi
leaq 32(%rsp), %rdx
leaq 24(%rsp), %rcx
callq __hipPopCallConfiguration
movq 56(%rsp), %rsi
movl 64(%rsp), %edx
movq 40(%rsp), %rcx
movl 48(%rsp), %r8d
movl $_Z11phase_threePiiiii, %edi
leaq 80(%rsp), %r9
pushq 24(%rsp)
.cfi_adjust_cfa_offset 8
pushq 40(%rsp)
.cfi_adjust_cfa_offset 8
callq hipLaunchKernel
addq $16, %rsp
.cfi_adjust_cfa_offset -16
jmp .LBB6_8
.LBB6_9: # %._crit_edge
movq data(%rip), %rdi
movq 16(%rsp), %rdx
movslq vert(%rip), %r9
subq $8, %rsp
.cfi_adjust_cfa_offset 8
movq 136(%rsp), %rsi # 8-byte Reload
movq 128(%rsp), %rcx # 8-byte Reload
movq %rsi, %r8
pushq $2
.cfi_adjust_cfa_offset 8
callq hipMemcpy2D
addq $16, %rsp
.cfi_adjust_cfa_offset -16
movq 16(%rsp), %rdi
callq hipFree
addq $136, %rsp
.cfi_def_cfa_offset 56
popq %rbx
.cfi_def_cfa_offset 48
popq %r12
.cfi_def_cfa_offset 40
popq %r13
.cfi_def_cfa_offset 32
popq %r14
.cfi_def_cfa_offset 24
popq %r15
.cfi_def_cfa_offset 16
popq %rbp
.cfi_def_cfa_offset 8
retq
.Lfunc_end6:
.size _Z8block_FWv, .Lfunc_end6-_Z8block_FWv
.cfi_endproc
# -- End function
.globl main # -- Begin function main
.p2align 4, 0x90
.type main,@function
main: # @main
.cfi_startproc
# %bb.0:
pushq %rbx
.cfi_def_cfa_offset 16
.cfi_offset %rbx, -16
movq %rsi, %rbx
movq 8(%rsi), %rdi
callq _Z23dump_from_file_and_initPKc
movq 24(%rbx), %rdi
xorl %esi, %esi
movl $10, %edx
callq __isoc23_strtol
movl %eax, block_size(%rip)
callq _Z8block_FWv
movq 16(%rbx), %rdi
callq _Z12dump_to_filePKc
movq Dist(%rip), %rdi
testq %rdi, %rdi
je .LBB7_2
# %bb.1:
callq _ZdaPv
.LBB7_2:
movq data(%rip), %rdi
testq %rdi, %rdi
je .LBB7_4
# %bb.3:
callq _ZdaPv
.LBB7_4: # %_Z8finalizev.exit
xorl %eax, %eax
popq %rbx
.cfi_def_cfa_offset 8
retq
.Lfunc_end7:
.size main, .Lfunc_end7-main
.cfi_endproc
# -- End function
.p2align 4, 0x90 # -- Begin function __hip_module_ctor
.type __hip_module_ctor,@function
__hip_module_ctor: # @__hip_module_ctor
.cfi_startproc
# %bb.0:
pushq %rbx
.cfi_def_cfa_offset 16
subq $32, %rsp
.cfi_def_cfa_offset 48
.cfi_offset %rbx, -16
cmpq $0, __hip_gpubin_handle(%rip)
jne .LBB8_2
# %bb.1:
movl $__hip_fatbin_wrapper, %edi
callq __hipRegisterFatBinary
movq %rax, __hip_gpubin_handle(%rip)
.LBB8_2:
movq __hip_gpubin_handle(%rip), %rbx
xorps %xmm0, %xmm0
movups %xmm0, 16(%rsp)
movups %xmm0, (%rsp)
movl $_Z8init_gpui, %esi
movl $.L__unnamed_1, %edx
movl $.L__unnamed_1, %ecx
movq %rbx, %rdi
movl $-1, %r8d
xorl %r9d, %r9d
callq __hipRegisterFunction
xorps %xmm0, %xmm0
movups %xmm0, 16(%rsp)
movups %xmm0, (%rsp)
movl $_Z9phase_onePiiiii, %esi
movl $.L__unnamed_2, %edx
movl $.L__unnamed_2, %ecx
movq %rbx, %rdi
movl $-1, %r8d
xorl %r9d, %r9d
callq __hipRegisterFunction
xorps %xmm0, %xmm0
movups %xmm0, 16(%rsp)
movups %xmm0, (%rsp)
movl $_Z9phase_twoPiiiii, %esi
movl $.L__unnamed_3, %edx
movl $.L__unnamed_3, %ecx
movq %rbx, %rdi
movl $-1, %r8d
xorl %r9d, %r9d
callq __hipRegisterFunction
xorps %xmm0, %xmm0
movups %xmm0, 16(%rsp)
movups %xmm0, (%rsp)
movl $_Z11phase_threePiiiii, %esi
movl $.L__unnamed_4, %edx
movl $.L__unnamed_4, %ecx
movq %rbx, %rdi
movl $-1, %r8d
xorl %r9d, %r9d
callq __hipRegisterFunction
movl $__hip_module_dtor, %edi
addq $32, %rsp
.cfi_def_cfa_offset 16
popq %rbx
.cfi_def_cfa_offset 8
jmp atexit # TAILCALL
.Lfunc_end8:
.size __hip_module_ctor, .Lfunc_end8-__hip_module_ctor
.cfi_endproc
# -- End function
.p2align 4, 0x90 # -- Begin function __hip_module_dtor
.type __hip_module_dtor,@function
__hip_module_dtor: # @__hip_module_dtor
.cfi_startproc
# %bb.0:
movq __hip_gpubin_handle(%rip), %rdi
testq %rdi, %rdi
je .LBB9_2
# %bb.1:
pushq %rax
.cfi_def_cfa_offset 16
callq __hipUnregisterFatBinary
movq $0, __hip_gpubin_handle(%rip)
addq $8, %rsp
.cfi_def_cfa_offset 8
.LBB9_2:
retq
.Lfunc_end9:
.size __hip_module_dtor, .Lfunc_end9-__hip_module_dtor
.cfi_endproc
# -- End function
.type Dist,@object # @Dist
.bss
.globl Dist
.p2align 3, 0x0
Dist:
.quad 0
.size Dist, 8
.type data,@object # @data
.globl data
.p2align 3, 0x0
data:
.quad 0
.size data, 8
.type block_size,@object # @block_size
.globl block_size
.p2align 2, 0x0
block_size:
.long 0 # 0x0
.size block_size, 4
.type vert,@object # @vert
.globl vert
.p2align 2, 0x0
vert:
.long 0 # 0x0
.size vert, 4
.type edge,@object # @edge
.globl edge
.p2align 2, 0x0
edge:
.long 0 # 0x0
.size edge, 4
.type vert2,@object # @vert2
.globl vert2
.p2align 2, 0x0
vert2:
.long 0 # 0x0
.size vert2, 4
.type _Z8init_gpui,@object # @_Z8init_gpui
.section .rodata,"a",@progbits
.globl _Z8init_gpui
.p2align 3, 0x0
_Z8init_gpui:
.quad _Z23__device_stub__init_gpui
.size _Z8init_gpui, 8
.type _Z9phase_onePiiiii,@object # @_Z9phase_onePiiiii
.globl _Z9phase_onePiiiii
.p2align 3, 0x0
_Z9phase_onePiiiii:
.quad _Z24__device_stub__phase_onePiiiii
.size _Z9phase_onePiiiii, 8
.type _Z9phase_twoPiiiii,@object # @_Z9phase_twoPiiiii
.globl _Z9phase_twoPiiiii
.p2align 3, 0x0
_Z9phase_twoPiiiii:
.quad _Z24__device_stub__phase_twoPiiiii
.size _Z9phase_twoPiiiii, 8
.type _Z11phase_threePiiiii,@object # @_Z11phase_threePiiiii
.globl _Z11phase_threePiiiii
.p2align 3, 0x0
_Z11phase_threePiiiii:
.quad _Z26__device_stub__phase_threePiiiii
.size _Z11phase_threePiiiii, 8
.type .L__unnamed_1,@object # @0
.section .rodata.str1.1,"aMS",@progbits,1
.L__unnamed_1:
.asciz "_Z8init_gpui"
.size .L__unnamed_1, 13
.type .L__unnamed_2,@object # @1
.L__unnamed_2:
.asciz "_Z9phase_onePiiiii"
.size .L__unnamed_2, 19
.type .L__unnamed_3,@object # @2
.L__unnamed_3:
.asciz "_Z9phase_twoPiiiii"
.size .L__unnamed_3, 19
.type .L__unnamed_4,@object # @3
.L__unnamed_4:
.asciz "_Z11phase_threePiiiii"
.size .L__unnamed_4, 22
.type __hip_fatbin_wrapper,@object # @__hip_fatbin_wrapper
.section .hipFatBinSegment,"a",@progbits
.p2align 3, 0x0
__hip_fatbin_wrapper:
.long 1212764230 # 0x48495046
.long 1 # 0x1
.quad __hip_fatbin
.quad 0
.size __hip_fatbin_wrapper, 24
.type __hip_gpubin_handle,@object # @__hip_gpubin_handle
.local __hip_gpubin_handle
.comm __hip_gpubin_handle,8,8
.section .init_array,"aw",@init_array
.p2align 3, 0x0
.quad __hip_module_ctor
.type __hip_cuid_,@object # @__hip_cuid_
.bss
.globl __hip_cuid_
__hip_cuid_:
.byte 0 # 0x0
.size __hip_cuid_, 1
.section ".linker-options","e",@llvm_linker_options
.ident "AMD clang version 18.0.0git (https://github.com/RadeonOpenCompute/llvm-project roc-6.3.2 25012 e5bf7e55c91490b07c49d8960fa7983d864936c4)"
.section ".note.GNU-stack","",@progbits
.addrsig
.addrsig_sym __gxx_personality_v0
.addrsig_sym _Z23__device_stub__init_gpui
.addrsig_sym _Z24__device_stub__phase_onePiiiii
.addrsig_sym _Z24__device_stub__phase_twoPiiiii
.addrsig_sym _Z26__device_stub__phase_threePiiiii
.addrsig_sym __hip_module_ctor
.addrsig_sym __hip_module_dtor
.addrsig_sym _Unwind_Resume
.addrsig_sym vert
.addrsig_sym edge
.addrsig_sym _Z8init_gpui
.addrsig_sym _Z9phase_onePiiiii
.addrsig_sym _Z9phase_twoPiiiii
.addrsig_sym _Z11phase_threePiiiii
.addrsig_sym __hip_fatbin
.addrsig_sym __hip_fatbin_wrapper
.addrsig_sym __hip_cuid_ |
You are a helpful coding assistant specialized in converting CUDA source code to CUDA device assembly. | #include <stdlib.h>
#include <stdio.h>
#include <time.h>
#include <math.h>
__global__ void VecAdd(float* A, float* B, float*
C, int N_op,int op_loop){
// N_op : no of total ops
// op_loop: no of ops to do in a loop
// Host code
int j;
int i = blockDim.x * blockIdx.x + threadIdx.x;
if (i < N_op){
for (j=0;j<op_loop;j++){
C[i*op_loop+j] = A[i*op_loop+j] + B[i*op_loop+j];
}
}
}
int main(int argc,char **argv) {
//printf("Usage example. \n./ee16b068_456.out <threads_per_block> <ops_per_thread> <vector_size> <filename1> <filename2>");
if (argc<5){
//printf("Too few arguments.\nUsage is ./ee16b068_456.out <threads_per_block> <ops_per_thread> <vector_size> <filename1> <filename2> ");
return 1;
}
int threadsPerBlock_op=atoi(argv[1]);
int op_loop=atoi(argv[2]);
//int N = pow(2,atoi(argv[3]));
int N = atoi(argv[3]);
FILE *arrayfile_a;
FILE *arrayfile_b;
size_t size = N * sizeof(float);
//Helper variables
int loop;
float time_spent;
//files
arrayfile_a = fopen(argv[4], "r");
arrayfile_b = fopen(argv[5], "r");
// Allocate input vectors h_A and h_B in host memory
float* h_A = (float*)malloc(size);
float* h_B = (float*)malloc(size);
float* h_C = (float*)malloc(size);
// Read first two arrays
//printf("\nArray A (first 10 values) \n ");
for (loop = 0; loop < N; loop++)
{
fscanf(arrayfile_a, "%f", &h_A[loop]);
//if (loop<10){
// printf("%f ", h_A[loop]);
//}
}
//printf("\nArray B (first 10 values) \n ");
for (loop = 0; loop < N; loop++)
{
fscanf(arrayfile_b, "%f", &h_B[loop]);
//if (loop<10){
//printf("%f ", h_B[loop]);
//}
}
// Allocate vectors in device memory
float* d_A; cudaMalloc(&d_A, size);
float* d_B; cudaMalloc(&d_B, size);
float* d_C; cudaMalloc(&d_C, size);
//GPU timing
cudaEvent_t start, stop;
cudaEventCreate(&start);
cudaEventCreate(&stop);
// Copy vectors from host memory to device memory
cudaMemcpy(d_A, h_A, size,cudaMemcpyHostToDevice);
cudaMemcpy(d_B, h_B, size,cudaMemcpyHostToDevice);
//ops per loop
//printf("Ops per loop %d\n",op_loop);
//printf("Threads per Block %d\n",threadsPerBlock_op);
//printf("Vector Size %d\n",op_loop);
// Invoke kernel
int threadsPerBlock = threadsPerBlock_op;
int N_op=(N + op_loop -1)/op_loop;
int blocksPerGrid = (N_op + threadsPerBlock - 1) /threadsPerBlock;
cudaEventRecord(start, 0);
VecAdd<<<blocksPerGrid, threadsPerBlock>>>(d_A,d_B, d_C, N_op,op_loop);
cudaEventRecord(stop, 0);
// h_C contains the result in host memory
cudaMemcpy(h_C, d_C, size,cudaMemcpyDeviceToHost);
//printf("\nArray C (first 10 outputs)\n");
//for(loop = 0; loop < 10; loop++)
// printf("%f ", h_C[loop]);
cudaEventSynchronize(stop);
cudaEventElapsedTime(&time_spent, start, stop);
printf("%f",time_spent);
// Free device memory
cudaFree(d_A);
cudaFree(d_B);
cudaFree(d_C);
// Free host memory
free(h_A);
free(h_B);
return 0;
} | code for sm_80
Function : _Z6VecAddPfS_S_ii
.headerflags @"EF_CUDA_TEXMODE_UNIFIED EF_CUDA_64BIT_ADDRESS EF_CUDA_SM80 EF_CUDA_VIRTUAL_SM(EF_CUDA_SM80)"
/*0000*/ MOV R1, c[0x0][0x28] ; /* 0x00000a0000017a02 */
/* 0x000fe40000000f00 */
/*0010*/ S2R R2, SR_CTAID.X ; /* 0x0000000000027919 */
/* 0x000e220000002500 */
/*0020*/ MOV R0, c[0x0][0x17c] ; /* 0x00005f0000007a02 */
/* 0x000fc60000000f00 */
/*0030*/ S2R R3, SR_TID.X ; /* 0x0000000000037919 */
/* 0x000e220000002100 */
/*0040*/ ISETP.GE.AND P0, PT, R0, 0x1, PT ; /* 0x000000010000780c */
/* 0x000fe20003f06270 */
/*0050*/ IMAD R2, R2, c[0x0][0x0], R3 ; /* 0x0000000002027a24 */
/* 0x001fca00078e0203 */
/*0060*/ ISETP.GE.OR P0, PT, R2, c[0x0][0x178], !P0 ; /* 0x00005e0002007a0c */
/* 0x000fda0004706670 */
/*0070*/ @P0 EXIT ; /* 0x000000000000094d */
/* 0x000fea0003800000 */
/*0080*/ IADD3 R3, R0.reuse, -0x1, RZ ; /* 0xffffffff00037810 */
/* 0x040fe20007ffe0ff */
/*0090*/ ULDC.64 UR4, c[0x0][0x118] ; /* 0x0000460000047ab9 */
/* 0x000fe20000000a00 */
/*00a0*/ LOP3.LUT R0, R0, 0x3, RZ, 0xc0, !PT ; /* 0x0000000300007812 */
/* 0x000fe200078ec0ff */
/*00b0*/ IMAD.MOV.U32 R5, RZ, RZ, RZ ; /* 0x000000ffff057224 */
/* 0x000fe200078e00ff */
/*00c0*/ ISETP.GE.U32.AND P0, PT, R3, 0x3, PT ; /* 0x000000030300780c */
/* 0x000fda0003f06070 */
/*00d0*/ @!P0 BRA 0xc60 ; /* 0x00000b8000008947 */
/* 0x000fea0003800000 */
/*00e0*/ IADD3 R3, -R0, c[0x0][0x17c], RZ ; /* 0x00005f0000037a10 */
/* 0x000fe20007ffe1ff */
/*00f0*/ ULDC.64 UR10, c[0x0][0x160] ; /* 0x00005800000a7ab9 */
/* 0x000fe20000000a00 */
/*0100*/ HFMA2.MMA R5, -RZ, RZ, 0, 0 ; /* 0x00000000ff057435 */
/* 0x000fe200000001ff */
/*0110*/ ULDC.64 UR8, c[0x0][0x168] ; /* 0x00005a0000087ab9 */
/* 0x000fe20000000a00 */
/*0120*/ ISETP.GT.AND P0, PT, R3, RZ, PT ; /* 0x000000ff0300720c */
/* 0x000fe20003f04270 */
/*0130*/ ULDC.64 UR6, c[0x0][0x170] ; /* 0x00005c0000067ab9 */
/* 0x000fe20000000a00 */
/*0140*/ IMAD R4, R2, c[0x0][0x17c], RZ ; /* 0x00005f0002047a24 */
/* 0x000fd600078e02ff */
/*0150*/ @!P0 BRA 0xa30 ; /* 0x000008d000008947 */
/* 0x000fea0003800000 */
/*0160*/ ISETP.GT.AND P1, PT, R3, 0xc, PT ; /* 0x0000000c0300780c */
/* 0x000fe40003f24270 */
/*0170*/ PLOP3.LUT P0, PT, PT, PT, PT, 0x80, 0x0 ; /* 0x000000000000781c */
/* 0x000fd60003f0f070 */
/*0180*/ @!P1 BRA 0x6d0 ; /* 0x0000054000009947 */
/* 0x000fea0003800000 */
/*0190*/ PLOP3.LUT P0, PT, PT, PT, PT, 0x8, 0x0 ; /* 0x000000000000781c */
/* 0x000fe40003f0e170 */
/*01a0*/ MOV R8, UR10 ; /* 0x0000000a00087c02 */
/* 0x000fe20008000f00 */
/*01b0*/ IMAD.U32 R9, RZ, RZ, UR11 ; /* 0x0000000bff097e24 */
/* 0x000fe2000f8e00ff */
/*01c0*/ MOV R6, UR8 ; /* 0x0000000800067c02 */
/* 0x000fe40008000f00 */
/*01d0*/ MOV R7, UR9 ; /* 0x0000000900077c02 */
/* 0x000fe20008000f00 */
/*01e0*/ IMAD.WIDE R8, R4, 0x4, R8 ; /* 0x0000000404087825 */
/* 0x000fc800078e0208 */
/*01f0*/ IMAD.WIDE R6, R4, 0x4, R6 ; /* 0x0000000404067825 */
/* 0x000fe200078e0206 */
/*0200*/ LDG.E R13, [R8.64] ; /* 0x00000004080d7981 */
/* 0x001ea8000c1e1900 */
/*0210*/ LDG.E R12, [R6.64] ; /* 0x00000004060c7981 */
/* 0x000ea2000c1e1900 */
/*0220*/ MOV R11, UR7 ; /* 0x00000007000b7c02 */
/* 0x000fe20008000f00 */
/*0230*/ IMAD.U32 R10, RZ, RZ, UR6 ; /* 0x00000006ff0a7e24 */
/* 0x000fc8000f8e00ff */
/*0240*/ IMAD.WIDE R10, R4, 0x4, R10 ; /* 0x00000004040a7825 */
/* 0x000fc800078e020a */
/*0250*/ FADD R13, R12, R13 ; /* 0x0000000d0c0d7221 */
/* 0x004fca0000000000 */
/*0260*/ STG.E [R10.64], R13 ; /* 0x0000000d0a007986 */
/* 0x0001e8000c101904 */
/*0270*/ LDG.E R12, [R6.64+0x4] ; /* 0x00000404060c7981 */
/* 0x000ea8000c1e1900 */
/*0280*/ LDG.E R15, [R8.64+0x4] ; /* 0x00000404080f7981 */
/* 0x000ea4000c1e1900 */
/*0290*/ FADD R15, R12, R15 ; /* 0x0000000f0c0f7221 */
/* 0x004fca0000000000 */
/*02a0*/ STG.E [R10.64+0x4], R15 ; /* 0x0000040f0a007986 */
/* 0x0003e8000c101904 */
/*02b0*/ LDG.E R12, [R6.64+0x8] ; /* 0x00000804060c7981 */
/* 0x000ea8000c1e1900 */
/*02c0*/ LDG.E R17, [R8.64+0x8] ; /* 0x0000080408117981 */
/* 0x000ea4000c1e1900 */
/*02d0*/ FADD R17, R12, R17 ; /* 0x000000110c117221 */
/* 0x004fca0000000000 */
/*02e0*/ STG.E [R10.64+0x8], R17 ; /* 0x000008110a007986 */
/* 0x0005e8000c101904 */
/*02f0*/ LDG.E R12, [R6.64+0xc] ; /* 0x00000c04060c7981 */
/* 0x000ee8000c1e1900 */
/*0300*/ LDG.E R19, [R8.64+0xc] ; /* 0x00000c0408137981 */
/* 0x000ee4000c1e1900 */
/*0310*/ FADD R19, R12, R19 ; /* 0x000000130c137221 */
/* 0x008fca0000000000 */
/*0320*/ STG.E [R10.64+0xc], R19 ; /* 0x00000c130a007986 */
/* 0x0007e8000c101904 */
/*0330*/ LDG.E R12, [R6.64+0x10] ; /* 0x00001004060c7981 */
/* 0x000f28000c1e1900 */
/*0340*/ LDG.E R13, [R8.64+0x10] ; /* 0x00001004080d7981 */
/* 0x001f24000c1e1900 */
/*0350*/ FADD R13, R12, R13 ; /* 0x0000000d0c0d7221 */
/* 0x010fca0000000000 */
/*0360*/ STG.E [R10.64+0x10], R13 ; /* 0x0000100d0a007986 */
/* 0x0001e8000c101904 */
/*0370*/ LDG.E R12, [R6.64+0x14] ; /* 0x00001404060c7981 */
/* 0x000f28000c1e1900 */
/*0380*/ LDG.E R15, [R8.64+0x14] ; /* 0x00001404080f7981 */
/* 0x002f24000c1e1900 */
/*0390*/ FADD R15, R12, R15 ; /* 0x0000000f0c0f7221 */
/* 0x010fca0000000000 */
/*03a0*/ STG.E [R10.64+0x14], R15 ; /* 0x0000140f0a007986 */
/* 0x0003e8000c101904 */
/*03b0*/ LDG.E R12, [R6.64+0x18] ; /* 0x00001804060c7981 */
/* 0x000f28000c1e1900 */
/*03c0*/ LDG.E R17, [R8.64+0x18] ; /* 0x0000180408117981 */
/* 0x004f24000c1e1900 */
/*03d0*/ FADD R17, R12, R17 ; /* 0x000000110c117221 */
/* 0x010fca0000000000 */
/*03e0*/ STG.E [R10.64+0x18], R17 ; /* 0x000018110a007986 */
/* 0x0005e8000c101904 */
/*03f0*/ LDG.E R12, [R6.64+0x1c] ; /* 0x00001c04060c7981 */
/* 0x000f28000c1e1900 */
/*0400*/ LDG.E R19, [R8.64+0x1c] ; /* 0x00001c0408137981 */
/* 0x008f24000c1e1900 */
/*0410*/ FADD R19, R12, R19 ; /* 0x000000130c137221 */
/* 0x010fca0000000000 */
/*0420*/ STG.E [R10.64+0x1c], R19 ; /* 0x00001c130a007986 */
/* 0x0007e8000c101904 */
/*0430*/ LDG.E R12, [R6.64+0x20] ; /* 0x00002004060c7981 */
/* 0x000f28000c1e1900 */
/*0440*/ LDG.E R13, [R8.64+0x20] ; /* 0x00002004080d7981 */
/* 0x001f24000c1e1900 */
/*0450*/ FADD R13, R12, R13 ; /* 0x0000000d0c0d7221 */
/* 0x010fca0000000000 */
/*0460*/ STG.E [R10.64+0x20], R13 ; /* 0x0000200d0a007986 */
/* 0x0001e8000c101904 */
/*0470*/ LDG.E R12, [R6.64+0x24] ; /* 0x00002404060c7981 */
/* 0x000f28000c1e1900 */
/*0480*/ LDG.E R15, [R8.64+0x24] ; /* 0x00002404080f7981 */
/* 0x002f24000c1e1900 */
/*0490*/ FADD R15, R12, R15 ; /* 0x0000000f0c0f7221 */
/* 0x010fca0000000000 */
/*04a0*/ STG.E [R10.64+0x24], R15 ; /* 0x0000240f0a007986 */
/* 0x0003e8000c101904 */
/*04b0*/ LDG.E R12, [R6.64+0x28] ; /* 0x00002804060c7981 */
/* 0x000f28000c1e1900 */
/*04c0*/ LDG.E R17, [R8.64+0x28] ; /* 0x0000280408117981 */
/* 0x004f24000c1e1900 */
/*04d0*/ FADD R17, R12, R17 ; /* 0x000000110c117221 */
/* 0x010fca0000000000 */
/*04e0*/ STG.E [R10.64+0x28], R17 ; /* 0x000028110a007986 */
/* 0x0005e8000c101904 */
/*04f0*/ LDG.E R12, [R6.64+0x2c] ; /* 0x00002c04060c7981 */
/* 0x000f28000c1e1900 */
/*0500*/ LDG.E R19, [R8.64+0x2c] ; /* 0x00002c0408137981 */
/* 0x008f24000c1e1900 */
/*0510*/ FADD R19, R12, R19 ; /* 0x000000130c137221 */
/* 0x010fca0000000000 */
/*0520*/ STG.E [R10.64+0x2c], R19 ; /* 0x00002c130a007986 */
/* 0x0007e8000c101904 */
/*0530*/ LDG.E R12, [R6.64+0x30] ; /* 0x00003004060c7981 */
/* 0x000f28000c1e1900 */
/*0540*/ LDG.E R13, [R8.64+0x30] ; /* 0x00003004080d7981 */
/* 0x001f24000c1e1900 */
/*0550*/ FADD R13, R12, R13 ; /* 0x0000000d0c0d7221 */
/* 0x010fca0000000000 */
/*0560*/ STG.E [R10.64+0x30], R13 ; /* 0x0000300d0a007986 */
/* 0x0001e8000c101904 */
/*0570*/ LDG.E R12, [R6.64+0x34] ; /* 0x00003404060c7981 */
/* 0x000f28000c1e1900 */
/*0580*/ LDG.E R15, [R8.64+0x34] ; /* 0x00003404080f7981 */
/* 0x002f24000c1e1900 */
/*0590*/ FADD R15, R12, R15 ; /* 0x0000000f0c0f7221 */
/* 0x010fca0000000000 */
/*05a0*/ STG.E [R10.64+0x34], R15 ; /* 0x0000340f0a007986 */
/* 0x0001e8000c101904 */
/*05b0*/ LDG.E R12, [R6.64+0x38] ; /* 0x00003804060c7981 */
/* 0x000f28000c1e1900 */
/*05c0*/ LDG.E R17, [R8.64+0x38] ; /* 0x0000380408117981 */
/* 0x004f22000c1e1900 */
/*05d0*/ IADD3 R3, R3, -0x10, RZ ; /* 0xfffffff003037810 */
/* 0x000fe20007ffe0ff */
/*05e0*/ FADD R17, R12, R17 ; /* 0x000000110c117221 */
/* 0x010fca0000000000 */
/*05f0*/ STG.E [R10.64+0x38], R17 ; /* 0x000038110a007986 */
/* 0x0001e8000c101904 */
/*0600*/ LDG.E R12, [R6.64+0x3c] ; /* 0x00003c04060c7981 */
/* 0x000ea8000c1e1900 */
/*0610*/ LDG.E R19, [R8.64+0x3c] ; /* 0x00003c0408137981 */
/* 0x008ea2000c1e1900 */
/*0620*/ ISETP.GT.AND P1, PT, R3, 0xc, PT ; /* 0x0000000c0300780c */
/* 0x000fe20003f24270 */
/*0630*/ UIADD3 UR6, UP0, UR6, 0x40, URZ ; /* 0x0000004006067890 */
/* 0x000fc4000ff1e03f */
/*0640*/ UIADD3 UR8, UP1, UR8, 0x40, URZ ; /* 0x0000004008087890 */
/* 0x000fe4000ff3e03f */
/*0650*/ UIADD3 UR10, UP2, UR10, 0x40, URZ ; /* 0x000000400a0a7890 */
/* 0x000fe4000ff5e03f */
/*0660*/ UIADD3.X UR7, URZ, UR7, URZ, UP0, !UPT ; /* 0x000000073f077290 */
/* 0x000fe400087fe43f */
/*0670*/ UIADD3.X UR9, URZ, UR9, URZ, UP1, !UPT ; /* 0x000000093f097290 */
/* 0x000fe40008ffe43f */
/*0680*/ UIADD3.X UR11, URZ, UR11, URZ, UP2, !UPT ; /* 0x0000000b3f0b7290 */
/* 0x000fe200097fe43f */
/*0690*/ IADD3 R5, R5, 0x10, RZ ; /* 0x0000001005057810 */
/* 0x000fe20007ffe0ff */
/*06a0*/ FADD R19, R12, R19 ; /* 0x000000130c137221 */
/* 0x004fca0000000000 */
/*06b0*/ STG.E [R10.64+0x3c], R19 ; /* 0x00003c130a007986 */
/* 0x0001e2000c101904 */
/*06c0*/ @P1 BRA 0x1a0 ; /* 0xfffffad000001947 */
/* 0x000fea000383ffff */
/*06d0*/ ISETP.GT.AND P1, PT, R3, 0x4, PT ; /* 0x000000040300780c */
/* 0x000fda0003f24270 */
/*06e0*/ @!P1 BRA 0xa10 ; /* 0x0000032000009947 */
/* 0x000fea0003800000 */
/*06f0*/ MOV R8, UR10 ; /* 0x0000000a00087c02 */
/* 0x000fe20008000f00 */
/*0700*/ IMAD.U32 R9, RZ, RZ, UR11 ; /* 0x0000000bff097e24 */
/* 0x000fe2000f8e00ff */
/*0710*/ MOV R6, UR8 ; /* 0x0000000800067c02 */
/* 0x000fe40008000f00 */
/*0720*/ MOV R7, UR9 ; /* 0x0000000900077c02 */
/* 0x000fe20008000f00 */
/*0730*/ IMAD.WIDE R8, R4, 0x4, R8 ; /* 0x0000000404087825 */
/* 0x000fc800078e0208 */
/*0740*/ IMAD.WIDE R6, R4, 0x4, R6 ; /* 0x0000000404067825 */
/* 0x000fe200078e0206 */
/*0750*/ LDG.E R13, [R8.64] ; /* 0x00000004080d7981 */
/* 0x001ea8000c1e1900 */
/*0760*/ LDG.E R12, [R6.64] ; /* 0x00000004060c7981 */
/* 0x000ea2000c1e1900 */
/*0770*/ MOV R11, UR7 ; /* 0x00000007000b7c02 */
/* 0x000fe20008000f00 */
/*0780*/ IMAD.U32 R10, RZ, RZ, UR6 ; /* 0x00000006ff0a7e24 */
/* 0x000fc8000f8e00ff */
/*0790*/ IMAD.WIDE R10, R4, 0x4, R10 ; /* 0x00000004040a7825 */
/* 0x000fc800078e020a */
/*07a0*/ FADD R13, R12, R13 ; /* 0x0000000d0c0d7221 */
/* 0x004fca0000000000 */
/*07b0*/ STG.E [R10.64], R13 ; /* 0x0000000d0a007986 */
/* 0x0001e8000c101904 */
/*07c0*/ LDG.E R12, [R6.64+0x4] ; /* 0x00000404060c7981 */
/* 0x000ea8000c1e1900 */
/*07d0*/ LDG.E R15, [R8.64+0x4] ; /* 0x00000404080f7981 */
/* 0x000ea4000c1e1900 */
/*07e0*/ FADD R15, R12, R15 ; /* 0x0000000f0c0f7221 */
/* 0x004fca0000000000 */
/*07f0*/ STG.E [R10.64+0x4], R15 ; /* 0x0000040f0a007986 */
/* 0x0003e8000c101904 */
/*0800*/ LDG.E R12, [R6.64+0x8] ; /* 0x00000804060c7981 */
/* 0x000ea8000c1e1900 */
/*0810*/ LDG.E R17, [R8.64+0x8] ; /* 0x0000080408117981 */
/* 0x000ea4000c1e1900 */
/*0820*/ FADD R17, R12, R17 ; /* 0x000000110c117221 */
/* 0x004fca0000000000 */
/*0830*/ STG.E [R10.64+0x8], R17 ; /* 0x000008110a007986 */
/* 0x0005e8000c101904 */
/*0840*/ LDG.E R12, [R6.64+0xc] ; /* 0x00000c04060c7981 */
/* 0x000ee8000c1e1900 */
/*0850*/ LDG.E R19, [R8.64+0xc] ; /* 0x00000c0408137981 */
/* 0x000ee4000c1e1900 */
/*0860*/ FADD R19, R12, R19 ; /* 0x000000130c137221 */
/* 0x008fca0000000000 */
/*0870*/ STG.E [R10.64+0xc], R19 ; /* 0x00000c130a007986 */
/* 0x0007e8000c101904 */
/*0880*/ LDG.E R12, [R6.64+0x10] ; /* 0x00001004060c7981 */
/* 0x000f28000c1e1900 */
/*0890*/ LDG.E R13, [R8.64+0x10] ; /* 0x00001004080d7981 */
/* 0x001f24000c1e1900 */
/*08a0*/ FADD R13, R12, R13 ; /* 0x0000000d0c0d7221 */
/* 0x010fca0000000000 */
/*08b0*/ STG.E [R10.64+0x10], R13 ; /* 0x0000100d0a007986 */
/* 0x0001e8000c101904 */
/*08c0*/ LDG.E R12, [R6.64+0x14] ; /* 0x00001404060c7981 */
/* 0x000f28000c1e1900 */
/*08d0*/ LDG.E R15, [R8.64+0x14] ; /* 0x00001404080f7981 */
/* 0x002f24000c1e1900 */
/*08e0*/ FADD R15, R12, R15 ; /* 0x0000000f0c0f7221 */
/* 0x010fca0000000000 */
/*08f0*/ STG.E [R10.64+0x14], R15 ; /* 0x0000140f0a007986 */
/* 0x0001e8000c101904 */
/*0900*/ LDG.E R12, [R6.64+0x18] ; /* 0x00001804060c7981 */
/* 0x000f28000c1e1900 */
/*0910*/ LDG.E R17, [R8.64+0x18] ; /* 0x0000180408117981 */
/* 0x004f24000c1e1900 */
/*0920*/ FADD R17, R12, R17 ; /* 0x000000110c117221 */
/* 0x010fca0000000000 */
/*0930*/ STG.E [R10.64+0x18], R17 ; /* 0x000018110a007986 */
/* 0x0001e8000c101904 */
/*0940*/ LDG.E R12, [R6.64+0x1c] ; /* 0x00001c04060c7981 */
/* 0x000ea8000c1e1900 */
/*0950*/ LDG.E R19, [R8.64+0x1c] ; /* 0x00001c0408137981 */
/* 0x008ea2000c1e1900 */
/*0960*/ UIADD3 UR6, UP0, UR6, 0x20, URZ ; /* 0x0000002006067890 */
/* 0x000fe2000ff1e03f */
/*0970*/ PLOP3.LUT P0, PT, PT, PT, PT, 0x8, 0x0 ; /* 0x000000000000781c */
/* 0x000fe20003f0e170 */
/*0980*/ UIADD3 UR8, UP1, UR8, 0x20, URZ ; /* 0x0000002008087890 */
/* 0x000fe2000ff3e03f */
/*0990*/ IADD3 R5, R5, 0x8, RZ ; /* 0x0000000805057810 */
/* 0x000fe20007ffe0ff */
/*09a0*/ UIADD3 UR10, UP2, UR10, 0x20, URZ ; /* 0x000000200a0a7890 */
/* 0x000fe2000ff5e03f */
/*09b0*/ IADD3 R3, R3, -0x8, RZ ; /* 0xfffffff803037810 */
/* 0x000fe20007ffe0ff */
/*09c0*/ UIADD3.X UR7, URZ, UR7, URZ, UP0, !UPT ; /* 0x000000073f077290 */
/* 0x000fc400087fe43f */
/*09d0*/ UIADD3.X UR9, URZ, UR9, URZ, UP1, !UPT ; /* 0x000000093f097290 */
/* 0x000fe40008ffe43f */
/*09e0*/ UIADD3.X UR11, URZ, UR11, URZ, UP2, !UPT ; /* 0x0000000b3f0b7290 */
/* 0x000fe200097fe43f */
/*09f0*/ FADD R19, R12, R19 ; /* 0x000000130c137221 */
/* 0x004fca0000000000 */
/*0a00*/ STG.E [R10.64+0x1c], R19 ; /* 0x00001c130a007986 */
/* 0x0001e8000c101904 */
/*0a10*/ ISETP.NE.OR P0, PT, R3, RZ, P0 ; /* 0x000000ff0300720c */
/* 0x000fda0000705670 */
/*0a20*/ @!P0 BRA 0xc60 ; /* 0x0000023000008947 */
/* 0x000fea0003800000 */
/*0a30*/ MOV R8, UR10 ; /* 0x0000000a00087c02 */
/* 0x000fe20008000f00 */
/*0a40*/ IMAD.U32 R9, RZ, RZ, UR11 ; /* 0x0000000bff097e24 */
/* 0x000fe2000f8e00ff */
/*0a50*/ MOV R6, UR8 ; /* 0x0000000800067c02 */
/* 0x000fe40008000f00 */
/*0a60*/ MOV R7, UR9 ; /* 0x0000000900077c02 */
/* 0x000fe20008000f00 */
/*0a70*/ IMAD.WIDE R8, R4, 0x4, R8 ; /* 0x0000000404087825 */
/* 0x000fc800078e0208 */
/*0a80*/ IMAD.WIDE R6, R4, 0x4, R6 ; /* 0x0000000404067825 */
/* 0x000fe200078e0206 */
/*0a90*/ LDG.E R13, [R8.64] ; /* 0x00000004080d7981 */
/* 0x001ea8000c1e1900 */
/*0aa0*/ LDG.E R12, [R6.64] ; /* 0x00000004060c7981 */
/* 0x000ea2000c1e1900 */
/*0ab0*/ MOV R10, UR6 ; /* 0x00000006000a7c02 */
/* 0x000fe20008000f00 */
/*0ac0*/ IMAD.U32 R11, RZ, RZ, UR7 ; /* 0x00000007ff0b7e24 */
/* 0x000fc8000f8e00ff */
/*0ad0*/ IMAD.WIDE R10, R4, 0x4, R10 ; /* 0x00000004040a7825 */
/* 0x000fc800078e020a */
/*0ae0*/ FADD R13, R12, R13 ; /* 0x0000000d0c0d7221 */
/* 0x004fca0000000000 */
/*0af0*/ STG.E [R10.64], R13 ; /* 0x0000000d0a007986 */
/* 0x0001e8000c101904 */
/*0b00*/ LDG.E R12, [R6.64+0x4] ; /* 0x00000404060c7981 */
/* 0x000ea8000c1e1900 */
/*0b10*/ LDG.E R15, [R8.64+0x4] ; /* 0x00000404080f7981 */
/* 0x000ea4000c1e1900 */
/*0b20*/ FADD R15, R12, R15 ; /* 0x0000000f0c0f7221 */
/* 0x004fca0000000000 */
/*0b30*/ STG.E [R10.64+0x4], R15 ; /* 0x0000040f0a007986 */
/* 0x0001e8000c101904 */
/*0b40*/ LDG.E R12, [R6.64+0x8] ; /* 0x00000804060c7981 */
/* 0x000ea8000c1e1900 */
/*0b50*/ LDG.E R17, [R8.64+0x8] ; /* 0x0000080408117981 */
/* 0x000ea2000c1e1900 */
/*0b60*/ IADD3 R3, R3, -0x4, RZ ; /* 0xfffffffc03037810 */
/* 0x000fe20007ffe0ff */
/*0b70*/ FADD R17, R12, R17 ; /* 0x000000110c117221 */
/* 0x004fca0000000000 */
/*0b80*/ STG.E [R10.64+0x8], R17 ; /* 0x000008110a007986 */
/* 0x0001e8000c101904 */
/*0b90*/ LDG.E R12, [R6.64+0xc] ; /* 0x00000c04060c7981 */
/* 0x000ea8000c1e1900 */
/*0ba0*/ LDG.E R19, [R8.64+0xc] ; /* 0x00000c0408137981 */
/* 0x000ea2000c1e1900 */
/*0bb0*/ ISETP.NE.AND P0, PT, R3, RZ, PT ; /* 0x000000ff0300720c */
/* 0x000fe20003f05270 */
/*0bc0*/ UIADD3 UR6, UP0, UR6, 0x10, URZ ; /* 0x0000001006067890 */
/* 0x000fc4000ff1e03f */
/*0bd0*/ UIADD3 UR8, UP1, UR8, 0x10, URZ ; /* 0x0000001008087890 */
/* 0x000fe4000ff3e03f */
/*0be0*/ UIADD3 UR10, UP2, UR10, 0x10, URZ ; /* 0x000000100a0a7890 */
/* 0x000fe4000ff5e03f */
/*0bf0*/ UIADD3.X UR7, URZ, UR7, URZ, UP0, !UPT ; /* 0x000000073f077290 */
/* 0x000fe400087fe43f */
/*0c00*/ UIADD3.X UR9, URZ, UR9, URZ, UP1, !UPT ; /* 0x000000093f097290 */
/* 0x000fe40008ffe43f */
/*0c10*/ UIADD3.X UR11, URZ, UR11, URZ, UP2, !UPT ; /* 0x0000000b3f0b7290 */
/* 0x000fe200097fe43f */
/*0c20*/ IADD3 R5, R5, 0x4, RZ ; /* 0x0000000405057810 */
/* 0x000fe20007ffe0ff */
/*0c30*/ FADD R19, R12, R19 ; /* 0x000000130c137221 */
/* 0x004fca0000000000 */
/*0c40*/ STG.E [R10.64+0xc], R19 ; /* 0x00000c130a007986 */
/* 0x0001e4000c101904 */
/*0c50*/ @P0 BRA 0xa30 ; /* 0xfffffdd000000947 */
/* 0x001fea000383ffff */
/*0c60*/ ISETP.NE.AND P0, PT, R0, RZ, PT ; /* 0x000000ff0000720c */
/* 0x000fda0003f05270 */
/*0c70*/ @!P0 EXIT ; /* 0x000000000000894d */
/* 0x000fea0003800000 */
/*0c80*/ HFMA2.MMA R7, -RZ, RZ, 0, 2.384185791015625e-07 ; /* 0x00000004ff077435 */
/* 0x000fe200000001ff */
/*0c90*/ IMAD R6, R2, c[0x0][0x17c], R5 ; /* 0x00005f0002067a24 */
/* 0x000fd200078e0205 */
/*0ca0*/ IMAD.WIDE R2, R6, R7, c[0x0][0x170] ; /* 0x00005c0006027625 */
/* 0x000fc800078e0207 */
/*0cb0*/ IMAD.WIDE R4, R6.reuse, R7, c[0x0][0x168] ; /* 0x00005a0006047625 */
/* 0x040fe200078e0207 */
/*0cc0*/ MOV R10, R2 ; /* 0x00000002000a7202 */
/* 0x001fe40000000f00 */
/*0cd0*/ MOV R13, R3 ; /* 0x00000003000d7202 */
/* 0x000fe20000000f00 */
/*0ce0*/ IMAD.WIDE R6, R6, R7, c[0x0][0x160] ; /* 0x0000580006067625 */
/* 0x000fe200078e0207 */
/*0cf0*/ MOV R11, R5 ; /* 0x00000005000b7202 */
/* 0x000fc60000000f00 */
/*0d00*/ IMAD.MOV.U32 R8, RZ, RZ, R4 ; /* 0x000000ffff087224 */
/* 0x000fe200078e0004 */
/*0d10*/ MOV R9, R7 ; /* 0x0000000700097202 */
/* 0x000fc80000000f00 */
/*0d20*/ MOV R2, R8 ; /* 0x0000000800027202 */
/* 0x001fe20000000f00 */
/*0d30*/ IMAD.MOV.U32 R3, RZ, RZ, R11 ; /* 0x000000ffff037224 */
/* 0x000fe200078e000b */
/*0d40*/ MOV R5, R9 ; /* 0x0000000900057202 */
/* 0x000fe40000000f00 */
/*0d50*/ MOV R4, R6 ; /* 0x0000000600047202 */
/* 0x000fe40000000f00 */
/*0d60*/ LDG.E R2, [R2.64] ; /* 0x0000000402027981 */
/* 0x0000a8000c1e1900 */
/*0d70*/ LDG.E R5, [R4.64] ; /* 0x0000000404057981 */
/* 0x000ea2000c1e1900 */
/*0d80*/ IADD3 R0, R0, -0x1, RZ ; /* 0xffffffff00007810 */
/* 0x000fc40007ffe0ff */
/*0d90*/ IADD3 R8, P2, R8, 0x4, RZ ; /* 0x0000000408087810 */
/* 0x000fe40007f5e0ff */
/*0da0*/ ISETP.NE.AND P0, PT, R0, RZ, PT ; /* 0x000000ff0000720c */
/* 0x000fe20003f05270 */
/*0db0*/ IMAD.MOV.U32 R3, RZ, RZ, R13 ; /* 0x000000ffff037224 */
/* 0x001fe200078e000d */
/*0dc0*/ IADD3 R6, P3, R6, 0x4, RZ ; /* 0x0000000406067810 */
/* 0x000fe40007f7e0ff */
/*0dd0*/ IADD3.X R11, RZ, R11, RZ, P2, !PT ; /* 0x0000000bff0b7210 */
/* 0x000fe400017fe4ff */
/*0de0*/ IADD3.X R9, RZ, R9, RZ, P3, !PT ; /* 0x00000009ff097210 */
/* 0x000fe20001ffe4ff */
/*0df0*/ FADD R7, R2, R5 ; /* 0x0000000502077221 */
/* 0x004fe20000000000 */
/*0e00*/ MOV R2, R10 ; /* 0x0000000a00027202 */
/* 0x000fc40000000f00 */
/*0e10*/ IADD3 R10, P1, R10, 0x4, RZ ; /* 0x000000040a0a7810 */
/* 0x000fc60007f3e0ff */
/*0e20*/ STG.E [R2.64], R7 ; /* 0x0000000702007986 */
/* 0x0001e2000c101904 */
/*0e30*/ IADD3.X R13, RZ, R13, RZ, P1, !PT ; /* 0x0000000dff0d7210 */
/* 0x000fe20000ffe4ff */
/*0e40*/ @P0 BRA 0xd20 ; /* 0xfffffed000000947 */
/* 0x000fea000383ffff */
/*0e50*/ EXIT ; /* 0x000000000000794d */
/* 0x000fea0003800000 */
/*0e60*/ BRA 0xe60; /* 0xfffffff000007947 */
/* 0x000fc0000383ffff */
/*0e70*/ NOP; /* 0x0000000000007918 */
/* 0x000fc00000000000 */
/*0e80*/ NOP; /* 0x0000000000007918 */
/* 0x000fc00000000000 */
/*0e90*/ NOP; /* 0x0000000000007918 */
/* 0x000fc00000000000 */
/*0ea0*/ NOP; /* 0x0000000000007918 */
/* 0x000fc00000000000 */
/*0eb0*/ NOP; /* 0x0000000000007918 */
/* 0x000fc00000000000 */
/*0ec0*/ NOP; /* 0x0000000000007918 */
/* 0x000fc00000000000 */
/*0ed0*/ NOP; /* 0x0000000000007918 */
/* 0x000fc00000000000 */
/*0ee0*/ NOP; /* 0x0000000000007918 */
/* 0x000fc00000000000 */
/*0ef0*/ NOP; /* 0x0000000000007918 */
/* 0x000fc00000000000 */
.......... |
You are a helpful coding assistant specialized in converting CUDA source code to CUDA host assembly. | #include <stdlib.h>
#include <stdio.h>
#include <time.h>
#include <math.h>
__global__ void VecAdd(float* A, float* B, float*
C, int N_op,int op_loop){
// N_op : no of total ops
// op_loop: no of ops to do in a loop
// Host code
int j;
int i = blockDim.x * blockIdx.x + threadIdx.x;
if (i < N_op){
for (j=0;j<op_loop;j++){
C[i*op_loop+j] = A[i*op_loop+j] + B[i*op_loop+j];
}
}
}
int main(int argc,char **argv) {
//printf("Usage example. \n./ee16b068_456.out <threads_per_block> <ops_per_thread> <vector_size> <filename1> <filename2>");
if (argc<5){
//printf("Too few arguments.\nUsage is ./ee16b068_456.out <threads_per_block> <ops_per_thread> <vector_size> <filename1> <filename2> ");
return 1;
}
int threadsPerBlock_op=atoi(argv[1]);
int op_loop=atoi(argv[2]);
//int N = pow(2,atoi(argv[3]));
int N = atoi(argv[3]);
FILE *arrayfile_a;
FILE *arrayfile_b;
size_t size = N * sizeof(float);
//Helper variables
int loop;
float time_spent;
//files
arrayfile_a = fopen(argv[4], "r");
arrayfile_b = fopen(argv[5], "r");
// Allocate input vectors h_A and h_B in host memory
float* h_A = (float*)malloc(size);
float* h_B = (float*)malloc(size);
float* h_C = (float*)malloc(size);
// Read first two arrays
//printf("\nArray A (first 10 values) \n ");
for (loop = 0; loop < N; loop++)
{
fscanf(arrayfile_a, "%f", &h_A[loop]);
//if (loop<10){
// printf("%f ", h_A[loop]);
//}
}
//printf("\nArray B (first 10 values) \n ");
for (loop = 0; loop < N; loop++)
{
fscanf(arrayfile_b, "%f", &h_B[loop]);
//if (loop<10){
//printf("%f ", h_B[loop]);
//}
}
// Allocate vectors in device memory
float* d_A; cudaMalloc(&d_A, size);
float* d_B; cudaMalloc(&d_B, size);
float* d_C; cudaMalloc(&d_C, size);
//GPU timing
cudaEvent_t start, stop;
cudaEventCreate(&start);
cudaEventCreate(&stop);
// Copy vectors from host memory to device memory
cudaMemcpy(d_A, h_A, size,cudaMemcpyHostToDevice);
cudaMemcpy(d_B, h_B, size,cudaMemcpyHostToDevice);
//ops per loop
//printf("Ops per loop %d\n",op_loop);
//printf("Threads per Block %d\n",threadsPerBlock_op);
//printf("Vector Size %d\n",op_loop);
// Invoke kernel
int threadsPerBlock = threadsPerBlock_op;
int N_op=(N + op_loop -1)/op_loop;
int blocksPerGrid = (N_op + threadsPerBlock - 1) /threadsPerBlock;
cudaEventRecord(start, 0);
VecAdd<<<blocksPerGrid, threadsPerBlock>>>(d_A,d_B, d_C, N_op,op_loop);
cudaEventRecord(stop, 0);
// h_C contains the result in host memory
cudaMemcpy(h_C, d_C, size,cudaMemcpyDeviceToHost);
//printf("\nArray C (first 10 outputs)\n");
//for(loop = 0; loop < 10; loop++)
// printf("%f ", h_C[loop]);
cudaEventSynchronize(stop);
cudaEventElapsedTime(&time_spent, start, stop);
printf("%f",time_spent);
// Free device memory
cudaFree(d_A);
cudaFree(d_B);
cudaFree(d_C);
// Free host memory
free(h_A);
free(h_B);
return 0;
} | .file "tmpxft_001af97e_00000000-6_ee16b068_456.cudafe1.cpp"
.text
#APP
#NO_APP
.type _ZL26__cudaUnregisterBinaryUtilv, @function
_ZL26__cudaUnregisterBinaryUtilv:
.LFB2060:
.cfi_startproc
endbr64
subq $8, %rsp
.cfi_def_cfa_offset 16
movq _ZL20__cudaFatCubinHandle(%rip), %rdi
call __cudaUnregisterFatBinary@PLT
addq $8, %rsp
.cfi_def_cfa_offset 8
ret
.cfi_endproc
.LFE2060:
.size _ZL26__cudaUnregisterBinaryUtilv, .-_ZL26__cudaUnregisterBinaryUtilv
.globl _Z31__device_stub__Z6VecAddPfS_S_iiPfS_S_ii
.type _Z31__device_stub__Z6VecAddPfS_S_iiPfS_S_ii, @function
_Z31__device_stub__Z6VecAddPfS_S_iiPfS_S_ii:
.LFB2082:
.cfi_startproc
endbr64
subq $152, %rsp
.cfi_def_cfa_offset 160
movq %rdi, 24(%rsp)
movq %rsi, 16(%rsp)
movq %rdx, 8(%rsp)
movl %ecx, 4(%rsp)
movl %r8d, (%rsp)
movq %fs:40, %rax
movq %rax, 136(%rsp)
xorl %eax, %eax
leaq 24(%rsp), %rax
movq %rax, 96(%rsp)
leaq 16(%rsp), %rax
movq %rax, 104(%rsp)
leaq 8(%rsp), %rax
movq %rax, 112(%rsp)
leaq 4(%rsp), %rax
movq %rax, 120(%rsp)
movq %rsp, %rax
movq %rax, 128(%rsp)
movl $1, 48(%rsp)
movl $1, 52(%rsp)
movl $1, 56(%rsp)
movl $1, 60(%rsp)
movl $1, 64(%rsp)
movl $1, 68(%rsp)
leaq 40(%rsp), %rcx
leaq 32(%rsp), %rdx
leaq 60(%rsp), %rsi
leaq 48(%rsp), %rdi
call __cudaPopCallConfiguration@PLT
testl %eax, %eax
je .L7
.L3:
movq 136(%rsp), %rax
subq %fs:40, %rax
jne .L8
addq $152, %rsp
.cfi_remember_state
.cfi_def_cfa_offset 8
ret
.L7:
.cfi_restore_state
pushq 40(%rsp)
.cfi_def_cfa_offset 168
pushq 40(%rsp)
.cfi_def_cfa_offset 176
leaq 112(%rsp), %r9
movq 76(%rsp), %rcx
movl 84(%rsp), %r8d
movq 64(%rsp), %rsi
movl 72(%rsp), %edx
leaq _Z6VecAddPfS_S_ii(%rip), %rdi
call cudaLaunchKernel@PLT
addq $16, %rsp
.cfi_def_cfa_offset 160
jmp .L3
.L8:
call __stack_chk_fail@PLT
.cfi_endproc
.LFE2082:
.size _Z31__device_stub__Z6VecAddPfS_S_iiPfS_S_ii, .-_Z31__device_stub__Z6VecAddPfS_S_iiPfS_S_ii
.globl _Z6VecAddPfS_S_ii
.type _Z6VecAddPfS_S_ii, @function
_Z6VecAddPfS_S_ii:
.LFB2083:
.cfi_startproc
endbr64
subq $8, %rsp
.cfi_def_cfa_offset 16
call _Z31__device_stub__Z6VecAddPfS_S_iiPfS_S_ii
addq $8, %rsp
.cfi_def_cfa_offset 8
ret
.cfi_endproc
.LFE2083:
.size _Z6VecAddPfS_S_ii, .-_Z6VecAddPfS_S_ii
.section .rodata.str1.1,"aMS",@progbits,1
.LC0:
.string "r"
.LC1:
.string "%f"
.text
.globl main
.type main, @function
main:
.LFB2057:
.cfi_startproc
endbr64
pushq %r15
.cfi_def_cfa_offset 16
.cfi_offset 15, -16
pushq %r14
.cfi_def_cfa_offset 24
.cfi_offset 14, -24
pushq %r13
.cfi_def_cfa_offset 32
.cfi_offset 13, -32
pushq %r12
.cfi_def_cfa_offset 40
.cfi_offset 12, -40
pushq %rbp
.cfi_def_cfa_offset 48
.cfi_offset 6, -48
pushq %rbx
.cfi_def_cfa_offset 56
.cfi_offset 3, -56
subq $152, %rsp
.cfi_def_cfa_offset 208
movq %fs:40, %rax
movq %rax, 136(%rsp)
xorl %eax, %eax
movl $1, %eax
cmpl $4, %edi
jg .L22
.L11:
movq 136(%rsp), %rdx
subq %fs:40, %rdx
jne .L23
addq $152, %rsp
.cfi_remember_state
.cfi_def_cfa_offset 56
popq %rbx
.cfi_def_cfa_offset 48
popq %rbp
.cfi_def_cfa_offset 40
popq %r12
.cfi_def_cfa_offset 32
popq %r13
.cfi_def_cfa_offset 24
popq %r14
.cfi_def_cfa_offset 16
popq %r15
.cfi_def_cfa_offset 8
ret
.L22:
.cfi_restore_state
movq %rsi, %rbx
movq 8(%rsi), %rdi
movl $10, %edx
movl $0, %esi
call __isoc23_strtol@PLT
movq %rax, 40(%rsp)
movl %eax, 52(%rsp)
movq 16(%rbx), %rdi
movl $10, %edx
movl $0, %esi
call __isoc23_strtol@PLT
movq %rax, 16(%rsp)
movl %eax, 48(%rsp)
movq 24(%rbx), %rdi
movl $10, %edx
movl $0, %esi
call __isoc23_strtol@PLT
movq %rax, %r15
movq %rax, 32(%rsp)
movslq %eax, %rbp
salq $2, %rbp
movq 32(%rbx), %rdi
leaq .LC0(%rip), %r12
movq %r12, %rsi
call fopen@PLT
movq %rax, %r13
movq 40(%rbx), %rdi
movq %r12, %rsi
call fopen@PLT
movq %rax, %r12
movq %rbp, %rdi
call malloc@PLT
movq %rax, %rbx
movq %rax, 8(%rsp)
movq %rbp, %rdi
call malloc@PLT
movq %rax, (%rsp)
movq %rbp, %rdi
call malloc@PLT
movq %rax, 24(%rsp)
testl %r15d, %r15d
jle .L13
leal -1(%r15), %eax
salq $2, %rax
leaq 4(%rbx,%rax), %r15
leaq .LC1(%rip), %r14
movq %rbp, 56(%rsp)
movq %rax, %rbp
.L14:
movq %rbx, %rdx
movq %r14, %rsi
movq %r13, %rdi
movl $0, %eax
call __isoc23_fscanf@PLT
addq $4, %rbx
cmpq %r15, %rbx
jne .L14
movq %rbp, %rax
movq 56(%rsp), %rbp
movq (%rsp), %rcx
movq %rcx, %rbx
leaq 4(%rcx,%rax), %r14
leaq .LC1(%rip), %r13
.L15:
movq %rbx, %rdx
movq %r13, %rsi
movq %r12, %rdi
movl $0, %eax
call __isoc23_fscanf@PLT
addq $4, %rbx
cmpq %r14, %rbx
jne .L15
.L13:
leaq 72(%rsp), %rdi
movq %rbp, %rsi
call cudaMalloc@PLT
leaq 80(%rsp), %rdi
movq %rbp, %rsi
call cudaMalloc@PLT
leaq 88(%rsp), %rdi
movq %rbp, %rsi
call cudaMalloc@PLT
leaq 96(%rsp), %rdi
call cudaEventCreate@PLT
leaq 104(%rsp), %rdi
call cudaEventCreate@PLT
movl $1, %ecx
movq %rbp, %rdx
movq 8(%rsp), %rsi
movq 72(%rsp), %rdi
call cudaMemcpy@PLT
movl $1, %ecx
movq %rbp, %rdx
movq (%rsp), %rsi
movq 80(%rsp), %rdi
call cudaMemcpy@PLT
movq 16(%rsp), %rax
movq 32(%rsp), %rcx
leal -1(%rax,%rcx), %eax
cltd
idivl 48(%rsp)
movl %eax, %ebx
movq 40(%rsp), %r15
leal -1(%rax,%r15), %eax
cltd
idivl 52(%rsp)
movl %eax, %r12d
movl $0, %esi
movq 96(%rsp), %rdi
call cudaEventRecord@PLT
movl %r15d, 124(%rsp)
movl $1, 128(%rsp)
movl $1, 132(%rsp)
movl %r12d, 112(%rsp)
movl $1, 116(%rsp)
movl $0, %r9d
movl $0, %r8d
movq 124(%rsp), %rdx
movl $1, %ecx
movq 112(%rsp), %rdi
movl $1, %esi
call __cudaPushCallConfiguration@PLT
testl %eax, %eax
je .L24
.L16:
movl $0, %esi
movq 104(%rsp), %rdi
call cudaEventRecord@PLT
movl $2, %ecx
movq %rbp, %rdx
movq 88(%rsp), %rsi
movq 24(%rsp), %rdi
call cudaMemcpy@PLT
movq 104(%rsp), %rdi
call cudaEventSynchronize@PLT
leaq 124(%rsp), %rdi
movq 104(%rsp), %rdx
movq 96(%rsp), %rsi
call cudaEventElapsedTime@PLT
pxor %xmm0, %xmm0
cvtss2sd 124(%rsp), %xmm0
leaq .LC1(%rip), %rsi
movl $2, %edi
movl $1, %eax
call __printf_chk@PLT
movq 72(%rsp), %rdi
call cudaFree@PLT
movq 80(%rsp), %rdi
call cudaFree@PLT
movq 88(%rsp), %rdi
call cudaFree@PLT
movq 8(%rsp), %rdi
call free@PLT
movq (%rsp), %rdi
call free@PLT
movl $0, %eax
jmp .L11
.L24:
movl 16(%rsp), %r8d
movl %ebx, %ecx
movq 88(%rsp), %rdx
movq 80(%rsp), %rsi
movq 72(%rsp), %rdi
call _Z31__device_stub__Z6VecAddPfS_S_iiPfS_S_ii
jmp .L16
.L23:
call __stack_chk_fail@PLT
.cfi_endproc
.LFE2057:
.size main, .-main
.section .rodata.str1.1
.LC2:
.string "_Z6VecAddPfS_S_ii"
.text
.type _ZL24__sti____cudaRegisterAllv, @function
_ZL24__sti____cudaRegisterAllv:
.LFB2085:
.cfi_startproc
endbr64
subq $8, %rsp
.cfi_def_cfa_offset 16
leaq _ZL15__fatDeviceText(%rip), %rdi
call __cudaRegisterFatBinary@PLT
movq %rax, %rdi
movq %rax, _ZL20__cudaFatCubinHandle(%rip)
pushq $0
.cfi_def_cfa_offset 24
pushq $0
.cfi_def_cfa_offset 32
pushq $0
.cfi_def_cfa_offset 40
pushq $0
.cfi_def_cfa_offset 48
movl $0, %r9d
movl $-1, %r8d
leaq .LC2(%rip), %rdx
movq %rdx, %rcx
leaq _Z6VecAddPfS_S_ii(%rip), %rsi
call __cudaRegisterFunction@PLT
addq $32, %rsp
.cfi_def_cfa_offset 16
movq _ZL20__cudaFatCubinHandle(%rip), %rdi
call __cudaRegisterFatBinaryEnd@PLT
leaq _ZL26__cudaUnregisterBinaryUtilv(%rip), %rdi
call atexit@PLT
addq $8, %rsp
.cfi_def_cfa_offset 8
ret
.cfi_endproc
.LFE2085:
.size _ZL24__sti____cudaRegisterAllv, .-_ZL24__sti____cudaRegisterAllv
.section .init_array,"aw"
.align 8
.quad _ZL24__sti____cudaRegisterAllv
.section .nvFatBinSegment,"aw"
.align 8
.type _ZL15__fatDeviceText, @object
.size _ZL15__fatDeviceText, 24
_ZL15__fatDeviceText:
.long 1180844977
.long 1
.quad fatbinData
.quad 0
.local _ZL20__cudaFatCubinHandle
.comm _ZL20__cudaFatCubinHandle,8,8
.ident "GCC: (Ubuntu 13.3.0-6ubuntu2~24.04) 13.3.0"
.section .note.GNU-stack,"",@progbits
.section .note.gnu.property,"a"
.align 8
.long 1f - 0f
.long 4f - 1f
.long 5
0:
.string "GNU"
1:
.align 8
.long 0xc0000002
.long 3f - 2f
2:
.long 0x3
3:
.align 8
4: |
You are a helpful coding assistant specialized in converting CUDA source code to HIP/AMD source code. | #include <stdlib.h>
#include <stdio.h>
#include <time.h>
#include <math.h>
__global__ void VecAdd(float* A, float* B, float*
C, int N_op,int op_loop){
// N_op : no of total ops
// op_loop: no of ops to do in a loop
// Host code
int j;
int i = blockDim.x * blockIdx.x + threadIdx.x;
if (i < N_op){
for (j=0;j<op_loop;j++){
C[i*op_loop+j] = A[i*op_loop+j] + B[i*op_loop+j];
}
}
}
int main(int argc,char **argv) {
//printf("Usage example. \n./ee16b068_456.out <threads_per_block> <ops_per_thread> <vector_size> <filename1> <filename2>");
if (argc<5){
//printf("Too few arguments.\nUsage is ./ee16b068_456.out <threads_per_block> <ops_per_thread> <vector_size> <filename1> <filename2> ");
return 1;
}
int threadsPerBlock_op=atoi(argv[1]);
int op_loop=atoi(argv[2]);
//int N = pow(2,atoi(argv[3]));
int N = atoi(argv[3]);
FILE *arrayfile_a;
FILE *arrayfile_b;
size_t size = N * sizeof(float);
//Helper variables
int loop;
float time_spent;
//files
arrayfile_a = fopen(argv[4], "r");
arrayfile_b = fopen(argv[5], "r");
// Allocate input vectors h_A and h_B in host memory
float* h_A = (float*)malloc(size);
float* h_B = (float*)malloc(size);
float* h_C = (float*)malloc(size);
// Read first two arrays
//printf("\nArray A (first 10 values) \n ");
for (loop = 0; loop < N; loop++)
{
fscanf(arrayfile_a, "%f", &h_A[loop]);
//if (loop<10){
// printf("%f ", h_A[loop]);
//}
}
//printf("\nArray B (first 10 values) \n ");
for (loop = 0; loop < N; loop++)
{
fscanf(arrayfile_b, "%f", &h_B[loop]);
//if (loop<10){
//printf("%f ", h_B[loop]);
//}
}
// Allocate vectors in device memory
float* d_A; cudaMalloc(&d_A, size);
float* d_B; cudaMalloc(&d_B, size);
float* d_C; cudaMalloc(&d_C, size);
//GPU timing
cudaEvent_t start, stop;
cudaEventCreate(&start);
cudaEventCreate(&stop);
// Copy vectors from host memory to device memory
cudaMemcpy(d_A, h_A, size,cudaMemcpyHostToDevice);
cudaMemcpy(d_B, h_B, size,cudaMemcpyHostToDevice);
//ops per loop
//printf("Ops per loop %d\n",op_loop);
//printf("Threads per Block %d\n",threadsPerBlock_op);
//printf("Vector Size %d\n",op_loop);
// Invoke kernel
int threadsPerBlock = threadsPerBlock_op;
int N_op=(N + op_loop -1)/op_loop;
int blocksPerGrid = (N_op + threadsPerBlock - 1) /threadsPerBlock;
cudaEventRecord(start, 0);
VecAdd<<<blocksPerGrid, threadsPerBlock>>>(d_A,d_B, d_C, N_op,op_loop);
cudaEventRecord(stop, 0);
// h_C contains the result in host memory
cudaMemcpy(h_C, d_C, size,cudaMemcpyDeviceToHost);
//printf("\nArray C (first 10 outputs)\n");
//for(loop = 0; loop < 10; loop++)
// printf("%f ", h_C[loop]);
cudaEventSynchronize(stop);
cudaEventElapsedTime(&time_spent, start, stop);
printf("%f",time_spent);
// Free device memory
cudaFree(d_A);
cudaFree(d_B);
cudaFree(d_C);
// Free host memory
free(h_A);
free(h_B);
return 0;
} | #include <hip/hip_runtime.h>
#include <stdlib.h>
#include <stdio.h>
#include <time.h>
#include <math.h>
__global__ void VecAdd(float* A, float* B, float*
C, int N_op,int op_loop){
// N_op : no of total ops
// op_loop: no of ops to do in a loop
// Host code
int j;
int i = blockDim.x * blockIdx.x + threadIdx.x;
if (i < N_op){
for (j=0;j<op_loop;j++){
C[i*op_loop+j] = A[i*op_loop+j] + B[i*op_loop+j];
}
}
}
int main(int argc,char **argv) {
//printf("Usage example. \n./ee16b068_456.out <threads_per_block> <ops_per_thread> <vector_size> <filename1> <filename2>");
if (argc<5){
//printf("Too few arguments.\nUsage is ./ee16b068_456.out <threads_per_block> <ops_per_thread> <vector_size> <filename1> <filename2> ");
return 1;
}
int threadsPerBlock_op=atoi(argv[1]);
int op_loop=atoi(argv[2]);
//int N = pow(2,atoi(argv[3]));
int N = atoi(argv[3]);
FILE *arrayfile_a;
FILE *arrayfile_b;
size_t size = N * sizeof(float);
//Helper variables
int loop;
float time_spent;
//files
arrayfile_a = fopen(argv[4], "r");
arrayfile_b = fopen(argv[5], "r");
// Allocate input vectors h_A and h_B in host memory
float* h_A = (float*)malloc(size);
float* h_B = (float*)malloc(size);
float* h_C = (float*)malloc(size);
// Read first two arrays
//printf("\nArray A (first 10 values) \n ");
for (loop = 0; loop < N; loop++)
{
fscanf(arrayfile_a, "%f", &h_A[loop]);
//if (loop<10){
// printf("%f ", h_A[loop]);
//}
}
//printf("\nArray B (first 10 values) \n ");
for (loop = 0; loop < N; loop++)
{
fscanf(arrayfile_b, "%f", &h_B[loop]);
//if (loop<10){
//printf("%f ", h_B[loop]);
//}
}
// Allocate vectors in device memory
float* d_A; hipMalloc(&d_A, size);
float* d_B; hipMalloc(&d_B, size);
float* d_C; hipMalloc(&d_C, size);
//GPU timing
hipEvent_t start, stop;
hipEventCreate(&start);
hipEventCreate(&stop);
// Copy vectors from host memory to device memory
hipMemcpy(d_A, h_A, size,hipMemcpyHostToDevice);
hipMemcpy(d_B, h_B, size,hipMemcpyHostToDevice);
//ops per loop
//printf("Ops per loop %d\n",op_loop);
//printf("Threads per Block %d\n",threadsPerBlock_op);
//printf("Vector Size %d\n",op_loop);
// Invoke kernel
int threadsPerBlock = threadsPerBlock_op;
int N_op=(N + op_loop -1)/op_loop;
int blocksPerGrid = (N_op + threadsPerBlock - 1) /threadsPerBlock;
hipEventRecord(start, 0);
VecAdd<<<blocksPerGrid, threadsPerBlock>>>(d_A,d_B, d_C, N_op,op_loop);
hipEventRecord(stop, 0);
// h_C contains the result in host memory
hipMemcpy(h_C, d_C, size,hipMemcpyDeviceToHost);
//printf("\nArray C (first 10 outputs)\n");
//for(loop = 0; loop < 10; loop++)
// printf("%f ", h_C[loop]);
hipEventSynchronize(stop);
hipEventElapsedTime(&time_spent, start, stop);
printf("%f",time_spent);
// Free device memory
hipFree(d_A);
hipFree(d_B);
hipFree(d_C);
// Free host memory
free(h_A);
free(h_B);
return 0;
} |
You are a helpful coding assistant specialized in converting HIP source code to AMD device assembly. | #include <hip/hip_runtime.h>
#include <stdlib.h>
#include <stdio.h>
#include <time.h>
#include <math.h>
__global__ void VecAdd(float* A, float* B, float*
C, int N_op,int op_loop){
// N_op : no of total ops
// op_loop: no of ops to do in a loop
// Host code
int j;
int i = blockDim.x * blockIdx.x + threadIdx.x;
if (i < N_op){
for (j=0;j<op_loop;j++){
C[i*op_loop+j] = A[i*op_loop+j] + B[i*op_loop+j];
}
}
}
int main(int argc,char **argv) {
//printf("Usage example. \n./ee16b068_456.out <threads_per_block> <ops_per_thread> <vector_size> <filename1> <filename2>");
if (argc<5){
//printf("Too few arguments.\nUsage is ./ee16b068_456.out <threads_per_block> <ops_per_thread> <vector_size> <filename1> <filename2> ");
return 1;
}
int threadsPerBlock_op=atoi(argv[1]);
int op_loop=atoi(argv[2]);
//int N = pow(2,atoi(argv[3]));
int N = atoi(argv[3]);
FILE *arrayfile_a;
FILE *arrayfile_b;
size_t size = N * sizeof(float);
//Helper variables
int loop;
float time_spent;
//files
arrayfile_a = fopen(argv[4], "r");
arrayfile_b = fopen(argv[5], "r");
// Allocate input vectors h_A and h_B in host memory
float* h_A = (float*)malloc(size);
float* h_B = (float*)malloc(size);
float* h_C = (float*)malloc(size);
// Read first two arrays
//printf("\nArray A (first 10 values) \n ");
for (loop = 0; loop < N; loop++)
{
fscanf(arrayfile_a, "%f", &h_A[loop]);
//if (loop<10){
// printf("%f ", h_A[loop]);
//}
}
//printf("\nArray B (first 10 values) \n ");
for (loop = 0; loop < N; loop++)
{
fscanf(arrayfile_b, "%f", &h_B[loop]);
//if (loop<10){
//printf("%f ", h_B[loop]);
//}
}
// Allocate vectors in device memory
float* d_A; hipMalloc(&d_A, size);
float* d_B; hipMalloc(&d_B, size);
float* d_C; hipMalloc(&d_C, size);
//GPU timing
hipEvent_t start, stop;
hipEventCreate(&start);
hipEventCreate(&stop);
// Copy vectors from host memory to device memory
hipMemcpy(d_A, h_A, size,hipMemcpyHostToDevice);
hipMemcpy(d_B, h_B, size,hipMemcpyHostToDevice);
//ops per loop
//printf("Ops per loop %d\n",op_loop);
//printf("Threads per Block %d\n",threadsPerBlock_op);
//printf("Vector Size %d\n",op_loop);
// Invoke kernel
int threadsPerBlock = threadsPerBlock_op;
int N_op=(N + op_loop -1)/op_loop;
int blocksPerGrid = (N_op + threadsPerBlock - 1) /threadsPerBlock;
hipEventRecord(start, 0);
VecAdd<<<blocksPerGrid, threadsPerBlock>>>(d_A,d_B, d_C, N_op,op_loop);
hipEventRecord(stop, 0);
// h_C contains the result in host memory
hipMemcpy(h_C, d_C, size,hipMemcpyDeviceToHost);
//printf("\nArray C (first 10 outputs)\n");
//for(loop = 0; loop < 10; loop++)
// printf("%f ", h_C[loop]);
hipEventSynchronize(stop);
hipEventElapsedTime(&time_spent, start, stop);
printf("%f",time_spent);
// Free device memory
hipFree(d_A);
hipFree(d_B);
hipFree(d_C);
// Free host memory
free(h_A);
free(h_B);
return 0;
} | .text
.amdgcn_target "amdgcn-amd-amdhsa--gfx1100"
.protected _Z6VecAddPfS_S_ii
.globl _Z6VecAddPfS_S_ii
.p2align 8
.type _Z6VecAddPfS_S_ii,@function
_Z6VecAddPfS_S_ii:
s_clause 0x1
s_load_b32 s4, s[0:1], 0x2c
s_load_b64 s[2:3], s[0:1], 0x18
s_waitcnt lgkmcnt(0)
s_and_b32 s4, s4, 0xffff
s_cmp_gt_i32 s3, 0
v_mad_u64_u32 v[1:2], null, s15, s4, v[0:1]
s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(SALU_CYCLE_1)
v_cmp_gt_i32_e32 vcc_lo, s2, v1
s_cselect_b32 s2, -1, 0
s_and_b32 s2, vcc_lo, s2
s_delay_alu instid0(SALU_CYCLE_1)
s_and_saveexec_b32 s4, s2
s_cbranch_execz .LBB0_3
s_load_b128 s[4:7], s[0:1], 0x0
v_mul_lo_u32 v0, v1, s3
s_load_b64 s[0:1], s[0:1], 0x10
s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
v_ashrrev_i32_e32 v1, 31, v0
v_lshlrev_b64 v[4:5], 2, v[0:1]
s_waitcnt lgkmcnt(0)
s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_2)
v_add_co_u32 v0, vcc_lo, s4, v4
v_add_co_ci_u32_e32 v1, vcc_lo, s5, v5, vcc_lo
v_add_co_u32 v2, vcc_lo, s6, v4
v_add_co_ci_u32_e32 v3, vcc_lo, s7, v5, vcc_lo
v_add_co_u32 v4, vcc_lo, s0, v4
v_add_co_ci_u32_e32 v5, vcc_lo, s1, v5, vcc_lo
.p2align 6
.LBB0_2:
global_load_b32 v6, v[0:1], off
global_load_b32 v7, v[2:3], off
v_add_co_u32 v0, vcc_lo, v0, 4
v_add_co_ci_u32_e32 v1, vcc_lo, 0, v1, vcc_lo
v_add_co_u32 v2, vcc_lo, v2, 4
v_add_co_ci_u32_e32 v3, vcc_lo, 0, v3, vcc_lo
s_add_i32 s3, s3, -1
s_delay_alu instid0(SALU_CYCLE_1)
s_cmp_lg_u32 s3, 0
s_waitcnt vmcnt(0)
v_add_f32_e32 v6, v6, v7
global_store_b32 v[4:5], v6, off
v_add_co_u32 v4, vcc_lo, v4, 4
v_add_co_ci_u32_e32 v5, vcc_lo, 0, v5, vcc_lo
s_cbranch_scc1 .LBB0_2
.LBB0_3:
s_nop 0
s_sendmsg sendmsg(MSG_DEALLOC_VGPRS)
s_endpgm
.section .rodata,"a",@progbits
.p2align 6, 0x0
.amdhsa_kernel _Z6VecAddPfS_S_ii
.amdhsa_group_segment_fixed_size 0
.amdhsa_private_segment_fixed_size 0
.amdhsa_kernarg_size 288
.amdhsa_user_sgpr_count 15
.amdhsa_user_sgpr_dispatch_ptr 0
.amdhsa_user_sgpr_queue_ptr 0
.amdhsa_user_sgpr_kernarg_segment_ptr 1
.amdhsa_user_sgpr_dispatch_id 0
.amdhsa_user_sgpr_private_segment_size 0
.amdhsa_wavefront_size32 1
.amdhsa_uses_dynamic_stack 0
.amdhsa_enable_private_segment 0
.amdhsa_system_sgpr_workgroup_id_x 1
.amdhsa_system_sgpr_workgroup_id_y 0
.amdhsa_system_sgpr_workgroup_id_z 0
.amdhsa_system_sgpr_workgroup_info 0
.amdhsa_system_vgpr_workitem_id 0
.amdhsa_next_free_vgpr 8
.amdhsa_next_free_sgpr 16
.amdhsa_float_round_mode_32 0
.amdhsa_float_round_mode_16_64 0
.amdhsa_float_denorm_mode_32 3
.amdhsa_float_denorm_mode_16_64 3
.amdhsa_dx10_clamp 1
.amdhsa_ieee_mode 1
.amdhsa_fp16_overflow 0
.amdhsa_workgroup_processor_mode 1
.amdhsa_memory_ordered 1
.amdhsa_forward_progress 0
.amdhsa_shared_vgpr_count 0
.amdhsa_exception_fp_ieee_invalid_op 0
.amdhsa_exception_fp_denorm_src 0
.amdhsa_exception_fp_ieee_div_zero 0
.amdhsa_exception_fp_ieee_overflow 0
.amdhsa_exception_fp_ieee_underflow 0
.amdhsa_exception_fp_ieee_inexact 0
.amdhsa_exception_int_div_zero 0
.end_amdhsa_kernel
.text
.Lfunc_end0:
.size _Z6VecAddPfS_S_ii, .Lfunc_end0-_Z6VecAddPfS_S_ii
.section .AMDGPU.csdata,"",@progbits
.text
.p2alignl 7, 3214868480
.fill 96, 4, 3214868480
.type __hip_cuid_,@object
.section .bss,"aw",@nobits
.globl __hip_cuid_
__hip_cuid_:
.byte 0
.size __hip_cuid_, 1
.ident "AMD clang version 18.0.0git (https://github.com/RadeonOpenCompute/llvm-project roc-6.3.2 25012 e5bf7e55c91490b07c49d8960fa7983d864936c4)"
.section ".note.GNU-stack","",@progbits
.addrsig
.addrsig_sym __hip_cuid_
.amdgpu_metadata
---
amdhsa.kernels:
- .args:
- .address_space: global
.offset: 0
.size: 8
.value_kind: global_buffer
- .address_space: global
.offset: 8
.size: 8
.value_kind: global_buffer
- .address_space: global
.offset: 16
.size: 8
.value_kind: global_buffer
- .offset: 24
.size: 4
.value_kind: by_value
- .offset: 28
.size: 4
.value_kind: by_value
- .offset: 32
.size: 4
.value_kind: hidden_block_count_x
- .offset: 36
.size: 4
.value_kind: hidden_block_count_y
- .offset: 40
.size: 4
.value_kind: hidden_block_count_z
- .offset: 44
.size: 2
.value_kind: hidden_group_size_x
- .offset: 46
.size: 2
.value_kind: hidden_group_size_y
- .offset: 48
.size: 2
.value_kind: hidden_group_size_z
- .offset: 50
.size: 2
.value_kind: hidden_remainder_x
- .offset: 52
.size: 2
.value_kind: hidden_remainder_y
- .offset: 54
.size: 2
.value_kind: hidden_remainder_z
- .offset: 72
.size: 8
.value_kind: hidden_global_offset_x
- .offset: 80
.size: 8
.value_kind: hidden_global_offset_y
- .offset: 88
.size: 8
.value_kind: hidden_global_offset_z
- .offset: 96
.size: 2
.value_kind: hidden_grid_dims
.group_segment_fixed_size: 0
.kernarg_segment_align: 8
.kernarg_segment_size: 288
.language: OpenCL C
.language_version:
- 2
- 0
.max_flat_workgroup_size: 1024
.name: _Z6VecAddPfS_S_ii
.private_segment_fixed_size: 0
.sgpr_count: 18
.sgpr_spill_count: 0
.symbol: _Z6VecAddPfS_S_ii.kd
.uniform_work_group_size: 1
.uses_dynamic_stack: false
.vgpr_count: 8
.vgpr_spill_count: 0
.wavefront_size: 32
.workgroup_processor_mode: 1
amdhsa.target: amdgcn-amd-amdhsa--gfx1100
amdhsa.version:
- 1
- 2
...
.end_amdgpu_metadata |
You are a helpful coding assistant specialized in converting HIP source code to AMD host assembly. | #include <hip/hip_runtime.h>
#include <stdlib.h>
#include <stdio.h>
#include <time.h>
#include <math.h>
__global__ void VecAdd(float* A, float* B, float*
C, int N_op,int op_loop){
// N_op : no of total ops
// op_loop: no of ops to do in a loop
// Host code
int j;
int i = blockDim.x * blockIdx.x + threadIdx.x;
if (i < N_op){
for (j=0;j<op_loop;j++){
C[i*op_loop+j] = A[i*op_loop+j] + B[i*op_loop+j];
}
}
}
int main(int argc,char **argv) {
//printf("Usage example. \n./ee16b068_456.out <threads_per_block> <ops_per_thread> <vector_size> <filename1> <filename2>");
if (argc<5){
//printf("Too few arguments.\nUsage is ./ee16b068_456.out <threads_per_block> <ops_per_thread> <vector_size> <filename1> <filename2> ");
return 1;
}
int threadsPerBlock_op=atoi(argv[1]);
int op_loop=atoi(argv[2]);
//int N = pow(2,atoi(argv[3]));
int N = atoi(argv[3]);
FILE *arrayfile_a;
FILE *arrayfile_b;
size_t size = N * sizeof(float);
//Helper variables
int loop;
float time_spent;
//files
arrayfile_a = fopen(argv[4], "r");
arrayfile_b = fopen(argv[5], "r");
// Allocate input vectors h_A and h_B in host memory
float* h_A = (float*)malloc(size);
float* h_B = (float*)malloc(size);
float* h_C = (float*)malloc(size);
// Read first two arrays
//printf("\nArray A (first 10 values) \n ");
for (loop = 0; loop < N; loop++)
{
fscanf(arrayfile_a, "%f", &h_A[loop]);
//if (loop<10){
// printf("%f ", h_A[loop]);
//}
}
//printf("\nArray B (first 10 values) \n ");
for (loop = 0; loop < N; loop++)
{
fscanf(arrayfile_b, "%f", &h_B[loop]);
//if (loop<10){
//printf("%f ", h_B[loop]);
//}
}
// Allocate vectors in device memory
float* d_A; hipMalloc(&d_A, size);
float* d_B; hipMalloc(&d_B, size);
float* d_C; hipMalloc(&d_C, size);
//GPU timing
hipEvent_t start, stop;
hipEventCreate(&start);
hipEventCreate(&stop);
// Copy vectors from host memory to device memory
hipMemcpy(d_A, h_A, size,hipMemcpyHostToDevice);
hipMemcpy(d_B, h_B, size,hipMemcpyHostToDevice);
//ops per loop
//printf("Ops per loop %d\n",op_loop);
//printf("Threads per Block %d\n",threadsPerBlock_op);
//printf("Vector Size %d\n",op_loop);
// Invoke kernel
int threadsPerBlock = threadsPerBlock_op;
int N_op=(N + op_loop -1)/op_loop;
int blocksPerGrid = (N_op + threadsPerBlock - 1) /threadsPerBlock;
hipEventRecord(start, 0);
VecAdd<<<blocksPerGrid, threadsPerBlock>>>(d_A,d_B, d_C, N_op,op_loop);
hipEventRecord(stop, 0);
// h_C contains the result in host memory
hipMemcpy(h_C, d_C, size,hipMemcpyDeviceToHost);
//printf("\nArray C (first 10 outputs)\n");
//for(loop = 0; loop < 10; loop++)
// printf("%f ", h_C[loop]);
hipEventSynchronize(stop);
hipEventElapsedTime(&time_spent, start, stop);
printf("%f",time_spent);
// Free device memory
hipFree(d_A);
hipFree(d_B);
hipFree(d_C);
// Free host memory
free(h_A);
free(h_B);
return 0;
} | .text
.file "ee16b068_456.hip"
.globl _Z21__device_stub__VecAddPfS_S_ii # -- Begin function _Z21__device_stub__VecAddPfS_S_ii
.p2align 4, 0x90
.type _Z21__device_stub__VecAddPfS_S_ii,@function
_Z21__device_stub__VecAddPfS_S_ii: # @_Z21__device_stub__VecAddPfS_S_ii
.cfi_startproc
# %bb.0:
subq $120, %rsp
.cfi_def_cfa_offset 128
movq %rdi, 72(%rsp)
movq %rsi, 64(%rsp)
movq %rdx, 56(%rsp)
movl %ecx, 4(%rsp)
movl %r8d, (%rsp)
leaq 72(%rsp), %rax
movq %rax, 80(%rsp)
leaq 64(%rsp), %rax
movq %rax, 88(%rsp)
leaq 56(%rsp), %rax
movq %rax, 96(%rsp)
leaq 4(%rsp), %rax
movq %rax, 104(%rsp)
movq %rsp, %rax
movq %rax, 112(%rsp)
leaq 40(%rsp), %rdi
leaq 24(%rsp), %rsi
leaq 16(%rsp), %rdx
leaq 8(%rsp), %rcx
callq __hipPopCallConfiguration
movq 40(%rsp), %rsi
movl 48(%rsp), %edx
movq 24(%rsp), %rcx
movl 32(%rsp), %r8d
leaq 80(%rsp), %r9
movl $_Z6VecAddPfS_S_ii, %edi
pushq 8(%rsp)
.cfi_adjust_cfa_offset 8
pushq 24(%rsp)
.cfi_adjust_cfa_offset 8
callq hipLaunchKernel
addq $136, %rsp
.cfi_adjust_cfa_offset -136
retq
.Lfunc_end0:
.size _Z21__device_stub__VecAddPfS_S_ii, .Lfunc_end0-_Z21__device_stub__VecAddPfS_S_ii
.cfi_endproc
# -- End function
.globl main # -- Begin function main
.p2align 4, 0x90
.type main,@function
main: # @main
.cfi_startproc
# %bb.0:
pushq %rbp
.cfi_def_cfa_offset 16
pushq %r15
.cfi_def_cfa_offset 24
pushq %r14
.cfi_def_cfa_offset 32
pushq %r13
.cfi_def_cfa_offset 40
pushq %r12
.cfi_def_cfa_offset 48
pushq %rbx
.cfi_def_cfa_offset 56
subq $200, %rsp
.cfi_def_cfa_offset 256
.cfi_offset %rbx, -56
.cfi_offset %r12, -48
.cfi_offset %r13, -40
.cfi_offset %r14, -32
.cfi_offset %r15, -24
.cfi_offset %rbp, -16
movl $1, %r12d
cmpl $5, %edi
jl .LBB1_10
# %bb.1:
movq 8(%rsi), %rdi
movq %rsi, %rbx
xorl %esi, %esi
movl $10, %edx
callq __isoc23_strtol
movq %rax, 64(%rsp) # 8-byte Spill
movq 16(%rbx), %rdi
xorl %esi, %esi
movl $10, %edx
callq __isoc23_strtol
movq %rax, 72(%rsp) # 8-byte Spill
movq 24(%rbx), %rdi
xorl %esi, %esi
movl $10, %edx
callq __isoc23_strtol
movq %rax, %r12
movslq %r12d, %r13
leaq (,%r13,4), %r15
movq 32(%rbx), %rdi
movl $.L.str, %esi
callq fopen
movq %rax, %r14
movq 40(%rbx), %rdi
movl $.L.str, %esi
callq fopen
movq %rax, %rbx
movq %r15, %rdi
callq malloc
movq %rax, (%rsp) # 8-byte Spill
movq %r15, %rdi
callq malloc
movq %rax, 48(%rsp) # 8-byte Spill
movq %r15, %rdi
callq malloc
movq %rax, 80(%rsp) # 8-byte Spill
testl %r13d, %r13d
jle .LBB1_4
# %bb.2: # %.lr.ph.preheader
movl %r12d, %ebp
movq (%rsp), %r13 # 8-byte Reload
.p2align 4, 0x90
.LBB1_3: # %.lr.ph
# =>This Inner Loop Header: Depth=1
movl $.L.str.1, %esi
movq %r14, %rdi
movq %r13, %rdx
xorl %eax, %eax
callq __isoc23_fscanf
addq $4, %r13
decq %rbp
jne .LBB1_3
.LBB1_4: # %.preheader
testl %r12d, %r12d
movq 48(%rsp), %rbp # 8-byte Reload
jle .LBB1_7
# %bb.5: # %.lr.ph53.preheader
movl %r12d, %r13d
movq %rbp, %r14
.p2align 4, 0x90
.LBB1_6: # %.lr.ph53
# =>This Inner Loop Header: Depth=1
movl $.L.str.1, %esi
movq %rbx, %rdi
movq %r14, %rdx
xorl %eax, %eax
callq __isoc23_fscanf
addq $4, %r14
decq %r13
jne .LBB1_6
.LBB1_7: # %._crit_edge
leaq 32(%rsp), %rdi
movq %r15, %rsi
callq hipMalloc
leaq 24(%rsp), %rdi
movq %r15, %rsi
callq hipMalloc
leaq 16(%rsp), %rdi
movq %r15, %rsi
callq hipMalloc
leaq 56(%rsp), %rdi
callq hipEventCreate
leaq 8(%rsp), %rdi
callq hipEventCreate
movq 32(%rsp), %rdi
movq (%rsp), %rsi # 8-byte Reload
movq %r15, %rdx
movl $1, %ecx
callq hipMemcpy
movq 24(%rsp), %rdi
movq %rbp, %rsi
movq %r15, %rdx
movl $1, %ecx
callq hipMemcpy
movq 72(%rsp), %rbp # 8-byte Reload
leal (%r12,%rbp), %eax
decl %eax
cltd
idivl %ebp
movl %eax, %ebx
movq 64(%rsp), %r13 # 8-byte Reload
leal (%rbx,%r13), %eax
decl %eax
cltd
idivl %r13d
movl %eax, %r14d
movq 56(%rsp), %rdi
xorl %r12d, %r12d
xorl %esi, %esi
callq hipEventRecord
movabsq $4294967296, %rax # imm = 0x100000000
orq %rax, %r14
movl %r13d, %edx
orq %rax, %rdx
movq %r14, %rdi
movl $1, %esi
movl $1, %ecx
xorl %r8d, %r8d
xorl %r9d, %r9d
callq __hipPushCallConfiguration
testl %eax, %eax
jne .LBB1_9
# %bb.8:
movq 32(%rsp), %rax
movq 24(%rsp), %rcx
movq 16(%rsp), %rdx
movq %rax, 152(%rsp)
movq %rcx, 144(%rsp)
movq %rdx, 136(%rsp)
movl %ebx, 44(%rsp)
movl %ebp, 40(%rsp)
leaq 152(%rsp), %rax
movq %rax, 160(%rsp)
leaq 144(%rsp), %rax
movq %rax, 168(%rsp)
leaq 136(%rsp), %rax
movq %rax, 176(%rsp)
leaq 44(%rsp), %rax
movq %rax, 184(%rsp)
leaq 40(%rsp), %rax
movq %rax, 192(%rsp)
leaq 120(%rsp), %rdi
leaq 104(%rsp), %rsi
leaq 96(%rsp), %rdx
leaq 88(%rsp), %rcx
callq __hipPopCallConfiguration
movq 120(%rsp), %rsi
movl 128(%rsp), %edx
movq 104(%rsp), %rcx
movl 112(%rsp), %r8d
leaq 160(%rsp), %r9
movl $_Z6VecAddPfS_S_ii, %edi
pushq 88(%rsp)
.cfi_adjust_cfa_offset 8
pushq 104(%rsp)
.cfi_adjust_cfa_offset 8
callq hipLaunchKernel
addq $16, %rsp
.cfi_adjust_cfa_offset -16
.LBB1_9:
movq 8(%rsp), %rdi
xorl %esi, %esi
callq hipEventRecord
movq 16(%rsp), %rsi
movq 80(%rsp), %rdi # 8-byte Reload
movq %r15, %rdx
movl $2, %ecx
callq hipMemcpy
movq 8(%rsp), %rdi
callq hipEventSynchronize
movq 56(%rsp), %rsi
movq 8(%rsp), %rdx
leaq 160(%rsp), %rdi
callq hipEventElapsedTime
movss 160(%rsp), %xmm0 # xmm0 = mem[0],zero,zero,zero
cvtss2sd %xmm0, %xmm0
movl $.L.str.1, %edi
movb $1, %al
callq printf
movq 32(%rsp), %rdi
callq hipFree
movq 24(%rsp), %rdi
callq hipFree
movq 16(%rsp), %rdi
callq hipFree
movq (%rsp), %rdi # 8-byte Reload
callq free
movq 48(%rsp), %rdi # 8-byte Reload
callq free
.LBB1_10:
movl %r12d, %eax
addq $200, %rsp
.cfi_def_cfa_offset 56
popq %rbx
.cfi_def_cfa_offset 48
popq %r12
.cfi_def_cfa_offset 40
popq %r13
.cfi_def_cfa_offset 32
popq %r14
.cfi_def_cfa_offset 24
popq %r15
.cfi_def_cfa_offset 16
popq %rbp
.cfi_def_cfa_offset 8
retq
.Lfunc_end1:
.size main, .Lfunc_end1-main
.cfi_endproc
# -- End function
.p2align 4, 0x90 # -- Begin function __hip_module_ctor
.type __hip_module_ctor,@function
__hip_module_ctor: # @__hip_module_ctor
.cfi_startproc
# %bb.0:
subq $40, %rsp
.cfi_def_cfa_offset 48
cmpq $0, __hip_gpubin_handle(%rip)
jne .LBB2_2
# %bb.1:
movl $__hip_fatbin_wrapper, %edi
callq __hipRegisterFatBinary
movq %rax, __hip_gpubin_handle(%rip)
.LBB2_2:
movq __hip_gpubin_handle(%rip), %rdi
xorps %xmm0, %xmm0
movups %xmm0, 16(%rsp)
movups %xmm0, (%rsp)
movl $_Z6VecAddPfS_S_ii, %esi
movl $.L__unnamed_1, %edx
movl $.L__unnamed_1, %ecx
movl $-1, %r8d
xorl %r9d, %r9d
callq __hipRegisterFunction
movl $__hip_module_dtor, %edi
addq $40, %rsp
.cfi_def_cfa_offset 8
jmp atexit # TAILCALL
.Lfunc_end2:
.size __hip_module_ctor, .Lfunc_end2-__hip_module_ctor
.cfi_endproc
# -- End function
.p2align 4, 0x90 # -- Begin function __hip_module_dtor
.type __hip_module_dtor,@function
__hip_module_dtor: # @__hip_module_dtor
.cfi_startproc
# %bb.0:
movq __hip_gpubin_handle(%rip), %rdi
testq %rdi, %rdi
je .LBB3_2
# %bb.1:
pushq %rax
.cfi_def_cfa_offset 16
callq __hipUnregisterFatBinary
movq $0, __hip_gpubin_handle(%rip)
addq $8, %rsp
.cfi_def_cfa_offset 8
.LBB3_2:
retq
.Lfunc_end3:
.size __hip_module_dtor, .Lfunc_end3-__hip_module_dtor
.cfi_endproc
# -- End function
.type _Z6VecAddPfS_S_ii,@object # @_Z6VecAddPfS_S_ii
.section .rodata,"a",@progbits
.globl _Z6VecAddPfS_S_ii
.p2align 3, 0x0
_Z6VecAddPfS_S_ii:
.quad _Z21__device_stub__VecAddPfS_S_ii
.size _Z6VecAddPfS_S_ii, 8
.type .L.str,@object # @.str
.section .rodata.str1.1,"aMS",@progbits,1
.L.str:
.asciz "r"
.size .L.str, 2
.type .L.str.1,@object # @.str.1
.L.str.1:
.asciz "%f"
.size .L.str.1, 3
.type .L__unnamed_1,@object # @0
.L__unnamed_1:
.asciz "_Z6VecAddPfS_S_ii"
.size .L__unnamed_1, 18
.type __hip_fatbin_wrapper,@object # @__hip_fatbin_wrapper
.section .hipFatBinSegment,"a",@progbits
.p2align 3, 0x0
__hip_fatbin_wrapper:
.long 1212764230 # 0x48495046
.long 1 # 0x1
.quad __hip_fatbin
.quad 0
.size __hip_fatbin_wrapper, 24
.type __hip_gpubin_handle,@object # @__hip_gpubin_handle
.local __hip_gpubin_handle
.comm __hip_gpubin_handle,8,8
.section .init_array,"aw",@init_array
.p2align 3, 0x0
.quad __hip_module_ctor
.type __hip_cuid_,@object # @__hip_cuid_
.bss
.globl __hip_cuid_
__hip_cuid_:
.byte 0 # 0x0
.size __hip_cuid_, 1
.section ".linker-options","e",@llvm_linker_options
.ident "AMD clang version 18.0.0git (https://github.com/RadeonOpenCompute/llvm-project roc-6.3.2 25012 e5bf7e55c91490b07c49d8960fa7983d864936c4)"
.section ".note.GNU-stack","",@progbits
.addrsig
.addrsig_sym _Z21__device_stub__VecAddPfS_S_ii
.addrsig_sym __hip_module_ctor
.addrsig_sym __hip_module_dtor
.addrsig_sym _Z6VecAddPfS_S_ii
.addrsig_sym __hip_fatbin
.addrsig_sym __hip_fatbin_wrapper
.addrsig_sym __hip_cuid_ |
You are a helpful coding assistant specialized in converting from CUDA device assembly to AMD device assembly. | code for sm_80
Function : _Z6VecAddPfS_S_ii
.headerflags @"EF_CUDA_TEXMODE_UNIFIED EF_CUDA_64BIT_ADDRESS EF_CUDA_SM80 EF_CUDA_VIRTUAL_SM(EF_CUDA_SM80)"
/*0000*/ MOV R1, c[0x0][0x28] ; /* 0x00000a0000017a02 */
/* 0x000fe40000000f00 */
/*0010*/ S2R R2, SR_CTAID.X ; /* 0x0000000000027919 */
/* 0x000e220000002500 */
/*0020*/ MOV R0, c[0x0][0x17c] ; /* 0x00005f0000007a02 */
/* 0x000fc60000000f00 */
/*0030*/ S2R R3, SR_TID.X ; /* 0x0000000000037919 */
/* 0x000e220000002100 */
/*0040*/ ISETP.GE.AND P0, PT, R0, 0x1, PT ; /* 0x000000010000780c */
/* 0x000fe20003f06270 */
/*0050*/ IMAD R2, R2, c[0x0][0x0], R3 ; /* 0x0000000002027a24 */
/* 0x001fca00078e0203 */
/*0060*/ ISETP.GE.OR P0, PT, R2, c[0x0][0x178], !P0 ; /* 0x00005e0002007a0c */
/* 0x000fda0004706670 */
/*0070*/ @P0 EXIT ; /* 0x000000000000094d */
/* 0x000fea0003800000 */
/*0080*/ IADD3 R3, R0.reuse, -0x1, RZ ; /* 0xffffffff00037810 */
/* 0x040fe20007ffe0ff */
/*0090*/ ULDC.64 UR4, c[0x0][0x118] ; /* 0x0000460000047ab9 */
/* 0x000fe20000000a00 */
/*00a0*/ LOP3.LUT R0, R0, 0x3, RZ, 0xc0, !PT ; /* 0x0000000300007812 */
/* 0x000fe200078ec0ff */
/*00b0*/ IMAD.MOV.U32 R5, RZ, RZ, RZ ; /* 0x000000ffff057224 */
/* 0x000fe200078e00ff */
/*00c0*/ ISETP.GE.U32.AND P0, PT, R3, 0x3, PT ; /* 0x000000030300780c */
/* 0x000fda0003f06070 */
/*00d0*/ @!P0 BRA 0xc60 ; /* 0x00000b8000008947 */
/* 0x000fea0003800000 */
/*00e0*/ IADD3 R3, -R0, c[0x0][0x17c], RZ ; /* 0x00005f0000037a10 */
/* 0x000fe20007ffe1ff */
/*00f0*/ ULDC.64 UR10, c[0x0][0x160] ; /* 0x00005800000a7ab9 */
/* 0x000fe20000000a00 */
/*0100*/ HFMA2.MMA R5, -RZ, RZ, 0, 0 ; /* 0x00000000ff057435 */
/* 0x000fe200000001ff */
/*0110*/ ULDC.64 UR8, c[0x0][0x168] ; /* 0x00005a0000087ab9 */
/* 0x000fe20000000a00 */
/*0120*/ ISETP.GT.AND P0, PT, R3, RZ, PT ; /* 0x000000ff0300720c */
/* 0x000fe20003f04270 */
/*0130*/ ULDC.64 UR6, c[0x0][0x170] ; /* 0x00005c0000067ab9 */
/* 0x000fe20000000a00 */
/*0140*/ IMAD R4, R2, c[0x0][0x17c], RZ ; /* 0x00005f0002047a24 */
/* 0x000fd600078e02ff */
/*0150*/ @!P0 BRA 0xa30 ; /* 0x000008d000008947 */
/* 0x000fea0003800000 */
/*0160*/ ISETP.GT.AND P1, PT, R3, 0xc, PT ; /* 0x0000000c0300780c */
/* 0x000fe40003f24270 */
/*0170*/ PLOP3.LUT P0, PT, PT, PT, PT, 0x80, 0x0 ; /* 0x000000000000781c */
/* 0x000fd60003f0f070 */
/*0180*/ @!P1 BRA 0x6d0 ; /* 0x0000054000009947 */
/* 0x000fea0003800000 */
/*0190*/ PLOP3.LUT P0, PT, PT, PT, PT, 0x8, 0x0 ; /* 0x000000000000781c */
/* 0x000fe40003f0e170 */
/*01a0*/ MOV R8, UR10 ; /* 0x0000000a00087c02 */
/* 0x000fe20008000f00 */
/*01b0*/ IMAD.U32 R9, RZ, RZ, UR11 ; /* 0x0000000bff097e24 */
/* 0x000fe2000f8e00ff */
/*01c0*/ MOV R6, UR8 ; /* 0x0000000800067c02 */
/* 0x000fe40008000f00 */
/*01d0*/ MOV R7, UR9 ; /* 0x0000000900077c02 */
/* 0x000fe20008000f00 */
/*01e0*/ IMAD.WIDE R8, R4, 0x4, R8 ; /* 0x0000000404087825 */
/* 0x000fc800078e0208 */
/*01f0*/ IMAD.WIDE R6, R4, 0x4, R6 ; /* 0x0000000404067825 */
/* 0x000fe200078e0206 */
/*0200*/ LDG.E R13, [R8.64] ; /* 0x00000004080d7981 */
/* 0x001ea8000c1e1900 */
/*0210*/ LDG.E R12, [R6.64] ; /* 0x00000004060c7981 */
/* 0x000ea2000c1e1900 */
/*0220*/ MOV R11, UR7 ; /* 0x00000007000b7c02 */
/* 0x000fe20008000f00 */
/*0230*/ IMAD.U32 R10, RZ, RZ, UR6 ; /* 0x00000006ff0a7e24 */
/* 0x000fc8000f8e00ff */
/*0240*/ IMAD.WIDE R10, R4, 0x4, R10 ; /* 0x00000004040a7825 */
/* 0x000fc800078e020a */
/*0250*/ FADD R13, R12, R13 ; /* 0x0000000d0c0d7221 */
/* 0x004fca0000000000 */
/*0260*/ STG.E [R10.64], R13 ; /* 0x0000000d0a007986 */
/* 0x0001e8000c101904 */
/*0270*/ LDG.E R12, [R6.64+0x4] ; /* 0x00000404060c7981 */
/* 0x000ea8000c1e1900 */
/*0280*/ LDG.E R15, [R8.64+0x4] ; /* 0x00000404080f7981 */
/* 0x000ea4000c1e1900 */
/*0290*/ FADD R15, R12, R15 ; /* 0x0000000f0c0f7221 */
/* 0x004fca0000000000 */
/*02a0*/ STG.E [R10.64+0x4], R15 ; /* 0x0000040f0a007986 */
/* 0x0003e8000c101904 */
/*02b0*/ LDG.E R12, [R6.64+0x8] ; /* 0x00000804060c7981 */
/* 0x000ea8000c1e1900 */
/*02c0*/ LDG.E R17, [R8.64+0x8] ; /* 0x0000080408117981 */
/* 0x000ea4000c1e1900 */
/*02d0*/ FADD R17, R12, R17 ; /* 0x000000110c117221 */
/* 0x004fca0000000000 */
/*02e0*/ STG.E [R10.64+0x8], R17 ; /* 0x000008110a007986 */
/* 0x0005e8000c101904 */
/*02f0*/ LDG.E R12, [R6.64+0xc] ; /* 0x00000c04060c7981 */
/* 0x000ee8000c1e1900 */
/*0300*/ LDG.E R19, [R8.64+0xc] ; /* 0x00000c0408137981 */
/* 0x000ee4000c1e1900 */
/*0310*/ FADD R19, R12, R19 ; /* 0x000000130c137221 */
/* 0x008fca0000000000 */
/*0320*/ STG.E [R10.64+0xc], R19 ; /* 0x00000c130a007986 */
/* 0x0007e8000c101904 */
/*0330*/ LDG.E R12, [R6.64+0x10] ; /* 0x00001004060c7981 */
/* 0x000f28000c1e1900 */
/*0340*/ LDG.E R13, [R8.64+0x10] ; /* 0x00001004080d7981 */
/* 0x001f24000c1e1900 */
/*0350*/ FADD R13, R12, R13 ; /* 0x0000000d0c0d7221 */
/* 0x010fca0000000000 */
/*0360*/ STG.E [R10.64+0x10], R13 ; /* 0x0000100d0a007986 */
/* 0x0001e8000c101904 */
/*0370*/ LDG.E R12, [R6.64+0x14] ; /* 0x00001404060c7981 */
/* 0x000f28000c1e1900 */
/*0380*/ LDG.E R15, [R8.64+0x14] ; /* 0x00001404080f7981 */
/* 0x002f24000c1e1900 */
/*0390*/ FADD R15, R12, R15 ; /* 0x0000000f0c0f7221 */
/* 0x010fca0000000000 */
/*03a0*/ STG.E [R10.64+0x14], R15 ; /* 0x0000140f0a007986 */
/* 0x0003e8000c101904 */
/*03b0*/ LDG.E R12, [R6.64+0x18] ; /* 0x00001804060c7981 */
/* 0x000f28000c1e1900 */
/*03c0*/ LDG.E R17, [R8.64+0x18] ; /* 0x0000180408117981 */
/* 0x004f24000c1e1900 */
/*03d0*/ FADD R17, R12, R17 ; /* 0x000000110c117221 */
/* 0x010fca0000000000 */
/*03e0*/ STG.E [R10.64+0x18], R17 ; /* 0x000018110a007986 */
/* 0x0005e8000c101904 */
/*03f0*/ LDG.E R12, [R6.64+0x1c] ; /* 0x00001c04060c7981 */
/* 0x000f28000c1e1900 */
/*0400*/ LDG.E R19, [R8.64+0x1c] ; /* 0x00001c0408137981 */
/* 0x008f24000c1e1900 */
/*0410*/ FADD R19, R12, R19 ; /* 0x000000130c137221 */
/* 0x010fca0000000000 */
/*0420*/ STG.E [R10.64+0x1c], R19 ; /* 0x00001c130a007986 */
/* 0x0007e8000c101904 */
/*0430*/ LDG.E R12, [R6.64+0x20] ; /* 0x00002004060c7981 */
/* 0x000f28000c1e1900 */
/*0440*/ LDG.E R13, [R8.64+0x20] ; /* 0x00002004080d7981 */
/* 0x001f24000c1e1900 */
/*0450*/ FADD R13, R12, R13 ; /* 0x0000000d0c0d7221 */
/* 0x010fca0000000000 */
/*0460*/ STG.E [R10.64+0x20], R13 ; /* 0x0000200d0a007986 */
/* 0x0001e8000c101904 */
/*0470*/ LDG.E R12, [R6.64+0x24] ; /* 0x00002404060c7981 */
/* 0x000f28000c1e1900 */
/*0480*/ LDG.E R15, [R8.64+0x24] ; /* 0x00002404080f7981 */
/* 0x002f24000c1e1900 */
/*0490*/ FADD R15, R12, R15 ; /* 0x0000000f0c0f7221 */
/* 0x010fca0000000000 */
/*04a0*/ STG.E [R10.64+0x24], R15 ; /* 0x0000240f0a007986 */
/* 0x0003e8000c101904 */
/*04b0*/ LDG.E R12, [R6.64+0x28] ; /* 0x00002804060c7981 */
/* 0x000f28000c1e1900 */
/*04c0*/ LDG.E R17, [R8.64+0x28] ; /* 0x0000280408117981 */
/* 0x004f24000c1e1900 */
/*04d0*/ FADD R17, R12, R17 ; /* 0x000000110c117221 */
/* 0x010fca0000000000 */
/*04e0*/ STG.E [R10.64+0x28], R17 ; /* 0x000028110a007986 */
/* 0x0005e8000c101904 */
/*04f0*/ LDG.E R12, [R6.64+0x2c] ; /* 0x00002c04060c7981 */
/* 0x000f28000c1e1900 */
/*0500*/ LDG.E R19, [R8.64+0x2c] ; /* 0x00002c0408137981 */
/* 0x008f24000c1e1900 */
/*0510*/ FADD R19, R12, R19 ; /* 0x000000130c137221 */
/* 0x010fca0000000000 */
/*0520*/ STG.E [R10.64+0x2c], R19 ; /* 0x00002c130a007986 */
/* 0x0007e8000c101904 */
/*0530*/ LDG.E R12, [R6.64+0x30] ; /* 0x00003004060c7981 */
/* 0x000f28000c1e1900 */
/*0540*/ LDG.E R13, [R8.64+0x30] ; /* 0x00003004080d7981 */
/* 0x001f24000c1e1900 */
/*0550*/ FADD R13, R12, R13 ; /* 0x0000000d0c0d7221 */
/* 0x010fca0000000000 */
/*0560*/ STG.E [R10.64+0x30], R13 ; /* 0x0000300d0a007986 */
/* 0x0001e8000c101904 */
/*0570*/ LDG.E R12, [R6.64+0x34] ; /* 0x00003404060c7981 */
/* 0x000f28000c1e1900 */
/*0580*/ LDG.E R15, [R8.64+0x34] ; /* 0x00003404080f7981 */
/* 0x002f24000c1e1900 */
/*0590*/ FADD R15, R12, R15 ; /* 0x0000000f0c0f7221 */
/* 0x010fca0000000000 */
/*05a0*/ STG.E [R10.64+0x34], R15 ; /* 0x0000340f0a007986 */
/* 0x0001e8000c101904 */
/*05b0*/ LDG.E R12, [R6.64+0x38] ; /* 0x00003804060c7981 */
/* 0x000f28000c1e1900 */
/*05c0*/ LDG.E R17, [R8.64+0x38] ; /* 0x0000380408117981 */
/* 0x004f22000c1e1900 */
/*05d0*/ IADD3 R3, R3, -0x10, RZ ; /* 0xfffffff003037810 */
/* 0x000fe20007ffe0ff */
/*05e0*/ FADD R17, R12, R17 ; /* 0x000000110c117221 */
/* 0x010fca0000000000 */
/*05f0*/ STG.E [R10.64+0x38], R17 ; /* 0x000038110a007986 */
/* 0x0001e8000c101904 */
/*0600*/ LDG.E R12, [R6.64+0x3c] ; /* 0x00003c04060c7981 */
/* 0x000ea8000c1e1900 */
/*0610*/ LDG.E R19, [R8.64+0x3c] ; /* 0x00003c0408137981 */
/* 0x008ea2000c1e1900 */
/*0620*/ ISETP.GT.AND P1, PT, R3, 0xc, PT ; /* 0x0000000c0300780c */
/* 0x000fe20003f24270 */
/*0630*/ UIADD3 UR6, UP0, UR6, 0x40, URZ ; /* 0x0000004006067890 */
/* 0x000fc4000ff1e03f */
/*0640*/ UIADD3 UR8, UP1, UR8, 0x40, URZ ; /* 0x0000004008087890 */
/* 0x000fe4000ff3e03f */
/*0650*/ UIADD3 UR10, UP2, UR10, 0x40, URZ ; /* 0x000000400a0a7890 */
/* 0x000fe4000ff5e03f */
/*0660*/ UIADD3.X UR7, URZ, UR7, URZ, UP0, !UPT ; /* 0x000000073f077290 */
/* 0x000fe400087fe43f */
/*0670*/ UIADD3.X UR9, URZ, UR9, URZ, UP1, !UPT ; /* 0x000000093f097290 */
/* 0x000fe40008ffe43f */
/*0680*/ UIADD3.X UR11, URZ, UR11, URZ, UP2, !UPT ; /* 0x0000000b3f0b7290 */
/* 0x000fe200097fe43f */
/*0690*/ IADD3 R5, R5, 0x10, RZ ; /* 0x0000001005057810 */
/* 0x000fe20007ffe0ff */
/*06a0*/ FADD R19, R12, R19 ; /* 0x000000130c137221 */
/* 0x004fca0000000000 */
/*06b0*/ STG.E [R10.64+0x3c], R19 ; /* 0x00003c130a007986 */
/* 0x0001e2000c101904 */
/*06c0*/ @P1 BRA 0x1a0 ; /* 0xfffffad000001947 */
/* 0x000fea000383ffff */
/*06d0*/ ISETP.GT.AND P1, PT, R3, 0x4, PT ; /* 0x000000040300780c */
/* 0x000fda0003f24270 */
/*06e0*/ @!P1 BRA 0xa10 ; /* 0x0000032000009947 */
/* 0x000fea0003800000 */
/*06f0*/ MOV R8, UR10 ; /* 0x0000000a00087c02 */
/* 0x000fe20008000f00 */
/*0700*/ IMAD.U32 R9, RZ, RZ, UR11 ; /* 0x0000000bff097e24 */
/* 0x000fe2000f8e00ff */
/*0710*/ MOV R6, UR8 ; /* 0x0000000800067c02 */
/* 0x000fe40008000f00 */
/*0720*/ MOV R7, UR9 ; /* 0x0000000900077c02 */
/* 0x000fe20008000f00 */
/*0730*/ IMAD.WIDE R8, R4, 0x4, R8 ; /* 0x0000000404087825 */
/* 0x000fc800078e0208 */
/*0740*/ IMAD.WIDE R6, R4, 0x4, R6 ; /* 0x0000000404067825 */
/* 0x000fe200078e0206 */
/*0750*/ LDG.E R13, [R8.64] ; /* 0x00000004080d7981 */
/* 0x001ea8000c1e1900 */
/*0760*/ LDG.E R12, [R6.64] ; /* 0x00000004060c7981 */
/* 0x000ea2000c1e1900 */
/*0770*/ MOV R11, UR7 ; /* 0x00000007000b7c02 */
/* 0x000fe20008000f00 */
/*0780*/ IMAD.U32 R10, RZ, RZ, UR6 ; /* 0x00000006ff0a7e24 */
/* 0x000fc8000f8e00ff */
/*0790*/ IMAD.WIDE R10, R4, 0x4, R10 ; /* 0x00000004040a7825 */
/* 0x000fc800078e020a */
/*07a0*/ FADD R13, R12, R13 ; /* 0x0000000d0c0d7221 */
/* 0x004fca0000000000 */
/*07b0*/ STG.E [R10.64], R13 ; /* 0x0000000d0a007986 */
/* 0x0001e8000c101904 */
/*07c0*/ LDG.E R12, [R6.64+0x4] ; /* 0x00000404060c7981 */
/* 0x000ea8000c1e1900 */
/*07d0*/ LDG.E R15, [R8.64+0x4] ; /* 0x00000404080f7981 */
/* 0x000ea4000c1e1900 */
/*07e0*/ FADD R15, R12, R15 ; /* 0x0000000f0c0f7221 */
/* 0x004fca0000000000 */
/*07f0*/ STG.E [R10.64+0x4], R15 ; /* 0x0000040f0a007986 */
/* 0x0003e8000c101904 */
/*0800*/ LDG.E R12, [R6.64+0x8] ; /* 0x00000804060c7981 */
/* 0x000ea8000c1e1900 */
/*0810*/ LDG.E R17, [R8.64+0x8] ; /* 0x0000080408117981 */
/* 0x000ea4000c1e1900 */
/*0820*/ FADD R17, R12, R17 ; /* 0x000000110c117221 */
/* 0x004fca0000000000 */
/*0830*/ STG.E [R10.64+0x8], R17 ; /* 0x000008110a007986 */
/* 0x0005e8000c101904 */
/*0840*/ LDG.E R12, [R6.64+0xc] ; /* 0x00000c04060c7981 */
/* 0x000ee8000c1e1900 */
/*0850*/ LDG.E R19, [R8.64+0xc] ; /* 0x00000c0408137981 */
/* 0x000ee4000c1e1900 */
/*0860*/ FADD R19, R12, R19 ; /* 0x000000130c137221 */
/* 0x008fca0000000000 */
/*0870*/ STG.E [R10.64+0xc], R19 ; /* 0x00000c130a007986 */
/* 0x0007e8000c101904 */
/*0880*/ LDG.E R12, [R6.64+0x10] ; /* 0x00001004060c7981 */
/* 0x000f28000c1e1900 */
/*0890*/ LDG.E R13, [R8.64+0x10] ; /* 0x00001004080d7981 */
/* 0x001f24000c1e1900 */
/*08a0*/ FADD R13, R12, R13 ; /* 0x0000000d0c0d7221 */
/* 0x010fca0000000000 */
/*08b0*/ STG.E [R10.64+0x10], R13 ; /* 0x0000100d0a007986 */
/* 0x0001e8000c101904 */
/*08c0*/ LDG.E R12, [R6.64+0x14] ; /* 0x00001404060c7981 */
/* 0x000f28000c1e1900 */
/*08d0*/ LDG.E R15, [R8.64+0x14] ; /* 0x00001404080f7981 */
/* 0x002f24000c1e1900 */
/*08e0*/ FADD R15, R12, R15 ; /* 0x0000000f0c0f7221 */
/* 0x010fca0000000000 */
/*08f0*/ STG.E [R10.64+0x14], R15 ; /* 0x0000140f0a007986 */
/* 0x0001e8000c101904 */
/*0900*/ LDG.E R12, [R6.64+0x18] ; /* 0x00001804060c7981 */
/* 0x000f28000c1e1900 */
/*0910*/ LDG.E R17, [R8.64+0x18] ; /* 0x0000180408117981 */
/* 0x004f24000c1e1900 */
/*0920*/ FADD R17, R12, R17 ; /* 0x000000110c117221 */
/* 0x010fca0000000000 */
/*0930*/ STG.E [R10.64+0x18], R17 ; /* 0x000018110a007986 */
/* 0x0001e8000c101904 */
/*0940*/ LDG.E R12, [R6.64+0x1c] ; /* 0x00001c04060c7981 */
/* 0x000ea8000c1e1900 */
/*0950*/ LDG.E R19, [R8.64+0x1c] ; /* 0x00001c0408137981 */
/* 0x008ea2000c1e1900 */
/*0960*/ UIADD3 UR6, UP0, UR6, 0x20, URZ ; /* 0x0000002006067890 */
/* 0x000fe2000ff1e03f */
/*0970*/ PLOP3.LUT P0, PT, PT, PT, PT, 0x8, 0x0 ; /* 0x000000000000781c */
/* 0x000fe20003f0e170 */
/*0980*/ UIADD3 UR8, UP1, UR8, 0x20, URZ ; /* 0x0000002008087890 */
/* 0x000fe2000ff3e03f */
/*0990*/ IADD3 R5, R5, 0x8, RZ ; /* 0x0000000805057810 */
/* 0x000fe20007ffe0ff */
/*09a0*/ UIADD3 UR10, UP2, UR10, 0x20, URZ ; /* 0x000000200a0a7890 */
/* 0x000fe2000ff5e03f */
/*09b0*/ IADD3 R3, R3, -0x8, RZ ; /* 0xfffffff803037810 */
/* 0x000fe20007ffe0ff */
/*09c0*/ UIADD3.X UR7, URZ, UR7, URZ, UP0, !UPT ; /* 0x000000073f077290 */
/* 0x000fc400087fe43f */
/*09d0*/ UIADD3.X UR9, URZ, UR9, URZ, UP1, !UPT ; /* 0x000000093f097290 */
/* 0x000fe40008ffe43f */
/*09e0*/ UIADD3.X UR11, URZ, UR11, URZ, UP2, !UPT ; /* 0x0000000b3f0b7290 */
/* 0x000fe200097fe43f */
/*09f0*/ FADD R19, R12, R19 ; /* 0x000000130c137221 */
/* 0x004fca0000000000 */
/*0a00*/ STG.E [R10.64+0x1c], R19 ; /* 0x00001c130a007986 */
/* 0x0001e8000c101904 */
/*0a10*/ ISETP.NE.OR P0, PT, R3, RZ, P0 ; /* 0x000000ff0300720c */
/* 0x000fda0000705670 */
/*0a20*/ @!P0 BRA 0xc60 ; /* 0x0000023000008947 */
/* 0x000fea0003800000 */
/*0a30*/ MOV R8, UR10 ; /* 0x0000000a00087c02 */
/* 0x000fe20008000f00 */
/*0a40*/ IMAD.U32 R9, RZ, RZ, UR11 ; /* 0x0000000bff097e24 */
/* 0x000fe2000f8e00ff */
/*0a50*/ MOV R6, UR8 ; /* 0x0000000800067c02 */
/* 0x000fe40008000f00 */
/*0a60*/ MOV R7, UR9 ; /* 0x0000000900077c02 */
/* 0x000fe20008000f00 */
/*0a70*/ IMAD.WIDE R8, R4, 0x4, R8 ; /* 0x0000000404087825 */
/* 0x000fc800078e0208 */
/*0a80*/ IMAD.WIDE R6, R4, 0x4, R6 ; /* 0x0000000404067825 */
/* 0x000fe200078e0206 */
/*0a90*/ LDG.E R13, [R8.64] ; /* 0x00000004080d7981 */
/* 0x001ea8000c1e1900 */
/*0aa0*/ LDG.E R12, [R6.64] ; /* 0x00000004060c7981 */
/* 0x000ea2000c1e1900 */
/*0ab0*/ MOV R10, UR6 ; /* 0x00000006000a7c02 */
/* 0x000fe20008000f00 */
/*0ac0*/ IMAD.U32 R11, RZ, RZ, UR7 ; /* 0x00000007ff0b7e24 */
/* 0x000fc8000f8e00ff */
/*0ad0*/ IMAD.WIDE R10, R4, 0x4, R10 ; /* 0x00000004040a7825 */
/* 0x000fc800078e020a */
/*0ae0*/ FADD R13, R12, R13 ; /* 0x0000000d0c0d7221 */
/* 0x004fca0000000000 */
/*0af0*/ STG.E [R10.64], R13 ; /* 0x0000000d0a007986 */
/* 0x0001e8000c101904 */
/*0b00*/ LDG.E R12, [R6.64+0x4] ; /* 0x00000404060c7981 */
/* 0x000ea8000c1e1900 */
/*0b10*/ LDG.E R15, [R8.64+0x4] ; /* 0x00000404080f7981 */
/* 0x000ea4000c1e1900 */
/*0b20*/ FADD R15, R12, R15 ; /* 0x0000000f0c0f7221 */
/* 0x004fca0000000000 */
/*0b30*/ STG.E [R10.64+0x4], R15 ; /* 0x0000040f0a007986 */
/* 0x0001e8000c101904 */
/*0b40*/ LDG.E R12, [R6.64+0x8] ; /* 0x00000804060c7981 */
/* 0x000ea8000c1e1900 */
/*0b50*/ LDG.E R17, [R8.64+0x8] ; /* 0x0000080408117981 */
/* 0x000ea2000c1e1900 */
/*0b60*/ IADD3 R3, R3, -0x4, RZ ; /* 0xfffffffc03037810 */
/* 0x000fe20007ffe0ff */
/*0b70*/ FADD R17, R12, R17 ; /* 0x000000110c117221 */
/* 0x004fca0000000000 */
/*0b80*/ STG.E [R10.64+0x8], R17 ; /* 0x000008110a007986 */
/* 0x0001e8000c101904 */
/*0b90*/ LDG.E R12, [R6.64+0xc] ; /* 0x00000c04060c7981 */
/* 0x000ea8000c1e1900 */
/*0ba0*/ LDG.E R19, [R8.64+0xc] ; /* 0x00000c0408137981 */
/* 0x000ea2000c1e1900 */
/*0bb0*/ ISETP.NE.AND P0, PT, R3, RZ, PT ; /* 0x000000ff0300720c */
/* 0x000fe20003f05270 */
/*0bc0*/ UIADD3 UR6, UP0, UR6, 0x10, URZ ; /* 0x0000001006067890 */
/* 0x000fc4000ff1e03f */
/*0bd0*/ UIADD3 UR8, UP1, UR8, 0x10, URZ ; /* 0x0000001008087890 */
/* 0x000fe4000ff3e03f */
/*0be0*/ UIADD3 UR10, UP2, UR10, 0x10, URZ ; /* 0x000000100a0a7890 */
/* 0x000fe4000ff5e03f */
/*0bf0*/ UIADD3.X UR7, URZ, UR7, URZ, UP0, !UPT ; /* 0x000000073f077290 */
/* 0x000fe400087fe43f */
/*0c00*/ UIADD3.X UR9, URZ, UR9, URZ, UP1, !UPT ; /* 0x000000093f097290 */
/* 0x000fe40008ffe43f */
/*0c10*/ UIADD3.X UR11, URZ, UR11, URZ, UP2, !UPT ; /* 0x0000000b3f0b7290 */
/* 0x000fe200097fe43f */
/*0c20*/ IADD3 R5, R5, 0x4, RZ ; /* 0x0000000405057810 */
/* 0x000fe20007ffe0ff */
/*0c30*/ FADD R19, R12, R19 ; /* 0x000000130c137221 */
/* 0x004fca0000000000 */
/*0c40*/ STG.E [R10.64+0xc], R19 ; /* 0x00000c130a007986 */
/* 0x0001e4000c101904 */
/*0c50*/ @P0 BRA 0xa30 ; /* 0xfffffdd000000947 */
/* 0x001fea000383ffff */
/*0c60*/ ISETP.NE.AND P0, PT, R0, RZ, PT ; /* 0x000000ff0000720c */
/* 0x000fda0003f05270 */
/*0c70*/ @!P0 EXIT ; /* 0x000000000000894d */
/* 0x000fea0003800000 */
/*0c80*/ HFMA2.MMA R7, -RZ, RZ, 0, 2.384185791015625e-07 ; /* 0x00000004ff077435 */
/* 0x000fe200000001ff */
/*0c90*/ IMAD R6, R2, c[0x0][0x17c], R5 ; /* 0x00005f0002067a24 */
/* 0x000fd200078e0205 */
/*0ca0*/ IMAD.WIDE R2, R6, R7, c[0x0][0x170] ; /* 0x00005c0006027625 */
/* 0x000fc800078e0207 */
/*0cb0*/ IMAD.WIDE R4, R6.reuse, R7, c[0x0][0x168] ; /* 0x00005a0006047625 */
/* 0x040fe200078e0207 */
/*0cc0*/ MOV R10, R2 ; /* 0x00000002000a7202 */
/* 0x001fe40000000f00 */
/*0cd0*/ MOV R13, R3 ; /* 0x00000003000d7202 */
/* 0x000fe20000000f00 */
/*0ce0*/ IMAD.WIDE R6, R6, R7, c[0x0][0x160] ; /* 0x0000580006067625 */
/* 0x000fe200078e0207 */
/*0cf0*/ MOV R11, R5 ; /* 0x00000005000b7202 */
/* 0x000fc60000000f00 */
/*0d00*/ IMAD.MOV.U32 R8, RZ, RZ, R4 ; /* 0x000000ffff087224 */
/* 0x000fe200078e0004 */
/*0d10*/ MOV R9, R7 ; /* 0x0000000700097202 */
/* 0x000fc80000000f00 */
/*0d20*/ MOV R2, R8 ; /* 0x0000000800027202 */
/* 0x001fe20000000f00 */
/*0d30*/ IMAD.MOV.U32 R3, RZ, RZ, R11 ; /* 0x000000ffff037224 */
/* 0x000fe200078e000b */
/*0d40*/ MOV R5, R9 ; /* 0x0000000900057202 */
/* 0x000fe40000000f00 */
/*0d50*/ MOV R4, R6 ; /* 0x0000000600047202 */
/* 0x000fe40000000f00 */
/*0d60*/ LDG.E R2, [R2.64] ; /* 0x0000000402027981 */
/* 0x0000a8000c1e1900 */
/*0d70*/ LDG.E R5, [R4.64] ; /* 0x0000000404057981 */
/* 0x000ea2000c1e1900 */
/*0d80*/ IADD3 R0, R0, -0x1, RZ ; /* 0xffffffff00007810 */
/* 0x000fc40007ffe0ff */
/*0d90*/ IADD3 R8, P2, R8, 0x4, RZ ; /* 0x0000000408087810 */
/* 0x000fe40007f5e0ff */
/*0da0*/ ISETP.NE.AND P0, PT, R0, RZ, PT ; /* 0x000000ff0000720c */
/* 0x000fe20003f05270 */
/*0db0*/ IMAD.MOV.U32 R3, RZ, RZ, R13 ; /* 0x000000ffff037224 */
/* 0x001fe200078e000d */
/*0dc0*/ IADD3 R6, P3, R6, 0x4, RZ ; /* 0x0000000406067810 */
/* 0x000fe40007f7e0ff */
/*0dd0*/ IADD3.X R11, RZ, R11, RZ, P2, !PT ; /* 0x0000000bff0b7210 */
/* 0x000fe400017fe4ff */
/*0de0*/ IADD3.X R9, RZ, R9, RZ, P3, !PT ; /* 0x00000009ff097210 */
/* 0x000fe20001ffe4ff */
/*0df0*/ FADD R7, R2, R5 ; /* 0x0000000502077221 */
/* 0x004fe20000000000 */
/*0e00*/ MOV R2, R10 ; /* 0x0000000a00027202 */
/* 0x000fc40000000f00 */
/*0e10*/ IADD3 R10, P1, R10, 0x4, RZ ; /* 0x000000040a0a7810 */
/* 0x000fc60007f3e0ff */
/*0e20*/ STG.E [R2.64], R7 ; /* 0x0000000702007986 */
/* 0x0001e2000c101904 */
/*0e30*/ IADD3.X R13, RZ, R13, RZ, P1, !PT ; /* 0x0000000dff0d7210 */
/* 0x000fe20000ffe4ff */
/*0e40*/ @P0 BRA 0xd20 ; /* 0xfffffed000000947 */
/* 0x000fea000383ffff */
/*0e50*/ EXIT ; /* 0x000000000000794d */
/* 0x000fea0003800000 */
/*0e60*/ BRA 0xe60; /* 0xfffffff000007947 */
/* 0x000fc0000383ffff */
/*0e70*/ NOP; /* 0x0000000000007918 */
/* 0x000fc00000000000 */
/*0e80*/ NOP; /* 0x0000000000007918 */
/* 0x000fc00000000000 */
/*0e90*/ NOP; /* 0x0000000000007918 */
/* 0x000fc00000000000 */
/*0ea0*/ NOP; /* 0x0000000000007918 */
/* 0x000fc00000000000 */
/*0eb0*/ NOP; /* 0x0000000000007918 */
/* 0x000fc00000000000 */
/*0ec0*/ NOP; /* 0x0000000000007918 */
/* 0x000fc00000000000 */
/*0ed0*/ NOP; /* 0x0000000000007918 */
/* 0x000fc00000000000 */
/*0ee0*/ NOP; /* 0x0000000000007918 */
/* 0x000fc00000000000 */
/*0ef0*/ NOP; /* 0x0000000000007918 */
/* 0x000fc00000000000 */
.......... | .text
.amdgcn_target "amdgcn-amd-amdhsa--gfx1100"
.protected _Z6VecAddPfS_S_ii
.globl _Z6VecAddPfS_S_ii
.p2align 8
.type _Z6VecAddPfS_S_ii,@function
_Z6VecAddPfS_S_ii:
s_clause 0x1
s_load_b32 s4, s[0:1], 0x2c
s_load_b64 s[2:3], s[0:1], 0x18
s_waitcnt lgkmcnt(0)
s_and_b32 s4, s4, 0xffff
s_cmp_gt_i32 s3, 0
v_mad_u64_u32 v[1:2], null, s15, s4, v[0:1]
s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(SALU_CYCLE_1)
v_cmp_gt_i32_e32 vcc_lo, s2, v1
s_cselect_b32 s2, -1, 0
s_and_b32 s2, vcc_lo, s2
s_delay_alu instid0(SALU_CYCLE_1)
s_and_saveexec_b32 s4, s2
s_cbranch_execz .LBB0_3
s_load_b128 s[4:7], s[0:1], 0x0
v_mul_lo_u32 v0, v1, s3
s_load_b64 s[0:1], s[0:1], 0x10
s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
v_ashrrev_i32_e32 v1, 31, v0
v_lshlrev_b64 v[4:5], 2, v[0:1]
s_waitcnt lgkmcnt(0)
s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_2)
v_add_co_u32 v0, vcc_lo, s4, v4
v_add_co_ci_u32_e32 v1, vcc_lo, s5, v5, vcc_lo
v_add_co_u32 v2, vcc_lo, s6, v4
v_add_co_ci_u32_e32 v3, vcc_lo, s7, v5, vcc_lo
v_add_co_u32 v4, vcc_lo, s0, v4
v_add_co_ci_u32_e32 v5, vcc_lo, s1, v5, vcc_lo
.p2align 6
.LBB0_2:
global_load_b32 v6, v[0:1], off
global_load_b32 v7, v[2:3], off
v_add_co_u32 v0, vcc_lo, v0, 4
v_add_co_ci_u32_e32 v1, vcc_lo, 0, v1, vcc_lo
v_add_co_u32 v2, vcc_lo, v2, 4
v_add_co_ci_u32_e32 v3, vcc_lo, 0, v3, vcc_lo
s_add_i32 s3, s3, -1
s_delay_alu instid0(SALU_CYCLE_1)
s_cmp_lg_u32 s3, 0
s_waitcnt vmcnt(0)
v_add_f32_e32 v6, v6, v7
global_store_b32 v[4:5], v6, off
v_add_co_u32 v4, vcc_lo, v4, 4
v_add_co_ci_u32_e32 v5, vcc_lo, 0, v5, vcc_lo
s_cbranch_scc1 .LBB0_2
.LBB0_3:
s_nop 0
s_sendmsg sendmsg(MSG_DEALLOC_VGPRS)
s_endpgm
.section .rodata,"a",@progbits
.p2align 6, 0x0
.amdhsa_kernel _Z6VecAddPfS_S_ii
.amdhsa_group_segment_fixed_size 0
.amdhsa_private_segment_fixed_size 0
.amdhsa_kernarg_size 288
.amdhsa_user_sgpr_count 15
.amdhsa_user_sgpr_dispatch_ptr 0
.amdhsa_user_sgpr_queue_ptr 0
.amdhsa_user_sgpr_kernarg_segment_ptr 1
.amdhsa_user_sgpr_dispatch_id 0
.amdhsa_user_sgpr_private_segment_size 0
.amdhsa_wavefront_size32 1
.amdhsa_uses_dynamic_stack 0
.amdhsa_enable_private_segment 0
.amdhsa_system_sgpr_workgroup_id_x 1
.amdhsa_system_sgpr_workgroup_id_y 0
.amdhsa_system_sgpr_workgroup_id_z 0
.amdhsa_system_sgpr_workgroup_info 0
.amdhsa_system_vgpr_workitem_id 0
.amdhsa_next_free_vgpr 8
.amdhsa_next_free_sgpr 16
.amdhsa_float_round_mode_32 0
.amdhsa_float_round_mode_16_64 0
.amdhsa_float_denorm_mode_32 3
.amdhsa_float_denorm_mode_16_64 3
.amdhsa_dx10_clamp 1
.amdhsa_ieee_mode 1
.amdhsa_fp16_overflow 0
.amdhsa_workgroup_processor_mode 1
.amdhsa_memory_ordered 1
.amdhsa_forward_progress 0
.amdhsa_shared_vgpr_count 0
.amdhsa_exception_fp_ieee_invalid_op 0
.amdhsa_exception_fp_denorm_src 0
.amdhsa_exception_fp_ieee_div_zero 0
.amdhsa_exception_fp_ieee_overflow 0
.amdhsa_exception_fp_ieee_underflow 0
.amdhsa_exception_fp_ieee_inexact 0
.amdhsa_exception_int_div_zero 0
.end_amdhsa_kernel
.text
.Lfunc_end0:
.size _Z6VecAddPfS_S_ii, .Lfunc_end0-_Z6VecAddPfS_S_ii
.section .AMDGPU.csdata,"",@progbits
.text
.p2alignl 7, 3214868480
.fill 96, 4, 3214868480
.type __hip_cuid_,@object
.section .bss,"aw",@nobits
.globl __hip_cuid_
__hip_cuid_:
.byte 0
.size __hip_cuid_, 1
.ident "AMD clang version 18.0.0git (https://github.com/RadeonOpenCompute/llvm-project roc-6.3.2 25012 e5bf7e55c91490b07c49d8960fa7983d864936c4)"
.section ".note.GNU-stack","",@progbits
.addrsig
.addrsig_sym __hip_cuid_
.amdgpu_metadata
---
amdhsa.kernels:
- .args:
- .address_space: global
.offset: 0
.size: 8
.value_kind: global_buffer
- .address_space: global
.offset: 8
.size: 8
.value_kind: global_buffer
- .address_space: global
.offset: 16
.size: 8
.value_kind: global_buffer
- .offset: 24
.size: 4
.value_kind: by_value
- .offset: 28
.size: 4
.value_kind: by_value
- .offset: 32
.size: 4
.value_kind: hidden_block_count_x
- .offset: 36
.size: 4
.value_kind: hidden_block_count_y
- .offset: 40
.size: 4
.value_kind: hidden_block_count_z
- .offset: 44
.size: 2
.value_kind: hidden_group_size_x
- .offset: 46
.size: 2
.value_kind: hidden_group_size_y
- .offset: 48
.size: 2
.value_kind: hidden_group_size_z
- .offset: 50
.size: 2
.value_kind: hidden_remainder_x
- .offset: 52
.size: 2
.value_kind: hidden_remainder_y
- .offset: 54
.size: 2
.value_kind: hidden_remainder_z
- .offset: 72
.size: 8
.value_kind: hidden_global_offset_x
- .offset: 80
.size: 8
.value_kind: hidden_global_offset_y
- .offset: 88
.size: 8
.value_kind: hidden_global_offset_z
- .offset: 96
.size: 2
.value_kind: hidden_grid_dims
.group_segment_fixed_size: 0
.kernarg_segment_align: 8
.kernarg_segment_size: 288
.language: OpenCL C
.language_version:
- 2
- 0
.max_flat_workgroup_size: 1024
.name: _Z6VecAddPfS_S_ii
.private_segment_fixed_size: 0
.sgpr_count: 18
.sgpr_spill_count: 0
.symbol: _Z6VecAddPfS_S_ii.kd
.uniform_work_group_size: 1
.uses_dynamic_stack: false
.vgpr_count: 8
.vgpr_spill_count: 0
.wavefront_size: 32
.workgroup_processor_mode: 1
amdhsa.target: amdgcn-amd-amdhsa--gfx1100
amdhsa.version:
- 1
- 2
...
.end_amdgpu_metadata |
You are a helpful coding assistant specialized in converting from CUDA host assembly to AMD host assembly. | .file "tmpxft_001af97e_00000000-6_ee16b068_456.cudafe1.cpp"
.text
#APP
#NO_APP
.type _ZL26__cudaUnregisterBinaryUtilv, @function
_ZL26__cudaUnregisterBinaryUtilv:
.LFB2060:
.cfi_startproc
endbr64
subq $8, %rsp
.cfi_def_cfa_offset 16
movq _ZL20__cudaFatCubinHandle(%rip), %rdi
call __cudaUnregisterFatBinary@PLT
addq $8, %rsp
.cfi_def_cfa_offset 8
ret
.cfi_endproc
.LFE2060:
.size _ZL26__cudaUnregisterBinaryUtilv, .-_ZL26__cudaUnregisterBinaryUtilv
.globl _Z31__device_stub__Z6VecAddPfS_S_iiPfS_S_ii
.type _Z31__device_stub__Z6VecAddPfS_S_iiPfS_S_ii, @function
_Z31__device_stub__Z6VecAddPfS_S_iiPfS_S_ii:
.LFB2082:
.cfi_startproc
endbr64
subq $152, %rsp
.cfi_def_cfa_offset 160
movq %rdi, 24(%rsp)
movq %rsi, 16(%rsp)
movq %rdx, 8(%rsp)
movl %ecx, 4(%rsp)
movl %r8d, (%rsp)
movq %fs:40, %rax
movq %rax, 136(%rsp)
xorl %eax, %eax
leaq 24(%rsp), %rax
movq %rax, 96(%rsp)
leaq 16(%rsp), %rax
movq %rax, 104(%rsp)
leaq 8(%rsp), %rax
movq %rax, 112(%rsp)
leaq 4(%rsp), %rax
movq %rax, 120(%rsp)
movq %rsp, %rax
movq %rax, 128(%rsp)
movl $1, 48(%rsp)
movl $1, 52(%rsp)
movl $1, 56(%rsp)
movl $1, 60(%rsp)
movl $1, 64(%rsp)
movl $1, 68(%rsp)
leaq 40(%rsp), %rcx
leaq 32(%rsp), %rdx
leaq 60(%rsp), %rsi
leaq 48(%rsp), %rdi
call __cudaPopCallConfiguration@PLT
testl %eax, %eax
je .L7
.L3:
movq 136(%rsp), %rax
subq %fs:40, %rax
jne .L8
addq $152, %rsp
.cfi_remember_state
.cfi_def_cfa_offset 8
ret
.L7:
.cfi_restore_state
pushq 40(%rsp)
.cfi_def_cfa_offset 168
pushq 40(%rsp)
.cfi_def_cfa_offset 176
leaq 112(%rsp), %r9
movq 76(%rsp), %rcx
movl 84(%rsp), %r8d
movq 64(%rsp), %rsi
movl 72(%rsp), %edx
leaq _Z6VecAddPfS_S_ii(%rip), %rdi
call cudaLaunchKernel@PLT
addq $16, %rsp
.cfi_def_cfa_offset 160
jmp .L3
.L8:
call __stack_chk_fail@PLT
.cfi_endproc
.LFE2082:
.size _Z31__device_stub__Z6VecAddPfS_S_iiPfS_S_ii, .-_Z31__device_stub__Z6VecAddPfS_S_iiPfS_S_ii
.globl _Z6VecAddPfS_S_ii
.type _Z6VecAddPfS_S_ii, @function
_Z6VecAddPfS_S_ii:
.LFB2083:
.cfi_startproc
endbr64
subq $8, %rsp
.cfi_def_cfa_offset 16
call _Z31__device_stub__Z6VecAddPfS_S_iiPfS_S_ii
addq $8, %rsp
.cfi_def_cfa_offset 8
ret
.cfi_endproc
.LFE2083:
.size _Z6VecAddPfS_S_ii, .-_Z6VecAddPfS_S_ii
.section .rodata.str1.1,"aMS",@progbits,1
.LC0:
.string "r"
.LC1:
.string "%f"
.text
.globl main
.type main, @function
main:
.LFB2057:
.cfi_startproc
endbr64
pushq %r15
.cfi_def_cfa_offset 16
.cfi_offset 15, -16
pushq %r14
.cfi_def_cfa_offset 24
.cfi_offset 14, -24
pushq %r13
.cfi_def_cfa_offset 32
.cfi_offset 13, -32
pushq %r12
.cfi_def_cfa_offset 40
.cfi_offset 12, -40
pushq %rbp
.cfi_def_cfa_offset 48
.cfi_offset 6, -48
pushq %rbx
.cfi_def_cfa_offset 56
.cfi_offset 3, -56
subq $152, %rsp
.cfi_def_cfa_offset 208
movq %fs:40, %rax
movq %rax, 136(%rsp)
xorl %eax, %eax
movl $1, %eax
cmpl $4, %edi
jg .L22
.L11:
movq 136(%rsp), %rdx
subq %fs:40, %rdx
jne .L23
addq $152, %rsp
.cfi_remember_state
.cfi_def_cfa_offset 56
popq %rbx
.cfi_def_cfa_offset 48
popq %rbp
.cfi_def_cfa_offset 40
popq %r12
.cfi_def_cfa_offset 32
popq %r13
.cfi_def_cfa_offset 24
popq %r14
.cfi_def_cfa_offset 16
popq %r15
.cfi_def_cfa_offset 8
ret
.L22:
.cfi_restore_state
movq %rsi, %rbx
movq 8(%rsi), %rdi
movl $10, %edx
movl $0, %esi
call __isoc23_strtol@PLT
movq %rax, 40(%rsp)
movl %eax, 52(%rsp)
movq 16(%rbx), %rdi
movl $10, %edx
movl $0, %esi
call __isoc23_strtol@PLT
movq %rax, 16(%rsp)
movl %eax, 48(%rsp)
movq 24(%rbx), %rdi
movl $10, %edx
movl $0, %esi
call __isoc23_strtol@PLT
movq %rax, %r15
movq %rax, 32(%rsp)
movslq %eax, %rbp
salq $2, %rbp
movq 32(%rbx), %rdi
leaq .LC0(%rip), %r12
movq %r12, %rsi
call fopen@PLT
movq %rax, %r13
movq 40(%rbx), %rdi
movq %r12, %rsi
call fopen@PLT
movq %rax, %r12
movq %rbp, %rdi
call malloc@PLT
movq %rax, %rbx
movq %rax, 8(%rsp)
movq %rbp, %rdi
call malloc@PLT
movq %rax, (%rsp)
movq %rbp, %rdi
call malloc@PLT
movq %rax, 24(%rsp)
testl %r15d, %r15d
jle .L13
leal -1(%r15), %eax
salq $2, %rax
leaq 4(%rbx,%rax), %r15
leaq .LC1(%rip), %r14
movq %rbp, 56(%rsp)
movq %rax, %rbp
.L14:
movq %rbx, %rdx
movq %r14, %rsi
movq %r13, %rdi
movl $0, %eax
call __isoc23_fscanf@PLT
addq $4, %rbx
cmpq %r15, %rbx
jne .L14
movq %rbp, %rax
movq 56(%rsp), %rbp
movq (%rsp), %rcx
movq %rcx, %rbx
leaq 4(%rcx,%rax), %r14
leaq .LC1(%rip), %r13
.L15:
movq %rbx, %rdx
movq %r13, %rsi
movq %r12, %rdi
movl $0, %eax
call __isoc23_fscanf@PLT
addq $4, %rbx
cmpq %r14, %rbx
jne .L15
.L13:
leaq 72(%rsp), %rdi
movq %rbp, %rsi
call cudaMalloc@PLT
leaq 80(%rsp), %rdi
movq %rbp, %rsi
call cudaMalloc@PLT
leaq 88(%rsp), %rdi
movq %rbp, %rsi
call cudaMalloc@PLT
leaq 96(%rsp), %rdi
call cudaEventCreate@PLT
leaq 104(%rsp), %rdi
call cudaEventCreate@PLT
movl $1, %ecx
movq %rbp, %rdx
movq 8(%rsp), %rsi
movq 72(%rsp), %rdi
call cudaMemcpy@PLT
movl $1, %ecx
movq %rbp, %rdx
movq (%rsp), %rsi
movq 80(%rsp), %rdi
call cudaMemcpy@PLT
movq 16(%rsp), %rax
movq 32(%rsp), %rcx
leal -1(%rax,%rcx), %eax
cltd
idivl 48(%rsp)
movl %eax, %ebx
movq 40(%rsp), %r15
leal -1(%rax,%r15), %eax
cltd
idivl 52(%rsp)
movl %eax, %r12d
movl $0, %esi
movq 96(%rsp), %rdi
call cudaEventRecord@PLT
movl %r15d, 124(%rsp)
movl $1, 128(%rsp)
movl $1, 132(%rsp)
movl %r12d, 112(%rsp)
movl $1, 116(%rsp)
movl $0, %r9d
movl $0, %r8d
movq 124(%rsp), %rdx
movl $1, %ecx
movq 112(%rsp), %rdi
movl $1, %esi
call __cudaPushCallConfiguration@PLT
testl %eax, %eax
je .L24
.L16:
movl $0, %esi
movq 104(%rsp), %rdi
call cudaEventRecord@PLT
movl $2, %ecx
movq %rbp, %rdx
movq 88(%rsp), %rsi
movq 24(%rsp), %rdi
call cudaMemcpy@PLT
movq 104(%rsp), %rdi
call cudaEventSynchronize@PLT
leaq 124(%rsp), %rdi
movq 104(%rsp), %rdx
movq 96(%rsp), %rsi
call cudaEventElapsedTime@PLT
pxor %xmm0, %xmm0
cvtss2sd 124(%rsp), %xmm0
leaq .LC1(%rip), %rsi
movl $2, %edi
movl $1, %eax
call __printf_chk@PLT
movq 72(%rsp), %rdi
call cudaFree@PLT
movq 80(%rsp), %rdi
call cudaFree@PLT
movq 88(%rsp), %rdi
call cudaFree@PLT
movq 8(%rsp), %rdi
call free@PLT
movq (%rsp), %rdi
call free@PLT
movl $0, %eax
jmp .L11
.L24:
movl 16(%rsp), %r8d
movl %ebx, %ecx
movq 88(%rsp), %rdx
movq 80(%rsp), %rsi
movq 72(%rsp), %rdi
call _Z31__device_stub__Z6VecAddPfS_S_iiPfS_S_ii
jmp .L16
.L23:
call __stack_chk_fail@PLT
.cfi_endproc
.LFE2057:
.size main, .-main
.section .rodata.str1.1
.LC2:
.string "_Z6VecAddPfS_S_ii"
.text
.type _ZL24__sti____cudaRegisterAllv, @function
_ZL24__sti____cudaRegisterAllv:
.LFB2085:
.cfi_startproc
endbr64
subq $8, %rsp
.cfi_def_cfa_offset 16
leaq _ZL15__fatDeviceText(%rip), %rdi
call __cudaRegisterFatBinary@PLT
movq %rax, %rdi
movq %rax, _ZL20__cudaFatCubinHandle(%rip)
pushq $0
.cfi_def_cfa_offset 24
pushq $0
.cfi_def_cfa_offset 32
pushq $0
.cfi_def_cfa_offset 40
pushq $0
.cfi_def_cfa_offset 48
movl $0, %r9d
movl $-1, %r8d
leaq .LC2(%rip), %rdx
movq %rdx, %rcx
leaq _Z6VecAddPfS_S_ii(%rip), %rsi
call __cudaRegisterFunction@PLT
addq $32, %rsp
.cfi_def_cfa_offset 16
movq _ZL20__cudaFatCubinHandle(%rip), %rdi
call __cudaRegisterFatBinaryEnd@PLT
leaq _ZL26__cudaUnregisterBinaryUtilv(%rip), %rdi
call atexit@PLT
addq $8, %rsp
.cfi_def_cfa_offset 8
ret
.cfi_endproc
.LFE2085:
.size _ZL24__sti____cudaRegisterAllv, .-_ZL24__sti____cudaRegisterAllv
.section .init_array,"aw"
.align 8
.quad _ZL24__sti____cudaRegisterAllv
.section .nvFatBinSegment,"aw"
.align 8
.type _ZL15__fatDeviceText, @object
.size _ZL15__fatDeviceText, 24
_ZL15__fatDeviceText:
.long 1180844977
.long 1
.quad fatbinData
.quad 0
.local _ZL20__cudaFatCubinHandle
.comm _ZL20__cudaFatCubinHandle,8,8
.ident "GCC: (Ubuntu 13.3.0-6ubuntu2~24.04) 13.3.0"
.section .note.GNU-stack,"",@progbits
.section .note.gnu.property,"a"
.align 8
.long 1f - 0f
.long 4f - 1f
.long 5
0:
.string "GNU"
1:
.align 8
.long 0xc0000002
.long 3f - 2f
2:
.long 0x3
3:
.align 8
4: | .text
.file "ee16b068_456.hip"
.globl _Z21__device_stub__VecAddPfS_S_ii # -- Begin function _Z21__device_stub__VecAddPfS_S_ii
.p2align 4, 0x90
.type _Z21__device_stub__VecAddPfS_S_ii,@function
_Z21__device_stub__VecAddPfS_S_ii: # @_Z21__device_stub__VecAddPfS_S_ii
.cfi_startproc
# %bb.0:
subq $120, %rsp
.cfi_def_cfa_offset 128
movq %rdi, 72(%rsp)
movq %rsi, 64(%rsp)
movq %rdx, 56(%rsp)
movl %ecx, 4(%rsp)
movl %r8d, (%rsp)
leaq 72(%rsp), %rax
movq %rax, 80(%rsp)
leaq 64(%rsp), %rax
movq %rax, 88(%rsp)
leaq 56(%rsp), %rax
movq %rax, 96(%rsp)
leaq 4(%rsp), %rax
movq %rax, 104(%rsp)
movq %rsp, %rax
movq %rax, 112(%rsp)
leaq 40(%rsp), %rdi
leaq 24(%rsp), %rsi
leaq 16(%rsp), %rdx
leaq 8(%rsp), %rcx
callq __hipPopCallConfiguration
movq 40(%rsp), %rsi
movl 48(%rsp), %edx
movq 24(%rsp), %rcx
movl 32(%rsp), %r8d
leaq 80(%rsp), %r9
movl $_Z6VecAddPfS_S_ii, %edi
pushq 8(%rsp)
.cfi_adjust_cfa_offset 8
pushq 24(%rsp)
.cfi_adjust_cfa_offset 8
callq hipLaunchKernel
addq $136, %rsp
.cfi_adjust_cfa_offset -136
retq
.Lfunc_end0:
.size _Z21__device_stub__VecAddPfS_S_ii, .Lfunc_end0-_Z21__device_stub__VecAddPfS_S_ii
.cfi_endproc
# -- End function
.globl main # -- Begin function main
.p2align 4, 0x90
.type main,@function
main: # @main
.cfi_startproc
# %bb.0:
pushq %rbp
.cfi_def_cfa_offset 16
pushq %r15
.cfi_def_cfa_offset 24
pushq %r14
.cfi_def_cfa_offset 32
pushq %r13
.cfi_def_cfa_offset 40
pushq %r12
.cfi_def_cfa_offset 48
pushq %rbx
.cfi_def_cfa_offset 56
subq $200, %rsp
.cfi_def_cfa_offset 256
.cfi_offset %rbx, -56
.cfi_offset %r12, -48
.cfi_offset %r13, -40
.cfi_offset %r14, -32
.cfi_offset %r15, -24
.cfi_offset %rbp, -16
movl $1, %r12d
cmpl $5, %edi
jl .LBB1_10
# %bb.1:
movq 8(%rsi), %rdi
movq %rsi, %rbx
xorl %esi, %esi
movl $10, %edx
callq __isoc23_strtol
movq %rax, 64(%rsp) # 8-byte Spill
movq 16(%rbx), %rdi
xorl %esi, %esi
movl $10, %edx
callq __isoc23_strtol
movq %rax, 72(%rsp) # 8-byte Spill
movq 24(%rbx), %rdi
xorl %esi, %esi
movl $10, %edx
callq __isoc23_strtol
movq %rax, %r12
movslq %r12d, %r13
leaq (,%r13,4), %r15
movq 32(%rbx), %rdi
movl $.L.str, %esi
callq fopen
movq %rax, %r14
movq 40(%rbx), %rdi
movl $.L.str, %esi
callq fopen
movq %rax, %rbx
movq %r15, %rdi
callq malloc
movq %rax, (%rsp) # 8-byte Spill
movq %r15, %rdi
callq malloc
movq %rax, 48(%rsp) # 8-byte Spill
movq %r15, %rdi
callq malloc
movq %rax, 80(%rsp) # 8-byte Spill
testl %r13d, %r13d
jle .LBB1_4
# %bb.2: # %.lr.ph.preheader
movl %r12d, %ebp
movq (%rsp), %r13 # 8-byte Reload
.p2align 4, 0x90
.LBB1_3: # %.lr.ph
# =>This Inner Loop Header: Depth=1
movl $.L.str.1, %esi
movq %r14, %rdi
movq %r13, %rdx
xorl %eax, %eax
callq __isoc23_fscanf
addq $4, %r13
decq %rbp
jne .LBB1_3
.LBB1_4: # %.preheader
testl %r12d, %r12d
movq 48(%rsp), %rbp # 8-byte Reload
jle .LBB1_7
# %bb.5: # %.lr.ph53.preheader
movl %r12d, %r13d
movq %rbp, %r14
.p2align 4, 0x90
.LBB1_6: # %.lr.ph53
# =>This Inner Loop Header: Depth=1
movl $.L.str.1, %esi
movq %rbx, %rdi
movq %r14, %rdx
xorl %eax, %eax
callq __isoc23_fscanf
addq $4, %r14
decq %r13
jne .LBB1_6
.LBB1_7: # %._crit_edge
leaq 32(%rsp), %rdi
movq %r15, %rsi
callq hipMalloc
leaq 24(%rsp), %rdi
movq %r15, %rsi
callq hipMalloc
leaq 16(%rsp), %rdi
movq %r15, %rsi
callq hipMalloc
leaq 56(%rsp), %rdi
callq hipEventCreate
leaq 8(%rsp), %rdi
callq hipEventCreate
movq 32(%rsp), %rdi
movq (%rsp), %rsi # 8-byte Reload
movq %r15, %rdx
movl $1, %ecx
callq hipMemcpy
movq 24(%rsp), %rdi
movq %rbp, %rsi
movq %r15, %rdx
movl $1, %ecx
callq hipMemcpy
movq 72(%rsp), %rbp # 8-byte Reload
leal (%r12,%rbp), %eax
decl %eax
cltd
idivl %ebp
movl %eax, %ebx
movq 64(%rsp), %r13 # 8-byte Reload
leal (%rbx,%r13), %eax
decl %eax
cltd
idivl %r13d
movl %eax, %r14d
movq 56(%rsp), %rdi
xorl %r12d, %r12d
xorl %esi, %esi
callq hipEventRecord
movabsq $4294967296, %rax # imm = 0x100000000
orq %rax, %r14
movl %r13d, %edx
orq %rax, %rdx
movq %r14, %rdi
movl $1, %esi
movl $1, %ecx
xorl %r8d, %r8d
xorl %r9d, %r9d
callq __hipPushCallConfiguration
testl %eax, %eax
jne .LBB1_9
# %bb.8:
movq 32(%rsp), %rax
movq 24(%rsp), %rcx
movq 16(%rsp), %rdx
movq %rax, 152(%rsp)
movq %rcx, 144(%rsp)
movq %rdx, 136(%rsp)
movl %ebx, 44(%rsp)
movl %ebp, 40(%rsp)
leaq 152(%rsp), %rax
movq %rax, 160(%rsp)
leaq 144(%rsp), %rax
movq %rax, 168(%rsp)
leaq 136(%rsp), %rax
movq %rax, 176(%rsp)
leaq 44(%rsp), %rax
movq %rax, 184(%rsp)
leaq 40(%rsp), %rax
movq %rax, 192(%rsp)
leaq 120(%rsp), %rdi
leaq 104(%rsp), %rsi
leaq 96(%rsp), %rdx
leaq 88(%rsp), %rcx
callq __hipPopCallConfiguration
movq 120(%rsp), %rsi
movl 128(%rsp), %edx
movq 104(%rsp), %rcx
movl 112(%rsp), %r8d
leaq 160(%rsp), %r9
movl $_Z6VecAddPfS_S_ii, %edi
pushq 88(%rsp)
.cfi_adjust_cfa_offset 8
pushq 104(%rsp)
.cfi_adjust_cfa_offset 8
callq hipLaunchKernel
addq $16, %rsp
.cfi_adjust_cfa_offset -16
.LBB1_9:
movq 8(%rsp), %rdi
xorl %esi, %esi
callq hipEventRecord
movq 16(%rsp), %rsi
movq 80(%rsp), %rdi # 8-byte Reload
movq %r15, %rdx
movl $2, %ecx
callq hipMemcpy
movq 8(%rsp), %rdi
callq hipEventSynchronize
movq 56(%rsp), %rsi
movq 8(%rsp), %rdx
leaq 160(%rsp), %rdi
callq hipEventElapsedTime
movss 160(%rsp), %xmm0 # xmm0 = mem[0],zero,zero,zero
cvtss2sd %xmm0, %xmm0
movl $.L.str.1, %edi
movb $1, %al
callq printf
movq 32(%rsp), %rdi
callq hipFree
movq 24(%rsp), %rdi
callq hipFree
movq 16(%rsp), %rdi
callq hipFree
movq (%rsp), %rdi # 8-byte Reload
callq free
movq 48(%rsp), %rdi # 8-byte Reload
callq free
.LBB1_10:
movl %r12d, %eax
addq $200, %rsp
.cfi_def_cfa_offset 56
popq %rbx
.cfi_def_cfa_offset 48
popq %r12
.cfi_def_cfa_offset 40
popq %r13
.cfi_def_cfa_offset 32
popq %r14
.cfi_def_cfa_offset 24
popq %r15
.cfi_def_cfa_offset 16
popq %rbp
.cfi_def_cfa_offset 8
retq
.Lfunc_end1:
.size main, .Lfunc_end1-main
.cfi_endproc
# -- End function
.p2align 4, 0x90 # -- Begin function __hip_module_ctor
.type __hip_module_ctor,@function
__hip_module_ctor: # @__hip_module_ctor
.cfi_startproc
# %bb.0:
subq $40, %rsp
.cfi_def_cfa_offset 48
cmpq $0, __hip_gpubin_handle(%rip)
jne .LBB2_2
# %bb.1:
movl $__hip_fatbin_wrapper, %edi
callq __hipRegisterFatBinary
movq %rax, __hip_gpubin_handle(%rip)
.LBB2_2:
movq __hip_gpubin_handle(%rip), %rdi
xorps %xmm0, %xmm0
movups %xmm0, 16(%rsp)
movups %xmm0, (%rsp)
movl $_Z6VecAddPfS_S_ii, %esi
movl $.L__unnamed_1, %edx
movl $.L__unnamed_1, %ecx
movl $-1, %r8d
xorl %r9d, %r9d
callq __hipRegisterFunction
movl $__hip_module_dtor, %edi
addq $40, %rsp
.cfi_def_cfa_offset 8
jmp atexit # TAILCALL
.Lfunc_end2:
.size __hip_module_ctor, .Lfunc_end2-__hip_module_ctor
.cfi_endproc
# -- End function
.p2align 4, 0x90 # -- Begin function __hip_module_dtor
.type __hip_module_dtor,@function
__hip_module_dtor: # @__hip_module_dtor
.cfi_startproc
# %bb.0:
movq __hip_gpubin_handle(%rip), %rdi
testq %rdi, %rdi
je .LBB3_2
# %bb.1:
pushq %rax
.cfi_def_cfa_offset 16
callq __hipUnregisterFatBinary
movq $0, __hip_gpubin_handle(%rip)
addq $8, %rsp
.cfi_def_cfa_offset 8
.LBB3_2:
retq
.Lfunc_end3:
.size __hip_module_dtor, .Lfunc_end3-__hip_module_dtor
.cfi_endproc
# -- End function
.type _Z6VecAddPfS_S_ii,@object # @_Z6VecAddPfS_S_ii
.section .rodata,"a",@progbits
.globl _Z6VecAddPfS_S_ii
.p2align 3, 0x0
_Z6VecAddPfS_S_ii:
.quad _Z21__device_stub__VecAddPfS_S_ii
.size _Z6VecAddPfS_S_ii, 8
.type .L.str,@object # @.str
.section .rodata.str1.1,"aMS",@progbits,1
.L.str:
.asciz "r"
.size .L.str, 2
.type .L.str.1,@object # @.str.1
.L.str.1:
.asciz "%f"
.size .L.str.1, 3
.type .L__unnamed_1,@object # @0
.L__unnamed_1:
.asciz "_Z6VecAddPfS_S_ii"
.size .L__unnamed_1, 18
.type __hip_fatbin_wrapper,@object # @__hip_fatbin_wrapper
.section .hipFatBinSegment,"a",@progbits
.p2align 3, 0x0
__hip_fatbin_wrapper:
.long 1212764230 # 0x48495046
.long 1 # 0x1
.quad __hip_fatbin
.quad 0
.size __hip_fatbin_wrapper, 24
.type __hip_gpubin_handle,@object # @__hip_gpubin_handle
.local __hip_gpubin_handle
.comm __hip_gpubin_handle,8,8
.section .init_array,"aw",@init_array
.p2align 3, 0x0
.quad __hip_module_ctor
.type __hip_cuid_,@object # @__hip_cuid_
.bss
.globl __hip_cuid_
__hip_cuid_:
.byte 0 # 0x0
.size __hip_cuid_, 1
.section ".linker-options","e",@llvm_linker_options
.ident "AMD clang version 18.0.0git (https://github.com/RadeonOpenCompute/llvm-project roc-6.3.2 25012 e5bf7e55c91490b07c49d8960fa7983d864936c4)"
.section ".note.GNU-stack","",@progbits
.addrsig
.addrsig_sym _Z21__device_stub__VecAddPfS_S_ii
.addrsig_sym __hip_module_ctor
.addrsig_sym __hip_module_dtor
.addrsig_sym _Z6VecAddPfS_S_ii
.addrsig_sym __hip_fatbin
.addrsig_sym __hip_fatbin_wrapper
.addrsig_sym __hip_cuid_ |
You are a helpful coding assistant specialized in converting CUDA source code to CUDA host assembly. | /*_________________________________________________________________________
* ww2parCC_device_066DP.cu - calculates the self-induced velocity field of the wake.
* Parallel version on GPU - CUDA code executed on device
*
* CUDA kernel function (executed on the device, called from the host) +
* CUDA block & thread functions (executed on the device, called from device)
* Manages data flow, launches and syncronize threads blocks
*
* DUWIND- Delft University Wind Energy Research Institute
* developer: Giuseppe Tescione
*
* Version: 0.6.6DP (alpha) - 20110824
* basic version with no loop unrolling, no wrap and no multithread bodies
* simple cut-off constant for desingularization
* double precision (for GPUs of computing capability 2.x)
*________________________________________________________________________*/
//Definition of double2 and double3 types
//typedef struct {
//double x, y;
//} double2;
//typedef struct {
//double x, y, z;
//} double3;
__constant__ int blocksize_gpu;
__constant__ int nParticles_gpu;
__constant__ int nTargets_gpu;
__constant__ int nParticleBlocks_gpu;
__constant__ int nTargetBlocks_gpu;
__constant__ double ksigmasqr_gpu;
__constant__ double inv_pi_gpu;
__constant__ double myeps_gpu;
/* constants (block dimension, number of particle, cut-off and 1/2pi) residing in
constant memory space, accessible from all threads within the grid and from the host.
Defined in host code*/
__device__ double ww2par_thread(double THR_vorticity, double THR_xTarget, double THR_yTarget, double THR_xBlob, double THR_yBlob, double THR_wBlob)
/*THREAD FUNCTION - set of instructions performed parallely by each processor.
Calculates velocity induction on target particles by source particle.
Takes as input:
THR_UIND (2x double THR_UIND.x & THR_UIND.y) -> velocity induction of target particles
already computed by previous thread blocks to which adds the new induction;
THR_TARG (3x double THR_TARG.x & THR_TARG.y & THR_TARG.z) -> position (x, y) and
vorticity (z) of target particles.Position is needed to calculate induction
but vorticity is not used but kept to mantain data structure coeherency;
THR_SRC (3x double THR_SRC.x & THR_SRC.y & THR_SRC.z) -> position (x, y) and
vorticity (z) of source particles, needed to calculate induction.
Gives as output:
THR_UIND (2x double THR_UIND.x & THR_UIND.y) -> updated velocity induction of targets */
{
//targets-particle distance, local variable [2 FLOPS]
// printf("Thread %d; xTarget %f; yTarget %f; xBlob %f; yBlob %f, wBlob %f\n -----------------------------------------\n",threadIdx.x,THR_xTarget,THR_yTarget,THR_xBlob,THR_yBlob,THR_wBlob);
double2 RAD;
RAD.x = THR_xTarget - THR_xBlob;
RAD.y = THR_yTarget - THR_yBlob;
//square of distance plus cut-off, local variable [4 FLOPS]
double RADSQR = RAD.x * RAD.x + RAD.y * RAD.y + myeps_gpu;
//vorticity/(2pi*sqr(rad)) [2 FLOPS]
double S = THR_wBlob * inv_pi_gpu / ksigmasqr_gpu;
//update velocity induction [4 FLOPS]
THR_vorticity += S * exp(-RADSQR/(ksigmasqr_gpu));
return THR_vorticity;
}
__device__ double ww2par_block(double BLK_xTarget, double BLK_yTarget, double BLK_vorticity)
/*BLOCK FUNCTION - data & execution management for thread block
Evaluate induction in a pxp block
Takes as input:
BLK_TARG (3x double BLK_TARG.x & BLK_TARG.y & BLK_TARG.z) -> position (x, y)
and vorticity (z) of target. Passed unchanged to THREAD CODE as TARGET;
BLK_UIND (2x double BLK_UIND.x & BLK_UIND.y) -> velocity induction of target
particles. Passed unchanged to THREAD CODE as UIND.
Gives as output:
BLK_UIND (2x double BLK_UIND.x & BLK_UIND.y) -> updated velocity induction
of target. Received unchanged by THREAD CODE as UIND */
{
extern __shared__ double BLK_blob [];
//extern __shared__ double BLK_yBlob [];
//extern __shared__ double BLK_wBlob [];
/* External variable residing in shared memory space of thread block,
accessible from all threads within the block. Source particles data array
(position (x & y) and vorticity (z)) common to the block.
Size of the array is determined at launch time with instruction [] */
//call thread function for every thread in block
for ( int i = 0; i <blockDim.x; i++)
{
BLK_vorticity = ww2par_thread(BLK_vorticity, BLK_xTarget, BLK_yTarget, BLK_blob[i], BLK_blob[i+blocksize_gpu], BLK_blob[i+2*blocksize_gpu]);
}
return BLK_vorticity;
}
__global__ void ww2par_kernel(void *cxBlob_gpu_ondevice, void *cyBlob_gpu_ondevice, void *cwBlob_gpu_ondevice, void *cxTarget_gpu_ondevice, void *cyTarget_gpu_ondevice, void *cw_gpu_ondevice)
/*KERNEL FUNCTION - data & execution management for block grid
Kernel executed on the device, called from the host.
Manages memory passages from host to device and executes block function
Takes as input:
*ONDEV_POS and *ONDEV_IND -> pointers to global device memory for the
position and induction of particles */
{
extern __shared__ double BLK_blob []; //see above
//extern __shared__ double BLK_yBlob []; //see above
//extern __shared__ double BLK_wBlob []; //see above
//pointers passage
double * KRN_xBlob = (double *)cxBlob_gpu_ondevice;
double * KRN_yBlob = (double *)cyBlob_gpu_ondevice;
double * KRN_wBlob = (double *)cwBlob_gpu_ondevice;
double * KRN_xTarget = (double *)cxTarget_gpu_ondevice;
double * KRN_yTarget = (double *)cyTarget_gpu_ondevice;
double * KRN_w = (double *)cw_gpu_ondevice;
//induction initialization
double BLK_vorticity;
BLK_vorticity = 0;
//target particles definition
double BLK_xTarget;
double BLK_yTarget;
int NTHR = blockIdx.x * blockDim.x + threadIdx.x;
BLK_xTarget = KRN_xTarget[NTHR];
BLK_yTarget = KRN_yTarget[NTHR];
//printf("Block %d; Thread %d :: Before the loop\n",blockIdx.x,threadIdx.x);
int i, block;
for (i = 0, block = 0; i < nParticles_gpu; i += blocksize_gpu, block++)//LOOP over blocks
{
//source particle definition (shared data)
int id = block * blockDim.x + threadIdx.x;
BLK_blob [threadIdx.x] = KRN_xBlob[id];
BLK_blob [threadIdx.x + blocksize_gpu] = KRN_yBlob[id];
BLK_blob [threadIdx.x + 2*blocksize_gpu] = KRN_wBlob[id];
__syncthreads();
// all shared memory locations are populated before starting computation
BLK_vorticity = ww2par_block(BLK_xTarget, BLK_yTarget, BLK_vorticity); //block function call
__syncthreads();
//all threads within block finish computation before advancing next block
}
//save results in global memory
double WIND = BLK_vorticity;
KRN_w[NTHR] = WIND;
} | .file "tmpxft_000236bf_00000000-6_ww2parGauss_device.cudafe1.cpp"
.text
#APP
#NO_APP
.type _ZL26__cudaUnregisterBinaryUtilv, @function
_ZL26__cudaUnregisterBinaryUtilv:
.LFB2031:
.cfi_startproc
endbr64
subq $8, %rsp
.cfi_def_cfa_offset 16
movq _ZL20__cudaFatCubinHandle(%rip), %rdi
call __cudaUnregisterFatBinary@PLT
addq $8, %rsp
.cfi_def_cfa_offset 8
ret
.cfi_endproc
.LFE2031:
.size _ZL26__cudaUnregisterBinaryUtilv, .-_ZL26__cudaUnregisterBinaryUtilv
.globl _Z13ww2par_threaddddddd
.type _Z13ww2par_threaddddddd, @function
_Z13ww2par_threaddddddd:
.LFB2027:
.cfi_startproc
endbr64
pushq %rax
.cfi_def_cfa_offset 16
popq %rax
.cfi_def_cfa_offset 8
subq $24, %rsp
.cfi_def_cfa_offset 32
movl $1, 12(%rsp)
movl 12(%rsp), %edi
call exit@PLT
.cfi_endproc
.LFE2027:
.size _Z13ww2par_threaddddddd, .-_Z13ww2par_threaddddddd
.globl _Z12ww2par_blockddd
.type _Z12ww2par_blockddd, @function
_Z12ww2par_blockddd:
.LFB2028:
.cfi_startproc
endbr64
pushq %rax
.cfi_def_cfa_offset 16
popq %rax
.cfi_def_cfa_offset 8
subq $24, %rsp
.cfi_def_cfa_offset 32
movl $1, 12(%rsp)
movl 12(%rsp), %edi
call exit@PLT
.cfi_endproc
.LFE2028:
.size _Z12ww2par_blockddd, .-_Z12ww2par_blockddd
.globl _Z43__device_stub__Z13ww2par_kernelPvS_S_S_S_S_PvS_S_S_S_S_
.type _Z43__device_stub__Z13ww2par_kernelPvS_S_S_S_S_PvS_S_S_S_S_, @function
_Z43__device_stub__Z13ww2par_kernelPvS_S_S_S_S_PvS_S_S_S_S_:
.LFB2053:
.cfi_startproc
endbr64
subq $184, %rsp
.cfi_def_cfa_offset 192
movq %rdi, 40(%rsp)
movq %rsi, 32(%rsp)
movq %rdx, 24(%rsp)
movq %rcx, 16(%rsp)
movq %r8, 8(%rsp)
movq %r9, (%rsp)
movq %fs:40, %rax
movq %rax, 168(%rsp)
xorl %eax, %eax
leaq 40(%rsp), %rax
movq %rax, 112(%rsp)
leaq 32(%rsp), %rax
movq %rax, 120(%rsp)
leaq 24(%rsp), %rax
movq %rax, 128(%rsp)
leaq 16(%rsp), %rax
movq %rax, 136(%rsp)
leaq 8(%rsp), %rax
movq %rax, 144(%rsp)
movq %rsp, %rax
movq %rax, 152(%rsp)
movl $1, 64(%rsp)
movl $1, 68(%rsp)
movl $1, 72(%rsp)
movl $1, 76(%rsp)
movl $1, 80(%rsp)
movl $1, 84(%rsp)
leaq 56(%rsp), %rcx
leaq 48(%rsp), %rdx
leaq 76(%rsp), %rsi
leaq 64(%rsp), %rdi
call __cudaPopCallConfiguration@PLT
testl %eax, %eax
je .L11
.L7:
movq 168(%rsp), %rax
subq %fs:40, %rax
jne .L12
addq $184, %rsp
.cfi_remember_state
.cfi_def_cfa_offset 8
ret
.L11:
.cfi_restore_state
pushq 56(%rsp)
.cfi_def_cfa_offset 200
pushq 56(%rsp)
.cfi_def_cfa_offset 208
leaq 128(%rsp), %r9
movq 92(%rsp), %rcx
movl 100(%rsp), %r8d
movq 80(%rsp), %rsi
movl 88(%rsp), %edx
leaq _Z13ww2par_kernelPvS_S_S_S_S_(%rip), %rdi
call cudaLaunchKernel@PLT
addq $16, %rsp
.cfi_def_cfa_offset 192
jmp .L7
.L12:
call __stack_chk_fail@PLT
.cfi_endproc
.LFE2053:
.size _Z43__device_stub__Z13ww2par_kernelPvS_S_S_S_S_PvS_S_S_S_S_, .-_Z43__device_stub__Z13ww2par_kernelPvS_S_S_S_S_PvS_S_S_S_S_
.globl _Z13ww2par_kernelPvS_S_S_S_S_
.type _Z13ww2par_kernelPvS_S_S_S_S_, @function
_Z13ww2par_kernelPvS_S_S_S_S_:
.LFB2054:
.cfi_startproc
endbr64
subq $8, %rsp
.cfi_def_cfa_offset 16
call _Z43__device_stub__Z13ww2par_kernelPvS_S_S_S_S_PvS_S_S_S_S_
addq $8, %rsp
.cfi_def_cfa_offset 8
ret
.cfi_endproc
.LFE2054:
.size _Z13ww2par_kernelPvS_S_S_S_S_, .-_Z13ww2par_kernelPvS_S_S_S_S_
.section .rodata.str1.1,"aMS",@progbits,1
.LC0:
.string "_Z13ww2par_kernelPvS_S_S_S_S_"
.LC1:
.string "blocksize_gpu"
.LC2:
.string "nParticles_gpu"
.LC3:
.string "nTargets_gpu"
.LC4:
.string "nParticleBlocks_gpu"
.LC5:
.string "nTargetBlocks_gpu"
.LC6:
.string "ksigmasqr_gpu"
.LC7:
.string "inv_pi_gpu"
.LC8:
.string "myeps_gpu"
.text
.type _ZL24__sti____cudaRegisterAllv, @function
_ZL24__sti____cudaRegisterAllv:
.LFB2056:
.cfi_startproc
endbr64
pushq %rbx
.cfi_def_cfa_offset 16
.cfi_offset 3, -16
leaq _ZL15__fatDeviceText(%rip), %rdi
call __cudaRegisterFatBinary@PLT
movq %rax, %rbx
movq %rax, _ZL20__cudaFatCubinHandle(%rip)
pushq $0
.cfi_def_cfa_offset 24
pushq $0
.cfi_def_cfa_offset 32
pushq $0
.cfi_def_cfa_offset 40
pushq $0
.cfi_def_cfa_offset 48
movl $0, %r9d
movl $-1, %r8d
leaq .LC0(%rip), %rdx
movq %rdx, %rcx
leaq _Z13ww2par_kernelPvS_S_S_S_S_(%rip), %rsi
movq %rax, %rdi
call __cudaRegisterFunction@PLT
addq $32, %rsp
.cfi_def_cfa_offset 16
pushq $0
.cfi_def_cfa_offset 24
pushq $1
.cfi_def_cfa_offset 32
movl $4, %r9d
movl $0, %r8d
leaq .LC1(%rip), %rdx
movq %rdx, %rcx
leaq _ZL13blocksize_gpu(%rip), %rsi
movq %rbx, %rdi
call __cudaRegisterVar@PLT
addq $16, %rsp
.cfi_def_cfa_offset 16
pushq $0
.cfi_def_cfa_offset 24
pushq $1
.cfi_def_cfa_offset 32
movl $4, %r9d
movl $0, %r8d
leaq .LC2(%rip), %rdx
movq %rdx, %rcx
leaq _ZL14nParticles_gpu(%rip), %rsi
movq %rbx, %rdi
call __cudaRegisterVar@PLT
addq $16, %rsp
.cfi_def_cfa_offset 16
pushq $0
.cfi_def_cfa_offset 24
pushq $1
.cfi_def_cfa_offset 32
movl $4, %r9d
movl $0, %r8d
leaq .LC3(%rip), %rdx
movq %rdx, %rcx
leaq _ZL12nTargets_gpu(%rip), %rsi
movq %rbx, %rdi
call __cudaRegisterVar@PLT
addq $16, %rsp
.cfi_def_cfa_offset 16
pushq $0
.cfi_def_cfa_offset 24
pushq $1
.cfi_def_cfa_offset 32
movl $4, %r9d
movl $0, %r8d
leaq .LC4(%rip), %rdx
movq %rdx, %rcx
leaq _ZL19nParticleBlocks_gpu(%rip), %rsi
movq %rbx, %rdi
call __cudaRegisterVar@PLT
addq $16, %rsp
.cfi_def_cfa_offset 16
pushq $0
.cfi_def_cfa_offset 24
pushq $1
.cfi_def_cfa_offset 32
movl $4, %r9d
movl $0, %r8d
leaq .LC5(%rip), %rdx
movq %rdx, %rcx
leaq _ZL17nTargetBlocks_gpu(%rip), %rsi
movq %rbx, %rdi
call __cudaRegisterVar@PLT
addq $16, %rsp
.cfi_def_cfa_offset 16
pushq $0
.cfi_def_cfa_offset 24
pushq $1
.cfi_def_cfa_offset 32
movl $8, %r9d
movl $0, %r8d
leaq .LC6(%rip), %rdx
movq %rdx, %rcx
leaq _ZL13ksigmasqr_gpu(%rip), %rsi
movq %rbx, %rdi
call __cudaRegisterVar@PLT
addq $16, %rsp
.cfi_def_cfa_offset 16
pushq $0
.cfi_def_cfa_offset 24
pushq $1
.cfi_def_cfa_offset 32
movl $8, %r9d
movl $0, %r8d
leaq .LC7(%rip), %rdx
movq %rdx, %rcx
leaq _ZL10inv_pi_gpu(%rip), %rsi
movq %rbx, %rdi
call __cudaRegisterVar@PLT
addq $16, %rsp
.cfi_def_cfa_offset 16
pushq $0
.cfi_def_cfa_offset 24
pushq $1
.cfi_def_cfa_offset 32
movl $8, %r9d
movl $0, %r8d
leaq .LC8(%rip), %rdx
movq %rdx, %rcx
leaq _ZL9myeps_gpu(%rip), %rsi
movq %rbx, %rdi
call __cudaRegisterVar@PLT
addq $16, %rsp
.cfi_def_cfa_offset 16
movq _ZL20__cudaFatCubinHandle(%rip), %rdi
call __cudaRegisterFatBinaryEnd@PLT
leaq _ZL26__cudaUnregisterBinaryUtilv(%rip), %rdi
call atexit@PLT
popq %rbx
.cfi_def_cfa_offset 8
ret
.cfi_endproc
.LFE2056:
.size _ZL24__sti____cudaRegisterAllv, .-_ZL24__sti____cudaRegisterAllv
.section .init_array,"aw"
.align 8
.quad _ZL24__sti____cudaRegisterAllv
.section .nvFatBinSegment,"aw"
.align 8
.type _ZL15__fatDeviceText, @object
.size _ZL15__fatDeviceText, 24
_ZL15__fatDeviceText:
.long 1180844977
.long 1
.quad fatbinData
.quad 0
.local _ZL20__cudaFatCubinHandle
.comm _ZL20__cudaFatCubinHandle,8,8
.local _ZL9myeps_gpu
.comm _ZL9myeps_gpu,8,8
.local _ZL10inv_pi_gpu
.comm _ZL10inv_pi_gpu,8,8
.local _ZL13ksigmasqr_gpu
.comm _ZL13ksigmasqr_gpu,8,8
.local _ZL17nTargetBlocks_gpu
.comm _ZL17nTargetBlocks_gpu,4,4
.local _ZL19nParticleBlocks_gpu
.comm _ZL19nParticleBlocks_gpu,4,4
.local _ZL12nTargets_gpu
.comm _ZL12nTargets_gpu,4,4
.local _ZL14nParticles_gpu
.comm _ZL14nParticles_gpu,4,4
.local _ZL13blocksize_gpu
.comm _ZL13blocksize_gpu,4,4
.ident "GCC: (Ubuntu 13.3.0-6ubuntu2~24.04) 13.3.0"
.section .note.GNU-stack,"",@progbits
.section .note.gnu.property,"a"
.align 8
.long 1f - 0f
.long 4f - 1f
.long 5
0:
.string "GNU"
1:
.align 8
.long 0xc0000002
.long 3f - 2f
2:
.long 0x3
3:
.align 8
4: |
You are a helpful coding assistant specialized in converting CUDA source code to HIP/AMD source code. | /*_________________________________________________________________________
* ww2parCC_device_066DP.cu - calculates the self-induced velocity field of the wake.
* Parallel version on GPU - CUDA code executed on device
*
* CUDA kernel function (executed on the device, called from the host) +
* CUDA block & thread functions (executed on the device, called from device)
* Manages data flow, launches and syncronize threads blocks
*
* DUWIND- Delft University Wind Energy Research Institute
* developer: Giuseppe Tescione
*
* Version: 0.6.6DP (alpha) - 20110824
* basic version with no loop unrolling, no wrap and no multithread bodies
* simple cut-off constant for desingularization
* double precision (for GPUs of computing capability 2.x)
*________________________________________________________________________*/
//Definition of double2 and double3 types
//typedef struct {
//double x, y;
//} double2;
//typedef struct {
//double x, y, z;
//} double3;
__constant__ int blocksize_gpu;
__constant__ int nParticles_gpu;
__constant__ int nTargets_gpu;
__constant__ int nParticleBlocks_gpu;
__constant__ int nTargetBlocks_gpu;
__constant__ double ksigmasqr_gpu;
__constant__ double inv_pi_gpu;
__constant__ double myeps_gpu;
/* constants (block dimension, number of particle, cut-off and 1/2pi) residing in
constant memory space, accessible from all threads within the grid and from the host.
Defined in host code*/
__device__ double ww2par_thread(double THR_vorticity, double THR_xTarget, double THR_yTarget, double THR_xBlob, double THR_yBlob, double THR_wBlob)
/*THREAD FUNCTION - set of instructions performed parallely by each processor.
Calculates velocity induction on target particles by source particle.
Takes as input:
THR_UIND (2x double THR_UIND.x & THR_UIND.y) -> velocity induction of target particles
already computed by previous thread blocks to which adds the new induction;
THR_TARG (3x double THR_TARG.x & THR_TARG.y & THR_TARG.z) -> position (x, y) and
vorticity (z) of target particles.Position is needed to calculate induction
but vorticity is not used but kept to mantain data structure coeherency;
THR_SRC (3x double THR_SRC.x & THR_SRC.y & THR_SRC.z) -> position (x, y) and
vorticity (z) of source particles, needed to calculate induction.
Gives as output:
THR_UIND (2x double THR_UIND.x & THR_UIND.y) -> updated velocity induction of targets */
{
//targets-particle distance, local variable [2 FLOPS]
// printf("Thread %d; xTarget %f; yTarget %f; xBlob %f; yBlob %f, wBlob %f\n -----------------------------------------\n",threadIdx.x,THR_xTarget,THR_yTarget,THR_xBlob,THR_yBlob,THR_wBlob);
double2 RAD;
RAD.x = THR_xTarget - THR_xBlob;
RAD.y = THR_yTarget - THR_yBlob;
//square of distance plus cut-off, local variable [4 FLOPS]
double RADSQR = RAD.x * RAD.x + RAD.y * RAD.y + myeps_gpu;
//vorticity/(2pi*sqr(rad)) [2 FLOPS]
double S = THR_wBlob * inv_pi_gpu / ksigmasqr_gpu;
//update velocity induction [4 FLOPS]
THR_vorticity += S * exp(-RADSQR/(ksigmasqr_gpu));
return THR_vorticity;
}
__device__ double ww2par_block(double BLK_xTarget, double BLK_yTarget, double BLK_vorticity)
/*BLOCK FUNCTION - data & execution management for thread block
Evaluate induction in a pxp block
Takes as input:
BLK_TARG (3x double BLK_TARG.x & BLK_TARG.y & BLK_TARG.z) -> position (x, y)
and vorticity (z) of target. Passed unchanged to THREAD CODE as TARGET;
BLK_UIND (2x double BLK_UIND.x & BLK_UIND.y) -> velocity induction of target
particles. Passed unchanged to THREAD CODE as UIND.
Gives as output:
BLK_UIND (2x double BLK_UIND.x & BLK_UIND.y) -> updated velocity induction
of target. Received unchanged by THREAD CODE as UIND */
{
extern __shared__ double BLK_blob [];
//extern __shared__ double BLK_yBlob [];
//extern __shared__ double BLK_wBlob [];
/* External variable residing in shared memory space of thread block,
accessible from all threads within the block. Source particles data array
(position (x & y) and vorticity (z)) common to the block.
Size of the array is determined at launch time with instruction [] */
//call thread function for every thread in block
for ( int i = 0; i <blockDim.x; i++)
{
BLK_vorticity = ww2par_thread(BLK_vorticity, BLK_xTarget, BLK_yTarget, BLK_blob[i], BLK_blob[i+blocksize_gpu], BLK_blob[i+2*blocksize_gpu]);
}
return BLK_vorticity;
}
__global__ void ww2par_kernel(void *cxBlob_gpu_ondevice, void *cyBlob_gpu_ondevice, void *cwBlob_gpu_ondevice, void *cxTarget_gpu_ondevice, void *cyTarget_gpu_ondevice, void *cw_gpu_ondevice)
/*KERNEL FUNCTION - data & execution management for block grid
Kernel executed on the device, called from the host.
Manages memory passages from host to device and executes block function
Takes as input:
*ONDEV_POS and *ONDEV_IND -> pointers to global device memory for the
position and induction of particles */
{
extern __shared__ double BLK_blob []; //see above
//extern __shared__ double BLK_yBlob []; //see above
//extern __shared__ double BLK_wBlob []; //see above
//pointers passage
double * KRN_xBlob = (double *)cxBlob_gpu_ondevice;
double * KRN_yBlob = (double *)cyBlob_gpu_ondevice;
double * KRN_wBlob = (double *)cwBlob_gpu_ondevice;
double * KRN_xTarget = (double *)cxTarget_gpu_ondevice;
double * KRN_yTarget = (double *)cyTarget_gpu_ondevice;
double * KRN_w = (double *)cw_gpu_ondevice;
//induction initialization
double BLK_vorticity;
BLK_vorticity = 0;
//target particles definition
double BLK_xTarget;
double BLK_yTarget;
int NTHR = blockIdx.x * blockDim.x + threadIdx.x;
BLK_xTarget = KRN_xTarget[NTHR];
BLK_yTarget = KRN_yTarget[NTHR];
//printf("Block %d; Thread %d :: Before the loop\n",blockIdx.x,threadIdx.x);
int i, block;
for (i = 0, block = 0; i < nParticles_gpu; i += blocksize_gpu, block++)//LOOP over blocks
{
//source particle definition (shared data)
int id = block * blockDim.x + threadIdx.x;
BLK_blob [threadIdx.x] = KRN_xBlob[id];
BLK_blob [threadIdx.x + blocksize_gpu] = KRN_yBlob[id];
BLK_blob [threadIdx.x + 2*blocksize_gpu] = KRN_wBlob[id];
__syncthreads();
// all shared memory locations are populated before starting computation
BLK_vorticity = ww2par_block(BLK_xTarget, BLK_yTarget, BLK_vorticity); //block function call
__syncthreads();
//all threads within block finish computation before advancing next block
}
//save results in global memory
double WIND = BLK_vorticity;
KRN_w[NTHR] = WIND;
} | #include <hip/hip_runtime.h>
/*_________________________________________________________________________
* ww2parCC_device_066DP.cu - calculates the self-induced velocity field of the wake.
* Parallel version on GPU - CUDA code executed on device
*
* CUDA kernel function (executed on the device, called from the host) +
* CUDA block & thread functions (executed on the device, called from device)
* Manages data flow, launches and syncronize threads blocks
*
* DUWIND- Delft University Wind Energy Research Institute
* developer: Giuseppe Tescione
*
* Version: 0.6.6DP (alpha) - 20110824
* basic version with no loop unrolling, no wrap and no multithread bodies
* simple cut-off constant for desingularization
* double precision (for GPUs of computing capability 2.x)
*________________________________________________________________________*/
//Definition of double2 and double3 types
//typedef struct {
//double x, y;
//} double2;
//typedef struct {
//double x, y, z;
//} double3;
__constant__ int blocksize_gpu;
__constant__ int nParticles_gpu;
__constant__ int nTargets_gpu;
__constant__ int nParticleBlocks_gpu;
__constant__ int nTargetBlocks_gpu;
__constant__ double ksigmasqr_gpu;
__constant__ double inv_pi_gpu;
__constant__ double myeps_gpu;
/* constants (block dimension, number of particle, cut-off and 1/2pi) residing in
constant memory space, accessible from all threads within the grid and from the host.
Defined in host code*/
__device__ double ww2par_thread(double THR_vorticity, double THR_xTarget, double THR_yTarget, double THR_xBlob, double THR_yBlob, double THR_wBlob)
/*THREAD FUNCTION - set of instructions performed parallely by each processor.
Calculates velocity induction on target particles by source particle.
Takes as input:
THR_UIND (2x double THR_UIND.x & THR_UIND.y) -> velocity induction of target particles
already computed by previous thread blocks to which adds the new induction;
THR_TARG (3x double THR_TARG.x & THR_TARG.y & THR_TARG.z) -> position (x, y) and
vorticity (z) of target particles.Position is needed to calculate induction
but vorticity is not used but kept to mantain data structure coeherency;
THR_SRC (3x double THR_SRC.x & THR_SRC.y & THR_SRC.z) -> position (x, y) and
vorticity (z) of source particles, needed to calculate induction.
Gives as output:
THR_UIND (2x double THR_UIND.x & THR_UIND.y) -> updated velocity induction of targets */
{
//targets-particle distance, local variable [2 FLOPS]
// printf("Thread %d; xTarget %f; yTarget %f; xBlob %f; yBlob %f, wBlob %f\n -----------------------------------------\n",threadIdx.x,THR_xTarget,THR_yTarget,THR_xBlob,THR_yBlob,THR_wBlob);
double2 RAD;
RAD.x = THR_xTarget - THR_xBlob;
RAD.y = THR_yTarget - THR_yBlob;
//square of distance plus cut-off, local variable [4 FLOPS]
double RADSQR = RAD.x * RAD.x + RAD.y * RAD.y + myeps_gpu;
//vorticity/(2pi*sqr(rad)) [2 FLOPS]
double S = THR_wBlob * inv_pi_gpu / ksigmasqr_gpu;
//update velocity induction [4 FLOPS]
THR_vorticity += S * exp(-RADSQR/(ksigmasqr_gpu));
return THR_vorticity;
}
__device__ double ww2par_block(double BLK_xTarget, double BLK_yTarget, double BLK_vorticity)
/*BLOCK FUNCTION - data & execution management for thread block
Evaluate induction in a pxp block
Takes as input:
BLK_TARG (3x double BLK_TARG.x & BLK_TARG.y & BLK_TARG.z) -> position (x, y)
and vorticity (z) of target. Passed unchanged to THREAD CODE as TARGET;
BLK_UIND (2x double BLK_UIND.x & BLK_UIND.y) -> velocity induction of target
particles. Passed unchanged to THREAD CODE as UIND.
Gives as output:
BLK_UIND (2x double BLK_UIND.x & BLK_UIND.y) -> updated velocity induction
of target. Received unchanged by THREAD CODE as UIND */
{
extern __shared__ double BLK_blob [];
//extern __shared__ double BLK_yBlob [];
//extern __shared__ double BLK_wBlob [];
/* External variable residing in shared memory space of thread block,
accessible from all threads within the block. Source particles data array
(position (x & y) and vorticity (z)) common to the block.
Size of the array is determined at launch time with instruction [] */
//call thread function for every thread in block
for ( int i = 0; i <blockDim.x; i++)
{
BLK_vorticity = ww2par_thread(BLK_vorticity, BLK_xTarget, BLK_yTarget, BLK_blob[i], BLK_blob[i+blocksize_gpu], BLK_blob[i+2*blocksize_gpu]);
}
return BLK_vorticity;
}
__global__ void ww2par_kernel(void *cxBlob_gpu_ondevice, void *cyBlob_gpu_ondevice, void *cwBlob_gpu_ondevice, void *cxTarget_gpu_ondevice, void *cyTarget_gpu_ondevice, void *cw_gpu_ondevice)
/*KERNEL FUNCTION - data & execution management for block grid
Kernel executed on the device, called from the host.
Manages memory passages from host to device and executes block function
Takes as input:
*ONDEV_POS and *ONDEV_IND -> pointers to global device memory for the
position and induction of particles */
{
extern __shared__ double BLK_blob []; //see above
//extern __shared__ double BLK_yBlob []; //see above
//extern __shared__ double BLK_wBlob []; //see above
//pointers passage
double * KRN_xBlob = (double *)cxBlob_gpu_ondevice;
double * KRN_yBlob = (double *)cyBlob_gpu_ondevice;
double * KRN_wBlob = (double *)cwBlob_gpu_ondevice;
double * KRN_xTarget = (double *)cxTarget_gpu_ondevice;
double * KRN_yTarget = (double *)cyTarget_gpu_ondevice;
double * KRN_w = (double *)cw_gpu_ondevice;
//induction initialization
double BLK_vorticity;
BLK_vorticity = 0;
//target particles definition
double BLK_xTarget;
double BLK_yTarget;
int NTHR = blockIdx.x * blockDim.x + threadIdx.x;
BLK_xTarget = KRN_xTarget[NTHR];
BLK_yTarget = KRN_yTarget[NTHR];
//printf("Block %d; Thread %d :: Before the loop\n",blockIdx.x,threadIdx.x);
int i, block;
for (i = 0, block = 0; i < nParticles_gpu; i += blocksize_gpu, block++)//LOOP over blocks
{
//source particle definition (shared data)
int id = block * blockDim.x + threadIdx.x;
BLK_blob [threadIdx.x] = KRN_xBlob[id];
BLK_blob [threadIdx.x + blocksize_gpu] = KRN_yBlob[id];
BLK_blob [threadIdx.x + 2*blocksize_gpu] = KRN_wBlob[id];
__syncthreads();
// all shared memory locations are populated before starting computation
BLK_vorticity = ww2par_block(BLK_xTarget, BLK_yTarget, BLK_vorticity); //block function call
__syncthreads();
//all threads within block finish computation before advancing next block
}
//save results in global memory
double WIND = BLK_vorticity;
KRN_w[NTHR] = WIND;
} |
You are a helpful coding assistant specialized in converting HIP source code to AMD device assembly. | #include <hip/hip_runtime.h>
/*_________________________________________________________________________
* ww2parCC_device_066DP.cu - calculates the self-induced velocity field of the wake.
* Parallel version on GPU - CUDA code executed on device
*
* CUDA kernel function (executed on the device, called from the host) +
* CUDA block & thread functions (executed on the device, called from device)
* Manages data flow, launches and syncronize threads blocks
*
* DUWIND- Delft University Wind Energy Research Institute
* developer: Giuseppe Tescione
*
* Version: 0.6.6DP (alpha) - 20110824
* basic version with no loop unrolling, no wrap and no multithread bodies
* simple cut-off constant for desingularization
* double precision (for GPUs of computing capability 2.x)
*________________________________________________________________________*/
//Definition of double2 and double3 types
//typedef struct {
//double x, y;
//} double2;
//typedef struct {
//double x, y, z;
//} double3;
__constant__ int blocksize_gpu;
__constant__ int nParticles_gpu;
__constant__ int nTargets_gpu;
__constant__ int nParticleBlocks_gpu;
__constant__ int nTargetBlocks_gpu;
__constant__ double ksigmasqr_gpu;
__constant__ double inv_pi_gpu;
__constant__ double myeps_gpu;
/* constants (block dimension, number of particle, cut-off and 1/2pi) residing in
constant memory space, accessible from all threads within the grid and from the host.
Defined in host code*/
__device__ double ww2par_thread(double THR_vorticity, double THR_xTarget, double THR_yTarget, double THR_xBlob, double THR_yBlob, double THR_wBlob)
/*THREAD FUNCTION - set of instructions performed parallely by each processor.
Calculates velocity induction on target particles by source particle.
Takes as input:
THR_UIND (2x double THR_UIND.x & THR_UIND.y) -> velocity induction of target particles
already computed by previous thread blocks to which adds the new induction;
THR_TARG (3x double THR_TARG.x & THR_TARG.y & THR_TARG.z) -> position (x, y) and
vorticity (z) of target particles.Position is needed to calculate induction
but vorticity is not used but kept to mantain data structure coeherency;
THR_SRC (3x double THR_SRC.x & THR_SRC.y & THR_SRC.z) -> position (x, y) and
vorticity (z) of source particles, needed to calculate induction.
Gives as output:
THR_UIND (2x double THR_UIND.x & THR_UIND.y) -> updated velocity induction of targets */
{
//targets-particle distance, local variable [2 FLOPS]
// printf("Thread %d; xTarget %f; yTarget %f; xBlob %f; yBlob %f, wBlob %f\n -----------------------------------------\n",threadIdx.x,THR_xTarget,THR_yTarget,THR_xBlob,THR_yBlob,THR_wBlob);
double2 RAD;
RAD.x = THR_xTarget - THR_xBlob;
RAD.y = THR_yTarget - THR_yBlob;
//square of distance plus cut-off, local variable [4 FLOPS]
double RADSQR = RAD.x * RAD.x + RAD.y * RAD.y + myeps_gpu;
//vorticity/(2pi*sqr(rad)) [2 FLOPS]
double S = THR_wBlob * inv_pi_gpu / ksigmasqr_gpu;
//update velocity induction [4 FLOPS]
THR_vorticity += S * exp(-RADSQR/(ksigmasqr_gpu));
return THR_vorticity;
}
__device__ double ww2par_block(double BLK_xTarget, double BLK_yTarget, double BLK_vorticity)
/*BLOCK FUNCTION - data & execution management for thread block
Evaluate induction in a pxp block
Takes as input:
BLK_TARG (3x double BLK_TARG.x & BLK_TARG.y & BLK_TARG.z) -> position (x, y)
and vorticity (z) of target. Passed unchanged to THREAD CODE as TARGET;
BLK_UIND (2x double BLK_UIND.x & BLK_UIND.y) -> velocity induction of target
particles. Passed unchanged to THREAD CODE as UIND.
Gives as output:
BLK_UIND (2x double BLK_UIND.x & BLK_UIND.y) -> updated velocity induction
of target. Received unchanged by THREAD CODE as UIND */
{
extern __shared__ double BLK_blob [];
//extern __shared__ double BLK_yBlob [];
//extern __shared__ double BLK_wBlob [];
/* External variable residing in shared memory space of thread block,
accessible from all threads within the block. Source particles data array
(position (x & y) and vorticity (z)) common to the block.
Size of the array is determined at launch time with instruction [] */
//call thread function for every thread in block
for ( int i = 0; i <blockDim.x; i++)
{
BLK_vorticity = ww2par_thread(BLK_vorticity, BLK_xTarget, BLK_yTarget, BLK_blob[i], BLK_blob[i+blocksize_gpu], BLK_blob[i+2*blocksize_gpu]);
}
return BLK_vorticity;
}
__global__ void ww2par_kernel(void *cxBlob_gpu_ondevice, void *cyBlob_gpu_ondevice, void *cwBlob_gpu_ondevice, void *cxTarget_gpu_ondevice, void *cyTarget_gpu_ondevice, void *cw_gpu_ondevice)
/*KERNEL FUNCTION - data & execution management for block grid
Kernel executed on the device, called from the host.
Manages memory passages from host to device and executes block function
Takes as input:
*ONDEV_POS and *ONDEV_IND -> pointers to global device memory for the
position and induction of particles */
{
extern __shared__ double BLK_blob []; //see above
//extern __shared__ double BLK_yBlob []; //see above
//extern __shared__ double BLK_wBlob []; //see above
//pointers passage
double * KRN_xBlob = (double *)cxBlob_gpu_ondevice;
double * KRN_yBlob = (double *)cyBlob_gpu_ondevice;
double * KRN_wBlob = (double *)cwBlob_gpu_ondevice;
double * KRN_xTarget = (double *)cxTarget_gpu_ondevice;
double * KRN_yTarget = (double *)cyTarget_gpu_ondevice;
double * KRN_w = (double *)cw_gpu_ondevice;
//induction initialization
double BLK_vorticity;
BLK_vorticity = 0;
//target particles definition
double BLK_xTarget;
double BLK_yTarget;
int NTHR = blockIdx.x * blockDim.x + threadIdx.x;
BLK_xTarget = KRN_xTarget[NTHR];
BLK_yTarget = KRN_yTarget[NTHR];
//printf("Block %d; Thread %d :: Before the loop\n",blockIdx.x,threadIdx.x);
int i, block;
for (i = 0, block = 0; i < nParticles_gpu; i += blocksize_gpu, block++)//LOOP over blocks
{
//source particle definition (shared data)
int id = block * blockDim.x + threadIdx.x;
BLK_blob [threadIdx.x] = KRN_xBlob[id];
BLK_blob [threadIdx.x + blocksize_gpu] = KRN_yBlob[id];
BLK_blob [threadIdx.x + 2*blocksize_gpu] = KRN_wBlob[id];
__syncthreads();
// all shared memory locations are populated before starting computation
BLK_vorticity = ww2par_block(BLK_xTarget, BLK_yTarget, BLK_vorticity); //block function call
__syncthreads();
//all threads within block finish computation before advancing next block
}
//save results in global memory
double WIND = BLK_vorticity;
KRN_w[NTHR] = WIND;
} | .text
.amdgcn_target "amdgcn-amd-amdhsa--gfx1100"
.protected _Z13ww2par_kernelPvS_S_S_S_S_
.globl _Z13ww2par_kernelPvS_S_S_S_S_
.p2align 8
.type _Z13ww2par_kernelPvS_S_S_S_S_,@function
_Z13ww2par_kernelPvS_S_S_S_S_:
s_load_b32 s4, s[0:1], 0x3c
s_getpc_b64 s[2:3]
s_add_u32 s2, s2, nParticles_gpu@rel32@lo+4
s_addc_u32 s3, s3, nParticles_gpu@rel32@hi+12
s_load_b32 s33, s[2:3], 0x0
s_waitcnt lgkmcnt(0)
s_and_b32 s44, s4, 0xffff
s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
v_mad_u64_u32 v[1:2], null, s15, s44, v[0:1]
s_cmp_lt_i32 s33, 1
v_ashrrev_i32_e32 v2, 31, v1
s_cbranch_scc1 .LBB0_6
s_clause 0x1
s_load_b256 s[4:11], s[0:1], 0x0
s_load_b64 s[2:3], s[0:1], 0x20
v_lshlrev_b64 v[3:4], 3, v[1:2]
v_lshl_add_u32 v9, v0, 3, 0
s_mov_b32 s46, 0
s_mov_b32 s17, 0x3ff71547
s_mov_b32 s19, 0xbfe62e42
s_mov_b32 s18, 0xfefa39ef
s_mov_b32 s21, 0xbc7abc9e
s_mov_b32 s20, 0x3b39803f
s_mov_b32 s23, 0x3e928af3
s_mov_b32 s22, 0xfca7ab0c
s_mov_b32 s25, 0x3e5ade15
s_mov_b32 s24, 0x6a5dcb37
s_mov_b32 s27, 0x3ec71dee
s_mov_b32 s26, 0x623fde64
s_mov_b32 s29, 0x3efa0199
s_mov_b32 s28, 0x7c89e6b0
s_mov_b32 s31, 0x3f2a01a0
s_mov_b32 s30, 0x14761f6e
s_waitcnt lgkmcnt(0)
v_add_co_u32 v5, vcc_lo, s10, v3
v_add_co_ci_u32_e32 v6, vcc_lo, s11, v4, vcc_lo
v_add_co_u32 v7, vcc_lo, s2, v3
v_add_co_ci_u32_e32 v8, vcc_lo, s3, v4, vcc_lo
s_getpc_b64 s[2:3]
s_add_u32 s2, s2, blocksize_gpu@rel32@lo+4
s_addc_u32 s3, s3, blocksize_gpu@rel32@hi+12
global_load_b64 v[3:4], v[5:6], off
global_load_b64 v[5:6], v[7:8], off
s_load_b32 s45, s[2:3], 0x0
s_cmp_lg_u32 s44, 0
s_mov_b32 s35, 0x3f56c16c
s_cselect_b32 s16, -1, 0
s_getpc_b64 s[2:3]
s_add_u32 s2, s2, myeps_gpu@rel32@lo+4
s_addc_u32 s3, s3, myeps_gpu@rel32@hi+12
s_getpc_b64 s[12:13]
s_add_u32 s12, s12, inv_pi_gpu@rel32@lo+4
s_addc_u32 s13, s13, inv_pi_gpu@rel32@hi+12
s_getpc_b64 s[14:15]
s_add_u32 s14, s14, ksigmasqr_gpu@rel32@lo+4
s_addc_u32 s15, s15, ksigmasqr_gpu@rel32@hi+12
s_load_b64 s[10:11], s[2:3], 0x0
s_load_b64 s[12:13], s[12:13], 0x0
s_load_b64 s[14:15], s[14:15], 0x0
v_cndmask_b32_e64 v12, 0, 1, s16
s_mov_b32 s16, 0x652b82fe
s_mov_b32 s34, 0x1852b7b0
s_mov_b32 s37, 0x3f811111
s_mov_b32 s36, 0x11122322
v_cmp_ne_u32_e64 s2, 1, v12
s_mov_b32 s39, 0x3fa55555
s_mov_b32 s38, 0x555502a1
s_mov_b32 s41, 0x3fc55555
s_mov_b32 s40, 0x55555511
s_mov_b32 s43, 0x3fe00000
s_waitcnt lgkmcnt(0)
v_add_nc_u32_e32 v7, s45, v0
v_lshl_add_u32 v8, s45, 1, v0
s_lshl_b32 s47, s45, 4
s_lshl_b32 s48, s45, 3
s_mov_b32 s42, 11
v_lshl_add_u32 v10, v7, 3, 0
v_lshl_add_u32 v11, v8, 3, 0
v_mov_b32_e32 v7, 0
v_mov_b32_e32 v8, 0
s_mov_b32 s49, 0
s_branch .LBB0_3
.LBB0_2:
s_add_i32 s46, s45, s46
s_add_i32 s49, s49, 1
s_cmp_lt_i32 s46, s33
s_barrier
buffer_gl0_inv
s_cbranch_scc0 .LBB0_7
.LBB0_3:
v_mad_u64_u32 v[12:13], null, s49, s44, v[0:1]
s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
v_ashrrev_i32_e32 v13, 31, v12
v_lshlrev_b64 v[12:13], 3, v[12:13]
s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_2)
v_add_co_u32 v14, vcc_lo, s4, v12
v_add_co_ci_u32_e32 v15, vcc_lo, s5, v13, vcc_lo
v_add_co_u32 v16, vcc_lo, s6, v12
v_add_co_ci_u32_e32 v17, vcc_lo, s7, v13, vcc_lo
v_add_co_u32 v12, vcc_lo, s8, v12
v_add_co_ci_u32_e32 v13, vcc_lo, s9, v13, vcc_lo
global_load_b64 v[14:15], v[14:15], off
global_load_b64 v[16:17], v[16:17], off
global_load_b64 v[12:13], v[12:13], off
s_and_b32 vcc_lo, exec_lo, s2
s_waitcnt vmcnt(2)
ds_store_b64 v9, v[14:15]
s_waitcnt vmcnt(1)
ds_store_b64 v10, v[16:17]
s_waitcnt vmcnt(0)
ds_store_b64 v11, v[12:13]
s_waitcnt lgkmcnt(0)
s_barrier
buffer_gl0_inv
s_cbranch_vccnz .LBB0_2
s_mov_b32 s50, 0
s_mov_b32 s51, s44
.LBB0_5:
s_add_i32 s3, s50, s48
v_mov_b32_e32 v12, s50
v_mov_b32_e32 v14, s3
s_add_i32 s3, s50, s47
s_add_i32 s51, s51, -1
v_mov_b32_e32 v16, s3
ds_load_b64 v[12:13], v12
ds_load_b64 v[14:15], v14
s_add_i32 s50, s50, 8
ds_load_b64 v[16:17], v16
s_waitcnt lgkmcnt(2)
v_add_f64 v[12:13], v[3:4], -v[12:13]
s_waitcnt lgkmcnt(1)
v_add_f64 v[14:15], v[5:6], -v[14:15]
s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
v_mul_f64 v[14:15], v[14:15], v[14:15]
v_fma_f64 v[12:13], v[12:13], v[12:13], v[14:15]
s_waitcnt lgkmcnt(0)
v_mul_f64 v[14:15], s[12:13], v[16:17]
s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
v_add_f64 v[12:13], s[10:11], v[12:13]
v_div_scale_f64 v[16:17], null, s[14:15], s[14:15], v[14:15]
v_div_scale_f64 v[28:29], vcc_lo, v[14:15], s[14:15], v[14:15]
s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3)
v_div_scale_f64 v[18:19], null, s[14:15], s[14:15], -v[12:13]
v_rcp_f64_e32 v[20:21], v[16:17]
v_div_scale_f64 v[30:31], s3, -v[12:13], s[14:15], -v[12:13]
s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_3) | instid1(VALU_DEP_2)
v_rcp_f64_e32 v[22:23], v[18:19]
s_waitcnt_depctr 0xfff
v_fma_f64 v[24:25], -v[16:17], v[20:21], 1.0
v_fma_f64 v[26:27], -v[18:19], v[22:23], 1.0
v_fma_f64 v[20:21], v[20:21], v[24:25], v[20:21]
s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
v_fma_f64 v[22:23], v[22:23], v[26:27], v[22:23]
v_fma_f64 v[24:25], -v[16:17], v[20:21], 1.0
s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
v_fma_f64 v[26:27], -v[18:19], v[22:23], 1.0
v_fma_f64 v[20:21], v[20:21], v[24:25], v[20:21]
s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
v_fma_f64 v[22:23], v[22:23], v[26:27], v[22:23]
v_mul_f64 v[24:25], v[28:29], v[20:21]
s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
v_mul_f64 v[26:27], v[30:31], v[22:23]
v_fma_f64 v[16:17], -v[16:17], v[24:25], v[28:29]
s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
v_fma_f64 v[18:19], -v[18:19], v[26:27], v[30:31]
v_div_fmas_f64 v[16:17], v[16:17], v[20:21], v[24:25]
s_mov_b32 vcc_lo, s3
s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
v_div_fmas_f64 v[18:19], v[18:19], v[22:23], v[26:27]
v_div_fixup_f64 v[12:13], v[18:19], s[14:15], -v[12:13]
s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_2) | instid1(VALU_DEP_3)
v_mul_f64 v[18:19], v[12:13], s[16:17]
v_cmp_nlt_f64_e32 vcc_lo, 0x40900000, v[12:13]
v_cmp_ngt_f64_e64 s3, 0xc090cc00, v[12:13]
v_rndne_f64_e32 v[18:19], v[18:19]
s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_2) | instid1(VALU_DEP_3)
v_fma_f64 v[20:21], v[18:19], s[18:19], v[12:13]
v_cvt_i32_f64_e32 v24, v[18:19]
v_div_fixup_f64 v[12:13], v[16:17], s[14:15], v[14:15]
v_fma_f64 v[20:21], v[18:19], s[20:21], v[20:21]
s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
v_fma_f64 v[22:23], v[20:21], s[24:25], s[22:23]
v_fma_f64 v[22:23], v[20:21], v[22:23], s[26:27]
s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
v_fma_f64 v[22:23], v[20:21], v[22:23], s[28:29]
v_fma_f64 v[22:23], v[20:21], v[22:23], s[30:31]
s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
v_fma_f64 v[22:23], v[20:21], v[22:23], s[34:35]
v_fma_f64 v[22:23], v[20:21], v[22:23], s[36:37]
s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
v_fma_f64 v[22:23], v[20:21], v[22:23], s[38:39]
v_fma_f64 v[22:23], v[20:21], v[22:23], s[40:41]
s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
v_fma_f64 v[22:23], v[20:21], v[22:23], s[42:43]
v_fma_f64 v[22:23], v[20:21], v[22:23], 1.0
s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
v_fma_f64 v[18:19], v[20:21], v[22:23], 1.0
v_ldexp_f64 v[18:19], v[18:19], v24
s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_2) | instid1(VALU_DEP_2)
v_cndmask_b32_e32 v19, 0x7ff00000, v19, vcc_lo
s_and_b32 vcc_lo, s3, vcc_lo
s_cmp_lg_u32 s51, 0
v_cndmask_b32_e32 v14, 0, v18, vcc_lo
s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
v_cndmask_b32_e64 v15, 0, v19, s3
v_fma_f64 v[7:8], v[12:13], v[14:15], v[7:8]
s_cbranch_scc1 .LBB0_5
s_branch .LBB0_2
.LBB0_6:
v_mov_b32_e32 v7, 0
v_mov_b32_e32 v8, 0
.LBB0_7:
s_load_b64 s[0:1], s[0:1], 0x28
v_lshlrev_b64 v[0:1], 3, v[1:2]
s_waitcnt lgkmcnt(0)
s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_2)
v_add_co_u32 v0, vcc_lo, s0, v0
v_add_co_ci_u32_e32 v1, vcc_lo, s1, v1, vcc_lo
global_store_b64 v[0:1], v[7:8], off
s_nop 0
s_sendmsg sendmsg(MSG_DEALLOC_VGPRS)
s_endpgm
.section .rodata,"a",@progbits
.p2align 6, 0x0
.amdhsa_kernel _Z13ww2par_kernelPvS_S_S_S_S_
.amdhsa_group_segment_fixed_size 0
.amdhsa_private_segment_fixed_size 0
.amdhsa_kernarg_size 304
.amdhsa_user_sgpr_count 15
.amdhsa_user_sgpr_dispatch_ptr 0
.amdhsa_user_sgpr_queue_ptr 0
.amdhsa_user_sgpr_kernarg_segment_ptr 1
.amdhsa_user_sgpr_dispatch_id 0
.amdhsa_user_sgpr_private_segment_size 0
.amdhsa_wavefront_size32 1
.amdhsa_uses_dynamic_stack 0
.amdhsa_enable_private_segment 0
.amdhsa_system_sgpr_workgroup_id_x 1
.amdhsa_system_sgpr_workgroup_id_y 0
.amdhsa_system_sgpr_workgroup_id_z 0
.amdhsa_system_sgpr_workgroup_info 0
.amdhsa_system_vgpr_workitem_id 0
.amdhsa_next_free_vgpr 32
.amdhsa_next_free_sgpr 52
.amdhsa_float_round_mode_32 0
.amdhsa_float_round_mode_16_64 0
.amdhsa_float_denorm_mode_32 3
.amdhsa_float_denorm_mode_16_64 3
.amdhsa_dx10_clamp 1
.amdhsa_ieee_mode 1
.amdhsa_fp16_overflow 0
.amdhsa_workgroup_processor_mode 1
.amdhsa_memory_ordered 1
.amdhsa_forward_progress 0
.amdhsa_shared_vgpr_count 0
.amdhsa_exception_fp_ieee_invalid_op 0
.amdhsa_exception_fp_denorm_src 0
.amdhsa_exception_fp_ieee_div_zero 0
.amdhsa_exception_fp_ieee_overflow 0
.amdhsa_exception_fp_ieee_underflow 0
.amdhsa_exception_fp_ieee_inexact 0
.amdhsa_exception_int_div_zero 0
.end_amdhsa_kernel
.text
.Lfunc_end0:
.size _Z13ww2par_kernelPvS_S_S_S_S_, .Lfunc_end0-_Z13ww2par_kernelPvS_S_S_S_S_
.section .AMDGPU.csdata,"",@progbits
.text
.p2alignl 7, 3214868480
.fill 96, 4, 3214868480
.protected blocksize_gpu
.type blocksize_gpu,@object
.section .bss,"aw",@nobits
.globl blocksize_gpu
.p2align 2, 0x0
blocksize_gpu:
.long 0
.size blocksize_gpu, 4
.protected nParticles_gpu
.type nParticles_gpu,@object
.globl nParticles_gpu
.p2align 2, 0x0
nParticles_gpu:
.long 0
.size nParticles_gpu, 4
.protected nTargets_gpu
.type nTargets_gpu,@object
.globl nTargets_gpu
.p2align 2, 0x0
nTargets_gpu:
.long 0
.size nTargets_gpu, 4
.protected nParticleBlocks_gpu
.type nParticleBlocks_gpu,@object
.globl nParticleBlocks_gpu
.p2align 2, 0x0
nParticleBlocks_gpu:
.long 0
.size nParticleBlocks_gpu, 4
.protected nTargetBlocks_gpu
.type nTargetBlocks_gpu,@object
.globl nTargetBlocks_gpu
.p2align 2, 0x0
nTargetBlocks_gpu:
.long 0
.size nTargetBlocks_gpu, 4
.protected ksigmasqr_gpu
.type ksigmasqr_gpu,@object
.globl ksigmasqr_gpu
.p2align 3, 0x0
ksigmasqr_gpu:
.quad 0x0000000000000000
.size ksigmasqr_gpu, 8
.protected inv_pi_gpu
.type inv_pi_gpu,@object
.globl inv_pi_gpu
.p2align 3, 0x0
inv_pi_gpu:
.quad 0x0000000000000000
.size inv_pi_gpu, 8
.protected myeps_gpu
.type myeps_gpu,@object
.globl myeps_gpu
.p2align 3, 0x0
myeps_gpu:
.quad 0x0000000000000000
.size myeps_gpu, 8
.type __hip_cuid_,@object
.globl __hip_cuid_
__hip_cuid_:
.byte 0
.size __hip_cuid_, 1
.ident "AMD clang version 18.0.0git (https://github.com/RadeonOpenCompute/llvm-project roc-6.3.2 25012 e5bf7e55c91490b07c49d8960fa7983d864936c4)"
.section ".note.GNU-stack","",@progbits
.addrsig
.addrsig_sym blocksize_gpu
.addrsig_sym nParticles_gpu
.addrsig_sym ksigmasqr_gpu
.addrsig_sym inv_pi_gpu
.addrsig_sym myeps_gpu
.addrsig_sym __hip_cuid_
.amdgpu_metadata
---
amdhsa.kernels:
- .args:
- .address_space: global
.offset: 0
.size: 8
.value_kind: global_buffer
- .address_space: global
.offset: 8
.size: 8
.value_kind: global_buffer
- .address_space: global
.offset: 16
.size: 8
.value_kind: global_buffer
- .address_space: global
.offset: 24
.size: 8
.value_kind: global_buffer
- .address_space: global
.offset: 32
.size: 8
.value_kind: global_buffer
- .address_space: global
.offset: 40
.size: 8
.value_kind: global_buffer
- .offset: 48
.size: 4
.value_kind: hidden_block_count_x
- .offset: 52
.size: 4
.value_kind: hidden_block_count_y
- .offset: 56
.size: 4
.value_kind: hidden_block_count_z
- .offset: 60
.size: 2
.value_kind: hidden_group_size_x
- .offset: 62
.size: 2
.value_kind: hidden_group_size_y
- .offset: 64
.size: 2
.value_kind: hidden_group_size_z
- .offset: 66
.size: 2
.value_kind: hidden_remainder_x
- .offset: 68
.size: 2
.value_kind: hidden_remainder_y
- .offset: 70
.size: 2
.value_kind: hidden_remainder_z
- .offset: 88
.size: 8
.value_kind: hidden_global_offset_x
- .offset: 96
.size: 8
.value_kind: hidden_global_offset_y
- .offset: 104
.size: 8
.value_kind: hidden_global_offset_z
- .offset: 112
.size: 2
.value_kind: hidden_grid_dims
- .offset: 168
.size: 4
.value_kind: hidden_dynamic_lds_size
.group_segment_fixed_size: 0
.kernarg_segment_align: 8
.kernarg_segment_size: 304
.language: OpenCL C
.language_version:
- 2
- 0
.max_flat_workgroup_size: 1024
.name: _Z13ww2par_kernelPvS_S_S_S_S_
.private_segment_fixed_size: 0
.sgpr_count: 54
.sgpr_spill_count: 0
.symbol: _Z13ww2par_kernelPvS_S_S_S_S_.kd
.uniform_work_group_size: 1
.uses_dynamic_stack: false
.vgpr_count: 32
.vgpr_spill_count: 0
.wavefront_size: 32
.workgroup_processor_mode: 1
amdhsa.target: amdgcn-amd-amdhsa--gfx1100
amdhsa.version:
- 1
- 2
...
.end_amdgpu_metadata |
You are a helpful coding assistant specialized in converting HIP source code to AMD host assembly. | #include <hip/hip_runtime.h>
/*_________________________________________________________________________
* ww2parCC_device_066DP.cu - calculates the self-induced velocity field of the wake.
* Parallel version on GPU - CUDA code executed on device
*
* CUDA kernel function (executed on the device, called from the host) +
* CUDA block & thread functions (executed on the device, called from device)
* Manages data flow, launches and syncronize threads blocks
*
* DUWIND- Delft University Wind Energy Research Institute
* developer: Giuseppe Tescione
*
* Version: 0.6.6DP (alpha) - 20110824
* basic version with no loop unrolling, no wrap and no multithread bodies
* simple cut-off constant for desingularization
* double precision (for GPUs of computing capability 2.x)
*________________________________________________________________________*/
//Definition of double2 and double3 types
//typedef struct {
//double x, y;
//} double2;
//typedef struct {
//double x, y, z;
//} double3;
__constant__ int blocksize_gpu;
__constant__ int nParticles_gpu;
__constant__ int nTargets_gpu;
__constant__ int nParticleBlocks_gpu;
__constant__ int nTargetBlocks_gpu;
__constant__ double ksigmasqr_gpu;
__constant__ double inv_pi_gpu;
__constant__ double myeps_gpu;
/* constants (block dimension, number of particle, cut-off and 1/2pi) residing in
constant memory space, accessible from all threads within the grid and from the host.
Defined in host code*/
__device__ double ww2par_thread(double THR_vorticity, double THR_xTarget, double THR_yTarget, double THR_xBlob, double THR_yBlob, double THR_wBlob)
/*THREAD FUNCTION - set of instructions performed parallely by each processor.
Calculates velocity induction on target particles by source particle.
Takes as input:
THR_UIND (2x double THR_UIND.x & THR_UIND.y) -> velocity induction of target particles
already computed by previous thread blocks to which adds the new induction;
THR_TARG (3x double THR_TARG.x & THR_TARG.y & THR_TARG.z) -> position (x, y) and
vorticity (z) of target particles.Position is needed to calculate induction
but vorticity is not used but kept to mantain data structure coeherency;
THR_SRC (3x double THR_SRC.x & THR_SRC.y & THR_SRC.z) -> position (x, y) and
vorticity (z) of source particles, needed to calculate induction.
Gives as output:
THR_UIND (2x double THR_UIND.x & THR_UIND.y) -> updated velocity induction of targets */
{
//targets-particle distance, local variable [2 FLOPS]
// printf("Thread %d; xTarget %f; yTarget %f; xBlob %f; yBlob %f, wBlob %f\n -----------------------------------------\n",threadIdx.x,THR_xTarget,THR_yTarget,THR_xBlob,THR_yBlob,THR_wBlob);
double2 RAD;
RAD.x = THR_xTarget - THR_xBlob;
RAD.y = THR_yTarget - THR_yBlob;
//square of distance plus cut-off, local variable [4 FLOPS]
double RADSQR = RAD.x * RAD.x + RAD.y * RAD.y + myeps_gpu;
//vorticity/(2pi*sqr(rad)) [2 FLOPS]
double S = THR_wBlob * inv_pi_gpu / ksigmasqr_gpu;
//update velocity induction [4 FLOPS]
THR_vorticity += S * exp(-RADSQR/(ksigmasqr_gpu));
return THR_vorticity;
}
__device__ double ww2par_block(double BLK_xTarget, double BLK_yTarget, double BLK_vorticity)
/*BLOCK FUNCTION - data & execution management for thread block
Evaluate induction in a pxp block
Takes as input:
BLK_TARG (3x double BLK_TARG.x & BLK_TARG.y & BLK_TARG.z) -> position (x, y)
and vorticity (z) of target. Passed unchanged to THREAD CODE as TARGET;
BLK_UIND (2x double BLK_UIND.x & BLK_UIND.y) -> velocity induction of target
particles. Passed unchanged to THREAD CODE as UIND.
Gives as output:
BLK_UIND (2x double BLK_UIND.x & BLK_UIND.y) -> updated velocity induction
of target. Received unchanged by THREAD CODE as UIND */
{
extern __shared__ double BLK_blob [];
//extern __shared__ double BLK_yBlob [];
//extern __shared__ double BLK_wBlob [];
/* External variable residing in shared memory space of thread block,
accessible from all threads within the block. Source particles data array
(position (x & y) and vorticity (z)) common to the block.
Size of the array is determined at launch time with instruction [] */
//call thread function for every thread in block
for ( int i = 0; i <blockDim.x; i++)
{
BLK_vorticity = ww2par_thread(BLK_vorticity, BLK_xTarget, BLK_yTarget, BLK_blob[i], BLK_blob[i+blocksize_gpu], BLK_blob[i+2*blocksize_gpu]);
}
return BLK_vorticity;
}
__global__ void ww2par_kernel(void *cxBlob_gpu_ondevice, void *cyBlob_gpu_ondevice, void *cwBlob_gpu_ondevice, void *cxTarget_gpu_ondevice, void *cyTarget_gpu_ondevice, void *cw_gpu_ondevice)
/*KERNEL FUNCTION - data & execution management for block grid
Kernel executed on the device, called from the host.
Manages memory passages from host to device and executes block function
Takes as input:
*ONDEV_POS and *ONDEV_IND -> pointers to global device memory for the
position and induction of particles */
{
extern __shared__ double BLK_blob []; //see above
//extern __shared__ double BLK_yBlob []; //see above
//extern __shared__ double BLK_wBlob []; //see above
//pointers passage
double * KRN_xBlob = (double *)cxBlob_gpu_ondevice;
double * KRN_yBlob = (double *)cyBlob_gpu_ondevice;
double * KRN_wBlob = (double *)cwBlob_gpu_ondevice;
double * KRN_xTarget = (double *)cxTarget_gpu_ondevice;
double * KRN_yTarget = (double *)cyTarget_gpu_ondevice;
double * KRN_w = (double *)cw_gpu_ondevice;
//induction initialization
double BLK_vorticity;
BLK_vorticity = 0;
//target particles definition
double BLK_xTarget;
double BLK_yTarget;
int NTHR = blockIdx.x * blockDim.x + threadIdx.x;
BLK_xTarget = KRN_xTarget[NTHR];
BLK_yTarget = KRN_yTarget[NTHR];
//printf("Block %d; Thread %d :: Before the loop\n",blockIdx.x,threadIdx.x);
int i, block;
for (i = 0, block = 0; i < nParticles_gpu; i += blocksize_gpu, block++)//LOOP over blocks
{
//source particle definition (shared data)
int id = block * blockDim.x + threadIdx.x;
BLK_blob [threadIdx.x] = KRN_xBlob[id];
BLK_blob [threadIdx.x + blocksize_gpu] = KRN_yBlob[id];
BLK_blob [threadIdx.x + 2*blocksize_gpu] = KRN_wBlob[id];
__syncthreads();
// all shared memory locations are populated before starting computation
BLK_vorticity = ww2par_block(BLK_xTarget, BLK_yTarget, BLK_vorticity); //block function call
__syncthreads();
//all threads within block finish computation before advancing next block
}
//save results in global memory
double WIND = BLK_vorticity;
KRN_w[NTHR] = WIND;
} | .text
.file "ww2parGauss_device.hip"
.globl _Z28__device_stub__ww2par_kernelPvS_S_S_S_S_ # -- Begin function _Z28__device_stub__ww2par_kernelPvS_S_S_S_S_
.p2align 4, 0x90
.type _Z28__device_stub__ww2par_kernelPvS_S_S_S_S_,@function
_Z28__device_stub__ww2par_kernelPvS_S_S_S_S_: # @_Z28__device_stub__ww2par_kernelPvS_S_S_S_S_
.cfi_startproc
# %bb.0:
subq $152, %rsp
.cfi_def_cfa_offset 160
movq %rdi, 88(%rsp)
movq %rsi, 80(%rsp)
movq %rdx, 72(%rsp)
movq %rcx, 64(%rsp)
movq %r8, 56(%rsp)
movq %r9, 48(%rsp)
leaq 88(%rsp), %rax
movq %rax, 96(%rsp)
leaq 80(%rsp), %rax
movq %rax, 104(%rsp)
leaq 72(%rsp), %rax
movq %rax, 112(%rsp)
leaq 64(%rsp), %rax
movq %rax, 120(%rsp)
leaq 56(%rsp), %rax
movq %rax, 128(%rsp)
leaq 48(%rsp), %rax
movq %rax, 136(%rsp)
leaq 32(%rsp), %rdi
leaq 16(%rsp), %rsi
leaq 8(%rsp), %rdx
movq %rsp, %rcx
callq __hipPopCallConfiguration
movq 32(%rsp), %rsi
movl 40(%rsp), %edx
movq 16(%rsp), %rcx
movl 24(%rsp), %r8d
leaq 96(%rsp), %r9
movl $_Z13ww2par_kernelPvS_S_S_S_S_, %edi
pushq (%rsp)
.cfi_adjust_cfa_offset 8
pushq 16(%rsp)
.cfi_adjust_cfa_offset 8
callq hipLaunchKernel
addq $168, %rsp
.cfi_adjust_cfa_offset -168
retq
.Lfunc_end0:
.size _Z28__device_stub__ww2par_kernelPvS_S_S_S_S_, .Lfunc_end0-_Z28__device_stub__ww2par_kernelPvS_S_S_S_S_
.cfi_endproc
# -- End function
.p2align 4, 0x90 # -- Begin function __hip_module_ctor
.type __hip_module_ctor,@function
__hip_module_ctor: # @__hip_module_ctor
.cfi_startproc
# %bb.0:
pushq %rbx
.cfi_def_cfa_offset 16
.cfi_offset %rbx, -16
cmpq $0, __hip_gpubin_handle(%rip)
jne .LBB1_2
# %bb.1:
movl $__hip_fatbin_wrapper, %edi
callq __hipRegisterFatBinary
movq %rax, __hip_gpubin_handle(%rip)
.LBB1_2:
movq __hip_gpubin_handle(%rip), %rbx
subq $32, %rsp
.cfi_adjust_cfa_offset 32
xorps %xmm0, %xmm0
movups %xmm0, 16(%rsp)
movups %xmm0, (%rsp)
movl $_Z13ww2par_kernelPvS_S_S_S_S_, %esi
movl $.L__unnamed_1, %edx
movl $.L__unnamed_1, %ecx
movq %rbx, %rdi
movl $-1, %r8d
xorl %r9d, %r9d
callq __hipRegisterFunction
addq $32, %rsp
.cfi_adjust_cfa_offset -32
movl $blocksize_gpu, %esi
movl $.L__unnamed_2, %edx
movl $.L__unnamed_2, %ecx
movl $4, %r9d
movq %rbx, %rdi
xorl %r8d, %r8d
pushq $0
.cfi_adjust_cfa_offset 8
pushq $1
.cfi_adjust_cfa_offset 8
callq __hipRegisterVar
addq $16, %rsp
.cfi_adjust_cfa_offset -16
movl $nParticles_gpu, %esi
movl $.L__unnamed_3, %edx
movl $.L__unnamed_3, %ecx
movl $4, %r9d
movq %rbx, %rdi
xorl %r8d, %r8d
pushq $0
.cfi_adjust_cfa_offset 8
pushq $1
.cfi_adjust_cfa_offset 8
callq __hipRegisterVar
addq $16, %rsp
.cfi_adjust_cfa_offset -16
movl $nTargets_gpu, %esi
movl $.L__unnamed_4, %edx
movl $.L__unnamed_4, %ecx
movl $4, %r9d
movq %rbx, %rdi
xorl %r8d, %r8d
pushq $0
.cfi_adjust_cfa_offset 8
pushq $1
.cfi_adjust_cfa_offset 8
callq __hipRegisterVar
addq $16, %rsp
.cfi_adjust_cfa_offset -16
movl $nParticleBlocks_gpu, %esi
movl $.L__unnamed_5, %edx
movl $.L__unnamed_5, %ecx
movl $4, %r9d
movq %rbx, %rdi
xorl %r8d, %r8d
pushq $0
.cfi_adjust_cfa_offset 8
pushq $1
.cfi_adjust_cfa_offset 8
callq __hipRegisterVar
addq $16, %rsp
.cfi_adjust_cfa_offset -16
movl $nTargetBlocks_gpu, %esi
movl $.L__unnamed_6, %edx
movl $.L__unnamed_6, %ecx
movl $4, %r9d
movq %rbx, %rdi
xorl %r8d, %r8d
pushq $0
.cfi_adjust_cfa_offset 8
pushq $1
.cfi_adjust_cfa_offset 8
callq __hipRegisterVar
addq $16, %rsp
.cfi_adjust_cfa_offset -16
movl $ksigmasqr_gpu, %esi
movl $.L__unnamed_7, %edx
movl $.L__unnamed_7, %ecx
movl $8, %r9d
movq %rbx, %rdi
xorl %r8d, %r8d
pushq $0
.cfi_adjust_cfa_offset 8
pushq $1
.cfi_adjust_cfa_offset 8
callq __hipRegisterVar
addq $16, %rsp
.cfi_adjust_cfa_offset -16
movl $inv_pi_gpu, %esi
movl $.L__unnamed_8, %edx
movl $.L__unnamed_8, %ecx
movl $8, %r9d
movq %rbx, %rdi
xorl %r8d, %r8d
pushq $0
.cfi_adjust_cfa_offset 8
pushq $1
.cfi_adjust_cfa_offset 8
callq __hipRegisterVar
addq $16, %rsp
.cfi_adjust_cfa_offset -16
movl $myeps_gpu, %esi
movl $.L__unnamed_9, %edx
movl $.L__unnamed_9, %ecx
movl $8, %r9d
movq %rbx, %rdi
xorl %r8d, %r8d
pushq $0
.cfi_adjust_cfa_offset 8
pushq $1
.cfi_adjust_cfa_offset 8
callq __hipRegisterVar
addq $16, %rsp
.cfi_adjust_cfa_offset -16
movl $__hip_module_dtor, %edi
popq %rbx
.cfi_def_cfa_offset 8
jmp atexit # TAILCALL
.Lfunc_end1:
.size __hip_module_ctor, .Lfunc_end1-__hip_module_ctor
.cfi_endproc
# -- End function
.p2align 4, 0x90 # -- Begin function __hip_module_dtor
.type __hip_module_dtor,@function
__hip_module_dtor: # @__hip_module_dtor
.cfi_startproc
# %bb.0:
movq __hip_gpubin_handle(%rip), %rdi
testq %rdi, %rdi
je .LBB2_2
# %bb.1:
pushq %rax
.cfi_def_cfa_offset 16
callq __hipUnregisterFatBinary
movq $0, __hip_gpubin_handle(%rip)
addq $8, %rsp
.cfi_def_cfa_offset 8
.LBB2_2:
retq
.Lfunc_end2:
.size __hip_module_dtor, .Lfunc_end2-__hip_module_dtor
.cfi_endproc
# -- End function
.type blocksize_gpu,@object # @blocksize_gpu
.local blocksize_gpu
.comm blocksize_gpu,4,4
.type nParticles_gpu,@object # @nParticles_gpu
.local nParticles_gpu
.comm nParticles_gpu,4,4
.type nTargets_gpu,@object # @nTargets_gpu
.local nTargets_gpu
.comm nTargets_gpu,4,4
.type nParticleBlocks_gpu,@object # @nParticleBlocks_gpu
.local nParticleBlocks_gpu
.comm nParticleBlocks_gpu,4,4
.type nTargetBlocks_gpu,@object # @nTargetBlocks_gpu
.local nTargetBlocks_gpu
.comm nTargetBlocks_gpu,4,4
.type ksigmasqr_gpu,@object # @ksigmasqr_gpu
.local ksigmasqr_gpu
.comm ksigmasqr_gpu,8,8
.type inv_pi_gpu,@object # @inv_pi_gpu
.local inv_pi_gpu
.comm inv_pi_gpu,8,8
.type myeps_gpu,@object # @myeps_gpu
.local myeps_gpu
.comm myeps_gpu,8,8
.type _Z13ww2par_kernelPvS_S_S_S_S_,@object # @_Z13ww2par_kernelPvS_S_S_S_S_
.section .rodata,"a",@progbits
.globl _Z13ww2par_kernelPvS_S_S_S_S_
.p2align 3, 0x0
_Z13ww2par_kernelPvS_S_S_S_S_:
.quad _Z28__device_stub__ww2par_kernelPvS_S_S_S_S_
.size _Z13ww2par_kernelPvS_S_S_S_S_, 8
.type .L__unnamed_1,@object # @0
.section .rodata.str1.1,"aMS",@progbits,1
.L__unnamed_1:
.asciz "_Z13ww2par_kernelPvS_S_S_S_S_"
.size .L__unnamed_1, 30
.type .L__unnamed_2,@object # @1
.L__unnamed_2:
.asciz "blocksize_gpu"
.size .L__unnamed_2, 14
.type .L__unnamed_3,@object # @2
.L__unnamed_3:
.asciz "nParticles_gpu"
.size .L__unnamed_3, 15
.type .L__unnamed_4,@object # @3
.L__unnamed_4:
.asciz "nTargets_gpu"
.size .L__unnamed_4, 13
.type .L__unnamed_5,@object # @4
.L__unnamed_5:
.asciz "nParticleBlocks_gpu"
.size .L__unnamed_5, 20
.type .L__unnamed_6,@object # @5
.L__unnamed_6:
.asciz "nTargetBlocks_gpu"
.size .L__unnamed_6, 18
.type .L__unnamed_7,@object # @6
.L__unnamed_7:
.asciz "ksigmasqr_gpu"
.size .L__unnamed_7, 14
.type .L__unnamed_8,@object # @7
.L__unnamed_8:
.asciz "inv_pi_gpu"
.size .L__unnamed_8, 11
.type .L__unnamed_9,@object # @8
.L__unnamed_9:
.asciz "myeps_gpu"
.size .L__unnamed_9, 10
.type __hip_fatbin_wrapper,@object # @__hip_fatbin_wrapper
.section .hipFatBinSegment,"a",@progbits
.p2align 3, 0x0
__hip_fatbin_wrapper:
.long 1212764230 # 0x48495046
.long 1 # 0x1
.quad __hip_fatbin
.quad 0
.size __hip_fatbin_wrapper, 24
.type __hip_gpubin_handle,@object # @__hip_gpubin_handle
.local __hip_gpubin_handle
.comm __hip_gpubin_handle,8,8
.section .init_array,"aw",@init_array
.p2align 3, 0x0
.quad __hip_module_ctor
.type __hip_cuid_,@object # @__hip_cuid_
.bss
.globl __hip_cuid_
__hip_cuid_:
.byte 0 # 0x0
.size __hip_cuid_, 1
.section ".linker-options","e",@llvm_linker_options
.ident "AMD clang version 18.0.0git (https://github.com/RadeonOpenCompute/llvm-project roc-6.3.2 25012 e5bf7e55c91490b07c49d8960fa7983d864936c4)"
.section ".note.GNU-stack","",@progbits
.addrsig
.addrsig_sym _Z28__device_stub__ww2par_kernelPvS_S_S_S_S_
.addrsig_sym __hip_module_ctor
.addrsig_sym __hip_module_dtor
.addrsig_sym blocksize_gpu
.addrsig_sym nParticles_gpu
.addrsig_sym nTargets_gpu
.addrsig_sym nParticleBlocks_gpu
.addrsig_sym nTargetBlocks_gpu
.addrsig_sym ksigmasqr_gpu
.addrsig_sym inv_pi_gpu
.addrsig_sym myeps_gpu
.addrsig_sym _Z13ww2par_kernelPvS_S_S_S_S_
.addrsig_sym __hip_fatbin
.addrsig_sym __hip_fatbin_wrapper
.addrsig_sym __hip_cuid_ |
You are a helpful coding assistant specialized in converting from CUDA host assembly to AMD host assembly. | .file "tmpxft_000236bf_00000000-6_ww2parGauss_device.cudafe1.cpp"
.text
#APP
#NO_APP
.type _ZL26__cudaUnregisterBinaryUtilv, @function
_ZL26__cudaUnregisterBinaryUtilv:
.LFB2031:
.cfi_startproc
endbr64
subq $8, %rsp
.cfi_def_cfa_offset 16
movq _ZL20__cudaFatCubinHandle(%rip), %rdi
call __cudaUnregisterFatBinary@PLT
addq $8, %rsp
.cfi_def_cfa_offset 8
ret
.cfi_endproc
.LFE2031:
.size _ZL26__cudaUnregisterBinaryUtilv, .-_ZL26__cudaUnregisterBinaryUtilv
.globl _Z13ww2par_threaddddddd
.type _Z13ww2par_threaddddddd, @function
_Z13ww2par_threaddddddd:
.LFB2027:
.cfi_startproc
endbr64
pushq %rax
.cfi_def_cfa_offset 16
popq %rax
.cfi_def_cfa_offset 8
subq $24, %rsp
.cfi_def_cfa_offset 32
movl $1, 12(%rsp)
movl 12(%rsp), %edi
call exit@PLT
.cfi_endproc
.LFE2027:
.size _Z13ww2par_threaddddddd, .-_Z13ww2par_threaddddddd
.globl _Z12ww2par_blockddd
.type _Z12ww2par_blockddd, @function
_Z12ww2par_blockddd:
.LFB2028:
.cfi_startproc
endbr64
pushq %rax
.cfi_def_cfa_offset 16
popq %rax
.cfi_def_cfa_offset 8
subq $24, %rsp
.cfi_def_cfa_offset 32
movl $1, 12(%rsp)
movl 12(%rsp), %edi
call exit@PLT
.cfi_endproc
.LFE2028:
.size _Z12ww2par_blockddd, .-_Z12ww2par_blockddd
.globl _Z43__device_stub__Z13ww2par_kernelPvS_S_S_S_S_PvS_S_S_S_S_
.type _Z43__device_stub__Z13ww2par_kernelPvS_S_S_S_S_PvS_S_S_S_S_, @function
_Z43__device_stub__Z13ww2par_kernelPvS_S_S_S_S_PvS_S_S_S_S_:
.LFB2053:
.cfi_startproc
endbr64
subq $184, %rsp
.cfi_def_cfa_offset 192
movq %rdi, 40(%rsp)
movq %rsi, 32(%rsp)
movq %rdx, 24(%rsp)
movq %rcx, 16(%rsp)
movq %r8, 8(%rsp)
movq %r9, (%rsp)
movq %fs:40, %rax
movq %rax, 168(%rsp)
xorl %eax, %eax
leaq 40(%rsp), %rax
movq %rax, 112(%rsp)
leaq 32(%rsp), %rax
movq %rax, 120(%rsp)
leaq 24(%rsp), %rax
movq %rax, 128(%rsp)
leaq 16(%rsp), %rax
movq %rax, 136(%rsp)
leaq 8(%rsp), %rax
movq %rax, 144(%rsp)
movq %rsp, %rax
movq %rax, 152(%rsp)
movl $1, 64(%rsp)
movl $1, 68(%rsp)
movl $1, 72(%rsp)
movl $1, 76(%rsp)
movl $1, 80(%rsp)
movl $1, 84(%rsp)
leaq 56(%rsp), %rcx
leaq 48(%rsp), %rdx
leaq 76(%rsp), %rsi
leaq 64(%rsp), %rdi
call __cudaPopCallConfiguration@PLT
testl %eax, %eax
je .L11
.L7:
movq 168(%rsp), %rax
subq %fs:40, %rax
jne .L12
addq $184, %rsp
.cfi_remember_state
.cfi_def_cfa_offset 8
ret
.L11:
.cfi_restore_state
pushq 56(%rsp)
.cfi_def_cfa_offset 200
pushq 56(%rsp)
.cfi_def_cfa_offset 208
leaq 128(%rsp), %r9
movq 92(%rsp), %rcx
movl 100(%rsp), %r8d
movq 80(%rsp), %rsi
movl 88(%rsp), %edx
leaq _Z13ww2par_kernelPvS_S_S_S_S_(%rip), %rdi
call cudaLaunchKernel@PLT
addq $16, %rsp
.cfi_def_cfa_offset 192
jmp .L7
.L12:
call __stack_chk_fail@PLT
.cfi_endproc
.LFE2053:
.size _Z43__device_stub__Z13ww2par_kernelPvS_S_S_S_S_PvS_S_S_S_S_, .-_Z43__device_stub__Z13ww2par_kernelPvS_S_S_S_S_PvS_S_S_S_S_
.globl _Z13ww2par_kernelPvS_S_S_S_S_
.type _Z13ww2par_kernelPvS_S_S_S_S_, @function
_Z13ww2par_kernelPvS_S_S_S_S_:
.LFB2054:
.cfi_startproc
endbr64
subq $8, %rsp
.cfi_def_cfa_offset 16
call _Z43__device_stub__Z13ww2par_kernelPvS_S_S_S_S_PvS_S_S_S_S_
addq $8, %rsp
.cfi_def_cfa_offset 8
ret
.cfi_endproc
.LFE2054:
.size _Z13ww2par_kernelPvS_S_S_S_S_, .-_Z13ww2par_kernelPvS_S_S_S_S_
.section .rodata.str1.1,"aMS",@progbits,1
.LC0:
.string "_Z13ww2par_kernelPvS_S_S_S_S_"
.LC1:
.string "blocksize_gpu"
.LC2:
.string "nParticles_gpu"
.LC3:
.string "nTargets_gpu"
.LC4:
.string "nParticleBlocks_gpu"
.LC5:
.string "nTargetBlocks_gpu"
.LC6:
.string "ksigmasqr_gpu"
.LC7:
.string "inv_pi_gpu"
.LC8:
.string "myeps_gpu"
.text
.type _ZL24__sti____cudaRegisterAllv, @function
_ZL24__sti____cudaRegisterAllv:
.LFB2056:
.cfi_startproc
endbr64
pushq %rbx
.cfi_def_cfa_offset 16
.cfi_offset 3, -16
leaq _ZL15__fatDeviceText(%rip), %rdi
call __cudaRegisterFatBinary@PLT
movq %rax, %rbx
movq %rax, _ZL20__cudaFatCubinHandle(%rip)
pushq $0
.cfi_def_cfa_offset 24
pushq $0
.cfi_def_cfa_offset 32
pushq $0
.cfi_def_cfa_offset 40
pushq $0
.cfi_def_cfa_offset 48
movl $0, %r9d
movl $-1, %r8d
leaq .LC0(%rip), %rdx
movq %rdx, %rcx
leaq _Z13ww2par_kernelPvS_S_S_S_S_(%rip), %rsi
movq %rax, %rdi
call __cudaRegisterFunction@PLT
addq $32, %rsp
.cfi_def_cfa_offset 16
pushq $0
.cfi_def_cfa_offset 24
pushq $1
.cfi_def_cfa_offset 32
movl $4, %r9d
movl $0, %r8d
leaq .LC1(%rip), %rdx
movq %rdx, %rcx
leaq _ZL13blocksize_gpu(%rip), %rsi
movq %rbx, %rdi
call __cudaRegisterVar@PLT
addq $16, %rsp
.cfi_def_cfa_offset 16
pushq $0
.cfi_def_cfa_offset 24
pushq $1
.cfi_def_cfa_offset 32
movl $4, %r9d
movl $0, %r8d
leaq .LC2(%rip), %rdx
movq %rdx, %rcx
leaq _ZL14nParticles_gpu(%rip), %rsi
movq %rbx, %rdi
call __cudaRegisterVar@PLT
addq $16, %rsp
.cfi_def_cfa_offset 16
pushq $0
.cfi_def_cfa_offset 24
pushq $1
.cfi_def_cfa_offset 32
movl $4, %r9d
movl $0, %r8d
leaq .LC3(%rip), %rdx
movq %rdx, %rcx
leaq _ZL12nTargets_gpu(%rip), %rsi
movq %rbx, %rdi
call __cudaRegisterVar@PLT
addq $16, %rsp
.cfi_def_cfa_offset 16
pushq $0
.cfi_def_cfa_offset 24
pushq $1
.cfi_def_cfa_offset 32
movl $4, %r9d
movl $0, %r8d
leaq .LC4(%rip), %rdx
movq %rdx, %rcx
leaq _ZL19nParticleBlocks_gpu(%rip), %rsi
movq %rbx, %rdi
call __cudaRegisterVar@PLT
addq $16, %rsp
.cfi_def_cfa_offset 16
pushq $0
.cfi_def_cfa_offset 24
pushq $1
.cfi_def_cfa_offset 32
movl $4, %r9d
movl $0, %r8d
leaq .LC5(%rip), %rdx
movq %rdx, %rcx
leaq _ZL17nTargetBlocks_gpu(%rip), %rsi
movq %rbx, %rdi
call __cudaRegisterVar@PLT
addq $16, %rsp
.cfi_def_cfa_offset 16
pushq $0
.cfi_def_cfa_offset 24
pushq $1
.cfi_def_cfa_offset 32
movl $8, %r9d
movl $0, %r8d
leaq .LC6(%rip), %rdx
movq %rdx, %rcx
leaq _ZL13ksigmasqr_gpu(%rip), %rsi
movq %rbx, %rdi
call __cudaRegisterVar@PLT
addq $16, %rsp
.cfi_def_cfa_offset 16
pushq $0
.cfi_def_cfa_offset 24
pushq $1
.cfi_def_cfa_offset 32
movl $8, %r9d
movl $0, %r8d
leaq .LC7(%rip), %rdx
movq %rdx, %rcx
leaq _ZL10inv_pi_gpu(%rip), %rsi
movq %rbx, %rdi
call __cudaRegisterVar@PLT
addq $16, %rsp
.cfi_def_cfa_offset 16
pushq $0
.cfi_def_cfa_offset 24
pushq $1
.cfi_def_cfa_offset 32
movl $8, %r9d
movl $0, %r8d
leaq .LC8(%rip), %rdx
movq %rdx, %rcx
leaq _ZL9myeps_gpu(%rip), %rsi
movq %rbx, %rdi
call __cudaRegisterVar@PLT
addq $16, %rsp
.cfi_def_cfa_offset 16
movq _ZL20__cudaFatCubinHandle(%rip), %rdi
call __cudaRegisterFatBinaryEnd@PLT
leaq _ZL26__cudaUnregisterBinaryUtilv(%rip), %rdi
call atexit@PLT
popq %rbx
.cfi_def_cfa_offset 8
ret
.cfi_endproc
.LFE2056:
.size _ZL24__sti____cudaRegisterAllv, .-_ZL24__sti____cudaRegisterAllv
.section .init_array,"aw"
.align 8
.quad _ZL24__sti____cudaRegisterAllv
.section .nvFatBinSegment,"aw"
.align 8
.type _ZL15__fatDeviceText, @object
.size _ZL15__fatDeviceText, 24
_ZL15__fatDeviceText:
.long 1180844977
.long 1
.quad fatbinData
.quad 0
.local _ZL20__cudaFatCubinHandle
.comm _ZL20__cudaFatCubinHandle,8,8
.local _ZL9myeps_gpu
.comm _ZL9myeps_gpu,8,8
.local _ZL10inv_pi_gpu
.comm _ZL10inv_pi_gpu,8,8
.local _ZL13ksigmasqr_gpu
.comm _ZL13ksigmasqr_gpu,8,8
.local _ZL17nTargetBlocks_gpu
.comm _ZL17nTargetBlocks_gpu,4,4
.local _ZL19nParticleBlocks_gpu
.comm _ZL19nParticleBlocks_gpu,4,4
.local _ZL12nTargets_gpu
.comm _ZL12nTargets_gpu,4,4
.local _ZL14nParticles_gpu
.comm _ZL14nParticles_gpu,4,4
.local _ZL13blocksize_gpu
.comm _ZL13blocksize_gpu,4,4
.ident "GCC: (Ubuntu 13.3.0-6ubuntu2~24.04) 13.3.0"
.section .note.GNU-stack,"",@progbits
.section .note.gnu.property,"a"
.align 8
.long 1f - 0f
.long 4f - 1f
.long 5
0:
.string "GNU"
1:
.align 8
.long 0xc0000002
.long 3f - 2f
2:
.long 0x3
3:
.align 8
4: | .text
.file "ww2parGauss_device.hip"
.globl _Z28__device_stub__ww2par_kernelPvS_S_S_S_S_ # -- Begin function _Z28__device_stub__ww2par_kernelPvS_S_S_S_S_
.p2align 4, 0x90
.type _Z28__device_stub__ww2par_kernelPvS_S_S_S_S_,@function
_Z28__device_stub__ww2par_kernelPvS_S_S_S_S_: # @_Z28__device_stub__ww2par_kernelPvS_S_S_S_S_
.cfi_startproc
# %bb.0:
subq $152, %rsp
.cfi_def_cfa_offset 160
movq %rdi, 88(%rsp)
movq %rsi, 80(%rsp)
movq %rdx, 72(%rsp)
movq %rcx, 64(%rsp)
movq %r8, 56(%rsp)
movq %r9, 48(%rsp)
leaq 88(%rsp), %rax
movq %rax, 96(%rsp)
leaq 80(%rsp), %rax
movq %rax, 104(%rsp)
leaq 72(%rsp), %rax
movq %rax, 112(%rsp)
leaq 64(%rsp), %rax
movq %rax, 120(%rsp)
leaq 56(%rsp), %rax
movq %rax, 128(%rsp)
leaq 48(%rsp), %rax
movq %rax, 136(%rsp)
leaq 32(%rsp), %rdi
leaq 16(%rsp), %rsi
leaq 8(%rsp), %rdx
movq %rsp, %rcx
callq __hipPopCallConfiguration
movq 32(%rsp), %rsi
movl 40(%rsp), %edx
movq 16(%rsp), %rcx
movl 24(%rsp), %r8d
leaq 96(%rsp), %r9
movl $_Z13ww2par_kernelPvS_S_S_S_S_, %edi
pushq (%rsp)
.cfi_adjust_cfa_offset 8
pushq 16(%rsp)
.cfi_adjust_cfa_offset 8
callq hipLaunchKernel
addq $168, %rsp
.cfi_adjust_cfa_offset -168
retq
.Lfunc_end0:
.size _Z28__device_stub__ww2par_kernelPvS_S_S_S_S_, .Lfunc_end0-_Z28__device_stub__ww2par_kernelPvS_S_S_S_S_
.cfi_endproc
# -- End function
.p2align 4, 0x90 # -- Begin function __hip_module_ctor
.type __hip_module_ctor,@function
__hip_module_ctor: # @__hip_module_ctor
.cfi_startproc
# %bb.0:
pushq %rbx
.cfi_def_cfa_offset 16
.cfi_offset %rbx, -16
cmpq $0, __hip_gpubin_handle(%rip)
jne .LBB1_2
# %bb.1:
movl $__hip_fatbin_wrapper, %edi
callq __hipRegisterFatBinary
movq %rax, __hip_gpubin_handle(%rip)
.LBB1_2:
movq __hip_gpubin_handle(%rip), %rbx
subq $32, %rsp
.cfi_adjust_cfa_offset 32
xorps %xmm0, %xmm0
movups %xmm0, 16(%rsp)
movups %xmm0, (%rsp)
movl $_Z13ww2par_kernelPvS_S_S_S_S_, %esi
movl $.L__unnamed_1, %edx
movl $.L__unnamed_1, %ecx
movq %rbx, %rdi
movl $-1, %r8d
xorl %r9d, %r9d
callq __hipRegisterFunction
addq $32, %rsp
.cfi_adjust_cfa_offset -32
movl $blocksize_gpu, %esi
movl $.L__unnamed_2, %edx
movl $.L__unnamed_2, %ecx
movl $4, %r9d
movq %rbx, %rdi
xorl %r8d, %r8d
pushq $0
.cfi_adjust_cfa_offset 8
pushq $1
.cfi_adjust_cfa_offset 8
callq __hipRegisterVar
addq $16, %rsp
.cfi_adjust_cfa_offset -16
movl $nParticles_gpu, %esi
movl $.L__unnamed_3, %edx
movl $.L__unnamed_3, %ecx
movl $4, %r9d
movq %rbx, %rdi
xorl %r8d, %r8d
pushq $0
.cfi_adjust_cfa_offset 8
pushq $1
.cfi_adjust_cfa_offset 8
callq __hipRegisterVar
addq $16, %rsp
.cfi_adjust_cfa_offset -16
movl $nTargets_gpu, %esi
movl $.L__unnamed_4, %edx
movl $.L__unnamed_4, %ecx
movl $4, %r9d
movq %rbx, %rdi
xorl %r8d, %r8d
pushq $0
.cfi_adjust_cfa_offset 8
pushq $1
.cfi_adjust_cfa_offset 8
callq __hipRegisterVar
addq $16, %rsp
.cfi_adjust_cfa_offset -16
movl $nParticleBlocks_gpu, %esi
movl $.L__unnamed_5, %edx
movl $.L__unnamed_5, %ecx
movl $4, %r9d
movq %rbx, %rdi
xorl %r8d, %r8d
pushq $0
.cfi_adjust_cfa_offset 8
pushq $1
.cfi_adjust_cfa_offset 8
callq __hipRegisterVar
addq $16, %rsp
.cfi_adjust_cfa_offset -16
movl $nTargetBlocks_gpu, %esi
movl $.L__unnamed_6, %edx
movl $.L__unnamed_6, %ecx
movl $4, %r9d
movq %rbx, %rdi
xorl %r8d, %r8d
pushq $0
.cfi_adjust_cfa_offset 8
pushq $1
.cfi_adjust_cfa_offset 8
callq __hipRegisterVar
addq $16, %rsp
.cfi_adjust_cfa_offset -16
movl $ksigmasqr_gpu, %esi
movl $.L__unnamed_7, %edx
movl $.L__unnamed_7, %ecx
movl $8, %r9d
movq %rbx, %rdi
xorl %r8d, %r8d
pushq $0
.cfi_adjust_cfa_offset 8
pushq $1
.cfi_adjust_cfa_offset 8
callq __hipRegisterVar
addq $16, %rsp
.cfi_adjust_cfa_offset -16
movl $inv_pi_gpu, %esi
movl $.L__unnamed_8, %edx
movl $.L__unnamed_8, %ecx
movl $8, %r9d
movq %rbx, %rdi
xorl %r8d, %r8d
pushq $0
.cfi_adjust_cfa_offset 8
pushq $1
.cfi_adjust_cfa_offset 8
callq __hipRegisterVar
addq $16, %rsp
.cfi_adjust_cfa_offset -16
movl $myeps_gpu, %esi
movl $.L__unnamed_9, %edx
movl $.L__unnamed_9, %ecx
movl $8, %r9d
movq %rbx, %rdi
xorl %r8d, %r8d
pushq $0
.cfi_adjust_cfa_offset 8
pushq $1
.cfi_adjust_cfa_offset 8
callq __hipRegisterVar
addq $16, %rsp
.cfi_adjust_cfa_offset -16
movl $__hip_module_dtor, %edi
popq %rbx
.cfi_def_cfa_offset 8
jmp atexit # TAILCALL
.Lfunc_end1:
.size __hip_module_ctor, .Lfunc_end1-__hip_module_ctor
.cfi_endproc
# -- End function
.p2align 4, 0x90 # -- Begin function __hip_module_dtor
.type __hip_module_dtor,@function
__hip_module_dtor: # @__hip_module_dtor
.cfi_startproc
# %bb.0:
movq __hip_gpubin_handle(%rip), %rdi
testq %rdi, %rdi
je .LBB2_2
# %bb.1:
pushq %rax
.cfi_def_cfa_offset 16
callq __hipUnregisterFatBinary
movq $0, __hip_gpubin_handle(%rip)
addq $8, %rsp
.cfi_def_cfa_offset 8
.LBB2_2:
retq
.Lfunc_end2:
.size __hip_module_dtor, .Lfunc_end2-__hip_module_dtor
.cfi_endproc
# -- End function
.type blocksize_gpu,@object # @blocksize_gpu
.local blocksize_gpu
.comm blocksize_gpu,4,4
.type nParticles_gpu,@object # @nParticles_gpu
.local nParticles_gpu
.comm nParticles_gpu,4,4
.type nTargets_gpu,@object # @nTargets_gpu
.local nTargets_gpu
.comm nTargets_gpu,4,4
.type nParticleBlocks_gpu,@object # @nParticleBlocks_gpu
.local nParticleBlocks_gpu
.comm nParticleBlocks_gpu,4,4
.type nTargetBlocks_gpu,@object # @nTargetBlocks_gpu
.local nTargetBlocks_gpu
.comm nTargetBlocks_gpu,4,4
.type ksigmasqr_gpu,@object # @ksigmasqr_gpu
.local ksigmasqr_gpu
.comm ksigmasqr_gpu,8,8
.type inv_pi_gpu,@object # @inv_pi_gpu
.local inv_pi_gpu
.comm inv_pi_gpu,8,8
.type myeps_gpu,@object # @myeps_gpu
.local myeps_gpu
.comm myeps_gpu,8,8
.type _Z13ww2par_kernelPvS_S_S_S_S_,@object # @_Z13ww2par_kernelPvS_S_S_S_S_
.section .rodata,"a",@progbits
.globl _Z13ww2par_kernelPvS_S_S_S_S_
.p2align 3, 0x0
_Z13ww2par_kernelPvS_S_S_S_S_:
.quad _Z28__device_stub__ww2par_kernelPvS_S_S_S_S_
.size _Z13ww2par_kernelPvS_S_S_S_S_, 8
.type .L__unnamed_1,@object # @0
.section .rodata.str1.1,"aMS",@progbits,1
.L__unnamed_1:
.asciz "_Z13ww2par_kernelPvS_S_S_S_S_"
.size .L__unnamed_1, 30
.type .L__unnamed_2,@object # @1
.L__unnamed_2:
.asciz "blocksize_gpu"
.size .L__unnamed_2, 14
.type .L__unnamed_3,@object # @2
.L__unnamed_3:
.asciz "nParticles_gpu"
.size .L__unnamed_3, 15
.type .L__unnamed_4,@object # @3
.L__unnamed_4:
.asciz "nTargets_gpu"
.size .L__unnamed_4, 13
.type .L__unnamed_5,@object # @4
.L__unnamed_5:
.asciz "nParticleBlocks_gpu"
.size .L__unnamed_5, 20
.type .L__unnamed_6,@object # @5
.L__unnamed_6:
.asciz "nTargetBlocks_gpu"
.size .L__unnamed_6, 18
.type .L__unnamed_7,@object # @6
.L__unnamed_7:
.asciz "ksigmasqr_gpu"
.size .L__unnamed_7, 14
.type .L__unnamed_8,@object # @7
.L__unnamed_8:
.asciz "inv_pi_gpu"
.size .L__unnamed_8, 11
.type .L__unnamed_9,@object # @8
.L__unnamed_9:
.asciz "myeps_gpu"
.size .L__unnamed_9, 10
.type __hip_fatbin_wrapper,@object # @__hip_fatbin_wrapper
.section .hipFatBinSegment,"a",@progbits
.p2align 3, 0x0
__hip_fatbin_wrapper:
.long 1212764230 # 0x48495046
.long 1 # 0x1
.quad __hip_fatbin
.quad 0
.size __hip_fatbin_wrapper, 24
.type __hip_gpubin_handle,@object # @__hip_gpubin_handle
.local __hip_gpubin_handle
.comm __hip_gpubin_handle,8,8
.section .init_array,"aw",@init_array
.p2align 3, 0x0
.quad __hip_module_ctor
.type __hip_cuid_,@object # @__hip_cuid_
.bss
.globl __hip_cuid_
__hip_cuid_:
.byte 0 # 0x0
.size __hip_cuid_, 1
.section ".linker-options","e",@llvm_linker_options
.ident "AMD clang version 18.0.0git (https://github.com/RadeonOpenCompute/llvm-project roc-6.3.2 25012 e5bf7e55c91490b07c49d8960fa7983d864936c4)"
.section ".note.GNU-stack","",@progbits
.addrsig
.addrsig_sym _Z28__device_stub__ww2par_kernelPvS_S_S_S_S_
.addrsig_sym __hip_module_ctor
.addrsig_sym __hip_module_dtor
.addrsig_sym blocksize_gpu
.addrsig_sym nParticles_gpu
.addrsig_sym nTargets_gpu
.addrsig_sym nParticleBlocks_gpu
.addrsig_sym nTargetBlocks_gpu
.addrsig_sym ksigmasqr_gpu
.addrsig_sym inv_pi_gpu
.addrsig_sym myeps_gpu
.addrsig_sym _Z13ww2par_kernelPvS_S_S_S_S_
.addrsig_sym __hip_fatbin
.addrsig_sym __hip_fatbin_wrapper
.addrsig_sym __hip_cuid_ |
You are a helpful coding assistant specialized in converting CUDA source code to CUDA host assembly. | #include <math.h>
#define ABS(x) ((x) > 0 ? (x) : - (x))
#define MAX(a, b) ((a) > (b) ? (a) : (b))
__global__ void kernel_projection(float *proj, float *img, float angle, float SO, float SD, float da, int na, float ai, float db, int nb, float bi, int nx, int ny, int nz){
int ia = 16 * blockIdx.x + threadIdx.x;
int ib = 16 * blockIdx.y + threadIdx.y;
if (ia >= na || ib >= nb)
return;
int id = ia + ib * na;
proj[id] = 0.0f;
float x1, y1, z1, x2, y2, z2, x20, y20, cphi, sphi;
cphi = (float)cosf(angle);
sphi = (float)sinf(angle);
x1 = -SO * cphi;
y1 = -SO * sphi;
z1 = 0.0f;
x20 = SD - SO;
y20 = (ia + ai) * da; // locate the detector cell center before any rotation
x2 = x20 * cphi - y20 * sphi;
y2 = x20 * sphi + y20 * cphi;
z2 = (ib + bi) * db;
float x21, y21, z21; // offset between source and detector center
x21 = x2 - x1;
y21 = y2 - y1;
z21 = z2 - z1;
// y - z plane, where ABS(x21) > ABS(y21)
if (ABS(x21) > ABS(y21)){
// if (ABS(cphi) > ABS(sphi)){
float yi1, yi2, ky1, ky2, zi1, zi2, kz1, kz2;
int Yi1, Yi2, Zi1, Zi2;
// for each y - z plane, we calculate and add the contribution of related pixels
for (int ix = 0; ix < nx; ix++){
// calculate y indices of intersecting voxel candidates
ky1 = (y21 - da / 2 * cphi) / (x21 + da / 2 * sphi);
yi1 = ky1 * ((float)ix + 0.5f - x1 - nx / 2) + y1 + ny / 2;
Yi1 = (int)floor(yi1); // lower boundary of related voxels at y-axis
ky2 = (y21 + da / 2 * cphi) / (x21 - da / 2 * sphi);
yi2 = ky2 * ((float)ix + 0.5f - x1 - nx / 2) + y1 + ny / 2;
Yi2 = (int)floor(yi2); // upper boundary of related voxels at y-axis
// if (Yi1 < 0)
// Yi1 = 0;
// if (Yi2 >= ny)
// Yi2 = ny - 1;
// calculate z indices of intersecting voxel candidates
kz1 = (z21 - db / 2) / x21;
zi1 = kz1 * ((float)ix + 0.5f - x1 - nx / 2) + z1 + nz / 2;
Zi1 = (int)floor(zi1); // lower boundary of related voxels at y-axis
kz2 = (z21 + db / 2) / x21;
zi2 = kz2 * ((float)ix + 0.5f - x1 - nx / 2) + z1 + nz / 2;
Zi2 = (int)floor(zi2); // upper boundary of related voxels at y-axis
// if (Zi1 < 0)
// Zi1 = 0;
// if (Zi2 >= nz)
// Zi2 = nz - 1;
// calculate contribution of a voxel to the projection value
int iy, iz;
float wy1, wy2, wz1, wz2;
if (ABS(yi2 - yi1) < 0.01f)
continue;
if (ABS(zi2 - zi1) < 0.01f)
continue;
wy1 = (MAX(Yi1, Yi2) - yi1) / (yi2 - yi1); wy2 = 1 - wy1;
wz1 = (MAX(Zi1, Zi2) - zi1) / (zi2 - zi1); wz2 = 1 - wz1;
// Yi1 == Yi2 && Zi1 == Zi2
if (Yi1 == Yi2 && Zi1 == Zi2)
{
iy = Yi1; iz = Zi1;
if (iy < ny && iy >= 0 && iz < nz && iz >= 0)
proj[id] += img[ix + iy * nx + iz * nx * ny] * 1.0f;
continue;
}
// Yi1 != Yi2 && Zi1 == Zi2
if (Yi1 != Yi2 && Zi1 == Zi2)
{
iy = Yi1; iz = Zi1;
if (iy < ny && iy >= 0 && iz < nz && iz >= 0)
proj[id] += img[ix + iy * nx + iz * nx * ny] * wy1;
iy = Yi2; iz = Zi1;
if (iy < ny && iy >= 0 && iz < nz && iz >= 0)
proj[id] += img[ix + iy * nx + iz * nx * ny] * wy2;
continue;
}
// Yi1 == Yi2 && Zi1 != Zi2
if (Yi1 == Yi2 && Zi1 != Zi2)
{
iy = Yi1; iz = Zi1;
if (iy < ny && iy >= 0 && iz < nz && iz >= 0)
proj[id] += img[ix + iy * nx + iz * nx * ny] * wz1;
iy = Yi1; iz = Zi2;
if (iy < ny && iy >= 0 && iz < nz && iz >= 0)
proj[id] += img[ix + iy * nx + iz * nx * ny] * wz2;
continue;
}
// Yi1 != Yi2 && Zi1 != Zi2
if (Yi1 != Yi2 && Zi1 != Zi2)
{
iy = Yi1; iz = Zi1;
if (iy < ny && iy >= 0 && iz < nz && iz >= 0)
proj[id] += img[ix + iy * nx + iz * nx * ny] * wy1 * wz1;
iy = Yi1; iz = Zi2;
if (iy < ny && iy >= 0 && iz < nz && iz >= 0)
proj[id] += img[ix + iy * nx + iz * nx * ny] * wy1 * wz2;
iy = Yi2; iz = Zi1;
if (iy < ny && iy >= 0 && iz < nz && iz >= 0)
proj[id] += img[ix + iy * nx + iz * nx * ny] * wy2 * wz1;
iy = Yi2; iz = Zi2;
if (iy < ny && iy >= 0 && iz < nz && iz >= 0)
proj[id] += img[ix + iy * nx + iz * nx * ny] * wy2 * wz2;
continue;
}
}
}
// x - z plane, where ABS(x21) <= ABS(y21)
else{
float xi1, xi2, kx1, kx2, zi1, zi2, kz1, kz2;
int Xi1, Xi2, Zi1, Zi2;
// for each y - z plane, we calculate and add the contribution of related pixels
for (int iy = 0; iy < ny; iy++){
// calculate y indices of intersecting voxel candidates
kx1 = (x21 - da / 2 * sphi) / (y21 + da / 2 * cphi);
xi1 = kx1 * ((float)iy + 0.5f - y1 - ny / 2) + x1 + nx / 2;
Xi1 = (int)floor(xi1); // lower boundary of related voxels at y-axis
kx2 = (x21 + da / 2 * sphi) / (y21 - da / 2 * cphi);
xi2 = kx2 * ((float)iy + 0.5f - y1 - ny / 2) + x1 + nx / 2;
Xi2 = (int)floor(xi2); // upper boundary of related voxels at y-axis
// if (Xi1 < 0)
// Xi1 = 0;
// if (Xi2 >= ny)
// Xi2 = ny - 1;
// calculate z indices of intersecting voxel candidates
kz1 = (z21 - db / 2) / y21;
zi1 = kz1 * ((float)iy + 0.5f - y1 - ny / 2) + z1 + nz / 2;
Zi1 = (int)floor(zi1); // lower boundary of related voxels at y-axis
kz2 = (z21 + db / 2) / y21;
zi2 = kz2 * ((float)iy + 0.5f - y1 - ny / 2) + z1 + nz / 2;
Zi2 = (int)floor(zi2); // upper boundary of related voxels at y-axis
// if (Zi1 < 0)
// Zi1 = 0;
// if (Zi2 >= nz)
// Zi2 = nz - 1;
// calculate contribution of a voxel to the projection value
int ix, iz;
float wx1, wx2, wz1, wz2;
if (ABS(xi2 - xi1) < 0.01f)
continue;
if (ABS(zi2 - zi1) < 0.01f)
continue;
wx1 = (MAX(Xi1, Xi2) - xi1) / (xi2 - xi1); wx2 = 1 - wx1;
wz1 = (MAX(Zi1, Zi2) - zi1) / (zi2 - zi1); wz2 = 1 - wz1;
// Xi1 == Xi2 && Zi1 == Zi2
if (Xi1 == Xi2 && Zi1 == Zi2)
{
ix = Xi1; iz = Zi1;
if (ix < nx && ix >= 0 && iz < nz && iz >= 0)
proj[id] += img[ix + iy * nx + iz * nx * ny] * 1.0f;
continue;
}
// Xi1 != Xi2 && Zi1 == Zi2
if (Xi1 != Xi2 && Zi1 == Zi2)
{
ix = Xi1; iz = Zi1;
if (ix < nx && ix >= 0 && iz < nz && iz >= 0)
proj[id] += img[ix + iy * nx + iz * nx * ny] * wx1;
ix = Xi2; iz = Zi1;
if (ix < nx && ix >= 0 && iz < nz && iz >= 0)
proj[id] += img[ix + iy * nx + iz * nx * ny] * wx2;
continue;
}
// Xi1 == Xi2 && Zi1 != Zi2
if (Xi1 == Xi2 && Zi1 != Zi2)
{
ix = Xi1; iz = Zi1;
if (ix < nx && ix >= 0 && iz < nz && iz >= 0)
proj[id] += img[ix + iy * nx + iz * nx * ny] * wz1;
ix = Xi1; iz = Zi2;
if (ix < nx && ix >= 0 && iz < nz && iz >= 0)
proj[id] += img[ix + iy * nx + iz * nx * ny] * wz2;
continue;
}
// Xi1 != Xi2 && Zi1 != Zi2
if (Xi1 != Xi2 && Zi1 != Zi2)
{
ix = Xi1; iz = Zi1;
if (ix < nx && ix >= 0 && iz < nz && iz >= 0)
proj[id] += img[ix + iy * nx + iz * nx * ny] * wx1 * wz1;
ix = Xi1; iz = Zi2;
if (ix < nx && ix >= 0 && iz < nz && iz >= 0)
proj[id] += img[ix + iy * nx + iz * nx * ny] * wx1 * wz2;
ix = Xi2; iz = Zi1;
if (ix < nx && ix >= 0 && iz < nz && iz >= 0)
proj[id] += img[ix + iy * nx + iz * nx * ny] * wx2 * wz1;
ix = Xi2; iz = Zi2;
if (ix < nx && ix >= 0 && iz < nz && iz >= 0)
proj[id] += img[ix + iy * nx + iz * nx * ny] * wx2 * wz2;
continue;
}
}
}
} | .file "tmpxft_00003f4d_00000000-6_kernel_projection.1.cudafe1.cpp"
.text
#APP
#NO_APP
.type _ZL26__cudaUnregisterBinaryUtilv, @function
_ZL26__cudaUnregisterBinaryUtilv:
.LFB2029:
.cfi_startproc
endbr64
subq $8, %rsp
.cfi_def_cfa_offset 16
movq _ZL20__cudaFatCubinHandle(%rip), %rdi
call __cudaUnregisterFatBinary@PLT
addq $8, %rsp
.cfi_def_cfa_offset 8
ret
.cfi_endproc
.LFE2029:
.size _ZL26__cudaUnregisterBinaryUtilv, .-_ZL26__cudaUnregisterBinaryUtilv
.globl _Z51__device_stub__Z17kernel_projectionPfS_ffffiffifiiiPfS_ffffiffifiii
.type _Z51__device_stub__Z17kernel_projectionPfS_ffffiffifiiiPfS_ffffiffifiii, @function
_Z51__device_stub__Z17kernel_projectionPfS_ffffiffifiiiPfS_ffffiffifiii:
.LFB2051:
.cfi_startproc
endbr64
subq $264, %rsp
.cfi_def_cfa_offset 272
movq %rdi, 56(%rsp)
movq %rsi, 48(%rsp)
movss %xmm0, 44(%rsp)
movss %xmm1, 40(%rsp)
movss %xmm2, 36(%rsp)
movss %xmm3, 32(%rsp)
movl %edx, 28(%rsp)
movss %xmm4, 24(%rsp)
movss %xmm5, 20(%rsp)
movl %ecx, 16(%rsp)
movss %xmm6, 12(%rsp)
movl %r8d, 8(%rsp)
movl %r9d, 4(%rsp)
movq %fs:40, %rax
movq %rax, 248(%rsp)
xorl %eax, %eax
leaq 56(%rsp), %rax
movq %rax, 128(%rsp)
leaq 48(%rsp), %rax
movq %rax, 136(%rsp)
leaq 44(%rsp), %rax
movq %rax, 144(%rsp)
leaq 40(%rsp), %rax
movq %rax, 152(%rsp)
leaq 36(%rsp), %rax
movq %rax, 160(%rsp)
leaq 32(%rsp), %rax
movq %rax, 168(%rsp)
leaq 28(%rsp), %rax
movq %rax, 176(%rsp)
leaq 24(%rsp), %rax
movq %rax, 184(%rsp)
leaq 20(%rsp), %rax
movq %rax, 192(%rsp)
leaq 16(%rsp), %rax
movq %rax, 200(%rsp)
leaq 12(%rsp), %rax
movq %rax, 208(%rsp)
leaq 8(%rsp), %rax
movq %rax, 216(%rsp)
leaq 4(%rsp), %rax
movq %rax, 224(%rsp)
leaq 272(%rsp), %rax
movq %rax, 232(%rsp)
movl $1, 80(%rsp)
movl $1, 84(%rsp)
movl $1, 88(%rsp)
movl $1, 92(%rsp)
movl $1, 96(%rsp)
movl $1, 100(%rsp)
leaq 72(%rsp), %rcx
leaq 64(%rsp), %rdx
leaq 92(%rsp), %rsi
leaq 80(%rsp), %rdi
call __cudaPopCallConfiguration@PLT
testl %eax, %eax
je .L7
.L3:
movq 248(%rsp), %rax
subq %fs:40, %rax
jne .L8
addq $264, %rsp
.cfi_remember_state
.cfi_def_cfa_offset 8
ret
.L7:
.cfi_restore_state
pushq 72(%rsp)
.cfi_def_cfa_offset 280
pushq 72(%rsp)
.cfi_def_cfa_offset 288
leaq 144(%rsp), %r9
movq 108(%rsp), %rcx
movl 116(%rsp), %r8d
movq 96(%rsp), %rsi
movl 104(%rsp), %edx
leaq _Z17kernel_projectionPfS_ffffiffifiii(%rip), %rdi
call cudaLaunchKernel@PLT
addq $16, %rsp
.cfi_def_cfa_offset 272
jmp .L3
.L8:
call __stack_chk_fail@PLT
.cfi_endproc
.LFE2051:
.size _Z51__device_stub__Z17kernel_projectionPfS_ffffiffifiiiPfS_ffffiffifiii, .-_Z51__device_stub__Z17kernel_projectionPfS_ffffiffifiiiPfS_ffffiffifiii
.globl _Z17kernel_projectionPfS_ffffiffifiii
.type _Z17kernel_projectionPfS_ffffiffifiii, @function
_Z17kernel_projectionPfS_ffffiffifiii:
.LFB2052:
.cfi_startproc
endbr64
subq $16, %rsp
.cfi_def_cfa_offset 24
movl 24(%rsp), %eax
pushq %rax
.cfi_def_cfa_offset 32
call _Z51__device_stub__Z17kernel_projectionPfS_ffffiffifiiiPfS_ffffiffifiii
addq $24, %rsp
.cfi_def_cfa_offset 8
ret
.cfi_endproc
.LFE2052:
.size _Z17kernel_projectionPfS_ffffiffifiii, .-_Z17kernel_projectionPfS_ffffiffifiii
.section .rodata.str1.8,"aMS",@progbits,1
.align 8
.LC0:
.string "_Z17kernel_projectionPfS_ffffiffifiii"
.text
.type _ZL24__sti____cudaRegisterAllv, @function
_ZL24__sti____cudaRegisterAllv:
.LFB2054:
.cfi_startproc
endbr64
subq $8, %rsp
.cfi_def_cfa_offset 16
leaq _ZL15__fatDeviceText(%rip), %rdi
call __cudaRegisterFatBinary@PLT
movq %rax, %rdi
movq %rax, _ZL20__cudaFatCubinHandle(%rip)
pushq $0
.cfi_def_cfa_offset 24
pushq $0
.cfi_def_cfa_offset 32
pushq $0
.cfi_def_cfa_offset 40
pushq $0
.cfi_def_cfa_offset 48
movl $0, %r9d
movl $-1, %r8d
leaq .LC0(%rip), %rdx
movq %rdx, %rcx
leaq _Z17kernel_projectionPfS_ffffiffifiii(%rip), %rsi
call __cudaRegisterFunction@PLT
addq $32, %rsp
.cfi_def_cfa_offset 16
movq _ZL20__cudaFatCubinHandle(%rip), %rdi
call __cudaRegisterFatBinaryEnd@PLT
leaq _ZL26__cudaUnregisterBinaryUtilv(%rip), %rdi
call atexit@PLT
addq $8, %rsp
.cfi_def_cfa_offset 8
ret
.cfi_endproc
.LFE2054:
.size _ZL24__sti____cudaRegisterAllv, .-_ZL24__sti____cudaRegisterAllv
.section .init_array,"aw"
.align 8
.quad _ZL24__sti____cudaRegisterAllv
.section .nvFatBinSegment,"aw"
.align 8
.type _ZL15__fatDeviceText, @object
.size _ZL15__fatDeviceText, 24
_ZL15__fatDeviceText:
.long 1180844977
.long 1
.quad fatbinData
.quad 0
.local _ZL20__cudaFatCubinHandle
.comm _ZL20__cudaFatCubinHandle,8,8
.ident "GCC: (Ubuntu 13.3.0-6ubuntu2~24.04) 13.3.0"
.section .note.GNU-stack,"",@progbits
.section .note.gnu.property,"a"
.align 8
.long 1f - 0f
.long 4f - 1f
.long 5
0:
.string "GNU"
1:
.align 8
.long 0xc0000002
.long 3f - 2f
2:
.long 0x3
3:
.align 8
4: |
You are a helpful coding assistant specialized in converting CUDA source code to HIP/AMD source code. | #include <math.h>
#define ABS(x) ((x) > 0 ? (x) : - (x))
#define MAX(a, b) ((a) > (b) ? (a) : (b))
__global__ void kernel_projection(float *proj, float *img, float angle, float SO, float SD, float da, int na, float ai, float db, int nb, float bi, int nx, int ny, int nz){
int ia = 16 * blockIdx.x + threadIdx.x;
int ib = 16 * blockIdx.y + threadIdx.y;
if (ia >= na || ib >= nb)
return;
int id = ia + ib * na;
proj[id] = 0.0f;
float x1, y1, z1, x2, y2, z2, x20, y20, cphi, sphi;
cphi = (float)cosf(angle);
sphi = (float)sinf(angle);
x1 = -SO * cphi;
y1 = -SO * sphi;
z1 = 0.0f;
x20 = SD - SO;
y20 = (ia + ai) * da; // locate the detector cell center before any rotation
x2 = x20 * cphi - y20 * sphi;
y2 = x20 * sphi + y20 * cphi;
z2 = (ib + bi) * db;
float x21, y21, z21; // offset between source and detector center
x21 = x2 - x1;
y21 = y2 - y1;
z21 = z2 - z1;
// y - z plane, where ABS(x21) > ABS(y21)
if (ABS(x21) > ABS(y21)){
// if (ABS(cphi) > ABS(sphi)){
float yi1, yi2, ky1, ky2, zi1, zi2, kz1, kz2;
int Yi1, Yi2, Zi1, Zi2;
// for each y - z plane, we calculate and add the contribution of related pixels
for (int ix = 0; ix < nx; ix++){
// calculate y indices of intersecting voxel candidates
ky1 = (y21 - da / 2 * cphi) / (x21 + da / 2 * sphi);
yi1 = ky1 * ((float)ix + 0.5f - x1 - nx / 2) + y1 + ny / 2;
Yi1 = (int)floor(yi1); // lower boundary of related voxels at y-axis
ky2 = (y21 + da / 2 * cphi) / (x21 - da / 2 * sphi);
yi2 = ky2 * ((float)ix + 0.5f - x1 - nx / 2) + y1 + ny / 2;
Yi2 = (int)floor(yi2); // upper boundary of related voxels at y-axis
// if (Yi1 < 0)
// Yi1 = 0;
// if (Yi2 >= ny)
// Yi2 = ny - 1;
// calculate z indices of intersecting voxel candidates
kz1 = (z21 - db / 2) / x21;
zi1 = kz1 * ((float)ix + 0.5f - x1 - nx / 2) + z1 + nz / 2;
Zi1 = (int)floor(zi1); // lower boundary of related voxels at y-axis
kz2 = (z21 + db / 2) / x21;
zi2 = kz2 * ((float)ix + 0.5f - x1 - nx / 2) + z1 + nz / 2;
Zi2 = (int)floor(zi2); // upper boundary of related voxels at y-axis
// if (Zi1 < 0)
// Zi1 = 0;
// if (Zi2 >= nz)
// Zi2 = nz - 1;
// calculate contribution of a voxel to the projection value
int iy, iz;
float wy1, wy2, wz1, wz2;
if (ABS(yi2 - yi1) < 0.01f)
continue;
if (ABS(zi2 - zi1) < 0.01f)
continue;
wy1 = (MAX(Yi1, Yi2) - yi1) / (yi2 - yi1); wy2 = 1 - wy1;
wz1 = (MAX(Zi1, Zi2) - zi1) / (zi2 - zi1); wz2 = 1 - wz1;
// Yi1 == Yi2 && Zi1 == Zi2
if (Yi1 == Yi2 && Zi1 == Zi2)
{
iy = Yi1; iz = Zi1;
if (iy < ny && iy >= 0 && iz < nz && iz >= 0)
proj[id] += img[ix + iy * nx + iz * nx * ny] * 1.0f;
continue;
}
// Yi1 != Yi2 && Zi1 == Zi2
if (Yi1 != Yi2 && Zi1 == Zi2)
{
iy = Yi1; iz = Zi1;
if (iy < ny && iy >= 0 && iz < nz && iz >= 0)
proj[id] += img[ix + iy * nx + iz * nx * ny] * wy1;
iy = Yi2; iz = Zi1;
if (iy < ny && iy >= 0 && iz < nz && iz >= 0)
proj[id] += img[ix + iy * nx + iz * nx * ny] * wy2;
continue;
}
// Yi1 == Yi2 && Zi1 != Zi2
if (Yi1 == Yi2 && Zi1 != Zi2)
{
iy = Yi1; iz = Zi1;
if (iy < ny && iy >= 0 && iz < nz && iz >= 0)
proj[id] += img[ix + iy * nx + iz * nx * ny] * wz1;
iy = Yi1; iz = Zi2;
if (iy < ny && iy >= 0 && iz < nz && iz >= 0)
proj[id] += img[ix + iy * nx + iz * nx * ny] * wz2;
continue;
}
// Yi1 != Yi2 && Zi1 != Zi2
if (Yi1 != Yi2 && Zi1 != Zi2)
{
iy = Yi1; iz = Zi1;
if (iy < ny && iy >= 0 && iz < nz && iz >= 0)
proj[id] += img[ix + iy * nx + iz * nx * ny] * wy1 * wz1;
iy = Yi1; iz = Zi2;
if (iy < ny && iy >= 0 && iz < nz && iz >= 0)
proj[id] += img[ix + iy * nx + iz * nx * ny] * wy1 * wz2;
iy = Yi2; iz = Zi1;
if (iy < ny && iy >= 0 && iz < nz && iz >= 0)
proj[id] += img[ix + iy * nx + iz * nx * ny] * wy2 * wz1;
iy = Yi2; iz = Zi2;
if (iy < ny && iy >= 0 && iz < nz && iz >= 0)
proj[id] += img[ix + iy * nx + iz * nx * ny] * wy2 * wz2;
continue;
}
}
}
// x - z plane, where ABS(x21) <= ABS(y21)
else{
float xi1, xi2, kx1, kx2, zi1, zi2, kz1, kz2;
int Xi1, Xi2, Zi1, Zi2;
// for each y - z plane, we calculate and add the contribution of related pixels
for (int iy = 0; iy < ny; iy++){
// calculate y indices of intersecting voxel candidates
kx1 = (x21 - da / 2 * sphi) / (y21 + da / 2 * cphi);
xi1 = kx1 * ((float)iy + 0.5f - y1 - ny / 2) + x1 + nx / 2;
Xi1 = (int)floor(xi1); // lower boundary of related voxels at y-axis
kx2 = (x21 + da / 2 * sphi) / (y21 - da / 2 * cphi);
xi2 = kx2 * ((float)iy + 0.5f - y1 - ny / 2) + x1 + nx / 2;
Xi2 = (int)floor(xi2); // upper boundary of related voxels at y-axis
// if (Xi1 < 0)
// Xi1 = 0;
// if (Xi2 >= ny)
// Xi2 = ny - 1;
// calculate z indices of intersecting voxel candidates
kz1 = (z21 - db / 2) / y21;
zi1 = kz1 * ((float)iy + 0.5f - y1 - ny / 2) + z1 + nz / 2;
Zi1 = (int)floor(zi1); // lower boundary of related voxels at y-axis
kz2 = (z21 + db / 2) / y21;
zi2 = kz2 * ((float)iy + 0.5f - y1 - ny / 2) + z1 + nz / 2;
Zi2 = (int)floor(zi2); // upper boundary of related voxels at y-axis
// if (Zi1 < 0)
// Zi1 = 0;
// if (Zi2 >= nz)
// Zi2 = nz - 1;
// calculate contribution of a voxel to the projection value
int ix, iz;
float wx1, wx2, wz1, wz2;
if (ABS(xi2 - xi1) < 0.01f)
continue;
if (ABS(zi2 - zi1) < 0.01f)
continue;
wx1 = (MAX(Xi1, Xi2) - xi1) / (xi2 - xi1); wx2 = 1 - wx1;
wz1 = (MAX(Zi1, Zi2) - zi1) / (zi2 - zi1); wz2 = 1 - wz1;
// Xi1 == Xi2 && Zi1 == Zi2
if (Xi1 == Xi2 && Zi1 == Zi2)
{
ix = Xi1; iz = Zi1;
if (ix < nx && ix >= 0 && iz < nz && iz >= 0)
proj[id] += img[ix + iy * nx + iz * nx * ny] * 1.0f;
continue;
}
// Xi1 != Xi2 && Zi1 == Zi2
if (Xi1 != Xi2 && Zi1 == Zi2)
{
ix = Xi1; iz = Zi1;
if (ix < nx && ix >= 0 && iz < nz && iz >= 0)
proj[id] += img[ix + iy * nx + iz * nx * ny] * wx1;
ix = Xi2; iz = Zi1;
if (ix < nx && ix >= 0 && iz < nz && iz >= 0)
proj[id] += img[ix + iy * nx + iz * nx * ny] * wx2;
continue;
}
// Xi1 == Xi2 && Zi1 != Zi2
if (Xi1 == Xi2 && Zi1 != Zi2)
{
ix = Xi1; iz = Zi1;
if (ix < nx && ix >= 0 && iz < nz && iz >= 0)
proj[id] += img[ix + iy * nx + iz * nx * ny] * wz1;
ix = Xi1; iz = Zi2;
if (ix < nx && ix >= 0 && iz < nz && iz >= 0)
proj[id] += img[ix + iy * nx + iz * nx * ny] * wz2;
continue;
}
// Xi1 != Xi2 && Zi1 != Zi2
if (Xi1 != Xi2 && Zi1 != Zi2)
{
ix = Xi1; iz = Zi1;
if (ix < nx && ix >= 0 && iz < nz && iz >= 0)
proj[id] += img[ix + iy * nx + iz * nx * ny] * wx1 * wz1;
ix = Xi1; iz = Zi2;
if (ix < nx && ix >= 0 && iz < nz && iz >= 0)
proj[id] += img[ix + iy * nx + iz * nx * ny] * wx1 * wz2;
ix = Xi2; iz = Zi1;
if (ix < nx && ix >= 0 && iz < nz && iz >= 0)
proj[id] += img[ix + iy * nx + iz * nx * ny] * wx2 * wz1;
ix = Xi2; iz = Zi2;
if (ix < nx && ix >= 0 && iz < nz && iz >= 0)
proj[id] += img[ix + iy * nx + iz * nx * ny] * wx2 * wz2;
continue;
}
}
}
} | #include <hip/hip_runtime.h>
#include <math.h>
#define ABS(x) ((x) > 0 ? (x) : - (x))
#define MAX(a, b) ((a) > (b) ? (a) : (b))
__global__ void kernel_projection(float *proj, float *img, float angle, float SO, float SD, float da, int na, float ai, float db, int nb, float bi, int nx, int ny, int nz){
int ia = 16 * blockIdx.x + threadIdx.x;
int ib = 16 * blockIdx.y + threadIdx.y;
if (ia >= na || ib >= nb)
return;
int id = ia + ib * na;
proj[id] = 0.0f;
float x1, y1, z1, x2, y2, z2, x20, y20, cphi, sphi;
cphi = (float)cosf(angle);
sphi = (float)sinf(angle);
x1 = -SO * cphi;
y1 = -SO * sphi;
z1 = 0.0f;
x20 = SD - SO;
y20 = (ia + ai) * da; // locate the detector cell center before any rotation
x2 = x20 * cphi - y20 * sphi;
y2 = x20 * sphi + y20 * cphi;
z2 = (ib + bi) * db;
float x21, y21, z21; // offset between source and detector center
x21 = x2 - x1;
y21 = y2 - y1;
z21 = z2 - z1;
// y - z plane, where ABS(x21) > ABS(y21)
if (ABS(x21) > ABS(y21)){
// if (ABS(cphi) > ABS(sphi)){
float yi1, yi2, ky1, ky2, zi1, zi2, kz1, kz2;
int Yi1, Yi2, Zi1, Zi2;
// for each y - z plane, we calculate and add the contribution of related pixels
for (int ix = 0; ix < nx; ix++){
// calculate y indices of intersecting voxel candidates
ky1 = (y21 - da / 2 * cphi) / (x21 + da / 2 * sphi);
yi1 = ky1 * ((float)ix + 0.5f - x1 - nx / 2) + y1 + ny / 2;
Yi1 = (int)floor(yi1); // lower boundary of related voxels at y-axis
ky2 = (y21 + da / 2 * cphi) / (x21 - da / 2 * sphi);
yi2 = ky2 * ((float)ix + 0.5f - x1 - nx / 2) + y1 + ny / 2;
Yi2 = (int)floor(yi2); // upper boundary of related voxels at y-axis
// if (Yi1 < 0)
// Yi1 = 0;
// if (Yi2 >= ny)
// Yi2 = ny - 1;
// calculate z indices of intersecting voxel candidates
kz1 = (z21 - db / 2) / x21;
zi1 = kz1 * ((float)ix + 0.5f - x1 - nx / 2) + z1 + nz / 2;
Zi1 = (int)floor(zi1); // lower boundary of related voxels at y-axis
kz2 = (z21 + db / 2) / x21;
zi2 = kz2 * ((float)ix + 0.5f - x1 - nx / 2) + z1 + nz / 2;
Zi2 = (int)floor(zi2); // upper boundary of related voxels at y-axis
// if (Zi1 < 0)
// Zi1 = 0;
// if (Zi2 >= nz)
// Zi2 = nz - 1;
// calculate contribution of a voxel to the projection value
int iy, iz;
float wy1, wy2, wz1, wz2;
if (ABS(yi2 - yi1) < 0.01f)
continue;
if (ABS(zi2 - zi1) < 0.01f)
continue;
wy1 = (MAX(Yi1, Yi2) - yi1) / (yi2 - yi1); wy2 = 1 - wy1;
wz1 = (MAX(Zi1, Zi2) - zi1) / (zi2 - zi1); wz2 = 1 - wz1;
// Yi1 == Yi2 && Zi1 == Zi2
if (Yi1 == Yi2 && Zi1 == Zi2)
{
iy = Yi1; iz = Zi1;
if (iy < ny && iy >= 0 && iz < nz && iz >= 0)
proj[id] += img[ix + iy * nx + iz * nx * ny] * 1.0f;
continue;
}
// Yi1 != Yi2 && Zi1 == Zi2
if (Yi1 != Yi2 && Zi1 == Zi2)
{
iy = Yi1; iz = Zi1;
if (iy < ny && iy >= 0 && iz < nz && iz >= 0)
proj[id] += img[ix + iy * nx + iz * nx * ny] * wy1;
iy = Yi2; iz = Zi1;
if (iy < ny && iy >= 0 && iz < nz && iz >= 0)
proj[id] += img[ix + iy * nx + iz * nx * ny] * wy2;
continue;
}
// Yi1 == Yi2 && Zi1 != Zi2
if (Yi1 == Yi2 && Zi1 != Zi2)
{
iy = Yi1; iz = Zi1;
if (iy < ny && iy >= 0 && iz < nz && iz >= 0)
proj[id] += img[ix + iy * nx + iz * nx * ny] * wz1;
iy = Yi1; iz = Zi2;
if (iy < ny && iy >= 0 && iz < nz && iz >= 0)
proj[id] += img[ix + iy * nx + iz * nx * ny] * wz2;
continue;
}
// Yi1 != Yi2 && Zi1 != Zi2
if (Yi1 != Yi2 && Zi1 != Zi2)
{
iy = Yi1; iz = Zi1;
if (iy < ny && iy >= 0 && iz < nz && iz >= 0)
proj[id] += img[ix + iy * nx + iz * nx * ny] * wy1 * wz1;
iy = Yi1; iz = Zi2;
if (iy < ny && iy >= 0 && iz < nz && iz >= 0)
proj[id] += img[ix + iy * nx + iz * nx * ny] * wy1 * wz2;
iy = Yi2; iz = Zi1;
if (iy < ny && iy >= 0 && iz < nz && iz >= 0)
proj[id] += img[ix + iy * nx + iz * nx * ny] * wy2 * wz1;
iy = Yi2; iz = Zi2;
if (iy < ny && iy >= 0 && iz < nz && iz >= 0)
proj[id] += img[ix + iy * nx + iz * nx * ny] * wy2 * wz2;
continue;
}
}
}
// x - z plane, where ABS(x21) <= ABS(y21)
else{
float xi1, xi2, kx1, kx2, zi1, zi2, kz1, kz2;
int Xi1, Xi2, Zi1, Zi2;
// for each y - z plane, we calculate and add the contribution of related pixels
for (int iy = 0; iy < ny; iy++){
// calculate y indices of intersecting voxel candidates
kx1 = (x21 - da / 2 * sphi) / (y21 + da / 2 * cphi);
xi1 = kx1 * ((float)iy + 0.5f - y1 - ny / 2) + x1 + nx / 2;
Xi1 = (int)floor(xi1); // lower boundary of related voxels at y-axis
kx2 = (x21 + da / 2 * sphi) / (y21 - da / 2 * cphi);
xi2 = kx2 * ((float)iy + 0.5f - y1 - ny / 2) + x1 + nx / 2;
Xi2 = (int)floor(xi2); // upper boundary of related voxels at y-axis
// if (Xi1 < 0)
// Xi1 = 0;
// if (Xi2 >= ny)
// Xi2 = ny - 1;
// calculate z indices of intersecting voxel candidates
kz1 = (z21 - db / 2) / y21;
zi1 = kz1 * ((float)iy + 0.5f - y1 - ny / 2) + z1 + nz / 2;
Zi1 = (int)floor(zi1); // lower boundary of related voxels at y-axis
kz2 = (z21 + db / 2) / y21;
zi2 = kz2 * ((float)iy + 0.5f - y1 - ny / 2) + z1 + nz / 2;
Zi2 = (int)floor(zi2); // upper boundary of related voxels at y-axis
// if (Zi1 < 0)
// Zi1 = 0;
// if (Zi2 >= nz)
// Zi2 = nz - 1;
// calculate contribution of a voxel to the projection value
int ix, iz;
float wx1, wx2, wz1, wz2;
if (ABS(xi2 - xi1) < 0.01f)
continue;
if (ABS(zi2 - zi1) < 0.01f)
continue;
wx1 = (MAX(Xi1, Xi2) - xi1) / (xi2 - xi1); wx2 = 1 - wx1;
wz1 = (MAX(Zi1, Zi2) - zi1) / (zi2 - zi1); wz2 = 1 - wz1;
// Xi1 == Xi2 && Zi1 == Zi2
if (Xi1 == Xi2 && Zi1 == Zi2)
{
ix = Xi1; iz = Zi1;
if (ix < nx && ix >= 0 && iz < nz && iz >= 0)
proj[id] += img[ix + iy * nx + iz * nx * ny] * 1.0f;
continue;
}
// Xi1 != Xi2 && Zi1 == Zi2
if (Xi1 != Xi2 && Zi1 == Zi2)
{
ix = Xi1; iz = Zi1;
if (ix < nx && ix >= 0 && iz < nz && iz >= 0)
proj[id] += img[ix + iy * nx + iz * nx * ny] * wx1;
ix = Xi2; iz = Zi1;
if (ix < nx && ix >= 0 && iz < nz && iz >= 0)
proj[id] += img[ix + iy * nx + iz * nx * ny] * wx2;
continue;
}
// Xi1 == Xi2 && Zi1 != Zi2
if (Xi1 == Xi2 && Zi1 != Zi2)
{
ix = Xi1; iz = Zi1;
if (ix < nx && ix >= 0 && iz < nz && iz >= 0)
proj[id] += img[ix + iy * nx + iz * nx * ny] * wz1;
ix = Xi1; iz = Zi2;
if (ix < nx && ix >= 0 && iz < nz && iz >= 0)
proj[id] += img[ix + iy * nx + iz * nx * ny] * wz2;
continue;
}
// Xi1 != Xi2 && Zi1 != Zi2
if (Xi1 != Xi2 && Zi1 != Zi2)
{
ix = Xi1; iz = Zi1;
if (ix < nx && ix >= 0 && iz < nz && iz >= 0)
proj[id] += img[ix + iy * nx + iz * nx * ny] * wx1 * wz1;
ix = Xi1; iz = Zi2;
if (ix < nx && ix >= 0 && iz < nz && iz >= 0)
proj[id] += img[ix + iy * nx + iz * nx * ny] * wx1 * wz2;
ix = Xi2; iz = Zi1;
if (ix < nx && ix >= 0 && iz < nz && iz >= 0)
proj[id] += img[ix + iy * nx + iz * nx * ny] * wx2 * wz1;
ix = Xi2; iz = Zi2;
if (ix < nx && ix >= 0 && iz < nz && iz >= 0)
proj[id] += img[ix + iy * nx + iz * nx * ny] * wx2 * wz2;
continue;
}
}
}
} |
You are a helpful coding assistant specialized in converting HIP source code to AMD host assembly. | #include <hip/hip_runtime.h>
#include <math.h>
#define ABS(x) ((x) > 0 ? (x) : - (x))
#define MAX(a, b) ((a) > (b) ? (a) : (b))
__global__ void kernel_projection(float *proj, float *img, float angle, float SO, float SD, float da, int na, float ai, float db, int nb, float bi, int nx, int ny, int nz){
int ia = 16 * blockIdx.x + threadIdx.x;
int ib = 16 * blockIdx.y + threadIdx.y;
if (ia >= na || ib >= nb)
return;
int id = ia + ib * na;
proj[id] = 0.0f;
float x1, y1, z1, x2, y2, z2, x20, y20, cphi, sphi;
cphi = (float)cosf(angle);
sphi = (float)sinf(angle);
x1 = -SO * cphi;
y1 = -SO * sphi;
z1 = 0.0f;
x20 = SD - SO;
y20 = (ia + ai) * da; // locate the detector cell center before any rotation
x2 = x20 * cphi - y20 * sphi;
y2 = x20 * sphi + y20 * cphi;
z2 = (ib + bi) * db;
float x21, y21, z21; // offset between source and detector center
x21 = x2 - x1;
y21 = y2 - y1;
z21 = z2 - z1;
// y - z plane, where ABS(x21) > ABS(y21)
if (ABS(x21) > ABS(y21)){
// if (ABS(cphi) > ABS(sphi)){
float yi1, yi2, ky1, ky2, zi1, zi2, kz1, kz2;
int Yi1, Yi2, Zi1, Zi2;
// for each y - z plane, we calculate and add the contribution of related pixels
for (int ix = 0; ix < nx; ix++){
// calculate y indices of intersecting voxel candidates
ky1 = (y21 - da / 2 * cphi) / (x21 + da / 2 * sphi);
yi1 = ky1 * ((float)ix + 0.5f - x1 - nx / 2) + y1 + ny / 2;
Yi1 = (int)floor(yi1); // lower boundary of related voxels at y-axis
ky2 = (y21 + da / 2 * cphi) / (x21 - da / 2 * sphi);
yi2 = ky2 * ((float)ix + 0.5f - x1 - nx / 2) + y1 + ny / 2;
Yi2 = (int)floor(yi2); // upper boundary of related voxels at y-axis
// if (Yi1 < 0)
// Yi1 = 0;
// if (Yi2 >= ny)
// Yi2 = ny - 1;
// calculate z indices of intersecting voxel candidates
kz1 = (z21 - db / 2) / x21;
zi1 = kz1 * ((float)ix + 0.5f - x1 - nx / 2) + z1 + nz / 2;
Zi1 = (int)floor(zi1); // lower boundary of related voxels at y-axis
kz2 = (z21 + db / 2) / x21;
zi2 = kz2 * ((float)ix + 0.5f - x1 - nx / 2) + z1 + nz / 2;
Zi2 = (int)floor(zi2); // upper boundary of related voxels at y-axis
// if (Zi1 < 0)
// Zi1 = 0;
// if (Zi2 >= nz)
// Zi2 = nz - 1;
// calculate contribution of a voxel to the projection value
int iy, iz;
float wy1, wy2, wz1, wz2;
if (ABS(yi2 - yi1) < 0.01f)
continue;
if (ABS(zi2 - zi1) < 0.01f)
continue;
wy1 = (MAX(Yi1, Yi2) - yi1) / (yi2 - yi1); wy2 = 1 - wy1;
wz1 = (MAX(Zi1, Zi2) - zi1) / (zi2 - zi1); wz2 = 1 - wz1;
// Yi1 == Yi2 && Zi1 == Zi2
if (Yi1 == Yi2 && Zi1 == Zi2)
{
iy = Yi1; iz = Zi1;
if (iy < ny && iy >= 0 && iz < nz && iz >= 0)
proj[id] += img[ix + iy * nx + iz * nx * ny] * 1.0f;
continue;
}
// Yi1 != Yi2 && Zi1 == Zi2
if (Yi1 != Yi2 && Zi1 == Zi2)
{
iy = Yi1; iz = Zi1;
if (iy < ny && iy >= 0 && iz < nz && iz >= 0)
proj[id] += img[ix + iy * nx + iz * nx * ny] * wy1;
iy = Yi2; iz = Zi1;
if (iy < ny && iy >= 0 && iz < nz && iz >= 0)
proj[id] += img[ix + iy * nx + iz * nx * ny] * wy2;
continue;
}
// Yi1 == Yi2 && Zi1 != Zi2
if (Yi1 == Yi2 && Zi1 != Zi2)
{
iy = Yi1; iz = Zi1;
if (iy < ny && iy >= 0 && iz < nz && iz >= 0)
proj[id] += img[ix + iy * nx + iz * nx * ny] * wz1;
iy = Yi1; iz = Zi2;
if (iy < ny && iy >= 0 && iz < nz && iz >= 0)
proj[id] += img[ix + iy * nx + iz * nx * ny] * wz2;
continue;
}
// Yi1 != Yi2 && Zi1 != Zi2
if (Yi1 != Yi2 && Zi1 != Zi2)
{
iy = Yi1; iz = Zi1;
if (iy < ny && iy >= 0 && iz < nz && iz >= 0)
proj[id] += img[ix + iy * nx + iz * nx * ny] * wy1 * wz1;
iy = Yi1; iz = Zi2;
if (iy < ny && iy >= 0 && iz < nz && iz >= 0)
proj[id] += img[ix + iy * nx + iz * nx * ny] * wy1 * wz2;
iy = Yi2; iz = Zi1;
if (iy < ny && iy >= 0 && iz < nz && iz >= 0)
proj[id] += img[ix + iy * nx + iz * nx * ny] * wy2 * wz1;
iy = Yi2; iz = Zi2;
if (iy < ny && iy >= 0 && iz < nz && iz >= 0)
proj[id] += img[ix + iy * nx + iz * nx * ny] * wy2 * wz2;
continue;
}
}
}
// x - z plane, where ABS(x21) <= ABS(y21)
else{
float xi1, xi2, kx1, kx2, zi1, zi2, kz1, kz2;
int Xi1, Xi2, Zi1, Zi2;
// for each y - z plane, we calculate and add the contribution of related pixels
for (int iy = 0; iy < ny; iy++){
// calculate y indices of intersecting voxel candidates
kx1 = (x21 - da / 2 * sphi) / (y21 + da / 2 * cphi);
xi1 = kx1 * ((float)iy + 0.5f - y1 - ny / 2) + x1 + nx / 2;
Xi1 = (int)floor(xi1); // lower boundary of related voxels at y-axis
kx2 = (x21 + da / 2 * sphi) / (y21 - da / 2 * cphi);
xi2 = kx2 * ((float)iy + 0.5f - y1 - ny / 2) + x1 + nx / 2;
Xi2 = (int)floor(xi2); // upper boundary of related voxels at y-axis
// if (Xi1 < 0)
// Xi1 = 0;
// if (Xi2 >= ny)
// Xi2 = ny - 1;
// calculate z indices of intersecting voxel candidates
kz1 = (z21 - db / 2) / y21;
zi1 = kz1 * ((float)iy + 0.5f - y1 - ny / 2) + z1 + nz / 2;
Zi1 = (int)floor(zi1); // lower boundary of related voxels at y-axis
kz2 = (z21 + db / 2) / y21;
zi2 = kz2 * ((float)iy + 0.5f - y1 - ny / 2) + z1 + nz / 2;
Zi2 = (int)floor(zi2); // upper boundary of related voxels at y-axis
// if (Zi1 < 0)
// Zi1 = 0;
// if (Zi2 >= nz)
// Zi2 = nz - 1;
// calculate contribution of a voxel to the projection value
int ix, iz;
float wx1, wx2, wz1, wz2;
if (ABS(xi2 - xi1) < 0.01f)
continue;
if (ABS(zi2 - zi1) < 0.01f)
continue;
wx1 = (MAX(Xi1, Xi2) - xi1) / (xi2 - xi1); wx2 = 1 - wx1;
wz1 = (MAX(Zi1, Zi2) - zi1) / (zi2 - zi1); wz2 = 1 - wz1;
// Xi1 == Xi2 && Zi1 == Zi2
if (Xi1 == Xi2 && Zi1 == Zi2)
{
ix = Xi1; iz = Zi1;
if (ix < nx && ix >= 0 && iz < nz && iz >= 0)
proj[id] += img[ix + iy * nx + iz * nx * ny] * 1.0f;
continue;
}
// Xi1 != Xi2 && Zi1 == Zi2
if (Xi1 != Xi2 && Zi1 == Zi2)
{
ix = Xi1; iz = Zi1;
if (ix < nx && ix >= 0 && iz < nz && iz >= 0)
proj[id] += img[ix + iy * nx + iz * nx * ny] * wx1;
ix = Xi2; iz = Zi1;
if (ix < nx && ix >= 0 && iz < nz && iz >= 0)
proj[id] += img[ix + iy * nx + iz * nx * ny] * wx2;
continue;
}
// Xi1 == Xi2 && Zi1 != Zi2
if (Xi1 == Xi2 && Zi1 != Zi2)
{
ix = Xi1; iz = Zi1;
if (ix < nx && ix >= 0 && iz < nz && iz >= 0)
proj[id] += img[ix + iy * nx + iz * nx * ny] * wz1;
ix = Xi1; iz = Zi2;
if (ix < nx && ix >= 0 && iz < nz && iz >= 0)
proj[id] += img[ix + iy * nx + iz * nx * ny] * wz2;
continue;
}
// Xi1 != Xi2 && Zi1 != Zi2
if (Xi1 != Xi2 && Zi1 != Zi2)
{
ix = Xi1; iz = Zi1;
if (ix < nx && ix >= 0 && iz < nz && iz >= 0)
proj[id] += img[ix + iy * nx + iz * nx * ny] * wx1 * wz1;
ix = Xi1; iz = Zi2;
if (ix < nx && ix >= 0 && iz < nz && iz >= 0)
proj[id] += img[ix + iy * nx + iz * nx * ny] * wx1 * wz2;
ix = Xi2; iz = Zi1;
if (ix < nx && ix >= 0 && iz < nz && iz >= 0)
proj[id] += img[ix + iy * nx + iz * nx * ny] * wx2 * wz1;
ix = Xi2; iz = Zi2;
if (ix < nx && ix >= 0 && iz < nz && iz >= 0)
proj[id] += img[ix + iy * nx + iz * nx * ny] * wx2 * wz2;
continue;
}
}
}
} | .text
.file "kernel_projection.1.hip"
.globl _Z32__device_stub__kernel_projectionPfS_ffffiffifiii # -- Begin function _Z32__device_stub__kernel_projectionPfS_ffffiffifiii
.p2align 4, 0x90
.type _Z32__device_stub__kernel_projectionPfS_ffffiffifiii,@function
_Z32__device_stub__kernel_projectionPfS_ffffiffifiii: # @_Z32__device_stub__kernel_projectionPfS_ffffiffifiii
.cfi_startproc
# %bb.0:
subq $232, %rsp
.cfi_def_cfa_offset 240
movq %rdi, 104(%rsp)
movq %rsi, 96(%rsp)
movss %xmm0, 44(%rsp)
movss %xmm1, 40(%rsp)
movss %xmm2, 36(%rsp)
movss %xmm3, 32(%rsp)
movl %edx, 28(%rsp)
movss %xmm4, 24(%rsp)
movss %xmm5, 20(%rsp)
movl %ecx, 16(%rsp)
movss %xmm6, 12(%rsp)
movl %r8d, 8(%rsp)
movl %r9d, 4(%rsp)
leaq 104(%rsp), %rax
movq %rax, 112(%rsp)
leaq 96(%rsp), %rax
movq %rax, 120(%rsp)
leaq 44(%rsp), %rax
movq %rax, 128(%rsp)
leaq 40(%rsp), %rax
movq %rax, 136(%rsp)
leaq 36(%rsp), %rax
movq %rax, 144(%rsp)
leaq 32(%rsp), %rax
movq %rax, 152(%rsp)
leaq 28(%rsp), %rax
movq %rax, 160(%rsp)
leaq 24(%rsp), %rax
movq %rax, 168(%rsp)
leaq 20(%rsp), %rax
movq %rax, 176(%rsp)
leaq 16(%rsp), %rax
movq %rax, 184(%rsp)
leaq 12(%rsp), %rax
movq %rax, 192(%rsp)
leaq 8(%rsp), %rax
movq %rax, 200(%rsp)
leaq 4(%rsp), %rax
movq %rax, 208(%rsp)
leaq 240(%rsp), %rax
movq %rax, 216(%rsp)
leaq 80(%rsp), %rdi
leaq 64(%rsp), %rsi
leaq 56(%rsp), %rdx
leaq 48(%rsp), %rcx
callq __hipPopCallConfiguration
movq 80(%rsp), %rsi
movl 88(%rsp), %edx
movq 64(%rsp), %rcx
movl 72(%rsp), %r8d
leaq 112(%rsp), %r9
movl $_Z17kernel_projectionPfS_ffffiffifiii, %edi
pushq 48(%rsp)
.cfi_adjust_cfa_offset 8
pushq 64(%rsp)
.cfi_adjust_cfa_offset 8
callq hipLaunchKernel
addq $248, %rsp
.cfi_adjust_cfa_offset -248
retq
.Lfunc_end0:
.size _Z32__device_stub__kernel_projectionPfS_ffffiffifiii, .Lfunc_end0-_Z32__device_stub__kernel_projectionPfS_ffffiffifiii
.cfi_endproc
# -- End function
.p2align 4, 0x90 # -- Begin function __hip_module_ctor
.type __hip_module_ctor,@function
__hip_module_ctor: # @__hip_module_ctor
.cfi_startproc
# %bb.0:
subq $40, %rsp
.cfi_def_cfa_offset 48
cmpq $0, __hip_gpubin_handle(%rip)
jne .LBB1_2
# %bb.1:
movl $__hip_fatbin_wrapper, %edi
callq __hipRegisterFatBinary
movq %rax, __hip_gpubin_handle(%rip)
.LBB1_2:
movq __hip_gpubin_handle(%rip), %rdi
xorps %xmm0, %xmm0
movups %xmm0, 16(%rsp)
movups %xmm0, (%rsp)
movl $_Z17kernel_projectionPfS_ffffiffifiii, %esi
movl $.L__unnamed_1, %edx
movl $.L__unnamed_1, %ecx
movl $-1, %r8d
xorl %r9d, %r9d
callq __hipRegisterFunction
movl $__hip_module_dtor, %edi
addq $40, %rsp
.cfi_def_cfa_offset 8
jmp atexit # TAILCALL
.Lfunc_end1:
.size __hip_module_ctor, .Lfunc_end1-__hip_module_ctor
.cfi_endproc
# -- End function
.p2align 4, 0x90 # -- Begin function __hip_module_dtor
.type __hip_module_dtor,@function
__hip_module_dtor: # @__hip_module_dtor
.cfi_startproc
# %bb.0:
movq __hip_gpubin_handle(%rip), %rdi
testq %rdi, %rdi
je .LBB2_2
# %bb.1:
pushq %rax
.cfi_def_cfa_offset 16
callq __hipUnregisterFatBinary
movq $0, __hip_gpubin_handle(%rip)
addq $8, %rsp
.cfi_def_cfa_offset 8
.LBB2_2:
retq
.Lfunc_end2:
.size __hip_module_dtor, .Lfunc_end2-__hip_module_dtor
.cfi_endproc
# -- End function
.type _Z17kernel_projectionPfS_ffffiffifiii,@object # @_Z17kernel_projectionPfS_ffffiffifiii
.section .rodata,"a",@progbits
.globl _Z17kernel_projectionPfS_ffffiffifiii
.p2align 3, 0x0
_Z17kernel_projectionPfS_ffffiffifiii:
.quad _Z32__device_stub__kernel_projectionPfS_ffffiffifiii
.size _Z17kernel_projectionPfS_ffffiffifiii, 8
.type .L__unnamed_1,@object # @0
.section .rodata.str1.1,"aMS",@progbits,1
.L__unnamed_1:
.asciz "_Z17kernel_projectionPfS_ffffiffifiii"
.size .L__unnamed_1, 38
.type __hip_fatbin_wrapper,@object # @__hip_fatbin_wrapper
.section .hipFatBinSegment,"a",@progbits
.p2align 3, 0x0
__hip_fatbin_wrapper:
.long 1212764230 # 0x48495046
.long 1 # 0x1
.quad __hip_fatbin
.quad 0
.size __hip_fatbin_wrapper, 24
.type __hip_gpubin_handle,@object # @__hip_gpubin_handle
.local __hip_gpubin_handle
.comm __hip_gpubin_handle,8,8
.section .init_array,"aw",@init_array
.p2align 3, 0x0
.quad __hip_module_ctor
.type __hip_cuid_,@object # @__hip_cuid_
.bss
.globl __hip_cuid_
__hip_cuid_:
.byte 0 # 0x0
.size __hip_cuid_, 1
.section ".linker-options","e",@llvm_linker_options
.ident "AMD clang version 18.0.0git (https://github.com/RadeonOpenCompute/llvm-project roc-6.3.2 25012 e5bf7e55c91490b07c49d8960fa7983d864936c4)"
.section ".note.GNU-stack","",@progbits
.addrsig
.addrsig_sym _Z32__device_stub__kernel_projectionPfS_ffffiffifiii
.addrsig_sym __hip_module_ctor
.addrsig_sym __hip_module_dtor
.addrsig_sym _Z17kernel_projectionPfS_ffffiffifiii
.addrsig_sym __hip_fatbin
.addrsig_sym __hip_fatbin_wrapper
.addrsig_sym __hip_cuid_ |
You are a helpful coding assistant specialized in converting from CUDA host assembly to AMD host assembly. | .file "tmpxft_00003f4d_00000000-6_kernel_projection.1.cudafe1.cpp"
.text
#APP
#NO_APP
.type _ZL26__cudaUnregisterBinaryUtilv, @function
_ZL26__cudaUnregisterBinaryUtilv:
.LFB2029:
.cfi_startproc
endbr64
subq $8, %rsp
.cfi_def_cfa_offset 16
movq _ZL20__cudaFatCubinHandle(%rip), %rdi
call __cudaUnregisterFatBinary@PLT
addq $8, %rsp
.cfi_def_cfa_offset 8
ret
.cfi_endproc
.LFE2029:
.size _ZL26__cudaUnregisterBinaryUtilv, .-_ZL26__cudaUnregisterBinaryUtilv
.globl _Z51__device_stub__Z17kernel_projectionPfS_ffffiffifiiiPfS_ffffiffifiii
.type _Z51__device_stub__Z17kernel_projectionPfS_ffffiffifiiiPfS_ffffiffifiii, @function
_Z51__device_stub__Z17kernel_projectionPfS_ffffiffifiiiPfS_ffffiffifiii:
.LFB2051:
.cfi_startproc
endbr64
subq $264, %rsp
.cfi_def_cfa_offset 272
movq %rdi, 56(%rsp)
movq %rsi, 48(%rsp)
movss %xmm0, 44(%rsp)
movss %xmm1, 40(%rsp)
movss %xmm2, 36(%rsp)
movss %xmm3, 32(%rsp)
movl %edx, 28(%rsp)
movss %xmm4, 24(%rsp)
movss %xmm5, 20(%rsp)
movl %ecx, 16(%rsp)
movss %xmm6, 12(%rsp)
movl %r8d, 8(%rsp)
movl %r9d, 4(%rsp)
movq %fs:40, %rax
movq %rax, 248(%rsp)
xorl %eax, %eax
leaq 56(%rsp), %rax
movq %rax, 128(%rsp)
leaq 48(%rsp), %rax
movq %rax, 136(%rsp)
leaq 44(%rsp), %rax
movq %rax, 144(%rsp)
leaq 40(%rsp), %rax
movq %rax, 152(%rsp)
leaq 36(%rsp), %rax
movq %rax, 160(%rsp)
leaq 32(%rsp), %rax
movq %rax, 168(%rsp)
leaq 28(%rsp), %rax
movq %rax, 176(%rsp)
leaq 24(%rsp), %rax
movq %rax, 184(%rsp)
leaq 20(%rsp), %rax
movq %rax, 192(%rsp)
leaq 16(%rsp), %rax
movq %rax, 200(%rsp)
leaq 12(%rsp), %rax
movq %rax, 208(%rsp)
leaq 8(%rsp), %rax
movq %rax, 216(%rsp)
leaq 4(%rsp), %rax
movq %rax, 224(%rsp)
leaq 272(%rsp), %rax
movq %rax, 232(%rsp)
movl $1, 80(%rsp)
movl $1, 84(%rsp)
movl $1, 88(%rsp)
movl $1, 92(%rsp)
movl $1, 96(%rsp)
movl $1, 100(%rsp)
leaq 72(%rsp), %rcx
leaq 64(%rsp), %rdx
leaq 92(%rsp), %rsi
leaq 80(%rsp), %rdi
call __cudaPopCallConfiguration@PLT
testl %eax, %eax
je .L7
.L3:
movq 248(%rsp), %rax
subq %fs:40, %rax
jne .L8
addq $264, %rsp
.cfi_remember_state
.cfi_def_cfa_offset 8
ret
.L7:
.cfi_restore_state
pushq 72(%rsp)
.cfi_def_cfa_offset 280
pushq 72(%rsp)
.cfi_def_cfa_offset 288
leaq 144(%rsp), %r9
movq 108(%rsp), %rcx
movl 116(%rsp), %r8d
movq 96(%rsp), %rsi
movl 104(%rsp), %edx
leaq _Z17kernel_projectionPfS_ffffiffifiii(%rip), %rdi
call cudaLaunchKernel@PLT
addq $16, %rsp
.cfi_def_cfa_offset 272
jmp .L3
.L8:
call __stack_chk_fail@PLT
.cfi_endproc
.LFE2051:
.size _Z51__device_stub__Z17kernel_projectionPfS_ffffiffifiiiPfS_ffffiffifiii, .-_Z51__device_stub__Z17kernel_projectionPfS_ffffiffifiiiPfS_ffffiffifiii
.globl _Z17kernel_projectionPfS_ffffiffifiii
.type _Z17kernel_projectionPfS_ffffiffifiii, @function
_Z17kernel_projectionPfS_ffffiffifiii:
.LFB2052:
.cfi_startproc
endbr64
subq $16, %rsp
.cfi_def_cfa_offset 24
movl 24(%rsp), %eax
pushq %rax
.cfi_def_cfa_offset 32
call _Z51__device_stub__Z17kernel_projectionPfS_ffffiffifiiiPfS_ffffiffifiii
addq $24, %rsp
.cfi_def_cfa_offset 8
ret
.cfi_endproc
.LFE2052:
.size _Z17kernel_projectionPfS_ffffiffifiii, .-_Z17kernel_projectionPfS_ffffiffifiii
.section .rodata.str1.8,"aMS",@progbits,1
.align 8
.LC0:
.string "_Z17kernel_projectionPfS_ffffiffifiii"
.text
.type _ZL24__sti____cudaRegisterAllv, @function
_ZL24__sti____cudaRegisterAllv:
.LFB2054:
.cfi_startproc
endbr64
subq $8, %rsp
.cfi_def_cfa_offset 16
leaq _ZL15__fatDeviceText(%rip), %rdi
call __cudaRegisterFatBinary@PLT
movq %rax, %rdi
movq %rax, _ZL20__cudaFatCubinHandle(%rip)
pushq $0
.cfi_def_cfa_offset 24
pushq $0
.cfi_def_cfa_offset 32
pushq $0
.cfi_def_cfa_offset 40
pushq $0
.cfi_def_cfa_offset 48
movl $0, %r9d
movl $-1, %r8d
leaq .LC0(%rip), %rdx
movq %rdx, %rcx
leaq _Z17kernel_projectionPfS_ffffiffifiii(%rip), %rsi
call __cudaRegisterFunction@PLT
addq $32, %rsp
.cfi_def_cfa_offset 16
movq _ZL20__cudaFatCubinHandle(%rip), %rdi
call __cudaRegisterFatBinaryEnd@PLT
leaq _ZL26__cudaUnregisterBinaryUtilv(%rip), %rdi
call atexit@PLT
addq $8, %rsp
.cfi_def_cfa_offset 8
ret
.cfi_endproc
.LFE2054:
.size _ZL24__sti____cudaRegisterAllv, .-_ZL24__sti____cudaRegisterAllv
.section .init_array,"aw"
.align 8
.quad _ZL24__sti____cudaRegisterAllv
.section .nvFatBinSegment,"aw"
.align 8
.type _ZL15__fatDeviceText, @object
.size _ZL15__fatDeviceText, 24
_ZL15__fatDeviceText:
.long 1180844977
.long 1
.quad fatbinData
.quad 0
.local _ZL20__cudaFatCubinHandle
.comm _ZL20__cudaFatCubinHandle,8,8
.ident "GCC: (Ubuntu 13.3.0-6ubuntu2~24.04) 13.3.0"
.section .note.GNU-stack,"",@progbits
.section .note.gnu.property,"a"
.align 8
.long 1f - 0f
.long 4f - 1f
.long 5
0:
.string "GNU"
1:
.align 8
.long 0xc0000002
.long 3f - 2f
2:
.long 0x3
3:
.align 8
4: | .text
.file "kernel_projection.1.hip"
.globl _Z32__device_stub__kernel_projectionPfS_ffffiffifiii # -- Begin function _Z32__device_stub__kernel_projectionPfS_ffffiffifiii
.p2align 4, 0x90
.type _Z32__device_stub__kernel_projectionPfS_ffffiffifiii,@function
_Z32__device_stub__kernel_projectionPfS_ffffiffifiii: # @_Z32__device_stub__kernel_projectionPfS_ffffiffifiii
.cfi_startproc
# %bb.0:
subq $232, %rsp
.cfi_def_cfa_offset 240
movq %rdi, 104(%rsp)
movq %rsi, 96(%rsp)
movss %xmm0, 44(%rsp)
movss %xmm1, 40(%rsp)
movss %xmm2, 36(%rsp)
movss %xmm3, 32(%rsp)
movl %edx, 28(%rsp)
movss %xmm4, 24(%rsp)
movss %xmm5, 20(%rsp)
movl %ecx, 16(%rsp)
movss %xmm6, 12(%rsp)
movl %r8d, 8(%rsp)
movl %r9d, 4(%rsp)
leaq 104(%rsp), %rax
movq %rax, 112(%rsp)
leaq 96(%rsp), %rax
movq %rax, 120(%rsp)
leaq 44(%rsp), %rax
movq %rax, 128(%rsp)
leaq 40(%rsp), %rax
movq %rax, 136(%rsp)
leaq 36(%rsp), %rax
movq %rax, 144(%rsp)
leaq 32(%rsp), %rax
movq %rax, 152(%rsp)
leaq 28(%rsp), %rax
movq %rax, 160(%rsp)
leaq 24(%rsp), %rax
movq %rax, 168(%rsp)
leaq 20(%rsp), %rax
movq %rax, 176(%rsp)
leaq 16(%rsp), %rax
movq %rax, 184(%rsp)
leaq 12(%rsp), %rax
movq %rax, 192(%rsp)
leaq 8(%rsp), %rax
movq %rax, 200(%rsp)
leaq 4(%rsp), %rax
movq %rax, 208(%rsp)
leaq 240(%rsp), %rax
movq %rax, 216(%rsp)
leaq 80(%rsp), %rdi
leaq 64(%rsp), %rsi
leaq 56(%rsp), %rdx
leaq 48(%rsp), %rcx
callq __hipPopCallConfiguration
movq 80(%rsp), %rsi
movl 88(%rsp), %edx
movq 64(%rsp), %rcx
movl 72(%rsp), %r8d
leaq 112(%rsp), %r9
movl $_Z17kernel_projectionPfS_ffffiffifiii, %edi
pushq 48(%rsp)
.cfi_adjust_cfa_offset 8
pushq 64(%rsp)
.cfi_adjust_cfa_offset 8
callq hipLaunchKernel
addq $248, %rsp
.cfi_adjust_cfa_offset -248
retq
.Lfunc_end0:
.size _Z32__device_stub__kernel_projectionPfS_ffffiffifiii, .Lfunc_end0-_Z32__device_stub__kernel_projectionPfS_ffffiffifiii
.cfi_endproc
# -- End function
.p2align 4, 0x90 # -- Begin function __hip_module_ctor
.type __hip_module_ctor,@function
__hip_module_ctor: # @__hip_module_ctor
.cfi_startproc
# %bb.0:
subq $40, %rsp
.cfi_def_cfa_offset 48
cmpq $0, __hip_gpubin_handle(%rip)
jne .LBB1_2
# %bb.1:
movl $__hip_fatbin_wrapper, %edi
callq __hipRegisterFatBinary
movq %rax, __hip_gpubin_handle(%rip)
.LBB1_2:
movq __hip_gpubin_handle(%rip), %rdi
xorps %xmm0, %xmm0
movups %xmm0, 16(%rsp)
movups %xmm0, (%rsp)
movl $_Z17kernel_projectionPfS_ffffiffifiii, %esi
movl $.L__unnamed_1, %edx
movl $.L__unnamed_1, %ecx
movl $-1, %r8d
xorl %r9d, %r9d
callq __hipRegisterFunction
movl $__hip_module_dtor, %edi
addq $40, %rsp
.cfi_def_cfa_offset 8
jmp atexit # TAILCALL
.Lfunc_end1:
.size __hip_module_ctor, .Lfunc_end1-__hip_module_ctor
.cfi_endproc
# -- End function
.p2align 4, 0x90 # -- Begin function __hip_module_dtor
.type __hip_module_dtor,@function
__hip_module_dtor: # @__hip_module_dtor
.cfi_startproc
# %bb.0:
movq __hip_gpubin_handle(%rip), %rdi
testq %rdi, %rdi
je .LBB2_2
# %bb.1:
pushq %rax
.cfi_def_cfa_offset 16
callq __hipUnregisterFatBinary
movq $0, __hip_gpubin_handle(%rip)
addq $8, %rsp
.cfi_def_cfa_offset 8
.LBB2_2:
retq
.Lfunc_end2:
.size __hip_module_dtor, .Lfunc_end2-__hip_module_dtor
.cfi_endproc
# -- End function
.type _Z17kernel_projectionPfS_ffffiffifiii,@object # @_Z17kernel_projectionPfS_ffffiffifiii
.section .rodata,"a",@progbits
.globl _Z17kernel_projectionPfS_ffffiffifiii
.p2align 3, 0x0
_Z17kernel_projectionPfS_ffffiffifiii:
.quad _Z32__device_stub__kernel_projectionPfS_ffffiffifiii
.size _Z17kernel_projectionPfS_ffffiffifiii, 8
.type .L__unnamed_1,@object # @0
.section .rodata.str1.1,"aMS",@progbits,1
.L__unnamed_1:
.asciz "_Z17kernel_projectionPfS_ffffiffifiii"
.size .L__unnamed_1, 38
.type __hip_fatbin_wrapper,@object # @__hip_fatbin_wrapper
.section .hipFatBinSegment,"a",@progbits
.p2align 3, 0x0
__hip_fatbin_wrapper:
.long 1212764230 # 0x48495046
.long 1 # 0x1
.quad __hip_fatbin
.quad 0
.size __hip_fatbin_wrapper, 24
.type __hip_gpubin_handle,@object # @__hip_gpubin_handle
.local __hip_gpubin_handle
.comm __hip_gpubin_handle,8,8
.section .init_array,"aw",@init_array
.p2align 3, 0x0
.quad __hip_module_ctor
.type __hip_cuid_,@object # @__hip_cuid_
.bss
.globl __hip_cuid_
__hip_cuid_:
.byte 0 # 0x0
.size __hip_cuid_, 1
.section ".linker-options","e",@llvm_linker_options
.ident "AMD clang version 18.0.0git (https://github.com/RadeonOpenCompute/llvm-project roc-6.3.2 25012 e5bf7e55c91490b07c49d8960fa7983d864936c4)"
.section ".note.GNU-stack","",@progbits
.addrsig
.addrsig_sym _Z32__device_stub__kernel_projectionPfS_ffffiffifiii
.addrsig_sym __hip_module_ctor
.addrsig_sym __hip_module_dtor
.addrsig_sym _Z17kernel_projectionPfS_ffffiffifiii
.addrsig_sym __hip_fatbin
.addrsig_sym __hip_fatbin_wrapper
.addrsig_sym __hip_cuid_ |
You are a helpful coding assistant specialized in converting CUDA source code to CUDA device assembly. | #include <stdio.h>
#include <stdlib.h>
#include <cuda.h>
__global__ void reduce(int *g_idata, int *g_odata)
{
extern __shared__ int sdata[];
unsigned int tid = threadIdx.x;
unsigned int i = blockIdx.x * blockDim.x + threadIdx.x;
sdata[tid] = g_idata[i];
__syncthreads();
for (int s = 1; s < blockDim.x; s *= 2)
{
if (tid % (2 * s) == 0)
{
sdata[tid] += sdata[tid + s];
}
__syncthreads();
}
if (tid == 0)
{
g_odata[blockIdx.x] = sdata[0];
}
}
int main(int argc, char *argv[])
{
// We assume that the element number is the power of 2 for simplification.
const int elemNum = 1 << 22;
int arraySize = elemNum * sizeof(int);
// host memory
int *h_idata;
int sum;
// device memory
int *d_idata;
int *d_odata;
// initialize input data
h_idata = (int *) malloc(arraySize);
FILE *fp;
if((fp = fopen(argv[1], "rb")) == NULL)
{
printf("Can not open input file!\n");
exit(0);
}
for (int i = 0; i < elemNum; ++i)
{
fscanf(fp, "%d", &h_idata[i]);
}
fclose(fp);
// copy input data from CPU to GPU
cudaMalloc((void **) &d_idata, arraySize);
cudaMemcpy(d_idata, h_idata, arraySize, cudaMemcpyHostToDevice);
int threadNum = 0;
int blockNum = 0;
// calculate the threadNum and blockNum for the first kernel
cudaDeviceProp deviceProperties;
cudaGetDeviceProperties(&deviceProperties, 0);
int maxThreadsPerBlock = deviceProperties.maxThreadsPerBlock; // maxThreadsPerBlock = 1024 on K20X
threadNum = (elemNum > maxThreadsPerBlock)? maxThreadsPerBlock: elemNum;
blockNum = (int) ceil((double) elemNum / threadNum); // blockNum = 4096
// the number of output elements of the first kernel is blockNum
cudaMalloc((void **) &d_odata, blockNum * sizeof(int));
// use GPU of id=0
cudaSetDevice(0);
// parameters for the first kernel
dim3 gridDim(blockNum, 1, 1);
dim3 blockDim(threadNum, 1, 1);
int sMemSize = threadNum * sizeof(int);
cudaEvent_t start, stop;
float stepTime;
float totalTime = 0;
// create event for recording GPU execution time
cudaEventCreate(&start);
cudaEventCreate(&stop);
// execute the first kernel and set the GPU timer
cudaEventRecord(start, 0);
reduce<<<gridDim, blockDim, sMemSize>>>(d_idata, d_odata);
cudaDeviceSynchronize();
cudaEventRecord(stop, 0);
cudaEventSynchronize(stop);
// calculate the execution time of the first kernel
cudaEventElapsedTime(&stepTime, start, stop);
totalTime += stepTime;
cudaEventDestroy(start);
cudaEventDestroy(stop);
// calculate the threadNum and blockNum for the next kernel
threadNum = (blockNum > maxThreadsPerBlock)? maxThreadsPerBlock: blockNum;
blockNum = (int) ceil((double) blockNum / threadNum);
while(blockNum >= 1) {
// parameters for the current kernel
dim3 gridDim(blockNum, 1, 1);
dim3 blockDim(threadNum, 1, 1);
sMemSize = threadNum * sizeof(int);
// create event for recording GPU execution time
cudaEventCreate(&start);
cudaEventCreate(&stop);
// execute the current kernel and set the GPU timer
cudaEventRecord(start, 0);
reduce<<<gridDim, blockDim, sMemSize>>>(d_odata, d_odata);
cudaDeviceSynchronize();
cudaEventRecord(stop, 0);
cudaEventSynchronize(stop);
// calculate the execution time of the current kernel
cudaEventElapsedTime(&stepTime, start, stop);
totalTime += stepTime;
cudaEventDestroy(start);
cudaEventDestroy(stop);
if (blockNum == 1) break;
// calculate the threadNum and blockNum for the next kernel
threadNum = (blockNum > maxThreadsPerBlock)? maxThreadsPerBlock: blockNum;
blockNum = (int) ceil((double) blockNum / threadNum);
}
// copy result back to CPU
cudaMemcpy(&sum, d_odata, sizeof(int), cudaMemcpyDeviceToHost);
cudaFree(d_idata);
cudaFree(d_odata);
cudaFree(d_odata);
float bandwidth = elemNum * sizeof(int) / (totalTime / 1000) / 1024 / 1024 / 1024;
printf("%d %fms %fGB/s\n", sum, totalTime, bandwidth);
return 0;
} | code for sm_80
Function : _Z6reducePiS_
.headerflags @"EF_CUDA_TEXMODE_UNIFIED EF_CUDA_64BIT_ADDRESS EF_CUDA_SM80 EF_CUDA_VIRTUAL_SM(EF_CUDA_SM80)"
/*0000*/ IMAD.MOV.U32 R1, RZ, RZ, c[0x0][0x28] ; /* 0x00000a00ff017624 */
/* 0x000fe400078e00ff */
/*0010*/ S2R R6, SR_CTAID.X ; /* 0x0000000000067919 */
/* 0x000e220000002500 */
/*0020*/ HFMA2.MMA R3, -RZ, RZ, 0, 2.384185791015625e-07 ; /* 0x00000004ff037435 */
/* 0x000fe200000001ff */
/*0030*/ ULDC.64 UR4, c[0x0][0x118] ; /* 0x0000460000047ab9 */
/* 0x000fe40000000a00 */
/*0040*/ S2R R7, SR_TID.X ; /* 0x0000000000077919 */
/* 0x000e240000002100 */
/*0050*/ IMAD R2, R6, c[0x0][0x0], R7 ; /* 0x0000000006027a24 */
/* 0x001fca00078e0207 */
/*0060*/ IMAD.WIDE.U32 R2, R2, R3, c[0x0][0x160] ; /* 0x0000580002027625 */
/* 0x000fcc00078e0003 */
/*0070*/ LDG.E R2, [R2.64] ; /* 0x0000000402027981 */
/* 0x000ea2000c1e1900 */
/*0080*/ IMAD.MOV.U32 R0, RZ, RZ, c[0x0][0x0] ; /* 0x00000000ff007624 */
/* 0x000fe200078e00ff */
/*0090*/ ISETP.NE.AND P0, PT, R7, RZ, PT ; /* 0x000000ff0700720c */
/* 0x000fc80003f05270 */
/*00a0*/ ISETP.GE.U32.AND P1, PT, R0, 0x2, PT ; /* 0x000000020000780c */
/* 0x000fe20003f26070 */
/*00b0*/ STS [R7.X4], R2 ; /* 0x0000000207007388 */
/* 0x0041e80000004800 */
/*00c0*/ BAR.SYNC.DEFER_BLOCKING 0x0 ; /* 0x0000000000007b1d */
/* 0x000ff00000010000 */
/*00d0*/ @!P1 BRA 0x2c0 ; /* 0x000001e000009947 */
/* 0x000fea0003800000 */
/*00e0*/ SHF.L.U32 R0, R7, 0x2, RZ ; /* 0x0000000207007819 */
/* 0x001fe200000006ff */
/*00f0*/ IMAD.MOV.U32 R5, RZ, RZ, 0x1 ; /* 0x00000001ff057424 */
/* 0x000fca00078e00ff */
/*0100*/ SHF.L.U32 R10, R5, 0x1, RZ ; /* 0x00000001050a7819 */
/* 0x000fc800000006ff */
/*0110*/ I2F.U32.RP R4, R10 ; /* 0x0000000a00047306 */
/* 0x000e220000209000 */
/*0120*/ IMAD.MOV R9, RZ, RZ, -R10 ; /* 0x000000ffff097224 */
/* 0x000fe200078e0a0a */
/*0130*/ ISETP.NE.U32.AND P2, PT, R10, RZ, PT ; /* 0x000000ff0a00720c */
/* 0x000fcc0003f45070 */
/*0140*/ MUFU.RCP R4, R4 ; /* 0x0000000400047308 */
/* 0x001e240000001000 */
/*0150*/ IADD3 R2, R4, 0xffffffe, RZ ; /* 0x0ffffffe04027810 */
/* 0x001fcc0007ffe0ff */
/*0160*/ F2I.FTZ.U32.TRUNC.NTZ R3, R2 ; /* 0x0000000200037305 */
/* 0x000064000021f000 */
/*0170*/ HFMA2.MMA R2, -RZ, RZ, 0, 0 ; /* 0x00000000ff027435 */
/* 0x001fe200000001ff */
/*0180*/ IMAD R9, R9, R3, RZ ; /* 0x0000000309097224 */
/* 0x002fd200078e02ff */
/*0190*/ IMAD.HI.U32 R3, R3, R9, R2 ; /* 0x0000000903037227 */
/* 0x000fcc00078e0002 */
/*01a0*/ IMAD.HI.U32 R3, R3, R7, RZ ; /* 0x0000000703037227 */
/* 0x000fc800078e00ff */
/*01b0*/ IMAD.MOV R8, RZ, RZ, -R3 ; /* 0x000000ffff087224 */
/* 0x000fc800078e0a03 */
/*01c0*/ IMAD R3, R10, R8, R7 ; /* 0x000000080a037224 */
/* 0x000fca00078e0207 */
/*01d0*/ ISETP.GE.U32.AND P1, PT, R3, R10, PT ; /* 0x0000000a0300720c */
/* 0x000fda0003f26070 */
/*01e0*/ @P1 IADD3 R3, -R10, R3, RZ ; /* 0x000000030a031210 */
/* 0x000fc80007ffe1ff */
/*01f0*/ ISETP.GE.U32.AND P1, PT, R3, R10, PT ; /* 0x0000000a0300720c */
/* 0x000fda0003f26070 */
/*0200*/ @P1 IMAD.IADD R3, R3, 0x1, -R10 ; /* 0x0000000103031824 */
/* 0x000fe200078e0a0a */
/*0210*/ @!P2 LOP3.LUT R3, RZ, R10, RZ, 0x33, !PT ; /* 0x0000000aff03a212 */
/* 0x000fc800078e33ff */
/*0220*/ ISETP.NE.AND P1, PT, R3, RZ, PT ; /* 0x000000ff0300720c */
/* 0x000fda0003f25270 */
/*0230*/ @!P1 LEA R2, R5, R0, 0x2 ; /* 0x0000000005029211 */
/* 0x000fe200078e10ff */
/*0240*/ @!P1 LDS R3, [R7.X4] ; /* 0x0000000007039984 */
/* 0x000fe20000004800 */
/*0250*/ MOV R5, R10 ; /* 0x0000000a00057202 */
/* 0x000fc80000000f00 */
/*0260*/ @!P1 LDS R2, [R2] ; /* 0x0000000002029984 */
/* 0x000e240000000800 */
/*0270*/ @!P1 IMAD.IADD R3, R3, 0x1, R2 ; /* 0x0000000103039824 */
/* 0x001fca00078e0202 */
/*0280*/ @!P1 STS [R7.X4], R3 ; /* 0x0000000307009388 */
/* 0x0001e80000004800 */
/*0290*/ BAR.SYNC.DEFER_BLOCKING 0x0 ; /* 0x0000000000007b1d */
/* 0x000fe20000010000 */
/*02a0*/ ISETP.GE.U32.AND P1, PT, R10, c[0x0][0x0], PT ; /* 0x000000000a007a0c */
/* 0x000fda0003f26070 */
/*02b0*/ @!P1 BRA 0x100 ; /* 0xfffffe4000009947 */
/* 0x001fea000383ffff */
/*02c0*/ @P0 EXIT ; /* 0x000000000000094d */
/* 0x001fea0003800000 */
/*02d0*/ LDS R5, [RZ] ; /* 0x00000000ff057984 */
/* 0x000e220000000800 */
/*02e0*/ IMAD.MOV.U32 R3, RZ, RZ, 0x4 ; /* 0x00000004ff037424 */
/* 0x000fc800078e00ff */
/*02f0*/ IMAD.WIDE.U32 R2, R6, R3, c[0x0][0x168] ; /* 0x00005a0006027625 */
/* 0x000fca00078e0003 */
/*0300*/ STG.E [R2.64], R5 ; /* 0x0000000502007986 */
/* 0x001fe2000c101904 */
/*0310*/ EXIT ; /* 0x000000000000794d */
/* 0x000fea0003800000 */
/*0320*/ BRA 0x320; /* 0xfffffff000007947 */
/* 0x000fc0000383ffff */
/*0330*/ NOP; /* 0x0000000000007918 */
/* 0x000fc00000000000 */
/*0340*/ NOP; /* 0x0000000000007918 */
/* 0x000fc00000000000 */
/*0350*/ NOP; /* 0x0000000000007918 */
/* 0x000fc00000000000 */
/*0360*/ NOP; /* 0x0000000000007918 */
/* 0x000fc00000000000 */
/*0370*/ NOP; /* 0x0000000000007918 */
/* 0x000fc00000000000 */
/*0380*/ NOP; /* 0x0000000000007918 */
/* 0x000fc00000000000 */
/*0390*/ NOP; /* 0x0000000000007918 */
/* 0x000fc00000000000 */
/*03a0*/ NOP; /* 0x0000000000007918 */
/* 0x000fc00000000000 */
/*03b0*/ NOP; /* 0x0000000000007918 */
/* 0x000fc00000000000 */
/*03c0*/ NOP; /* 0x0000000000007918 */
/* 0x000fc00000000000 */
/*03d0*/ NOP; /* 0x0000000000007918 */
/* 0x000fc00000000000 */
/*03e0*/ NOP; /* 0x0000000000007918 */
/* 0x000fc00000000000 */
/*03f0*/ NOP; /* 0x0000000000007918 */
/* 0x000fc00000000000 */
.......... |
You are a helpful coding assistant specialized in converting CUDA source code to CUDA host assembly. | #include <stdio.h>
#include <stdlib.h>
#include <cuda.h>
__global__ void reduce(int *g_idata, int *g_odata)
{
extern __shared__ int sdata[];
unsigned int tid = threadIdx.x;
unsigned int i = blockIdx.x * blockDim.x + threadIdx.x;
sdata[tid] = g_idata[i];
__syncthreads();
for (int s = 1; s < blockDim.x; s *= 2)
{
if (tid % (2 * s) == 0)
{
sdata[tid] += sdata[tid + s];
}
__syncthreads();
}
if (tid == 0)
{
g_odata[blockIdx.x] = sdata[0];
}
}
int main(int argc, char *argv[])
{
// We assume that the element number is the power of 2 for simplification.
const int elemNum = 1 << 22;
int arraySize = elemNum * sizeof(int);
// host memory
int *h_idata;
int sum;
// device memory
int *d_idata;
int *d_odata;
// initialize input data
h_idata = (int *) malloc(arraySize);
FILE *fp;
if((fp = fopen(argv[1], "rb")) == NULL)
{
printf("Can not open input file!\n");
exit(0);
}
for (int i = 0; i < elemNum; ++i)
{
fscanf(fp, "%d", &h_idata[i]);
}
fclose(fp);
// copy input data from CPU to GPU
cudaMalloc((void **) &d_idata, arraySize);
cudaMemcpy(d_idata, h_idata, arraySize, cudaMemcpyHostToDevice);
int threadNum = 0;
int blockNum = 0;
// calculate the threadNum and blockNum for the first kernel
cudaDeviceProp deviceProperties;
cudaGetDeviceProperties(&deviceProperties, 0);
int maxThreadsPerBlock = deviceProperties.maxThreadsPerBlock; // maxThreadsPerBlock = 1024 on K20X
threadNum = (elemNum > maxThreadsPerBlock)? maxThreadsPerBlock: elemNum;
blockNum = (int) ceil((double) elemNum / threadNum); // blockNum = 4096
// the number of output elements of the first kernel is blockNum
cudaMalloc((void **) &d_odata, blockNum * sizeof(int));
// use GPU of id=0
cudaSetDevice(0);
// parameters for the first kernel
dim3 gridDim(blockNum, 1, 1);
dim3 blockDim(threadNum, 1, 1);
int sMemSize = threadNum * sizeof(int);
cudaEvent_t start, stop;
float stepTime;
float totalTime = 0;
// create event for recording GPU execution time
cudaEventCreate(&start);
cudaEventCreate(&stop);
// execute the first kernel and set the GPU timer
cudaEventRecord(start, 0);
reduce<<<gridDim, blockDim, sMemSize>>>(d_idata, d_odata);
cudaDeviceSynchronize();
cudaEventRecord(stop, 0);
cudaEventSynchronize(stop);
// calculate the execution time of the first kernel
cudaEventElapsedTime(&stepTime, start, stop);
totalTime += stepTime;
cudaEventDestroy(start);
cudaEventDestroy(stop);
// calculate the threadNum and blockNum for the next kernel
threadNum = (blockNum > maxThreadsPerBlock)? maxThreadsPerBlock: blockNum;
blockNum = (int) ceil((double) blockNum / threadNum);
while(blockNum >= 1) {
// parameters for the current kernel
dim3 gridDim(blockNum, 1, 1);
dim3 blockDim(threadNum, 1, 1);
sMemSize = threadNum * sizeof(int);
// create event for recording GPU execution time
cudaEventCreate(&start);
cudaEventCreate(&stop);
// execute the current kernel and set the GPU timer
cudaEventRecord(start, 0);
reduce<<<gridDim, blockDim, sMemSize>>>(d_odata, d_odata);
cudaDeviceSynchronize();
cudaEventRecord(stop, 0);
cudaEventSynchronize(stop);
// calculate the execution time of the current kernel
cudaEventElapsedTime(&stepTime, start, stop);
totalTime += stepTime;
cudaEventDestroy(start);
cudaEventDestroy(stop);
if (blockNum == 1) break;
// calculate the threadNum and blockNum for the next kernel
threadNum = (blockNum > maxThreadsPerBlock)? maxThreadsPerBlock: blockNum;
blockNum = (int) ceil((double) blockNum / threadNum);
}
// copy result back to CPU
cudaMemcpy(&sum, d_odata, sizeof(int), cudaMemcpyDeviceToHost);
cudaFree(d_idata);
cudaFree(d_odata);
cudaFree(d_odata);
float bandwidth = elemNum * sizeof(int) / (totalTime / 1000) / 1024 / 1024 / 1024;
printf("%d %fms %fGB/s\n", sum, totalTime, bandwidth);
return 0;
} | .file "tmpxft_0010a9f5_00000000-6_V1.cudafe1.cpp"
.text
#APP
#NO_APP
.type _ZL26__cudaUnregisterBinaryUtilv, @function
_ZL26__cudaUnregisterBinaryUtilv:
.LFB2060:
.cfi_startproc
endbr64
subq $8, %rsp
.cfi_def_cfa_offset 16
movq _ZL20__cudaFatCubinHandle(%rip), %rdi
call __cudaUnregisterFatBinary@PLT
addq $8, %rsp
.cfi_def_cfa_offset 8
ret
.cfi_endproc
.LFE2060:
.size _ZL26__cudaUnregisterBinaryUtilv, .-_ZL26__cudaUnregisterBinaryUtilv
.globl _Z27__device_stub__Z6reducePiS_PiS_
.type _Z27__device_stub__Z6reducePiS_PiS_, @function
_Z27__device_stub__Z6reducePiS_PiS_:
.LFB2082:
.cfi_startproc
endbr64
subq $120, %rsp
.cfi_def_cfa_offset 128
movq %rdi, 8(%rsp)
movq %rsi, (%rsp)
movq %fs:40, %rax
movq %rax, 104(%rsp)
xorl %eax, %eax
leaq 8(%rsp), %rax
movq %rax, 80(%rsp)
movq %rsp, %rax
movq %rax, 88(%rsp)
movl $1, 32(%rsp)
movl $1, 36(%rsp)
movl $1, 40(%rsp)
movl $1, 44(%rsp)
movl $1, 48(%rsp)
movl $1, 52(%rsp)
leaq 24(%rsp), %rcx
leaq 16(%rsp), %rdx
leaq 44(%rsp), %rsi
leaq 32(%rsp), %rdi
call __cudaPopCallConfiguration@PLT
testl %eax, %eax
je .L7
.L3:
movq 104(%rsp), %rax
subq %fs:40, %rax
jne .L8
addq $120, %rsp
.cfi_remember_state
.cfi_def_cfa_offset 8
ret
.L7:
.cfi_restore_state
pushq 24(%rsp)
.cfi_def_cfa_offset 136
pushq 24(%rsp)
.cfi_def_cfa_offset 144
leaq 96(%rsp), %r9
movq 60(%rsp), %rcx
movl 68(%rsp), %r8d
movq 48(%rsp), %rsi
movl 56(%rsp), %edx
leaq _Z6reducePiS_(%rip), %rdi
call cudaLaunchKernel@PLT
addq $16, %rsp
.cfi_def_cfa_offset 128
jmp .L3
.L8:
call __stack_chk_fail@PLT
.cfi_endproc
.LFE2082:
.size _Z27__device_stub__Z6reducePiS_PiS_, .-_Z27__device_stub__Z6reducePiS_PiS_
.globl _Z6reducePiS_
.type _Z6reducePiS_, @function
_Z6reducePiS_:
.LFB2083:
.cfi_startproc
endbr64
subq $8, %rsp
.cfi_def_cfa_offset 16
call _Z27__device_stub__Z6reducePiS_PiS_
addq $8, %rsp
.cfi_def_cfa_offset 8
ret
.cfi_endproc
.LFE2083:
.size _Z6reducePiS_, .-_Z6reducePiS_
.section .rodata.str1.1,"aMS",@progbits,1
.LC0:
.string "rb"
.LC1:
.string "Can not open input file!\n"
.LC2:
.string "%d"
.LC11:
.string "%d %fms %fGB/s\n"
.text
.globl main
.type main, @function
main:
.LFB2057:
.cfi_startproc
endbr64
pushq %r14
.cfi_def_cfa_offset 16
.cfi_offset 14, -16
pushq %r13
.cfi_def_cfa_offset 24
.cfi_offset 13, -24
pushq %r12
.cfi_def_cfa_offset 32
.cfi_offset 12, -32
pushq %rbp
.cfi_def_cfa_offset 40
.cfi_offset 6, -40
pushq %rbx
.cfi_def_cfa_offset 48
.cfi_offset 3, -48
subq $1152, %rsp
.cfi_def_cfa_offset 1200
movq %rsi, %rbx
movq %fs:40, %rax
movq %rax, 1144(%rsp)
xorl %eax, %eax
movl $16777216, %edi
call malloc@PLT
movq %rax, %r14
movq 8(%rbx), %rdi
leaq .LC0(%rip), %rsi
call fopen@PLT
testq %rax, %rax
je .L26
movq %rax, %rbp
movq %r14, %rbx
leaq 16777216(%r14), %r13
leaq .LC2(%rip), %r12
.L13:
movq %rbx, %rdx
movq %r12, %rsi
movq %rbp, %rdi
movl $0, %eax
call __isoc23_fscanf@PLT
addq $4, %rbx
cmpq %rbx, %r13
jne .L13
movq %rbp, %rdi
call fclose@PLT
leaq 32(%rsp), %rdi
movl $16777216, %esi
call cudaMalloc@PLT
movl $1, %ecx
movl $16777216, %edx
movq %r14, %rsi
movq 32(%rsp), %rdi
call cudaMemcpy@PLT
leaq 112(%rsp), %rdi
movl $0, %esi
call cudaGetDeviceProperties_v2@PLT
movl 432(%rsp), %r12d
movl $4194304, %ebx
cmpl %ebx, %r12d
cmovle %r12d, %ebx
pxor %xmm1, %xmm1
cvtsi2sdl %ebx, %xmm1
movsd .LC3(%rip), %xmm0
divsd %xmm1, %xmm0
movapd %xmm0, %xmm3
movsd .LC12(%rip), %xmm2
movapd %xmm0, %xmm1
andpd %xmm2, %xmm1
movsd .LC4(%rip), %xmm4
ucomisd %xmm1, %xmm4
jbe .L14
cvttsd2siq %xmm0, %rax
pxor %xmm1, %xmm1
cvtsi2sdq %rax, %xmm1
cmpnlesd %xmm1, %xmm3
movsd .LC6(%rip), %xmm4
andpd %xmm4, %xmm3
addsd %xmm1, %xmm3
andnpd %xmm0, %xmm2
orpd %xmm2, %xmm3
.L14:
cvttsd2sil %xmm3, %r13d
movslq %r13d, %rsi
salq $2, %rsi
leaq 40(%rsp), %rdi
call cudaMalloc@PLT
movl $0, %edi
call cudaSetDevice@PLT
movl %r13d, 64(%rsp)
movl $1, 68(%rsp)
movl $1, 72(%rsp)
movl %ebx, 76(%rsp)
movl $1, 80(%rsp)
movl $1, 84(%rsp)
leaq 48(%rsp), %rdi
call cudaEventCreate@PLT
leaq 56(%rsp), %rdi
call cudaEventCreate@PLT
movl $0, %esi
movq 48(%rsp), %rdi
call cudaEventRecord@PLT
leal 0(,%rbx,4), %r8d
movl 84(%rsp), %ecx
movl $0, %r9d
movslq %r8d, %r8
movq 76(%rsp), %rdx
movq 64(%rsp), %rdi
movl 72(%rsp), %esi
call __cudaPushCallConfiguration@PLT
testl %eax, %eax
je .L27
.L15:
call cudaDeviceSynchronize@PLT
movl $0, %esi
movq 56(%rsp), %rdi
call cudaEventRecord@PLT
movq 56(%rsp), %rdi
call cudaEventSynchronize@PLT
leaq 28(%rsp), %rdi
movq 56(%rsp), %rdx
movq 48(%rsp), %rsi
call cudaEventElapsedTime@PLT
pxor %xmm0, %xmm0
addss 28(%rsp), %xmm0
movss %xmm0, 12(%rsp)
movq 48(%rsp), %rdi
call cudaEventDestroy@PLT
movq 56(%rsp), %rdi
call cudaEventDestroy@PLT
cmpl %r13d, %r12d
movl %r13d, %ebp
cmovle %r12d, %ebp
pxor %xmm0, %xmm0
cvtsi2sdl %r13d, %xmm0
pxor %xmm1, %xmm1
cvtsi2sdl %ebp, %xmm1
divsd %xmm1, %xmm0
movapd %xmm0, %xmm3
movsd .LC12(%rip), %xmm2
movapd %xmm0, %xmm1
andpd %xmm2, %xmm1
movsd .LC4(%rip), %xmm4
ucomisd %xmm1, %xmm4
jbe .L16
cvttsd2siq %xmm0, %rax
pxor %xmm1, %xmm1
cvtsi2sdq %rax, %xmm1
cmpnlesd %xmm1, %xmm3
movsd .LC6(%rip), %xmm4
andpd %xmm4, %xmm3
addsd %xmm1, %xmm3
andnpd %xmm0, %xmm2
orpd %xmm2, %xmm3
.L16:
cvttsd2sil %xmm3, %ebx
testl %ebx, %ebx
jle .L17
leaq 48(%rsp), %r13
jmp .L21
.L26:
leaq .LC1(%rip), %rsi
movl $2, %edi
movl $0, %eax
call __printf_chk@PLT
movl $0, %edi
call exit@PLT
.L27:
movq 40(%rsp), %rsi
movq 32(%rsp), %rdi
call _Z27__device_stub__Z6reducePiS_PiS_
jmp .L15
.L28:
movq 40(%rsp), %rdi
movq %rdi, %rsi
call _Z27__device_stub__Z6reducePiS_PiS_
jmp .L18
.L20:
cvttsd2sil %xmm3, %ebx
testl %ebx, %ebx
jle .L17
.L21:
movl %ebx, 88(%rsp)
movl $1, 92(%rsp)
movl $1, 96(%rsp)
movl %ebp, 100(%rsp)
movl $1, 104(%rsp)
movl $1, 108(%rsp)
movq %r13, %rdi
call cudaEventCreate@PLT
leaq 56(%rsp), %rdi
call cudaEventCreate@PLT
movl $0, %esi
movq 48(%rsp), %rdi
call cudaEventRecord@PLT
leal 0(,%rbp,4), %r8d
movl 108(%rsp), %ecx
movl $0, %r9d
movslq %r8d, %r8
movq 100(%rsp), %rdx
movq 88(%rsp), %rdi
movl 96(%rsp), %esi
call __cudaPushCallConfiguration@PLT
testl %eax, %eax
je .L28
.L18:
call cudaDeviceSynchronize@PLT
movl $0, %esi
movq 56(%rsp), %rdi
call cudaEventRecord@PLT
movq 56(%rsp), %rdi
call cudaEventSynchronize@PLT
leaq 28(%rsp), %rdi
movq 56(%rsp), %rdx
movq 48(%rsp), %rsi
call cudaEventElapsedTime@PLT
movss 12(%rsp), %xmm5
addss 28(%rsp), %xmm5
movss %xmm5, 12(%rsp)
movq 48(%rsp), %rdi
call cudaEventDestroy@PLT
movq 56(%rsp), %rdi
call cudaEventDestroy@PLT
cmpl $1, %ebx
je .L17
cmpl %ebx, %r12d
movl %ebx, %ebp
cmovle %r12d, %ebp
pxor %xmm0, %xmm0
cvtsi2sdl %ebx, %xmm0
pxor %xmm1, %xmm1
cvtsi2sdl %ebp, %xmm1
divsd %xmm1, %xmm0
movapd %xmm0, %xmm3
movsd .LC5(%rip), %xmm2
movapd %xmm0, %xmm1
andpd %xmm2, %xmm1
movsd .LC4(%rip), %xmm6
ucomisd %xmm1, %xmm6
jbe .L20
cvttsd2siq %xmm0, %rax
pxor %xmm1, %xmm1
cvtsi2sdq %rax, %xmm1
cmpnlesd %xmm1, %xmm3
movsd .LC6(%rip), %xmm7
andpd %xmm7, %xmm3
addsd %xmm1, %xmm3
andnpd %xmm0, %xmm2
orpd %xmm2, %xmm3
jmp .L20
.L17:
leaq 100(%rsp), %rdi
movl $2, %ecx
movl $4, %edx
movq 40(%rsp), %rsi
call cudaMemcpy@PLT
movq 32(%rsp), %rdi
call cudaFree@PLT
movq 40(%rsp), %rdi
call cudaFree@PLT
movq 40(%rsp), %rdi
call cudaFree@PLT
movss 12(%rsp), %xmm4
movaps %xmm4, %xmm0
divss .LC8(%rip), %xmm0
movss .LC9(%rip), %xmm1
divss %xmm0, %xmm1
movss .LC10(%rip), %xmm0
mulss %xmm0, %xmm1
mulss %xmm0, %xmm1
mulss %xmm0, %xmm1
pxor %xmm0, %xmm0
cvtss2sd %xmm4, %xmm0
cvtss2sd %xmm1, %xmm1
movl 100(%rsp), %edx
leaq .LC11(%rip), %rsi
movl $2, %edi
movl $2, %eax
call __printf_chk@PLT
movq 1144(%rsp), %rax
subq %fs:40, %rax
jne .L29
movl $0, %eax
addq $1152, %rsp
.cfi_remember_state
.cfi_def_cfa_offset 48
popq %rbx
.cfi_def_cfa_offset 40
popq %rbp
.cfi_def_cfa_offset 32
popq %r12
.cfi_def_cfa_offset 24
popq %r13
.cfi_def_cfa_offset 16
popq %r14
.cfi_def_cfa_offset 8
ret
.L29:
.cfi_restore_state
call __stack_chk_fail@PLT
.cfi_endproc
.LFE2057:
.size main, .-main
.section .rodata.str1.1
.LC13:
.string "_Z6reducePiS_"
.text
.type _ZL24__sti____cudaRegisterAllv, @function
_ZL24__sti____cudaRegisterAllv:
.LFB2085:
.cfi_startproc
endbr64
subq $8, %rsp
.cfi_def_cfa_offset 16
leaq _ZL15__fatDeviceText(%rip), %rdi
call __cudaRegisterFatBinary@PLT
movq %rax, %rdi
movq %rax, _ZL20__cudaFatCubinHandle(%rip)
pushq $0
.cfi_def_cfa_offset 24
pushq $0
.cfi_def_cfa_offset 32
pushq $0
.cfi_def_cfa_offset 40
pushq $0
.cfi_def_cfa_offset 48
movl $0, %r9d
movl $-1, %r8d
leaq .LC13(%rip), %rdx
movq %rdx, %rcx
leaq _Z6reducePiS_(%rip), %rsi
call __cudaRegisterFunction@PLT
addq $32, %rsp
.cfi_def_cfa_offset 16
movq _ZL20__cudaFatCubinHandle(%rip), %rdi
call __cudaRegisterFatBinaryEnd@PLT
leaq _ZL26__cudaUnregisterBinaryUtilv(%rip), %rdi
call atexit@PLT
addq $8, %rsp
.cfi_def_cfa_offset 8
ret
.cfi_endproc
.LFE2085:
.size _ZL24__sti____cudaRegisterAllv, .-_ZL24__sti____cudaRegisterAllv
.section .init_array,"aw"
.align 8
.quad _ZL24__sti____cudaRegisterAllv
.section .nvFatBinSegment,"aw"
.align 8
.type _ZL15__fatDeviceText, @object
.size _ZL15__fatDeviceText, 24
_ZL15__fatDeviceText:
.long 1180844977
.long 1
.quad fatbinData
.quad 0
.local _ZL20__cudaFatCubinHandle
.comm _ZL20__cudaFatCubinHandle,8,8
.section .rodata.cst8,"aM",@progbits,8
.align 8
.LC3:
.long 0
.long 1095761920
.align 8
.LC4:
.long 0
.long 1127219200
.section .rodata.cst16,"aM",@progbits,16
.align 16
.LC5:
.long -1
.long 2147483647
.long 0
.long 0
.section .rodata.cst8
.align 8
.LC6:
.long 0
.long 1072693248
.section .rodata.cst4,"aM",@progbits,4
.align 4
.LC8:
.long 1148846080
.align 4
.LC9:
.long 1266679808
.align 4
.LC10:
.long 981467136
.set .LC12,.LC5
.ident "GCC: (Ubuntu 13.3.0-6ubuntu2~24.04) 13.3.0"
.section .note.GNU-stack,"",@progbits
.section .note.gnu.property,"a"
.align 8
.long 1f - 0f
.long 4f - 1f
.long 5
0:
.string "GNU"
1:
.align 8
.long 0xc0000002
.long 3f - 2f
2:
.long 0x3
3:
.align 8
4: |
You are a helpful coding assistant specialized in converting CUDA source code to HIP/AMD source code. | #include <stdio.h>
#include <stdlib.h>
#include <cuda.h>
__global__ void reduce(int *g_idata, int *g_odata)
{
extern __shared__ int sdata[];
unsigned int tid = threadIdx.x;
unsigned int i = blockIdx.x * blockDim.x + threadIdx.x;
sdata[tid] = g_idata[i];
__syncthreads();
for (int s = 1; s < blockDim.x; s *= 2)
{
if (tid % (2 * s) == 0)
{
sdata[tid] += sdata[tid + s];
}
__syncthreads();
}
if (tid == 0)
{
g_odata[blockIdx.x] = sdata[0];
}
}
int main(int argc, char *argv[])
{
// We assume that the element number is the power of 2 for simplification.
const int elemNum = 1 << 22;
int arraySize = elemNum * sizeof(int);
// host memory
int *h_idata;
int sum;
// device memory
int *d_idata;
int *d_odata;
// initialize input data
h_idata = (int *) malloc(arraySize);
FILE *fp;
if((fp = fopen(argv[1], "rb")) == NULL)
{
printf("Can not open input file!\n");
exit(0);
}
for (int i = 0; i < elemNum; ++i)
{
fscanf(fp, "%d", &h_idata[i]);
}
fclose(fp);
// copy input data from CPU to GPU
cudaMalloc((void **) &d_idata, arraySize);
cudaMemcpy(d_idata, h_idata, arraySize, cudaMemcpyHostToDevice);
int threadNum = 0;
int blockNum = 0;
// calculate the threadNum and blockNum for the first kernel
cudaDeviceProp deviceProperties;
cudaGetDeviceProperties(&deviceProperties, 0);
int maxThreadsPerBlock = deviceProperties.maxThreadsPerBlock; // maxThreadsPerBlock = 1024 on K20X
threadNum = (elemNum > maxThreadsPerBlock)? maxThreadsPerBlock: elemNum;
blockNum = (int) ceil((double) elemNum / threadNum); // blockNum = 4096
// the number of output elements of the first kernel is blockNum
cudaMalloc((void **) &d_odata, blockNum * sizeof(int));
// use GPU of id=0
cudaSetDevice(0);
// parameters for the first kernel
dim3 gridDim(blockNum, 1, 1);
dim3 blockDim(threadNum, 1, 1);
int sMemSize = threadNum * sizeof(int);
cudaEvent_t start, stop;
float stepTime;
float totalTime = 0;
// create event for recording GPU execution time
cudaEventCreate(&start);
cudaEventCreate(&stop);
// execute the first kernel and set the GPU timer
cudaEventRecord(start, 0);
reduce<<<gridDim, blockDim, sMemSize>>>(d_idata, d_odata);
cudaDeviceSynchronize();
cudaEventRecord(stop, 0);
cudaEventSynchronize(stop);
// calculate the execution time of the first kernel
cudaEventElapsedTime(&stepTime, start, stop);
totalTime += stepTime;
cudaEventDestroy(start);
cudaEventDestroy(stop);
// calculate the threadNum and blockNum for the next kernel
threadNum = (blockNum > maxThreadsPerBlock)? maxThreadsPerBlock: blockNum;
blockNum = (int) ceil((double) blockNum / threadNum);
while(blockNum >= 1) {
// parameters for the current kernel
dim3 gridDim(blockNum, 1, 1);
dim3 blockDim(threadNum, 1, 1);
sMemSize = threadNum * sizeof(int);
// create event for recording GPU execution time
cudaEventCreate(&start);
cudaEventCreate(&stop);
// execute the current kernel and set the GPU timer
cudaEventRecord(start, 0);
reduce<<<gridDim, blockDim, sMemSize>>>(d_odata, d_odata);
cudaDeviceSynchronize();
cudaEventRecord(stop, 0);
cudaEventSynchronize(stop);
// calculate the execution time of the current kernel
cudaEventElapsedTime(&stepTime, start, stop);
totalTime += stepTime;
cudaEventDestroy(start);
cudaEventDestroy(stop);
if (blockNum == 1) break;
// calculate the threadNum and blockNum for the next kernel
threadNum = (blockNum > maxThreadsPerBlock)? maxThreadsPerBlock: blockNum;
blockNum = (int) ceil((double) blockNum / threadNum);
}
// copy result back to CPU
cudaMemcpy(&sum, d_odata, sizeof(int), cudaMemcpyDeviceToHost);
cudaFree(d_idata);
cudaFree(d_odata);
cudaFree(d_odata);
float bandwidth = elemNum * sizeof(int) / (totalTime / 1000) / 1024 / 1024 / 1024;
printf("%d %fms %fGB/s\n", sum, totalTime, bandwidth);
return 0;
} | #include <stdio.h>
#include <stdlib.h>
#include <hip/hip_runtime.h>
__global__ void reduce(int *g_idata, int *g_odata)
{
extern __shared__ int sdata[];
unsigned int tid = threadIdx.x;
unsigned int i = blockIdx.x * blockDim.x + threadIdx.x;
sdata[tid] = g_idata[i];
__syncthreads();
for (int s = 1; s < blockDim.x; s *= 2)
{
if (tid % (2 * s) == 0)
{
sdata[tid] += sdata[tid + s];
}
__syncthreads();
}
if (tid == 0)
{
g_odata[blockIdx.x] = sdata[0];
}
}
int main(int argc, char *argv[])
{
// We assume that the element number is the power of 2 for simplification.
const int elemNum = 1 << 22;
int arraySize = elemNum * sizeof(int);
// host memory
int *h_idata;
int sum;
// device memory
int *d_idata;
int *d_odata;
// initialize input data
h_idata = (int *) malloc(arraySize);
FILE *fp;
if((fp = fopen(argv[1], "rb")) == NULL)
{
printf("Can not open input file!\n");
exit(0);
}
for (int i = 0; i < elemNum; ++i)
{
fscanf(fp, "%d", &h_idata[i]);
}
fclose(fp);
// copy input data from CPU to GPU
hipMalloc((void **) &d_idata, arraySize);
hipMemcpy(d_idata, h_idata, arraySize, hipMemcpyHostToDevice);
int threadNum = 0;
int blockNum = 0;
// calculate the threadNum and blockNum for the first kernel
hipDeviceProp_t deviceProperties;
hipGetDeviceProperties(&deviceProperties, 0);
int maxThreadsPerBlock = deviceProperties.maxThreadsPerBlock; // maxThreadsPerBlock = 1024 on K20X
threadNum = (elemNum > maxThreadsPerBlock)? maxThreadsPerBlock: elemNum;
blockNum = (int) ceil((double) elemNum / threadNum); // blockNum = 4096
// the number of output elements of the first kernel is blockNum
hipMalloc((void **) &d_odata, blockNum * sizeof(int));
// use GPU of id=0
hipSetDevice(0);
// parameters for the first kernel
dim3 gridDim(blockNum, 1, 1);
dim3 blockDim(threadNum, 1, 1);
int sMemSize = threadNum * sizeof(int);
hipEvent_t start, stop;
float stepTime;
float totalTime = 0;
// create event for recording GPU execution time
hipEventCreate(&start);
hipEventCreate(&stop);
// execute the first kernel and set the GPU timer
hipEventRecord(start, 0);
reduce<<<gridDim, blockDim, sMemSize>>>(d_idata, d_odata);
hipDeviceSynchronize();
hipEventRecord(stop, 0);
hipEventSynchronize(stop);
// calculate the execution time of the first kernel
hipEventElapsedTime(&stepTime, start, stop);
totalTime += stepTime;
hipEventDestroy(start);
hipEventDestroy(stop);
// calculate the threadNum and blockNum for the next kernel
threadNum = (blockNum > maxThreadsPerBlock)? maxThreadsPerBlock: blockNum;
blockNum = (int) ceil((double) blockNum / threadNum);
while(blockNum >= 1) {
// parameters for the current kernel
dim3 gridDim(blockNum, 1, 1);
dim3 blockDim(threadNum, 1, 1);
sMemSize = threadNum * sizeof(int);
// create event for recording GPU execution time
hipEventCreate(&start);
hipEventCreate(&stop);
// execute the current kernel and set the GPU timer
hipEventRecord(start, 0);
reduce<<<gridDim, blockDim, sMemSize>>>(d_odata, d_odata);
hipDeviceSynchronize();
hipEventRecord(stop, 0);
hipEventSynchronize(stop);
// calculate the execution time of the current kernel
hipEventElapsedTime(&stepTime, start, stop);
totalTime += stepTime;
hipEventDestroy(start);
hipEventDestroy(stop);
if (blockNum == 1) break;
// calculate the threadNum and blockNum for the next kernel
threadNum = (blockNum > maxThreadsPerBlock)? maxThreadsPerBlock: blockNum;
blockNum = (int) ceil((double) blockNum / threadNum);
}
// copy result back to CPU
hipMemcpy(&sum, d_odata, sizeof(int), hipMemcpyDeviceToHost);
hipFree(d_idata);
hipFree(d_odata);
hipFree(d_odata);
float bandwidth = elemNum * sizeof(int) / (totalTime / 1000) / 1024 / 1024 / 1024;
printf("%d %fms %fGB/s\n", sum, totalTime, bandwidth);
return 0;
} |
You are a helpful coding assistant specialized in converting HIP source code to AMD device assembly. | #include <stdio.h>
#include <stdlib.h>
#include <hip/hip_runtime.h>
__global__ void reduce(int *g_idata, int *g_odata)
{
extern __shared__ int sdata[];
unsigned int tid = threadIdx.x;
unsigned int i = blockIdx.x * blockDim.x + threadIdx.x;
sdata[tid] = g_idata[i];
__syncthreads();
for (int s = 1; s < blockDim.x; s *= 2)
{
if (tid % (2 * s) == 0)
{
sdata[tid] += sdata[tid + s];
}
__syncthreads();
}
if (tid == 0)
{
g_odata[blockIdx.x] = sdata[0];
}
}
int main(int argc, char *argv[])
{
// We assume that the element number is the power of 2 for simplification.
const int elemNum = 1 << 22;
int arraySize = elemNum * sizeof(int);
// host memory
int *h_idata;
int sum;
// device memory
int *d_idata;
int *d_odata;
// initialize input data
h_idata = (int *) malloc(arraySize);
FILE *fp;
if((fp = fopen(argv[1], "rb")) == NULL)
{
printf("Can not open input file!\n");
exit(0);
}
for (int i = 0; i < elemNum; ++i)
{
fscanf(fp, "%d", &h_idata[i]);
}
fclose(fp);
// copy input data from CPU to GPU
hipMalloc((void **) &d_idata, arraySize);
hipMemcpy(d_idata, h_idata, arraySize, hipMemcpyHostToDevice);
int threadNum = 0;
int blockNum = 0;
// calculate the threadNum and blockNum for the first kernel
hipDeviceProp_t deviceProperties;
hipGetDeviceProperties(&deviceProperties, 0);
int maxThreadsPerBlock = deviceProperties.maxThreadsPerBlock; // maxThreadsPerBlock = 1024 on K20X
threadNum = (elemNum > maxThreadsPerBlock)? maxThreadsPerBlock: elemNum;
blockNum = (int) ceil((double) elemNum / threadNum); // blockNum = 4096
// the number of output elements of the first kernel is blockNum
hipMalloc((void **) &d_odata, blockNum * sizeof(int));
// use GPU of id=0
hipSetDevice(0);
// parameters for the first kernel
dim3 gridDim(blockNum, 1, 1);
dim3 blockDim(threadNum, 1, 1);
int sMemSize = threadNum * sizeof(int);
hipEvent_t start, stop;
float stepTime;
float totalTime = 0;
// create event for recording GPU execution time
hipEventCreate(&start);
hipEventCreate(&stop);
// execute the first kernel and set the GPU timer
hipEventRecord(start, 0);
reduce<<<gridDim, blockDim, sMemSize>>>(d_idata, d_odata);
hipDeviceSynchronize();
hipEventRecord(stop, 0);
hipEventSynchronize(stop);
// calculate the execution time of the first kernel
hipEventElapsedTime(&stepTime, start, stop);
totalTime += stepTime;
hipEventDestroy(start);
hipEventDestroy(stop);
// calculate the threadNum and blockNum for the next kernel
threadNum = (blockNum > maxThreadsPerBlock)? maxThreadsPerBlock: blockNum;
blockNum = (int) ceil((double) blockNum / threadNum);
while(blockNum >= 1) {
// parameters for the current kernel
dim3 gridDim(blockNum, 1, 1);
dim3 blockDim(threadNum, 1, 1);
sMemSize = threadNum * sizeof(int);
// create event for recording GPU execution time
hipEventCreate(&start);
hipEventCreate(&stop);
// execute the current kernel and set the GPU timer
hipEventRecord(start, 0);
reduce<<<gridDim, blockDim, sMemSize>>>(d_odata, d_odata);
hipDeviceSynchronize();
hipEventRecord(stop, 0);
hipEventSynchronize(stop);
// calculate the execution time of the current kernel
hipEventElapsedTime(&stepTime, start, stop);
totalTime += stepTime;
hipEventDestroy(start);
hipEventDestroy(stop);
if (blockNum == 1) break;
// calculate the threadNum and blockNum for the next kernel
threadNum = (blockNum > maxThreadsPerBlock)? maxThreadsPerBlock: blockNum;
blockNum = (int) ceil((double) blockNum / threadNum);
}
// copy result back to CPU
hipMemcpy(&sum, d_odata, sizeof(int), hipMemcpyDeviceToHost);
hipFree(d_idata);
hipFree(d_odata);
hipFree(d_odata);
float bandwidth = elemNum * sizeof(int) / (totalTime / 1000) / 1024 / 1024 / 1024;
printf("%d %fms %fGB/s\n", sum, totalTime, bandwidth);
return 0;
} | .text
.amdgcn_target "amdgcn-amd-amdhsa--gfx1100"
.protected _Z6reducePiS_
.globl _Z6reducePiS_
.p2align 8
.type _Z6reducePiS_,@function
_Z6reducePiS_:
s_clause 0x1
s_load_b32 s3, s[0:1], 0x1c
s_load_b64 s[4:5], s[0:1], 0x0
s_mov_b32 s2, s15
s_waitcnt lgkmcnt(0)
s_and_b32 s3, s3, 0xffff
s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_2) | instid1(VALU_DEP_1)
v_mad_u64_u32 v[1:2], null, s2, s3, v[0:1]
v_mov_b32_e32 v2, 0
s_cmp_lt_u32 s3, 2
v_lshlrev_b64 v[1:2], 2, v[1:2]
s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_2)
v_add_co_u32 v1, vcc_lo, s4, v1
v_add_co_ci_u32_e32 v2, vcc_lo, s5, v2, vcc_lo
global_load_b32 v2, v[1:2], off
v_lshl_add_u32 v1, v0, 2, 0
s_waitcnt vmcnt(0)
ds_store_b32 v1, v2
s_waitcnt lgkmcnt(0)
s_barrier
buffer_gl0_inv
s_cbranch_scc1 .LBB0_5
s_mov_b32 s5, 1
s_branch .LBB0_3
.p2align 6
.LBB0_2:
s_or_b32 exec_lo, exec_lo, s6
s_cmp_ge_u32 s4, s3
s_mov_b32 s5, s4
s_waitcnt lgkmcnt(0)
s_barrier
buffer_gl0_inv
s_cbranch_scc1 .LBB0_5
.LBB0_3:
s_lshl_b32 s4, s5, 1
s_delay_alu instid0(SALU_CYCLE_1) | instskip(NEXT) | instid1(SALU_CYCLE_1)
s_add_i32 s6, s4, -1
v_and_b32_e32 v2, s6, v0
s_mov_b32 s6, exec_lo
s_delay_alu instid0(VALU_DEP_1)
v_cmpx_eq_u32_e32 0, v2
s_cbranch_execz .LBB0_2
v_add_nc_u32_e32 v2, s5, v0
s_delay_alu instid0(VALU_DEP_1)
v_lshl_add_u32 v2, v2, 2, 0
ds_load_b32 v2, v2
ds_load_b32 v3, v1
s_waitcnt lgkmcnt(0)
v_add_nc_u32_e32 v2, v3, v2
ds_store_b32 v1, v2
s_branch .LBB0_2
.LBB0_5:
s_mov_b32 s3, exec_lo
v_cmpx_eq_u32_e32 0, v0
s_cbranch_execz .LBB0_7
v_dual_mov_b32 v0, 0 :: v_dual_mov_b32 v1, 0
s_load_b64 s[0:1], s[0:1], 0x8
s_mov_b32 s3, 0
s_delay_alu instid0(SALU_CYCLE_1)
s_lshl_b64 s[2:3], s[2:3], 2
ds_load_b32 v0, v0
s_waitcnt lgkmcnt(0)
s_add_u32 s0, s0, s2
s_addc_u32 s1, s1, s3
global_store_b32 v1, v0, s[0:1]
.LBB0_7:
s_nop 0
s_sendmsg sendmsg(MSG_DEALLOC_VGPRS)
s_endpgm
.section .rodata,"a",@progbits
.p2align 6, 0x0
.amdhsa_kernel _Z6reducePiS_
.amdhsa_group_segment_fixed_size 0
.amdhsa_private_segment_fixed_size 0
.amdhsa_kernarg_size 272
.amdhsa_user_sgpr_count 15
.amdhsa_user_sgpr_dispatch_ptr 0
.amdhsa_user_sgpr_queue_ptr 0
.amdhsa_user_sgpr_kernarg_segment_ptr 1
.amdhsa_user_sgpr_dispatch_id 0
.amdhsa_user_sgpr_private_segment_size 0
.amdhsa_wavefront_size32 1
.amdhsa_uses_dynamic_stack 0
.amdhsa_enable_private_segment 0
.amdhsa_system_sgpr_workgroup_id_x 1
.amdhsa_system_sgpr_workgroup_id_y 0
.amdhsa_system_sgpr_workgroup_id_z 0
.amdhsa_system_sgpr_workgroup_info 0
.amdhsa_system_vgpr_workitem_id 0
.amdhsa_next_free_vgpr 4
.amdhsa_next_free_sgpr 16
.amdhsa_float_round_mode_32 0
.amdhsa_float_round_mode_16_64 0
.amdhsa_float_denorm_mode_32 3
.amdhsa_float_denorm_mode_16_64 3
.amdhsa_dx10_clamp 1
.amdhsa_ieee_mode 1
.amdhsa_fp16_overflow 0
.amdhsa_workgroup_processor_mode 1
.amdhsa_memory_ordered 1
.amdhsa_forward_progress 0
.amdhsa_shared_vgpr_count 0
.amdhsa_exception_fp_ieee_invalid_op 0
.amdhsa_exception_fp_denorm_src 0
.amdhsa_exception_fp_ieee_div_zero 0
.amdhsa_exception_fp_ieee_overflow 0
.amdhsa_exception_fp_ieee_underflow 0
.amdhsa_exception_fp_ieee_inexact 0
.amdhsa_exception_int_div_zero 0
.end_amdhsa_kernel
.text
.Lfunc_end0:
.size _Z6reducePiS_, .Lfunc_end0-_Z6reducePiS_
.section .AMDGPU.csdata,"",@progbits
.text
.p2alignl 7, 3214868480
.fill 96, 4, 3214868480
.type __hip_cuid_,@object
.section .bss,"aw",@nobits
.globl __hip_cuid_
__hip_cuid_:
.byte 0
.size __hip_cuid_, 1
.ident "AMD clang version 18.0.0git (https://github.com/RadeonOpenCompute/llvm-project roc-6.3.2 25012 e5bf7e55c91490b07c49d8960fa7983d864936c4)"
.section ".note.GNU-stack","",@progbits
.addrsig
.addrsig_sym __hip_cuid_
.amdgpu_metadata
---
amdhsa.kernels:
- .args:
- .address_space: global
.offset: 0
.size: 8
.value_kind: global_buffer
- .address_space: global
.offset: 8
.size: 8
.value_kind: global_buffer
- .offset: 16
.size: 4
.value_kind: hidden_block_count_x
- .offset: 20
.size: 4
.value_kind: hidden_block_count_y
- .offset: 24
.size: 4
.value_kind: hidden_block_count_z
- .offset: 28
.size: 2
.value_kind: hidden_group_size_x
- .offset: 30
.size: 2
.value_kind: hidden_group_size_y
- .offset: 32
.size: 2
.value_kind: hidden_group_size_z
- .offset: 34
.size: 2
.value_kind: hidden_remainder_x
- .offset: 36
.size: 2
.value_kind: hidden_remainder_y
- .offset: 38
.size: 2
.value_kind: hidden_remainder_z
- .offset: 56
.size: 8
.value_kind: hidden_global_offset_x
- .offset: 64
.size: 8
.value_kind: hidden_global_offset_y
- .offset: 72
.size: 8
.value_kind: hidden_global_offset_z
- .offset: 80
.size: 2
.value_kind: hidden_grid_dims
- .offset: 136
.size: 4
.value_kind: hidden_dynamic_lds_size
.group_segment_fixed_size: 0
.kernarg_segment_align: 8
.kernarg_segment_size: 272
.language: OpenCL C
.language_version:
- 2
- 0
.max_flat_workgroup_size: 1024
.name: _Z6reducePiS_
.private_segment_fixed_size: 0
.sgpr_count: 18
.sgpr_spill_count: 0
.symbol: _Z6reducePiS_.kd
.uniform_work_group_size: 1
.uses_dynamic_stack: false
.vgpr_count: 4
.vgpr_spill_count: 0
.wavefront_size: 32
.workgroup_processor_mode: 1
amdhsa.target: amdgcn-amd-amdhsa--gfx1100
amdhsa.version:
- 1
- 2
...
.end_amdgpu_metadata |
You are a helpful coding assistant specialized in converting HIP source code to AMD host assembly. | #include <stdio.h>
#include <stdlib.h>
#include <hip/hip_runtime.h>
__global__ void reduce(int *g_idata, int *g_odata)
{
extern __shared__ int sdata[];
unsigned int tid = threadIdx.x;
unsigned int i = blockIdx.x * blockDim.x + threadIdx.x;
sdata[tid] = g_idata[i];
__syncthreads();
for (int s = 1; s < blockDim.x; s *= 2)
{
if (tid % (2 * s) == 0)
{
sdata[tid] += sdata[tid + s];
}
__syncthreads();
}
if (tid == 0)
{
g_odata[blockIdx.x] = sdata[0];
}
}
int main(int argc, char *argv[])
{
// We assume that the element number is the power of 2 for simplification.
const int elemNum = 1 << 22;
int arraySize = elemNum * sizeof(int);
// host memory
int *h_idata;
int sum;
// device memory
int *d_idata;
int *d_odata;
// initialize input data
h_idata = (int *) malloc(arraySize);
FILE *fp;
if((fp = fopen(argv[1], "rb")) == NULL)
{
printf("Can not open input file!\n");
exit(0);
}
for (int i = 0; i < elemNum; ++i)
{
fscanf(fp, "%d", &h_idata[i]);
}
fclose(fp);
// copy input data from CPU to GPU
hipMalloc((void **) &d_idata, arraySize);
hipMemcpy(d_idata, h_idata, arraySize, hipMemcpyHostToDevice);
int threadNum = 0;
int blockNum = 0;
// calculate the threadNum and blockNum for the first kernel
hipDeviceProp_t deviceProperties;
hipGetDeviceProperties(&deviceProperties, 0);
int maxThreadsPerBlock = deviceProperties.maxThreadsPerBlock; // maxThreadsPerBlock = 1024 on K20X
threadNum = (elemNum > maxThreadsPerBlock)? maxThreadsPerBlock: elemNum;
blockNum = (int) ceil((double) elemNum / threadNum); // blockNum = 4096
// the number of output elements of the first kernel is blockNum
hipMalloc((void **) &d_odata, blockNum * sizeof(int));
// use GPU of id=0
hipSetDevice(0);
// parameters for the first kernel
dim3 gridDim(blockNum, 1, 1);
dim3 blockDim(threadNum, 1, 1);
int sMemSize = threadNum * sizeof(int);
hipEvent_t start, stop;
float stepTime;
float totalTime = 0;
// create event for recording GPU execution time
hipEventCreate(&start);
hipEventCreate(&stop);
// execute the first kernel and set the GPU timer
hipEventRecord(start, 0);
reduce<<<gridDim, blockDim, sMemSize>>>(d_idata, d_odata);
hipDeviceSynchronize();
hipEventRecord(stop, 0);
hipEventSynchronize(stop);
// calculate the execution time of the first kernel
hipEventElapsedTime(&stepTime, start, stop);
totalTime += stepTime;
hipEventDestroy(start);
hipEventDestroy(stop);
// calculate the threadNum and blockNum for the next kernel
threadNum = (blockNum > maxThreadsPerBlock)? maxThreadsPerBlock: blockNum;
blockNum = (int) ceil((double) blockNum / threadNum);
while(blockNum >= 1) {
// parameters for the current kernel
dim3 gridDim(blockNum, 1, 1);
dim3 blockDim(threadNum, 1, 1);
sMemSize = threadNum * sizeof(int);
// create event for recording GPU execution time
hipEventCreate(&start);
hipEventCreate(&stop);
// execute the current kernel and set the GPU timer
hipEventRecord(start, 0);
reduce<<<gridDim, blockDim, sMemSize>>>(d_odata, d_odata);
hipDeviceSynchronize();
hipEventRecord(stop, 0);
hipEventSynchronize(stop);
// calculate the execution time of the current kernel
hipEventElapsedTime(&stepTime, start, stop);
totalTime += stepTime;
hipEventDestroy(start);
hipEventDestroy(stop);
if (blockNum == 1) break;
// calculate the threadNum and blockNum for the next kernel
threadNum = (blockNum > maxThreadsPerBlock)? maxThreadsPerBlock: blockNum;
blockNum = (int) ceil((double) blockNum / threadNum);
}
// copy result back to CPU
hipMemcpy(&sum, d_odata, sizeof(int), hipMemcpyDeviceToHost);
hipFree(d_idata);
hipFree(d_odata);
hipFree(d_odata);
float bandwidth = elemNum * sizeof(int) / (totalTime / 1000) / 1024 / 1024 / 1024;
printf("%d %fms %fGB/s\n", sum, totalTime, bandwidth);
return 0;
} | .text
.file "V1.hip"
.globl _Z21__device_stub__reducePiS_ # -- Begin function _Z21__device_stub__reducePiS_
.p2align 4, 0x90
.type _Z21__device_stub__reducePiS_,@function
_Z21__device_stub__reducePiS_: # @_Z21__device_stub__reducePiS_
.cfi_startproc
# %bb.0:
subq $88, %rsp
.cfi_def_cfa_offset 96
movq %rdi, 56(%rsp)
movq %rsi, 48(%rsp)
leaq 56(%rsp), %rax
movq %rax, 64(%rsp)
leaq 48(%rsp), %rax
movq %rax, 72(%rsp)
leaq 32(%rsp), %rdi
leaq 16(%rsp), %rsi
leaq 8(%rsp), %rdx
movq %rsp, %rcx
callq __hipPopCallConfiguration
movq 32(%rsp), %rsi
movl 40(%rsp), %edx
movq 16(%rsp), %rcx
movl 24(%rsp), %r8d
leaq 64(%rsp), %r9
movl $_Z6reducePiS_, %edi
pushq (%rsp)
.cfi_adjust_cfa_offset 8
pushq 16(%rsp)
.cfi_adjust_cfa_offset 8
callq hipLaunchKernel
addq $104, %rsp
.cfi_adjust_cfa_offset -104
retq
.Lfunc_end0:
.size _Z21__device_stub__reducePiS_, .Lfunc_end0-_Z21__device_stub__reducePiS_
.cfi_endproc
# -- End function
.section .rodata.cst8,"aM",@progbits,8
.p2align 3, 0x0 # -- Begin function main
.LCPI1_0:
.quad 0x4150000000000000 # double 4194304
.section .rodata.cst4,"aM",@progbits,4
.p2align 2, 0x0
.LCPI1_1:
.long 0x447a0000 # float 1000
.LCPI1_2:
.long 0x4b800000 # float 16777216
.LCPI1_3:
.long 0x3a800000 # float 9.765625E-4
.text
.globl main
.p2align 4, 0x90
.type main,@function
main: # @main
.cfi_startproc
# %bb.0:
pushq %rbp
.cfi_def_cfa_offset 16
pushq %r15
.cfi_def_cfa_offset 24
pushq %r14
.cfi_def_cfa_offset 32
pushq %r13
.cfi_def_cfa_offset 40
pushq %r12
.cfi_def_cfa_offset 48
pushq %rbx
.cfi_def_cfa_offset 56
subq $1592, %rsp # imm = 0x638
.cfi_def_cfa_offset 1648
.cfi_offset %rbx, -56
.cfi_offset %r12, -48
.cfi_offset %r13, -40
.cfi_offset %r14, -32
.cfi_offset %r15, -24
.cfi_offset %rbp, -16
movq %rsi, %r14
movl $16777216, %edi # imm = 0x1000000
callq malloc
movq %rax, %rbx
movq 8(%r14), %rdi
movl $.L.str, %esi
callq fopen
testq %rax, %rax
je .LBB1_13
# %bb.1: # %.preheader.preheader
movq %rax, %r14
xorl %r15d, %r15d
.p2align 4, 0x90
.LBB1_2: # %.preheader
# =>This Inner Loop Header: Depth=1
leaq (%rbx,%r15), %rdx
movl $.L.str.2, %esi
movq %r14, %rdi
xorl %eax, %eax
callq __isoc23_fscanf
addq $4, %r15
cmpq $16777216, %r15 # imm = 0x1000000
jne .LBB1_2
# %bb.3:
movabsq $4294967296, %r12 # imm = 0x100000000
movq %r14, %rdi
callq fclose
leaq 48(%rsp), %rdi
movl $16777216, %esi # imm = 0x1000000
callq hipMalloc
movq 48(%rsp), %rdi
movl $16777216, %edx # imm = 0x1000000
movq %rbx, %rsi
movl $1, %ecx
callq hipMemcpy
leaq 120(%rsp), %rdi
xorl %esi, %esi
callq hipGetDevicePropertiesR0600
movl 440(%rsp), %ebx
cmpl $4194304, %ebx # imm = 0x400000
movl $4194304, %ebp # imm = 0x400000
cmovll %ebx, %ebp
cvtsi2sd %ebp, %xmm1
movsd .LCPI1_0(%rip), %xmm0 # xmm0 = mem[0],zero
divsd %xmm1, %xmm0
callq ceil@PLT
cvttsd2si %xmm0, %r14d
movslq %r14d, %rsi
shlq $2, %rsi
leaq 24(%rsp), %rdi
callq hipMalloc
xorl %edi, %edi
callq hipSetDevice
leaq (%r14,%r12), %r15
addq %rbp, %r12
shll $2, %ebp
leaq 8(%rsp), %rdi
callq hipEventCreate
movq %rsp, %rdi
callq hipEventCreate
movq 8(%rsp), %rdi
xorl %esi, %esi
callq hipEventRecord
movslq %ebp, %r8
movq %r15, %rdi
movl $1, %esi
movq %r12, %rdx
movl $1, %ecx
xorl %r9d, %r9d
callq __hipPushCallConfiguration
testl %eax, %eax
jne .LBB1_5
# %bb.4:
movq 48(%rsp), %rax
movq 24(%rsp), %rcx
movq %rax, 112(%rsp)
movq %rcx, 104(%rsp)
leaq 112(%rsp), %rax
movq %rax, 32(%rsp)
leaq 104(%rsp), %rax
movq %rax, 40(%rsp)
leaq 88(%rsp), %rdi
leaq 72(%rsp), %rsi
leaq 64(%rsp), %rdx
leaq 56(%rsp), %rcx
callq __hipPopCallConfiguration
movq 88(%rsp), %rsi
movl 96(%rsp), %edx
movq 72(%rsp), %rcx
movl 80(%rsp), %r8d
leaq 32(%rsp), %r9
movl $_Z6reducePiS_, %edi
pushq 56(%rsp)
.cfi_adjust_cfa_offset 8
pushq 72(%rsp)
.cfi_adjust_cfa_offset 8
callq hipLaunchKernel
addq $16, %rsp
.cfi_adjust_cfa_offset -16
.LBB1_5:
callq hipDeviceSynchronize
movq (%rsp), %rdi
xorl %esi, %esi
callq hipEventRecord
movq (%rsp), %rdi
callq hipEventSynchronize
movq 8(%rsp), %rsi
movq (%rsp), %rdx
leaq 20(%rsp), %rdi
callq hipEventElapsedTime
xorpd %xmm0, %xmm0
addss 20(%rsp), %xmm0
movss %xmm0, 16(%rsp) # 4-byte Spill
movq 8(%rsp), %rdi
callq hipEventDestroy
movq (%rsp), %rdi
callq hipEventDestroy
cmpl %r14d, %ebx
xorps %xmm0, %xmm0
cvtsi2sd %r14d, %xmm0
cmovll %ebx, %r14d
xorps %xmm1, %xmm1
cvtsi2sd %r14d, %xmm1
divsd %xmm1, %xmm0
callq ceil@PLT
cvttsd2si %xmm0, %r15d
jmp .LBB1_6
.p2align 4, 0x90
.LBB1_11: # in Loop: Header=BB1_6 Depth=1
cmpl $1, %r15d
movl %eax, %r15d
je .LBB1_12
.LBB1_6: # =>This Inner Loop Header: Depth=1
testl %r15d, %r15d
jle .LBB1_12
# %bb.7: # in Loop: Header=BB1_6 Depth=1
movl %r15d, %ebp
movabsq $4294967296, %rax # imm = 0x100000000
orq %rax, %rbp
movl %r14d, %r12d
orq %rax, %r12
leal (,%r14,4), %r13d
leaq 8(%rsp), %rdi
callq hipEventCreate
movq %rsp, %rdi
callq hipEventCreate
movq 8(%rsp), %rdi
xorl %esi, %esi
callq hipEventRecord
movslq %r13d, %r8
movq %rbp, %rdi
movl $1, %esi
movq %r12, %rdx
movl $1, %ecx
xorl %r9d, %r9d
callq __hipPushCallConfiguration
testl %eax, %eax
jne .LBB1_9
# %bb.8: # in Loop: Header=BB1_6 Depth=1
movq 24(%rsp), %rax
movq %rax, 112(%rsp)
movq %rax, 104(%rsp)
leaq 112(%rsp), %rax
movq %rax, 32(%rsp)
leaq 104(%rsp), %rax
movq %rax, 40(%rsp)
leaq 88(%rsp), %rdi
leaq 72(%rsp), %rsi
leaq 64(%rsp), %rdx
leaq 56(%rsp), %rcx
callq __hipPopCallConfiguration
movq 88(%rsp), %rsi
movl 96(%rsp), %edx
movq 72(%rsp), %rcx
movl 80(%rsp), %r8d
movl $_Z6reducePiS_, %edi
leaq 32(%rsp), %r9
pushq 56(%rsp)
.cfi_adjust_cfa_offset 8
pushq 72(%rsp)
.cfi_adjust_cfa_offset 8
callq hipLaunchKernel
addq $16, %rsp
.cfi_adjust_cfa_offset -16
.LBB1_9: # in Loop: Header=BB1_6 Depth=1
callq hipDeviceSynchronize
movq (%rsp), %rdi
xorl %esi, %esi
callq hipEventRecord
movq (%rsp), %rdi
callq hipEventSynchronize
movq 8(%rsp), %rsi
movq (%rsp), %rdx
leaq 20(%rsp), %rdi
callq hipEventElapsedTime
movss 16(%rsp), %xmm0 # 4-byte Reload
# xmm0 = mem[0],zero,zero,zero
addss 20(%rsp), %xmm0
movss %xmm0, 16(%rsp) # 4-byte Spill
movq 8(%rsp), %rdi
callq hipEventDestroy
movq (%rsp), %rdi
callq hipEventDestroy
movl $1, %eax
cmpl $1, %r15d
je .LBB1_11
# %bb.10: # in Loop: Header=BB1_6 Depth=1
cmpl %ebx, %r15d
movl %ebx, %r14d
cmovll %r15d, %r14d
xorps %xmm0, %xmm0
cvtsi2sd %r15d, %xmm0
xorps %xmm1, %xmm1
cvtsi2sd %r14d, %xmm1
divsd %xmm1, %xmm0
callq ceil@PLT
cvttsd2si %xmm0, %eax
jmp .LBB1_11
.LBB1_12:
movq 24(%rsp), %rsi
leaq 32(%rsp), %rdi
movl $4, %edx
movl $2, %ecx
callq hipMemcpy
movq 48(%rsp), %rdi
callq hipFree
movq 24(%rsp), %rdi
callq hipFree
movq 24(%rsp), %rdi
callq hipFree
movss 16(%rsp), %xmm2 # 4-byte Reload
# xmm2 = mem[0],zero,zero,zero
xorps %xmm0, %xmm0
cvtss2sd %xmm2, %xmm0
divss .LCPI1_1(%rip), %xmm2
movss .LCPI1_2(%rip), %xmm1 # xmm1 = mem[0],zero,zero,zero
divss %xmm2, %xmm1
movss .LCPI1_3(%rip), %xmm2 # xmm2 = mem[0],zero,zero,zero
mulss %xmm2, %xmm1
mulss %xmm2, %xmm1
mulss %xmm2, %xmm1
movl 32(%rsp), %esi
cvtss2sd %xmm1, %xmm1
movl $.L.str.3, %edi
movb $2, %al
callq printf
xorl %eax, %eax
addq $1592, %rsp # imm = 0x638
.cfi_def_cfa_offset 56
popq %rbx
.cfi_def_cfa_offset 48
popq %r12
.cfi_def_cfa_offset 40
popq %r13
.cfi_def_cfa_offset 32
popq %r14
.cfi_def_cfa_offset 24
popq %r15
.cfi_def_cfa_offset 16
popq %rbp
.cfi_def_cfa_offset 8
retq
.LBB1_13:
.cfi_def_cfa_offset 1648
movl $.Lstr, %edi
callq puts@PLT
xorl %edi, %edi
callq exit
.Lfunc_end1:
.size main, .Lfunc_end1-main
.cfi_endproc
# -- End function
.p2align 4, 0x90 # -- Begin function __hip_module_ctor
.type __hip_module_ctor,@function
__hip_module_ctor: # @__hip_module_ctor
.cfi_startproc
# %bb.0:
subq $40, %rsp
.cfi_def_cfa_offset 48
cmpq $0, __hip_gpubin_handle(%rip)
jne .LBB2_2
# %bb.1:
movl $__hip_fatbin_wrapper, %edi
callq __hipRegisterFatBinary
movq %rax, __hip_gpubin_handle(%rip)
.LBB2_2:
movq __hip_gpubin_handle(%rip), %rdi
xorps %xmm0, %xmm0
movups %xmm0, 16(%rsp)
movups %xmm0, (%rsp)
movl $_Z6reducePiS_, %esi
movl $.L__unnamed_1, %edx
movl $.L__unnamed_1, %ecx
movl $-1, %r8d
xorl %r9d, %r9d
callq __hipRegisterFunction
movl $__hip_module_dtor, %edi
addq $40, %rsp
.cfi_def_cfa_offset 8
jmp atexit # TAILCALL
.Lfunc_end2:
.size __hip_module_ctor, .Lfunc_end2-__hip_module_ctor
.cfi_endproc
# -- End function
.p2align 4, 0x90 # -- Begin function __hip_module_dtor
.type __hip_module_dtor,@function
__hip_module_dtor: # @__hip_module_dtor
.cfi_startproc
# %bb.0:
movq __hip_gpubin_handle(%rip), %rdi
testq %rdi, %rdi
je .LBB3_2
# %bb.1:
pushq %rax
.cfi_def_cfa_offset 16
callq __hipUnregisterFatBinary
movq $0, __hip_gpubin_handle(%rip)
addq $8, %rsp
.cfi_def_cfa_offset 8
.LBB3_2:
retq
.Lfunc_end3:
.size __hip_module_dtor, .Lfunc_end3-__hip_module_dtor
.cfi_endproc
# -- End function
.type _Z6reducePiS_,@object # @_Z6reducePiS_
.section .rodata,"a",@progbits
.globl _Z6reducePiS_
.p2align 3, 0x0
_Z6reducePiS_:
.quad _Z21__device_stub__reducePiS_
.size _Z6reducePiS_, 8
.type .L.str,@object # @.str
.section .rodata.str1.1,"aMS",@progbits,1
.L.str:
.asciz "rb"
.size .L.str, 3
.type .L.str.2,@object # @.str.2
.L.str.2:
.asciz "%d"
.size .L.str.2, 3
.type .L.str.3,@object # @.str.3
.L.str.3:
.asciz "%d %fms %fGB/s\n"
.size .L.str.3, 16
.type .L__unnamed_1,@object # @0
.L__unnamed_1:
.asciz "_Z6reducePiS_"
.size .L__unnamed_1, 14
.type __hip_fatbin_wrapper,@object # @__hip_fatbin_wrapper
.section .hipFatBinSegment,"a",@progbits
.p2align 3, 0x0
__hip_fatbin_wrapper:
.long 1212764230 # 0x48495046
.long 1 # 0x1
.quad __hip_fatbin
.quad 0
.size __hip_fatbin_wrapper, 24
.type __hip_gpubin_handle,@object # @__hip_gpubin_handle
.local __hip_gpubin_handle
.comm __hip_gpubin_handle,8,8
.section .init_array,"aw",@init_array
.p2align 3, 0x0
.quad __hip_module_ctor
.type __hip_cuid_,@object # @__hip_cuid_
.bss
.globl __hip_cuid_
__hip_cuid_:
.byte 0 # 0x0
.size __hip_cuid_, 1
.type .Lstr,@object # @str
.section .rodata.str1.1,"aMS",@progbits,1
.Lstr:
.asciz "Can not open input file!"
.size .Lstr, 25
.section ".linker-options","e",@llvm_linker_options
.ident "AMD clang version 18.0.0git (https://github.com/RadeonOpenCompute/llvm-project roc-6.3.2 25012 e5bf7e55c91490b07c49d8960fa7983d864936c4)"
.section ".note.GNU-stack","",@progbits
.addrsig
.addrsig_sym _Z21__device_stub__reducePiS_
.addrsig_sym __hip_module_ctor
.addrsig_sym __hip_module_dtor
.addrsig_sym _Z6reducePiS_
.addrsig_sym __hip_fatbin
.addrsig_sym __hip_fatbin_wrapper
.addrsig_sym __hip_cuid_ |
You are a helpful coding assistant specialized in converting from CUDA device assembly to AMD device assembly. | code for sm_80
Function : _Z6reducePiS_
.headerflags @"EF_CUDA_TEXMODE_UNIFIED EF_CUDA_64BIT_ADDRESS EF_CUDA_SM80 EF_CUDA_VIRTUAL_SM(EF_CUDA_SM80)"
/*0000*/ IMAD.MOV.U32 R1, RZ, RZ, c[0x0][0x28] ; /* 0x00000a00ff017624 */
/* 0x000fe400078e00ff */
/*0010*/ S2R R6, SR_CTAID.X ; /* 0x0000000000067919 */
/* 0x000e220000002500 */
/*0020*/ HFMA2.MMA R3, -RZ, RZ, 0, 2.384185791015625e-07 ; /* 0x00000004ff037435 */
/* 0x000fe200000001ff */
/*0030*/ ULDC.64 UR4, c[0x0][0x118] ; /* 0x0000460000047ab9 */
/* 0x000fe40000000a00 */
/*0040*/ S2R R7, SR_TID.X ; /* 0x0000000000077919 */
/* 0x000e240000002100 */
/*0050*/ IMAD R2, R6, c[0x0][0x0], R7 ; /* 0x0000000006027a24 */
/* 0x001fca00078e0207 */
/*0060*/ IMAD.WIDE.U32 R2, R2, R3, c[0x0][0x160] ; /* 0x0000580002027625 */
/* 0x000fcc00078e0003 */
/*0070*/ LDG.E R2, [R2.64] ; /* 0x0000000402027981 */
/* 0x000ea2000c1e1900 */
/*0080*/ IMAD.MOV.U32 R0, RZ, RZ, c[0x0][0x0] ; /* 0x00000000ff007624 */
/* 0x000fe200078e00ff */
/*0090*/ ISETP.NE.AND P0, PT, R7, RZ, PT ; /* 0x000000ff0700720c */
/* 0x000fc80003f05270 */
/*00a0*/ ISETP.GE.U32.AND P1, PT, R0, 0x2, PT ; /* 0x000000020000780c */
/* 0x000fe20003f26070 */
/*00b0*/ STS [R7.X4], R2 ; /* 0x0000000207007388 */
/* 0x0041e80000004800 */
/*00c0*/ BAR.SYNC.DEFER_BLOCKING 0x0 ; /* 0x0000000000007b1d */
/* 0x000ff00000010000 */
/*00d0*/ @!P1 BRA 0x2c0 ; /* 0x000001e000009947 */
/* 0x000fea0003800000 */
/*00e0*/ SHF.L.U32 R0, R7, 0x2, RZ ; /* 0x0000000207007819 */
/* 0x001fe200000006ff */
/*00f0*/ IMAD.MOV.U32 R5, RZ, RZ, 0x1 ; /* 0x00000001ff057424 */
/* 0x000fca00078e00ff */
/*0100*/ SHF.L.U32 R10, R5, 0x1, RZ ; /* 0x00000001050a7819 */
/* 0x000fc800000006ff */
/*0110*/ I2F.U32.RP R4, R10 ; /* 0x0000000a00047306 */
/* 0x000e220000209000 */
/*0120*/ IMAD.MOV R9, RZ, RZ, -R10 ; /* 0x000000ffff097224 */
/* 0x000fe200078e0a0a */
/*0130*/ ISETP.NE.U32.AND P2, PT, R10, RZ, PT ; /* 0x000000ff0a00720c */
/* 0x000fcc0003f45070 */
/*0140*/ MUFU.RCP R4, R4 ; /* 0x0000000400047308 */
/* 0x001e240000001000 */
/*0150*/ IADD3 R2, R4, 0xffffffe, RZ ; /* 0x0ffffffe04027810 */
/* 0x001fcc0007ffe0ff */
/*0160*/ F2I.FTZ.U32.TRUNC.NTZ R3, R2 ; /* 0x0000000200037305 */
/* 0x000064000021f000 */
/*0170*/ HFMA2.MMA R2, -RZ, RZ, 0, 0 ; /* 0x00000000ff027435 */
/* 0x001fe200000001ff */
/*0180*/ IMAD R9, R9, R3, RZ ; /* 0x0000000309097224 */
/* 0x002fd200078e02ff */
/*0190*/ IMAD.HI.U32 R3, R3, R9, R2 ; /* 0x0000000903037227 */
/* 0x000fcc00078e0002 */
/*01a0*/ IMAD.HI.U32 R3, R3, R7, RZ ; /* 0x0000000703037227 */
/* 0x000fc800078e00ff */
/*01b0*/ IMAD.MOV R8, RZ, RZ, -R3 ; /* 0x000000ffff087224 */
/* 0x000fc800078e0a03 */
/*01c0*/ IMAD R3, R10, R8, R7 ; /* 0x000000080a037224 */
/* 0x000fca00078e0207 */
/*01d0*/ ISETP.GE.U32.AND P1, PT, R3, R10, PT ; /* 0x0000000a0300720c */
/* 0x000fda0003f26070 */
/*01e0*/ @P1 IADD3 R3, -R10, R3, RZ ; /* 0x000000030a031210 */
/* 0x000fc80007ffe1ff */
/*01f0*/ ISETP.GE.U32.AND P1, PT, R3, R10, PT ; /* 0x0000000a0300720c */
/* 0x000fda0003f26070 */
/*0200*/ @P1 IMAD.IADD R3, R3, 0x1, -R10 ; /* 0x0000000103031824 */
/* 0x000fe200078e0a0a */
/*0210*/ @!P2 LOP3.LUT R3, RZ, R10, RZ, 0x33, !PT ; /* 0x0000000aff03a212 */
/* 0x000fc800078e33ff */
/*0220*/ ISETP.NE.AND P1, PT, R3, RZ, PT ; /* 0x000000ff0300720c */
/* 0x000fda0003f25270 */
/*0230*/ @!P1 LEA R2, R5, R0, 0x2 ; /* 0x0000000005029211 */
/* 0x000fe200078e10ff */
/*0240*/ @!P1 LDS R3, [R7.X4] ; /* 0x0000000007039984 */
/* 0x000fe20000004800 */
/*0250*/ MOV R5, R10 ; /* 0x0000000a00057202 */
/* 0x000fc80000000f00 */
/*0260*/ @!P1 LDS R2, [R2] ; /* 0x0000000002029984 */
/* 0x000e240000000800 */
/*0270*/ @!P1 IMAD.IADD R3, R3, 0x1, R2 ; /* 0x0000000103039824 */
/* 0x001fca00078e0202 */
/*0280*/ @!P1 STS [R7.X4], R3 ; /* 0x0000000307009388 */
/* 0x0001e80000004800 */
/*0290*/ BAR.SYNC.DEFER_BLOCKING 0x0 ; /* 0x0000000000007b1d */
/* 0x000fe20000010000 */
/*02a0*/ ISETP.GE.U32.AND P1, PT, R10, c[0x0][0x0], PT ; /* 0x000000000a007a0c */
/* 0x000fda0003f26070 */
/*02b0*/ @!P1 BRA 0x100 ; /* 0xfffffe4000009947 */
/* 0x001fea000383ffff */
/*02c0*/ @P0 EXIT ; /* 0x000000000000094d */
/* 0x001fea0003800000 */
/*02d0*/ LDS R5, [RZ] ; /* 0x00000000ff057984 */
/* 0x000e220000000800 */
/*02e0*/ IMAD.MOV.U32 R3, RZ, RZ, 0x4 ; /* 0x00000004ff037424 */
/* 0x000fc800078e00ff */
/*02f0*/ IMAD.WIDE.U32 R2, R6, R3, c[0x0][0x168] ; /* 0x00005a0006027625 */
/* 0x000fca00078e0003 */
/*0300*/ STG.E [R2.64], R5 ; /* 0x0000000502007986 */
/* 0x001fe2000c101904 */
/*0310*/ EXIT ; /* 0x000000000000794d */
/* 0x000fea0003800000 */
/*0320*/ BRA 0x320; /* 0xfffffff000007947 */
/* 0x000fc0000383ffff */
/*0330*/ NOP; /* 0x0000000000007918 */
/* 0x000fc00000000000 */
/*0340*/ NOP; /* 0x0000000000007918 */
/* 0x000fc00000000000 */
/*0350*/ NOP; /* 0x0000000000007918 */
/* 0x000fc00000000000 */
/*0360*/ NOP; /* 0x0000000000007918 */
/* 0x000fc00000000000 */
/*0370*/ NOP; /* 0x0000000000007918 */
/* 0x000fc00000000000 */
/*0380*/ NOP; /* 0x0000000000007918 */
/* 0x000fc00000000000 */
/*0390*/ NOP; /* 0x0000000000007918 */
/* 0x000fc00000000000 */
/*03a0*/ NOP; /* 0x0000000000007918 */
/* 0x000fc00000000000 */
/*03b0*/ NOP; /* 0x0000000000007918 */
/* 0x000fc00000000000 */
/*03c0*/ NOP; /* 0x0000000000007918 */
/* 0x000fc00000000000 */
/*03d0*/ NOP; /* 0x0000000000007918 */
/* 0x000fc00000000000 */
/*03e0*/ NOP; /* 0x0000000000007918 */
/* 0x000fc00000000000 */
/*03f0*/ NOP; /* 0x0000000000007918 */
/* 0x000fc00000000000 */
.......... | .text
.amdgcn_target "amdgcn-amd-amdhsa--gfx1100"
.protected _Z6reducePiS_
.globl _Z6reducePiS_
.p2align 8
.type _Z6reducePiS_,@function
_Z6reducePiS_:
s_clause 0x1
s_load_b32 s3, s[0:1], 0x1c
s_load_b64 s[4:5], s[0:1], 0x0
s_mov_b32 s2, s15
s_waitcnt lgkmcnt(0)
s_and_b32 s3, s3, 0xffff
s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_2) | instid1(VALU_DEP_1)
v_mad_u64_u32 v[1:2], null, s2, s3, v[0:1]
v_mov_b32_e32 v2, 0
s_cmp_lt_u32 s3, 2
v_lshlrev_b64 v[1:2], 2, v[1:2]
s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_2)
v_add_co_u32 v1, vcc_lo, s4, v1
v_add_co_ci_u32_e32 v2, vcc_lo, s5, v2, vcc_lo
global_load_b32 v2, v[1:2], off
v_lshl_add_u32 v1, v0, 2, 0
s_waitcnt vmcnt(0)
ds_store_b32 v1, v2
s_waitcnt lgkmcnt(0)
s_barrier
buffer_gl0_inv
s_cbranch_scc1 .LBB0_5
s_mov_b32 s5, 1
s_branch .LBB0_3
.p2align 6
.LBB0_2:
s_or_b32 exec_lo, exec_lo, s6
s_cmp_ge_u32 s4, s3
s_mov_b32 s5, s4
s_waitcnt lgkmcnt(0)
s_barrier
buffer_gl0_inv
s_cbranch_scc1 .LBB0_5
.LBB0_3:
s_lshl_b32 s4, s5, 1
s_delay_alu instid0(SALU_CYCLE_1) | instskip(NEXT) | instid1(SALU_CYCLE_1)
s_add_i32 s6, s4, -1
v_and_b32_e32 v2, s6, v0
s_mov_b32 s6, exec_lo
s_delay_alu instid0(VALU_DEP_1)
v_cmpx_eq_u32_e32 0, v2
s_cbranch_execz .LBB0_2
v_add_nc_u32_e32 v2, s5, v0
s_delay_alu instid0(VALU_DEP_1)
v_lshl_add_u32 v2, v2, 2, 0
ds_load_b32 v2, v2
ds_load_b32 v3, v1
s_waitcnt lgkmcnt(0)
v_add_nc_u32_e32 v2, v3, v2
ds_store_b32 v1, v2
s_branch .LBB0_2
.LBB0_5:
s_mov_b32 s3, exec_lo
v_cmpx_eq_u32_e32 0, v0
s_cbranch_execz .LBB0_7
v_dual_mov_b32 v0, 0 :: v_dual_mov_b32 v1, 0
s_load_b64 s[0:1], s[0:1], 0x8
s_mov_b32 s3, 0
s_delay_alu instid0(SALU_CYCLE_1)
s_lshl_b64 s[2:3], s[2:3], 2
ds_load_b32 v0, v0
s_waitcnt lgkmcnt(0)
s_add_u32 s0, s0, s2
s_addc_u32 s1, s1, s3
global_store_b32 v1, v0, s[0:1]
.LBB0_7:
s_nop 0
s_sendmsg sendmsg(MSG_DEALLOC_VGPRS)
s_endpgm
.section .rodata,"a",@progbits
.p2align 6, 0x0
.amdhsa_kernel _Z6reducePiS_
.amdhsa_group_segment_fixed_size 0
.amdhsa_private_segment_fixed_size 0
.amdhsa_kernarg_size 272
.amdhsa_user_sgpr_count 15
.amdhsa_user_sgpr_dispatch_ptr 0
.amdhsa_user_sgpr_queue_ptr 0
.amdhsa_user_sgpr_kernarg_segment_ptr 1
.amdhsa_user_sgpr_dispatch_id 0
.amdhsa_user_sgpr_private_segment_size 0
.amdhsa_wavefront_size32 1
.amdhsa_uses_dynamic_stack 0
.amdhsa_enable_private_segment 0
.amdhsa_system_sgpr_workgroup_id_x 1
.amdhsa_system_sgpr_workgroup_id_y 0
.amdhsa_system_sgpr_workgroup_id_z 0
.amdhsa_system_sgpr_workgroup_info 0
.amdhsa_system_vgpr_workitem_id 0
.amdhsa_next_free_vgpr 4
.amdhsa_next_free_sgpr 16
.amdhsa_float_round_mode_32 0
.amdhsa_float_round_mode_16_64 0
.amdhsa_float_denorm_mode_32 3
.amdhsa_float_denorm_mode_16_64 3
.amdhsa_dx10_clamp 1
.amdhsa_ieee_mode 1
.amdhsa_fp16_overflow 0
.amdhsa_workgroup_processor_mode 1
.amdhsa_memory_ordered 1
.amdhsa_forward_progress 0
.amdhsa_shared_vgpr_count 0
.amdhsa_exception_fp_ieee_invalid_op 0
.amdhsa_exception_fp_denorm_src 0
.amdhsa_exception_fp_ieee_div_zero 0
.amdhsa_exception_fp_ieee_overflow 0
.amdhsa_exception_fp_ieee_underflow 0
.amdhsa_exception_fp_ieee_inexact 0
.amdhsa_exception_int_div_zero 0
.end_amdhsa_kernel
.text
.Lfunc_end0:
.size _Z6reducePiS_, .Lfunc_end0-_Z6reducePiS_
.section .AMDGPU.csdata,"",@progbits
.text
.p2alignl 7, 3214868480
.fill 96, 4, 3214868480
.type __hip_cuid_,@object
.section .bss,"aw",@nobits
.globl __hip_cuid_
__hip_cuid_:
.byte 0
.size __hip_cuid_, 1
.ident "AMD clang version 18.0.0git (https://github.com/RadeonOpenCompute/llvm-project roc-6.3.2 25012 e5bf7e55c91490b07c49d8960fa7983d864936c4)"
.section ".note.GNU-stack","",@progbits
.addrsig
.addrsig_sym __hip_cuid_
.amdgpu_metadata
---
amdhsa.kernels:
- .args:
- .address_space: global
.offset: 0
.size: 8
.value_kind: global_buffer
- .address_space: global
.offset: 8
.size: 8
.value_kind: global_buffer
- .offset: 16
.size: 4
.value_kind: hidden_block_count_x
- .offset: 20
.size: 4
.value_kind: hidden_block_count_y
- .offset: 24
.size: 4
.value_kind: hidden_block_count_z
- .offset: 28
.size: 2
.value_kind: hidden_group_size_x
- .offset: 30
.size: 2
.value_kind: hidden_group_size_y
- .offset: 32
.size: 2
.value_kind: hidden_group_size_z
- .offset: 34
.size: 2
.value_kind: hidden_remainder_x
- .offset: 36
.size: 2
.value_kind: hidden_remainder_y
- .offset: 38
.size: 2
.value_kind: hidden_remainder_z
- .offset: 56
.size: 8
.value_kind: hidden_global_offset_x
- .offset: 64
.size: 8
.value_kind: hidden_global_offset_y
- .offset: 72
.size: 8
.value_kind: hidden_global_offset_z
- .offset: 80
.size: 2
.value_kind: hidden_grid_dims
- .offset: 136
.size: 4
.value_kind: hidden_dynamic_lds_size
.group_segment_fixed_size: 0
.kernarg_segment_align: 8
.kernarg_segment_size: 272
.language: OpenCL C
.language_version:
- 2
- 0
.max_flat_workgroup_size: 1024
.name: _Z6reducePiS_
.private_segment_fixed_size: 0
.sgpr_count: 18
.sgpr_spill_count: 0
.symbol: _Z6reducePiS_.kd
.uniform_work_group_size: 1
.uses_dynamic_stack: false
.vgpr_count: 4
.vgpr_spill_count: 0
.wavefront_size: 32
.workgroup_processor_mode: 1
amdhsa.target: amdgcn-amd-amdhsa--gfx1100
amdhsa.version:
- 1
- 2
...
.end_amdgpu_metadata |
You are a helpful coding assistant specialized in converting from CUDA host assembly to AMD host assembly. | .file "tmpxft_0010a9f5_00000000-6_V1.cudafe1.cpp"
.text
#APP
#NO_APP
.type _ZL26__cudaUnregisterBinaryUtilv, @function
_ZL26__cudaUnregisterBinaryUtilv:
.LFB2060:
.cfi_startproc
endbr64
subq $8, %rsp
.cfi_def_cfa_offset 16
movq _ZL20__cudaFatCubinHandle(%rip), %rdi
call __cudaUnregisterFatBinary@PLT
addq $8, %rsp
.cfi_def_cfa_offset 8
ret
.cfi_endproc
.LFE2060:
.size _ZL26__cudaUnregisterBinaryUtilv, .-_ZL26__cudaUnregisterBinaryUtilv
.globl _Z27__device_stub__Z6reducePiS_PiS_
.type _Z27__device_stub__Z6reducePiS_PiS_, @function
_Z27__device_stub__Z6reducePiS_PiS_:
.LFB2082:
.cfi_startproc
endbr64
subq $120, %rsp
.cfi_def_cfa_offset 128
movq %rdi, 8(%rsp)
movq %rsi, (%rsp)
movq %fs:40, %rax
movq %rax, 104(%rsp)
xorl %eax, %eax
leaq 8(%rsp), %rax
movq %rax, 80(%rsp)
movq %rsp, %rax
movq %rax, 88(%rsp)
movl $1, 32(%rsp)
movl $1, 36(%rsp)
movl $1, 40(%rsp)
movl $1, 44(%rsp)
movl $1, 48(%rsp)
movl $1, 52(%rsp)
leaq 24(%rsp), %rcx
leaq 16(%rsp), %rdx
leaq 44(%rsp), %rsi
leaq 32(%rsp), %rdi
call __cudaPopCallConfiguration@PLT
testl %eax, %eax
je .L7
.L3:
movq 104(%rsp), %rax
subq %fs:40, %rax
jne .L8
addq $120, %rsp
.cfi_remember_state
.cfi_def_cfa_offset 8
ret
.L7:
.cfi_restore_state
pushq 24(%rsp)
.cfi_def_cfa_offset 136
pushq 24(%rsp)
.cfi_def_cfa_offset 144
leaq 96(%rsp), %r9
movq 60(%rsp), %rcx
movl 68(%rsp), %r8d
movq 48(%rsp), %rsi
movl 56(%rsp), %edx
leaq _Z6reducePiS_(%rip), %rdi
call cudaLaunchKernel@PLT
addq $16, %rsp
.cfi_def_cfa_offset 128
jmp .L3
.L8:
call __stack_chk_fail@PLT
.cfi_endproc
.LFE2082:
.size _Z27__device_stub__Z6reducePiS_PiS_, .-_Z27__device_stub__Z6reducePiS_PiS_
.globl _Z6reducePiS_
.type _Z6reducePiS_, @function
_Z6reducePiS_:
.LFB2083:
.cfi_startproc
endbr64
subq $8, %rsp
.cfi_def_cfa_offset 16
call _Z27__device_stub__Z6reducePiS_PiS_
addq $8, %rsp
.cfi_def_cfa_offset 8
ret
.cfi_endproc
.LFE2083:
.size _Z6reducePiS_, .-_Z6reducePiS_
.section .rodata.str1.1,"aMS",@progbits,1
.LC0:
.string "rb"
.LC1:
.string "Can not open input file!\n"
.LC2:
.string "%d"
.LC11:
.string "%d %fms %fGB/s\n"
.text
.globl main
.type main, @function
main:
.LFB2057:
.cfi_startproc
endbr64
pushq %r14
.cfi_def_cfa_offset 16
.cfi_offset 14, -16
pushq %r13
.cfi_def_cfa_offset 24
.cfi_offset 13, -24
pushq %r12
.cfi_def_cfa_offset 32
.cfi_offset 12, -32
pushq %rbp
.cfi_def_cfa_offset 40
.cfi_offset 6, -40
pushq %rbx
.cfi_def_cfa_offset 48
.cfi_offset 3, -48
subq $1152, %rsp
.cfi_def_cfa_offset 1200
movq %rsi, %rbx
movq %fs:40, %rax
movq %rax, 1144(%rsp)
xorl %eax, %eax
movl $16777216, %edi
call malloc@PLT
movq %rax, %r14
movq 8(%rbx), %rdi
leaq .LC0(%rip), %rsi
call fopen@PLT
testq %rax, %rax
je .L26
movq %rax, %rbp
movq %r14, %rbx
leaq 16777216(%r14), %r13
leaq .LC2(%rip), %r12
.L13:
movq %rbx, %rdx
movq %r12, %rsi
movq %rbp, %rdi
movl $0, %eax
call __isoc23_fscanf@PLT
addq $4, %rbx
cmpq %rbx, %r13
jne .L13
movq %rbp, %rdi
call fclose@PLT
leaq 32(%rsp), %rdi
movl $16777216, %esi
call cudaMalloc@PLT
movl $1, %ecx
movl $16777216, %edx
movq %r14, %rsi
movq 32(%rsp), %rdi
call cudaMemcpy@PLT
leaq 112(%rsp), %rdi
movl $0, %esi
call cudaGetDeviceProperties_v2@PLT
movl 432(%rsp), %r12d
movl $4194304, %ebx
cmpl %ebx, %r12d
cmovle %r12d, %ebx
pxor %xmm1, %xmm1
cvtsi2sdl %ebx, %xmm1
movsd .LC3(%rip), %xmm0
divsd %xmm1, %xmm0
movapd %xmm0, %xmm3
movsd .LC12(%rip), %xmm2
movapd %xmm0, %xmm1
andpd %xmm2, %xmm1
movsd .LC4(%rip), %xmm4
ucomisd %xmm1, %xmm4
jbe .L14
cvttsd2siq %xmm0, %rax
pxor %xmm1, %xmm1
cvtsi2sdq %rax, %xmm1
cmpnlesd %xmm1, %xmm3
movsd .LC6(%rip), %xmm4
andpd %xmm4, %xmm3
addsd %xmm1, %xmm3
andnpd %xmm0, %xmm2
orpd %xmm2, %xmm3
.L14:
cvttsd2sil %xmm3, %r13d
movslq %r13d, %rsi
salq $2, %rsi
leaq 40(%rsp), %rdi
call cudaMalloc@PLT
movl $0, %edi
call cudaSetDevice@PLT
movl %r13d, 64(%rsp)
movl $1, 68(%rsp)
movl $1, 72(%rsp)
movl %ebx, 76(%rsp)
movl $1, 80(%rsp)
movl $1, 84(%rsp)
leaq 48(%rsp), %rdi
call cudaEventCreate@PLT
leaq 56(%rsp), %rdi
call cudaEventCreate@PLT
movl $0, %esi
movq 48(%rsp), %rdi
call cudaEventRecord@PLT
leal 0(,%rbx,4), %r8d
movl 84(%rsp), %ecx
movl $0, %r9d
movslq %r8d, %r8
movq 76(%rsp), %rdx
movq 64(%rsp), %rdi
movl 72(%rsp), %esi
call __cudaPushCallConfiguration@PLT
testl %eax, %eax
je .L27
.L15:
call cudaDeviceSynchronize@PLT
movl $0, %esi
movq 56(%rsp), %rdi
call cudaEventRecord@PLT
movq 56(%rsp), %rdi
call cudaEventSynchronize@PLT
leaq 28(%rsp), %rdi
movq 56(%rsp), %rdx
movq 48(%rsp), %rsi
call cudaEventElapsedTime@PLT
pxor %xmm0, %xmm0
addss 28(%rsp), %xmm0
movss %xmm0, 12(%rsp)
movq 48(%rsp), %rdi
call cudaEventDestroy@PLT
movq 56(%rsp), %rdi
call cudaEventDestroy@PLT
cmpl %r13d, %r12d
movl %r13d, %ebp
cmovle %r12d, %ebp
pxor %xmm0, %xmm0
cvtsi2sdl %r13d, %xmm0
pxor %xmm1, %xmm1
cvtsi2sdl %ebp, %xmm1
divsd %xmm1, %xmm0
movapd %xmm0, %xmm3
movsd .LC12(%rip), %xmm2
movapd %xmm0, %xmm1
andpd %xmm2, %xmm1
movsd .LC4(%rip), %xmm4
ucomisd %xmm1, %xmm4
jbe .L16
cvttsd2siq %xmm0, %rax
pxor %xmm1, %xmm1
cvtsi2sdq %rax, %xmm1
cmpnlesd %xmm1, %xmm3
movsd .LC6(%rip), %xmm4
andpd %xmm4, %xmm3
addsd %xmm1, %xmm3
andnpd %xmm0, %xmm2
orpd %xmm2, %xmm3
.L16:
cvttsd2sil %xmm3, %ebx
testl %ebx, %ebx
jle .L17
leaq 48(%rsp), %r13
jmp .L21
.L26:
leaq .LC1(%rip), %rsi
movl $2, %edi
movl $0, %eax
call __printf_chk@PLT
movl $0, %edi
call exit@PLT
.L27:
movq 40(%rsp), %rsi
movq 32(%rsp), %rdi
call _Z27__device_stub__Z6reducePiS_PiS_
jmp .L15
.L28:
movq 40(%rsp), %rdi
movq %rdi, %rsi
call _Z27__device_stub__Z6reducePiS_PiS_
jmp .L18
.L20:
cvttsd2sil %xmm3, %ebx
testl %ebx, %ebx
jle .L17
.L21:
movl %ebx, 88(%rsp)
movl $1, 92(%rsp)
movl $1, 96(%rsp)
movl %ebp, 100(%rsp)
movl $1, 104(%rsp)
movl $1, 108(%rsp)
movq %r13, %rdi
call cudaEventCreate@PLT
leaq 56(%rsp), %rdi
call cudaEventCreate@PLT
movl $0, %esi
movq 48(%rsp), %rdi
call cudaEventRecord@PLT
leal 0(,%rbp,4), %r8d
movl 108(%rsp), %ecx
movl $0, %r9d
movslq %r8d, %r8
movq 100(%rsp), %rdx
movq 88(%rsp), %rdi
movl 96(%rsp), %esi
call __cudaPushCallConfiguration@PLT
testl %eax, %eax
je .L28
.L18:
call cudaDeviceSynchronize@PLT
movl $0, %esi
movq 56(%rsp), %rdi
call cudaEventRecord@PLT
movq 56(%rsp), %rdi
call cudaEventSynchronize@PLT
leaq 28(%rsp), %rdi
movq 56(%rsp), %rdx
movq 48(%rsp), %rsi
call cudaEventElapsedTime@PLT
movss 12(%rsp), %xmm5
addss 28(%rsp), %xmm5
movss %xmm5, 12(%rsp)
movq 48(%rsp), %rdi
call cudaEventDestroy@PLT
movq 56(%rsp), %rdi
call cudaEventDestroy@PLT
cmpl $1, %ebx
je .L17
cmpl %ebx, %r12d
movl %ebx, %ebp
cmovle %r12d, %ebp
pxor %xmm0, %xmm0
cvtsi2sdl %ebx, %xmm0
pxor %xmm1, %xmm1
cvtsi2sdl %ebp, %xmm1
divsd %xmm1, %xmm0
movapd %xmm0, %xmm3
movsd .LC5(%rip), %xmm2
movapd %xmm0, %xmm1
andpd %xmm2, %xmm1
movsd .LC4(%rip), %xmm6
ucomisd %xmm1, %xmm6
jbe .L20
cvttsd2siq %xmm0, %rax
pxor %xmm1, %xmm1
cvtsi2sdq %rax, %xmm1
cmpnlesd %xmm1, %xmm3
movsd .LC6(%rip), %xmm7
andpd %xmm7, %xmm3
addsd %xmm1, %xmm3
andnpd %xmm0, %xmm2
orpd %xmm2, %xmm3
jmp .L20
.L17:
leaq 100(%rsp), %rdi
movl $2, %ecx
movl $4, %edx
movq 40(%rsp), %rsi
call cudaMemcpy@PLT
movq 32(%rsp), %rdi
call cudaFree@PLT
movq 40(%rsp), %rdi
call cudaFree@PLT
movq 40(%rsp), %rdi
call cudaFree@PLT
movss 12(%rsp), %xmm4
movaps %xmm4, %xmm0
divss .LC8(%rip), %xmm0
movss .LC9(%rip), %xmm1
divss %xmm0, %xmm1
movss .LC10(%rip), %xmm0
mulss %xmm0, %xmm1
mulss %xmm0, %xmm1
mulss %xmm0, %xmm1
pxor %xmm0, %xmm0
cvtss2sd %xmm4, %xmm0
cvtss2sd %xmm1, %xmm1
movl 100(%rsp), %edx
leaq .LC11(%rip), %rsi
movl $2, %edi
movl $2, %eax
call __printf_chk@PLT
movq 1144(%rsp), %rax
subq %fs:40, %rax
jne .L29
movl $0, %eax
addq $1152, %rsp
.cfi_remember_state
.cfi_def_cfa_offset 48
popq %rbx
.cfi_def_cfa_offset 40
popq %rbp
.cfi_def_cfa_offset 32
popq %r12
.cfi_def_cfa_offset 24
popq %r13
.cfi_def_cfa_offset 16
popq %r14
.cfi_def_cfa_offset 8
ret
.L29:
.cfi_restore_state
call __stack_chk_fail@PLT
.cfi_endproc
.LFE2057:
.size main, .-main
.section .rodata.str1.1
.LC13:
.string "_Z6reducePiS_"
.text
.type _ZL24__sti____cudaRegisterAllv, @function
_ZL24__sti____cudaRegisterAllv:
.LFB2085:
.cfi_startproc
endbr64
subq $8, %rsp
.cfi_def_cfa_offset 16
leaq _ZL15__fatDeviceText(%rip), %rdi
call __cudaRegisterFatBinary@PLT
movq %rax, %rdi
movq %rax, _ZL20__cudaFatCubinHandle(%rip)
pushq $0
.cfi_def_cfa_offset 24
pushq $0
.cfi_def_cfa_offset 32
pushq $0
.cfi_def_cfa_offset 40
pushq $0
.cfi_def_cfa_offset 48
movl $0, %r9d
movl $-1, %r8d
leaq .LC13(%rip), %rdx
movq %rdx, %rcx
leaq _Z6reducePiS_(%rip), %rsi
call __cudaRegisterFunction@PLT
addq $32, %rsp
.cfi_def_cfa_offset 16
movq _ZL20__cudaFatCubinHandle(%rip), %rdi
call __cudaRegisterFatBinaryEnd@PLT
leaq _ZL26__cudaUnregisterBinaryUtilv(%rip), %rdi
call atexit@PLT
addq $8, %rsp
.cfi_def_cfa_offset 8
ret
.cfi_endproc
.LFE2085:
.size _ZL24__sti____cudaRegisterAllv, .-_ZL24__sti____cudaRegisterAllv
.section .init_array,"aw"
.align 8
.quad _ZL24__sti____cudaRegisterAllv
.section .nvFatBinSegment,"aw"
.align 8
.type _ZL15__fatDeviceText, @object
.size _ZL15__fatDeviceText, 24
_ZL15__fatDeviceText:
.long 1180844977
.long 1
.quad fatbinData
.quad 0
.local _ZL20__cudaFatCubinHandle
.comm _ZL20__cudaFatCubinHandle,8,8
.section .rodata.cst8,"aM",@progbits,8
.align 8
.LC3:
.long 0
.long 1095761920
.align 8
.LC4:
.long 0
.long 1127219200
.section .rodata.cst16,"aM",@progbits,16
.align 16
.LC5:
.long -1
.long 2147483647
.long 0
.long 0
.section .rodata.cst8
.align 8
.LC6:
.long 0
.long 1072693248
.section .rodata.cst4,"aM",@progbits,4
.align 4
.LC8:
.long 1148846080
.align 4
.LC9:
.long 1266679808
.align 4
.LC10:
.long 981467136
.set .LC12,.LC5
.ident "GCC: (Ubuntu 13.3.0-6ubuntu2~24.04) 13.3.0"
.section .note.GNU-stack,"",@progbits
.section .note.gnu.property,"a"
.align 8
.long 1f - 0f
.long 4f - 1f
.long 5
0:
.string "GNU"
1:
.align 8
.long 0xc0000002
.long 3f - 2f
2:
.long 0x3
3:
.align 8
4: | .text
.file "V1.hip"
.globl _Z21__device_stub__reducePiS_ # -- Begin function _Z21__device_stub__reducePiS_
.p2align 4, 0x90
.type _Z21__device_stub__reducePiS_,@function
_Z21__device_stub__reducePiS_: # @_Z21__device_stub__reducePiS_
.cfi_startproc
# %bb.0:
subq $88, %rsp
.cfi_def_cfa_offset 96
movq %rdi, 56(%rsp)
movq %rsi, 48(%rsp)
leaq 56(%rsp), %rax
movq %rax, 64(%rsp)
leaq 48(%rsp), %rax
movq %rax, 72(%rsp)
leaq 32(%rsp), %rdi
leaq 16(%rsp), %rsi
leaq 8(%rsp), %rdx
movq %rsp, %rcx
callq __hipPopCallConfiguration
movq 32(%rsp), %rsi
movl 40(%rsp), %edx
movq 16(%rsp), %rcx
movl 24(%rsp), %r8d
leaq 64(%rsp), %r9
movl $_Z6reducePiS_, %edi
pushq (%rsp)
.cfi_adjust_cfa_offset 8
pushq 16(%rsp)
.cfi_adjust_cfa_offset 8
callq hipLaunchKernel
addq $104, %rsp
.cfi_adjust_cfa_offset -104
retq
.Lfunc_end0:
.size _Z21__device_stub__reducePiS_, .Lfunc_end0-_Z21__device_stub__reducePiS_
.cfi_endproc
# -- End function
.section .rodata.cst8,"aM",@progbits,8
.p2align 3, 0x0 # -- Begin function main
.LCPI1_0:
.quad 0x4150000000000000 # double 4194304
.section .rodata.cst4,"aM",@progbits,4
.p2align 2, 0x0
.LCPI1_1:
.long 0x447a0000 # float 1000
.LCPI1_2:
.long 0x4b800000 # float 16777216
.LCPI1_3:
.long 0x3a800000 # float 9.765625E-4
.text
.globl main
.p2align 4, 0x90
.type main,@function
main: # @main
.cfi_startproc
# %bb.0:
pushq %rbp
.cfi_def_cfa_offset 16
pushq %r15
.cfi_def_cfa_offset 24
pushq %r14
.cfi_def_cfa_offset 32
pushq %r13
.cfi_def_cfa_offset 40
pushq %r12
.cfi_def_cfa_offset 48
pushq %rbx
.cfi_def_cfa_offset 56
subq $1592, %rsp # imm = 0x638
.cfi_def_cfa_offset 1648
.cfi_offset %rbx, -56
.cfi_offset %r12, -48
.cfi_offset %r13, -40
.cfi_offset %r14, -32
.cfi_offset %r15, -24
.cfi_offset %rbp, -16
movq %rsi, %r14
movl $16777216, %edi # imm = 0x1000000
callq malloc
movq %rax, %rbx
movq 8(%r14), %rdi
movl $.L.str, %esi
callq fopen
testq %rax, %rax
je .LBB1_13
# %bb.1: # %.preheader.preheader
movq %rax, %r14
xorl %r15d, %r15d
.p2align 4, 0x90
.LBB1_2: # %.preheader
# =>This Inner Loop Header: Depth=1
leaq (%rbx,%r15), %rdx
movl $.L.str.2, %esi
movq %r14, %rdi
xorl %eax, %eax
callq __isoc23_fscanf
addq $4, %r15
cmpq $16777216, %r15 # imm = 0x1000000
jne .LBB1_2
# %bb.3:
movabsq $4294967296, %r12 # imm = 0x100000000
movq %r14, %rdi
callq fclose
leaq 48(%rsp), %rdi
movl $16777216, %esi # imm = 0x1000000
callq hipMalloc
movq 48(%rsp), %rdi
movl $16777216, %edx # imm = 0x1000000
movq %rbx, %rsi
movl $1, %ecx
callq hipMemcpy
leaq 120(%rsp), %rdi
xorl %esi, %esi
callq hipGetDevicePropertiesR0600
movl 440(%rsp), %ebx
cmpl $4194304, %ebx # imm = 0x400000
movl $4194304, %ebp # imm = 0x400000
cmovll %ebx, %ebp
cvtsi2sd %ebp, %xmm1
movsd .LCPI1_0(%rip), %xmm0 # xmm0 = mem[0],zero
divsd %xmm1, %xmm0
callq ceil@PLT
cvttsd2si %xmm0, %r14d
movslq %r14d, %rsi
shlq $2, %rsi
leaq 24(%rsp), %rdi
callq hipMalloc
xorl %edi, %edi
callq hipSetDevice
leaq (%r14,%r12), %r15
addq %rbp, %r12
shll $2, %ebp
leaq 8(%rsp), %rdi
callq hipEventCreate
movq %rsp, %rdi
callq hipEventCreate
movq 8(%rsp), %rdi
xorl %esi, %esi
callq hipEventRecord
movslq %ebp, %r8
movq %r15, %rdi
movl $1, %esi
movq %r12, %rdx
movl $1, %ecx
xorl %r9d, %r9d
callq __hipPushCallConfiguration
testl %eax, %eax
jne .LBB1_5
# %bb.4:
movq 48(%rsp), %rax
movq 24(%rsp), %rcx
movq %rax, 112(%rsp)
movq %rcx, 104(%rsp)
leaq 112(%rsp), %rax
movq %rax, 32(%rsp)
leaq 104(%rsp), %rax
movq %rax, 40(%rsp)
leaq 88(%rsp), %rdi
leaq 72(%rsp), %rsi
leaq 64(%rsp), %rdx
leaq 56(%rsp), %rcx
callq __hipPopCallConfiguration
movq 88(%rsp), %rsi
movl 96(%rsp), %edx
movq 72(%rsp), %rcx
movl 80(%rsp), %r8d
leaq 32(%rsp), %r9
movl $_Z6reducePiS_, %edi
pushq 56(%rsp)
.cfi_adjust_cfa_offset 8
pushq 72(%rsp)
.cfi_adjust_cfa_offset 8
callq hipLaunchKernel
addq $16, %rsp
.cfi_adjust_cfa_offset -16
.LBB1_5:
callq hipDeviceSynchronize
movq (%rsp), %rdi
xorl %esi, %esi
callq hipEventRecord
movq (%rsp), %rdi
callq hipEventSynchronize
movq 8(%rsp), %rsi
movq (%rsp), %rdx
leaq 20(%rsp), %rdi
callq hipEventElapsedTime
xorpd %xmm0, %xmm0
addss 20(%rsp), %xmm0
movss %xmm0, 16(%rsp) # 4-byte Spill
movq 8(%rsp), %rdi
callq hipEventDestroy
movq (%rsp), %rdi
callq hipEventDestroy
cmpl %r14d, %ebx
xorps %xmm0, %xmm0
cvtsi2sd %r14d, %xmm0
cmovll %ebx, %r14d
xorps %xmm1, %xmm1
cvtsi2sd %r14d, %xmm1
divsd %xmm1, %xmm0
callq ceil@PLT
cvttsd2si %xmm0, %r15d
jmp .LBB1_6
.p2align 4, 0x90
.LBB1_11: # in Loop: Header=BB1_6 Depth=1
cmpl $1, %r15d
movl %eax, %r15d
je .LBB1_12
.LBB1_6: # =>This Inner Loop Header: Depth=1
testl %r15d, %r15d
jle .LBB1_12
# %bb.7: # in Loop: Header=BB1_6 Depth=1
movl %r15d, %ebp
movabsq $4294967296, %rax # imm = 0x100000000
orq %rax, %rbp
movl %r14d, %r12d
orq %rax, %r12
leal (,%r14,4), %r13d
leaq 8(%rsp), %rdi
callq hipEventCreate
movq %rsp, %rdi
callq hipEventCreate
movq 8(%rsp), %rdi
xorl %esi, %esi
callq hipEventRecord
movslq %r13d, %r8
movq %rbp, %rdi
movl $1, %esi
movq %r12, %rdx
movl $1, %ecx
xorl %r9d, %r9d
callq __hipPushCallConfiguration
testl %eax, %eax
jne .LBB1_9
# %bb.8: # in Loop: Header=BB1_6 Depth=1
movq 24(%rsp), %rax
movq %rax, 112(%rsp)
movq %rax, 104(%rsp)
leaq 112(%rsp), %rax
movq %rax, 32(%rsp)
leaq 104(%rsp), %rax
movq %rax, 40(%rsp)
leaq 88(%rsp), %rdi
leaq 72(%rsp), %rsi
leaq 64(%rsp), %rdx
leaq 56(%rsp), %rcx
callq __hipPopCallConfiguration
movq 88(%rsp), %rsi
movl 96(%rsp), %edx
movq 72(%rsp), %rcx
movl 80(%rsp), %r8d
movl $_Z6reducePiS_, %edi
leaq 32(%rsp), %r9
pushq 56(%rsp)
.cfi_adjust_cfa_offset 8
pushq 72(%rsp)
.cfi_adjust_cfa_offset 8
callq hipLaunchKernel
addq $16, %rsp
.cfi_adjust_cfa_offset -16
.LBB1_9: # in Loop: Header=BB1_6 Depth=1
callq hipDeviceSynchronize
movq (%rsp), %rdi
xorl %esi, %esi
callq hipEventRecord
movq (%rsp), %rdi
callq hipEventSynchronize
movq 8(%rsp), %rsi
movq (%rsp), %rdx
leaq 20(%rsp), %rdi
callq hipEventElapsedTime
movss 16(%rsp), %xmm0 # 4-byte Reload
# xmm0 = mem[0],zero,zero,zero
addss 20(%rsp), %xmm0
movss %xmm0, 16(%rsp) # 4-byte Spill
movq 8(%rsp), %rdi
callq hipEventDestroy
movq (%rsp), %rdi
callq hipEventDestroy
movl $1, %eax
cmpl $1, %r15d
je .LBB1_11
# %bb.10: # in Loop: Header=BB1_6 Depth=1
cmpl %ebx, %r15d
movl %ebx, %r14d
cmovll %r15d, %r14d
xorps %xmm0, %xmm0
cvtsi2sd %r15d, %xmm0
xorps %xmm1, %xmm1
cvtsi2sd %r14d, %xmm1
divsd %xmm1, %xmm0
callq ceil@PLT
cvttsd2si %xmm0, %eax
jmp .LBB1_11
.LBB1_12:
movq 24(%rsp), %rsi
leaq 32(%rsp), %rdi
movl $4, %edx
movl $2, %ecx
callq hipMemcpy
movq 48(%rsp), %rdi
callq hipFree
movq 24(%rsp), %rdi
callq hipFree
movq 24(%rsp), %rdi
callq hipFree
movss 16(%rsp), %xmm2 # 4-byte Reload
# xmm2 = mem[0],zero,zero,zero
xorps %xmm0, %xmm0
cvtss2sd %xmm2, %xmm0
divss .LCPI1_1(%rip), %xmm2
movss .LCPI1_2(%rip), %xmm1 # xmm1 = mem[0],zero,zero,zero
divss %xmm2, %xmm1
movss .LCPI1_3(%rip), %xmm2 # xmm2 = mem[0],zero,zero,zero
mulss %xmm2, %xmm1
mulss %xmm2, %xmm1
mulss %xmm2, %xmm1
movl 32(%rsp), %esi
cvtss2sd %xmm1, %xmm1
movl $.L.str.3, %edi
movb $2, %al
callq printf
xorl %eax, %eax
addq $1592, %rsp # imm = 0x638
.cfi_def_cfa_offset 56
popq %rbx
.cfi_def_cfa_offset 48
popq %r12
.cfi_def_cfa_offset 40
popq %r13
.cfi_def_cfa_offset 32
popq %r14
.cfi_def_cfa_offset 24
popq %r15
.cfi_def_cfa_offset 16
popq %rbp
.cfi_def_cfa_offset 8
retq
.LBB1_13:
.cfi_def_cfa_offset 1648
movl $.Lstr, %edi
callq puts@PLT
xorl %edi, %edi
callq exit
.Lfunc_end1:
.size main, .Lfunc_end1-main
.cfi_endproc
# -- End function
.p2align 4, 0x90 # -- Begin function __hip_module_ctor
.type __hip_module_ctor,@function
__hip_module_ctor: # @__hip_module_ctor
.cfi_startproc
# %bb.0:
subq $40, %rsp
.cfi_def_cfa_offset 48
cmpq $0, __hip_gpubin_handle(%rip)
jne .LBB2_2
# %bb.1:
movl $__hip_fatbin_wrapper, %edi
callq __hipRegisterFatBinary
movq %rax, __hip_gpubin_handle(%rip)
.LBB2_2:
movq __hip_gpubin_handle(%rip), %rdi
xorps %xmm0, %xmm0
movups %xmm0, 16(%rsp)
movups %xmm0, (%rsp)
movl $_Z6reducePiS_, %esi
movl $.L__unnamed_1, %edx
movl $.L__unnamed_1, %ecx
movl $-1, %r8d
xorl %r9d, %r9d
callq __hipRegisterFunction
movl $__hip_module_dtor, %edi
addq $40, %rsp
.cfi_def_cfa_offset 8
jmp atexit # TAILCALL
.Lfunc_end2:
.size __hip_module_ctor, .Lfunc_end2-__hip_module_ctor
.cfi_endproc
# -- End function
.p2align 4, 0x90 # -- Begin function __hip_module_dtor
.type __hip_module_dtor,@function
__hip_module_dtor: # @__hip_module_dtor
.cfi_startproc
# %bb.0:
movq __hip_gpubin_handle(%rip), %rdi
testq %rdi, %rdi
je .LBB3_2
# %bb.1:
pushq %rax
.cfi_def_cfa_offset 16
callq __hipUnregisterFatBinary
movq $0, __hip_gpubin_handle(%rip)
addq $8, %rsp
.cfi_def_cfa_offset 8
.LBB3_2:
retq
.Lfunc_end3:
.size __hip_module_dtor, .Lfunc_end3-__hip_module_dtor
.cfi_endproc
# -- End function
.type _Z6reducePiS_,@object # @_Z6reducePiS_
.section .rodata,"a",@progbits
.globl _Z6reducePiS_
.p2align 3, 0x0
_Z6reducePiS_:
.quad _Z21__device_stub__reducePiS_
.size _Z6reducePiS_, 8
.type .L.str,@object # @.str
.section .rodata.str1.1,"aMS",@progbits,1
.L.str:
.asciz "rb"
.size .L.str, 3
.type .L.str.2,@object # @.str.2
.L.str.2:
.asciz "%d"
.size .L.str.2, 3
.type .L.str.3,@object # @.str.3
.L.str.3:
.asciz "%d %fms %fGB/s\n"
.size .L.str.3, 16
.type .L__unnamed_1,@object # @0
.L__unnamed_1:
.asciz "_Z6reducePiS_"
.size .L__unnamed_1, 14
.type __hip_fatbin_wrapper,@object # @__hip_fatbin_wrapper
.section .hipFatBinSegment,"a",@progbits
.p2align 3, 0x0
__hip_fatbin_wrapper:
.long 1212764230 # 0x48495046
.long 1 # 0x1
.quad __hip_fatbin
.quad 0
.size __hip_fatbin_wrapper, 24
.type __hip_gpubin_handle,@object # @__hip_gpubin_handle
.local __hip_gpubin_handle
.comm __hip_gpubin_handle,8,8
.section .init_array,"aw",@init_array
.p2align 3, 0x0
.quad __hip_module_ctor
.type __hip_cuid_,@object # @__hip_cuid_
.bss
.globl __hip_cuid_
__hip_cuid_:
.byte 0 # 0x0
.size __hip_cuid_, 1
.type .Lstr,@object # @str
.section .rodata.str1.1,"aMS",@progbits,1
.Lstr:
.asciz "Can not open input file!"
.size .Lstr, 25
.section ".linker-options","e",@llvm_linker_options
.ident "AMD clang version 18.0.0git (https://github.com/RadeonOpenCompute/llvm-project roc-6.3.2 25012 e5bf7e55c91490b07c49d8960fa7983d864936c4)"
.section ".note.GNU-stack","",@progbits
.addrsig
.addrsig_sym _Z21__device_stub__reducePiS_
.addrsig_sym __hip_module_ctor
.addrsig_sym __hip_module_dtor
.addrsig_sym _Z6reducePiS_
.addrsig_sym __hip_fatbin
.addrsig_sym __hip_fatbin_wrapper
.addrsig_sym __hip_cuid_ |
You are a helpful coding assistant specialized in converting CUDA source code to CUDA device assembly. | #include "includes.h"
__global__ void gpu_matrixmult(int *gpu_a, int *gpu_b, int *gpu_c, int N) {
int k, sum = 0;
int col = threadIdx.x + blockDim.x * blockIdx.x;
int row = threadIdx.y + blockDim.y * blockIdx.y;
if(col < N && row < N) {
for(k = 0; k < N; k++)
sum += gpu_a[row * N + k] * gpu_b[k * N + col];
gpu_c[row * N + col] = sum;
}
} | code for sm_80
Function : _Z14gpu_matrixmultPiS_S_i
.headerflags @"EF_CUDA_TEXMODE_UNIFIED EF_CUDA_64BIT_ADDRESS EF_CUDA_SM80 EF_CUDA_VIRTUAL_SM(EF_CUDA_SM80)"
/*0000*/ MOV R1, c[0x0][0x28] ; /* 0x00000a0000017a02 */
/* 0x000fe40000000f00 */
/*0010*/ S2R R3, SR_CTAID.Y ; /* 0x0000000000037919 */
/* 0x000e280000002600 */
/*0020*/ S2R R2, SR_TID.Y ; /* 0x0000000000027919 */
/* 0x000e280000002200 */
/*0030*/ S2R R0, SR_CTAID.X ; /* 0x0000000000007919 */
/* 0x000e680000002500 */
/*0040*/ S2R R5, SR_TID.X ; /* 0x0000000000057919 */
/* 0x000e620000002100 */
/*0050*/ IMAD R3, R3, c[0x0][0x4], R2 ; /* 0x0000010003037a24 */
/* 0x001fca00078e0202 */
/*0060*/ ISETP.GE.AND P0, PT, R3, c[0x0][0x178], PT ; /* 0x00005e0003007a0c */
/* 0x000fe20003f06270 */
/*0070*/ IMAD R0, R0, c[0x0][0x0], R5 ; /* 0x0000000000007a24 */
/* 0x002fca00078e0205 */
/*0080*/ ISETP.GE.OR P0, PT, R0, c[0x0][0x178], P0 ; /* 0x00005e0000007a0c */
/* 0x000fda0000706670 */
/*0090*/ @P0 EXIT ; /* 0x000000000000094d */
/* 0x000fea0003800000 */
/*00a0*/ MOV R2, c[0x0][0x178] ; /* 0x00005e0000027a02 */
/* 0x000fe20000000f00 */
/*00b0*/ ULDC.64 UR4, c[0x0][0x118] ; /* 0x0000460000047ab9 */
/* 0x000fe20000000a00 */
/*00c0*/ HFMA2.MMA R28, -RZ, RZ, 0, 0 ; /* 0x00000000ff1c7435 */
/* 0x000fe200000001ff */
/*00d0*/ IMAD R3, R3, c[0x0][0x178], RZ ; /* 0x00005e0003037a24 */
/* 0x000fe200078e02ff */
/*00e0*/ ISETP.GE.AND P0, PT, R2, 0x1, PT ; /* 0x000000010200780c */
/* 0x000fda0003f06270 */
/*00f0*/ @!P0 BRA 0xbf0 ; /* 0x00000af000008947 */
/* 0x000fea0003800000 */
/*0100*/ IADD3 R4, R2.reuse, -0x1, RZ ; /* 0xffffffff02047810 */
/* 0x040fe40007ffe0ff */
/*0110*/ LOP3.LUT R5, R2, 0x3, RZ, 0xc0, !PT ; /* 0x0000000302057812 */
/* 0x000fe400078ec0ff */
/*0120*/ ISETP.GE.U32.AND P0, PT, R4, 0x3, PT ; /* 0x000000030400780c */
/* 0x000fe40003f06070 */
/*0130*/ MOV R28, RZ ; /* 0x000000ff001c7202 */
/* 0x000fe40000000f00 */
/*0140*/ MOV R4, RZ ; /* 0x000000ff00047202 */
/* 0x000fd20000000f00 */
/*0150*/ @!P0 BRA 0xaf0 ; /* 0x0000099000008947 */
/* 0x000fea0003800000 */
/*0160*/ IADD3 R6, -R5, c[0x0][0x178], RZ ; /* 0x00005e0005067a10 */
/* 0x000fe20007ffe1ff */
/*0170*/ HFMA2.MMA R25, -RZ, RZ, 0, 2.384185791015625e-07 ; /* 0x00000004ff197435 */
/* 0x000fe200000001ff */
/*0180*/ ULDC.64 UR6, c[0x0][0x160] ; /* 0x0000580000067ab9 */
/* 0x000fe20000000a00 */
/*0190*/ MOV R28, RZ ; /* 0x000000ff001c7202 */
/* 0x000fe40000000f00 */
/*01a0*/ ISETP.GT.AND P0, PT, R6, RZ, PT ; /* 0x000000ff0600720c */
/* 0x000fcc0003f04270 */
/*01b0*/ IMAD.WIDE R24, R0, R25, c[0x0][0x168] ; /* 0x00005a0000187625 */
/* 0x000fce00078e0219 */
/*01c0*/ @!P0 BRA 0x960 ; /* 0x0000079000008947 */
/* 0x000fea0003800000 */
/*01d0*/ ISETP.GT.AND P1, PT, R6, 0xc, PT ; /* 0x0000000c0600780c */
/* 0x000fe40003f24270 */
/*01e0*/ PLOP3.LUT P0, PT, PT, PT, PT, 0x80, 0x0 ; /* 0x000000000000781c */
/* 0x000fd60003f0f070 */
/*01f0*/ @!P1 BRA 0x6a0 ; /* 0x000004a000009947 */
/* 0x000fea0003800000 */
/*0200*/ PLOP3.LUT P0, PT, PT, PT, PT, 0x8, 0x0 ; /* 0x000000000000781c */
/* 0x000fe40003f0e170 */
/*0210*/ MOV R12, UR6 ; /* 0x00000006000c7c02 */
/* 0x000fe20008000f00 */
/*0220*/ LDG.E R29, [R24.64] ; /* 0x00000004181d7981 */
/* 0x0000a2000c1e1900 */
/*0230*/ MOV R13, UR7 ; /* 0x00000007000d7c02 */
/* 0x000fca0008000f00 */
/*0240*/ IMAD.WIDE R12, R3, 0x4, R12 ; /* 0x00000004030c7825 */
/* 0x000fca00078e020c */
/*0250*/ LDG.E R27, [R12.64] ; /* 0x000000040c1b7981 */
/* 0x000ea2000c1e1900 */
/*0260*/ IMAD.WIDE R10, R2, 0x4, R24 ; /* 0x00000004020a7825 */
/* 0x000fc600078e0218 */
/*0270*/ LDG.E R17, [R12.64+0x4] ; /* 0x000004040c117981 */
/* 0x000ee6000c1e1900 */
/*0280*/ IMAD.WIDE R18, R2.reuse, 0x4, R10 ; /* 0x0000000402127825 */
/* 0x040fe200078e020a */
/*0290*/ LDG.E R16, [R10.64] ; /* 0x000000040a107981 */
/* 0x0002e8000c1e1900 */
/*02a0*/ LDG.E R7, [R12.64+0xc] ; /* 0x00000c040c077981 */
/* 0x000f22000c1e1900 */
/*02b0*/ IMAD.WIDE R14, R2, 0x4, R18 ; /* 0x00000004020e7825 */
/* 0x000fc600078e0212 */
/*02c0*/ LDG.E R18, [R18.64] ; /* 0x0000000412127981 */
/* 0x000b26000c1e1900 */
/*02d0*/ IMAD.WIDE R20, R2.reuse, 0x4, R14 ; /* 0x0000000402147825 */
/* 0x040fe200078e020e */
/*02e0*/ LDG.E R26, [R14.64] ; /* 0x000000040e1a7981 */
/* 0x000128000c1e1900 */
/*02f0*/ LDG.E R9, [R12.64+0x10] ; /* 0x000010040c097981 */
/* 0x000f28000c1e1900 */
/*0300*/ LDG.E R19, [R12.64+0x8] ; /* 0x000008040c137981 */
/* 0x020f22000c1e1900 */
/*0310*/ IMAD.WIDE R14, R2, 0x4, R20 ; /* 0x00000004020e7825 */
/* 0x001fc600078e0214 */
/*0320*/ LDG.E R20, [R20.64] ; /* 0x0000000414147981 */
/* 0x000166000c1e1900 */
/*0330*/ IMAD.WIDE R22, R2.reuse, 0x4, R14 ; /* 0x0000000402167825 */
/* 0x040fe200078e020e */
/*0340*/ LDG.E R8, [R14.64] ; /* 0x000000040e087981 */
/* 0x000168000c1e1900 */
/*0350*/ LDG.E R11, [R12.64+0x14] ; /* 0x000014040c0b7981 */
/* 0x002f62000c1e1900 */
/*0360*/ IMAD.WIDE R24, R2, 0x4, R22 ; /* 0x0000000402187825 */
/* 0x000fc600078e0216 */
/*0370*/ LDG.E R10, [R22.64] ; /* 0x00000004160a7981 */
/* 0x000368000c1e1900 */
/*0380*/ LDG.E R21, [R12.64+0x18] ; /* 0x000018040c157981 */
/* 0x001f62000c1e1900 */
/*0390*/ IMAD R29, R29, R27, R28 ; /* 0x0000001b1d1d7224 */
/* 0x004fc600078e021c */
/*03a0*/ LDG.E R27, [R12.64+0x1c] ; /* 0x00001c040c1b7981 */
/* 0x000ea8000c1e1900 */
/*03b0*/ LDG.E R28, [R24.64] ; /* 0x00000004181c7981 */
/* 0x0000a2000c1e1900 */
/*03c0*/ IMAD.WIDE R14, R2, 0x4, R24 ; /* 0x00000004020e7825 */
/* 0x000fc800078e0218 */
/*03d0*/ IMAD R29, R16, R17, R29 ; /* 0x00000011101d7224 */
/* 0x008fe400078e021d */
/*03e0*/ IMAD.WIDE R16, R2, 0x4, R14 ; /* 0x0000000402107825 */
/* 0x000fe400078e020e */
/*03f0*/ LDG.E R14, [R14.64] ; /* 0x000000040e0e7981 */
/* 0x0006a4000c1e1900 */
/*0400*/ IMAD R29, R18, R19, R29 ; /* 0x00000013121d7224 */
/* 0x010fe400078e021d */
/*0410*/ IMAD.WIDE R18, R2, 0x4, R16 ; /* 0x0000000402127825 */
/* 0x000fe400078e0210 */
/*0420*/ LDG.E R16, [R16.64] ; /* 0x0000000410107981 */
/* 0x0008a4000c1e1900 */
/*0430*/ IMAD R26, R26, R7, R29 ; /* 0x000000071a1a7224 */
/* 0x000fc400078e021d */
/*0440*/ IMAD.WIDE R22, R2.reuse, 0x4, R18 ; /* 0x0000000402167825 */
/* 0x042fe200078e0212 */
/*0450*/ LDG.E R7, [R12.64+0x20] ; /* 0x000020040c077981 */
/* 0x000ea8000c1e1900 */
/*0460*/ LDG.E R29, [R12.64+0x24] ; /* 0x000024040c1d7981 */
/* 0x000ea2000c1e1900 */
/*0470*/ IMAD.WIDE R24, R2, 0x4, R22 ; /* 0x0000000402187825 */
/* 0x001fc600078e0216 */
/*0480*/ LDG.E R18, [R18.64] ; /* 0x0000000412127981 */
/* 0x0000a2000c1e1900 */
/*0490*/ IMAD R9, R20, R9, R26 ; /* 0x0000000914097224 */
/* 0x020fc600078e021a */
/*04a0*/ LDG.E R26, [R12.64+0x28] ; /* 0x000028040c1a7981 */
/* 0x000f62000c1e1900 */
/*04b0*/ IMAD R11, R8, R11, R9 ; /* 0x0000000b080b7224 */
/* 0x000fe400078e0209 */
/*04c0*/ IMAD.WIDE R8, R2, 0x4, R24 ; /* 0x0000000402087825 */
/* 0x000fe200078e0218 */
/*04d0*/ LDG.E R22, [R22.64] ; /* 0x0000000416167981 */
/* 0x000368000c1e1900 */
/*04e0*/ LDG.E R17, [R12.64+0x2c] ; /* 0x00002c040c117981 */
/* 0x010f22000c1e1900 */
/*04f0*/ IMAD R21, R10, R21, R11 ; /* 0x000000150a157224 */
/* 0x000fc600078e020b */
/*0500*/ LDG.E R15, [R24.64] ; /* 0x00000004180f7981 */
/* 0x008722000c1e1900 */
/*0510*/ IMAD.WIDE R10, R2, 0x4, R8 ; /* 0x00000004020a7825 */
/* 0x000fc600078e0208 */
/*0520*/ LDG.E R19, [R8.64] ; /* 0x0000000408137981 */
/* 0x001128000c1e1900 */
/*0530*/ LDG.E R23, [R10.64] ; /* 0x000000040a177981 */
/* 0x002f28000c1e1900 */
/*0540*/ LDG.E R24, [R12.64+0x30] ; /* 0x000030040c187981 */
/* 0x008ee8000c1e1900 */
/*0550*/ LDG.E R25, [R12.64+0x38] ; /* 0x000038040c197981 */
/* 0x000ee8000c1e1900 */
/*0560*/ LDG.E R8, [R12.64+0x3c] ; /* 0x00003c040c087981 */
/* 0x001ee2000c1e1900 */
/*0570*/ IMAD R9, R28, R27, R21 ; /* 0x0000001b1c097224 */
/* 0x004fc600078e0215 */
/*0580*/ LDG.E R28, [R12.64+0x34] ; /* 0x000034040c1c7981 */
/* 0x000ea2000c1e1900 */
/*0590*/ IMAD.WIDE R20, R2, 0x4, R10 ; /* 0x0000000402147825 */
/* 0x000fca00078e020a */
/*05a0*/ LDG.E R27, [R20.64] ; /* 0x00000004141b7981 */
/* 0x000ea2000c1e1900 */
/*05b0*/ IADD3 R6, R6, -0x10, RZ ; /* 0xfffffff006067810 */
/* 0x000fc80007ffe0ff */
/*05c0*/ ISETP.GT.AND P1, PT, R6, 0xc, PT ; /* 0x0000000c0600780c */
/* 0x000fe20003f24270 */
/*05d0*/ IMAD R7, R14, R7, R9 ; /* 0x000000070e077224 */
/* 0x000fc800078e0209 */
/*05e0*/ IMAD R7, R16, R29, R7 ; /* 0x0000001d10077224 */
/* 0x000fc800078e0207 */
/*05f0*/ IMAD R7, R18, R26, R7 ; /* 0x0000001a12077224 */
/* 0x020fc800078e0207 */
/*0600*/ IMAD R7, R22, R17, R7 ; /* 0x0000001116077224 */
/* 0x010fe200078e0207 */
/*0610*/ UIADD3 UR6, UP0, UR6, 0x40, URZ ; /* 0x0000004006067890 */
/* 0x000fe2000ff1e03f */
/*0620*/ IADD3 R4, R4, 0x10, RZ ; /* 0x0000001004047810 */
/* 0x000fc60007ffe0ff */
/*0630*/ UIADD3.X UR7, URZ, UR7, URZ, UP0, !UPT ; /* 0x000000073f077290 */
/* 0x000fe200087fe43f */
/*0640*/ IMAD R7, R15, R24, R7 ; /* 0x000000180f077224 */
/* 0x008fc800078e0207 */
/*0650*/ IMAD R28, R19, R28, R7 ; /* 0x0000001c131c7224 */
/* 0x004fc800078e0207 */
/*0660*/ IMAD R28, R23, R25, R28 ; /* 0x00000019171c7224 */
/* 0x000fe400078e021c */
/*0670*/ IMAD.WIDE R24, R2, 0x4, R20 ; /* 0x0000000402187825 */
/* 0x000fc800078e0214 */
/*0680*/ IMAD R28, R27, R8, R28 ; /* 0x000000081b1c7224 */
/* 0x000fe200078e021c */
/*0690*/ @P1 BRA 0x210 ; /* 0xfffffb7000001947 */
/* 0x000fea000383ffff */
/*06a0*/ ISETP.GT.AND P1, PT, R6, 0x4, PT ; /* 0x000000040600780c */
/* 0x000fda0003f24270 */
/*06b0*/ @!P1 BRA 0x940 ; /* 0x0000028000009947 */
/* 0x000fea0003800000 */
/*06c0*/ IMAD.WIDE R16, R2, 0x4, R24 ; /* 0x0000000402107825 */
/* 0x000fe200078e0218 */
/*06d0*/ MOV R8, UR6 ; /* 0x0000000600087c02 */
/* 0x000fe20008000f00 */
/*06e0*/ LDG.E R7, [R24.64] ; /* 0x0000000418077981 */
/* 0x0000a2000c1e1900 */
/*06f0*/ MOV R9, UR7 ; /* 0x0000000700097c02 */
/* 0x000fc60008000f00 */
/*0700*/ IMAD.WIDE R12, R2.reuse, 0x4, R16 ; /* 0x00000004020c7825 */
/* 0x040fe200078e0210 */
/*0710*/ LDG.E R21, [R16.64] ; /* 0x0000000410157981 */
/* 0x0002e6000c1e1900 */
/*0720*/ IMAD.WIDE R8, R3, 0x4, R8 ; /* 0x0000000403087825 */
/* 0x000fe200078e0208 */
/*0730*/ LDG.E R23, [R12.64] ; /* 0x000000040c177981 */
/* 0x000966000c1e1900 */
/*0740*/ IMAD.WIDE R14, R2.reuse, 0x4, R12 ; /* 0x00000004020e7825 */
/* 0x040fe200078e020c */
/*0750*/ LDG.E R20, [R8.64] ; /* 0x0000000408147981 */
/* 0x000ea8000c1e1900 */
/*0760*/ LDG.E R22, [R8.64+0x4] ; /* 0x0000040408167981 */
/* 0x000ee2000c1e1900 */
/*0770*/ IMAD.WIDE R10, R2, 0x4, R14 ; /* 0x00000004020a7825 */
/* 0x000fc600078e020e */
/*0780*/ LDG.E R26, [R8.64+0x8] ; /* 0x00000804081a7981 */
/* 0x000f66000c1e1900 */
/*0790*/ IMAD.WIDE R16, R2.reuse, 0x4, R10 ; /* 0x0000000402107825 */
/* 0x042fe200078e020a */
/*07a0*/ LDG.E R14, [R14.64] ; /* 0x000000040e0e7981 */
/* 0x000368000c1e1900 */
/*07b0*/ LDG.E R27, [R8.64+0xc] ; /* 0x00000c04081b7981 */
/* 0x000f62000c1e1900 */
/*07c0*/ IMAD.WIDE R18, R2, 0x4, R16 ; /* 0x0000000402127825 */
/* 0x000fc600078e0210 */
/*07d0*/ LDG.E R10, [R10.64] ; /* 0x000000040a0a7981 */
/* 0x000368000c1e1900 */
/*07e0*/ LDG.E R25, [R8.64+0x10] ; /* 0x0000100408197981 */
/* 0x001f62000c1e1900 */
/*07f0*/ IMAD.WIDE R12, R2, 0x4, R18 ; /* 0x00000004020c7825 */
/* 0x010fc600078e0212 */
/*0800*/ LDG.E R16, [R16.64] ; /* 0x0000000410107981 */
/* 0x000f28000c1e1900 */
/*0810*/ LDG.E R29, [R8.64+0x14] ; /* 0x00001404081d7981 */
/* 0x000f28000c1e1900 */
/*0820*/ LDG.E R24, [R18.64] ; /* 0x0000000412187981 */
/* 0x000128000c1e1900 */
/*0830*/ LDG.E R11, [R8.64+0x18] ; /* 0x00001804080b7981 */
/* 0x002f28000c1e1900 */
/*0840*/ LDG.E R15, [R12.64] ; /* 0x000000040c0f7981 */
/* 0x000f28000c1e1900 */
/*0850*/ LDG.E R18, [R8.64+0x1c] ; /* 0x00001c0408127981 */
/* 0x001f22000c1e1900 */
/*0860*/ UIADD3 UR6, UP0, UR6, 0x20, URZ ; /* 0x0000002006067890 */
/* 0x000fe2000ff1e03f */
/*0870*/ PLOP3.LUT P0, PT, PT, PT, PT, 0x8, 0x0 ; /* 0x000000000000781c */
/* 0x000fc40003f0e170 */
/*0880*/ IADD3 R4, R4, 0x8, RZ ; /* 0x0000000804047810 */
/* 0x000fe40007ffe0ff */
/*0890*/ IADD3 R6, R6, -0x8, RZ ; /* 0xfffffff806067810 */
/* 0x000fe20007ffe0ff */
/*08a0*/ UIADD3.X UR7, URZ, UR7, URZ, UP0, !UPT ; /* 0x000000073f077290 */
/* 0x000fe200087fe43f */
/*08b0*/ IMAD R7, R7, R20, R28 ; /* 0x0000001407077224 */
/* 0x004fc800078e021c */
/*08c0*/ IMAD R7, R21, R22, R7 ; /* 0x0000001615077224 */
/* 0x008fc800078e0207 */
/*08d0*/ IMAD R7, R23, R26, R7 ; /* 0x0000001a17077224 */
/* 0x020fc800078e0207 */
/*08e0*/ IMAD R7, R14, R27, R7 ; /* 0x0000001b0e077224 */
/* 0x000fc800078e0207 */
/*08f0*/ IMAD R7, R10, R25, R7 ; /* 0x000000190a077224 */
/* 0x000fc800078e0207 */
/*0900*/ IMAD R7, R16, R29, R7 ; /* 0x0000001d10077224 */
/* 0x010fc800078e0207 */
/*0910*/ IMAD R7, R24, R11, R7 ; /* 0x0000000b18077224 */
/* 0x000fe400078e0207 */
/*0920*/ IMAD.WIDE R24, R2, 0x4, R12 ; /* 0x0000000402187825 */
/* 0x000fc800078e020c */
/*0930*/ IMAD R28, R15, R18, R7 ; /* 0x000000120f1c7224 */
/* 0x000fe400078e0207 */
/*0940*/ ISETP.NE.OR P0, PT, R6, RZ, P0 ; /* 0x000000ff0600720c */
/* 0x000fda0000705670 */
/*0950*/ @!P0 BRA 0xaf0 ; /* 0x0000019000008947 */
/* 0x000fea0003800000 */
/*0960*/ MOV R8, UR6 ; /* 0x0000000600087c02 */
/* 0x000fe20008000f00 */
/*0970*/ IMAD.WIDE R14, R2, 0x4, R24 ; /* 0x00000004020e7825 */
/* 0x000fe200078e0218 */
/*0980*/ MOV R9, UR7 ; /* 0x0000000700097c02 */
/* 0x000fe20008000f00 */
/*0990*/ LDG.E R25, [R24.64] ; /* 0x0000000418197981 */
/* 0x000ea8000c1e1900 */
/*09a0*/ IMAD.WIDE R8, R3, 0x4, R8 ; /* 0x0000000403087825 */
/* 0x000fc800078e0208 */
/*09b0*/ IMAD.WIDE R12, R2.reuse, 0x4, R14 ; /* 0x00000004020c7825 */
/* 0x040fe200078e020e */
/*09c0*/ LDG.E R7, [R8.64] ; /* 0x0000000408077981 */
/* 0x000ea8000c1e1900 */
/*09d0*/ LDG.E R14, [R14.64] ; /* 0x000000040e0e7981 */
/* 0x000ee2000c1e1900 */
/*09e0*/ IMAD.WIDE R10, R2, 0x4, R12 ; /* 0x00000004020a7825 */
/* 0x000fc600078e020c */
/*09f0*/ LDG.E R16, [R8.64+0x4] ; /* 0x0000040408107981 */
/* 0x000ee8000c1e1900 */
/*0a00*/ LDG.E R18, [R12.64] ; /* 0x000000040c127981 */
/* 0x000f28000c1e1900 */
/*0a10*/ LDG.E R17, [R8.64+0x8] ; /* 0x0000080408117981 */
/* 0x000f28000c1e1900 */
/*0a20*/ LDG.E R19, [R8.64+0xc] ; /* 0x00000c0408137981 */
/* 0x000f68000c1e1900 */
/*0a30*/ LDG.E R20, [R10.64] ; /* 0x000000040a147981 */
/* 0x000f62000c1e1900 */
/*0a40*/ IADD3 R6, R6, -0x4, RZ ; /* 0xfffffffc06067810 */
/* 0x000fc80007ffe0ff */
/*0a50*/ ISETP.NE.AND P0, PT, R6, RZ, PT ; /* 0x000000ff0600720c */
/* 0x000fe20003f05270 */
/*0a60*/ UIADD3 UR6, UP0, UR6, 0x10, URZ ; /* 0x0000001006067890 */
/* 0x000fe2000ff1e03f */
/*0a70*/ IADD3 R4, R4, 0x4, RZ ; /* 0x0000000404047810 */
/* 0x000fc60007ffe0ff */
/*0a80*/ UIADD3.X UR7, URZ, UR7, URZ, UP0, !UPT ; /* 0x000000073f077290 */
/* 0x000fe200087fe43f */
/*0a90*/ IMAD R7, R25, R7, R28 ; /* 0x0000000719077224 */
/* 0x004fc800078e021c */
/*0aa0*/ IMAD R7, R14, R16, R7 ; /* 0x000000100e077224 */
/* 0x008fe400078e0207 */
/*0ab0*/ IMAD.WIDE R24, R2, 0x4, R10 ; /* 0x0000000402187825 */
/* 0x000fc800078e020a */
/*0ac0*/ IMAD R7, R18, R17, R7 ; /* 0x0000001112077224 */
/* 0x010fc800078e0207 */
/*0ad0*/ IMAD R28, R20, R19, R7 ; /* 0x00000013141c7224 */
/* 0x020fe200078e0207 */
/*0ae0*/ @P0 BRA 0x960 ; /* 0xfffffe7000000947 */
/* 0x000fea000383ffff */
/*0af0*/ ISETP.NE.AND P0, PT, R5, RZ, PT ; /* 0x000000ff0500720c */
/* 0x000fda0003f05270 */
/*0b00*/ @!P0 BRA 0xbf0 ; /* 0x000000e000008947 */
/* 0x000fea0003800000 */
/*0b10*/ HFMA2.MMA R9, -RZ, RZ, 0, 2.384185791015625e-07 ; /* 0x00000004ff097435 */
/* 0x000fe200000001ff */
/*0b20*/ IADD3 R6, R3, R4, RZ ; /* 0x0000000403067210 */
/* 0x000fe20007ffe0ff */
/*0b30*/ IMAD R4, R4, c[0x0][0x178], R0 ; /* 0x00005e0004047a24 */
/* 0x000fd000078e0200 */
/*0b40*/ IMAD.WIDE R6, R6, R9, c[0x0][0x160] ; /* 0x0000580006067625 */
/* 0x000fc800078e0209 */
/*0b50*/ IMAD.WIDE R8, R4, R9, c[0x0][0x168] ; /* 0x00005a0004087625 */
/* 0x000fca00078e0209 */
/*0b60*/ LDG.E R11, [R8.64] ; /* 0x00000004080b7981 */
/* 0x0000a8000c1e1900 */
/*0b70*/ LDG.E R4, [R6.64] ; /* 0x0000000406047981 */
/* 0x0002a2000c1e1900 */
/*0b80*/ IADD3 R5, R5, -0x1, RZ ; /* 0xffffffff05057810 */
/* 0x000fc80007ffe0ff */
/*0b90*/ ISETP.NE.AND P0, PT, R5, RZ, PT ; /* 0x000000ff0500720c */
/* 0x000fe20003f05270 */
/*0ba0*/ IMAD.WIDE R8, R2, 0x4, R8 ; /* 0x0000000402087825 */
/* 0x001fe200078e0208 */
/*0bb0*/ IADD3 R6, P1, R6, 0x4, RZ ; /* 0x0000000406067810 */
/* 0x002fc80007f3e0ff */
/*0bc0*/ IADD3.X R7, RZ, R7, RZ, P1, !PT ; /* 0x00000007ff077210 */
/* 0x000fe20000ffe4ff */
/*0bd0*/ IMAD R28, R11, R4, R28 ; /* 0x000000040b1c7224 */
/* 0x004fcc00078e021c */
/*0be0*/ @P0 BRA 0xb60 ; /* 0xffffff7000000947 */
/* 0x000fea000383ffff */
/*0bf0*/ IADD3 R3, R0, R3, RZ ; /* 0x0000000300037210 */
/* 0x000fe40007ffe0ff */
/*0c00*/ MOV R2, 0x4 ; /* 0x0000000400027802 */
/* 0x000fca0000000f00 */
/*0c10*/ IMAD.WIDE R2, R3, R2, c[0x0][0x170] ; /* 0x00005c0003027625 */
/* 0x000fca00078e0202 */
/*0c20*/ STG.E [R2.64], R28 ; /* 0x0000001c02007986 */
/* 0x000fe2000c101904 */
/*0c30*/ EXIT ; /* 0x000000000000794d */
/* 0x000fea0003800000 */
/*0c40*/ BRA 0xc40; /* 0xfffffff000007947 */
/* 0x000fc0000383ffff */
/*0c50*/ NOP; /* 0x0000000000007918 */
/* 0x000fc00000000000 */
/*0c60*/ NOP; /* 0x0000000000007918 */
/* 0x000fc00000000000 */
/*0c70*/ NOP; /* 0x0000000000007918 */
/* 0x000fc00000000000 */
/*0c80*/ NOP; /* 0x0000000000007918 */
/* 0x000fc00000000000 */
/*0c90*/ NOP; /* 0x0000000000007918 */
/* 0x000fc00000000000 */
/*0ca0*/ NOP; /* 0x0000000000007918 */
/* 0x000fc00000000000 */
/*0cb0*/ NOP; /* 0x0000000000007918 */
/* 0x000fc00000000000 */
/*0cc0*/ NOP; /* 0x0000000000007918 */
/* 0x000fc00000000000 */
/*0cd0*/ NOP; /* 0x0000000000007918 */
/* 0x000fc00000000000 */
/*0ce0*/ NOP; /* 0x0000000000007918 */
/* 0x000fc00000000000 */
/*0cf0*/ NOP; /* 0x0000000000007918 */
/* 0x000fc00000000000 */
.......... |
You are a helpful coding assistant specialized in converting CUDA source code to CUDA host assembly. | #include "includes.h"
__global__ void gpu_matrixmult(int *gpu_a, int *gpu_b, int *gpu_c, int N) {
int k, sum = 0;
int col = threadIdx.x + blockDim.x * blockIdx.x;
int row = threadIdx.y + blockDim.y * blockIdx.y;
if(col < N && row < N) {
for(k = 0; k < N; k++)
sum += gpu_a[row * N + k] * gpu_b[k * N + col];
gpu_c[row * N + col] = sum;
}
} | .file "tmpxft_0017b716_00000000-6_gpu_matrixmult.cudafe1.cpp"
.text
#APP
#NO_APP
.type _ZL26__cudaUnregisterBinaryUtilv, @function
_ZL26__cudaUnregisterBinaryUtilv:
.LFB2029:
.cfi_startproc
endbr64
subq $8, %rsp
.cfi_def_cfa_offset 16
movq _ZL20__cudaFatCubinHandle(%rip), %rdi
call __cudaUnregisterFatBinary@PLT
addq $8, %rsp
.cfi_def_cfa_offset 8
ret
.cfi_endproc
.LFE2029:
.size _ZL26__cudaUnregisterBinaryUtilv, .-_ZL26__cudaUnregisterBinaryUtilv
.globl _Z39__device_stub__Z14gpu_matrixmultPiS_S_iPiS_S_i
.type _Z39__device_stub__Z14gpu_matrixmultPiS_S_iPiS_S_i, @function
_Z39__device_stub__Z14gpu_matrixmultPiS_S_iPiS_S_i:
.LFB2051:
.cfi_startproc
endbr64
subq $152, %rsp
.cfi_def_cfa_offset 160
movq %rdi, 24(%rsp)
movq %rsi, 16(%rsp)
movq %rdx, 8(%rsp)
movl %ecx, 4(%rsp)
movq %fs:40, %rax
movq %rax, 136(%rsp)
xorl %eax, %eax
leaq 24(%rsp), %rax
movq %rax, 96(%rsp)
leaq 16(%rsp), %rax
movq %rax, 104(%rsp)
leaq 8(%rsp), %rax
movq %rax, 112(%rsp)
leaq 4(%rsp), %rax
movq %rax, 120(%rsp)
movl $1, 48(%rsp)
movl $1, 52(%rsp)
movl $1, 56(%rsp)
movl $1, 60(%rsp)
movl $1, 64(%rsp)
movl $1, 68(%rsp)
leaq 40(%rsp), %rcx
leaq 32(%rsp), %rdx
leaq 60(%rsp), %rsi
leaq 48(%rsp), %rdi
call __cudaPopCallConfiguration@PLT
testl %eax, %eax
je .L7
.L3:
movq 136(%rsp), %rax
subq %fs:40, %rax
jne .L8
addq $152, %rsp
.cfi_remember_state
.cfi_def_cfa_offset 8
ret
.L7:
.cfi_restore_state
pushq 40(%rsp)
.cfi_def_cfa_offset 168
pushq 40(%rsp)
.cfi_def_cfa_offset 176
leaq 112(%rsp), %r9
movq 76(%rsp), %rcx
movl 84(%rsp), %r8d
movq 64(%rsp), %rsi
movl 72(%rsp), %edx
leaq _Z14gpu_matrixmultPiS_S_i(%rip), %rdi
call cudaLaunchKernel@PLT
addq $16, %rsp
.cfi_def_cfa_offset 160
jmp .L3
.L8:
call __stack_chk_fail@PLT
.cfi_endproc
.LFE2051:
.size _Z39__device_stub__Z14gpu_matrixmultPiS_S_iPiS_S_i, .-_Z39__device_stub__Z14gpu_matrixmultPiS_S_iPiS_S_i
.globl _Z14gpu_matrixmultPiS_S_i
.type _Z14gpu_matrixmultPiS_S_i, @function
_Z14gpu_matrixmultPiS_S_i:
.LFB2052:
.cfi_startproc
endbr64
subq $8, %rsp
.cfi_def_cfa_offset 16
call _Z39__device_stub__Z14gpu_matrixmultPiS_S_iPiS_S_i
addq $8, %rsp
.cfi_def_cfa_offset 8
ret
.cfi_endproc
.LFE2052:
.size _Z14gpu_matrixmultPiS_S_i, .-_Z14gpu_matrixmultPiS_S_i
.section .rodata.str1.1,"aMS",@progbits,1
.LC0:
.string "_Z14gpu_matrixmultPiS_S_i"
.text
.type _ZL24__sti____cudaRegisterAllv, @function
_ZL24__sti____cudaRegisterAllv:
.LFB2054:
.cfi_startproc
endbr64
subq $8, %rsp
.cfi_def_cfa_offset 16
leaq _ZL15__fatDeviceText(%rip), %rdi
call __cudaRegisterFatBinary@PLT
movq %rax, %rdi
movq %rax, _ZL20__cudaFatCubinHandle(%rip)
pushq $0
.cfi_def_cfa_offset 24
pushq $0
.cfi_def_cfa_offset 32
pushq $0
.cfi_def_cfa_offset 40
pushq $0
.cfi_def_cfa_offset 48
movl $0, %r9d
movl $-1, %r8d
leaq .LC0(%rip), %rdx
movq %rdx, %rcx
leaq _Z14gpu_matrixmultPiS_S_i(%rip), %rsi
call __cudaRegisterFunction@PLT
addq $32, %rsp
.cfi_def_cfa_offset 16
movq _ZL20__cudaFatCubinHandle(%rip), %rdi
call __cudaRegisterFatBinaryEnd@PLT
leaq _ZL26__cudaUnregisterBinaryUtilv(%rip), %rdi
call atexit@PLT
addq $8, %rsp
.cfi_def_cfa_offset 8
ret
.cfi_endproc
.LFE2054:
.size _ZL24__sti____cudaRegisterAllv, .-_ZL24__sti____cudaRegisterAllv
.section .init_array,"aw"
.align 8
.quad _ZL24__sti____cudaRegisterAllv
.section .nvFatBinSegment,"aw"
.align 8
.type _ZL15__fatDeviceText, @object
.size _ZL15__fatDeviceText, 24
_ZL15__fatDeviceText:
.long 1180844977
.long 1
.quad fatbinData
.quad 0
.local _ZL20__cudaFatCubinHandle
.comm _ZL20__cudaFatCubinHandle,8,8
.ident "GCC: (Ubuntu 13.3.0-6ubuntu2~24.04) 13.3.0"
.section .note.GNU-stack,"",@progbits
.section .note.gnu.property,"a"
.align 8
.long 1f - 0f
.long 4f - 1f
.long 5
0:
.string "GNU"
1:
.align 8
.long 0xc0000002
.long 3f - 2f
2:
.long 0x3
3:
.align 8
4: |
You are a helpful coding assistant specialized in converting CUDA source code to HIP/AMD source code. | #include "includes.h"
__global__ void gpu_matrixmult(int *gpu_a, int *gpu_b, int *gpu_c, int N) {
int k, sum = 0;
int col = threadIdx.x + blockDim.x * blockIdx.x;
int row = threadIdx.y + blockDim.y * blockIdx.y;
if(col < N && row < N) {
for(k = 0; k < N; k++)
sum += gpu_a[row * N + k] * gpu_b[k * N + col];
gpu_c[row * N + col] = sum;
}
} | #include <hip/hip_runtime.h>
#include "includes.h"
__global__ void gpu_matrixmult(int *gpu_a, int *gpu_b, int *gpu_c, int N) {
int k, sum = 0;
int col = threadIdx.x + blockDim.x * blockIdx.x;
int row = threadIdx.y + blockDim.y * blockIdx.y;
if(col < N && row < N) {
for(k = 0; k < N; k++)
sum += gpu_a[row * N + k] * gpu_b[k * N + col];
gpu_c[row * N + col] = sum;
}
} |
You are a helpful coding assistant specialized in converting HIP source code to AMD device assembly. | #include <hip/hip_runtime.h>
#include "includes.h"
__global__ void gpu_matrixmult(int *gpu_a, int *gpu_b, int *gpu_c, int N) {
int k, sum = 0;
int col = threadIdx.x + blockDim.x * blockIdx.x;
int row = threadIdx.y + blockDim.y * blockIdx.y;
if(col < N && row < N) {
for(k = 0; k < N; k++)
sum += gpu_a[row * N + k] * gpu_b[k * N + col];
gpu_c[row * N + col] = sum;
}
} | .text
.amdgcn_target "amdgcn-amd-amdhsa--gfx1100"
.protected _Z14gpu_matrixmultPiS_S_i
.globl _Z14gpu_matrixmultPiS_S_i
.p2align 8
.type _Z14gpu_matrixmultPiS_S_i,@function
_Z14gpu_matrixmultPiS_S_i:
s_clause 0x1
s_load_b32 s3, s[0:1], 0x2c
s_load_b32 s2, s[0:1], 0x18
v_and_b32_e32 v2, 0x3ff, v0
v_bfe_u32 v3, v0, 10, 10
s_waitcnt lgkmcnt(0)
s_and_b32 s4, s3, 0xffff
s_lshr_b32 s3, s3, 16
s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_2) | instid1(VALU_DEP_1)
v_mad_u64_u32 v[0:1], null, s14, s4, v[2:3]
v_mad_u64_u32 v[1:2], null, s15, s3, v[3:4]
s_mov_b32 s3, exec_lo
v_max_i32_e32 v2, v0, v1
s_delay_alu instid0(VALU_DEP_1)
v_cmpx_gt_i32_e64 s2, v2
s_cbranch_execz .LBB0_6
s_cmp_lt_i32 s2, 1
s_cbranch_scc1 .LBB0_4
s_load_b128 s[4:7], s[0:1], 0x0
v_mul_lo_u32 v2, v1, s2
s_mov_b32 s3, s2
v_mov_b32_e32 v5, v0
s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
v_ashrrev_i32_e32 v3, 31, v2
v_lshlrev_b64 v[3:4], 2, v[2:3]
v_mov_b32_e32 v2, 0
s_waitcnt lgkmcnt(0)
s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_3)
v_add_co_u32 v3, vcc_lo, s4, v3
v_add_co_ci_u32_e32 v4, vcc_lo, s5, v4, vcc_lo
.p2align 6
.LBB0_3:
s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(SALU_CYCLE_1)
v_ashrrev_i32_e32 v6, 31, v5
s_add_i32 s3, s3, -1
s_cmp_lg_u32 s3, 0
s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
v_lshlrev_b64 v[6:7], 2, v[5:6]
v_add_co_u32 v6, vcc_lo, s6, v6
s_delay_alu instid0(VALU_DEP_2)
v_add_co_ci_u32_e32 v7, vcc_lo, s7, v7, vcc_lo
global_load_b32 v8, v[3:4], off
global_load_b32 v9, v[6:7], off
s_waitcnt vmcnt(0)
v_mad_u64_u32 v[6:7], null, v9, v8, v[2:3]
v_add_co_u32 v3, vcc_lo, v3, 4
v_add_co_ci_u32_e32 v4, vcc_lo, 0, v4, vcc_lo
s_delay_alu instid0(VALU_DEP_3)
v_dual_mov_b32 v2, v6 :: v_dual_add_nc_u32 v5, s2, v5
s_cbranch_scc1 .LBB0_3
s_branch .LBB0_5
.LBB0_4:
v_mov_b32_e32 v2, 0
.LBB0_5:
s_load_b64 s[0:1], s[0:1], 0x10
v_mad_u64_u32 v[3:4], null, v1, s2, v[0:1]
s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
v_ashrrev_i32_e32 v4, 31, v3
v_lshlrev_b64 v[0:1], 2, v[3:4]
s_waitcnt lgkmcnt(0)
s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_2)
v_add_co_u32 v0, vcc_lo, s0, v0
v_add_co_ci_u32_e32 v1, vcc_lo, s1, v1, vcc_lo
global_store_b32 v[0:1], v2, off
.LBB0_6:
s_nop 0
s_sendmsg sendmsg(MSG_DEALLOC_VGPRS)
s_endpgm
.section .rodata,"a",@progbits
.p2align 6, 0x0
.amdhsa_kernel _Z14gpu_matrixmultPiS_S_i
.amdhsa_group_segment_fixed_size 0
.amdhsa_private_segment_fixed_size 0
.amdhsa_kernarg_size 288
.amdhsa_user_sgpr_count 14
.amdhsa_user_sgpr_dispatch_ptr 0
.amdhsa_user_sgpr_queue_ptr 0
.amdhsa_user_sgpr_kernarg_segment_ptr 1
.amdhsa_user_sgpr_dispatch_id 0
.amdhsa_user_sgpr_private_segment_size 0
.amdhsa_wavefront_size32 1
.amdhsa_uses_dynamic_stack 0
.amdhsa_enable_private_segment 0
.amdhsa_system_sgpr_workgroup_id_x 1
.amdhsa_system_sgpr_workgroup_id_y 1
.amdhsa_system_sgpr_workgroup_id_z 0
.amdhsa_system_sgpr_workgroup_info 0
.amdhsa_system_vgpr_workitem_id 1
.amdhsa_next_free_vgpr 10
.amdhsa_next_free_sgpr 16
.amdhsa_float_round_mode_32 0
.amdhsa_float_round_mode_16_64 0
.amdhsa_float_denorm_mode_32 3
.amdhsa_float_denorm_mode_16_64 3
.amdhsa_dx10_clamp 1
.amdhsa_ieee_mode 1
.amdhsa_fp16_overflow 0
.amdhsa_workgroup_processor_mode 1
.amdhsa_memory_ordered 1
.amdhsa_forward_progress 0
.amdhsa_shared_vgpr_count 0
.amdhsa_exception_fp_ieee_invalid_op 0
.amdhsa_exception_fp_denorm_src 0
.amdhsa_exception_fp_ieee_div_zero 0
.amdhsa_exception_fp_ieee_overflow 0
.amdhsa_exception_fp_ieee_underflow 0
.amdhsa_exception_fp_ieee_inexact 0
.amdhsa_exception_int_div_zero 0
.end_amdhsa_kernel
.text
.Lfunc_end0:
.size _Z14gpu_matrixmultPiS_S_i, .Lfunc_end0-_Z14gpu_matrixmultPiS_S_i
.section .AMDGPU.csdata,"",@progbits
.text
.p2alignl 7, 3214868480
.fill 96, 4, 3214868480
.type __hip_cuid_,@object
.section .bss,"aw",@nobits
.globl __hip_cuid_
__hip_cuid_:
.byte 0
.size __hip_cuid_, 1
.ident "AMD clang version 18.0.0git (https://github.com/RadeonOpenCompute/llvm-project roc-6.3.2 25012 e5bf7e55c91490b07c49d8960fa7983d864936c4)"
.section ".note.GNU-stack","",@progbits
.addrsig
.addrsig_sym __hip_cuid_
.amdgpu_metadata
---
amdhsa.kernels:
- .args:
- .address_space: global
.offset: 0
.size: 8
.value_kind: global_buffer
- .address_space: global
.offset: 8
.size: 8
.value_kind: global_buffer
- .address_space: global
.offset: 16
.size: 8
.value_kind: global_buffer
- .offset: 24
.size: 4
.value_kind: by_value
- .offset: 32
.size: 4
.value_kind: hidden_block_count_x
- .offset: 36
.size: 4
.value_kind: hidden_block_count_y
- .offset: 40
.size: 4
.value_kind: hidden_block_count_z
- .offset: 44
.size: 2
.value_kind: hidden_group_size_x
- .offset: 46
.size: 2
.value_kind: hidden_group_size_y
- .offset: 48
.size: 2
.value_kind: hidden_group_size_z
- .offset: 50
.size: 2
.value_kind: hidden_remainder_x
- .offset: 52
.size: 2
.value_kind: hidden_remainder_y
- .offset: 54
.size: 2
.value_kind: hidden_remainder_z
- .offset: 72
.size: 8
.value_kind: hidden_global_offset_x
- .offset: 80
.size: 8
.value_kind: hidden_global_offset_y
- .offset: 88
.size: 8
.value_kind: hidden_global_offset_z
- .offset: 96
.size: 2
.value_kind: hidden_grid_dims
.group_segment_fixed_size: 0
.kernarg_segment_align: 8
.kernarg_segment_size: 288
.language: OpenCL C
.language_version:
- 2
- 0
.max_flat_workgroup_size: 1024
.name: _Z14gpu_matrixmultPiS_S_i
.private_segment_fixed_size: 0
.sgpr_count: 18
.sgpr_spill_count: 0
.symbol: _Z14gpu_matrixmultPiS_S_i.kd
.uniform_work_group_size: 1
.uses_dynamic_stack: false
.vgpr_count: 10
.vgpr_spill_count: 0
.wavefront_size: 32
.workgroup_processor_mode: 1
amdhsa.target: amdgcn-amd-amdhsa--gfx1100
amdhsa.version:
- 1
- 2
...
.end_amdgpu_metadata |
You are a helpful coding assistant specialized in converting HIP source code to AMD host assembly. | #include <hip/hip_runtime.h>
#include "includes.h"
__global__ void gpu_matrixmult(int *gpu_a, int *gpu_b, int *gpu_c, int N) {
int k, sum = 0;
int col = threadIdx.x + blockDim.x * blockIdx.x;
int row = threadIdx.y + blockDim.y * blockIdx.y;
if(col < N && row < N) {
for(k = 0; k < N; k++)
sum += gpu_a[row * N + k] * gpu_b[k * N + col];
gpu_c[row * N + col] = sum;
}
} | .text
.file "gpu_matrixmult.hip"
.globl _Z29__device_stub__gpu_matrixmultPiS_S_i # -- Begin function _Z29__device_stub__gpu_matrixmultPiS_S_i
.p2align 4, 0x90
.type _Z29__device_stub__gpu_matrixmultPiS_S_i,@function
_Z29__device_stub__gpu_matrixmultPiS_S_i: # @_Z29__device_stub__gpu_matrixmultPiS_S_i
.cfi_startproc
# %bb.0:
subq $120, %rsp
.cfi_def_cfa_offset 128
movq %rdi, 72(%rsp)
movq %rsi, 64(%rsp)
movq %rdx, 56(%rsp)
movl %ecx, 4(%rsp)
leaq 72(%rsp), %rax
movq %rax, 80(%rsp)
leaq 64(%rsp), %rax
movq %rax, 88(%rsp)
leaq 56(%rsp), %rax
movq %rax, 96(%rsp)
leaq 4(%rsp), %rax
movq %rax, 104(%rsp)
leaq 40(%rsp), %rdi
leaq 24(%rsp), %rsi
leaq 16(%rsp), %rdx
leaq 8(%rsp), %rcx
callq __hipPopCallConfiguration
movq 40(%rsp), %rsi
movl 48(%rsp), %edx
movq 24(%rsp), %rcx
movl 32(%rsp), %r8d
leaq 80(%rsp), %r9
movl $_Z14gpu_matrixmultPiS_S_i, %edi
pushq 8(%rsp)
.cfi_adjust_cfa_offset 8
pushq 24(%rsp)
.cfi_adjust_cfa_offset 8
callq hipLaunchKernel
addq $136, %rsp
.cfi_adjust_cfa_offset -136
retq
.Lfunc_end0:
.size _Z29__device_stub__gpu_matrixmultPiS_S_i, .Lfunc_end0-_Z29__device_stub__gpu_matrixmultPiS_S_i
.cfi_endproc
# -- End function
.p2align 4, 0x90 # -- Begin function __hip_module_ctor
.type __hip_module_ctor,@function
__hip_module_ctor: # @__hip_module_ctor
.cfi_startproc
# %bb.0:
subq $40, %rsp
.cfi_def_cfa_offset 48
cmpq $0, __hip_gpubin_handle(%rip)
jne .LBB1_2
# %bb.1:
movl $__hip_fatbin_wrapper, %edi
callq __hipRegisterFatBinary
movq %rax, __hip_gpubin_handle(%rip)
.LBB1_2:
movq __hip_gpubin_handle(%rip), %rdi
xorps %xmm0, %xmm0
movups %xmm0, 16(%rsp)
movups %xmm0, (%rsp)
movl $_Z14gpu_matrixmultPiS_S_i, %esi
movl $.L__unnamed_1, %edx
movl $.L__unnamed_1, %ecx
movl $-1, %r8d
xorl %r9d, %r9d
callq __hipRegisterFunction
movl $__hip_module_dtor, %edi
addq $40, %rsp
.cfi_def_cfa_offset 8
jmp atexit # TAILCALL
.Lfunc_end1:
.size __hip_module_ctor, .Lfunc_end1-__hip_module_ctor
.cfi_endproc
# -- End function
.p2align 4, 0x90 # -- Begin function __hip_module_dtor
.type __hip_module_dtor,@function
__hip_module_dtor: # @__hip_module_dtor
.cfi_startproc
# %bb.0:
movq __hip_gpubin_handle(%rip), %rdi
testq %rdi, %rdi
je .LBB2_2
# %bb.1:
pushq %rax
.cfi_def_cfa_offset 16
callq __hipUnregisterFatBinary
movq $0, __hip_gpubin_handle(%rip)
addq $8, %rsp
.cfi_def_cfa_offset 8
.LBB2_2:
retq
.Lfunc_end2:
.size __hip_module_dtor, .Lfunc_end2-__hip_module_dtor
.cfi_endproc
# -- End function
.type _Z14gpu_matrixmultPiS_S_i,@object # @_Z14gpu_matrixmultPiS_S_i
.section .rodata,"a",@progbits
.globl _Z14gpu_matrixmultPiS_S_i
.p2align 3, 0x0
_Z14gpu_matrixmultPiS_S_i:
.quad _Z29__device_stub__gpu_matrixmultPiS_S_i
.size _Z14gpu_matrixmultPiS_S_i, 8
.type .L__unnamed_1,@object # @0
.section .rodata.str1.1,"aMS",@progbits,1
.L__unnamed_1:
.asciz "_Z14gpu_matrixmultPiS_S_i"
.size .L__unnamed_1, 26
.type __hip_fatbin_wrapper,@object # @__hip_fatbin_wrapper
.section .hipFatBinSegment,"a",@progbits
.p2align 3, 0x0
__hip_fatbin_wrapper:
.long 1212764230 # 0x48495046
.long 1 # 0x1
.quad __hip_fatbin
.quad 0
.size __hip_fatbin_wrapper, 24
.type __hip_gpubin_handle,@object # @__hip_gpubin_handle
.local __hip_gpubin_handle
.comm __hip_gpubin_handle,8,8
.section .init_array,"aw",@init_array
.p2align 3, 0x0
.quad __hip_module_ctor
.type __hip_cuid_,@object # @__hip_cuid_
.bss
.globl __hip_cuid_
__hip_cuid_:
.byte 0 # 0x0
.size __hip_cuid_, 1
.section ".linker-options","e",@llvm_linker_options
.ident "AMD clang version 18.0.0git (https://github.com/RadeonOpenCompute/llvm-project roc-6.3.2 25012 e5bf7e55c91490b07c49d8960fa7983d864936c4)"
.section ".note.GNU-stack","",@progbits
.addrsig
.addrsig_sym _Z29__device_stub__gpu_matrixmultPiS_S_i
.addrsig_sym __hip_module_ctor
.addrsig_sym __hip_module_dtor
.addrsig_sym _Z14gpu_matrixmultPiS_S_i
.addrsig_sym __hip_fatbin
.addrsig_sym __hip_fatbin_wrapper
.addrsig_sym __hip_cuid_ |
You are a helpful coding assistant specialized in converting from CUDA device assembly to AMD device assembly. | code for sm_80
Function : _Z14gpu_matrixmultPiS_S_i
.headerflags @"EF_CUDA_TEXMODE_UNIFIED EF_CUDA_64BIT_ADDRESS EF_CUDA_SM80 EF_CUDA_VIRTUAL_SM(EF_CUDA_SM80)"
/*0000*/ MOV R1, c[0x0][0x28] ; /* 0x00000a0000017a02 */
/* 0x000fe40000000f00 */
/*0010*/ S2R R3, SR_CTAID.Y ; /* 0x0000000000037919 */
/* 0x000e280000002600 */
/*0020*/ S2R R2, SR_TID.Y ; /* 0x0000000000027919 */
/* 0x000e280000002200 */
/*0030*/ S2R R0, SR_CTAID.X ; /* 0x0000000000007919 */
/* 0x000e680000002500 */
/*0040*/ S2R R5, SR_TID.X ; /* 0x0000000000057919 */
/* 0x000e620000002100 */
/*0050*/ IMAD R3, R3, c[0x0][0x4], R2 ; /* 0x0000010003037a24 */
/* 0x001fca00078e0202 */
/*0060*/ ISETP.GE.AND P0, PT, R3, c[0x0][0x178], PT ; /* 0x00005e0003007a0c */
/* 0x000fe20003f06270 */
/*0070*/ IMAD R0, R0, c[0x0][0x0], R5 ; /* 0x0000000000007a24 */
/* 0x002fca00078e0205 */
/*0080*/ ISETP.GE.OR P0, PT, R0, c[0x0][0x178], P0 ; /* 0x00005e0000007a0c */
/* 0x000fda0000706670 */
/*0090*/ @P0 EXIT ; /* 0x000000000000094d */
/* 0x000fea0003800000 */
/*00a0*/ MOV R2, c[0x0][0x178] ; /* 0x00005e0000027a02 */
/* 0x000fe20000000f00 */
/*00b0*/ ULDC.64 UR4, c[0x0][0x118] ; /* 0x0000460000047ab9 */
/* 0x000fe20000000a00 */
/*00c0*/ HFMA2.MMA R28, -RZ, RZ, 0, 0 ; /* 0x00000000ff1c7435 */
/* 0x000fe200000001ff */
/*00d0*/ IMAD R3, R3, c[0x0][0x178], RZ ; /* 0x00005e0003037a24 */
/* 0x000fe200078e02ff */
/*00e0*/ ISETP.GE.AND P0, PT, R2, 0x1, PT ; /* 0x000000010200780c */
/* 0x000fda0003f06270 */
/*00f0*/ @!P0 BRA 0xbf0 ; /* 0x00000af000008947 */
/* 0x000fea0003800000 */
/*0100*/ IADD3 R4, R2.reuse, -0x1, RZ ; /* 0xffffffff02047810 */
/* 0x040fe40007ffe0ff */
/*0110*/ LOP3.LUT R5, R2, 0x3, RZ, 0xc0, !PT ; /* 0x0000000302057812 */
/* 0x000fe400078ec0ff */
/*0120*/ ISETP.GE.U32.AND P0, PT, R4, 0x3, PT ; /* 0x000000030400780c */
/* 0x000fe40003f06070 */
/*0130*/ MOV R28, RZ ; /* 0x000000ff001c7202 */
/* 0x000fe40000000f00 */
/*0140*/ MOV R4, RZ ; /* 0x000000ff00047202 */
/* 0x000fd20000000f00 */
/*0150*/ @!P0 BRA 0xaf0 ; /* 0x0000099000008947 */
/* 0x000fea0003800000 */
/*0160*/ IADD3 R6, -R5, c[0x0][0x178], RZ ; /* 0x00005e0005067a10 */
/* 0x000fe20007ffe1ff */
/*0170*/ HFMA2.MMA R25, -RZ, RZ, 0, 2.384185791015625e-07 ; /* 0x00000004ff197435 */
/* 0x000fe200000001ff */
/*0180*/ ULDC.64 UR6, c[0x0][0x160] ; /* 0x0000580000067ab9 */
/* 0x000fe20000000a00 */
/*0190*/ MOV R28, RZ ; /* 0x000000ff001c7202 */
/* 0x000fe40000000f00 */
/*01a0*/ ISETP.GT.AND P0, PT, R6, RZ, PT ; /* 0x000000ff0600720c */
/* 0x000fcc0003f04270 */
/*01b0*/ IMAD.WIDE R24, R0, R25, c[0x0][0x168] ; /* 0x00005a0000187625 */
/* 0x000fce00078e0219 */
/*01c0*/ @!P0 BRA 0x960 ; /* 0x0000079000008947 */
/* 0x000fea0003800000 */
/*01d0*/ ISETP.GT.AND P1, PT, R6, 0xc, PT ; /* 0x0000000c0600780c */
/* 0x000fe40003f24270 */
/*01e0*/ PLOP3.LUT P0, PT, PT, PT, PT, 0x80, 0x0 ; /* 0x000000000000781c */
/* 0x000fd60003f0f070 */
/*01f0*/ @!P1 BRA 0x6a0 ; /* 0x000004a000009947 */
/* 0x000fea0003800000 */
/*0200*/ PLOP3.LUT P0, PT, PT, PT, PT, 0x8, 0x0 ; /* 0x000000000000781c */
/* 0x000fe40003f0e170 */
/*0210*/ MOV R12, UR6 ; /* 0x00000006000c7c02 */
/* 0x000fe20008000f00 */
/*0220*/ LDG.E R29, [R24.64] ; /* 0x00000004181d7981 */
/* 0x0000a2000c1e1900 */
/*0230*/ MOV R13, UR7 ; /* 0x00000007000d7c02 */
/* 0x000fca0008000f00 */
/*0240*/ IMAD.WIDE R12, R3, 0x4, R12 ; /* 0x00000004030c7825 */
/* 0x000fca00078e020c */
/*0250*/ LDG.E R27, [R12.64] ; /* 0x000000040c1b7981 */
/* 0x000ea2000c1e1900 */
/*0260*/ IMAD.WIDE R10, R2, 0x4, R24 ; /* 0x00000004020a7825 */
/* 0x000fc600078e0218 */
/*0270*/ LDG.E R17, [R12.64+0x4] ; /* 0x000004040c117981 */
/* 0x000ee6000c1e1900 */
/*0280*/ IMAD.WIDE R18, R2.reuse, 0x4, R10 ; /* 0x0000000402127825 */
/* 0x040fe200078e020a */
/*0290*/ LDG.E R16, [R10.64] ; /* 0x000000040a107981 */
/* 0x0002e8000c1e1900 */
/*02a0*/ LDG.E R7, [R12.64+0xc] ; /* 0x00000c040c077981 */
/* 0x000f22000c1e1900 */
/*02b0*/ IMAD.WIDE R14, R2, 0x4, R18 ; /* 0x00000004020e7825 */
/* 0x000fc600078e0212 */
/*02c0*/ LDG.E R18, [R18.64] ; /* 0x0000000412127981 */
/* 0x000b26000c1e1900 */
/*02d0*/ IMAD.WIDE R20, R2.reuse, 0x4, R14 ; /* 0x0000000402147825 */
/* 0x040fe200078e020e */
/*02e0*/ LDG.E R26, [R14.64] ; /* 0x000000040e1a7981 */
/* 0x000128000c1e1900 */
/*02f0*/ LDG.E R9, [R12.64+0x10] ; /* 0x000010040c097981 */
/* 0x000f28000c1e1900 */
/*0300*/ LDG.E R19, [R12.64+0x8] ; /* 0x000008040c137981 */
/* 0x020f22000c1e1900 */
/*0310*/ IMAD.WIDE R14, R2, 0x4, R20 ; /* 0x00000004020e7825 */
/* 0x001fc600078e0214 */
/*0320*/ LDG.E R20, [R20.64] ; /* 0x0000000414147981 */
/* 0x000166000c1e1900 */
/*0330*/ IMAD.WIDE R22, R2.reuse, 0x4, R14 ; /* 0x0000000402167825 */
/* 0x040fe200078e020e */
/*0340*/ LDG.E R8, [R14.64] ; /* 0x000000040e087981 */
/* 0x000168000c1e1900 */
/*0350*/ LDG.E R11, [R12.64+0x14] ; /* 0x000014040c0b7981 */
/* 0x002f62000c1e1900 */
/*0360*/ IMAD.WIDE R24, R2, 0x4, R22 ; /* 0x0000000402187825 */
/* 0x000fc600078e0216 */
/*0370*/ LDG.E R10, [R22.64] ; /* 0x00000004160a7981 */
/* 0x000368000c1e1900 */
/*0380*/ LDG.E R21, [R12.64+0x18] ; /* 0x000018040c157981 */
/* 0x001f62000c1e1900 */
/*0390*/ IMAD R29, R29, R27, R28 ; /* 0x0000001b1d1d7224 */
/* 0x004fc600078e021c */
/*03a0*/ LDG.E R27, [R12.64+0x1c] ; /* 0x00001c040c1b7981 */
/* 0x000ea8000c1e1900 */
/*03b0*/ LDG.E R28, [R24.64] ; /* 0x00000004181c7981 */
/* 0x0000a2000c1e1900 */
/*03c0*/ IMAD.WIDE R14, R2, 0x4, R24 ; /* 0x00000004020e7825 */
/* 0x000fc800078e0218 */
/*03d0*/ IMAD R29, R16, R17, R29 ; /* 0x00000011101d7224 */
/* 0x008fe400078e021d */
/*03e0*/ IMAD.WIDE R16, R2, 0x4, R14 ; /* 0x0000000402107825 */
/* 0x000fe400078e020e */
/*03f0*/ LDG.E R14, [R14.64] ; /* 0x000000040e0e7981 */
/* 0x0006a4000c1e1900 */
/*0400*/ IMAD R29, R18, R19, R29 ; /* 0x00000013121d7224 */
/* 0x010fe400078e021d */
/*0410*/ IMAD.WIDE R18, R2, 0x4, R16 ; /* 0x0000000402127825 */
/* 0x000fe400078e0210 */
/*0420*/ LDG.E R16, [R16.64] ; /* 0x0000000410107981 */
/* 0x0008a4000c1e1900 */
/*0430*/ IMAD R26, R26, R7, R29 ; /* 0x000000071a1a7224 */
/* 0x000fc400078e021d */
/*0440*/ IMAD.WIDE R22, R2.reuse, 0x4, R18 ; /* 0x0000000402167825 */
/* 0x042fe200078e0212 */
/*0450*/ LDG.E R7, [R12.64+0x20] ; /* 0x000020040c077981 */
/* 0x000ea8000c1e1900 */
/*0460*/ LDG.E R29, [R12.64+0x24] ; /* 0x000024040c1d7981 */
/* 0x000ea2000c1e1900 */
/*0470*/ IMAD.WIDE R24, R2, 0x4, R22 ; /* 0x0000000402187825 */
/* 0x001fc600078e0216 */
/*0480*/ LDG.E R18, [R18.64] ; /* 0x0000000412127981 */
/* 0x0000a2000c1e1900 */
/*0490*/ IMAD R9, R20, R9, R26 ; /* 0x0000000914097224 */
/* 0x020fc600078e021a */
/*04a0*/ LDG.E R26, [R12.64+0x28] ; /* 0x000028040c1a7981 */
/* 0x000f62000c1e1900 */
/*04b0*/ IMAD R11, R8, R11, R9 ; /* 0x0000000b080b7224 */
/* 0x000fe400078e0209 */
/*04c0*/ IMAD.WIDE R8, R2, 0x4, R24 ; /* 0x0000000402087825 */
/* 0x000fe200078e0218 */
/*04d0*/ LDG.E R22, [R22.64] ; /* 0x0000000416167981 */
/* 0x000368000c1e1900 */
/*04e0*/ LDG.E R17, [R12.64+0x2c] ; /* 0x00002c040c117981 */
/* 0x010f22000c1e1900 */
/*04f0*/ IMAD R21, R10, R21, R11 ; /* 0x000000150a157224 */
/* 0x000fc600078e020b */
/*0500*/ LDG.E R15, [R24.64] ; /* 0x00000004180f7981 */
/* 0x008722000c1e1900 */
/*0510*/ IMAD.WIDE R10, R2, 0x4, R8 ; /* 0x00000004020a7825 */
/* 0x000fc600078e0208 */
/*0520*/ LDG.E R19, [R8.64] ; /* 0x0000000408137981 */
/* 0x001128000c1e1900 */
/*0530*/ LDG.E R23, [R10.64] ; /* 0x000000040a177981 */
/* 0x002f28000c1e1900 */
/*0540*/ LDG.E R24, [R12.64+0x30] ; /* 0x000030040c187981 */
/* 0x008ee8000c1e1900 */
/*0550*/ LDG.E R25, [R12.64+0x38] ; /* 0x000038040c197981 */
/* 0x000ee8000c1e1900 */
/*0560*/ LDG.E R8, [R12.64+0x3c] ; /* 0x00003c040c087981 */
/* 0x001ee2000c1e1900 */
/*0570*/ IMAD R9, R28, R27, R21 ; /* 0x0000001b1c097224 */
/* 0x004fc600078e0215 */
/*0580*/ LDG.E R28, [R12.64+0x34] ; /* 0x000034040c1c7981 */
/* 0x000ea2000c1e1900 */
/*0590*/ IMAD.WIDE R20, R2, 0x4, R10 ; /* 0x0000000402147825 */
/* 0x000fca00078e020a */
/*05a0*/ LDG.E R27, [R20.64] ; /* 0x00000004141b7981 */
/* 0x000ea2000c1e1900 */
/*05b0*/ IADD3 R6, R6, -0x10, RZ ; /* 0xfffffff006067810 */
/* 0x000fc80007ffe0ff */
/*05c0*/ ISETP.GT.AND P1, PT, R6, 0xc, PT ; /* 0x0000000c0600780c */
/* 0x000fe20003f24270 */
/*05d0*/ IMAD R7, R14, R7, R9 ; /* 0x000000070e077224 */
/* 0x000fc800078e0209 */
/*05e0*/ IMAD R7, R16, R29, R7 ; /* 0x0000001d10077224 */
/* 0x000fc800078e0207 */
/*05f0*/ IMAD R7, R18, R26, R7 ; /* 0x0000001a12077224 */
/* 0x020fc800078e0207 */
/*0600*/ IMAD R7, R22, R17, R7 ; /* 0x0000001116077224 */
/* 0x010fe200078e0207 */
/*0610*/ UIADD3 UR6, UP0, UR6, 0x40, URZ ; /* 0x0000004006067890 */
/* 0x000fe2000ff1e03f */
/*0620*/ IADD3 R4, R4, 0x10, RZ ; /* 0x0000001004047810 */
/* 0x000fc60007ffe0ff */
/*0630*/ UIADD3.X UR7, URZ, UR7, URZ, UP0, !UPT ; /* 0x000000073f077290 */
/* 0x000fe200087fe43f */
/*0640*/ IMAD R7, R15, R24, R7 ; /* 0x000000180f077224 */
/* 0x008fc800078e0207 */
/*0650*/ IMAD R28, R19, R28, R7 ; /* 0x0000001c131c7224 */
/* 0x004fc800078e0207 */
/*0660*/ IMAD R28, R23, R25, R28 ; /* 0x00000019171c7224 */
/* 0x000fe400078e021c */
/*0670*/ IMAD.WIDE R24, R2, 0x4, R20 ; /* 0x0000000402187825 */
/* 0x000fc800078e0214 */
/*0680*/ IMAD R28, R27, R8, R28 ; /* 0x000000081b1c7224 */
/* 0x000fe200078e021c */
/*0690*/ @P1 BRA 0x210 ; /* 0xfffffb7000001947 */
/* 0x000fea000383ffff */
/*06a0*/ ISETP.GT.AND P1, PT, R6, 0x4, PT ; /* 0x000000040600780c */
/* 0x000fda0003f24270 */
/*06b0*/ @!P1 BRA 0x940 ; /* 0x0000028000009947 */
/* 0x000fea0003800000 */
/*06c0*/ IMAD.WIDE R16, R2, 0x4, R24 ; /* 0x0000000402107825 */
/* 0x000fe200078e0218 */
/*06d0*/ MOV R8, UR6 ; /* 0x0000000600087c02 */
/* 0x000fe20008000f00 */
/*06e0*/ LDG.E R7, [R24.64] ; /* 0x0000000418077981 */
/* 0x0000a2000c1e1900 */
/*06f0*/ MOV R9, UR7 ; /* 0x0000000700097c02 */
/* 0x000fc60008000f00 */
/*0700*/ IMAD.WIDE R12, R2.reuse, 0x4, R16 ; /* 0x00000004020c7825 */
/* 0x040fe200078e0210 */
/*0710*/ LDG.E R21, [R16.64] ; /* 0x0000000410157981 */
/* 0x0002e6000c1e1900 */
/*0720*/ IMAD.WIDE R8, R3, 0x4, R8 ; /* 0x0000000403087825 */
/* 0x000fe200078e0208 */
/*0730*/ LDG.E R23, [R12.64] ; /* 0x000000040c177981 */
/* 0x000966000c1e1900 */
/*0740*/ IMAD.WIDE R14, R2.reuse, 0x4, R12 ; /* 0x00000004020e7825 */
/* 0x040fe200078e020c */
/*0750*/ LDG.E R20, [R8.64] ; /* 0x0000000408147981 */
/* 0x000ea8000c1e1900 */
/*0760*/ LDG.E R22, [R8.64+0x4] ; /* 0x0000040408167981 */
/* 0x000ee2000c1e1900 */
/*0770*/ IMAD.WIDE R10, R2, 0x4, R14 ; /* 0x00000004020a7825 */
/* 0x000fc600078e020e */
/*0780*/ LDG.E R26, [R8.64+0x8] ; /* 0x00000804081a7981 */
/* 0x000f66000c1e1900 */
/*0790*/ IMAD.WIDE R16, R2.reuse, 0x4, R10 ; /* 0x0000000402107825 */
/* 0x042fe200078e020a */
/*07a0*/ LDG.E R14, [R14.64] ; /* 0x000000040e0e7981 */
/* 0x000368000c1e1900 */
/*07b0*/ LDG.E R27, [R8.64+0xc] ; /* 0x00000c04081b7981 */
/* 0x000f62000c1e1900 */
/*07c0*/ IMAD.WIDE R18, R2, 0x4, R16 ; /* 0x0000000402127825 */
/* 0x000fc600078e0210 */
/*07d0*/ LDG.E R10, [R10.64] ; /* 0x000000040a0a7981 */
/* 0x000368000c1e1900 */
/*07e0*/ LDG.E R25, [R8.64+0x10] ; /* 0x0000100408197981 */
/* 0x001f62000c1e1900 */
/*07f0*/ IMAD.WIDE R12, R2, 0x4, R18 ; /* 0x00000004020c7825 */
/* 0x010fc600078e0212 */
/*0800*/ LDG.E R16, [R16.64] ; /* 0x0000000410107981 */
/* 0x000f28000c1e1900 */
/*0810*/ LDG.E R29, [R8.64+0x14] ; /* 0x00001404081d7981 */
/* 0x000f28000c1e1900 */
/*0820*/ LDG.E R24, [R18.64] ; /* 0x0000000412187981 */
/* 0x000128000c1e1900 */
/*0830*/ LDG.E R11, [R8.64+0x18] ; /* 0x00001804080b7981 */
/* 0x002f28000c1e1900 */
/*0840*/ LDG.E R15, [R12.64] ; /* 0x000000040c0f7981 */
/* 0x000f28000c1e1900 */
/*0850*/ LDG.E R18, [R8.64+0x1c] ; /* 0x00001c0408127981 */
/* 0x001f22000c1e1900 */
/*0860*/ UIADD3 UR6, UP0, UR6, 0x20, URZ ; /* 0x0000002006067890 */
/* 0x000fe2000ff1e03f */
/*0870*/ PLOP3.LUT P0, PT, PT, PT, PT, 0x8, 0x0 ; /* 0x000000000000781c */
/* 0x000fc40003f0e170 */
/*0880*/ IADD3 R4, R4, 0x8, RZ ; /* 0x0000000804047810 */
/* 0x000fe40007ffe0ff */
/*0890*/ IADD3 R6, R6, -0x8, RZ ; /* 0xfffffff806067810 */
/* 0x000fe20007ffe0ff */
/*08a0*/ UIADD3.X UR7, URZ, UR7, URZ, UP0, !UPT ; /* 0x000000073f077290 */
/* 0x000fe200087fe43f */
/*08b0*/ IMAD R7, R7, R20, R28 ; /* 0x0000001407077224 */
/* 0x004fc800078e021c */
/*08c0*/ IMAD R7, R21, R22, R7 ; /* 0x0000001615077224 */
/* 0x008fc800078e0207 */
/*08d0*/ IMAD R7, R23, R26, R7 ; /* 0x0000001a17077224 */
/* 0x020fc800078e0207 */
/*08e0*/ IMAD R7, R14, R27, R7 ; /* 0x0000001b0e077224 */
/* 0x000fc800078e0207 */
/*08f0*/ IMAD R7, R10, R25, R7 ; /* 0x000000190a077224 */
/* 0x000fc800078e0207 */
/*0900*/ IMAD R7, R16, R29, R7 ; /* 0x0000001d10077224 */
/* 0x010fc800078e0207 */
/*0910*/ IMAD R7, R24, R11, R7 ; /* 0x0000000b18077224 */
/* 0x000fe400078e0207 */
/*0920*/ IMAD.WIDE R24, R2, 0x4, R12 ; /* 0x0000000402187825 */
/* 0x000fc800078e020c */
/*0930*/ IMAD R28, R15, R18, R7 ; /* 0x000000120f1c7224 */
/* 0x000fe400078e0207 */
/*0940*/ ISETP.NE.OR P0, PT, R6, RZ, P0 ; /* 0x000000ff0600720c */
/* 0x000fda0000705670 */
/*0950*/ @!P0 BRA 0xaf0 ; /* 0x0000019000008947 */
/* 0x000fea0003800000 */
/*0960*/ MOV R8, UR6 ; /* 0x0000000600087c02 */
/* 0x000fe20008000f00 */
/*0970*/ IMAD.WIDE R14, R2, 0x4, R24 ; /* 0x00000004020e7825 */
/* 0x000fe200078e0218 */
/*0980*/ MOV R9, UR7 ; /* 0x0000000700097c02 */
/* 0x000fe20008000f00 */
/*0990*/ LDG.E R25, [R24.64] ; /* 0x0000000418197981 */
/* 0x000ea8000c1e1900 */
/*09a0*/ IMAD.WIDE R8, R3, 0x4, R8 ; /* 0x0000000403087825 */
/* 0x000fc800078e0208 */
/*09b0*/ IMAD.WIDE R12, R2.reuse, 0x4, R14 ; /* 0x00000004020c7825 */
/* 0x040fe200078e020e */
/*09c0*/ LDG.E R7, [R8.64] ; /* 0x0000000408077981 */
/* 0x000ea8000c1e1900 */
/*09d0*/ LDG.E R14, [R14.64] ; /* 0x000000040e0e7981 */
/* 0x000ee2000c1e1900 */
/*09e0*/ IMAD.WIDE R10, R2, 0x4, R12 ; /* 0x00000004020a7825 */
/* 0x000fc600078e020c */
/*09f0*/ LDG.E R16, [R8.64+0x4] ; /* 0x0000040408107981 */
/* 0x000ee8000c1e1900 */
/*0a00*/ LDG.E R18, [R12.64] ; /* 0x000000040c127981 */
/* 0x000f28000c1e1900 */
/*0a10*/ LDG.E R17, [R8.64+0x8] ; /* 0x0000080408117981 */
/* 0x000f28000c1e1900 */
/*0a20*/ LDG.E R19, [R8.64+0xc] ; /* 0x00000c0408137981 */
/* 0x000f68000c1e1900 */
/*0a30*/ LDG.E R20, [R10.64] ; /* 0x000000040a147981 */
/* 0x000f62000c1e1900 */
/*0a40*/ IADD3 R6, R6, -0x4, RZ ; /* 0xfffffffc06067810 */
/* 0x000fc80007ffe0ff */
/*0a50*/ ISETP.NE.AND P0, PT, R6, RZ, PT ; /* 0x000000ff0600720c */
/* 0x000fe20003f05270 */
/*0a60*/ UIADD3 UR6, UP0, UR6, 0x10, URZ ; /* 0x0000001006067890 */
/* 0x000fe2000ff1e03f */
/*0a70*/ IADD3 R4, R4, 0x4, RZ ; /* 0x0000000404047810 */
/* 0x000fc60007ffe0ff */
/*0a80*/ UIADD3.X UR7, URZ, UR7, URZ, UP0, !UPT ; /* 0x000000073f077290 */
/* 0x000fe200087fe43f */
/*0a90*/ IMAD R7, R25, R7, R28 ; /* 0x0000000719077224 */
/* 0x004fc800078e021c */
/*0aa0*/ IMAD R7, R14, R16, R7 ; /* 0x000000100e077224 */
/* 0x008fe400078e0207 */
/*0ab0*/ IMAD.WIDE R24, R2, 0x4, R10 ; /* 0x0000000402187825 */
/* 0x000fc800078e020a */
/*0ac0*/ IMAD R7, R18, R17, R7 ; /* 0x0000001112077224 */
/* 0x010fc800078e0207 */
/*0ad0*/ IMAD R28, R20, R19, R7 ; /* 0x00000013141c7224 */
/* 0x020fe200078e0207 */
/*0ae0*/ @P0 BRA 0x960 ; /* 0xfffffe7000000947 */
/* 0x000fea000383ffff */
/*0af0*/ ISETP.NE.AND P0, PT, R5, RZ, PT ; /* 0x000000ff0500720c */
/* 0x000fda0003f05270 */
/*0b00*/ @!P0 BRA 0xbf0 ; /* 0x000000e000008947 */
/* 0x000fea0003800000 */
/*0b10*/ HFMA2.MMA R9, -RZ, RZ, 0, 2.384185791015625e-07 ; /* 0x00000004ff097435 */
/* 0x000fe200000001ff */
/*0b20*/ IADD3 R6, R3, R4, RZ ; /* 0x0000000403067210 */
/* 0x000fe20007ffe0ff */
/*0b30*/ IMAD R4, R4, c[0x0][0x178], R0 ; /* 0x00005e0004047a24 */
/* 0x000fd000078e0200 */
/*0b40*/ IMAD.WIDE R6, R6, R9, c[0x0][0x160] ; /* 0x0000580006067625 */
/* 0x000fc800078e0209 */
/*0b50*/ IMAD.WIDE R8, R4, R9, c[0x0][0x168] ; /* 0x00005a0004087625 */
/* 0x000fca00078e0209 */
/*0b60*/ LDG.E R11, [R8.64] ; /* 0x00000004080b7981 */
/* 0x0000a8000c1e1900 */
/*0b70*/ LDG.E R4, [R6.64] ; /* 0x0000000406047981 */
/* 0x0002a2000c1e1900 */
/*0b80*/ IADD3 R5, R5, -0x1, RZ ; /* 0xffffffff05057810 */
/* 0x000fc80007ffe0ff */
/*0b90*/ ISETP.NE.AND P0, PT, R5, RZ, PT ; /* 0x000000ff0500720c */
/* 0x000fe20003f05270 */
/*0ba0*/ IMAD.WIDE R8, R2, 0x4, R8 ; /* 0x0000000402087825 */
/* 0x001fe200078e0208 */
/*0bb0*/ IADD3 R6, P1, R6, 0x4, RZ ; /* 0x0000000406067810 */
/* 0x002fc80007f3e0ff */
/*0bc0*/ IADD3.X R7, RZ, R7, RZ, P1, !PT ; /* 0x00000007ff077210 */
/* 0x000fe20000ffe4ff */
/*0bd0*/ IMAD R28, R11, R4, R28 ; /* 0x000000040b1c7224 */
/* 0x004fcc00078e021c */
/*0be0*/ @P0 BRA 0xb60 ; /* 0xffffff7000000947 */
/* 0x000fea000383ffff */
/*0bf0*/ IADD3 R3, R0, R3, RZ ; /* 0x0000000300037210 */
/* 0x000fe40007ffe0ff */
/*0c00*/ MOV R2, 0x4 ; /* 0x0000000400027802 */
/* 0x000fca0000000f00 */
/*0c10*/ IMAD.WIDE R2, R3, R2, c[0x0][0x170] ; /* 0x00005c0003027625 */
/* 0x000fca00078e0202 */
/*0c20*/ STG.E [R2.64], R28 ; /* 0x0000001c02007986 */
/* 0x000fe2000c101904 */
/*0c30*/ EXIT ; /* 0x000000000000794d */
/* 0x000fea0003800000 */
/*0c40*/ BRA 0xc40; /* 0xfffffff000007947 */
/* 0x000fc0000383ffff */
/*0c50*/ NOP; /* 0x0000000000007918 */
/* 0x000fc00000000000 */
/*0c60*/ NOP; /* 0x0000000000007918 */
/* 0x000fc00000000000 */
/*0c70*/ NOP; /* 0x0000000000007918 */
/* 0x000fc00000000000 */
/*0c80*/ NOP; /* 0x0000000000007918 */
/* 0x000fc00000000000 */
/*0c90*/ NOP; /* 0x0000000000007918 */
/* 0x000fc00000000000 */
/*0ca0*/ NOP; /* 0x0000000000007918 */
/* 0x000fc00000000000 */
/*0cb0*/ NOP; /* 0x0000000000007918 */
/* 0x000fc00000000000 */
/*0cc0*/ NOP; /* 0x0000000000007918 */
/* 0x000fc00000000000 */
/*0cd0*/ NOP; /* 0x0000000000007918 */
/* 0x000fc00000000000 */
/*0ce0*/ NOP; /* 0x0000000000007918 */
/* 0x000fc00000000000 */
/*0cf0*/ NOP; /* 0x0000000000007918 */
/* 0x000fc00000000000 */
.......... | .text
.amdgcn_target "amdgcn-amd-amdhsa--gfx1100"
.protected _Z14gpu_matrixmultPiS_S_i
.globl _Z14gpu_matrixmultPiS_S_i
.p2align 8
.type _Z14gpu_matrixmultPiS_S_i,@function
_Z14gpu_matrixmultPiS_S_i:
s_clause 0x1
s_load_b32 s3, s[0:1], 0x2c
s_load_b32 s2, s[0:1], 0x18
v_and_b32_e32 v2, 0x3ff, v0
v_bfe_u32 v3, v0, 10, 10
s_waitcnt lgkmcnt(0)
s_and_b32 s4, s3, 0xffff
s_lshr_b32 s3, s3, 16
s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_2) | instid1(VALU_DEP_1)
v_mad_u64_u32 v[0:1], null, s14, s4, v[2:3]
v_mad_u64_u32 v[1:2], null, s15, s3, v[3:4]
s_mov_b32 s3, exec_lo
v_max_i32_e32 v2, v0, v1
s_delay_alu instid0(VALU_DEP_1)
v_cmpx_gt_i32_e64 s2, v2
s_cbranch_execz .LBB0_6
s_cmp_lt_i32 s2, 1
s_cbranch_scc1 .LBB0_4
s_load_b128 s[4:7], s[0:1], 0x0
v_mul_lo_u32 v2, v1, s2
s_mov_b32 s3, s2
v_mov_b32_e32 v5, v0
s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
v_ashrrev_i32_e32 v3, 31, v2
v_lshlrev_b64 v[3:4], 2, v[2:3]
v_mov_b32_e32 v2, 0
s_waitcnt lgkmcnt(0)
s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_3)
v_add_co_u32 v3, vcc_lo, s4, v3
v_add_co_ci_u32_e32 v4, vcc_lo, s5, v4, vcc_lo
.p2align 6
.LBB0_3:
s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(SALU_CYCLE_1)
v_ashrrev_i32_e32 v6, 31, v5
s_add_i32 s3, s3, -1
s_cmp_lg_u32 s3, 0
s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
v_lshlrev_b64 v[6:7], 2, v[5:6]
v_add_co_u32 v6, vcc_lo, s6, v6
s_delay_alu instid0(VALU_DEP_2)
v_add_co_ci_u32_e32 v7, vcc_lo, s7, v7, vcc_lo
global_load_b32 v8, v[3:4], off
global_load_b32 v9, v[6:7], off
s_waitcnt vmcnt(0)
v_mad_u64_u32 v[6:7], null, v9, v8, v[2:3]
v_add_co_u32 v3, vcc_lo, v3, 4
v_add_co_ci_u32_e32 v4, vcc_lo, 0, v4, vcc_lo
s_delay_alu instid0(VALU_DEP_3)
v_dual_mov_b32 v2, v6 :: v_dual_add_nc_u32 v5, s2, v5
s_cbranch_scc1 .LBB0_3
s_branch .LBB0_5
.LBB0_4:
v_mov_b32_e32 v2, 0
.LBB0_5:
s_load_b64 s[0:1], s[0:1], 0x10
v_mad_u64_u32 v[3:4], null, v1, s2, v[0:1]
s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
v_ashrrev_i32_e32 v4, 31, v3
v_lshlrev_b64 v[0:1], 2, v[3:4]
s_waitcnt lgkmcnt(0)
s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_2)
v_add_co_u32 v0, vcc_lo, s0, v0
v_add_co_ci_u32_e32 v1, vcc_lo, s1, v1, vcc_lo
global_store_b32 v[0:1], v2, off
.LBB0_6:
s_nop 0
s_sendmsg sendmsg(MSG_DEALLOC_VGPRS)
s_endpgm
.section .rodata,"a",@progbits
.p2align 6, 0x0
.amdhsa_kernel _Z14gpu_matrixmultPiS_S_i
.amdhsa_group_segment_fixed_size 0
.amdhsa_private_segment_fixed_size 0
.amdhsa_kernarg_size 288
.amdhsa_user_sgpr_count 14
.amdhsa_user_sgpr_dispatch_ptr 0
.amdhsa_user_sgpr_queue_ptr 0
.amdhsa_user_sgpr_kernarg_segment_ptr 1
.amdhsa_user_sgpr_dispatch_id 0
.amdhsa_user_sgpr_private_segment_size 0
.amdhsa_wavefront_size32 1
.amdhsa_uses_dynamic_stack 0
.amdhsa_enable_private_segment 0
.amdhsa_system_sgpr_workgroup_id_x 1
.amdhsa_system_sgpr_workgroup_id_y 1
.amdhsa_system_sgpr_workgroup_id_z 0
.amdhsa_system_sgpr_workgroup_info 0
.amdhsa_system_vgpr_workitem_id 1
.amdhsa_next_free_vgpr 10
.amdhsa_next_free_sgpr 16
.amdhsa_float_round_mode_32 0
.amdhsa_float_round_mode_16_64 0
.amdhsa_float_denorm_mode_32 3
.amdhsa_float_denorm_mode_16_64 3
.amdhsa_dx10_clamp 1
.amdhsa_ieee_mode 1
.amdhsa_fp16_overflow 0
.amdhsa_workgroup_processor_mode 1
.amdhsa_memory_ordered 1
.amdhsa_forward_progress 0
.amdhsa_shared_vgpr_count 0
.amdhsa_exception_fp_ieee_invalid_op 0
.amdhsa_exception_fp_denorm_src 0
.amdhsa_exception_fp_ieee_div_zero 0
.amdhsa_exception_fp_ieee_overflow 0
.amdhsa_exception_fp_ieee_underflow 0
.amdhsa_exception_fp_ieee_inexact 0
.amdhsa_exception_int_div_zero 0
.end_amdhsa_kernel
.text
.Lfunc_end0:
.size _Z14gpu_matrixmultPiS_S_i, .Lfunc_end0-_Z14gpu_matrixmultPiS_S_i
.section .AMDGPU.csdata,"",@progbits
.text
.p2alignl 7, 3214868480
.fill 96, 4, 3214868480
.type __hip_cuid_,@object
.section .bss,"aw",@nobits
.globl __hip_cuid_
__hip_cuid_:
.byte 0
.size __hip_cuid_, 1
.ident "AMD clang version 18.0.0git (https://github.com/RadeonOpenCompute/llvm-project roc-6.3.2 25012 e5bf7e55c91490b07c49d8960fa7983d864936c4)"
.section ".note.GNU-stack","",@progbits
.addrsig
.addrsig_sym __hip_cuid_
.amdgpu_metadata
---
amdhsa.kernels:
- .args:
- .address_space: global
.offset: 0
.size: 8
.value_kind: global_buffer
- .address_space: global
.offset: 8
.size: 8
.value_kind: global_buffer
- .address_space: global
.offset: 16
.size: 8
.value_kind: global_buffer
- .offset: 24
.size: 4
.value_kind: by_value
- .offset: 32
.size: 4
.value_kind: hidden_block_count_x
- .offset: 36
.size: 4
.value_kind: hidden_block_count_y
- .offset: 40
.size: 4
.value_kind: hidden_block_count_z
- .offset: 44
.size: 2
.value_kind: hidden_group_size_x
- .offset: 46
.size: 2
.value_kind: hidden_group_size_y
- .offset: 48
.size: 2
.value_kind: hidden_group_size_z
- .offset: 50
.size: 2
.value_kind: hidden_remainder_x
- .offset: 52
.size: 2
.value_kind: hidden_remainder_y
- .offset: 54
.size: 2
.value_kind: hidden_remainder_z
- .offset: 72
.size: 8
.value_kind: hidden_global_offset_x
- .offset: 80
.size: 8
.value_kind: hidden_global_offset_y
- .offset: 88
.size: 8
.value_kind: hidden_global_offset_z
- .offset: 96
.size: 2
.value_kind: hidden_grid_dims
.group_segment_fixed_size: 0
.kernarg_segment_align: 8
.kernarg_segment_size: 288
.language: OpenCL C
.language_version:
- 2
- 0
.max_flat_workgroup_size: 1024
.name: _Z14gpu_matrixmultPiS_S_i
.private_segment_fixed_size: 0
.sgpr_count: 18
.sgpr_spill_count: 0
.symbol: _Z14gpu_matrixmultPiS_S_i.kd
.uniform_work_group_size: 1
.uses_dynamic_stack: false
.vgpr_count: 10
.vgpr_spill_count: 0
.wavefront_size: 32
.workgroup_processor_mode: 1
amdhsa.target: amdgcn-amd-amdhsa--gfx1100
amdhsa.version:
- 1
- 2
...
.end_amdgpu_metadata |
You are a helpful coding assistant specialized in converting from CUDA host assembly to AMD host assembly. | .file "tmpxft_0017b716_00000000-6_gpu_matrixmult.cudafe1.cpp"
.text
#APP
#NO_APP
.type _ZL26__cudaUnregisterBinaryUtilv, @function
_ZL26__cudaUnregisterBinaryUtilv:
.LFB2029:
.cfi_startproc
endbr64
subq $8, %rsp
.cfi_def_cfa_offset 16
movq _ZL20__cudaFatCubinHandle(%rip), %rdi
call __cudaUnregisterFatBinary@PLT
addq $8, %rsp
.cfi_def_cfa_offset 8
ret
.cfi_endproc
.LFE2029:
.size _ZL26__cudaUnregisterBinaryUtilv, .-_ZL26__cudaUnregisterBinaryUtilv
.globl _Z39__device_stub__Z14gpu_matrixmultPiS_S_iPiS_S_i
.type _Z39__device_stub__Z14gpu_matrixmultPiS_S_iPiS_S_i, @function
_Z39__device_stub__Z14gpu_matrixmultPiS_S_iPiS_S_i:
.LFB2051:
.cfi_startproc
endbr64
subq $152, %rsp
.cfi_def_cfa_offset 160
movq %rdi, 24(%rsp)
movq %rsi, 16(%rsp)
movq %rdx, 8(%rsp)
movl %ecx, 4(%rsp)
movq %fs:40, %rax
movq %rax, 136(%rsp)
xorl %eax, %eax
leaq 24(%rsp), %rax
movq %rax, 96(%rsp)
leaq 16(%rsp), %rax
movq %rax, 104(%rsp)
leaq 8(%rsp), %rax
movq %rax, 112(%rsp)
leaq 4(%rsp), %rax
movq %rax, 120(%rsp)
movl $1, 48(%rsp)
movl $1, 52(%rsp)
movl $1, 56(%rsp)
movl $1, 60(%rsp)
movl $1, 64(%rsp)
movl $1, 68(%rsp)
leaq 40(%rsp), %rcx
leaq 32(%rsp), %rdx
leaq 60(%rsp), %rsi
leaq 48(%rsp), %rdi
call __cudaPopCallConfiguration@PLT
testl %eax, %eax
je .L7
.L3:
movq 136(%rsp), %rax
subq %fs:40, %rax
jne .L8
addq $152, %rsp
.cfi_remember_state
.cfi_def_cfa_offset 8
ret
.L7:
.cfi_restore_state
pushq 40(%rsp)
.cfi_def_cfa_offset 168
pushq 40(%rsp)
.cfi_def_cfa_offset 176
leaq 112(%rsp), %r9
movq 76(%rsp), %rcx
movl 84(%rsp), %r8d
movq 64(%rsp), %rsi
movl 72(%rsp), %edx
leaq _Z14gpu_matrixmultPiS_S_i(%rip), %rdi
call cudaLaunchKernel@PLT
addq $16, %rsp
.cfi_def_cfa_offset 160
jmp .L3
.L8:
call __stack_chk_fail@PLT
.cfi_endproc
.LFE2051:
.size _Z39__device_stub__Z14gpu_matrixmultPiS_S_iPiS_S_i, .-_Z39__device_stub__Z14gpu_matrixmultPiS_S_iPiS_S_i
.globl _Z14gpu_matrixmultPiS_S_i
.type _Z14gpu_matrixmultPiS_S_i, @function
_Z14gpu_matrixmultPiS_S_i:
.LFB2052:
.cfi_startproc
endbr64
subq $8, %rsp
.cfi_def_cfa_offset 16
call _Z39__device_stub__Z14gpu_matrixmultPiS_S_iPiS_S_i
addq $8, %rsp
.cfi_def_cfa_offset 8
ret
.cfi_endproc
.LFE2052:
.size _Z14gpu_matrixmultPiS_S_i, .-_Z14gpu_matrixmultPiS_S_i
.section .rodata.str1.1,"aMS",@progbits,1
.LC0:
.string "_Z14gpu_matrixmultPiS_S_i"
.text
.type _ZL24__sti____cudaRegisterAllv, @function
_ZL24__sti____cudaRegisterAllv:
.LFB2054:
.cfi_startproc
endbr64
subq $8, %rsp
.cfi_def_cfa_offset 16
leaq _ZL15__fatDeviceText(%rip), %rdi
call __cudaRegisterFatBinary@PLT
movq %rax, %rdi
movq %rax, _ZL20__cudaFatCubinHandle(%rip)
pushq $0
.cfi_def_cfa_offset 24
pushq $0
.cfi_def_cfa_offset 32
pushq $0
.cfi_def_cfa_offset 40
pushq $0
.cfi_def_cfa_offset 48
movl $0, %r9d
movl $-1, %r8d
leaq .LC0(%rip), %rdx
movq %rdx, %rcx
leaq _Z14gpu_matrixmultPiS_S_i(%rip), %rsi
call __cudaRegisterFunction@PLT
addq $32, %rsp
.cfi_def_cfa_offset 16
movq _ZL20__cudaFatCubinHandle(%rip), %rdi
call __cudaRegisterFatBinaryEnd@PLT
leaq _ZL26__cudaUnregisterBinaryUtilv(%rip), %rdi
call atexit@PLT
addq $8, %rsp
.cfi_def_cfa_offset 8
ret
.cfi_endproc
.LFE2054:
.size _ZL24__sti____cudaRegisterAllv, .-_ZL24__sti____cudaRegisterAllv
.section .init_array,"aw"
.align 8
.quad _ZL24__sti____cudaRegisterAllv
.section .nvFatBinSegment,"aw"
.align 8
.type _ZL15__fatDeviceText, @object
.size _ZL15__fatDeviceText, 24
_ZL15__fatDeviceText:
.long 1180844977
.long 1
.quad fatbinData
.quad 0
.local _ZL20__cudaFatCubinHandle
.comm _ZL20__cudaFatCubinHandle,8,8
.ident "GCC: (Ubuntu 13.3.0-6ubuntu2~24.04) 13.3.0"
.section .note.GNU-stack,"",@progbits
.section .note.gnu.property,"a"
.align 8
.long 1f - 0f
.long 4f - 1f
.long 5
0:
.string "GNU"
1:
.align 8
.long 0xc0000002
.long 3f - 2f
2:
.long 0x3
3:
.align 8
4: | .text
.file "gpu_matrixmult.hip"
.globl _Z29__device_stub__gpu_matrixmultPiS_S_i # -- Begin function _Z29__device_stub__gpu_matrixmultPiS_S_i
.p2align 4, 0x90
.type _Z29__device_stub__gpu_matrixmultPiS_S_i,@function
_Z29__device_stub__gpu_matrixmultPiS_S_i: # @_Z29__device_stub__gpu_matrixmultPiS_S_i
.cfi_startproc
# %bb.0:
subq $120, %rsp
.cfi_def_cfa_offset 128
movq %rdi, 72(%rsp)
movq %rsi, 64(%rsp)
movq %rdx, 56(%rsp)
movl %ecx, 4(%rsp)
leaq 72(%rsp), %rax
movq %rax, 80(%rsp)
leaq 64(%rsp), %rax
movq %rax, 88(%rsp)
leaq 56(%rsp), %rax
movq %rax, 96(%rsp)
leaq 4(%rsp), %rax
movq %rax, 104(%rsp)
leaq 40(%rsp), %rdi
leaq 24(%rsp), %rsi
leaq 16(%rsp), %rdx
leaq 8(%rsp), %rcx
callq __hipPopCallConfiguration
movq 40(%rsp), %rsi
movl 48(%rsp), %edx
movq 24(%rsp), %rcx
movl 32(%rsp), %r8d
leaq 80(%rsp), %r9
movl $_Z14gpu_matrixmultPiS_S_i, %edi
pushq 8(%rsp)
.cfi_adjust_cfa_offset 8
pushq 24(%rsp)
.cfi_adjust_cfa_offset 8
callq hipLaunchKernel
addq $136, %rsp
.cfi_adjust_cfa_offset -136
retq
.Lfunc_end0:
.size _Z29__device_stub__gpu_matrixmultPiS_S_i, .Lfunc_end0-_Z29__device_stub__gpu_matrixmultPiS_S_i
.cfi_endproc
# -- End function
.p2align 4, 0x90 # -- Begin function __hip_module_ctor
.type __hip_module_ctor,@function
__hip_module_ctor: # @__hip_module_ctor
.cfi_startproc
# %bb.0:
subq $40, %rsp
.cfi_def_cfa_offset 48
cmpq $0, __hip_gpubin_handle(%rip)
jne .LBB1_2
# %bb.1:
movl $__hip_fatbin_wrapper, %edi
callq __hipRegisterFatBinary
movq %rax, __hip_gpubin_handle(%rip)
.LBB1_2:
movq __hip_gpubin_handle(%rip), %rdi
xorps %xmm0, %xmm0
movups %xmm0, 16(%rsp)
movups %xmm0, (%rsp)
movl $_Z14gpu_matrixmultPiS_S_i, %esi
movl $.L__unnamed_1, %edx
movl $.L__unnamed_1, %ecx
movl $-1, %r8d
xorl %r9d, %r9d
callq __hipRegisterFunction
movl $__hip_module_dtor, %edi
addq $40, %rsp
.cfi_def_cfa_offset 8
jmp atexit # TAILCALL
.Lfunc_end1:
.size __hip_module_ctor, .Lfunc_end1-__hip_module_ctor
.cfi_endproc
# -- End function
.p2align 4, 0x90 # -- Begin function __hip_module_dtor
.type __hip_module_dtor,@function
__hip_module_dtor: # @__hip_module_dtor
.cfi_startproc
# %bb.0:
movq __hip_gpubin_handle(%rip), %rdi
testq %rdi, %rdi
je .LBB2_2
# %bb.1:
pushq %rax
.cfi_def_cfa_offset 16
callq __hipUnregisterFatBinary
movq $0, __hip_gpubin_handle(%rip)
addq $8, %rsp
.cfi_def_cfa_offset 8
.LBB2_2:
retq
.Lfunc_end2:
.size __hip_module_dtor, .Lfunc_end2-__hip_module_dtor
.cfi_endproc
# -- End function
.type _Z14gpu_matrixmultPiS_S_i,@object # @_Z14gpu_matrixmultPiS_S_i
.section .rodata,"a",@progbits
.globl _Z14gpu_matrixmultPiS_S_i
.p2align 3, 0x0
_Z14gpu_matrixmultPiS_S_i:
.quad _Z29__device_stub__gpu_matrixmultPiS_S_i
.size _Z14gpu_matrixmultPiS_S_i, 8
.type .L__unnamed_1,@object # @0
.section .rodata.str1.1,"aMS",@progbits,1
.L__unnamed_1:
.asciz "_Z14gpu_matrixmultPiS_S_i"
.size .L__unnamed_1, 26
.type __hip_fatbin_wrapper,@object # @__hip_fatbin_wrapper
.section .hipFatBinSegment,"a",@progbits
.p2align 3, 0x0
__hip_fatbin_wrapper:
.long 1212764230 # 0x48495046
.long 1 # 0x1
.quad __hip_fatbin
.quad 0
.size __hip_fatbin_wrapper, 24
.type __hip_gpubin_handle,@object # @__hip_gpubin_handle
.local __hip_gpubin_handle
.comm __hip_gpubin_handle,8,8
.section .init_array,"aw",@init_array
.p2align 3, 0x0
.quad __hip_module_ctor
.type __hip_cuid_,@object # @__hip_cuid_
.bss
.globl __hip_cuid_
__hip_cuid_:
.byte 0 # 0x0
.size __hip_cuid_, 1
.section ".linker-options","e",@llvm_linker_options
.ident "AMD clang version 18.0.0git (https://github.com/RadeonOpenCompute/llvm-project roc-6.3.2 25012 e5bf7e55c91490b07c49d8960fa7983d864936c4)"
.section ".note.GNU-stack","",@progbits
.addrsig
.addrsig_sym _Z29__device_stub__gpu_matrixmultPiS_S_i
.addrsig_sym __hip_module_ctor
.addrsig_sym __hip_module_dtor
.addrsig_sym _Z14gpu_matrixmultPiS_S_i
.addrsig_sym __hip_fatbin
.addrsig_sym __hip_fatbin_wrapper
.addrsig_sym __hip_cuid_ |
You are a helpful coding assistant specialized in converting CUDA source code to CUDA host assembly. | #include <stdio.h>
#include <stdlib.h>
#include <unistd.h>
#include <limits.h>
#include <time.h>
/* Original permuation code due to D. Jimenez, UT Austin
* http://faculty.cse.tamu.edu/djimenez/ut/utsa/cs3343/
*/
/* Reference an element in the TSP distance array. */
#define TSP_ELT(tsp, n, i, j) *(tsp + (i * n) + j)
/* Create an instance of a symmetric TSP. */
int *
create_tsp(int n, int random_seed)
{
int *tsp = (int *) malloc(n * n * sizeof(int));
srandom(random_seed);
for (int i = 0; i < n; i++) {
for (int j = 0; j <= i; j++) {
int val = (int)(random() / (RAND_MAX / 100));
TSP_ELT(tsp, n, i, j) = val;
TSP_ELT(tsp, n, j, i) = val;
}
}
return tsp;
}
/* Print a TSP distance matrix. */
void
print_tsp(int *tsp, int n, int random_seed)
{
printf("TSP (%d cities - seed %d)\n ", n, random_seed);
for (int j = 0; j < n; j++) {
printf("%3d|", j);
}
printf("\n");
for (int i = 0; i < n; i++) {
printf("%2d|", i);
for (int j = 0; j < n; j++) {
printf("%4d", TSP_ELT(tsp, n, i, j));
}
printf("\n");
}
printf("\n");
}
void
usage(char *prog_name)
{
fprintf(stderr, "usage: %s [flags]\n", prog_name);
fprintf(stderr, " -h\n");
fprintf(stderr, " -t <number of threads>\n");
fprintf(stderr, " -c <number of cities>\n");
fprintf(stderr, " -s <random seed>\n");
exit(1);
}
__device__ unsigned long
factorial(int n)
{
if (n < 1) {
return 0;
}
unsigned long rtn = 1;
for (unsigned i = 1; i <= n; i++) {
rtn *= i;
}
return rtn;
}
__device__ int
calc_cost(int *perm, int *matrix, int n)
{
int total = 0;
for (int i = 0; i < n; i++) {
int j = (i + 1) % n;
int from = perm[i];
int to = perm[j];
int val = TSP_ELT(matrix, n, from, to);
total += val;
}
return total;
}
void
create_tsp(int *matrix, int n, int random_seed)
{
srandom(random_seed);
for (int i = 0; i < n; i++) {
for (int j = 0; j <= i; j++) {
int val = (int)(random() / (RAND_MAX / 100));
TSP_ELT(matrix, n, i, j) = val;
TSP_ELT(matrix, n, j, i) = val;
}
}
}
/**** List ADT ****************/
typedef struct {
int *values; /* Values stored in list */
int max_size; /* Maximum size allocated */
int cur_size; /* Size currently in use */
} list_t;
/* Dump list, including sizes */
__device__ void
list_dump(list_t *list)
{
printf("%2d/%2d", list->cur_size, list->max_size);
for (int i = 0; i < list->cur_size; i++) {
printf(" %d", list->values[i]);
}
printf("\n");
}
/* Allocate list that can store up to 'max_size' elements */
__device__ list_t *
list_alloc(int max_size)
{
list_t *list = (list_t *)malloc(sizeof(list_t));
list->values = (int *)malloc(max_size * sizeof(int));
list->max_size = max_size;
list->cur_size = 0;
return list;
}
/* Free a list; call this to avoid leaking memory! */
__device__ void
list_free(list_t *list)
{
free(list->values);
free(list);
}
/* Add a value to the end of the list */
__device__ void
list_add(list_t *list, int value)
{
if (list->cur_size >= list->max_size) {
printf("List full");
list_dump(list);
}
list->values[list->cur_size++] = value;
}
/* Return the current size of the list */
__device__ int
list_size(list_t *list)
{
return list->cur_size;
}
/* Validate index */
__device__ void
_list_check_index(list_t *list, unsigned long index)
{
if (index > list->cur_size - 1) {
printf("Invalid index %d\n", index);
list_dump(list);
}
}
/* Get the value at given index */
__device__ int
list_get(list_t *list, unsigned long index)
{
_list_check_index(list, index);
return list->values[index];
}
/* Remove the value at the given index */
__device__ void
list_remove_at(list_t *list, int index)
{
_list_check_index(list, index);
for (int i = index; i < list->cur_size - 1; i++) {
list->values[i] = list->values[i + 1];
}
list->cur_size--;
}
/* Retrieve a copy of the values as a simple array of integers. The returned
array is allocated dynamically; the caller must free the space when no
longer needed.
*/
__device__ int *
list_as_array(list_t *list)
{
int *rtn = (int *)malloc(list->max_size * sizeof(int));
for (int i = 0; i < list->max_size; i++) {
rtn[i] = list_get(list, i);
}
return rtn;
}
/**** Permutation ****************/
/* Permutation algorithms based on code found at:
http://www.mathblog.dk/project-euler-24-millionth-lexicographic-permutation/
which references:
http://www.cut-the-knot.org/do_you_know/AllPerm.shtml
*/
/* Return the kth lexographically ordered permuation of an array of k integers
in the range [0 .. size - 1]. The integers are allocated dynamically and
should be free'd by the caller when no longer needed.
*/
__device__ int *
kth_perm(int k, int size)
{
long remain = k - 1;
list_t *numbers = list_alloc(size);
for (int i = 0; i < size; i++) {
list_add(numbers, i);
}
list_t *perm = list_alloc(size);
for (int i = 1; i < size; i++) {
unsigned long f = factorial(size - i);
unsigned long j = remain / f;
remain = remain % f;
list_add(perm, list_get(numbers, j));
list_remove_at(numbers, j);
if (remain == 0) {
break;
}
}
/* Append remaining digits */
for (int i = 0; i < list_size(numbers); i++) {
list_add(perm, list_get(numbers, i));
}
int *rtn = list_as_array(perm);
list_free(perm);
return rtn;
}
/* Swap v[i] and v[j] */
__device__ void
swap(int *v, int i, int j)
{
int t = v[i];
v[i] = v[j];
v[j] = t;
}
/* Print a permutation array */
__device__ void
print_perm(int *perm, int size)
{
for (int k = 0; k < size; k++) {
printf("%4d", perm[k]);
}
printf("\n");
}
/* Given an array of size elements at perm, update the array in place to
contain the lexographically next permutation. It is originally due to
Dijkstra. The present version is discussed at:
http://www.cut-the-knot.org/do_you_know/AllPerm.shtml
*/
__device__ void
next_perm(int *perm, int size)
{
int i = size - 1;
while (perm[i - 1] >= perm[i]) {
i = i - 1;
}
int j = size;
while (perm[j - 1] <= perm[i - 1]) {
j = j - 1;
}
swap(perm, i - 1, j - 1);
i++;
j = size;
while (i < j) {
swap(perm, i - 1, j - 1);
i++;
j--;
}
}
__global__ void
perm_kernel(int *glob_cost_matrix, int *min_matrix, int num_cities, int num_threads)
{
int block_id =
blockIdx.x +
blockIdx.y * blockDim.x +
blockIdx.z * blockDim.x * blockDim.y;
int block_offset =
block_id *
blockDim.x * blockDim.y * blockDim.z;
int thread_offset =
threadIdx.x +
threadIdx.y * blockDim.x +
threadIdx.z * blockDim.x * blockDim.y;
int tid = block_offset + thread_offset;
__shared__ int cost_matrix[144];
int init_iters = (num_cities * num_cities) / num_threads;
if(tid == 0)
init_iters += (num_cities * num_cities) % num_threads;
for(int i = 0; i < num_cities * num_cities; i++)
cost_matrix[i] = glob_cost_matrix[i];
__syncthreads();
unsigned long num_iters = factorial(num_cities) / num_threads;
int *perm = kth_perm((num_iters * tid) + 1, num_cities);
print_perm(perm, num_cities);
int min_cost = INT_MAX;
int cost;
for(unsigned long i = 0; i < num_iters; i++)
{
cost = calc_cost(perm, cost_matrix, num_cities);
if(cost < min_cost)
{
min_cost = cost;
}
next_perm(perm, num_cities);
}
min_matrix[tid] = min_cost;
}
double
now(void)
{
struct timespec current_time;
double ONE_BILLION = (double)1000000000.0;
clock_gettime(CLOCK_REALTIME, ¤t_time);
return current_time.tv_sec + (current_time.tv_nsec / ONE_BILLION);
}
int
main(int argc, char **argv)
{
int num_cities = 3;
int random_seed = 42;
int num_threads = 5;
int ch;
while ((ch = getopt(argc, argv, "t:c:hs:")) != -1) {
switch (ch) {
case 'c':
num_cities = atoi(optarg);
break;
case 's':
random_seed = atoi(optarg);
break;
case 't':
num_threads = atoi(optarg);
break;
case 'h':
default:
usage(argv[0]);
}
}
double start = now();
int cost_matrix_size = sizeof(int) * num_cities * num_cities;
int min_matrix_size = sizeof(int) * num_threads;
//Initialize matrices
int *min_matrix_h = (int *) malloc(min_matrix_size);
int *cost_matrix_h = (int *) malloc(cost_matrix_size);
int *min_matrix_d, *cost_matrix_d;
cudaMalloc(&min_matrix_d, min_matrix_size);
cudaMalloc(&cost_matrix_d, cost_matrix_size);
//create and copy cost matrix to device
create_tsp(cost_matrix_h, num_cities, random_seed);
// print_tsp(cost_matrix_h, num_cities, random_seed);
cudaMemcpy(cost_matrix_d, cost_matrix_h, cost_matrix_size, cudaMemcpyHostToDevice);
//launch kernel
int threads_per_block = num_threads;
for(int i = 1; i < 1025; i *= 2)
{
if(i > num_threads)
break;
if(i < num_threads && (num_threads % i == 0))
{
threads_per_block = i;
}
}
int blocks_per_grid = num_threads / threads_per_block;
perm_kernel<<<blocks_per_grid, threads_per_block>>>(cost_matrix_d, min_matrix_d, num_cities, num_threads);
//copy local mins back to host
cudaError_t rtn = cudaMemcpy(min_matrix_h, min_matrix_d, min_matrix_size, cudaMemcpyDeviceToHost);
if(rtn != 0){
printf("Ouchie:\n%s\n", cudaGetErrorString(rtn));
}
//calculate minimum
int shortest_length = INT_MAX;
for(int i = 0; i < num_threads; i++){
if(min_matrix_h[i] < shortest_length)
{
shortest_length = min_matrix_h[i];
}
}
double stop = now();
printf("Shortest %d\n", shortest_length);
printf("Blocks per grid:%d\n", blocks_per_grid);
printf("Threads per block:%d\n", threads_per_block);
printf("Num cities:%d\n", num_cities);
printf("Num threads:%d\n", num_threads);
printf("Took %5.3f seconds\n\n", stop - start);
} | .file "tmpxft_000e1d88_00000000-6_tsp-parallel.cudafe1.cpp"
.text
#APP
#NO_APP
.type _ZL26__cudaUnregisterBinaryUtilv, @function
_ZL26__cudaUnregisterBinaryUtilv:
.LFB2093:
.cfi_startproc
endbr64
subq $8, %rsp
.cfi_def_cfa_offset 16
movq _ZL20__cudaFatCubinHandle(%rip), %rdi
call __cudaUnregisterFatBinary@PLT
addq $8, %rsp
.cfi_def_cfa_offset 8
ret
.cfi_endproc
.LFE2093:
.size _ZL26__cudaUnregisterBinaryUtilv, .-_ZL26__cudaUnregisterBinaryUtilv
.globl _Z10create_tspii
.type _Z10create_tspii, @function
_Z10create_tspii:
.LFB2070:
.cfi_startproc
endbr64
pushq %r15
.cfi_def_cfa_offset 16
.cfi_offset 15, -16
pushq %r14
.cfi_def_cfa_offset 24
.cfi_offset 14, -24
pushq %r13
.cfi_def_cfa_offset 32
.cfi_offset 13, -32
pushq %r12
.cfi_def_cfa_offset 40
.cfi_offset 12, -40
pushq %rbp
.cfi_def_cfa_offset 48
.cfi_offset 6, -48
pushq %rbx
.cfi_def_cfa_offset 56
.cfi_offset 3, -56
subq $40, %rsp
.cfi_def_cfa_offset 96
movl %edi, %r14d
movl %edi, 20(%rsp)
movl %esi, %ebx
imull %edi, %edi
movslq %edi, %rdi
salq $2, %rdi
call malloc@PLT
movq %rax, 8(%rsp)
movl %ebx, %edi
call srandom@PLT
testl %r14d, %r14d
jle .L3
movslq %r14d, %rax
movq %rax, 24(%rsp)
leaq 0(,%rax,4), %r15
movl $0, 16(%rsp)
movq $0, (%rsp)
movabsq $-4035224944001410015, %r14
.L5:
movq (%rsp), %rax
movl %eax, %r12d
testl %eax, %eax
js .L12
movq 8(%rsp), %rsi
movq (%rsp), %rax
leaq (%rsi,%rax,4), %rbp
movslq 16(%rsp), %rax
leaq (%rsi,%rax,4), %r13
movl $0, %ebx
.L6:
call random@PLT
movq %rax, %rcx
imulq %r14
addq %rcx, %rdx
sarq $24, %rdx
sarq $63, %rcx
subq %rcx, %rdx
movl %edx, 0(%r13,%rbx,4)
movl %edx, 0(%rbp)
addq $1, %rbx
addq %r15, %rbp
cmpl %ebx, %r12d
jge .L6
addq $1, (%rsp)
movq (%rsp), %rax
movl 20(%rsp), %esi
addl %esi, 16(%rsp)
movq 24(%rsp), %rdi
cmpq %rdi, %rax
jne .L5
.L3:
movq 8(%rsp), %rax
addq $40, %rsp
.cfi_remember_state
.cfi_def_cfa_offset 56
popq %rbx
.cfi_def_cfa_offset 48
popq %rbp
.cfi_def_cfa_offset 40
popq %r12
.cfi_def_cfa_offset 32
popq %r13
.cfi_def_cfa_offset 24
popq %r14
.cfi_def_cfa_offset 16
popq %r15
.cfi_def_cfa_offset 8
ret
.L12:
.cfi_restore_state
addq $1, (%rsp)
movl 20(%rsp), %edi
addl %edi, 16(%rsp)
jmp .L5
.cfi_endproc
.LFE2070:
.size _Z10create_tspii, .-_Z10create_tspii
.section .rodata.str1.8,"aMS",@progbits,1
.align 8
.LC0:
.string "TSP (%d cities - seed %d)\n "
.section .rodata.str1.1,"aMS",@progbits,1
.LC1:
.string "%3d|"
.LC2:
.string "\n"
.LC3:
.string "%2d|"
.LC4:
.string "%4d"
.text
.globl _Z9print_tspPiii
.type _Z9print_tspPiii, @function
_Z9print_tspPiii:
.LFB2071:
.cfi_startproc
endbr64
pushq %r15
.cfi_def_cfa_offset 16
.cfi_offset 15, -16
pushq %r14
.cfi_def_cfa_offset 24
.cfi_offset 14, -24
pushq %r13
.cfi_def_cfa_offset 32
.cfi_offset 13, -32
pushq %r12
.cfi_def_cfa_offset 40
.cfi_offset 12, -40
pushq %rbp
.cfi_def_cfa_offset 48
.cfi_offset 6, -48
pushq %rbx
.cfi_def_cfa_offset 56
.cfi_offset 3, -56
subq $40, %rsp
.cfi_def_cfa_offset 96
movq %rdi, 16(%rsp)
movl %esi, %ebx
movl %edx, %ecx
movl %esi, %edx
leaq .LC0(%rip), %rsi
movl $2, %edi
movl $0, %eax
call __printf_chk@PLT
testl %ebx, %ebx
jle .L14
movl $0, %r13d
leaq .LC1(%rip), %rbp
.L15:
movl %r13d, %edx
movq %rbp, %rsi
movl $2, %edi
movl $0, %eax
call __printf_chk@PLT
movl %r13d, 12(%rsp)
addl $1, %r13d
cmpl %r13d, %ebx
jne .L15
leaq .LC2(%rip), %rsi
movl $2, %edi
movl $0, %eax
call __printf_chk@PLT
movslq %r13d, %r13
leaq 0(,%r13,4), %rax
movq %rax, 24(%rsp)
movq 16(%rsp), %rcx
leaq (%rcx,%rax), %rbp
movl $0, %r15d
movl $0, %r14d
leaq .LC4(%rip), %r12
jmp .L17
.L19:
movl %eax, %r14d
.L17:
movl %r14d, %edx
leaq .LC3(%rip), %rsi
movl $2, %edi
movl $0, %eax
call __printf_chk@PLT
movq 16(%rsp), %rax
leaq (%rax,%r15,4), %rbx
.L16:
movl (%rbx), %edx
movq %r12, %rsi
movl $2, %edi
movl $0, %eax
call __printf_chk@PLT
addq $4, %rbx
cmpq %rbp, %rbx
jne .L16
leaq .LC2(%rip), %rsi
movl $2, %edi
movl $0, %eax
call __printf_chk@PLT
leal 1(%r14), %eax
addq %r13, %r15
movq 24(%rsp), %rcx
addq %rcx, %rbp
cmpl %r14d, 12(%rsp)
jne .L19
.L18:
leaq .LC2(%rip), %rsi
movl $2, %edi
movl $0, %eax
call __printf_chk@PLT
addq $40, %rsp
.cfi_remember_state
.cfi_def_cfa_offset 56
popq %rbx
.cfi_def_cfa_offset 48
popq %rbp
.cfi_def_cfa_offset 40
popq %r12
.cfi_def_cfa_offset 32
popq %r13
.cfi_def_cfa_offset 24
popq %r14
.cfi_def_cfa_offset 16
popq %r15
.cfi_def_cfa_offset 8
ret
.L14:
.cfi_restore_state
leaq .LC2(%rip), %rsi
movl $2, %edi
movl $0, %eax
call __printf_chk@PLT
jmp .L18
.cfi_endproc
.LFE2071:
.size _Z9print_tspPiii, .-_Z9print_tspPiii
.section .rodata.str1.1
.LC5:
.string "usage: %s [flags]\n"
.LC6:
.string " -h\n"
.LC7:
.string " -t <number of threads>\n"
.LC8:
.string " -c <number of cities>\n"
.LC9:
.string " -s <random seed>\n"
.text
.globl _Z5usagePc
.type _Z5usagePc, @function
_Z5usagePc:
.LFB2072:
.cfi_startproc
endbr64
pushq %rax
.cfi_def_cfa_offset 16
popq %rax
.cfi_def_cfa_offset 8
subq $8, %rsp
.cfi_def_cfa_offset 16
movq %rdi, %rcx
leaq .LC5(%rip), %rdx
movl $2, %esi
movq stderr(%rip), %rdi
movl $0, %eax
call __fprintf_chk@PLT
leaq .LC6(%rip), %rdx
movl $2, %esi
movq stderr(%rip), %rdi
movl $0, %eax
call __fprintf_chk@PLT
leaq .LC7(%rip), %rdx
movl $2, %esi
movq stderr(%rip), %rdi
movl $0, %eax
call __fprintf_chk@PLT
leaq .LC8(%rip), %rdx
movl $2, %esi
movq stderr(%rip), %rdi
movl $0, %eax
call __fprintf_chk@PLT
leaq .LC9(%rip), %rdx
movl $2, %esi
movq stderr(%rip), %rdi
movl $0, %eax
call __fprintf_chk@PLT
movl $1, %edi
call exit@PLT
.cfi_endproc
.LFE2072:
.size _Z5usagePc, .-_Z5usagePc
.globl _Z9factoriali
.type _Z9factoriali, @function
_Z9factoriali:
.LFB2073:
.cfi_startproc
endbr64
pushq %rax
.cfi_def_cfa_offset 16
popq %rax
.cfi_def_cfa_offset 8
subq $24, %rsp
.cfi_def_cfa_offset 32
movl $1, 12(%rsp)
movl 12(%rsp), %edi
call exit@PLT
.cfi_endproc
.LFE2073:
.size _Z9factoriali, .-_Z9factoriali
.globl _Z9calc_costPiS_i
.type _Z9calc_costPiS_i, @function
_Z9calc_costPiS_i:
.LFB2074:
.cfi_startproc
endbr64
pushq %rax
.cfi_def_cfa_offset 16
popq %rax
.cfi_def_cfa_offset 8
subq $24, %rsp
.cfi_def_cfa_offset 32
movl $1, 12(%rsp)
movl 12(%rsp), %edi
call exit@PLT
.cfi_endproc
.LFE2074:
.size _Z9calc_costPiS_i, .-_Z9calc_costPiS_i
.globl _Z10create_tspPiii
.type _Z10create_tspPiii, @function
_Z10create_tspPiii:
.LFB2075:
.cfi_startproc
endbr64
pushq %r15
.cfi_def_cfa_offset 16
.cfi_offset 15, -16
pushq %r14
.cfi_def_cfa_offset 24
.cfi_offset 14, -24
pushq %r13
.cfi_def_cfa_offset 32
.cfi_offset 13, -32
pushq %r12
.cfi_def_cfa_offset 40
.cfi_offset 12, -40
pushq %rbp
.cfi_def_cfa_offset 48
.cfi_offset 6, -48
pushq %rbx
.cfi_def_cfa_offset 56
.cfi_offset 3, -56
subq $40, %rsp
.cfi_def_cfa_offset 96
movq %rdi, 16(%rsp)
movl %esi, %ebx
movl %esi, 12(%rsp)
movl %edx, %edi
call srandom@PLT
testl %ebx, %ebx
jle .L30
movslq %ebx, %rax
movq %rax, 24(%rsp)
leaq 0(,%rax,4), %r15
movl $0, 8(%rsp)
movq $0, (%rsp)
movabsq $-4035224944001410015, %r14
.L32:
movq (%rsp), %rax
movl %eax, %r12d
testl %eax, %eax
js .L39
movq 16(%rsp), %rsi
movq (%rsp), %rax
leaq (%rsi,%rax,4), %rbp
movslq 8(%rsp), %rax
leaq (%rsi,%rax,4), %r13
movl $0, %ebx
.L33:
call random@PLT
movq %rax, %rcx
imulq %r14
addq %rcx, %rdx
sarq $24, %rdx
sarq $63, %rcx
subq %rcx, %rdx
movl %edx, 0(%r13,%rbx,4)
movl %edx, 0(%rbp)
addq $1, %rbx
addq %r15, %rbp
cmpl %ebx, %r12d
jge .L33
addq $1, (%rsp)
movq (%rsp), %rax
movl 12(%rsp), %esi
addl %esi, 8(%rsp)
movq 24(%rsp), %rdi
cmpq %rdi, %rax
jne .L32
.L30:
addq $40, %rsp
.cfi_remember_state
.cfi_def_cfa_offset 56
popq %rbx
.cfi_def_cfa_offset 48
popq %rbp
.cfi_def_cfa_offset 40
popq %r12
.cfi_def_cfa_offset 32
popq %r13
.cfi_def_cfa_offset 24
popq %r14
.cfi_def_cfa_offset 16
popq %r15
.cfi_def_cfa_offset 8
ret
.L39:
.cfi_restore_state
addq $1, (%rsp)
movl 12(%rsp), %edi
addl %edi, 8(%rsp)
jmp .L32
.cfi_endproc
.LFE2075:
.size _Z10create_tspPiii, .-_Z10create_tspPiii
.globl _Z9list_dumpP6list_t
.type _Z9list_dumpP6list_t, @function
_Z9list_dumpP6list_t:
.LFB2076:
.cfi_startproc
endbr64
pushq %rax
.cfi_def_cfa_offset 16
popq %rax
.cfi_def_cfa_offset 8
subq $24, %rsp
.cfi_def_cfa_offset 32
movl $1, 12(%rsp)
movl 12(%rsp), %edi
call exit@PLT
.cfi_endproc
.LFE2076:
.size _Z9list_dumpP6list_t, .-_Z9list_dumpP6list_t
.globl _Z10list_alloci
.type _Z10list_alloci, @function
_Z10list_alloci:
.LFB2077:
.cfi_startproc
endbr64
pushq %rax
.cfi_def_cfa_offset 16
popq %rax
.cfi_def_cfa_offset 8
subq $24, %rsp
.cfi_def_cfa_offset 32
movl $1, 12(%rsp)
movl 12(%rsp), %edi
call exit@PLT
.cfi_endproc
.LFE2077:
.size _Z10list_alloci, .-_Z10list_alloci
.globl _Z9list_freeP6list_t
.type _Z9list_freeP6list_t, @function
_Z9list_freeP6list_t:
.LFB2078:
.cfi_startproc
endbr64
pushq %rax
.cfi_def_cfa_offset 16
popq %rax
.cfi_def_cfa_offset 8
subq $24, %rsp
.cfi_def_cfa_offset 32
movl $1, 12(%rsp)
movl 12(%rsp), %edi
call exit@PLT
.cfi_endproc
.LFE2078:
.size _Z9list_freeP6list_t, .-_Z9list_freeP6list_t
.globl _Z8list_addP6list_ti
.type _Z8list_addP6list_ti, @function
_Z8list_addP6list_ti:
.LFB2079:
.cfi_startproc
endbr64
pushq %rax
.cfi_def_cfa_offset 16
popq %rax
.cfi_def_cfa_offset 8
subq $24, %rsp
.cfi_def_cfa_offset 32
movl $1, 12(%rsp)
movl 12(%rsp), %edi
call exit@PLT
.cfi_endproc
.LFE2079:
.size _Z8list_addP6list_ti, .-_Z8list_addP6list_ti
.globl _Z9list_sizeP6list_t
.type _Z9list_sizeP6list_t, @function
_Z9list_sizeP6list_t:
.LFB2080:
.cfi_startproc
endbr64
pushq %rax
.cfi_def_cfa_offset 16
popq %rax
.cfi_def_cfa_offset 8
subq $24, %rsp
.cfi_def_cfa_offset 32
movl $1, 12(%rsp)
movl 12(%rsp), %edi
call exit@PLT
.cfi_endproc
.LFE2080:
.size _Z9list_sizeP6list_t, .-_Z9list_sizeP6list_t
.globl _Z17_list_check_indexP6list_tm
.type _Z17_list_check_indexP6list_tm, @function
_Z17_list_check_indexP6list_tm:
.LFB2081:
.cfi_startproc
endbr64
pushq %rax
.cfi_def_cfa_offset 16
popq %rax
.cfi_def_cfa_offset 8
subq $24, %rsp
.cfi_def_cfa_offset 32
movl $1, 12(%rsp)
movl 12(%rsp), %edi
call exit@PLT
.cfi_endproc
.LFE2081:
.size _Z17_list_check_indexP6list_tm, .-_Z17_list_check_indexP6list_tm
.globl _Z8list_getP6list_tm
.type _Z8list_getP6list_tm, @function
_Z8list_getP6list_tm:
.LFB2082:
.cfi_startproc
endbr64
pushq %rax
.cfi_def_cfa_offset 16
popq %rax
.cfi_def_cfa_offset 8
subq $24, %rsp
.cfi_def_cfa_offset 32
movl $1, 12(%rsp)
movl 12(%rsp), %edi
call exit@PLT
.cfi_endproc
.LFE2082:
.size _Z8list_getP6list_tm, .-_Z8list_getP6list_tm
.globl _Z14list_remove_atP6list_ti
.type _Z14list_remove_atP6list_ti, @function
_Z14list_remove_atP6list_ti:
.LFB2083:
.cfi_startproc
endbr64
pushq %rax
.cfi_def_cfa_offset 16
popq %rax
.cfi_def_cfa_offset 8
subq $24, %rsp
.cfi_def_cfa_offset 32
movl $1, 12(%rsp)
movl 12(%rsp), %edi
call exit@PLT
.cfi_endproc
.LFE2083:
.size _Z14list_remove_atP6list_ti, .-_Z14list_remove_atP6list_ti
.globl _Z13list_as_arrayP6list_t
.type _Z13list_as_arrayP6list_t, @function
_Z13list_as_arrayP6list_t:
.LFB2084:
.cfi_startproc
endbr64
pushq %rax
.cfi_def_cfa_offset 16
popq %rax
.cfi_def_cfa_offset 8
subq $24, %rsp
.cfi_def_cfa_offset 32
movl $1, 12(%rsp)
movl 12(%rsp), %edi
call exit@PLT
.cfi_endproc
.LFE2084:
.size _Z13list_as_arrayP6list_t, .-_Z13list_as_arrayP6list_t
.globl _Z8kth_permii
.type _Z8kth_permii, @function
_Z8kth_permii:
.LFB2085:
.cfi_startproc
endbr64
pushq %rax
.cfi_def_cfa_offset 16
popq %rax
.cfi_def_cfa_offset 8
subq $24, %rsp
.cfi_def_cfa_offset 32
movl $1, 12(%rsp)
movl 12(%rsp), %edi
call exit@PLT
.cfi_endproc
.LFE2085:
.size _Z8kth_permii, .-_Z8kth_permii
.globl _Z4swapPiii
.type _Z4swapPiii, @function
_Z4swapPiii:
.LFB2086:
.cfi_startproc
endbr64
pushq %rax
.cfi_def_cfa_offset 16
popq %rax
.cfi_def_cfa_offset 8
subq $24, %rsp
.cfi_def_cfa_offset 32
movl $1, 12(%rsp)
movl 12(%rsp), %edi
call exit@PLT
.cfi_endproc
.LFE2086:
.size _Z4swapPiii, .-_Z4swapPiii
.globl _Z10print_permPii
.type _Z10print_permPii, @function
_Z10print_permPii:
.LFB2087:
.cfi_startproc
endbr64
pushq %rax
.cfi_def_cfa_offset 16
popq %rax
.cfi_def_cfa_offset 8
subq $24, %rsp
.cfi_def_cfa_offset 32
movl $1, 12(%rsp)
movl 12(%rsp), %edi
call exit@PLT
.cfi_endproc
.LFE2087:
.size _Z10print_permPii, .-_Z10print_permPii
.globl _Z9next_permPii
.type _Z9next_permPii, @function
_Z9next_permPii:
.LFB2088:
.cfi_startproc
endbr64
pushq %rax
.cfi_def_cfa_offset 16
popq %rax
.cfi_def_cfa_offset 8
subq $24, %rsp
.cfi_def_cfa_offset 32
movl $1, 12(%rsp)
movl 12(%rsp), %edi
call exit@PLT
.cfi_endproc
.LFE2088:
.size _Z9next_permPii, .-_Z9next_permPii
.globl _Z3nowv
.type _Z3nowv, @function
_Z3nowv:
.LFB2089:
.cfi_startproc
endbr64
subq $40, %rsp
.cfi_def_cfa_offset 48
movq %fs:40, %rax
movq %rax, 24(%rsp)
xorl %eax, %eax
movq %rsp, %rsi
movl $0, %edi
call clock_gettime@PLT
pxor %xmm0, %xmm0
cvtsi2sdq 8(%rsp), %xmm0
divsd .LC10(%rip), %xmm0
pxor %xmm1, %xmm1
cvtsi2sdq (%rsp), %xmm1
addsd %xmm1, %xmm0
movq 24(%rsp), %rax
subq %fs:40, %rax
jne .L69
addq $40, %rsp
.cfi_remember_state
.cfi_def_cfa_offset 8
ret
.L69:
.cfi_restore_state
call __stack_chk_fail@PLT
.cfi_endproc
.LFE2089:
.size _Z3nowv, .-_Z3nowv
.globl _Z35__device_stub__Z11perm_kernelPiS_iiPiS_ii
.type _Z35__device_stub__Z11perm_kernelPiS_iiPiS_ii, @function
_Z35__device_stub__Z11perm_kernelPiS_iiPiS_ii:
.LFB2115:
.cfi_startproc
endbr64
subq $152, %rsp
.cfi_def_cfa_offset 160
movq %rdi, 24(%rsp)
movq %rsi, 16(%rsp)
movl %edx, 12(%rsp)
movl %ecx, 8(%rsp)
movq %fs:40, %rax
movq %rax, 136(%rsp)
xorl %eax, %eax
leaq 24(%rsp), %rax
movq %rax, 96(%rsp)
leaq 16(%rsp), %rax
movq %rax, 104(%rsp)
leaq 12(%rsp), %rax
movq %rax, 112(%rsp)
leaq 8(%rsp), %rax
movq %rax, 120(%rsp)
movl $1, 48(%rsp)
movl $1, 52(%rsp)
movl $1, 56(%rsp)
movl $1, 60(%rsp)
movl $1, 64(%rsp)
movl $1, 68(%rsp)
leaq 40(%rsp), %rcx
leaq 32(%rsp), %rdx
leaq 60(%rsp), %rsi
leaq 48(%rsp), %rdi
call __cudaPopCallConfiguration@PLT
testl %eax, %eax
je .L74
.L70:
movq 136(%rsp), %rax
subq %fs:40, %rax
jne .L75
addq $152, %rsp
.cfi_remember_state
.cfi_def_cfa_offset 8
ret
.L74:
.cfi_restore_state
pushq 40(%rsp)
.cfi_def_cfa_offset 168
pushq 40(%rsp)
.cfi_def_cfa_offset 176
leaq 112(%rsp), %r9
movq 76(%rsp), %rcx
movl 84(%rsp), %r8d
movq 64(%rsp), %rsi
movl 72(%rsp), %edx
leaq _Z11perm_kernelPiS_ii(%rip), %rdi
call cudaLaunchKernel@PLT
addq $16, %rsp
.cfi_def_cfa_offset 160
jmp .L70
.L75:
call __stack_chk_fail@PLT
.cfi_endproc
.LFE2115:
.size _Z35__device_stub__Z11perm_kernelPiS_iiPiS_ii, .-_Z35__device_stub__Z11perm_kernelPiS_iiPiS_ii
.globl _Z11perm_kernelPiS_ii
.type _Z11perm_kernelPiS_ii, @function
_Z11perm_kernelPiS_ii:
.LFB2116:
.cfi_startproc
endbr64
subq $8, %rsp
.cfi_def_cfa_offset 16
call _Z35__device_stub__Z11perm_kernelPiS_iiPiS_ii
addq $8, %rsp
.cfi_def_cfa_offset 8
ret
.cfi_endproc
.LFE2116:
.size _Z11perm_kernelPiS_ii, .-_Z11perm_kernelPiS_ii
.section .rodata.str1.1
.LC11:
.string "t:c:hs:"
.LC12:
.string "Ouchie:\n%s\n"
.LC13:
.string "Shortest %d\n"
.LC14:
.string "Blocks per grid:%d\n"
.LC15:
.string "Threads per block:%d\n"
.LC16:
.string "Num cities:%d\n"
.LC17:
.string "Num threads:%d\n"
.LC18:
.string "Took %5.3f seconds\n\n"
.text
.globl main
.type main, @function
main:
.LFB2090:
.cfi_startproc
endbr64
pushq %r15
.cfi_def_cfa_offset 16
.cfi_offset 15, -16
pushq %r14
.cfi_def_cfa_offset 24
.cfi_offset 14, -24
pushq %r13
.cfi_def_cfa_offset 32
.cfi_offset 13, -32
pushq %r12
.cfi_def_cfa_offset 40
.cfi_offset 12, -40
pushq %rbp
.cfi_def_cfa_offset 48
.cfi_offset 6, -48
pushq %rbx
.cfi_def_cfa_offset 56
.cfi_offset 3, -56
subq $88, %rsp
.cfi_def_cfa_offset 144
movl %edi, %r13d
movq %rsi, %r12
movq %fs:40, %rax
movq %rax, 72(%rsp)
xorl %eax, %eax
movl $5, %ebx
movl $42, %r15d
movl $3, %ebp
leaq .LC11(%rip), %r14
jmp .L79
.L80:
movl $10, %edx
movl $0, %esi
movq optarg(%rip), %rdi
call __isoc23_strtol@PLT
movl %eax, %r15d
.L79:
movq %r14, %rdx
movq %r12, %rsi
movl %r13d, %edi
call getopt@PLT
cmpl $-1, %eax
je .L100
cmpl $115, %eax
je .L80
cmpl $116, %eax
je .L81
cmpl $99, %eax
jne .L82
movl $10, %edx
movl $0, %esi
movq optarg(%rip), %rdi
call __isoc23_strtol@PLT
movl %eax, %ebp
jmp .L79
.L81:
movl $10, %edx
movl $0, %esi
movq optarg(%rip), %rdi
call __isoc23_strtol@PLT
movl %eax, %ebx
jmp .L79
.L82:
movq 72(%rsp), %rax
subq %fs:40, %rax
jne .L101
movq (%r12), %rdi
call _Z5usagePc
.L101:
call __stack_chk_fail@PLT
.L100:
call _Z3nowv
movsd %xmm0, 8(%rsp)
movslq %ebx, %rax
movq %rax, 24(%rsp)
leal 0(,%rbx,4), %r13d
movslq %r13d, %r13
movq %r13, %rdi
call malloc@PLT
movq %rax, %r14
movl %ebp, %r12d
imull %ebp, %r12d
sall $2, %r12d
movslq %r12d, %r12
movq %r12, %rdi
call malloc@PLT
movq %rax, 16(%rsp)
leaq 32(%rsp), %rdi
movq %r13, %rsi
call cudaMalloc@PLT
leaq 40(%rsp), %rdi
movq %r12, %rsi
call cudaMalloc@PLT
movl %r15d, %edx
movl %ebp, %esi
movq 16(%rsp), %r15
movq %r15, %rdi
call _Z10create_tspPiii
movl $1, %ecx
movq %r12, %rdx
movq %r15, %rsi
movq 40(%rsp), %rdi
call cudaMemcpy@PLT
testl %ebx, %ebx
jle .L94
movl %ebx, %r12d
movl $1, %ecx
movl $1024, %esi
cmpl %esi, %ebx
cmovle %ebx, %esi
jmp .L88
.L87:
addl %ecx, %ecx
cmpl %ecx, %esi
jl .L86
.L88:
cmpl %ecx, %ebx
jle .L87
movl %ebx, %eax
cltd
idivl %ecx
testl %edx, %edx
cmove %ecx, %r12d
jmp .L87
.L94:
movl %ebx, %r12d
.L86:
movl %ebx, %eax
cltd
idivl %r12d
movl %eax, %r15d
movl %r12d, 60(%rsp)
movl $1, 64(%rsp)
movl %eax, 48(%rsp)
movl $1, 52(%rsp)
movl $0, %r9d
movl $0, %r8d
movq 60(%rsp), %rdx
movl $1, %ecx
movq 48(%rsp), %rdi
movl $1, %esi
call __cudaPushCallConfiguration@PLT
testl %eax, %eax
je .L102
.L89:
movl $2, %ecx
movq %r13, %rdx
movq 32(%rsp), %rsi
movq %r14, %rdi
call cudaMemcpy@PLT
testl %eax, %eax
jne .L103
.L90:
testl %ebx, %ebx
jle .L96
movq %r14, %rax
movq 24(%rsp), %rcx
leaq (%r14,%rcx,4), %rcx
movl $2147483647, %r13d
.L92:
movl (%rax), %edx
cmpl %edx, %r13d
cmovg %edx, %r13d
addq $4, %rax
cmpq %rcx, %rax
jne .L92
.L91:
call _Z3nowv
movsd %xmm0, 16(%rsp)
movl %r13d, %edx
leaq .LC13(%rip), %rsi
movl $2, %edi
movl $0, %eax
call __printf_chk@PLT
movl %r15d, %edx
leaq .LC14(%rip), %rsi
movl $2, %edi
movl $0, %eax
call __printf_chk@PLT
movl %r12d, %edx
leaq .LC15(%rip), %rsi
movl $2, %edi
movl $0, %eax
call __printf_chk@PLT
movl %ebp, %edx
leaq .LC16(%rip), %rsi
movl $2, %edi
movl $0, %eax
call __printf_chk@PLT
movl %ebx, %edx
leaq .LC17(%rip), %rsi
movl $2, %edi
movl $0, %eax
call __printf_chk@PLT
movsd 16(%rsp), %xmm0
subsd 8(%rsp), %xmm0
leaq .LC18(%rip), %rsi
movl $2, %edi
movl $1, %eax
call __printf_chk@PLT
movq 72(%rsp), %rax
subq %fs:40, %rax
jne .L104
movl $0, %eax
addq $88, %rsp
.cfi_remember_state
.cfi_def_cfa_offset 56
popq %rbx
.cfi_def_cfa_offset 48
popq %rbp
.cfi_def_cfa_offset 40
popq %r12
.cfi_def_cfa_offset 32
popq %r13
.cfi_def_cfa_offset 24
popq %r14
.cfi_def_cfa_offset 16
popq %r15
.cfi_def_cfa_offset 8
ret
.L102:
.cfi_restore_state
movl %ebx, %ecx
movl %ebp, %edx
movq 32(%rsp), %rsi
movq 40(%rsp), %rdi
call _Z35__device_stub__Z11perm_kernelPiS_iiPiS_ii
jmp .L89
.L103:
movl %eax, %edi
call cudaGetErrorString@PLT
movq %rax, %rdx
leaq .LC12(%rip), %rsi
movl $2, %edi
movl $0, %eax
call __printf_chk@PLT
jmp .L90
.L96:
movl $2147483647, %r13d
jmp .L91
.L104:
call __stack_chk_fail@PLT
.cfi_endproc
.LFE2090:
.size main, .-main
.section .rodata.str1.1
.LC19:
.string "_Z11perm_kernelPiS_ii"
.text
.type _ZL24__sti____cudaRegisterAllv, @function
_ZL24__sti____cudaRegisterAllv:
.LFB2118:
.cfi_startproc
endbr64
subq $8, %rsp
.cfi_def_cfa_offset 16
leaq _ZL15__fatDeviceText(%rip), %rdi
call __cudaRegisterFatBinary@PLT
movq %rax, %rdi
movq %rax, _ZL20__cudaFatCubinHandle(%rip)
pushq $0
.cfi_def_cfa_offset 24
pushq $0
.cfi_def_cfa_offset 32
pushq $0
.cfi_def_cfa_offset 40
pushq $0
.cfi_def_cfa_offset 48
movl $0, %r9d
movl $-1, %r8d
leaq .LC19(%rip), %rdx
movq %rdx, %rcx
leaq _Z11perm_kernelPiS_ii(%rip), %rsi
call __cudaRegisterFunction@PLT
addq $32, %rsp
.cfi_def_cfa_offset 16
movq _ZL20__cudaFatCubinHandle(%rip), %rdi
call __cudaRegisterFatBinaryEnd@PLT
leaq _ZL26__cudaUnregisterBinaryUtilv(%rip), %rdi
call atexit@PLT
addq $8, %rsp
.cfi_def_cfa_offset 8
ret
.cfi_endproc
.LFE2118:
.size _ZL24__sti____cudaRegisterAllv, .-_ZL24__sti____cudaRegisterAllv
.section .init_array,"aw"
.align 8
.quad _ZL24__sti____cudaRegisterAllv
.section .nvFatBinSegment,"aw"
.align 8
.type _ZL15__fatDeviceText, @object
.size _ZL15__fatDeviceText, 24
_ZL15__fatDeviceText:
.long 1180844977
.long 1
.quad fatbinData
.quad 0
.local _ZL20__cudaFatCubinHandle
.comm _ZL20__cudaFatCubinHandle,8,8
.section .rodata.cst8,"aM",@progbits,8
.align 8
.LC10:
.long 0
.long 1104006501
.ident "GCC: (Ubuntu 13.3.0-6ubuntu2~24.04) 13.3.0"
.section .note.GNU-stack,"",@progbits
.section .note.gnu.property,"a"
.align 8
.long 1f - 0f
.long 4f - 1f
.long 5
0:
.string "GNU"
1:
.align 8
.long 0xc0000002
.long 3f - 2f
2:
.long 0x3
3:
.align 8
4: |
You are a helpful coding assistant specialized in converting CUDA source code to HIP/AMD source code. | #include <stdio.h>
#include <stdlib.h>
#include <unistd.h>
#include <limits.h>
#include <time.h>
/* Original permuation code due to D. Jimenez, UT Austin
* http://faculty.cse.tamu.edu/djimenez/ut/utsa/cs3343/
*/
/* Reference an element in the TSP distance array. */
#define TSP_ELT(tsp, n, i, j) *(tsp + (i * n) + j)
/* Create an instance of a symmetric TSP. */
int *
create_tsp(int n, int random_seed)
{
int *tsp = (int *) malloc(n * n * sizeof(int));
srandom(random_seed);
for (int i = 0; i < n; i++) {
for (int j = 0; j <= i; j++) {
int val = (int)(random() / (RAND_MAX / 100));
TSP_ELT(tsp, n, i, j) = val;
TSP_ELT(tsp, n, j, i) = val;
}
}
return tsp;
}
/* Print a TSP distance matrix. */
void
print_tsp(int *tsp, int n, int random_seed)
{
printf("TSP (%d cities - seed %d)\n ", n, random_seed);
for (int j = 0; j < n; j++) {
printf("%3d|", j);
}
printf("\n");
for (int i = 0; i < n; i++) {
printf("%2d|", i);
for (int j = 0; j < n; j++) {
printf("%4d", TSP_ELT(tsp, n, i, j));
}
printf("\n");
}
printf("\n");
}
void
usage(char *prog_name)
{
fprintf(stderr, "usage: %s [flags]\n", prog_name);
fprintf(stderr, " -h\n");
fprintf(stderr, " -t <number of threads>\n");
fprintf(stderr, " -c <number of cities>\n");
fprintf(stderr, " -s <random seed>\n");
exit(1);
}
__device__ unsigned long
factorial(int n)
{
if (n < 1) {
return 0;
}
unsigned long rtn = 1;
for (unsigned i = 1; i <= n; i++) {
rtn *= i;
}
return rtn;
}
__device__ int
calc_cost(int *perm, int *matrix, int n)
{
int total = 0;
for (int i = 0; i < n; i++) {
int j = (i + 1) % n;
int from = perm[i];
int to = perm[j];
int val = TSP_ELT(matrix, n, from, to);
total += val;
}
return total;
}
void
create_tsp(int *matrix, int n, int random_seed)
{
srandom(random_seed);
for (int i = 0; i < n; i++) {
for (int j = 0; j <= i; j++) {
int val = (int)(random() / (RAND_MAX / 100));
TSP_ELT(matrix, n, i, j) = val;
TSP_ELT(matrix, n, j, i) = val;
}
}
}
/**** List ADT ****************/
typedef struct {
int *values; /* Values stored in list */
int max_size; /* Maximum size allocated */
int cur_size; /* Size currently in use */
} list_t;
/* Dump list, including sizes */
__device__ void
list_dump(list_t *list)
{
printf("%2d/%2d", list->cur_size, list->max_size);
for (int i = 0; i < list->cur_size; i++) {
printf(" %d", list->values[i]);
}
printf("\n");
}
/* Allocate list that can store up to 'max_size' elements */
__device__ list_t *
list_alloc(int max_size)
{
list_t *list = (list_t *)malloc(sizeof(list_t));
list->values = (int *)malloc(max_size * sizeof(int));
list->max_size = max_size;
list->cur_size = 0;
return list;
}
/* Free a list; call this to avoid leaking memory! */
__device__ void
list_free(list_t *list)
{
free(list->values);
free(list);
}
/* Add a value to the end of the list */
__device__ void
list_add(list_t *list, int value)
{
if (list->cur_size >= list->max_size) {
printf("List full");
list_dump(list);
}
list->values[list->cur_size++] = value;
}
/* Return the current size of the list */
__device__ int
list_size(list_t *list)
{
return list->cur_size;
}
/* Validate index */
__device__ void
_list_check_index(list_t *list, unsigned long index)
{
if (index > list->cur_size - 1) {
printf("Invalid index %d\n", index);
list_dump(list);
}
}
/* Get the value at given index */
__device__ int
list_get(list_t *list, unsigned long index)
{
_list_check_index(list, index);
return list->values[index];
}
/* Remove the value at the given index */
__device__ void
list_remove_at(list_t *list, int index)
{
_list_check_index(list, index);
for (int i = index; i < list->cur_size - 1; i++) {
list->values[i] = list->values[i + 1];
}
list->cur_size--;
}
/* Retrieve a copy of the values as a simple array of integers. The returned
array is allocated dynamically; the caller must free the space when no
longer needed.
*/
__device__ int *
list_as_array(list_t *list)
{
int *rtn = (int *)malloc(list->max_size * sizeof(int));
for (int i = 0; i < list->max_size; i++) {
rtn[i] = list_get(list, i);
}
return rtn;
}
/**** Permutation ****************/
/* Permutation algorithms based on code found at:
http://www.mathblog.dk/project-euler-24-millionth-lexicographic-permutation/
which references:
http://www.cut-the-knot.org/do_you_know/AllPerm.shtml
*/
/* Return the kth lexographically ordered permuation of an array of k integers
in the range [0 .. size - 1]. The integers are allocated dynamically and
should be free'd by the caller when no longer needed.
*/
__device__ int *
kth_perm(int k, int size)
{
long remain = k - 1;
list_t *numbers = list_alloc(size);
for (int i = 0; i < size; i++) {
list_add(numbers, i);
}
list_t *perm = list_alloc(size);
for (int i = 1; i < size; i++) {
unsigned long f = factorial(size - i);
unsigned long j = remain / f;
remain = remain % f;
list_add(perm, list_get(numbers, j));
list_remove_at(numbers, j);
if (remain == 0) {
break;
}
}
/* Append remaining digits */
for (int i = 0; i < list_size(numbers); i++) {
list_add(perm, list_get(numbers, i));
}
int *rtn = list_as_array(perm);
list_free(perm);
return rtn;
}
/* Swap v[i] and v[j] */
__device__ void
swap(int *v, int i, int j)
{
int t = v[i];
v[i] = v[j];
v[j] = t;
}
/* Print a permutation array */
__device__ void
print_perm(int *perm, int size)
{
for (int k = 0; k < size; k++) {
printf("%4d", perm[k]);
}
printf("\n");
}
/* Given an array of size elements at perm, update the array in place to
contain the lexographically next permutation. It is originally due to
Dijkstra. The present version is discussed at:
http://www.cut-the-knot.org/do_you_know/AllPerm.shtml
*/
__device__ void
next_perm(int *perm, int size)
{
int i = size - 1;
while (perm[i - 1] >= perm[i]) {
i = i - 1;
}
int j = size;
while (perm[j - 1] <= perm[i - 1]) {
j = j - 1;
}
swap(perm, i - 1, j - 1);
i++;
j = size;
while (i < j) {
swap(perm, i - 1, j - 1);
i++;
j--;
}
}
__global__ void
perm_kernel(int *glob_cost_matrix, int *min_matrix, int num_cities, int num_threads)
{
int block_id =
blockIdx.x +
blockIdx.y * blockDim.x +
blockIdx.z * blockDim.x * blockDim.y;
int block_offset =
block_id *
blockDim.x * blockDim.y * blockDim.z;
int thread_offset =
threadIdx.x +
threadIdx.y * blockDim.x +
threadIdx.z * blockDim.x * blockDim.y;
int tid = block_offset + thread_offset;
__shared__ int cost_matrix[144];
int init_iters = (num_cities * num_cities) / num_threads;
if(tid == 0)
init_iters += (num_cities * num_cities) % num_threads;
for(int i = 0; i < num_cities * num_cities; i++)
cost_matrix[i] = glob_cost_matrix[i];
__syncthreads();
unsigned long num_iters = factorial(num_cities) / num_threads;
int *perm = kth_perm((num_iters * tid) + 1, num_cities);
print_perm(perm, num_cities);
int min_cost = INT_MAX;
int cost;
for(unsigned long i = 0; i < num_iters; i++)
{
cost = calc_cost(perm, cost_matrix, num_cities);
if(cost < min_cost)
{
min_cost = cost;
}
next_perm(perm, num_cities);
}
min_matrix[tid] = min_cost;
}
double
now(void)
{
struct timespec current_time;
double ONE_BILLION = (double)1000000000.0;
clock_gettime(CLOCK_REALTIME, ¤t_time);
return current_time.tv_sec + (current_time.tv_nsec / ONE_BILLION);
}
int
main(int argc, char **argv)
{
int num_cities = 3;
int random_seed = 42;
int num_threads = 5;
int ch;
while ((ch = getopt(argc, argv, "t:c:hs:")) != -1) {
switch (ch) {
case 'c':
num_cities = atoi(optarg);
break;
case 's':
random_seed = atoi(optarg);
break;
case 't':
num_threads = atoi(optarg);
break;
case 'h':
default:
usage(argv[0]);
}
}
double start = now();
int cost_matrix_size = sizeof(int) * num_cities * num_cities;
int min_matrix_size = sizeof(int) * num_threads;
//Initialize matrices
int *min_matrix_h = (int *) malloc(min_matrix_size);
int *cost_matrix_h = (int *) malloc(cost_matrix_size);
int *min_matrix_d, *cost_matrix_d;
cudaMalloc(&min_matrix_d, min_matrix_size);
cudaMalloc(&cost_matrix_d, cost_matrix_size);
//create and copy cost matrix to device
create_tsp(cost_matrix_h, num_cities, random_seed);
// print_tsp(cost_matrix_h, num_cities, random_seed);
cudaMemcpy(cost_matrix_d, cost_matrix_h, cost_matrix_size, cudaMemcpyHostToDevice);
//launch kernel
int threads_per_block = num_threads;
for(int i = 1; i < 1025; i *= 2)
{
if(i > num_threads)
break;
if(i < num_threads && (num_threads % i == 0))
{
threads_per_block = i;
}
}
int blocks_per_grid = num_threads / threads_per_block;
perm_kernel<<<blocks_per_grid, threads_per_block>>>(cost_matrix_d, min_matrix_d, num_cities, num_threads);
//copy local mins back to host
cudaError_t rtn = cudaMemcpy(min_matrix_h, min_matrix_d, min_matrix_size, cudaMemcpyDeviceToHost);
if(rtn != 0){
printf("Ouchie:\n%s\n", cudaGetErrorString(rtn));
}
//calculate minimum
int shortest_length = INT_MAX;
for(int i = 0; i < num_threads; i++){
if(min_matrix_h[i] < shortest_length)
{
shortest_length = min_matrix_h[i];
}
}
double stop = now();
printf("Shortest %d\n", shortest_length);
printf("Blocks per grid:%d\n", blocks_per_grid);
printf("Threads per block:%d\n", threads_per_block);
printf("Num cities:%d\n", num_cities);
printf("Num threads:%d\n", num_threads);
printf("Took %5.3f seconds\n\n", stop - start);
} | #include <hip/hip_runtime.h>
#include <stdio.h>
#include <stdlib.h>
#include <unistd.h>
#include <limits.h>
#include <time.h>
/* Original permuation code due to D. Jimenez, UT Austin
* http://faculty.cse.tamu.edu/djimenez/ut/utsa/cs3343/
*/
/* Reference an element in the TSP distance array. */
#define TSP_ELT(tsp, n, i, j) *(tsp + (i * n) + j)
/* Create an instance of a symmetric TSP. */
int *
create_tsp(int n, int random_seed)
{
int *tsp = (int *) malloc(n * n * sizeof(int));
srandom(random_seed);
for (int i = 0; i < n; i++) {
for (int j = 0; j <= i; j++) {
int val = (int)(random() / (RAND_MAX / 100));
TSP_ELT(tsp, n, i, j) = val;
TSP_ELT(tsp, n, j, i) = val;
}
}
return tsp;
}
/* Print a TSP distance matrix. */
void
print_tsp(int *tsp, int n, int random_seed)
{
printf("TSP (%d cities - seed %d)\n ", n, random_seed);
for (int j = 0; j < n; j++) {
printf("%3d|", j);
}
printf("\n");
for (int i = 0; i < n; i++) {
printf("%2d|", i);
for (int j = 0; j < n; j++) {
printf("%4d", TSP_ELT(tsp, n, i, j));
}
printf("\n");
}
printf("\n");
}
void
usage(char *prog_name)
{
fprintf(stderr, "usage: %s [flags]\n", prog_name);
fprintf(stderr, " -h\n");
fprintf(stderr, " -t <number of threads>\n");
fprintf(stderr, " -c <number of cities>\n");
fprintf(stderr, " -s <random seed>\n");
exit(1);
}
__device__ unsigned long
factorial(int n)
{
if (n < 1) {
return 0;
}
unsigned long rtn = 1;
for (unsigned i = 1; i <= n; i++) {
rtn *= i;
}
return rtn;
}
__device__ int
calc_cost(int *perm, int *matrix, int n)
{
int total = 0;
for (int i = 0; i < n; i++) {
int j = (i + 1) % n;
int from = perm[i];
int to = perm[j];
int val = TSP_ELT(matrix, n, from, to);
total += val;
}
return total;
}
void
create_tsp(int *matrix, int n, int random_seed)
{
srandom(random_seed);
for (int i = 0; i < n; i++) {
for (int j = 0; j <= i; j++) {
int val = (int)(random() / (RAND_MAX / 100));
TSP_ELT(matrix, n, i, j) = val;
TSP_ELT(matrix, n, j, i) = val;
}
}
}
/**** List ADT ****************/
typedef struct {
int *values; /* Values stored in list */
int max_size; /* Maximum size allocated */
int cur_size; /* Size currently in use */
} list_t;
/* Dump list, including sizes */
__device__ void
list_dump(list_t *list)
{
printf("%2d/%2d", list->cur_size, list->max_size);
for (int i = 0; i < list->cur_size; i++) {
printf(" %d", list->values[i]);
}
printf("\n");
}
/* Allocate list that can store up to 'max_size' elements */
__device__ list_t *
list_alloc(int max_size)
{
list_t *list = (list_t *)malloc(sizeof(list_t));
list->values = (int *)malloc(max_size * sizeof(int));
list->max_size = max_size;
list->cur_size = 0;
return list;
}
/* Free a list; call this to avoid leaking memory! */
__device__ void
list_free(list_t *list)
{
free(list->values);
free(list);
}
/* Add a value to the end of the list */
__device__ void
list_add(list_t *list, int value)
{
if (list->cur_size >= list->max_size) {
printf("List full");
list_dump(list);
}
list->values[list->cur_size++] = value;
}
/* Return the current size of the list */
__device__ int
list_size(list_t *list)
{
return list->cur_size;
}
/* Validate index */
__device__ void
_list_check_index(list_t *list, unsigned long index)
{
if (index > list->cur_size - 1) {
printf("Invalid index %d\n", index);
list_dump(list);
}
}
/* Get the value at given index */
__device__ int
list_get(list_t *list, unsigned long index)
{
_list_check_index(list, index);
return list->values[index];
}
/* Remove the value at the given index */
__device__ void
list_remove_at(list_t *list, int index)
{
_list_check_index(list, index);
for (int i = index; i < list->cur_size - 1; i++) {
list->values[i] = list->values[i + 1];
}
list->cur_size--;
}
/* Retrieve a copy of the values as a simple array of integers. The returned
array is allocated dynamically; the caller must free the space when no
longer needed.
*/
__device__ int *
list_as_array(list_t *list)
{
int *rtn = (int *)malloc(list->max_size * sizeof(int));
for (int i = 0; i < list->max_size; i++) {
rtn[i] = list_get(list, i);
}
return rtn;
}
/**** Permutation ****************/
/* Permutation algorithms based on code found at:
http://www.mathblog.dk/project-euler-24-millionth-lexicographic-permutation/
which references:
http://www.cut-the-knot.org/do_you_know/AllPerm.shtml
*/
/* Return the kth lexographically ordered permuation of an array of k integers
in the range [0 .. size - 1]. The integers are allocated dynamically and
should be free'd by the caller when no longer needed.
*/
__device__ int *
kth_perm(int k, int size)
{
long remain = k - 1;
list_t *numbers = list_alloc(size);
for (int i = 0; i < size; i++) {
list_add(numbers, i);
}
list_t *perm = list_alloc(size);
for (int i = 1; i < size; i++) {
unsigned long f = factorial(size - i);
unsigned long j = remain / f;
remain = remain % f;
list_add(perm, list_get(numbers, j));
list_remove_at(numbers, j);
if (remain == 0) {
break;
}
}
/* Append remaining digits */
for (int i = 0; i < list_size(numbers); i++) {
list_add(perm, list_get(numbers, i));
}
int *rtn = list_as_array(perm);
list_free(perm);
return rtn;
}
/* Swap v[i] and v[j] */
__device__ void
swap(int *v, int i, int j)
{
int t = v[i];
v[i] = v[j];
v[j] = t;
}
/* Print a permutation array */
__device__ void
print_perm(int *perm, int size)
{
for (int k = 0; k < size; k++) {
printf("%4d", perm[k]);
}
printf("\n");
}
/* Given an array of size elements at perm, update the array in place to
contain the lexographically next permutation. It is originally due to
Dijkstra. The present version is discussed at:
http://www.cut-the-knot.org/do_you_know/AllPerm.shtml
*/
__device__ void
next_perm(int *perm, int size)
{
int i = size - 1;
while (perm[i - 1] >= perm[i]) {
i = i - 1;
}
int j = size;
while (perm[j - 1] <= perm[i - 1]) {
j = j - 1;
}
swap(perm, i - 1, j - 1);
i++;
j = size;
while (i < j) {
swap(perm, i - 1, j - 1);
i++;
j--;
}
}
__global__ void
perm_kernel(int *glob_cost_matrix, int *min_matrix, int num_cities, int num_threads)
{
int block_id =
blockIdx.x +
blockIdx.y * blockDim.x +
blockIdx.z * blockDim.x * blockDim.y;
int block_offset =
block_id *
blockDim.x * blockDim.y * blockDim.z;
int thread_offset =
threadIdx.x +
threadIdx.y * blockDim.x +
threadIdx.z * blockDim.x * blockDim.y;
int tid = block_offset + thread_offset;
__shared__ int cost_matrix[144];
int init_iters = (num_cities * num_cities) / num_threads;
if(tid == 0)
init_iters += (num_cities * num_cities) % num_threads;
for(int i = 0; i < num_cities * num_cities; i++)
cost_matrix[i] = glob_cost_matrix[i];
__syncthreads();
unsigned long num_iters = factorial(num_cities) / num_threads;
int *perm = kth_perm((num_iters * tid) + 1, num_cities);
print_perm(perm, num_cities);
int min_cost = INT_MAX;
int cost;
for(unsigned long i = 0; i < num_iters; i++)
{
cost = calc_cost(perm, cost_matrix, num_cities);
if(cost < min_cost)
{
min_cost = cost;
}
next_perm(perm, num_cities);
}
min_matrix[tid] = min_cost;
}
double
now(void)
{
struct timespec current_time;
double ONE_BILLION = (double)1000000000.0;
clock_gettime(CLOCK_REALTIME, ¤t_time);
return current_time.tv_sec + (current_time.tv_nsec / ONE_BILLION);
}
int
main(int argc, char **argv)
{
int num_cities = 3;
int random_seed = 42;
int num_threads = 5;
int ch;
while ((ch = getopt(argc, argv, "t:c:hs:")) != -1) {
switch (ch) {
case 'c':
num_cities = atoi(optarg);
break;
case 's':
random_seed = atoi(optarg);
break;
case 't':
num_threads = atoi(optarg);
break;
case 'h':
default:
usage(argv[0]);
}
}
double start = now();
int cost_matrix_size = sizeof(int) * num_cities * num_cities;
int min_matrix_size = sizeof(int) * num_threads;
//Initialize matrices
int *min_matrix_h = (int *) malloc(min_matrix_size);
int *cost_matrix_h = (int *) malloc(cost_matrix_size);
int *min_matrix_d, *cost_matrix_d;
hipMalloc(&min_matrix_d, min_matrix_size);
hipMalloc(&cost_matrix_d, cost_matrix_size);
//create and copy cost matrix to device
create_tsp(cost_matrix_h, num_cities, random_seed);
// print_tsp(cost_matrix_h, num_cities, random_seed);
hipMemcpy(cost_matrix_d, cost_matrix_h, cost_matrix_size, hipMemcpyHostToDevice);
//launch kernel
int threads_per_block = num_threads;
for(int i = 1; i < 1025; i *= 2)
{
if(i > num_threads)
break;
if(i < num_threads && (num_threads % i == 0))
{
threads_per_block = i;
}
}
int blocks_per_grid = num_threads / threads_per_block;
perm_kernel<<<blocks_per_grid, threads_per_block>>>(cost_matrix_d, min_matrix_d, num_cities, num_threads);
//copy local mins back to host
hipError_t rtn = hipMemcpy(min_matrix_h, min_matrix_d, min_matrix_size, hipMemcpyDeviceToHost);
if(rtn != 0){
printf("Ouchie:\n%s\n", hipGetErrorString(rtn));
}
//calculate minimum
int shortest_length = INT_MAX;
for(int i = 0; i < num_threads; i++){
if(min_matrix_h[i] < shortest_length)
{
shortest_length = min_matrix_h[i];
}
}
double stop = now();
printf("Shortest %d\n", shortest_length);
printf("Blocks per grid:%d\n", blocks_per_grid);
printf("Threads per block:%d\n", threads_per_block);
printf("Num cities:%d\n", num_cities);
printf("Num threads:%d\n", num_threads);
printf("Took %5.3f seconds\n\n", stop - start);
} |
You are a helpful coding assistant specialized in converting HIP source code to AMD host assembly. | #include <hip/hip_runtime.h>
#include <stdio.h>
#include <stdlib.h>
#include <unistd.h>
#include <limits.h>
#include <time.h>
/* Original permuation code due to D. Jimenez, UT Austin
* http://faculty.cse.tamu.edu/djimenez/ut/utsa/cs3343/
*/
/* Reference an element in the TSP distance array. */
#define TSP_ELT(tsp, n, i, j) *(tsp + (i * n) + j)
/* Create an instance of a symmetric TSP. */
int *
create_tsp(int n, int random_seed)
{
int *tsp = (int *) malloc(n * n * sizeof(int));
srandom(random_seed);
for (int i = 0; i < n; i++) {
for (int j = 0; j <= i; j++) {
int val = (int)(random() / (RAND_MAX / 100));
TSP_ELT(tsp, n, i, j) = val;
TSP_ELT(tsp, n, j, i) = val;
}
}
return tsp;
}
/* Print a TSP distance matrix. */
void
print_tsp(int *tsp, int n, int random_seed)
{
printf("TSP (%d cities - seed %d)\n ", n, random_seed);
for (int j = 0; j < n; j++) {
printf("%3d|", j);
}
printf("\n");
for (int i = 0; i < n; i++) {
printf("%2d|", i);
for (int j = 0; j < n; j++) {
printf("%4d", TSP_ELT(tsp, n, i, j));
}
printf("\n");
}
printf("\n");
}
void
usage(char *prog_name)
{
fprintf(stderr, "usage: %s [flags]\n", prog_name);
fprintf(stderr, " -h\n");
fprintf(stderr, " -t <number of threads>\n");
fprintf(stderr, " -c <number of cities>\n");
fprintf(stderr, " -s <random seed>\n");
exit(1);
}
__device__ unsigned long
factorial(int n)
{
if (n < 1) {
return 0;
}
unsigned long rtn = 1;
for (unsigned i = 1; i <= n; i++) {
rtn *= i;
}
return rtn;
}
__device__ int
calc_cost(int *perm, int *matrix, int n)
{
int total = 0;
for (int i = 0; i < n; i++) {
int j = (i + 1) % n;
int from = perm[i];
int to = perm[j];
int val = TSP_ELT(matrix, n, from, to);
total += val;
}
return total;
}
void
create_tsp(int *matrix, int n, int random_seed)
{
srandom(random_seed);
for (int i = 0; i < n; i++) {
for (int j = 0; j <= i; j++) {
int val = (int)(random() / (RAND_MAX / 100));
TSP_ELT(matrix, n, i, j) = val;
TSP_ELT(matrix, n, j, i) = val;
}
}
}
/**** List ADT ****************/
typedef struct {
int *values; /* Values stored in list */
int max_size; /* Maximum size allocated */
int cur_size; /* Size currently in use */
} list_t;
/* Dump list, including sizes */
__device__ void
list_dump(list_t *list)
{
printf("%2d/%2d", list->cur_size, list->max_size);
for (int i = 0; i < list->cur_size; i++) {
printf(" %d", list->values[i]);
}
printf("\n");
}
/* Allocate list that can store up to 'max_size' elements */
__device__ list_t *
list_alloc(int max_size)
{
list_t *list = (list_t *)malloc(sizeof(list_t));
list->values = (int *)malloc(max_size * sizeof(int));
list->max_size = max_size;
list->cur_size = 0;
return list;
}
/* Free a list; call this to avoid leaking memory! */
__device__ void
list_free(list_t *list)
{
free(list->values);
free(list);
}
/* Add a value to the end of the list */
__device__ void
list_add(list_t *list, int value)
{
if (list->cur_size >= list->max_size) {
printf("List full");
list_dump(list);
}
list->values[list->cur_size++] = value;
}
/* Return the current size of the list */
__device__ int
list_size(list_t *list)
{
return list->cur_size;
}
/* Validate index */
__device__ void
_list_check_index(list_t *list, unsigned long index)
{
if (index > list->cur_size - 1) {
printf("Invalid index %d\n", index);
list_dump(list);
}
}
/* Get the value at given index */
__device__ int
list_get(list_t *list, unsigned long index)
{
_list_check_index(list, index);
return list->values[index];
}
/* Remove the value at the given index */
__device__ void
list_remove_at(list_t *list, int index)
{
_list_check_index(list, index);
for (int i = index; i < list->cur_size - 1; i++) {
list->values[i] = list->values[i + 1];
}
list->cur_size--;
}
/* Retrieve a copy of the values as a simple array of integers. The returned
array is allocated dynamically; the caller must free the space when no
longer needed.
*/
__device__ int *
list_as_array(list_t *list)
{
int *rtn = (int *)malloc(list->max_size * sizeof(int));
for (int i = 0; i < list->max_size; i++) {
rtn[i] = list_get(list, i);
}
return rtn;
}
/**** Permutation ****************/
/* Permutation algorithms based on code found at:
http://www.mathblog.dk/project-euler-24-millionth-lexicographic-permutation/
which references:
http://www.cut-the-knot.org/do_you_know/AllPerm.shtml
*/
/* Return the kth lexographically ordered permuation of an array of k integers
in the range [0 .. size - 1]. The integers are allocated dynamically and
should be free'd by the caller when no longer needed.
*/
__device__ int *
kth_perm(int k, int size)
{
long remain = k - 1;
list_t *numbers = list_alloc(size);
for (int i = 0; i < size; i++) {
list_add(numbers, i);
}
list_t *perm = list_alloc(size);
for (int i = 1; i < size; i++) {
unsigned long f = factorial(size - i);
unsigned long j = remain / f;
remain = remain % f;
list_add(perm, list_get(numbers, j));
list_remove_at(numbers, j);
if (remain == 0) {
break;
}
}
/* Append remaining digits */
for (int i = 0; i < list_size(numbers); i++) {
list_add(perm, list_get(numbers, i));
}
int *rtn = list_as_array(perm);
list_free(perm);
return rtn;
}
/* Swap v[i] and v[j] */
__device__ void
swap(int *v, int i, int j)
{
int t = v[i];
v[i] = v[j];
v[j] = t;
}
/* Print a permutation array */
__device__ void
print_perm(int *perm, int size)
{
for (int k = 0; k < size; k++) {
printf("%4d", perm[k]);
}
printf("\n");
}
/* Given an array of size elements at perm, update the array in place to
contain the lexographically next permutation. It is originally due to
Dijkstra. The present version is discussed at:
http://www.cut-the-knot.org/do_you_know/AllPerm.shtml
*/
__device__ void
next_perm(int *perm, int size)
{
int i = size - 1;
while (perm[i - 1] >= perm[i]) {
i = i - 1;
}
int j = size;
while (perm[j - 1] <= perm[i - 1]) {
j = j - 1;
}
swap(perm, i - 1, j - 1);
i++;
j = size;
while (i < j) {
swap(perm, i - 1, j - 1);
i++;
j--;
}
}
__global__ void
perm_kernel(int *glob_cost_matrix, int *min_matrix, int num_cities, int num_threads)
{
int block_id =
blockIdx.x +
blockIdx.y * blockDim.x +
blockIdx.z * blockDim.x * blockDim.y;
int block_offset =
block_id *
blockDim.x * blockDim.y * blockDim.z;
int thread_offset =
threadIdx.x +
threadIdx.y * blockDim.x +
threadIdx.z * blockDim.x * blockDim.y;
int tid = block_offset + thread_offset;
__shared__ int cost_matrix[144];
int init_iters = (num_cities * num_cities) / num_threads;
if(tid == 0)
init_iters += (num_cities * num_cities) % num_threads;
for(int i = 0; i < num_cities * num_cities; i++)
cost_matrix[i] = glob_cost_matrix[i];
__syncthreads();
unsigned long num_iters = factorial(num_cities) / num_threads;
int *perm = kth_perm((num_iters * tid) + 1, num_cities);
print_perm(perm, num_cities);
int min_cost = INT_MAX;
int cost;
for(unsigned long i = 0; i < num_iters; i++)
{
cost = calc_cost(perm, cost_matrix, num_cities);
if(cost < min_cost)
{
min_cost = cost;
}
next_perm(perm, num_cities);
}
min_matrix[tid] = min_cost;
}
double
now(void)
{
struct timespec current_time;
double ONE_BILLION = (double)1000000000.0;
clock_gettime(CLOCK_REALTIME, ¤t_time);
return current_time.tv_sec + (current_time.tv_nsec / ONE_BILLION);
}
int
main(int argc, char **argv)
{
int num_cities = 3;
int random_seed = 42;
int num_threads = 5;
int ch;
while ((ch = getopt(argc, argv, "t:c:hs:")) != -1) {
switch (ch) {
case 'c':
num_cities = atoi(optarg);
break;
case 's':
random_seed = atoi(optarg);
break;
case 't':
num_threads = atoi(optarg);
break;
case 'h':
default:
usage(argv[0]);
}
}
double start = now();
int cost_matrix_size = sizeof(int) * num_cities * num_cities;
int min_matrix_size = sizeof(int) * num_threads;
//Initialize matrices
int *min_matrix_h = (int *) malloc(min_matrix_size);
int *cost_matrix_h = (int *) malloc(cost_matrix_size);
int *min_matrix_d, *cost_matrix_d;
hipMalloc(&min_matrix_d, min_matrix_size);
hipMalloc(&cost_matrix_d, cost_matrix_size);
//create and copy cost matrix to device
create_tsp(cost_matrix_h, num_cities, random_seed);
// print_tsp(cost_matrix_h, num_cities, random_seed);
hipMemcpy(cost_matrix_d, cost_matrix_h, cost_matrix_size, hipMemcpyHostToDevice);
//launch kernel
int threads_per_block = num_threads;
for(int i = 1; i < 1025; i *= 2)
{
if(i > num_threads)
break;
if(i < num_threads && (num_threads % i == 0))
{
threads_per_block = i;
}
}
int blocks_per_grid = num_threads / threads_per_block;
perm_kernel<<<blocks_per_grid, threads_per_block>>>(cost_matrix_d, min_matrix_d, num_cities, num_threads);
//copy local mins back to host
hipError_t rtn = hipMemcpy(min_matrix_h, min_matrix_d, min_matrix_size, hipMemcpyDeviceToHost);
if(rtn != 0){
printf("Ouchie:\n%s\n", hipGetErrorString(rtn));
}
//calculate minimum
int shortest_length = INT_MAX;
for(int i = 0; i < num_threads; i++){
if(min_matrix_h[i] < shortest_length)
{
shortest_length = min_matrix_h[i];
}
}
double stop = now();
printf("Shortest %d\n", shortest_length);
printf("Blocks per grid:%d\n", blocks_per_grid);
printf("Threads per block:%d\n", threads_per_block);
printf("Num cities:%d\n", num_cities);
printf("Num threads:%d\n", num_threads);
printf("Took %5.3f seconds\n\n", stop - start);
} | .text
.file "tsp-parallel.hip"
.globl _Z10create_tspii # -- Begin function _Z10create_tspii
.p2align 4, 0x90
.type _Z10create_tspii,@function
_Z10create_tspii: # @_Z10create_tspii
.cfi_startproc
# %bb.0:
pushq %rbp
.cfi_def_cfa_offset 16
pushq %r15
.cfi_def_cfa_offset 24
pushq %r14
.cfi_def_cfa_offset 32
pushq %r13
.cfi_def_cfa_offset 40
pushq %r12
.cfi_def_cfa_offset 48
pushq %rbx
.cfi_def_cfa_offset 56
subq $40, %rsp
.cfi_def_cfa_offset 96
.cfi_offset %rbx, -56
.cfi_offset %r12, -48
.cfi_offset %r13, -40
.cfi_offset %r14, -32
.cfi_offset %r15, -24
.cfi_offset %rbp, -16
movl %esi, %r14d
movl %edi, %ebp
imull %edi, %edi
shlq $2, %rdi
callq malloc
movq %rax, 8(%rsp) # 8-byte Spill
movl %r14d, %edi
callq srandom
testl %ebp, %ebp
jle .LBB0_5
# %bb.1: # %.preheader.preheader
movl %ebp, %eax
movq %rax, 16(%rsp) # 8-byte Spill
leaq (,%rax,4), %r15
movl $1, %r12d
xorl %ecx, %ecx
movabsq $-4035224944001410015, %rbp # imm = 0xC800004B00001C21
movq 8(%rsp), %r14 # 8-byte Reload
movq %r14, %rbx
.p2align 4, 0x90
.LBB0_2: # %.preheader
# =>This Loop Header: Depth=1
# Child Loop BB0_3 Depth 2
movq %rcx, 32(%rsp) # 8-byte Spill
movq %r14, 24(%rsp) # 8-byte Spill
xorl %r13d, %r13d
.p2align 4, 0x90
.LBB0_3: # Parent Loop BB0_2 Depth=1
# => This Inner Loop Header: Depth=2
callq random
movq %rax, %rcx
imulq %rbp
addq %rcx, %rdx
movq %rdx, %rax
shrq $63, %rax
shrq $24, %rdx
addl %eax, %edx
movl %edx, (%rbx,%r13,4)
movl %edx, (%r14)
incq %r13
addq %r15, %r14
cmpq %r13, %r12
jne .LBB0_3
# %bb.4: # in Loop: Header=BB0_2 Depth=1
movq 32(%rsp), %rcx # 8-byte Reload
incq %rcx
incq %r12
movq 24(%rsp), %r14 # 8-byte Reload
addq $4, %r14
addq %r15, %rbx
cmpq 16(%rsp), %rcx # 8-byte Folded Reload
jne .LBB0_2
.LBB0_5: # %._crit_edge
movq 8(%rsp), %rax # 8-byte Reload
addq $40, %rsp
.cfi_def_cfa_offset 56
popq %rbx
.cfi_def_cfa_offset 48
popq %r12
.cfi_def_cfa_offset 40
popq %r13
.cfi_def_cfa_offset 32
popq %r14
.cfi_def_cfa_offset 24
popq %r15
.cfi_def_cfa_offset 16
popq %rbp
.cfi_def_cfa_offset 8
retq
.Lfunc_end0:
.size _Z10create_tspii, .Lfunc_end0-_Z10create_tspii
.cfi_endproc
# -- End function
.globl _Z9print_tspPiii # -- Begin function _Z9print_tspPiii
.p2align 4, 0x90
.type _Z9print_tspPiii,@function
_Z9print_tspPiii: # @_Z9print_tspPiii
.cfi_startproc
# %bb.0:
pushq %rbp
.cfi_def_cfa_offset 16
pushq %r15
.cfi_def_cfa_offset 24
pushq %r14
.cfi_def_cfa_offset 32
pushq %r13
.cfi_def_cfa_offset 40
pushq %r12
.cfi_def_cfa_offset 48
pushq %rbx
.cfi_def_cfa_offset 56
pushq %rax
.cfi_def_cfa_offset 64
.cfi_offset %rbx, -56
.cfi_offset %r12, -48
.cfi_offset %r13, -40
.cfi_offset %r14, -32
.cfi_offset %r15, -24
.cfi_offset %rbp, -16
movl %esi, %ebp
movq %rdi, %rbx
movl $.L.str, %edi
xorl %eax, %eax
callq printf
testl %ebp, %ebp
jle .LBB1_3
# %bb.1: # %.lr.ph.preheader
xorl %r14d, %r14d
.p2align 4, 0x90
.LBB1_2: # %.lr.ph
# =>This Inner Loop Header: Depth=1
movl $.L.str.1, %edi
movl %r14d, %esi
xorl %eax, %eax
callq printf
incl %r14d
cmpl %r14d, %ebp
jne .LBB1_2
.LBB1_3: # %._crit_edge
movl $10, %edi
callq putchar@PLT
testl %ebp, %ebp
jle .LBB1_8
# %bb.4: # %.lr.ph28
movl %ebp, %r15d
leaq (,%r15,4), %r12
xorl %r14d, %r14d
.p2align 4, 0x90
.LBB1_5: # %.lr.ph24
# =>This Loop Header: Depth=1
# Child Loop BB1_6 Depth 2
movl $.L.str.3, %edi
movl %r14d, %esi
xorl %eax, %eax
callq printf
xorl %r13d, %r13d
.p2align 4, 0x90
.LBB1_6: # Parent Loop BB1_5 Depth=1
# => This Inner Loop Header: Depth=2
movl (%rbx,%r13,4), %esi
movl $.L.str.4, %edi
xorl %eax, %eax
callq printf
incq %r13
cmpq %r13, %r15
jne .LBB1_6
# %bb.7: # %._crit_edge25
# in Loop: Header=BB1_5 Depth=1
movl $10, %edi
callq putchar@PLT
incq %r14
addq %r12, %rbx
cmpq %r15, %r14
jne .LBB1_5
.LBB1_8: # %._crit_edge29
movl $10, %edi
addq $8, %rsp
.cfi_def_cfa_offset 56
popq %rbx
.cfi_def_cfa_offset 48
popq %r12
.cfi_def_cfa_offset 40
popq %r13
.cfi_def_cfa_offset 32
popq %r14
.cfi_def_cfa_offset 24
popq %r15
.cfi_def_cfa_offset 16
popq %rbp
.cfi_def_cfa_offset 8
jmp putchar@PLT # TAILCALL
.Lfunc_end1:
.size _Z9print_tspPiii, .Lfunc_end1-_Z9print_tspPiii
.cfi_endproc
# -- End function
.globl _Z5usagePc # -- Begin function _Z5usagePc
.p2align 4, 0x90
.type _Z5usagePc,@function
_Z5usagePc: # @_Z5usagePc
.cfi_startproc
# %bb.0:
pushq %rax
.cfi_def_cfa_offset 16
movq %rdi, %rdx
movq stderr(%rip), %rdi
movl $.L.str.5, %esi
xorl %eax, %eax
callq fprintf
movq stderr(%rip), %rcx
movl $.L.str.6, %edi
movl $6, %esi
movl $1, %edx
callq fwrite@PLT
movq stderr(%rip), %rcx
movl $.L.str.7, %edi
movl $26, %esi
movl $1, %edx
callq fwrite@PLT
movq stderr(%rip), %rcx
movl $.L.str.8, %edi
movl $25, %esi
movl $1, %edx
callq fwrite@PLT
movq stderr(%rip), %rcx
movl $.L.str.9, %edi
movl $20, %esi
movl $1, %edx
callq fwrite@PLT
movl $1, %edi
callq exit
.Lfunc_end2:
.size _Z5usagePc, .Lfunc_end2-_Z5usagePc
.cfi_endproc
# -- End function
.globl _Z10create_tspPiii # -- Begin function _Z10create_tspPiii
.p2align 4, 0x90
.type _Z10create_tspPiii,@function
_Z10create_tspPiii: # @_Z10create_tspPiii
.cfi_startproc
# %bb.0:
pushq %rbp
.cfi_def_cfa_offset 16
pushq %r15
.cfi_def_cfa_offset 24
pushq %r14
.cfi_def_cfa_offset 32
pushq %r13
.cfi_def_cfa_offset 40
pushq %r12
.cfi_def_cfa_offset 48
pushq %rbx
.cfi_def_cfa_offset 56
subq $24, %rsp
.cfi_def_cfa_offset 80
.cfi_offset %rbx, -56
.cfi_offset %r12, -48
.cfi_offset %r13, -40
.cfi_offset %r14, -32
.cfi_offset %r15, -24
.cfi_offset %rbp, -16
movl %esi, %ebp
movq %rdi, %rbx
movl %edx, %edi
callq srandom
testl %ebp, %ebp
jle .LBB3_5
# %bb.1: # %.preheader.preheader
movl %ebp, %eax
movq %rax, (%rsp) # 8-byte Spill
leaq (,%rax,4), %r15
movl $1, %r12d
xorl %eax, %eax
movabsq $-4035224944001410015, %rbp # imm = 0xC800004B00001C21
movq %rbx, %r14
.p2align 4, 0x90
.LBB3_2: # %.preheader
# =>This Loop Header: Depth=1
# Child Loop BB3_3 Depth 2
movq %rax, 16(%rsp) # 8-byte Spill
movq %r14, 8(%rsp) # 8-byte Spill
xorl %r13d, %r13d
.p2align 4, 0x90
.LBB3_3: # Parent Loop BB3_2 Depth=1
# => This Inner Loop Header: Depth=2
callq random
movq %rax, %rcx
imulq %rbp
addq %rcx, %rdx
movq %rdx, %rax
shrq $63, %rax
shrq $24, %rdx
addl %eax, %edx
movl %edx, (%rbx,%r13,4)
movl %edx, (%r14)
incq %r13
addq %r15, %r14
cmpq %r13, %r12
jne .LBB3_3
# %bb.4: # in Loop: Header=BB3_2 Depth=1
movq 16(%rsp), %rax # 8-byte Reload
incq %rax
incq %r12
movq 8(%rsp), %r14 # 8-byte Reload
addq $4, %r14
addq %r15, %rbx
cmpq (%rsp), %rax # 8-byte Folded Reload
jne .LBB3_2
.LBB3_5: # %._crit_edge
addq $24, %rsp
.cfi_def_cfa_offset 56
popq %rbx
.cfi_def_cfa_offset 48
popq %r12
.cfi_def_cfa_offset 40
popq %r13
.cfi_def_cfa_offset 32
popq %r14
.cfi_def_cfa_offset 24
popq %r15
.cfi_def_cfa_offset 16
popq %rbp
.cfi_def_cfa_offset 8
retq
.Lfunc_end3:
.size _Z10create_tspPiii, .Lfunc_end3-_Z10create_tspPiii
.cfi_endproc
# -- End function
.globl _Z26__device_stub__perm_kernelPiS_ii # -- Begin function _Z26__device_stub__perm_kernelPiS_ii
.p2align 4, 0x90
.type _Z26__device_stub__perm_kernelPiS_ii,@function
_Z26__device_stub__perm_kernelPiS_ii: # @_Z26__device_stub__perm_kernelPiS_ii
.cfi_startproc
# %bb.0:
subq $120, %rsp
.cfi_def_cfa_offset 128
movq %rdi, 72(%rsp)
movq %rsi, 64(%rsp)
movl %edx, 12(%rsp)
movl %ecx, 8(%rsp)
leaq 72(%rsp), %rax
movq %rax, 80(%rsp)
leaq 64(%rsp), %rax
movq %rax, 88(%rsp)
leaq 12(%rsp), %rax
movq %rax, 96(%rsp)
leaq 8(%rsp), %rax
movq %rax, 104(%rsp)
leaq 48(%rsp), %rdi
leaq 32(%rsp), %rsi
leaq 24(%rsp), %rdx
leaq 16(%rsp), %rcx
callq __hipPopCallConfiguration
movq 48(%rsp), %rsi
movl 56(%rsp), %edx
movq 32(%rsp), %rcx
movl 40(%rsp), %r8d
leaq 80(%rsp), %r9
movl $_Z11perm_kernelPiS_ii, %edi
pushq 16(%rsp)
.cfi_adjust_cfa_offset 8
pushq 32(%rsp)
.cfi_adjust_cfa_offset 8
callq hipLaunchKernel
addq $136, %rsp
.cfi_adjust_cfa_offset -136
retq
.Lfunc_end4:
.size _Z26__device_stub__perm_kernelPiS_ii, .Lfunc_end4-_Z26__device_stub__perm_kernelPiS_ii
.cfi_endproc
# -- End function
.section .rodata.cst8,"aM",@progbits,8
.p2align 3, 0x0 # -- Begin function _Z3nowv
.LCPI5_0:
.quad 0x41cdcd6500000000 # double 1.0E+9
.text
.globl _Z3nowv
.p2align 4, 0x90
.type _Z3nowv,@function
_Z3nowv: # @_Z3nowv
.cfi_startproc
# %bb.0:
subq $24, %rsp
.cfi_def_cfa_offset 32
leaq 8(%rsp), %rsi
xorl %edi, %edi
callq clock_gettime
cvtsi2sdq 8(%rsp), %xmm1
cvtsi2sdq 16(%rsp), %xmm0
divsd .LCPI5_0(%rip), %xmm0
addsd %xmm1, %xmm0
addq $24, %rsp
.cfi_def_cfa_offset 8
retq
.Lfunc_end5:
.size _Z3nowv, .Lfunc_end5-_Z3nowv
.cfi_endproc
# -- End function
.section .rodata.cst8,"aM",@progbits,8
.p2align 3, 0x0 # -- Begin function main
.LCPI6_0:
.quad 0x41cdcd6500000000 # double 1.0E+9
.text
.globl main
.p2align 4, 0x90
.type main,@function
main: # @main
.cfi_startproc
# %bb.0:
pushq %rbp
.cfi_def_cfa_offset 16
pushq %r15
.cfi_def_cfa_offset 24
pushq %r14
.cfi_def_cfa_offset 32
pushq %r13
.cfi_def_cfa_offset 40
pushq %r12
.cfi_def_cfa_offset 48
pushq %rbx
.cfi_def_cfa_offset 56
subq $216, %rsp
.cfi_def_cfa_offset 272
.cfi_offset %rbx, -56
.cfi_offset %r12, -48
.cfi_offset %r13, -40
.cfi_offset %r14, -32
.cfi_offset %r15, -24
.cfi_offset %rbp, -16
movq %rsi, %r15
movl %edi, %ebp
movl $3, %r14d
movl $42, %r13d
movl $5, %r12d
jmp .LBB6_1
.p2align 4, 0x90
.LBB6_6: # in Loop: Header=BB6_1 Depth=1
movq optarg(%rip), %rdi
xorl %esi, %esi
movl $10, %edx
callq __isoc23_strtol
movq %rax, %r14
.LBB6_1: # =>This Inner Loop Header: Depth=1
movl $.L.str.10, %edx
movl %ebp, %edi
movq %r15, %rsi
callq getopt
cmpl $99, %eax
je .LBB6_6
# %bb.2: # in Loop: Header=BB6_1 Depth=1
cmpl $-1, %eax
je .LBB6_9
# %bb.3: # in Loop: Header=BB6_1 Depth=1
cmpl $115, %eax
je .LBB6_7
# %bb.4: # in Loop: Header=BB6_1 Depth=1
cmpl $116, %eax
jne .LBB6_8
# %bb.5: # in Loop: Header=BB6_1 Depth=1
movq optarg(%rip), %rdi
xorl %esi, %esi
movl $10, %edx
callq __isoc23_strtol
movq %rax, %r12
jmp .LBB6_1
.LBB6_7: # in Loop: Header=BB6_1 Depth=1
movq optarg(%rip), %rdi
xorl %esi, %esi
movl $10, %edx
callq __isoc23_strtol
movq %rax, %r13
jmp .LBB6_1
.LBB6_9:
leaq 64(%rsp), %rsi
xorl %edi, %edi
callq clock_gettime
movq 64(%rsp), %rax
movq %rax, 128(%rsp) # 8-byte Spill
movq 72(%rsp), %rax
movq %rax, 120(%rsp) # 8-byte Spill
movl %r14d, %ebx
imull %r14d, %ebx
shll $2, %ebx
movq %r12, 40(%rsp) # 8-byte Spill
leal (,%r12,4), %eax
movslq %eax, %r15
movq %r15, %rdi
callq malloc
movq %rax, 112(%rsp) # 8-byte Spill
movslq %ebx, %rbx
movq %rbx, %rdi
callq malloc
movq %rax, 24(%rsp) # 8-byte Spill
leaq 56(%rsp), %rdi
movq %r15, 104(%rsp) # 8-byte Spill
movq %r15, %rsi
callq hipMalloc
leaq 48(%rsp), %rdi
movq %rbx, 96(%rsp) # 8-byte Spill
movq %rbx, %rsi
callq hipMalloc
movl %r13d, %edi
callq srandom
movq %r14, 32(%rsp) # 8-byte Spill
testl %r14d, %r14d
jle .LBB6_14
# %bb.10: # %.preheader.preheader.i
movl 32(%rsp), %eax # 4-byte Reload
movq %rax, 136(%rsp) # 8-byte Spill
leaq (,%rax,4), %r12
movl $1, %ebp
xorl %ecx, %ecx
movabsq $-4035224944001410015, %rbx # imm = 0xC800004B00001C21
movq 24(%rsp), %r13 # 8-byte Reload
movq %r13, %r14
.p2align 4, 0x90
.LBB6_11: # %.preheader.i
# =>This Loop Header: Depth=1
# Child Loop BB6_12 Depth 2
movq %rcx, 8(%rsp) # 8-byte Spill
movq %r13, 144(%rsp) # 8-byte Spill
xorl %r15d, %r15d
.p2align 4, 0x90
.LBB6_12: # Parent Loop BB6_11 Depth=1
# => This Inner Loop Header: Depth=2
callq random
movq %rax, %rcx
imulq %rbx
addq %rcx, %rdx
movq %rdx, %rax
shrq $63, %rax
shrq $24, %rdx
addl %eax, %edx
movl %edx, (%r14,%r15,4)
movl %edx, (%r13)
incq %r15
addq %r12, %r13
cmpq %r15, %rbp
jne .LBB6_12
# %bb.13: # in Loop: Header=BB6_11 Depth=1
movq 8(%rsp), %rcx # 8-byte Reload
incq %rcx
incq %rbp
movq 144(%rsp), %r13 # 8-byte Reload
addq $4, %r13
addq %r12, %r14
cmpq 136(%rsp), %rcx # 8-byte Folded Reload
jne .LBB6_11
.LBB6_14: # %_Z10create_tspPiii.exit
movq 48(%rsp), %rdi
movl $1, %ebx
movq 24(%rsp), %rsi # 8-byte Reload
movq 96(%rsp), %rdx # 8-byte Reload
movl $1, %ecx
callq hipMemcpy
movq 40(%rsp), %r15 # 8-byte Reload
movl %r15d, %ebp
testl %r15d, %r15d
movq 32(%rsp), %r14 # 8-byte Reload
jle .LBB6_18
# %bb.15: # %.lr.ph.preheader
movl %r15d, %ebp
.p2align 4, 0x90
.LBB6_16: # %.lr.ph
# =>This Inner Loop Header: Depth=1
movl %ebp, %eax
leal 2147483647(%rbx), %ecx
testl %r15d, %ecx
cmovel %ebx, %ebp
cmpl %r15d, %ebx
cmovgel %eax, %ebp
cmpl $512, %ebx # imm = 0x200
ja .LBB6_18
# %bb.17: # %.lr.ph
# in Loop: Header=BB6_16 Depth=1
addl %ebx, %ebx
cmpl %r15d, %ebx
jle .LBB6_16
.LBB6_18: # %._crit_edge
movl %r15d, %eax
cltd
idivl %ebp
movl %eax, %r13d
movabsq $4294967296, %rax # imm = 0x100000000
leaq (%rax,%r13), %rdi
movl %ebp, %edx
orq %rax, %rdx
movl $1, %esi
movl $1, %ecx
xorl %r8d, %r8d
xorl %r9d, %r9d
callq __hipPushCallConfiguration
testl %eax, %eax
jne .LBB6_20
# %bb.19:
movq 48(%rsp), %rax
movq 56(%rsp), %rcx
movq %rax, 208(%rsp)
movq %rcx, 200(%rsp)
movl %r14d, 20(%rsp)
movl %r15d, 16(%rsp)
leaq 208(%rsp), %rax
movq %rax, 64(%rsp)
leaq 200(%rsp), %rax
movq %rax, 72(%rsp)
leaq 20(%rsp), %rax
movq %rax, 80(%rsp)
leaq 16(%rsp), %rax
movq %rax, 88(%rsp)
leaq 184(%rsp), %rdi
leaq 168(%rsp), %rsi
leaq 160(%rsp), %rdx
leaq 152(%rsp), %rcx
callq __hipPopCallConfiguration
movq 184(%rsp), %rsi
movl 192(%rsp), %edx
movq 168(%rsp), %rcx
movl 176(%rsp), %r8d
leaq 64(%rsp), %r9
movl $_Z11perm_kernelPiS_ii, %edi
pushq 152(%rsp)
.cfi_adjust_cfa_offset 8
pushq 168(%rsp)
.cfi_adjust_cfa_offset 8
callq hipLaunchKernel
addq $16, %rsp
.cfi_adjust_cfa_offset -16
.LBB6_20:
movq 56(%rsp), %rsi
movq 112(%rsp), %rbx # 8-byte Reload
movq %rbx, %rdi
movq 104(%rsp), %rdx # 8-byte Reload
movl $2, %ecx
callq hipMemcpy
testl %eax, %eax
je .LBB6_22
# %bb.21:
movl %eax, %edi
callq hipGetErrorString
movl $.L.str.11, %edi
movq %rax, %rsi
xorl %eax, %eax
callq printf
.LBB6_22:
testl %r15d, %r15d
jle .LBB6_23
# %bb.25: # %.lr.ph80.preheader
movl %r15d, %eax
movl $2147483647, %r12d # imm = 0x7FFFFFFF
xorl %ecx, %ecx
.p2align 4, 0x90
.LBB6_26: # %.lr.ph80
# =>This Inner Loop Header: Depth=1
movl (%rbx,%rcx,4), %edx
cmpl %r12d, %edx
cmovll %edx, %r12d
incq %rcx
cmpq %rcx, %rax
jne .LBB6_26
jmp .LBB6_24
.LBB6_23:
movl $2147483647, %r12d # imm = 0x7FFFFFFF
.LBB6_24: # %._crit_edge81
cvtsi2sdq 120(%rsp), %xmm0 # 8-byte Folded Reload
divsd .LCPI6_0(%rip), %xmm0
cvtsi2sdq 128(%rsp), %xmm1 # 8-byte Folded Reload
addsd %xmm0, %xmm1
movsd %xmm1, 8(%rsp) # 8-byte Spill
leaq 64(%rsp), %rsi
xorl %edi, %edi
callq clock_gettime
xorps %xmm0, %xmm0
cvtsi2sdq 64(%rsp), %xmm0
xorps %xmm1, %xmm1
cvtsi2sdq 72(%rsp), %xmm1
divsd .LCPI6_0(%rip), %xmm1
addsd %xmm0, %xmm1
subsd 8(%rsp), %xmm1 # 8-byte Folded Reload
movsd %xmm1, 8(%rsp) # 8-byte Spill
movl $.L.str.12, %edi
movl %r12d, %esi
xorl %eax, %eax
callq printf
movl $.L.str.13, %edi
movl %r13d, %esi
xorl %eax, %eax
callq printf
movl $.L.str.14, %edi
movl %ebp, %esi
xorl %eax, %eax
callq printf
movl $.L.str.15, %edi
movl %r14d, %esi
xorl %eax, %eax
callq printf
movl $.L.str.16, %edi
movq 40(%rsp), %rsi # 8-byte Reload
# kill: def $esi killed $esi killed $rsi
xorl %eax, %eax
callq printf
movl $.L.str.17, %edi
movsd 8(%rsp), %xmm0 # 8-byte Reload
# xmm0 = mem[0],zero
movb $1, %al
callq printf
xorl %eax, %eax
addq $216, %rsp
.cfi_def_cfa_offset 56
popq %rbx
.cfi_def_cfa_offset 48
popq %r12
.cfi_def_cfa_offset 40
popq %r13
.cfi_def_cfa_offset 32
popq %r14
.cfi_def_cfa_offset 24
popq %r15
.cfi_def_cfa_offset 16
popq %rbp
.cfi_def_cfa_offset 8
retq
.LBB6_8:
.cfi_def_cfa_offset 272
movq (%r15), %rdx
movq stderr(%rip), %rdi
movl $.L.str.5, %esi
xorl %eax, %eax
callq fprintf
movq stderr(%rip), %rcx
movl $.L.str.6, %edi
movl $6, %esi
movl $1, %edx
callq fwrite@PLT
movq stderr(%rip), %rcx
movl $.L.str.7, %edi
movl $26, %esi
movl $1, %edx
callq fwrite@PLT
movq stderr(%rip), %rcx
movl $.L.str.8, %edi
movl $25, %esi
movl $1, %edx
callq fwrite@PLT
movq stderr(%rip), %rcx
movl $.L.str.9, %edi
movl $20, %esi
movl $1, %edx
callq fwrite@PLT
movl $1, %edi
callq exit
.Lfunc_end6:
.size main, .Lfunc_end6-main
.cfi_endproc
# -- End function
.p2align 4, 0x90 # -- Begin function __hip_module_ctor
.type __hip_module_ctor,@function
__hip_module_ctor: # @__hip_module_ctor
.cfi_startproc
# %bb.0:
subq $40, %rsp
.cfi_def_cfa_offset 48
cmpq $0, __hip_gpubin_handle(%rip)
jne .LBB7_2
# %bb.1:
movl $__hip_fatbin_wrapper, %edi
callq __hipRegisterFatBinary
movq %rax, __hip_gpubin_handle(%rip)
.LBB7_2:
movq __hip_gpubin_handle(%rip), %rdi
xorps %xmm0, %xmm0
movups %xmm0, 16(%rsp)
movups %xmm0, (%rsp)
movl $_Z11perm_kernelPiS_ii, %esi
movl $.L__unnamed_1, %edx
movl $.L__unnamed_1, %ecx
movl $-1, %r8d
xorl %r9d, %r9d
callq __hipRegisterFunction
movl $__hip_module_dtor, %edi
addq $40, %rsp
.cfi_def_cfa_offset 8
jmp atexit # TAILCALL
.Lfunc_end7:
.size __hip_module_ctor, .Lfunc_end7-__hip_module_ctor
.cfi_endproc
# -- End function
.p2align 4, 0x90 # -- Begin function __hip_module_dtor
.type __hip_module_dtor,@function
__hip_module_dtor: # @__hip_module_dtor
.cfi_startproc
# %bb.0:
movq __hip_gpubin_handle(%rip), %rdi
testq %rdi, %rdi
je .LBB8_2
# %bb.1:
pushq %rax
.cfi_def_cfa_offset 16
callq __hipUnregisterFatBinary
movq $0, __hip_gpubin_handle(%rip)
addq $8, %rsp
.cfi_def_cfa_offset 8
.LBB8_2:
retq
.Lfunc_end8:
.size __hip_module_dtor, .Lfunc_end8-__hip_module_dtor
.cfi_endproc
# -- End function
.type .L.str,@object # @.str
.section .rodata.str1.1,"aMS",@progbits,1
.L.str:
.asciz "TSP (%d cities - seed %d)\n "
.size .L.str, 31
.type .L.str.1,@object # @.str.1
.L.str.1:
.asciz "%3d|"
.size .L.str.1, 5
.type .L.str.3,@object # @.str.3
.L.str.3:
.asciz "%2d|"
.size .L.str.3, 5
.type .L.str.4,@object # @.str.4
.L.str.4:
.asciz "%4d"
.size .L.str.4, 4
.type .L.str.5,@object # @.str.5
.L.str.5:
.asciz "usage: %s [flags]\n"
.size .L.str.5, 19
.type .L.str.6,@object # @.str.6
.L.str.6:
.asciz " -h\n"
.size .L.str.6, 7
.type .L.str.7,@object # @.str.7
.L.str.7:
.asciz " -t <number of threads>\n"
.size .L.str.7, 27
.type .L.str.8,@object # @.str.8
.L.str.8:
.asciz " -c <number of cities>\n"
.size .L.str.8, 26
.type .L.str.9,@object # @.str.9
.L.str.9:
.asciz " -s <random seed>\n"
.size .L.str.9, 21
.type _Z11perm_kernelPiS_ii,@object # @_Z11perm_kernelPiS_ii
.section .rodata,"a",@progbits
.globl _Z11perm_kernelPiS_ii
.p2align 3, 0x0
_Z11perm_kernelPiS_ii:
.quad _Z26__device_stub__perm_kernelPiS_ii
.size _Z11perm_kernelPiS_ii, 8
.type .L.str.10,@object # @.str.10
.section .rodata.str1.1,"aMS",@progbits,1
.L.str.10:
.asciz "t:c:hs:"
.size .L.str.10, 8
.type .L.str.11,@object # @.str.11
.L.str.11:
.asciz "Ouchie:\n%s\n"
.size .L.str.11, 12
.type .L.str.12,@object # @.str.12
.L.str.12:
.asciz "Shortest %d\n"
.size .L.str.12, 13
.type .L.str.13,@object # @.str.13
.L.str.13:
.asciz "Blocks per grid:%d\n"
.size .L.str.13, 20
.type .L.str.14,@object # @.str.14
.L.str.14:
.asciz "Threads per block:%d\n"
.size .L.str.14, 22
.type .L.str.15,@object # @.str.15
.L.str.15:
.asciz "Num cities:%d\n"
.size .L.str.15, 15
.type .L.str.16,@object # @.str.16
.L.str.16:
.asciz "Num threads:%d\n"
.size .L.str.16, 16
.type .L.str.17,@object # @.str.17
.L.str.17:
.asciz "Took %5.3f seconds\n\n"
.size .L.str.17, 21
.type .L__unnamed_1,@object # @0
.L__unnamed_1:
.asciz "_Z11perm_kernelPiS_ii"
.size .L__unnamed_1, 22
.type __hip_fatbin_wrapper,@object # @__hip_fatbin_wrapper
.section .hipFatBinSegment,"a",@progbits
.p2align 3, 0x0
__hip_fatbin_wrapper:
.long 1212764230 # 0x48495046
.long 1 # 0x1
.quad __hip_fatbin
.quad 0
.size __hip_fatbin_wrapper, 24
.type __hip_gpubin_handle,@object # @__hip_gpubin_handle
.local __hip_gpubin_handle
.comm __hip_gpubin_handle,8,8
.section .init_array,"aw",@init_array
.p2align 3, 0x0
.quad __hip_module_ctor
.type __hip_cuid_,@object # @__hip_cuid_
.bss
.globl __hip_cuid_
__hip_cuid_:
.byte 0 # 0x0
.size __hip_cuid_, 1
.section ".linker-options","e",@llvm_linker_options
.ident "AMD clang version 18.0.0git (https://github.com/RadeonOpenCompute/llvm-project roc-6.3.2 25012 e5bf7e55c91490b07c49d8960fa7983d864936c4)"
.section ".note.GNU-stack","",@progbits
.addrsig
.addrsig_sym _Z26__device_stub__perm_kernelPiS_ii
.addrsig_sym __hip_module_ctor
.addrsig_sym __hip_module_dtor
.addrsig_sym _Z11perm_kernelPiS_ii
.addrsig_sym __hip_fatbin
.addrsig_sym __hip_fatbin_wrapper
.addrsig_sym __hip_cuid_ |
You are a helpful coding assistant specialized in converting from CUDA host assembly to AMD host assembly. | .file "tmpxft_000e1d88_00000000-6_tsp-parallel.cudafe1.cpp"
.text
#APP
#NO_APP
.type _ZL26__cudaUnregisterBinaryUtilv, @function
_ZL26__cudaUnregisterBinaryUtilv:
.LFB2093:
.cfi_startproc
endbr64
subq $8, %rsp
.cfi_def_cfa_offset 16
movq _ZL20__cudaFatCubinHandle(%rip), %rdi
call __cudaUnregisterFatBinary@PLT
addq $8, %rsp
.cfi_def_cfa_offset 8
ret
.cfi_endproc
.LFE2093:
.size _ZL26__cudaUnregisterBinaryUtilv, .-_ZL26__cudaUnregisterBinaryUtilv
.globl _Z10create_tspii
.type _Z10create_tspii, @function
_Z10create_tspii:
.LFB2070:
.cfi_startproc
endbr64
pushq %r15
.cfi_def_cfa_offset 16
.cfi_offset 15, -16
pushq %r14
.cfi_def_cfa_offset 24
.cfi_offset 14, -24
pushq %r13
.cfi_def_cfa_offset 32
.cfi_offset 13, -32
pushq %r12
.cfi_def_cfa_offset 40
.cfi_offset 12, -40
pushq %rbp
.cfi_def_cfa_offset 48
.cfi_offset 6, -48
pushq %rbx
.cfi_def_cfa_offset 56
.cfi_offset 3, -56
subq $40, %rsp
.cfi_def_cfa_offset 96
movl %edi, %r14d
movl %edi, 20(%rsp)
movl %esi, %ebx
imull %edi, %edi
movslq %edi, %rdi
salq $2, %rdi
call malloc@PLT
movq %rax, 8(%rsp)
movl %ebx, %edi
call srandom@PLT
testl %r14d, %r14d
jle .L3
movslq %r14d, %rax
movq %rax, 24(%rsp)
leaq 0(,%rax,4), %r15
movl $0, 16(%rsp)
movq $0, (%rsp)
movabsq $-4035224944001410015, %r14
.L5:
movq (%rsp), %rax
movl %eax, %r12d
testl %eax, %eax
js .L12
movq 8(%rsp), %rsi
movq (%rsp), %rax
leaq (%rsi,%rax,4), %rbp
movslq 16(%rsp), %rax
leaq (%rsi,%rax,4), %r13
movl $0, %ebx
.L6:
call random@PLT
movq %rax, %rcx
imulq %r14
addq %rcx, %rdx
sarq $24, %rdx
sarq $63, %rcx
subq %rcx, %rdx
movl %edx, 0(%r13,%rbx,4)
movl %edx, 0(%rbp)
addq $1, %rbx
addq %r15, %rbp
cmpl %ebx, %r12d
jge .L6
addq $1, (%rsp)
movq (%rsp), %rax
movl 20(%rsp), %esi
addl %esi, 16(%rsp)
movq 24(%rsp), %rdi
cmpq %rdi, %rax
jne .L5
.L3:
movq 8(%rsp), %rax
addq $40, %rsp
.cfi_remember_state
.cfi_def_cfa_offset 56
popq %rbx
.cfi_def_cfa_offset 48
popq %rbp
.cfi_def_cfa_offset 40
popq %r12
.cfi_def_cfa_offset 32
popq %r13
.cfi_def_cfa_offset 24
popq %r14
.cfi_def_cfa_offset 16
popq %r15
.cfi_def_cfa_offset 8
ret
.L12:
.cfi_restore_state
addq $1, (%rsp)
movl 20(%rsp), %edi
addl %edi, 16(%rsp)
jmp .L5
.cfi_endproc
.LFE2070:
.size _Z10create_tspii, .-_Z10create_tspii
.section .rodata.str1.8,"aMS",@progbits,1
.align 8
.LC0:
.string "TSP (%d cities - seed %d)\n "
.section .rodata.str1.1,"aMS",@progbits,1
.LC1:
.string "%3d|"
.LC2:
.string "\n"
.LC3:
.string "%2d|"
.LC4:
.string "%4d"
.text
.globl _Z9print_tspPiii
.type _Z9print_tspPiii, @function
_Z9print_tspPiii:
.LFB2071:
.cfi_startproc
endbr64
pushq %r15
.cfi_def_cfa_offset 16
.cfi_offset 15, -16
pushq %r14
.cfi_def_cfa_offset 24
.cfi_offset 14, -24
pushq %r13
.cfi_def_cfa_offset 32
.cfi_offset 13, -32
pushq %r12
.cfi_def_cfa_offset 40
.cfi_offset 12, -40
pushq %rbp
.cfi_def_cfa_offset 48
.cfi_offset 6, -48
pushq %rbx
.cfi_def_cfa_offset 56
.cfi_offset 3, -56
subq $40, %rsp
.cfi_def_cfa_offset 96
movq %rdi, 16(%rsp)
movl %esi, %ebx
movl %edx, %ecx
movl %esi, %edx
leaq .LC0(%rip), %rsi
movl $2, %edi
movl $0, %eax
call __printf_chk@PLT
testl %ebx, %ebx
jle .L14
movl $0, %r13d
leaq .LC1(%rip), %rbp
.L15:
movl %r13d, %edx
movq %rbp, %rsi
movl $2, %edi
movl $0, %eax
call __printf_chk@PLT
movl %r13d, 12(%rsp)
addl $1, %r13d
cmpl %r13d, %ebx
jne .L15
leaq .LC2(%rip), %rsi
movl $2, %edi
movl $0, %eax
call __printf_chk@PLT
movslq %r13d, %r13
leaq 0(,%r13,4), %rax
movq %rax, 24(%rsp)
movq 16(%rsp), %rcx
leaq (%rcx,%rax), %rbp
movl $0, %r15d
movl $0, %r14d
leaq .LC4(%rip), %r12
jmp .L17
.L19:
movl %eax, %r14d
.L17:
movl %r14d, %edx
leaq .LC3(%rip), %rsi
movl $2, %edi
movl $0, %eax
call __printf_chk@PLT
movq 16(%rsp), %rax
leaq (%rax,%r15,4), %rbx
.L16:
movl (%rbx), %edx
movq %r12, %rsi
movl $2, %edi
movl $0, %eax
call __printf_chk@PLT
addq $4, %rbx
cmpq %rbp, %rbx
jne .L16
leaq .LC2(%rip), %rsi
movl $2, %edi
movl $0, %eax
call __printf_chk@PLT
leal 1(%r14), %eax
addq %r13, %r15
movq 24(%rsp), %rcx
addq %rcx, %rbp
cmpl %r14d, 12(%rsp)
jne .L19
.L18:
leaq .LC2(%rip), %rsi
movl $2, %edi
movl $0, %eax
call __printf_chk@PLT
addq $40, %rsp
.cfi_remember_state
.cfi_def_cfa_offset 56
popq %rbx
.cfi_def_cfa_offset 48
popq %rbp
.cfi_def_cfa_offset 40
popq %r12
.cfi_def_cfa_offset 32
popq %r13
.cfi_def_cfa_offset 24
popq %r14
.cfi_def_cfa_offset 16
popq %r15
.cfi_def_cfa_offset 8
ret
.L14:
.cfi_restore_state
leaq .LC2(%rip), %rsi
movl $2, %edi
movl $0, %eax
call __printf_chk@PLT
jmp .L18
.cfi_endproc
.LFE2071:
.size _Z9print_tspPiii, .-_Z9print_tspPiii
.section .rodata.str1.1
.LC5:
.string "usage: %s [flags]\n"
.LC6:
.string " -h\n"
.LC7:
.string " -t <number of threads>\n"
.LC8:
.string " -c <number of cities>\n"
.LC9:
.string " -s <random seed>\n"
.text
.globl _Z5usagePc
.type _Z5usagePc, @function
_Z5usagePc:
.LFB2072:
.cfi_startproc
endbr64
pushq %rax
.cfi_def_cfa_offset 16
popq %rax
.cfi_def_cfa_offset 8
subq $8, %rsp
.cfi_def_cfa_offset 16
movq %rdi, %rcx
leaq .LC5(%rip), %rdx
movl $2, %esi
movq stderr(%rip), %rdi
movl $0, %eax
call __fprintf_chk@PLT
leaq .LC6(%rip), %rdx
movl $2, %esi
movq stderr(%rip), %rdi
movl $0, %eax
call __fprintf_chk@PLT
leaq .LC7(%rip), %rdx
movl $2, %esi
movq stderr(%rip), %rdi
movl $0, %eax
call __fprintf_chk@PLT
leaq .LC8(%rip), %rdx
movl $2, %esi
movq stderr(%rip), %rdi
movl $0, %eax
call __fprintf_chk@PLT
leaq .LC9(%rip), %rdx
movl $2, %esi
movq stderr(%rip), %rdi
movl $0, %eax
call __fprintf_chk@PLT
movl $1, %edi
call exit@PLT
.cfi_endproc
.LFE2072:
.size _Z5usagePc, .-_Z5usagePc
.globl _Z9factoriali
.type _Z9factoriali, @function
_Z9factoriali:
.LFB2073:
.cfi_startproc
endbr64
pushq %rax
.cfi_def_cfa_offset 16
popq %rax
.cfi_def_cfa_offset 8
subq $24, %rsp
.cfi_def_cfa_offset 32
movl $1, 12(%rsp)
movl 12(%rsp), %edi
call exit@PLT
.cfi_endproc
.LFE2073:
.size _Z9factoriali, .-_Z9factoriali
.globl _Z9calc_costPiS_i
.type _Z9calc_costPiS_i, @function
_Z9calc_costPiS_i:
.LFB2074:
.cfi_startproc
endbr64
pushq %rax
.cfi_def_cfa_offset 16
popq %rax
.cfi_def_cfa_offset 8
subq $24, %rsp
.cfi_def_cfa_offset 32
movl $1, 12(%rsp)
movl 12(%rsp), %edi
call exit@PLT
.cfi_endproc
.LFE2074:
.size _Z9calc_costPiS_i, .-_Z9calc_costPiS_i
.globl _Z10create_tspPiii
.type _Z10create_tspPiii, @function
_Z10create_tspPiii:
.LFB2075:
.cfi_startproc
endbr64
pushq %r15
.cfi_def_cfa_offset 16
.cfi_offset 15, -16
pushq %r14
.cfi_def_cfa_offset 24
.cfi_offset 14, -24
pushq %r13
.cfi_def_cfa_offset 32
.cfi_offset 13, -32
pushq %r12
.cfi_def_cfa_offset 40
.cfi_offset 12, -40
pushq %rbp
.cfi_def_cfa_offset 48
.cfi_offset 6, -48
pushq %rbx
.cfi_def_cfa_offset 56
.cfi_offset 3, -56
subq $40, %rsp
.cfi_def_cfa_offset 96
movq %rdi, 16(%rsp)
movl %esi, %ebx
movl %esi, 12(%rsp)
movl %edx, %edi
call srandom@PLT
testl %ebx, %ebx
jle .L30
movslq %ebx, %rax
movq %rax, 24(%rsp)
leaq 0(,%rax,4), %r15
movl $0, 8(%rsp)
movq $0, (%rsp)
movabsq $-4035224944001410015, %r14
.L32:
movq (%rsp), %rax
movl %eax, %r12d
testl %eax, %eax
js .L39
movq 16(%rsp), %rsi
movq (%rsp), %rax
leaq (%rsi,%rax,4), %rbp
movslq 8(%rsp), %rax
leaq (%rsi,%rax,4), %r13
movl $0, %ebx
.L33:
call random@PLT
movq %rax, %rcx
imulq %r14
addq %rcx, %rdx
sarq $24, %rdx
sarq $63, %rcx
subq %rcx, %rdx
movl %edx, 0(%r13,%rbx,4)
movl %edx, 0(%rbp)
addq $1, %rbx
addq %r15, %rbp
cmpl %ebx, %r12d
jge .L33
addq $1, (%rsp)
movq (%rsp), %rax
movl 12(%rsp), %esi
addl %esi, 8(%rsp)
movq 24(%rsp), %rdi
cmpq %rdi, %rax
jne .L32
.L30:
addq $40, %rsp
.cfi_remember_state
.cfi_def_cfa_offset 56
popq %rbx
.cfi_def_cfa_offset 48
popq %rbp
.cfi_def_cfa_offset 40
popq %r12
.cfi_def_cfa_offset 32
popq %r13
.cfi_def_cfa_offset 24
popq %r14
.cfi_def_cfa_offset 16
popq %r15
.cfi_def_cfa_offset 8
ret
.L39:
.cfi_restore_state
addq $1, (%rsp)
movl 12(%rsp), %edi
addl %edi, 8(%rsp)
jmp .L32
.cfi_endproc
.LFE2075:
.size _Z10create_tspPiii, .-_Z10create_tspPiii
.globl _Z9list_dumpP6list_t
.type _Z9list_dumpP6list_t, @function
_Z9list_dumpP6list_t:
.LFB2076:
.cfi_startproc
endbr64
pushq %rax
.cfi_def_cfa_offset 16
popq %rax
.cfi_def_cfa_offset 8
subq $24, %rsp
.cfi_def_cfa_offset 32
movl $1, 12(%rsp)
movl 12(%rsp), %edi
call exit@PLT
.cfi_endproc
.LFE2076:
.size _Z9list_dumpP6list_t, .-_Z9list_dumpP6list_t
.globl _Z10list_alloci
.type _Z10list_alloci, @function
_Z10list_alloci:
.LFB2077:
.cfi_startproc
endbr64
pushq %rax
.cfi_def_cfa_offset 16
popq %rax
.cfi_def_cfa_offset 8
subq $24, %rsp
.cfi_def_cfa_offset 32
movl $1, 12(%rsp)
movl 12(%rsp), %edi
call exit@PLT
.cfi_endproc
.LFE2077:
.size _Z10list_alloci, .-_Z10list_alloci
.globl _Z9list_freeP6list_t
.type _Z9list_freeP6list_t, @function
_Z9list_freeP6list_t:
.LFB2078:
.cfi_startproc
endbr64
pushq %rax
.cfi_def_cfa_offset 16
popq %rax
.cfi_def_cfa_offset 8
subq $24, %rsp
.cfi_def_cfa_offset 32
movl $1, 12(%rsp)
movl 12(%rsp), %edi
call exit@PLT
.cfi_endproc
.LFE2078:
.size _Z9list_freeP6list_t, .-_Z9list_freeP6list_t
.globl _Z8list_addP6list_ti
.type _Z8list_addP6list_ti, @function
_Z8list_addP6list_ti:
.LFB2079:
.cfi_startproc
endbr64
pushq %rax
.cfi_def_cfa_offset 16
popq %rax
.cfi_def_cfa_offset 8
subq $24, %rsp
.cfi_def_cfa_offset 32
movl $1, 12(%rsp)
movl 12(%rsp), %edi
call exit@PLT
.cfi_endproc
.LFE2079:
.size _Z8list_addP6list_ti, .-_Z8list_addP6list_ti
.globl _Z9list_sizeP6list_t
.type _Z9list_sizeP6list_t, @function
_Z9list_sizeP6list_t:
.LFB2080:
.cfi_startproc
endbr64
pushq %rax
.cfi_def_cfa_offset 16
popq %rax
.cfi_def_cfa_offset 8
subq $24, %rsp
.cfi_def_cfa_offset 32
movl $1, 12(%rsp)
movl 12(%rsp), %edi
call exit@PLT
.cfi_endproc
.LFE2080:
.size _Z9list_sizeP6list_t, .-_Z9list_sizeP6list_t
.globl _Z17_list_check_indexP6list_tm
.type _Z17_list_check_indexP6list_tm, @function
_Z17_list_check_indexP6list_tm:
.LFB2081:
.cfi_startproc
endbr64
pushq %rax
.cfi_def_cfa_offset 16
popq %rax
.cfi_def_cfa_offset 8
subq $24, %rsp
.cfi_def_cfa_offset 32
movl $1, 12(%rsp)
movl 12(%rsp), %edi
call exit@PLT
.cfi_endproc
.LFE2081:
.size _Z17_list_check_indexP6list_tm, .-_Z17_list_check_indexP6list_tm
.globl _Z8list_getP6list_tm
.type _Z8list_getP6list_tm, @function
_Z8list_getP6list_tm:
.LFB2082:
.cfi_startproc
endbr64
pushq %rax
.cfi_def_cfa_offset 16
popq %rax
.cfi_def_cfa_offset 8
subq $24, %rsp
.cfi_def_cfa_offset 32
movl $1, 12(%rsp)
movl 12(%rsp), %edi
call exit@PLT
.cfi_endproc
.LFE2082:
.size _Z8list_getP6list_tm, .-_Z8list_getP6list_tm
.globl _Z14list_remove_atP6list_ti
.type _Z14list_remove_atP6list_ti, @function
_Z14list_remove_atP6list_ti:
.LFB2083:
.cfi_startproc
endbr64
pushq %rax
.cfi_def_cfa_offset 16
popq %rax
.cfi_def_cfa_offset 8
subq $24, %rsp
.cfi_def_cfa_offset 32
movl $1, 12(%rsp)
movl 12(%rsp), %edi
call exit@PLT
.cfi_endproc
.LFE2083:
.size _Z14list_remove_atP6list_ti, .-_Z14list_remove_atP6list_ti
.globl _Z13list_as_arrayP6list_t
.type _Z13list_as_arrayP6list_t, @function
_Z13list_as_arrayP6list_t:
.LFB2084:
.cfi_startproc
endbr64
pushq %rax
.cfi_def_cfa_offset 16
popq %rax
.cfi_def_cfa_offset 8
subq $24, %rsp
.cfi_def_cfa_offset 32
movl $1, 12(%rsp)
movl 12(%rsp), %edi
call exit@PLT
.cfi_endproc
.LFE2084:
.size _Z13list_as_arrayP6list_t, .-_Z13list_as_arrayP6list_t
.globl _Z8kth_permii
.type _Z8kth_permii, @function
_Z8kth_permii:
.LFB2085:
.cfi_startproc
endbr64
pushq %rax
.cfi_def_cfa_offset 16
popq %rax
.cfi_def_cfa_offset 8
subq $24, %rsp
.cfi_def_cfa_offset 32
movl $1, 12(%rsp)
movl 12(%rsp), %edi
call exit@PLT
.cfi_endproc
.LFE2085:
.size _Z8kth_permii, .-_Z8kth_permii
.globl _Z4swapPiii
.type _Z4swapPiii, @function
_Z4swapPiii:
.LFB2086:
.cfi_startproc
endbr64
pushq %rax
.cfi_def_cfa_offset 16
popq %rax
.cfi_def_cfa_offset 8
subq $24, %rsp
.cfi_def_cfa_offset 32
movl $1, 12(%rsp)
movl 12(%rsp), %edi
call exit@PLT
.cfi_endproc
.LFE2086:
.size _Z4swapPiii, .-_Z4swapPiii
.globl _Z10print_permPii
.type _Z10print_permPii, @function
_Z10print_permPii:
.LFB2087:
.cfi_startproc
endbr64
pushq %rax
.cfi_def_cfa_offset 16
popq %rax
.cfi_def_cfa_offset 8
subq $24, %rsp
.cfi_def_cfa_offset 32
movl $1, 12(%rsp)
movl 12(%rsp), %edi
call exit@PLT
.cfi_endproc
.LFE2087:
.size _Z10print_permPii, .-_Z10print_permPii
.globl _Z9next_permPii
.type _Z9next_permPii, @function
_Z9next_permPii:
.LFB2088:
.cfi_startproc
endbr64
pushq %rax
.cfi_def_cfa_offset 16
popq %rax
.cfi_def_cfa_offset 8
subq $24, %rsp
.cfi_def_cfa_offset 32
movl $1, 12(%rsp)
movl 12(%rsp), %edi
call exit@PLT
.cfi_endproc
.LFE2088:
.size _Z9next_permPii, .-_Z9next_permPii
.globl _Z3nowv
.type _Z3nowv, @function
_Z3nowv:
.LFB2089:
.cfi_startproc
endbr64
subq $40, %rsp
.cfi_def_cfa_offset 48
movq %fs:40, %rax
movq %rax, 24(%rsp)
xorl %eax, %eax
movq %rsp, %rsi
movl $0, %edi
call clock_gettime@PLT
pxor %xmm0, %xmm0
cvtsi2sdq 8(%rsp), %xmm0
divsd .LC10(%rip), %xmm0
pxor %xmm1, %xmm1
cvtsi2sdq (%rsp), %xmm1
addsd %xmm1, %xmm0
movq 24(%rsp), %rax
subq %fs:40, %rax
jne .L69
addq $40, %rsp
.cfi_remember_state
.cfi_def_cfa_offset 8
ret
.L69:
.cfi_restore_state
call __stack_chk_fail@PLT
.cfi_endproc
.LFE2089:
.size _Z3nowv, .-_Z3nowv
.globl _Z35__device_stub__Z11perm_kernelPiS_iiPiS_ii
.type _Z35__device_stub__Z11perm_kernelPiS_iiPiS_ii, @function
_Z35__device_stub__Z11perm_kernelPiS_iiPiS_ii:
.LFB2115:
.cfi_startproc
endbr64
subq $152, %rsp
.cfi_def_cfa_offset 160
movq %rdi, 24(%rsp)
movq %rsi, 16(%rsp)
movl %edx, 12(%rsp)
movl %ecx, 8(%rsp)
movq %fs:40, %rax
movq %rax, 136(%rsp)
xorl %eax, %eax
leaq 24(%rsp), %rax
movq %rax, 96(%rsp)
leaq 16(%rsp), %rax
movq %rax, 104(%rsp)
leaq 12(%rsp), %rax
movq %rax, 112(%rsp)
leaq 8(%rsp), %rax
movq %rax, 120(%rsp)
movl $1, 48(%rsp)
movl $1, 52(%rsp)
movl $1, 56(%rsp)
movl $1, 60(%rsp)
movl $1, 64(%rsp)
movl $1, 68(%rsp)
leaq 40(%rsp), %rcx
leaq 32(%rsp), %rdx
leaq 60(%rsp), %rsi
leaq 48(%rsp), %rdi
call __cudaPopCallConfiguration@PLT
testl %eax, %eax
je .L74
.L70:
movq 136(%rsp), %rax
subq %fs:40, %rax
jne .L75
addq $152, %rsp
.cfi_remember_state
.cfi_def_cfa_offset 8
ret
.L74:
.cfi_restore_state
pushq 40(%rsp)
.cfi_def_cfa_offset 168
pushq 40(%rsp)
.cfi_def_cfa_offset 176
leaq 112(%rsp), %r9
movq 76(%rsp), %rcx
movl 84(%rsp), %r8d
movq 64(%rsp), %rsi
movl 72(%rsp), %edx
leaq _Z11perm_kernelPiS_ii(%rip), %rdi
call cudaLaunchKernel@PLT
addq $16, %rsp
.cfi_def_cfa_offset 160
jmp .L70
.L75:
call __stack_chk_fail@PLT
.cfi_endproc
.LFE2115:
.size _Z35__device_stub__Z11perm_kernelPiS_iiPiS_ii, .-_Z35__device_stub__Z11perm_kernelPiS_iiPiS_ii
.globl _Z11perm_kernelPiS_ii
.type _Z11perm_kernelPiS_ii, @function
_Z11perm_kernelPiS_ii:
.LFB2116:
.cfi_startproc
endbr64
subq $8, %rsp
.cfi_def_cfa_offset 16
call _Z35__device_stub__Z11perm_kernelPiS_iiPiS_ii
addq $8, %rsp
.cfi_def_cfa_offset 8
ret
.cfi_endproc
.LFE2116:
.size _Z11perm_kernelPiS_ii, .-_Z11perm_kernelPiS_ii
.section .rodata.str1.1
.LC11:
.string "t:c:hs:"
.LC12:
.string "Ouchie:\n%s\n"
.LC13:
.string "Shortest %d\n"
.LC14:
.string "Blocks per grid:%d\n"
.LC15:
.string "Threads per block:%d\n"
.LC16:
.string "Num cities:%d\n"
.LC17:
.string "Num threads:%d\n"
.LC18:
.string "Took %5.3f seconds\n\n"
.text
.globl main
.type main, @function
main:
.LFB2090:
.cfi_startproc
endbr64
pushq %r15
.cfi_def_cfa_offset 16
.cfi_offset 15, -16
pushq %r14
.cfi_def_cfa_offset 24
.cfi_offset 14, -24
pushq %r13
.cfi_def_cfa_offset 32
.cfi_offset 13, -32
pushq %r12
.cfi_def_cfa_offset 40
.cfi_offset 12, -40
pushq %rbp
.cfi_def_cfa_offset 48
.cfi_offset 6, -48
pushq %rbx
.cfi_def_cfa_offset 56
.cfi_offset 3, -56
subq $88, %rsp
.cfi_def_cfa_offset 144
movl %edi, %r13d
movq %rsi, %r12
movq %fs:40, %rax
movq %rax, 72(%rsp)
xorl %eax, %eax
movl $5, %ebx
movl $42, %r15d
movl $3, %ebp
leaq .LC11(%rip), %r14
jmp .L79
.L80:
movl $10, %edx
movl $0, %esi
movq optarg(%rip), %rdi
call __isoc23_strtol@PLT
movl %eax, %r15d
.L79:
movq %r14, %rdx
movq %r12, %rsi
movl %r13d, %edi
call getopt@PLT
cmpl $-1, %eax
je .L100
cmpl $115, %eax
je .L80
cmpl $116, %eax
je .L81
cmpl $99, %eax
jne .L82
movl $10, %edx
movl $0, %esi
movq optarg(%rip), %rdi
call __isoc23_strtol@PLT
movl %eax, %ebp
jmp .L79
.L81:
movl $10, %edx
movl $0, %esi
movq optarg(%rip), %rdi
call __isoc23_strtol@PLT
movl %eax, %ebx
jmp .L79
.L82:
movq 72(%rsp), %rax
subq %fs:40, %rax
jne .L101
movq (%r12), %rdi
call _Z5usagePc
.L101:
call __stack_chk_fail@PLT
.L100:
call _Z3nowv
movsd %xmm0, 8(%rsp)
movslq %ebx, %rax
movq %rax, 24(%rsp)
leal 0(,%rbx,4), %r13d
movslq %r13d, %r13
movq %r13, %rdi
call malloc@PLT
movq %rax, %r14
movl %ebp, %r12d
imull %ebp, %r12d
sall $2, %r12d
movslq %r12d, %r12
movq %r12, %rdi
call malloc@PLT
movq %rax, 16(%rsp)
leaq 32(%rsp), %rdi
movq %r13, %rsi
call cudaMalloc@PLT
leaq 40(%rsp), %rdi
movq %r12, %rsi
call cudaMalloc@PLT
movl %r15d, %edx
movl %ebp, %esi
movq 16(%rsp), %r15
movq %r15, %rdi
call _Z10create_tspPiii
movl $1, %ecx
movq %r12, %rdx
movq %r15, %rsi
movq 40(%rsp), %rdi
call cudaMemcpy@PLT
testl %ebx, %ebx
jle .L94
movl %ebx, %r12d
movl $1, %ecx
movl $1024, %esi
cmpl %esi, %ebx
cmovle %ebx, %esi
jmp .L88
.L87:
addl %ecx, %ecx
cmpl %ecx, %esi
jl .L86
.L88:
cmpl %ecx, %ebx
jle .L87
movl %ebx, %eax
cltd
idivl %ecx
testl %edx, %edx
cmove %ecx, %r12d
jmp .L87
.L94:
movl %ebx, %r12d
.L86:
movl %ebx, %eax
cltd
idivl %r12d
movl %eax, %r15d
movl %r12d, 60(%rsp)
movl $1, 64(%rsp)
movl %eax, 48(%rsp)
movl $1, 52(%rsp)
movl $0, %r9d
movl $0, %r8d
movq 60(%rsp), %rdx
movl $1, %ecx
movq 48(%rsp), %rdi
movl $1, %esi
call __cudaPushCallConfiguration@PLT
testl %eax, %eax
je .L102
.L89:
movl $2, %ecx
movq %r13, %rdx
movq 32(%rsp), %rsi
movq %r14, %rdi
call cudaMemcpy@PLT
testl %eax, %eax
jne .L103
.L90:
testl %ebx, %ebx
jle .L96
movq %r14, %rax
movq 24(%rsp), %rcx
leaq (%r14,%rcx,4), %rcx
movl $2147483647, %r13d
.L92:
movl (%rax), %edx
cmpl %edx, %r13d
cmovg %edx, %r13d
addq $4, %rax
cmpq %rcx, %rax
jne .L92
.L91:
call _Z3nowv
movsd %xmm0, 16(%rsp)
movl %r13d, %edx
leaq .LC13(%rip), %rsi
movl $2, %edi
movl $0, %eax
call __printf_chk@PLT
movl %r15d, %edx
leaq .LC14(%rip), %rsi
movl $2, %edi
movl $0, %eax
call __printf_chk@PLT
movl %r12d, %edx
leaq .LC15(%rip), %rsi
movl $2, %edi
movl $0, %eax
call __printf_chk@PLT
movl %ebp, %edx
leaq .LC16(%rip), %rsi
movl $2, %edi
movl $0, %eax
call __printf_chk@PLT
movl %ebx, %edx
leaq .LC17(%rip), %rsi
movl $2, %edi
movl $0, %eax
call __printf_chk@PLT
movsd 16(%rsp), %xmm0
subsd 8(%rsp), %xmm0
leaq .LC18(%rip), %rsi
movl $2, %edi
movl $1, %eax
call __printf_chk@PLT
movq 72(%rsp), %rax
subq %fs:40, %rax
jne .L104
movl $0, %eax
addq $88, %rsp
.cfi_remember_state
.cfi_def_cfa_offset 56
popq %rbx
.cfi_def_cfa_offset 48
popq %rbp
.cfi_def_cfa_offset 40
popq %r12
.cfi_def_cfa_offset 32
popq %r13
.cfi_def_cfa_offset 24
popq %r14
.cfi_def_cfa_offset 16
popq %r15
.cfi_def_cfa_offset 8
ret
.L102:
.cfi_restore_state
movl %ebx, %ecx
movl %ebp, %edx
movq 32(%rsp), %rsi
movq 40(%rsp), %rdi
call _Z35__device_stub__Z11perm_kernelPiS_iiPiS_ii
jmp .L89
.L103:
movl %eax, %edi
call cudaGetErrorString@PLT
movq %rax, %rdx
leaq .LC12(%rip), %rsi
movl $2, %edi
movl $0, %eax
call __printf_chk@PLT
jmp .L90
.L96:
movl $2147483647, %r13d
jmp .L91
.L104:
call __stack_chk_fail@PLT
.cfi_endproc
.LFE2090:
.size main, .-main
.section .rodata.str1.1
.LC19:
.string "_Z11perm_kernelPiS_ii"
.text
.type _ZL24__sti____cudaRegisterAllv, @function
_ZL24__sti____cudaRegisterAllv:
.LFB2118:
.cfi_startproc
endbr64
subq $8, %rsp
.cfi_def_cfa_offset 16
leaq _ZL15__fatDeviceText(%rip), %rdi
call __cudaRegisterFatBinary@PLT
movq %rax, %rdi
movq %rax, _ZL20__cudaFatCubinHandle(%rip)
pushq $0
.cfi_def_cfa_offset 24
pushq $0
.cfi_def_cfa_offset 32
pushq $0
.cfi_def_cfa_offset 40
pushq $0
.cfi_def_cfa_offset 48
movl $0, %r9d
movl $-1, %r8d
leaq .LC19(%rip), %rdx
movq %rdx, %rcx
leaq _Z11perm_kernelPiS_ii(%rip), %rsi
call __cudaRegisterFunction@PLT
addq $32, %rsp
.cfi_def_cfa_offset 16
movq _ZL20__cudaFatCubinHandle(%rip), %rdi
call __cudaRegisterFatBinaryEnd@PLT
leaq _ZL26__cudaUnregisterBinaryUtilv(%rip), %rdi
call atexit@PLT
addq $8, %rsp
.cfi_def_cfa_offset 8
ret
.cfi_endproc
.LFE2118:
.size _ZL24__sti____cudaRegisterAllv, .-_ZL24__sti____cudaRegisterAllv
.section .init_array,"aw"
.align 8
.quad _ZL24__sti____cudaRegisterAllv
.section .nvFatBinSegment,"aw"
.align 8
.type _ZL15__fatDeviceText, @object
.size _ZL15__fatDeviceText, 24
_ZL15__fatDeviceText:
.long 1180844977
.long 1
.quad fatbinData
.quad 0
.local _ZL20__cudaFatCubinHandle
.comm _ZL20__cudaFatCubinHandle,8,8
.section .rodata.cst8,"aM",@progbits,8
.align 8
.LC10:
.long 0
.long 1104006501
.ident "GCC: (Ubuntu 13.3.0-6ubuntu2~24.04) 13.3.0"
.section .note.GNU-stack,"",@progbits
.section .note.gnu.property,"a"
.align 8
.long 1f - 0f
.long 4f - 1f
.long 5
0:
.string "GNU"
1:
.align 8
.long 0xc0000002
.long 3f - 2f
2:
.long 0x3
3:
.align 8
4: | .text
.file "tsp-parallel.hip"
.globl _Z10create_tspii # -- Begin function _Z10create_tspii
.p2align 4, 0x90
.type _Z10create_tspii,@function
_Z10create_tspii: # @_Z10create_tspii
.cfi_startproc
# %bb.0:
pushq %rbp
.cfi_def_cfa_offset 16
pushq %r15
.cfi_def_cfa_offset 24
pushq %r14
.cfi_def_cfa_offset 32
pushq %r13
.cfi_def_cfa_offset 40
pushq %r12
.cfi_def_cfa_offset 48
pushq %rbx
.cfi_def_cfa_offset 56
subq $40, %rsp
.cfi_def_cfa_offset 96
.cfi_offset %rbx, -56
.cfi_offset %r12, -48
.cfi_offset %r13, -40
.cfi_offset %r14, -32
.cfi_offset %r15, -24
.cfi_offset %rbp, -16
movl %esi, %r14d
movl %edi, %ebp
imull %edi, %edi
shlq $2, %rdi
callq malloc
movq %rax, 8(%rsp) # 8-byte Spill
movl %r14d, %edi
callq srandom
testl %ebp, %ebp
jle .LBB0_5
# %bb.1: # %.preheader.preheader
movl %ebp, %eax
movq %rax, 16(%rsp) # 8-byte Spill
leaq (,%rax,4), %r15
movl $1, %r12d
xorl %ecx, %ecx
movabsq $-4035224944001410015, %rbp # imm = 0xC800004B00001C21
movq 8(%rsp), %r14 # 8-byte Reload
movq %r14, %rbx
.p2align 4, 0x90
.LBB0_2: # %.preheader
# =>This Loop Header: Depth=1
# Child Loop BB0_3 Depth 2
movq %rcx, 32(%rsp) # 8-byte Spill
movq %r14, 24(%rsp) # 8-byte Spill
xorl %r13d, %r13d
.p2align 4, 0x90
.LBB0_3: # Parent Loop BB0_2 Depth=1
# => This Inner Loop Header: Depth=2
callq random
movq %rax, %rcx
imulq %rbp
addq %rcx, %rdx
movq %rdx, %rax
shrq $63, %rax
shrq $24, %rdx
addl %eax, %edx
movl %edx, (%rbx,%r13,4)
movl %edx, (%r14)
incq %r13
addq %r15, %r14
cmpq %r13, %r12
jne .LBB0_3
# %bb.4: # in Loop: Header=BB0_2 Depth=1
movq 32(%rsp), %rcx # 8-byte Reload
incq %rcx
incq %r12
movq 24(%rsp), %r14 # 8-byte Reload
addq $4, %r14
addq %r15, %rbx
cmpq 16(%rsp), %rcx # 8-byte Folded Reload
jne .LBB0_2
.LBB0_5: # %._crit_edge
movq 8(%rsp), %rax # 8-byte Reload
addq $40, %rsp
.cfi_def_cfa_offset 56
popq %rbx
.cfi_def_cfa_offset 48
popq %r12
.cfi_def_cfa_offset 40
popq %r13
.cfi_def_cfa_offset 32
popq %r14
.cfi_def_cfa_offset 24
popq %r15
.cfi_def_cfa_offset 16
popq %rbp
.cfi_def_cfa_offset 8
retq
.Lfunc_end0:
.size _Z10create_tspii, .Lfunc_end0-_Z10create_tspii
.cfi_endproc
# -- End function
.globl _Z9print_tspPiii # -- Begin function _Z9print_tspPiii
.p2align 4, 0x90
.type _Z9print_tspPiii,@function
_Z9print_tspPiii: # @_Z9print_tspPiii
.cfi_startproc
# %bb.0:
pushq %rbp
.cfi_def_cfa_offset 16
pushq %r15
.cfi_def_cfa_offset 24
pushq %r14
.cfi_def_cfa_offset 32
pushq %r13
.cfi_def_cfa_offset 40
pushq %r12
.cfi_def_cfa_offset 48
pushq %rbx
.cfi_def_cfa_offset 56
pushq %rax
.cfi_def_cfa_offset 64
.cfi_offset %rbx, -56
.cfi_offset %r12, -48
.cfi_offset %r13, -40
.cfi_offset %r14, -32
.cfi_offset %r15, -24
.cfi_offset %rbp, -16
movl %esi, %ebp
movq %rdi, %rbx
movl $.L.str, %edi
xorl %eax, %eax
callq printf
testl %ebp, %ebp
jle .LBB1_3
# %bb.1: # %.lr.ph.preheader
xorl %r14d, %r14d
.p2align 4, 0x90
.LBB1_2: # %.lr.ph
# =>This Inner Loop Header: Depth=1
movl $.L.str.1, %edi
movl %r14d, %esi
xorl %eax, %eax
callq printf
incl %r14d
cmpl %r14d, %ebp
jne .LBB1_2
.LBB1_3: # %._crit_edge
movl $10, %edi
callq putchar@PLT
testl %ebp, %ebp
jle .LBB1_8
# %bb.4: # %.lr.ph28
movl %ebp, %r15d
leaq (,%r15,4), %r12
xorl %r14d, %r14d
.p2align 4, 0x90
.LBB1_5: # %.lr.ph24
# =>This Loop Header: Depth=1
# Child Loop BB1_6 Depth 2
movl $.L.str.3, %edi
movl %r14d, %esi
xorl %eax, %eax
callq printf
xorl %r13d, %r13d
.p2align 4, 0x90
.LBB1_6: # Parent Loop BB1_5 Depth=1
# => This Inner Loop Header: Depth=2
movl (%rbx,%r13,4), %esi
movl $.L.str.4, %edi
xorl %eax, %eax
callq printf
incq %r13
cmpq %r13, %r15
jne .LBB1_6
# %bb.7: # %._crit_edge25
# in Loop: Header=BB1_5 Depth=1
movl $10, %edi
callq putchar@PLT
incq %r14
addq %r12, %rbx
cmpq %r15, %r14
jne .LBB1_5
.LBB1_8: # %._crit_edge29
movl $10, %edi
addq $8, %rsp
.cfi_def_cfa_offset 56
popq %rbx
.cfi_def_cfa_offset 48
popq %r12
.cfi_def_cfa_offset 40
popq %r13
.cfi_def_cfa_offset 32
popq %r14
.cfi_def_cfa_offset 24
popq %r15
.cfi_def_cfa_offset 16
popq %rbp
.cfi_def_cfa_offset 8
jmp putchar@PLT # TAILCALL
.Lfunc_end1:
.size _Z9print_tspPiii, .Lfunc_end1-_Z9print_tspPiii
.cfi_endproc
# -- End function
.globl _Z5usagePc # -- Begin function _Z5usagePc
.p2align 4, 0x90
.type _Z5usagePc,@function
_Z5usagePc: # @_Z5usagePc
.cfi_startproc
# %bb.0:
pushq %rax
.cfi_def_cfa_offset 16
movq %rdi, %rdx
movq stderr(%rip), %rdi
movl $.L.str.5, %esi
xorl %eax, %eax
callq fprintf
movq stderr(%rip), %rcx
movl $.L.str.6, %edi
movl $6, %esi
movl $1, %edx
callq fwrite@PLT
movq stderr(%rip), %rcx
movl $.L.str.7, %edi
movl $26, %esi
movl $1, %edx
callq fwrite@PLT
movq stderr(%rip), %rcx
movl $.L.str.8, %edi
movl $25, %esi
movl $1, %edx
callq fwrite@PLT
movq stderr(%rip), %rcx
movl $.L.str.9, %edi
movl $20, %esi
movl $1, %edx
callq fwrite@PLT
movl $1, %edi
callq exit
.Lfunc_end2:
.size _Z5usagePc, .Lfunc_end2-_Z5usagePc
.cfi_endproc
# -- End function
.globl _Z10create_tspPiii # -- Begin function _Z10create_tspPiii
.p2align 4, 0x90
.type _Z10create_tspPiii,@function
_Z10create_tspPiii: # @_Z10create_tspPiii
.cfi_startproc
# %bb.0:
pushq %rbp
.cfi_def_cfa_offset 16
pushq %r15
.cfi_def_cfa_offset 24
pushq %r14
.cfi_def_cfa_offset 32
pushq %r13
.cfi_def_cfa_offset 40
pushq %r12
.cfi_def_cfa_offset 48
pushq %rbx
.cfi_def_cfa_offset 56
subq $24, %rsp
.cfi_def_cfa_offset 80
.cfi_offset %rbx, -56
.cfi_offset %r12, -48
.cfi_offset %r13, -40
.cfi_offset %r14, -32
.cfi_offset %r15, -24
.cfi_offset %rbp, -16
movl %esi, %ebp
movq %rdi, %rbx
movl %edx, %edi
callq srandom
testl %ebp, %ebp
jle .LBB3_5
# %bb.1: # %.preheader.preheader
movl %ebp, %eax
movq %rax, (%rsp) # 8-byte Spill
leaq (,%rax,4), %r15
movl $1, %r12d
xorl %eax, %eax
movabsq $-4035224944001410015, %rbp # imm = 0xC800004B00001C21
movq %rbx, %r14
.p2align 4, 0x90
.LBB3_2: # %.preheader
# =>This Loop Header: Depth=1
# Child Loop BB3_3 Depth 2
movq %rax, 16(%rsp) # 8-byte Spill
movq %r14, 8(%rsp) # 8-byte Spill
xorl %r13d, %r13d
.p2align 4, 0x90
.LBB3_3: # Parent Loop BB3_2 Depth=1
# => This Inner Loop Header: Depth=2
callq random
movq %rax, %rcx
imulq %rbp
addq %rcx, %rdx
movq %rdx, %rax
shrq $63, %rax
shrq $24, %rdx
addl %eax, %edx
movl %edx, (%rbx,%r13,4)
movl %edx, (%r14)
incq %r13
addq %r15, %r14
cmpq %r13, %r12
jne .LBB3_3
# %bb.4: # in Loop: Header=BB3_2 Depth=1
movq 16(%rsp), %rax # 8-byte Reload
incq %rax
incq %r12
movq 8(%rsp), %r14 # 8-byte Reload
addq $4, %r14
addq %r15, %rbx
cmpq (%rsp), %rax # 8-byte Folded Reload
jne .LBB3_2
.LBB3_5: # %._crit_edge
addq $24, %rsp
.cfi_def_cfa_offset 56
popq %rbx
.cfi_def_cfa_offset 48
popq %r12
.cfi_def_cfa_offset 40
popq %r13
.cfi_def_cfa_offset 32
popq %r14
.cfi_def_cfa_offset 24
popq %r15
.cfi_def_cfa_offset 16
popq %rbp
.cfi_def_cfa_offset 8
retq
.Lfunc_end3:
.size _Z10create_tspPiii, .Lfunc_end3-_Z10create_tspPiii
.cfi_endproc
# -- End function
.globl _Z26__device_stub__perm_kernelPiS_ii # -- Begin function _Z26__device_stub__perm_kernelPiS_ii
.p2align 4, 0x90
.type _Z26__device_stub__perm_kernelPiS_ii,@function
_Z26__device_stub__perm_kernelPiS_ii: # @_Z26__device_stub__perm_kernelPiS_ii
.cfi_startproc
# %bb.0:
subq $120, %rsp
.cfi_def_cfa_offset 128
movq %rdi, 72(%rsp)
movq %rsi, 64(%rsp)
movl %edx, 12(%rsp)
movl %ecx, 8(%rsp)
leaq 72(%rsp), %rax
movq %rax, 80(%rsp)
leaq 64(%rsp), %rax
movq %rax, 88(%rsp)
leaq 12(%rsp), %rax
movq %rax, 96(%rsp)
leaq 8(%rsp), %rax
movq %rax, 104(%rsp)
leaq 48(%rsp), %rdi
leaq 32(%rsp), %rsi
leaq 24(%rsp), %rdx
leaq 16(%rsp), %rcx
callq __hipPopCallConfiguration
movq 48(%rsp), %rsi
movl 56(%rsp), %edx
movq 32(%rsp), %rcx
movl 40(%rsp), %r8d
leaq 80(%rsp), %r9
movl $_Z11perm_kernelPiS_ii, %edi
pushq 16(%rsp)
.cfi_adjust_cfa_offset 8
pushq 32(%rsp)
.cfi_adjust_cfa_offset 8
callq hipLaunchKernel
addq $136, %rsp
.cfi_adjust_cfa_offset -136
retq
.Lfunc_end4:
.size _Z26__device_stub__perm_kernelPiS_ii, .Lfunc_end4-_Z26__device_stub__perm_kernelPiS_ii
.cfi_endproc
# -- End function
.section .rodata.cst8,"aM",@progbits,8
.p2align 3, 0x0 # -- Begin function _Z3nowv
.LCPI5_0:
.quad 0x41cdcd6500000000 # double 1.0E+9
.text
.globl _Z3nowv
.p2align 4, 0x90
.type _Z3nowv,@function
_Z3nowv: # @_Z3nowv
.cfi_startproc
# %bb.0:
subq $24, %rsp
.cfi_def_cfa_offset 32
leaq 8(%rsp), %rsi
xorl %edi, %edi
callq clock_gettime
cvtsi2sdq 8(%rsp), %xmm1
cvtsi2sdq 16(%rsp), %xmm0
divsd .LCPI5_0(%rip), %xmm0
addsd %xmm1, %xmm0
addq $24, %rsp
.cfi_def_cfa_offset 8
retq
.Lfunc_end5:
.size _Z3nowv, .Lfunc_end5-_Z3nowv
.cfi_endproc
# -- End function
.section .rodata.cst8,"aM",@progbits,8
.p2align 3, 0x0 # -- Begin function main
.LCPI6_0:
.quad 0x41cdcd6500000000 # double 1.0E+9
.text
.globl main
.p2align 4, 0x90
.type main,@function
main: # @main
.cfi_startproc
# %bb.0:
pushq %rbp
.cfi_def_cfa_offset 16
pushq %r15
.cfi_def_cfa_offset 24
pushq %r14
.cfi_def_cfa_offset 32
pushq %r13
.cfi_def_cfa_offset 40
pushq %r12
.cfi_def_cfa_offset 48
pushq %rbx
.cfi_def_cfa_offset 56
subq $216, %rsp
.cfi_def_cfa_offset 272
.cfi_offset %rbx, -56
.cfi_offset %r12, -48
.cfi_offset %r13, -40
.cfi_offset %r14, -32
.cfi_offset %r15, -24
.cfi_offset %rbp, -16
movq %rsi, %r15
movl %edi, %ebp
movl $3, %r14d
movl $42, %r13d
movl $5, %r12d
jmp .LBB6_1
.p2align 4, 0x90
.LBB6_6: # in Loop: Header=BB6_1 Depth=1
movq optarg(%rip), %rdi
xorl %esi, %esi
movl $10, %edx
callq __isoc23_strtol
movq %rax, %r14
.LBB6_1: # =>This Inner Loop Header: Depth=1
movl $.L.str.10, %edx
movl %ebp, %edi
movq %r15, %rsi
callq getopt
cmpl $99, %eax
je .LBB6_6
# %bb.2: # in Loop: Header=BB6_1 Depth=1
cmpl $-1, %eax
je .LBB6_9
# %bb.3: # in Loop: Header=BB6_1 Depth=1
cmpl $115, %eax
je .LBB6_7
# %bb.4: # in Loop: Header=BB6_1 Depth=1
cmpl $116, %eax
jne .LBB6_8
# %bb.5: # in Loop: Header=BB6_1 Depth=1
movq optarg(%rip), %rdi
xorl %esi, %esi
movl $10, %edx
callq __isoc23_strtol
movq %rax, %r12
jmp .LBB6_1
.LBB6_7: # in Loop: Header=BB6_1 Depth=1
movq optarg(%rip), %rdi
xorl %esi, %esi
movl $10, %edx
callq __isoc23_strtol
movq %rax, %r13
jmp .LBB6_1
.LBB6_9:
leaq 64(%rsp), %rsi
xorl %edi, %edi
callq clock_gettime
movq 64(%rsp), %rax
movq %rax, 128(%rsp) # 8-byte Spill
movq 72(%rsp), %rax
movq %rax, 120(%rsp) # 8-byte Spill
movl %r14d, %ebx
imull %r14d, %ebx
shll $2, %ebx
movq %r12, 40(%rsp) # 8-byte Spill
leal (,%r12,4), %eax
movslq %eax, %r15
movq %r15, %rdi
callq malloc
movq %rax, 112(%rsp) # 8-byte Spill
movslq %ebx, %rbx
movq %rbx, %rdi
callq malloc
movq %rax, 24(%rsp) # 8-byte Spill
leaq 56(%rsp), %rdi
movq %r15, 104(%rsp) # 8-byte Spill
movq %r15, %rsi
callq hipMalloc
leaq 48(%rsp), %rdi
movq %rbx, 96(%rsp) # 8-byte Spill
movq %rbx, %rsi
callq hipMalloc
movl %r13d, %edi
callq srandom
movq %r14, 32(%rsp) # 8-byte Spill
testl %r14d, %r14d
jle .LBB6_14
# %bb.10: # %.preheader.preheader.i
movl 32(%rsp), %eax # 4-byte Reload
movq %rax, 136(%rsp) # 8-byte Spill
leaq (,%rax,4), %r12
movl $1, %ebp
xorl %ecx, %ecx
movabsq $-4035224944001410015, %rbx # imm = 0xC800004B00001C21
movq 24(%rsp), %r13 # 8-byte Reload
movq %r13, %r14
.p2align 4, 0x90
.LBB6_11: # %.preheader.i
# =>This Loop Header: Depth=1
# Child Loop BB6_12 Depth 2
movq %rcx, 8(%rsp) # 8-byte Spill
movq %r13, 144(%rsp) # 8-byte Spill
xorl %r15d, %r15d
.p2align 4, 0x90
.LBB6_12: # Parent Loop BB6_11 Depth=1
# => This Inner Loop Header: Depth=2
callq random
movq %rax, %rcx
imulq %rbx
addq %rcx, %rdx
movq %rdx, %rax
shrq $63, %rax
shrq $24, %rdx
addl %eax, %edx
movl %edx, (%r14,%r15,4)
movl %edx, (%r13)
incq %r15
addq %r12, %r13
cmpq %r15, %rbp
jne .LBB6_12
# %bb.13: # in Loop: Header=BB6_11 Depth=1
movq 8(%rsp), %rcx # 8-byte Reload
incq %rcx
incq %rbp
movq 144(%rsp), %r13 # 8-byte Reload
addq $4, %r13
addq %r12, %r14
cmpq 136(%rsp), %rcx # 8-byte Folded Reload
jne .LBB6_11
.LBB6_14: # %_Z10create_tspPiii.exit
movq 48(%rsp), %rdi
movl $1, %ebx
movq 24(%rsp), %rsi # 8-byte Reload
movq 96(%rsp), %rdx # 8-byte Reload
movl $1, %ecx
callq hipMemcpy
movq 40(%rsp), %r15 # 8-byte Reload
movl %r15d, %ebp
testl %r15d, %r15d
movq 32(%rsp), %r14 # 8-byte Reload
jle .LBB6_18
# %bb.15: # %.lr.ph.preheader
movl %r15d, %ebp
.p2align 4, 0x90
.LBB6_16: # %.lr.ph
# =>This Inner Loop Header: Depth=1
movl %ebp, %eax
leal 2147483647(%rbx), %ecx
testl %r15d, %ecx
cmovel %ebx, %ebp
cmpl %r15d, %ebx
cmovgel %eax, %ebp
cmpl $512, %ebx # imm = 0x200
ja .LBB6_18
# %bb.17: # %.lr.ph
# in Loop: Header=BB6_16 Depth=1
addl %ebx, %ebx
cmpl %r15d, %ebx
jle .LBB6_16
.LBB6_18: # %._crit_edge
movl %r15d, %eax
cltd
idivl %ebp
movl %eax, %r13d
movabsq $4294967296, %rax # imm = 0x100000000
leaq (%rax,%r13), %rdi
movl %ebp, %edx
orq %rax, %rdx
movl $1, %esi
movl $1, %ecx
xorl %r8d, %r8d
xorl %r9d, %r9d
callq __hipPushCallConfiguration
testl %eax, %eax
jne .LBB6_20
# %bb.19:
movq 48(%rsp), %rax
movq 56(%rsp), %rcx
movq %rax, 208(%rsp)
movq %rcx, 200(%rsp)
movl %r14d, 20(%rsp)
movl %r15d, 16(%rsp)
leaq 208(%rsp), %rax
movq %rax, 64(%rsp)
leaq 200(%rsp), %rax
movq %rax, 72(%rsp)
leaq 20(%rsp), %rax
movq %rax, 80(%rsp)
leaq 16(%rsp), %rax
movq %rax, 88(%rsp)
leaq 184(%rsp), %rdi
leaq 168(%rsp), %rsi
leaq 160(%rsp), %rdx
leaq 152(%rsp), %rcx
callq __hipPopCallConfiguration
movq 184(%rsp), %rsi
movl 192(%rsp), %edx
movq 168(%rsp), %rcx
movl 176(%rsp), %r8d
leaq 64(%rsp), %r9
movl $_Z11perm_kernelPiS_ii, %edi
pushq 152(%rsp)
.cfi_adjust_cfa_offset 8
pushq 168(%rsp)
.cfi_adjust_cfa_offset 8
callq hipLaunchKernel
addq $16, %rsp
.cfi_adjust_cfa_offset -16
.LBB6_20:
movq 56(%rsp), %rsi
movq 112(%rsp), %rbx # 8-byte Reload
movq %rbx, %rdi
movq 104(%rsp), %rdx # 8-byte Reload
movl $2, %ecx
callq hipMemcpy
testl %eax, %eax
je .LBB6_22
# %bb.21:
movl %eax, %edi
callq hipGetErrorString
movl $.L.str.11, %edi
movq %rax, %rsi
xorl %eax, %eax
callq printf
.LBB6_22:
testl %r15d, %r15d
jle .LBB6_23
# %bb.25: # %.lr.ph80.preheader
movl %r15d, %eax
movl $2147483647, %r12d # imm = 0x7FFFFFFF
xorl %ecx, %ecx
.p2align 4, 0x90
.LBB6_26: # %.lr.ph80
# =>This Inner Loop Header: Depth=1
movl (%rbx,%rcx,4), %edx
cmpl %r12d, %edx
cmovll %edx, %r12d
incq %rcx
cmpq %rcx, %rax
jne .LBB6_26
jmp .LBB6_24
.LBB6_23:
movl $2147483647, %r12d # imm = 0x7FFFFFFF
.LBB6_24: # %._crit_edge81
cvtsi2sdq 120(%rsp), %xmm0 # 8-byte Folded Reload
divsd .LCPI6_0(%rip), %xmm0
cvtsi2sdq 128(%rsp), %xmm1 # 8-byte Folded Reload
addsd %xmm0, %xmm1
movsd %xmm1, 8(%rsp) # 8-byte Spill
leaq 64(%rsp), %rsi
xorl %edi, %edi
callq clock_gettime
xorps %xmm0, %xmm0
cvtsi2sdq 64(%rsp), %xmm0
xorps %xmm1, %xmm1
cvtsi2sdq 72(%rsp), %xmm1
divsd .LCPI6_0(%rip), %xmm1
addsd %xmm0, %xmm1
subsd 8(%rsp), %xmm1 # 8-byte Folded Reload
movsd %xmm1, 8(%rsp) # 8-byte Spill
movl $.L.str.12, %edi
movl %r12d, %esi
xorl %eax, %eax
callq printf
movl $.L.str.13, %edi
movl %r13d, %esi
xorl %eax, %eax
callq printf
movl $.L.str.14, %edi
movl %ebp, %esi
xorl %eax, %eax
callq printf
movl $.L.str.15, %edi
movl %r14d, %esi
xorl %eax, %eax
callq printf
movl $.L.str.16, %edi
movq 40(%rsp), %rsi # 8-byte Reload
# kill: def $esi killed $esi killed $rsi
xorl %eax, %eax
callq printf
movl $.L.str.17, %edi
movsd 8(%rsp), %xmm0 # 8-byte Reload
# xmm0 = mem[0],zero
movb $1, %al
callq printf
xorl %eax, %eax
addq $216, %rsp
.cfi_def_cfa_offset 56
popq %rbx
.cfi_def_cfa_offset 48
popq %r12
.cfi_def_cfa_offset 40
popq %r13
.cfi_def_cfa_offset 32
popq %r14
.cfi_def_cfa_offset 24
popq %r15
.cfi_def_cfa_offset 16
popq %rbp
.cfi_def_cfa_offset 8
retq
.LBB6_8:
.cfi_def_cfa_offset 272
movq (%r15), %rdx
movq stderr(%rip), %rdi
movl $.L.str.5, %esi
xorl %eax, %eax
callq fprintf
movq stderr(%rip), %rcx
movl $.L.str.6, %edi
movl $6, %esi
movl $1, %edx
callq fwrite@PLT
movq stderr(%rip), %rcx
movl $.L.str.7, %edi
movl $26, %esi
movl $1, %edx
callq fwrite@PLT
movq stderr(%rip), %rcx
movl $.L.str.8, %edi
movl $25, %esi
movl $1, %edx
callq fwrite@PLT
movq stderr(%rip), %rcx
movl $.L.str.9, %edi
movl $20, %esi
movl $1, %edx
callq fwrite@PLT
movl $1, %edi
callq exit
.Lfunc_end6:
.size main, .Lfunc_end6-main
.cfi_endproc
# -- End function
.p2align 4, 0x90 # -- Begin function __hip_module_ctor
.type __hip_module_ctor,@function
__hip_module_ctor: # @__hip_module_ctor
.cfi_startproc
# %bb.0:
subq $40, %rsp
.cfi_def_cfa_offset 48
cmpq $0, __hip_gpubin_handle(%rip)
jne .LBB7_2
# %bb.1:
movl $__hip_fatbin_wrapper, %edi
callq __hipRegisterFatBinary
movq %rax, __hip_gpubin_handle(%rip)
.LBB7_2:
movq __hip_gpubin_handle(%rip), %rdi
xorps %xmm0, %xmm0
movups %xmm0, 16(%rsp)
movups %xmm0, (%rsp)
movl $_Z11perm_kernelPiS_ii, %esi
movl $.L__unnamed_1, %edx
movl $.L__unnamed_1, %ecx
movl $-1, %r8d
xorl %r9d, %r9d
callq __hipRegisterFunction
movl $__hip_module_dtor, %edi
addq $40, %rsp
.cfi_def_cfa_offset 8
jmp atexit # TAILCALL
.Lfunc_end7:
.size __hip_module_ctor, .Lfunc_end7-__hip_module_ctor
.cfi_endproc
# -- End function
.p2align 4, 0x90 # -- Begin function __hip_module_dtor
.type __hip_module_dtor,@function
__hip_module_dtor: # @__hip_module_dtor
.cfi_startproc
# %bb.0:
movq __hip_gpubin_handle(%rip), %rdi
testq %rdi, %rdi
je .LBB8_2
# %bb.1:
pushq %rax
.cfi_def_cfa_offset 16
callq __hipUnregisterFatBinary
movq $0, __hip_gpubin_handle(%rip)
addq $8, %rsp
.cfi_def_cfa_offset 8
.LBB8_2:
retq
.Lfunc_end8:
.size __hip_module_dtor, .Lfunc_end8-__hip_module_dtor
.cfi_endproc
# -- End function
.type .L.str,@object # @.str
.section .rodata.str1.1,"aMS",@progbits,1
.L.str:
.asciz "TSP (%d cities - seed %d)\n "
.size .L.str, 31
.type .L.str.1,@object # @.str.1
.L.str.1:
.asciz "%3d|"
.size .L.str.1, 5
.type .L.str.3,@object # @.str.3
.L.str.3:
.asciz "%2d|"
.size .L.str.3, 5
.type .L.str.4,@object # @.str.4
.L.str.4:
.asciz "%4d"
.size .L.str.4, 4
.type .L.str.5,@object # @.str.5
.L.str.5:
.asciz "usage: %s [flags]\n"
.size .L.str.5, 19
.type .L.str.6,@object # @.str.6
.L.str.6:
.asciz " -h\n"
.size .L.str.6, 7
.type .L.str.7,@object # @.str.7
.L.str.7:
.asciz " -t <number of threads>\n"
.size .L.str.7, 27
.type .L.str.8,@object # @.str.8
.L.str.8:
.asciz " -c <number of cities>\n"
.size .L.str.8, 26
.type .L.str.9,@object # @.str.9
.L.str.9:
.asciz " -s <random seed>\n"
.size .L.str.9, 21
.type _Z11perm_kernelPiS_ii,@object # @_Z11perm_kernelPiS_ii
.section .rodata,"a",@progbits
.globl _Z11perm_kernelPiS_ii
.p2align 3, 0x0
_Z11perm_kernelPiS_ii:
.quad _Z26__device_stub__perm_kernelPiS_ii
.size _Z11perm_kernelPiS_ii, 8
.type .L.str.10,@object # @.str.10
.section .rodata.str1.1,"aMS",@progbits,1
.L.str.10:
.asciz "t:c:hs:"
.size .L.str.10, 8
.type .L.str.11,@object # @.str.11
.L.str.11:
.asciz "Ouchie:\n%s\n"
.size .L.str.11, 12
.type .L.str.12,@object # @.str.12
.L.str.12:
.asciz "Shortest %d\n"
.size .L.str.12, 13
.type .L.str.13,@object # @.str.13
.L.str.13:
.asciz "Blocks per grid:%d\n"
.size .L.str.13, 20
.type .L.str.14,@object # @.str.14
.L.str.14:
.asciz "Threads per block:%d\n"
.size .L.str.14, 22
.type .L.str.15,@object # @.str.15
.L.str.15:
.asciz "Num cities:%d\n"
.size .L.str.15, 15
.type .L.str.16,@object # @.str.16
.L.str.16:
.asciz "Num threads:%d\n"
.size .L.str.16, 16
.type .L.str.17,@object # @.str.17
.L.str.17:
.asciz "Took %5.3f seconds\n\n"
.size .L.str.17, 21
.type .L__unnamed_1,@object # @0
.L__unnamed_1:
.asciz "_Z11perm_kernelPiS_ii"
.size .L__unnamed_1, 22
.type __hip_fatbin_wrapper,@object # @__hip_fatbin_wrapper
.section .hipFatBinSegment,"a",@progbits
.p2align 3, 0x0
__hip_fatbin_wrapper:
.long 1212764230 # 0x48495046
.long 1 # 0x1
.quad __hip_fatbin
.quad 0
.size __hip_fatbin_wrapper, 24
.type __hip_gpubin_handle,@object # @__hip_gpubin_handle
.local __hip_gpubin_handle
.comm __hip_gpubin_handle,8,8
.section .init_array,"aw",@init_array
.p2align 3, 0x0
.quad __hip_module_ctor
.type __hip_cuid_,@object # @__hip_cuid_
.bss
.globl __hip_cuid_
__hip_cuid_:
.byte 0 # 0x0
.size __hip_cuid_, 1
.section ".linker-options","e",@llvm_linker_options
.ident "AMD clang version 18.0.0git (https://github.com/RadeonOpenCompute/llvm-project roc-6.3.2 25012 e5bf7e55c91490b07c49d8960fa7983d864936c4)"
.section ".note.GNU-stack","",@progbits
.addrsig
.addrsig_sym _Z26__device_stub__perm_kernelPiS_ii
.addrsig_sym __hip_module_ctor
.addrsig_sym __hip_module_dtor
.addrsig_sym _Z11perm_kernelPiS_ii
.addrsig_sym __hip_fatbin
.addrsig_sym __hip_fatbin_wrapper
.addrsig_sym __hip_cuid_ |
You are a helpful coding assistant specialized in converting CUDA source code to CUDA device assembly. | #include <stdio.h>
#include <cuda.h>
#include <unistd.h>
#include <signal.h>
#include <stdint.h>
#include <stdlib.h>
#include <pthread.h>
#include <sys/time.h>
#define NUM_THREADS 4
#define MEMPER 0.9
#define SIZE 1024ul
#define REQ_UNDEFINED '-'
#define REQ_IDLE ';'
#define REQ_START 'A'
#define RSP_FINISH 'Z'
#define RSP_UNDEFINED '-'
struct thread_arg{
int id;
int size;
double* doubles;
double* compare;
};
void *Increment(void *args)
{
struct thread_arg* arg;
int tid;
int size;
double* d;
int work;
arg = (struct thread_arg*) args;
tid = arg->id;
size = arg->size;
d = arg->doubles;
work = size / (8 * 8);
//printf("Tid: %d\tSize: %d\td:%p\n",tid,size,d);
for(int i = 0; i < work; i++){
d[(tid * work) + i] *= 2;
}
pthread_exit(NULL);
}
__global__ void
intensive_kernel(unsigned int *cmd){
int threadId = threadIdx.x + (blockDim.x * blockIdx.x);
double* input;
double* compare;
while (cmd[8]) {
if (threadIdx.x == 0 && blockIdx.x == 0) {
if (cmd[0] == REQ_START && cmd[1] != RSP_FINISH) {
// we've got a request for a new job
// initialize
cmd[7] = 1;
__threadfence();
}
else {
cmd[7] = 0;
cmd[1] = RSP_UNDEFINED;
__threadfence();
}
}
__syncthreads();
if (cmd[7] == 1) {
while(cmd[2] == 0);
input = (double*) ((long long)cmd[6]<<32 | cmd[5]);
compare = (double*) ((long long)cmd[4]<<32 | cmd[3]);
if(input[threadId] - compare[threadId] > 0.01){
input[threadId] = (compare[threadId] * 2) + exp(input[threadId]);
}
if (threadIdx.x == 0 && blockIdx.x == 0) {
// finitto
cmd[0] = REQ_IDLE;
cmd[1] = RSP_FINISH;
cmd[7] = 0;
__threadfence();
// host will set #threads equal to 0 after obtaining the results
while (cmd[2] != 0);
}
}
__syncthreads();
}
}
size_t
available_memory(){
size_t mem_total = 0;
size_t mem_free = 0;
cudaMemGetInfo(&mem_free, &mem_total);
printf("Total memory %dMB\tFree Memory %dMB\n",mem_total/(1024*1024),mem_free/(1024*1024));
return mem_free;
}
int
main(int argc, char **argv){
size_t available_mem = 0;
double *doubles_host;
double *doubles_device;
double *compare_host;
double *compare_device;
unsigned int* cmd_h;
unsigned int* cmd_d;
int threads;
int blocks;
int timeToRun;
int result;
cudaStream_t stream1;
cudaStream_t stream2;
struct timeval t1;
struct timeval t2;
pthread_t thread[8];
struct thread_arg args;
if(argc < 2){
printf("Usage: stresstest <duration>\n\tduration\tTime stress will run in seconds\n");
exit(EXIT_FAILURE);
}
timeToRun = atoi(argv[1]);
// system("sudo ./gpu_over.sh");
// system("sudo ./cpu_over.sh");
cudaSetDevice(0);
cudaStreamCreate(&stream1);
cudaStreamCreate(&stream2);
available_mem = available_memory() * 0.9;
printf("Allocating 90%% of the available memory: (%dMB)\n", available_mem/(1024 * 1024));
cudaMalloc((void**)&doubles_device, available_mem/4 * sizeof(char));
cudaMalloc((void**)&compare_device, available_mem/4 * sizeof(char));
cudaMalloc((void**)&cmd_d, 10 * sizeof(unsigned int));
cudaMallocHost((void **)&cmd_h, 10 * sizeof(unsigned int));
cudaMallocHost((void**)&doubles_host, available_mem/4 * sizeof(char));
cudaMallocHost((void**)&compare_host, available_mem/4 * sizeof(char));
srand(time(NULL));
printf("Initializing buffers...\n");
for(int i=0; i < available_mem/32; i++){
doubles_host[i] = i * rand() * 1.8643;
compare_host[i] = i * rand() * 1.4903;
}
printf("Finished initialization of buffers!\n\n");
cmd_h[0] = REQ_UNDEFINED;
cmd_h[1] = RSP_UNDEFINED;
cmd_h[9] = 0;
cudaMemcpy(doubles_device, doubles_host, available_mem/4 * sizeof(char), cudaMemcpyHostToDevice);
cudaMemcpy(compare_device, compare_host, available_mem/4 * sizeof(char), cudaMemcpyHostToDevice);
cudaMemcpy(cmd_h+3,&(compare_device), sizeof(double*),cudaMemcpyHostToHost);
cudaMemcpy(cmd_h+5,&(doubles_device), sizeof(double*),cudaMemcpyHostToHost);
cudaMemcpy(cmd_d, cmd_h, 10 * sizeof(unsigned int), cudaMemcpyHostToDevice);
threads = 1024;
blocks = available_mem/(16 * threads);
gettimeofday(&t1, 0);
printf("Start stressing...\n");
intensive_kernel<<<blocks,threads,0,stream1>>>(cmd_d);
pid_t pid = fork();
if(pid == 0){
//child
if(execv("./temperature", argv) == -1){
printf("Execv failed!\n");
exit(EXIT_FAILURE);
}
}
else if(pid > 0){
//parent
gettimeofday(&t2, 0);
while(t2.tv_sec - t1.tv_sec < timeToRun){
usleep(10);
cmd_h[0] = REQ_START;
cmd_h[1] = RSP_UNDEFINED;
cmd_h[2] = random() % 512;
for(int i=0; i < 8; i++ ){
args.id = i;
args.size = available_mem/4;
args.doubles = compare_host;
result = pthread_create(&thread[i], NULL,
Increment, (void *)&args);
if (result){
printf("Unable to create thread\n");
exit(-1);
}
}
for(int i = 0; i < 8; i++){
pthread_join(thread[i], NULL);
}
cudaMemcpyAsync(doubles_device, doubles_host, available_mem/4 * sizeof(char), cudaMemcpyHostToDevice, stream2);
cudaMemcpyAsync(compare_device, compare_host, available_mem/4 * sizeof(char), cudaMemcpyHostToDevice, stream2);
// first set #threads
cudaMemcpyAsync(cmd_d+2, cmd_h+2, 1 * sizeof(unsigned int), cudaMemcpyHostToDevice, stream2);
cudaStreamSynchronize(stream2);
// set RSP
cudaMemcpyAsync(cmd_d+1, cmd_h+1, 1 * sizeof(unsigned int), cudaMemcpyHostToDevice, stream2);
cudaStreamSynchronize(stream2);
// set REQ
cudaMemcpyAsync(cmd_d+0, cmd_h+0, 1 * sizeof(unsigned int), cudaMemcpyHostToDevice, stream2);
cudaStreamSynchronize(stream2);
int ready = 0;
while (((cmd_h[0] == REQ_START) && cmd_h[1] != RSP_FINISH)) {
ready = 1;
// get RSP
cudaMemcpyAsync(&cmd_h[1], &cmd_d[1], 1 * sizeof(unsigned int), cudaMemcpyDeviceToHost, stream2);
cudaStreamSynchronize(stream2);
}
if (ready == 1) {
// get data
cudaMemcpyAsync(doubles_host,doubles_device, available_mem/4 * sizeof(char), cudaMemcpyDeviceToHost, stream2);
cudaStreamSynchronize(stream2);
for(int i=0; i < 8; i++ ){
args.id = i;
args.size = available_mem/4;
args.doubles = doubles_host;
result = pthread_create(&thread[i], NULL,
Increment, (void *)&args);
if (result){
printf("Unable to create thread\n");
exit(-1);
}
}
for(int i = 0; i < 8; i++){
pthread_join(thread[i], NULL);
}
//pthread_exit(NULL);
cmd_h[0] = REQ_UNDEFINED;
cudaMemcpyAsync(&cmd_d[0], &cmd_h[0], 1 * sizeof(unsigned int), cudaMemcpyHostToDevice, stream2);
cudaStreamSynchronize(stream2);
// notify GPU by setting #threads equal to 0
cmd_h[2] = 0;
cudaMemcpyAsync(&cmd_d[2], &cmd_h[2], 1 * sizeof(unsigned int), cudaMemcpyHostToDevice, stream2);
cudaStreamSynchronize(stream2);
}
gettimeofday(&t2, 0);
}
cmd_h[8] = 1;
cudaMemcpyAsync(&cmd_d[8], &cmd_h[8], 1 * sizeof(unsigned int), cudaMemcpyHostToDevice, stream2);
cudaStreamSynchronize(stream2);
while(cmd_h[8] == 1 && cmd_h[9] != 1){
cudaMemcpyAsync(&cmd_h[9], &cmd_d[9], 1 * sizeof(unsigned int), cudaMemcpyDeviceToHost, stream2);
cudaStreamSynchronize(stream2);
}
}
else{
//error
printf("fork() failed!\n");
exit(EXIT_FAILURE);
}
cudaFree(doubles_device);
cudaFree(compare_device);
cudaFree(cmd_d);
cudaFreeHost(doubles_host);
cudaFreeHost(compare_host);
cudaFreeHost(cmd_h);
// system("sudo ./gpu_down.sh");
// system("sudo ./cpu_down.sh");
printf("Finished!\n");
} | code for sm_80
Function : _Z16intensive_kernelPj
.headerflags @"EF_CUDA_TEXMODE_UNIFIED EF_CUDA_64BIT_ADDRESS EF_CUDA_SM80 EF_CUDA_VIRTUAL_SM(EF_CUDA_SM80)"
/*0000*/ IMAD.MOV.U32 R1, RZ, RZ, c[0x0][0x28] ; /* 0x00000a00ff017624 */
/* 0x000fe400078e00ff */
/*0010*/ IMAD.MOV.U32 R2, RZ, RZ, c[0x0][0x160] ; /* 0x00005800ff027624 */
/* 0x000fe200078e00ff */
/*0020*/ ULDC.64 UR6, c[0x0][0x118] ; /* 0x0000460000067ab9 */
/* 0x000fe20000000a00 */
/*0030*/ IMAD.MOV.U32 R3, RZ, RZ, c[0x0][0x164] ; /* 0x00005900ff037624 */
/* 0x000fca00078e00ff */
/*0040*/ LDG.E R2, [R2.64+0x20] ; /* 0x0000200602027981 */
/* 0x000ea4000c1e1900 */
/*0050*/ ISETP.NE.AND P0, PT, R2, RZ, PT ; /* 0x000000ff0200720c */
/* 0x004fda0003f05270 */
/*0060*/ @!P0 EXIT ; /* 0x000000000000894d */
/* 0x000fea0003800000 */
/*0070*/ S2R R0, SR_CTAID.X ; /* 0x0000000000007919 */
/* 0x000e220000002500 */
/*0080*/ ULDC.64 UR4, c[0x0][0x160] ; /* 0x0000580000047ab9 */
/* 0x000fe40000000a00 */
/*0090*/ UIADD3 UR4, UP0, UR4, 0x20, URZ ; /* 0x0000002004047890 */
/* 0x000fe2000ff1e03f */
/*00a0*/ S2R R3, SR_TID.X ; /* 0x0000000000037919 */
/* 0x000e260000002100 */
/*00b0*/ UIADD3.X UR5, URZ, UR5, URZ, UP0, !UPT ; /* 0x000000053f057290 */
/* 0x000fe400087fe43f */
/*00c0*/ IMAD.U32 R2, RZ, RZ, UR4 ; /* 0x00000004ff027e24 */
/* 0x000fe4000f8e00ff */
/*00d0*/ IMAD R10, R0, c[0x0][0x0], R3 ; /* 0x00000000000a7a24 */
/* 0x001fe200078e0203 */
/*00e0*/ LOP3.LUT P0, RZ, R3, R0, RZ, 0xfc, !PT ; /* 0x0000000003ff7212 */
/* 0x000fe2000780fcff */
/*00f0*/ IMAD.U32 R3, RZ, RZ, UR5 ; /* 0x00000005ff037e24 */
/* 0x000fc6000f8e00ff */
/*0100*/ SHF.R.S32.HI R5, RZ, 0x1f, R10 ; /* 0x0000001fff057819 */
/* 0x000fc8000001140a */
/*0110*/ SHF.L.U64.HI R0, R10.reuse, 0x3, R5 ; /* 0x000000030a007819 */
/* 0x040fe20000010205 */
/*0120*/ IMAD.SHL.U32 R10, R10, 0x8, RZ ; /* 0x000000080a0a7824 */
/* 0x000fc600078e00ff */
/*0130*/ BSSY B0, 0x280 ; /* 0x0000014000007945 */
/* 0x000fe20003800000 */
/*0140*/ @P0 BRA 0x270 ; /* 0x0000012000000947 */
/* 0x001fea0003800000 */
/*0150*/ LDG.E R4, [R2.64+-0x20] ; /* 0xffffe00602047981 */
/* 0x000ea4000c1e1900 */
/*0160*/ ISETP.NE.AND P1, PT, R4, 0x41, PT ; /* 0x000000410400780c */
/* 0x004fda0003f25270 */
/*0170*/ @P1 BRA 0x210 ; /* 0x0000009000001947 */
/* 0x000fea0003800000 */
/*0180*/ LDG.E R4, [R2.64+-0x1c] ; /* 0xffffe40602047981 */
/* 0x000ea4000c1e1900 */
/*0190*/ ISETP.NE.AND P1, PT, R4, 0x5a, PT ; /* 0x0000005a0400780c */
/* 0x004fda0003f25270 */
/*01a0*/ @!P1 BRA 0x210 ; /* 0x0000006000009947 */
/* 0x000fea0003800000 */
/*01b0*/ IMAD.MOV.U32 R5, RZ, RZ, 0x1 ; /* 0x00000001ff057424 */
/* 0x000fca00078e00ff */
/*01c0*/ STG.E [R2.64+-0x4], R5 ; /* 0xfffffc0502007986 */
/* 0x0001e2000c101906 */
/*01d0*/ MEMBAR.SC.GPU ; /* 0x0000000000007992 */
/* 0x000fec0000002000 */
/*01e0*/ ERRBAR; /* 0x00000000000079ab */
/* 0x000fc00000000000 */
/*01f0*/ CCTL.IVALL ; /* 0x00000000ff00798f */
/* 0x000fca0002000000 */
/*0200*/ BRA 0x270 ; /* 0x0000006000007947 */
/* 0x000fea0003800000 */
/*0210*/ HFMA2.MMA R5, -RZ, RZ, 0, 2.682209014892578125e-06 ; /* 0x0000002dff057435 */
/* 0x000fe200000001ff */
/*0220*/ STG.E [R2.64+-0x4], RZ ; /* 0xfffffcff02007986 */
/* 0x0001ec000c101906 */
/*0230*/ STG.E [R2.64+-0x1c], R5 ; /* 0xffffe40502007986 */
/* 0x0001e2000c101906 */
/*0240*/ MEMBAR.SC.GPU ; /* 0x0000000000007992 */
/* 0x000fec0000002000 */
/*0250*/ ERRBAR; /* 0x00000000000079ab */
/* 0x000fc00000000000 */
/*0260*/ CCTL.IVALL ; /* 0x00000000ff00798f */
/* 0x000fca0002000000 */
/*0270*/ BSYNC B0 ; /* 0x0000000000007941 */
/* 0x000fea0003800000 */
/*0280*/ BAR.SYNC.DEFER_BLOCKING 0x0 ; /* 0x0000000000007b1d */
/* 0x000fec0000010000 */
/*0290*/ LDG.E R4, [R2.64+-0x4] ; /* 0xfffffc0602047981 */
/* 0x000ea4000c1e1900 */
/*02a0*/ ISETP.NE.AND P1, PT, R4, 0x1, PT ; /* 0x000000010400780c */
/* 0x004fda0003f25270 */
/*02b0*/ @P1 BRA 0x710 ; /* 0x0000045000001947 */
/* 0x000fea0003800000 */
/*02c0*/ LDG.E R4, [R2.64+-0x18] ; /* 0xffffe80602047981 */
/* 0x000ea4000c1e1900 */
/*02d0*/ ISETP.NE.AND P1, PT, R4, RZ, PT ; /* 0x000000ff0400720c */
/* 0x004fda0003f25270 */
/*02e0*/ @!P1 BRA 0x780 ; /* 0x0000049000009947 */
/* 0x000fea0003800000 */
/*02f0*/ LDG.E R11, [R2.64+-0x14] ; /* 0xffffec06020b7981 */
/* 0x000ea8000c1e1900 */
/*0300*/ LDG.E R7, [R2.64+-0xc] ; /* 0xfffff40602077981 */
/* 0x000ee8000c1e1900 */
/*0310*/ LDG.E R9, [R2.64+-0x10] ; /* 0xfffff00602097981 */
/* 0x000f28000c1e1900 */
/*0320*/ LDG.E R5, [R2.64+-0x8] ; /* 0xfffff80602057981 */
/* 0x001f62000c1e1900 */
/*0330*/ IADD3 R8, P2, R11, R10, RZ ; /* 0x0000000a0b087210 */
/* 0x004fc40007f5e0ff */
/*0340*/ IADD3 R4, P1, R7, R10, RZ ; /* 0x0000000a07047210 */
/* 0x008fc60007f3e0ff */
/*0350*/ IMAD.X R9, R9, 0x1, R0.reuse, P2 ; /* 0x0000000109097824 */
/* 0x110fe400010e0600 */
/*0360*/ IMAD.X R5, R5, 0x1, R0, P1 ; /* 0x0000000105057824 */
/* 0x020fc800008e0600 */
/*0370*/ LD.E.64 R8, [R8.64] ; /* 0x0000000608087980 */
/* 0x000ea8000c101b00 */
/*0380*/ LD.E.64 R6, [R4.64] ; /* 0x0000000604067980 */
/* 0x000ea2000c101b00 */
/*0390*/ BSSY B0, 0x650 ; /* 0x000002b000007945 */
/* 0x000fe20003800000 */
/*03a0*/ DADD R12, -R8, R6 ; /* 0x00000000080c7229 */
/* 0x004e0c0000000106 */
/*03b0*/ DSETP.GT.AND P1, PT, R12, c[0x2][0x0], PT ; /* 0x008000000c00762a */
/* 0x001e1c0003f24000 */
/*03c0*/ @!P1 BRA 0x640 ; /* 0x0000027000009947 */
/* 0x001fea0003800000 */
/*03d0*/ IMAD.MOV.U32 R12, RZ, RZ, 0x652b82fe ; /* 0x652b82feff0c7424 */
/* 0x000fe200078e00ff */
/*03e0*/ MOV R18, 0x69ce2bdf ; /* 0x69ce2bdf00127802 */
/* 0x000fe20000000f00 */
/*03f0*/ IMAD.MOV.U32 R13, RZ, RZ, 0x3ff71547 ; /* 0x3ff71547ff0d7424 */
/* 0x000fe200078e00ff */
/*0400*/ FSETP.GEU.AND P1, PT, |R7|, 4.1917929649353027344, PT ; /* 0x4086232b0700780b */
/* 0x000fe20003f2e200 */
/*0410*/ IMAD.MOV.U32 R19, RZ, RZ, 0x3e5ade15 ; /* 0x3e5ade15ff137424 */
/* 0x000fe200078e00ff */
/*0420*/ BSSY B1, 0x620 ; /* 0x000001f000017945 */
/* 0x000fe60003800000 */
/*0430*/ DFMA R12, R6, R12, 6.75539944105574400000e+15 ; /* 0x43380000060c742b */
/* 0x000e0c000000000c */
/*0440*/ DADD R14, R12, -6.75539944105574400000e+15 ; /* 0xc33800000c0e7429 */
/* 0x001e0c0000000000 */
/*0450*/ DFMA R16, R14, c[0x2][0x8], R6 ; /* 0x008002000e107a2b */
/* 0x001e0c0000000006 */
/*0460*/ DFMA R14, R14, c[0x2][0x10], R16 ; /* 0x008004000e0e7a2b */
/* 0x001e0c0000000010 */
/*0470*/ DFMA R16, R14, R18, c[0x2][0x18] ; /* 0x008006000e10762b */
/* 0x001e0c0000000012 */
/*0480*/ DFMA R16, R14, R16, c[0x2][0x20] ; /* 0x008008000e10762b */
/* 0x001e0c0000000010 */
/*0490*/ DFMA R16, R14, R16, c[0x2][0x28] ; /* 0x00800a000e10762b */
/* 0x001e0c0000000010 */
/*04a0*/ DFMA R16, R14, R16, c[0x2][0x30] ; /* 0x00800c000e10762b */
/* 0x001e0c0000000010 */
/*04b0*/ DFMA R16, R14, R16, c[0x2][0x38] ; /* 0x00800e000e10762b */
/* 0x001e0c0000000010 */
/*04c0*/ DFMA R16, R14, R16, c[0x2][0x40] ; /* 0x008010000e10762b */
/* 0x001e0c0000000010 */
/*04d0*/ DFMA R16, R14, R16, c[0x2][0x48] ; /* 0x008012000e10762b */
/* 0x001e0c0000000010 */
/*04e0*/ DFMA R16, R14, R16, c[0x2][0x50] ; /* 0x008014000e10762b */
/* 0x001e0c0000000010 */
/*04f0*/ DFMA R16, R14, R16, c[0x2][0x58] ; /* 0x008016000e10762b */
/* 0x001e0c0000000010 */
/*0500*/ DFMA R16, R14, R16, 1 ; /* 0x3ff000000e10742b */
/* 0x001e0c0000000010 */
/*0510*/ DFMA R16, R14, R16, 1 ; /* 0x3ff000000e10742b */
/* 0x001e140000000010 */
/*0520*/ IMAD R15, R12, 0x100000, R17 ; /* 0x001000000c0f7824 */
/* 0x001fe400078e0211 */
/*0530*/ IMAD.MOV.U32 R14, RZ, RZ, R16 ; /* 0x000000ffff0e7224 */
/* 0x000fe200078e0010 */
/*0540*/ @!P1 BRA 0x610 ; /* 0x000000c000009947 */
/* 0x000fea0003800000 */
/*0550*/ FSETP.GEU.AND P2, PT, |R7|, 4.2275390625, PT ; /* 0x408748000700780b */
/* 0x000fe20003f4e200 */
/*0560*/ DADD R14, R6, +INF ; /* 0x7ff00000060e7429 */
/* 0x000fc80000000000 */
/*0570*/ DSETP.GEU.AND P1, PT, R6, RZ, PT ; /* 0x000000ff0600722a */
/* 0x000e0c0003f2e000 */
/*0580*/ FSEL R14, R14, RZ, P1 ; /* 0x000000ff0e0e7208 */
/* 0x001fe40000800000 */
/*0590*/ @!P2 LEA.HI R11, R12, R12, RZ, 0x1 ; /* 0x0000000c0c0ba211 */
/* 0x000fe400078f08ff */
/*05a0*/ FSEL R15, R15, RZ, P1 ; /* 0x000000ff0f0f7208 */
/* 0x000fe40000800000 */
/*05b0*/ @!P2 SHF.R.S32.HI R11, RZ, 0x1, R11 ; /* 0x00000001ff0ba819 */
/* 0x000fc8000001140b */
/*05c0*/ @!P2 LEA R17, R11, R17, 0x14 ; /* 0x000000110b11a211 */
/* 0x000fe200078ea0ff */
/*05d0*/ @!P2 IMAD.IADD R6, R12, 0x1, -R11 ; /* 0x000000010c06a824 */
/* 0x000fca00078e0a0b */
/*05e0*/ @!P2 LEA R7, R6, 0x3ff00000, 0x14 ; /* 0x3ff000000607a811 */
/* 0x000fe200078ea0ff */
/*05f0*/ @!P2 IMAD.MOV.U32 R6, RZ, RZ, RZ ; /* 0x000000ffff06a224 */
/* 0x000fcc00078e00ff */
/*0600*/ @!P2 DMUL R14, R16, R6 ; /* 0x00000006100ea228 */
/* 0x00004c0000000000 */
/*0610*/ BSYNC B1 ; /* 0x0000000000017941 */
/* 0x000fea0003800000 */
/*0620*/ DFMA R8, R8, 2, R14 ; /* 0x400000000808782b */
/* 0x002e4e000000000e */
/*0630*/ ST.E.64 [R4.64], R8 ; /* 0x0000000804007985 */
/* 0x0023e8000c101b06 */
/*0640*/ BSYNC B0 ; /* 0x0000000000007941 */
/* 0x000fea0003800000 */
/*0650*/ @P0 BRA 0x710 ; /* 0x000000b000000947 */
/* 0x000fea0003800000 */
/*0660*/ IMAD.MOV.U32 R5, RZ, RZ, 0x3b ; /* 0x0000003bff057424 */
/* 0x002fe200078e00ff */
/*0670*/ STG.E [R2.64+-0x4], RZ ; /* 0xfffffcff02007986 */
/* 0x0003e2000c101906 */
/*0680*/ IMAD.MOV.U32 R7, RZ, RZ, 0x5a ; /* 0x0000005aff077424 */
/* 0x001fc600078e00ff */
/*0690*/ STG.E [R2.64+-0x20], R5 ; /* 0xffffe00502007986 */
/* 0x0003e8000c101906 */
/*06a0*/ STG.E [R2.64+-0x1c], R7 ; /* 0xffffe40702007986 */
/* 0x0003e2000c101906 */
/*06b0*/ MEMBAR.SC.GPU ; /* 0x0000000000007992 */
/* 0x000fec0000002000 */
/*06c0*/ ERRBAR; /* 0x00000000000079ab */
/* 0x000fc00000000000 */
/*06d0*/ CCTL.IVALL ; /* 0x00000000ff00798f */
/* 0x000fca0002000000 */
/*06e0*/ LDG.E R4, [R2.64+-0x18] ; /* 0xffffe80602047981 */
/* 0x000ea4000c1e1900 */
/*06f0*/ ISETP.NE.AND P1, PT, R4, RZ, PT ; /* 0x000000ff0400720c */
/* 0x004fda0003f25270 */
/*0700*/ @P1 BRA 0x770 ; /* 0x0000006000001947 */
/* 0x000fea0003800000 */
/*0710*/ WARPSYNC 0xffffffff ; /* 0xffffffff00007948 */
/* 0x000fe20003800000 */
/*0720*/ BAR.SYNC.DEFER_BLOCKING 0x0 ; /* 0x0000000000007b1d */
/* 0x000fec0000010000 */
/*0730*/ LDG.E R4, [R2.64] ; /* 0x0000000602047981 */
/* 0x002ea4000c1e1900 */
/*0740*/ ISETP.NE.AND P1, PT, R4, RZ, PT ; /* 0x000000ff0400720c */
/* 0x004fda0003f25270 */
/*0750*/ @!P1 EXIT ; /* 0x000000000000994d */
/* 0x000fea0003800000 */
/*0760*/ BRA 0x130 ; /* 0xfffff9c000007947 */
/* 0x000fea000383ffff */
/*0770*/ BRA 0x770 ; /* 0xfffffff000007947 */
/* 0x000fea000383ffff */
/*0780*/ BRA 0x780 ; /* 0xfffffff000007947 */
/* 0x000fea000383ffff */
/*0790*/ BRA 0x790; /* 0xfffffff000007947 */
/* 0x000fc0000383ffff */
/*07a0*/ NOP; /* 0x0000000000007918 */
/* 0x000fc00000000000 */
/*07b0*/ NOP; /* 0x0000000000007918 */
/* 0x000fc00000000000 */
/*07c0*/ NOP; /* 0x0000000000007918 */
/* 0x000fc00000000000 */
/*07d0*/ NOP; /* 0x0000000000007918 */
/* 0x000fc00000000000 */
/*07e0*/ NOP; /* 0x0000000000007918 */
/* 0x000fc00000000000 */
/*07f0*/ NOP; /* 0x0000000000007918 */
/* 0x000fc00000000000 */
/*0800*/ NOP; /* 0x0000000000007918 */
/* 0x000fc00000000000 */
/*0810*/ NOP; /* 0x0000000000007918 */
/* 0x000fc00000000000 */
/*0820*/ NOP; /* 0x0000000000007918 */
/* 0x000fc00000000000 */
/*0830*/ NOP; /* 0x0000000000007918 */
/* 0x000fc00000000000 */
/*0840*/ NOP; /* 0x0000000000007918 */
/* 0x000fc00000000000 */
/*0850*/ NOP; /* 0x0000000000007918 */
/* 0x000fc00000000000 */
/*0860*/ NOP; /* 0x0000000000007918 */
/* 0x000fc00000000000 */
/*0870*/ NOP; /* 0x0000000000007918 */
/* 0x000fc00000000000 */
.......... |
You are a helpful coding assistant specialized in converting CUDA source code to CUDA host assembly. | #include <stdio.h>
#include <cuda.h>
#include <unistd.h>
#include <signal.h>
#include <stdint.h>
#include <stdlib.h>
#include <pthread.h>
#include <sys/time.h>
#define NUM_THREADS 4
#define MEMPER 0.9
#define SIZE 1024ul
#define REQ_UNDEFINED '-'
#define REQ_IDLE ';'
#define REQ_START 'A'
#define RSP_FINISH 'Z'
#define RSP_UNDEFINED '-'
struct thread_arg{
int id;
int size;
double* doubles;
double* compare;
};
void *Increment(void *args)
{
struct thread_arg* arg;
int tid;
int size;
double* d;
int work;
arg = (struct thread_arg*) args;
tid = arg->id;
size = arg->size;
d = arg->doubles;
work = size / (8 * 8);
//printf("Tid: %d\tSize: %d\td:%p\n",tid,size,d);
for(int i = 0; i < work; i++){
d[(tid * work) + i] *= 2;
}
pthread_exit(NULL);
}
__global__ void
intensive_kernel(unsigned int *cmd){
int threadId = threadIdx.x + (blockDim.x * blockIdx.x);
double* input;
double* compare;
while (cmd[8]) {
if (threadIdx.x == 0 && blockIdx.x == 0) {
if (cmd[0] == REQ_START && cmd[1] != RSP_FINISH) {
// we've got a request for a new job
// initialize
cmd[7] = 1;
__threadfence();
}
else {
cmd[7] = 0;
cmd[1] = RSP_UNDEFINED;
__threadfence();
}
}
__syncthreads();
if (cmd[7] == 1) {
while(cmd[2] == 0);
input = (double*) ((long long)cmd[6]<<32 | cmd[5]);
compare = (double*) ((long long)cmd[4]<<32 | cmd[3]);
if(input[threadId] - compare[threadId] > 0.01){
input[threadId] = (compare[threadId] * 2) + exp(input[threadId]);
}
if (threadIdx.x == 0 && blockIdx.x == 0) {
// finitto
cmd[0] = REQ_IDLE;
cmd[1] = RSP_FINISH;
cmd[7] = 0;
__threadfence();
// host will set #threads equal to 0 after obtaining the results
while (cmd[2] != 0);
}
}
__syncthreads();
}
}
size_t
available_memory(){
size_t mem_total = 0;
size_t mem_free = 0;
cudaMemGetInfo(&mem_free, &mem_total);
printf("Total memory %dMB\tFree Memory %dMB\n",mem_total/(1024*1024),mem_free/(1024*1024));
return mem_free;
}
int
main(int argc, char **argv){
size_t available_mem = 0;
double *doubles_host;
double *doubles_device;
double *compare_host;
double *compare_device;
unsigned int* cmd_h;
unsigned int* cmd_d;
int threads;
int blocks;
int timeToRun;
int result;
cudaStream_t stream1;
cudaStream_t stream2;
struct timeval t1;
struct timeval t2;
pthread_t thread[8];
struct thread_arg args;
if(argc < 2){
printf("Usage: stresstest <duration>\n\tduration\tTime stress will run in seconds\n");
exit(EXIT_FAILURE);
}
timeToRun = atoi(argv[1]);
// system("sudo ./gpu_over.sh");
// system("sudo ./cpu_over.sh");
cudaSetDevice(0);
cudaStreamCreate(&stream1);
cudaStreamCreate(&stream2);
available_mem = available_memory() * 0.9;
printf("Allocating 90%% of the available memory: (%dMB)\n", available_mem/(1024 * 1024));
cudaMalloc((void**)&doubles_device, available_mem/4 * sizeof(char));
cudaMalloc((void**)&compare_device, available_mem/4 * sizeof(char));
cudaMalloc((void**)&cmd_d, 10 * sizeof(unsigned int));
cudaMallocHost((void **)&cmd_h, 10 * sizeof(unsigned int));
cudaMallocHost((void**)&doubles_host, available_mem/4 * sizeof(char));
cudaMallocHost((void**)&compare_host, available_mem/4 * sizeof(char));
srand(time(NULL));
printf("Initializing buffers...\n");
for(int i=0; i < available_mem/32; i++){
doubles_host[i] = i * rand() * 1.8643;
compare_host[i] = i * rand() * 1.4903;
}
printf("Finished initialization of buffers!\n\n");
cmd_h[0] = REQ_UNDEFINED;
cmd_h[1] = RSP_UNDEFINED;
cmd_h[9] = 0;
cudaMemcpy(doubles_device, doubles_host, available_mem/4 * sizeof(char), cudaMemcpyHostToDevice);
cudaMemcpy(compare_device, compare_host, available_mem/4 * sizeof(char), cudaMemcpyHostToDevice);
cudaMemcpy(cmd_h+3,&(compare_device), sizeof(double*),cudaMemcpyHostToHost);
cudaMemcpy(cmd_h+5,&(doubles_device), sizeof(double*),cudaMemcpyHostToHost);
cudaMemcpy(cmd_d, cmd_h, 10 * sizeof(unsigned int), cudaMemcpyHostToDevice);
threads = 1024;
blocks = available_mem/(16 * threads);
gettimeofday(&t1, 0);
printf("Start stressing...\n");
intensive_kernel<<<blocks,threads,0,stream1>>>(cmd_d);
pid_t pid = fork();
if(pid == 0){
//child
if(execv("./temperature", argv) == -1){
printf("Execv failed!\n");
exit(EXIT_FAILURE);
}
}
else if(pid > 0){
//parent
gettimeofday(&t2, 0);
while(t2.tv_sec - t1.tv_sec < timeToRun){
usleep(10);
cmd_h[0] = REQ_START;
cmd_h[1] = RSP_UNDEFINED;
cmd_h[2] = random() % 512;
for(int i=0; i < 8; i++ ){
args.id = i;
args.size = available_mem/4;
args.doubles = compare_host;
result = pthread_create(&thread[i], NULL,
Increment, (void *)&args);
if (result){
printf("Unable to create thread\n");
exit(-1);
}
}
for(int i = 0; i < 8; i++){
pthread_join(thread[i], NULL);
}
cudaMemcpyAsync(doubles_device, doubles_host, available_mem/4 * sizeof(char), cudaMemcpyHostToDevice, stream2);
cudaMemcpyAsync(compare_device, compare_host, available_mem/4 * sizeof(char), cudaMemcpyHostToDevice, stream2);
// first set #threads
cudaMemcpyAsync(cmd_d+2, cmd_h+2, 1 * sizeof(unsigned int), cudaMemcpyHostToDevice, stream2);
cudaStreamSynchronize(stream2);
// set RSP
cudaMemcpyAsync(cmd_d+1, cmd_h+1, 1 * sizeof(unsigned int), cudaMemcpyHostToDevice, stream2);
cudaStreamSynchronize(stream2);
// set REQ
cudaMemcpyAsync(cmd_d+0, cmd_h+0, 1 * sizeof(unsigned int), cudaMemcpyHostToDevice, stream2);
cudaStreamSynchronize(stream2);
int ready = 0;
while (((cmd_h[0] == REQ_START) && cmd_h[1] != RSP_FINISH)) {
ready = 1;
// get RSP
cudaMemcpyAsync(&cmd_h[1], &cmd_d[1], 1 * sizeof(unsigned int), cudaMemcpyDeviceToHost, stream2);
cudaStreamSynchronize(stream2);
}
if (ready == 1) {
// get data
cudaMemcpyAsync(doubles_host,doubles_device, available_mem/4 * sizeof(char), cudaMemcpyDeviceToHost, stream2);
cudaStreamSynchronize(stream2);
for(int i=0; i < 8; i++ ){
args.id = i;
args.size = available_mem/4;
args.doubles = doubles_host;
result = pthread_create(&thread[i], NULL,
Increment, (void *)&args);
if (result){
printf("Unable to create thread\n");
exit(-1);
}
}
for(int i = 0; i < 8; i++){
pthread_join(thread[i], NULL);
}
//pthread_exit(NULL);
cmd_h[0] = REQ_UNDEFINED;
cudaMemcpyAsync(&cmd_d[0], &cmd_h[0], 1 * sizeof(unsigned int), cudaMemcpyHostToDevice, stream2);
cudaStreamSynchronize(stream2);
// notify GPU by setting #threads equal to 0
cmd_h[2] = 0;
cudaMemcpyAsync(&cmd_d[2], &cmd_h[2], 1 * sizeof(unsigned int), cudaMemcpyHostToDevice, stream2);
cudaStreamSynchronize(stream2);
}
gettimeofday(&t2, 0);
}
cmd_h[8] = 1;
cudaMemcpyAsync(&cmd_d[8], &cmd_h[8], 1 * sizeof(unsigned int), cudaMemcpyHostToDevice, stream2);
cudaStreamSynchronize(stream2);
while(cmd_h[8] == 1 && cmd_h[9] != 1){
cudaMemcpyAsync(&cmd_h[9], &cmd_d[9], 1 * sizeof(unsigned int), cudaMemcpyDeviceToHost, stream2);
cudaStreamSynchronize(stream2);
}
}
else{
//error
printf("fork() failed!\n");
exit(EXIT_FAILURE);
}
cudaFree(doubles_device);
cudaFree(compare_device);
cudaFree(cmd_d);
cudaFreeHost(doubles_host);
cudaFreeHost(compare_host);
cudaFreeHost(cmd_h);
// system("sudo ./gpu_down.sh");
// system("sudo ./cpu_down.sh");
printf("Finished!\n");
} | .file "tmpxft_0017ea95_00000000-6_main.cudafe1.cpp"
.text
#APP
#NO_APP
.globl _Z9IncrementPv
.type _Z9IncrementPv, @function
_Z9IncrementPv:
.LFB2080:
.cfi_startproc
endbr64
pushq %rax
.cfi_def_cfa_offset 16
popq %rax
.cfi_def_cfa_offset 8
subq $8, %rsp
.cfi_def_cfa_offset 16
movl (%rdi), %eax
movl 4(%rdi), %edx
movq 8(%rdi), %rsi
leal 63(%rdx), %ecx
testl %edx, %edx
cmovns %edx, %ecx
sarl $6, %ecx
cmpl $63, %edx
jle .L2
imull %ecx, %eax
cltq
leaq (%rsi,%rax,8), %rdx
movl $0, %eax
.L3:
movsd (%rdx,%rax,8), %xmm0
addsd %xmm0, %xmm0
movsd %xmm0, (%rdx,%rax,8)
addq $1, %rax
cmpl %eax, %ecx
jg .L3
.L2:
movl $0, %edi
call pthread_exit@PLT
.cfi_endproc
.LFE2080:
.size _Z9IncrementPv, .-_Z9IncrementPv
.type _ZL26__cudaUnregisterBinaryUtilv, @function
_ZL26__cudaUnregisterBinaryUtilv:
.LFB2085:
.cfi_startproc
endbr64
subq $8, %rsp
.cfi_def_cfa_offset 16
movq _ZL20__cudaFatCubinHandle(%rip), %rdi
call __cudaUnregisterFatBinary@PLT
addq $8, %rsp
.cfi_def_cfa_offset 8
ret
.cfi_endproc
.LFE2085:
.size _ZL26__cudaUnregisterBinaryUtilv, .-_ZL26__cudaUnregisterBinaryUtilv
.section .rodata.str1.8,"aMS",@progbits,1
.align 8
.LC0:
.string "Total memory %dMB\tFree Memory %dMB\n"
.text
.globl _Z16available_memoryv
.type _Z16available_memoryv, @function
_Z16available_memoryv:
.LFB2081:
.cfi_startproc
endbr64
subq $40, %rsp
.cfi_def_cfa_offset 48
movq %fs:40, %rax
movq %rax, 24(%rsp)
xorl %eax, %eax
movq $0, 8(%rsp)
movq $0, 16(%rsp)
leaq 8(%rsp), %rsi
leaq 16(%rsp), %rdi
call cudaMemGetInfo@PLT
movq 16(%rsp), %rcx
shrq $20, %rcx
movq 8(%rsp), %rdx
shrq $20, %rdx
leaq .LC0(%rip), %rsi
movl $2, %edi
movl $0, %eax
call __printf_chk@PLT
movq 16(%rsp), %rax
movq 24(%rsp), %rdx
subq %fs:40, %rdx
jne .L11
addq $40, %rsp
.cfi_remember_state
.cfi_def_cfa_offset 8
ret
.L11:
.cfi_restore_state
call __stack_chk_fail@PLT
.cfi_endproc
.LFE2081:
.size _Z16available_memoryv, .-_Z16available_memoryv
.globl _Z36__device_stub__Z16intensive_kernelPjPj
.type _Z36__device_stub__Z16intensive_kernelPjPj, @function
_Z36__device_stub__Z16intensive_kernelPjPj:
.LFB2107:
.cfi_startproc
endbr64
subq $104, %rsp
.cfi_def_cfa_offset 112
movq %rdi, 8(%rsp)
movq %fs:40, %rax
movq %rax, 88(%rsp)
xorl %eax, %eax
leaq 8(%rsp), %rax
movq %rax, 80(%rsp)
movl $1, 32(%rsp)
movl $1, 36(%rsp)
movl $1, 40(%rsp)
movl $1, 44(%rsp)
movl $1, 48(%rsp)
movl $1, 52(%rsp)
leaq 24(%rsp), %rcx
leaq 16(%rsp), %rdx
leaq 44(%rsp), %rsi
leaq 32(%rsp), %rdi
call __cudaPopCallConfiguration@PLT
testl %eax, %eax
je .L16
.L12:
movq 88(%rsp), %rax
subq %fs:40, %rax
jne .L17
addq $104, %rsp
.cfi_remember_state
.cfi_def_cfa_offset 8
ret
.L16:
.cfi_restore_state
pushq 24(%rsp)
.cfi_def_cfa_offset 120
pushq 24(%rsp)
.cfi_def_cfa_offset 128
leaq 96(%rsp), %r9
movq 60(%rsp), %rcx
movl 68(%rsp), %r8d
movq 48(%rsp), %rsi
movl 56(%rsp), %edx
leaq _Z16intensive_kernelPj(%rip), %rdi
call cudaLaunchKernel@PLT
addq $16, %rsp
.cfi_def_cfa_offset 112
jmp .L12
.L17:
call __stack_chk_fail@PLT
.cfi_endproc
.LFE2107:
.size _Z36__device_stub__Z16intensive_kernelPjPj, .-_Z36__device_stub__Z16intensive_kernelPjPj
.globl _Z16intensive_kernelPj
.type _Z16intensive_kernelPj, @function
_Z16intensive_kernelPj:
.LFB2108:
.cfi_startproc
endbr64
subq $8, %rsp
.cfi_def_cfa_offset 16
call _Z36__device_stub__Z16intensive_kernelPjPj
addq $8, %rsp
.cfi_def_cfa_offset 8
ret
.cfi_endproc
.LFE2108:
.size _Z16intensive_kernelPj, .-_Z16intensive_kernelPj
.section .rodata.str1.8
.align 8
.LC1:
.string "Usage: stresstest <duration>\n\tduration\tTime stress will run in seconds\n"
.align 8
.LC4:
.string "Allocating 90%% of the available memory: (%dMB)\n"
.section .rodata.str1.1,"aMS",@progbits,1
.LC5:
.string "Initializing buffers...\n"
.section .rodata.str1.8
.align 8
.LC8:
.string "Finished initialization of buffers!\n\n"
.section .rodata.str1.1
.LC9:
.string "Start stressing...\n"
.LC10:
.string "./temperature"
.LC11:
.string "Execv failed!\n"
.LC12:
.string "Unable to create thread\n"
.LC13:
.string "fork() failed!\n"
.LC14:
.string "Finished!\n"
.text
.globl main
.type main, @function
main:
.LFB2082:
.cfi_startproc
endbr64
pushq %r15
.cfi_def_cfa_offset 16
.cfi_offset 15, -16
pushq %r14
.cfi_def_cfa_offset 24
.cfi_offset 14, -24
pushq %r13
.cfi_def_cfa_offset 32
.cfi_offset 13, -32
pushq %r12
.cfi_def_cfa_offset 40
.cfi_offset 12, -40
pushq %rbp
.cfi_def_cfa_offset 48
.cfi_offset 6, -48
pushq %rbx
.cfi_def_cfa_offset 56
.cfi_offset 3, -56
subq $232, %rsp
.cfi_def_cfa_offset 288
movq %fs:40, %rax
movq %rax, 216(%rsp)
xorl %eax, %eax
cmpl $1, %edi
jle .L56
movq %rsi, %r13
movq 8(%rsi), %rdi
movl $10, %edx
movl $0, %esi
call __isoc23_strtol@PLT
movq %rax, %r14
movl $0, %edi
call cudaSetDevice@PLT
leaq 64(%rsp), %rdi
call cudaStreamCreate@PLT
leaq 72(%rsp), %rdi
call cudaStreamCreate@PLT
call _Z16available_memoryv
testq %rax, %rax
js .L22
pxor %xmm0, %xmm0
cvtsi2sdq %rax, %xmm0
.L23:
mulsd .LC2(%rip), %xmm0
comisd .LC3(%rip), %xmm0
jnb .L24
cvttsd2siq %xmm0, %r12
.L25:
movq %r12, %rdx
shrq $20, %rdx
leaq .LC4(%rip), %rsi
movl $2, %edi
movl $0, %eax
call __printf_chk@PLT
movq %r12, %rbx
shrq $2, %rbx
movq %rbx, (%rsp)
leaq 24(%rsp), %rdi
movq %rbx, %rsi
call cudaMalloc@PLT
leaq 40(%rsp), %rdi
movq %rbx, %rsi
call cudaMalloc@PLT
leaq 56(%rsp), %rdi
movl $40, %esi
call cudaMalloc@PLT
leaq 48(%rsp), %rdi
movl $40, %esi
call cudaMallocHost@PLT
leaq 16(%rsp), %rdi
movq %rbx, %rsi
call cudaMallocHost@PLT
leaq 32(%rsp), %rdi
movq %rbx, %rsi
call cudaMallocHost@PLT
movl $0, %edi
call time@PLT
movl %eax, %edi
call srand@PLT
leaq .LC5(%rip), %rsi
movl $2, %edi
movl $0, %eax
call __printf_chk@PLT
movq %r12, %rbp
shrq $5, %rbp
cmpq $31, %r12
jbe .L26
movl $0, %ebx
.L27:
call rand@PLT
imull %ebx, %eax
pxor %xmm0, %xmm0
cvtsi2sdl %eax, %xmm0
mulsd .LC6(%rip), %xmm0
movq 16(%rsp), %rax
movsd %xmm0, (%rax,%rbx,8)
call rand@PLT
imull %ebx, %eax
pxor %xmm0, %xmm0
cvtsi2sdl %eax, %xmm0
mulsd .LC7(%rip), %xmm0
movq 32(%rsp), %rax
movsd %xmm0, (%rax,%rbx,8)
addq $1, %rbx
cmpq %rbp, %rbx
jb .L27
.L26:
leaq .LC8(%rip), %rsi
movl $2, %edi
movl $0, %eax
call __printf_chk@PLT
movq 48(%rsp), %rax
movl $45, (%rax)
movq 48(%rsp), %rax
movl $45, 4(%rax)
movq 48(%rsp), %rax
movl $0, 36(%rax)
movl $1, %ecx
movq (%rsp), %rbx
movq %rbx, %rdx
movq 16(%rsp), %rsi
movq 24(%rsp), %rdi
call cudaMemcpy@PLT
movl $1, %ecx
movq %rbx, %rdx
movq 32(%rsp), %rsi
movq 40(%rsp), %rdi
call cudaMemcpy@PLT
leaq 40(%rsp), %rsi
movq 48(%rsp), %rax
leaq 12(%rax), %rdi
movl $0, %ecx
movl $8, %edx
call cudaMemcpy@PLT
leaq 24(%rsp), %rsi
movq 48(%rsp), %rax
leaq 20(%rax), %rdi
movl $0, %ecx
movl $8, %edx
call cudaMemcpy@PLT
movl $1, %ecx
movl $40, %edx
movq 48(%rsp), %rsi
movq 56(%rsp), %rdi
call cudaMemcpy@PLT
leaq 80(%rsp), %rdi
movl $0, %esi
call gettimeofday@PLT
leaq .LC9(%rip), %rsi
movl $2, %edi
movl $0, %eax
call __printf_chk@PLT
movl $1024, 112(%rsp)
movl $1, 116(%rsp)
movl $1, 120(%rsp)
shrq $14, %r12
movl %r12d, 96(%rsp)
movl $1, 100(%rsp)
movl $1, 104(%rsp)
movq 64(%rsp), %r9
movl $0, %r8d
movq 112(%rsp), %rdx
movl $1, %ecx
movq 96(%rsp), %rdi
movl $1, %esi
call __cudaPushCallConfiguration@PLT
testl %eax, %eax
je .L57
.L28:
call fork@PLT
testl %eax, %eax
je .L58
jle .L31
leaq 96(%rsp), %rdi
movl $0, %esi
call gettimeofday@PLT
movslq %r14d, %rcx
movq %rcx, 8(%rsp)
movq 96(%rsp), %rax
subq 80(%rsp), %rax
cmpq %rcx, %rax
jge .L32
leaq _Z9IncrementPv(%rip), %r14
jmp .L43
.L56:
leaq .LC1(%rip), %rsi
movl $2, %edi
call __printf_chk@PLT
movl $1, %edi
call exit@PLT
.L22:
movq %rax, %rdx
shrq %rdx
andl $1, %eax
orq %rax, %rdx
pxor %xmm0, %xmm0
cvtsi2sdq %rdx, %xmm0
addsd %xmm0, %xmm0
jmp .L23
.L24:
subsd .LC3(%rip), %xmm0
cvttsd2siq %xmm0, %r12
btcq $63, %r12
jmp .L25
.L57:
movq 56(%rsp), %rdi
call _Z36__device_stub__Z16intensive_kernelPjPj
jmp .L28
.L58:
movq %r13, %rsi
leaq .LC10(%rip), %rdi
call execv@PLT
cmpl $-1, %eax
je .L59
.L30:
movq 24(%rsp), %rdi
call cudaFree@PLT
movq 40(%rsp), %rdi
call cudaFree@PLT
movq 56(%rsp), %rdi
call cudaFree@PLT
movq 16(%rsp), %rdi
call cudaFreeHost@PLT
movq 32(%rsp), %rdi
call cudaFreeHost@PLT
movq 48(%rsp), %rdi
call cudaFreeHost@PLT
leaq .LC14(%rip), %rsi
movl $2, %edi
movl $0, %eax
call __printf_chk@PLT
movq 216(%rsp), %rax
subq %fs:40, %rax
jne .L60
movl $0, %eax
addq $232, %rsp
.cfi_remember_state
.cfi_def_cfa_offset 56
popq %rbx
.cfi_def_cfa_offset 48
popq %rbp
.cfi_def_cfa_offset 40
popq %r12
.cfi_def_cfa_offset 32
popq %r13
.cfi_def_cfa_offset 24
popq %r14
.cfi_def_cfa_offset 16
popq %r15
.cfi_def_cfa_offset 8
ret
.L59:
.cfi_restore_state
leaq .LC11(%rip), %rsi
movl $2, %edi
movl $0, %eax
call __printf_chk@PLT
movl $1, %edi
call exit@PLT
.L61:
leaq .LC12(%rip), %rsi
movl $2, %edi
movl $0, %eax
call __printf_chk@PLT
movl $-1, %edi
call exit@PLT
.L62:
cmpl $1, %ebx
je .L38
.L37:
leaq 96(%rsp), %rdi
movl $0, %esi
call gettimeofday@PLT
movq 96(%rsp), %rax
subq 80(%rsp), %rax
movq 8(%rsp), %rcx
cmpq %rcx, %rax
jge .L32
.L43:
movl $10, %edi
call usleep@PLT
movq 48(%rsp), %rax
movl $65, (%rax)
movq 48(%rsp), %rax
movl $45, 4(%rax)
call random@PLT
cqto
shrq $55, %rdx
addq %rdx, %rax
andl $511, %eax
subq %rdx, %rax
movq 48(%rsp), %rdx
movl %eax, 8(%rdx)
movl $0, %ebp
movl (%rsp), %r13d
leaq 112(%rsp), %r15
.L34:
movl %ebp, 112(%rsp)
movl %r13d, 116(%rsp)
movq 32(%rsp), %rax
movq %rax, 120(%rsp)
leaq 144(%rsp), %r12
leaq (%r12,%rbp,8), %rdi
movq %r15, %rcx
movq %r14, %rdx
movl $0, %esi
call pthread_create@PLT
movl %eax, %ebx
testl %eax, %eax
jne .L61
addq $1, %rbp
cmpq $8, %rbp
jne .L34
leaq 64(%r12), %r15
movq %r12, %rbp
.L35:
movq 0(%rbp), %rdi
movl $0, %esi
call pthread_join@PLT
addq $8, %rbp
cmpq %r15, %rbp
jne .L35
movq 72(%rsp), %r8
movl $1, %ecx
movq (%rsp), %rbp
movq %rbp, %rdx
movq 16(%rsp), %rsi
movq 24(%rsp), %rdi
call cudaMemcpyAsync@PLT
movq 72(%rsp), %r8
movl $1, %ecx
movq %rbp, %rdx
movq 32(%rsp), %rsi
movq 40(%rsp), %rdi
call cudaMemcpyAsync@PLT
movq 48(%rsp), %rax
leaq 8(%rax), %rsi
movq 56(%rsp), %rax
leaq 8(%rax), %rdi
movq 72(%rsp), %r8
movl $1, %ecx
movl $4, %edx
call cudaMemcpyAsync@PLT
movq 72(%rsp), %rdi
call cudaStreamSynchronize@PLT
movq 48(%rsp), %rax
leaq 4(%rax), %rsi
movq 56(%rsp), %rax
leaq 4(%rax), %rdi
movq 72(%rsp), %r8
movl $1, %ecx
movl $4, %edx
call cudaMemcpyAsync@PLT
movq 72(%rsp), %rdi
call cudaStreamSynchronize@PLT
movq 72(%rsp), %r8
movl $1, %ecx
movl $4, %edx
movq 48(%rsp), %rsi
movq 56(%rsp), %rdi
call cudaMemcpyAsync@PLT
movq 72(%rsp), %rdi
call cudaStreamSynchronize@PLT
movq 48(%rsp), %rdi
movl $1, %ebp
cmpl $65, (%rdi)
jne .L37
.L36:
cmpl $90, 4(%rdi)
je .L62
movq 56(%rsp), %rax
leaq 4(%rax), %rsi
addq $4, %rdi
movq 72(%rsp), %r8
movl $2, %ecx
movl $4, %edx
call cudaMemcpyAsync@PLT
movq 72(%rsp), %rdi
call cudaStreamSynchronize@PLT
movq 48(%rsp), %rdi
movl %ebp, %ebx
cmpl $65, (%rdi)
je .L36
.L38:
movq 72(%rsp), %r8
movl $2, %ecx
movq (%rsp), %rdx
movq 24(%rsp), %rsi
movq 16(%rsp), %rdi
call cudaMemcpyAsync@PLT
movq 72(%rsp), %rdi
call cudaStreamSynchronize@PLT
movl $0, %ebx
.L41:
movl %ebx, 112(%rsp)
movl %r13d, 116(%rsp)
movq 16(%rsp), %rax
movq %rax, 120(%rsp)
leaq 112(%rsp), %rcx
leaq (%r12,%rbx,8), %rdi
movq %r14, %rdx
movl $0, %esi
call pthread_create@PLT
testl %eax, %eax
jne .L63
addq $1, %rbx
cmpq $8, %rbx
jne .L41
.L42:
movq (%r12), %rdi
movl $0, %esi
call pthread_join@PLT
addq $8, %r12
cmpq %r15, %r12
jne .L42
movq 48(%rsp), %rax
movl $45, (%rax)
movq 72(%rsp), %r8
movl $1, %ecx
movl $4, %edx
movq 48(%rsp), %rsi
movq 56(%rsp), %rdi
call cudaMemcpyAsync@PLT
movq 72(%rsp), %rdi
call cudaStreamSynchronize@PLT
movq 48(%rsp), %rsi
movl $0, 8(%rsi)
addq $8, %rsi
movq 56(%rsp), %rax
leaq 8(%rax), %rdi
movq 72(%rsp), %r8
movl $1, %ecx
movl $4, %edx
call cudaMemcpyAsync@PLT
movq 72(%rsp), %rdi
call cudaStreamSynchronize@PLT
jmp .L37
.L63:
leaq .LC12(%rip), %rsi
movl $2, %edi
movl $0, %eax
call __printf_chk@PLT
movl $-1, %edi
call exit@PLT
.L32:
movq 48(%rsp), %rax
movl $1, 32(%rax)
leaq 32(%rax), %rsi
movq 56(%rsp), %rax
leaq 32(%rax), %rdi
movq 72(%rsp), %r8
movl $1, %ecx
movl $4, %edx
call cudaMemcpyAsync@PLT
movq 72(%rsp), %rdi
call cudaStreamSynchronize@PLT
movq 48(%rsp), %rdi
cmpl $1, 32(%rdi)
jne .L30
.L44:
cmpl $1, 36(%rdi)
je .L30
movq 56(%rsp), %rax
leaq 36(%rax), %rsi
addq $36, %rdi
movq 72(%rsp), %r8
movl $2, %ecx
movl $4, %edx
call cudaMemcpyAsync@PLT
movq 72(%rsp), %rdi
call cudaStreamSynchronize@PLT
movq 48(%rsp), %rdi
cmpl $1, 32(%rdi)
je .L44
jmp .L30
.L31:
leaq .LC13(%rip), %rsi
movl $2, %edi
movl $0, %eax
call __printf_chk@PLT
movl $1, %edi
call exit@PLT
.L60:
call __stack_chk_fail@PLT
.cfi_endproc
.LFE2082:
.size main, .-main
.section .rodata.str1.1
.LC15:
.string "_Z16intensive_kernelPj"
.text
.type _ZL24__sti____cudaRegisterAllv, @function
_ZL24__sti____cudaRegisterAllv:
.LFB2110:
.cfi_startproc
endbr64
subq $8, %rsp
.cfi_def_cfa_offset 16
leaq _ZL15__fatDeviceText(%rip), %rdi
call __cudaRegisterFatBinary@PLT
movq %rax, %rdi
movq %rax, _ZL20__cudaFatCubinHandle(%rip)
pushq $0
.cfi_def_cfa_offset 24
pushq $0
.cfi_def_cfa_offset 32
pushq $0
.cfi_def_cfa_offset 40
pushq $0
.cfi_def_cfa_offset 48
movl $0, %r9d
movl $-1, %r8d
leaq .LC15(%rip), %rdx
movq %rdx, %rcx
leaq _Z16intensive_kernelPj(%rip), %rsi
call __cudaRegisterFunction@PLT
addq $32, %rsp
.cfi_def_cfa_offset 16
movq _ZL20__cudaFatCubinHandle(%rip), %rdi
call __cudaRegisterFatBinaryEnd@PLT
leaq _ZL26__cudaUnregisterBinaryUtilv(%rip), %rdi
call atexit@PLT
addq $8, %rsp
.cfi_def_cfa_offset 8
ret
.cfi_endproc
.LFE2110:
.size _ZL24__sti____cudaRegisterAllv, .-_ZL24__sti____cudaRegisterAllv
.section .init_array,"aw"
.align 8
.quad _ZL24__sti____cudaRegisterAllv
.section .nvFatBinSegment,"aw"
.align 8
.type _ZL15__fatDeviceText, @object
.size _ZL15__fatDeviceText, 24
_ZL15__fatDeviceText:
.long 1180844977
.long 1
.quad fatbinData
.quad 0
.local _ZL20__cudaFatCubinHandle
.comm _ZL20__cudaFatCubinHandle,8,8
.section .rodata.cst8,"aM",@progbits,8
.align 8
.LC2:
.long -858993459
.long 1072483532
.align 8
.LC3:
.long 0
.long 1138753536
.align 8
.LC6:
.long 1017048256
.long 1073599532
.align 8
.LC7:
.long -804017878
.long 1073207364
.ident "GCC: (Ubuntu 13.3.0-6ubuntu2~24.04) 13.3.0"
.section .note.GNU-stack,"",@progbits
.section .note.gnu.property,"a"
.align 8
.long 1f - 0f
.long 4f - 1f
.long 5
0:
.string "GNU"
1:
.align 8
.long 0xc0000002
.long 3f - 2f
2:
.long 0x3
3:
.align 8
4: |
You are a helpful coding assistant specialized in converting CUDA source code to HIP/AMD source code. | #include <stdio.h>
#include <cuda.h>
#include <unistd.h>
#include <signal.h>
#include <stdint.h>
#include <stdlib.h>
#include <pthread.h>
#include <sys/time.h>
#define NUM_THREADS 4
#define MEMPER 0.9
#define SIZE 1024ul
#define REQ_UNDEFINED '-'
#define REQ_IDLE ';'
#define REQ_START 'A'
#define RSP_FINISH 'Z'
#define RSP_UNDEFINED '-'
struct thread_arg{
int id;
int size;
double* doubles;
double* compare;
};
void *Increment(void *args)
{
struct thread_arg* arg;
int tid;
int size;
double* d;
int work;
arg = (struct thread_arg*) args;
tid = arg->id;
size = arg->size;
d = arg->doubles;
work = size / (8 * 8);
//printf("Tid: %d\tSize: %d\td:%p\n",tid,size,d);
for(int i = 0; i < work; i++){
d[(tid * work) + i] *= 2;
}
pthread_exit(NULL);
}
__global__ void
intensive_kernel(unsigned int *cmd){
int threadId = threadIdx.x + (blockDim.x * blockIdx.x);
double* input;
double* compare;
while (cmd[8]) {
if (threadIdx.x == 0 && blockIdx.x == 0) {
if (cmd[0] == REQ_START && cmd[1] != RSP_FINISH) {
// we've got a request for a new job
// initialize
cmd[7] = 1;
__threadfence();
}
else {
cmd[7] = 0;
cmd[1] = RSP_UNDEFINED;
__threadfence();
}
}
__syncthreads();
if (cmd[7] == 1) {
while(cmd[2] == 0);
input = (double*) ((long long)cmd[6]<<32 | cmd[5]);
compare = (double*) ((long long)cmd[4]<<32 | cmd[3]);
if(input[threadId] - compare[threadId] > 0.01){
input[threadId] = (compare[threadId] * 2) + exp(input[threadId]);
}
if (threadIdx.x == 0 && blockIdx.x == 0) {
// finitto
cmd[0] = REQ_IDLE;
cmd[1] = RSP_FINISH;
cmd[7] = 0;
__threadfence();
// host will set #threads equal to 0 after obtaining the results
while (cmd[2] != 0);
}
}
__syncthreads();
}
}
size_t
available_memory(){
size_t mem_total = 0;
size_t mem_free = 0;
cudaMemGetInfo(&mem_free, &mem_total);
printf("Total memory %dMB\tFree Memory %dMB\n",mem_total/(1024*1024),mem_free/(1024*1024));
return mem_free;
}
int
main(int argc, char **argv){
size_t available_mem = 0;
double *doubles_host;
double *doubles_device;
double *compare_host;
double *compare_device;
unsigned int* cmd_h;
unsigned int* cmd_d;
int threads;
int blocks;
int timeToRun;
int result;
cudaStream_t stream1;
cudaStream_t stream2;
struct timeval t1;
struct timeval t2;
pthread_t thread[8];
struct thread_arg args;
if(argc < 2){
printf("Usage: stresstest <duration>\n\tduration\tTime stress will run in seconds\n");
exit(EXIT_FAILURE);
}
timeToRun = atoi(argv[1]);
// system("sudo ./gpu_over.sh");
// system("sudo ./cpu_over.sh");
cudaSetDevice(0);
cudaStreamCreate(&stream1);
cudaStreamCreate(&stream2);
available_mem = available_memory() * 0.9;
printf("Allocating 90%% of the available memory: (%dMB)\n", available_mem/(1024 * 1024));
cudaMalloc((void**)&doubles_device, available_mem/4 * sizeof(char));
cudaMalloc((void**)&compare_device, available_mem/4 * sizeof(char));
cudaMalloc((void**)&cmd_d, 10 * sizeof(unsigned int));
cudaMallocHost((void **)&cmd_h, 10 * sizeof(unsigned int));
cudaMallocHost((void**)&doubles_host, available_mem/4 * sizeof(char));
cudaMallocHost((void**)&compare_host, available_mem/4 * sizeof(char));
srand(time(NULL));
printf("Initializing buffers...\n");
for(int i=0; i < available_mem/32; i++){
doubles_host[i] = i * rand() * 1.8643;
compare_host[i] = i * rand() * 1.4903;
}
printf("Finished initialization of buffers!\n\n");
cmd_h[0] = REQ_UNDEFINED;
cmd_h[1] = RSP_UNDEFINED;
cmd_h[9] = 0;
cudaMemcpy(doubles_device, doubles_host, available_mem/4 * sizeof(char), cudaMemcpyHostToDevice);
cudaMemcpy(compare_device, compare_host, available_mem/4 * sizeof(char), cudaMemcpyHostToDevice);
cudaMemcpy(cmd_h+3,&(compare_device), sizeof(double*),cudaMemcpyHostToHost);
cudaMemcpy(cmd_h+5,&(doubles_device), sizeof(double*),cudaMemcpyHostToHost);
cudaMemcpy(cmd_d, cmd_h, 10 * sizeof(unsigned int), cudaMemcpyHostToDevice);
threads = 1024;
blocks = available_mem/(16 * threads);
gettimeofday(&t1, 0);
printf("Start stressing...\n");
intensive_kernel<<<blocks,threads,0,stream1>>>(cmd_d);
pid_t pid = fork();
if(pid == 0){
//child
if(execv("./temperature", argv) == -1){
printf("Execv failed!\n");
exit(EXIT_FAILURE);
}
}
else if(pid > 0){
//parent
gettimeofday(&t2, 0);
while(t2.tv_sec - t1.tv_sec < timeToRun){
usleep(10);
cmd_h[0] = REQ_START;
cmd_h[1] = RSP_UNDEFINED;
cmd_h[2] = random() % 512;
for(int i=0; i < 8; i++ ){
args.id = i;
args.size = available_mem/4;
args.doubles = compare_host;
result = pthread_create(&thread[i], NULL,
Increment, (void *)&args);
if (result){
printf("Unable to create thread\n");
exit(-1);
}
}
for(int i = 0; i < 8; i++){
pthread_join(thread[i], NULL);
}
cudaMemcpyAsync(doubles_device, doubles_host, available_mem/4 * sizeof(char), cudaMemcpyHostToDevice, stream2);
cudaMemcpyAsync(compare_device, compare_host, available_mem/4 * sizeof(char), cudaMemcpyHostToDevice, stream2);
// first set #threads
cudaMemcpyAsync(cmd_d+2, cmd_h+2, 1 * sizeof(unsigned int), cudaMemcpyHostToDevice, stream2);
cudaStreamSynchronize(stream2);
// set RSP
cudaMemcpyAsync(cmd_d+1, cmd_h+1, 1 * sizeof(unsigned int), cudaMemcpyHostToDevice, stream2);
cudaStreamSynchronize(stream2);
// set REQ
cudaMemcpyAsync(cmd_d+0, cmd_h+0, 1 * sizeof(unsigned int), cudaMemcpyHostToDevice, stream2);
cudaStreamSynchronize(stream2);
int ready = 0;
while (((cmd_h[0] == REQ_START) && cmd_h[1] != RSP_FINISH)) {
ready = 1;
// get RSP
cudaMemcpyAsync(&cmd_h[1], &cmd_d[1], 1 * sizeof(unsigned int), cudaMemcpyDeviceToHost, stream2);
cudaStreamSynchronize(stream2);
}
if (ready == 1) {
// get data
cudaMemcpyAsync(doubles_host,doubles_device, available_mem/4 * sizeof(char), cudaMemcpyDeviceToHost, stream2);
cudaStreamSynchronize(stream2);
for(int i=0; i < 8; i++ ){
args.id = i;
args.size = available_mem/4;
args.doubles = doubles_host;
result = pthread_create(&thread[i], NULL,
Increment, (void *)&args);
if (result){
printf("Unable to create thread\n");
exit(-1);
}
}
for(int i = 0; i < 8; i++){
pthread_join(thread[i], NULL);
}
//pthread_exit(NULL);
cmd_h[0] = REQ_UNDEFINED;
cudaMemcpyAsync(&cmd_d[0], &cmd_h[0], 1 * sizeof(unsigned int), cudaMemcpyHostToDevice, stream2);
cudaStreamSynchronize(stream2);
// notify GPU by setting #threads equal to 0
cmd_h[2] = 0;
cudaMemcpyAsync(&cmd_d[2], &cmd_h[2], 1 * sizeof(unsigned int), cudaMemcpyHostToDevice, stream2);
cudaStreamSynchronize(stream2);
}
gettimeofday(&t2, 0);
}
cmd_h[8] = 1;
cudaMemcpyAsync(&cmd_d[8], &cmd_h[8], 1 * sizeof(unsigned int), cudaMemcpyHostToDevice, stream2);
cudaStreamSynchronize(stream2);
while(cmd_h[8] == 1 && cmd_h[9] != 1){
cudaMemcpyAsync(&cmd_h[9], &cmd_d[9], 1 * sizeof(unsigned int), cudaMemcpyDeviceToHost, stream2);
cudaStreamSynchronize(stream2);
}
}
else{
//error
printf("fork() failed!\n");
exit(EXIT_FAILURE);
}
cudaFree(doubles_device);
cudaFree(compare_device);
cudaFree(cmd_d);
cudaFreeHost(doubles_host);
cudaFreeHost(compare_host);
cudaFreeHost(cmd_h);
// system("sudo ./gpu_down.sh");
// system("sudo ./cpu_down.sh");
printf("Finished!\n");
} | #include <stdio.h>
#include <hip/hip_runtime.h>
#include <unistd.h>
#include <signal.h>
#include <stdint.h>
#include <stdlib.h>
#include <pthread.h>
#include <sys/time.h>
#define NUM_THREADS 4
#define MEMPER 0.9
#define SIZE 1024ul
#define REQ_UNDEFINED '-'
#define REQ_IDLE ';'
#define REQ_START 'A'
#define RSP_FINISH 'Z'
#define RSP_UNDEFINED '-'
struct thread_arg{
int id;
int size;
double* doubles;
double* compare;
};
void *Increment(void *args)
{
struct thread_arg* arg;
int tid;
int size;
double* d;
int work;
arg = (struct thread_arg*) args;
tid = arg->id;
size = arg->size;
d = arg->doubles;
work = size / (8 * 8);
//printf("Tid: %d\tSize: %d\td:%p\n",tid,size,d);
for(int i = 0; i < work; i++){
d[(tid * work) + i] *= 2;
}
pthread_exit(NULL);
}
__global__ void
intensive_kernel(unsigned int *cmd){
int threadId = threadIdx.x + (blockDim.x * blockIdx.x);
double* input;
double* compare;
while (cmd[8]) {
if (threadIdx.x == 0 && blockIdx.x == 0) {
if (cmd[0] == REQ_START && cmd[1] != RSP_FINISH) {
// we've got a request for a new job
// initialize
cmd[7] = 1;
__threadfence();
}
else {
cmd[7] = 0;
cmd[1] = RSP_UNDEFINED;
__threadfence();
}
}
__syncthreads();
if (cmd[7] == 1) {
while(cmd[2] == 0);
input = (double*) ((long long)cmd[6]<<32 | cmd[5]);
compare = (double*) ((long long)cmd[4]<<32 | cmd[3]);
if(input[threadId] - compare[threadId] > 0.01){
input[threadId] = (compare[threadId] * 2) + exp(input[threadId]);
}
if (threadIdx.x == 0 && blockIdx.x == 0) {
// finitto
cmd[0] = REQ_IDLE;
cmd[1] = RSP_FINISH;
cmd[7] = 0;
__threadfence();
// host will set #threads equal to 0 after obtaining the results
while (cmd[2] != 0);
}
}
__syncthreads();
}
}
size_t
available_memory(){
size_t mem_total = 0;
size_t mem_free = 0;
hipMemGetInfo(&mem_free, &mem_total);
printf("Total memory %dMB\tFree Memory %dMB\n",mem_total/(1024*1024),mem_free/(1024*1024));
return mem_free;
}
int
main(int argc, char **argv){
size_t available_mem = 0;
double *doubles_host;
double *doubles_device;
double *compare_host;
double *compare_device;
unsigned int* cmd_h;
unsigned int* cmd_d;
int threads;
int blocks;
int timeToRun;
int result;
hipStream_t stream1;
hipStream_t stream2;
struct timeval t1;
struct timeval t2;
pthread_t thread[8];
struct thread_arg args;
if(argc < 2){
printf("Usage: stresstest <duration>\n\tduration\tTime stress will run in seconds\n");
exit(EXIT_FAILURE);
}
timeToRun = atoi(argv[1]);
// system("sudo ./gpu_over.sh");
// system("sudo ./cpu_over.sh");
hipSetDevice(0);
hipStreamCreate(&stream1);
hipStreamCreate(&stream2);
available_mem = available_memory() * 0.9;
printf("Allocating 90%% of the available memory: (%dMB)\n", available_mem/(1024 * 1024));
hipMalloc((void**)&doubles_device, available_mem/4 * sizeof(char));
hipMalloc((void**)&compare_device, available_mem/4 * sizeof(char));
hipMalloc((void**)&cmd_d, 10 * sizeof(unsigned int));
hipHostMalloc((void **)&cmd_h, 10 * sizeof(unsigned int), hipHostMallocDefault);
hipHostMalloc((void**)&doubles_host, available_mem/4 * sizeof(char), hipHostMallocDefault);
hipHostMalloc((void**)&compare_host, available_mem/4 * sizeof(char), hipHostMallocDefault);
srand(time(NULL));
printf("Initializing buffers...\n");
for(int i=0; i < available_mem/32; i++){
doubles_host[i] = i * rand() * 1.8643;
compare_host[i] = i * rand() * 1.4903;
}
printf("Finished initialization of buffers!\n\n");
cmd_h[0] = REQ_UNDEFINED;
cmd_h[1] = RSP_UNDEFINED;
cmd_h[9] = 0;
hipMemcpy(doubles_device, doubles_host, available_mem/4 * sizeof(char), hipMemcpyHostToDevice);
hipMemcpy(compare_device, compare_host, available_mem/4 * sizeof(char), hipMemcpyHostToDevice);
hipMemcpy(cmd_h+3,&(compare_device), sizeof(double*),hipMemcpyHostToHost);
hipMemcpy(cmd_h+5,&(doubles_device), sizeof(double*),hipMemcpyHostToHost);
hipMemcpy(cmd_d, cmd_h, 10 * sizeof(unsigned int), hipMemcpyHostToDevice);
threads = 1024;
blocks = available_mem/(16 * threads);
gettimeofday(&t1, 0);
printf("Start stressing...\n");
intensive_kernel<<<blocks,threads,0,stream1>>>(cmd_d);
pid_t pid = fork();
if(pid == 0){
//child
if(execv("./temperature", argv) == -1){
printf("Execv failed!\n");
exit(EXIT_FAILURE);
}
}
else if(pid > 0){
//parent
gettimeofday(&t2, 0);
while(t2.tv_sec - t1.tv_sec < timeToRun){
usleep(10);
cmd_h[0] = REQ_START;
cmd_h[1] = RSP_UNDEFINED;
cmd_h[2] = random() % 512;
for(int i=0; i < 8; i++ ){
args.id = i;
args.size = available_mem/4;
args.doubles = compare_host;
result = pthread_create(&thread[i], NULL,
Increment, (void *)&args);
if (result){
printf("Unable to create thread\n");
exit(-1);
}
}
for(int i = 0; i < 8; i++){
pthread_join(thread[i], NULL);
}
hipMemcpyAsync(doubles_device, doubles_host, available_mem/4 * sizeof(char), hipMemcpyHostToDevice, stream2);
hipMemcpyAsync(compare_device, compare_host, available_mem/4 * sizeof(char), hipMemcpyHostToDevice, stream2);
// first set #threads
hipMemcpyAsync(cmd_d+2, cmd_h+2, 1 * sizeof(unsigned int), hipMemcpyHostToDevice, stream2);
hipStreamSynchronize(stream2);
// set RSP
hipMemcpyAsync(cmd_d+1, cmd_h+1, 1 * sizeof(unsigned int), hipMemcpyHostToDevice, stream2);
hipStreamSynchronize(stream2);
// set REQ
hipMemcpyAsync(cmd_d+0, cmd_h+0, 1 * sizeof(unsigned int), hipMemcpyHostToDevice, stream2);
hipStreamSynchronize(stream2);
int ready = 0;
while (((cmd_h[0] == REQ_START) && cmd_h[1] != RSP_FINISH)) {
ready = 1;
// get RSP
hipMemcpyAsync(&cmd_h[1], &cmd_d[1], 1 * sizeof(unsigned int), hipMemcpyDeviceToHost, stream2);
hipStreamSynchronize(stream2);
}
if (ready == 1) {
// get data
hipMemcpyAsync(doubles_host,doubles_device, available_mem/4 * sizeof(char), hipMemcpyDeviceToHost, stream2);
hipStreamSynchronize(stream2);
for(int i=0; i < 8; i++ ){
args.id = i;
args.size = available_mem/4;
args.doubles = doubles_host;
result = pthread_create(&thread[i], NULL,
Increment, (void *)&args);
if (result){
printf("Unable to create thread\n");
exit(-1);
}
}
for(int i = 0; i < 8; i++){
pthread_join(thread[i], NULL);
}
//pthread_exit(NULL);
cmd_h[0] = REQ_UNDEFINED;
hipMemcpyAsync(&cmd_d[0], &cmd_h[0], 1 * sizeof(unsigned int), hipMemcpyHostToDevice, stream2);
hipStreamSynchronize(stream2);
// notify GPU by setting #threads equal to 0
cmd_h[2] = 0;
hipMemcpyAsync(&cmd_d[2], &cmd_h[2], 1 * sizeof(unsigned int), hipMemcpyHostToDevice, stream2);
hipStreamSynchronize(stream2);
}
gettimeofday(&t2, 0);
}
cmd_h[8] = 1;
hipMemcpyAsync(&cmd_d[8], &cmd_h[8], 1 * sizeof(unsigned int), hipMemcpyHostToDevice, stream2);
hipStreamSynchronize(stream2);
while(cmd_h[8] == 1 && cmd_h[9] != 1){
hipMemcpyAsync(&cmd_h[9], &cmd_d[9], 1 * sizeof(unsigned int), hipMemcpyDeviceToHost, stream2);
hipStreamSynchronize(stream2);
}
}
else{
//error
printf("fork() failed!\n");
exit(EXIT_FAILURE);
}
hipFree(doubles_device);
hipFree(compare_device);
hipFree(cmd_d);
hipHostFree(doubles_host);
hipHostFree(compare_host);
hipHostFree(cmd_h);
// system("sudo ./gpu_down.sh");
// system("sudo ./cpu_down.sh");
printf("Finished!\n");
} |
You are a helpful coding assistant specialized in converting HIP source code to AMD device assembly. | #include <stdio.h>
#include <hip/hip_runtime.h>
#include <unistd.h>
#include <signal.h>
#include <stdint.h>
#include <stdlib.h>
#include <pthread.h>
#include <sys/time.h>
#define NUM_THREADS 4
#define MEMPER 0.9
#define SIZE 1024ul
#define REQ_UNDEFINED '-'
#define REQ_IDLE ';'
#define REQ_START 'A'
#define RSP_FINISH 'Z'
#define RSP_UNDEFINED '-'
struct thread_arg{
int id;
int size;
double* doubles;
double* compare;
};
void *Increment(void *args)
{
struct thread_arg* arg;
int tid;
int size;
double* d;
int work;
arg = (struct thread_arg*) args;
tid = arg->id;
size = arg->size;
d = arg->doubles;
work = size / (8 * 8);
//printf("Tid: %d\tSize: %d\td:%p\n",tid,size,d);
for(int i = 0; i < work; i++){
d[(tid * work) + i] *= 2;
}
pthread_exit(NULL);
}
__global__ void
intensive_kernel(unsigned int *cmd){
int threadId = threadIdx.x + (blockDim.x * blockIdx.x);
double* input;
double* compare;
while (cmd[8]) {
if (threadIdx.x == 0 && blockIdx.x == 0) {
if (cmd[0] == REQ_START && cmd[1] != RSP_FINISH) {
// we've got a request for a new job
// initialize
cmd[7] = 1;
__threadfence();
}
else {
cmd[7] = 0;
cmd[1] = RSP_UNDEFINED;
__threadfence();
}
}
__syncthreads();
if (cmd[7] == 1) {
while(cmd[2] == 0);
input = (double*) ((long long)cmd[6]<<32 | cmd[5]);
compare = (double*) ((long long)cmd[4]<<32 | cmd[3]);
if(input[threadId] - compare[threadId] > 0.01){
input[threadId] = (compare[threadId] * 2) + exp(input[threadId]);
}
if (threadIdx.x == 0 && blockIdx.x == 0) {
// finitto
cmd[0] = REQ_IDLE;
cmd[1] = RSP_FINISH;
cmd[7] = 0;
__threadfence();
// host will set #threads equal to 0 after obtaining the results
while (cmd[2] != 0);
}
}
__syncthreads();
}
}
size_t
available_memory(){
size_t mem_total = 0;
size_t mem_free = 0;
hipMemGetInfo(&mem_free, &mem_total);
printf("Total memory %dMB\tFree Memory %dMB\n",mem_total/(1024*1024),mem_free/(1024*1024));
return mem_free;
}
int
main(int argc, char **argv){
size_t available_mem = 0;
double *doubles_host;
double *doubles_device;
double *compare_host;
double *compare_device;
unsigned int* cmd_h;
unsigned int* cmd_d;
int threads;
int blocks;
int timeToRun;
int result;
hipStream_t stream1;
hipStream_t stream2;
struct timeval t1;
struct timeval t2;
pthread_t thread[8];
struct thread_arg args;
if(argc < 2){
printf("Usage: stresstest <duration>\n\tduration\tTime stress will run in seconds\n");
exit(EXIT_FAILURE);
}
timeToRun = atoi(argv[1]);
// system("sudo ./gpu_over.sh");
// system("sudo ./cpu_over.sh");
hipSetDevice(0);
hipStreamCreate(&stream1);
hipStreamCreate(&stream2);
available_mem = available_memory() * 0.9;
printf("Allocating 90%% of the available memory: (%dMB)\n", available_mem/(1024 * 1024));
hipMalloc((void**)&doubles_device, available_mem/4 * sizeof(char));
hipMalloc((void**)&compare_device, available_mem/4 * sizeof(char));
hipMalloc((void**)&cmd_d, 10 * sizeof(unsigned int));
hipHostMalloc((void **)&cmd_h, 10 * sizeof(unsigned int), hipHostMallocDefault);
hipHostMalloc((void**)&doubles_host, available_mem/4 * sizeof(char), hipHostMallocDefault);
hipHostMalloc((void**)&compare_host, available_mem/4 * sizeof(char), hipHostMallocDefault);
srand(time(NULL));
printf("Initializing buffers...\n");
for(int i=0; i < available_mem/32; i++){
doubles_host[i] = i * rand() * 1.8643;
compare_host[i] = i * rand() * 1.4903;
}
printf("Finished initialization of buffers!\n\n");
cmd_h[0] = REQ_UNDEFINED;
cmd_h[1] = RSP_UNDEFINED;
cmd_h[9] = 0;
hipMemcpy(doubles_device, doubles_host, available_mem/4 * sizeof(char), hipMemcpyHostToDevice);
hipMemcpy(compare_device, compare_host, available_mem/4 * sizeof(char), hipMemcpyHostToDevice);
hipMemcpy(cmd_h+3,&(compare_device), sizeof(double*),hipMemcpyHostToHost);
hipMemcpy(cmd_h+5,&(doubles_device), sizeof(double*),hipMemcpyHostToHost);
hipMemcpy(cmd_d, cmd_h, 10 * sizeof(unsigned int), hipMemcpyHostToDevice);
threads = 1024;
blocks = available_mem/(16 * threads);
gettimeofday(&t1, 0);
printf("Start stressing...\n");
intensive_kernel<<<blocks,threads,0,stream1>>>(cmd_d);
pid_t pid = fork();
if(pid == 0){
//child
if(execv("./temperature", argv) == -1){
printf("Execv failed!\n");
exit(EXIT_FAILURE);
}
}
else if(pid > 0){
//parent
gettimeofday(&t2, 0);
while(t2.tv_sec - t1.tv_sec < timeToRun){
usleep(10);
cmd_h[0] = REQ_START;
cmd_h[1] = RSP_UNDEFINED;
cmd_h[2] = random() % 512;
for(int i=0; i < 8; i++ ){
args.id = i;
args.size = available_mem/4;
args.doubles = compare_host;
result = pthread_create(&thread[i], NULL,
Increment, (void *)&args);
if (result){
printf("Unable to create thread\n");
exit(-1);
}
}
for(int i = 0; i < 8; i++){
pthread_join(thread[i], NULL);
}
hipMemcpyAsync(doubles_device, doubles_host, available_mem/4 * sizeof(char), hipMemcpyHostToDevice, stream2);
hipMemcpyAsync(compare_device, compare_host, available_mem/4 * sizeof(char), hipMemcpyHostToDevice, stream2);
// first set #threads
hipMemcpyAsync(cmd_d+2, cmd_h+2, 1 * sizeof(unsigned int), hipMemcpyHostToDevice, stream2);
hipStreamSynchronize(stream2);
// set RSP
hipMemcpyAsync(cmd_d+1, cmd_h+1, 1 * sizeof(unsigned int), hipMemcpyHostToDevice, stream2);
hipStreamSynchronize(stream2);
// set REQ
hipMemcpyAsync(cmd_d+0, cmd_h+0, 1 * sizeof(unsigned int), hipMemcpyHostToDevice, stream2);
hipStreamSynchronize(stream2);
int ready = 0;
while (((cmd_h[0] == REQ_START) && cmd_h[1] != RSP_FINISH)) {
ready = 1;
// get RSP
hipMemcpyAsync(&cmd_h[1], &cmd_d[1], 1 * sizeof(unsigned int), hipMemcpyDeviceToHost, stream2);
hipStreamSynchronize(stream2);
}
if (ready == 1) {
// get data
hipMemcpyAsync(doubles_host,doubles_device, available_mem/4 * sizeof(char), hipMemcpyDeviceToHost, stream2);
hipStreamSynchronize(stream2);
for(int i=0; i < 8; i++ ){
args.id = i;
args.size = available_mem/4;
args.doubles = doubles_host;
result = pthread_create(&thread[i], NULL,
Increment, (void *)&args);
if (result){
printf("Unable to create thread\n");
exit(-1);
}
}
for(int i = 0; i < 8; i++){
pthread_join(thread[i], NULL);
}
//pthread_exit(NULL);
cmd_h[0] = REQ_UNDEFINED;
hipMemcpyAsync(&cmd_d[0], &cmd_h[0], 1 * sizeof(unsigned int), hipMemcpyHostToDevice, stream2);
hipStreamSynchronize(stream2);
// notify GPU by setting #threads equal to 0
cmd_h[2] = 0;
hipMemcpyAsync(&cmd_d[2], &cmd_h[2], 1 * sizeof(unsigned int), hipMemcpyHostToDevice, stream2);
hipStreamSynchronize(stream2);
}
gettimeofday(&t2, 0);
}
cmd_h[8] = 1;
hipMemcpyAsync(&cmd_d[8], &cmd_h[8], 1 * sizeof(unsigned int), hipMemcpyHostToDevice, stream2);
hipStreamSynchronize(stream2);
while(cmd_h[8] == 1 && cmd_h[9] != 1){
hipMemcpyAsync(&cmd_h[9], &cmd_d[9], 1 * sizeof(unsigned int), hipMemcpyDeviceToHost, stream2);
hipStreamSynchronize(stream2);
}
}
else{
//error
printf("fork() failed!\n");
exit(EXIT_FAILURE);
}
hipFree(doubles_device);
hipFree(compare_device);
hipFree(cmd_d);
hipHostFree(doubles_host);
hipHostFree(compare_host);
hipHostFree(cmd_h);
// system("sudo ./gpu_down.sh");
// system("sudo ./cpu_down.sh");
printf("Finished!\n");
} | .text
.amdgcn_target "amdgcn-amd-amdhsa--gfx1100"
.protected _Z16intensive_kernelPj
.globl _Z16intensive_kernelPj
.p2align 8
.type _Z16intensive_kernelPj,@function
_Z16intensive_kernelPj:
s_load_b64 s[2:3], s[0:1], 0x0
s_waitcnt lgkmcnt(0)
s_load_b32 s4, s[2:3], 0x20
s_waitcnt lgkmcnt(0)
s_cmp_eq_u32 s4, 0
s_cbranch_scc1 .LBB0_16
s_load_b32 s0, s[0:1], 0x14
v_or_b32_e32 v3, s15, v0
v_dual_mov_b32 v8, 0 :: v_dual_mov_b32 v9, 1
v_mov_b32_e32 v10, 45
s_mov_b32 s5, 0x3f847ae1
s_mov_b32 s4, 0x47ae147b
s_mov_b32 s7, 0x3ff71547
s_mov_b32 s6, 0x652b82fe
s_mov_b32 s9, 0xbfe62e42
s_mov_b32 s8, 0xfefa39ef
s_mov_b32 s11, 0xbc7abc9e
s_mov_b32 s10, 0x3b39803f
s_mov_b32 s13, 0x3e928af3
s_mov_b32 s12, 0xfca7ab0c
s_mov_b32 s17, 0x3e5ade15
s_mov_b32 s16, 0x6a5dcb37
s_mov_b32 s19, 0x3ec71dee
s_mov_b32 s18, 0x623fde64
s_mov_b32 s14, 0x7c89e6b0
s_waitcnt lgkmcnt(0)
s_and_b32 s0, s0, 0xffff
s_mov_b32 s21, 0x3f2a01a0
v_mad_u64_u32 v[1:2], null, s15, s0, v[0:1]
v_cmp_eq_u32_e64 s0, 0, v3
s_mov_b32 s15, 0x3efa0199
s_mov_b32 s20, 0x14761f6e
s_mov_b32 s23, 0x3f56c16c
s_mov_b32 s22, 0x1852b7b0
s_mov_b32 s25, 0x3f811111
s_delay_alu instid0(VALU_DEP_2)
v_ashrrev_i32_e32 v2, 31, v1
s_mov_b32 s24, 0x11122322
s_mov_b32 s27, 0x3fa55555
s_mov_b32 s26, 0x555502a1
s_mov_b32 s29, 0x3fc55555
v_lshlrev_b64 v[0:1], 3, v[1:2]
s_mov_b32 s28, 0x55555511
s_mov_b32 s31, 0x3fe00000
s_mov_b32 s30, 11
s_branch .LBB0_4
.LBB0_2:
s_or_b32 exec_lo, exec_lo, s1
.LBB0_3:
s_waitcnt lgkmcnt(0)
s_waitcnt_vscnt null, 0x0
s_barrier
buffer_gl0_inv
global_load_b32 v2, v8, s[2:3] offset:32
s_waitcnt vmcnt(0)
v_cmp_ne_u32_e32 vcc_lo, 0, v2
s_cbranch_vccz .LBB0_16
.LBB0_4:
s_and_saveexec_b32 s1, s0
s_cbranch_execz .LBB0_11
global_load_b32 v2, v8, s[2:3]
s_waitcnt vmcnt(0)
v_cmp_ne_u32_e64 s33, 0x41, v2
s_delay_alu instid0(VALU_DEP_1)
s_and_b32 vcc_lo, exec_lo, s33
s_cbranch_vccnz .LBB0_8
global_load_b32 v2, v8, s[2:3] offset:4
s_mov_b32 s33, -1
s_waitcnt vmcnt(0)
v_cmp_ne_u32_e32 vcc_lo, 0x5a, v2
s_cbranch_vccz .LBB0_8
s_mov_b32 s33, 0
global_store_b32 v8, v9, s[2:3] offset:28
.LBB0_8:
s_and_b32 vcc_lo, exec_lo, s33
s_cbranch_vccz .LBB0_10
s_clause 0x1
global_store_b32 v8, v8, s[2:3] offset:28
global_store_b32 v8, v10, s[2:3] offset:4
.LBB0_10:
s_waitcnt_vscnt null, 0x0
buffer_gl1_inv
buffer_gl0_inv
.LBB0_11:
s_or_b32 exec_lo, exec_lo, s1
s_barrier
buffer_gl0_inv
global_load_b32 v2, v8, s[2:3] offset:28
s_waitcnt vmcnt(0)
v_cmp_ne_u32_e32 vcc_lo, 1, v2
s_cbranch_vccnz .LBB0_3
global_load_b128 v[4:7], v8, s[2:3] offset:12
s_mov_b32 s33, exec_lo
s_waitcnt vmcnt(0)
v_add_co_u32 v2, vcc_lo, v6, v0
v_add_co_ci_u32_e32 v3, vcc_lo, v7, v1, vcc_lo
v_add_co_u32 v4, vcc_lo, v4, v0
v_add_co_ci_u32_e32 v5, vcc_lo, v5, v1, vcc_lo
flat_load_b64 v[6:7], v[2:3]
flat_load_b64 v[4:5], v[4:5]
s_waitcnt vmcnt(0) lgkmcnt(0)
v_add_f64 v[11:12], v[6:7], -v[4:5]
s_delay_alu instid0(VALU_DEP_1)
v_cmpx_lt_f64_e32 s[4:5], v[11:12]
s_cbranch_execz .LBB0_14
v_mul_f64 v[11:12], v[6:7], s[6:7]
v_cmp_nlt_f64_e32 vcc_lo, 0x40900000, v[6:7]
v_cmp_ngt_f64_e64 s1, 0xc090cc00, v[6:7]
s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_1)
v_rndne_f64_e32 v[11:12], v[11:12]
v_fma_f64 v[13:14], v[11:12], s[8:9], v[6:7]
v_cvt_i32_f64_e32 v17, v[11:12]
s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
v_fma_f64 v[13:14], v[11:12], s[10:11], v[13:14]
v_fma_f64 v[15:16], v[13:14], s[16:17], s[12:13]
s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
v_fma_f64 v[15:16], v[13:14], v[15:16], s[18:19]
v_fma_f64 v[15:16], v[13:14], v[15:16], s[14:15]
s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
v_fma_f64 v[15:16], v[13:14], v[15:16], s[20:21]
v_fma_f64 v[15:16], v[13:14], v[15:16], s[22:23]
s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
v_fma_f64 v[15:16], v[13:14], v[15:16], s[24:25]
v_fma_f64 v[15:16], v[13:14], v[15:16], s[26:27]
s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
v_fma_f64 v[15:16], v[13:14], v[15:16], s[28:29]
v_fma_f64 v[15:16], v[13:14], v[15:16], s[30:31]
s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
v_fma_f64 v[15:16], v[13:14], v[15:16], 1.0
v_fma_f64 v[11:12], v[13:14], v[15:16], 1.0
s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
v_ldexp_f64 v[11:12], v[11:12], v17
v_cndmask_b32_e32 v12, 0x7ff00000, v12, vcc_lo
s_and_b32 vcc_lo, s1, vcc_lo
s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
v_cndmask_b32_e32 v6, 0, v11, vcc_lo
v_cndmask_b32_e64 v7, 0, v12, s1
s_delay_alu instid0(VALU_DEP_1)
v_fma_f64 v[4:5], v[4:5], 2.0, v[6:7]
flat_store_b64 v[2:3], v[4:5]
.LBB0_14:
s_or_b32 exec_lo, exec_lo, s33
s_and_saveexec_b32 s1, s0
s_cbranch_execz .LBB0_2
v_dual_mov_b32 v2, 59 :: v_dual_mov_b32 v3, 0x5a
s_clause 0x1
global_store_b64 v8, v[2:3], s[2:3]
global_store_b32 v8, v8, s[2:3] offset:28
s_waitcnt lgkmcnt(0)
s_waitcnt_vscnt null, 0x0
buffer_gl1_inv
buffer_gl0_inv
s_branch .LBB0_2
.LBB0_16:
s_endpgm
.section .rodata,"a",@progbits
.p2align 6, 0x0
.amdhsa_kernel _Z16intensive_kernelPj
.amdhsa_group_segment_fixed_size 0
.amdhsa_private_segment_fixed_size 0
.amdhsa_kernarg_size 264
.amdhsa_user_sgpr_count 15
.amdhsa_user_sgpr_dispatch_ptr 0
.amdhsa_user_sgpr_queue_ptr 0
.amdhsa_user_sgpr_kernarg_segment_ptr 1
.amdhsa_user_sgpr_dispatch_id 0
.amdhsa_user_sgpr_private_segment_size 0
.amdhsa_wavefront_size32 1
.amdhsa_uses_dynamic_stack 0
.amdhsa_enable_private_segment 0
.amdhsa_system_sgpr_workgroup_id_x 1
.amdhsa_system_sgpr_workgroup_id_y 0
.amdhsa_system_sgpr_workgroup_id_z 0
.amdhsa_system_sgpr_workgroup_info 0
.amdhsa_system_vgpr_workitem_id 0
.amdhsa_next_free_vgpr 18
.amdhsa_next_free_sgpr 34
.amdhsa_float_round_mode_32 0
.amdhsa_float_round_mode_16_64 0
.amdhsa_float_denorm_mode_32 3
.amdhsa_float_denorm_mode_16_64 3
.amdhsa_dx10_clamp 1
.amdhsa_ieee_mode 1
.amdhsa_fp16_overflow 0
.amdhsa_workgroup_processor_mode 1
.amdhsa_memory_ordered 1
.amdhsa_forward_progress 0
.amdhsa_shared_vgpr_count 0
.amdhsa_exception_fp_ieee_invalid_op 0
.amdhsa_exception_fp_denorm_src 0
.amdhsa_exception_fp_ieee_div_zero 0
.amdhsa_exception_fp_ieee_overflow 0
.amdhsa_exception_fp_ieee_underflow 0
.amdhsa_exception_fp_ieee_inexact 0
.amdhsa_exception_int_div_zero 0
.end_amdhsa_kernel
.text
.Lfunc_end0:
.size _Z16intensive_kernelPj, .Lfunc_end0-_Z16intensive_kernelPj
.section .AMDGPU.csdata,"",@progbits
.text
.p2alignl 7, 3214868480
.fill 96, 4, 3214868480
.type __hip_cuid_,@object
.section .bss,"aw",@nobits
.globl __hip_cuid_
__hip_cuid_:
.byte 0
.size __hip_cuid_, 1
.ident "AMD clang version 18.0.0git (https://github.com/RadeonOpenCompute/llvm-project roc-6.3.2 25012 e5bf7e55c91490b07c49d8960fa7983d864936c4)"
.section ".note.GNU-stack","",@progbits
.addrsig
.addrsig_sym __hip_cuid_
.amdgpu_metadata
---
amdhsa.kernels:
- .args:
- .address_space: global
.offset: 0
.size: 8
.value_kind: global_buffer
- .offset: 8
.size: 4
.value_kind: hidden_block_count_x
- .offset: 12
.size: 4
.value_kind: hidden_block_count_y
- .offset: 16
.size: 4
.value_kind: hidden_block_count_z
- .offset: 20
.size: 2
.value_kind: hidden_group_size_x
- .offset: 22
.size: 2
.value_kind: hidden_group_size_y
- .offset: 24
.size: 2
.value_kind: hidden_group_size_z
- .offset: 26
.size: 2
.value_kind: hidden_remainder_x
- .offset: 28
.size: 2
.value_kind: hidden_remainder_y
- .offset: 30
.size: 2
.value_kind: hidden_remainder_z
- .offset: 48
.size: 8
.value_kind: hidden_global_offset_x
- .offset: 56
.size: 8
.value_kind: hidden_global_offset_y
- .offset: 64
.size: 8
.value_kind: hidden_global_offset_z
- .offset: 72
.size: 2
.value_kind: hidden_grid_dims
.group_segment_fixed_size: 0
.kernarg_segment_align: 8
.kernarg_segment_size: 264
.language: OpenCL C
.language_version:
- 2
- 0
.max_flat_workgroup_size: 1024
.name: _Z16intensive_kernelPj
.private_segment_fixed_size: 0
.sgpr_count: 36
.sgpr_spill_count: 0
.symbol: _Z16intensive_kernelPj.kd
.uniform_work_group_size: 1
.uses_dynamic_stack: false
.vgpr_count: 18
.vgpr_spill_count: 0
.wavefront_size: 32
.workgroup_processor_mode: 1
amdhsa.target: amdgcn-amd-amdhsa--gfx1100
amdhsa.version:
- 1
- 2
...
.end_amdgpu_metadata |
You are a helpful coding assistant specialized in converting HIP source code to AMD host assembly. | #include <stdio.h>
#include <hip/hip_runtime.h>
#include <unistd.h>
#include <signal.h>
#include <stdint.h>
#include <stdlib.h>
#include <pthread.h>
#include <sys/time.h>
#define NUM_THREADS 4
#define MEMPER 0.9
#define SIZE 1024ul
#define REQ_UNDEFINED '-'
#define REQ_IDLE ';'
#define REQ_START 'A'
#define RSP_FINISH 'Z'
#define RSP_UNDEFINED '-'
struct thread_arg{
int id;
int size;
double* doubles;
double* compare;
};
void *Increment(void *args)
{
struct thread_arg* arg;
int tid;
int size;
double* d;
int work;
arg = (struct thread_arg*) args;
tid = arg->id;
size = arg->size;
d = arg->doubles;
work = size / (8 * 8);
//printf("Tid: %d\tSize: %d\td:%p\n",tid,size,d);
for(int i = 0; i < work; i++){
d[(tid * work) + i] *= 2;
}
pthread_exit(NULL);
}
__global__ void
intensive_kernel(unsigned int *cmd){
int threadId = threadIdx.x + (blockDim.x * blockIdx.x);
double* input;
double* compare;
while (cmd[8]) {
if (threadIdx.x == 0 && blockIdx.x == 0) {
if (cmd[0] == REQ_START && cmd[1] != RSP_FINISH) {
// we've got a request for a new job
// initialize
cmd[7] = 1;
__threadfence();
}
else {
cmd[7] = 0;
cmd[1] = RSP_UNDEFINED;
__threadfence();
}
}
__syncthreads();
if (cmd[7] == 1) {
while(cmd[2] == 0);
input = (double*) ((long long)cmd[6]<<32 | cmd[5]);
compare = (double*) ((long long)cmd[4]<<32 | cmd[3]);
if(input[threadId] - compare[threadId] > 0.01){
input[threadId] = (compare[threadId] * 2) + exp(input[threadId]);
}
if (threadIdx.x == 0 && blockIdx.x == 0) {
// finitto
cmd[0] = REQ_IDLE;
cmd[1] = RSP_FINISH;
cmd[7] = 0;
__threadfence();
// host will set #threads equal to 0 after obtaining the results
while (cmd[2] != 0);
}
}
__syncthreads();
}
}
size_t
available_memory(){
size_t mem_total = 0;
size_t mem_free = 0;
hipMemGetInfo(&mem_free, &mem_total);
printf("Total memory %dMB\tFree Memory %dMB\n",mem_total/(1024*1024),mem_free/(1024*1024));
return mem_free;
}
int
main(int argc, char **argv){
size_t available_mem = 0;
double *doubles_host;
double *doubles_device;
double *compare_host;
double *compare_device;
unsigned int* cmd_h;
unsigned int* cmd_d;
int threads;
int blocks;
int timeToRun;
int result;
hipStream_t stream1;
hipStream_t stream2;
struct timeval t1;
struct timeval t2;
pthread_t thread[8];
struct thread_arg args;
if(argc < 2){
printf("Usage: stresstest <duration>\n\tduration\tTime stress will run in seconds\n");
exit(EXIT_FAILURE);
}
timeToRun = atoi(argv[1]);
// system("sudo ./gpu_over.sh");
// system("sudo ./cpu_over.sh");
hipSetDevice(0);
hipStreamCreate(&stream1);
hipStreamCreate(&stream2);
available_mem = available_memory() * 0.9;
printf("Allocating 90%% of the available memory: (%dMB)\n", available_mem/(1024 * 1024));
hipMalloc((void**)&doubles_device, available_mem/4 * sizeof(char));
hipMalloc((void**)&compare_device, available_mem/4 * sizeof(char));
hipMalloc((void**)&cmd_d, 10 * sizeof(unsigned int));
hipHostMalloc((void **)&cmd_h, 10 * sizeof(unsigned int), hipHostMallocDefault);
hipHostMalloc((void**)&doubles_host, available_mem/4 * sizeof(char), hipHostMallocDefault);
hipHostMalloc((void**)&compare_host, available_mem/4 * sizeof(char), hipHostMallocDefault);
srand(time(NULL));
printf("Initializing buffers...\n");
for(int i=0; i < available_mem/32; i++){
doubles_host[i] = i * rand() * 1.8643;
compare_host[i] = i * rand() * 1.4903;
}
printf("Finished initialization of buffers!\n\n");
cmd_h[0] = REQ_UNDEFINED;
cmd_h[1] = RSP_UNDEFINED;
cmd_h[9] = 0;
hipMemcpy(doubles_device, doubles_host, available_mem/4 * sizeof(char), hipMemcpyHostToDevice);
hipMemcpy(compare_device, compare_host, available_mem/4 * sizeof(char), hipMemcpyHostToDevice);
hipMemcpy(cmd_h+3,&(compare_device), sizeof(double*),hipMemcpyHostToHost);
hipMemcpy(cmd_h+5,&(doubles_device), sizeof(double*),hipMemcpyHostToHost);
hipMemcpy(cmd_d, cmd_h, 10 * sizeof(unsigned int), hipMemcpyHostToDevice);
threads = 1024;
blocks = available_mem/(16 * threads);
gettimeofday(&t1, 0);
printf("Start stressing...\n");
intensive_kernel<<<blocks,threads,0,stream1>>>(cmd_d);
pid_t pid = fork();
if(pid == 0){
//child
if(execv("./temperature", argv) == -1){
printf("Execv failed!\n");
exit(EXIT_FAILURE);
}
}
else if(pid > 0){
//parent
gettimeofday(&t2, 0);
while(t2.tv_sec - t1.tv_sec < timeToRun){
usleep(10);
cmd_h[0] = REQ_START;
cmd_h[1] = RSP_UNDEFINED;
cmd_h[2] = random() % 512;
for(int i=0; i < 8; i++ ){
args.id = i;
args.size = available_mem/4;
args.doubles = compare_host;
result = pthread_create(&thread[i], NULL,
Increment, (void *)&args);
if (result){
printf("Unable to create thread\n");
exit(-1);
}
}
for(int i = 0; i < 8; i++){
pthread_join(thread[i], NULL);
}
hipMemcpyAsync(doubles_device, doubles_host, available_mem/4 * sizeof(char), hipMemcpyHostToDevice, stream2);
hipMemcpyAsync(compare_device, compare_host, available_mem/4 * sizeof(char), hipMemcpyHostToDevice, stream2);
// first set #threads
hipMemcpyAsync(cmd_d+2, cmd_h+2, 1 * sizeof(unsigned int), hipMemcpyHostToDevice, stream2);
hipStreamSynchronize(stream2);
// set RSP
hipMemcpyAsync(cmd_d+1, cmd_h+1, 1 * sizeof(unsigned int), hipMemcpyHostToDevice, stream2);
hipStreamSynchronize(stream2);
// set REQ
hipMemcpyAsync(cmd_d+0, cmd_h+0, 1 * sizeof(unsigned int), hipMemcpyHostToDevice, stream2);
hipStreamSynchronize(stream2);
int ready = 0;
while (((cmd_h[0] == REQ_START) && cmd_h[1] != RSP_FINISH)) {
ready = 1;
// get RSP
hipMemcpyAsync(&cmd_h[1], &cmd_d[1], 1 * sizeof(unsigned int), hipMemcpyDeviceToHost, stream2);
hipStreamSynchronize(stream2);
}
if (ready == 1) {
// get data
hipMemcpyAsync(doubles_host,doubles_device, available_mem/4 * sizeof(char), hipMemcpyDeviceToHost, stream2);
hipStreamSynchronize(stream2);
for(int i=0; i < 8; i++ ){
args.id = i;
args.size = available_mem/4;
args.doubles = doubles_host;
result = pthread_create(&thread[i], NULL,
Increment, (void *)&args);
if (result){
printf("Unable to create thread\n");
exit(-1);
}
}
for(int i = 0; i < 8; i++){
pthread_join(thread[i], NULL);
}
//pthread_exit(NULL);
cmd_h[0] = REQ_UNDEFINED;
hipMemcpyAsync(&cmd_d[0], &cmd_h[0], 1 * sizeof(unsigned int), hipMemcpyHostToDevice, stream2);
hipStreamSynchronize(stream2);
// notify GPU by setting #threads equal to 0
cmd_h[2] = 0;
hipMemcpyAsync(&cmd_d[2], &cmd_h[2], 1 * sizeof(unsigned int), hipMemcpyHostToDevice, stream2);
hipStreamSynchronize(stream2);
}
gettimeofday(&t2, 0);
}
cmd_h[8] = 1;
hipMemcpyAsync(&cmd_d[8], &cmd_h[8], 1 * sizeof(unsigned int), hipMemcpyHostToDevice, stream2);
hipStreamSynchronize(stream2);
while(cmd_h[8] == 1 && cmd_h[9] != 1){
hipMemcpyAsync(&cmd_h[9], &cmd_d[9], 1 * sizeof(unsigned int), hipMemcpyDeviceToHost, stream2);
hipStreamSynchronize(stream2);
}
}
else{
//error
printf("fork() failed!\n");
exit(EXIT_FAILURE);
}
hipFree(doubles_device);
hipFree(compare_device);
hipFree(cmd_d);
hipHostFree(doubles_host);
hipHostFree(compare_host);
hipHostFree(cmd_h);
// system("sudo ./gpu_down.sh");
// system("sudo ./cpu_down.sh");
printf("Finished!\n");
} | .text
.file "main.hip"
.globl _Z9IncrementPv # -- Begin function _Z9IncrementPv
.p2align 4, 0x90
.type _Z9IncrementPv,@function
_Z9IncrementPv: # @_Z9IncrementPv
.cfi_startproc
# %bb.0:
pushq %rax
.cfi_def_cfa_offset 16
movl 4(%rdi), %eax
cmpl $64, %eax
jl .LBB0_3
# %bb.1: # %.lr.ph
movq 8(%rdi), %rcx
shrl $6, %eax
movslq (%rdi), %rdx
imulq %rax, %rdx
leaq (%rcx,%rdx,8), %rcx
xorl %edx, %edx
.p2align 4, 0x90
.LBB0_2: # =>This Inner Loop Header: Depth=1
movsd (%rcx,%rdx,8), %xmm0 # xmm0 = mem[0],zero
addsd %xmm0, %xmm0
movsd %xmm0, (%rcx,%rdx,8)
incq %rdx
cmpq %rdx, %rax
jne .LBB0_2
.LBB0_3: # %._crit_edge
xorl %edi, %edi
callq pthread_exit
.Lfunc_end0:
.size _Z9IncrementPv, .Lfunc_end0-_Z9IncrementPv
.cfi_endproc
# -- End function
.globl _Z31__device_stub__intensive_kernelPj # -- Begin function _Z31__device_stub__intensive_kernelPj
.p2align 4, 0x90
.type _Z31__device_stub__intensive_kernelPj,@function
_Z31__device_stub__intensive_kernelPj: # @_Z31__device_stub__intensive_kernelPj
.cfi_startproc
# %bb.0:
subq $72, %rsp
.cfi_def_cfa_offset 80
movq %rdi, 64(%rsp)
leaq 64(%rsp), %rax
movq %rax, (%rsp)
leaq 48(%rsp), %rdi
leaq 32(%rsp), %rsi
leaq 24(%rsp), %rdx
leaq 16(%rsp), %rcx
callq __hipPopCallConfiguration
movq 48(%rsp), %rsi
movl 56(%rsp), %edx
movq 32(%rsp), %rcx
movl 40(%rsp), %r8d
movq %rsp, %r9
movl $_Z16intensive_kernelPj, %edi
pushq 16(%rsp)
.cfi_adjust_cfa_offset 8
pushq 32(%rsp)
.cfi_adjust_cfa_offset 8
callq hipLaunchKernel
addq $88, %rsp
.cfi_adjust_cfa_offset -88
retq
.Lfunc_end1:
.size _Z31__device_stub__intensive_kernelPj, .Lfunc_end1-_Z31__device_stub__intensive_kernelPj
.cfi_endproc
# -- End function
.globl _Z16available_memoryv # -- Begin function _Z16available_memoryv
.p2align 4, 0x90
.type _Z16available_memoryv,@function
_Z16available_memoryv: # @_Z16available_memoryv
.cfi_startproc
# %bb.0:
subq $24, %rsp
.cfi_def_cfa_offset 32
movq $0, 16(%rsp)
movq $0, 8(%rsp)
leaq 8(%rsp), %rdi
leaq 16(%rsp), %rsi
callq hipMemGetInfo
movq 16(%rsp), %rsi
shrq $20, %rsi
movq 8(%rsp), %rdx
shrq $20, %rdx
movl $.L.str, %edi
xorl %eax, %eax
callq printf
movq 8(%rsp), %rax
addq $24, %rsp
.cfi_def_cfa_offset 8
retq
.Lfunc_end2:
.size _Z16available_memoryv, .Lfunc_end2-_Z16available_memoryv
.cfi_endproc
# -- End function
.section .rodata.cst16,"aM",@progbits,16
.p2align 4, 0x0 # -- Begin function main
.LCPI3_0:
.long 1127219200 # 0x43300000
.long 1160773632 # 0x45300000
.long 0 # 0x0
.long 0 # 0x0
.LCPI3_1:
.quad 0x4330000000000000 # double 4503599627370496
.quad 0x4530000000000000 # double 1.9342813113834067E+25
.section .rodata.cst8,"aM",@progbits,8
.p2align 3, 0x0
.LCPI3_2:
.quad 0x3feccccccccccccd # double 0.90000000000000002
.LCPI3_3:
.quad 0x43e0000000000000 # double 9.2233720368547758E+18
.LCPI3_4:
.quad 0x3ffdd42c3c9eecc0 # double 1.8643000000000001
.LCPI3_5:
.quad 0x3ff7d844d013a92a # double 1.4903
.text
.globl main
.p2align 4, 0x90
.type main,@function
main: # @main
.cfi_startproc
# %bb.0:
pushq %rbp
.cfi_def_cfa_offset 16
pushq %r15
.cfi_def_cfa_offset 24
pushq %r14
.cfi_def_cfa_offset 32
pushq %r13
.cfi_def_cfa_offset 40
pushq %r12
.cfi_def_cfa_offset 48
pushq %rbx
.cfi_def_cfa_offset 56
subq $216, %rsp
.cfi_def_cfa_offset 272
.cfi_offset %rbx, -56
.cfi_offset %r12, -48
.cfi_offset %r13, -40
.cfi_offset %r14, -32
.cfi_offset %r15, -24
.cfi_offset %rbp, -16
cmpl $1, %edi
jle .LBB3_1
# %bb.3:
movq %rsi, %r15
movq 8(%rsi), %rdi
xorl %esi, %esi
movl $10, %edx
callq __isoc23_strtol
movq %rax, %r12
xorl %edi, %edi
callq hipSetDevice
leaq 104(%rsp), %rdi
callq hipStreamCreate
movq %rsp, %rdi
callq hipStreamCreate
movq $0, 144(%rsp)
movq $0, 56(%rsp)
leaq 56(%rsp), %rdi
leaq 144(%rsp), %rsi
callq hipMemGetInfo
movq 144(%rsp), %rsi
shrq $20, %rsi
movq 56(%rsp), %rdx
shrq $20, %rdx
movl $.L.str, %edi
xorl %eax, %eax
callq printf
movsd 56(%rsp), %xmm0 # xmm0 = mem[0],zero
unpcklps .LCPI3_0(%rip), %xmm0 # xmm0 = xmm0[0],mem[0],xmm0[1],mem[1]
subpd .LCPI3_1(%rip), %xmm0
movapd %xmm0, %xmm1
unpckhpd %xmm0, %xmm1 # xmm1 = xmm1[1],xmm0[1]
addsd %xmm0, %xmm1
mulsd .LCPI3_2(%rip), %xmm1
cvttsd2si %xmm1, %rax
movq %rax, %rcx
sarq $63, %rcx
subsd .LCPI3_3(%rip), %xmm1
cvttsd2si %xmm1, %rbx
andq %rcx, %rbx
orq %rax, %rbx
movq %rbx, %rsi
shrq $20, %rsi
movl $.L.str.2, %edi
xorl %eax, %eax
callq printf
movq %rbx, %r14
shrq $2, %r14
leaq 40(%rsp), %rdi
movq %r14, %rsi
callq hipMalloc
leaq 48(%rsp), %rdi
movq %r14, %rsi
callq hipMalloc
leaq 16(%rsp), %rdi
movl $40, %esi
callq hipMalloc
leaq 8(%rsp), %rdi
movl $40, %esi
xorl %edx, %edx
callq hipHostMalloc
leaq 24(%rsp), %rdi
movq %r14, %rsi
xorl %edx, %edx
callq hipHostMalloc
leaq 32(%rsp), %rdi
movq %r14, %rsi
xorl %edx, %edx
callq hipHostMalloc
xorl %edi, %edi
callq time
movl %eax, %edi
callq srand
movl $.Lstr, %edi
callq puts@PLT
cmpq $32, %rbx
jb .LBB3_6
# %bb.4: # %.lr.ph.preheader
movq %rbx, %r13
shrq $5, %r13
xorl %ebp, %ebp
.p2align 4, 0x90
.LBB3_5: # %.lr.ph
# =>This Inner Loop Header: Depth=1
callq rand
imull %ebp, %eax
xorps %xmm0, %xmm0
cvtsi2sd %eax, %xmm0
mulsd .LCPI3_4(%rip), %xmm0
movq 24(%rsp), %rax
movsd %xmm0, (%rax,%rbp,8)
callq rand
imull %ebp, %eax
xorps %xmm0, %xmm0
cvtsi2sd %eax, %xmm0
mulsd .LCPI3_5(%rip), %xmm0
movq 32(%rsp), %rax
movsd %xmm0, (%rax,%rbp,8)
incq %rbp
cmpq %rbp, %r13
jne .LBB3_5
.LBB3_6: # %._crit_edge
movl $.Lstr.1, %edi
callq puts@PLT
movq 8(%rsp), %rax
movabsq $193273528365, %rcx # imm = 0x2D0000002D
movq %rcx, (%rax)
movl $0, 36(%rax)
movq 40(%rsp), %rdi
movq 24(%rsp), %rsi
movq %r14, %rdx
movl $1, %ecx
callq hipMemcpy
movq 48(%rsp), %rdi
movq 32(%rsp), %rsi
movq %r14, %rdx
movl $1, %ecx
callq hipMemcpy
movq 8(%rsp), %rdi
addq $12, %rdi
leaq 48(%rsp), %rsi
movl $8, %edx
xorl %ecx, %ecx
callq hipMemcpy
movq 8(%rsp), %rdi
addq $20, %rdi
leaq 40(%rsp), %rsi
movl $8, %edx
xorl %ecx, %ecx
callq hipMemcpy
movq 16(%rsp), %rdi
movq 8(%rsp), %rsi
movl $40, %edx
movl $1, %ecx
callq hipMemcpy
shrq $14, %rbx
leaq 128(%rsp), %rdi
xorl %esi, %esi
callq gettimeofday
movl $.Lstr.2, %edi
callq puts@PLT
movq 104(%rsp), %r9
movl %ebx, %edi
movabsq $4294967296, %rdx # imm = 0x100000000
orq %rdx, %rdi
orq $1024, %rdx # imm = 0x400
movl $1, %esi
movl $1, %ecx
xorl %r8d, %r8d
callq __hipPushCallConfiguration
testl %eax, %eax
jne .LBB3_8
# %bb.7:
movq 16(%rsp), %rax
movq %rax, 80(%rsp)
leaq 80(%rsp), %rax
movq %rax, 96(%rsp)
leaq 144(%rsp), %rdi
leaq 56(%rsp), %rsi
leaq 120(%rsp), %rdx
leaq 112(%rsp), %rcx
callq __hipPopCallConfiguration
movq 144(%rsp), %rsi
movl 152(%rsp), %edx
movq 56(%rsp), %rcx
movl 64(%rsp), %r8d
leaq 96(%rsp), %r9
movl $_Z16intensive_kernelPj, %edi
pushq 112(%rsp)
.cfi_adjust_cfa_offset 8
pushq 128(%rsp)
.cfi_adjust_cfa_offset 8
callq hipLaunchKernel
addq $16, %rsp
.cfi_adjust_cfa_offset -16
.LBB3_8:
callq fork
testl %eax, %eax
je .LBB3_9
# %bb.11:
jle .LBB3_37
# %bb.12:
leaq 80(%rsp), %rdi
xorl %esi, %esi
callq gettimeofday
movslq %r12d, %rbp
movq 80(%rsp), %rax
subq 128(%rsp), %rax
cmpq %rbp, %rax
jge .LBB3_32
# %bb.13: # %.lr.ph83
movq 128(%rsp), %rbx
leaq 56(%rsp), %r15
jmp .LBB3_14
.p2align 4, 0x90
.LBB3_31: # %.critedge88
# in Loop: Header=BB3_14 Depth=1
leaq 80(%rsp), %rdi
xorl %esi, %esi
callq gettimeofday
movq 80(%rsp), %rax
subq %rbx, %rax
cmpq %rbp, %rax
jge .LBB3_32
.LBB3_14: # =>This Loop Header: Depth=1
# Child Loop BB3_15 Depth 2
# Child Loop BB3_18 Depth 2
# Child Loop BB3_23 Depth 2
# Child Loop BB3_26 Depth 2
# Child Loop BB3_29 Depth 2
movl $10, %edi
callq usleep
movq 8(%rsp), %rax
movabsq $193273528385, %rcx # imm = 0x2D00000041
movq %rcx, (%rax)
callq random
leal 511(%rax), %ecx
testq %rax, %rax
cmovnsl %eax, %ecx
andl $-512, %ecx # imm = 0xFE00
subl %ecx, %eax
movq 8(%rsp), %rcx
movl %eax, 8(%rcx)
leaq 144(%rsp), %r13
xorl %r12d, %r12d
.p2align 4, 0x90
.LBB3_15: # Parent Loop BB3_14 Depth=1
# => This Inner Loop Header: Depth=2
movl %r12d, 56(%rsp)
movl %r14d, 60(%rsp)
movq 32(%rsp), %rax
movq %rax, 64(%rsp)
movl $_Z9IncrementPv, %edx
movq %r13, %rdi
xorl %esi, %esi
movq %r15, %rcx
callq pthread_create
testl %eax, %eax
jne .LBB3_38
# %bb.16: # in Loop: Header=BB3_15 Depth=2
incq %r12
addq $8, %r13
cmpq $8, %r12
jne .LBB3_15
# %bb.17: # %.preheader72.preheader
# in Loop: Header=BB3_14 Depth=1
xorl %r12d, %r12d
.p2align 4, 0x90
.LBB3_18: # %.preheader72
# Parent Loop BB3_14 Depth=1
# => This Inner Loop Header: Depth=2
movq 144(%rsp,%r12,8), %rdi
xorl %esi, %esi
callq pthread_join
incq %r12
cmpq $8, %r12
jne .LBB3_18
# %bb.19: # in Loop: Header=BB3_14 Depth=1
movq 40(%rsp), %rdi
movq 24(%rsp), %rsi
movq (%rsp), %r8
movq %r14, %rdx
movl $1, %ecx
callq hipMemcpyAsync
movq 48(%rsp), %rdi
movq 32(%rsp), %rsi
movq (%rsp), %r8
movq %r14, %rdx
movl $1, %ecx
callq hipMemcpyAsync
movq 16(%rsp), %rdi
addq $8, %rdi
movq 8(%rsp), %rsi
addq $8, %rsi
movq (%rsp), %r8
movl $4, %edx
movl $1, %ecx
callq hipMemcpyAsync
movq (%rsp), %rdi
callq hipStreamSynchronize
movq 16(%rsp), %rdi
addq $4, %rdi
movq 8(%rsp), %rsi
addq $4, %rsi
movq (%rsp), %r8
movl $4, %edx
movl $1, %ecx
callq hipMemcpyAsync
movq (%rsp), %rdi
callq hipStreamSynchronize
movq 16(%rsp), %rdi
movq 8(%rsp), %rsi
movq (%rsp), %r8
movl $4, %edx
movl $1, %ecx
callq hipMemcpyAsync
movq (%rsp), %rdi
callq hipStreamSynchronize
movq 8(%rsp), %rdi
cmpl $65, (%rdi)
jne .LBB3_31
# %bb.20: # %.lr.ph77.preheader
# in Loop: Header=BB3_14 Depth=1
movl 4(%rdi), %r13d
cmpl $90, %r13d
je .LBB3_31
# %bb.21: # in Loop: Header=BB3_14 Depth=1
addq $4, %rdi
.p2align 4, 0x90
.LBB3_23: # %.lr.ph111
# Parent Loop BB3_14 Depth=1
# => This Inner Loop Header: Depth=2
movq 16(%rsp), %rsi
addq $4, %rsi
movq (%rsp), %r8
movl $4, %edx
movl $2, %ecx
callq hipMemcpyAsync
movq (%rsp), %rdi
callq hipStreamSynchronize
movq 8(%rsp), %rax
cmpl $65, (%rax)
jne .LBB3_25
# %bb.22: # %.lr.ph77
# in Loop: Header=BB3_23 Depth=2
leaq 4(%rax), %rdi
cmpl $90, 4(%rax)
jne .LBB3_23
# %bb.24: # %.critedge
# in Loop: Header=BB3_14 Depth=1
cmpl $90, %r13d
je .LBB3_31
.LBB3_25: # %.critedge89
# in Loop: Header=BB3_14 Depth=1
movq 24(%rsp), %rdi
movq 40(%rsp), %rsi
movq (%rsp), %r8
movq %r14, %rdx
movl $2, %ecx
callq hipMemcpyAsync
movq (%rsp), %rdi
callq hipStreamSynchronize
leaq 144(%rsp), %r13
xorl %r12d, %r12d
.p2align 4, 0x90
.LBB3_26: # Parent Loop BB3_14 Depth=1
# => This Inner Loop Header: Depth=2
movl %r12d, 56(%rsp)
movl %r14d, 60(%rsp)
movq 24(%rsp), %rax
movq %rax, 64(%rsp)
movl $_Z9IncrementPv, %edx
movq %r13, %rdi
xorl %esi, %esi
movq %r15, %rcx
callq pthread_create
testl %eax, %eax
jne .LBB3_38
# %bb.27: # in Loop: Header=BB3_26 Depth=2
incq %r12
addq $8, %r13
cmpq $8, %r12
jne .LBB3_26
# %bb.28: # %.preheader.preheader
# in Loop: Header=BB3_14 Depth=1
xorl %r12d, %r12d
.p2align 4, 0x90
.LBB3_29: # %.preheader
# Parent Loop BB3_14 Depth=1
# => This Inner Loop Header: Depth=2
movq 144(%rsp,%r12,8), %rdi
xorl %esi, %esi
callq pthread_join
incq %r12
cmpq $8, %r12
jne .LBB3_29
# %bb.30: # in Loop: Header=BB3_14 Depth=1
movq 8(%rsp), %rsi
movl $45, (%rsi)
movq 16(%rsp), %rdi
movq (%rsp), %r8
movl $4, %edx
movl $1, %ecx
callq hipMemcpyAsync
movq (%rsp), %rdi
callq hipStreamSynchronize
movq 8(%rsp), %rsi
movl $0, 8(%rsi)
addq $8, %rsi
movq 16(%rsp), %rdi
addq $8, %rdi
movq (%rsp), %r8
movl $4, %edx
movl $1, %ecx
callq hipMemcpyAsync
movq (%rsp), %rdi
callq hipStreamSynchronize
jmp .LBB3_31
.LBB3_32: # %._crit_edge84
movq 8(%rsp), %rsi
movl $1, 32(%rsi)
addq $32, %rsi
movq 16(%rsp), %rdi
addq $32, %rdi
movq (%rsp), %r8
movl $4, %edx
movl $1, %ecx
.p2align 4, 0x90
.LBB3_33: # %._crit_edge84
# =>This Inner Loop Header: Depth=1
callq hipMemcpyAsync
movq (%rsp), %rdi
callq hipStreamSynchronize
movq 8(%rsp), %rdi
cmpl $1, 32(%rdi)
jne .LBB3_36
# %bb.34: # %.lr.ph86
# in Loop: Header=BB3_33 Depth=1
cmpl $1, 36(%rdi)
je .LBB3_36
# %bb.35: # in Loop: Header=BB3_33 Depth=1
addq $36, %rdi
movq 16(%rsp), %rsi
addq $36, %rsi
movq (%rsp), %r8
movl $4, %edx
movl $2, %ecx
jmp .LBB3_33
.LBB3_9:
movl $.L.str.6, %edi
movq %r15, %rsi
callq execv
cmpl $-1, %eax
je .LBB3_10
.LBB3_36: # %.critedge2
movq 40(%rsp), %rdi
callq hipFree
movq 48(%rsp), %rdi
callq hipFree
movq 16(%rsp), %rdi
callq hipFree
movq 24(%rsp), %rdi
callq hipHostFree
movq 32(%rsp), %rdi
callq hipHostFree
movq 8(%rsp), %rdi
callq hipHostFree
movl $.Lstr.6, %edi
callq puts@PLT
xorl %eax, %eax
addq $216, %rsp
.cfi_def_cfa_offset 56
popq %rbx
.cfi_def_cfa_offset 48
popq %r12
.cfi_def_cfa_offset 40
popq %r13
.cfi_def_cfa_offset 32
popq %r14
.cfi_def_cfa_offset 24
popq %r15
.cfi_def_cfa_offset 16
popq %rbp
.cfi_def_cfa_offset 8
retq
.LBB3_38:
.cfi_def_cfa_offset 272
movl $.Lstr.5, %edi
callq puts@PLT
movl $-1, %edi
callq exit
.LBB3_1:
movl $.Lstr.8, %edi
jmp .LBB3_2
.LBB3_37:
movl $.Lstr.3, %edi
jmp .LBB3_2
.LBB3_10:
movl $.Lstr.7, %edi
.LBB3_2:
callq puts@PLT
movl $1, %edi
callq exit
.Lfunc_end3:
.size main, .Lfunc_end3-main
.cfi_endproc
# -- End function
.p2align 4, 0x90 # -- Begin function __hip_module_ctor
.type __hip_module_ctor,@function
__hip_module_ctor: # @__hip_module_ctor
.cfi_startproc
# %bb.0:
subq $40, %rsp
.cfi_def_cfa_offset 48
cmpq $0, __hip_gpubin_handle(%rip)
jne .LBB4_2
# %bb.1:
movl $__hip_fatbin_wrapper, %edi
callq __hipRegisterFatBinary
movq %rax, __hip_gpubin_handle(%rip)
.LBB4_2:
movq __hip_gpubin_handle(%rip), %rdi
xorps %xmm0, %xmm0
movups %xmm0, 16(%rsp)
movups %xmm0, (%rsp)
movl $_Z16intensive_kernelPj, %esi
movl $.L__unnamed_1, %edx
movl $.L__unnamed_1, %ecx
movl $-1, %r8d
xorl %r9d, %r9d
callq __hipRegisterFunction
movl $__hip_module_dtor, %edi
addq $40, %rsp
.cfi_def_cfa_offset 8
jmp atexit # TAILCALL
.Lfunc_end4:
.size __hip_module_ctor, .Lfunc_end4-__hip_module_ctor
.cfi_endproc
# -- End function
.p2align 4, 0x90 # -- Begin function __hip_module_dtor
.type __hip_module_dtor,@function
__hip_module_dtor: # @__hip_module_dtor
.cfi_startproc
# %bb.0:
movq __hip_gpubin_handle(%rip), %rdi
testq %rdi, %rdi
je .LBB5_2
# %bb.1:
pushq %rax
.cfi_def_cfa_offset 16
callq __hipUnregisterFatBinary
movq $0, __hip_gpubin_handle(%rip)
addq $8, %rsp
.cfi_def_cfa_offset 8
.LBB5_2:
retq
.Lfunc_end5:
.size __hip_module_dtor, .Lfunc_end5-__hip_module_dtor
.cfi_endproc
# -- End function
.type _Z16intensive_kernelPj,@object # @_Z16intensive_kernelPj
.section .rodata,"a",@progbits
.globl _Z16intensive_kernelPj
.p2align 3, 0x0
_Z16intensive_kernelPj:
.quad _Z31__device_stub__intensive_kernelPj
.size _Z16intensive_kernelPj, 8
.type .L.str,@object # @.str
.section .rodata.str1.1,"aMS",@progbits,1
.L.str:
.asciz "Total memory %dMB\tFree Memory %dMB\n"
.size .L.str, 36
.type .L.str.2,@object # @.str.2
.L.str.2:
.asciz "Allocating 90%% of the available memory: (%dMB)\n"
.size .L.str.2, 49
.type .L.str.6,@object # @.str.6
.L.str.6:
.asciz "./temperature"
.size .L.str.6, 14
.type .L__unnamed_1,@object # @0
.L__unnamed_1:
.asciz "_Z16intensive_kernelPj"
.size .L__unnamed_1, 23
.type __hip_fatbin_wrapper,@object # @__hip_fatbin_wrapper
.section .hipFatBinSegment,"a",@progbits
.p2align 3, 0x0
__hip_fatbin_wrapper:
.long 1212764230 # 0x48495046
.long 1 # 0x1
.quad __hip_fatbin
.quad 0
.size __hip_fatbin_wrapper, 24
.type __hip_gpubin_handle,@object # @__hip_gpubin_handle
.local __hip_gpubin_handle
.comm __hip_gpubin_handle,8,8
.section .init_array,"aw",@init_array
.p2align 3, 0x0
.quad __hip_module_ctor
.type __hip_cuid_,@object # @__hip_cuid_
.bss
.globl __hip_cuid_
__hip_cuid_:
.byte 0 # 0x0
.size __hip_cuid_, 1
.type .Lstr,@object # @str
.section .rodata.str1.1,"aMS",@progbits,1
.Lstr:
.asciz "Initializing buffers..."
.size .Lstr, 24
.type .Lstr.1,@object # @str.1
.Lstr.1:
.asciz "Finished initialization of buffers!\n"
.size .Lstr.1, 37
.type .Lstr.2,@object # @str.2
.Lstr.2:
.asciz "Start stressing..."
.size .Lstr.2, 19
.type .Lstr.3,@object # @str.3
.Lstr.3:
.asciz "fork() failed!"
.size .Lstr.3, 15
.type .Lstr.5,@object # @str.5
.Lstr.5:
.asciz "Unable to create thread"
.size .Lstr.5, 24
.type .Lstr.6,@object # @str.6
.Lstr.6:
.asciz "Finished!"
.size .Lstr.6, 10
.type .Lstr.7,@object # @str.7
.Lstr.7:
.asciz "Execv failed!"
.size .Lstr.7, 14
.type .Lstr.8,@object # @str.8
.Lstr.8:
.asciz "Usage: stresstest <duration>\n\tduration\tTime stress will run in seconds"
.size .Lstr.8, 71
.section ".linker-options","e",@llvm_linker_options
.ident "AMD clang version 18.0.0git (https://github.com/RadeonOpenCompute/llvm-project roc-6.3.2 25012 e5bf7e55c91490b07c49d8960fa7983d864936c4)"
.section ".note.GNU-stack","",@progbits
.addrsig
.addrsig_sym _Z9IncrementPv
.addrsig_sym _Z31__device_stub__intensive_kernelPj
.addrsig_sym __hip_module_ctor
.addrsig_sym __hip_module_dtor
.addrsig_sym _Z16intensive_kernelPj
.addrsig_sym __hip_fatbin
.addrsig_sym __hip_fatbin_wrapper
.addrsig_sym __hip_cuid_ |
You are a helpful coding assistant specialized in converting from CUDA device assembly to AMD device assembly. | code for sm_80
Function : _Z16intensive_kernelPj
.headerflags @"EF_CUDA_TEXMODE_UNIFIED EF_CUDA_64BIT_ADDRESS EF_CUDA_SM80 EF_CUDA_VIRTUAL_SM(EF_CUDA_SM80)"
/*0000*/ IMAD.MOV.U32 R1, RZ, RZ, c[0x0][0x28] ; /* 0x00000a00ff017624 */
/* 0x000fe400078e00ff */
/*0010*/ IMAD.MOV.U32 R2, RZ, RZ, c[0x0][0x160] ; /* 0x00005800ff027624 */
/* 0x000fe200078e00ff */
/*0020*/ ULDC.64 UR6, c[0x0][0x118] ; /* 0x0000460000067ab9 */
/* 0x000fe20000000a00 */
/*0030*/ IMAD.MOV.U32 R3, RZ, RZ, c[0x0][0x164] ; /* 0x00005900ff037624 */
/* 0x000fca00078e00ff */
/*0040*/ LDG.E R2, [R2.64+0x20] ; /* 0x0000200602027981 */
/* 0x000ea4000c1e1900 */
/*0050*/ ISETP.NE.AND P0, PT, R2, RZ, PT ; /* 0x000000ff0200720c */
/* 0x004fda0003f05270 */
/*0060*/ @!P0 EXIT ; /* 0x000000000000894d */
/* 0x000fea0003800000 */
/*0070*/ S2R R0, SR_CTAID.X ; /* 0x0000000000007919 */
/* 0x000e220000002500 */
/*0080*/ ULDC.64 UR4, c[0x0][0x160] ; /* 0x0000580000047ab9 */
/* 0x000fe40000000a00 */
/*0090*/ UIADD3 UR4, UP0, UR4, 0x20, URZ ; /* 0x0000002004047890 */
/* 0x000fe2000ff1e03f */
/*00a0*/ S2R R3, SR_TID.X ; /* 0x0000000000037919 */
/* 0x000e260000002100 */
/*00b0*/ UIADD3.X UR5, URZ, UR5, URZ, UP0, !UPT ; /* 0x000000053f057290 */
/* 0x000fe400087fe43f */
/*00c0*/ IMAD.U32 R2, RZ, RZ, UR4 ; /* 0x00000004ff027e24 */
/* 0x000fe4000f8e00ff */
/*00d0*/ IMAD R10, R0, c[0x0][0x0], R3 ; /* 0x00000000000a7a24 */
/* 0x001fe200078e0203 */
/*00e0*/ LOP3.LUT P0, RZ, R3, R0, RZ, 0xfc, !PT ; /* 0x0000000003ff7212 */
/* 0x000fe2000780fcff */
/*00f0*/ IMAD.U32 R3, RZ, RZ, UR5 ; /* 0x00000005ff037e24 */
/* 0x000fc6000f8e00ff */
/*0100*/ SHF.R.S32.HI R5, RZ, 0x1f, R10 ; /* 0x0000001fff057819 */
/* 0x000fc8000001140a */
/*0110*/ SHF.L.U64.HI R0, R10.reuse, 0x3, R5 ; /* 0x000000030a007819 */
/* 0x040fe20000010205 */
/*0120*/ IMAD.SHL.U32 R10, R10, 0x8, RZ ; /* 0x000000080a0a7824 */
/* 0x000fc600078e00ff */
/*0130*/ BSSY B0, 0x280 ; /* 0x0000014000007945 */
/* 0x000fe20003800000 */
/*0140*/ @P0 BRA 0x270 ; /* 0x0000012000000947 */
/* 0x001fea0003800000 */
/*0150*/ LDG.E R4, [R2.64+-0x20] ; /* 0xffffe00602047981 */
/* 0x000ea4000c1e1900 */
/*0160*/ ISETP.NE.AND P1, PT, R4, 0x41, PT ; /* 0x000000410400780c */
/* 0x004fda0003f25270 */
/*0170*/ @P1 BRA 0x210 ; /* 0x0000009000001947 */
/* 0x000fea0003800000 */
/*0180*/ LDG.E R4, [R2.64+-0x1c] ; /* 0xffffe40602047981 */
/* 0x000ea4000c1e1900 */
/*0190*/ ISETP.NE.AND P1, PT, R4, 0x5a, PT ; /* 0x0000005a0400780c */
/* 0x004fda0003f25270 */
/*01a0*/ @!P1 BRA 0x210 ; /* 0x0000006000009947 */
/* 0x000fea0003800000 */
/*01b0*/ IMAD.MOV.U32 R5, RZ, RZ, 0x1 ; /* 0x00000001ff057424 */
/* 0x000fca00078e00ff */
/*01c0*/ STG.E [R2.64+-0x4], R5 ; /* 0xfffffc0502007986 */
/* 0x0001e2000c101906 */
/*01d0*/ MEMBAR.SC.GPU ; /* 0x0000000000007992 */
/* 0x000fec0000002000 */
/*01e0*/ ERRBAR; /* 0x00000000000079ab */
/* 0x000fc00000000000 */
/*01f0*/ CCTL.IVALL ; /* 0x00000000ff00798f */
/* 0x000fca0002000000 */
/*0200*/ BRA 0x270 ; /* 0x0000006000007947 */
/* 0x000fea0003800000 */
/*0210*/ HFMA2.MMA R5, -RZ, RZ, 0, 2.682209014892578125e-06 ; /* 0x0000002dff057435 */
/* 0x000fe200000001ff */
/*0220*/ STG.E [R2.64+-0x4], RZ ; /* 0xfffffcff02007986 */
/* 0x0001ec000c101906 */
/*0230*/ STG.E [R2.64+-0x1c], R5 ; /* 0xffffe40502007986 */
/* 0x0001e2000c101906 */
/*0240*/ MEMBAR.SC.GPU ; /* 0x0000000000007992 */
/* 0x000fec0000002000 */
/*0250*/ ERRBAR; /* 0x00000000000079ab */
/* 0x000fc00000000000 */
/*0260*/ CCTL.IVALL ; /* 0x00000000ff00798f */
/* 0x000fca0002000000 */
/*0270*/ BSYNC B0 ; /* 0x0000000000007941 */
/* 0x000fea0003800000 */
/*0280*/ BAR.SYNC.DEFER_BLOCKING 0x0 ; /* 0x0000000000007b1d */
/* 0x000fec0000010000 */
/*0290*/ LDG.E R4, [R2.64+-0x4] ; /* 0xfffffc0602047981 */
/* 0x000ea4000c1e1900 */
/*02a0*/ ISETP.NE.AND P1, PT, R4, 0x1, PT ; /* 0x000000010400780c */
/* 0x004fda0003f25270 */
/*02b0*/ @P1 BRA 0x710 ; /* 0x0000045000001947 */
/* 0x000fea0003800000 */
/*02c0*/ LDG.E R4, [R2.64+-0x18] ; /* 0xffffe80602047981 */
/* 0x000ea4000c1e1900 */
/*02d0*/ ISETP.NE.AND P1, PT, R4, RZ, PT ; /* 0x000000ff0400720c */
/* 0x004fda0003f25270 */
/*02e0*/ @!P1 BRA 0x780 ; /* 0x0000049000009947 */
/* 0x000fea0003800000 */
/*02f0*/ LDG.E R11, [R2.64+-0x14] ; /* 0xffffec06020b7981 */
/* 0x000ea8000c1e1900 */
/*0300*/ LDG.E R7, [R2.64+-0xc] ; /* 0xfffff40602077981 */
/* 0x000ee8000c1e1900 */
/*0310*/ LDG.E R9, [R2.64+-0x10] ; /* 0xfffff00602097981 */
/* 0x000f28000c1e1900 */
/*0320*/ LDG.E R5, [R2.64+-0x8] ; /* 0xfffff80602057981 */
/* 0x001f62000c1e1900 */
/*0330*/ IADD3 R8, P2, R11, R10, RZ ; /* 0x0000000a0b087210 */
/* 0x004fc40007f5e0ff */
/*0340*/ IADD3 R4, P1, R7, R10, RZ ; /* 0x0000000a07047210 */
/* 0x008fc60007f3e0ff */
/*0350*/ IMAD.X R9, R9, 0x1, R0.reuse, P2 ; /* 0x0000000109097824 */
/* 0x110fe400010e0600 */
/*0360*/ IMAD.X R5, R5, 0x1, R0, P1 ; /* 0x0000000105057824 */
/* 0x020fc800008e0600 */
/*0370*/ LD.E.64 R8, [R8.64] ; /* 0x0000000608087980 */
/* 0x000ea8000c101b00 */
/*0380*/ LD.E.64 R6, [R4.64] ; /* 0x0000000604067980 */
/* 0x000ea2000c101b00 */
/*0390*/ BSSY B0, 0x650 ; /* 0x000002b000007945 */
/* 0x000fe20003800000 */
/*03a0*/ DADD R12, -R8, R6 ; /* 0x00000000080c7229 */
/* 0x004e0c0000000106 */
/*03b0*/ DSETP.GT.AND P1, PT, R12, c[0x2][0x0], PT ; /* 0x008000000c00762a */
/* 0x001e1c0003f24000 */
/*03c0*/ @!P1 BRA 0x640 ; /* 0x0000027000009947 */
/* 0x001fea0003800000 */
/*03d0*/ IMAD.MOV.U32 R12, RZ, RZ, 0x652b82fe ; /* 0x652b82feff0c7424 */
/* 0x000fe200078e00ff */
/*03e0*/ MOV R18, 0x69ce2bdf ; /* 0x69ce2bdf00127802 */
/* 0x000fe20000000f00 */
/*03f0*/ IMAD.MOV.U32 R13, RZ, RZ, 0x3ff71547 ; /* 0x3ff71547ff0d7424 */
/* 0x000fe200078e00ff */
/*0400*/ FSETP.GEU.AND P1, PT, |R7|, 4.1917929649353027344, PT ; /* 0x4086232b0700780b */
/* 0x000fe20003f2e200 */
/*0410*/ IMAD.MOV.U32 R19, RZ, RZ, 0x3e5ade15 ; /* 0x3e5ade15ff137424 */
/* 0x000fe200078e00ff */
/*0420*/ BSSY B1, 0x620 ; /* 0x000001f000017945 */
/* 0x000fe60003800000 */
/*0430*/ DFMA R12, R6, R12, 6.75539944105574400000e+15 ; /* 0x43380000060c742b */
/* 0x000e0c000000000c */
/*0440*/ DADD R14, R12, -6.75539944105574400000e+15 ; /* 0xc33800000c0e7429 */
/* 0x001e0c0000000000 */
/*0450*/ DFMA R16, R14, c[0x2][0x8], R6 ; /* 0x008002000e107a2b */
/* 0x001e0c0000000006 */
/*0460*/ DFMA R14, R14, c[0x2][0x10], R16 ; /* 0x008004000e0e7a2b */
/* 0x001e0c0000000010 */
/*0470*/ DFMA R16, R14, R18, c[0x2][0x18] ; /* 0x008006000e10762b */
/* 0x001e0c0000000012 */
/*0480*/ DFMA R16, R14, R16, c[0x2][0x20] ; /* 0x008008000e10762b */
/* 0x001e0c0000000010 */
/*0490*/ DFMA R16, R14, R16, c[0x2][0x28] ; /* 0x00800a000e10762b */
/* 0x001e0c0000000010 */
/*04a0*/ DFMA R16, R14, R16, c[0x2][0x30] ; /* 0x00800c000e10762b */
/* 0x001e0c0000000010 */
/*04b0*/ DFMA R16, R14, R16, c[0x2][0x38] ; /* 0x00800e000e10762b */
/* 0x001e0c0000000010 */
/*04c0*/ DFMA R16, R14, R16, c[0x2][0x40] ; /* 0x008010000e10762b */
/* 0x001e0c0000000010 */
/*04d0*/ DFMA R16, R14, R16, c[0x2][0x48] ; /* 0x008012000e10762b */
/* 0x001e0c0000000010 */
/*04e0*/ DFMA R16, R14, R16, c[0x2][0x50] ; /* 0x008014000e10762b */
/* 0x001e0c0000000010 */
/*04f0*/ DFMA R16, R14, R16, c[0x2][0x58] ; /* 0x008016000e10762b */
/* 0x001e0c0000000010 */
/*0500*/ DFMA R16, R14, R16, 1 ; /* 0x3ff000000e10742b */
/* 0x001e0c0000000010 */
/*0510*/ DFMA R16, R14, R16, 1 ; /* 0x3ff000000e10742b */
/* 0x001e140000000010 */
/*0520*/ IMAD R15, R12, 0x100000, R17 ; /* 0x001000000c0f7824 */
/* 0x001fe400078e0211 */
/*0530*/ IMAD.MOV.U32 R14, RZ, RZ, R16 ; /* 0x000000ffff0e7224 */
/* 0x000fe200078e0010 */
/*0540*/ @!P1 BRA 0x610 ; /* 0x000000c000009947 */
/* 0x000fea0003800000 */
/*0550*/ FSETP.GEU.AND P2, PT, |R7|, 4.2275390625, PT ; /* 0x408748000700780b */
/* 0x000fe20003f4e200 */
/*0560*/ DADD R14, R6, +INF ; /* 0x7ff00000060e7429 */
/* 0x000fc80000000000 */
/*0570*/ DSETP.GEU.AND P1, PT, R6, RZ, PT ; /* 0x000000ff0600722a */
/* 0x000e0c0003f2e000 */
/*0580*/ FSEL R14, R14, RZ, P1 ; /* 0x000000ff0e0e7208 */
/* 0x001fe40000800000 */
/*0590*/ @!P2 LEA.HI R11, R12, R12, RZ, 0x1 ; /* 0x0000000c0c0ba211 */
/* 0x000fe400078f08ff */
/*05a0*/ FSEL R15, R15, RZ, P1 ; /* 0x000000ff0f0f7208 */
/* 0x000fe40000800000 */
/*05b0*/ @!P2 SHF.R.S32.HI R11, RZ, 0x1, R11 ; /* 0x00000001ff0ba819 */
/* 0x000fc8000001140b */
/*05c0*/ @!P2 LEA R17, R11, R17, 0x14 ; /* 0x000000110b11a211 */
/* 0x000fe200078ea0ff */
/*05d0*/ @!P2 IMAD.IADD R6, R12, 0x1, -R11 ; /* 0x000000010c06a824 */
/* 0x000fca00078e0a0b */
/*05e0*/ @!P2 LEA R7, R6, 0x3ff00000, 0x14 ; /* 0x3ff000000607a811 */
/* 0x000fe200078ea0ff */
/*05f0*/ @!P2 IMAD.MOV.U32 R6, RZ, RZ, RZ ; /* 0x000000ffff06a224 */
/* 0x000fcc00078e00ff */
/*0600*/ @!P2 DMUL R14, R16, R6 ; /* 0x00000006100ea228 */
/* 0x00004c0000000000 */
/*0610*/ BSYNC B1 ; /* 0x0000000000017941 */
/* 0x000fea0003800000 */
/*0620*/ DFMA R8, R8, 2, R14 ; /* 0x400000000808782b */
/* 0x002e4e000000000e */
/*0630*/ ST.E.64 [R4.64], R8 ; /* 0x0000000804007985 */
/* 0x0023e8000c101b06 */
/*0640*/ BSYNC B0 ; /* 0x0000000000007941 */
/* 0x000fea0003800000 */
/*0650*/ @P0 BRA 0x710 ; /* 0x000000b000000947 */
/* 0x000fea0003800000 */
/*0660*/ IMAD.MOV.U32 R5, RZ, RZ, 0x3b ; /* 0x0000003bff057424 */
/* 0x002fe200078e00ff */
/*0670*/ STG.E [R2.64+-0x4], RZ ; /* 0xfffffcff02007986 */
/* 0x0003e2000c101906 */
/*0680*/ IMAD.MOV.U32 R7, RZ, RZ, 0x5a ; /* 0x0000005aff077424 */
/* 0x001fc600078e00ff */
/*0690*/ STG.E [R2.64+-0x20], R5 ; /* 0xffffe00502007986 */
/* 0x0003e8000c101906 */
/*06a0*/ STG.E [R2.64+-0x1c], R7 ; /* 0xffffe40702007986 */
/* 0x0003e2000c101906 */
/*06b0*/ MEMBAR.SC.GPU ; /* 0x0000000000007992 */
/* 0x000fec0000002000 */
/*06c0*/ ERRBAR; /* 0x00000000000079ab */
/* 0x000fc00000000000 */
/*06d0*/ CCTL.IVALL ; /* 0x00000000ff00798f */
/* 0x000fca0002000000 */
/*06e0*/ LDG.E R4, [R2.64+-0x18] ; /* 0xffffe80602047981 */
/* 0x000ea4000c1e1900 */
/*06f0*/ ISETP.NE.AND P1, PT, R4, RZ, PT ; /* 0x000000ff0400720c */
/* 0x004fda0003f25270 */
/*0700*/ @P1 BRA 0x770 ; /* 0x0000006000001947 */
/* 0x000fea0003800000 */
/*0710*/ WARPSYNC 0xffffffff ; /* 0xffffffff00007948 */
/* 0x000fe20003800000 */
/*0720*/ BAR.SYNC.DEFER_BLOCKING 0x0 ; /* 0x0000000000007b1d */
/* 0x000fec0000010000 */
/*0730*/ LDG.E R4, [R2.64] ; /* 0x0000000602047981 */
/* 0x002ea4000c1e1900 */
/*0740*/ ISETP.NE.AND P1, PT, R4, RZ, PT ; /* 0x000000ff0400720c */
/* 0x004fda0003f25270 */
/*0750*/ @!P1 EXIT ; /* 0x000000000000994d */
/* 0x000fea0003800000 */
/*0760*/ BRA 0x130 ; /* 0xfffff9c000007947 */
/* 0x000fea000383ffff */
/*0770*/ BRA 0x770 ; /* 0xfffffff000007947 */
/* 0x000fea000383ffff */
/*0780*/ BRA 0x780 ; /* 0xfffffff000007947 */
/* 0x000fea000383ffff */
/*0790*/ BRA 0x790; /* 0xfffffff000007947 */
/* 0x000fc0000383ffff */
/*07a0*/ NOP; /* 0x0000000000007918 */
/* 0x000fc00000000000 */
/*07b0*/ NOP; /* 0x0000000000007918 */
/* 0x000fc00000000000 */
/*07c0*/ NOP; /* 0x0000000000007918 */
/* 0x000fc00000000000 */
/*07d0*/ NOP; /* 0x0000000000007918 */
/* 0x000fc00000000000 */
/*07e0*/ NOP; /* 0x0000000000007918 */
/* 0x000fc00000000000 */
/*07f0*/ NOP; /* 0x0000000000007918 */
/* 0x000fc00000000000 */
/*0800*/ NOP; /* 0x0000000000007918 */
/* 0x000fc00000000000 */
/*0810*/ NOP; /* 0x0000000000007918 */
/* 0x000fc00000000000 */
/*0820*/ NOP; /* 0x0000000000007918 */
/* 0x000fc00000000000 */
/*0830*/ NOP; /* 0x0000000000007918 */
/* 0x000fc00000000000 */
/*0840*/ NOP; /* 0x0000000000007918 */
/* 0x000fc00000000000 */
/*0850*/ NOP; /* 0x0000000000007918 */
/* 0x000fc00000000000 */
/*0860*/ NOP; /* 0x0000000000007918 */
/* 0x000fc00000000000 */
/*0870*/ NOP; /* 0x0000000000007918 */
/* 0x000fc00000000000 */
.......... | .text
.amdgcn_target "amdgcn-amd-amdhsa--gfx1100"
.protected _Z16intensive_kernelPj
.globl _Z16intensive_kernelPj
.p2align 8
.type _Z16intensive_kernelPj,@function
_Z16intensive_kernelPj:
s_load_b64 s[2:3], s[0:1], 0x0
s_waitcnt lgkmcnt(0)
s_load_b32 s4, s[2:3], 0x20
s_waitcnt lgkmcnt(0)
s_cmp_eq_u32 s4, 0
s_cbranch_scc1 .LBB0_16
s_load_b32 s0, s[0:1], 0x14
v_or_b32_e32 v3, s15, v0
v_dual_mov_b32 v8, 0 :: v_dual_mov_b32 v9, 1
v_mov_b32_e32 v10, 45
s_mov_b32 s5, 0x3f847ae1
s_mov_b32 s4, 0x47ae147b
s_mov_b32 s7, 0x3ff71547
s_mov_b32 s6, 0x652b82fe
s_mov_b32 s9, 0xbfe62e42
s_mov_b32 s8, 0xfefa39ef
s_mov_b32 s11, 0xbc7abc9e
s_mov_b32 s10, 0x3b39803f
s_mov_b32 s13, 0x3e928af3
s_mov_b32 s12, 0xfca7ab0c
s_mov_b32 s17, 0x3e5ade15
s_mov_b32 s16, 0x6a5dcb37
s_mov_b32 s19, 0x3ec71dee
s_mov_b32 s18, 0x623fde64
s_mov_b32 s14, 0x7c89e6b0
s_waitcnt lgkmcnt(0)
s_and_b32 s0, s0, 0xffff
s_mov_b32 s21, 0x3f2a01a0
v_mad_u64_u32 v[1:2], null, s15, s0, v[0:1]
v_cmp_eq_u32_e64 s0, 0, v3
s_mov_b32 s15, 0x3efa0199
s_mov_b32 s20, 0x14761f6e
s_mov_b32 s23, 0x3f56c16c
s_mov_b32 s22, 0x1852b7b0
s_mov_b32 s25, 0x3f811111
s_delay_alu instid0(VALU_DEP_2)
v_ashrrev_i32_e32 v2, 31, v1
s_mov_b32 s24, 0x11122322
s_mov_b32 s27, 0x3fa55555
s_mov_b32 s26, 0x555502a1
s_mov_b32 s29, 0x3fc55555
v_lshlrev_b64 v[0:1], 3, v[1:2]
s_mov_b32 s28, 0x55555511
s_mov_b32 s31, 0x3fe00000
s_mov_b32 s30, 11
s_branch .LBB0_4
.LBB0_2:
s_or_b32 exec_lo, exec_lo, s1
.LBB0_3:
s_waitcnt lgkmcnt(0)
s_waitcnt_vscnt null, 0x0
s_barrier
buffer_gl0_inv
global_load_b32 v2, v8, s[2:3] offset:32
s_waitcnt vmcnt(0)
v_cmp_ne_u32_e32 vcc_lo, 0, v2
s_cbranch_vccz .LBB0_16
.LBB0_4:
s_and_saveexec_b32 s1, s0
s_cbranch_execz .LBB0_11
global_load_b32 v2, v8, s[2:3]
s_waitcnt vmcnt(0)
v_cmp_ne_u32_e64 s33, 0x41, v2
s_delay_alu instid0(VALU_DEP_1)
s_and_b32 vcc_lo, exec_lo, s33
s_cbranch_vccnz .LBB0_8
global_load_b32 v2, v8, s[2:3] offset:4
s_mov_b32 s33, -1
s_waitcnt vmcnt(0)
v_cmp_ne_u32_e32 vcc_lo, 0x5a, v2
s_cbranch_vccz .LBB0_8
s_mov_b32 s33, 0
global_store_b32 v8, v9, s[2:3] offset:28
.LBB0_8:
s_and_b32 vcc_lo, exec_lo, s33
s_cbranch_vccz .LBB0_10
s_clause 0x1
global_store_b32 v8, v8, s[2:3] offset:28
global_store_b32 v8, v10, s[2:3] offset:4
.LBB0_10:
s_waitcnt_vscnt null, 0x0
buffer_gl1_inv
buffer_gl0_inv
.LBB0_11:
s_or_b32 exec_lo, exec_lo, s1
s_barrier
buffer_gl0_inv
global_load_b32 v2, v8, s[2:3] offset:28
s_waitcnt vmcnt(0)
v_cmp_ne_u32_e32 vcc_lo, 1, v2
s_cbranch_vccnz .LBB0_3
global_load_b128 v[4:7], v8, s[2:3] offset:12
s_mov_b32 s33, exec_lo
s_waitcnt vmcnt(0)
v_add_co_u32 v2, vcc_lo, v6, v0
v_add_co_ci_u32_e32 v3, vcc_lo, v7, v1, vcc_lo
v_add_co_u32 v4, vcc_lo, v4, v0
v_add_co_ci_u32_e32 v5, vcc_lo, v5, v1, vcc_lo
flat_load_b64 v[6:7], v[2:3]
flat_load_b64 v[4:5], v[4:5]
s_waitcnt vmcnt(0) lgkmcnt(0)
v_add_f64 v[11:12], v[6:7], -v[4:5]
s_delay_alu instid0(VALU_DEP_1)
v_cmpx_lt_f64_e32 s[4:5], v[11:12]
s_cbranch_execz .LBB0_14
v_mul_f64 v[11:12], v[6:7], s[6:7]
v_cmp_nlt_f64_e32 vcc_lo, 0x40900000, v[6:7]
v_cmp_ngt_f64_e64 s1, 0xc090cc00, v[6:7]
s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_1)
v_rndne_f64_e32 v[11:12], v[11:12]
v_fma_f64 v[13:14], v[11:12], s[8:9], v[6:7]
v_cvt_i32_f64_e32 v17, v[11:12]
s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
v_fma_f64 v[13:14], v[11:12], s[10:11], v[13:14]
v_fma_f64 v[15:16], v[13:14], s[16:17], s[12:13]
s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
v_fma_f64 v[15:16], v[13:14], v[15:16], s[18:19]
v_fma_f64 v[15:16], v[13:14], v[15:16], s[14:15]
s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
v_fma_f64 v[15:16], v[13:14], v[15:16], s[20:21]
v_fma_f64 v[15:16], v[13:14], v[15:16], s[22:23]
s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
v_fma_f64 v[15:16], v[13:14], v[15:16], s[24:25]
v_fma_f64 v[15:16], v[13:14], v[15:16], s[26:27]
s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
v_fma_f64 v[15:16], v[13:14], v[15:16], s[28:29]
v_fma_f64 v[15:16], v[13:14], v[15:16], s[30:31]
s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
v_fma_f64 v[15:16], v[13:14], v[15:16], 1.0
v_fma_f64 v[11:12], v[13:14], v[15:16], 1.0
s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
v_ldexp_f64 v[11:12], v[11:12], v17
v_cndmask_b32_e32 v12, 0x7ff00000, v12, vcc_lo
s_and_b32 vcc_lo, s1, vcc_lo
s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
v_cndmask_b32_e32 v6, 0, v11, vcc_lo
v_cndmask_b32_e64 v7, 0, v12, s1
s_delay_alu instid0(VALU_DEP_1)
v_fma_f64 v[4:5], v[4:5], 2.0, v[6:7]
flat_store_b64 v[2:3], v[4:5]
.LBB0_14:
s_or_b32 exec_lo, exec_lo, s33
s_and_saveexec_b32 s1, s0
s_cbranch_execz .LBB0_2
v_dual_mov_b32 v2, 59 :: v_dual_mov_b32 v3, 0x5a
s_clause 0x1
global_store_b64 v8, v[2:3], s[2:3]
global_store_b32 v8, v8, s[2:3] offset:28
s_waitcnt lgkmcnt(0)
s_waitcnt_vscnt null, 0x0
buffer_gl1_inv
buffer_gl0_inv
s_branch .LBB0_2
.LBB0_16:
s_endpgm
.section .rodata,"a",@progbits
.p2align 6, 0x0
.amdhsa_kernel _Z16intensive_kernelPj
.amdhsa_group_segment_fixed_size 0
.amdhsa_private_segment_fixed_size 0
.amdhsa_kernarg_size 264
.amdhsa_user_sgpr_count 15
.amdhsa_user_sgpr_dispatch_ptr 0
.amdhsa_user_sgpr_queue_ptr 0
.amdhsa_user_sgpr_kernarg_segment_ptr 1
.amdhsa_user_sgpr_dispatch_id 0
.amdhsa_user_sgpr_private_segment_size 0
.amdhsa_wavefront_size32 1
.amdhsa_uses_dynamic_stack 0
.amdhsa_enable_private_segment 0
.amdhsa_system_sgpr_workgroup_id_x 1
.amdhsa_system_sgpr_workgroup_id_y 0
.amdhsa_system_sgpr_workgroup_id_z 0
.amdhsa_system_sgpr_workgroup_info 0
.amdhsa_system_vgpr_workitem_id 0
.amdhsa_next_free_vgpr 18
.amdhsa_next_free_sgpr 34
.amdhsa_float_round_mode_32 0
.amdhsa_float_round_mode_16_64 0
.amdhsa_float_denorm_mode_32 3
.amdhsa_float_denorm_mode_16_64 3
.amdhsa_dx10_clamp 1
.amdhsa_ieee_mode 1
.amdhsa_fp16_overflow 0
.amdhsa_workgroup_processor_mode 1
.amdhsa_memory_ordered 1
.amdhsa_forward_progress 0
.amdhsa_shared_vgpr_count 0
.amdhsa_exception_fp_ieee_invalid_op 0
.amdhsa_exception_fp_denorm_src 0
.amdhsa_exception_fp_ieee_div_zero 0
.amdhsa_exception_fp_ieee_overflow 0
.amdhsa_exception_fp_ieee_underflow 0
.amdhsa_exception_fp_ieee_inexact 0
.amdhsa_exception_int_div_zero 0
.end_amdhsa_kernel
.text
.Lfunc_end0:
.size _Z16intensive_kernelPj, .Lfunc_end0-_Z16intensive_kernelPj
.section .AMDGPU.csdata,"",@progbits
.text
.p2alignl 7, 3214868480
.fill 96, 4, 3214868480
.type __hip_cuid_,@object
.section .bss,"aw",@nobits
.globl __hip_cuid_
__hip_cuid_:
.byte 0
.size __hip_cuid_, 1
.ident "AMD clang version 18.0.0git (https://github.com/RadeonOpenCompute/llvm-project roc-6.3.2 25012 e5bf7e55c91490b07c49d8960fa7983d864936c4)"
.section ".note.GNU-stack","",@progbits
.addrsig
.addrsig_sym __hip_cuid_
.amdgpu_metadata
---
amdhsa.kernels:
- .args:
- .address_space: global
.offset: 0
.size: 8
.value_kind: global_buffer
- .offset: 8
.size: 4
.value_kind: hidden_block_count_x
- .offset: 12
.size: 4
.value_kind: hidden_block_count_y
- .offset: 16
.size: 4
.value_kind: hidden_block_count_z
- .offset: 20
.size: 2
.value_kind: hidden_group_size_x
- .offset: 22
.size: 2
.value_kind: hidden_group_size_y
- .offset: 24
.size: 2
.value_kind: hidden_group_size_z
- .offset: 26
.size: 2
.value_kind: hidden_remainder_x
- .offset: 28
.size: 2
.value_kind: hidden_remainder_y
- .offset: 30
.size: 2
.value_kind: hidden_remainder_z
- .offset: 48
.size: 8
.value_kind: hidden_global_offset_x
- .offset: 56
.size: 8
.value_kind: hidden_global_offset_y
- .offset: 64
.size: 8
.value_kind: hidden_global_offset_z
- .offset: 72
.size: 2
.value_kind: hidden_grid_dims
.group_segment_fixed_size: 0
.kernarg_segment_align: 8
.kernarg_segment_size: 264
.language: OpenCL C
.language_version:
- 2
- 0
.max_flat_workgroup_size: 1024
.name: _Z16intensive_kernelPj
.private_segment_fixed_size: 0
.sgpr_count: 36
.sgpr_spill_count: 0
.symbol: _Z16intensive_kernelPj.kd
.uniform_work_group_size: 1
.uses_dynamic_stack: false
.vgpr_count: 18
.vgpr_spill_count: 0
.wavefront_size: 32
.workgroup_processor_mode: 1
amdhsa.target: amdgcn-amd-amdhsa--gfx1100
amdhsa.version:
- 1
- 2
...
.end_amdgpu_metadata |
You are a helpful coding assistant specialized in converting from CUDA host assembly to AMD host assembly. | .file "tmpxft_0017ea95_00000000-6_main.cudafe1.cpp"
.text
#APP
#NO_APP
.globl _Z9IncrementPv
.type _Z9IncrementPv, @function
_Z9IncrementPv:
.LFB2080:
.cfi_startproc
endbr64
pushq %rax
.cfi_def_cfa_offset 16
popq %rax
.cfi_def_cfa_offset 8
subq $8, %rsp
.cfi_def_cfa_offset 16
movl (%rdi), %eax
movl 4(%rdi), %edx
movq 8(%rdi), %rsi
leal 63(%rdx), %ecx
testl %edx, %edx
cmovns %edx, %ecx
sarl $6, %ecx
cmpl $63, %edx
jle .L2
imull %ecx, %eax
cltq
leaq (%rsi,%rax,8), %rdx
movl $0, %eax
.L3:
movsd (%rdx,%rax,8), %xmm0
addsd %xmm0, %xmm0
movsd %xmm0, (%rdx,%rax,8)
addq $1, %rax
cmpl %eax, %ecx
jg .L3
.L2:
movl $0, %edi
call pthread_exit@PLT
.cfi_endproc
.LFE2080:
.size _Z9IncrementPv, .-_Z9IncrementPv
.type _ZL26__cudaUnregisterBinaryUtilv, @function
_ZL26__cudaUnregisterBinaryUtilv:
.LFB2085:
.cfi_startproc
endbr64
subq $8, %rsp
.cfi_def_cfa_offset 16
movq _ZL20__cudaFatCubinHandle(%rip), %rdi
call __cudaUnregisterFatBinary@PLT
addq $8, %rsp
.cfi_def_cfa_offset 8
ret
.cfi_endproc
.LFE2085:
.size _ZL26__cudaUnregisterBinaryUtilv, .-_ZL26__cudaUnregisterBinaryUtilv
.section .rodata.str1.8,"aMS",@progbits,1
.align 8
.LC0:
.string "Total memory %dMB\tFree Memory %dMB\n"
.text
.globl _Z16available_memoryv
.type _Z16available_memoryv, @function
_Z16available_memoryv:
.LFB2081:
.cfi_startproc
endbr64
subq $40, %rsp
.cfi_def_cfa_offset 48
movq %fs:40, %rax
movq %rax, 24(%rsp)
xorl %eax, %eax
movq $0, 8(%rsp)
movq $0, 16(%rsp)
leaq 8(%rsp), %rsi
leaq 16(%rsp), %rdi
call cudaMemGetInfo@PLT
movq 16(%rsp), %rcx
shrq $20, %rcx
movq 8(%rsp), %rdx
shrq $20, %rdx
leaq .LC0(%rip), %rsi
movl $2, %edi
movl $0, %eax
call __printf_chk@PLT
movq 16(%rsp), %rax
movq 24(%rsp), %rdx
subq %fs:40, %rdx
jne .L11
addq $40, %rsp
.cfi_remember_state
.cfi_def_cfa_offset 8
ret
.L11:
.cfi_restore_state
call __stack_chk_fail@PLT
.cfi_endproc
.LFE2081:
.size _Z16available_memoryv, .-_Z16available_memoryv
.globl _Z36__device_stub__Z16intensive_kernelPjPj
.type _Z36__device_stub__Z16intensive_kernelPjPj, @function
_Z36__device_stub__Z16intensive_kernelPjPj:
.LFB2107:
.cfi_startproc
endbr64
subq $104, %rsp
.cfi_def_cfa_offset 112
movq %rdi, 8(%rsp)
movq %fs:40, %rax
movq %rax, 88(%rsp)
xorl %eax, %eax
leaq 8(%rsp), %rax
movq %rax, 80(%rsp)
movl $1, 32(%rsp)
movl $1, 36(%rsp)
movl $1, 40(%rsp)
movl $1, 44(%rsp)
movl $1, 48(%rsp)
movl $1, 52(%rsp)
leaq 24(%rsp), %rcx
leaq 16(%rsp), %rdx
leaq 44(%rsp), %rsi
leaq 32(%rsp), %rdi
call __cudaPopCallConfiguration@PLT
testl %eax, %eax
je .L16
.L12:
movq 88(%rsp), %rax
subq %fs:40, %rax
jne .L17
addq $104, %rsp
.cfi_remember_state
.cfi_def_cfa_offset 8
ret
.L16:
.cfi_restore_state
pushq 24(%rsp)
.cfi_def_cfa_offset 120
pushq 24(%rsp)
.cfi_def_cfa_offset 128
leaq 96(%rsp), %r9
movq 60(%rsp), %rcx
movl 68(%rsp), %r8d
movq 48(%rsp), %rsi
movl 56(%rsp), %edx
leaq _Z16intensive_kernelPj(%rip), %rdi
call cudaLaunchKernel@PLT
addq $16, %rsp
.cfi_def_cfa_offset 112
jmp .L12
.L17:
call __stack_chk_fail@PLT
.cfi_endproc
.LFE2107:
.size _Z36__device_stub__Z16intensive_kernelPjPj, .-_Z36__device_stub__Z16intensive_kernelPjPj
.globl _Z16intensive_kernelPj
.type _Z16intensive_kernelPj, @function
_Z16intensive_kernelPj:
.LFB2108:
.cfi_startproc
endbr64
subq $8, %rsp
.cfi_def_cfa_offset 16
call _Z36__device_stub__Z16intensive_kernelPjPj
addq $8, %rsp
.cfi_def_cfa_offset 8
ret
.cfi_endproc
.LFE2108:
.size _Z16intensive_kernelPj, .-_Z16intensive_kernelPj
.section .rodata.str1.8
.align 8
.LC1:
.string "Usage: stresstest <duration>\n\tduration\tTime stress will run in seconds\n"
.align 8
.LC4:
.string "Allocating 90%% of the available memory: (%dMB)\n"
.section .rodata.str1.1,"aMS",@progbits,1
.LC5:
.string "Initializing buffers...\n"
.section .rodata.str1.8
.align 8
.LC8:
.string "Finished initialization of buffers!\n\n"
.section .rodata.str1.1
.LC9:
.string "Start stressing...\n"
.LC10:
.string "./temperature"
.LC11:
.string "Execv failed!\n"
.LC12:
.string "Unable to create thread\n"
.LC13:
.string "fork() failed!\n"
.LC14:
.string "Finished!\n"
.text
.globl main
.type main, @function
main:
.LFB2082:
.cfi_startproc
endbr64
pushq %r15
.cfi_def_cfa_offset 16
.cfi_offset 15, -16
pushq %r14
.cfi_def_cfa_offset 24
.cfi_offset 14, -24
pushq %r13
.cfi_def_cfa_offset 32
.cfi_offset 13, -32
pushq %r12
.cfi_def_cfa_offset 40
.cfi_offset 12, -40
pushq %rbp
.cfi_def_cfa_offset 48
.cfi_offset 6, -48
pushq %rbx
.cfi_def_cfa_offset 56
.cfi_offset 3, -56
subq $232, %rsp
.cfi_def_cfa_offset 288
movq %fs:40, %rax
movq %rax, 216(%rsp)
xorl %eax, %eax
cmpl $1, %edi
jle .L56
movq %rsi, %r13
movq 8(%rsi), %rdi
movl $10, %edx
movl $0, %esi
call __isoc23_strtol@PLT
movq %rax, %r14
movl $0, %edi
call cudaSetDevice@PLT
leaq 64(%rsp), %rdi
call cudaStreamCreate@PLT
leaq 72(%rsp), %rdi
call cudaStreamCreate@PLT
call _Z16available_memoryv
testq %rax, %rax
js .L22
pxor %xmm0, %xmm0
cvtsi2sdq %rax, %xmm0
.L23:
mulsd .LC2(%rip), %xmm0
comisd .LC3(%rip), %xmm0
jnb .L24
cvttsd2siq %xmm0, %r12
.L25:
movq %r12, %rdx
shrq $20, %rdx
leaq .LC4(%rip), %rsi
movl $2, %edi
movl $0, %eax
call __printf_chk@PLT
movq %r12, %rbx
shrq $2, %rbx
movq %rbx, (%rsp)
leaq 24(%rsp), %rdi
movq %rbx, %rsi
call cudaMalloc@PLT
leaq 40(%rsp), %rdi
movq %rbx, %rsi
call cudaMalloc@PLT
leaq 56(%rsp), %rdi
movl $40, %esi
call cudaMalloc@PLT
leaq 48(%rsp), %rdi
movl $40, %esi
call cudaMallocHost@PLT
leaq 16(%rsp), %rdi
movq %rbx, %rsi
call cudaMallocHost@PLT
leaq 32(%rsp), %rdi
movq %rbx, %rsi
call cudaMallocHost@PLT
movl $0, %edi
call time@PLT
movl %eax, %edi
call srand@PLT
leaq .LC5(%rip), %rsi
movl $2, %edi
movl $0, %eax
call __printf_chk@PLT
movq %r12, %rbp
shrq $5, %rbp
cmpq $31, %r12
jbe .L26
movl $0, %ebx
.L27:
call rand@PLT
imull %ebx, %eax
pxor %xmm0, %xmm0
cvtsi2sdl %eax, %xmm0
mulsd .LC6(%rip), %xmm0
movq 16(%rsp), %rax
movsd %xmm0, (%rax,%rbx,8)
call rand@PLT
imull %ebx, %eax
pxor %xmm0, %xmm0
cvtsi2sdl %eax, %xmm0
mulsd .LC7(%rip), %xmm0
movq 32(%rsp), %rax
movsd %xmm0, (%rax,%rbx,8)
addq $1, %rbx
cmpq %rbp, %rbx
jb .L27
.L26:
leaq .LC8(%rip), %rsi
movl $2, %edi
movl $0, %eax
call __printf_chk@PLT
movq 48(%rsp), %rax
movl $45, (%rax)
movq 48(%rsp), %rax
movl $45, 4(%rax)
movq 48(%rsp), %rax
movl $0, 36(%rax)
movl $1, %ecx
movq (%rsp), %rbx
movq %rbx, %rdx
movq 16(%rsp), %rsi
movq 24(%rsp), %rdi
call cudaMemcpy@PLT
movl $1, %ecx
movq %rbx, %rdx
movq 32(%rsp), %rsi
movq 40(%rsp), %rdi
call cudaMemcpy@PLT
leaq 40(%rsp), %rsi
movq 48(%rsp), %rax
leaq 12(%rax), %rdi
movl $0, %ecx
movl $8, %edx
call cudaMemcpy@PLT
leaq 24(%rsp), %rsi
movq 48(%rsp), %rax
leaq 20(%rax), %rdi
movl $0, %ecx
movl $8, %edx
call cudaMemcpy@PLT
movl $1, %ecx
movl $40, %edx
movq 48(%rsp), %rsi
movq 56(%rsp), %rdi
call cudaMemcpy@PLT
leaq 80(%rsp), %rdi
movl $0, %esi
call gettimeofday@PLT
leaq .LC9(%rip), %rsi
movl $2, %edi
movl $0, %eax
call __printf_chk@PLT
movl $1024, 112(%rsp)
movl $1, 116(%rsp)
movl $1, 120(%rsp)
shrq $14, %r12
movl %r12d, 96(%rsp)
movl $1, 100(%rsp)
movl $1, 104(%rsp)
movq 64(%rsp), %r9
movl $0, %r8d
movq 112(%rsp), %rdx
movl $1, %ecx
movq 96(%rsp), %rdi
movl $1, %esi
call __cudaPushCallConfiguration@PLT
testl %eax, %eax
je .L57
.L28:
call fork@PLT
testl %eax, %eax
je .L58
jle .L31
leaq 96(%rsp), %rdi
movl $0, %esi
call gettimeofday@PLT
movslq %r14d, %rcx
movq %rcx, 8(%rsp)
movq 96(%rsp), %rax
subq 80(%rsp), %rax
cmpq %rcx, %rax
jge .L32
leaq _Z9IncrementPv(%rip), %r14
jmp .L43
.L56:
leaq .LC1(%rip), %rsi
movl $2, %edi
call __printf_chk@PLT
movl $1, %edi
call exit@PLT
.L22:
movq %rax, %rdx
shrq %rdx
andl $1, %eax
orq %rax, %rdx
pxor %xmm0, %xmm0
cvtsi2sdq %rdx, %xmm0
addsd %xmm0, %xmm0
jmp .L23
.L24:
subsd .LC3(%rip), %xmm0
cvttsd2siq %xmm0, %r12
btcq $63, %r12
jmp .L25
.L57:
movq 56(%rsp), %rdi
call _Z36__device_stub__Z16intensive_kernelPjPj
jmp .L28
.L58:
movq %r13, %rsi
leaq .LC10(%rip), %rdi
call execv@PLT
cmpl $-1, %eax
je .L59
.L30:
movq 24(%rsp), %rdi
call cudaFree@PLT
movq 40(%rsp), %rdi
call cudaFree@PLT
movq 56(%rsp), %rdi
call cudaFree@PLT
movq 16(%rsp), %rdi
call cudaFreeHost@PLT
movq 32(%rsp), %rdi
call cudaFreeHost@PLT
movq 48(%rsp), %rdi
call cudaFreeHost@PLT
leaq .LC14(%rip), %rsi
movl $2, %edi
movl $0, %eax
call __printf_chk@PLT
movq 216(%rsp), %rax
subq %fs:40, %rax
jne .L60
movl $0, %eax
addq $232, %rsp
.cfi_remember_state
.cfi_def_cfa_offset 56
popq %rbx
.cfi_def_cfa_offset 48
popq %rbp
.cfi_def_cfa_offset 40
popq %r12
.cfi_def_cfa_offset 32
popq %r13
.cfi_def_cfa_offset 24
popq %r14
.cfi_def_cfa_offset 16
popq %r15
.cfi_def_cfa_offset 8
ret
.L59:
.cfi_restore_state
leaq .LC11(%rip), %rsi
movl $2, %edi
movl $0, %eax
call __printf_chk@PLT
movl $1, %edi
call exit@PLT
.L61:
leaq .LC12(%rip), %rsi
movl $2, %edi
movl $0, %eax
call __printf_chk@PLT
movl $-1, %edi
call exit@PLT
.L62:
cmpl $1, %ebx
je .L38
.L37:
leaq 96(%rsp), %rdi
movl $0, %esi
call gettimeofday@PLT
movq 96(%rsp), %rax
subq 80(%rsp), %rax
movq 8(%rsp), %rcx
cmpq %rcx, %rax
jge .L32
.L43:
movl $10, %edi
call usleep@PLT
movq 48(%rsp), %rax
movl $65, (%rax)
movq 48(%rsp), %rax
movl $45, 4(%rax)
call random@PLT
cqto
shrq $55, %rdx
addq %rdx, %rax
andl $511, %eax
subq %rdx, %rax
movq 48(%rsp), %rdx
movl %eax, 8(%rdx)
movl $0, %ebp
movl (%rsp), %r13d
leaq 112(%rsp), %r15
.L34:
movl %ebp, 112(%rsp)
movl %r13d, 116(%rsp)
movq 32(%rsp), %rax
movq %rax, 120(%rsp)
leaq 144(%rsp), %r12
leaq (%r12,%rbp,8), %rdi
movq %r15, %rcx
movq %r14, %rdx
movl $0, %esi
call pthread_create@PLT
movl %eax, %ebx
testl %eax, %eax
jne .L61
addq $1, %rbp
cmpq $8, %rbp
jne .L34
leaq 64(%r12), %r15
movq %r12, %rbp
.L35:
movq 0(%rbp), %rdi
movl $0, %esi
call pthread_join@PLT
addq $8, %rbp
cmpq %r15, %rbp
jne .L35
movq 72(%rsp), %r8
movl $1, %ecx
movq (%rsp), %rbp
movq %rbp, %rdx
movq 16(%rsp), %rsi
movq 24(%rsp), %rdi
call cudaMemcpyAsync@PLT
movq 72(%rsp), %r8
movl $1, %ecx
movq %rbp, %rdx
movq 32(%rsp), %rsi
movq 40(%rsp), %rdi
call cudaMemcpyAsync@PLT
movq 48(%rsp), %rax
leaq 8(%rax), %rsi
movq 56(%rsp), %rax
leaq 8(%rax), %rdi
movq 72(%rsp), %r8
movl $1, %ecx
movl $4, %edx
call cudaMemcpyAsync@PLT
movq 72(%rsp), %rdi
call cudaStreamSynchronize@PLT
movq 48(%rsp), %rax
leaq 4(%rax), %rsi
movq 56(%rsp), %rax
leaq 4(%rax), %rdi
movq 72(%rsp), %r8
movl $1, %ecx
movl $4, %edx
call cudaMemcpyAsync@PLT
movq 72(%rsp), %rdi
call cudaStreamSynchronize@PLT
movq 72(%rsp), %r8
movl $1, %ecx
movl $4, %edx
movq 48(%rsp), %rsi
movq 56(%rsp), %rdi
call cudaMemcpyAsync@PLT
movq 72(%rsp), %rdi
call cudaStreamSynchronize@PLT
movq 48(%rsp), %rdi
movl $1, %ebp
cmpl $65, (%rdi)
jne .L37
.L36:
cmpl $90, 4(%rdi)
je .L62
movq 56(%rsp), %rax
leaq 4(%rax), %rsi
addq $4, %rdi
movq 72(%rsp), %r8
movl $2, %ecx
movl $4, %edx
call cudaMemcpyAsync@PLT
movq 72(%rsp), %rdi
call cudaStreamSynchronize@PLT
movq 48(%rsp), %rdi
movl %ebp, %ebx
cmpl $65, (%rdi)
je .L36
.L38:
movq 72(%rsp), %r8
movl $2, %ecx
movq (%rsp), %rdx
movq 24(%rsp), %rsi
movq 16(%rsp), %rdi
call cudaMemcpyAsync@PLT
movq 72(%rsp), %rdi
call cudaStreamSynchronize@PLT
movl $0, %ebx
.L41:
movl %ebx, 112(%rsp)
movl %r13d, 116(%rsp)
movq 16(%rsp), %rax
movq %rax, 120(%rsp)
leaq 112(%rsp), %rcx
leaq (%r12,%rbx,8), %rdi
movq %r14, %rdx
movl $0, %esi
call pthread_create@PLT
testl %eax, %eax
jne .L63
addq $1, %rbx
cmpq $8, %rbx
jne .L41
.L42:
movq (%r12), %rdi
movl $0, %esi
call pthread_join@PLT
addq $8, %r12
cmpq %r15, %r12
jne .L42
movq 48(%rsp), %rax
movl $45, (%rax)
movq 72(%rsp), %r8
movl $1, %ecx
movl $4, %edx
movq 48(%rsp), %rsi
movq 56(%rsp), %rdi
call cudaMemcpyAsync@PLT
movq 72(%rsp), %rdi
call cudaStreamSynchronize@PLT
movq 48(%rsp), %rsi
movl $0, 8(%rsi)
addq $8, %rsi
movq 56(%rsp), %rax
leaq 8(%rax), %rdi
movq 72(%rsp), %r8
movl $1, %ecx
movl $4, %edx
call cudaMemcpyAsync@PLT
movq 72(%rsp), %rdi
call cudaStreamSynchronize@PLT
jmp .L37
.L63:
leaq .LC12(%rip), %rsi
movl $2, %edi
movl $0, %eax
call __printf_chk@PLT
movl $-1, %edi
call exit@PLT
.L32:
movq 48(%rsp), %rax
movl $1, 32(%rax)
leaq 32(%rax), %rsi
movq 56(%rsp), %rax
leaq 32(%rax), %rdi
movq 72(%rsp), %r8
movl $1, %ecx
movl $4, %edx
call cudaMemcpyAsync@PLT
movq 72(%rsp), %rdi
call cudaStreamSynchronize@PLT
movq 48(%rsp), %rdi
cmpl $1, 32(%rdi)
jne .L30
.L44:
cmpl $1, 36(%rdi)
je .L30
movq 56(%rsp), %rax
leaq 36(%rax), %rsi
addq $36, %rdi
movq 72(%rsp), %r8
movl $2, %ecx
movl $4, %edx
call cudaMemcpyAsync@PLT
movq 72(%rsp), %rdi
call cudaStreamSynchronize@PLT
movq 48(%rsp), %rdi
cmpl $1, 32(%rdi)
je .L44
jmp .L30
.L31:
leaq .LC13(%rip), %rsi
movl $2, %edi
movl $0, %eax
call __printf_chk@PLT
movl $1, %edi
call exit@PLT
.L60:
call __stack_chk_fail@PLT
.cfi_endproc
.LFE2082:
.size main, .-main
.section .rodata.str1.1
.LC15:
.string "_Z16intensive_kernelPj"
.text
.type _ZL24__sti____cudaRegisterAllv, @function
_ZL24__sti____cudaRegisterAllv:
.LFB2110:
.cfi_startproc
endbr64
subq $8, %rsp
.cfi_def_cfa_offset 16
leaq _ZL15__fatDeviceText(%rip), %rdi
call __cudaRegisterFatBinary@PLT
movq %rax, %rdi
movq %rax, _ZL20__cudaFatCubinHandle(%rip)
pushq $0
.cfi_def_cfa_offset 24
pushq $0
.cfi_def_cfa_offset 32
pushq $0
.cfi_def_cfa_offset 40
pushq $0
.cfi_def_cfa_offset 48
movl $0, %r9d
movl $-1, %r8d
leaq .LC15(%rip), %rdx
movq %rdx, %rcx
leaq _Z16intensive_kernelPj(%rip), %rsi
call __cudaRegisterFunction@PLT
addq $32, %rsp
.cfi_def_cfa_offset 16
movq _ZL20__cudaFatCubinHandle(%rip), %rdi
call __cudaRegisterFatBinaryEnd@PLT
leaq _ZL26__cudaUnregisterBinaryUtilv(%rip), %rdi
call atexit@PLT
addq $8, %rsp
.cfi_def_cfa_offset 8
ret
.cfi_endproc
.LFE2110:
.size _ZL24__sti____cudaRegisterAllv, .-_ZL24__sti____cudaRegisterAllv
.section .init_array,"aw"
.align 8
.quad _ZL24__sti____cudaRegisterAllv
.section .nvFatBinSegment,"aw"
.align 8
.type _ZL15__fatDeviceText, @object
.size _ZL15__fatDeviceText, 24
_ZL15__fatDeviceText:
.long 1180844977
.long 1
.quad fatbinData
.quad 0
.local _ZL20__cudaFatCubinHandle
.comm _ZL20__cudaFatCubinHandle,8,8
.section .rodata.cst8,"aM",@progbits,8
.align 8
.LC2:
.long -858993459
.long 1072483532
.align 8
.LC3:
.long 0
.long 1138753536
.align 8
.LC6:
.long 1017048256
.long 1073599532
.align 8
.LC7:
.long -804017878
.long 1073207364
.ident "GCC: (Ubuntu 13.3.0-6ubuntu2~24.04) 13.3.0"
.section .note.GNU-stack,"",@progbits
.section .note.gnu.property,"a"
.align 8
.long 1f - 0f
.long 4f - 1f
.long 5
0:
.string "GNU"
1:
.align 8
.long 0xc0000002
.long 3f - 2f
2:
.long 0x3
3:
.align 8
4: | .text
.file "main.hip"
.globl _Z9IncrementPv # -- Begin function _Z9IncrementPv
.p2align 4, 0x90
.type _Z9IncrementPv,@function
_Z9IncrementPv: # @_Z9IncrementPv
.cfi_startproc
# %bb.0:
pushq %rax
.cfi_def_cfa_offset 16
movl 4(%rdi), %eax
cmpl $64, %eax
jl .LBB0_3
# %bb.1: # %.lr.ph
movq 8(%rdi), %rcx
shrl $6, %eax
movslq (%rdi), %rdx
imulq %rax, %rdx
leaq (%rcx,%rdx,8), %rcx
xorl %edx, %edx
.p2align 4, 0x90
.LBB0_2: # =>This Inner Loop Header: Depth=1
movsd (%rcx,%rdx,8), %xmm0 # xmm0 = mem[0],zero
addsd %xmm0, %xmm0
movsd %xmm0, (%rcx,%rdx,8)
incq %rdx
cmpq %rdx, %rax
jne .LBB0_2
.LBB0_3: # %._crit_edge
xorl %edi, %edi
callq pthread_exit
.Lfunc_end0:
.size _Z9IncrementPv, .Lfunc_end0-_Z9IncrementPv
.cfi_endproc
# -- End function
.globl _Z31__device_stub__intensive_kernelPj # -- Begin function _Z31__device_stub__intensive_kernelPj
.p2align 4, 0x90
.type _Z31__device_stub__intensive_kernelPj,@function
_Z31__device_stub__intensive_kernelPj: # @_Z31__device_stub__intensive_kernelPj
.cfi_startproc
# %bb.0:
subq $72, %rsp
.cfi_def_cfa_offset 80
movq %rdi, 64(%rsp)
leaq 64(%rsp), %rax
movq %rax, (%rsp)
leaq 48(%rsp), %rdi
leaq 32(%rsp), %rsi
leaq 24(%rsp), %rdx
leaq 16(%rsp), %rcx
callq __hipPopCallConfiguration
movq 48(%rsp), %rsi
movl 56(%rsp), %edx
movq 32(%rsp), %rcx
movl 40(%rsp), %r8d
movq %rsp, %r9
movl $_Z16intensive_kernelPj, %edi
pushq 16(%rsp)
.cfi_adjust_cfa_offset 8
pushq 32(%rsp)
.cfi_adjust_cfa_offset 8
callq hipLaunchKernel
addq $88, %rsp
.cfi_adjust_cfa_offset -88
retq
.Lfunc_end1:
.size _Z31__device_stub__intensive_kernelPj, .Lfunc_end1-_Z31__device_stub__intensive_kernelPj
.cfi_endproc
# -- End function
.globl _Z16available_memoryv # -- Begin function _Z16available_memoryv
.p2align 4, 0x90
.type _Z16available_memoryv,@function
_Z16available_memoryv: # @_Z16available_memoryv
.cfi_startproc
# %bb.0:
subq $24, %rsp
.cfi_def_cfa_offset 32
movq $0, 16(%rsp)
movq $0, 8(%rsp)
leaq 8(%rsp), %rdi
leaq 16(%rsp), %rsi
callq hipMemGetInfo
movq 16(%rsp), %rsi
shrq $20, %rsi
movq 8(%rsp), %rdx
shrq $20, %rdx
movl $.L.str, %edi
xorl %eax, %eax
callq printf
movq 8(%rsp), %rax
addq $24, %rsp
.cfi_def_cfa_offset 8
retq
.Lfunc_end2:
.size _Z16available_memoryv, .Lfunc_end2-_Z16available_memoryv
.cfi_endproc
# -- End function
.section .rodata.cst16,"aM",@progbits,16
.p2align 4, 0x0 # -- Begin function main
.LCPI3_0:
.long 1127219200 # 0x43300000
.long 1160773632 # 0x45300000
.long 0 # 0x0
.long 0 # 0x0
.LCPI3_1:
.quad 0x4330000000000000 # double 4503599627370496
.quad 0x4530000000000000 # double 1.9342813113834067E+25
.section .rodata.cst8,"aM",@progbits,8
.p2align 3, 0x0
.LCPI3_2:
.quad 0x3feccccccccccccd # double 0.90000000000000002
.LCPI3_3:
.quad 0x43e0000000000000 # double 9.2233720368547758E+18
.LCPI3_4:
.quad 0x3ffdd42c3c9eecc0 # double 1.8643000000000001
.LCPI3_5:
.quad 0x3ff7d844d013a92a # double 1.4903
.text
.globl main
.p2align 4, 0x90
.type main,@function
main: # @main
.cfi_startproc
# %bb.0:
pushq %rbp
.cfi_def_cfa_offset 16
pushq %r15
.cfi_def_cfa_offset 24
pushq %r14
.cfi_def_cfa_offset 32
pushq %r13
.cfi_def_cfa_offset 40
pushq %r12
.cfi_def_cfa_offset 48
pushq %rbx
.cfi_def_cfa_offset 56
subq $216, %rsp
.cfi_def_cfa_offset 272
.cfi_offset %rbx, -56
.cfi_offset %r12, -48
.cfi_offset %r13, -40
.cfi_offset %r14, -32
.cfi_offset %r15, -24
.cfi_offset %rbp, -16
cmpl $1, %edi
jle .LBB3_1
# %bb.3:
movq %rsi, %r15
movq 8(%rsi), %rdi
xorl %esi, %esi
movl $10, %edx
callq __isoc23_strtol
movq %rax, %r12
xorl %edi, %edi
callq hipSetDevice
leaq 104(%rsp), %rdi
callq hipStreamCreate
movq %rsp, %rdi
callq hipStreamCreate
movq $0, 144(%rsp)
movq $0, 56(%rsp)
leaq 56(%rsp), %rdi
leaq 144(%rsp), %rsi
callq hipMemGetInfo
movq 144(%rsp), %rsi
shrq $20, %rsi
movq 56(%rsp), %rdx
shrq $20, %rdx
movl $.L.str, %edi
xorl %eax, %eax
callq printf
movsd 56(%rsp), %xmm0 # xmm0 = mem[0],zero
unpcklps .LCPI3_0(%rip), %xmm0 # xmm0 = xmm0[0],mem[0],xmm0[1],mem[1]
subpd .LCPI3_1(%rip), %xmm0
movapd %xmm0, %xmm1
unpckhpd %xmm0, %xmm1 # xmm1 = xmm1[1],xmm0[1]
addsd %xmm0, %xmm1
mulsd .LCPI3_2(%rip), %xmm1
cvttsd2si %xmm1, %rax
movq %rax, %rcx
sarq $63, %rcx
subsd .LCPI3_3(%rip), %xmm1
cvttsd2si %xmm1, %rbx
andq %rcx, %rbx
orq %rax, %rbx
movq %rbx, %rsi
shrq $20, %rsi
movl $.L.str.2, %edi
xorl %eax, %eax
callq printf
movq %rbx, %r14
shrq $2, %r14
leaq 40(%rsp), %rdi
movq %r14, %rsi
callq hipMalloc
leaq 48(%rsp), %rdi
movq %r14, %rsi
callq hipMalloc
leaq 16(%rsp), %rdi
movl $40, %esi
callq hipMalloc
leaq 8(%rsp), %rdi
movl $40, %esi
xorl %edx, %edx
callq hipHostMalloc
leaq 24(%rsp), %rdi
movq %r14, %rsi
xorl %edx, %edx
callq hipHostMalloc
leaq 32(%rsp), %rdi
movq %r14, %rsi
xorl %edx, %edx
callq hipHostMalloc
xorl %edi, %edi
callq time
movl %eax, %edi
callq srand
movl $.Lstr, %edi
callq puts@PLT
cmpq $32, %rbx
jb .LBB3_6
# %bb.4: # %.lr.ph.preheader
movq %rbx, %r13
shrq $5, %r13
xorl %ebp, %ebp
.p2align 4, 0x90
.LBB3_5: # %.lr.ph
# =>This Inner Loop Header: Depth=1
callq rand
imull %ebp, %eax
xorps %xmm0, %xmm0
cvtsi2sd %eax, %xmm0
mulsd .LCPI3_4(%rip), %xmm0
movq 24(%rsp), %rax
movsd %xmm0, (%rax,%rbp,8)
callq rand
imull %ebp, %eax
xorps %xmm0, %xmm0
cvtsi2sd %eax, %xmm0
mulsd .LCPI3_5(%rip), %xmm0
movq 32(%rsp), %rax
movsd %xmm0, (%rax,%rbp,8)
incq %rbp
cmpq %rbp, %r13
jne .LBB3_5
.LBB3_6: # %._crit_edge
movl $.Lstr.1, %edi
callq puts@PLT
movq 8(%rsp), %rax
movabsq $193273528365, %rcx # imm = 0x2D0000002D
movq %rcx, (%rax)
movl $0, 36(%rax)
movq 40(%rsp), %rdi
movq 24(%rsp), %rsi
movq %r14, %rdx
movl $1, %ecx
callq hipMemcpy
movq 48(%rsp), %rdi
movq 32(%rsp), %rsi
movq %r14, %rdx
movl $1, %ecx
callq hipMemcpy
movq 8(%rsp), %rdi
addq $12, %rdi
leaq 48(%rsp), %rsi
movl $8, %edx
xorl %ecx, %ecx
callq hipMemcpy
movq 8(%rsp), %rdi
addq $20, %rdi
leaq 40(%rsp), %rsi
movl $8, %edx
xorl %ecx, %ecx
callq hipMemcpy
movq 16(%rsp), %rdi
movq 8(%rsp), %rsi
movl $40, %edx
movl $1, %ecx
callq hipMemcpy
shrq $14, %rbx
leaq 128(%rsp), %rdi
xorl %esi, %esi
callq gettimeofday
movl $.Lstr.2, %edi
callq puts@PLT
movq 104(%rsp), %r9
movl %ebx, %edi
movabsq $4294967296, %rdx # imm = 0x100000000
orq %rdx, %rdi
orq $1024, %rdx # imm = 0x400
movl $1, %esi
movl $1, %ecx
xorl %r8d, %r8d
callq __hipPushCallConfiguration
testl %eax, %eax
jne .LBB3_8
# %bb.7:
movq 16(%rsp), %rax
movq %rax, 80(%rsp)
leaq 80(%rsp), %rax
movq %rax, 96(%rsp)
leaq 144(%rsp), %rdi
leaq 56(%rsp), %rsi
leaq 120(%rsp), %rdx
leaq 112(%rsp), %rcx
callq __hipPopCallConfiguration
movq 144(%rsp), %rsi
movl 152(%rsp), %edx
movq 56(%rsp), %rcx
movl 64(%rsp), %r8d
leaq 96(%rsp), %r9
movl $_Z16intensive_kernelPj, %edi
pushq 112(%rsp)
.cfi_adjust_cfa_offset 8
pushq 128(%rsp)
.cfi_adjust_cfa_offset 8
callq hipLaunchKernel
addq $16, %rsp
.cfi_adjust_cfa_offset -16
.LBB3_8:
callq fork
testl %eax, %eax
je .LBB3_9
# %bb.11:
jle .LBB3_37
# %bb.12:
leaq 80(%rsp), %rdi
xorl %esi, %esi
callq gettimeofday
movslq %r12d, %rbp
movq 80(%rsp), %rax
subq 128(%rsp), %rax
cmpq %rbp, %rax
jge .LBB3_32
# %bb.13: # %.lr.ph83
movq 128(%rsp), %rbx
leaq 56(%rsp), %r15
jmp .LBB3_14
.p2align 4, 0x90
.LBB3_31: # %.critedge88
# in Loop: Header=BB3_14 Depth=1
leaq 80(%rsp), %rdi
xorl %esi, %esi
callq gettimeofday
movq 80(%rsp), %rax
subq %rbx, %rax
cmpq %rbp, %rax
jge .LBB3_32
.LBB3_14: # =>This Loop Header: Depth=1
# Child Loop BB3_15 Depth 2
# Child Loop BB3_18 Depth 2
# Child Loop BB3_23 Depth 2
# Child Loop BB3_26 Depth 2
# Child Loop BB3_29 Depth 2
movl $10, %edi
callq usleep
movq 8(%rsp), %rax
movabsq $193273528385, %rcx # imm = 0x2D00000041
movq %rcx, (%rax)
callq random
leal 511(%rax), %ecx
testq %rax, %rax
cmovnsl %eax, %ecx
andl $-512, %ecx # imm = 0xFE00
subl %ecx, %eax
movq 8(%rsp), %rcx
movl %eax, 8(%rcx)
leaq 144(%rsp), %r13
xorl %r12d, %r12d
.p2align 4, 0x90
.LBB3_15: # Parent Loop BB3_14 Depth=1
# => This Inner Loop Header: Depth=2
movl %r12d, 56(%rsp)
movl %r14d, 60(%rsp)
movq 32(%rsp), %rax
movq %rax, 64(%rsp)
movl $_Z9IncrementPv, %edx
movq %r13, %rdi
xorl %esi, %esi
movq %r15, %rcx
callq pthread_create
testl %eax, %eax
jne .LBB3_38
# %bb.16: # in Loop: Header=BB3_15 Depth=2
incq %r12
addq $8, %r13
cmpq $8, %r12
jne .LBB3_15
# %bb.17: # %.preheader72.preheader
# in Loop: Header=BB3_14 Depth=1
xorl %r12d, %r12d
.p2align 4, 0x90
.LBB3_18: # %.preheader72
# Parent Loop BB3_14 Depth=1
# => This Inner Loop Header: Depth=2
movq 144(%rsp,%r12,8), %rdi
xorl %esi, %esi
callq pthread_join
incq %r12
cmpq $8, %r12
jne .LBB3_18
# %bb.19: # in Loop: Header=BB3_14 Depth=1
movq 40(%rsp), %rdi
movq 24(%rsp), %rsi
movq (%rsp), %r8
movq %r14, %rdx
movl $1, %ecx
callq hipMemcpyAsync
movq 48(%rsp), %rdi
movq 32(%rsp), %rsi
movq (%rsp), %r8
movq %r14, %rdx
movl $1, %ecx
callq hipMemcpyAsync
movq 16(%rsp), %rdi
addq $8, %rdi
movq 8(%rsp), %rsi
addq $8, %rsi
movq (%rsp), %r8
movl $4, %edx
movl $1, %ecx
callq hipMemcpyAsync
movq (%rsp), %rdi
callq hipStreamSynchronize
movq 16(%rsp), %rdi
addq $4, %rdi
movq 8(%rsp), %rsi
addq $4, %rsi
movq (%rsp), %r8
movl $4, %edx
movl $1, %ecx
callq hipMemcpyAsync
movq (%rsp), %rdi
callq hipStreamSynchronize
movq 16(%rsp), %rdi
movq 8(%rsp), %rsi
movq (%rsp), %r8
movl $4, %edx
movl $1, %ecx
callq hipMemcpyAsync
movq (%rsp), %rdi
callq hipStreamSynchronize
movq 8(%rsp), %rdi
cmpl $65, (%rdi)
jne .LBB3_31
# %bb.20: # %.lr.ph77.preheader
# in Loop: Header=BB3_14 Depth=1
movl 4(%rdi), %r13d
cmpl $90, %r13d
je .LBB3_31
# %bb.21: # in Loop: Header=BB3_14 Depth=1
addq $4, %rdi
.p2align 4, 0x90
.LBB3_23: # %.lr.ph111
# Parent Loop BB3_14 Depth=1
# => This Inner Loop Header: Depth=2
movq 16(%rsp), %rsi
addq $4, %rsi
movq (%rsp), %r8
movl $4, %edx
movl $2, %ecx
callq hipMemcpyAsync
movq (%rsp), %rdi
callq hipStreamSynchronize
movq 8(%rsp), %rax
cmpl $65, (%rax)
jne .LBB3_25
# %bb.22: # %.lr.ph77
# in Loop: Header=BB3_23 Depth=2
leaq 4(%rax), %rdi
cmpl $90, 4(%rax)
jne .LBB3_23
# %bb.24: # %.critedge
# in Loop: Header=BB3_14 Depth=1
cmpl $90, %r13d
je .LBB3_31
.LBB3_25: # %.critedge89
# in Loop: Header=BB3_14 Depth=1
movq 24(%rsp), %rdi
movq 40(%rsp), %rsi
movq (%rsp), %r8
movq %r14, %rdx
movl $2, %ecx
callq hipMemcpyAsync
movq (%rsp), %rdi
callq hipStreamSynchronize
leaq 144(%rsp), %r13
xorl %r12d, %r12d
.p2align 4, 0x90
.LBB3_26: # Parent Loop BB3_14 Depth=1
# => This Inner Loop Header: Depth=2
movl %r12d, 56(%rsp)
movl %r14d, 60(%rsp)
movq 24(%rsp), %rax
movq %rax, 64(%rsp)
movl $_Z9IncrementPv, %edx
movq %r13, %rdi
xorl %esi, %esi
movq %r15, %rcx
callq pthread_create
testl %eax, %eax
jne .LBB3_38
# %bb.27: # in Loop: Header=BB3_26 Depth=2
incq %r12
addq $8, %r13
cmpq $8, %r12
jne .LBB3_26
# %bb.28: # %.preheader.preheader
# in Loop: Header=BB3_14 Depth=1
xorl %r12d, %r12d
.p2align 4, 0x90
.LBB3_29: # %.preheader
# Parent Loop BB3_14 Depth=1
# => This Inner Loop Header: Depth=2
movq 144(%rsp,%r12,8), %rdi
xorl %esi, %esi
callq pthread_join
incq %r12
cmpq $8, %r12
jne .LBB3_29
# %bb.30: # in Loop: Header=BB3_14 Depth=1
movq 8(%rsp), %rsi
movl $45, (%rsi)
movq 16(%rsp), %rdi
movq (%rsp), %r8
movl $4, %edx
movl $1, %ecx
callq hipMemcpyAsync
movq (%rsp), %rdi
callq hipStreamSynchronize
movq 8(%rsp), %rsi
movl $0, 8(%rsi)
addq $8, %rsi
movq 16(%rsp), %rdi
addq $8, %rdi
movq (%rsp), %r8
movl $4, %edx
movl $1, %ecx
callq hipMemcpyAsync
movq (%rsp), %rdi
callq hipStreamSynchronize
jmp .LBB3_31
.LBB3_32: # %._crit_edge84
movq 8(%rsp), %rsi
movl $1, 32(%rsi)
addq $32, %rsi
movq 16(%rsp), %rdi
addq $32, %rdi
movq (%rsp), %r8
movl $4, %edx
movl $1, %ecx
.p2align 4, 0x90
.LBB3_33: # %._crit_edge84
# =>This Inner Loop Header: Depth=1
callq hipMemcpyAsync
movq (%rsp), %rdi
callq hipStreamSynchronize
movq 8(%rsp), %rdi
cmpl $1, 32(%rdi)
jne .LBB3_36
# %bb.34: # %.lr.ph86
# in Loop: Header=BB3_33 Depth=1
cmpl $1, 36(%rdi)
je .LBB3_36
# %bb.35: # in Loop: Header=BB3_33 Depth=1
addq $36, %rdi
movq 16(%rsp), %rsi
addq $36, %rsi
movq (%rsp), %r8
movl $4, %edx
movl $2, %ecx
jmp .LBB3_33
.LBB3_9:
movl $.L.str.6, %edi
movq %r15, %rsi
callq execv
cmpl $-1, %eax
je .LBB3_10
.LBB3_36: # %.critedge2
movq 40(%rsp), %rdi
callq hipFree
movq 48(%rsp), %rdi
callq hipFree
movq 16(%rsp), %rdi
callq hipFree
movq 24(%rsp), %rdi
callq hipHostFree
movq 32(%rsp), %rdi
callq hipHostFree
movq 8(%rsp), %rdi
callq hipHostFree
movl $.Lstr.6, %edi
callq puts@PLT
xorl %eax, %eax
addq $216, %rsp
.cfi_def_cfa_offset 56
popq %rbx
.cfi_def_cfa_offset 48
popq %r12
.cfi_def_cfa_offset 40
popq %r13
.cfi_def_cfa_offset 32
popq %r14
.cfi_def_cfa_offset 24
popq %r15
.cfi_def_cfa_offset 16
popq %rbp
.cfi_def_cfa_offset 8
retq
.LBB3_38:
.cfi_def_cfa_offset 272
movl $.Lstr.5, %edi
callq puts@PLT
movl $-1, %edi
callq exit
.LBB3_1:
movl $.Lstr.8, %edi
jmp .LBB3_2
.LBB3_37:
movl $.Lstr.3, %edi
jmp .LBB3_2
.LBB3_10:
movl $.Lstr.7, %edi
.LBB3_2:
callq puts@PLT
movl $1, %edi
callq exit
.Lfunc_end3:
.size main, .Lfunc_end3-main
.cfi_endproc
# -- End function
.p2align 4, 0x90 # -- Begin function __hip_module_ctor
.type __hip_module_ctor,@function
__hip_module_ctor: # @__hip_module_ctor
.cfi_startproc
# %bb.0:
subq $40, %rsp
.cfi_def_cfa_offset 48
cmpq $0, __hip_gpubin_handle(%rip)
jne .LBB4_2
# %bb.1:
movl $__hip_fatbin_wrapper, %edi
callq __hipRegisterFatBinary
movq %rax, __hip_gpubin_handle(%rip)
.LBB4_2:
movq __hip_gpubin_handle(%rip), %rdi
xorps %xmm0, %xmm0
movups %xmm0, 16(%rsp)
movups %xmm0, (%rsp)
movl $_Z16intensive_kernelPj, %esi
movl $.L__unnamed_1, %edx
movl $.L__unnamed_1, %ecx
movl $-1, %r8d
xorl %r9d, %r9d
callq __hipRegisterFunction
movl $__hip_module_dtor, %edi
addq $40, %rsp
.cfi_def_cfa_offset 8
jmp atexit # TAILCALL
.Lfunc_end4:
.size __hip_module_ctor, .Lfunc_end4-__hip_module_ctor
.cfi_endproc
# -- End function
.p2align 4, 0x90 # -- Begin function __hip_module_dtor
.type __hip_module_dtor,@function
__hip_module_dtor: # @__hip_module_dtor
.cfi_startproc
# %bb.0:
movq __hip_gpubin_handle(%rip), %rdi
testq %rdi, %rdi
je .LBB5_2
# %bb.1:
pushq %rax
.cfi_def_cfa_offset 16
callq __hipUnregisterFatBinary
movq $0, __hip_gpubin_handle(%rip)
addq $8, %rsp
.cfi_def_cfa_offset 8
.LBB5_2:
retq
.Lfunc_end5:
.size __hip_module_dtor, .Lfunc_end5-__hip_module_dtor
.cfi_endproc
# -- End function
.type _Z16intensive_kernelPj,@object # @_Z16intensive_kernelPj
.section .rodata,"a",@progbits
.globl _Z16intensive_kernelPj
.p2align 3, 0x0
_Z16intensive_kernelPj:
.quad _Z31__device_stub__intensive_kernelPj
.size _Z16intensive_kernelPj, 8
.type .L.str,@object # @.str
.section .rodata.str1.1,"aMS",@progbits,1
.L.str:
.asciz "Total memory %dMB\tFree Memory %dMB\n"
.size .L.str, 36
.type .L.str.2,@object # @.str.2
.L.str.2:
.asciz "Allocating 90%% of the available memory: (%dMB)\n"
.size .L.str.2, 49
.type .L.str.6,@object # @.str.6
.L.str.6:
.asciz "./temperature"
.size .L.str.6, 14
.type .L__unnamed_1,@object # @0
.L__unnamed_1:
.asciz "_Z16intensive_kernelPj"
.size .L__unnamed_1, 23
.type __hip_fatbin_wrapper,@object # @__hip_fatbin_wrapper
.section .hipFatBinSegment,"a",@progbits
.p2align 3, 0x0
__hip_fatbin_wrapper:
.long 1212764230 # 0x48495046
.long 1 # 0x1
.quad __hip_fatbin
.quad 0
.size __hip_fatbin_wrapper, 24
.type __hip_gpubin_handle,@object # @__hip_gpubin_handle
.local __hip_gpubin_handle
.comm __hip_gpubin_handle,8,8
.section .init_array,"aw",@init_array
.p2align 3, 0x0
.quad __hip_module_ctor
.type __hip_cuid_,@object # @__hip_cuid_
.bss
.globl __hip_cuid_
__hip_cuid_:
.byte 0 # 0x0
.size __hip_cuid_, 1
.type .Lstr,@object # @str
.section .rodata.str1.1,"aMS",@progbits,1
.Lstr:
.asciz "Initializing buffers..."
.size .Lstr, 24
.type .Lstr.1,@object # @str.1
.Lstr.1:
.asciz "Finished initialization of buffers!\n"
.size .Lstr.1, 37
.type .Lstr.2,@object # @str.2
.Lstr.2:
.asciz "Start stressing..."
.size .Lstr.2, 19
.type .Lstr.3,@object # @str.3
.Lstr.3:
.asciz "fork() failed!"
.size .Lstr.3, 15
.type .Lstr.5,@object # @str.5
.Lstr.5:
.asciz "Unable to create thread"
.size .Lstr.5, 24
.type .Lstr.6,@object # @str.6
.Lstr.6:
.asciz "Finished!"
.size .Lstr.6, 10
.type .Lstr.7,@object # @str.7
.Lstr.7:
.asciz "Execv failed!"
.size .Lstr.7, 14
.type .Lstr.8,@object # @str.8
.Lstr.8:
.asciz "Usage: stresstest <duration>\n\tduration\tTime stress will run in seconds"
.size .Lstr.8, 71
.section ".linker-options","e",@llvm_linker_options
.ident "AMD clang version 18.0.0git (https://github.com/RadeonOpenCompute/llvm-project roc-6.3.2 25012 e5bf7e55c91490b07c49d8960fa7983d864936c4)"
.section ".note.GNU-stack","",@progbits
.addrsig
.addrsig_sym _Z9IncrementPv
.addrsig_sym _Z31__device_stub__intensive_kernelPj
.addrsig_sym __hip_module_ctor
.addrsig_sym __hip_module_dtor
.addrsig_sym _Z16intensive_kernelPj
.addrsig_sym __hip_fatbin
.addrsig_sym __hip_fatbin_wrapper
.addrsig_sym __hip_cuid_ |
You are a helpful coding assistant specialized in converting CUDA source code to CUDA device assembly. | #include <iostream>
#include <thrust/host_vector.h>
#include <thrust/device_vector.h>
#include <stdio.h>
__global__ void Run_Me( int* The_Array , int size)
{
int ID = blockIdx.x;
if(ID < 4)
The_Array[ID] = The_Array[ID] * The_Array[ID];
}
void Test( thrust::device_vector<int> &A , void(*f)(int*,int) )
{
int * GG = thrust::raw_pointer_cast(&A[0]);
std::cout<<"Stalling"<<std::endl;
dim3 Block ( 4 , 1);
(*f)<<<Block,1>>>(GG, 4);
std::cout<<"this is the silliest thing, I have every done"<<std::endl;
}
int main()
{
thrust::host_vector<int> C(4);
C[0] = 1;
C[1] = 2;
C[2] = 3;
C[3] = 4;
std::cout<<"RUnning"<<std::endl;
thrust::device_vector<int> A = C;
Test(A, Run_Me);
for(int i = 0 ; i< 4 ;i++)
{
std::cout << A[i] <<std::endl;
}
char wait;
std::cin >> wait;
} | code for sm_80
Function : _ZN3cub17CUB_200700_800_NS11EmptyKernelIvEEvv
.headerflags @"EF_CUDA_TEXMODE_UNIFIED EF_CUDA_64BIT_ADDRESS EF_CUDA_SM80 EF_CUDA_VIRTUAL_SM(EF_CUDA_SM80)"
/*0000*/ MOV R1, c[0x0][0x28] ; /* 0x00000a0000017a02 */
/* 0x000fe40000000f00 */
/*0010*/ EXIT ; /* 0x000000000000794d */
/* 0x000fea0003800000 */
/*0020*/ BRA 0x20; /* 0xfffffff000007947 */
/* 0x000fc0000383ffff */
/*0030*/ NOP; /* 0x0000000000007918 */
/* 0x000fc00000000000 */
/*0040*/ NOP; /* 0x0000000000007918 */
/* 0x000fc00000000000 */
/*0050*/ NOP; /* 0x0000000000007918 */
/* 0x000fc00000000000 */
/*0060*/ NOP; /* 0x0000000000007918 */
/* 0x000fc00000000000 */
/*0070*/ NOP; /* 0x0000000000007918 */
/* 0x000fc00000000000 */
/*0080*/ NOP; /* 0x0000000000007918 */
/* 0x000fc00000000000 */
/*0090*/ NOP; /* 0x0000000000007918 */
/* 0x000fc00000000000 */
/*00a0*/ NOP; /* 0x0000000000007918 */
/* 0x000fc00000000000 */
/*00b0*/ NOP; /* 0x0000000000007918 */
/* 0x000fc00000000000 */
/*00c0*/ NOP; /* 0x0000000000007918 */
/* 0x000fc00000000000 */
/*00d0*/ NOP; /* 0x0000000000007918 */
/* 0x000fc00000000000 */
/*00e0*/ NOP; /* 0x0000000000007918 */
/* 0x000fc00000000000 */
/*00f0*/ NOP; /* 0x0000000000007918 */
/* 0x000fc00000000000 */
..........
Function : _Z6Run_MePii
.headerflags @"EF_CUDA_TEXMODE_UNIFIED EF_CUDA_64BIT_ADDRESS EF_CUDA_SM80 EF_CUDA_VIRTUAL_SM(EF_CUDA_SM80)"
/*0000*/ MOV R1, c[0x0][0x28] ; /* 0x00000a0000017a02 */
/* 0x000fe40000000f00 */
/*0010*/ S2R R2, SR_CTAID.X ; /* 0x0000000000027919 */
/* 0x000e240000002500 */
/*0020*/ ISETP.GT.AND P0, PT, R2, 0x3, PT ; /* 0x000000030200780c */
/* 0x001fda0003f04270 */
/*0030*/ @P0 EXIT ; /* 0x000000000000094d */
/* 0x000fea0003800000 */
/*0040*/ HFMA2.MMA R3, -RZ, RZ, 0, 2.384185791015625e-07 ; /* 0x00000004ff037435 */
/* 0x000fe200000001ff */
/*0050*/ ULDC.64 UR4, c[0x0][0x118] ; /* 0x0000460000047ab9 */
/* 0x000fd20000000a00 */
/*0060*/ IMAD.WIDE R2, R2, R3, c[0x0][0x160] ; /* 0x0000580002027625 */
/* 0x000fca00078e0203 */
/*0070*/ LDG.E R0, [R2.64] ; /* 0x0000000402007981 */
/* 0x000ea4000c1e1900 */
/*0080*/ IMAD R5, R0, R0, RZ ; /* 0x0000000000057224 */
/* 0x004fca00078e02ff */
/*0090*/ STG.E [R2.64], R5 ; /* 0x0000000502007986 */
/* 0x000fe2000c101904 */
/*00a0*/ EXIT ; /* 0x000000000000794d */
/* 0x000fea0003800000 */
/*00b0*/ BRA 0xb0; /* 0xfffffff000007947 */
/* 0x000fc0000383ffff */
/*00c0*/ NOP; /* 0x0000000000007918 */
/* 0x000fc00000000000 */
/*00d0*/ NOP; /* 0x0000000000007918 */
/* 0x000fc00000000000 */
/*00e0*/ NOP; /* 0x0000000000007918 */
/* 0x000fc00000000000 */
/*00f0*/ NOP; /* 0x0000000000007918 */
/* 0x000fc00000000000 */
/*0100*/ NOP; /* 0x0000000000007918 */
/* 0x000fc00000000000 */
/*0110*/ NOP; /* 0x0000000000007918 */
/* 0x000fc00000000000 */
/*0120*/ NOP; /* 0x0000000000007918 */
/* 0x000fc00000000000 */
/*0130*/ NOP; /* 0x0000000000007918 */
/* 0x000fc00000000000 */
/*0140*/ NOP; /* 0x0000000000007918 */
/* 0x000fc00000000000 */
/*0150*/ NOP; /* 0x0000000000007918 */
/* 0x000fc00000000000 */
/*0160*/ NOP; /* 0x0000000000007918 */
/* 0x000fc00000000000 */
/*0170*/ NOP; /* 0x0000000000007918 */
/* 0x000fc00000000000 */
.......... |
You are a helpful coding assistant specialized in converting CUDA source code to HIP/AMD source code. | #include <iostream>
#include <thrust/host_vector.h>
#include <thrust/device_vector.h>
#include <stdio.h>
__global__ void Run_Me( int* The_Array , int size)
{
int ID = blockIdx.x;
if(ID < 4)
The_Array[ID] = The_Array[ID] * The_Array[ID];
}
void Test( thrust::device_vector<int> &A , void(*f)(int*,int) )
{
int * GG = thrust::raw_pointer_cast(&A[0]);
std::cout<<"Stalling"<<std::endl;
dim3 Block ( 4 , 1);
(*f)<<<Block,1>>>(GG, 4);
std::cout<<"this is the silliest thing, I have every done"<<std::endl;
}
int main()
{
thrust::host_vector<int> C(4);
C[0] = 1;
C[1] = 2;
C[2] = 3;
C[3] = 4;
std::cout<<"RUnning"<<std::endl;
thrust::device_vector<int> A = C;
Test(A, Run_Me);
for(int i = 0 ; i< 4 ;i++)
{
std::cout << A[i] <<std::endl;
}
char wait;
std::cin >> wait;
} | #include <hip/hip_runtime.h>
#include <iostream>
#include <thrust/host_vector.h>
#include <thrust/device_vector.h>
#include <stdio.h>
__global__ void Run_Me( int* The_Array , int size)
{
int ID = blockIdx.x;
if(ID < 4)
The_Array[ID] = The_Array[ID] * The_Array[ID];
}
void Test( thrust::device_vector<int> &A , void(*f)(int*,int) )
{
int * GG = thrust::raw_pointer_cast(&A[0]);
std::cout<<"Stalling"<<std::endl;
dim3 Block ( 4 , 1);
(*f)<<<Block,1>>>(GG, 4);
std::cout<<"this is the silliest thing, I have every done"<<std::endl;
}
int main()
{
thrust::host_vector<int> C(4);
C[0] = 1;
C[1] = 2;
C[2] = 3;
C[3] = 4;
std::cout<<"RUnning"<<std::endl;
thrust::device_vector<int> A = C;
Test(A, Run_Me);
for(int i = 0 ; i< 4 ;i++)
{
std::cout << A[i] <<std::endl;
}
char wait;
std::cin >> wait;
} |
You are a helpful coding assistant specialized in converting HIP source code to AMD device assembly. | #include <hip/hip_runtime.h>
#include <iostream>
#include <thrust/host_vector.h>
#include <thrust/device_vector.h>
#include <stdio.h>
__global__ void Run_Me( int* The_Array , int size)
{
int ID = blockIdx.x;
if(ID < 4)
The_Array[ID] = The_Array[ID] * The_Array[ID];
}
void Test( thrust::device_vector<int> &A , void(*f)(int*,int) )
{
int * GG = thrust::raw_pointer_cast(&A[0]);
std::cout<<"Stalling"<<std::endl;
dim3 Block ( 4 , 1);
(*f)<<<Block,1>>>(GG, 4);
std::cout<<"this is the silliest thing, I have every done"<<std::endl;
}
int main()
{
thrust::host_vector<int> C(4);
C[0] = 1;
C[1] = 2;
C[2] = 3;
C[3] = 4;
std::cout<<"RUnning"<<std::endl;
thrust::device_vector<int> A = C;
Test(A, Run_Me);
for(int i = 0 ; i< 4 ;i++)
{
std::cout << A[i] <<std::endl;
}
char wait;
std::cin >> wait;
} | .text
.amdgcn_target "amdgcn-amd-amdhsa--gfx1100"
.protected _Z6Run_MePii
.globl _Z6Run_MePii
.p2align 8
.type _Z6Run_MePii,@function
_Z6Run_MePii:
s_cmp_gt_i32 s15, 3
s_cbranch_scc1 .LBB0_2
s_load_b64 s[0:1], s[0:1], 0x0
s_mov_b32 s2, s15
s_ashr_i32 s3, s15, 31
s_delay_alu instid0(SALU_CYCLE_1)
s_lshl_b64 s[2:3], s[2:3], 2
s_waitcnt lgkmcnt(0)
s_add_u32 s0, s0, s2
s_addc_u32 s1, s1, s3
s_load_b32 s2, s[0:1], 0x0
s_waitcnt lgkmcnt(0)
s_mul_i32 s2, s2, s2
s_delay_alu instid0(SALU_CYCLE_1)
v_dual_mov_b32 v0, 0 :: v_dual_mov_b32 v1, s2
global_store_b32 v0, v1, s[0:1]
.LBB0_2:
s_nop 0
s_sendmsg sendmsg(MSG_DEALLOC_VGPRS)
s_endpgm
.section .rodata,"a",@progbits
.p2align 6, 0x0
.amdhsa_kernel _Z6Run_MePii
.amdhsa_group_segment_fixed_size 0
.amdhsa_private_segment_fixed_size 0
.amdhsa_kernarg_size 12
.amdhsa_user_sgpr_count 15
.amdhsa_user_sgpr_dispatch_ptr 0
.amdhsa_user_sgpr_queue_ptr 0
.amdhsa_user_sgpr_kernarg_segment_ptr 1
.amdhsa_user_sgpr_dispatch_id 0
.amdhsa_user_sgpr_private_segment_size 0
.amdhsa_wavefront_size32 1
.amdhsa_uses_dynamic_stack 0
.amdhsa_enable_private_segment 0
.amdhsa_system_sgpr_workgroup_id_x 1
.amdhsa_system_sgpr_workgroup_id_y 0
.amdhsa_system_sgpr_workgroup_id_z 0
.amdhsa_system_sgpr_workgroup_info 0
.amdhsa_system_vgpr_workitem_id 0
.amdhsa_next_free_vgpr 2
.amdhsa_next_free_sgpr 16
.amdhsa_reserve_vcc 0
.amdhsa_float_round_mode_32 0
.amdhsa_float_round_mode_16_64 0
.amdhsa_float_denorm_mode_32 3
.amdhsa_float_denorm_mode_16_64 3
.amdhsa_dx10_clamp 1
.amdhsa_ieee_mode 1
.amdhsa_fp16_overflow 0
.amdhsa_workgroup_processor_mode 1
.amdhsa_memory_ordered 1
.amdhsa_forward_progress 0
.amdhsa_shared_vgpr_count 0
.amdhsa_exception_fp_ieee_invalid_op 0
.amdhsa_exception_fp_denorm_src 0
.amdhsa_exception_fp_ieee_div_zero 0
.amdhsa_exception_fp_ieee_overflow 0
.amdhsa_exception_fp_ieee_underflow 0
.amdhsa_exception_fp_ieee_inexact 0
.amdhsa_exception_int_div_zero 0
.end_amdhsa_kernel
.text
.Lfunc_end0:
.size _Z6Run_MePii, .Lfunc_end0-_Z6Run_MePii
.section .AMDGPU.csdata,"",@progbits
.text
.p2alignl 7, 3214868480
.fill 96, 4, 3214868480
.type __hip_cuid_,@object
.section .bss,"aw",@nobits
.globl __hip_cuid_
__hip_cuid_:
.byte 0
.size __hip_cuid_, 1
.ident "AMD clang version 18.0.0git (https://github.com/RadeonOpenCompute/llvm-project roc-6.3.2 25012 e5bf7e55c91490b07c49d8960fa7983d864936c4)"
.section ".note.GNU-stack","",@progbits
.addrsig
.addrsig_sym __hip_cuid_
.amdgpu_metadata
---
amdhsa.kernels:
- .args:
- .address_space: global
.offset: 0
.size: 8
.value_kind: global_buffer
- .offset: 8
.size: 4
.value_kind: by_value
.group_segment_fixed_size: 0
.kernarg_segment_align: 8
.kernarg_segment_size: 12
.language: OpenCL C
.language_version:
- 2
- 0
.max_flat_workgroup_size: 1024
.name: _Z6Run_MePii
.private_segment_fixed_size: 0
.sgpr_count: 16
.sgpr_spill_count: 0
.symbol: _Z6Run_MePii.kd
.uniform_work_group_size: 1
.uses_dynamic_stack: false
.vgpr_count: 2
.vgpr_spill_count: 0
.wavefront_size: 32
.workgroup_processor_mode: 1
amdhsa.target: amdgcn-amd-amdhsa--gfx1100
amdhsa.version:
- 1
- 2
...
.end_amdgpu_metadata |
You are a helpful coding assistant specialized in converting from CUDA device assembly to AMD device assembly. | code for sm_80
Function : _ZN3cub17CUB_200700_800_NS11EmptyKernelIvEEvv
.headerflags @"EF_CUDA_TEXMODE_UNIFIED EF_CUDA_64BIT_ADDRESS EF_CUDA_SM80 EF_CUDA_VIRTUAL_SM(EF_CUDA_SM80)"
/*0000*/ MOV R1, c[0x0][0x28] ; /* 0x00000a0000017a02 */
/* 0x000fe40000000f00 */
/*0010*/ EXIT ; /* 0x000000000000794d */
/* 0x000fea0003800000 */
/*0020*/ BRA 0x20; /* 0xfffffff000007947 */
/* 0x000fc0000383ffff */
/*0030*/ NOP; /* 0x0000000000007918 */
/* 0x000fc00000000000 */
/*0040*/ NOP; /* 0x0000000000007918 */
/* 0x000fc00000000000 */
/*0050*/ NOP; /* 0x0000000000007918 */
/* 0x000fc00000000000 */
/*0060*/ NOP; /* 0x0000000000007918 */
/* 0x000fc00000000000 */
/*0070*/ NOP; /* 0x0000000000007918 */
/* 0x000fc00000000000 */
/*0080*/ NOP; /* 0x0000000000007918 */
/* 0x000fc00000000000 */
/*0090*/ NOP; /* 0x0000000000007918 */
/* 0x000fc00000000000 */
/*00a0*/ NOP; /* 0x0000000000007918 */
/* 0x000fc00000000000 */
/*00b0*/ NOP; /* 0x0000000000007918 */
/* 0x000fc00000000000 */
/*00c0*/ NOP; /* 0x0000000000007918 */
/* 0x000fc00000000000 */
/*00d0*/ NOP; /* 0x0000000000007918 */
/* 0x000fc00000000000 */
/*00e0*/ NOP; /* 0x0000000000007918 */
/* 0x000fc00000000000 */
/*00f0*/ NOP; /* 0x0000000000007918 */
/* 0x000fc00000000000 */
..........
Function : _Z6Run_MePii
.headerflags @"EF_CUDA_TEXMODE_UNIFIED EF_CUDA_64BIT_ADDRESS EF_CUDA_SM80 EF_CUDA_VIRTUAL_SM(EF_CUDA_SM80)"
/*0000*/ MOV R1, c[0x0][0x28] ; /* 0x00000a0000017a02 */
/* 0x000fe40000000f00 */
/*0010*/ S2R R2, SR_CTAID.X ; /* 0x0000000000027919 */
/* 0x000e240000002500 */
/*0020*/ ISETP.GT.AND P0, PT, R2, 0x3, PT ; /* 0x000000030200780c */
/* 0x001fda0003f04270 */
/*0030*/ @P0 EXIT ; /* 0x000000000000094d */
/* 0x000fea0003800000 */
/*0040*/ HFMA2.MMA R3, -RZ, RZ, 0, 2.384185791015625e-07 ; /* 0x00000004ff037435 */
/* 0x000fe200000001ff */
/*0050*/ ULDC.64 UR4, c[0x0][0x118] ; /* 0x0000460000047ab9 */
/* 0x000fd20000000a00 */
/*0060*/ IMAD.WIDE R2, R2, R3, c[0x0][0x160] ; /* 0x0000580002027625 */
/* 0x000fca00078e0203 */
/*0070*/ LDG.E R0, [R2.64] ; /* 0x0000000402007981 */
/* 0x000ea4000c1e1900 */
/*0080*/ IMAD R5, R0, R0, RZ ; /* 0x0000000000057224 */
/* 0x004fca00078e02ff */
/*0090*/ STG.E [R2.64], R5 ; /* 0x0000000502007986 */
/* 0x000fe2000c101904 */
/*00a0*/ EXIT ; /* 0x000000000000794d */
/* 0x000fea0003800000 */
/*00b0*/ BRA 0xb0; /* 0xfffffff000007947 */
/* 0x000fc0000383ffff */
/*00c0*/ NOP; /* 0x0000000000007918 */
/* 0x000fc00000000000 */
/*00d0*/ NOP; /* 0x0000000000007918 */
/* 0x000fc00000000000 */
/*00e0*/ NOP; /* 0x0000000000007918 */
/* 0x000fc00000000000 */
/*00f0*/ NOP; /* 0x0000000000007918 */
/* 0x000fc00000000000 */
/*0100*/ NOP; /* 0x0000000000007918 */
/* 0x000fc00000000000 */
/*0110*/ NOP; /* 0x0000000000007918 */
/* 0x000fc00000000000 */
/*0120*/ NOP; /* 0x0000000000007918 */
/* 0x000fc00000000000 */
/*0130*/ NOP; /* 0x0000000000007918 */
/* 0x000fc00000000000 */
/*0140*/ NOP; /* 0x0000000000007918 */
/* 0x000fc00000000000 */
/*0150*/ NOP; /* 0x0000000000007918 */
/* 0x000fc00000000000 */
/*0160*/ NOP; /* 0x0000000000007918 */
/* 0x000fc00000000000 */
/*0170*/ NOP; /* 0x0000000000007918 */
/* 0x000fc00000000000 */
.......... | .text
.amdgcn_target "amdgcn-amd-amdhsa--gfx1100"
.protected _Z6Run_MePii
.globl _Z6Run_MePii
.p2align 8
.type _Z6Run_MePii,@function
_Z6Run_MePii:
s_cmp_gt_i32 s15, 3
s_cbranch_scc1 .LBB0_2
s_load_b64 s[0:1], s[0:1], 0x0
s_mov_b32 s2, s15
s_ashr_i32 s3, s15, 31
s_delay_alu instid0(SALU_CYCLE_1)
s_lshl_b64 s[2:3], s[2:3], 2
s_waitcnt lgkmcnt(0)
s_add_u32 s0, s0, s2
s_addc_u32 s1, s1, s3
s_load_b32 s2, s[0:1], 0x0
s_waitcnt lgkmcnt(0)
s_mul_i32 s2, s2, s2
s_delay_alu instid0(SALU_CYCLE_1)
v_dual_mov_b32 v0, 0 :: v_dual_mov_b32 v1, s2
global_store_b32 v0, v1, s[0:1]
.LBB0_2:
s_nop 0
s_sendmsg sendmsg(MSG_DEALLOC_VGPRS)
s_endpgm
.section .rodata,"a",@progbits
.p2align 6, 0x0
.amdhsa_kernel _Z6Run_MePii
.amdhsa_group_segment_fixed_size 0
.amdhsa_private_segment_fixed_size 0
.amdhsa_kernarg_size 12
.amdhsa_user_sgpr_count 15
.amdhsa_user_sgpr_dispatch_ptr 0
.amdhsa_user_sgpr_queue_ptr 0
.amdhsa_user_sgpr_kernarg_segment_ptr 1
.amdhsa_user_sgpr_dispatch_id 0
.amdhsa_user_sgpr_private_segment_size 0
.amdhsa_wavefront_size32 1
.amdhsa_uses_dynamic_stack 0
.amdhsa_enable_private_segment 0
.amdhsa_system_sgpr_workgroup_id_x 1
.amdhsa_system_sgpr_workgroup_id_y 0
.amdhsa_system_sgpr_workgroup_id_z 0
.amdhsa_system_sgpr_workgroup_info 0
.amdhsa_system_vgpr_workitem_id 0
.amdhsa_next_free_vgpr 2
.amdhsa_next_free_sgpr 16
.amdhsa_reserve_vcc 0
.amdhsa_float_round_mode_32 0
.amdhsa_float_round_mode_16_64 0
.amdhsa_float_denorm_mode_32 3
.amdhsa_float_denorm_mode_16_64 3
.amdhsa_dx10_clamp 1
.amdhsa_ieee_mode 1
.amdhsa_fp16_overflow 0
.amdhsa_workgroup_processor_mode 1
.amdhsa_memory_ordered 1
.amdhsa_forward_progress 0
.amdhsa_shared_vgpr_count 0
.amdhsa_exception_fp_ieee_invalid_op 0
.amdhsa_exception_fp_denorm_src 0
.amdhsa_exception_fp_ieee_div_zero 0
.amdhsa_exception_fp_ieee_overflow 0
.amdhsa_exception_fp_ieee_underflow 0
.amdhsa_exception_fp_ieee_inexact 0
.amdhsa_exception_int_div_zero 0
.end_amdhsa_kernel
.text
.Lfunc_end0:
.size _Z6Run_MePii, .Lfunc_end0-_Z6Run_MePii
.section .AMDGPU.csdata,"",@progbits
.text
.p2alignl 7, 3214868480
.fill 96, 4, 3214868480
.type __hip_cuid_,@object
.section .bss,"aw",@nobits
.globl __hip_cuid_
__hip_cuid_:
.byte 0
.size __hip_cuid_, 1
.ident "AMD clang version 18.0.0git (https://github.com/RadeonOpenCompute/llvm-project roc-6.3.2 25012 e5bf7e55c91490b07c49d8960fa7983d864936c4)"
.section ".note.GNU-stack","",@progbits
.addrsig
.addrsig_sym __hip_cuid_
.amdgpu_metadata
---
amdhsa.kernels:
- .args:
- .address_space: global
.offset: 0
.size: 8
.value_kind: global_buffer
- .offset: 8
.size: 4
.value_kind: by_value
.group_segment_fixed_size: 0
.kernarg_segment_align: 8
.kernarg_segment_size: 12
.language: OpenCL C
.language_version:
- 2
- 0
.max_flat_workgroup_size: 1024
.name: _Z6Run_MePii
.private_segment_fixed_size: 0
.sgpr_count: 16
.sgpr_spill_count: 0
.symbol: _Z6Run_MePii.kd
.uniform_work_group_size: 1
.uses_dynamic_stack: false
.vgpr_count: 2
.vgpr_spill_count: 0
.wavefront_size: 32
.workgroup_processor_mode: 1
amdhsa.target: amdgcn-amd-amdhsa--gfx1100
amdhsa.version:
- 1
- 2
...
.end_amdgpu_metadata |
You are a helpful coding assistant specialized in converting CUDA source code to CUDA device assembly. | #include <stdio.h>
#include <stdlib.h>
__global__ void matrixAdd(int *A, int *B, int *C, int size){
int tx = threadIdx.x;
int ty = threadIdx.y;
C[(ty * size) + (tx)] = A[(ty * size) + tx] + B[(ty * size) + tx];
}
int main(int argc, char **argv){
int size, totalSize;
int* matrixA = 0;
int* matrixB = 0;
int* matrixC = 0;
printf("Matrix size: ");
scanf("%d", &size);
totalSize = size * size;
int *local = (int*) malloc(totalSize * sizeof(int));
cudaMalloc((void**) &matrixA, sizeof(int) * totalSize);
cudaMalloc((void**) &matrixB, sizeof(int) * totalSize);
cudaMalloc((void**) &matrixC, sizeof(int) * totalSize);
for(int i = 0; i < totalSize; i++){
local[i] = rand() % 100;
}
cudaMemcpy(matrixA, local, sizeof(int) * totalSize, cudaMemcpyHostToDevice);
cudaMemcpy(matrixB, local, sizeof(int) * totalSize, cudaMemcpyHostToDevice);
dim3 dimBlock(size, size);
dim3 dimGrid(1);
matrixAdd<<<dimGrid, dimBlock>>>(matrixA, matrixB, matrixC, size);
cudaThreadSynchronize();
cudaMemcpy(local, matrixC, sizeof(int) * totalSize, cudaMemcpyDeviceToHost);
for(int i = 0; i < totalSize; i++){
if(i % size == 0){
printf("\n%d ", local[i]);
}
else{
printf("%d ", local[i]);
}
}
printf("\n");
} | code for sm_80
Function : _Z9matrixAddPiS_S_i
.headerflags @"EF_CUDA_TEXMODE_UNIFIED EF_CUDA_64BIT_ADDRESS EF_CUDA_SM80 EF_CUDA_VIRTUAL_SM(EF_CUDA_SM80)"
/*0000*/ MOV R1, c[0x0][0x28] ; /* 0x00000a0000017a02 */
/* 0x000fe40000000f00 */
/*0010*/ S2R R6, SR_TID.X ; /* 0x0000000000067919 */
/* 0x000e220000002100 */
/*0020*/ HFMA2.MMA R7, -RZ, RZ, 0, 2.384185791015625e-07 ; /* 0x00000004ff077435 */
/* 0x000fe200000001ff */
/*0030*/ ULDC.64 UR4, c[0x0][0x118] ; /* 0x0000460000047ab9 */
/* 0x000fe40000000a00 */
/*0040*/ S2R R3, SR_TID.Y ; /* 0x0000000000037919 */
/* 0x000e240000002200 */
/*0050*/ IMAD R6, R3, c[0x0][0x178], R6 ; /* 0x00005e0003067a24 */
/* 0x001fca00078e0206 */
/*0060*/ IMAD.WIDE R2, R6, R7, c[0x0][0x160] ; /* 0x0000580006027625 */
/* 0x000fc800078e0207 */
/*0070*/ IMAD.WIDE R4, R6.reuse, R7.reuse, c[0x0][0x168] ; /* 0x00005a0006047625 */
/* 0x0c0fe400078e0207 */
/*0080*/ LDG.E R2, [R2.64] ; /* 0x0000000402027981 */
/* 0x000ea8000c1e1900 */
/*0090*/ LDG.E R5, [R4.64] ; /* 0x0000000404057981 */
/* 0x000ea2000c1e1900 */
/*00a0*/ IMAD.WIDE R6, R6, R7, c[0x0][0x170] ; /* 0x00005c0006067625 */
/* 0x000fe200078e0207 */
/*00b0*/ IADD3 R9, R2, R5, RZ ; /* 0x0000000502097210 */
/* 0x004fca0007ffe0ff */
/*00c0*/ STG.E [R6.64], R9 ; /* 0x0000000906007986 */
/* 0x000fe2000c101904 */
/*00d0*/ EXIT ; /* 0x000000000000794d */
/* 0x000fea0003800000 */
/*00e0*/ BRA 0xe0; /* 0xfffffff000007947 */
/* 0x000fc0000383ffff */
/*00f0*/ NOP; /* 0x0000000000007918 */
/* 0x000fc00000000000 */
/*0100*/ NOP; /* 0x0000000000007918 */
/* 0x000fc00000000000 */
/*0110*/ NOP; /* 0x0000000000007918 */
/* 0x000fc00000000000 */
/*0120*/ NOP; /* 0x0000000000007918 */
/* 0x000fc00000000000 */
/*0130*/ NOP; /* 0x0000000000007918 */
/* 0x000fc00000000000 */
/*0140*/ NOP; /* 0x0000000000007918 */
/* 0x000fc00000000000 */
/*0150*/ NOP; /* 0x0000000000007918 */
/* 0x000fc00000000000 */
/*0160*/ NOP; /* 0x0000000000007918 */
/* 0x000fc00000000000 */
/*0170*/ NOP; /* 0x0000000000007918 */
/* 0x000fc00000000000 */
.......... |
You are a helpful coding assistant specialized in converting CUDA source code to CUDA host assembly. | #include <stdio.h>
#include <stdlib.h>
__global__ void matrixAdd(int *A, int *B, int *C, int size){
int tx = threadIdx.x;
int ty = threadIdx.y;
C[(ty * size) + (tx)] = A[(ty * size) + tx] + B[(ty * size) + tx];
}
int main(int argc, char **argv){
int size, totalSize;
int* matrixA = 0;
int* matrixB = 0;
int* matrixC = 0;
printf("Matrix size: ");
scanf("%d", &size);
totalSize = size * size;
int *local = (int*) malloc(totalSize * sizeof(int));
cudaMalloc((void**) &matrixA, sizeof(int) * totalSize);
cudaMalloc((void**) &matrixB, sizeof(int) * totalSize);
cudaMalloc((void**) &matrixC, sizeof(int) * totalSize);
for(int i = 0; i < totalSize; i++){
local[i] = rand() % 100;
}
cudaMemcpy(matrixA, local, sizeof(int) * totalSize, cudaMemcpyHostToDevice);
cudaMemcpy(matrixB, local, sizeof(int) * totalSize, cudaMemcpyHostToDevice);
dim3 dimBlock(size, size);
dim3 dimGrid(1);
matrixAdd<<<dimGrid, dimBlock>>>(matrixA, matrixB, matrixC, size);
cudaThreadSynchronize();
cudaMemcpy(local, matrixC, sizeof(int) * totalSize, cudaMemcpyDeviceToHost);
for(int i = 0; i < totalSize; i++){
if(i % size == 0){
printf("\n%d ", local[i]);
}
else{
printf("%d ", local[i]);
}
}
printf("\n");
} | .file "tmpxft_0015e6b5_00000000-6_matrixaddition.cudafe1.cpp"
.text
#APP
#NO_APP
.type _ZL26__cudaUnregisterBinaryUtilv, @function
_ZL26__cudaUnregisterBinaryUtilv:
.LFB2060:
.cfi_startproc
endbr64
subq $8, %rsp
.cfi_def_cfa_offset 16
movq _ZL20__cudaFatCubinHandle(%rip), %rdi
call __cudaUnregisterFatBinary@PLT
addq $8, %rsp
.cfi_def_cfa_offset 8
ret
.cfi_endproc
.LFE2060:
.size _ZL26__cudaUnregisterBinaryUtilv, .-_ZL26__cudaUnregisterBinaryUtilv
.globl _Z33__device_stub__Z9matrixAddPiS_S_iPiS_S_i
.type _Z33__device_stub__Z9matrixAddPiS_S_iPiS_S_i, @function
_Z33__device_stub__Z9matrixAddPiS_S_iPiS_S_i:
.LFB2082:
.cfi_startproc
endbr64
subq $152, %rsp
.cfi_def_cfa_offset 160
movq %rdi, 24(%rsp)
movq %rsi, 16(%rsp)
movq %rdx, 8(%rsp)
movl %ecx, 4(%rsp)
movq %fs:40, %rax
movq %rax, 136(%rsp)
xorl %eax, %eax
leaq 24(%rsp), %rax
movq %rax, 96(%rsp)
leaq 16(%rsp), %rax
movq %rax, 104(%rsp)
leaq 8(%rsp), %rax
movq %rax, 112(%rsp)
leaq 4(%rsp), %rax
movq %rax, 120(%rsp)
movl $1, 48(%rsp)
movl $1, 52(%rsp)
movl $1, 56(%rsp)
movl $1, 60(%rsp)
movl $1, 64(%rsp)
movl $1, 68(%rsp)
leaq 40(%rsp), %rcx
leaq 32(%rsp), %rdx
leaq 60(%rsp), %rsi
leaq 48(%rsp), %rdi
call __cudaPopCallConfiguration@PLT
testl %eax, %eax
je .L7
.L3:
movq 136(%rsp), %rax
subq %fs:40, %rax
jne .L8
addq $152, %rsp
.cfi_remember_state
.cfi_def_cfa_offset 8
ret
.L7:
.cfi_restore_state
pushq 40(%rsp)
.cfi_def_cfa_offset 168
pushq 40(%rsp)
.cfi_def_cfa_offset 176
leaq 112(%rsp), %r9
movq 76(%rsp), %rcx
movl 84(%rsp), %r8d
movq 64(%rsp), %rsi
movl 72(%rsp), %edx
leaq _Z9matrixAddPiS_S_i(%rip), %rdi
call cudaLaunchKernel@PLT
addq $16, %rsp
.cfi_def_cfa_offset 160
jmp .L3
.L8:
call __stack_chk_fail@PLT
.cfi_endproc
.LFE2082:
.size _Z33__device_stub__Z9matrixAddPiS_S_iPiS_S_i, .-_Z33__device_stub__Z9matrixAddPiS_S_iPiS_S_i
.globl _Z9matrixAddPiS_S_i
.type _Z9matrixAddPiS_S_i, @function
_Z9matrixAddPiS_S_i:
.LFB2083:
.cfi_startproc
endbr64
subq $8, %rsp
.cfi_def_cfa_offset 16
call _Z33__device_stub__Z9matrixAddPiS_S_iPiS_S_i
addq $8, %rsp
.cfi_def_cfa_offset 8
ret
.cfi_endproc
.LFE2083:
.size _Z9matrixAddPiS_S_i, .-_Z9matrixAddPiS_S_i
.section .rodata.str1.1,"aMS",@progbits,1
.LC0:
.string "Matrix size: "
.LC1:
.string "%d"
.LC2:
.string "\n%d "
.LC3:
.string "%d "
.LC4:
.string "\n"
.text
.globl main
.type main, @function
main:
.LFB2057:
.cfi_startproc
endbr64
pushq %r15
.cfi_def_cfa_offset 16
.cfi_offset 15, -16
pushq %r14
.cfi_def_cfa_offset 24
.cfi_offset 14, -24
pushq %r13
.cfi_def_cfa_offset 32
.cfi_offset 13, -32
pushq %r12
.cfi_def_cfa_offset 40
.cfi_offset 12, -40
pushq %rbp
.cfi_def_cfa_offset 48
.cfi_offset 6, -48
pushq %rbx
.cfi_def_cfa_offset 56
.cfi_offset 3, -56
subq $72, %rsp
.cfi_def_cfa_offset 128
movq %fs:40, %rax
movq %rax, 56(%rsp)
xorl %eax, %eax
movq $0, 8(%rsp)
movq $0, 16(%rsp)
movq $0, 24(%rsp)
leaq .LC0(%rip), %rsi
movl $2, %edi
call __printf_chk@PLT
leaq 4(%rsp), %rsi
leaq .LC1(%rip), %rdi
movl $0, %eax
call __isoc23_scanf@PLT
movl 4(%rsp), %r15d
imull %r15d, %r15d
movslq %r15d, %r12
leaq 0(,%r12,4), %r14
movq %r14, %rdi
call malloc@PLT
movq %rax, %rbp
leaq 8(%rsp), %rdi
movq %r14, %rsi
call cudaMalloc@PLT
leaq 16(%rsp), %rdi
movq %r14, %rsi
call cudaMalloc@PLT
leaq 24(%rsp), %rdi
movq %r14, %rsi
call cudaMalloc@PLT
testl %r15d, %r15d
jle .L12
movq %rbp, %rbx
leaq (%r14,%rbp), %r13
.L13:
call rand@PLT
movslq %eax, %rdx
imulq $1374389535, %rdx, %rdx
sarq $37, %rdx
movl %eax, %ecx
sarl $31, %ecx
subl %ecx, %edx
imull $100, %edx, %edx
subl %edx, %eax
movl %eax, (%rbx)
addq $4, %rbx
cmpq %r13, %rbx
jne .L13
.L12:
movl $1, %ecx
movq %r14, %rdx
movq %rbp, %rsi
movq 8(%rsp), %rdi
call cudaMemcpy@PLT
movl $1, %ecx
movq %r14, %rdx
movq %rbp, %rsi
movq 16(%rsp), %rdi
call cudaMemcpy@PLT
movl 4(%rsp), %eax
movl %eax, 32(%rsp)
movl %eax, 36(%rsp)
movl $1, 44(%rsp)
movl $1, 48(%rsp)
movl $0, %r9d
movl $0, %r8d
movq 32(%rsp), %rdx
movl $1, %ecx
movq 44(%rsp), %rdi
movl $1, %esi
call __cudaPushCallConfiguration@PLT
testl %eax, %eax
je .L23
.L14:
call cudaThreadSynchronize@PLT
movl $2, %ecx
movq %r14, %rdx
movq 24(%rsp), %rsi
movq %rbp, %rdi
call cudaMemcpy@PLT
testl %r15d, %r15d
jle .L15
movl $0, %ebx
leaq .LC3(%rip), %r14
leaq .LC2(%rip), %r13
jmp .L18
.L23:
movl 4(%rsp), %ecx
movq 24(%rsp), %rdx
movq 16(%rsp), %rsi
movq 8(%rsp), %rdi
call _Z33__device_stub__Z9matrixAddPiS_S_iPiS_S_i
jmp .L14
.L16:
movl 0(%rbp,%rbx,4), %edx
movq %r14, %rsi
movl $2, %edi
movl $0, %eax
call __printf_chk@PLT
.L17:
addq $1, %rbx
cmpq %rbx, %r12
je .L15
.L18:
movl %ebx, %eax
cltd
idivl 4(%rsp)
testl %edx, %edx
jne .L16
movl 0(%rbp,%rbx,4), %edx
movq %r13, %rsi
movl $2, %edi
movl $0, %eax
call __printf_chk@PLT
jmp .L17
.L15:
leaq .LC4(%rip), %rsi
movl $2, %edi
movl $0, %eax
call __printf_chk@PLT
movq 56(%rsp), %rax
subq %fs:40, %rax
jne .L24
movl $0, %eax
addq $72, %rsp
.cfi_remember_state
.cfi_def_cfa_offset 56
popq %rbx
.cfi_def_cfa_offset 48
popq %rbp
.cfi_def_cfa_offset 40
popq %r12
.cfi_def_cfa_offset 32
popq %r13
.cfi_def_cfa_offset 24
popq %r14
.cfi_def_cfa_offset 16
popq %r15
.cfi_def_cfa_offset 8
ret
.L24:
.cfi_restore_state
call __stack_chk_fail@PLT
.cfi_endproc
.LFE2057:
.size main, .-main
.section .rodata.str1.1
.LC5:
.string "_Z9matrixAddPiS_S_i"
.text
.type _ZL24__sti____cudaRegisterAllv, @function
_ZL24__sti____cudaRegisterAllv:
.LFB2085:
.cfi_startproc
endbr64
subq $8, %rsp
.cfi_def_cfa_offset 16
leaq _ZL15__fatDeviceText(%rip), %rdi
call __cudaRegisterFatBinary@PLT
movq %rax, %rdi
movq %rax, _ZL20__cudaFatCubinHandle(%rip)
pushq $0
.cfi_def_cfa_offset 24
pushq $0
.cfi_def_cfa_offset 32
pushq $0
.cfi_def_cfa_offset 40
pushq $0
.cfi_def_cfa_offset 48
movl $0, %r9d
movl $-1, %r8d
leaq .LC5(%rip), %rdx
movq %rdx, %rcx
leaq _Z9matrixAddPiS_S_i(%rip), %rsi
call __cudaRegisterFunction@PLT
addq $32, %rsp
.cfi_def_cfa_offset 16
movq _ZL20__cudaFatCubinHandle(%rip), %rdi
call __cudaRegisterFatBinaryEnd@PLT
leaq _ZL26__cudaUnregisterBinaryUtilv(%rip), %rdi
call atexit@PLT
addq $8, %rsp
.cfi_def_cfa_offset 8
ret
.cfi_endproc
.LFE2085:
.size _ZL24__sti____cudaRegisterAllv, .-_ZL24__sti____cudaRegisterAllv
.section .init_array,"aw"
.align 8
.quad _ZL24__sti____cudaRegisterAllv
.section .nvFatBinSegment,"aw"
.align 8
.type _ZL15__fatDeviceText, @object
.size _ZL15__fatDeviceText, 24
_ZL15__fatDeviceText:
.long 1180844977
.long 1
.quad fatbinData
.quad 0
.local _ZL20__cudaFatCubinHandle
.comm _ZL20__cudaFatCubinHandle,8,8
.ident "GCC: (Ubuntu 13.3.0-6ubuntu2~24.04) 13.3.0"
.section .note.GNU-stack,"",@progbits
.section .note.gnu.property,"a"
.align 8
.long 1f - 0f
.long 4f - 1f
.long 5
0:
.string "GNU"
1:
.align 8
.long 0xc0000002
.long 3f - 2f
2:
.long 0x3
3:
.align 8
4: |
You are a helpful coding assistant specialized in converting CUDA source code to HIP/AMD source code. | #include <stdio.h>
#include <stdlib.h>
__global__ void matrixAdd(int *A, int *B, int *C, int size){
int tx = threadIdx.x;
int ty = threadIdx.y;
C[(ty * size) + (tx)] = A[(ty * size) + tx] + B[(ty * size) + tx];
}
int main(int argc, char **argv){
int size, totalSize;
int* matrixA = 0;
int* matrixB = 0;
int* matrixC = 0;
printf("Matrix size: ");
scanf("%d", &size);
totalSize = size * size;
int *local = (int*) malloc(totalSize * sizeof(int));
cudaMalloc((void**) &matrixA, sizeof(int) * totalSize);
cudaMalloc((void**) &matrixB, sizeof(int) * totalSize);
cudaMalloc((void**) &matrixC, sizeof(int) * totalSize);
for(int i = 0; i < totalSize; i++){
local[i] = rand() % 100;
}
cudaMemcpy(matrixA, local, sizeof(int) * totalSize, cudaMemcpyHostToDevice);
cudaMemcpy(matrixB, local, sizeof(int) * totalSize, cudaMemcpyHostToDevice);
dim3 dimBlock(size, size);
dim3 dimGrid(1);
matrixAdd<<<dimGrid, dimBlock>>>(matrixA, matrixB, matrixC, size);
cudaThreadSynchronize();
cudaMemcpy(local, matrixC, sizeof(int) * totalSize, cudaMemcpyDeviceToHost);
for(int i = 0; i < totalSize; i++){
if(i % size == 0){
printf("\n%d ", local[i]);
}
else{
printf("%d ", local[i]);
}
}
printf("\n");
} | #include <hip/hip_runtime.h>
#include <stdio.h>
#include <stdlib.h>
__global__ void matrixAdd(int *A, int *B, int *C, int size){
int tx = threadIdx.x;
int ty = threadIdx.y;
C[(ty * size) + (tx)] = A[(ty * size) + tx] + B[(ty * size) + tx];
}
int main(int argc, char **argv){
int size, totalSize;
int* matrixA = 0;
int* matrixB = 0;
int* matrixC = 0;
printf("Matrix size: ");
scanf("%d", &size);
totalSize = size * size;
int *local = (int*) malloc(totalSize * sizeof(int));
hipMalloc((void**) &matrixA, sizeof(int) * totalSize);
hipMalloc((void**) &matrixB, sizeof(int) * totalSize);
hipMalloc((void**) &matrixC, sizeof(int) * totalSize);
for(int i = 0; i < totalSize; i++){
local[i] = rand() % 100;
}
hipMemcpy(matrixA, local, sizeof(int) * totalSize, hipMemcpyHostToDevice);
hipMemcpy(matrixB, local, sizeof(int) * totalSize, hipMemcpyHostToDevice);
dim3 dimBlock(size, size);
dim3 dimGrid(1);
matrixAdd<<<dimGrid, dimBlock>>>(matrixA, matrixB, matrixC, size);
hipDeviceSynchronize();
hipMemcpy(local, matrixC, sizeof(int) * totalSize, hipMemcpyDeviceToHost);
for(int i = 0; i < totalSize; i++){
if(i % size == 0){
printf("\n%d ", local[i]);
}
else{
printf("%d ", local[i]);
}
}
printf("\n");
} |
You are a helpful coding assistant specialized in converting HIP source code to AMD device assembly. | #include <hip/hip_runtime.h>
#include <stdio.h>
#include <stdlib.h>
__global__ void matrixAdd(int *A, int *B, int *C, int size){
int tx = threadIdx.x;
int ty = threadIdx.y;
C[(ty * size) + (tx)] = A[(ty * size) + tx] + B[(ty * size) + tx];
}
int main(int argc, char **argv){
int size, totalSize;
int* matrixA = 0;
int* matrixB = 0;
int* matrixC = 0;
printf("Matrix size: ");
scanf("%d", &size);
totalSize = size * size;
int *local = (int*) malloc(totalSize * sizeof(int));
hipMalloc((void**) &matrixA, sizeof(int) * totalSize);
hipMalloc((void**) &matrixB, sizeof(int) * totalSize);
hipMalloc((void**) &matrixC, sizeof(int) * totalSize);
for(int i = 0; i < totalSize; i++){
local[i] = rand() % 100;
}
hipMemcpy(matrixA, local, sizeof(int) * totalSize, hipMemcpyHostToDevice);
hipMemcpy(matrixB, local, sizeof(int) * totalSize, hipMemcpyHostToDevice);
dim3 dimBlock(size, size);
dim3 dimGrid(1);
matrixAdd<<<dimGrid, dimBlock>>>(matrixA, matrixB, matrixC, size);
hipDeviceSynchronize();
hipMemcpy(local, matrixC, sizeof(int) * totalSize, hipMemcpyDeviceToHost);
for(int i = 0; i < totalSize; i++){
if(i % size == 0){
printf("\n%d ", local[i]);
}
else{
printf("%d ", local[i]);
}
}
printf("\n");
} | .text
.amdgcn_target "amdgcn-amd-amdhsa--gfx1100"
.protected _Z9matrixAddPiS_S_i
.globl _Z9matrixAddPiS_S_i
.p2align 8
.type _Z9matrixAddPiS_S_i,@function
_Z9matrixAddPiS_S_i:
s_clause 0x1
s_load_b32 s2, s[0:1], 0x18
s_load_b128 s[4:7], s[0:1], 0x0
v_and_b32_e32 v1, 0x3ff, v0
v_bfe_u32 v0, v0, 10, 10
s_load_b64 s[0:1], s[0:1], 0x10
s_waitcnt lgkmcnt(0)
s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
v_mad_u64_u32 v[2:3], null, v0, s2, v[1:2]
v_ashrrev_i32_e32 v3, 31, v2
s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
v_lshlrev_b64 v[0:1], 2, v[2:3]
v_add_co_u32 v2, vcc_lo, s4, v0
s_delay_alu instid0(VALU_DEP_2)
v_add_co_ci_u32_e32 v3, vcc_lo, s5, v1, vcc_lo
v_add_co_u32 v4, vcc_lo, s6, v0
v_add_co_ci_u32_e32 v5, vcc_lo, s7, v1, vcc_lo
v_add_co_u32 v0, vcc_lo, s0, v0
global_load_b32 v2, v[2:3], off
global_load_b32 v3, v[4:5], off
v_add_co_ci_u32_e32 v1, vcc_lo, s1, v1, vcc_lo
s_waitcnt vmcnt(0)
v_add_nc_u32_e32 v2, v3, v2
global_store_b32 v[0:1], v2, off
s_nop 0
s_sendmsg sendmsg(MSG_DEALLOC_VGPRS)
s_endpgm
.section .rodata,"a",@progbits
.p2align 6, 0x0
.amdhsa_kernel _Z9matrixAddPiS_S_i
.amdhsa_group_segment_fixed_size 0
.amdhsa_private_segment_fixed_size 0
.amdhsa_kernarg_size 28
.amdhsa_user_sgpr_count 15
.amdhsa_user_sgpr_dispatch_ptr 0
.amdhsa_user_sgpr_queue_ptr 0
.amdhsa_user_sgpr_kernarg_segment_ptr 1
.amdhsa_user_sgpr_dispatch_id 0
.amdhsa_user_sgpr_private_segment_size 0
.amdhsa_wavefront_size32 1
.amdhsa_uses_dynamic_stack 0
.amdhsa_enable_private_segment 0
.amdhsa_system_sgpr_workgroup_id_x 1
.amdhsa_system_sgpr_workgroup_id_y 0
.amdhsa_system_sgpr_workgroup_id_z 0
.amdhsa_system_sgpr_workgroup_info 0
.amdhsa_system_vgpr_workitem_id 1
.amdhsa_next_free_vgpr 6
.amdhsa_next_free_sgpr 8
.amdhsa_float_round_mode_32 0
.amdhsa_float_round_mode_16_64 0
.amdhsa_float_denorm_mode_32 3
.amdhsa_float_denorm_mode_16_64 3
.amdhsa_dx10_clamp 1
.amdhsa_ieee_mode 1
.amdhsa_fp16_overflow 0
.amdhsa_workgroup_processor_mode 1
.amdhsa_memory_ordered 1
.amdhsa_forward_progress 0
.amdhsa_shared_vgpr_count 0
.amdhsa_exception_fp_ieee_invalid_op 0
.amdhsa_exception_fp_denorm_src 0
.amdhsa_exception_fp_ieee_div_zero 0
.amdhsa_exception_fp_ieee_overflow 0
.amdhsa_exception_fp_ieee_underflow 0
.amdhsa_exception_fp_ieee_inexact 0
.amdhsa_exception_int_div_zero 0
.end_amdhsa_kernel
.text
.Lfunc_end0:
.size _Z9matrixAddPiS_S_i, .Lfunc_end0-_Z9matrixAddPiS_S_i
.section .AMDGPU.csdata,"",@progbits
.text
.p2alignl 7, 3214868480
.fill 96, 4, 3214868480
.type __hip_cuid_,@object
.section .bss,"aw",@nobits
.globl __hip_cuid_
__hip_cuid_:
.byte 0
.size __hip_cuid_, 1
.ident "AMD clang version 18.0.0git (https://github.com/RadeonOpenCompute/llvm-project roc-6.3.2 25012 e5bf7e55c91490b07c49d8960fa7983d864936c4)"
.section ".note.GNU-stack","",@progbits
.addrsig
.addrsig_sym __hip_cuid_
.amdgpu_metadata
---
amdhsa.kernels:
- .args:
- .address_space: global
.offset: 0
.size: 8
.value_kind: global_buffer
- .address_space: global
.offset: 8
.size: 8
.value_kind: global_buffer
- .address_space: global
.offset: 16
.size: 8
.value_kind: global_buffer
- .offset: 24
.size: 4
.value_kind: by_value
.group_segment_fixed_size: 0
.kernarg_segment_align: 8
.kernarg_segment_size: 28
.language: OpenCL C
.language_version:
- 2
- 0
.max_flat_workgroup_size: 1024
.name: _Z9matrixAddPiS_S_i
.private_segment_fixed_size: 0
.sgpr_count: 10
.sgpr_spill_count: 0
.symbol: _Z9matrixAddPiS_S_i.kd
.uniform_work_group_size: 1
.uses_dynamic_stack: false
.vgpr_count: 6
.vgpr_spill_count: 0
.wavefront_size: 32
.workgroup_processor_mode: 1
amdhsa.target: amdgcn-amd-amdhsa--gfx1100
amdhsa.version:
- 1
- 2
...
.end_amdgpu_metadata |
You are a helpful coding assistant specialized in converting HIP source code to AMD host assembly. | #include <hip/hip_runtime.h>
#include <stdio.h>
#include <stdlib.h>
__global__ void matrixAdd(int *A, int *B, int *C, int size){
int tx = threadIdx.x;
int ty = threadIdx.y;
C[(ty * size) + (tx)] = A[(ty * size) + tx] + B[(ty * size) + tx];
}
int main(int argc, char **argv){
int size, totalSize;
int* matrixA = 0;
int* matrixB = 0;
int* matrixC = 0;
printf("Matrix size: ");
scanf("%d", &size);
totalSize = size * size;
int *local = (int*) malloc(totalSize * sizeof(int));
hipMalloc((void**) &matrixA, sizeof(int) * totalSize);
hipMalloc((void**) &matrixB, sizeof(int) * totalSize);
hipMalloc((void**) &matrixC, sizeof(int) * totalSize);
for(int i = 0; i < totalSize; i++){
local[i] = rand() % 100;
}
hipMemcpy(matrixA, local, sizeof(int) * totalSize, hipMemcpyHostToDevice);
hipMemcpy(matrixB, local, sizeof(int) * totalSize, hipMemcpyHostToDevice);
dim3 dimBlock(size, size);
dim3 dimGrid(1);
matrixAdd<<<dimGrid, dimBlock>>>(matrixA, matrixB, matrixC, size);
hipDeviceSynchronize();
hipMemcpy(local, matrixC, sizeof(int) * totalSize, hipMemcpyDeviceToHost);
for(int i = 0; i < totalSize; i++){
if(i % size == 0){
printf("\n%d ", local[i]);
}
else{
printf("%d ", local[i]);
}
}
printf("\n");
} | .text
.file "matrixaddition.hip"
.globl _Z24__device_stub__matrixAddPiS_S_i # -- Begin function _Z24__device_stub__matrixAddPiS_S_i
.p2align 4, 0x90
.type _Z24__device_stub__matrixAddPiS_S_i,@function
_Z24__device_stub__matrixAddPiS_S_i: # @_Z24__device_stub__matrixAddPiS_S_i
.cfi_startproc
# %bb.0:
subq $120, %rsp
.cfi_def_cfa_offset 128
movq %rdi, 72(%rsp)
movq %rsi, 64(%rsp)
movq %rdx, 56(%rsp)
movl %ecx, 4(%rsp)
leaq 72(%rsp), %rax
movq %rax, 80(%rsp)
leaq 64(%rsp), %rax
movq %rax, 88(%rsp)
leaq 56(%rsp), %rax
movq %rax, 96(%rsp)
leaq 4(%rsp), %rax
movq %rax, 104(%rsp)
leaq 40(%rsp), %rdi
leaq 24(%rsp), %rsi
leaq 16(%rsp), %rdx
leaq 8(%rsp), %rcx
callq __hipPopCallConfiguration
movq 40(%rsp), %rsi
movl 48(%rsp), %edx
movq 24(%rsp), %rcx
movl 32(%rsp), %r8d
leaq 80(%rsp), %r9
movl $_Z9matrixAddPiS_S_i, %edi
pushq 8(%rsp)
.cfi_adjust_cfa_offset 8
pushq 24(%rsp)
.cfi_adjust_cfa_offset 8
callq hipLaunchKernel
addq $136, %rsp
.cfi_adjust_cfa_offset -136
retq
.Lfunc_end0:
.size _Z24__device_stub__matrixAddPiS_S_i, .Lfunc_end0-_Z24__device_stub__matrixAddPiS_S_i
.cfi_endproc
# -- End function
.globl main # -- Begin function main
.p2align 4, 0x90
.type main,@function
main: # @main
.cfi_startproc
# %bb.0:
pushq %rbp
.cfi_def_cfa_offset 16
pushq %r15
.cfi_def_cfa_offset 24
pushq %r14
.cfi_def_cfa_offset 32
pushq %r13
.cfi_def_cfa_offset 40
pushq %r12
.cfi_def_cfa_offset 48
pushq %rbx
.cfi_def_cfa_offset 56
subq $152, %rsp
.cfi_def_cfa_offset 208
.cfi_offset %rbx, -56
.cfi_offset %r12, -48
.cfi_offset %r13, -40
.cfi_offset %r14, -32
.cfi_offset %r15, -24
.cfi_offset %rbp, -16
movq $0, 24(%rsp)
movq $0, 16(%rsp)
movq $0, 8(%rsp)
movl $.L.str, %edi
xorl %eax, %eax
callq printf
leaq 4(%rsp), %rsi
movl $.L.str.1, %edi
xorl %eax, %eax
callq __isoc23_scanf
movl 4(%rsp), %ebp
movl %ebp, %r15d
imull %r15d, %r15d
leaq (,%r15,4), %r14
movq %r14, %rdi
callq malloc
movq %rax, %rbx
leaq 24(%rsp), %rdi
movq %r14, %rsi
callq hipMalloc
leaq 16(%rsp), %rdi
movq %r14, %rsi
callq hipMalloc
leaq 8(%rsp), %rdi
movq %r14, %rsi
callq hipMalloc
testl %ebp, %ebp
je .LBB1_3
# %bb.1: # %.lr.ph.preheader
cmpl $1, %r15d
movl %r15d, %r12d
adcl $0, %r12d
xorl %r13d, %r13d
.p2align 4, 0x90
.LBB1_2: # %.lr.ph
# =>This Inner Loop Header: Depth=1
callq rand
cltq
imulq $1374389535, %rax, %rcx # imm = 0x51EB851F
movq %rcx, %rdx
shrq $63, %rdx
sarq $37, %rcx
addl %edx, %ecx
imull $100, %ecx, %ecx
subl %ecx, %eax
movl %eax, (%rbx,%r13,4)
incq %r13
cmpq %r13, %r12
jne .LBB1_2
.LBB1_3: # %._crit_edge
movq 24(%rsp), %rdi
movq %rbx, %rsi
movq %r14, %rdx
movl $1, %ecx
callq hipMemcpy
movq 16(%rsp), %rdi
movq %rbx, %rsi
movq %r14, %rdx
movl $1, %ecx
callq hipMemcpy
movl 4(%rsp), %eax
movq %rax, %rdx
shlq $32, %rdx
orq %rax, %rdx
movabsq $4294967297, %rdi # imm = 0x100000001
movl $1, %esi
movl $1, %ecx
xorl %r8d, %r8d
xorl %r9d, %r9d
callq __hipPushCallConfiguration
testl %eax, %eax
jne .LBB1_5
# %bb.4:
movq 24(%rsp), %rax
movq 16(%rsp), %rcx
movq 8(%rsp), %rdx
movl 4(%rsp), %esi
movq %rax, 104(%rsp)
movq %rcx, 96(%rsp)
movq %rdx, 88(%rsp)
movl %esi, 36(%rsp)
leaq 104(%rsp), %rax
movq %rax, 112(%rsp)
leaq 96(%rsp), %rax
movq %rax, 120(%rsp)
leaq 88(%rsp), %rax
movq %rax, 128(%rsp)
leaq 36(%rsp), %rax
movq %rax, 136(%rsp)
leaq 72(%rsp), %rdi
leaq 56(%rsp), %rsi
leaq 48(%rsp), %rdx
leaq 40(%rsp), %rcx
callq __hipPopCallConfiguration
movq 72(%rsp), %rsi
movl 80(%rsp), %edx
movq 56(%rsp), %rcx
movl 64(%rsp), %r8d
leaq 112(%rsp), %r9
movl $_Z9matrixAddPiS_S_i, %edi
pushq 40(%rsp)
.cfi_adjust_cfa_offset 8
pushq 56(%rsp)
.cfi_adjust_cfa_offset 8
callq hipLaunchKernel
addq $16, %rsp
.cfi_adjust_cfa_offset -16
.LBB1_5:
callq hipDeviceSynchronize
movq 8(%rsp), %rsi
movq %rbx, %rdi
movq %r14, %rdx
movl $2, %ecx
callq hipMemcpy
testl %ebp, %ebp
je .LBB1_10
# %bb.6: # %.lr.ph36.preheader
cmpl $1, %r15d
adcl $0, %r15d
xorl %r14d, %r14d
jmp .LBB1_7
.p2align 4, 0x90
.LBB1_9: # %.lr.ph36
# in Loop: Header=BB1_7 Depth=1
movl (%rbx,%r14,4), %esi
xorl %eax, %eax
callq printf
incq %r14
cmpq %r14, %r15
je .LBB1_10
.LBB1_7: # %.lr.ph36
# =>This Inner Loop Header: Depth=1
movl %r14d, %eax
cltd
idivl 4(%rsp)
movl $.L.str.2, %edi
testl %edx, %edx
je .LBB1_9
# %bb.8: # %.lr.ph36
# in Loop: Header=BB1_7 Depth=1
movl $.L.str.3, %edi
jmp .LBB1_9
.LBB1_10: # %._crit_edge37
movl $10, %edi
callq putchar@PLT
xorl %eax, %eax
addq $152, %rsp
.cfi_def_cfa_offset 56
popq %rbx
.cfi_def_cfa_offset 48
popq %r12
.cfi_def_cfa_offset 40
popq %r13
.cfi_def_cfa_offset 32
popq %r14
.cfi_def_cfa_offset 24
popq %r15
.cfi_def_cfa_offset 16
popq %rbp
.cfi_def_cfa_offset 8
retq
.Lfunc_end1:
.size main, .Lfunc_end1-main
.cfi_endproc
# -- End function
.p2align 4, 0x90 # -- Begin function __hip_module_ctor
.type __hip_module_ctor,@function
__hip_module_ctor: # @__hip_module_ctor
.cfi_startproc
# %bb.0:
subq $40, %rsp
.cfi_def_cfa_offset 48
cmpq $0, __hip_gpubin_handle(%rip)
jne .LBB2_2
# %bb.1:
movl $__hip_fatbin_wrapper, %edi
callq __hipRegisterFatBinary
movq %rax, __hip_gpubin_handle(%rip)
.LBB2_2:
movq __hip_gpubin_handle(%rip), %rdi
xorps %xmm0, %xmm0
movups %xmm0, 16(%rsp)
movups %xmm0, (%rsp)
movl $_Z9matrixAddPiS_S_i, %esi
movl $.L__unnamed_1, %edx
movl $.L__unnamed_1, %ecx
movl $-1, %r8d
xorl %r9d, %r9d
callq __hipRegisterFunction
movl $__hip_module_dtor, %edi
addq $40, %rsp
.cfi_def_cfa_offset 8
jmp atexit # TAILCALL
.Lfunc_end2:
.size __hip_module_ctor, .Lfunc_end2-__hip_module_ctor
.cfi_endproc
# -- End function
.p2align 4, 0x90 # -- Begin function __hip_module_dtor
.type __hip_module_dtor,@function
__hip_module_dtor: # @__hip_module_dtor
.cfi_startproc
# %bb.0:
movq __hip_gpubin_handle(%rip), %rdi
testq %rdi, %rdi
je .LBB3_2
# %bb.1:
pushq %rax
.cfi_def_cfa_offset 16
callq __hipUnregisterFatBinary
movq $0, __hip_gpubin_handle(%rip)
addq $8, %rsp
.cfi_def_cfa_offset 8
.LBB3_2:
retq
.Lfunc_end3:
.size __hip_module_dtor, .Lfunc_end3-__hip_module_dtor
.cfi_endproc
# -- End function
.type _Z9matrixAddPiS_S_i,@object # @_Z9matrixAddPiS_S_i
.section .rodata,"a",@progbits
.globl _Z9matrixAddPiS_S_i
.p2align 3, 0x0
_Z9matrixAddPiS_S_i:
.quad _Z24__device_stub__matrixAddPiS_S_i
.size _Z9matrixAddPiS_S_i, 8
.type .L.str,@object # @.str
.section .rodata.str1.1,"aMS",@progbits,1
.L.str:
.asciz "Matrix size: "
.size .L.str, 14
.type .L.str.1,@object # @.str.1
.L.str.1:
.asciz "%d"
.size .L.str.1, 3
.type .L.str.2,@object # @.str.2
.L.str.2:
.asciz "\n%d "
.size .L.str.2, 5
.type .L.str.3,@object # @.str.3
.L.str.3:
.asciz "%d "
.size .L.str.3, 4
.type .L__unnamed_1,@object # @0
.L__unnamed_1:
.asciz "_Z9matrixAddPiS_S_i"
.size .L__unnamed_1, 20
.type __hip_fatbin_wrapper,@object # @__hip_fatbin_wrapper
.section .hipFatBinSegment,"a",@progbits
.p2align 3, 0x0
__hip_fatbin_wrapper:
.long 1212764230 # 0x48495046
.long 1 # 0x1
.quad __hip_fatbin
.quad 0
.size __hip_fatbin_wrapper, 24
.type __hip_gpubin_handle,@object # @__hip_gpubin_handle
.local __hip_gpubin_handle
.comm __hip_gpubin_handle,8,8
.section .init_array,"aw",@init_array
.p2align 3, 0x0
.quad __hip_module_ctor
.type __hip_cuid_,@object # @__hip_cuid_
.bss
.globl __hip_cuid_
__hip_cuid_:
.byte 0 # 0x0
.size __hip_cuid_, 1
.section ".linker-options","e",@llvm_linker_options
.ident "AMD clang version 18.0.0git (https://github.com/RadeonOpenCompute/llvm-project roc-6.3.2 25012 e5bf7e55c91490b07c49d8960fa7983d864936c4)"
.section ".note.GNU-stack","",@progbits
.addrsig
.addrsig_sym _Z24__device_stub__matrixAddPiS_S_i
.addrsig_sym __hip_module_ctor
.addrsig_sym __hip_module_dtor
.addrsig_sym _Z9matrixAddPiS_S_i
.addrsig_sym __hip_fatbin
.addrsig_sym __hip_fatbin_wrapper
.addrsig_sym __hip_cuid_ |
You are a helpful coding assistant specialized in converting from CUDA device assembly to AMD device assembly. | code for sm_80
Function : _Z9matrixAddPiS_S_i
.headerflags @"EF_CUDA_TEXMODE_UNIFIED EF_CUDA_64BIT_ADDRESS EF_CUDA_SM80 EF_CUDA_VIRTUAL_SM(EF_CUDA_SM80)"
/*0000*/ MOV R1, c[0x0][0x28] ; /* 0x00000a0000017a02 */
/* 0x000fe40000000f00 */
/*0010*/ S2R R6, SR_TID.X ; /* 0x0000000000067919 */
/* 0x000e220000002100 */
/*0020*/ HFMA2.MMA R7, -RZ, RZ, 0, 2.384185791015625e-07 ; /* 0x00000004ff077435 */
/* 0x000fe200000001ff */
/*0030*/ ULDC.64 UR4, c[0x0][0x118] ; /* 0x0000460000047ab9 */
/* 0x000fe40000000a00 */
/*0040*/ S2R R3, SR_TID.Y ; /* 0x0000000000037919 */
/* 0x000e240000002200 */
/*0050*/ IMAD R6, R3, c[0x0][0x178], R6 ; /* 0x00005e0003067a24 */
/* 0x001fca00078e0206 */
/*0060*/ IMAD.WIDE R2, R6, R7, c[0x0][0x160] ; /* 0x0000580006027625 */
/* 0x000fc800078e0207 */
/*0070*/ IMAD.WIDE R4, R6.reuse, R7.reuse, c[0x0][0x168] ; /* 0x00005a0006047625 */
/* 0x0c0fe400078e0207 */
/*0080*/ LDG.E R2, [R2.64] ; /* 0x0000000402027981 */
/* 0x000ea8000c1e1900 */
/*0090*/ LDG.E R5, [R4.64] ; /* 0x0000000404057981 */
/* 0x000ea2000c1e1900 */
/*00a0*/ IMAD.WIDE R6, R6, R7, c[0x0][0x170] ; /* 0x00005c0006067625 */
/* 0x000fe200078e0207 */
/*00b0*/ IADD3 R9, R2, R5, RZ ; /* 0x0000000502097210 */
/* 0x004fca0007ffe0ff */
/*00c0*/ STG.E [R6.64], R9 ; /* 0x0000000906007986 */
/* 0x000fe2000c101904 */
/*00d0*/ EXIT ; /* 0x000000000000794d */
/* 0x000fea0003800000 */
/*00e0*/ BRA 0xe0; /* 0xfffffff000007947 */
/* 0x000fc0000383ffff */
/*00f0*/ NOP; /* 0x0000000000007918 */
/* 0x000fc00000000000 */
/*0100*/ NOP; /* 0x0000000000007918 */
/* 0x000fc00000000000 */
/*0110*/ NOP; /* 0x0000000000007918 */
/* 0x000fc00000000000 */
/*0120*/ NOP; /* 0x0000000000007918 */
/* 0x000fc00000000000 */
/*0130*/ NOP; /* 0x0000000000007918 */
/* 0x000fc00000000000 */
/*0140*/ NOP; /* 0x0000000000007918 */
/* 0x000fc00000000000 */
/*0150*/ NOP; /* 0x0000000000007918 */
/* 0x000fc00000000000 */
/*0160*/ NOP; /* 0x0000000000007918 */
/* 0x000fc00000000000 */
/*0170*/ NOP; /* 0x0000000000007918 */
/* 0x000fc00000000000 */
.......... | .text
.amdgcn_target "amdgcn-amd-amdhsa--gfx1100"
.protected _Z9matrixAddPiS_S_i
.globl _Z9matrixAddPiS_S_i
.p2align 8
.type _Z9matrixAddPiS_S_i,@function
_Z9matrixAddPiS_S_i:
s_clause 0x1
s_load_b32 s2, s[0:1], 0x18
s_load_b128 s[4:7], s[0:1], 0x0
v_and_b32_e32 v1, 0x3ff, v0
v_bfe_u32 v0, v0, 10, 10
s_load_b64 s[0:1], s[0:1], 0x10
s_waitcnt lgkmcnt(0)
s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
v_mad_u64_u32 v[2:3], null, v0, s2, v[1:2]
v_ashrrev_i32_e32 v3, 31, v2
s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
v_lshlrev_b64 v[0:1], 2, v[2:3]
v_add_co_u32 v2, vcc_lo, s4, v0
s_delay_alu instid0(VALU_DEP_2)
v_add_co_ci_u32_e32 v3, vcc_lo, s5, v1, vcc_lo
v_add_co_u32 v4, vcc_lo, s6, v0
v_add_co_ci_u32_e32 v5, vcc_lo, s7, v1, vcc_lo
v_add_co_u32 v0, vcc_lo, s0, v0
global_load_b32 v2, v[2:3], off
global_load_b32 v3, v[4:5], off
v_add_co_ci_u32_e32 v1, vcc_lo, s1, v1, vcc_lo
s_waitcnt vmcnt(0)
v_add_nc_u32_e32 v2, v3, v2
global_store_b32 v[0:1], v2, off
s_nop 0
s_sendmsg sendmsg(MSG_DEALLOC_VGPRS)
s_endpgm
.section .rodata,"a",@progbits
.p2align 6, 0x0
.amdhsa_kernel _Z9matrixAddPiS_S_i
.amdhsa_group_segment_fixed_size 0
.amdhsa_private_segment_fixed_size 0
.amdhsa_kernarg_size 28
.amdhsa_user_sgpr_count 15
.amdhsa_user_sgpr_dispatch_ptr 0
.amdhsa_user_sgpr_queue_ptr 0
.amdhsa_user_sgpr_kernarg_segment_ptr 1
.amdhsa_user_sgpr_dispatch_id 0
.amdhsa_user_sgpr_private_segment_size 0
.amdhsa_wavefront_size32 1
.amdhsa_uses_dynamic_stack 0
.amdhsa_enable_private_segment 0
.amdhsa_system_sgpr_workgroup_id_x 1
.amdhsa_system_sgpr_workgroup_id_y 0
.amdhsa_system_sgpr_workgroup_id_z 0
.amdhsa_system_sgpr_workgroup_info 0
.amdhsa_system_vgpr_workitem_id 1
.amdhsa_next_free_vgpr 6
.amdhsa_next_free_sgpr 8
.amdhsa_float_round_mode_32 0
.amdhsa_float_round_mode_16_64 0
.amdhsa_float_denorm_mode_32 3
.amdhsa_float_denorm_mode_16_64 3
.amdhsa_dx10_clamp 1
.amdhsa_ieee_mode 1
.amdhsa_fp16_overflow 0
.amdhsa_workgroup_processor_mode 1
.amdhsa_memory_ordered 1
.amdhsa_forward_progress 0
.amdhsa_shared_vgpr_count 0
.amdhsa_exception_fp_ieee_invalid_op 0
.amdhsa_exception_fp_denorm_src 0
.amdhsa_exception_fp_ieee_div_zero 0
.amdhsa_exception_fp_ieee_overflow 0
.amdhsa_exception_fp_ieee_underflow 0
.amdhsa_exception_fp_ieee_inexact 0
.amdhsa_exception_int_div_zero 0
.end_amdhsa_kernel
.text
.Lfunc_end0:
.size _Z9matrixAddPiS_S_i, .Lfunc_end0-_Z9matrixAddPiS_S_i
.section .AMDGPU.csdata,"",@progbits
.text
.p2alignl 7, 3214868480
.fill 96, 4, 3214868480
.type __hip_cuid_,@object
.section .bss,"aw",@nobits
.globl __hip_cuid_
__hip_cuid_:
.byte 0
.size __hip_cuid_, 1
.ident "AMD clang version 18.0.0git (https://github.com/RadeonOpenCompute/llvm-project roc-6.3.2 25012 e5bf7e55c91490b07c49d8960fa7983d864936c4)"
.section ".note.GNU-stack","",@progbits
.addrsig
.addrsig_sym __hip_cuid_
.amdgpu_metadata
---
amdhsa.kernels:
- .args:
- .address_space: global
.offset: 0
.size: 8
.value_kind: global_buffer
- .address_space: global
.offset: 8
.size: 8
.value_kind: global_buffer
- .address_space: global
.offset: 16
.size: 8
.value_kind: global_buffer
- .offset: 24
.size: 4
.value_kind: by_value
.group_segment_fixed_size: 0
.kernarg_segment_align: 8
.kernarg_segment_size: 28
.language: OpenCL C
.language_version:
- 2
- 0
.max_flat_workgroup_size: 1024
.name: _Z9matrixAddPiS_S_i
.private_segment_fixed_size: 0
.sgpr_count: 10
.sgpr_spill_count: 0
.symbol: _Z9matrixAddPiS_S_i.kd
.uniform_work_group_size: 1
.uses_dynamic_stack: false
.vgpr_count: 6
.vgpr_spill_count: 0
.wavefront_size: 32
.workgroup_processor_mode: 1
amdhsa.target: amdgcn-amd-amdhsa--gfx1100
amdhsa.version:
- 1
- 2
...
.end_amdgpu_metadata |
You are a helpful coding assistant specialized in converting from CUDA host assembly to AMD host assembly. | .file "tmpxft_0015e6b5_00000000-6_matrixaddition.cudafe1.cpp"
.text
#APP
#NO_APP
.type _ZL26__cudaUnregisterBinaryUtilv, @function
_ZL26__cudaUnregisterBinaryUtilv:
.LFB2060:
.cfi_startproc
endbr64
subq $8, %rsp
.cfi_def_cfa_offset 16
movq _ZL20__cudaFatCubinHandle(%rip), %rdi
call __cudaUnregisterFatBinary@PLT
addq $8, %rsp
.cfi_def_cfa_offset 8
ret
.cfi_endproc
.LFE2060:
.size _ZL26__cudaUnregisterBinaryUtilv, .-_ZL26__cudaUnregisterBinaryUtilv
.globl _Z33__device_stub__Z9matrixAddPiS_S_iPiS_S_i
.type _Z33__device_stub__Z9matrixAddPiS_S_iPiS_S_i, @function
_Z33__device_stub__Z9matrixAddPiS_S_iPiS_S_i:
.LFB2082:
.cfi_startproc
endbr64
subq $152, %rsp
.cfi_def_cfa_offset 160
movq %rdi, 24(%rsp)
movq %rsi, 16(%rsp)
movq %rdx, 8(%rsp)
movl %ecx, 4(%rsp)
movq %fs:40, %rax
movq %rax, 136(%rsp)
xorl %eax, %eax
leaq 24(%rsp), %rax
movq %rax, 96(%rsp)
leaq 16(%rsp), %rax
movq %rax, 104(%rsp)
leaq 8(%rsp), %rax
movq %rax, 112(%rsp)
leaq 4(%rsp), %rax
movq %rax, 120(%rsp)
movl $1, 48(%rsp)
movl $1, 52(%rsp)
movl $1, 56(%rsp)
movl $1, 60(%rsp)
movl $1, 64(%rsp)
movl $1, 68(%rsp)
leaq 40(%rsp), %rcx
leaq 32(%rsp), %rdx
leaq 60(%rsp), %rsi
leaq 48(%rsp), %rdi
call __cudaPopCallConfiguration@PLT
testl %eax, %eax
je .L7
.L3:
movq 136(%rsp), %rax
subq %fs:40, %rax
jne .L8
addq $152, %rsp
.cfi_remember_state
.cfi_def_cfa_offset 8
ret
.L7:
.cfi_restore_state
pushq 40(%rsp)
.cfi_def_cfa_offset 168
pushq 40(%rsp)
.cfi_def_cfa_offset 176
leaq 112(%rsp), %r9
movq 76(%rsp), %rcx
movl 84(%rsp), %r8d
movq 64(%rsp), %rsi
movl 72(%rsp), %edx
leaq _Z9matrixAddPiS_S_i(%rip), %rdi
call cudaLaunchKernel@PLT
addq $16, %rsp
.cfi_def_cfa_offset 160
jmp .L3
.L8:
call __stack_chk_fail@PLT
.cfi_endproc
.LFE2082:
.size _Z33__device_stub__Z9matrixAddPiS_S_iPiS_S_i, .-_Z33__device_stub__Z9matrixAddPiS_S_iPiS_S_i
.globl _Z9matrixAddPiS_S_i
.type _Z9matrixAddPiS_S_i, @function
_Z9matrixAddPiS_S_i:
.LFB2083:
.cfi_startproc
endbr64
subq $8, %rsp
.cfi_def_cfa_offset 16
call _Z33__device_stub__Z9matrixAddPiS_S_iPiS_S_i
addq $8, %rsp
.cfi_def_cfa_offset 8
ret
.cfi_endproc
.LFE2083:
.size _Z9matrixAddPiS_S_i, .-_Z9matrixAddPiS_S_i
.section .rodata.str1.1,"aMS",@progbits,1
.LC0:
.string "Matrix size: "
.LC1:
.string "%d"
.LC2:
.string "\n%d "
.LC3:
.string "%d "
.LC4:
.string "\n"
.text
.globl main
.type main, @function
main:
.LFB2057:
.cfi_startproc
endbr64
pushq %r15
.cfi_def_cfa_offset 16
.cfi_offset 15, -16
pushq %r14
.cfi_def_cfa_offset 24
.cfi_offset 14, -24
pushq %r13
.cfi_def_cfa_offset 32
.cfi_offset 13, -32
pushq %r12
.cfi_def_cfa_offset 40
.cfi_offset 12, -40
pushq %rbp
.cfi_def_cfa_offset 48
.cfi_offset 6, -48
pushq %rbx
.cfi_def_cfa_offset 56
.cfi_offset 3, -56
subq $72, %rsp
.cfi_def_cfa_offset 128
movq %fs:40, %rax
movq %rax, 56(%rsp)
xorl %eax, %eax
movq $0, 8(%rsp)
movq $0, 16(%rsp)
movq $0, 24(%rsp)
leaq .LC0(%rip), %rsi
movl $2, %edi
call __printf_chk@PLT
leaq 4(%rsp), %rsi
leaq .LC1(%rip), %rdi
movl $0, %eax
call __isoc23_scanf@PLT
movl 4(%rsp), %r15d
imull %r15d, %r15d
movslq %r15d, %r12
leaq 0(,%r12,4), %r14
movq %r14, %rdi
call malloc@PLT
movq %rax, %rbp
leaq 8(%rsp), %rdi
movq %r14, %rsi
call cudaMalloc@PLT
leaq 16(%rsp), %rdi
movq %r14, %rsi
call cudaMalloc@PLT
leaq 24(%rsp), %rdi
movq %r14, %rsi
call cudaMalloc@PLT
testl %r15d, %r15d
jle .L12
movq %rbp, %rbx
leaq (%r14,%rbp), %r13
.L13:
call rand@PLT
movslq %eax, %rdx
imulq $1374389535, %rdx, %rdx
sarq $37, %rdx
movl %eax, %ecx
sarl $31, %ecx
subl %ecx, %edx
imull $100, %edx, %edx
subl %edx, %eax
movl %eax, (%rbx)
addq $4, %rbx
cmpq %r13, %rbx
jne .L13
.L12:
movl $1, %ecx
movq %r14, %rdx
movq %rbp, %rsi
movq 8(%rsp), %rdi
call cudaMemcpy@PLT
movl $1, %ecx
movq %r14, %rdx
movq %rbp, %rsi
movq 16(%rsp), %rdi
call cudaMemcpy@PLT
movl 4(%rsp), %eax
movl %eax, 32(%rsp)
movl %eax, 36(%rsp)
movl $1, 44(%rsp)
movl $1, 48(%rsp)
movl $0, %r9d
movl $0, %r8d
movq 32(%rsp), %rdx
movl $1, %ecx
movq 44(%rsp), %rdi
movl $1, %esi
call __cudaPushCallConfiguration@PLT
testl %eax, %eax
je .L23
.L14:
call cudaThreadSynchronize@PLT
movl $2, %ecx
movq %r14, %rdx
movq 24(%rsp), %rsi
movq %rbp, %rdi
call cudaMemcpy@PLT
testl %r15d, %r15d
jle .L15
movl $0, %ebx
leaq .LC3(%rip), %r14
leaq .LC2(%rip), %r13
jmp .L18
.L23:
movl 4(%rsp), %ecx
movq 24(%rsp), %rdx
movq 16(%rsp), %rsi
movq 8(%rsp), %rdi
call _Z33__device_stub__Z9matrixAddPiS_S_iPiS_S_i
jmp .L14
.L16:
movl 0(%rbp,%rbx,4), %edx
movq %r14, %rsi
movl $2, %edi
movl $0, %eax
call __printf_chk@PLT
.L17:
addq $1, %rbx
cmpq %rbx, %r12
je .L15
.L18:
movl %ebx, %eax
cltd
idivl 4(%rsp)
testl %edx, %edx
jne .L16
movl 0(%rbp,%rbx,4), %edx
movq %r13, %rsi
movl $2, %edi
movl $0, %eax
call __printf_chk@PLT
jmp .L17
.L15:
leaq .LC4(%rip), %rsi
movl $2, %edi
movl $0, %eax
call __printf_chk@PLT
movq 56(%rsp), %rax
subq %fs:40, %rax
jne .L24
movl $0, %eax
addq $72, %rsp
.cfi_remember_state
.cfi_def_cfa_offset 56
popq %rbx
.cfi_def_cfa_offset 48
popq %rbp
.cfi_def_cfa_offset 40
popq %r12
.cfi_def_cfa_offset 32
popq %r13
.cfi_def_cfa_offset 24
popq %r14
.cfi_def_cfa_offset 16
popq %r15
.cfi_def_cfa_offset 8
ret
.L24:
.cfi_restore_state
call __stack_chk_fail@PLT
.cfi_endproc
.LFE2057:
.size main, .-main
.section .rodata.str1.1
.LC5:
.string "_Z9matrixAddPiS_S_i"
.text
.type _ZL24__sti____cudaRegisterAllv, @function
_ZL24__sti____cudaRegisterAllv:
.LFB2085:
.cfi_startproc
endbr64
subq $8, %rsp
.cfi_def_cfa_offset 16
leaq _ZL15__fatDeviceText(%rip), %rdi
call __cudaRegisterFatBinary@PLT
movq %rax, %rdi
movq %rax, _ZL20__cudaFatCubinHandle(%rip)
pushq $0
.cfi_def_cfa_offset 24
pushq $0
.cfi_def_cfa_offset 32
pushq $0
.cfi_def_cfa_offset 40
pushq $0
.cfi_def_cfa_offset 48
movl $0, %r9d
movl $-1, %r8d
leaq .LC5(%rip), %rdx
movq %rdx, %rcx
leaq _Z9matrixAddPiS_S_i(%rip), %rsi
call __cudaRegisterFunction@PLT
addq $32, %rsp
.cfi_def_cfa_offset 16
movq _ZL20__cudaFatCubinHandle(%rip), %rdi
call __cudaRegisterFatBinaryEnd@PLT
leaq _ZL26__cudaUnregisterBinaryUtilv(%rip), %rdi
call atexit@PLT
addq $8, %rsp
.cfi_def_cfa_offset 8
ret
.cfi_endproc
.LFE2085:
.size _ZL24__sti____cudaRegisterAllv, .-_ZL24__sti____cudaRegisterAllv
.section .init_array,"aw"
.align 8
.quad _ZL24__sti____cudaRegisterAllv
.section .nvFatBinSegment,"aw"
.align 8
.type _ZL15__fatDeviceText, @object
.size _ZL15__fatDeviceText, 24
_ZL15__fatDeviceText:
.long 1180844977
.long 1
.quad fatbinData
.quad 0
.local _ZL20__cudaFatCubinHandle
.comm _ZL20__cudaFatCubinHandle,8,8
.ident "GCC: (Ubuntu 13.3.0-6ubuntu2~24.04) 13.3.0"
.section .note.GNU-stack,"",@progbits
.section .note.gnu.property,"a"
.align 8
.long 1f - 0f
.long 4f - 1f
.long 5
0:
.string "GNU"
1:
.align 8
.long 0xc0000002
.long 3f - 2f
2:
.long 0x3
3:
.align 8
4: | .text
.file "matrixaddition.hip"
.globl _Z24__device_stub__matrixAddPiS_S_i # -- Begin function _Z24__device_stub__matrixAddPiS_S_i
.p2align 4, 0x90
.type _Z24__device_stub__matrixAddPiS_S_i,@function
_Z24__device_stub__matrixAddPiS_S_i: # @_Z24__device_stub__matrixAddPiS_S_i
.cfi_startproc
# %bb.0:
subq $120, %rsp
.cfi_def_cfa_offset 128
movq %rdi, 72(%rsp)
movq %rsi, 64(%rsp)
movq %rdx, 56(%rsp)
movl %ecx, 4(%rsp)
leaq 72(%rsp), %rax
movq %rax, 80(%rsp)
leaq 64(%rsp), %rax
movq %rax, 88(%rsp)
leaq 56(%rsp), %rax
movq %rax, 96(%rsp)
leaq 4(%rsp), %rax
movq %rax, 104(%rsp)
leaq 40(%rsp), %rdi
leaq 24(%rsp), %rsi
leaq 16(%rsp), %rdx
leaq 8(%rsp), %rcx
callq __hipPopCallConfiguration
movq 40(%rsp), %rsi
movl 48(%rsp), %edx
movq 24(%rsp), %rcx
movl 32(%rsp), %r8d
leaq 80(%rsp), %r9
movl $_Z9matrixAddPiS_S_i, %edi
pushq 8(%rsp)
.cfi_adjust_cfa_offset 8
pushq 24(%rsp)
.cfi_adjust_cfa_offset 8
callq hipLaunchKernel
addq $136, %rsp
.cfi_adjust_cfa_offset -136
retq
.Lfunc_end0:
.size _Z24__device_stub__matrixAddPiS_S_i, .Lfunc_end0-_Z24__device_stub__matrixAddPiS_S_i
.cfi_endproc
# -- End function
.globl main # -- Begin function main
.p2align 4, 0x90
.type main,@function
main: # @main
.cfi_startproc
# %bb.0:
pushq %rbp
.cfi_def_cfa_offset 16
pushq %r15
.cfi_def_cfa_offset 24
pushq %r14
.cfi_def_cfa_offset 32
pushq %r13
.cfi_def_cfa_offset 40
pushq %r12
.cfi_def_cfa_offset 48
pushq %rbx
.cfi_def_cfa_offset 56
subq $152, %rsp
.cfi_def_cfa_offset 208
.cfi_offset %rbx, -56
.cfi_offset %r12, -48
.cfi_offset %r13, -40
.cfi_offset %r14, -32
.cfi_offset %r15, -24
.cfi_offset %rbp, -16
movq $0, 24(%rsp)
movq $0, 16(%rsp)
movq $0, 8(%rsp)
movl $.L.str, %edi
xorl %eax, %eax
callq printf
leaq 4(%rsp), %rsi
movl $.L.str.1, %edi
xorl %eax, %eax
callq __isoc23_scanf
movl 4(%rsp), %ebp
movl %ebp, %r15d
imull %r15d, %r15d
leaq (,%r15,4), %r14
movq %r14, %rdi
callq malloc
movq %rax, %rbx
leaq 24(%rsp), %rdi
movq %r14, %rsi
callq hipMalloc
leaq 16(%rsp), %rdi
movq %r14, %rsi
callq hipMalloc
leaq 8(%rsp), %rdi
movq %r14, %rsi
callq hipMalloc
testl %ebp, %ebp
je .LBB1_3
# %bb.1: # %.lr.ph.preheader
cmpl $1, %r15d
movl %r15d, %r12d
adcl $0, %r12d
xorl %r13d, %r13d
.p2align 4, 0x90
.LBB1_2: # %.lr.ph
# =>This Inner Loop Header: Depth=1
callq rand
cltq
imulq $1374389535, %rax, %rcx # imm = 0x51EB851F
movq %rcx, %rdx
shrq $63, %rdx
sarq $37, %rcx
addl %edx, %ecx
imull $100, %ecx, %ecx
subl %ecx, %eax
movl %eax, (%rbx,%r13,4)
incq %r13
cmpq %r13, %r12
jne .LBB1_2
.LBB1_3: # %._crit_edge
movq 24(%rsp), %rdi
movq %rbx, %rsi
movq %r14, %rdx
movl $1, %ecx
callq hipMemcpy
movq 16(%rsp), %rdi
movq %rbx, %rsi
movq %r14, %rdx
movl $1, %ecx
callq hipMemcpy
movl 4(%rsp), %eax
movq %rax, %rdx
shlq $32, %rdx
orq %rax, %rdx
movabsq $4294967297, %rdi # imm = 0x100000001
movl $1, %esi
movl $1, %ecx
xorl %r8d, %r8d
xorl %r9d, %r9d
callq __hipPushCallConfiguration
testl %eax, %eax
jne .LBB1_5
# %bb.4:
movq 24(%rsp), %rax
movq 16(%rsp), %rcx
movq 8(%rsp), %rdx
movl 4(%rsp), %esi
movq %rax, 104(%rsp)
movq %rcx, 96(%rsp)
movq %rdx, 88(%rsp)
movl %esi, 36(%rsp)
leaq 104(%rsp), %rax
movq %rax, 112(%rsp)
leaq 96(%rsp), %rax
movq %rax, 120(%rsp)
leaq 88(%rsp), %rax
movq %rax, 128(%rsp)
leaq 36(%rsp), %rax
movq %rax, 136(%rsp)
leaq 72(%rsp), %rdi
leaq 56(%rsp), %rsi
leaq 48(%rsp), %rdx
leaq 40(%rsp), %rcx
callq __hipPopCallConfiguration
movq 72(%rsp), %rsi
movl 80(%rsp), %edx
movq 56(%rsp), %rcx
movl 64(%rsp), %r8d
leaq 112(%rsp), %r9
movl $_Z9matrixAddPiS_S_i, %edi
pushq 40(%rsp)
.cfi_adjust_cfa_offset 8
pushq 56(%rsp)
.cfi_adjust_cfa_offset 8
callq hipLaunchKernel
addq $16, %rsp
.cfi_adjust_cfa_offset -16
.LBB1_5:
callq hipDeviceSynchronize
movq 8(%rsp), %rsi
movq %rbx, %rdi
movq %r14, %rdx
movl $2, %ecx
callq hipMemcpy
testl %ebp, %ebp
je .LBB1_10
# %bb.6: # %.lr.ph36.preheader
cmpl $1, %r15d
adcl $0, %r15d
xorl %r14d, %r14d
jmp .LBB1_7
.p2align 4, 0x90
.LBB1_9: # %.lr.ph36
# in Loop: Header=BB1_7 Depth=1
movl (%rbx,%r14,4), %esi
xorl %eax, %eax
callq printf
incq %r14
cmpq %r14, %r15
je .LBB1_10
.LBB1_7: # %.lr.ph36
# =>This Inner Loop Header: Depth=1
movl %r14d, %eax
cltd
idivl 4(%rsp)
movl $.L.str.2, %edi
testl %edx, %edx
je .LBB1_9
# %bb.8: # %.lr.ph36
# in Loop: Header=BB1_7 Depth=1
movl $.L.str.3, %edi
jmp .LBB1_9
.LBB1_10: # %._crit_edge37
movl $10, %edi
callq putchar@PLT
xorl %eax, %eax
addq $152, %rsp
.cfi_def_cfa_offset 56
popq %rbx
.cfi_def_cfa_offset 48
popq %r12
.cfi_def_cfa_offset 40
popq %r13
.cfi_def_cfa_offset 32
popq %r14
.cfi_def_cfa_offset 24
popq %r15
.cfi_def_cfa_offset 16
popq %rbp
.cfi_def_cfa_offset 8
retq
.Lfunc_end1:
.size main, .Lfunc_end1-main
.cfi_endproc
# -- End function
.p2align 4, 0x90 # -- Begin function __hip_module_ctor
.type __hip_module_ctor,@function
__hip_module_ctor: # @__hip_module_ctor
.cfi_startproc
# %bb.0:
subq $40, %rsp
.cfi_def_cfa_offset 48
cmpq $0, __hip_gpubin_handle(%rip)
jne .LBB2_2
# %bb.1:
movl $__hip_fatbin_wrapper, %edi
callq __hipRegisterFatBinary
movq %rax, __hip_gpubin_handle(%rip)
.LBB2_2:
movq __hip_gpubin_handle(%rip), %rdi
xorps %xmm0, %xmm0
movups %xmm0, 16(%rsp)
movups %xmm0, (%rsp)
movl $_Z9matrixAddPiS_S_i, %esi
movl $.L__unnamed_1, %edx
movl $.L__unnamed_1, %ecx
movl $-1, %r8d
xorl %r9d, %r9d
callq __hipRegisterFunction
movl $__hip_module_dtor, %edi
addq $40, %rsp
.cfi_def_cfa_offset 8
jmp atexit # TAILCALL
.Lfunc_end2:
.size __hip_module_ctor, .Lfunc_end2-__hip_module_ctor
.cfi_endproc
# -- End function
.p2align 4, 0x90 # -- Begin function __hip_module_dtor
.type __hip_module_dtor,@function
__hip_module_dtor: # @__hip_module_dtor
.cfi_startproc
# %bb.0:
movq __hip_gpubin_handle(%rip), %rdi
testq %rdi, %rdi
je .LBB3_2
# %bb.1:
pushq %rax
.cfi_def_cfa_offset 16
callq __hipUnregisterFatBinary
movq $0, __hip_gpubin_handle(%rip)
addq $8, %rsp
.cfi_def_cfa_offset 8
.LBB3_2:
retq
.Lfunc_end3:
.size __hip_module_dtor, .Lfunc_end3-__hip_module_dtor
.cfi_endproc
# -- End function
.type _Z9matrixAddPiS_S_i,@object # @_Z9matrixAddPiS_S_i
.section .rodata,"a",@progbits
.globl _Z9matrixAddPiS_S_i
.p2align 3, 0x0
_Z9matrixAddPiS_S_i:
.quad _Z24__device_stub__matrixAddPiS_S_i
.size _Z9matrixAddPiS_S_i, 8
.type .L.str,@object # @.str
.section .rodata.str1.1,"aMS",@progbits,1
.L.str:
.asciz "Matrix size: "
.size .L.str, 14
.type .L.str.1,@object # @.str.1
.L.str.1:
.asciz "%d"
.size .L.str.1, 3
.type .L.str.2,@object # @.str.2
.L.str.2:
.asciz "\n%d "
.size .L.str.2, 5
.type .L.str.3,@object # @.str.3
.L.str.3:
.asciz "%d "
.size .L.str.3, 4
.type .L__unnamed_1,@object # @0
.L__unnamed_1:
.asciz "_Z9matrixAddPiS_S_i"
.size .L__unnamed_1, 20
.type __hip_fatbin_wrapper,@object # @__hip_fatbin_wrapper
.section .hipFatBinSegment,"a",@progbits
.p2align 3, 0x0
__hip_fatbin_wrapper:
.long 1212764230 # 0x48495046
.long 1 # 0x1
.quad __hip_fatbin
.quad 0
.size __hip_fatbin_wrapper, 24
.type __hip_gpubin_handle,@object # @__hip_gpubin_handle
.local __hip_gpubin_handle
.comm __hip_gpubin_handle,8,8
.section .init_array,"aw",@init_array
.p2align 3, 0x0
.quad __hip_module_ctor
.type __hip_cuid_,@object # @__hip_cuid_
.bss
.globl __hip_cuid_
__hip_cuid_:
.byte 0 # 0x0
.size __hip_cuid_, 1
.section ".linker-options","e",@llvm_linker_options
.ident "AMD clang version 18.0.0git (https://github.com/RadeonOpenCompute/llvm-project roc-6.3.2 25012 e5bf7e55c91490b07c49d8960fa7983d864936c4)"
.section ".note.GNU-stack","",@progbits
.addrsig
.addrsig_sym _Z24__device_stub__matrixAddPiS_S_i
.addrsig_sym __hip_module_ctor
.addrsig_sym __hip_module_dtor
.addrsig_sym _Z9matrixAddPiS_S_i
.addrsig_sym __hip_fatbin
.addrsig_sym __hip_fatbin_wrapper
.addrsig_sym __hip_cuid_ |
You are a helpful coding assistant specialized in converting CUDA source code to CUDA host assembly. | #include <iostream>
using namespace std;
using T = double;
constexpr T range_min = 2.0;
constexpr T range_max = 4.0;
constexpr T range = range_max - range_min;
constexpr auto all_threads = 4096;
constexpr auto block_size = 16;
constexpr auto thread_size = all_threads / block_size;
constexpr auto warmup = 300;
constexpr auto loops = 1000;
__device__ T get_a() {
return // 2 * log2(2 + range / thread_size * threadIdx.x);
range_min +
// ((T)thread_size) / ((T)threadIdx.x) * range
range / (thread_size * block_size) *
(blockIdx.x * thread_size + threadIdx.x);
}
__global__ void logistic() {
const auto a = get_a();
T x = 0.8;
for(int index = 0; index < warmup; index++) {
x = a * x * (1 - x);
}
for(int index = warmup; index < loops; index++) {
printf("%1.8lf %1.8lf\n", a, x);
x = a * x * (1 - x);
}
}
int main() {
// size_t nBytes = loops * (thread_size + 1) * sizeof(T);
// T *x;
// cudaMalloc((void **)&x, nBytes);
logistic<<<block_size, thread_size>>>();
// cudaFree(x);
cudaDeviceReset();
} | .file "tmpxft_001069b4_00000000-6_logistic.cudafe1.cpp"
.text
#APP
.globl _ZSt21ios_base_library_initv
#NO_APP
.type _ZL26__cudaUnregisterBinaryUtilv, @function
_ZL26__cudaUnregisterBinaryUtilv:
.LFB3673:
.cfi_startproc
endbr64
subq $8, %rsp
.cfi_def_cfa_offset 16
movq _ZL20__cudaFatCubinHandle(%rip), %rdi
call __cudaUnregisterFatBinary@PLT
addq $8, %rsp
.cfi_def_cfa_offset 8
ret
.cfi_endproc
.LFE3673:
.size _ZL26__cudaUnregisterBinaryUtilv, .-_ZL26__cudaUnregisterBinaryUtilv
.globl _Z5get_av
.type _Z5get_av, @function
_Z5get_av:
.LFB3669:
.cfi_startproc
endbr64
pushq %rax
.cfi_def_cfa_offset 16
popq %rax
.cfi_def_cfa_offset 8
subq $24, %rsp
.cfi_def_cfa_offset 32
movl $1, 12(%rsp)
movl 12(%rsp), %edi
call exit@PLT
.cfi_endproc
.LFE3669:
.size _Z5get_av, .-_Z5get_av
.globl _Z26__device_stub__Z8logisticvv
.type _Z26__device_stub__Z8logisticvv, @function
_Z26__device_stub__Z8logisticvv:
.LFB3695:
.cfi_startproc
endbr64
subq $88, %rsp
.cfi_def_cfa_offset 96
movq %fs:40, %rax
movq %rax, 72(%rsp)
xorl %eax, %eax
movl $1, 16(%rsp)
movl $1, 20(%rsp)
movl $1, 24(%rsp)
movl $1, 28(%rsp)
movl $1, 32(%rsp)
movl $1, 36(%rsp)
leaq 8(%rsp), %rcx
movq %rsp, %rdx
leaq 28(%rsp), %rsi
leaq 16(%rsp), %rdi
call __cudaPopCallConfiguration@PLT
testl %eax, %eax
je .L9
.L5:
movq 72(%rsp), %rax
subq %fs:40, %rax
jne .L10
addq $88, %rsp
.cfi_remember_state
.cfi_def_cfa_offset 8
ret
.L9:
.cfi_restore_state
pushq 8(%rsp)
.cfi_def_cfa_offset 104
pushq 8(%rsp)
.cfi_def_cfa_offset 112
leaq 80(%rsp), %r9
movq 44(%rsp), %rcx
movl 52(%rsp), %r8d
movq 32(%rsp), %rsi
movl 40(%rsp), %edx
leaq _Z8logisticv(%rip), %rdi
call cudaLaunchKernel@PLT
addq $16, %rsp
.cfi_def_cfa_offset 96
jmp .L5
.L10:
call __stack_chk_fail@PLT
.cfi_endproc
.LFE3695:
.size _Z26__device_stub__Z8logisticvv, .-_Z26__device_stub__Z8logisticvv
.globl _Z8logisticv
.type _Z8logisticv, @function
_Z8logisticv:
.LFB3696:
.cfi_startproc
endbr64
subq $8, %rsp
.cfi_def_cfa_offset 16
call _Z26__device_stub__Z8logisticvv
addq $8, %rsp
.cfi_def_cfa_offset 8
ret
.cfi_endproc
.LFE3696:
.size _Z8logisticv, .-_Z8logisticv
.globl main
.type main, @function
main:
.LFB3670:
.cfi_startproc
endbr64
subq $40, %rsp
.cfi_def_cfa_offset 48
movl $256, 20(%rsp)
movl $1, 24(%rsp)
movl $16, 8(%rsp)
movl $1, 12(%rsp)
movl $0, %r9d
movl $0, %r8d
movq 20(%rsp), %rdx
movl $1, %ecx
movq 8(%rsp), %rdi
movl $1, %esi
call __cudaPushCallConfiguration@PLT
testl %eax, %eax
je .L16
.L14:
call cudaDeviceReset@PLT
movl $0, %eax
addq $40, %rsp
.cfi_remember_state
.cfi_def_cfa_offset 8
ret
.L16:
.cfi_restore_state
call _Z26__device_stub__Z8logisticvv
jmp .L14
.cfi_endproc
.LFE3670:
.size main, .-main
.section .rodata.str1.1,"aMS",@progbits,1
.LC0:
.string "_Z8logisticv"
.text
.type _ZL24__sti____cudaRegisterAllv, @function
_ZL24__sti____cudaRegisterAllv:
.LFB3698:
.cfi_startproc
endbr64
subq $8, %rsp
.cfi_def_cfa_offset 16
leaq _ZL15__fatDeviceText(%rip), %rdi
call __cudaRegisterFatBinary@PLT
movq %rax, %rdi
movq %rax, _ZL20__cudaFatCubinHandle(%rip)
pushq $0
.cfi_def_cfa_offset 24
pushq $0
.cfi_def_cfa_offset 32
pushq $0
.cfi_def_cfa_offset 40
pushq $0
.cfi_def_cfa_offset 48
movl $0, %r9d
movl $-1, %r8d
leaq .LC0(%rip), %rdx
movq %rdx, %rcx
leaq _Z8logisticv(%rip), %rsi
call __cudaRegisterFunction@PLT
addq $32, %rsp
.cfi_def_cfa_offset 16
movq _ZL20__cudaFatCubinHandle(%rip), %rdi
call __cudaRegisterFatBinaryEnd@PLT
leaq _ZL26__cudaUnregisterBinaryUtilv(%rip), %rdi
call atexit@PLT
addq $8, %rsp
.cfi_def_cfa_offset 8
ret
.cfi_endproc
.LFE3698:
.size _ZL24__sti____cudaRegisterAllv, .-_ZL24__sti____cudaRegisterAllv
.section .init_array,"aw"
.align 8
.quad _ZL24__sti____cudaRegisterAllv
.section .nvFatBinSegment,"aw"
.align 8
.type _ZL15__fatDeviceText, @object
.size _ZL15__fatDeviceText, 24
_ZL15__fatDeviceText:
.long 1180844977
.long 1
.quad fatbinData
.quad 0
.local _ZL20__cudaFatCubinHandle
.comm _ZL20__cudaFatCubinHandle,8,8
.ident "GCC: (Ubuntu 13.3.0-6ubuntu2~24.04) 13.3.0"
.section .note.GNU-stack,"",@progbits
.section .note.gnu.property,"a"
.align 8
.long 1f - 0f
.long 4f - 1f
.long 5
0:
.string "GNU"
1:
.align 8
.long 0xc0000002
.long 3f - 2f
2:
.long 0x3
3:
.align 8
4: |
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