system stringclasses 7 values | input stringlengths 10 94.5k | output stringlengths 14 55.5k |
|---|---|---|
You are a helpful coding assistant specialized in converting from CUDA device assembly to AMD device assembly. | code for sm_80
Function : _Z3dotPfS_S_
.headerflags @"EF_CUDA_TEXMODE_UNIFIED EF_CUDA_64BIT_ADDRESS EF_CUDA_SM80 EF_CUDA_VIRTUAL_SM(EF_CUDA_SM80)"
/*0000*/ IMAD.MOV.U32 R1, RZ, RZ, c[0x0][0x28] ; /* 0x00000a00ff017624 */
/* 0x000fe400078e00ff */
/*0010*/ S2R R7, SR_CTAID.X ; /* 0x0000000000077919 */
/* 0x000e220000002500 */
/*0020*/ ULDC.64 UR6, c[0x0][0x118] ; /* 0x0000460000067ab9 */
/* 0x000fe20000000a00 */
/*0030*/ BSSY B0, 0x150 ; /* 0x0000011000007945 */
/* 0x000fe20003800000 */
/*0040*/ HFMA2.MMA R6, -RZ, RZ, 0, 0 ; /* 0x00000000ff067435 */
/* 0x000fe200000001ff */
/*0050*/ S2R R8, SR_TID.X ; /* 0x0000000000087919 */
/* 0x000e240000002100 */
/*0060*/ IMAD R0, R7, c[0x0][0x0], R8 ; /* 0x0000000007007a24 */
/* 0x001fca00078e0208 */
/*0070*/ ISETP.GT.AND P0, PT, R0, 0x83ff, PT ; /* 0x000083ff0000780c */
/* 0x000fda0003f04270 */
/*0080*/ @P0 BRA 0x140 ; /* 0x000000b000000947 */
/* 0x000fea0003800000 */
/*0090*/ IMAD.MOV.U32 R6, RZ, RZ, RZ ; /* 0x000000ffff067224 */
/* 0x000fe400078e00ff */
/*00a0*/ MOV R5, 0x4 ; /* 0x0000000400057802 */
/* 0x000fca0000000f00 */
/*00b0*/ IMAD.WIDE R2, R0, R5, c[0x0][0x160] ; /* 0x0000580000027625 */
/* 0x000fc800078e0205 */
/*00c0*/ IMAD.WIDE R4, R0, R5, c[0x0][0x168] ; /* 0x00005a0000047625 */
/* 0x000fe400078e0205 */
/*00d0*/ LDG.E R2, [R2.64] ; /* 0x0000000602027981 */
/* 0x000ea8000c1e1900 */
/*00e0*/ LDG.E R5, [R4.64] ; /* 0x0000000604057981 */
/* 0x000ea2000c1e1900 */
/*00f0*/ IMAD.MOV.U32 R9, RZ, RZ, c[0x0][0x0] ; /* 0x00000000ff097624 */
/* 0x000fc800078e00ff */
/*0100*/ IMAD R0, R9, c[0x0][0xc], R0 ; /* 0x0000030009007a24 */
/* 0x000fca00078e0200 */
/*0110*/ ISETP.GE.AND P0, PT, R0, 0x8400, PT ; /* 0x000084000000780c */
/* 0x000fe20003f06270 */
/*0120*/ FFMA R6, R5, R2, R6 ; /* 0x0000000205067223 */
/* 0x004fd80000000006 */
/*0130*/ @!P0 BRA 0xa0 ; /* 0xffffff6000008947 */
/* 0x000fea000383ffff */
/*0140*/ BSYNC B0 ; /* 0x0000000000007941 */
/* 0x000fea0003800000 */
/*0150*/ ULDC UR4, c[0x0][0x0] ; /* 0x0000000000047ab9 */
/* 0x000fe20000000800 */
/*0160*/ STS [R8.X4], R6 ; /* 0x0000000608007388 */
/* 0x0001e20000004800 */
/*0170*/ USHF.R.U32.HI UR4, URZ, 0x1, UR4 ; /* 0x000000013f047899 */
/* 0x000fc60008011604 */
/*0180*/ BAR.SYNC.DEFER_BLOCKING 0x0 ; /* 0x0000000000007b1d */
/* 0x000fe20000010000 */
/*0190*/ ISETP.NE.AND P0, PT, R8, RZ, PT ; /* 0x000000ff0800720c */
/* 0x000fe40003f05270 */
/*01a0*/ ISETP.NE.AND P1, PT, RZ, UR4, PT ; /* 0x00000004ff007c0c */
/* 0x000fda000bf25270 */
/*01b0*/ @!P1 BRA 0x2d0 ; /* 0x0000011000009947 */
/* 0x000fea0003800000 */
/*01c0*/ BSSY B0, 0x2d0 ; /* 0x0000010000007945 */
/* 0x001fe20003800000 */
/*01d0*/ SHF.L.U32 R0, R8, 0x2, RZ ; /* 0x0000000208007819 */
/* 0x000fe200000006ff */
/*01e0*/ IMAD.U32 R3, RZ, RZ, UR4 ; /* 0x00000004ff037e24 */
/* 0x000fca000f8e00ff */
/*01f0*/ ISETP.GE.AND P1, PT, R8, R3, PT ; /* 0x000000030800720c */
/* 0x000fda0003f26270 */
/*0200*/ @!P1 LEA R2, R3.reuse, R0, 0x2 ; /* 0x0000000003029211 */
/* 0x040fe200078e10ff */
/*0210*/ @!P1 LDS R4, [R8.X4] ; /* 0x0000000008049984 */
/* 0x000fe20000004800 */
/*0220*/ @!P1 WARPSYNC 0xffffffff ; /* 0xffffffff00009948 */
/* 0x000fe60003800000 */
/*0230*/ @!P1 LDS R5, [R2] ; /* 0x0000000002059984 */
/* 0x000e240000000800 */
/*0240*/ @!P1 FADD R4, R4, R5 ; /* 0x0000000504049221 */
/* 0x001fe20000000000 */
/*0250*/ IADD3 R5, R3.reuse, 0x1, RZ ; /* 0x0000000103057810 */
/* 0x040fe40007ffe0ff */
/*0260*/ LEA.HI R3, R3, R3, RZ, 0x1 ; /* 0x0000000303037211 */
/* 0x000fc400078f08ff */
/*0270*/ @!P1 STS [R8.X4], R4 ; /* 0x0000000408009388 */
/* 0x0001e40000004800 */
/*0280*/ SHF.R.S32.HI R3, RZ, 0x1, R3 ; /* 0x00000001ff037819 */
/* 0x000fe40000011403 */
/*0290*/ @!P1 BAR.SYNC.DEFER_BLOCKING 0x0 ; /* 0x0000000000009b1d */
/* 0x000fe20000010000 */
/*02a0*/ ISETP.GT.U32.AND P1, PT, R5, 0x2, PT ; /* 0x000000020500780c */
/* 0x000fda0003f24070 */
/*02b0*/ @P1 BRA 0x1f0 ; /* 0xffffff3000001947 */
/* 0x001fea000383ffff */
/*02c0*/ BSYNC B0 ; /* 0x0000000000007941 */
/* 0x000fea0003800000 */
/*02d0*/ @P0 EXIT ; /* 0x000000000000094d */
/* 0x001fea0003800000 */
/*02e0*/ LDS R5, [RZ] ; /* 0x00000000ff057984 */
/* 0x000e220000000800 */
/*02f0*/ IMAD.MOV.U32 R2, RZ, RZ, 0x4 ; /* 0x00000004ff027424 */
/* 0x000fc800078e00ff */
/*0300*/ IMAD.WIDE.U32 R2, R7, R2, c[0x0][0x170] ; /* 0x00005c0007027625 */
/* 0x000fca00078e0002 */
/*0310*/ STG.E [R2.64], R5 ; /* 0x0000000502007986 */
/* 0x001fe2000c101906 */
/*0320*/ EXIT ; /* 0x000000000000794d */
/* 0x000fea0003800000 */
/*0330*/ BRA 0x330; /* 0xfffffff000007947 */
/* 0x000fc0000383ffff */
/*0340*/ NOP; /* 0x0000000000007918 */
/* 0x000fc00000000000 */
/*0350*/ NOP; /* 0x0000000000007918 */
/* 0x000fc00000000000 */
/*0360*/ NOP; /* 0x0000000000007918 */
/* 0x000fc00000000000 */
/*0370*/ NOP; /* 0x0000000000007918 */
/* 0x000fc00000000000 */
/*0380*/ NOP; /* 0x0000000000007918 */
/* 0x000fc00000000000 */
/*0390*/ NOP; /* 0x0000000000007918 */
/* 0x000fc00000000000 */
/*03a0*/ NOP; /* 0x0000000000007918 */
/* 0x000fc00000000000 */
/*03b0*/ NOP; /* 0x0000000000007918 */
/* 0x000fc00000000000 */
/*03c0*/ NOP; /* 0x0000000000007918 */
/* 0x000fc00000000000 */
/*03d0*/ NOP; /* 0x0000000000007918 */
/* 0x000fc00000000000 */
/*03e0*/ NOP; /* 0x0000000000007918 */
/* 0x000fc00000000000 */
/*03f0*/ NOP; /* 0x0000000000007918 */
/* 0x000fc00000000000 */
.......... | .text
.amdgcn_target "amdgcn-amd-amdhsa--gfx1100"
.protected _Z3dotPfS_S_
.globl _Z3dotPfS_S_
.p2align 8
.type _Z3dotPfS_S_,@function
_Z3dotPfS_S_:
s_load_b32 s3, s[0:1], 0x24
s_add_u32 s4, s0, 24
s_mov_b32 s2, s15
s_addc_u32 s5, s1, 0
v_mov_b32_e32 v3, 0
s_mov_b32 s8, exec_lo
s_waitcnt lgkmcnt(0)
s_and_b32 s3, s3, 0xffff
s_delay_alu instid0(SALU_CYCLE_1) | instskip(NEXT) | instid1(VALU_DEP_1)
v_mad_u64_u32 v[1:2], null, s2, s3, v[0:1]
v_cmpx_gt_i32_e32 0x8400, v1
s_cbranch_execz .LBB0_4
s_load_b32 s10, s[4:5], 0x0
s_load_b128 s[4:7], s[0:1], 0x0
v_mov_b32_e32 v3, 0
s_mov_b32 s9, 0
s_waitcnt lgkmcnt(0)
s_mul_i32 s10, s10, s3
.p2align 6
.LBB0_2:
v_ashrrev_i32_e32 v2, 31, v1
s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_2)
v_lshlrev_b64 v[4:5], 2, v[1:2]
v_add_nc_u32_e32 v1, s10, v1
v_add_co_u32 v6, vcc_lo, s4, v4
s_delay_alu instid0(VALU_DEP_3)
v_add_co_ci_u32_e32 v7, vcc_lo, s5, v5, vcc_lo
v_add_co_u32 v4, vcc_lo, s6, v4
v_add_co_ci_u32_e32 v5, vcc_lo, s7, v5, vcc_lo
v_cmp_lt_i32_e32 vcc_lo, 0x83ff, v1
global_load_b32 v2, v[6:7], off
global_load_b32 v4, v[4:5], off
s_or_b32 s9, vcc_lo, s9
s_waitcnt vmcnt(0)
v_fmac_f32_e32 v3, v2, v4
s_and_not1_b32 exec_lo, exec_lo, s9
s_cbranch_execnz .LBB0_2
s_or_b32 exec_lo, exec_lo, s9
.LBB0_4:
s_delay_alu instid0(SALU_CYCLE_1)
s_or_b32 exec_lo, exec_lo, s8
v_lshlrev_b32_e32 v1, 2, v0
s_cmp_lt_u32 s3, 2
ds_store_b32 v1, v3
s_waitcnt lgkmcnt(0)
s_barrier
buffer_gl0_inv
s_cbranch_scc0 .LBB0_9
.LBB0_5:
s_mov_b32 s3, 0
s_mov_b32 s4, exec_lo
v_cmpx_eq_u32_e32 0, v0
s_cbranch_execz .LBB0_7
v_mov_b32_e32 v0, 0
s_load_b64 s[0:1], s[0:1], 0x10
s_lshl_b64 s[2:3], s[2:3], 2
ds_load_b32 v1, v0
s_waitcnt lgkmcnt(0)
s_add_u32 s0, s0, s2
s_addc_u32 s1, s1, s3
global_store_b32 v0, v1, s[0:1]
.LBB0_7:
s_nop 0
s_sendmsg sendmsg(MSG_DEALLOC_VGPRS)
s_endpgm
.p2align 6
.LBB0_8:
s_or_b32 exec_lo, exec_lo, s5
s_cmp_gt_u32 s3, 3
s_mov_b32 s3, s4
s_cbranch_scc0 .LBB0_5
.LBB0_9:
s_lshr_b32 s4, s3, 1
s_mov_b32 s5, exec_lo
v_cmpx_gt_u32_e64 s4, v0
s_cbranch_execz .LBB0_8
v_add_lshl_u32 v2, s4, v0, 2
ds_load_b32 v2, v2
ds_load_b32 v3, v1
s_waitcnt lgkmcnt(0)
v_add_f32_e32 v2, v2, v3
ds_store_b32 v1, v2
s_waitcnt lgkmcnt(0)
s_barrier
buffer_gl0_inv
s_branch .LBB0_8
.section .rodata,"a",@progbits
.p2align 6, 0x0
.amdhsa_kernel _Z3dotPfS_S_
.amdhsa_group_segment_fixed_size 1024
.amdhsa_private_segment_fixed_size 0
.amdhsa_kernarg_size 280
.amdhsa_user_sgpr_count 15
.amdhsa_user_sgpr_dispatch_ptr 0
.amdhsa_user_sgpr_queue_ptr 0
.amdhsa_user_sgpr_kernarg_segment_ptr 1
.amdhsa_user_sgpr_dispatch_id 0
.amdhsa_user_sgpr_private_segment_size 0
.amdhsa_wavefront_size32 1
.amdhsa_uses_dynamic_stack 0
.amdhsa_enable_private_segment 0
.amdhsa_system_sgpr_workgroup_id_x 1
.amdhsa_system_sgpr_workgroup_id_y 0
.amdhsa_system_sgpr_workgroup_id_z 0
.amdhsa_system_sgpr_workgroup_info 0
.amdhsa_system_vgpr_workitem_id 0
.amdhsa_next_free_vgpr 8
.amdhsa_next_free_sgpr 16
.amdhsa_float_round_mode_32 0
.amdhsa_float_round_mode_16_64 0
.amdhsa_float_denorm_mode_32 3
.amdhsa_float_denorm_mode_16_64 3
.amdhsa_dx10_clamp 1
.amdhsa_ieee_mode 1
.amdhsa_fp16_overflow 0
.amdhsa_workgroup_processor_mode 1
.amdhsa_memory_ordered 1
.amdhsa_forward_progress 0
.amdhsa_shared_vgpr_count 0
.amdhsa_exception_fp_ieee_invalid_op 0
.amdhsa_exception_fp_denorm_src 0
.amdhsa_exception_fp_ieee_div_zero 0
.amdhsa_exception_fp_ieee_overflow 0
.amdhsa_exception_fp_ieee_underflow 0
.amdhsa_exception_fp_ieee_inexact 0
.amdhsa_exception_int_div_zero 0
.end_amdhsa_kernel
.text
.Lfunc_end0:
.size _Z3dotPfS_S_, .Lfunc_end0-_Z3dotPfS_S_
.section .AMDGPU.csdata,"",@progbits
.text
.p2alignl 7, 3214868480
.fill 96, 4, 3214868480
.type __hip_cuid_,@object
.section .bss,"aw",@nobits
.globl __hip_cuid_
__hip_cuid_:
.byte 0
.size __hip_cuid_, 1
.ident "AMD clang version 18.0.0git (https://github.com/RadeonOpenCompute/llvm-project roc-6.3.2 25012 e5bf7e55c91490b07c49d8960fa7983d864936c4)"
.section ".note.GNU-stack","",@progbits
.addrsig
.addrsig_sym __hip_cuid_
.amdgpu_metadata
---
amdhsa.kernels:
- .args:
- .address_space: global
.offset: 0
.size: 8
.value_kind: global_buffer
- .address_space: global
.offset: 8
.size: 8
.value_kind: global_buffer
- .address_space: global
.offset: 16
.size: 8
.value_kind: global_buffer
- .offset: 24
.size: 4
.value_kind: hidden_block_count_x
- .offset: 28
.size: 4
.value_kind: hidden_block_count_y
- .offset: 32
.size: 4
.value_kind: hidden_block_count_z
- .offset: 36
.size: 2
.value_kind: hidden_group_size_x
- .offset: 38
.size: 2
.value_kind: hidden_group_size_y
- .offset: 40
.size: 2
.value_kind: hidden_group_size_z
- .offset: 42
.size: 2
.value_kind: hidden_remainder_x
- .offset: 44
.size: 2
.value_kind: hidden_remainder_y
- .offset: 46
.size: 2
.value_kind: hidden_remainder_z
- .offset: 64
.size: 8
.value_kind: hidden_global_offset_x
- .offset: 72
.size: 8
.value_kind: hidden_global_offset_y
- .offset: 80
.size: 8
.value_kind: hidden_global_offset_z
- .offset: 88
.size: 2
.value_kind: hidden_grid_dims
.group_segment_fixed_size: 1024
.kernarg_segment_align: 8
.kernarg_segment_size: 280
.language: OpenCL C
.language_version:
- 2
- 0
.max_flat_workgroup_size: 1024
.name: _Z3dotPfS_S_
.private_segment_fixed_size: 0
.sgpr_count: 18
.sgpr_spill_count: 0
.symbol: _Z3dotPfS_S_.kd
.uniform_work_group_size: 1
.uses_dynamic_stack: false
.vgpr_count: 8
.vgpr_spill_count: 0
.wavefront_size: 32
.workgroup_processor_mode: 1
amdhsa.target: amdgcn-amd-amdhsa--gfx1100
amdhsa.version:
- 1
- 2
...
.end_amdgpu_metadata |
You are a helpful coding assistant specialized in converting from CUDA host assembly to AMD host assembly. | .file "tmpxft_0015727d_00000000-6_File6_Dot_SharedMemory.cudafe1.cpp"
.text
#APP
.globl _ZSt21ios_base_library_initv
#NO_APP
.type _ZL26__cudaUnregisterBinaryUtilv, @function
_ZL26__cudaUnregisterBinaryUtilv:
.LFB3672:
.cfi_startproc
endbr64
subq $8, %rsp
.cfi_def_cfa_offset 16
movq _ZL20__cudaFatCubinHandle(%rip), %rdi
call __cudaUnregisterFatBinary@PLT
addq $8, %rsp
.cfi_def_cfa_offset 8
ret
.cfi_endproc
.LFE3672:
.size _ZL26__cudaUnregisterBinaryUtilv, .-_ZL26__cudaUnregisterBinaryUtilv
.globl _Z26__device_stub__Z3dotPfS_S_PfS_S_
.type _Z26__device_stub__Z3dotPfS_S_PfS_S_, @function
_Z26__device_stub__Z3dotPfS_S_PfS_S_:
.LFB3694:
.cfi_startproc
endbr64
subq $136, %rsp
.cfi_def_cfa_offset 144
movq %rdi, 24(%rsp)
movq %rsi, 16(%rsp)
movq %rdx, 8(%rsp)
movq %fs:40, %rax
movq %rax, 120(%rsp)
xorl %eax, %eax
leaq 24(%rsp), %rax
movq %rax, 96(%rsp)
leaq 16(%rsp), %rax
movq %rax, 104(%rsp)
leaq 8(%rsp), %rax
movq %rax, 112(%rsp)
movl $1, 48(%rsp)
movl $1, 52(%rsp)
movl $1, 56(%rsp)
movl $1, 60(%rsp)
movl $1, 64(%rsp)
movl $1, 68(%rsp)
leaq 40(%rsp), %rcx
leaq 32(%rsp), %rdx
leaq 60(%rsp), %rsi
leaq 48(%rsp), %rdi
call __cudaPopCallConfiguration@PLT
testl %eax, %eax
je .L7
.L3:
movq 120(%rsp), %rax
subq %fs:40, %rax
jne .L8
addq $136, %rsp
.cfi_remember_state
.cfi_def_cfa_offset 8
ret
.L7:
.cfi_restore_state
pushq 40(%rsp)
.cfi_def_cfa_offset 152
pushq 40(%rsp)
.cfi_def_cfa_offset 160
leaq 112(%rsp), %r9
movq 76(%rsp), %rcx
movl 84(%rsp), %r8d
movq 64(%rsp), %rsi
movl 72(%rsp), %edx
leaq _Z3dotPfS_S_(%rip), %rdi
call cudaLaunchKernel@PLT
addq $16, %rsp
.cfi_def_cfa_offset 144
jmp .L3
.L8:
call __stack_chk_fail@PLT
.cfi_endproc
.LFE3694:
.size _Z26__device_stub__Z3dotPfS_S_PfS_S_, .-_Z26__device_stub__Z3dotPfS_S_PfS_S_
.globl _Z3dotPfS_S_
.type _Z3dotPfS_S_, @function
_Z3dotPfS_S_:
.LFB3695:
.cfi_startproc
endbr64
subq $8, %rsp
.cfi_def_cfa_offset 16
call _Z26__device_stub__Z3dotPfS_S_PfS_S_
addq $8, %rsp
.cfi_def_cfa_offset 8
ret
.cfi_endproc
.LFE3695:
.size _Z3dotPfS_S_, .-_Z3dotPfS_S_
.section .rodata.str1.1,"aMS",@progbits,1
.LC2:
.string "Does GPU value %.6g = %.6g?\n"
.text
.globl main
.type main, @function
main:
.LFB3669:
.cfi_startproc
endbr64
pushq %r12
.cfi_def_cfa_offset 16
.cfi_offset 12, -16
pushq %rbp
.cfi_def_cfa_offset 24
.cfi_offset 6, -24
pushq %rbx
.cfi_def_cfa_offset 32
.cfi_offset 3, -32
subq $64, %rsp
.cfi_def_cfa_offset 96
movq %fs:40, %rax
movq %rax, 56(%rsp)
xorl %eax, %eax
movl $135168, %edi
call malloc@PLT
movq %rax, %rbp
movl $135168, %edi
call malloc@PLT
movq %rax, %rbx
movl $128, %edi
call malloc@PLT
movq %rax, %r12
leaq 8(%rsp), %rdi
movl $135168, %esi
call cudaMalloc@PLT
leaq 16(%rsp), %rdi
movl $135168, %esi
call cudaMalloc@PLT
leaq 24(%rsp), %rdi
movl $128, %esi
call cudaMalloc@PLT
movl $0, %eax
.L12:
pxor %xmm0, %xmm0
cvtsi2ssl %eax, %xmm0
movss %xmm0, 0(%rbp,%rax,4)
leal (%rax,%rax), %edx
pxor %xmm0, %xmm0
cvtsi2ssl %edx, %xmm0
movss %xmm0, (%rbx,%rax,4)
addq $1, %rax
cmpq $33792, %rax
jne .L12
movl $1, %ecx
movl $135168, %edx
movq %rbp, %rsi
movq 8(%rsp), %rdi
call cudaMemcpy@PLT
movl $1, %ecx
movl $135168, %edx
movq %rbx, %rsi
movq 16(%rsp), %rdi
call cudaMemcpy@PLT
movl $256, 44(%rsp)
movl $1, 48(%rsp)
movl $32, 32(%rsp)
movl $1, 36(%rsp)
movl $0, %r9d
movl $0, %r8d
movq 44(%rsp), %rdx
movl $1, %ecx
movq 32(%rsp), %rdi
movl $1, %esi
call __cudaPushCallConfiguration@PLT
testl %eax, %eax
je .L19
.L13:
movl $2, %ecx
movl $128, %edx
movq 24(%rsp), %rsi
movq %r12, %rdi
call cudaMemcpy@PLT
movq %r12, %rax
leaq 128(%r12), %rdx
pxor %xmm0, %xmm0
.L14:
addss (%rax), %xmm0
addq $4, %rax
cmpq %rdx, %rax
jne .L14
cvtss2sd %xmm0, %xmm0
movsd .LC1(%rip), %xmm1
leaq .LC2(%rip), %rsi
movl $2, %edi
movl $2, %eax
call __printf_chk@PLT
movq 8(%rsp), %rdi
call cudaFree@PLT
movq 16(%rsp), %rdi
call cudaFree@PLT
movq 24(%rsp), %rdi
call cudaFree@PLT
movq %rbp, %rdi
call free@PLT
movq %rbx, %rdi
call free@PLT
movq %r12, %rdi
call free@PLT
movq 56(%rsp), %rax
subq %fs:40, %rax
jne .L20
movl $0, %eax
addq $64, %rsp
.cfi_remember_state
.cfi_def_cfa_offset 32
popq %rbx
.cfi_def_cfa_offset 24
popq %rbp
.cfi_def_cfa_offset 16
popq %r12
.cfi_def_cfa_offset 8
ret
.L19:
.cfi_restore_state
movq 24(%rsp), %rdx
movq 16(%rsp), %rsi
movq 8(%rsp), %rdi
call _Z26__device_stub__Z3dotPfS_S_PfS_S_
jmp .L13
.L20:
call __stack_chk_fail@PLT
.cfi_endproc
.LFE3669:
.size main, .-main
.section .rodata.str1.1
.LC3:
.string "_Z3dotPfS_S_"
.text
.type _ZL24__sti____cudaRegisterAllv, @function
_ZL24__sti____cudaRegisterAllv:
.LFB3697:
.cfi_startproc
endbr64
subq $8, %rsp
.cfi_def_cfa_offset 16
leaq _ZL15__fatDeviceText(%rip), %rdi
call __cudaRegisterFatBinary@PLT
movq %rax, %rdi
movq %rax, _ZL20__cudaFatCubinHandle(%rip)
pushq $0
.cfi_def_cfa_offset 24
pushq $0
.cfi_def_cfa_offset 32
pushq $0
.cfi_def_cfa_offset 40
pushq $0
.cfi_def_cfa_offset 48
movl $0, %r9d
movl $-1, %r8d
leaq .LC3(%rip), %rdx
movq %rdx, %rcx
leaq _Z3dotPfS_S_(%rip), %rsi
call __cudaRegisterFunction@PLT
addq $32, %rsp
.cfi_def_cfa_offset 16
movq _ZL20__cudaFatCubinHandle(%rip), %rdi
call __cudaRegisterFatBinaryEnd@PLT
leaq _ZL26__cudaUnregisterBinaryUtilv(%rip), %rdi
call atexit@PLT
addq $8, %rsp
.cfi_def_cfa_offset 8
ret
.cfi_endproc
.LFE3697:
.size _ZL24__sti____cudaRegisterAllv, .-_ZL24__sti____cudaRegisterAllv
.section .init_array,"aw"
.align 8
.quad _ZL24__sti____cudaRegisterAllv
.section .nvFatBinSegment,"aw"
.align 8
.type _ZL15__fatDeviceText, @object
.size _ZL15__fatDeviceText, 24
_ZL15__fatDeviceText:
.long 1180844977
.long 1
.quad fatbinData
.quad 0
.local _ZL20__cudaFatCubinHandle
.comm _ZL20__cudaFatCubinHandle,8,8
.section .rodata.cst8,"aM",@progbits,8
.align 8
.LC1:
.long 0
.long 1118266684
.ident "GCC: (Ubuntu 13.3.0-6ubuntu2~24.04) 13.3.0"
.section .note.GNU-stack,"",@progbits
.section .note.gnu.property,"a"
.align 8
.long 1f - 0f
.long 4f - 1f
.long 5
0:
.string "GNU"
1:
.align 8
.long 0xc0000002
.long 3f - 2f
2:
.long 0x3
3:
.align 8
4: | .text
.file "File6_Dot_SharedMemory.hip"
# Start of file scope inline assembly
.globl _ZSt21ios_base_library_initv
# End of file scope inline assembly
.globl _Z18__device_stub__dotPfS_S_ # -- Begin function _Z18__device_stub__dotPfS_S_
.p2align 4, 0x90
.type _Z18__device_stub__dotPfS_S_,@function
_Z18__device_stub__dotPfS_S_: # @_Z18__device_stub__dotPfS_S_
.cfi_startproc
# %bb.0:
subq $104, %rsp
.cfi_def_cfa_offset 112
movq %rdi, 72(%rsp)
movq %rsi, 64(%rsp)
movq %rdx, 56(%rsp)
leaq 72(%rsp), %rax
movq %rax, 80(%rsp)
leaq 64(%rsp), %rax
movq %rax, 88(%rsp)
leaq 56(%rsp), %rax
movq %rax, 96(%rsp)
leaq 40(%rsp), %rdi
leaq 24(%rsp), %rsi
leaq 16(%rsp), %rdx
leaq 8(%rsp), %rcx
callq __hipPopCallConfiguration
movq 40(%rsp), %rsi
movl 48(%rsp), %edx
movq 24(%rsp), %rcx
movl 32(%rsp), %r8d
leaq 80(%rsp), %r9
movl $_Z3dotPfS_S_, %edi
pushq 8(%rsp)
.cfi_adjust_cfa_offset 8
pushq 24(%rsp)
.cfi_adjust_cfa_offset 8
callq hipLaunchKernel
addq $120, %rsp
.cfi_adjust_cfa_offset -120
retq
.Lfunc_end0:
.size _Z18__device_stub__dotPfS_S_, .Lfunc_end0-_Z18__device_stub__dotPfS_S_
.cfi_endproc
# -- End function
.section .rodata.cst8,"aM",@progbits,8
.p2align 3, 0x0 # -- Begin function main
.LCPI1_0:
.quad 0x42a7653c00000000 # double 12861782884352
.text
.globl main
.p2align 4, 0x90
.type main,@function
main: # @main
.cfi_startproc
# %bb.0:
pushq %r15
.cfi_def_cfa_offset 16
pushq %r14
.cfi_def_cfa_offset 24
pushq %rbx
.cfi_def_cfa_offset 32
subq $128, %rsp
.cfi_def_cfa_offset 160
.cfi_offset %rbx, -32
.cfi_offset %r14, -24
.cfi_offset %r15, -16
movl $135168, %edi # imm = 0x21000
callq malloc
movq %rax, %rbx
movl $135168, %edi # imm = 0x21000
callq malloc
movq %rax, %r14
movl $128, %edi
callq malloc
movq %rax, %r15
leaq 16(%rsp), %rdi
movl $135168, %esi # imm = 0x21000
callq hipMalloc
leaq 8(%rsp), %rdi
movl $135168, %esi # imm = 0x21000
callq hipMalloc
movq %rsp, %rdi
movl $128, %esi
callq hipMalloc
xorl %eax, %eax
xorl %ecx, %ecx
.p2align 4, 0x90
.LBB1_1: # =>This Inner Loop Header: Depth=1
xorps %xmm0, %xmm0
cvtsi2ss %ecx, %xmm0
movss %xmm0, (%rbx,%rcx,4)
xorps %xmm0, %xmm0
cvtsi2ss %eax, %xmm0
movss %xmm0, (%r14,%rcx,4)
incq %rcx
addl $2, %eax
cmpq $33792, %rcx # imm = 0x8400
jne .LBB1_1
# %bb.2:
movq 16(%rsp), %rdi
movl $135168, %edx # imm = 0x21000
movq %rbx, %rsi
movl $1, %ecx
callq hipMemcpy
movq 8(%rsp), %rdi
movl $135168, %edx # imm = 0x21000
movq %r14, %rsi
movl $1, %ecx
callq hipMemcpy
movabsq $4294967328, %rdi # imm = 0x100000020
leaq 224(%rdi), %rdx
movl $1, %esi
movl $1, %ecx
xorl %r8d, %r8d
xorl %r9d, %r9d
callq __hipPushCallConfiguration
testl %eax, %eax
jne .LBB1_4
# %bb.3:
movq 16(%rsp), %rax
movq 8(%rsp), %rcx
movq (%rsp), %rdx
movq %rax, 88(%rsp)
movq %rcx, 80(%rsp)
movq %rdx, 72(%rsp)
leaq 88(%rsp), %rax
movq %rax, 96(%rsp)
leaq 80(%rsp), %rax
movq %rax, 104(%rsp)
leaq 72(%rsp), %rax
movq %rax, 112(%rsp)
leaq 56(%rsp), %rdi
leaq 40(%rsp), %rsi
leaq 32(%rsp), %rdx
leaq 24(%rsp), %rcx
callq __hipPopCallConfiguration
movq 56(%rsp), %rsi
movl 64(%rsp), %edx
movq 40(%rsp), %rcx
movl 48(%rsp), %r8d
leaq 96(%rsp), %r9
movl $_Z3dotPfS_S_, %edi
pushq 24(%rsp)
.cfi_adjust_cfa_offset 8
pushq 40(%rsp)
.cfi_adjust_cfa_offset 8
callq hipLaunchKernel
addq $16, %rsp
.cfi_adjust_cfa_offset -16
.LBB1_4:
movq (%rsp), %rsi
movl $128, %edx
movq %r15, %rdi
movl $2, %ecx
callq hipMemcpy
xorps %xmm0, %xmm0
xorl %eax, %eax
.p2align 4, 0x90
.LBB1_5: # =>This Inner Loop Header: Depth=1
addss (%r15,%rax,4), %xmm0
incq %rax
cmpq $32, %rax
jne .LBB1_5
# %bb.6:
cvtss2sd %xmm0, %xmm0
movsd .LCPI1_0(%rip), %xmm1 # xmm1 = mem[0],zero
movl $.L.str, %edi
movb $2, %al
callq printf
movq 16(%rsp), %rdi
callq hipFree
movq 8(%rsp), %rdi
callq hipFree
movq (%rsp), %rdi
callq hipFree
movq %rbx, %rdi
callq free
movq %r14, %rdi
callq free
movq %r15, %rdi
callq free
xorl %eax, %eax
addq $128, %rsp
.cfi_def_cfa_offset 32
popq %rbx
.cfi_def_cfa_offset 24
popq %r14
.cfi_def_cfa_offset 16
popq %r15
.cfi_def_cfa_offset 8
retq
.Lfunc_end1:
.size main, .Lfunc_end1-main
.cfi_endproc
# -- End function
.p2align 4, 0x90 # -- Begin function __hip_module_ctor
.type __hip_module_ctor,@function
__hip_module_ctor: # @__hip_module_ctor
.cfi_startproc
# %bb.0:
subq $40, %rsp
.cfi_def_cfa_offset 48
cmpq $0, __hip_gpubin_handle(%rip)
jne .LBB2_2
# %bb.1:
movl $__hip_fatbin_wrapper, %edi
callq __hipRegisterFatBinary
movq %rax, __hip_gpubin_handle(%rip)
.LBB2_2:
movq __hip_gpubin_handle(%rip), %rdi
xorps %xmm0, %xmm0
movups %xmm0, 16(%rsp)
movups %xmm0, (%rsp)
movl $_Z3dotPfS_S_, %esi
movl $.L__unnamed_1, %edx
movl $.L__unnamed_1, %ecx
movl $-1, %r8d
xorl %r9d, %r9d
callq __hipRegisterFunction
movl $__hip_module_dtor, %edi
addq $40, %rsp
.cfi_def_cfa_offset 8
jmp atexit # TAILCALL
.Lfunc_end2:
.size __hip_module_ctor, .Lfunc_end2-__hip_module_ctor
.cfi_endproc
# -- End function
.p2align 4, 0x90 # -- Begin function __hip_module_dtor
.type __hip_module_dtor,@function
__hip_module_dtor: # @__hip_module_dtor
.cfi_startproc
# %bb.0:
movq __hip_gpubin_handle(%rip), %rdi
testq %rdi, %rdi
je .LBB3_2
# %bb.1:
pushq %rax
.cfi_def_cfa_offset 16
callq __hipUnregisterFatBinary
movq $0, __hip_gpubin_handle(%rip)
addq $8, %rsp
.cfi_def_cfa_offset 8
.LBB3_2:
retq
.Lfunc_end3:
.size __hip_module_dtor, .Lfunc_end3-__hip_module_dtor
.cfi_endproc
# -- End function
.type _Z3dotPfS_S_,@object # @_Z3dotPfS_S_
.section .rodata,"a",@progbits
.globl _Z3dotPfS_S_
.p2align 3, 0x0
_Z3dotPfS_S_:
.quad _Z18__device_stub__dotPfS_S_
.size _Z3dotPfS_S_, 8
.type .L.str,@object # @.str
.section .rodata.str1.1,"aMS",@progbits,1
.L.str:
.asciz "Does GPU value %.6g = %.6g?\n"
.size .L.str, 29
.type .L__unnamed_1,@object # @0
.L__unnamed_1:
.asciz "_Z3dotPfS_S_"
.size .L__unnamed_1, 13
.type __hip_fatbin_wrapper,@object # @__hip_fatbin_wrapper
.section .hipFatBinSegment,"a",@progbits
.p2align 3, 0x0
__hip_fatbin_wrapper:
.long 1212764230 # 0x48495046
.long 1 # 0x1
.quad __hip_fatbin
.quad 0
.size __hip_fatbin_wrapper, 24
.type __hip_gpubin_handle,@object # @__hip_gpubin_handle
.local __hip_gpubin_handle
.comm __hip_gpubin_handle,8,8
.section .init_array,"aw",@init_array
.p2align 3, 0x0
.quad __hip_module_ctor
.type __hip_cuid_,@object # @__hip_cuid_
.bss
.globl __hip_cuid_
__hip_cuid_:
.byte 0 # 0x0
.size __hip_cuid_, 1
.section ".linker-options","e",@llvm_linker_options
.ident "AMD clang version 18.0.0git (https://github.com/RadeonOpenCompute/llvm-project roc-6.3.2 25012 e5bf7e55c91490b07c49d8960fa7983d864936c4)"
.section ".note.GNU-stack","",@progbits
.addrsig
.addrsig_sym _Z18__device_stub__dotPfS_S_
.addrsig_sym __hip_module_ctor
.addrsig_sym __hip_module_dtor
.addrsig_sym _Z3dotPfS_S_
.addrsig_sym __hip_fatbin
.addrsig_sym __hip_fatbin_wrapper
.addrsig_sym __hip_cuid_ |
You are a helpful coding assistant specialized in converting CUDA source code to CUDA device assembly. | // CUDA runtime
#include <cuda_runtime.h>
#include"device_launch_parameters.h"
#include <stdio.h>
__global__ void cudaKernel(float* visHist, int* rawHistogramRay, float* devOtf, int K, int B, int D)
{
//int i = blockDim.x * blockIdx.x + threadIdx.x;
int id = blockIdx.x;
float localVisHist[128];
int base = id * D * B;
int slcSample = 0;
for( int d = 0; d < D; d++ ){
for( int b = 0; b < B; b++ ){
localVisHist[b] += rawHistogramRay[base + d * D + b];
}
}
}
extern "C" double runCudaKernel( float* visHist, int K, int D, int B, float* otf, int* rawHistogramRays )
{
FILE* fp = fopen( "output.txt", "w" );
float* devVisHist = 0;
float* devOtf = 0;
int* devRawHistogramRay = 0;
cudaError_t cudaStatus;
//Choose which GPU to run on, change this on a multi-GPU system.
cudaStatus= cudaSetDevice(0);
if(cudaStatus != cudaSuccess) {
fprintf(fp,"cudaSetDevice failed! Do you havea CUDA-capable GPU installed?");
goto Error;
}
//Allocate GPU buffers for three vectors (two input, one output) .
cudaStatus= cudaMalloc((void**)&devVisHist, B * sizeof(float));
if(cudaStatus != cudaSuccess) {
fprintf(fp,"cudaMalloc failed!");
goto Error;
}
cudaStatus= cudaMalloc((void**)&devOtf, B * sizeof(float));
if(cudaStatus != cudaSuccess) {
fprintf(fp,"cudaMalloc failed!");
goto Error;
}
cudaStatus= cudaMalloc((void**)&devRawHistogramRay, K * B * D * sizeof(int));
if(cudaStatus != cudaSuccess) {
fprintf(fp,"cudaMalloc failed!");
goto Error;
}
//Copy input vectors from host memory to GPU buffers.
cudaStatus= cudaMemcpy( devRawHistogramRay, rawHistogramRays, K * B * D * sizeof(int), cudaMemcpyHostToDevice);
if(cudaStatus != cudaSuccess) {
fprintf(fp,"cudaMemcpy failed!");
goto Error;
}
cudaStatus= cudaMemcpy(devOtf, otf, B * sizeof(float), cudaMemcpyHostToDevice);
if(cudaStatus != cudaSuccess) {
fprintf(fp,"cudaMemcpy failed!");
goto Error;
}
//Launch a kernel on the GPU with one thread for each element.
fprintf( fp, "before kernel\n " );fflush( fp );
cudaKernel<<<K,1>>>(devVisHist, devRawHistogramRay, devOtf, K, B, D);
fprintf( fp, "after kernel\n " );fflush( fp );
//Check for any errors launching the kernel
cudaStatus= cudaGetLastError();
if(cudaStatus != cudaSuccess) {
fprintf(fp,"addKernel launch failed: %s\n", cudaGetErrorString(cudaStatus));
goto Error;
}
//cudaDeviceSynchronize waits for the kernel to finish, and returns
//any errors encountered during the launch.
cudaStatus= cudaDeviceSynchronize();
if(cudaStatus != cudaSuccess) {
fprintf(fp,"cudaDeviceSynchronize returned error code %d after launchingaddKernel!\n", cudaStatus);
goto Error;
}
//Copy output vector from GPU buffer to host memory.
cudaStatus= cudaMemcpy(visHist, devVisHist, B * sizeof(float), cudaMemcpyDeviceToHost);
if(cudaStatus != cudaSuccess) {
fprintf(fp,"cudaMemcpy failed!");
goto Error;
}
//output result
fprintf( fp, "before output\n " );fflush( fp );
for( int i=0; i<B; i++ ){
fprintf(fp, "%d : %f \n", i, visHist[i]);
}
fprintf( fp, "after output\n " );fflush( fp );
Error:
cudaFree(devRawHistogramRay);
cudaFree(devVisHist);
cudaFree(devOtf);
if(cudaStatus != cudaSuccess) {
fprintf(stderr,"addWithCuda failed!");
return 1;
}
} | code for sm_80
Function : _Z10cudaKernelPfPiS_iii
.headerflags @"EF_CUDA_TEXMODE_UNIFIED EF_CUDA_64BIT_ADDRESS EF_CUDA_SM80 EF_CUDA_VIRTUAL_SM(EF_CUDA_SM80)"
/*0000*/ MOV R1, c[0x0][0x28] ; /* 0x00000a0000017a02 */
/* 0x000fc60000000f00 */
/*0010*/ IMAD.MOV.U32 R0, RZ, RZ, 0x1 ; /* 0x00000001ff007424 */
/* 0x000fe200078e00ff */
/*0020*/ IADD3 R1, R1, -0x200, RZ ; /* 0xfffffe0001017810 */
/* 0x000fc80007ffe0ff */
/*0030*/ ISETP.LE.AND P0, PT, R0, c[0x0][0x17c], PT ; /* 0x00005f0000007a0c */
/* 0x000fc80003f03270 */
/*0040*/ ISETP.GT.OR P0, PT, R0, c[0x0][0x180], !P0 ; /* 0x0000600000007a0c */
/* 0x000fda0004704670 */
/*0050*/ @P0 EXIT ; /* 0x000000000000094d */
/* 0x000fea0003800000 */
/*0060*/ S2R R2, SR_CTAID.X ; /* 0x0000000000027919 */
/* 0x000e220000002500 */
/*0070*/ HFMA2.MMA R0, -RZ, RZ, 0, 5.9604644775390625e-08 ; /* 0x00000001ff007435 */
/* 0x000fe200000001ff */
/*0080*/ IMAD.MOV.U32 R20, RZ, RZ, c[0x0][0x17c] ; /* 0x00005f00ff147624 */
/* 0x000fe200078e00ff */
/*0090*/ MOV R19, RZ ; /* 0x000000ff00137202 */
/* 0x000fe20000000f00 */
/*00a0*/ ULDC.64 UR4, c[0x0][0x118] ; /* 0x0000460000047ab9 */
/* 0x000fc60000000a00 */
/*00b0*/ LOP3.LUT R20, R20, 0x3, RZ, 0xc0, !PT ; /* 0x0000000314147812 */
/* 0x000fc800078ec0ff */
/*00c0*/ IADD3 R0, -R0, c[0x0][0x17c], RZ ; /* 0x00005f0000007a10 */
/* 0x000fe40007ffe1ff */
/*00d0*/ IADD3 R18, -R20, c[0x0][0x17c], RZ ; /* 0x00005f0014127a10 */
/* 0x000fe40007ffe1ff */
/*00e0*/ ISETP.GE.U32.AND P1, PT, R0, 0x3, PT ; /* 0x000000030000780c */
/* 0x000fce0003f26070 */
/*00f0*/ IMAD R16, R2, c[0x0][0x17c], R19 ; /* 0x00005f0002107a24 */
/* 0x001fe200078e0213 */
/*0100*/ IADD3 R19, R19, 0x1, RZ ; /* 0x0000000113137810 */
/* 0x000fe20007ffe0ff */
/*0110*/ IMAD.MOV.U32 R17, RZ, RZ, RZ ; /* 0x000000ffff117224 */
/* 0x000fe400078e00ff */
/*0120*/ IMAD R16, R16, c[0x0][0x180], RZ ; /* 0x0000600010107a24 */
/* 0x000fe200078e02ff */
/*0130*/ ISETP.GE.AND P2, PT, R19, c[0x0][0x180], PT ; /* 0x0000600013007a0c */
/* 0x000fe20003f46270 */
/*0140*/ @!P1 BRA 0x9a0 ; /* 0x0000085000009947 */
/* 0x000fea0003800000 */
/*0150*/ ISETP.GT.AND P0, PT, R18, RZ, PT ; /* 0x000000ff1200720c */
/* 0x000fe20003f04270 */
/*0160*/ HFMA2.MMA R23, -RZ, RZ, 0, 2.384185791015625e-07 ; /* 0x00000004ff177435 */
/* 0x000fe200000001ff */
/*0170*/ IMAD.MOV.U32 R17, RZ, RZ, RZ ; /* 0x000000ffff117224 */
/* 0x000fe200078e00ff */
/*0180*/ MOV R0, R1 ; /* 0x0000000100007202 */
/* 0x000fe20000000f00 */
/*0190*/ IMAD.MOV.U32 R3, RZ, RZ, R18 ; /* 0x000000ffff037224 */
/* 0x000fce00078e0012 */
/*01a0*/ IMAD.WIDE R22, R16, R23, c[0x0][0x168] ; /* 0x00005a0010167625 */
/* 0x000fe400078e0217 */
/*01b0*/ @!P0 BRA 0x850 ; /* 0x0000069000008947 */
/* 0x000fea0003800000 */
/*01c0*/ ISETP.GT.AND P3, PT, R3, 0xc, PT ; /* 0x0000000c0300780c */
/* 0x000fe40003f64270 */
/*01d0*/ PLOP3.LUT P0, PT, PT, PT, PT, 0x80, 0x0 ; /* 0x000000000000781c */
/* 0x000fd60003f0f070 */
/*01e0*/ @!P3 BRA 0x5f0 ; /* 0x000004000000b947 */
/* 0x000fea0003800000 */
/*01f0*/ PLOP3.LUT P0, PT, PT, PT, PT, 0x8, 0x0 ; /* 0x000000000000781c */
/* 0x000fe40003f0e170 */
/*0200*/ LDG.E.CONSTANT R12, [R22.64+0xc] ; /* 0x00000c04160c7981 */
/* 0x000ea8000c1e9900 */
/*0210*/ LDG.E.CONSTANT R28, [R22.64+0x4] ; /* 0x00000404161c7981 */
/* 0x000ee8000c1e9900 */
/*0220*/ LDG.E.CONSTANT R21, [R22.64] ; /* 0x0000000416157981 */
/* 0x000f28000c1e9900 */
/*0230*/ LDG.E.CONSTANT R29, [R22.64+0x8] ; /* 0x00000804161d7981 */
/* 0x000f68000c1e9900 */
/*0240*/ LDL.128 R4, [R0] ; /* 0x0000000000047983 */
/* 0x000f280000100c00 */
/*0250*/ LDG.E.CONSTANT R25, [R22.64+0x10] ; /* 0x0000100416197981 */
/* 0x000f68000c1e9900 */
/*0260*/ LDL.128 R8, [R0+0x10] ; /* 0x0000100000087983 */
/* 0x000f680000100c00 */
/*0270*/ LDG.E.CONSTANT R24, [R22.64+0x14] ; /* 0x0000140416187981 */
/* 0x000f68000c1e9900 */
/*0280*/ LDG.E.CONSTANT R27, [R22.64+0x18] ; /* 0x00001804161b7981 */
/* 0x000f62000c1e9900 */
/*0290*/ I2F R26, R12 ; /* 0x0000000c001a7306 */
/* 0x004e300000201400 */
/*02a0*/ I2F R28, R28 ; /* 0x0000001c001c7306 */
/* 0x008e700000201400 */
/*02b0*/ I2F R21, R21 ; /* 0x0000001500157306 */
/* 0x010ea20000201400 */
/*02c0*/ FADD R15, R7, R26 ; /* 0x0000001a070f7221 */
/* 0x001fc40000000000 */
/*02d0*/ LDG.E.CONSTANT R26, [R22.64+0x1c] ; /* 0x00001c04161a7981 */
/* 0x000eea000c1e9900 */
/*02e0*/ I2F R29, R29 ; /* 0x0000001d001d7306 */
/* 0x020e220000201400 */
/*02f0*/ FADD R13, R5, R28 ; /* 0x0000001c050d7221 */
/* 0x002fe40000000000 */
/*0300*/ LDG.E.CONSTANT R28, [R22.64+0x28] ; /* 0x00002804161c7981 */
/* 0x000f22000c1e9900 */
/*0310*/ FADD R12, R21, R4 ; /* 0x00000004150c7221 */
/* 0x004fc80000000000 */
/*0320*/ I2F R5, R25 ; /* 0x0000001900057306 */
/* 0x0002a20000201400 */
/*0330*/ LDG.E.CONSTANT R21, [R22.64+0x20] ; /* 0x0000200416157981 */
/* 0x000f62000c1e9900 */
/*0340*/ FADD R14, R6, R29 ; /* 0x0000001d060e7221 */
/* 0x001fc60000000000 */
/*0350*/ LDG.E.CONSTANT R29, [R22.64+0x24] ; /* 0x00002404161d7981 */
/* 0x000f68000c1e9900 */
/*0360*/ LDG.E.CONSTANT R25, [R22.64+0x2c] ; /* 0x00002c0416197981 */
/* 0x002f62000c1e9900 */
/*0370*/ FADD R8, R5, R8 ; /* 0x0000000805087221 */
/* 0x004fc60000000000 */
/*0380*/ LDL.128 R4, [R0+0x20] ; /* 0x0000200000047983 */
/* 0x000ea20000100c00 */
/*0390*/ I2F R24, R24 ; /* 0x0000001800187306 */
/* 0x000e300000201400 */
/*03a0*/ I2F R27, R27 ; /* 0x0000001b001b7306 */
/* 0x000e620000201400 */
/*03b0*/ STL.128 [R0], R12 ; /* 0x0000000c00007387 */
/* 0x0009e20000100c00 */
/*03c0*/ FADD R9, R9, R24 ; /* 0x0000001809097221 */
/* 0x001fc60000000000 */
/*03d0*/ LDG.E.CONSTANT R24, [R22.64+0x3c] ; /* 0x00003c0416187981 */
/* 0x000ea2000c1e9900 */
/*03e0*/ FADD R10, R10, R27 ; /* 0x0000001b0a0a7221 */
/* 0x002fc60000000000 */
/*03f0*/ LDG.E.CONSTANT R27, [R22.64+0x34] ; /* 0x00003404161b7981 */
/* 0x000ea2000c1e9900 */
/*0400*/ I2F R26, R26 ; /* 0x0000001a001a7306 */
/* 0x008e300000201400 */
/*0410*/ I2F R13, R28 ; /* 0x0000001c000d7306 */
/* 0x010ff00000201400 */
/*0420*/ I2F R15, R21 ; /* 0x00000015000f7306 */
/* 0x0202a20000201400 */
/*0430*/ FADD R11, R11, R26 ; /* 0x0000001a0b0b7221 */
/* 0x001fc40000000000 */
/*0440*/ LDG.E.CONSTANT R26, [R22.64+0x38] ; /* 0x00003804161a7981 */
/* 0x0000ea000c1e9900 */
/*0450*/ I2F R14, R29 ; /* 0x0000001d000e7306 */
/* 0x000f220000201400 */
/*0460*/ LDG.E.CONSTANT R21, [R22.64+0x30] ; /* 0x0000300416157981 */
/* 0x00216e000c1e9900 */
/*0470*/ I2F R12, R25 ; /* 0x00000019000c7306 */
/* 0x000e620000201400 */
/*0480*/ FADD R4, R15, R4 ; /* 0x000000040f047221 */
/* 0x004fc40000000000 */
/*0490*/ FADD R6, R6, R13 ; /* 0x0000000d06067221 */
/* 0x000fe40000000000 */
/*04a0*/ FADD R5, R5, R14 ; /* 0x0000000e05057221 */
/* 0x010fe40000000000 */
/*04b0*/ FADD R7, R7, R12 ; /* 0x0000000c07077221 */
/* 0x002fe40000000000 */
/*04c0*/ LDL.128 R12, [R0+0x30] ; /* 0x00003000000c7983 */
/* 0x000ea20000100c00 */
/*04d0*/ I2F R24, R24 ; /* 0x0000001800187306 */
/* 0x000fe20000201400 */
/*04e0*/ IADD3 R3, R3, -0x10, RZ ; /* 0xfffffff003037810 */
/* 0x000fce0007ffe0ff */
/*04f0*/ I2F R28, R27 ; /* 0x0000001b001c7306 */
/* 0x000fe20000201400 */
/*0500*/ ISETP.GT.AND P3, PT, R3, 0xc, PT ; /* 0x0000000c0300780c */
/* 0x000fe40003f64270 */
/*0510*/ IADD3 R22, P4, R22, 0x40, RZ ; /* 0x0000004016167810 */
/* 0x001fe20007f9e0ff */
/*0520*/ STL.128 [R0+0x10], R8 ; /* 0x0000100800007387 */
/* 0x000fe20000100c00 */
/*0530*/ IADD3 R17, R17, 0x10, RZ ; /* 0x0000001011117810 */
/* 0x000fe40007ffe0ff */
/*0540*/ IADD3.X R23, RZ, R23, RZ, P4, !PT ; /* 0x00000017ff177210 */
/* 0x000fe200027fe4ff */
/*0550*/ STL.128 [R0+0x20], R4 ; /* 0x0000200400007387 */
/* 0x000fe20000100c00 */
/*0560*/ I2F R25, R26 ; /* 0x0000001a00197306 */
/* 0x008ff00000201400 */
/*0570*/ I2F R21, R21 ; /* 0x0000001500157306 */
/* 0x020ea40000201400 */
/*0580*/ FADD R12, R21, R12 ; /* 0x0000000c150c7221 */
/* 0x004fc40000000000 */
/*0590*/ FADD R13, R13, R28 ; /* 0x0000001c0d0d7221 */
/* 0x000fe40000000000 */
/*05a0*/ FADD R14, R14, R25 ; /* 0x000000190e0e7221 */
/* 0x000fe40000000000 */
/*05b0*/ FADD R15, R15, R24 ; /* 0x000000180f0f7221 */
/* 0x000fca0000000000 */
/*05c0*/ STL.128 [R0+0x30], R12 ; /* 0x0000300c00007387 */
/* 0x0001e40000100c00 */
/*05d0*/ IADD3 R0, R0, 0x40, RZ ; /* 0x0000004000007810 */
/* 0x001fe20007ffe0ff */
/*05e0*/ @P3 BRA 0x200 ; /* 0xfffffc1000003947 */
/* 0x000fea000383ffff */
/*05f0*/ ISETP.GT.AND P3, PT, R3, 0x4, PT ; /* 0x000000040300780c */
/* 0x000fda0003f64270 */
/*0600*/ @!P3 BRA 0x830 ; /* 0x000002200000b947 */
/* 0x000fea0003800000 */
/*0610*/ LDG.E.CONSTANT R25, [R22.64] ; /* 0x0000000416197981 */
/* 0x0000a8000c1e9900 */
/*0620*/ LDG.E.CONSTANT R26, [R22.64+0x4] ; /* 0x00000404161a7981 */
/* 0x0000e8000c1e9900 */
/*0630*/ LDG.E.CONSTANT R21, [R22.64+0x8] ; /* 0x0000080416157981 */
/* 0x000128000c1e9900 */
/*0640*/ LDG.E.CONSTANT R24, [R22.64+0xc] ; /* 0x00000c0416187981 */
/* 0x000168000c1e9900 */
/*0650*/ LDG.E.CONSTANT R15, [R22.64+0x10] ; /* 0x00001004160f7981 */
/* 0x000128000c1e9900 */
/*0660*/ LDG.E.CONSTANT R14, [R22.64+0x14] ; /* 0x00001404160e7981 */
/* 0x000168000c1e9900 */
/*0670*/ LDG.E.CONSTANT R13, [R22.64+0x18] ; /* 0x00001804160d7981 */
/* 0x000168000c1e9900 */
/*0680*/ LDG.E.CONSTANT R12, [R22.64+0x1c] ; /* 0x00001c04160c7981 */
/* 0x000168000c1e9900 */
/*0690*/ LDL.128 R8, [R0] ; /* 0x0000000000087983 */
/* 0x000f680000100c00 */
/*06a0*/ LDL.128 R4, [R0+0x10] ; /* 0x0000100000047983 */
/* 0x000f620000100c00 */
/*06b0*/ IADD3 R22, P3, R22, 0x20, RZ ; /* 0x0000002016167810 */
/* 0x001fc40007f7e0ff */
/*06c0*/ PLOP3.LUT P0, PT, PT, PT, PT, 0x8, 0x0 ; /* 0x000000000000781c */
/* 0x000fe40003f0e170 */
/*06d0*/ IADD3 R17, R17, 0x8, RZ ; /* 0x0000000811117810 */
/* 0x000fe20007ffe0ff */
/*06e0*/ IMAD.X R23, RZ, RZ, R23, P3 ; /* 0x000000ffff177224 */
/* 0x000fe200018e0617 */
/*06f0*/ IADD3 R3, R3, -0x8, RZ ; /* 0xfffffff803037810 */
/* 0x000fe20007ffe0ff */
/*0700*/ I2F R25, R25 ; /* 0x0000001900197306 */
/* 0x004e300000201400 */
/*0710*/ I2F R26, R26 ; /* 0x0000001a001a7306 */
/* 0x008e700000201400 */
/*0720*/ I2F R21, R21 ; /* 0x0000001500157306 */
/* 0x010eb00000201400 */
/*0730*/ I2F R24, R24 ; /* 0x0000001800187306 */
/* 0x020ef00000201400 */
/*0740*/ I2F R15, R15 ; /* 0x0000000f000f7306 */
/* 0x000f300000201400 */
/*0750*/ I2F R14, R14 ; /* 0x0000000e000e7306 */
/* 0x000f700000201400 */
/*0760*/ I2F R13, R13 ; /* 0x0000000d000d7306 */
/* 0x000f300000201400 */
/*0770*/ I2F R12, R12 ; /* 0x0000000c000c7306 */
/* 0x000f620000201400 */
/*0780*/ FADD R8, R25, R8 ; /* 0x0000000819087221 */
/* 0x001fc40000000000 */
/*0790*/ FADD R9, R9, R26 ; /* 0x0000001a09097221 */
/* 0x002fe40000000000 */
/*07a0*/ FADD R10, R10, R21 ; /* 0x000000150a0a7221 */
/* 0x004fe40000000000 */
/*07b0*/ FADD R11, R11, R24 ; /* 0x000000180b0b7221 */
/* 0x008fe40000000000 */
/*07c0*/ FADD R4, R15, R4 ; /* 0x000000040f047221 */
/* 0x010fe40000000000 */
/*07d0*/ FADD R5, R5, R14 ; /* 0x0000000e05057221 */
/* 0x020fe40000000000 */
/*07e0*/ FADD R6, R6, R13 ; /* 0x0000000d06067221 */
/* 0x000fc40000000000 */
/*07f0*/ FADD R7, R7, R12 ; /* 0x0000000c07077221 */
/* 0x000fe20000000000 */
/*0800*/ STL.128 [R0], R8 ; /* 0x0000000800007387 */
/* 0x000fe80000100c00 */
/*0810*/ STL.128 [R0+0x10], R4 ; /* 0x0000100400007387 */
/* 0x0001e40000100c00 */
/*0820*/ IADD3 R0, R0, 0x20, RZ ; /* 0x0000002000007810 */
/* 0x001fe40007ffe0ff */
/*0830*/ ISETP.NE.OR P0, PT, R3, RZ, P0 ; /* 0x000000ff0300720c */
/* 0x000fda0000705670 */
/*0840*/ @!P0 BRA 0x9a0 ; /* 0x0000015000008947 */
/* 0x000fea0003800000 */
/*0850*/ LDG.E.CONSTANT R8, [R22.64] ; /* 0x0000000416087981 */
/* 0x0000a8000c1e9900 */
/*0860*/ LDG.E.CONSTANT R10, [R22.64+0x4] ; /* 0x00000404160a7981 */
/* 0x0000e8000c1e9900 */
/*0870*/ LDG.E.CONSTANT R11, [R22.64+0x8] ; /* 0x00000804160b7981 */
/* 0x000128000c1e9900 */
/*0880*/ LDG.E.CONSTANT R12, [R22.64+0xc] ; /* 0x00000c04160c7981 */
/* 0x000168000c1e9900 */
/*0890*/ LDL.128 R4, [R0] ; /* 0x0000000000047983 */
/* 0x000f220000100c00 */
/*08a0*/ IADD3 R3, R3, -0x4, RZ ; /* 0xfffffffc03037810 */
/* 0x000fc40007ffe0ff */
/*08b0*/ IADD3 R17, R17, 0x4, RZ ; /* 0x0000000411117810 */
/* 0x000fe40007ffe0ff */
/*08c0*/ ISETP.NE.AND P0, PT, R3, RZ, PT ; /* 0x000000ff0300720c */
/* 0x000fe40003f05270 */
/*08d0*/ IADD3 R22, P3, R22, 0x10, RZ ; /* 0x0000001016167810 */
/* 0x001fc80007f7e0ff */
/*08e0*/ IADD3.X R23, RZ, R23, RZ, P3, !PT ; /* 0x00000017ff177210 */
/* 0x000fe20001ffe4ff */
/*08f0*/ I2F R9, R8 ; /* 0x0000000800097306 */
/* 0x004e300000201400 */
/*0900*/ I2F R10, R10 ; /* 0x0000000a000a7306 */
/* 0x008e700000201400 */
/*0910*/ I2F R11, R11 ; /* 0x0000000b000b7306 */
/* 0x010ea20000201400 */
/*0920*/ FADD R4, R4, R9 ; /* 0x0000000904047221 */
/* 0x001fce0000000000 */
/*0930*/ I2F R12, R12 ; /* 0x0000000c000c7306 */
/* 0x020e220000201400 */
/*0940*/ FADD R5, R5, R10 ; /* 0x0000000a05057221 */
/* 0x002fe40000000000 */
/*0950*/ FADD R6, R6, R11 ; /* 0x0000000b06067221 */
/* 0x004fe40000000000 */
/*0960*/ FADD R7, R7, R12 ; /* 0x0000000c07077221 */
/* 0x001fca0000000000 */
/*0970*/ STL.128 [R0], R4 ; /* 0x0000000400007387 */
/* 0x0001e40000100c00 */
/*0980*/ IADD3 R0, R0, 0x10, RZ ; /* 0x0000001000007810 */
/* 0x001fe20007ffe0ff */
/*0990*/ @P0 BRA 0x850 ; /* 0xfffffeb000000947 */
/* 0x000fea000383ffff */
/*09a0*/ ISETP.NE.AND P0, PT, R20, RZ, PT ; /* 0x000000ff1400720c */
/* 0x000fda0003f05270 */
/*09b0*/ @!P0 BRA 0xb20 ; /* 0x0000016000008947 */
/* 0x000fea0003800000 */
/*09c0*/ HFMA2.MMA R5, -RZ, RZ, 0, 2.384185791015625e-07 ; /* 0x00000004ff057435 */
/* 0x000fe200000001ff */
/*09d0*/ IMAD.IADD R4, R16, 0x1, R17 ; /* 0x0000000110047824 */
/* 0x000fd200078e0211 */
/*09e0*/ IMAD.WIDE R4, R4, R5, c[0x0][0x168] ; /* 0x00005a0004047625 */
/* 0x000fca00078e0205 */
/*09f0*/ LDG.E.CONSTANT R0, [R4.64] ; /* 0x0000000404007981 */
/* 0x000ea2000c1e9900 */
/*0a00*/ LEA R17, R17, R1, 0x2 ; /* 0x0000000111117211 */
/* 0x000fca00078e10ff */
/*0a10*/ LDL R3, [R17] ; /* 0x0000000011037983 */
/* 0x000ee20000100800 */
/*0a20*/ ISETP.NE.AND P0, PT, R20, 0x1, PT ; /* 0x000000011400780c */
/* 0x000fe20003f05270 */
/*0a30*/ I2F R0, R0 ; /* 0x0000000000007306 */
/* 0x004ee40000201400 */
/*0a40*/ FADD R6, R0, R3 ; /* 0x0000000300067221 */
/* 0x008fca0000000000 */
/*0a50*/ STL [R17], R6 ; /* 0x0000000611007387 */
/* 0x0001ea0000100800 */
/*0a60*/ @!P0 BRA 0xb20 ; /* 0x000000b000008947 */
/* 0x000fea0003800000 */
/*0a70*/ ISETP.NE.AND P0, PT, R20, 0x2, PT ; /* 0x000000021400780c */
/* 0x000fe20003f05270 */
/*0a80*/ LDG.E.CONSTANT R0, [R4.64+0x4] ; /* 0x0000040404007981 */
/* 0x000ea8000c1e9900 */
/*0a90*/ LDL R7, [R17+0x4] ; /* 0x0000040011077983 */
/* 0x000ef00000100800 */
/*0aa0*/ @P0 LDG.E.CONSTANT R3, [R4.64+0x8] ; /* 0x0000080404030981 */
/* 0x000f28000c1e9900 */
/*0ab0*/ @P0 LDL R8, [R17+0x8] ; /* 0x0000080011080983 */
/* 0x000f620000100800 */
/*0ac0*/ I2F R0, R0 ; /* 0x0000000000007306 */
/* 0x004ef00000201400 */
/*0ad0*/ @P0 I2F R3, R3 ; /* 0x0000000300030306 */
/* 0x010f620000201400 */
/*0ae0*/ FADD R6, R0, R7 ; /* 0x0000000700067221 */
/* 0x009fca0000000000 */
/*0af0*/ STL [R17+0x4], R6 ; /* 0x0000040611007387 */
/* 0x0001e20000100800 */
/*0b00*/ @P0 FADD R8, R3, R8 ; /* 0x0000000803080221 */
/* 0x020fca0000000000 */
/*0b10*/ @P0 STL [R17+0x8], R8 ; /* 0x0000080811000387 */
/* 0x0001e40000100800 */
/*0b20*/ @!P2 BRA 0xf0 ; /* 0xfffff5c00000a947 */
/* 0x000fea000383ffff */
/*0b30*/ EXIT ; /* 0x000000000000794d */
/* 0x000fea0003800000 */
/*0b40*/ BRA 0xb40; /* 0xfffffff000007947 */
/* 0x000fc0000383ffff */
/*0b50*/ NOP; /* 0x0000000000007918 */
/* 0x000fc00000000000 */
/*0b60*/ NOP; /* 0x0000000000007918 */
/* 0x000fc00000000000 */
/*0b70*/ NOP; /* 0x0000000000007918 */
/* 0x000fc00000000000 */
/*0b80*/ NOP; /* 0x0000000000007918 */
/* 0x000fc00000000000 */
/*0b90*/ NOP; /* 0x0000000000007918 */
/* 0x000fc00000000000 */
/*0ba0*/ NOP; /* 0x0000000000007918 */
/* 0x000fc00000000000 */
/*0bb0*/ NOP; /* 0x0000000000007918 */
/* 0x000fc00000000000 */
/*0bc0*/ NOP; /* 0x0000000000007918 */
/* 0x000fc00000000000 */
/*0bd0*/ NOP; /* 0x0000000000007918 */
/* 0x000fc00000000000 */
/*0be0*/ NOP; /* 0x0000000000007918 */
/* 0x000fc00000000000 */
/*0bf0*/ NOP; /* 0x0000000000007918 */
/* 0x000fc00000000000 */
.......... |
You are a helpful coding assistant specialized in converting CUDA source code to CUDA host assembly. | // CUDA runtime
#include <cuda_runtime.h>
#include"device_launch_parameters.h"
#include <stdio.h>
__global__ void cudaKernel(float* visHist, int* rawHistogramRay, float* devOtf, int K, int B, int D)
{
//int i = blockDim.x * blockIdx.x + threadIdx.x;
int id = blockIdx.x;
float localVisHist[128];
int base = id * D * B;
int slcSample = 0;
for( int d = 0; d < D; d++ ){
for( int b = 0; b < B; b++ ){
localVisHist[b] += rawHistogramRay[base + d * D + b];
}
}
}
extern "C" double runCudaKernel( float* visHist, int K, int D, int B, float* otf, int* rawHistogramRays )
{
FILE* fp = fopen( "output.txt", "w" );
float* devVisHist = 0;
float* devOtf = 0;
int* devRawHistogramRay = 0;
cudaError_t cudaStatus;
//Choose which GPU to run on, change this on a multi-GPU system.
cudaStatus= cudaSetDevice(0);
if(cudaStatus != cudaSuccess) {
fprintf(fp,"cudaSetDevice failed! Do you havea CUDA-capable GPU installed?");
goto Error;
}
//Allocate GPU buffers for three vectors (two input, one output) .
cudaStatus= cudaMalloc((void**)&devVisHist, B * sizeof(float));
if(cudaStatus != cudaSuccess) {
fprintf(fp,"cudaMalloc failed!");
goto Error;
}
cudaStatus= cudaMalloc((void**)&devOtf, B * sizeof(float));
if(cudaStatus != cudaSuccess) {
fprintf(fp,"cudaMalloc failed!");
goto Error;
}
cudaStatus= cudaMalloc((void**)&devRawHistogramRay, K * B * D * sizeof(int));
if(cudaStatus != cudaSuccess) {
fprintf(fp,"cudaMalloc failed!");
goto Error;
}
//Copy input vectors from host memory to GPU buffers.
cudaStatus= cudaMemcpy( devRawHistogramRay, rawHistogramRays, K * B * D * sizeof(int), cudaMemcpyHostToDevice);
if(cudaStatus != cudaSuccess) {
fprintf(fp,"cudaMemcpy failed!");
goto Error;
}
cudaStatus= cudaMemcpy(devOtf, otf, B * sizeof(float), cudaMemcpyHostToDevice);
if(cudaStatus != cudaSuccess) {
fprintf(fp,"cudaMemcpy failed!");
goto Error;
}
//Launch a kernel on the GPU with one thread for each element.
fprintf( fp, "before kernel\n " );fflush( fp );
cudaKernel<<<K,1>>>(devVisHist, devRawHistogramRay, devOtf, K, B, D);
fprintf( fp, "after kernel\n " );fflush( fp );
//Check for any errors launching the kernel
cudaStatus= cudaGetLastError();
if(cudaStatus != cudaSuccess) {
fprintf(fp,"addKernel launch failed: %s\n", cudaGetErrorString(cudaStatus));
goto Error;
}
//cudaDeviceSynchronize waits for the kernel to finish, and returns
//any errors encountered during the launch.
cudaStatus= cudaDeviceSynchronize();
if(cudaStatus != cudaSuccess) {
fprintf(fp,"cudaDeviceSynchronize returned error code %d after launchingaddKernel!\n", cudaStatus);
goto Error;
}
//Copy output vector from GPU buffer to host memory.
cudaStatus= cudaMemcpy(visHist, devVisHist, B * sizeof(float), cudaMemcpyDeviceToHost);
if(cudaStatus != cudaSuccess) {
fprintf(fp,"cudaMemcpy failed!");
goto Error;
}
//output result
fprintf( fp, "before output\n " );fflush( fp );
for( int i=0; i<B; i++ ){
fprintf(fp, "%d : %f \n", i, visHist[i]);
}
fprintf( fp, "after output\n " );fflush( fp );
Error:
cudaFree(devRawHistogramRay);
cudaFree(devVisHist);
cudaFree(devOtf);
if(cudaStatus != cudaSuccess) {
fprintf(stderr,"addWithCuda failed!");
return 1;
}
} | .file "tmpxft_001587f3_00000000-6_cudaKernel.cudafe1.cpp"
.text
#APP
#NO_APP
.type _ZL26__cudaUnregisterBinaryUtilv, @function
_ZL26__cudaUnregisterBinaryUtilv:
.LFB2060:
.cfi_startproc
endbr64
subq $8, %rsp
.cfi_def_cfa_offset 16
movq _ZL20__cudaFatCubinHandle(%rip), %rdi
call __cudaUnregisterFatBinary@PLT
addq $8, %rsp
.cfi_def_cfa_offset 8
ret
.cfi_endproc
.LFE2060:
.size _ZL26__cudaUnregisterBinaryUtilv, .-_ZL26__cudaUnregisterBinaryUtilv
.globl _Z37__device_stub__Z10cudaKernelPfPiS_iiiPfPiS_iii
.type _Z37__device_stub__Z10cudaKernelPfPiS_iiiPfPiS_iii, @function
_Z37__device_stub__Z10cudaKernelPfPiS_iiiPfPiS_iii:
.LFB2082:
.cfi_startproc
endbr64
subq $184, %rsp
.cfi_def_cfa_offset 192
movq %rdi, 40(%rsp)
movq %rsi, 32(%rsp)
movq %rdx, 24(%rsp)
movl %ecx, 20(%rsp)
movl %r8d, 16(%rsp)
movl %r9d, 12(%rsp)
movq %fs:40, %rax
movq %rax, 168(%rsp)
xorl %eax, %eax
leaq 40(%rsp), %rax
movq %rax, 112(%rsp)
leaq 32(%rsp), %rax
movq %rax, 120(%rsp)
leaq 24(%rsp), %rax
movq %rax, 128(%rsp)
leaq 20(%rsp), %rax
movq %rax, 136(%rsp)
leaq 16(%rsp), %rax
movq %rax, 144(%rsp)
leaq 12(%rsp), %rax
movq %rax, 152(%rsp)
movl $1, 64(%rsp)
movl $1, 68(%rsp)
movl $1, 72(%rsp)
movl $1, 76(%rsp)
movl $1, 80(%rsp)
movl $1, 84(%rsp)
leaq 56(%rsp), %rcx
leaq 48(%rsp), %rdx
leaq 76(%rsp), %rsi
leaq 64(%rsp), %rdi
call __cudaPopCallConfiguration@PLT
testl %eax, %eax
je .L7
.L3:
movq 168(%rsp), %rax
subq %fs:40, %rax
jne .L8
addq $184, %rsp
.cfi_remember_state
.cfi_def_cfa_offset 8
ret
.L7:
.cfi_restore_state
pushq 56(%rsp)
.cfi_def_cfa_offset 200
pushq 56(%rsp)
.cfi_def_cfa_offset 208
leaq 128(%rsp), %r9
movq 92(%rsp), %rcx
movl 100(%rsp), %r8d
movq 80(%rsp), %rsi
movl 88(%rsp), %edx
leaq _Z10cudaKernelPfPiS_iii(%rip), %rdi
call cudaLaunchKernel@PLT
addq $16, %rsp
.cfi_def_cfa_offset 192
jmp .L3
.L8:
call __stack_chk_fail@PLT
.cfi_endproc
.LFE2082:
.size _Z37__device_stub__Z10cudaKernelPfPiS_iiiPfPiS_iii, .-_Z37__device_stub__Z10cudaKernelPfPiS_iiiPfPiS_iii
.globl _Z10cudaKernelPfPiS_iii
.type _Z10cudaKernelPfPiS_iii, @function
_Z10cudaKernelPfPiS_iii:
.LFB2083:
.cfi_startproc
endbr64
subq $8, %rsp
.cfi_def_cfa_offset 16
call _Z37__device_stub__Z10cudaKernelPfPiS_iiiPfPiS_iii
addq $8, %rsp
.cfi_def_cfa_offset 8
ret
.cfi_endproc
.LFE2083:
.size _Z10cudaKernelPfPiS_iii, .-_Z10cudaKernelPfPiS_iii
.section .rodata.str1.1,"aMS",@progbits,1
.LC0:
.string "w"
.LC1:
.string "output.txt"
.section .rodata.str1.8,"aMS",@progbits,1
.align 8
.LC2:
.string "cudaSetDevice failed! Do you havea CUDA-capable GPU installed?"
.section .rodata.str1.1
.LC3:
.string "cudaMalloc failed!"
.LC4:
.string "cudaMemcpy failed!"
.LC5:
.string "before kernel\n "
.LC6:
.string "after kernel\n "
.LC7:
.string "addKernel launch failed: %s\n"
.section .rodata.str1.8
.align 8
.LC8:
.string "cudaDeviceSynchronize returned error code %d after launchingaddKernel!\n"
.section .rodata.str1.1
.LC9:
.string "before output\n "
.LC10:
.string "%d : %f \n"
.LC11:
.string "after output\n "
.LC12:
.string "addWithCuda failed!"
.text
.globl runCudaKernel
.type runCudaKernel, @function
runCudaKernel:
.LFB2057:
.cfi_startproc
endbr64
pushq %r15
.cfi_def_cfa_offset 16
.cfi_offset 15, -16
pushq %r14
.cfi_def_cfa_offset 24
.cfi_offset 14, -24
pushq %r13
.cfi_def_cfa_offset 32
.cfi_offset 13, -32
pushq %r12
.cfi_def_cfa_offset 40
.cfi_offset 12, -40
pushq %rbp
.cfi_def_cfa_offset 48
.cfi_offset 6, -48
pushq %rbx
.cfi_def_cfa_offset 56
.cfi_offset 3, -56
subq $104, %rsp
.cfi_def_cfa_offset 160
movq %rdi, 8(%rsp)
movl %esi, %r12d
movl %edx, 4(%rsp)
movl %ecx, %ebp
movq %r8, 24(%rsp)
movq %r9, 16(%rsp)
movq %fs:40, %rax
movq %rax, 88(%rsp)
xorl %eax, %eax
leaq .LC0(%rip), %rsi
leaq .LC1(%rip), %rdi
call fopen@PLT
movq %rax, %rbx
movq $0, 40(%rsp)
movq $0, 48(%rsp)
movq $0, 56(%rsp)
movl $0, %edi
call cudaSetDevice@PLT
testl %eax, %eax
jne .L28
movslq %ebp, %r15
leaq 0(,%r15,4), %r14
leaq 40(%rsp), %rdi
movq %r14, %rsi
call cudaMalloc@PLT
testl %eax, %eax
jne .L29
leaq 48(%rsp), %rdi
movq %r14, %rsi
call cudaMalloc@PLT
testl %eax, %eax
jne .L30
movl %ebp, %r13d
imull %r12d, %r13d
movl 4(%rsp), %eax
imull %eax, %r13d
movslq %r13d, %r13
salq $2, %r13
leaq 56(%rsp), %rdi
movq %r13, %rsi
call cudaMalloc@PLT
testl %eax, %eax
jne .L31
movl $1, %ecx
movq %r13, %rdx
movq 16(%rsp), %rsi
movq 56(%rsp), %rdi
call cudaMemcpy@PLT
testl %eax, %eax
jne .L32
movl $1, %ecx
movq %r14, %rdx
movq 24(%rsp), %rsi
movq 48(%rsp), %rdi
call cudaMemcpy@PLT
testl %eax, %eax
jne .L33
leaq .LC5(%rip), %rdx
movl $2, %esi
movq %rbx, %rdi
movl $0, %eax
call __fprintf_chk@PLT
movq %rbx, %rdi
call fflush@PLT
movl $1, 76(%rsp)
movl $1, 80(%rsp)
movl %r12d, 64(%rsp)
movl $1, 68(%rsp)
movl $0, %r9d
movl $0, %r8d
movq 76(%rsp), %rdx
movl $1, %ecx
movq 64(%rsp), %rdi
movl $1, %esi
call __cudaPushCallConfiguration@PLT
testl %eax, %eax
je .L34
.L19:
leaq .LC6(%rip), %rdx
movl $2, %esi
movq %rbx, %rdi
movl $0, %eax
call __fprintf_chk@PLT
movq %rbx, %rdi
call fflush@PLT
call cudaGetLastError@PLT
testl %eax, %eax
jne .L35
call cudaDeviceSynchronize@PLT
testl %eax, %eax
jne .L36
movl $2, %ecx
movq %r14, %rdx
movq 40(%rsp), %rsi
movq 8(%rsp), %rdi
call cudaMemcpy@PLT
testl %eax, %eax
jne .L37
leaq .LC9(%rip), %rdx
movl $2, %esi
movq %rbx, %rdi
movl $0, %eax
call __fprintf_chk@PLT
movq %rbx, %rdi
call fflush@PLT
testl %ebp, %ebp
jle .L23
movl $0, %ebp
leaq .LC10(%rip), %r12
.L24:
movq 8(%rsp), %rax
pxor %xmm0, %xmm0
cvtss2sd (%rax,%rbp,4), %xmm0
movl %ebp, %ecx
movq %r12, %rdx
movl $2, %esi
movq %rbx, %rdi
movl $1, %eax
call __fprintf_chk@PLT
addq $1, %rbp
cmpq %rbp, %r15
jne .L24
.L23:
leaq .LC11(%rip), %rdx
movl $2, %esi
movq %rbx, %rdi
movl $0, %eax
call __fprintf_chk@PLT
movq %rbx, %rdi
call fflush@PLT
movq 56(%rsp), %rdi
call cudaFree@PLT
movq 40(%rsp), %rdi
call cudaFree@PLT
movq 48(%rsp), %rdi
call cudaFree@PLT
.L28:
leaq .LC2(%rip), %rdx
movl $2, %esi
movq %rbx, %rdi
movl $0, %eax
call __fprintf_chk@PLT
.L13:
movq 56(%rsp), %rdi
call cudaFree@PLT
movq 40(%rsp), %rdi
call cudaFree@PLT
movq 48(%rsp), %rdi
call cudaFree@PLT
leaq .LC12(%rip), %rdx
movl $2, %esi
movq stderr(%rip), %rdi
movl $0, %eax
call __fprintf_chk@PLT
movq 88(%rsp), %rax
subq %fs:40, %rax
jne .L38
movsd .LC13(%rip), %xmm0
addq $104, %rsp
.cfi_remember_state
.cfi_def_cfa_offset 56
popq %rbx
.cfi_def_cfa_offset 48
popq %rbp
.cfi_def_cfa_offset 40
popq %r12
.cfi_def_cfa_offset 32
popq %r13
.cfi_def_cfa_offset 24
popq %r14
.cfi_def_cfa_offset 16
popq %r15
.cfi_def_cfa_offset 8
ret
.L29:
.cfi_restore_state
leaq .LC3(%rip), %rdx
movl $2, %esi
movq %rbx, %rdi
movl $0, %eax
call __fprintf_chk@PLT
jmp .L13
.L30:
leaq .LC3(%rip), %rdx
movl $2, %esi
movq %rbx, %rdi
movl $0, %eax
call __fprintf_chk@PLT
jmp .L13
.L31:
leaq .LC3(%rip), %rdx
movl $2, %esi
movq %rbx, %rdi
movl $0, %eax
call __fprintf_chk@PLT
jmp .L13
.L32:
leaq .LC4(%rip), %rdx
movl $2, %esi
movq %rbx, %rdi
movl $0, %eax
call __fprintf_chk@PLT
jmp .L13
.L33:
leaq .LC4(%rip), %rdx
movl $2, %esi
movq %rbx, %rdi
movl $0, %eax
call __fprintf_chk@PLT
jmp .L13
.L34:
movl 4(%rsp), %r9d
movl %ebp, %r8d
movl %r12d, %ecx
movq 48(%rsp), %rdx
movq 56(%rsp), %rsi
movq 40(%rsp), %rdi
call _Z37__device_stub__Z10cudaKernelPfPiS_iiiPfPiS_iii
jmp .L19
.L35:
movl %eax, %edi
call cudaGetErrorString@PLT
movq %rax, %rcx
leaq .LC7(%rip), %rdx
movl $2, %esi
movq %rbx, %rdi
movl $0, %eax
call __fprintf_chk@PLT
jmp .L13
.L36:
movl %eax, %ecx
leaq .LC8(%rip), %rdx
movl $2, %esi
movq %rbx, %rdi
movl $0, %eax
call __fprintf_chk@PLT
jmp .L13
.L37:
leaq .LC4(%rip), %rdx
movl $2, %esi
movq %rbx, %rdi
movl $0, %eax
call __fprintf_chk@PLT
jmp .L13
.L38:
call __stack_chk_fail@PLT
.cfi_endproc
.LFE2057:
.size runCudaKernel, .-runCudaKernel
.section .rodata.str1.1
.LC14:
.string "_Z10cudaKernelPfPiS_iii"
.text
.type _ZL24__sti____cudaRegisterAllv, @function
_ZL24__sti____cudaRegisterAllv:
.LFB2085:
.cfi_startproc
endbr64
subq $8, %rsp
.cfi_def_cfa_offset 16
leaq _ZL15__fatDeviceText(%rip), %rdi
call __cudaRegisterFatBinary@PLT
movq %rax, %rdi
movq %rax, _ZL20__cudaFatCubinHandle(%rip)
pushq $0
.cfi_def_cfa_offset 24
pushq $0
.cfi_def_cfa_offset 32
pushq $0
.cfi_def_cfa_offset 40
pushq $0
.cfi_def_cfa_offset 48
movl $0, %r9d
movl $-1, %r8d
leaq .LC14(%rip), %rdx
movq %rdx, %rcx
leaq _Z10cudaKernelPfPiS_iii(%rip), %rsi
call __cudaRegisterFunction@PLT
addq $32, %rsp
.cfi_def_cfa_offset 16
movq _ZL20__cudaFatCubinHandle(%rip), %rdi
call __cudaRegisterFatBinaryEnd@PLT
leaq _ZL26__cudaUnregisterBinaryUtilv(%rip), %rdi
call atexit@PLT
addq $8, %rsp
.cfi_def_cfa_offset 8
ret
.cfi_endproc
.LFE2085:
.size _ZL24__sti____cudaRegisterAllv, .-_ZL24__sti____cudaRegisterAllv
.section .init_array,"aw"
.align 8
.quad _ZL24__sti____cudaRegisterAllv
.section .nvFatBinSegment,"aw"
.align 8
.type _ZL15__fatDeviceText, @object
.size _ZL15__fatDeviceText, 24
_ZL15__fatDeviceText:
.long 1180844977
.long 1
.quad fatbinData
.quad 0
.local _ZL20__cudaFatCubinHandle
.comm _ZL20__cudaFatCubinHandle,8,8
.section .rodata.cst8,"aM",@progbits,8
.align 8
.LC13:
.long 0
.long 1072693248
.ident "GCC: (Ubuntu 13.3.0-6ubuntu2~24.04) 13.3.0"
.section .note.GNU-stack,"",@progbits
.section .note.gnu.property,"a"
.align 8
.long 1f - 0f
.long 4f - 1f
.long 5
0:
.string "GNU"
1:
.align 8
.long 0xc0000002
.long 3f - 2f
2:
.long 0x3
3:
.align 8
4: |
You are a helpful coding assistant specialized in converting CUDA source code to HIP/AMD source code. | // CUDA runtime
#include <cuda_runtime.h>
#include"device_launch_parameters.h"
#include <stdio.h>
__global__ void cudaKernel(float* visHist, int* rawHistogramRay, float* devOtf, int K, int B, int D)
{
//int i = blockDim.x * blockIdx.x + threadIdx.x;
int id = blockIdx.x;
float localVisHist[128];
int base = id * D * B;
int slcSample = 0;
for( int d = 0; d < D; d++ ){
for( int b = 0; b < B; b++ ){
localVisHist[b] += rawHistogramRay[base + d * D + b];
}
}
}
extern "C" double runCudaKernel( float* visHist, int K, int D, int B, float* otf, int* rawHistogramRays )
{
FILE* fp = fopen( "output.txt", "w" );
float* devVisHist = 0;
float* devOtf = 0;
int* devRawHistogramRay = 0;
cudaError_t cudaStatus;
//Choose which GPU to run on, change this on a multi-GPU system.
cudaStatus= cudaSetDevice(0);
if(cudaStatus != cudaSuccess) {
fprintf(fp,"cudaSetDevice failed! Do you havea CUDA-capable GPU installed?");
goto Error;
}
//Allocate GPU buffers for three vectors (two input, one output) .
cudaStatus= cudaMalloc((void**)&devVisHist, B * sizeof(float));
if(cudaStatus != cudaSuccess) {
fprintf(fp,"cudaMalloc failed!");
goto Error;
}
cudaStatus= cudaMalloc((void**)&devOtf, B * sizeof(float));
if(cudaStatus != cudaSuccess) {
fprintf(fp,"cudaMalloc failed!");
goto Error;
}
cudaStatus= cudaMalloc((void**)&devRawHistogramRay, K * B * D * sizeof(int));
if(cudaStatus != cudaSuccess) {
fprintf(fp,"cudaMalloc failed!");
goto Error;
}
//Copy input vectors from host memory to GPU buffers.
cudaStatus= cudaMemcpy( devRawHistogramRay, rawHistogramRays, K * B * D * sizeof(int), cudaMemcpyHostToDevice);
if(cudaStatus != cudaSuccess) {
fprintf(fp,"cudaMemcpy failed!");
goto Error;
}
cudaStatus= cudaMemcpy(devOtf, otf, B * sizeof(float), cudaMemcpyHostToDevice);
if(cudaStatus != cudaSuccess) {
fprintf(fp,"cudaMemcpy failed!");
goto Error;
}
//Launch a kernel on the GPU with one thread for each element.
fprintf( fp, "before kernel\n " );fflush( fp );
cudaKernel<<<K,1>>>(devVisHist, devRawHistogramRay, devOtf, K, B, D);
fprintf( fp, "after kernel\n " );fflush( fp );
//Check for any errors launching the kernel
cudaStatus= cudaGetLastError();
if(cudaStatus != cudaSuccess) {
fprintf(fp,"addKernel launch failed: %s\n", cudaGetErrorString(cudaStatus));
goto Error;
}
//cudaDeviceSynchronize waits for the kernel to finish, and returns
//any errors encountered during the launch.
cudaStatus= cudaDeviceSynchronize();
if(cudaStatus != cudaSuccess) {
fprintf(fp,"cudaDeviceSynchronize returned error code %d after launchingaddKernel!\n", cudaStatus);
goto Error;
}
//Copy output vector from GPU buffer to host memory.
cudaStatus= cudaMemcpy(visHist, devVisHist, B * sizeof(float), cudaMemcpyDeviceToHost);
if(cudaStatus != cudaSuccess) {
fprintf(fp,"cudaMemcpy failed!");
goto Error;
}
//output result
fprintf( fp, "before output\n " );fflush( fp );
for( int i=0; i<B; i++ ){
fprintf(fp, "%d : %f \n", i, visHist[i]);
}
fprintf( fp, "after output\n " );fflush( fp );
Error:
cudaFree(devRawHistogramRay);
cudaFree(devVisHist);
cudaFree(devOtf);
if(cudaStatus != cudaSuccess) {
fprintf(stderr,"addWithCuda failed!");
return 1;
}
} | // CUDA runtime
#include <hip/hip_runtime.h>
#include <stdio.h>
__global__ void cudaKernel(float* visHist, int* rawHistogramRay, float* devOtf, int K, int B, int D)
{
//int i = blockDim.x * blockIdx.x + threadIdx.x;
int id = blockIdx.x;
float localVisHist[128];
int base = id * D * B;
int slcSample = 0;
for( int d = 0; d < D; d++ ){
for( int b = 0; b < B; b++ ){
localVisHist[b] += rawHistogramRay[base + d * D + b];
}
}
}
extern "C" double runCudaKernel( float* visHist, int K, int D, int B, float* otf, int* rawHistogramRays )
{
FILE* fp = fopen( "output.txt", "w" );
float* devVisHist = 0;
float* devOtf = 0;
int* devRawHistogramRay = 0;
hipError_t cudaStatus;
//Choose which GPU to run on, change this on a multi-GPU system.
cudaStatus= hipSetDevice(0);
if(cudaStatus != hipSuccess) {
fprintf(fp,"hipSetDevice failed! Do you havea CUDA-capable GPU installed?");
goto Error;
}
//Allocate GPU buffers for three vectors (two input, one output) .
cudaStatus= hipMalloc((void**)&devVisHist, B * sizeof(float));
if(cudaStatus != hipSuccess) {
fprintf(fp,"hipMalloc failed!");
goto Error;
}
cudaStatus= hipMalloc((void**)&devOtf, B * sizeof(float));
if(cudaStatus != hipSuccess) {
fprintf(fp,"hipMalloc failed!");
goto Error;
}
cudaStatus= hipMalloc((void**)&devRawHistogramRay, K * B * D * sizeof(int));
if(cudaStatus != hipSuccess) {
fprintf(fp,"hipMalloc failed!");
goto Error;
}
//Copy input vectors from host memory to GPU buffers.
cudaStatus= hipMemcpy( devRawHistogramRay, rawHistogramRays, K * B * D * sizeof(int), hipMemcpyHostToDevice);
if(cudaStatus != hipSuccess) {
fprintf(fp,"hipMemcpy failed!");
goto Error;
}
cudaStatus= hipMemcpy(devOtf, otf, B * sizeof(float), hipMemcpyHostToDevice);
if(cudaStatus != hipSuccess) {
fprintf(fp,"hipMemcpy failed!");
goto Error;
}
//Launch a kernel on the GPU with one thread for each element.
fprintf( fp, "before kernel\n " );fflush( fp );
cudaKernel<<<K,1>>>(devVisHist, devRawHistogramRay, devOtf, K, B, D);
fprintf( fp, "after kernel\n " );fflush( fp );
//Check for any errors launching the kernel
cudaStatus= hipGetLastError();
if(cudaStatus != hipSuccess) {
fprintf(fp,"addKernel launch failed: %s\n", hipGetErrorString(cudaStatus));
goto Error;
}
//cudaDeviceSynchronize waits for the kernel to finish, and returns
//any errors encountered during the launch.
cudaStatus= hipDeviceSynchronize();
if(cudaStatus != hipSuccess) {
fprintf(fp,"hipDeviceSynchronize returned error code %d after launchingaddKernel!\n", cudaStatus);
goto Error;
}
//Copy output vector from GPU buffer to host memory.
cudaStatus= hipMemcpy(visHist, devVisHist, B * sizeof(float), hipMemcpyDeviceToHost);
if(cudaStatus != hipSuccess) {
fprintf(fp,"hipMemcpy failed!");
goto Error;
}
//output result
fprintf( fp, "before output\n " );fflush( fp );
for( int i=0; i<B; i++ ){
fprintf(fp, "%d : %f \n", i, visHist[i]);
}
fprintf( fp, "after output\n " );fflush( fp );
Error:
hipFree(devRawHistogramRay);
hipFree(devVisHist);
hipFree(devOtf);
if(cudaStatus != hipSuccess) {
fprintf(stderr,"addWithCuda failed!");
return 1;
}
} |
You are a helpful coding assistant specialized in converting HIP source code to AMD device assembly. | // CUDA runtime
#include <hip/hip_runtime.h>
#include <stdio.h>
__global__ void cudaKernel(float* visHist, int* rawHistogramRay, float* devOtf, int K, int B, int D)
{
//int i = blockDim.x * blockIdx.x + threadIdx.x;
int id = blockIdx.x;
float localVisHist[128];
int base = id * D * B;
int slcSample = 0;
for( int d = 0; d < D; d++ ){
for( int b = 0; b < B; b++ ){
localVisHist[b] += rawHistogramRay[base + d * D + b];
}
}
}
extern "C" double runCudaKernel( float* visHist, int K, int D, int B, float* otf, int* rawHistogramRays )
{
FILE* fp = fopen( "output.txt", "w" );
float* devVisHist = 0;
float* devOtf = 0;
int* devRawHistogramRay = 0;
hipError_t cudaStatus;
//Choose which GPU to run on, change this on a multi-GPU system.
cudaStatus= hipSetDevice(0);
if(cudaStatus != hipSuccess) {
fprintf(fp,"hipSetDevice failed! Do you havea CUDA-capable GPU installed?");
goto Error;
}
//Allocate GPU buffers for three vectors (two input, one output) .
cudaStatus= hipMalloc((void**)&devVisHist, B * sizeof(float));
if(cudaStatus != hipSuccess) {
fprintf(fp,"hipMalloc failed!");
goto Error;
}
cudaStatus= hipMalloc((void**)&devOtf, B * sizeof(float));
if(cudaStatus != hipSuccess) {
fprintf(fp,"hipMalloc failed!");
goto Error;
}
cudaStatus= hipMalloc((void**)&devRawHistogramRay, K * B * D * sizeof(int));
if(cudaStatus != hipSuccess) {
fprintf(fp,"hipMalloc failed!");
goto Error;
}
//Copy input vectors from host memory to GPU buffers.
cudaStatus= hipMemcpy( devRawHistogramRay, rawHistogramRays, K * B * D * sizeof(int), hipMemcpyHostToDevice);
if(cudaStatus != hipSuccess) {
fprintf(fp,"hipMemcpy failed!");
goto Error;
}
cudaStatus= hipMemcpy(devOtf, otf, B * sizeof(float), hipMemcpyHostToDevice);
if(cudaStatus != hipSuccess) {
fprintf(fp,"hipMemcpy failed!");
goto Error;
}
//Launch a kernel on the GPU with one thread for each element.
fprintf( fp, "before kernel\n " );fflush( fp );
cudaKernel<<<K,1>>>(devVisHist, devRawHistogramRay, devOtf, K, B, D);
fprintf( fp, "after kernel\n " );fflush( fp );
//Check for any errors launching the kernel
cudaStatus= hipGetLastError();
if(cudaStatus != hipSuccess) {
fprintf(fp,"addKernel launch failed: %s\n", hipGetErrorString(cudaStatus));
goto Error;
}
//cudaDeviceSynchronize waits for the kernel to finish, and returns
//any errors encountered during the launch.
cudaStatus= hipDeviceSynchronize();
if(cudaStatus != hipSuccess) {
fprintf(fp,"hipDeviceSynchronize returned error code %d after launchingaddKernel!\n", cudaStatus);
goto Error;
}
//Copy output vector from GPU buffer to host memory.
cudaStatus= hipMemcpy(visHist, devVisHist, B * sizeof(float), hipMemcpyDeviceToHost);
if(cudaStatus != hipSuccess) {
fprintf(fp,"hipMemcpy failed!");
goto Error;
}
//output result
fprintf( fp, "before output\n " );fflush( fp );
for( int i=0; i<B; i++ ){
fprintf(fp, "%d : %f \n", i, visHist[i]);
}
fprintf( fp, "after output\n " );fflush( fp );
Error:
hipFree(devRawHistogramRay);
hipFree(devVisHist);
hipFree(devOtf);
if(cudaStatus != hipSuccess) {
fprintf(stderr,"addWithCuda failed!");
return 1;
}
} | .text
.amdgcn_target "amdgcn-amd-amdhsa--gfx1100"
.protected _Z10cudaKernelPfPiS_iii
.globl _Z10cudaKernelPfPiS_iii
.p2align 8
.type _Z10cudaKernelPfPiS_iii,@function
_Z10cudaKernelPfPiS_iii:
s_load_b32 s6, s[0:1], 0x20
s_waitcnt lgkmcnt(0)
s_cmp_lt_i32 s6, 1
s_cbranch_scc1 .LBB0_6
s_clause 0x1
s_load_b32 s7, s[0:1], 0x1c
s_load_b64 s[2:3], s[0:1], 0x8
s_mul_i32 s4, s15, s6
s_mov_b32 s1, 0
s_waitcnt lgkmcnt(0)
s_cmp_gt_i32 s7, 0
s_mul_i32 s8, s4, s7
s_cselect_b32 s0, -1, 0
s_delay_alu instid0(SALU_CYCLE_1) | instskip(NEXT) | instid1(VALU_DEP_1)
v_cndmask_b32_e64 v0, 0, 1, s0
v_cmp_ne_u32_e64 s0, 1, v0
s_set_inst_prefetch_distance 0x1
s_branch .LBB0_3
.p2align 6
.LBB0_2:
s_add_i32 s1, s1, 1
s_add_i32 s8, s8, s6
s_cmp_eq_u32 s1, s6
s_cbranch_scc1 .LBB0_6
.LBB0_3:
s_delay_alu instid0(VALU_DEP_1)
s_and_b32 vcc_lo, exec_lo, s0
s_cbranch_vccnz .LBB0_2
v_mov_b32_e32 v0, 16
s_mov_b32 s4, s8
s_mov_b32 s9, s7
.p2align 6
.LBB0_5:
scratch_load_b32 v1, v0, off
s_ashr_i32 s5, s4, 31
s_delay_alu instid0(SALU_CYCLE_1) | instskip(NEXT) | instid1(SALU_CYCLE_1)
s_lshl_b64 s[10:11], s[4:5], 2
s_add_u32 s10, s2, s10
s_addc_u32 s11, s3, s11
s_add_i32 s9, s9, -1
s_load_b32 s5, s[10:11], 0x0
s_add_i32 s4, s4, 1
s_cmp_eq_u32 s9, 0
s_waitcnt lgkmcnt(0)
v_cvt_f32_i32_e32 v2, s5
s_waitcnt vmcnt(0)
s_delay_alu instid0(VALU_DEP_1)
v_add_f32_e32 v1, v1, v2
scratch_store_b32 v0, v1, off
v_add_nc_u32_e32 v0, 4, v0
s_cbranch_scc0 .LBB0_5
s_branch .LBB0_2
.LBB0_6:
s_set_inst_prefetch_distance 0x2
s_endpgm
.section .rodata,"a",@progbits
.p2align 6, 0x0
.amdhsa_kernel _Z10cudaKernelPfPiS_iii
.amdhsa_group_segment_fixed_size 0
.amdhsa_private_segment_fixed_size 528
.amdhsa_kernarg_size 36
.amdhsa_user_sgpr_count 15
.amdhsa_user_sgpr_dispatch_ptr 0
.amdhsa_user_sgpr_queue_ptr 0
.amdhsa_user_sgpr_kernarg_segment_ptr 1
.amdhsa_user_sgpr_dispatch_id 0
.amdhsa_user_sgpr_private_segment_size 0
.amdhsa_wavefront_size32 1
.amdhsa_uses_dynamic_stack 0
.amdhsa_enable_private_segment 1
.amdhsa_system_sgpr_workgroup_id_x 1
.amdhsa_system_sgpr_workgroup_id_y 0
.amdhsa_system_sgpr_workgroup_id_z 0
.amdhsa_system_sgpr_workgroup_info 0
.amdhsa_system_vgpr_workitem_id 0
.amdhsa_next_free_vgpr 3
.amdhsa_next_free_sgpr 16
.amdhsa_float_round_mode_32 0
.amdhsa_float_round_mode_16_64 0
.amdhsa_float_denorm_mode_32 3
.amdhsa_float_denorm_mode_16_64 3
.amdhsa_dx10_clamp 1
.amdhsa_ieee_mode 1
.amdhsa_fp16_overflow 0
.amdhsa_workgroup_processor_mode 1
.amdhsa_memory_ordered 1
.amdhsa_forward_progress 0
.amdhsa_shared_vgpr_count 0
.amdhsa_exception_fp_ieee_invalid_op 0
.amdhsa_exception_fp_denorm_src 0
.amdhsa_exception_fp_ieee_div_zero 0
.amdhsa_exception_fp_ieee_overflow 0
.amdhsa_exception_fp_ieee_underflow 0
.amdhsa_exception_fp_ieee_inexact 0
.amdhsa_exception_int_div_zero 0
.end_amdhsa_kernel
.text
.Lfunc_end0:
.size _Z10cudaKernelPfPiS_iii, .Lfunc_end0-_Z10cudaKernelPfPiS_iii
.section .AMDGPU.csdata,"",@progbits
.text
.p2alignl 7, 3214868480
.fill 96, 4, 3214868480
.type __hip_cuid_,@object
.section .bss,"aw",@nobits
.globl __hip_cuid_
__hip_cuid_:
.byte 0
.size __hip_cuid_, 1
.ident "AMD clang version 18.0.0git (https://github.com/RadeonOpenCompute/llvm-project roc-6.3.2 25012 e5bf7e55c91490b07c49d8960fa7983d864936c4)"
.section ".note.GNU-stack","",@progbits
.addrsig
.addrsig_sym __hip_cuid_
.amdgpu_metadata
---
amdhsa.kernels:
- .args:
- .address_space: global
.offset: 0
.size: 8
.value_kind: global_buffer
- .address_space: global
.offset: 8
.size: 8
.value_kind: global_buffer
- .address_space: global
.offset: 16
.size: 8
.value_kind: global_buffer
- .offset: 24
.size: 4
.value_kind: by_value
- .offset: 28
.size: 4
.value_kind: by_value
- .offset: 32
.size: 4
.value_kind: by_value
.group_segment_fixed_size: 0
.kernarg_segment_align: 8
.kernarg_segment_size: 36
.language: OpenCL C
.language_version:
- 2
- 0
.max_flat_workgroup_size: 1024
.name: _Z10cudaKernelPfPiS_iii
.private_segment_fixed_size: 528
.sgpr_count: 18
.sgpr_spill_count: 0
.symbol: _Z10cudaKernelPfPiS_iii.kd
.uniform_work_group_size: 1
.uses_dynamic_stack: false
.vgpr_count: 3
.vgpr_spill_count: 0
.wavefront_size: 32
.workgroup_processor_mode: 1
amdhsa.target: amdgcn-amd-amdhsa--gfx1100
amdhsa.version:
- 1
- 2
...
.end_amdgpu_metadata |
You are a helpful coding assistant specialized in converting HIP source code to AMD host assembly. | // CUDA runtime
#include <hip/hip_runtime.h>
#include <stdio.h>
__global__ void cudaKernel(float* visHist, int* rawHistogramRay, float* devOtf, int K, int B, int D)
{
//int i = blockDim.x * blockIdx.x + threadIdx.x;
int id = blockIdx.x;
float localVisHist[128];
int base = id * D * B;
int slcSample = 0;
for( int d = 0; d < D; d++ ){
for( int b = 0; b < B; b++ ){
localVisHist[b] += rawHistogramRay[base + d * D + b];
}
}
}
extern "C" double runCudaKernel( float* visHist, int K, int D, int B, float* otf, int* rawHistogramRays )
{
FILE* fp = fopen( "output.txt", "w" );
float* devVisHist = 0;
float* devOtf = 0;
int* devRawHistogramRay = 0;
hipError_t cudaStatus;
//Choose which GPU to run on, change this on a multi-GPU system.
cudaStatus= hipSetDevice(0);
if(cudaStatus != hipSuccess) {
fprintf(fp,"hipSetDevice failed! Do you havea CUDA-capable GPU installed?");
goto Error;
}
//Allocate GPU buffers for three vectors (two input, one output) .
cudaStatus= hipMalloc((void**)&devVisHist, B * sizeof(float));
if(cudaStatus != hipSuccess) {
fprintf(fp,"hipMalloc failed!");
goto Error;
}
cudaStatus= hipMalloc((void**)&devOtf, B * sizeof(float));
if(cudaStatus != hipSuccess) {
fprintf(fp,"hipMalloc failed!");
goto Error;
}
cudaStatus= hipMalloc((void**)&devRawHistogramRay, K * B * D * sizeof(int));
if(cudaStatus != hipSuccess) {
fprintf(fp,"hipMalloc failed!");
goto Error;
}
//Copy input vectors from host memory to GPU buffers.
cudaStatus= hipMemcpy( devRawHistogramRay, rawHistogramRays, K * B * D * sizeof(int), hipMemcpyHostToDevice);
if(cudaStatus != hipSuccess) {
fprintf(fp,"hipMemcpy failed!");
goto Error;
}
cudaStatus= hipMemcpy(devOtf, otf, B * sizeof(float), hipMemcpyHostToDevice);
if(cudaStatus != hipSuccess) {
fprintf(fp,"hipMemcpy failed!");
goto Error;
}
//Launch a kernel on the GPU with one thread for each element.
fprintf( fp, "before kernel\n " );fflush( fp );
cudaKernel<<<K,1>>>(devVisHist, devRawHistogramRay, devOtf, K, B, D);
fprintf( fp, "after kernel\n " );fflush( fp );
//Check for any errors launching the kernel
cudaStatus= hipGetLastError();
if(cudaStatus != hipSuccess) {
fprintf(fp,"addKernel launch failed: %s\n", hipGetErrorString(cudaStatus));
goto Error;
}
//cudaDeviceSynchronize waits for the kernel to finish, and returns
//any errors encountered during the launch.
cudaStatus= hipDeviceSynchronize();
if(cudaStatus != hipSuccess) {
fprintf(fp,"hipDeviceSynchronize returned error code %d after launchingaddKernel!\n", cudaStatus);
goto Error;
}
//Copy output vector from GPU buffer to host memory.
cudaStatus= hipMemcpy(visHist, devVisHist, B * sizeof(float), hipMemcpyDeviceToHost);
if(cudaStatus != hipSuccess) {
fprintf(fp,"hipMemcpy failed!");
goto Error;
}
//output result
fprintf( fp, "before output\n " );fflush( fp );
for( int i=0; i<B; i++ ){
fprintf(fp, "%d : %f \n", i, visHist[i]);
}
fprintf( fp, "after output\n " );fflush( fp );
Error:
hipFree(devRawHistogramRay);
hipFree(devVisHist);
hipFree(devOtf);
if(cudaStatus != hipSuccess) {
fprintf(stderr,"addWithCuda failed!");
return 1;
}
} | .text
.file "cudaKernel.hip"
.globl _Z25__device_stub__cudaKernelPfPiS_iii # -- Begin function _Z25__device_stub__cudaKernelPfPiS_iii
.p2align 4, 0x90
.type _Z25__device_stub__cudaKernelPfPiS_iii,@function
_Z25__device_stub__cudaKernelPfPiS_iii: # @_Z25__device_stub__cudaKernelPfPiS_iii
.cfi_startproc
# %bb.0:
subq $152, %rsp
.cfi_def_cfa_offset 160
movq %rdi, 88(%rsp)
movq %rsi, 80(%rsp)
movq %rdx, 72(%rsp)
movl %ecx, 20(%rsp)
movl %r8d, 16(%rsp)
movl %r9d, 12(%rsp)
leaq 88(%rsp), %rax
movq %rax, 96(%rsp)
leaq 80(%rsp), %rax
movq %rax, 104(%rsp)
leaq 72(%rsp), %rax
movq %rax, 112(%rsp)
leaq 20(%rsp), %rax
movq %rax, 120(%rsp)
leaq 16(%rsp), %rax
movq %rax, 128(%rsp)
leaq 12(%rsp), %rax
movq %rax, 136(%rsp)
leaq 56(%rsp), %rdi
leaq 40(%rsp), %rsi
leaq 32(%rsp), %rdx
leaq 24(%rsp), %rcx
callq __hipPopCallConfiguration
movq 56(%rsp), %rsi
movl 64(%rsp), %edx
movq 40(%rsp), %rcx
movl 48(%rsp), %r8d
leaq 96(%rsp), %r9
movl $_Z10cudaKernelPfPiS_iii, %edi
pushq 24(%rsp)
.cfi_adjust_cfa_offset 8
pushq 40(%rsp)
.cfi_adjust_cfa_offset 8
callq hipLaunchKernel
addq $168, %rsp
.cfi_adjust_cfa_offset -168
retq
.Lfunc_end0:
.size _Z25__device_stub__cudaKernelPfPiS_iii, .Lfunc_end0-_Z25__device_stub__cudaKernelPfPiS_iii
.cfi_endproc
# -- End function
.section .rodata.cst8,"aM",@progbits,8
.p2align 3, 0x0 # -- Begin function runCudaKernel
.LCPI1_0:
.quad 0x3ff0000000000000 # double 1
.text
.globl runCudaKernel
.p2align 4, 0x90
.type runCudaKernel,@function
runCudaKernel: # @runCudaKernel
.cfi_startproc
# %bb.0:
pushq %rbp
.cfi_def_cfa_offset 16
pushq %r15
.cfi_def_cfa_offset 24
pushq %r14
.cfi_def_cfa_offset 32
pushq %r13
.cfi_def_cfa_offset 40
pushq %r12
.cfi_def_cfa_offset 48
pushq %rbx
.cfi_def_cfa_offset 56
subq $56, %rsp
.cfi_def_cfa_offset 112
.cfi_offset %rbx, -56
.cfi_offset %r12, -48
.cfi_offset %r13, -40
.cfi_offset %r14, -32
.cfi_offset %r15, -24
.cfi_offset %rbp, -16
movq %r9, %r12
movq %r8, %r14
movl %ecx, %ebx
movl %edx, %r15d
movl %esi, 20(%rsp) # 4-byte Spill
movq %rdi, %r13
movl $.L.str, %edi
movl $.L.str.1, %esi
callq fopen
movq %rax, %rbp
movq $0, 40(%rsp)
movq $0, 32(%rsp)
movq $0, 24(%rsp)
xorl %edi, %edi
callq hipSetDevice
testl %eax, %eax
jne .LBB1_15
# %bb.1:
movl %r15d, 12(%rsp) # 4-byte Spill
movl %ebx, 16(%rsp) # 4-byte Spill
movslq %ebx, %r15
shlq $2, %r15
leaq 40(%rsp), %rdi
movq %r15, %rsi
callq hipMalloc
testl %eax, %eax
jne .LBB1_16
# %bb.2:
leaq 32(%rsp), %rdi
movq %r15, %rsi
callq hipMalloc
testl %eax, %eax
movq %rbp, %rbx
jne .LBB1_18
# %bb.3:
movq %r13, 48(%rsp) # 8-byte Spill
movl 12(%rsp), %eax # 4-byte Reload
imull 20(%rsp), %eax # 4-byte Folded Reload
imull 16(%rsp), %eax # 4-byte Folded Reload
movslq %eax, %r13
shlq $2, %r13
leaq 24(%rsp), %rdi
movq %r13, %rsi
callq hipMalloc
testl %eax, %eax
jne .LBB1_18
# %bb.4:
movq 24(%rsp), %rdi
movq %r12, %rsi
movq %r13, %rdx
movl $1, %ecx
callq hipMemcpy
testl %eax, %eax
jne .LBB1_19
# %bb.5:
movq 32(%rsp), %rdi
movq %r14, %rsi
movq %r15, %rdx
movl $1, %ecx
callq hipMemcpy
testl %eax, %eax
jne .LBB1_19
# %bb.6:
movl $.L.str.5, %edi
movl $15, %esi
movl $1, %edx
movq %rbx, %rcx
callq fwrite@PLT
movq %rbx, %rdi
callq fflush
movl 20(%rsp), %ebp # 4-byte Reload
movl %ebp, %edi
movabsq $4294967296, %rdx # imm = 0x100000000
orq %rdx, %rdi
orq $1, %rdx
movl $1, %esi
movl $1, %ecx
xorl %r8d, %r8d
xorl %r9d, %r9d
callq __hipPushCallConfiguration
testl %eax, %eax
movl 16(%rsp), %r14d # 4-byte Reload
jne .LBB1_8
# %bb.7:
movq 40(%rsp), %rdi
movq 24(%rsp), %rsi
movq 32(%rsp), %rdx
movl %ebp, %ecx
movl %r14d, %r8d
movl 12(%rsp), %r9d # 4-byte Reload
callq _Z25__device_stub__cudaKernelPfPiS_iii
.LBB1_8:
movl $.L.str.6, %edi
movl $14, %esi
movl $1, %edx
movq %rbx, %rcx
callq fwrite@PLT
movq %rbx, %rdi
callq fflush
callq hipGetLastError
testl %eax, %eax
movq 48(%rsp), %r12 # 8-byte Reload
jne .LBB1_23
# %bb.9:
callq hipDeviceSynchronize
testl %eax, %eax
jne .LBB1_24
# %bb.10:
movq 40(%rsp), %rsi
movq %r12, %rdi
movq %r15, %rdx
movl $2, %ecx
callq hipMemcpy
testl %eax, %eax
jne .LBB1_19
# %bb.11:
movl $.L.str.9, %edi
movl $15, %esi
movl $1, %edx
movq %rbx, %rcx
callq fwrite@PLT
movq %rbx, %rdi
callq fflush
testl %r14d, %r14d
jle .LBB1_14
# %bb.12: # %.lr.ph.preheader
movl %r14d, %r15d
xorl %r14d, %r14d
.p2align 4, 0x90
.LBB1_13: # %.lr.ph
# =>This Inner Loop Header: Depth=1
movss (%r12,%r14,4), %xmm0 # xmm0 = mem[0],zero,zero,zero
cvtss2sd %xmm0, %xmm0
movl $.L.str.10, %esi
movq %rbx, %rdi
movl %r14d, %edx
movb $1, %al
callq fprintf
incq %r14
cmpq %r14, %r15
jne .LBB1_13
.LBB1_14: # %._crit_edge
movl $.L.str.11, %edi
movl $14, %esi
movl $1, %edx
movq %rbx, %rcx
callq fwrite@PLT
movq %rbx, %rdi
callq fflush
jmp .LBB1_22
.LBB1_15:
movl $.L.str.2, %edi
movl $62, %esi
jmp .LBB1_17
.LBB1_16:
movl $.L.str.3, %edi
movl $17, %esi
.LBB1_17:
movl $1, %edx
movq %rbp, %rcx
jmp .LBB1_21
.LBB1_18:
movl $.L.str.3, %edi
jmp .LBB1_20
.LBB1_19:
movl $.L.str.4, %edi
.LBB1_20:
movl $17, %esi
movl $1, %edx
movq %rbx, %rcx
.LBB1_21:
callq fwrite@PLT
.LBB1_22:
movq 24(%rsp), %rdi
callq hipFree
movq 40(%rsp), %rdi
callq hipFree
movq 32(%rsp), %rdi
callq hipFree
movq stderr(%rip), %rcx
movl $.L.str.12, %edi
movl $19, %esi
movl $1, %edx
callq fwrite@PLT
movsd .LCPI1_0(%rip), %xmm0 # xmm0 = mem[0],zero
addq $56, %rsp
.cfi_def_cfa_offset 56
popq %rbx
.cfi_def_cfa_offset 48
popq %r12
.cfi_def_cfa_offset 40
popq %r13
.cfi_def_cfa_offset 32
popq %r14
.cfi_def_cfa_offset 24
popq %r15
.cfi_def_cfa_offset 16
popq %rbp
.cfi_def_cfa_offset 8
retq
.LBB1_23:
.cfi_def_cfa_offset 112
movl %eax, %edi
callq hipGetErrorString
movl $.L.str.7, %esi
movq %rbx, %rdi
movq %rax, %rdx
xorl %eax, %eax
callq fprintf
jmp .LBB1_22
.LBB1_24:
movl $.L.str.8, %esi
movq %rbx, %rdi
movl %eax, %edx
xorl %eax, %eax
callq fprintf
jmp .LBB1_22
.Lfunc_end1:
.size runCudaKernel, .Lfunc_end1-runCudaKernel
.cfi_endproc
# -- End function
.p2align 4, 0x90 # -- Begin function __hip_module_ctor
.type __hip_module_ctor,@function
__hip_module_ctor: # @__hip_module_ctor
.cfi_startproc
# %bb.0:
subq $40, %rsp
.cfi_def_cfa_offset 48
cmpq $0, __hip_gpubin_handle(%rip)
jne .LBB2_2
# %bb.1:
movl $__hip_fatbin_wrapper, %edi
callq __hipRegisterFatBinary
movq %rax, __hip_gpubin_handle(%rip)
.LBB2_2:
movq __hip_gpubin_handle(%rip), %rdi
xorps %xmm0, %xmm0
movups %xmm0, 16(%rsp)
movups %xmm0, (%rsp)
movl $_Z10cudaKernelPfPiS_iii, %esi
movl $.L__unnamed_1, %edx
movl $.L__unnamed_1, %ecx
movl $-1, %r8d
xorl %r9d, %r9d
callq __hipRegisterFunction
movl $__hip_module_dtor, %edi
addq $40, %rsp
.cfi_def_cfa_offset 8
jmp atexit # TAILCALL
.Lfunc_end2:
.size __hip_module_ctor, .Lfunc_end2-__hip_module_ctor
.cfi_endproc
# -- End function
.p2align 4, 0x90 # -- Begin function __hip_module_dtor
.type __hip_module_dtor,@function
__hip_module_dtor: # @__hip_module_dtor
.cfi_startproc
# %bb.0:
movq __hip_gpubin_handle(%rip), %rdi
testq %rdi, %rdi
je .LBB3_2
# %bb.1:
pushq %rax
.cfi_def_cfa_offset 16
callq __hipUnregisterFatBinary
movq $0, __hip_gpubin_handle(%rip)
addq $8, %rsp
.cfi_def_cfa_offset 8
.LBB3_2:
retq
.Lfunc_end3:
.size __hip_module_dtor, .Lfunc_end3-__hip_module_dtor
.cfi_endproc
# -- End function
.type _Z10cudaKernelPfPiS_iii,@object # @_Z10cudaKernelPfPiS_iii
.section .rodata,"a",@progbits
.globl _Z10cudaKernelPfPiS_iii
.p2align 3, 0x0
_Z10cudaKernelPfPiS_iii:
.quad _Z25__device_stub__cudaKernelPfPiS_iii
.size _Z10cudaKernelPfPiS_iii, 8
.type .L.str,@object # @.str
.section .rodata.str1.1,"aMS",@progbits,1
.L.str:
.asciz "output.txt"
.size .L.str, 11
.type .L.str.1,@object # @.str.1
.L.str.1:
.asciz "w"
.size .L.str.1, 2
.type .L.str.2,@object # @.str.2
.L.str.2:
.asciz "hipSetDevice failed! Do you havea CUDA-capable GPU installed?"
.size .L.str.2, 63
.type .L.str.3,@object # @.str.3
.L.str.3:
.asciz "hipMalloc failed!"
.size .L.str.3, 18
.type .L.str.4,@object # @.str.4
.L.str.4:
.asciz "hipMemcpy failed!"
.size .L.str.4, 18
.type .L.str.5,@object # @.str.5
.L.str.5:
.asciz "before kernel\n "
.size .L.str.5, 16
.type .L.str.6,@object # @.str.6
.L.str.6:
.asciz "after kernel\n "
.size .L.str.6, 15
.type .L.str.7,@object # @.str.7
.L.str.7:
.asciz "addKernel launch failed: %s\n"
.size .L.str.7, 29
.type .L.str.8,@object # @.str.8
.L.str.8:
.asciz "hipDeviceSynchronize returned error code %d after launchingaddKernel!\n"
.size .L.str.8, 71
.type .L.str.9,@object # @.str.9
.L.str.9:
.asciz "before output\n "
.size .L.str.9, 16
.type .L.str.10,@object # @.str.10
.L.str.10:
.asciz "%d : %f \n"
.size .L.str.10, 10
.type .L.str.11,@object # @.str.11
.L.str.11:
.asciz "after output\n "
.size .L.str.11, 15
.type .L.str.12,@object # @.str.12
.L.str.12:
.asciz "addWithCuda failed!"
.size .L.str.12, 20
.type .L__unnamed_1,@object # @0
.L__unnamed_1:
.asciz "_Z10cudaKernelPfPiS_iii"
.size .L__unnamed_1, 24
.type __hip_fatbin_wrapper,@object # @__hip_fatbin_wrapper
.section .hipFatBinSegment,"a",@progbits
.p2align 3, 0x0
__hip_fatbin_wrapper:
.long 1212764230 # 0x48495046
.long 1 # 0x1
.quad __hip_fatbin
.quad 0
.size __hip_fatbin_wrapper, 24
.type __hip_gpubin_handle,@object # @__hip_gpubin_handle
.local __hip_gpubin_handle
.comm __hip_gpubin_handle,8,8
.section .init_array,"aw",@init_array
.p2align 3, 0x0
.quad __hip_module_ctor
.type __hip_cuid_,@object # @__hip_cuid_
.bss
.globl __hip_cuid_
__hip_cuid_:
.byte 0 # 0x0
.size __hip_cuid_, 1
.section ".linker-options","e",@llvm_linker_options
.ident "AMD clang version 18.0.0git (https://github.com/RadeonOpenCompute/llvm-project roc-6.3.2 25012 e5bf7e55c91490b07c49d8960fa7983d864936c4)"
.section ".note.GNU-stack","",@progbits
.addrsig
.addrsig_sym _Z25__device_stub__cudaKernelPfPiS_iii
.addrsig_sym __hip_module_ctor
.addrsig_sym __hip_module_dtor
.addrsig_sym _Z10cudaKernelPfPiS_iii
.addrsig_sym __hip_fatbin
.addrsig_sym __hip_fatbin_wrapper
.addrsig_sym __hip_cuid_ |
You are a helpful coding assistant specialized in converting from CUDA device assembly to AMD device assembly. | code for sm_80
Function : _Z10cudaKernelPfPiS_iii
.headerflags @"EF_CUDA_TEXMODE_UNIFIED EF_CUDA_64BIT_ADDRESS EF_CUDA_SM80 EF_CUDA_VIRTUAL_SM(EF_CUDA_SM80)"
/*0000*/ MOV R1, c[0x0][0x28] ; /* 0x00000a0000017a02 */
/* 0x000fc60000000f00 */
/*0010*/ IMAD.MOV.U32 R0, RZ, RZ, 0x1 ; /* 0x00000001ff007424 */
/* 0x000fe200078e00ff */
/*0020*/ IADD3 R1, R1, -0x200, RZ ; /* 0xfffffe0001017810 */
/* 0x000fc80007ffe0ff */
/*0030*/ ISETP.LE.AND P0, PT, R0, c[0x0][0x17c], PT ; /* 0x00005f0000007a0c */
/* 0x000fc80003f03270 */
/*0040*/ ISETP.GT.OR P0, PT, R0, c[0x0][0x180], !P0 ; /* 0x0000600000007a0c */
/* 0x000fda0004704670 */
/*0050*/ @P0 EXIT ; /* 0x000000000000094d */
/* 0x000fea0003800000 */
/*0060*/ S2R R2, SR_CTAID.X ; /* 0x0000000000027919 */
/* 0x000e220000002500 */
/*0070*/ HFMA2.MMA R0, -RZ, RZ, 0, 5.9604644775390625e-08 ; /* 0x00000001ff007435 */
/* 0x000fe200000001ff */
/*0080*/ IMAD.MOV.U32 R20, RZ, RZ, c[0x0][0x17c] ; /* 0x00005f00ff147624 */
/* 0x000fe200078e00ff */
/*0090*/ MOV R19, RZ ; /* 0x000000ff00137202 */
/* 0x000fe20000000f00 */
/*00a0*/ ULDC.64 UR4, c[0x0][0x118] ; /* 0x0000460000047ab9 */
/* 0x000fc60000000a00 */
/*00b0*/ LOP3.LUT R20, R20, 0x3, RZ, 0xc0, !PT ; /* 0x0000000314147812 */
/* 0x000fc800078ec0ff */
/*00c0*/ IADD3 R0, -R0, c[0x0][0x17c], RZ ; /* 0x00005f0000007a10 */
/* 0x000fe40007ffe1ff */
/*00d0*/ IADD3 R18, -R20, c[0x0][0x17c], RZ ; /* 0x00005f0014127a10 */
/* 0x000fe40007ffe1ff */
/*00e0*/ ISETP.GE.U32.AND P1, PT, R0, 0x3, PT ; /* 0x000000030000780c */
/* 0x000fce0003f26070 */
/*00f0*/ IMAD R16, R2, c[0x0][0x17c], R19 ; /* 0x00005f0002107a24 */
/* 0x001fe200078e0213 */
/*0100*/ IADD3 R19, R19, 0x1, RZ ; /* 0x0000000113137810 */
/* 0x000fe20007ffe0ff */
/*0110*/ IMAD.MOV.U32 R17, RZ, RZ, RZ ; /* 0x000000ffff117224 */
/* 0x000fe400078e00ff */
/*0120*/ IMAD R16, R16, c[0x0][0x180], RZ ; /* 0x0000600010107a24 */
/* 0x000fe200078e02ff */
/*0130*/ ISETP.GE.AND P2, PT, R19, c[0x0][0x180], PT ; /* 0x0000600013007a0c */
/* 0x000fe20003f46270 */
/*0140*/ @!P1 BRA 0x9a0 ; /* 0x0000085000009947 */
/* 0x000fea0003800000 */
/*0150*/ ISETP.GT.AND P0, PT, R18, RZ, PT ; /* 0x000000ff1200720c */
/* 0x000fe20003f04270 */
/*0160*/ HFMA2.MMA R23, -RZ, RZ, 0, 2.384185791015625e-07 ; /* 0x00000004ff177435 */
/* 0x000fe200000001ff */
/*0170*/ IMAD.MOV.U32 R17, RZ, RZ, RZ ; /* 0x000000ffff117224 */
/* 0x000fe200078e00ff */
/*0180*/ MOV R0, R1 ; /* 0x0000000100007202 */
/* 0x000fe20000000f00 */
/*0190*/ IMAD.MOV.U32 R3, RZ, RZ, R18 ; /* 0x000000ffff037224 */
/* 0x000fce00078e0012 */
/*01a0*/ IMAD.WIDE R22, R16, R23, c[0x0][0x168] ; /* 0x00005a0010167625 */
/* 0x000fe400078e0217 */
/*01b0*/ @!P0 BRA 0x850 ; /* 0x0000069000008947 */
/* 0x000fea0003800000 */
/*01c0*/ ISETP.GT.AND P3, PT, R3, 0xc, PT ; /* 0x0000000c0300780c */
/* 0x000fe40003f64270 */
/*01d0*/ PLOP3.LUT P0, PT, PT, PT, PT, 0x80, 0x0 ; /* 0x000000000000781c */
/* 0x000fd60003f0f070 */
/*01e0*/ @!P3 BRA 0x5f0 ; /* 0x000004000000b947 */
/* 0x000fea0003800000 */
/*01f0*/ PLOP3.LUT P0, PT, PT, PT, PT, 0x8, 0x0 ; /* 0x000000000000781c */
/* 0x000fe40003f0e170 */
/*0200*/ LDG.E.CONSTANT R12, [R22.64+0xc] ; /* 0x00000c04160c7981 */
/* 0x000ea8000c1e9900 */
/*0210*/ LDG.E.CONSTANT R28, [R22.64+0x4] ; /* 0x00000404161c7981 */
/* 0x000ee8000c1e9900 */
/*0220*/ LDG.E.CONSTANT R21, [R22.64] ; /* 0x0000000416157981 */
/* 0x000f28000c1e9900 */
/*0230*/ LDG.E.CONSTANT R29, [R22.64+0x8] ; /* 0x00000804161d7981 */
/* 0x000f68000c1e9900 */
/*0240*/ LDL.128 R4, [R0] ; /* 0x0000000000047983 */
/* 0x000f280000100c00 */
/*0250*/ LDG.E.CONSTANT R25, [R22.64+0x10] ; /* 0x0000100416197981 */
/* 0x000f68000c1e9900 */
/*0260*/ LDL.128 R8, [R0+0x10] ; /* 0x0000100000087983 */
/* 0x000f680000100c00 */
/*0270*/ LDG.E.CONSTANT R24, [R22.64+0x14] ; /* 0x0000140416187981 */
/* 0x000f68000c1e9900 */
/*0280*/ LDG.E.CONSTANT R27, [R22.64+0x18] ; /* 0x00001804161b7981 */
/* 0x000f62000c1e9900 */
/*0290*/ I2F R26, R12 ; /* 0x0000000c001a7306 */
/* 0x004e300000201400 */
/*02a0*/ I2F R28, R28 ; /* 0x0000001c001c7306 */
/* 0x008e700000201400 */
/*02b0*/ I2F R21, R21 ; /* 0x0000001500157306 */
/* 0x010ea20000201400 */
/*02c0*/ FADD R15, R7, R26 ; /* 0x0000001a070f7221 */
/* 0x001fc40000000000 */
/*02d0*/ LDG.E.CONSTANT R26, [R22.64+0x1c] ; /* 0x00001c04161a7981 */
/* 0x000eea000c1e9900 */
/*02e0*/ I2F R29, R29 ; /* 0x0000001d001d7306 */
/* 0x020e220000201400 */
/*02f0*/ FADD R13, R5, R28 ; /* 0x0000001c050d7221 */
/* 0x002fe40000000000 */
/*0300*/ LDG.E.CONSTANT R28, [R22.64+0x28] ; /* 0x00002804161c7981 */
/* 0x000f22000c1e9900 */
/*0310*/ FADD R12, R21, R4 ; /* 0x00000004150c7221 */
/* 0x004fc80000000000 */
/*0320*/ I2F R5, R25 ; /* 0x0000001900057306 */
/* 0x0002a20000201400 */
/*0330*/ LDG.E.CONSTANT R21, [R22.64+0x20] ; /* 0x0000200416157981 */
/* 0x000f62000c1e9900 */
/*0340*/ FADD R14, R6, R29 ; /* 0x0000001d060e7221 */
/* 0x001fc60000000000 */
/*0350*/ LDG.E.CONSTANT R29, [R22.64+0x24] ; /* 0x00002404161d7981 */
/* 0x000f68000c1e9900 */
/*0360*/ LDG.E.CONSTANT R25, [R22.64+0x2c] ; /* 0x00002c0416197981 */
/* 0x002f62000c1e9900 */
/*0370*/ FADD R8, R5, R8 ; /* 0x0000000805087221 */
/* 0x004fc60000000000 */
/*0380*/ LDL.128 R4, [R0+0x20] ; /* 0x0000200000047983 */
/* 0x000ea20000100c00 */
/*0390*/ I2F R24, R24 ; /* 0x0000001800187306 */
/* 0x000e300000201400 */
/*03a0*/ I2F R27, R27 ; /* 0x0000001b001b7306 */
/* 0x000e620000201400 */
/*03b0*/ STL.128 [R0], R12 ; /* 0x0000000c00007387 */
/* 0x0009e20000100c00 */
/*03c0*/ FADD R9, R9, R24 ; /* 0x0000001809097221 */
/* 0x001fc60000000000 */
/*03d0*/ LDG.E.CONSTANT R24, [R22.64+0x3c] ; /* 0x00003c0416187981 */
/* 0x000ea2000c1e9900 */
/*03e0*/ FADD R10, R10, R27 ; /* 0x0000001b0a0a7221 */
/* 0x002fc60000000000 */
/*03f0*/ LDG.E.CONSTANT R27, [R22.64+0x34] ; /* 0x00003404161b7981 */
/* 0x000ea2000c1e9900 */
/*0400*/ I2F R26, R26 ; /* 0x0000001a001a7306 */
/* 0x008e300000201400 */
/*0410*/ I2F R13, R28 ; /* 0x0000001c000d7306 */
/* 0x010ff00000201400 */
/*0420*/ I2F R15, R21 ; /* 0x00000015000f7306 */
/* 0x0202a20000201400 */
/*0430*/ FADD R11, R11, R26 ; /* 0x0000001a0b0b7221 */
/* 0x001fc40000000000 */
/*0440*/ LDG.E.CONSTANT R26, [R22.64+0x38] ; /* 0x00003804161a7981 */
/* 0x0000ea000c1e9900 */
/*0450*/ I2F R14, R29 ; /* 0x0000001d000e7306 */
/* 0x000f220000201400 */
/*0460*/ LDG.E.CONSTANT R21, [R22.64+0x30] ; /* 0x0000300416157981 */
/* 0x00216e000c1e9900 */
/*0470*/ I2F R12, R25 ; /* 0x00000019000c7306 */
/* 0x000e620000201400 */
/*0480*/ FADD R4, R15, R4 ; /* 0x000000040f047221 */
/* 0x004fc40000000000 */
/*0490*/ FADD R6, R6, R13 ; /* 0x0000000d06067221 */
/* 0x000fe40000000000 */
/*04a0*/ FADD R5, R5, R14 ; /* 0x0000000e05057221 */
/* 0x010fe40000000000 */
/*04b0*/ FADD R7, R7, R12 ; /* 0x0000000c07077221 */
/* 0x002fe40000000000 */
/*04c0*/ LDL.128 R12, [R0+0x30] ; /* 0x00003000000c7983 */
/* 0x000ea20000100c00 */
/*04d0*/ I2F R24, R24 ; /* 0x0000001800187306 */
/* 0x000fe20000201400 */
/*04e0*/ IADD3 R3, R3, -0x10, RZ ; /* 0xfffffff003037810 */
/* 0x000fce0007ffe0ff */
/*04f0*/ I2F R28, R27 ; /* 0x0000001b001c7306 */
/* 0x000fe20000201400 */
/*0500*/ ISETP.GT.AND P3, PT, R3, 0xc, PT ; /* 0x0000000c0300780c */
/* 0x000fe40003f64270 */
/*0510*/ IADD3 R22, P4, R22, 0x40, RZ ; /* 0x0000004016167810 */
/* 0x001fe20007f9e0ff */
/*0520*/ STL.128 [R0+0x10], R8 ; /* 0x0000100800007387 */
/* 0x000fe20000100c00 */
/*0530*/ IADD3 R17, R17, 0x10, RZ ; /* 0x0000001011117810 */
/* 0x000fe40007ffe0ff */
/*0540*/ IADD3.X R23, RZ, R23, RZ, P4, !PT ; /* 0x00000017ff177210 */
/* 0x000fe200027fe4ff */
/*0550*/ STL.128 [R0+0x20], R4 ; /* 0x0000200400007387 */
/* 0x000fe20000100c00 */
/*0560*/ I2F R25, R26 ; /* 0x0000001a00197306 */
/* 0x008ff00000201400 */
/*0570*/ I2F R21, R21 ; /* 0x0000001500157306 */
/* 0x020ea40000201400 */
/*0580*/ FADD R12, R21, R12 ; /* 0x0000000c150c7221 */
/* 0x004fc40000000000 */
/*0590*/ FADD R13, R13, R28 ; /* 0x0000001c0d0d7221 */
/* 0x000fe40000000000 */
/*05a0*/ FADD R14, R14, R25 ; /* 0x000000190e0e7221 */
/* 0x000fe40000000000 */
/*05b0*/ FADD R15, R15, R24 ; /* 0x000000180f0f7221 */
/* 0x000fca0000000000 */
/*05c0*/ STL.128 [R0+0x30], R12 ; /* 0x0000300c00007387 */
/* 0x0001e40000100c00 */
/*05d0*/ IADD3 R0, R0, 0x40, RZ ; /* 0x0000004000007810 */
/* 0x001fe20007ffe0ff */
/*05e0*/ @P3 BRA 0x200 ; /* 0xfffffc1000003947 */
/* 0x000fea000383ffff */
/*05f0*/ ISETP.GT.AND P3, PT, R3, 0x4, PT ; /* 0x000000040300780c */
/* 0x000fda0003f64270 */
/*0600*/ @!P3 BRA 0x830 ; /* 0x000002200000b947 */
/* 0x000fea0003800000 */
/*0610*/ LDG.E.CONSTANT R25, [R22.64] ; /* 0x0000000416197981 */
/* 0x0000a8000c1e9900 */
/*0620*/ LDG.E.CONSTANT R26, [R22.64+0x4] ; /* 0x00000404161a7981 */
/* 0x0000e8000c1e9900 */
/*0630*/ LDG.E.CONSTANT R21, [R22.64+0x8] ; /* 0x0000080416157981 */
/* 0x000128000c1e9900 */
/*0640*/ LDG.E.CONSTANT R24, [R22.64+0xc] ; /* 0x00000c0416187981 */
/* 0x000168000c1e9900 */
/*0650*/ LDG.E.CONSTANT R15, [R22.64+0x10] ; /* 0x00001004160f7981 */
/* 0x000128000c1e9900 */
/*0660*/ LDG.E.CONSTANT R14, [R22.64+0x14] ; /* 0x00001404160e7981 */
/* 0x000168000c1e9900 */
/*0670*/ LDG.E.CONSTANT R13, [R22.64+0x18] ; /* 0x00001804160d7981 */
/* 0x000168000c1e9900 */
/*0680*/ LDG.E.CONSTANT R12, [R22.64+0x1c] ; /* 0x00001c04160c7981 */
/* 0x000168000c1e9900 */
/*0690*/ LDL.128 R8, [R0] ; /* 0x0000000000087983 */
/* 0x000f680000100c00 */
/*06a0*/ LDL.128 R4, [R0+0x10] ; /* 0x0000100000047983 */
/* 0x000f620000100c00 */
/*06b0*/ IADD3 R22, P3, R22, 0x20, RZ ; /* 0x0000002016167810 */
/* 0x001fc40007f7e0ff */
/*06c0*/ PLOP3.LUT P0, PT, PT, PT, PT, 0x8, 0x0 ; /* 0x000000000000781c */
/* 0x000fe40003f0e170 */
/*06d0*/ IADD3 R17, R17, 0x8, RZ ; /* 0x0000000811117810 */
/* 0x000fe20007ffe0ff */
/*06e0*/ IMAD.X R23, RZ, RZ, R23, P3 ; /* 0x000000ffff177224 */
/* 0x000fe200018e0617 */
/*06f0*/ IADD3 R3, R3, -0x8, RZ ; /* 0xfffffff803037810 */
/* 0x000fe20007ffe0ff */
/*0700*/ I2F R25, R25 ; /* 0x0000001900197306 */
/* 0x004e300000201400 */
/*0710*/ I2F R26, R26 ; /* 0x0000001a001a7306 */
/* 0x008e700000201400 */
/*0720*/ I2F R21, R21 ; /* 0x0000001500157306 */
/* 0x010eb00000201400 */
/*0730*/ I2F R24, R24 ; /* 0x0000001800187306 */
/* 0x020ef00000201400 */
/*0740*/ I2F R15, R15 ; /* 0x0000000f000f7306 */
/* 0x000f300000201400 */
/*0750*/ I2F R14, R14 ; /* 0x0000000e000e7306 */
/* 0x000f700000201400 */
/*0760*/ I2F R13, R13 ; /* 0x0000000d000d7306 */
/* 0x000f300000201400 */
/*0770*/ I2F R12, R12 ; /* 0x0000000c000c7306 */
/* 0x000f620000201400 */
/*0780*/ FADD R8, R25, R8 ; /* 0x0000000819087221 */
/* 0x001fc40000000000 */
/*0790*/ FADD R9, R9, R26 ; /* 0x0000001a09097221 */
/* 0x002fe40000000000 */
/*07a0*/ FADD R10, R10, R21 ; /* 0x000000150a0a7221 */
/* 0x004fe40000000000 */
/*07b0*/ FADD R11, R11, R24 ; /* 0x000000180b0b7221 */
/* 0x008fe40000000000 */
/*07c0*/ FADD R4, R15, R4 ; /* 0x000000040f047221 */
/* 0x010fe40000000000 */
/*07d0*/ FADD R5, R5, R14 ; /* 0x0000000e05057221 */
/* 0x020fe40000000000 */
/*07e0*/ FADD R6, R6, R13 ; /* 0x0000000d06067221 */
/* 0x000fc40000000000 */
/*07f0*/ FADD R7, R7, R12 ; /* 0x0000000c07077221 */
/* 0x000fe20000000000 */
/*0800*/ STL.128 [R0], R8 ; /* 0x0000000800007387 */
/* 0x000fe80000100c00 */
/*0810*/ STL.128 [R0+0x10], R4 ; /* 0x0000100400007387 */
/* 0x0001e40000100c00 */
/*0820*/ IADD3 R0, R0, 0x20, RZ ; /* 0x0000002000007810 */
/* 0x001fe40007ffe0ff */
/*0830*/ ISETP.NE.OR P0, PT, R3, RZ, P0 ; /* 0x000000ff0300720c */
/* 0x000fda0000705670 */
/*0840*/ @!P0 BRA 0x9a0 ; /* 0x0000015000008947 */
/* 0x000fea0003800000 */
/*0850*/ LDG.E.CONSTANT R8, [R22.64] ; /* 0x0000000416087981 */
/* 0x0000a8000c1e9900 */
/*0860*/ LDG.E.CONSTANT R10, [R22.64+0x4] ; /* 0x00000404160a7981 */
/* 0x0000e8000c1e9900 */
/*0870*/ LDG.E.CONSTANT R11, [R22.64+0x8] ; /* 0x00000804160b7981 */
/* 0x000128000c1e9900 */
/*0880*/ LDG.E.CONSTANT R12, [R22.64+0xc] ; /* 0x00000c04160c7981 */
/* 0x000168000c1e9900 */
/*0890*/ LDL.128 R4, [R0] ; /* 0x0000000000047983 */
/* 0x000f220000100c00 */
/*08a0*/ IADD3 R3, R3, -0x4, RZ ; /* 0xfffffffc03037810 */
/* 0x000fc40007ffe0ff */
/*08b0*/ IADD3 R17, R17, 0x4, RZ ; /* 0x0000000411117810 */
/* 0x000fe40007ffe0ff */
/*08c0*/ ISETP.NE.AND P0, PT, R3, RZ, PT ; /* 0x000000ff0300720c */
/* 0x000fe40003f05270 */
/*08d0*/ IADD3 R22, P3, R22, 0x10, RZ ; /* 0x0000001016167810 */
/* 0x001fc80007f7e0ff */
/*08e0*/ IADD3.X R23, RZ, R23, RZ, P3, !PT ; /* 0x00000017ff177210 */
/* 0x000fe20001ffe4ff */
/*08f0*/ I2F R9, R8 ; /* 0x0000000800097306 */
/* 0x004e300000201400 */
/*0900*/ I2F R10, R10 ; /* 0x0000000a000a7306 */
/* 0x008e700000201400 */
/*0910*/ I2F R11, R11 ; /* 0x0000000b000b7306 */
/* 0x010ea20000201400 */
/*0920*/ FADD R4, R4, R9 ; /* 0x0000000904047221 */
/* 0x001fce0000000000 */
/*0930*/ I2F R12, R12 ; /* 0x0000000c000c7306 */
/* 0x020e220000201400 */
/*0940*/ FADD R5, R5, R10 ; /* 0x0000000a05057221 */
/* 0x002fe40000000000 */
/*0950*/ FADD R6, R6, R11 ; /* 0x0000000b06067221 */
/* 0x004fe40000000000 */
/*0960*/ FADD R7, R7, R12 ; /* 0x0000000c07077221 */
/* 0x001fca0000000000 */
/*0970*/ STL.128 [R0], R4 ; /* 0x0000000400007387 */
/* 0x0001e40000100c00 */
/*0980*/ IADD3 R0, R0, 0x10, RZ ; /* 0x0000001000007810 */
/* 0x001fe20007ffe0ff */
/*0990*/ @P0 BRA 0x850 ; /* 0xfffffeb000000947 */
/* 0x000fea000383ffff */
/*09a0*/ ISETP.NE.AND P0, PT, R20, RZ, PT ; /* 0x000000ff1400720c */
/* 0x000fda0003f05270 */
/*09b0*/ @!P0 BRA 0xb20 ; /* 0x0000016000008947 */
/* 0x000fea0003800000 */
/*09c0*/ HFMA2.MMA R5, -RZ, RZ, 0, 2.384185791015625e-07 ; /* 0x00000004ff057435 */
/* 0x000fe200000001ff */
/*09d0*/ IMAD.IADD R4, R16, 0x1, R17 ; /* 0x0000000110047824 */
/* 0x000fd200078e0211 */
/*09e0*/ IMAD.WIDE R4, R4, R5, c[0x0][0x168] ; /* 0x00005a0004047625 */
/* 0x000fca00078e0205 */
/*09f0*/ LDG.E.CONSTANT R0, [R4.64] ; /* 0x0000000404007981 */
/* 0x000ea2000c1e9900 */
/*0a00*/ LEA R17, R17, R1, 0x2 ; /* 0x0000000111117211 */
/* 0x000fca00078e10ff */
/*0a10*/ LDL R3, [R17] ; /* 0x0000000011037983 */
/* 0x000ee20000100800 */
/*0a20*/ ISETP.NE.AND P0, PT, R20, 0x1, PT ; /* 0x000000011400780c */
/* 0x000fe20003f05270 */
/*0a30*/ I2F R0, R0 ; /* 0x0000000000007306 */
/* 0x004ee40000201400 */
/*0a40*/ FADD R6, R0, R3 ; /* 0x0000000300067221 */
/* 0x008fca0000000000 */
/*0a50*/ STL [R17], R6 ; /* 0x0000000611007387 */
/* 0x0001ea0000100800 */
/*0a60*/ @!P0 BRA 0xb20 ; /* 0x000000b000008947 */
/* 0x000fea0003800000 */
/*0a70*/ ISETP.NE.AND P0, PT, R20, 0x2, PT ; /* 0x000000021400780c */
/* 0x000fe20003f05270 */
/*0a80*/ LDG.E.CONSTANT R0, [R4.64+0x4] ; /* 0x0000040404007981 */
/* 0x000ea8000c1e9900 */
/*0a90*/ LDL R7, [R17+0x4] ; /* 0x0000040011077983 */
/* 0x000ef00000100800 */
/*0aa0*/ @P0 LDG.E.CONSTANT R3, [R4.64+0x8] ; /* 0x0000080404030981 */
/* 0x000f28000c1e9900 */
/*0ab0*/ @P0 LDL R8, [R17+0x8] ; /* 0x0000080011080983 */
/* 0x000f620000100800 */
/*0ac0*/ I2F R0, R0 ; /* 0x0000000000007306 */
/* 0x004ef00000201400 */
/*0ad0*/ @P0 I2F R3, R3 ; /* 0x0000000300030306 */
/* 0x010f620000201400 */
/*0ae0*/ FADD R6, R0, R7 ; /* 0x0000000700067221 */
/* 0x009fca0000000000 */
/*0af0*/ STL [R17+0x4], R6 ; /* 0x0000040611007387 */
/* 0x0001e20000100800 */
/*0b00*/ @P0 FADD R8, R3, R8 ; /* 0x0000000803080221 */
/* 0x020fca0000000000 */
/*0b10*/ @P0 STL [R17+0x8], R8 ; /* 0x0000080811000387 */
/* 0x0001e40000100800 */
/*0b20*/ @!P2 BRA 0xf0 ; /* 0xfffff5c00000a947 */
/* 0x000fea000383ffff */
/*0b30*/ EXIT ; /* 0x000000000000794d */
/* 0x000fea0003800000 */
/*0b40*/ BRA 0xb40; /* 0xfffffff000007947 */
/* 0x000fc0000383ffff */
/*0b50*/ NOP; /* 0x0000000000007918 */
/* 0x000fc00000000000 */
/*0b60*/ NOP; /* 0x0000000000007918 */
/* 0x000fc00000000000 */
/*0b70*/ NOP; /* 0x0000000000007918 */
/* 0x000fc00000000000 */
/*0b80*/ NOP; /* 0x0000000000007918 */
/* 0x000fc00000000000 */
/*0b90*/ NOP; /* 0x0000000000007918 */
/* 0x000fc00000000000 */
/*0ba0*/ NOP; /* 0x0000000000007918 */
/* 0x000fc00000000000 */
/*0bb0*/ NOP; /* 0x0000000000007918 */
/* 0x000fc00000000000 */
/*0bc0*/ NOP; /* 0x0000000000007918 */
/* 0x000fc00000000000 */
/*0bd0*/ NOP; /* 0x0000000000007918 */
/* 0x000fc00000000000 */
/*0be0*/ NOP; /* 0x0000000000007918 */
/* 0x000fc00000000000 */
/*0bf0*/ NOP; /* 0x0000000000007918 */
/* 0x000fc00000000000 */
.......... | .text
.amdgcn_target "amdgcn-amd-amdhsa--gfx1100"
.protected _Z10cudaKernelPfPiS_iii
.globl _Z10cudaKernelPfPiS_iii
.p2align 8
.type _Z10cudaKernelPfPiS_iii,@function
_Z10cudaKernelPfPiS_iii:
s_load_b32 s6, s[0:1], 0x20
s_waitcnt lgkmcnt(0)
s_cmp_lt_i32 s6, 1
s_cbranch_scc1 .LBB0_6
s_clause 0x1
s_load_b32 s7, s[0:1], 0x1c
s_load_b64 s[2:3], s[0:1], 0x8
s_mul_i32 s4, s15, s6
s_mov_b32 s1, 0
s_waitcnt lgkmcnt(0)
s_cmp_gt_i32 s7, 0
s_mul_i32 s8, s4, s7
s_cselect_b32 s0, -1, 0
s_delay_alu instid0(SALU_CYCLE_1) | instskip(NEXT) | instid1(VALU_DEP_1)
v_cndmask_b32_e64 v0, 0, 1, s0
v_cmp_ne_u32_e64 s0, 1, v0
s_set_inst_prefetch_distance 0x1
s_branch .LBB0_3
.p2align 6
.LBB0_2:
s_add_i32 s1, s1, 1
s_add_i32 s8, s8, s6
s_cmp_eq_u32 s1, s6
s_cbranch_scc1 .LBB0_6
.LBB0_3:
s_delay_alu instid0(VALU_DEP_1)
s_and_b32 vcc_lo, exec_lo, s0
s_cbranch_vccnz .LBB0_2
v_mov_b32_e32 v0, 16
s_mov_b32 s4, s8
s_mov_b32 s9, s7
.p2align 6
.LBB0_5:
scratch_load_b32 v1, v0, off
s_ashr_i32 s5, s4, 31
s_delay_alu instid0(SALU_CYCLE_1) | instskip(NEXT) | instid1(SALU_CYCLE_1)
s_lshl_b64 s[10:11], s[4:5], 2
s_add_u32 s10, s2, s10
s_addc_u32 s11, s3, s11
s_add_i32 s9, s9, -1
s_load_b32 s5, s[10:11], 0x0
s_add_i32 s4, s4, 1
s_cmp_eq_u32 s9, 0
s_waitcnt lgkmcnt(0)
v_cvt_f32_i32_e32 v2, s5
s_waitcnt vmcnt(0)
s_delay_alu instid0(VALU_DEP_1)
v_add_f32_e32 v1, v1, v2
scratch_store_b32 v0, v1, off
v_add_nc_u32_e32 v0, 4, v0
s_cbranch_scc0 .LBB0_5
s_branch .LBB0_2
.LBB0_6:
s_set_inst_prefetch_distance 0x2
s_endpgm
.section .rodata,"a",@progbits
.p2align 6, 0x0
.amdhsa_kernel _Z10cudaKernelPfPiS_iii
.amdhsa_group_segment_fixed_size 0
.amdhsa_private_segment_fixed_size 528
.amdhsa_kernarg_size 36
.amdhsa_user_sgpr_count 15
.amdhsa_user_sgpr_dispatch_ptr 0
.amdhsa_user_sgpr_queue_ptr 0
.amdhsa_user_sgpr_kernarg_segment_ptr 1
.amdhsa_user_sgpr_dispatch_id 0
.amdhsa_user_sgpr_private_segment_size 0
.amdhsa_wavefront_size32 1
.amdhsa_uses_dynamic_stack 0
.amdhsa_enable_private_segment 1
.amdhsa_system_sgpr_workgroup_id_x 1
.amdhsa_system_sgpr_workgroup_id_y 0
.amdhsa_system_sgpr_workgroup_id_z 0
.amdhsa_system_sgpr_workgroup_info 0
.amdhsa_system_vgpr_workitem_id 0
.amdhsa_next_free_vgpr 3
.amdhsa_next_free_sgpr 16
.amdhsa_float_round_mode_32 0
.amdhsa_float_round_mode_16_64 0
.amdhsa_float_denorm_mode_32 3
.amdhsa_float_denorm_mode_16_64 3
.amdhsa_dx10_clamp 1
.amdhsa_ieee_mode 1
.amdhsa_fp16_overflow 0
.amdhsa_workgroup_processor_mode 1
.amdhsa_memory_ordered 1
.amdhsa_forward_progress 0
.amdhsa_shared_vgpr_count 0
.amdhsa_exception_fp_ieee_invalid_op 0
.amdhsa_exception_fp_denorm_src 0
.amdhsa_exception_fp_ieee_div_zero 0
.amdhsa_exception_fp_ieee_overflow 0
.amdhsa_exception_fp_ieee_underflow 0
.amdhsa_exception_fp_ieee_inexact 0
.amdhsa_exception_int_div_zero 0
.end_amdhsa_kernel
.text
.Lfunc_end0:
.size _Z10cudaKernelPfPiS_iii, .Lfunc_end0-_Z10cudaKernelPfPiS_iii
.section .AMDGPU.csdata,"",@progbits
.text
.p2alignl 7, 3214868480
.fill 96, 4, 3214868480
.type __hip_cuid_,@object
.section .bss,"aw",@nobits
.globl __hip_cuid_
__hip_cuid_:
.byte 0
.size __hip_cuid_, 1
.ident "AMD clang version 18.0.0git (https://github.com/RadeonOpenCompute/llvm-project roc-6.3.2 25012 e5bf7e55c91490b07c49d8960fa7983d864936c4)"
.section ".note.GNU-stack","",@progbits
.addrsig
.addrsig_sym __hip_cuid_
.amdgpu_metadata
---
amdhsa.kernels:
- .args:
- .address_space: global
.offset: 0
.size: 8
.value_kind: global_buffer
- .address_space: global
.offset: 8
.size: 8
.value_kind: global_buffer
- .address_space: global
.offset: 16
.size: 8
.value_kind: global_buffer
- .offset: 24
.size: 4
.value_kind: by_value
- .offset: 28
.size: 4
.value_kind: by_value
- .offset: 32
.size: 4
.value_kind: by_value
.group_segment_fixed_size: 0
.kernarg_segment_align: 8
.kernarg_segment_size: 36
.language: OpenCL C
.language_version:
- 2
- 0
.max_flat_workgroup_size: 1024
.name: _Z10cudaKernelPfPiS_iii
.private_segment_fixed_size: 528
.sgpr_count: 18
.sgpr_spill_count: 0
.symbol: _Z10cudaKernelPfPiS_iii.kd
.uniform_work_group_size: 1
.uses_dynamic_stack: false
.vgpr_count: 3
.vgpr_spill_count: 0
.wavefront_size: 32
.workgroup_processor_mode: 1
amdhsa.target: amdgcn-amd-amdhsa--gfx1100
amdhsa.version:
- 1
- 2
...
.end_amdgpu_metadata |
You are a helpful coding assistant specialized in converting from CUDA host assembly to AMD host assembly. | .file "tmpxft_001587f3_00000000-6_cudaKernel.cudafe1.cpp"
.text
#APP
#NO_APP
.type _ZL26__cudaUnregisterBinaryUtilv, @function
_ZL26__cudaUnregisterBinaryUtilv:
.LFB2060:
.cfi_startproc
endbr64
subq $8, %rsp
.cfi_def_cfa_offset 16
movq _ZL20__cudaFatCubinHandle(%rip), %rdi
call __cudaUnregisterFatBinary@PLT
addq $8, %rsp
.cfi_def_cfa_offset 8
ret
.cfi_endproc
.LFE2060:
.size _ZL26__cudaUnregisterBinaryUtilv, .-_ZL26__cudaUnregisterBinaryUtilv
.globl _Z37__device_stub__Z10cudaKernelPfPiS_iiiPfPiS_iii
.type _Z37__device_stub__Z10cudaKernelPfPiS_iiiPfPiS_iii, @function
_Z37__device_stub__Z10cudaKernelPfPiS_iiiPfPiS_iii:
.LFB2082:
.cfi_startproc
endbr64
subq $184, %rsp
.cfi_def_cfa_offset 192
movq %rdi, 40(%rsp)
movq %rsi, 32(%rsp)
movq %rdx, 24(%rsp)
movl %ecx, 20(%rsp)
movl %r8d, 16(%rsp)
movl %r9d, 12(%rsp)
movq %fs:40, %rax
movq %rax, 168(%rsp)
xorl %eax, %eax
leaq 40(%rsp), %rax
movq %rax, 112(%rsp)
leaq 32(%rsp), %rax
movq %rax, 120(%rsp)
leaq 24(%rsp), %rax
movq %rax, 128(%rsp)
leaq 20(%rsp), %rax
movq %rax, 136(%rsp)
leaq 16(%rsp), %rax
movq %rax, 144(%rsp)
leaq 12(%rsp), %rax
movq %rax, 152(%rsp)
movl $1, 64(%rsp)
movl $1, 68(%rsp)
movl $1, 72(%rsp)
movl $1, 76(%rsp)
movl $1, 80(%rsp)
movl $1, 84(%rsp)
leaq 56(%rsp), %rcx
leaq 48(%rsp), %rdx
leaq 76(%rsp), %rsi
leaq 64(%rsp), %rdi
call __cudaPopCallConfiguration@PLT
testl %eax, %eax
je .L7
.L3:
movq 168(%rsp), %rax
subq %fs:40, %rax
jne .L8
addq $184, %rsp
.cfi_remember_state
.cfi_def_cfa_offset 8
ret
.L7:
.cfi_restore_state
pushq 56(%rsp)
.cfi_def_cfa_offset 200
pushq 56(%rsp)
.cfi_def_cfa_offset 208
leaq 128(%rsp), %r9
movq 92(%rsp), %rcx
movl 100(%rsp), %r8d
movq 80(%rsp), %rsi
movl 88(%rsp), %edx
leaq _Z10cudaKernelPfPiS_iii(%rip), %rdi
call cudaLaunchKernel@PLT
addq $16, %rsp
.cfi_def_cfa_offset 192
jmp .L3
.L8:
call __stack_chk_fail@PLT
.cfi_endproc
.LFE2082:
.size _Z37__device_stub__Z10cudaKernelPfPiS_iiiPfPiS_iii, .-_Z37__device_stub__Z10cudaKernelPfPiS_iiiPfPiS_iii
.globl _Z10cudaKernelPfPiS_iii
.type _Z10cudaKernelPfPiS_iii, @function
_Z10cudaKernelPfPiS_iii:
.LFB2083:
.cfi_startproc
endbr64
subq $8, %rsp
.cfi_def_cfa_offset 16
call _Z37__device_stub__Z10cudaKernelPfPiS_iiiPfPiS_iii
addq $8, %rsp
.cfi_def_cfa_offset 8
ret
.cfi_endproc
.LFE2083:
.size _Z10cudaKernelPfPiS_iii, .-_Z10cudaKernelPfPiS_iii
.section .rodata.str1.1,"aMS",@progbits,1
.LC0:
.string "w"
.LC1:
.string "output.txt"
.section .rodata.str1.8,"aMS",@progbits,1
.align 8
.LC2:
.string "cudaSetDevice failed! Do you havea CUDA-capable GPU installed?"
.section .rodata.str1.1
.LC3:
.string "cudaMalloc failed!"
.LC4:
.string "cudaMemcpy failed!"
.LC5:
.string "before kernel\n "
.LC6:
.string "after kernel\n "
.LC7:
.string "addKernel launch failed: %s\n"
.section .rodata.str1.8
.align 8
.LC8:
.string "cudaDeviceSynchronize returned error code %d after launchingaddKernel!\n"
.section .rodata.str1.1
.LC9:
.string "before output\n "
.LC10:
.string "%d : %f \n"
.LC11:
.string "after output\n "
.LC12:
.string "addWithCuda failed!"
.text
.globl runCudaKernel
.type runCudaKernel, @function
runCudaKernel:
.LFB2057:
.cfi_startproc
endbr64
pushq %r15
.cfi_def_cfa_offset 16
.cfi_offset 15, -16
pushq %r14
.cfi_def_cfa_offset 24
.cfi_offset 14, -24
pushq %r13
.cfi_def_cfa_offset 32
.cfi_offset 13, -32
pushq %r12
.cfi_def_cfa_offset 40
.cfi_offset 12, -40
pushq %rbp
.cfi_def_cfa_offset 48
.cfi_offset 6, -48
pushq %rbx
.cfi_def_cfa_offset 56
.cfi_offset 3, -56
subq $104, %rsp
.cfi_def_cfa_offset 160
movq %rdi, 8(%rsp)
movl %esi, %r12d
movl %edx, 4(%rsp)
movl %ecx, %ebp
movq %r8, 24(%rsp)
movq %r9, 16(%rsp)
movq %fs:40, %rax
movq %rax, 88(%rsp)
xorl %eax, %eax
leaq .LC0(%rip), %rsi
leaq .LC1(%rip), %rdi
call fopen@PLT
movq %rax, %rbx
movq $0, 40(%rsp)
movq $0, 48(%rsp)
movq $0, 56(%rsp)
movl $0, %edi
call cudaSetDevice@PLT
testl %eax, %eax
jne .L28
movslq %ebp, %r15
leaq 0(,%r15,4), %r14
leaq 40(%rsp), %rdi
movq %r14, %rsi
call cudaMalloc@PLT
testl %eax, %eax
jne .L29
leaq 48(%rsp), %rdi
movq %r14, %rsi
call cudaMalloc@PLT
testl %eax, %eax
jne .L30
movl %ebp, %r13d
imull %r12d, %r13d
movl 4(%rsp), %eax
imull %eax, %r13d
movslq %r13d, %r13
salq $2, %r13
leaq 56(%rsp), %rdi
movq %r13, %rsi
call cudaMalloc@PLT
testl %eax, %eax
jne .L31
movl $1, %ecx
movq %r13, %rdx
movq 16(%rsp), %rsi
movq 56(%rsp), %rdi
call cudaMemcpy@PLT
testl %eax, %eax
jne .L32
movl $1, %ecx
movq %r14, %rdx
movq 24(%rsp), %rsi
movq 48(%rsp), %rdi
call cudaMemcpy@PLT
testl %eax, %eax
jne .L33
leaq .LC5(%rip), %rdx
movl $2, %esi
movq %rbx, %rdi
movl $0, %eax
call __fprintf_chk@PLT
movq %rbx, %rdi
call fflush@PLT
movl $1, 76(%rsp)
movl $1, 80(%rsp)
movl %r12d, 64(%rsp)
movl $1, 68(%rsp)
movl $0, %r9d
movl $0, %r8d
movq 76(%rsp), %rdx
movl $1, %ecx
movq 64(%rsp), %rdi
movl $1, %esi
call __cudaPushCallConfiguration@PLT
testl %eax, %eax
je .L34
.L19:
leaq .LC6(%rip), %rdx
movl $2, %esi
movq %rbx, %rdi
movl $0, %eax
call __fprintf_chk@PLT
movq %rbx, %rdi
call fflush@PLT
call cudaGetLastError@PLT
testl %eax, %eax
jne .L35
call cudaDeviceSynchronize@PLT
testl %eax, %eax
jne .L36
movl $2, %ecx
movq %r14, %rdx
movq 40(%rsp), %rsi
movq 8(%rsp), %rdi
call cudaMemcpy@PLT
testl %eax, %eax
jne .L37
leaq .LC9(%rip), %rdx
movl $2, %esi
movq %rbx, %rdi
movl $0, %eax
call __fprintf_chk@PLT
movq %rbx, %rdi
call fflush@PLT
testl %ebp, %ebp
jle .L23
movl $0, %ebp
leaq .LC10(%rip), %r12
.L24:
movq 8(%rsp), %rax
pxor %xmm0, %xmm0
cvtss2sd (%rax,%rbp,4), %xmm0
movl %ebp, %ecx
movq %r12, %rdx
movl $2, %esi
movq %rbx, %rdi
movl $1, %eax
call __fprintf_chk@PLT
addq $1, %rbp
cmpq %rbp, %r15
jne .L24
.L23:
leaq .LC11(%rip), %rdx
movl $2, %esi
movq %rbx, %rdi
movl $0, %eax
call __fprintf_chk@PLT
movq %rbx, %rdi
call fflush@PLT
movq 56(%rsp), %rdi
call cudaFree@PLT
movq 40(%rsp), %rdi
call cudaFree@PLT
movq 48(%rsp), %rdi
call cudaFree@PLT
.L28:
leaq .LC2(%rip), %rdx
movl $2, %esi
movq %rbx, %rdi
movl $0, %eax
call __fprintf_chk@PLT
.L13:
movq 56(%rsp), %rdi
call cudaFree@PLT
movq 40(%rsp), %rdi
call cudaFree@PLT
movq 48(%rsp), %rdi
call cudaFree@PLT
leaq .LC12(%rip), %rdx
movl $2, %esi
movq stderr(%rip), %rdi
movl $0, %eax
call __fprintf_chk@PLT
movq 88(%rsp), %rax
subq %fs:40, %rax
jne .L38
movsd .LC13(%rip), %xmm0
addq $104, %rsp
.cfi_remember_state
.cfi_def_cfa_offset 56
popq %rbx
.cfi_def_cfa_offset 48
popq %rbp
.cfi_def_cfa_offset 40
popq %r12
.cfi_def_cfa_offset 32
popq %r13
.cfi_def_cfa_offset 24
popq %r14
.cfi_def_cfa_offset 16
popq %r15
.cfi_def_cfa_offset 8
ret
.L29:
.cfi_restore_state
leaq .LC3(%rip), %rdx
movl $2, %esi
movq %rbx, %rdi
movl $0, %eax
call __fprintf_chk@PLT
jmp .L13
.L30:
leaq .LC3(%rip), %rdx
movl $2, %esi
movq %rbx, %rdi
movl $0, %eax
call __fprintf_chk@PLT
jmp .L13
.L31:
leaq .LC3(%rip), %rdx
movl $2, %esi
movq %rbx, %rdi
movl $0, %eax
call __fprintf_chk@PLT
jmp .L13
.L32:
leaq .LC4(%rip), %rdx
movl $2, %esi
movq %rbx, %rdi
movl $0, %eax
call __fprintf_chk@PLT
jmp .L13
.L33:
leaq .LC4(%rip), %rdx
movl $2, %esi
movq %rbx, %rdi
movl $0, %eax
call __fprintf_chk@PLT
jmp .L13
.L34:
movl 4(%rsp), %r9d
movl %ebp, %r8d
movl %r12d, %ecx
movq 48(%rsp), %rdx
movq 56(%rsp), %rsi
movq 40(%rsp), %rdi
call _Z37__device_stub__Z10cudaKernelPfPiS_iiiPfPiS_iii
jmp .L19
.L35:
movl %eax, %edi
call cudaGetErrorString@PLT
movq %rax, %rcx
leaq .LC7(%rip), %rdx
movl $2, %esi
movq %rbx, %rdi
movl $0, %eax
call __fprintf_chk@PLT
jmp .L13
.L36:
movl %eax, %ecx
leaq .LC8(%rip), %rdx
movl $2, %esi
movq %rbx, %rdi
movl $0, %eax
call __fprintf_chk@PLT
jmp .L13
.L37:
leaq .LC4(%rip), %rdx
movl $2, %esi
movq %rbx, %rdi
movl $0, %eax
call __fprintf_chk@PLT
jmp .L13
.L38:
call __stack_chk_fail@PLT
.cfi_endproc
.LFE2057:
.size runCudaKernel, .-runCudaKernel
.section .rodata.str1.1
.LC14:
.string "_Z10cudaKernelPfPiS_iii"
.text
.type _ZL24__sti____cudaRegisterAllv, @function
_ZL24__sti____cudaRegisterAllv:
.LFB2085:
.cfi_startproc
endbr64
subq $8, %rsp
.cfi_def_cfa_offset 16
leaq _ZL15__fatDeviceText(%rip), %rdi
call __cudaRegisterFatBinary@PLT
movq %rax, %rdi
movq %rax, _ZL20__cudaFatCubinHandle(%rip)
pushq $0
.cfi_def_cfa_offset 24
pushq $0
.cfi_def_cfa_offset 32
pushq $0
.cfi_def_cfa_offset 40
pushq $0
.cfi_def_cfa_offset 48
movl $0, %r9d
movl $-1, %r8d
leaq .LC14(%rip), %rdx
movq %rdx, %rcx
leaq _Z10cudaKernelPfPiS_iii(%rip), %rsi
call __cudaRegisterFunction@PLT
addq $32, %rsp
.cfi_def_cfa_offset 16
movq _ZL20__cudaFatCubinHandle(%rip), %rdi
call __cudaRegisterFatBinaryEnd@PLT
leaq _ZL26__cudaUnregisterBinaryUtilv(%rip), %rdi
call atexit@PLT
addq $8, %rsp
.cfi_def_cfa_offset 8
ret
.cfi_endproc
.LFE2085:
.size _ZL24__sti____cudaRegisterAllv, .-_ZL24__sti____cudaRegisterAllv
.section .init_array,"aw"
.align 8
.quad _ZL24__sti____cudaRegisterAllv
.section .nvFatBinSegment,"aw"
.align 8
.type _ZL15__fatDeviceText, @object
.size _ZL15__fatDeviceText, 24
_ZL15__fatDeviceText:
.long 1180844977
.long 1
.quad fatbinData
.quad 0
.local _ZL20__cudaFatCubinHandle
.comm _ZL20__cudaFatCubinHandle,8,8
.section .rodata.cst8,"aM",@progbits,8
.align 8
.LC13:
.long 0
.long 1072693248
.ident "GCC: (Ubuntu 13.3.0-6ubuntu2~24.04) 13.3.0"
.section .note.GNU-stack,"",@progbits
.section .note.gnu.property,"a"
.align 8
.long 1f - 0f
.long 4f - 1f
.long 5
0:
.string "GNU"
1:
.align 8
.long 0xc0000002
.long 3f - 2f
2:
.long 0x3
3:
.align 8
4: | .text
.file "cudaKernel.hip"
.globl _Z25__device_stub__cudaKernelPfPiS_iii # -- Begin function _Z25__device_stub__cudaKernelPfPiS_iii
.p2align 4, 0x90
.type _Z25__device_stub__cudaKernelPfPiS_iii,@function
_Z25__device_stub__cudaKernelPfPiS_iii: # @_Z25__device_stub__cudaKernelPfPiS_iii
.cfi_startproc
# %bb.0:
subq $152, %rsp
.cfi_def_cfa_offset 160
movq %rdi, 88(%rsp)
movq %rsi, 80(%rsp)
movq %rdx, 72(%rsp)
movl %ecx, 20(%rsp)
movl %r8d, 16(%rsp)
movl %r9d, 12(%rsp)
leaq 88(%rsp), %rax
movq %rax, 96(%rsp)
leaq 80(%rsp), %rax
movq %rax, 104(%rsp)
leaq 72(%rsp), %rax
movq %rax, 112(%rsp)
leaq 20(%rsp), %rax
movq %rax, 120(%rsp)
leaq 16(%rsp), %rax
movq %rax, 128(%rsp)
leaq 12(%rsp), %rax
movq %rax, 136(%rsp)
leaq 56(%rsp), %rdi
leaq 40(%rsp), %rsi
leaq 32(%rsp), %rdx
leaq 24(%rsp), %rcx
callq __hipPopCallConfiguration
movq 56(%rsp), %rsi
movl 64(%rsp), %edx
movq 40(%rsp), %rcx
movl 48(%rsp), %r8d
leaq 96(%rsp), %r9
movl $_Z10cudaKernelPfPiS_iii, %edi
pushq 24(%rsp)
.cfi_adjust_cfa_offset 8
pushq 40(%rsp)
.cfi_adjust_cfa_offset 8
callq hipLaunchKernel
addq $168, %rsp
.cfi_adjust_cfa_offset -168
retq
.Lfunc_end0:
.size _Z25__device_stub__cudaKernelPfPiS_iii, .Lfunc_end0-_Z25__device_stub__cudaKernelPfPiS_iii
.cfi_endproc
# -- End function
.section .rodata.cst8,"aM",@progbits,8
.p2align 3, 0x0 # -- Begin function runCudaKernel
.LCPI1_0:
.quad 0x3ff0000000000000 # double 1
.text
.globl runCudaKernel
.p2align 4, 0x90
.type runCudaKernel,@function
runCudaKernel: # @runCudaKernel
.cfi_startproc
# %bb.0:
pushq %rbp
.cfi_def_cfa_offset 16
pushq %r15
.cfi_def_cfa_offset 24
pushq %r14
.cfi_def_cfa_offset 32
pushq %r13
.cfi_def_cfa_offset 40
pushq %r12
.cfi_def_cfa_offset 48
pushq %rbx
.cfi_def_cfa_offset 56
subq $56, %rsp
.cfi_def_cfa_offset 112
.cfi_offset %rbx, -56
.cfi_offset %r12, -48
.cfi_offset %r13, -40
.cfi_offset %r14, -32
.cfi_offset %r15, -24
.cfi_offset %rbp, -16
movq %r9, %r12
movq %r8, %r14
movl %ecx, %ebx
movl %edx, %r15d
movl %esi, 20(%rsp) # 4-byte Spill
movq %rdi, %r13
movl $.L.str, %edi
movl $.L.str.1, %esi
callq fopen
movq %rax, %rbp
movq $0, 40(%rsp)
movq $0, 32(%rsp)
movq $0, 24(%rsp)
xorl %edi, %edi
callq hipSetDevice
testl %eax, %eax
jne .LBB1_15
# %bb.1:
movl %r15d, 12(%rsp) # 4-byte Spill
movl %ebx, 16(%rsp) # 4-byte Spill
movslq %ebx, %r15
shlq $2, %r15
leaq 40(%rsp), %rdi
movq %r15, %rsi
callq hipMalloc
testl %eax, %eax
jne .LBB1_16
# %bb.2:
leaq 32(%rsp), %rdi
movq %r15, %rsi
callq hipMalloc
testl %eax, %eax
movq %rbp, %rbx
jne .LBB1_18
# %bb.3:
movq %r13, 48(%rsp) # 8-byte Spill
movl 12(%rsp), %eax # 4-byte Reload
imull 20(%rsp), %eax # 4-byte Folded Reload
imull 16(%rsp), %eax # 4-byte Folded Reload
movslq %eax, %r13
shlq $2, %r13
leaq 24(%rsp), %rdi
movq %r13, %rsi
callq hipMalloc
testl %eax, %eax
jne .LBB1_18
# %bb.4:
movq 24(%rsp), %rdi
movq %r12, %rsi
movq %r13, %rdx
movl $1, %ecx
callq hipMemcpy
testl %eax, %eax
jne .LBB1_19
# %bb.5:
movq 32(%rsp), %rdi
movq %r14, %rsi
movq %r15, %rdx
movl $1, %ecx
callq hipMemcpy
testl %eax, %eax
jne .LBB1_19
# %bb.6:
movl $.L.str.5, %edi
movl $15, %esi
movl $1, %edx
movq %rbx, %rcx
callq fwrite@PLT
movq %rbx, %rdi
callq fflush
movl 20(%rsp), %ebp # 4-byte Reload
movl %ebp, %edi
movabsq $4294967296, %rdx # imm = 0x100000000
orq %rdx, %rdi
orq $1, %rdx
movl $1, %esi
movl $1, %ecx
xorl %r8d, %r8d
xorl %r9d, %r9d
callq __hipPushCallConfiguration
testl %eax, %eax
movl 16(%rsp), %r14d # 4-byte Reload
jne .LBB1_8
# %bb.7:
movq 40(%rsp), %rdi
movq 24(%rsp), %rsi
movq 32(%rsp), %rdx
movl %ebp, %ecx
movl %r14d, %r8d
movl 12(%rsp), %r9d # 4-byte Reload
callq _Z25__device_stub__cudaKernelPfPiS_iii
.LBB1_8:
movl $.L.str.6, %edi
movl $14, %esi
movl $1, %edx
movq %rbx, %rcx
callq fwrite@PLT
movq %rbx, %rdi
callq fflush
callq hipGetLastError
testl %eax, %eax
movq 48(%rsp), %r12 # 8-byte Reload
jne .LBB1_23
# %bb.9:
callq hipDeviceSynchronize
testl %eax, %eax
jne .LBB1_24
# %bb.10:
movq 40(%rsp), %rsi
movq %r12, %rdi
movq %r15, %rdx
movl $2, %ecx
callq hipMemcpy
testl %eax, %eax
jne .LBB1_19
# %bb.11:
movl $.L.str.9, %edi
movl $15, %esi
movl $1, %edx
movq %rbx, %rcx
callq fwrite@PLT
movq %rbx, %rdi
callq fflush
testl %r14d, %r14d
jle .LBB1_14
# %bb.12: # %.lr.ph.preheader
movl %r14d, %r15d
xorl %r14d, %r14d
.p2align 4, 0x90
.LBB1_13: # %.lr.ph
# =>This Inner Loop Header: Depth=1
movss (%r12,%r14,4), %xmm0 # xmm0 = mem[0],zero,zero,zero
cvtss2sd %xmm0, %xmm0
movl $.L.str.10, %esi
movq %rbx, %rdi
movl %r14d, %edx
movb $1, %al
callq fprintf
incq %r14
cmpq %r14, %r15
jne .LBB1_13
.LBB1_14: # %._crit_edge
movl $.L.str.11, %edi
movl $14, %esi
movl $1, %edx
movq %rbx, %rcx
callq fwrite@PLT
movq %rbx, %rdi
callq fflush
jmp .LBB1_22
.LBB1_15:
movl $.L.str.2, %edi
movl $62, %esi
jmp .LBB1_17
.LBB1_16:
movl $.L.str.3, %edi
movl $17, %esi
.LBB1_17:
movl $1, %edx
movq %rbp, %rcx
jmp .LBB1_21
.LBB1_18:
movl $.L.str.3, %edi
jmp .LBB1_20
.LBB1_19:
movl $.L.str.4, %edi
.LBB1_20:
movl $17, %esi
movl $1, %edx
movq %rbx, %rcx
.LBB1_21:
callq fwrite@PLT
.LBB1_22:
movq 24(%rsp), %rdi
callq hipFree
movq 40(%rsp), %rdi
callq hipFree
movq 32(%rsp), %rdi
callq hipFree
movq stderr(%rip), %rcx
movl $.L.str.12, %edi
movl $19, %esi
movl $1, %edx
callq fwrite@PLT
movsd .LCPI1_0(%rip), %xmm0 # xmm0 = mem[0],zero
addq $56, %rsp
.cfi_def_cfa_offset 56
popq %rbx
.cfi_def_cfa_offset 48
popq %r12
.cfi_def_cfa_offset 40
popq %r13
.cfi_def_cfa_offset 32
popq %r14
.cfi_def_cfa_offset 24
popq %r15
.cfi_def_cfa_offset 16
popq %rbp
.cfi_def_cfa_offset 8
retq
.LBB1_23:
.cfi_def_cfa_offset 112
movl %eax, %edi
callq hipGetErrorString
movl $.L.str.7, %esi
movq %rbx, %rdi
movq %rax, %rdx
xorl %eax, %eax
callq fprintf
jmp .LBB1_22
.LBB1_24:
movl $.L.str.8, %esi
movq %rbx, %rdi
movl %eax, %edx
xorl %eax, %eax
callq fprintf
jmp .LBB1_22
.Lfunc_end1:
.size runCudaKernel, .Lfunc_end1-runCudaKernel
.cfi_endproc
# -- End function
.p2align 4, 0x90 # -- Begin function __hip_module_ctor
.type __hip_module_ctor,@function
__hip_module_ctor: # @__hip_module_ctor
.cfi_startproc
# %bb.0:
subq $40, %rsp
.cfi_def_cfa_offset 48
cmpq $0, __hip_gpubin_handle(%rip)
jne .LBB2_2
# %bb.1:
movl $__hip_fatbin_wrapper, %edi
callq __hipRegisterFatBinary
movq %rax, __hip_gpubin_handle(%rip)
.LBB2_2:
movq __hip_gpubin_handle(%rip), %rdi
xorps %xmm0, %xmm0
movups %xmm0, 16(%rsp)
movups %xmm0, (%rsp)
movl $_Z10cudaKernelPfPiS_iii, %esi
movl $.L__unnamed_1, %edx
movl $.L__unnamed_1, %ecx
movl $-1, %r8d
xorl %r9d, %r9d
callq __hipRegisterFunction
movl $__hip_module_dtor, %edi
addq $40, %rsp
.cfi_def_cfa_offset 8
jmp atexit # TAILCALL
.Lfunc_end2:
.size __hip_module_ctor, .Lfunc_end2-__hip_module_ctor
.cfi_endproc
# -- End function
.p2align 4, 0x90 # -- Begin function __hip_module_dtor
.type __hip_module_dtor,@function
__hip_module_dtor: # @__hip_module_dtor
.cfi_startproc
# %bb.0:
movq __hip_gpubin_handle(%rip), %rdi
testq %rdi, %rdi
je .LBB3_2
# %bb.1:
pushq %rax
.cfi_def_cfa_offset 16
callq __hipUnregisterFatBinary
movq $0, __hip_gpubin_handle(%rip)
addq $8, %rsp
.cfi_def_cfa_offset 8
.LBB3_2:
retq
.Lfunc_end3:
.size __hip_module_dtor, .Lfunc_end3-__hip_module_dtor
.cfi_endproc
# -- End function
.type _Z10cudaKernelPfPiS_iii,@object # @_Z10cudaKernelPfPiS_iii
.section .rodata,"a",@progbits
.globl _Z10cudaKernelPfPiS_iii
.p2align 3, 0x0
_Z10cudaKernelPfPiS_iii:
.quad _Z25__device_stub__cudaKernelPfPiS_iii
.size _Z10cudaKernelPfPiS_iii, 8
.type .L.str,@object # @.str
.section .rodata.str1.1,"aMS",@progbits,1
.L.str:
.asciz "output.txt"
.size .L.str, 11
.type .L.str.1,@object # @.str.1
.L.str.1:
.asciz "w"
.size .L.str.1, 2
.type .L.str.2,@object # @.str.2
.L.str.2:
.asciz "hipSetDevice failed! Do you havea CUDA-capable GPU installed?"
.size .L.str.2, 63
.type .L.str.3,@object # @.str.3
.L.str.3:
.asciz "hipMalloc failed!"
.size .L.str.3, 18
.type .L.str.4,@object # @.str.4
.L.str.4:
.asciz "hipMemcpy failed!"
.size .L.str.4, 18
.type .L.str.5,@object # @.str.5
.L.str.5:
.asciz "before kernel\n "
.size .L.str.5, 16
.type .L.str.6,@object # @.str.6
.L.str.6:
.asciz "after kernel\n "
.size .L.str.6, 15
.type .L.str.7,@object # @.str.7
.L.str.7:
.asciz "addKernel launch failed: %s\n"
.size .L.str.7, 29
.type .L.str.8,@object # @.str.8
.L.str.8:
.asciz "hipDeviceSynchronize returned error code %d after launchingaddKernel!\n"
.size .L.str.8, 71
.type .L.str.9,@object # @.str.9
.L.str.9:
.asciz "before output\n "
.size .L.str.9, 16
.type .L.str.10,@object # @.str.10
.L.str.10:
.asciz "%d : %f \n"
.size .L.str.10, 10
.type .L.str.11,@object # @.str.11
.L.str.11:
.asciz "after output\n "
.size .L.str.11, 15
.type .L.str.12,@object # @.str.12
.L.str.12:
.asciz "addWithCuda failed!"
.size .L.str.12, 20
.type .L__unnamed_1,@object # @0
.L__unnamed_1:
.asciz "_Z10cudaKernelPfPiS_iii"
.size .L__unnamed_1, 24
.type __hip_fatbin_wrapper,@object # @__hip_fatbin_wrapper
.section .hipFatBinSegment,"a",@progbits
.p2align 3, 0x0
__hip_fatbin_wrapper:
.long 1212764230 # 0x48495046
.long 1 # 0x1
.quad __hip_fatbin
.quad 0
.size __hip_fatbin_wrapper, 24
.type __hip_gpubin_handle,@object # @__hip_gpubin_handle
.local __hip_gpubin_handle
.comm __hip_gpubin_handle,8,8
.section .init_array,"aw",@init_array
.p2align 3, 0x0
.quad __hip_module_ctor
.type __hip_cuid_,@object # @__hip_cuid_
.bss
.globl __hip_cuid_
__hip_cuid_:
.byte 0 # 0x0
.size __hip_cuid_, 1
.section ".linker-options","e",@llvm_linker_options
.ident "AMD clang version 18.0.0git (https://github.com/RadeonOpenCompute/llvm-project roc-6.3.2 25012 e5bf7e55c91490b07c49d8960fa7983d864936c4)"
.section ".note.GNU-stack","",@progbits
.addrsig
.addrsig_sym _Z25__device_stub__cudaKernelPfPiS_iii
.addrsig_sym __hip_module_ctor
.addrsig_sym __hip_module_dtor
.addrsig_sym _Z10cudaKernelPfPiS_iii
.addrsig_sym __hip_fatbin
.addrsig_sym __hip_fatbin_wrapper
.addrsig_sym __hip_cuid_ |
You are a helpful coding assistant specialized in converting CUDA source code to CUDA device assembly. | #include<cuda.h>
#include<stdio.h>
#include<math.h>
#define TILEWIDTH 32
__global__
void vecConvKernel(float* A, float* B, float* C, int n){
//identify the index of the data to be read
int tx=threadIdx.x;
int bx=blockIdx.x;
int index=bx*blockDim.x+tx;
__shared__ float Ads[TILEWIDTH];
__shared__ float Bds[2*TILEWIDTH];
//assuming n is multiple of TILEWIDTH
// if(index<n){
int i; float val=0.0;
for(i=0;i<gridDim.x-1;i++){
Ads[tx] = A[i*TILEWIDTH+tx];
Bds[tx] = B[i*TILEWIDTH+tx];
Bds[TILEWIDTH + tx] = B[(i+1)*TILEWIDTH + tx];
__syncthreads();
for(int k=0;k<TILEWIDTH;k++){
val+= Ads[k]*Bds[tx+k];
}
__syncthreads();
}
Ads[tx] = A[i*TILEWIDTH + tx];
Bds[tx] = B[i*TILEWIDTH+tx];
Bds[TILEWIDTH + tx] = B[tx];
__syncthreads();
for(int k=0;k<TILEWIDTH;k++){
val+= Ads[k]*Bds[tx+k];
}
__syncthreads();
C[index] = val;
// }
}
__host__
void vecConv(float* A,float* B,float* C, int n){
int c=ceil(n/256.0);
int size = n * sizeof(float);
float *d_A, *d_B, *d_C;
//Allocate device memory for A,B,C
cudaMalloc((void**)&d_A, size);
cudaMalloc((void**)&d_B, size);
cudaMalloc((void**)&d_C, size);
//copy A,B to device memory
cudaMemcpy(d_A, A, size, cudaMemcpyHostToDevice);
cudaMemcpy(d_B, B, size, cudaMemcpyHostToDevice);
dim3 dimBlock(TILEWIDTH,1,1);
dim3 dimGrid(ceil(n/(float)TILEWIDTH),1,1);
//call kernal function that the calculates sum and stores it in C
vecConvKernel<<< dimGrid,dimBlock >>>(d_A,d_B,d_C,n);
//the y and z dimensions are set to 1 by default
//copy C from devce memory
cudaMemcpy( C,d_C, size, cudaMemcpyDeviceToHost);
//free device memories
cudaFree(d_A);
cudaFree(d_B);
cudaFree(d_C);
}
//Kernal function that runs in each thread
int main(){
float *A,*B,*C;
int n=10;
A=(float*)malloc(n*sizeof(float));
B=(float*)malloc(n*sizeof(float));
C=(float*)malloc(n*sizeof(float));
int i;
for(i=0;i<n;i++){
A[i]=(float)i;
B[i]=(float)2*i;
}
vecConv(A,B,C,n);
for(i=0;i<n;i++){
printf("%f ",C[i]);
}
free(A);
free(B);
free(C);
return 0;
} | code for sm_80
Function : _Z13vecConvKernelPfS_S_i
.headerflags @"EF_CUDA_TEXMODE_UNIFIED EF_CUDA_64BIT_ADDRESS EF_CUDA_SM80 EF_CUDA_VIRTUAL_SM(EF_CUDA_SM80)"
/*0000*/ MOV R1, c[0x0][0x28] ; /* 0x00000a0000017a02 */
/* 0x000fe40000000f00 */
/*0010*/ S2R R0, SR_TID.X ; /* 0x0000000000007919 */
/* 0x000e220000002100 */
/*0020*/ HFMA2.MMA R3, -RZ, RZ, 0, 2.384185791015625e-07 ; /* 0x00000004ff037435 */
/* 0x000fe200000001ff */
/*0030*/ ULDC.64 UR6, c[0x0][0x118] ; /* 0x0000460000067ab9 */
/* 0x000fd20000000a00 */
/*0040*/ IMAD.WIDE R22, R0, R3, c[0x0][0x160] ; /* 0x0000580000167625 */
/* 0x001fc800078e0203 */
/*0050*/ IMAD.WIDE R20, R0, R3, c[0x0][0x168] ; /* 0x00005a0000147625 */
/* 0x000fe200078e0203 */
/*0060*/ LDG.E R5, [R22.64] ; /* 0x0000000616057981 */
/* 0x000ea8000c1e1900 */
/*0070*/ LDG.E R13, [R20.64] ; /* 0x00000006140d7981 */
/* 0x000ee2000c1e1900 */
/*0080*/ ULDC UR4, c[0x0][0xc] ; /* 0x0000030000047ab9 */
/* 0x000fe40000000800 */
/*0090*/ UIADD3 UR4, UR4, -0x1, URZ ; /* 0xffffffff04047890 */
/* 0x000fcc000fffe03f */
/*00a0*/ ISETP.NE.AND P0, PT, RZ, UR4, PT ; /* 0x00000004ff007c0c */
/* 0x000fe2000bf05270 */
/*00b0*/ STS [R0.X4], R5 ; /* 0x0000000500007388 */
/* 0x0041e80000004800 */
/*00c0*/ STS [R0.X4+0x80], R13 ; /* 0x0000800d00007388 */
/* 0x0081f00000004800 */
/*00d0*/ @!P0 BRA 0x6b0 ; /* 0x000005d000008947 */
/* 0x000fea0003800000 */
/*00e0*/ IADD3 R18, R0, 0x20, RZ ; /* 0x0000002000127810 */
/* 0x000fe20007ffe0ff */
/*00f0*/ CS2R R16, SRZ ; /* 0x0000000000107805 */
/* 0x000fe2000001ff00 */
/*0100*/ MOV R2, 0x20 ; /* 0x0000002000027802 */
/* 0x000fc60000000f00 */
/*0110*/ IMAD.WIDE R8, R18, R3, c[0x0][0x168] ; /* 0x00005a0012087625 */
/* 0x000fcc00078e0203 */
/*0120*/ LDG.E R9, [R8.64] ; /* 0x0000000608097981 */
/* 0x000ea8000c1e1900 */
/*0130*/ STS [R0.X4+0x100], R9 ; /* 0x0001000900007388 */
/* 0x004fe80000004800 */
/*0140*/ BAR.SYNC.DEFER_BLOCKING 0x0 ; /* 0x0000000000007b1d */
/* 0x000fec0000010000 */
/*0150*/ LDS R10, [R0.X4+0x80] ; /* 0x00008000000a7984 */
/* 0x000fe80000004800 */
/*0160*/ LDS.128 R4, [RZ] ; /* 0x00000000ff047984 */
/* 0x001e280000000c00 */
/*0170*/ LDS R11, [R0.X4+0x84] ; /* 0x00008400000b7984 */
/* 0x000e680000004800 */
/*0180*/ LDS R19, [R0.X4+0x88] ; /* 0x0000880000137984 */
/* 0x000ea80000004800 */
/*0190*/ LDS R24, [R0.X4+0x8c] ; /* 0x00008c0000187984 */
/* 0x000ee80000004800 */
/*01a0*/ LDS R29, [R0.X4+0x90] ; /* 0x00009000001d7984 */
/* 0x000fe80000004800 */
/*01b0*/ LDS.128 R12, [0x10] ; /* 0x00001000ff0c7984 */
/* 0x000f280000000c00 */
/*01c0*/ LDS R28, [R0.X4+0x94] ; /* 0x00009400001c7984 */
/* 0x000f680000004800 */
/*01d0*/ LDS R26, [R0.X4+0x9c] ; /* 0x00009c00001a7984 */
/* 0x000fe80000004800 */
/*01e0*/ LDS R25, [R0.X4+0xa0] ; /* 0x0000a00000197984 */
/* 0x000fe80000004800 */
/*01f0*/ LDS R27, [R0.X4+0xa4] ; /* 0x0000a400001b7984 */
/* 0x000fe20000004800 */
/*0200*/ FFMA R4, R10, R4, R17 ; /* 0x000000040a047223 */
/* 0x001fc60000000011 */
/*0210*/ LDS R17, [R0.X4+0x98] ; /* 0x0000980000117984 */
/* 0x000e220000004800 */
/*0220*/ FFMA R5, R11, R5, R4 ; /* 0x000000050b057223 */
/* 0x002fc60000000004 */
/*0230*/ LDS.128 R8, [0x20] ; /* 0x00002000ff087984 */
/* 0x000e620000000c00 */
/*0240*/ FFMA R5, R19, R6, R5 ; /* 0x0000000613057223 */
/* 0x004fc60000000005 */
/*0250*/ LDS R19, [R0.X4+0xa8] ; /* 0x0000a80000137984 */
/* 0x000ea20000004800 */
/*0260*/ FFMA R5, R24, R7, R5 ; /* 0x0000000718057223 */
/* 0x008fc60000000005 */
/*0270*/ LDS R24, [R0.X4+0xac] ; /* 0x0000ac0000187984 */
/* 0x000ee20000004800 */
/*0280*/ FFMA R5, R29, R12, R5 ; /* 0x0000000c1d057223 */
/* 0x010fc60000000005 */
/*0290*/ LDS R29, [R0.X4+0xc4] ; /* 0x0000c400001d7984 */
/* 0x000fe20000004800 */
/*02a0*/ FFMA R5, R28, R13, R5 ; /* 0x0000000d1c057223 */
/* 0x020fc60000000005 */
/*02b0*/ LDS R28, [R0.X4+0xb4] ; /* 0x0000b400001c7984 */
/* 0x000fe20000004800 */
/*02c0*/ FFMA R14, R17, R14, R5 ; /* 0x0000000e110e7223 */
/* 0x001fc60000000005 */
/*02d0*/ LDS R17, [R0.X4+0xb0] ; /* 0x0000b00000117984 */
/* 0x000fe20000004800 */
/*02e0*/ FFMA R14, R26, R15, R14 ; /* 0x0000000f1a0e7223 */
/* 0x000fc6000000000e */
/*02f0*/ LDS.128 R4, [0x30] ; /* 0x00003000ff047984 */
/* 0x000e220000000c00 */
/*0300*/ FFMA R8, R25, R8, R14 ; /* 0x0000000819087223 */
/* 0x002fc6000000000e */
/*0310*/ LDS R25, [R0.X4+0xb8] ; /* 0x0000b80000197984 */
/* 0x000e620000004800 */
/*0320*/ FFMA R8, R27, R9, R8 ; /* 0x000000091b087223 */
/* 0x000fc60000000008 */
/*0330*/ LDS R26, [R0.X4+0xbc] ; /* 0x0000bc00001a7984 */
/* 0x000f220000004800 */
/*0340*/ FFMA R8, R19, R10, R8 ; /* 0x0000000a13087223 */
/* 0x004fc60000000008 */
/*0350*/ LDS R19, [R0.X4+0xc0] ; /* 0x0000c00000137984 */
/* 0x000fe20000004800 */
/*0360*/ FFMA R8, R24, R11, R8 ; /* 0x0000000b18087223 */
/* 0x008fc60000000008 */
/*0370*/ LDS.128 R12, [0x40] ; /* 0x00004000ff0c7984 */
/* 0x000ea80000000c00 */
/*0380*/ LDS R27, [R0.X4+0xc8] ; /* 0x0000c800001b7984 */
/* 0x000ee80000004800 */
/*0390*/ LDS R24, [R0.X4+0xcc] ; /* 0x0000cc0000187984 */
/* 0x000f620000004800 */
/*03a0*/ FFMA R4, R17, R4, R8 ; /* 0x0000000411047223 */
/* 0x001fc60000000008 */
/*03b0*/ LDS R17, [R0.X4+0xd0] ; /* 0x0000d00000117984 */
/* 0x000fe20000004800 */
/*03c0*/ FFMA R4, R28, R5, R4 ; /* 0x000000051c047223 */
/* 0x000fc60000000004 */
/*03d0*/ LDS.128 R8, [0x50] ; /* 0x00005000ff087984 */
/* 0x000e220000000c00 */
/*03e0*/ FFMA R4, R25, R6, R4 ; /* 0x0000000619047223 */
/* 0x002fc60000000004 */
/*03f0*/ LDS R28, [R0.X4+0xe4] ; /* 0x0000e400001c7984 */
/* 0x000fe20000004800 */
/*0400*/ FFMA R4, R26, R7, R4 ; /* 0x000000071a047223 */
/* 0x010fc60000000004 */
/*0410*/ LDS R26, [R0.X4+0xd4] ; /* 0x0000d400001a7984 */
/* 0x000e620000004800 */
/*0420*/ FFMA R4, R19, R12, R4 ; /* 0x0000000c13047223 */
/* 0x004fc60000000004 */
/*0430*/ LDS R19, [R0.X4+0xd8] ; /* 0x0000d80000137984 */
/* 0x000ea20000004800 */
/*0440*/ FFMA R4, R29, R13, R4 ; /* 0x0000000d1d047223 */
/* 0x000fc60000000004 */
/*0450*/ LDS R12, [R0.X4+0xdc] ; /* 0x0000dc00000c7984 */
/* 0x000f220000004800 */
/*0460*/ FFMA R14, R27, R14, R4 ; /* 0x0000000e1b0e7223 */
/* 0x008fc60000000004 */
/*0470*/ LDS R13, [R0.X4+0xe0] ; /* 0x0000e000000d7984 */
/* 0x000fe20000004800 */
/*0480*/ FFMA R14, R24, R15, R14 ; /* 0x0000000f180e7223 */
/* 0x020fc6000000000e */
/*0490*/ LDS.128 R4, [0x60] ; /* 0x00006000ff047984 */
/* 0x000ee80000000c00 */
/*04a0*/ LDS R25, [R0.X4+0xe8] ; /* 0x0000e80000197984 */
/* 0x000f680000004800 */
/*04b0*/ LDS R24, [R0.X4+0xf4] ; /* 0x0000f40000187984 */
/* 0x000fe20000004800 */
/*04c0*/ FFMA R8, R17, R8, R14 ; /* 0x0000000811087223 */
/* 0x001fc6000000000e */
/*04d0*/ LDS R17, [R0.X4+0xf0] ; /* 0x0000f00000117984 */
/* 0x000fe20000004800 */
/*04e0*/ IMAD.WIDE R14, R2, 0x4, R20 ; /* 0x00000004020e7825 */
/* 0x000fc800078e0214 */
/*04f0*/ FFMA R8, R26, R9, R8 ; /* 0x000000091a087223 */
/* 0x002fe40000000008 */
/*0500*/ LDS R26, [R0.X4+0xec] ; /* 0x0000ec00001a7984 */
/* 0x000e240000004800 */
/*0510*/ FFMA R8, R19, R10, R8 ; /* 0x0000000a13087223 */
/* 0x004fc80000000008 */
/*0520*/ FFMA R8, R12, R11, R8 ; /* 0x0000000b0c087223 */
/* 0x010fc80000000008 */
/*0530*/ FFMA R4, R13, R4, R8 ; /* 0x000000040d047223 */
/* 0x008fe40000000008 */
/*0540*/ LDS.128 R8, [0x70] ; /* 0x00007000ff087984 */
/* 0x000e620000000c00 */
/*0550*/ IMAD.WIDE R12, R2, 0x4, R22 ; /* 0x00000004020c7825 */
/* 0x000fc800078e0216 */
/*0560*/ FFMA R19, R28, R5, R4 ; /* 0x000000051c137223 */
/* 0x000fe40000000004 */
/*0570*/ LDS R5, [R0.X4+0xf8] ; /* 0x0000f80000057984 */
/* 0x000ea80000004800 */
/*0580*/ LDS R4, [R0.X4+0xfc] ; /* 0x0000fc0000047984 */
/* 0x000ee80000004800 */
/*0590*/ BAR.SYNC.DEFER_BLOCKING 0x0 ; /* 0x0000000000007b1d */
/* 0x000fec0000010000 */
/*05a0*/ LDG.E R13, [R12.64] ; /* 0x000000060c0d7981 */
/* 0x000f28000c1e1900 */
/*05b0*/ LDG.E R15, [R14.64] ; /* 0x000000060e0f7981 */
/* 0x000f22000c1e1900 */
/*05c0*/ FFMA R6, R25, R6, R19 ; /* 0x0000000619067223 */
/* 0x020fe20000000013 */
/*05d0*/ IADD3 R16, R16, 0x1, RZ ; /* 0x0000000110107810 */
/* 0x000fc40007ffe0ff */
/*05e0*/ IADD3 R18, R18, 0x20, RZ ; /* 0x0000002012127810 */
/* 0x000fe20007ffe0ff */
/*05f0*/ FFMA R6, R26, R7, R6 ; /* 0x000000071a067223 */
/* 0x001fe20000000006 */
/*0600*/ ISETP.GE.U32.AND P0, PT, R16, UR4, PT ; /* 0x0000000410007c0c */
/* 0x000fe4000bf06070 */
/*0610*/ IADD3 R2, R2, 0x20, RZ ; /* 0x0000002002027810 */
/* 0x000fe20007ffe0ff */
/*0620*/ FFMA R6, R17, R8, R6 ; /* 0x0000000811067223 */
/* 0x002fc80000000006 */
/*0630*/ FFMA R6, R24, R9, R6 ; /* 0x0000000918067223 */
/* 0x000fc80000000006 */
/*0640*/ FFMA R5, R5, R10, R6 ; /* 0x0000000a05057223 */
/* 0x004fc80000000006 */
/*0650*/ FFMA R17, R4, R11, R5 ; /* 0x0000000b04117223 */
/* 0x008fe20000000005 */
/*0660*/ STS [R0.X4], R13 ; /* 0x0000000d00007388 */
/* 0x0101e80000004800 */
/*0670*/ STS [R0.X4+0x80], R15 ; /* 0x0000800f00007388 */
/* 0x0001e20000004800 */
/*0680*/ @!P0 BRA 0x110 ; /* 0xfffffa8000008947 */
/* 0x000fea000383ffff */
/*0690*/ LDG.E R13, [R20.64] ; /* 0x00000006140d7981 */
/* 0x001162000c1e1900 */
/*06a0*/ BRA 0x6c0 ; /* 0x0000001000007947 */
/* 0x000fea0003800000 */
/*06b0*/ MOV R17, RZ ; /* 0x000000ff00117202 */
/* 0x000fe40000000f00 */
/*06c0*/ STS [R0.X4+0x100], R13 ; /* 0x0001000d00007388 */
/* 0x020fe80000004800 */
/*06d0*/ BAR.SYNC.DEFER_BLOCKING 0x0 ; /* 0x0000000000007b1d */
/* 0x000fec0000010000 */
/*06e0*/ LDS R20, [R0.X4+0x80] ; /* 0x0000800000147984 */
/* 0x001fe80000004800 */
/*06f0*/ LDS.128 R4, [RZ] ; /* 0x00000000ff047984 */
/* 0x000e280000000c00 */
/*0700*/ LDS R22, [R0.X4+0x84] ; /* 0x0000840000167984 */
/* 0x000e680000004800 */
/*0710*/ LDS R24, [R0.X4+0x88] ; /* 0x0000880000187984 */
/* 0x000ea80000004800 */
/*0720*/ LDS R18, [R0.X4+0x8c] ; /* 0x00008c0000127984 */
/* 0x000ee80000004800 */
/*0730*/ LDS R21, [R0.X4+0x90] ; /* 0x0000900000157984 */
/* 0x000fe80000004800 */
/*0740*/ LDS.128 R8, [0x10] ; /* 0x00001000ff087984 */
/* 0x000f280000000c00 */
/*0750*/ LDS R16, [R0.X4+0x94] ; /* 0x0000940000107984 */
/* 0x000f280000004800 */
/*0760*/ LDS R25, [R0.X4+0x98] ; /* 0x0000980000197984 */
/* 0x000f280000004800 */
/*0770*/ LDS R2, [R0.X4+0x9c] ; /* 0x00009c0000027984 */
/* 0x000f280000004800 */
/*0780*/ LDS R19, [R0.X4+0xa0] ; /* 0x0000a00000137984 */
/* 0x000fe80000004800 */
/*0790*/ LDS.128 R12, [0x20] ; /* 0x00002000ff0c7984 */
/* 0x000f220000000c00 */
/*07a0*/ FFMA R4, R20, R4, R17 ; /* 0x0000000414047223 */
/* 0x001fc60000000011 */
/*07b0*/ LDS R20, [R0.X4+0xa4] ; /* 0x0000a40000147984 */
/* 0x000e220000004800 */
/*07c0*/ FFMA R5, R22, R5, R4 ; /* 0x0000000516057223 */
/* 0x002fc60000000004 */
/*07d0*/ LDS R23, [R0.X4+0xa8] ; /* 0x0000a80000177984 */
/* 0x000e620000004800 */
/*07e0*/ FFMA R5, R24, R6, R5 ; /* 0x0000000618057223 */
/* 0x004fc60000000005 */
/*07f0*/ LDS R24, [R0.X4+0xac] ; /* 0x0000ac0000187984 */
/* 0x000ea20000004800 */
/*0800*/ FFMA R18, R18, R7, R5 ; /* 0x0000000712127223 */
/* 0x008fc60000000005 */
/*0810*/ LDS R17, [R0.X4+0xb0] ; /* 0x0000b00000117984 */
/* 0x000fe80000004800 */
/*0820*/ LDS.128 R4, [0x30] ; /* 0x00003000ff047984 */
/* 0x000ee20000000c00 */
/*0830*/ FFMA R8, R21, R8, R18 ; /* 0x0000000815087223 */
/* 0x010fc60000000012 */
/*0840*/ LDS R18, [R0.X4+0xb4] ; /* 0x0000b40000127984 */
/* 0x000f220000004800 */
/*0850*/ FFMA R8, R16, R9, R8 ; /* 0x0000000910087223 */
/* 0x000fc60000000008 */
/*0860*/ LDS R21, [R0.X4+0xb8] ; /* 0x0000b80000157984 */
/* 0x000f220000004800 */
/*0870*/ FFMA R8, R25, R10, R8 ; /* 0x0000000a19087223 */
/* 0x000fc60000000008 */
/*0880*/ LDS R22, [R0.X4+0xbc] ; /* 0x0000bc0000167984 */
/* 0x000f220000004800 */
/*0890*/ FFMA R25, R2, R11, R8 ; /* 0x0000000b02197223 */
/* 0x000fc60000000008 */
/*08a0*/ LDS R2, [R0.X4+0xc0] ; /* 0x0000c00000027984 */
/* 0x000fe80000004800 */
/*08b0*/ LDS.128 R8, [0x40] ; /* 0x00004000ff087984 */
/* 0x000f220000000c00 */
/*08c0*/ FFMA R12, R19, R12, R25 ; /* 0x0000000c130c7223 */
/* 0x000fc60000000019 */
/*08d0*/ LDS R16, [R0.X4+0xc4] ; /* 0x0000c40000107984 */
/* 0x000f220000004800 */
/*08e0*/ FFMA R12, R20, R13, R12 ; /* 0x0000000d140c7223 */
/* 0x001fc6000000000c */
/*08f0*/ LDS R19, [R0.X4+0xc8] ; /* 0x0000c80000137984 */
/* 0x000e220000004800 */
/*0900*/ FFMA R12, R23, R14, R12 ; /* 0x0000000e170c7223 */
/* 0x002fc6000000000c */
/*0910*/ LDS R20, [R0.X4+0xcc] ; /* 0x0000cc0000147984 */
/* 0x000e620000004800 */
/*0920*/ FFMA R24, R24, R15, R12 ; /* 0x0000000f18187223 */
/* 0x004fc6000000000c */
/*0930*/ LDS R23, [R0.X4+0xd0] ; /* 0x0000d00000177984 */
/* 0x000fe80000004800 */
/*0940*/ LDS.128 R12, [0x50] ; /* 0x00005000ff0c7984 */
/* 0x000ea20000000c00 */
/*0950*/ FFMA R4, R17, R4, R24 ; /* 0x0000000411047223 */
/* 0x008fc60000000018 */
/*0960*/ LDS R24, [R0.X4+0xd4] ; /* 0x0000d40000187984 */
/* 0x000ee20000004800 */
/*0970*/ FFMA R4, R18, R5, R4 ; /* 0x0000000512047223 */
/* 0x010fc60000000004 */
/*0980*/ LDS R17, [R0.X4+0xd8] ; /* 0x0000d80000117984 */
/* 0x000f220000004800 */
/*0990*/ FFMA R4, R21, R6, R4 ; /* 0x0000000615047223 */
/* 0x000fc60000000004 */
/*09a0*/ LDS R18, [R0.X4+0xdc] ; /* 0x0000dc0000127984 */
/* 0x000f220000004800 */
/*09b0*/ FFMA R25, R22, R7, R4 ; /* 0x0000000716197223 */
/* 0x000fc60000000004 */
/*09c0*/ LDS R21, [R0.X4+0xe0] ; /* 0x0000e00000157984 */
/* 0x000fe80000004800 */
/*09d0*/ LDS.128 R4, [0x60] ; /* 0x00006000ff047984 */
/* 0x000f220000000c00 */
/*09e0*/ FFMA R8, R2, R8, R25 ; /* 0x0000000802087223 */
/* 0x000fc60000000019 */
/*09f0*/ LDS R2, [R0.X4+0xe4] ; /* 0x0000e40000027984 */
/* 0x000f220000004800 */
/*0a00*/ FFMA R8, R16, R9, R8 ; /* 0x0000000910087223 */
/* 0x000fc60000000008 */
/*0a10*/ LDS R25, [R0.X4+0xe8] ; /* 0x0000e80000197984 */
/* 0x000f220000004800 */
/*0a20*/ FFMA R8, R19, R10, R8 ; /* 0x0000000a13087223 */
/* 0x001fc60000000008 */
/*0a30*/ LDS R16, [R0.X4+0xec] ; /* 0x0000ec0000107984 */
/* 0x000e220000004800 */
/*0a40*/ FFMA R22, R20, R11, R8 ; /* 0x0000000b14167223 */
/* 0x002fc60000000008 */
/*0a50*/ LDS R19, [R0.X4+0xf0] ; /* 0x0000f00000137984 */
/* 0x000fe80000004800 */
/*0a60*/ LDS.128 R8, [0x70] ; /* 0x00007000ff087984 */
/* 0x000e620000000c00 */
/*0a70*/ FFMA R12, R23, R12, R22 ; /* 0x0000000c170c7223 */
/* 0x004fc60000000016 */
/*0a80*/ LDS R20, [R0.X4+0xf4] ; /* 0x0000f40000147984 */
/* 0x000ea20000004800 */
/*0a90*/ FFMA R13, R24, R13, R12 ; /* 0x0000000d180d7223 */
/* 0x008fc6000000000c */
/*0aa0*/ LDS R23, [R0.X4+0xf8] ; /* 0x0000f80000177984 */
/* 0x000ee20000004800 */
/*0ab0*/ FFMA R13, R17, R14, R13 ; /* 0x0000000e110d7223 */
/* 0x010fc6000000000d */
/*0ac0*/ LDS R12, [R0.X4+0xfc] ; /* 0x0000fc00000c7984 */
/* 0x000f220000004800 */
/*0ad0*/ FFMA R13, R18, R15, R13 ; /* 0x0000000f120d7223 */
/* 0x000fc6000000000d */
/*0ae0*/ S2R R15, SR_CTAID.X ; /* 0x00000000000f7919 */
/* 0x000e620000002500 */
/*0af0*/ FFMA R4, R21, R4, R13 ; /* 0x0000000415047223 */
/* 0x000fc8000000000d */
/*0b00*/ FFMA R2, R2, R5, R4 ; /* 0x0000000502027223 */
/* 0x000fc80000000004 */
/*0b10*/ FFMA R2, R25, R6, R2 ; /* 0x0000000619027223 */
/* 0x000fc80000000002 */
/*0b20*/ FFMA R2, R16, R7, R2 ; /* 0x0000000710027223 */
/* 0x001fc80000000002 */
/*0b30*/ FFMA R2, R19, R8, R2 ; /* 0x0000000813027223 */
/* 0x002fe40000000002 */
/*0b40*/ IMAD R4, R15, c[0x0][0x0], R0 ; /* 0x000000000f047a24 */
/* 0x000fe400078e0200 */
/*0b50*/ FFMA R2, R20, R9, R2 ; /* 0x0000000914027223 */
/* 0x004fc80000000002 */
/*0b60*/ FFMA R10, R23, R10, R2 ; /* 0x0000000a170a7223 */
/* 0x008fe40000000002 */
/*0b70*/ IMAD.WIDE R2, R4, R3, c[0x0][0x170] ; /* 0x00005c0004027625 */
/* 0x000fc800078e0203 */
/*0b80*/ FFMA R11, R12, R11, R10 ; /* 0x0000000b0c0b7223 */
/* 0x010fe2000000000a */
/*0b90*/ BAR.SYNC.DEFER_BLOCKING 0x0 ; /* 0x0000000000007b1d */
/* 0x000fec0000010000 */
/*0ba0*/ STG.E [R2.64], R11 ; /* 0x0000000b02007986 */
/* 0x000fe2000c101906 */
/*0bb0*/ EXIT ; /* 0x000000000000794d */
/* 0x000fea0003800000 */
/*0bc0*/ BRA 0xbc0; /* 0xfffffff000007947 */
/* 0x000fc0000383ffff */
/*0bd0*/ NOP; /* 0x0000000000007918 */
/* 0x000fc00000000000 */
/*0be0*/ NOP; /* 0x0000000000007918 */
/* 0x000fc00000000000 */
/*0bf0*/ NOP; /* 0x0000000000007918 */
/* 0x000fc00000000000 */
/*0c00*/ NOP; /* 0x0000000000007918 */
/* 0x000fc00000000000 */
/*0c10*/ NOP; /* 0x0000000000007918 */
/* 0x000fc00000000000 */
/*0c20*/ NOP; /* 0x0000000000007918 */
/* 0x000fc00000000000 */
/*0c30*/ NOP; /* 0x0000000000007918 */
/* 0x000fc00000000000 */
/*0c40*/ NOP; /* 0x0000000000007918 */
/* 0x000fc00000000000 */
/*0c50*/ NOP; /* 0x0000000000007918 */
/* 0x000fc00000000000 */
/*0c60*/ NOP; /* 0x0000000000007918 */
/* 0x000fc00000000000 */
/*0c70*/ NOP; /* 0x0000000000007918 */
/* 0x000fc00000000000 */
.......... |
You are a helpful coding assistant specialized in converting CUDA source code to CUDA host assembly. | #include<cuda.h>
#include<stdio.h>
#include<math.h>
#define TILEWIDTH 32
__global__
void vecConvKernel(float* A, float* B, float* C, int n){
//identify the index of the data to be read
int tx=threadIdx.x;
int bx=blockIdx.x;
int index=bx*blockDim.x+tx;
__shared__ float Ads[TILEWIDTH];
__shared__ float Bds[2*TILEWIDTH];
//assuming n is multiple of TILEWIDTH
// if(index<n){
int i; float val=0.0;
for(i=0;i<gridDim.x-1;i++){
Ads[tx] = A[i*TILEWIDTH+tx];
Bds[tx] = B[i*TILEWIDTH+tx];
Bds[TILEWIDTH + tx] = B[(i+1)*TILEWIDTH + tx];
__syncthreads();
for(int k=0;k<TILEWIDTH;k++){
val+= Ads[k]*Bds[tx+k];
}
__syncthreads();
}
Ads[tx] = A[i*TILEWIDTH + tx];
Bds[tx] = B[i*TILEWIDTH+tx];
Bds[TILEWIDTH + tx] = B[tx];
__syncthreads();
for(int k=0;k<TILEWIDTH;k++){
val+= Ads[k]*Bds[tx+k];
}
__syncthreads();
C[index] = val;
// }
}
__host__
void vecConv(float* A,float* B,float* C, int n){
int c=ceil(n/256.0);
int size = n * sizeof(float);
float *d_A, *d_B, *d_C;
//Allocate device memory for A,B,C
cudaMalloc((void**)&d_A, size);
cudaMalloc((void**)&d_B, size);
cudaMalloc((void**)&d_C, size);
//copy A,B to device memory
cudaMemcpy(d_A, A, size, cudaMemcpyHostToDevice);
cudaMemcpy(d_B, B, size, cudaMemcpyHostToDevice);
dim3 dimBlock(TILEWIDTH,1,1);
dim3 dimGrid(ceil(n/(float)TILEWIDTH),1,1);
//call kernal function that the calculates sum and stores it in C
vecConvKernel<<< dimGrid,dimBlock >>>(d_A,d_B,d_C,n);
//the y and z dimensions are set to 1 by default
//copy C from devce memory
cudaMemcpy( C,d_C, size, cudaMemcpyDeviceToHost);
//free device memories
cudaFree(d_A);
cudaFree(d_B);
cudaFree(d_C);
}
//Kernal function that runs in each thread
int main(){
float *A,*B,*C;
int n=10;
A=(float*)malloc(n*sizeof(float));
B=(float*)malloc(n*sizeof(float));
C=(float*)malloc(n*sizeof(float));
int i;
for(i=0;i<n;i++){
A[i]=(float)i;
B[i]=(float)2*i;
}
vecConv(A,B,C,n);
for(i=0;i<n;i++){
printf("%f ",C[i]);
}
free(A);
free(B);
free(C);
return 0;
} | .file "tmpxft_000bb45e_00000000-6_conv_tiled.cudafe1.cpp"
.text
#APP
#NO_APP
.type _ZL26__cudaUnregisterBinaryUtilv, @function
_ZL26__cudaUnregisterBinaryUtilv:
.LFB2061:
.cfi_startproc
endbr64
subq $8, %rsp
.cfi_def_cfa_offset 16
movq _ZL20__cudaFatCubinHandle(%rip), %rdi
call __cudaUnregisterFatBinary@PLT
addq $8, %rsp
.cfi_def_cfa_offset 8
ret
.cfi_endproc
.LFE2061:
.size _ZL26__cudaUnregisterBinaryUtilv, .-_ZL26__cudaUnregisterBinaryUtilv
.globl _Z38__device_stub__Z13vecConvKernelPfS_S_iPfS_S_i
.type _Z38__device_stub__Z13vecConvKernelPfS_S_iPfS_S_i, @function
_Z38__device_stub__Z13vecConvKernelPfS_S_iPfS_S_i:
.LFB2083:
.cfi_startproc
endbr64
subq $152, %rsp
.cfi_def_cfa_offset 160
movq %rdi, 24(%rsp)
movq %rsi, 16(%rsp)
movq %rdx, 8(%rsp)
movl %ecx, 4(%rsp)
movq %fs:40, %rax
movq %rax, 136(%rsp)
xorl %eax, %eax
leaq 24(%rsp), %rax
movq %rax, 96(%rsp)
leaq 16(%rsp), %rax
movq %rax, 104(%rsp)
leaq 8(%rsp), %rax
movq %rax, 112(%rsp)
leaq 4(%rsp), %rax
movq %rax, 120(%rsp)
movl $1, 48(%rsp)
movl $1, 52(%rsp)
movl $1, 56(%rsp)
movl $1, 60(%rsp)
movl $1, 64(%rsp)
movl $1, 68(%rsp)
leaq 40(%rsp), %rcx
leaq 32(%rsp), %rdx
leaq 60(%rsp), %rsi
leaq 48(%rsp), %rdi
call __cudaPopCallConfiguration@PLT
testl %eax, %eax
je .L7
.L3:
movq 136(%rsp), %rax
subq %fs:40, %rax
jne .L8
addq $152, %rsp
.cfi_remember_state
.cfi_def_cfa_offset 8
ret
.L7:
.cfi_restore_state
pushq 40(%rsp)
.cfi_def_cfa_offset 168
pushq 40(%rsp)
.cfi_def_cfa_offset 176
leaq 112(%rsp), %r9
movq 76(%rsp), %rcx
movl 84(%rsp), %r8d
movq 64(%rsp), %rsi
movl 72(%rsp), %edx
leaq _Z13vecConvKernelPfS_S_i(%rip), %rdi
call cudaLaunchKernel@PLT
addq $16, %rsp
.cfi_def_cfa_offset 160
jmp .L3
.L8:
call __stack_chk_fail@PLT
.cfi_endproc
.LFE2083:
.size _Z38__device_stub__Z13vecConvKernelPfS_S_iPfS_S_i, .-_Z38__device_stub__Z13vecConvKernelPfS_S_iPfS_S_i
.globl _Z13vecConvKernelPfS_S_i
.type _Z13vecConvKernelPfS_S_i, @function
_Z13vecConvKernelPfS_S_i:
.LFB2084:
.cfi_startproc
endbr64
subq $8, %rsp
.cfi_def_cfa_offset 16
call _Z38__device_stub__Z13vecConvKernelPfS_S_iPfS_S_i
addq $8, %rsp
.cfi_def_cfa_offset 8
ret
.cfi_endproc
.LFE2084:
.size _Z13vecConvKernelPfS_S_i, .-_Z13vecConvKernelPfS_S_i
.globl _Z7vecConvPfS_S_i
.type _Z7vecConvPfS_S_i, @function
_Z7vecConvPfS_S_i:
.LFB2057:
.cfi_startproc
endbr64
pushq %r14
.cfi_def_cfa_offset 16
.cfi_offset 14, -16
pushq %r13
.cfi_def_cfa_offset 24
.cfi_offset 13, -24
pushq %r12
.cfi_def_cfa_offset 32
.cfi_offset 12, -32
pushq %rbp
.cfi_def_cfa_offset 40
.cfi_offset 6, -40
pushq %rbx
.cfi_def_cfa_offset 48
.cfi_offset 3, -48
subq $64, %rsp
.cfi_def_cfa_offset 112
movq %rdi, %r14
movq %rsi, %r13
movq %rdx, %r12
movl %ecx, %ebp
movq %fs:40, %rax
movq %rax, 56(%rsp)
xorl %eax, %eax
leal 0(,%rcx,4), %ebx
movslq %ebx, %rbx
leaq 8(%rsp), %rdi
movq %rbx, %rsi
call cudaMalloc@PLT
leaq 16(%rsp), %rdi
movq %rbx, %rsi
call cudaMalloc@PLT
leaq 24(%rsp), %rdi
movq %rbx, %rsi
call cudaMalloc@PLT
movl $1, %ecx
movq %rbx, %rdx
movq %r14, %rsi
movq 8(%rsp), %rdi
call cudaMemcpy@PLT
movl $1, %ecx
movq %rbx, %rdx
movq %r13, %rsi
movq 16(%rsp), %rdi
call cudaMemcpy@PLT
movl $32, 32(%rsp)
movl $1, 36(%rsp)
movl $1, 40(%rsp)
pxor %xmm0, %xmm0
cvtsi2ssl %ebp, %xmm0
mulss .LC0(%rip), %xmm0
movaps %xmm0, %xmm3
movss .LC4(%rip), %xmm2
movaps %xmm0, %xmm1
andps %xmm2, %xmm1
movss .LC1(%rip), %xmm4
ucomiss %xmm1, %xmm4
jbe .L12
cvttss2sil %xmm0, %eax
pxor %xmm1, %xmm1
cvtsi2ssl %eax, %xmm1
cmpnless %xmm1, %xmm3
movss .LC3(%rip), %xmm4
andps %xmm4, %xmm3
addss %xmm1, %xmm3
andnps %xmm0, %xmm2
orps %xmm2, %xmm3
.L12:
cvttss2siq %xmm3, %rax
movl %eax, 44(%rsp)
movl $1, 48(%rsp)
movl 40(%rsp), %ecx
movl $0, %r9d
movl $0, %r8d
movq 32(%rsp), %rdx
movq 44(%rsp), %rdi
movl $1, %esi
call __cudaPushCallConfiguration@PLT
testl %eax, %eax
je .L16
.L13:
movl $2, %ecx
movq %rbx, %rdx
movq 24(%rsp), %rsi
movq %r12, %rdi
call cudaMemcpy@PLT
movq 8(%rsp), %rdi
call cudaFree@PLT
movq 16(%rsp), %rdi
call cudaFree@PLT
movq 24(%rsp), %rdi
call cudaFree@PLT
movq 56(%rsp), %rax
subq %fs:40, %rax
jne .L17
addq $64, %rsp
.cfi_remember_state
.cfi_def_cfa_offset 48
popq %rbx
.cfi_def_cfa_offset 40
popq %rbp
.cfi_def_cfa_offset 32
popq %r12
.cfi_def_cfa_offset 24
popq %r13
.cfi_def_cfa_offset 16
popq %r14
.cfi_def_cfa_offset 8
ret
.L16:
.cfi_restore_state
movl %ebp, %ecx
movq 24(%rsp), %rdx
movq 16(%rsp), %rsi
movq 8(%rsp), %rdi
call _Z38__device_stub__Z13vecConvKernelPfS_S_iPfS_S_i
jmp .L13
.L17:
call __stack_chk_fail@PLT
.cfi_endproc
.LFE2057:
.size _Z7vecConvPfS_S_i, .-_Z7vecConvPfS_S_i
.section .rodata.str1.1,"aMS",@progbits,1
.LC5:
.string "%f "
.text
.globl main
.type main, @function
main:
.LFB2058:
.cfi_startproc
endbr64
pushq %r15
.cfi_def_cfa_offset 16
.cfi_offset 15, -16
pushq %r14
.cfi_def_cfa_offset 24
.cfi_offset 14, -24
pushq %r13
.cfi_def_cfa_offset 32
.cfi_offset 13, -32
pushq %r12
.cfi_def_cfa_offset 40
.cfi_offset 12, -40
pushq %rbp
.cfi_def_cfa_offset 48
.cfi_offset 6, -48
pushq %rbx
.cfi_def_cfa_offset 56
.cfi_offset 3, -56
subq $8, %rsp
.cfi_def_cfa_offset 64
movl $40, %edi
call malloc@PLT
movq %rax, %rbp
movl $40, %edi
call malloc@PLT
movq %rax, %rbx
movl $40, %edi
call malloc@PLT
movq %rax, %r12
movl $0, %eax
.L19:
pxor %xmm0, %xmm0
cvtsi2ssl %eax, %xmm0
movss %xmm0, 0(%rbp,%rax,4)
addss %xmm0, %xmm0
movss %xmm0, (%rbx,%rax,4)
addq $1, %rax
cmpq $10, %rax
jne .L19
movl $10, %ecx
movq %r12, %rdx
movq %rbx, %rsi
movq %rbp, %rdi
call _Z7vecConvPfS_S_i
movq %r12, %r13
leaq 40(%r12), %r15
leaq .LC5(%rip), %r14
.L20:
pxor %xmm0, %xmm0
cvtss2sd 0(%r13), %xmm0
movq %r14, %rsi
movl $2, %edi
movl $1, %eax
call __printf_chk@PLT
addq $4, %r13
cmpq %r15, %r13
jne .L20
movq %rbp, %rdi
call free@PLT
movq %rbx, %rdi
call free@PLT
movq %r12, %rdi
call free@PLT
movl $0, %eax
addq $8, %rsp
.cfi_def_cfa_offset 56
popq %rbx
.cfi_def_cfa_offset 48
popq %rbp
.cfi_def_cfa_offset 40
popq %r12
.cfi_def_cfa_offset 32
popq %r13
.cfi_def_cfa_offset 24
popq %r14
.cfi_def_cfa_offset 16
popq %r15
.cfi_def_cfa_offset 8
ret
.cfi_endproc
.LFE2058:
.size main, .-main
.section .rodata.str1.1
.LC6:
.string "_Z13vecConvKernelPfS_S_i"
.text
.type _ZL24__sti____cudaRegisterAllv, @function
_ZL24__sti____cudaRegisterAllv:
.LFB2086:
.cfi_startproc
endbr64
subq $8, %rsp
.cfi_def_cfa_offset 16
leaq _ZL15__fatDeviceText(%rip), %rdi
call __cudaRegisterFatBinary@PLT
movq %rax, %rdi
movq %rax, _ZL20__cudaFatCubinHandle(%rip)
pushq $0
.cfi_def_cfa_offset 24
pushq $0
.cfi_def_cfa_offset 32
pushq $0
.cfi_def_cfa_offset 40
pushq $0
.cfi_def_cfa_offset 48
movl $0, %r9d
movl $-1, %r8d
leaq .LC6(%rip), %rdx
movq %rdx, %rcx
leaq _Z13vecConvKernelPfS_S_i(%rip), %rsi
call __cudaRegisterFunction@PLT
addq $32, %rsp
.cfi_def_cfa_offset 16
movq _ZL20__cudaFatCubinHandle(%rip), %rdi
call __cudaRegisterFatBinaryEnd@PLT
leaq _ZL26__cudaUnregisterBinaryUtilv(%rip), %rdi
call atexit@PLT
addq $8, %rsp
.cfi_def_cfa_offset 8
ret
.cfi_endproc
.LFE2086:
.size _ZL24__sti____cudaRegisterAllv, .-_ZL24__sti____cudaRegisterAllv
.section .init_array,"aw"
.align 8
.quad _ZL24__sti____cudaRegisterAllv
.section .nvFatBinSegment,"aw"
.align 8
.type _ZL15__fatDeviceText, @object
.size _ZL15__fatDeviceText, 24
_ZL15__fatDeviceText:
.long 1180844977
.long 1
.quad fatbinData
.quad 0
.local _ZL20__cudaFatCubinHandle
.comm _ZL20__cudaFatCubinHandle,8,8
.section .rodata.cst4,"aM",@progbits,4
.align 4
.LC0:
.long 1023410176
.align 4
.LC1:
.long 1258291200
.align 4
.LC3:
.long 1065353216
.align 4
.LC4:
.long 2147483647
.ident "GCC: (Ubuntu 13.3.0-6ubuntu2~24.04) 13.3.0"
.section .note.GNU-stack,"",@progbits
.section .note.gnu.property,"a"
.align 8
.long 1f - 0f
.long 4f - 1f
.long 5
0:
.string "GNU"
1:
.align 8
.long 0xc0000002
.long 3f - 2f
2:
.long 0x3
3:
.align 8
4: |
You are a helpful coding assistant specialized in converting CUDA source code to HIP/AMD source code. | #include<cuda.h>
#include<stdio.h>
#include<math.h>
#define TILEWIDTH 32
__global__
void vecConvKernel(float* A, float* B, float* C, int n){
//identify the index of the data to be read
int tx=threadIdx.x;
int bx=blockIdx.x;
int index=bx*blockDim.x+tx;
__shared__ float Ads[TILEWIDTH];
__shared__ float Bds[2*TILEWIDTH];
//assuming n is multiple of TILEWIDTH
// if(index<n){
int i; float val=0.0;
for(i=0;i<gridDim.x-1;i++){
Ads[tx] = A[i*TILEWIDTH+tx];
Bds[tx] = B[i*TILEWIDTH+tx];
Bds[TILEWIDTH + tx] = B[(i+1)*TILEWIDTH + tx];
__syncthreads();
for(int k=0;k<TILEWIDTH;k++){
val+= Ads[k]*Bds[tx+k];
}
__syncthreads();
}
Ads[tx] = A[i*TILEWIDTH + tx];
Bds[tx] = B[i*TILEWIDTH+tx];
Bds[TILEWIDTH + tx] = B[tx];
__syncthreads();
for(int k=0;k<TILEWIDTH;k++){
val+= Ads[k]*Bds[tx+k];
}
__syncthreads();
C[index] = val;
// }
}
__host__
void vecConv(float* A,float* B,float* C, int n){
int c=ceil(n/256.0);
int size = n * sizeof(float);
float *d_A, *d_B, *d_C;
//Allocate device memory for A,B,C
cudaMalloc((void**)&d_A, size);
cudaMalloc((void**)&d_B, size);
cudaMalloc((void**)&d_C, size);
//copy A,B to device memory
cudaMemcpy(d_A, A, size, cudaMemcpyHostToDevice);
cudaMemcpy(d_B, B, size, cudaMemcpyHostToDevice);
dim3 dimBlock(TILEWIDTH,1,1);
dim3 dimGrid(ceil(n/(float)TILEWIDTH),1,1);
//call kernal function that the calculates sum and stores it in C
vecConvKernel<<< dimGrid,dimBlock >>>(d_A,d_B,d_C,n);
//the y and z dimensions are set to 1 by default
//copy C from devce memory
cudaMemcpy( C,d_C, size, cudaMemcpyDeviceToHost);
//free device memories
cudaFree(d_A);
cudaFree(d_B);
cudaFree(d_C);
}
//Kernal function that runs in each thread
int main(){
float *A,*B,*C;
int n=10;
A=(float*)malloc(n*sizeof(float));
B=(float*)malloc(n*sizeof(float));
C=(float*)malloc(n*sizeof(float));
int i;
for(i=0;i<n;i++){
A[i]=(float)i;
B[i]=(float)2*i;
}
vecConv(A,B,C,n);
for(i=0;i<n;i++){
printf("%f ",C[i]);
}
free(A);
free(B);
free(C);
return 0;
} | #include<hip/hip_runtime.h>
#include<stdio.h>
#include<math.h>
#define TILEWIDTH 32
__global__
void vecConvKernel(float* A, float* B, float* C, int n){
//identify the index of the data to be read
int tx=threadIdx.x;
int bx=blockIdx.x;
int index=bx*blockDim.x+tx;
__shared__ float Ads[TILEWIDTH];
__shared__ float Bds[2*TILEWIDTH];
//assuming n is multiple of TILEWIDTH
// if(index<n){
int i; float val=0.0;
for(i=0;i<gridDim.x-1;i++){
Ads[tx] = A[i*TILEWIDTH+tx];
Bds[tx] = B[i*TILEWIDTH+tx];
Bds[TILEWIDTH + tx] = B[(i+1)*TILEWIDTH + tx];
__syncthreads();
for(int k=0;k<TILEWIDTH;k++){
val+= Ads[k]*Bds[tx+k];
}
__syncthreads();
}
Ads[tx] = A[i*TILEWIDTH + tx];
Bds[tx] = B[i*TILEWIDTH+tx];
Bds[TILEWIDTH + tx] = B[tx];
__syncthreads();
for(int k=0;k<TILEWIDTH;k++){
val+= Ads[k]*Bds[tx+k];
}
__syncthreads();
C[index] = val;
// }
}
__host__
void vecConv(float* A,float* B,float* C, int n){
int c=ceil(n/256.0);
int size = n * sizeof(float);
float *d_A, *d_B, *d_C;
//Allocate device memory for A,B,C
hipMalloc((void**)&d_A, size);
hipMalloc((void**)&d_B, size);
hipMalloc((void**)&d_C, size);
//copy A,B to device memory
hipMemcpy(d_A, A, size, hipMemcpyHostToDevice);
hipMemcpy(d_B, B, size, hipMemcpyHostToDevice);
dim3 dimBlock(TILEWIDTH,1,1);
dim3 dimGrid(ceil(n/(float)TILEWIDTH),1,1);
//call kernal function that the calculates sum and stores it in C
vecConvKernel<<< dimGrid,dimBlock >>>(d_A,d_B,d_C,n);
//the y and z dimensions are set to 1 by default
//copy C from devce memory
hipMemcpy( C,d_C, size, hipMemcpyDeviceToHost);
//free device memories
hipFree(d_A);
hipFree(d_B);
hipFree(d_C);
}
//Kernal function that runs in each thread
int main(){
float *A,*B,*C;
int n=10;
A=(float*)malloc(n*sizeof(float));
B=(float*)malloc(n*sizeof(float));
C=(float*)malloc(n*sizeof(float));
int i;
for(i=0;i<n;i++){
A[i]=(float)i;
B[i]=(float)2*i;
}
vecConv(A,B,C,n);
for(i=0;i<n;i++){
printf("%f ",C[i]);
}
free(A);
free(B);
free(C);
return 0;
} |
You are a helpful coding assistant specialized in converting HIP source code to AMD device assembly. | #include<hip/hip_runtime.h>
#include<stdio.h>
#include<math.h>
#define TILEWIDTH 32
__global__
void vecConvKernel(float* A, float* B, float* C, int n){
//identify the index of the data to be read
int tx=threadIdx.x;
int bx=blockIdx.x;
int index=bx*blockDim.x+tx;
__shared__ float Ads[TILEWIDTH];
__shared__ float Bds[2*TILEWIDTH];
//assuming n is multiple of TILEWIDTH
// if(index<n){
int i; float val=0.0;
for(i=0;i<gridDim.x-1;i++){
Ads[tx] = A[i*TILEWIDTH+tx];
Bds[tx] = B[i*TILEWIDTH+tx];
Bds[TILEWIDTH + tx] = B[(i+1)*TILEWIDTH + tx];
__syncthreads();
for(int k=0;k<TILEWIDTH;k++){
val+= Ads[k]*Bds[tx+k];
}
__syncthreads();
}
Ads[tx] = A[i*TILEWIDTH + tx];
Bds[tx] = B[i*TILEWIDTH+tx];
Bds[TILEWIDTH + tx] = B[tx];
__syncthreads();
for(int k=0;k<TILEWIDTH;k++){
val+= Ads[k]*Bds[tx+k];
}
__syncthreads();
C[index] = val;
// }
}
__host__
void vecConv(float* A,float* B,float* C, int n){
int c=ceil(n/256.0);
int size = n * sizeof(float);
float *d_A, *d_B, *d_C;
//Allocate device memory for A,B,C
hipMalloc((void**)&d_A, size);
hipMalloc((void**)&d_B, size);
hipMalloc((void**)&d_C, size);
//copy A,B to device memory
hipMemcpy(d_A, A, size, hipMemcpyHostToDevice);
hipMemcpy(d_B, B, size, hipMemcpyHostToDevice);
dim3 dimBlock(TILEWIDTH,1,1);
dim3 dimGrid(ceil(n/(float)TILEWIDTH),1,1);
//call kernal function that the calculates sum and stores it in C
vecConvKernel<<< dimGrid,dimBlock >>>(d_A,d_B,d_C,n);
//the y and z dimensions are set to 1 by default
//copy C from devce memory
hipMemcpy( C,d_C, size, hipMemcpyDeviceToHost);
//free device memories
hipFree(d_A);
hipFree(d_B);
hipFree(d_C);
}
//Kernal function that runs in each thread
int main(){
float *A,*B,*C;
int n=10;
A=(float*)malloc(n*sizeof(float));
B=(float*)malloc(n*sizeof(float));
C=(float*)malloc(n*sizeof(float));
int i;
for(i=0;i<n;i++){
A[i]=(float)i;
B[i]=(float)2*i;
}
vecConv(A,B,C,n);
for(i=0;i<n;i++){
printf("%f ",C[i]);
}
free(A);
free(B);
free(C);
return 0;
} | .text
.amdgcn_target "amdgcn-amd-amdhsa--gfx1100"
.protected _Z13vecConvKernelPfS_S_i
.globl _Z13vecConvKernelPfS_S_i
.p2align 8
.type _Z13vecConvKernelPfS_S_i,@function
_Z13vecConvKernelPfS_S_i:
s_clause 0x2
s_load_b32 s3, s[0:1], 0x20
s_load_b128 s[4:7], s[0:1], 0x0
s_load_b32 s2, s[0:1], 0x2c
s_mov_b32 s8, 0
s_waitcnt lgkmcnt(0)
s_add_i32 s3, s3, -1
s_delay_alu instid0(SALU_CYCLE_1)
s_cmp_eq_u32 s3, 0
s_cbranch_scc1 .LBB0_6
v_dual_mov_b32 v3, 0 :: v_dual_lshlrev_b32 v4, 2, v0
s_delay_alu instid0(VALU_DEP_1)
v_dual_mov_b32 v2, 0 :: v_dual_add_nc_u32 v5, 0x100, v4
v_add_nc_u32_e32 v6, 0x80, v4
s_set_inst_prefetch_distance 0x1
.p2align 6
.LBB0_2:
v_lshl_add_u32 v1, s8, 5, v0
s_add_i32 s8, s8, 1
s_mov_b32 s9, 0
s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
v_lshlrev_b64 v[7:8], 2, v[1:2]
v_lshl_add_u32 v1, s8, 5, v0
v_lshlrev_b64 v[9:10], 2, v[1:2]
s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_4)
v_add_co_u32 v11, vcc_lo, s4, v7
v_add_co_ci_u32_e32 v12, vcc_lo, s5, v8, vcc_lo
v_add_co_u32 v7, vcc_lo, s6, v7
v_add_co_ci_u32_e32 v8, vcc_lo, s7, v8, vcc_lo
v_add_co_u32 v9, vcc_lo, s6, v9
v_add_co_ci_u32_e32 v10, vcc_lo, s7, v10, vcc_lo
global_load_b32 v1, v[11:12], off
s_clause 0x1
global_load_b32 v7, v[7:8], off
global_load_b32 v8, v[9:10], off
s_waitcnt vmcnt(2)
ds_store_b32 v5, v1
s_waitcnt vmcnt(1)
ds_store_b32 v4, v7
s_waitcnt vmcnt(0)
ds_store_b32 v6, v8
s_waitcnt lgkmcnt(0)
s_barrier
buffer_gl0_inv
.LBB0_3:
v_mov_b32_e32 v1, s9
v_add_nc_u32_e32 v7, s9, v4
s_add_i32 s9, s9, 4
ds_load_b32 v1, v1 offset:256
ds_load_b32 v7, v7
s_cmpk_eq_i32 s9, 0x80
s_waitcnt lgkmcnt(0)
v_fmac_f32_e32 v3, v1, v7
s_cbranch_scc0 .LBB0_3
s_cmp_eq_u32 s8, s3
s_barrier
buffer_gl0_inv
s_cbranch_scc0 .LBB0_2
s_set_inst_prefetch_distance 0x2
s_lshl_b32 s8, s8, 5
s_branch .LBB0_7
.LBB0_6:
v_mov_b32_e32 v3, 0
.LBB0_7:
v_dual_mov_b32 v2, 0 :: v_dual_add_nc_u32 v1, s8, v0
s_mov_b32 s3, 0
s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_2)
v_lshlrev_b64 v[4:5], 2, v[1:2]
v_lshlrev_b32_e32 v1, 2, v0
v_add_co_u32 v6, vcc_lo, s4, v4
s_delay_alu instid0(VALU_DEP_3)
v_add_co_ci_u32_e32 v7, vcc_lo, s5, v5, vcc_lo
v_add_co_u32 v4, vcc_lo, s6, v4
v_add_co_ci_u32_e32 v5, vcc_lo, s7, v5, vcc_lo
global_load_b32 v2, v1, s[6:7]
global_load_b32 v6, v[6:7], off
global_load_b32 v4, v[4:5], off
s_waitcnt vmcnt(1)
ds_store_b32 v1, v6 offset:256
s_waitcnt vmcnt(0)
ds_store_2addr_b32 v1, v4, v2 offset1:32
s_waitcnt lgkmcnt(0)
s_barrier
buffer_gl0_inv
.LBB0_8:
v_mov_b32_e32 v2, s3
v_add_nc_u32_e32 v4, s3, v1
s_add_i32 s3, s3, 4
ds_load_b32 v2, v2 offset:256
ds_load_b32 v4, v4
s_cmpk_eq_i32 s3, 0x80
s_waitcnt lgkmcnt(0)
v_fmac_f32_e32 v3, v2, v4
s_cbranch_scc0 .LBB0_8
s_and_b32 s2, 0xffff, s2
s_load_b64 s[0:1], s[0:1], 0x10
v_mad_u64_u32 v[1:2], null, s15, s2, v[0:1]
s_waitcnt lgkmcnt(0)
s_barrier
buffer_gl0_inv
v_ashrrev_i32_e32 v2, 31, v1
s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
v_lshlrev_b64 v[0:1], 2, v[1:2]
v_add_co_u32 v0, vcc_lo, s0, v0
s_delay_alu instid0(VALU_DEP_2)
v_add_co_ci_u32_e32 v1, vcc_lo, s1, v1, vcc_lo
global_store_b32 v[0:1], v3, off
s_nop 0
s_sendmsg sendmsg(MSG_DEALLOC_VGPRS)
s_endpgm
.section .rodata,"a",@progbits
.p2align 6, 0x0
.amdhsa_kernel _Z13vecConvKernelPfS_S_i
.amdhsa_group_segment_fixed_size 384
.amdhsa_private_segment_fixed_size 0
.amdhsa_kernarg_size 288
.amdhsa_user_sgpr_count 15
.amdhsa_user_sgpr_dispatch_ptr 0
.amdhsa_user_sgpr_queue_ptr 0
.amdhsa_user_sgpr_kernarg_segment_ptr 1
.amdhsa_user_sgpr_dispatch_id 0
.amdhsa_user_sgpr_private_segment_size 0
.amdhsa_wavefront_size32 1
.amdhsa_uses_dynamic_stack 0
.amdhsa_enable_private_segment 0
.amdhsa_system_sgpr_workgroup_id_x 1
.amdhsa_system_sgpr_workgroup_id_y 0
.amdhsa_system_sgpr_workgroup_id_z 0
.amdhsa_system_sgpr_workgroup_info 0
.amdhsa_system_vgpr_workitem_id 0
.amdhsa_next_free_vgpr 13
.amdhsa_next_free_sgpr 16
.amdhsa_float_round_mode_32 0
.amdhsa_float_round_mode_16_64 0
.amdhsa_float_denorm_mode_32 3
.amdhsa_float_denorm_mode_16_64 3
.amdhsa_dx10_clamp 1
.amdhsa_ieee_mode 1
.amdhsa_fp16_overflow 0
.amdhsa_workgroup_processor_mode 1
.amdhsa_memory_ordered 1
.amdhsa_forward_progress 0
.amdhsa_shared_vgpr_count 0
.amdhsa_exception_fp_ieee_invalid_op 0
.amdhsa_exception_fp_denorm_src 0
.amdhsa_exception_fp_ieee_div_zero 0
.amdhsa_exception_fp_ieee_overflow 0
.amdhsa_exception_fp_ieee_underflow 0
.amdhsa_exception_fp_ieee_inexact 0
.amdhsa_exception_int_div_zero 0
.end_amdhsa_kernel
.text
.Lfunc_end0:
.size _Z13vecConvKernelPfS_S_i, .Lfunc_end0-_Z13vecConvKernelPfS_S_i
.section .AMDGPU.csdata,"",@progbits
.text
.p2alignl 7, 3214868480
.fill 96, 4, 3214868480
.type __hip_cuid_,@object
.section .bss,"aw",@nobits
.globl __hip_cuid_
__hip_cuid_:
.byte 0
.size __hip_cuid_, 1
.ident "AMD clang version 18.0.0git (https://github.com/RadeonOpenCompute/llvm-project roc-6.3.2 25012 e5bf7e55c91490b07c49d8960fa7983d864936c4)"
.section ".note.GNU-stack","",@progbits
.addrsig
.addrsig_sym __hip_cuid_
.amdgpu_metadata
---
amdhsa.kernels:
- .args:
- .address_space: global
.offset: 0
.size: 8
.value_kind: global_buffer
- .address_space: global
.offset: 8
.size: 8
.value_kind: global_buffer
- .address_space: global
.offset: 16
.size: 8
.value_kind: global_buffer
- .offset: 24
.size: 4
.value_kind: by_value
- .offset: 32
.size: 4
.value_kind: hidden_block_count_x
- .offset: 36
.size: 4
.value_kind: hidden_block_count_y
- .offset: 40
.size: 4
.value_kind: hidden_block_count_z
- .offset: 44
.size: 2
.value_kind: hidden_group_size_x
- .offset: 46
.size: 2
.value_kind: hidden_group_size_y
- .offset: 48
.size: 2
.value_kind: hidden_group_size_z
- .offset: 50
.size: 2
.value_kind: hidden_remainder_x
- .offset: 52
.size: 2
.value_kind: hidden_remainder_y
- .offset: 54
.size: 2
.value_kind: hidden_remainder_z
- .offset: 72
.size: 8
.value_kind: hidden_global_offset_x
- .offset: 80
.size: 8
.value_kind: hidden_global_offset_y
- .offset: 88
.size: 8
.value_kind: hidden_global_offset_z
- .offset: 96
.size: 2
.value_kind: hidden_grid_dims
.group_segment_fixed_size: 384
.kernarg_segment_align: 8
.kernarg_segment_size: 288
.language: OpenCL C
.language_version:
- 2
- 0
.max_flat_workgroup_size: 1024
.name: _Z13vecConvKernelPfS_S_i
.private_segment_fixed_size: 0
.sgpr_count: 18
.sgpr_spill_count: 0
.symbol: _Z13vecConvKernelPfS_S_i.kd
.uniform_work_group_size: 1
.uses_dynamic_stack: false
.vgpr_count: 13
.vgpr_spill_count: 0
.wavefront_size: 32
.workgroup_processor_mode: 1
amdhsa.target: amdgcn-amd-amdhsa--gfx1100
amdhsa.version:
- 1
- 2
...
.end_amdgpu_metadata |
You are a helpful coding assistant specialized in converting HIP source code to AMD host assembly. | #include<hip/hip_runtime.h>
#include<stdio.h>
#include<math.h>
#define TILEWIDTH 32
__global__
void vecConvKernel(float* A, float* B, float* C, int n){
//identify the index of the data to be read
int tx=threadIdx.x;
int bx=blockIdx.x;
int index=bx*blockDim.x+tx;
__shared__ float Ads[TILEWIDTH];
__shared__ float Bds[2*TILEWIDTH];
//assuming n is multiple of TILEWIDTH
// if(index<n){
int i; float val=0.0;
for(i=0;i<gridDim.x-1;i++){
Ads[tx] = A[i*TILEWIDTH+tx];
Bds[tx] = B[i*TILEWIDTH+tx];
Bds[TILEWIDTH + tx] = B[(i+1)*TILEWIDTH + tx];
__syncthreads();
for(int k=0;k<TILEWIDTH;k++){
val+= Ads[k]*Bds[tx+k];
}
__syncthreads();
}
Ads[tx] = A[i*TILEWIDTH + tx];
Bds[tx] = B[i*TILEWIDTH+tx];
Bds[TILEWIDTH + tx] = B[tx];
__syncthreads();
for(int k=0;k<TILEWIDTH;k++){
val+= Ads[k]*Bds[tx+k];
}
__syncthreads();
C[index] = val;
// }
}
__host__
void vecConv(float* A,float* B,float* C, int n){
int c=ceil(n/256.0);
int size = n * sizeof(float);
float *d_A, *d_B, *d_C;
//Allocate device memory for A,B,C
hipMalloc((void**)&d_A, size);
hipMalloc((void**)&d_B, size);
hipMalloc((void**)&d_C, size);
//copy A,B to device memory
hipMemcpy(d_A, A, size, hipMemcpyHostToDevice);
hipMemcpy(d_B, B, size, hipMemcpyHostToDevice);
dim3 dimBlock(TILEWIDTH,1,1);
dim3 dimGrid(ceil(n/(float)TILEWIDTH),1,1);
//call kernal function that the calculates sum and stores it in C
vecConvKernel<<< dimGrid,dimBlock >>>(d_A,d_B,d_C,n);
//the y and z dimensions are set to 1 by default
//copy C from devce memory
hipMemcpy( C,d_C, size, hipMemcpyDeviceToHost);
//free device memories
hipFree(d_A);
hipFree(d_B);
hipFree(d_C);
}
//Kernal function that runs in each thread
int main(){
float *A,*B,*C;
int n=10;
A=(float*)malloc(n*sizeof(float));
B=(float*)malloc(n*sizeof(float));
C=(float*)malloc(n*sizeof(float));
int i;
for(i=0;i<n;i++){
A[i]=(float)i;
B[i]=(float)2*i;
}
vecConv(A,B,C,n);
for(i=0;i<n;i++){
printf("%f ",C[i]);
}
free(A);
free(B);
free(C);
return 0;
} | .text
.file "conv_tiled.hip"
.globl _Z28__device_stub__vecConvKernelPfS_S_i # -- Begin function _Z28__device_stub__vecConvKernelPfS_S_i
.p2align 4, 0x90
.type _Z28__device_stub__vecConvKernelPfS_S_i,@function
_Z28__device_stub__vecConvKernelPfS_S_i: # @_Z28__device_stub__vecConvKernelPfS_S_i
.cfi_startproc
# %bb.0:
subq $120, %rsp
.cfi_def_cfa_offset 128
movq %rdi, 72(%rsp)
movq %rsi, 64(%rsp)
movq %rdx, 56(%rsp)
movl %ecx, 4(%rsp)
leaq 72(%rsp), %rax
movq %rax, 80(%rsp)
leaq 64(%rsp), %rax
movq %rax, 88(%rsp)
leaq 56(%rsp), %rax
movq %rax, 96(%rsp)
leaq 4(%rsp), %rax
movq %rax, 104(%rsp)
leaq 40(%rsp), %rdi
leaq 24(%rsp), %rsi
leaq 16(%rsp), %rdx
leaq 8(%rsp), %rcx
callq __hipPopCallConfiguration
movq 40(%rsp), %rsi
movl 48(%rsp), %edx
movq 24(%rsp), %rcx
movl 32(%rsp), %r8d
leaq 80(%rsp), %r9
movl $_Z13vecConvKernelPfS_S_i, %edi
pushq 8(%rsp)
.cfi_adjust_cfa_offset 8
pushq 24(%rsp)
.cfi_adjust_cfa_offset 8
callq hipLaunchKernel
addq $136, %rsp
.cfi_adjust_cfa_offset -136
retq
.Lfunc_end0:
.size _Z28__device_stub__vecConvKernelPfS_S_i, .Lfunc_end0-_Z28__device_stub__vecConvKernelPfS_S_i
.cfi_endproc
# -- End function
.section .rodata.cst4,"aM",@progbits,4
.p2align 2, 0x0 # -- Begin function _Z7vecConvPfS_S_i
.LCPI1_0:
.long 0x3d000000 # float 0.03125
.text
.globl _Z7vecConvPfS_S_i
.p2align 4, 0x90
.type _Z7vecConvPfS_S_i,@function
_Z7vecConvPfS_S_i: # @_Z7vecConvPfS_S_i
.cfi_startproc
# %bb.0:
pushq %r15
.cfi_def_cfa_offset 16
pushq %r14
.cfi_def_cfa_offset 24
pushq %r13
.cfi_def_cfa_offset 32
pushq %r12
.cfi_def_cfa_offset 40
pushq %rbx
.cfi_def_cfa_offset 48
subq $144, %rsp
.cfi_def_cfa_offset 192
.cfi_offset %rbx, -48
.cfi_offset %r12, -40
.cfi_offset %r13, -32
.cfi_offset %r14, -24
.cfi_offset %r15, -16
movl %ecx, %r15d
movq %rdx, %rbx
movq %rsi, %r12
movq %rdi, %r13
leal (,%r15,4), %eax
movslq %eax, %r14
leaq 24(%rsp), %rdi
movq %r14, %rsi
callq hipMalloc
leaq 16(%rsp), %rdi
movq %r14, %rsi
callq hipMalloc
leaq 8(%rsp), %rdi
movq %r14, %rsi
callq hipMalloc
movq 24(%rsp), %rdi
movq %r13, %rsi
movq %r14, %rdx
movl $1, %ecx
callq hipMemcpy
movq 16(%rsp), %rdi
movq %r12, %rsi
movq %r14, %rdx
movl $1, %ecx
callq hipMemcpy
cvtsi2ss %r15d, %xmm0
mulss .LCPI1_0(%rip), %xmm0
callq ceilf@PLT
cvttss2si %xmm0, %rax
movl %eax, %edi
movabsq $4294967296, %rdx # imm = 0x100000000
orq %rdx, %rdi
orq $32, %rdx
movl $1, %esi
movl $1, %ecx
xorl %r8d, %r8d
xorl %r9d, %r9d
callq __hipPushCallConfiguration
testl %eax, %eax
jne .LBB1_2
# %bb.1:
movq 24(%rsp), %rax
movq 16(%rsp), %rcx
movq 8(%rsp), %rdx
movq %rax, 104(%rsp)
movq %rcx, 96(%rsp)
movq %rdx, 88(%rsp)
movl %r15d, 36(%rsp)
leaq 104(%rsp), %rax
movq %rax, 112(%rsp)
leaq 96(%rsp), %rax
movq %rax, 120(%rsp)
leaq 88(%rsp), %rax
movq %rax, 128(%rsp)
leaq 36(%rsp), %rax
movq %rax, 136(%rsp)
leaq 72(%rsp), %rdi
leaq 56(%rsp), %rsi
leaq 48(%rsp), %rdx
leaq 40(%rsp), %rcx
callq __hipPopCallConfiguration
movq 72(%rsp), %rsi
movl 80(%rsp), %edx
movq 56(%rsp), %rcx
movl 64(%rsp), %r8d
leaq 112(%rsp), %r9
movl $_Z13vecConvKernelPfS_S_i, %edi
pushq 40(%rsp)
.cfi_adjust_cfa_offset 8
pushq 56(%rsp)
.cfi_adjust_cfa_offset 8
callq hipLaunchKernel
addq $16, %rsp
.cfi_adjust_cfa_offset -16
.LBB1_2:
movq 8(%rsp), %rsi
movq %rbx, %rdi
movq %r14, %rdx
movl $2, %ecx
callq hipMemcpy
movq 24(%rsp), %rdi
callq hipFree
movq 16(%rsp), %rdi
callq hipFree
movq 8(%rsp), %rdi
callq hipFree
addq $144, %rsp
.cfi_def_cfa_offset 48
popq %rbx
.cfi_def_cfa_offset 40
popq %r12
.cfi_def_cfa_offset 32
popq %r13
.cfi_def_cfa_offset 24
popq %r14
.cfi_def_cfa_offset 16
popq %r15
.cfi_def_cfa_offset 8
retq
.Lfunc_end1:
.size _Z7vecConvPfS_S_i, .Lfunc_end1-_Z7vecConvPfS_S_i
.cfi_endproc
# -- End function
.globl main # -- Begin function main
.p2align 4, 0x90
.type main,@function
main: # @main
.cfi_startproc
# %bb.0:
pushq %r15
.cfi_def_cfa_offset 16
pushq %r14
.cfi_def_cfa_offset 24
pushq %r12
.cfi_def_cfa_offset 32
pushq %rbx
.cfi_def_cfa_offset 40
pushq %rax
.cfi_def_cfa_offset 48
.cfi_offset %rbx, -40
.cfi_offset %r12, -32
.cfi_offset %r14, -24
.cfi_offset %r15, -16
movl $40, %edi
callq malloc
movq %rax, %rbx
movl $40, %edi
callq malloc
movq %rax, %r14
movl $40, %edi
callq malloc
movq %rax, %r15
xorl %eax, %eax
.p2align 4, 0x90
.LBB2_1: # =>This Inner Loop Header: Depth=1
xorps %xmm0, %xmm0
cvtsi2ss %eax, %xmm0
movss %xmm0, (%rbx,%rax,4)
addss %xmm0, %xmm0
movss %xmm0, (%r14,%rax,4)
incq %rax
cmpq $10, %rax
jne .LBB2_1
# %bb.2:
movq %rbx, %rdi
movq %r14, %rsi
movq %r15, %rdx
movl $10, %ecx
callq _Z7vecConvPfS_S_i
xorl %r12d, %r12d
.p2align 4, 0x90
.LBB2_3: # =>This Inner Loop Header: Depth=1
movss (%r15,%r12,4), %xmm0 # xmm0 = mem[0],zero,zero,zero
cvtss2sd %xmm0, %xmm0
movl $.L.str, %edi
movb $1, %al
callq printf
incq %r12
cmpq $10, %r12
jne .LBB2_3
# %bb.4:
movq %rbx, %rdi
callq free
movq %r14, %rdi
callq free
movq %r15, %rdi
callq free
xorl %eax, %eax
addq $8, %rsp
.cfi_def_cfa_offset 40
popq %rbx
.cfi_def_cfa_offset 32
popq %r12
.cfi_def_cfa_offset 24
popq %r14
.cfi_def_cfa_offset 16
popq %r15
.cfi_def_cfa_offset 8
retq
.Lfunc_end2:
.size main, .Lfunc_end2-main
.cfi_endproc
# -- End function
.p2align 4, 0x90 # -- Begin function __hip_module_ctor
.type __hip_module_ctor,@function
__hip_module_ctor: # @__hip_module_ctor
.cfi_startproc
# %bb.0:
subq $40, %rsp
.cfi_def_cfa_offset 48
cmpq $0, __hip_gpubin_handle(%rip)
jne .LBB3_2
# %bb.1:
movl $__hip_fatbin_wrapper, %edi
callq __hipRegisterFatBinary
movq %rax, __hip_gpubin_handle(%rip)
.LBB3_2:
movq __hip_gpubin_handle(%rip), %rdi
xorps %xmm0, %xmm0
movups %xmm0, 16(%rsp)
movups %xmm0, (%rsp)
movl $_Z13vecConvKernelPfS_S_i, %esi
movl $.L__unnamed_1, %edx
movl $.L__unnamed_1, %ecx
movl $-1, %r8d
xorl %r9d, %r9d
callq __hipRegisterFunction
movl $__hip_module_dtor, %edi
addq $40, %rsp
.cfi_def_cfa_offset 8
jmp atexit # TAILCALL
.Lfunc_end3:
.size __hip_module_ctor, .Lfunc_end3-__hip_module_ctor
.cfi_endproc
# -- End function
.p2align 4, 0x90 # -- Begin function __hip_module_dtor
.type __hip_module_dtor,@function
__hip_module_dtor: # @__hip_module_dtor
.cfi_startproc
# %bb.0:
movq __hip_gpubin_handle(%rip), %rdi
testq %rdi, %rdi
je .LBB4_2
# %bb.1:
pushq %rax
.cfi_def_cfa_offset 16
callq __hipUnregisterFatBinary
movq $0, __hip_gpubin_handle(%rip)
addq $8, %rsp
.cfi_def_cfa_offset 8
.LBB4_2:
retq
.Lfunc_end4:
.size __hip_module_dtor, .Lfunc_end4-__hip_module_dtor
.cfi_endproc
# -- End function
.type _Z13vecConvKernelPfS_S_i,@object # @_Z13vecConvKernelPfS_S_i
.section .rodata,"a",@progbits
.globl _Z13vecConvKernelPfS_S_i
.p2align 3, 0x0
_Z13vecConvKernelPfS_S_i:
.quad _Z28__device_stub__vecConvKernelPfS_S_i
.size _Z13vecConvKernelPfS_S_i, 8
.type .L.str,@object # @.str
.section .rodata.str1.1,"aMS",@progbits,1
.L.str:
.asciz "%f "
.size .L.str, 4
.type .L__unnamed_1,@object # @0
.L__unnamed_1:
.asciz "_Z13vecConvKernelPfS_S_i"
.size .L__unnamed_1, 25
.type __hip_fatbin_wrapper,@object # @__hip_fatbin_wrapper
.section .hipFatBinSegment,"a",@progbits
.p2align 3, 0x0
__hip_fatbin_wrapper:
.long 1212764230 # 0x48495046
.long 1 # 0x1
.quad __hip_fatbin
.quad 0
.size __hip_fatbin_wrapper, 24
.type __hip_gpubin_handle,@object # @__hip_gpubin_handle
.local __hip_gpubin_handle
.comm __hip_gpubin_handle,8,8
.section .init_array,"aw",@init_array
.p2align 3, 0x0
.quad __hip_module_ctor
.type __hip_cuid_,@object # @__hip_cuid_
.bss
.globl __hip_cuid_
__hip_cuid_:
.byte 0 # 0x0
.size __hip_cuid_, 1
.section ".linker-options","e",@llvm_linker_options
.ident "AMD clang version 18.0.0git (https://github.com/RadeonOpenCompute/llvm-project roc-6.3.2 25012 e5bf7e55c91490b07c49d8960fa7983d864936c4)"
.section ".note.GNU-stack","",@progbits
.addrsig
.addrsig_sym _Z28__device_stub__vecConvKernelPfS_S_i
.addrsig_sym __hip_module_ctor
.addrsig_sym __hip_module_dtor
.addrsig_sym _Z13vecConvKernelPfS_S_i
.addrsig_sym __hip_fatbin
.addrsig_sym __hip_fatbin_wrapper
.addrsig_sym __hip_cuid_ |
You are a helpful coding assistant specialized in converting from CUDA device assembly to AMD device assembly. | code for sm_80
Function : _Z13vecConvKernelPfS_S_i
.headerflags @"EF_CUDA_TEXMODE_UNIFIED EF_CUDA_64BIT_ADDRESS EF_CUDA_SM80 EF_CUDA_VIRTUAL_SM(EF_CUDA_SM80)"
/*0000*/ MOV R1, c[0x0][0x28] ; /* 0x00000a0000017a02 */
/* 0x000fe40000000f00 */
/*0010*/ S2R R0, SR_TID.X ; /* 0x0000000000007919 */
/* 0x000e220000002100 */
/*0020*/ HFMA2.MMA R3, -RZ, RZ, 0, 2.384185791015625e-07 ; /* 0x00000004ff037435 */
/* 0x000fe200000001ff */
/*0030*/ ULDC.64 UR6, c[0x0][0x118] ; /* 0x0000460000067ab9 */
/* 0x000fd20000000a00 */
/*0040*/ IMAD.WIDE R22, R0, R3, c[0x0][0x160] ; /* 0x0000580000167625 */
/* 0x001fc800078e0203 */
/*0050*/ IMAD.WIDE R20, R0, R3, c[0x0][0x168] ; /* 0x00005a0000147625 */
/* 0x000fe200078e0203 */
/*0060*/ LDG.E R5, [R22.64] ; /* 0x0000000616057981 */
/* 0x000ea8000c1e1900 */
/*0070*/ LDG.E R13, [R20.64] ; /* 0x00000006140d7981 */
/* 0x000ee2000c1e1900 */
/*0080*/ ULDC UR4, c[0x0][0xc] ; /* 0x0000030000047ab9 */
/* 0x000fe40000000800 */
/*0090*/ UIADD3 UR4, UR4, -0x1, URZ ; /* 0xffffffff04047890 */
/* 0x000fcc000fffe03f */
/*00a0*/ ISETP.NE.AND P0, PT, RZ, UR4, PT ; /* 0x00000004ff007c0c */
/* 0x000fe2000bf05270 */
/*00b0*/ STS [R0.X4], R5 ; /* 0x0000000500007388 */
/* 0x0041e80000004800 */
/*00c0*/ STS [R0.X4+0x80], R13 ; /* 0x0000800d00007388 */
/* 0x0081f00000004800 */
/*00d0*/ @!P0 BRA 0x6b0 ; /* 0x000005d000008947 */
/* 0x000fea0003800000 */
/*00e0*/ IADD3 R18, R0, 0x20, RZ ; /* 0x0000002000127810 */
/* 0x000fe20007ffe0ff */
/*00f0*/ CS2R R16, SRZ ; /* 0x0000000000107805 */
/* 0x000fe2000001ff00 */
/*0100*/ MOV R2, 0x20 ; /* 0x0000002000027802 */
/* 0x000fc60000000f00 */
/*0110*/ IMAD.WIDE R8, R18, R3, c[0x0][0x168] ; /* 0x00005a0012087625 */
/* 0x000fcc00078e0203 */
/*0120*/ LDG.E R9, [R8.64] ; /* 0x0000000608097981 */
/* 0x000ea8000c1e1900 */
/*0130*/ STS [R0.X4+0x100], R9 ; /* 0x0001000900007388 */
/* 0x004fe80000004800 */
/*0140*/ BAR.SYNC.DEFER_BLOCKING 0x0 ; /* 0x0000000000007b1d */
/* 0x000fec0000010000 */
/*0150*/ LDS R10, [R0.X4+0x80] ; /* 0x00008000000a7984 */
/* 0x000fe80000004800 */
/*0160*/ LDS.128 R4, [RZ] ; /* 0x00000000ff047984 */
/* 0x001e280000000c00 */
/*0170*/ LDS R11, [R0.X4+0x84] ; /* 0x00008400000b7984 */
/* 0x000e680000004800 */
/*0180*/ LDS R19, [R0.X4+0x88] ; /* 0x0000880000137984 */
/* 0x000ea80000004800 */
/*0190*/ LDS R24, [R0.X4+0x8c] ; /* 0x00008c0000187984 */
/* 0x000ee80000004800 */
/*01a0*/ LDS R29, [R0.X4+0x90] ; /* 0x00009000001d7984 */
/* 0x000fe80000004800 */
/*01b0*/ LDS.128 R12, [0x10] ; /* 0x00001000ff0c7984 */
/* 0x000f280000000c00 */
/*01c0*/ LDS R28, [R0.X4+0x94] ; /* 0x00009400001c7984 */
/* 0x000f680000004800 */
/*01d0*/ LDS R26, [R0.X4+0x9c] ; /* 0x00009c00001a7984 */
/* 0x000fe80000004800 */
/*01e0*/ LDS R25, [R0.X4+0xa0] ; /* 0x0000a00000197984 */
/* 0x000fe80000004800 */
/*01f0*/ LDS R27, [R0.X4+0xa4] ; /* 0x0000a400001b7984 */
/* 0x000fe20000004800 */
/*0200*/ FFMA R4, R10, R4, R17 ; /* 0x000000040a047223 */
/* 0x001fc60000000011 */
/*0210*/ LDS R17, [R0.X4+0x98] ; /* 0x0000980000117984 */
/* 0x000e220000004800 */
/*0220*/ FFMA R5, R11, R5, R4 ; /* 0x000000050b057223 */
/* 0x002fc60000000004 */
/*0230*/ LDS.128 R8, [0x20] ; /* 0x00002000ff087984 */
/* 0x000e620000000c00 */
/*0240*/ FFMA R5, R19, R6, R5 ; /* 0x0000000613057223 */
/* 0x004fc60000000005 */
/*0250*/ LDS R19, [R0.X4+0xa8] ; /* 0x0000a80000137984 */
/* 0x000ea20000004800 */
/*0260*/ FFMA R5, R24, R7, R5 ; /* 0x0000000718057223 */
/* 0x008fc60000000005 */
/*0270*/ LDS R24, [R0.X4+0xac] ; /* 0x0000ac0000187984 */
/* 0x000ee20000004800 */
/*0280*/ FFMA R5, R29, R12, R5 ; /* 0x0000000c1d057223 */
/* 0x010fc60000000005 */
/*0290*/ LDS R29, [R0.X4+0xc4] ; /* 0x0000c400001d7984 */
/* 0x000fe20000004800 */
/*02a0*/ FFMA R5, R28, R13, R5 ; /* 0x0000000d1c057223 */
/* 0x020fc60000000005 */
/*02b0*/ LDS R28, [R0.X4+0xb4] ; /* 0x0000b400001c7984 */
/* 0x000fe20000004800 */
/*02c0*/ FFMA R14, R17, R14, R5 ; /* 0x0000000e110e7223 */
/* 0x001fc60000000005 */
/*02d0*/ LDS R17, [R0.X4+0xb0] ; /* 0x0000b00000117984 */
/* 0x000fe20000004800 */
/*02e0*/ FFMA R14, R26, R15, R14 ; /* 0x0000000f1a0e7223 */
/* 0x000fc6000000000e */
/*02f0*/ LDS.128 R4, [0x30] ; /* 0x00003000ff047984 */
/* 0x000e220000000c00 */
/*0300*/ FFMA R8, R25, R8, R14 ; /* 0x0000000819087223 */
/* 0x002fc6000000000e */
/*0310*/ LDS R25, [R0.X4+0xb8] ; /* 0x0000b80000197984 */
/* 0x000e620000004800 */
/*0320*/ FFMA R8, R27, R9, R8 ; /* 0x000000091b087223 */
/* 0x000fc60000000008 */
/*0330*/ LDS R26, [R0.X4+0xbc] ; /* 0x0000bc00001a7984 */
/* 0x000f220000004800 */
/*0340*/ FFMA R8, R19, R10, R8 ; /* 0x0000000a13087223 */
/* 0x004fc60000000008 */
/*0350*/ LDS R19, [R0.X4+0xc0] ; /* 0x0000c00000137984 */
/* 0x000fe20000004800 */
/*0360*/ FFMA R8, R24, R11, R8 ; /* 0x0000000b18087223 */
/* 0x008fc60000000008 */
/*0370*/ LDS.128 R12, [0x40] ; /* 0x00004000ff0c7984 */
/* 0x000ea80000000c00 */
/*0380*/ LDS R27, [R0.X4+0xc8] ; /* 0x0000c800001b7984 */
/* 0x000ee80000004800 */
/*0390*/ LDS R24, [R0.X4+0xcc] ; /* 0x0000cc0000187984 */
/* 0x000f620000004800 */
/*03a0*/ FFMA R4, R17, R4, R8 ; /* 0x0000000411047223 */
/* 0x001fc60000000008 */
/*03b0*/ LDS R17, [R0.X4+0xd0] ; /* 0x0000d00000117984 */
/* 0x000fe20000004800 */
/*03c0*/ FFMA R4, R28, R5, R4 ; /* 0x000000051c047223 */
/* 0x000fc60000000004 */
/*03d0*/ LDS.128 R8, [0x50] ; /* 0x00005000ff087984 */
/* 0x000e220000000c00 */
/*03e0*/ FFMA R4, R25, R6, R4 ; /* 0x0000000619047223 */
/* 0x002fc60000000004 */
/*03f0*/ LDS R28, [R0.X4+0xe4] ; /* 0x0000e400001c7984 */
/* 0x000fe20000004800 */
/*0400*/ FFMA R4, R26, R7, R4 ; /* 0x000000071a047223 */
/* 0x010fc60000000004 */
/*0410*/ LDS R26, [R0.X4+0xd4] ; /* 0x0000d400001a7984 */
/* 0x000e620000004800 */
/*0420*/ FFMA R4, R19, R12, R4 ; /* 0x0000000c13047223 */
/* 0x004fc60000000004 */
/*0430*/ LDS R19, [R0.X4+0xd8] ; /* 0x0000d80000137984 */
/* 0x000ea20000004800 */
/*0440*/ FFMA R4, R29, R13, R4 ; /* 0x0000000d1d047223 */
/* 0x000fc60000000004 */
/*0450*/ LDS R12, [R0.X4+0xdc] ; /* 0x0000dc00000c7984 */
/* 0x000f220000004800 */
/*0460*/ FFMA R14, R27, R14, R4 ; /* 0x0000000e1b0e7223 */
/* 0x008fc60000000004 */
/*0470*/ LDS R13, [R0.X4+0xe0] ; /* 0x0000e000000d7984 */
/* 0x000fe20000004800 */
/*0480*/ FFMA R14, R24, R15, R14 ; /* 0x0000000f180e7223 */
/* 0x020fc6000000000e */
/*0490*/ LDS.128 R4, [0x60] ; /* 0x00006000ff047984 */
/* 0x000ee80000000c00 */
/*04a0*/ LDS R25, [R0.X4+0xe8] ; /* 0x0000e80000197984 */
/* 0x000f680000004800 */
/*04b0*/ LDS R24, [R0.X4+0xf4] ; /* 0x0000f40000187984 */
/* 0x000fe20000004800 */
/*04c0*/ FFMA R8, R17, R8, R14 ; /* 0x0000000811087223 */
/* 0x001fc6000000000e */
/*04d0*/ LDS R17, [R0.X4+0xf0] ; /* 0x0000f00000117984 */
/* 0x000fe20000004800 */
/*04e0*/ IMAD.WIDE R14, R2, 0x4, R20 ; /* 0x00000004020e7825 */
/* 0x000fc800078e0214 */
/*04f0*/ FFMA R8, R26, R9, R8 ; /* 0x000000091a087223 */
/* 0x002fe40000000008 */
/*0500*/ LDS R26, [R0.X4+0xec] ; /* 0x0000ec00001a7984 */
/* 0x000e240000004800 */
/*0510*/ FFMA R8, R19, R10, R8 ; /* 0x0000000a13087223 */
/* 0x004fc80000000008 */
/*0520*/ FFMA R8, R12, R11, R8 ; /* 0x0000000b0c087223 */
/* 0x010fc80000000008 */
/*0530*/ FFMA R4, R13, R4, R8 ; /* 0x000000040d047223 */
/* 0x008fe40000000008 */
/*0540*/ LDS.128 R8, [0x70] ; /* 0x00007000ff087984 */
/* 0x000e620000000c00 */
/*0550*/ IMAD.WIDE R12, R2, 0x4, R22 ; /* 0x00000004020c7825 */
/* 0x000fc800078e0216 */
/*0560*/ FFMA R19, R28, R5, R4 ; /* 0x000000051c137223 */
/* 0x000fe40000000004 */
/*0570*/ LDS R5, [R0.X4+0xf8] ; /* 0x0000f80000057984 */
/* 0x000ea80000004800 */
/*0580*/ LDS R4, [R0.X4+0xfc] ; /* 0x0000fc0000047984 */
/* 0x000ee80000004800 */
/*0590*/ BAR.SYNC.DEFER_BLOCKING 0x0 ; /* 0x0000000000007b1d */
/* 0x000fec0000010000 */
/*05a0*/ LDG.E R13, [R12.64] ; /* 0x000000060c0d7981 */
/* 0x000f28000c1e1900 */
/*05b0*/ LDG.E R15, [R14.64] ; /* 0x000000060e0f7981 */
/* 0x000f22000c1e1900 */
/*05c0*/ FFMA R6, R25, R6, R19 ; /* 0x0000000619067223 */
/* 0x020fe20000000013 */
/*05d0*/ IADD3 R16, R16, 0x1, RZ ; /* 0x0000000110107810 */
/* 0x000fc40007ffe0ff */
/*05e0*/ IADD3 R18, R18, 0x20, RZ ; /* 0x0000002012127810 */
/* 0x000fe20007ffe0ff */
/*05f0*/ FFMA R6, R26, R7, R6 ; /* 0x000000071a067223 */
/* 0x001fe20000000006 */
/*0600*/ ISETP.GE.U32.AND P0, PT, R16, UR4, PT ; /* 0x0000000410007c0c */
/* 0x000fe4000bf06070 */
/*0610*/ IADD3 R2, R2, 0x20, RZ ; /* 0x0000002002027810 */
/* 0x000fe20007ffe0ff */
/*0620*/ FFMA R6, R17, R8, R6 ; /* 0x0000000811067223 */
/* 0x002fc80000000006 */
/*0630*/ FFMA R6, R24, R9, R6 ; /* 0x0000000918067223 */
/* 0x000fc80000000006 */
/*0640*/ FFMA R5, R5, R10, R6 ; /* 0x0000000a05057223 */
/* 0x004fc80000000006 */
/*0650*/ FFMA R17, R4, R11, R5 ; /* 0x0000000b04117223 */
/* 0x008fe20000000005 */
/*0660*/ STS [R0.X4], R13 ; /* 0x0000000d00007388 */
/* 0x0101e80000004800 */
/*0670*/ STS [R0.X4+0x80], R15 ; /* 0x0000800f00007388 */
/* 0x0001e20000004800 */
/*0680*/ @!P0 BRA 0x110 ; /* 0xfffffa8000008947 */
/* 0x000fea000383ffff */
/*0690*/ LDG.E R13, [R20.64] ; /* 0x00000006140d7981 */
/* 0x001162000c1e1900 */
/*06a0*/ BRA 0x6c0 ; /* 0x0000001000007947 */
/* 0x000fea0003800000 */
/*06b0*/ MOV R17, RZ ; /* 0x000000ff00117202 */
/* 0x000fe40000000f00 */
/*06c0*/ STS [R0.X4+0x100], R13 ; /* 0x0001000d00007388 */
/* 0x020fe80000004800 */
/*06d0*/ BAR.SYNC.DEFER_BLOCKING 0x0 ; /* 0x0000000000007b1d */
/* 0x000fec0000010000 */
/*06e0*/ LDS R20, [R0.X4+0x80] ; /* 0x0000800000147984 */
/* 0x001fe80000004800 */
/*06f0*/ LDS.128 R4, [RZ] ; /* 0x00000000ff047984 */
/* 0x000e280000000c00 */
/*0700*/ LDS R22, [R0.X4+0x84] ; /* 0x0000840000167984 */
/* 0x000e680000004800 */
/*0710*/ LDS R24, [R0.X4+0x88] ; /* 0x0000880000187984 */
/* 0x000ea80000004800 */
/*0720*/ LDS R18, [R0.X4+0x8c] ; /* 0x00008c0000127984 */
/* 0x000ee80000004800 */
/*0730*/ LDS R21, [R0.X4+0x90] ; /* 0x0000900000157984 */
/* 0x000fe80000004800 */
/*0740*/ LDS.128 R8, [0x10] ; /* 0x00001000ff087984 */
/* 0x000f280000000c00 */
/*0750*/ LDS R16, [R0.X4+0x94] ; /* 0x0000940000107984 */
/* 0x000f280000004800 */
/*0760*/ LDS R25, [R0.X4+0x98] ; /* 0x0000980000197984 */
/* 0x000f280000004800 */
/*0770*/ LDS R2, [R0.X4+0x9c] ; /* 0x00009c0000027984 */
/* 0x000f280000004800 */
/*0780*/ LDS R19, [R0.X4+0xa0] ; /* 0x0000a00000137984 */
/* 0x000fe80000004800 */
/*0790*/ LDS.128 R12, [0x20] ; /* 0x00002000ff0c7984 */
/* 0x000f220000000c00 */
/*07a0*/ FFMA R4, R20, R4, R17 ; /* 0x0000000414047223 */
/* 0x001fc60000000011 */
/*07b0*/ LDS R20, [R0.X4+0xa4] ; /* 0x0000a40000147984 */
/* 0x000e220000004800 */
/*07c0*/ FFMA R5, R22, R5, R4 ; /* 0x0000000516057223 */
/* 0x002fc60000000004 */
/*07d0*/ LDS R23, [R0.X4+0xa8] ; /* 0x0000a80000177984 */
/* 0x000e620000004800 */
/*07e0*/ FFMA R5, R24, R6, R5 ; /* 0x0000000618057223 */
/* 0x004fc60000000005 */
/*07f0*/ LDS R24, [R0.X4+0xac] ; /* 0x0000ac0000187984 */
/* 0x000ea20000004800 */
/*0800*/ FFMA R18, R18, R7, R5 ; /* 0x0000000712127223 */
/* 0x008fc60000000005 */
/*0810*/ LDS R17, [R0.X4+0xb0] ; /* 0x0000b00000117984 */
/* 0x000fe80000004800 */
/*0820*/ LDS.128 R4, [0x30] ; /* 0x00003000ff047984 */
/* 0x000ee20000000c00 */
/*0830*/ FFMA R8, R21, R8, R18 ; /* 0x0000000815087223 */
/* 0x010fc60000000012 */
/*0840*/ LDS R18, [R0.X4+0xb4] ; /* 0x0000b40000127984 */
/* 0x000f220000004800 */
/*0850*/ FFMA R8, R16, R9, R8 ; /* 0x0000000910087223 */
/* 0x000fc60000000008 */
/*0860*/ LDS R21, [R0.X4+0xb8] ; /* 0x0000b80000157984 */
/* 0x000f220000004800 */
/*0870*/ FFMA R8, R25, R10, R8 ; /* 0x0000000a19087223 */
/* 0x000fc60000000008 */
/*0880*/ LDS R22, [R0.X4+0xbc] ; /* 0x0000bc0000167984 */
/* 0x000f220000004800 */
/*0890*/ FFMA R25, R2, R11, R8 ; /* 0x0000000b02197223 */
/* 0x000fc60000000008 */
/*08a0*/ LDS R2, [R0.X4+0xc0] ; /* 0x0000c00000027984 */
/* 0x000fe80000004800 */
/*08b0*/ LDS.128 R8, [0x40] ; /* 0x00004000ff087984 */
/* 0x000f220000000c00 */
/*08c0*/ FFMA R12, R19, R12, R25 ; /* 0x0000000c130c7223 */
/* 0x000fc60000000019 */
/*08d0*/ LDS R16, [R0.X4+0xc4] ; /* 0x0000c40000107984 */
/* 0x000f220000004800 */
/*08e0*/ FFMA R12, R20, R13, R12 ; /* 0x0000000d140c7223 */
/* 0x001fc6000000000c */
/*08f0*/ LDS R19, [R0.X4+0xc8] ; /* 0x0000c80000137984 */
/* 0x000e220000004800 */
/*0900*/ FFMA R12, R23, R14, R12 ; /* 0x0000000e170c7223 */
/* 0x002fc6000000000c */
/*0910*/ LDS R20, [R0.X4+0xcc] ; /* 0x0000cc0000147984 */
/* 0x000e620000004800 */
/*0920*/ FFMA R24, R24, R15, R12 ; /* 0x0000000f18187223 */
/* 0x004fc6000000000c */
/*0930*/ LDS R23, [R0.X4+0xd0] ; /* 0x0000d00000177984 */
/* 0x000fe80000004800 */
/*0940*/ LDS.128 R12, [0x50] ; /* 0x00005000ff0c7984 */
/* 0x000ea20000000c00 */
/*0950*/ FFMA R4, R17, R4, R24 ; /* 0x0000000411047223 */
/* 0x008fc60000000018 */
/*0960*/ LDS R24, [R0.X4+0xd4] ; /* 0x0000d40000187984 */
/* 0x000ee20000004800 */
/*0970*/ FFMA R4, R18, R5, R4 ; /* 0x0000000512047223 */
/* 0x010fc60000000004 */
/*0980*/ LDS R17, [R0.X4+0xd8] ; /* 0x0000d80000117984 */
/* 0x000f220000004800 */
/*0990*/ FFMA R4, R21, R6, R4 ; /* 0x0000000615047223 */
/* 0x000fc60000000004 */
/*09a0*/ LDS R18, [R0.X4+0xdc] ; /* 0x0000dc0000127984 */
/* 0x000f220000004800 */
/*09b0*/ FFMA R25, R22, R7, R4 ; /* 0x0000000716197223 */
/* 0x000fc60000000004 */
/*09c0*/ LDS R21, [R0.X4+0xe0] ; /* 0x0000e00000157984 */
/* 0x000fe80000004800 */
/*09d0*/ LDS.128 R4, [0x60] ; /* 0x00006000ff047984 */
/* 0x000f220000000c00 */
/*09e0*/ FFMA R8, R2, R8, R25 ; /* 0x0000000802087223 */
/* 0x000fc60000000019 */
/*09f0*/ LDS R2, [R0.X4+0xe4] ; /* 0x0000e40000027984 */
/* 0x000f220000004800 */
/*0a00*/ FFMA R8, R16, R9, R8 ; /* 0x0000000910087223 */
/* 0x000fc60000000008 */
/*0a10*/ LDS R25, [R0.X4+0xe8] ; /* 0x0000e80000197984 */
/* 0x000f220000004800 */
/*0a20*/ FFMA R8, R19, R10, R8 ; /* 0x0000000a13087223 */
/* 0x001fc60000000008 */
/*0a30*/ LDS R16, [R0.X4+0xec] ; /* 0x0000ec0000107984 */
/* 0x000e220000004800 */
/*0a40*/ FFMA R22, R20, R11, R8 ; /* 0x0000000b14167223 */
/* 0x002fc60000000008 */
/*0a50*/ LDS R19, [R0.X4+0xf0] ; /* 0x0000f00000137984 */
/* 0x000fe80000004800 */
/*0a60*/ LDS.128 R8, [0x70] ; /* 0x00007000ff087984 */
/* 0x000e620000000c00 */
/*0a70*/ FFMA R12, R23, R12, R22 ; /* 0x0000000c170c7223 */
/* 0x004fc60000000016 */
/*0a80*/ LDS R20, [R0.X4+0xf4] ; /* 0x0000f40000147984 */
/* 0x000ea20000004800 */
/*0a90*/ FFMA R13, R24, R13, R12 ; /* 0x0000000d180d7223 */
/* 0x008fc6000000000c */
/*0aa0*/ LDS R23, [R0.X4+0xf8] ; /* 0x0000f80000177984 */
/* 0x000ee20000004800 */
/*0ab0*/ FFMA R13, R17, R14, R13 ; /* 0x0000000e110d7223 */
/* 0x010fc6000000000d */
/*0ac0*/ LDS R12, [R0.X4+0xfc] ; /* 0x0000fc00000c7984 */
/* 0x000f220000004800 */
/*0ad0*/ FFMA R13, R18, R15, R13 ; /* 0x0000000f120d7223 */
/* 0x000fc6000000000d */
/*0ae0*/ S2R R15, SR_CTAID.X ; /* 0x00000000000f7919 */
/* 0x000e620000002500 */
/*0af0*/ FFMA R4, R21, R4, R13 ; /* 0x0000000415047223 */
/* 0x000fc8000000000d */
/*0b00*/ FFMA R2, R2, R5, R4 ; /* 0x0000000502027223 */
/* 0x000fc80000000004 */
/*0b10*/ FFMA R2, R25, R6, R2 ; /* 0x0000000619027223 */
/* 0x000fc80000000002 */
/*0b20*/ FFMA R2, R16, R7, R2 ; /* 0x0000000710027223 */
/* 0x001fc80000000002 */
/*0b30*/ FFMA R2, R19, R8, R2 ; /* 0x0000000813027223 */
/* 0x002fe40000000002 */
/*0b40*/ IMAD R4, R15, c[0x0][0x0], R0 ; /* 0x000000000f047a24 */
/* 0x000fe400078e0200 */
/*0b50*/ FFMA R2, R20, R9, R2 ; /* 0x0000000914027223 */
/* 0x004fc80000000002 */
/*0b60*/ FFMA R10, R23, R10, R2 ; /* 0x0000000a170a7223 */
/* 0x008fe40000000002 */
/*0b70*/ IMAD.WIDE R2, R4, R3, c[0x0][0x170] ; /* 0x00005c0004027625 */
/* 0x000fc800078e0203 */
/*0b80*/ FFMA R11, R12, R11, R10 ; /* 0x0000000b0c0b7223 */
/* 0x010fe2000000000a */
/*0b90*/ BAR.SYNC.DEFER_BLOCKING 0x0 ; /* 0x0000000000007b1d */
/* 0x000fec0000010000 */
/*0ba0*/ STG.E [R2.64], R11 ; /* 0x0000000b02007986 */
/* 0x000fe2000c101906 */
/*0bb0*/ EXIT ; /* 0x000000000000794d */
/* 0x000fea0003800000 */
/*0bc0*/ BRA 0xbc0; /* 0xfffffff000007947 */
/* 0x000fc0000383ffff */
/*0bd0*/ NOP; /* 0x0000000000007918 */
/* 0x000fc00000000000 */
/*0be0*/ NOP; /* 0x0000000000007918 */
/* 0x000fc00000000000 */
/*0bf0*/ NOP; /* 0x0000000000007918 */
/* 0x000fc00000000000 */
/*0c00*/ NOP; /* 0x0000000000007918 */
/* 0x000fc00000000000 */
/*0c10*/ NOP; /* 0x0000000000007918 */
/* 0x000fc00000000000 */
/*0c20*/ NOP; /* 0x0000000000007918 */
/* 0x000fc00000000000 */
/*0c30*/ NOP; /* 0x0000000000007918 */
/* 0x000fc00000000000 */
/*0c40*/ NOP; /* 0x0000000000007918 */
/* 0x000fc00000000000 */
/*0c50*/ NOP; /* 0x0000000000007918 */
/* 0x000fc00000000000 */
/*0c60*/ NOP; /* 0x0000000000007918 */
/* 0x000fc00000000000 */
/*0c70*/ NOP; /* 0x0000000000007918 */
/* 0x000fc00000000000 */
.......... | .text
.amdgcn_target "amdgcn-amd-amdhsa--gfx1100"
.protected _Z13vecConvKernelPfS_S_i
.globl _Z13vecConvKernelPfS_S_i
.p2align 8
.type _Z13vecConvKernelPfS_S_i,@function
_Z13vecConvKernelPfS_S_i:
s_clause 0x2
s_load_b32 s3, s[0:1], 0x20
s_load_b128 s[4:7], s[0:1], 0x0
s_load_b32 s2, s[0:1], 0x2c
s_mov_b32 s8, 0
s_waitcnt lgkmcnt(0)
s_add_i32 s3, s3, -1
s_delay_alu instid0(SALU_CYCLE_1)
s_cmp_eq_u32 s3, 0
s_cbranch_scc1 .LBB0_6
v_dual_mov_b32 v3, 0 :: v_dual_lshlrev_b32 v4, 2, v0
s_delay_alu instid0(VALU_DEP_1)
v_dual_mov_b32 v2, 0 :: v_dual_add_nc_u32 v5, 0x100, v4
v_add_nc_u32_e32 v6, 0x80, v4
s_set_inst_prefetch_distance 0x1
.p2align 6
.LBB0_2:
v_lshl_add_u32 v1, s8, 5, v0
s_add_i32 s8, s8, 1
s_mov_b32 s9, 0
s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
v_lshlrev_b64 v[7:8], 2, v[1:2]
v_lshl_add_u32 v1, s8, 5, v0
v_lshlrev_b64 v[9:10], 2, v[1:2]
s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_4)
v_add_co_u32 v11, vcc_lo, s4, v7
v_add_co_ci_u32_e32 v12, vcc_lo, s5, v8, vcc_lo
v_add_co_u32 v7, vcc_lo, s6, v7
v_add_co_ci_u32_e32 v8, vcc_lo, s7, v8, vcc_lo
v_add_co_u32 v9, vcc_lo, s6, v9
v_add_co_ci_u32_e32 v10, vcc_lo, s7, v10, vcc_lo
global_load_b32 v1, v[11:12], off
s_clause 0x1
global_load_b32 v7, v[7:8], off
global_load_b32 v8, v[9:10], off
s_waitcnt vmcnt(2)
ds_store_b32 v5, v1
s_waitcnt vmcnt(1)
ds_store_b32 v4, v7
s_waitcnt vmcnt(0)
ds_store_b32 v6, v8
s_waitcnt lgkmcnt(0)
s_barrier
buffer_gl0_inv
.LBB0_3:
v_mov_b32_e32 v1, s9
v_add_nc_u32_e32 v7, s9, v4
s_add_i32 s9, s9, 4
ds_load_b32 v1, v1 offset:256
ds_load_b32 v7, v7
s_cmpk_eq_i32 s9, 0x80
s_waitcnt lgkmcnt(0)
v_fmac_f32_e32 v3, v1, v7
s_cbranch_scc0 .LBB0_3
s_cmp_eq_u32 s8, s3
s_barrier
buffer_gl0_inv
s_cbranch_scc0 .LBB0_2
s_set_inst_prefetch_distance 0x2
s_lshl_b32 s8, s8, 5
s_branch .LBB0_7
.LBB0_6:
v_mov_b32_e32 v3, 0
.LBB0_7:
v_dual_mov_b32 v2, 0 :: v_dual_add_nc_u32 v1, s8, v0
s_mov_b32 s3, 0
s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_2)
v_lshlrev_b64 v[4:5], 2, v[1:2]
v_lshlrev_b32_e32 v1, 2, v0
v_add_co_u32 v6, vcc_lo, s4, v4
s_delay_alu instid0(VALU_DEP_3)
v_add_co_ci_u32_e32 v7, vcc_lo, s5, v5, vcc_lo
v_add_co_u32 v4, vcc_lo, s6, v4
v_add_co_ci_u32_e32 v5, vcc_lo, s7, v5, vcc_lo
global_load_b32 v2, v1, s[6:7]
global_load_b32 v6, v[6:7], off
global_load_b32 v4, v[4:5], off
s_waitcnt vmcnt(1)
ds_store_b32 v1, v6 offset:256
s_waitcnt vmcnt(0)
ds_store_2addr_b32 v1, v4, v2 offset1:32
s_waitcnt lgkmcnt(0)
s_barrier
buffer_gl0_inv
.LBB0_8:
v_mov_b32_e32 v2, s3
v_add_nc_u32_e32 v4, s3, v1
s_add_i32 s3, s3, 4
ds_load_b32 v2, v2 offset:256
ds_load_b32 v4, v4
s_cmpk_eq_i32 s3, 0x80
s_waitcnt lgkmcnt(0)
v_fmac_f32_e32 v3, v2, v4
s_cbranch_scc0 .LBB0_8
s_and_b32 s2, 0xffff, s2
s_load_b64 s[0:1], s[0:1], 0x10
v_mad_u64_u32 v[1:2], null, s15, s2, v[0:1]
s_waitcnt lgkmcnt(0)
s_barrier
buffer_gl0_inv
v_ashrrev_i32_e32 v2, 31, v1
s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
v_lshlrev_b64 v[0:1], 2, v[1:2]
v_add_co_u32 v0, vcc_lo, s0, v0
s_delay_alu instid0(VALU_DEP_2)
v_add_co_ci_u32_e32 v1, vcc_lo, s1, v1, vcc_lo
global_store_b32 v[0:1], v3, off
s_nop 0
s_sendmsg sendmsg(MSG_DEALLOC_VGPRS)
s_endpgm
.section .rodata,"a",@progbits
.p2align 6, 0x0
.amdhsa_kernel _Z13vecConvKernelPfS_S_i
.amdhsa_group_segment_fixed_size 384
.amdhsa_private_segment_fixed_size 0
.amdhsa_kernarg_size 288
.amdhsa_user_sgpr_count 15
.amdhsa_user_sgpr_dispatch_ptr 0
.amdhsa_user_sgpr_queue_ptr 0
.amdhsa_user_sgpr_kernarg_segment_ptr 1
.amdhsa_user_sgpr_dispatch_id 0
.amdhsa_user_sgpr_private_segment_size 0
.amdhsa_wavefront_size32 1
.amdhsa_uses_dynamic_stack 0
.amdhsa_enable_private_segment 0
.amdhsa_system_sgpr_workgroup_id_x 1
.amdhsa_system_sgpr_workgroup_id_y 0
.amdhsa_system_sgpr_workgroup_id_z 0
.amdhsa_system_sgpr_workgroup_info 0
.amdhsa_system_vgpr_workitem_id 0
.amdhsa_next_free_vgpr 13
.amdhsa_next_free_sgpr 16
.amdhsa_float_round_mode_32 0
.amdhsa_float_round_mode_16_64 0
.amdhsa_float_denorm_mode_32 3
.amdhsa_float_denorm_mode_16_64 3
.amdhsa_dx10_clamp 1
.amdhsa_ieee_mode 1
.amdhsa_fp16_overflow 0
.amdhsa_workgroup_processor_mode 1
.amdhsa_memory_ordered 1
.amdhsa_forward_progress 0
.amdhsa_shared_vgpr_count 0
.amdhsa_exception_fp_ieee_invalid_op 0
.amdhsa_exception_fp_denorm_src 0
.amdhsa_exception_fp_ieee_div_zero 0
.amdhsa_exception_fp_ieee_overflow 0
.amdhsa_exception_fp_ieee_underflow 0
.amdhsa_exception_fp_ieee_inexact 0
.amdhsa_exception_int_div_zero 0
.end_amdhsa_kernel
.text
.Lfunc_end0:
.size _Z13vecConvKernelPfS_S_i, .Lfunc_end0-_Z13vecConvKernelPfS_S_i
.section .AMDGPU.csdata,"",@progbits
.text
.p2alignl 7, 3214868480
.fill 96, 4, 3214868480
.type __hip_cuid_,@object
.section .bss,"aw",@nobits
.globl __hip_cuid_
__hip_cuid_:
.byte 0
.size __hip_cuid_, 1
.ident "AMD clang version 18.0.0git (https://github.com/RadeonOpenCompute/llvm-project roc-6.3.2 25012 e5bf7e55c91490b07c49d8960fa7983d864936c4)"
.section ".note.GNU-stack","",@progbits
.addrsig
.addrsig_sym __hip_cuid_
.amdgpu_metadata
---
amdhsa.kernels:
- .args:
- .address_space: global
.offset: 0
.size: 8
.value_kind: global_buffer
- .address_space: global
.offset: 8
.size: 8
.value_kind: global_buffer
- .address_space: global
.offset: 16
.size: 8
.value_kind: global_buffer
- .offset: 24
.size: 4
.value_kind: by_value
- .offset: 32
.size: 4
.value_kind: hidden_block_count_x
- .offset: 36
.size: 4
.value_kind: hidden_block_count_y
- .offset: 40
.size: 4
.value_kind: hidden_block_count_z
- .offset: 44
.size: 2
.value_kind: hidden_group_size_x
- .offset: 46
.size: 2
.value_kind: hidden_group_size_y
- .offset: 48
.size: 2
.value_kind: hidden_group_size_z
- .offset: 50
.size: 2
.value_kind: hidden_remainder_x
- .offset: 52
.size: 2
.value_kind: hidden_remainder_y
- .offset: 54
.size: 2
.value_kind: hidden_remainder_z
- .offset: 72
.size: 8
.value_kind: hidden_global_offset_x
- .offset: 80
.size: 8
.value_kind: hidden_global_offset_y
- .offset: 88
.size: 8
.value_kind: hidden_global_offset_z
- .offset: 96
.size: 2
.value_kind: hidden_grid_dims
.group_segment_fixed_size: 384
.kernarg_segment_align: 8
.kernarg_segment_size: 288
.language: OpenCL C
.language_version:
- 2
- 0
.max_flat_workgroup_size: 1024
.name: _Z13vecConvKernelPfS_S_i
.private_segment_fixed_size: 0
.sgpr_count: 18
.sgpr_spill_count: 0
.symbol: _Z13vecConvKernelPfS_S_i.kd
.uniform_work_group_size: 1
.uses_dynamic_stack: false
.vgpr_count: 13
.vgpr_spill_count: 0
.wavefront_size: 32
.workgroup_processor_mode: 1
amdhsa.target: amdgcn-amd-amdhsa--gfx1100
amdhsa.version:
- 1
- 2
...
.end_amdgpu_metadata |
You are a helpful coding assistant specialized in converting from CUDA host assembly to AMD host assembly. | .file "tmpxft_000bb45e_00000000-6_conv_tiled.cudafe1.cpp"
.text
#APP
#NO_APP
.type _ZL26__cudaUnregisterBinaryUtilv, @function
_ZL26__cudaUnregisterBinaryUtilv:
.LFB2061:
.cfi_startproc
endbr64
subq $8, %rsp
.cfi_def_cfa_offset 16
movq _ZL20__cudaFatCubinHandle(%rip), %rdi
call __cudaUnregisterFatBinary@PLT
addq $8, %rsp
.cfi_def_cfa_offset 8
ret
.cfi_endproc
.LFE2061:
.size _ZL26__cudaUnregisterBinaryUtilv, .-_ZL26__cudaUnregisterBinaryUtilv
.globl _Z38__device_stub__Z13vecConvKernelPfS_S_iPfS_S_i
.type _Z38__device_stub__Z13vecConvKernelPfS_S_iPfS_S_i, @function
_Z38__device_stub__Z13vecConvKernelPfS_S_iPfS_S_i:
.LFB2083:
.cfi_startproc
endbr64
subq $152, %rsp
.cfi_def_cfa_offset 160
movq %rdi, 24(%rsp)
movq %rsi, 16(%rsp)
movq %rdx, 8(%rsp)
movl %ecx, 4(%rsp)
movq %fs:40, %rax
movq %rax, 136(%rsp)
xorl %eax, %eax
leaq 24(%rsp), %rax
movq %rax, 96(%rsp)
leaq 16(%rsp), %rax
movq %rax, 104(%rsp)
leaq 8(%rsp), %rax
movq %rax, 112(%rsp)
leaq 4(%rsp), %rax
movq %rax, 120(%rsp)
movl $1, 48(%rsp)
movl $1, 52(%rsp)
movl $1, 56(%rsp)
movl $1, 60(%rsp)
movl $1, 64(%rsp)
movl $1, 68(%rsp)
leaq 40(%rsp), %rcx
leaq 32(%rsp), %rdx
leaq 60(%rsp), %rsi
leaq 48(%rsp), %rdi
call __cudaPopCallConfiguration@PLT
testl %eax, %eax
je .L7
.L3:
movq 136(%rsp), %rax
subq %fs:40, %rax
jne .L8
addq $152, %rsp
.cfi_remember_state
.cfi_def_cfa_offset 8
ret
.L7:
.cfi_restore_state
pushq 40(%rsp)
.cfi_def_cfa_offset 168
pushq 40(%rsp)
.cfi_def_cfa_offset 176
leaq 112(%rsp), %r9
movq 76(%rsp), %rcx
movl 84(%rsp), %r8d
movq 64(%rsp), %rsi
movl 72(%rsp), %edx
leaq _Z13vecConvKernelPfS_S_i(%rip), %rdi
call cudaLaunchKernel@PLT
addq $16, %rsp
.cfi_def_cfa_offset 160
jmp .L3
.L8:
call __stack_chk_fail@PLT
.cfi_endproc
.LFE2083:
.size _Z38__device_stub__Z13vecConvKernelPfS_S_iPfS_S_i, .-_Z38__device_stub__Z13vecConvKernelPfS_S_iPfS_S_i
.globl _Z13vecConvKernelPfS_S_i
.type _Z13vecConvKernelPfS_S_i, @function
_Z13vecConvKernelPfS_S_i:
.LFB2084:
.cfi_startproc
endbr64
subq $8, %rsp
.cfi_def_cfa_offset 16
call _Z38__device_stub__Z13vecConvKernelPfS_S_iPfS_S_i
addq $8, %rsp
.cfi_def_cfa_offset 8
ret
.cfi_endproc
.LFE2084:
.size _Z13vecConvKernelPfS_S_i, .-_Z13vecConvKernelPfS_S_i
.globl _Z7vecConvPfS_S_i
.type _Z7vecConvPfS_S_i, @function
_Z7vecConvPfS_S_i:
.LFB2057:
.cfi_startproc
endbr64
pushq %r14
.cfi_def_cfa_offset 16
.cfi_offset 14, -16
pushq %r13
.cfi_def_cfa_offset 24
.cfi_offset 13, -24
pushq %r12
.cfi_def_cfa_offset 32
.cfi_offset 12, -32
pushq %rbp
.cfi_def_cfa_offset 40
.cfi_offset 6, -40
pushq %rbx
.cfi_def_cfa_offset 48
.cfi_offset 3, -48
subq $64, %rsp
.cfi_def_cfa_offset 112
movq %rdi, %r14
movq %rsi, %r13
movq %rdx, %r12
movl %ecx, %ebp
movq %fs:40, %rax
movq %rax, 56(%rsp)
xorl %eax, %eax
leal 0(,%rcx,4), %ebx
movslq %ebx, %rbx
leaq 8(%rsp), %rdi
movq %rbx, %rsi
call cudaMalloc@PLT
leaq 16(%rsp), %rdi
movq %rbx, %rsi
call cudaMalloc@PLT
leaq 24(%rsp), %rdi
movq %rbx, %rsi
call cudaMalloc@PLT
movl $1, %ecx
movq %rbx, %rdx
movq %r14, %rsi
movq 8(%rsp), %rdi
call cudaMemcpy@PLT
movl $1, %ecx
movq %rbx, %rdx
movq %r13, %rsi
movq 16(%rsp), %rdi
call cudaMemcpy@PLT
movl $32, 32(%rsp)
movl $1, 36(%rsp)
movl $1, 40(%rsp)
pxor %xmm0, %xmm0
cvtsi2ssl %ebp, %xmm0
mulss .LC0(%rip), %xmm0
movaps %xmm0, %xmm3
movss .LC4(%rip), %xmm2
movaps %xmm0, %xmm1
andps %xmm2, %xmm1
movss .LC1(%rip), %xmm4
ucomiss %xmm1, %xmm4
jbe .L12
cvttss2sil %xmm0, %eax
pxor %xmm1, %xmm1
cvtsi2ssl %eax, %xmm1
cmpnless %xmm1, %xmm3
movss .LC3(%rip), %xmm4
andps %xmm4, %xmm3
addss %xmm1, %xmm3
andnps %xmm0, %xmm2
orps %xmm2, %xmm3
.L12:
cvttss2siq %xmm3, %rax
movl %eax, 44(%rsp)
movl $1, 48(%rsp)
movl 40(%rsp), %ecx
movl $0, %r9d
movl $0, %r8d
movq 32(%rsp), %rdx
movq 44(%rsp), %rdi
movl $1, %esi
call __cudaPushCallConfiguration@PLT
testl %eax, %eax
je .L16
.L13:
movl $2, %ecx
movq %rbx, %rdx
movq 24(%rsp), %rsi
movq %r12, %rdi
call cudaMemcpy@PLT
movq 8(%rsp), %rdi
call cudaFree@PLT
movq 16(%rsp), %rdi
call cudaFree@PLT
movq 24(%rsp), %rdi
call cudaFree@PLT
movq 56(%rsp), %rax
subq %fs:40, %rax
jne .L17
addq $64, %rsp
.cfi_remember_state
.cfi_def_cfa_offset 48
popq %rbx
.cfi_def_cfa_offset 40
popq %rbp
.cfi_def_cfa_offset 32
popq %r12
.cfi_def_cfa_offset 24
popq %r13
.cfi_def_cfa_offset 16
popq %r14
.cfi_def_cfa_offset 8
ret
.L16:
.cfi_restore_state
movl %ebp, %ecx
movq 24(%rsp), %rdx
movq 16(%rsp), %rsi
movq 8(%rsp), %rdi
call _Z38__device_stub__Z13vecConvKernelPfS_S_iPfS_S_i
jmp .L13
.L17:
call __stack_chk_fail@PLT
.cfi_endproc
.LFE2057:
.size _Z7vecConvPfS_S_i, .-_Z7vecConvPfS_S_i
.section .rodata.str1.1,"aMS",@progbits,1
.LC5:
.string "%f "
.text
.globl main
.type main, @function
main:
.LFB2058:
.cfi_startproc
endbr64
pushq %r15
.cfi_def_cfa_offset 16
.cfi_offset 15, -16
pushq %r14
.cfi_def_cfa_offset 24
.cfi_offset 14, -24
pushq %r13
.cfi_def_cfa_offset 32
.cfi_offset 13, -32
pushq %r12
.cfi_def_cfa_offset 40
.cfi_offset 12, -40
pushq %rbp
.cfi_def_cfa_offset 48
.cfi_offset 6, -48
pushq %rbx
.cfi_def_cfa_offset 56
.cfi_offset 3, -56
subq $8, %rsp
.cfi_def_cfa_offset 64
movl $40, %edi
call malloc@PLT
movq %rax, %rbp
movl $40, %edi
call malloc@PLT
movq %rax, %rbx
movl $40, %edi
call malloc@PLT
movq %rax, %r12
movl $0, %eax
.L19:
pxor %xmm0, %xmm0
cvtsi2ssl %eax, %xmm0
movss %xmm0, 0(%rbp,%rax,4)
addss %xmm0, %xmm0
movss %xmm0, (%rbx,%rax,4)
addq $1, %rax
cmpq $10, %rax
jne .L19
movl $10, %ecx
movq %r12, %rdx
movq %rbx, %rsi
movq %rbp, %rdi
call _Z7vecConvPfS_S_i
movq %r12, %r13
leaq 40(%r12), %r15
leaq .LC5(%rip), %r14
.L20:
pxor %xmm0, %xmm0
cvtss2sd 0(%r13), %xmm0
movq %r14, %rsi
movl $2, %edi
movl $1, %eax
call __printf_chk@PLT
addq $4, %r13
cmpq %r15, %r13
jne .L20
movq %rbp, %rdi
call free@PLT
movq %rbx, %rdi
call free@PLT
movq %r12, %rdi
call free@PLT
movl $0, %eax
addq $8, %rsp
.cfi_def_cfa_offset 56
popq %rbx
.cfi_def_cfa_offset 48
popq %rbp
.cfi_def_cfa_offset 40
popq %r12
.cfi_def_cfa_offset 32
popq %r13
.cfi_def_cfa_offset 24
popq %r14
.cfi_def_cfa_offset 16
popq %r15
.cfi_def_cfa_offset 8
ret
.cfi_endproc
.LFE2058:
.size main, .-main
.section .rodata.str1.1
.LC6:
.string "_Z13vecConvKernelPfS_S_i"
.text
.type _ZL24__sti____cudaRegisterAllv, @function
_ZL24__sti____cudaRegisterAllv:
.LFB2086:
.cfi_startproc
endbr64
subq $8, %rsp
.cfi_def_cfa_offset 16
leaq _ZL15__fatDeviceText(%rip), %rdi
call __cudaRegisterFatBinary@PLT
movq %rax, %rdi
movq %rax, _ZL20__cudaFatCubinHandle(%rip)
pushq $0
.cfi_def_cfa_offset 24
pushq $0
.cfi_def_cfa_offset 32
pushq $0
.cfi_def_cfa_offset 40
pushq $0
.cfi_def_cfa_offset 48
movl $0, %r9d
movl $-1, %r8d
leaq .LC6(%rip), %rdx
movq %rdx, %rcx
leaq _Z13vecConvKernelPfS_S_i(%rip), %rsi
call __cudaRegisterFunction@PLT
addq $32, %rsp
.cfi_def_cfa_offset 16
movq _ZL20__cudaFatCubinHandle(%rip), %rdi
call __cudaRegisterFatBinaryEnd@PLT
leaq _ZL26__cudaUnregisterBinaryUtilv(%rip), %rdi
call atexit@PLT
addq $8, %rsp
.cfi_def_cfa_offset 8
ret
.cfi_endproc
.LFE2086:
.size _ZL24__sti____cudaRegisterAllv, .-_ZL24__sti____cudaRegisterAllv
.section .init_array,"aw"
.align 8
.quad _ZL24__sti____cudaRegisterAllv
.section .nvFatBinSegment,"aw"
.align 8
.type _ZL15__fatDeviceText, @object
.size _ZL15__fatDeviceText, 24
_ZL15__fatDeviceText:
.long 1180844977
.long 1
.quad fatbinData
.quad 0
.local _ZL20__cudaFatCubinHandle
.comm _ZL20__cudaFatCubinHandle,8,8
.section .rodata.cst4,"aM",@progbits,4
.align 4
.LC0:
.long 1023410176
.align 4
.LC1:
.long 1258291200
.align 4
.LC3:
.long 1065353216
.align 4
.LC4:
.long 2147483647
.ident "GCC: (Ubuntu 13.3.0-6ubuntu2~24.04) 13.3.0"
.section .note.GNU-stack,"",@progbits
.section .note.gnu.property,"a"
.align 8
.long 1f - 0f
.long 4f - 1f
.long 5
0:
.string "GNU"
1:
.align 8
.long 0xc0000002
.long 3f - 2f
2:
.long 0x3
3:
.align 8
4: | .text
.file "conv_tiled.hip"
.globl _Z28__device_stub__vecConvKernelPfS_S_i # -- Begin function _Z28__device_stub__vecConvKernelPfS_S_i
.p2align 4, 0x90
.type _Z28__device_stub__vecConvKernelPfS_S_i,@function
_Z28__device_stub__vecConvKernelPfS_S_i: # @_Z28__device_stub__vecConvKernelPfS_S_i
.cfi_startproc
# %bb.0:
subq $120, %rsp
.cfi_def_cfa_offset 128
movq %rdi, 72(%rsp)
movq %rsi, 64(%rsp)
movq %rdx, 56(%rsp)
movl %ecx, 4(%rsp)
leaq 72(%rsp), %rax
movq %rax, 80(%rsp)
leaq 64(%rsp), %rax
movq %rax, 88(%rsp)
leaq 56(%rsp), %rax
movq %rax, 96(%rsp)
leaq 4(%rsp), %rax
movq %rax, 104(%rsp)
leaq 40(%rsp), %rdi
leaq 24(%rsp), %rsi
leaq 16(%rsp), %rdx
leaq 8(%rsp), %rcx
callq __hipPopCallConfiguration
movq 40(%rsp), %rsi
movl 48(%rsp), %edx
movq 24(%rsp), %rcx
movl 32(%rsp), %r8d
leaq 80(%rsp), %r9
movl $_Z13vecConvKernelPfS_S_i, %edi
pushq 8(%rsp)
.cfi_adjust_cfa_offset 8
pushq 24(%rsp)
.cfi_adjust_cfa_offset 8
callq hipLaunchKernel
addq $136, %rsp
.cfi_adjust_cfa_offset -136
retq
.Lfunc_end0:
.size _Z28__device_stub__vecConvKernelPfS_S_i, .Lfunc_end0-_Z28__device_stub__vecConvKernelPfS_S_i
.cfi_endproc
# -- End function
.section .rodata.cst4,"aM",@progbits,4
.p2align 2, 0x0 # -- Begin function _Z7vecConvPfS_S_i
.LCPI1_0:
.long 0x3d000000 # float 0.03125
.text
.globl _Z7vecConvPfS_S_i
.p2align 4, 0x90
.type _Z7vecConvPfS_S_i,@function
_Z7vecConvPfS_S_i: # @_Z7vecConvPfS_S_i
.cfi_startproc
# %bb.0:
pushq %r15
.cfi_def_cfa_offset 16
pushq %r14
.cfi_def_cfa_offset 24
pushq %r13
.cfi_def_cfa_offset 32
pushq %r12
.cfi_def_cfa_offset 40
pushq %rbx
.cfi_def_cfa_offset 48
subq $144, %rsp
.cfi_def_cfa_offset 192
.cfi_offset %rbx, -48
.cfi_offset %r12, -40
.cfi_offset %r13, -32
.cfi_offset %r14, -24
.cfi_offset %r15, -16
movl %ecx, %r15d
movq %rdx, %rbx
movq %rsi, %r12
movq %rdi, %r13
leal (,%r15,4), %eax
movslq %eax, %r14
leaq 24(%rsp), %rdi
movq %r14, %rsi
callq hipMalloc
leaq 16(%rsp), %rdi
movq %r14, %rsi
callq hipMalloc
leaq 8(%rsp), %rdi
movq %r14, %rsi
callq hipMalloc
movq 24(%rsp), %rdi
movq %r13, %rsi
movq %r14, %rdx
movl $1, %ecx
callq hipMemcpy
movq 16(%rsp), %rdi
movq %r12, %rsi
movq %r14, %rdx
movl $1, %ecx
callq hipMemcpy
cvtsi2ss %r15d, %xmm0
mulss .LCPI1_0(%rip), %xmm0
callq ceilf@PLT
cvttss2si %xmm0, %rax
movl %eax, %edi
movabsq $4294967296, %rdx # imm = 0x100000000
orq %rdx, %rdi
orq $32, %rdx
movl $1, %esi
movl $1, %ecx
xorl %r8d, %r8d
xorl %r9d, %r9d
callq __hipPushCallConfiguration
testl %eax, %eax
jne .LBB1_2
# %bb.1:
movq 24(%rsp), %rax
movq 16(%rsp), %rcx
movq 8(%rsp), %rdx
movq %rax, 104(%rsp)
movq %rcx, 96(%rsp)
movq %rdx, 88(%rsp)
movl %r15d, 36(%rsp)
leaq 104(%rsp), %rax
movq %rax, 112(%rsp)
leaq 96(%rsp), %rax
movq %rax, 120(%rsp)
leaq 88(%rsp), %rax
movq %rax, 128(%rsp)
leaq 36(%rsp), %rax
movq %rax, 136(%rsp)
leaq 72(%rsp), %rdi
leaq 56(%rsp), %rsi
leaq 48(%rsp), %rdx
leaq 40(%rsp), %rcx
callq __hipPopCallConfiguration
movq 72(%rsp), %rsi
movl 80(%rsp), %edx
movq 56(%rsp), %rcx
movl 64(%rsp), %r8d
leaq 112(%rsp), %r9
movl $_Z13vecConvKernelPfS_S_i, %edi
pushq 40(%rsp)
.cfi_adjust_cfa_offset 8
pushq 56(%rsp)
.cfi_adjust_cfa_offset 8
callq hipLaunchKernel
addq $16, %rsp
.cfi_adjust_cfa_offset -16
.LBB1_2:
movq 8(%rsp), %rsi
movq %rbx, %rdi
movq %r14, %rdx
movl $2, %ecx
callq hipMemcpy
movq 24(%rsp), %rdi
callq hipFree
movq 16(%rsp), %rdi
callq hipFree
movq 8(%rsp), %rdi
callq hipFree
addq $144, %rsp
.cfi_def_cfa_offset 48
popq %rbx
.cfi_def_cfa_offset 40
popq %r12
.cfi_def_cfa_offset 32
popq %r13
.cfi_def_cfa_offset 24
popq %r14
.cfi_def_cfa_offset 16
popq %r15
.cfi_def_cfa_offset 8
retq
.Lfunc_end1:
.size _Z7vecConvPfS_S_i, .Lfunc_end1-_Z7vecConvPfS_S_i
.cfi_endproc
# -- End function
.globl main # -- Begin function main
.p2align 4, 0x90
.type main,@function
main: # @main
.cfi_startproc
# %bb.0:
pushq %r15
.cfi_def_cfa_offset 16
pushq %r14
.cfi_def_cfa_offset 24
pushq %r12
.cfi_def_cfa_offset 32
pushq %rbx
.cfi_def_cfa_offset 40
pushq %rax
.cfi_def_cfa_offset 48
.cfi_offset %rbx, -40
.cfi_offset %r12, -32
.cfi_offset %r14, -24
.cfi_offset %r15, -16
movl $40, %edi
callq malloc
movq %rax, %rbx
movl $40, %edi
callq malloc
movq %rax, %r14
movl $40, %edi
callq malloc
movq %rax, %r15
xorl %eax, %eax
.p2align 4, 0x90
.LBB2_1: # =>This Inner Loop Header: Depth=1
xorps %xmm0, %xmm0
cvtsi2ss %eax, %xmm0
movss %xmm0, (%rbx,%rax,4)
addss %xmm0, %xmm0
movss %xmm0, (%r14,%rax,4)
incq %rax
cmpq $10, %rax
jne .LBB2_1
# %bb.2:
movq %rbx, %rdi
movq %r14, %rsi
movq %r15, %rdx
movl $10, %ecx
callq _Z7vecConvPfS_S_i
xorl %r12d, %r12d
.p2align 4, 0x90
.LBB2_3: # =>This Inner Loop Header: Depth=1
movss (%r15,%r12,4), %xmm0 # xmm0 = mem[0],zero,zero,zero
cvtss2sd %xmm0, %xmm0
movl $.L.str, %edi
movb $1, %al
callq printf
incq %r12
cmpq $10, %r12
jne .LBB2_3
# %bb.4:
movq %rbx, %rdi
callq free
movq %r14, %rdi
callq free
movq %r15, %rdi
callq free
xorl %eax, %eax
addq $8, %rsp
.cfi_def_cfa_offset 40
popq %rbx
.cfi_def_cfa_offset 32
popq %r12
.cfi_def_cfa_offset 24
popq %r14
.cfi_def_cfa_offset 16
popq %r15
.cfi_def_cfa_offset 8
retq
.Lfunc_end2:
.size main, .Lfunc_end2-main
.cfi_endproc
# -- End function
.p2align 4, 0x90 # -- Begin function __hip_module_ctor
.type __hip_module_ctor,@function
__hip_module_ctor: # @__hip_module_ctor
.cfi_startproc
# %bb.0:
subq $40, %rsp
.cfi_def_cfa_offset 48
cmpq $0, __hip_gpubin_handle(%rip)
jne .LBB3_2
# %bb.1:
movl $__hip_fatbin_wrapper, %edi
callq __hipRegisterFatBinary
movq %rax, __hip_gpubin_handle(%rip)
.LBB3_2:
movq __hip_gpubin_handle(%rip), %rdi
xorps %xmm0, %xmm0
movups %xmm0, 16(%rsp)
movups %xmm0, (%rsp)
movl $_Z13vecConvKernelPfS_S_i, %esi
movl $.L__unnamed_1, %edx
movl $.L__unnamed_1, %ecx
movl $-1, %r8d
xorl %r9d, %r9d
callq __hipRegisterFunction
movl $__hip_module_dtor, %edi
addq $40, %rsp
.cfi_def_cfa_offset 8
jmp atexit # TAILCALL
.Lfunc_end3:
.size __hip_module_ctor, .Lfunc_end3-__hip_module_ctor
.cfi_endproc
# -- End function
.p2align 4, 0x90 # -- Begin function __hip_module_dtor
.type __hip_module_dtor,@function
__hip_module_dtor: # @__hip_module_dtor
.cfi_startproc
# %bb.0:
movq __hip_gpubin_handle(%rip), %rdi
testq %rdi, %rdi
je .LBB4_2
# %bb.1:
pushq %rax
.cfi_def_cfa_offset 16
callq __hipUnregisterFatBinary
movq $0, __hip_gpubin_handle(%rip)
addq $8, %rsp
.cfi_def_cfa_offset 8
.LBB4_2:
retq
.Lfunc_end4:
.size __hip_module_dtor, .Lfunc_end4-__hip_module_dtor
.cfi_endproc
# -- End function
.type _Z13vecConvKernelPfS_S_i,@object # @_Z13vecConvKernelPfS_S_i
.section .rodata,"a",@progbits
.globl _Z13vecConvKernelPfS_S_i
.p2align 3, 0x0
_Z13vecConvKernelPfS_S_i:
.quad _Z28__device_stub__vecConvKernelPfS_S_i
.size _Z13vecConvKernelPfS_S_i, 8
.type .L.str,@object # @.str
.section .rodata.str1.1,"aMS",@progbits,1
.L.str:
.asciz "%f "
.size .L.str, 4
.type .L__unnamed_1,@object # @0
.L__unnamed_1:
.asciz "_Z13vecConvKernelPfS_S_i"
.size .L__unnamed_1, 25
.type __hip_fatbin_wrapper,@object # @__hip_fatbin_wrapper
.section .hipFatBinSegment,"a",@progbits
.p2align 3, 0x0
__hip_fatbin_wrapper:
.long 1212764230 # 0x48495046
.long 1 # 0x1
.quad __hip_fatbin
.quad 0
.size __hip_fatbin_wrapper, 24
.type __hip_gpubin_handle,@object # @__hip_gpubin_handle
.local __hip_gpubin_handle
.comm __hip_gpubin_handle,8,8
.section .init_array,"aw",@init_array
.p2align 3, 0x0
.quad __hip_module_ctor
.type __hip_cuid_,@object # @__hip_cuid_
.bss
.globl __hip_cuid_
__hip_cuid_:
.byte 0 # 0x0
.size __hip_cuid_, 1
.section ".linker-options","e",@llvm_linker_options
.ident "AMD clang version 18.0.0git (https://github.com/RadeonOpenCompute/llvm-project roc-6.3.2 25012 e5bf7e55c91490b07c49d8960fa7983d864936c4)"
.section ".note.GNU-stack","",@progbits
.addrsig
.addrsig_sym _Z28__device_stub__vecConvKernelPfS_S_i
.addrsig_sym __hip_module_ctor
.addrsig_sym __hip_module_dtor
.addrsig_sym _Z13vecConvKernelPfS_S_i
.addrsig_sym __hip_fatbin
.addrsig_sym __hip_fatbin_wrapper
.addrsig_sym __hip_cuid_ |
You are a helpful coding assistant specialized in converting CUDA source code to CUDA device assembly. | #ifndef IC_mod
#define IC_mod
#pragma once
// G.K.H. Lee - PA Noti
// translation from from Fortran to C++ by PA Noti - Feb 2021
// last changes in Fortran by GKH-Lee - Oct 2020
#pragma once
#include <cuda_runtime.h>
#include <string>
#include <iostream>
//#include "FMS_RC_para_and_const.h"
//#include "k_Rosseland_mod.h"
//#include <math.h>
// Calculates the IR band Rosseland mean opacity (local T) according to the
// Freedman et al. (2014) fit and coefficents
void k_Ross_Freedman(double Tin, double Pin, double met, double& k_IR) {
// dependcies
//// pow from math
//// log10 from math
//// atan from math
//// onedivpi -> namespace constants::onedivpi
// Input:
// T - Local gas temperature [K]
// P - Local gas pressure [pa]
// met - Local metallicity [M/H] (log10 from solar, solar [M/H] = 0.0)
// Call by reference (Input&Output):
// k_IR - IR band Rosseland mean opacity [m2 kg-1]
// work variables
double k_lowP;
double k_hiP;
double T;
double P;
double Tl10;
double Pl10;
const double pi = atan((double)(1)) * 4;
const double onedivpi = 1.0 / pi;
// Coefficent parameters for Freedman et al. (2014) table fit
double c1 = 10.602;
double c2 = 2.882;
double c3 = 6.09e-15;
double c4 = 2.954;
double c5 = -2.526;
double c6 = 0.843;
double c7 = -5.490;
double c8_l = -14.051, c8_h = 82.241;
double c9_l = 3.055, c9_h = -55.456;
double c10_l = 0.024, c10_h = 8.754;
double c11_l = 1.877, c11_h = 0.7048;
double c12_l = -0.445, c12_h = -0.0414;
double c13_l = 0.8321, c13_h = 0.8321;
// start operations
T = Tin;
P = Pin * ((double)10.0); // Convert to dyne cm-2
Tl10 = log10(T);
Pl10 = log10(P);
// Low pressure expression
k_lowP = c1 * atan(Tl10 - c2) -
(c3 / (Pl10 + c4)) * exp(pow((Tl10 - c5), 2.0)) + c6 * met + c7;
// De log10
k_lowP = pow(((double)10.0), k_lowP);
// Temperature split for coefficents = 800 K
if (T <= 800.0)
{
k_hiP = c8_l + c9_l * Tl10 + c10_l * pow(Tl10, 2.0) +
Pl10 * (c11_l + c12_l * Tl10) +
c13_l * met * (0.5 + onedivpi * atan((Tl10 - ((double)2.5)) / (double)0.2));
}
else
{
k_hiP = c8_h + c9_h * Tl10 +
c10_h * pow(Tl10, 2.0) + Pl10 * (c11_h + c12_h * Tl10) +
c13_h * met * (0.5 + onedivpi * atan((Tl10 - ((double)2.5)) / (double)0.2));
}
// De log10
k_hiP = pow(((double)10.0), k_hiP);
// Total Rosseland mean opacity - converted to m2 kg-1
k_IR = (k_lowP + k_hiP) / ((double)10.0);
// Avoid divergence in fit for large values
if (k_IR > 1.0e10)
{
k_IR = 1.0e10;
}
}
///////////////////////////////////////////////////////////////
//////////////////////////////////////////////////////////////
// Calculates 3 band grey visual gamma values and 2 picket fence IR gamma values
// according to the coefficents and equations in:
// Parmentier & Menou (2014) and Parmentier et al. (2015)
// NOTE: This does not calculate the opacity - call k_Ross_Freedman for that
void gam_Parmentier(double Teff, int table_num, double(&gam_V)[3], double(&Beta_V)[3],
double(&Beta)[2], double& gam_1, double& gam_2, double& gam_P, double& tau_lim) {
// dependcies
//// pow from math
//// log10 from math
// Input:
// Teff - Effective temperature [K] (See Parmentier papers for various ways to calculate this)
// for non-irradiated atmosphere Teff = Tint
// table_num - Table selection from Parmentier et al. (2015): 1 = w. TiO/VO, 2 = w.o. TiO/VO
// Call by reference (Input&Output):
// gam_V(3) - gamma ratio for 3 visual bands (gam_V = kV_Ross/kIR_Ross)
// beta_V(3) - fraction of total incident stellar flux in band (1/3 for Parmentier values)
// Beta - equilvalent bandwidth for picket fence IR model
// gam_1 - gamma ratio for IR band 1 (gam_1 = kIR_1/kIR_Ross)
// gam_2 - gamma ratio for IR band 2 (gam_2 = kIR_2/kIR_Ross)
// gam_P - gamma ratio for Planck mean (gam_P = kIR_Planck/kIR_Ross)
// tau_lim - tau limit variable (usually for IC system)
// work variables
double R = 0;
double aP = 0;
double bP = 0;
double cP = 0;
double aV1 = 0, bV1 = 0, aV2 = 0, bV2 = 0, aV3 = 0, bV3 = 0;
double aB = 0, bB = 0;
double l10T = 0, l10T2 = 0, RT = 0;
int i;
// start operations
// Log 10 T_eff variables
l10T = log10(Teff);
l10T2 = pow(l10T, 2.0);
if (table_num == 1) {
// First table in Parmentier et al. (2015) w. TiO/VO
// Start large if statements with visual band and Beta coefficents
if (Teff <= 200.0)
{
aV1 = -5.51; bV1 = 2.48;
aV2 = -7.37; bV2 = 2.53;
aV3 = -3.03; bV3 = -0.20;
aB = 0.84; bB = 0.0;
}
else if (Teff > 200.0 && Teff <= 300.0)
{
aV1 = 1.23; bV1 = -0.45;
aV2 = 13.99; bV2 = -6.75;
aV3 = -13.87; bV3 = 4.51;
aB = 0.84; bB = 0.0;
}
else if (Teff > 300.0 && Teff <= 600.0)
{
aV1 = 8.65; bV1 = -3.45;
aV2 = -15.18; bV2 = 5.02;
aV3 = -11.95; bV3 = 3.74;
aB = 0.84; bB = 0.0;
}
else if (Teff > 600.0 && Teff <= 1400.0)
{
aV1 = -12.96; bV1 = 4.33;
aV2 = -10.41; bV2 = 3.31;
aV3 = -6.97; bV3 = 1.94;
aB = 0.84; bB = 0.0;
}
else if (Teff > 1400.0 && Teff < 2000.0)
{
aV1 = -23.75; bV1 = 7.76;
aV2 = -19.95; bV2 = 6.34;
aV3 = -3.65; bV3 = 0.89;
aB = 0.84; bB = 0.0;
}
else if (Teff >= 2000.0)
{
aV1 = 12.65; bV1 = -3.27;
aV2 = 13.56; bV2 = -3.81;
aV3 = -6.02; bV3 = 1.61;
aB = 6.21; bB = -1.63;
}
// gam_P coefficents
aP = -2.36;
bP = 13.92;
cP = -19.38;
}
else if (table_num == 2)
{
// ! Appendix table from Parmentier et al. (2015) - without TiO and VO
if (Teff <= 200.0)
{
aV1 = -5.51; bV1 = 2.48;
aV2 = -7.37; bV2 = 2.53;
aV3 = -3.03; bV3 = -0.20;
aB = 0.84; bB = 0.0;
}
else if (Teff > 200.0 && Teff <= 300.0)
{
aV1 = 1.23; bV1 = -0.45;
aV2 = 13.99; bV2 = -6.75;
aV3 = -13.87; bV3 = 4.51;
aB = 0.84; bB = 0.0;
}
else if (Teff > 300.0 && Teff <= 600.0)
{
aV1 = 8.65; bV1 = -3.45;
aV2 = -15.18; bV2 = 5.02;
aV3 = -11.95; bV3 = 3.74;
aB = 0.84; bB = 0.0;
}
else if (Teff > 600.0 && Teff <= 1400.0)
{
aV1 = -12.96; bV1 = 4.33;
aV2 = -10.41; bV2 = 3.31;
aV3 = -6.97; bV3 = 1.94;
aB = 0.84; bB = 0.0;
}
else if (Teff > 1400.0 && Teff < 2000.0)
{
aV1 = -1.68; bV1 = 0.75;
aV2 = 6.96; bV2 = -2.21;
aV3 = 0.02; bV3 = -0.28;
aB = 3.0; bB = -0.69;
}
else if (Teff >= 2000.0)
{
aV1 = 10.37; bV1 = -2.91;
aV2 = -2.4; bV2 = 0.62;
aV3 = -16.54; bV3 = 4.74;
aB = 3.0; bB = -0.69;
}
// gam_P coefficents
if (Teff <= 1400.0)
{
aP = -2.36;
bP = 13.92;
cP = -19.38;
}
else
{
aP = -12.45;
bP = 82.25;
cP = -134.42;
}
}
// Calculation of all values
// Visual band gamma
gam_V[0] = pow(((double)10.0), (aV1 + bV1 * l10T));
gam_V[1] = pow(((double)10.0), (aV2 + bV2 * l10T));
gam_V[2] = pow(((double)10.0), (aV3 + bV3 * l10T));
// Visual band fractions
for (i = 0; i < 3; i++)
{
Beta_V[i] = ((double)1.0) / ((double)3.0);
}
// gamma_Planck - if < 1 then make it grey approximation (k_Planck = k_Ross, gam_P = 1)
gam_P = pow(((double)10.0), (aP * l10T2 + bP * l10T + cP));
if (gam_P < 1.0000001)
{
gam_P = 1.0000001;
}
// equivalent bandwidth value
Beta[0] = aB + bB * l10T;
Beta[1] = (1.0) - Beta[0];
// IR band kappa1/kappa2 ratio - Eq. 96 from Parmentier & Menou (2014)
RT = (gam_P - 1.0) / (2.0 * Beta[0] * Beta[1]);
R = 1.0 + RT + sqrt(pow(RT, 2.0) + RT);
// gam_1 and gam_2 values - Eq. 92, 93 from Parmentier & Menou (2014)
gam_1 = Beta[0] + R - Beta[0] * R;
gam_2 = gam_1 / R;
// Calculate tau_lim parameter
tau_lim = ((double)1.0) / (gam_1 * gam_2) * sqrt(gam_P / ((double)3.0));
}
///////////////////////////////////////////////////////////////
//////////////////////////////////////////////////////////////
// Calculates the Bond Albedo according to Parmentier et al. (2015) expression
void Bond_Parmentier(double Teff0, double grav, double& AB) {
// dependcies
//// pow from math
//// log10 from math
// Input:
// Teff0 - Atmospheric profile effective temperature [K] with zero albedo
// grav - Surface gravity of planet [m s-2]
// Call by reference (Input&Output):
// AB - Bond albedo
// work variables
double a, b;
// start operations
if (Teff0 <= 250.0)
{
a = ((double)-0.335) * pow(grav, ((double)0.070));
b = 0.0;
}
else if (Teff0 > 250.0 && Teff0 <= 750.0)
{
a = -0.335 * pow(grav, ((double)0.070)) + 2.149 * pow(grav, ((double)0.135));
b = -0.896 * pow(grav, ((double)0.135));
}
else if (Teff0 > 750.0 && Teff0 < 1250.0)
{
a = -0.335 * pow(grav, ((double)0.070)) - 0.428 * pow(grav, ((double)0.135));
b = 0.0;
}
else if (Teff0 >= 1250.0)
{
a = 16.947 - ((double)3.174) * pow(grav, ((double)0.070)) - 4.051 *
pow(grav, ((double)0.135));
b = -5.472 + ((double)0.917) * pow(grav, ((double)0.070)) + 1.170 *
pow(grav, ((double)0.135));
}
// Final Bond Albedo expression
AB = pow(((double)10.0), (a + b * log10(Teff0)));
}
///////////////////////////////////////////////////////////////
//////////////////////////////////////////////////////////////
// This subroutine follows Parmentier & Guillot (2014, 2015) non-grey picket fence scheme
void Parmentier_IC(const int nlay, double* pl,
double* pe, double Tint, double mu, double Tirr,
double grav, double* (&Tl), int table_num, double met,
double* tau, double* kRoss) {
// dependcies
//// main_parameters::nlay -> "FMS_RC_para_&_const.cpp"
//// main_parameters::nlay1 -> "FMS_RC_para_&_const.cpp"
//// k_Rosseland_mod::Bond_Parmentier -> "k_Rosseland_modcpp"
//// k_Rosseland_mod::k_Ross_Freedman -> "k_Rosseland_modcpp"
//// k_Rosseland_mod::k_Ross_Valencia -> "k_Rosseland_modcpp"
//// pow -> math
//// sqrt -> math
//// exp -> math
// Input:
//
// Call by reference (Input & Output):
//
// work variables
int i, j, k;
double Teff0, Teff, Tmu, Bond, Tskin;
double gam_V[3] = { 0 }, Beta_V[3] = { 0 };
double Beta[2];
double gam_1, gam_2, gam_P, tau_lim;
double a0, a1, b0, A, B, At1, At2;
double a2[3], a3[3], b1[3], b2[3], b3[3], Av1[3], Av2[3];
double C[3], D[3], E[3];
double summy;
// start operations
// Effective temperature parameter
Tmu = pow((mu * pow(Tirr, 4.0)), (1.0 / 4.0));
// Find Bond albedo of planet - Bond albedo is given by mu = 1/sqrt(3)
Teff0 = pow(((pow(Tint, 4.0) + (1.0 / sqrt(((double)3.0))) * pow(Tirr, 4.0))), (1.0 / 4.0));
Bond_Parmentier(Teff0, grav, Bond);
Teff = pow((pow(Tint, 4.0) + (((double)1.0) - Bond) * mu * pow(Tirr, 4.0)), (1.0 / 4.0));
// Find the V band gamma, beta and IR gamma and beta ratios for this profile
// Passed mu, so make lat = acos(mu) and lon = 0
gam_Parmentier(Teff, table_num, gam_V, Beta_V, Beta, gam_1, gam_2,
gam_P, tau_lim);
for (i = 0; i < 3; i++)
{
gam_V[i] = gam_V[i] / mu;
}
// Hard work starts here - first calculate all the required coefficents
At1 = pow(gam_1, 2.0) * log(1.0 + 1.0 / (tau_lim * gam_1));
At2 = pow(gam_2, 2.0) * log(1.0 + 1.0 / (tau_lim * gam_2));
for (i = 0; i < 3; i++)
{
Av1[i] = pow(gam_1, 2.0) * log(1.0 + gam_V[i] / gam_1);
Av2[i] = pow(gam_2, 2.0) * log(1.0 + gam_V[i] / gam_2);
}
a0 = 1.0 / gam_1 + 1.0 / gam_2;
a1 = -1.0 / (((double)3.0) * pow(tau_lim, 2.0)) * (gam_P / (1.0 - gam_P) *
(gam_1 + gam_2 - 2.0) / (gam_1 + gam_2) +
(gam_1 + gam_2) * tau_lim - (At1 + At2) * pow(tau_lim, 2.0));
for (i = 0; i < 3; i++)
{
a2[i] = pow(tau_lim, 2.0) / (gam_P * pow(gam_V[i], 2.0)) *
((3.0 * pow(gam_1, 2.0) - pow(gam_V[i], 2.0)) * (3.0 * pow(gam_2, 2.0) - pow(gam_V[i], 2.0)) *
(gam_1 + gam_2) - 3.0 * gam_V[i] * (6.0 * pow(gam_1, 2.0) * pow(gam_2, 2.0) - pow(gam_V[i], 2.0) *
(pow(gam_1, 2.0) + pow(gam_2, 2.0)))) / (1.0 - pow(gam_V[i], 2.0) * pow(tau_lim, 2.0));
a3[i] = -pow(tau_lim, 2.0) * (3.0 * pow(gam_1, 2.0) - pow(gam_V[i], 2.0)) *
(3.0 * pow(gam_2, 2.0) - pow(gam_V[i], 2.0)) * (Av2[i] + Av1[i]) /
(gam_P * pow(gam_V[i], 3.0) * (1.0 - pow(gam_V[i], 2.0) * pow(tau_lim, 2.0)));
b1[i] = gam_1 * gam_2 * (3.0 * pow(gam_1, 2.0) - pow(gam_V[i], 2.0)) * (3.0 * pow(gam_2, 2.0) -
pow(gam_V[i], 2.0)) * pow(tau_lim, 2) / (gam_P * pow(gam_V[i], 2.0) *
(pow(gam_V[i], 2.0) * pow(tau_lim, 2.0) - 1.0));
b2[i] = 3.0 * (gam_1 + gam_2) * pow(gam_V[i], 3.0) / ((3.0 * pow(gam_1, 2.0) - pow(gam_V[i], 2.0)) *
(3.0 * pow(gam_2, 2.0) - pow(gam_V[i], 2.0)));
b3[i] = (Av2[i] - Av1[i]) / (gam_V[i] * (gam_1 - gam_2));
}
b0 = 1.0 / (gam_1 * gam_2 / (gam_1 - gam_2) * (At1 - At2) / 3.0 - pow((gam_1 * gam_2), 2.0) /
sqrt(3.0 * gam_P) - pow((gam_1 * gam_2), 3.0) /
((1.0 - gam_1) * (1.0 - gam_2) * (gam_1 + gam_2)));
A = 1.0 / ((double)3.0) * (a0 + a1 * b0);
B = -1.0 / ((double)3.0) * pow((gam_1 * gam_2), 2.0) / gam_P * b0;
for (i = 0; i < 3; i++)
{
C[i] = -1.0 / ((double)3.0) * (b0 * b1[i] * (1.0 + b2[i] + b3[i]) * a1 + a2[i] + a3[i]);
D[i] = 1.0 / ((double)3.0) * pow((gam_1 * gam_2), 2.0) / gam_P * b0 * b1[i] * (1.0 + b2[i] + b3[i]);
E[i] = (3.0 - pow((gam_V[i] / gam_1), 2.0)) * (3.0 - pow((gam_V[i] / gam_2), 2.0)) /
(9.0 * gam_V[i] * (pow((gam_V[i] * tau_lim), 2.0) - 1.0));
}
// T-p structure calculation - we follow exactly V. Parmentier's method
// Estimate the skin temperature by setting tau = 0
tau[0] = 0.0;
summy = 0.0;
for (i = 0; i < 3; i++)
{
summy += 3.0 * Beta_V[i] * pow(Tmu, 4.0) / 4.0 * (C[i] + D[i] * exp(-tau[0] / tau_lim) +
E[i] * exp(-gam_V[i] * tau[0]));
}
Tskin = 3.0 * pow(Tint, 4) / 4.0 * (tau[0] + A + B * exp(-tau[0] / tau_lim)) + summy;
Tskin = pow(Tskin, (1.0 / 4.0));
// Estimate the opacity TOA at the skin temperature - assume this is = first layer optacity
k_Ross_Freedman(Tskin, pl[0], met, kRoss[0]);
// k_Rosseland_mod::k_Ross_Valencia(Tskin, pe[0], met, kRoss[0]);
// Recalculate the upmost tau with new kappa
tau[0] = kRoss[0] / grav * pl[0];
// More accurate layer T at uppermost layer
summy = 0.0;
for (i = 0; i < 3; i++)
{
summy += 3.0 * Beta_V[i] * pow(Tmu, 4.0) / 4.0 * (C[i] + D[i] * exp(-tau[0] / tau_lim) +
E[i] * exp(-gam_V[i] * tau[0]));
}
Tl[0] = 3.0 * pow(Tint, 4) / 4.0 * (tau[0] + A + B * exp(-tau[0] / tau_lim)) + summy;
Tl[0] = pow(Tl[0], (1.0 / 4.0));
// Now we can loop in optical depth space to find the T-p profile
for (i = 1; i < nlay; i++)
{
// Initial guess for layer
k_Ross_Freedman(Tl[i - 1], sqrt(pl[i - 1] * pl[i]), met, kRoss[i]);
// call k_Rosseland_mod::k_Ross_Valencia(Tl[i-1], sqrt(pl[i-1]*pl[i], met, kRoss[i])
tau[i] = tau[i - 1] + kRoss[i] / grav * (pl[i] - pl[i - 1]);
summy = 0.0;
for (j = 0; j < 3; j++)
{
summy = +3.0 * Beta_V[j] * pow(Tmu, 4.0) / 4.0 * (C[j] + D[j] * exp(-tau[i] / tau_lim) +
E[j] * exp(-gam_V[j] * tau[i]));
}
Tl[i] = 3.0 * pow(Tint, 4.0) / 4.0 * (tau[i] + A + B * exp(-tau[i] / tau_lim)) + summy;
Tl[i] = pow(Tl[i], (1.0 / 4.0));
// Convergence loop
for (j = 0; j < 5; j++)
{
k_Ross_Freedman(sqrt(Tl[i - 1] * Tl[i]), sqrt(pl[i - 1] * pl[i]), met, kRoss[i]);
//call k_Rosseland_mod::k_Ross_Valencia(sqrt(Tl[i-1]*T[i]), sqrt(pl[i-1]*pl[i]), met, kRoss[i])
tau[i] = tau[i - 1] + kRoss[i] / grav * (pl[i] - pl[i - 1]);
summy = 0.0;
for (k = 0; k < 3; k++)
{
summy += 3.0 * Beta_V[k] * pow(Tmu, 4.0) / 4.0 * (C[k] + D[k] * exp(-tau[i] / tau_lim) +
E[k] * exp(-gam_V[k] * tau[i]));
}
Tl[i] = 3.0 * pow(Tint, 4.0) / 4.0 * (tau[i] + A + B * exp(-tau[i] / tau_lim)) + summy;
Tl[i] = pow(Tl[i], (1.0 / 4.0));
}
}
}
///////////////////////////////////////////////////////////////
//////////////////////////////////////////////////////////////
// Subroutine that corrects for adiabatic region following Parmentier & Guillot (2015)
void adiabat_correction(int nlay, double* (&Tl),
double* pl, double& prc, double* gradrad, double* gradad) {
// dependcies
//// main_parameters::nlay -> "FMS_RC_para_&_const.cpp"
//// pow -> math
/// log10 -> math
// Input:
//
// Call by reference (Input & Output):
//
// work variables
int i, iRC, iRC1;
// start operations
for (i = 0; i < (nlay - 1); i++)
{
gradrad[i] = (log10(Tl[i]) - log10(Tl[i + 1])) / (log10(pl[i]) - log10(pl[i + 1]));
gradad[i] = ((double)0.32) - ((double)0.10) * Tl[i] / ((double)3000.0);
}
gradrad[nlay - 1] = 0.0;
gradad[nlay - 1] = 0.0;
iRC = nlay - 2;
iRC1 = nlay - 2;
for (i = (nlay - 2); i >= 0; i--)
{
if (iRC1 <= i + 1)
{
if (gradrad[i] > ((double)0.7) * gradad[i])
{
iRC1 = i;
}
if (gradrad[i] > ((double)0.98) * gradad[i])
{
iRC = i;
prc = pl[iRC];
}
}
}
if (iRC < nlay)
{
for (i = iRC; i < nlay - 1; i++)
{
gradad[i] = (double)0.32 - ((double)0.10) * Tl[i] / ((double)3000.0);
if (gradad[i] < 0.0)
{
gradad[i] = 0.0;
}
Tl[i + 1] = Tl[i] * pow((pl[i + 1] / pl[i]), gradad[i]);
}
}
}
///////////////////////////////////////////////////////////////
//////////////////////////////////////////////////////////////
void IC_profile(int iIC, bool corr, int nlay, double p0,
double* pl, double* pe,
double* k_V, double* k_IR,
double Tint, double mu, double Tirr, double grav, double fl,
double* Tl, double& prc, int table_num, double met,
double* tau_hf_e, double* kRoss_hf_e, double* tau_IRl_hf_l,
double* gradrad_hf_l, double* gradad_hf_l) {
// dependcies
//// pow() from math
//// log10() from math
//// atan() from math
//// namespace constants::onedivpi -> "FMS_RC_para_&_const.cpp"
//// main_parameters::nlay -> "FMS_RC_para_&_const.cpp"
//// main_parameters::nlay1 -> "FMS_RC_para_&_const.cpp"
//// k_Rosseland_mod::Bond_Parmentier() -> "k_Rosseland_modcpp"
//// k_Rosseland_mod::k_Ross_Freedman() -> "k_Rosseland_modcpp"
//// k_Rosseland_mod::k_Ross_Valencia() -> "k_Rosseland_modcpp"
//// sqrt() -> math
//// exp() -> math
// Input:
//
// Call by reference (Input & Output):
//
// start operations
switch (iIC)
{
case 4:
Parmentier_IC(nlay, pl, pe, Tint, mu, Tirr, grav, Tl, table_num, met,
tau_hf_e, kRoss_hf_e);
break;
default:
//std::cout << "Invalid IC integer in IC_mod, stopping" << std::endl;
break;
}
if (corr == true)
{
adiabat_correction(nlay, Tl, pl, prc, gradrad_hf_l, gradad_hf_l);
}
else
{
prc = p0;
}
}
#endif // IC_mod | code for sm_80 |
You are a helpful coding assistant specialized in converting CUDA source code to HIP/AMD source code. | #ifndef IC_mod
#define IC_mod
#pragma once
// G.K.H. Lee - PA Noti
// translation from from Fortran to C++ by PA Noti - Feb 2021
// last changes in Fortran by GKH-Lee - Oct 2020
#pragma once
#include <cuda_runtime.h>
#include <string>
#include <iostream>
//#include "FMS_RC_para_and_const.h"
//#include "k_Rosseland_mod.h"
//#include <math.h>
// Calculates the IR band Rosseland mean opacity (local T) according to the
// Freedman et al. (2014) fit and coefficents
void k_Ross_Freedman(double Tin, double Pin, double met, double& k_IR) {
// dependcies
//// pow from math
//// log10 from math
//// atan from math
//// onedivpi -> namespace constants::onedivpi
// Input:
// T - Local gas temperature [K]
// P - Local gas pressure [pa]
// met - Local metallicity [M/H] (log10 from solar, solar [M/H] = 0.0)
// Call by reference (Input&Output):
// k_IR - IR band Rosseland mean opacity [m2 kg-1]
// work variables
double k_lowP;
double k_hiP;
double T;
double P;
double Tl10;
double Pl10;
const double pi = atan((double)(1)) * 4;
const double onedivpi = 1.0 / pi;
// Coefficent parameters for Freedman et al. (2014) table fit
double c1 = 10.602;
double c2 = 2.882;
double c3 = 6.09e-15;
double c4 = 2.954;
double c5 = -2.526;
double c6 = 0.843;
double c7 = -5.490;
double c8_l = -14.051, c8_h = 82.241;
double c9_l = 3.055, c9_h = -55.456;
double c10_l = 0.024, c10_h = 8.754;
double c11_l = 1.877, c11_h = 0.7048;
double c12_l = -0.445, c12_h = -0.0414;
double c13_l = 0.8321, c13_h = 0.8321;
// start operations
T = Tin;
P = Pin * ((double)10.0); // Convert to dyne cm-2
Tl10 = log10(T);
Pl10 = log10(P);
// Low pressure expression
k_lowP = c1 * atan(Tl10 - c2) -
(c3 / (Pl10 + c4)) * exp(pow((Tl10 - c5), 2.0)) + c6 * met + c7;
// De log10
k_lowP = pow(((double)10.0), k_lowP);
// Temperature split for coefficents = 800 K
if (T <= 800.0)
{
k_hiP = c8_l + c9_l * Tl10 + c10_l * pow(Tl10, 2.0) +
Pl10 * (c11_l + c12_l * Tl10) +
c13_l * met * (0.5 + onedivpi * atan((Tl10 - ((double)2.5)) / (double)0.2));
}
else
{
k_hiP = c8_h + c9_h * Tl10 +
c10_h * pow(Tl10, 2.0) + Pl10 * (c11_h + c12_h * Tl10) +
c13_h * met * (0.5 + onedivpi * atan((Tl10 - ((double)2.5)) / (double)0.2));
}
// De log10
k_hiP = pow(((double)10.0), k_hiP);
// Total Rosseland mean opacity - converted to m2 kg-1
k_IR = (k_lowP + k_hiP) / ((double)10.0);
// Avoid divergence in fit for large values
if (k_IR > 1.0e10)
{
k_IR = 1.0e10;
}
}
///////////////////////////////////////////////////////////////
//////////////////////////////////////////////////////////////
// Calculates 3 band grey visual gamma values and 2 picket fence IR gamma values
// according to the coefficents and equations in:
// Parmentier & Menou (2014) and Parmentier et al. (2015)
// NOTE: This does not calculate the opacity - call k_Ross_Freedman for that
void gam_Parmentier(double Teff, int table_num, double(&gam_V)[3], double(&Beta_V)[3],
double(&Beta)[2], double& gam_1, double& gam_2, double& gam_P, double& tau_lim) {
// dependcies
//// pow from math
//// log10 from math
// Input:
// Teff - Effective temperature [K] (See Parmentier papers for various ways to calculate this)
// for non-irradiated atmosphere Teff = Tint
// table_num - Table selection from Parmentier et al. (2015): 1 = w. TiO/VO, 2 = w.o. TiO/VO
// Call by reference (Input&Output):
// gam_V(3) - gamma ratio for 3 visual bands (gam_V = kV_Ross/kIR_Ross)
// beta_V(3) - fraction of total incident stellar flux in band (1/3 for Parmentier values)
// Beta - equilvalent bandwidth for picket fence IR model
// gam_1 - gamma ratio for IR band 1 (gam_1 = kIR_1/kIR_Ross)
// gam_2 - gamma ratio for IR band 2 (gam_2 = kIR_2/kIR_Ross)
// gam_P - gamma ratio for Planck mean (gam_P = kIR_Planck/kIR_Ross)
// tau_lim - tau limit variable (usually for IC system)
// work variables
double R = 0;
double aP = 0;
double bP = 0;
double cP = 0;
double aV1 = 0, bV1 = 0, aV2 = 0, bV2 = 0, aV3 = 0, bV3 = 0;
double aB = 0, bB = 0;
double l10T = 0, l10T2 = 0, RT = 0;
int i;
// start operations
// Log 10 T_eff variables
l10T = log10(Teff);
l10T2 = pow(l10T, 2.0);
if (table_num == 1) {
// First table in Parmentier et al. (2015) w. TiO/VO
// Start large if statements with visual band and Beta coefficents
if (Teff <= 200.0)
{
aV1 = -5.51; bV1 = 2.48;
aV2 = -7.37; bV2 = 2.53;
aV3 = -3.03; bV3 = -0.20;
aB = 0.84; bB = 0.0;
}
else if (Teff > 200.0 && Teff <= 300.0)
{
aV1 = 1.23; bV1 = -0.45;
aV2 = 13.99; bV2 = -6.75;
aV3 = -13.87; bV3 = 4.51;
aB = 0.84; bB = 0.0;
}
else if (Teff > 300.0 && Teff <= 600.0)
{
aV1 = 8.65; bV1 = -3.45;
aV2 = -15.18; bV2 = 5.02;
aV3 = -11.95; bV3 = 3.74;
aB = 0.84; bB = 0.0;
}
else if (Teff > 600.0 && Teff <= 1400.0)
{
aV1 = -12.96; bV1 = 4.33;
aV2 = -10.41; bV2 = 3.31;
aV3 = -6.97; bV3 = 1.94;
aB = 0.84; bB = 0.0;
}
else if (Teff > 1400.0 && Teff < 2000.0)
{
aV1 = -23.75; bV1 = 7.76;
aV2 = -19.95; bV2 = 6.34;
aV3 = -3.65; bV3 = 0.89;
aB = 0.84; bB = 0.0;
}
else if (Teff >= 2000.0)
{
aV1 = 12.65; bV1 = -3.27;
aV2 = 13.56; bV2 = -3.81;
aV3 = -6.02; bV3 = 1.61;
aB = 6.21; bB = -1.63;
}
// gam_P coefficents
aP = -2.36;
bP = 13.92;
cP = -19.38;
}
else if (table_num == 2)
{
// ! Appendix table from Parmentier et al. (2015) - without TiO and VO
if (Teff <= 200.0)
{
aV1 = -5.51; bV1 = 2.48;
aV2 = -7.37; bV2 = 2.53;
aV3 = -3.03; bV3 = -0.20;
aB = 0.84; bB = 0.0;
}
else if (Teff > 200.0 && Teff <= 300.0)
{
aV1 = 1.23; bV1 = -0.45;
aV2 = 13.99; bV2 = -6.75;
aV3 = -13.87; bV3 = 4.51;
aB = 0.84; bB = 0.0;
}
else if (Teff > 300.0 && Teff <= 600.0)
{
aV1 = 8.65; bV1 = -3.45;
aV2 = -15.18; bV2 = 5.02;
aV3 = -11.95; bV3 = 3.74;
aB = 0.84; bB = 0.0;
}
else if (Teff > 600.0 && Teff <= 1400.0)
{
aV1 = -12.96; bV1 = 4.33;
aV2 = -10.41; bV2 = 3.31;
aV3 = -6.97; bV3 = 1.94;
aB = 0.84; bB = 0.0;
}
else if (Teff > 1400.0 && Teff < 2000.0)
{
aV1 = -1.68; bV1 = 0.75;
aV2 = 6.96; bV2 = -2.21;
aV3 = 0.02; bV3 = -0.28;
aB = 3.0; bB = -0.69;
}
else if (Teff >= 2000.0)
{
aV1 = 10.37; bV1 = -2.91;
aV2 = -2.4; bV2 = 0.62;
aV3 = -16.54; bV3 = 4.74;
aB = 3.0; bB = -0.69;
}
// gam_P coefficents
if (Teff <= 1400.0)
{
aP = -2.36;
bP = 13.92;
cP = -19.38;
}
else
{
aP = -12.45;
bP = 82.25;
cP = -134.42;
}
}
// Calculation of all values
// Visual band gamma
gam_V[0] = pow(((double)10.0), (aV1 + bV1 * l10T));
gam_V[1] = pow(((double)10.0), (aV2 + bV2 * l10T));
gam_V[2] = pow(((double)10.0), (aV3 + bV3 * l10T));
// Visual band fractions
for (i = 0; i < 3; i++)
{
Beta_V[i] = ((double)1.0) / ((double)3.0);
}
// gamma_Planck - if < 1 then make it grey approximation (k_Planck = k_Ross, gam_P = 1)
gam_P = pow(((double)10.0), (aP * l10T2 + bP * l10T + cP));
if (gam_P < 1.0000001)
{
gam_P = 1.0000001;
}
// equivalent bandwidth value
Beta[0] = aB + bB * l10T;
Beta[1] = (1.0) - Beta[0];
// IR band kappa1/kappa2 ratio - Eq. 96 from Parmentier & Menou (2014)
RT = (gam_P - 1.0) / (2.0 * Beta[0] * Beta[1]);
R = 1.0 + RT + sqrt(pow(RT, 2.0) + RT);
// gam_1 and gam_2 values - Eq. 92, 93 from Parmentier & Menou (2014)
gam_1 = Beta[0] + R - Beta[0] * R;
gam_2 = gam_1 / R;
// Calculate tau_lim parameter
tau_lim = ((double)1.0) / (gam_1 * gam_2) * sqrt(gam_P / ((double)3.0));
}
///////////////////////////////////////////////////////////////
//////////////////////////////////////////////////////////////
// Calculates the Bond Albedo according to Parmentier et al. (2015) expression
void Bond_Parmentier(double Teff0, double grav, double& AB) {
// dependcies
//// pow from math
//// log10 from math
// Input:
// Teff0 - Atmospheric profile effective temperature [K] with zero albedo
// grav - Surface gravity of planet [m s-2]
// Call by reference (Input&Output):
// AB - Bond albedo
// work variables
double a, b;
// start operations
if (Teff0 <= 250.0)
{
a = ((double)-0.335) * pow(grav, ((double)0.070));
b = 0.0;
}
else if (Teff0 > 250.0 && Teff0 <= 750.0)
{
a = -0.335 * pow(grav, ((double)0.070)) + 2.149 * pow(grav, ((double)0.135));
b = -0.896 * pow(grav, ((double)0.135));
}
else if (Teff0 > 750.0 && Teff0 < 1250.0)
{
a = -0.335 * pow(grav, ((double)0.070)) - 0.428 * pow(grav, ((double)0.135));
b = 0.0;
}
else if (Teff0 >= 1250.0)
{
a = 16.947 - ((double)3.174) * pow(grav, ((double)0.070)) - 4.051 *
pow(grav, ((double)0.135));
b = -5.472 + ((double)0.917) * pow(grav, ((double)0.070)) + 1.170 *
pow(grav, ((double)0.135));
}
// Final Bond Albedo expression
AB = pow(((double)10.0), (a + b * log10(Teff0)));
}
///////////////////////////////////////////////////////////////
//////////////////////////////////////////////////////////////
// This subroutine follows Parmentier & Guillot (2014, 2015) non-grey picket fence scheme
void Parmentier_IC(const int nlay, double* pl,
double* pe, double Tint, double mu, double Tirr,
double grav, double* (&Tl), int table_num, double met,
double* tau, double* kRoss) {
// dependcies
//// main_parameters::nlay -> "FMS_RC_para_&_const.cpp"
//// main_parameters::nlay1 -> "FMS_RC_para_&_const.cpp"
//// k_Rosseland_mod::Bond_Parmentier -> "k_Rosseland_modcpp"
//// k_Rosseland_mod::k_Ross_Freedman -> "k_Rosseland_modcpp"
//// k_Rosseland_mod::k_Ross_Valencia -> "k_Rosseland_modcpp"
//// pow -> math
//// sqrt -> math
//// exp -> math
// Input:
//
// Call by reference (Input & Output):
//
// work variables
int i, j, k;
double Teff0, Teff, Tmu, Bond, Tskin;
double gam_V[3] = { 0 }, Beta_V[3] = { 0 };
double Beta[2];
double gam_1, gam_2, gam_P, tau_lim;
double a0, a1, b0, A, B, At1, At2;
double a2[3], a3[3], b1[3], b2[3], b3[3], Av1[3], Av2[3];
double C[3], D[3], E[3];
double summy;
// start operations
// Effective temperature parameter
Tmu = pow((mu * pow(Tirr, 4.0)), (1.0 / 4.0));
// Find Bond albedo of planet - Bond albedo is given by mu = 1/sqrt(3)
Teff0 = pow(((pow(Tint, 4.0) + (1.0 / sqrt(((double)3.0))) * pow(Tirr, 4.0))), (1.0 / 4.0));
Bond_Parmentier(Teff0, grav, Bond);
Teff = pow((pow(Tint, 4.0) + (((double)1.0) - Bond) * mu * pow(Tirr, 4.0)), (1.0 / 4.0));
// Find the V band gamma, beta and IR gamma and beta ratios for this profile
// Passed mu, so make lat = acos(mu) and lon = 0
gam_Parmentier(Teff, table_num, gam_V, Beta_V, Beta, gam_1, gam_2,
gam_P, tau_lim);
for (i = 0; i < 3; i++)
{
gam_V[i] = gam_V[i] / mu;
}
// Hard work starts here - first calculate all the required coefficents
At1 = pow(gam_1, 2.0) * log(1.0 + 1.0 / (tau_lim * gam_1));
At2 = pow(gam_2, 2.0) * log(1.0 + 1.0 / (tau_lim * gam_2));
for (i = 0; i < 3; i++)
{
Av1[i] = pow(gam_1, 2.0) * log(1.0 + gam_V[i] / gam_1);
Av2[i] = pow(gam_2, 2.0) * log(1.0 + gam_V[i] / gam_2);
}
a0 = 1.0 / gam_1 + 1.0 / gam_2;
a1 = -1.0 / (((double)3.0) * pow(tau_lim, 2.0)) * (gam_P / (1.0 - gam_P) *
(gam_1 + gam_2 - 2.0) / (gam_1 + gam_2) +
(gam_1 + gam_2) * tau_lim - (At1 + At2) * pow(tau_lim, 2.0));
for (i = 0; i < 3; i++)
{
a2[i] = pow(tau_lim, 2.0) / (gam_P * pow(gam_V[i], 2.0)) *
((3.0 * pow(gam_1, 2.0) - pow(gam_V[i], 2.0)) * (3.0 * pow(gam_2, 2.0) - pow(gam_V[i], 2.0)) *
(gam_1 + gam_2) - 3.0 * gam_V[i] * (6.0 * pow(gam_1, 2.0) * pow(gam_2, 2.0) - pow(gam_V[i], 2.0) *
(pow(gam_1, 2.0) + pow(gam_2, 2.0)))) / (1.0 - pow(gam_V[i], 2.0) * pow(tau_lim, 2.0));
a3[i] = -pow(tau_lim, 2.0) * (3.0 * pow(gam_1, 2.0) - pow(gam_V[i], 2.0)) *
(3.0 * pow(gam_2, 2.0) - pow(gam_V[i], 2.0)) * (Av2[i] + Av1[i]) /
(gam_P * pow(gam_V[i], 3.0) * (1.0 - pow(gam_V[i], 2.0) * pow(tau_lim, 2.0)));
b1[i] = gam_1 * gam_2 * (3.0 * pow(gam_1, 2.0) - pow(gam_V[i], 2.0)) * (3.0 * pow(gam_2, 2.0) -
pow(gam_V[i], 2.0)) * pow(tau_lim, 2) / (gam_P * pow(gam_V[i], 2.0) *
(pow(gam_V[i], 2.0) * pow(tau_lim, 2.0) - 1.0));
b2[i] = 3.0 * (gam_1 + gam_2) * pow(gam_V[i], 3.0) / ((3.0 * pow(gam_1, 2.0) - pow(gam_V[i], 2.0)) *
(3.0 * pow(gam_2, 2.0) - pow(gam_V[i], 2.0)));
b3[i] = (Av2[i] - Av1[i]) / (gam_V[i] * (gam_1 - gam_2));
}
b0 = 1.0 / (gam_1 * gam_2 / (gam_1 - gam_2) * (At1 - At2) / 3.0 - pow((gam_1 * gam_2), 2.0) /
sqrt(3.0 * gam_P) - pow((gam_1 * gam_2), 3.0) /
((1.0 - gam_1) * (1.0 - gam_2) * (gam_1 + gam_2)));
A = 1.0 / ((double)3.0) * (a0 + a1 * b0);
B = -1.0 / ((double)3.0) * pow((gam_1 * gam_2), 2.0) / gam_P * b0;
for (i = 0; i < 3; i++)
{
C[i] = -1.0 / ((double)3.0) * (b0 * b1[i] * (1.0 + b2[i] + b3[i]) * a1 + a2[i] + a3[i]);
D[i] = 1.0 / ((double)3.0) * pow((gam_1 * gam_2), 2.0) / gam_P * b0 * b1[i] * (1.0 + b2[i] + b3[i]);
E[i] = (3.0 - pow((gam_V[i] / gam_1), 2.0)) * (3.0 - pow((gam_V[i] / gam_2), 2.0)) /
(9.0 * gam_V[i] * (pow((gam_V[i] * tau_lim), 2.0) - 1.0));
}
// T-p structure calculation - we follow exactly V. Parmentier's method
// Estimate the skin temperature by setting tau = 0
tau[0] = 0.0;
summy = 0.0;
for (i = 0; i < 3; i++)
{
summy += 3.0 * Beta_V[i] * pow(Tmu, 4.0) / 4.0 * (C[i] + D[i] * exp(-tau[0] / tau_lim) +
E[i] * exp(-gam_V[i] * tau[0]));
}
Tskin = 3.0 * pow(Tint, 4) / 4.0 * (tau[0] + A + B * exp(-tau[0] / tau_lim)) + summy;
Tskin = pow(Tskin, (1.0 / 4.0));
// Estimate the opacity TOA at the skin temperature - assume this is = first layer optacity
k_Ross_Freedman(Tskin, pl[0], met, kRoss[0]);
// k_Rosseland_mod::k_Ross_Valencia(Tskin, pe[0], met, kRoss[0]);
// Recalculate the upmost tau with new kappa
tau[0] = kRoss[0] / grav * pl[0];
// More accurate layer T at uppermost layer
summy = 0.0;
for (i = 0; i < 3; i++)
{
summy += 3.0 * Beta_V[i] * pow(Tmu, 4.0) / 4.0 * (C[i] + D[i] * exp(-tau[0] / tau_lim) +
E[i] * exp(-gam_V[i] * tau[0]));
}
Tl[0] = 3.0 * pow(Tint, 4) / 4.0 * (tau[0] + A + B * exp(-tau[0] / tau_lim)) + summy;
Tl[0] = pow(Tl[0], (1.0 / 4.0));
// Now we can loop in optical depth space to find the T-p profile
for (i = 1; i < nlay; i++)
{
// Initial guess for layer
k_Ross_Freedman(Tl[i - 1], sqrt(pl[i - 1] * pl[i]), met, kRoss[i]);
// call k_Rosseland_mod::k_Ross_Valencia(Tl[i-1], sqrt(pl[i-1]*pl[i], met, kRoss[i])
tau[i] = tau[i - 1] + kRoss[i] / grav * (pl[i] - pl[i - 1]);
summy = 0.0;
for (j = 0; j < 3; j++)
{
summy = +3.0 * Beta_V[j] * pow(Tmu, 4.0) / 4.0 * (C[j] + D[j] * exp(-tau[i] / tau_lim) +
E[j] * exp(-gam_V[j] * tau[i]));
}
Tl[i] = 3.0 * pow(Tint, 4.0) / 4.0 * (tau[i] + A + B * exp(-tau[i] / tau_lim)) + summy;
Tl[i] = pow(Tl[i], (1.0 / 4.0));
// Convergence loop
for (j = 0; j < 5; j++)
{
k_Ross_Freedman(sqrt(Tl[i - 1] * Tl[i]), sqrt(pl[i - 1] * pl[i]), met, kRoss[i]);
//call k_Rosseland_mod::k_Ross_Valencia(sqrt(Tl[i-1]*T[i]), sqrt(pl[i-1]*pl[i]), met, kRoss[i])
tau[i] = tau[i - 1] + kRoss[i] / grav * (pl[i] - pl[i - 1]);
summy = 0.0;
for (k = 0; k < 3; k++)
{
summy += 3.0 * Beta_V[k] * pow(Tmu, 4.0) / 4.0 * (C[k] + D[k] * exp(-tau[i] / tau_lim) +
E[k] * exp(-gam_V[k] * tau[i]));
}
Tl[i] = 3.0 * pow(Tint, 4.0) / 4.0 * (tau[i] + A + B * exp(-tau[i] / tau_lim)) + summy;
Tl[i] = pow(Tl[i], (1.0 / 4.0));
}
}
}
///////////////////////////////////////////////////////////////
//////////////////////////////////////////////////////////////
// Subroutine that corrects for adiabatic region following Parmentier & Guillot (2015)
void adiabat_correction(int nlay, double* (&Tl),
double* pl, double& prc, double* gradrad, double* gradad) {
// dependcies
//// main_parameters::nlay -> "FMS_RC_para_&_const.cpp"
//// pow -> math
/// log10 -> math
// Input:
//
// Call by reference (Input & Output):
//
// work variables
int i, iRC, iRC1;
// start operations
for (i = 0; i < (nlay - 1); i++)
{
gradrad[i] = (log10(Tl[i]) - log10(Tl[i + 1])) / (log10(pl[i]) - log10(pl[i + 1]));
gradad[i] = ((double)0.32) - ((double)0.10) * Tl[i] / ((double)3000.0);
}
gradrad[nlay - 1] = 0.0;
gradad[nlay - 1] = 0.0;
iRC = nlay - 2;
iRC1 = nlay - 2;
for (i = (nlay - 2); i >= 0; i--)
{
if (iRC1 <= i + 1)
{
if (gradrad[i] > ((double)0.7) * gradad[i])
{
iRC1 = i;
}
if (gradrad[i] > ((double)0.98) * gradad[i])
{
iRC = i;
prc = pl[iRC];
}
}
}
if (iRC < nlay)
{
for (i = iRC; i < nlay - 1; i++)
{
gradad[i] = (double)0.32 - ((double)0.10) * Tl[i] / ((double)3000.0);
if (gradad[i] < 0.0)
{
gradad[i] = 0.0;
}
Tl[i + 1] = Tl[i] * pow((pl[i + 1] / pl[i]), gradad[i]);
}
}
}
///////////////////////////////////////////////////////////////
//////////////////////////////////////////////////////////////
void IC_profile(int iIC, bool corr, int nlay, double p0,
double* pl, double* pe,
double* k_V, double* k_IR,
double Tint, double mu, double Tirr, double grav, double fl,
double* Tl, double& prc, int table_num, double met,
double* tau_hf_e, double* kRoss_hf_e, double* tau_IRl_hf_l,
double* gradrad_hf_l, double* gradad_hf_l) {
// dependcies
//// pow() from math
//// log10() from math
//// atan() from math
//// namespace constants::onedivpi -> "FMS_RC_para_&_const.cpp"
//// main_parameters::nlay -> "FMS_RC_para_&_const.cpp"
//// main_parameters::nlay1 -> "FMS_RC_para_&_const.cpp"
//// k_Rosseland_mod::Bond_Parmentier() -> "k_Rosseland_modcpp"
//// k_Rosseland_mod::k_Ross_Freedman() -> "k_Rosseland_modcpp"
//// k_Rosseland_mod::k_Ross_Valencia() -> "k_Rosseland_modcpp"
//// sqrt() -> math
//// exp() -> math
// Input:
//
// Call by reference (Input & Output):
//
// start operations
switch (iIC)
{
case 4:
Parmentier_IC(nlay, pl, pe, Tint, mu, Tirr, grav, Tl, table_num, met,
tau_hf_e, kRoss_hf_e);
break;
default:
//std::cout << "Invalid IC integer in IC_mod, stopping" << std::endl;
break;
}
if (corr == true)
{
adiabat_correction(nlay, Tl, pl, prc, gradrad_hf_l, gradad_hf_l);
}
else
{
prc = p0;
}
}
#endif // IC_mod | #ifndef IC_mod
#define IC_mod
#pragma once
// G.K.H. Lee - PA Noti
// translation from from Fortran to C++ by PA Noti - Feb 2021
// last changes in Fortran by GKH-Lee - Oct 2020
#pragma once
#include <hip/hip_runtime.h>
#include <string>
#include <iostream>
//#include "FMS_RC_para_and_const.h"
//#include "k_Rosseland_mod.h"
//#include <math.h>
// Calculates the IR band Rosseland mean opacity (local T) according to the
// Freedman et al. (2014) fit and coefficents
void k_Ross_Freedman(double Tin, double Pin, double met, double& k_IR) {
// dependcies
//// pow from math
//// log10 from math
//// atan from math
//// onedivpi -> namespace constants::onedivpi
// Input:
// T - Local gas temperature [K]
// P - Local gas pressure [pa]
// met - Local metallicity [M/H] (log10 from solar, solar [M/H] = 0.0)
// Call by reference (Input&Output):
// k_IR - IR band Rosseland mean opacity [m2 kg-1]
// work variables
double k_lowP;
double k_hiP;
double T;
double P;
double Tl10;
double Pl10;
const double pi = atan((double)(1)) * 4;
const double onedivpi = 1.0 / pi;
// Coefficent parameters for Freedman et al. (2014) table fit
double c1 = 10.602;
double c2 = 2.882;
double c3 = 6.09e-15;
double c4 = 2.954;
double c5 = -2.526;
double c6 = 0.843;
double c7 = -5.490;
double c8_l = -14.051, c8_h = 82.241;
double c9_l = 3.055, c9_h = -55.456;
double c10_l = 0.024, c10_h = 8.754;
double c11_l = 1.877, c11_h = 0.7048;
double c12_l = -0.445, c12_h = -0.0414;
double c13_l = 0.8321, c13_h = 0.8321;
// start operations
T = Tin;
P = Pin * ((double)10.0); // Convert to dyne cm-2
Tl10 = log10(T);
Pl10 = log10(P);
// Low pressure expression
k_lowP = c1 * atan(Tl10 - c2) -
(c3 / (Pl10 + c4)) * exp(pow((Tl10 - c5), 2.0)) + c6 * met + c7;
// De log10
k_lowP = pow(((double)10.0), k_lowP);
// Temperature split for coefficents = 800 K
if (T <= 800.0)
{
k_hiP = c8_l + c9_l * Tl10 + c10_l * pow(Tl10, 2.0) +
Pl10 * (c11_l + c12_l * Tl10) +
c13_l * met * (0.5 + onedivpi * atan((Tl10 - ((double)2.5)) / (double)0.2));
}
else
{
k_hiP = c8_h + c9_h * Tl10 +
c10_h * pow(Tl10, 2.0) + Pl10 * (c11_h + c12_h * Tl10) +
c13_h * met * (0.5 + onedivpi * atan((Tl10 - ((double)2.5)) / (double)0.2));
}
// De log10
k_hiP = pow(((double)10.0), k_hiP);
// Total Rosseland mean opacity - converted to m2 kg-1
k_IR = (k_lowP + k_hiP) / ((double)10.0);
// Avoid divergence in fit for large values
if (k_IR > 1.0e10)
{
k_IR = 1.0e10;
}
}
///////////////////////////////////////////////////////////////
//////////////////////////////////////////////////////////////
// Calculates 3 band grey visual gamma values and 2 picket fence IR gamma values
// according to the coefficents and equations in:
// Parmentier & Menou (2014) and Parmentier et al. (2015)
// NOTE: This does not calculate the opacity - call k_Ross_Freedman for that
void gam_Parmentier(double Teff, int table_num, double(&gam_V)[3], double(&Beta_V)[3],
double(&Beta)[2], double& gam_1, double& gam_2, double& gam_P, double& tau_lim) {
// dependcies
//// pow from math
//// log10 from math
// Input:
// Teff - Effective temperature [K] (See Parmentier papers for various ways to calculate this)
// for non-irradiated atmosphere Teff = Tint
// table_num - Table selection from Parmentier et al. (2015): 1 = w. TiO/VO, 2 = w.o. TiO/VO
// Call by reference (Input&Output):
// gam_V(3) - gamma ratio for 3 visual bands (gam_V = kV_Ross/kIR_Ross)
// beta_V(3) - fraction of total incident stellar flux in band (1/3 for Parmentier values)
// Beta - equilvalent bandwidth for picket fence IR model
// gam_1 - gamma ratio for IR band 1 (gam_1 = kIR_1/kIR_Ross)
// gam_2 - gamma ratio for IR band 2 (gam_2 = kIR_2/kIR_Ross)
// gam_P - gamma ratio for Planck mean (gam_P = kIR_Planck/kIR_Ross)
// tau_lim - tau limit variable (usually for IC system)
// work variables
double R = 0;
double aP = 0;
double bP = 0;
double cP = 0;
double aV1 = 0, bV1 = 0, aV2 = 0, bV2 = 0, aV3 = 0, bV3 = 0;
double aB = 0, bB = 0;
double l10T = 0, l10T2 = 0, RT = 0;
int i;
// start operations
// Log 10 T_eff variables
l10T = log10(Teff);
l10T2 = pow(l10T, 2.0);
if (table_num == 1) {
// First table in Parmentier et al. (2015) w. TiO/VO
// Start large if statements with visual band and Beta coefficents
if (Teff <= 200.0)
{
aV1 = -5.51; bV1 = 2.48;
aV2 = -7.37; bV2 = 2.53;
aV3 = -3.03; bV3 = -0.20;
aB = 0.84; bB = 0.0;
}
else if (Teff > 200.0 && Teff <= 300.0)
{
aV1 = 1.23; bV1 = -0.45;
aV2 = 13.99; bV2 = -6.75;
aV3 = -13.87; bV3 = 4.51;
aB = 0.84; bB = 0.0;
}
else if (Teff > 300.0 && Teff <= 600.0)
{
aV1 = 8.65; bV1 = -3.45;
aV2 = -15.18; bV2 = 5.02;
aV3 = -11.95; bV3 = 3.74;
aB = 0.84; bB = 0.0;
}
else if (Teff > 600.0 && Teff <= 1400.0)
{
aV1 = -12.96; bV1 = 4.33;
aV2 = -10.41; bV2 = 3.31;
aV3 = -6.97; bV3 = 1.94;
aB = 0.84; bB = 0.0;
}
else if (Teff > 1400.0 && Teff < 2000.0)
{
aV1 = -23.75; bV1 = 7.76;
aV2 = -19.95; bV2 = 6.34;
aV3 = -3.65; bV3 = 0.89;
aB = 0.84; bB = 0.0;
}
else if (Teff >= 2000.0)
{
aV1 = 12.65; bV1 = -3.27;
aV2 = 13.56; bV2 = -3.81;
aV3 = -6.02; bV3 = 1.61;
aB = 6.21; bB = -1.63;
}
// gam_P coefficents
aP = -2.36;
bP = 13.92;
cP = -19.38;
}
else if (table_num == 2)
{
// ! Appendix table from Parmentier et al. (2015) - without TiO and VO
if (Teff <= 200.0)
{
aV1 = -5.51; bV1 = 2.48;
aV2 = -7.37; bV2 = 2.53;
aV3 = -3.03; bV3 = -0.20;
aB = 0.84; bB = 0.0;
}
else if (Teff > 200.0 && Teff <= 300.0)
{
aV1 = 1.23; bV1 = -0.45;
aV2 = 13.99; bV2 = -6.75;
aV3 = -13.87; bV3 = 4.51;
aB = 0.84; bB = 0.0;
}
else if (Teff > 300.0 && Teff <= 600.0)
{
aV1 = 8.65; bV1 = -3.45;
aV2 = -15.18; bV2 = 5.02;
aV3 = -11.95; bV3 = 3.74;
aB = 0.84; bB = 0.0;
}
else if (Teff > 600.0 && Teff <= 1400.0)
{
aV1 = -12.96; bV1 = 4.33;
aV2 = -10.41; bV2 = 3.31;
aV3 = -6.97; bV3 = 1.94;
aB = 0.84; bB = 0.0;
}
else if (Teff > 1400.0 && Teff < 2000.0)
{
aV1 = -1.68; bV1 = 0.75;
aV2 = 6.96; bV2 = -2.21;
aV3 = 0.02; bV3 = -0.28;
aB = 3.0; bB = -0.69;
}
else if (Teff >= 2000.0)
{
aV1 = 10.37; bV1 = -2.91;
aV2 = -2.4; bV2 = 0.62;
aV3 = -16.54; bV3 = 4.74;
aB = 3.0; bB = -0.69;
}
// gam_P coefficents
if (Teff <= 1400.0)
{
aP = -2.36;
bP = 13.92;
cP = -19.38;
}
else
{
aP = -12.45;
bP = 82.25;
cP = -134.42;
}
}
// Calculation of all values
// Visual band gamma
gam_V[0] = pow(((double)10.0), (aV1 + bV1 * l10T));
gam_V[1] = pow(((double)10.0), (aV2 + bV2 * l10T));
gam_V[2] = pow(((double)10.0), (aV3 + bV3 * l10T));
// Visual band fractions
for (i = 0; i < 3; i++)
{
Beta_V[i] = ((double)1.0) / ((double)3.0);
}
// gamma_Planck - if < 1 then make it grey approximation (k_Planck = k_Ross, gam_P = 1)
gam_P = pow(((double)10.0), (aP * l10T2 + bP * l10T + cP));
if (gam_P < 1.0000001)
{
gam_P = 1.0000001;
}
// equivalent bandwidth value
Beta[0] = aB + bB * l10T;
Beta[1] = (1.0) - Beta[0];
// IR band kappa1/kappa2 ratio - Eq. 96 from Parmentier & Menou (2014)
RT = (gam_P - 1.0) / (2.0 * Beta[0] * Beta[1]);
R = 1.0 + RT + sqrt(pow(RT, 2.0) + RT);
// gam_1 and gam_2 values - Eq. 92, 93 from Parmentier & Menou (2014)
gam_1 = Beta[0] + R - Beta[0] * R;
gam_2 = gam_1 / R;
// Calculate tau_lim parameter
tau_lim = ((double)1.0) / (gam_1 * gam_2) * sqrt(gam_P / ((double)3.0));
}
///////////////////////////////////////////////////////////////
//////////////////////////////////////////////////////////////
// Calculates the Bond Albedo according to Parmentier et al. (2015) expression
void Bond_Parmentier(double Teff0, double grav, double& AB) {
// dependcies
//// pow from math
//// log10 from math
// Input:
// Teff0 - Atmospheric profile effective temperature [K] with zero albedo
// grav - Surface gravity of planet [m s-2]
// Call by reference (Input&Output):
// AB - Bond albedo
// work variables
double a, b;
// start operations
if (Teff0 <= 250.0)
{
a = ((double)-0.335) * pow(grav, ((double)0.070));
b = 0.0;
}
else if (Teff0 > 250.0 && Teff0 <= 750.0)
{
a = -0.335 * pow(grav, ((double)0.070)) + 2.149 * pow(grav, ((double)0.135));
b = -0.896 * pow(grav, ((double)0.135));
}
else if (Teff0 > 750.0 && Teff0 < 1250.0)
{
a = -0.335 * pow(grav, ((double)0.070)) - 0.428 * pow(grav, ((double)0.135));
b = 0.0;
}
else if (Teff0 >= 1250.0)
{
a = 16.947 - ((double)3.174) * pow(grav, ((double)0.070)) - 4.051 *
pow(grav, ((double)0.135));
b = -5.472 + ((double)0.917) * pow(grav, ((double)0.070)) + 1.170 *
pow(grav, ((double)0.135));
}
// Final Bond Albedo expression
AB = pow(((double)10.0), (a + b * log10(Teff0)));
}
///////////////////////////////////////////////////////////////
//////////////////////////////////////////////////////////////
// This subroutine follows Parmentier & Guillot (2014, 2015) non-grey picket fence scheme
void Parmentier_IC(const int nlay, double* pl,
double* pe, double Tint, double mu, double Tirr,
double grav, double* (&Tl), int table_num, double met,
double* tau, double* kRoss) {
// dependcies
//// main_parameters::nlay -> "FMS_RC_para_&_const.cpp"
//// main_parameters::nlay1 -> "FMS_RC_para_&_const.cpp"
//// k_Rosseland_mod::Bond_Parmentier -> "k_Rosseland_modcpp"
//// k_Rosseland_mod::k_Ross_Freedman -> "k_Rosseland_modcpp"
//// k_Rosseland_mod::k_Ross_Valencia -> "k_Rosseland_modcpp"
//// pow -> math
//// sqrt -> math
//// exp -> math
// Input:
//
// Call by reference (Input & Output):
//
// work variables
int i, j, k;
double Teff0, Teff, Tmu, Bond, Tskin;
double gam_V[3] = { 0 }, Beta_V[3] = { 0 };
double Beta[2];
double gam_1, gam_2, gam_P, tau_lim;
double a0, a1, b0, A, B, At1, At2;
double a2[3], a3[3], b1[3], b2[3], b3[3], Av1[3], Av2[3];
double C[3], D[3], E[3];
double summy;
// start operations
// Effective temperature parameter
Tmu = pow((mu * pow(Tirr, 4.0)), (1.0 / 4.0));
// Find Bond albedo of planet - Bond albedo is given by mu = 1/sqrt(3)
Teff0 = pow(((pow(Tint, 4.0) + (1.0 / sqrt(((double)3.0))) * pow(Tirr, 4.0))), (1.0 / 4.0));
Bond_Parmentier(Teff0, grav, Bond);
Teff = pow((pow(Tint, 4.0) + (((double)1.0) - Bond) * mu * pow(Tirr, 4.0)), (1.0 / 4.0));
// Find the V band gamma, beta and IR gamma and beta ratios for this profile
// Passed mu, so make lat = acos(mu) and lon = 0
gam_Parmentier(Teff, table_num, gam_V, Beta_V, Beta, gam_1, gam_2,
gam_P, tau_lim);
for (i = 0; i < 3; i++)
{
gam_V[i] = gam_V[i] / mu;
}
// Hard work starts here - first calculate all the required coefficents
At1 = pow(gam_1, 2.0) * log(1.0 + 1.0 / (tau_lim * gam_1));
At2 = pow(gam_2, 2.0) * log(1.0 + 1.0 / (tau_lim * gam_2));
for (i = 0; i < 3; i++)
{
Av1[i] = pow(gam_1, 2.0) * log(1.0 + gam_V[i] / gam_1);
Av2[i] = pow(gam_2, 2.0) * log(1.0 + gam_V[i] / gam_2);
}
a0 = 1.0 / gam_1 + 1.0 / gam_2;
a1 = -1.0 / (((double)3.0) * pow(tau_lim, 2.0)) * (gam_P / (1.0 - gam_P) *
(gam_1 + gam_2 - 2.0) / (gam_1 + gam_2) +
(gam_1 + gam_2) * tau_lim - (At1 + At2) * pow(tau_lim, 2.0));
for (i = 0; i < 3; i++)
{
a2[i] = pow(tau_lim, 2.0) / (gam_P * pow(gam_V[i], 2.0)) *
((3.0 * pow(gam_1, 2.0) - pow(gam_V[i], 2.0)) * (3.0 * pow(gam_2, 2.0) - pow(gam_V[i], 2.0)) *
(gam_1 + gam_2) - 3.0 * gam_V[i] * (6.0 * pow(gam_1, 2.0) * pow(gam_2, 2.0) - pow(gam_V[i], 2.0) *
(pow(gam_1, 2.0) + pow(gam_2, 2.0)))) / (1.0 - pow(gam_V[i], 2.0) * pow(tau_lim, 2.0));
a3[i] = -pow(tau_lim, 2.0) * (3.0 * pow(gam_1, 2.0) - pow(gam_V[i], 2.0)) *
(3.0 * pow(gam_2, 2.0) - pow(gam_V[i], 2.0)) * (Av2[i] + Av1[i]) /
(gam_P * pow(gam_V[i], 3.0) * (1.0 - pow(gam_V[i], 2.0) * pow(tau_lim, 2.0)));
b1[i] = gam_1 * gam_2 * (3.0 * pow(gam_1, 2.0) - pow(gam_V[i], 2.0)) * (3.0 * pow(gam_2, 2.0) -
pow(gam_V[i], 2.0)) * pow(tau_lim, 2) / (gam_P * pow(gam_V[i], 2.0) *
(pow(gam_V[i], 2.0) * pow(tau_lim, 2.0) - 1.0));
b2[i] = 3.0 * (gam_1 + gam_2) * pow(gam_V[i], 3.0) / ((3.0 * pow(gam_1, 2.0) - pow(gam_V[i], 2.0)) *
(3.0 * pow(gam_2, 2.0) - pow(gam_V[i], 2.0)));
b3[i] = (Av2[i] - Av1[i]) / (gam_V[i] * (gam_1 - gam_2));
}
b0 = 1.0 / (gam_1 * gam_2 / (gam_1 - gam_2) * (At1 - At2) / 3.0 - pow((gam_1 * gam_2), 2.0) /
sqrt(3.0 * gam_P) - pow((gam_1 * gam_2), 3.0) /
((1.0 - gam_1) * (1.0 - gam_2) * (gam_1 + gam_2)));
A = 1.0 / ((double)3.0) * (a0 + a1 * b0);
B = -1.0 / ((double)3.0) * pow((gam_1 * gam_2), 2.0) / gam_P * b0;
for (i = 0; i < 3; i++)
{
C[i] = -1.0 / ((double)3.0) * (b0 * b1[i] * (1.0 + b2[i] + b3[i]) * a1 + a2[i] + a3[i]);
D[i] = 1.0 / ((double)3.0) * pow((gam_1 * gam_2), 2.0) / gam_P * b0 * b1[i] * (1.0 + b2[i] + b3[i]);
E[i] = (3.0 - pow((gam_V[i] / gam_1), 2.0)) * (3.0 - pow((gam_V[i] / gam_2), 2.0)) /
(9.0 * gam_V[i] * (pow((gam_V[i] * tau_lim), 2.0) - 1.0));
}
// T-p structure calculation - we follow exactly V. Parmentier's method
// Estimate the skin temperature by setting tau = 0
tau[0] = 0.0;
summy = 0.0;
for (i = 0; i < 3; i++)
{
summy += 3.0 * Beta_V[i] * pow(Tmu, 4.0) / 4.0 * (C[i] + D[i] * exp(-tau[0] / tau_lim) +
E[i] * exp(-gam_V[i] * tau[0]));
}
Tskin = 3.0 * pow(Tint, 4) / 4.0 * (tau[0] + A + B * exp(-tau[0] / tau_lim)) + summy;
Tskin = pow(Tskin, (1.0 / 4.0));
// Estimate the opacity TOA at the skin temperature - assume this is = first layer optacity
k_Ross_Freedman(Tskin, pl[0], met, kRoss[0]);
// k_Rosseland_mod::k_Ross_Valencia(Tskin, pe[0], met, kRoss[0]);
// Recalculate the upmost tau with new kappa
tau[0] = kRoss[0] / grav * pl[0];
// More accurate layer T at uppermost layer
summy = 0.0;
for (i = 0; i < 3; i++)
{
summy += 3.0 * Beta_V[i] * pow(Tmu, 4.0) / 4.0 * (C[i] + D[i] * exp(-tau[0] / tau_lim) +
E[i] * exp(-gam_V[i] * tau[0]));
}
Tl[0] = 3.0 * pow(Tint, 4) / 4.0 * (tau[0] + A + B * exp(-tau[0] / tau_lim)) + summy;
Tl[0] = pow(Tl[0], (1.0 / 4.0));
// Now we can loop in optical depth space to find the T-p profile
for (i = 1; i < nlay; i++)
{
// Initial guess for layer
k_Ross_Freedman(Tl[i - 1], sqrt(pl[i - 1] * pl[i]), met, kRoss[i]);
// call k_Rosseland_mod::k_Ross_Valencia(Tl[i-1], sqrt(pl[i-1]*pl[i], met, kRoss[i])
tau[i] = tau[i - 1] + kRoss[i] / grav * (pl[i] - pl[i - 1]);
summy = 0.0;
for (j = 0; j < 3; j++)
{
summy = +3.0 * Beta_V[j] * pow(Tmu, 4.0) / 4.0 * (C[j] + D[j] * exp(-tau[i] / tau_lim) +
E[j] * exp(-gam_V[j] * tau[i]));
}
Tl[i] = 3.0 * pow(Tint, 4.0) / 4.0 * (tau[i] + A + B * exp(-tau[i] / tau_lim)) + summy;
Tl[i] = pow(Tl[i], (1.0 / 4.0));
// Convergence loop
for (j = 0; j < 5; j++)
{
k_Ross_Freedman(sqrt(Tl[i - 1] * Tl[i]), sqrt(pl[i - 1] * pl[i]), met, kRoss[i]);
//call k_Rosseland_mod::k_Ross_Valencia(sqrt(Tl[i-1]*T[i]), sqrt(pl[i-1]*pl[i]), met, kRoss[i])
tau[i] = tau[i - 1] + kRoss[i] / grav * (pl[i] - pl[i - 1]);
summy = 0.0;
for (k = 0; k < 3; k++)
{
summy += 3.0 * Beta_V[k] * pow(Tmu, 4.0) / 4.0 * (C[k] + D[k] * exp(-tau[i] / tau_lim) +
E[k] * exp(-gam_V[k] * tau[i]));
}
Tl[i] = 3.0 * pow(Tint, 4.0) / 4.0 * (tau[i] + A + B * exp(-tau[i] / tau_lim)) + summy;
Tl[i] = pow(Tl[i], (1.0 / 4.0));
}
}
}
///////////////////////////////////////////////////////////////
//////////////////////////////////////////////////////////////
// Subroutine that corrects for adiabatic region following Parmentier & Guillot (2015)
void adiabat_correction(int nlay, double* (&Tl),
double* pl, double& prc, double* gradrad, double* gradad) {
// dependcies
//// main_parameters::nlay -> "FMS_RC_para_&_const.cpp"
//// pow -> math
/// log10 -> math
// Input:
//
// Call by reference (Input & Output):
//
// work variables
int i, iRC, iRC1;
// start operations
for (i = 0; i < (nlay - 1); i++)
{
gradrad[i] = (log10(Tl[i]) - log10(Tl[i + 1])) / (log10(pl[i]) - log10(pl[i + 1]));
gradad[i] = ((double)0.32) - ((double)0.10) * Tl[i] / ((double)3000.0);
}
gradrad[nlay - 1] = 0.0;
gradad[nlay - 1] = 0.0;
iRC = nlay - 2;
iRC1 = nlay - 2;
for (i = (nlay - 2); i >= 0; i--)
{
if (iRC1 <= i + 1)
{
if (gradrad[i] > ((double)0.7) * gradad[i])
{
iRC1 = i;
}
if (gradrad[i] > ((double)0.98) * gradad[i])
{
iRC = i;
prc = pl[iRC];
}
}
}
if (iRC < nlay)
{
for (i = iRC; i < nlay - 1; i++)
{
gradad[i] = (double)0.32 - ((double)0.10) * Tl[i] / ((double)3000.0);
if (gradad[i] < 0.0)
{
gradad[i] = 0.0;
}
Tl[i + 1] = Tl[i] * pow((pl[i + 1] / pl[i]), gradad[i]);
}
}
}
///////////////////////////////////////////////////////////////
//////////////////////////////////////////////////////////////
void IC_profile(int iIC, bool corr, int nlay, double p0,
double* pl, double* pe,
double* k_V, double* k_IR,
double Tint, double mu, double Tirr, double grav, double fl,
double* Tl, double& prc, int table_num, double met,
double* tau_hf_e, double* kRoss_hf_e, double* tau_IRl_hf_l,
double* gradrad_hf_l, double* gradad_hf_l) {
// dependcies
//// pow() from math
//// log10() from math
//// atan() from math
//// namespace constants::onedivpi -> "FMS_RC_para_&_const.cpp"
//// main_parameters::nlay -> "FMS_RC_para_&_const.cpp"
//// main_parameters::nlay1 -> "FMS_RC_para_&_const.cpp"
//// k_Rosseland_mod::Bond_Parmentier() -> "k_Rosseland_modcpp"
//// k_Rosseland_mod::k_Ross_Freedman() -> "k_Rosseland_modcpp"
//// k_Rosseland_mod::k_Ross_Valencia() -> "k_Rosseland_modcpp"
//// sqrt() -> math
//// exp() -> math
// Input:
//
// Call by reference (Input & Output):
//
// start operations
switch (iIC)
{
case 4:
Parmentier_IC(nlay, pl, pe, Tint, mu, Tirr, grav, Tl, table_num, met,
tau_hf_e, kRoss_hf_e);
break;
default:
//std::cout << "Invalid IC integer in IC_mod, stopping" << std::endl;
break;
}
if (corr == true)
{
adiabat_correction(nlay, Tl, pl, prc, gradrad_hf_l, gradad_hf_l);
}
else
{
prc = p0;
}
}
#endif // IC_mod |
You are a helpful coding assistant specialized in converting HIP source code to AMD device assembly. | #ifndef IC_mod
#define IC_mod
#pragma once
// G.K.H. Lee - PA Noti
// translation from from Fortran to C++ by PA Noti - Feb 2021
// last changes in Fortran by GKH-Lee - Oct 2020
#pragma once
#include <hip/hip_runtime.h>
#include <string>
#include <iostream>
//#include "FMS_RC_para_and_const.h"
//#include "k_Rosseland_mod.h"
//#include <math.h>
// Calculates the IR band Rosseland mean opacity (local T) according to the
// Freedman et al. (2014) fit and coefficents
void k_Ross_Freedman(double Tin, double Pin, double met, double& k_IR) {
// dependcies
//// pow from math
//// log10 from math
//// atan from math
//// onedivpi -> namespace constants::onedivpi
// Input:
// T - Local gas temperature [K]
// P - Local gas pressure [pa]
// met - Local metallicity [M/H] (log10 from solar, solar [M/H] = 0.0)
// Call by reference (Input&Output):
// k_IR - IR band Rosseland mean opacity [m2 kg-1]
// work variables
double k_lowP;
double k_hiP;
double T;
double P;
double Tl10;
double Pl10;
const double pi = atan((double)(1)) * 4;
const double onedivpi = 1.0 / pi;
// Coefficent parameters for Freedman et al. (2014) table fit
double c1 = 10.602;
double c2 = 2.882;
double c3 = 6.09e-15;
double c4 = 2.954;
double c5 = -2.526;
double c6 = 0.843;
double c7 = -5.490;
double c8_l = -14.051, c8_h = 82.241;
double c9_l = 3.055, c9_h = -55.456;
double c10_l = 0.024, c10_h = 8.754;
double c11_l = 1.877, c11_h = 0.7048;
double c12_l = -0.445, c12_h = -0.0414;
double c13_l = 0.8321, c13_h = 0.8321;
// start operations
T = Tin;
P = Pin * ((double)10.0); // Convert to dyne cm-2
Tl10 = log10(T);
Pl10 = log10(P);
// Low pressure expression
k_lowP = c1 * atan(Tl10 - c2) -
(c3 / (Pl10 + c4)) * exp(pow((Tl10 - c5), 2.0)) + c6 * met + c7;
// De log10
k_lowP = pow(((double)10.0), k_lowP);
// Temperature split for coefficents = 800 K
if (T <= 800.0)
{
k_hiP = c8_l + c9_l * Tl10 + c10_l * pow(Tl10, 2.0) +
Pl10 * (c11_l + c12_l * Tl10) +
c13_l * met * (0.5 + onedivpi * atan((Tl10 - ((double)2.5)) / (double)0.2));
}
else
{
k_hiP = c8_h + c9_h * Tl10 +
c10_h * pow(Tl10, 2.0) + Pl10 * (c11_h + c12_h * Tl10) +
c13_h * met * (0.5 + onedivpi * atan((Tl10 - ((double)2.5)) / (double)0.2));
}
// De log10
k_hiP = pow(((double)10.0), k_hiP);
// Total Rosseland mean opacity - converted to m2 kg-1
k_IR = (k_lowP + k_hiP) / ((double)10.0);
// Avoid divergence in fit for large values
if (k_IR > 1.0e10)
{
k_IR = 1.0e10;
}
}
///////////////////////////////////////////////////////////////
//////////////////////////////////////////////////////////////
// Calculates 3 band grey visual gamma values and 2 picket fence IR gamma values
// according to the coefficents and equations in:
// Parmentier & Menou (2014) and Parmentier et al. (2015)
// NOTE: This does not calculate the opacity - call k_Ross_Freedman for that
void gam_Parmentier(double Teff, int table_num, double(&gam_V)[3], double(&Beta_V)[3],
double(&Beta)[2], double& gam_1, double& gam_2, double& gam_P, double& tau_lim) {
// dependcies
//// pow from math
//// log10 from math
// Input:
// Teff - Effective temperature [K] (See Parmentier papers for various ways to calculate this)
// for non-irradiated atmosphere Teff = Tint
// table_num - Table selection from Parmentier et al. (2015): 1 = w. TiO/VO, 2 = w.o. TiO/VO
// Call by reference (Input&Output):
// gam_V(3) - gamma ratio for 3 visual bands (gam_V = kV_Ross/kIR_Ross)
// beta_V(3) - fraction of total incident stellar flux in band (1/3 for Parmentier values)
// Beta - equilvalent bandwidth for picket fence IR model
// gam_1 - gamma ratio for IR band 1 (gam_1 = kIR_1/kIR_Ross)
// gam_2 - gamma ratio for IR band 2 (gam_2 = kIR_2/kIR_Ross)
// gam_P - gamma ratio for Planck mean (gam_P = kIR_Planck/kIR_Ross)
// tau_lim - tau limit variable (usually for IC system)
// work variables
double R = 0;
double aP = 0;
double bP = 0;
double cP = 0;
double aV1 = 0, bV1 = 0, aV2 = 0, bV2 = 0, aV3 = 0, bV3 = 0;
double aB = 0, bB = 0;
double l10T = 0, l10T2 = 0, RT = 0;
int i;
// start operations
// Log 10 T_eff variables
l10T = log10(Teff);
l10T2 = pow(l10T, 2.0);
if (table_num == 1) {
// First table in Parmentier et al. (2015) w. TiO/VO
// Start large if statements with visual band and Beta coefficents
if (Teff <= 200.0)
{
aV1 = -5.51; bV1 = 2.48;
aV2 = -7.37; bV2 = 2.53;
aV3 = -3.03; bV3 = -0.20;
aB = 0.84; bB = 0.0;
}
else if (Teff > 200.0 && Teff <= 300.0)
{
aV1 = 1.23; bV1 = -0.45;
aV2 = 13.99; bV2 = -6.75;
aV3 = -13.87; bV3 = 4.51;
aB = 0.84; bB = 0.0;
}
else if (Teff > 300.0 && Teff <= 600.0)
{
aV1 = 8.65; bV1 = -3.45;
aV2 = -15.18; bV2 = 5.02;
aV3 = -11.95; bV3 = 3.74;
aB = 0.84; bB = 0.0;
}
else if (Teff > 600.0 && Teff <= 1400.0)
{
aV1 = -12.96; bV1 = 4.33;
aV2 = -10.41; bV2 = 3.31;
aV3 = -6.97; bV3 = 1.94;
aB = 0.84; bB = 0.0;
}
else if (Teff > 1400.0 && Teff < 2000.0)
{
aV1 = -23.75; bV1 = 7.76;
aV2 = -19.95; bV2 = 6.34;
aV3 = -3.65; bV3 = 0.89;
aB = 0.84; bB = 0.0;
}
else if (Teff >= 2000.0)
{
aV1 = 12.65; bV1 = -3.27;
aV2 = 13.56; bV2 = -3.81;
aV3 = -6.02; bV3 = 1.61;
aB = 6.21; bB = -1.63;
}
// gam_P coefficents
aP = -2.36;
bP = 13.92;
cP = -19.38;
}
else if (table_num == 2)
{
// ! Appendix table from Parmentier et al. (2015) - without TiO and VO
if (Teff <= 200.0)
{
aV1 = -5.51; bV1 = 2.48;
aV2 = -7.37; bV2 = 2.53;
aV3 = -3.03; bV3 = -0.20;
aB = 0.84; bB = 0.0;
}
else if (Teff > 200.0 && Teff <= 300.0)
{
aV1 = 1.23; bV1 = -0.45;
aV2 = 13.99; bV2 = -6.75;
aV3 = -13.87; bV3 = 4.51;
aB = 0.84; bB = 0.0;
}
else if (Teff > 300.0 && Teff <= 600.0)
{
aV1 = 8.65; bV1 = -3.45;
aV2 = -15.18; bV2 = 5.02;
aV3 = -11.95; bV3 = 3.74;
aB = 0.84; bB = 0.0;
}
else if (Teff > 600.0 && Teff <= 1400.0)
{
aV1 = -12.96; bV1 = 4.33;
aV2 = -10.41; bV2 = 3.31;
aV3 = -6.97; bV3 = 1.94;
aB = 0.84; bB = 0.0;
}
else if (Teff > 1400.0 && Teff < 2000.0)
{
aV1 = -1.68; bV1 = 0.75;
aV2 = 6.96; bV2 = -2.21;
aV3 = 0.02; bV3 = -0.28;
aB = 3.0; bB = -0.69;
}
else if (Teff >= 2000.0)
{
aV1 = 10.37; bV1 = -2.91;
aV2 = -2.4; bV2 = 0.62;
aV3 = -16.54; bV3 = 4.74;
aB = 3.0; bB = -0.69;
}
// gam_P coefficents
if (Teff <= 1400.0)
{
aP = -2.36;
bP = 13.92;
cP = -19.38;
}
else
{
aP = -12.45;
bP = 82.25;
cP = -134.42;
}
}
// Calculation of all values
// Visual band gamma
gam_V[0] = pow(((double)10.0), (aV1 + bV1 * l10T));
gam_V[1] = pow(((double)10.0), (aV2 + bV2 * l10T));
gam_V[2] = pow(((double)10.0), (aV3 + bV3 * l10T));
// Visual band fractions
for (i = 0; i < 3; i++)
{
Beta_V[i] = ((double)1.0) / ((double)3.0);
}
// gamma_Planck - if < 1 then make it grey approximation (k_Planck = k_Ross, gam_P = 1)
gam_P = pow(((double)10.0), (aP * l10T2 + bP * l10T + cP));
if (gam_P < 1.0000001)
{
gam_P = 1.0000001;
}
// equivalent bandwidth value
Beta[0] = aB + bB * l10T;
Beta[1] = (1.0) - Beta[0];
// IR band kappa1/kappa2 ratio - Eq. 96 from Parmentier & Menou (2014)
RT = (gam_P - 1.0) / (2.0 * Beta[0] * Beta[1]);
R = 1.0 + RT + sqrt(pow(RT, 2.0) + RT);
// gam_1 and gam_2 values - Eq. 92, 93 from Parmentier & Menou (2014)
gam_1 = Beta[0] + R - Beta[0] * R;
gam_2 = gam_1 / R;
// Calculate tau_lim parameter
tau_lim = ((double)1.0) / (gam_1 * gam_2) * sqrt(gam_P / ((double)3.0));
}
///////////////////////////////////////////////////////////////
//////////////////////////////////////////////////////////////
// Calculates the Bond Albedo according to Parmentier et al. (2015) expression
void Bond_Parmentier(double Teff0, double grav, double& AB) {
// dependcies
//// pow from math
//// log10 from math
// Input:
// Teff0 - Atmospheric profile effective temperature [K] with zero albedo
// grav - Surface gravity of planet [m s-2]
// Call by reference (Input&Output):
// AB - Bond albedo
// work variables
double a, b;
// start operations
if (Teff0 <= 250.0)
{
a = ((double)-0.335) * pow(grav, ((double)0.070));
b = 0.0;
}
else if (Teff0 > 250.0 && Teff0 <= 750.0)
{
a = -0.335 * pow(grav, ((double)0.070)) + 2.149 * pow(grav, ((double)0.135));
b = -0.896 * pow(grav, ((double)0.135));
}
else if (Teff0 > 750.0 && Teff0 < 1250.0)
{
a = -0.335 * pow(grav, ((double)0.070)) - 0.428 * pow(grav, ((double)0.135));
b = 0.0;
}
else if (Teff0 >= 1250.0)
{
a = 16.947 - ((double)3.174) * pow(grav, ((double)0.070)) - 4.051 *
pow(grav, ((double)0.135));
b = -5.472 + ((double)0.917) * pow(grav, ((double)0.070)) + 1.170 *
pow(grav, ((double)0.135));
}
// Final Bond Albedo expression
AB = pow(((double)10.0), (a + b * log10(Teff0)));
}
///////////////////////////////////////////////////////////////
//////////////////////////////////////////////////////////////
// This subroutine follows Parmentier & Guillot (2014, 2015) non-grey picket fence scheme
void Parmentier_IC(const int nlay, double* pl,
double* pe, double Tint, double mu, double Tirr,
double grav, double* (&Tl), int table_num, double met,
double* tau, double* kRoss) {
// dependcies
//// main_parameters::nlay -> "FMS_RC_para_&_const.cpp"
//// main_parameters::nlay1 -> "FMS_RC_para_&_const.cpp"
//// k_Rosseland_mod::Bond_Parmentier -> "k_Rosseland_modcpp"
//// k_Rosseland_mod::k_Ross_Freedman -> "k_Rosseland_modcpp"
//// k_Rosseland_mod::k_Ross_Valencia -> "k_Rosseland_modcpp"
//// pow -> math
//// sqrt -> math
//// exp -> math
// Input:
//
// Call by reference (Input & Output):
//
// work variables
int i, j, k;
double Teff0, Teff, Tmu, Bond, Tskin;
double gam_V[3] = { 0 }, Beta_V[3] = { 0 };
double Beta[2];
double gam_1, gam_2, gam_P, tau_lim;
double a0, a1, b0, A, B, At1, At2;
double a2[3], a3[3], b1[3], b2[3], b3[3], Av1[3], Av2[3];
double C[3], D[3], E[3];
double summy;
// start operations
// Effective temperature parameter
Tmu = pow((mu * pow(Tirr, 4.0)), (1.0 / 4.0));
// Find Bond albedo of planet - Bond albedo is given by mu = 1/sqrt(3)
Teff0 = pow(((pow(Tint, 4.0) + (1.0 / sqrt(((double)3.0))) * pow(Tirr, 4.0))), (1.0 / 4.0));
Bond_Parmentier(Teff0, grav, Bond);
Teff = pow((pow(Tint, 4.0) + (((double)1.0) - Bond) * mu * pow(Tirr, 4.0)), (1.0 / 4.0));
// Find the V band gamma, beta and IR gamma and beta ratios for this profile
// Passed mu, so make lat = acos(mu) and lon = 0
gam_Parmentier(Teff, table_num, gam_V, Beta_V, Beta, gam_1, gam_2,
gam_P, tau_lim);
for (i = 0; i < 3; i++)
{
gam_V[i] = gam_V[i] / mu;
}
// Hard work starts here - first calculate all the required coefficents
At1 = pow(gam_1, 2.0) * log(1.0 + 1.0 / (tau_lim * gam_1));
At2 = pow(gam_2, 2.0) * log(1.0 + 1.0 / (tau_lim * gam_2));
for (i = 0; i < 3; i++)
{
Av1[i] = pow(gam_1, 2.0) * log(1.0 + gam_V[i] / gam_1);
Av2[i] = pow(gam_2, 2.0) * log(1.0 + gam_V[i] / gam_2);
}
a0 = 1.0 / gam_1 + 1.0 / gam_2;
a1 = -1.0 / (((double)3.0) * pow(tau_lim, 2.0)) * (gam_P / (1.0 - gam_P) *
(gam_1 + gam_2 - 2.0) / (gam_1 + gam_2) +
(gam_1 + gam_2) * tau_lim - (At1 + At2) * pow(tau_lim, 2.0));
for (i = 0; i < 3; i++)
{
a2[i] = pow(tau_lim, 2.0) / (gam_P * pow(gam_V[i], 2.0)) *
((3.0 * pow(gam_1, 2.0) - pow(gam_V[i], 2.0)) * (3.0 * pow(gam_2, 2.0) - pow(gam_V[i], 2.0)) *
(gam_1 + gam_2) - 3.0 * gam_V[i] * (6.0 * pow(gam_1, 2.0) * pow(gam_2, 2.0) - pow(gam_V[i], 2.0) *
(pow(gam_1, 2.0) + pow(gam_2, 2.0)))) / (1.0 - pow(gam_V[i], 2.0) * pow(tau_lim, 2.0));
a3[i] = -pow(tau_lim, 2.0) * (3.0 * pow(gam_1, 2.0) - pow(gam_V[i], 2.0)) *
(3.0 * pow(gam_2, 2.0) - pow(gam_V[i], 2.0)) * (Av2[i] + Av1[i]) /
(gam_P * pow(gam_V[i], 3.0) * (1.0 - pow(gam_V[i], 2.0) * pow(tau_lim, 2.0)));
b1[i] = gam_1 * gam_2 * (3.0 * pow(gam_1, 2.0) - pow(gam_V[i], 2.0)) * (3.0 * pow(gam_2, 2.0) -
pow(gam_V[i], 2.0)) * pow(tau_lim, 2) / (gam_P * pow(gam_V[i], 2.0) *
(pow(gam_V[i], 2.0) * pow(tau_lim, 2.0) - 1.0));
b2[i] = 3.0 * (gam_1 + gam_2) * pow(gam_V[i], 3.0) / ((3.0 * pow(gam_1, 2.0) - pow(gam_V[i], 2.0)) *
(3.0 * pow(gam_2, 2.0) - pow(gam_V[i], 2.0)));
b3[i] = (Av2[i] - Av1[i]) / (gam_V[i] * (gam_1 - gam_2));
}
b0 = 1.0 / (gam_1 * gam_2 / (gam_1 - gam_2) * (At1 - At2) / 3.0 - pow((gam_1 * gam_2), 2.0) /
sqrt(3.0 * gam_P) - pow((gam_1 * gam_2), 3.0) /
((1.0 - gam_1) * (1.0 - gam_2) * (gam_1 + gam_2)));
A = 1.0 / ((double)3.0) * (a0 + a1 * b0);
B = -1.0 / ((double)3.0) * pow((gam_1 * gam_2), 2.0) / gam_P * b0;
for (i = 0; i < 3; i++)
{
C[i] = -1.0 / ((double)3.0) * (b0 * b1[i] * (1.0 + b2[i] + b3[i]) * a1 + a2[i] + a3[i]);
D[i] = 1.0 / ((double)3.0) * pow((gam_1 * gam_2), 2.0) / gam_P * b0 * b1[i] * (1.0 + b2[i] + b3[i]);
E[i] = (3.0 - pow((gam_V[i] / gam_1), 2.0)) * (3.0 - pow((gam_V[i] / gam_2), 2.0)) /
(9.0 * gam_V[i] * (pow((gam_V[i] * tau_lim), 2.0) - 1.0));
}
// T-p structure calculation - we follow exactly V. Parmentier's method
// Estimate the skin temperature by setting tau = 0
tau[0] = 0.0;
summy = 0.0;
for (i = 0; i < 3; i++)
{
summy += 3.0 * Beta_V[i] * pow(Tmu, 4.0) / 4.0 * (C[i] + D[i] * exp(-tau[0] / tau_lim) +
E[i] * exp(-gam_V[i] * tau[0]));
}
Tskin = 3.0 * pow(Tint, 4) / 4.0 * (tau[0] + A + B * exp(-tau[0] / tau_lim)) + summy;
Tskin = pow(Tskin, (1.0 / 4.0));
// Estimate the opacity TOA at the skin temperature - assume this is = first layer optacity
k_Ross_Freedman(Tskin, pl[0], met, kRoss[0]);
// k_Rosseland_mod::k_Ross_Valencia(Tskin, pe[0], met, kRoss[0]);
// Recalculate the upmost tau with new kappa
tau[0] = kRoss[0] / grav * pl[0];
// More accurate layer T at uppermost layer
summy = 0.0;
for (i = 0; i < 3; i++)
{
summy += 3.0 * Beta_V[i] * pow(Tmu, 4.0) / 4.0 * (C[i] + D[i] * exp(-tau[0] / tau_lim) +
E[i] * exp(-gam_V[i] * tau[0]));
}
Tl[0] = 3.0 * pow(Tint, 4) / 4.0 * (tau[0] + A + B * exp(-tau[0] / tau_lim)) + summy;
Tl[0] = pow(Tl[0], (1.0 / 4.0));
// Now we can loop in optical depth space to find the T-p profile
for (i = 1; i < nlay; i++)
{
// Initial guess for layer
k_Ross_Freedman(Tl[i - 1], sqrt(pl[i - 1] * pl[i]), met, kRoss[i]);
// call k_Rosseland_mod::k_Ross_Valencia(Tl[i-1], sqrt(pl[i-1]*pl[i], met, kRoss[i])
tau[i] = tau[i - 1] + kRoss[i] / grav * (pl[i] - pl[i - 1]);
summy = 0.0;
for (j = 0; j < 3; j++)
{
summy = +3.0 * Beta_V[j] * pow(Tmu, 4.0) / 4.0 * (C[j] + D[j] * exp(-tau[i] / tau_lim) +
E[j] * exp(-gam_V[j] * tau[i]));
}
Tl[i] = 3.0 * pow(Tint, 4.0) / 4.0 * (tau[i] + A + B * exp(-tau[i] / tau_lim)) + summy;
Tl[i] = pow(Tl[i], (1.0 / 4.0));
// Convergence loop
for (j = 0; j < 5; j++)
{
k_Ross_Freedman(sqrt(Tl[i - 1] * Tl[i]), sqrt(pl[i - 1] * pl[i]), met, kRoss[i]);
//call k_Rosseland_mod::k_Ross_Valencia(sqrt(Tl[i-1]*T[i]), sqrt(pl[i-1]*pl[i]), met, kRoss[i])
tau[i] = tau[i - 1] + kRoss[i] / grav * (pl[i] - pl[i - 1]);
summy = 0.0;
for (k = 0; k < 3; k++)
{
summy += 3.0 * Beta_V[k] * pow(Tmu, 4.0) / 4.0 * (C[k] + D[k] * exp(-tau[i] / tau_lim) +
E[k] * exp(-gam_V[k] * tau[i]));
}
Tl[i] = 3.0 * pow(Tint, 4.0) / 4.0 * (tau[i] + A + B * exp(-tau[i] / tau_lim)) + summy;
Tl[i] = pow(Tl[i], (1.0 / 4.0));
}
}
}
///////////////////////////////////////////////////////////////
//////////////////////////////////////////////////////////////
// Subroutine that corrects for adiabatic region following Parmentier & Guillot (2015)
void adiabat_correction(int nlay, double* (&Tl),
double* pl, double& prc, double* gradrad, double* gradad) {
// dependcies
//// main_parameters::nlay -> "FMS_RC_para_&_const.cpp"
//// pow -> math
/// log10 -> math
// Input:
//
// Call by reference (Input & Output):
//
// work variables
int i, iRC, iRC1;
// start operations
for (i = 0; i < (nlay - 1); i++)
{
gradrad[i] = (log10(Tl[i]) - log10(Tl[i + 1])) / (log10(pl[i]) - log10(pl[i + 1]));
gradad[i] = ((double)0.32) - ((double)0.10) * Tl[i] / ((double)3000.0);
}
gradrad[nlay - 1] = 0.0;
gradad[nlay - 1] = 0.0;
iRC = nlay - 2;
iRC1 = nlay - 2;
for (i = (nlay - 2); i >= 0; i--)
{
if (iRC1 <= i + 1)
{
if (gradrad[i] > ((double)0.7) * gradad[i])
{
iRC1 = i;
}
if (gradrad[i] > ((double)0.98) * gradad[i])
{
iRC = i;
prc = pl[iRC];
}
}
}
if (iRC < nlay)
{
for (i = iRC; i < nlay - 1; i++)
{
gradad[i] = (double)0.32 - ((double)0.10) * Tl[i] / ((double)3000.0);
if (gradad[i] < 0.0)
{
gradad[i] = 0.0;
}
Tl[i + 1] = Tl[i] * pow((pl[i + 1] / pl[i]), gradad[i]);
}
}
}
///////////////////////////////////////////////////////////////
//////////////////////////////////////////////////////////////
void IC_profile(int iIC, bool corr, int nlay, double p0,
double* pl, double* pe,
double* k_V, double* k_IR,
double Tint, double mu, double Tirr, double grav, double fl,
double* Tl, double& prc, int table_num, double met,
double* tau_hf_e, double* kRoss_hf_e, double* tau_IRl_hf_l,
double* gradrad_hf_l, double* gradad_hf_l) {
// dependcies
//// pow() from math
//// log10() from math
//// atan() from math
//// namespace constants::onedivpi -> "FMS_RC_para_&_const.cpp"
//// main_parameters::nlay -> "FMS_RC_para_&_const.cpp"
//// main_parameters::nlay1 -> "FMS_RC_para_&_const.cpp"
//// k_Rosseland_mod::Bond_Parmentier() -> "k_Rosseland_modcpp"
//// k_Rosseland_mod::k_Ross_Freedman() -> "k_Rosseland_modcpp"
//// k_Rosseland_mod::k_Ross_Valencia() -> "k_Rosseland_modcpp"
//// sqrt() -> math
//// exp() -> math
// Input:
//
// Call by reference (Input & Output):
//
// start operations
switch (iIC)
{
case 4:
Parmentier_IC(nlay, pl, pe, Tint, mu, Tirr, grav, Tl, table_num, met,
tau_hf_e, kRoss_hf_e);
break;
default:
//std::cout << "Invalid IC integer in IC_mod, stopping" << std::endl;
break;
}
if (corr == true)
{
adiabat_correction(nlay, Tl, pl, prc, gradrad_hf_l, gradad_hf_l);
}
else
{
prc = p0;
}
}
#endif // IC_mod | .text
.p2alignl 7, 3214868480
.fill 96, 4, 3214868480
.type __hip_cuid_,@object
.section .bss,"aw",@nobits
.globl __hip_cuid_
__hip_cuid_:
.byte 0
.size __hip_cuid_, 1
.ident "AMD clang version 18.0.0git (https://github.com/RadeonOpenCompute/llvm-project roc-6.3.2 25012 e5bf7e55c91490b07c49d8960fa7983d864936c4)"
.section ".note.GNU-stack","",@progbits
.addrsig
.addrsig_sym __hip_cuid_
.amdgcn_target "amdgcn-amd-amdhsa--gfx1100"
.amdgpu_metadata
---
amdhsa.kernels: []
amdhsa.target: amdgcn-amd-amdhsa--gfx1100
amdhsa.version:
- 1
- 2
...
.end_amdgpu_metadata |
You are a helpful coding assistant specialized in converting from CUDA device assembly to AMD device assembly. | code for sm_80 | .text
.p2alignl 7, 3214868480
.fill 96, 4, 3214868480
.type __hip_cuid_,@object
.section .bss,"aw",@nobits
.globl __hip_cuid_
__hip_cuid_:
.byte 0
.size __hip_cuid_, 1
.ident "AMD clang version 18.0.0git (https://github.com/RadeonOpenCompute/llvm-project roc-6.3.2 25012 e5bf7e55c91490b07c49d8960fa7983d864936c4)"
.section ".note.GNU-stack","",@progbits
.addrsig
.addrsig_sym __hip_cuid_
.amdgcn_target "amdgcn-amd-amdhsa--gfx1100"
.amdgpu_metadata
---
amdhsa.kernels: []
amdhsa.target: amdgcn-amd-amdhsa--gfx1100
amdhsa.version:
- 1
- 2
...
.end_amdgpu_metadata |
You are a helpful coding assistant specialized in converting CUDA source code to HIP/AMD source code. | #include <thrust/host_vector.h>
#include <thrust/device_vector.h>
#include <thrust/generate.h>
#include <thrust/copy.h>
#include <thrust/scan.h>
#include <thrust/sort.h>
#include <math.h>
#include <stdio.h>
#include <stdlib.h>
#include <cstdio>
#include <time.h>
#include <random>
#define RUNS 20
using namespace std;
// Multiplier functor
struct multiplier{
__host__ __device__
double operator()(double x) {
return (x * x);
}
};
int main (int argc, char *argv[]) {
// Basic error check
if (argc != 2) {
printf("Usage: %s N", argv[0]);
exit(1);
}
// Select device
cudaSetDevice(1);
// Get size
int size = 1024 * 1024 * (10 + atoi(argv[1]));
// Initialize vectors
thrust::host_vector<double> h_data(size);
thrust::host_vector<int> h_scan(size);
thrust::host_vector<int> h_sort(size);
//double h_sum, d_sum;
// Timing varibles
//float time_reduce;
//cudaEvent_t start_reduce, end_reduce;
float time_sort, time_scan;
cudaEvent_t start_scan, end_scan;
cudaEvent_t start_sort, end_sort;
//cudaEvent_t start_scan, end_scan;
//cudaEventCreate(&start_reduce);
//cudaEventCreate(&end_reduce);
cudaEventCreate(&start_scan);
cudaEventCreate(&end_scan);
cudaEventCreate(&start_sort);
cudaEventCreate(&end_sort);
// Ready host and device data
srand(time(NULL));
thrust::generate(h_data.begin(), h_data.end(), rand);
//thrust::fill(h_data.begin(), h_data.end(), 1);
// Reduction
/*
thrust::device_vector<double> d_data = h_data;
d_sum = thrust::transform_reduce(d_data.begin(), d_data.end(), multiplier(), (double)0, thrust::plus<double>());
cudaEventRecord(start_reduce, NULL);
for (int i=0; i<RUNS; i++) {
d_sum = thrust::transform_reduce(d_data.begin(), d_data.end(), multiplier(), (double)0, thrust::plus<double>());
}
cudaEventRecord(end_reduce, NULL);
cudaEventSynchronize(end_reduce);
cudaEventElapsedTime(&time_reduce, start_reduce, end_reduce);
h_sum = thrust::transform_reduce(h_data.begin(), h_data.end(), multiplier(), (double)0, thrust::plus<double>());
cout << "Reduction time: " << time_reduce/RUNS << " ms"<< endl;
double time_sec = time_reduce / RUNS / 1e3;
double gflops = 2 * size / time_sec / 1e9;
cout << "N:" << size << "\tGFLOPS: " << gflops << endl;
//cout << "\tHost result: " << h_sum << endl;
//cout << "\tDevice result: " << d_sum << endl;
double residue = (d_sum - h_sum) / h_sum;
cout << "Residue: " << residue << endl;
*/
// Exclusive scan
std::default_random_engine rng( std::rand() );
std::uniform_int_distribution<int> rnd_int;
thrust::generate(h_scan.begin(), h_scan.end(), [&]() { return rnd_int(rng); });
thrust::device_vector<int> d_scan = h_scan;
thrust::exclusive_scan(d_scan.begin(), d_scan.end(), d_scan.begin());
cudaEventRecord(start_scan, NULL);
for (int i=0; i<RUNS; i++)
thrust::exclusive_scan(d_scan.begin(), d_scan.end(), d_scan.begin());
cudaEventRecord(end_scan, NULL);
cudaEventSynchronize(end_scan);
cudaEventElapsedTime(&time_scan, start_scan, end_scan);
//thrust::copy(d_scan.begin(), d_scan.end(), h_scan.begin());
//thrust::exclusive_scan(h_data.begin(), h_data.end(), h_data.begin());
cout << "Scan time: " << time_scan/RUNS << " ms"<< endl;
double time_sec = time_scan / RUNS / 1e3;
cout << "Scan N:" << size << "\tkeys/sec: " << size / time_sec << endl;
/*
if (thrust::equal(h_data.begin(), h_data.end(), h_scan.begin())) {
cout << "Prefix scan time: " << time_scan << endl;
cout << "\tHost result: " << h_data[size-1] << endl;
cout << "\tDevice result: " << h_result[size-1] << endl;
}
else {
printf("Mismatch in scan results\n");
// Only for debugging
for(std::vector<double>::size_type i = 0; i != h_data.size(); i++)
{
cout << h_data[i] << endl;
cout << h_result[i] << endl;
}
}
*/
// Sort
thrust::generate(h_sort.begin(), h_sort.end(), [&]() { return rnd_int(rng); });
thrust::device_vector<int> d_sort = h_sort;
thrust::sort(d_sort.begin(), d_sort.end());
cudaEventRecord(start_sort, NULL);
for (int i=0; i<RUNS; i++)
thrust::sort(d_sort.begin(), d_sort.end());
cudaEventRecord(end_sort, NULL);
cudaEventSynchronize(end_sort);
cudaEventElapsedTime(&time_sort, start_sort, end_sort);
cout << "Sort time: " << time_sort/RUNS << " ms"<< endl;
time_sec = time_sort / RUNS / 1e3;
cout << "Sort N:" << size << "\tkeys/sec: " << size / time_sec << endl;
return 0;
} | #include <hip/hip_runtime.h>
#include <thrust/host_vector.h>
#include <thrust/device_vector.h>
#include <thrust/generate.h>
#include <thrust/copy.h>
#include <thrust/scan.h>
#include <thrust/sort.h>
#include <math.h>
#include <stdio.h>
#include <stdlib.h>
#include <cstdio>
#include <time.h>
#include <random>
#define RUNS 20
using namespace std;
// Multiplier functor
struct multiplier{
__host__ __device__
double operator()(double x) {
return (x * x);
}
};
int main (int argc, char *argv[]) {
// Basic error check
if (argc != 2) {
printf("Usage: %s N", argv[0]);
exit(1);
}
// Select device
hipSetDevice(1);
// Get size
int size = 1024 * 1024 * (10 + atoi(argv[1]));
// Initialize vectors
thrust::host_vector<double> h_data(size);
thrust::host_vector<int> h_scan(size);
thrust::host_vector<int> h_sort(size);
//double h_sum, d_sum;
// Timing varibles
//float time_reduce;
//cudaEvent_t start_reduce, end_reduce;
float time_sort, time_scan;
hipEvent_t start_scan, end_scan;
hipEvent_t start_sort, end_sort;
//cudaEvent_t start_scan, end_scan;
//cudaEventCreate(&start_reduce);
//cudaEventCreate(&end_reduce);
hipEventCreate(&start_scan);
hipEventCreate(&end_scan);
hipEventCreate(&start_sort);
hipEventCreate(&end_sort);
// Ready host and device data
srand(time(NULL));
thrust::generate(h_data.begin(), h_data.end(), rand);
//thrust::fill(h_data.begin(), h_data.end(), 1);
// Reduction
/*
thrust::device_vector<double> d_data = h_data;
d_sum = thrust::transform_reduce(d_data.begin(), d_data.end(), multiplier(), (double)0, thrust::plus<double>());
cudaEventRecord(start_reduce, NULL);
for (int i=0; i<RUNS; i++) {
d_sum = thrust::transform_reduce(d_data.begin(), d_data.end(), multiplier(), (double)0, thrust::plus<double>());
}
cudaEventRecord(end_reduce, NULL);
cudaEventSynchronize(end_reduce);
cudaEventElapsedTime(&time_reduce, start_reduce, end_reduce);
h_sum = thrust::transform_reduce(h_data.begin(), h_data.end(), multiplier(), (double)0, thrust::plus<double>());
cout << "Reduction time: " << time_reduce/RUNS << " ms"<< endl;
double time_sec = time_reduce / RUNS / 1e3;
double gflops = 2 * size / time_sec / 1e9;
cout << "N:" << size << "\tGFLOPS: " << gflops << endl;
//cout << "\tHost result: " << h_sum << endl;
//cout << "\tDevice result: " << d_sum << endl;
double residue = (d_sum - h_sum) / h_sum;
cout << "Residue: " << residue << endl;
*/
// Exclusive scan
std::default_random_engine rng( std::rand() );
std::uniform_int_distribution<int> rnd_int;
thrust::generate(h_scan.begin(), h_scan.end(), [&]() { return rnd_int(rng); });
thrust::device_vector<int> d_scan = h_scan;
thrust::exclusive_scan(d_scan.begin(), d_scan.end(), d_scan.begin());
hipEventRecord(start_scan, NULL);
for (int i=0; i<RUNS; i++)
thrust::exclusive_scan(d_scan.begin(), d_scan.end(), d_scan.begin());
hipEventRecord(end_scan, NULL);
hipEventSynchronize(end_scan);
hipEventElapsedTime(&time_scan, start_scan, end_scan);
//thrust::copy(d_scan.begin(), d_scan.end(), h_scan.begin());
//thrust::exclusive_scan(h_data.begin(), h_data.end(), h_data.begin());
cout << "Scan time: " << time_scan/RUNS << " ms"<< endl;
double time_sec = time_scan / RUNS / 1e3;
cout << "Scan N:" << size << "\tkeys/sec: " << size / time_sec << endl;
/*
if (thrust::equal(h_data.begin(), h_data.end(), h_scan.begin())) {
cout << "Prefix scan time: " << time_scan << endl;
cout << "\tHost result: " << h_data[size-1] << endl;
cout << "\tDevice result: " << h_result[size-1] << endl;
}
else {
printf("Mismatch in scan results\n");
// Only for debugging
for(std::vector<double>::size_type i = 0; i != h_data.size(); i++)
{
cout << h_data[i] << endl;
cout << h_result[i] << endl;
}
}
*/
// Sort
thrust::generate(h_sort.begin(), h_sort.end(), [&]() { return rnd_int(rng); });
thrust::device_vector<int> d_sort = h_sort;
thrust::sort(d_sort.begin(), d_sort.end());
hipEventRecord(start_sort, NULL);
for (int i=0; i<RUNS; i++)
thrust::sort(d_sort.begin(), d_sort.end());
hipEventRecord(end_sort, NULL);
hipEventSynchronize(end_sort);
hipEventElapsedTime(&time_sort, start_sort, end_sort);
cout << "Sort time: " << time_sort/RUNS << " ms"<< endl;
time_sec = time_sort / RUNS / 1e3;
cout << "Sort N:" << size << "\tkeys/sec: " << size / time_sec << endl;
return 0;
} |
You are a helpful coding assistant specialized in converting CUDA source code to CUDA device assembly. | #include <stdio.h>
#include <stdlib.h>
#include <cuda.h>
#include <cuda_runtime.h>
using namespace std;
__global__ void multi(int * dA, int *dB, int * dC, int rowWidth, int colWidth){
//int id = threadIdx.x + blockIdx.x * blockDim.x;
int value = 0;
for (int i = 0; i < blockDim.x; i++)
value += dA[blockDim.x * blockIdx.x + i] * dB[i];
dC[blockIdx.x] = value;
}
int* read_array(const char* filename, int len) {
int *x = (int*) malloc(len * sizeof(int));
FILE *fp = fopen(filename, "r");
for (int i = 0; i < len; i++) {
fscanf(fp, "%d", &x[i]);
}
fclose(fp);
return x;
}
int main(int argc, char *argv[]) {
if (argc != 1) {
printf("Invalid argument Usage: ./problem1");
return -1;
}
const int rowWidth=32;
const int colWidth=16;
int *hA = read_array("inputA.inp",rowWidth*colWidth );
int *hB = read_array("inputB.inp", rowWidth);
int *hC = (int*) malloc(colWidth * sizeof(int));
int *refC = (int*) malloc (colWidth * sizeof(int));
// TODO - allocate host memory for refC (you have to figure out how much)
// The skeleton currently segfaults because refC is accessed without allocation
// TODO do a reference host implementation (Ch) here. ie populate answer in refC
for (int i = 0; i < colWidth; i++)
refC[i] = 0;
for (int i = 0; i < colWidth; i++)
for (int j = 0; j < rowWidth; j++)
{
refC[i] += hA[ rowWidth * i + j] * hB[j];
}
int *dA, *dB, *dC;
// TODO allocate device memory for dA,dB and dC
cudaMalloc( (void**) &dA, sizeof(int) * rowWidth * colWidth);
cudaMalloc( (void**) &dB, sizeof(int) * rowWidth);
cudaMalloc((void**) &dC, sizeof(int) * colWidth);
// TODO copy data from host to GPU
cudaMemcpy (dA, hA, sizeof(int) * rowWidth * colWidth, cudaMemcpyHostToDevice);
cudaMemcpy (dB, hB, sizeof(int) * rowWidth , cudaMemcpyHostToDevice);
cudaMemcpy (dC, hC, sizeof(int) * colWidth, cudaMemcpyHostToDevice);
// TODO call your kernel
multi <<< colWidth ,rowWidth>>> (dA, dB,dC, rowWidth, colWidth);
// TODO copyback results
cudaMemcpy(hC, dC, sizeof(int) * colWidth, cudaMemcpyDeviceToHost);
int Error=0;
for(int i=0;i<colWidth;i++)
Error+=sqrt((hC[i]-refC[i])*(hC[i]-refC[i]));
printf("%d\n%d",Error,hC[colWidth-1]);
free(refC);
free(hB);
free(hA);
return 0;
} | code for sm_80
Function : _Z5multiPiS_S_ii
.headerflags @"EF_CUDA_TEXMODE_UNIFIED EF_CUDA_64BIT_ADDRESS EF_CUDA_SM80 EF_CUDA_VIRTUAL_SM(EF_CUDA_SM80)"
/*0000*/ IMAD.MOV.U32 R1, RZ, RZ, c[0x0][0x28] ; /* 0x00000a00ff017624 */
/* 0x000fe400078e00ff */
/*0010*/ S2R R4, SR_CTAID.X ; /* 0x0000000000047919 */
/* 0x000e220000002500 */
/*0020*/ ISETP.NE.AND P0, PT, RZ, c[0x0][0x0], PT ; /* 0x00000000ff007a0c */
/* 0x000fe20003f05270 */
/*0030*/ ULDC.64 UR4, c[0x0][0x118] ; /* 0x0000460000047ab9 */
/* 0x000fe20000000a00 */
/*0040*/ IMAD.MOV.U32 R0, RZ, RZ, RZ ; /* 0x000000ffff007224 */
/* 0x000fd600078e00ff */
/*0050*/ @!P0 BRA 0x410 ; /* 0x000003b000008947 */
/* 0x000fea0003800000 */
/*0060*/ MOV R3, c[0x0][0x0] ; /* 0x0000000000037a02 */
/* 0x000fe20000000f00 */
/*0070*/ IMAD.MOV.U32 R9, RZ, RZ, RZ ; /* 0x000000ffff097224 */
/* 0x000fc600078e00ff */
/*0080*/ IADD3 R0, R3.reuse, -0x1, RZ ; /* 0xffffffff03007810 */
/* 0x040fe40007ffe0ff */
/*0090*/ LOP3.LUT R5, R3, 0x3, RZ, 0xc0, !PT ; /* 0x0000000303057812 */
/* 0x000fe400078ec0ff */
/*00a0*/ ISETP.GE.U32.AND P1, PT, R0, 0x3, PT ; /* 0x000000030000780c */
/* 0x000fe20003f26070 */
/*00b0*/ HFMA2.MMA R0, -RZ, RZ, 0, 0 ; /* 0x00000000ff007435 */
/* 0x000fe200000001ff */
/*00c0*/ ISETP.NE.AND P0, PT, R5, RZ, PT ; /* 0x000000ff0500720c */
/* 0x000fd60003f05270 */
/*00d0*/ @!P1 BRA 0x300 ; /* 0x0000022000009947 */
/* 0x000fea0003800000 */
/*00e0*/ IMAD R8, R4, R3, 0x3 ; /* 0x0000000304087424 */
/* 0x001fe200078e0203 */
/*00f0*/ IADD3 R10, R5, -c[0x0][0x0], RZ ; /* 0x80000000050a7a10 */
/* 0x000fe20007ffe0ff */
/*0100*/ IMAD.MOV.U32 R9, RZ, RZ, RZ ; /* 0x000000ffff097224 */
/* 0x000fe200078e00ff */
/*0110*/ MOV R17, c[0x0][0x168] ; /* 0x00005a0000117a02 */
/* 0x000fe20000000f00 */
/*0120*/ IMAD.MOV.U32 R18, RZ, RZ, c[0x0][0x16c] ; /* 0x00005b00ff127624 */
/* 0x000fe400078e00ff */
/*0130*/ IADD3 R2, R8.reuse, -0x3, RZ ; /* 0xfffffffd08027810 */
/* 0x040fe40007ffe0ff */
/*0140*/ MOV R7, 0x4 ; /* 0x0000000400077802 */
/* 0x000fe40000000f00 */
/*0150*/ IADD3 R12, R8.reuse, -0x2, RZ ; /* 0xfffffffe080c7810 */
/* 0x040fe40007ffe0ff */
/*0160*/ IADD3 R14, R8, -0x1, RZ ; /* 0xffffffff080e7810 */
/* 0x000fe20007ffe0ff */
/*0170*/ IMAD.WIDE.U32 R2, R2, R7, c[0x0][0x160] ; /* 0x0000580002027625 */
/* 0x000fc800078e0007 */
/*0180*/ IMAD.WIDE.U32 R12, R12, R7.reuse, c[0x0][0x160] ; /* 0x000058000c0c7625 */
/* 0x080fe200078e0007 */
/*0190*/ LDG.E R16, [R2.64] ; /* 0x0000000402107981 */
/* 0x0000a6000c1e1900 */
/*01a0*/ IMAD.WIDE.U32 R14, R14, R7.reuse, c[0x0][0x160] ; /* 0x000058000e0e7625 */
/* 0x080fe400078e0007 */
/*01b0*/ LDG.E R12, [R12.64] ; /* 0x000000040c0c7981 */
/* 0x000ee4000c1e1900 */
/*01c0*/ IMAD.MOV.U32 R2, RZ, RZ, R17 ; /* 0x000000ffff027224 */
/* 0x001fe200078e0011 */
/*01d0*/ MOV R3, R18 ; /* 0x0000001200037202 */
/* 0x000fe20000000f00 */
/*01e0*/ IMAD.WIDE.U32 R6, R8, R7, c[0x0][0x160] ; /* 0x0000580008067625 */
/* 0x000fe200078e0007 */
/*01f0*/ LDG.E R14, [R14.64] ; /* 0x000000040e0e7981 */
/* 0x000f28000c1e1900 */
/*0200*/ LDG.E R11, [R2.64] ; /* 0x00000004020b7981 */
/* 0x000ea8000c1e1900 */
/*0210*/ LDG.E R18, [R2.64+0x4] ; /* 0x0000040402127981 */
/* 0x000ee8000c1e1900 */
/*0220*/ LDG.E R20, [R2.64+0x8] ; /* 0x0000080402147981 */
/* 0x000f28000c1e1900 */
/*0230*/ LDG.E R6, [R6.64] ; /* 0x0000000406067981 */
/* 0x000f68000c1e1900 */
/*0240*/ LDG.E R22, [R2.64+0xc] ; /* 0x00000c0402167981 */
/* 0x000f62000c1e1900 */
/*0250*/ IADD3 R9, R9, 0x4, RZ ; /* 0x0000000409097810 */
/* 0x000fc40007ffe0ff */
/*0260*/ IADD3 R17, P2, R2, 0x10, RZ ; /* 0x0000001002117810 */
/* 0x000fe40007f5e0ff */
/*0270*/ IADD3 R8, R8, 0x4, RZ ; /* 0x0000000408087810 */
/* 0x000fe20007ffe0ff */
/*0280*/ IMAD R11, R11, R16, R0 ; /* 0x000000100b0b7224 */
/* 0x004fe400078e0200 */
/*0290*/ IMAD.IADD R0, R10, 0x1, R9 ; /* 0x000000010a007824 */
/* 0x000fca00078e0209 */
/*02a0*/ ISETP.NE.AND P1, PT, R0, RZ, PT ; /* 0x000000ff0000720c */
/* 0x000fe20003f25270 */
/*02b0*/ IMAD R11, R18, R12, R11 ; /* 0x0000000c120b7224 */
/* 0x008fc800078e020b */
/*02c0*/ IMAD R11, R20, R14, R11 ; /* 0x0000000e140b7224 */
/* 0x010fe200078e020b */
/*02d0*/ IADD3.X R18, RZ, R3, RZ, P2, !PT ; /* 0x00000003ff127210 */
/* 0x000fc600017fe4ff */
/*02e0*/ IMAD R0, R22, R6, R11 ; /* 0x0000000616007224 */
/* 0x020fc800078e020b */
/*02f0*/ @P1 BRA 0x130 ; /* 0xfffffe3000001947 */
/* 0x000fea000383ffff */
/*0300*/ @!P0 BRA 0x410 ; /* 0x0000010000008947 */
/* 0x000fea0003800000 */
/*0310*/ IMAD.MOV.U32 R8, RZ, RZ, 0x4 ; /* 0x00000004ff087424 */
/* 0x000fc800078e00ff */
/*0320*/ IMAD.WIDE R2, R9, R8, c[0x0][0x168] ; /* 0x00005a0009027625 */
/* 0x000fc800078e0208 */
/*0330*/ IMAD R9, R4, c[0x0][0x0], R9 ; /* 0x0000000004097a24 */
/* 0x001fe200078e0209 */
/*0340*/ MOV R6, R2 ; /* 0x0000000200067202 */
/* 0x000fe20000000f00 */
/*0350*/ IMAD.MOV.U32 R11, RZ, RZ, R3 ; /* 0x000000ffff0b7224 */
/* 0x000fc800078e0003 */
/*0360*/ IMAD.WIDE.U32 R2, R9, R8, c[0x0][0x160] ; /* 0x0000580009027625 */
/* 0x000fe200078e0008 */
/*0370*/ MOV R7, R11 ; /* 0x0000000b00077202 */
/* 0x000fca0000000f00 */
/*0380*/ LDG.E R2, [R2.64] ; /* 0x0000000402027981 */
/* 0x000ea8000c1e1900 */
/*0390*/ LDG.E R7, [R6.64] ; /* 0x0000000406077981 */
/* 0x0000a2000c1e1900 */
/*03a0*/ IADD3 R5, R5, -0x1, RZ ; /* 0xffffffff05057810 */
/* 0x000fe40007ffe0ff */
/*03b0*/ IADD3 R9, R9, 0x1, RZ ; /* 0x0000000109097810 */
/* 0x000fe40007ffe0ff */
/*03c0*/ ISETP.NE.AND P0, PT, R5, RZ, PT ; /* 0x000000ff0500720c */
/* 0x000fe40003f05270 */
/*03d0*/ IADD3 R6, P1, R6, 0x4, RZ ; /* 0x0000000406067810 */
/* 0x001fca0007f3e0ff */
/*03e0*/ IMAD.X R11, RZ, RZ, R11, P1 ; /* 0x000000ffff0b7224 */
/* 0x000fe400008e060b */
/*03f0*/ IMAD R0, R7, R2, R0 ; /* 0x0000000207007224 */
/* 0x004fc800078e0200 */
/*0400*/ @P0 BRA 0x360 ; /* 0xffffff5000000947 */
/* 0x000fea000383ffff */
/*0410*/ HFMA2.MMA R5, -RZ, RZ, 0, 2.384185791015625e-07 ; /* 0x00000004ff057435 */
/* 0x000fd400000001ff */
/*0420*/ IMAD.WIDE.U32 R4, R4, R5, c[0x0][0x170] ; /* 0x00005c0004047625 */
/* 0x001fca00078e0005 */
/*0430*/ STG.E [R4.64], R0 ; /* 0x0000000004007986 */
/* 0x000fe2000c101904 */
/*0440*/ EXIT ; /* 0x000000000000794d */
/* 0x000fea0003800000 */
/*0450*/ BRA 0x450; /* 0xfffffff000007947 */
/* 0x000fc0000383ffff */
/*0460*/ NOP; /* 0x0000000000007918 */
/* 0x000fc00000000000 */
/*0470*/ NOP; /* 0x0000000000007918 */
/* 0x000fc00000000000 */
/*0480*/ NOP; /* 0x0000000000007918 */
/* 0x000fc00000000000 */
/*0490*/ NOP; /* 0x0000000000007918 */
/* 0x000fc00000000000 */
/*04a0*/ NOP; /* 0x0000000000007918 */
/* 0x000fc00000000000 */
/*04b0*/ NOP; /* 0x0000000000007918 */
/* 0x000fc00000000000 */
/*04c0*/ NOP; /* 0x0000000000007918 */
/* 0x000fc00000000000 */
/*04d0*/ NOP; /* 0x0000000000007918 */
/* 0x000fc00000000000 */
/*04e0*/ NOP; /* 0x0000000000007918 */
/* 0x000fc00000000000 */
/*04f0*/ NOP; /* 0x0000000000007918 */
/* 0x000fc00000000000 */
.......... |
You are a helpful coding assistant specialized in converting CUDA source code to CUDA host assembly. | #include <stdio.h>
#include <stdlib.h>
#include <cuda.h>
#include <cuda_runtime.h>
using namespace std;
__global__ void multi(int * dA, int *dB, int * dC, int rowWidth, int colWidth){
//int id = threadIdx.x + blockIdx.x * blockDim.x;
int value = 0;
for (int i = 0; i < blockDim.x; i++)
value += dA[blockDim.x * blockIdx.x + i] * dB[i];
dC[blockIdx.x] = value;
}
int* read_array(const char* filename, int len) {
int *x = (int*) malloc(len * sizeof(int));
FILE *fp = fopen(filename, "r");
for (int i = 0; i < len; i++) {
fscanf(fp, "%d", &x[i]);
}
fclose(fp);
return x;
}
int main(int argc, char *argv[]) {
if (argc != 1) {
printf("Invalid argument Usage: ./problem1");
return -1;
}
const int rowWidth=32;
const int colWidth=16;
int *hA = read_array("inputA.inp",rowWidth*colWidth );
int *hB = read_array("inputB.inp", rowWidth);
int *hC = (int*) malloc(colWidth * sizeof(int));
int *refC = (int*) malloc (colWidth * sizeof(int));
// TODO - allocate host memory for refC (you have to figure out how much)
// The skeleton currently segfaults because refC is accessed without allocation
// TODO do a reference host implementation (Ch) here. ie populate answer in refC
for (int i = 0; i < colWidth; i++)
refC[i] = 0;
for (int i = 0; i < colWidth; i++)
for (int j = 0; j < rowWidth; j++)
{
refC[i] += hA[ rowWidth * i + j] * hB[j];
}
int *dA, *dB, *dC;
// TODO allocate device memory for dA,dB and dC
cudaMalloc( (void**) &dA, sizeof(int) * rowWidth * colWidth);
cudaMalloc( (void**) &dB, sizeof(int) * rowWidth);
cudaMalloc((void**) &dC, sizeof(int) * colWidth);
// TODO copy data from host to GPU
cudaMemcpy (dA, hA, sizeof(int) * rowWidth * colWidth, cudaMemcpyHostToDevice);
cudaMemcpy (dB, hB, sizeof(int) * rowWidth , cudaMemcpyHostToDevice);
cudaMemcpy (dC, hC, sizeof(int) * colWidth, cudaMemcpyHostToDevice);
// TODO call your kernel
multi <<< colWidth ,rowWidth>>> (dA, dB,dC, rowWidth, colWidth);
// TODO copyback results
cudaMemcpy(hC, dC, sizeof(int) * colWidth, cudaMemcpyDeviceToHost);
int Error=0;
for(int i=0;i<colWidth;i++)
Error+=sqrt((hC[i]-refC[i])*(hC[i]-refC[i]));
printf("%d\n%d",Error,hC[colWidth-1]);
free(refC);
free(hB);
free(hA);
return 0;
} | .file "tmpxft_0007d8da_00000000-6_problem1.cudafe1.cpp"
.text
#APP
#NO_APP
.type _ZL26__cudaUnregisterBinaryUtilv, @function
_ZL26__cudaUnregisterBinaryUtilv:
.LFB2061:
.cfi_startproc
endbr64
subq $8, %rsp
.cfi_def_cfa_offset 16
movq _ZL20__cudaFatCubinHandle(%rip), %rdi
call __cudaUnregisterFatBinary@PLT
addq $8, %rsp
.cfi_def_cfa_offset 8
ret
.cfi_endproc
.LFE2061:
.size _ZL26__cudaUnregisterBinaryUtilv, .-_ZL26__cudaUnregisterBinaryUtilv
.section .rodata.str1.1,"aMS",@progbits,1
.LC0:
.string "r"
.LC1:
.string "%d"
.text
.globl _Z10read_arrayPKci
.type _Z10read_arrayPKci, @function
_Z10read_arrayPKci:
.LFB2057:
.cfi_startproc
endbr64
pushq %r14
.cfi_def_cfa_offset 16
.cfi_offset 14, -16
pushq %r13
.cfi_def_cfa_offset 24
.cfi_offset 13, -24
pushq %r12
.cfi_def_cfa_offset 32
.cfi_offset 12, -32
pushq %rbp
.cfi_def_cfa_offset 40
.cfi_offset 6, -40
pushq %rbx
.cfi_def_cfa_offset 48
.cfi_offset 3, -48
movq %rdi, %r12
movl %esi, %ebx
movslq %esi, %rbp
salq $2, %rbp
movq %rbp, %rdi
call malloc@PLT
movq %rax, %r14
leaq .LC0(%rip), %rsi
movq %r12, %rdi
call fopen@PLT
movq %rax, %r12
testl %ebx, %ebx
jle .L4
movq %r14, %rbx
addq %r14, %rbp
leaq .LC1(%rip), %r13
.L5:
movq %rbx, %rdx
movq %r13, %rsi
movq %r12, %rdi
movl $0, %eax
call __isoc23_fscanf@PLT
addq $4, %rbx
cmpq %rbp, %rbx
jne .L5
.L4:
movq %r12, %rdi
call fclose@PLT
movq %r14, %rax
popq %rbx
.cfi_def_cfa_offset 40
popq %rbp
.cfi_def_cfa_offset 32
popq %r12
.cfi_def_cfa_offset 24
popq %r13
.cfi_def_cfa_offset 16
popq %r14
.cfi_def_cfa_offset 8
ret
.cfi_endproc
.LFE2057:
.size _Z10read_arrayPKci, .-_Z10read_arrayPKci
.globl _Z30__device_stub__Z5multiPiS_S_iiPiS_S_ii
.type _Z30__device_stub__Z5multiPiS_S_iiPiS_S_ii, @function
_Z30__device_stub__Z5multiPiS_S_iiPiS_S_ii:
.LFB2083:
.cfi_startproc
endbr64
subq $152, %rsp
.cfi_def_cfa_offset 160
movq %rdi, 24(%rsp)
movq %rsi, 16(%rsp)
movq %rdx, 8(%rsp)
movl %ecx, 4(%rsp)
movl %r8d, (%rsp)
movq %fs:40, %rax
movq %rax, 136(%rsp)
xorl %eax, %eax
leaq 24(%rsp), %rax
movq %rax, 96(%rsp)
leaq 16(%rsp), %rax
movq %rax, 104(%rsp)
leaq 8(%rsp), %rax
movq %rax, 112(%rsp)
leaq 4(%rsp), %rax
movq %rax, 120(%rsp)
movq %rsp, %rax
movq %rax, 128(%rsp)
movl $1, 48(%rsp)
movl $1, 52(%rsp)
movl $1, 56(%rsp)
movl $1, 60(%rsp)
movl $1, 64(%rsp)
movl $1, 68(%rsp)
leaq 40(%rsp), %rcx
leaq 32(%rsp), %rdx
leaq 60(%rsp), %rsi
leaq 48(%rsp), %rdi
call __cudaPopCallConfiguration@PLT
testl %eax, %eax
je .L12
.L8:
movq 136(%rsp), %rax
subq %fs:40, %rax
jne .L13
addq $152, %rsp
.cfi_remember_state
.cfi_def_cfa_offset 8
ret
.L12:
.cfi_restore_state
pushq 40(%rsp)
.cfi_def_cfa_offset 168
pushq 40(%rsp)
.cfi_def_cfa_offset 176
leaq 112(%rsp), %r9
movq 76(%rsp), %rcx
movl 84(%rsp), %r8d
movq 64(%rsp), %rsi
movl 72(%rsp), %edx
leaq _Z5multiPiS_S_ii(%rip), %rdi
call cudaLaunchKernel@PLT
addq $16, %rsp
.cfi_def_cfa_offset 160
jmp .L8
.L13:
call __stack_chk_fail@PLT
.cfi_endproc
.LFE2083:
.size _Z30__device_stub__Z5multiPiS_S_iiPiS_S_ii, .-_Z30__device_stub__Z5multiPiS_S_iiPiS_S_ii
.globl _Z5multiPiS_S_ii
.type _Z5multiPiS_S_ii, @function
_Z5multiPiS_S_ii:
.LFB2084:
.cfi_startproc
endbr64
subq $8, %rsp
.cfi_def_cfa_offset 16
call _Z30__device_stub__Z5multiPiS_S_iiPiS_S_ii
addq $8, %rsp
.cfi_def_cfa_offset 8
ret
.cfi_endproc
.LFE2084:
.size _Z5multiPiS_S_ii, .-_Z5multiPiS_S_ii
.section .rodata.str1.8,"aMS",@progbits,1
.align 8
.LC2:
.string "Invalid argument Usage: ./problem1"
.section .rodata.str1.1
.LC3:
.string "inputA.inp"
.LC4:
.string "inputB.inp"
.LC6:
.string "%d\n%d"
.text
.globl main
.type main, @function
main:
.LFB2058:
.cfi_startproc
endbr64
pushq %r15
.cfi_def_cfa_offset 16
.cfi_offset 15, -16
pushq %r14
.cfi_def_cfa_offset 24
.cfi_offset 14, -24
pushq %r13
.cfi_def_cfa_offset 32
.cfi_offset 13, -32
pushq %r12
.cfi_def_cfa_offset 40
.cfi_offset 12, -40
pushq %rbp
.cfi_def_cfa_offset 48
.cfi_offset 6, -48
pushq %rbx
.cfi_def_cfa_offset 56
.cfi_offset 3, -56
subq $72, %rsp
.cfi_def_cfa_offset 128
movq %fs:40, %rax
movq %rax, 56(%rsp)
xorl %eax, %eax
cmpl $1, %edi
jne .L35
movl $512, %esi
leaq .LC3(%rip), %rdi
call _Z10read_arrayPKci
movq %rax, %r15
movl $32, %esi
leaq .LC4(%rip), %rdi
call _Z10read_arrayPKci
movq %rax, %rbx
movl $64, %edi
call malloc@PLT
movq %rax, %r14
movl $64, %edi
call malloc@PLT
movq %rax, %r13
movq %rax, %rdi
leaq 64(%rax), %rdx
.L19:
movl $0, (%rax)
addq $4, %rax
cmpq %rdx, %rax
jne .L19
movq %r15, %rsi
movl $0, %r8d
.L20:
movq %rdi, %r9
movl (%rdi), %ecx
movl $0, %eax
.L21:
movl (%rsi,%rax), %edx
imull (%rbx,%rax), %edx
addl %edx, %ecx
addq $4, %rax
cmpq $128, %rax
jne .L21
movl %ecx, (%r9)
addq $4, %rdi
addl $32, %r8d
subq $-128, %rsi
cmpl $512, %r8d
jne .L20
leaq 8(%rsp), %rdi
movl $2048, %esi
call cudaMalloc@PLT
leaq 16(%rsp), %rdi
movl $128, %esi
call cudaMalloc@PLT
leaq 24(%rsp), %rdi
movl $64, %esi
call cudaMalloc@PLT
movl $1, %ecx
movl $2048, %edx
movq %r15, %rsi
movq 8(%rsp), %rdi
call cudaMemcpy@PLT
movl $1, %ecx
movl $128, %edx
movq %rbx, %rsi
movq 16(%rsp), %rdi
call cudaMemcpy@PLT
movl $1, %ecx
movl $64, %edx
movq %r14, %rsi
movq 24(%rsp), %rdi
call cudaMemcpy@PLT
movl $32, 44(%rsp)
movl $1, 48(%rsp)
movl $16, 32(%rsp)
movl $1, 36(%rsp)
movl $0, %r9d
movl $0, %r8d
movq 44(%rsp), %rdx
movl $1, %ecx
movq 32(%rsp), %rdi
movl $1, %esi
call __cudaPushCallConfiguration@PLT
testl %eax, %eax
je .L36
.L23:
movl $2, %ecx
movl $64, %edx
movq 24(%rsp), %rsi
movq %r14, %rdi
call cudaMemcpy@PLT
movl $0, %ebp
movl $0, %r12d
.L27:
movl (%r14,%rbp), %eax
subl 0(%r13,%rbp), %eax
imull %eax, %eax
pxor %xmm0, %xmm0
cvtsi2sdl %eax, %xmm0
pxor %xmm2, %xmm2
ucomisd %xmm0, %xmm2
ja .L33
sqrtsd %xmm0, %xmm0
.L26:
pxor %xmm1, %xmm1
cvtsi2sdl %r12d, %xmm1
addsd %xmm1, %xmm0
cvttsd2sil %xmm0, %r12d
addq $4, %rbp
cmpq $64, %rbp
jne .L27
movl 60(%r14), %ecx
movl %r12d, %edx
leaq .LC6(%rip), %rsi
movl $2, %edi
movl $0, %eax
call __printf_chk@PLT
movq %r13, %rdi
call free@PLT
movq %rbx, %rdi
call free@PLT
movq %r15, %rdi
call free@PLT
movl $0, %eax
.L16:
movq 56(%rsp), %rdx
subq %fs:40, %rdx
jne .L37
addq $72, %rsp
.cfi_remember_state
.cfi_def_cfa_offset 56
popq %rbx
.cfi_def_cfa_offset 48
popq %rbp
.cfi_def_cfa_offset 40
popq %r12
.cfi_def_cfa_offset 32
popq %r13
.cfi_def_cfa_offset 24
popq %r14
.cfi_def_cfa_offset 16
popq %r15
.cfi_def_cfa_offset 8
ret
.L35:
.cfi_restore_state
leaq .LC2(%rip), %rsi
movl $2, %edi
call __printf_chk@PLT
movl $-1, %eax
jmp .L16
.L36:
movl $16, %r8d
movl $32, %ecx
movq 24(%rsp), %rdx
movq 16(%rsp), %rsi
movq 8(%rsp), %rdi
call _Z30__device_stub__Z5multiPiS_S_iiPiS_S_ii
jmp .L23
.L33:
call sqrt@PLT
jmp .L26
.L37:
call __stack_chk_fail@PLT
.cfi_endproc
.LFE2058:
.size main, .-main
.section .rodata.str1.1
.LC7:
.string "_Z5multiPiS_S_ii"
.text
.type _ZL24__sti____cudaRegisterAllv, @function
_ZL24__sti____cudaRegisterAllv:
.LFB2086:
.cfi_startproc
endbr64
subq $8, %rsp
.cfi_def_cfa_offset 16
leaq _ZL15__fatDeviceText(%rip), %rdi
call __cudaRegisterFatBinary@PLT
movq %rax, %rdi
movq %rax, _ZL20__cudaFatCubinHandle(%rip)
pushq $0
.cfi_def_cfa_offset 24
pushq $0
.cfi_def_cfa_offset 32
pushq $0
.cfi_def_cfa_offset 40
pushq $0
.cfi_def_cfa_offset 48
movl $0, %r9d
movl $-1, %r8d
leaq .LC7(%rip), %rdx
movq %rdx, %rcx
leaq _Z5multiPiS_S_ii(%rip), %rsi
call __cudaRegisterFunction@PLT
addq $32, %rsp
.cfi_def_cfa_offset 16
movq _ZL20__cudaFatCubinHandle(%rip), %rdi
call __cudaRegisterFatBinaryEnd@PLT
leaq _ZL26__cudaUnregisterBinaryUtilv(%rip), %rdi
call atexit@PLT
addq $8, %rsp
.cfi_def_cfa_offset 8
ret
.cfi_endproc
.LFE2086:
.size _ZL24__sti____cudaRegisterAllv, .-_ZL24__sti____cudaRegisterAllv
.section .init_array,"aw"
.align 8
.quad _ZL24__sti____cudaRegisterAllv
.section .nvFatBinSegment,"aw"
.align 8
.type _ZL15__fatDeviceText, @object
.size _ZL15__fatDeviceText, 24
_ZL15__fatDeviceText:
.long 1180844977
.long 1
.quad fatbinData
.quad 0
.local _ZL20__cudaFatCubinHandle
.comm _ZL20__cudaFatCubinHandle,8,8
.ident "GCC: (Ubuntu 13.3.0-6ubuntu2~24.04) 13.3.0"
.section .note.GNU-stack,"",@progbits
.section .note.gnu.property,"a"
.align 8
.long 1f - 0f
.long 4f - 1f
.long 5
0:
.string "GNU"
1:
.align 8
.long 0xc0000002
.long 3f - 2f
2:
.long 0x3
3:
.align 8
4: |
You are a helpful coding assistant specialized in converting CUDA source code to HIP/AMD source code. | #include <stdio.h>
#include <stdlib.h>
#include <cuda.h>
#include <cuda_runtime.h>
using namespace std;
__global__ void multi(int * dA, int *dB, int * dC, int rowWidth, int colWidth){
//int id = threadIdx.x + blockIdx.x * blockDim.x;
int value = 0;
for (int i = 0; i < blockDim.x; i++)
value += dA[blockDim.x * blockIdx.x + i] * dB[i];
dC[blockIdx.x] = value;
}
int* read_array(const char* filename, int len) {
int *x = (int*) malloc(len * sizeof(int));
FILE *fp = fopen(filename, "r");
for (int i = 0; i < len; i++) {
fscanf(fp, "%d", &x[i]);
}
fclose(fp);
return x;
}
int main(int argc, char *argv[]) {
if (argc != 1) {
printf("Invalid argument Usage: ./problem1");
return -1;
}
const int rowWidth=32;
const int colWidth=16;
int *hA = read_array("inputA.inp",rowWidth*colWidth );
int *hB = read_array("inputB.inp", rowWidth);
int *hC = (int*) malloc(colWidth * sizeof(int));
int *refC = (int*) malloc (colWidth * sizeof(int));
// TODO - allocate host memory for refC (you have to figure out how much)
// The skeleton currently segfaults because refC is accessed without allocation
// TODO do a reference host implementation (Ch) here. ie populate answer in refC
for (int i = 0; i < colWidth; i++)
refC[i] = 0;
for (int i = 0; i < colWidth; i++)
for (int j = 0; j < rowWidth; j++)
{
refC[i] += hA[ rowWidth * i + j] * hB[j];
}
int *dA, *dB, *dC;
// TODO allocate device memory for dA,dB and dC
cudaMalloc( (void**) &dA, sizeof(int) * rowWidth * colWidth);
cudaMalloc( (void**) &dB, sizeof(int) * rowWidth);
cudaMalloc((void**) &dC, sizeof(int) * colWidth);
// TODO copy data from host to GPU
cudaMemcpy (dA, hA, sizeof(int) * rowWidth * colWidth, cudaMemcpyHostToDevice);
cudaMemcpy (dB, hB, sizeof(int) * rowWidth , cudaMemcpyHostToDevice);
cudaMemcpy (dC, hC, sizeof(int) * colWidth, cudaMemcpyHostToDevice);
// TODO call your kernel
multi <<< colWidth ,rowWidth>>> (dA, dB,dC, rowWidth, colWidth);
// TODO copyback results
cudaMemcpy(hC, dC, sizeof(int) * colWidth, cudaMemcpyDeviceToHost);
int Error=0;
for(int i=0;i<colWidth;i++)
Error+=sqrt((hC[i]-refC[i])*(hC[i]-refC[i]));
printf("%d\n%d",Error,hC[colWidth-1]);
free(refC);
free(hB);
free(hA);
return 0;
} | #include <stdio.h>
#include <stdlib.h>
#include <hip/hip_runtime.h>
using namespace std;
__global__ void multi(int * dA, int *dB, int * dC, int rowWidth, int colWidth){
//int id = threadIdx.x + blockIdx.x * blockDim.x;
int value = 0;
for (int i = 0; i < blockDim.x; i++)
value += dA[blockDim.x * blockIdx.x + i] * dB[i];
dC[blockIdx.x] = value;
}
int* read_array(const char* filename, int len) {
int *x = (int*) malloc(len * sizeof(int));
FILE *fp = fopen(filename, "r");
for (int i = 0; i < len; i++) {
fscanf(fp, "%d", &x[i]);
}
fclose(fp);
return x;
}
int main(int argc, char *argv[]) {
if (argc != 1) {
printf("Invalid argument Usage: ./problem1");
return -1;
}
const int rowWidth=32;
const int colWidth=16;
int *hA = read_array("inputA.inp",rowWidth*colWidth );
int *hB = read_array("inputB.inp", rowWidth);
int *hC = (int*) malloc(colWidth * sizeof(int));
int *refC = (int*) malloc (colWidth * sizeof(int));
// TODO - allocate host memory for refC (you have to figure out how much)
// The skeleton currently segfaults because refC is accessed without allocation
// TODO do a reference host implementation (Ch) here. ie populate answer in refC
for (int i = 0; i < colWidth; i++)
refC[i] = 0;
for (int i = 0; i < colWidth; i++)
for (int j = 0; j < rowWidth; j++)
{
refC[i] += hA[ rowWidth * i + j] * hB[j];
}
int *dA, *dB, *dC;
// TODO allocate device memory for dA,dB and dC
hipMalloc( (void**) &dA, sizeof(int) * rowWidth * colWidth);
hipMalloc( (void**) &dB, sizeof(int) * rowWidth);
hipMalloc((void**) &dC, sizeof(int) * colWidth);
// TODO copy data from host to GPU
hipMemcpy (dA, hA, sizeof(int) * rowWidth * colWidth, hipMemcpyHostToDevice);
hipMemcpy (dB, hB, sizeof(int) * rowWidth , hipMemcpyHostToDevice);
hipMemcpy (dC, hC, sizeof(int) * colWidth, hipMemcpyHostToDevice);
// TODO call your kernel
multi <<< colWidth ,rowWidth>>> (dA, dB,dC, rowWidth, colWidth);
// TODO copyback results
hipMemcpy(hC, dC, sizeof(int) * colWidth, hipMemcpyDeviceToHost);
int Error=0;
for(int i=0;i<colWidth;i++)
Error+=sqrt((hC[i]-refC[i])*(hC[i]-refC[i]));
printf("%d\n%d",Error,hC[colWidth-1]);
free(refC);
free(hB);
free(hA);
return 0;
} |
You are a helpful coding assistant specialized in converting HIP source code to AMD device assembly. | #include <stdio.h>
#include <stdlib.h>
#include <hip/hip_runtime.h>
using namespace std;
__global__ void multi(int * dA, int *dB, int * dC, int rowWidth, int colWidth){
//int id = threadIdx.x + blockIdx.x * blockDim.x;
int value = 0;
for (int i = 0; i < blockDim.x; i++)
value += dA[blockDim.x * blockIdx.x + i] * dB[i];
dC[blockIdx.x] = value;
}
int* read_array(const char* filename, int len) {
int *x = (int*) malloc(len * sizeof(int));
FILE *fp = fopen(filename, "r");
for (int i = 0; i < len; i++) {
fscanf(fp, "%d", &x[i]);
}
fclose(fp);
return x;
}
int main(int argc, char *argv[]) {
if (argc != 1) {
printf("Invalid argument Usage: ./problem1");
return -1;
}
const int rowWidth=32;
const int colWidth=16;
int *hA = read_array("inputA.inp",rowWidth*colWidth );
int *hB = read_array("inputB.inp", rowWidth);
int *hC = (int*) malloc(colWidth * sizeof(int));
int *refC = (int*) malloc (colWidth * sizeof(int));
// TODO - allocate host memory for refC (you have to figure out how much)
// The skeleton currently segfaults because refC is accessed without allocation
// TODO do a reference host implementation (Ch) here. ie populate answer in refC
for (int i = 0; i < colWidth; i++)
refC[i] = 0;
for (int i = 0; i < colWidth; i++)
for (int j = 0; j < rowWidth; j++)
{
refC[i] += hA[ rowWidth * i + j] * hB[j];
}
int *dA, *dB, *dC;
// TODO allocate device memory for dA,dB and dC
hipMalloc( (void**) &dA, sizeof(int) * rowWidth * colWidth);
hipMalloc( (void**) &dB, sizeof(int) * rowWidth);
hipMalloc((void**) &dC, sizeof(int) * colWidth);
// TODO copy data from host to GPU
hipMemcpy (dA, hA, sizeof(int) * rowWidth * colWidth, hipMemcpyHostToDevice);
hipMemcpy (dB, hB, sizeof(int) * rowWidth , hipMemcpyHostToDevice);
hipMemcpy (dC, hC, sizeof(int) * colWidth, hipMemcpyHostToDevice);
// TODO call your kernel
multi <<< colWidth ,rowWidth>>> (dA, dB,dC, rowWidth, colWidth);
// TODO copyback results
hipMemcpy(hC, dC, sizeof(int) * colWidth, hipMemcpyDeviceToHost);
int Error=0;
for(int i=0;i<colWidth;i++)
Error+=sqrt((hC[i]-refC[i])*(hC[i]-refC[i]));
printf("%d\n%d",Error,hC[colWidth-1]);
free(refC);
free(hB);
free(hA);
return 0;
} | .text
.amdgcn_target "amdgcn-amd-amdhsa--gfx1100"
.protected _Z5multiPiS_S_ii
.globl _Z5multiPiS_S_ii
.p2align 8
.type _Z5multiPiS_S_ii,@function
_Z5multiPiS_S_ii:
s_load_b32 s3, s[0:1], 0x2c
s_mov_b32 s2, s15
s_mov_b32 s10, 0
s_waitcnt lgkmcnt(0)
v_cmp_eq_u16_e64 s4, s3, 0
s_delay_alu instid0(VALU_DEP_1)
s_and_b32 vcc_lo, exec_lo, s4
s_cbranch_vccnz .LBB0_3
s_load_b128 s[4:7], s[0:1], 0x0
s_and_b32 s3, 0xffff, s3
s_mov_b32 s9, 0
s_mul_i32 s8, s2, s3
s_mov_b32 s10, s9
.LBB0_2:
s_lshl_b64 s[12:13], s[8:9], 2
s_waitcnt lgkmcnt(0)
s_load_b32 s11, s[6:7], 0x0
s_add_u32 s12, s4, s12
s_addc_u32 s13, s5, s13
s_load_b32 s12, s[12:13], 0x0
s_waitcnt lgkmcnt(0)
s_mul_i32 s11, s11, s12
s_delay_alu instid0(SALU_CYCLE_1)
s_add_i32 s10, s11, s10
s_add_u32 s6, s6, 4
s_addc_u32 s7, s7, 0
s_add_i32 s3, s3, -1
s_add_i32 s8, s8, 1
s_cmp_eq_u32 s3, 0
s_cbranch_scc0 .LBB0_2
.LBB0_3:
s_load_b64 s[0:1], s[0:1], 0x10
s_mov_b32 s3, 0
v_dual_mov_b32 v0, 0 :: v_dual_mov_b32 v1, s10
s_lshl_b64 s[2:3], s[2:3], 2
s_waitcnt lgkmcnt(0)
s_add_u32 s0, s0, s2
s_addc_u32 s1, s1, s3
global_store_b32 v0, v1, s[0:1]
s_nop 0
s_sendmsg sendmsg(MSG_DEALLOC_VGPRS)
s_endpgm
.section .rodata,"a",@progbits
.p2align 6, 0x0
.amdhsa_kernel _Z5multiPiS_S_ii
.amdhsa_group_segment_fixed_size 0
.amdhsa_private_segment_fixed_size 0
.amdhsa_kernarg_size 288
.amdhsa_user_sgpr_count 15
.amdhsa_user_sgpr_dispatch_ptr 0
.amdhsa_user_sgpr_queue_ptr 0
.amdhsa_user_sgpr_kernarg_segment_ptr 1
.amdhsa_user_sgpr_dispatch_id 0
.amdhsa_user_sgpr_private_segment_size 0
.amdhsa_wavefront_size32 1
.amdhsa_uses_dynamic_stack 0
.amdhsa_enable_private_segment 0
.amdhsa_system_sgpr_workgroup_id_x 1
.amdhsa_system_sgpr_workgroup_id_y 0
.amdhsa_system_sgpr_workgroup_id_z 0
.amdhsa_system_sgpr_workgroup_info 0
.amdhsa_system_vgpr_workitem_id 0
.amdhsa_next_free_vgpr 2
.amdhsa_next_free_sgpr 16
.amdhsa_float_round_mode_32 0
.amdhsa_float_round_mode_16_64 0
.amdhsa_float_denorm_mode_32 3
.amdhsa_float_denorm_mode_16_64 3
.amdhsa_dx10_clamp 1
.amdhsa_ieee_mode 1
.amdhsa_fp16_overflow 0
.amdhsa_workgroup_processor_mode 1
.amdhsa_memory_ordered 1
.amdhsa_forward_progress 0
.amdhsa_shared_vgpr_count 0
.amdhsa_exception_fp_ieee_invalid_op 0
.amdhsa_exception_fp_denorm_src 0
.amdhsa_exception_fp_ieee_div_zero 0
.amdhsa_exception_fp_ieee_overflow 0
.amdhsa_exception_fp_ieee_underflow 0
.amdhsa_exception_fp_ieee_inexact 0
.amdhsa_exception_int_div_zero 0
.end_amdhsa_kernel
.text
.Lfunc_end0:
.size _Z5multiPiS_S_ii, .Lfunc_end0-_Z5multiPiS_S_ii
.section .AMDGPU.csdata,"",@progbits
.text
.p2alignl 7, 3214868480
.fill 96, 4, 3214868480
.type __hip_cuid_,@object
.section .bss,"aw",@nobits
.globl __hip_cuid_
__hip_cuid_:
.byte 0
.size __hip_cuid_, 1
.ident "AMD clang version 18.0.0git (https://github.com/RadeonOpenCompute/llvm-project roc-6.3.2 25012 e5bf7e55c91490b07c49d8960fa7983d864936c4)"
.section ".note.GNU-stack","",@progbits
.addrsig
.addrsig_sym __hip_cuid_
.amdgpu_metadata
---
amdhsa.kernels:
- .args:
- .address_space: global
.offset: 0
.size: 8
.value_kind: global_buffer
- .address_space: global
.offset: 8
.size: 8
.value_kind: global_buffer
- .address_space: global
.offset: 16
.size: 8
.value_kind: global_buffer
- .offset: 24
.size: 4
.value_kind: by_value
- .offset: 28
.size: 4
.value_kind: by_value
- .offset: 32
.size: 4
.value_kind: hidden_block_count_x
- .offset: 36
.size: 4
.value_kind: hidden_block_count_y
- .offset: 40
.size: 4
.value_kind: hidden_block_count_z
- .offset: 44
.size: 2
.value_kind: hidden_group_size_x
- .offset: 46
.size: 2
.value_kind: hidden_group_size_y
- .offset: 48
.size: 2
.value_kind: hidden_group_size_z
- .offset: 50
.size: 2
.value_kind: hidden_remainder_x
- .offset: 52
.size: 2
.value_kind: hidden_remainder_y
- .offset: 54
.size: 2
.value_kind: hidden_remainder_z
- .offset: 72
.size: 8
.value_kind: hidden_global_offset_x
- .offset: 80
.size: 8
.value_kind: hidden_global_offset_y
- .offset: 88
.size: 8
.value_kind: hidden_global_offset_z
- .offset: 96
.size: 2
.value_kind: hidden_grid_dims
.group_segment_fixed_size: 0
.kernarg_segment_align: 8
.kernarg_segment_size: 288
.language: OpenCL C
.language_version:
- 2
- 0
.max_flat_workgroup_size: 1024
.name: _Z5multiPiS_S_ii
.private_segment_fixed_size: 0
.sgpr_count: 18
.sgpr_spill_count: 0
.symbol: _Z5multiPiS_S_ii.kd
.uniform_work_group_size: 1
.uses_dynamic_stack: false
.vgpr_count: 2
.vgpr_spill_count: 0
.wavefront_size: 32
.workgroup_processor_mode: 1
amdhsa.target: amdgcn-amd-amdhsa--gfx1100
amdhsa.version:
- 1
- 2
...
.end_amdgpu_metadata |
You are a helpful coding assistant specialized in converting HIP source code to AMD host assembly. | #include <stdio.h>
#include <stdlib.h>
#include <hip/hip_runtime.h>
using namespace std;
__global__ void multi(int * dA, int *dB, int * dC, int rowWidth, int colWidth){
//int id = threadIdx.x + blockIdx.x * blockDim.x;
int value = 0;
for (int i = 0; i < blockDim.x; i++)
value += dA[blockDim.x * blockIdx.x + i] * dB[i];
dC[blockIdx.x] = value;
}
int* read_array(const char* filename, int len) {
int *x = (int*) malloc(len * sizeof(int));
FILE *fp = fopen(filename, "r");
for (int i = 0; i < len; i++) {
fscanf(fp, "%d", &x[i]);
}
fclose(fp);
return x;
}
int main(int argc, char *argv[]) {
if (argc != 1) {
printf("Invalid argument Usage: ./problem1");
return -1;
}
const int rowWidth=32;
const int colWidth=16;
int *hA = read_array("inputA.inp",rowWidth*colWidth );
int *hB = read_array("inputB.inp", rowWidth);
int *hC = (int*) malloc(colWidth * sizeof(int));
int *refC = (int*) malloc (colWidth * sizeof(int));
// TODO - allocate host memory for refC (you have to figure out how much)
// The skeleton currently segfaults because refC is accessed without allocation
// TODO do a reference host implementation (Ch) here. ie populate answer in refC
for (int i = 0; i < colWidth; i++)
refC[i] = 0;
for (int i = 0; i < colWidth; i++)
for (int j = 0; j < rowWidth; j++)
{
refC[i] += hA[ rowWidth * i + j] * hB[j];
}
int *dA, *dB, *dC;
// TODO allocate device memory for dA,dB and dC
hipMalloc( (void**) &dA, sizeof(int) * rowWidth * colWidth);
hipMalloc( (void**) &dB, sizeof(int) * rowWidth);
hipMalloc((void**) &dC, sizeof(int) * colWidth);
// TODO copy data from host to GPU
hipMemcpy (dA, hA, sizeof(int) * rowWidth * colWidth, hipMemcpyHostToDevice);
hipMemcpy (dB, hB, sizeof(int) * rowWidth , hipMemcpyHostToDevice);
hipMemcpy (dC, hC, sizeof(int) * colWidth, hipMemcpyHostToDevice);
// TODO call your kernel
multi <<< colWidth ,rowWidth>>> (dA, dB,dC, rowWidth, colWidth);
// TODO copyback results
hipMemcpy(hC, dC, sizeof(int) * colWidth, hipMemcpyDeviceToHost);
int Error=0;
for(int i=0;i<colWidth;i++)
Error+=sqrt((hC[i]-refC[i])*(hC[i]-refC[i]));
printf("%d\n%d",Error,hC[colWidth-1]);
free(refC);
free(hB);
free(hA);
return 0;
} | .text
.file "problem1.hip"
.globl _Z20__device_stub__multiPiS_S_ii # -- Begin function _Z20__device_stub__multiPiS_S_ii
.p2align 4, 0x90
.type _Z20__device_stub__multiPiS_S_ii,@function
_Z20__device_stub__multiPiS_S_ii: # @_Z20__device_stub__multiPiS_S_ii
.cfi_startproc
# %bb.0:
subq $120, %rsp
.cfi_def_cfa_offset 128
movq %rdi, 72(%rsp)
movq %rsi, 64(%rsp)
movq %rdx, 56(%rsp)
movl %ecx, 4(%rsp)
movl %r8d, (%rsp)
leaq 72(%rsp), %rax
movq %rax, 80(%rsp)
leaq 64(%rsp), %rax
movq %rax, 88(%rsp)
leaq 56(%rsp), %rax
movq %rax, 96(%rsp)
leaq 4(%rsp), %rax
movq %rax, 104(%rsp)
movq %rsp, %rax
movq %rax, 112(%rsp)
leaq 40(%rsp), %rdi
leaq 24(%rsp), %rsi
leaq 16(%rsp), %rdx
leaq 8(%rsp), %rcx
callq __hipPopCallConfiguration
movq 40(%rsp), %rsi
movl 48(%rsp), %edx
movq 24(%rsp), %rcx
movl 32(%rsp), %r8d
leaq 80(%rsp), %r9
movl $_Z5multiPiS_S_ii, %edi
pushq 8(%rsp)
.cfi_adjust_cfa_offset 8
pushq 24(%rsp)
.cfi_adjust_cfa_offset 8
callq hipLaunchKernel
addq $136, %rsp
.cfi_adjust_cfa_offset -136
retq
.Lfunc_end0:
.size _Z20__device_stub__multiPiS_S_ii, .Lfunc_end0-_Z20__device_stub__multiPiS_S_ii
.cfi_endproc
# -- End function
.globl _Z10read_arrayPKci # -- Begin function _Z10read_arrayPKci
.p2align 4, 0x90
.type _Z10read_arrayPKci,@function
_Z10read_arrayPKci: # @_Z10read_arrayPKci
.cfi_startproc
# %bb.0:
pushq %rbp
.cfi_def_cfa_offset 16
pushq %r15
.cfi_def_cfa_offset 24
pushq %r14
.cfi_def_cfa_offset 32
pushq %r12
.cfi_def_cfa_offset 40
pushq %rbx
.cfi_def_cfa_offset 48
.cfi_offset %rbx, -48
.cfi_offset %r12, -40
.cfi_offset %r14, -32
.cfi_offset %r15, -24
.cfi_offset %rbp, -16
movl %esi, %ebp
movq %rdi, %r14
movslq %esi, %r15
leaq (,%r15,4), %rdi
callq malloc
movq %rax, %rbx
movl $.L.str, %esi
movq %r14, %rdi
callq fopen
movq %rax, %r14
testl %r15d, %r15d
jle .LBB1_3
# %bb.1: # %.lr.ph.preheader
movl %ebp, %r12d
movq %rbx, %r15
.p2align 4, 0x90
.LBB1_2: # %.lr.ph
# =>This Inner Loop Header: Depth=1
movl $.L.str.1, %esi
movq %r14, %rdi
movq %r15, %rdx
xorl %eax, %eax
callq __isoc23_fscanf
addq $4, %r15
decq %r12
jne .LBB1_2
.LBB1_3: # %._crit_edge
movq %r14, %rdi
callq fclose
movq %rbx, %rax
popq %rbx
.cfi_def_cfa_offset 40
popq %r12
.cfi_def_cfa_offset 32
popq %r14
.cfi_def_cfa_offset 24
popq %r15
.cfi_def_cfa_offset 16
popq %rbp
.cfi_def_cfa_offset 8
retq
.Lfunc_end1:
.size _Z10read_arrayPKci, .Lfunc_end1-_Z10read_arrayPKci
.cfi_endproc
# -- End function
.globl main # -- Begin function main
.p2align 4, 0x90
.type main,@function
main: # @main
.cfi_startproc
# %bb.0:
pushq %rbp
.cfi_def_cfa_offset 16
pushq %r15
.cfi_def_cfa_offset 24
pushq %r14
.cfi_def_cfa_offset 32
pushq %r13
.cfi_def_cfa_offset 40
pushq %r12
.cfi_def_cfa_offset 48
pushq %rbx
.cfi_def_cfa_offset 56
subq $152, %rsp
.cfi_def_cfa_offset 208
.cfi_offset %rbx, -56
.cfi_offset %r12, -48
.cfi_offset %r13, -40
.cfi_offset %r14, -32
.cfi_offset %r15, -24
.cfi_offset %rbp, -16
cmpl $1, %edi
jne .LBB2_1
# %bb.2:
movl $2048, %edi # imm = 0x800
callq malloc
movq %rax, %rbx
movl $.L.str.3, %edi
movl $.L.str, %esi
callq fopen
movq %rax, %r14
xorl %r15d, %r15d
.p2align 4, 0x90
.LBB2_3: # %.lr.ph.i
# =>This Inner Loop Header: Depth=1
leaq (%rbx,%r15), %rdx
movl $.L.str.1, %esi
movq %r14, %rdi
xorl %eax, %eax
callq __isoc23_fscanf
addq $4, %r15
cmpq $2048, %r15 # imm = 0x800
jne .LBB2_3
# %bb.4: # %_Z10read_arrayPKci.exit
movq %r14, %rdi
callq fclose
movl $128, %edi
callq malloc
movq %rax, %r14
movl $.L.str.4, %edi
movl $.L.str, %esi
callq fopen
movq %rax, %r15
xorl %r12d, %r12d
.p2align 4, 0x90
.LBB2_5: # %.lr.ph.i44
# =>This Inner Loop Header: Depth=1
leaq (%r14,%r12), %rdx
movl $.L.str.1, %esi
movq %r15, %rdi
xorl %eax, %eax
callq __isoc23_fscanf
addq $4, %r12
cmpq $128, %r12
jne .LBB2_5
# %bb.6: # %_Z10read_arrayPKci.exit48
movq %r15, %rdi
callq fclose
movl $64, %edi
callq malloc
movq %rax, %r12
movl $64, %edi
callq malloc
movq %rax, %r15
xorpd %xmm0, %xmm0
movupd %xmm0, (%rax)
movupd %xmm0, 16(%rax)
movupd %xmm0, 32(%rax)
movupd %xmm0, 48(%rax)
xorl %eax, %eax
movq %rbx, %rcx
.p2align 4, 0x90
.LBB2_7: # %.preheader
# =>This Loop Header: Depth=1
# Child Loop BB2_8 Depth 2
movl (%r15,%rax,4), %edx
xorl %esi, %esi
.p2align 4, 0x90
.LBB2_8: # Parent Loop BB2_7 Depth=1
# => This Inner Loop Header: Depth=2
movl (%r14,%rsi,4), %edi
imull (%rcx,%rsi,4), %edi
addl %edi, %edx
incq %rsi
cmpq $32, %rsi
jne .LBB2_8
# %bb.9: # in Loop: Header=BB2_7 Depth=1
movl %edx, (%r15,%rax,4)
incq %rax
subq $-128, %rcx
cmpq $16, %rax
jne .LBB2_7
# %bb.10:
leaq 32(%rsp), %rdi
movl $2048, %esi # imm = 0x800
callq hipMalloc
leaq 24(%rsp), %rdi
movl $128, %esi
callq hipMalloc
leaq 8(%rsp), %rdi
movl $64, %esi
callq hipMalloc
movq 32(%rsp), %rdi
movl $2048, %edx # imm = 0x800
movq %rbx, %rsi
movl $1, %ecx
callq hipMemcpy
movq 24(%rsp), %rdi
movl $128, %edx
movq %r14, %rsi
movl $1, %ecx
callq hipMemcpy
movq 8(%rsp), %rdi
movl $64, %edx
movq %r12, %rsi
movl $1, %ecx
callq hipMemcpy
movabsq $4294967312, %rdi # imm = 0x100000010
leaq 16(%rdi), %rdx
xorl %r13d, %r13d
movl $1, %esi
movl $1, %ecx
xorl %r8d, %r8d
xorl %r9d, %r9d
callq __hipPushCallConfiguration
testl %eax, %eax
jne .LBB2_12
# %bb.11:
movq 32(%rsp), %rax
movq 24(%rsp), %rcx
movq 8(%rsp), %rdx
movq %rax, 104(%rsp)
movq %rcx, 96(%rsp)
movq %rdx, 88(%rsp)
movl $32, 20(%rsp)
movl $16, 16(%rsp)
leaq 104(%rsp), %rax
movq %rax, 112(%rsp)
leaq 96(%rsp), %rax
movq %rax, 120(%rsp)
leaq 88(%rsp), %rax
movq %rax, 128(%rsp)
leaq 20(%rsp), %rax
movq %rax, 136(%rsp)
leaq 16(%rsp), %rax
movq %rax, 144(%rsp)
leaq 72(%rsp), %rdi
leaq 56(%rsp), %rsi
leaq 48(%rsp), %rdx
leaq 40(%rsp), %rcx
callq __hipPopCallConfiguration
movq 72(%rsp), %rsi
movl 80(%rsp), %edx
movq 56(%rsp), %rcx
movl 64(%rsp), %r8d
leaq 112(%rsp), %r9
movl $_Z5multiPiS_S_ii, %edi
pushq 40(%rsp)
.cfi_adjust_cfa_offset 8
pushq 56(%rsp)
.cfi_adjust_cfa_offset 8
callq hipLaunchKernel
addq $16, %rsp
.cfi_adjust_cfa_offset -16
.LBB2_12:
movq 8(%rsp), %rsi
movl $64, %edx
movq %r12, %rdi
movl $2, %ecx
callq hipMemcpy
xorpd %xmm2, %xmm2
xorl %ebp, %ebp
jmp .LBB2_13
.p2align 4, 0x90
.LBB2_15: # %call.sqrt
# in Loop: Header=BB2_13 Depth=1
callq sqrt
xorpd %xmm2, %xmm2
.LBB2_16: # %.split
# in Loop: Header=BB2_13 Depth=1
xorps %xmm1, %xmm1
cvtsi2sd %r13d, %xmm1
addsd %xmm0, %xmm1
cvttsd2si %xmm1, %r13d
incq %rbp
cmpq $16, %rbp
je .LBB2_17
.LBB2_13: # =>This Inner Loop Header: Depth=1
movl (%r12,%rbp,4), %eax
subl (%r15,%rbp,4), %eax
imull %eax, %eax
xorps %xmm0, %xmm0
cvtsi2sd %eax, %xmm0
ucomisd %xmm2, %xmm0
jb .LBB2_15
# %bb.14: # in Loop: Header=BB2_13 Depth=1
sqrtsd %xmm0, %xmm0
jmp .LBB2_16
.LBB2_1:
movl $.L.str.2, %edi
xorl %eax, %eax
callq printf
movl $-1, %ebp
jmp .LBB2_18
.LBB2_17:
movl 60(%r12), %edx
xorl %ebp, %ebp
movl $.L.str.5, %edi
movl %r13d, %esi
xorl %eax, %eax
callq printf
movq %r15, %rdi
callq free
movq %r14, %rdi
callq free
movq %rbx, %rdi
callq free
.LBB2_18:
movl %ebp, %eax
addq $152, %rsp
.cfi_def_cfa_offset 56
popq %rbx
.cfi_def_cfa_offset 48
popq %r12
.cfi_def_cfa_offset 40
popq %r13
.cfi_def_cfa_offset 32
popq %r14
.cfi_def_cfa_offset 24
popq %r15
.cfi_def_cfa_offset 16
popq %rbp
.cfi_def_cfa_offset 8
retq
.Lfunc_end2:
.size main, .Lfunc_end2-main
.cfi_endproc
# -- End function
.p2align 4, 0x90 # -- Begin function __hip_module_ctor
.type __hip_module_ctor,@function
__hip_module_ctor: # @__hip_module_ctor
.cfi_startproc
# %bb.0:
subq $40, %rsp
.cfi_def_cfa_offset 48
cmpq $0, __hip_gpubin_handle(%rip)
jne .LBB3_2
# %bb.1:
movl $__hip_fatbin_wrapper, %edi
callq __hipRegisterFatBinary
movq %rax, __hip_gpubin_handle(%rip)
.LBB3_2:
movq __hip_gpubin_handle(%rip), %rdi
xorps %xmm0, %xmm0
movups %xmm0, 16(%rsp)
movups %xmm0, (%rsp)
movl $_Z5multiPiS_S_ii, %esi
movl $.L__unnamed_1, %edx
movl $.L__unnamed_1, %ecx
movl $-1, %r8d
xorl %r9d, %r9d
callq __hipRegisterFunction
movl $__hip_module_dtor, %edi
addq $40, %rsp
.cfi_def_cfa_offset 8
jmp atexit # TAILCALL
.Lfunc_end3:
.size __hip_module_ctor, .Lfunc_end3-__hip_module_ctor
.cfi_endproc
# -- End function
.p2align 4, 0x90 # -- Begin function __hip_module_dtor
.type __hip_module_dtor,@function
__hip_module_dtor: # @__hip_module_dtor
.cfi_startproc
# %bb.0:
movq __hip_gpubin_handle(%rip), %rdi
testq %rdi, %rdi
je .LBB4_2
# %bb.1:
pushq %rax
.cfi_def_cfa_offset 16
callq __hipUnregisterFatBinary
movq $0, __hip_gpubin_handle(%rip)
addq $8, %rsp
.cfi_def_cfa_offset 8
.LBB4_2:
retq
.Lfunc_end4:
.size __hip_module_dtor, .Lfunc_end4-__hip_module_dtor
.cfi_endproc
# -- End function
.type _Z5multiPiS_S_ii,@object # @_Z5multiPiS_S_ii
.section .rodata,"a",@progbits
.globl _Z5multiPiS_S_ii
.p2align 3, 0x0
_Z5multiPiS_S_ii:
.quad _Z20__device_stub__multiPiS_S_ii
.size _Z5multiPiS_S_ii, 8
.type .L.str,@object # @.str
.section .rodata.str1.1,"aMS",@progbits,1
.L.str:
.asciz "r"
.size .L.str, 2
.type .L.str.1,@object # @.str.1
.L.str.1:
.asciz "%d"
.size .L.str.1, 3
.type .L.str.2,@object # @.str.2
.L.str.2:
.asciz "Invalid argument Usage: ./problem1"
.size .L.str.2, 35
.type .L.str.3,@object # @.str.3
.L.str.3:
.asciz "inputA.inp"
.size .L.str.3, 11
.type .L.str.4,@object # @.str.4
.L.str.4:
.asciz "inputB.inp"
.size .L.str.4, 11
.type .L.str.5,@object # @.str.5
.L.str.5:
.asciz "%d\n%d"
.size .L.str.5, 6
.type .L__unnamed_1,@object # @0
.L__unnamed_1:
.asciz "_Z5multiPiS_S_ii"
.size .L__unnamed_1, 17
.type __hip_fatbin_wrapper,@object # @__hip_fatbin_wrapper
.section .hipFatBinSegment,"a",@progbits
.p2align 3, 0x0
__hip_fatbin_wrapper:
.long 1212764230 # 0x48495046
.long 1 # 0x1
.quad __hip_fatbin
.quad 0
.size __hip_fatbin_wrapper, 24
.type __hip_gpubin_handle,@object # @__hip_gpubin_handle
.local __hip_gpubin_handle
.comm __hip_gpubin_handle,8,8
.section .init_array,"aw",@init_array
.p2align 3, 0x0
.quad __hip_module_ctor
.type __hip_cuid_,@object # @__hip_cuid_
.bss
.globl __hip_cuid_
__hip_cuid_:
.byte 0 # 0x0
.size __hip_cuid_, 1
.section ".linker-options","e",@llvm_linker_options
.ident "AMD clang version 18.0.0git (https://github.com/RadeonOpenCompute/llvm-project roc-6.3.2 25012 e5bf7e55c91490b07c49d8960fa7983d864936c4)"
.section ".note.GNU-stack","",@progbits
.addrsig
.addrsig_sym _Z20__device_stub__multiPiS_S_ii
.addrsig_sym __hip_module_ctor
.addrsig_sym __hip_module_dtor
.addrsig_sym _Z5multiPiS_S_ii
.addrsig_sym __hip_fatbin
.addrsig_sym __hip_fatbin_wrapper
.addrsig_sym __hip_cuid_ |
You are a helpful coding assistant specialized in converting from CUDA device assembly to AMD device assembly. | code for sm_80
Function : _Z5multiPiS_S_ii
.headerflags @"EF_CUDA_TEXMODE_UNIFIED EF_CUDA_64BIT_ADDRESS EF_CUDA_SM80 EF_CUDA_VIRTUAL_SM(EF_CUDA_SM80)"
/*0000*/ IMAD.MOV.U32 R1, RZ, RZ, c[0x0][0x28] ; /* 0x00000a00ff017624 */
/* 0x000fe400078e00ff */
/*0010*/ S2R R4, SR_CTAID.X ; /* 0x0000000000047919 */
/* 0x000e220000002500 */
/*0020*/ ISETP.NE.AND P0, PT, RZ, c[0x0][0x0], PT ; /* 0x00000000ff007a0c */
/* 0x000fe20003f05270 */
/*0030*/ ULDC.64 UR4, c[0x0][0x118] ; /* 0x0000460000047ab9 */
/* 0x000fe20000000a00 */
/*0040*/ IMAD.MOV.U32 R0, RZ, RZ, RZ ; /* 0x000000ffff007224 */
/* 0x000fd600078e00ff */
/*0050*/ @!P0 BRA 0x410 ; /* 0x000003b000008947 */
/* 0x000fea0003800000 */
/*0060*/ MOV R3, c[0x0][0x0] ; /* 0x0000000000037a02 */
/* 0x000fe20000000f00 */
/*0070*/ IMAD.MOV.U32 R9, RZ, RZ, RZ ; /* 0x000000ffff097224 */
/* 0x000fc600078e00ff */
/*0080*/ IADD3 R0, R3.reuse, -0x1, RZ ; /* 0xffffffff03007810 */
/* 0x040fe40007ffe0ff */
/*0090*/ LOP3.LUT R5, R3, 0x3, RZ, 0xc0, !PT ; /* 0x0000000303057812 */
/* 0x000fe400078ec0ff */
/*00a0*/ ISETP.GE.U32.AND P1, PT, R0, 0x3, PT ; /* 0x000000030000780c */
/* 0x000fe20003f26070 */
/*00b0*/ HFMA2.MMA R0, -RZ, RZ, 0, 0 ; /* 0x00000000ff007435 */
/* 0x000fe200000001ff */
/*00c0*/ ISETP.NE.AND P0, PT, R5, RZ, PT ; /* 0x000000ff0500720c */
/* 0x000fd60003f05270 */
/*00d0*/ @!P1 BRA 0x300 ; /* 0x0000022000009947 */
/* 0x000fea0003800000 */
/*00e0*/ IMAD R8, R4, R3, 0x3 ; /* 0x0000000304087424 */
/* 0x001fe200078e0203 */
/*00f0*/ IADD3 R10, R5, -c[0x0][0x0], RZ ; /* 0x80000000050a7a10 */
/* 0x000fe20007ffe0ff */
/*0100*/ IMAD.MOV.U32 R9, RZ, RZ, RZ ; /* 0x000000ffff097224 */
/* 0x000fe200078e00ff */
/*0110*/ MOV R17, c[0x0][0x168] ; /* 0x00005a0000117a02 */
/* 0x000fe20000000f00 */
/*0120*/ IMAD.MOV.U32 R18, RZ, RZ, c[0x0][0x16c] ; /* 0x00005b00ff127624 */
/* 0x000fe400078e00ff */
/*0130*/ IADD3 R2, R8.reuse, -0x3, RZ ; /* 0xfffffffd08027810 */
/* 0x040fe40007ffe0ff */
/*0140*/ MOV R7, 0x4 ; /* 0x0000000400077802 */
/* 0x000fe40000000f00 */
/*0150*/ IADD3 R12, R8.reuse, -0x2, RZ ; /* 0xfffffffe080c7810 */
/* 0x040fe40007ffe0ff */
/*0160*/ IADD3 R14, R8, -0x1, RZ ; /* 0xffffffff080e7810 */
/* 0x000fe20007ffe0ff */
/*0170*/ IMAD.WIDE.U32 R2, R2, R7, c[0x0][0x160] ; /* 0x0000580002027625 */
/* 0x000fc800078e0007 */
/*0180*/ IMAD.WIDE.U32 R12, R12, R7.reuse, c[0x0][0x160] ; /* 0x000058000c0c7625 */
/* 0x080fe200078e0007 */
/*0190*/ LDG.E R16, [R2.64] ; /* 0x0000000402107981 */
/* 0x0000a6000c1e1900 */
/*01a0*/ IMAD.WIDE.U32 R14, R14, R7.reuse, c[0x0][0x160] ; /* 0x000058000e0e7625 */
/* 0x080fe400078e0007 */
/*01b0*/ LDG.E R12, [R12.64] ; /* 0x000000040c0c7981 */
/* 0x000ee4000c1e1900 */
/*01c0*/ IMAD.MOV.U32 R2, RZ, RZ, R17 ; /* 0x000000ffff027224 */
/* 0x001fe200078e0011 */
/*01d0*/ MOV R3, R18 ; /* 0x0000001200037202 */
/* 0x000fe20000000f00 */
/*01e0*/ IMAD.WIDE.U32 R6, R8, R7, c[0x0][0x160] ; /* 0x0000580008067625 */
/* 0x000fe200078e0007 */
/*01f0*/ LDG.E R14, [R14.64] ; /* 0x000000040e0e7981 */
/* 0x000f28000c1e1900 */
/*0200*/ LDG.E R11, [R2.64] ; /* 0x00000004020b7981 */
/* 0x000ea8000c1e1900 */
/*0210*/ LDG.E R18, [R2.64+0x4] ; /* 0x0000040402127981 */
/* 0x000ee8000c1e1900 */
/*0220*/ LDG.E R20, [R2.64+0x8] ; /* 0x0000080402147981 */
/* 0x000f28000c1e1900 */
/*0230*/ LDG.E R6, [R6.64] ; /* 0x0000000406067981 */
/* 0x000f68000c1e1900 */
/*0240*/ LDG.E R22, [R2.64+0xc] ; /* 0x00000c0402167981 */
/* 0x000f62000c1e1900 */
/*0250*/ IADD3 R9, R9, 0x4, RZ ; /* 0x0000000409097810 */
/* 0x000fc40007ffe0ff */
/*0260*/ IADD3 R17, P2, R2, 0x10, RZ ; /* 0x0000001002117810 */
/* 0x000fe40007f5e0ff */
/*0270*/ IADD3 R8, R8, 0x4, RZ ; /* 0x0000000408087810 */
/* 0x000fe20007ffe0ff */
/*0280*/ IMAD R11, R11, R16, R0 ; /* 0x000000100b0b7224 */
/* 0x004fe400078e0200 */
/*0290*/ IMAD.IADD R0, R10, 0x1, R9 ; /* 0x000000010a007824 */
/* 0x000fca00078e0209 */
/*02a0*/ ISETP.NE.AND P1, PT, R0, RZ, PT ; /* 0x000000ff0000720c */
/* 0x000fe20003f25270 */
/*02b0*/ IMAD R11, R18, R12, R11 ; /* 0x0000000c120b7224 */
/* 0x008fc800078e020b */
/*02c0*/ IMAD R11, R20, R14, R11 ; /* 0x0000000e140b7224 */
/* 0x010fe200078e020b */
/*02d0*/ IADD3.X R18, RZ, R3, RZ, P2, !PT ; /* 0x00000003ff127210 */
/* 0x000fc600017fe4ff */
/*02e0*/ IMAD R0, R22, R6, R11 ; /* 0x0000000616007224 */
/* 0x020fc800078e020b */
/*02f0*/ @P1 BRA 0x130 ; /* 0xfffffe3000001947 */
/* 0x000fea000383ffff */
/*0300*/ @!P0 BRA 0x410 ; /* 0x0000010000008947 */
/* 0x000fea0003800000 */
/*0310*/ IMAD.MOV.U32 R8, RZ, RZ, 0x4 ; /* 0x00000004ff087424 */
/* 0x000fc800078e00ff */
/*0320*/ IMAD.WIDE R2, R9, R8, c[0x0][0x168] ; /* 0x00005a0009027625 */
/* 0x000fc800078e0208 */
/*0330*/ IMAD R9, R4, c[0x0][0x0], R9 ; /* 0x0000000004097a24 */
/* 0x001fe200078e0209 */
/*0340*/ MOV R6, R2 ; /* 0x0000000200067202 */
/* 0x000fe20000000f00 */
/*0350*/ IMAD.MOV.U32 R11, RZ, RZ, R3 ; /* 0x000000ffff0b7224 */
/* 0x000fc800078e0003 */
/*0360*/ IMAD.WIDE.U32 R2, R9, R8, c[0x0][0x160] ; /* 0x0000580009027625 */
/* 0x000fe200078e0008 */
/*0370*/ MOV R7, R11 ; /* 0x0000000b00077202 */
/* 0x000fca0000000f00 */
/*0380*/ LDG.E R2, [R2.64] ; /* 0x0000000402027981 */
/* 0x000ea8000c1e1900 */
/*0390*/ LDG.E R7, [R6.64] ; /* 0x0000000406077981 */
/* 0x0000a2000c1e1900 */
/*03a0*/ IADD3 R5, R5, -0x1, RZ ; /* 0xffffffff05057810 */
/* 0x000fe40007ffe0ff */
/*03b0*/ IADD3 R9, R9, 0x1, RZ ; /* 0x0000000109097810 */
/* 0x000fe40007ffe0ff */
/*03c0*/ ISETP.NE.AND P0, PT, R5, RZ, PT ; /* 0x000000ff0500720c */
/* 0x000fe40003f05270 */
/*03d0*/ IADD3 R6, P1, R6, 0x4, RZ ; /* 0x0000000406067810 */
/* 0x001fca0007f3e0ff */
/*03e0*/ IMAD.X R11, RZ, RZ, R11, P1 ; /* 0x000000ffff0b7224 */
/* 0x000fe400008e060b */
/*03f0*/ IMAD R0, R7, R2, R0 ; /* 0x0000000207007224 */
/* 0x004fc800078e0200 */
/*0400*/ @P0 BRA 0x360 ; /* 0xffffff5000000947 */
/* 0x000fea000383ffff */
/*0410*/ HFMA2.MMA R5, -RZ, RZ, 0, 2.384185791015625e-07 ; /* 0x00000004ff057435 */
/* 0x000fd400000001ff */
/*0420*/ IMAD.WIDE.U32 R4, R4, R5, c[0x0][0x170] ; /* 0x00005c0004047625 */
/* 0x001fca00078e0005 */
/*0430*/ STG.E [R4.64], R0 ; /* 0x0000000004007986 */
/* 0x000fe2000c101904 */
/*0440*/ EXIT ; /* 0x000000000000794d */
/* 0x000fea0003800000 */
/*0450*/ BRA 0x450; /* 0xfffffff000007947 */
/* 0x000fc0000383ffff */
/*0460*/ NOP; /* 0x0000000000007918 */
/* 0x000fc00000000000 */
/*0470*/ NOP; /* 0x0000000000007918 */
/* 0x000fc00000000000 */
/*0480*/ NOP; /* 0x0000000000007918 */
/* 0x000fc00000000000 */
/*0490*/ NOP; /* 0x0000000000007918 */
/* 0x000fc00000000000 */
/*04a0*/ NOP; /* 0x0000000000007918 */
/* 0x000fc00000000000 */
/*04b0*/ NOP; /* 0x0000000000007918 */
/* 0x000fc00000000000 */
/*04c0*/ NOP; /* 0x0000000000007918 */
/* 0x000fc00000000000 */
/*04d0*/ NOP; /* 0x0000000000007918 */
/* 0x000fc00000000000 */
/*04e0*/ NOP; /* 0x0000000000007918 */
/* 0x000fc00000000000 */
/*04f0*/ NOP; /* 0x0000000000007918 */
/* 0x000fc00000000000 */
.......... | .text
.amdgcn_target "amdgcn-amd-amdhsa--gfx1100"
.protected _Z5multiPiS_S_ii
.globl _Z5multiPiS_S_ii
.p2align 8
.type _Z5multiPiS_S_ii,@function
_Z5multiPiS_S_ii:
s_load_b32 s3, s[0:1], 0x2c
s_mov_b32 s2, s15
s_mov_b32 s10, 0
s_waitcnt lgkmcnt(0)
v_cmp_eq_u16_e64 s4, s3, 0
s_delay_alu instid0(VALU_DEP_1)
s_and_b32 vcc_lo, exec_lo, s4
s_cbranch_vccnz .LBB0_3
s_load_b128 s[4:7], s[0:1], 0x0
s_and_b32 s3, 0xffff, s3
s_mov_b32 s9, 0
s_mul_i32 s8, s2, s3
s_mov_b32 s10, s9
.LBB0_2:
s_lshl_b64 s[12:13], s[8:9], 2
s_waitcnt lgkmcnt(0)
s_load_b32 s11, s[6:7], 0x0
s_add_u32 s12, s4, s12
s_addc_u32 s13, s5, s13
s_load_b32 s12, s[12:13], 0x0
s_waitcnt lgkmcnt(0)
s_mul_i32 s11, s11, s12
s_delay_alu instid0(SALU_CYCLE_1)
s_add_i32 s10, s11, s10
s_add_u32 s6, s6, 4
s_addc_u32 s7, s7, 0
s_add_i32 s3, s3, -1
s_add_i32 s8, s8, 1
s_cmp_eq_u32 s3, 0
s_cbranch_scc0 .LBB0_2
.LBB0_3:
s_load_b64 s[0:1], s[0:1], 0x10
s_mov_b32 s3, 0
v_dual_mov_b32 v0, 0 :: v_dual_mov_b32 v1, s10
s_lshl_b64 s[2:3], s[2:3], 2
s_waitcnt lgkmcnt(0)
s_add_u32 s0, s0, s2
s_addc_u32 s1, s1, s3
global_store_b32 v0, v1, s[0:1]
s_nop 0
s_sendmsg sendmsg(MSG_DEALLOC_VGPRS)
s_endpgm
.section .rodata,"a",@progbits
.p2align 6, 0x0
.amdhsa_kernel _Z5multiPiS_S_ii
.amdhsa_group_segment_fixed_size 0
.amdhsa_private_segment_fixed_size 0
.amdhsa_kernarg_size 288
.amdhsa_user_sgpr_count 15
.amdhsa_user_sgpr_dispatch_ptr 0
.amdhsa_user_sgpr_queue_ptr 0
.amdhsa_user_sgpr_kernarg_segment_ptr 1
.amdhsa_user_sgpr_dispatch_id 0
.amdhsa_user_sgpr_private_segment_size 0
.amdhsa_wavefront_size32 1
.amdhsa_uses_dynamic_stack 0
.amdhsa_enable_private_segment 0
.amdhsa_system_sgpr_workgroup_id_x 1
.amdhsa_system_sgpr_workgroup_id_y 0
.amdhsa_system_sgpr_workgroup_id_z 0
.amdhsa_system_sgpr_workgroup_info 0
.amdhsa_system_vgpr_workitem_id 0
.amdhsa_next_free_vgpr 2
.amdhsa_next_free_sgpr 16
.amdhsa_float_round_mode_32 0
.amdhsa_float_round_mode_16_64 0
.amdhsa_float_denorm_mode_32 3
.amdhsa_float_denorm_mode_16_64 3
.amdhsa_dx10_clamp 1
.amdhsa_ieee_mode 1
.amdhsa_fp16_overflow 0
.amdhsa_workgroup_processor_mode 1
.amdhsa_memory_ordered 1
.amdhsa_forward_progress 0
.amdhsa_shared_vgpr_count 0
.amdhsa_exception_fp_ieee_invalid_op 0
.amdhsa_exception_fp_denorm_src 0
.amdhsa_exception_fp_ieee_div_zero 0
.amdhsa_exception_fp_ieee_overflow 0
.amdhsa_exception_fp_ieee_underflow 0
.amdhsa_exception_fp_ieee_inexact 0
.amdhsa_exception_int_div_zero 0
.end_amdhsa_kernel
.text
.Lfunc_end0:
.size _Z5multiPiS_S_ii, .Lfunc_end0-_Z5multiPiS_S_ii
.section .AMDGPU.csdata,"",@progbits
.text
.p2alignl 7, 3214868480
.fill 96, 4, 3214868480
.type __hip_cuid_,@object
.section .bss,"aw",@nobits
.globl __hip_cuid_
__hip_cuid_:
.byte 0
.size __hip_cuid_, 1
.ident "AMD clang version 18.0.0git (https://github.com/RadeonOpenCompute/llvm-project roc-6.3.2 25012 e5bf7e55c91490b07c49d8960fa7983d864936c4)"
.section ".note.GNU-stack","",@progbits
.addrsig
.addrsig_sym __hip_cuid_
.amdgpu_metadata
---
amdhsa.kernels:
- .args:
- .address_space: global
.offset: 0
.size: 8
.value_kind: global_buffer
- .address_space: global
.offset: 8
.size: 8
.value_kind: global_buffer
- .address_space: global
.offset: 16
.size: 8
.value_kind: global_buffer
- .offset: 24
.size: 4
.value_kind: by_value
- .offset: 28
.size: 4
.value_kind: by_value
- .offset: 32
.size: 4
.value_kind: hidden_block_count_x
- .offset: 36
.size: 4
.value_kind: hidden_block_count_y
- .offset: 40
.size: 4
.value_kind: hidden_block_count_z
- .offset: 44
.size: 2
.value_kind: hidden_group_size_x
- .offset: 46
.size: 2
.value_kind: hidden_group_size_y
- .offset: 48
.size: 2
.value_kind: hidden_group_size_z
- .offset: 50
.size: 2
.value_kind: hidden_remainder_x
- .offset: 52
.size: 2
.value_kind: hidden_remainder_y
- .offset: 54
.size: 2
.value_kind: hidden_remainder_z
- .offset: 72
.size: 8
.value_kind: hidden_global_offset_x
- .offset: 80
.size: 8
.value_kind: hidden_global_offset_y
- .offset: 88
.size: 8
.value_kind: hidden_global_offset_z
- .offset: 96
.size: 2
.value_kind: hidden_grid_dims
.group_segment_fixed_size: 0
.kernarg_segment_align: 8
.kernarg_segment_size: 288
.language: OpenCL C
.language_version:
- 2
- 0
.max_flat_workgroup_size: 1024
.name: _Z5multiPiS_S_ii
.private_segment_fixed_size: 0
.sgpr_count: 18
.sgpr_spill_count: 0
.symbol: _Z5multiPiS_S_ii.kd
.uniform_work_group_size: 1
.uses_dynamic_stack: false
.vgpr_count: 2
.vgpr_spill_count: 0
.wavefront_size: 32
.workgroup_processor_mode: 1
amdhsa.target: amdgcn-amd-amdhsa--gfx1100
amdhsa.version:
- 1
- 2
...
.end_amdgpu_metadata |
You are a helpful coding assistant specialized in converting from CUDA host assembly to AMD host assembly. | .file "tmpxft_0007d8da_00000000-6_problem1.cudafe1.cpp"
.text
#APP
#NO_APP
.type _ZL26__cudaUnregisterBinaryUtilv, @function
_ZL26__cudaUnregisterBinaryUtilv:
.LFB2061:
.cfi_startproc
endbr64
subq $8, %rsp
.cfi_def_cfa_offset 16
movq _ZL20__cudaFatCubinHandle(%rip), %rdi
call __cudaUnregisterFatBinary@PLT
addq $8, %rsp
.cfi_def_cfa_offset 8
ret
.cfi_endproc
.LFE2061:
.size _ZL26__cudaUnregisterBinaryUtilv, .-_ZL26__cudaUnregisterBinaryUtilv
.section .rodata.str1.1,"aMS",@progbits,1
.LC0:
.string "r"
.LC1:
.string "%d"
.text
.globl _Z10read_arrayPKci
.type _Z10read_arrayPKci, @function
_Z10read_arrayPKci:
.LFB2057:
.cfi_startproc
endbr64
pushq %r14
.cfi_def_cfa_offset 16
.cfi_offset 14, -16
pushq %r13
.cfi_def_cfa_offset 24
.cfi_offset 13, -24
pushq %r12
.cfi_def_cfa_offset 32
.cfi_offset 12, -32
pushq %rbp
.cfi_def_cfa_offset 40
.cfi_offset 6, -40
pushq %rbx
.cfi_def_cfa_offset 48
.cfi_offset 3, -48
movq %rdi, %r12
movl %esi, %ebx
movslq %esi, %rbp
salq $2, %rbp
movq %rbp, %rdi
call malloc@PLT
movq %rax, %r14
leaq .LC0(%rip), %rsi
movq %r12, %rdi
call fopen@PLT
movq %rax, %r12
testl %ebx, %ebx
jle .L4
movq %r14, %rbx
addq %r14, %rbp
leaq .LC1(%rip), %r13
.L5:
movq %rbx, %rdx
movq %r13, %rsi
movq %r12, %rdi
movl $0, %eax
call __isoc23_fscanf@PLT
addq $4, %rbx
cmpq %rbp, %rbx
jne .L5
.L4:
movq %r12, %rdi
call fclose@PLT
movq %r14, %rax
popq %rbx
.cfi_def_cfa_offset 40
popq %rbp
.cfi_def_cfa_offset 32
popq %r12
.cfi_def_cfa_offset 24
popq %r13
.cfi_def_cfa_offset 16
popq %r14
.cfi_def_cfa_offset 8
ret
.cfi_endproc
.LFE2057:
.size _Z10read_arrayPKci, .-_Z10read_arrayPKci
.globl _Z30__device_stub__Z5multiPiS_S_iiPiS_S_ii
.type _Z30__device_stub__Z5multiPiS_S_iiPiS_S_ii, @function
_Z30__device_stub__Z5multiPiS_S_iiPiS_S_ii:
.LFB2083:
.cfi_startproc
endbr64
subq $152, %rsp
.cfi_def_cfa_offset 160
movq %rdi, 24(%rsp)
movq %rsi, 16(%rsp)
movq %rdx, 8(%rsp)
movl %ecx, 4(%rsp)
movl %r8d, (%rsp)
movq %fs:40, %rax
movq %rax, 136(%rsp)
xorl %eax, %eax
leaq 24(%rsp), %rax
movq %rax, 96(%rsp)
leaq 16(%rsp), %rax
movq %rax, 104(%rsp)
leaq 8(%rsp), %rax
movq %rax, 112(%rsp)
leaq 4(%rsp), %rax
movq %rax, 120(%rsp)
movq %rsp, %rax
movq %rax, 128(%rsp)
movl $1, 48(%rsp)
movl $1, 52(%rsp)
movl $1, 56(%rsp)
movl $1, 60(%rsp)
movl $1, 64(%rsp)
movl $1, 68(%rsp)
leaq 40(%rsp), %rcx
leaq 32(%rsp), %rdx
leaq 60(%rsp), %rsi
leaq 48(%rsp), %rdi
call __cudaPopCallConfiguration@PLT
testl %eax, %eax
je .L12
.L8:
movq 136(%rsp), %rax
subq %fs:40, %rax
jne .L13
addq $152, %rsp
.cfi_remember_state
.cfi_def_cfa_offset 8
ret
.L12:
.cfi_restore_state
pushq 40(%rsp)
.cfi_def_cfa_offset 168
pushq 40(%rsp)
.cfi_def_cfa_offset 176
leaq 112(%rsp), %r9
movq 76(%rsp), %rcx
movl 84(%rsp), %r8d
movq 64(%rsp), %rsi
movl 72(%rsp), %edx
leaq _Z5multiPiS_S_ii(%rip), %rdi
call cudaLaunchKernel@PLT
addq $16, %rsp
.cfi_def_cfa_offset 160
jmp .L8
.L13:
call __stack_chk_fail@PLT
.cfi_endproc
.LFE2083:
.size _Z30__device_stub__Z5multiPiS_S_iiPiS_S_ii, .-_Z30__device_stub__Z5multiPiS_S_iiPiS_S_ii
.globl _Z5multiPiS_S_ii
.type _Z5multiPiS_S_ii, @function
_Z5multiPiS_S_ii:
.LFB2084:
.cfi_startproc
endbr64
subq $8, %rsp
.cfi_def_cfa_offset 16
call _Z30__device_stub__Z5multiPiS_S_iiPiS_S_ii
addq $8, %rsp
.cfi_def_cfa_offset 8
ret
.cfi_endproc
.LFE2084:
.size _Z5multiPiS_S_ii, .-_Z5multiPiS_S_ii
.section .rodata.str1.8,"aMS",@progbits,1
.align 8
.LC2:
.string "Invalid argument Usage: ./problem1"
.section .rodata.str1.1
.LC3:
.string "inputA.inp"
.LC4:
.string "inputB.inp"
.LC6:
.string "%d\n%d"
.text
.globl main
.type main, @function
main:
.LFB2058:
.cfi_startproc
endbr64
pushq %r15
.cfi_def_cfa_offset 16
.cfi_offset 15, -16
pushq %r14
.cfi_def_cfa_offset 24
.cfi_offset 14, -24
pushq %r13
.cfi_def_cfa_offset 32
.cfi_offset 13, -32
pushq %r12
.cfi_def_cfa_offset 40
.cfi_offset 12, -40
pushq %rbp
.cfi_def_cfa_offset 48
.cfi_offset 6, -48
pushq %rbx
.cfi_def_cfa_offset 56
.cfi_offset 3, -56
subq $72, %rsp
.cfi_def_cfa_offset 128
movq %fs:40, %rax
movq %rax, 56(%rsp)
xorl %eax, %eax
cmpl $1, %edi
jne .L35
movl $512, %esi
leaq .LC3(%rip), %rdi
call _Z10read_arrayPKci
movq %rax, %r15
movl $32, %esi
leaq .LC4(%rip), %rdi
call _Z10read_arrayPKci
movq %rax, %rbx
movl $64, %edi
call malloc@PLT
movq %rax, %r14
movl $64, %edi
call malloc@PLT
movq %rax, %r13
movq %rax, %rdi
leaq 64(%rax), %rdx
.L19:
movl $0, (%rax)
addq $4, %rax
cmpq %rdx, %rax
jne .L19
movq %r15, %rsi
movl $0, %r8d
.L20:
movq %rdi, %r9
movl (%rdi), %ecx
movl $0, %eax
.L21:
movl (%rsi,%rax), %edx
imull (%rbx,%rax), %edx
addl %edx, %ecx
addq $4, %rax
cmpq $128, %rax
jne .L21
movl %ecx, (%r9)
addq $4, %rdi
addl $32, %r8d
subq $-128, %rsi
cmpl $512, %r8d
jne .L20
leaq 8(%rsp), %rdi
movl $2048, %esi
call cudaMalloc@PLT
leaq 16(%rsp), %rdi
movl $128, %esi
call cudaMalloc@PLT
leaq 24(%rsp), %rdi
movl $64, %esi
call cudaMalloc@PLT
movl $1, %ecx
movl $2048, %edx
movq %r15, %rsi
movq 8(%rsp), %rdi
call cudaMemcpy@PLT
movl $1, %ecx
movl $128, %edx
movq %rbx, %rsi
movq 16(%rsp), %rdi
call cudaMemcpy@PLT
movl $1, %ecx
movl $64, %edx
movq %r14, %rsi
movq 24(%rsp), %rdi
call cudaMemcpy@PLT
movl $32, 44(%rsp)
movl $1, 48(%rsp)
movl $16, 32(%rsp)
movl $1, 36(%rsp)
movl $0, %r9d
movl $0, %r8d
movq 44(%rsp), %rdx
movl $1, %ecx
movq 32(%rsp), %rdi
movl $1, %esi
call __cudaPushCallConfiguration@PLT
testl %eax, %eax
je .L36
.L23:
movl $2, %ecx
movl $64, %edx
movq 24(%rsp), %rsi
movq %r14, %rdi
call cudaMemcpy@PLT
movl $0, %ebp
movl $0, %r12d
.L27:
movl (%r14,%rbp), %eax
subl 0(%r13,%rbp), %eax
imull %eax, %eax
pxor %xmm0, %xmm0
cvtsi2sdl %eax, %xmm0
pxor %xmm2, %xmm2
ucomisd %xmm0, %xmm2
ja .L33
sqrtsd %xmm0, %xmm0
.L26:
pxor %xmm1, %xmm1
cvtsi2sdl %r12d, %xmm1
addsd %xmm1, %xmm0
cvttsd2sil %xmm0, %r12d
addq $4, %rbp
cmpq $64, %rbp
jne .L27
movl 60(%r14), %ecx
movl %r12d, %edx
leaq .LC6(%rip), %rsi
movl $2, %edi
movl $0, %eax
call __printf_chk@PLT
movq %r13, %rdi
call free@PLT
movq %rbx, %rdi
call free@PLT
movq %r15, %rdi
call free@PLT
movl $0, %eax
.L16:
movq 56(%rsp), %rdx
subq %fs:40, %rdx
jne .L37
addq $72, %rsp
.cfi_remember_state
.cfi_def_cfa_offset 56
popq %rbx
.cfi_def_cfa_offset 48
popq %rbp
.cfi_def_cfa_offset 40
popq %r12
.cfi_def_cfa_offset 32
popq %r13
.cfi_def_cfa_offset 24
popq %r14
.cfi_def_cfa_offset 16
popq %r15
.cfi_def_cfa_offset 8
ret
.L35:
.cfi_restore_state
leaq .LC2(%rip), %rsi
movl $2, %edi
call __printf_chk@PLT
movl $-1, %eax
jmp .L16
.L36:
movl $16, %r8d
movl $32, %ecx
movq 24(%rsp), %rdx
movq 16(%rsp), %rsi
movq 8(%rsp), %rdi
call _Z30__device_stub__Z5multiPiS_S_iiPiS_S_ii
jmp .L23
.L33:
call sqrt@PLT
jmp .L26
.L37:
call __stack_chk_fail@PLT
.cfi_endproc
.LFE2058:
.size main, .-main
.section .rodata.str1.1
.LC7:
.string "_Z5multiPiS_S_ii"
.text
.type _ZL24__sti____cudaRegisterAllv, @function
_ZL24__sti____cudaRegisterAllv:
.LFB2086:
.cfi_startproc
endbr64
subq $8, %rsp
.cfi_def_cfa_offset 16
leaq _ZL15__fatDeviceText(%rip), %rdi
call __cudaRegisterFatBinary@PLT
movq %rax, %rdi
movq %rax, _ZL20__cudaFatCubinHandle(%rip)
pushq $0
.cfi_def_cfa_offset 24
pushq $0
.cfi_def_cfa_offset 32
pushq $0
.cfi_def_cfa_offset 40
pushq $0
.cfi_def_cfa_offset 48
movl $0, %r9d
movl $-1, %r8d
leaq .LC7(%rip), %rdx
movq %rdx, %rcx
leaq _Z5multiPiS_S_ii(%rip), %rsi
call __cudaRegisterFunction@PLT
addq $32, %rsp
.cfi_def_cfa_offset 16
movq _ZL20__cudaFatCubinHandle(%rip), %rdi
call __cudaRegisterFatBinaryEnd@PLT
leaq _ZL26__cudaUnregisterBinaryUtilv(%rip), %rdi
call atexit@PLT
addq $8, %rsp
.cfi_def_cfa_offset 8
ret
.cfi_endproc
.LFE2086:
.size _ZL24__sti____cudaRegisterAllv, .-_ZL24__sti____cudaRegisterAllv
.section .init_array,"aw"
.align 8
.quad _ZL24__sti____cudaRegisterAllv
.section .nvFatBinSegment,"aw"
.align 8
.type _ZL15__fatDeviceText, @object
.size _ZL15__fatDeviceText, 24
_ZL15__fatDeviceText:
.long 1180844977
.long 1
.quad fatbinData
.quad 0
.local _ZL20__cudaFatCubinHandle
.comm _ZL20__cudaFatCubinHandle,8,8
.ident "GCC: (Ubuntu 13.3.0-6ubuntu2~24.04) 13.3.0"
.section .note.GNU-stack,"",@progbits
.section .note.gnu.property,"a"
.align 8
.long 1f - 0f
.long 4f - 1f
.long 5
0:
.string "GNU"
1:
.align 8
.long 0xc0000002
.long 3f - 2f
2:
.long 0x3
3:
.align 8
4: | .text
.file "problem1.hip"
.globl _Z20__device_stub__multiPiS_S_ii # -- Begin function _Z20__device_stub__multiPiS_S_ii
.p2align 4, 0x90
.type _Z20__device_stub__multiPiS_S_ii,@function
_Z20__device_stub__multiPiS_S_ii: # @_Z20__device_stub__multiPiS_S_ii
.cfi_startproc
# %bb.0:
subq $120, %rsp
.cfi_def_cfa_offset 128
movq %rdi, 72(%rsp)
movq %rsi, 64(%rsp)
movq %rdx, 56(%rsp)
movl %ecx, 4(%rsp)
movl %r8d, (%rsp)
leaq 72(%rsp), %rax
movq %rax, 80(%rsp)
leaq 64(%rsp), %rax
movq %rax, 88(%rsp)
leaq 56(%rsp), %rax
movq %rax, 96(%rsp)
leaq 4(%rsp), %rax
movq %rax, 104(%rsp)
movq %rsp, %rax
movq %rax, 112(%rsp)
leaq 40(%rsp), %rdi
leaq 24(%rsp), %rsi
leaq 16(%rsp), %rdx
leaq 8(%rsp), %rcx
callq __hipPopCallConfiguration
movq 40(%rsp), %rsi
movl 48(%rsp), %edx
movq 24(%rsp), %rcx
movl 32(%rsp), %r8d
leaq 80(%rsp), %r9
movl $_Z5multiPiS_S_ii, %edi
pushq 8(%rsp)
.cfi_adjust_cfa_offset 8
pushq 24(%rsp)
.cfi_adjust_cfa_offset 8
callq hipLaunchKernel
addq $136, %rsp
.cfi_adjust_cfa_offset -136
retq
.Lfunc_end0:
.size _Z20__device_stub__multiPiS_S_ii, .Lfunc_end0-_Z20__device_stub__multiPiS_S_ii
.cfi_endproc
# -- End function
.globl _Z10read_arrayPKci # -- Begin function _Z10read_arrayPKci
.p2align 4, 0x90
.type _Z10read_arrayPKci,@function
_Z10read_arrayPKci: # @_Z10read_arrayPKci
.cfi_startproc
# %bb.0:
pushq %rbp
.cfi_def_cfa_offset 16
pushq %r15
.cfi_def_cfa_offset 24
pushq %r14
.cfi_def_cfa_offset 32
pushq %r12
.cfi_def_cfa_offset 40
pushq %rbx
.cfi_def_cfa_offset 48
.cfi_offset %rbx, -48
.cfi_offset %r12, -40
.cfi_offset %r14, -32
.cfi_offset %r15, -24
.cfi_offset %rbp, -16
movl %esi, %ebp
movq %rdi, %r14
movslq %esi, %r15
leaq (,%r15,4), %rdi
callq malloc
movq %rax, %rbx
movl $.L.str, %esi
movq %r14, %rdi
callq fopen
movq %rax, %r14
testl %r15d, %r15d
jle .LBB1_3
# %bb.1: # %.lr.ph.preheader
movl %ebp, %r12d
movq %rbx, %r15
.p2align 4, 0x90
.LBB1_2: # %.lr.ph
# =>This Inner Loop Header: Depth=1
movl $.L.str.1, %esi
movq %r14, %rdi
movq %r15, %rdx
xorl %eax, %eax
callq __isoc23_fscanf
addq $4, %r15
decq %r12
jne .LBB1_2
.LBB1_3: # %._crit_edge
movq %r14, %rdi
callq fclose
movq %rbx, %rax
popq %rbx
.cfi_def_cfa_offset 40
popq %r12
.cfi_def_cfa_offset 32
popq %r14
.cfi_def_cfa_offset 24
popq %r15
.cfi_def_cfa_offset 16
popq %rbp
.cfi_def_cfa_offset 8
retq
.Lfunc_end1:
.size _Z10read_arrayPKci, .Lfunc_end1-_Z10read_arrayPKci
.cfi_endproc
# -- End function
.globl main # -- Begin function main
.p2align 4, 0x90
.type main,@function
main: # @main
.cfi_startproc
# %bb.0:
pushq %rbp
.cfi_def_cfa_offset 16
pushq %r15
.cfi_def_cfa_offset 24
pushq %r14
.cfi_def_cfa_offset 32
pushq %r13
.cfi_def_cfa_offset 40
pushq %r12
.cfi_def_cfa_offset 48
pushq %rbx
.cfi_def_cfa_offset 56
subq $152, %rsp
.cfi_def_cfa_offset 208
.cfi_offset %rbx, -56
.cfi_offset %r12, -48
.cfi_offset %r13, -40
.cfi_offset %r14, -32
.cfi_offset %r15, -24
.cfi_offset %rbp, -16
cmpl $1, %edi
jne .LBB2_1
# %bb.2:
movl $2048, %edi # imm = 0x800
callq malloc
movq %rax, %rbx
movl $.L.str.3, %edi
movl $.L.str, %esi
callq fopen
movq %rax, %r14
xorl %r15d, %r15d
.p2align 4, 0x90
.LBB2_3: # %.lr.ph.i
# =>This Inner Loop Header: Depth=1
leaq (%rbx,%r15), %rdx
movl $.L.str.1, %esi
movq %r14, %rdi
xorl %eax, %eax
callq __isoc23_fscanf
addq $4, %r15
cmpq $2048, %r15 # imm = 0x800
jne .LBB2_3
# %bb.4: # %_Z10read_arrayPKci.exit
movq %r14, %rdi
callq fclose
movl $128, %edi
callq malloc
movq %rax, %r14
movl $.L.str.4, %edi
movl $.L.str, %esi
callq fopen
movq %rax, %r15
xorl %r12d, %r12d
.p2align 4, 0x90
.LBB2_5: # %.lr.ph.i44
# =>This Inner Loop Header: Depth=1
leaq (%r14,%r12), %rdx
movl $.L.str.1, %esi
movq %r15, %rdi
xorl %eax, %eax
callq __isoc23_fscanf
addq $4, %r12
cmpq $128, %r12
jne .LBB2_5
# %bb.6: # %_Z10read_arrayPKci.exit48
movq %r15, %rdi
callq fclose
movl $64, %edi
callq malloc
movq %rax, %r12
movl $64, %edi
callq malloc
movq %rax, %r15
xorpd %xmm0, %xmm0
movupd %xmm0, (%rax)
movupd %xmm0, 16(%rax)
movupd %xmm0, 32(%rax)
movupd %xmm0, 48(%rax)
xorl %eax, %eax
movq %rbx, %rcx
.p2align 4, 0x90
.LBB2_7: # %.preheader
# =>This Loop Header: Depth=1
# Child Loop BB2_8 Depth 2
movl (%r15,%rax,4), %edx
xorl %esi, %esi
.p2align 4, 0x90
.LBB2_8: # Parent Loop BB2_7 Depth=1
# => This Inner Loop Header: Depth=2
movl (%r14,%rsi,4), %edi
imull (%rcx,%rsi,4), %edi
addl %edi, %edx
incq %rsi
cmpq $32, %rsi
jne .LBB2_8
# %bb.9: # in Loop: Header=BB2_7 Depth=1
movl %edx, (%r15,%rax,4)
incq %rax
subq $-128, %rcx
cmpq $16, %rax
jne .LBB2_7
# %bb.10:
leaq 32(%rsp), %rdi
movl $2048, %esi # imm = 0x800
callq hipMalloc
leaq 24(%rsp), %rdi
movl $128, %esi
callq hipMalloc
leaq 8(%rsp), %rdi
movl $64, %esi
callq hipMalloc
movq 32(%rsp), %rdi
movl $2048, %edx # imm = 0x800
movq %rbx, %rsi
movl $1, %ecx
callq hipMemcpy
movq 24(%rsp), %rdi
movl $128, %edx
movq %r14, %rsi
movl $1, %ecx
callq hipMemcpy
movq 8(%rsp), %rdi
movl $64, %edx
movq %r12, %rsi
movl $1, %ecx
callq hipMemcpy
movabsq $4294967312, %rdi # imm = 0x100000010
leaq 16(%rdi), %rdx
xorl %r13d, %r13d
movl $1, %esi
movl $1, %ecx
xorl %r8d, %r8d
xorl %r9d, %r9d
callq __hipPushCallConfiguration
testl %eax, %eax
jne .LBB2_12
# %bb.11:
movq 32(%rsp), %rax
movq 24(%rsp), %rcx
movq 8(%rsp), %rdx
movq %rax, 104(%rsp)
movq %rcx, 96(%rsp)
movq %rdx, 88(%rsp)
movl $32, 20(%rsp)
movl $16, 16(%rsp)
leaq 104(%rsp), %rax
movq %rax, 112(%rsp)
leaq 96(%rsp), %rax
movq %rax, 120(%rsp)
leaq 88(%rsp), %rax
movq %rax, 128(%rsp)
leaq 20(%rsp), %rax
movq %rax, 136(%rsp)
leaq 16(%rsp), %rax
movq %rax, 144(%rsp)
leaq 72(%rsp), %rdi
leaq 56(%rsp), %rsi
leaq 48(%rsp), %rdx
leaq 40(%rsp), %rcx
callq __hipPopCallConfiguration
movq 72(%rsp), %rsi
movl 80(%rsp), %edx
movq 56(%rsp), %rcx
movl 64(%rsp), %r8d
leaq 112(%rsp), %r9
movl $_Z5multiPiS_S_ii, %edi
pushq 40(%rsp)
.cfi_adjust_cfa_offset 8
pushq 56(%rsp)
.cfi_adjust_cfa_offset 8
callq hipLaunchKernel
addq $16, %rsp
.cfi_adjust_cfa_offset -16
.LBB2_12:
movq 8(%rsp), %rsi
movl $64, %edx
movq %r12, %rdi
movl $2, %ecx
callq hipMemcpy
xorpd %xmm2, %xmm2
xorl %ebp, %ebp
jmp .LBB2_13
.p2align 4, 0x90
.LBB2_15: # %call.sqrt
# in Loop: Header=BB2_13 Depth=1
callq sqrt
xorpd %xmm2, %xmm2
.LBB2_16: # %.split
# in Loop: Header=BB2_13 Depth=1
xorps %xmm1, %xmm1
cvtsi2sd %r13d, %xmm1
addsd %xmm0, %xmm1
cvttsd2si %xmm1, %r13d
incq %rbp
cmpq $16, %rbp
je .LBB2_17
.LBB2_13: # =>This Inner Loop Header: Depth=1
movl (%r12,%rbp,4), %eax
subl (%r15,%rbp,4), %eax
imull %eax, %eax
xorps %xmm0, %xmm0
cvtsi2sd %eax, %xmm0
ucomisd %xmm2, %xmm0
jb .LBB2_15
# %bb.14: # in Loop: Header=BB2_13 Depth=1
sqrtsd %xmm0, %xmm0
jmp .LBB2_16
.LBB2_1:
movl $.L.str.2, %edi
xorl %eax, %eax
callq printf
movl $-1, %ebp
jmp .LBB2_18
.LBB2_17:
movl 60(%r12), %edx
xorl %ebp, %ebp
movl $.L.str.5, %edi
movl %r13d, %esi
xorl %eax, %eax
callq printf
movq %r15, %rdi
callq free
movq %r14, %rdi
callq free
movq %rbx, %rdi
callq free
.LBB2_18:
movl %ebp, %eax
addq $152, %rsp
.cfi_def_cfa_offset 56
popq %rbx
.cfi_def_cfa_offset 48
popq %r12
.cfi_def_cfa_offset 40
popq %r13
.cfi_def_cfa_offset 32
popq %r14
.cfi_def_cfa_offset 24
popq %r15
.cfi_def_cfa_offset 16
popq %rbp
.cfi_def_cfa_offset 8
retq
.Lfunc_end2:
.size main, .Lfunc_end2-main
.cfi_endproc
# -- End function
.p2align 4, 0x90 # -- Begin function __hip_module_ctor
.type __hip_module_ctor,@function
__hip_module_ctor: # @__hip_module_ctor
.cfi_startproc
# %bb.0:
subq $40, %rsp
.cfi_def_cfa_offset 48
cmpq $0, __hip_gpubin_handle(%rip)
jne .LBB3_2
# %bb.1:
movl $__hip_fatbin_wrapper, %edi
callq __hipRegisterFatBinary
movq %rax, __hip_gpubin_handle(%rip)
.LBB3_2:
movq __hip_gpubin_handle(%rip), %rdi
xorps %xmm0, %xmm0
movups %xmm0, 16(%rsp)
movups %xmm0, (%rsp)
movl $_Z5multiPiS_S_ii, %esi
movl $.L__unnamed_1, %edx
movl $.L__unnamed_1, %ecx
movl $-1, %r8d
xorl %r9d, %r9d
callq __hipRegisterFunction
movl $__hip_module_dtor, %edi
addq $40, %rsp
.cfi_def_cfa_offset 8
jmp atexit # TAILCALL
.Lfunc_end3:
.size __hip_module_ctor, .Lfunc_end3-__hip_module_ctor
.cfi_endproc
# -- End function
.p2align 4, 0x90 # -- Begin function __hip_module_dtor
.type __hip_module_dtor,@function
__hip_module_dtor: # @__hip_module_dtor
.cfi_startproc
# %bb.0:
movq __hip_gpubin_handle(%rip), %rdi
testq %rdi, %rdi
je .LBB4_2
# %bb.1:
pushq %rax
.cfi_def_cfa_offset 16
callq __hipUnregisterFatBinary
movq $0, __hip_gpubin_handle(%rip)
addq $8, %rsp
.cfi_def_cfa_offset 8
.LBB4_2:
retq
.Lfunc_end4:
.size __hip_module_dtor, .Lfunc_end4-__hip_module_dtor
.cfi_endproc
# -- End function
.type _Z5multiPiS_S_ii,@object # @_Z5multiPiS_S_ii
.section .rodata,"a",@progbits
.globl _Z5multiPiS_S_ii
.p2align 3, 0x0
_Z5multiPiS_S_ii:
.quad _Z20__device_stub__multiPiS_S_ii
.size _Z5multiPiS_S_ii, 8
.type .L.str,@object # @.str
.section .rodata.str1.1,"aMS",@progbits,1
.L.str:
.asciz "r"
.size .L.str, 2
.type .L.str.1,@object # @.str.1
.L.str.1:
.asciz "%d"
.size .L.str.1, 3
.type .L.str.2,@object # @.str.2
.L.str.2:
.asciz "Invalid argument Usage: ./problem1"
.size .L.str.2, 35
.type .L.str.3,@object # @.str.3
.L.str.3:
.asciz "inputA.inp"
.size .L.str.3, 11
.type .L.str.4,@object # @.str.4
.L.str.4:
.asciz "inputB.inp"
.size .L.str.4, 11
.type .L.str.5,@object # @.str.5
.L.str.5:
.asciz "%d\n%d"
.size .L.str.5, 6
.type .L__unnamed_1,@object # @0
.L__unnamed_1:
.asciz "_Z5multiPiS_S_ii"
.size .L__unnamed_1, 17
.type __hip_fatbin_wrapper,@object # @__hip_fatbin_wrapper
.section .hipFatBinSegment,"a",@progbits
.p2align 3, 0x0
__hip_fatbin_wrapper:
.long 1212764230 # 0x48495046
.long 1 # 0x1
.quad __hip_fatbin
.quad 0
.size __hip_fatbin_wrapper, 24
.type __hip_gpubin_handle,@object # @__hip_gpubin_handle
.local __hip_gpubin_handle
.comm __hip_gpubin_handle,8,8
.section .init_array,"aw",@init_array
.p2align 3, 0x0
.quad __hip_module_ctor
.type __hip_cuid_,@object # @__hip_cuid_
.bss
.globl __hip_cuid_
__hip_cuid_:
.byte 0 # 0x0
.size __hip_cuid_, 1
.section ".linker-options","e",@llvm_linker_options
.ident "AMD clang version 18.0.0git (https://github.com/RadeonOpenCompute/llvm-project roc-6.3.2 25012 e5bf7e55c91490b07c49d8960fa7983d864936c4)"
.section ".note.GNU-stack","",@progbits
.addrsig
.addrsig_sym _Z20__device_stub__multiPiS_S_ii
.addrsig_sym __hip_module_ctor
.addrsig_sym __hip_module_dtor
.addrsig_sym _Z5multiPiS_S_ii
.addrsig_sym __hip_fatbin
.addrsig_sym __hip_fatbin_wrapper
.addrsig_sym __hip_cuid_ |
You are a helpful coding assistant specialized in converting CUDA source code to CUDA host assembly. | #include <stdio.h>
#include <cuda_runtime.h>
// reference
// https://devblogs.nvidia.com/maximizing-unified-memory-performance-cuda/
#define CHECK(call) { \
const cudaError_t error = call; \
if (error != cudaSuccess) { \
printf("Error: %s:%d, ", __FILE__, __LINE__); \
printf("code: %d, reason: %s\n", error, cudaGetErrorString(error)); \
exit(1); \
} \
} \
#define PAGE_STRIDE 65536 // page size: 64K -> 65536 bytes
template <typename data_type>
__global__ void stream_thread(data_type *input, data_type *output, const int n);
template <typename data_type>
__global__ void stream_warp(data_type *input, data_type *output, const int n);
void initialData(float *ip, const int n);
void verifyResult(float *result, float *reference, const int n);
int main(int argc, char **argv) {
int n = 1<<20;
size_t nBytes = n * sizeof(float);
// set up device
int dev = 0;
cudaDeviceProp deviceProp;
CHECK(cudaGetDeviceProperties(&deviceProp, dev));
printf("Using Device %d: %s\n", dev, deviceProp.name);
CHECK(cudaSetDevice(dev));
// allocate unified memory
float *in, *out;
CHECK(cudaMallocManaged((float**)&in, nBytes));
CHECK(cudaMallocManaged((float**)&out, nBytes));
CHECK(cudaMemPrefetchAsync(in, nBytes, cudaCpuDeviceId, 0));
initialData(in, n);
// launch kernels
int caseNo = 1;
if (argc > 1) caseNo = atoi(argv[1]);
int blockSize = 256;
if (argc > 2) blockSize = atoi(argv[2]);
dim3 block(blockSize);
dim3 grid((n + block.x - 1) / block.x);
int pages = (nBytes + PAGE_STRIDE - 1) / PAGE_STRIDE; // # pages
switch (caseNo) {
case 1: // no pre-fetching; normal kernel
grid.x = (n + block.x - 1) / block.x;
printf("<<< %d, %d >>>\n", grid.x, block.x);
stream_thread<float> <<<grid, block>>> (in, out, n);
break;
case 2: // no pre-fetching; one warp per page
grid.x = (pages * 32 + block.x - 1) / block.x; // # warps = # pages
printf("<<< %d, %d >>>\n", grid.x, block.x);
stream_warp<float> <<<grid, block>>> (in, out, n);
break;
case 3: // pre-fetching; normal kernel
CHECK(cudaMemPrefetchAsync(in, nBytes, dev, 0));
CHECK(cudaMemPrefetchAsync(out, nBytes, dev, 0));
grid.x = (n + block.x - 1) / block.x;
printf("<<< %d, %d >>>\n", grid.x, block.x);
stream_thread<float> <<<grid, block>>> (in, out, n);
break;
}
CHECK(cudaDeviceSynchronize());
CHECK(cudaMemPrefetchAsync(in, nBytes, cudaCpuDeviceId, 0));
CHECK(cudaMemPrefetchAsync(out, nBytes, cudaCpuDeviceId, 0));
verifyResult(out, in, n);
CHECK(cudaGetLastError());
// free memory
CHECK(cudaFree(in));
CHECK(cudaFree(out));
// clean up all resources
CHECK(cudaDeviceReset());
return 0;
}
/**********CUDA kernels**********/
template <typename data_type>
__global__ void stream_thread(data_type *input, data_type *output, const int n) {
int tid = threadIdx.x + blockIdx.x * blockDim.x;
if (tid < n) {
output[tid] = input[tid];
}
}
template <typename data_type>
__global__ void stream_warp(data_type *input, data_type *output, const int n) {
int laneId = threadIdx.x & 31;
int tid = threadIdx.x + blockIdx.x * blockDim.x;
int warpId = tid >> 5;
size_t size = n * sizeof(data_type);
int pages = (size + PAGE_STRIDE - 1) / PAGE_STRIDE; // how many pages
if (warpId < pages) {
#pragma unroll // tell compiler to specifically unroll a loop
for(int rep = 0; rep < PAGE_STRIDE / sizeof(data_type) / 32; rep++) {
int ind = warpId * PAGE_STRIDE / sizeof(data_type) + rep * 32 + laneId;
if (ind < n)
output[ind] = input[ind];
}
}
}
/**********host functions**********/
void initialData(float *ip, const int n) {
for (int i = 0; i < n; i++) {
ip[i] = (float) (rand() & 0xFF) / 10.f;
}
}
void verifyResult(float *result, float *reference, const int n) {
double eps = 1e-8;
bool match = 1;
for (int i = 0; i < n; i++) {
if (abs(result[i] - reference[i]) > eps) {
printf("Arrays do not match:\n");
printf("result %5.2f reference %5.2f at array index %d\n", result[i], reference[i], i);
match = 0;
return;
}
}
if (match) printf("Arrays match!\n");
return;
} | .file "tmpxft_0017d144_00000000-6_unifyMemory2.cudafe1.cpp"
.text
#APP
#NO_APP
.section .text._Z11stream_warpIfEvPT_S1_i,"axG",@progbits,_Z11stream_warpIfEvPT_S1_i,comdat
.weak _Z11stream_warpIfEvPT_S1_i
.type _Z11stream_warpIfEvPT_S1_i, @function
_Z11stream_warpIfEvPT_S1_i:
.LFB2141:
.cfi_startproc
endbr64
subq $136, %rsp
.cfi_def_cfa_offset 144
movq %fs:40, %rax
movq %rax, 120(%rsp)
xorl %eax, %eax
movq %rdi, 16(%rsp)
movq %rsi, 24(%rsp)
movl %edx, 12(%rsp)
leaq 16(%rsp), %rax
movq %rax, 96(%rsp)
leaq 24(%rsp), %rax
movq %rax, 104(%rsp)
leaq 12(%rsp), %rax
movq %rax, 112(%rsp)
movl $1, 48(%rsp)
movl $1, 52(%rsp)
movl $1, 56(%rsp)
movl $1, 60(%rsp)
movl $1, 64(%rsp)
movl $1, 68(%rsp)
leaq 40(%rsp), %rcx
leaq 32(%rsp), %rdx
leaq 60(%rsp), %rsi
leaq 48(%rsp), %rdi
call __cudaPopCallConfiguration@PLT
testl %eax, %eax
je .L5
.L1:
movq 120(%rsp), %rax
subq %fs:40, %rax
jne .L6
addq $136, %rsp
.cfi_remember_state
.cfi_def_cfa_offset 8
ret
.L5:
.cfi_restore_state
pushq 40(%rsp)
.cfi_def_cfa_offset 152
pushq 40(%rsp)
.cfi_def_cfa_offset 160
leaq 112(%rsp), %r9
movq 76(%rsp), %rcx
movl 84(%rsp), %r8d
movq 64(%rsp), %rsi
movl 72(%rsp), %edx
leaq _Z11stream_warpIfEvPT_S1_i(%rip), %rdi
call cudaLaunchKernel@PLT
addq $16, %rsp
.cfi_def_cfa_offset 144
jmp .L1
.L6:
call __stack_chk_fail@PLT
.cfi_endproc
.LFE2141:
.size _Z11stream_warpIfEvPT_S1_i, .-_Z11stream_warpIfEvPT_S1_i
.section .text._Z13stream_threadIfEvPT_S1_i,"axG",@progbits,_Z13stream_threadIfEvPT_S1_i,comdat
.weak _Z13stream_threadIfEvPT_S1_i
.type _Z13stream_threadIfEvPT_S1_i, @function
_Z13stream_threadIfEvPT_S1_i:
.LFB2140:
.cfi_startproc
endbr64
subq $136, %rsp
.cfi_def_cfa_offset 144
movq %fs:40, %rax
movq %rax, 120(%rsp)
xorl %eax, %eax
movq %rdi, 16(%rsp)
movq %rsi, 24(%rsp)
movl %edx, 12(%rsp)
leaq 16(%rsp), %rax
movq %rax, 96(%rsp)
leaq 24(%rsp), %rax
movq %rax, 104(%rsp)
leaq 12(%rsp), %rax
movq %rax, 112(%rsp)
movl $1, 48(%rsp)
movl $1, 52(%rsp)
movl $1, 56(%rsp)
movl $1, 60(%rsp)
movl $1, 64(%rsp)
movl $1, 68(%rsp)
leaq 40(%rsp), %rcx
leaq 32(%rsp), %rdx
leaq 60(%rsp), %rsi
leaq 48(%rsp), %rdi
call __cudaPopCallConfiguration@PLT
testl %eax, %eax
je .L11
.L7:
movq 120(%rsp), %rax
subq %fs:40, %rax
jne .L12
addq $136, %rsp
.cfi_remember_state
.cfi_def_cfa_offset 8
ret
.L11:
.cfi_restore_state
pushq 40(%rsp)
.cfi_def_cfa_offset 152
pushq 40(%rsp)
.cfi_def_cfa_offset 160
leaq 112(%rsp), %r9
movq 76(%rsp), %rcx
movl 84(%rsp), %r8d
movq 64(%rsp), %rsi
movl 72(%rsp), %edx
leaq _Z13stream_threadIfEvPT_S1_i(%rip), %rdi
call cudaLaunchKernel@PLT
addq $16, %rsp
.cfi_def_cfa_offset 144
jmp .L7
.L12:
call __stack_chk_fail@PLT
.cfi_endproc
.LFE2140:
.size _Z13stream_threadIfEvPT_S1_i, .-_Z13stream_threadIfEvPT_S1_i
.text
.type _ZL26__cudaUnregisterBinaryUtilv, @function
_ZL26__cudaUnregisterBinaryUtilv:
.LFB2066:
.cfi_startproc
endbr64
subq $8, %rsp
.cfi_def_cfa_offset 16
movq _ZL20__cudaFatCubinHandle(%rip), %rdi
call __cudaUnregisterFatBinary@PLT
addq $8, %rsp
.cfi_def_cfa_offset 8
ret
.cfi_endproc
.LFE2066:
.size _ZL26__cudaUnregisterBinaryUtilv, .-_ZL26__cudaUnregisterBinaryUtilv
.globl _Z11initialDataPfi
.type _Z11initialDataPfi, @function
_Z11initialDataPfi:
.LFB2062:
.cfi_startproc
endbr64
testl %esi, %esi
jle .L20
pushq %rbp
.cfi_def_cfa_offset 16
.cfi_offset 6, -16
pushq %rbx
.cfi_def_cfa_offset 24
.cfi_offset 3, -24
subq $8, %rsp
.cfi_def_cfa_offset 32
movq %rdi, %rbx
movslq %esi, %rsi
leaq (%rdi,%rsi,4), %rbp
.L17:
call rand@PLT
movzbl %al, %eax
pxor %xmm0, %xmm0
cvtsi2ssl %eax, %xmm0
divss .LC0(%rip), %xmm0
movss %xmm0, (%rbx)
addq $4, %rbx
cmpq %rbp, %rbx
jne .L17
addq $8, %rsp
.cfi_def_cfa_offset 24
popq %rbx
.cfi_def_cfa_offset 16
popq %rbp
.cfi_def_cfa_offset 8
ret
.L20:
.cfi_restore 3
.cfi_restore 6
ret
.cfi_endproc
.LFE2062:
.size _Z11initialDataPfi, .-_Z11initialDataPfi
.section .rodata.str1.1,"aMS",@progbits,1
.LC3:
.string "Arrays do not match:\n"
.section .rodata.str1.8,"aMS",@progbits,1
.align 8
.LC4:
.string "result %5.2f reference %5.2f at array index %d\n"
.section .rodata.str1.1
.LC5:
.string "Arrays match!\n"
.text
.globl _Z12verifyResultPfS_i
.type _Z12verifyResultPfS_i, @function
_Z12verifyResultPfS_i:
.LFB2063:
.cfi_startproc
endbr64
pushq %r12
.cfi_def_cfa_offset 16
.cfi_offset 12, -16
pushq %rbp
.cfi_def_cfa_offset 24
.cfi_offset 6, -24
pushq %rbx
.cfi_def_cfa_offset 32
.cfi_offset 3, -32
testl %edx, %edx
jle .L24
movq %rdi, %rbp
movq %rsi, %rbx
movl $0, %r12d
movss .LC1(%rip), %xmm2
movsd .LC2(%rip), %xmm1
.L28:
movss 0(%rbp), %xmm0
subss (%rbx), %xmm0
andps %xmm2, %xmm0
cvtss2sd %xmm0, %xmm0
comisd %xmm1, %xmm0
ja .L33
addl $1, %r12d
addq $4, %rbp
addq $4, %rbx
cmpl %r12d, %edx
jne .L28
.L24:
leaq .LC5(%rip), %rsi
movl $2, %edi
movl $0, %eax
call __printf_chk@PLT
.L23:
popq %rbx
.cfi_remember_state
.cfi_def_cfa_offset 24
popq %rbp
.cfi_def_cfa_offset 16
popq %r12
.cfi_def_cfa_offset 8
ret
.L33:
.cfi_restore_state
leaq .LC3(%rip), %rsi
movl $2, %edi
movl $0, %eax
call __printf_chk@PLT
pxor %xmm0, %xmm0
cvtss2sd 0(%rbp), %xmm0
movl %r12d, %edx
pxor %xmm1, %xmm1
cvtss2sd (%rbx), %xmm1
leaq .LC4(%rip), %rsi
movl $2, %edi
movl $2, %eax
call __printf_chk@PLT
jmp .L23
.cfi_endproc
.LFE2063:
.size _Z12verifyResultPfS_i, .-_Z12verifyResultPfS_i
.section .rodata.str1.8
.align 8
.LC6:
.string "/home/ubuntu/Datasets/stackv2/train-structured/SaoYan/Learning_CUDA/master/Ch4/unifyMemory2.cu"
.section .rodata.str1.1
.LC7:
.string "Error: %s:%d, "
.LC8:
.string "code: %d, reason: %s\n"
.LC9:
.string "Using Device %d: %s\n"
.LC10:
.string "<<< %d, %d >>>\n"
.text
.globl main
.type main, @function
main:
.LFB2057:
.cfi_startproc
endbr64
pushq %r13
.cfi_def_cfa_offset 16
.cfi_offset 13, -16
pushq %r12
.cfi_def_cfa_offset 24
.cfi_offset 12, -24
pushq %rbp
.cfi_def_cfa_offset 32
.cfi_offset 6, -32
pushq %rbx
.cfi_def_cfa_offset 40
.cfi_offset 3, -40
subq $1096, %rsp
.cfi_def_cfa_offset 1136
movl %edi, %ebx
movq %rsi, %r13
movq %fs:40, %rax
movq %rax, 1080(%rsp)
xorl %eax, %eax
leaq 48(%rsp), %rdi
movl $0, %esi
call cudaGetDeviceProperties_v2@PLT
testl %eax, %eax
jne .L59
leaq 48(%rsp), %rcx
movl $0, %edx
leaq .LC9(%rip), %rsi
movl $2, %edi
movl $0, %eax
call __printf_chk@PLT
movl $0, %edi
call cudaSetDevice@PLT
movl %eax, %ebp
testl %eax, %eax
jne .L60
leaq 8(%rsp), %rdi
movl $1, %edx
movl $4194304, %esi
call cudaMallocManaged@PLT
movl %eax, %ebp
testl %eax, %eax
jne .L61
leaq 16(%rsp), %rdi
movl $1, %edx
movl $4194304, %esi
call cudaMallocManaged@PLT
movl %eax, %ebp
testl %eax, %eax
jne .L62
movl $0, %ecx
movl $-1, %edx
movl $4194304, %esi
movq 8(%rsp), %rdi
call cudaMemPrefetchAsync@PLT
movl %eax, %ebp
testl %eax, %eax
jne .L63
movl $1048576, %esi
movq 8(%rsp), %rdi
call _Z11initialDataPfi
cmpl $1, %ebx
jg .L64
movl $1, 28(%rsp)
movl $1, 32(%rsp)
movl $1, 40(%rsp)
movl $1, 44(%rsp)
movl $4096, %r13d
movl $256, %ebp
.L44:
movl %ebp, %ecx
movl %r13d, %edx
leaq .LC10(%rip), %rsi
movl $2, %edi
movl $0, %eax
call __printf_chk@PLT
movl %r13d, 36(%rsp)
movl %ebp, 24(%rsp)
movl 32(%rsp), %ecx
movl $0, %r9d
movl $0, %r8d
movq 24(%rsp), %rdx
movq 36(%rsp), %rdi
movl 44(%rsp), %esi
call __cudaPushCallConfiguration@PLT
testl %eax, %eax
je .L65
.L43:
call cudaDeviceSynchronize@PLT
movl %eax, %ebx
testl %eax, %eax
jne .L66
movl $0, %ecx
movl $-1, %edx
movl $4194304, %esi
movq 8(%rsp), %rdi
call cudaMemPrefetchAsync@PLT
movl %eax, %ebx
testl %eax, %eax
jne .L67
movl $0, %ecx
movl $-1, %edx
movl $4194304, %esi
movq 16(%rsp), %rdi
call cudaMemPrefetchAsync@PLT
movl %eax, %ebx
testl %eax, %eax
jne .L68
movl $1048576, %edx
movq 8(%rsp), %rsi
movq 16(%rsp), %rdi
call _Z12verifyResultPfS_i
call cudaGetLastError@PLT
movl %eax, %ebx
testl %eax, %eax
jne .L69
movq 8(%rsp), %rdi
call cudaFree@PLT
movl %eax, %ebx
testl %eax, %eax
jne .L70
movq 16(%rsp), %rdi
call cudaFree@PLT
movl %eax, %ebx
testl %eax, %eax
jne .L71
call cudaDeviceReset@PLT
movl %eax, %ebx
testl %eax, %eax
jne .L72
movq 1080(%rsp), %rax
subq %fs:40, %rax
jne .L73
movl $0, %eax
addq $1096, %rsp
.cfi_remember_state
.cfi_def_cfa_offset 40
popq %rbx
.cfi_def_cfa_offset 32
popq %rbp
.cfi_def_cfa_offset 24
popq %r12
.cfi_def_cfa_offset 16
popq %r13
.cfi_def_cfa_offset 8
ret
.L59:
.cfi_restore_state
movl %eax, %ebp
movl $34, %ecx
leaq .LC6(%rip), %rdx
leaq .LC7(%rip), %rsi
movl $2, %edi
movl $0, %eax
call __printf_chk@PLT
movl %ebp, %edi
call cudaGetErrorString@PLT
movq %rax, %rcx
movl %ebp, %edx
leaq .LC8(%rip), %rsi
movl $2, %edi
movl $0, %eax
call __printf_chk@PLT
movl $1, %edi
call exit@PLT
.L60:
movl $36, %ecx
leaq .LC6(%rip), %rdx
leaq .LC7(%rip), %rsi
movl $2, %edi
movl $0, %eax
call __printf_chk@PLT
movl %ebp, %edi
call cudaGetErrorString@PLT
movq %rax, %rcx
movl %ebp, %edx
leaq .LC8(%rip), %rsi
movl $2, %edi
movl $0, %eax
call __printf_chk@PLT
movl $1, %edi
call exit@PLT
.L61:
movl $40, %ecx
leaq .LC6(%rip), %rdx
leaq .LC7(%rip), %rsi
movl $2, %edi
movl $0, %eax
call __printf_chk@PLT
movl %ebp, %edi
call cudaGetErrorString@PLT
movq %rax, %rcx
movl %ebp, %edx
leaq .LC8(%rip), %rsi
movl $2, %edi
movl $0, %eax
call __printf_chk@PLT
movl $1, %edi
call exit@PLT
.L62:
movl $41, %ecx
leaq .LC6(%rip), %rdx
leaq .LC7(%rip), %rsi
movl $2, %edi
movl $0, %eax
call __printf_chk@PLT
movl %ebp, %edi
call cudaGetErrorString@PLT
movq %rax, %rcx
movl %ebp, %edx
leaq .LC8(%rip), %rsi
movl $2, %edi
movl $0, %eax
call __printf_chk@PLT
movl $1, %edi
call exit@PLT
.L63:
movl $42, %ecx
leaq .LC6(%rip), %rdx
leaq .LC7(%rip), %rsi
movl $2, %edi
movl $0, %eax
call __printf_chk@PLT
movl %ebp, %edi
call cudaGetErrorString@PLT
movq %rax, %rcx
movl %ebp, %edx
leaq .LC8(%rip), %rsi
movl $2, %edi
movl $0, %eax
call __printf_chk@PLT
movl $1, %edi
call exit@PLT
.L64:
movq 8(%r13), %rdi
movl $10, %edx
movl $0, %esi
call __isoc23_strtol@PLT
movq %rax, %r12
movl $256, %eax
cmpl $2, %ebx
jg .L74
.L41:
movl %eax, %ebp
movl $1, 28(%rsp)
movl $1, 32(%rsp)
addl $1048575, %eax
movl $0, %edx
divl %ebp
movl %eax, %ebx
movl %eax, %r13d
movl $1, 40(%rsp)
movl $1, 44(%rsp)
cmpl $3, %r12d
je .L42
jg .L43
cmpl $1, %r12d
je .L44
cmpl $2, %r12d
jne .L43
leal 2047(%rbp), %eax
movl $0, %edx
divl %ebp
movl %eax, %ebx
movl %ebp, %ecx
movl %eax, %edx
leaq .LC10(%rip), %rsi
movl $2, %edi
movl $0, %eax
call __printf_chk@PLT
movl %ebx, 36(%rsp)
movl %ebp, 24(%rsp)
movl 32(%rsp), %ecx
movl $0, %r9d
movl $0, %r8d
movq 24(%rsp), %rdx
movq 36(%rsp), %rdi
movl 44(%rsp), %esi
call __cudaPushCallConfiguration@PLT
testl %eax, %eax
jne .L43
movl $1048576, %edx
movq 16(%rsp), %rsi
movq 8(%rsp), %rdi
call _Z11stream_warpIfEvPT_S1_i
jmp .L43
.L74:
movq 16(%r13), %rdi
movl $10, %edx
movl $0, %esi
call __isoc23_strtol@PLT
jmp .L41
.L65:
movl $1048576, %edx
movq 16(%rsp), %rsi
movq 8(%rsp), %rdi
call _Z13stream_threadIfEvPT_S1_i
jmp .L43
.L42:
movl $0, %ecx
movl $0, %edx
movl $4194304, %esi
movq 8(%rsp), %rdi
call cudaMemPrefetchAsync@PLT
movl %eax, %r12d
testl %eax, %eax
jne .L75
movl $0, %ecx
movl $0, %edx
movl $4194304, %esi
movq 16(%rsp), %rdi
call cudaMemPrefetchAsync@PLT
movl %eax, %r12d
testl %eax, %eax
jne .L76
movl %ebp, %ecx
movl %ebx, %edx
leaq .LC10(%rip), %rsi
movl $2, %edi
movl $0, %eax
call __printf_chk@PLT
movl %ebx, 36(%rsp)
movl %ebp, 24(%rsp)
movl 32(%rsp), %ecx
movl $0, %r9d
movl $0, %r8d
movq 24(%rsp), %rdx
movq 36(%rsp), %rdi
movl 44(%rsp), %esi
call __cudaPushCallConfiguration@PLT
testl %eax, %eax
jne .L43
movl $1048576, %edx
movq 16(%rsp), %rsi
movq 8(%rsp), %rdi
call _Z13stream_threadIfEvPT_S1_i
jmp .L43
.L75:
movl $65, %ecx
leaq .LC6(%rip), %rdx
leaq .LC7(%rip), %rsi
movl $2, %edi
movl $0, %eax
call __printf_chk@PLT
movl %r12d, %edi
call cudaGetErrorString@PLT
movq %rax, %rcx
movl %r12d, %edx
leaq .LC8(%rip), %rsi
movl $2, %edi
movl $0, %eax
call __printf_chk@PLT
movl $1, %edi
call exit@PLT
.L76:
movl $66, %ecx
leaq .LC6(%rip), %rdx
leaq .LC7(%rip), %rsi
movl $2, %edi
movl $0, %eax
call __printf_chk@PLT
movl %r12d, %edi
call cudaGetErrorString@PLT
movq %rax, %rcx
movl %r12d, %edx
leaq .LC8(%rip), %rsi
movl $2, %edi
movl $0, %eax
call __printf_chk@PLT
movl $1, %edi
call exit@PLT
.L66:
movl $72, %ecx
leaq .LC6(%rip), %rdx
leaq .LC7(%rip), %rsi
movl $2, %edi
movl $0, %eax
call __printf_chk@PLT
movl %ebx, %edi
call cudaGetErrorString@PLT
movq %rax, %rcx
movl %ebx, %edx
leaq .LC8(%rip), %rsi
movl $2, %edi
movl $0, %eax
call __printf_chk@PLT
movl $1, %edi
call exit@PLT
.L67:
movl $73, %ecx
leaq .LC6(%rip), %rdx
leaq .LC7(%rip), %rsi
movl $2, %edi
movl $0, %eax
call __printf_chk@PLT
movl %ebx, %edi
call cudaGetErrorString@PLT
movq %rax, %rcx
movl %ebx, %edx
leaq .LC8(%rip), %rsi
movl $2, %edi
movl $0, %eax
call __printf_chk@PLT
movl $1, %edi
call exit@PLT
.L68:
movl $74, %ecx
leaq .LC6(%rip), %rdx
leaq .LC7(%rip), %rsi
movl $2, %edi
movl $0, %eax
call __printf_chk@PLT
movl %ebx, %edi
call cudaGetErrorString@PLT
movq %rax, %rcx
movl %ebx, %edx
leaq .LC8(%rip), %rsi
movl $2, %edi
movl $0, %eax
call __printf_chk@PLT
movl $1, %edi
call exit@PLT
.L69:
movl $76, %ecx
leaq .LC6(%rip), %rdx
leaq .LC7(%rip), %rsi
movl $2, %edi
movl $0, %eax
call __printf_chk@PLT
movl %ebx, %edi
call cudaGetErrorString@PLT
movq %rax, %rcx
movl %ebx, %edx
leaq .LC8(%rip), %rsi
movl $2, %edi
movl $0, %eax
call __printf_chk@PLT
movl $1, %edi
call exit@PLT
.L70:
movl $79, %ecx
leaq .LC6(%rip), %rdx
leaq .LC7(%rip), %rsi
movl $2, %edi
movl $0, %eax
call __printf_chk@PLT
movl %ebx, %edi
call cudaGetErrorString@PLT
movq %rax, %rcx
movl %ebx, %edx
leaq .LC8(%rip), %rsi
movl $2, %edi
movl $0, %eax
call __printf_chk@PLT
movl $1, %edi
call exit@PLT
.L71:
movl $80, %ecx
leaq .LC6(%rip), %rdx
leaq .LC7(%rip), %rsi
movl $2, %edi
movl $0, %eax
call __printf_chk@PLT
movl %ebx, %edi
call cudaGetErrorString@PLT
movq %rax, %rcx
movl %ebx, %edx
leaq .LC8(%rip), %rsi
movl $2, %edi
movl $0, %eax
call __printf_chk@PLT
movl $1, %edi
call exit@PLT
.L72:
movl $83, %ecx
leaq .LC6(%rip), %rdx
leaq .LC7(%rip), %rsi
movl $2, %edi
movl $0, %eax
call __printf_chk@PLT
movl %ebx, %edi
call cudaGetErrorString@PLT
movq %rax, %rcx
movl %ebx, %edx
leaq .LC8(%rip), %rsi
movl $2, %edi
movl $0, %eax
call __printf_chk@PLT
movl $1, %edi
call exit@PLT
.L73:
call __stack_chk_fail@PLT
.cfi_endproc
.LFE2057:
.size main, .-main
.section .rodata.str1.1
.LC11:
.string "_Z11stream_warpIfEvPT_S1_i"
.LC12:
.string "_Z13stream_threadIfEvPT_S1_i"
.text
.type _ZL24__sti____cudaRegisterAllv, @function
_ZL24__sti____cudaRegisterAllv:
.LFB2093:
.cfi_startproc
endbr64
pushq %rbx
.cfi_def_cfa_offset 16
.cfi_offset 3, -16
leaq _ZL15__fatDeviceText(%rip), %rdi
call __cudaRegisterFatBinary@PLT
movq %rax, %rbx
movq %rax, _ZL20__cudaFatCubinHandle(%rip)
pushq $0
.cfi_def_cfa_offset 24
pushq $0
.cfi_def_cfa_offset 32
pushq $0
.cfi_def_cfa_offset 40
pushq $0
.cfi_def_cfa_offset 48
movl $0, %r9d
movl $-1, %r8d
leaq .LC11(%rip), %rdx
movq %rdx, %rcx
leaq _Z11stream_warpIfEvPT_S1_i(%rip), %rsi
movq %rax, %rdi
call __cudaRegisterFunction@PLT
addq $32, %rsp
.cfi_def_cfa_offset 16
pushq $0
.cfi_def_cfa_offset 24
pushq $0
.cfi_def_cfa_offset 32
pushq $0
.cfi_def_cfa_offset 40
pushq $0
.cfi_def_cfa_offset 48
movl $0, %r9d
movl $-1, %r8d
leaq .LC12(%rip), %rdx
movq %rdx, %rcx
leaq _Z13stream_threadIfEvPT_S1_i(%rip), %rsi
movq %rbx, %rdi
call __cudaRegisterFunction@PLT
addq $32, %rsp
.cfi_def_cfa_offset 16
movq _ZL20__cudaFatCubinHandle(%rip), %rdi
call __cudaRegisterFatBinaryEnd@PLT
leaq _ZL26__cudaUnregisterBinaryUtilv(%rip), %rdi
call atexit@PLT
popq %rbx
.cfi_def_cfa_offset 8
ret
.cfi_endproc
.LFE2093:
.size _ZL24__sti____cudaRegisterAllv, .-_ZL24__sti____cudaRegisterAllv
.section .init_array,"aw"
.align 8
.quad _ZL24__sti____cudaRegisterAllv
.section .nvFatBinSegment,"aw"
.align 8
.type _ZL15__fatDeviceText, @object
.size _ZL15__fatDeviceText, 24
_ZL15__fatDeviceText:
.long 1180844977
.long 1
.quad fatbinData
.quad 0
.local _ZL20__cudaFatCubinHandle
.comm _ZL20__cudaFatCubinHandle,8,8
.section .rodata.cst4,"aM",@progbits,4
.align 4
.LC0:
.long 1092616192
.section .rodata.cst16,"aM",@progbits,16
.align 16
.LC1:
.long 2147483647
.long 0
.long 0
.long 0
.section .rodata.cst8,"aM",@progbits,8
.align 8
.LC2:
.long -500134854
.long 1044740494
.ident "GCC: (Ubuntu 13.3.0-6ubuntu2~24.04) 13.3.0"
.section .note.GNU-stack,"",@progbits
.section .note.gnu.property,"a"
.align 8
.long 1f - 0f
.long 4f - 1f
.long 5
0:
.string "GNU"
1:
.align 8
.long 0xc0000002
.long 3f - 2f
2:
.long 0x3
3:
.align 8
4: |
You are a helpful coding assistant specialized in converting CUDA source code to HIP/AMD source code. | #include <stdio.h>
#include <cuda_runtime.h>
// reference
// https://devblogs.nvidia.com/maximizing-unified-memory-performance-cuda/
#define CHECK(call) { \
const cudaError_t error = call; \
if (error != cudaSuccess) { \
printf("Error: %s:%d, ", __FILE__, __LINE__); \
printf("code: %d, reason: %s\n", error, cudaGetErrorString(error)); \
exit(1); \
} \
} \
#define PAGE_STRIDE 65536 // page size: 64K -> 65536 bytes
template <typename data_type>
__global__ void stream_thread(data_type *input, data_type *output, const int n);
template <typename data_type>
__global__ void stream_warp(data_type *input, data_type *output, const int n);
void initialData(float *ip, const int n);
void verifyResult(float *result, float *reference, const int n);
int main(int argc, char **argv) {
int n = 1<<20;
size_t nBytes = n * sizeof(float);
// set up device
int dev = 0;
cudaDeviceProp deviceProp;
CHECK(cudaGetDeviceProperties(&deviceProp, dev));
printf("Using Device %d: %s\n", dev, deviceProp.name);
CHECK(cudaSetDevice(dev));
// allocate unified memory
float *in, *out;
CHECK(cudaMallocManaged((float**)&in, nBytes));
CHECK(cudaMallocManaged((float**)&out, nBytes));
CHECK(cudaMemPrefetchAsync(in, nBytes, cudaCpuDeviceId, 0));
initialData(in, n);
// launch kernels
int caseNo = 1;
if (argc > 1) caseNo = atoi(argv[1]);
int blockSize = 256;
if (argc > 2) blockSize = atoi(argv[2]);
dim3 block(blockSize);
dim3 grid((n + block.x - 1) / block.x);
int pages = (nBytes + PAGE_STRIDE - 1) / PAGE_STRIDE; // # pages
switch (caseNo) {
case 1: // no pre-fetching; normal kernel
grid.x = (n + block.x - 1) / block.x;
printf("<<< %d, %d >>>\n", grid.x, block.x);
stream_thread<float> <<<grid, block>>> (in, out, n);
break;
case 2: // no pre-fetching; one warp per page
grid.x = (pages * 32 + block.x - 1) / block.x; // # warps = # pages
printf("<<< %d, %d >>>\n", grid.x, block.x);
stream_warp<float> <<<grid, block>>> (in, out, n);
break;
case 3: // pre-fetching; normal kernel
CHECK(cudaMemPrefetchAsync(in, nBytes, dev, 0));
CHECK(cudaMemPrefetchAsync(out, nBytes, dev, 0));
grid.x = (n + block.x - 1) / block.x;
printf("<<< %d, %d >>>\n", grid.x, block.x);
stream_thread<float> <<<grid, block>>> (in, out, n);
break;
}
CHECK(cudaDeviceSynchronize());
CHECK(cudaMemPrefetchAsync(in, nBytes, cudaCpuDeviceId, 0));
CHECK(cudaMemPrefetchAsync(out, nBytes, cudaCpuDeviceId, 0));
verifyResult(out, in, n);
CHECK(cudaGetLastError());
// free memory
CHECK(cudaFree(in));
CHECK(cudaFree(out));
// clean up all resources
CHECK(cudaDeviceReset());
return 0;
}
/**********CUDA kernels**********/
template <typename data_type>
__global__ void stream_thread(data_type *input, data_type *output, const int n) {
int tid = threadIdx.x + blockIdx.x * blockDim.x;
if (tid < n) {
output[tid] = input[tid];
}
}
template <typename data_type>
__global__ void stream_warp(data_type *input, data_type *output, const int n) {
int laneId = threadIdx.x & 31;
int tid = threadIdx.x + blockIdx.x * blockDim.x;
int warpId = tid >> 5;
size_t size = n * sizeof(data_type);
int pages = (size + PAGE_STRIDE - 1) / PAGE_STRIDE; // how many pages
if (warpId < pages) {
#pragma unroll // tell compiler to specifically unroll a loop
for(int rep = 0; rep < PAGE_STRIDE / sizeof(data_type) / 32; rep++) {
int ind = warpId * PAGE_STRIDE / sizeof(data_type) + rep * 32 + laneId;
if (ind < n)
output[ind] = input[ind];
}
}
}
/**********host functions**********/
void initialData(float *ip, const int n) {
for (int i = 0; i < n; i++) {
ip[i] = (float) (rand() & 0xFF) / 10.f;
}
}
void verifyResult(float *result, float *reference, const int n) {
double eps = 1e-8;
bool match = 1;
for (int i = 0; i < n; i++) {
if (abs(result[i] - reference[i]) > eps) {
printf("Arrays do not match:\n");
printf("result %5.2f reference %5.2f at array index %d\n", result[i], reference[i], i);
match = 0;
return;
}
}
if (match) printf("Arrays match!\n");
return;
} | #include <stdio.h>
#include <hip/hip_runtime.h>
// reference
// https://devblogs.nvidia.com/maximizing-unified-memory-performance-cuda/
#define CHECK(call) { \
const hipError_t error = call; \
if (error != hipSuccess) { \
printf("Error: %s:%d, ", __FILE__, __LINE__); \
printf("code: %d, reason: %s\n", error, hipGetErrorString(error)); \
exit(1); \
} \
} \
#define PAGE_STRIDE 65536 // page size: 64K -> 65536 bytes
template <typename data_type>
__global__ void stream_thread(data_type *input, data_type *output, const int n);
template <typename data_type>
__global__ void stream_warp(data_type *input, data_type *output, const int n);
void initialData(float *ip, const int n);
void verifyResult(float *result, float *reference, const int n);
int main(int argc, char **argv) {
int n = 1<<20;
size_t nBytes = n * sizeof(float);
// set up device
int dev = 0;
hipDeviceProp_t deviceProp;
CHECK(hipGetDeviceProperties(&deviceProp, dev));
printf("Using Device %d: %s\n", dev, deviceProp.name);
CHECK(hipSetDevice(dev));
// allocate unified memory
float *in, *out;
CHECK(hipMallocManaged((float**)&in, nBytes));
CHECK(hipMallocManaged((float**)&out, nBytes));
CHECK(hipMemPrefetchAsync(in, nBytes, hipCpuDeviceId, 0));
initialData(in, n);
// launch kernels
int caseNo = 1;
if (argc > 1) caseNo = atoi(argv[1]);
int blockSize = 256;
if (argc > 2) blockSize = atoi(argv[2]);
dim3 block(blockSize);
dim3 grid((n + block.x - 1) / block.x);
int pages = (nBytes + PAGE_STRIDE - 1) / PAGE_STRIDE; // # pages
switch (caseNo) {
case 1: // no pre-fetching; normal kernel
grid.x = (n + block.x - 1) / block.x;
printf("<<< %d, %d >>>\n", grid.x, block.x);
stream_thread<float> <<<grid, block>>> (in, out, n);
break;
case 2: // no pre-fetching; one warp per page
grid.x = (pages * 32 + block.x - 1) / block.x; // # warps = # pages
printf("<<< %d, %d >>>\n", grid.x, block.x);
stream_warp<float> <<<grid, block>>> (in, out, n);
break;
case 3: // pre-fetching; normal kernel
CHECK(hipMemPrefetchAsync(in, nBytes, dev, 0));
CHECK(hipMemPrefetchAsync(out, nBytes, dev, 0));
grid.x = (n + block.x - 1) / block.x;
printf("<<< %d, %d >>>\n", grid.x, block.x);
stream_thread<float> <<<grid, block>>> (in, out, n);
break;
}
CHECK(hipDeviceSynchronize());
CHECK(hipMemPrefetchAsync(in, nBytes, hipCpuDeviceId, 0));
CHECK(hipMemPrefetchAsync(out, nBytes, hipCpuDeviceId, 0));
verifyResult(out, in, n);
CHECK(hipGetLastError());
// free memory
CHECK(hipFree(in));
CHECK(hipFree(out));
// clean up all resources
CHECK(hipDeviceReset());
return 0;
}
/**********CUDA kernels**********/
template <typename data_type>
__global__ void stream_thread(data_type *input, data_type *output, const int n) {
int tid = threadIdx.x + blockIdx.x * blockDim.x;
if (tid < n) {
output[tid] = input[tid];
}
}
template <typename data_type>
__global__ void stream_warp(data_type *input, data_type *output, const int n) {
int laneId = threadIdx.x & 31;
int tid = threadIdx.x + blockIdx.x * blockDim.x;
int warpId = tid >> 5;
size_t size = n * sizeof(data_type);
int pages = (size + PAGE_STRIDE - 1) / PAGE_STRIDE; // how many pages
if (warpId < pages) {
#pragma unroll // tell compiler to specifically unroll a loop
for(int rep = 0; rep < PAGE_STRIDE / sizeof(data_type) / 32; rep++) {
int ind = warpId * PAGE_STRIDE / sizeof(data_type) + rep * 32 + laneId;
if (ind < n)
output[ind] = input[ind];
}
}
}
/**********host functions**********/
void initialData(float *ip, const int n) {
for (int i = 0; i < n; i++) {
ip[i] = (float) (rand() & 0xFF) / 10.f;
}
}
void verifyResult(float *result, float *reference, const int n) {
double eps = 1e-8;
bool match = 1;
for (int i = 0; i < n; i++) {
if (abs(result[i] - reference[i]) > eps) {
printf("Arrays do not match:\n");
printf("result %5.2f reference %5.2f at array index %d\n", result[i], reference[i], i);
match = 0;
return;
}
}
if (match) printf("Arrays match!\n");
return;
} |
You are a helpful coding assistant specialized in converting HIP source code to AMD host assembly. | #include <stdio.h>
#include <hip/hip_runtime.h>
// reference
// https://devblogs.nvidia.com/maximizing-unified-memory-performance-cuda/
#define CHECK(call) { \
const hipError_t error = call; \
if (error != hipSuccess) { \
printf("Error: %s:%d, ", __FILE__, __LINE__); \
printf("code: %d, reason: %s\n", error, hipGetErrorString(error)); \
exit(1); \
} \
} \
#define PAGE_STRIDE 65536 // page size: 64K -> 65536 bytes
template <typename data_type>
__global__ void stream_thread(data_type *input, data_type *output, const int n);
template <typename data_type>
__global__ void stream_warp(data_type *input, data_type *output, const int n);
void initialData(float *ip, const int n);
void verifyResult(float *result, float *reference, const int n);
int main(int argc, char **argv) {
int n = 1<<20;
size_t nBytes = n * sizeof(float);
// set up device
int dev = 0;
hipDeviceProp_t deviceProp;
CHECK(hipGetDeviceProperties(&deviceProp, dev));
printf("Using Device %d: %s\n", dev, deviceProp.name);
CHECK(hipSetDevice(dev));
// allocate unified memory
float *in, *out;
CHECK(hipMallocManaged((float**)&in, nBytes));
CHECK(hipMallocManaged((float**)&out, nBytes));
CHECK(hipMemPrefetchAsync(in, nBytes, hipCpuDeviceId, 0));
initialData(in, n);
// launch kernels
int caseNo = 1;
if (argc > 1) caseNo = atoi(argv[1]);
int blockSize = 256;
if (argc > 2) blockSize = atoi(argv[2]);
dim3 block(blockSize);
dim3 grid((n + block.x - 1) / block.x);
int pages = (nBytes + PAGE_STRIDE - 1) / PAGE_STRIDE; // # pages
switch (caseNo) {
case 1: // no pre-fetching; normal kernel
grid.x = (n + block.x - 1) / block.x;
printf("<<< %d, %d >>>\n", grid.x, block.x);
stream_thread<float> <<<grid, block>>> (in, out, n);
break;
case 2: // no pre-fetching; one warp per page
grid.x = (pages * 32 + block.x - 1) / block.x; // # warps = # pages
printf("<<< %d, %d >>>\n", grid.x, block.x);
stream_warp<float> <<<grid, block>>> (in, out, n);
break;
case 3: // pre-fetching; normal kernel
CHECK(hipMemPrefetchAsync(in, nBytes, dev, 0));
CHECK(hipMemPrefetchAsync(out, nBytes, dev, 0));
grid.x = (n + block.x - 1) / block.x;
printf("<<< %d, %d >>>\n", grid.x, block.x);
stream_thread<float> <<<grid, block>>> (in, out, n);
break;
}
CHECK(hipDeviceSynchronize());
CHECK(hipMemPrefetchAsync(in, nBytes, hipCpuDeviceId, 0));
CHECK(hipMemPrefetchAsync(out, nBytes, hipCpuDeviceId, 0));
verifyResult(out, in, n);
CHECK(hipGetLastError());
// free memory
CHECK(hipFree(in));
CHECK(hipFree(out));
// clean up all resources
CHECK(hipDeviceReset());
return 0;
}
/**********CUDA kernels**********/
template <typename data_type>
__global__ void stream_thread(data_type *input, data_type *output, const int n) {
int tid = threadIdx.x + blockIdx.x * blockDim.x;
if (tid < n) {
output[tid] = input[tid];
}
}
template <typename data_type>
__global__ void stream_warp(data_type *input, data_type *output, const int n) {
int laneId = threadIdx.x & 31;
int tid = threadIdx.x + blockIdx.x * blockDim.x;
int warpId = tid >> 5;
size_t size = n * sizeof(data_type);
int pages = (size + PAGE_STRIDE - 1) / PAGE_STRIDE; // how many pages
if (warpId < pages) {
#pragma unroll // tell compiler to specifically unroll a loop
for(int rep = 0; rep < PAGE_STRIDE / sizeof(data_type) / 32; rep++) {
int ind = warpId * PAGE_STRIDE / sizeof(data_type) + rep * 32 + laneId;
if (ind < n)
output[ind] = input[ind];
}
}
}
/**********host functions**********/
void initialData(float *ip, const int n) {
for (int i = 0; i < n; i++) {
ip[i] = (float) (rand() & 0xFF) / 10.f;
}
}
void verifyResult(float *result, float *reference, const int n) {
double eps = 1e-8;
bool match = 1;
for (int i = 0; i < n; i++) {
if (abs(result[i] - reference[i]) > eps) {
printf("Arrays do not match:\n");
printf("result %5.2f reference %5.2f at array index %d\n", result[i], reference[i], i);
match = 0;
return;
}
}
if (match) printf("Arrays match!\n");
return;
} | .text
.file "unifyMemory2.hip"
.section .rodata.cst4,"aM",@progbits,4
.p2align 2, 0x0 # -- Begin function main
.LCPI0_0:
.long 0x41200000 # float 10
.section .rodata.cst16,"aM",@progbits,16
.p2align 4, 0x0
.LCPI0_1:
.long 0x7fffffff # float NaN
.long 0x7fffffff # float NaN
.long 0x7fffffff # float NaN
.long 0x7fffffff # float NaN
.section .rodata.cst8,"aM",@progbits,8
.p2align 3, 0x0
.LCPI0_2:
.quad 0x3e45798ee2308c3a # double 1.0E-8
.text
.globl main
.p2align 4, 0x90
.type main,@function
main: # @main
.cfi_startproc
# %bb.0:
pushq %rbp
.cfi_def_cfa_offset 16
pushq %r15
.cfi_def_cfa_offset 24
pushq %r14
.cfi_def_cfa_offset 32
pushq %r12
.cfi_def_cfa_offset 40
pushq %rbx
.cfi_def_cfa_offset 48
subq $1600, %rsp # imm = 0x640
.cfi_def_cfa_offset 1648
.cfi_offset %rbx, -48
.cfi_offset %r12, -40
.cfi_offset %r14, -32
.cfi_offset %r15, -24
.cfi_offset %rbp, -16
movq %rsi, %r14
movl %edi, %ebp
leaq 128(%rsp), %rdi
xorl %esi, %esi
callq hipGetDevicePropertiesR0600
testl %eax, %eax
jne .LBB0_1
# %bb.3:
leaq 128(%rsp), %rdx
movl $.L.str.3, %edi
xorl %esi, %esi
xorl %eax, %eax
callq printf
xorl %edi, %edi
callq hipSetDevice
testl %eax, %eax
jne .LBB0_4
# %bb.5:
leaq 16(%rsp), %rdi
movl $4194304, %esi # imm = 0x400000
movl $1, %edx
callq hipMallocManaged
testl %eax, %eax
jne .LBB0_6
# %bb.7:
leaq 24(%rsp), %rdi
movl $4194304, %esi # imm = 0x400000
movl $1, %edx
callq hipMallocManaged
testl %eax, %eax
jne .LBB0_8
# %bb.9:
movq 16(%rsp), %rdi
movl $4194304, %esi # imm = 0x400000
movl $-1, %edx
xorl %ecx, %ecx
callq hipMemPrefetchAsync
testl %eax, %eax
jne .LBB0_10
# %bb.11:
movq 16(%rsp), %rbx
xorl %r15d, %r15d
.p2align 4, 0x90
.LBB0_12: # %.lr.ph.i
# =>This Inner Loop Header: Depth=1
callq rand
movzbl %al, %eax
xorps %xmm0, %xmm0
cvtsi2ss %eax, %xmm0
divss .LCPI0_0(%rip), %xmm0
movss %xmm0, (%rbx,%r15,4)
incq %r15
cmpq $1048576, %r15 # imm = 0x100000
jne .LBB0_12
# %bb.13: # %_Z11initialDataPfi.exit
movl $1, %r12d
cmpl $2, %ebp
jl .LBB0_15
# %bb.14:
movq 8(%r14), %rdi
xorl %esi, %esi
movl $10, %edx
callq __isoc23_strtol
movq %rax, %r12
.LBB0_15:
movabsq $4294967296, %rbx # imm = 0x100000000
cmpl $3, %ebp
jl .LBB0_16
# %bb.17:
movq 16(%r14), %rdi
xorl %esi, %esi
movl $10, %edx
callq __isoc23_strtol
movl %eax, %r14d
orq %rbx, %r14
jmp .LBB0_18
.LBB0_16:
leaq 256(%rbx), %r14
.LBB0_18:
leal 1048575(%r14), %eax
xorl %edx, %edx
divl %r14d
movl %eax, %r15d
cmpl $3, %r12d
je .LBB0_28
# %bb.19:
cmpl $2, %r12d
je .LBB0_26
# %bb.20:
cmpl $1, %r12d
je .LBB0_21
jmp .LBB0_24
.LBB0_26:
leal 2047(%r14), %eax
xorl %edx, %edx
divl %r14d
# kill: def $eax killed $eax def $rax
orq %rax, %rbx
movl $.L.str.4, %edi
movl %eax, %esi
movl %r14d, %edx
xorl %eax, %eax
callq printf
movq %rbx, %rdi
movl $1, %esi
movq %r14, %rdx
movl $1, %ecx
xorl %r8d, %r8d
xorl %r9d, %r9d
callq __hipPushCallConfiguration
testl %eax, %eax
jne .LBB0_24
# %bb.27:
movq 16(%rsp), %rax
movq 24(%rsp), %rcx
movq %rax, 88(%rsp)
movq %rcx, 80(%rsp)
movl $1048576, 12(%rsp) # imm = 0x100000
leaq 88(%rsp), %rax
movq %rax, 96(%rsp)
leaq 80(%rsp), %rax
movq %rax, 104(%rsp)
leaq 12(%rsp), %rax
movq %rax, 112(%rsp)
leaq 64(%rsp), %rdi
leaq 48(%rsp), %rsi
leaq 40(%rsp), %rdx
leaq 32(%rsp), %rcx
callq __hipPopCallConfiguration
movq 64(%rsp), %rsi
movl 72(%rsp), %edx
movq 48(%rsp), %rcx
movl 56(%rsp), %r8d
leaq 96(%rsp), %r9
movl $_Z11stream_warpIfEvPT_S1_i, %edi
jmp .LBB0_23
.LBB0_28:
movq 16(%rsp), %rdi
movl $4194304, %esi # imm = 0x400000
xorl %edx, %edx
xorl %ecx, %ecx
callq hipMemPrefetchAsync
testl %eax, %eax
jne .LBB0_29
# %bb.30:
movq 24(%rsp), %rdi
movl $4194304, %esi # imm = 0x400000
xorl %edx, %edx
xorl %ecx, %ecx
callq hipMemPrefetchAsync
testl %eax, %eax
jne .LBB0_31
.LBB0_21:
orq %r15, %rbx
movl $.L.str.4, %edi
movl %r15d, %esi
movl %r14d, %edx
xorl %eax, %eax
callq printf
movq %rbx, %rdi
movl $1, %esi
movq %r14, %rdx
movl $1, %ecx
xorl %r8d, %r8d
xorl %r9d, %r9d
callq __hipPushCallConfiguration
testl %eax, %eax
jne .LBB0_24
# %bb.22:
movq 16(%rsp), %rax
movq 24(%rsp), %rcx
movq %rax, 88(%rsp)
movq %rcx, 80(%rsp)
movl $1048576, 12(%rsp) # imm = 0x100000
leaq 88(%rsp), %rax
movq %rax, 96(%rsp)
leaq 80(%rsp), %rax
movq %rax, 104(%rsp)
leaq 12(%rsp), %rax
movq %rax, 112(%rsp)
leaq 64(%rsp), %rdi
leaq 48(%rsp), %rsi
leaq 40(%rsp), %rdx
leaq 32(%rsp), %rcx
callq __hipPopCallConfiguration
movq 64(%rsp), %rsi
movl 72(%rsp), %edx
movq 48(%rsp), %rcx
movl 56(%rsp), %r8d
leaq 96(%rsp), %r9
movl $_Z13stream_threadIfEvPT_S1_i, %edi
.LBB0_23:
pushq 32(%rsp)
.cfi_adjust_cfa_offset 8
pushq 48(%rsp)
.cfi_adjust_cfa_offset 8
callq hipLaunchKernel
addq $16, %rsp
.cfi_adjust_cfa_offset -16
.LBB0_24:
callq hipDeviceSynchronize
testl %eax, %eax
jne .LBB0_25
# %bb.32:
movq 16(%rsp), %rdi
movl $4194304, %esi # imm = 0x400000
movl $-1, %edx
xorl %ecx, %ecx
callq hipMemPrefetchAsync
testl %eax, %eax
jne .LBB0_33
# %bb.34:
movq 24(%rsp), %rdi
movl $4194304, %esi # imm = 0x400000
movl $-1, %edx
xorl %ecx, %ecx
callq hipMemPrefetchAsync
testl %eax, %eax
jne .LBB0_35
# %bb.36:
movq 24(%rsp), %r15
movq 16(%rsp), %r14
xorl %ebx, %ebx
movaps .LCPI0_1(%rip), %xmm0 # xmm0 = [NaN,NaN,NaN,NaN]
movsd .LCPI0_2(%rip), %xmm1 # xmm1 = mem[0],zero
.p2align 4, 0x90
.LBB0_37: # %.lr.ph.i135
# =>This Inner Loop Header: Depth=1
movss (%r15,%rbx,4), %xmm2 # xmm2 = mem[0],zero,zero,zero
subss (%r14,%rbx,4), %xmm2
andps %xmm0, %xmm2
cvtss2sd %xmm2, %xmm2
ucomisd %xmm1, %xmm2
ja .LBB0_38
# %bb.39: # in Loop: Header=BB0_37 Depth=1
incq %rbx
cmpq $1048576, %rbx # imm = 0x100000
jne .LBB0_37
# %bb.40: # %.critedge.i
movl $.Lstr.1, %edi
callq puts@PLT
jmp .LBB0_41
.LBB0_38:
movl $.Lstr, %edi
callq puts@PLT
movss (%r15,%rbx,4), %xmm0 # xmm0 = mem[0],zero,zero,zero
cvtss2sd %xmm0, %xmm0
movss (%r14,%rbx,4), %xmm1 # xmm1 = mem[0],zero,zero,zero
cvtss2sd %xmm1, %xmm1
movl $.L.str.6, %edi
movl %ebx, %esi
movb $2, %al
callq printf
.LBB0_41: # %_Z12verifyResultPfS_i.exit
callq hipGetLastError
testl %eax, %eax
jne .LBB0_42
# %bb.43:
movq 16(%rsp), %rdi
callq hipFree
testl %eax, %eax
jne .LBB0_44
# %bb.45:
movq 24(%rsp), %rdi
callq hipFree
testl %eax, %eax
jne .LBB0_46
# %bb.47:
callq hipDeviceReset
testl %eax, %eax
jne .LBB0_48
# %bb.49:
xorl %eax, %eax
addq $1600, %rsp # imm = 0x640
.cfi_def_cfa_offset 48
popq %rbx
.cfi_def_cfa_offset 40
popq %r12
.cfi_def_cfa_offset 32
popq %r14
.cfi_def_cfa_offset 24
popq %r15
.cfi_def_cfa_offset 16
popq %rbp
.cfi_def_cfa_offset 8
retq
.LBB0_1:
.cfi_def_cfa_offset 1648
movl $.L.str, %edi
movl $.L.str.1, %esi
movl $34, %edx
jmp .LBB0_2
.LBB0_4:
movl $.L.str, %edi
movl $.L.str.1, %esi
movl $36, %edx
jmp .LBB0_2
.LBB0_6:
movl $.L.str, %edi
movl $.L.str.1, %esi
movl $40, %edx
jmp .LBB0_2
.LBB0_8:
movl $.L.str, %edi
movl $.L.str.1, %esi
movl $41, %edx
jmp .LBB0_2
.LBB0_10:
movl $.L.str, %edi
movl $.L.str.1, %esi
movl $42, %edx
jmp .LBB0_2
.LBB0_25:
movl $.L.str, %edi
movl $.L.str.1, %esi
movl $72, %edx
jmp .LBB0_2
.LBB0_33:
movl $.L.str, %edi
movl $.L.str.1, %esi
movl $73, %edx
jmp .LBB0_2
.LBB0_35:
movl $.L.str, %edi
movl $.L.str.1, %esi
movl $74, %edx
jmp .LBB0_2
.LBB0_42:
movl $.L.str, %edi
movl $.L.str.1, %esi
movl $76, %edx
jmp .LBB0_2
.LBB0_44:
movl $.L.str, %edi
movl $.L.str.1, %esi
movl $79, %edx
jmp .LBB0_2
.LBB0_46:
movl $.L.str, %edi
movl $.L.str.1, %esi
movl $80, %edx
jmp .LBB0_2
.LBB0_48:
movl $.L.str, %edi
movl $.L.str.1, %esi
movl $83, %edx
jmp .LBB0_2
.LBB0_29:
movl $.L.str, %edi
movl $.L.str.1, %esi
movl $65, %edx
jmp .LBB0_2
.LBB0_31:
movl $.L.str, %edi
movl $.L.str.1, %esi
movl $66, %edx
.LBB0_2:
movl %eax, %ebx
xorl %eax, %eax
callq printf
movl %ebx, %edi
callq hipGetErrorString
movl $.L.str.2, %edi
movl %ebx, %esi
movq %rax, %rdx
xorl %eax, %eax
callq printf
movl $1, %edi
callq exit
.Lfunc_end0:
.size main, .Lfunc_end0-main
.cfi_endproc
# -- End function
.section .rodata.cst4,"aM",@progbits,4
.p2align 2, 0x0 # -- Begin function _Z11initialDataPfi
.LCPI1_0:
.long 0x41200000 # float 10
.text
.globl _Z11initialDataPfi
.p2align 4, 0x90
.type _Z11initialDataPfi,@function
_Z11initialDataPfi: # @_Z11initialDataPfi
.cfi_startproc
# %bb.0:
testl %esi, %esi
jle .LBB1_4
# %bb.1: # %.lr.ph.preheader
pushq %r15
.cfi_def_cfa_offset 16
pushq %r14
.cfi_def_cfa_offset 24
pushq %rbx
.cfi_def_cfa_offset 32
.cfi_offset %rbx, -32
.cfi_offset %r14, -24
.cfi_offset %r15, -16
movq %rdi, %rbx
movl %esi, %r14d
xorl %r15d, %r15d
.p2align 4, 0x90
.LBB1_2: # %.lr.ph
# =>This Inner Loop Header: Depth=1
callq rand
movzbl %al, %eax
xorps %xmm0, %xmm0
cvtsi2ss %eax, %xmm0
divss .LCPI1_0(%rip), %xmm0
movss %xmm0, (%rbx,%r15,4)
incq %r15
cmpq %r15, %r14
jne .LBB1_2
# %bb.3:
popq %rbx
.cfi_def_cfa_offset 24
popq %r14
.cfi_def_cfa_offset 16
popq %r15
.cfi_def_cfa_offset 8
.cfi_restore %rbx
.cfi_restore %r14
.cfi_restore %r15
.LBB1_4: # %._crit_edge
retq
.Lfunc_end1:
.size _Z11initialDataPfi, .Lfunc_end1-_Z11initialDataPfi
.cfi_endproc
# -- End function
.section .text._Z28__device_stub__stream_threadIfEvPT_S1_i,"axG",@progbits,_Z28__device_stub__stream_threadIfEvPT_S1_i,comdat
.weak _Z28__device_stub__stream_threadIfEvPT_S1_i # -- Begin function _Z28__device_stub__stream_threadIfEvPT_S1_i
.p2align 4, 0x90
.type _Z28__device_stub__stream_threadIfEvPT_S1_i,@function
_Z28__device_stub__stream_threadIfEvPT_S1_i: # @_Z28__device_stub__stream_threadIfEvPT_S1_i
.cfi_startproc
# %bb.0:
subq $104, %rsp
.cfi_def_cfa_offset 112
movq %rdi, 72(%rsp)
movq %rsi, 64(%rsp)
movl %edx, 12(%rsp)
leaq 72(%rsp), %rax
movq %rax, 80(%rsp)
leaq 64(%rsp), %rax
movq %rax, 88(%rsp)
leaq 12(%rsp), %rax
movq %rax, 96(%rsp)
leaq 48(%rsp), %rdi
leaq 32(%rsp), %rsi
leaq 24(%rsp), %rdx
leaq 16(%rsp), %rcx
callq __hipPopCallConfiguration
movq 48(%rsp), %rsi
movl 56(%rsp), %edx
movq 32(%rsp), %rcx
movl 40(%rsp), %r8d
leaq 80(%rsp), %r9
movl $_Z13stream_threadIfEvPT_S1_i, %edi
pushq 16(%rsp)
.cfi_adjust_cfa_offset 8
pushq 32(%rsp)
.cfi_adjust_cfa_offset 8
callq hipLaunchKernel
addq $120, %rsp
.cfi_adjust_cfa_offset -120
retq
.Lfunc_end2:
.size _Z28__device_stub__stream_threadIfEvPT_S1_i, .Lfunc_end2-_Z28__device_stub__stream_threadIfEvPT_S1_i
.cfi_endproc
# -- End function
.section .text._Z26__device_stub__stream_warpIfEvPT_S1_i,"axG",@progbits,_Z26__device_stub__stream_warpIfEvPT_S1_i,comdat
.weak _Z26__device_stub__stream_warpIfEvPT_S1_i # -- Begin function _Z26__device_stub__stream_warpIfEvPT_S1_i
.p2align 4, 0x90
.type _Z26__device_stub__stream_warpIfEvPT_S1_i,@function
_Z26__device_stub__stream_warpIfEvPT_S1_i: # @_Z26__device_stub__stream_warpIfEvPT_S1_i
.cfi_startproc
# %bb.0:
subq $104, %rsp
.cfi_def_cfa_offset 112
movq %rdi, 72(%rsp)
movq %rsi, 64(%rsp)
movl %edx, 12(%rsp)
leaq 72(%rsp), %rax
movq %rax, 80(%rsp)
leaq 64(%rsp), %rax
movq %rax, 88(%rsp)
leaq 12(%rsp), %rax
movq %rax, 96(%rsp)
leaq 48(%rsp), %rdi
leaq 32(%rsp), %rsi
leaq 24(%rsp), %rdx
leaq 16(%rsp), %rcx
callq __hipPopCallConfiguration
movq 48(%rsp), %rsi
movl 56(%rsp), %edx
movq 32(%rsp), %rcx
movl 40(%rsp), %r8d
leaq 80(%rsp), %r9
movl $_Z11stream_warpIfEvPT_S1_i, %edi
pushq 16(%rsp)
.cfi_adjust_cfa_offset 8
pushq 32(%rsp)
.cfi_adjust_cfa_offset 8
callq hipLaunchKernel
addq $120, %rsp
.cfi_adjust_cfa_offset -120
retq
.Lfunc_end3:
.size _Z26__device_stub__stream_warpIfEvPT_S1_i, .Lfunc_end3-_Z26__device_stub__stream_warpIfEvPT_S1_i
.cfi_endproc
# -- End function
.section .rodata.cst16,"aM",@progbits,16
.p2align 4, 0x0 # -- Begin function _Z12verifyResultPfS_i
.LCPI4_0:
.long 0x7fffffff # float NaN
.long 0x7fffffff # float NaN
.long 0x7fffffff # float NaN
.long 0x7fffffff # float NaN
.section .rodata.cst8,"aM",@progbits,8
.p2align 3, 0x0
.LCPI4_1:
.quad 0x3e45798ee2308c3a # double 1.0E-8
.text
.globl _Z12verifyResultPfS_i
.p2align 4, 0x90
.type _Z12verifyResultPfS_i,@function
_Z12verifyResultPfS_i: # @_Z12verifyResultPfS_i
.cfi_startproc
# %bb.0:
pushq %r15
.cfi_def_cfa_offset 16
pushq %r14
.cfi_def_cfa_offset 24
pushq %rbx
.cfi_def_cfa_offset 32
.cfi_offset %rbx, -32
.cfi_offset %r14, -24
.cfi_offset %r15, -16
testl %edx, %edx
jle .LBB4_4
# %bb.1: # %.lr.ph.preheader
movl %edx, %eax
xorl %ebx, %ebx
movaps .LCPI4_0(%rip), %xmm0 # xmm0 = [NaN,NaN,NaN,NaN]
movsd .LCPI4_1(%rip), %xmm1 # xmm1 = mem[0],zero
.p2align 4, 0x90
.LBB4_2: # %.lr.ph
# =>This Inner Loop Header: Depth=1
movss (%rdi,%rbx,4), %xmm2 # xmm2 = mem[0],zero,zero,zero
subss (%rsi,%rbx,4), %xmm2
andps %xmm0, %xmm2
cvtss2sd %xmm2, %xmm2
ucomisd %xmm1, %xmm2
ja .LBB4_5
# %bb.3: # in Loop: Header=BB4_2 Depth=1
incq %rbx
cmpq %rbx, %rax
jne .LBB4_2
.LBB4_4: # %.critedge
movl $.Lstr.1, %edi
popq %rbx
.cfi_def_cfa_offset 24
popq %r14
.cfi_def_cfa_offset 16
popq %r15
.cfi_def_cfa_offset 8
jmp puts@PLT # TAILCALL
.LBB4_5:
.cfi_def_cfa_offset 32
movq %rdi, %r14
movl $.Lstr, %edi
movq %rsi, %r15
callq puts@PLT
movss (%r14,%rbx,4), %xmm0 # xmm0 = mem[0],zero,zero,zero
cvtss2sd %xmm0, %xmm0
movss (%r15,%rbx,4), %xmm1 # xmm1 = mem[0],zero,zero,zero
cvtss2sd %xmm1, %xmm1
movl $.L.str.6, %edi
movl %ebx, %esi
movb $2, %al
popq %rbx
.cfi_def_cfa_offset 24
popq %r14
.cfi_def_cfa_offset 16
popq %r15
.cfi_def_cfa_offset 8
jmp printf # TAILCALL
.Lfunc_end4:
.size _Z12verifyResultPfS_i, .Lfunc_end4-_Z12verifyResultPfS_i
.cfi_endproc
# -- End function
.p2align 4, 0x90 # -- Begin function __hip_module_ctor
.type __hip_module_ctor,@function
__hip_module_ctor: # @__hip_module_ctor
.cfi_startproc
# %bb.0:
pushq %rbx
.cfi_def_cfa_offset 16
subq $32, %rsp
.cfi_def_cfa_offset 48
.cfi_offset %rbx, -16
cmpq $0, __hip_gpubin_handle(%rip)
jne .LBB5_2
# %bb.1:
movl $__hip_fatbin_wrapper, %edi
callq __hipRegisterFatBinary
movq %rax, __hip_gpubin_handle(%rip)
.LBB5_2:
movq __hip_gpubin_handle(%rip), %rbx
xorps %xmm0, %xmm0
movups %xmm0, 16(%rsp)
movups %xmm0, (%rsp)
movl $_Z13stream_threadIfEvPT_S1_i, %esi
movl $.L__unnamed_1, %edx
movl $.L__unnamed_1, %ecx
movq %rbx, %rdi
movl $-1, %r8d
xorl %r9d, %r9d
callq __hipRegisterFunction
xorps %xmm0, %xmm0
movups %xmm0, 16(%rsp)
movups %xmm0, (%rsp)
movl $_Z11stream_warpIfEvPT_S1_i, %esi
movl $.L__unnamed_2, %edx
movl $.L__unnamed_2, %ecx
movq %rbx, %rdi
movl $-1, %r8d
xorl %r9d, %r9d
callq __hipRegisterFunction
movl $__hip_module_dtor, %edi
addq $32, %rsp
.cfi_def_cfa_offset 16
popq %rbx
.cfi_def_cfa_offset 8
jmp atexit # TAILCALL
.Lfunc_end5:
.size __hip_module_ctor, .Lfunc_end5-__hip_module_ctor
.cfi_endproc
# -- End function
.p2align 4, 0x90 # -- Begin function __hip_module_dtor
.type __hip_module_dtor,@function
__hip_module_dtor: # @__hip_module_dtor
.cfi_startproc
# %bb.0:
movq __hip_gpubin_handle(%rip), %rdi
testq %rdi, %rdi
je .LBB6_2
# %bb.1:
pushq %rax
.cfi_def_cfa_offset 16
callq __hipUnregisterFatBinary
movq $0, __hip_gpubin_handle(%rip)
addq $8, %rsp
.cfi_def_cfa_offset 8
.LBB6_2:
retq
.Lfunc_end6:
.size __hip_module_dtor, .Lfunc_end6-__hip_module_dtor
.cfi_endproc
# -- End function
.type .L.str,@object # @.str
.section .rodata.str1.1,"aMS",@progbits,1
.L.str:
.asciz "Error: %s:%d, "
.size .L.str, 15
.type .L.str.1,@object # @.str.1
.L.str.1:
.asciz "/home/ubuntu/Datasets/stackv2/train-structured-repos-hip/SaoYan/Learning_CUDA/master/Ch4/unifyMemory2.hip"
.size .L.str.1, 106
.type .L.str.2,@object # @.str.2
.L.str.2:
.asciz "code: %d, reason: %s\n"
.size .L.str.2, 22
.type .L.str.3,@object # @.str.3
.L.str.3:
.asciz "Using Device %d: %s\n"
.size .L.str.3, 21
.type .L.str.4,@object # @.str.4
.L.str.4:
.asciz "<<< %d, %d >>>\n"
.size .L.str.4, 16
.type _Z13stream_threadIfEvPT_S1_i,@object # @_Z13stream_threadIfEvPT_S1_i
.section .rodata,"a",@progbits
.weak _Z13stream_threadIfEvPT_S1_i
.p2align 3, 0x0
_Z13stream_threadIfEvPT_S1_i:
.quad _Z28__device_stub__stream_threadIfEvPT_S1_i
.size _Z13stream_threadIfEvPT_S1_i, 8
.type _Z11stream_warpIfEvPT_S1_i,@object # @_Z11stream_warpIfEvPT_S1_i
.weak _Z11stream_warpIfEvPT_S1_i
.p2align 3, 0x0
_Z11stream_warpIfEvPT_S1_i:
.quad _Z26__device_stub__stream_warpIfEvPT_S1_i
.size _Z11stream_warpIfEvPT_S1_i, 8
.type .L.str.6,@object # @.str.6
.section .rodata.str1.1,"aMS",@progbits,1
.L.str.6:
.asciz "result %5.2f reference %5.2f at array index %d\n"
.size .L.str.6, 48
.type .L__unnamed_1,@object # @0
.L__unnamed_1:
.asciz "_Z13stream_threadIfEvPT_S1_i"
.size .L__unnamed_1, 29
.type .L__unnamed_2,@object # @1
.L__unnamed_2:
.asciz "_Z11stream_warpIfEvPT_S1_i"
.size .L__unnamed_2, 27
.type __hip_fatbin_wrapper,@object # @__hip_fatbin_wrapper
.section .hipFatBinSegment,"a",@progbits
.p2align 3, 0x0
__hip_fatbin_wrapper:
.long 1212764230 # 0x48495046
.long 1 # 0x1
.quad __hip_fatbin
.quad 0
.size __hip_fatbin_wrapper, 24
.type __hip_gpubin_handle,@object # @__hip_gpubin_handle
.local __hip_gpubin_handle
.comm __hip_gpubin_handle,8,8
.section .init_array,"aw",@init_array
.p2align 3, 0x0
.quad __hip_module_ctor
.type __hip_cuid_,@object # @__hip_cuid_
.bss
.globl __hip_cuid_
__hip_cuid_:
.byte 0 # 0x0
.size __hip_cuid_, 1
.type .Lstr,@object # @str
.section .rodata.str1.1,"aMS",@progbits,1
.Lstr:
.asciz "Arrays do not match:"
.size .Lstr, 21
.type .Lstr.1,@object # @str.1
.Lstr.1:
.asciz "Arrays match!"
.size .Lstr.1, 14
.section ".linker-options","e",@llvm_linker_options
.ident "AMD clang version 18.0.0git (https://github.com/RadeonOpenCompute/llvm-project roc-6.3.2 25012 e5bf7e55c91490b07c49d8960fa7983d864936c4)"
.section ".note.GNU-stack","",@progbits
.addrsig
.addrsig_sym _Z28__device_stub__stream_threadIfEvPT_S1_i
.addrsig_sym _Z26__device_stub__stream_warpIfEvPT_S1_i
.addrsig_sym __hip_module_ctor
.addrsig_sym __hip_module_dtor
.addrsig_sym _Z13stream_threadIfEvPT_S1_i
.addrsig_sym _Z11stream_warpIfEvPT_S1_i
.addrsig_sym __hip_fatbin
.addrsig_sym __hip_fatbin_wrapper
.addrsig_sym __hip_cuid_ |
You are a helpful coding assistant specialized in converting from CUDA host assembly to AMD host assembly. | .file "tmpxft_0017d144_00000000-6_unifyMemory2.cudafe1.cpp"
.text
#APP
#NO_APP
.section .text._Z11stream_warpIfEvPT_S1_i,"axG",@progbits,_Z11stream_warpIfEvPT_S1_i,comdat
.weak _Z11stream_warpIfEvPT_S1_i
.type _Z11stream_warpIfEvPT_S1_i, @function
_Z11stream_warpIfEvPT_S1_i:
.LFB2141:
.cfi_startproc
endbr64
subq $136, %rsp
.cfi_def_cfa_offset 144
movq %fs:40, %rax
movq %rax, 120(%rsp)
xorl %eax, %eax
movq %rdi, 16(%rsp)
movq %rsi, 24(%rsp)
movl %edx, 12(%rsp)
leaq 16(%rsp), %rax
movq %rax, 96(%rsp)
leaq 24(%rsp), %rax
movq %rax, 104(%rsp)
leaq 12(%rsp), %rax
movq %rax, 112(%rsp)
movl $1, 48(%rsp)
movl $1, 52(%rsp)
movl $1, 56(%rsp)
movl $1, 60(%rsp)
movl $1, 64(%rsp)
movl $1, 68(%rsp)
leaq 40(%rsp), %rcx
leaq 32(%rsp), %rdx
leaq 60(%rsp), %rsi
leaq 48(%rsp), %rdi
call __cudaPopCallConfiguration@PLT
testl %eax, %eax
je .L5
.L1:
movq 120(%rsp), %rax
subq %fs:40, %rax
jne .L6
addq $136, %rsp
.cfi_remember_state
.cfi_def_cfa_offset 8
ret
.L5:
.cfi_restore_state
pushq 40(%rsp)
.cfi_def_cfa_offset 152
pushq 40(%rsp)
.cfi_def_cfa_offset 160
leaq 112(%rsp), %r9
movq 76(%rsp), %rcx
movl 84(%rsp), %r8d
movq 64(%rsp), %rsi
movl 72(%rsp), %edx
leaq _Z11stream_warpIfEvPT_S1_i(%rip), %rdi
call cudaLaunchKernel@PLT
addq $16, %rsp
.cfi_def_cfa_offset 144
jmp .L1
.L6:
call __stack_chk_fail@PLT
.cfi_endproc
.LFE2141:
.size _Z11stream_warpIfEvPT_S1_i, .-_Z11stream_warpIfEvPT_S1_i
.section .text._Z13stream_threadIfEvPT_S1_i,"axG",@progbits,_Z13stream_threadIfEvPT_S1_i,comdat
.weak _Z13stream_threadIfEvPT_S1_i
.type _Z13stream_threadIfEvPT_S1_i, @function
_Z13stream_threadIfEvPT_S1_i:
.LFB2140:
.cfi_startproc
endbr64
subq $136, %rsp
.cfi_def_cfa_offset 144
movq %fs:40, %rax
movq %rax, 120(%rsp)
xorl %eax, %eax
movq %rdi, 16(%rsp)
movq %rsi, 24(%rsp)
movl %edx, 12(%rsp)
leaq 16(%rsp), %rax
movq %rax, 96(%rsp)
leaq 24(%rsp), %rax
movq %rax, 104(%rsp)
leaq 12(%rsp), %rax
movq %rax, 112(%rsp)
movl $1, 48(%rsp)
movl $1, 52(%rsp)
movl $1, 56(%rsp)
movl $1, 60(%rsp)
movl $1, 64(%rsp)
movl $1, 68(%rsp)
leaq 40(%rsp), %rcx
leaq 32(%rsp), %rdx
leaq 60(%rsp), %rsi
leaq 48(%rsp), %rdi
call __cudaPopCallConfiguration@PLT
testl %eax, %eax
je .L11
.L7:
movq 120(%rsp), %rax
subq %fs:40, %rax
jne .L12
addq $136, %rsp
.cfi_remember_state
.cfi_def_cfa_offset 8
ret
.L11:
.cfi_restore_state
pushq 40(%rsp)
.cfi_def_cfa_offset 152
pushq 40(%rsp)
.cfi_def_cfa_offset 160
leaq 112(%rsp), %r9
movq 76(%rsp), %rcx
movl 84(%rsp), %r8d
movq 64(%rsp), %rsi
movl 72(%rsp), %edx
leaq _Z13stream_threadIfEvPT_S1_i(%rip), %rdi
call cudaLaunchKernel@PLT
addq $16, %rsp
.cfi_def_cfa_offset 144
jmp .L7
.L12:
call __stack_chk_fail@PLT
.cfi_endproc
.LFE2140:
.size _Z13stream_threadIfEvPT_S1_i, .-_Z13stream_threadIfEvPT_S1_i
.text
.type _ZL26__cudaUnregisterBinaryUtilv, @function
_ZL26__cudaUnregisterBinaryUtilv:
.LFB2066:
.cfi_startproc
endbr64
subq $8, %rsp
.cfi_def_cfa_offset 16
movq _ZL20__cudaFatCubinHandle(%rip), %rdi
call __cudaUnregisterFatBinary@PLT
addq $8, %rsp
.cfi_def_cfa_offset 8
ret
.cfi_endproc
.LFE2066:
.size _ZL26__cudaUnregisterBinaryUtilv, .-_ZL26__cudaUnregisterBinaryUtilv
.globl _Z11initialDataPfi
.type _Z11initialDataPfi, @function
_Z11initialDataPfi:
.LFB2062:
.cfi_startproc
endbr64
testl %esi, %esi
jle .L20
pushq %rbp
.cfi_def_cfa_offset 16
.cfi_offset 6, -16
pushq %rbx
.cfi_def_cfa_offset 24
.cfi_offset 3, -24
subq $8, %rsp
.cfi_def_cfa_offset 32
movq %rdi, %rbx
movslq %esi, %rsi
leaq (%rdi,%rsi,4), %rbp
.L17:
call rand@PLT
movzbl %al, %eax
pxor %xmm0, %xmm0
cvtsi2ssl %eax, %xmm0
divss .LC0(%rip), %xmm0
movss %xmm0, (%rbx)
addq $4, %rbx
cmpq %rbp, %rbx
jne .L17
addq $8, %rsp
.cfi_def_cfa_offset 24
popq %rbx
.cfi_def_cfa_offset 16
popq %rbp
.cfi_def_cfa_offset 8
ret
.L20:
.cfi_restore 3
.cfi_restore 6
ret
.cfi_endproc
.LFE2062:
.size _Z11initialDataPfi, .-_Z11initialDataPfi
.section .rodata.str1.1,"aMS",@progbits,1
.LC3:
.string "Arrays do not match:\n"
.section .rodata.str1.8,"aMS",@progbits,1
.align 8
.LC4:
.string "result %5.2f reference %5.2f at array index %d\n"
.section .rodata.str1.1
.LC5:
.string "Arrays match!\n"
.text
.globl _Z12verifyResultPfS_i
.type _Z12verifyResultPfS_i, @function
_Z12verifyResultPfS_i:
.LFB2063:
.cfi_startproc
endbr64
pushq %r12
.cfi_def_cfa_offset 16
.cfi_offset 12, -16
pushq %rbp
.cfi_def_cfa_offset 24
.cfi_offset 6, -24
pushq %rbx
.cfi_def_cfa_offset 32
.cfi_offset 3, -32
testl %edx, %edx
jle .L24
movq %rdi, %rbp
movq %rsi, %rbx
movl $0, %r12d
movss .LC1(%rip), %xmm2
movsd .LC2(%rip), %xmm1
.L28:
movss 0(%rbp), %xmm0
subss (%rbx), %xmm0
andps %xmm2, %xmm0
cvtss2sd %xmm0, %xmm0
comisd %xmm1, %xmm0
ja .L33
addl $1, %r12d
addq $4, %rbp
addq $4, %rbx
cmpl %r12d, %edx
jne .L28
.L24:
leaq .LC5(%rip), %rsi
movl $2, %edi
movl $0, %eax
call __printf_chk@PLT
.L23:
popq %rbx
.cfi_remember_state
.cfi_def_cfa_offset 24
popq %rbp
.cfi_def_cfa_offset 16
popq %r12
.cfi_def_cfa_offset 8
ret
.L33:
.cfi_restore_state
leaq .LC3(%rip), %rsi
movl $2, %edi
movl $0, %eax
call __printf_chk@PLT
pxor %xmm0, %xmm0
cvtss2sd 0(%rbp), %xmm0
movl %r12d, %edx
pxor %xmm1, %xmm1
cvtss2sd (%rbx), %xmm1
leaq .LC4(%rip), %rsi
movl $2, %edi
movl $2, %eax
call __printf_chk@PLT
jmp .L23
.cfi_endproc
.LFE2063:
.size _Z12verifyResultPfS_i, .-_Z12verifyResultPfS_i
.section .rodata.str1.8
.align 8
.LC6:
.string "/home/ubuntu/Datasets/stackv2/train-structured/SaoYan/Learning_CUDA/master/Ch4/unifyMemory2.cu"
.section .rodata.str1.1
.LC7:
.string "Error: %s:%d, "
.LC8:
.string "code: %d, reason: %s\n"
.LC9:
.string "Using Device %d: %s\n"
.LC10:
.string "<<< %d, %d >>>\n"
.text
.globl main
.type main, @function
main:
.LFB2057:
.cfi_startproc
endbr64
pushq %r13
.cfi_def_cfa_offset 16
.cfi_offset 13, -16
pushq %r12
.cfi_def_cfa_offset 24
.cfi_offset 12, -24
pushq %rbp
.cfi_def_cfa_offset 32
.cfi_offset 6, -32
pushq %rbx
.cfi_def_cfa_offset 40
.cfi_offset 3, -40
subq $1096, %rsp
.cfi_def_cfa_offset 1136
movl %edi, %ebx
movq %rsi, %r13
movq %fs:40, %rax
movq %rax, 1080(%rsp)
xorl %eax, %eax
leaq 48(%rsp), %rdi
movl $0, %esi
call cudaGetDeviceProperties_v2@PLT
testl %eax, %eax
jne .L59
leaq 48(%rsp), %rcx
movl $0, %edx
leaq .LC9(%rip), %rsi
movl $2, %edi
movl $0, %eax
call __printf_chk@PLT
movl $0, %edi
call cudaSetDevice@PLT
movl %eax, %ebp
testl %eax, %eax
jne .L60
leaq 8(%rsp), %rdi
movl $1, %edx
movl $4194304, %esi
call cudaMallocManaged@PLT
movl %eax, %ebp
testl %eax, %eax
jne .L61
leaq 16(%rsp), %rdi
movl $1, %edx
movl $4194304, %esi
call cudaMallocManaged@PLT
movl %eax, %ebp
testl %eax, %eax
jne .L62
movl $0, %ecx
movl $-1, %edx
movl $4194304, %esi
movq 8(%rsp), %rdi
call cudaMemPrefetchAsync@PLT
movl %eax, %ebp
testl %eax, %eax
jne .L63
movl $1048576, %esi
movq 8(%rsp), %rdi
call _Z11initialDataPfi
cmpl $1, %ebx
jg .L64
movl $1, 28(%rsp)
movl $1, 32(%rsp)
movl $1, 40(%rsp)
movl $1, 44(%rsp)
movl $4096, %r13d
movl $256, %ebp
.L44:
movl %ebp, %ecx
movl %r13d, %edx
leaq .LC10(%rip), %rsi
movl $2, %edi
movl $0, %eax
call __printf_chk@PLT
movl %r13d, 36(%rsp)
movl %ebp, 24(%rsp)
movl 32(%rsp), %ecx
movl $0, %r9d
movl $0, %r8d
movq 24(%rsp), %rdx
movq 36(%rsp), %rdi
movl 44(%rsp), %esi
call __cudaPushCallConfiguration@PLT
testl %eax, %eax
je .L65
.L43:
call cudaDeviceSynchronize@PLT
movl %eax, %ebx
testl %eax, %eax
jne .L66
movl $0, %ecx
movl $-1, %edx
movl $4194304, %esi
movq 8(%rsp), %rdi
call cudaMemPrefetchAsync@PLT
movl %eax, %ebx
testl %eax, %eax
jne .L67
movl $0, %ecx
movl $-1, %edx
movl $4194304, %esi
movq 16(%rsp), %rdi
call cudaMemPrefetchAsync@PLT
movl %eax, %ebx
testl %eax, %eax
jne .L68
movl $1048576, %edx
movq 8(%rsp), %rsi
movq 16(%rsp), %rdi
call _Z12verifyResultPfS_i
call cudaGetLastError@PLT
movl %eax, %ebx
testl %eax, %eax
jne .L69
movq 8(%rsp), %rdi
call cudaFree@PLT
movl %eax, %ebx
testl %eax, %eax
jne .L70
movq 16(%rsp), %rdi
call cudaFree@PLT
movl %eax, %ebx
testl %eax, %eax
jne .L71
call cudaDeviceReset@PLT
movl %eax, %ebx
testl %eax, %eax
jne .L72
movq 1080(%rsp), %rax
subq %fs:40, %rax
jne .L73
movl $0, %eax
addq $1096, %rsp
.cfi_remember_state
.cfi_def_cfa_offset 40
popq %rbx
.cfi_def_cfa_offset 32
popq %rbp
.cfi_def_cfa_offset 24
popq %r12
.cfi_def_cfa_offset 16
popq %r13
.cfi_def_cfa_offset 8
ret
.L59:
.cfi_restore_state
movl %eax, %ebp
movl $34, %ecx
leaq .LC6(%rip), %rdx
leaq .LC7(%rip), %rsi
movl $2, %edi
movl $0, %eax
call __printf_chk@PLT
movl %ebp, %edi
call cudaGetErrorString@PLT
movq %rax, %rcx
movl %ebp, %edx
leaq .LC8(%rip), %rsi
movl $2, %edi
movl $0, %eax
call __printf_chk@PLT
movl $1, %edi
call exit@PLT
.L60:
movl $36, %ecx
leaq .LC6(%rip), %rdx
leaq .LC7(%rip), %rsi
movl $2, %edi
movl $0, %eax
call __printf_chk@PLT
movl %ebp, %edi
call cudaGetErrorString@PLT
movq %rax, %rcx
movl %ebp, %edx
leaq .LC8(%rip), %rsi
movl $2, %edi
movl $0, %eax
call __printf_chk@PLT
movl $1, %edi
call exit@PLT
.L61:
movl $40, %ecx
leaq .LC6(%rip), %rdx
leaq .LC7(%rip), %rsi
movl $2, %edi
movl $0, %eax
call __printf_chk@PLT
movl %ebp, %edi
call cudaGetErrorString@PLT
movq %rax, %rcx
movl %ebp, %edx
leaq .LC8(%rip), %rsi
movl $2, %edi
movl $0, %eax
call __printf_chk@PLT
movl $1, %edi
call exit@PLT
.L62:
movl $41, %ecx
leaq .LC6(%rip), %rdx
leaq .LC7(%rip), %rsi
movl $2, %edi
movl $0, %eax
call __printf_chk@PLT
movl %ebp, %edi
call cudaGetErrorString@PLT
movq %rax, %rcx
movl %ebp, %edx
leaq .LC8(%rip), %rsi
movl $2, %edi
movl $0, %eax
call __printf_chk@PLT
movl $1, %edi
call exit@PLT
.L63:
movl $42, %ecx
leaq .LC6(%rip), %rdx
leaq .LC7(%rip), %rsi
movl $2, %edi
movl $0, %eax
call __printf_chk@PLT
movl %ebp, %edi
call cudaGetErrorString@PLT
movq %rax, %rcx
movl %ebp, %edx
leaq .LC8(%rip), %rsi
movl $2, %edi
movl $0, %eax
call __printf_chk@PLT
movl $1, %edi
call exit@PLT
.L64:
movq 8(%r13), %rdi
movl $10, %edx
movl $0, %esi
call __isoc23_strtol@PLT
movq %rax, %r12
movl $256, %eax
cmpl $2, %ebx
jg .L74
.L41:
movl %eax, %ebp
movl $1, 28(%rsp)
movl $1, 32(%rsp)
addl $1048575, %eax
movl $0, %edx
divl %ebp
movl %eax, %ebx
movl %eax, %r13d
movl $1, 40(%rsp)
movl $1, 44(%rsp)
cmpl $3, %r12d
je .L42
jg .L43
cmpl $1, %r12d
je .L44
cmpl $2, %r12d
jne .L43
leal 2047(%rbp), %eax
movl $0, %edx
divl %ebp
movl %eax, %ebx
movl %ebp, %ecx
movl %eax, %edx
leaq .LC10(%rip), %rsi
movl $2, %edi
movl $0, %eax
call __printf_chk@PLT
movl %ebx, 36(%rsp)
movl %ebp, 24(%rsp)
movl 32(%rsp), %ecx
movl $0, %r9d
movl $0, %r8d
movq 24(%rsp), %rdx
movq 36(%rsp), %rdi
movl 44(%rsp), %esi
call __cudaPushCallConfiguration@PLT
testl %eax, %eax
jne .L43
movl $1048576, %edx
movq 16(%rsp), %rsi
movq 8(%rsp), %rdi
call _Z11stream_warpIfEvPT_S1_i
jmp .L43
.L74:
movq 16(%r13), %rdi
movl $10, %edx
movl $0, %esi
call __isoc23_strtol@PLT
jmp .L41
.L65:
movl $1048576, %edx
movq 16(%rsp), %rsi
movq 8(%rsp), %rdi
call _Z13stream_threadIfEvPT_S1_i
jmp .L43
.L42:
movl $0, %ecx
movl $0, %edx
movl $4194304, %esi
movq 8(%rsp), %rdi
call cudaMemPrefetchAsync@PLT
movl %eax, %r12d
testl %eax, %eax
jne .L75
movl $0, %ecx
movl $0, %edx
movl $4194304, %esi
movq 16(%rsp), %rdi
call cudaMemPrefetchAsync@PLT
movl %eax, %r12d
testl %eax, %eax
jne .L76
movl %ebp, %ecx
movl %ebx, %edx
leaq .LC10(%rip), %rsi
movl $2, %edi
movl $0, %eax
call __printf_chk@PLT
movl %ebx, 36(%rsp)
movl %ebp, 24(%rsp)
movl 32(%rsp), %ecx
movl $0, %r9d
movl $0, %r8d
movq 24(%rsp), %rdx
movq 36(%rsp), %rdi
movl 44(%rsp), %esi
call __cudaPushCallConfiguration@PLT
testl %eax, %eax
jne .L43
movl $1048576, %edx
movq 16(%rsp), %rsi
movq 8(%rsp), %rdi
call _Z13stream_threadIfEvPT_S1_i
jmp .L43
.L75:
movl $65, %ecx
leaq .LC6(%rip), %rdx
leaq .LC7(%rip), %rsi
movl $2, %edi
movl $0, %eax
call __printf_chk@PLT
movl %r12d, %edi
call cudaGetErrorString@PLT
movq %rax, %rcx
movl %r12d, %edx
leaq .LC8(%rip), %rsi
movl $2, %edi
movl $0, %eax
call __printf_chk@PLT
movl $1, %edi
call exit@PLT
.L76:
movl $66, %ecx
leaq .LC6(%rip), %rdx
leaq .LC7(%rip), %rsi
movl $2, %edi
movl $0, %eax
call __printf_chk@PLT
movl %r12d, %edi
call cudaGetErrorString@PLT
movq %rax, %rcx
movl %r12d, %edx
leaq .LC8(%rip), %rsi
movl $2, %edi
movl $0, %eax
call __printf_chk@PLT
movl $1, %edi
call exit@PLT
.L66:
movl $72, %ecx
leaq .LC6(%rip), %rdx
leaq .LC7(%rip), %rsi
movl $2, %edi
movl $0, %eax
call __printf_chk@PLT
movl %ebx, %edi
call cudaGetErrorString@PLT
movq %rax, %rcx
movl %ebx, %edx
leaq .LC8(%rip), %rsi
movl $2, %edi
movl $0, %eax
call __printf_chk@PLT
movl $1, %edi
call exit@PLT
.L67:
movl $73, %ecx
leaq .LC6(%rip), %rdx
leaq .LC7(%rip), %rsi
movl $2, %edi
movl $0, %eax
call __printf_chk@PLT
movl %ebx, %edi
call cudaGetErrorString@PLT
movq %rax, %rcx
movl %ebx, %edx
leaq .LC8(%rip), %rsi
movl $2, %edi
movl $0, %eax
call __printf_chk@PLT
movl $1, %edi
call exit@PLT
.L68:
movl $74, %ecx
leaq .LC6(%rip), %rdx
leaq .LC7(%rip), %rsi
movl $2, %edi
movl $0, %eax
call __printf_chk@PLT
movl %ebx, %edi
call cudaGetErrorString@PLT
movq %rax, %rcx
movl %ebx, %edx
leaq .LC8(%rip), %rsi
movl $2, %edi
movl $0, %eax
call __printf_chk@PLT
movl $1, %edi
call exit@PLT
.L69:
movl $76, %ecx
leaq .LC6(%rip), %rdx
leaq .LC7(%rip), %rsi
movl $2, %edi
movl $0, %eax
call __printf_chk@PLT
movl %ebx, %edi
call cudaGetErrorString@PLT
movq %rax, %rcx
movl %ebx, %edx
leaq .LC8(%rip), %rsi
movl $2, %edi
movl $0, %eax
call __printf_chk@PLT
movl $1, %edi
call exit@PLT
.L70:
movl $79, %ecx
leaq .LC6(%rip), %rdx
leaq .LC7(%rip), %rsi
movl $2, %edi
movl $0, %eax
call __printf_chk@PLT
movl %ebx, %edi
call cudaGetErrorString@PLT
movq %rax, %rcx
movl %ebx, %edx
leaq .LC8(%rip), %rsi
movl $2, %edi
movl $0, %eax
call __printf_chk@PLT
movl $1, %edi
call exit@PLT
.L71:
movl $80, %ecx
leaq .LC6(%rip), %rdx
leaq .LC7(%rip), %rsi
movl $2, %edi
movl $0, %eax
call __printf_chk@PLT
movl %ebx, %edi
call cudaGetErrorString@PLT
movq %rax, %rcx
movl %ebx, %edx
leaq .LC8(%rip), %rsi
movl $2, %edi
movl $0, %eax
call __printf_chk@PLT
movl $1, %edi
call exit@PLT
.L72:
movl $83, %ecx
leaq .LC6(%rip), %rdx
leaq .LC7(%rip), %rsi
movl $2, %edi
movl $0, %eax
call __printf_chk@PLT
movl %ebx, %edi
call cudaGetErrorString@PLT
movq %rax, %rcx
movl %ebx, %edx
leaq .LC8(%rip), %rsi
movl $2, %edi
movl $0, %eax
call __printf_chk@PLT
movl $1, %edi
call exit@PLT
.L73:
call __stack_chk_fail@PLT
.cfi_endproc
.LFE2057:
.size main, .-main
.section .rodata.str1.1
.LC11:
.string "_Z11stream_warpIfEvPT_S1_i"
.LC12:
.string "_Z13stream_threadIfEvPT_S1_i"
.text
.type _ZL24__sti____cudaRegisterAllv, @function
_ZL24__sti____cudaRegisterAllv:
.LFB2093:
.cfi_startproc
endbr64
pushq %rbx
.cfi_def_cfa_offset 16
.cfi_offset 3, -16
leaq _ZL15__fatDeviceText(%rip), %rdi
call __cudaRegisterFatBinary@PLT
movq %rax, %rbx
movq %rax, _ZL20__cudaFatCubinHandle(%rip)
pushq $0
.cfi_def_cfa_offset 24
pushq $0
.cfi_def_cfa_offset 32
pushq $0
.cfi_def_cfa_offset 40
pushq $0
.cfi_def_cfa_offset 48
movl $0, %r9d
movl $-1, %r8d
leaq .LC11(%rip), %rdx
movq %rdx, %rcx
leaq _Z11stream_warpIfEvPT_S1_i(%rip), %rsi
movq %rax, %rdi
call __cudaRegisterFunction@PLT
addq $32, %rsp
.cfi_def_cfa_offset 16
pushq $0
.cfi_def_cfa_offset 24
pushq $0
.cfi_def_cfa_offset 32
pushq $0
.cfi_def_cfa_offset 40
pushq $0
.cfi_def_cfa_offset 48
movl $0, %r9d
movl $-1, %r8d
leaq .LC12(%rip), %rdx
movq %rdx, %rcx
leaq _Z13stream_threadIfEvPT_S1_i(%rip), %rsi
movq %rbx, %rdi
call __cudaRegisterFunction@PLT
addq $32, %rsp
.cfi_def_cfa_offset 16
movq _ZL20__cudaFatCubinHandle(%rip), %rdi
call __cudaRegisterFatBinaryEnd@PLT
leaq _ZL26__cudaUnregisterBinaryUtilv(%rip), %rdi
call atexit@PLT
popq %rbx
.cfi_def_cfa_offset 8
ret
.cfi_endproc
.LFE2093:
.size _ZL24__sti____cudaRegisterAllv, .-_ZL24__sti____cudaRegisterAllv
.section .init_array,"aw"
.align 8
.quad _ZL24__sti____cudaRegisterAllv
.section .nvFatBinSegment,"aw"
.align 8
.type _ZL15__fatDeviceText, @object
.size _ZL15__fatDeviceText, 24
_ZL15__fatDeviceText:
.long 1180844977
.long 1
.quad fatbinData
.quad 0
.local _ZL20__cudaFatCubinHandle
.comm _ZL20__cudaFatCubinHandle,8,8
.section .rodata.cst4,"aM",@progbits,4
.align 4
.LC0:
.long 1092616192
.section .rodata.cst16,"aM",@progbits,16
.align 16
.LC1:
.long 2147483647
.long 0
.long 0
.long 0
.section .rodata.cst8,"aM",@progbits,8
.align 8
.LC2:
.long -500134854
.long 1044740494
.ident "GCC: (Ubuntu 13.3.0-6ubuntu2~24.04) 13.3.0"
.section .note.GNU-stack,"",@progbits
.section .note.gnu.property,"a"
.align 8
.long 1f - 0f
.long 4f - 1f
.long 5
0:
.string "GNU"
1:
.align 8
.long 0xc0000002
.long 3f - 2f
2:
.long 0x3
3:
.align 8
4: | .text
.file "unifyMemory2.hip"
.section .rodata.cst4,"aM",@progbits,4
.p2align 2, 0x0 # -- Begin function main
.LCPI0_0:
.long 0x41200000 # float 10
.section .rodata.cst16,"aM",@progbits,16
.p2align 4, 0x0
.LCPI0_1:
.long 0x7fffffff # float NaN
.long 0x7fffffff # float NaN
.long 0x7fffffff # float NaN
.long 0x7fffffff # float NaN
.section .rodata.cst8,"aM",@progbits,8
.p2align 3, 0x0
.LCPI0_2:
.quad 0x3e45798ee2308c3a # double 1.0E-8
.text
.globl main
.p2align 4, 0x90
.type main,@function
main: # @main
.cfi_startproc
# %bb.0:
pushq %rbp
.cfi_def_cfa_offset 16
pushq %r15
.cfi_def_cfa_offset 24
pushq %r14
.cfi_def_cfa_offset 32
pushq %r12
.cfi_def_cfa_offset 40
pushq %rbx
.cfi_def_cfa_offset 48
subq $1600, %rsp # imm = 0x640
.cfi_def_cfa_offset 1648
.cfi_offset %rbx, -48
.cfi_offset %r12, -40
.cfi_offset %r14, -32
.cfi_offset %r15, -24
.cfi_offset %rbp, -16
movq %rsi, %r14
movl %edi, %ebp
leaq 128(%rsp), %rdi
xorl %esi, %esi
callq hipGetDevicePropertiesR0600
testl %eax, %eax
jne .LBB0_1
# %bb.3:
leaq 128(%rsp), %rdx
movl $.L.str.3, %edi
xorl %esi, %esi
xorl %eax, %eax
callq printf
xorl %edi, %edi
callq hipSetDevice
testl %eax, %eax
jne .LBB0_4
# %bb.5:
leaq 16(%rsp), %rdi
movl $4194304, %esi # imm = 0x400000
movl $1, %edx
callq hipMallocManaged
testl %eax, %eax
jne .LBB0_6
# %bb.7:
leaq 24(%rsp), %rdi
movl $4194304, %esi # imm = 0x400000
movl $1, %edx
callq hipMallocManaged
testl %eax, %eax
jne .LBB0_8
# %bb.9:
movq 16(%rsp), %rdi
movl $4194304, %esi # imm = 0x400000
movl $-1, %edx
xorl %ecx, %ecx
callq hipMemPrefetchAsync
testl %eax, %eax
jne .LBB0_10
# %bb.11:
movq 16(%rsp), %rbx
xorl %r15d, %r15d
.p2align 4, 0x90
.LBB0_12: # %.lr.ph.i
# =>This Inner Loop Header: Depth=1
callq rand
movzbl %al, %eax
xorps %xmm0, %xmm0
cvtsi2ss %eax, %xmm0
divss .LCPI0_0(%rip), %xmm0
movss %xmm0, (%rbx,%r15,4)
incq %r15
cmpq $1048576, %r15 # imm = 0x100000
jne .LBB0_12
# %bb.13: # %_Z11initialDataPfi.exit
movl $1, %r12d
cmpl $2, %ebp
jl .LBB0_15
# %bb.14:
movq 8(%r14), %rdi
xorl %esi, %esi
movl $10, %edx
callq __isoc23_strtol
movq %rax, %r12
.LBB0_15:
movabsq $4294967296, %rbx # imm = 0x100000000
cmpl $3, %ebp
jl .LBB0_16
# %bb.17:
movq 16(%r14), %rdi
xorl %esi, %esi
movl $10, %edx
callq __isoc23_strtol
movl %eax, %r14d
orq %rbx, %r14
jmp .LBB0_18
.LBB0_16:
leaq 256(%rbx), %r14
.LBB0_18:
leal 1048575(%r14), %eax
xorl %edx, %edx
divl %r14d
movl %eax, %r15d
cmpl $3, %r12d
je .LBB0_28
# %bb.19:
cmpl $2, %r12d
je .LBB0_26
# %bb.20:
cmpl $1, %r12d
je .LBB0_21
jmp .LBB0_24
.LBB0_26:
leal 2047(%r14), %eax
xorl %edx, %edx
divl %r14d
# kill: def $eax killed $eax def $rax
orq %rax, %rbx
movl $.L.str.4, %edi
movl %eax, %esi
movl %r14d, %edx
xorl %eax, %eax
callq printf
movq %rbx, %rdi
movl $1, %esi
movq %r14, %rdx
movl $1, %ecx
xorl %r8d, %r8d
xorl %r9d, %r9d
callq __hipPushCallConfiguration
testl %eax, %eax
jne .LBB0_24
# %bb.27:
movq 16(%rsp), %rax
movq 24(%rsp), %rcx
movq %rax, 88(%rsp)
movq %rcx, 80(%rsp)
movl $1048576, 12(%rsp) # imm = 0x100000
leaq 88(%rsp), %rax
movq %rax, 96(%rsp)
leaq 80(%rsp), %rax
movq %rax, 104(%rsp)
leaq 12(%rsp), %rax
movq %rax, 112(%rsp)
leaq 64(%rsp), %rdi
leaq 48(%rsp), %rsi
leaq 40(%rsp), %rdx
leaq 32(%rsp), %rcx
callq __hipPopCallConfiguration
movq 64(%rsp), %rsi
movl 72(%rsp), %edx
movq 48(%rsp), %rcx
movl 56(%rsp), %r8d
leaq 96(%rsp), %r9
movl $_Z11stream_warpIfEvPT_S1_i, %edi
jmp .LBB0_23
.LBB0_28:
movq 16(%rsp), %rdi
movl $4194304, %esi # imm = 0x400000
xorl %edx, %edx
xorl %ecx, %ecx
callq hipMemPrefetchAsync
testl %eax, %eax
jne .LBB0_29
# %bb.30:
movq 24(%rsp), %rdi
movl $4194304, %esi # imm = 0x400000
xorl %edx, %edx
xorl %ecx, %ecx
callq hipMemPrefetchAsync
testl %eax, %eax
jne .LBB0_31
.LBB0_21:
orq %r15, %rbx
movl $.L.str.4, %edi
movl %r15d, %esi
movl %r14d, %edx
xorl %eax, %eax
callq printf
movq %rbx, %rdi
movl $1, %esi
movq %r14, %rdx
movl $1, %ecx
xorl %r8d, %r8d
xorl %r9d, %r9d
callq __hipPushCallConfiguration
testl %eax, %eax
jne .LBB0_24
# %bb.22:
movq 16(%rsp), %rax
movq 24(%rsp), %rcx
movq %rax, 88(%rsp)
movq %rcx, 80(%rsp)
movl $1048576, 12(%rsp) # imm = 0x100000
leaq 88(%rsp), %rax
movq %rax, 96(%rsp)
leaq 80(%rsp), %rax
movq %rax, 104(%rsp)
leaq 12(%rsp), %rax
movq %rax, 112(%rsp)
leaq 64(%rsp), %rdi
leaq 48(%rsp), %rsi
leaq 40(%rsp), %rdx
leaq 32(%rsp), %rcx
callq __hipPopCallConfiguration
movq 64(%rsp), %rsi
movl 72(%rsp), %edx
movq 48(%rsp), %rcx
movl 56(%rsp), %r8d
leaq 96(%rsp), %r9
movl $_Z13stream_threadIfEvPT_S1_i, %edi
.LBB0_23:
pushq 32(%rsp)
.cfi_adjust_cfa_offset 8
pushq 48(%rsp)
.cfi_adjust_cfa_offset 8
callq hipLaunchKernel
addq $16, %rsp
.cfi_adjust_cfa_offset -16
.LBB0_24:
callq hipDeviceSynchronize
testl %eax, %eax
jne .LBB0_25
# %bb.32:
movq 16(%rsp), %rdi
movl $4194304, %esi # imm = 0x400000
movl $-1, %edx
xorl %ecx, %ecx
callq hipMemPrefetchAsync
testl %eax, %eax
jne .LBB0_33
# %bb.34:
movq 24(%rsp), %rdi
movl $4194304, %esi # imm = 0x400000
movl $-1, %edx
xorl %ecx, %ecx
callq hipMemPrefetchAsync
testl %eax, %eax
jne .LBB0_35
# %bb.36:
movq 24(%rsp), %r15
movq 16(%rsp), %r14
xorl %ebx, %ebx
movaps .LCPI0_1(%rip), %xmm0 # xmm0 = [NaN,NaN,NaN,NaN]
movsd .LCPI0_2(%rip), %xmm1 # xmm1 = mem[0],zero
.p2align 4, 0x90
.LBB0_37: # %.lr.ph.i135
# =>This Inner Loop Header: Depth=1
movss (%r15,%rbx,4), %xmm2 # xmm2 = mem[0],zero,zero,zero
subss (%r14,%rbx,4), %xmm2
andps %xmm0, %xmm2
cvtss2sd %xmm2, %xmm2
ucomisd %xmm1, %xmm2
ja .LBB0_38
# %bb.39: # in Loop: Header=BB0_37 Depth=1
incq %rbx
cmpq $1048576, %rbx # imm = 0x100000
jne .LBB0_37
# %bb.40: # %.critedge.i
movl $.Lstr.1, %edi
callq puts@PLT
jmp .LBB0_41
.LBB0_38:
movl $.Lstr, %edi
callq puts@PLT
movss (%r15,%rbx,4), %xmm0 # xmm0 = mem[0],zero,zero,zero
cvtss2sd %xmm0, %xmm0
movss (%r14,%rbx,4), %xmm1 # xmm1 = mem[0],zero,zero,zero
cvtss2sd %xmm1, %xmm1
movl $.L.str.6, %edi
movl %ebx, %esi
movb $2, %al
callq printf
.LBB0_41: # %_Z12verifyResultPfS_i.exit
callq hipGetLastError
testl %eax, %eax
jne .LBB0_42
# %bb.43:
movq 16(%rsp), %rdi
callq hipFree
testl %eax, %eax
jne .LBB0_44
# %bb.45:
movq 24(%rsp), %rdi
callq hipFree
testl %eax, %eax
jne .LBB0_46
# %bb.47:
callq hipDeviceReset
testl %eax, %eax
jne .LBB0_48
# %bb.49:
xorl %eax, %eax
addq $1600, %rsp # imm = 0x640
.cfi_def_cfa_offset 48
popq %rbx
.cfi_def_cfa_offset 40
popq %r12
.cfi_def_cfa_offset 32
popq %r14
.cfi_def_cfa_offset 24
popq %r15
.cfi_def_cfa_offset 16
popq %rbp
.cfi_def_cfa_offset 8
retq
.LBB0_1:
.cfi_def_cfa_offset 1648
movl $.L.str, %edi
movl $.L.str.1, %esi
movl $34, %edx
jmp .LBB0_2
.LBB0_4:
movl $.L.str, %edi
movl $.L.str.1, %esi
movl $36, %edx
jmp .LBB0_2
.LBB0_6:
movl $.L.str, %edi
movl $.L.str.1, %esi
movl $40, %edx
jmp .LBB0_2
.LBB0_8:
movl $.L.str, %edi
movl $.L.str.1, %esi
movl $41, %edx
jmp .LBB0_2
.LBB0_10:
movl $.L.str, %edi
movl $.L.str.1, %esi
movl $42, %edx
jmp .LBB0_2
.LBB0_25:
movl $.L.str, %edi
movl $.L.str.1, %esi
movl $72, %edx
jmp .LBB0_2
.LBB0_33:
movl $.L.str, %edi
movl $.L.str.1, %esi
movl $73, %edx
jmp .LBB0_2
.LBB0_35:
movl $.L.str, %edi
movl $.L.str.1, %esi
movl $74, %edx
jmp .LBB0_2
.LBB0_42:
movl $.L.str, %edi
movl $.L.str.1, %esi
movl $76, %edx
jmp .LBB0_2
.LBB0_44:
movl $.L.str, %edi
movl $.L.str.1, %esi
movl $79, %edx
jmp .LBB0_2
.LBB0_46:
movl $.L.str, %edi
movl $.L.str.1, %esi
movl $80, %edx
jmp .LBB0_2
.LBB0_48:
movl $.L.str, %edi
movl $.L.str.1, %esi
movl $83, %edx
jmp .LBB0_2
.LBB0_29:
movl $.L.str, %edi
movl $.L.str.1, %esi
movl $65, %edx
jmp .LBB0_2
.LBB0_31:
movl $.L.str, %edi
movl $.L.str.1, %esi
movl $66, %edx
.LBB0_2:
movl %eax, %ebx
xorl %eax, %eax
callq printf
movl %ebx, %edi
callq hipGetErrorString
movl $.L.str.2, %edi
movl %ebx, %esi
movq %rax, %rdx
xorl %eax, %eax
callq printf
movl $1, %edi
callq exit
.Lfunc_end0:
.size main, .Lfunc_end0-main
.cfi_endproc
# -- End function
.section .rodata.cst4,"aM",@progbits,4
.p2align 2, 0x0 # -- Begin function _Z11initialDataPfi
.LCPI1_0:
.long 0x41200000 # float 10
.text
.globl _Z11initialDataPfi
.p2align 4, 0x90
.type _Z11initialDataPfi,@function
_Z11initialDataPfi: # @_Z11initialDataPfi
.cfi_startproc
# %bb.0:
testl %esi, %esi
jle .LBB1_4
# %bb.1: # %.lr.ph.preheader
pushq %r15
.cfi_def_cfa_offset 16
pushq %r14
.cfi_def_cfa_offset 24
pushq %rbx
.cfi_def_cfa_offset 32
.cfi_offset %rbx, -32
.cfi_offset %r14, -24
.cfi_offset %r15, -16
movq %rdi, %rbx
movl %esi, %r14d
xorl %r15d, %r15d
.p2align 4, 0x90
.LBB1_2: # %.lr.ph
# =>This Inner Loop Header: Depth=1
callq rand
movzbl %al, %eax
xorps %xmm0, %xmm0
cvtsi2ss %eax, %xmm0
divss .LCPI1_0(%rip), %xmm0
movss %xmm0, (%rbx,%r15,4)
incq %r15
cmpq %r15, %r14
jne .LBB1_2
# %bb.3:
popq %rbx
.cfi_def_cfa_offset 24
popq %r14
.cfi_def_cfa_offset 16
popq %r15
.cfi_def_cfa_offset 8
.cfi_restore %rbx
.cfi_restore %r14
.cfi_restore %r15
.LBB1_4: # %._crit_edge
retq
.Lfunc_end1:
.size _Z11initialDataPfi, .Lfunc_end1-_Z11initialDataPfi
.cfi_endproc
# -- End function
.section .text._Z28__device_stub__stream_threadIfEvPT_S1_i,"axG",@progbits,_Z28__device_stub__stream_threadIfEvPT_S1_i,comdat
.weak _Z28__device_stub__stream_threadIfEvPT_S1_i # -- Begin function _Z28__device_stub__stream_threadIfEvPT_S1_i
.p2align 4, 0x90
.type _Z28__device_stub__stream_threadIfEvPT_S1_i,@function
_Z28__device_stub__stream_threadIfEvPT_S1_i: # @_Z28__device_stub__stream_threadIfEvPT_S1_i
.cfi_startproc
# %bb.0:
subq $104, %rsp
.cfi_def_cfa_offset 112
movq %rdi, 72(%rsp)
movq %rsi, 64(%rsp)
movl %edx, 12(%rsp)
leaq 72(%rsp), %rax
movq %rax, 80(%rsp)
leaq 64(%rsp), %rax
movq %rax, 88(%rsp)
leaq 12(%rsp), %rax
movq %rax, 96(%rsp)
leaq 48(%rsp), %rdi
leaq 32(%rsp), %rsi
leaq 24(%rsp), %rdx
leaq 16(%rsp), %rcx
callq __hipPopCallConfiguration
movq 48(%rsp), %rsi
movl 56(%rsp), %edx
movq 32(%rsp), %rcx
movl 40(%rsp), %r8d
leaq 80(%rsp), %r9
movl $_Z13stream_threadIfEvPT_S1_i, %edi
pushq 16(%rsp)
.cfi_adjust_cfa_offset 8
pushq 32(%rsp)
.cfi_adjust_cfa_offset 8
callq hipLaunchKernel
addq $120, %rsp
.cfi_adjust_cfa_offset -120
retq
.Lfunc_end2:
.size _Z28__device_stub__stream_threadIfEvPT_S1_i, .Lfunc_end2-_Z28__device_stub__stream_threadIfEvPT_S1_i
.cfi_endproc
# -- End function
.section .text._Z26__device_stub__stream_warpIfEvPT_S1_i,"axG",@progbits,_Z26__device_stub__stream_warpIfEvPT_S1_i,comdat
.weak _Z26__device_stub__stream_warpIfEvPT_S1_i # -- Begin function _Z26__device_stub__stream_warpIfEvPT_S1_i
.p2align 4, 0x90
.type _Z26__device_stub__stream_warpIfEvPT_S1_i,@function
_Z26__device_stub__stream_warpIfEvPT_S1_i: # @_Z26__device_stub__stream_warpIfEvPT_S1_i
.cfi_startproc
# %bb.0:
subq $104, %rsp
.cfi_def_cfa_offset 112
movq %rdi, 72(%rsp)
movq %rsi, 64(%rsp)
movl %edx, 12(%rsp)
leaq 72(%rsp), %rax
movq %rax, 80(%rsp)
leaq 64(%rsp), %rax
movq %rax, 88(%rsp)
leaq 12(%rsp), %rax
movq %rax, 96(%rsp)
leaq 48(%rsp), %rdi
leaq 32(%rsp), %rsi
leaq 24(%rsp), %rdx
leaq 16(%rsp), %rcx
callq __hipPopCallConfiguration
movq 48(%rsp), %rsi
movl 56(%rsp), %edx
movq 32(%rsp), %rcx
movl 40(%rsp), %r8d
leaq 80(%rsp), %r9
movl $_Z11stream_warpIfEvPT_S1_i, %edi
pushq 16(%rsp)
.cfi_adjust_cfa_offset 8
pushq 32(%rsp)
.cfi_adjust_cfa_offset 8
callq hipLaunchKernel
addq $120, %rsp
.cfi_adjust_cfa_offset -120
retq
.Lfunc_end3:
.size _Z26__device_stub__stream_warpIfEvPT_S1_i, .Lfunc_end3-_Z26__device_stub__stream_warpIfEvPT_S1_i
.cfi_endproc
# -- End function
.section .rodata.cst16,"aM",@progbits,16
.p2align 4, 0x0 # -- Begin function _Z12verifyResultPfS_i
.LCPI4_0:
.long 0x7fffffff # float NaN
.long 0x7fffffff # float NaN
.long 0x7fffffff # float NaN
.long 0x7fffffff # float NaN
.section .rodata.cst8,"aM",@progbits,8
.p2align 3, 0x0
.LCPI4_1:
.quad 0x3e45798ee2308c3a # double 1.0E-8
.text
.globl _Z12verifyResultPfS_i
.p2align 4, 0x90
.type _Z12verifyResultPfS_i,@function
_Z12verifyResultPfS_i: # @_Z12verifyResultPfS_i
.cfi_startproc
# %bb.0:
pushq %r15
.cfi_def_cfa_offset 16
pushq %r14
.cfi_def_cfa_offset 24
pushq %rbx
.cfi_def_cfa_offset 32
.cfi_offset %rbx, -32
.cfi_offset %r14, -24
.cfi_offset %r15, -16
testl %edx, %edx
jle .LBB4_4
# %bb.1: # %.lr.ph.preheader
movl %edx, %eax
xorl %ebx, %ebx
movaps .LCPI4_0(%rip), %xmm0 # xmm0 = [NaN,NaN,NaN,NaN]
movsd .LCPI4_1(%rip), %xmm1 # xmm1 = mem[0],zero
.p2align 4, 0x90
.LBB4_2: # %.lr.ph
# =>This Inner Loop Header: Depth=1
movss (%rdi,%rbx,4), %xmm2 # xmm2 = mem[0],zero,zero,zero
subss (%rsi,%rbx,4), %xmm2
andps %xmm0, %xmm2
cvtss2sd %xmm2, %xmm2
ucomisd %xmm1, %xmm2
ja .LBB4_5
# %bb.3: # in Loop: Header=BB4_2 Depth=1
incq %rbx
cmpq %rbx, %rax
jne .LBB4_2
.LBB4_4: # %.critedge
movl $.Lstr.1, %edi
popq %rbx
.cfi_def_cfa_offset 24
popq %r14
.cfi_def_cfa_offset 16
popq %r15
.cfi_def_cfa_offset 8
jmp puts@PLT # TAILCALL
.LBB4_5:
.cfi_def_cfa_offset 32
movq %rdi, %r14
movl $.Lstr, %edi
movq %rsi, %r15
callq puts@PLT
movss (%r14,%rbx,4), %xmm0 # xmm0 = mem[0],zero,zero,zero
cvtss2sd %xmm0, %xmm0
movss (%r15,%rbx,4), %xmm1 # xmm1 = mem[0],zero,zero,zero
cvtss2sd %xmm1, %xmm1
movl $.L.str.6, %edi
movl %ebx, %esi
movb $2, %al
popq %rbx
.cfi_def_cfa_offset 24
popq %r14
.cfi_def_cfa_offset 16
popq %r15
.cfi_def_cfa_offset 8
jmp printf # TAILCALL
.Lfunc_end4:
.size _Z12verifyResultPfS_i, .Lfunc_end4-_Z12verifyResultPfS_i
.cfi_endproc
# -- End function
.p2align 4, 0x90 # -- Begin function __hip_module_ctor
.type __hip_module_ctor,@function
__hip_module_ctor: # @__hip_module_ctor
.cfi_startproc
# %bb.0:
pushq %rbx
.cfi_def_cfa_offset 16
subq $32, %rsp
.cfi_def_cfa_offset 48
.cfi_offset %rbx, -16
cmpq $0, __hip_gpubin_handle(%rip)
jne .LBB5_2
# %bb.1:
movl $__hip_fatbin_wrapper, %edi
callq __hipRegisterFatBinary
movq %rax, __hip_gpubin_handle(%rip)
.LBB5_2:
movq __hip_gpubin_handle(%rip), %rbx
xorps %xmm0, %xmm0
movups %xmm0, 16(%rsp)
movups %xmm0, (%rsp)
movl $_Z13stream_threadIfEvPT_S1_i, %esi
movl $.L__unnamed_1, %edx
movl $.L__unnamed_1, %ecx
movq %rbx, %rdi
movl $-1, %r8d
xorl %r9d, %r9d
callq __hipRegisterFunction
xorps %xmm0, %xmm0
movups %xmm0, 16(%rsp)
movups %xmm0, (%rsp)
movl $_Z11stream_warpIfEvPT_S1_i, %esi
movl $.L__unnamed_2, %edx
movl $.L__unnamed_2, %ecx
movq %rbx, %rdi
movl $-1, %r8d
xorl %r9d, %r9d
callq __hipRegisterFunction
movl $__hip_module_dtor, %edi
addq $32, %rsp
.cfi_def_cfa_offset 16
popq %rbx
.cfi_def_cfa_offset 8
jmp atexit # TAILCALL
.Lfunc_end5:
.size __hip_module_ctor, .Lfunc_end5-__hip_module_ctor
.cfi_endproc
# -- End function
.p2align 4, 0x90 # -- Begin function __hip_module_dtor
.type __hip_module_dtor,@function
__hip_module_dtor: # @__hip_module_dtor
.cfi_startproc
# %bb.0:
movq __hip_gpubin_handle(%rip), %rdi
testq %rdi, %rdi
je .LBB6_2
# %bb.1:
pushq %rax
.cfi_def_cfa_offset 16
callq __hipUnregisterFatBinary
movq $0, __hip_gpubin_handle(%rip)
addq $8, %rsp
.cfi_def_cfa_offset 8
.LBB6_2:
retq
.Lfunc_end6:
.size __hip_module_dtor, .Lfunc_end6-__hip_module_dtor
.cfi_endproc
# -- End function
.type .L.str,@object # @.str
.section .rodata.str1.1,"aMS",@progbits,1
.L.str:
.asciz "Error: %s:%d, "
.size .L.str, 15
.type .L.str.1,@object # @.str.1
.L.str.1:
.asciz "/home/ubuntu/Datasets/stackv2/train-structured-repos-hip/SaoYan/Learning_CUDA/master/Ch4/unifyMemory2.hip"
.size .L.str.1, 106
.type .L.str.2,@object # @.str.2
.L.str.2:
.asciz "code: %d, reason: %s\n"
.size .L.str.2, 22
.type .L.str.3,@object # @.str.3
.L.str.3:
.asciz "Using Device %d: %s\n"
.size .L.str.3, 21
.type .L.str.4,@object # @.str.4
.L.str.4:
.asciz "<<< %d, %d >>>\n"
.size .L.str.4, 16
.type _Z13stream_threadIfEvPT_S1_i,@object # @_Z13stream_threadIfEvPT_S1_i
.section .rodata,"a",@progbits
.weak _Z13stream_threadIfEvPT_S1_i
.p2align 3, 0x0
_Z13stream_threadIfEvPT_S1_i:
.quad _Z28__device_stub__stream_threadIfEvPT_S1_i
.size _Z13stream_threadIfEvPT_S1_i, 8
.type _Z11stream_warpIfEvPT_S1_i,@object # @_Z11stream_warpIfEvPT_S1_i
.weak _Z11stream_warpIfEvPT_S1_i
.p2align 3, 0x0
_Z11stream_warpIfEvPT_S1_i:
.quad _Z26__device_stub__stream_warpIfEvPT_S1_i
.size _Z11stream_warpIfEvPT_S1_i, 8
.type .L.str.6,@object # @.str.6
.section .rodata.str1.1,"aMS",@progbits,1
.L.str.6:
.asciz "result %5.2f reference %5.2f at array index %d\n"
.size .L.str.6, 48
.type .L__unnamed_1,@object # @0
.L__unnamed_1:
.asciz "_Z13stream_threadIfEvPT_S1_i"
.size .L__unnamed_1, 29
.type .L__unnamed_2,@object # @1
.L__unnamed_2:
.asciz "_Z11stream_warpIfEvPT_S1_i"
.size .L__unnamed_2, 27
.type __hip_fatbin_wrapper,@object # @__hip_fatbin_wrapper
.section .hipFatBinSegment,"a",@progbits
.p2align 3, 0x0
__hip_fatbin_wrapper:
.long 1212764230 # 0x48495046
.long 1 # 0x1
.quad __hip_fatbin
.quad 0
.size __hip_fatbin_wrapper, 24
.type __hip_gpubin_handle,@object # @__hip_gpubin_handle
.local __hip_gpubin_handle
.comm __hip_gpubin_handle,8,8
.section .init_array,"aw",@init_array
.p2align 3, 0x0
.quad __hip_module_ctor
.type __hip_cuid_,@object # @__hip_cuid_
.bss
.globl __hip_cuid_
__hip_cuid_:
.byte 0 # 0x0
.size __hip_cuid_, 1
.type .Lstr,@object # @str
.section .rodata.str1.1,"aMS",@progbits,1
.Lstr:
.asciz "Arrays do not match:"
.size .Lstr, 21
.type .Lstr.1,@object # @str.1
.Lstr.1:
.asciz "Arrays match!"
.size .Lstr.1, 14
.section ".linker-options","e",@llvm_linker_options
.ident "AMD clang version 18.0.0git (https://github.com/RadeonOpenCompute/llvm-project roc-6.3.2 25012 e5bf7e55c91490b07c49d8960fa7983d864936c4)"
.section ".note.GNU-stack","",@progbits
.addrsig
.addrsig_sym _Z28__device_stub__stream_threadIfEvPT_S1_i
.addrsig_sym _Z26__device_stub__stream_warpIfEvPT_S1_i
.addrsig_sym __hip_module_ctor
.addrsig_sym __hip_module_dtor
.addrsig_sym _Z13stream_threadIfEvPT_S1_i
.addrsig_sym _Z11stream_warpIfEvPT_S1_i
.addrsig_sym __hip_fatbin
.addrsig_sym __hip_fatbin_wrapper
.addrsig_sym __hip_cuid_ |
You are a helpful coding assistant specialized in converting CUDA source code to CUDA device assembly. | #include "cuda_runtime.h"
#include "device_launch_parameters.h"
#include <stdio.h>
#include <stdlib.h>
#include <math.h>
__global__ void add1(int *a, int *b, int *c){
int idx = blockIdx.x;
c[idx] = a[idx] + b[idx];
}
__global__ void add2(int* a, int* b, int* c){
int idx = threadIdx.x;
c[idx] = a[idx] + b[idx];
}
__global__ void add3(int* a, int* b, int* c){
int idx = blockIdx.x*blockDim.x + threadIdx.x;
c[idx] = a[idx] + b[idx];
}
int main(){
int N; //number of elements
int *d_a, *d_b, *d_c; //Device copies
int size = sizeof(int); //size var
int *A, *B, *C; //vectors
printf("Enter number of elements: ");
scanf("%d",&N);
A = (int*)malloc(sizeof(int)*N);
B = (int*)malloc(sizeof(int)*N);
C = (int*)malloc(sizeof(int)*N);
printf("Enter elements a <space> b:\n");
for(int i=0; i<N; i++){
scanf("%d %d",&A[i],&B[i]);
}
//Allocate space for device copies of a,b,c
cudaMalloc((void**)&d_a,size*N);
cudaMalloc((void**)&d_b,size*N);
cudaMalloc((void**)&d_c,size*N);
//setup input values
cudaMemcpy(d_a,A,size*N,cudaMemcpyHostToDevice);
cudaMemcpy(d_b,B,size*N,cudaMemcpyHostToDevice);
printf("\n// LAUNCHING ADD1 //\n");
//launch add kernel on GPU
dim3 Blocks1(N,1,1);
dim3 Threads1(1,1,1);
add1<<<Blocks1,Threads1>>>(d_a,d_b,d_c);
//copy result back to host
cudaMemcpy(C,d_c,size*N,cudaMemcpyDeviceToHost);
printf("Result:\n");
for(int i=0; i<N; i++)
printf("%d ",C[i]);
printf("\n// LAUNCHING ADD2 //\n");
//launch add kernel on GPU
dim3 Blocks2(1,1,1);
dim3 Threads2(N,1,1);
add1<<<Blocks2,Threads2>>>(d_a,d_b,d_c);
//copy result back to host
cudaMemcpy(C,d_c,size*N,cudaMemcpyDeviceToHost);
printf("Result:\n");
for(int i=0; i<N; i++)
printf("%d ",C[i]);
printf("\n// LAUNCHING ADD3 //\n");
//launch add kernel on GPU
dim3 Blocks3(ceilf(N/256),1,1);
dim3 Threads3(256,1,1);
add1<<<Blocks3,Threads3>>>(d_a,d_b,d_c);
//copy result back to host
cudaMemcpy(C,d_c,size*N,cudaMemcpyDeviceToHost);
printf("Result:\n");
for(int i=0; i<N; i++)
printf("%d ",C[i]);
//Cleanup
cudaFree(d_a);
cudaFree(d_b);
cudaFree(d_c);
return 0;
} | code for sm_80
Function : _Z4add3PiS_S_
.headerflags @"EF_CUDA_TEXMODE_UNIFIED EF_CUDA_64BIT_ADDRESS EF_CUDA_SM80 EF_CUDA_VIRTUAL_SM(EF_CUDA_SM80)"
/*0000*/ MOV R1, c[0x0][0x28] ; /* 0x00000a0000017a02 */
/* 0x000fe40000000f00 */
/*0010*/ S2R R6, SR_CTAID.X ; /* 0x0000000000067919 */
/* 0x000e220000002500 */
/*0020*/ HFMA2.MMA R7, -RZ, RZ, 0, 2.384185791015625e-07 ; /* 0x00000004ff077435 */
/* 0x000fe200000001ff */
/*0030*/ ULDC.64 UR4, c[0x0][0x118] ; /* 0x0000460000047ab9 */
/* 0x000fe40000000a00 */
/*0040*/ S2R R3, SR_TID.X ; /* 0x0000000000037919 */
/* 0x000e240000002100 */
/*0050*/ IMAD R6, R6, c[0x0][0x0], R3 ; /* 0x0000000006067a24 */
/* 0x001fca00078e0203 */
/*0060*/ IMAD.WIDE R2, R6, R7, c[0x0][0x160] ; /* 0x0000580006027625 */
/* 0x000fc800078e0207 */
/*0070*/ IMAD.WIDE R4, R6.reuse, R7.reuse, c[0x0][0x168] ; /* 0x00005a0006047625 */
/* 0x0c0fe400078e0207 */
/*0080*/ LDG.E R2, [R2.64] ; /* 0x0000000402027981 */
/* 0x000ea8000c1e1900 */
/*0090*/ LDG.E R5, [R4.64] ; /* 0x0000000404057981 */
/* 0x000ea2000c1e1900 */
/*00a0*/ IMAD.WIDE R6, R6, R7, c[0x0][0x170] ; /* 0x00005c0006067625 */
/* 0x000fe200078e0207 */
/*00b0*/ IADD3 R9, R2, R5, RZ ; /* 0x0000000502097210 */
/* 0x004fca0007ffe0ff */
/*00c0*/ STG.E [R6.64], R9 ; /* 0x0000000906007986 */
/* 0x000fe2000c101904 */
/*00d0*/ EXIT ; /* 0x000000000000794d */
/* 0x000fea0003800000 */
/*00e0*/ BRA 0xe0; /* 0xfffffff000007947 */
/* 0x000fc0000383ffff */
/*00f0*/ NOP; /* 0x0000000000007918 */
/* 0x000fc00000000000 */
/*0100*/ NOP; /* 0x0000000000007918 */
/* 0x000fc00000000000 */
/*0110*/ NOP; /* 0x0000000000007918 */
/* 0x000fc00000000000 */
/*0120*/ NOP; /* 0x0000000000007918 */
/* 0x000fc00000000000 */
/*0130*/ NOP; /* 0x0000000000007918 */
/* 0x000fc00000000000 */
/*0140*/ NOP; /* 0x0000000000007918 */
/* 0x000fc00000000000 */
/*0150*/ NOP; /* 0x0000000000007918 */
/* 0x000fc00000000000 */
/*0160*/ NOP; /* 0x0000000000007918 */
/* 0x000fc00000000000 */
/*0170*/ NOP; /* 0x0000000000007918 */
/* 0x000fc00000000000 */
..........
Function : _Z4add2PiS_S_
.headerflags @"EF_CUDA_TEXMODE_UNIFIED EF_CUDA_64BIT_ADDRESS EF_CUDA_SM80 EF_CUDA_VIRTUAL_SM(EF_CUDA_SM80)"
/*0000*/ MOV R1, c[0x0][0x28] ; /* 0x00000a0000017a02 */
/* 0x000fe40000000f00 */
/*0010*/ S2R R6, SR_TID.X ; /* 0x0000000000067919 */
/* 0x000e220000002100 */
/*0020*/ HFMA2.MMA R7, -RZ, RZ, 0, 2.384185791015625e-07 ; /* 0x00000004ff077435 */
/* 0x000fe200000001ff */
/*0030*/ ULDC.64 UR4, c[0x0][0x118] ; /* 0x0000460000047ab9 */
/* 0x000fd20000000a00 */
/*0040*/ IMAD.WIDE R2, R6, R7, c[0x0][0x160] ; /* 0x0000580006027625 */
/* 0x001fc800078e0207 */
/*0050*/ IMAD.WIDE R4, R6.reuse, R7.reuse, c[0x0][0x168] ; /* 0x00005a0006047625 */
/* 0x0c0fe400078e0207 */
/*0060*/ LDG.E R2, [R2.64] ; /* 0x0000000402027981 */
/* 0x000ea8000c1e1900 */
/*0070*/ LDG.E R5, [R4.64] ; /* 0x0000000404057981 */
/* 0x000ea2000c1e1900 */
/*0080*/ IMAD.WIDE R6, R6, R7, c[0x0][0x170] ; /* 0x00005c0006067625 */
/* 0x000fe200078e0207 */
/*0090*/ IADD3 R9, R2, R5, RZ ; /* 0x0000000502097210 */
/* 0x004fca0007ffe0ff */
/*00a0*/ STG.E [R6.64], R9 ; /* 0x0000000906007986 */
/* 0x000fe2000c101904 */
/*00b0*/ EXIT ; /* 0x000000000000794d */
/* 0x000fea0003800000 */
/*00c0*/ BRA 0xc0; /* 0xfffffff000007947 */
/* 0x000fc0000383ffff */
/*00d0*/ NOP; /* 0x0000000000007918 */
/* 0x000fc00000000000 */
/*00e0*/ NOP; /* 0x0000000000007918 */
/* 0x000fc00000000000 */
/*00f0*/ NOP; /* 0x0000000000007918 */
/* 0x000fc00000000000 */
/*0100*/ NOP; /* 0x0000000000007918 */
/* 0x000fc00000000000 */
/*0110*/ NOP; /* 0x0000000000007918 */
/* 0x000fc00000000000 */
/*0120*/ NOP; /* 0x0000000000007918 */
/* 0x000fc00000000000 */
/*0130*/ NOP; /* 0x0000000000007918 */
/* 0x000fc00000000000 */
/*0140*/ NOP; /* 0x0000000000007918 */
/* 0x000fc00000000000 */
/*0150*/ NOP; /* 0x0000000000007918 */
/* 0x000fc00000000000 */
/*0160*/ NOP; /* 0x0000000000007918 */
/* 0x000fc00000000000 */
/*0170*/ NOP; /* 0x0000000000007918 */
/* 0x000fc00000000000 */
..........
Function : _Z4add1PiS_S_
.headerflags @"EF_CUDA_TEXMODE_UNIFIED EF_CUDA_64BIT_ADDRESS EF_CUDA_SM80 EF_CUDA_VIRTUAL_SM(EF_CUDA_SM80)"
/*0000*/ MOV R1, c[0x0][0x28] ; /* 0x00000a0000017a02 */
/* 0x000fe40000000f00 */
/*0010*/ S2R R6, SR_CTAID.X ; /* 0x0000000000067919 */
/* 0x000e220000002500 */
/*0020*/ HFMA2.MMA R7, -RZ, RZ, 0, 2.384185791015625e-07 ; /* 0x00000004ff077435 */
/* 0x000fe200000001ff */
/*0030*/ ULDC.64 UR4, c[0x0][0x118] ; /* 0x0000460000047ab9 */
/* 0x000fd20000000a00 */
/*0040*/ IMAD.WIDE R2, R6, R7, c[0x0][0x160] ; /* 0x0000580006027625 */
/* 0x001fc800078e0207 */
/*0050*/ IMAD.WIDE R4, R6.reuse, R7.reuse, c[0x0][0x168] ; /* 0x00005a0006047625 */
/* 0x0c0fe400078e0207 */
/*0060*/ LDG.E R2, [R2.64] ; /* 0x0000000402027981 */
/* 0x000ea8000c1e1900 */
/*0070*/ LDG.E R5, [R4.64] ; /* 0x0000000404057981 */
/* 0x000ea2000c1e1900 */
/*0080*/ IMAD.WIDE R6, R6, R7, c[0x0][0x170] ; /* 0x00005c0006067625 */
/* 0x000fe200078e0207 */
/*0090*/ IADD3 R9, R2, R5, RZ ; /* 0x0000000502097210 */
/* 0x004fca0007ffe0ff */
/*00a0*/ STG.E [R6.64], R9 ; /* 0x0000000906007986 */
/* 0x000fe2000c101904 */
/*00b0*/ EXIT ; /* 0x000000000000794d */
/* 0x000fea0003800000 */
/*00c0*/ BRA 0xc0; /* 0xfffffff000007947 */
/* 0x000fc0000383ffff */
/*00d0*/ NOP; /* 0x0000000000007918 */
/* 0x000fc00000000000 */
/*00e0*/ NOP; /* 0x0000000000007918 */
/* 0x000fc00000000000 */
/*00f0*/ NOP; /* 0x0000000000007918 */
/* 0x000fc00000000000 */
/*0100*/ NOP; /* 0x0000000000007918 */
/* 0x000fc00000000000 */
/*0110*/ NOP; /* 0x0000000000007918 */
/* 0x000fc00000000000 */
/*0120*/ NOP; /* 0x0000000000007918 */
/* 0x000fc00000000000 */
/*0130*/ NOP; /* 0x0000000000007918 */
/* 0x000fc00000000000 */
/*0140*/ NOP; /* 0x0000000000007918 */
/* 0x000fc00000000000 */
/*0150*/ NOP; /* 0x0000000000007918 */
/* 0x000fc00000000000 */
/*0160*/ NOP; /* 0x0000000000007918 */
/* 0x000fc00000000000 */
/*0170*/ NOP; /* 0x0000000000007918 */
/* 0x000fc00000000000 */
.......... |
You are a helpful coding assistant specialized in converting CUDA source code to CUDA host assembly. | #include "cuda_runtime.h"
#include "device_launch_parameters.h"
#include <stdio.h>
#include <stdlib.h>
#include <math.h>
__global__ void add1(int *a, int *b, int *c){
int idx = blockIdx.x;
c[idx] = a[idx] + b[idx];
}
__global__ void add2(int* a, int* b, int* c){
int idx = threadIdx.x;
c[idx] = a[idx] + b[idx];
}
__global__ void add3(int* a, int* b, int* c){
int idx = blockIdx.x*blockDim.x + threadIdx.x;
c[idx] = a[idx] + b[idx];
}
int main(){
int N; //number of elements
int *d_a, *d_b, *d_c; //Device copies
int size = sizeof(int); //size var
int *A, *B, *C; //vectors
printf("Enter number of elements: ");
scanf("%d",&N);
A = (int*)malloc(sizeof(int)*N);
B = (int*)malloc(sizeof(int)*N);
C = (int*)malloc(sizeof(int)*N);
printf("Enter elements a <space> b:\n");
for(int i=0; i<N; i++){
scanf("%d %d",&A[i],&B[i]);
}
//Allocate space for device copies of a,b,c
cudaMalloc((void**)&d_a,size*N);
cudaMalloc((void**)&d_b,size*N);
cudaMalloc((void**)&d_c,size*N);
//setup input values
cudaMemcpy(d_a,A,size*N,cudaMemcpyHostToDevice);
cudaMemcpy(d_b,B,size*N,cudaMemcpyHostToDevice);
printf("\n// LAUNCHING ADD1 //\n");
//launch add kernel on GPU
dim3 Blocks1(N,1,1);
dim3 Threads1(1,1,1);
add1<<<Blocks1,Threads1>>>(d_a,d_b,d_c);
//copy result back to host
cudaMemcpy(C,d_c,size*N,cudaMemcpyDeviceToHost);
printf("Result:\n");
for(int i=0; i<N; i++)
printf("%d ",C[i]);
printf("\n// LAUNCHING ADD2 //\n");
//launch add kernel on GPU
dim3 Blocks2(1,1,1);
dim3 Threads2(N,1,1);
add1<<<Blocks2,Threads2>>>(d_a,d_b,d_c);
//copy result back to host
cudaMemcpy(C,d_c,size*N,cudaMemcpyDeviceToHost);
printf("Result:\n");
for(int i=0; i<N; i++)
printf("%d ",C[i]);
printf("\n// LAUNCHING ADD3 //\n");
//launch add kernel on GPU
dim3 Blocks3(ceilf(N/256),1,1);
dim3 Threads3(256,1,1);
add1<<<Blocks3,Threads3>>>(d_a,d_b,d_c);
//copy result back to host
cudaMemcpy(C,d_c,size*N,cudaMemcpyDeviceToHost);
printf("Result:\n");
for(int i=0; i<N; i++)
printf("%d ",C[i]);
//Cleanup
cudaFree(d_a);
cudaFree(d_b);
cudaFree(d_c);
return 0;
} | .file "tmpxft_000a5dc5_00000000-6_CUDA_VectorAdd.cudafe1.cpp"
.text
#APP
#NO_APP
.type _ZL26__cudaUnregisterBinaryUtilv, @function
_ZL26__cudaUnregisterBinaryUtilv:
.LFB2060:
.cfi_startproc
endbr64
subq $8, %rsp
.cfi_def_cfa_offset 16
movq _ZL20__cudaFatCubinHandle(%rip), %rdi
call __cudaUnregisterFatBinary@PLT
addq $8, %rsp
.cfi_def_cfa_offset 8
ret
.cfi_endproc
.LFE2060:
.size _ZL26__cudaUnregisterBinaryUtilv, .-_ZL26__cudaUnregisterBinaryUtilv
.globl _Z27__device_stub__Z4add1PiS_S_PiS_S_
.type _Z27__device_stub__Z4add1PiS_S_PiS_S_, @function
_Z27__device_stub__Z4add1PiS_S_PiS_S_:
.LFB2082:
.cfi_startproc
endbr64
subq $136, %rsp
.cfi_def_cfa_offset 144
movq %rdi, 24(%rsp)
movq %rsi, 16(%rsp)
movq %rdx, 8(%rsp)
movq %fs:40, %rax
movq %rax, 120(%rsp)
xorl %eax, %eax
leaq 24(%rsp), %rax
movq %rax, 96(%rsp)
leaq 16(%rsp), %rax
movq %rax, 104(%rsp)
leaq 8(%rsp), %rax
movq %rax, 112(%rsp)
movl $1, 48(%rsp)
movl $1, 52(%rsp)
movl $1, 56(%rsp)
movl $1, 60(%rsp)
movl $1, 64(%rsp)
movl $1, 68(%rsp)
leaq 40(%rsp), %rcx
leaq 32(%rsp), %rdx
leaq 60(%rsp), %rsi
leaq 48(%rsp), %rdi
call __cudaPopCallConfiguration@PLT
testl %eax, %eax
je .L7
.L3:
movq 120(%rsp), %rax
subq %fs:40, %rax
jne .L8
addq $136, %rsp
.cfi_remember_state
.cfi_def_cfa_offset 8
ret
.L7:
.cfi_restore_state
pushq 40(%rsp)
.cfi_def_cfa_offset 152
pushq 40(%rsp)
.cfi_def_cfa_offset 160
leaq 112(%rsp), %r9
movq 76(%rsp), %rcx
movl 84(%rsp), %r8d
movq 64(%rsp), %rsi
movl 72(%rsp), %edx
leaq _Z4add1PiS_S_(%rip), %rdi
call cudaLaunchKernel@PLT
addq $16, %rsp
.cfi_def_cfa_offset 144
jmp .L3
.L8:
call __stack_chk_fail@PLT
.cfi_endproc
.LFE2082:
.size _Z27__device_stub__Z4add1PiS_S_PiS_S_, .-_Z27__device_stub__Z4add1PiS_S_PiS_S_
.globl _Z4add1PiS_S_
.type _Z4add1PiS_S_, @function
_Z4add1PiS_S_:
.LFB2083:
.cfi_startproc
endbr64
subq $8, %rsp
.cfi_def_cfa_offset 16
call _Z27__device_stub__Z4add1PiS_S_PiS_S_
addq $8, %rsp
.cfi_def_cfa_offset 8
ret
.cfi_endproc
.LFE2083:
.size _Z4add1PiS_S_, .-_Z4add1PiS_S_
.section .rodata.str1.1,"aMS",@progbits,1
.LC0:
.string "Enter number of elements: "
.LC1:
.string "%d"
.LC2:
.string "Enter elements a <space> b:\n"
.LC3:
.string "%d %d"
.LC4:
.string "\n// LAUNCHING ADD1 //\n"
.LC5:
.string "Result:\n"
.LC6:
.string "%d "
.LC7:
.string "\n// LAUNCHING ADD2 //\n"
.LC8:
.string "\n// LAUNCHING ADD3 //\n"
.text
.globl main
.type main, @function
main:
.LFB2057:
.cfi_startproc
endbr64
pushq %r15
.cfi_def_cfa_offset 16
.cfi_offset 15, -16
pushq %r14
.cfi_def_cfa_offset 24
.cfi_offset 14, -24
pushq %r13
.cfi_def_cfa_offset 32
.cfi_offset 13, -32
pushq %r12
.cfi_def_cfa_offset 40
.cfi_offset 12, -40
pushq %rbp
.cfi_def_cfa_offset 48
.cfi_offset 6, -48
pushq %rbx
.cfi_def_cfa_offset 56
.cfi_offset 3, -56
subq $136, %rsp
.cfi_def_cfa_offset 192
movq %fs:40, %rax
movq %rax, 120(%rsp)
xorl %eax, %eax
leaq .LC0(%rip), %rsi
movl $2, %edi
call __printf_chk@PLT
leaq 20(%rsp), %rsi
leaq .LC1(%rip), %rdi
movl $0, %eax
call __isoc23_scanf@PLT
movslq 20(%rsp), %rbx
salq $2, %rbx
movq %rbx, %rdi
call malloc@PLT
movq %rax, %r15
movq %rbx, %rdi
call malloc@PLT
movq %rax, %r12
movq %rax, 8(%rsp)
movq %rbx, %rdi
call malloc@PLT
movq %rax, %rbx
leaq .LC2(%rip), %rsi
movl $2, %edi
movl $0, %eax
call __printf_chk@PLT
movl 20(%rsp), %esi
testl %esi, %esi
jle .L12
movq %r15, %r13
movl $0, %ebp
leaq .LC3(%rip), %r14
.L13:
movq %r12, %rdx
movq %r13, %rsi
movq %r14, %rdi
movl $0, %eax
call __isoc23_scanf@PLT
addl $1, %ebp
movl 20(%rsp), %esi
addq $4, %r13
addq $4, %r12
cmpl %ebp, %esi
jg .L13
.L12:
sall $2, %esi
movslq %esi, %rsi
leaq 24(%rsp), %rdi
call cudaMalloc@PLT
movl 20(%rsp), %eax
leal 0(,%rax,4), %esi
movslq %esi, %rsi
leaq 32(%rsp), %rdi
call cudaMalloc@PLT
movl 20(%rsp), %eax
leal 0(,%rax,4), %esi
movslq %esi, %rsi
leaq 40(%rsp), %rdi
call cudaMalloc@PLT
movl 20(%rsp), %eax
leal 0(,%rax,4), %edx
movslq %edx, %rdx
movl $1, %ecx
movq %r15, %rsi
movq 24(%rsp), %rdi
call cudaMemcpy@PLT
movl 20(%rsp), %eax
leal 0(,%rax,4), %edx
movslq %edx, %rdx
movl $1, %ecx
movq 8(%rsp), %rsi
movq 32(%rsp), %rdi
call cudaMemcpy@PLT
leaq .LC4(%rip), %rsi
movl $2, %edi
movl $0, %eax
call __printf_chk@PLT
movl 20(%rsp), %eax
movl %eax, 48(%rsp)
movl $1, 52(%rsp)
movl $1, 60(%rsp)
movl $1, 64(%rsp)
movl $0, %r9d
movl $0, %r8d
movq 60(%rsp), %rdx
movl $1, %ecx
movq 48(%rsp), %rdi
movl $1, %esi
call __cudaPushCallConfiguration@PLT
testl %eax, %eax
je .L29
.L14:
movl 20(%rsp), %eax
leal 0(,%rax,4), %edx
movslq %edx, %rdx
movl $2, %ecx
movq 40(%rsp), %rsi
movq %rbx, %rdi
call cudaMemcpy@PLT
leaq .LC5(%rip), %rsi
movl $2, %edi
movl $0, %eax
call __printf_chk@PLT
cmpl $0, 20(%rsp)
jle .L15
movl $0, %ebp
leaq .LC6(%rip), %r12
.L16:
movl (%rbx,%rbp,4), %edx
movq %r12, %rsi
movl $2, %edi
movl $0, %eax
call __printf_chk@PLT
addq $1, %rbp
cmpl %ebp, 20(%rsp)
jg .L16
.L15:
leaq .LC7(%rip), %rsi
movl $2, %edi
movl $0, %eax
call __printf_chk@PLT
movl $1, 72(%rsp)
movl $1, 76(%rsp)
movl 20(%rsp), %eax
movl %eax, 84(%rsp)
movl $1, 88(%rsp)
movl $0, %r9d
movl $0, %r8d
movq 84(%rsp), %rdx
movl $1, %ecx
movq 72(%rsp), %rdi
movl $1, %esi
call __cudaPushCallConfiguration@PLT
testl %eax, %eax
je .L30
.L17:
movl 20(%rsp), %eax
leal 0(,%rax,4), %edx
movslq %edx, %rdx
movl $2, %ecx
movq 40(%rsp), %rsi
movq %rbx, %rdi
call cudaMemcpy@PLT
leaq .LC5(%rip), %rsi
movl $2, %edi
movl $0, %eax
call __printf_chk@PLT
cmpl $0, 20(%rsp)
jle .L18
movl $0, %ebp
leaq .LC6(%rip), %r12
.L19:
movl (%rbx,%rbp,4), %edx
movq %r12, %rsi
movl $2, %edi
movl $0, %eax
call __printf_chk@PLT
addq $1, %rbp
cmpl %ebp, 20(%rsp)
jg .L19
.L18:
leaq .LC8(%rip), %rsi
movl $2, %edi
movl $0, %eax
call __printf_chk@PLT
movl 20(%rsp), %edx
leal 255(%rdx), %eax
testl %edx, %edx
cmovns %edx, %eax
sarl $8, %eax
pxor %xmm0, %xmm0
cvtsi2ssl %eax, %xmm0
cvttss2siq %xmm0, %rax
movl %eax, 96(%rsp)
movl $1, 100(%rsp)
movl $256, 108(%rsp)
movl $1, 112(%rsp)
movl $0, %r9d
movl $0, %r8d
movq 108(%rsp), %rdx
movl $1, %ecx
movq 96(%rsp), %rdi
movl $1, %esi
call __cudaPushCallConfiguration@PLT
testl %eax, %eax
je .L31
.L20:
movl 20(%rsp), %eax
leal 0(,%rax,4), %edx
movslq %edx, %rdx
movl $2, %ecx
movq 40(%rsp), %rsi
movq %rbx, %rdi
call cudaMemcpy@PLT
leaq .LC5(%rip), %rsi
movl $2, %edi
movl $0, %eax
call __printf_chk@PLT
cmpl $0, 20(%rsp)
jle .L21
movl $0, %ebp
leaq .LC6(%rip), %r12
.L22:
movl (%rbx,%rbp,4), %edx
movq %r12, %rsi
movl $2, %edi
movl $0, %eax
call __printf_chk@PLT
addq $1, %rbp
cmpl %ebp, 20(%rsp)
jg .L22
.L21:
movq 24(%rsp), %rdi
call cudaFree@PLT
movq 32(%rsp), %rdi
call cudaFree@PLT
movq 40(%rsp), %rdi
call cudaFree@PLT
movq 120(%rsp), %rax
subq %fs:40, %rax
jne .L32
movl $0, %eax
addq $136, %rsp
.cfi_remember_state
.cfi_def_cfa_offset 56
popq %rbx
.cfi_def_cfa_offset 48
popq %rbp
.cfi_def_cfa_offset 40
popq %r12
.cfi_def_cfa_offset 32
popq %r13
.cfi_def_cfa_offset 24
popq %r14
.cfi_def_cfa_offset 16
popq %r15
.cfi_def_cfa_offset 8
ret
.L29:
.cfi_restore_state
movq 40(%rsp), %rdx
movq 32(%rsp), %rsi
movq 24(%rsp), %rdi
call _Z27__device_stub__Z4add1PiS_S_PiS_S_
jmp .L14
.L30:
movq 40(%rsp), %rdx
movq 32(%rsp), %rsi
movq 24(%rsp), %rdi
call _Z27__device_stub__Z4add1PiS_S_PiS_S_
jmp .L17
.L31:
movq 40(%rsp), %rdx
movq 32(%rsp), %rsi
movq 24(%rsp), %rdi
call _Z27__device_stub__Z4add1PiS_S_PiS_S_
jmp .L20
.L32:
call __stack_chk_fail@PLT
.cfi_endproc
.LFE2057:
.size main, .-main
.globl _Z27__device_stub__Z4add2PiS_S_PiS_S_
.type _Z27__device_stub__Z4add2PiS_S_PiS_S_, @function
_Z27__device_stub__Z4add2PiS_S_PiS_S_:
.LFB2084:
.cfi_startproc
endbr64
subq $136, %rsp
.cfi_def_cfa_offset 144
movq %rdi, 24(%rsp)
movq %rsi, 16(%rsp)
movq %rdx, 8(%rsp)
movq %fs:40, %rax
movq %rax, 120(%rsp)
xorl %eax, %eax
leaq 24(%rsp), %rax
movq %rax, 96(%rsp)
leaq 16(%rsp), %rax
movq %rax, 104(%rsp)
leaq 8(%rsp), %rax
movq %rax, 112(%rsp)
movl $1, 48(%rsp)
movl $1, 52(%rsp)
movl $1, 56(%rsp)
movl $1, 60(%rsp)
movl $1, 64(%rsp)
movl $1, 68(%rsp)
leaq 40(%rsp), %rcx
leaq 32(%rsp), %rdx
leaq 60(%rsp), %rsi
leaq 48(%rsp), %rdi
call __cudaPopCallConfiguration@PLT
testl %eax, %eax
je .L37
.L33:
movq 120(%rsp), %rax
subq %fs:40, %rax
jne .L38
addq $136, %rsp
.cfi_remember_state
.cfi_def_cfa_offset 8
ret
.L37:
.cfi_restore_state
pushq 40(%rsp)
.cfi_def_cfa_offset 152
pushq 40(%rsp)
.cfi_def_cfa_offset 160
leaq 112(%rsp), %r9
movq 76(%rsp), %rcx
movl 84(%rsp), %r8d
movq 64(%rsp), %rsi
movl 72(%rsp), %edx
leaq _Z4add2PiS_S_(%rip), %rdi
call cudaLaunchKernel@PLT
addq $16, %rsp
.cfi_def_cfa_offset 144
jmp .L33
.L38:
call __stack_chk_fail@PLT
.cfi_endproc
.LFE2084:
.size _Z27__device_stub__Z4add2PiS_S_PiS_S_, .-_Z27__device_stub__Z4add2PiS_S_PiS_S_
.globl _Z4add2PiS_S_
.type _Z4add2PiS_S_, @function
_Z4add2PiS_S_:
.LFB2085:
.cfi_startproc
endbr64
subq $8, %rsp
.cfi_def_cfa_offset 16
call _Z27__device_stub__Z4add2PiS_S_PiS_S_
addq $8, %rsp
.cfi_def_cfa_offset 8
ret
.cfi_endproc
.LFE2085:
.size _Z4add2PiS_S_, .-_Z4add2PiS_S_
.globl _Z27__device_stub__Z4add3PiS_S_PiS_S_
.type _Z27__device_stub__Z4add3PiS_S_PiS_S_, @function
_Z27__device_stub__Z4add3PiS_S_PiS_S_:
.LFB2086:
.cfi_startproc
endbr64
subq $136, %rsp
.cfi_def_cfa_offset 144
movq %rdi, 24(%rsp)
movq %rsi, 16(%rsp)
movq %rdx, 8(%rsp)
movq %fs:40, %rax
movq %rax, 120(%rsp)
xorl %eax, %eax
leaq 24(%rsp), %rax
movq %rax, 96(%rsp)
leaq 16(%rsp), %rax
movq %rax, 104(%rsp)
leaq 8(%rsp), %rax
movq %rax, 112(%rsp)
movl $1, 48(%rsp)
movl $1, 52(%rsp)
movl $1, 56(%rsp)
movl $1, 60(%rsp)
movl $1, 64(%rsp)
movl $1, 68(%rsp)
leaq 40(%rsp), %rcx
leaq 32(%rsp), %rdx
leaq 60(%rsp), %rsi
leaq 48(%rsp), %rdi
call __cudaPopCallConfiguration@PLT
testl %eax, %eax
je .L45
.L41:
movq 120(%rsp), %rax
subq %fs:40, %rax
jne .L46
addq $136, %rsp
.cfi_remember_state
.cfi_def_cfa_offset 8
ret
.L45:
.cfi_restore_state
pushq 40(%rsp)
.cfi_def_cfa_offset 152
pushq 40(%rsp)
.cfi_def_cfa_offset 160
leaq 112(%rsp), %r9
movq 76(%rsp), %rcx
movl 84(%rsp), %r8d
movq 64(%rsp), %rsi
movl 72(%rsp), %edx
leaq _Z4add3PiS_S_(%rip), %rdi
call cudaLaunchKernel@PLT
addq $16, %rsp
.cfi_def_cfa_offset 144
jmp .L41
.L46:
call __stack_chk_fail@PLT
.cfi_endproc
.LFE2086:
.size _Z27__device_stub__Z4add3PiS_S_PiS_S_, .-_Z27__device_stub__Z4add3PiS_S_PiS_S_
.globl _Z4add3PiS_S_
.type _Z4add3PiS_S_, @function
_Z4add3PiS_S_:
.LFB2087:
.cfi_startproc
endbr64
subq $8, %rsp
.cfi_def_cfa_offset 16
call _Z27__device_stub__Z4add3PiS_S_PiS_S_
addq $8, %rsp
.cfi_def_cfa_offset 8
ret
.cfi_endproc
.LFE2087:
.size _Z4add3PiS_S_, .-_Z4add3PiS_S_
.section .rodata.str1.1
.LC9:
.string "_Z4add3PiS_S_"
.LC10:
.string "_Z4add2PiS_S_"
.LC11:
.string "_Z4add1PiS_S_"
.text
.type _ZL24__sti____cudaRegisterAllv, @function
_ZL24__sti____cudaRegisterAllv:
.LFB2089:
.cfi_startproc
endbr64
pushq %rbx
.cfi_def_cfa_offset 16
.cfi_offset 3, -16
leaq _ZL15__fatDeviceText(%rip), %rdi
call __cudaRegisterFatBinary@PLT
movq %rax, %rbx
movq %rax, _ZL20__cudaFatCubinHandle(%rip)
pushq $0
.cfi_def_cfa_offset 24
pushq $0
.cfi_def_cfa_offset 32
pushq $0
.cfi_def_cfa_offset 40
pushq $0
.cfi_def_cfa_offset 48
movl $0, %r9d
movl $-1, %r8d
leaq .LC9(%rip), %rdx
movq %rdx, %rcx
leaq _Z4add3PiS_S_(%rip), %rsi
movq %rax, %rdi
call __cudaRegisterFunction@PLT
addq $32, %rsp
.cfi_def_cfa_offset 16
pushq $0
.cfi_def_cfa_offset 24
pushq $0
.cfi_def_cfa_offset 32
pushq $0
.cfi_def_cfa_offset 40
pushq $0
.cfi_def_cfa_offset 48
movl $0, %r9d
movl $-1, %r8d
leaq .LC10(%rip), %rdx
movq %rdx, %rcx
leaq _Z4add2PiS_S_(%rip), %rsi
movq %rbx, %rdi
call __cudaRegisterFunction@PLT
addq $32, %rsp
.cfi_def_cfa_offset 16
pushq $0
.cfi_def_cfa_offset 24
pushq $0
.cfi_def_cfa_offset 32
pushq $0
.cfi_def_cfa_offset 40
pushq $0
.cfi_def_cfa_offset 48
movl $0, %r9d
movl $-1, %r8d
leaq .LC11(%rip), %rdx
movq %rdx, %rcx
leaq _Z4add1PiS_S_(%rip), %rsi
movq %rbx, %rdi
call __cudaRegisterFunction@PLT
addq $32, %rsp
.cfi_def_cfa_offset 16
movq _ZL20__cudaFatCubinHandle(%rip), %rdi
call __cudaRegisterFatBinaryEnd@PLT
leaq _ZL26__cudaUnregisterBinaryUtilv(%rip), %rdi
call atexit@PLT
popq %rbx
.cfi_def_cfa_offset 8
ret
.cfi_endproc
.LFE2089:
.size _ZL24__sti____cudaRegisterAllv, .-_ZL24__sti____cudaRegisterAllv
.section .init_array,"aw"
.align 8
.quad _ZL24__sti____cudaRegisterAllv
.section .nvFatBinSegment,"aw"
.align 8
.type _ZL15__fatDeviceText, @object
.size _ZL15__fatDeviceText, 24
_ZL15__fatDeviceText:
.long 1180844977
.long 1
.quad fatbinData
.quad 0
.local _ZL20__cudaFatCubinHandle
.comm _ZL20__cudaFatCubinHandle,8,8
.ident "GCC: (Ubuntu 13.3.0-6ubuntu2~24.04) 13.3.0"
.section .note.GNU-stack,"",@progbits
.section .note.gnu.property,"a"
.align 8
.long 1f - 0f
.long 4f - 1f
.long 5
0:
.string "GNU"
1:
.align 8
.long 0xc0000002
.long 3f - 2f
2:
.long 0x3
3:
.align 8
4: |
You are a helpful coding assistant specialized in converting CUDA source code to HIP/AMD source code. | #include "cuda_runtime.h"
#include "device_launch_parameters.h"
#include <stdio.h>
#include <stdlib.h>
#include <math.h>
__global__ void add1(int *a, int *b, int *c){
int idx = blockIdx.x;
c[idx] = a[idx] + b[idx];
}
__global__ void add2(int* a, int* b, int* c){
int idx = threadIdx.x;
c[idx] = a[idx] + b[idx];
}
__global__ void add3(int* a, int* b, int* c){
int idx = blockIdx.x*blockDim.x + threadIdx.x;
c[idx] = a[idx] + b[idx];
}
int main(){
int N; //number of elements
int *d_a, *d_b, *d_c; //Device copies
int size = sizeof(int); //size var
int *A, *B, *C; //vectors
printf("Enter number of elements: ");
scanf("%d",&N);
A = (int*)malloc(sizeof(int)*N);
B = (int*)malloc(sizeof(int)*N);
C = (int*)malloc(sizeof(int)*N);
printf("Enter elements a <space> b:\n");
for(int i=0; i<N; i++){
scanf("%d %d",&A[i],&B[i]);
}
//Allocate space for device copies of a,b,c
cudaMalloc((void**)&d_a,size*N);
cudaMalloc((void**)&d_b,size*N);
cudaMalloc((void**)&d_c,size*N);
//setup input values
cudaMemcpy(d_a,A,size*N,cudaMemcpyHostToDevice);
cudaMemcpy(d_b,B,size*N,cudaMemcpyHostToDevice);
printf("\n// LAUNCHING ADD1 //\n");
//launch add kernel on GPU
dim3 Blocks1(N,1,1);
dim3 Threads1(1,1,1);
add1<<<Blocks1,Threads1>>>(d_a,d_b,d_c);
//copy result back to host
cudaMemcpy(C,d_c,size*N,cudaMemcpyDeviceToHost);
printf("Result:\n");
for(int i=0; i<N; i++)
printf("%d ",C[i]);
printf("\n// LAUNCHING ADD2 //\n");
//launch add kernel on GPU
dim3 Blocks2(1,1,1);
dim3 Threads2(N,1,1);
add1<<<Blocks2,Threads2>>>(d_a,d_b,d_c);
//copy result back to host
cudaMemcpy(C,d_c,size*N,cudaMemcpyDeviceToHost);
printf("Result:\n");
for(int i=0; i<N; i++)
printf("%d ",C[i]);
printf("\n// LAUNCHING ADD3 //\n");
//launch add kernel on GPU
dim3 Blocks3(ceilf(N/256),1,1);
dim3 Threads3(256,1,1);
add1<<<Blocks3,Threads3>>>(d_a,d_b,d_c);
//copy result back to host
cudaMemcpy(C,d_c,size*N,cudaMemcpyDeviceToHost);
printf("Result:\n");
for(int i=0; i<N; i++)
printf("%d ",C[i]);
//Cleanup
cudaFree(d_a);
cudaFree(d_b);
cudaFree(d_c);
return 0;
} | #include "hip/hip_runtime.h"
#include <stdio.h>
#include <stdlib.h>
#include <math.h>
__global__ void add1(int *a, int *b, int *c){
int idx = blockIdx.x;
c[idx] = a[idx] + b[idx];
}
__global__ void add2(int* a, int* b, int* c){
int idx = threadIdx.x;
c[idx] = a[idx] + b[idx];
}
__global__ void add3(int* a, int* b, int* c){
int idx = blockIdx.x*blockDim.x + threadIdx.x;
c[idx] = a[idx] + b[idx];
}
int main(){
int N; //number of elements
int *d_a, *d_b, *d_c; //Device copies
int size = sizeof(int); //size var
int *A, *B, *C; //vectors
printf("Enter number of elements: ");
scanf("%d",&N);
A = (int*)malloc(sizeof(int)*N);
B = (int*)malloc(sizeof(int)*N);
C = (int*)malloc(sizeof(int)*N);
printf("Enter elements a <space> b:\n");
for(int i=0; i<N; i++){
scanf("%d %d",&A[i],&B[i]);
}
//Allocate space for device copies of a,b,c
hipMalloc((void**)&d_a,size*N);
hipMalloc((void**)&d_b,size*N);
hipMalloc((void**)&d_c,size*N);
//setup input values
hipMemcpy(d_a,A,size*N,hipMemcpyHostToDevice);
hipMemcpy(d_b,B,size*N,hipMemcpyHostToDevice);
printf("\n// LAUNCHING ADD1 //\n");
//launch add kernel on GPU
dim3 Blocks1(N,1,1);
dim3 Threads1(1,1,1);
add1<<<Blocks1,Threads1>>>(d_a,d_b,d_c);
//copy result back to host
hipMemcpy(C,d_c,size*N,hipMemcpyDeviceToHost);
printf("Result:\n");
for(int i=0; i<N; i++)
printf("%d ",C[i]);
printf("\n// LAUNCHING ADD2 //\n");
//launch add kernel on GPU
dim3 Blocks2(1,1,1);
dim3 Threads2(N,1,1);
add1<<<Blocks2,Threads2>>>(d_a,d_b,d_c);
//copy result back to host
hipMemcpy(C,d_c,size*N,hipMemcpyDeviceToHost);
printf("Result:\n");
for(int i=0; i<N; i++)
printf("%d ",C[i]);
printf("\n// LAUNCHING ADD3 //\n");
//launch add kernel on GPU
dim3 Blocks3(ceilf(N/256),1,1);
dim3 Threads3(256,1,1);
add1<<<Blocks3,Threads3>>>(d_a,d_b,d_c);
//copy result back to host
hipMemcpy(C,d_c,size*N,hipMemcpyDeviceToHost);
printf("Result:\n");
for(int i=0; i<N; i++)
printf("%d ",C[i]);
//Cleanup
hipFree(d_a);
hipFree(d_b);
hipFree(d_c);
return 0;
} |
You are a helpful coding assistant specialized in converting HIP source code to AMD device assembly. | #include "hip/hip_runtime.h"
#include <stdio.h>
#include <stdlib.h>
#include <math.h>
__global__ void add1(int *a, int *b, int *c){
int idx = blockIdx.x;
c[idx] = a[idx] + b[idx];
}
__global__ void add2(int* a, int* b, int* c){
int idx = threadIdx.x;
c[idx] = a[idx] + b[idx];
}
__global__ void add3(int* a, int* b, int* c){
int idx = blockIdx.x*blockDim.x + threadIdx.x;
c[idx] = a[idx] + b[idx];
}
int main(){
int N; //number of elements
int *d_a, *d_b, *d_c; //Device copies
int size = sizeof(int); //size var
int *A, *B, *C; //vectors
printf("Enter number of elements: ");
scanf("%d",&N);
A = (int*)malloc(sizeof(int)*N);
B = (int*)malloc(sizeof(int)*N);
C = (int*)malloc(sizeof(int)*N);
printf("Enter elements a <space> b:\n");
for(int i=0; i<N; i++){
scanf("%d %d",&A[i],&B[i]);
}
//Allocate space for device copies of a,b,c
hipMalloc((void**)&d_a,size*N);
hipMalloc((void**)&d_b,size*N);
hipMalloc((void**)&d_c,size*N);
//setup input values
hipMemcpy(d_a,A,size*N,hipMemcpyHostToDevice);
hipMemcpy(d_b,B,size*N,hipMemcpyHostToDevice);
printf("\n// LAUNCHING ADD1 //\n");
//launch add kernel on GPU
dim3 Blocks1(N,1,1);
dim3 Threads1(1,1,1);
add1<<<Blocks1,Threads1>>>(d_a,d_b,d_c);
//copy result back to host
hipMemcpy(C,d_c,size*N,hipMemcpyDeviceToHost);
printf("Result:\n");
for(int i=0; i<N; i++)
printf("%d ",C[i]);
printf("\n// LAUNCHING ADD2 //\n");
//launch add kernel on GPU
dim3 Blocks2(1,1,1);
dim3 Threads2(N,1,1);
add1<<<Blocks2,Threads2>>>(d_a,d_b,d_c);
//copy result back to host
hipMemcpy(C,d_c,size*N,hipMemcpyDeviceToHost);
printf("Result:\n");
for(int i=0; i<N; i++)
printf("%d ",C[i]);
printf("\n// LAUNCHING ADD3 //\n");
//launch add kernel on GPU
dim3 Blocks3(ceilf(N/256),1,1);
dim3 Threads3(256,1,1);
add1<<<Blocks3,Threads3>>>(d_a,d_b,d_c);
//copy result back to host
hipMemcpy(C,d_c,size*N,hipMemcpyDeviceToHost);
printf("Result:\n");
for(int i=0; i<N; i++)
printf("%d ",C[i]);
//Cleanup
hipFree(d_a);
hipFree(d_b);
hipFree(d_c);
return 0;
} | .text
.amdgcn_target "amdgcn-amd-amdhsa--gfx1100"
.protected _Z4add1PiS_S_
.globl _Z4add1PiS_S_
.p2align 8
.type _Z4add1PiS_S_,@function
_Z4add1PiS_S_:
s_load_b128 s[4:7], s[0:1], 0x0
s_mov_b32 s2, s15
s_ashr_i32 s3, s15, 31
s_load_b64 s[0:1], s[0:1], 0x10
s_lshl_b64 s[2:3], s[2:3], 2
s_waitcnt lgkmcnt(0)
s_add_u32 s4, s4, s2
s_addc_u32 s5, s5, s3
s_add_u32 s6, s6, s2
s_addc_u32 s7, s7, s3
s_load_b32 s4, s[4:5], 0x0
s_load_b32 s5, s[6:7], 0x0
s_waitcnt lgkmcnt(0)
s_add_i32 s4, s5, s4
s_delay_alu instid0(SALU_CYCLE_1)
v_dual_mov_b32 v0, 0 :: v_dual_mov_b32 v1, s4
s_add_u32 s0, s0, s2
s_addc_u32 s1, s1, s3
global_store_b32 v0, v1, s[0:1]
s_nop 0
s_sendmsg sendmsg(MSG_DEALLOC_VGPRS)
s_endpgm
.section .rodata,"a",@progbits
.p2align 6, 0x0
.amdhsa_kernel _Z4add1PiS_S_
.amdhsa_group_segment_fixed_size 0
.amdhsa_private_segment_fixed_size 0
.amdhsa_kernarg_size 24
.amdhsa_user_sgpr_count 15
.amdhsa_user_sgpr_dispatch_ptr 0
.amdhsa_user_sgpr_queue_ptr 0
.amdhsa_user_sgpr_kernarg_segment_ptr 1
.amdhsa_user_sgpr_dispatch_id 0
.amdhsa_user_sgpr_private_segment_size 0
.amdhsa_wavefront_size32 1
.amdhsa_uses_dynamic_stack 0
.amdhsa_enable_private_segment 0
.amdhsa_system_sgpr_workgroup_id_x 1
.amdhsa_system_sgpr_workgroup_id_y 0
.amdhsa_system_sgpr_workgroup_id_z 0
.amdhsa_system_sgpr_workgroup_info 0
.amdhsa_system_vgpr_workitem_id 0
.amdhsa_next_free_vgpr 2
.amdhsa_next_free_sgpr 16
.amdhsa_reserve_vcc 0
.amdhsa_float_round_mode_32 0
.amdhsa_float_round_mode_16_64 0
.amdhsa_float_denorm_mode_32 3
.amdhsa_float_denorm_mode_16_64 3
.amdhsa_dx10_clamp 1
.amdhsa_ieee_mode 1
.amdhsa_fp16_overflow 0
.amdhsa_workgroup_processor_mode 1
.amdhsa_memory_ordered 1
.amdhsa_forward_progress 0
.amdhsa_shared_vgpr_count 0
.amdhsa_exception_fp_ieee_invalid_op 0
.amdhsa_exception_fp_denorm_src 0
.amdhsa_exception_fp_ieee_div_zero 0
.amdhsa_exception_fp_ieee_overflow 0
.amdhsa_exception_fp_ieee_underflow 0
.amdhsa_exception_fp_ieee_inexact 0
.amdhsa_exception_int_div_zero 0
.end_amdhsa_kernel
.text
.Lfunc_end0:
.size _Z4add1PiS_S_, .Lfunc_end0-_Z4add1PiS_S_
.section .AMDGPU.csdata,"",@progbits
.text
.protected _Z4add2PiS_S_
.globl _Z4add2PiS_S_
.p2align 8
.type _Z4add2PiS_S_,@function
_Z4add2PiS_S_:
s_load_b128 s[4:7], s[0:1], 0x0
v_lshlrev_b32_e32 v0, 2, v0
s_load_b64 s[0:1], s[0:1], 0x10
s_waitcnt lgkmcnt(0)
s_clause 0x1
global_load_b32 v1, v0, s[4:5]
global_load_b32 v2, v0, s[6:7]
s_waitcnt vmcnt(0)
v_add_nc_u32_e32 v1, v2, v1
global_store_b32 v0, v1, s[0:1]
s_nop 0
s_sendmsg sendmsg(MSG_DEALLOC_VGPRS)
s_endpgm
.section .rodata,"a",@progbits
.p2align 6, 0x0
.amdhsa_kernel _Z4add2PiS_S_
.amdhsa_group_segment_fixed_size 0
.amdhsa_private_segment_fixed_size 0
.amdhsa_kernarg_size 24
.amdhsa_user_sgpr_count 15
.amdhsa_user_sgpr_dispatch_ptr 0
.amdhsa_user_sgpr_queue_ptr 0
.amdhsa_user_sgpr_kernarg_segment_ptr 1
.amdhsa_user_sgpr_dispatch_id 0
.amdhsa_user_sgpr_private_segment_size 0
.amdhsa_wavefront_size32 1
.amdhsa_uses_dynamic_stack 0
.amdhsa_enable_private_segment 0
.amdhsa_system_sgpr_workgroup_id_x 1
.amdhsa_system_sgpr_workgroup_id_y 0
.amdhsa_system_sgpr_workgroup_id_z 0
.amdhsa_system_sgpr_workgroup_info 0
.amdhsa_system_vgpr_workitem_id 0
.amdhsa_next_free_vgpr 3
.amdhsa_next_free_sgpr 8
.amdhsa_reserve_vcc 0
.amdhsa_float_round_mode_32 0
.amdhsa_float_round_mode_16_64 0
.amdhsa_float_denorm_mode_32 3
.amdhsa_float_denorm_mode_16_64 3
.amdhsa_dx10_clamp 1
.amdhsa_ieee_mode 1
.amdhsa_fp16_overflow 0
.amdhsa_workgroup_processor_mode 1
.amdhsa_memory_ordered 1
.amdhsa_forward_progress 0
.amdhsa_shared_vgpr_count 0
.amdhsa_exception_fp_ieee_invalid_op 0
.amdhsa_exception_fp_denorm_src 0
.amdhsa_exception_fp_ieee_div_zero 0
.amdhsa_exception_fp_ieee_overflow 0
.amdhsa_exception_fp_ieee_underflow 0
.amdhsa_exception_fp_ieee_inexact 0
.amdhsa_exception_int_div_zero 0
.end_amdhsa_kernel
.text
.Lfunc_end1:
.size _Z4add2PiS_S_, .Lfunc_end1-_Z4add2PiS_S_
.section .AMDGPU.csdata,"",@progbits
.text
.protected _Z4add3PiS_S_
.globl _Z4add3PiS_S_
.p2align 8
.type _Z4add3PiS_S_,@function
_Z4add3PiS_S_:
s_clause 0x2
s_load_b32 s2, s[0:1], 0x24
s_load_b128 s[4:7], s[0:1], 0x0
s_load_b64 s[0:1], s[0:1], 0x10
s_waitcnt lgkmcnt(0)
s_and_b32 s2, s2, 0xffff
s_delay_alu instid0(SALU_CYCLE_1) | instskip(NEXT) | instid1(VALU_DEP_1)
v_mad_u64_u32 v[1:2], null, s15, s2, v[0:1]
v_ashrrev_i32_e32 v2, 31, v1
s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
v_lshlrev_b64 v[0:1], 2, v[1:2]
v_add_co_u32 v2, vcc_lo, s4, v0
s_delay_alu instid0(VALU_DEP_2)
v_add_co_ci_u32_e32 v3, vcc_lo, s5, v1, vcc_lo
v_add_co_u32 v4, vcc_lo, s6, v0
v_add_co_ci_u32_e32 v5, vcc_lo, s7, v1, vcc_lo
v_add_co_u32 v0, vcc_lo, s0, v0
global_load_b32 v2, v[2:3], off
global_load_b32 v3, v[4:5], off
v_add_co_ci_u32_e32 v1, vcc_lo, s1, v1, vcc_lo
s_waitcnt vmcnt(0)
v_add_nc_u32_e32 v2, v3, v2
global_store_b32 v[0:1], v2, off
s_nop 0
s_sendmsg sendmsg(MSG_DEALLOC_VGPRS)
s_endpgm
.section .rodata,"a",@progbits
.p2align 6, 0x0
.amdhsa_kernel _Z4add3PiS_S_
.amdhsa_group_segment_fixed_size 0
.amdhsa_private_segment_fixed_size 0
.amdhsa_kernarg_size 280
.amdhsa_user_sgpr_count 15
.amdhsa_user_sgpr_dispatch_ptr 0
.amdhsa_user_sgpr_queue_ptr 0
.amdhsa_user_sgpr_kernarg_segment_ptr 1
.amdhsa_user_sgpr_dispatch_id 0
.amdhsa_user_sgpr_private_segment_size 0
.amdhsa_wavefront_size32 1
.amdhsa_uses_dynamic_stack 0
.amdhsa_enable_private_segment 0
.amdhsa_system_sgpr_workgroup_id_x 1
.amdhsa_system_sgpr_workgroup_id_y 0
.amdhsa_system_sgpr_workgroup_id_z 0
.amdhsa_system_sgpr_workgroup_info 0
.amdhsa_system_vgpr_workitem_id 0
.amdhsa_next_free_vgpr 6
.amdhsa_next_free_sgpr 16
.amdhsa_float_round_mode_32 0
.amdhsa_float_round_mode_16_64 0
.amdhsa_float_denorm_mode_32 3
.amdhsa_float_denorm_mode_16_64 3
.amdhsa_dx10_clamp 1
.amdhsa_ieee_mode 1
.amdhsa_fp16_overflow 0
.amdhsa_workgroup_processor_mode 1
.amdhsa_memory_ordered 1
.amdhsa_forward_progress 0
.amdhsa_shared_vgpr_count 0
.amdhsa_exception_fp_ieee_invalid_op 0
.amdhsa_exception_fp_denorm_src 0
.amdhsa_exception_fp_ieee_div_zero 0
.amdhsa_exception_fp_ieee_overflow 0
.amdhsa_exception_fp_ieee_underflow 0
.amdhsa_exception_fp_ieee_inexact 0
.amdhsa_exception_int_div_zero 0
.end_amdhsa_kernel
.text
.Lfunc_end2:
.size _Z4add3PiS_S_, .Lfunc_end2-_Z4add3PiS_S_
.section .AMDGPU.csdata,"",@progbits
.text
.p2alignl 7, 3214868480
.fill 96, 4, 3214868480
.type __hip_cuid_,@object
.section .bss,"aw",@nobits
.globl __hip_cuid_
__hip_cuid_:
.byte 0
.size __hip_cuid_, 1
.ident "AMD clang version 18.0.0git (https://github.com/RadeonOpenCompute/llvm-project roc-6.3.2 25012 e5bf7e55c91490b07c49d8960fa7983d864936c4)"
.section ".note.GNU-stack","",@progbits
.addrsig
.addrsig_sym __hip_cuid_
.amdgpu_metadata
---
amdhsa.kernels:
- .args:
- .address_space: global
.offset: 0
.size: 8
.value_kind: global_buffer
- .address_space: global
.offset: 8
.size: 8
.value_kind: global_buffer
- .address_space: global
.offset: 16
.size: 8
.value_kind: global_buffer
.group_segment_fixed_size: 0
.kernarg_segment_align: 8
.kernarg_segment_size: 24
.language: OpenCL C
.language_version:
- 2
- 0
.max_flat_workgroup_size: 1024
.name: _Z4add1PiS_S_
.private_segment_fixed_size: 0
.sgpr_count: 16
.sgpr_spill_count: 0
.symbol: _Z4add1PiS_S_.kd
.uniform_work_group_size: 1
.uses_dynamic_stack: false
.vgpr_count: 2
.vgpr_spill_count: 0
.wavefront_size: 32
.workgroup_processor_mode: 1
- .args:
- .address_space: global
.offset: 0
.size: 8
.value_kind: global_buffer
- .address_space: global
.offset: 8
.size: 8
.value_kind: global_buffer
- .address_space: global
.offset: 16
.size: 8
.value_kind: global_buffer
.group_segment_fixed_size: 0
.kernarg_segment_align: 8
.kernarg_segment_size: 24
.language: OpenCL C
.language_version:
- 2
- 0
.max_flat_workgroup_size: 1024
.name: _Z4add2PiS_S_
.private_segment_fixed_size: 0
.sgpr_count: 8
.sgpr_spill_count: 0
.symbol: _Z4add2PiS_S_.kd
.uniform_work_group_size: 1
.uses_dynamic_stack: false
.vgpr_count: 3
.vgpr_spill_count: 0
.wavefront_size: 32
.workgroup_processor_mode: 1
- .args:
- .address_space: global
.offset: 0
.size: 8
.value_kind: global_buffer
- .address_space: global
.offset: 8
.size: 8
.value_kind: global_buffer
- .address_space: global
.offset: 16
.size: 8
.value_kind: global_buffer
- .offset: 24
.size: 4
.value_kind: hidden_block_count_x
- .offset: 28
.size: 4
.value_kind: hidden_block_count_y
- .offset: 32
.size: 4
.value_kind: hidden_block_count_z
- .offset: 36
.size: 2
.value_kind: hidden_group_size_x
- .offset: 38
.size: 2
.value_kind: hidden_group_size_y
- .offset: 40
.size: 2
.value_kind: hidden_group_size_z
- .offset: 42
.size: 2
.value_kind: hidden_remainder_x
- .offset: 44
.size: 2
.value_kind: hidden_remainder_y
- .offset: 46
.size: 2
.value_kind: hidden_remainder_z
- .offset: 64
.size: 8
.value_kind: hidden_global_offset_x
- .offset: 72
.size: 8
.value_kind: hidden_global_offset_y
- .offset: 80
.size: 8
.value_kind: hidden_global_offset_z
- .offset: 88
.size: 2
.value_kind: hidden_grid_dims
.group_segment_fixed_size: 0
.kernarg_segment_align: 8
.kernarg_segment_size: 280
.language: OpenCL C
.language_version:
- 2
- 0
.max_flat_workgroup_size: 1024
.name: _Z4add3PiS_S_
.private_segment_fixed_size: 0
.sgpr_count: 18
.sgpr_spill_count: 0
.symbol: _Z4add3PiS_S_.kd
.uniform_work_group_size: 1
.uses_dynamic_stack: false
.vgpr_count: 6
.vgpr_spill_count: 0
.wavefront_size: 32
.workgroup_processor_mode: 1
amdhsa.target: amdgcn-amd-amdhsa--gfx1100
amdhsa.version:
- 1
- 2
...
.end_amdgpu_metadata |
You are a helpful coding assistant specialized in converting HIP source code to AMD host assembly. | #include "hip/hip_runtime.h"
#include <stdio.h>
#include <stdlib.h>
#include <math.h>
__global__ void add1(int *a, int *b, int *c){
int idx = blockIdx.x;
c[idx] = a[idx] + b[idx];
}
__global__ void add2(int* a, int* b, int* c){
int idx = threadIdx.x;
c[idx] = a[idx] + b[idx];
}
__global__ void add3(int* a, int* b, int* c){
int idx = blockIdx.x*blockDim.x + threadIdx.x;
c[idx] = a[idx] + b[idx];
}
int main(){
int N; //number of elements
int *d_a, *d_b, *d_c; //Device copies
int size = sizeof(int); //size var
int *A, *B, *C; //vectors
printf("Enter number of elements: ");
scanf("%d",&N);
A = (int*)malloc(sizeof(int)*N);
B = (int*)malloc(sizeof(int)*N);
C = (int*)malloc(sizeof(int)*N);
printf("Enter elements a <space> b:\n");
for(int i=0; i<N; i++){
scanf("%d %d",&A[i],&B[i]);
}
//Allocate space for device copies of a,b,c
hipMalloc((void**)&d_a,size*N);
hipMalloc((void**)&d_b,size*N);
hipMalloc((void**)&d_c,size*N);
//setup input values
hipMemcpy(d_a,A,size*N,hipMemcpyHostToDevice);
hipMemcpy(d_b,B,size*N,hipMemcpyHostToDevice);
printf("\n// LAUNCHING ADD1 //\n");
//launch add kernel on GPU
dim3 Blocks1(N,1,1);
dim3 Threads1(1,1,1);
add1<<<Blocks1,Threads1>>>(d_a,d_b,d_c);
//copy result back to host
hipMemcpy(C,d_c,size*N,hipMemcpyDeviceToHost);
printf("Result:\n");
for(int i=0; i<N; i++)
printf("%d ",C[i]);
printf("\n// LAUNCHING ADD2 //\n");
//launch add kernel on GPU
dim3 Blocks2(1,1,1);
dim3 Threads2(N,1,1);
add1<<<Blocks2,Threads2>>>(d_a,d_b,d_c);
//copy result back to host
hipMemcpy(C,d_c,size*N,hipMemcpyDeviceToHost);
printf("Result:\n");
for(int i=0; i<N; i++)
printf("%d ",C[i]);
printf("\n// LAUNCHING ADD3 //\n");
//launch add kernel on GPU
dim3 Blocks3(ceilf(N/256),1,1);
dim3 Threads3(256,1,1);
add1<<<Blocks3,Threads3>>>(d_a,d_b,d_c);
//copy result back to host
hipMemcpy(C,d_c,size*N,hipMemcpyDeviceToHost);
printf("Result:\n");
for(int i=0; i<N; i++)
printf("%d ",C[i]);
//Cleanup
hipFree(d_a);
hipFree(d_b);
hipFree(d_c);
return 0;
} | .text
.file "CUDA_VectorAdd.hip"
.globl _Z19__device_stub__add1PiS_S_ # -- Begin function _Z19__device_stub__add1PiS_S_
.p2align 4, 0x90
.type _Z19__device_stub__add1PiS_S_,@function
_Z19__device_stub__add1PiS_S_: # @_Z19__device_stub__add1PiS_S_
.cfi_startproc
# %bb.0:
subq $104, %rsp
.cfi_def_cfa_offset 112
movq %rdi, 72(%rsp)
movq %rsi, 64(%rsp)
movq %rdx, 56(%rsp)
leaq 72(%rsp), %rax
movq %rax, 80(%rsp)
leaq 64(%rsp), %rax
movq %rax, 88(%rsp)
leaq 56(%rsp), %rax
movq %rax, 96(%rsp)
leaq 40(%rsp), %rdi
leaq 24(%rsp), %rsi
leaq 16(%rsp), %rdx
leaq 8(%rsp), %rcx
callq __hipPopCallConfiguration
movq 40(%rsp), %rsi
movl 48(%rsp), %edx
movq 24(%rsp), %rcx
movl 32(%rsp), %r8d
leaq 80(%rsp), %r9
movl $_Z4add1PiS_S_, %edi
pushq 8(%rsp)
.cfi_adjust_cfa_offset 8
pushq 24(%rsp)
.cfi_adjust_cfa_offset 8
callq hipLaunchKernel
addq $120, %rsp
.cfi_adjust_cfa_offset -120
retq
.Lfunc_end0:
.size _Z19__device_stub__add1PiS_S_, .Lfunc_end0-_Z19__device_stub__add1PiS_S_
.cfi_endproc
# -- End function
.globl _Z19__device_stub__add2PiS_S_ # -- Begin function _Z19__device_stub__add2PiS_S_
.p2align 4, 0x90
.type _Z19__device_stub__add2PiS_S_,@function
_Z19__device_stub__add2PiS_S_: # @_Z19__device_stub__add2PiS_S_
.cfi_startproc
# %bb.0:
subq $104, %rsp
.cfi_def_cfa_offset 112
movq %rdi, 72(%rsp)
movq %rsi, 64(%rsp)
movq %rdx, 56(%rsp)
leaq 72(%rsp), %rax
movq %rax, 80(%rsp)
leaq 64(%rsp), %rax
movq %rax, 88(%rsp)
leaq 56(%rsp), %rax
movq %rax, 96(%rsp)
leaq 40(%rsp), %rdi
leaq 24(%rsp), %rsi
leaq 16(%rsp), %rdx
leaq 8(%rsp), %rcx
callq __hipPopCallConfiguration
movq 40(%rsp), %rsi
movl 48(%rsp), %edx
movq 24(%rsp), %rcx
movl 32(%rsp), %r8d
leaq 80(%rsp), %r9
movl $_Z4add2PiS_S_, %edi
pushq 8(%rsp)
.cfi_adjust_cfa_offset 8
pushq 24(%rsp)
.cfi_adjust_cfa_offset 8
callq hipLaunchKernel
addq $120, %rsp
.cfi_adjust_cfa_offset -120
retq
.Lfunc_end1:
.size _Z19__device_stub__add2PiS_S_, .Lfunc_end1-_Z19__device_stub__add2PiS_S_
.cfi_endproc
# -- End function
.globl _Z19__device_stub__add3PiS_S_ # -- Begin function _Z19__device_stub__add3PiS_S_
.p2align 4, 0x90
.type _Z19__device_stub__add3PiS_S_,@function
_Z19__device_stub__add3PiS_S_: # @_Z19__device_stub__add3PiS_S_
.cfi_startproc
# %bb.0:
subq $104, %rsp
.cfi_def_cfa_offset 112
movq %rdi, 72(%rsp)
movq %rsi, 64(%rsp)
movq %rdx, 56(%rsp)
leaq 72(%rsp), %rax
movq %rax, 80(%rsp)
leaq 64(%rsp), %rax
movq %rax, 88(%rsp)
leaq 56(%rsp), %rax
movq %rax, 96(%rsp)
leaq 40(%rsp), %rdi
leaq 24(%rsp), %rsi
leaq 16(%rsp), %rdx
leaq 8(%rsp), %rcx
callq __hipPopCallConfiguration
movq 40(%rsp), %rsi
movl 48(%rsp), %edx
movq 24(%rsp), %rcx
movl 32(%rsp), %r8d
leaq 80(%rsp), %r9
movl $_Z4add3PiS_S_, %edi
pushq 8(%rsp)
.cfi_adjust_cfa_offset 8
pushq 24(%rsp)
.cfi_adjust_cfa_offset 8
callq hipLaunchKernel
addq $120, %rsp
.cfi_adjust_cfa_offset -120
retq
.Lfunc_end2:
.size _Z19__device_stub__add3PiS_S_, .Lfunc_end2-_Z19__device_stub__add3PiS_S_
.cfi_endproc
# -- End function
.globl main # -- Begin function main
.p2align 4, 0x90
.type main,@function
main: # @main
.cfi_startproc
# %bb.0:
pushq %rbp
.cfi_def_cfa_offset 16
pushq %r15
.cfi_def_cfa_offset 24
pushq %r14
.cfi_def_cfa_offset 32
pushq %r13
.cfi_def_cfa_offset 40
pushq %r12
.cfi_def_cfa_offset 48
pushq %rbx
.cfi_def_cfa_offset 56
subq $136, %rsp
.cfi_def_cfa_offset 192
.cfi_offset %rbx, -56
.cfi_offset %r12, -48
.cfi_offset %r13, -40
.cfi_offset %r14, -32
.cfi_offset %r15, -24
.cfi_offset %rbp, -16
movl $.L.str, %edi
xorl %eax, %eax
callq printf
leaq 12(%rsp), %rsi
movl $.L.str.1, %edi
xorl %eax, %eax
callq __isoc23_scanf
movslq 12(%rsp), %rbx
shlq $2, %rbx
movq %rbx, %rdi
callq malloc
movq %rax, %r12
movq %rbx, %rdi
callq malloc
movq %rax, %r15
movq %rbx, %rdi
callq malloc
movq %rax, %rbx
movl $.Lstr, %edi
callq puts@PLT
movl 12(%rsp), %eax
testl %eax, %eax
jle .LBB3_3
# %bb.1: # %.lr.ph.preheader
movq %r12, %r14
movq %r15, %r13
xorl %ebp, %ebp
.p2align 4, 0x90
.LBB3_2: # %.lr.ph
# =>This Inner Loop Header: Depth=1
movl $.L.str.3, %edi
movq %r14, %rsi
movq %r13, %rdx
xorl %eax, %eax
callq __isoc23_scanf
incq %rbp
movslq 12(%rsp), %rax
addq $4, %r13
addq $4, %r14
cmpq %rax, %rbp
jl .LBB3_2
.LBB3_3: # %._crit_edge
movabsq $4294967296, %r14 # imm = 0x100000000
shll $2, %eax
movslq %eax, %rsi
leaq 32(%rsp), %rdi
callq hipMalloc
movslq 12(%rsp), %rsi
shlq $2, %rsi
leaq 24(%rsp), %rdi
callq hipMalloc
movslq 12(%rsp), %rsi
shlq $2, %rsi
leaq 16(%rsp), %rdi
callq hipMalloc
movq 32(%rsp), %rdi
movslq 12(%rsp), %rdx
shlq $2, %rdx
movq %r12, %rsi
movl $1, %ecx
callq hipMemcpy
movq 24(%rsp), %rdi
movslq 12(%rsp), %rdx
shlq $2, %rdx
movq %r15, %rsi
movl $1, %ecx
callq hipMemcpy
movl $.Lstr.1, %edi
callq puts@PLT
movl 12(%rsp), %edi
orq %r14, %rdi
leaq 1(%r14), %rdx
movl $1, %esi
movl $1, %ecx
xorl %r8d, %r8d
xorl %r9d, %r9d
callq __hipPushCallConfiguration
testl %eax, %eax
jne .LBB3_5
# %bb.4:
movq 32(%rsp), %rax
movq 24(%rsp), %rcx
movq 16(%rsp), %rdx
movq %rax, 104(%rsp)
movq %rcx, 96(%rsp)
movq %rdx, 88(%rsp)
leaq 104(%rsp), %rax
movq %rax, 112(%rsp)
leaq 96(%rsp), %rax
movq %rax, 120(%rsp)
leaq 88(%rsp), %rax
movq %rax, 128(%rsp)
leaq 72(%rsp), %rdi
leaq 56(%rsp), %rsi
leaq 48(%rsp), %rdx
leaq 40(%rsp), %rcx
callq __hipPopCallConfiguration
movq 72(%rsp), %rsi
movl 80(%rsp), %edx
movq 56(%rsp), %rcx
movl 64(%rsp), %r8d
leaq 112(%rsp), %r9
movl $_Z4add1PiS_S_, %edi
pushq 40(%rsp)
.cfi_adjust_cfa_offset 8
pushq 56(%rsp)
.cfi_adjust_cfa_offset 8
callq hipLaunchKernel
addq $16, %rsp
.cfi_adjust_cfa_offset -16
.LBB3_5:
movq 16(%rsp), %rsi
movslq 12(%rsp), %rdx
shlq $2, %rdx
movq %rbx, %rdi
movl $2, %ecx
callq hipMemcpy
movl $.Lstr.6, %edi
callq puts@PLT
cmpl $0, 12(%rsp)
jle .LBB3_8
# %bb.6: # %.lr.ph89.preheader
xorl %r15d, %r15d
.p2align 4, 0x90
.LBB3_7: # %.lr.ph89
# =>This Inner Loop Header: Depth=1
movl (%rbx,%r15,4), %esi
movl $.L.str.6, %edi
xorl %eax, %eax
callq printf
incq %r15
movslq 12(%rsp), %rax
cmpq %rax, %r15
jl .LBB3_7
.LBB3_8: # %._crit_edge90
movl $.Lstr.3, %edi
callq puts@PLT
movl 12(%rsp), %edx
orq %r14, %rdx
leaq 1(%r14), %rdi
movl $1, %esi
movl $1, %ecx
xorl %r8d, %r8d
xorl %r9d, %r9d
callq __hipPushCallConfiguration
testl %eax, %eax
jne .LBB3_10
# %bb.9:
movq 32(%rsp), %rax
movq 24(%rsp), %rcx
movq 16(%rsp), %rdx
movq %rax, 104(%rsp)
movq %rcx, 96(%rsp)
movq %rdx, 88(%rsp)
leaq 104(%rsp), %rax
movq %rax, 112(%rsp)
leaq 96(%rsp), %rax
movq %rax, 120(%rsp)
leaq 88(%rsp), %rax
movq %rax, 128(%rsp)
leaq 72(%rsp), %rdi
leaq 56(%rsp), %rsi
leaq 48(%rsp), %rdx
leaq 40(%rsp), %rcx
callq __hipPopCallConfiguration
movq 72(%rsp), %rsi
movl 80(%rsp), %edx
movq 56(%rsp), %rcx
movl 64(%rsp), %r8d
leaq 112(%rsp), %r9
movl $_Z4add1PiS_S_, %edi
pushq 40(%rsp)
.cfi_adjust_cfa_offset 8
pushq 56(%rsp)
.cfi_adjust_cfa_offset 8
callq hipLaunchKernel
addq $16, %rsp
.cfi_adjust_cfa_offset -16
.LBB3_10:
movq 16(%rsp), %rsi
movslq 12(%rsp), %rdx
shlq $2, %rdx
movq %rbx, %rdi
movl $2, %ecx
callq hipMemcpy
movl $.Lstr.6, %edi
callq puts@PLT
cmpl $0, 12(%rsp)
jle .LBB3_13
# %bb.11: # %.lr.ph93.preheader
xorl %r15d, %r15d
.p2align 4, 0x90
.LBB3_12: # %.lr.ph93
# =>This Inner Loop Header: Depth=1
movl (%rbx,%r15,4), %esi
movl $.L.str.6, %edi
xorl %eax, %eax
callq printf
incq %r15
movslq 12(%rsp), %rax
cmpq %rax, %r15
jl .LBB3_12
.LBB3_13: # %._crit_edge94
movl $.Lstr.5, %edi
callq puts@PLT
movl 12(%rsp), %eax
leal 255(%rax), %ecx
testl %eax, %eax
cmovnsl %eax, %ecx
sarl $8, %ecx
cvtsi2ss %ecx, %xmm0
cvttss2si %xmm0, %rax
movl %eax, %edi
orq %r14, %rdi
addq $256, %r14 # imm = 0x100
movl $1, %esi
movq %r14, %rdx
movl $1, %ecx
xorl %r8d, %r8d
xorl %r9d, %r9d
callq __hipPushCallConfiguration
testl %eax, %eax
jne .LBB3_15
# %bb.14:
movq 32(%rsp), %rax
movq 24(%rsp), %rcx
movq 16(%rsp), %rdx
movq %rax, 104(%rsp)
movq %rcx, 96(%rsp)
movq %rdx, 88(%rsp)
leaq 104(%rsp), %rax
movq %rax, 112(%rsp)
leaq 96(%rsp), %rax
movq %rax, 120(%rsp)
leaq 88(%rsp), %rax
movq %rax, 128(%rsp)
leaq 72(%rsp), %rdi
leaq 56(%rsp), %rsi
leaq 48(%rsp), %rdx
leaq 40(%rsp), %rcx
callq __hipPopCallConfiguration
movq 72(%rsp), %rsi
movl 80(%rsp), %edx
movq 56(%rsp), %rcx
movl 64(%rsp), %r8d
leaq 112(%rsp), %r9
movl $_Z4add1PiS_S_, %edi
pushq 40(%rsp)
.cfi_adjust_cfa_offset 8
pushq 56(%rsp)
.cfi_adjust_cfa_offset 8
callq hipLaunchKernel
addq $16, %rsp
.cfi_adjust_cfa_offset -16
.LBB3_15:
movq 16(%rsp), %rsi
movslq 12(%rsp), %rdx
shlq $2, %rdx
movq %rbx, %rdi
movl $2, %ecx
callq hipMemcpy
movl $.Lstr.6, %edi
callq puts@PLT
cmpl $0, 12(%rsp)
jle .LBB3_18
# %bb.16: # %.lr.ph97.preheader
xorl %r14d, %r14d
.p2align 4, 0x90
.LBB3_17: # %.lr.ph97
# =>This Inner Loop Header: Depth=1
movl (%rbx,%r14,4), %esi
movl $.L.str.6, %edi
xorl %eax, %eax
callq printf
incq %r14
movslq 12(%rsp), %rax
cmpq %rax, %r14
jl .LBB3_17
.LBB3_18: # %._crit_edge98
movq 32(%rsp), %rdi
callq hipFree
movq 24(%rsp), %rdi
callq hipFree
movq 16(%rsp), %rdi
callq hipFree
xorl %eax, %eax
addq $136, %rsp
.cfi_def_cfa_offset 56
popq %rbx
.cfi_def_cfa_offset 48
popq %r12
.cfi_def_cfa_offset 40
popq %r13
.cfi_def_cfa_offset 32
popq %r14
.cfi_def_cfa_offset 24
popq %r15
.cfi_def_cfa_offset 16
popq %rbp
.cfi_def_cfa_offset 8
retq
.Lfunc_end3:
.size main, .Lfunc_end3-main
.cfi_endproc
# -- End function
.p2align 4, 0x90 # -- Begin function __hip_module_ctor
.type __hip_module_ctor,@function
__hip_module_ctor: # @__hip_module_ctor
.cfi_startproc
# %bb.0:
pushq %rbx
.cfi_def_cfa_offset 16
subq $32, %rsp
.cfi_def_cfa_offset 48
.cfi_offset %rbx, -16
cmpq $0, __hip_gpubin_handle(%rip)
jne .LBB4_2
# %bb.1:
movl $__hip_fatbin_wrapper, %edi
callq __hipRegisterFatBinary
movq %rax, __hip_gpubin_handle(%rip)
.LBB4_2:
movq __hip_gpubin_handle(%rip), %rbx
xorps %xmm0, %xmm0
movups %xmm0, 16(%rsp)
movups %xmm0, (%rsp)
movl $_Z4add1PiS_S_, %esi
movl $.L__unnamed_1, %edx
movl $.L__unnamed_1, %ecx
movq %rbx, %rdi
movl $-1, %r8d
xorl %r9d, %r9d
callq __hipRegisterFunction
xorps %xmm0, %xmm0
movups %xmm0, 16(%rsp)
movups %xmm0, (%rsp)
movl $_Z4add2PiS_S_, %esi
movl $.L__unnamed_2, %edx
movl $.L__unnamed_2, %ecx
movq %rbx, %rdi
movl $-1, %r8d
xorl %r9d, %r9d
callq __hipRegisterFunction
xorps %xmm0, %xmm0
movups %xmm0, 16(%rsp)
movups %xmm0, (%rsp)
movl $_Z4add3PiS_S_, %esi
movl $.L__unnamed_3, %edx
movl $.L__unnamed_3, %ecx
movq %rbx, %rdi
movl $-1, %r8d
xorl %r9d, %r9d
callq __hipRegisterFunction
movl $__hip_module_dtor, %edi
addq $32, %rsp
.cfi_def_cfa_offset 16
popq %rbx
.cfi_def_cfa_offset 8
jmp atexit # TAILCALL
.Lfunc_end4:
.size __hip_module_ctor, .Lfunc_end4-__hip_module_ctor
.cfi_endproc
# -- End function
.p2align 4, 0x90 # -- Begin function __hip_module_dtor
.type __hip_module_dtor,@function
__hip_module_dtor: # @__hip_module_dtor
.cfi_startproc
# %bb.0:
movq __hip_gpubin_handle(%rip), %rdi
testq %rdi, %rdi
je .LBB5_2
# %bb.1:
pushq %rax
.cfi_def_cfa_offset 16
callq __hipUnregisterFatBinary
movq $0, __hip_gpubin_handle(%rip)
addq $8, %rsp
.cfi_def_cfa_offset 8
.LBB5_2:
retq
.Lfunc_end5:
.size __hip_module_dtor, .Lfunc_end5-__hip_module_dtor
.cfi_endproc
# -- End function
.type _Z4add1PiS_S_,@object # @_Z4add1PiS_S_
.section .rodata,"a",@progbits
.globl _Z4add1PiS_S_
.p2align 3, 0x0
_Z4add1PiS_S_:
.quad _Z19__device_stub__add1PiS_S_
.size _Z4add1PiS_S_, 8
.type _Z4add2PiS_S_,@object # @_Z4add2PiS_S_
.globl _Z4add2PiS_S_
.p2align 3, 0x0
_Z4add2PiS_S_:
.quad _Z19__device_stub__add2PiS_S_
.size _Z4add2PiS_S_, 8
.type _Z4add3PiS_S_,@object # @_Z4add3PiS_S_
.globl _Z4add3PiS_S_
.p2align 3, 0x0
_Z4add3PiS_S_:
.quad _Z19__device_stub__add3PiS_S_
.size _Z4add3PiS_S_, 8
.type .L.str,@object # @.str
.section .rodata.str1.1,"aMS",@progbits,1
.L.str:
.asciz "Enter number of elements: "
.size .L.str, 27
.type .L.str.1,@object # @.str.1
.L.str.1:
.asciz "%d"
.size .L.str.1, 3
.type .L.str.3,@object # @.str.3
.L.str.3:
.asciz "%d %d"
.size .L.str.3, 6
.type .L.str.6,@object # @.str.6
.L.str.6:
.asciz "%d "
.size .L.str.6, 4
.type .L__unnamed_1,@object # @0
.L__unnamed_1:
.asciz "_Z4add1PiS_S_"
.size .L__unnamed_1, 14
.type .L__unnamed_2,@object # @1
.L__unnamed_2:
.asciz "_Z4add2PiS_S_"
.size .L__unnamed_2, 14
.type .L__unnamed_3,@object # @2
.L__unnamed_3:
.asciz "_Z4add3PiS_S_"
.size .L__unnamed_3, 14
.type __hip_fatbin_wrapper,@object # @__hip_fatbin_wrapper
.section .hipFatBinSegment,"a",@progbits
.p2align 3, 0x0
__hip_fatbin_wrapper:
.long 1212764230 # 0x48495046
.long 1 # 0x1
.quad __hip_fatbin
.quad 0
.size __hip_fatbin_wrapper, 24
.type __hip_gpubin_handle,@object # @__hip_gpubin_handle
.local __hip_gpubin_handle
.comm __hip_gpubin_handle,8,8
.section .init_array,"aw",@init_array
.p2align 3, 0x0
.quad __hip_module_ctor
.type __hip_cuid_,@object # @__hip_cuid_
.bss
.globl __hip_cuid_
__hip_cuid_:
.byte 0 # 0x0
.size __hip_cuid_, 1
.type .Lstr,@object # @str
.section .rodata.str1.1,"aMS",@progbits,1
.Lstr:
.asciz "Enter elements a <space> b:"
.size .Lstr, 28
.type .Lstr.1,@object # @str.1
.Lstr.1:
.asciz "\n// LAUNCHING ADD1 //"
.size .Lstr.1, 22
.type .Lstr.3,@object # @str.3
.Lstr.3:
.asciz "\n// LAUNCHING ADD2 //"
.size .Lstr.3, 22
.type .Lstr.5,@object # @str.5
.Lstr.5:
.asciz "\n// LAUNCHING ADD3 //"
.size .Lstr.5, 22
.type .Lstr.6,@object # @str.6
.Lstr.6:
.asciz "Result:"
.size .Lstr.6, 8
.section ".linker-options","e",@llvm_linker_options
.ident "AMD clang version 18.0.0git (https://github.com/RadeonOpenCompute/llvm-project roc-6.3.2 25012 e5bf7e55c91490b07c49d8960fa7983d864936c4)"
.section ".note.GNU-stack","",@progbits
.addrsig
.addrsig_sym _Z19__device_stub__add1PiS_S_
.addrsig_sym _Z19__device_stub__add2PiS_S_
.addrsig_sym _Z19__device_stub__add3PiS_S_
.addrsig_sym __hip_module_ctor
.addrsig_sym __hip_module_dtor
.addrsig_sym _Z4add1PiS_S_
.addrsig_sym _Z4add2PiS_S_
.addrsig_sym _Z4add3PiS_S_
.addrsig_sym __hip_fatbin
.addrsig_sym __hip_fatbin_wrapper
.addrsig_sym __hip_cuid_ |
You are a helpful coding assistant specialized in converting from CUDA device assembly to AMD device assembly. | code for sm_80
Function : _Z4add3PiS_S_
.headerflags @"EF_CUDA_TEXMODE_UNIFIED EF_CUDA_64BIT_ADDRESS EF_CUDA_SM80 EF_CUDA_VIRTUAL_SM(EF_CUDA_SM80)"
/*0000*/ MOV R1, c[0x0][0x28] ; /* 0x00000a0000017a02 */
/* 0x000fe40000000f00 */
/*0010*/ S2R R6, SR_CTAID.X ; /* 0x0000000000067919 */
/* 0x000e220000002500 */
/*0020*/ HFMA2.MMA R7, -RZ, RZ, 0, 2.384185791015625e-07 ; /* 0x00000004ff077435 */
/* 0x000fe200000001ff */
/*0030*/ ULDC.64 UR4, c[0x0][0x118] ; /* 0x0000460000047ab9 */
/* 0x000fe40000000a00 */
/*0040*/ S2R R3, SR_TID.X ; /* 0x0000000000037919 */
/* 0x000e240000002100 */
/*0050*/ IMAD R6, R6, c[0x0][0x0], R3 ; /* 0x0000000006067a24 */
/* 0x001fca00078e0203 */
/*0060*/ IMAD.WIDE R2, R6, R7, c[0x0][0x160] ; /* 0x0000580006027625 */
/* 0x000fc800078e0207 */
/*0070*/ IMAD.WIDE R4, R6.reuse, R7.reuse, c[0x0][0x168] ; /* 0x00005a0006047625 */
/* 0x0c0fe400078e0207 */
/*0080*/ LDG.E R2, [R2.64] ; /* 0x0000000402027981 */
/* 0x000ea8000c1e1900 */
/*0090*/ LDG.E R5, [R4.64] ; /* 0x0000000404057981 */
/* 0x000ea2000c1e1900 */
/*00a0*/ IMAD.WIDE R6, R6, R7, c[0x0][0x170] ; /* 0x00005c0006067625 */
/* 0x000fe200078e0207 */
/*00b0*/ IADD3 R9, R2, R5, RZ ; /* 0x0000000502097210 */
/* 0x004fca0007ffe0ff */
/*00c0*/ STG.E [R6.64], R9 ; /* 0x0000000906007986 */
/* 0x000fe2000c101904 */
/*00d0*/ EXIT ; /* 0x000000000000794d */
/* 0x000fea0003800000 */
/*00e0*/ BRA 0xe0; /* 0xfffffff000007947 */
/* 0x000fc0000383ffff */
/*00f0*/ NOP; /* 0x0000000000007918 */
/* 0x000fc00000000000 */
/*0100*/ NOP; /* 0x0000000000007918 */
/* 0x000fc00000000000 */
/*0110*/ NOP; /* 0x0000000000007918 */
/* 0x000fc00000000000 */
/*0120*/ NOP; /* 0x0000000000007918 */
/* 0x000fc00000000000 */
/*0130*/ NOP; /* 0x0000000000007918 */
/* 0x000fc00000000000 */
/*0140*/ NOP; /* 0x0000000000007918 */
/* 0x000fc00000000000 */
/*0150*/ NOP; /* 0x0000000000007918 */
/* 0x000fc00000000000 */
/*0160*/ NOP; /* 0x0000000000007918 */
/* 0x000fc00000000000 */
/*0170*/ NOP; /* 0x0000000000007918 */
/* 0x000fc00000000000 */
..........
Function : _Z4add2PiS_S_
.headerflags @"EF_CUDA_TEXMODE_UNIFIED EF_CUDA_64BIT_ADDRESS EF_CUDA_SM80 EF_CUDA_VIRTUAL_SM(EF_CUDA_SM80)"
/*0000*/ MOV R1, c[0x0][0x28] ; /* 0x00000a0000017a02 */
/* 0x000fe40000000f00 */
/*0010*/ S2R R6, SR_TID.X ; /* 0x0000000000067919 */
/* 0x000e220000002100 */
/*0020*/ HFMA2.MMA R7, -RZ, RZ, 0, 2.384185791015625e-07 ; /* 0x00000004ff077435 */
/* 0x000fe200000001ff */
/*0030*/ ULDC.64 UR4, c[0x0][0x118] ; /* 0x0000460000047ab9 */
/* 0x000fd20000000a00 */
/*0040*/ IMAD.WIDE R2, R6, R7, c[0x0][0x160] ; /* 0x0000580006027625 */
/* 0x001fc800078e0207 */
/*0050*/ IMAD.WIDE R4, R6.reuse, R7.reuse, c[0x0][0x168] ; /* 0x00005a0006047625 */
/* 0x0c0fe400078e0207 */
/*0060*/ LDG.E R2, [R2.64] ; /* 0x0000000402027981 */
/* 0x000ea8000c1e1900 */
/*0070*/ LDG.E R5, [R4.64] ; /* 0x0000000404057981 */
/* 0x000ea2000c1e1900 */
/*0080*/ IMAD.WIDE R6, R6, R7, c[0x0][0x170] ; /* 0x00005c0006067625 */
/* 0x000fe200078e0207 */
/*0090*/ IADD3 R9, R2, R5, RZ ; /* 0x0000000502097210 */
/* 0x004fca0007ffe0ff */
/*00a0*/ STG.E [R6.64], R9 ; /* 0x0000000906007986 */
/* 0x000fe2000c101904 */
/*00b0*/ EXIT ; /* 0x000000000000794d */
/* 0x000fea0003800000 */
/*00c0*/ BRA 0xc0; /* 0xfffffff000007947 */
/* 0x000fc0000383ffff */
/*00d0*/ NOP; /* 0x0000000000007918 */
/* 0x000fc00000000000 */
/*00e0*/ NOP; /* 0x0000000000007918 */
/* 0x000fc00000000000 */
/*00f0*/ NOP; /* 0x0000000000007918 */
/* 0x000fc00000000000 */
/*0100*/ NOP; /* 0x0000000000007918 */
/* 0x000fc00000000000 */
/*0110*/ NOP; /* 0x0000000000007918 */
/* 0x000fc00000000000 */
/*0120*/ NOP; /* 0x0000000000007918 */
/* 0x000fc00000000000 */
/*0130*/ NOP; /* 0x0000000000007918 */
/* 0x000fc00000000000 */
/*0140*/ NOP; /* 0x0000000000007918 */
/* 0x000fc00000000000 */
/*0150*/ NOP; /* 0x0000000000007918 */
/* 0x000fc00000000000 */
/*0160*/ NOP; /* 0x0000000000007918 */
/* 0x000fc00000000000 */
/*0170*/ NOP; /* 0x0000000000007918 */
/* 0x000fc00000000000 */
..........
Function : _Z4add1PiS_S_
.headerflags @"EF_CUDA_TEXMODE_UNIFIED EF_CUDA_64BIT_ADDRESS EF_CUDA_SM80 EF_CUDA_VIRTUAL_SM(EF_CUDA_SM80)"
/*0000*/ MOV R1, c[0x0][0x28] ; /* 0x00000a0000017a02 */
/* 0x000fe40000000f00 */
/*0010*/ S2R R6, SR_CTAID.X ; /* 0x0000000000067919 */
/* 0x000e220000002500 */
/*0020*/ HFMA2.MMA R7, -RZ, RZ, 0, 2.384185791015625e-07 ; /* 0x00000004ff077435 */
/* 0x000fe200000001ff */
/*0030*/ ULDC.64 UR4, c[0x0][0x118] ; /* 0x0000460000047ab9 */
/* 0x000fd20000000a00 */
/*0040*/ IMAD.WIDE R2, R6, R7, c[0x0][0x160] ; /* 0x0000580006027625 */
/* 0x001fc800078e0207 */
/*0050*/ IMAD.WIDE R4, R6.reuse, R7.reuse, c[0x0][0x168] ; /* 0x00005a0006047625 */
/* 0x0c0fe400078e0207 */
/*0060*/ LDG.E R2, [R2.64] ; /* 0x0000000402027981 */
/* 0x000ea8000c1e1900 */
/*0070*/ LDG.E R5, [R4.64] ; /* 0x0000000404057981 */
/* 0x000ea2000c1e1900 */
/*0080*/ IMAD.WIDE R6, R6, R7, c[0x0][0x170] ; /* 0x00005c0006067625 */
/* 0x000fe200078e0207 */
/*0090*/ IADD3 R9, R2, R5, RZ ; /* 0x0000000502097210 */
/* 0x004fca0007ffe0ff */
/*00a0*/ STG.E [R6.64], R9 ; /* 0x0000000906007986 */
/* 0x000fe2000c101904 */
/*00b0*/ EXIT ; /* 0x000000000000794d */
/* 0x000fea0003800000 */
/*00c0*/ BRA 0xc0; /* 0xfffffff000007947 */
/* 0x000fc0000383ffff */
/*00d0*/ NOP; /* 0x0000000000007918 */
/* 0x000fc00000000000 */
/*00e0*/ NOP; /* 0x0000000000007918 */
/* 0x000fc00000000000 */
/*00f0*/ NOP; /* 0x0000000000007918 */
/* 0x000fc00000000000 */
/*0100*/ NOP; /* 0x0000000000007918 */
/* 0x000fc00000000000 */
/*0110*/ NOP; /* 0x0000000000007918 */
/* 0x000fc00000000000 */
/*0120*/ NOP; /* 0x0000000000007918 */
/* 0x000fc00000000000 */
/*0130*/ NOP; /* 0x0000000000007918 */
/* 0x000fc00000000000 */
/*0140*/ NOP; /* 0x0000000000007918 */
/* 0x000fc00000000000 */
/*0150*/ NOP; /* 0x0000000000007918 */
/* 0x000fc00000000000 */
/*0160*/ NOP; /* 0x0000000000007918 */
/* 0x000fc00000000000 */
/*0170*/ NOP; /* 0x0000000000007918 */
/* 0x000fc00000000000 */
.......... | .text
.amdgcn_target "amdgcn-amd-amdhsa--gfx1100"
.protected _Z4add1PiS_S_
.globl _Z4add1PiS_S_
.p2align 8
.type _Z4add1PiS_S_,@function
_Z4add1PiS_S_:
s_load_b128 s[4:7], s[0:1], 0x0
s_mov_b32 s2, s15
s_ashr_i32 s3, s15, 31
s_load_b64 s[0:1], s[0:1], 0x10
s_lshl_b64 s[2:3], s[2:3], 2
s_waitcnt lgkmcnt(0)
s_add_u32 s4, s4, s2
s_addc_u32 s5, s5, s3
s_add_u32 s6, s6, s2
s_addc_u32 s7, s7, s3
s_load_b32 s4, s[4:5], 0x0
s_load_b32 s5, s[6:7], 0x0
s_waitcnt lgkmcnt(0)
s_add_i32 s4, s5, s4
s_delay_alu instid0(SALU_CYCLE_1)
v_dual_mov_b32 v0, 0 :: v_dual_mov_b32 v1, s4
s_add_u32 s0, s0, s2
s_addc_u32 s1, s1, s3
global_store_b32 v0, v1, s[0:1]
s_nop 0
s_sendmsg sendmsg(MSG_DEALLOC_VGPRS)
s_endpgm
.section .rodata,"a",@progbits
.p2align 6, 0x0
.amdhsa_kernel _Z4add1PiS_S_
.amdhsa_group_segment_fixed_size 0
.amdhsa_private_segment_fixed_size 0
.amdhsa_kernarg_size 24
.amdhsa_user_sgpr_count 15
.amdhsa_user_sgpr_dispatch_ptr 0
.amdhsa_user_sgpr_queue_ptr 0
.amdhsa_user_sgpr_kernarg_segment_ptr 1
.amdhsa_user_sgpr_dispatch_id 0
.amdhsa_user_sgpr_private_segment_size 0
.amdhsa_wavefront_size32 1
.amdhsa_uses_dynamic_stack 0
.amdhsa_enable_private_segment 0
.amdhsa_system_sgpr_workgroup_id_x 1
.amdhsa_system_sgpr_workgroup_id_y 0
.amdhsa_system_sgpr_workgroup_id_z 0
.amdhsa_system_sgpr_workgroup_info 0
.amdhsa_system_vgpr_workitem_id 0
.amdhsa_next_free_vgpr 2
.amdhsa_next_free_sgpr 16
.amdhsa_reserve_vcc 0
.amdhsa_float_round_mode_32 0
.amdhsa_float_round_mode_16_64 0
.amdhsa_float_denorm_mode_32 3
.amdhsa_float_denorm_mode_16_64 3
.amdhsa_dx10_clamp 1
.amdhsa_ieee_mode 1
.amdhsa_fp16_overflow 0
.amdhsa_workgroup_processor_mode 1
.amdhsa_memory_ordered 1
.amdhsa_forward_progress 0
.amdhsa_shared_vgpr_count 0
.amdhsa_exception_fp_ieee_invalid_op 0
.amdhsa_exception_fp_denorm_src 0
.amdhsa_exception_fp_ieee_div_zero 0
.amdhsa_exception_fp_ieee_overflow 0
.amdhsa_exception_fp_ieee_underflow 0
.amdhsa_exception_fp_ieee_inexact 0
.amdhsa_exception_int_div_zero 0
.end_amdhsa_kernel
.text
.Lfunc_end0:
.size _Z4add1PiS_S_, .Lfunc_end0-_Z4add1PiS_S_
.section .AMDGPU.csdata,"",@progbits
.text
.protected _Z4add2PiS_S_
.globl _Z4add2PiS_S_
.p2align 8
.type _Z4add2PiS_S_,@function
_Z4add2PiS_S_:
s_load_b128 s[4:7], s[0:1], 0x0
v_lshlrev_b32_e32 v0, 2, v0
s_load_b64 s[0:1], s[0:1], 0x10
s_waitcnt lgkmcnt(0)
s_clause 0x1
global_load_b32 v1, v0, s[4:5]
global_load_b32 v2, v0, s[6:7]
s_waitcnt vmcnt(0)
v_add_nc_u32_e32 v1, v2, v1
global_store_b32 v0, v1, s[0:1]
s_nop 0
s_sendmsg sendmsg(MSG_DEALLOC_VGPRS)
s_endpgm
.section .rodata,"a",@progbits
.p2align 6, 0x0
.amdhsa_kernel _Z4add2PiS_S_
.amdhsa_group_segment_fixed_size 0
.amdhsa_private_segment_fixed_size 0
.amdhsa_kernarg_size 24
.amdhsa_user_sgpr_count 15
.amdhsa_user_sgpr_dispatch_ptr 0
.amdhsa_user_sgpr_queue_ptr 0
.amdhsa_user_sgpr_kernarg_segment_ptr 1
.amdhsa_user_sgpr_dispatch_id 0
.amdhsa_user_sgpr_private_segment_size 0
.amdhsa_wavefront_size32 1
.amdhsa_uses_dynamic_stack 0
.amdhsa_enable_private_segment 0
.amdhsa_system_sgpr_workgroup_id_x 1
.amdhsa_system_sgpr_workgroup_id_y 0
.amdhsa_system_sgpr_workgroup_id_z 0
.amdhsa_system_sgpr_workgroup_info 0
.amdhsa_system_vgpr_workitem_id 0
.amdhsa_next_free_vgpr 3
.amdhsa_next_free_sgpr 8
.amdhsa_reserve_vcc 0
.amdhsa_float_round_mode_32 0
.amdhsa_float_round_mode_16_64 0
.amdhsa_float_denorm_mode_32 3
.amdhsa_float_denorm_mode_16_64 3
.amdhsa_dx10_clamp 1
.amdhsa_ieee_mode 1
.amdhsa_fp16_overflow 0
.amdhsa_workgroup_processor_mode 1
.amdhsa_memory_ordered 1
.amdhsa_forward_progress 0
.amdhsa_shared_vgpr_count 0
.amdhsa_exception_fp_ieee_invalid_op 0
.amdhsa_exception_fp_denorm_src 0
.amdhsa_exception_fp_ieee_div_zero 0
.amdhsa_exception_fp_ieee_overflow 0
.amdhsa_exception_fp_ieee_underflow 0
.amdhsa_exception_fp_ieee_inexact 0
.amdhsa_exception_int_div_zero 0
.end_amdhsa_kernel
.text
.Lfunc_end1:
.size _Z4add2PiS_S_, .Lfunc_end1-_Z4add2PiS_S_
.section .AMDGPU.csdata,"",@progbits
.text
.protected _Z4add3PiS_S_
.globl _Z4add3PiS_S_
.p2align 8
.type _Z4add3PiS_S_,@function
_Z4add3PiS_S_:
s_clause 0x2
s_load_b32 s2, s[0:1], 0x24
s_load_b128 s[4:7], s[0:1], 0x0
s_load_b64 s[0:1], s[0:1], 0x10
s_waitcnt lgkmcnt(0)
s_and_b32 s2, s2, 0xffff
s_delay_alu instid0(SALU_CYCLE_1) | instskip(NEXT) | instid1(VALU_DEP_1)
v_mad_u64_u32 v[1:2], null, s15, s2, v[0:1]
v_ashrrev_i32_e32 v2, 31, v1
s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
v_lshlrev_b64 v[0:1], 2, v[1:2]
v_add_co_u32 v2, vcc_lo, s4, v0
s_delay_alu instid0(VALU_DEP_2)
v_add_co_ci_u32_e32 v3, vcc_lo, s5, v1, vcc_lo
v_add_co_u32 v4, vcc_lo, s6, v0
v_add_co_ci_u32_e32 v5, vcc_lo, s7, v1, vcc_lo
v_add_co_u32 v0, vcc_lo, s0, v0
global_load_b32 v2, v[2:3], off
global_load_b32 v3, v[4:5], off
v_add_co_ci_u32_e32 v1, vcc_lo, s1, v1, vcc_lo
s_waitcnt vmcnt(0)
v_add_nc_u32_e32 v2, v3, v2
global_store_b32 v[0:1], v2, off
s_nop 0
s_sendmsg sendmsg(MSG_DEALLOC_VGPRS)
s_endpgm
.section .rodata,"a",@progbits
.p2align 6, 0x0
.amdhsa_kernel _Z4add3PiS_S_
.amdhsa_group_segment_fixed_size 0
.amdhsa_private_segment_fixed_size 0
.amdhsa_kernarg_size 280
.amdhsa_user_sgpr_count 15
.amdhsa_user_sgpr_dispatch_ptr 0
.amdhsa_user_sgpr_queue_ptr 0
.amdhsa_user_sgpr_kernarg_segment_ptr 1
.amdhsa_user_sgpr_dispatch_id 0
.amdhsa_user_sgpr_private_segment_size 0
.amdhsa_wavefront_size32 1
.amdhsa_uses_dynamic_stack 0
.amdhsa_enable_private_segment 0
.amdhsa_system_sgpr_workgroup_id_x 1
.amdhsa_system_sgpr_workgroup_id_y 0
.amdhsa_system_sgpr_workgroup_id_z 0
.amdhsa_system_sgpr_workgroup_info 0
.amdhsa_system_vgpr_workitem_id 0
.amdhsa_next_free_vgpr 6
.amdhsa_next_free_sgpr 16
.amdhsa_float_round_mode_32 0
.amdhsa_float_round_mode_16_64 0
.amdhsa_float_denorm_mode_32 3
.amdhsa_float_denorm_mode_16_64 3
.amdhsa_dx10_clamp 1
.amdhsa_ieee_mode 1
.amdhsa_fp16_overflow 0
.amdhsa_workgroup_processor_mode 1
.amdhsa_memory_ordered 1
.amdhsa_forward_progress 0
.amdhsa_shared_vgpr_count 0
.amdhsa_exception_fp_ieee_invalid_op 0
.amdhsa_exception_fp_denorm_src 0
.amdhsa_exception_fp_ieee_div_zero 0
.amdhsa_exception_fp_ieee_overflow 0
.amdhsa_exception_fp_ieee_underflow 0
.amdhsa_exception_fp_ieee_inexact 0
.amdhsa_exception_int_div_zero 0
.end_amdhsa_kernel
.text
.Lfunc_end2:
.size _Z4add3PiS_S_, .Lfunc_end2-_Z4add3PiS_S_
.section .AMDGPU.csdata,"",@progbits
.text
.p2alignl 7, 3214868480
.fill 96, 4, 3214868480
.type __hip_cuid_,@object
.section .bss,"aw",@nobits
.globl __hip_cuid_
__hip_cuid_:
.byte 0
.size __hip_cuid_, 1
.ident "AMD clang version 18.0.0git (https://github.com/RadeonOpenCompute/llvm-project roc-6.3.2 25012 e5bf7e55c91490b07c49d8960fa7983d864936c4)"
.section ".note.GNU-stack","",@progbits
.addrsig
.addrsig_sym __hip_cuid_
.amdgpu_metadata
---
amdhsa.kernels:
- .args:
- .address_space: global
.offset: 0
.size: 8
.value_kind: global_buffer
- .address_space: global
.offset: 8
.size: 8
.value_kind: global_buffer
- .address_space: global
.offset: 16
.size: 8
.value_kind: global_buffer
.group_segment_fixed_size: 0
.kernarg_segment_align: 8
.kernarg_segment_size: 24
.language: OpenCL C
.language_version:
- 2
- 0
.max_flat_workgroup_size: 1024
.name: _Z4add1PiS_S_
.private_segment_fixed_size: 0
.sgpr_count: 16
.sgpr_spill_count: 0
.symbol: _Z4add1PiS_S_.kd
.uniform_work_group_size: 1
.uses_dynamic_stack: false
.vgpr_count: 2
.vgpr_spill_count: 0
.wavefront_size: 32
.workgroup_processor_mode: 1
- .args:
- .address_space: global
.offset: 0
.size: 8
.value_kind: global_buffer
- .address_space: global
.offset: 8
.size: 8
.value_kind: global_buffer
- .address_space: global
.offset: 16
.size: 8
.value_kind: global_buffer
.group_segment_fixed_size: 0
.kernarg_segment_align: 8
.kernarg_segment_size: 24
.language: OpenCL C
.language_version:
- 2
- 0
.max_flat_workgroup_size: 1024
.name: _Z4add2PiS_S_
.private_segment_fixed_size: 0
.sgpr_count: 8
.sgpr_spill_count: 0
.symbol: _Z4add2PiS_S_.kd
.uniform_work_group_size: 1
.uses_dynamic_stack: false
.vgpr_count: 3
.vgpr_spill_count: 0
.wavefront_size: 32
.workgroup_processor_mode: 1
- .args:
- .address_space: global
.offset: 0
.size: 8
.value_kind: global_buffer
- .address_space: global
.offset: 8
.size: 8
.value_kind: global_buffer
- .address_space: global
.offset: 16
.size: 8
.value_kind: global_buffer
- .offset: 24
.size: 4
.value_kind: hidden_block_count_x
- .offset: 28
.size: 4
.value_kind: hidden_block_count_y
- .offset: 32
.size: 4
.value_kind: hidden_block_count_z
- .offset: 36
.size: 2
.value_kind: hidden_group_size_x
- .offset: 38
.size: 2
.value_kind: hidden_group_size_y
- .offset: 40
.size: 2
.value_kind: hidden_group_size_z
- .offset: 42
.size: 2
.value_kind: hidden_remainder_x
- .offset: 44
.size: 2
.value_kind: hidden_remainder_y
- .offset: 46
.size: 2
.value_kind: hidden_remainder_z
- .offset: 64
.size: 8
.value_kind: hidden_global_offset_x
- .offset: 72
.size: 8
.value_kind: hidden_global_offset_y
- .offset: 80
.size: 8
.value_kind: hidden_global_offset_z
- .offset: 88
.size: 2
.value_kind: hidden_grid_dims
.group_segment_fixed_size: 0
.kernarg_segment_align: 8
.kernarg_segment_size: 280
.language: OpenCL C
.language_version:
- 2
- 0
.max_flat_workgroup_size: 1024
.name: _Z4add3PiS_S_
.private_segment_fixed_size: 0
.sgpr_count: 18
.sgpr_spill_count: 0
.symbol: _Z4add3PiS_S_.kd
.uniform_work_group_size: 1
.uses_dynamic_stack: false
.vgpr_count: 6
.vgpr_spill_count: 0
.wavefront_size: 32
.workgroup_processor_mode: 1
amdhsa.target: amdgcn-amd-amdhsa--gfx1100
amdhsa.version:
- 1
- 2
...
.end_amdgpu_metadata |
You are a helpful coding assistant specialized in converting from CUDA host assembly to AMD host assembly. | .file "tmpxft_000a5dc5_00000000-6_CUDA_VectorAdd.cudafe1.cpp"
.text
#APP
#NO_APP
.type _ZL26__cudaUnregisterBinaryUtilv, @function
_ZL26__cudaUnregisterBinaryUtilv:
.LFB2060:
.cfi_startproc
endbr64
subq $8, %rsp
.cfi_def_cfa_offset 16
movq _ZL20__cudaFatCubinHandle(%rip), %rdi
call __cudaUnregisterFatBinary@PLT
addq $8, %rsp
.cfi_def_cfa_offset 8
ret
.cfi_endproc
.LFE2060:
.size _ZL26__cudaUnregisterBinaryUtilv, .-_ZL26__cudaUnregisterBinaryUtilv
.globl _Z27__device_stub__Z4add1PiS_S_PiS_S_
.type _Z27__device_stub__Z4add1PiS_S_PiS_S_, @function
_Z27__device_stub__Z4add1PiS_S_PiS_S_:
.LFB2082:
.cfi_startproc
endbr64
subq $136, %rsp
.cfi_def_cfa_offset 144
movq %rdi, 24(%rsp)
movq %rsi, 16(%rsp)
movq %rdx, 8(%rsp)
movq %fs:40, %rax
movq %rax, 120(%rsp)
xorl %eax, %eax
leaq 24(%rsp), %rax
movq %rax, 96(%rsp)
leaq 16(%rsp), %rax
movq %rax, 104(%rsp)
leaq 8(%rsp), %rax
movq %rax, 112(%rsp)
movl $1, 48(%rsp)
movl $1, 52(%rsp)
movl $1, 56(%rsp)
movl $1, 60(%rsp)
movl $1, 64(%rsp)
movl $1, 68(%rsp)
leaq 40(%rsp), %rcx
leaq 32(%rsp), %rdx
leaq 60(%rsp), %rsi
leaq 48(%rsp), %rdi
call __cudaPopCallConfiguration@PLT
testl %eax, %eax
je .L7
.L3:
movq 120(%rsp), %rax
subq %fs:40, %rax
jne .L8
addq $136, %rsp
.cfi_remember_state
.cfi_def_cfa_offset 8
ret
.L7:
.cfi_restore_state
pushq 40(%rsp)
.cfi_def_cfa_offset 152
pushq 40(%rsp)
.cfi_def_cfa_offset 160
leaq 112(%rsp), %r9
movq 76(%rsp), %rcx
movl 84(%rsp), %r8d
movq 64(%rsp), %rsi
movl 72(%rsp), %edx
leaq _Z4add1PiS_S_(%rip), %rdi
call cudaLaunchKernel@PLT
addq $16, %rsp
.cfi_def_cfa_offset 144
jmp .L3
.L8:
call __stack_chk_fail@PLT
.cfi_endproc
.LFE2082:
.size _Z27__device_stub__Z4add1PiS_S_PiS_S_, .-_Z27__device_stub__Z4add1PiS_S_PiS_S_
.globl _Z4add1PiS_S_
.type _Z4add1PiS_S_, @function
_Z4add1PiS_S_:
.LFB2083:
.cfi_startproc
endbr64
subq $8, %rsp
.cfi_def_cfa_offset 16
call _Z27__device_stub__Z4add1PiS_S_PiS_S_
addq $8, %rsp
.cfi_def_cfa_offset 8
ret
.cfi_endproc
.LFE2083:
.size _Z4add1PiS_S_, .-_Z4add1PiS_S_
.section .rodata.str1.1,"aMS",@progbits,1
.LC0:
.string "Enter number of elements: "
.LC1:
.string "%d"
.LC2:
.string "Enter elements a <space> b:\n"
.LC3:
.string "%d %d"
.LC4:
.string "\n// LAUNCHING ADD1 //\n"
.LC5:
.string "Result:\n"
.LC6:
.string "%d "
.LC7:
.string "\n// LAUNCHING ADD2 //\n"
.LC8:
.string "\n// LAUNCHING ADD3 //\n"
.text
.globl main
.type main, @function
main:
.LFB2057:
.cfi_startproc
endbr64
pushq %r15
.cfi_def_cfa_offset 16
.cfi_offset 15, -16
pushq %r14
.cfi_def_cfa_offset 24
.cfi_offset 14, -24
pushq %r13
.cfi_def_cfa_offset 32
.cfi_offset 13, -32
pushq %r12
.cfi_def_cfa_offset 40
.cfi_offset 12, -40
pushq %rbp
.cfi_def_cfa_offset 48
.cfi_offset 6, -48
pushq %rbx
.cfi_def_cfa_offset 56
.cfi_offset 3, -56
subq $136, %rsp
.cfi_def_cfa_offset 192
movq %fs:40, %rax
movq %rax, 120(%rsp)
xorl %eax, %eax
leaq .LC0(%rip), %rsi
movl $2, %edi
call __printf_chk@PLT
leaq 20(%rsp), %rsi
leaq .LC1(%rip), %rdi
movl $0, %eax
call __isoc23_scanf@PLT
movslq 20(%rsp), %rbx
salq $2, %rbx
movq %rbx, %rdi
call malloc@PLT
movq %rax, %r15
movq %rbx, %rdi
call malloc@PLT
movq %rax, %r12
movq %rax, 8(%rsp)
movq %rbx, %rdi
call malloc@PLT
movq %rax, %rbx
leaq .LC2(%rip), %rsi
movl $2, %edi
movl $0, %eax
call __printf_chk@PLT
movl 20(%rsp), %esi
testl %esi, %esi
jle .L12
movq %r15, %r13
movl $0, %ebp
leaq .LC3(%rip), %r14
.L13:
movq %r12, %rdx
movq %r13, %rsi
movq %r14, %rdi
movl $0, %eax
call __isoc23_scanf@PLT
addl $1, %ebp
movl 20(%rsp), %esi
addq $4, %r13
addq $4, %r12
cmpl %ebp, %esi
jg .L13
.L12:
sall $2, %esi
movslq %esi, %rsi
leaq 24(%rsp), %rdi
call cudaMalloc@PLT
movl 20(%rsp), %eax
leal 0(,%rax,4), %esi
movslq %esi, %rsi
leaq 32(%rsp), %rdi
call cudaMalloc@PLT
movl 20(%rsp), %eax
leal 0(,%rax,4), %esi
movslq %esi, %rsi
leaq 40(%rsp), %rdi
call cudaMalloc@PLT
movl 20(%rsp), %eax
leal 0(,%rax,4), %edx
movslq %edx, %rdx
movl $1, %ecx
movq %r15, %rsi
movq 24(%rsp), %rdi
call cudaMemcpy@PLT
movl 20(%rsp), %eax
leal 0(,%rax,4), %edx
movslq %edx, %rdx
movl $1, %ecx
movq 8(%rsp), %rsi
movq 32(%rsp), %rdi
call cudaMemcpy@PLT
leaq .LC4(%rip), %rsi
movl $2, %edi
movl $0, %eax
call __printf_chk@PLT
movl 20(%rsp), %eax
movl %eax, 48(%rsp)
movl $1, 52(%rsp)
movl $1, 60(%rsp)
movl $1, 64(%rsp)
movl $0, %r9d
movl $0, %r8d
movq 60(%rsp), %rdx
movl $1, %ecx
movq 48(%rsp), %rdi
movl $1, %esi
call __cudaPushCallConfiguration@PLT
testl %eax, %eax
je .L29
.L14:
movl 20(%rsp), %eax
leal 0(,%rax,4), %edx
movslq %edx, %rdx
movl $2, %ecx
movq 40(%rsp), %rsi
movq %rbx, %rdi
call cudaMemcpy@PLT
leaq .LC5(%rip), %rsi
movl $2, %edi
movl $0, %eax
call __printf_chk@PLT
cmpl $0, 20(%rsp)
jle .L15
movl $0, %ebp
leaq .LC6(%rip), %r12
.L16:
movl (%rbx,%rbp,4), %edx
movq %r12, %rsi
movl $2, %edi
movl $0, %eax
call __printf_chk@PLT
addq $1, %rbp
cmpl %ebp, 20(%rsp)
jg .L16
.L15:
leaq .LC7(%rip), %rsi
movl $2, %edi
movl $0, %eax
call __printf_chk@PLT
movl $1, 72(%rsp)
movl $1, 76(%rsp)
movl 20(%rsp), %eax
movl %eax, 84(%rsp)
movl $1, 88(%rsp)
movl $0, %r9d
movl $0, %r8d
movq 84(%rsp), %rdx
movl $1, %ecx
movq 72(%rsp), %rdi
movl $1, %esi
call __cudaPushCallConfiguration@PLT
testl %eax, %eax
je .L30
.L17:
movl 20(%rsp), %eax
leal 0(,%rax,4), %edx
movslq %edx, %rdx
movl $2, %ecx
movq 40(%rsp), %rsi
movq %rbx, %rdi
call cudaMemcpy@PLT
leaq .LC5(%rip), %rsi
movl $2, %edi
movl $0, %eax
call __printf_chk@PLT
cmpl $0, 20(%rsp)
jle .L18
movl $0, %ebp
leaq .LC6(%rip), %r12
.L19:
movl (%rbx,%rbp,4), %edx
movq %r12, %rsi
movl $2, %edi
movl $0, %eax
call __printf_chk@PLT
addq $1, %rbp
cmpl %ebp, 20(%rsp)
jg .L19
.L18:
leaq .LC8(%rip), %rsi
movl $2, %edi
movl $0, %eax
call __printf_chk@PLT
movl 20(%rsp), %edx
leal 255(%rdx), %eax
testl %edx, %edx
cmovns %edx, %eax
sarl $8, %eax
pxor %xmm0, %xmm0
cvtsi2ssl %eax, %xmm0
cvttss2siq %xmm0, %rax
movl %eax, 96(%rsp)
movl $1, 100(%rsp)
movl $256, 108(%rsp)
movl $1, 112(%rsp)
movl $0, %r9d
movl $0, %r8d
movq 108(%rsp), %rdx
movl $1, %ecx
movq 96(%rsp), %rdi
movl $1, %esi
call __cudaPushCallConfiguration@PLT
testl %eax, %eax
je .L31
.L20:
movl 20(%rsp), %eax
leal 0(,%rax,4), %edx
movslq %edx, %rdx
movl $2, %ecx
movq 40(%rsp), %rsi
movq %rbx, %rdi
call cudaMemcpy@PLT
leaq .LC5(%rip), %rsi
movl $2, %edi
movl $0, %eax
call __printf_chk@PLT
cmpl $0, 20(%rsp)
jle .L21
movl $0, %ebp
leaq .LC6(%rip), %r12
.L22:
movl (%rbx,%rbp,4), %edx
movq %r12, %rsi
movl $2, %edi
movl $0, %eax
call __printf_chk@PLT
addq $1, %rbp
cmpl %ebp, 20(%rsp)
jg .L22
.L21:
movq 24(%rsp), %rdi
call cudaFree@PLT
movq 32(%rsp), %rdi
call cudaFree@PLT
movq 40(%rsp), %rdi
call cudaFree@PLT
movq 120(%rsp), %rax
subq %fs:40, %rax
jne .L32
movl $0, %eax
addq $136, %rsp
.cfi_remember_state
.cfi_def_cfa_offset 56
popq %rbx
.cfi_def_cfa_offset 48
popq %rbp
.cfi_def_cfa_offset 40
popq %r12
.cfi_def_cfa_offset 32
popq %r13
.cfi_def_cfa_offset 24
popq %r14
.cfi_def_cfa_offset 16
popq %r15
.cfi_def_cfa_offset 8
ret
.L29:
.cfi_restore_state
movq 40(%rsp), %rdx
movq 32(%rsp), %rsi
movq 24(%rsp), %rdi
call _Z27__device_stub__Z4add1PiS_S_PiS_S_
jmp .L14
.L30:
movq 40(%rsp), %rdx
movq 32(%rsp), %rsi
movq 24(%rsp), %rdi
call _Z27__device_stub__Z4add1PiS_S_PiS_S_
jmp .L17
.L31:
movq 40(%rsp), %rdx
movq 32(%rsp), %rsi
movq 24(%rsp), %rdi
call _Z27__device_stub__Z4add1PiS_S_PiS_S_
jmp .L20
.L32:
call __stack_chk_fail@PLT
.cfi_endproc
.LFE2057:
.size main, .-main
.globl _Z27__device_stub__Z4add2PiS_S_PiS_S_
.type _Z27__device_stub__Z4add2PiS_S_PiS_S_, @function
_Z27__device_stub__Z4add2PiS_S_PiS_S_:
.LFB2084:
.cfi_startproc
endbr64
subq $136, %rsp
.cfi_def_cfa_offset 144
movq %rdi, 24(%rsp)
movq %rsi, 16(%rsp)
movq %rdx, 8(%rsp)
movq %fs:40, %rax
movq %rax, 120(%rsp)
xorl %eax, %eax
leaq 24(%rsp), %rax
movq %rax, 96(%rsp)
leaq 16(%rsp), %rax
movq %rax, 104(%rsp)
leaq 8(%rsp), %rax
movq %rax, 112(%rsp)
movl $1, 48(%rsp)
movl $1, 52(%rsp)
movl $1, 56(%rsp)
movl $1, 60(%rsp)
movl $1, 64(%rsp)
movl $1, 68(%rsp)
leaq 40(%rsp), %rcx
leaq 32(%rsp), %rdx
leaq 60(%rsp), %rsi
leaq 48(%rsp), %rdi
call __cudaPopCallConfiguration@PLT
testl %eax, %eax
je .L37
.L33:
movq 120(%rsp), %rax
subq %fs:40, %rax
jne .L38
addq $136, %rsp
.cfi_remember_state
.cfi_def_cfa_offset 8
ret
.L37:
.cfi_restore_state
pushq 40(%rsp)
.cfi_def_cfa_offset 152
pushq 40(%rsp)
.cfi_def_cfa_offset 160
leaq 112(%rsp), %r9
movq 76(%rsp), %rcx
movl 84(%rsp), %r8d
movq 64(%rsp), %rsi
movl 72(%rsp), %edx
leaq _Z4add2PiS_S_(%rip), %rdi
call cudaLaunchKernel@PLT
addq $16, %rsp
.cfi_def_cfa_offset 144
jmp .L33
.L38:
call __stack_chk_fail@PLT
.cfi_endproc
.LFE2084:
.size _Z27__device_stub__Z4add2PiS_S_PiS_S_, .-_Z27__device_stub__Z4add2PiS_S_PiS_S_
.globl _Z4add2PiS_S_
.type _Z4add2PiS_S_, @function
_Z4add2PiS_S_:
.LFB2085:
.cfi_startproc
endbr64
subq $8, %rsp
.cfi_def_cfa_offset 16
call _Z27__device_stub__Z4add2PiS_S_PiS_S_
addq $8, %rsp
.cfi_def_cfa_offset 8
ret
.cfi_endproc
.LFE2085:
.size _Z4add2PiS_S_, .-_Z4add2PiS_S_
.globl _Z27__device_stub__Z4add3PiS_S_PiS_S_
.type _Z27__device_stub__Z4add3PiS_S_PiS_S_, @function
_Z27__device_stub__Z4add3PiS_S_PiS_S_:
.LFB2086:
.cfi_startproc
endbr64
subq $136, %rsp
.cfi_def_cfa_offset 144
movq %rdi, 24(%rsp)
movq %rsi, 16(%rsp)
movq %rdx, 8(%rsp)
movq %fs:40, %rax
movq %rax, 120(%rsp)
xorl %eax, %eax
leaq 24(%rsp), %rax
movq %rax, 96(%rsp)
leaq 16(%rsp), %rax
movq %rax, 104(%rsp)
leaq 8(%rsp), %rax
movq %rax, 112(%rsp)
movl $1, 48(%rsp)
movl $1, 52(%rsp)
movl $1, 56(%rsp)
movl $1, 60(%rsp)
movl $1, 64(%rsp)
movl $1, 68(%rsp)
leaq 40(%rsp), %rcx
leaq 32(%rsp), %rdx
leaq 60(%rsp), %rsi
leaq 48(%rsp), %rdi
call __cudaPopCallConfiguration@PLT
testl %eax, %eax
je .L45
.L41:
movq 120(%rsp), %rax
subq %fs:40, %rax
jne .L46
addq $136, %rsp
.cfi_remember_state
.cfi_def_cfa_offset 8
ret
.L45:
.cfi_restore_state
pushq 40(%rsp)
.cfi_def_cfa_offset 152
pushq 40(%rsp)
.cfi_def_cfa_offset 160
leaq 112(%rsp), %r9
movq 76(%rsp), %rcx
movl 84(%rsp), %r8d
movq 64(%rsp), %rsi
movl 72(%rsp), %edx
leaq _Z4add3PiS_S_(%rip), %rdi
call cudaLaunchKernel@PLT
addq $16, %rsp
.cfi_def_cfa_offset 144
jmp .L41
.L46:
call __stack_chk_fail@PLT
.cfi_endproc
.LFE2086:
.size _Z27__device_stub__Z4add3PiS_S_PiS_S_, .-_Z27__device_stub__Z4add3PiS_S_PiS_S_
.globl _Z4add3PiS_S_
.type _Z4add3PiS_S_, @function
_Z4add3PiS_S_:
.LFB2087:
.cfi_startproc
endbr64
subq $8, %rsp
.cfi_def_cfa_offset 16
call _Z27__device_stub__Z4add3PiS_S_PiS_S_
addq $8, %rsp
.cfi_def_cfa_offset 8
ret
.cfi_endproc
.LFE2087:
.size _Z4add3PiS_S_, .-_Z4add3PiS_S_
.section .rodata.str1.1
.LC9:
.string "_Z4add3PiS_S_"
.LC10:
.string "_Z4add2PiS_S_"
.LC11:
.string "_Z4add1PiS_S_"
.text
.type _ZL24__sti____cudaRegisterAllv, @function
_ZL24__sti____cudaRegisterAllv:
.LFB2089:
.cfi_startproc
endbr64
pushq %rbx
.cfi_def_cfa_offset 16
.cfi_offset 3, -16
leaq _ZL15__fatDeviceText(%rip), %rdi
call __cudaRegisterFatBinary@PLT
movq %rax, %rbx
movq %rax, _ZL20__cudaFatCubinHandle(%rip)
pushq $0
.cfi_def_cfa_offset 24
pushq $0
.cfi_def_cfa_offset 32
pushq $0
.cfi_def_cfa_offset 40
pushq $0
.cfi_def_cfa_offset 48
movl $0, %r9d
movl $-1, %r8d
leaq .LC9(%rip), %rdx
movq %rdx, %rcx
leaq _Z4add3PiS_S_(%rip), %rsi
movq %rax, %rdi
call __cudaRegisterFunction@PLT
addq $32, %rsp
.cfi_def_cfa_offset 16
pushq $0
.cfi_def_cfa_offset 24
pushq $0
.cfi_def_cfa_offset 32
pushq $0
.cfi_def_cfa_offset 40
pushq $0
.cfi_def_cfa_offset 48
movl $0, %r9d
movl $-1, %r8d
leaq .LC10(%rip), %rdx
movq %rdx, %rcx
leaq _Z4add2PiS_S_(%rip), %rsi
movq %rbx, %rdi
call __cudaRegisterFunction@PLT
addq $32, %rsp
.cfi_def_cfa_offset 16
pushq $0
.cfi_def_cfa_offset 24
pushq $0
.cfi_def_cfa_offset 32
pushq $0
.cfi_def_cfa_offset 40
pushq $0
.cfi_def_cfa_offset 48
movl $0, %r9d
movl $-1, %r8d
leaq .LC11(%rip), %rdx
movq %rdx, %rcx
leaq _Z4add1PiS_S_(%rip), %rsi
movq %rbx, %rdi
call __cudaRegisterFunction@PLT
addq $32, %rsp
.cfi_def_cfa_offset 16
movq _ZL20__cudaFatCubinHandle(%rip), %rdi
call __cudaRegisterFatBinaryEnd@PLT
leaq _ZL26__cudaUnregisterBinaryUtilv(%rip), %rdi
call atexit@PLT
popq %rbx
.cfi_def_cfa_offset 8
ret
.cfi_endproc
.LFE2089:
.size _ZL24__sti____cudaRegisterAllv, .-_ZL24__sti____cudaRegisterAllv
.section .init_array,"aw"
.align 8
.quad _ZL24__sti____cudaRegisterAllv
.section .nvFatBinSegment,"aw"
.align 8
.type _ZL15__fatDeviceText, @object
.size _ZL15__fatDeviceText, 24
_ZL15__fatDeviceText:
.long 1180844977
.long 1
.quad fatbinData
.quad 0
.local _ZL20__cudaFatCubinHandle
.comm _ZL20__cudaFatCubinHandle,8,8
.ident "GCC: (Ubuntu 13.3.0-6ubuntu2~24.04) 13.3.0"
.section .note.GNU-stack,"",@progbits
.section .note.gnu.property,"a"
.align 8
.long 1f - 0f
.long 4f - 1f
.long 5
0:
.string "GNU"
1:
.align 8
.long 0xc0000002
.long 3f - 2f
2:
.long 0x3
3:
.align 8
4: | .text
.file "CUDA_VectorAdd.hip"
.globl _Z19__device_stub__add1PiS_S_ # -- Begin function _Z19__device_stub__add1PiS_S_
.p2align 4, 0x90
.type _Z19__device_stub__add1PiS_S_,@function
_Z19__device_stub__add1PiS_S_: # @_Z19__device_stub__add1PiS_S_
.cfi_startproc
# %bb.0:
subq $104, %rsp
.cfi_def_cfa_offset 112
movq %rdi, 72(%rsp)
movq %rsi, 64(%rsp)
movq %rdx, 56(%rsp)
leaq 72(%rsp), %rax
movq %rax, 80(%rsp)
leaq 64(%rsp), %rax
movq %rax, 88(%rsp)
leaq 56(%rsp), %rax
movq %rax, 96(%rsp)
leaq 40(%rsp), %rdi
leaq 24(%rsp), %rsi
leaq 16(%rsp), %rdx
leaq 8(%rsp), %rcx
callq __hipPopCallConfiguration
movq 40(%rsp), %rsi
movl 48(%rsp), %edx
movq 24(%rsp), %rcx
movl 32(%rsp), %r8d
leaq 80(%rsp), %r9
movl $_Z4add1PiS_S_, %edi
pushq 8(%rsp)
.cfi_adjust_cfa_offset 8
pushq 24(%rsp)
.cfi_adjust_cfa_offset 8
callq hipLaunchKernel
addq $120, %rsp
.cfi_adjust_cfa_offset -120
retq
.Lfunc_end0:
.size _Z19__device_stub__add1PiS_S_, .Lfunc_end0-_Z19__device_stub__add1PiS_S_
.cfi_endproc
# -- End function
.globl _Z19__device_stub__add2PiS_S_ # -- Begin function _Z19__device_stub__add2PiS_S_
.p2align 4, 0x90
.type _Z19__device_stub__add2PiS_S_,@function
_Z19__device_stub__add2PiS_S_: # @_Z19__device_stub__add2PiS_S_
.cfi_startproc
# %bb.0:
subq $104, %rsp
.cfi_def_cfa_offset 112
movq %rdi, 72(%rsp)
movq %rsi, 64(%rsp)
movq %rdx, 56(%rsp)
leaq 72(%rsp), %rax
movq %rax, 80(%rsp)
leaq 64(%rsp), %rax
movq %rax, 88(%rsp)
leaq 56(%rsp), %rax
movq %rax, 96(%rsp)
leaq 40(%rsp), %rdi
leaq 24(%rsp), %rsi
leaq 16(%rsp), %rdx
leaq 8(%rsp), %rcx
callq __hipPopCallConfiguration
movq 40(%rsp), %rsi
movl 48(%rsp), %edx
movq 24(%rsp), %rcx
movl 32(%rsp), %r8d
leaq 80(%rsp), %r9
movl $_Z4add2PiS_S_, %edi
pushq 8(%rsp)
.cfi_adjust_cfa_offset 8
pushq 24(%rsp)
.cfi_adjust_cfa_offset 8
callq hipLaunchKernel
addq $120, %rsp
.cfi_adjust_cfa_offset -120
retq
.Lfunc_end1:
.size _Z19__device_stub__add2PiS_S_, .Lfunc_end1-_Z19__device_stub__add2PiS_S_
.cfi_endproc
# -- End function
.globl _Z19__device_stub__add3PiS_S_ # -- Begin function _Z19__device_stub__add3PiS_S_
.p2align 4, 0x90
.type _Z19__device_stub__add3PiS_S_,@function
_Z19__device_stub__add3PiS_S_: # @_Z19__device_stub__add3PiS_S_
.cfi_startproc
# %bb.0:
subq $104, %rsp
.cfi_def_cfa_offset 112
movq %rdi, 72(%rsp)
movq %rsi, 64(%rsp)
movq %rdx, 56(%rsp)
leaq 72(%rsp), %rax
movq %rax, 80(%rsp)
leaq 64(%rsp), %rax
movq %rax, 88(%rsp)
leaq 56(%rsp), %rax
movq %rax, 96(%rsp)
leaq 40(%rsp), %rdi
leaq 24(%rsp), %rsi
leaq 16(%rsp), %rdx
leaq 8(%rsp), %rcx
callq __hipPopCallConfiguration
movq 40(%rsp), %rsi
movl 48(%rsp), %edx
movq 24(%rsp), %rcx
movl 32(%rsp), %r8d
leaq 80(%rsp), %r9
movl $_Z4add3PiS_S_, %edi
pushq 8(%rsp)
.cfi_adjust_cfa_offset 8
pushq 24(%rsp)
.cfi_adjust_cfa_offset 8
callq hipLaunchKernel
addq $120, %rsp
.cfi_adjust_cfa_offset -120
retq
.Lfunc_end2:
.size _Z19__device_stub__add3PiS_S_, .Lfunc_end2-_Z19__device_stub__add3PiS_S_
.cfi_endproc
# -- End function
.globl main # -- Begin function main
.p2align 4, 0x90
.type main,@function
main: # @main
.cfi_startproc
# %bb.0:
pushq %rbp
.cfi_def_cfa_offset 16
pushq %r15
.cfi_def_cfa_offset 24
pushq %r14
.cfi_def_cfa_offset 32
pushq %r13
.cfi_def_cfa_offset 40
pushq %r12
.cfi_def_cfa_offset 48
pushq %rbx
.cfi_def_cfa_offset 56
subq $136, %rsp
.cfi_def_cfa_offset 192
.cfi_offset %rbx, -56
.cfi_offset %r12, -48
.cfi_offset %r13, -40
.cfi_offset %r14, -32
.cfi_offset %r15, -24
.cfi_offset %rbp, -16
movl $.L.str, %edi
xorl %eax, %eax
callq printf
leaq 12(%rsp), %rsi
movl $.L.str.1, %edi
xorl %eax, %eax
callq __isoc23_scanf
movslq 12(%rsp), %rbx
shlq $2, %rbx
movq %rbx, %rdi
callq malloc
movq %rax, %r12
movq %rbx, %rdi
callq malloc
movq %rax, %r15
movq %rbx, %rdi
callq malloc
movq %rax, %rbx
movl $.Lstr, %edi
callq puts@PLT
movl 12(%rsp), %eax
testl %eax, %eax
jle .LBB3_3
# %bb.1: # %.lr.ph.preheader
movq %r12, %r14
movq %r15, %r13
xorl %ebp, %ebp
.p2align 4, 0x90
.LBB3_2: # %.lr.ph
# =>This Inner Loop Header: Depth=1
movl $.L.str.3, %edi
movq %r14, %rsi
movq %r13, %rdx
xorl %eax, %eax
callq __isoc23_scanf
incq %rbp
movslq 12(%rsp), %rax
addq $4, %r13
addq $4, %r14
cmpq %rax, %rbp
jl .LBB3_2
.LBB3_3: # %._crit_edge
movabsq $4294967296, %r14 # imm = 0x100000000
shll $2, %eax
movslq %eax, %rsi
leaq 32(%rsp), %rdi
callq hipMalloc
movslq 12(%rsp), %rsi
shlq $2, %rsi
leaq 24(%rsp), %rdi
callq hipMalloc
movslq 12(%rsp), %rsi
shlq $2, %rsi
leaq 16(%rsp), %rdi
callq hipMalloc
movq 32(%rsp), %rdi
movslq 12(%rsp), %rdx
shlq $2, %rdx
movq %r12, %rsi
movl $1, %ecx
callq hipMemcpy
movq 24(%rsp), %rdi
movslq 12(%rsp), %rdx
shlq $2, %rdx
movq %r15, %rsi
movl $1, %ecx
callq hipMemcpy
movl $.Lstr.1, %edi
callq puts@PLT
movl 12(%rsp), %edi
orq %r14, %rdi
leaq 1(%r14), %rdx
movl $1, %esi
movl $1, %ecx
xorl %r8d, %r8d
xorl %r9d, %r9d
callq __hipPushCallConfiguration
testl %eax, %eax
jne .LBB3_5
# %bb.4:
movq 32(%rsp), %rax
movq 24(%rsp), %rcx
movq 16(%rsp), %rdx
movq %rax, 104(%rsp)
movq %rcx, 96(%rsp)
movq %rdx, 88(%rsp)
leaq 104(%rsp), %rax
movq %rax, 112(%rsp)
leaq 96(%rsp), %rax
movq %rax, 120(%rsp)
leaq 88(%rsp), %rax
movq %rax, 128(%rsp)
leaq 72(%rsp), %rdi
leaq 56(%rsp), %rsi
leaq 48(%rsp), %rdx
leaq 40(%rsp), %rcx
callq __hipPopCallConfiguration
movq 72(%rsp), %rsi
movl 80(%rsp), %edx
movq 56(%rsp), %rcx
movl 64(%rsp), %r8d
leaq 112(%rsp), %r9
movl $_Z4add1PiS_S_, %edi
pushq 40(%rsp)
.cfi_adjust_cfa_offset 8
pushq 56(%rsp)
.cfi_adjust_cfa_offset 8
callq hipLaunchKernel
addq $16, %rsp
.cfi_adjust_cfa_offset -16
.LBB3_5:
movq 16(%rsp), %rsi
movslq 12(%rsp), %rdx
shlq $2, %rdx
movq %rbx, %rdi
movl $2, %ecx
callq hipMemcpy
movl $.Lstr.6, %edi
callq puts@PLT
cmpl $0, 12(%rsp)
jle .LBB3_8
# %bb.6: # %.lr.ph89.preheader
xorl %r15d, %r15d
.p2align 4, 0x90
.LBB3_7: # %.lr.ph89
# =>This Inner Loop Header: Depth=1
movl (%rbx,%r15,4), %esi
movl $.L.str.6, %edi
xorl %eax, %eax
callq printf
incq %r15
movslq 12(%rsp), %rax
cmpq %rax, %r15
jl .LBB3_7
.LBB3_8: # %._crit_edge90
movl $.Lstr.3, %edi
callq puts@PLT
movl 12(%rsp), %edx
orq %r14, %rdx
leaq 1(%r14), %rdi
movl $1, %esi
movl $1, %ecx
xorl %r8d, %r8d
xorl %r9d, %r9d
callq __hipPushCallConfiguration
testl %eax, %eax
jne .LBB3_10
# %bb.9:
movq 32(%rsp), %rax
movq 24(%rsp), %rcx
movq 16(%rsp), %rdx
movq %rax, 104(%rsp)
movq %rcx, 96(%rsp)
movq %rdx, 88(%rsp)
leaq 104(%rsp), %rax
movq %rax, 112(%rsp)
leaq 96(%rsp), %rax
movq %rax, 120(%rsp)
leaq 88(%rsp), %rax
movq %rax, 128(%rsp)
leaq 72(%rsp), %rdi
leaq 56(%rsp), %rsi
leaq 48(%rsp), %rdx
leaq 40(%rsp), %rcx
callq __hipPopCallConfiguration
movq 72(%rsp), %rsi
movl 80(%rsp), %edx
movq 56(%rsp), %rcx
movl 64(%rsp), %r8d
leaq 112(%rsp), %r9
movl $_Z4add1PiS_S_, %edi
pushq 40(%rsp)
.cfi_adjust_cfa_offset 8
pushq 56(%rsp)
.cfi_adjust_cfa_offset 8
callq hipLaunchKernel
addq $16, %rsp
.cfi_adjust_cfa_offset -16
.LBB3_10:
movq 16(%rsp), %rsi
movslq 12(%rsp), %rdx
shlq $2, %rdx
movq %rbx, %rdi
movl $2, %ecx
callq hipMemcpy
movl $.Lstr.6, %edi
callq puts@PLT
cmpl $0, 12(%rsp)
jle .LBB3_13
# %bb.11: # %.lr.ph93.preheader
xorl %r15d, %r15d
.p2align 4, 0x90
.LBB3_12: # %.lr.ph93
# =>This Inner Loop Header: Depth=1
movl (%rbx,%r15,4), %esi
movl $.L.str.6, %edi
xorl %eax, %eax
callq printf
incq %r15
movslq 12(%rsp), %rax
cmpq %rax, %r15
jl .LBB3_12
.LBB3_13: # %._crit_edge94
movl $.Lstr.5, %edi
callq puts@PLT
movl 12(%rsp), %eax
leal 255(%rax), %ecx
testl %eax, %eax
cmovnsl %eax, %ecx
sarl $8, %ecx
cvtsi2ss %ecx, %xmm0
cvttss2si %xmm0, %rax
movl %eax, %edi
orq %r14, %rdi
addq $256, %r14 # imm = 0x100
movl $1, %esi
movq %r14, %rdx
movl $1, %ecx
xorl %r8d, %r8d
xorl %r9d, %r9d
callq __hipPushCallConfiguration
testl %eax, %eax
jne .LBB3_15
# %bb.14:
movq 32(%rsp), %rax
movq 24(%rsp), %rcx
movq 16(%rsp), %rdx
movq %rax, 104(%rsp)
movq %rcx, 96(%rsp)
movq %rdx, 88(%rsp)
leaq 104(%rsp), %rax
movq %rax, 112(%rsp)
leaq 96(%rsp), %rax
movq %rax, 120(%rsp)
leaq 88(%rsp), %rax
movq %rax, 128(%rsp)
leaq 72(%rsp), %rdi
leaq 56(%rsp), %rsi
leaq 48(%rsp), %rdx
leaq 40(%rsp), %rcx
callq __hipPopCallConfiguration
movq 72(%rsp), %rsi
movl 80(%rsp), %edx
movq 56(%rsp), %rcx
movl 64(%rsp), %r8d
leaq 112(%rsp), %r9
movl $_Z4add1PiS_S_, %edi
pushq 40(%rsp)
.cfi_adjust_cfa_offset 8
pushq 56(%rsp)
.cfi_adjust_cfa_offset 8
callq hipLaunchKernel
addq $16, %rsp
.cfi_adjust_cfa_offset -16
.LBB3_15:
movq 16(%rsp), %rsi
movslq 12(%rsp), %rdx
shlq $2, %rdx
movq %rbx, %rdi
movl $2, %ecx
callq hipMemcpy
movl $.Lstr.6, %edi
callq puts@PLT
cmpl $0, 12(%rsp)
jle .LBB3_18
# %bb.16: # %.lr.ph97.preheader
xorl %r14d, %r14d
.p2align 4, 0x90
.LBB3_17: # %.lr.ph97
# =>This Inner Loop Header: Depth=1
movl (%rbx,%r14,4), %esi
movl $.L.str.6, %edi
xorl %eax, %eax
callq printf
incq %r14
movslq 12(%rsp), %rax
cmpq %rax, %r14
jl .LBB3_17
.LBB3_18: # %._crit_edge98
movq 32(%rsp), %rdi
callq hipFree
movq 24(%rsp), %rdi
callq hipFree
movq 16(%rsp), %rdi
callq hipFree
xorl %eax, %eax
addq $136, %rsp
.cfi_def_cfa_offset 56
popq %rbx
.cfi_def_cfa_offset 48
popq %r12
.cfi_def_cfa_offset 40
popq %r13
.cfi_def_cfa_offset 32
popq %r14
.cfi_def_cfa_offset 24
popq %r15
.cfi_def_cfa_offset 16
popq %rbp
.cfi_def_cfa_offset 8
retq
.Lfunc_end3:
.size main, .Lfunc_end3-main
.cfi_endproc
# -- End function
.p2align 4, 0x90 # -- Begin function __hip_module_ctor
.type __hip_module_ctor,@function
__hip_module_ctor: # @__hip_module_ctor
.cfi_startproc
# %bb.0:
pushq %rbx
.cfi_def_cfa_offset 16
subq $32, %rsp
.cfi_def_cfa_offset 48
.cfi_offset %rbx, -16
cmpq $0, __hip_gpubin_handle(%rip)
jne .LBB4_2
# %bb.1:
movl $__hip_fatbin_wrapper, %edi
callq __hipRegisterFatBinary
movq %rax, __hip_gpubin_handle(%rip)
.LBB4_2:
movq __hip_gpubin_handle(%rip), %rbx
xorps %xmm0, %xmm0
movups %xmm0, 16(%rsp)
movups %xmm0, (%rsp)
movl $_Z4add1PiS_S_, %esi
movl $.L__unnamed_1, %edx
movl $.L__unnamed_1, %ecx
movq %rbx, %rdi
movl $-1, %r8d
xorl %r9d, %r9d
callq __hipRegisterFunction
xorps %xmm0, %xmm0
movups %xmm0, 16(%rsp)
movups %xmm0, (%rsp)
movl $_Z4add2PiS_S_, %esi
movl $.L__unnamed_2, %edx
movl $.L__unnamed_2, %ecx
movq %rbx, %rdi
movl $-1, %r8d
xorl %r9d, %r9d
callq __hipRegisterFunction
xorps %xmm0, %xmm0
movups %xmm0, 16(%rsp)
movups %xmm0, (%rsp)
movl $_Z4add3PiS_S_, %esi
movl $.L__unnamed_3, %edx
movl $.L__unnamed_3, %ecx
movq %rbx, %rdi
movl $-1, %r8d
xorl %r9d, %r9d
callq __hipRegisterFunction
movl $__hip_module_dtor, %edi
addq $32, %rsp
.cfi_def_cfa_offset 16
popq %rbx
.cfi_def_cfa_offset 8
jmp atexit # TAILCALL
.Lfunc_end4:
.size __hip_module_ctor, .Lfunc_end4-__hip_module_ctor
.cfi_endproc
# -- End function
.p2align 4, 0x90 # -- Begin function __hip_module_dtor
.type __hip_module_dtor,@function
__hip_module_dtor: # @__hip_module_dtor
.cfi_startproc
# %bb.0:
movq __hip_gpubin_handle(%rip), %rdi
testq %rdi, %rdi
je .LBB5_2
# %bb.1:
pushq %rax
.cfi_def_cfa_offset 16
callq __hipUnregisterFatBinary
movq $0, __hip_gpubin_handle(%rip)
addq $8, %rsp
.cfi_def_cfa_offset 8
.LBB5_2:
retq
.Lfunc_end5:
.size __hip_module_dtor, .Lfunc_end5-__hip_module_dtor
.cfi_endproc
# -- End function
.type _Z4add1PiS_S_,@object # @_Z4add1PiS_S_
.section .rodata,"a",@progbits
.globl _Z4add1PiS_S_
.p2align 3, 0x0
_Z4add1PiS_S_:
.quad _Z19__device_stub__add1PiS_S_
.size _Z4add1PiS_S_, 8
.type _Z4add2PiS_S_,@object # @_Z4add2PiS_S_
.globl _Z4add2PiS_S_
.p2align 3, 0x0
_Z4add2PiS_S_:
.quad _Z19__device_stub__add2PiS_S_
.size _Z4add2PiS_S_, 8
.type _Z4add3PiS_S_,@object # @_Z4add3PiS_S_
.globl _Z4add3PiS_S_
.p2align 3, 0x0
_Z4add3PiS_S_:
.quad _Z19__device_stub__add3PiS_S_
.size _Z4add3PiS_S_, 8
.type .L.str,@object # @.str
.section .rodata.str1.1,"aMS",@progbits,1
.L.str:
.asciz "Enter number of elements: "
.size .L.str, 27
.type .L.str.1,@object # @.str.1
.L.str.1:
.asciz "%d"
.size .L.str.1, 3
.type .L.str.3,@object # @.str.3
.L.str.3:
.asciz "%d %d"
.size .L.str.3, 6
.type .L.str.6,@object # @.str.6
.L.str.6:
.asciz "%d "
.size .L.str.6, 4
.type .L__unnamed_1,@object # @0
.L__unnamed_1:
.asciz "_Z4add1PiS_S_"
.size .L__unnamed_1, 14
.type .L__unnamed_2,@object # @1
.L__unnamed_2:
.asciz "_Z4add2PiS_S_"
.size .L__unnamed_2, 14
.type .L__unnamed_3,@object # @2
.L__unnamed_3:
.asciz "_Z4add3PiS_S_"
.size .L__unnamed_3, 14
.type __hip_fatbin_wrapper,@object # @__hip_fatbin_wrapper
.section .hipFatBinSegment,"a",@progbits
.p2align 3, 0x0
__hip_fatbin_wrapper:
.long 1212764230 # 0x48495046
.long 1 # 0x1
.quad __hip_fatbin
.quad 0
.size __hip_fatbin_wrapper, 24
.type __hip_gpubin_handle,@object # @__hip_gpubin_handle
.local __hip_gpubin_handle
.comm __hip_gpubin_handle,8,8
.section .init_array,"aw",@init_array
.p2align 3, 0x0
.quad __hip_module_ctor
.type __hip_cuid_,@object # @__hip_cuid_
.bss
.globl __hip_cuid_
__hip_cuid_:
.byte 0 # 0x0
.size __hip_cuid_, 1
.type .Lstr,@object # @str
.section .rodata.str1.1,"aMS",@progbits,1
.Lstr:
.asciz "Enter elements a <space> b:"
.size .Lstr, 28
.type .Lstr.1,@object # @str.1
.Lstr.1:
.asciz "\n// LAUNCHING ADD1 //"
.size .Lstr.1, 22
.type .Lstr.3,@object # @str.3
.Lstr.3:
.asciz "\n// LAUNCHING ADD2 //"
.size .Lstr.3, 22
.type .Lstr.5,@object # @str.5
.Lstr.5:
.asciz "\n// LAUNCHING ADD3 //"
.size .Lstr.5, 22
.type .Lstr.6,@object # @str.6
.Lstr.6:
.asciz "Result:"
.size .Lstr.6, 8
.section ".linker-options","e",@llvm_linker_options
.ident "AMD clang version 18.0.0git (https://github.com/RadeonOpenCompute/llvm-project roc-6.3.2 25012 e5bf7e55c91490b07c49d8960fa7983d864936c4)"
.section ".note.GNU-stack","",@progbits
.addrsig
.addrsig_sym _Z19__device_stub__add1PiS_S_
.addrsig_sym _Z19__device_stub__add2PiS_S_
.addrsig_sym _Z19__device_stub__add3PiS_S_
.addrsig_sym __hip_module_ctor
.addrsig_sym __hip_module_dtor
.addrsig_sym _Z4add1PiS_S_
.addrsig_sym _Z4add2PiS_S_
.addrsig_sym _Z4add3PiS_S_
.addrsig_sym __hip_fatbin
.addrsig_sym __hip_fatbin_wrapper
.addrsig_sym __hip_cuid_ |
You are a helpful coding assistant specialized in converting CUDA source code to CUDA device assembly. | #include <stdio.h>
#include <time.h>
#include <stdlib.h>
#include <cuda_runtime.h>
__global__
void resolveWeight(int8_t *A,int8_t *B,int8_t *C, int n, int wx){
int k = blockIdx.x*blockDim.x+threadIdx.x;
int off = k * n;
int8_t temp = 0;
int b = 0;
if(k<wx){
for(int i=0;i<n;i++){
b = off+i;
temp+=A[i]*B[b];
}
C[k]=temp;
}
}
int main(){
FILE *fout = fopen("out.txt","w");
int T = 512;
int nodes,weightsX,weightsY;
for(int o = 1; o < 10000;o++){
if(o%1000 == 0){
printf("Starting run %d\n" ,o);
}
fprintf(fout,"%d",o);
nodes = o;
weightsX = o;
weightsY = o;
int8_t *node, *d_node, *weight, *d_weight,*out,*gout,*d_out;
node = (int8_t *)malloc(nodes*sizeof(int8_t));
weight = (int8_t *)malloc(weightsX*weightsY*sizeof(int8_t));
out = (int8_t *)malloc(weightsX*sizeof(int8_t));
gout = (int8_t *)malloc(weightsX*sizeof(int8_t));
srand(time(0));
//Set up matrix 1
for(int i = 0;i<nodes;i++){
node[i] = rand() % 3 - 1;
}
//Set up matrix 2
for(int i = 0;i<(weightsX*weightsY);i++){
weight[i] = rand() % 3 - 1;
}
//Set up matrices for results
for(int i = 0;i<weightsX;i++){
out[i] = 0;
gout[i] = 0;
}
unsigned int sstart = clock();
for(int i = 0; i<weightsX;i++){
for(int j = 0; j<weightsY;j++){
out[i]+=(node[j]*weight[(nodes*i)+j]);
}
}
//printf("Sequential time taken in ms %li\n" ,(clock() - sstart));
int seqtime = clock()-sstart;
fprintf(fout,",%d",seqtime);
//CUDA parallel code
cudaMalloc(&d_node,nodes*sizeof(int8_t));
cudaMalloc(&d_weight,weightsX*weightsY*sizeof(int8_t));
cudaMalloc(&d_out,weightsX*sizeof(int8_t));
cudaMemcpy(d_node,node,nodes*sizeof(int8_t),cudaMemcpyHostToDevice);
cudaMemcpy(d_weight,weight,weightsX*weightsY*sizeof(int8_t),cudaMemcpyHostToDevice);
cudaMemcpy(d_out,gout,weightsX*sizeof(int8_t),cudaMemcpyHostToDevice);
unsigned int pstart = clock();
resolveWeight<<<weightsX+(T-1)/T,T>>>(d_node,d_weight,d_out,nodes,weightsX);
cudaDeviceSynchronize();
//printf("Parallel time taken in ms %li\n" ,(clock() - pstart));
int partime = clock()-pstart;
fprintf(fout,",%d",partime);
cudaMemcpy(gout,d_out,weightsX*sizeof(int8_t),cudaMemcpyDeviceToHost);
// printf("Value at 3: %i\n",out[2]);
// printf("Value on gpu at 3: %i\n",gout[2]);
// printf("Value at 5120: %i\n",out[5119]);
// printf("Value on gpu at 5120: %i\n",gout[5119]);
// printf("Value at 10000: %i\n",out[9999]);
// printf("Value on gpu at 10000: %i\n",gout[9999]);
int err = 0;
for(int i = 0; i < weightsX; i++){
err += out[i]-gout[i];
}
// printf("Error with CUDA: %i\n",err);
fprintf(fout,",%d\n",err);
free(node);
free(weight);
free(out);
free(gout);
cudaDeviceReset();
}
fclose(fout);
} | code for sm_80
Function : _Z13resolveWeightPaS_S_ii
.headerflags @"EF_CUDA_TEXMODE_UNIFIED EF_CUDA_64BIT_ADDRESS EF_CUDA_SM80 EF_CUDA_VIRTUAL_SM(EF_CUDA_SM80)"
/*0000*/ IMAD.MOV.U32 R1, RZ, RZ, c[0x0][0x28] ; /* 0x00000a00ff017624 */
/* 0x000fe400078e00ff */
/*0010*/ S2R R0, SR_CTAID.X ; /* 0x0000000000007919 */
/* 0x000e280000002500 */
/*0020*/ S2R R3, SR_TID.X ; /* 0x0000000000037919 */
/* 0x000e240000002100 */
/*0030*/ IMAD R0, R0, c[0x0][0x0], R3 ; /* 0x0000000000007a24 */
/* 0x001fca00078e0203 */
/*0040*/ ISETP.GE.AND P0, PT, R0, c[0x0][0x17c], PT ; /* 0x00005f0000007a0c */
/* 0x000fda0003f06270 */
/*0050*/ @P0 EXIT ; /* 0x000000000000094d */
/* 0x000fea0003800000 */
/*0060*/ IMAD.MOV.U32 R6, RZ, RZ, c[0x0][0x178] ; /* 0x00005e00ff067624 */
/* 0x000fe200078e00ff */
/*0070*/ ULDC.64 UR4, c[0x0][0x118] ; /* 0x0000460000047ab9 */
/* 0x000fe20000000a00 */
/*0080*/ PRMT R14, RZ, 0x7610, R14 ; /* 0x00007610ff0e7816 */
/* 0x000fc6000000000e */
/*0090*/ ISETP.GE.AND P0, PT, R6, 0x1, PT ; /* 0x000000010600780c */
/* 0x000fda0003f06270 */
/*00a0*/ @!P0 BRA 0xaa0 ; /* 0x000009f000008947 */
/* 0x000fea0003800000 */
/*00b0*/ IADD3 R2, R6.reuse, -0x1, RZ ; /* 0xffffffff06027810 */
/* 0x040fe20007ffe0ff */
/*00c0*/ IMAD.MOV.U32 R9, RZ, RZ, RZ ; /* 0x000000ffff097224 */
/* 0x000fe200078e00ff */
/*00d0*/ LOP3.LUT R6, R6, 0x3, RZ, 0xc0, !PT ; /* 0x0000000306067812 */
/* 0x000fe400078ec0ff */
/*00e0*/ ISETP.GE.U32.AND P0, PT, R2, 0x3, PT ; /* 0x000000030200780c */
/* 0x000fe40003f06070 */
/*00f0*/ PRMT R14, RZ, 0x7610, R14 ; /* 0x00007610ff0e7816 */
/* 0x000fd6000000000e */
/*0100*/ @!P0 BRA 0x950 ; /* 0x0000084000008947 */
/* 0x000fea0003800000 */
/*0110*/ IADD3 R7, -R6, c[0x0][0x178], RZ ; /* 0x00005e0006077a10 */
/* 0x000fe20007ffe1ff */
/*0120*/ IMAD R2, R0, c[0x0][0x178], RZ ; /* 0x00005e0000027a24 */
/* 0x000fe200078e02ff */
/*0130*/ PRMT R14, RZ, 0x7610, R14 ; /* 0x00007610ff0e7816 */
/* 0x000fe2000000000e */
/*0140*/ IMAD.MOV.U32 R9, RZ, RZ, RZ ; /* 0x000000ffff097224 */
/* 0x000fe200078e00ff */
/*0150*/ ISETP.GT.AND P0, PT, R7, RZ, PT ; /* 0x000000ff0700720c */
/* 0x000fe20003f04270 */
/*0160*/ IMAD.MOV.U32 R3, RZ, RZ, c[0x0][0x164] ; /* 0x00005900ff037624 */
/* 0x000fe200078e00ff */
/*0170*/ IADD3 R4, P1, R2, c[0x0][0x168], RZ ; /* 0x00005a0002047a10 */
/* 0x000fc80007f3e0ff */
/*0180*/ LEA.HI.X.SX32 R5, R2, c[0x0][0x16c], 0x1, P1 ; /* 0x00005b0002057a11 */
/* 0x000fe400008f0eff */
/*0190*/ MOV R2, c[0x0][0x160] ; /* 0x0000580000027a02 */
/* 0x000fca0000000f00 */
/*01a0*/ @!P0 BRA 0x7c0 ; /* 0x0000061000008947 */
/* 0x000fea0003800000 */
/*01b0*/ ISETP.GT.AND P1, PT, R7, 0xc, PT ; /* 0x0000000c0700780c */
/* 0x000fe40003f24270 */
/*01c0*/ PLOP3.LUT P0, PT, PT, PT, PT, 0x80, 0x0 ; /* 0x000000000000781c */
/* 0x000fd60003f0f070 */
/*01d0*/ @!P1 BRA 0x580 ; /* 0x000003a000009947 */
/* 0x000fea0003800000 */
/*01e0*/ PLOP3.LUT P0, PT, PT, PT, PT, 0x8, 0x0 ; /* 0x000000000000781c */
/* 0x000fe40003f0e170 */
/*01f0*/ LDG.E.U8 R17, [R4.64] ; /* 0x0000000404117981 */
/* 0x000ea8000c1e1100 */
/*0200*/ LDG.E.U8 R16, [R2.64] ; /* 0x0000000402107981 */
/* 0x000ea8000c1e1100 */
/*0210*/ LDG.E.U8 R19, [R4.64+0x1] ; /* 0x0000010404137981 */
/* 0x000ee8000c1e1100 */
/*0220*/ LDG.E.U8 R24, [R2.64+0x1] ; /* 0x0000010402187981 */
/* 0x000ee8000c1e1100 */
/*0230*/ LDG.E.U8 R18, [R4.64+0x2] ; /* 0x0000020404127981 */
/* 0x000f28000c1e1100 */
/*0240*/ LDG.E.U8 R21, [R2.64+0x2] ; /* 0x0000020402157981 */
/* 0x000f28000c1e1100 */
/*0250*/ LDG.E.U8 R23, [R4.64+0x3] ; /* 0x0000030404177981 */
/* 0x000f68000c1e1100 */
/*0260*/ LDG.E.U8 R20, [R2.64+0x3] ; /* 0x0000030402147981 */
/* 0x000f68000c1e1100 */
/*0270*/ LDG.E.U8 R22, [R4.64+0x4] ; /* 0x0000040404167981 */
/* 0x000f68000c1e1100 */
/*0280*/ LDG.E.U8 R25, [R2.64+0x4] ; /* 0x0000040402197981 */
/* 0x000f68000c1e1100 */
/*0290*/ LDG.E.U8 R8, [R4.64+0x5] ; /* 0x0000050404087981 */
/* 0x000f68000c1e1100 */
/*02a0*/ LDG.E.U8 R11, [R2.64+0x5] ; /* 0x00000504020b7981 */
/* 0x000f68000c1e1100 */
/*02b0*/ LDG.E.U8 R10, [R4.64+0x6] ; /* 0x00000604040a7981 */
/* 0x000f68000c1e1100 */
/*02c0*/ LDG.E.U8 R13, [R2.64+0x6] ; /* 0x00000604020d7981 */
/* 0x000f68000c1e1100 */
/*02d0*/ LDG.E.U8 R12, [R4.64+0x7] ; /* 0x00000704040c7981 */
/* 0x000f68000c1e1100 */
/*02e0*/ LDG.E.U8 R15, [R2.64+0x7] ; /* 0x00000704020f7981 */
/* 0x000f62000c1e1100 */
/*02f0*/ IMAD R16, R17, R16, R14 ; /* 0x0000001011107224 */
/* 0x004fc600078e020e */
/*0300*/ LDG.E.U8 R14, [R4.64+0x8] ; /* 0x00000804040e7981 */
/* 0x0000a8000c1e1100 */
/*0310*/ LDG.E.U8 R17, [R2.64+0x8] ; /* 0x0000080402117981 */
/* 0x0002a2000c1e1100 */
/*0320*/ IMAD R24, R19, R24, R16 ; /* 0x0000001813187224 */
/* 0x008fc600078e0210 */
/*0330*/ LDG.E.U8 R16, [R4.64+0x9] ; /* 0x0000090404107981 */
/* 0x0000e8000c1e1100 */
/*0340*/ LDG.E.U8 R19, [R2.64+0x9] ; /* 0x0000090402137981 */
/* 0x0002e2000c1e1100 */
/*0350*/ IMAD R24, R18, R21, R24 ; /* 0x0000001512187224 */
/* 0x010fc600078e0218 */
/*0360*/ LDG.E.U8 R18, [R4.64+0xa] ; /* 0x00000a0404127981 */
/* 0x000128000c1e1100 */
/*0370*/ LDG.E.U8 R21, [R2.64+0xa] ; /* 0x00000a0402157981 */
/* 0x000322000c1e1100 */
/*0380*/ IMAD R24, R23, R20, R24 ; /* 0x0000001417187224 */
/* 0x020fc600078e0218 */
/*0390*/ LDG.E.U8 R20, [R4.64+0xb] ; /* 0x00000b0404147981 */
/* 0x000168000c1e1100 */
/*03a0*/ LDG.E.U8 R23, [R2.64+0xb] ; /* 0x00000b0402177981 */
/* 0x000362000c1e1100 */
/*03b0*/ IMAD R24, R22, R25, R24 ; /* 0x0000001916187224 */
/* 0x000fc600078e0218 */
/*03c0*/ LDG.E.U8 R22, [R4.64+0xc] ; /* 0x00000c0404167981 */
/* 0x000168000c1e1100 */
/*03d0*/ LDG.E.U8 R25, [R2.64+0xc] ; /* 0x00000c0402197981 */
/* 0x000362000c1e1100 */
/*03e0*/ IMAD R24, R8, R11, R24 ; /* 0x0000000b08187224 */
/* 0x000fc600078e0218 */
/*03f0*/ LDG.E.U8 R8, [R4.64+0xd] ; /* 0x00000d0404087981 */
/* 0x000168000c1e1100 */
/*0400*/ LDG.E.U8 R11, [R2.64+0xd] ; /* 0x00000d04020b7981 */
/* 0x000362000c1e1100 */
/*0410*/ IMAD R24, R10, R13, R24 ; /* 0x0000000d0a187224 */
/* 0x000fc600078e0218 */
/*0420*/ LDG.E.U8 R10, [R4.64+0xe] ; /* 0x00000e04040a7981 */
/* 0x000168000c1e1100 */
/*0430*/ LDG.E.U8 R13, [R2.64+0xe] ; /* 0x00000e04020d7981 */
/* 0x000362000c1e1100 */
/*0440*/ IMAD R24, R12, R15, R24 ; /* 0x0000000f0c187224 */
/* 0x000fc600078e0218 */
/*0450*/ LDG.E.U8 R12, [R4.64+0xf] ; /* 0x00000f04040c7981 */
/* 0x000168000c1e1100 */
/*0460*/ LDG.E.U8 R15, [R2.64+0xf] ; /* 0x00000f04020f7981 */
/* 0x000362000c1e1100 */
/*0470*/ IADD3 R7, R7, -0x10, RZ ; /* 0xfffffff007077810 */
/* 0x000fe40007ffe0ff */
/*0480*/ IADD3 R9, R9, 0x10, RZ ; /* 0x0000001009097810 */
/* 0x000fe40007ffe0ff */
/*0490*/ ISETP.GT.AND P1, PT, R7, 0xc, PT ; /* 0x0000000c0700780c */
/* 0x000fe40003f24270 */
/*04a0*/ IADD3 R4, P2, R4, 0x10, RZ ; /* 0x0000001004047810 */
/* 0x001fc40007f5e0ff */
/*04b0*/ IADD3 R2, P3, R2, 0x10, RZ ; /* 0x0000001002027810 */
/* 0x002fc60007f7e0ff */
/*04c0*/ IMAD.X R5, RZ, RZ, R5, P2 ; /* 0x000000ffff057224 */
/* 0x000fe400010e0605 */
/*04d0*/ IMAD.X R3, RZ, RZ, R3, P3 ; /* 0x000000ffff037224 */
/* 0x000fe400018e0603 */
/*04e0*/ IMAD R14, R14, R17, R24 ; /* 0x000000110e0e7224 */
/* 0x004fc800078e0218 */
/*04f0*/ IMAD R14, R16, R19, R14 ; /* 0x00000013100e7224 */
/* 0x008fc800078e020e */
/*0500*/ IMAD R14, R18, R21, R14 ; /* 0x00000015120e7224 */
/* 0x010fc800078e020e */
/*0510*/ IMAD R14, R20, R23, R14 ; /* 0x00000017140e7224 */
/* 0x020fc800078e020e */
/*0520*/ IMAD R14, R22, R25, R14 ; /* 0x00000019160e7224 */
/* 0x000fc800078e020e */
/*0530*/ IMAD R8, R8, R11, R14 ; /* 0x0000000b08087224 */
/* 0x000fc800078e020e */
/*0540*/ IMAD R8, R10, R13, R8 ; /* 0x0000000d0a087224 */
/* 0x000fc800078e0208 */
/*0550*/ IMAD R8, R12, R15, R8 ; /* 0x0000000f0c087224 */
/* 0x000fca00078e0208 */
/*0560*/ PRMT R14, R8, 0x7610, R14 ; /* 0x00007610080e7816 */
/* 0x000fe2000000000e */
/*0570*/ @P1 BRA 0x1f0 ; /* 0xfffffc7000001947 */
/* 0x000fea000383ffff */
/*0580*/ ISETP.GT.AND P1, PT, R7, 0x4, PT ; /* 0x000000040700780c */
/* 0x000fda0003f24270 */
/*0590*/ @!P1 BRA 0x7a0 ; /* 0x0000020000009947 */
/* 0x000fea0003800000 */
/*05a0*/ LDG.E.U8 R17, [R4.64] ; /* 0x0000000404117981 */
/* 0x0000a8000c1e1100 */
/*05b0*/ LDG.E.U8 R16, [R2.64] ; /* 0x0000000402107981 */
/* 0x0002a8000c1e1100 */
/*05c0*/ LDG.E.U8 R19, [R4.64+0x1] ; /* 0x0000010404137981 */
/* 0x0000e8000c1e1100 */
/*05d0*/ LDG.E.U8 R18, [R2.64+0x1] ; /* 0x0000010402127981 */
/* 0x0002e8000c1e1100 */
/*05e0*/ LDG.E.U8 R21, [R4.64+0x2] ; /* 0x0000020404157981 */
/* 0x000128000c1e1100 */
/*05f0*/ LDG.E.U8 R20, [R2.64+0x2] ; /* 0x0000020402147981 */
/* 0x000328000c1e1100 */
/*0600*/ LDG.E.U8 R23, [R4.64+0x3] ; /* 0x0000030404177981 */
/* 0x000168000c1e1100 */
/*0610*/ LDG.E.U8 R22, [R2.64+0x3] ; /* 0x0000030402167981 */
/* 0x000368000c1e1100 */
/*0620*/ LDG.E.U8 R25, [R4.64+0x4] ; /* 0x0000040404197981 */
/* 0x000168000c1e1100 */
/*0630*/ LDG.E.U8 R24, [R2.64+0x4] ; /* 0x0000040402187981 */
/* 0x000368000c1e1100 */
/*0640*/ LDG.E.U8 R12, [R4.64+0x5] ; /* 0x00000504040c7981 */
/* 0x000168000c1e1100 */
/*0650*/ LDG.E.U8 R15, [R2.64+0x5] ; /* 0x00000504020f7981 */
/* 0x000368000c1e1100 */
/*0660*/ LDG.E.U8 R10, [R4.64+0x6] ; /* 0x00000604040a7981 */
/* 0x000168000c1e1100 */
/*0670*/ LDG.E.U8 R13, [R2.64+0x6] ; /* 0x00000604020d7981 */
/* 0x000368000c1e1100 */
/*0680*/ LDG.E.U8 R8, [R4.64+0x7] ; /* 0x0000070404087981 */
/* 0x000168000c1e1100 */
/*0690*/ LDG.E.U8 R11, [R2.64+0x7] ; /* 0x00000704020b7981 */
/* 0x000362000c1e1100 */
/*06a0*/ PLOP3.LUT P0, PT, PT, PT, PT, 0x8, 0x0 ; /* 0x000000000000781c */
/* 0x000fc40003f0e170 */
/*06b0*/ IADD3 R9, R9, 0x8, RZ ; /* 0x0000000809097810 */
/* 0x000fe40007ffe0ff */
/*06c0*/ IADD3 R7, R7, -0x8, RZ ; /* 0xfffffff807077810 */
/* 0x000fe40007ffe0ff */
/*06d0*/ IADD3 R4, P1, R4, 0x8, RZ ; /* 0x0000000804047810 */
/* 0x001fe40007f3e0ff */
/*06e0*/ IADD3 R2, P2, R2, 0x8, RZ ; /* 0x0000000802027810 */
/* 0x002fe40007f5e0ff */
/*06f0*/ IADD3.X R5, RZ, R5, RZ, P1, !PT ; /* 0x00000005ff057210 */
/* 0x000fc60000ffe4ff */
/*0700*/ IMAD.X R3, RZ, RZ, R3, P2 ; /* 0x000000ffff037224 */
/* 0x000fe400010e0603 */
/*0710*/ IMAD R16, R17, R16, R14 ; /* 0x0000001011107224 */
/* 0x004fc800078e020e */
/*0720*/ IMAD R16, R19, R18, R16 ; /* 0x0000001213107224 */
/* 0x008fc800078e0210 */
/*0730*/ IMAD R16, R21, R20, R16 ; /* 0x0000001415107224 */
/* 0x010fc800078e0210 */
/*0740*/ IMAD R16, R23, R22, R16 ; /* 0x0000001617107224 */
/* 0x020fc800078e0210 */
/*0750*/ IMAD R16, R25, R24, R16 ; /* 0x0000001819107224 */
/* 0x000fc800078e0210 */
/*0760*/ IMAD R12, R12, R15, R16 ; /* 0x0000000f0c0c7224 */
/* 0x000fc800078e0210 */
/*0770*/ IMAD R10, R10, R13, R12 ; /* 0x0000000d0a0a7224 */
/* 0x000fc800078e020c */
/*0780*/ IMAD R8, R8, R11, R10 ; /* 0x0000000b08087224 */
/* 0x000fca00078e020a */
/*0790*/ PRMT R14, R8, 0x7610, R14 ; /* 0x00007610080e7816 */
/* 0x000fe4000000000e */
/*07a0*/ ISETP.NE.OR P0, PT, R7, RZ, P0 ; /* 0x000000ff0700720c */
/* 0x000fda0000705670 */
/*07b0*/ @!P0 BRA 0x950 ; /* 0x0000019000008947 */
/* 0x000fea0003800000 */
/*07c0*/ LDG.E.U8 R11, [R4.64] ; /* 0x00000004040b7981 */
/* 0x000ea8000c1e1100 */
/*07d0*/ LDG.E.U8 R8, [R2.64] ; /* 0x0000000402087981 */
/* 0x000ea8000c1e1100 */
/*07e0*/ LDG.E.U8 R13, [R4.64+0x1] ; /* 0x00000104040d7981 */
/* 0x000ee8000c1e1100 */
/*07f0*/ LDG.E.U8 R10, [R2.64+0x1] ; /* 0x00000104020a7981 */
/* 0x000ee8000c1e1100 */
/*0800*/ LDG.E.U8 R15, [R4.64+0x2] ; /* 0x00000204040f7981 */
/* 0x000f28000c1e1100 */
/*0810*/ LDG.E.U8 R12, [R2.64+0x2] ; /* 0x00000204020c7981 */
/* 0x000f28000c1e1100 */
/*0820*/ LDG.E.U8 R17, [R4.64+0x3] ; /* 0x0000030404117981 */
/* 0x000168000c1e1100 */
/*0830*/ LDG.E.U8 R16, [R2.64+0x3] ; /* 0x0000030402107981 */
/* 0x000362000c1e1100 */
/*0840*/ IADD3 R7, R7, -0x4, RZ ; /* 0xfffffffc07077810 */
/* 0x000fc40007ffe0ff */
/*0850*/ IADD3 R9, R9, 0x4, RZ ; /* 0x0000000409097810 */
/* 0x000fe40007ffe0ff */
/*0860*/ ISETP.NE.AND P0, PT, R7, RZ, PT ; /* 0x000000ff0700720c */
/* 0x000fe20003f05270 */
/*0870*/ IMAD R8, R11, R8, R14 ; /* 0x000000080b087224 */
/* 0x004fc800078e020e */
/*0880*/ IMAD R8, R13, R10, R8 ; /* 0x0000000a0d087224 */
/* 0x008fe200078e0208 */
/*0890*/ IADD3 R10, P2, R2, 0x4, RZ ; /* 0x00000004020a7810 */
/* 0x000fca0007f5e0ff */
/*08a0*/ IMAD.X R11, RZ, RZ, R3, P2 ; /* 0x000000ffff0b7224 */
/* 0x000fe400010e0603 */
/*08b0*/ IMAD R8, R15, R12, R8 ; /* 0x0000000c0f087224 */
/* 0x010fe200078e0208 */
/*08c0*/ IADD3 R12, P1, R4, 0x4, RZ ; /* 0x00000004040c7810 */
/* 0x000fe20007f3e0ff */
/*08d0*/ IMAD.MOV.U32 R2, RZ, RZ, R10 ; /* 0x000000ffff027224 */
/* 0x002fe400078e000a */
/*08e0*/ IMAD.MOV.U32 R3, RZ, RZ, R11 ; /* 0x000000ffff037224 */
/* 0x000fe200078e000b */
/*08f0*/ MOV R4, R12 ; /* 0x0000000c00047202 */
/* 0x001fe20000000f00 */
/*0900*/ IMAD.X R13, RZ, RZ, R5, P1 ; /* 0x000000ffff0d7224 */
/* 0x000fe400008e0605 */
/*0910*/ IMAD R8, R17, R16, R8 ; /* 0x0000001011087224 */
/* 0x020fc400078e0208 */
/*0920*/ IMAD.MOV.U32 R5, RZ, RZ, R13 ; /* 0x000000ffff057224 */
/* 0x000fc600078e000d */
/*0930*/ PRMT R14, R8, 0x7610, R14 ; /* 0x00007610080e7816 */
/* 0x000fe2000000000e */
/*0940*/ @P0 BRA 0x7c0 ; /* 0xfffffe7000000947 */
/* 0x000fea000383ffff */
/*0950*/ ISETP.NE.AND P0, PT, R6, RZ, PT ; /* 0x000000ff0600720c */
/* 0x000fda0003f05270 */
/*0960*/ @!P0 BRA 0xaa0 ; /* 0x0000013000008947 */
/* 0x000fea0003800000 */
/*0970*/ IMAD R2, R0, c[0x0][0x178], R9 ; /* 0x00005e0000027a24 */
/* 0x000fe200078e0209 */
/*0980*/ IADD3 R10, P0, R9, c[0x0][0x160], RZ ; /* 0x00005800090a7a10 */
/* 0x000fc80007f1e0ff */
/*0990*/ IADD3 R7, P1, R2.reuse, c[0x0][0x168], RZ ; /* 0x00005a0002077a10 */
/* 0x040fe40007f3e0ff */
/*09a0*/ LEA.HI.X.SX32 R11, R9, c[0x0][0x164], 0x1, P0 ; /* 0x00005900090b7a11 */
/* 0x000fe400000f0eff */
/*09b0*/ LEA.HI.X.SX32 R8, R2, c[0x0][0x16c], 0x1, P1 ; /* 0x00005b0002087a11 */
/* 0x000fca00008f0eff */
/*09c0*/ IMAD.MOV.U32 R3, RZ, RZ, R8 ; /* 0x000000ffff037224 */
/* 0x000fe200078e0008 */
/*09d0*/ MOV R2, R7 ; /* 0x0000000700027202 */
/* 0x000fe20000000f00 */
/*09e0*/ IMAD.MOV.U32 R4, RZ, RZ, R10 ; /* 0x000000ffff047224 */
/* 0x000fe400078e000a */
/*09f0*/ IMAD.MOV.U32 R5, RZ, RZ, R11 ; /* 0x000000ffff057224 */
/* 0x000fe400078e000b */
/*0a00*/ LDG.E.U8 R3, [R2.64] ; /* 0x0000000402037981 */
/* 0x000ea8000c1e1100 */
/*0a10*/ LDG.E.U8 R4, [R4.64] ; /* 0x0000000404047981 */
/* 0x000ea2000c1e1100 */
/*0a20*/ IADD3 R6, R6, -0x1, RZ ; /* 0xffffffff06067810 */
/* 0x000fc40007ffe0ff */
/*0a30*/ IADD3 R7, P2, R7, 0x1, RZ ; /* 0x0000000107077810 */
/* 0x000fe40007f5e0ff */
/*0a40*/ ISETP.NE.AND P0, PT, R6, RZ, PT ; /* 0x000000ff0600720c */
/* 0x000fe40003f05270 */
/*0a50*/ IADD3 R10, P1, R10, 0x1, RZ ; /* 0x000000010a0a7810 */
/* 0x000fe20007f3e0ff */
/*0a60*/ IMAD.X R8, RZ, RZ, R8, P2 ; /* 0x000000ffff087224 */
/* 0x000fc600010e0608 */
/*0a70*/ IADD3.X R11, RZ, R11, RZ, P1, !PT ; /* 0x0000000bff0b7210 */
/* 0x000fe20000ffe4ff */
/*0a80*/ IMAD R14, R3, R4, R14 ; /* 0x00000004030e7224 */
/* 0x004fcc00078e020e */
/*0a90*/ @P0 BRA 0x9c0 ; /* 0xffffff2000000947 */
/* 0x000fea000383ffff */
/*0aa0*/ IADD3 R2, P0, R0, c[0x0][0x170], RZ ; /* 0x00005c0000027a10 */
/* 0x000fc80007f1e0ff */
/*0ab0*/ LEA.HI.X.SX32 R3, R0, c[0x0][0x174], 0x1, P0 ; /* 0x00005d0000037a11 */
/* 0x000fca00000f0eff */
/*0ac0*/ STG.E.U8 [R2.64], R14 ; /* 0x0000000e02007986 */
/* 0x000fe2000c101104 */
/*0ad0*/ EXIT ; /* 0x000000000000794d */
/* 0x000fea0003800000 */
/*0ae0*/ BRA 0xae0; /* 0xfffffff000007947 */
/* 0x000fc0000383ffff */
/*0af0*/ NOP; /* 0x0000000000007918 */
/* 0x000fc00000000000 */
/*0b00*/ NOP; /* 0x0000000000007918 */
/* 0x000fc00000000000 */
/*0b10*/ NOP; /* 0x0000000000007918 */
/* 0x000fc00000000000 */
/*0b20*/ NOP; /* 0x0000000000007918 */
/* 0x000fc00000000000 */
/*0b30*/ NOP; /* 0x0000000000007918 */
/* 0x000fc00000000000 */
/*0b40*/ NOP; /* 0x0000000000007918 */
/* 0x000fc00000000000 */
/*0b50*/ NOP; /* 0x0000000000007918 */
/* 0x000fc00000000000 */
/*0b60*/ NOP; /* 0x0000000000007918 */
/* 0x000fc00000000000 */
/*0b70*/ NOP; /* 0x0000000000007918 */
/* 0x000fc00000000000 */
.......... |
You are a helpful coding assistant specialized in converting CUDA source code to CUDA host assembly. | #include <stdio.h>
#include <time.h>
#include <stdlib.h>
#include <cuda_runtime.h>
__global__
void resolveWeight(int8_t *A,int8_t *B,int8_t *C, int n, int wx){
int k = blockIdx.x*blockDim.x+threadIdx.x;
int off = k * n;
int8_t temp = 0;
int b = 0;
if(k<wx){
for(int i=0;i<n;i++){
b = off+i;
temp+=A[i]*B[b];
}
C[k]=temp;
}
}
int main(){
FILE *fout = fopen("out.txt","w");
int T = 512;
int nodes,weightsX,weightsY;
for(int o = 1; o < 10000;o++){
if(o%1000 == 0){
printf("Starting run %d\n" ,o);
}
fprintf(fout,"%d",o);
nodes = o;
weightsX = o;
weightsY = o;
int8_t *node, *d_node, *weight, *d_weight,*out,*gout,*d_out;
node = (int8_t *)malloc(nodes*sizeof(int8_t));
weight = (int8_t *)malloc(weightsX*weightsY*sizeof(int8_t));
out = (int8_t *)malloc(weightsX*sizeof(int8_t));
gout = (int8_t *)malloc(weightsX*sizeof(int8_t));
srand(time(0));
//Set up matrix 1
for(int i = 0;i<nodes;i++){
node[i] = rand() % 3 - 1;
}
//Set up matrix 2
for(int i = 0;i<(weightsX*weightsY);i++){
weight[i] = rand() % 3 - 1;
}
//Set up matrices for results
for(int i = 0;i<weightsX;i++){
out[i] = 0;
gout[i] = 0;
}
unsigned int sstart = clock();
for(int i = 0; i<weightsX;i++){
for(int j = 0; j<weightsY;j++){
out[i]+=(node[j]*weight[(nodes*i)+j]);
}
}
//printf("Sequential time taken in ms %li\n" ,(clock() - sstart));
int seqtime = clock()-sstart;
fprintf(fout,",%d",seqtime);
//CUDA parallel code
cudaMalloc(&d_node,nodes*sizeof(int8_t));
cudaMalloc(&d_weight,weightsX*weightsY*sizeof(int8_t));
cudaMalloc(&d_out,weightsX*sizeof(int8_t));
cudaMemcpy(d_node,node,nodes*sizeof(int8_t),cudaMemcpyHostToDevice);
cudaMemcpy(d_weight,weight,weightsX*weightsY*sizeof(int8_t),cudaMemcpyHostToDevice);
cudaMemcpy(d_out,gout,weightsX*sizeof(int8_t),cudaMemcpyHostToDevice);
unsigned int pstart = clock();
resolveWeight<<<weightsX+(T-1)/T,T>>>(d_node,d_weight,d_out,nodes,weightsX);
cudaDeviceSynchronize();
//printf("Parallel time taken in ms %li\n" ,(clock() - pstart));
int partime = clock()-pstart;
fprintf(fout,",%d",partime);
cudaMemcpy(gout,d_out,weightsX*sizeof(int8_t),cudaMemcpyDeviceToHost);
// printf("Value at 3: %i\n",out[2]);
// printf("Value on gpu at 3: %i\n",gout[2]);
// printf("Value at 5120: %i\n",out[5119]);
// printf("Value on gpu at 5120: %i\n",gout[5119]);
// printf("Value at 10000: %i\n",out[9999]);
// printf("Value on gpu at 10000: %i\n",gout[9999]);
int err = 0;
for(int i = 0; i < weightsX; i++){
err += out[i]-gout[i];
}
// printf("Error with CUDA: %i\n",err);
fprintf(fout,",%d\n",err);
free(node);
free(weight);
free(out);
free(gout);
cudaDeviceReset();
}
fclose(fout);
} | .file "tmpxft_00143fb8_00000000-6_main.cudafe1.cpp"
.text
#APP
#NO_APP
.type _ZL26__cudaUnregisterBinaryUtilv, @function
_ZL26__cudaUnregisterBinaryUtilv:
.LFB2060:
.cfi_startproc
endbr64
subq $8, %rsp
.cfi_def_cfa_offset 16
movq _ZL20__cudaFatCubinHandle(%rip), %rdi
call __cudaUnregisterFatBinary@PLT
addq $8, %rsp
.cfi_def_cfa_offset 8
ret
.cfi_endproc
.LFE2060:
.size _ZL26__cudaUnregisterBinaryUtilv, .-_ZL26__cudaUnregisterBinaryUtilv
.globl _Z39__device_stub__Z13resolveWeightPaS_S_iiPaS_S_ii
.type _Z39__device_stub__Z13resolveWeightPaS_S_iiPaS_S_ii, @function
_Z39__device_stub__Z13resolveWeightPaS_S_iiPaS_S_ii:
.LFB2082:
.cfi_startproc
endbr64
subq $152, %rsp
.cfi_def_cfa_offset 160
movq %rdi, 24(%rsp)
movq %rsi, 16(%rsp)
movq %rdx, 8(%rsp)
movl %ecx, 4(%rsp)
movl %r8d, (%rsp)
movq %fs:40, %rax
movq %rax, 136(%rsp)
xorl %eax, %eax
leaq 24(%rsp), %rax
movq %rax, 96(%rsp)
leaq 16(%rsp), %rax
movq %rax, 104(%rsp)
leaq 8(%rsp), %rax
movq %rax, 112(%rsp)
leaq 4(%rsp), %rax
movq %rax, 120(%rsp)
movq %rsp, %rax
movq %rax, 128(%rsp)
movl $1, 48(%rsp)
movl $1, 52(%rsp)
movl $1, 56(%rsp)
movl $1, 60(%rsp)
movl $1, 64(%rsp)
movl $1, 68(%rsp)
leaq 40(%rsp), %rcx
leaq 32(%rsp), %rdx
leaq 60(%rsp), %rsi
leaq 48(%rsp), %rdi
call __cudaPopCallConfiguration@PLT
testl %eax, %eax
je .L7
.L3:
movq 136(%rsp), %rax
subq %fs:40, %rax
jne .L8
addq $152, %rsp
.cfi_remember_state
.cfi_def_cfa_offset 8
ret
.L7:
.cfi_restore_state
pushq 40(%rsp)
.cfi_def_cfa_offset 168
pushq 40(%rsp)
.cfi_def_cfa_offset 176
leaq 112(%rsp), %r9
movq 76(%rsp), %rcx
movl 84(%rsp), %r8d
movq 64(%rsp), %rsi
movl 72(%rsp), %edx
leaq _Z13resolveWeightPaS_S_ii(%rip), %rdi
call cudaLaunchKernel@PLT
addq $16, %rsp
.cfi_def_cfa_offset 160
jmp .L3
.L8:
call __stack_chk_fail@PLT
.cfi_endproc
.LFE2082:
.size _Z39__device_stub__Z13resolveWeightPaS_S_iiPaS_S_ii, .-_Z39__device_stub__Z13resolveWeightPaS_S_iiPaS_S_ii
.globl _Z13resolveWeightPaS_S_ii
.type _Z13resolveWeightPaS_S_ii, @function
_Z13resolveWeightPaS_S_ii:
.LFB2083:
.cfi_startproc
endbr64
subq $8, %rsp
.cfi_def_cfa_offset 16
call _Z39__device_stub__Z13resolveWeightPaS_S_iiPaS_S_ii
addq $8, %rsp
.cfi_def_cfa_offset 8
ret
.cfi_endproc
.LFE2083:
.size _Z13resolveWeightPaS_S_ii, .-_Z13resolveWeightPaS_S_ii
.section .rodata.str1.1,"aMS",@progbits,1
.LC0:
.string "w"
.LC1:
.string "out.txt"
.LC2:
.string "Starting run %d\n"
.LC3:
.string "%d"
.LC4:
.string ",%d"
.LC5:
.string ",%d\n"
.text
.globl main
.type main, @function
main:
.LFB2057:
.cfi_startproc
endbr64
pushq %r15
.cfi_def_cfa_offset 16
.cfi_offset 15, -16
pushq %r14
.cfi_def_cfa_offset 24
.cfi_offset 14, -24
pushq %r13
.cfi_def_cfa_offset 32
.cfi_offset 13, -32
pushq %r12
.cfi_def_cfa_offset 40
.cfi_offset 12, -40
pushq %rbp
.cfi_def_cfa_offset 48
.cfi_offset 6, -48
pushq %rbx
.cfi_def_cfa_offset 56
.cfi_offset 3, -56
subq $120, %rsp
.cfi_def_cfa_offset 176
movq %fs:40, %rax
movq %rax, 104(%rsp)
xorl %eax, %eax
leaq .LC0(%rip), %rsi
leaq .LC1(%rip), %rdi
call fopen@PLT
movq %rax, 16(%rsp)
movl $1, %r14d
jmp .L26
.L41:
movl %r14d, %edx
leaq .LC2(%rip), %rsi
movl $2, %edi
movl $0, %eax
call __printf_chk@PLT
jmp .L12
.L22:
call cudaDeviceSynchronize@PLT
call clock@PLT
movl %eax, %ecx
subl %ebp, %ecx
leaq .LC4(%rip), %rdx
movl $2, %esi
movq 16(%rsp), %rdi
movl $0, %eax
call __fprintf_chk@PLT
movl $2, %ecx
movq %r14, %rdx
movq 72(%rsp), %rsi
movq %r12, %rdi
call cudaMemcpy@PLT
cmpl $0, 32(%rsp)
jle .L23
movl $0, %eax
movl $0, %ecx
.L24:
movsbl 0(%r13,%rax), %edx
movsbl (%r12,%rax), %esi
subl %esi, %edx
addl %edx, %ecx
addq $1, %rax
cmpq %r14, %rax
jne .L24
leaq .LC5(%rip), %rdx
movl $2, %esi
movq 16(%rsp), %rdi
movl $0, %eax
call __fprintf_chk@PLT
movq %rbx, %rdi
call free@PLT
movq 8(%rsp), %rdi
call free@PLT
movq %r13, %rdi
call free@PLT
movq %r12, %rdi
call free@PLT
call cudaDeviceReset@PLT
addq $1, %r14
cmpq $10000, %r14
je .L40
.L26:
movl %r14d, 44(%rsp)
movl %r14d, 36(%rsp)
movslq %r14d, %rax
imulq $274877907, %rax, %rax
sarq $38, %rax
movl %r14d, %edx
sarl $31, %edx
subl %edx, %eax
imull $1000, %eax, %eax
cmpl %r14d, %eax
je .L41
.L12:
movl 36(%rsp), %r15d
movl %r15d, %ecx
leaq .LC3(%rip), %rdx
movl $2, %esi
movq 16(%rsp), %rdi
movl $0, %eax
call __fprintf_chk@PLT
movq %r14, %rdi
call malloc@PLT
movq %rax, %rbx
movl %r15d, %eax
imull %r15d, %eax
movl %eax, 40(%rsp)
cltq
movq %rax, 24(%rsp)
movq %rax, %rdi
call malloc@PLT
movq %rax, 8(%rsp)
movq %r14, %rdi
call malloc@PLT
movq %rax, %r13
movq %r14, %rdi
call malloc@PLT
movq %rax, %r12
movl $0, %edi
call time@PLT
movl %eax, %edi
call srand@PLT
movl %r14d, 32(%rsp)
testl %r14d, %r14d
jle .L13
movq %rbx, %rbp
leaq (%rbx,%r14), %r15
.L14:
call rand@PLT
movslq %eax, %rdx
imulq $1431655766, %rdx, %rdx
shrq $32, %rdx
movl %eax, %ecx
sarl $31, %ecx
subl %ecx, %edx
leal (%rdx,%rdx,2), %edx
subl %edx, %eax
subl $1, %eax
movb %al, 0(%rbp)
addq $1, %rbp
cmpq %r15, %rbp
jne .L14
cmpl $0, 40(%rsp)
jle .L29
.L28:
movq 8(%rsp), %rax
movq %rax, %rbp
movq 24(%rsp), %rdi
leaq (%rdi,%rax), %r15
.L16:
call rand@PLT
movslq %eax, %rdx
imulq $1431655766, %rdx, %rdx
shrq $32, %rdx
movl %eax, %ecx
sarl $31, %ecx
subl %ecx, %edx
leal (%rdx,%rdx,2), %edx
subl %edx, %eax
subl $1, %eax
movb %al, 0(%rbp)
addq $1, %rbp
cmpq %r15, %rbp
jne .L16
cmpl $0, 32(%rsp)
jle .L17
.L29:
movl $0, %eax
.L18:
movb $0, 0(%r13,%rax)
movb $0, (%r12,%rax)
addq $1, %rax
cmpq %r14, %rax
jne .L18
call clock@PLT
movl %eax, %ebp
movq %r13, %rdi
movq 8(%rsp), %rsi
leaq 0(%r13,%r14), %r9
.L19:
movq %rdi, %r8
movzbl (%rdi), %ecx
movl $0, %edx
.L20:
movzbl (%rbx,%rdx), %eax
mulb (%rsi,%rdx)
addl %eax, %ecx
addq $1, %rdx
cmpq %r14, %rdx
jne .L20
movb %cl, (%r8)
addq $1, %rdi
addq %r14, %rsi
cmpq %r9, %rdi
jne .L19
.L21:
call clock@PLT
movl %eax, %ecx
subl %ebp, %ecx
leaq .LC4(%rip), %rdx
movl $2, %esi
movq 16(%rsp), %rdi
movl $0, %eax
call __fprintf_chk@PLT
leaq 56(%rsp), %rdi
movq %r14, %rsi
call cudaMalloc@PLT
leaq 64(%rsp), %rdi
movq 24(%rsp), %r15
movq %r15, %rsi
call cudaMalloc@PLT
leaq 72(%rsp), %rdi
movq %r14, %rsi
call cudaMalloc@PLT
movl $1, %ecx
movq %r14, %rdx
movq %rbx, %rsi
movq 56(%rsp), %rdi
call cudaMemcpy@PLT
movl $1, %ecx
movq %r15, %rdx
movq 8(%rsp), %rsi
movq 64(%rsp), %rdi
call cudaMemcpy@PLT
movl $1, %ecx
movq %r14, %rdx
movq %r12, %rsi
movq 72(%rsp), %rdi
call cudaMemcpy@PLT
call clock@PLT
movq %rax, %rbp
movl $512, 92(%rsp)
movl $1, 96(%rsp)
movl 44(%rsp), %eax
movl %eax, 80(%rsp)
movl $1, 84(%rsp)
movl $0, %r9d
movl $0, %r8d
movq 92(%rsp), %rdx
movl $1, %ecx
movq 80(%rsp), %rdi
movl $1, %esi
call __cudaPushCallConfiguration@PLT
testl %eax, %eax
jne .L22
movl 36(%rsp), %ecx
movl %ecx, %r8d
movq 72(%rsp), %rdx
movq 64(%rsp), %rsi
movq 56(%rsp), %rdi
call _Z39__device_stub__Z13resolveWeightPaS_S_iiPaS_S_ii
jmp .L22
.L40:
movq 16(%rsp), %rdi
call fclose@PLT
movq 104(%rsp), %rax
subq %fs:40, %rax
jne .L42
movl $0, %eax
addq $120, %rsp
.cfi_remember_state
.cfi_def_cfa_offset 56
popq %rbx
.cfi_def_cfa_offset 48
popq %rbp
.cfi_def_cfa_offset 40
popq %r12
.cfi_def_cfa_offset 32
popq %r13
.cfi_def_cfa_offset 24
popq %r14
.cfi_def_cfa_offset 16
popq %r15
.cfi_def_cfa_offset 8
ret
.L23:
.cfi_restore_state
movl $0, %ecx
leaq .LC5(%rip), %rdx
movl $2, %esi
movq 16(%rsp), %rdi
movl $0, %eax
call __fprintf_chk@PLT
movq %rbx, %rdi
call free@PLT
movq 8(%rsp), %rdi
call free@PLT
movq %r13, %rdi
call free@PLT
movq %r12, %rdi
call free@PLT
call cudaDeviceReset@PLT
addq $1, %r14
jmp .L26
.L13:
cmpl $0, 40(%rsp)
jg .L28
.L17:
call clock@PLT
movl %eax, %ebp
jmp .L21
.L42:
call __stack_chk_fail@PLT
.cfi_endproc
.LFE2057:
.size main, .-main
.section .rodata.str1.1
.LC6:
.string "_Z13resolveWeightPaS_S_ii"
.text
.type _ZL24__sti____cudaRegisterAllv, @function
_ZL24__sti____cudaRegisterAllv:
.LFB2085:
.cfi_startproc
endbr64
subq $8, %rsp
.cfi_def_cfa_offset 16
leaq _ZL15__fatDeviceText(%rip), %rdi
call __cudaRegisterFatBinary@PLT
movq %rax, %rdi
movq %rax, _ZL20__cudaFatCubinHandle(%rip)
pushq $0
.cfi_def_cfa_offset 24
pushq $0
.cfi_def_cfa_offset 32
pushq $0
.cfi_def_cfa_offset 40
pushq $0
.cfi_def_cfa_offset 48
movl $0, %r9d
movl $-1, %r8d
leaq .LC6(%rip), %rdx
movq %rdx, %rcx
leaq _Z13resolveWeightPaS_S_ii(%rip), %rsi
call __cudaRegisterFunction@PLT
addq $32, %rsp
.cfi_def_cfa_offset 16
movq _ZL20__cudaFatCubinHandle(%rip), %rdi
call __cudaRegisterFatBinaryEnd@PLT
leaq _ZL26__cudaUnregisterBinaryUtilv(%rip), %rdi
call atexit@PLT
addq $8, %rsp
.cfi_def_cfa_offset 8
ret
.cfi_endproc
.LFE2085:
.size _ZL24__sti____cudaRegisterAllv, .-_ZL24__sti____cudaRegisterAllv
.section .init_array,"aw"
.align 8
.quad _ZL24__sti____cudaRegisterAllv
.section .nvFatBinSegment,"aw"
.align 8
.type _ZL15__fatDeviceText, @object
.size _ZL15__fatDeviceText, 24
_ZL15__fatDeviceText:
.long 1180844977
.long 1
.quad fatbinData
.quad 0
.local _ZL20__cudaFatCubinHandle
.comm _ZL20__cudaFatCubinHandle,8,8
.ident "GCC: (Ubuntu 13.3.0-6ubuntu2~24.04) 13.3.0"
.section .note.GNU-stack,"",@progbits
.section .note.gnu.property,"a"
.align 8
.long 1f - 0f
.long 4f - 1f
.long 5
0:
.string "GNU"
1:
.align 8
.long 0xc0000002
.long 3f - 2f
2:
.long 0x3
3:
.align 8
4: |
You are a helpful coding assistant specialized in converting CUDA source code to HIP/AMD source code. | #include <stdio.h>
#include <time.h>
#include <stdlib.h>
#include <cuda_runtime.h>
__global__
void resolveWeight(int8_t *A,int8_t *B,int8_t *C, int n, int wx){
int k = blockIdx.x*blockDim.x+threadIdx.x;
int off = k * n;
int8_t temp = 0;
int b = 0;
if(k<wx){
for(int i=0;i<n;i++){
b = off+i;
temp+=A[i]*B[b];
}
C[k]=temp;
}
}
int main(){
FILE *fout = fopen("out.txt","w");
int T = 512;
int nodes,weightsX,weightsY;
for(int o = 1; o < 10000;o++){
if(o%1000 == 0){
printf("Starting run %d\n" ,o);
}
fprintf(fout,"%d",o);
nodes = o;
weightsX = o;
weightsY = o;
int8_t *node, *d_node, *weight, *d_weight,*out,*gout,*d_out;
node = (int8_t *)malloc(nodes*sizeof(int8_t));
weight = (int8_t *)malloc(weightsX*weightsY*sizeof(int8_t));
out = (int8_t *)malloc(weightsX*sizeof(int8_t));
gout = (int8_t *)malloc(weightsX*sizeof(int8_t));
srand(time(0));
//Set up matrix 1
for(int i = 0;i<nodes;i++){
node[i] = rand() % 3 - 1;
}
//Set up matrix 2
for(int i = 0;i<(weightsX*weightsY);i++){
weight[i] = rand() % 3 - 1;
}
//Set up matrices for results
for(int i = 0;i<weightsX;i++){
out[i] = 0;
gout[i] = 0;
}
unsigned int sstart = clock();
for(int i = 0; i<weightsX;i++){
for(int j = 0; j<weightsY;j++){
out[i]+=(node[j]*weight[(nodes*i)+j]);
}
}
//printf("Sequential time taken in ms %li\n" ,(clock() - sstart));
int seqtime = clock()-sstart;
fprintf(fout,",%d",seqtime);
//CUDA parallel code
cudaMalloc(&d_node,nodes*sizeof(int8_t));
cudaMalloc(&d_weight,weightsX*weightsY*sizeof(int8_t));
cudaMalloc(&d_out,weightsX*sizeof(int8_t));
cudaMemcpy(d_node,node,nodes*sizeof(int8_t),cudaMemcpyHostToDevice);
cudaMemcpy(d_weight,weight,weightsX*weightsY*sizeof(int8_t),cudaMemcpyHostToDevice);
cudaMemcpy(d_out,gout,weightsX*sizeof(int8_t),cudaMemcpyHostToDevice);
unsigned int pstart = clock();
resolveWeight<<<weightsX+(T-1)/T,T>>>(d_node,d_weight,d_out,nodes,weightsX);
cudaDeviceSynchronize();
//printf("Parallel time taken in ms %li\n" ,(clock() - pstart));
int partime = clock()-pstart;
fprintf(fout,",%d",partime);
cudaMemcpy(gout,d_out,weightsX*sizeof(int8_t),cudaMemcpyDeviceToHost);
// printf("Value at 3: %i\n",out[2]);
// printf("Value on gpu at 3: %i\n",gout[2]);
// printf("Value at 5120: %i\n",out[5119]);
// printf("Value on gpu at 5120: %i\n",gout[5119]);
// printf("Value at 10000: %i\n",out[9999]);
// printf("Value on gpu at 10000: %i\n",gout[9999]);
int err = 0;
for(int i = 0; i < weightsX; i++){
err += out[i]-gout[i];
}
// printf("Error with CUDA: %i\n",err);
fprintf(fout,",%d\n",err);
free(node);
free(weight);
free(out);
free(gout);
cudaDeviceReset();
}
fclose(fout);
} | #include <stdio.h>
#include <time.h>
#include <stdlib.h>
#include <hip/hip_runtime.h>
__global__
void resolveWeight(int8_t *A,int8_t *B,int8_t *C, int n, int wx){
int k = blockIdx.x*blockDim.x+threadIdx.x;
int off = k * n;
int8_t temp = 0;
int b = 0;
if(k<wx){
for(int i=0;i<n;i++){
b = off+i;
temp+=A[i]*B[b];
}
C[k]=temp;
}
}
int main(){
FILE *fout = fopen("out.txt","w");
int T = 512;
int nodes,weightsX,weightsY;
for(int o = 1; o < 10000;o++){
if(o%1000 == 0){
printf("Starting run %d\n" ,o);
}
fprintf(fout,"%d",o);
nodes = o;
weightsX = o;
weightsY = o;
int8_t *node, *d_node, *weight, *d_weight,*out,*gout,*d_out;
node = (int8_t *)malloc(nodes*sizeof(int8_t));
weight = (int8_t *)malloc(weightsX*weightsY*sizeof(int8_t));
out = (int8_t *)malloc(weightsX*sizeof(int8_t));
gout = (int8_t *)malloc(weightsX*sizeof(int8_t));
srand(time(0));
//Set up matrix 1
for(int i = 0;i<nodes;i++){
node[i] = rand() % 3 - 1;
}
//Set up matrix 2
for(int i = 0;i<(weightsX*weightsY);i++){
weight[i] = rand() % 3 - 1;
}
//Set up matrices for results
for(int i = 0;i<weightsX;i++){
out[i] = 0;
gout[i] = 0;
}
unsigned int sstart = clock();
for(int i = 0; i<weightsX;i++){
for(int j = 0; j<weightsY;j++){
out[i]+=(node[j]*weight[(nodes*i)+j]);
}
}
//printf("Sequential time taken in ms %li\n" ,(clock() - sstart));
int seqtime = clock()-sstart;
fprintf(fout,",%d",seqtime);
//CUDA parallel code
hipMalloc(&d_node,nodes*sizeof(int8_t));
hipMalloc(&d_weight,weightsX*weightsY*sizeof(int8_t));
hipMalloc(&d_out,weightsX*sizeof(int8_t));
hipMemcpy(d_node,node,nodes*sizeof(int8_t),hipMemcpyHostToDevice);
hipMemcpy(d_weight,weight,weightsX*weightsY*sizeof(int8_t),hipMemcpyHostToDevice);
hipMemcpy(d_out,gout,weightsX*sizeof(int8_t),hipMemcpyHostToDevice);
unsigned int pstart = clock();
resolveWeight<<<weightsX+(T-1)/T,T>>>(d_node,d_weight,d_out,nodes,weightsX);
hipDeviceSynchronize();
//printf("Parallel time taken in ms %li\n" ,(clock() - pstart));
int partime = clock()-pstart;
fprintf(fout,",%d",partime);
hipMemcpy(gout,d_out,weightsX*sizeof(int8_t),hipMemcpyDeviceToHost);
// printf("Value at 3: %i\n",out[2]);
// printf("Value on gpu at 3: %i\n",gout[2]);
// printf("Value at 5120: %i\n",out[5119]);
// printf("Value on gpu at 5120: %i\n",gout[5119]);
// printf("Value at 10000: %i\n",out[9999]);
// printf("Value on gpu at 10000: %i\n",gout[9999]);
int err = 0;
for(int i = 0; i < weightsX; i++){
err += out[i]-gout[i];
}
// printf("Error with CUDA: %i\n",err);
fprintf(fout,",%d\n",err);
free(node);
free(weight);
free(out);
free(gout);
hipDeviceReset();
}
fclose(fout);
} |
You are a helpful coding assistant specialized in converting HIP source code to AMD device assembly. | #include <stdio.h>
#include <time.h>
#include <stdlib.h>
#include <hip/hip_runtime.h>
__global__
void resolveWeight(int8_t *A,int8_t *B,int8_t *C, int n, int wx){
int k = blockIdx.x*blockDim.x+threadIdx.x;
int off = k * n;
int8_t temp = 0;
int b = 0;
if(k<wx){
for(int i=0;i<n;i++){
b = off+i;
temp+=A[i]*B[b];
}
C[k]=temp;
}
}
int main(){
FILE *fout = fopen("out.txt","w");
int T = 512;
int nodes,weightsX,weightsY;
for(int o = 1; o < 10000;o++){
if(o%1000 == 0){
printf("Starting run %d\n" ,o);
}
fprintf(fout,"%d",o);
nodes = o;
weightsX = o;
weightsY = o;
int8_t *node, *d_node, *weight, *d_weight,*out,*gout,*d_out;
node = (int8_t *)malloc(nodes*sizeof(int8_t));
weight = (int8_t *)malloc(weightsX*weightsY*sizeof(int8_t));
out = (int8_t *)malloc(weightsX*sizeof(int8_t));
gout = (int8_t *)malloc(weightsX*sizeof(int8_t));
srand(time(0));
//Set up matrix 1
for(int i = 0;i<nodes;i++){
node[i] = rand() % 3 - 1;
}
//Set up matrix 2
for(int i = 0;i<(weightsX*weightsY);i++){
weight[i] = rand() % 3 - 1;
}
//Set up matrices for results
for(int i = 0;i<weightsX;i++){
out[i] = 0;
gout[i] = 0;
}
unsigned int sstart = clock();
for(int i = 0; i<weightsX;i++){
for(int j = 0; j<weightsY;j++){
out[i]+=(node[j]*weight[(nodes*i)+j]);
}
}
//printf("Sequential time taken in ms %li\n" ,(clock() - sstart));
int seqtime = clock()-sstart;
fprintf(fout,",%d",seqtime);
//CUDA parallel code
hipMalloc(&d_node,nodes*sizeof(int8_t));
hipMalloc(&d_weight,weightsX*weightsY*sizeof(int8_t));
hipMalloc(&d_out,weightsX*sizeof(int8_t));
hipMemcpy(d_node,node,nodes*sizeof(int8_t),hipMemcpyHostToDevice);
hipMemcpy(d_weight,weight,weightsX*weightsY*sizeof(int8_t),hipMemcpyHostToDevice);
hipMemcpy(d_out,gout,weightsX*sizeof(int8_t),hipMemcpyHostToDevice);
unsigned int pstart = clock();
resolveWeight<<<weightsX+(T-1)/T,T>>>(d_node,d_weight,d_out,nodes,weightsX);
hipDeviceSynchronize();
//printf("Parallel time taken in ms %li\n" ,(clock() - pstart));
int partime = clock()-pstart;
fprintf(fout,",%d",partime);
hipMemcpy(gout,d_out,weightsX*sizeof(int8_t),hipMemcpyDeviceToHost);
// printf("Value at 3: %i\n",out[2]);
// printf("Value on gpu at 3: %i\n",gout[2]);
// printf("Value at 5120: %i\n",out[5119]);
// printf("Value on gpu at 5120: %i\n",gout[5119]);
// printf("Value at 10000: %i\n",out[9999]);
// printf("Value on gpu at 10000: %i\n",gout[9999]);
int err = 0;
for(int i = 0; i < weightsX; i++){
err += out[i]-gout[i];
}
// printf("Error with CUDA: %i\n",err);
fprintf(fout,",%d\n",err);
free(node);
free(weight);
free(out);
free(gout);
hipDeviceReset();
}
fclose(fout);
} | .text
.amdgcn_target "amdgcn-amd-amdhsa--gfx1100"
.protected _Z13resolveWeightPaS_S_ii
.globl _Z13resolveWeightPaS_S_ii
.p2align 8
.type _Z13resolveWeightPaS_S_ii,@function
_Z13resolveWeightPaS_S_ii:
s_clause 0x1
s_load_b32 s2, s[0:1], 0x2c
s_load_b32 s3, s[0:1], 0x1c
s_waitcnt lgkmcnt(0)
s_and_b32 s2, s2, 0xffff
s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
v_mad_u64_u32 v[1:2], null, s15, s2, v[0:1]
s_mov_b32 s2, exec_lo
v_cmpx_gt_i32_e64 s3, v1
s_cbranch_execz .LBB0_6
s_load_b32 s2, s[0:1], 0x18
s_waitcnt lgkmcnt(0)
s_cmp_lt_i32 s2, 1
s_cbranch_scc1 .LBB0_4
s_load_b128 s[4:7], s[0:1], 0x0
v_mul_lo_u32 v0, v1, s2
v_mov_b32_e32 v4, 0
s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_2) | instid1(VALU_DEP_2)
v_ashrrev_i32_e32 v3, 31, v0
s_waitcnt lgkmcnt(0)
v_add_co_u32 v2, vcc_lo, s6, v0
v_add_co_ci_u32_e32 v3, vcc_lo, s7, v3, vcc_lo
v_mov_b32_e32 v0, 0
.LBB0_3:
global_load_u8 v5, v4, s[4:5]
global_load_u8 v6, v[2:3], off
v_add_co_u32 v2, vcc_lo, v2, 1
s_add_i32 s2, s2, -1
v_add_co_ci_u32_e32 v3, vcc_lo, 0, v3, vcc_lo
s_add_u32 s4, s4, 1
s_addc_u32 s5, s5, 0
s_cmp_eq_u32 s2, 0
s_waitcnt vmcnt(0)
v_mad_u16 v0, v6, v5, v0
s_cbranch_scc0 .LBB0_3
s_branch .LBB0_5
.LBB0_4:
v_mov_b32_e32 v0, 0
.LBB0_5:
s_load_b64 s[0:1], s[0:1], 0x10
v_ashrrev_i32_e32 v2, 31, v1
s_waitcnt lgkmcnt(0)
v_add_co_u32 v1, vcc_lo, s0, v1
s_delay_alu instid0(VALU_DEP_2)
v_add_co_ci_u32_e32 v2, vcc_lo, s1, v2, vcc_lo
global_store_b8 v[1:2], v0, off
.LBB0_6:
s_nop 0
s_sendmsg sendmsg(MSG_DEALLOC_VGPRS)
s_endpgm
.section .rodata,"a",@progbits
.p2align 6, 0x0
.amdhsa_kernel _Z13resolveWeightPaS_S_ii
.amdhsa_group_segment_fixed_size 0
.amdhsa_private_segment_fixed_size 0
.amdhsa_kernarg_size 288
.amdhsa_user_sgpr_count 15
.amdhsa_user_sgpr_dispatch_ptr 0
.amdhsa_user_sgpr_queue_ptr 0
.amdhsa_user_sgpr_kernarg_segment_ptr 1
.amdhsa_user_sgpr_dispatch_id 0
.amdhsa_user_sgpr_private_segment_size 0
.amdhsa_wavefront_size32 1
.amdhsa_uses_dynamic_stack 0
.amdhsa_enable_private_segment 0
.amdhsa_system_sgpr_workgroup_id_x 1
.amdhsa_system_sgpr_workgroup_id_y 0
.amdhsa_system_sgpr_workgroup_id_z 0
.amdhsa_system_sgpr_workgroup_info 0
.amdhsa_system_vgpr_workitem_id 0
.amdhsa_next_free_vgpr 7
.amdhsa_next_free_sgpr 16
.amdhsa_float_round_mode_32 0
.amdhsa_float_round_mode_16_64 0
.amdhsa_float_denorm_mode_32 3
.amdhsa_float_denorm_mode_16_64 3
.amdhsa_dx10_clamp 1
.amdhsa_ieee_mode 1
.amdhsa_fp16_overflow 0
.amdhsa_workgroup_processor_mode 1
.amdhsa_memory_ordered 1
.amdhsa_forward_progress 0
.amdhsa_shared_vgpr_count 0
.amdhsa_exception_fp_ieee_invalid_op 0
.amdhsa_exception_fp_denorm_src 0
.amdhsa_exception_fp_ieee_div_zero 0
.amdhsa_exception_fp_ieee_overflow 0
.amdhsa_exception_fp_ieee_underflow 0
.amdhsa_exception_fp_ieee_inexact 0
.amdhsa_exception_int_div_zero 0
.end_amdhsa_kernel
.text
.Lfunc_end0:
.size _Z13resolveWeightPaS_S_ii, .Lfunc_end0-_Z13resolveWeightPaS_S_ii
.section .AMDGPU.csdata,"",@progbits
.text
.p2alignl 7, 3214868480
.fill 96, 4, 3214868480
.type __hip_cuid_,@object
.section .bss,"aw",@nobits
.globl __hip_cuid_
__hip_cuid_:
.byte 0
.size __hip_cuid_, 1
.ident "AMD clang version 18.0.0git (https://github.com/RadeonOpenCompute/llvm-project roc-6.3.2 25012 e5bf7e55c91490b07c49d8960fa7983d864936c4)"
.section ".note.GNU-stack","",@progbits
.addrsig
.addrsig_sym __hip_cuid_
.amdgpu_metadata
---
amdhsa.kernels:
- .args:
- .address_space: global
.offset: 0
.size: 8
.value_kind: global_buffer
- .address_space: global
.offset: 8
.size: 8
.value_kind: global_buffer
- .address_space: global
.offset: 16
.size: 8
.value_kind: global_buffer
- .offset: 24
.size: 4
.value_kind: by_value
- .offset: 28
.size: 4
.value_kind: by_value
- .offset: 32
.size: 4
.value_kind: hidden_block_count_x
- .offset: 36
.size: 4
.value_kind: hidden_block_count_y
- .offset: 40
.size: 4
.value_kind: hidden_block_count_z
- .offset: 44
.size: 2
.value_kind: hidden_group_size_x
- .offset: 46
.size: 2
.value_kind: hidden_group_size_y
- .offset: 48
.size: 2
.value_kind: hidden_group_size_z
- .offset: 50
.size: 2
.value_kind: hidden_remainder_x
- .offset: 52
.size: 2
.value_kind: hidden_remainder_y
- .offset: 54
.size: 2
.value_kind: hidden_remainder_z
- .offset: 72
.size: 8
.value_kind: hidden_global_offset_x
- .offset: 80
.size: 8
.value_kind: hidden_global_offset_y
- .offset: 88
.size: 8
.value_kind: hidden_global_offset_z
- .offset: 96
.size: 2
.value_kind: hidden_grid_dims
.group_segment_fixed_size: 0
.kernarg_segment_align: 8
.kernarg_segment_size: 288
.language: OpenCL C
.language_version:
- 2
- 0
.max_flat_workgroup_size: 1024
.name: _Z13resolveWeightPaS_S_ii
.private_segment_fixed_size: 0
.sgpr_count: 18
.sgpr_spill_count: 0
.symbol: _Z13resolveWeightPaS_S_ii.kd
.uniform_work_group_size: 1
.uses_dynamic_stack: false
.vgpr_count: 7
.vgpr_spill_count: 0
.wavefront_size: 32
.workgroup_processor_mode: 1
amdhsa.target: amdgcn-amd-amdhsa--gfx1100
amdhsa.version:
- 1
- 2
...
.end_amdgpu_metadata |
You are a helpful coding assistant specialized in converting HIP source code to AMD host assembly. | #include <stdio.h>
#include <time.h>
#include <stdlib.h>
#include <hip/hip_runtime.h>
__global__
void resolveWeight(int8_t *A,int8_t *B,int8_t *C, int n, int wx){
int k = blockIdx.x*blockDim.x+threadIdx.x;
int off = k * n;
int8_t temp = 0;
int b = 0;
if(k<wx){
for(int i=0;i<n;i++){
b = off+i;
temp+=A[i]*B[b];
}
C[k]=temp;
}
}
int main(){
FILE *fout = fopen("out.txt","w");
int T = 512;
int nodes,weightsX,weightsY;
for(int o = 1; o < 10000;o++){
if(o%1000 == 0){
printf("Starting run %d\n" ,o);
}
fprintf(fout,"%d",o);
nodes = o;
weightsX = o;
weightsY = o;
int8_t *node, *d_node, *weight, *d_weight,*out,*gout,*d_out;
node = (int8_t *)malloc(nodes*sizeof(int8_t));
weight = (int8_t *)malloc(weightsX*weightsY*sizeof(int8_t));
out = (int8_t *)malloc(weightsX*sizeof(int8_t));
gout = (int8_t *)malloc(weightsX*sizeof(int8_t));
srand(time(0));
//Set up matrix 1
for(int i = 0;i<nodes;i++){
node[i] = rand() % 3 - 1;
}
//Set up matrix 2
for(int i = 0;i<(weightsX*weightsY);i++){
weight[i] = rand() % 3 - 1;
}
//Set up matrices for results
for(int i = 0;i<weightsX;i++){
out[i] = 0;
gout[i] = 0;
}
unsigned int sstart = clock();
for(int i = 0; i<weightsX;i++){
for(int j = 0; j<weightsY;j++){
out[i]+=(node[j]*weight[(nodes*i)+j]);
}
}
//printf("Sequential time taken in ms %li\n" ,(clock() - sstart));
int seqtime = clock()-sstart;
fprintf(fout,",%d",seqtime);
//CUDA parallel code
hipMalloc(&d_node,nodes*sizeof(int8_t));
hipMalloc(&d_weight,weightsX*weightsY*sizeof(int8_t));
hipMalloc(&d_out,weightsX*sizeof(int8_t));
hipMemcpy(d_node,node,nodes*sizeof(int8_t),hipMemcpyHostToDevice);
hipMemcpy(d_weight,weight,weightsX*weightsY*sizeof(int8_t),hipMemcpyHostToDevice);
hipMemcpy(d_out,gout,weightsX*sizeof(int8_t),hipMemcpyHostToDevice);
unsigned int pstart = clock();
resolveWeight<<<weightsX+(T-1)/T,T>>>(d_node,d_weight,d_out,nodes,weightsX);
hipDeviceSynchronize();
//printf("Parallel time taken in ms %li\n" ,(clock() - pstart));
int partime = clock()-pstart;
fprintf(fout,",%d",partime);
hipMemcpy(gout,d_out,weightsX*sizeof(int8_t),hipMemcpyDeviceToHost);
// printf("Value at 3: %i\n",out[2]);
// printf("Value on gpu at 3: %i\n",gout[2]);
// printf("Value at 5120: %i\n",out[5119]);
// printf("Value on gpu at 5120: %i\n",gout[5119]);
// printf("Value at 10000: %i\n",out[9999]);
// printf("Value on gpu at 10000: %i\n",gout[9999]);
int err = 0;
for(int i = 0; i < weightsX; i++){
err += out[i]-gout[i];
}
// printf("Error with CUDA: %i\n",err);
fprintf(fout,",%d\n",err);
free(node);
free(weight);
free(out);
free(gout);
hipDeviceReset();
}
fclose(fout);
} | .text
.file "main.hip"
.globl _Z28__device_stub__resolveWeightPaS_S_ii # -- Begin function _Z28__device_stub__resolveWeightPaS_S_ii
.p2align 4, 0x90
.type _Z28__device_stub__resolveWeightPaS_S_ii,@function
_Z28__device_stub__resolveWeightPaS_S_ii: # @_Z28__device_stub__resolveWeightPaS_S_ii
.cfi_startproc
# %bb.0:
subq $120, %rsp
.cfi_def_cfa_offset 128
movq %rdi, 72(%rsp)
movq %rsi, 64(%rsp)
movq %rdx, 56(%rsp)
movl %ecx, 4(%rsp)
movl %r8d, (%rsp)
leaq 72(%rsp), %rax
movq %rax, 80(%rsp)
leaq 64(%rsp), %rax
movq %rax, 88(%rsp)
leaq 56(%rsp), %rax
movq %rax, 96(%rsp)
leaq 4(%rsp), %rax
movq %rax, 104(%rsp)
movq %rsp, %rax
movq %rax, 112(%rsp)
leaq 40(%rsp), %rdi
leaq 24(%rsp), %rsi
leaq 16(%rsp), %rdx
leaq 8(%rsp), %rcx
callq __hipPopCallConfiguration
movq 40(%rsp), %rsi
movl 48(%rsp), %edx
movq 24(%rsp), %rcx
movl 32(%rsp), %r8d
leaq 80(%rsp), %r9
movl $_Z13resolveWeightPaS_S_ii, %edi
pushq 8(%rsp)
.cfi_adjust_cfa_offset 8
pushq 24(%rsp)
.cfi_adjust_cfa_offset 8
callq hipLaunchKernel
addq $136, %rsp
.cfi_adjust_cfa_offset -136
retq
.Lfunc_end0:
.size _Z28__device_stub__resolveWeightPaS_S_ii, .Lfunc_end0-_Z28__device_stub__resolveWeightPaS_S_ii
.cfi_endproc
# -- End function
.globl main # -- Begin function main
.p2align 4, 0x90
.type main,@function
main: # @main
.cfi_startproc
# %bb.0:
pushq %rbp
.cfi_def_cfa_offset 16
pushq %r15
.cfi_def_cfa_offset 24
pushq %r14
.cfi_def_cfa_offset 32
pushq %r13
.cfi_def_cfa_offset 40
pushq %r12
.cfi_def_cfa_offset 48
pushq %rbx
.cfi_def_cfa_offset 56
subq $184, %rsp
.cfi_def_cfa_offset 240
.cfi_offset %rbx, -56
.cfi_offset %r12, -48
.cfi_offset %r13, -40
.cfi_offset %r14, -32
.cfi_offset %r15, -24
.cfi_offset %rbp, -16
movl $.L.str, %edi
movl $.L.str.1, %esi
callq fopen
movq %rax, %r12
movl $1, %r14d
xorl %ebx, %ebx
movq %rax, 56(%rsp) # 8-byte Spill
.p2align 4, 0x90
.LBB1_1: # =>This Loop Header: Depth=1
# Child Loop BB1_4 Depth 2
# Child Loop BB1_6 Depth 2
# Child Loop BB1_8 Depth 2
# Child Loop BB1_9 Depth 3
# Child Loop BB1_14 Depth 2
imull $652835029, %r14d, %eax # imm = 0x26E978D5
rorl $3, %eax
cmpl $4294967, %eax # imm = 0x418937
ja .LBB1_3
# %bb.2: # in Loop: Header=BB1_1 Depth=1
movl $.L.str.2, %edi
movl %r14d, %esi
xorl %eax, %eax
callq printf
.LBB1_3: # in Loop: Header=BB1_1 Depth=1
incq %rbx
movq %rbx, 32(%rsp) # 8-byte Spill
movl $.L.str.3, %esi
movq %r12, %rdi
movl %r14d, %edx
xorl %eax, %eax
callq fprintf
movq %r14, %rdi
callq malloc
movq %rax, %r15
movq %r14, %rbp
imulq %r14, %rbp
movq %rbp, %rdi
callq malloc
movq %rax, (%rsp) # 8-byte Spill
movq %r14, %rdi
callq malloc
movq %rax, %r13
movq %r14, %rdi
callq malloc
movq %rax, 24(%rsp) # 8-byte Spill
xorl %edi, %edi
callq time
movl %eax, %edi
callq srand
xorl %r12d, %r12d
.p2align 4, 0x90
.LBB1_4: # Parent Loop BB1_1 Depth=1
# => This Inner Loop Header: Depth=2
callq rand
cltq
imulq $1431655766, %rax, %rcx # imm = 0x55555556
movq %rcx, %rdx
shrq $63, %rdx
shrq $32, %rcx
addl %edx, %ecx
leal (%rcx,%rcx,2), %ecx
subl %ecx, %eax
decb %al
movb %al, (%r15,%r12)
incq %r12
cmpq %r12, %r14
jne .LBB1_4
# %bb.5: # %.preheader99.preheader
# in Loop: Header=BB1_1 Depth=1
xorl %r12d, %r12d
movq (%rsp), %rbx # 8-byte Reload
.p2align 4, 0x90
.LBB1_6: # %.preheader99
# Parent Loop BB1_1 Depth=1
# => This Inner Loop Header: Depth=2
callq rand
cltq
imulq $1431655766, %rax, %rcx # imm = 0x55555556
movq %rcx, %rdx
shrq $63, %rdx
shrq $32, %rcx
addl %edx, %ecx
leal (%rcx,%rcx,2), %ecx
subl %ecx, %eax
decb %al
movb %al, (%rbx,%r12)
incq %r12
cmpq %rbp, %r12
jb .LBB1_6
# %bb.7: # %.preheader98.preheader
# in Loop: Header=BB1_1 Depth=1
movq %r13, %rdi
xorl %esi, %esi
movq 32(%rsp), %r12 # 8-byte Reload
movq %r12, %rdx
callq memset@PLT
movq 24(%rsp), %rdi # 8-byte Reload
xorl %esi, %esi
movq %r12, %rdx
callq memset@PLT
callq clock
movq %rax, 64(%rsp) # 8-byte Spill
xorl %edx, %edx
movq 56(%rsp), %r12 # 8-byte Reload
.p2align 4, 0x90
.LBB1_8: # %.preheader
# Parent Loop BB1_1 Depth=1
# => This Loop Header: Depth=2
# Child Loop BB1_9 Depth 3
movzbl (%r13,%rdx), %esi
xorl %edi, %edi
.p2align 4, 0x90
.LBB1_9: # Parent Loop BB1_1 Depth=1
# Parent Loop BB1_8 Depth=2
# => This Inner Loop Header: Depth=3
movzbl (%rbx,%rdi), %eax
mulb (%r15,%rdi)
addb %al, %sil
incq %rdi
cmpq %rdi, %r14
jne .LBB1_9
# %bb.10: # in Loop: Header=BB1_8 Depth=2
movb %sil, (%r13,%rdx)
incq %rdx
addq %r14, %rbx
cmpq %r14, %rdx
jne .LBB1_8
# %bb.11: # in Loop: Header=BB1_1 Depth=1
callq clock
subl 64(%rsp), %eax # 4-byte Folded Reload
movl $.L.str.4, %esi
movq %r12, %rdi
movl %eax, %edx
xorl %eax, %eax
callq fprintf
leaq 48(%rsp), %rdi
movq %r14, %rsi
callq hipMalloc
leaq 40(%rsp), %rdi
movq %rbp, %rsi
callq hipMalloc
leaq 8(%rsp), %rdi
movq %r14, %rsi
callq hipMalloc
movq 48(%rsp), %rdi
movq %r15, %rsi
movq %r14, %rdx
movl $1, %ecx
callq hipMemcpy
movq 40(%rsp), %rdi
movq (%rsp), %rsi # 8-byte Reload
movq %rbp, %rdx
movl $1, %ecx
callq hipMemcpy
movq 8(%rsp), %rdi
movq 24(%rsp), %rbx # 8-byte Reload
movq %rbx, %rsi
movq %r14, %rdx
movl $1, %ecx
callq hipMemcpy
callq clock
movq %rax, %rbp
movq %r14, %rdi
movabsq $4294967296, %rax # imm = 0x100000000
orq %rax, %rdi
leaq 512(%rax), %rdx
movl $1, %esi
movl $1, %ecx
xorl %r8d, %r8d
xorl %r9d, %r9d
callq __hipPushCallConfiguration
testl %eax, %eax
jne .LBB1_13
# %bb.12: # in Loop: Header=BB1_1 Depth=1
movq 48(%rsp), %rax
movq 40(%rsp), %rcx
movq 8(%rsp), %rdx
movq %rax, 136(%rsp)
movq %rcx, 128(%rsp)
movq %rdx, 120(%rsp)
movl %r14d, 20(%rsp)
movl %r14d, 16(%rsp)
leaq 136(%rsp), %rax
movq %rax, 144(%rsp)
leaq 128(%rsp), %rax
movq %rax, 152(%rsp)
leaq 120(%rsp), %rax
movq %rax, 160(%rsp)
leaq 20(%rsp), %rax
movq %rax, 168(%rsp)
leaq 16(%rsp), %rax
movq %rax, 176(%rsp)
leaq 104(%rsp), %rdi
leaq 88(%rsp), %rsi
leaq 80(%rsp), %rdx
leaq 72(%rsp), %rcx
callq __hipPopCallConfiguration
movq 104(%rsp), %rsi
movl 112(%rsp), %edx
movq 88(%rsp), %rcx
movl 96(%rsp), %r8d
movl $_Z13resolveWeightPaS_S_ii, %edi
leaq 144(%rsp), %r9
pushq 72(%rsp)
.cfi_adjust_cfa_offset 8
pushq 88(%rsp)
.cfi_adjust_cfa_offset 8
callq hipLaunchKernel
addq $16, %rsp
.cfi_adjust_cfa_offset -16
.LBB1_13: # in Loop: Header=BB1_1 Depth=1
callq hipDeviceSynchronize
callq clock
subl %ebp, %eax
xorl %ebp, %ebp
movl $.L.str.4, %esi
movq %r12, %rdi
movl %eax, %edx
xorl %eax, %eax
callq fprintf
movq 8(%rsp), %rsi
movq %rbx, %rdi
movq %r14, %rdx
movl $2, %ecx
callq hipMemcpy
xorl %edx, %edx
.p2align 4, 0x90
.LBB1_14: # Parent Loop BB1_1 Depth=1
# => This Inner Loop Header: Depth=2
movsbl (%r13,%rbp), %eax
addl %eax, %edx
movsbl (%rbx,%rbp), %eax
subl %eax, %edx
incq %rbp
cmpq %rbp, %r14
jne .LBB1_14
# %bb.15: # in Loop: Header=BB1_1 Depth=1
movl $.L.str.5, %esi
movq %r12, %rdi
xorl %eax, %eax
callq fprintf
movq %r15, %rdi
callq free
movq (%rsp), %rdi # 8-byte Reload
callq free
movq %r13, %rdi
callq free
movq %rbx, %rdi
callq free
callq hipDeviceReset
incq %r14
movq 32(%rsp), %rbx # 8-byte Reload
cmpq $9999, %rbx # imm = 0x270F
jne .LBB1_1
# %bb.16:
movq %r12, %rdi
callq fclose
xorl %eax, %eax
addq $184, %rsp
.cfi_def_cfa_offset 56
popq %rbx
.cfi_def_cfa_offset 48
popq %r12
.cfi_def_cfa_offset 40
popq %r13
.cfi_def_cfa_offset 32
popq %r14
.cfi_def_cfa_offset 24
popq %r15
.cfi_def_cfa_offset 16
popq %rbp
.cfi_def_cfa_offset 8
retq
.Lfunc_end1:
.size main, .Lfunc_end1-main
.cfi_endproc
# -- End function
.p2align 4, 0x90 # -- Begin function __hip_module_ctor
.type __hip_module_ctor,@function
__hip_module_ctor: # @__hip_module_ctor
.cfi_startproc
# %bb.0:
subq $40, %rsp
.cfi_def_cfa_offset 48
cmpq $0, __hip_gpubin_handle(%rip)
jne .LBB2_2
# %bb.1:
movl $__hip_fatbin_wrapper, %edi
callq __hipRegisterFatBinary
movq %rax, __hip_gpubin_handle(%rip)
.LBB2_2:
movq __hip_gpubin_handle(%rip), %rdi
xorps %xmm0, %xmm0
movups %xmm0, 16(%rsp)
movups %xmm0, (%rsp)
movl $_Z13resolveWeightPaS_S_ii, %esi
movl $.L__unnamed_1, %edx
movl $.L__unnamed_1, %ecx
movl $-1, %r8d
xorl %r9d, %r9d
callq __hipRegisterFunction
movl $__hip_module_dtor, %edi
addq $40, %rsp
.cfi_def_cfa_offset 8
jmp atexit # TAILCALL
.Lfunc_end2:
.size __hip_module_ctor, .Lfunc_end2-__hip_module_ctor
.cfi_endproc
# -- End function
.p2align 4, 0x90 # -- Begin function __hip_module_dtor
.type __hip_module_dtor,@function
__hip_module_dtor: # @__hip_module_dtor
.cfi_startproc
# %bb.0:
movq __hip_gpubin_handle(%rip), %rdi
testq %rdi, %rdi
je .LBB3_2
# %bb.1:
pushq %rax
.cfi_def_cfa_offset 16
callq __hipUnregisterFatBinary
movq $0, __hip_gpubin_handle(%rip)
addq $8, %rsp
.cfi_def_cfa_offset 8
.LBB3_2:
retq
.Lfunc_end3:
.size __hip_module_dtor, .Lfunc_end3-__hip_module_dtor
.cfi_endproc
# -- End function
.type _Z13resolveWeightPaS_S_ii,@object # @_Z13resolveWeightPaS_S_ii
.section .rodata,"a",@progbits
.globl _Z13resolveWeightPaS_S_ii
.p2align 3, 0x0
_Z13resolveWeightPaS_S_ii:
.quad _Z28__device_stub__resolveWeightPaS_S_ii
.size _Z13resolveWeightPaS_S_ii, 8
.type .L.str,@object # @.str
.section .rodata.str1.1,"aMS",@progbits,1
.L.str:
.asciz "out.txt"
.size .L.str, 8
.type .L.str.1,@object # @.str.1
.L.str.1:
.asciz "w"
.size .L.str.1, 2
.type .L.str.2,@object # @.str.2
.L.str.2:
.asciz "Starting run %d\n"
.size .L.str.2, 17
.type .L.str.3,@object # @.str.3
.L.str.3:
.asciz "%d"
.size .L.str.3, 3
.type .L.str.4,@object # @.str.4
.L.str.4:
.asciz ",%d"
.size .L.str.4, 4
.type .L.str.5,@object # @.str.5
.L.str.5:
.asciz ",%d\n"
.size .L.str.5, 5
.type .L__unnamed_1,@object # @0
.L__unnamed_1:
.asciz "_Z13resolveWeightPaS_S_ii"
.size .L__unnamed_1, 26
.type __hip_fatbin_wrapper,@object # @__hip_fatbin_wrapper
.section .hipFatBinSegment,"a",@progbits
.p2align 3, 0x0
__hip_fatbin_wrapper:
.long 1212764230 # 0x48495046
.long 1 # 0x1
.quad __hip_fatbin
.quad 0
.size __hip_fatbin_wrapper, 24
.type __hip_gpubin_handle,@object # @__hip_gpubin_handle
.local __hip_gpubin_handle
.comm __hip_gpubin_handle,8,8
.section .init_array,"aw",@init_array
.p2align 3, 0x0
.quad __hip_module_ctor
.type __hip_cuid_,@object # @__hip_cuid_
.bss
.globl __hip_cuid_
__hip_cuid_:
.byte 0 # 0x0
.size __hip_cuid_, 1
.section ".linker-options","e",@llvm_linker_options
.ident "AMD clang version 18.0.0git (https://github.com/RadeonOpenCompute/llvm-project roc-6.3.2 25012 e5bf7e55c91490b07c49d8960fa7983d864936c4)"
.section ".note.GNU-stack","",@progbits
.addrsig
.addrsig_sym _Z28__device_stub__resolveWeightPaS_S_ii
.addrsig_sym __hip_module_ctor
.addrsig_sym __hip_module_dtor
.addrsig_sym _Z13resolveWeightPaS_S_ii
.addrsig_sym __hip_fatbin
.addrsig_sym __hip_fatbin_wrapper
.addrsig_sym __hip_cuid_ |
You are a helpful coding assistant specialized in converting from CUDA device assembly to AMD device assembly. | code for sm_80
Function : _Z13resolveWeightPaS_S_ii
.headerflags @"EF_CUDA_TEXMODE_UNIFIED EF_CUDA_64BIT_ADDRESS EF_CUDA_SM80 EF_CUDA_VIRTUAL_SM(EF_CUDA_SM80)"
/*0000*/ IMAD.MOV.U32 R1, RZ, RZ, c[0x0][0x28] ; /* 0x00000a00ff017624 */
/* 0x000fe400078e00ff */
/*0010*/ S2R R0, SR_CTAID.X ; /* 0x0000000000007919 */
/* 0x000e280000002500 */
/*0020*/ S2R R3, SR_TID.X ; /* 0x0000000000037919 */
/* 0x000e240000002100 */
/*0030*/ IMAD R0, R0, c[0x0][0x0], R3 ; /* 0x0000000000007a24 */
/* 0x001fca00078e0203 */
/*0040*/ ISETP.GE.AND P0, PT, R0, c[0x0][0x17c], PT ; /* 0x00005f0000007a0c */
/* 0x000fda0003f06270 */
/*0050*/ @P0 EXIT ; /* 0x000000000000094d */
/* 0x000fea0003800000 */
/*0060*/ IMAD.MOV.U32 R6, RZ, RZ, c[0x0][0x178] ; /* 0x00005e00ff067624 */
/* 0x000fe200078e00ff */
/*0070*/ ULDC.64 UR4, c[0x0][0x118] ; /* 0x0000460000047ab9 */
/* 0x000fe20000000a00 */
/*0080*/ PRMT R14, RZ, 0x7610, R14 ; /* 0x00007610ff0e7816 */
/* 0x000fc6000000000e */
/*0090*/ ISETP.GE.AND P0, PT, R6, 0x1, PT ; /* 0x000000010600780c */
/* 0x000fda0003f06270 */
/*00a0*/ @!P0 BRA 0xaa0 ; /* 0x000009f000008947 */
/* 0x000fea0003800000 */
/*00b0*/ IADD3 R2, R6.reuse, -0x1, RZ ; /* 0xffffffff06027810 */
/* 0x040fe20007ffe0ff */
/*00c0*/ IMAD.MOV.U32 R9, RZ, RZ, RZ ; /* 0x000000ffff097224 */
/* 0x000fe200078e00ff */
/*00d0*/ LOP3.LUT R6, R6, 0x3, RZ, 0xc0, !PT ; /* 0x0000000306067812 */
/* 0x000fe400078ec0ff */
/*00e0*/ ISETP.GE.U32.AND P0, PT, R2, 0x3, PT ; /* 0x000000030200780c */
/* 0x000fe40003f06070 */
/*00f0*/ PRMT R14, RZ, 0x7610, R14 ; /* 0x00007610ff0e7816 */
/* 0x000fd6000000000e */
/*0100*/ @!P0 BRA 0x950 ; /* 0x0000084000008947 */
/* 0x000fea0003800000 */
/*0110*/ IADD3 R7, -R6, c[0x0][0x178], RZ ; /* 0x00005e0006077a10 */
/* 0x000fe20007ffe1ff */
/*0120*/ IMAD R2, R0, c[0x0][0x178], RZ ; /* 0x00005e0000027a24 */
/* 0x000fe200078e02ff */
/*0130*/ PRMT R14, RZ, 0x7610, R14 ; /* 0x00007610ff0e7816 */
/* 0x000fe2000000000e */
/*0140*/ IMAD.MOV.U32 R9, RZ, RZ, RZ ; /* 0x000000ffff097224 */
/* 0x000fe200078e00ff */
/*0150*/ ISETP.GT.AND P0, PT, R7, RZ, PT ; /* 0x000000ff0700720c */
/* 0x000fe20003f04270 */
/*0160*/ IMAD.MOV.U32 R3, RZ, RZ, c[0x0][0x164] ; /* 0x00005900ff037624 */
/* 0x000fe200078e00ff */
/*0170*/ IADD3 R4, P1, R2, c[0x0][0x168], RZ ; /* 0x00005a0002047a10 */
/* 0x000fc80007f3e0ff */
/*0180*/ LEA.HI.X.SX32 R5, R2, c[0x0][0x16c], 0x1, P1 ; /* 0x00005b0002057a11 */
/* 0x000fe400008f0eff */
/*0190*/ MOV R2, c[0x0][0x160] ; /* 0x0000580000027a02 */
/* 0x000fca0000000f00 */
/*01a0*/ @!P0 BRA 0x7c0 ; /* 0x0000061000008947 */
/* 0x000fea0003800000 */
/*01b0*/ ISETP.GT.AND P1, PT, R7, 0xc, PT ; /* 0x0000000c0700780c */
/* 0x000fe40003f24270 */
/*01c0*/ PLOP3.LUT P0, PT, PT, PT, PT, 0x80, 0x0 ; /* 0x000000000000781c */
/* 0x000fd60003f0f070 */
/*01d0*/ @!P1 BRA 0x580 ; /* 0x000003a000009947 */
/* 0x000fea0003800000 */
/*01e0*/ PLOP3.LUT P0, PT, PT, PT, PT, 0x8, 0x0 ; /* 0x000000000000781c */
/* 0x000fe40003f0e170 */
/*01f0*/ LDG.E.U8 R17, [R4.64] ; /* 0x0000000404117981 */
/* 0x000ea8000c1e1100 */
/*0200*/ LDG.E.U8 R16, [R2.64] ; /* 0x0000000402107981 */
/* 0x000ea8000c1e1100 */
/*0210*/ LDG.E.U8 R19, [R4.64+0x1] ; /* 0x0000010404137981 */
/* 0x000ee8000c1e1100 */
/*0220*/ LDG.E.U8 R24, [R2.64+0x1] ; /* 0x0000010402187981 */
/* 0x000ee8000c1e1100 */
/*0230*/ LDG.E.U8 R18, [R4.64+0x2] ; /* 0x0000020404127981 */
/* 0x000f28000c1e1100 */
/*0240*/ LDG.E.U8 R21, [R2.64+0x2] ; /* 0x0000020402157981 */
/* 0x000f28000c1e1100 */
/*0250*/ LDG.E.U8 R23, [R4.64+0x3] ; /* 0x0000030404177981 */
/* 0x000f68000c1e1100 */
/*0260*/ LDG.E.U8 R20, [R2.64+0x3] ; /* 0x0000030402147981 */
/* 0x000f68000c1e1100 */
/*0270*/ LDG.E.U8 R22, [R4.64+0x4] ; /* 0x0000040404167981 */
/* 0x000f68000c1e1100 */
/*0280*/ LDG.E.U8 R25, [R2.64+0x4] ; /* 0x0000040402197981 */
/* 0x000f68000c1e1100 */
/*0290*/ LDG.E.U8 R8, [R4.64+0x5] ; /* 0x0000050404087981 */
/* 0x000f68000c1e1100 */
/*02a0*/ LDG.E.U8 R11, [R2.64+0x5] ; /* 0x00000504020b7981 */
/* 0x000f68000c1e1100 */
/*02b0*/ LDG.E.U8 R10, [R4.64+0x6] ; /* 0x00000604040a7981 */
/* 0x000f68000c1e1100 */
/*02c0*/ LDG.E.U8 R13, [R2.64+0x6] ; /* 0x00000604020d7981 */
/* 0x000f68000c1e1100 */
/*02d0*/ LDG.E.U8 R12, [R4.64+0x7] ; /* 0x00000704040c7981 */
/* 0x000f68000c1e1100 */
/*02e0*/ LDG.E.U8 R15, [R2.64+0x7] ; /* 0x00000704020f7981 */
/* 0x000f62000c1e1100 */
/*02f0*/ IMAD R16, R17, R16, R14 ; /* 0x0000001011107224 */
/* 0x004fc600078e020e */
/*0300*/ LDG.E.U8 R14, [R4.64+0x8] ; /* 0x00000804040e7981 */
/* 0x0000a8000c1e1100 */
/*0310*/ LDG.E.U8 R17, [R2.64+0x8] ; /* 0x0000080402117981 */
/* 0x0002a2000c1e1100 */
/*0320*/ IMAD R24, R19, R24, R16 ; /* 0x0000001813187224 */
/* 0x008fc600078e0210 */
/*0330*/ LDG.E.U8 R16, [R4.64+0x9] ; /* 0x0000090404107981 */
/* 0x0000e8000c1e1100 */
/*0340*/ LDG.E.U8 R19, [R2.64+0x9] ; /* 0x0000090402137981 */
/* 0x0002e2000c1e1100 */
/*0350*/ IMAD R24, R18, R21, R24 ; /* 0x0000001512187224 */
/* 0x010fc600078e0218 */
/*0360*/ LDG.E.U8 R18, [R4.64+0xa] ; /* 0x00000a0404127981 */
/* 0x000128000c1e1100 */
/*0370*/ LDG.E.U8 R21, [R2.64+0xa] ; /* 0x00000a0402157981 */
/* 0x000322000c1e1100 */
/*0380*/ IMAD R24, R23, R20, R24 ; /* 0x0000001417187224 */
/* 0x020fc600078e0218 */
/*0390*/ LDG.E.U8 R20, [R4.64+0xb] ; /* 0x00000b0404147981 */
/* 0x000168000c1e1100 */
/*03a0*/ LDG.E.U8 R23, [R2.64+0xb] ; /* 0x00000b0402177981 */
/* 0x000362000c1e1100 */
/*03b0*/ IMAD R24, R22, R25, R24 ; /* 0x0000001916187224 */
/* 0x000fc600078e0218 */
/*03c0*/ LDG.E.U8 R22, [R4.64+0xc] ; /* 0x00000c0404167981 */
/* 0x000168000c1e1100 */
/*03d0*/ LDG.E.U8 R25, [R2.64+0xc] ; /* 0x00000c0402197981 */
/* 0x000362000c1e1100 */
/*03e0*/ IMAD R24, R8, R11, R24 ; /* 0x0000000b08187224 */
/* 0x000fc600078e0218 */
/*03f0*/ LDG.E.U8 R8, [R4.64+0xd] ; /* 0x00000d0404087981 */
/* 0x000168000c1e1100 */
/*0400*/ LDG.E.U8 R11, [R2.64+0xd] ; /* 0x00000d04020b7981 */
/* 0x000362000c1e1100 */
/*0410*/ IMAD R24, R10, R13, R24 ; /* 0x0000000d0a187224 */
/* 0x000fc600078e0218 */
/*0420*/ LDG.E.U8 R10, [R4.64+0xe] ; /* 0x00000e04040a7981 */
/* 0x000168000c1e1100 */
/*0430*/ LDG.E.U8 R13, [R2.64+0xe] ; /* 0x00000e04020d7981 */
/* 0x000362000c1e1100 */
/*0440*/ IMAD R24, R12, R15, R24 ; /* 0x0000000f0c187224 */
/* 0x000fc600078e0218 */
/*0450*/ LDG.E.U8 R12, [R4.64+0xf] ; /* 0x00000f04040c7981 */
/* 0x000168000c1e1100 */
/*0460*/ LDG.E.U8 R15, [R2.64+0xf] ; /* 0x00000f04020f7981 */
/* 0x000362000c1e1100 */
/*0470*/ IADD3 R7, R7, -0x10, RZ ; /* 0xfffffff007077810 */
/* 0x000fe40007ffe0ff */
/*0480*/ IADD3 R9, R9, 0x10, RZ ; /* 0x0000001009097810 */
/* 0x000fe40007ffe0ff */
/*0490*/ ISETP.GT.AND P1, PT, R7, 0xc, PT ; /* 0x0000000c0700780c */
/* 0x000fe40003f24270 */
/*04a0*/ IADD3 R4, P2, R4, 0x10, RZ ; /* 0x0000001004047810 */
/* 0x001fc40007f5e0ff */
/*04b0*/ IADD3 R2, P3, R2, 0x10, RZ ; /* 0x0000001002027810 */
/* 0x002fc60007f7e0ff */
/*04c0*/ IMAD.X R5, RZ, RZ, R5, P2 ; /* 0x000000ffff057224 */
/* 0x000fe400010e0605 */
/*04d0*/ IMAD.X R3, RZ, RZ, R3, P3 ; /* 0x000000ffff037224 */
/* 0x000fe400018e0603 */
/*04e0*/ IMAD R14, R14, R17, R24 ; /* 0x000000110e0e7224 */
/* 0x004fc800078e0218 */
/*04f0*/ IMAD R14, R16, R19, R14 ; /* 0x00000013100e7224 */
/* 0x008fc800078e020e */
/*0500*/ IMAD R14, R18, R21, R14 ; /* 0x00000015120e7224 */
/* 0x010fc800078e020e */
/*0510*/ IMAD R14, R20, R23, R14 ; /* 0x00000017140e7224 */
/* 0x020fc800078e020e */
/*0520*/ IMAD R14, R22, R25, R14 ; /* 0x00000019160e7224 */
/* 0x000fc800078e020e */
/*0530*/ IMAD R8, R8, R11, R14 ; /* 0x0000000b08087224 */
/* 0x000fc800078e020e */
/*0540*/ IMAD R8, R10, R13, R8 ; /* 0x0000000d0a087224 */
/* 0x000fc800078e0208 */
/*0550*/ IMAD R8, R12, R15, R8 ; /* 0x0000000f0c087224 */
/* 0x000fca00078e0208 */
/*0560*/ PRMT R14, R8, 0x7610, R14 ; /* 0x00007610080e7816 */
/* 0x000fe2000000000e */
/*0570*/ @P1 BRA 0x1f0 ; /* 0xfffffc7000001947 */
/* 0x000fea000383ffff */
/*0580*/ ISETP.GT.AND P1, PT, R7, 0x4, PT ; /* 0x000000040700780c */
/* 0x000fda0003f24270 */
/*0590*/ @!P1 BRA 0x7a0 ; /* 0x0000020000009947 */
/* 0x000fea0003800000 */
/*05a0*/ LDG.E.U8 R17, [R4.64] ; /* 0x0000000404117981 */
/* 0x0000a8000c1e1100 */
/*05b0*/ LDG.E.U8 R16, [R2.64] ; /* 0x0000000402107981 */
/* 0x0002a8000c1e1100 */
/*05c0*/ LDG.E.U8 R19, [R4.64+0x1] ; /* 0x0000010404137981 */
/* 0x0000e8000c1e1100 */
/*05d0*/ LDG.E.U8 R18, [R2.64+0x1] ; /* 0x0000010402127981 */
/* 0x0002e8000c1e1100 */
/*05e0*/ LDG.E.U8 R21, [R4.64+0x2] ; /* 0x0000020404157981 */
/* 0x000128000c1e1100 */
/*05f0*/ LDG.E.U8 R20, [R2.64+0x2] ; /* 0x0000020402147981 */
/* 0x000328000c1e1100 */
/*0600*/ LDG.E.U8 R23, [R4.64+0x3] ; /* 0x0000030404177981 */
/* 0x000168000c1e1100 */
/*0610*/ LDG.E.U8 R22, [R2.64+0x3] ; /* 0x0000030402167981 */
/* 0x000368000c1e1100 */
/*0620*/ LDG.E.U8 R25, [R4.64+0x4] ; /* 0x0000040404197981 */
/* 0x000168000c1e1100 */
/*0630*/ LDG.E.U8 R24, [R2.64+0x4] ; /* 0x0000040402187981 */
/* 0x000368000c1e1100 */
/*0640*/ LDG.E.U8 R12, [R4.64+0x5] ; /* 0x00000504040c7981 */
/* 0x000168000c1e1100 */
/*0650*/ LDG.E.U8 R15, [R2.64+0x5] ; /* 0x00000504020f7981 */
/* 0x000368000c1e1100 */
/*0660*/ LDG.E.U8 R10, [R4.64+0x6] ; /* 0x00000604040a7981 */
/* 0x000168000c1e1100 */
/*0670*/ LDG.E.U8 R13, [R2.64+0x6] ; /* 0x00000604020d7981 */
/* 0x000368000c1e1100 */
/*0680*/ LDG.E.U8 R8, [R4.64+0x7] ; /* 0x0000070404087981 */
/* 0x000168000c1e1100 */
/*0690*/ LDG.E.U8 R11, [R2.64+0x7] ; /* 0x00000704020b7981 */
/* 0x000362000c1e1100 */
/*06a0*/ PLOP3.LUT P0, PT, PT, PT, PT, 0x8, 0x0 ; /* 0x000000000000781c */
/* 0x000fc40003f0e170 */
/*06b0*/ IADD3 R9, R9, 0x8, RZ ; /* 0x0000000809097810 */
/* 0x000fe40007ffe0ff */
/*06c0*/ IADD3 R7, R7, -0x8, RZ ; /* 0xfffffff807077810 */
/* 0x000fe40007ffe0ff */
/*06d0*/ IADD3 R4, P1, R4, 0x8, RZ ; /* 0x0000000804047810 */
/* 0x001fe40007f3e0ff */
/*06e0*/ IADD3 R2, P2, R2, 0x8, RZ ; /* 0x0000000802027810 */
/* 0x002fe40007f5e0ff */
/*06f0*/ IADD3.X R5, RZ, R5, RZ, P1, !PT ; /* 0x00000005ff057210 */
/* 0x000fc60000ffe4ff */
/*0700*/ IMAD.X R3, RZ, RZ, R3, P2 ; /* 0x000000ffff037224 */
/* 0x000fe400010e0603 */
/*0710*/ IMAD R16, R17, R16, R14 ; /* 0x0000001011107224 */
/* 0x004fc800078e020e */
/*0720*/ IMAD R16, R19, R18, R16 ; /* 0x0000001213107224 */
/* 0x008fc800078e0210 */
/*0730*/ IMAD R16, R21, R20, R16 ; /* 0x0000001415107224 */
/* 0x010fc800078e0210 */
/*0740*/ IMAD R16, R23, R22, R16 ; /* 0x0000001617107224 */
/* 0x020fc800078e0210 */
/*0750*/ IMAD R16, R25, R24, R16 ; /* 0x0000001819107224 */
/* 0x000fc800078e0210 */
/*0760*/ IMAD R12, R12, R15, R16 ; /* 0x0000000f0c0c7224 */
/* 0x000fc800078e0210 */
/*0770*/ IMAD R10, R10, R13, R12 ; /* 0x0000000d0a0a7224 */
/* 0x000fc800078e020c */
/*0780*/ IMAD R8, R8, R11, R10 ; /* 0x0000000b08087224 */
/* 0x000fca00078e020a */
/*0790*/ PRMT R14, R8, 0x7610, R14 ; /* 0x00007610080e7816 */
/* 0x000fe4000000000e */
/*07a0*/ ISETP.NE.OR P0, PT, R7, RZ, P0 ; /* 0x000000ff0700720c */
/* 0x000fda0000705670 */
/*07b0*/ @!P0 BRA 0x950 ; /* 0x0000019000008947 */
/* 0x000fea0003800000 */
/*07c0*/ LDG.E.U8 R11, [R4.64] ; /* 0x00000004040b7981 */
/* 0x000ea8000c1e1100 */
/*07d0*/ LDG.E.U8 R8, [R2.64] ; /* 0x0000000402087981 */
/* 0x000ea8000c1e1100 */
/*07e0*/ LDG.E.U8 R13, [R4.64+0x1] ; /* 0x00000104040d7981 */
/* 0x000ee8000c1e1100 */
/*07f0*/ LDG.E.U8 R10, [R2.64+0x1] ; /* 0x00000104020a7981 */
/* 0x000ee8000c1e1100 */
/*0800*/ LDG.E.U8 R15, [R4.64+0x2] ; /* 0x00000204040f7981 */
/* 0x000f28000c1e1100 */
/*0810*/ LDG.E.U8 R12, [R2.64+0x2] ; /* 0x00000204020c7981 */
/* 0x000f28000c1e1100 */
/*0820*/ LDG.E.U8 R17, [R4.64+0x3] ; /* 0x0000030404117981 */
/* 0x000168000c1e1100 */
/*0830*/ LDG.E.U8 R16, [R2.64+0x3] ; /* 0x0000030402107981 */
/* 0x000362000c1e1100 */
/*0840*/ IADD3 R7, R7, -0x4, RZ ; /* 0xfffffffc07077810 */
/* 0x000fc40007ffe0ff */
/*0850*/ IADD3 R9, R9, 0x4, RZ ; /* 0x0000000409097810 */
/* 0x000fe40007ffe0ff */
/*0860*/ ISETP.NE.AND P0, PT, R7, RZ, PT ; /* 0x000000ff0700720c */
/* 0x000fe20003f05270 */
/*0870*/ IMAD R8, R11, R8, R14 ; /* 0x000000080b087224 */
/* 0x004fc800078e020e */
/*0880*/ IMAD R8, R13, R10, R8 ; /* 0x0000000a0d087224 */
/* 0x008fe200078e0208 */
/*0890*/ IADD3 R10, P2, R2, 0x4, RZ ; /* 0x00000004020a7810 */
/* 0x000fca0007f5e0ff */
/*08a0*/ IMAD.X R11, RZ, RZ, R3, P2 ; /* 0x000000ffff0b7224 */
/* 0x000fe400010e0603 */
/*08b0*/ IMAD R8, R15, R12, R8 ; /* 0x0000000c0f087224 */
/* 0x010fe200078e0208 */
/*08c0*/ IADD3 R12, P1, R4, 0x4, RZ ; /* 0x00000004040c7810 */
/* 0x000fe20007f3e0ff */
/*08d0*/ IMAD.MOV.U32 R2, RZ, RZ, R10 ; /* 0x000000ffff027224 */
/* 0x002fe400078e000a */
/*08e0*/ IMAD.MOV.U32 R3, RZ, RZ, R11 ; /* 0x000000ffff037224 */
/* 0x000fe200078e000b */
/*08f0*/ MOV R4, R12 ; /* 0x0000000c00047202 */
/* 0x001fe20000000f00 */
/*0900*/ IMAD.X R13, RZ, RZ, R5, P1 ; /* 0x000000ffff0d7224 */
/* 0x000fe400008e0605 */
/*0910*/ IMAD R8, R17, R16, R8 ; /* 0x0000001011087224 */
/* 0x020fc400078e0208 */
/*0920*/ IMAD.MOV.U32 R5, RZ, RZ, R13 ; /* 0x000000ffff057224 */
/* 0x000fc600078e000d */
/*0930*/ PRMT R14, R8, 0x7610, R14 ; /* 0x00007610080e7816 */
/* 0x000fe2000000000e */
/*0940*/ @P0 BRA 0x7c0 ; /* 0xfffffe7000000947 */
/* 0x000fea000383ffff */
/*0950*/ ISETP.NE.AND P0, PT, R6, RZ, PT ; /* 0x000000ff0600720c */
/* 0x000fda0003f05270 */
/*0960*/ @!P0 BRA 0xaa0 ; /* 0x0000013000008947 */
/* 0x000fea0003800000 */
/*0970*/ IMAD R2, R0, c[0x0][0x178], R9 ; /* 0x00005e0000027a24 */
/* 0x000fe200078e0209 */
/*0980*/ IADD3 R10, P0, R9, c[0x0][0x160], RZ ; /* 0x00005800090a7a10 */
/* 0x000fc80007f1e0ff */
/*0990*/ IADD3 R7, P1, R2.reuse, c[0x0][0x168], RZ ; /* 0x00005a0002077a10 */
/* 0x040fe40007f3e0ff */
/*09a0*/ LEA.HI.X.SX32 R11, R9, c[0x0][0x164], 0x1, P0 ; /* 0x00005900090b7a11 */
/* 0x000fe400000f0eff */
/*09b0*/ LEA.HI.X.SX32 R8, R2, c[0x0][0x16c], 0x1, P1 ; /* 0x00005b0002087a11 */
/* 0x000fca00008f0eff */
/*09c0*/ IMAD.MOV.U32 R3, RZ, RZ, R8 ; /* 0x000000ffff037224 */
/* 0x000fe200078e0008 */
/*09d0*/ MOV R2, R7 ; /* 0x0000000700027202 */
/* 0x000fe20000000f00 */
/*09e0*/ IMAD.MOV.U32 R4, RZ, RZ, R10 ; /* 0x000000ffff047224 */
/* 0x000fe400078e000a */
/*09f0*/ IMAD.MOV.U32 R5, RZ, RZ, R11 ; /* 0x000000ffff057224 */
/* 0x000fe400078e000b */
/*0a00*/ LDG.E.U8 R3, [R2.64] ; /* 0x0000000402037981 */
/* 0x000ea8000c1e1100 */
/*0a10*/ LDG.E.U8 R4, [R4.64] ; /* 0x0000000404047981 */
/* 0x000ea2000c1e1100 */
/*0a20*/ IADD3 R6, R6, -0x1, RZ ; /* 0xffffffff06067810 */
/* 0x000fc40007ffe0ff */
/*0a30*/ IADD3 R7, P2, R7, 0x1, RZ ; /* 0x0000000107077810 */
/* 0x000fe40007f5e0ff */
/*0a40*/ ISETP.NE.AND P0, PT, R6, RZ, PT ; /* 0x000000ff0600720c */
/* 0x000fe40003f05270 */
/*0a50*/ IADD3 R10, P1, R10, 0x1, RZ ; /* 0x000000010a0a7810 */
/* 0x000fe20007f3e0ff */
/*0a60*/ IMAD.X R8, RZ, RZ, R8, P2 ; /* 0x000000ffff087224 */
/* 0x000fc600010e0608 */
/*0a70*/ IADD3.X R11, RZ, R11, RZ, P1, !PT ; /* 0x0000000bff0b7210 */
/* 0x000fe20000ffe4ff */
/*0a80*/ IMAD R14, R3, R4, R14 ; /* 0x00000004030e7224 */
/* 0x004fcc00078e020e */
/*0a90*/ @P0 BRA 0x9c0 ; /* 0xffffff2000000947 */
/* 0x000fea000383ffff */
/*0aa0*/ IADD3 R2, P0, R0, c[0x0][0x170], RZ ; /* 0x00005c0000027a10 */
/* 0x000fc80007f1e0ff */
/*0ab0*/ LEA.HI.X.SX32 R3, R0, c[0x0][0x174], 0x1, P0 ; /* 0x00005d0000037a11 */
/* 0x000fca00000f0eff */
/*0ac0*/ STG.E.U8 [R2.64], R14 ; /* 0x0000000e02007986 */
/* 0x000fe2000c101104 */
/*0ad0*/ EXIT ; /* 0x000000000000794d */
/* 0x000fea0003800000 */
/*0ae0*/ BRA 0xae0; /* 0xfffffff000007947 */
/* 0x000fc0000383ffff */
/*0af0*/ NOP; /* 0x0000000000007918 */
/* 0x000fc00000000000 */
/*0b00*/ NOP; /* 0x0000000000007918 */
/* 0x000fc00000000000 */
/*0b10*/ NOP; /* 0x0000000000007918 */
/* 0x000fc00000000000 */
/*0b20*/ NOP; /* 0x0000000000007918 */
/* 0x000fc00000000000 */
/*0b30*/ NOP; /* 0x0000000000007918 */
/* 0x000fc00000000000 */
/*0b40*/ NOP; /* 0x0000000000007918 */
/* 0x000fc00000000000 */
/*0b50*/ NOP; /* 0x0000000000007918 */
/* 0x000fc00000000000 */
/*0b60*/ NOP; /* 0x0000000000007918 */
/* 0x000fc00000000000 */
/*0b70*/ NOP; /* 0x0000000000007918 */
/* 0x000fc00000000000 */
.......... | .text
.amdgcn_target "amdgcn-amd-amdhsa--gfx1100"
.protected _Z13resolveWeightPaS_S_ii
.globl _Z13resolveWeightPaS_S_ii
.p2align 8
.type _Z13resolveWeightPaS_S_ii,@function
_Z13resolveWeightPaS_S_ii:
s_clause 0x1
s_load_b32 s2, s[0:1], 0x2c
s_load_b32 s3, s[0:1], 0x1c
s_waitcnt lgkmcnt(0)
s_and_b32 s2, s2, 0xffff
s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
v_mad_u64_u32 v[1:2], null, s15, s2, v[0:1]
s_mov_b32 s2, exec_lo
v_cmpx_gt_i32_e64 s3, v1
s_cbranch_execz .LBB0_6
s_load_b32 s2, s[0:1], 0x18
s_waitcnt lgkmcnt(0)
s_cmp_lt_i32 s2, 1
s_cbranch_scc1 .LBB0_4
s_load_b128 s[4:7], s[0:1], 0x0
v_mul_lo_u32 v0, v1, s2
v_mov_b32_e32 v4, 0
s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_2) | instid1(VALU_DEP_2)
v_ashrrev_i32_e32 v3, 31, v0
s_waitcnt lgkmcnt(0)
v_add_co_u32 v2, vcc_lo, s6, v0
v_add_co_ci_u32_e32 v3, vcc_lo, s7, v3, vcc_lo
v_mov_b32_e32 v0, 0
.LBB0_3:
global_load_u8 v5, v4, s[4:5]
global_load_u8 v6, v[2:3], off
v_add_co_u32 v2, vcc_lo, v2, 1
s_add_i32 s2, s2, -1
v_add_co_ci_u32_e32 v3, vcc_lo, 0, v3, vcc_lo
s_add_u32 s4, s4, 1
s_addc_u32 s5, s5, 0
s_cmp_eq_u32 s2, 0
s_waitcnt vmcnt(0)
v_mad_u16 v0, v6, v5, v0
s_cbranch_scc0 .LBB0_3
s_branch .LBB0_5
.LBB0_4:
v_mov_b32_e32 v0, 0
.LBB0_5:
s_load_b64 s[0:1], s[0:1], 0x10
v_ashrrev_i32_e32 v2, 31, v1
s_waitcnt lgkmcnt(0)
v_add_co_u32 v1, vcc_lo, s0, v1
s_delay_alu instid0(VALU_DEP_2)
v_add_co_ci_u32_e32 v2, vcc_lo, s1, v2, vcc_lo
global_store_b8 v[1:2], v0, off
.LBB0_6:
s_nop 0
s_sendmsg sendmsg(MSG_DEALLOC_VGPRS)
s_endpgm
.section .rodata,"a",@progbits
.p2align 6, 0x0
.amdhsa_kernel _Z13resolveWeightPaS_S_ii
.amdhsa_group_segment_fixed_size 0
.amdhsa_private_segment_fixed_size 0
.amdhsa_kernarg_size 288
.amdhsa_user_sgpr_count 15
.amdhsa_user_sgpr_dispatch_ptr 0
.amdhsa_user_sgpr_queue_ptr 0
.amdhsa_user_sgpr_kernarg_segment_ptr 1
.amdhsa_user_sgpr_dispatch_id 0
.amdhsa_user_sgpr_private_segment_size 0
.amdhsa_wavefront_size32 1
.amdhsa_uses_dynamic_stack 0
.amdhsa_enable_private_segment 0
.amdhsa_system_sgpr_workgroup_id_x 1
.amdhsa_system_sgpr_workgroup_id_y 0
.amdhsa_system_sgpr_workgroup_id_z 0
.amdhsa_system_sgpr_workgroup_info 0
.amdhsa_system_vgpr_workitem_id 0
.amdhsa_next_free_vgpr 7
.amdhsa_next_free_sgpr 16
.amdhsa_float_round_mode_32 0
.amdhsa_float_round_mode_16_64 0
.amdhsa_float_denorm_mode_32 3
.amdhsa_float_denorm_mode_16_64 3
.amdhsa_dx10_clamp 1
.amdhsa_ieee_mode 1
.amdhsa_fp16_overflow 0
.amdhsa_workgroup_processor_mode 1
.amdhsa_memory_ordered 1
.amdhsa_forward_progress 0
.amdhsa_shared_vgpr_count 0
.amdhsa_exception_fp_ieee_invalid_op 0
.amdhsa_exception_fp_denorm_src 0
.amdhsa_exception_fp_ieee_div_zero 0
.amdhsa_exception_fp_ieee_overflow 0
.amdhsa_exception_fp_ieee_underflow 0
.amdhsa_exception_fp_ieee_inexact 0
.amdhsa_exception_int_div_zero 0
.end_amdhsa_kernel
.text
.Lfunc_end0:
.size _Z13resolveWeightPaS_S_ii, .Lfunc_end0-_Z13resolveWeightPaS_S_ii
.section .AMDGPU.csdata,"",@progbits
.text
.p2alignl 7, 3214868480
.fill 96, 4, 3214868480
.type __hip_cuid_,@object
.section .bss,"aw",@nobits
.globl __hip_cuid_
__hip_cuid_:
.byte 0
.size __hip_cuid_, 1
.ident "AMD clang version 18.0.0git (https://github.com/RadeonOpenCompute/llvm-project roc-6.3.2 25012 e5bf7e55c91490b07c49d8960fa7983d864936c4)"
.section ".note.GNU-stack","",@progbits
.addrsig
.addrsig_sym __hip_cuid_
.amdgpu_metadata
---
amdhsa.kernels:
- .args:
- .address_space: global
.offset: 0
.size: 8
.value_kind: global_buffer
- .address_space: global
.offset: 8
.size: 8
.value_kind: global_buffer
- .address_space: global
.offset: 16
.size: 8
.value_kind: global_buffer
- .offset: 24
.size: 4
.value_kind: by_value
- .offset: 28
.size: 4
.value_kind: by_value
- .offset: 32
.size: 4
.value_kind: hidden_block_count_x
- .offset: 36
.size: 4
.value_kind: hidden_block_count_y
- .offset: 40
.size: 4
.value_kind: hidden_block_count_z
- .offset: 44
.size: 2
.value_kind: hidden_group_size_x
- .offset: 46
.size: 2
.value_kind: hidden_group_size_y
- .offset: 48
.size: 2
.value_kind: hidden_group_size_z
- .offset: 50
.size: 2
.value_kind: hidden_remainder_x
- .offset: 52
.size: 2
.value_kind: hidden_remainder_y
- .offset: 54
.size: 2
.value_kind: hidden_remainder_z
- .offset: 72
.size: 8
.value_kind: hidden_global_offset_x
- .offset: 80
.size: 8
.value_kind: hidden_global_offset_y
- .offset: 88
.size: 8
.value_kind: hidden_global_offset_z
- .offset: 96
.size: 2
.value_kind: hidden_grid_dims
.group_segment_fixed_size: 0
.kernarg_segment_align: 8
.kernarg_segment_size: 288
.language: OpenCL C
.language_version:
- 2
- 0
.max_flat_workgroup_size: 1024
.name: _Z13resolveWeightPaS_S_ii
.private_segment_fixed_size: 0
.sgpr_count: 18
.sgpr_spill_count: 0
.symbol: _Z13resolveWeightPaS_S_ii.kd
.uniform_work_group_size: 1
.uses_dynamic_stack: false
.vgpr_count: 7
.vgpr_spill_count: 0
.wavefront_size: 32
.workgroup_processor_mode: 1
amdhsa.target: amdgcn-amd-amdhsa--gfx1100
amdhsa.version:
- 1
- 2
...
.end_amdgpu_metadata |
You are a helpful coding assistant specialized in converting from CUDA host assembly to AMD host assembly. | .file "tmpxft_00143fb8_00000000-6_main.cudafe1.cpp"
.text
#APP
#NO_APP
.type _ZL26__cudaUnregisterBinaryUtilv, @function
_ZL26__cudaUnregisterBinaryUtilv:
.LFB2060:
.cfi_startproc
endbr64
subq $8, %rsp
.cfi_def_cfa_offset 16
movq _ZL20__cudaFatCubinHandle(%rip), %rdi
call __cudaUnregisterFatBinary@PLT
addq $8, %rsp
.cfi_def_cfa_offset 8
ret
.cfi_endproc
.LFE2060:
.size _ZL26__cudaUnregisterBinaryUtilv, .-_ZL26__cudaUnregisterBinaryUtilv
.globl _Z39__device_stub__Z13resolveWeightPaS_S_iiPaS_S_ii
.type _Z39__device_stub__Z13resolveWeightPaS_S_iiPaS_S_ii, @function
_Z39__device_stub__Z13resolveWeightPaS_S_iiPaS_S_ii:
.LFB2082:
.cfi_startproc
endbr64
subq $152, %rsp
.cfi_def_cfa_offset 160
movq %rdi, 24(%rsp)
movq %rsi, 16(%rsp)
movq %rdx, 8(%rsp)
movl %ecx, 4(%rsp)
movl %r8d, (%rsp)
movq %fs:40, %rax
movq %rax, 136(%rsp)
xorl %eax, %eax
leaq 24(%rsp), %rax
movq %rax, 96(%rsp)
leaq 16(%rsp), %rax
movq %rax, 104(%rsp)
leaq 8(%rsp), %rax
movq %rax, 112(%rsp)
leaq 4(%rsp), %rax
movq %rax, 120(%rsp)
movq %rsp, %rax
movq %rax, 128(%rsp)
movl $1, 48(%rsp)
movl $1, 52(%rsp)
movl $1, 56(%rsp)
movl $1, 60(%rsp)
movl $1, 64(%rsp)
movl $1, 68(%rsp)
leaq 40(%rsp), %rcx
leaq 32(%rsp), %rdx
leaq 60(%rsp), %rsi
leaq 48(%rsp), %rdi
call __cudaPopCallConfiguration@PLT
testl %eax, %eax
je .L7
.L3:
movq 136(%rsp), %rax
subq %fs:40, %rax
jne .L8
addq $152, %rsp
.cfi_remember_state
.cfi_def_cfa_offset 8
ret
.L7:
.cfi_restore_state
pushq 40(%rsp)
.cfi_def_cfa_offset 168
pushq 40(%rsp)
.cfi_def_cfa_offset 176
leaq 112(%rsp), %r9
movq 76(%rsp), %rcx
movl 84(%rsp), %r8d
movq 64(%rsp), %rsi
movl 72(%rsp), %edx
leaq _Z13resolveWeightPaS_S_ii(%rip), %rdi
call cudaLaunchKernel@PLT
addq $16, %rsp
.cfi_def_cfa_offset 160
jmp .L3
.L8:
call __stack_chk_fail@PLT
.cfi_endproc
.LFE2082:
.size _Z39__device_stub__Z13resolveWeightPaS_S_iiPaS_S_ii, .-_Z39__device_stub__Z13resolveWeightPaS_S_iiPaS_S_ii
.globl _Z13resolveWeightPaS_S_ii
.type _Z13resolveWeightPaS_S_ii, @function
_Z13resolveWeightPaS_S_ii:
.LFB2083:
.cfi_startproc
endbr64
subq $8, %rsp
.cfi_def_cfa_offset 16
call _Z39__device_stub__Z13resolveWeightPaS_S_iiPaS_S_ii
addq $8, %rsp
.cfi_def_cfa_offset 8
ret
.cfi_endproc
.LFE2083:
.size _Z13resolveWeightPaS_S_ii, .-_Z13resolveWeightPaS_S_ii
.section .rodata.str1.1,"aMS",@progbits,1
.LC0:
.string "w"
.LC1:
.string "out.txt"
.LC2:
.string "Starting run %d\n"
.LC3:
.string "%d"
.LC4:
.string ",%d"
.LC5:
.string ",%d\n"
.text
.globl main
.type main, @function
main:
.LFB2057:
.cfi_startproc
endbr64
pushq %r15
.cfi_def_cfa_offset 16
.cfi_offset 15, -16
pushq %r14
.cfi_def_cfa_offset 24
.cfi_offset 14, -24
pushq %r13
.cfi_def_cfa_offset 32
.cfi_offset 13, -32
pushq %r12
.cfi_def_cfa_offset 40
.cfi_offset 12, -40
pushq %rbp
.cfi_def_cfa_offset 48
.cfi_offset 6, -48
pushq %rbx
.cfi_def_cfa_offset 56
.cfi_offset 3, -56
subq $120, %rsp
.cfi_def_cfa_offset 176
movq %fs:40, %rax
movq %rax, 104(%rsp)
xorl %eax, %eax
leaq .LC0(%rip), %rsi
leaq .LC1(%rip), %rdi
call fopen@PLT
movq %rax, 16(%rsp)
movl $1, %r14d
jmp .L26
.L41:
movl %r14d, %edx
leaq .LC2(%rip), %rsi
movl $2, %edi
movl $0, %eax
call __printf_chk@PLT
jmp .L12
.L22:
call cudaDeviceSynchronize@PLT
call clock@PLT
movl %eax, %ecx
subl %ebp, %ecx
leaq .LC4(%rip), %rdx
movl $2, %esi
movq 16(%rsp), %rdi
movl $0, %eax
call __fprintf_chk@PLT
movl $2, %ecx
movq %r14, %rdx
movq 72(%rsp), %rsi
movq %r12, %rdi
call cudaMemcpy@PLT
cmpl $0, 32(%rsp)
jle .L23
movl $0, %eax
movl $0, %ecx
.L24:
movsbl 0(%r13,%rax), %edx
movsbl (%r12,%rax), %esi
subl %esi, %edx
addl %edx, %ecx
addq $1, %rax
cmpq %r14, %rax
jne .L24
leaq .LC5(%rip), %rdx
movl $2, %esi
movq 16(%rsp), %rdi
movl $0, %eax
call __fprintf_chk@PLT
movq %rbx, %rdi
call free@PLT
movq 8(%rsp), %rdi
call free@PLT
movq %r13, %rdi
call free@PLT
movq %r12, %rdi
call free@PLT
call cudaDeviceReset@PLT
addq $1, %r14
cmpq $10000, %r14
je .L40
.L26:
movl %r14d, 44(%rsp)
movl %r14d, 36(%rsp)
movslq %r14d, %rax
imulq $274877907, %rax, %rax
sarq $38, %rax
movl %r14d, %edx
sarl $31, %edx
subl %edx, %eax
imull $1000, %eax, %eax
cmpl %r14d, %eax
je .L41
.L12:
movl 36(%rsp), %r15d
movl %r15d, %ecx
leaq .LC3(%rip), %rdx
movl $2, %esi
movq 16(%rsp), %rdi
movl $0, %eax
call __fprintf_chk@PLT
movq %r14, %rdi
call malloc@PLT
movq %rax, %rbx
movl %r15d, %eax
imull %r15d, %eax
movl %eax, 40(%rsp)
cltq
movq %rax, 24(%rsp)
movq %rax, %rdi
call malloc@PLT
movq %rax, 8(%rsp)
movq %r14, %rdi
call malloc@PLT
movq %rax, %r13
movq %r14, %rdi
call malloc@PLT
movq %rax, %r12
movl $0, %edi
call time@PLT
movl %eax, %edi
call srand@PLT
movl %r14d, 32(%rsp)
testl %r14d, %r14d
jle .L13
movq %rbx, %rbp
leaq (%rbx,%r14), %r15
.L14:
call rand@PLT
movslq %eax, %rdx
imulq $1431655766, %rdx, %rdx
shrq $32, %rdx
movl %eax, %ecx
sarl $31, %ecx
subl %ecx, %edx
leal (%rdx,%rdx,2), %edx
subl %edx, %eax
subl $1, %eax
movb %al, 0(%rbp)
addq $1, %rbp
cmpq %r15, %rbp
jne .L14
cmpl $0, 40(%rsp)
jle .L29
.L28:
movq 8(%rsp), %rax
movq %rax, %rbp
movq 24(%rsp), %rdi
leaq (%rdi,%rax), %r15
.L16:
call rand@PLT
movslq %eax, %rdx
imulq $1431655766, %rdx, %rdx
shrq $32, %rdx
movl %eax, %ecx
sarl $31, %ecx
subl %ecx, %edx
leal (%rdx,%rdx,2), %edx
subl %edx, %eax
subl $1, %eax
movb %al, 0(%rbp)
addq $1, %rbp
cmpq %r15, %rbp
jne .L16
cmpl $0, 32(%rsp)
jle .L17
.L29:
movl $0, %eax
.L18:
movb $0, 0(%r13,%rax)
movb $0, (%r12,%rax)
addq $1, %rax
cmpq %r14, %rax
jne .L18
call clock@PLT
movl %eax, %ebp
movq %r13, %rdi
movq 8(%rsp), %rsi
leaq 0(%r13,%r14), %r9
.L19:
movq %rdi, %r8
movzbl (%rdi), %ecx
movl $0, %edx
.L20:
movzbl (%rbx,%rdx), %eax
mulb (%rsi,%rdx)
addl %eax, %ecx
addq $1, %rdx
cmpq %r14, %rdx
jne .L20
movb %cl, (%r8)
addq $1, %rdi
addq %r14, %rsi
cmpq %r9, %rdi
jne .L19
.L21:
call clock@PLT
movl %eax, %ecx
subl %ebp, %ecx
leaq .LC4(%rip), %rdx
movl $2, %esi
movq 16(%rsp), %rdi
movl $0, %eax
call __fprintf_chk@PLT
leaq 56(%rsp), %rdi
movq %r14, %rsi
call cudaMalloc@PLT
leaq 64(%rsp), %rdi
movq 24(%rsp), %r15
movq %r15, %rsi
call cudaMalloc@PLT
leaq 72(%rsp), %rdi
movq %r14, %rsi
call cudaMalloc@PLT
movl $1, %ecx
movq %r14, %rdx
movq %rbx, %rsi
movq 56(%rsp), %rdi
call cudaMemcpy@PLT
movl $1, %ecx
movq %r15, %rdx
movq 8(%rsp), %rsi
movq 64(%rsp), %rdi
call cudaMemcpy@PLT
movl $1, %ecx
movq %r14, %rdx
movq %r12, %rsi
movq 72(%rsp), %rdi
call cudaMemcpy@PLT
call clock@PLT
movq %rax, %rbp
movl $512, 92(%rsp)
movl $1, 96(%rsp)
movl 44(%rsp), %eax
movl %eax, 80(%rsp)
movl $1, 84(%rsp)
movl $0, %r9d
movl $0, %r8d
movq 92(%rsp), %rdx
movl $1, %ecx
movq 80(%rsp), %rdi
movl $1, %esi
call __cudaPushCallConfiguration@PLT
testl %eax, %eax
jne .L22
movl 36(%rsp), %ecx
movl %ecx, %r8d
movq 72(%rsp), %rdx
movq 64(%rsp), %rsi
movq 56(%rsp), %rdi
call _Z39__device_stub__Z13resolveWeightPaS_S_iiPaS_S_ii
jmp .L22
.L40:
movq 16(%rsp), %rdi
call fclose@PLT
movq 104(%rsp), %rax
subq %fs:40, %rax
jne .L42
movl $0, %eax
addq $120, %rsp
.cfi_remember_state
.cfi_def_cfa_offset 56
popq %rbx
.cfi_def_cfa_offset 48
popq %rbp
.cfi_def_cfa_offset 40
popq %r12
.cfi_def_cfa_offset 32
popq %r13
.cfi_def_cfa_offset 24
popq %r14
.cfi_def_cfa_offset 16
popq %r15
.cfi_def_cfa_offset 8
ret
.L23:
.cfi_restore_state
movl $0, %ecx
leaq .LC5(%rip), %rdx
movl $2, %esi
movq 16(%rsp), %rdi
movl $0, %eax
call __fprintf_chk@PLT
movq %rbx, %rdi
call free@PLT
movq 8(%rsp), %rdi
call free@PLT
movq %r13, %rdi
call free@PLT
movq %r12, %rdi
call free@PLT
call cudaDeviceReset@PLT
addq $1, %r14
jmp .L26
.L13:
cmpl $0, 40(%rsp)
jg .L28
.L17:
call clock@PLT
movl %eax, %ebp
jmp .L21
.L42:
call __stack_chk_fail@PLT
.cfi_endproc
.LFE2057:
.size main, .-main
.section .rodata.str1.1
.LC6:
.string "_Z13resolveWeightPaS_S_ii"
.text
.type _ZL24__sti____cudaRegisterAllv, @function
_ZL24__sti____cudaRegisterAllv:
.LFB2085:
.cfi_startproc
endbr64
subq $8, %rsp
.cfi_def_cfa_offset 16
leaq _ZL15__fatDeviceText(%rip), %rdi
call __cudaRegisterFatBinary@PLT
movq %rax, %rdi
movq %rax, _ZL20__cudaFatCubinHandle(%rip)
pushq $0
.cfi_def_cfa_offset 24
pushq $0
.cfi_def_cfa_offset 32
pushq $0
.cfi_def_cfa_offset 40
pushq $0
.cfi_def_cfa_offset 48
movl $0, %r9d
movl $-1, %r8d
leaq .LC6(%rip), %rdx
movq %rdx, %rcx
leaq _Z13resolveWeightPaS_S_ii(%rip), %rsi
call __cudaRegisterFunction@PLT
addq $32, %rsp
.cfi_def_cfa_offset 16
movq _ZL20__cudaFatCubinHandle(%rip), %rdi
call __cudaRegisterFatBinaryEnd@PLT
leaq _ZL26__cudaUnregisterBinaryUtilv(%rip), %rdi
call atexit@PLT
addq $8, %rsp
.cfi_def_cfa_offset 8
ret
.cfi_endproc
.LFE2085:
.size _ZL24__sti____cudaRegisterAllv, .-_ZL24__sti____cudaRegisterAllv
.section .init_array,"aw"
.align 8
.quad _ZL24__sti____cudaRegisterAllv
.section .nvFatBinSegment,"aw"
.align 8
.type _ZL15__fatDeviceText, @object
.size _ZL15__fatDeviceText, 24
_ZL15__fatDeviceText:
.long 1180844977
.long 1
.quad fatbinData
.quad 0
.local _ZL20__cudaFatCubinHandle
.comm _ZL20__cudaFatCubinHandle,8,8
.ident "GCC: (Ubuntu 13.3.0-6ubuntu2~24.04) 13.3.0"
.section .note.GNU-stack,"",@progbits
.section .note.gnu.property,"a"
.align 8
.long 1f - 0f
.long 4f - 1f
.long 5
0:
.string "GNU"
1:
.align 8
.long 0xc0000002
.long 3f - 2f
2:
.long 0x3
3:
.align 8
4: | .text
.file "main.hip"
.globl _Z28__device_stub__resolveWeightPaS_S_ii # -- Begin function _Z28__device_stub__resolveWeightPaS_S_ii
.p2align 4, 0x90
.type _Z28__device_stub__resolveWeightPaS_S_ii,@function
_Z28__device_stub__resolveWeightPaS_S_ii: # @_Z28__device_stub__resolveWeightPaS_S_ii
.cfi_startproc
# %bb.0:
subq $120, %rsp
.cfi_def_cfa_offset 128
movq %rdi, 72(%rsp)
movq %rsi, 64(%rsp)
movq %rdx, 56(%rsp)
movl %ecx, 4(%rsp)
movl %r8d, (%rsp)
leaq 72(%rsp), %rax
movq %rax, 80(%rsp)
leaq 64(%rsp), %rax
movq %rax, 88(%rsp)
leaq 56(%rsp), %rax
movq %rax, 96(%rsp)
leaq 4(%rsp), %rax
movq %rax, 104(%rsp)
movq %rsp, %rax
movq %rax, 112(%rsp)
leaq 40(%rsp), %rdi
leaq 24(%rsp), %rsi
leaq 16(%rsp), %rdx
leaq 8(%rsp), %rcx
callq __hipPopCallConfiguration
movq 40(%rsp), %rsi
movl 48(%rsp), %edx
movq 24(%rsp), %rcx
movl 32(%rsp), %r8d
leaq 80(%rsp), %r9
movl $_Z13resolveWeightPaS_S_ii, %edi
pushq 8(%rsp)
.cfi_adjust_cfa_offset 8
pushq 24(%rsp)
.cfi_adjust_cfa_offset 8
callq hipLaunchKernel
addq $136, %rsp
.cfi_adjust_cfa_offset -136
retq
.Lfunc_end0:
.size _Z28__device_stub__resolveWeightPaS_S_ii, .Lfunc_end0-_Z28__device_stub__resolveWeightPaS_S_ii
.cfi_endproc
# -- End function
.globl main # -- Begin function main
.p2align 4, 0x90
.type main,@function
main: # @main
.cfi_startproc
# %bb.0:
pushq %rbp
.cfi_def_cfa_offset 16
pushq %r15
.cfi_def_cfa_offset 24
pushq %r14
.cfi_def_cfa_offset 32
pushq %r13
.cfi_def_cfa_offset 40
pushq %r12
.cfi_def_cfa_offset 48
pushq %rbx
.cfi_def_cfa_offset 56
subq $184, %rsp
.cfi_def_cfa_offset 240
.cfi_offset %rbx, -56
.cfi_offset %r12, -48
.cfi_offset %r13, -40
.cfi_offset %r14, -32
.cfi_offset %r15, -24
.cfi_offset %rbp, -16
movl $.L.str, %edi
movl $.L.str.1, %esi
callq fopen
movq %rax, %r12
movl $1, %r14d
xorl %ebx, %ebx
movq %rax, 56(%rsp) # 8-byte Spill
.p2align 4, 0x90
.LBB1_1: # =>This Loop Header: Depth=1
# Child Loop BB1_4 Depth 2
# Child Loop BB1_6 Depth 2
# Child Loop BB1_8 Depth 2
# Child Loop BB1_9 Depth 3
# Child Loop BB1_14 Depth 2
imull $652835029, %r14d, %eax # imm = 0x26E978D5
rorl $3, %eax
cmpl $4294967, %eax # imm = 0x418937
ja .LBB1_3
# %bb.2: # in Loop: Header=BB1_1 Depth=1
movl $.L.str.2, %edi
movl %r14d, %esi
xorl %eax, %eax
callq printf
.LBB1_3: # in Loop: Header=BB1_1 Depth=1
incq %rbx
movq %rbx, 32(%rsp) # 8-byte Spill
movl $.L.str.3, %esi
movq %r12, %rdi
movl %r14d, %edx
xorl %eax, %eax
callq fprintf
movq %r14, %rdi
callq malloc
movq %rax, %r15
movq %r14, %rbp
imulq %r14, %rbp
movq %rbp, %rdi
callq malloc
movq %rax, (%rsp) # 8-byte Spill
movq %r14, %rdi
callq malloc
movq %rax, %r13
movq %r14, %rdi
callq malloc
movq %rax, 24(%rsp) # 8-byte Spill
xorl %edi, %edi
callq time
movl %eax, %edi
callq srand
xorl %r12d, %r12d
.p2align 4, 0x90
.LBB1_4: # Parent Loop BB1_1 Depth=1
# => This Inner Loop Header: Depth=2
callq rand
cltq
imulq $1431655766, %rax, %rcx # imm = 0x55555556
movq %rcx, %rdx
shrq $63, %rdx
shrq $32, %rcx
addl %edx, %ecx
leal (%rcx,%rcx,2), %ecx
subl %ecx, %eax
decb %al
movb %al, (%r15,%r12)
incq %r12
cmpq %r12, %r14
jne .LBB1_4
# %bb.5: # %.preheader99.preheader
# in Loop: Header=BB1_1 Depth=1
xorl %r12d, %r12d
movq (%rsp), %rbx # 8-byte Reload
.p2align 4, 0x90
.LBB1_6: # %.preheader99
# Parent Loop BB1_1 Depth=1
# => This Inner Loop Header: Depth=2
callq rand
cltq
imulq $1431655766, %rax, %rcx # imm = 0x55555556
movq %rcx, %rdx
shrq $63, %rdx
shrq $32, %rcx
addl %edx, %ecx
leal (%rcx,%rcx,2), %ecx
subl %ecx, %eax
decb %al
movb %al, (%rbx,%r12)
incq %r12
cmpq %rbp, %r12
jb .LBB1_6
# %bb.7: # %.preheader98.preheader
# in Loop: Header=BB1_1 Depth=1
movq %r13, %rdi
xorl %esi, %esi
movq 32(%rsp), %r12 # 8-byte Reload
movq %r12, %rdx
callq memset@PLT
movq 24(%rsp), %rdi # 8-byte Reload
xorl %esi, %esi
movq %r12, %rdx
callq memset@PLT
callq clock
movq %rax, 64(%rsp) # 8-byte Spill
xorl %edx, %edx
movq 56(%rsp), %r12 # 8-byte Reload
.p2align 4, 0x90
.LBB1_8: # %.preheader
# Parent Loop BB1_1 Depth=1
# => This Loop Header: Depth=2
# Child Loop BB1_9 Depth 3
movzbl (%r13,%rdx), %esi
xorl %edi, %edi
.p2align 4, 0x90
.LBB1_9: # Parent Loop BB1_1 Depth=1
# Parent Loop BB1_8 Depth=2
# => This Inner Loop Header: Depth=3
movzbl (%rbx,%rdi), %eax
mulb (%r15,%rdi)
addb %al, %sil
incq %rdi
cmpq %rdi, %r14
jne .LBB1_9
# %bb.10: # in Loop: Header=BB1_8 Depth=2
movb %sil, (%r13,%rdx)
incq %rdx
addq %r14, %rbx
cmpq %r14, %rdx
jne .LBB1_8
# %bb.11: # in Loop: Header=BB1_1 Depth=1
callq clock
subl 64(%rsp), %eax # 4-byte Folded Reload
movl $.L.str.4, %esi
movq %r12, %rdi
movl %eax, %edx
xorl %eax, %eax
callq fprintf
leaq 48(%rsp), %rdi
movq %r14, %rsi
callq hipMalloc
leaq 40(%rsp), %rdi
movq %rbp, %rsi
callq hipMalloc
leaq 8(%rsp), %rdi
movq %r14, %rsi
callq hipMalloc
movq 48(%rsp), %rdi
movq %r15, %rsi
movq %r14, %rdx
movl $1, %ecx
callq hipMemcpy
movq 40(%rsp), %rdi
movq (%rsp), %rsi # 8-byte Reload
movq %rbp, %rdx
movl $1, %ecx
callq hipMemcpy
movq 8(%rsp), %rdi
movq 24(%rsp), %rbx # 8-byte Reload
movq %rbx, %rsi
movq %r14, %rdx
movl $1, %ecx
callq hipMemcpy
callq clock
movq %rax, %rbp
movq %r14, %rdi
movabsq $4294967296, %rax # imm = 0x100000000
orq %rax, %rdi
leaq 512(%rax), %rdx
movl $1, %esi
movl $1, %ecx
xorl %r8d, %r8d
xorl %r9d, %r9d
callq __hipPushCallConfiguration
testl %eax, %eax
jne .LBB1_13
# %bb.12: # in Loop: Header=BB1_1 Depth=1
movq 48(%rsp), %rax
movq 40(%rsp), %rcx
movq 8(%rsp), %rdx
movq %rax, 136(%rsp)
movq %rcx, 128(%rsp)
movq %rdx, 120(%rsp)
movl %r14d, 20(%rsp)
movl %r14d, 16(%rsp)
leaq 136(%rsp), %rax
movq %rax, 144(%rsp)
leaq 128(%rsp), %rax
movq %rax, 152(%rsp)
leaq 120(%rsp), %rax
movq %rax, 160(%rsp)
leaq 20(%rsp), %rax
movq %rax, 168(%rsp)
leaq 16(%rsp), %rax
movq %rax, 176(%rsp)
leaq 104(%rsp), %rdi
leaq 88(%rsp), %rsi
leaq 80(%rsp), %rdx
leaq 72(%rsp), %rcx
callq __hipPopCallConfiguration
movq 104(%rsp), %rsi
movl 112(%rsp), %edx
movq 88(%rsp), %rcx
movl 96(%rsp), %r8d
movl $_Z13resolveWeightPaS_S_ii, %edi
leaq 144(%rsp), %r9
pushq 72(%rsp)
.cfi_adjust_cfa_offset 8
pushq 88(%rsp)
.cfi_adjust_cfa_offset 8
callq hipLaunchKernel
addq $16, %rsp
.cfi_adjust_cfa_offset -16
.LBB1_13: # in Loop: Header=BB1_1 Depth=1
callq hipDeviceSynchronize
callq clock
subl %ebp, %eax
xorl %ebp, %ebp
movl $.L.str.4, %esi
movq %r12, %rdi
movl %eax, %edx
xorl %eax, %eax
callq fprintf
movq 8(%rsp), %rsi
movq %rbx, %rdi
movq %r14, %rdx
movl $2, %ecx
callq hipMemcpy
xorl %edx, %edx
.p2align 4, 0x90
.LBB1_14: # Parent Loop BB1_1 Depth=1
# => This Inner Loop Header: Depth=2
movsbl (%r13,%rbp), %eax
addl %eax, %edx
movsbl (%rbx,%rbp), %eax
subl %eax, %edx
incq %rbp
cmpq %rbp, %r14
jne .LBB1_14
# %bb.15: # in Loop: Header=BB1_1 Depth=1
movl $.L.str.5, %esi
movq %r12, %rdi
xorl %eax, %eax
callq fprintf
movq %r15, %rdi
callq free
movq (%rsp), %rdi # 8-byte Reload
callq free
movq %r13, %rdi
callq free
movq %rbx, %rdi
callq free
callq hipDeviceReset
incq %r14
movq 32(%rsp), %rbx # 8-byte Reload
cmpq $9999, %rbx # imm = 0x270F
jne .LBB1_1
# %bb.16:
movq %r12, %rdi
callq fclose
xorl %eax, %eax
addq $184, %rsp
.cfi_def_cfa_offset 56
popq %rbx
.cfi_def_cfa_offset 48
popq %r12
.cfi_def_cfa_offset 40
popq %r13
.cfi_def_cfa_offset 32
popq %r14
.cfi_def_cfa_offset 24
popq %r15
.cfi_def_cfa_offset 16
popq %rbp
.cfi_def_cfa_offset 8
retq
.Lfunc_end1:
.size main, .Lfunc_end1-main
.cfi_endproc
# -- End function
.p2align 4, 0x90 # -- Begin function __hip_module_ctor
.type __hip_module_ctor,@function
__hip_module_ctor: # @__hip_module_ctor
.cfi_startproc
# %bb.0:
subq $40, %rsp
.cfi_def_cfa_offset 48
cmpq $0, __hip_gpubin_handle(%rip)
jne .LBB2_2
# %bb.1:
movl $__hip_fatbin_wrapper, %edi
callq __hipRegisterFatBinary
movq %rax, __hip_gpubin_handle(%rip)
.LBB2_2:
movq __hip_gpubin_handle(%rip), %rdi
xorps %xmm0, %xmm0
movups %xmm0, 16(%rsp)
movups %xmm0, (%rsp)
movl $_Z13resolveWeightPaS_S_ii, %esi
movl $.L__unnamed_1, %edx
movl $.L__unnamed_1, %ecx
movl $-1, %r8d
xorl %r9d, %r9d
callq __hipRegisterFunction
movl $__hip_module_dtor, %edi
addq $40, %rsp
.cfi_def_cfa_offset 8
jmp atexit # TAILCALL
.Lfunc_end2:
.size __hip_module_ctor, .Lfunc_end2-__hip_module_ctor
.cfi_endproc
# -- End function
.p2align 4, 0x90 # -- Begin function __hip_module_dtor
.type __hip_module_dtor,@function
__hip_module_dtor: # @__hip_module_dtor
.cfi_startproc
# %bb.0:
movq __hip_gpubin_handle(%rip), %rdi
testq %rdi, %rdi
je .LBB3_2
# %bb.1:
pushq %rax
.cfi_def_cfa_offset 16
callq __hipUnregisterFatBinary
movq $0, __hip_gpubin_handle(%rip)
addq $8, %rsp
.cfi_def_cfa_offset 8
.LBB3_2:
retq
.Lfunc_end3:
.size __hip_module_dtor, .Lfunc_end3-__hip_module_dtor
.cfi_endproc
# -- End function
.type _Z13resolveWeightPaS_S_ii,@object # @_Z13resolveWeightPaS_S_ii
.section .rodata,"a",@progbits
.globl _Z13resolveWeightPaS_S_ii
.p2align 3, 0x0
_Z13resolveWeightPaS_S_ii:
.quad _Z28__device_stub__resolveWeightPaS_S_ii
.size _Z13resolveWeightPaS_S_ii, 8
.type .L.str,@object # @.str
.section .rodata.str1.1,"aMS",@progbits,1
.L.str:
.asciz "out.txt"
.size .L.str, 8
.type .L.str.1,@object # @.str.1
.L.str.1:
.asciz "w"
.size .L.str.1, 2
.type .L.str.2,@object # @.str.2
.L.str.2:
.asciz "Starting run %d\n"
.size .L.str.2, 17
.type .L.str.3,@object # @.str.3
.L.str.3:
.asciz "%d"
.size .L.str.3, 3
.type .L.str.4,@object # @.str.4
.L.str.4:
.asciz ",%d"
.size .L.str.4, 4
.type .L.str.5,@object # @.str.5
.L.str.5:
.asciz ",%d\n"
.size .L.str.5, 5
.type .L__unnamed_1,@object # @0
.L__unnamed_1:
.asciz "_Z13resolveWeightPaS_S_ii"
.size .L__unnamed_1, 26
.type __hip_fatbin_wrapper,@object # @__hip_fatbin_wrapper
.section .hipFatBinSegment,"a",@progbits
.p2align 3, 0x0
__hip_fatbin_wrapper:
.long 1212764230 # 0x48495046
.long 1 # 0x1
.quad __hip_fatbin
.quad 0
.size __hip_fatbin_wrapper, 24
.type __hip_gpubin_handle,@object # @__hip_gpubin_handle
.local __hip_gpubin_handle
.comm __hip_gpubin_handle,8,8
.section .init_array,"aw",@init_array
.p2align 3, 0x0
.quad __hip_module_ctor
.type __hip_cuid_,@object # @__hip_cuid_
.bss
.globl __hip_cuid_
__hip_cuid_:
.byte 0 # 0x0
.size __hip_cuid_, 1
.section ".linker-options","e",@llvm_linker_options
.ident "AMD clang version 18.0.0git (https://github.com/RadeonOpenCompute/llvm-project roc-6.3.2 25012 e5bf7e55c91490b07c49d8960fa7983d864936c4)"
.section ".note.GNU-stack","",@progbits
.addrsig
.addrsig_sym _Z28__device_stub__resolveWeightPaS_S_ii
.addrsig_sym __hip_module_ctor
.addrsig_sym __hip_module_dtor
.addrsig_sym _Z13resolveWeightPaS_S_ii
.addrsig_sym __hip_fatbin
.addrsig_sym __hip_fatbin_wrapper
.addrsig_sym __hip_cuid_ |
You are a helpful coding assistant specialized in converting CUDA source code to CUDA host assembly. | #include <stdio.h>
#include <stdlib.h>
#include <time.h>
#include <iostream>
using namespace std;
__global__
void sumaMatrixKernel(float* A, float* B, float* C, int n)
{
int i = threadIdx.x + (blockDim.x * blockIdx.x);
if(i<n*n)
C[i] = A[i] +B[i];
}
__global__
void sumaMatrixKernelRow(float* A, float* B, float* C, int n)
{
int i = threadIdx.x + (blockDim.x * blockIdx.x);
if(i<n)
{
for(int j=0;j<n;j++)
C[i*n+j] = A[i*n+j] + B[i*n+j];
}
}
__global__
void sumaMatrixKernelColumn(float* A, float* B, float* C, int n)
{
int i = threadIdx.x + (blockDim.x * blockIdx.x);
if(i<n)
{
for(int j=0;j<n;j++)
C[i+j*n] = A[i+j*n] + B[i+j*n];
}
}
void sumaMatrix(float* A, float* B, float* C, int tam)
{
int size = (tam*tam) * sizeof(float);
float *d_A,*d_B,*d_C;
cudaMalloc((void**)&d_A,size);
cudaMalloc((void**)&d_B,size);
cudaMalloc((void**)&d_C,size);
cudaMemcpy(d_A,A,size,cudaMemcpyHostToDevice);
cudaMemcpy(d_B,B,size,cudaMemcpyHostToDevice);
sumaMatrixKernel<<<ceil(tam*tam/256.0),256>>>(d_A,d_B,d_C,tam);
//sumaMatrixKernelRow<<<ceil(tam/256.0),256>>>(d_A,d_B,d_C,tam);
//sumaMatrixKernelColumn<<<ceil(tam/256.0),256>>>(d_A,d_B,d_C,tam);
cudaMemcpy(C,d_C,size,cudaMemcpyDeviceToHost);
cudaFree(d_A);cudaFree(d_B);cudaFree(d_C);
}
void datosRandom(float *array,int n){
//srand(time(NULL));
for(int i = 0; i < n; i++){
for(int j = 0; j < n; j++)
array[i*n+j] = 1;
}
}
void printMatrix(float *array,int n){
for(int i = 0; i < n; i++){
printf("%f ", array[i]);
}
printf("\n");
}
int main()
{
int n = 10;
float *h_A,*h_B,*h_C;
h_A = new float[n*n];
h_B = new float[n*n];
h_C = new float[n*n];
datosRandom(h_A,n);
datosRandom(h_B,n);
sumaMatrix(h_A,h_B,h_C,n);
printMatrix(h_C,n);
return 0;
} | .file "tmpxft_00188065_00000000-6_sumaMatriz.cudafe1.cpp"
.text
#APP
.globl _ZSt21ios_base_library_initv
#NO_APP
.type _ZL26__cudaUnregisterBinaryUtilv, @function
_ZL26__cudaUnregisterBinaryUtilv:
.LFB3675:
.cfi_startproc
endbr64
subq $8, %rsp
.cfi_def_cfa_offset 16
movq _ZL20__cudaFatCubinHandle(%rip), %rdi
call __cudaUnregisterFatBinary@PLT
addq $8, %rsp
.cfi_def_cfa_offset 8
ret
.cfi_endproc
.LFE3675:
.size _ZL26__cudaUnregisterBinaryUtilv, .-_ZL26__cudaUnregisterBinaryUtilv
.globl _Z11datosRandomPfi
.type _Z11datosRandomPfi, @function
_Z11datosRandomPfi:
.LFB3670:
.cfi_startproc
endbr64
testl %esi, %esi
jle .L3
movslq %esi, %rax
leaq 0(,%rax,4), %r8
leaq (%rdi,%r8), %rdx
negq %rax
leaq 0(,%rax,4), %rdi
movl $0, %ecx
movss .LC0(%rip), %xmm0
.L5:
leaq (%rdx,%rdi), %rax
.L6:
movss %xmm0, (%rax)
addq $4, %rax
cmpq %rdx, %rax
jne .L6
addl $1, %ecx
addq %r8, %rdx
cmpl %ecx, %esi
jne .L5
.L3:
ret
.cfi_endproc
.LFE3670:
.size _Z11datosRandomPfi, .-_Z11datosRandomPfi
.section .rodata.str1.1,"aMS",@progbits,1
.LC1:
.string "%f "
.LC2:
.string "\n"
.text
.globl _Z11printMatrixPfi
.type _Z11printMatrixPfi, @function
_Z11printMatrixPfi:
.LFB3671:
.cfi_startproc
endbr64
pushq %r12
.cfi_def_cfa_offset 16
.cfi_offset 12, -16
pushq %rbp
.cfi_def_cfa_offset 24
.cfi_offset 6, -24
pushq %rbx
.cfi_def_cfa_offset 32
.cfi_offset 3, -32
testl %esi, %esi
jle .L9
movq %rdi, %rbx
movslq %esi, %rsi
leaq (%rdi,%rsi,4), %r12
leaq .LC1(%rip), %rbp
.L10:
pxor %xmm0, %xmm0
cvtss2sd (%rbx), %xmm0
movq %rbp, %rsi
movl $2, %edi
movl $1, %eax
call __printf_chk@PLT
addq $4, %rbx
cmpq %r12, %rbx
jne .L10
.L9:
leaq .LC2(%rip), %rsi
movl $2, %edi
movl $0, %eax
call __printf_chk@PLT
popq %rbx
.cfi_def_cfa_offset 24
popq %rbp
.cfi_def_cfa_offset 16
popq %r12
.cfi_def_cfa_offset 8
ret
.cfi_endproc
.LFE3671:
.size _Z11printMatrixPfi, .-_Z11printMatrixPfi
.globl _Z41__device_stub__Z16sumaMatrixKernelPfS_S_iPfS_S_i
.type _Z41__device_stub__Z16sumaMatrixKernelPfS_S_iPfS_S_i, @function
_Z41__device_stub__Z16sumaMatrixKernelPfS_S_iPfS_S_i:
.LFB3697:
.cfi_startproc
endbr64
subq $152, %rsp
.cfi_def_cfa_offset 160
movq %rdi, 24(%rsp)
movq %rsi, 16(%rsp)
movq %rdx, 8(%rsp)
movl %ecx, 4(%rsp)
movq %fs:40, %rax
movq %rax, 136(%rsp)
xorl %eax, %eax
leaq 24(%rsp), %rax
movq %rax, 96(%rsp)
leaq 16(%rsp), %rax
movq %rax, 104(%rsp)
leaq 8(%rsp), %rax
movq %rax, 112(%rsp)
leaq 4(%rsp), %rax
movq %rax, 120(%rsp)
movl $1, 48(%rsp)
movl $1, 52(%rsp)
movl $1, 56(%rsp)
movl $1, 60(%rsp)
movl $1, 64(%rsp)
movl $1, 68(%rsp)
leaq 40(%rsp), %rcx
leaq 32(%rsp), %rdx
leaq 60(%rsp), %rsi
leaq 48(%rsp), %rdi
call __cudaPopCallConfiguration@PLT
testl %eax, %eax
je .L17
.L13:
movq 136(%rsp), %rax
subq %fs:40, %rax
jne .L18
addq $152, %rsp
.cfi_remember_state
.cfi_def_cfa_offset 8
ret
.L17:
.cfi_restore_state
pushq 40(%rsp)
.cfi_def_cfa_offset 168
pushq 40(%rsp)
.cfi_def_cfa_offset 176
leaq 112(%rsp), %r9
movq 76(%rsp), %rcx
movl 84(%rsp), %r8d
movq 64(%rsp), %rsi
movl 72(%rsp), %edx
leaq _Z16sumaMatrixKernelPfS_S_i(%rip), %rdi
call cudaLaunchKernel@PLT
addq $16, %rsp
.cfi_def_cfa_offset 160
jmp .L13
.L18:
call __stack_chk_fail@PLT
.cfi_endproc
.LFE3697:
.size _Z41__device_stub__Z16sumaMatrixKernelPfS_S_iPfS_S_i, .-_Z41__device_stub__Z16sumaMatrixKernelPfS_S_iPfS_S_i
.globl _Z16sumaMatrixKernelPfS_S_i
.type _Z16sumaMatrixKernelPfS_S_i, @function
_Z16sumaMatrixKernelPfS_S_i:
.LFB3698:
.cfi_startproc
endbr64
subq $8, %rsp
.cfi_def_cfa_offset 16
call _Z41__device_stub__Z16sumaMatrixKernelPfS_S_iPfS_S_i
addq $8, %rsp
.cfi_def_cfa_offset 8
ret
.cfi_endproc
.LFE3698:
.size _Z16sumaMatrixKernelPfS_S_i, .-_Z16sumaMatrixKernelPfS_S_i
.globl _Z10sumaMatrixPfS_S_i
.type _Z10sumaMatrixPfS_S_i, @function
_Z10sumaMatrixPfS_S_i:
.LFB3669:
.cfi_startproc
endbr64
pushq %r15
.cfi_def_cfa_offset 16
.cfi_offset 15, -16
pushq %r14
.cfi_def_cfa_offset 24
.cfi_offset 14, -24
pushq %r13
.cfi_def_cfa_offset 32
.cfi_offset 13, -32
pushq %r12
.cfi_def_cfa_offset 40
.cfi_offset 12, -40
pushq %rbp
.cfi_def_cfa_offset 48
.cfi_offset 6, -48
pushq %rbx
.cfi_def_cfa_offset 56
.cfi_offset 3, -56
subq $72, %rsp
.cfi_def_cfa_offset 128
movq %rdi, %r14
movq %rsi, %r13
movq %rdx, %r12
movl %ecx, %ebp
movq %fs:40, %rax
movq %rax, 56(%rsp)
xorl %eax, %eax
movl %ecx, %r15d
imull %ecx, %r15d
leal 0(,%r15,4), %ebx
movslq %ebx, %rbx
leaq 8(%rsp), %rdi
movq %rbx, %rsi
call cudaMalloc@PLT
leaq 16(%rsp), %rdi
movq %rbx, %rsi
call cudaMalloc@PLT
leaq 24(%rsp), %rdi
movq %rbx, %rsi
call cudaMalloc@PLT
movl $1, %ecx
movq %rbx, %rdx
movq %r14, %rsi
movq 8(%rsp), %rdi
call cudaMemcpy@PLT
movl $1, %ecx
movq %rbx, %rdx
movq %r13, %rsi
movq 16(%rsp), %rdi
call cudaMemcpy@PLT
movl $256, 44(%rsp)
movl $1, 48(%rsp)
movl $1, 52(%rsp)
pxor %xmm0, %xmm0
cvtsi2sdl %r15d, %xmm0
mulsd .LC3(%rip), %xmm0
movapd %xmm0, %xmm3
movsd .LC7(%rip), %xmm2
movapd %xmm0, %xmm1
andpd %xmm2, %xmm1
movsd .LC4(%rip), %xmm4
ucomisd %xmm1, %xmm4
jbe .L22
cvttsd2siq %xmm0, %rax
pxor %xmm1, %xmm1
cvtsi2sdq %rax, %xmm1
cmpnlesd %xmm1, %xmm3
movsd .LC6(%rip), %xmm4
andpd %xmm4, %xmm3
addsd %xmm1, %xmm3
andnpd %xmm0, %xmm2
orpd %xmm2, %xmm3
.L22:
cvttsd2siq %xmm3, %rax
movl %eax, 32(%rsp)
movl $1, 36(%rsp)
movl 52(%rsp), %ecx
movl $0, %r9d
movl $0, %r8d
movq 44(%rsp), %rdx
movq 32(%rsp), %rdi
movl $1, %esi
call __cudaPushCallConfiguration@PLT
testl %eax, %eax
je .L26
.L23:
movl $2, %ecx
movq %rbx, %rdx
movq 24(%rsp), %rsi
movq %r12, %rdi
call cudaMemcpy@PLT
movq 8(%rsp), %rdi
call cudaFree@PLT
movq 16(%rsp), %rdi
call cudaFree@PLT
movq 24(%rsp), %rdi
call cudaFree@PLT
movq 56(%rsp), %rax
subq %fs:40, %rax
jne .L27
addq $72, %rsp
.cfi_remember_state
.cfi_def_cfa_offset 56
popq %rbx
.cfi_def_cfa_offset 48
popq %rbp
.cfi_def_cfa_offset 40
popq %r12
.cfi_def_cfa_offset 32
popq %r13
.cfi_def_cfa_offset 24
popq %r14
.cfi_def_cfa_offset 16
popq %r15
.cfi_def_cfa_offset 8
ret
.L26:
.cfi_restore_state
movl %ebp, %ecx
movq 24(%rsp), %rdx
movq 16(%rsp), %rsi
movq 8(%rsp), %rdi
call _Z41__device_stub__Z16sumaMatrixKernelPfS_S_iPfS_S_i
jmp .L23
.L27:
call __stack_chk_fail@PLT
.cfi_endproc
.LFE3669:
.size _Z10sumaMatrixPfS_S_i, .-_Z10sumaMatrixPfS_S_i
.globl main
.type main, @function
main:
.LFB3672:
.cfi_startproc
endbr64
pushq %r12
.cfi_def_cfa_offset 16
.cfi_offset 12, -16
pushq %rbp
.cfi_def_cfa_offset 24
.cfi_offset 6, -24
pushq %rbx
.cfi_def_cfa_offset 32
.cfi_offset 3, -32
movl $400, %edi
call _Znam@PLT
movq %rax, %rbp
movl $400, %edi
call _Znam@PLT
movq %rax, %r12
movl $400, %edi
call _Znam@PLT
movq %rax, %rbx
movl $10, %esi
movq %rbp, %rdi
call _Z11datosRandomPfi
movl $10, %esi
movq %r12, %rdi
call _Z11datosRandomPfi
movl $10, %ecx
movq %rbx, %rdx
movq %r12, %rsi
movq %rbp, %rdi
call _Z10sumaMatrixPfS_S_i
movl $10, %esi
movq %rbx, %rdi
call _Z11printMatrixPfi
movl $0, %eax
popq %rbx
.cfi_def_cfa_offset 24
popq %rbp
.cfi_def_cfa_offset 16
popq %r12
.cfi_def_cfa_offset 8
ret
.cfi_endproc
.LFE3672:
.size main, .-main
.globl _Z44__device_stub__Z19sumaMatrixKernelRowPfS_S_iPfS_S_i
.type _Z44__device_stub__Z19sumaMatrixKernelRowPfS_S_iPfS_S_i, @function
_Z44__device_stub__Z19sumaMatrixKernelRowPfS_S_iPfS_S_i:
.LFB3699:
.cfi_startproc
endbr64
subq $152, %rsp
.cfi_def_cfa_offset 160
movq %rdi, 24(%rsp)
movq %rsi, 16(%rsp)
movq %rdx, 8(%rsp)
movl %ecx, 4(%rsp)
movq %fs:40, %rax
movq %rax, 136(%rsp)
xorl %eax, %eax
leaq 24(%rsp), %rax
movq %rax, 96(%rsp)
leaq 16(%rsp), %rax
movq %rax, 104(%rsp)
leaq 8(%rsp), %rax
movq %rax, 112(%rsp)
leaq 4(%rsp), %rax
movq %rax, 120(%rsp)
movl $1, 48(%rsp)
movl $1, 52(%rsp)
movl $1, 56(%rsp)
movl $1, 60(%rsp)
movl $1, 64(%rsp)
movl $1, 68(%rsp)
leaq 40(%rsp), %rcx
leaq 32(%rsp), %rdx
leaq 60(%rsp), %rsi
leaq 48(%rsp), %rdi
call __cudaPopCallConfiguration@PLT
testl %eax, %eax
je .L34
.L30:
movq 136(%rsp), %rax
subq %fs:40, %rax
jne .L35
addq $152, %rsp
.cfi_remember_state
.cfi_def_cfa_offset 8
ret
.L34:
.cfi_restore_state
pushq 40(%rsp)
.cfi_def_cfa_offset 168
pushq 40(%rsp)
.cfi_def_cfa_offset 176
leaq 112(%rsp), %r9
movq 76(%rsp), %rcx
movl 84(%rsp), %r8d
movq 64(%rsp), %rsi
movl 72(%rsp), %edx
leaq _Z19sumaMatrixKernelRowPfS_S_i(%rip), %rdi
call cudaLaunchKernel@PLT
addq $16, %rsp
.cfi_def_cfa_offset 160
jmp .L30
.L35:
call __stack_chk_fail@PLT
.cfi_endproc
.LFE3699:
.size _Z44__device_stub__Z19sumaMatrixKernelRowPfS_S_iPfS_S_i, .-_Z44__device_stub__Z19sumaMatrixKernelRowPfS_S_iPfS_S_i
.globl _Z19sumaMatrixKernelRowPfS_S_i
.type _Z19sumaMatrixKernelRowPfS_S_i, @function
_Z19sumaMatrixKernelRowPfS_S_i:
.LFB3700:
.cfi_startproc
endbr64
subq $8, %rsp
.cfi_def_cfa_offset 16
call _Z44__device_stub__Z19sumaMatrixKernelRowPfS_S_iPfS_S_i
addq $8, %rsp
.cfi_def_cfa_offset 8
ret
.cfi_endproc
.LFE3700:
.size _Z19sumaMatrixKernelRowPfS_S_i, .-_Z19sumaMatrixKernelRowPfS_S_i
.globl _Z47__device_stub__Z22sumaMatrixKernelColumnPfS_S_iPfS_S_i
.type _Z47__device_stub__Z22sumaMatrixKernelColumnPfS_S_iPfS_S_i, @function
_Z47__device_stub__Z22sumaMatrixKernelColumnPfS_S_iPfS_S_i:
.LFB3701:
.cfi_startproc
endbr64
subq $152, %rsp
.cfi_def_cfa_offset 160
movq %rdi, 24(%rsp)
movq %rsi, 16(%rsp)
movq %rdx, 8(%rsp)
movl %ecx, 4(%rsp)
movq %fs:40, %rax
movq %rax, 136(%rsp)
xorl %eax, %eax
leaq 24(%rsp), %rax
movq %rax, 96(%rsp)
leaq 16(%rsp), %rax
movq %rax, 104(%rsp)
leaq 8(%rsp), %rax
movq %rax, 112(%rsp)
leaq 4(%rsp), %rax
movq %rax, 120(%rsp)
movl $1, 48(%rsp)
movl $1, 52(%rsp)
movl $1, 56(%rsp)
movl $1, 60(%rsp)
movl $1, 64(%rsp)
movl $1, 68(%rsp)
leaq 40(%rsp), %rcx
leaq 32(%rsp), %rdx
leaq 60(%rsp), %rsi
leaq 48(%rsp), %rdi
call __cudaPopCallConfiguration@PLT
testl %eax, %eax
je .L42
.L38:
movq 136(%rsp), %rax
subq %fs:40, %rax
jne .L43
addq $152, %rsp
.cfi_remember_state
.cfi_def_cfa_offset 8
ret
.L42:
.cfi_restore_state
pushq 40(%rsp)
.cfi_def_cfa_offset 168
pushq 40(%rsp)
.cfi_def_cfa_offset 176
leaq 112(%rsp), %r9
movq 76(%rsp), %rcx
movl 84(%rsp), %r8d
movq 64(%rsp), %rsi
movl 72(%rsp), %edx
leaq _Z22sumaMatrixKernelColumnPfS_S_i(%rip), %rdi
call cudaLaunchKernel@PLT
addq $16, %rsp
.cfi_def_cfa_offset 160
jmp .L38
.L43:
call __stack_chk_fail@PLT
.cfi_endproc
.LFE3701:
.size _Z47__device_stub__Z22sumaMatrixKernelColumnPfS_S_iPfS_S_i, .-_Z47__device_stub__Z22sumaMatrixKernelColumnPfS_S_iPfS_S_i
.globl _Z22sumaMatrixKernelColumnPfS_S_i
.type _Z22sumaMatrixKernelColumnPfS_S_i, @function
_Z22sumaMatrixKernelColumnPfS_S_i:
.LFB3702:
.cfi_startproc
endbr64
subq $8, %rsp
.cfi_def_cfa_offset 16
call _Z47__device_stub__Z22sumaMatrixKernelColumnPfS_S_iPfS_S_i
addq $8, %rsp
.cfi_def_cfa_offset 8
ret
.cfi_endproc
.LFE3702:
.size _Z22sumaMatrixKernelColumnPfS_S_i, .-_Z22sumaMatrixKernelColumnPfS_S_i
.section .rodata.str1.8,"aMS",@progbits,1
.align 8
.LC8:
.string "_Z22sumaMatrixKernelColumnPfS_S_i"
.align 8
.LC9:
.string "_Z19sumaMatrixKernelRowPfS_S_i"
.section .rodata.str1.1
.LC10:
.string "_Z16sumaMatrixKernelPfS_S_i"
.text
.type _ZL24__sti____cudaRegisterAllv, @function
_ZL24__sti____cudaRegisterAllv:
.LFB3704:
.cfi_startproc
endbr64
pushq %rbx
.cfi_def_cfa_offset 16
.cfi_offset 3, -16
leaq _ZL15__fatDeviceText(%rip), %rdi
call __cudaRegisterFatBinary@PLT
movq %rax, %rbx
movq %rax, _ZL20__cudaFatCubinHandle(%rip)
pushq $0
.cfi_def_cfa_offset 24
pushq $0
.cfi_def_cfa_offset 32
pushq $0
.cfi_def_cfa_offset 40
pushq $0
.cfi_def_cfa_offset 48
movl $0, %r9d
movl $-1, %r8d
leaq .LC8(%rip), %rdx
movq %rdx, %rcx
leaq _Z22sumaMatrixKernelColumnPfS_S_i(%rip), %rsi
movq %rax, %rdi
call __cudaRegisterFunction@PLT
addq $32, %rsp
.cfi_def_cfa_offset 16
pushq $0
.cfi_def_cfa_offset 24
pushq $0
.cfi_def_cfa_offset 32
pushq $0
.cfi_def_cfa_offset 40
pushq $0
.cfi_def_cfa_offset 48
movl $0, %r9d
movl $-1, %r8d
leaq .LC9(%rip), %rdx
movq %rdx, %rcx
leaq _Z19sumaMatrixKernelRowPfS_S_i(%rip), %rsi
movq %rbx, %rdi
call __cudaRegisterFunction@PLT
addq $32, %rsp
.cfi_def_cfa_offset 16
pushq $0
.cfi_def_cfa_offset 24
pushq $0
.cfi_def_cfa_offset 32
pushq $0
.cfi_def_cfa_offset 40
pushq $0
.cfi_def_cfa_offset 48
movl $0, %r9d
movl $-1, %r8d
leaq .LC10(%rip), %rdx
movq %rdx, %rcx
leaq _Z16sumaMatrixKernelPfS_S_i(%rip), %rsi
movq %rbx, %rdi
call __cudaRegisterFunction@PLT
addq $32, %rsp
.cfi_def_cfa_offset 16
movq _ZL20__cudaFatCubinHandle(%rip), %rdi
call __cudaRegisterFatBinaryEnd@PLT
leaq _ZL26__cudaUnregisterBinaryUtilv(%rip), %rdi
call atexit@PLT
popq %rbx
.cfi_def_cfa_offset 8
ret
.cfi_endproc
.LFE3704:
.size _ZL24__sti____cudaRegisterAllv, .-_ZL24__sti____cudaRegisterAllv
.section .init_array,"aw"
.align 8
.quad _ZL24__sti____cudaRegisterAllv
.section .nvFatBinSegment,"aw"
.align 8
.type _ZL15__fatDeviceText, @object
.size _ZL15__fatDeviceText, 24
_ZL15__fatDeviceText:
.long 1180844977
.long 1
.quad fatbinData
.quad 0
.local _ZL20__cudaFatCubinHandle
.comm _ZL20__cudaFatCubinHandle,8,8
.section .rodata.cst4,"aM",@progbits,4
.align 4
.LC0:
.long 1065353216
.section .rodata.cst8,"aM",@progbits,8
.align 8
.LC3:
.long 0
.long 1064304640
.align 8
.LC4:
.long 0
.long 1127219200
.align 8
.LC6:
.long 0
.long 1072693248
.align 8
.LC7:
.long -1
.long 2147483647
.ident "GCC: (Ubuntu 13.3.0-6ubuntu2~24.04) 13.3.0"
.section .note.GNU-stack,"",@progbits
.section .note.gnu.property,"a"
.align 8
.long 1f - 0f
.long 4f - 1f
.long 5
0:
.string "GNU"
1:
.align 8
.long 0xc0000002
.long 3f - 2f
2:
.long 0x3
3:
.align 8
4: |
You are a helpful coding assistant specialized in converting CUDA source code to HIP/AMD source code. | #include <stdio.h>
#include <stdlib.h>
#include <time.h>
#include <iostream>
using namespace std;
__global__
void sumaMatrixKernel(float* A, float* B, float* C, int n)
{
int i = threadIdx.x + (blockDim.x * blockIdx.x);
if(i<n*n)
C[i] = A[i] +B[i];
}
__global__
void sumaMatrixKernelRow(float* A, float* B, float* C, int n)
{
int i = threadIdx.x + (blockDim.x * blockIdx.x);
if(i<n)
{
for(int j=0;j<n;j++)
C[i*n+j] = A[i*n+j] + B[i*n+j];
}
}
__global__
void sumaMatrixKernelColumn(float* A, float* B, float* C, int n)
{
int i = threadIdx.x + (blockDim.x * blockIdx.x);
if(i<n)
{
for(int j=0;j<n;j++)
C[i+j*n] = A[i+j*n] + B[i+j*n];
}
}
void sumaMatrix(float* A, float* B, float* C, int tam)
{
int size = (tam*tam) * sizeof(float);
float *d_A,*d_B,*d_C;
cudaMalloc((void**)&d_A,size);
cudaMalloc((void**)&d_B,size);
cudaMalloc((void**)&d_C,size);
cudaMemcpy(d_A,A,size,cudaMemcpyHostToDevice);
cudaMemcpy(d_B,B,size,cudaMemcpyHostToDevice);
sumaMatrixKernel<<<ceil(tam*tam/256.0),256>>>(d_A,d_B,d_C,tam);
//sumaMatrixKernelRow<<<ceil(tam/256.0),256>>>(d_A,d_B,d_C,tam);
//sumaMatrixKernelColumn<<<ceil(tam/256.0),256>>>(d_A,d_B,d_C,tam);
cudaMemcpy(C,d_C,size,cudaMemcpyDeviceToHost);
cudaFree(d_A);cudaFree(d_B);cudaFree(d_C);
}
void datosRandom(float *array,int n){
//srand(time(NULL));
for(int i = 0; i < n; i++){
for(int j = 0; j < n; j++)
array[i*n+j] = 1;
}
}
void printMatrix(float *array,int n){
for(int i = 0; i < n; i++){
printf("%f ", array[i]);
}
printf("\n");
}
int main()
{
int n = 10;
float *h_A,*h_B,*h_C;
h_A = new float[n*n];
h_B = new float[n*n];
h_C = new float[n*n];
datosRandom(h_A,n);
datosRandom(h_B,n);
sumaMatrix(h_A,h_B,h_C,n);
printMatrix(h_C,n);
return 0;
} | #include <hip/hip_runtime.h>
#include <stdio.h>
#include <stdlib.h>
#include <time.h>
#include <iostream>
using namespace std;
__global__
void sumaMatrixKernel(float* A, float* B, float* C, int n)
{
int i = threadIdx.x + (blockDim.x * blockIdx.x);
if(i<n*n)
C[i] = A[i] +B[i];
}
__global__
void sumaMatrixKernelRow(float* A, float* B, float* C, int n)
{
int i = threadIdx.x + (blockDim.x * blockIdx.x);
if(i<n)
{
for(int j=0;j<n;j++)
C[i*n+j] = A[i*n+j] + B[i*n+j];
}
}
__global__
void sumaMatrixKernelColumn(float* A, float* B, float* C, int n)
{
int i = threadIdx.x + (blockDim.x * blockIdx.x);
if(i<n)
{
for(int j=0;j<n;j++)
C[i+j*n] = A[i+j*n] + B[i+j*n];
}
}
void sumaMatrix(float* A, float* B, float* C, int tam)
{
int size = (tam*tam) * sizeof(float);
float *d_A,*d_B,*d_C;
hipMalloc((void**)&d_A,size);
hipMalloc((void**)&d_B,size);
hipMalloc((void**)&d_C,size);
hipMemcpy(d_A,A,size,hipMemcpyHostToDevice);
hipMemcpy(d_B,B,size,hipMemcpyHostToDevice);
sumaMatrixKernel<<<ceil(tam*tam/256.0),256>>>(d_A,d_B,d_C,tam);
//sumaMatrixKernelRow<<<ceil(tam/256.0),256>>>(d_A,d_B,d_C,tam);
//sumaMatrixKernelColumn<<<ceil(tam/256.0),256>>>(d_A,d_B,d_C,tam);
hipMemcpy(C,d_C,size,hipMemcpyDeviceToHost);
hipFree(d_A);hipFree(d_B);hipFree(d_C);
}
void datosRandom(float *array,int n){
//srand(time(NULL));
for(int i = 0; i < n; i++){
for(int j = 0; j < n; j++)
array[i*n+j] = 1;
}
}
void printMatrix(float *array,int n){
for(int i = 0; i < n; i++){
printf("%f ", array[i]);
}
printf("\n");
}
int main()
{
int n = 10;
float *h_A,*h_B,*h_C;
h_A = new float[n*n];
h_B = new float[n*n];
h_C = new float[n*n];
datosRandom(h_A,n);
datosRandom(h_B,n);
sumaMatrix(h_A,h_B,h_C,n);
printMatrix(h_C,n);
return 0;
} |
You are a helpful coding assistant specialized in converting HIP source code to AMD device assembly. | #include <hip/hip_runtime.h>
#include <stdio.h>
#include <stdlib.h>
#include <time.h>
#include <iostream>
using namespace std;
__global__
void sumaMatrixKernel(float* A, float* B, float* C, int n)
{
int i = threadIdx.x + (blockDim.x * blockIdx.x);
if(i<n*n)
C[i] = A[i] +B[i];
}
__global__
void sumaMatrixKernelRow(float* A, float* B, float* C, int n)
{
int i = threadIdx.x + (blockDim.x * blockIdx.x);
if(i<n)
{
for(int j=0;j<n;j++)
C[i*n+j] = A[i*n+j] + B[i*n+j];
}
}
__global__
void sumaMatrixKernelColumn(float* A, float* B, float* C, int n)
{
int i = threadIdx.x + (blockDim.x * blockIdx.x);
if(i<n)
{
for(int j=0;j<n;j++)
C[i+j*n] = A[i+j*n] + B[i+j*n];
}
}
void sumaMatrix(float* A, float* B, float* C, int tam)
{
int size = (tam*tam) * sizeof(float);
float *d_A,*d_B,*d_C;
hipMalloc((void**)&d_A,size);
hipMalloc((void**)&d_B,size);
hipMalloc((void**)&d_C,size);
hipMemcpy(d_A,A,size,hipMemcpyHostToDevice);
hipMemcpy(d_B,B,size,hipMemcpyHostToDevice);
sumaMatrixKernel<<<ceil(tam*tam/256.0),256>>>(d_A,d_B,d_C,tam);
//sumaMatrixKernelRow<<<ceil(tam/256.0),256>>>(d_A,d_B,d_C,tam);
//sumaMatrixKernelColumn<<<ceil(tam/256.0),256>>>(d_A,d_B,d_C,tam);
hipMemcpy(C,d_C,size,hipMemcpyDeviceToHost);
hipFree(d_A);hipFree(d_B);hipFree(d_C);
}
void datosRandom(float *array,int n){
//srand(time(NULL));
for(int i = 0; i < n; i++){
for(int j = 0; j < n; j++)
array[i*n+j] = 1;
}
}
void printMatrix(float *array,int n){
for(int i = 0; i < n; i++){
printf("%f ", array[i]);
}
printf("\n");
}
int main()
{
int n = 10;
float *h_A,*h_B,*h_C;
h_A = new float[n*n];
h_B = new float[n*n];
h_C = new float[n*n];
datosRandom(h_A,n);
datosRandom(h_B,n);
sumaMatrix(h_A,h_B,h_C,n);
printMatrix(h_C,n);
return 0;
} | .text
.amdgcn_target "amdgcn-amd-amdhsa--gfx1100"
.protected _Z16sumaMatrixKernelPfS_S_i
.globl _Z16sumaMatrixKernelPfS_S_i
.p2align 8
.type _Z16sumaMatrixKernelPfS_S_i,@function
_Z16sumaMatrixKernelPfS_S_i:
s_clause 0x1
s_load_b32 s2, s[0:1], 0x2c
s_load_b32 s3, s[0:1], 0x18
s_waitcnt lgkmcnt(0)
s_and_b32 s2, s2, 0xffff
s_mul_i32 s3, s3, s3
v_mad_u64_u32 v[1:2], null, s15, s2, v[0:1]
s_mov_b32 s2, exec_lo
s_delay_alu instid0(VALU_DEP_1)
v_cmpx_gt_i32_e64 s3, v1
s_cbranch_execz .LBB0_2
s_load_b128 s[4:7], s[0:1], 0x0
v_ashrrev_i32_e32 v2, 31, v1
s_load_b64 s[0:1], s[0:1], 0x10
s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
v_lshlrev_b64 v[0:1], 2, v[1:2]
s_waitcnt lgkmcnt(0)
v_add_co_u32 v2, vcc_lo, s4, v0
s_delay_alu instid0(VALU_DEP_2)
v_add_co_ci_u32_e32 v3, vcc_lo, s5, v1, vcc_lo
v_add_co_u32 v4, vcc_lo, s6, v0
v_add_co_ci_u32_e32 v5, vcc_lo, s7, v1, vcc_lo
v_add_co_u32 v0, vcc_lo, s0, v0
global_load_b32 v2, v[2:3], off
global_load_b32 v3, v[4:5], off
v_add_co_ci_u32_e32 v1, vcc_lo, s1, v1, vcc_lo
s_waitcnt vmcnt(0)
v_add_f32_e32 v2, v2, v3
global_store_b32 v[0:1], v2, off
.LBB0_2:
s_nop 0
s_sendmsg sendmsg(MSG_DEALLOC_VGPRS)
s_endpgm
.section .rodata,"a",@progbits
.p2align 6, 0x0
.amdhsa_kernel _Z16sumaMatrixKernelPfS_S_i
.amdhsa_group_segment_fixed_size 0
.amdhsa_private_segment_fixed_size 0
.amdhsa_kernarg_size 288
.amdhsa_user_sgpr_count 15
.amdhsa_user_sgpr_dispatch_ptr 0
.amdhsa_user_sgpr_queue_ptr 0
.amdhsa_user_sgpr_kernarg_segment_ptr 1
.amdhsa_user_sgpr_dispatch_id 0
.amdhsa_user_sgpr_private_segment_size 0
.amdhsa_wavefront_size32 1
.amdhsa_uses_dynamic_stack 0
.amdhsa_enable_private_segment 0
.amdhsa_system_sgpr_workgroup_id_x 1
.amdhsa_system_sgpr_workgroup_id_y 0
.amdhsa_system_sgpr_workgroup_id_z 0
.amdhsa_system_sgpr_workgroup_info 0
.amdhsa_system_vgpr_workitem_id 0
.amdhsa_next_free_vgpr 6
.amdhsa_next_free_sgpr 16
.amdhsa_float_round_mode_32 0
.amdhsa_float_round_mode_16_64 0
.amdhsa_float_denorm_mode_32 3
.amdhsa_float_denorm_mode_16_64 3
.amdhsa_dx10_clamp 1
.amdhsa_ieee_mode 1
.amdhsa_fp16_overflow 0
.amdhsa_workgroup_processor_mode 1
.amdhsa_memory_ordered 1
.amdhsa_forward_progress 0
.amdhsa_shared_vgpr_count 0
.amdhsa_exception_fp_ieee_invalid_op 0
.amdhsa_exception_fp_denorm_src 0
.amdhsa_exception_fp_ieee_div_zero 0
.amdhsa_exception_fp_ieee_overflow 0
.amdhsa_exception_fp_ieee_underflow 0
.amdhsa_exception_fp_ieee_inexact 0
.amdhsa_exception_int_div_zero 0
.end_amdhsa_kernel
.text
.Lfunc_end0:
.size _Z16sumaMatrixKernelPfS_S_i, .Lfunc_end0-_Z16sumaMatrixKernelPfS_S_i
.section .AMDGPU.csdata,"",@progbits
.text
.protected _Z19sumaMatrixKernelRowPfS_S_i
.globl _Z19sumaMatrixKernelRowPfS_S_i
.p2align 8
.type _Z19sumaMatrixKernelRowPfS_S_i,@function
_Z19sumaMatrixKernelRowPfS_S_i:
s_clause 0x1
s_load_b32 s3, s[0:1], 0x2c
s_load_b32 s2, s[0:1], 0x18
s_waitcnt lgkmcnt(0)
s_and_b32 s3, s3, 0xffff
s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
v_mad_u64_u32 v[1:2], null, s15, s3, v[0:1]
s_mov_b32 s3, exec_lo
v_max_i32_e32 v0, 0, v1
s_delay_alu instid0(VALU_DEP_1)
v_cmpx_gt_i32_e64 s2, v0
s_cbranch_execz .LBB1_3
s_load_b128 s[4:7], s[0:1], 0x0
v_mul_lo_u32 v0, v1, s2
s_load_b64 s[0:1], s[0:1], 0x10
s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
v_ashrrev_i32_e32 v1, 31, v0
v_lshlrev_b64 v[4:5], 2, v[0:1]
s_waitcnt lgkmcnt(0)
s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_2)
v_add_co_u32 v0, vcc_lo, s4, v4
v_add_co_ci_u32_e32 v1, vcc_lo, s5, v5, vcc_lo
v_add_co_u32 v2, vcc_lo, s6, v4
v_add_co_ci_u32_e32 v3, vcc_lo, s7, v5, vcc_lo
v_add_co_u32 v4, vcc_lo, s0, v4
v_add_co_ci_u32_e32 v5, vcc_lo, s1, v5, vcc_lo
.p2align 6
.LBB1_2:
global_load_b32 v6, v[0:1], off
global_load_b32 v7, v[2:3], off
v_add_co_u32 v0, vcc_lo, v0, 4
v_add_co_ci_u32_e32 v1, vcc_lo, 0, v1, vcc_lo
v_add_co_u32 v2, vcc_lo, v2, 4
v_add_co_ci_u32_e32 v3, vcc_lo, 0, v3, vcc_lo
s_add_i32 s2, s2, -1
s_delay_alu instid0(SALU_CYCLE_1)
s_cmp_lg_u32 s2, 0
s_waitcnt vmcnt(0)
v_add_f32_e32 v6, v6, v7
global_store_b32 v[4:5], v6, off
v_add_co_u32 v4, vcc_lo, v4, 4
v_add_co_ci_u32_e32 v5, vcc_lo, 0, v5, vcc_lo
s_cbranch_scc1 .LBB1_2
.LBB1_3:
s_nop 0
s_sendmsg sendmsg(MSG_DEALLOC_VGPRS)
s_endpgm
.section .rodata,"a",@progbits
.p2align 6, 0x0
.amdhsa_kernel _Z19sumaMatrixKernelRowPfS_S_i
.amdhsa_group_segment_fixed_size 0
.amdhsa_private_segment_fixed_size 0
.amdhsa_kernarg_size 288
.amdhsa_user_sgpr_count 15
.amdhsa_user_sgpr_dispatch_ptr 0
.amdhsa_user_sgpr_queue_ptr 0
.amdhsa_user_sgpr_kernarg_segment_ptr 1
.amdhsa_user_sgpr_dispatch_id 0
.amdhsa_user_sgpr_private_segment_size 0
.amdhsa_wavefront_size32 1
.amdhsa_uses_dynamic_stack 0
.amdhsa_enable_private_segment 0
.amdhsa_system_sgpr_workgroup_id_x 1
.amdhsa_system_sgpr_workgroup_id_y 0
.amdhsa_system_sgpr_workgroup_id_z 0
.amdhsa_system_sgpr_workgroup_info 0
.amdhsa_system_vgpr_workitem_id 0
.amdhsa_next_free_vgpr 8
.amdhsa_next_free_sgpr 16
.amdhsa_float_round_mode_32 0
.amdhsa_float_round_mode_16_64 0
.amdhsa_float_denorm_mode_32 3
.amdhsa_float_denorm_mode_16_64 3
.amdhsa_dx10_clamp 1
.amdhsa_ieee_mode 1
.amdhsa_fp16_overflow 0
.amdhsa_workgroup_processor_mode 1
.amdhsa_memory_ordered 1
.amdhsa_forward_progress 0
.amdhsa_shared_vgpr_count 0
.amdhsa_exception_fp_ieee_invalid_op 0
.amdhsa_exception_fp_denorm_src 0
.amdhsa_exception_fp_ieee_div_zero 0
.amdhsa_exception_fp_ieee_overflow 0
.amdhsa_exception_fp_ieee_underflow 0
.amdhsa_exception_fp_ieee_inexact 0
.amdhsa_exception_int_div_zero 0
.end_amdhsa_kernel
.text
.Lfunc_end1:
.size _Z19sumaMatrixKernelRowPfS_S_i, .Lfunc_end1-_Z19sumaMatrixKernelRowPfS_S_i
.section .AMDGPU.csdata,"",@progbits
.text
.protected _Z22sumaMatrixKernelColumnPfS_S_i
.globl _Z22sumaMatrixKernelColumnPfS_S_i
.p2align 8
.type _Z22sumaMatrixKernelColumnPfS_S_i,@function
_Z22sumaMatrixKernelColumnPfS_S_i:
s_clause 0x1
s_load_b32 s3, s[0:1], 0x2c
s_load_b32 s2, s[0:1], 0x18
s_waitcnt lgkmcnt(0)
s_and_b32 s3, s3, 0xffff
s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
v_mad_u64_u32 v[1:2], null, s15, s3, v[0:1]
s_mov_b32 s3, exec_lo
v_max_i32_e32 v0, 0, v1
s_delay_alu instid0(VALU_DEP_1)
v_cmpx_gt_i32_e64 s2, v0
s_cbranch_execz .LBB2_3
s_clause 0x1
s_load_b128 s[4:7], s[0:1], 0x0
s_load_b64 s[0:1], s[0:1], 0x10
s_mov_b32 s3, s2
.p2align 6
.LBB2_2:
v_ashrrev_i32_e32 v2, 31, v1
s_add_i32 s3, s3, -1
s_delay_alu instid0(SALU_CYCLE_1) | instskip(NEXT) | instid1(VALU_DEP_1)
s_cmp_lg_u32 s3, 0
v_lshlrev_b64 v[2:3], 2, v[1:2]
v_add_nc_u32_e32 v1, s2, v1
s_waitcnt lgkmcnt(0)
s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_3)
v_add_co_u32 v4, vcc_lo, s4, v2
v_add_co_ci_u32_e32 v5, vcc_lo, s5, v3, vcc_lo
v_add_co_u32 v6, vcc_lo, s6, v2
v_add_co_ci_u32_e32 v7, vcc_lo, s7, v3, vcc_lo
global_load_b32 v0, v[4:5], off
global_load_b32 v4, v[6:7], off
v_add_co_u32 v2, vcc_lo, s0, v2
v_add_co_ci_u32_e32 v3, vcc_lo, s1, v3, vcc_lo
s_waitcnt vmcnt(0)
v_add_f32_e32 v0, v0, v4
global_store_b32 v[2:3], v0, off
s_cbranch_scc1 .LBB2_2
.LBB2_3:
s_nop 0
s_sendmsg sendmsg(MSG_DEALLOC_VGPRS)
s_endpgm
.section .rodata,"a",@progbits
.p2align 6, 0x0
.amdhsa_kernel _Z22sumaMatrixKernelColumnPfS_S_i
.amdhsa_group_segment_fixed_size 0
.amdhsa_private_segment_fixed_size 0
.amdhsa_kernarg_size 288
.amdhsa_user_sgpr_count 15
.amdhsa_user_sgpr_dispatch_ptr 0
.amdhsa_user_sgpr_queue_ptr 0
.amdhsa_user_sgpr_kernarg_segment_ptr 1
.amdhsa_user_sgpr_dispatch_id 0
.amdhsa_user_sgpr_private_segment_size 0
.amdhsa_wavefront_size32 1
.amdhsa_uses_dynamic_stack 0
.amdhsa_enable_private_segment 0
.amdhsa_system_sgpr_workgroup_id_x 1
.amdhsa_system_sgpr_workgroup_id_y 0
.amdhsa_system_sgpr_workgroup_id_z 0
.amdhsa_system_sgpr_workgroup_info 0
.amdhsa_system_vgpr_workitem_id 0
.amdhsa_next_free_vgpr 8
.amdhsa_next_free_sgpr 16
.amdhsa_float_round_mode_32 0
.amdhsa_float_round_mode_16_64 0
.amdhsa_float_denorm_mode_32 3
.amdhsa_float_denorm_mode_16_64 3
.amdhsa_dx10_clamp 1
.amdhsa_ieee_mode 1
.amdhsa_fp16_overflow 0
.amdhsa_workgroup_processor_mode 1
.amdhsa_memory_ordered 1
.amdhsa_forward_progress 0
.amdhsa_shared_vgpr_count 0
.amdhsa_exception_fp_ieee_invalid_op 0
.amdhsa_exception_fp_denorm_src 0
.amdhsa_exception_fp_ieee_div_zero 0
.amdhsa_exception_fp_ieee_overflow 0
.amdhsa_exception_fp_ieee_underflow 0
.amdhsa_exception_fp_ieee_inexact 0
.amdhsa_exception_int_div_zero 0
.end_amdhsa_kernel
.text
.Lfunc_end2:
.size _Z22sumaMatrixKernelColumnPfS_S_i, .Lfunc_end2-_Z22sumaMatrixKernelColumnPfS_S_i
.section .AMDGPU.csdata,"",@progbits
.text
.p2alignl 7, 3214868480
.fill 96, 4, 3214868480
.type __hip_cuid_,@object
.section .bss,"aw",@nobits
.globl __hip_cuid_
__hip_cuid_:
.byte 0
.size __hip_cuid_, 1
.ident "AMD clang version 18.0.0git (https://github.com/RadeonOpenCompute/llvm-project roc-6.3.2 25012 e5bf7e55c91490b07c49d8960fa7983d864936c4)"
.section ".note.GNU-stack","",@progbits
.addrsig
.addrsig_sym __hip_cuid_
.amdgpu_metadata
---
amdhsa.kernels:
- .args:
- .address_space: global
.offset: 0
.size: 8
.value_kind: global_buffer
- .address_space: global
.offset: 8
.size: 8
.value_kind: global_buffer
- .address_space: global
.offset: 16
.size: 8
.value_kind: global_buffer
- .offset: 24
.size: 4
.value_kind: by_value
- .offset: 32
.size: 4
.value_kind: hidden_block_count_x
- .offset: 36
.size: 4
.value_kind: hidden_block_count_y
- .offset: 40
.size: 4
.value_kind: hidden_block_count_z
- .offset: 44
.size: 2
.value_kind: hidden_group_size_x
- .offset: 46
.size: 2
.value_kind: hidden_group_size_y
- .offset: 48
.size: 2
.value_kind: hidden_group_size_z
- .offset: 50
.size: 2
.value_kind: hidden_remainder_x
- .offset: 52
.size: 2
.value_kind: hidden_remainder_y
- .offset: 54
.size: 2
.value_kind: hidden_remainder_z
- .offset: 72
.size: 8
.value_kind: hidden_global_offset_x
- .offset: 80
.size: 8
.value_kind: hidden_global_offset_y
- .offset: 88
.size: 8
.value_kind: hidden_global_offset_z
- .offset: 96
.size: 2
.value_kind: hidden_grid_dims
.group_segment_fixed_size: 0
.kernarg_segment_align: 8
.kernarg_segment_size: 288
.language: OpenCL C
.language_version:
- 2
- 0
.max_flat_workgroup_size: 1024
.name: _Z16sumaMatrixKernelPfS_S_i
.private_segment_fixed_size: 0
.sgpr_count: 18
.sgpr_spill_count: 0
.symbol: _Z16sumaMatrixKernelPfS_S_i.kd
.uniform_work_group_size: 1
.uses_dynamic_stack: false
.vgpr_count: 6
.vgpr_spill_count: 0
.wavefront_size: 32
.workgroup_processor_mode: 1
- .args:
- .address_space: global
.offset: 0
.size: 8
.value_kind: global_buffer
- .address_space: global
.offset: 8
.size: 8
.value_kind: global_buffer
- .address_space: global
.offset: 16
.size: 8
.value_kind: global_buffer
- .offset: 24
.size: 4
.value_kind: by_value
- .offset: 32
.size: 4
.value_kind: hidden_block_count_x
- .offset: 36
.size: 4
.value_kind: hidden_block_count_y
- .offset: 40
.size: 4
.value_kind: hidden_block_count_z
- .offset: 44
.size: 2
.value_kind: hidden_group_size_x
- .offset: 46
.size: 2
.value_kind: hidden_group_size_y
- .offset: 48
.size: 2
.value_kind: hidden_group_size_z
- .offset: 50
.size: 2
.value_kind: hidden_remainder_x
- .offset: 52
.size: 2
.value_kind: hidden_remainder_y
- .offset: 54
.size: 2
.value_kind: hidden_remainder_z
- .offset: 72
.size: 8
.value_kind: hidden_global_offset_x
- .offset: 80
.size: 8
.value_kind: hidden_global_offset_y
- .offset: 88
.size: 8
.value_kind: hidden_global_offset_z
- .offset: 96
.size: 2
.value_kind: hidden_grid_dims
.group_segment_fixed_size: 0
.kernarg_segment_align: 8
.kernarg_segment_size: 288
.language: OpenCL C
.language_version:
- 2
- 0
.max_flat_workgroup_size: 1024
.name: _Z19sumaMatrixKernelRowPfS_S_i
.private_segment_fixed_size: 0
.sgpr_count: 18
.sgpr_spill_count: 0
.symbol: _Z19sumaMatrixKernelRowPfS_S_i.kd
.uniform_work_group_size: 1
.uses_dynamic_stack: false
.vgpr_count: 8
.vgpr_spill_count: 0
.wavefront_size: 32
.workgroup_processor_mode: 1
- .args:
- .address_space: global
.offset: 0
.size: 8
.value_kind: global_buffer
- .address_space: global
.offset: 8
.size: 8
.value_kind: global_buffer
- .address_space: global
.offset: 16
.size: 8
.value_kind: global_buffer
- .offset: 24
.size: 4
.value_kind: by_value
- .offset: 32
.size: 4
.value_kind: hidden_block_count_x
- .offset: 36
.size: 4
.value_kind: hidden_block_count_y
- .offset: 40
.size: 4
.value_kind: hidden_block_count_z
- .offset: 44
.size: 2
.value_kind: hidden_group_size_x
- .offset: 46
.size: 2
.value_kind: hidden_group_size_y
- .offset: 48
.size: 2
.value_kind: hidden_group_size_z
- .offset: 50
.size: 2
.value_kind: hidden_remainder_x
- .offset: 52
.size: 2
.value_kind: hidden_remainder_y
- .offset: 54
.size: 2
.value_kind: hidden_remainder_z
- .offset: 72
.size: 8
.value_kind: hidden_global_offset_x
- .offset: 80
.size: 8
.value_kind: hidden_global_offset_y
- .offset: 88
.size: 8
.value_kind: hidden_global_offset_z
- .offset: 96
.size: 2
.value_kind: hidden_grid_dims
.group_segment_fixed_size: 0
.kernarg_segment_align: 8
.kernarg_segment_size: 288
.language: OpenCL C
.language_version:
- 2
- 0
.max_flat_workgroup_size: 1024
.name: _Z22sumaMatrixKernelColumnPfS_S_i
.private_segment_fixed_size: 0
.sgpr_count: 18
.sgpr_spill_count: 0
.symbol: _Z22sumaMatrixKernelColumnPfS_S_i.kd
.uniform_work_group_size: 1
.uses_dynamic_stack: false
.vgpr_count: 8
.vgpr_spill_count: 0
.wavefront_size: 32
.workgroup_processor_mode: 1
amdhsa.target: amdgcn-amd-amdhsa--gfx1100
amdhsa.version:
- 1
- 2
...
.end_amdgpu_metadata |
You are a helpful coding assistant specialized in converting HIP source code to AMD host assembly. | #include <hip/hip_runtime.h>
#include <stdio.h>
#include <stdlib.h>
#include <time.h>
#include <iostream>
using namespace std;
__global__
void sumaMatrixKernel(float* A, float* B, float* C, int n)
{
int i = threadIdx.x + (blockDim.x * blockIdx.x);
if(i<n*n)
C[i] = A[i] +B[i];
}
__global__
void sumaMatrixKernelRow(float* A, float* B, float* C, int n)
{
int i = threadIdx.x + (blockDim.x * blockIdx.x);
if(i<n)
{
for(int j=0;j<n;j++)
C[i*n+j] = A[i*n+j] + B[i*n+j];
}
}
__global__
void sumaMatrixKernelColumn(float* A, float* B, float* C, int n)
{
int i = threadIdx.x + (blockDim.x * blockIdx.x);
if(i<n)
{
for(int j=0;j<n;j++)
C[i+j*n] = A[i+j*n] + B[i+j*n];
}
}
void sumaMatrix(float* A, float* B, float* C, int tam)
{
int size = (tam*tam) * sizeof(float);
float *d_A,*d_B,*d_C;
hipMalloc((void**)&d_A,size);
hipMalloc((void**)&d_B,size);
hipMalloc((void**)&d_C,size);
hipMemcpy(d_A,A,size,hipMemcpyHostToDevice);
hipMemcpy(d_B,B,size,hipMemcpyHostToDevice);
sumaMatrixKernel<<<ceil(tam*tam/256.0),256>>>(d_A,d_B,d_C,tam);
//sumaMatrixKernelRow<<<ceil(tam/256.0),256>>>(d_A,d_B,d_C,tam);
//sumaMatrixKernelColumn<<<ceil(tam/256.0),256>>>(d_A,d_B,d_C,tam);
hipMemcpy(C,d_C,size,hipMemcpyDeviceToHost);
hipFree(d_A);hipFree(d_B);hipFree(d_C);
}
void datosRandom(float *array,int n){
//srand(time(NULL));
for(int i = 0; i < n; i++){
for(int j = 0; j < n; j++)
array[i*n+j] = 1;
}
}
void printMatrix(float *array,int n){
for(int i = 0; i < n; i++){
printf("%f ", array[i]);
}
printf("\n");
}
int main()
{
int n = 10;
float *h_A,*h_B,*h_C;
h_A = new float[n*n];
h_B = new float[n*n];
h_C = new float[n*n];
datosRandom(h_A,n);
datosRandom(h_B,n);
sumaMatrix(h_A,h_B,h_C,n);
printMatrix(h_C,n);
return 0;
} | .text
.file "sumaMatriz.hip"
# Start of file scope inline assembly
.globl _ZSt21ios_base_library_initv
# End of file scope inline assembly
.globl _Z31__device_stub__sumaMatrixKernelPfS_S_i # -- Begin function _Z31__device_stub__sumaMatrixKernelPfS_S_i
.p2align 4, 0x90
.type _Z31__device_stub__sumaMatrixKernelPfS_S_i,@function
_Z31__device_stub__sumaMatrixKernelPfS_S_i: # @_Z31__device_stub__sumaMatrixKernelPfS_S_i
.cfi_startproc
# %bb.0:
subq $120, %rsp
.cfi_def_cfa_offset 128
movq %rdi, 72(%rsp)
movq %rsi, 64(%rsp)
movq %rdx, 56(%rsp)
movl %ecx, 4(%rsp)
leaq 72(%rsp), %rax
movq %rax, 80(%rsp)
leaq 64(%rsp), %rax
movq %rax, 88(%rsp)
leaq 56(%rsp), %rax
movq %rax, 96(%rsp)
leaq 4(%rsp), %rax
movq %rax, 104(%rsp)
leaq 40(%rsp), %rdi
leaq 24(%rsp), %rsi
leaq 16(%rsp), %rdx
leaq 8(%rsp), %rcx
callq __hipPopCallConfiguration
movq 40(%rsp), %rsi
movl 48(%rsp), %edx
movq 24(%rsp), %rcx
movl 32(%rsp), %r8d
leaq 80(%rsp), %r9
movl $_Z16sumaMatrixKernelPfS_S_i, %edi
pushq 8(%rsp)
.cfi_adjust_cfa_offset 8
pushq 24(%rsp)
.cfi_adjust_cfa_offset 8
callq hipLaunchKernel
addq $136, %rsp
.cfi_adjust_cfa_offset -136
retq
.Lfunc_end0:
.size _Z31__device_stub__sumaMatrixKernelPfS_S_i, .Lfunc_end0-_Z31__device_stub__sumaMatrixKernelPfS_S_i
.cfi_endproc
# -- End function
.globl _Z34__device_stub__sumaMatrixKernelRowPfS_S_i # -- Begin function _Z34__device_stub__sumaMatrixKernelRowPfS_S_i
.p2align 4, 0x90
.type _Z34__device_stub__sumaMatrixKernelRowPfS_S_i,@function
_Z34__device_stub__sumaMatrixKernelRowPfS_S_i: # @_Z34__device_stub__sumaMatrixKernelRowPfS_S_i
.cfi_startproc
# %bb.0:
subq $120, %rsp
.cfi_def_cfa_offset 128
movq %rdi, 72(%rsp)
movq %rsi, 64(%rsp)
movq %rdx, 56(%rsp)
movl %ecx, 4(%rsp)
leaq 72(%rsp), %rax
movq %rax, 80(%rsp)
leaq 64(%rsp), %rax
movq %rax, 88(%rsp)
leaq 56(%rsp), %rax
movq %rax, 96(%rsp)
leaq 4(%rsp), %rax
movq %rax, 104(%rsp)
leaq 40(%rsp), %rdi
leaq 24(%rsp), %rsi
leaq 16(%rsp), %rdx
leaq 8(%rsp), %rcx
callq __hipPopCallConfiguration
movq 40(%rsp), %rsi
movl 48(%rsp), %edx
movq 24(%rsp), %rcx
movl 32(%rsp), %r8d
leaq 80(%rsp), %r9
movl $_Z19sumaMatrixKernelRowPfS_S_i, %edi
pushq 8(%rsp)
.cfi_adjust_cfa_offset 8
pushq 24(%rsp)
.cfi_adjust_cfa_offset 8
callq hipLaunchKernel
addq $136, %rsp
.cfi_adjust_cfa_offset -136
retq
.Lfunc_end1:
.size _Z34__device_stub__sumaMatrixKernelRowPfS_S_i, .Lfunc_end1-_Z34__device_stub__sumaMatrixKernelRowPfS_S_i
.cfi_endproc
# -- End function
.globl _Z37__device_stub__sumaMatrixKernelColumnPfS_S_i # -- Begin function _Z37__device_stub__sumaMatrixKernelColumnPfS_S_i
.p2align 4, 0x90
.type _Z37__device_stub__sumaMatrixKernelColumnPfS_S_i,@function
_Z37__device_stub__sumaMatrixKernelColumnPfS_S_i: # @_Z37__device_stub__sumaMatrixKernelColumnPfS_S_i
.cfi_startproc
# %bb.0:
subq $120, %rsp
.cfi_def_cfa_offset 128
movq %rdi, 72(%rsp)
movq %rsi, 64(%rsp)
movq %rdx, 56(%rsp)
movl %ecx, 4(%rsp)
leaq 72(%rsp), %rax
movq %rax, 80(%rsp)
leaq 64(%rsp), %rax
movq %rax, 88(%rsp)
leaq 56(%rsp), %rax
movq %rax, 96(%rsp)
leaq 4(%rsp), %rax
movq %rax, 104(%rsp)
leaq 40(%rsp), %rdi
leaq 24(%rsp), %rsi
leaq 16(%rsp), %rdx
leaq 8(%rsp), %rcx
callq __hipPopCallConfiguration
movq 40(%rsp), %rsi
movl 48(%rsp), %edx
movq 24(%rsp), %rcx
movl 32(%rsp), %r8d
leaq 80(%rsp), %r9
movl $_Z22sumaMatrixKernelColumnPfS_S_i, %edi
pushq 8(%rsp)
.cfi_adjust_cfa_offset 8
pushq 24(%rsp)
.cfi_adjust_cfa_offset 8
callq hipLaunchKernel
addq $136, %rsp
.cfi_adjust_cfa_offset -136
retq
.Lfunc_end2:
.size _Z37__device_stub__sumaMatrixKernelColumnPfS_S_i, .Lfunc_end2-_Z37__device_stub__sumaMatrixKernelColumnPfS_S_i
.cfi_endproc
# -- End function
.section .rodata.cst8,"aM",@progbits,8
.p2align 3, 0x0 # -- Begin function _Z10sumaMatrixPfS_S_i
.LCPI3_0:
.quad 0x3f70000000000000 # double 0.00390625
.text
.globl _Z10sumaMatrixPfS_S_i
.p2align 4, 0x90
.type _Z10sumaMatrixPfS_S_i,@function
_Z10sumaMatrixPfS_S_i: # @_Z10sumaMatrixPfS_S_i
.cfi_startproc
# %bb.0:
pushq %rbp
.cfi_def_cfa_offset 16
pushq %r15
.cfi_def_cfa_offset 24
pushq %r14
.cfi_def_cfa_offset 32
pushq %r13
.cfi_def_cfa_offset 40
pushq %r12
.cfi_def_cfa_offset 48
pushq %rbx
.cfi_def_cfa_offset 56
subq $152, %rsp
.cfi_def_cfa_offset 208
.cfi_offset %rbx, -56
.cfi_offset %r12, -48
.cfi_offset %r13, -40
.cfi_offset %r14, -32
.cfi_offset %r15, -24
.cfi_offset %rbp, -16
movl %ecx, %ebp
movq %rdx, %rbx
movq %rsi, %r15
movq %rdi, %r12
movl %ecx, %r13d
imull %r13d, %r13d
leal (,%r13,4), %eax
movslq %eax, %r14
leaq 24(%rsp), %rdi
movq %r14, %rsi
callq hipMalloc
leaq 16(%rsp), %rdi
movq %r14, %rsi
callq hipMalloc
leaq 8(%rsp), %rdi
movq %r14, %rsi
callq hipMalloc
movq 24(%rsp), %rdi
movq %r12, %rsi
movq %r14, %rdx
movl $1, %ecx
callq hipMemcpy
movq 16(%rsp), %rdi
movq %r15, %rsi
movq %r14, %rdx
movl $1, %ecx
callq hipMemcpy
cvtsi2sd %r13d, %xmm0
mulsd .LCPI3_0(%rip), %xmm0
callq ceil@PLT
cvttsd2si %xmm0, %rax
movl %eax, %edi
movabsq $4294967296, %rdx # imm = 0x100000000
orq %rdx, %rdi
orq $256, %rdx # imm = 0x100
movl $1, %esi
movl $1, %ecx
xorl %r8d, %r8d
xorl %r9d, %r9d
callq __hipPushCallConfiguration
testl %eax, %eax
jne .LBB3_2
# %bb.1:
movq 24(%rsp), %rax
movq 16(%rsp), %rcx
movq 8(%rsp), %rdx
movq %rax, 104(%rsp)
movq %rcx, 96(%rsp)
movq %rdx, 88(%rsp)
movl %ebp, 36(%rsp)
leaq 104(%rsp), %rax
movq %rax, 112(%rsp)
leaq 96(%rsp), %rax
movq %rax, 120(%rsp)
leaq 88(%rsp), %rax
movq %rax, 128(%rsp)
leaq 36(%rsp), %rax
movq %rax, 136(%rsp)
leaq 72(%rsp), %rdi
leaq 56(%rsp), %rsi
leaq 48(%rsp), %rdx
leaq 40(%rsp), %rcx
callq __hipPopCallConfiguration
movq 72(%rsp), %rsi
movl 80(%rsp), %edx
movq 56(%rsp), %rcx
movl 64(%rsp), %r8d
leaq 112(%rsp), %r9
movl $_Z16sumaMatrixKernelPfS_S_i, %edi
pushq 40(%rsp)
.cfi_adjust_cfa_offset 8
pushq 56(%rsp)
.cfi_adjust_cfa_offset 8
callq hipLaunchKernel
addq $16, %rsp
.cfi_adjust_cfa_offset -16
.LBB3_2:
movq 8(%rsp), %rsi
movq %rbx, %rdi
movq %r14, %rdx
movl $2, %ecx
callq hipMemcpy
movq 24(%rsp), %rdi
callq hipFree
movq 16(%rsp), %rdi
callq hipFree
movq 8(%rsp), %rdi
callq hipFree
addq $152, %rsp
.cfi_def_cfa_offset 56
popq %rbx
.cfi_def_cfa_offset 48
popq %r12
.cfi_def_cfa_offset 40
popq %r13
.cfi_def_cfa_offset 32
popq %r14
.cfi_def_cfa_offset 24
popq %r15
.cfi_def_cfa_offset 16
popq %rbp
.cfi_def_cfa_offset 8
retq
.Lfunc_end3:
.size _Z10sumaMatrixPfS_S_i, .Lfunc_end3-_Z10sumaMatrixPfS_S_i
.cfi_endproc
# -- End function
.globl _Z11datosRandomPfi # -- Begin function _Z11datosRandomPfi
.p2align 4, 0x90
.type _Z11datosRandomPfi,@function
_Z11datosRandomPfi: # @_Z11datosRandomPfi
.cfi_startproc
# %bb.0:
testl %esi, %esi
jle .LBB4_5
# %bb.1: # %.preheader.lr.ph
movl %esi, %eax
xorl %ecx, %ecx
xorl %edx, %edx
.p2align 4, 0x90
.LBB4_2: # %.preheader
# =>This Loop Header: Depth=1
# Child Loop BB4_3 Depth 2
movl %ecx, %r8d
leaq (%rdi,%r8,4), %r8
xorl %r9d, %r9d
.p2align 4, 0x90
.LBB4_3: # Parent Loop BB4_2 Depth=1
# => This Inner Loop Header: Depth=2
movl $1065353216, (%r8,%r9,4) # imm = 0x3F800000
incq %r9
cmpq %r9, %rax
jne .LBB4_3
# %bb.4: # %._crit_edge
# in Loop: Header=BB4_2 Depth=1
incq %rdx
addl %esi, %ecx
cmpq %rax, %rdx
jne .LBB4_2
.LBB4_5: # %._crit_edge13
retq
.Lfunc_end4:
.size _Z11datosRandomPfi, .Lfunc_end4-_Z11datosRandomPfi
.cfi_endproc
# -- End function
.globl _Z11printMatrixPfi # -- Begin function _Z11printMatrixPfi
.p2align 4, 0x90
.type _Z11printMatrixPfi,@function
_Z11printMatrixPfi: # @_Z11printMatrixPfi
.cfi_startproc
# %bb.0:
testl %esi, %esi
jle .LBB5_4
# %bb.1: # %.lr.ph.preheader
pushq %r15
.cfi_def_cfa_offset 16
pushq %r14
.cfi_def_cfa_offset 24
pushq %rbx
.cfi_def_cfa_offset 32
.cfi_offset %rbx, -32
.cfi_offset %r14, -24
.cfi_offset %r15, -16
movq %rdi, %rbx
movl %esi, %r14d
xorl %r15d, %r15d
.p2align 4, 0x90
.LBB5_2: # %.lr.ph
# =>This Inner Loop Header: Depth=1
movss (%rbx,%r15,4), %xmm0 # xmm0 = mem[0],zero,zero,zero
cvtss2sd %xmm0, %xmm0
movl $.L.str, %edi
movb $1, %al
callq printf
incq %r15
cmpq %r15, %r14
jne .LBB5_2
# %bb.3:
popq %rbx
.cfi_def_cfa_offset 24
popq %r14
.cfi_def_cfa_offset 16
popq %r15
.cfi_def_cfa_offset 8
.cfi_restore %rbx
.cfi_restore %r14
.cfi_restore %r15
.LBB5_4: # %._crit_edge
movl $10, %edi
jmp putchar@PLT # TAILCALL
.Lfunc_end5:
.size _Z11printMatrixPfi, .Lfunc_end5-_Z11printMatrixPfi
.cfi_endproc
# -- End function
.globl main # -- Begin function main
.p2align 4, 0x90
.type main,@function
main: # @main
.cfi_startproc
# %bb.0:
pushq %r15
.cfi_def_cfa_offset 16
pushq %r14
.cfi_def_cfa_offset 24
pushq %rbx
.cfi_def_cfa_offset 32
.cfi_offset %rbx, -32
.cfi_offset %r14, -24
.cfi_offset %r15, -16
movl $400, %edi # imm = 0x190
callq _Znam
movq %rax, %r14
movl $400, %edi # imm = 0x190
callq _Znam
movq %rax, %r15
movl $400, %edi # imm = 0x190
callq _Znam
movq %rax, %rbx
xorl %eax, %eax
movq %r14, %rcx
.p2align 4, 0x90
.LBB6_1: # %.preheader.i
# =>This Loop Header: Depth=1
# Child Loop BB6_2 Depth 2
xorl %edx, %edx
.p2align 4, 0x90
.LBB6_2: # Parent Loop BB6_1 Depth=1
# => This Inner Loop Header: Depth=2
movl $1065353216, (%rcx,%rdx,4) # imm = 0x3F800000
incq %rdx
cmpq $10, %rdx
jne .LBB6_2
# %bb.3: # %._crit_edge.i
# in Loop: Header=BB6_1 Depth=1
incq %rax
addq $40, %rcx
cmpq $10, %rax
jne .LBB6_1
# %bb.4: # %.preheader.i15.preheader
xorl %eax, %eax
movq %r15, %rcx
.p2align 4, 0x90
.LBB6_5: # %.preheader.i15
# =>This Loop Header: Depth=1
# Child Loop BB6_6 Depth 2
xorl %edx, %edx
.p2align 4, 0x90
.LBB6_6: # Parent Loop BB6_5 Depth=1
# => This Inner Loop Header: Depth=2
movl $1065353216, (%rcx,%rdx,4) # imm = 0x3F800000
incq %rdx
cmpq $10, %rdx
jne .LBB6_6
# %bb.7: # %._crit_edge.i20
# in Loop: Header=BB6_5 Depth=1
incq %rax
addq $40, %rcx
cmpq $10, %rax
jne .LBB6_5
# %bb.8: # %_Z11datosRandomPfi.exit23
movq %r14, %rdi
movq %r15, %rsi
movq %rbx, %rdx
movl $10, %ecx
callq _Z10sumaMatrixPfS_S_i
xorl %r14d, %r14d
.p2align 4, 0x90
.LBB6_9: # %.lr.ph.i
# =>This Inner Loop Header: Depth=1
movss (%rbx,%r14,4), %xmm0 # xmm0 = mem[0],zero,zero,zero
cvtss2sd %xmm0, %xmm0
movl $.L.str, %edi
movb $1, %al
callq printf
incq %r14
cmpq $10, %r14
jne .LBB6_9
# %bb.10: # %_Z11printMatrixPfi.exit
movl $10, %edi
callq putchar@PLT
xorl %eax, %eax
popq %rbx
.cfi_def_cfa_offset 24
popq %r14
.cfi_def_cfa_offset 16
popq %r15
.cfi_def_cfa_offset 8
retq
.Lfunc_end6:
.size main, .Lfunc_end6-main
.cfi_endproc
# -- End function
.p2align 4, 0x90 # -- Begin function __hip_module_ctor
.type __hip_module_ctor,@function
__hip_module_ctor: # @__hip_module_ctor
.cfi_startproc
# %bb.0:
pushq %rbx
.cfi_def_cfa_offset 16
subq $32, %rsp
.cfi_def_cfa_offset 48
.cfi_offset %rbx, -16
cmpq $0, __hip_gpubin_handle(%rip)
jne .LBB7_2
# %bb.1:
movl $__hip_fatbin_wrapper, %edi
callq __hipRegisterFatBinary
movq %rax, __hip_gpubin_handle(%rip)
.LBB7_2:
movq __hip_gpubin_handle(%rip), %rbx
xorps %xmm0, %xmm0
movups %xmm0, 16(%rsp)
movups %xmm0, (%rsp)
movl $_Z16sumaMatrixKernelPfS_S_i, %esi
movl $.L__unnamed_1, %edx
movl $.L__unnamed_1, %ecx
movq %rbx, %rdi
movl $-1, %r8d
xorl %r9d, %r9d
callq __hipRegisterFunction
xorps %xmm0, %xmm0
movups %xmm0, 16(%rsp)
movups %xmm0, (%rsp)
movl $_Z19sumaMatrixKernelRowPfS_S_i, %esi
movl $.L__unnamed_2, %edx
movl $.L__unnamed_2, %ecx
movq %rbx, %rdi
movl $-1, %r8d
xorl %r9d, %r9d
callq __hipRegisterFunction
xorps %xmm0, %xmm0
movups %xmm0, 16(%rsp)
movups %xmm0, (%rsp)
movl $_Z22sumaMatrixKernelColumnPfS_S_i, %esi
movl $.L__unnamed_3, %edx
movl $.L__unnamed_3, %ecx
movq %rbx, %rdi
movl $-1, %r8d
xorl %r9d, %r9d
callq __hipRegisterFunction
movl $__hip_module_dtor, %edi
addq $32, %rsp
.cfi_def_cfa_offset 16
popq %rbx
.cfi_def_cfa_offset 8
jmp atexit # TAILCALL
.Lfunc_end7:
.size __hip_module_ctor, .Lfunc_end7-__hip_module_ctor
.cfi_endproc
# -- End function
.p2align 4, 0x90 # -- Begin function __hip_module_dtor
.type __hip_module_dtor,@function
__hip_module_dtor: # @__hip_module_dtor
.cfi_startproc
# %bb.0:
movq __hip_gpubin_handle(%rip), %rdi
testq %rdi, %rdi
je .LBB8_2
# %bb.1:
pushq %rax
.cfi_def_cfa_offset 16
callq __hipUnregisterFatBinary
movq $0, __hip_gpubin_handle(%rip)
addq $8, %rsp
.cfi_def_cfa_offset 8
.LBB8_2:
retq
.Lfunc_end8:
.size __hip_module_dtor, .Lfunc_end8-__hip_module_dtor
.cfi_endproc
# -- End function
.type _Z16sumaMatrixKernelPfS_S_i,@object # @_Z16sumaMatrixKernelPfS_S_i
.section .rodata,"a",@progbits
.globl _Z16sumaMatrixKernelPfS_S_i
.p2align 3, 0x0
_Z16sumaMatrixKernelPfS_S_i:
.quad _Z31__device_stub__sumaMatrixKernelPfS_S_i
.size _Z16sumaMatrixKernelPfS_S_i, 8
.type _Z19sumaMatrixKernelRowPfS_S_i,@object # @_Z19sumaMatrixKernelRowPfS_S_i
.globl _Z19sumaMatrixKernelRowPfS_S_i
.p2align 3, 0x0
_Z19sumaMatrixKernelRowPfS_S_i:
.quad _Z34__device_stub__sumaMatrixKernelRowPfS_S_i
.size _Z19sumaMatrixKernelRowPfS_S_i, 8
.type _Z22sumaMatrixKernelColumnPfS_S_i,@object # @_Z22sumaMatrixKernelColumnPfS_S_i
.globl _Z22sumaMatrixKernelColumnPfS_S_i
.p2align 3, 0x0
_Z22sumaMatrixKernelColumnPfS_S_i:
.quad _Z37__device_stub__sumaMatrixKernelColumnPfS_S_i
.size _Z22sumaMatrixKernelColumnPfS_S_i, 8
.type .L.str,@object # @.str
.section .rodata.str1.1,"aMS",@progbits,1
.L.str:
.asciz "%f "
.size .L.str, 4
.type .L__unnamed_1,@object # @0
.L__unnamed_1:
.asciz "_Z16sumaMatrixKernelPfS_S_i"
.size .L__unnamed_1, 28
.type .L__unnamed_2,@object # @1
.L__unnamed_2:
.asciz "_Z19sumaMatrixKernelRowPfS_S_i"
.size .L__unnamed_2, 31
.type .L__unnamed_3,@object # @2
.L__unnamed_3:
.asciz "_Z22sumaMatrixKernelColumnPfS_S_i"
.size .L__unnamed_3, 34
.type __hip_fatbin_wrapper,@object # @__hip_fatbin_wrapper
.section .hipFatBinSegment,"a",@progbits
.p2align 3, 0x0
__hip_fatbin_wrapper:
.long 1212764230 # 0x48495046
.long 1 # 0x1
.quad __hip_fatbin
.quad 0
.size __hip_fatbin_wrapper, 24
.type __hip_gpubin_handle,@object # @__hip_gpubin_handle
.local __hip_gpubin_handle
.comm __hip_gpubin_handle,8,8
.section .init_array,"aw",@init_array
.p2align 3, 0x0
.quad __hip_module_ctor
.type __hip_cuid_,@object # @__hip_cuid_
.bss
.globl __hip_cuid_
__hip_cuid_:
.byte 0 # 0x0
.size __hip_cuid_, 1
.section ".linker-options","e",@llvm_linker_options
.ident "AMD clang version 18.0.0git (https://github.com/RadeonOpenCompute/llvm-project roc-6.3.2 25012 e5bf7e55c91490b07c49d8960fa7983d864936c4)"
.section ".note.GNU-stack","",@progbits
.addrsig
.addrsig_sym _Z31__device_stub__sumaMatrixKernelPfS_S_i
.addrsig_sym _Z34__device_stub__sumaMatrixKernelRowPfS_S_i
.addrsig_sym _Z37__device_stub__sumaMatrixKernelColumnPfS_S_i
.addrsig_sym __hip_module_ctor
.addrsig_sym __hip_module_dtor
.addrsig_sym _Z16sumaMatrixKernelPfS_S_i
.addrsig_sym _Z19sumaMatrixKernelRowPfS_S_i
.addrsig_sym _Z22sumaMatrixKernelColumnPfS_S_i
.addrsig_sym __hip_fatbin
.addrsig_sym __hip_fatbin_wrapper
.addrsig_sym __hip_cuid_ |
You are a helpful coding assistant specialized in converting from CUDA host assembly to AMD host assembly. | .file "tmpxft_00188065_00000000-6_sumaMatriz.cudafe1.cpp"
.text
#APP
.globl _ZSt21ios_base_library_initv
#NO_APP
.type _ZL26__cudaUnregisterBinaryUtilv, @function
_ZL26__cudaUnregisterBinaryUtilv:
.LFB3675:
.cfi_startproc
endbr64
subq $8, %rsp
.cfi_def_cfa_offset 16
movq _ZL20__cudaFatCubinHandle(%rip), %rdi
call __cudaUnregisterFatBinary@PLT
addq $8, %rsp
.cfi_def_cfa_offset 8
ret
.cfi_endproc
.LFE3675:
.size _ZL26__cudaUnregisterBinaryUtilv, .-_ZL26__cudaUnregisterBinaryUtilv
.globl _Z11datosRandomPfi
.type _Z11datosRandomPfi, @function
_Z11datosRandomPfi:
.LFB3670:
.cfi_startproc
endbr64
testl %esi, %esi
jle .L3
movslq %esi, %rax
leaq 0(,%rax,4), %r8
leaq (%rdi,%r8), %rdx
negq %rax
leaq 0(,%rax,4), %rdi
movl $0, %ecx
movss .LC0(%rip), %xmm0
.L5:
leaq (%rdx,%rdi), %rax
.L6:
movss %xmm0, (%rax)
addq $4, %rax
cmpq %rdx, %rax
jne .L6
addl $1, %ecx
addq %r8, %rdx
cmpl %ecx, %esi
jne .L5
.L3:
ret
.cfi_endproc
.LFE3670:
.size _Z11datosRandomPfi, .-_Z11datosRandomPfi
.section .rodata.str1.1,"aMS",@progbits,1
.LC1:
.string "%f "
.LC2:
.string "\n"
.text
.globl _Z11printMatrixPfi
.type _Z11printMatrixPfi, @function
_Z11printMatrixPfi:
.LFB3671:
.cfi_startproc
endbr64
pushq %r12
.cfi_def_cfa_offset 16
.cfi_offset 12, -16
pushq %rbp
.cfi_def_cfa_offset 24
.cfi_offset 6, -24
pushq %rbx
.cfi_def_cfa_offset 32
.cfi_offset 3, -32
testl %esi, %esi
jle .L9
movq %rdi, %rbx
movslq %esi, %rsi
leaq (%rdi,%rsi,4), %r12
leaq .LC1(%rip), %rbp
.L10:
pxor %xmm0, %xmm0
cvtss2sd (%rbx), %xmm0
movq %rbp, %rsi
movl $2, %edi
movl $1, %eax
call __printf_chk@PLT
addq $4, %rbx
cmpq %r12, %rbx
jne .L10
.L9:
leaq .LC2(%rip), %rsi
movl $2, %edi
movl $0, %eax
call __printf_chk@PLT
popq %rbx
.cfi_def_cfa_offset 24
popq %rbp
.cfi_def_cfa_offset 16
popq %r12
.cfi_def_cfa_offset 8
ret
.cfi_endproc
.LFE3671:
.size _Z11printMatrixPfi, .-_Z11printMatrixPfi
.globl _Z41__device_stub__Z16sumaMatrixKernelPfS_S_iPfS_S_i
.type _Z41__device_stub__Z16sumaMatrixKernelPfS_S_iPfS_S_i, @function
_Z41__device_stub__Z16sumaMatrixKernelPfS_S_iPfS_S_i:
.LFB3697:
.cfi_startproc
endbr64
subq $152, %rsp
.cfi_def_cfa_offset 160
movq %rdi, 24(%rsp)
movq %rsi, 16(%rsp)
movq %rdx, 8(%rsp)
movl %ecx, 4(%rsp)
movq %fs:40, %rax
movq %rax, 136(%rsp)
xorl %eax, %eax
leaq 24(%rsp), %rax
movq %rax, 96(%rsp)
leaq 16(%rsp), %rax
movq %rax, 104(%rsp)
leaq 8(%rsp), %rax
movq %rax, 112(%rsp)
leaq 4(%rsp), %rax
movq %rax, 120(%rsp)
movl $1, 48(%rsp)
movl $1, 52(%rsp)
movl $1, 56(%rsp)
movl $1, 60(%rsp)
movl $1, 64(%rsp)
movl $1, 68(%rsp)
leaq 40(%rsp), %rcx
leaq 32(%rsp), %rdx
leaq 60(%rsp), %rsi
leaq 48(%rsp), %rdi
call __cudaPopCallConfiguration@PLT
testl %eax, %eax
je .L17
.L13:
movq 136(%rsp), %rax
subq %fs:40, %rax
jne .L18
addq $152, %rsp
.cfi_remember_state
.cfi_def_cfa_offset 8
ret
.L17:
.cfi_restore_state
pushq 40(%rsp)
.cfi_def_cfa_offset 168
pushq 40(%rsp)
.cfi_def_cfa_offset 176
leaq 112(%rsp), %r9
movq 76(%rsp), %rcx
movl 84(%rsp), %r8d
movq 64(%rsp), %rsi
movl 72(%rsp), %edx
leaq _Z16sumaMatrixKernelPfS_S_i(%rip), %rdi
call cudaLaunchKernel@PLT
addq $16, %rsp
.cfi_def_cfa_offset 160
jmp .L13
.L18:
call __stack_chk_fail@PLT
.cfi_endproc
.LFE3697:
.size _Z41__device_stub__Z16sumaMatrixKernelPfS_S_iPfS_S_i, .-_Z41__device_stub__Z16sumaMatrixKernelPfS_S_iPfS_S_i
.globl _Z16sumaMatrixKernelPfS_S_i
.type _Z16sumaMatrixKernelPfS_S_i, @function
_Z16sumaMatrixKernelPfS_S_i:
.LFB3698:
.cfi_startproc
endbr64
subq $8, %rsp
.cfi_def_cfa_offset 16
call _Z41__device_stub__Z16sumaMatrixKernelPfS_S_iPfS_S_i
addq $8, %rsp
.cfi_def_cfa_offset 8
ret
.cfi_endproc
.LFE3698:
.size _Z16sumaMatrixKernelPfS_S_i, .-_Z16sumaMatrixKernelPfS_S_i
.globl _Z10sumaMatrixPfS_S_i
.type _Z10sumaMatrixPfS_S_i, @function
_Z10sumaMatrixPfS_S_i:
.LFB3669:
.cfi_startproc
endbr64
pushq %r15
.cfi_def_cfa_offset 16
.cfi_offset 15, -16
pushq %r14
.cfi_def_cfa_offset 24
.cfi_offset 14, -24
pushq %r13
.cfi_def_cfa_offset 32
.cfi_offset 13, -32
pushq %r12
.cfi_def_cfa_offset 40
.cfi_offset 12, -40
pushq %rbp
.cfi_def_cfa_offset 48
.cfi_offset 6, -48
pushq %rbx
.cfi_def_cfa_offset 56
.cfi_offset 3, -56
subq $72, %rsp
.cfi_def_cfa_offset 128
movq %rdi, %r14
movq %rsi, %r13
movq %rdx, %r12
movl %ecx, %ebp
movq %fs:40, %rax
movq %rax, 56(%rsp)
xorl %eax, %eax
movl %ecx, %r15d
imull %ecx, %r15d
leal 0(,%r15,4), %ebx
movslq %ebx, %rbx
leaq 8(%rsp), %rdi
movq %rbx, %rsi
call cudaMalloc@PLT
leaq 16(%rsp), %rdi
movq %rbx, %rsi
call cudaMalloc@PLT
leaq 24(%rsp), %rdi
movq %rbx, %rsi
call cudaMalloc@PLT
movl $1, %ecx
movq %rbx, %rdx
movq %r14, %rsi
movq 8(%rsp), %rdi
call cudaMemcpy@PLT
movl $1, %ecx
movq %rbx, %rdx
movq %r13, %rsi
movq 16(%rsp), %rdi
call cudaMemcpy@PLT
movl $256, 44(%rsp)
movl $1, 48(%rsp)
movl $1, 52(%rsp)
pxor %xmm0, %xmm0
cvtsi2sdl %r15d, %xmm0
mulsd .LC3(%rip), %xmm0
movapd %xmm0, %xmm3
movsd .LC7(%rip), %xmm2
movapd %xmm0, %xmm1
andpd %xmm2, %xmm1
movsd .LC4(%rip), %xmm4
ucomisd %xmm1, %xmm4
jbe .L22
cvttsd2siq %xmm0, %rax
pxor %xmm1, %xmm1
cvtsi2sdq %rax, %xmm1
cmpnlesd %xmm1, %xmm3
movsd .LC6(%rip), %xmm4
andpd %xmm4, %xmm3
addsd %xmm1, %xmm3
andnpd %xmm0, %xmm2
orpd %xmm2, %xmm3
.L22:
cvttsd2siq %xmm3, %rax
movl %eax, 32(%rsp)
movl $1, 36(%rsp)
movl 52(%rsp), %ecx
movl $0, %r9d
movl $0, %r8d
movq 44(%rsp), %rdx
movq 32(%rsp), %rdi
movl $1, %esi
call __cudaPushCallConfiguration@PLT
testl %eax, %eax
je .L26
.L23:
movl $2, %ecx
movq %rbx, %rdx
movq 24(%rsp), %rsi
movq %r12, %rdi
call cudaMemcpy@PLT
movq 8(%rsp), %rdi
call cudaFree@PLT
movq 16(%rsp), %rdi
call cudaFree@PLT
movq 24(%rsp), %rdi
call cudaFree@PLT
movq 56(%rsp), %rax
subq %fs:40, %rax
jne .L27
addq $72, %rsp
.cfi_remember_state
.cfi_def_cfa_offset 56
popq %rbx
.cfi_def_cfa_offset 48
popq %rbp
.cfi_def_cfa_offset 40
popq %r12
.cfi_def_cfa_offset 32
popq %r13
.cfi_def_cfa_offset 24
popq %r14
.cfi_def_cfa_offset 16
popq %r15
.cfi_def_cfa_offset 8
ret
.L26:
.cfi_restore_state
movl %ebp, %ecx
movq 24(%rsp), %rdx
movq 16(%rsp), %rsi
movq 8(%rsp), %rdi
call _Z41__device_stub__Z16sumaMatrixKernelPfS_S_iPfS_S_i
jmp .L23
.L27:
call __stack_chk_fail@PLT
.cfi_endproc
.LFE3669:
.size _Z10sumaMatrixPfS_S_i, .-_Z10sumaMatrixPfS_S_i
.globl main
.type main, @function
main:
.LFB3672:
.cfi_startproc
endbr64
pushq %r12
.cfi_def_cfa_offset 16
.cfi_offset 12, -16
pushq %rbp
.cfi_def_cfa_offset 24
.cfi_offset 6, -24
pushq %rbx
.cfi_def_cfa_offset 32
.cfi_offset 3, -32
movl $400, %edi
call _Znam@PLT
movq %rax, %rbp
movl $400, %edi
call _Znam@PLT
movq %rax, %r12
movl $400, %edi
call _Znam@PLT
movq %rax, %rbx
movl $10, %esi
movq %rbp, %rdi
call _Z11datosRandomPfi
movl $10, %esi
movq %r12, %rdi
call _Z11datosRandomPfi
movl $10, %ecx
movq %rbx, %rdx
movq %r12, %rsi
movq %rbp, %rdi
call _Z10sumaMatrixPfS_S_i
movl $10, %esi
movq %rbx, %rdi
call _Z11printMatrixPfi
movl $0, %eax
popq %rbx
.cfi_def_cfa_offset 24
popq %rbp
.cfi_def_cfa_offset 16
popq %r12
.cfi_def_cfa_offset 8
ret
.cfi_endproc
.LFE3672:
.size main, .-main
.globl _Z44__device_stub__Z19sumaMatrixKernelRowPfS_S_iPfS_S_i
.type _Z44__device_stub__Z19sumaMatrixKernelRowPfS_S_iPfS_S_i, @function
_Z44__device_stub__Z19sumaMatrixKernelRowPfS_S_iPfS_S_i:
.LFB3699:
.cfi_startproc
endbr64
subq $152, %rsp
.cfi_def_cfa_offset 160
movq %rdi, 24(%rsp)
movq %rsi, 16(%rsp)
movq %rdx, 8(%rsp)
movl %ecx, 4(%rsp)
movq %fs:40, %rax
movq %rax, 136(%rsp)
xorl %eax, %eax
leaq 24(%rsp), %rax
movq %rax, 96(%rsp)
leaq 16(%rsp), %rax
movq %rax, 104(%rsp)
leaq 8(%rsp), %rax
movq %rax, 112(%rsp)
leaq 4(%rsp), %rax
movq %rax, 120(%rsp)
movl $1, 48(%rsp)
movl $1, 52(%rsp)
movl $1, 56(%rsp)
movl $1, 60(%rsp)
movl $1, 64(%rsp)
movl $1, 68(%rsp)
leaq 40(%rsp), %rcx
leaq 32(%rsp), %rdx
leaq 60(%rsp), %rsi
leaq 48(%rsp), %rdi
call __cudaPopCallConfiguration@PLT
testl %eax, %eax
je .L34
.L30:
movq 136(%rsp), %rax
subq %fs:40, %rax
jne .L35
addq $152, %rsp
.cfi_remember_state
.cfi_def_cfa_offset 8
ret
.L34:
.cfi_restore_state
pushq 40(%rsp)
.cfi_def_cfa_offset 168
pushq 40(%rsp)
.cfi_def_cfa_offset 176
leaq 112(%rsp), %r9
movq 76(%rsp), %rcx
movl 84(%rsp), %r8d
movq 64(%rsp), %rsi
movl 72(%rsp), %edx
leaq _Z19sumaMatrixKernelRowPfS_S_i(%rip), %rdi
call cudaLaunchKernel@PLT
addq $16, %rsp
.cfi_def_cfa_offset 160
jmp .L30
.L35:
call __stack_chk_fail@PLT
.cfi_endproc
.LFE3699:
.size _Z44__device_stub__Z19sumaMatrixKernelRowPfS_S_iPfS_S_i, .-_Z44__device_stub__Z19sumaMatrixKernelRowPfS_S_iPfS_S_i
.globl _Z19sumaMatrixKernelRowPfS_S_i
.type _Z19sumaMatrixKernelRowPfS_S_i, @function
_Z19sumaMatrixKernelRowPfS_S_i:
.LFB3700:
.cfi_startproc
endbr64
subq $8, %rsp
.cfi_def_cfa_offset 16
call _Z44__device_stub__Z19sumaMatrixKernelRowPfS_S_iPfS_S_i
addq $8, %rsp
.cfi_def_cfa_offset 8
ret
.cfi_endproc
.LFE3700:
.size _Z19sumaMatrixKernelRowPfS_S_i, .-_Z19sumaMatrixKernelRowPfS_S_i
.globl _Z47__device_stub__Z22sumaMatrixKernelColumnPfS_S_iPfS_S_i
.type _Z47__device_stub__Z22sumaMatrixKernelColumnPfS_S_iPfS_S_i, @function
_Z47__device_stub__Z22sumaMatrixKernelColumnPfS_S_iPfS_S_i:
.LFB3701:
.cfi_startproc
endbr64
subq $152, %rsp
.cfi_def_cfa_offset 160
movq %rdi, 24(%rsp)
movq %rsi, 16(%rsp)
movq %rdx, 8(%rsp)
movl %ecx, 4(%rsp)
movq %fs:40, %rax
movq %rax, 136(%rsp)
xorl %eax, %eax
leaq 24(%rsp), %rax
movq %rax, 96(%rsp)
leaq 16(%rsp), %rax
movq %rax, 104(%rsp)
leaq 8(%rsp), %rax
movq %rax, 112(%rsp)
leaq 4(%rsp), %rax
movq %rax, 120(%rsp)
movl $1, 48(%rsp)
movl $1, 52(%rsp)
movl $1, 56(%rsp)
movl $1, 60(%rsp)
movl $1, 64(%rsp)
movl $1, 68(%rsp)
leaq 40(%rsp), %rcx
leaq 32(%rsp), %rdx
leaq 60(%rsp), %rsi
leaq 48(%rsp), %rdi
call __cudaPopCallConfiguration@PLT
testl %eax, %eax
je .L42
.L38:
movq 136(%rsp), %rax
subq %fs:40, %rax
jne .L43
addq $152, %rsp
.cfi_remember_state
.cfi_def_cfa_offset 8
ret
.L42:
.cfi_restore_state
pushq 40(%rsp)
.cfi_def_cfa_offset 168
pushq 40(%rsp)
.cfi_def_cfa_offset 176
leaq 112(%rsp), %r9
movq 76(%rsp), %rcx
movl 84(%rsp), %r8d
movq 64(%rsp), %rsi
movl 72(%rsp), %edx
leaq _Z22sumaMatrixKernelColumnPfS_S_i(%rip), %rdi
call cudaLaunchKernel@PLT
addq $16, %rsp
.cfi_def_cfa_offset 160
jmp .L38
.L43:
call __stack_chk_fail@PLT
.cfi_endproc
.LFE3701:
.size _Z47__device_stub__Z22sumaMatrixKernelColumnPfS_S_iPfS_S_i, .-_Z47__device_stub__Z22sumaMatrixKernelColumnPfS_S_iPfS_S_i
.globl _Z22sumaMatrixKernelColumnPfS_S_i
.type _Z22sumaMatrixKernelColumnPfS_S_i, @function
_Z22sumaMatrixKernelColumnPfS_S_i:
.LFB3702:
.cfi_startproc
endbr64
subq $8, %rsp
.cfi_def_cfa_offset 16
call _Z47__device_stub__Z22sumaMatrixKernelColumnPfS_S_iPfS_S_i
addq $8, %rsp
.cfi_def_cfa_offset 8
ret
.cfi_endproc
.LFE3702:
.size _Z22sumaMatrixKernelColumnPfS_S_i, .-_Z22sumaMatrixKernelColumnPfS_S_i
.section .rodata.str1.8,"aMS",@progbits,1
.align 8
.LC8:
.string "_Z22sumaMatrixKernelColumnPfS_S_i"
.align 8
.LC9:
.string "_Z19sumaMatrixKernelRowPfS_S_i"
.section .rodata.str1.1
.LC10:
.string "_Z16sumaMatrixKernelPfS_S_i"
.text
.type _ZL24__sti____cudaRegisterAllv, @function
_ZL24__sti____cudaRegisterAllv:
.LFB3704:
.cfi_startproc
endbr64
pushq %rbx
.cfi_def_cfa_offset 16
.cfi_offset 3, -16
leaq _ZL15__fatDeviceText(%rip), %rdi
call __cudaRegisterFatBinary@PLT
movq %rax, %rbx
movq %rax, _ZL20__cudaFatCubinHandle(%rip)
pushq $0
.cfi_def_cfa_offset 24
pushq $0
.cfi_def_cfa_offset 32
pushq $0
.cfi_def_cfa_offset 40
pushq $0
.cfi_def_cfa_offset 48
movl $0, %r9d
movl $-1, %r8d
leaq .LC8(%rip), %rdx
movq %rdx, %rcx
leaq _Z22sumaMatrixKernelColumnPfS_S_i(%rip), %rsi
movq %rax, %rdi
call __cudaRegisterFunction@PLT
addq $32, %rsp
.cfi_def_cfa_offset 16
pushq $0
.cfi_def_cfa_offset 24
pushq $0
.cfi_def_cfa_offset 32
pushq $0
.cfi_def_cfa_offset 40
pushq $0
.cfi_def_cfa_offset 48
movl $0, %r9d
movl $-1, %r8d
leaq .LC9(%rip), %rdx
movq %rdx, %rcx
leaq _Z19sumaMatrixKernelRowPfS_S_i(%rip), %rsi
movq %rbx, %rdi
call __cudaRegisterFunction@PLT
addq $32, %rsp
.cfi_def_cfa_offset 16
pushq $0
.cfi_def_cfa_offset 24
pushq $0
.cfi_def_cfa_offset 32
pushq $0
.cfi_def_cfa_offset 40
pushq $0
.cfi_def_cfa_offset 48
movl $0, %r9d
movl $-1, %r8d
leaq .LC10(%rip), %rdx
movq %rdx, %rcx
leaq _Z16sumaMatrixKernelPfS_S_i(%rip), %rsi
movq %rbx, %rdi
call __cudaRegisterFunction@PLT
addq $32, %rsp
.cfi_def_cfa_offset 16
movq _ZL20__cudaFatCubinHandle(%rip), %rdi
call __cudaRegisterFatBinaryEnd@PLT
leaq _ZL26__cudaUnregisterBinaryUtilv(%rip), %rdi
call atexit@PLT
popq %rbx
.cfi_def_cfa_offset 8
ret
.cfi_endproc
.LFE3704:
.size _ZL24__sti____cudaRegisterAllv, .-_ZL24__sti____cudaRegisterAllv
.section .init_array,"aw"
.align 8
.quad _ZL24__sti____cudaRegisterAllv
.section .nvFatBinSegment,"aw"
.align 8
.type _ZL15__fatDeviceText, @object
.size _ZL15__fatDeviceText, 24
_ZL15__fatDeviceText:
.long 1180844977
.long 1
.quad fatbinData
.quad 0
.local _ZL20__cudaFatCubinHandle
.comm _ZL20__cudaFatCubinHandle,8,8
.section .rodata.cst4,"aM",@progbits,4
.align 4
.LC0:
.long 1065353216
.section .rodata.cst8,"aM",@progbits,8
.align 8
.LC3:
.long 0
.long 1064304640
.align 8
.LC4:
.long 0
.long 1127219200
.align 8
.LC6:
.long 0
.long 1072693248
.align 8
.LC7:
.long -1
.long 2147483647
.ident "GCC: (Ubuntu 13.3.0-6ubuntu2~24.04) 13.3.0"
.section .note.GNU-stack,"",@progbits
.section .note.gnu.property,"a"
.align 8
.long 1f - 0f
.long 4f - 1f
.long 5
0:
.string "GNU"
1:
.align 8
.long 0xc0000002
.long 3f - 2f
2:
.long 0x3
3:
.align 8
4: | .text
.file "sumaMatriz.hip"
# Start of file scope inline assembly
.globl _ZSt21ios_base_library_initv
# End of file scope inline assembly
.globl _Z31__device_stub__sumaMatrixKernelPfS_S_i # -- Begin function _Z31__device_stub__sumaMatrixKernelPfS_S_i
.p2align 4, 0x90
.type _Z31__device_stub__sumaMatrixKernelPfS_S_i,@function
_Z31__device_stub__sumaMatrixKernelPfS_S_i: # @_Z31__device_stub__sumaMatrixKernelPfS_S_i
.cfi_startproc
# %bb.0:
subq $120, %rsp
.cfi_def_cfa_offset 128
movq %rdi, 72(%rsp)
movq %rsi, 64(%rsp)
movq %rdx, 56(%rsp)
movl %ecx, 4(%rsp)
leaq 72(%rsp), %rax
movq %rax, 80(%rsp)
leaq 64(%rsp), %rax
movq %rax, 88(%rsp)
leaq 56(%rsp), %rax
movq %rax, 96(%rsp)
leaq 4(%rsp), %rax
movq %rax, 104(%rsp)
leaq 40(%rsp), %rdi
leaq 24(%rsp), %rsi
leaq 16(%rsp), %rdx
leaq 8(%rsp), %rcx
callq __hipPopCallConfiguration
movq 40(%rsp), %rsi
movl 48(%rsp), %edx
movq 24(%rsp), %rcx
movl 32(%rsp), %r8d
leaq 80(%rsp), %r9
movl $_Z16sumaMatrixKernelPfS_S_i, %edi
pushq 8(%rsp)
.cfi_adjust_cfa_offset 8
pushq 24(%rsp)
.cfi_adjust_cfa_offset 8
callq hipLaunchKernel
addq $136, %rsp
.cfi_adjust_cfa_offset -136
retq
.Lfunc_end0:
.size _Z31__device_stub__sumaMatrixKernelPfS_S_i, .Lfunc_end0-_Z31__device_stub__sumaMatrixKernelPfS_S_i
.cfi_endproc
# -- End function
.globl _Z34__device_stub__sumaMatrixKernelRowPfS_S_i # -- Begin function _Z34__device_stub__sumaMatrixKernelRowPfS_S_i
.p2align 4, 0x90
.type _Z34__device_stub__sumaMatrixKernelRowPfS_S_i,@function
_Z34__device_stub__sumaMatrixKernelRowPfS_S_i: # @_Z34__device_stub__sumaMatrixKernelRowPfS_S_i
.cfi_startproc
# %bb.0:
subq $120, %rsp
.cfi_def_cfa_offset 128
movq %rdi, 72(%rsp)
movq %rsi, 64(%rsp)
movq %rdx, 56(%rsp)
movl %ecx, 4(%rsp)
leaq 72(%rsp), %rax
movq %rax, 80(%rsp)
leaq 64(%rsp), %rax
movq %rax, 88(%rsp)
leaq 56(%rsp), %rax
movq %rax, 96(%rsp)
leaq 4(%rsp), %rax
movq %rax, 104(%rsp)
leaq 40(%rsp), %rdi
leaq 24(%rsp), %rsi
leaq 16(%rsp), %rdx
leaq 8(%rsp), %rcx
callq __hipPopCallConfiguration
movq 40(%rsp), %rsi
movl 48(%rsp), %edx
movq 24(%rsp), %rcx
movl 32(%rsp), %r8d
leaq 80(%rsp), %r9
movl $_Z19sumaMatrixKernelRowPfS_S_i, %edi
pushq 8(%rsp)
.cfi_adjust_cfa_offset 8
pushq 24(%rsp)
.cfi_adjust_cfa_offset 8
callq hipLaunchKernel
addq $136, %rsp
.cfi_adjust_cfa_offset -136
retq
.Lfunc_end1:
.size _Z34__device_stub__sumaMatrixKernelRowPfS_S_i, .Lfunc_end1-_Z34__device_stub__sumaMatrixKernelRowPfS_S_i
.cfi_endproc
# -- End function
.globl _Z37__device_stub__sumaMatrixKernelColumnPfS_S_i # -- Begin function _Z37__device_stub__sumaMatrixKernelColumnPfS_S_i
.p2align 4, 0x90
.type _Z37__device_stub__sumaMatrixKernelColumnPfS_S_i,@function
_Z37__device_stub__sumaMatrixKernelColumnPfS_S_i: # @_Z37__device_stub__sumaMatrixKernelColumnPfS_S_i
.cfi_startproc
# %bb.0:
subq $120, %rsp
.cfi_def_cfa_offset 128
movq %rdi, 72(%rsp)
movq %rsi, 64(%rsp)
movq %rdx, 56(%rsp)
movl %ecx, 4(%rsp)
leaq 72(%rsp), %rax
movq %rax, 80(%rsp)
leaq 64(%rsp), %rax
movq %rax, 88(%rsp)
leaq 56(%rsp), %rax
movq %rax, 96(%rsp)
leaq 4(%rsp), %rax
movq %rax, 104(%rsp)
leaq 40(%rsp), %rdi
leaq 24(%rsp), %rsi
leaq 16(%rsp), %rdx
leaq 8(%rsp), %rcx
callq __hipPopCallConfiguration
movq 40(%rsp), %rsi
movl 48(%rsp), %edx
movq 24(%rsp), %rcx
movl 32(%rsp), %r8d
leaq 80(%rsp), %r9
movl $_Z22sumaMatrixKernelColumnPfS_S_i, %edi
pushq 8(%rsp)
.cfi_adjust_cfa_offset 8
pushq 24(%rsp)
.cfi_adjust_cfa_offset 8
callq hipLaunchKernel
addq $136, %rsp
.cfi_adjust_cfa_offset -136
retq
.Lfunc_end2:
.size _Z37__device_stub__sumaMatrixKernelColumnPfS_S_i, .Lfunc_end2-_Z37__device_stub__sumaMatrixKernelColumnPfS_S_i
.cfi_endproc
# -- End function
.section .rodata.cst8,"aM",@progbits,8
.p2align 3, 0x0 # -- Begin function _Z10sumaMatrixPfS_S_i
.LCPI3_0:
.quad 0x3f70000000000000 # double 0.00390625
.text
.globl _Z10sumaMatrixPfS_S_i
.p2align 4, 0x90
.type _Z10sumaMatrixPfS_S_i,@function
_Z10sumaMatrixPfS_S_i: # @_Z10sumaMatrixPfS_S_i
.cfi_startproc
# %bb.0:
pushq %rbp
.cfi_def_cfa_offset 16
pushq %r15
.cfi_def_cfa_offset 24
pushq %r14
.cfi_def_cfa_offset 32
pushq %r13
.cfi_def_cfa_offset 40
pushq %r12
.cfi_def_cfa_offset 48
pushq %rbx
.cfi_def_cfa_offset 56
subq $152, %rsp
.cfi_def_cfa_offset 208
.cfi_offset %rbx, -56
.cfi_offset %r12, -48
.cfi_offset %r13, -40
.cfi_offset %r14, -32
.cfi_offset %r15, -24
.cfi_offset %rbp, -16
movl %ecx, %ebp
movq %rdx, %rbx
movq %rsi, %r15
movq %rdi, %r12
movl %ecx, %r13d
imull %r13d, %r13d
leal (,%r13,4), %eax
movslq %eax, %r14
leaq 24(%rsp), %rdi
movq %r14, %rsi
callq hipMalloc
leaq 16(%rsp), %rdi
movq %r14, %rsi
callq hipMalloc
leaq 8(%rsp), %rdi
movq %r14, %rsi
callq hipMalloc
movq 24(%rsp), %rdi
movq %r12, %rsi
movq %r14, %rdx
movl $1, %ecx
callq hipMemcpy
movq 16(%rsp), %rdi
movq %r15, %rsi
movq %r14, %rdx
movl $1, %ecx
callq hipMemcpy
cvtsi2sd %r13d, %xmm0
mulsd .LCPI3_0(%rip), %xmm0
callq ceil@PLT
cvttsd2si %xmm0, %rax
movl %eax, %edi
movabsq $4294967296, %rdx # imm = 0x100000000
orq %rdx, %rdi
orq $256, %rdx # imm = 0x100
movl $1, %esi
movl $1, %ecx
xorl %r8d, %r8d
xorl %r9d, %r9d
callq __hipPushCallConfiguration
testl %eax, %eax
jne .LBB3_2
# %bb.1:
movq 24(%rsp), %rax
movq 16(%rsp), %rcx
movq 8(%rsp), %rdx
movq %rax, 104(%rsp)
movq %rcx, 96(%rsp)
movq %rdx, 88(%rsp)
movl %ebp, 36(%rsp)
leaq 104(%rsp), %rax
movq %rax, 112(%rsp)
leaq 96(%rsp), %rax
movq %rax, 120(%rsp)
leaq 88(%rsp), %rax
movq %rax, 128(%rsp)
leaq 36(%rsp), %rax
movq %rax, 136(%rsp)
leaq 72(%rsp), %rdi
leaq 56(%rsp), %rsi
leaq 48(%rsp), %rdx
leaq 40(%rsp), %rcx
callq __hipPopCallConfiguration
movq 72(%rsp), %rsi
movl 80(%rsp), %edx
movq 56(%rsp), %rcx
movl 64(%rsp), %r8d
leaq 112(%rsp), %r9
movl $_Z16sumaMatrixKernelPfS_S_i, %edi
pushq 40(%rsp)
.cfi_adjust_cfa_offset 8
pushq 56(%rsp)
.cfi_adjust_cfa_offset 8
callq hipLaunchKernel
addq $16, %rsp
.cfi_adjust_cfa_offset -16
.LBB3_2:
movq 8(%rsp), %rsi
movq %rbx, %rdi
movq %r14, %rdx
movl $2, %ecx
callq hipMemcpy
movq 24(%rsp), %rdi
callq hipFree
movq 16(%rsp), %rdi
callq hipFree
movq 8(%rsp), %rdi
callq hipFree
addq $152, %rsp
.cfi_def_cfa_offset 56
popq %rbx
.cfi_def_cfa_offset 48
popq %r12
.cfi_def_cfa_offset 40
popq %r13
.cfi_def_cfa_offset 32
popq %r14
.cfi_def_cfa_offset 24
popq %r15
.cfi_def_cfa_offset 16
popq %rbp
.cfi_def_cfa_offset 8
retq
.Lfunc_end3:
.size _Z10sumaMatrixPfS_S_i, .Lfunc_end3-_Z10sumaMatrixPfS_S_i
.cfi_endproc
# -- End function
.globl _Z11datosRandomPfi # -- Begin function _Z11datosRandomPfi
.p2align 4, 0x90
.type _Z11datosRandomPfi,@function
_Z11datosRandomPfi: # @_Z11datosRandomPfi
.cfi_startproc
# %bb.0:
testl %esi, %esi
jle .LBB4_5
# %bb.1: # %.preheader.lr.ph
movl %esi, %eax
xorl %ecx, %ecx
xorl %edx, %edx
.p2align 4, 0x90
.LBB4_2: # %.preheader
# =>This Loop Header: Depth=1
# Child Loop BB4_3 Depth 2
movl %ecx, %r8d
leaq (%rdi,%r8,4), %r8
xorl %r9d, %r9d
.p2align 4, 0x90
.LBB4_3: # Parent Loop BB4_2 Depth=1
# => This Inner Loop Header: Depth=2
movl $1065353216, (%r8,%r9,4) # imm = 0x3F800000
incq %r9
cmpq %r9, %rax
jne .LBB4_3
# %bb.4: # %._crit_edge
# in Loop: Header=BB4_2 Depth=1
incq %rdx
addl %esi, %ecx
cmpq %rax, %rdx
jne .LBB4_2
.LBB4_5: # %._crit_edge13
retq
.Lfunc_end4:
.size _Z11datosRandomPfi, .Lfunc_end4-_Z11datosRandomPfi
.cfi_endproc
# -- End function
.globl _Z11printMatrixPfi # -- Begin function _Z11printMatrixPfi
.p2align 4, 0x90
.type _Z11printMatrixPfi,@function
_Z11printMatrixPfi: # @_Z11printMatrixPfi
.cfi_startproc
# %bb.0:
testl %esi, %esi
jle .LBB5_4
# %bb.1: # %.lr.ph.preheader
pushq %r15
.cfi_def_cfa_offset 16
pushq %r14
.cfi_def_cfa_offset 24
pushq %rbx
.cfi_def_cfa_offset 32
.cfi_offset %rbx, -32
.cfi_offset %r14, -24
.cfi_offset %r15, -16
movq %rdi, %rbx
movl %esi, %r14d
xorl %r15d, %r15d
.p2align 4, 0x90
.LBB5_2: # %.lr.ph
# =>This Inner Loop Header: Depth=1
movss (%rbx,%r15,4), %xmm0 # xmm0 = mem[0],zero,zero,zero
cvtss2sd %xmm0, %xmm0
movl $.L.str, %edi
movb $1, %al
callq printf
incq %r15
cmpq %r15, %r14
jne .LBB5_2
# %bb.3:
popq %rbx
.cfi_def_cfa_offset 24
popq %r14
.cfi_def_cfa_offset 16
popq %r15
.cfi_def_cfa_offset 8
.cfi_restore %rbx
.cfi_restore %r14
.cfi_restore %r15
.LBB5_4: # %._crit_edge
movl $10, %edi
jmp putchar@PLT # TAILCALL
.Lfunc_end5:
.size _Z11printMatrixPfi, .Lfunc_end5-_Z11printMatrixPfi
.cfi_endproc
# -- End function
.globl main # -- Begin function main
.p2align 4, 0x90
.type main,@function
main: # @main
.cfi_startproc
# %bb.0:
pushq %r15
.cfi_def_cfa_offset 16
pushq %r14
.cfi_def_cfa_offset 24
pushq %rbx
.cfi_def_cfa_offset 32
.cfi_offset %rbx, -32
.cfi_offset %r14, -24
.cfi_offset %r15, -16
movl $400, %edi # imm = 0x190
callq _Znam
movq %rax, %r14
movl $400, %edi # imm = 0x190
callq _Znam
movq %rax, %r15
movl $400, %edi # imm = 0x190
callq _Znam
movq %rax, %rbx
xorl %eax, %eax
movq %r14, %rcx
.p2align 4, 0x90
.LBB6_1: # %.preheader.i
# =>This Loop Header: Depth=1
# Child Loop BB6_2 Depth 2
xorl %edx, %edx
.p2align 4, 0x90
.LBB6_2: # Parent Loop BB6_1 Depth=1
# => This Inner Loop Header: Depth=2
movl $1065353216, (%rcx,%rdx,4) # imm = 0x3F800000
incq %rdx
cmpq $10, %rdx
jne .LBB6_2
# %bb.3: # %._crit_edge.i
# in Loop: Header=BB6_1 Depth=1
incq %rax
addq $40, %rcx
cmpq $10, %rax
jne .LBB6_1
# %bb.4: # %.preheader.i15.preheader
xorl %eax, %eax
movq %r15, %rcx
.p2align 4, 0x90
.LBB6_5: # %.preheader.i15
# =>This Loop Header: Depth=1
# Child Loop BB6_6 Depth 2
xorl %edx, %edx
.p2align 4, 0x90
.LBB6_6: # Parent Loop BB6_5 Depth=1
# => This Inner Loop Header: Depth=2
movl $1065353216, (%rcx,%rdx,4) # imm = 0x3F800000
incq %rdx
cmpq $10, %rdx
jne .LBB6_6
# %bb.7: # %._crit_edge.i20
# in Loop: Header=BB6_5 Depth=1
incq %rax
addq $40, %rcx
cmpq $10, %rax
jne .LBB6_5
# %bb.8: # %_Z11datosRandomPfi.exit23
movq %r14, %rdi
movq %r15, %rsi
movq %rbx, %rdx
movl $10, %ecx
callq _Z10sumaMatrixPfS_S_i
xorl %r14d, %r14d
.p2align 4, 0x90
.LBB6_9: # %.lr.ph.i
# =>This Inner Loop Header: Depth=1
movss (%rbx,%r14,4), %xmm0 # xmm0 = mem[0],zero,zero,zero
cvtss2sd %xmm0, %xmm0
movl $.L.str, %edi
movb $1, %al
callq printf
incq %r14
cmpq $10, %r14
jne .LBB6_9
# %bb.10: # %_Z11printMatrixPfi.exit
movl $10, %edi
callq putchar@PLT
xorl %eax, %eax
popq %rbx
.cfi_def_cfa_offset 24
popq %r14
.cfi_def_cfa_offset 16
popq %r15
.cfi_def_cfa_offset 8
retq
.Lfunc_end6:
.size main, .Lfunc_end6-main
.cfi_endproc
# -- End function
.p2align 4, 0x90 # -- Begin function __hip_module_ctor
.type __hip_module_ctor,@function
__hip_module_ctor: # @__hip_module_ctor
.cfi_startproc
# %bb.0:
pushq %rbx
.cfi_def_cfa_offset 16
subq $32, %rsp
.cfi_def_cfa_offset 48
.cfi_offset %rbx, -16
cmpq $0, __hip_gpubin_handle(%rip)
jne .LBB7_2
# %bb.1:
movl $__hip_fatbin_wrapper, %edi
callq __hipRegisterFatBinary
movq %rax, __hip_gpubin_handle(%rip)
.LBB7_2:
movq __hip_gpubin_handle(%rip), %rbx
xorps %xmm0, %xmm0
movups %xmm0, 16(%rsp)
movups %xmm0, (%rsp)
movl $_Z16sumaMatrixKernelPfS_S_i, %esi
movl $.L__unnamed_1, %edx
movl $.L__unnamed_1, %ecx
movq %rbx, %rdi
movl $-1, %r8d
xorl %r9d, %r9d
callq __hipRegisterFunction
xorps %xmm0, %xmm0
movups %xmm0, 16(%rsp)
movups %xmm0, (%rsp)
movl $_Z19sumaMatrixKernelRowPfS_S_i, %esi
movl $.L__unnamed_2, %edx
movl $.L__unnamed_2, %ecx
movq %rbx, %rdi
movl $-1, %r8d
xorl %r9d, %r9d
callq __hipRegisterFunction
xorps %xmm0, %xmm0
movups %xmm0, 16(%rsp)
movups %xmm0, (%rsp)
movl $_Z22sumaMatrixKernelColumnPfS_S_i, %esi
movl $.L__unnamed_3, %edx
movl $.L__unnamed_3, %ecx
movq %rbx, %rdi
movl $-1, %r8d
xorl %r9d, %r9d
callq __hipRegisterFunction
movl $__hip_module_dtor, %edi
addq $32, %rsp
.cfi_def_cfa_offset 16
popq %rbx
.cfi_def_cfa_offset 8
jmp atexit # TAILCALL
.Lfunc_end7:
.size __hip_module_ctor, .Lfunc_end7-__hip_module_ctor
.cfi_endproc
# -- End function
.p2align 4, 0x90 # -- Begin function __hip_module_dtor
.type __hip_module_dtor,@function
__hip_module_dtor: # @__hip_module_dtor
.cfi_startproc
# %bb.0:
movq __hip_gpubin_handle(%rip), %rdi
testq %rdi, %rdi
je .LBB8_2
# %bb.1:
pushq %rax
.cfi_def_cfa_offset 16
callq __hipUnregisterFatBinary
movq $0, __hip_gpubin_handle(%rip)
addq $8, %rsp
.cfi_def_cfa_offset 8
.LBB8_2:
retq
.Lfunc_end8:
.size __hip_module_dtor, .Lfunc_end8-__hip_module_dtor
.cfi_endproc
# -- End function
.type _Z16sumaMatrixKernelPfS_S_i,@object # @_Z16sumaMatrixKernelPfS_S_i
.section .rodata,"a",@progbits
.globl _Z16sumaMatrixKernelPfS_S_i
.p2align 3, 0x0
_Z16sumaMatrixKernelPfS_S_i:
.quad _Z31__device_stub__sumaMatrixKernelPfS_S_i
.size _Z16sumaMatrixKernelPfS_S_i, 8
.type _Z19sumaMatrixKernelRowPfS_S_i,@object # @_Z19sumaMatrixKernelRowPfS_S_i
.globl _Z19sumaMatrixKernelRowPfS_S_i
.p2align 3, 0x0
_Z19sumaMatrixKernelRowPfS_S_i:
.quad _Z34__device_stub__sumaMatrixKernelRowPfS_S_i
.size _Z19sumaMatrixKernelRowPfS_S_i, 8
.type _Z22sumaMatrixKernelColumnPfS_S_i,@object # @_Z22sumaMatrixKernelColumnPfS_S_i
.globl _Z22sumaMatrixKernelColumnPfS_S_i
.p2align 3, 0x0
_Z22sumaMatrixKernelColumnPfS_S_i:
.quad _Z37__device_stub__sumaMatrixKernelColumnPfS_S_i
.size _Z22sumaMatrixKernelColumnPfS_S_i, 8
.type .L.str,@object # @.str
.section .rodata.str1.1,"aMS",@progbits,1
.L.str:
.asciz "%f "
.size .L.str, 4
.type .L__unnamed_1,@object # @0
.L__unnamed_1:
.asciz "_Z16sumaMatrixKernelPfS_S_i"
.size .L__unnamed_1, 28
.type .L__unnamed_2,@object # @1
.L__unnamed_2:
.asciz "_Z19sumaMatrixKernelRowPfS_S_i"
.size .L__unnamed_2, 31
.type .L__unnamed_3,@object # @2
.L__unnamed_3:
.asciz "_Z22sumaMatrixKernelColumnPfS_S_i"
.size .L__unnamed_3, 34
.type __hip_fatbin_wrapper,@object # @__hip_fatbin_wrapper
.section .hipFatBinSegment,"a",@progbits
.p2align 3, 0x0
__hip_fatbin_wrapper:
.long 1212764230 # 0x48495046
.long 1 # 0x1
.quad __hip_fatbin
.quad 0
.size __hip_fatbin_wrapper, 24
.type __hip_gpubin_handle,@object # @__hip_gpubin_handle
.local __hip_gpubin_handle
.comm __hip_gpubin_handle,8,8
.section .init_array,"aw",@init_array
.p2align 3, 0x0
.quad __hip_module_ctor
.type __hip_cuid_,@object # @__hip_cuid_
.bss
.globl __hip_cuid_
__hip_cuid_:
.byte 0 # 0x0
.size __hip_cuid_, 1
.section ".linker-options","e",@llvm_linker_options
.ident "AMD clang version 18.0.0git (https://github.com/RadeonOpenCompute/llvm-project roc-6.3.2 25012 e5bf7e55c91490b07c49d8960fa7983d864936c4)"
.section ".note.GNU-stack","",@progbits
.addrsig
.addrsig_sym _Z31__device_stub__sumaMatrixKernelPfS_S_i
.addrsig_sym _Z34__device_stub__sumaMatrixKernelRowPfS_S_i
.addrsig_sym _Z37__device_stub__sumaMatrixKernelColumnPfS_S_i
.addrsig_sym __hip_module_ctor
.addrsig_sym __hip_module_dtor
.addrsig_sym _Z16sumaMatrixKernelPfS_S_i
.addrsig_sym _Z19sumaMatrixKernelRowPfS_S_i
.addrsig_sym _Z22sumaMatrixKernelColumnPfS_S_i
.addrsig_sym __hip_fatbin
.addrsig_sym __hip_fatbin_wrapper
.addrsig_sym __hip_cuid_ |
You are a helpful coding assistant specialized in converting CUDA source code to CUDA device assembly. | #include <stdio.h>
/*
//=========== PART-1 ========================
__global__ void hello()
{
}
int main(void)
{
hello<<< 1, 1 >>>();
cudaDeviceSynchronize();
printf("Hello World\n");
return 0;
}
*/
//=========== PART-2 ========================
__device__ const char *STR = "HELLO WORLD!";
const char STR_LENGTH = 12;
__global__ void hello()
{
//every thread prints one character
printf("%c\n", STR[threadIdx.x % STR_LENGTH]);
}
int main(void)
{
hello<<< 1, 16>>>();
cudaDeviceSynchronize();
return 0;
} | code for sm_80
Function : _Z5hellov
.headerflags @"EF_CUDA_TEXMODE_UNIFIED EF_CUDA_64BIT_ADDRESS EF_CUDA_SM80 EF_CUDA_VIRTUAL_SM(EF_CUDA_SM80)"
/*0000*/ IMAD.MOV.U32 R1, RZ, RZ, c[0x0][0x28] ; /* 0x00000a00ff017624 */
/* 0x000fe400078e00ff */
/*0010*/ IMAD.MOV.U32 R4, RZ, RZ, c[0x4][0x10] ; /* 0x01000400ff047624 */
/* 0x000fe200078e00ff */
/*0020*/ ULDC.64 UR4, c[0x0][0x118] ; /* 0x0000460000047ab9 */
/* 0x000fe20000000a00 */
/*0030*/ IMAD.MOV.U32 R5, RZ, RZ, c[0x4][0x14] ; /* 0x01000500ff057624 */
/* 0x000fe200078e00ff */
/*0040*/ IADD3 R1, R1, -0x8, RZ ; /* 0xfffffff801017810 */
/* 0x000fca0007ffe0ff */
/*0050*/ LDG.E.64 R4, [R4.64] ; /* 0x0000000404047981 */
/* 0x000ea8000c1e1b00 */
/*0060*/ S2R R9, SR_TID.X ; /* 0x0000000000097919 */
/* 0x000e240000002100 */
/*0070*/ IMAD.WIDE.U32 R2, R9, -0x55555555, RZ ; /* 0xaaaaaaab09027825 */
/* 0x001fca00078e00ff */
/*0080*/ SHF.R.U32.HI R2, RZ, 0x3, R3 ; /* 0x00000003ff027819 */
/* 0x000fca0000011603 */
/*0090*/ IMAD R9, R2, -0xc, R9 ; /* 0xfffffff402097824 */
/* 0x000fca00078e0209 */
/*00a0*/ IADD3 R8, P0, R4, R9, RZ ; /* 0x0000000904087210 */
/* 0x004fca0007f1e0ff */
/*00b0*/ IMAD.X R9, RZ, RZ, R5, P0 ; /* 0x000000ffff097224 */
/* 0x000fca00000e0605 */
/*00c0*/ LD.E.S8 R0, [R8.64] ; /* 0x0000000408007980 */
/* 0x000ea2000c101300 */
/*00d0*/ MOV R2, 0x0 ; /* 0x0000000000027802 */
/* 0x000fe20000000f00 */
/*00e0*/ IMAD.MOV.U32 R4, RZ, RZ, c[0x4][0x18] ; /* 0x01000600ff047624 */
/* 0x000fe200078e00ff */
/*00f0*/ IADD3 R6, P0, R1, c[0x0][0x20], RZ ; /* 0x0000080001067a10 */
/* 0x000fe20007f1e0ff */
/*0100*/ IMAD.MOV.U32 R5, RZ, RZ, c[0x4][0x1c] ; /* 0x01000700ff057624 */
/* 0x000fc600078e00ff */
/*0110*/ LDC.64 R2, c[0x4][R2] ; /* 0x0100000002027b82 */
/* 0x000e220000000a00 */
/*0120*/ IMAD.X R7, RZ, RZ, c[0x0][0x24], P0 ; /* 0x00000900ff077624 */
/* 0x000fe200000e06ff */
/*0130*/ STL [R1], R0 ; /* 0x0000000001007387 */
/* 0x0043ec0000100800 */
/*0140*/ LEPC R8 ; /* 0x000000000008734e */
/* 0x001fe40000000000 */
/*0150*/ MOV R11, 0x1c0 ; /* 0x000001c0000b7802 */
/* 0x000fe40000000f00 */
/*0160*/ MOV R20, 0x140 ; /* 0x0000014000147802 */
/* 0x000fe40000000f00 */
/*0170*/ MOV R21, 0x0 ; /* 0x0000000000157802 */
/* 0x000fe40000000f00 */
/*0180*/ MOV R0, 0x0 ; /* 0x0000000000007802 */
/* 0x002fe40000000f00 */
/*0190*/ IADD3 R20, P0, P1, -R20, R11, R8 ; /* 0x0000000b14147210 */
/* 0x000fc8000791e108 */
/*01a0*/ IADD3.X R21, ~R0, R21, R9, P0, P1 ; /* 0x0000001500157210 */
/* 0x000fc800007e2509 */
/*01b0*/ CALL.ABS.NOINC R2 ; /* 0x0000000002007343 */
/* 0x000fea0003c00000 */
/*01c0*/ EXIT ; /* 0x000000000000794d */
/* 0x000fea0003800000 */
/*01d0*/ BRA 0x1d0; /* 0xfffffff000007947 */
/* 0x000fc0000383ffff */
/*01e0*/ NOP; /* 0x0000000000007918 */
/* 0x000fc00000000000 */
/*01f0*/ NOP; /* 0x0000000000007918 */
/* 0x000fc00000000000 */
/*0200*/ NOP; /* 0x0000000000007918 */
/* 0x000fc00000000000 */
/*0210*/ NOP; /* 0x0000000000007918 */
/* 0x000fc00000000000 */
/*0220*/ NOP; /* 0x0000000000007918 */
/* 0x000fc00000000000 */
/*0230*/ NOP; /* 0x0000000000007918 */
/* 0x000fc00000000000 */
/*0240*/ NOP; /* 0x0000000000007918 */
/* 0x000fc00000000000 */
/*0250*/ NOP; /* 0x0000000000007918 */
/* 0x000fc00000000000 */
/*0260*/ NOP; /* 0x0000000000007918 */
/* 0x000fc00000000000 */
/*0270*/ NOP; /* 0x0000000000007918 */
/* 0x000fc00000000000 */
.......... |
You are a helpful coding assistant specialized in converting CUDA source code to CUDA host assembly. | #include <stdio.h>
/*
//=========== PART-1 ========================
__global__ void hello()
{
}
int main(void)
{
hello<<< 1, 1 >>>();
cudaDeviceSynchronize();
printf("Hello World\n");
return 0;
}
*/
//=========== PART-2 ========================
__device__ const char *STR = "HELLO WORLD!";
const char STR_LENGTH = 12;
__global__ void hello()
{
//every thread prints one character
printf("%c\n", STR[threadIdx.x % STR_LENGTH]);
}
int main(void)
{
hello<<< 1, 16>>>();
cudaDeviceSynchronize();
return 0;
} | .file "tmpxft_0014e69c_00000000-6_hello.cudafe1.cpp"
.text
#APP
#NO_APP
.type _ZL26__cudaUnregisterBinaryUtilv, @function
_ZL26__cudaUnregisterBinaryUtilv:
.LFB2060:
.cfi_startproc
endbr64
subq $8, %rsp
.cfi_def_cfa_offset 16
movq _ZL20__cudaFatCubinHandle(%rip), %rdi
call __cudaUnregisterFatBinary@PLT
addq $8, %rsp
.cfi_def_cfa_offset 8
ret
.cfi_endproc
.LFE2060:
.size _ZL26__cudaUnregisterBinaryUtilv, .-_ZL26__cudaUnregisterBinaryUtilv
.globl _Z23__device_stub__Z5hellovv
.type _Z23__device_stub__Z5hellovv, @function
_Z23__device_stub__Z5hellovv:
.LFB2082:
.cfi_startproc
endbr64
subq $88, %rsp
.cfi_def_cfa_offset 96
movq %fs:40, %rax
movq %rax, 72(%rsp)
xorl %eax, %eax
movl $1, 16(%rsp)
movl $1, 20(%rsp)
movl $1, 24(%rsp)
movl $1, 28(%rsp)
movl $1, 32(%rsp)
movl $1, 36(%rsp)
leaq 8(%rsp), %rcx
movq %rsp, %rdx
leaq 28(%rsp), %rsi
leaq 16(%rsp), %rdi
call __cudaPopCallConfiguration@PLT
testl %eax, %eax
je .L7
.L3:
movq 72(%rsp), %rax
subq %fs:40, %rax
jne .L8
addq $88, %rsp
.cfi_remember_state
.cfi_def_cfa_offset 8
ret
.L7:
.cfi_restore_state
pushq 8(%rsp)
.cfi_def_cfa_offset 104
pushq 8(%rsp)
.cfi_def_cfa_offset 112
leaq 80(%rsp), %r9
movq 44(%rsp), %rcx
movl 52(%rsp), %r8d
movq 32(%rsp), %rsi
movl 40(%rsp), %edx
leaq _Z5hellov(%rip), %rdi
call cudaLaunchKernel@PLT
addq $16, %rsp
.cfi_def_cfa_offset 96
jmp .L3
.L8:
call __stack_chk_fail@PLT
.cfi_endproc
.LFE2082:
.size _Z23__device_stub__Z5hellovv, .-_Z23__device_stub__Z5hellovv
.globl _Z5hellov
.type _Z5hellov, @function
_Z5hellov:
.LFB2083:
.cfi_startproc
endbr64
subq $8, %rsp
.cfi_def_cfa_offset 16
call _Z23__device_stub__Z5hellovv
addq $8, %rsp
.cfi_def_cfa_offset 8
ret
.cfi_endproc
.LFE2083:
.size _Z5hellov, .-_Z5hellov
.globl main
.type main, @function
main:
.LFB2057:
.cfi_startproc
endbr64
subq $40, %rsp
.cfi_def_cfa_offset 48
movl $16, 20(%rsp)
movl $1, 24(%rsp)
movl $1, 8(%rsp)
movl $1, 12(%rsp)
movl $0, %r9d
movl $0, %r8d
movq 20(%rsp), %rdx
movl $1, %ecx
movq 8(%rsp), %rdi
movl $1, %esi
call __cudaPushCallConfiguration@PLT
testl %eax, %eax
je .L14
.L12:
call cudaDeviceSynchronize@PLT
movl $0, %eax
addq $40, %rsp
.cfi_remember_state
.cfi_def_cfa_offset 8
ret
.L14:
.cfi_restore_state
call _Z23__device_stub__Z5hellovv
jmp .L12
.cfi_endproc
.LFE2057:
.size main, .-main
.section .rodata.str1.1,"aMS",@progbits,1
.LC0:
.string "_Z5hellov"
.LC1:
.string "STR"
.text
.type _ZL24__sti____cudaRegisterAllv, @function
_ZL24__sti____cudaRegisterAllv:
.LFB2085:
.cfi_startproc
endbr64
pushq %rbx
.cfi_def_cfa_offset 16
.cfi_offset 3, -16
leaq _ZL15__fatDeviceText(%rip), %rdi
call __cudaRegisterFatBinary@PLT
movq %rax, %rbx
movq %rax, _ZL20__cudaFatCubinHandle(%rip)
pushq $0
.cfi_def_cfa_offset 24
pushq $0
.cfi_def_cfa_offset 32
pushq $0
.cfi_def_cfa_offset 40
pushq $0
.cfi_def_cfa_offset 48
movl $0, %r9d
movl $-1, %r8d
leaq .LC0(%rip), %rdx
movq %rdx, %rcx
leaq _Z5hellov(%rip), %rsi
movq %rax, %rdi
call __cudaRegisterFunction@PLT
addq $32, %rsp
.cfi_def_cfa_offset 16
pushq $0
.cfi_def_cfa_offset 24
pushq $0
.cfi_def_cfa_offset 32
movl $8, %r9d
movl $0, %r8d
leaq .LC1(%rip), %rdx
movq %rdx, %rcx
leaq _ZL3STR(%rip), %rsi
movq %rbx, %rdi
call __cudaRegisterVar@PLT
addq $16, %rsp
.cfi_def_cfa_offset 16
movq _ZL20__cudaFatCubinHandle(%rip), %rdi
call __cudaRegisterFatBinaryEnd@PLT
leaq _ZL26__cudaUnregisterBinaryUtilv(%rip), %rdi
call atexit@PLT
popq %rbx
.cfi_def_cfa_offset 8
ret
.cfi_endproc
.LFE2085:
.size _ZL24__sti____cudaRegisterAllv, .-_ZL24__sti____cudaRegisterAllv
.section .init_array,"aw"
.align 8
.quad _ZL24__sti____cudaRegisterAllv
.section .nvFatBinSegment,"aw"
.align 8
.type _ZL15__fatDeviceText, @object
.size _ZL15__fatDeviceText, 24
_ZL15__fatDeviceText:
.long 1180844977
.long 1
.quad fatbinData
.quad 0
.local _ZL20__cudaFatCubinHandle
.comm _ZL20__cudaFatCubinHandle,8,8
.local _ZL3STR
.comm _ZL3STR,8,8
.ident "GCC: (Ubuntu 13.3.0-6ubuntu2~24.04) 13.3.0"
.section .note.GNU-stack,"",@progbits
.section .note.gnu.property,"a"
.align 8
.long 1f - 0f
.long 4f - 1f
.long 5
0:
.string "GNU"
1:
.align 8
.long 0xc0000002
.long 3f - 2f
2:
.long 0x3
3:
.align 8
4: |
You are a helpful coding assistant specialized in converting CUDA source code to HIP/AMD source code. | #include <stdio.h>
/*
//=========== PART-1 ========================
__global__ void hello()
{
}
int main(void)
{
hello<<< 1, 1 >>>();
cudaDeviceSynchronize();
printf("Hello World\n");
return 0;
}
*/
//=========== PART-2 ========================
__device__ const char *STR = "HELLO WORLD!";
const char STR_LENGTH = 12;
__global__ void hello()
{
//every thread prints one character
printf("%c\n", STR[threadIdx.x % STR_LENGTH]);
}
int main(void)
{
hello<<< 1, 16>>>();
cudaDeviceSynchronize();
return 0;
} | #include <hip/hip_runtime.h>
#include <stdio.h>
/*
//=========== PART-1 ========================
__global__ void hello()
{
}
int main(void)
{
hello<<< 1, 1 >>>();
cudaDeviceSynchronize();
printf("Hello World\n");
return 0;
}
*/
//=========== PART-2 ========================
__device__ const char *STR = "HELLO WORLD!";
const char STR_LENGTH = 12;
__global__ void hello()
{
//every thread prints one character
printf("%c\n", STR[threadIdx.x % STR_LENGTH]);
}
int main(void)
{
hello<<< 1, 16>>>();
hipDeviceSynchronize();
return 0;
} |
You are a helpful coding assistant specialized in converting HIP source code to AMD host assembly. | #include <hip/hip_runtime.h>
#include <stdio.h>
/*
//=========== PART-1 ========================
__global__ void hello()
{
}
int main(void)
{
hello<<< 1, 1 >>>();
cudaDeviceSynchronize();
printf("Hello World\n");
return 0;
}
*/
//=========== PART-2 ========================
__device__ const char *STR = "HELLO WORLD!";
const char STR_LENGTH = 12;
__global__ void hello()
{
//every thread prints one character
printf("%c\n", STR[threadIdx.x % STR_LENGTH]);
}
int main(void)
{
hello<<< 1, 16>>>();
hipDeviceSynchronize();
return 0;
} | .text
.file "hello.hip"
.globl _Z20__device_stub__hellov # -- Begin function _Z20__device_stub__hellov
.p2align 4, 0x90
.type _Z20__device_stub__hellov,@function
_Z20__device_stub__hellov: # @_Z20__device_stub__hellov
.cfi_startproc
# %bb.0:
subq $56, %rsp
.cfi_def_cfa_offset 64
leaq 32(%rsp), %rdi
leaq 16(%rsp), %rsi
leaq 8(%rsp), %rdx
movq %rsp, %rcx
callq __hipPopCallConfiguration
movq 32(%rsp), %rsi
movl 40(%rsp), %edx
movq 16(%rsp), %rcx
movl 24(%rsp), %r8d
leaq 48(%rsp), %r9
movl $_Z5hellov, %edi
pushq (%rsp)
.cfi_adjust_cfa_offset 8
pushq 16(%rsp)
.cfi_adjust_cfa_offset 8
callq hipLaunchKernel
addq $72, %rsp
.cfi_adjust_cfa_offset -72
retq
.Lfunc_end0:
.size _Z20__device_stub__hellov, .Lfunc_end0-_Z20__device_stub__hellov
.cfi_endproc
# -- End function
.globl main # -- Begin function main
.p2align 4, 0x90
.type main,@function
main: # @main
.cfi_startproc
# %bb.0:
subq $56, %rsp
.cfi_def_cfa_offset 64
movabsq $4294967297, %rdi # imm = 0x100000001
leaq 15(%rdi), %rdx
movl $1, %esi
movl $1, %ecx
xorl %r8d, %r8d
xorl %r9d, %r9d
callq __hipPushCallConfiguration
testl %eax, %eax
jne .LBB1_2
# %bb.1:
leaq 32(%rsp), %rdi
leaq 16(%rsp), %rsi
leaq 8(%rsp), %rdx
movq %rsp, %rcx
callq __hipPopCallConfiguration
movq 32(%rsp), %rsi
movl 40(%rsp), %edx
movq 16(%rsp), %rcx
movl 24(%rsp), %r8d
leaq 48(%rsp), %r9
movl $_Z5hellov, %edi
pushq (%rsp)
.cfi_adjust_cfa_offset 8
pushq 16(%rsp)
.cfi_adjust_cfa_offset 8
callq hipLaunchKernel
addq $16, %rsp
.cfi_adjust_cfa_offset -16
.LBB1_2:
callq hipDeviceSynchronize
xorl %eax, %eax
addq $56, %rsp
.cfi_def_cfa_offset 8
retq
.Lfunc_end1:
.size main, .Lfunc_end1-main
.cfi_endproc
# -- End function
.p2align 4, 0x90 # -- Begin function __hip_module_ctor
.type __hip_module_ctor,@function
__hip_module_ctor: # @__hip_module_ctor
.cfi_startproc
# %bb.0:
pushq %rbx
.cfi_def_cfa_offset 16
subq $32, %rsp
.cfi_def_cfa_offset 48
.cfi_offset %rbx, -16
cmpq $0, __hip_gpubin_handle(%rip)
jne .LBB2_2
# %bb.1:
movl $__hip_fatbin_wrapper, %edi
callq __hipRegisterFatBinary
movq %rax, __hip_gpubin_handle(%rip)
.LBB2_2:
movq __hip_gpubin_handle(%rip), %rbx
xorps %xmm0, %xmm0
movups %xmm0, 16(%rsp)
movups %xmm0, (%rsp)
movl $_Z5hellov, %esi
movl $.L__unnamed_1, %edx
movl $.L__unnamed_1, %ecx
movq %rbx, %rdi
movl $-1, %r8d
xorl %r9d, %r9d
callq __hipRegisterFunction
movl $0, 8(%rsp)
movl $0, (%rsp)
movl $STR, %esi
movl $.L__unnamed_2, %edx
movl $.L__unnamed_2, %ecx
movl $8, %r9d
movq %rbx, %rdi
xorl %r8d, %r8d
callq __hipRegisterVar
movl $__hip_module_dtor, %edi
addq $32, %rsp
.cfi_def_cfa_offset 16
popq %rbx
.cfi_def_cfa_offset 8
jmp atexit # TAILCALL
.Lfunc_end2:
.size __hip_module_ctor, .Lfunc_end2-__hip_module_ctor
.cfi_endproc
# -- End function
.p2align 4, 0x90 # -- Begin function __hip_module_dtor
.type __hip_module_dtor,@function
__hip_module_dtor: # @__hip_module_dtor
.cfi_startproc
# %bb.0:
movq __hip_gpubin_handle(%rip), %rdi
testq %rdi, %rdi
je .LBB3_2
# %bb.1:
pushq %rax
.cfi_def_cfa_offset 16
callq __hipUnregisterFatBinary
movq $0, __hip_gpubin_handle(%rip)
addq $8, %rsp
.cfi_def_cfa_offset 8
.LBB3_2:
retq
.Lfunc_end3:
.size __hip_module_dtor, .Lfunc_end3-__hip_module_dtor
.cfi_endproc
# -- End function
.type STR,@object # @STR
.local STR
.comm STR,8,8
.type _Z5hellov,@object # @_Z5hellov
.section .rodata,"a",@progbits
.globl _Z5hellov
.p2align 3, 0x0
_Z5hellov:
.quad _Z20__device_stub__hellov
.size _Z5hellov, 8
.type .L__unnamed_1,@object # @0
.section .rodata.str1.1,"aMS",@progbits,1
.L__unnamed_1:
.asciz "_Z5hellov"
.size .L__unnamed_1, 10
.type .L__unnamed_2,@object # @1
.L__unnamed_2:
.asciz "STR"
.size .L__unnamed_2, 4
.type __hip_fatbin_wrapper,@object # @__hip_fatbin_wrapper
.section .hipFatBinSegment,"a",@progbits
.p2align 3, 0x0
__hip_fatbin_wrapper:
.long 1212764230 # 0x48495046
.long 1 # 0x1
.quad __hip_fatbin
.quad 0
.size __hip_fatbin_wrapper, 24
.type __hip_gpubin_handle,@object # @__hip_gpubin_handle
.local __hip_gpubin_handle
.comm __hip_gpubin_handle,8,8
.section .init_array,"aw",@init_array
.p2align 3, 0x0
.quad __hip_module_ctor
.type __hip_cuid_,@object # @__hip_cuid_
.bss
.globl __hip_cuid_
__hip_cuid_:
.byte 0 # 0x0
.size __hip_cuid_, 1
.section ".linker-options","e",@llvm_linker_options
.ident "AMD clang version 18.0.0git (https://github.com/RadeonOpenCompute/llvm-project roc-6.3.2 25012 e5bf7e55c91490b07c49d8960fa7983d864936c4)"
.section ".note.GNU-stack","",@progbits
.addrsig
.addrsig_sym _Z20__device_stub__hellov
.addrsig_sym __hip_module_ctor
.addrsig_sym __hip_module_dtor
.addrsig_sym STR
.addrsig_sym _Z5hellov
.addrsig_sym __hip_fatbin
.addrsig_sym __hip_fatbin_wrapper
.addrsig_sym __hip_cuid_ |
You are a helpful coding assistant specialized in converting from CUDA host assembly to AMD host assembly. | .file "tmpxft_0014e69c_00000000-6_hello.cudafe1.cpp"
.text
#APP
#NO_APP
.type _ZL26__cudaUnregisterBinaryUtilv, @function
_ZL26__cudaUnregisterBinaryUtilv:
.LFB2060:
.cfi_startproc
endbr64
subq $8, %rsp
.cfi_def_cfa_offset 16
movq _ZL20__cudaFatCubinHandle(%rip), %rdi
call __cudaUnregisterFatBinary@PLT
addq $8, %rsp
.cfi_def_cfa_offset 8
ret
.cfi_endproc
.LFE2060:
.size _ZL26__cudaUnregisterBinaryUtilv, .-_ZL26__cudaUnregisterBinaryUtilv
.globl _Z23__device_stub__Z5hellovv
.type _Z23__device_stub__Z5hellovv, @function
_Z23__device_stub__Z5hellovv:
.LFB2082:
.cfi_startproc
endbr64
subq $88, %rsp
.cfi_def_cfa_offset 96
movq %fs:40, %rax
movq %rax, 72(%rsp)
xorl %eax, %eax
movl $1, 16(%rsp)
movl $1, 20(%rsp)
movl $1, 24(%rsp)
movl $1, 28(%rsp)
movl $1, 32(%rsp)
movl $1, 36(%rsp)
leaq 8(%rsp), %rcx
movq %rsp, %rdx
leaq 28(%rsp), %rsi
leaq 16(%rsp), %rdi
call __cudaPopCallConfiguration@PLT
testl %eax, %eax
je .L7
.L3:
movq 72(%rsp), %rax
subq %fs:40, %rax
jne .L8
addq $88, %rsp
.cfi_remember_state
.cfi_def_cfa_offset 8
ret
.L7:
.cfi_restore_state
pushq 8(%rsp)
.cfi_def_cfa_offset 104
pushq 8(%rsp)
.cfi_def_cfa_offset 112
leaq 80(%rsp), %r9
movq 44(%rsp), %rcx
movl 52(%rsp), %r8d
movq 32(%rsp), %rsi
movl 40(%rsp), %edx
leaq _Z5hellov(%rip), %rdi
call cudaLaunchKernel@PLT
addq $16, %rsp
.cfi_def_cfa_offset 96
jmp .L3
.L8:
call __stack_chk_fail@PLT
.cfi_endproc
.LFE2082:
.size _Z23__device_stub__Z5hellovv, .-_Z23__device_stub__Z5hellovv
.globl _Z5hellov
.type _Z5hellov, @function
_Z5hellov:
.LFB2083:
.cfi_startproc
endbr64
subq $8, %rsp
.cfi_def_cfa_offset 16
call _Z23__device_stub__Z5hellovv
addq $8, %rsp
.cfi_def_cfa_offset 8
ret
.cfi_endproc
.LFE2083:
.size _Z5hellov, .-_Z5hellov
.globl main
.type main, @function
main:
.LFB2057:
.cfi_startproc
endbr64
subq $40, %rsp
.cfi_def_cfa_offset 48
movl $16, 20(%rsp)
movl $1, 24(%rsp)
movl $1, 8(%rsp)
movl $1, 12(%rsp)
movl $0, %r9d
movl $0, %r8d
movq 20(%rsp), %rdx
movl $1, %ecx
movq 8(%rsp), %rdi
movl $1, %esi
call __cudaPushCallConfiguration@PLT
testl %eax, %eax
je .L14
.L12:
call cudaDeviceSynchronize@PLT
movl $0, %eax
addq $40, %rsp
.cfi_remember_state
.cfi_def_cfa_offset 8
ret
.L14:
.cfi_restore_state
call _Z23__device_stub__Z5hellovv
jmp .L12
.cfi_endproc
.LFE2057:
.size main, .-main
.section .rodata.str1.1,"aMS",@progbits,1
.LC0:
.string "_Z5hellov"
.LC1:
.string "STR"
.text
.type _ZL24__sti____cudaRegisterAllv, @function
_ZL24__sti____cudaRegisterAllv:
.LFB2085:
.cfi_startproc
endbr64
pushq %rbx
.cfi_def_cfa_offset 16
.cfi_offset 3, -16
leaq _ZL15__fatDeviceText(%rip), %rdi
call __cudaRegisterFatBinary@PLT
movq %rax, %rbx
movq %rax, _ZL20__cudaFatCubinHandle(%rip)
pushq $0
.cfi_def_cfa_offset 24
pushq $0
.cfi_def_cfa_offset 32
pushq $0
.cfi_def_cfa_offset 40
pushq $0
.cfi_def_cfa_offset 48
movl $0, %r9d
movl $-1, %r8d
leaq .LC0(%rip), %rdx
movq %rdx, %rcx
leaq _Z5hellov(%rip), %rsi
movq %rax, %rdi
call __cudaRegisterFunction@PLT
addq $32, %rsp
.cfi_def_cfa_offset 16
pushq $0
.cfi_def_cfa_offset 24
pushq $0
.cfi_def_cfa_offset 32
movl $8, %r9d
movl $0, %r8d
leaq .LC1(%rip), %rdx
movq %rdx, %rcx
leaq _ZL3STR(%rip), %rsi
movq %rbx, %rdi
call __cudaRegisterVar@PLT
addq $16, %rsp
.cfi_def_cfa_offset 16
movq _ZL20__cudaFatCubinHandle(%rip), %rdi
call __cudaRegisterFatBinaryEnd@PLT
leaq _ZL26__cudaUnregisterBinaryUtilv(%rip), %rdi
call atexit@PLT
popq %rbx
.cfi_def_cfa_offset 8
ret
.cfi_endproc
.LFE2085:
.size _ZL24__sti____cudaRegisterAllv, .-_ZL24__sti____cudaRegisterAllv
.section .init_array,"aw"
.align 8
.quad _ZL24__sti____cudaRegisterAllv
.section .nvFatBinSegment,"aw"
.align 8
.type _ZL15__fatDeviceText, @object
.size _ZL15__fatDeviceText, 24
_ZL15__fatDeviceText:
.long 1180844977
.long 1
.quad fatbinData
.quad 0
.local _ZL20__cudaFatCubinHandle
.comm _ZL20__cudaFatCubinHandle,8,8
.local _ZL3STR
.comm _ZL3STR,8,8
.ident "GCC: (Ubuntu 13.3.0-6ubuntu2~24.04) 13.3.0"
.section .note.GNU-stack,"",@progbits
.section .note.gnu.property,"a"
.align 8
.long 1f - 0f
.long 4f - 1f
.long 5
0:
.string "GNU"
1:
.align 8
.long 0xc0000002
.long 3f - 2f
2:
.long 0x3
3:
.align 8
4: | .text
.file "hello.hip"
.globl _Z20__device_stub__hellov # -- Begin function _Z20__device_stub__hellov
.p2align 4, 0x90
.type _Z20__device_stub__hellov,@function
_Z20__device_stub__hellov: # @_Z20__device_stub__hellov
.cfi_startproc
# %bb.0:
subq $56, %rsp
.cfi_def_cfa_offset 64
leaq 32(%rsp), %rdi
leaq 16(%rsp), %rsi
leaq 8(%rsp), %rdx
movq %rsp, %rcx
callq __hipPopCallConfiguration
movq 32(%rsp), %rsi
movl 40(%rsp), %edx
movq 16(%rsp), %rcx
movl 24(%rsp), %r8d
leaq 48(%rsp), %r9
movl $_Z5hellov, %edi
pushq (%rsp)
.cfi_adjust_cfa_offset 8
pushq 16(%rsp)
.cfi_adjust_cfa_offset 8
callq hipLaunchKernel
addq $72, %rsp
.cfi_adjust_cfa_offset -72
retq
.Lfunc_end0:
.size _Z20__device_stub__hellov, .Lfunc_end0-_Z20__device_stub__hellov
.cfi_endproc
# -- End function
.globl main # -- Begin function main
.p2align 4, 0x90
.type main,@function
main: # @main
.cfi_startproc
# %bb.0:
subq $56, %rsp
.cfi_def_cfa_offset 64
movabsq $4294967297, %rdi # imm = 0x100000001
leaq 15(%rdi), %rdx
movl $1, %esi
movl $1, %ecx
xorl %r8d, %r8d
xorl %r9d, %r9d
callq __hipPushCallConfiguration
testl %eax, %eax
jne .LBB1_2
# %bb.1:
leaq 32(%rsp), %rdi
leaq 16(%rsp), %rsi
leaq 8(%rsp), %rdx
movq %rsp, %rcx
callq __hipPopCallConfiguration
movq 32(%rsp), %rsi
movl 40(%rsp), %edx
movq 16(%rsp), %rcx
movl 24(%rsp), %r8d
leaq 48(%rsp), %r9
movl $_Z5hellov, %edi
pushq (%rsp)
.cfi_adjust_cfa_offset 8
pushq 16(%rsp)
.cfi_adjust_cfa_offset 8
callq hipLaunchKernel
addq $16, %rsp
.cfi_adjust_cfa_offset -16
.LBB1_2:
callq hipDeviceSynchronize
xorl %eax, %eax
addq $56, %rsp
.cfi_def_cfa_offset 8
retq
.Lfunc_end1:
.size main, .Lfunc_end1-main
.cfi_endproc
# -- End function
.p2align 4, 0x90 # -- Begin function __hip_module_ctor
.type __hip_module_ctor,@function
__hip_module_ctor: # @__hip_module_ctor
.cfi_startproc
# %bb.0:
pushq %rbx
.cfi_def_cfa_offset 16
subq $32, %rsp
.cfi_def_cfa_offset 48
.cfi_offset %rbx, -16
cmpq $0, __hip_gpubin_handle(%rip)
jne .LBB2_2
# %bb.1:
movl $__hip_fatbin_wrapper, %edi
callq __hipRegisterFatBinary
movq %rax, __hip_gpubin_handle(%rip)
.LBB2_2:
movq __hip_gpubin_handle(%rip), %rbx
xorps %xmm0, %xmm0
movups %xmm0, 16(%rsp)
movups %xmm0, (%rsp)
movl $_Z5hellov, %esi
movl $.L__unnamed_1, %edx
movl $.L__unnamed_1, %ecx
movq %rbx, %rdi
movl $-1, %r8d
xorl %r9d, %r9d
callq __hipRegisterFunction
movl $0, 8(%rsp)
movl $0, (%rsp)
movl $STR, %esi
movl $.L__unnamed_2, %edx
movl $.L__unnamed_2, %ecx
movl $8, %r9d
movq %rbx, %rdi
xorl %r8d, %r8d
callq __hipRegisterVar
movl $__hip_module_dtor, %edi
addq $32, %rsp
.cfi_def_cfa_offset 16
popq %rbx
.cfi_def_cfa_offset 8
jmp atexit # TAILCALL
.Lfunc_end2:
.size __hip_module_ctor, .Lfunc_end2-__hip_module_ctor
.cfi_endproc
# -- End function
.p2align 4, 0x90 # -- Begin function __hip_module_dtor
.type __hip_module_dtor,@function
__hip_module_dtor: # @__hip_module_dtor
.cfi_startproc
# %bb.0:
movq __hip_gpubin_handle(%rip), %rdi
testq %rdi, %rdi
je .LBB3_2
# %bb.1:
pushq %rax
.cfi_def_cfa_offset 16
callq __hipUnregisterFatBinary
movq $0, __hip_gpubin_handle(%rip)
addq $8, %rsp
.cfi_def_cfa_offset 8
.LBB3_2:
retq
.Lfunc_end3:
.size __hip_module_dtor, .Lfunc_end3-__hip_module_dtor
.cfi_endproc
# -- End function
.type STR,@object # @STR
.local STR
.comm STR,8,8
.type _Z5hellov,@object # @_Z5hellov
.section .rodata,"a",@progbits
.globl _Z5hellov
.p2align 3, 0x0
_Z5hellov:
.quad _Z20__device_stub__hellov
.size _Z5hellov, 8
.type .L__unnamed_1,@object # @0
.section .rodata.str1.1,"aMS",@progbits,1
.L__unnamed_1:
.asciz "_Z5hellov"
.size .L__unnamed_1, 10
.type .L__unnamed_2,@object # @1
.L__unnamed_2:
.asciz "STR"
.size .L__unnamed_2, 4
.type __hip_fatbin_wrapper,@object # @__hip_fatbin_wrapper
.section .hipFatBinSegment,"a",@progbits
.p2align 3, 0x0
__hip_fatbin_wrapper:
.long 1212764230 # 0x48495046
.long 1 # 0x1
.quad __hip_fatbin
.quad 0
.size __hip_fatbin_wrapper, 24
.type __hip_gpubin_handle,@object # @__hip_gpubin_handle
.local __hip_gpubin_handle
.comm __hip_gpubin_handle,8,8
.section .init_array,"aw",@init_array
.p2align 3, 0x0
.quad __hip_module_ctor
.type __hip_cuid_,@object # @__hip_cuid_
.bss
.globl __hip_cuid_
__hip_cuid_:
.byte 0 # 0x0
.size __hip_cuid_, 1
.section ".linker-options","e",@llvm_linker_options
.ident "AMD clang version 18.0.0git (https://github.com/RadeonOpenCompute/llvm-project roc-6.3.2 25012 e5bf7e55c91490b07c49d8960fa7983d864936c4)"
.section ".note.GNU-stack","",@progbits
.addrsig
.addrsig_sym _Z20__device_stub__hellov
.addrsig_sym __hip_module_ctor
.addrsig_sym __hip_module_dtor
.addrsig_sym STR
.addrsig_sym _Z5hellov
.addrsig_sym __hip_fatbin
.addrsig_sym __hip_fatbin_wrapper
.addrsig_sym __hip_cuid_ |
You are a helpful coding assistant specialized in converting CUDA source code to CUDA device assembly. | #include <algorithm>
#include <cassert>
#include <iostream>
#include <vector>
// __global__ means that its called from CPU to run on the GPU
__global__ void vectorAdd(int *a, int *b, int *c, int N)
{
// calculate the global thread id
int tid = (blockIdx.x * blockDim.x) + threadIdx.x;
if ( tid < N) // a quick boundary check
{
c[tid] = a[tid] + b[tid]; // do the actual addition
}
}
int main()
{
constexpr int N = 1 << 16;
constexpr size_t bytes = sizeof(int) * N;
// declare the vectors to hold the data on the CPU
int *a, *b, *c;
cudaMallocManaged(&a, bytes);
cudaMallocManaged(&b, bytes);
cudaMallocManaged(&c, bytes);
int id = cudaGetDevice(&id);
// give some hints to the memory manager about where we want our variables to live
cudaMemAdvise(a, bytes, cudaMemAdviseSetPreferredLocation, cudaCpuDeviceId);
cudaMemAdvise(b, bytes, cudaMemAdviseSetPreferredLocation, cudaCpuDeviceId);
cudaMemPrefetchAsync(c, bytes, id);
// fill up the vectors
for(int i=0; i < N; i++)
{
a[i] = rand() % 100;
b[i] = rand() % 100;
}
// prefetch a and b to GPU
cudaMemAdvise(a, bytes, cudaMemAdviseSetReadMostly, id);
cudaMemAdvise(b, bytes, cudaMemAdviseSetReadMostly, id);
cudaMemPrefetchAsync(a, bytes, id);
cudaMemPrefetchAsync(b, bytes, id);
// Threads per CTA
int BLOCK_SIZE = 1<<10;
// CTAs per Grid
// We need to launch at LEAST as many threads as we have elements
// This equation pads an extra CTA to the grid if N cannot evenly be divided
// by NUM_THREADS (e.g. N = 1025, NUM_THREADS = 1024)
int GRID_SIZE = (N + BLOCK_SIZE - 1)/ BLOCK_SIZE;
// Launch the kernel on the GPU
// Kernel calls are asynchronous ( the CPU program continues execution after
// call, but not necessarily before the kernel finishes)
vectorAdd<<< GRID_SIZE, BLOCK_SIZE >>>(a, b, c, N);
// Wait for all previous operations before using values
// We need this because we don't get the implicit synchronization of
// cudaMemcpy like in the original example
cudaDeviceSynchronize();
// prefetch back to CPU
cudaMemPrefetchAsync(a, bytes, cudaCpuDeviceId);
cudaMemPrefetchAsync(b, bytes, cudaCpuDeviceId);
cudaMemPrefetchAsync(c, bytes, cudaCpuDeviceId);
for (int i = 0 ; i<N ; i++)
{
assert(c[i] == a[i] + b[i]);
}
// Free memory on device
cudaFree(a);
cudaFree(b);
cudaFree(c);
std::cout << "COMPLETED SUCCESSFULLY\n";
return 0;
} | code for sm_80
Function : _Z9vectorAddPiS_S_i
.headerflags @"EF_CUDA_TEXMODE_UNIFIED EF_CUDA_64BIT_ADDRESS EF_CUDA_SM80 EF_CUDA_VIRTUAL_SM(EF_CUDA_SM80)"
/*0000*/ MOV R1, c[0x0][0x28] ; /* 0x00000a0000017a02 */
/* 0x000fe40000000f00 */
/*0010*/ S2R R6, SR_CTAID.X ; /* 0x0000000000067919 */
/* 0x000e280000002500 */
/*0020*/ S2R R3, SR_TID.X ; /* 0x0000000000037919 */
/* 0x000e240000002100 */
/*0030*/ IMAD R6, R6, c[0x0][0x0], R3 ; /* 0x0000000006067a24 */
/* 0x001fca00078e0203 */
/*0040*/ ISETP.GE.AND P0, PT, R6, c[0x0][0x178], PT ; /* 0x00005e0006007a0c */
/* 0x000fda0003f06270 */
/*0050*/ @P0 EXIT ; /* 0x000000000000094d */
/* 0x000fea0003800000 */
/*0060*/ HFMA2.MMA R7, -RZ, RZ, 0, 2.384185791015625e-07 ; /* 0x00000004ff077435 */
/* 0x000fe200000001ff */
/*0070*/ ULDC.64 UR4, c[0x0][0x118] ; /* 0x0000460000047ab9 */
/* 0x000fd20000000a00 */
/*0080*/ IMAD.WIDE R4, R6, R7, c[0x0][0x168] ; /* 0x00005a0006047625 */
/* 0x000fc800078e0207 */
/*0090*/ IMAD.WIDE R2, R6.reuse, R7.reuse, c[0x0][0x160] ; /* 0x0000580006027625 */
/* 0x0c0fe400078e0207 */
/*00a0*/ LDG.E R4, [R4.64] ; /* 0x0000000404047981 */
/* 0x000ea8000c1e1900 */
/*00b0*/ LDG.E R3, [R2.64] ; /* 0x0000000402037981 */
/* 0x000ea2000c1e1900 */
/*00c0*/ IMAD.WIDE R6, R6, R7, c[0x0][0x170] ; /* 0x00005c0006067625 */
/* 0x000fe200078e0207 */
/*00d0*/ IADD3 R9, R4, R3, RZ ; /* 0x0000000304097210 */
/* 0x004fca0007ffe0ff */
/*00e0*/ STG.E [R6.64], R9 ; /* 0x0000000906007986 */
/* 0x000fe2000c101904 */
/*00f0*/ EXIT ; /* 0x000000000000794d */
/* 0x000fea0003800000 */
/*0100*/ BRA 0x100; /* 0xfffffff000007947 */
/* 0x000fc0000383ffff */
/*0110*/ NOP; /* 0x0000000000007918 */
/* 0x000fc00000000000 */
/*0120*/ NOP; /* 0x0000000000007918 */
/* 0x000fc00000000000 */
/*0130*/ NOP; /* 0x0000000000007918 */
/* 0x000fc00000000000 */
/*0140*/ NOP; /* 0x0000000000007918 */
/* 0x000fc00000000000 */
/*0150*/ NOP; /* 0x0000000000007918 */
/* 0x000fc00000000000 */
/*0160*/ NOP; /* 0x0000000000007918 */
/* 0x000fc00000000000 */
/*0170*/ NOP; /* 0x0000000000007918 */
/* 0x000fc00000000000 */
/*0180*/ NOP; /* 0x0000000000007918 */
/* 0x000fc00000000000 */
/*0190*/ NOP; /* 0x0000000000007918 */
/* 0x000fc00000000000 */
/*01a0*/ NOP; /* 0x0000000000007918 */
/* 0x000fc00000000000 */
/*01b0*/ NOP; /* 0x0000000000007918 */
/* 0x000fc00000000000 */
/*01c0*/ NOP; /* 0x0000000000007918 */
/* 0x000fc00000000000 */
/*01d0*/ NOP; /* 0x0000000000007918 */
/* 0x000fc00000000000 */
/*01e0*/ NOP; /* 0x0000000000007918 */
/* 0x000fc00000000000 */
/*01f0*/ NOP; /* 0x0000000000007918 */
/* 0x000fc00000000000 */
.......... |
You are a helpful coding assistant specialized in converting CUDA source code to CUDA host assembly. | #include <algorithm>
#include <cassert>
#include <iostream>
#include <vector>
// __global__ means that its called from CPU to run on the GPU
__global__ void vectorAdd(int *a, int *b, int *c, int N)
{
// calculate the global thread id
int tid = (blockIdx.x * blockDim.x) + threadIdx.x;
if ( tid < N) // a quick boundary check
{
c[tid] = a[tid] + b[tid]; // do the actual addition
}
}
int main()
{
constexpr int N = 1 << 16;
constexpr size_t bytes = sizeof(int) * N;
// declare the vectors to hold the data on the CPU
int *a, *b, *c;
cudaMallocManaged(&a, bytes);
cudaMallocManaged(&b, bytes);
cudaMallocManaged(&c, bytes);
int id = cudaGetDevice(&id);
// give some hints to the memory manager about where we want our variables to live
cudaMemAdvise(a, bytes, cudaMemAdviseSetPreferredLocation, cudaCpuDeviceId);
cudaMemAdvise(b, bytes, cudaMemAdviseSetPreferredLocation, cudaCpuDeviceId);
cudaMemPrefetchAsync(c, bytes, id);
// fill up the vectors
for(int i=0; i < N; i++)
{
a[i] = rand() % 100;
b[i] = rand() % 100;
}
// prefetch a and b to GPU
cudaMemAdvise(a, bytes, cudaMemAdviseSetReadMostly, id);
cudaMemAdvise(b, bytes, cudaMemAdviseSetReadMostly, id);
cudaMemPrefetchAsync(a, bytes, id);
cudaMemPrefetchAsync(b, bytes, id);
// Threads per CTA
int BLOCK_SIZE = 1<<10;
// CTAs per Grid
// We need to launch at LEAST as many threads as we have elements
// This equation pads an extra CTA to the grid if N cannot evenly be divided
// by NUM_THREADS (e.g. N = 1025, NUM_THREADS = 1024)
int GRID_SIZE = (N + BLOCK_SIZE - 1)/ BLOCK_SIZE;
// Launch the kernel on the GPU
// Kernel calls are asynchronous ( the CPU program continues execution after
// call, but not necessarily before the kernel finishes)
vectorAdd<<< GRID_SIZE, BLOCK_SIZE >>>(a, b, c, N);
// Wait for all previous operations before using values
// We need this because we don't get the implicit synchronization of
// cudaMemcpy like in the original example
cudaDeviceSynchronize();
// prefetch back to CPU
cudaMemPrefetchAsync(a, bytes, cudaCpuDeviceId);
cudaMemPrefetchAsync(b, bytes, cudaCpuDeviceId);
cudaMemPrefetchAsync(c, bytes, cudaCpuDeviceId);
for (int i = 0 ; i<N ; i++)
{
assert(c[i] == a[i] + b[i]);
}
// Free memory on device
cudaFree(a);
cudaFree(b);
cudaFree(c);
std::cout << "COMPLETED SUCCESSFULLY\n";
return 0;
} | .file "tmpxft_000a2ca6_00000000-6_vector_addition_unified.cudafe1.cpp"
.text
#APP
.globl _ZSt21ios_base_library_initv
#NO_APP
.type _ZL26__cudaUnregisterBinaryUtilv, @function
_ZL26__cudaUnregisterBinaryUtilv:
.LFB4289:
.cfi_startproc
endbr64
subq $8, %rsp
.cfi_def_cfa_offset 16
movq _ZL20__cudaFatCubinHandle(%rip), %rdi
call __cudaUnregisterFatBinary@PLT
addq $8, %rsp
.cfi_def_cfa_offset 8
ret
.cfi_endproc
.LFE4289:
.size _ZL26__cudaUnregisterBinaryUtilv, .-_ZL26__cudaUnregisterBinaryUtilv
.globl _Z33__device_stub__Z9vectorAddPiS_S_iPiS_S_i
.type _Z33__device_stub__Z9vectorAddPiS_S_iPiS_S_i, @function
_Z33__device_stub__Z9vectorAddPiS_S_iPiS_S_i:
.LFB4311:
.cfi_startproc
endbr64
subq $152, %rsp
.cfi_def_cfa_offset 160
movq %rdi, 24(%rsp)
movq %rsi, 16(%rsp)
movq %rdx, 8(%rsp)
movl %ecx, 4(%rsp)
movq %fs:40, %rax
movq %rax, 136(%rsp)
xorl %eax, %eax
leaq 24(%rsp), %rax
movq %rax, 96(%rsp)
leaq 16(%rsp), %rax
movq %rax, 104(%rsp)
leaq 8(%rsp), %rax
movq %rax, 112(%rsp)
leaq 4(%rsp), %rax
movq %rax, 120(%rsp)
movl $1, 48(%rsp)
movl $1, 52(%rsp)
movl $1, 56(%rsp)
movl $1, 60(%rsp)
movl $1, 64(%rsp)
movl $1, 68(%rsp)
leaq 40(%rsp), %rcx
leaq 32(%rsp), %rdx
leaq 60(%rsp), %rsi
leaq 48(%rsp), %rdi
call __cudaPopCallConfiguration@PLT
testl %eax, %eax
je .L7
.L3:
movq 136(%rsp), %rax
subq %fs:40, %rax
jne .L8
addq $152, %rsp
.cfi_remember_state
.cfi_def_cfa_offset 8
ret
.L7:
.cfi_restore_state
pushq 40(%rsp)
.cfi_def_cfa_offset 168
pushq 40(%rsp)
.cfi_def_cfa_offset 176
leaq 112(%rsp), %r9
movq 76(%rsp), %rcx
movl 84(%rsp), %r8d
movq 64(%rsp), %rsi
movl 72(%rsp), %edx
leaq _Z9vectorAddPiS_S_i(%rip), %rdi
call cudaLaunchKernel@PLT
addq $16, %rsp
.cfi_def_cfa_offset 160
jmp .L3
.L8:
call __stack_chk_fail@PLT
.cfi_endproc
.LFE4311:
.size _Z33__device_stub__Z9vectorAddPiS_S_iPiS_S_i, .-_Z33__device_stub__Z9vectorAddPiS_S_iPiS_S_i
.globl _Z9vectorAddPiS_S_i
.type _Z9vectorAddPiS_S_i, @function
_Z9vectorAddPiS_S_i:
.LFB4312:
.cfi_startproc
endbr64
subq $8, %rsp
.cfi_def_cfa_offset 16
call _Z33__device_stub__Z9vectorAddPiS_S_iPiS_S_i
addq $8, %rsp
.cfi_def_cfa_offset 8
ret
.cfi_endproc
.LFE4312:
.size _Z9vectorAddPiS_S_i, .-_Z9vectorAddPiS_S_i
.section .rodata.str1.1,"aMS",@progbits,1
.LC0:
.string "COMPLETED SUCCESSFULLY\n"
.text
.globl main
.type main, @function
main:
.LFB4286:
.cfi_startproc
endbr64
pushq %rbx
.cfi_def_cfa_offset 16
.cfi_offset 3, -16
subq $64, %rsp
.cfi_def_cfa_offset 80
movq %fs:40, %rax
movq %rax, 56(%rsp)
xorl %eax, %eax
leaq 8(%rsp), %rdi
movl $1, %edx
movl $262144, %esi
call cudaMallocManaged@PLT
leaq 16(%rsp), %rdi
movl $1, %edx
movl $262144, %esi
call cudaMallocManaged@PLT
leaq 24(%rsp), %rdi
movl $1, %edx
movl $262144, %esi
call cudaMallocManaged@PLT
leaq 4(%rsp), %rdi
call cudaGetDevice@PLT
movl %eax, 4(%rsp)
movl $-1, %ecx
movl $3, %edx
movl $262144, %esi
movq 8(%rsp), %rdi
call cudaMemAdvise@PLT
movl $-1, %ecx
movl $3, %edx
movl $262144, %esi
movq 16(%rsp), %rdi
call cudaMemAdvise@PLT
movl $0, %ecx
movl 4(%rsp), %edx
movl $262144, %esi
movq 24(%rsp), %rdi
call cudaMemPrefetchAsync@PLT
movl $0, %ebx
.L12:
call rand@PLT
movslq %eax, %rdx
imulq $1374389535, %rdx, %rdx
sarq $37, %rdx
movl %eax, %ecx
sarl $31, %ecx
subl %ecx, %edx
imull $100, %edx, %edx
subl %edx, %eax
movq 8(%rsp), %rdx
movl %eax, (%rdx,%rbx)
call rand@PLT
movslq %eax, %rdx
imulq $1374389535, %rdx, %rdx
sarq $37, %rdx
movl %eax, %ecx
sarl $31, %ecx
subl %ecx, %edx
imull $100, %edx, %edx
subl %edx, %eax
movq 16(%rsp), %rdx
movl %eax, (%rdx,%rbx)
addq $4, %rbx
cmpq $262144, %rbx
jne .L12
movl 4(%rsp), %ecx
movl $1, %edx
movl $262144, %esi
movq 8(%rsp), %rdi
call cudaMemAdvise@PLT
movl 4(%rsp), %ecx
movl $1, %edx
movl $262144, %esi
movq 16(%rsp), %rdi
call cudaMemAdvise@PLT
movl $0, %ecx
movl 4(%rsp), %edx
movl $262144, %esi
movq 8(%rsp), %rdi
call cudaMemPrefetchAsync@PLT
movl $0, %ecx
movl 4(%rsp), %edx
movl $262144, %esi
movq 16(%rsp), %rdi
call cudaMemPrefetchAsync@PLT
movl $1024, 44(%rsp)
movl $1, 48(%rsp)
movl $64, 32(%rsp)
movl $1, 36(%rsp)
movl $0, %r9d
movl $0, %r8d
movq 44(%rsp), %rdx
movl $1, %ecx
movq 32(%rsp), %rdi
movl $1, %esi
call __cudaPushCallConfiguration@PLT
testl %eax, %eax
je .L19
.L13:
call cudaDeviceSynchronize@PLT
movl $0, %ecx
movl $-1, %edx
movl $262144, %esi
movq 8(%rsp), %rdi
call cudaMemPrefetchAsync@PLT
movl $0, %ecx
movl $-1, %edx
movl $262144, %esi
movq 16(%rsp), %rdi
call cudaMemPrefetchAsync@PLT
movl $0, %ecx
movl $-1, %edx
movl $262144, %esi
movq 24(%rsp), %rdi
call cudaMemPrefetchAsync@PLT
movl $65536, %eax
.L14:
subl $1, %eax
jne .L14
movq 8(%rsp), %rdi
call cudaFree@PLT
movq 16(%rsp), %rdi
call cudaFree@PLT
movq 24(%rsp), %rdi
call cudaFree@PLT
leaq .LC0(%rip), %rsi
leaq _ZSt4cout(%rip), %rdi
call _ZStlsISt11char_traitsIcEERSt13basic_ostreamIcT_ES5_PKc@PLT
movq 56(%rsp), %rax
subq %fs:40, %rax
jne .L20
movl $0, %eax
addq $64, %rsp
.cfi_remember_state
.cfi_def_cfa_offset 16
popq %rbx
.cfi_def_cfa_offset 8
ret
.L19:
.cfi_restore_state
movl $65536, %ecx
movq 24(%rsp), %rdx
movq 16(%rsp), %rsi
movq 8(%rsp), %rdi
call _Z33__device_stub__Z9vectorAddPiS_S_iPiS_S_i
jmp .L13
.L20:
call __stack_chk_fail@PLT
.cfi_endproc
.LFE4286:
.size main, .-main
.section .rodata.str1.1
.LC1:
.string "_Z9vectorAddPiS_S_i"
.text
.type _ZL24__sti____cudaRegisterAllv, @function
_ZL24__sti____cudaRegisterAllv:
.LFB4314:
.cfi_startproc
endbr64
subq $8, %rsp
.cfi_def_cfa_offset 16
leaq _ZL15__fatDeviceText(%rip), %rdi
call __cudaRegisterFatBinary@PLT
movq %rax, %rdi
movq %rax, _ZL20__cudaFatCubinHandle(%rip)
pushq $0
.cfi_def_cfa_offset 24
pushq $0
.cfi_def_cfa_offset 32
pushq $0
.cfi_def_cfa_offset 40
pushq $0
.cfi_def_cfa_offset 48
movl $0, %r9d
movl $-1, %r8d
leaq .LC1(%rip), %rdx
movq %rdx, %rcx
leaq _Z9vectorAddPiS_S_i(%rip), %rsi
call __cudaRegisterFunction@PLT
addq $32, %rsp
.cfi_def_cfa_offset 16
movq _ZL20__cudaFatCubinHandle(%rip), %rdi
call __cudaRegisterFatBinaryEnd@PLT
leaq _ZL26__cudaUnregisterBinaryUtilv(%rip), %rdi
call atexit@PLT
addq $8, %rsp
.cfi_def_cfa_offset 8
ret
.cfi_endproc
.LFE4314:
.size _ZL24__sti____cudaRegisterAllv, .-_ZL24__sti____cudaRegisterAllv
.section .init_array,"aw"
.align 8
.quad _ZL24__sti____cudaRegisterAllv
.section .nvFatBinSegment,"aw"
.align 8
.type _ZL15__fatDeviceText, @object
.size _ZL15__fatDeviceText, 24
_ZL15__fatDeviceText:
.long 1180844977
.long 1
.quad fatbinData
.quad 0
.local _ZL20__cudaFatCubinHandle
.comm _ZL20__cudaFatCubinHandle,8,8
.ident "GCC: (Ubuntu 13.3.0-6ubuntu2~24.04) 13.3.0"
.section .note.GNU-stack,"",@progbits
.section .note.gnu.property,"a"
.align 8
.long 1f - 0f
.long 4f - 1f
.long 5
0:
.string "GNU"
1:
.align 8
.long 0xc0000002
.long 3f - 2f
2:
.long 0x3
3:
.align 8
4: |
You are a helpful coding assistant specialized in converting CUDA source code to HIP/AMD source code. | #include <algorithm>
#include <cassert>
#include <iostream>
#include <vector>
// __global__ means that its called from CPU to run on the GPU
__global__ void vectorAdd(int *a, int *b, int *c, int N)
{
// calculate the global thread id
int tid = (blockIdx.x * blockDim.x) + threadIdx.x;
if ( tid < N) // a quick boundary check
{
c[tid] = a[tid] + b[tid]; // do the actual addition
}
}
int main()
{
constexpr int N = 1 << 16;
constexpr size_t bytes = sizeof(int) * N;
// declare the vectors to hold the data on the CPU
int *a, *b, *c;
cudaMallocManaged(&a, bytes);
cudaMallocManaged(&b, bytes);
cudaMallocManaged(&c, bytes);
int id = cudaGetDevice(&id);
// give some hints to the memory manager about where we want our variables to live
cudaMemAdvise(a, bytes, cudaMemAdviseSetPreferredLocation, cudaCpuDeviceId);
cudaMemAdvise(b, bytes, cudaMemAdviseSetPreferredLocation, cudaCpuDeviceId);
cudaMemPrefetchAsync(c, bytes, id);
// fill up the vectors
for(int i=0; i < N; i++)
{
a[i] = rand() % 100;
b[i] = rand() % 100;
}
// prefetch a and b to GPU
cudaMemAdvise(a, bytes, cudaMemAdviseSetReadMostly, id);
cudaMemAdvise(b, bytes, cudaMemAdviseSetReadMostly, id);
cudaMemPrefetchAsync(a, bytes, id);
cudaMemPrefetchAsync(b, bytes, id);
// Threads per CTA
int BLOCK_SIZE = 1<<10;
// CTAs per Grid
// We need to launch at LEAST as many threads as we have elements
// This equation pads an extra CTA to the grid if N cannot evenly be divided
// by NUM_THREADS (e.g. N = 1025, NUM_THREADS = 1024)
int GRID_SIZE = (N + BLOCK_SIZE - 1)/ BLOCK_SIZE;
// Launch the kernel on the GPU
// Kernel calls are asynchronous ( the CPU program continues execution after
// call, but not necessarily before the kernel finishes)
vectorAdd<<< GRID_SIZE, BLOCK_SIZE >>>(a, b, c, N);
// Wait for all previous operations before using values
// We need this because we don't get the implicit synchronization of
// cudaMemcpy like in the original example
cudaDeviceSynchronize();
// prefetch back to CPU
cudaMemPrefetchAsync(a, bytes, cudaCpuDeviceId);
cudaMemPrefetchAsync(b, bytes, cudaCpuDeviceId);
cudaMemPrefetchAsync(c, bytes, cudaCpuDeviceId);
for (int i = 0 ; i<N ; i++)
{
assert(c[i] == a[i] + b[i]);
}
// Free memory on device
cudaFree(a);
cudaFree(b);
cudaFree(c);
std::cout << "COMPLETED SUCCESSFULLY\n";
return 0;
} | #include <hip/hip_runtime.h>
#include <algorithm>
#include <cassert>
#include <iostream>
#include <vector>
// __global__ means that its called from CPU to run on the GPU
__global__ void vectorAdd(int *a, int *b, int *c, int N)
{
// calculate the global thread id
int tid = (blockIdx.x * blockDim.x) + threadIdx.x;
if ( tid < N) // a quick boundary check
{
c[tid] = a[tid] + b[tid]; // do the actual addition
}
}
int main()
{
constexpr int N = 1 << 16;
constexpr size_t bytes = sizeof(int) * N;
// declare the vectors to hold the data on the CPU
int *a, *b, *c;
hipMallocManaged(&a, bytes);
hipMallocManaged(&b, bytes);
hipMallocManaged(&c, bytes);
int id = hipGetDevice(&id);
// give some hints to the memory manager about where we want our variables to live
hipMemAdvise(a, bytes, hipMemAdviseSetPreferredLocation, hipCpuDeviceId);
hipMemAdvise(b, bytes, hipMemAdviseSetPreferredLocation, hipCpuDeviceId);
hipMemPrefetchAsync(c, bytes, id);
// fill up the vectors
for(int i=0; i < N; i++)
{
a[i] = rand() % 100;
b[i] = rand() % 100;
}
// prefetch a and b to GPU
hipMemAdvise(a, bytes, hipMemAdviseSetReadMostly, id);
hipMemAdvise(b, bytes, hipMemAdviseSetReadMostly, id);
hipMemPrefetchAsync(a, bytes, id);
hipMemPrefetchAsync(b, bytes, id);
// Threads per CTA
int BLOCK_SIZE = 1<<10;
// CTAs per Grid
// We need to launch at LEAST as many threads as we have elements
// This equation pads an extra CTA to the grid if N cannot evenly be divided
// by NUM_THREADS (e.g. N = 1025, NUM_THREADS = 1024)
int GRID_SIZE = (N + BLOCK_SIZE - 1)/ BLOCK_SIZE;
// Launch the kernel on the GPU
// Kernel calls are asynchronous ( the CPU program continues execution after
// call, but not necessarily before the kernel finishes)
vectorAdd<<< GRID_SIZE, BLOCK_SIZE >>>(a, b, c, N);
// Wait for all previous operations before using values
// We need this because we don't get the implicit synchronization of
// cudaMemcpy like in the original example
hipDeviceSynchronize();
// prefetch back to CPU
hipMemPrefetchAsync(a, bytes, hipCpuDeviceId);
hipMemPrefetchAsync(b, bytes, hipCpuDeviceId);
hipMemPrefetchAsync(c, bytes, hipCpuDeviceId);
for (int i = 0 ; i<N ; i++)
{
assert(c[i] == a[i] + b[i]);
}
// Free memory on device
hipFree(a);
hipFree(b);
hipFree(c);
std::cout << "COMPLETED SUCCESSFULLY\n";
return 0;
} |
You are a helpful coding assistant specialized in converting HIP source code to AMD device assembly. | #include <hip/hip_runtime.h>
#include <algorithm>
#include <cassert>
#include <iostream>
#include <vector>
// __global__ means that its called from CPU to run on the GPU
__global__ void vectorAdd(int *a, int *b, int *c, int N)
{
// calculate the global thread id
int tid = (blockIdx.x * blockDim.x) + threadIdx.x;
if ( tid < N) // a quick boundary check
{
c[tid] = a[tid] + b[tid]; // do the actual addition
}
}
int main()
{
constexpr int N = 1 << 16;
constexpr size_t bytes = sizeof(int) * N;
// declare the vectors to hold the data on the CPU
int *a, *b, *c;
hipMallocManaged(&a, bytes);
hipMallocManaged(&b, bytes);
hipMallocManaged(&c, bytes);
int id = hipGetDevice(&id);
// give some hints to the memory manager about where we want our variables to live
hipMemAdvise(a, bytes, hipMemAdviseSetPreferredLocation, hipCpuDeviceId);
hipMemAdvise(b, bytes, hipMemAdviseSetPreferredLocation, hipCpuDeviceId);
hipMemPrefetchAsync(c, bytes, id);
// fill up the vectors
for(int i=0; i < N; i++)
{
a[i] = rand() % 100;
b[i] = rand() % 100;
}
// prefetch a and b to GPU
hipMemAdvise(a, bytes, hipMemAdviseSetReadMostly, id);
hipMemAdvise(b, bytes, hipMemAdviseSetReadMostly, id);
hipMemPrefetchAsync(a, bytes, id);
hipMemPrefetchAsync(b, bytes, id);
// Threads per CTA
int BLOCK_SIZE = 1<<10;
// CTAs per Grid
// We need to launch at LEAST as many threads as we have elements
// This equation pads an extra CTA to the grid if N cannot evenly be divided
// by NUM_THREADS (e.g. N = 1025, NUM_THREADS = 1024)
int GRID_SIZE = (N + BLOCK_SIZE - 1)/ BLOCK_SIZE;
// Launch the kernel on the GPU
// Kernel calls are asynchronous ( the CPU program continues execution after
// call, but not necessarily before the kernel finishes)
vectorAdd<<< GRID_SIZE, BLOCK_SIZE >>>(a, b, c, N);
// Wait for all previous operations before using values
// We need this because we don't get the implicit synchronization of
// cudaMemcpy like in the original example
hipDeviceSynchronize();
// prefetch back to CPU
hipMemPrefetchAsync(a, bytes, hipCpuDeviceId);
hipMemPrefetchAsync(b, bytes, hipCpuDeviceId);
hipMemPrefetchAsync(c, bytes, hipCpuDeviceId);
for (int i = 0 ; i<N ; i++)
{
assert(c[i] == a[i] + b[i]);
}
// Free memory on device
hipFree(a);
hipFree(b);
hipFree(c);
std::cout << "COMPLETED SUCCESSFULLY\n";
return 0;
} | .text
.amdgcn_target "amdgcn-amd-amdhsa--gfx1100"
.protected _Z9vectorAddPiS_S_i
.globl _Z9vectorAddPiS_S_i
.p2align 8
.type _Z9vectorAddPiS_S_i,@function
_Z9vectorAddPiS_S_i:
s_clause 0x1
s_load_b32 s2, s[0:1], 0x2c
s_load_b32 s3, s[0:1], 0x18
s_waitcnt lgkmcnt(0)
s_and_b32 s2, s2, 0xffff
s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
v_mad_u64_u32 v[1:2], null, s15, s2, v[0:1]
s_mov_b32 s2, exec_lo
v_cmpx_gt_i32_e64 s3, v1
s_cbranch_execz .LBB0_2
s_load_b128 s[4:7], s[0:1], 0x0
v_ashrrev_i32_e32 v2, 31, v1
s_load_b64 s[0:1], s[0:1], 0x10
s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
v_lshlrev_b64 v[0:1], 2, v[1:2]
s_waitcnt lgkmcnt(0)
v_add_co_u32 v2, vcc_lo, s4, v0
s_delay_alu instid0(VALU_DEP_2)
v_add_co_ci_u32_e32 v3, vcc_lo, s5, v1, vcc_lo
v_add_co_u32 v4, vcc_lo, s6, v0
v_add_co_ci_u32_e32 v5, vcc_lo, s7, v1, vcc_lo
v_add_co_u32 v0, vcc_lo, s0, v0
global_load_b32 v2, v[2:3], off
global_load_b32 v3, v[4:5], off
v_add_co_ci_u32_e32 v1, vcc_lo, s1, v1, vcc_lo
s_waitcnt vmcnt(0)
v_add_nc_u32_e32 v2, v3, v2
global_store_b32 v[0:1], v2, off
.LBB0_2:
s_nop 0
s_sendmsg sendmsg(MSG_DEALLOC_VGPRS)
s_endpgm
.section .rodata,"a",@progbits
.p2align 6, 0x0
.amdhsa_kernel _Z9vectorAddPiS_S_i
.amdhsa_group_segment_fixed_size 0
.amdhsa_private_segment_fixed_size 0
.amdhsa_kernarg_size 288
.amdhsa_user_sgpr_count 15
.amdhsa_user_sgpr_dispatch_ptr 0
.amdhsa_user_sgpr_queue_ptr 0
.amdhsa_user_sgpr_kernarg_segment_ptr 1
.amdhsa_user_sgpr_dispatch_id 0
.amdhsa_user_sgpr_private_segment_size 0
.amdhsa_wavefront_size32 1
.amdhsa_uses_dynamic_stack 0
.amdhsa_enable_private_segment 0
.amdhsa_system_sgpr_workgroup_id_x 1
.amdhsa_system_sgpr_workgroup_id_y 0
.amdhsa_system_sgpr_workgroup_id_z 0
.amdhsa_system_sgpr_workgroup_info 0
.amdhsa_system_vgpr_workitem_id 0
.amdhsa_next_free_vgpr 6
.amdhsa_next_free_sgpr 16
.amdhsa_float_round_mode_32 0
.amdhsa_float_round_mode_16_64 0
.amdhsa_float_denorm_mode_32 3
.amdhsa_float_denorm_mode_16_64 3
.amdhsa_dx10_clamp 1
.amdhsa_ieee_mode 1
.amdhsa_fp16_overflow 0
.amdhsa_workgroup_processor_mode 1
.amdhsa_memory_ordered 1
.amdhsa_forward_progress 0
.amdhsa_shared_vgpr_count 0
.amdhsa_exception_fp_ieee_invalid_op 0
.amdhsa_exception_fp_denorm_src 0
.amdhsa_exception_fp_ieee_div_zero 0
.amdhsa_exception_fp_ieee_overflow 0
.amdhsa_exception_fp_ieee_underflow 0
.amdhsa_exception_fp_ieee_inexact 0
.amdhsa_exception_int_div_zero 0
.end_amdhsa_kernel
.text
.Lfunc_end0:
.size _Z9vectorAddPiS_S_i, .Lfunc_end0-_Z9vectorAddPiS_S_i
.section .AMDGPU.csdata,"",@progbits
.text
.p2alignl 7, 3214868480
.fill 96, 4, 3214868480
.type __hip_cuid_,@object
.section .bss,"aw",@nobits
.globl __hip_cuid_
__hip_cuid_:
.byte 0
.size __hip_cuid_, 1
.ident "AMD clang version 18.0.0git (https://github.com/RadeonOpenCompute/llvm-project roc-6.3.2 25012 e5bf7e55c91490b07c49d8960fa7983d864936c4)"
.section ".note.GNU-stack","",@progbits
.addrsig
.addrsig_sym __hip_cuid_
.amdgpu_metadata
---
amdhsa.kernels:
- .args:
- .address_space: global
.offset: 0
.size: 8
.value_kind: global_buffer
- .address_space: global
.offset: 8
.size: 8
.value_kind: global_buffer
- .address_space: global
.offset: 16
.size: 8
.value_kind: global_buffer
- .offset: 24
.size: 4
.value_kind: by_value
- .offset: 32
.size: 4
.value_kind: hidden_block_count_x
- .offset: 36
.size: 4
.value_kind: hidden_block_count_y
- .offset: 40
.size: 4
.value_kind: hidden_block_count_z
- .offset: 44
.size: 2
.value_kind: hidden_group_size_x
- .offset: 46
.size: 2
.value_kind: hidden_group_size_y
- .offset: 48
.size: 2
.value_kind: hidden_group_size_z
- .offset: 50
.size: 2
.value_kind: hidden_remainder_x
- .offset: 52
.size: 2
.value_kind: hidden_remainder_y
- .offset: 54
.size: 2
.value_kind: hidden_remainder_z
- .offset: 72
.size: 8
.value_kind: hidden_global_offset_x
- .offset: 80
.size: 8
.value_kind: hidden_global_offset_y
- .offset: 88
.size: 8
.value_kind: hidden_global_offset_z
- .offset: 96
.size: 2
.value_kind: hidden_grid_dims
.group_segment_fixed_size: 0
.kernarg_segment_align: 8
.kernarg_segment_size: 288
.language: OpenCL C
.language_version:
- 2
- 0
.max_flat_workgroup_size: 1024
.name: _Z9vectorAddPiS_S_i
.private_segment_fixed_size: 0
.sgpr_count: 18
.sgpr_spill_count: 0
.symbol: _Z9vectorAddPiS_S_i.kd
.uniform_work_group_size: 1
.uses_dynamic_stack: false
.vgpr_count: 6
.vgpr_spill_count: 0
.wavefront_size: 32
.workgroup_processor_mode: 1
amdhsa.target: amdgcn-amd-amdhsa--gfx1100
amdhsa.version:
- 1
- 2
...
.end_amdgpu_metadata |
You are a helpful coding assistant specialized in converting HIP source code to AMD host assembly. | #include <hip/hip_runtime.h>
#include <algorithm>
#include <cassert>
#include <iostream>
#include <vector>
// __global__ means that its called from CPU to run on the GPU
__global__ void vectorAdd(int *a, int *b, int *c, int N)
{
// calculate the global thread id
int tid = (blockIdx.x * blockDim.x) + threadIdx.x;
if ( tid < N) // a quick boundary check
{
c[tid] = a[tid] + b[tid]; // do the actual addition
}
}
int main()
{
constexpr int N = 1 << 16;
constexpr size_t bytes = sizeof(int) * N;
// declare the vectors to hold the data on the CPU
int *a, *b, *c;
hipMallocManaged(&a, bytes);
hipMallocManaged(&b, bytes);
hipMallocManaged(&c, bytes);
int id = hipGetDevice(&id);
// give some hints to the memory manager about where we want our variables to live
hipMemAdvise(a, bytes, hipMemAdviseSetPreferredLocation, hipCpuDeviceId);
hipMemAdvise(b, bytes, hipMemAdviseSetPreferredLocation, hipCpuDeviceId);
hipMemPrefetchAsync(c, bytes, id);
// fill up the vectors
for(int i=0; i < N; i++)
{
a[i] = rand() % 100;
b[i] = rand() % 100;
}
// prefetch a and b to GPU
hipMemAdvise(a, bytes, hipMemAdviseSetReadMostly, id);
hipMemAdvise(b, bytes, hipMemAdviseSetReadMostly, id);
hipMemPrefetchAsync(a, bytes, id);
hipMemPrefetchAsync(b, bytes, id);
// Threads per CTA
int BLOCK_SIZE = 1<<10;
// CTAs per Grid
// We need to launch at LEAST as many threads as we have elements
// This equation pads an extra CTA to the grid if N cannot evenly be divided
// by NUM_THREADS (e.g. N = 1025, NUM_THREADS = 1024)
int GRID_SIZE = (N + BLOCK_SIZE - 1)/ BLOCK_SIZE;
// Launch the kernel on the GPU
// Kernel calls are asynchronous ( the CPU program continues execution after
// call, but not necessarily before the kernel finishes)
vectorAdd<<< GRID_SIZE, BLOCK_SIZE >>>(a, b, c, N);
// Wait for all previous operations before using values
// We need this because we don't get the implicit synchronization of
// cudaMemcpy like in the original example
hipDeviceSynchronize();
// prefetch back to CPU
hipMemPrefetchAsync(a, bytes, hipCpuDeviceId);
hipMemPrefetchAsync(b, bytes, hipCpuDeviceId);
hipMemPrefetchAsync(c, bytes, hipCpuDeviceId);
for (int i = 0 ; i<N ; i++)
{
assert(c[i] == a[i] + b[i]);
}
// Free memory on device
hipFree(a);
hipFree(b);
hipFree(c);
std::cout << "COMPLETED SUCCESSFULLY\n";
return 0;
} | .text
.file "vector_addition_unified.hip"
# Start of file scope inline assembly
.globl _ZSt21ios_base_library_initv
# End of file scope inline assembly
.globl _Z24__device_stub__vectorAddPiS_S_i # -- Begin function _Z24__device_stub__vectorAddPiS_S_i
.p2align 4, 0x90
.type _Z24__device_stub__vectorAddPiS_S_i,@function
_Z24__device_stub__vectorAddPiS_S_i: # @_Z24__device_stub__vectorAddPiS_S_i
.cfi_startproc
# %bb.0:
subq $120, %rsp
.cfi_def_cfa_offset 128
movq %rdi, 72(%rsp)
movq %rsi, 64(%rsp)
movq %rdx, 56(%rsp)
movl %ecx, 4(%rsp)
leaq 72(%rsp), %rax
movq %rax, 80(%rsp)
leaq 64(%rsp), %rax
movq %rax, 88(%rsp)
leaq 56(%rsp), %rax
movq %rax, 96(%rsp)
leaq 4(%rsp), %rax
movq %rax, 104(%rsp)
leaq 40(%rsp), %rdi
leaq 24(%rsp), %rsi
leaq 16(%rsp), %rdx
leaq 8(%rsp), %rcx
callq __hipPopCallConfiguration
movq 40(%rsp), %rsi
movl 48(%rsp), %edx
movq 24(%rsp), %rcx
movl 32(%rsp), %r8d
leaq 80(%rsp), %r9
movl $_Z9vectorAddPiS_S_i, %edi
pushq 8(%rsp)
.cfi_adjust_cfa_offset 8
pushq 24(%rsp)
.cfi_adjust_cfa_offset 8
callq hipLaunchKernel
addq $136, %rsp
.cfi_adjust_cfa_offset -136
retq
.Lfunc_end0:
.size _Z24__device_stub__vectorAddPiS_S_i, .Lfunc_end0-_Z24__device_stub__vectorAddPiS_S_i
.cfi_endproc
# -- End function
.globl main # -- Begin function main
.p2align 4, 0x90
.type main,@function
main: # @main
.cfi_startproc
# %bb.0:
pushq %rbx
.cfi_def_cfa_offset 16
subq $144, %rsp
.cfi_def_cfa_offset 160
.cfi_offset %rbx, -16
leaq 16(%rsp), %rdi
movl $262144, %esi # imm = 0x40000
movl $1, %edx
callq hipMallocManaged
leaq 8(%rsp), %rdi
movl $262144, %esi # imm = 0x40000
movl $1, %edx
callq hipMallocManaged
leaq 24(%rsp), %rdi
movl $262144, %esi # imm = 0x40000
movl $1, %edx
callq hipMallocManaged
leaq 4(%rsp), %rdi
callq hipGetDevice
movl %eax, 4(%rsp)
movq 16(%rsp), %rdi
movl $262144, %esi # imm = 0x40000
movl $3, %edx
movl $-1, %ecx
callq hipMemAdvise
movq 8(%rsp), %rdi
movl $262144, %esi # imm = 0x40000
movl $3, %edx
movl $-1, %ecx
callq hipMemAdvise
movq 24(%rsp), %rdi
movl 4(%rsp), %edx
xorl %ebx, %ebx
movl $262144, %esi # imm = 0x40000
xorl %ecx, %ecx
callq hipMemPrefetchAsync
.p2align 4, 0x90
.LBB1_1: # =>This Inner Loop Header: Depth=1
callq rand
cltq
imulq $1374389535, %rax, %rcx # imm = 0x51EB851F
movq %rcx, %rdx
shrq $63, %rdx
sarq $37, %rcx
addl %edx, %ecx
imull $100, %ecx, %ecx
subl %ecx, %eax
movq 16(%rsp), %rcx
movl %eax, (%rcx,%rbx,4)
callq rand
cltq
imulq $1374389535, %rax, %rcx # imm = 0x51EB851F
movq %rcx, %rdx
shrq $63, %rdx
sarq $37, %rcx
addl %edx, %ecx
imull $100, %ecx, %ecx
subl %ecx, %eax
movq 8(%rsp), %rcx
movl %eax, (%rcx,%rbx,4)
incq %rbx
cmpq $65536, %rbx # imm = 0x10000
jne .LBB1_1
# %bb.2:
movq 16(%rsp), %rdi
movl 4(%rsp), %ecx
movl $262144, %esi # imm = 0x40000
movl $1, %edx
callq hipMemAdvise
movq 8(%rsp), %rdi
movl 4(%rsp), %ecx
movl $262144, %esi # imm = 0x40000
movl $1, %edx
callq hipMemAdvise
movq 16(%rsp), %rdi
movl 4(%rsp), %edx
movl $262144, %esi # imm = 0x40000
xorl %ecx, %ecx
callq hipMemPrefetchAsync
movq 8(%rsp), %rdi
movl 4(%rsp), %edx
movl $262144, %esi # imm = 0x40000
xorl %ecx, %ecx
callq hipMemPrefetchAsync
movabsq $4294967360, %rdi # imm = 0x100000040
leaq 960(%rdi), %rdx
movl $1, %esi
movl $1, %ecx
xorl %r8d, %r8d
xorl %r9d, %r9d
callq __hipPushCallConfiguration
testl %eax, %eax
jne .LBB1_4
# %bb.3:
movq 16(%rsp), %rax
movq 8(%rsp), %rcx
movq 24(%rsp), %rdx
movq %rax, 104(%rsp)
movq %rcx, 96(%rsp)
movq %rdx, 88(%rsp)
movl $65536, 36(%rsp) # imm = 0x10000
leaq 104(%rsp), %rax
movq %rax, 112(%rsp)
leaq 96(%rsp), %rax
movq %rax, 120(%rsp)
leaq 88(%rsp), %rax
movq %rax, 128(%rsp)
leaq 36(%rsp), %rax
movq %rax, 136(%rsp)
leaq 72(%rsp), %rdi
leaq 56(%rsp), %rsi
leaq 48(%rsp), %rdx
leaq 40(%rsp), %rcx
callq __hipPopCallConfiguration
movq 72(%rsp), %rsi
movl 80(%rsp), %edx
movq 56(%rsp), %rcx
movl 64(%rsp), %r8d
leaq 112(%rsp), %r9
movl $_Z9vectorAddPiS_S_i, %edi
pushq 40(%rsp)
.cfi_adjust_cfa_offset 8
pushq 56(%rsp)
.cfi_adjust_cfa_offset 8
callq hipLaunchKernel
addq $16, %rsp
.cfi_adjust_cfa_offset -16
.LBB1_4:
callq hipDeviceSynchronize
movq 16(%rsp), %rdi
movl $262144, %esi # imm = 0x40000
movl $-1, %edx
xorl %ecx, %ecx
callq hipMemPrefetchAsync
movq 8(%rsp), %rdi
movl $262144, %esi # imm = 0x40000
movl $-1, %edx
xorl %ecx, %ecx
callq hipMemPrefetchAsync
movq 24(%rsp), %rdi
movl $262144, %esi # imm = 0x40000
movl $-1, %edx
xorl %ecx, %ecx
callq hipMemPrefetchAsync
movq 16(%rsp), %rdi
callq hipFree
movq 8(%rsp), %rdi
callq hipFree
movq 24(%rsp), %rdi
callq hipFree
movl $_ZSt4cout, %edi
movl $.L.str, %esi
movl $23, %edx
callq _ZSt16__ostream_insertIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_PKS3_l
xorl %eax, %eax
addq $144, %rsp
.cfi_def_cfa_offset 16
popq %rbx
.cfi_def_cfa_offset 8
retq
.Lfunc_end1:
.size main, .Lfunc_end1-main
.cfi_endproc
# -- End function
.p2align 4, 0x90 # -- Begin function __hip_module_ctor
.type __hip_module_ctor,@function
__hip_module_ctor: # @__hip_module_ctor
.cfi_startproc
# %bb.0:
subq $40, %rsp
.cfi_def_cfa_offset 48
cmpq $0, __hip_gpubin_handle(%rip)
jne .LBB2_2
# %bb.1:
movl $__hip_fatbin_wrapper, %edi
callq __hipRegisterFatBinary
movq %rax, __hip_gpubin_handle(%rip)
.LBB2_2:
movq __hip_gpubin_handle(%rip), %rdi
xorps %xmm0, %xmm0
movups %xmm0, 16(%rsp)
movups %xmm0, (%rsp)
movl $_Z9vectorAddPiS_S_i, %esi
movl $.L__unnamed_1, %edx
movl $.L__unnamed_1, %ecx
movl $-1, %r8d
xorl %r9d, %r9d
callq __hipRegisterFunction
movl $__hip_module_dtor, %edi
addq $40, %rsp
.cfi_def_cfa_offset 8
jmp atexit # TAILCALL
.Lfunc_end2:
.size __hip_module_ctor, .Lfunc_end2-__hip_module_ctor
.cfi_endproc
# -- End function
.p2align 4, 0x90 # -- Begin function __hip_module_dtor
.type __hip_module_dtor,@function
__hip_module_dtor: # @__hip_module_dtor
.cfi_startproc
# %bb.0:
movq __hip_gpubin_handle(%rip), %rdi
testq %rdi, %rdi
je .LBB3_2
# %bb.1:
pushq %rax
.cfi_def_cfa_offset 16
callq __hipUnregisterFatBinary
movq $0, __hip_gpubin_handle(%rip)
addq $8, %rsp
.cfi_def_cfa_offset 8
.LBB3_2:
retq
.Lfunc_end3:
.size __hip_module_dtor, .Lfunc_end3-__hip_module_dtor
.cfi_endproc
# -- End function
.type _Z9vectorAddPiS_S_i,@object # @_Z9vectorAddPiS_S_i
.section .rodata,"a",@progbits
.globl _Z9vectorAddPiS_S_i
.p2align 3, 0x0
_Z9vectorAddPiS_S_i:
.quad _Z24__device_stub__vectorAddPiS_S_i
.size _Z9vectorAddPiS_S_i, 8
.type .L.str,@object # @.str
.section .rodata.str1.1,"aMS",@progbits,1
.L.str:
.asciz "COMPLETED SUCCESSFULLY\n"
.size .L.str, 24
.type .L__unnamed_1,@object # @0
.L__unnamed_1:
.asciz "_Z9vectorAddPiS_S_i"
.size .L__unnamed_1, 20
.type __hip_fatbin_wrapper,@object # @__hip_fatbin_wrapper
.section .hipFatBinSegment,"a",@progbits
.p2align 3, 0x0
__hip_fatbin_wrapper:
.long 1212764230 # 0x48495046
.long 1 # 0x1
.quad __hip_fatbin
.quad 0
.size __hip_fatbin_wrapper, 24
.type __hip_gpubin_handle,@object # @__hip_gpubin_handle
.local __hip_gpubin_handle
.comm __hip_gpubin_handle,8,8
.section .init_array,"aw",@init_array
.p2align 3, 0x0
.quad __hip_module_ctor
.type __hip_cuid_,@object # @__hip_cuid_
.bss
.globl __hip_cuid_
__hip_cuid_:
.byte 0 # 0x0
.size __hip_cuid_, 1
.section ".linker-options","e",@llvm_linker_options
.ident "AMD clang version 18.0.0git (https://github.com/RadeonOpenCompute/llvm-project roc-6.3.2 25012 e5bf7e55c91490b07c49d8960fa7983d864936c4)"
.section ".note.GNU-stack","",@progbits
.addrsig
.addrsig_sym _Z24__device_stub__vectorAddPiS_S_i
.addrsig_sym __hip_module_ctor
.addrsig_sym __hip_module_dtor
.addrsig_sym _Z9vectorAddPiS_S_i
.addrsig_sym _ZSt4cout
.addrsig_sym __hip_fatbin
.addrsig_sym __hip_fatbin_wrapper
.addrsig_sym __hip_cuid_ |
You are a helpful coding assistant specialized in converting from CUDA device assembly to AMD device assembly. | code for sm_80
Function : _Z9vectorAddPiS_S_i
.headerflags @"EF_CUDA_TEXMODE_UNIFIED EF_CUDA_64BIT_ADDRESS EF_CUDA_SM80 EF_CUDA_VIRTUAL_SM(EF_CUDA_SM80)"
/*0000*/ MOV R1, c[0x0][0x28] ; /* 0x00000a0000017a02 */
/* 0x000fe40000000f00 */
/*0010*/ S2R R6, SR_CTAID.X ; /* 0x0000000000067919 */
/* 0x000e280000002500 */
/*0020*/ S2R R3, SR_TID.X ; /* 0x0000000000037919 */
/* 0x000e240000002100 */
/*0030*/ IMAD R6, R6, c[0x0][0x0], R3 ; /* 0x0000000006067a24 */
/* 0x001fca00078e0203 */
/*0040*/ ISETP.GE.AND P0, PT, R6, c[0x0][0x178], PT ; /* 0x00005e0006007a0c */
/* 0x000fda0003f06270 */
/*0050*/ @P0 EXIT ; /* 0x000000000000094d */
/* 0x000fea0003800000 */
/*0060*/ HFMA2.MMA R7, -RZ, RZ, 0, 2.384185791015625e-07 ; /* 0x00000004ff077435 */
/* 0x000fe200000001ff */
/*0070*/ ULDC.64 UR4, c[0x0][0x118] ; /* 0x0000460000047ab9 */
/* 0x000fd20000000a00 */
/*0080*/ IMAD.WIDE R4, R6, R7, c[0x0][0x168] ; /* 0x00005a0006047625 */
/* 0x000fc800078e0207 */
/*0090*/ IMAD.WIDE R2, R6.reuse, R7.reuse, c[0x0][0x160] ; /* 0x0000580006027625 */
/* 0x0c0fe400078e0207 */
/*00a0*/ LDG.E R4, [R4.64] ; /* 0x0000000404047981 */
/* 0x000ea8000c1e1900 */
/*00b0*/ LDG.E R3, [R2.64] ; /* 0x0000000402037981 */
/* 0x000ea2000c1e1900 */
/*00c0*/ IMAD.WIDE R6, R6, R7, c[0x0][0x170] ; /* 0x00005c0006067625 */
/* 0x000fe200078e0207 */
/*00d0*/ IADD3 R9, R4, R3, RZ ; /* 0x0000000304097210 */
/* 0x004fca0007ffe0ff */
/*00e0*/ STG.E [R6.64], R9 ; /* 0x0000000906007986 */
/* 0x000fe2000c101904 */
/*00f0*/ EXIT ; /* 0x000000000000794d */
/* 0x000fea0003800000 */
/*0100*/ BRA 0x100; /* 0xfffffff000007947 */
/* 0x000fc0000383ffff */
/*0110*/ NOP; /* 0x0000000000007918 */
/* 0x000fc00000000000 */
/*0120*/ NOP; /* 0x0000000000007918 */
/* 0x000fc00000000000 */
/*0130*/ NOP; /* 0x0000000000007918 */
/* 0x000fc00000000000 */
/*0140*/ NOP; /* 0x0000000000007918 */
/* 0x000fc00000000000 */
/*0150*/ NOP; /* 0x0000000000007918 */
/* 0x000fc00000000000 */
/*0160*/ NOP; /* 0x0000000000007918 */
/* 0x000fc00000000000 */
/*0170*/ NOP; /* 0x0000000000007918 */
/* 0x000fc00000000000 */
/*0180*/ NOP; /* 0x0000000000007918 */
/* 0x000fc00000000000 */
/*0190*/ NOP; /* 0x0000000000007918 */
/* 0x000fc00000000000 */
/*01a0*/ NOP; /* 0x0000000000007918 */
/* 0x000fc00000000000 */
/*01b0*/ NOP; /* 0x0000000000007918 */
/* 0x000fc00000000000 */
/*01c0*/ NOP; /* 0x0000000000007918 */
/* 0x000fc00000000000 */
/*01d0*/ NOP; /* 0x0000000000007918 */
/* 0x000fc00000000000 */
/*01e0*/ NOP; /* 0x0000000000007918 */
/* 0x000fc00000000000 */
/*01f0*/ NOP; /* 0x0000000000007918 */
/* 0x000fc00000000000 */
.......... | .text
.amdgcn_target "amdgcn-amd-amdhsa--gfx1100"
.protected _Z9vectorAddPiS_S_i
.globl _Z9vectorAddPiS_S_i
.p2align 8
.type _Z9vectorAddPiS_S_i,@function
_Z9vectorAddPiS_S_i:
s_clause 0x1
s_load_b32 s2, s[0:1], 0x2c
s_load_b32 s3, s[0:1], 0x18
s_waitcnt lgkmcnt(0)
s_and_b32 s2, s2, 0xffff
s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
v_mad_u64_u32 v[1:2], null, s15, s2, v[0:1]
s_mov_b32 s2, exec_lo
v_cmpx_gt_i32_e64 s3, v1
s_cbranch_execz .LBB0_2
s_load_b128 s[4:7], s[0:1], 0x0
v_ashrrev_i32_e32 v2, 31, v1
s_load_b64 s[0:1], s[0:1], 0x10
s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
v_lshlrev_b64 v[0:1], 2, v[1:2]
s_waitcnt lgkmcnt(0)
v_add_co_u32 v2, vcc_lo, s4, v0
s_delay_alu instid0(VALU_DEP_2)
v_add_co_ci_u32_e32 v3, vcc_lo, s5, v1, vcc_lo
v_add_co_u32 v4, vcc_lo, s6, v0
v_add_co_ci_u32_e32 v5, vcc_lo, s7, v1, vcc_lo
v_add_co_u32 v0, vcc_lo, s0, v0
global_load_b32 v2, v[2:3], off
global_load_b32 v3, v[4:5], off
v_add_co_ci_u32_e32 v1, vcc_lo, s1, v1, vcc_lo
s_waitcnt vmcnt(0)
v_add_nc_u32_e32 v2, v3, v2
global_store_b32 v[0:1], v2, off
.LBB0_2:
s_nop 0
s_sendmsg sendmsg(MSG_DEALLOC_VGPRS)
s_endpgm
.section .rodata,"a",@progbits
.p2align 6, 0x0
.amdhsa_kernel _Z9vectorAddPiS_S_i
.amdhsa_group_segment_fixed_size 0
.amdhsa_private_segment_fixed_size 0
.amdhsa_kernarg_size 288
.amdhsa_user_sgpr_count 15
.amdhsa_user_sgpr_dispatch_ptr 0
.amdhsa_user_sgpr_queue_ptr 0
.amdhsa_user_sgpr_kernarg_segment_ptr 1
.amdhsa_user_sgpr_dispatch_id 0
.amdhsa_user_sgpr_private_segment_size 0
.amdhsa_wavefront_size32 1
.amdhsa_uses_dynamic_stack 0
.amdhsa_enable_private_segment 0
.amdhsa_system_sgpr_workgroup_id_x 1
.amdhsa_system_sgpr_workgroup_id_y 0
.amdhsa_system_sgpr_workgroup_id_z 0
.amdhsa_system_sgpr_workgroup_info 0
.amdhsa_system_vgpr_workitem_id 0
.amdhsa_next_free_vgpr 6
.amdhsa_next_free_sgpr 16
.amdhsa_float_round_mode_32 0
.amdhsa_float_round_mode_16_64 0
.amdhsa_float_denorm_mode_32 3
.amdhsa_float_denorm_mode_16_64 3
.amdhsa_dx10_clamp 1
.amdhsa_ieee_mode 1
.amdhsa_fp16_overflow 0
.amdhsa_workgroup_processor_mode 1
.amdhsa_memory_ordered 1
.amdhsa_forward_progress 0
.amdhsa_shared_vgpr_count 0
.amdhsa_exception_fp_ieee_invalid_op 0
.amdhsa_exception_fp_denorm_src 0
.amdhsa_exception_fp_ieee_div_zero 0
.amdhsa_exception_fp_ieee_overflow 0
.amdhsa_exception_fp_ieee_underflow 0
.amdhsa_exception_fp_ieee_inexact 0
.amdhsa_exception_int_div_zero 0
.end_amdhsa_kernel
.text
.Lfunc_end0:
.size _Z9vectorAddPiS_S_i, .Lfunc_end0-_Z9vectorAddPiS_S_i
.section .AMDGPU.csdata,"",@progbits
.text
.p2alignl 7, 3214868480
.fill 96, 4, 3214868480
.type __hip_cuid_,@object
.section .bss,"aw",@nobits
.globl __hip_cuid_
__hip_cuid_:
.byte 0
.size __hip_cuid_, 1
.ident "AMD clang version 18.0.0git (https://github.com/RadeonOpenCompute/llvm-project roc-6.3.2 25012 e5bf7e55c91490b07c49d8960fa7983d864936c4)"
.section ".note.GNU-stack","",@progbits
.addrsig
.addrsig_sym __hip_cuid_
.amdgpu_metadata
---
amdhsa.kernels:
- .args:
- .address_space: global
.offset: 0
.size: 8
.value_kind: global_buffer
- .address_space: global
.offset: 8
.size: 8
.value_kind: global_buffer
- .address_space: global
.offset: 16
.size: 8
.value_kind: global_buffer
- .offset: 24
.size: 4
.value_kind: by_value
- .offset: 32
.size: 4
.value_kind: hidden_block_count_x
- .offset: 36
.size: 4
.value_kind: hidden_block_count_y
- .offset: 40
.size: 4
.value_kind: hidden_block_count_z
- .offset: 44
.size: 2
.value_kind: hidden_group_size_x
- .offset: 46
.size: 2
.value_kind: hidden_group_size_y
- .offset: 48
.size: 2
.value_kind: hidden_group_size_z
- .offset: 50
.size: 2
.value_kind: hidden_remainder_x
- .offset: 52
.size: 2
.value_kind: hidden_remainder_y
- .offset: 54
.size: 2
.value_kind: hidden_remainder_z
- .offset: 72
.size: 8
.value_kind: hidden_global_offset_x
- .offset: 80
.size: 8
.value_kind: hidden_global_offset_y
- .offset: 88
.size: 8
.value_kind: hidden_global_offset_z
- .offset: 96
.size: 2
.value_kind: hidden_grid_dims
.group_segment_fixed_size: 0
.kernarg_segment_align: 8
.kernarg_segment_size: 288
.language: OpenCL C
.language_version:
- 2
- 0
.max_flat_workgroup_size: 1024
.name: _Z9vectorAddPiS_S_i
.private_segment_fixed_size: 0
.sgpr_count: 18
.sgpr_spill_count: 0
.symbol: _Z9vectorAddPiS_S_i.kd
.uniform_work_group_size: 1
.uses_dynamic_stack: false
.vgpr_count: 6
.vgpr_spill_count: 0
.wavefront_size: 32
.workgroup_processor_mode: 1
amdhsa.target: amdgcn-amd-amdhsa--gfx1100
amdhsa.version:
- 1
- 2
...
.end_amdgpu_metadata |
You are a helpful coding assistant specialized in converting from CUDA host assembly to AMD host assembly. | .file "tmpxft_000a2ca6_00000000-6_vector_addition_unified.cudafe1.cpp"
.text
#APP
.globl _ZSt21ios_base_library_initv
#NO_APP
.type _ZL26__cudaUnregisterBinaryUtilv, @function
_ZL26__cudaUnregisterBinaryUtilv:
.LFB4289:
.cfi_startproc
endbr64
subq $8, %rsp
.cfi_def_cfa_offset 16
movq _ZL20__cudaFatCubinHandle(%rip), %rdi
call __cudaUnregisterFatBinary@PLT
addq $8, %rsp
.cfi_def_cfa_offset 8
ret
.cfi_endproc
.LFE4289:
.size _ZL26__cudaUnregisterBinaryUtilv, .-_ZL26__cudaUnregisterBinaryUtilv
.globl _Z33__device_stub__Z9vectorAddPiS_S_iPiS_S_i
.type _Z33__device_stub__Z9vectorAddPiS_S_iPiS_S_i, @function
_Z33__device_stub__Z9vectorAddPiS_S_iPiS_S_i:
.LFB4311:
.cfi_startproc
endbr64
subq $152, %rsp
.cfi_def_cfa_offset 160
movq %rdi, 24(%rsp)
movq %rsi, 16(%rsp)
movq %rdx, 8(%rsp)
movl %ecx, 4(%rsp)
movq %fs:40, %rax
movq %rax, 136(%rsp)
xorl %eax, %eax
leaq 24(%rsp), %rax
movq %rax, 96(%rsp)
leaq 16(%rsp), %rax
movq %rax, 104(%rsp)
leaq 8(%rsp), %rax
movq %rax, 112(%rsp)
leaq 4(%rsp), %rax
movq %rax, 120(%rsp)
movl $1, 48(%rsp)
movl $1, 52(%rsp)
movl $1, 56(%rsp)
movl $1, 60(%rsp)
movl $1, 64(%rsp)
movl $1, 68(%rsp)
leaq 40(%rsp), %rcx
leaq 32(%rsp), %rdx
leaq 60(%rsp), %rsi
leaq 48(%rsp), %rdi
call __cudaPopCallConfiguration@PLT
testl %eax, %eax
je .L7
.L3:
movq 136(%rsp), %rax
subq %fs:40, %rax
jne .L8
addq $152, %rsp
.cfi_remember_state
.cfi_def_cfa_offset 8
ret
.L7:
.cfi_restore_state
pushq 40(%rsp)
.cfi_def_cfa_offset 168
pushq 40(%rsp)
.cfi_def_cfa_offset 176
leaq 112(%rsp), %r9
movq 76(%rsp), %rcx
movl 84(%rsp), %r8d
movq 64(%rsp), %rsi
movl 72(%rsp), %edx
leaq _Z9vectorAddPiS_S_i(%rip), %rdi
call cudaLaunchKernel@PLT
addq $16, %rsp
.cfi_def_cfa_offset 160
jmp .L3
.L8:
call __stack_chk_fail@PLT
.cfi_endproc
.LFE4311:
.size _Z33__device_stub__Z9vectorAddPiS_S_iPiS_S_i, .-_Z33__device_stub__Z9vectorAddPiS_S_iPiS_S_i
.globl _Z9vectorAddPiS_S_i
.type _Z9vectorAddPiS_S_i, @function
_Z9vectorAddPiS_S_i:
.LFB4312:
.cfi_startproc
endbr64
subq $8, %rsp
.cfi_def_cfa_offset 16
call _Z33__device_stub__Z9vectorAddPiS_S_iPiS_S_i
addq $8, %rsp
.cfi_def_cfa_offset 8
ret
.cfi_endproc
.LFE4312:
.size _Z9vectorAddPiS_S_i, .-_Z9vectorAddPiS_S_i
.section .rodata.str1.1,"aMS",@progbits,1
.LC0:
.string "COMPLETED SUCCESSFULLY\n"
.text
.globl main
.type main, @function
main:
.LFB4286:
.cfi_startproc
endbr64
pushq %rbx
.cfi_def_cfa_offset 16
.cfi_offset 3, -16
subq $64, %rsp
.cfi_def_cfa_offset 80
movq %fs:40, %rax
movq %rax, 56(%rsp)
xorl %eax, %eax
leaq 8(%rsp), %rdi
movl $1, %edx
movl $262144, %esi
call cudaMallocManaged@PLT
leaq 16(%rsp), %rdi
movl $1, %edx
movl $262144, %esi
call cudaMallocManaged@PLT
leaq 24(%rsp), %rdi
movl $1, %edx
movl $262144, %esi
call cudaMallocManaged@PLT
leaq 4(%rsp), %rdi
call cudaGetDevice@PLT
movl %eax, 4(%rsp)
movl $-1, %ecx
movl $3, %edx
movl $262144, %esi
movq 8(%rsp), %rdi
call cudaMemAdvise@PLT
movl $-1, %ecx
movl $3, %edx
movl $262144, %esi
movq 16(%rsp), %rdi
call cudaMemAdvise@PLT
movl $0, %ecx
movl 4(%rsp), %edx
movl $262144, %esi
movq 24(%rsp), %rdi
call cudaMemPrefetchAsync@PLT
movl $0, %ebx
.L12:
call rand@PLT
movslq %eax, %rdx
imulq $1374389535, %rdx, %rdx
sarq $37, %rdx
movl %eax, %ecx
sarl $31, %ecx
subl %ecx, %edx
imull $100, %edx, %edx
subl %edx, %eax
movq 8(%rsp), %rdx
movl %eax, (%rdx,%rbx)
call rand@PLT
movslq %eax, %rdx
imulq $1374389535, %rdx, %rdx
sarq $37, %rdx
movl %eax, %ecx
sarl $31, %ecx
subl %ecx, %edx
imull $100, %edx, %edx
subl %edx, %eax
movq 16(%rsp), %rdx
movl %eax, (%rdx,%rbx)
addq $4, %rbx
cmpq $262144, %rbx
jne .L12
movl 4(%rsp), %ecx
movl $1, %edx
movl $262144, %esi
movq 8(%rsp), %rdi
call cudaMemAdvise@PLT
movl 4(%rsp), %ecx
movl $1, %edx
movl $262144, %esi
movq 16(%rsp), %rdi
call cudaMemAdvise@PLT
movl $0, %ecx
movl 4(%rsp), %edx
movl $262144, %esi
movq 8(%rsp), %rdi
call cudaMemPrefetchAsync@PLT
movl $0, %ecx
movl 4(%rsp), %edx
movl $262144, %esi
movq 16(%rsp), %rdi
call cudaMemPrefetchAsync@PLT
movl $1024, 44(%rsp)
movl $1, 48(%rsp)
movl $64, 32(%rsp)
movl $1, 36(%rsp)
movl $0, %r9d
movl $0, %r8d
movq 44(%rsp), %rdx
movl $1, %ecx
movq 32(%rsp), %rdi
movl $1, %esi
call __cudaPushCallConfiguration@PLT
testl %eax, %eax
je .L19
.L13:
call cudaDeviceSynchronize@PLT
movl $0, %ecx
movl $-1, %edx
movl $262144, %esi
movq 8(%rsp), %rdi
call cudaMemPrefetchAsync@PLT
movl $0, %ecx
movl $-1, %edx
movl $262144, %esi
movq 16(%rsp), %rdi
call cudaMemPrefetchAsync@PLT
movl $0, %ecx
movl $-1, %edx
movl $262144, %esi
movq 24(%rsp), %rdi
call cudaMemPrefetchAsync@PLT
movl $65536, %eax
.L14:
subl $1, %eax
jne .L14
movq 8(%rsp), %rdi
call cudaFree@PLT
movq 16(%rsp), %rdi
call cudaFree@PLT
movq 24(%rsp), %rdi
call cudaFree@PLT
leaq .LC0(%rip), %rsi
leaq _ZSt4cout(%rip), %rdi
call _ZStlsISt11char_traitsIcEERSt13basic_ostreamIcT_ES5_PKc@PLT
movq 56(%rsp), %rax
subq %fs:40, %rax
jne .L20
movl $0, %eax
addq $64, %rsp
.cfi_remember_state
.cfi_def_cfa_offset 16
popq %rbx
.cfi_def_cfa_offset 8
ret
.L19:
.cfi_restore_state
movl $65536, %ecx
movq 24(%rsp), %rdx
movq 16(%rsp), %rsi
movq 8(%rsp), %rdi
call _Z33__device_stub__Z9vectorAddPiS_S_iPiS_S_i
jmp .L13
.L20:
call __stack_chk_fail@PLT
.cfi_endproc
.LFE4286:
.size main, .-main
.section .rodata.str1.1
.LC1:
.string "_Z9vectorAddPiS_S_i"
.text
.type _ZL24__sti____cudaRegisterAllv, @function
_ZL24__sti____cudaRegisterAllv:
.LFB4314:
.cfi_startproc
endbr64
subq $8, %rsp
.cfi_def_cfa_offset 16
leaq _ZL15__fatDeviceText(%rip), %rdi
call __cudaRegisterFatBinary@PLT
movq %rax, %rdi
movq %rax, _ZL20__cudaFatCubinHandle(%rip)
pushq $0
.cfi_def_cfa_offset 24
pushq $0
.cfi_def_cfa_offset 32
pushq $0
.cfi_def_cfa_offset 40
pushq $0
.cfi_def_cfa_offset 48
movl $0, %r9d
movl $-1, %r8d
leaq .LC1(%rip), %rdx
movq %rdx, %rcx
leaq _Z9vectorAddPiS_S_i(%rip), %rsi
call __cudaRegisterFunction@PLT
addq $32, %rsp
.cfi_def_cfa_offset 16
movq _ZL20__cudaFatCubinHandle(%rip), %rdi
call __cudaRegisterFatBinaryEnd@PLT
leaq _ZL26__cudaUnregisterBinaryUtilv(%rip), %rdi
call atexit@PLT
addq $8, %rsp
.cfi_def_cfa_offset 8
ret
.cfi_endproc
.LFE4314:
.size _ZL24__sti____cudaRegisterAllv, .-_ZL24__sti____cudaRegisterAllv
.section .init_array,"aw"
.align 8
.quad _ZL24__sti____cudaRegisterAllv
.section .nvFatBinSegment,"aw"
.align 8
.type _ZL15__fatDeviceText, @object
.size _ZL15__fatDeviceText, 24
_ZL15__fatDeviceText:
.long 1180844977
.long 1
.quad fatbinData
.quad 0
.local _ZL20__cudaFatCubinHandle
.comm _ZL20__cudaFatCubinHandle,8,8
.ident "GCC: (Ubuntu 13.3.0-6ubuntu2~24.04) 13.3.0"
.section .note.GNU-stack,"",@progbits
.section .note.gnu.property,"a"
.align 8
.long 1f - 0f
.long 4f - 1f
.long 5
0:
.string "GNU"
1:
.align 8
.long 0xc0000002
.long 3f - 2f
2:
.long 0x3
3:
.align 8
4: | .text
.file "vector_addition_unified.hip"
# Start of file scope inline assembly
.globl _ZSt21ios_base_library_initv
# End of file scope inline assembly
.globl _Z24__device_stub__vectorAddPiS_S_i # -- Begin function _Z24__device_stub__vectorAddPiS_S_i
.p2align 4, 0x90
.type _Z24__device_stub__vectorAddPiS_S_i,@function
_Z24__device_stub__vectorAddPiS_S_i: # @_Z24__device_stub__vectorAddPiS_S_i
.cfi_startproc
# %bb.0:
subq $120, %rsp
.cfi_def_cfa_offset 128
movq %rdi, 72(%rsp)
movq %rsi, 64(%rsp)
movq %rdx, 56(%rsp)
movl %ecx, 4(%rsp)
leaq 72(%rsp), %rax
movq %rax, 80(%rsp)
leaq 64(%rsp), %rax
movq %rax, 88(%rsp)
leaq 56(%rsp), %rax
movq %rax, 96(%rsp)
leaq 4(%rsp), %rax
movq %rax, 104(%rsp)
leaq 40(%rsp), %rdi
leaq 24(%rsp), %rsi
leaq 16(%rsp), %rdx
leaq 8(%rsp), %rcx
callq __hipPopCallConfiguration
movq 40(%rsp), %rsi
movl 48(%rsp), %edx
movq 24(%rsp), %rcx
movl 32(%rsp), %r8d
leaq 80(%rsp), %r9
movl $_Z9vectorAddPiS_S_i, %edi
pushq 8(%rsp)
.cfi_adjust_cfa_offset 8
pushq 24(%rsp)
.cfi_adjust_cfa_offset 8
callq hipLaunchKernel
addq $136, %rsp
.cfi_adjust_cfa_offset -136
retq
.Lfunc_end0:
.size _Z24__device_stub__vectorAddPiS_S_i, .Lfunc_end0-_Z24__device_stub__vectorAddPiS_S_i
.cfi_endproc
# -- End function
.globl main # -- Begin function main
.p2align 4, 0x90
.type main,@function
main: # @main
.cfi_startproc
# %bb.0:
pushq %rbx
.cfi_def_cfa_offset 16
subq $144, %rsp
.cfi_def_cfa_offset 160
.cfi_offset %rbx, -16
leaq 16(%rsp), %rdi
movl $262144, %esi # imm = 0x40000
movl $1, %edx
callq hipMallocManaged
leaq 8(%rsp), %rdi
movl $262144, %esi # imm = 0x40000
movl $1, %edx
callq hipMallocManaged
leaq 24(%rsp), %rdi
movl $262144, %esi # imm = 0x40000
movl $1, %edx
callq hipMallocManaged
leaq 4(%rsp), %rdi
callq hipGetDevice
movl %eax, 4(%rsp)
movq 16(%rsp), %rdi
movl $262144, %esi # imm = 0x40000
movl $3, %edx
movl $-1, %ecx
callq hipMemAdvise
movq 8(%rsp), %rdi
movl $262144, %esi # imm = 0x40000
movl $3, %edx
movl $-1, %ecx
callq hipMemAdvise
movq 24(%rsp), %rdi
movl 4(%rsp), %edx
xorl %ebx, %ebx
movl $262144, %esi # imm = 0x40000
xorl %ecx, %ecx
callq hipMemPrefetchAsync
.p2align 4, 0x90
.LBB1_1: # =>This Inner Loop Header: Depth=1
callq rand
cltq
imulq $1374389535, %rax, %rcx # imm = 0x51EB851F
movq %rcx, %rdx
shrq $63, %rdx
sarq $37, %rcx
addl %edx, %ecx
imull $100, %ecx, %ecx
subl %ecx, %eax
movq 16(%rsp), %rcx
movl %eax, (%rcx,%rbx,4)
callq rand
cltq
imulq $1374389535, %rax, %rcx # imm = 0x51EB851F
movq %rcx, %rdx
shrq $63, %rdx
sarq $37, %rcx
addl %edx, %ecx
imull $100, %ecx, %ecx
subl %ecx, %eax
movq 8(%rsp), %rcx
movl %eax, (%rcx,%rbx,4)
incq %rbx
cmpq $65536, %rbx # imm = 0x10000
jne .LBB1_1
# %bb.2:
movq 16(%rsp), %rdi
movl 4(%rsp), %ecx
movl $262144, %esi # imm = 0x40000
movl $1, %edx
callq hipMemAdvise
movq 8(%rsp), %rdi
movl 4(%rsp), %ecx
movl $262144, %esi # imm = 0x40000
movl $1, %edx
callq hipMemAdvise
movq 16(%rsp), %rdi
movl 4(%rsp), %edx
movl $262144, %esi # imm = 0x40000
xorl %ecx, %ecx
callq hipMemPrefetchAsync
movq 8(%rsp), %rdi
movl 4(%rsp), %edx
movl $262144, %esi # imm = 0x40000
xorl %ecx, %ecx
callq hipMemPrefetchAsync
movabsq $4294967360, %rdi # imm = 0x100000040
leaq 960(%rdi), %rdx
movl $1, %esi
movl $1, %ecx
xorl %r8d, %r8d
xorl %r9d, %r9d
callq __hipPushCallConfiguration
testl %eax, %eax
jne .LBB1_4
# %bb.3:
movq 16(%rsp), %rax
movq 8(%rsp), %rcx
movq 24(%rsp), %rdx
movq %rax, 104(%rsp)
movq %rcx, 96(%rsp)
movq %rdx, 88(%rsp)
movl $65536, 36(%rsp) # imm = 0x10000
leaq 104(%rsp), %rax
movq %rax, 112(%rsp)
leaq 96(%rsp), %rax
movq %rax, 120(%rsp)
leaq 88(%rsp), %rax
movq %rax, 128(%rsp)
leaq 36(%rsp), %rax
movq %rax, 136(%rsp)
leaq 72(%rsp), %rdi
leaq 56(%rsp), %rsi
leaq 48(%rsp), %rdx
leaq 40(%rsp), %rcx
callq __hipPopCallConfiguration
movq 72(%rsp), %rsi
movl 80(%rsp), %edx
movq 56(%rsp), %rcx
movl 64(%rsp), %r8d
leaq 112(%rsp), %r9
movl $_Z9vectorAddPiS_S_i, %edi
pushq 40(%rsp)
.cfi_adjust_cfa_offset 8
pushq 56(%rsp)
.cfi_adjust_cfa_offset 8
callq hipLaunchKernel
addq $16, %rsp
.cfi_adjust_cfa_offset -16
.LBB1_4:
callq hipDeviceSynchronize
movq 16(%rsp), %rdi
movl $262144, %esi # imm = 0x40000
movl $-1, %edx
xorl %ecx, %ecx
callq hipMemPrefetchAsync
movq 8(%rsp), %rdi
movl $262144, %esi # imm = 0x40000
movl $-1, %edx
xorl %ecx, %ecx
callq hipMemPrefetchAsync
movq 24(%rsp), %rdi
movl $262144, %esi # imm = 0x40000
movl $-1, %edx
xorl %ecx, %ecx
callq hipMemPrefetchAsync
movq 16(%rsp), %rdi
callq hipFree
movq 8(%rsp), %rdi
callq hipFree
movq 24(%rsp), %rdi
callq hipFree
movl $_ZSt4cout, %edi
movl $.L.str, %esi
movl $23, %edx
callq _ZSt16__ostream_insertIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_PKS3_l
xorl %eax, %eax
addq $144, %rsp
.cfi_def_cfa_offset 16
popq %rbx
.cfi_def_cfa_offset 8
retq
.Lfunc_end1:
.size main, .Lfunc_end1-main
.cfi_endproc
# -- End function
.p2align 4, 0x90 # -- Begin function __hip_module_ctor
.type __hip_module_ctor,@function
__hip_module_ctor: # @__hip_module_ctor
.cfi_startproc
# %bb.0:
subq $40, %rsp
.cfi_def_cfa_offset 48
cmpq $0, __hip_gpubin_handle(%rip)
jne .LBB2_2
# %bb.1:
movl $__hip_fatbin_wrapper, %edi
callq __hipRegisterFatBinary
movq %rax, __hip_gpubin_handle(%rip)
.LBB2_2:
movq __hip_gpubin_handle(%rip), %rdi
xorps %xmm0, %xmm0
movups %xmm0, 16(%rsp)
movups %xmm0, (%rsp)
movl $_Z9vectorAddPiS_S_i, %esi
movl $.L__unnamed_1, %edx
movl $.L__unnamed_1, %ecx
movl $-1, %r8d
xorl %r9d, %r9d
callq __hipRegisterFunction
movl $__hip_module_dtor, %edi
addq $40, %rsp
.cfi_def_cfa_offset 8
jmp atexit # TAILCALL
.Lfunc_end2:
.size __hip_module_ctor, .Lfunc_end2-__hip_module_ctor
.cfi_endproc
# -- End function
.p2align 4, 0x90 # -- Begin function __hip_module_dtor
.type __hip_module_dtor,@function
__hip_module_dtor: # @__hip_module_dtor
.cfi_startproc
# %bb.0:
movq __hip_gpubin_handle(%rip), %rdi
testq %rdi, %rdi
je .LBB3_2
# %bb.1:
pushq %rax
.cfi_def_cfa_offset 16
callq __hipUnregisterFatBinary
movq $0, __hip_gpubin_handle(%rip)
addq $8, %rsp
.cfi_def_cfa_offset 8
.LBB3_2:
retq
.Lfunc_end3:
.size __hip_module_dtor, .Lfunc_end3-__hip_module_dtor
.cfi_endproc
# -- End function
.type _Z9vectorAddPiS_S_i,@object # @_Z9vectorAddPiS_S_i
.section .rodata,"a",@progbits
.globl _Z9vectorAddPiS_S_i
.p2align 3, 0x0
_Z9vectorAddPiS_S_i:
.quad _Z24__device_stub__vectorAddPiS_S_i
.size _Z9vectorAddPiS_S_i, 8
.type .L.str,@object # @.str
.section .rodata.str1.1,"aMS",@progbits,1
.L.str:
.asciz "COMPLETED SUCCESSFULLY\n"
.size .L.str, 24
.type .L__unnamed_1,@object # @0
.L__unnamed_1:
.asciz "_Z9vectorAddPiS_S_i"
.size .L__unnamed_1, 20
.type __hip_fatbin_wrapper,@object # @__hip_fatbin_wrapper
.section .hipFatBinSegment,"a",@progbits
.p2align 3, 0x0
__hip_fatbin_wrapper:
.long 1212764230 # 0x48495046
.long 1 # 0x1
.quad __hip_fatbin
.quad 0
.size __hip_fatbin_wrapper, 24
.type __hip_gpubin_handle,@object # @__hip_gpubin_handle
.local __hip_gpubin_handle
.comm __hip_gpubin_handle,8,8
.section .init_array,"aw",@init_array
.p2align 3, 0x0
.quad __hip_module_ctor
.type __hip_cuid_,@object # @__hip_cuid_
.bss
.globl __hip_cuid_
__hip_cuid_:
.byte 0 # 0x0
.size __hip_cuid_, 1
.section ".linker-options","e",@llvm_linker_options
.ident "AMD clang version 18.0.0git (https://github.com/RadeonOpenCompute/llvm-project roc-6.3.2 25012 e5bf7e55c91490b07c49d8960fa7983d864936c4)"
.section ".note.GNU-stack","",@progbits
.addrsig
.addrsig_sym _Z24__device_stub__vectorAddPiS_S_i
.addrsig_sym __hip_module_ctor
.addrsig_sym __hip_module_dtor
.addrsig_sym _Z9vectorAddPiS_S_i
.addrsig_sym _ZSt4cout
.addrsig_sym __hip_fatbin
.addrsig_sym __hip_fatbin_wrapper
.addrsig_sym __hip_cuid_ |
You are a helpful coding assistant specialized in converting CUDA source code to CUDA device assembly. | /**
* André Luiz Abdalla Silveira 8030353
* Mauricio Luiz Cardoso 6796479
*
* Esse programa escrito em CUDA visa criar um algoritmo que gera uma redução
* de matrizes. Cada matriz é representada por um vetor e todos estão
* reunidos num vetor de vetores. A ideia é fazer uma função que faz uma
* comparação entre vetores fazendo o mínimo de operações
*/
#include <stdio.h>
#include <stdlib.h>
#define E 9 // qtde de elementos de cada matriz
#define linhaElementos 3 // quantidade de elementos da linha
int numMatrizes;
__global__ void os_menores(int *d_matrizes, int posLimite, int jump) {
int indexIni = threadIdx.x + blockIdx.x * blockDim.x;
for(int i = indexIni; i < posLimite; i += jump)
if(d_matrizes[indexIni] > d_matrizes[i])
d_matrizes[indexIni] = d_matrizes[i];
}
/* Imprime todas as matrizes de dimensão ExE contidas em matrizes*/
void leitura (int *matrizes, int numMats) {
int i, k;
for (i = 0; i < numMats * linhaElementos; i++) {
for (k = 0; k < linhaElementos; k++)
printf("%d\t", *(matrizes++));
printf("\n");
if((i+1) % linhaElementos == 0)
printf("********************\n");
}
}
void menorMatriz(int *d_matrizes, int numMats) {
if(numMats > 1) {
int numBlocks = 0;
int numMatResto;
int jump = 0;
int numThreads = 0;
int posLimite;
// carga de tamanho de um bloco
if(numMats <= E * 10) {
numMatResto = 1;
numThreads = E;
numBlocks = 1;
}
else {
const int numMatThreads = 3; // 3 foi escolhido para que numthreads seja maior multiplo de E(tamanho de cada matriz) e menor que um warp(32)
numThreads = E * numMatThreads;
int espacoTrabThre = 10 * numThreads; //cada thread devera comparar ate E * 10 matrizes
numBlocks = E * numMats / espacoTrabThre;
numMatResto = numBlocks * numMatThreads;
}
posLimite = numMats * E;
jump = numBlocks * numThreads;
os_menores<<<numBlocks, numThreads>>>(d_matrizes, posLimite, jump);
cudaDeviceSynchronize();
menorMatriz(d_matrizes, numMatResto);
}
}
void encontraMenorMatriz(int* matrizes) {
int tam = numMatrizes * E * sizeof(int);
int *d_matrizes;
// Alloc space for device copies of a, b, c
cudaMalloc((void **) &d_matrizes, tam);
// Copy inputs to device
cudaMemcpy(d_matrizes, matrizes, tam, cudaMemcpyHostToDevice);
// encontra menor matriz
menorMatriz(d_matrizes, numMatrizes);
// Copy result back to host
cudaMemcpy(matrizes, d_matrizes, tam, cudaMemcpyDeviceToHost);
cudaFree(d_matrizes);
}
/* Le o arquivo arq que contem matrizes no formato declarado
no enunciado e retorna um vetor com todas matrizes lidas*/
int* alocaMatrizesArquivo(FILE *arq){
char asteriscos[10];
int *matrizes, *matrizesAux;
fscanf(arq, "%d", &numMatrizes);
matrizes = (int *) malloc(E * numMatrizes * sizeof(int));
matrizesAux = matrizes;
for(int i = 0; i < numMatrizes; i++) {
fscanf(arq, "%s", asteriscos); //pula a linha de asteriscos
for(int j = 0; j < E; j++)
fscanf(arq, "%d", matrizesAux++);
}
return matrizes;
}
int main (int argc, char* argv[]) {
if(argc != 2) {
printf("Argumento do programa: nome do arquivo\n");
}
else {
FILE *entrada;
entrada = fopen(argv[1], "r");
if (entrada == NULL) {
printf("Deu ruim pra abrir o arquivo\n");
return EXIT_FAILURE;
}
int *matrizes = alocaMatrizesArquivo(entrada);
fclose(entrada);
encontraMenorMatriz(matrizes);
leitura(matrizes, 1);
// leitura(get_min(mat, 0, qtde));
free(matrizes);
return EXIT_SUCCESS;
}
} | code for sm_80
Function : _Z10os_menoresPiii
.headerflags @"EF_CUDA_TEXMODE_UNIFIED EF_CUDA_64BIT_ADDRESS EF_CUDA_SM80 EF_CUDA_VIRTUAL_SM(EF_CUDA_SM80)"
/*0000*/ IMAD.MOV.U32 R1, RZ, RZ, c[0x0][0x28] ; /* 0x00000a00ff017624 */
/* 0x000fe400078e00ff */
/*0010*/ S2R R0, SR_CTAID.X ; /* 0x0000000000007919 */
/* 0x000e280000002500 */
/*0020*/ S2R R3, SR_TID.X ; /* 0x0000000000037919 */
/* 0x000e240000002100 */
/*0030*/ IMAD R0, R0, c[0x0][0x0], R3 ; /* 0x0000000000007a24 */
/* 0x001fca00078e0203 */
/*0040*/ ISETP.GE.AND P0, PT, R0, c[0x0][0x168], PT ; /* 0x00005a0000007a0c */
/* 0x000fda0003f06270 */
/*0050*/ @P0 EXIT ; /* 0x000000000000094d */
/* 0x000fea0003800000 */
/*0060*/ I2F.U32.RP R5, c[0x0][0x16c] ; /* 0x00005b0000057b06 */
/* 0x000e220000209000 */
/*0070*/ LOP3.LUT R4, RZ, R0, RZ, 0x33, !PT ; /* 0x00000000ff047212 */
/* 0x000fe200078e33ff */
/*0080*/ ULDC.64 UR4, c[0x0][0x118] ; /* 0x0000460000047ab9 */
/* 0x000fe20000000a00 */
/*0090*/ ISETP.NE.U32.AND P2, PT, RZ, c[0x0][0x16c], PT ; /* 0x00005b00ff007a0c */
/* 0x000fe20003f45070 */
/*00a0*/ BSSY B0, 0x310 ; /* 0x0000026000007945 */
/* 0x000fe20003800000 */
/*00b0*/ IADD3 R4, R4, c[0x0][0x168], RZ ; /* 0x00005a0004047a10 */
/* 0x000fc60007ffe0ff */
/*00c0*/ MUFU.RCP R5, R5 ; /* 0x0000000500057308 */
/* 0x001e240000001000 */
/*00d0*/ IADD3 R2, R5, 0xffffffe, RZ ; /* 0x0ffffffe05027810 */
/* 0x001fcc0007ffe0ff */
/*00e0*/ F2I.FTZ.U32.TRUNC.NTZ R3, R2 ; /* 0x0000000200037305 */
/* 0x000064000021f000 */
/*00f0*/ IMAD.MOV.U32 R2, RZ, RZ, RZ ; /* 0x000000ffff027224 */
/* 0x001fe400078e00ff */
/*0100*/ IMAD.MOV R7, RZ, RZ, -R3 ; /* 0x000000ffff077224 */
/* 0x002fc800078e0a03 */
/*0110*/ IMAD R7, R7, c[0x0][0x16c], RZ ; /* 0x00005b0007077a24 */
/* 0x000fc800078e02ff */
/*0120*/ IMAD.HI.U32 R3, R3, R7, R2 ; /* 0x0000000703037227 */
/* 0x000fcc00078e0002 */
/*0130*/ IMAD.HI.U32 R3, R3, R4, RZ ; /* 0x0000000403037227 */
/* 0x000fca00078e00ff */
/*0140*/ IADD3 R5, -R3, RZ, RZ ; /* 0x000000ff03057210 */
/* 0x000fca0007ffe1ff */
/*0150*/ IMAD R4, R5, c[0x0][0x16c], R4 ; /* 0x00005b0005047a24 */
/* 0x000fca00078e0204 */
/*0160*/ ISETP.GE.U32.AND P0, PT, R4, c[0x0][0x16c], PT ; /* 0x00005b0004007a0c */
/* 0x000fda0003f06070 */
/*0170*/ @P0 IADD3 R4, R4, -c[0x0][0x16c], RZ ; /* 0x80005b0004040a10 */
/* 0x000fe40007ffe0ff */
/*0180*/ @P0 IADD3 R3, R3, 0x1, RZ ; /* 0x0000000103030810 */
/* 0x000fe40007ffe0ff */
/*0190*/ ISETP.GE.U32.AND P1, PT, R4, c[0x0][0x16c], PT ; /* 0x00005b0004007a0c */
/* 0x000fda0003f26070 */
/*01a0*/ @P1 IADD3 R3, R3, 0x1, RZ ; /* 0x0000000103031810 */
/* 0x000fe40007ffe0ff */
/*01b0*/ @!P2 LOP3.LUT R3, RZ, c[0x0][0x16c], RZ, 0x33, !PT ; /* 0x00005b00ff03aa12 */
/* 0x000fc800078e33ff */
/*01c0*/ IADD3 R2, R3.reuse, 0x1, RZ ; /* 0x0000000103027810 */
/* 0x040fe40007ffe0ff */
/*01d0*/ ISETP.GE.U32.AND P0, PT, R3, 0x3, PT ; /* 0x000000030300780c */
/* 0x000fe20003f06070 */
/*01e0*/ IMAD.MOV.U32 R3, RZ, RZ, 0x4 ; /* 0x00000004ff037424 */
/* 0x000fe200078e00ff */
/*01f0*/ LOP3.LUT P1, R4, R2, 0x3, RZ, 0xc0, !PT ; /* 0x0000000302047812 */
/* 0x000fc6000782c0ff */
/*0200*/ IMAD.WIDE R2, R0, R3, c[0x0][0x160] ; /* 0x0000580000027625 */
/* 0x000fd400078e0203 */
/*0210*/ @!P1 BRA 0x300 ; /* 0x000000e000009947 */
/* 0x000fea0003800000 */
/*0220*/ LDG.E R7, [R2.64] ; /* 0x0000000402077981 */
/* 0x000162000c1e1900 */
/*0230*/ IMAD.MOV.U32 R6, RZ, RZ, R4 ; /* 0x000000ffff067224 */
/* 0x000fe200078e0004 */
/*0240*/ MOV R5, R3 ; /* 0x0000000300057202 */
/* 0x000fe20000000f00 */
/*0250*/ IMAD.MOV.U32 R4, RZ, RZ, R2 ; /* 0x000000ffff047224 */
/* 0x000fca00078e0002 */
/*0260*/ LDG.E R8, [R4.64] ; /* 0x0000000404087981 */
/* 0x0022a2000c1e1900 */
/*0270*/ IADD3 R6, R6, -0x1, RZ ; /* 0xffffffff06067810 */
/* 0x000fe20007ffe0ff */
/*0280*/ IMAD.MOV.U32 R9, RZ, RZ, 0x4 ; /* 0x00000004ff097424 */
/* 0x000fe200078e00ff */
/*0290*/ IADD3 R0, R0, c[0x0][0x16c], RZ ; /* 0x00005b0000007a10 */
/* 0x000fe40007ffe0ff */
/*02a0*/ ISETP.NE.AND P2, PT, R6, RZ, PT ; /* 0x000000ff0600720c */
/* 0x000fe20003f45270 */
/*02b0*/ IMAD.WIDE R4, R9, c[0x0][0x16c], R4 ; /* 0x00005b0009047a25 */
/* 0x002fe200078e0204 */
/*02c0*/ ISETP.GT.AND P1, PT, R7, R8, PT ; /* 0x000000080700720c */
/* 0x024fda0003f24270 */
/*02d0*/ @P1 STG.E [R2.64], R8 ; /* 0x0000000802001986 */
/* 0x0003e2000c101904 */
/*02e0*/ @P1 IMAD.MOV.U32 R7, RZ, RZ, R8 ; /* 0x000000ffff071224 */
/* 0x000fe200078e0008 */
/*02f0*/ @P2 BRA 0x260 ; /* 0xffffff6000002947 */
/* 0x000fea000383ffff */
/*0300*/ BSYNC B0 ; /* 0x0000000000007941 */
/* 0x000fea0003800000 */
/*0310*/ @!P0 EXIT ; /* 0x000000000000894d */
/* 0x000fea0003800000 */
/*0320*/ LDG.E R10, [R2.64] ; /* 0x00000004020a7981 */
/* 0x000564000c1e1900 */
/*0330*/ IMAD.MOV.U32 R17, RZ, RZ, 0x4 ; /* 0x00000004ff117424 */
/* 0x000fc800078e00ff */
/*0340*/ IMAD.WIDE R4, R0, R17, c[0x0][0x160] ; /* 0x0000580000047625 */
/* 0x002fca00078e0211 */
/*0350*/ LDG.E R11, [R4.64] ; /* 0x00000004040b7981 */
/* 0x000ee2000c1e1900 */
/*0360*/ IMAD.WIDE R6, R17, c[0x0][0x16c], R4 ; /* 0x00005b0011067a25 */
/* 0x000fe200078e0204 */
/*0370*/ ISETP.GT.AND P0, PT, R10, R11, PT ; /* 0x0000000b0a00720c */
/* 0x028fda0003f04270 */
/*0380*/ @P0 STG.E [R2.64], R11 ; /* 0x0000000b02000986 */
/* 0x0007e8000c101904 */
/*0390*/ LDG.E R13, [R6.64] ; /* 0x00000004060d7981 */
/* 0x000f22000c1e1900 */
/*03a0*/ @P0 MOV R10, R11 ; /* 0x0000000b000a0202 */
/* 0x000fe20000000f00 */
/*03b0*/ IMAD.WIDE R8, R17, c[0x0][0x16c], R6 ; /* 0x00005b0011087a25 */
/* 0x002fc600078e0206 */
/*03c0*/ ISETP.GT.AND P0, PT, R10, R13, PT ; /* 0x0000000d0a00720c */
/* 0x010fda0003f04270 */
/*03d0*/ @P0 STG.E [R2.64], R13 ; /* 0x0000000d02000986 */
/* 0x0003e8000c101904 */
/*03e0*/ LDG.E R15, [R8.64] ; /* 0x00000004080f7981 */
/* 0x000f22000c1e1900 */
/*03f0*/ @P0 IMAD.MOV.U32 R10, RZ, RZ, R13 ; /* 0x000000ffff0a0224 */
/* 0x000fe400078e000d */
/*0400*/ IMAD.WIDE R4, R17, c[0x0][0x16c], R8 ; /* 0x00005b0011047a25 */
/* 0x000fc600078e0208 */
/*0410*/ ISETP.GT.AND P0, PT, R10, R15, PT ; /* 0x0000000f0a00720c */
/* 0x010fda0003f04270 */
/*0420*/ @P0 STG.E [R2.64], R15 ; /* 0x0000000f02000986 */
/* 0x0003e8000c101904 */
/*0430*/ LDG.E R5, [R4.64] ; /* 0x0000000404057981 */
/* 0x000f22000c1e1900 */
/*0440*/ @P0 IMAD.MOV.U32 R10, RZ, RZ, R15 ; /* 0x000000ffff0a0224 */
/* 0x000fe200078e000f */
/*0450*/ MOV R7, c[0x0][0x16c] ; /* 0x00005b0000077a02 */
/* 0x000fe20000000f00 */
/*0460*/ IMAD.MOV.U32 R11, RZ, RZ, c[0x0][0x16c] ; /* 0x00005b00ff0b7624 */
/* 0x008fc800078e00ff */
/*0470*/ IMAD R0, R7, 0x2, R0 ; /* 0x0000000207007824 */
/* 0x000fca00078e0200 */
/*0480*/ LEA R0, R11, R0, 0x1 ; /* 0x000000000b007211 */
/* 0x000fc800078e08ff */
/*0490*/ ISETP.GE.AND P1, PT, R0, c[0x0][0x168], PT ; /* 0x00005a0000007a0c */
/* 0x000fe40003f26270 */
/*04a0*/ ISETP.GT.AND P0, PT, R10, R5, PT ; /* 0x000000050a00720c */
/* 0x010fda0003f04270 */
/*04b0*/ @P0 STG.E [R2.64], R5 ; /* 0x0000000502000986 */
/* 0x0003e2000c101904 */
/*04c0*/ @P0 IMAD.MOV.U32 R10, RZ, RZ, R5 ; /* 0x000000ffff0a0224 */
/* 0x000fe200078e0005 */
/*04d0*/ @!P1 BRA 0x330 ; /* 0xfffffe5000009947 */
/* 0x000fea000383ffff */
/*04e0*/ EXIT ; /* 0x000000000000794d */
/* 0x000fea0003800000 */
/*04f0*/ BRA 0x4f0; /* 0xfffffff000007947 */
/* 0x000fc0000383ffff */
/*0500*/ NOP; /* 0x0000000000007918 */
/* 0x000fc00000000000 */
/*0510*/ NOP; /* 0x0000000000007918 */
/* 0x000fc00000000000 */
/*0520*/ NOP; /* 0x0000000000007918 */
/* 0x000fc00000000000 */
/*0530*/ NOP; /* 0x0000000000007918 */
/* 0x000fc00000000000 */
/*0540*/ NOP; /* 0x0000000000007918 */
/* 0x000fc00000000000 */
/*0550*/ NOP; /* 0x0000000000007918 */
/* 0x000fc00000000000 */
/*0560*/ NOP; /* 0x0000000000007918 */
/* 0x000fc00000000000 */
/*0570*/ NOP; /* 0x0000000000007918 */
/* 0x000fc00000000000 */
.......... |
You are a helpful coding assistant specialized in converting CUDA source code to CUDA host assembly. | /**
* André Luiz Abdalla Silveira 8030353
* Mauricio Luiz Cardoso 6796479
*
* Esse programa escrito em CUDA visa criar um algoritmo que gera uma redução
* de matrizes. Cada matriz é representada por um vetor e todos estão
* reunidos num vetor de vetores. A ideia é fazer uma função que faz uma
* comparação entre vetores fazendo o mínimo de operações
*/
#include <stdio.h>
#include <stdlib.h>
#define E 9 // qtde de elementos de cada matriz
#define linhaElementos 3 // quantidade de elementos da linha
int numMatrizes;
__global__ void os_menores(int *d_matrizes, int posLimite, int jump) {
int indexIni = threadIdx.x + blockIdx.x * blockDim.x;
for(int i = indexIni; i < posLimite; i += jump)
if(d_matrizes[indexIni] > d_matrizes[i])
d_matrizes[indexIni] = d_matrizes[i];
}
/* Imprime todas as matrizes de dimensão ExE contidas em matrizes*/
void leitura (int *matrizes, int numMats) {
int i, k;
for (i = 0; i < numMats * linhaElementos; i++) {
for (k = 0; k < linhaElementos; k++)
printf("%d\t", *(matrizes++));
printf("\n");
if((i+1) % linhaElementos == 0)
printf("********************\n");
}
}
void menorMatriz(int *d_matrizes, int numMats) {
if(numMats > 1) {
int numBlocks = 0;
int numMatResto;
int jump = 0;
int numThreads = 0;
int posLimite;
// carga de tamanho de um bloco
if(numMats <= E * 10) {
numMatResto = 1;
numThreads = E;
numBlocks = 1;
}
else {
const int numMatThreads = 3; // 3 foi escolhido para que numthreads seja maior multiplo de E(tamanho de cada matriz) e menor que um warp(32)
numThreads = E * numMatThreads;
int espacoTrabThre = 10 * numThreads; //cada thread devera comparar ate E * 10 matrizes
numBlocks = E * numMats / espacoTrabThre;
numMatResto = numBlocks * numMatThreads;
}
posLimite = numMats * E;
jump = numBlocks * numThreads;
os_menores<<<numBlocks, numThreads>>>(d_matrizes, posLimite, jump);
cudaDeviceSynchronize();
menorMatriz(d_matrizes, numMatResto);
}
}
void encontraMenorMatriz(int* matrizes) {
int tam = numMatrizes * E * sizeof(int);
int *d_matrizes;
// Alloc space for device copies of a, b, c
cudaMalloc((void **) &d_matrizes, tam);
// Copy inputs to device
cudaMemcpy(d_matrizes, matrizes, tam, cudaMemcpyHostToDevice);
// encontra menor matriz
menorMatriz(d_matrizes, numMatrizes);
// Copy result back to host
cudaMemcpy(matrizes, d_matrizes, tam, cudaMemcpyDeviceToHost);
cudaFree(d_matrizes);
}
/* Le o arquivo arq que contem matrizes no formato declarado
no enunciado e retorna um vetor com todas matrizes lidas*/
int* alocaMatrizesArquivo(FILE *arq){
char asteriscos[10];
int *matrizes, *matrizesAux;
fscanf(arq, "%d", &numMatrizes);
matrizes = (int *) malloc(E * numMatrizes * sizeof(int));
matrizesAux = matrizes;
for(int i = 0; i < numMatrizes; i++) {
fscanf(arq, "%s", asteriscos); //pula a linha de asteriscos
for(int j = 0; j < E; j++)
fscanf(arq, "%d", matrizesAux++);
}
return matrizes;
}
int main (int argc, char* argv[]) {
if(argc != 2) {
printf("Argumento do programa: nome do arquivo\n");
}
else {
FILE *entrada;
entrada = fopen(argv[1], "r");
if (entrada == NULL) {
printf("Deu ruim pra abrir o arquivo\n");
return EXIT_FAILURE;
}
int *matrizes = alocaMatrizesArquivo(entrada);
fclose(entrada);
encontraMenorMatriz(matrizes);
leitura(matrizes, 1);
// leitura(get_min(mat, 0, qtde));
free(matrizes);
return EXIT_SUCCESS;
}
} | .file "tmpxft_0013f589_00000000-6_ep.cudafe1.cpp"
.text
#APP
#NO_APP
.type _ZL26__cudaUnregisterBinaryUtilv, @function
_ZL26__cudaUnregisterBinaryUtilv:
.LFB2064:
.cfi_startproc
endbr64
subq $8, %rsp
.cfi_def_cfa_offset 16
movq _ZL20__cudaFatCubinHandle(%rip), %rdi
call __cudaUnregisterFatBinary@PLT
addq $8, %rsp
.cfi_def_cfa_offset 8
ret
.cfi_endproc
.LFE2064:
.size _ZL26__cudaUnregisterBinaryUtilv, .-_ZL26__cudaUnregisterBinaryUtilv
.section .rodata.str1.1,"aMS",@progbits,1
.LC0:
.string "%d\t"
.LC1:
.string "\n"
.LC2:
.string "********************\n"
.text
.globl _Z7leituraPii
.type _Z7leituraPii, @function
_Z7leituraPii:
.LFB2057:
.cfi_startproc
endbr64
testl %esi, %esi
jle .L10
pushq %r15
.cfi_def_cfa_offset 16
.cfi_offset 15, -16
pushq %r14
.cfi_def_cfa_offset 24
.cfi_offset 14, -24
pushq %r13
.cfi_def_cfa_offset 32
.cfi_offset 13, -32
pushq %r12
.cfi_def_cfa_offset 40
.cfi_offset 12, -40
pushq %rbp
.cfi_def_cfa_offset 48
.cfi_offset 6, -48
pushq %rbx
.cfi_def_cfa_offset 56
.cfi_offset 3, -56
subq $8, %rsp
.cfi_def_cfa_offset 64
leaq 12(%rdi), %rbp
leal (%rsi,%rsi,2), %r15d
movl $0, %r12d
leaq .LC0(%rip), %r13
leaq .LC1(%rip), %r14
jmp .L5
.L7:
addq $12, %rbp
cmpl %r15d, %r12d
je .L3
.L5:
leaq -12(%rbp), %rbx
.L6:
addq $4, %rbx
movl -4(%rbx), %edx
movq %r13, %rsi
movl $2, %edi
movl $0, %eax
call __printf_chk@PLT
cmpq %rbp, %rbx
jne .L6
movq %r14, %rsi
movl $2, %edi
movl $0, %eax
call __printf_chk@PLT
addl $1, %r12d
movslq %r12d, %rax
imulq $1431655766, %rax, %rax
shrq $32, %rax
movl %r12d, %edx
sarl $31, %edx
subl %edx, %eax
leal (%rax,%rax,2), %eax
cmpl %eax, %r12d
jne .L7
leaq .LC2(%rip), %rsi
movl $2, %edi
movl $0, %eax
call __printf_chk@PLT
jmp .L7
.L3:
addq $8, %rsp
.cfi_def_cfa_offset 56
popq %rbx
.cfi_def_cfa_offset 48
popq %rbp
.cfi_def_cfa_offset 40
popq %r12
.cfi_def_cfa_offset 32
popq %r13
.cfi_def_cfa_offset 24
popq %r14
.cfi_def_cfa_offset 16
popq %r15
.cfi_def_cfa_offset 8
ret
.L10:
.cfi_restore 3
.cfi_restore 6
.cfi_restore 12
.cfi_restore 13
.cfi_restore 14
.cfi_restore 15
ret
.cfi_endproc
.LFE2057:
.size _Z7leituraPii, .-_Z7leituraPii
.section .rodata.str1.1
.LC3:
.string "%d"
.LC4:
.string "%s"
.text
.globl _Z20alocaMatrizesArquivoP8_IO_FILE
.type _Z20alocaMatrizesArquivoP8_IO_FILE, @function
_Z20alocaMatrizesArquivoP8_IO_FILE:
.LFB2060:
.cfi_startproc
endbr64
pushq %r15
.cfi_def_cfa_offset 16
.cfi_offset 15, -16
pushq %r14
.cfi_def_cfa_offset 24
.cfi_offset 14, -24
pushq %r13
.cfi_def_cfa_offset 32
.cfi_offset 13, -32
pushq %r12
.cfi_def_cfa_offset 40
.cfi_offset 12, -40
pushq %rbp
.cfi_def_cfa_offset 48
.cfi_offset 6, -48
pushq %rbx
.cfi_def_cfa_offset 56
.cfi_offset 3, -56
subq $56, %rsp
.cfi_def_cfa_offset 112
movq %rdi, %r12
movq %fs:40, %rax
movq %rax, 40(%rsp)
xorl %eax, %eax
leaq numMatrizes(%rip), %rdx
leaq .LC3(%rip), %rsi
call __isoc23_fscanf@PLT
movl numMatrizes(%rip), %ebx
leal (%rbx,%rbx,8), %edi
movslq %edi, %rdi
salq $2, %rdi
call malloc@PLT
movq %rax, 8(%rsp)
testl %ebx, %ebx
jle .L13
leaq 36(%rax), %rbp
movl $0, %r14d
leaq 30(%rsp), %r15
leaq .LC3(%rip), %r13
.L16:
leaq -36(%rbp), %rbx
movq %r15, %rdx
leaq .LC4(%rip), %rsi
movq %r12, %rdi
movl $0, %eax
call __isoc23_fscanf@PLT
.L15:
movq %rbx, %rdx
addq $4, %rbx
movq %r13, %rsi
movq %r12, %rdi
movl $0, %eax
call __isoc23_fscanf@PLT
cmpq %rbp, %rbx
jne .L15
addl $1, %r14d
addq $36, %rbp
cmpl %r14d, numMatrizes(%rip)
jg .L16
.L13:
movq 40(%rsp), %rax
subq %fs:40, %rax
jne .L21
movq 8(%rsp), %rax
addq $56, %rsp
.cfi_remember_state
.cfi_def_cfa_offset 56
popq %rbx
.cfi_def_cfa_offset 48
popq %rbp
.cfi_def_cfa_offset 40
popq %r12
.cfi_def_cfa_offset 32
popq %r13
.cfi_def_cfa_offset 24
popq %r14
.cfi_def_cfa_offset 16
popq %r15
.cfi_def_cfa_offset 8
ret
.L21:
.cfi_restore_state
call __stack_chk_fail@PLT
.cfi_endproc
.LFE2060:
.size _Z20alocaMatrizesArquivoP8_IO_FILE, .-_Z20alocaMatrizesArquivoP8_IO_FILE
.globl _Z32__device_stub__Z10os_menoresPiiiPiii
.type _Z32__device_stub__Z10os_menoresPiiiPiii, @function
_Z32__device_stub__Z10os_menoresPiiiPiii:
.LFB2086:
.cfi_startproc
endbr64
subq $120, %rsp
.cfi_def_cfa_offset 128
movq %rdi, 8(%rsp)
movl %esi, 4(%rsp)
movl %edx, (%rsp)
movq %fs:40, %rax
movq %rax, 104(%rsp)
xorl %eax, %eax
leaq 8(%rsp), %rax
movq %rax, 80(%rsp)
leaq 4(%rsp), %rax
movq %rax, 88(%rsp)
movq %rsp, %rax
movq %rax, 96(%rsp)
movl $1, 32(%rsp)
movl $1, 36(%rsp)
movl $1, 40(%rsp)
movl $1, 44(%rsp)
movl $1, 48(%rsp)
movl $1, 52(%rsp)
leaq 24(%rsp), %rcx
leaq 16(%rsp), %rdx
leaq 44(%rsp), %rsi
leaq 32(%rsp), %rdi
call __cudaPopCallConfiguration@PLT
testl %eax, %eax
je .L26
.L22:
movq 104(%rsp), %rax
subq %fs:40, %rax
jne .L27
addq $120, %rsp
.cfi_remember_state
.cfi_def_cfa_offset 8
ret
.L26:
.cfi_restore_state
pushq 24(%rsp)
.cfi_def_cfa_offset 136
pushq 24(%rsp)
.cfi_def_cfa_offset 144
leaq 96(%rsp), %r9
movq 60(%rsp), %rcx
movl 68(%rsp), %r8d
movq 48(%rsp), %rsi
movl 56(%rsp), %edx
leaq _Z10os_menoresPiii(%rip), %rdi
call cudaLaunchKernel@PLT
addq $16, %rsp
.cfi_def_cfa_offset 128
jmp .L22
.L27:
call __stack_chk_fail@PLT
.cfi_endproc
.LFE2086:
.size _Z32__device_stub__Z10os_menoresPiiiPiii, .-_Z32__device_stub__Z10os_menoresPiiiPiii
.globl _Z10os_menoresPiii
.type _Z10os_menoresPiii, @function
_Z10os_menoresPiii:
.LFB2087:
.cfi_startproc
endbr64
subq $8, %rsp
.cfi_def_cfa_offset 16
call _Z32__device_stub__Z10os_menoresPiiiPiii
addq $8, %rsp
.cfi_def_cfa_offset 8
ret
.cfi_endproc
.LFE2087:
.size _Z10os_menoresPiii, .-_Z10os_menoresPiii
.globl _Z11menorMatrizPii
.type _Z11menorMatrizPii, @function
_Z11menorMatrizPii:
.LFB2058:
.cfi_startproc
endbr64
cmpl $1, %esi
jle .L36
pushq %r14
.cfi_def_cfa_offset 16
.cfi_offset 14, -16
pushq %r13
.cfi_def_cfa_offset 24
.cfi_offset 13, -24
pushq %r12
.cfi_def_cfa_offset 32
.cfi_offset 12, -32
pushq %rbp
.cfi_def_cfa_offset 40
.cfi_offset 6, -40
pushq %rbx
.cfi_def_cfa_offset 48
.cfi_offset 3, -48
subq $32, %rsp
.cfi_def_cfa_offset 80
movq %rdi, %r12
movl %esi, %ebx
cmpl $90, %esi
jle .L34
leal (%rsi,%rsi,8), %eax
movslq %eax, %rbp
imulq $-222702007, %rbp, %rbp
shrq $32, %rbp
addl %eax, %ebp
sarl $8, %ebp
sarl $31, %eax
subl %eax, %ebp
leal 0(%rbp,%rbp,2), %r14d
movl $27, %r13d
jmp .L32
.L34:
movl $9, %r13d
movl $1, %r14d
movl $1, %ebp
.L32:
movl %r13d, 20(%rsp)
movl $1, 24(%rsp)
movl %ebp, 8(%rsp)
movl $1, 12(%rsp)
movl $0, %r9d
movl $0, %r8d
movq 20(%rsp), %rdx
movl $1, %ecx
movq 8(%rsp), %rdi
movl $1, %esi
call __cudaPushCallConfiguration@PLT
testl %eax, %eax
je .L39
.L33:
call cudaDeviceSynchronize@PLT
movl %r14d, %esi
movq %r12, %rdi
call _Z11menorMatrizPii
addq $32, %rsp
.cfi_remember_state
.cfi_def_cfa_offset 48
popq %rbx
.cfi_def_cfa_offset 40
popq %rbp
.cfi_def_cfa_offset 32
popq %r12
.cfi_def_cfa_offset 24
popq %r13
.cfi_def_cfa_offset 16
popq %r14
.cfi_def_cfa_offset 8
ret
.L39:
.cfi_restore_state
movl %ebp, %edx
imull %r13d, %edx
leal (%rbx,%rbx,8), %esi
movq %r12, %rdi
call _Z32__device_stub__Z10os_menoresPiiiPiii
jmp .L33
.L36:
.cfi_def_cfa_offset 8
.cfi_restore 3
.cfi_restore 6
.cfi_restore 12
.cfi_restore 13
.cfi_restore 14
ret
.cfi_endproc
.LFE2058:
.size _Z11menorMatrizPii, .-_Z11menorMatrizPii
.globl _Z19encontraMenorMatrizPi
.type _Z19encontraMenorMatrizPi, @function
_Z19encontraMenorMatrizPi:
.LFB2059:
.cfi_startproc
endbr64
pushq %rbp
.cfi_def_cfa_offset 16
.cfi_offset 6, -16
pushq %rbx
.cfi_def_cfa_offset 24
.cfi_offset 3, -24
subq $24, %rsp
.cfi_def_cfa_offset 48
movq %rdi, %rbp
movq %fs:40, %rax
movq %rax, 8(%rsp)
xorl %eax, %eax
movl numMatrizes(%rip), %eax
leal (%rax,%rax,8), %ebx
sall $2, %ebx
movslq %ebx, %rbx
movq %rsp, %rdi
movq %rbx, %rsi
call cudaMalloc@PLT
movl $1, %ecx
movq %rbx, %rdx
movq %rbp, %rsi
movq (%rsp), %rdi
call cudaMemcpy@PLT
movl numMatrizes(%rip), %esi
movq (%rsp), %rdi
call _Z11menorMatrizPii
movl $2, %ecx
movq %rbx, %rdx
movq (%rsp), %rsi
movq %rbp, %rdi
call cudaMemcpy@PLT
movq (%rsp), %rdi
call cudaFree@PLT
movq 8(%rsp), %rax
subq %fs:40, %rax
jne .L43
addq $24, %rsp
.cfi_remember_state
.cfi_def_cfa_offset 24
popq %rbx
.cfi_def_cfa_offset 16
popq %rbp
.cfi_def_cfa_offset 8
ret
.L43:
.cfi_restore_state
call __stack_chk_fail@PLT
.cfi_endproc
.LFE2059:
.size _Z19encontraMenorMatrizPi, .-_Z19encontraMenorMatrizPi
.section .rodata.str1.8,"aMS",@progbits,1
.align 8
.LC5:
.string "Argumento do programa: nome do arquivo\n"
.section .rodata.str1.1
.LC6:
.string "r"
.LC7:
.string "Deu ruim pra abrir o arquivo\n"
.text
.globl main
.type main, @function
main:
.LFB2061:
.cfi_startproc
endbr64
pushq %rbp
.cfi_def_cfa_offset 16
.cfi_offset 6, -16
pushq %rbx
.cfi_def_cfa_offset 24
.cfi_offset 3, -24
subq $8, %rsp
.cfi_def_cfa_offset 32
cmpl $2, %edi
je .L45
leaq .LC5(%rip), %rsi
movl $2, %edi
movl $0, %eax
call __printf_chk@PLT
movl $0, %eax
.L44:
addq $8, %rsp
.cfi_remember_state
.cfi_def_cfa_offset 24
popq %rbx
.cfi_def_cfa_offset 16
popq %rbp
.cfi_def_cfa_offset 8
ret
.L45:
.cfi_restore_state
movq 8(%rsi), %rdi
leaq .LC6(%rip), %rsi
call fopen@PLT
movq %rax, %rbx
testq %rax, %rax
je .L49
movq %rax, %rdi
call _Z20alocaMatrizesArquivoP8_IO_FILE
movq %rax, %rbp
movq %rbx, %rdi
call fclose@PLT
movq %rbp, %rdi
call _Z19encontraMenorMatrizPi
movl $1, %esi
movq %rbp, %rdi
call _Z7leituraPii
movq %rbp, %rdi
call free@PLT
movl $0, %eax
jmp .L44
.L49:
leaq .LC7(%rip), %rsi
movl $2, %edi
movl $0, %eax
call __printf_chk@PLT
movl $1, %eax
jmp .L44
.cfi_endproc
.LFE2061:
.size main, .-main
.section .rodata.str1.1
.LC8:
.string "_Z10os_menoresPiii"
.text
.type _ZL24__sti____cudaRegisterAllv, @function
_ZL24__sti____cudaRegisterAllv:
.LFB2089:
.cfi_startproc
endbr64
subq $8, %rsp
.cfi_def_cfa_offset 16
leaq _ZL15__fatDeviceText(%rip), %rdi
call __cudaRegisterFatBinary@PLT
movq %rax, %rdi
movq %rax, _ZL20__cudaFatCubinHandle(%rip)
pushq $0
.cfi_def_cfa_offset 24
pushq $0
.cfi_def_cfa_offset 32
pushq $0
.cfi_def_cfa_offset 40
pushq $0
.cfi_def_cfa_offset 48
movl $0, %r9d
movl $-1, %r8d
leaq .LC8(%rip), %rdx
movq %rdx, %rcx
leaq _Z10os_menoresPiii(%rip), %rsi
call __cudaRegisterFunction@PLT
addq $32, %rsp
.cfi_def_cfa_offset 16
movq _ZL20__cudaFatCubinHandle(%rip), %rdi
call __cudaRegisterFatBinaryEnd@PLT
leaq _ZL26__cudaUnregisterBinaryUtilv(%rip), %rdi
call atexit@PLT
addq $8, %rsp
.cfi_def_cfa_offset 8
ret
.cfi_endproc
.LFE2089:
.size _ZL24__sti____cudaRegisterAllv, .-_ZL24__sti____cudaRegisterAllv
.section .init_array,"aw"
.align 8
.quad _ZL24__sti____cudaRegisterAllv
.section .nvFatBinSegment,"aw"
.align 8
.type _ZL15__fatDeviceText, @object
.size _ZL15__fatDeviceText, 24
_ZL15__fatDeviceText:
.long 1180844977
.long 1
.quad fatbinData
.quad 0
.local _ZL20__cudaFatCubinHandle
.comm _ZL20__cudaFatCubinHandle,8,8
.globl numMatrizes
.bss
.align 4
.type numMatrizes, @object
.size numMatrizes, 4
numMatrizes:
.zero 4
.ident "GCC: (Ubuntu 13.3.0-6ubuntu2~24.04) 13.3.0"
.section .note.GNU-stack,"",@progbits
.section .note.gnu.property,"a"
.align 8
.long 1f - 0f
.long 4f - 1f
.long 5
0:
.string "GNU"
1:
.align 8
.long 0xc0000002
.long 3f - 2f
2:
.long 0x3
3:
.align 8
4: |
You are a helpful coding assistant specialized in converting CUDA source code to HIP/AMD source code. | /**
* André Luiz Abdalla Silveira 8030353
* Mauricio Luiz Cardoso 6796479
*
* Esse programa escrito em CUDA visa criar um algoritmo que gera uma redução
* de matrizes. Cada matriz é representada por um vetor e todos estão
* reunidos num vetor de vetores. A ideia é fazer uma função que faz uma
* comparação entre vetores fazendo o mínimo de operações
*/
#include <stdio.h>
#include <stdlib.h>
#define E 9 // qtde de elementos de cada matriz
#define linhaElementos 3 // quantidade de elementos da linha
int numMatrizes;
__global__ void os_menores(int *d_matrizes, int posLimite, int jump) {
int indexIni = threadIdx.x + blockIdx.x * blockDim.x;
for(int i = indexIni; i < posLimite; i += jump)
if(d_matrizes[indexIni] > d_matrizes[i])
d_matrizes[indexIni] = d_matrizes[i];
}
/* Imprime todas as matrizes de dimensão ExE contidas em matrizes*/
void leitura (int *matrizes, int numMats) {
int i, k;
for (i = 0; i < numMats * linhaElementos; i++) {
for (k = 0; k < linhaElementos; k++)
printf("%d\t", *(matrizes++));
printf("\n");
if((i+1) % linhaElementos == 0)
printf("********************\n");
}
}
void menorMatriz(int *d_matrizes, int numMats) {
if(numMats > 1) {
int numBlocks = 0;
int numMatResto;
int jump = 0;
int numThreads = 0;
int posLimite;
// carga de tamanho de um bloco
if(numMats <= E * 10) {
numMatResto = 1;
numThreads = E;
numBlocks = 1;
}
else {
const int numMatThreads = 3; // 3 foi escolhido para que numthreads seja maior multiplo de E(tamanho de cada matriz) e menor que um warp(32)
numThreads = E * numMatThreads;
int espacoTrabThre = 10 * numThreads; //cada thread devera comparar ate E * 10 matrizes
numBlocks = E * numMats / espacoTrabThre;
numMatResto = numBlocks * numMatThreads;
}
posLimite = numMats * E;
jump = numBlocks * numThreads;
os_menores<<<numBlocks, numThreads>>>(d_matrizes, posLimite, jump);
cudaDeviceSynchronize();
menorMatriz(d_matrizes, numMatResto);
}
}
void encontraMenorMatriz(int* matrizes) {
int tam = numMatrizes * E * sizeof(int);
int *d_matrizes;
// Alloc space for device copies of a, b, c
cudaMalloc((void **) &d_matrizes, tam);
// Copy inputs to device
cudaMemcpy(d_matrizes, matrizes, tam, cudaMemcpyHostToDevice);
// encontra menor matriz
menorMatriz(d_matrizes, numMatrizes);
// Copy result back to host
cudaMemcpy(matrizes, d_matrizes, tam, cudaMemcpyDeviceToHost);
cudaFree(d_matrizes);
}
/* Le o arquivo arq que contem matrizes no formato declarado
no enunciado e retorna um vetor com todas matrizes lidas*/
int* alocaMatrizesArquivo(FILE *arq){
char asteriscos[10];
int *matrizes, *matrizesAux;
fscanf(arq, "%d", &numMatrizes);
matrizes = (int *) malloc(E * numMatrizes * sizeof(int));
matrizesAux = matrizes;
for(int i = 0; i < numMatrizes; i++) {
fscanf(arq, "%s", asteriscos); //pula a linha de asteriscos
for(int j = 0; j < E; j++)
fscanf(arq, "%d", matrizesAux++);
}
return matrizes;
}
int main (int argc, char* argv[]) {
if(argc != 2) {
printf("Argumento do programa: nome do arquivo\n");
}
else {
FILE *entrada;
entrada = fopen(argv[1], "r");
if (entrada == NULL) {
printf("Deu ruim pra abrir o arquivo\n");
return EXIT_FAILURE;
}
int *matrizes = alocaMatrizesArquivo(entrada);
fclose(entrada);
encontraMenorMatriz(matrizes);
leitura(matrizes, 1);
// leitura(get_min(mat, 0, qtde));
free(matrizes);
return EXIT_SUCCESS;
}
} | /**
* André Luiz Abdalla Silveira 8030353
* Mauricio Luiz Cardoso 6796479
*
* Esse programa escrito em CUDA visa criar um algoritmo que gera uma redução
* de matrizes. Cada matriz é representada por um vetor e todos estão
* reunidos num vetor de vetores. A ideia é fazer uma função que faz uma
* comparação entre vetores fazendo o mínimo de operações
*/
#include <hip/hip_runtime.h>
#include <stdio.h>
#include <stdlib.h>
#define E 9 // qtde de elementos de cada matriz
#define linhaElementos 3 // quantidade de elementos da linha
int numMatrizes;
__global__ void os_menores(int *d_matrizes, int posLimite, int jump) {
int indexIni = threadIdx.x + blockIdx.x * blockDim.x;
for(int i = indexIni; i < posLimite; i += jump)
if(d_matrizes[indexIni] > d_matrizes[i])
d_matrizes[indexIni] = d_matrizes[i];
}
/* Imprime todas as matrizes de dimensão ExE contidas em matrizes*/
void leitura (int *matrizes, int numMats) {
int i, k;
for (i = 0; i < numMats * linhaElementos; i++) {
for (k = 0; k < linhaElementos; k++)
printf("%d\t", *(matrizes++));
printf("\n");
if((i+1) % linhaElementos == 0)
printf("********************\n");
}
}
void menorMatriz(int *d_matrizes, int numMats) {
if(numMats > 1) {
int numBlocks = 0;
int numMatResto;
int jump = 0;
int numThreads = 0;
int posLimite;
// carga de tamanho de um bloco
if(numMats <= E * 10) {
numMatResto = 1;
numThreads = E;
numBlocks = 1;
}
else {
const int numMatThreads = 3; // 3 foi escolhido para que numthreads seja maior multiplo de E(tamanho de cada matriz) e menor que um warp(32)
numThreads = E * numMatThreads;
int espacoTrabThre = 10 * numThreads; //cada thread devera comparar ate E * 10 matrizes
numBlocks = E * numMats / espacoTrabThre;
numMatResto = numBlocks * numMatThreads;
}
posLimite = numMats * E;
jump = numBlocks * numThreads;
os_menores<<<numBlocks, numThreads>>>(d_matrizes, posLimite, jump);
hipDeviceSynchronize();
menorMatriz(d_matrizes, numMatResto);
}
}
void encontraMenorMatriz(int* matrizes) {
int tam = numMatrizes * E * sizeof(int);
int *d_matrizes;
// Alloc space for device copies of a, b, c
hipMalloc((void **) &d_matrizes, tam);
// Copy inputs to device
hipMemcpy(d_matrizes, matrizes, tam, hipMemcpyHostToDevice);
// encontra menor matriz
menorMatriz(d_matrizes, numMatrizes);
// Copy result back to host
hipMemcpy(matrizes, d_matrizes, tam, hipMemcpyDeviceToHost);
hipFree(d_matrizes);
}
/* Le o arquivo arq que contem matrizes no formato declarado
no enunciado e retorna um vetor com todas matrizes lidas*/
int* alocaMatrizesArquivo(FILE *arq){
char asteriscos[10];
int *matrizes, *matrizesAux;
fscanf(arq, "%d", &numMatrizes);
matrizes = (int *) malloc(E * numMatrizes * sizeof(int));
matrizesAux = matrizes;
for(int i = 0; i < numMatrizes; i++) {
fscanf(arq, "%s", asteriscos); //pula a linha de asteriscos
for(int j = 0; j < E; j++)
fscanf(arq, "%d", matrizesAux++);
}
return matrizes;
}
int main (int argc, char* argv[]) {
if(argc != 2) {
printf("Argumento do programa: nome do arquivo\n");
}
else {
FILE *entrada;
entrada = fopen(argv[1], "r");
if (entrada == NULL) {
printf("Deu ruim pra abrir o arquivo\n");
return EXIT_FAILURE;
}
int *matrizes = alocaMatrizesArquivo(entrada);
fclose(entrada);
encontraMenorMatriz(matrizes);
leitura(matrizes, 1);
// leitura(get_min(mat, 0, qtde));
free(matrizes);
return EXIT_SUCCESS;
}
} |
You are a helpful coding assistant specialized in converting HIP source code to AMD device assembly. | /**
* André Luiz Abdalla Silveira 8030353
* Mauricio Luiz Cardoso 6796479
*
* Esse programa escrito em CUDA visa criar um algoritmo que gera uma redução
* de matrizes. Cada matriz é representada por um vetor e todos estão
* reunidos num vetor de vetores. A ideia é fazer uma função que faz uma
* comparação entre vetores fazendo o mínimo de operações
*/
#include <hip/hip_runtime.h>
#include <stdio.h>
#include <stdlib.h>
#define E 9 // qtde de elementos de cada matriz
#define linhaElementos 3 // quantidade de elementos da linha
int numMatrizes;
__global__ void os_menores(int *d_matrizes, int posLimite, int jump) {
int indexIni = threadIdx.x + blockIdx.x * blockDim.x;
for(int i = indexIni; i < posLimite; i += jump)
if(d_matrizes[indexIni] > d_matrizes[i])
d_matrizes[indexIni] = d_matrizes[i];
}
/* Imprime todas as matrizes de dimensão ExE contidas em matrizes*/
void leitura (int *matrizes, int numMats) {
int i, k;
for (i = 0; i < numMats * linhaElementos; i++) {
for (k = 0; k < linhaElementos; k++)
printf("%d\t", *(matrizes++));
printf("\n");
if((i+1) % linhaElementos == 0)
printf("********************\n");
}
}
void menorMatriz(int *d_matrizes, int numMats) {
if(numMats > 1) {
int numBlocks = 0;
int numMatResto;
int jump = 0;
int numThreads = 0;
int posLimite;
// carga de tamanho de um bloco
if(numMats <= E * 10) {
numMatResto = 1;
numThreads = E;
numBlocks = 1;
}
else {
const int numMatThreads = 3; // 3 foi escolhido para que numthreads seja maior multiplo de E(tamanho de cada matriz) e menor que um warp(32)
numThreads = E * numMatThreads;
int espacoTrabThre = 10 * numThreads; //cada thread devera comparar ate E * 10 matrizes
numBlocks = E * numMats / espacoTrabThre;
numMatResto = numBlocks * numMatThreads;
}
posLimite = numMats * E;
jump = numBlocks * numThreads;
os_menores<<<numBlocks, numThreads>>>(d_matrizes, posLimite, jump);
hipDeviceSynchronize();
menorMatriz(d_matrizes, numMatResto);
}
}
void encontraMenorMatriz(int* matrizes) {
int tam = numMatrizes * E * sizeof(int);
int *d_matrizes;
// Alloc space for device copies of a, b, c
hipMalloc((void **) &d_matrizes, tam);
// Copy inputs to device
hipMemcpy(d_matrizes, matrizes, tam, hipMemcpyHostToDevice);
// encontra menor matriz
menorMatriz(d_matrizes, numMatrizes);
// Copy result back to host
hipMemcpy(matrizes, d_matrizes, tam, hipMemcpyDeviceToHost);
hipFree(d_matrizes);
}
/* Le o arquivo arq que contem matrizes no formato declarado
no enunciado e retorna um vetor com todas matrizes lidas*/
int* alocaMatrizesArquivo(FILE *arq){
char asteriscos[10];
int *matrizes, *matrizesAux;
fscanf(arq, "%d", &numMatrizes);
matrizes = (int *) malloc(E * numMatrizes * sizeof(int));
matrizesAux = matrizes;
for(int i = 0; i < numMatrizes; i++) {
fscanf(arq, "%s", asteriscos); //pula a linha de asteriscos
for(int j = 0; j < E; j++)
fscanf(arq, "%d", matrizesAux++);
}
return matrizes;
}
int main (int argc, char* argv[]) {
if(argc != 2) {
printf("Argumento do programa: nome do arquivo\n");
}
else {
FILE *entrada;
entrada = fopen(argv[1], "r");
if (entrada == NULL) {
printf("Deu ruim pra abrir o arquivo\n");
return EXIT_FAILURE;
}
int *matrizes = alocaMatrizesArquivo(entrada);
fclose(entrada);
encontraMenorMatriz(matrizes);
leitura(matrizes, 1);
// leitura(get_min(mat, 0, qtde));
free(matrizes);
return EXIT_SUCCESS;
}
} | .text
.amdgcn_target "amdgcn-amd-amdhsa--gfx1100"
.protected _Z10os_menoresPiii
.globl _Z10os_menoresPiii
.p2align 8
.type _Z10os_menoresPiii,@function
_Z10os_menoresPiii:
s_clause 0x1
s_load_b32 s2, s[0:1], 0x1c
s_load_b32 s6, s[0:1], 0x8
s_waitcnt lgkmcnt(0)
s_and_b32 s2, s2, 0xffff
s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
v_mad_u64_u32 v[1:2], null, s15, s2, v[0:1]
s_mov_b32 s2, exec_lo
v_cmpx_gt_i32_e64 s6, v1
s_cbranch_execz .LBB0_5
s_clause 0x1
s_load_b64 s[4:5], s[0:1], 0x0
s_load_b32 s2, s[0:1], 0xc
v_ashrrev_i32_e32 v2, 31, v1
s_mov_b32 s1, 0
s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
v_lshlrev_b64 v[2:3], 2, v[1:2]
s_waitcnt lgkmcnt(0)
v_add_co_u32 v2, vcc_lo, s4, v2
s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(SALU_CYCLE_1)
v_add_co_ci_u32_e32 v3, vcc_lo, s5, v3, vcc_lo
s_ashr_i32 s3, s2, 31
s_lshl_b64 s[4:5], s[2:3], 2
global_load_b32 v0, v[2:3], off
v_dual_mov_b32 v5, v3 :: v_dual_mov_b32 v4, v2
s_branch .LBB0_3
.p2align 6
.LBB0_2:
s_or_b32 exec_lo, exec_lo, s0
v_add_nc_u32_e32 v1, s2, v1
v_add_co_u32 v4, s0, v4, s4
s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_3)
v_add_co_ci_u32_e64 v5, s0, s5, v5, s0
v_cmp_le_i32_e32 vcc_lo, s6, v1
s_or_b32 s1, vcc_lo, s1
s_delay_alu instid0(SALU_CYCLE_1)
s_and_not1_b32 exec_lo, exec_lo, s1
s_cbranch_execz .LBB0_5
.LBB0_3:
global_load_b32 v6, v[4:5], off
s_mov_b32 s0, exec_lo
s_waitcnt vmcnt(0)
v_cmpx_gt_i32_e64 v0, v6
s_cbranch_execz .LBB0_2
v_mov_b32_e32 v0, v6
global_store_b32 v[2:3], v6, off
s_branch .LBB0_2
.LBB0_5:
s_nop 0
s_sendmsg sendmsg(MSG_DEALLOC_VGPRS)
s_endpgm
.section .rodata,"a",@progbits
.p2align 6, 0x0
.amdhsa_kernel _Z10os_menoresPiii
.amdhsa_group_segment_fixed_size 0
.amdhsa_private_segment_fixed_size 0
.amdhsa_kernarg_size 272
.amdhsa_user_sgpr_count 15
.amdhsa_user_sgpr_dispatch_ptr 0
.amdhsa_user_sgpr_queue_ptr 0
.amdhsa_user_sgpr_kernarg_segment_ptr 1
.amdhsa_user_sgpr_dispatch_id 0
.amdhsa_user_sgpr_private_segment_size 0
.amdhsa_wavefront_size32 1
.amdhsa_uses_dynamic_stack 0
.amdhsa_enable_private_segment 0
.amdhsa_system_sgpr_workgroup_id_x 1
.amdhsa_system_sgpr_workgroup_id_y 0
.amdhsa_system_sgpr_workgroup_id_z 0
.amdhsa_system_sgpr_workgroup_info 0
.amdhsa_system_vgpr_workitem_id 0
.amdhsa_next_free_vgpr 7
.amdhsa_next_free_sgpr 16
.amdhsa_float_round_mode_32 0
.amdhsa_float_round_mode_16_64 0
.amdhsa_float_denorm_mode_32 3
.amdhsa_float_denorm_mode_16_64 3
.amdhsa_dx10_clamp 1
.amdhsa_ieee_mode 1
.amdhsa_fp16_overflow 0
.amdhsa_workgroup_processor_mode 1
.amdhsa_memory_ordered 1
.amdhsa_forward_progress 0
.amdhsa_shared_vgpr_count 0
.amdhsa_exception_fp_ieee_invalid_op 0
.amdhsa_exception_fp_denorm_src 0
.amdhsa_exception_fp_ieee_div_zero 0
.amdhsa_exception_fp_ieee_overflow 0
.amdhsa_exception_fp_ieee_underflow 0
.amdhsa_exception_fp_ieee_inexact 0
.amdhsa_exception_int_div_zero 0
.end_amdhsa_kernel
.text
.Lfunc_end0:
.size _Z10os_menoresPiii, .Lfunc_end0-_Z10os_menoresPiii
.section .AMDGPU.csdata,"",@progbits
.text
.p2alignl 7, 3214868480
.fill 96, 4, 3214868480
.type __hip_cuid_,@object
.section .bss,"aw",@nobits
.globl __hip_cuid_
__hip_cuid_:
.byte 0
.size __hip_cuid_, 1
.ident "AMD clang version 18.0.0git (https://github.com/RadeonOpenCompute/llvm-project roc-6.3.2 25012 e5bf7e55c91490b07c49d8960fa7983d864936c4)"
.section ".note.GNU-stack","",@progbits
.addrsig
.addrsig_sym __hip_cuid_
.amdgpu_metadata
---
amdhsa.kernels:
- .args:
- .address_space: global
.offset: 0
.size: 8
.value_kind: global_buffer
- .offset: 8
.size: 4
.value_kind: by_value
- .offset: 12
.size: 4
.value_kind: by_value
- .offset: 16
.size: 4
.value_kind: hidden_block_count_x
- .offset: 20
.size: 4
.value_kind: hidden_block_count_y
- .offset: 24
.size: 4
.value_kind: hidden_block_count_z
- .offset: 28
.size: 2
.value_kind: hidden_group_size_x
- .offset: 30
.size: 2
.value_kind: hidden_group_size_y
- .offset: 32
.size: 2
.value_kind: hidden_group_size_z
- .offset: 34
.size: 2
.value_kind: hidden_remainder_x
- .offset: 36
.size: 2
.value_kind: hidden_remainder_y
- .offset: 38
.size: 2
.value_kind: hidden_remainder_z
- .offset: 56
.size: 8
.value_kind: hidden_global_offset_x
- .offset: 64
.size: 8
.value_kind: hidden_global_offset_y
- .offset: 72
.size: 8
.value_kind: hidden_global_offset_z
- .offset: 80
.size: 2
.value_kind: hidden_grid_dims
.group_segment_fixed_size: 0
.kernarg_segment_align: 8
.kernarg_segment_size: 272
.language: OpenCL C
.language_version:
- 2
- 0
.max_flat_workgroup_size: 1024
.name: _Z10os_menoresPiii
.private_segment_fixed_size: 0
.sgpr_count: 18
.sgpr_spill_count: 0
.symbol: _Z10os_menoresPiii.kd
.uniform_work_group_size: 1
.uses_dynamic_stack: false
.vgpr_count: 7
.vgpr_spill_count: 0
.wavefront_size: 32
.workgroup_processor_mode: 1
amdhsa.target: amdgcn-amd-amdhsa--gfx1100
amdhsa.version:
- 1
- 2
...
.end_amdgpu_metadata |
You are a helpful coding assistant specialized in converting HIP source code to AMD host assembly. | /**
* André Luiz Abdalla Silveira 8030353
* Mauricio Luiz Cardoso 6796479
*
* Esse programa escrito em CUDA visa criar um algoritmo que gera uma redução
* de matrizes. Cada matriz é representada por um vetor e todos estão
* reunidos num vetor de vetores. A ideia é fazer uma função que faz uma
* comparação entre vetores fazendo o mínimo de operações
*/
#include <hip/hip_runtime.h>
#include <stdio.h>
#include <stdlib.h>
#define E 9 // qtde de elementos de cada matriz
#define linhaElementos 3 // quantidade de elementos da linha
int numMatrizes;
__global__ void os_menores(int *d_matrizes, int posLimite, int jump) {
int indexIni = threadIdx.x + blockIdx.x * blockDim.x;
for(int i = indexIni; i < posLimite; i += jump)
if(d_matrizes[indexIni] > d_matrizes[i])
d_matrizes[indexIni] = d_matrizes[i];
}
/* Imprime todas as matrizes de dimensão ExE contidas em matrizes*/
void leitura (int *matrizes, int numMats) {
int i, k;
for (i = 0; i < numMats * linhaElementos; i++) {
for (k = 0; k < linhaElementos; k++)
printf("%d\t", *(matrizes++));
printf("\n");
if((i+1) % linhaElementos == 0)
printf("********************\n");
}
}
void menorMatriz(int *d_matrizes, int numMats) {
if(numMats > 1) {
int numBlocks = 0;
int numMatResto;
int jump = 0;
int numThreads = 0;
int posLimite;
// carga de tamanho de um bloco
if(numMats <= E * 10) {
numMatResto = 1;
numThreads = E;
numBlocks = 1;
}
else {
const int numMatThreads = 3; // 3 foi escolhido para que numthreads seja maior multiplo de E(tamanho de cada matriz) e menor que um warp(32)
numThreads = E * numMatThreads;
int espacoTrabThre = 10 * numThreads; //cada thread devera comparar ate E * 10 matrizes
numBlocks = E * numMats / espacoTrabThre;
numMatResto = numBlocks * numMatThreads;
}
posLimite = numMats * E;
jump = numBlocks * numThreads;
os_menores<<<numBlocks, numThreads>>>(d_matrizes, posLimite, jump);
hipDeviceSynchronize();
menorMatriz(d_matrizes, numMatResto);
}
}
void encontraMenorMatriz(int* matrizes) {
int tam = numMatrizes * E * sizeof(int);
int *d_matrizes;
// Alloc space for device copies of a, b, c
hipMalloc((void **) &d_matrizes, tam);
// Copy inputs to device
hipMemcpy(d_matrizes, matrizes, tam, hipMemcpyHostToDevice);
// encontra menor matriz
menorMatriz(d_matrizes, numMatrizes);
// Copy result back to host
hipMemcpy(matrizes, d_matrizes, tam, hipMemcpyDeviceToHost);
hipFree(d_matrizes);
}
/* Le o arquivo arq que contem matrizes no formato declarado
no enunciado e retorna um vetor com todas matrizes lidas*/
int* alocaMatrizesArquivo(FILE *arq){
char asteriscos[10];
int *matrizes, *matrizesAux;
fscanf(arq, "%d", &numMatrizes);
matrizes = (int *) malloc(E * numMatrizes * sizeof(int));
matrizesAux = matrizes;
for(int i = 0; i < numMatrizes; i++) {
fscanf(arq, "%s", asteriscos); //pula a linha de asteriscos
for(int j = 0; j < E; j++)
fscanf(arq, "%d", matrizesAux++);
}
return matrizes;
}
int main (int argc, char* argv[]) {
if(argc != 2) {
printf("Argumento do programa: nome do arquivo\n");
}
else {
FILE *entrada;
entrada = fopen(argv[1], "r");
if (entrada == NULL) {
printf("Deu ruim pra abrir o arquivo\n");
return EXIT_FAILURE;
}
int *matrizes = alocaMatrizesArquivo(entrada);
fclose(entrada);
encontraMenorMatriz(matrizes);
leitura(matrizes, 1);
// leitura(get_min(mat, 0, qtde));
free(matrizes);
return EXIT_SUCCESS;
}
} | .text
.file "ep.hip"
.globl _Z25__device_stub__os_menoresPiii # -- Begin function _Z25__device_stub__os_menoresPiii
.p2align 4, 0x90
.type _Z25__device_stub__os_menoresPiii,@function
_Z25__device_stub__os_menoresPiii: # @_Z25__device_stub__os_menoresPiii
.cfi_startproc
# %bb.0:
subq $88, %rsp
.cfi_def_cfa_offset 96
movq %rdi, 56(%rsp)
movl %esi, 4(%rsp)
movl %edx, (%rsp)
leaq 56(%rsp), %rax
movq %rax, 64(%rsp)
leaq 4(%rsp), %rax
movq %rax, 72(%rsp)
movq %rsp, %rax
movq %rax, 80(%rsp)
leaq 40(%rsp), %rdi
leaq 24(%rsp), %rsi
leaq 16(%rsp), %rdx
leaq 8(%rsp), %rcx
callq __hipPopCallConfiguration
movq 40(%rsp), %rsi
movl 48(%rsp), %edx
movq 24(%rsp), %rcx
movl 32(%rsp), %r8d
leaq 64(%rsp), %r9
movl $_Z10os_menoresPiii, %edi
pushq 8(%rsp)
.cfi_adjust_cfa_offset 8
pushq 24(%rsp)
.cfi_adjust_cfa_offset 8
callq hipLaunchKernel
addq $104, %rsp
.cfi_adjust_cfa_offset -104
retq
.Lfunc_end0:
.size _Z25__device_stub__os_menoresPiii, .Lfunc_end0-_Z25__device_stub__os_menoresPiii
.cfi_endproc
# -- End function
.globl _Z7leituraPii # -- Begin function _Z7leituraPii
.p2align 4, 0x90
.type _Z7leituraPii,@function
_Z7leituraPii: # @_Z7leituraPii
.cfi_startproc
# %bb.0:
# kill: def $esi killed $esi def $rsi
testl %esi, %esi
jle .LBB1_8
# %bb.1: # %.preheader.preheader
pushq %rbp
.cfi_def_cfa_offset 16
pushq %r15
.cfi_def_cfa_offset 24
pushq %r14
.cfi_def_cfa_offset 32
pushq %rbx
.cfi_def_cfa_offset 40
pushq %rax
.cfi_def_cfa_offset 48
.cfi_offset %rbx, -40
.cfi_offset %r14, -32
.cfi_offset %r15, -24
.cfi_offset %rbp, -16
movq %rdi, %rbx
leal (%rsi,%rsi,2), %eax
cmpl $2, %eax
movl $1, %ebp
cmovgel %eax, %ebp
xorl %r14d, %r14d
jmp .LBB1_2
.p2align 4, 0x90
.LBB1_6: # in Loop: Header=BB1_2 Depth=1
addq %r15, %rbx
cmpl %ebp, %r14d
je .LBB1_7
.LBB1_2: # %.preheader
# =>This Loop Header: Depth=1
# Child Loop BB1_3 Depth 2
xorl %r15d, %r15d
.p2align 4, 0x90
.LBB1_3: # Parent Loop BB1_2 Depth=1
# => This Inner Loop Header: Depth=2
movl (%rbx,%r15), %esi
movl $.L.str, %edi
xorl %eax, %eax
callq printf
addq $4, %r15
cmpl $12, %r15d
jne .LBB1_3
# %bb.4: # in Loop: Header=BB1_2 Depth=1
movl $10, %edi
callq putchar@PLT
incl %r14d
imull $-1431655765, %r14d, %eax # imm = 0xAAAAAAAB
cmpl $1431655765, %eax # imm = 0x55555555
ja .LBB1_6
# %bb.5: # in Loop: Header=BB1_2 Depth=1
movl $.Lstr, %edi
callq puts@PLT
jmp .LBB1_6
.LBB1_7:
addq $8, %rsp
.cfi_def_cfa_offset 40
popq %rbx
.cfi_def_cfa_offset 32
popq %r14
.cfi_def_cfa_offset 24
popq %r15
.cfi_def_cfa_offset 16
popq %rbp
.cfi_def_cfa_offset 8
.cfi_restore %rbx
.cfi_restore %r14
.cfi_restore %r15
.cfi_restore %rbp
.LBB1_8: # %._crit_edge
retq
.Lfunc_end1:
.size _Z7leituraPii, .Lfunc_end1-_Z7leituraPii
.cfi_endproc
# -- End function
.globl _Z11menorMatrizPii # -- Begin function _Z11menorMatrizPii
.p2align 4, 0x90
.type _Z11menorMatrizPii,@function
_Z11menorMatrizPii: # @_Z11menorMatrizPii
.cfi_startproc
# %bb.0:
cmpl $2, %esi
jl .LBB2_7
# %bb.1:
pushq %rbp
.cfi_def_cfa_offset 16
pushq %r15
.cfi_def_cfa_offset 24
pushq %r14
.cfi_def_cfa_offset 32
pushq %r12
.cfi_def_cfa_offset 40
pushq %rbx
.cfi_def_cfa_offset 48
subq $96, %rsp
.cfi_def_cfa_offset 144
.cfi_offset %rbx, -48
.cfi_offset %r12, -40
.cfi_offset %r14, -32
.cfi_offset %r15, -24
.cfi_offset %rbp, -16
movl %esi, %r14d
movq %rdi, %rbx
cmpl $91, %esi
jge .LBB2_3
# %bb.2:
movl $1, %ebp
movl $9, %r12d
movl $1, %r15d
jmp .LBB2_4
.LBB2_3:
movl %r14d, %eax
movl $2290649225, %r15d # imm = 0x88888889
imulq %rax, %r15
shrq $36, %r15
leal (%r15,%r15,2), %ebp
movl $27, %r12d
.LBB2_4:
movl %r15d, %edi
movabsq $4294967296, %rax # imm = 0x100000000
orq %rax, %rdi
movl %r12d, %edx
orq %rax, %rdx
movl $1, %esi
movl $1, %ecx
xorl %r8d, %r8d
xorl %r9d, %r9d
callq __hipPushCallConfiguration
testl %eax, %eax
jne .LBB2_6
# %bb.5:
imull %r12d, %r15d
leal (%r14,%r14,8), %eax
movq %rbx, 56(%rsp)
movl %eax, 4(%rsp)
movl %r15d, (%rsp)
leaq 56(%rsp), %rax
movq %rax, 64(%rsp)
leaq 4(%rsp), %rax
movq %rax, 72(%rsp)
movq %rsp, %rax
movq %rax, 80(%rsp)
leaq 40(%rsp), %rdi
leaq 24(%rsp), %rsi
leaq 16(%rsp), %rdx
leaq 8(%rsp), %rcx
callq __hipPopCallConfiguration
movq 40(%rsp), %rsi
movl 48(%rsp), %edx
movq 24(%rsp), %rcx
movl 32(%rsp), %r8d
leaq 64(%rsp), %r9
movl $_Z10os_menoresPiii, %edi
pushq 8(%rsp)
.cfi_adjust_cfa_offset 8
pushq 24(%rsp)
.cfi_adjust_cfa_offset 8
callq hipLaunchKernel
addq $16, %rsp
.cfi_adjust_cfa_offset -16
.LBB2_6:
callq hipDeviceSynchronize
movq %rbx, %rdi
movl %ebp, %esi
callq _Z11menorMatrizPii
addq $96, %rsp
.cfi_def_cfa_offset 48
popq %rbx
.cfi_def_cfa_offset 40
popq %r12
.cfi_def_cfa_offset 32
popq %r14
.cfi_def_cfa_offset 24
popq %r15
.cfi_def_cfa_offset 16
popq %rbp
.cfi_def_cfa_offset 8
.cfi_restore %rbx
.cfi_restore %r12
.cfi_restore %r14
.cfi_restore %r15
.cfi_restore %rbp
.LBB2_7:
retq
.Lfunc_end2:
.size _Z11menorMatrizPii, .Lfunc_end2-_Z11menorMatrizPii
.cfi_endproc
# -- End function
.globl _Z19encontraMenorMatrizPi # -- Begin function _Z19encontraMenorMatrizPi
.p2align 4, 0x90
.type _Z19encontraMenorMatrizPi,@function
_Z19encontraMenorMatrizPi: # @_Z19encontraMenorMatrizPi
.cfi_startproc
# %bb.0:
pushq %r14
.cfi_def_cfa_offset 16
pushq %rbx
.cfi_def_cfa_offset 24
pushq %rax
.cfi_def_cfa_offset 32
.cfi_offset %rbx, -24
.cfi_offset %r14, -16
movq %rdi, %rbx
movl numMatrizes(%rip), %eax
shll $2, %eax
leal (%rax,%rax,8), %eax
movslq %eax, %r14
movq %rsp, %rdi
movq %r14, %rsi
callq hipMalloc
movq (%rsp), %rdi
movq %rbx, %rsi
movq %r14, %rdx
movl $1, %ecx
callq hipMemcpy
movq (%rsp), %rdi
movl numMatrizes(%rip), %esi
callq _Z11menorMatrizPii
movq (%rsp), %rsi
movq %rbx, %rdi
movq %r14, %rdx
movl $2, %ecx
callq hipMemcpy
movq (%rsp), %rdi
callq hipFree
addq $8, %rsp
.cfi_def_cfa_offset 24
popq %rbx
.cfi_def_cfa_offset 16
popq %r14
.cfi_def_cfa_offset 8
retq
.Lfunc_end3:
.size _Z19encontraMenorMatrizPi, .Lfunc_end3-_Z19encontraMenorMatrizPi
.cfi_endproc
# -- End function
.globl _Z20alocaMatrizesArquivoP8_IO_FILE # -- Begin function _Z20alocaMatrizesArquivoP8_IO_FILE
.p2align 4, 0x90
.type _Z20alocaMatrizesArquivoP8_IO_FILE,@function
_Z20alocaMatrizesArquivoP8_IO_FILE: # @_Z20alocaMatrizesArquivoP8_IO_FILE
.cfi_startproc
# %bb.0:
pushq %rbp
.cfi_def_cfa_offset 16
pushq %r15
.cfi_def_cfa_offset 24
pushq %r14
.cfi_def_cfa_offset 32
pushq %r13
.cfi_def_cfa_offset 40
pushq %r12
.cfi_def_cfa_offset 48
pushq %rbx
.cfi_def_cfa_offset 56
subq $24, %rsp
.cfi_def_cfa_offset 80
.cfi_offset %rbx, -56
.cfi_offset %r12, -48
.cfi_offset %r13, -40
.cfi_offset %r14, -32
.cfi_offset %r15, -24
.cfi_offset %rbp, -16
movq %rdi, %rbx
movl $.L.str.3, %esi
movl $numMatrizes, %edx
xorl %eax, %eax
callq __isoc23_fscanf
movslq numMatrizes(%rip), %r15
leaq (,%r15,4), %rax
leaq (%rax,%rax,8), %rdi
callq malloc
movq %rax, %r14
testq %r15, %r15
jle .LBB4_5
# %bb.1: # %.lr.ph.preheader
leaq 14(%rsp), %r15
xorl %ebp, %ebp
movq %r14, %r12
.p2align 4, 0x90
.LBB4_2: # %.lr.ph
# =>This Loop Header: Depth=1
# Child Loop BB4_3 Depth 2
movl $.L.str.4, %esi
movq %rbx, %rdi
movq %r15, %rdx
xorl %eax, %eax
callq __isoc23_fscanf
xorl %r13d, %r13d
.p2align 4, 0x90
.LBB4_3: # Parent Loop BB4_2 Depth=1
# => This Inner Loop Header: Depth=2
leaq (%r12,%r13), %rdx
movl $.L.str.3, %esi
movq %rbx, %rdi
xorl %eax, %eax
callq __isoc23_fscanf
addq $4, %r13
cmpl $36, %r13d
jne .LBB4_3
# %bb.4: # in Loop: Header=BB4_2 Depth=1
incl %ebp
addq %r13, %r12
cmpl numMatrizes(%rip), %ebp
jl .LBB4_2
.LBB4_5: # %._crit_edge
movq %r14, %rax
addq $24, %rsp
.cfi_def_cfa_offset 56
popq %rbx
.cfi_def_cfa_offset 48
popq %r12
.cfi_def_cfa_offset 40
popq %r13
.cfi_def_cfa_offset 32
popq %r14
.cfi_def_cfa_offset 24
popq %r15
.cfi_def_cfa_offset 16
popq %rbp
.cfi_def_cfa_offset 8
retq
.Lfunc_end4:
.size _Z20alocaMatrizesArquivoP8_IO_FILE, .Lfunc_end4-_Z20alocaMatrizesArquivoP8_IO_FILE
.cfi_endproc
# -- End function
.globl main # -- Begin function main
.p2align 4, 0x90
.type main,@function
main: # @main
.cfi_startproc
# %bb.0:
pushq %rbp
.cfi_def_cfa_offset 16
pushq %r15
.cfi_def_cfa_offset 24
pushq %r14
.cfi_def_cfa_offset 32
pushq %r13
.cfi_def_cfa_offset 40
pushq %r12
.cfi_def_cfa_offset 48
pushq %rbx
.cfi_def_cfa_offset 56
subq $24, %rsp
.cfi_def_cfa_offset 80
.cfi_offset %rbx, -56
.cfi_offset %r12, -48
.cfi_offset %r13, -40
.cfi_offset %r14, -32
.cfi_offset %r15, -24
.cfi_offset %rbp, -16
cmpl $2, %edi
jne .LBB5_1
# %bb.2:
movq 8(%rsi), %rdi
movl $.L.str.6, %esi
callq fopen
testq %rax, %rax
je .LBB5_3
# %bb.4:
movq %rax, %r14
movl $.L.str.3, %esi
movl $numMatrizes, %edx
movq %rax, %rdi
xorl %eax, %eax
callq __isoc23_fscanf
movslq numMatrizes(%rip), %r15
leaq (,%r15,4), %rax
leaq (%rax,%rax,8), %rdi
callq malloc
movq %rax, %rbx
testq %r15, %r15
jle .LBB5_9
# %bb.5: # %.lr.ph.i.preheader
leaq 8(%rsp), %r15
xorl %ebp, %ebp
movq %rbx, %r12
.p2align 4, 0x90
.LBB5_6: # %.lr.ph.i
# =>This Loop Header: Depth=1
# Child Loop BB5_7 Depth 2
movl $.L.str.4, %esi
movq %r14, %rdi
movq %r15, %rdx
xorl %eax, %eax
callq __isoc23_fscanf
xorl %r13d, %r13d
.p2align 4, 0x90
.LBB5_7: # Parent Loop BB5_6 Depth=1
# => This Inner Loop Header: Depth=2
leaq (%r12,%r13), %rdx
movl $.L.str.3, %esi
movq %r14, %rdi
xorl %eax, %eax
callq __isoc23_fscanf
addq $4, %r13
cmpl $36, %r13d
jne .LBB5_7
# %bb.8: # in Loop: Header=BB5_6 Depth=1
incl %ebp
addq %r13, %r12
cmpl numMatrizes(%rip), %ebp
jl .LBB5_6
.LBB5_9: # %_Z20alocaMatrizesArquivoP8_IO_FILE.exit
movq %r14, %rdi
callq fclose
movl numMatrizes(%rip), %eax
shll $2, %eax
leal (%rax,%rax,8), %eax
movslq %eax, %r14
leaq 8(%rsp), %rdi
movq %r14, %rsi
callq hipMalloc
movq 8(%rsp), %rdi
movq %rbx, %rsi
movq %r14, %rdx
movl $1, %ecx
callq hipMemcpy
movq 8(%rsp), %rdi
movl numMatrizes(%rip), %esi
callq _Z11menorMatrizPii
movq 8(%rsp), %rsi
movq %rbx, %rdi
movq %r14, %rdx
movl $2, %ecx
callq hipMemcpy
movq 8(%rsp), %rdi
callq hipFree
xorl %ebp, %ebp
movq %rbx, %r14
.p2align 4, 0x90
.LBB5_10: # %.preheader.i
# =>This Loop Header: Depth=1
# Child Loop BB5_11 Depth 2
xorl %r15d, %r15d
.p2align 4, 0x90
.LBB5_11: # Parent Loop BB5_10 Depth=1
# => This Inner Loop Header: Depth=2
movl (%r14,%r15), %esi
movl $.L.str, %edi
xorl %eax, %eax
callq printf
addq $4, %r15
cmpl $12, %r15d
jne .LBB5_11
# %bb.12: # in Loop: Header=BB5_10 Depth=1
movl $10, %edi
callq putchar@PLT
incl %ebp
addq %r15, %r14
cmpl $3, %ebp
jne .LBB5_10
# %bb.13: # %_Z7leituraPii.exit
movl $.Lstr, %edi
callq puts@PLT
movq %rbx, %rdi
callq free
jmp .LBB5_14
.LBB5_1:
movl $.Lstr.2, %edi
callq puts@PLT
.LBB5_14:
xorl %eax, %eax
.LBB5_15:
addq $24, %rsp
.cfi_def_cfa_offset 56
popq %rbx
.cfi_def_cfa_offset 48
popq %r12
.cfi_def_cfa_offset 40
popq %r13
.cfi_def_cfa_offset 32
popq %r14
.cfi_def_cfa_offset 24
popq %r15
.cfi_def_cfa_offset 16
popq %rbp
.cfi_def_cfa_offset 8
retq
.LBB5_3:
.cfi_def_cfa_offset 80
movl $.Lstr.1, %edi
callq puts@PLT
movl $1, %eax
jmp .LBB5_15
.Lfunc_end5:
.size main, .Lfunc_end5-main
.cfi_endproc
# -- End function
.p2align 4, 0x90 # -- Begin function __hip_module_ctor
.type __hip_module_ctor,@function
__hip_module_ctor: # @__hip_module_ctor
.cfi_startproc
# %bb.0:
subq $40, %rsp
.cfi_def_cfa_offset 48
cmpq $0, __hip_gpubin_handle(%rip)
jne .LBB6_2
# %bb.1:
movl $__hip_fatbin_wrapper, %edi
callq __hipRegisterFatBinary
movq %rax, __hip_gpubin_handle(%rip)
.LBB6_2:
movq __hip_gpubin_handle(%rip), %rdi
xorps %xmm0, %xmm0
movups %xmm0, 16(%rsp)
movups %xmm0, (%rsp)
movl $_Z10os_menoresPiii, %esi
movl $.L__unnamed_1, %edx
movl $.L__unnamed_1, %ecx
movl $-1, %r8d
xorl %r9d, %r9d
callq __hipRegisterFunction
movl $__hip_module_dtor, %edi
addq $40, %rsp
.cfi_def_cfa_offset 8
jmp atexit # TAILCALL
.Lfunc_end6:
.size __hip_module_ctor, .Lfunc_end6-__hip_module_ctor
.cfi_endproc
# -- End function
.p2align 4, 0x90 # -- Begin function __hip_module_dtor
.type __hip_module_dtor,@function
__hip_module_dtor: # @__hip_module_dtor
.cfi_startproc
# %bb.0:
movq __hip_gpubin_handle(%rip), %rdi
testq %rdi, %rdi
je .LBB7_2
# %bb.1:
pushq %rax
.cfi_def_cfa_offset 16
callq __hipUnregisterFatBinary
movq $0, __hip_gpubin_handle(%rip)
addq $8, %rsp
.cfi_def_cfa_offset 8
.LBB7_2:
retq
.Lfunc_end7:
.size __hip_module_dtor, .Lfunc_end7-__hip_module_dtor
.cfi_endproc
# -- End function
.type numMatrizes,@object # @numMatrizes
.bss
.globl numMatrizes
.p2align 2, 0x0
numMatrizes:
.long 0 # 0x0
.size numMatrizes, 4
.type _Z10os_menoresPiii,@object # @_Z10os_menoresPiii
.section .rodata,"a",@progbits
.globl _Z10os_menoresPiii
.p2align 3, 0x0
_Z10os_menoresPiii:
.quad _Z25__device_stub__os_menoresPiii
.size _Z10os_menoresPiii, 8
.type .L.str,@object # @.str
.section .rodata.str1.1,"aMS",@progbits,1
.L.str:
.asciz "%d\t"
.size .L.str, 4
.type .L.str.3,@object # @.str.3
.L.str.3:
.asciz "%d"
.size .L.str.3, 3
.type .L.str.4,@object # @.str.4
.L.str.4:
.asciz "%s"
.size .L.str.4, 3
.type .L.str.6,@object # @.str.6
.L.str.6:
.asciz "r"
.size .L.str.6, 2
.type .L__unnamed_1,@object # @0
.L__unnamed_1:
.asciz "_Z10os_menoresPiii"
.size .L__unnamed_1, 19
.type __hip_fatbin_wrapper,@object # @__hip_fatbin_wrapper
.section .hipFatBinSegment,"a",@progbits
.p2align 3, 0x0
__hip_fatbin_wrapper:
.long 1212764230 # 0x48495046
.long 1 # 0x1
.quad __hip_fatbin
.quad 0
.size __hip_fatbin_wrapper, 24
.type __hip_gpubin_handle,@object # @__hip_gpubin_handle
.local __hip_gpubin_handle
.comm __hip_gpubin_handle,8,8
.section .init_array,"aw",@init_array
.p2align 3, 0x0
.quad __hip_module_ctor
.type __hip_cuid_,@object # @__hip_cuid_
.bss
.globl __hip_cuid_
__hip_cuid_:
.byte 0 # 0x0
.size __hip_cuid_, 1
.type .Lstr,@object # @str
.section .rodata.str1.1,"aMS",@progbits,1
.Lstr:
.asciz "********************"
.size .Lstr, 21
.type .Lstr.1,@object # @str.1
.Lstr.1:
.asciz "Deu ruim pra abrir o arquivo"
.size .Lstr.1, 29
.type .Lstr.2,@object # @str.2
.Lstr.2:
.asciz "Argumento do programa: nome do arquivo"
.size .Lstr.2, 39
.section ".linker-options","e",@llvm_linker_options
.ident "AMD clang version 18.0.0git (https://github.com/RadeonOpenCompute/llvm-project roc-6.3.2 25012 e5bf7e55c91490b07c49d8960fa7983d864936c4)"
.section ".note.GNU-stack","",@progbits
.addrsig
.addrsig_sym _Z25__device_stub__os_menoresPiii
.addrsig_sym __hip_module_ctor
.addrsig_sym __hip_module_dtor
.addrsig_sym numMatrizes
.addrsig_sym _Z10os_menoresPiii
.addrsig_sym __hip_fatbin
.addrsig_sym __hip_fatbin_wrapper
.addrsig_sym __hip_cuid_ |
You are a helpful coding assistant specialized in converting from CUDA device assembly to AMD device assembly. | code for sm_80
Function : _Z10os_menoresPiii
.headerflags @"EF_CUDA_TEXMODE_UNIFIED EF_CUDA_64BIT_ADDRESS EF_CUDA_SM80 EF_CUDA_VIRTUAL_SM(EF_CUDA_SM80)"
/*0000*/ IMAD.MOV.U32 R1, RZ, RZ, c[0x0][0x28] ; /* 0x00000a00ff017624 */
/* 0x000fe400078e00ff */
/*0010*/ S2R R0, SR_CTAID.X ; /* 0x0000000000007919 */
/* 0x000e280000002500 */
/*0020*/ S2R R3, SR_TID.X ; /* 0x0000000000037919 */
/* 0x000e240000002100 */
/*0030*/ IMAD R0, R0, c[0x0][0x0], R3 ; /* 0x0000000000007a24 */
/* 0x001fca00078e0203 */
/*0040*/ ISETP.GE.AND P0, PT, R0, c[0x0][0x168], PT ; /* 0x00005a0000007a0c */
/* 0x000fda0003f06270 */
/*0050*/ @P0 EXIT ; /* 0x000000000000094d */
/* 0x000fea0003800000 */
/*0060*/ I2F.U32.RP R5, c[0x0][0x16c] ; /* 0x00005b0000057b06 */
/* 0x000e220000209000 */
/*0070*/ LOP3.LUT R4, RZ, R0, RZ, 0x33, !PT ; /* 0x00000000ff047212 */
/* 0x000fe200078e33ff */
/*0080*/ ULDC.64 UR4, c[0x0][0x118] ; /* 0x0000460000047ab9 */
/* 0x000fe20000000a00 */
/*0090*/ ISETP.NE.U32.AND P2, PT, RZ, c[0x0][0x16c], PT ; /* 0x00005b00ff007a0c */
/* 0x000fe20003f45070 */
/*00a0*/ BSSY B0, 0x310 ; /* 0x0000026000007945 */
/* 0x000fe20003800000 */
/*00b0*/ IADD3 R4, R4, c[0x0][0x168], RZ ; /* 0x00005a0004047a10 */
/* 0x000fc60007ffe0ff */
/*00c0*/ MUFU.RCP R5, R5 ; /* 0x0000000500057308 */
/* 0x001e240000001000 */
/*00d0*/ IADD3 R2, R5, 0xffffffe, RZ ; /* 0x0ffffffe05027810 */
/* 0x001fcc0007ffe0ff */
/*00e0*/ F2I.FTZ.U32.TRUNC.NTZ R3, R2 ; /* 0x0000000200037305 */
/* 0x000064000021f000 */
/*00f0*/ IMAD.MOV.U32 R2, RZ, RZ, RZ ; /* 0x000000ffff027224 */
/* 0x001fe400078e00ff */
/*0100*/ IMAD.MOV R7, RZ, RZ, -R3 ; /* 0x000000ffff077224 */
/* 0x002fc800078e0a03 */
/*0110*/ IMAD R7, R7, c[0x0][0x16c], RZ ; /* 0x00005b0007077a24 */
/* 0x000fc800078e02ff */
/*0120*/ IMAD.HI.U32 R3, R3, R7, R2 ; /* 0x0000000703037227 */
/* 0x000fcc00078e0002 */
/*0130*/ IMAD.HI.U32 R3, R3, R4, RZ ; /* 0x0000000403037227 */
/* 0x000fca00078e00ff */
/*0140*/ IADD3 R5, -R3, RZ, RZ ; /* 0x000000ff03057210 */
/* 0x000fca0007ffe1ff */
/*0150*/ IMAD R4, R5, c[0x0][0x16c], R4 ; /* 0x00005b0005047a24 */
/* 0x000fca00078e0204 */
/*0160*/ ISETP.GE.U32.AND P0, PT, R4, c[0x0][0x16c], PT ; /* 0x00005b0004007a0c */
/* 0x000fda0003f06070 */
/*0170*/ @P0 IADD3 R4, R4, -c[0x0][0x16c], RZ ; /* 0x80005b0004040a10 */
/* 0x000fe40007ffe0ff */
/*0180*/ @P0 IADD3 R3, R3, 0x1, RZ ; /* 0x0000000103030810 */
/* 0x000fe40007ffe0ff */
/*0190*/ ISETP.GE.U32.AND P1, PT, R4, c[0x0][0x16c], PT ; /* 0x00005b0004007a0c */
/* 0x000fda0003f26070 */
/*01a0*/ @P1 IADD3 R3, R3, 0x1, RZ ; /* 0x0000000103031810 */
/* 0x000fe40007ffe0ff */
/*01b0*/ @!P2 LOP3.LUT R3, RZ, c[0x0][0x16c], RZ, 0x33, !PT ; /* 0x00005b00ff03aa12 */
/* 0x000fc800078e33ff */
/*01c0*/ IADD3 R2, R3.reuse, 0x1, RZ ; /* 0x0000000103027810 */
/* 0x040fe40007ffe0ff */
/*01d0*/ ISETP.GE.U32.AND P0, PT, R3, 0x3, PT ; /* 0x000000030300780c */
/* 0x000fe20003f06070 */
/*01e0*/ IMAD.MOV.U32 R3, RZ, RZ, 0x4 ; /* 0x00000004ff037424 */
/* 0x000fe200078e00ff */
/*01f0*/ LOP3.LUT P1, R4, R2, 0x3, RZ, 0xc0, !PT ; /* 0x0000000302047812 */
/* 0x000fc6000782c0ff */
/*0200*/ IMAD.WIDE R2, R0, R3, c[0x0][0x160] ; /* 0x0000580000027625 */
/* 0x000fd400078e0203 */
/*0210*/ @!P1 BRA 0x300 ; /* 0x000000e000009947 */
/* 0x000fea0003800000 */
/*0220*/ LDG.E R7, [R2.64] ; /* 0x0000000402077981 */
/* 0x000162000c1e1900 */
/*0230*/ IMAD.MOV.U32 R6, RZ, RZ, R4 ; /* 0x000000ffff067224 */
/* 0x000fe200078e0004 */
/*0240*/ MOV R5, R3 ; /* 0x0000000300057202 */
/* 0x000fe20000000f00 */
/*0250*/ IMAD.MOV.U32 R4, RZ, RZ, R2 ; /* 0x000000ffff047224 */
/* 0x000fca00078e0002 */
/*0260*/ LDG.E R8, [R4.64] ; /* 0x0000000404087981 */
/* 0x0022a2000c1e1900 */
/*0270*/ IADD3 R6, R6, -0x1, RZ ; /* 0xffffffff06067810 */
/* 0x000fe20007ffe0ff */
/*0280*/ IMAD.MOV.U32 R9, RZ, RZ, 0x4 ; /* 0x00000004ff097424 */
/* 0x000fe200078e00ff */
/*0290*/ IADD3 R0, R0, c[0x0][0x16c], RZ ; /* 0x00005b0000007a10 */
/* 0x000fe40007ffe0ff */
/*02a0*/ ISETP.NE.AND P2, PT, R6, RZ, PT ; /* 0x000000ff0600720c */
/* 0x000fe20003f45270 */
/*02b0*/ IMAD.WIDE R4, R9, c[0x0][0x16c], R4 ; /* 0x00005b0009047a25 */
/* 0x002fe200078e0204 */
/*02c0*/ ISETP.GT.AND P1, PT, R7, R8, PT ; /* 0x000000080700720c */
/* 0x024fda0003f24270 */
/*02d0*/ @P1 STG.E [R2.64], R8 ; /* 0x0000000802001986 */
/* 0x0003e2000c101904 */
/*02e0*/ @P1 IMAD.MOV.U32 R7, RZ, RZ, R8 ; /* 0x000000ffff071224 */
/* 0x000fe200078e0008 */
/*02f0*/ @P2 BRA 0x260 ; /* 0xffffff6000002947 */
/* 0x000fea000383ffff */
/*0300*/ BSYNC B0 ; /* 0x0000000000007941 */
/* 0x000fea0003800000 */
/*0310*/ @!P0 EXIT ; /* 0x000000000000894d */
/* 0x000fea0003800000 */
/*0320*/ LDG.E R10, [R2.64] ; /* 0x00000004020a7981 */
/* 0x000564000c1e1900 */
/*0330*/ IMAD.MOV.U32 R17, RZ, RZ, 0x4 ; /* 0x00000004ff117424 */
/* 0x000fc800078e00ff */
/*0340*/ IMAD.WIDE R4, R0, R17, c[0x0][0x160] ; /* 0x0000580000047625 */
/* 0x002fca00078e0211 */
/*0350*/ LDG.E R11, [R4.64] ; /* 0x00000004040b7981 */
/* 0x000ee2000c1e1900 */
/*0360*/ IMAD.WIDE R6, R17, c[0x0][0x16c], R4 ; /* 0x00005b0011067a25 */
/* 0x000fe200078e0204 */
/*0370*/ ISETP.GT.AND P0, PT, R10, R11, PT ; /* 0x0000000b0a00720c */
/* 0x028fda0003f04270 */
/*0380*/ @P0 STG.E [R2.64], R11 ; /* 0x0000000b02000986 */
/* 0x0007e8000c101904 */
/*0390*/ LDG.E R13, [R6.64] ; /* 0x00000004060d7981 */
/* 0x000f22000c1e1900 */
/*03a0*/ @P0 MOV R10, R11 ; /* 0x0000000b000a0202 */
/* 0x000fe20000000f00 */
/*03b0*/ IMAD.WIDE R8, R17, c[0x0][0x16c], R6 ; /* 0x00005b0011087a25 */
/* 0x002fc600078e0206 */
/*03c0*/ ISETP.GT.AND P0, PT, R10, R13, PT ; /* 0x0000000d0a00720c */
/* 0x010fda0003f04270 */
/*03d0*/ @P0 STG.E [R2.64], R13 ; /* 0x0000000d02000986 */
/* 0x0003e8000c101904 */
/*03e0*/ LDG.E R15, [R8.64] ; /* 0x00000004080f7981 */
/* 0x000f22000c1e1900 */
/*03f0*/ @P0 IMAD.MOV.U32 R10, RZ, RZ, R13 ; /* 0x000000ffff0a0224 */
/* 0x000fe400078e000d */
/*0400*/ IMAD.WIDE R4, R17, c[0x0][0x16c], R8 ; /* 0x00005b0011047a25 */
/* 0x000fc600078e0208 */
/*0410*/ ISETP.GT.AND P0, PT, R10, R15, PT ; /* 0x0000000f0a00720c */
/* 0x010fda0003f04270 */
/*0420*/ @P0 STG.E [R2.64], R15 ; /* 0x0000000f02000986 */
/* 0x0003e8000c101904 */
/*0430*/ LDG.E R5, [R4.64] ; /* 0x0000000404057981 */
/* 0x000f22000c1e1900 */
/*0440*/ @P0 IMAD.MOV.U32 R10, RZ, RZ, R15 ; /* 0x000000ffff0a0224 */
/* 0x000fe200078e000f */
/*0450*/ MOV R7, c[0x0][0x16c] ; /* 0x00005b0000077a02 */
/* 0x000fe20000000f00 */
/*0460*/ IMAD.MOV.U32 R11, RZ, RZ, c[0x0][0x16c] ; /* 0x00005b00ff0b7624 */
/* 0x008fc800078e00ff */
/*0470*/ IMAD R0, R7, 0x2, R0 ; /* 0x0000000207007824 */
/* 0x000fca00078e0200 */
/*0480*/ LEA R0, R11, R0, 0x1 ; /* 0x000000000b007211 */
/* 0x000fc800078e08ff */
/*0490*/ ISETP.GE.AND P1, PT, R0, c[0x0][0x168], PT ; /* 0x00005a0000007a0c */
/* 0x000fe40003f26270 */
/*04a0*/ ISETP.GT.AND P0, PT, R10, R5, PT ; /* 0x000000050a00720c */
/* 0x010fda0003f04270 */
/*04b0*/ @P0 STG.E [R2.64], R5 ; /* 0x0000000502000986 */
/* 0x0003e2000c101904 */
/*04c0*/ @P0 IMAD.MOV.U32 R10, RZ, RZ, R5 ; /* 0x000000ffff0a0224 */
/* 0x000fe200078e0005 */
/*04d0*/ @!P1 BRA 0x330 ; /* 0xfffffe5000009947 */
/* 0x000fea000383ffff */
/*04e0*/ EXIT ; /* 0x000000000000794d */
/* 0x000fea0003800000 */
/*04f0*/ BRA 0x4f0; /* 0xfffffff000007947 */
/* 0x000fc0000383ffff */
/*0500*/ NOP; /* 0x0000000000007918 */
/* 0x000fc00000000000 */
/*0510*/ NOP; /* 0x0000000000007918 */
/* 0x000fc00000000000 */
/*0520*/ NOP; /* 0x0000000000007918 */
/* 0x000fc00000000000 */
/*0530*/ NOP; /* 0x0000000000007918 */
/* 0x000fc00000000000 */
/*0540*/ NOP; /* 0x0000000000007918 */
/* 0x000fc00000000000 */
/*0550*/ NOP; /* 0x0000000000007918 */
/* 0x000fc00000000000 */
/*0560*/ NOP; /* 0x0000000000007918 */
/* 0x000fc00000000000 */
/*0570*/ NOP; /* 0x0000000000007918 */
/* 0x000fc00000000000 */
.......... | .text
.amdgcn_target "amdgcn-amd-amdhsa--gfx1100"
.protected _Z10os_menoresPiii
.globl _Z10os_menoresPiii
.p2align 8
.type _Z10os_menoresPiii,@function
_Z10os_menoresPiii:
s_clause 0x1
s_load_b32 s2, s[0:1], 0x1c
s_load_b32 s6, s[0:1], 0x8
s_waitcnt lgkmcnt(0)
s_and_b32 s2, s2, 0xffff
s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
v_mad_u64_u32 v[1:2], null, s15, s2, v[0:1]
s_mov_b32 s2, exec_lo
v_cmpx_gt_i32_e64 s6, v1
s_cbranch_execz .LBB0_5
s_clause 0x1
s_load_b64 s[4:5], s[0:1], 0x0
s_load_b32 s2, s[0:1], 0xc
v_ashrrev_i32_e32 v2, 31, v1
s_mov_b32 s1, 0
s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
v_lshlrev_b64 v[2:3], 2, v[1:2]
s_waitcnt lgkmcnt(0)
v_add_co_u32 v2, vcc_lo, s4, v2
s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(SALU_CYCLE_1)
v_add_co_ci_u32_e32 v3, vcc_lo, s5, v3, vcc_lo
s_ashr_i32 s3, s2, 31
s_lshl_b64 s[4:5], s[2:3], 2
global_load_b32 v0, v[2:3], off
v_dual_mov_b32 v5, v3 :: v_dual_mov_b32 v4, v2
s_branch .LBB0_3
.p2align 6
.LBB0_2:
s_or_b32 exec_lo, exec_lo, s0
v_add_nc_u32_e32 v1, s2, v1
v_add_co_u32 v4, s0, v4, s4
s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_3)
v_add_co_ci_u32_e64 v5, s0, s5, v5, s0
v_cmp_le_i32_e32 vcc_lo, s6, v1
s_or_b32 s1, vcc_lo, s1
s_delay_alu instid0(SALU_CYCLE_1)
s_and_not1_b32 exec_lo, exec_lo, s1
s_cbranch_execz .LBB0_5
.LBB0_3:
global_load_b32 v6, v[4:5], off
s_mov_b32 s0, exec_lo
s_waitcnt vmcnt(0)
v_cmpx_gt_i32_e64 v0, v6
s_cbranch_execz .LBB0_2
v_mov_b32_e32 v0, v6
global_store_b32 v[2:3], v6, off
s_branch .LBB0_2
.LBB0_5:
s_nop 0
s_sendmsg sendmsg(MSG_DEALLOC_VGPRS)
s_endpgm
.section .rodata,"a",@progbits
.p2align 6, 0x0
.amdhsa_kernel _Z10os_menoresPiii
.amdhsa_group_segment_fixed_size 0
.amdhsa_private_segment_fixed_size 0
.amdhsa_kernarg_size 272
.amdhsa_user_sgpr_count 15
.amdhsa_user_sgpr_dispatch_ptr 0
.amdhsa_user_sgpr_queue_ptr 0
.amdhsa_user_sgpr_kernarg_segment_ptr 1
.amdhsa_user_sgpr_dispatch_id 0
.amdhsa_user_sgpr_private_segment_size 0
.amdhsa_wavefront_size32 1
.amdhsa_uses_dynamic_stack 0
.amdhsa_enable_private_segment 0
.amdhsa_system_sgpr_workgroup_id_x 1
.amdhsa_system_sgpr_workgroup_id_y 0
.amdhsa_system_sgpr_workgroup_id_z 0
.amdhsa_system_sgpr_workgroup_info 0
.amdhsa_system_vgpr_workitem_id 0
.amdhsa_next_free_vgpr 7
.amdhsa_next_free_sgpr 16
.amdhsa_float_round_mode_32 0
.amdhsa_float_round_mode_16_64 0
.amdhsa_float_denorm_mode_32 3
.amdhsa_float_denorm_mode_16_64 3
.amdhsa_dx10_clamp 1
.amdhsa_ieee_mode 1
.amdhsa_fp16_overflow 0
.amdhsa_workgroup_processor_mode 1
.amdhsa_memory_ordered 1
.amdhsa_forward_progress 0
.amdhsa_shared_vgpr_count 0
.amdhsa_exception_fp_ieee_invalid_op 0
.amdhsa_exception_fp_denorm_src 0
.amdhsa_exception_fp_ieee_div_zero 0
.amdhsa_exception_fp_ieee_overflow 0
.amdhsa_exception_fp_ieee_underflow 0
.amdhsa_exception_fp_ieee_inexact 0
.amdhsa_exception_int_div_zero 0
.end_amdhsa_kernel
.text
.Lfunc_end0:
.size _Z10os_menoresPiii, .Lfunc_end0-_Z10os_menoresPiii
.section .AMDGPU.csdata,"",@progbits
.text
.p2alignl 7, 3214868480
.fill 96, 4, 3214868480
.type __hip_cuid_,@object
.section .bss,"aw",@nobits
.globl __hip_cuid_
__hip_cuid_:
.byte 0
.size __hip_cuid_, 1
.ident "AMD clang version 18.0.0git (https://github.com/RadeonOpenCompute/llvm-project roc-6.3.2 25012 e5bf7e55c91490b07c49d8960fa7983d864936c4)"
.section ".note.GNU-stack","",@progbits
.addrsig
.addrsig_sym __hip_cuid_
.amdgpu_metadata
---
amdhsa.kernels:
- .args:
- .address_space: global
.offset: 0
.size: 8
.value_kind: global_buffer
- .offset: 8
.size: 4
.value_kind: by_value
- .offset: 12
.size: 4
.value_kind: by_value
- .offset: 16
.size: 4
.value_kind: hidden_block_count_x
- .offset: 20
.size: 4
.value_kind: hidden_block_count_y
- .offset: 24
.size: 4
.value_kind: hidden_block_count_z
- .offset: 28
.size: 2
.value_kind: hidden_group_size_x
- .offset: 30
.size: 2
.value_kind: hidden_group_size_y
- .offset: 32
.size: 2
.value_kind: hidden_group_size_z
- .offset: 34
.size: 2
.value_kind: hidden_remainder_x
- .offset: 36
.size: 2
.value_kind: hidden_remainder_y
- .offset: 38
.size: 2
.value_kind: hidden_remainder_z
- .offset: 56
.size: 8
.value_kind: hidden_global_offset_x
- .offset: 64
.size: 8
.value_kind: hidden_global_offset_y
- .offset: 72
.size: 8
.value_kind: hidden_global_offset_z
- .offset: 80
.size: 2
.value_kind: hidden_grid_dims
.group_segment_fixed_size: 0
.kernarg_segment_align: 8
.kernarg_segment_size: 272
.language: OpenCL C
.language_version:
- 2
- 0
.max_flat_workgroup_size: 1024
.name: _Z10os_menoresPiii
.private_segment_fixed_size: 0
.sgpr_count: 18
.sgpr_spill_count: 0
.symbol: _Z10os_menoresPiii.kd
.uniform_work_group_size: 1
.uses_dynamic_stack: false
.vgpr_count: 7
.vgpr_spill_count: 0
.wavefront_size: 32
.workgroup_processor_mode: 1
amdhsa.target: amdgcn-amd-amdhsa--gfx1100
amdhsa.version:
- 1
- 2
...
.end_amdgpu_metadata |
You are a helpful coding assistant specialized in converting from CUDA host assembly to AMD host assembly. | .file "tmpxft_0013f589_00000000-6_ep.cudafe1.cpp"
.text
#APP
#NO_APP
.type _ZL26__cudaUnregisterBinaryUtilv, @function
_ZL26__cudaUnregisterBinaryUtilv:
.LFB2064:
.cfi_startproc
endbr64
subq $8, %rsp
.cfi_def_cfa_offset 16
movq _ZL20__cudaFatCubinHandle(%rip), %rdi
call __cudaUnregisterFatBinary@PLT
addq $8, %rsp
.cfi_def_cfa_offset 8
ret
.cfi_endproc
.LFE2064:
.size _ZL26__cudaUnregisterBinaryUtilv, .-_ZL26__cudaUnregisterBinaryUtilv
.section .rodata.str1.1,"aMS",@progbits,1
.LC0:
.string "%d\t"
.LC1:
.string "\n"
.LC2:
.string "********************\n"
.text
.globl _Z7leituraPii
.type _Z7leituraPii, @function
_Z7leituraPii:
.LFB2057:
.cfi_startproc
endbr64
testl %esi, %esi
jle .L10
pushq %r15
.cfi_def_cfa_offset 16
.cfi_offset 15, -16
pushq %r14
.cfi_def_cfa_offset 24
.cfi_offset 14, -24
pushq %r13
.cfi_def_cfa_offset 32
.cfi_offset 13, -32
pushq %r12
.cfi_def_cfa_offset 40
.cfi_offset 12, -40
pushq %rbp
.cfi_def_cfa_offset 48
.cfi_offset 6, -48
pushq %rbx
.cfi_def_cfa_offset 56
.cfi_offset 3, -56
subq $8, %rsp
.cfi_def_cfa_offset 64
leaq 12(%rdi), %rbp
leal (%rsi,%rsi,2), %r15d
movl $0, %r12d
leaq .LC0(%rip), %r13
leaq .LC1(%rip), %r14
jmp .L5
.L7:
addq $12, %rbp
cmpl %r15d, %r12d
je .L3
.L5:
leaq -12(%rbp), %rbx
.L6:
addq $4, %rbx
movl -4(%rbx), %edx
movq %r13, %rsi
movl $2, %edi
movl $0, %eax
call __printf_chk@PLT
cmpq %rbp, %rbx
jne .L6
movq %r14, %rsi
movl $2, %edi
movl $0, %eax
call __printf_chk@PLT
addl $1, %r12d
movslq %r12d, %rax
imulq $1431655766, %rax, %rax
shrq $32, %rax
movl %r12d, %edx
sarl $31, %edx
subl %edx, %eax
leal (%rax,%rax,2), %eax
cmpl %eax, %r12d
jne .L7
leaq .LC2(%rip), %rsi
movl $2, %edi
movl $0, %eax
call __printf_chk@PLT
jmp .L7
.L3:
addq $8, %rsp
.cfi_def_cfa_offset 56
popq %rbx
.cfi_def_cfa_offset 48
popq %rbp
.cfi_def_cfa_offset 40
popq %r12
.cfi_def_cfa_offset 32
popq %r13
.cfi_def_cfa_offset 24
popq %r14
.cfi_def_cfa_offset 16
popq %r15
.cfi_def_cfa_offset 8
ret
.L10:
.cfi_restore 3
.cfi_restore 6
.cfi_restore 12
.cfi_restore 13
.cfi_restore 14
.cfi_restore 15
ret
.cfi_endproc
.LFE2057:
.size _Z7leituraPii, .-_Z7leituraPii
.section .rodata.str1.1
.LC3:
.string "%d"
.LC4:
.string "%s"
.text
.globl _Z20alocaMatrizesArquivoP8_IO_FILE
.type _Z20alocaMatrizesArquivoP8_IO_FILE, @function
_Z20alocaMatrizesArquivoP8_IO_FILE:
.LFB2060:
.cfi_startproc
endbr64
pushq %r15
.cfi_def_cfa_offset 16
.cfi_offset 15, -16
pushq %r14
.cfi_def_cfa_offset 24
.cfi_offset 14, -24
pushq %r13
.cfi_def_cfa_offset 32
.cfi_offset 13, -32
pushq %r12
.cfi_def_cfa_offset 40
.cfi_offset 12, -40
pushq %rbp
.cfi_def_cfa_offset 48
.cfi_offset 6, -48
pushq %rbx
.cfi_def_cfa_offset 56
.cfi_offset 3, -56
subq $56, %rsp
.cfi_def_cfa_offset 112
movq %rdi, %r12
movq %fs:40, %rax
movq %rax, 40(%rsp)
xorl %eax, %eax
leaq numMatrizes(%rip), %rdx
leaq .LC3(%rip), %rsi
call __isoc23_fscanf@PLT
movl numMatrizes(%rip), %ebx
leal (%rbx,%rbx,8), %edi
movslq %edi, %rdi
salq $2, %rdi
call malloc@PLT
movq %rax, 8(%rsp)
testl %ebx, %ebx
jle .L13
leaq 36(%rax), %rbp
movl $0, %r14d
leaq 30(%rsp), %r15
leaq .LC3(%rip), %r13
.L16:
leaq -36(%rbp), %rbx
movq %r15, %rdx
leaq .LC4(%rip), %rsi
movq %r12, %rdi
movl $0, %eax
call __isoc23_fscanf@PLT
.L15:
movq %rbx, %rdx
addq $4, %rbx
movq %r13, %rsi
movq %r12, %rdi
movl $0, %eax
call __isoc23_fscanf@PLT
cmpq %rbp, %rbx
jne .L15
addl $1, %r14d
addq $36, %rbp
cmpl %r14d, numMatrizes(%rip)
jg .L16
.L13:
movq 40(%rsp), %rax
subq %fs:40, %rax
jne .L21
movq 8(%rsp), %rax
addq $56, %rsp
.cfi_remember_state
.cfi_def_cfa_offset 56
popq %rbx
.cfi_def_cfa_offset 48
popq %rbp
.cfi_def_cfa_offset 40
popq %r12
.cfi_def_cfa_offset 32
popq %r13
.cfi_def_cfa_offset 24
popq %r14
.cfi_def_cfa_offset 16
popq %r15
.cfi_def_cfa_offset 8
ret
.L21:
.cfi_restore_state
call __stack_chk_fail@PLT
.cfi_endproc
.LFE2060:
.size _Z20alocaMatrizesArquivoP8_IO_FILE, .-_Z20alocaMatrizesArquivoP8_IO_FILE
.globl _Z32__device_stub__Z10os_menoresPiiiPiii
.type _Z32__device_stub__Z10os_menoresPiiiPiii, @function
_Z32__device_stub__Z10os_menoresPiiiPiii:
.LFB2086:
.cfi_startproc
endbr64
subq $120, %rsp
.cfi_def_cfa_offset 128
movq %rdi, 8(%rsp)
movl %esi, 4(%rsp)
movl %edx, (%rsp)
movq %fs:40, %rax
movq %rax, 104(%rsp)
xorl %eax, %eax
leaq 8(%rsp), %rax
movq %rax, 80(%rsp)
leaq 4(%rsp), %rax
movq %rax, 88(%rsp)
movq %rsp, %rax
movq %rax, 96(%rsp)
movl $1, 32(%rsp)
movl $1, 36(%rsp)
movl $1, 40(%rsp)
movl $1, 44(%rsp)
movl $1, 48(%rsp)
movl $1, 52(%rsp)
leaq 24(%rsp), %rcx
leaq 16(%rsp), %rdx
leaq 44(%rsp), %rsi
leaq 32(%rsp), %rdi
call __cudaPopCallConfiguration@PLT
testl %eax, %eax
je .L26
.L22:
movq 104(%rsp), %rax
subq %fs:40, %rax
jne .L27
addq $120, %rsp
.cfi_remember_state
.cfi_def_cfa_offset 8
ret
.L26:
.cfi_restore_state
pushq 24(%rsp)
.cfi_def_cfa_offset 136
pushq 24(%rsp)
.cfi_def_cfa_offset 144
leaq 96(%rsp), %r9
movq 60(%rsp), %rcx
movl 68(%rsp), %r8d
movq 48(%rsp), %rsi
movl 56(%rsp), %edx
leaq _Z10os_menoresPiii(%rip), %rdi
call cudaLaunchKernel@PLT
addq $16, %rsp
.cfi_def_cfa_offset 128
jmp .L22
.L27:
call __stack_chk_fail@PLT
.cfi_endproc
.LFE2086:
.size _Z32__device_stub__Z10os_menoresPiiiPiii, .-_Z32__device_stub__Z10os_menoresPiiiPiii
.globl _Z10os_menoresPiii
.type _Z10os_menoresPiii, @function
_Z10os_menoresPiii:
.LFB2087:
.cfi_startproc
endbr64
subq $8, %rsp
.cfi_def_cfa_offset 16
call _Z32__device_stub__Z10os_menoresPiiiPiii
addq $8, %rsp
.cfi_def_cfa_offset 8
ret
.cfi_endproc
.LFE2087:
.size _Z10os_menoresPiii, .-_Z10os_menoresPiii
.globl _Z11menorMatrizPii
.type _Z11menorMatrizPii, @function
_Z11menorMatrizPii:
.LFB2058:
.cfi_startproc
endbr64
cmpl $1, %esi
jle .L36
pushq %r14
.cfi_def_cfa_offset 16
.cfi_offset 14, -16
pushq %r13
.cfi_def_cfa_offset 24
.cfi_offset 13, -24
pushq %r12
.cfi_def_cfa_offset 32
.cfi_offset 12, -32
pushq %rbp
.cfi_def_cfa_offset 40
.cfi_offset 6, -40
pushq %rbx
.cfi_def_cfa_offset 48
.cfi_offset 3, -48
subq $32, %rsp
.cfi_def_cfa_offset 80
movq %rdi, %r12
movl %esi, %ebx
cmpl $90, %esi
jle .L34
leal (%rsi,%rsi,8), %eax
movslq %eax, %rbp
imulq $-222702007, %rbp, %rbp
shrq $32, %rbp
addl %eax, %ebp
sarl $8, %ebp
sarl $31, %eax
subl %eax, %ebp
leal 0(%rbp,%rbp,2), %r14d
movl $27, %r13d
jmp .L32
.L34:
movl $9, %r13d
movl $1, %r14d
movl $1, %ebp
.L32:
movl %r13d, 20(%rsp)
movl $1, 24(%rsp)
movl %ebp, 8(%rsp)
movl $1, 12(%rsp)
movl $0, %r9d
movl $0, %r8d
movq 20(%rsp), %rdx
movl $1, %ecx
movq 8(%rsp), %rdi
movl $1, %esi
call __cudaPushCallConfiguration@PLT
testl %eax, %eax
je .L39
.L33:
call cudaDeviceSynchronize@PLT
movl %r14d, %esi
movq %r12, %rdi
call _Z11menorMatrizPii
addq $32, %rsp
.cfi_remember_state
.cfi_def_cfa_offset 48
popq %rbx
.cfi_def_cfa_offset 40
popq %rbp
.cfi_def_cfa_offset 32
popq %r12
.cfi_def_cfa_offset 24
popq %r13
.cfi_def_cfa_offset 16
popq %r14
.cfi_def_cfa_offset 8
ret
.L39:
.cfi_restore_state
movl %ebp, %edx
imull %r13d, %edx
leal (%rbx,%rbx,8), %esi
movq %r12, %rdi
call _Z32__device_stub__Z10os_menoresPiiiPiii
jmp .L33
.L36:
.cfi_def_cfa_offset 8
.cfi_restore 3
.cfi_restore 6
.cfi_restore 12
.cfi_restore 13
.cfi_restore 14
ret
.cfi_endproc
.LFE2058:
.size _Z11menorMatrizPii, .-_Z11menorMatrizPii
.globl _Z19encontraMenorMatrizPi
.type _Z19encontraMenorMatrizPi, @function
_Z19encontraMenorMatrizPi:
.LFB2059:
.cfi_startproc
endbr64
pushq %rbp
.cfi_def_cfa_offset 16
.cfi_offset 6, -16
pushq %rbx
.cfi_def_cfa_offset 24
.cfi_offset 3, -24
subq $24, %rsp
.cfi_def_cfa_offset 48
movq %rdi, %rbp
movq %fs:40, %rax
movq %rax, 8(%rsp)
xorl %eax, %eax
movl numMatrizes(%rip), %eax
leal (%rax,%rax,8), %ebx
sall $2, %ebx
movslq %ebx, %rbx
movq %rsp, %rdi
movq %rbx, %rsi
call cudaMalloc@PLT
movl $1, %ecx
movq %rbx, %rdx
movq %rbp, %rsi
movq (%rsp), %rdi
call cudaMemcpy@PLT
movl numMatrizes(%rip), %esi
movq (%rsp), %rdi
call _Z11menorMatrizPii
movl $2, %ecx
movq %rbx, %rdx
movq (%rsp), %rsi
movq %rbp, %rdi
call cudaMemcpy@PLT
movq (%rsp), %rdi
call cudaFree@PLT
movq 8(%rsp), %rax
subq %fs:40, %rax
jne .L43
addq $24, %rsp
.cfi_remember_state
.cfi_def_cfa_offset 24
popq %rbx
.cfi_def_cfa_offset 16
popq %rbp
.cfi_def_cfa_offset 8
ret
.L43:
.cfi_restore_state
call __stack_chk_fail@PLT
.cfi_endproc
.LFE2059:
.size _Z19encontraMenorMatrizPi, .-_Z19encontraMenorMatrizPi
.section .rodata.str1.8,"aMS",@progbits,1
.align 8
.LC5:
.string "Argumento do programa: nome do arquivo\n"
.section .rodata.str1.1
.LC6:
.string "r"
.LC7:
.string "Deu ruim pra abrir o arquivo\n"
.text
.globl main
.type main, @function
main:
.LFB2061:
.cfi_startproc
endbr64
pushq %rbp
.cfi_def_cfa_offset 16
.cfi_offset 6, -16
pushq %rbx
.cfi_def_cfa_offset 24
.cfi_offset 3, -24
subq $8, %rsp
.cfi_def_cfa_offset 32
cmpl $2, %edi
je .L45
leaq .LC5(%rip), %rsi
movl $2, %edi
movl $0, %eax
call __printf_chk@PLT
movl $0, %eax
.L44:
addq $8, %rsp
.cfi_remember_state
.cfi_def_cfa_offset 24
popq %rbx
.cfi_def_cfa_offset 16
popq %rbp
.cfi_def_cfa_offset 8
ret
.L45:
.cfi_restore_state
movq 8(%rsi), %rdi
leaq .LC6(%rip), %rsi
call fopen@PLT
movq %rax, %rbx
testq %rax, %rax
je .L49
movq %rax, %rdi
call _Z20alocaMatrizesArquivoP8_IO_FILE
movq %rax, %rbp
movq %rbx, %rdi
call fclose@PLT
movq %rbp, %rdi
call _Z19encontraMenorMatrizPi
movl $1, %esi
movq %rbp, %rdi
call _Z7leituraPii
movq %rbp, %rdi
call free@PLT
movl $0, %eax
jmp .L44
.L49:
leaq .LC7(%rip), %rsi
movl $2, %edi
movl $0, %eax
call __printf_chk@PLT
movl $1, %eax
jmp .L44
.cfi_endproc
.LFE2061:
.size main, .-main
.section .rodata.str1.1
.LC8:
.string "_Z10os_menoresPiii"
.text
.type _ZL24__sti____cudaRegisterAllv, @function
_ZL24__sti____cudaRegisterAllv:
.LFB2089:
.cfi_startproc
endbr64
subq $8, %rsp
.cfi_def_cfa_offset 16
leaq _ZL15__fatDeviceText(%rip), %rdi
call __cudaRegisterFatBinary@PLT
movq %rax, %rdi
movq %rax, _ZL20__cudaFatCubinHandle(%rip)
pushq $0
.cfi_def_cfa_offset 24
pushq $0
.cfi_def_cfa_offset 32
pushq $0
.cfi_def_cfa_offset 40
pushq $0
.cfi_def_cfa_offset 48
movl $0, %r9d
movl $-1, %r8d
leaq .LC8(%rip), %rdx
movq %rdx, %rcx
leaq _Z10os_menoresPiii(%rip), %rsi
call __cudaRegisterFunction@PLT
addq $32, %rsp
.cfi_def_cfa_offset 16
movq _ZL20__cudaFatCubinHandle(%rip), %rdi
call __cudaRegisterFatBinaryEnd@PLT
leaq _ZL26__cudaUnregisterBinaryUtilv(%rip), %rdi
call atexit@PLT
addq $8, %rsp
.cfi_def_cfa_offset 8
ret
.cfi_endproc
.LFE2089:
.size _ZL24__sti____cudaRegisterAllv, .-_ZL24__sti____cudaRegisterAllv
.section .init_array,"aw"
.align 8
.quad _ZL24__sti____cudaRegisterAllv
.section .nvFatBinSegment,"aw"
.align 8
.type _ZL15__fatDeviceText, @object
.size _ZL15__fatDeviceText, 24
_ZL15__fatDeviceText:
.long 1180844977
.long 1
.quad fatbinData
.quad 0
.local _ZL20__cudaFatCubinHandle
.comm _ZL20__cudaFatCubinHandle,8,8
.globl numMatrizes
.bss
.align 4
.type numMatrizes, @object
.size numMatrizes, 4
numMatrizes:
.zero 4
.ident "GCC: (Ubuntu 13.3.0-6ubuntu2~24.04) 13.3.0"
.section .note.GNU-stack,"",@progbits
.section .note.gnu.property,"a"
.align 8
.long 1f - 0f
.long 4f - 1f
.long 5
0:
.string "GNU"
1:
.align 8
.long 0xc0000002
.long 3f - 2f
2:
.long 0x3
3:
.align 8
4: | .text
.file "ep.hip"
.globl _Z25__device_stub__os_menoresPiii # -- Begin function _Z25__device_stub__os_menoresPiii
.p2align 4, 0x90
.type _Z25__device_stub__os_menoresPiii,@function
_Z25__device_stub__os_menoresPiii: # @_Z25__device_stub__os_menoresPiii
.cfi_startproc
# %bb.0:
subq $88, %rsp
.cfi_def_cfa_offset 96
movq %rdi, 56(%rsp)
movl %esi, 4(%rsp)
movl %edx, (%rsp)
leaq 56(%rsp), %rax
movq %rax, 64(%rsp)
leaq 4(%rsp), %rax
movq %rax, 72(%rsp)
movq %rsp, %rax
movq %rax, 80(%rsp)
leaq 40(%rsp), %rdi
leaq 24(%rsp), %rsi
leaq 16(%rsp), %rdx
leaq 8(%rsp), %rcx
callq __hipPopCallConfiguration
movq 40(%rsp), %rsi
movl 48(%rsp), %edx
movq 24(%rsp), %rcx
movl 32(%rsp), %r8d
leaq 64(%rsp), %r9
movl $_Z10os_menoresPiii, %edi
pushq 8(%rsp)
.cfi_adjust_cfa_offset 8
pushq 24(%rsp)
.cfi_adjust_cfa_offset 8
callq hipLaunchKernel
addq $104, %rsp
.cfi_adjust_cfa_offset -104
retq
.Lfunc_end0:
.size _Z25__device_stub__os_menoresPiii, .Lfunc_end0-_Z25__device_stub__os_menoresPiii
.cfi_endproc
# -- End function
.globl _Z7leituraPii # -- Begin function _Z7leituraPii
.p2align 4, 0x90
.type _Z7leituraPii,@function
_Z7leituraPii: # @_Z7leituraPii
.cfi_startproc
# %bb.0:
# kill: def $esi killed $esi def $rsi
testl %esi, %esi
jle .LBB1_8
# %bb.1: # %.preheader.preheader
pushq %rbp
.cfi_def_cfa_offset 16
pushq %r15
.cfi_def_cfa_offset 24
pushq %r14
.cfi_def_cfa_offset 32
pushq %rbx
.cfi_def_cfa_offset 40
pushq %rax
.cfi_def_cfa_offset 48
.cfi_offset %rbx, -40
.cfi_offset %r14, -32
.cfi_offset %r15, -24
.cfi_offset %rbp, -16
movq %rdi, %rbx
leal (%rsi,%rsi,2), %eax
cmpl $2, %eax
movl $1, %ebp
cmovgel %eax, %ebp
xorl %r14d, %r14d
jmp .LBB1_2
.p2align 4, 0x90
.LBB1_6: # in Loop: Header=BB1_2 Depth=1
addq %r15, %rbx
cmpl %ebp, %r14d
je .LBB1_7
.LBB1_2: # %.preheader
# =>This Loop Header: Depth=1
# Child Loop BB1_3 Depth 2
xorl %r15d, %r15d
.p2align 4, 0x90
.LBB1_3: # Parent Loop BB1_2 Depth=1
# => This Inner Loop Header: Depth=2
movl (%rbx,%r15), %esi
movl $.L.str, %edi
xorl %eax, %eax
callq printf
addq $4, %r15
cmpl $12, %r15d
jne .LBB1_3
# %bb.4: # in Loop: Header=BB1_2 Depth=1
movl $10, %edi
callq putchar@PLT
incl %r14d
imull $-1431655765, %r14d, %eax # imm = 0xAAAAAAAB
cmpl $1431655765, %eax # imm = 0x55555555
ja .LBB1_6
# %bb.5: # in Loop: Header=BB1_2 Depth=1
movl $.Lstr, %edi
callq puts@PLT
jmp .LBB1_6
.LBB1_7:
addq $8, %rsp
.cfi_def_cfa_offset 40
popq %rbx
.cfi_def_cfa_offset 32
popq %r14
.cfi_def_cfa_offset 24
popq %r15
.cfi_def_cfa_offset 16
popq %rbp
.cfi_def_cfa_offset 8
.cfi_restore %rbx
.cfi_restore %r14
.cfi_restore %r15
.cfi_restore %rbp
.LBB1_8: # %._crit_edge
retq
.Lfunc_end1:
.size _Z7leituraPii, .Lfunc_end1-_Z7leituraPii
.cfi_endproc
# -- End function
.globl _Z11menorMatrizPii # -- Begin function _Z11menorMatrizPii
.p2align 4, 0x90
.type _Z11menorMatrizPii,@function
_Z11menorMatrizPii: # @_Z11menorMatrizPii
.cfi_startproc
# %bb.0:
cmpl $2, %esi
jl .LBB2_7
# %bb.1:
pushq %rbp
.cfi_def_cfa_offset 16
pushq %r15
.cfi_def_cfa_offset 24
pushq %r14
.cfi_def_cfa_offset 32
pushq %r12
.cfi_def_cfa_offset 40
pushq %rbx
.cfi_def_cfa_offset 48
subq $96, %rsp
.cfi_def_cfa_offset 144
.cfi_offset %rbx, -48
.cfi_offset %r12, -40
.cfi_offset %r14, -32
.cfi_offset %r15, -24
.cfi_offset %rbp, -16
movl %esi, %r14d
movq %rdi, %rbx
cmpl $91, %esi
jge .LBB2_3
# %bb.2:
movl $1, %ebp
movl $9, %r12d
movl $1, %r15d
jmp .LBB2_4
.LBB2_3:
movl %r14d, %eax
movl $2290649225, %r15d # imm = 0x88888889
imulq %rax, %r15
shrq $36, %r15
leal (%r15,%r15,2), %ebp
movl $27, %r12d
.LBB2_4:
movl %r15d, %edi
movabsq $4294967296, %rax # imm = 0x100000000
orq %rax, %rdi
movl %r12d, %edx
orq %rax, %rdx
movl $1, %esi
movl $1, %ecx
xorl %r8d, %r8d
xorl %r9d, %r9d
callq __hipPushCallConfiguration
testl %eax, %eax
jne .LBB2_6
# %bb.5:
imull %r12d, %r15d
leal (%r14,%r14,8), %eax
movq %rbx, 56(%rsp)
movl %eax, 4(%rsp)
movl %r15d, (%rsp)
leaq 56(%rsp), %rax
movq %rax, 64(%rsp)
leaq 4(%rsp), %rax
movq %rax, 72(%rsp)
movq %rsp, %rax
movq %rax, 80(%rsp)
leaq 40(%rsp), %rdi
leaq 24(%rsp), %rsi
leaq 16(%rsp), %rdx
leaq 8(%rsp), %rcx
callq __hipPopCallConfiguration
movq 40(%rsp), %rsi
movl 48(%rsp), %edx
movq 24(%rsp), %rcx
movl 32(%rsp), %r8d
leaq 64(%rsp), %r9
movl $_Z10os_menoresPiii, %edi
pushq 8(%rsp)
.cfi_adjust_cfa_offset 8
pushq 24(%rsp)
.cfi_adjust_cfa_offset 8
callq hipLaunchKernel
addq $16, %rsp
.cfi_adjust_cfa_offset -16
.LBB2_6:
callq hipDeviceSynchronize
movq %rbx, %rdi
movl %ebp, %esi
callq _Z11menorMatrizPii
addq $96, %rsp
.cfi_def_cfa_offset 48
popq %rbx
.cfi_def_cfa_offset 40
popq %r12
.cfi_def_cfa_offset 32
popq %r14
.cfi_def_cfa_offset 24
popq %r15
.cfi_def_cfa_offset 16
popq %rbp
.cfi_def_cfa_offset 8
.cfi_restore %rbx
.cfi_restore %r12
.cfi_restore %r14
.cfi_restore %r15
.cfi_restore %rbp
.LBB2_7:
retq
.Lfunc_end2:
.size _Z11menorMatrizPii, .Lfunc_end2-_Z11menorMatrizPii
.cfi_endproc
# -- End function
.globl _Z19encontraMenorMatrizPi # -- Begin function _Z19encontraMenorMatrizPi
.p2align 4, 0x90
.type _Z19encontraMenorMatrizPi,@function
_Z19encontraMenorMatrizPi: # @_Z19encontraMenorMatrizPi
.cfi_startproc
# %bb.0:
pushq %r14
.cfi_def_cfa_offset 16
pushq %rbx
.cfi_def_cfa_offset 24
pushq %rax
.cfi_def_cfa_offset 32
.cfi_offset %rbx, -24
.cfi_offset %r14, -16
movq %rdi, %rbx
movl numMatrizes(%rip), %eax
shll $2, %eax
leal (%rax,%rax,8), %eax
movslq %eax, %r14
movq %rsp, %rdi
movq %r14, %rsi
callq hipMalloc
movq (%rsp), %rdi
movq %rbx, %rsi
movq %r14, %rdx
movl $1, %ecx
callq hipMemcpy
movq (%rsp), %rdi
movl numMatrizes(%rip), %esi
callq _Z11menorMatrizPii
movq (%rsp), %rsi
movq %rbx, %rdi
movq %r14, %rdx
movl $2, %ecx
callq hipMemcpy
movq (%rsp), %rdi
callq hipFree
addq $8, %rsp
.cfi_def_cfa_offset 24
popq %rbx
.cfi_def_cfa_offset 16
popq %r14
.cfi_def_cfa_offset 8
retq
.Lfunc_end3:
.size _Z19encontraMenorMatrizPi, .Lfunc_end3-_Z19encontraMenorMatrizPi
.cfi_endproc
# -- End function
.globl _Z20alocaMatrizesArquivoP8_IO_FILE # -- Begin function _Z20alocaMatrizesArquivoP8_IO_FILE
.p2align 4, 0x90
.type _Z20alocaMatrizesArquivoP8_IO_FILE,@function
_Z20alocaMatrizesArquivoP8_IO_FILE: # @_Z20alocaMatrizesArquivoP8_IO_FILE
.cfi_startproc
# %bb.0:
pushq %rbp
.cfi_def_cfa_offset 16
pushq %r15
.cfi_def_cfa_offset 24
pushq %r14
.cfi_def_cfa_offset 32
pushq %r13
.cfi_def_cfa_offset 40
pushq %r12
.cfi_def_cfa_offset 48
pushq %rbx
.cfi_def_cfa_offset 56
subq $24, %rsp
.cfi_def_cfa_offset 80
.cfi_offset %rbx, -56
.cfi_offset %r12, -48
.cfi_offset %r13, -40
.cfi_offset %r14, -32
.cfi_offset %r15, -24
.cfi_offset %rbp, -16
movq %rdi, %rbx
movl $.L.str.3, %esi
movl $numMatrizes, %edx
xorl %eax, %eax
callq __isoc23_fscanf
movslq numMatrizes(%rip), %r15
leaq (,%r15,4), %rax
leaq (%rax,%rax,8), %rdi
callq malloc
movq %rax, %r14
testq %r15, %r15
jle .LBB4_5
# %bb.1: # %.lr.ph.preheader
leaq 14(%rsp), %r15
xorl %ebp, %ebp
movq %r14, %r12
.p2align 4, 0x90
.LBB4_2: # %.lr.ph
# =>This Loop Header: Depth=1
# Child Loop BB4_3 Depth 2
movl $.L.str.4, %esi
movq %rbx, %rdi
movq %r15, %rdx
xorl %eax, %eax
callq __isoc23_fscanf
xorl %r13d, %r13d
.p2align 4, 0x90
.LBB4_3: # Parent Loop BB4_2 Depth=1
# => This Inner Loop Header: Depth=2
leaq (%r12,%r13), %rdx
movl $.L.str.3, %esi
movq %rbx, %rdi
xorl %eax, %eax
callq __isoc23_fscanf
addq $4, %r13
cmpl $36, %r13d
jne .LBB4_3
# %bb.4: # in Loop: Header=BB4_2 Depth=1
incl %ebp
addq %r13, %r12
cmpl numMatrizes(%rip), %ebp
jl .LBB4_2
.LBB4_5: # %._crit_edge
movq %r14, %rax
addq $24, %rsp
.cfi_def_cfa_offset 56
popq %rbx
.cfi_def_cfa_offset 48
popq %r12
.cfi_def_cfa_offset 40
popq %r13
.cfi_def_cfa_offset 32
popq %r14
.cfi_def_cfa_offset 24
popq %r15
.cfi_def_cfa_offset 16
popq %rbp
.cfi_def_cfa_offset 8
retq
.Lfunc_end4:
.size _Z20alocaMatrizesArquivoP8_IO_FILE, .Lfunc_end4-_Z20alocaMatrizesArquivoP8_IO_FILE
.cfi_endproc
# -- End function
.globl main # -- Begin function main
.p2align 4, 0x90
.type main,@function
main: # @main
.cfi_startproc
# %bb.0:
pushq %rbp
.cfi_def_cfa_offset 16
pushq %r15
.cfi_def_cfa_offset 24
pushq %r14
.cfi_def_cfa_offset 32
pushq %r13
.cfi_def_cfa_offset 40
pushq %r12
.cfi_def_cfa_offset 48
pushq %rbx
.cfi_def_cfa_offset 56
subq $24, %rsp
.cfi_def_cfa_offset 80
.cfi_offset %rbx, -56
.cfi_offset %r12, -48
.cfi_offset %r13, -40
.cfi_offset %r14, -32
.cfi_offset %r15, -24
.cfi_offset %rbp, -16
cmpl $2, %edi
jne .LBB5_1
# %bb.2:
movq 8(%rsi), %rdi
movl $.L.str.6, %esi
callq fopen
testq %rax, %rax
je .LBB5_3
# %bb.4:
movq %rax, %r14
movl $.L.str.3, %esi
movl $numMatrizes, %edx
movq %rax, %rdi
xorl %eax, %eax
callq __isoc23_fscanf
movslq numMatrizes(%rip), %r15
leaq (,%r15,4), %rax
leaq (%rax,%rax,8), %rdi
callq malloc
movq %rax, %rbx
testq %r15, %r15
jle .LBB5_9
# %bb.5: # %.lr.ph.i.preheader
leaq 8(%rsp), %r15
xorl %ebp, %ebp
movq %rbx, %r12
.p2align 4, 0x90
.LBB5_6: # %.lr.ph.i
# =>This Loop Header: Depth=1
# Child Loop BB5_7 Depth 2
movl $.L.str.4, %esi
movq %r14, %rdi
movq %r15, %rdx
xorl %eax, %eax
callq __isoc23_fscanf
xorl %r13d, %r13d
.p2align 4, 0x90
.LBB5_7: # Parent Loop BB5_6 Depth=1
# => This Inner Loop Header: Depth=2
leaq (%r12,%r13), %rdx
movl $.L.str.3, %esi
movq %r14, %rdi
xorl %eax, %eax
callq __isoc23_fscanf
addq $4, %r13
cmpl $36, %r13d
jne .LBB5_7
# %bb.8: # in Loop: Header=BB5_6 Depth=1
incl %ebp
addq %r13, %r12
cmpl numMatrizes(%rip), %ebp
jl .LBB5_6
.LBB5_9: # %_Z20alocaMatrizesArquivoP8_IO_FILE.exit
movq %r14, %rdi
callq fclose
movl numMatrizes(%rip), %eax
shll $2, %eax
leal (%rax,%rax,8), %eax
movslq %eax, %r14
leaq 8(%rsp), %rdi
movq %r14, %rsi
callq hipMalloc
movq 8(%rsp), %rdi
movq %rbx, %rsi
movq %r14, %rdx
movl $1, %ecx
callq hipMemcpy
movq 8(%rsp), %rdi
movl numMatrizes(%rip), %esi
callq _Z11menorMatrizPii
movq 8(%rsp), %rsi
movq %rbx, %rdi
movq %r14, %rdx
movl $2, %ecx
callq hipMemcpy
movq 8(%rsp), %rdi
callq hipFree
xorl %ebp, %ebp
movq %rbx, %r14
.p2align 4, 0x90
.LBB5_10: # %.preheader.i
# =>This Loop Header: Depth=1
# Child Loop BB5_11 Depth 2
xorl %r15d, %r15d
.p2align 4, 0x90
.LBB5_11: # Parent Loop BB5_10 Depth=1
# => This Inner Loop Header: Depth=2
movl (%r14,%r15), %esi
movl $.L.str, %edi
xorl %eax, %eax
callq printf
addq $4, %r15
cmpl $12, %r15d
jne .LBB5_11
# %bb.12: # in Loop: Header=BB5_10 Depth=1
movl $10, %edi
callq putchar@PLT
incl %ebp
addq %r15, %r14
cmpl $3, %ebp
jne .LBB5_10
# %bb.13: # %_Z7leituraPii.exit
movl $.Lstr, %edi
callq puts@PLT
movq %rbx, %rdi
callq free
jmp .LBB5_14
.LBB5_1:
movl $.Lstr.2, %edi
callq puts@PLT
.LBB5_14:
xorl %eax, %eax
.LBB5_15:
addq $24, %rsp
.cfi_def_cfa_offset 56
popq %rbx
.cfi_def_cfa_offset 48
popq %r12
.cfi_def_cfa_offset 40
popq %r13
.cfi_def_cfa_offset 32
popq %r14
.cfi_def_cfa_offset 24
popq %r15
.cfi_def_cfa_offset 16
popq %rbp
.cfi_def_cfa_offset 8
retq
.LBB5_3:
.cfi_def_cfa_offset 80
movl $.Lstr.1, %edi
callq puts@PLT
movl $1, %eax
jmp .LBB5_15
.Lfunc_end5:
.size main, .Lfunc_end5-main
.cfi_endproc
# -- End function
.p2align 4, 0x90 # -- Begin function __hip_module_ctor
.type __hip_module_ctor,@function
__hip_module_ctor: # @__hip_module_ctor
.cfi_startproc
# %bb.0:
subq $40, %rsp
.cfi_def_cfa_offset 48
cmpq $0, __hip_gpubin_handle(%rip)
jne .LBB6_2
# %bb.1:
movl $__hip_fatbin_wrapper, %edi
callq __hipRegisterFatBinary
movq %rax, __hip_gpubin_handle(%rip)
.LBB6_2:
movq __hip_gpubin_handle(%rip), %rdi
xorps %xmm0, %xmm0
movups %xmm0, 16(%rsp)
movups %xmm0, (%rsp)
movl $_Z10os_menoresPiii, %esi
movl $.L__unnamed_1, %edx
movl $.L__unnamed_1, %ecx
movl $-1, %r8d
xorl %r9d, %r9d
callq __hipRegisterFunction
movl $__hip_module_dtor, %edi
addq $40, %rsp
.cfi_def_cfa_offset 8
jmp atexit # TAILCALL
.Lfunc_end6:
.size __hip_module_ctor, .Lfunc_end6-__hip_module_ctor
.cfi_endproc
# -- End function
.p2align 4, 0x90 # -- Begin function __hip_module_dtor
.type __hip_module_dtor,@function
__hip_module_dtor: # @__hip_module_dtor
.cfi_startproc
# %bb.0:
movq __hip_gpubin_handle(%rip), %rdi
testq %rdi, %rdi
je .LBB7_2
# %bb.1:
pushq %rax
.cfi_def_cfa_offset 16
callq __hipUnregisterFatBinary
movq $0, __hip_gpubin_handle(%rip)
addq $8, %rsp
.cfi_def_cfa_offset 8
.LBB7_2:
retq
.Lfunc_end7:
.size __hip_module_dtor, .Lfunc_end7-__hip_module_dtor
.cfi_endproc
# -- End function
.type numMatrizes,@object # @numMatrizes
.bss
.globl numMatrizes
.p2align 2, 0x0
numMatrizes:
.long 0 # 0x0
.size numMatrizes, 4
.type _Z10os_menoresPiii,@object # @_Z10os_menoresPiii
.section .rodata,"a",@progbits
.globl _Z10os_menoresPiii
.p2align 3, 0x0
_Z10os_menoresPiii:
.quad _Z25__device_stub__os_menoresPiii
.size _Z10os_menoresPiii, 8
.type .L.str,@object # @.str
.section .rodata.str1.1,"aMS",@progbits,1
.L.str:
.asciz "%d\t"
.size .L.str, 4
.type .L.str.3,@object # @.str.3
.L.str.3:
.asciz "%d"
.size .L.str.3, 3
.type .L.str.4,@object # @.str.4
.L.str.4:
.asciz "%s"
.size .L.str.4, 3
.type .L.str.6,@object # @.str.6
.L.str.6:
.asciz "r"
.size .L.str.6, 2
.type .L__unnamed_1,@object # @0
.L__unnamed_1:
.asciz "_Z10os_menoresPiii"
.size .L__unnamed_1, 19
.type __hip_fatbin_wrapper,@object # @__hip_fatbin_wrapper
.section .hipFatBinSegment,"a",@progbits
.p2align 3, 0x0
__hip_fatbin_wrapper:
.long 1212764230 # 0x48495046
.long 1 # 0x1
.quad __hip_fatbin
.quad 0
.size __hip_fatbin_wrapper, 24
.type __hip_gpubin_handle,@object # @__hip_gpubin_handle
.local __hip_gpubin_handle
.comm __hip_gpubin_handle,8,8
.section .init_array,"aw",@init_array
.p2align 3, 0x0
.quad __hip_module_ctor
.type __hip_cuid_,@object # @__hip_cuid_
.bss
.globl __hip_cuid_
__hip_cuid_:
.byte 0 # 0x0
.size __hip_cuid_, 1
.type .Lstr,@object # @str
.section .rodata.str1.1,"aMS",@progbits,1
.Lstr:
.asciz "********************"
.size .Lstr, 21
.type .Lstr.1,@object # @str.1
.Lstr.1:
.asciz "Deu ruim pra abrir o arquivo"
.size .Lstr.1, 29
.type .Lstr.2,@object # @str.2
.Lstr.2:
.asciz "Argumento do programa: nome do arquivo"
.size .Lstr.2, 39
.section ".linker-options","e",@llvm_linker_options
.ident "AMD clang version 18.0.0git (https://github.com/RadeonOpenCompute/llvm-project roc-6.3.2 25012 e5bf7e55c91490b07c49d8960fa7983d864936c4)"
.section ".note.GNU-stack","",@progbits
.addrsig
.addrsig_sym _Z25__device_stub__os_menoresPiii
.addrsig_sym __hip_module_ctor
.addrsig_sym __hip_module_dtor
.addrsig_sym numMatrizes
.addrsig_sym _Z10os_menoresPiii
.addrsig_sym __hip_fatbin
.addrsig_sym __hip_fatbin_wrapper
.addrsig_sym __hip_cuid_ |
You are a helpful coding assistant specialized in converting CUDA source code to CUDA host assembly. | #include "includes.h"
__global__ void transform2d(float *points3d_after, float fov_scale)
{
int x = blockIdx.x * TILE_DIM + threadIdx.x;
int y = blockIdx.y * TILE_DIM + threadIdx.y;
int w = gridDim.x * TILE_DIM;
for (int j = 0; j < TILE_DIM; j+= BLOCK_ROWS)
{
int iw = x;
int ih = y + j;
float x = points3d_after[(ih * w + iw) * 3 + 0];
float y = points3d_after[(ih * w + iw) * 3 + 1];
float z = points3d_after[(ih * w + iw) * 3 + 2];
points3d_after[(ih * w + iw) * 3 + 0] = x;//sqrt(x * x + y * y + z * z);
//points3d_after[(ih * w + iw) * 3 + 1] = atan2(y, x);
//points3d_after[(ih * w + iw) * 3 + 2] = atan2(sqrt(x * x + y * y), z);
float x2 = fov_scale * x;
if ((x2 > 0) && (y < x2 * 1.1) && (y > -x2 * 1.1) && (z < x2 * 1.1) && (z > -x2 * 1.1)) {
points3d_after[(ih * w + iw) * 3 + 1] = y / (x2 + 1e-5);
points3d_after[(ih * w + iw) * 3 + 2] = -z / (x2 + 1e-5);
}
else {
points3d_after[(ih * w + iw) * 3 + 1] = -1;
points3d_after[(ih * w + iw) * 3 + 2] = -1;
}
}
} | .file "tmpxft_000dca20_00000000-6_transform2d.cudafe1.cpp"
.text
#APP
#NO_APP
.type _ZL26__cudaUnregisterBinaryUtilv, @function
_ZL26__cudaUnregisterBinaryUtilv:
.LFB2029:
.cfi_startproc
endbr64
subq $8, %rsp
.cfi_def_cfa_offset 16
movq _ZL20__cudaFatCubinHandle(%rip), %rdi
call __cudaUnregisterFatBinary@PLT
addq $8, %rsp
.cfi_def_cfa_offset 8
ret
.cfi_endproc
.LFE2029:
.size _ZL26__cudaUnregisterBinaryUtilv, .-_ZL26__cudaUnregisterBinaryUtilv
.globl _Z32__device_stub__Z11transform2dPffPff
.type _Z32__device_stub__Z11transform2dPffPff, @function
_Z32__device_stub__Z11transform2dPffPff:
.LFB2051:
.cfi_startproc
endbr64
subq $120, %rsp
.cfi_def_cfa_offset 128
movq %rdi, 8(%rsp)
movss %xmm0, 4(%rsp)
movq %fs:40, %rax
movq %rax, 104(%rsp)
xorl %eax, %eax
leaq 8(%rsp), %rax
movq %rax, 80(%rsp)
leaq 4(%rsp), %rax
movq %rax, 88(%rsp)
movl $1, 32(%rsp)
movl $1, 36(%rsp)
movl $1, 40(%rsp)
movl $1, 44(%rsp)
movl $1, 48(%rsp)
movl $1, 52(%rsp)
leaq 24(%rsp), %rcx
leaq 16(%rsp), %rdx
leaq 44(%rsp), %rsi
leaq 32(%rsp), %rdi
call __cudaPopCallConfiguration@PLT
testl %eax, %eax
je .L7
.L3:
movq 104(%rsp), %rax
subq %fs:40, %rax
jne .L8
addq $120, %rsp
.cfi_remember_state
.cfi_def_cfa_offset 8
ret
.L7:
.cfi_restore_state
pushq 24(%rsp)
.cfi_def_cfa_offset 136
pushq 24(%rsp)
.cfi_def_cfa_offset 144
leaq 96(%rsp), %r9
movq 60(%rsp), %rcx
movl 68(%rsp), %r8d
movq 48(%rsp), %rsi
movl 56(%rsp), %edx
leaq _Z11transform2dPff(%rip), %rdi
call cudaLaunchKernel@PLT
addq $16, %rsp
.cfi_def_cfa_offset 128
jmp .L3
.L8:
call __stack_chk_fail@PLT
.cfi_endproc
.LFE2051:
.size _Z32__device_stub__Z11transform2dPffPff, .-_Z32__device_stub__Z11transform2dPffPff
.globl _Z11transform2dPff
.type _Z11transform2dPff, @function
_Z11transform2dPff:
.LFB2052:
.cfi_startproc
endbr64
subq $8, %rsp
.cfi_def_cfa_offset 16
call _Z32__device_stub__Z11transform2dPffPff
addq $8, %rsp
.cfi_def_cfa_offset 8
ret
.cfi_endproc
.LFE2052:
.size _Z11transform2dPff, .-_Z11transform2dPff
.section .rodata.str1.1,"aMS",@progbits,1
.LC0:
.string "_Z11transform2dPff"
.text
.type _ZL24__sti____cudaRegisterAllv, @function
_ZL24__sti____cudaRegisterAllv:
.LFB2054:
.cfi_startproc
endbr64
subq $8, %rsp
.cfi_def_cfa_offset 16
leaq _ZL15__fatDeviceText(%rip), %rdi
call __cudaRegisterFatBinary@PLT
movq %rax, %rdi
movq %rax, _ZL20__cudaFatCubinHandle(%rip)
pushq $0
.cfi_def_cfa_offset 24
pushq $0
.cfi_def_cfa_offset 32
pushq $0
.cfi_def_cfa_offset 40
pushq $0
.cfi_def_cfa_offset 48
movl $0, %r9d
movl $-1, %r8d
leaq .LC0(%rip), %rdx
movq %rdx, %rcx
leaq _Z11transform2dPff(%rip), %rsi
call __cudaRegisterFunction@PLT
addq $32, %rsp
.cfi_def_cfa_offset 16
movq _ZL20__cudaFatCubinHandle(%rip), %rdi
call __cudaRegisterFatBinaryEnd@PLT
leaq _ZL26__cudaUnregisterBinaryUtilv(%rip), %rdi
call atexit@PLT
addq $8, %rsp
.cfi_def_cfa_offset 8
ret
.cfi_endproc
.LFE2054:
.size _ZL24__sti____cudaRegisterAllv, .-_ZL24__sti____cudaRegisterAllv
.section .init_array,"aw"
.align 8
.quad _ZL24__sti____cudaRegisterAllv
.section .nvFatBinSegment,"aw"
.align 8
.type _ZL15__fatDeviceText, @object
.size _ZL15__fatDeviceText, 24
_ZL15__fatDeviceText:
.long 1180844977
.long 1
.quad fatbinData
.quad 0
.local _ZL20__cudaFatCubinHandle
.comm _ZL20__cudaFatCubinHandle,8,8
.ident "GCC: (Ubuntu 13.3.0-6ubuntu2~24.04) 13.3.0"
.section .note.GNU-stack,"",@progbits
.section .note.gnu.property,"a"
.align 8
.long 1f - 0f
.long 4f - 1f
.long 5
0:
.string "GNU"
1:
.align 8
.long 0xc0000002
.long 3f - 2f
2:
.long 0x3
3:
.align 8
4: |
You are a helpful coding assistant specialized in converting CUDA source code to HIP/AMD source code. | #include "includes.h"
__global__ void transform2d(float *points3d_after, float fov_scale)
{
int x = blockIdx.x * TILE_DIM + threadIdx.x;
int y = blockIdx.y * TILE_DIM + threadIdx.y;
int w = gridDim.x * TILE_DIM;
for (int j = 0; j < TILE_DIM; j+= BLOCK_ROWS)
{
int iw = x;
int ih = y + j;
float x = points3d_after[(ih * w + iw) * 3 + 0];
float y = points3d_after[(ih * w + iw) * 3 + 1];
float z = points3d_after[(ih * w + iw) * 3 + 2];
points3d_after[(ih * w + iw) * 3 + 0] = x;//sqrt(x * x + y * y + z * z);
//points3d_after[(ih * w + iw) * 3 + 1] = atan2(y, x);
//points3d_after[(ih * w + iw) * 3 + 2] = atan2(sqrt(x * x + y * y), z);
float x2 = fov_scale * x;
if ((x2 > 0) && (y < x2 * 1.1) && (y > -x2 * 1.1) && (z < x2 * 1.1) && (z > -x2 * 1.1)) {
points3d_after[(ih * w + iw) * 3 + 1] = y / (x2 + 1e-5);
points3d_after[(ih * w + iw) * 3 + 2] = -z / (x2 + 1e-5);
}
else {
points3d_after[(ih * w + iw) * 3 + 1] = -1;
points3d_after[(ih * w + iw) * 3 + 2] = -1;
}
}
} | #include <hip/hip_runtime.h>
#include "includes.h"
__global__ void transform2d(float *points3d_after, float fov_scale)
{
int x = blockIdx.x * TILE_DIM + threadIdx.x;
int y = blockIdx.y * TILE_DIM + threadIdx.y;
int w = gridDim.x * TILE_DIM;
for (int j = 0; j < TILE_DIM; j+= BLOCK_ROWS)
{
int iw = x;
int ih = y + j;
float x = points3d_after[(ih * w + iw) * 3 + 0];
float y = points3d_after[(ih * w + iw) * 3 + 1];
float z = points3d_after[(ih * w + iw) * 3 + 2];
points3d_after[(ih * w + iw) * 3 + 0] = x;//sqrt(x * x + y * y + z * z);
//points3d_after[(ih * w + iw) * 3 + 1] = atan2(y, x);
//points3d_after[(ih * w + iw) * 3 + 2] = atan2(sqrt(x * x + y * y), z);
float x2 = fov_scale * x;
if ((x2 > 0) && (y < x2 * 1.1) && (y > -x2 * 1.1) && (z < x2 * 1.1) && (z > -x2 * 1.1)) {
points3d_after[(ih * w + iw) * 3 + 1] = y / (x2 + 1e-5);
points3d_after[(ih * w + iw) * 3 + 2] = -z / (x2 + 1e-5);
}
else {
points3d_after[(ih * w + iw) * 3 + 1] = -1;
points3d_after[(ih * w + iw) * 3 + 2] = -1;
}
}
} |
You are a helpful coding assistant specialized in converting HIP source code to AMD device assembly. | #include <hip/hip_runtime.h>
#include "includes.h"
__global__ void transform2d(float *points3d_after, float fov_scale)
{
int x = blockIdx.x * TILE_DIM + threadIdx.x;
int y = blockIdx.y * TILE_DIM + threadIdx.y;
int w = gridDim.x * TILE_DIM;
for (int j = 0; j < TILE_DIM; j+= BLOCK_ROWS)
{
int iw = x;
int ih = y + j;
float x = points3d_after[(ih * w + iw) * 3 + 0];
float y = points3d_after[(ih * w + iw) * 3 + 1];
float z = points3d_after[(ih * w + iw) * 3 + 2];
points3d_after[(ih * w + iw) * 3 + 0] = x;//sqrt(x * x + y * y + z * z);
//points3d_after[(ih * w + iw) * 3 + 1] = atan2(y, x);
//points3d_after[(ih * w + iw) * 3 + 2] = atan2(sqrt(x * x + y * y), z);
float x2 = fov_scale * x;
if ((x2 > 0) && (y < x2 * 1.1) && (y > -x2 * 1.1) && (z < x2 * 1.1) && (z > -x2 * 1.1)) {
points3d_after[(ih * w + iw) * 3 + 1] = y / (x2 + 1e-5);
points3d_after[(ih * w + iw) * 3 + 2] = -z / (x2 + 1e-5);
}
else {
points3d_after[(ih * w + iw) * 3 + 1] = -1;
points3d_after[(ih * w + iw) * 3 + 2] = -1;
}
}
} | .text
.amdgcn_target "amdgcn-amd-amdhsa--gfx1100"
.protected _Z11transform2dPff
.globl _Z11transform2dPff
.p2align 8
.type _Z11transform2dPff,@function
_Z11transform2dPff:
s_load_b32 s12, s[0:1], 0x10
v_bfe_u32 v1, v0, 10, 10
s_clause 0x1
s_load_b64 s[4:5], s[0:1], 0x0
s_load_b32 s10, s[0:1], 0x8
v_and_b32_e32 v0, 0x3ff, v0
s_lshl_b32 s0, s14, 5
s_mov_b32 s11, -8
v_lshl_add_u32 v1, s15, 5, v1
s_mov_b32 s7, 0x3ff19999
s_mov_b32 s6, 0x9999999a
s_mov_b32 s3, 0xbff19999
s_mov_b32 s9, 0x3ee4f8b5
s_mov_b32 s8, 0x88e368f1
v_mov_b32_e32 v12, -1.0
s_waitcnt lgkmcnt(0)
v_mul_lo_u32 v1, s12, v1
s_mulk_i32 s12, 0x300
s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
v_lshlrev_b32_e32 v1, 5, v1
v_add3_u32 v0, v0, v1, s0
s_delay_alu instid0(VALU_DEP_1)
v_lshl_add_u32 v0, v0, 1, v0
s_branch .LBB0_2
.LBB0_1:
s_or_b32 exec_lo, exec_lo, s1
v_add_nc_u32_e32 v0, s12, v0
s_add_i32 s11, s11, 8
global_store_b32 v[6:7], v1, off offset:8
s_cmp_gt_u32 s11, 23
s_cbranch_scc1 .LBB0_12
.LBB0_2:
s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_2) | instid1(VALU_DEP_1)
v_ashrrev_i32_e32 v1, 31, v0
s_mov_b32 s2, 0
s_mov_b32 s13, exec_lo
v_lshlrev_b64 v[6:7], 2, v[0:1]
s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_2)
v_add_co_u32 v6, vcc_lo, s4, v6
v_add_co_ci_u32_e32 v7, vcc_lo, s5, v7, vcc_lo
global_load_b32 v1, v[6:7], off
s_waitcnt vmcnt(0)
v_mul_f32_e32 v1, s10, v1
s_delay_alu instid0(VALU_DEP_1)
v_cmp_nlt_f32_e32 vcc_lo, 0, v1
v_cmpx_lt_f32_e32 0, v1
s_cbranch_execz .LBB0_8
global_load_b32 v4, v[6:7], off offset:4
v_cvt_f64_f32_e32 v[2:3], v1
s_mov_b32 s14, exec_lo
s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_2) | instid1(VALU_DEP_1)
v_mul_f64 v[8:9], v[2:3], s[6:7]
s_waitcnt vmcnt(0)
v_cvt_f64_f32_e32 v[4:5], v4
v_cmp_ngt_f64_e64 s0, v[8:9], v[4:5]
v_cmpx_gt_f64_e32 v[8:9], v[4:5]
s_cbranch_execz .LBB0_7
v_cvt_f64_f32_e32 v[10:11], v1
s_mov_b32 s2, s6
s_mov_b32 s16, 0
s_mov_b32 s17, exec_lo
s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
v_mul_f64 v[10:11], v[10:11], s[2:3]
v_cmp_nlt_f64_e64 s15, v[10:11], v[4:5]
v_cmpx_lt_f64_e32 v[10:11], v[4:5]
s_cbranch_execz .LBB0_6
global_load_b32 v13, v[6:7], off offset:8
s_mov_b32 s16, exec_lo
s_waitcnt vmcnt(0)
v_cvt_f64_f32_e32 v[14:15], v13
s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
v_cmp_ngt_f64_e64 s1, v[8:9], v[14:15]
v_cmp_nlt_f64_e64 s2, v[10:11], v[14:15]
s_or_b32 s1, s1, s2
s_and_not1_b32 s2, s15, exec_lo
s_and_b32 s1, s1, exec_lo
s_delay_alu instid0(SALU_CYCLE_1)
s_or_b32 s15, s2, s1
.LBB0_6:
s_or_b32 exec_lo, exec_lo, s17
s_delay_alu instid0(SALU_CYCLE_1) | instskip(NEXT) | instid1(VALU_DEP_2)
s_and_not1_b32 s0, s0, exec_lo
s_and_b32 s1, s15, exec_lo
s_and_b32 s2, s16, exec_lo
s_or_b32 s0, s0, s1
.LBB0_7:
s_or_b32 exec_lo, exec_lo, s14
s_delay_alu instid0(SALU_CYCLE_1) | instskip(NEXT) | instid1(VALU_DEP_2)
s_and_not1_b32 s1, vcc_lo, exec_lo
s_and_b32 s0, s0, exec_lo
s_and_b32 s2, s2, exec_lo
s_or_b32 vcc_lo, s1, s0
.LBB0_8:
s_or_b32 exec_lo, exec_lo, s13
s_and_saveexec_b32 s1, vcc_lo
s_cbranch_execz .LBB0_10
s_mov_b32 s0, -1.0
s_and_not1_b32 s2, s2, exec_lo
global_store_b32 v[6:7], v12, off offset:4
.LBB0_10:
s_or_b32 exec_lo, exec_lo, s1
v_mov_b32_e32 v1, s0
s_and_saveexec_b32 s1, s2
s_cbranch_execz .LBB0_1
v_add_f64 v[8:9], v[2:3], s[8:9]
v_cvt_f64_f32_e64 v[10:11], -v13
s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
v_div_scale_f64 v[14:15], null, v[8:9], v[8:9], v[4:5]
v_div_scale_f64 v[16:17], null, v[8:9], v[8:9], v[10:11]
v_div_scale_f64 v[26:27], vcc_lo, v[4:5], v[8:9], v[4:5]
s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_2)
v_rcp_f64_e32 v[18:19], v[14:15]
v_rcp_f64_e32 v[20:21], v[16:17]
s_waitcnt_depctr 0xfff
v_fma_f64 v[22:23], -v[14:15], v[18:19], 1.0
v_fma_f64 v[24:25], -v[16:17], v[20:21], 1.0
s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
v_fma_f64 v[18:19], v[18:19], v[22:23], v[18:19]
v_fma_f64 v[20:21], v[20:21], v[24:25], v[20:21]
s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
v_fma_f64 v[22:23], -v[14:15], v[18:19], 1.0
v_fma_f64 v[24:25], -v[16:17], v[20:21], 1.0
s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_3)
v_fma_f64 v[18:19], v[18:19], v[22:23], v[18:19]
v_div_scale_f64 v[22:23], s0, v[10:11], v[8:9], v[10:11]
v_fma_f64 v[20:21], v[20:21], v[24:25], v[20:21]
s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_2)
v_mul_f64 v[24:25], v[26:27], v[18:19]
v_mul_f64 v[28:29], v[22:23], v[20:21]
s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
v_fma_f64 v[14:15], -v[14:15], v[24:25], v[26:27]
v_fma_f64 v[16:17], -v[16:17], v[28:29], v[22:23]
s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_2)
v_div_fmas_f64 v[14:15], v[14:15], v[18:19], v[24:25]
s_mov_b32 vcc_lo, s0
v_div_fmas_f64 v[16:17], v[16:17], v[20:21], v[28:29]
s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
v_div_fixup_f64 v[14:15], v[14:15], v[8:9], v[4:5]
v_div_fixup_f64 v[8:9], v[16:17], v[8:9], v[10:11]
s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
v_cvt_f32_f64_e32 v10, v[14:15]
v_cvt_f32_f64_e32 v1, v[8:9]
global_store_b32 v[6:7], v10, off offset:4
s_branch .LBB0_1
.LBB0_12:
s_nop 0
s_sendmsg sendmsg(MSG_DEALLOC_VGPRS)
s_endpgm
.section .rodata,"a",@progbits
.p2align 6, 0x0
.amdhsa_kernel _Z11transform2dPff
.amdhsa_group_segment_fixed_size 0
.amdhsa_private_segment_fixed_size 0
.amdhsa_kernarg_size 272
.amdhsa_user_sgpr_count 14
.amdhsa_user_sgpr_dispatch_ptr 0
.amdhsa_user_sgpr_queue_ptr 0
.amdhsa_user_sgpr_kernarg_segment_ptr 1
.amdhsa_user_sgpr_dispatch_id 0
.amdhsa_user_sgpr_private_segment_size 0
.amdhsa_wavefront_size32 1
.amdhsa_uses_dynamic_stack 0
.amdhsa_enable_private_segment 0
.amdhsa_system_sgpr_workgroup_id_x 1
.amdhsa_system_sgpr_workgroup_id_y 1
.amdhsa_system_sgpr_workgroup_id_z 0
.amdhsa_system_sgpr_workgroup_info 0
.amdhsa_system_vgpr_workitem_id 1
.amdhsa_next_free_vgpr 30
.amdhsa_next_free_sgpr 18
.amdhsa_float_round_mode_32 0
.amdhsa_float_round_mode_16_64 0
.amdhsa_float_denorm_mode_32 3
.amdhsa_float_denorm_mode_16_64 3
.amdhsa_dx10_clamp 1
.amdhsa_ieee_mode 1
.amdhsa_fp16_overflow 0
.amdhsa_workgroup_processor_mode 1
.amdhsa_memory_ordered 1
.amdhsa_forward_progress 0
.amdhsa_shared_vgpr_count 0
.amdhsa_exception_fp_ieee_invalid_op 0
.amdhsa_exception_fp_denorm_src 0
.amdhsa_exception_fp_ieee_div_zero 0
.amdhsa_exception_fp_ieee_overflow 0
.amdhsa_exception_fp_ieee_underflow 0
.amdhsa_exception_fp_ieee_inexact 0
.amdhsa_exception_int_div_zero 0
.end_amdhsa_kernel
.text
.Lfunc_end0:
.size _Z11transform2dPff, .Lfunc_end0-_Z11transform2dPff
.section .AMDGPU.csdata,"",@progbits
.text
.p2alignl 7, 3214868480
.fill 96, 4, 3214868480
.type __hip_cuid_,@object
.section .bss,"aw",@nobits
.globl __hip_cuid_
__hip_cuid_:
.byte 0
.size __hip_cuid_, 1
.ident "AMD clang version 18.0.0git (https://github.com/RadeonOpenCompute/llvm-project roc-6.3.2 25012 e5bf7e55c91490b07c49d8960fa7983d864936c4)"
.section ".note.GNU-stack","",@progbits
.addrsig
.addrsig_sym __hip_cuid_
.amdgpu_metadata
---
amdhsa.kernels:
- .args:
- .address_space: global
.offset: 0
.size: 8
.value_kind: global_buffer
- .offset: 8
.size: 4
.value_kind: by_value
- .offset: 16
.size: 4
.value_kind: hidden_block_count_x
- .offset: 20
.size: 4
.value_kind: hidden_block_count_y
- .offset: 24
.size: 4
.value_kind: hidden_block_count_z
- .offset: 28
.size: 2
.value_kind: hidden_group_size_x
- .offset: 30
.size: 2
.value_kind: hidden_group_size_y
- .offset: 32
.size: 2
.value_kind: hidden_group_size_z
- .offset: 34
.size: 2
.value_kind: hidden_remainder_x
- .offset: 36
.size: 2
.value_kind: hidden_remainder_y
- .offset: 38
.size: 2
.value_kind: hidden_remainder_z
- .offset: 56
.size: 8
.value_kind: hidden_global_offset_x
- .offset: 64
.size: 8
.value_kind: hidden_global_offset_y
- .offset: 72
.size: 8
.value_kind: hidden_global_offset_z
- .offset: 80
.size: 2
.value_kind: hidden_grid_dims
.group_segment_fixed_size: 0
.kernarg_segment_align: 8
.kernarg_segment_size: 272
.language: OpenCL C
.language_version:
- 2
- 0
.max_flat_workgroup_size: 1024
.name: _Z11transform2dPff
.private_segment_fixed_size: 0
.sgpr_count: 20
.sgpr_spill_count: 0
.symbol: _Z11transform2dPff.kd
.uniform_work_group_size: 1
.uses_dynamic_stack: false
.vgpr_count: 30
.vgpr_spill_count: 0
.wavefront_size: 32
.workgroup_processor_mode: 1
amdhsa.target: amdgcn-amd-amdhsa--gfx1100
amdhsa.version:
- 1
- 2
...
.end_amdgpu_metadata |
You are a helpful coding assistant specialized in converting HIP source code to AMD host assembly. | #include <hip/hip_runtime.h>
#include "includes.h"
__global__ void transform2d(float *points3d_after, float fov_scale)
{
int x = blockIdx.x * TILE_DIM + threadIdx.x;
int y = blockIdx.y * TILE_DIM + threadIdx.y;
int w = gridDim.x * TILE_DIM;
for (int j = 0; j < TILE_DIM; j+= BLOCK_ROWS)
{
int iw = x;
int ih = y + j;
float x = points3d_after[(ih * w + iw) * 3 + 0];
float y = points3d_after[(ih * w + iw) * 3 + 1];
float z = points3d_after[(ih * w + iw) * 3 + 2];
points3d_after[(ih * w + iw) * 3 + 0] = x;//sqrt(x * x + y * y + z * z);
//points3d_after[(ih * w + iw) * 3 + 1] = atan2(y, x);
//points3d_after[(ih * w + iw) * 3 + 2] = atan2(sqrt(x * x + y * y), z);
float x2 = fov_scale * x;
if ((x2 > 0) && (y < x2 * 1.1) && (y > -x2 * 1.1) && (z < x2 * 1.1) && (z > -x2 * 1.1)) {
points3d_after[(ih * w + iw) * 3 + 1] = y / (x2 + 1e-5);
points3d_after[(ih * w + iw) * 3 + 2] = -z / (x2 + 1e-5);
}
else {
points3d_after[(ih * w + iw) * 3 + 1] = -1;
points3d_after[(ih * w + iw) * 3 + 2] = -1;
}
}
} | .text
.file "transform2d.hip"
.globl _Z26__device_stub__transform2dPff # -- Begin function _Z26__device_stub__transform2dPff
.p2align 4, 0x90
.type _Z26__device_stub__transform2dPff,@function
_Z26__device_stub__transform2dPff: # @_Z26__device_stub__transform2dPff
.cfi_startproc
# %bb.0:
subq $88, %rsp
.cfi_def_cfa_offset 96
movq %rdi, 56(%rsp)
movss %xmm0, 4(%rsp)
leaq 56(%rsp), %rax
movq %rax, 64(%rsp)
leaq 4(%rsp), %rax
movq %rax, 72(%rsp)
leaq 40(%rsp), %rdi
leaq 24(%rsp), %rsi
leaq 16(%rsp), %rdx
leaq 8(%rsp), %rcx
callq __hipPopCallConfiguration
movq 40(%rsp), %rsi
movl 48(%rsp), %edx
movq 24(%rsp), %rcx
movl 32(%rsp), %r8d
leaq 64(%rsp), %r9
movl $_Z11transform2dPff, %edi
pushq 8(%rsp)
.cfi_adjust_cfa_offset 8
pushq 24(%rsp)
.cfi_adjust_cfa_offset 8
callq hipLaunchKernel
addq $104, %rsp
.cfi_adjust_cfa_offset -104
retq
.Lfunc_end0:
.size _Z26__device_stub__transform2dPff, .Lfunc_end0-_Z26__device_stub__transform2dPff
.cfi_endproc
# -- End function
.p2align 4, 0x90 # -- Begin function __hip_module_ctor
.type __hip_module_ctor,@function
__hip_module_ctor: # @__hip_module_ctor
.cfi_startproc
# %bb.0:
subq $40, %rsp
.cfi_def_cfa_offset 48
cmpq $0, __hip_gpubin_handle(%rip)
jne .LBB1_2
# %bb.1:
movl $__hip_fatbin_wrapper, %edi
callq __hipRegisterFatBinary
movq %rax, __hip_gpubin_handle(%rip)
.LBB1_2:
movq __hip_gpubin_handle(%rip), %rdi
xorps %xmm0, %xmm0
movups %xmm0, 16(%rsp)
movups %xmm0, (%rsp)
movl $_Z11transform2dPff, %esi
movl $.L__unnamed_1, %edx
movl $.L__unnamed_1, %ecx
movl $-1, %r8d
xorl %r9d, %r9d
callq __hipRegisterFunction
movl $__hip_module_dtor, %edi
addq $40, %rsp
.cfi_def_cfa_offset 8
jmp atexit # TAILCALL
.Lfunc_end1:
.size __hip_module_ctor, .Lfunc_end1-__hip_module_ctor
.cfi_endproc
# -- End function
.p2align 4, 0x90 # -- Begin function __hip_module_dtor
.type __hip_module_dtor,@function
__hip_module_dtor: # @__hip_module_dtor
.cfi_startproc
# %bb.0:
movq __hip_gpubin_handle(%rip), %rdi
testq %rdi, %rdi
je .LBB2_2
# %bb.1:
pushq %rax
.cfi_def_cfa_offset 16
callq __hipUnregisterFatBinary
movq $0, __hip_gpubin_handle(%rip)
addq $8, %rsp
.cfi_def_cfa_offset 8
.LBB2_2:
retq
.Lfunc_end2:
.size __hip_module_dtor, .Lfunc_end2-__hip_module_dtor
.cfi_endproc
# -- End function
.type _Z11transform2dPff,@object # @_Z11transform2dPff
.section .rodata,"a",@progbits
.globl _Z11transform2dPff
.p2align 3, 0x0
_Z11transform2dPff:
.quad _Z26__device_stub__transform2dPff
.size _Z11transform2dPff, 8
.type .L__unnamed_1,@object # @0
.section .rodata.str1.1,"aMS",@progbits,1
.L__unnamed_1:
.asciz "_Z11transform2dPff"
.size .L__unnamed_1, 19
.type __hip_fatbin_wrapper,@object # @__hip_fatbin_wrapper
.section .hipFatBinSegment,"a",@progbits
.p2align 3, 0x0
__hip_fatbin_wrapper:
.long 1212764230 # 0x48495046
.long 1 # 0x1
.quad __hip_fatbin
.quad 0
.size __hip_fatbin_wrapper, 24
.type __hip_gpubin_handle,@object # @__hip_gpubin_handle
.local __hip_gpubin_handle
.comm __hip_gpubin_handle,8,8
.section .init_array,"aw",@init_array
.p2align 3, 0x0
.quad __hip_module_ctor
.type __hip_cuid_,@object # @__hip_cuid_
.bss
.globl __hip_cuid_
__hip_cuid_:
.byte 0 # 0x0
.size __hip_cuid_, 1
.section ".linker-options","e",@llvm_linker_options
.ident "AMD clang version 18.0.0git (https://github.com/RadeonOpenCompute/llvm-project roc-6.3.2 25012 e5bf7e55c91490b07c49d8960fa7983d864936c4)"
.section ".note.GNU-stack","",@progbits
.addrsig
.addrsig_sym _Z26__device_stub__transform2dPff
.addrsig_sym __hip_module_ctor
.addrsig_sym __hip_module_dtor
.addrsig_sym _Z11transform2dPff
.addrsig_sym __hip_fatbin
.addrsig_sym __hip_fatbin_wrapper
.addrsig_sym __hip_cuid_ |
You are a helpful coding assistant specialized in converting from CUDA host assembly to AMD host assembly. | .file "tmpxft_000dca20_00000000-6_transform2d.cudafe1.cpp"
.text
#APP
#NO_APP
.type _ZL26__cudaUnregisterBinaryUtilv, @function
_ZL26__cudaUnregisterBinaryUtilv:
.LFB2029:
.cfi_startproc
endbr64
subq $8, %rsp
.cfi_def_cfa_offset 16
movq _ZL20__cudaFatCubinHandle(%rip), %rdi
call __cudaUnregisterFatBinary@PLT
addq $8, %rsp
.cfi_def_cfa_offset 8
ret
.cfi_endproc
.LFE2029:
.size _ZL26__cudaUnregisterBinaryUtilv, .-_ZL26__cudaUnregisterBinaryUtilv
.globl _Z32__device_stub__Z11transform2dPffPff
.type _Z32__device_stub__Z11transform2dPffPff, @function
_Z32__device_stub__Z11transform2dPffPff:
.LFB2051:
.cfi_startproc
endbr64
subq $120, %rsp
.cfi_def_cfa_offset 128
movq %rdi, 8(%rsp)
movss %xmm0, 4(%rsp)
movq %fs:40, %rax
movq %rax, 104(%rsp)
xorl %eax, %eax
leaq 8(%rsp), %rax
movq %rax, 80(%rsp)
leaq 4(%rsp), %rax
movq %rax, 88(%rsp)
movl $1, 32(%rsp)
movl $1, 36(%rsp)
movl $1, 40(%rsp)
movl $1, 44(%rsp)
movl $1, 48(%rsp)
movl $1, 52(%rsp)
leaq 24(%rsp), %rcx
leaq 16(%rsp), %rdx
leaq 44(%rsp), %rsi
leaq 32(%rsp), %rdi
call __cudaPopCallConfiguration@PLT
testl %eax, %eax
je .L7
.L3:
movq 104(%rsp), %rax
subq %fs:40, %rax
jne .L8
addq $120, %rsp
.cfi_remember_state
.cfi_def_cfa_offset 8
ret
.L7:
.cfi_restore_state
pushq 24(%rsp)
.cfi_def_cfa_offset 136
pushq 24(%rsp)
.cfi_def_cfa_offset 144
leaq 96(%rsp), %r9
movq 60(%rsp), %rcx
movl 68(%rsp), %r8d
movq 48(%rsp), %rsi
movl 56(%rsp), %edx
leaq _Z11transform2dPff(%rip), %rdi
call cudaLaunchKernel@PLT
addq $16, %rsp
.cfi_def_cfa_offset 128
jmp .L3
.L8:
call __stack_chk_fail@PLT
.cfi_endproc
.LFE2051:
.size _Z32__device_stub__Z11transform2dPffPff, .-_Z32__device_stub__Z11transform2dPffPff
.globl _Z11transform2dPff
.type _Z11transform2dPff, @function
_Z11transform2dPff:
.LFB2052:
.cfi_startproc
endbr64
subq $8, %rsp
.cfi_def_cfa_offset 16
call _Z32__device_stub__Z11transform2dPffPff
addq $8, %rsp
.cfi_def_cfa_offset 8
ret
.cfi_endproc
.LFE2052:
.size _Z11transform2dPff, .-_Z11transform2dPff
.section .rodata.str1.1,"aMS",@progbits,1
.LC0:
.string "_Z11transform2dPff"
.text
.type _ZL24__sti____cudaRegisterAllv, @function
_ZL24__sti____cudaRegisterAllv:
.LFB2054:
.cfi_startproc
endbr64
subq $8, %rsp
.cfi_def_cfa_offset 16
leaq _ZL15__fatDeviceText(%rip), %rdi
call __cudaRegisterFatBinary@PLT
movq %rax, %rdi
movq %rax, _ZL20__cudaFatCubinHandle(%rip)
pushq $0
.cfi_def_cfa_offset 24
pushq $0
.cfi_def_cfa_offset 32
pushq $0
.cfi_def_cfa_offset 40
pushq $0
.cfi_def_cfa_offset 48
movl $0, %r9d
movl $-1, %r8d
leaq .LC0(%rip), %rdx
movq %rdx, %rcx
leaq _Z11transform2dPff(%rip), %rsi
call __cudaRegisterFunction@PLT
addq $32, %rsp
.cfi_def_cfa_offset 16
movq _ZL20__cudaFatCubinHandle(%rip), %rdi
call __cudaRegisterFatBinaryEnd@PLT
leaq _ZL26__cudaUnregisterBinaryUtilv(%rip), %rdi
call atexit@PLT
addq $8, %rsp
.cfi_def_cfa_offset 8
ret
.cfi_endproc
.LFE2054:
.size _ZL24__sti____cudaRegisterAllv, .-_ZL24__sti____cudaRegisterAllv
.section .init_array,"aw"
.align 8
.quad _ZL24__sti____cudaRegisterAllv
.section .nvFatBinSegment,"aw"
.align 8
.type _ZL15__fatDeviceText, @object
.size _ZL15__fatDeviceText, 24
_ZL15__fatDeviceText:
.long 1180844977
.long 1
.quad fatbinData
.quad 0
.local _ZL20__cudaFatCubinHandle
.comm _ZL20__cudaFatCubinHandle,8,8
.ident "GCC: (Ubuntu 13.3.0-6ubuntu2~24.04) 13.3.0"
.section .note.GNU-stack,"",@progbits
.section .note.gnu.property,"a"
.align 8
.long 1f - 0f
.long 4f - 1f
.long 5
0:
.string "GNU"
1:
.align 8
.long 0xc0000002
.long 3f - 2f
2:
.long 0x3
3:
.align 8
4: | .text
.file "transform2d.hip"
.globl _Z26__device_stub__transform2dPff # -- Begin function _Z26__device_stub__transform2dPff
.p2align 4, 0x90
.type _Z26__device_stub__transform2dPff,@function
_Z26__device_stub__transform2dPff: # @_Z26__device_stub__transform2dPff
.cfi_startproc
# %bb.0:
subq $88, %rsp
.cfi_def_cfa_offset 96
movq %rdi, 56(%rsp)
movss %xmm0, 4(%rsp)
leaq 56(%rsp), %rax
movq %rax, 64(%rsp)
leaq 4(%rsp), %rax
movq %rax, 72(%rsp)
leaq 40(%rsp), %rdi
leaq 24(%rsp), %rsi
leaq 16(%rsp), %rdx
leaq 8(%rsp), %rcx
callq __hipPopCallConfiguration
movq 40(%rsp), %rsi
movl 48(%rsp), %edx
movq 24(%rsp), %rcx
movl 32(%rsp), %r8d
leaq 64(%rsp), %r9
movl $_Z11transform2dPff, %edi
pushq 8(%rsp)
.cfi_adjust_cfa_offset 8
pushq 24(%rsp)
.cfi_adjust_cfa_offset 8
callq hipLaunchKernel
addq $104, %rsp
.cfi_adjust_cfa_offset -104
retq
.Lfunc_end0:
.size _Z26__device_stub__transform2dPff, .Lfunc_end0-_Z26__device_stub__transform2dPff
.cfi_endproc
# -- End function
.p2align 4, 0x90 # -- Begin function __hip_module_ctor
.type __hip_module_ctor,@function
__hip_module_ctor: # @__hip_module_ctor
.cfi_startproc
# %bb.0:
subq $40, %rsp
.cfi_def_cfa_offset 48
cmpq $0, __hip_gpubin_handle(%rip)
jne .LBB1_2
# %bb.1:
movl $__hip_fatbin_wrapper, %edi
callq __hipRegisterFatBinary
movq %rax, __hip_gpubin_handle(%rip)
.LBB1_2:
movq __hip_gpubin_handle(%rip), %rdi
xorps %xmm0, %xmm0
movups %xmm0, 16(%rsp)
movups %xmm0, (%rsp)
movl $_Z11transform2dPff, %esi
movl $.L__unnamed_1, %edx
movl $.L__unnamed_1, %ecx
movl $-1, %r8d
xorl %r9d, %r9d
callq __hipRegisterFunction
movl $__hip_module_dtor, %edi
addq $40, %rsp
.cfi_def_cfa_offset 8
jmp atexit # TAILCALL
.Lfunc_end1:
.size __hip_module_ctor, .Lfunc_end1-__hip_module_ctor
.cfi_endproc
# -- End function
.p2align 4, 0x90 # -- Begin function __hip_module_dtor
.type __hip_module_dtor,@function
__hip_module_dtor: # @__hip_module_dtor
.cfi_startproc
# %bb.0:
movq __hip_gpubin_handle(%rip), %rdi
testq %rdi, %rdi
je .LBB2_2
# %bb.1:
pushq %rax
.cfi_def_cfa_offset 16
callq __hipUnregisterFatBinary
movq $0, __hip_gpubin_handle(%rip)
addq $8, %rsp
.cfi_def_cfa_offset 8
.LBB2_2:
retq
.Lfunc_end2:
.size __hip_module_dtor, .Lfunc_end2-__hip_module_dtor
.cfi_endproc
# -- End function
.type _Z11transform2dPff,@object # @_Z11transform2dPff
.section .rodata,"a",@progbits
.globl _Z11transform2dPff
.p2align 3, 0x0
_Z11transform2dPff:
.quad _Z26__device_stub__transform2dPff
.size _Z11transform2dPff, 8
.type .L__unnamed_1,@object # @0
.section .rodata.str1.1,"aMS",@progbits,1
.L__unnamed_1:
.asciz "_Z11transform2dPff"
.size .L__unnamed_1, 19
.type __hip_fatbin_wrapper,@object # @__hip_fatbin_wrapper
.section .hipFatBinSegment,"a",@progbits
.p2align 3, 0x0
__hip_fatbin_wrapper:
.long 1212764230 # 0x48495046
.long 1 # 0x1
.quad __hip_fatbin
.quad 0
.size __hip_fatbin_wrapper, 24
.type __hip_gpubin_handle,@object # @__hip_gpubin_handle
.local __hip_gpubin_handle
.comm __hip_gpubin_handle,8,8
.section .init_array,"aw",@init_array
.p2align 3, 0x0
.quad __hip_module_ctor
.type __hip_cuid_,@object # @__hip_cuid_
.bss
.globl __hip_cuid_
__hip_cuid_:
.byte 0 # 0x0
.size __hip_cuid_, 1
.section ".linker-options","e",@llvm_linker_options
.ident "AMD clang version 18.0.0git (https://github.com/RadeonOpenCompute/llvm-project roc-6.3.2 25012 e5bf7e55c91490b07c49d8960fa7983d864936c4)"
.section ".note.GNU-stack","",@progbits
.addrsig
.addrsig_sym _Z26__device_stub__transform2dPff
.addrsig_sym __hip_module_ctor
.addrsig_sym __hip_module_dtor
.addrsig_sym _Z11transform2dPff
.addrsig_sym __hip_fatbin
.addrsig_sym __hip_fatbin_wrapper
.addrsig_sym __hip_cuid_ |
You are a helpful coding assistant specialized in converting CUDA source code to CUDA device assembly. | #include "cuda_runtime.h"
#include "device_launch_parameters.h"
#include <stdio.h>
#include <time.h>
cudaError_t addWithCuda(int *c, int *a, unsigned int size, int gridx, int gridy, int dimBlock);
int * createArray(int amountToAdd, int arraySize, int * a);
__global__ void addKernel(int *c, int *a)
{
//declares space in shared memory
extern __shared__ int sdata[];
//gets unique thread id
int tid = (blockIdx.y*gridDim.x + blockIdx.x)*blockDim.x + threadIdx.x;
//each thread copies information from global into shared memory
sdata[threadIdx.x] = a[tid];
//threads are synced as all data must be copied over before any addition can be done
__syncthreads();
//TODO: improve efficiency by changing from interleaved addressing to sequential addressing
//This for loop adds two adjacent numbers together, then sums the combination until only one number remains per block
for (int s = 1; s < blockDim.x; s *= 2) {
int index = 2 * s * threadIdx.x;
if (index < blockDim.x) {
sdata[index] += sdata[index + s];
}
//threads are synced to ensure all addition has completed before moving on
__syncthreads();
}
//each block stores its final value in the array c at the position of its unique block id
if (threadIdx.x == 0) c[blockIdx.x + blockIdx.y * gridDim.x] = sdata[0];
}
int main()
{
//number of values we want to add (memory restrictions make it impossible to add 1 billion at once)
int amountToAdd = 125000000;
//TODO: Optimize by removing the need to have an array of a power of two
//array is set to a power of two to make the addition easier
const int arraySize = 134217728;
int* a = new int[arraySize];
int* b = new int[arraySize];
int* c = new int[arraySize];
//create the array up to 8 times and reduce to a manageable amount of numbers (set i to 1 for 125,000,000 numbers and 8 for 1,000,000,000)
for (int i = 0; i < 8; i++){
createArray(amountToAdd, arraySize, a);
// Add vectors in parallel. reduces 125,000,000 numbers (8 times for 1 billion) stores in an array for further reduction
cudaError_t cudaStatus = addWithCuda(c, a, arraySize, 32768, 4, 1024);
for (int j = 0; j < 32768 * 4; j++){
b[i*32768*4+j] = a[j];
//printf("{%d}", i*32768*4+j);
}
}
a = b;
//reduces the values further until only a single value remains
cudaError_t cudaStatus = addWithCuda(c, a, arraySize, 1024, 1, 1024);
addWithCuda(c, a, arraySize, 1, 1, 1024);
if (cudaStatus != cudaSuccess) {
fprintf(stderr, "addWithCuda failed!");
return 1;
}
//Should print 1,000,000,000
printf("{%d}\n", a[0]);
//cudaDeviceReset must be called before exiting in order for profiling and
//tracing tools such as Nsight and Visual Profiler to show complete traces.
cudaStatus = cudaDeviceReset();
if (cudaStatus != cudaSuccess) {
fprintf(stderr, "cudaDeviceReset failed!");
return 1;
}
return 0;
}
int * createArray(int amountToAdd, int arraySize, int * a){
//populate the array with data
for (int i = 0; i<amountToAdd; i++) {
a[i] = 1;
}
//fill the rest of the array with 0's so as not to affect the final result
for (int i = amountToAdd; i < arraySize; i++){
a[i] = 0;
}
return a;
}
// Helper function for using CUDA to add vectors in parallel.
cudaError_t addWithCuda(int *c, int *a, unsigned int size, int gridx, int gridy, int dimBlock)
{
int *dev_a = 0;
int *dev_c = 0;
cudaError_t cudaStatus;
// Choose which GPU to run on, change this on a multi-GPU system.
cudaStatus = cudaSetDevice(0);
if (cudaStatus != cudaSuccess) {
fprintf(stderr, "cudaSetDevice failed! Do you have a CUDA-capable GPU installed?");
goto Error;
}
// Allocate GPU buffers for three vectors (two input, one output) .
cudaStatus = cudaMalloc((void**)&dev_c, size * sizeof(int));
if (cudaStatus != cudaSuccess) {
fprintf(stderr, "c cudaMalloc failed!");
goto Error;
}
cudaStatus = cudaMalloc((void**)&dev_a, size * sizeof(int));
if (cudaStatus != cudaSuccess) {
fprintf(stderr, "a cudaMalloc failed!");
goto Error;
}
// Copy input vectors from host memory to GPU buffers.
cudaStatus = cudaMemcpy(dev_a, a, size * sizeof(int), cudaMemcpyHostToDevice);
if (cudaStatus != cudaSuccess) {
fprintf(stderr, "cudaMemcpy failed!");
goto Error;
}
// Launch a kernel on the GPU with one thread for each element.
addKernel<<<dim3(gridx,gridy,1), dimBlock, dimBlock *sizeof(int)>>>(dev_c, dev_a);
// Check for any errors launching the kernel
cudaStatus = cudaGetLastError();
if (cudaStatus != cudaSuccess) {
fprintf(stderr, "addKernel launch failed: %s\n", cudaGetErrorString(cudaStatus));
goto Error;
}
// cudaDeviceSynchronize waits for the kernel to finish, and returns
// any errors encountered during the launch.
cudaStatus = cudaDeviceSynchronize();
if (cudaStatus != cudaSuccess) {
fprintf(stderr, "cudaDeviceSynchronize returned error code %d after launching addKernel!\n", cudaStatus);
goto Error;
}
// Copy output vector from GPU buffer to host memory.
cudaStatus = cudaMemcpy(a, dev_c, size * sizeof(int), cudaMemcpyDeviceToHost);
if (cudaStatus != cudaSuccess) {
fprintf(stderr, "cudaMemcpy failed!");
goto Error;
}
Error:
cudaFree(dev_c);
cudaFree(dev_a);
return cudaStatus;
} | code for sm_80
Function : _Z9addKernelPiS_
.headerflags @"EF_CUDA_TEXMODE_UNIFIED EF_CUDA_64BIT_ADDRESS EF_CUDA_SM80 EF_CUDA_VIRTUAL_SM(EF_CUDA_SM80)"
/*0000*/ MOV R1, c[0x0][0x28] ; /* 0x00000a0000017a02 */
/* 0x000fe40000000f00 */
/*0010*/ S2R R0, SR_CTAID.Y ; /* 0x0000000000007919 */
/* 0x000e220000002600 */
/*0020*/ ULDC.64 UR4, c[0x0][0x118] ; /* 0x0000460000047ab9 */
/* 0x000fc60000000a00 */
/*0030*/ S2R R3, SR_CTAID.X ; /* 0x0000000000037919 */
/* 0x000e280000002500 */
/*0040*/ S2R R5, SR_TID.X ; /* 0x0000000000057919 */
/* 0x000e620000002100 */
/*0050*/ IMAD R0, R0, c[0x0][0xc], R3 ; /* 0x0000030000007a24 */
/* 0x001fe200078e0203 */
/*0060*/ HFMA2.MMA R3, -RZ, RZ, 0, 2.384185791015625e-07 ; /* 0x00000004ff037435 */
/* 0x000fc600000001ff */
/*0070*/ IMAD R2, R0, c[0x0][0x0], R5 ; /* 0x0000000000027a24 */
/* 0x002fce00078e0205 */
/*0080*/ IMAD.WIDE R2, R2, R3, c[0x0][0x168] ; /* 0x00005a0002027625 */
/* 0x000fcc00078e0203 */
/*0090*/ LDG.E R2, [R2.64] ; /* 0x0000000402027981 */
/* 0x000ea2000c1e1900 */
/*00a0*/ IMAD.MOV.U32 R4, RZ, RZ, c[0x0][0x0] ; /* 0x00000000ff047624 */
/* 0x000fe200078e00ff */
/*00b0*/ ISETP.NE.AND P0, PT, R5, RZ, PT ; /* 0x000000ff0500720c */
/* 0x000fc80003f05270 */
/*00c0*/ ISETP.GE.U32.AND P1, PT, R4, 0x2, PT ; /* 0x000000020400780c */
/* 0x000fe20003f26070 */
/*00d0*/ STS [R5.X4], R2 ; /* 0x0000000205007388 */
/* 0x0041e80000004800 */
/*00e0*/ BAR.SYNC.DEFER_BLOCKING 0x0 ; /* 0x0000000000007b1d */
/* 0x000ff00000010000 */
/*00f0*/ @!P1 BRA 0x1d0 ; /* 0x000000d000009947 */
/* 0x000fea0003800000 */
/*0100*/ MOV R2, 0x1 ; /* 0x0000000100027802 */
/* 0x001fca0000000f00 */
/*0110*/ IMAD.SHL.U32 R6, R2, 0x2, RZ ; /* 0x0000000202067824 */
/* 0x000fc800078e00ff */
/*0120*/ IMAD R7, R6, R5, RZ ; /* 0x0000000506077224 */
/* 0x000fca00078e02ff */
/*0130*/ ISETP.GE.U32.AND P1, PT, R7, c[0x0][0x0], PT ; /* 0x0000000007007a0c */
/* 0x000fda0003f26070 */
/*0140*/ @!P1 IADD3 R3, R7, R2, RZ ; /* 0x0000000207039210 */
/* 0x000fe40007ffe0ff */
/*0150*/ @!P1 LDS R2, [R7.X4] ; /* 0x0000000007029984 */
/* 0x000fe80000004800 */
/*0160*/ @!P1 LDS R3, [R3.X4] ; /* 0x0000000003039984 */
/* 0x000e240000004800 */
/*0170*/ @!P1 IMAD.IADD R4, R2, 0x1, R3 ; /* 0x0000000102049824 */
/* 0x001fe200078e0203 */
/*0180*/ MOV R2, R6 ; /* 0x0000000600027202 */
/* 0x000fc80000000f00 */
/*0190*/ @!P1 STS [R7.X4], R4 ; /* 0x0000000407009388 */
/* 0x0001e80000004800 */
/*01a0*/ BAR.SYNC.DEFER_BLOCKING 0x0 ; /* 0x0000000000007b1d */
/* 0x000fe20000010000 */
/*01b0*/ ISETP.GE.U32.AND P1, PT, R6, c[0x0][0x0], PT ; /* 0x0000000006007a0c */
/* 0x000fda0003f26070 */
/*01c0*/ @!P1 BRA 0x110 ; /* 0xffffff4000009947 */
/* 0x001fea000383ffff */
/*01d0*/ @P0 EXIT ; /* 0x000000000000094d */
/* 0x001fea0003800000 */
/*01e0*/ LDS R5, [RZ] ; /* 0x00000000ff057984 */
/* 0x000e220000000800 */
/*01f0*/ IMAD.MOV.U32 R3, RZ, RZ, 0x4 ; /* 0x00000004ff037424 */
/* 0x000fc800078e00ff */
/*0200*/ IMAD.WIDE.U32 R2, R0, R3, c[0x0][0x160] ; /* 0x0000580000027625 */
/* 0x000fca00078e0003 */
/*0210*/ STG.E [R2.64], R5 ; /* 0x0000000502007986 */
/* 0x001fe2000c101904 */
/*0220*/ EXIT ; /* 0x000000000000794d */
/* 0x000fea0003800000 */
/*0230*/ BRA 0x230; /* 0xfffffff000007947 */
/* 0x000fc0000383ffff */
/*0240*/ NOP; /* 0x0000000000007918 */
/* 0x000fc00000000000 */
/*0250*/ NOP; /* 0x0000000000007918 */
/* 0x000fc00000000000 */
/*0260*/ NOP; /* 0x0000000000007918 */
/* 0x000fc00000000000 */
/*0270*/ NOP; /* 0x0000000000007918 */
/* 0x000fc00000000000 */
/*0280*/ NOP; /* 0x0000000000007918 */
/* 0x000fc00000000000 */
/*0290*/ NOP; /* 0x0000000000007918 */
/* 0x000fc00000000000 */
/*02a0*/ NOP; /* 0x0000000000007918 */
/* 0x000fc00000000000 */
/*02b0*/ NOP; /* 0x0000000000007918 */
/* 0x000fc00000000000 */
/*02c0*/ NOP; /* 0x0000000000007918 */
/* 0x000fc00000000000 */
/*02d0*/ NOP; /* 0x0000000000007918 */
/* 0x000fc00000000000 */
/*02e0*/ NOP; /* 0x0000000000007918 */
/* 0x000fc00000000000 */
/*02f0*/ NOP; /* 0x0000000000007918 */
/* 0x000fc00000000000 */
.......... |
You are a helpful coding assistant specialized in converting CUDA source code to CUDA host assembly. | #include "cuda_runtime.h"
#include "device_launch_parameters.h"
#include <stdio.h>
#include <time.h>
cudaError_t addWithCuda(int *c, int *a, unsigned int size, int gridx, int gridy, int dimBlock);
int * createArray(int amountToAdd, int arraySize, int * a);
__global__ void addKernel(int *c, int *a)
{
//declares space in shared memory
extern __shared__ int sdata[];
//gets unique thread id
int tid = (blockIdx.y*gridDim.x + blockIdx.x)*blockDim.x + threadIdx.x;
//each thread copies information from global into shared memory
sdata[threadIdx.x] = a[tid];
//threads are synced as all data must be copied over before any addition can be done
__syncthreads();
//TODO: improve efficiency by changing from interleaved addressing to sequential addressing
//This for loop adds two adjacent numbers together, then sums the combination until only one number remains per block
for (int s = 1; s < blockDim.x; s *= 2) {
int index = 2 * s * threadIdx.x;
if (index < blockDim.x) {
sdata[index] += sdata[index + s];
}
//threads are synced to ensure all addition has completed before moving on
__syncthreads();
}
//each block stores its final value in the array c at the position of its unique block id
if (threadIdx.x == 0) c[blockIdx.x + blockIdx.y * gridDim.x] = sdata[0];
}
int main()
{
//number of values we want to add (memory restrictions make it impossible to add 1 billion at once)
int amountToAdd = 125000000;
//TODO: Optimize by removing the need to have an array of a power of two
//array is set to a power of two to make the addition easier
const int arraySize = 134217728;
int* a = new int[arraySize];
int* b = new int[arraySize];
int* c = new int[arraySize];
//create the array up to 8 times and reduce to a manageable amount of numbers (set i to 1 for 125,000,000 numbers and 8 for 1,000,000,000)
for (int i = 0; i < 8; i++){
createArray(amountToAdd, arraySize, a);
// Add vectors in parallel. reduces 125,000,000 numbers (8 times for 1 billion) stores in an array for further reduction
cudaError_t cudaStatus = addWithCuda(c, a, arraySize, 32768, 4, 1024);
for (int j = 0; j < 32768 * 4; j++){
b[i*32768*4+j] = a[j];
//printf("{%d}", i*32768*4+j);
}
}
a = b;
//reduces the values further until only a single value remains
cudaError_t cudaStatus = addWithCuda(c, a, arraySize, 1024, 1, 1024);
addWithCuda(c, a, arraySize, 1, 1, 1024);
if (cudaStatus != cudaSuccess) {
fprintf(stderr, "addWithCuda failed!");
return 1;
}
//Should print 1,000,000,000
printf("{%d}\n", a[0]);
//cudaDeviceReset must be called before exiting in order for profiling and
//tracing tools such as Nsight and Visual Profiler to show complete traces.
cudaStatus = cudaDeviceReset();
if (cudaStatus != cudaSuccess) {
fprintf(stderr, "cudaDeviceReset failed!");
return 1;
}
return 0;
}
int * createArray(int amountToAdd, int arraySize, int * a){
//populate the array with data
for (int i = 0; i<amountToAdd; i++) {
a[i] = 1;
}
//fill the rest of the array with 0's so as not to affect the final result
for (int i = amountToAdd; i < arraySize; i++){
a[i] = 0;
}
return a;
}
// Helper function for using CUDA to add vectors in parallel.
cudaError_t addWithCuda(int *c, int *a, unsigned int size, int gridx, int gridy, int dimBlock)
{
int *dev_a = 0;
int *dev_c = 0;
cudaError_t cudaStatus;
// Choose which GPU to run on, change this on a multi-GPU system.
cudaStatus = cudaSetDevice(0);
if (cudaStatus != cudaSuccess) {
fprintf(stderr, "cudaSetDevice failed! Do you have a CUDA-capable GPU installed?");
goto Error;
}
// Allocate GPU buffers for three vectors (two input, one output) .
cudaStatus = cudaMalloc((void**)&dev_c, size * sizeof(int));
if (cudaStatus != cudaSuccess) {
fprintf(stderr, "c cudaMalloc failed!");
goto Error;
}
cudaStatus = cudaMalloc((void**)&dev_a, size * sizeof(int));
if (cudaStatus != cudaSuccess) {
fprintf(stderr, "a cudaMalloc failed!");
goto Error;
}
// Copy input vectors from host memory to GPU buffers.
cudaStatus = cudaMemcpy(dev_a, a, size * sizeof(int), cudaMemcpyHostToDevice);
if (cudaStatus != cudaSuccess) {
fprintf(stderr, "cudaMemcpy failed!");
goto Error;
}
// Launch a kernel on the GPU with one thread for each element.
addKernel<<<dim3(gridx,gridy,1), dimBlock, dimBlock *sizeof(int)>>>(dev_c, dev_a);
// Check for any errors launching the kernel
cudaStatus = cudaGetLastError();
if (cudaStatus != cudaSuccess) {
fprintf(stderr, "addKernel launch failed: %s\n", cudaGetErrorString(cudaStatus));
goto Error;
}
// cudaDeviceSynchronize waits for the kernel to finish, and returns
// any errors encountered during the launch.
cudaStatus = cudaDeviceSynchronize();
if (cudaStatus != cudaSuccess) {
fprintf(stderr, "cudaDeviceSynchronize returned error code %d after launching addKernel!\n", cudaStatus);
goto Error;
}
// Copy output vector from GPU buffer to host memory.
cudaStatus = cudaMemcpy(a, dev_c, size * sizeof(int), cudaMemcpyDeviceToHost);
if (cudaStatus != cudaSuccess) {
fprintf(stderr, "cudaMemcpy failed!");
goto Error;
}
Error:
cudaFree(dev_c);
cudaFree(dev_a);
return cudaStatus;
} | .file "tmpxft_0006f8de_00000000-6_addNumbersCuda.cudafe1.cpp"
.text
#APP
#NO_APP
.type _ZL26__cudaUnregisterBinaryUtilv, @function
_ZL26__cudaUnregisterBinaryUtilv:
.LFB2062:
.cfi_startproc
endbr64
subq $8, %rsp
.cfi_def_cfa_offset 16
movq _ZL20__cudaFatCubinHandle(%rip), %rdi
call __cudaUnregisterFatBinary@PLT
addq $8, %rsp
.cfi_def_cfa_offset 8
ret
.cfi_endproc
.LFE2062:
.size _ZL26__cudaUnregisterBinaryUtilv, .-_ZL26__cudaUnregisterBinaryUtilv
.globl _Z11createArrayiiPi
.type _Z11createArrayiiPi, @function
_Z11createArrayiiPi:
.LFB2058:
.cfi_startproc
endbr64
movq %rdx, %rax
testl %edi, %edi
jle .L4
movq %rdx, %rcx
movslq %edi, %rdx
leaq (%rax,%rdx,4), %r8
.L5:
movl $1, (%rcx)
addq $4, %rcx
cmpq %r8, %rcx
jne .L5
.L4:
cmpl %esi, %edi
jge .L6
movslq %edi, %rdx
leaq (%rax,%rdx,4), %rcx
subl %edi, %esi
addq %rdx, %rsi
leaq (%rax,%rsi,4), %rsi
.L7:
movl $0, (%rcx)
addq $4, %rcx
cmpq %rsi, %rcx
jne .L7
.L6:
ret
.cfi_endproc
.LFE2058:
.size _Z11createArrayiiPi, .-_Z11createArrayiiPi
.globl _Z30__device_stub__Z9addKernelPiS_PiS_
.type _Z30__device_stub__Z9addKernelPiS_PiS_, @function
_Z30__device_stub__Z9addKernelPiS_PiS_:
.LFB2084:
.cfi_startproc
endbr64
subq $120, %rsp
.cfi_def_cfa_offset 128
movq %rdi, 8(%rsp)
movq %rsi, (%rsp)
movq %fs:40, %rax
movq %rax, 104(%rsp)
xorl %eax, %eax
leaq 8(%rsp), %rax
movq %rax, 80(%rsp)
movq %rsp, %rax
movq %rax, 88(%rsp)
movl $1, 32(%rsp)
movl $1, 36(%rsp)
movl $1, 40(%rsp)
movl $1, 44(%rsp)
movl $1, 48(%rsp)
movl $1, 52(%rsp)
leaq 24(%rsp), %rcx
leaq 16(%rsp), %rdx
leaq 44(%rsp), %rsi
leaq 32(%rsp), %rdi
call __cudaPopCallConfiguration@PLT
testl %eax, %eax
je .L14
.L10:
movq 104(%rsp), %rax
subq %fs:40, %rax
jne .L15
addq $120, %rsp
.cfi_remember_state
.cfi_def_cfa_offset 8
ret
.L14:
.cfi_restore_state
pushq 24(%rsp)
.cfi_def_cfa_offset 136
pushq 24(%rsp)
.cfi_def_cfa_offset 144
leaq 96(%rsp), %r9
movq 60(%rsp), %rcx
movl 68(%rsp), %r8d
movq 48(%rsp), %rsi
movl 56(%rsp), %edx
leaq _Z9addKernelPiS_(%rip), %rdi
call cudaLaunchKernel@PLT
addq $16, %rsp
.cfi_def_cfa_offset 128
jmp .L10
.L15:
call __stack_chk_fail@PLT
.cfi_endproc
.LFE2084:
.size _Z30__device_stub__Z9addKernelPiS_PiS_, .-_Z30__device_stub__Z9addKernelPiS_PiS_
.globl _Z9addKernelPiS_
.type _Z9addKernelPiS_, @function
_Z9addKernelPiS_:
.LFB2085:
.cfi_startproc
endbr64
subq $8, %rsp
.cfi_def_cfa_offset 16
call _Z30__device_stub__Z9addKernelPiS_PiS_
addq $8, %rsp
.cfi_def_cfa_offset 8
ret
.cfi_endproc
.LFE2085:
.size _Z9addKernelPiS_, .-_Z9addKernelPiS_
.section .rodata.str1.8,"aMS",@progbits,1
.align 8
.LC0:
.string "cudaSetDevice failed! Do you have a CUDA-capable GPU installed?"
.section .rodata.str1.1,"aMS",@progbits,1
.LC1:
.string "c cudaMalloc failed!"
.LC2:
.string "a cudaMalloc failed!"
.LC3:
.string "cudaMemcpy failed!"
.LC4:
.string "addKernel launch failed: %s\n"
.section .rodata.str1.8
.align 8
.LC5:
.string "cudaDeviceSynchronize returned error code %d after launching addKernel!\n"
.text
.globl _Z11addWithCudaPiS_jiii
.type _Z11addWithCudaPiS_jiii, @function
_Z11addWithCudaPiS_jiii:
.LFB2059:
.cfi_startproc
endbr64
pushq %r15
.cfi_def_cfa_offset 16
.cfi_offset 15, -16
pushq %r14
.cfi_def_cfa_offset 24
.cfi_offset 14, -24
pushq %r13
.cfi_def_cfa_offset 32
.cfi_offset 13, -32
pushq %r12
.cfi_def_cfa_offset 40
.cfi_offset 12, -40
pushq %rbp
.cfi_def_cfa_offset 48
.cfi_offset 6, -48
pushq %rbx
.cfi_def_cfa_offset 56
.cfi_offset 3, -56
subq $56, %rsp
.cfi_def_cfa_offset 112
movq %rsi, %r13
movl %edx, %ebp
movl %ecx, %r15d
movl %r8d, %r14d
movl %r9d, %r12d
movq %fs:40, %rax
movq %rax, 40(%rsp)
xorl %eax, %eax
movq $0, (%rsp)
movq $0, 8(%rsp)
movl $0, %edi
call cudaSetDevice@PLT
testl %eax, %eax
jne .L29
movl %ebp, %ebp
salq $2, %rbp
leaq 8(%rsp), %rdi
movq %rbp, %rsi
call cudaMalloc@PLT
movl %eax, %ebx
testl %eax, %eax
jne .L30
movq %rsp, %rdi
movq %rbp, %rsi
call cudaMalloc@PLT
movl %eax, %ebx
testl %eax, %eax
jne .L31
movl $1, %ecx
movq %rbp, %rdx
movq %r13, %rsi
movq (%rsp), %rdi
call cudaMemcpy@PLT
movl %eax, %ebx
testl %eax, %eax
jne .L32
movl %r12d, 28(%rsp)
movl $1, 32(%rsp)
movl %r15d, 16(%rsp)
movl %r14d, 20(%rsp)
movslq %r12d, %r12
movl $0, %r9d
leaq 0(,%r12,4), %r8
movq 28(%rsp), %rdx
movl $1, %ecx
movq 16(%rsp), %rdi
movl $1, %esi
call __cudaPushCallConfiguration@PLT
testl %eax, %eax
je .L33
.L24:
call cudaGetLastError@PLT
movl %eax, %ebx
testl %eax, %eax
jne .L34
call cudaDeviceSynchronize@PLT
movl %eax, %ebx
testl %eax, %eax
jne .L35
movl $2, %ecx
movq %rbp, %rdx
movq 8(%rsp), %rsi
movq %r13, %rdi
call cudaMemcpy@PLT
movl %eax, %ebx
testl %eax, %eax
je .L20
leaq .LC3(%rip), %rdx
movl $2, %esi
movq stderr(%rip), %rdi
movl $0, %eax
call __fprintf_chk@PLT
jmp .L20
.L29:
movl %eax, %ebx
leaq .LC0(%rip), %rdx
movl $2, %esi
movq stderr(%rip), %rdi
movl $0, %eax
call __fprintf_chk@PLT
.L20:
movq 8(%rsp), %rdi
call cudaFree@PLT
movq (%rsp), %rdi
call cudaFree@PLT
movq 40(%rsp), %rax
subq %fs:40, %rax
jne .L36
movl %ebx, %eax
addq $56, %rsp
.cfi_remember_state
.cfi_def_cfa_offset 56
popq %rbx
.cfi_def_cfa_offset 48
popq %rbp
.cfi_def_cfa_offset 40
popq %r12
.cfi_def_cfa_offset 32
popq %r13
.cfi_def_cfa_offset 24
popq %r14
.cfi_def_cfa_offset 16
popq %r15
.cfi_def_cfa_offset 8
ret
.L30:
.cfi_restore_state
leaq .LC1(%rip), %rdx
movl $2, %esi
movq stderr(%rip), %rdi
movl $0, %eax
call __fprintf_chk@PLT
jmp .L20
.L31:
leaq .LC2(%rip), %rdx
movl $2, %esi
movq stderr(%rip), %rdi
movl $0, %eax
call __fprintf_chk@PLT
jmp .L20
.L32:
leaq .LC3(%rip), %rdx
movl $2, %esi
movq stderr(%rip), %rdi
movl $0, %eax
call __fprintf_chk@PLT
jmp .L20
.L33:
movq (%rsp), %rsi
movq 8(%rsp), %rdi
call _Z30__device_stub__Z9addKernelPiS_PiS_
jmp .L24
.L34:
movl %eax, %edi
call cudaGetErrorString@PLT
movq %rax, %rcx
leaq .LC4(%rip), %rdx
movl $2, %esi
movq stderr(%rip), %rdi
movl $0, %eax
call __fprintf_chk@PLT
jmp .L20
.L35:
movl %eax, %ecx
leaq .LC5(%rip), %rdx
movl $2, %esi
movq stderr(%rip), %rdi
movl $0, %eax
call __fprintf_chk@PLT
jmp .L20
.L36:
call __stack_chk_fail@PLT
.cfi_endproc
.LFE2059:
.size _Z11addWithCudaPiS_jiii, .-_Z11addWithCudaPiS_jiii
.section .rodata.str1.1
.LC6:
.string "addWithCuda failed!"
.LC7:
.string "{%d}\n"
.LC8:
.string "cudaDeviceReset failed!"
.text
.globl main
.type main, @function
main:
.LFB2057:
.cfi_startproc
endbr64
pushq %r14
.cfi_def_cfa_offset 16
.cfi_offset 14, -16
pushq %r13
.cfi_def_cfa_offset 24
.cfi_offset 13, -24
pushq %r12
.cfi_def_cfa_offset 32
.cfi_offset 12, -32
pushq %rbp
.cfi_def_cfa_offset 40
.cfi_offset 6, -40
pushq %rbx
.cfi_def_cfa_offset 48
.cfi_offset 3, -48
movl $536870912, %edi
call _Znam@PLT
movq %rax, %rbp
movl $536870912, %edi
call _Znam@PLT
movq %rax, %r14
movl $536870912, %edi
call _Znam@PLT
movq %rax, %r12
movq %r14, %rbx
leaq 4194304(%r14), %r13
.L39:
movq %rbp, %rdx
movl $134217728, %esi
movl $125000000, %edi
call _Z11createArrayiiPi
movl $1024, %r9d
movl $4, %r8d
movl $32768, %ecx
movl $134217728, %edx
movq %rbp, %rsi
movq %r12, %rdi
call _Z11addWithCudaPiS_jiii
movl $0, %eax
.L38:
movl 0(%rbp,%rax), %edx
movl %edx, (%rbx,%rax)
addq $4, %rax
cmpq $524288, %rax
jne .L38
addq $524288, %rbx
cmpq %r13, %rbx
jne .L39
movl $1024, %r9d
movl $1, %r8d
movl $1024, %ecx
movl $134217728, %edx
movq %r14, %rsi
movq %r12, %rdi
call _Z11addWithCudaPiS_jiii
movl %eax, %ebx
movl $1024, %r9d
movl $1, %r8d
movl $1, %ecx
movl $134217728, %edx
movq %r14, %rsi
movq %r12, %rdi
call _Z11addWithCudaPiS_jiii
testl %ebx, %ebx
jne .L46
movl (%r14), %edx
leaq .LC7(%rip), %rsi
movl $2, %edi
movl $0, %eax
call __printf_chk@PLT
call cudaDeviceReset@PLT
movl %eax, %edx
movl $0, %eax
testl %edx, %edx
jne .L47
.L37:
popq %rbx
.cfi_remember_state
.cfi_def_cfa_offset 40
popq %rbp
.cfi_def_cfa_offset 32
popq %r12
.cfi_def_cfa_offset 24
popq %r13
.cfi_def_cfa_offset 16
popq %r14
.cfi_def_cfa_offset 8
ret
.L46:
.cfi_restore_state
leaq .LC6(%rip), %rdx
movl $2, %esi
movq stderr(%rip), %rdi
movl $0, %eax
call __fprintf_chk@PLT
movl $1, %eax
jmp .L37
.L47:
leaq .LC8(%rip), %rdx
movl $2, %esi
movq stderr(%rip), %rdi
call __fprintf_chk@PLT
movl $1, %eax
jmp .L37
.cfi_endproc
.LFE2057:
.size main, .-main
.section .rodata.str1.1
.LC9:
.string "_Z9addKernelPiS_"
.text
.type _ZL24__sti____cudaRegisterAllv, @function
_ZL24__sti____cudaRegisterAllv:
.LFB2087:
.cfi_startproc
endbr64
subq $8, %rsp
.cfi_def_cfa_offset 16
leaq _ZL15__fatDeviceText(%rip), %rdi
call __cudaRegisterFatBinary@PLT
movq %rax, %rdi
movq %rax, _ZL20__cudaFatCubinHandle(%rip)
pushq $0
.cfi_def_cfa_offset 24
pushq $0
.cfi_def_cfa_offset 32
pushq $0
.cfi_def_cfa_offset 40
pushq $0
.cfi_def_cfa_offset 48
movl $0, %r9d
movl $-1, %r8d
leaq .LC9(%rip), %rdx
movq %rdx, %rcx
leaq _Z9addKernelPiS_(%rip), %rsi
call __cudaRegisterFunction@PLT
addq $32, %rsp
.cfi_def_cfa_offset 16
movq _ZL20__cudaFatCubinHandle(%rip), %rdi
call __cudaRegisterFatBinaryEnd@PLT
leaq _ZL26__cudaUnregisterBinaryUtilv(%rip), %rdi
call atexit@PLT
addq $8, %rsp
.cfi_def_cfa_offset 8
ret
.cfi_endproc
.LFE2087:
.size _ZL24__sti____cudaRegisterAllv, .-_ZL24__sti____cudaRegisterAllv
.section .init_array,"aw"
.align 8
.quad _ZL24__sti____cudaRegisterAllv
.section .nvFatBinSegment,"aw"
.align 8
.type _ZL15__fatDeviceText, @object
.size _ZL15__fatDeviceText, 24
_ZL15__fatDeviceText:
.long 1180844977
.long 1
.quad fatbinData
.quad 0
.local _ZL20__cudaFatCubinHandle
.comm _ZL20__cudaFatCubinHandle,8,8
.ident "GCC: (Ubuntu 13.3.0-6ubuntu2~24.04) 13.3.0"
.section .note.GNU-stack,"",@progbits
.section .note.gnu.property,"a"
.align 8
.long 1f - 0f
.long 4f - 1f
.long 5
0:
.string "GNU"
1:
.align 8
.long 0xc0000002
.long 3f - 2f
2:
.long 0x3
3:
.align 8
4: |
You are a helpful coding assistant specialized in converting CUDA source code to HIP/AMD source code. | #include "cuda_runtime.h"
#include "device_launch_parameters.h"
#include <stdio.h>
#include <time.h>
cudaError_t addWithCuda(int *c, int *a, unsigned int size, int gridx, int gridy, int dimBlock);
int * createArray(int amountToAdd, int arraySize, int * a);
__global__ void addKernel(int *c, int *a)
{
//declares space in shared memory
extern __shared__ int sdata[];
//gets unique thread id
int tid = (blockIdx.y*gridDim.x + blockIdx.x)*blockDim.x + threadIdx.x;
//each thread copies information from global into shared memory
sdata[threadIdx.x] = a[tid];
//threads are synced as all data must be copied over before any addition can be done
__syncthreads();
//TODO: improve efficiency by changing from interleaved addressing to sequential addressing
//This for loop adds two adjacent numbers together, then sums the combination until only one number remains per block
for (int s = 1; s < blockDim.x; s *= 2) {
int index = 2 * s * threadIdx.x;
if (index < blockDim.x) {
sdata[index] += sdata[index + s];
}
//threads are synced to ensure all addition has completed before moving on
__syncthreads();
}
//each block stores its final value in the array c at the position of its unique block id
if (threadIdx.x == 0) c[blockIdx.x + blockIdx.y * gridDim.x] = sdata[0];
}
int main()
{
//number of values we want to add (memory restrictions make it impossible to add 1 billion at once)
int amountToAdd = 125000000;
//TODO: Optimize by removing the need to have an array of a power of two
//array is set to a power of two to make the addition easier
const int arraySize = 134217728;
int* a = new int[arraySize];
int* b = new int[arraySize];
int* c = new int[arraySize];
//create the array up to 8 times and reduce to a manageable amount of numbers (set i to 1 for 125,000,000 numbers and 8 for 1,000,000,000)
for (int i = 0; i < 8; i++){
createArray(amountToAdd, arraySize, a);
// Add vectors in parallel. reduces 125,000,000 numbers (8 times for 1 billion) stores in an array for further reduction
cudaError_t cudaStatus = addWithCuda(c, a, arraySize, 32768, 4, 1024);
for (int j = 0; j < 32768 * 4; j++){
b[i*32768*4+j] = a[j];
//printf("{%d}", i*32768*4+j);
}
}
a = b;
//reduces the values further until only a single value remains
cudaError_t cudaStatus = addWithCuda(c, a, arraySize, 1024, 1, 1024);
addWithCuda(c, a, arraySize, 1, 1, 1024);
if (cudaStatus != cudaSuccess) {
fprintf(stderr, "addWithCuda failed!");
return 1;
}
//Should print 1,000,000,000
printf("{%d}\n", a[0]);
//cudaDeviceReset must be called before exiting in order for profiling and
//tracing tools such as Nsight and Visual Profiler to show complete traces.
cudaStatus = cudaDeviceReset();
if (cudaStatus != cudaSuccess) {
fprintf(stderr, "cudaDeviceReset failed!");
return 1;
}
return 0;
}
int * createArray(int amountToAdd, int arraySize, int * a){
//populate the array with data
for (int i = 0; i<amountToAdd; i++) {
a[i] = 1;
}
//fill the rest of the array with 0's so as not to affect the final result
for (int i = amountToAdd; i < arraySize; i++){
a[i] = 0;
}
return a;
}
// Helper function for using CUDA to add vectors in parallel.
cudaError_t addWithCuda(int *c, int *a, unsigned int size, int gridx, int gridy, int dimBlock)
{
int *dev_a = 0;
int *dev_c = 0;
cudaError_t cudaStatus;
// Choose which GPU to run on, change this on a multi-GPU system.
cudaStatus = cudaSetDevice(0);
if (cudaStatus != cudaSuccess) {
fprintf(stderr, "cudaSetDevice failed! Do you have a CUDA-capable GPU installed?");
goto Error;
}
// Allocate GPU buffers for three vectors (two input, one output) .
cudaStatus = cudaMalloc((void**)&dev_c, size * sizeof(int));
if (cudaStatus != cudaSuccess) {
fprintf(stderr, "c cudaMalloc failed!");
goto Error;
}
cudaStatus = cudaMalloc((void**)&dev_a, size * sizeof(int));
if (cudaStatus != cudaSuccess) {
fprintf(stderr, "a cudaMalloc failed!");
goto Error;
}
// Copy input vectors from host memory to GPU buffers.
cudaStatus = cudaMemcpy(dev_a, a, size * sizeof(int), cudaMemcpyHostToDevice);
if (cudaStatus != cudaSuccess) {
fprintf(stderr, "cudaMemcpy failed!");
goto Error;
}
// Launch a kernel on the GPU with one thread for each element.
addKernel<<<dim3(gridx,gridy,1), dimBlock, dimBlock *sizeof(int)>>>(dev_c, dev_a);
// Check for any errors launching the kernel
cudaStatus = cudaGetLastError();
if (cudaStatus != cudaSuccess) {
fprintf(stderr, "addKernel launch failed: %s\n", cudaGetErrorString(cudaStatus));
goto Error;
}
// cudaDeviceSynchronize waits for the kernel to finish, and returns
// any errors encountered during the launch.
cudaStatus = cudaDeviceSynchronize();
if (cudaStatus != cudaSuccess) {
fprintf(stderr, "cudaDeviceSynchronize returned error code %d after launching addKernel!\n", cudaStatus);
goto Error;
}
// Copy output vector from GPU buffer to host memory.
cudaStatus = cudaMemcpy(a, dev_c, size * sizeof(int), cudaMemcpyDeviceToHost);
if (cudaStatus != cudaSuccess) {
fprintf(stderr, "cudaMemcpy failed!");
goto Error;
}
Error:
cudaFree(dev_c);
cudaFree(dev_a);
return cudaStatus;
} | #include "hip/hip_runtime.h"
#include <stdio.h>
#include <time.h>
hipError_t addWithCuda(int *c, int *a, unsigned int size, int gridx, int gridy, int dimBlock);
int * createArray(int amountToAdd, int arraySize, int * a);
__global__ void addKernel(int *c, int *a)
{
//declares space in shared memory
extern __shared__ int sdata[];
//gets unique thread id
int tid = (blockIdx.y*gridDim.x + blockIdx.x)*blockDim.x + threadIdx.x;
//each thread copies information from global into shared memory
sdata[threadIdx.x] = a[tid];
//threads are synced as all data must be copied over before any addition can be done
__syncthreads();
//TODO: improve efficiency by changing from interleaved addressing to sequential addressing
//This for loop adds two adjacent numbers together, then sums the combination until only one number remains per block
for (int s = 1; s < blockDim.x; s *= 2) {
int index = 2 * s * threadIdx.x;
if (index < blockDim.x) {
sdata[index] += sdata[index + s];
}
//threads are synced to ensure all addition has completed before moving on
__syncthreads();
}
//each block stores its final value in the array c at the position of its unique block id
if (threadIdx.x == 0) c[blockIdx.x + blockIdx.y * gridDim.x] = sdata[0];
}
int main()
{
//number of values we want to add (memory restrictions make it impossible to add 1 billion at once)
int amountToAdd = 125000000;
//TODO: Optimize by removing the need to have an array of a power of two
//array is set to a power of two to make the addition easier
const int arraySize = 134217728;
int* a = new int[arraySize];
int* b = new int[arraySize];
int* c = new int[arraySize];
//create the array up to 8 times and reduce to a manageable amount of numbers (set i to 1 for 125,000,000 numbers and 8 for 1,000,000,000)
for (int i = 0; i < 8; i++){
createArray(amountToAdd, arraySize, a);
// Add vectors in parallel. reduces 125,000,000 numbers (8 times for 1 billion) stores in an array for further reduction
hipError_t cudaStatus = addWithCuda(c, a, arraySize, 32768, 4, 1024);
for (int j = 0; j < 32768 * 4; j++){
b[i*32768*4+j] = a[j];
//printf("{%d}", i*32768*4+j);
}
}
a = b;
//reduces the values further until only a single value remains
hipError_t cudaStatus = addWithCuda(c, a, arraySize, 1024, 1, 1024);
addWithCuda(c, a, arraySize, 1, 1, 1024);
if (cudaStatus != hipSuccess) {
fprintf(stderr, "addWithCuda failed!");
return 1;
}
//Should print 1,000,000,000
printf("{%d}\n", a[0]);
//cudaDeviceReset must be called before exiting in order for profiling and
//tracing tools such as Nsight and Visual Profiler to show complete traces.
cudaStatus = hipDeviceReset();
if (cudaStatus != hipSuccess) {
fprintf(stderr, "hipDeviceReset failed!");
return 1;
}
return 0;
}
int * createArray(int amountToAdd, int arraySize, int * a){
//populate the array with data
for (int i = 0; i<amountToAdd; i++) {
a[i] = 1;
}
//fill the rest of the array with 0's so as not to affect the final result
for (int i = amountToAdd; i < arraySize; i++){
a[i] = 0;
}
return a;
}
// Helper function for using CUDA to add vectors in parallel.
hipError_t addWithCuda(int *c, int *a, unsigned int size, int gridx, int gridy, int dimBlock)
{
int *dev_a = 0;
int *dev_c = 0;
hipError_t cudaStatus;
// Choose which GPU to run on, change this on a multi-GPU system.
cudaStatus = hipSetDevice(0);
if (cudaStatus != hipSuccess) {
fprintf(stderr, "hipSetDevice failed! Do you have a CUDA-capable GPU installed?");
goto Error;
}
// Allocate GPU buffers for three vectors (two input, one output) .
cudaStatus = hipMalloc((void**)&dev_c, size * sizeof(int));
if (cudaStatus != hipSuccess) {
fprintf(stderr, "c hipMalloc failed!");
goto Error;
}
cudaStatus = hipMalloc((void**)&dev_a, size * sizeof(int));
if (cudaStatus != hipSuccess) {
fprintf(stderr, "a hipMalloc failed!");
goto Error;
}
// Copy input vectors from host memory to GPU buffers.
cudaStatus = hipMemcpy(dev_a, a, size * sizeof(int), hipMemcpyHostToDevice);
if (cudaStatus != hipSuccess) {
fprintf(stderr, "hipMemcpy failed!");
goto Error;
}
// Launch a kernel on the GPU with one thread for each element.
addKernel<<<dim3(gridx,gridy,1), dimBlock, dimBlock *sizeof(int)>>>(dev_c, dev_a);
// Check for any errors launching the kernel
cudaStatus = hipGetLastError();
if (cudaStatus != hipSuccess) {
fprintf(stderr, "addKernel launch failed: %s\n", hipGetErrorString(cudaStatus));
goto Error;
}
// cudaDeviceSynchronize waits for the kernel to finish, and returns
// any errors encountered during the launch.
cudaStatus = hipDeviceSynchronize();
if (cudaStatus != hipSuccess) {
fprintf(stderr, "hipDeviceSynchronize returned error code %d after launching addKernel!\n", cudaStatus);
goto Error;
}
// Copy output vector from GPU buffer to host memory.
cudaStatus = hipMemcpy(a, dev_c, size * sizeof(int), hipMemcpyDeviceToHost);
if (cudaStatus != hipSuccess) {
fprintf(stderr, "hipMemcpy failed!");
goto Error;
}
Error:
hipFree(dev_c);
hipFree(dev_a);
return cudaStatus;
} |
You are a helpful coding assistant specialized in converting HIP source code to AMD device assembly. | #include "hip/hip_runtime.h"
#include <stdio.h>
#include <time.h>
hipError_t addWithCuda(int *c, int *a, unsigned int size, int gridx, int gridy, int dimBlock);
int * createArray(int amountToAdd, int arraySize, int * a);
__global__ void addKernel(int *c, int *a)
{
//declares space in shared memory
extern __shared__ int sdata[];
//gets unique thread id
int tid = (blockIdx.y*gridDim.x + blockIdx.x)*blockDim.x + threadIdx.x;
//each thread copies information from global into shared memory
sdata[threadIdx.x] = a[tid];
//threads are synced as all data must be copied over before any addition can be done
__syncthreads();
//TODO: improve efficiency by changing from interleaved addressing to sequential addressing
//This for loop adds two adjacent numbers together, then sums the combination until only one number remains per block
for (int s = 1; s < blockDim.x; s *= 2) {
int index = 2 * s * threadIdx.x;
if (index < blockDim.x) {
sdata[index] += sdata[index + s];
}
//threads are synced to ensure all addition has completed before moving on
__syncthreads();
}
//each block stores its final value in the array c at the position of its unique block id
if (threadIdx.x == 0) c[blockIdx.x + blockIdx.y * gridDim.x] = sdata[0];
}
int main()
{
//number of values we want to add (memory restrictions make it impossible to add 1 billion at once)
int amountToAdd = 125000000;
//TODO: Optimize by removing the need to have an array of a power of two
//array is set to a power of two to make the addition easier
const int arraySize = 134217728;
int* a = new int[arraySize];
int* b = new int[arraySize];
int* c = new int[arraySize];
//create the array up to 8 times and reduce to a manageable amount of numbers (set i to 1 for 125,000,000 numbers and 8 for 1,000,000,000)
for (int i = 0; i < 8; i++){
createArray(amountToAdd, arraySize, a);
// Add vectors in parallel. reduces 125,000,000 numbers (8 times for 1 billion) stores in an array for further reduction
hipError_t cudaStatus = addWithCuda(c, a, arraySize, 32768, 4, 1024);
for (int j = 0; j < 32768 * 4; j++){
b[i*32768*4+j] = a[j];
//printf("{%d}", i*32768*4+j);
}
}
a = b;
//reduces the values further until only a single value remains
hipError_t cudaStatus = addWithCuda(c, a, arraySize, 1024, 1, 1024);
addWithCuda(c, a, arraySize, 1, 1, 1024);
if (cudaStatus != hipSuccess) {
fprintf(stderr, "addWithCuda failed!");
return 1;
}
//Should print 1,000,000,000
printf("{%d}\n", a[0]);
//cudaDeviceReset must be called before exiting in order for profiling and
//tracing tools such as Nsight and Visual Profiler to show complete traces.
cudaStatus = hipDeviceReset();
if (cudaStatus != hipSuccess) {
fprintf(stderr, "hipDeviceReset failed!");
return 1;
}
return 0;
}
int * createArray(int amountToAdd, int arraySize, int * a){
//populate the array with data
for (int i = 0; i<amountToAdd; i++) {
a[i] = 1;
}
//fill the rest of the array with 0's so as not to affect the final result
for (int i = amountToAdd; i < arraySize; i++){
a[i] = 0;
}
return a;
}
// Helper function for using CUDA to add vectors in parallel.
hipError_t addWithCuda(int *c, int *a, unsigned int size, int gridx, int gridy, int dimBlock)
{
int *dev_a = 0;
int *dev_c = 0;
hipError_t cudaStatus;
// Choose which GPU to run on, change this on a multi-GPU system.
cudaStatus = hipSetDevice(0);
if (cudaStatus != hipSuccess) {
fprintf(stderr, "hipSetDevice failed! Do you have a CUDA-capable GPU installed?");
goto Error;
}
// Allocate GPU buffers for three vectors (two input, one output) .
cudaStatus = hipMalloc((void**)&dev_c, size * sizeof(int));
if (cudaStatus != hipSuccess) {
fprintf(stderr, "c hipMalloc failed!");
goto Error;
}
cudaStatus = hipMalloc((void**)&dev_a, size * sizeof(int));
if (cudaStatus != hipSuccess) {
fprintf(stderr, "a hipMalloc failed!");
goto Error;
}
// Copy input vectors from host memory to GPU buffers.
cudaStatus = hipMemcpy(dev_a, a, size * sizeof(int), hipMemcpyHostToDevice);
if (cudaStatus != hipSuccess) {
fprintf(stderr, "hipMemcpy failed!");
goto Error;
}
// Launch a kernel on the GPU with one thread for each element.
addKernel<<<dim3(gridx,gridy,1), dimBlock, dimBlock *sizeof(int)>>>(dev_c, dev_a);
// Check for any errors launching the kernel
cudaStatus = hipGetLastError();
if (cudaStatus != hipSuccess) {
fprintf(stderr, "addKernel launch failed: %s\n", hipGetErrorString(cudaStatus));
goto Error;
}
// cudaDeviceSynchronize waits for the kernel to finish, and returns
// any errors encountered during the launch.
cudaStatus = hipDeviceSynchronize();
if (cudaStatus != hipSuccess) {
fprintf(stderr, "hipDeviceSynchronize returned error code %d after launching addKernel!\n", cudaStatus);
goto Error;
}
// Copy output vector from GPU buffer to host memory.
cudaStatus = hipMemcpy(a, dev_c, size * sizeof(int), hipMemcpyDeviceToHost);
if (cudaStatus != hipSuccess) {
fprintf(stderr, "hipMemcpy failed!");
goto Error;
}
Error:
hipFree(dev_c);
hipFree(dev_a);
return cudaStatus;
} | .text
.amdgcn_target "amdgcn-amd-amdhsa--gfx1100"
.protected _Z9addKernelPiS_
.globl _Z9addKernelPiS_
.p2align 8
.type _Z9addKernelPiS_,@function
_Z9addKernelPiS_:
s_clause 0x2
s_load_b32 s2, s[0:1], 0x10
s_load_b32 s3, s[0:1], 0x1c
s_load_b64 s[4:5], s[0:1], 0x8
s_waitcnt lgkmcnt(0)
s_mul_i32 s2, s2, s15
s_and_b32 s3, s3, 0xffff
s_add_i32 s2, s2, s14
s_cmp_lt_u32 s3, 2
v_mad_u64_u32 v[1:2], null, s2, s3, v[0:1]
s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
v_ashrrev_i32_e32 v2, 31, v1
v_lshlrev_b64 v[1:2], 2, v[1:2]
s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_2)
v_add_co_u32 v1, vcc_lo, s4, v1
v_add_co_ci_u32_e32 v2, vcc_lo, s5, v2, vcc_lo
global_load_b32 v1, v[1:2], off
v_lshl_add_u32 v2, v0, 2, 0
s_waitcnt vmcnt(0)
ds_store_b32 v2, v1
s_waitcnt lgkmcnt(0)
s_barrier
buffer_gl0_inv
s_cbranch_scc1 .LBB0_5
s_mov_b32 s5, 1
s_set_inst_prefetch_distance 0x1
s_branch .LBB0_3
.p2align 6
.LBB0_2:
s_or_b32 exec_lo, exec_lo, s6
s_cmp_ge_u32 s4, s3
s_mov_b32 s5, s4
s_waitcnt lgkmcnt(0)
s_barrier
buffer_gl0_inv
s_cbranch_scc1 .LBB0_5
.LBB0_3:
s_lshl_b32 s4, s5, 1
s_mov_b32 s6, exec_lo
v_mul_lo_u32 v1, s4, v0
s_delay_alu instid0(VALU_DEP_1)
v_cmpx_gt_u32_e64 s3, v1
s_cbranch_execz .LBB0_2
v_add_nc_u32_e32 v2, s5, v1
v_lshl_add_u32 v1, v1, 2, 0
s_delay_alu instid0(VALU_DEP_2)
v_lshl_add_u32 v2, v2, 2, 0
ds_load_b32 v2, v2
ds_load_b32 v3, v1
s_waitcnt lgkmcnt(0)
v_add_nc_u32_e32 v2, v3, v2
ds_store_b32 v1, v2
s_branch .LBB0_2
.LBB0_5:
s_set_inst_prefetch_distance 0x2
s_mov_b32 s3, exec_lo
v_cmpx_eq_u32_e32 0, v0
s_cbranch_execz .LBB0_7
v_dual_mov_b32 v0, 0 :: v_dual_mov_b32 v1, 0
s_load_b64 s[0:1], s[0:1], 0x0
s_mov_b32 s3, 0
s_delay_alu instid0(SALU_CYCLE_1)
s_lshl_b64 s[2:3], s[2:3], 2
ds_load_b32 v0, v0
s_waitcnt lgkmcnt(0)
s_add_u32 s0, s0, s2
s_addc_u32 s1, s1, s3
global_store_b32 v1, v0, s[0:1]
.LBB0_7:
s_nop 0
s_sendmsg sendmsg(MSG_DEALLOC_VGPRS)
s_endpgm
.section .rodata,"a",@progbits
.p2align 6, 0x0
.amdhsa_kernel _Z9addKernelPiS_
.amdhsa_group_segment_fixed_size 0
.amdhsa_private_segment_fixed_size 0
.amdhsa_kernarg_size 272
.amdhsa_user_sgpr_count 14
.amdhsa_user_sgpr_dispatch_ptr 0
.amdhsa_user_sgpr_queue_ptr 0
.amdhsa_user_sgpr_kernarg_segment_ptr 1
.amdhsa_user_sgpr_dispatch_id 0
.amdhsa_user_sgpr_private_segment_size 0
.amdhsa_wavefront_size32 1
.amdhsa_uses_dynamic_stack 0
.amdhsa_enable_private_segment 0
.amdhsa_system_sgpr_workgroup_id_x 1
.amdhsa_system_sgpr_workgroup_id_y 1
.amdhsa_system_sgpr_workgroup_id_z 0
.amdhsa_system_sgpr_workgroup_info 0
.amdhsa_system_vgpr_workitem_id 0
.amdhsa_next_free_vgpr 4
.amdhsa_next_free_sgpr 16
.amdhsa_float_round_mode_32 0
.amdhsa_float_round_mode_16_64 0
.amdhsa_float_denorm_mode_32 3
.amdhsa_float_denorm_mode_16_64 3
.amdhsa_dx10_clamp 1
.amdhsa_ieee_mode 1
.amdhsa_fp16_overflow 0
.amdhsa_workgroup_processor_mode 1
.amdhsa_memory_ordered 1
.amdhsa_forward_progress 0
.amdhsa_shared_vgpr_count 0
.amdhsa_exception_fp_ieee_invalid_op 0
.amdhsa_exception_fp_denorm_src 0
.amdhsa_exception_fp_ieee_div_zero 0
.amdhsa_exception_fp_ieee_overflow 0
.amdhsa_exception_fp_ieee_underflow 0
.amdhsa_exception_fp_ieee_inexact 0
.amdhsa_exception_int_div_zero 0
.end_amdhsa_kernel
.text
.Lfunc_end0:
.size _Z9addKernelPiS_, .Lfunc_end0-_Z9addKernelPiS_
.section .AMDGPU.csdata,"",@progbits
.text
.p2alignl 7, 3214868480
.fill 96, 4, 3214868480
.type __hip_cuid_,@object
.section .bss,"aw",@nobits
.globl __hip_cuid_
__hip_cuid_:
.byte 0
.size __hip_cuid_, 1
.ident "AMD clang version 18.0.0git (https://github.com/RadeonOpenCompute/llvm-project roc-6.3.2 25012 e5bf7e55c91490b07c49d8960fa7983d864936c4)"
.section ".note.GNU-stack","",@progbits
.addrsig
.addrsig_sym __hip_cuid_
.amdgpu_metadata
---
amdhsa.kernels:
- .args:
- .address_space: global
.offset: 0
.size: 8
.value_kind: global_buffer
- .address_space: global
.offset: 8
.size: 8
.value_kind: global_buffer
- .offset: 16
.size: 4
.value_kind: hidden_block_count_x
- .offset: 20
.size: 4
.value_kind: hidden_block_count_y
- .offset: 24
.size: 4
.value_kind: hidden_block_count_z
- .offset: 28
.size: 2
.value_kind: hidden_group_size_x
- .offset: 30
.size: 2
.value_kind: hidden_group_size_y
- .offset: 32
.size: 2
.value_kind: hidden_group_size_z
- .offset: 34
.size: 2
.value_kind: hidden_remainder_x
- .offset: 36
.size: 2
.value_kind: hidden_remainder_y
- .offset: 38
.size: 2
.value_kind: hidden_remainder_z
- .offset: 56
.size: 8
.value_kind: hidden_global_offset_x
- .offset: 64
.size: 8
.value_kind: hidden_global_offset_y
- .offset: 72
.size: 8
.value_kind: hidden_global_offset_z
- .offset: 80
.size: 2
.value_kind: hidden_grid_dims
- .offset: 136
.size: 4
.value_kind: hidden_dynamic_lds_size
.group_segment_fixed_size: 0
.kernarg_segment_align: 8
.kernarg_segment_size: 272
.language: OpenCL C
.language_version:
- 2
- 0
.max_flat_workgroup_size: 1024
.name: _Z9addKernelPiS_
.private_segment_fixed_size: 0
.sgpr_count: 18
.sgpr_spill_count: 0
.symbol: _Z9addKernelPiS_.kd
.uniform_work_group_size: 1
.uses_dynamic_stack: false
.vgpr_count: 4
.vgpr_spill_count: 0
.wavefront_size: 32
.workgroup_processor_mode: 1
amdhsa.target: amdgcn-amd-amdhsa--gfx1100
amdhsa.version:
- 1
- 2
...
.end_amdgpu_metadata |
You are a helpful coding assistant specialized in converting HIP source code to AMD host assembly. | #include "hip/hip_runtime.h"
#include <stdio.h>
#include <time.h>
hipError_t addWithCuda(int *c, int *a, unsigned int size, int gridx, int gridy, int dimBlock);
int * createArray(int amountToAdd, int arraySize, int * a);
__global__ void addKernel(int *c, int *a)
{
//declares space in shared memory
extern __shared__ int sdata[];
//gets unique thread id
int tid = (blockIdx.y*gridDim.x + blockIdx.x)*blockDim.x + threadIdx.x;
//each thread copies information from global into shared memory
sdata[threadIdx.x] = a[tid];
//threads are synced as all data must be copied over before any addition can be done
__syncthreads();
//TODO: improve efficiency by changing from interleaved addressing to sequential addressing
//This for loop adds two adjacent numbers together, then sums the combination until only one number remains per block
for (int s = 1; s < blockDim.x; s *= 2) {
int index = 2 * s * threadIdx.x;
if (index < blockDim.x) {
sdata[index] += sdata[index + s];
}
//threads are synced to ensure all addition has completed before moving on
__syncthreads();
}
//each block stores its final value in the array c at the position of its unique block id
if (threadIdx.x == 0) c[blockIdx.x + blockIdx.y * gridDim.x] = sdata[0];
}
int main()
{
//number of values we want to add (memory restrictions make it impossible to add 1 billion at once)
int amountToAdd = 125000000;
//TODO: Optimize by removing the need to have an array of a power of two
//array is set to a power of two to make the addition easier
const int arraySize = 134217728;
int* a = new int[arraySize];
int* b = new int[arraySize];
int* c = new int[arraySize];
//create the array up to 8 times and reduce to a manageable amount of numbers (set i to 1 for 125,000,000 numbers and 8 for 1,000,000,000)
for (int i = 0; i < 8; i++){
createArray(amountToAdd, arraySize, a);
// Add vectors in parallel. reduces 125,000,000 numbers (8 times for 1 billion) stores in an array for further reduction
hipError_t cudaStatus = addWithCuda(c, a, arraySize, 32768, 4, 1024);
for (int j = 0; j < 32768 * 4; j++){
b[i*32768*4+j] = a[j];
//printf("{%d}", i*32768*4+j);
}
}
a = b;
//reduces the values further until only a single value remains
hipError_t cudaStatus = addWithCuda(c, a, arraySize, 1024, 1, 1024);
addWithCuda(c, a, arraySize, 1, 1, 1024);
if (cudaStatus != hipSuccess) {
fprintf(stderr, "addWithCuda failed!");
return 1;
}
//Should print 1,000,000,000
printf("{%d}\n", a[0]);
//cudaDeviceReset must be called before exiting in order for profiling and
//tracing tools such as Nsight and Visual Profiler to show complete traces.
cudaStatus = hipDeviceReset();
if (cudaStatus != hipSuccess) {
fprintf(stderr, "hipDeviceReset failed!");
return 1;
}
return 0;
}
int * createArray(int amountToAdd, int arraySize, int * a){
//populate the array with data
for (int i = 0; i<amountToAdd; i++) {
a[i] = 1;
}
//fill the rest of the array with 0's so as not to affect the final result
for (int i = amountToAdd; i < arraySize; i++){
a[i] = 0;
}
return a;
}
// Helper function for using CUDA to add vectors in parallel.
hipError_t addWithCuda(int *c, int *a, unsigned int size, int gridx, int gridy, int dimBlock)
{
int *dev_a = 0;
int *dev_c = 0;
hipError_t cudaStatus;
// Choose which GPU to run on, change this on a multi-GPU system.
cudaStatus = hipSetDevice(0);
if (cudaStatus != hipSuccess) {
fprintf(stderr, "hipSetDevice failed! Do you have a CUDA-capable GPU installed?");
goto Error;
}
// Allocate GPU buffers for three vectors (two input, one output) .
cudaStatus = hipMalloc((void**)&dev_c, size * sizeof(int));
if (cudaStatus != hipSuccess) {
fprintf(stderr, "c hipMalloc failed!");
goto Error;
}
cudaStatus = hipMalloc((void**)&dev_a, size * sizeof(int));
if (cudaStatus != hipSuccess) {
fprintf(stderr, "a hipMalloc failed!");
goto Error;
}
// Copy input vectors from host memory to GPU buffers.
cudaStatus = hipMemcpy(dev_a, a, size * sizeof(int), hipMemcpyHostToDevice);
if (cudaStatus != hipSuccess) {
fprintf(stderr, "hipMemcpy failed!");
goto Error;
}
// Launch a kernel on the GPU with one thread for each element.
addKernel<<<dim3(gridx,gridy,1), dimBlock, dimBlock *sizeof(int)>>>(dev_c, dev_a);
// Check for any errors launching the kernel
cudaStatus = hipGetLastError();
if (cudaStatus != hipSuccess) {
fprintf(stderr, "addKernel launch failed: %s\n", hipGetErrorString(cudaStatus));
goto Error;
}
// cudaDeviceSynchronize waits for the kernel to finish, and returns
// any errors encountered during the launch.
cudaStatus = hipDeviceSynchronize();
if (cudaStatus != hipSuccess) {
fprintf(stderr, "hipDeviceSynchronize returned error code %d after launching addKernel!\n", cudaStatus);
goto Error;
}
// Copy output vector from GPU buffer to host memory.
cudaStatus = hipMemcpy(a, dev_c, size * sizeof(int), hipMemcpyDeviceToHost);
if (cudaStatus != hipSuccess) {
fprintf(stderr, "hipMemcpy failed!");
goto Error;
}
Error:
hipFree(dev_c);
hipFree(dev_a);
return cudaStatus;
} | .text
.file "addNumbersCuda.hip"
.globl _Z24__device_stub__addKernelPiS_ # -- Begin function _Z24__device_stub__addKernelPiS_
.p2align 4, 0x90
.type _Z24__device_stub__addKernelPiS_,@function
_Z24__device_stub__addKernelPiS_: # @_Z24__device_stub__addKernelPiS_
.cfi_startproc
# %bb.0:
subq $88, %rsp
.cfi_def_cfa_offset 96
movq %rdi, 56(%rsp)
movq %rsi, 48(%rsp)
leaq 56(%rsp), %rax
movq %rax, 64(%rsp)
leaq 48(%rsp), %rax
movq %rax, 72(%rsp)
leaq 32(%rsp), %rdi
leaq 16(%rsp), %rsi
leaq 8(%rsp), %rdx
movq %rsp, %rcx
callq __hipPopCallConfiguration
movq 32(%rsp), %rsi
movl 40(%rsp), %edx
movq 16(%rsp), %rcx
movl 24(%rsp), %r8d
leaq 64(%rsp), %r9
movl $_Z9addKernelPiS_, %edi
pushq (%rsp)
.cfi_adjust_cfa_offset 8
pushq 16(%rsp)
.cfi_adjust_cfa_offset 8
callq hipLaunchKernel
addq $104, %rsp
.cfi_adjust_cfa_offset -104
retq
.Lfunc_end0:
.size _Z24__device_stub__addKernelPiS_, .Lfunc_end0-_Z24__device_stub__addKernelPiS_
.cfi_endproc
# -- End function
.globl main # -- Begin function main
.p2align 4, 0x90
.type main,@function
main: # @main
.cfi_startproc
# %bb.0:
pushq %rbp
.cfi_def_cfa_offset 16
pushq %r15
.cfi_def_cfa_offset 24
pushq %r14
.cfi_def_cfa_offset 32
pushq %r13
.cfi_def_cfa_offset 40
pushq %r12
.cfi_def_cfa_offset 48
pushq %rbx
.cfi_def_cfa_offset 56
pushq %rax
.cfi_def_cfa_offset 64
.cfi_offset %rbx, -56
.cfi_offset %r12, -48
.cfi_offset %r13, -40
.cfi_offset %r14, -32
.cfi_offset %r15, -24
.cfi_offset %rbp, -16
movl $536870912, %edi # imm = 0x20000000
callq _Znam
movq %rax, %r14
movl $536870912, %edi # imm = 0x20000000
callq _Znam
movq %rax, %rbx
movq %r14, %r15
addq $500000000, %r15 # imm = 0x1DCD6500
xorl %r13d, %r13d
.p2align 4, 0x90
.LBB1_1: # %.lr.ph.i.preheader
# =>This Loop Header: Depth=1
# Child Loop BB1_2 Depth 2
movq %r13, %r12
shlq $19, %r12
addq %rbx, %r12
xorl %eax, %eax
.p2align 4, 0x90
.LBB1_2: # %.lr.ph.i
# Parent Loop BB1_1 Depth=1
# => This Inner Loop Header: Depth=2
movl $1, (%r14,%rax,4)
incq %rax
cmpq $125000000, %rax # imm = 0x7735940
jne .LBB1_2
# %bb.3: # %_Z11createArrayiiPi.exit
# in Loop: Header=BB1_1 Depth=1
movl $36870912, %edx # imm = 0x2329B00
movq %r15, %rdi
xorl %esi, %esi
callq memset@PLT
movq %r14, %rsi
movl $134217728, %edx # imm = 0x8000000
movl $32768, %ecx # imm = 0x8000
movl $4, %r8d
movl $1024, %r9d # imm = 0x400
callq _Z11addWithCudaPiS_jiii
movl $524288, %edx # imm = 0x80000
movq %r12, %rdi
movq %r14, %rsi
callq memcpy@PLT
incq %r13
cmpq $8, %r13
jne .LBB1_1
# %bb.4:
movq %rbx, %rsi
movl $134217728, %edx # imm = 0x8000000
movl $1024, %ecx # imm = 0x400
movl $1, %r8d
movl $1024, %r9d # imm = 0x400
callq _Z11addWithCudaPiS_jiii
movl %eax, %ebp
movq %rbx, %rsi
movl $134217728, %edx # imm = 0x8000000
movl $1, %ecx
movl $1, %r8d
movl $1024, %r9d # imm = 0x400
callq _Z11addWithCudaPiS_jiii
testl %ebp, %ebp
jne .LBB1_5
# %bb.6:
movl (%rbx), %esi
xorl %ebx, %ebx
movl $.L.str.1, %edi
xorl %eax, %eax
callq printf
callq hipDeviceReset
testl %eax, %eax
jne .LBB1_7
.LBB1_9:
movl %ebx, %eax
addq $8, %rsp
.cfi_def_cfa_offset 56
popq %rbx
.cfi_def_cfa_offset 48
popq %r12
.cfi_def_cfa_offset 40
popq %r13
.cfi_def_cfa_offset 32
popq %r14
.cfi_def_cfa_offset 24
popq %r15
.cfi_def_cfa_offset 16
popq %rbp
.cfi_def_cfa_offset 8
retq
.LBB1_5:
.cfi_def_cfa_offset 64
movq stderr(%rip), %rcx
movl $.L.str, %edi
movl $19, %esi
jmp .LBB1_8
.LBB1_7:
movq stderr(%rip), %rcx
movl $.L.str.2, %edi
movl $22, %esi
.LBB1_8:
movl $1, %edx
callq fwrite@PLT
movl $1, %ebx
jmp .LBB1_9
.Lfunc_end1:
.size main, .Lfunc_end1-main
.cfi_endproc
# -- End function
.globl _Z11createArrayiiPi # -- Begin function _Z11createArrayiiPi
.p2align 4, 0x90
.type _Z11createArrayiiPi,@function
_Z11createArrayiiPi: # @_Z11createArrayiiPi
.cfi_startproc
# %bb.0:
pushq %rbx
.cfi_def_cfa_offset 16
.cfi_offset %rbx, -16
movq %rdx, %rbx
# kill: def $edi killed $edi def $rdi
testl %edi, %edi
jle .LBB2_3
# %bb.1: # %.lr.ph.preheader
movl %edi, %eax
xorl %ecx, %ecx
.p2align 4, 0x90
.LBB2_2: # %.lr.ph
# =>This Inner Loop Header: Depth=1
movl $1, (%rbx,%rcx,4)
incq %rcx
cmpq %rcx, %rax
jne .LBB2_2
.LBB2_3: # %.preheader
cmpl %esi, %edi
jge .LBB2_5
# %bb.4: # %.lr.ph15.preheader
movslq %edi, %rax
leaq (%rbx,%rax,4), %rax
notl %edi
addl %esi, %edi
leaq 4(,%rdi,4), %rdx
movq %rax, %rdi
xorl %esi, %esi
callq memset@PLT
.LBB2_5: # %._crit_edge
movq %rbx, %rax
popq %rbx
.cfi_def_cfa_offset 8
retq
.Lfunc_end2:
.size _Z11createArrayiiPi, .Lfunc_end2-_Z11createArrayiiPi
.cfi_endproc
# -- End function
.globl _Z11addWithCudaPiS_jiii # -- Begin function _Z11addWithCudaPiS_jiii
.p2align 4, 0x90
.type _Z11addWithCudaPiS_jiii,@function
_Z11addWithCudaPiS_jiii: # @_Z11addWithCudaPiS_jiii
.cfi_startproc
# %bb.0:
pushq %rbp
.cfi_def_cfa_offset 16
pushq %r15
.cfi_def_cfa_offset 24
pushq %r14
.cfi_def_cfa_offset 32
pushq %r12
.cfi_def_cfa_offset 40
pushq %rbx
.cfi_def_cfa_offset 48
subq $96, %rsp
.cfi_def_cfa_offset 144
.cfi_offset %rbx, -48
.cfi_offset %r12, -40
.cfi_offset %r14, -32
.cfi_offset %r15, -24
.cfi_offset %rbp, -16
movl %r9d, %r12d
movl %r8d, %r15d
movl %ecx, %ebp
movl %edx, %r14d
movq %rsi, %rbx
movq $0, 8(%rsp)
movq $0, (%rsp)
xorl %edi, %edi
callq hipSetDevice
testl %eax, %eax
jne .LBB3_10
# %bb.1:
movl %r14d, %r14d
shlq $2, %r14
movq %rsp, %rdi
movq %r14, %rsi
callq hipMalloc
testl %eax, %eax
jne .LBB3_11
# %bb.2:
leaq 8(%rsp), %rdi
movq %r14, %rsi
callq hipMalloc
testl %eax, %eax
jne .LBB3_12
# %bb.3:
movq 8(%rsp), %rdi
movq %rbx, %rsi
movq %r14, %rdx
movl $1, %ecx
callq hipMemcpy
testl %eax, %eax
jne .LBB3_14
# %bb.4:
movslq %r12d, %rax
leaq (,%rax,4), %r8
shlq $32, %r15
movl %ebp, %edi
orq %r15, %rdi
movl %eax, %eax
movabsq $4294967296, %rdx # imm = 0x100000000
orq %rax, %rdx
movl $1, %esi
movl $1, %ecx
xorl %r9d, %r9d
callq __hipPushCallConfiguration
testl %eax, %eax
jne .LBB3_6
# %bb.5:
movq (%rsp), %rax
movq 8(%rsp), %rcx
movq %rax, 72(%rsp)
movq %rcx, 64(%rsp)
leaq 72(%rsp), %rax
movq %rax, 80(%rsp)
leaq 64(%rsp), %rax
movq %rax, 88(%rsp)
leaq 48(%rsp), %rdi
leaq 32(%rsp), %rsi
leaq 24(%rsp), %rdx
leaq 16(%rsp), %rcx
callq __hipPopCallConfiguration
movq 48(%rsp), %rsi
movl 56(%rsp), %edx
movq 32(%rsp), %rcx
movl 40(%rsp), %r8d
leaq 80(%rsp), %r9
movl $_Z9addKernelPiS_, %edi
pushq 16(%rsp)
.cfi_adjust_cfa_offset 8
pushq 32(%rsp)
.cfi_adjust_cfa_offset 8
callq hipLaunchKernel
addq $16, %rsp
.cfi_adjust_cfa_offset -16
.LBB3_6:
callq hipGetLastError
testl %eax, %eax
jne .LBB3_18
# %bb.7:
callq hipDeviceSynchronize
testl %eax, %eax
jne .LBB3_19
# %bb.8:
movq (%rsp), %rsi
movq %rbx, %rdi
movq %r14, %rdx
movl $2, %ecx
callq hipMemcpy
xorl %ebx, %ebx
testl %eax, %eax
je .LBB3_17
# %bb.9:
movq stderr(%rip), %rcx
movl $.L.str.6, %edi
movl $17, %esi
movl $1, %edx
movl %eax, %ebx
jmp .LBB3_16
.LBB3_10:
movl %eax, %ebx
movq stderr(%rip), %rcx
movl $.L.str.3, %edi
movl $63, %esi
jmp .LBB3_15
.LBB3_11:
movl %eax, %ebx
movq stderr(%rip), %rcx
movl $.L.str.4, %edi
jmp .LBB3_13
.LBB3_12:
movl %eax, %ebx
movq stderr(%rip), %rcx
movl $.L.str.5, %edi
.LBB3_13:
movl $19, %esi
jmp .LBB3_15
.LBB3_14:
movl %eax, %ebx
movq stderr(%rip), %rcx
movl $.L.str.6, %edi
movl $17, %esi
.LBB3_15:
movl $1, %edx
.LBB3_16:
callq fwrite@PLT
.LBB3_17:
movq (%rsp), %rdi
callq hipFree
movq 8(%rsp), %rdi
callq hipFree
movl %ebx, %eax
addq $96, %rsp
.cfi_def_cfa_offset 48
popq %rbx
.cfi_def_cfa_offset 40
popq %r12
.cfi_def_cfa_offset 32
popq %r14
.cfi_def_cfa_offset 24
popq %r15
.cfi_def_cfa_offset 16
popq %rbp
.cfi_def_cfa_offset 8
retq
.LBB3_18:
.cfi_def_cfa_offset 144
movq stderr(%rip), %r14
movl %eax, %ebx
movl %eax, %edi
callq hipGetErrorString
movl $.L.str.7, %esi
movq %r14, %rdi
movq %rax, %rdx
xorl %eax, %eax
callq fprintf
jmp .LBB3_17
.LBB3_19:
movq stderr(%rip), %rdi
movl $.L.str.8, %esi
movl %eax, %ebx
movl %eax, %edx
xorl %eax, %eax
callq fprintf
jmp .LBB3_17
.Lfunc_end3:
.size _Z11addWithCudaPiS_jiii, .Lfunc_end3-_Z11addWithCudaPiS_jiii
.cfi_endproc
# -- End function
.p2align 4, 0x90 # -- Begin function __hip_module_ctor
.type __hip_module_ctor,@function
__hip_module_ctor: # @__hip_module_ctor
.cfi_startproc
# %bb.0:
subq $40, %rsp
.cfi_def_cfa_offset 48
cmpq $0, __hip_gpubin_handle(%rip)
jne .LBB4_2
# %bb.1:
movl $__hip_fatbin_wrapper, %edi
callq __hipRegisterFatBinary
movq %rax, __hip_gpubin_handle(%rip)
.LBB4_2:
movq __hip_gpubin_handle(%rip), %rdi
xorps %xmm0, %xmm0
movups %xmm0, 16(%rsp)
movups %xmm0, (%rsp)
movl $_Z9addKernelPiS_, %esi
movl $.L__unnamed_1, %edx
movl $.L__unnamed_1, %ecx
movl $-1, %r8d
xorl %r9d, %r9d
callq __hipRegisterFunction
movl $__hip_module_dtor, %edi
addq $40, %rsp
.cfi_def_cfa_offset 8
jmp atexit # TAILCALL
.Lfunc_end4:
.size __hip_module_ctor, .Lfunc_end4-__hip_module_ctor
.cfi_endproc
# -- End function
.p2align 4, 0x90 # -- Begin function __hip_module_dtor
.type __hip_module_dtor,@function
__hip_module_dtor: # @__hip_module_dtor
.cfi_startproc
# %bb.0:
movq __hip_gpubin_handle(%rip), %rdi
testq %rdi, %rdi
je .LBB5_2
# %bb.1:
pushq %rax
.cfi_def_cfa_offset 16
callq __hipUnregisterFatBinary
movq $0, __hip_gpubin_handle(%rip)
addq $8, %rsp
.cfi_def_cfa_offset 8
.LBB5_2:
retq
.Lfunc_end5:
.size __hip_module_dtor, .Lfunc_end5-__hip_module_dtor
.cfi_endproc
# -- End function
.type _Z9addKernelPiS_,@object # @_Z9addKernelPiS_
.section .rodata,"a",@progbits
.globl _Z9addKernelPiS_
.p2align 3, 0x0
_Z9addKernelPiS_:
.quad _Z24__device_stub__addKernelPiS_
.size _Z9addKernelPiS_, 8
.type .L.str,@object # @.str
.section .rodata.str1.1,"aMS",@progbits,1
.L.str:
.asciz "addWithCuda failed!"
.size .L.str, 20
.type .L.str.1,@object # @.str.1
.L.str.1:
.asciz "{%d}\n"
.size .L.str.1, 6
.type .L.str.2,@object # @.str.2
.L.str.2:
.asciz "hipDeviceReset failed!"
.size .L.str.2, 23
.type .L.str.3,@object # @.str.3
.L.str.3:
.asciz "hipSetDevice failed! Do you have a CUDA-capable GPU installed?"
.size .L.str.3, 64
.type .L.str.4,@object # @.str.4
.L.str.4:
.asciz "c hipMalloc failed!"
.size .L.str.4, 20
.type .L.str.5,@object # @.str.5
.L.str.5:
.asciz "a hipMalloc failed!"
.size .L.str.5, 20
.type .L.str.6,@object # @.str.6
.L.str.6:
.asciz "hipMemcpy failed!"
.size .L.str.6, 18
.type .L.str.7,@object # @.str.7
.L.str.7:
.asciz "addKernel launch failed: %s\n"
.size .L.str.7, 29
.type .L.str.8,@object # @.str.8
.L.str.8:
.asciz "hipDeviceSynchronize returned error code %d after launching addKernel!\n"
.size .L.str.8, 72
.type .L__unnamed_1,@object # @0
.L__unnamed_1:
.asciz "_Z9addKernelPiS_"
.size .L__unnamed_1, 17
.type __hip_fatbin_wrapper,@object # @__hip_fatbin_wrapper
.section .hipFatBinSegment,"a",@progbits
.p2align 3, 0x0
__hip_fatbin_wrapper:
.long 1212764230 # 0x48495046
.long 1 # 0x1
.quad __hip_fatbin
.quad 0
.size __hip_fatbin_wrapper, 24
.type __hip_gpubin_handle,@object # @__hip_gpubin_handle
.local __hip_gpubin_handle
.comm __hip_gpubin_handle,8,8
.section .init_array,"aw",@init_array
.p2align 3, 0x0
.quad __hip_module_ctor
.type __hip_cuid_,@object # @__hip_cuid_
.bss
.globl __hip_cuid_
__hip_cuid_:
.byte 0 # 0x0
.size __hip_cuid_, 1
.section ".linker-options","e",@llvm_linker_options
.ident "AMD clang version 18.0.0git (https://github.com/RadeonOpenCompute/llvm-project roc-6.3.2 25012 e5bf7e55c91490b07c49d8960fa7983d864936c4)"
.section ".note.GNU-stack","",@progbits
.addrsig
.addrsig_sym _Z24__device_stub__addKernelPiS_
.addrsig_sym __hip_module_ctor
.addrsig_sym __hip_module_dtor
.addrsig_sym _Z9addKernelPiS_
.addrsig_sym __hip_fatbin
.addrsig_sym __hip_fatbin_wrapper
.addrsig_sym __hip_cuid_ |
You are a helpful coding assistant specialized in converting from CUDA device assembly to AMD device assembly. | code for sm_80
Function : _Z9addKernelPiS_
.headerflags @"EF_CUDA_TEXMODE_UNIFIED EF_CUDA_64BIT_ADDRESS EF_CUDA_SM80 EF_CUDA_VIRTUAL_SM(EF_CUDA_SM80)"
/*0000*/ MOV R1, c[0x0][0x28] ; /* 0x00000a0000017a02 */
/* 0x000fe40000000f00 */
/*0010*/ S2R R0, SR_CTAID.Y ; /* 0x0000000000007919 */
/* 0x000e220000002600 */
/*0020*/ ULDC.64 UR4, c[0x0][0x118] ; /* 0x0000460000047ab9 */
/* 0x000fc60000000a00 */
/*0030*/ S2R R3, SR_CTAID.X ; /* 0x0000000000037919 */
/* 0x000e280000002500 */
/*0040*/ S2R R5, SR_TID.X ; /* 0x0000000000057919 */
/* 0x000e620000002100 */
/*0050*/ IMAD R0, R0, c[0x0][0xc], R3 ; /* 0x0000030000007a24 */
/* 0x001fe200078e0203 */
/*0060*/ HFMA2.MMA R3, -RZ, RZ, 0, 2.384185791015625e-07 ; /* 0x00000004ff037435 */
/* 0x000fc600000001ff */
/*0070*/ IMAD R2, R0, c[0x0][0x0], R5 ; /* 0x0000000000027a24 */
/* 0x002fce00078e0205 */
/*0080*/ IMAD.WIDE R2, R2, R3, c[0x0][0x168] ; /* 0x00005a0002027625 */
/* 0x000fcc00078e0203 */
/*0090*/ LDG.E R2, [R2.64] ; /* 0x0000000402027981 */
/* 0x000ea2000c1e1900 */
/*00a0*/ IMAD.MOV.U32 R4, RZ, RZ, c[0x0][0x0] ; /* 0x00000000ff047624 */
/* 0x000fe200078e00ff */
/*00b0*/ ISETP.NE.AND P0, PT, R5, RZ, PT ; /* 0x000000ff0500720c */
/* 0x000fc80003f05270 */
/*00c0*/ ISETP.GE.U32.AND P1, PT, R4, 0x2, PT ; /* 0x000000020400780c */
/* 0x000fe20003f26070 */
/*00d0*/ STS [R5.X4], R2 ; /* 0x0000000205007388 */
/* 0x0041e80000004800 */
/*00e0*/ BAR.SYNC.DEFER_BLOCKING 0x0 ; /* 0x0000000000007b1d */
/* 0x000ff00000010000 */
/*00f0*/ @!P1 BRA 0x1d0 ; /* 0x000000d000009947 */
/* 0x000fea0003800000 */
/*0100*/ MOV R2, 0x1 ; /* 0x0000000100027802 */
/* 0x001fca0000000f00 */
/*0110*/ IMAD.SHL.U32 R6, R2, 0x2, RZ ; /* 0x0000000202067824 */
/* 0x000fc800078e00ff */
/*0120*/ IMAD R7, R6, R5, RZ ; /* 0x0000000506077224 */
/* 0x000fca00078e02ff */
/*0130*/ ISETP.GE.U32.AND P1, PT, R7, c[0x0][0x0], PT ; /* 0x0000000007007a0c */
/* 0x000fda0003f26070 */
/*0140*/ @!P1 IADD3 R3, R7, R2, RZ ; /* 0x0000000207039210 */
/* 0x000fe40007ffe0ff */
/*0150*/ @!P1 LDS R2, [R7.X4] ; /* 0x0000000007029984 */
/* 0x000fe80000004800 */
/*0160*/ @!P1 LDS R3, [R3.X4] ; /* 0x0000000003039984 */
/* 0x000e240000004800 */
/*0170*/ @!P1 IMAD.IADD R4, R2, 0x1, R3 ; /* 0x0000000102049824 */
/* 0x001fe200078e0203 */
/*0180*/ MOV R2, R6 ; /* 0x0000000600027202 */
/* 0x000fc80000000f00 */
/*0190*/ @!P1 STS [R7.X4], R4 ; /* 0x0000000407009388 */
/* 0x0001e80000004800 */
/*01a0*/ BAR.SYNC.DEFER_BLOCKING 0x0 ; /* 0x0000000000007b1d */
/* 0x000fe20000010000 */
/*01b0*/ ISETP.GE.U32.AND P1, PT, R6, c[0x0][0x0], PT ; /* 0x0000000006007a0c */
/* 0x000fda0003f26070 */
/*01c0*/ @!P1 BRA 0x110 ; /* 0xffffff4000009947 */
/* 0x001fea000383ffff */
/*01d0*/ @P0 EXIT ; /* 0x000000000000094d */
/* 0x001fea0003800000 */
/*01e0*/ LDS R5, [RZ] ; /* 0x00000000ff057984 */
/* 0x000e220000000800 */
/*01f0*/ IMAD.MOV.U32 R3, RZ, RZ, 0x4 ; /* 0x00000004ff037424 */
/* 0x000fc800078e00ff */
/*0200*/ IMAD.WIDE.U32 R2, R0, R3, c[0x0][0x160] ; /* 0x0000580000027625 */
/* 0x000fca00078e0003 */
/*0210*/ STG.E [R2.64], R5 ; /* 0x0000000502007986 */
/* 0x001fe2000c101904 */
/*0220*/ EXIT ; /* 0x000000000000794d */
/* 0x000fea0003800000 */
/*0230*/ BRA 0x230; /* 0xfffffff000007947 */
/* 0x000fc0000383ffff */
/*0240*/ NOP; /* 0x0000000000007918 */
/* 0x000fc00000000000 */
/*0250*/ NOP; /* 0x0000000000007918 */
/* 0x000fc00000000000 */
/*0260*/ NOP; /* 0x0000000000007918 */
/* 0x000fc00000000000 */
/*0270*/ NOP; /* 0x0000000000007918 */
/* 0x000fc00000000000 */
/*0280*/ NOP; /* 0x0000000000007918 */
/* 0x000fc00000000000 */
/*0290*/ NOP; /* 0x0000000000007918 */
/* 0x000fc00000000000 */
/*02a0*/ NOP; /* 0x0000000000007918 */
/* 0x000fc00000000000 */
/*02b0*/ NOP; /* 0x0000000000007918 */
/* 0x000fc00000000000 */
/*02c0*/ NOP; /* 0x0000000000007918 */
/* 0x000fc00000000000 */
/*02d0*/ NOP; /* 0x0000000000007918 */
/* 0x000fc00000000000 */
/*02e0*/ NOP; /* 0x0000000000007918 */
/* 0x000fc00000000000 */
/*02f0*/ NOP; /* 0x0000000000007918 */
/* 0x000fc00000000000 */
.......... | .text
.amdgcn_target "amdgcn-amd-amdhsa--gfx1100"
.protected _Z9addKernelPiS_
.globl _Z9addKernelPiS_
.p2align 8
.type _Z9addKernelPiS_,@function
_Z9addKernelPiS_:
s_clause 0x2
s_load_b32 s2, s[0:1], 0x10
s_load_b32 s3, s[0:1], 0x1c
s_load_b64 s[4:5], s[0:1], 0x8
s_waitcnt lgkmcnt(0)
s_mul_i32 s2, s2, s15
s_and_b32 s3, s3, 0xffff
s_add_i32 s2, s2, s14
s_cmp_lt_u32 s3, 2
v_mad_u64_u32 v[1:2], null, s2, s3, v[0:1]
s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
v_ashrrev_i32_e32 v2, 31, v1
v_lshlrev_b64 v[1:2], 2, v[1:2]
s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_2)
v_add_co_u32 v1, vcc_lo, s4, v1
v_add_co_ci_u32_e32 v2, vcc_lo, s5, v2, vcc_lo
global_load_b32 v1, v[1:2], off
v_lshl_add_u32 v2, v0, 2, 0
s_waitcnt vmcnt(0)
ds_store_b32 v2, v1
s_waitcnt lgkmcnt(0)
s_barrier
buffer_gl0_inv
s_cbranch_scc1 .LBB0_5
s_mov_b32 s5, 1
s_set_inst_prefetch_distance 0x1
s_branch .LBB0_3
.p2align 6
.LBB0_2:
s_or_b32 exec_lo, exec_lo, s6
s_cmp_ge_u32 s4, s3
s_mov_b32 s5, s4
s_waitcnt lgkmcnt(0)
s_barrier
buffer_gl0_inv
s_cbranch_scc1 .LBB0_5
.LBB0_3:
s_lshl_b32 s4, s5, 1
s_mov_b32 s6, exec_lo
v_mul_lo_u32 v1, s4, v0
s_delay_alu instid0(VALU_DEP_1)
v_cmpx_gt_u32_e64 s3, v1
s_cbranch_execz .LBB0_2
v_add_nc_u32_e32 v2, s5, v1
v_lshl_add_u32 v1, v1, 2, 0
s_delay_alu instid0(VALU_DEP_2)
v_lshl_add_u32 v2, v2, 2, 0
ds_load_b32 v2, v2
ds_load_b32 v3, v1
s_waitcnt lgkmcnt(0)
v_add_nc_u32_e32 v2, v3, v2
ds_store_b32 v1, v2
s_branch .LBB0_2
.LBB0_5:
s_set_inst_prefetch_distance 0x2
s_mov_b32 s3, exec_lo
v_cmpx_eq_u32_e32 0, v0
s_cbranch_execz .LBB0_7
v_dual_mov_b32 v0, 0 :: v_dual_mov_b32 v1, 0
s_load_b64 s[0:1], s[0:1], 0x0
s_mov_b32 s3, 0
s_delay_alu instid0(SALU_CYCLE_1)
s_lshl_b64 s[2:3], s[2:3], 2
ds_load_b32 v0, v0
s_waitcnt lgkmcnt(0)
s_add_u32 s0, s0, s2
s_addc_u32 s1, s1, s3
global_store_b32 v1, v0, s[0:1]
.LBB0_7:
s_nop 0
s_sendmsg sendmsg(MSG_DEALLOC_VGPRS)
s_endpgm
.section .rodata,"a",@progbits
.p2align 6, 0x0
.amdhsa_kernel _Z9addKernelPiS_
.amdhsa_group_segment_fixed_size 0
.amdhsa_private_segment_fixed_size 0
.amdhsa_kernarg_size 272
.amdhsa_user_sgpr_count 14
.amdhsa_user_sgpr_dispatch_ptr 0
.amdhsa_user_sgpr_queue_ptr 0
.amdhsa_user_sgpr_kernarg_segment_ptr 1
.amdhsa_user_sgpr_dispatch_id 0
.amdhsa_user_sgpr_private_segment_size 0
.amdhsa_wavefront_size32 1
.amdhsa_uses_dynamic_stack 0
.amdhsa_enable_private_segment 0
.amdhsa_system_sgpr_workgroup_id_x 1
.amdhsa_system_sgpr_workgroup_id_y 1
.amdhsa_system_sgpr_workgroup_id_z 0
.amdhsa_system_sgpr_workgroup_info 0
.amdhsa_system_vgpr_workitem_id 0
.amdhsa_next_free_vgpr 4
.amdhsa_next_free_sgpr 16
.amdhsa_float_round_mode_32 0
.amdhsa_float_round_mode_16_64 0
.amdhsa_float_denorm_mode_32 3
.amdhsa_float_denorm_mode_16_64 3
.amdhsa_dx10_clamp 1
.amdhsa_ieee_mode 1
.amdhsa_fp16_overflow 0
.amdhsa_workgroup_processor_mode 1
.amdhsa_memory_ordered 1
.amdhsa_forward_progress 0
.amdhsa_shared_vgpr_count 0
.amdhsa_exception_fp_ieee_invalid_op 0
.amdhsa_exception_fp_denorm_src 0
.amdhsa_exception_fp_ieee_div_zero 0
.amdhsa_exception_fp_ieee_overflow 0
.amdhsa_exception_fp_ieee_underflow 0
.amdhsa_exception_fp_ieee_inexact 0
.amdhsa_exception_int_div_zero 0
.end_amdhsa_kernel
.text
.Lfunc_end0:
.size _Z9addKernelPiS_, .Lfunc_end0-_Z9addKernelPiS_
.section .AMDGPU.csdata,"",@progbits
.text
.p2alignl 7, 3214868480
.fill 96, 4, 3214868480
.type __hip_cuid_,@object
.section .bss,"aw",@nobits
.globl __hip_cuid_
__hip_cuid_:
.byte 0
.size __hip_cuid_, 1
.ident "AMD clang version 18.0.0git (https://github.com/RadeonOpenCompute/llvm-project roc-6.3.2 25012 e5bf7e55c91490b07c49d8960fa7983d864936c4)"
.section ".note.GNU-stack","",@progbits
.addrsig
.addrsig_sym __hip_cuid_
.amdgpu_metadata
---
amdhsa.kernels:
- .args:
- .address_space: global
.offset: 0
.size: 8
.value_kind: global_buffer
- .address_space: global
.offset: 8
.size: 8
.value_kind: global_buffer
- .offset: 16
.size: 4
.value_kind: hidden_block_count_x
- .offset: 20
.size: 4
.value_kind: hidden_block_count_y
- .offset: 24
.size: 4
.value_kind: hidden_block_count_z
- .offset: 28
.size: 2
.value_kind: hidden_group_size_x
- .offset: 30
.size: 2
.value_kind: hidden_group_size_y
- .offset: 32
.size: 2
.value_kind: hidden_group_size_z
- .offset: 34
.size: 2
.value_kind: hidden_remainder_x
- .offset: 36
.size: 2
.value_kind: hidden_remainder_y
- .offset: 38
.size: 2
.value_kind: hidden_remainder_z
- .offset: 56
.size: 8
.value_kind: hidden_global_offset_x
- .offset: 64
.size: 8
.value_kind: hidden_global_offset_y
- .offset: 72
.size: 8
.value_kind: hidden_global_offset_z
- .offset: 80
.size: 2
.value_kind: hidden_grid_dims
- .offset: 136
.size: 4
.value_kind: hidden_dynamic_lds_size
.group_segment_fixed_size: 0
.kernarg_segment_align: 8
.kernarg_segment_size: 272
.language: OpenCL C
.language_version:
- 2
- 0
.max_flat_workgroup_size: 1024
.name: _Z9addKernelPiS_
.private_segment_fixed_size: 0
.sgpr_count: 18
.sgpr_spill_count: 0
.symbol: _Z9addKernelPiS_.kd
.uniform_work_group_size: 1
.uses_dynamic_stack: false
.vgpr_count: 4
.vgpr_spill_count: 0
.wavefront_size: 32
.workgroup_processor_mode: 1
amdhsa.target: amdgcn-amd-amdhsa--gfx1100
amdhsa.version:
- 1
- 2
...
.end_amdgpu_metadata |
You are a helpful coding assistant specialized in converting from CUDA host assembly to AMD host assembly. | .file "tmpxft_0006f8de_00000000-6_addNumbersCuda.cudafe1.cpp"
.text
#APP
#NO_APP
.type _ZL26__cudaUnregisterBinaryUtilv, @function
_ZL26__cudaUnregisterBinaryUtilv:
.LFB2062:
.cfi_startproc
endbr64
subq $8, %rsp
.cfi_def_cfa_offset 16
movq _ZL20__cudaFatCubinHandle(%rip), %rdi
call __cudaUnregisterFatBinary@PLT
addq $8, %rsp
.cfi_def_cfa_offset 8
ret
.cfi_endproc
.LFE2062:
.size _ZL26__cudaUnregisterBinaryUtilv, .-_ZL26__cudaUnregisterBinaryUtilv
.globl _Z11createArrayiiPi
.type _Z11createArrayiiPi, @function
_Z11createArrayiiPi:
.LFB2058:
.cfi_startproc
endbr64
movq %rdx, %rax
testl %edi, %edi
jle .L4
movq %rdx, %rcx
movslq %edi, %rdx
leaq (%rax,%rdx,4), %r8
.L5:
movl $1, (%rcx)
addq $4, %rcx
cmpq %r8, %rcx
jne .L5
.L4:
cmpl %esi, %edi
jge .L6
movslq %edi, %rdx
leaq (%rax,%rdx,4), %rcx
subl %edi, %esi
addq %rdx, %rsi
leaq (%rax,%rsi,4), %rsi
.L7:
movl $0, (%rcx)
addq $4, %rcx
cmpq %rsi, %rcx
jne .L7
.L6:
ret
.cfi_endproc
.LFE2058:
.size _Z11createArrayiiPi, .-_Z11createArrayiiPi
.globl _Z30__device_stub__Z9addKernelPiS_PiS_
.type _Z30__device_stub__Z9addKernelPiS_PiS_, @function
_Z30__device_stub__Z9addKernelPiS_PiS_:
.LFB2084:
.cfi_startproc
endbr64
subq $120, %rsp
.cfi_def_cfa_offset 128
movq %rdi, 8(%rsp)
movq %rsi, (%rsp)
movq %fs:40, %rax
movq %rax, 104(%rsp)
xorl %eax, %eax
leaq 8(%rsp), %rax
movq %rax, 80(%rsp)
movq %rsp, %rax
movq %rax, 88(%rsp)
movl $1, 32(%rsp)
movl $1, 36(%rsp)
movl $1, 40(%rsp)
movl $1, 44(%rsp)
movl $1, 48(%rsp)
movl $1, 52(%rsp)
leaq 24(%rsp), %rcx
leaq 16(%rsp), %rdx
leaq 44(%rsp), %rsi
leaq 32(%rsp), %rdi
call __cudaPopCallConfiguration@PLT
testl %eax, %eax
je .L14
.L10:
movq 104(%rsp), %rax
subq %fs:40, %rax
jne .L15
addq $120, %rsp
.cfi_remember_state
.cfi_def_cfa_offset 8
ret
.L14:
.cfi_restore_state
pushq 24(%rsp)
.cfi_def_cfa_offset 136
pushq 24(%rsp)
.cfi_def_cfa_offset 144
leaq 96(%rsp), %r9
movq 60(%rsp), %rcx
movl 68(%rsp), %r8d
movq 48(%rsp), %rsi
movl 56(%rsp), %edx
leaq _Z9addKernelPiS_(%rip), %rdi
call cudaLaunchKernel@PLT
addq $16, %rsp
.cfi_def_cfa_offset 128
jmp .L10
.L15:
call __stack_chk_fail@PLT
.cfi_endproc
.LFE2084:
.size _Z30__device_stub__Z9addKernelPiS_PiS_, .-_Z30__device_stub__Z9addKernelPiS_PiS_
.globl _Z9addKernelPiS_
.type _Z9addKernelPiS_, @function
_Z9addKernelPiS_:
.LFB2085:
.cfi_startproc
endbr64
subq $8, %rsp
.cfi_def_cfa_offset 16
call _Z30__device_stub__Z9addKernelPiS_PiS_
addq $8, %rsp
.cfi_def_cfa_offset 8
ret
.cfi_endproc
.LFE2085:
.size _Z9addKernelPiS_, .-_Z9addKernelPiS_
.section .rodata.str1.8,"aMS",@progbits,1
.align 8
.LC0:
.string "cudaSetDevice failed! Do you have a CUDA-capable GPU installed?"
.section .rodata.str1.1,"aMS",@progbits,1
.LC1:
.string "c cudaMalloc failed!"
.LC2:
.string "a cudaMalloc failed!"
.LC3:
.string "cudaMemcpy failed!"
.LC4:
.string "addKernel launch failed: %s\n"
.section .rodata.str1.8
.align 8
.LC5:
.string "cudaDeviceSynchronize returned error code %d after launching addKernel!\n"
.text
.globl _Z11addWithCudaPiS_jiii
.type _Z11addWithCudaPiS_jiii, @function
_Z11addWithCudaPiS_jiii:
.LFB2059:
.cfi_startproc
endbr64
pushq %r15
.cfi_def_cfa_offset 16
.cfi_offset 15, -16
pushq %r14
.cfi_def_cfa_offset 24
.cfi_offset 14, -24
pushq %r13
.cfi_def_cfa_offset 32
.cfi_offset 13, -32
pushq %r12
.cfi_def_cfa_offset 40
.cfi_offset 12, -40
pushq %rbp
.cfi_def_cfa_offset 48
.cfi_offset 6, -48
pushq %rbx
.cfi_def_cfa_offset 56
.cfi_offset 3, -56
subq $56, %rsp
.cfi_def_cfa_offset 112
movq %rsi, %r13
movl %edx, %ebp
movl %ecx, %r15d
movl %r8d, %r14d
movl %r9d, %r12d
movq %fs:40, %rax
movq %rax, 40(%rsp)
xorl %eax, %eax
movq $0, (%rsp)
movq $0, 8(%rsp)
movl $0, %edi
call cudaSetDevice@PLT
testl %eax, %eax
jne .L29
movl %ebp, %ebp
salq $2, %rbp
leaq 8(%rsp), %rdi
movq %rbp, %rsi
call cudaMalloc@PLT
movl %eax, %ebx
testl %eax, %eax
jne .L30
movq %rsp, %rdi
movq %rbp, %rsi
call cudaMalloc@PLT
movl %eax, %ebx
testl %eax, %eax
jne .L31
movl $1, %ecx
movq %rbp, %rdx
movq %r13, %rsi
movq (%rsp), %rdi
call cudaMemcpy@PLT
movl %eax, %ebx
testl %eax, %eax
jne .L32
movl %r12d, 28(%rsp)
movl $1, 32(%rsp)
movl %r15d, 16(%rsp)
movl %r14d, 20(%rsp)
movslq %r12d, %r12
movl $0, %r9d
leaq 0(,%r12,4), %r8
movq 28(%rsp), %rdx
movl $1, %ecx
movq 16(%rsp), %rdi
movl $1, %esi
call __cudaPushCallConfiguration@PLT
testl %eax, %eax
je .L33
.L24:
call cudaGetLastError@PLT
movl %eax, %ebx
testl %eax, %eax
jne .L34
call cudaDeviceSynchronize@PLT
movl %eax, %ebx
testl %eax, %eax
jne .L35
movl $2, %ecx
movq %rbp, %rdx
movq 8(%rsp), %rsi
movq %r13, %rdi
call cudaMemcpy@PLT
movl %eax, %ebx
testl %eax, %eax
je .L20
leaq .LC3(%rip), %rdx
movl $2, %esi
movq stderr(%rip), %rdi
movl $0, %eax
call __fprintf_chk@PLT
jmp .L20
.L29:
movl %eax, %ebx
leaq .LC0(%rip), %rdx
movl $2, %esi
movq stderr(%rip), %rdi
movl $0, %eax
call __fprintf_chk@PLT
.L20:
movq 8(%rsp), %rdi
call cudaFree@PLT
movq (%rsp), %rdi
call cudaFree@PLT
movq 40(%rsp), %rax
subq %fs:40, %rax
jne .L36
movl %ebx, %eax
addq $56, %rsp
.cfi_remember_state
.cfi_def_cfa_offset 56
popq %rbx
.cfi_def_cfa_offset 48
popq %rbp
.cfi_def_cfa_offset 40
popq %r12
.cfi_def_cfa_offset 32
popq %r13
.cfi_def_cfa_offset 24
popq %r14
.cfi_def_cfa_offset 16
popq %r15
.cfi_def_cfa_offset 8
ret
.L30:
.cfi_restore_state
leaq .LC1(%rip), %rdx
movl $2, %esi
movq stderr(%rip), %rdi
movl $0, %eax
call __fprintf_chk@PLT
jmp .L20
.L31:
leaq .LC2(%rip), %rdx
movl $2, %esi
movq stderr(%rip), %rdi
movl $0, %eax
call __fprintf_chk@PLT
jmp .L20
.L32:
leaq .LC3(%rip), %rdx
movl $2, %esi
movq stderr(%rip), %rdi
movl $0, %eax
call __fprintf_chk@PLT
jmp .L20
.L33:
movq (%rsp), %rsi
movq 8(%rsp), %rdi
call _Z30__device_stub__Z9addKernelPiS_PiS_
jmp .L24
.L34:
movl %eax, %edi
call cudaGetErrorString@PLT
movq %rax, %rcx
leaq .LC4(%rip), %rdx
movl $2, %esi
movq stderr(%rip), %rdi
movl $0, %eax
call __fprintf_chk@PLT
jmp .L20
.L35:
movl %eax, %ecx
leaq .LC5(%rip), %rdx
movl $2, %esi
movq stderr(%rip), %rdi
movl $0, %eax
call __fprintf_chk@PLT
jmp .L20
.L36:
call __stack_chk_fail@PLT
.cfi_endproc
.LFE2059:
.size _Z11addWithCudaPiS_jiii, .-_Z11addWithCudaPiS_jiii
.section .rodata.str1.1
.LC6:
.string "addWithCuda failed!"
.LC7:
.string "{%d}\n"
.LC8:
.string "cudaDeviceReset failed!"
.text
.globl main
.type main, @function
main:
.LFB2057:
.cfi_startproc
endbr64
pushq %r14
.cfi_def_cfa_offset 16
.cfi_offset 14, -16
pushq %r13
.cfi_def_cfa_offset 24
.cfi_offset 13, -24
pushq %r12
.cfi_def_cfa_offset 32
.cfi_offset 12, -32
pushq %rbp
.cfi_def_cfa_offset 40
.cfi_offset 6, -40
pushq %rbx
.cfi_def_cfa_offset 48
.cfi_offset 3, -48
movl $536870912, %edi
call _Znam@PLT
movq %rax, %rbp
movl $536870912, %edi
call _Znam@PLT
movq %rax, %r14
movl $536870912, %edi
call _Znam@PLT
movq %rax, %r12
movq %r14, %rbx
leaq 4194304(%r14), %r13
.L39:
movq %rbp, %rdx
movl $134217728, %esi
movl $125000000, %edi
call _Z11createArrayiiPi
movl $1024, %r9d
movl $4, %r8d
movl $32768, %ecx
movl $134217728, %edx
movq %rbp, %rsi
movq %r12, %rdi
call _Z11addWithCudaPiS_jiii
movl $0, %eax
.L38:
movl 0(%rbp,%rax), %edx
movl %edx, (%rbx,%rax)
addq $4, %rax
cmpq $524288, %rax
jne .L38
addq $524288, %rbx
cmpq %r13, %rbx
jne .L39
movl $1024, %r9d
movl $1, %r8d
movl $1024, %ecx
movl $134217728, %edx
movq %r14, %rsi
movq %r12, %rdi
call _Z11addWithCudaPiS_jiii
movl %eax, %ebx
movl $1024, %r9d
movl $1, %r8d
movl $1, %ecx
movl $134217728, %edx
movq %r14, %rsi
movq %r12, %rdi
call _Z11addWithCudaPiS_jiii
testl %ebx, %ebx
jne .L46
movl (%r14), %edx
leaq .LC7(%rip), %rsi
movl $2, %edi
movl $0, %eax
call __printf_chk@PLT
call cudaDeviceReset@PLT
movl %eax, %edx
movl $0, %eax
testl %edx, %edx
jne .L47
.L37:
popq %rbx
.cfi_remember_state
.cfi_def_cfa_offset 40
popq %rbp
.cfi_def_cfa_offset 32
popq %r12
.cfi_def_cfa_offset 24
popq %r13
.cfi_def_cfa_offset 16
popq %r14
.cfi_def_cfa_offset 8
ret
.L46:
.cfi_restore_state
leaq .LC6(%rip), %rdx
movl $2, %esi
movq stderr(%rip), %rdi
movl $0, %eax
call __fprintf_chk@PLT
movl $1, %eax
jmp .L37
.L47:
leaq .LC8(%rip), %rdx
movl $2, %esi
movq stderr(%rip), %rdi
call __fprintf_chk@PLT
movl $1, %eax
jmp .L37
.cfi_endproc
.LFE2057:
.size main, .-main
.section .rodata.str1.1
.LC9:
.string "_Z9addKernelPiS_"
.text
.type _ZL24__sti____cudaRegisterAllv, @function
_ZL24__sti____cudaRegisterAllv:
.LFB2087:
.cfi_startproc
endbr64
subq $8, %rsp
.cfi_def_cfa_offset 16
leaq _ZL15__fatDeviceText(%rip), %rdi
call __cudaRegisterFatBinary@PLT
movq %rax, %rdi
movq %rax, _ZL20__cudaFatCubinHandle(%rip)
pushq $0
.cfi_def_cfa_offset 24
pushq $0
.cfi_def_cfa_offset 32
pushq $0
.cfi_def_cfa_offset 40
pushq $0
.cfi_def_cfa_offset 48
movl $0, %r9d
movl $-1, %r8d
leaq .LC9(%rip), %rdx
movq %rdx, %rcx
leaq _Z9addKernelPiS_(%rip), %rsi
call __cudaRegisterFunction@PLT
addq $32, %rsp
.cfi_def_cfa_offset 16
movq _ZL20__cudaFatCubinHandle(%rip), %rdi
call __cudaRegisterFatBinaryEnd@PLT
leaq _ZL26__cudaUnregisterBinaryUtilv(%rip), %rdi
call atexit@PLT
addq $8, %rsp
.cfi_def_cfa_offset 8
ret
.cfi_endproc
.LFE2087:
.size _ZL24__sti____cudaRegisterAllv, .-_ZL24__sti____cudaRegisterAllv
.section .init_array,"aw"
.align 8
.quad _ZL24__sti____cudaRegisterAllv
.section .nvFatBinSegment,"aw"
.align 8
.type _ZL15__fatDeviceText, @object
.size _ZL15__fatDeviceText, 24
_ZL15__fatDeviceText:
.long 1180844977
.long 1
.quad fatbinData
.quad 0
.local _ZL20__cudaFatCubinHandle
.comm _ZL20__cudaFatCubinHandle,8,8
.ident "GCC: (Ubuntu 13.3.0-6ubuntu2~24.04) 13.3.0"
.section .note.GNU-stack,"",@progbits
.section .note.gnu.property,"a"
.align 8
.long 1f - 0f
.long 4f - 1f
.long 5
0:
.string "GNU"
1:
.align 8
.long 0xc0000002
.long 3f - 2f
2:
.long 0x3
3:
.align 8
4: | .text
.file "addNumbersCuda.hip"
.globl _Z24__device_stub__addKernelPiS_ # -- Begin function _Z24__device_stub__addKernelPiS_
.p2align 4, 0x90
.type _Z24__device_stub__addKernelPiS_,@function
_Z24__device_stub__addKernelPiS_: # @_Z24__device_stub__addKernelPiS_
.cfi_startproc
# %bb.0:
subq $88, %rsp
.cfi_def_cfa_offset 96
movq %rdi, 56(%rsp)
movq %rsi, 48(%rsp)
leaq 56(%rsp), %rax
movq %rax, 64(%rsp)
leaq 48(%rsp), %rax
movq %rax, 72(%rsp)
leaq 32(%rsp), %rdi
leaq 16(%rsp), %rsi
leaq 8(%rsp), %rdx
movq %rsp, %rcx
callq __hipPopCallConfiguration
movq 32(%rsp), %rsi
movl 40(%rsp), %edx
movq 16(%rsp), %rcx
movl 24(%rsp), %r8d
leaq 64(%rsp), %r9
movl $_Z9addKernelPiS_, %edi
pushq (%rsp)
.cfi_adjust_cfa_offset 8
pushq 16(%rsp)
.cfi_adjust_cfa_offset 8
callq hipLaunchKernel
addq $104, %rsp
.cfi_adjust_cfa_offset -104
retq
.Lfunc_end0:
.size _Z24__device_stub__addKernelPiS_, .Lfunc_end0-_Z24__device_stub__addKernelPiS_
.cfi_endproc
# -- End function
.globl main # -- Begin function main
.p2align 4, 0x90
.type main,@function
main: # @main
.cfi_startproc
# %bb.0:
pushq %rbp
.cfi_def_cfa_offset 16
pushq %r15
.cfi_def_cfa_offset 24
pushq %r14
.cfi_def_cfa_offset 32
pushq %r13
.cfi_def_cfa_offset 40
pushq %r12
.cfi_def_cfa_offset 48
pushq %rbx
.cfi_def_cfa_offset 56
pushq %rax
.cfi_def_cfa_offset 64
.cfi_offset %rbx, -56
.cfi_offset %r12, -48
.cfi_offset %r13, -40
.cfi_offset %r14, -32
.cfi_offset %r15, -24
.cfi_offset %rbp, -16
movl $536870912, %edi # imm = 0x20000000
callq _Znam
movq %rax, %r14
movl $536870912, %edi # imm = 0x20000000
callq _Znam
movq %rax, %rbx
movq %r14, %r15
addq $500000000, %r15 # imm = 0x1DCD6500
xorl %r13d, %r13d
.p2align 4, 0x90
.LBB1_1: # %.lr.ph.i.preheader
# =>This Loop Header: Depth=1
# Child Loop BB1_2 Depth 2
movq %r13, %r12
shlq $19, %r12
addq %rbx, %r12
xorl %eax, %eax
.p2align 4, 0x90
.LBB1_2: # %.lr.ph.i
# Parent Loop BB1_1 Depth=1
# => This Inner Loop Header: Depth=2
movl $1, (%r14,%rax,4)
incq %rax
cmpq $125000000, %rax # imm = 0x7735940
jne .LBB1_2
# %bb.3: # %_Z11createArrayiiPi.exit
# in Loop: Header=BB1_1 Depth=1
movl $36870912, %edx # imm = 0x2329B00
movq %r15, %rdi
xorl %esi, %esi
callq memset@PLT
movq %r14, %rsi
movl $134217728, %edx # imm = 0x8000000
movl $32768, %ecx # imm = 0x8000
movl $4, %r8d
movl $1024, %r9d # imm = 0x400
callq _Z11addWithCudaPiS_jiii
movl $524288, %edx # imm = 0x80000
movq %r12, %rdi
movq %r14, %rsi
callq memcpy@PLT
incq %r13
cmpq $8, %r13
jne .LBB1_1
# %bb.4:
movq %rbx, %rsi
movl $134217728, %edx # imm = 0x8000000
movl $1024, %ecx # imm = 0x400
movl $1, %r8d
movl $1024, %r9d # imm = 0x400
callq _Z11addWithCudaPiS_jiii
movl %eax, %ebp
movq %rbx, %rsi
movl $134217728, %edx # imm = 0x8000000
movl $1, %ecx
movl $1, %r8d
movl $1024, %r9d # imm = 0x400
callq _Z11addWithCudaPiS_jiii
testl %ebp, %ebp
jne .LBB1_5
# %bb.6:
movl (%rbx), %esi
xorl %ebx, %ebx
movl $.L.str.1, %edi
xorl %eax, %eax
callq printf
callq hipDeviceReset
testl %eax, %eax
jne .LBB1_7
.LBB1_9:
movl %ebx, %eax
addq $8, %rsp
.cfi_def_cfa_offset 56
popq %rbx
.cfi_def_cfa_offset 48
popq %r12
.cfi_def_cfa_offset 40
popq %r13
.cfi_def_cfa_offset 32
popq %r14
.cfi_def_cfa_offset 24
popq %r15
.cfi_def_cfa_offset 16
popq %rbp
.cfi_def_cfa_offset 8
retq
.LBB1_5:
.cfi_def_cfa_offset 64
movq stderr(%rip), %rcx
movl $.L.str, %edi
movl $19, %esi
jmp .LBB1_8
.LBB1_7:
movq stderr(%rip), %rcx
movl $.L.str.2, %edi
movl $22, %esi
.LBB1_8:
movl $1, %edx
callq fwrite@PLT
movl $1, %ebx
jmp .LBB1_9
.Lfunc_end1:
.size main, .Lfunc_end1-main
.cfi_endproc
# -- End function
.globl _Z11createArrayiiPi # -- Begin function _Z11createArrayiiPi
.p2align 4, 0x90
.type _Z11createArrayiiPi,@function
_Z11createArrayiiPi: # @_Z11createArrayiiPi
.cfi_startproc
# %bb.0:
pushq %rbx
.cfi_def_cfa_offset 16
.cfi_offset %rbx, -16
movq %rdx, %rbx
# kill: def $edi killed $edi def $rdi
testl %edi, %edi
jle .LBB2_3
# %bb.1: # %.lr.ph.preheader
movl %edi, %eax
xorl %ecx, %ecx
.p2align 4, 0x90
.LBB2_2: # %.lr.ph
# =>This Inner Loop Header: Depth=1
movl $1, (%rbx,%rcx,4)
incq %rcx
cmpq %rcx, %rax
jne .LBB2_2
.LBB2_3: # %.preheader
cmpl %esi, %edi
jge .LBB2_5
# %bb.4: # %.lr.ph15.preheader
movslq %edi, %rax
leaq (%rbx,%rax,4), %rax
notl %edi
addl %esi, %edi
leaq 4(,%rdi,4), %rdx
movq %rax, %rdi
xorl %esi, %esi
callq memset@PLT
.LBB2_5: # %._crit_edge
movq %rbx, %rax
popq %rbx
.cfi_def_cfa_offset 8
retq
.Lfunc_end2:
.size _Z11createArrayiiPi, .Lfunc_end2-_Z11createArrayiiPi
.cfi_endproc
# -- End function
.globl _Z11addWithCudaPiS_jiii # -- Begin function _Z11addWithCudaPiS_jiii
.p2align 4, 0x90
.type _Z11addWithCudaPiS_jiii,@function
_Z11addWithCudaPiS_jiii: # @_Z11addWithCudaPiS_jiii
.cfi_startproc
# %bb.0:
pushq %rbp
.cfi_def_cfa_offset 16
pushq %r15
.cfi_def_cfa_offset 24
pushq %r14
.cfi_def_cfa_offset 32
pushq %r12
.cfi_def_cfa_offset 40
pushq %rbx
.cfi_def_cfa_offset 48
subq $96, %rsp
.cfi_def_cfa_offset 144
.cfi_offset %rbx, -48
.cfi_offset %r12, -40
.cfi_offset %r14, -32
.cfi_offset %r15, -24
.cfi_offset %rbp, -16
movl %r9d, %r12d
movl %r8d, %r15d
movl %ecx, %ebp
movl %edx, %r14d
movq %rsi, %rbx
movq $0, 8(%rsp)
movq $0, (%rsp)
xorl %edi, %edi
callq hipSetDevice
testl %eax, %eax
jne .LBB3_10
# %bb.1:
movl %r14d, %r14d
shlq $2, %r14
movq %rsp, %rdi
movq %r14, %rsi
callq hipMalloc
testl %eax, %eax
jne .LBB3_11
# %bb.2:
leaq 8(%rsp), %rdi
movq %r14, %rsi
callq hipMalloc
testl %eax, %eax
jne .LBB3_12
# %bb.3:
movq 8(%rsp), %rdi
movq %rbx, %rsi
movq %r14, %rdx
movl $1, %ecx
callq hipMemcpy
testl %eax, %eax
jne .LBB3_14
# %bb.4:
movslq %r12d, %rax
leaq (,%rax,4), %r8
shlq $32, %r15
movl %ebp, %edi
orq %r15, %rdi
movl %eax, %eax
movabsq $4294967296, %rdx # imm = 0x100000000
orq %rax, %rdx
movl $1, %esi
movl $1, %ecx
xorl %r9d, %r9d
callq __hipPushCallConfiguration
testl %eax, %eax
jne .LBB3_6
# %bb.5:
movq (%rsp), %rax
movq 8(%rsp), %rcx
movq %rax, 72(%rsp)
movq %rcx, 64(%rsp)
leaq 72(%rsp), %rax
movq %rax, 80(%rsp)
leaq 64(%rsp), %rax
movq %rax, 88(%rsp)
leaq 48(%rsp), %rdi
leaq 32(%rsp), %rsi
leaq 24(%rsp), %rdx
leaq 16(%rsp), %rcx
callq __hipPopCallConfiguration
movq 48(%rsp), %rsi
movl 56(%rsp), %edx
movq 32(%rsp), %rcx
movl 40(%rsp), %r8d
leaq 80(%rsp), %r9
movl $_Z9addKernelPiS_, %edi
pushq 16(%rsp)
.cfi_adjust_cfa_offset 8
pushq 32(%rsp)
.cfi_adjust_cfa_offset 8
callq hipLaunchKernel
addq $16, %rsp
.cfi_adjust_cfa_offset -16
.LBB3_6:
callq hipGetLastError
testl %eax, %eax
jne .LBB3_18
# %bb.7:
callq hipDeviceSynchronize
testl %eax, %eax
jne .LBB3_19
# %bb.8:
movq (%rsp), %rsi
movq %rbx, %rdi
movq %r14, %rdx
movl $2, %ecx
callq hipMemcpy
xorl %ebx, %ebx
testl %eax, %eax
je .LBB3_17
# %bb.9:
movq stderr(%rip), %rcx
movl $.L.str.6, %edi
movl $17, %esi
movl $1, %edx
movl %eax, %ebx
jmp .LBB3_16
.LBB3_10:
movl %eax, %ebx
movq stderr(%rip), %rcx
movl $.L.str.3, %edi
movl $63, %esi
jmp .LBB3_15
.LBB3_11:
movl %eax, %ebx
movq stderr(%rip), %rcx
movl $.L.str.4, %edi
jmp .LBB3_13
.LBB3_12:
movl %eax, %ebx
movq stderr(%rip), %rcx
movl $.L.str.5, %edi
.LBB3_13:
movl $19, %esi
jmp .LBB3_15
.LBB3_14:
movl %eax, %ebx
movq stderr(%rip), %rcx
movl $.L.str.6, %edi
movl $17, %esi
.LBB3_15:
movl $1, %edx
.LBB3_16:
callq fwrite@PLT
.LBB3_17:
movq (%rsp), %rdi
callq hipFree
movq 8(%rsp), %rdi
callq hipFree
movl %ebx, %eax
addq $96, %rsp
.cfi_def_cfa_offset 48
popq %rbx
.cfi_def_cfa_offset 40
popq %r12
.cfi_def_cfa_offset 32
popq %r14
.cfi_def_cfa_offset 24
popq %r15
.cfi_def_cfa_offset 16
popq %rbp
.cfi_def_cfa_offset 8
retq
.LBB3_18:
.cfi_def_cfa_offset 144
movq stderr(%rip), %r14
movl %eax, %ebx
movl %eax, %edi
callq hipGetErrorString
movl $.L.str.7, %esi
movq %r14, %rdi
movq %rax, %rdx
xorl %eax, %eax
callq fprintf
jmp .LBB3_17
.LBB3_19:
movq stderr(%rip), %rdi
movl $.L.str.8, %esi
movl %eax, %ebx
movl %eax, %edx
xorl %eax, %eax
callq fprintf
jmp .LBB3_17
.Lfunc_end3:
.size _Z11addWithCudaPiS_jiii, .Lfunc_end3-_Z11addWithCudaPiS_jiii
.cfi_endproc
# -- End function
.p2align 4, 0x90 # -- Begin function __hip_module_ctor
.type __hip_module_ctor,@function
__hip_module_ctor: # @__hip_module_ctor
.cfi_startproc
# %bb.0:
subq $40, %rsp
.cfi_def_cfa_offset 48
cmpq $0, __hip_gpubin_handle(%rip)
jne .LBB4_2
# %bb.1:
movl $__hip_fatbin_wrapper, %edi
callq __hipRegisterFatBinary
movq %rax, __hip_gpubin_handle(%rip)
.LBB4_2:
movq __hip_gpubin_handle(%rip), %rdi
xorps %xmm0, %xmm0
movups %xmm0, 16(%rsp)
movups %xmm0, (%rsp)
movl $_Z9addKernelPiS_, %esi
movl $.L__unnamed_1, %edx
movl $.L__unnamed_1, %ecx
movl $-1, %r8d
xorl %r9d, %r9d
callq __hipRegisterFunction
movl $__hip_module_dtor, %edi
addq $40, %rsp
.cfi_def_cfa_offset 8
jmp atexit # TAILCALL
.Lfunc_end4:
.size __hip_module_ctor, .Lfunc_end4-__hip_module_ctor
.cfi_endproc
# -- End function
.p2align 4, 0x90 # -- Begin function __hip_module_dtor
.type __hip_module_dtor,@function
__hip_module_dtor: # @__hip_module_dtor
.cfi_startproc
# %bb.0:
movq __hip_gpubin_handle(%rip), %rdi
testq %rdi, %rdi
je .LBB5_2
# %bb.1:
pushq %rax
.cfi_def_cfa_offset 16
callq __hipUnregisterFatBinary
movq $0, __hip_gpubin_handle(%rip)
addq $8, %rsp
.cfi_def_cfa_offset 8
.LBB5_2:
retq
.Lfunc_end5:
.size __hip_module_dtor, .Lfunc_end5-__hip_module_dtor
.cfi_endproc
# -- End function
.type _Z9addKernelPiS_,@object # @_Z9addKernelPiS_
.section .rodata,"a",@progbits
.globl _Z9addKernelPiS_
.p2align 3, 0x0
_Z9addKernelPiS_:
.quad _Z24__device_stub__addKernelPiS_
.size _Z9addKernelPiS_, 8
.type .L.str,@object # @.str
.section .rodata.str1.1,"aMS",@progbits,1
.L.str:
.asciz "addWithCuda failed!"
.size .L.str, 20
.type .L.str.1,@object # @.str.1
.L.str.1:
.asciz "{%d}\n"
.size .L.str.1, 6
.type .L.str.2,@object # @.str.2
.L.str.2:
.asciz "hipDeviceReset failed!"
.size .L.str.2, 23
.type .L.str.3,@object # @.str.3
.L.str.3:
.asciz "hipSetDevice failed! Do you have a CUDA-capable GPU installed?"
.size .L.str.3, 64
.type .L.str.4,@object # @.str.4
.L.str.4:
.asciz "c hipMalloc failed!"
.size .L.str.4, 20
.type .L.str.5,@object # @.str.5
.L.str.5:
.asciz "a hipMalloc failed!"
.size .L.str.5, 20
.type .L.str.6,@object # @.str.6
.L.str.6:
.asciz "hipMemcpy failed!"
.size .L.str.6, 18
.type .L.str.7,@object # @.str.7
.L.str.7:
.asciz "addKernel launch failed: %s\n"
.size .L.str.7, 29
.type .L.str.8,@object # @.str.8
.L.str.8:
.asciz "hipDeviceSynchronize returned error code %d after launching addKernel!\n"
.size .L.str.8, 72
.type .L__unnamed_1,@object # @0
.L__unnamed_1:
.asciz "_Z9addKernelPiS_"
.size .L__unnamed_1, 17
.type __hip_fatbin_wrapper,@object # @__hip_fatbin_wrapper
.section .hipFatBinSegment,"a",@progbits
.p2align 3, 0x0
__hip_fatbin_wrapper:
.long 1212764230 # 0x48495046
.long 1 # 0x1
.quad __hip_fatbin
.quad 0
.size __hip_fatbin_wrapper, 24
.type __hip_gpubin_handle,@object # @__hip_gpubin_handle
.local __hip_gpubin_handle
.comm __hip_gpubin_handle,8,8
.section .init_array,"aw",@init_array
.p2align 3, 0x0
.quad __hip_module_ctor
.type __hip_cuid_,@object # @__hip_cuid_
.bss
.globl __hip_cuid_
__hip_cuid_:
.byte 0 # 0x0
.size __hip_cuid_, 1
.section ".linker-options","e",@llvm_linker_options
.ident "AMD clang version 18.0.0git (https://github.com/RadeonOpenCompute/llvm-project roc-6.3.2 25012 e5bf7e55c91490b07c49d8960fa7983d864936c4)"
.section ".note.GNU-stack","",@progbits
.addrsig
.addrsig_sym _Z24__device_stub__addKernelPiS_
.addrsig_sym __hip_module_ctor
.addrsig_sym __hip_module_dtor
.addrsig_sym _Z9addKernelPiS_
.addrsig_sym __hip_fatbin
.addrsig_sym __hip_fatbin_wrapper
.addrsig_sym __hip_cuid_ |
You are a helpful coding assistant specialized in converting CUDA source code to CUDA device assembly. | extern "C" {
__device__ inline int threadIdx_x() { return threadIdx.x; }
__device__ inline int threadIdx_y() { return threadIdx.y; }
__device__ inline int threadIdx_z() { return threadIdx.z; }
__device__ inline int blockIdx_x() { return blockIdx.x; }
__device__ inline int blockIdx_y() { return blockIdx.y; }
__device__ inline int blockIdx_z() { return blockIdx.z; }
__device__ inline int blockDim_x() { return blockDim.x; }
__device__ inline int blockDim_y() { return blockDim.y; }
__device__ inline int blockDim_z() { return blockDim.z; }
__device__ inline int gridDim_x() { return gridDim.x; }
__device__ inline int gridDim_y() { return gridDim.y; }
__device__ inline int gridDim_z() { return gridDim.z; }
__global__ void lambda_56187(float*, float*);
__global__ void lambda_55652(float*, float*);
__global__ __launch_bounds__ (128 * 1 * 1) void lambda_56187(float* _56190_61351, float* _56191_61352) {
int threadIdx_x_61358;
int pthreadIdx_x_61358;
int blockDim_x_61364;
int pblockDim_x_61364;
int blockIdx_x_61370;
int pblockIdx_x_61370;
int _61376;
int p_61376;
int _61382;
int p_61382;
int _61388;
int p_61388;
int _61391;
int p_61391;
int converge_61400;
int pconverge_61400;
int converge_61405;
int pconverge_61405;
int converge_61411;
int pconverge_61411;
int converge_61415;
int pconverge_61415;
float _61425;
float p_61425;
int converge_61431;
int pconverge_61431;
int converge_61435;
int pconverge_61435;
int converge_61438;
int pconverge_61438;
int converge_61442;
int pconverge_61442;
float _61448;
float p_61448;
int converge_61452;
int pconverge_61452;
int converge_61456;
int pconverge_61456;
int converge_61459;
int pconverge_61459;
int converge_61463;
int pconverge_61463;
float _61469;
float p_61469;
int converge_61475;
int pconverge_61475;
int converge_61479;
int pconverge_61479;
int converge_61482;
int pconverge_61482;
int converge_61486;
int pconverge_61486;
float _61492;
float p_61492;
int converge_61498;
int pconverge_61498;
int converge_61502;
int pconverge_61502;
int converge_61505;
int pconverge_61505;
int converge_61509;
int pconverge_61509;
float _61515;
float p_61515;
threadIdx_x_61358 = threadIdx_x();
pthreadIdx_x_61358 = threadIdx_x_61358;
l61356: ;
threadIdx_x_61358 = pthreadIdx_x_61358;
blockDim_x_61364 = blockDim_x();
pblockDim_x_61364 = blockDim_x_61364;
l61362: ;
blockDim_x_61364 = pblockDim_x_61364;
blockIdx_x_61370 = blockIdx_x();
pblockIdx_x_61370 = blockIdx_x_61370;
l61368: ;
blockIdx_x_61370 = pblockIdx_x_61370;
_61376 = threadIdx_y();
p_61376 = _61376;
l61374: ;
_61376 = p_61376;
_61382 = blockDim_y();
p_61382 = _61382;
l61380: ;
_61382 = p_61382;
_61388 = blockIdx_y();
p_61388 = _61388;
l61386: ;
_61388 = p_61388;
_61391 = blockDim_y();
p_61391 = _61391;
l61389: ;
_61391 = p_61391;
int _61393;
_61393 = blockDim_x_61364 * blockIdx_x_61370;
int _61394;
_61394 = threadIdx_x_61358 + _61393;
int _61395;
_61395 = -2 + _61394;
bool _61397;
_61397 = _61395 < 0;
if (_61397) goto l61398; else goto l61554;
l61554: ;
pconverge_61400 = _61395;
goto l61399;
l61398: ;
pconverge_61400 = 0;
goto l61399;
l61399: ;
converge_61400 = pconverge_61400;
bool _61402;
_61402 = 4096 <= converge_61400;
if (_61402) goto l61403; else goto l61553;
l61553: ;
pconverge_61405 = converge_61400;
goto l61404;
l61403: ;
pconverge_61405 = 4095;
goto l61404;
l61404: ;
converge_61405 = pconverge_61405;
int _61406;
_61406 = _61382 * _61388;
int gid_y_61407;
gid_y_61407 = _61376 + _61406;
bool _61408;
_61408 = gid_y_61407 < 0;
if (_61408) goto l61409; else goto l61552;
l61552: ;
pconverge_61411 = gid_y_61407;
goto l61410;
l61409: ;
pconverge_61411 = 0;
goto l61410;
l61410: ;
converge_61411 = pconverge_61411;
bool _61412;
_61412 = 4096 <= converge_61411;
if (_61412) goto l61413; else goto l61551;
l61551: ;
pconverge_61415 = converge_61411;
goto l61414;
l61413: ;
pconverge_61415 = 4095;
goto l61414;
l61414: ;
converge_61415 = pconverge_61415;
int _61420;
_61420 = 4096 * converge_61415;
int _61421;
_61421 = _61420 + converge_61405;
float* idx_61422;
idx_61422 = _56190_61351 + _61421;
_61425 = __ldg(idx_61422);
p_61425 = _61425;
l61423: ;
_61425 = p_61425;
int _61427;
_61427 = -1 + _61394;
bool _61428;
_61428 = _61427 < 0;
if (_61428) goto l61429; else goto l61550;
l61550: ;
pconverge_61431 = _61427;
goto l61430;
l61429: ;
pconverge_61431 = 0;
goto l61430;
l61430: ;
converge_61431 = pconverge_61431;
bool _61432;
_61432 = 4096 <= converge_61431;
if (_61432) goto l61433; else goto l61549;
l61549: ;
pconverge_61435 = converge_61431;
goto l61434;
l61433: ;
pconverge_61435 = 4095;
goto l61434;
l61434: ;
converge_61435 = pconverge_61435;
if (_61408) goto l61436; else goto l61548;
l61548: ;
pconverge_61438 = gid_y_61407;
goto l61437;
l61436: ;
pconverge_61438 = 0;
goto l61437;
l61437: ;
converge_61438 = pconverge_61438;
bool _61439;
_61439 = 4096 <= converge_61438;
if (_61439) goto l61440; else goto l61547;
l61547: ;
pconverge_61442 = converge_61438;
goto l61441;
l61440: ;
pconverge_61442 = 4095;
goto l61441;
l61441: ;
converge_61442 = pconverge_61442;
int _61443;
_61443 = 4096 * converge_61442;
int _61444;
_61444 = _61443 + converge_61435;
float* idx_61445;
idx_61445 = _56190_61351 + _61444;
_61448 = __ldg(idx_61445);
p_61448 = _61448;
l61446: ;
_61448 = p_61448;
bool _61449;
_61449 = _61394 < 0;
if (_61449) goto l61450; else goto l61546;
l61546: ;
pconverge_61452 = _61394;
goto l61451;
l61450: ;
pconverge_61452 = 0;
goto l61451;
l61451: ;
converge_61452 = pconverge_61452;
bool _61453;
_61453 = 4096 <= converge_61452;
if (_61453) goto l61454; else goto l61545;
l61545: ;
pconverge_61456 = converge_61452;
goto l61455;
l61454: ;
pconverge_61456 = 4095;
goto l61455;
l61455: ;
converge_61456 = pconverge_61456;
if (_61408) goto l61457; else goto l61544;
l61544: ;
pconverge_61459 = gid_y_61407;
goto l61458;
l61457: ;
pconverge_61459 = 0;
goto l61458;
l61458: ;
converge_61459 = pconverge_61459;
bool _61460;
_61460 = 4096 <= converge_61459;
if (_61460) goto l61461; else goto l61543;
l61543: ;
pconverge_61463 = converge_61459;
goto l61462;
l61461: ;
pconverge_61463 = 4095;
goto l61462;
l61462: ;
converge_61463 = pconverge_61463;
int _61464;
_61464 = 4096 * converge_61463;
int _61465;
_61465 = _61464 + converge_61456;
float* idx_61466;
idx_61466 = _56190_61351 + _61465;
_61469 = __ldg(idx_61466);
p_61469 = _61469;
l61467: ;
_61469 = p_61469;
int _61471;
_61471 = 1 + _61394;
bool _61472;
_61472 = _61471 < 0;
if (_61472) goto l61473; else goto l61542;
l61542: ;
pconverge_61475 = _61471;
goto l61474;
l61473: ;
pconverge_61475 = 0;
goto l61474;
l61474: ;
converge_61475 = pconverge_61475;
bool _61476;
_61476 = 4096 <= converge_61475;
if (_61476) goto l61477; else goto l61541;
l61541: ;
pconverge_61479 = converge_61475;
goto l61478;
l61477: ;
pconverge_61479 = 4095;
goto l61478;
l61478: ;
converge_61479 = pconverge_61479;
if (_61408) goto l61480; else goto l61540;
l61540: ;
pconverge_61482 = gid_y_61407;
goto l61481;
l61480: ;
pconverge_61482 = 0;
goto l61481;
l61481: ;
converge_61482 = pconverge_61482;
bool _61483;
_61483 = 4096 <= converge_61482;
if (_61483) goto l61484; else goto l61539;
l61539: ;
pconverge_61486 = converge_61482;
goto l61485;
l61484: ;
pconverge_61486 = 4095;
goto l61485;
l61485: ;
converge_61486 = pconverge_61486;
int _61487;
_61487 = 4096 * converge_61486;
int _61488;
_61488 = _61487 + converge_61479;
float* idx_61489;
idx_61489 = _56190_61351 + _61488;
_61492 = __ldg(idx_61489);
p_61492 = _61492;
l61490: ;
_61492 = p_61492;
int _61494;
_61494 = 2 + _61394;
bool _61495;
_61495 = _61494 < 0;
if (_61495) goto l61496; else goto l61538;
l61538: ;
pconverge_61498 = _61494;
goto l61497;
l61496: ;
pconverge_61498 = 0;
goto l61497;
l61497: ;
converge_61498 = pconverge_61498;
bool _61499;
_61499 = 4096 <= converge_61498;
if (_61499) goto l61500; else goto l61537;
l61537: ;
pconverge_61502 = converge_61498;
goto l61501;
l61500: ;
pconverge_61502 = 4095;
goto l61501;
l61501: ;
converge_61502 = pconverge_61502;
if (_61408) goto l61503; else goto l61536;
l61536: ;
pconverge_61505 = gid_y_61407;
goto l61504;
l61503: ;
pconverge_61505 = 0;
goto l61504;
l61504: ;
converge_61505 = pconverge_61505;
bool _61506;
_61506 = 4096 <= converge_61505;
if (_61506) goto l61507; else goto l61535;
l61535: ;
pconverge_61509 = converge_61505;
goto l61508;
l61507: ;
pconverge_61509 = 4095;
goto l61508;
l61508: ;
converge_61509 = pconverge_61509;
int _61510;
_61510 = 4096 * converge_61509;
int _61511;
_61511 = _61510 + converge_61502;
float* idx_61512;
idx_61512 = _56190_61351 + _61511;
_61515 = __ldg(idx_61512);
p_61515 = _61515;
l61513: ;
_61515 = p_61515;
int _61516;
_61516 = 4096 * gid_y_61407;
float _61524;
_61524 = 2.444600e-01f * _61448;
float _61521;
_61521 = 7.076600e-02f * _61425;
float _61531;
_61531 = 7.076600e-02f * _61515;
float _61529;
_61529 = 2.444600e-01f * _61492;
float _61522;
_61522 = 0.000000e+00f + _61521;
float _61525;
_61525 = _61522 + _61524;
float _61527;
_61527 = 3.695460e-01f * _61469;
int _61517;
_61517 = _61516 + _61394;
float _61528;
_61528 = _61525 + _61527;
float* idx_61518;
idx_61518 = _56191_61352 + _61517;
float _61530;
_61530 = _61528 + _61529;
float _61532;
_61532 = _61530 + _61531;
*idx_61518 = _61532;
return ;
}
__global__ __launch_bounds__ (32 * 4 * 1) void lambda_55652(float* _55655_61558, float* _55656_61559) {
int threadIdx_x_61562;
int pthreadIdx_x_61562;
int blockDim_x_61565;
int pblockDim_x_61565;
int blockIdx_x_61568;
int pblockIdx_x_61568;
int _61571;
int p_61571;
int _61574;
int p_61574;
int _61577;
int p_61577;
int _61580;
int p_61580;
int converge_61586;
int pconverge_61586;
int converge_61590;
int pconverge_61590;
int converge_61597;
int pconverge_61597;
int converge_61601;
int pconverge_61601;
float _61607;
float p_61607;
int converge_61610;
int pconverge_61610;
int converge_61614;
int pconverge_61614;
int converge_61619;
int pconverge_61619;
int converge_61623;
int pconverge_61623;
float _61629;
float p_61629;
int converge_61632;
int pconverge_61632;
int converge_61636;
int pconverge_61636;
int converge_61640;
int pconverge_61640;
int converge_61644;
int pconverge_61644;
float _61650;
float p_61650;
int converge_61653;
int pconverge_61653;
int converge_61657;
int pconverge_61657;
int converge_61662;
int pconverge_61662;
int converge_61666;
int pconverge_61666;
float _61672;
float p_61672;
int converge_61675;
int pconverge_61675;
int converge_61679;
int pconverge_61679;
int converge_61684;
int pconverge_61684;
int converge_61688;
int pconverge_61688;
float _61694;
float p_61694;
threadIdx_x_61562 = threadIdx_x();
pthreadIdx_x_61562 = threadIdx_x_61562;
l61560: ;
threadIdx_x_61562 = pthreadIdx_x_61562;
blockDim_x_61565 = blockDim_x();
pblockDim_x_61565 = blockDim_x_61565;
l61563: ;
blockDim_x_61565 = pblockDim_x_61565;
blockIdx_x_61568 = blockIdx_x();
pblockIdx_x_61568 = blockIdx_x_61568;
l61566: ;
blockIdx_x_61568 = pblockIdx_x_61568;
_61571 = threadIdx_y();
p_61571 = _61571;
l61569: ;
_61571 = p_61571;
_61574 = blockDim_y();
p_61574 = _61574;
l61572: ;
_61574 = p_61574;
_61577 = blockIdx_y();
p_61577 = _61577;
l61575: ;
_61577 = p_61577;
_61580 = blockDim_y();
p_61580 = _61580;
l61578: ;
_61580 = p_61580;
int _61581;
_61581 = blockDim_x_61565 * blockIdx_x_61568;
int _61582;
_61582 = threadIdx_x_61562 + _61581;
bool _61583;
_61583 = _61582 < 0;
if (_61583) goto l61584; else goto l61728;
l61728: ;
pconverge_61586 = _61582;
goto l61585;
l61584: ;
pconverge_61586 = 0;
goto l61585;
l61585: ;
converge_61586 = pconverge_61586;
bool _61587;
_61587 = 4096 <= converge_61586;
if (_61587) goto l61588; else goto l61727;
l61727: ;
pconverge_61590 = converge_61586;
goto l61589;
l61588: ;
pconverge_61590 = 4095;
goto l61589;
l61589: ;
converge_61590 = pconverge_61590;
int _61591;
_61591 = _61574 * _61577;
int gid_y_61592;
gid_y_61592 = _61571 + _61591;
int _61593;
_61593 = -2 + gid_y_61592;
bool _61594;
_61594 = _61593 < 0;
if (_61594) goto l61595; else goto l61726;
l61726: ;
pconverge_61597 = _61593;
goto l61596;
l61595: ;
pconverge_61597 = 0;
goto l61596;
l61596: ;
converge_61597 = pconverge_61597;
bool _61598;
_61598 = 4096 <= converge_61597;
if (_61598) goto l61599; else goto l61725;
l61725: ;
pconverge_61601 = converge_61597;
goto l61600;
l61599: ;
pconverge_61601 = 4095;
goto l61600;
l61600: ;
converge_61601 = pconverge_61601;
int _61602;
_61602 = 4096 * converge_61601;
int _61603;
_61603 = _61602 + converge_61590;
float* idx_61604;
idx_61604 = _55655_61558 + _61603;
_61607 = __ldg(idx_61604);
p_61607 = _61607;
l61605: ;
_61607 = p_61607;
if (_61583) goto l61608; else goto l61724;
l61724: ;
pconverge_61610 = _61582;
goto l61609;
l61608: ;
pconverge_61610 = 0;
goto l61609;
l61609: ;
converge_61610 = pconverge_61610;
bool _61611;
_61611 = 4096 <= converge_61610;
if (_61611) goto l61612; else goto l61723;
l61723: ;
pconverge_61614 = converge_61610;
goto l61613;
l61612: ;
pconverge_61614 = 4095;
goto l61613;
l61613: ;
converge_61614 = pconverge_61614;
int _61615;
_61615 = -1 + gid_y_61592;
bool _61616;
_61616 = _61615 < 0;
if (_61616) goto l61617; else goto l61722;
l61722: ;
pconverge_61619 = _61615;
goto l61618;
l61617: ;
pconverge_61619 = 0;
goto l61618;
l61618: ;
converge_61619 = pconverge_61619;
bool _61620;
_61620 = 4096 <= converge_61619;
if (_61620) goto l61621; else goto l61721;
l61721: ;
pconverge_61623 = converge_61619;
goto l61622;
l61621: ;
pconverge_61623 = 4095;
goto l61622;
l61622: ;
converge_61623 = pconverge_61623;
int _61624;
_61624 = 4096 * converge_61623;
int _61625;
_61625 = _61624 + converge_61614;
float* idx_61626;
idx_61626 = _55655_61558 + _61625;
_61629 = __ldg(idx_61626);
p_61629 = _61629;
l61627: ;
_61629 = p_61629;
if (_61583) goto l61630; else goto l61720;
l61720: ;
pconverge_61632 = _61582;
goto l61631;
l61630: ;
pconverge_61632 = 0;
goto l61631;
l61631: ;
converge_61632 = pconverge_61632;
bool _61633;
_61633 = 4096 <= converge_61632;
if (_61633) goto l61634; else goto l61719;
l61719: ;
pconverge_61636 = converge_61632;
goto l61635;
l61634: ;
pconverge_61636 = 4095;
goto l61635;
l61635: ;
converge_61636 = pconverge_61636;
bool _61637;
_61637 = gid_y_61592 < 0;
if (_61637) goto l61638; else goto l61718;
l61718: ;
pconverge_61640 = gid_y_61592;
goto l61639;
l61638: ;
pconverge_61640 = 0;
goto l61639;
l61639: ;
converge_61640 = pconverge_61640;
bool _61641;
_61641 = 4096 <= converge_61640;
if (_61641) goto l61642; else goto l61717;
l61717: ;
pconverge_61644 = converge_61640;
goto l61643;
l61642: ;
pconverge_61644 = 4095;
goto l61643;
l61643: ;
converge_61644 = pconverge_61644;
int _61645;
_61645 = 4096 * converge_61644;
int _61646;
_61646 = _61645 + converge_61636;
float* idx_61647;
idx_61647 = _55655_61558 + _61646;
_61650 = __ldg(idx_61647);
p_61650 = _61650;
l61648: ;
_61650 = p_61650;
if (_61583) goto l61651; else goto l61716;
l61716: ;
pconverge_61653 = _61582;
goto l61652;
l61651: ;
pconverge_61653 = 0;
goto l61652;
l61652: ;
converge_61653 = pconverge_61653;
bool _61654;
_61654 = 4096 <= converge_61653;
if (_61654) goto l61655; else goto l61715;
l61715: ;
pconverge_61657 = converge_61653;
goto l61656;
l61655: ;
pconverge_61657 = 4095;
goto l61656;
l61656: ;
converge_61657 = pconverge_61657;
int _61658;
_61658 = 1 + gid_y_61592;
bool _61659;
_61659 = _61658 < 0;
if (_61659) goto l61660; else goto l61714;
l61714: ;
pconverge_61662 = _61658;
goto l61661;
l61660: ;
pconverge_61662 = 0;
goto l61661;
l61661: ;
converge_61662 = pconverge_61662;
bool _61663;
_61663 = 4096 <= converge_61662;
if (_61663) goto l61664; else goto l61713;
l61713: ;
pconverge_61666 = converge_61662;
goto l61665;
l61664: ;
pconverge_61666 = 4095;
goto l61665;
l61665: ;
converge_61666 = pconverge_61666;
int _61667;
_61667 = 4096 * converge_61666;
int _61668;
_61668 = _61667 + converge_61657;
float* idx_61669;
idx_61669 = _55655_61558 + _61668;
_61672 = __ldg(idx_61669);
p_61672 = _61672;
l61670: ;
_61672 = p_61672;
if (_61583) goto l61673; else goto l61712;
l61712: ;
pconverge_61675 = _61582;
goto l61674;
l61673: ;
pconverge_61675 = 0;
goto l61674;
l61674: ;
converge_61675 = pconverge_61675;
bool _61676;
_61676 = 4096 <= converge_61675;
if (_61676) goto l61677; else goto l61711;
l61711: ;
pconverge_61679 = converge_61675;
goto l61678;
l61677: ;
pconverge_61679 = 4095;
goto l61678;
l61678: ;
converge_61679 = pconverge_61679;
int _61680;
_61680 = 2 + gid_y_61592;
bool _61681;
_61681 = _61680 < 0;
if (_61681) goto l61682; else goto l61710;
l61710: ;
pconverge_61684 = _61680;
goto l61683;
l61682: ;
pconverge_61684 = 0;
goto l61683;
l61683: ;
converge_61684 = pconverge_61684;
bool _61685;
_61685 = 4096 <= converge_61684;
if (_61685) goto l61686; else goto l61709;
l61709: ;
pconverge_61688 = converge_61684;
goto l61687;
l61686: ;
pconverge_61688 = 4095;
goto l61687;
l61687: ;
converge_61688 = pconverge_61688;
int _61689;
_61689 = 4096 * converge_61688;
int _61690;
_61690 = _61689 + converge_61679;
float* idx_61691;
idx_61691 = _55655_61558 + _61690;
_61694 = __ldg(idx_61691);
p_61694 = _61694;
l61692: ;
_61694 = p_61694;
float _61700;
_61700 = 2.444600e-01f * _61629;
float _61706;
_61706 = 7.076600e-02f * _61694;
int _61695;
_61695 = 4096 * gid_y_61592;
float _61704;
_61704 = 2.444600e-01f * _61672;
float _61702;
_61702 = 3.695460e-01f * _61650;
float _61698;
_61698 = 7.076600e-02f * _61607;
int _61696;
_61696 = _61695 + _61582;
float _61699;
_61699 = 0.000000e+00f + _61698;
float* idx_61697;
idx_61697 = _55656_61559 + _61696;
float _61701;
_61701 = _61699 + _61700;
float _61703;
_61703 = _61701 + _61702;
float _61705;
_61705 = _61703 + _61704;
float _61707;
_61707 = _61705 + _61706;
*idx_61697 = _61707;
return ;
}
} | code for sm_80
Function : lambda_55652
.headerflags @"EF_CUDA_TEXMODE_UNIFIED EF_CUDA_64BIT_ADDRESS EF_CUDA_SM80 EF_CUDA_VIRTUAL_SM(EF_CUDA_SM80)"
/*0000*/ IMAD.MOV.U32 R1, RZ, RZ, c[0x0][0x28] ; /* 0x00000a00ff017624 */
/* 0x000fe400078e00ff */
/*0010*/ S2R R3, SR_TID.Y ; /* 0x0000000000037919 */
/* 0x000e220000002200 */
/*0020*/ ULDC.64 UR4, c[0x0][0x118] ; /* 0x0000460000047ab9 */
/* 0x000fc60000000a00 */
/*0030*/ S2R R0, SR_CTAID.Y ; /* 0x0000000000007919 */
/* 0x000e280000002600 */
/*0040*/ S2R R2, SR_TID.X ; /* 0x0000000000027919 */
/* 0x000e680000002100 */
/*0050*/ S2R R5, SR_CTAID.X ; /* 0x0000000000057919 */
/* 0x000e620000002500 */
/*0060*/ IMAD R3, R0, c[0x0][0x4], R3 ; /* 0x0000010000037a24 */
/* 0x001fe400078e0203 */
/*0070*/ IMAD.MOV.U32 R0, RZ, RZ, 0x4 ; /* 0x00000004ff007424 */
/* 0x000fc600078e00ff */
/*0080*/ ISETP.GE.AND P0, PT, R3.reuse, 0x2, PT ; /* 0x000000020300780c */
/* 0x040fe40003f06270 */
/*0090*/ ISETP.GE.AND P1, PT, R3, 0x1, PT ; /* 0x000000010300780c */
/* 0x000fe20003f26270 */
/*00a0*/ IMAD R2, R5, c[0x0][0x0], R2 ; /* 0x0000000005027a24 */
/* 0x002fe200078e0202 */
/*00b0*/ IADD3 R5, R3.reuse, -0x2, RZ ; /* 0xfffffffe03057810 */
/* 0x040fe40007ffe0ff */
/*00c0*/ IADD3 R6, R3, -0x1, RZ ; /* 0xffffffff03067810 */
/* 0x000fe40007ffe0ff */
/*00d0*/ SEL R5, R5, RZ, P0 ; /* 0x000000ff05057207 */
/* 0x000fe40000000000 */
/*00e0*/ SEL R6, R6, RZ, P1 ; /* 0x000000ff06067207 */
/* 0x000fc40000800000 */
/*00f0*/ IMNMX R5, R5, 0xfff, PT ; /* 0x00000fff05057817 */
/* 0x000fe40003800200 */
/*0100*/ IMNMX R4, RZ, R2, !PT ; /* 0x00000002ff047217 */
/* 0x000fe40007800200 */
/*0110*/ IMNMX R7, RZ, R3, !PT ; /* 0x00000003ff077217 */
/* 0x000fe20007800200 */
/*0120*/ IMAD.SHL.U32 R5, R5, 0x1000, RZ ; /* 0x0000100005057824 */
/* 0x000fe200078e00ff */
/*0130*/ ISETP.GE.AND P2, PT, R3.reuse, -0x1, PT ; /* 0xffffffff0300780c */
/* 0x040fe40003f46270 */
/*0140*/ IADD3 R9, R3, 0x1, RZ ; /* 0x0000000103097810 */
/* 0x000fe40007ffe0ff */
/*0150*/ IMNMX R6, R6, 0xfff, PT ; /* 0x00000fff06067817 */
/* 0x000fc40003800200 */
/*0160*/ IMNMX R4, R4, 0xfff, PT ; /* 0x00000fff04047817 */
/* 0x000fe40003800200 */
/*0170*/ IMNMX R8, R7, 0xfff, PT ; /* 0x00000fff07087817 */
/* 0x000fe20003800200 */
/*0180*/ IMAD.SHL.U32 R7, R6, 0x1000, RZ ; /* 0x0000100006077824 */
/* 0x000fe200078e00ff */
/*0190*/ ISETP.GE.AND P3, PT, R3.reuse, -0x2, PT ; /* 0xfffffffe0300780c */
/* 0x040fe40003f66270 */
/*01a0*/ IADD3 R10, R3, 0x2, RZ ; /* 0x00000002030a7810 */
/* 0x000fe20007ffe0ff */
/*01b0*/ IMAD.SHL.U32 R11, R8, 0x1000, RZ ; /* 0x00001000080b7824 */
/* 0x000fe200078e00ff */
/*01c0*/ SEL R9, R9, RZ, P2 ; /* 0x000000ff09097207 */
/* 0x000fe40001000000 */
/*01d0*/ LOP3.LUT R5, R5, R4, RZ, 0xfc, !PT ; /* 0x0000000405057212 */
/* 0x000fc400078efcff */
/*01e0*/ SEL R10, R10, RZ, P3 ; /* 0x000000ff0a0a7207 */
/* 0x000fe40001800000 */
/*01f0*/ IMNMX R8, R9, 0xfff, PT ; /* 0x00000fff09087817 */
/* 0x000fe40003800200 */
/*0200*/ LOP3.LUT R9, R7, R4, RZ, 0xfc, !PT ; /* 0x0000000407097212 */
/* 0x000fe200078efcff */
/*0210*/ IMAD.WIDE R6, R5, R0, c[0x0][0x160] ; /* 0x0000580005067625 */
/* 0x000fe200078e0200 */
/*0220*/ IMNMX R10, R10, 0xfff, PT ; /* 0x00000fff0a0a7817 */
/* 0x000fe40003800200 */
/*0230*/ LOP3.LUT R11, R11, R4, RZ, 0xfc, !PT ; /* 0x000000040b0b7212 */
/* 0x000fe200078efcff */
/*0240*/ IMAD.SHL.U32 R5, R8, 0x1000, RZ ; /* 0x0000100008057824 */
/* 0x000fe400078e00ff */
/*0250*/ IMAD.WIDE R8, R9, R0, c[0x0][0x160] ; /* 0x0000580009087625 */
/* 0x000fe200078e0200 */
/*0260*/ LDG.E.CONSTANT R6, [R6.64] ; /* 0x0000000406067981 */
/* 0x000ea4000c1e9900 */
/*0270*/ LOP3.LUT R5, R5, R4, RZ, 0xfc, !PT ; /* 0x0000000405057212 */
/* 0x000fe200078efcff */
/*0280*/ IMAD.SHL.U32 R13, R10, 0x1000, RZ ; /* 0x000010000a0d7824 */
/* 0x000fc400078e00ff */
/*0290*/ IMAD.WIDE.U32 R10, R11, R0, c[0x0][0x160] ; /* 0x000058000b0a7625 */
/* 0x000fe200078e0000 */
/*02a0*/ LDG.E.CONSTANT R8, [R8.64] ; /* 0x0000000408087981 */
/* 0x000ee4000c1e9900 */
/*02b0*/ LOP3.LUT R13, R13, R4, RZ, 0xfc, !PT ; /* 0x000000040d0d7212 */
/* 0x000fe200078efcff */
/*02c0*/ IMAD.WIDE R4, R5, R0.reuse, c[0x0][0x160] ; /* 0x0000580005047625 */
/* 0x080fe400078e0200 */
/*02d0*/ LDG.E.CONSTANT R10, [R10.64] ; /* 0x000000040a0a7981 */
/* 0x000f24000c1e9900 */
/*02e0*/ IMAD.WIDE R12, R13, R0, c[0x0][0x160] ; /* 0x000058000d0c7625 */
/* 0x000fe400078e0200 */
/*02f0*/ LDG.E.CONSTANT R4, [R4.64] ; /* 0x0000000404047981 */
/* 0x000f68000c1e9900 */
/*0300*/ LDG.E.CONSTANT R12, [R12.64] ; /* 0x000000040c0c7981 */
/* 0x000f62000c1e9900 */
/*0310*/ IMAD R3, R3, 0x1000, R2 ; /* 0x0000100003037824 */
/* 0x000fc800078e0202 */
/*0320*/ IMAD.WIDE R2, R3, R0, c[0x0][0x168] ; /* 0x00005a0003027625 */
/* 0x000fc800078e0200 */
/*0330*/ FFMA R7, R6, 0.07076600193977355957, RZ ; /* 0x3d90edc406077823 */
/* 0x004fc800000000ff */
/*0340*/ FFMA R7, R8, 0.24446000158786773682, R7 ; /* 0x3e7a53b908077823 */
/* 0x008fc80000000007 */
/*0350*/ FFMA R7, R10, 0.36954599618911743164, R7 ; /* 0x3ebd35220a077823 */
/* 0x010fc80000000007 */
/*0360*/ FFMA R7, R4, 0.24446000158786773682, R7 ; /* 0x3e7a53b904077823 */
/* 0x020fc80000000007 */
/*0370*/ FFMA R7, R12, 0.07076600193977355957, R7 ; /* 0x3d90edc40c077823 */
/* 0x000fca0000000007 */
/*0380*/ STG.E [R2.64], R7 ; /* 0x0000000702007986 */
/* 0x000fe2000c101904 */
/*0390*/ EXIT ; /* 0x000000000000794d */
/* 0x000fea0003800000 */
/*03a0*/ BRA 0x3a0; /* 0xfffffff000007947 */
/* 0x000fc0000383ffff */
/*03b0*/ NOP; /* 0x0000000000007918 */
/* 0x000fc00000000000 */
/*03c0*/ NOP; /* 0x0000000000007918 */
/* 0x000fc00000000000 */
/*03d0*/ NOP; /* 0x0000000000007918 */
/* 0x000fc00000000000 */
/*03e0*/ NOP; /* 0x0000000000007918 */
/* 0x000fc00000000000 */
/*03f0*/ NOP; /* 0x0000000000007918 */
/* 0x000fc00000000000 */
/*0400*/ NOP; /* 0x0000000000007918 */
/* 0x000fc00000000000 */
/*0410*/ NOP; /* 0x0000000000007918 */
/* 0x000fc00000000000 */
/*0420*/ NOP; /* 0x0000000000007918 */
/* 0x000fc00000000000 */
/*0430*/ NOP; /* 0x0000000000007918 */
/* 0x000fc00000000000 */
/*0440*/ NOP; /* 0x0000000000007918 */
/* 0x000fc00000000000 */
/*0450*/ NOP; /* 0x0000000000007918 */
/* 0x000fc00000000000 */
/*0460*/ NOP; /* 0x0000000000007918 */
/* 0x000fc00000000000 */
/*0470*/ NOP; /* 0x0000000000007918 */
/* 0x000fc00000000000 */
..........
Function : lambda_56187
.headerflags @"EF_CUDA_TEXMODE_UNIFIED EF_CUDA_64BIT_ADDRESS EF_CUDA_SM80 EF_CUDA_VIRTUAL_SM(EF_CUDA_SM80)"
/*0000*/ IMAD.MOV.U32 R1, RZ, RZ, c[0x0][0x28] ; /* 0x00000a00ff017624 */
/* 0x000fe400078e00ff */
/*0010*/ S2R R2, SR_TID.X ; /* 0x0000000000027919 */
/* 0x000e220000002100 */
/*0020*/ ULDC.64 UR4, c[0x0][0x118] ; /* 0x0000460000047ab9 */
/* 0x000fc60000000a00 */
/*0030*/ S2R R3, SR_CTAID.X ; /* 0x0000000000037919 */
/* 0x000e280000002500 */
/*0040*/ S2R R0, SR_TID.Y ; /* 0x0000000000007919 */
/* 0x000e680000002200 */
/*0050*/ S2R R5, SR_CTAID.Y ; /* 0x0000000000057919 */
/* 0x000e620000002600 */
/*0060*/ IMAD R2, R3, c[0x0][0x0], R2 ; /* 0x0000000003027a24 */
/* 0x001fca00078e0202 */
/*0070*/ ISETP.GE.AND P2, PT, R2.reuse, 0x2, PT ; /* 0x000000020200780c */
/* 0x040fe40003f46270 */
/*0080*/ IADD3 R4, R2.reuse, -0x2, RZ ; /* 0xfffffffe02047810 */
/* 0x040fe20007ffe0ff */
/*0090*/ IMAD R3, R5, c[0x0][0x4], R0 ; /* 0x0000010005037a24 */
/* 0x002fe200078e0200 */
/*00a0*/ ISETP.GE.AND P1, PT, R2.reuse, 0x1, PT ; /* 0x000000010200780c */
/* 0x040fe20003f26270 */
/*00b0*/ IMAD.MOV.U32 R0, RZ, RZ, 0x4 ; /* 0x00000004ff007424 */
/* 0x000fe200078e00ff */
/*00c0*/ IADD3 R6, R2, -0x1, RZ ; /* 0xffffffff02067810 */
/* 0x000fe40007ffe0ff */
/*00d0*/ IMNMX R5, RZ, R3, !PT ; /* 0x00000003ff057217 */
/* 0x000fe40007800200 */
/*00e0*/ SEL R4, R4, RZ, P2 ; /* 0x000000ff04047207 */
/* 0x000fc40001000000 */
/*00f0*/ IMNMX R5, R5, 0xfff, PT ; /* 0x00000fff05057817 */
/* 0x000fe40003800200 */
/*0100*/ SEL R6, R6, RZ, P1 ; /* 0x000000ff06067207 */
/* 0x000fe40000800000 */
/*0110*/ IMNMX R4, R4, 0xfff, PT ; /* 0x00000fff04047817 */
/* 0x000fe20003800200 */
/*0120*/ IMAD.SHL.U32 R11, R5, 0x1000, RZ ; /* 0x00001000050b7824 */
/* 0x000fe200078e00ff */
/*0130*/ ISETP.GE.AND P0, PT, R2.reuse, -0x1, PT ; /* 0xffffffff0200780c */
/* 0x040fe40003f06270 */
/*0140*/ IADD3 R9, R2, 0x1, RZ ; /* 0x0000000102097810 */
/* 0x000fe20007ffe0ff */
/*0150*/ IMAD.IADD R5, R4, 0x1, R11 ; /* 0x0000000104057824 */
/* 0x000fe200078e020b */
/*0160*/ IMNMX R7, RZ, R2, !PT ; /* 0x00000002ff077217 */
/* 0x000fc40007800200 */
/*0170*/ IMNMX R6, R6, 0xfff, PT ; /* 0x00000fff06067817 */
/* 0x000fe20003800200 */
/*0180*/ IMAD.WIDE R4, R5, R0, c[0x0][0x160] ; /* 0x0000580005047625 */
/* 0x000fe200078e0200 */
/*0190*/ ISETP.GE.AND P2, PT, R2.reuse, -0x2, PT ; /* 0xfffffffe0200780c */
/* 0x040fe40003f46270 */
/*01a0*/ IADD3 R10, R2, 0x2, RZ ; /* 0x00000002020a7810 */
/* 0x000fe40007ffe0ff */
/*01b0*/ SEL R9, R9, RZ, P0 ; /* 0x000000ff09097207 */
/* 0x000fe20000000000 */
/*01c0*/ LDG.E.CONSTANT R4, [R4.64] ; /* 0x0000000404047981 */
/* 0x000ea2000c1e9900 */
/*01d0*/ IMNMX R8, R7, 0xfff, PT ; /* 0x00000fff07087817 */
/* 0x000fe20003800200 */
/*01e0*/ IMAD.IADD R7, R11, 0x1, R6 ; /* 0x000000010b077824 */
/* 0x000fe200078e0206 */
/*01f0*/ SEL R12, R10, RZ, P2 ; /* 0x000000ff0a0c7207 */
/* 0x000fc40001000000 */
/*0200*/ IMNMX R10, R9, 0xfff, PT ; /* 0x00000fff090a7817 */
/* 0x000fe20003800200 */
/*0210*/ IMAD.WIDE R6, R7, R0, c[0x0][0x160] ; /* 0x0000580007067625 */
/* 0x000fe200078e0200 */
/*0220*/ LOP3.LUT R9, R11.reuse, R8, RZ, 0xfc, !PT ; /* 0x000000080b097212 */
/* 0x040fe400078efcff */
/*0230*/ IMNMX R12, R12, 0xfff, PT ; /* 0x00000fff0c0c7817 */
/* 0x000fe20003800200 */
/*0240*/ IMAD.IADD R13, R11, 0x1, R10 ; /* 0x000000010b0d7824 */
/* 0x000fe400078e020a */
/*0250*/ IMAD.WIDE.U32 R8, R9, R0, c[0x0][0x160] ; /* 0x0000580009087625 */
/* 0x000fe200078e0000 */
/*0260*/ LDG.E.CONSTANT R6, [R6.64] ; /* 0x0000000406067981 */
/* 0x000ee6000c1e9900 */
/*0270*/ IMAD.IADD R15, R11, 0x1, R12 ; /* 0x000000010b0f7824 */
/* 0x000fc400078e020c */
/*0280*/ IMAD.WIDE R10, R13, R0.reuse, c[0x0][0x160] ; /* 0x000058000d0a7625 */
/* 0x080fe200078e0200 */
/*0290*/ LDG.E.CONSTANT R8, [R8.64] ; /* 0x0000000408087981 */
/* 0x000f26000c1e9900 */
/*02a0*/ IMAD.WIDE R12, R15, R0, c[0x0][0x160] ; /* 0x000058000f0c7625 */
/* 0x000fe400078e0200 */
/*02b0*/ LDG.E.CONSTANT R10, [R10.64] ; /* 0x000000040a0a7981 */
/* 0x000f68000c1e9900 */
/*02c0*/ LDG.E.CONSTANT R12, [R12.64] ; /* 0x000000040c0c7981 */
/* 0x000f62000c1e9900 */
/*02d0*/ IMAD R3, R3, 0x1000, R2 ; /* 0x0000100003037824 */
/* 0x000fc800078e0202 */
/*02e0*/ IMAD.WIDE R2, R3, R0, c[0x0][0x168] ; /* 0x00005a0003027625 */
/* 0x000fc800078e0200 */
/*02f0*/ FFMA R5, R4, 0.07076600193977355957, RZ ; /* 0x3d90edc404057823 */
/* 0x004fc800000000ff */
/*0300*/ FFMA R5, R6, 0.24446000158786773682, R5 ; /* 0x3e7a53b906057823 */
/* 0x008fc80000000005 */
/*0310*/ FFMA R5, R8, 0.36954599618911743164, R5 ; /* 0x3ebd352208057823 */
/* 0x010fc80000000005 */
/*0320*/ FFMA R5, R10, 0.24446000158786773682, R5 ; /* 0x3e7a53b90a057823 */
/* 0x020fc80000000005 */
/*0330*/ FFMA R5, R12, 0.07076600193977355957, R5 ; /* 0x3d90edc40c057823 */
/* 0x000fca0000000005 */
/*0340*/ STG.E [R2.64], R5 ; /* 0x0000000502007986 */
/* 0x000fe2000c101904 */
/*0350*/ EXIT ; /* 0x000000000000794d */
/* 0x000fea0003800000 */
/*0360*/ BRA 0x360; /* 0xfffffff000007947 */
/* 0x000fc0000383ffff */
/*0370*/ NOP; /* 0x0000000000007918 */
/* 0x000fc00000000000 */
/*0380*/ NOP; /* 0x0000000000007918 */
/* 0x000fc00000000000 */
/*0390*/ NOP; /* 0x0000000000007918 */
/* 0x000fc00000000000 */
/*03a0*/ NOP; /* 0x0000000000007918 */
/* 0x000fc00000000000 */
/*03b0*/ NOP; /* 0x0000000000007918 */
/* 0x000fc00000000000 */
/*03c0*/ NOP; /* 0x0000000000007918 */
/* 0x000fc00000000000 */
/*03d0*/ NOP; /* 0x0000000000007918 */
/* 0x000fc00000000000 */
/*03e0*/ NOP; /* 0x0000000000007918 */
/* 0x000fc00000000000 */
/*03f0*/ NOP; /* 0x0000000000007918 */
/* 0x000fc00000000000 */
.......... |
You are a helpful coding assistant specialized in converting CUDA source code to CUDA host assembly. | extern "C" {
__device__ inline int threadIdx_x() { return threadIdx.x; }
__device__ inline int threadIdx_y() { return threadIdx.y; }
__device__ inline int threadIdx_z() { return threadIdx.z; }
__device__ inline int blockIdx_x() { return blockIdx.x; }
__device__ inline int blockIdx_y() { return blockIdx.y; }
__device__ inline int blockIdx_z() { return blockIdx.z; }
__device__ inline int blockDim_x() { return blockDim.x; }
__device__ inline int blockDim_y() { return blockDim.y; }
__device__ inline int blockDim_z() { return blockDim.z; }
__device__ inline int gridDim_x() { return gridDim.x; }
__device__ inline int gridDim_y() { return gridDim.y; }
__device__ inline int gridDim_z() { return gridDim.z; }
__global__ void lambda_56187(float*, float*);
__global__ void lambda_55652(float*, float*);
__global__ __launch_bounds__ (128 * 1 * 1) void lambda_56187(float* _56190_61351, float* _56191_61352) {
int threadIdx_x_61358;
int pthreadIdx_x_61358;
int blockDim_x_61364;
int pblockDim_x_61364;
int blockIdx_x_61370;
int pblockIdx_x_61370;
int _61376;
int p_61376;
int _61382;
int p_61382;
int _61388;
int p_61388;
int _61391;
int p_61391;
int converge_61400;
int pconverge_61400;
int converge_61405;
int pconverge_61405;
int converge_61411;
int pconverge_61411;
int converge_61415;
int pconverge_61415;
float _61425;
float p_61425;
int converge_61431;
int pconverge_61431;
int converge_61435;
int pconverge_61435;
int converge_61438;
int pconverge_61438;
int converge_61442;
int pconverge_61442;
float _61448;
float p_61448;
int converge_61452;
int pconverge_61452;
int converge_61456;
int pconverge_61456;
int converge_61459;
int pconverge_61459;
int converge_61463;
int pconverge_61463;
float _61469;
float p_61469;
int converge_61475;
int pconverge_61475;
int converge_61479;
int pconverge_61479;
int converge_61482;
int pconverge_61482;
int converge_61486;
int pconverge_61486;
float _61492;
float p_61492;
int converge_61498;
int pconverge_61498;
int converge_61502;
int pconverge_61502;
int converge_61505;
int pconverge_61505;
int converge_61509;
int pconverge_61509;
float _61515;
float p_61515;
threadIdx_x_61358 = threadIdx_x();
pthreadIdx_x_61358 = threadIdx_x_61358;
l61356: ;
threadIdx_x_61358 = pthreadIdx_x_61358;
blockDim_x_61364 = blockDim_x();
pblockDim_x_61364 = blockDim_x_61364;
l61362: ;
blockDim_x_61364 = pblockDim_x_61364;
blockIdx_x_61370 = blockIdx_x();
pblockIdx_x_61370 = blockIdx_x_61370;
l61368: ;
blockIdx_x_61370 = pblockIdx_x_61370;
_61376 = threadIdx_y();
p_61376 = _61376;
l61374: ;
_61376 = p_61376;
_61382 = blockDim_y();
p_61382 = _61382;
l61380: ;
_61382 = p_61382;
_61388 = blockIdx_y();
p_61388 = _61388;
l61386: ;
_61388 = p_61388;
_61391 = blockDim_y();
p_61391 = _61391;
l61389: ;
_61391 = p_61391;
int _61393;
_61393 = blockDim_x_61364 * blockIdx_x_61370;
int _61394;
_61394 = threadIdx_x_61358 + _61393;
int _61395;
_61395 = -2 + _61394;
bool _61397;
_61397 = _61395 < 0;
if (_61397) goto l61398; else goto l61554;
l61554: ;
pconverge_61400 = _61395;
goto l61399;
l61398: ;
pconverge_61400 = 0;
goto l61399;
l61399: ;
converge_61400 = pconverge_61400;
bool _61402;
_61402 = 4096 <= converge_61400;
if (_61402) goto l61403; else goto l61553;
l61553: ;
pconverge_61405 = converge_61400;
goto l61404;
l61403: ;
pconverge_61405 = 4095;
goto l61404;
l61404: ;
converge_61405 = pconverge_61405;
int _61406;
_61406 = _61382 * _61388;
int gid_y_61407;
gid_y_61407 = _61376 + _61406;
bool _61408;
_61408 = gid_y_61407 < 0;
if (_61408) goto l61409; else goto l61552;
l61552: ;
pconverge_61411 = gid_y_61407;
goto l61410;
l61409: ;
pconverge_61411 = 0;
goto l61410;
l61410: ;
converge_61411 = pconverge_61411;
bool _61412;
_61412 = 4096 <= converge_61411;
if (_61412) goto l61413; else goto l61551;
l61551: ;
pconverge_61415 = converge_61411;
goto l61414;
l61413: ;
pconverge_61415 = 4095;
goto l61414;
l61414: ;
converge_61415 = pconverge_61415;
int _61420;
_61420 = 4096 * converge_61415;
int _61421;
_61421 = _61420 + converge_61405;
float* idx_61422;
idx_61422 = _56190_61351 + _61421;
_61425 = __ldg(idx_61422);
p_61425 = _61425;
l61423: ;
_61425 = p_61425;
int _61427;
_61427 = -1 + _61394;
bool _61428;
_61428 = _61427 < 0;
if (_61428) goto l61429; else goto l61550;
l61550: ;
pconverge_61431 = _61427;
goto l61430;
l61429: ;
pconverge_61431 = 0;
goto l61430;
l61430: ;
converge_61431 = pconverge_61431;
bool _61432;
_61432 = 4096 <= converge_61431;
if (_61432) goto l61433; else goto l61549;
l61549: ;
pconverge_61435 = converge_61431;
goto l61434;
l61433: ;
pconverge_61435 = 4095;
goto l61434;
l61434: ;
converge_61435 = pconverge_61435;
if (_61408) goto l61436; else goto l61548;
l61548: ;
pconverge_61438 = gid_y_61407;
goto l61437;
l61436: ;
pconverge_61438 = 0;
goto l61437;
l61437: ;
converge_61438 = pconverge_61438;
bool _61439;
_61439 = 4096 <= converge_61438;
if (_61439) goto l61440; else goto l61547;
l61547: ;
pconverge_61442 = converge_61438;
goto l61441;
l61440: ;
pconverge_61442 = 4095;
goto l61441;
l61441: ;
converge_61442 = pconverge_61442;
int _61443;
_61443 = 4096 * converge_61442;
int _61444;
_61444 = _61443 + converge_61435;
float* idx_61445;
idx_61445 = _56190_61351 + _61444;
_61448 = __ldg(idx_61445);
p_61448 = _61448;
l61446: ;
_61448 = p_61448;
bool _61449;
_61449 = _61394 < 0;
if (_61449) goto l61450; else goto l61546;
l61546: ;
pconverge_61452 = _61394;
goto l61451;
l61450: ;
pconverge_61452 = 0;
goto l61451;
l61451: ;
converge_61452 = pconverge_61452;
bool _61453;
_61453 = 4096 <= converge_61452;
if (_61453) goto l61454; else goto l61545;
l61545: ;
pconverge_61456 = converge_61452;
goto l61455;
l61454: ;
pconverge_61456 = 4095;
goto l61455;
l61455: ;
converge_61456 = pconverge_61456;
if (_61408) goto l61457; else goto l61544;
l61544: ;
pconverge_61459 = gid_y_61407;
goto l61458;
l61457: ;
pconverge_61459 = 0;
goto l61458;
l61458: ;
converge_61459 = pconverge_61459;
bool _61460;
_61460 = 4096 <= converge_61459;
if (_61460) goto l61461; else goto l61543;
l61543: ;
pconverge_61463 = converge_61459;
goto l61462;
l61461: ;
pconverge_61463 = 4095;
goto l61462;
l61462: ;
converge_61463 = pconverge_61463;
int _61464;
_61464 = 4096 * converge_61463;
int _61465;
_61465 = _61464 + converge_61456;
float* idx_61466;
idx_61466 = _56190_61351 + _61465;
_61469 = __ldg(idx_61466);
p_61469 = _61469;
l61467: ;
_61469 = p_61469;
int _61471;
_61471 = 1 + _61394;
bool _61472;
_61472 = _61471 < 0;
if (_61472) goto l61473; else goto l61542;
l61542: ;
pconverge_61475 = _61471;
goto l61474;
l61473: ;
pconverge_61475 = 0;
goto l61474;
l61474: ;
converge_61475 = pconverge_61475;
bool _61476;
_61476 = 4096 <= converge_61475;
if (_61476) goto l61477; else goto l61541;
l61541: ;
pconverge_61479 = converge_61475;
goto l61478;
l61477: ;
pconverge_61479 = 4095;
goto l61478;
l61478: ;
converge_61479 = pconverge_61479;
if (_61408) goto l61480; else goto l61540;
l61540: ;
pconverge_61482 = gid_y_61407;
goto l61481;
l61480: ;
pconverge_61482 = 0;
goto l61481;
l61481: ;
converge_61482 = pconverge_61482;
bool _61483;
_61483 = 4096 <= converge_61482;
if (_61483) goto l61484; else goto l61539;
l61539: ;
pconverge_61486 = converge_61482;
goto l61485;
l61484: ;
pconverge_61486 = 4095;
goto l61485;
l61485: ;
converge_61486 = pconverge_61486;
int _61487;
_61487 = 4096 * converge_61486;
int _61488;
_61488 = _61487 + converge_61479;
float* idx_61489;
idx_61489 = _56190_61351 + _61488;
_61492 = __ldg(idx_61489);
p_61492 = _61492;
l61490: ;
_61492 = p_61492;
int _61494;
_61494 = 2 + _61394;
bool _61495;
_61495 = _61494 < 0;
if (_61495) goto l61496; else goto l61538;
l61538: ;
pconverge_61498 = _61494;
goto l61497;
l61496: ;
pconverge_61498 = 0;
goto l61497;
l61497: ;
converge_61498 = pconverge_61498;
bool _61499;
_61499 = 4096 <= converge_61498;
if (_61499) goto l61500; else goto l61537;
l61537: ;
pconverge_61502 = converge_61498;
goto l61501;
l61500: ;
pconverge_61502 = 4095;
goto l61501;
l61501: ;
converge_61502 = pconverge_61502;
if (_61408) goto l61503; else goto l61536;
l61536: ;
pconverge_61505 = gid_y_61407;
goto l61504;
l61503: ;
pconverge_61505 = 0;
goto l61504;
l61504: ;
converge_61505 = pconverge_61505;
bool _61506;
_61506 = 4096 <= converge_61505;
if (_61506) goto l61507; else goto l61535;
l61535: ;
pconverge_61509 = converge_61505;
goto l61508;
l61507: ;
pconverge_61509 = 4095;
goto l61508;
l61508: ;
converge_61509 = pconverge_61509;
int _61510;
_61510 = 4096 * converge_61509;
int _61511;
_61511 = _61510 + converge_61502;
float* idx_61512;
idx_61512 = _56190_61351 + _61511;
_61515 = __ldg(idx_61512);
p_61515 = _61515;
l61513: ;
_61515 = p_61515;
int _61516;
_61516 = 4096 * gid_y_61407;
float _61524;
_61524 = 2.444600e-01f * _61448;
float _61521;
_61521 = 7.076600e-02f * _61425;
float _61531;
_61531 = 7.076600e-02f * _61515;
float _61529;
_61529 = 2.444600e-01f * _61492;
float _61522;
_61522 = 0.000000e+00f + _61521;
float _61525;
_61525 = _61522 + _61524;
float _61527;
_61527 = 3.695460e-01f * _61469;
int _61517;
_61517 = _61516 + _61394;
float _61528;
_61528 = _61525 + _61527;
float* idx_61518;
idx_61518 = _56191_61352 + _61517;
float _61530;
_61530 = _61528 + _61529;
float _61532;
_61532 = _61530 + _61531;
*idx_61518 = _61532;
return ;
}
__global__ __launch_bounds__ (32 * 4 * 1) void lambda_55652(float* _55655_61558, float* _55656_61559) {
int threadIdx_x_61562;
int pthreadIdx_x_61562;
int blockDim_x_61565;
int pblockDim_x_61565;
int blockIdx_x_61568;
int pblockIdx_x_61568;
int _61571;
int p_61571;
int _61574;
int p_61574;
int _61577;
int p_61577;
int _61580;
int p_61580;
int converge_61586;
int pconverge_61586;
int converge_61590;
int pconverge_61590;
int converge_61597;
int pconverge_61597;
int converge_61601;
int pconverge_61601;
float _61607;
float p_61607;
int converge_61610;
int pconverge_61610;
int converge_61614;
int pconverge_61614;
int converge_61619;
int pconverge_61619;
int converge_61623;
int pconverge_61623;
float _61629;
float p_61629;
int converge_61632;
int pconverge_61632;
int converge_61636;
int pconverge_61636;
int converge_61640;
int pconverge_61640;
int converge_61644;
int pconverge_61644;
float _61650;
float p_61650;
int converge_61653;
int pconverge_61653;
int converge_61657;
int pconverge_61657;
int converge_61662;
int pconverge_61662;
int converge_61666;
int pconverge_61666;
float _61672;
float p_61672;
int converge_61675;
int pconverge_61675;
int converge_61679;
int pconverge_61679;
int converge_61684;
int pconverge_61684;
int converge_61688;
int pconverge_61688;
float _61694;
float p_61694;
threadIdx_x_61562 = threadIdx_x();
pthreadIdx_x_61562 = threadIdx_x_61562;
l61560: ;
threadIdx_x_61562 = pthreadIdx_x_61562;
blockDim_x_61565 = blockDim_x();
pblockDim_x_61565 = blockDim_x_61565;
l61563: ;
blockDim_x_61565 = pblockDim_x_61565;
blockIdx_x_61568 = blockIdx_x();
pblockIdx_x_61568 = blockIdx_x_61568;
l61566: ;
blockIdx_x_61568 = pblockIdx_x_61568;
_61571 = threadIdx_y();
p_61571 = _61571;
l61569: ;
_61571 = p_61571;
_61574 = blockDim_y();
p_61574 = _61574;
l61572: ;
_61574 = p_61574;
_61577 = blockIdx_y();
p_61577 = _61577;
l61575: ;
_61577 = p_61577;
_61580 = blockDim_y();
p_61580 = _61580;
l61578: ;
_61580 = p_61580;
int _61581;
_61581 = blockDim_x_61565 * blockIdx_x_61568;
int _61582;
_61582 = threadIdx_x_61562 + _61581;
bool _61583;
_61583 = _61582 < 0;
if (_61583) goto l61584; else goto l61728;
l61728: ;
pconverge_61586 = _61582;
goto l61585;
l61584: ;
pconverge_61586 = 0;
goto l61585;
l61585: ;
converge_61586 = pconverge_61586;
bool _61587;
_61587 = 4096 <= converge_61586;
if (_61587) goto l61588; else goto l61727;
l61727: ;
pconverge_61590 = converge_61586;
goto l61589;
l61588: ;
pconverge_61590 = 4095;
goto l61589;
l61589: ;
converge_61590 = pconverge_61590;
int _61591;
_61591 = _61574 * _61577;
int gid_y_61592;
gid_y_61592 = _61571 + _61591;
int _61593;
_61593 = -2 + gid_y_61592;
bool _61594;
_61594 = _61593 < 0;
if (_61594) goto l61595; else goto l61726;
l61726: ;
pconverge_61597 = _61593;
goto l61596;
l61595: ;
pconverge_61597 = 0;
goto l61596;
l61596: ;
converge_61597 = pconverge_61597;
bool _61598;
_61598 = 4096 <= converge_61597;
if (_61598) goto l61599; else goto l61725;
l61725: ;
pconverge_61601 = converge_61597;
goto l61600;
l61599: ;
pconverge_61601 = 4095;
goto l61600;
l61600: ;
converge_61601 = pconverge_61601;
int _61602;
_61602 = 4096 * converge_61601;
int _61603;
_61603 = _61602 + converge_61590;
float* idx_61604;
idx_61604 = _55655_61558 + _61603;
_61607 = __ldg(idx_61604);
p_61607 = _61607;
l61605: ;
_61607 = p_61607;
if (_61583) goto l61608; else goto l61724;
l61724: ;
pconverge_61610 = _61582;
goto l61609;
l61608: ;
pconverge_61610 = 0;
goto l61609;
l61609: ;
converge_61610 = pconverge_61610;
bool _61611;
_61611 = 4096 <= converge_61610;
if (_61611) goto l61612; else goto l61723;
l61723: ;
pconverge_61614 = converge_61610;
goto l61613;
l61612: ;
pconverge_61614 = 4095;
goto l61613;
l61613: ;
converge_61614 = pconverge_61614;
int _61615;
_61615 = -1 + gid_y_61592;
bool _61616;
_61616 = _61615 < 0;
if (_61616) goto l61617; else goto l61722;
l61722: ;
pconverge_61619 = _61615;
goto l61618;
l61617: ;
pconverge_61619 = 0;
goto l61618;
l61618: ;
converge_61619 = pconverge_61619;
bool _61620;
_61620 = 4096 <= converge_61619;
if (_61620) goto l61621; else goto l61721;
l61721: ;
pconverge_61623 = converge_61619;
goto l61622;
l61621: ;
pconverge_61623 = 4095;
goto l61622;
l61622: ;
converge_61623 = pconverge_61623;
int _61624;
_61624 = 4096 * converge_61623;
int _61625;
_61625 = _61624 + converge_61614;
float* idx_61626;
idx_61626 = _55655_61558 + _61625;
_61629 = __ldg(idx_61626);
p_61629 = _61629;
l61627: ;
_61629 = p_61629;
if (_61583) goto l61630; else goto l61720;
l61720: ;
pconverge_61632 = _61582;
goto l61631;
l61630: ;
pconverge_61632 = 0;
goto l61631;
l61631: ;
converge_61632 = pconverge_61632;
bool _61633;
_61633 = 4096 <= converge_61632;
if (_61633) goto l61634; else goto l61719;
l61719: ;
pconverge_61636 = converge_61632;
goto l61635;
l61634: ;
pconverge_61636 = 4095;
goto l61635;
l61635: ;
converge_61636 = pconverge_61636;
bool _61637;
_61637 = gid_y_61592 < 0;
if (_61637) goto l61638; else goto l61718;
l61718: ;
pconverge_61640 = gid_y_61592;
goto l61639;
l61638: ;
pconverge_61640 = 0;
goto l61639;
l61639: ;
converge_61640 = pconverge_61640;
bool _61641;
_61641 = 4096 <= converge_61640;
if (_61641) goto l61642; else goto l61717;
l61717: ;
pconverge_61644 = converge_61640;
goto l61643;
l61642: ;
pconverge_61644 = 4095;
goto l61643;
l61643: ;
converge_61644 = pconverge_61644;
int _61645;
_61645 = 4096 * converge_61644;
int _61646;
_61646 = _61645 + converge_61636;
float* idx_61647;
idx_61647 = _55655_61558 + _61646;
_61650 = __ldg(idx_61647);
p_61650 = _61650;
l61648: ;
_61650 = p_61650;
if (_61583) goto l61651; else goto l61716;
l61716: ;
pconverge_61653 = _61582;
goto l61652;
l61651: ;
pconverge_61653 = 0;
goto l61652;
l61652: ;
converge_61653 = pconverge_61653;
bool _61654;
_61654 = 4096 <= converge_61653;
if (_61654) goto l61655; else goto l61715;
l61715: ;
pconverge_61657 = converge_61653;
goto l61656;
l61655: ;
pconverge_61657 = 4095;
goto l61656;
l61656: ;
converge_61657 = pconverge_61657;
int _61658;
_61658 = 1 + gid_y_61592;
bool _61659;
_61659 = _61658 < 0;
if (_61659) goto l61660; else goto l61714;
l61714: ;
pconverge_61662 = _61658;
goto l61661;
l61660: ;
pconverge_61662 = 0;
goto l61661;
l61661: ;
converge_61662 = pconverge_61662;
bool _61663;
_61663 = 4096 <= converge_61662;
if (_61663) goto l61664; else goto l61713;
l61713: ;
pconverge_61666 = converge_61662;
goto l61665;
l61664: ;
pconverge_61666 = 4095;
goto l61665;
l61665: ;
converge_61666 = pconverge_61666;
int _61667;
_61667 = 4096 * converge_61666;
int _61668;
_61668 = _61667 + converge_61657;
float* idx_61669;
idx_61669 = _55655_61558 + _61668;
_61672 = __ldg(idx_61669);
p_61672 = _61672;
l61670: ;
_61672 = p_61672;
if (_61583) goto l61673; else goto l61712;
l61712: ;
pconverge_61675 = _61582;
goto l61674;
l61673: ;
pconverge_61675 = 0;
goto l61674;
l61674: ;
converge_61675 = pconverge_61675;
bool _61676;
_61676 = 4096 <= converge_61675;
if (_61676) goto l61677; else goto l61711;
l61711: ;
pconverge_61679 = converge_61675;
goto l61678;
l61677: ;
pconverge_61679 = 4095;
goto l61678;
l61678: ;
converge_61679 = pconverge_61679;
int _61680;
_61680 = 2 + gid_y_61592;
bool _61681;
_61681 = _61680 < 0;
if (_61681) goto l61682; else goto l61710;
l61710: ;
pconverge_61684 = _61680;
goto l61683;
l61682: ;
pconverge_61684 = 0;
goto l61683;
l61683: ;
converge_61684 = pconverge_61684;
bool _61685;
_61685 = 4096 <= converge_61684;
if (_61685) goto l61686; else goto l61709;
l61709: ;
pconverge_61688 = converge_61684;
goto l61687;
l61686: ;
pconverge_61688 = 4095;
goto l61687;
l61687: ;
converge_61688 = pconverge_61688;
int _61689;
_61689 = 4096 * converge_61688;
int _61690;
_61690 = _61689 + converge_61679;
float* idx_61691;
idx_61691 = _55655_61558 + _61690;
_61694 = __ldg(idx_61691);
p_61694 = _61694;
l61692: ;
_61694 = p_61694;
float _61700;
_61700 = 2.444600e-01f * _61629;
float _61706;
_61706 = 7.076600e-02f * _61694;
int _61695;
_61695 = 4096 * gid_y_61592;
float _61704;
_61704 = 2.444600e-01f * _61672;
float _61702;
_61702 = 3.695460e-01f * _61650;
float _61698;
_61698 = 7.076600e-02f * _61607;
int _61696;
_61696 = _61695 + _61582;
float _61699;
_61699 = 0.000000e+00f + _61698;
float* idx_61697;
idx_61697 = _55656_61559 + _61696;
float _61701;
_61701 = _61699 + _61700;
float _61703;
_61703 = _61701 + _61702;
float _61705;
_61705 = _61703 + _61704;
float _61707;
_61707 = _61705 + _61706;
*idx_61697 = _61707;
return ;
}
} | .file "tmpxft_0014e419_00000000-6_gaussian.cudafe1.cpp"
.text
#APP
#NO_APP
.type _ZL26__cudaUnregisterBinaryUtilv, @function
_ZL26__cudaUnregisterBinaryUtilv:
.LFB2041:
.cfi_startproc
endbr64
subq $8, %rsp
.cfi_def_cfa_offset 16
movq _ZL20__cudaFatCubinHandle(%rip), %rdi
call __cudaUnregisterFatBinary@PLT
addq $8, %rsp
.cfi_def_cfa_offset 8
ret
.cfi_endproc
.LFE2041:
.size _ZL26__cudaUnregisterBinaryUtilv, .-_ZL26__cudaUnregisterBinaryUtilv
.globl _Z34__device_stub__Z12lambda_56187PfS_PfS_
.type _Z34__device_stub__Z12lambda_56187PfS_PfS_, @function
_Z34__device_stub__Z12lambda_56187PfS_PfS_:
.LFB2063:
.cfi_startproc
endbr64
subq $120, %rsp
.cfi_def_cfa_offset 128
movq %rdi, 8(%rsp)
movq %rsi, (%rsp)
movq %fs:40, %rax
movq %rax, 104(%rsp)
xorl %eax, %eax
leaq 8(%rsp), %rax
movq %rax, 80(%rsp)
movq %rsp, %rax
movq %rax, 88(%rsp)
movl $1, 32(%rsp)
movl $1, 36(%rsp)
movl $1, 40(%rsp)
movl $1, 44(%rsp)
movl $1, 48(%rsp)
movl $1, 52(%rsp)
leaq 24(%rsp), %rcx
leaq 16(%rsp), %rdx
leaq 44(%rsp), %rsi
leaq 32(%rsp), %rdi
call __cudaPopCallConfiguration@PLT
testl %eax, %eax
je .L7
.L3:
movq 104(%rsp), %rax
subq %fs:40, %rax
jne .L8
addq $120, %rsp
.cfi_remember_state
.cfi_def_cfa_offset 8
ret
.L7:
.cfi_restore_state
pushq 24(%rsp)
.cfi_def_cfa_offset 136
pushq 24(%rsp)
.cfi_def_cfa_offset 144
leaq 96(%rsp), %r9
movq 60(%rsp), %rcx
movl 68(%rsp), %r8d
movq 48(%rsp), %rsi
movl 56(%rsp), %edx
leaq lambda_56187(%rip), %rdi
call cudaLaunchKernel@PLT
addq $16, %rsp
.cfi_def_cfa_offset 128
jmp .L3
.L8:
call __stack_chk_fail@PLT
.cfi_endproc
.LFE2063:
.size _Z34__device_stub__Z12lambda_56187PfS_PfS_, .-_Z34__device_stub__Z12lambda_56187PfS_PfS_
.globl lambda_56187
.type lambda_56187, @function
lambda_56187:
.LFB2064:
.cfi_startproc
endbr64
subq $8, %rsp
.cfi_def_cfa_offset 16
call _Z34__device_stub__Z12lambda_56187PfS_PfS_
addq $8, %rsp
.cfi_def_cfa_offset 8
ret
.cfi_endproc
.LFE2064:
.size lambda_56187, .-lambda_56187
.globl _Z34__device_stub__Z12lambda_55652PfS_PfS_
.type _Z34__device_stub__Z12lambda_55652PfS_PfS_, @function
_Z34__device_stub__Z12lambda_55652PfS_PfS_:
.LFB2065:
.cfi_startproc
endbr64
subq $120, %rsp
.cfi_def_cfa_offset 128
movq %rdi, 8(%rsp)
movq %rsi, (%rsp)
movq %fs:40, %rax
movq %rax, 104(%rsp)
xorl %eax, %eax
leaq 8(%rsp), %rax
movq %rax, 80(%rsp)
movq %rsp, %rax
movq %rax, 88(%rsp)
movl $1, 32(%rsp)
movl $1, 36(%rsp)
movl $1, 40(%rsp)
movl $1, 44(%rsp)
movl $1, 48(%rsp)
movl $1, 52(%rsp)
leaq 24(%rsp), %rcx
leaq 16(%rsp), %rdx
leaq 44(%rsp), %rsi
leaq 32(%rsp), %rdi
call __cudaPopCallConfiguration@PLT
testl %eax, %eax
je .L15
.L11:
movq 104(%rsp), %rax
subq %fs:40, %rax
jne .L16
addq $120, %rsp
.cfi_remember_state
.cfi_def_cfa_offset 8
ret
.L15:
.cfi_restore_state
pushq 24(%rsp)
.cfi_def_cfa_offset 136
pushq 24(%rsp)
.cfi_def_cfa_offset 144
leaq 96(%rsp), %r9
movq 60(%rsp), %rcx
movl 68(%rsp), %r8d
movq 48(%rsp), %rsi
movl 56(%rsp), %edx
leaq lambda_55652(%rip), %rdi
call cudaLaunchKernel@PLT
addq $16, %rsp
.cfi_def_cfa_offset 128
jmp .L11
.L16:
call __stack_chk_fail@PLT
.cfi_endproc
.LFE2065:
.size _Z34__device_stub__Z12lambda_55652PfS_PfS_, .-_Z34__device_stub__Z12lambda_55652PfS_PfS_
.globl lambda_55652
.type lambda_55652, @function
lambda_55652:
.LFB2066:
.cfi_startproc
endbr64
subq $8, %rsp
.cfi_def_cfa_offset 16
call _Z34__device_stub__Z12lambda_55652PfS_PfS_
addq $8, %rsp
.cfi_def_cfa_offset 8
ret
.cfi_endproc
.LFE2066:
.size lambda_55652, .-lambda_55652
.section .rodata.str1.1,"aMS",@progbits,1
.LC0:
.string "lambda_55652"
.LC1:
.string "lambda_56187"
.text
.type _ZL24__sti____cudaRegisterAllv, @function
_ZL24__sti____cudaRegisterAllv:
.LFB2068:
.cfi_startproc
endbr64
pushq %rbx
.cfi_def_cfa_offset 16
.cfi_offset 3, -16
leaq _ZL15__fatDeviceText(%rip), %rdi
call __cudaRegisterFatBinary@PLT
movq %rax, %rbx
movq %rax, _ZL20__cudaFatCubinHandle(%rip)
pushq $0
.cfi_def_cfa_offset 24
pushq $0
.cfi_def_cfa_offset 32
pushq $0
.cfi_def_cfa_offset 40
pushq $0
.cfi_def_cfa_offset 48
movl $0, %r9d
movl $-1, %r8d
leaq .LC0(%rip), %rdx
movq %rdx, %rcx
leaq lambda_55652(%rip), %rsi
movq %rax, %rdi
call __cudaRegisterFunction@PLT
addq $32, %rsp
.cfi_def_cfa_offset 16
pushq $0
.cfi_def_cfa_offset 24
pushq $0
.cfi_def_cfa_offset 32
pushq $0
.cfi_def_cfa_offset 40
pushq $0
.cfi_def_cfa_offset 48
movl $0, %r9d
movl $-1, %r8d
leaq .LC1(%rip), %rdx
movq %rdx, %rcx
leaq lambda_56187(%rip), %rsi
movq %rbx, %rdi
call __cudaRegisterFunction@PLT
addq $32, %rsp
.cfi_def_cfa_offset 16
movq _ZL20__cudaFatCubinHandle(%rip), %rdi
call __cudaRegisterFatBinaryEnd@PLT
leaq _ZL26__cudaUnregisterBinaryUtilv(%rip), %rdi
call atexit@PLT
popq %rbx
.cfi_def_cfa_offset 8
ret
.cfi_endproc
.LFE2068:
.size _ZL24__sti____cudaRegisterAllv, .-_ZL24__sti____cudaRegisterAllv
.section .init_array,"aw"
.align 8
.quad _ZL24__sti____cudaRegisterAllv
.section .nvFatBinSegment,"aw"
.align 8
.type _ZL15__fatDeviceText, @object
.size _ZL15__fatDeviceText, 24
_ZL15__fatDeviceText:
.long 1180844977
.long 1
.quad fatbinData
.quad 0
.local _ZL20__cudaFatCubinHandle
.comm _ZL20__cudaFatCubinHandle,8,8
.ident "GCC: (Ubuntu 13.3.0-6ubuntu2~24.04) 13.3.0"
.section .note.GNU-stack,"",@progbits
.section .note.gnu.property,"a"
.align 8
.long 1f - 0f
.long 4f - 1f
.long 5
0:
.string "GNU"
1:
.align 8
.long 0xc0000002
.long 3f - 2f
2:
.long 0x3
3:
.align 8
4: |
You are a helpful coding assistant specialized in converting CUDA source code to HIP/AMD source code. | extern "C" {
__device__ inline int threadIdx_x() { return threadIdx.x; }
__device__ inline int threadIdx_y() { return threadIdx.y; }
__device__ inline int threadIdx_z() { return threadIdx.z; }
__device__ inline int blockIdx_x() { return blockIdx.x; }
__device__ inline int blockIdx_y() { return blockIdx.y; }
__device__ inline int blockIdx_z() { return blockIdx.z; }
__device__ inline int blockDim_x() { return blockDim.x; }
__device__ inline int blockDim_y() { return blockDim.y; }
__device__ inline int blockDim_z() { return blockDim.z; }
__device__ inline int gridDim_x() { return gridDim.x; }
__device__ inline int gridDim_y() { return gridDim.y; }
__device__ inline int gridDim_z() { return gridDim.z; }
__global__ void lambda_56187(float*, float*);
__global__ void lambda_55652(float*, float*);
__global__ __launch_bounds__ (128 * 1 * 1) void lambda_56187(float* _56190_61351, float* _56191_61352) {
int threadIdx_x_61358;
int pthreadIdx_x_61358;
int blockDim_x_61364;
int pblockDim_x_61364;
int blockIdx_x_61370;
int pblockIdx_x_61370;
int _61376;
int p_61376;
int _61382;
int p_61382;
int _61388;
int p_61388;
int _61391;
int p_61391;
int converge_61400;
int pconverge_61400;
int converge_61405;
int pconverge_61405;
int converge_61411;
int pconverge_61411;
int converge_61415;
int pconverge_61415;
float _61425;
float p_61425;
int converge_61431;
int pconverge_61431;
int converge_61435;
int pconverge_61435;
int converge_61438;
int pconverge_61438;
int converge_61442;
int pconverge_61442;
float _61448;
float p_61448;
int converge_61452;
int pconverge_61452;
int converge_61456;
int pconverge_61456;
int converge_61459;
int pconverge_61459;
int converge_61463;
int pconverge_61463;
float _61469;
float p_61469;
int converge_61475;
int pconverge_61475;
int converge_61479;
int pconverge_61479;
int converge_61482;
int pconverge_61482;
int converge_61486;
int pconverge_61486;
float _61492;
float p_61492;
int converge_61498;
int pconverge_61498;
int converge_61502;
int pconverge_61502;
int converge_61505;
int pconverge_61505;
int converge_61509;
int pconverge_61509;
float _61515;
float p_61515;
threadIdx_x_61358 = threadIdx_x();
pthreadIdx_x_61358 = threadIdx_x_61358;
l61356: ;
threadIdx_x_61358 = pthreadIdx_x_61358;
blockDim_x_61364 = blockDim_x();
pblockDim_x_61364 = blockDim_x_61364;
l61362: ;
blockDim_x_61364 = pblockDim_x_61364;
blockIdx_x_61370 = blockIdx_x();
pblockIdx_x_61370 = blockIdx_x_61370;
l61368: ;
blockIdx_x_61370 = pblockIdx_x_61370;
_61376 = threadIdx_y();
p_61376 = _61376;
l61374: ;
_61376 = p_61376;
_61382 = blockDim_y();
p_61382 = _61382;
l61380: ;
_61382 = p_61382;
_61388 = blockIdx_y();
p_61388 = _61388;
l61386: ;
_61388 = p_61388;
_61391 = blockDim_y();
p_61391 = _61391;
l61389: ;
_61391 = p_61391;
int _61393;
_61393 = blockDim_x_61364 * blockIdx_x_61370;
int _61394;
_61394 = threadIdx_x_61358 + _61393;
int _61395;
_61395 = -2 + _61394;
bool _61397;
_61397 = _61395 < 0;
if (_61397) goto l61398; else goto l61554;
l61554: ;
pconverge_61400 = _61395;
goto l61399;
l61398: ;
pconverge_61400 = 0;
goto l61399;
l61399: ;
converge_61400 = pconverge_61400;
bool _61402;
_61402 = 4096 <= converge_61400;
if (_61402) goto l61403; else goto l61553;
l61553: ;
pconverge_61405 = converge_61400;
goto l61404;
l61403: ;
pconverge_61405 = 4095;
goto l61404;
l61404: ;
converge_61405 = pconverge_61405;
int _61406;
_61406 = _61382 * _61388;
int gid_y_61407;
gid_y_61407 = _61376 + _61406;
bool _61408;
_61408 = gid_y_61407 < 0;
if (_61408) goto l61409; else goto l61552;
l61552: ;
pconverge_61411 = gid_y_61407;
goto l61410;
l61409: ;
pconverge_61411 = 0;
goto l61410;
l61410: ;
converge_61411 = pconverge_61411;
bool _61412;
_61412 = 4096 <= converge_61411;
if (_61412) goto l61413; else goto l61551;
l61551: ;
pconverge_61415 = converge_61411;
goto l61414;
l61413: ;
pconverge_61415 = 4095;
goto l61414;
l61414: ;
converge_61415 = pconverge_61415;
int _61420;
_61420 = 4096 * converge_61415;
int _61421;
_61421 = _61420 + converge_61405;
float* idx_61422;
idx_61422 = _56190_61351 + _61421;
_61425 = __ldg(idx_61422);
p_61425 = _61425;
l61423: ;
_61425 = p_61425;
int _61427;
_61427 = -1 + _61394;
bool _61428;
_61428 = _61427 < 0;
if (_61428) goto l61429; else goto l61550;
l61550: ;
pconverge_61431 = _61427;
goto l61430;
l61429: ;
pconverge_61431 = 0;
goto l61430;
l61430: ;
converge_61431 = pconverge_61431;
bool _61432;
_61432 = 4096 <= converge_61431;
if (_61432) goto l61433; else goto l61549;
l61549: ;
pconverge_61435 = converge_61431;
goto l61434;
l61433: ;
pconverge_61435 = 4095;
goto l61434;
l61434: ;
converge_61435 = pconverge_61435;
if (_61408) goto l61436; else goto l61548;
l61548: ;
pconverge_61438 = gid_y_61407;
goto l61437;
l61436: ;
pconverge_61438 = 0;
goto l61437;
l61437: ;
converge_61438 = pconverge_61438;
bool _61439;
_61439 = 4096 <= converge_61438;
if (_61439) goto l61440; else goto l61547;
l61547: ;
pconverge_61442 = converge_61438;
goto l61441;
l61440: ;
pconverge_61442 = 4095;
goto l61441;
l61441: ;
converge_61442 = pconverge_61442;
int _61443;
_61443 = 4096 * converge_61442;
int _61444;
_61444 = _61443 + converge_61435;
float* idx_61445;
idx_61445 = _56190_61351 + _61444;
_61448 = __ldg(idx_61445);
p_61448 = _61448;
l61446: ;
_61448 = p_61448;
bool _61449;
_61449 = _61394 < 0;
if (_61449) goto l61450; else goto l61546;
l61546: ;
pconverge_61452 = _61394;
goto l61451;
l61450: ;
pconverge_61452 = 0;
goto l61451;
l61451: ;
converge_61452 = pconverge_61452;
bool _61453;
_61453 = 4096 <= converge_61452;
if (_61453) goto l61454; else goto l61545;
l61545: ;
pconverge_61456 = converge_61452;
goto l61455;
l61454: ;
pconverge_61456 = 4095;
goto l61455;
l61455: ;
converge_61456 = pconverge_61456;
if (_61408) goto l61457; else goto l61544;
l61544: ;
pconverge_61459 = gid_y_61407;
goto l61458;
l61457: ;
pconverge_61459 = 0;
goto l61458;
l61458: ;
converge_61459 = pconverge_61459;
bool _61460;
_61460 = 4096 <= converge_61459;
if (_61460) goto l61461; else goto l61543;
l61543: ;
pconverge_61463 = converge_61459;
goto l61462;
l61461: ;
pconverge_61463 = 4095;
goto l61462;
l61462: ;
converge_61463 = pconverge_61463;
int _61464;
_61464 = 4096 * converge_61463;
int _61465;
_61465 = _61464 + converge_61456;
float* idx_61466;
idx_61466 = _56190_61351 + _61465;
_61469 = __ldg(idx_61466);
p_61469 = _61469;
l61467: ;
_61469 = p_61469;
int _61471;
_61471 = 1 + _61394;
bool _61472;
_61472 = _61471 < 0;
if (_61472) goto l61473; else goto l61542;
l61542: ;
pconverge_61475 = _61471;
goto l61474;
l61473: ;
pconverge_61475 = 0;
goto l61474;
l61474: ;
converge_61475 = pconverge_61475;
bool _61476;
_61476 = 4096 <= converge_61475;
if (_61476) goto l61477; else goto l61541;
l61541: ;
pconverge_61479 = converge_61475;
goto l61478;
l61477: ;
pconverge_61479 = 4095;
goto l61478;
l61478: ;
converge_61479 = pconverge_61479;
if (_61408) goto l61480; else goto l61540;
l61540: ;
pconverge_61482 = gid_y_61407;
goto l61481;
l61480: ;
pconverge_61482 = 0;
goto l61481;
l61481: ;
converge_61482 = pconverge_61482;
bool _61483;
_61483 = 4096 <= converge_61482;
if (_61483) goto l61484; else goto l61539;
l61539: ;
pconverge_61486 = converge_61482;
goto l61485;
l61484: ;
pconverge_61486 = 4095;
goto l61485;
l61485: ;
converge_61486 = pconverge_61486;
int _61487;
_61487 = 4096 * converge_61486;
int _61488;
_61488 = _61487 + converge_61479;
float* idx_61489;
idx_61489 = _56190_61351 + _61488;
_61492 = __ldg(idx_61489);
p_61492 = _61492;
l61490: ;
_61492 = p_61492;
int _61494;
_61494 = 2 + _61394;
bool _61495;
_61495 = _61494 < 0;
if (_61495) goto l61496; else goto l61538;
l61538: ;
pconverge_61498 = _61494;
goto l61497;
l61496: ;
pconverge_61498 = 0;
goto l61497;
l61497: ;
converge_61498 = pconverge_61498;
bool _61499;
_61499 = 4096 <= converge_61498;
if (_61499) goto l61500; else goto l61537;
l61537: ;
pconverge_61502 = converge_61498;
goto l61501;
l61500: ;
pconverge_61502 = 4095;
goto l61501;
l61501: ;
converge_61502 = pconverge_61502;
if (_61408) goto l61503; else goto l61536;
l61536: ;
pconverge_61505 = gid_y_61407;
goto l61504;
l61503: ;
pconverge_61505 = 0;
goto l61504;
l61504: ;
converge_61505 = pconverge_61505;
bool _61506;
_61506 = 4096 <= converge_61505;
if (_61506) goto l61507; else goto l61535;
l61535: ;
pconverge_61509 = converge_61505;
goto l61508;
l61507: ;
pconverge_61509 = 4095;
goto l61508;
l61508: ;
converge_61509 = pconverge_61509;
int _61510;
_61510 = 4096 * converge_61509;
int _61511;
_61511 = _61510 + converge_61502;
float* idx_61512;
idx_61512 = _56190_61351 + _61511;
_61515 = __ldg(idx_61512);
p_61515 = _61515;
l61513: ;
_61515 = p_61515;
int _61516;
_61516 = 4096 * gid_y_61407;
float _61524;
_61524 = 2.444600e-01f * _61448;
float _61521;
_61521 = 7.076600e-02f * _61425;
float _61531;
_61531 = 7.076600e-02f * _61515;
float _61529;
_61529 = 2.444600e-01f * _61492;
float _61522;
_61522 = 0.000000e+00f + _61521;
float _61525;
_61525 = _61522 + _61524;
float _61527;
_61527 = 3.695460e-01f * _61469;
int _61517;
_61517 = _61516 + _61394;
float _61528;
_61528 = _61525 + _61527;
float* idx_61518;
idx_61518 = _56191_61352 + _61517;
float _61530;
_61530 = _61528 + _61529;
float _61532;
_61532 = _61530 + _61531;
*idx_61518 = _61532;
return ;
}
__global__ __launch_bounds__ (32 * 4 * 1) void lambda_55652(float* _55655_61558, float* _55656_61559) {
int threadIdx_x_61562;
int pthreadIdx_x_61562;
int blockDim_x_61565;
int pblockDim_x_61565;
int blockIdx_x_61568;
int pblockIdx_x_61568;
int _61571;
int p_61571;
int _61574;
int p_61574;
int _61577;
int p_61577;
int _61580;
int p_61580;
int converge_61586;
int pconverge_61586;
int converge_61590;
int pconverge_61590;
int converge_61597;
int pconverge_61597;
int converge_61601;
int pconverge_61601;
float _61607;
float p_61607;
int converge_61610;
int pconverge_61610;
int converge_61614;
int pconverge_61614;
int converge_61619;
int pconverge_61619;
int converge_61623;
int pconverge_61623;
float _61629;
float p_61629;
int converge_61632;
int pconverge_61632;
int converge_61636;
int pconverge_61636;
int converge_61640;
int pconverge_61640;
int converge_61644;
int pconverge_61644;
float _61650;
float p_61650;
int converge_61653;
int pconverge_61653;
int converge_61657;
int pconverge_61657;
int converge_61662;
int pconverge_61662;
int converge_61666;
int pconverge_61666;
float _61672;
float p_61672;
int converge_61675;
int pconverge_61675;
int converge_61679;
int pconverge_61679;
int converge_61684;
int pconverge_61684;
int converge_61688;
int pconverge_61688;
float _61694;
float p_61694;
threadIdx_x_61562 = threadIdx_x();
pthreadIdx_x_61562 = threadIdx_x_61562;
l61560: ;
threadIdx_x_61562 = pthreadIdx_x_61562;
blockDim_x_61565 = blockDim_x();
pblockDim_x_61565 = blockDim_x_61565;
l61563: ;
blockDim_x_61565 = pblockDim_x_61565;
blockIdx_x_61568 = blockIdx_x();
pblockIdx_x_61568 = blockIdx_x_61568;
l61566: ;
blockIdx_x_61568 = pblockIdx_x_61568;
_61571 = threadIdx_y();
p_61571 = _61571;
l61569: ;
_61571 = p_61571;
_61574 = blockDim_y();
p_61574 = _61574;
l61572: ;
_61574 = p_61574;
_61577 = blockIdx_y();
p_61577 = _61577;
l61575: ;
_61577 = p_61577;
_61580 = blockDim_y();
p_61580 = _61580;
l61578: ;
_61580 = p_61580;
int _61581;
_61581 = blockDim_x_61565 * blockIdx_x_61568;
int _61582;
_61582 = threadIdx_x_61562 + _61581;
bool _61583;
_61583 = _61582 < 0;
if (_61583) goto l61584; else goto l61728;
l61728: ;
pconverge_61586 = _61582;
goto l61585;
l61584: ;
pconverge_61586 = 0;
goto l61585;
l61585: ;
converge_61586 = pconverge_61586;
bool _61587;
_61587 = 4096 <= converge_61586;
if (_61587) goto l61588; else goto l61727;
l61727: ;
pconverge_61590 = converge_61586;
goto l61589;
l61588: ;
pconverge_61590 = 4095;
goto l61589;
l61589: ;
converge_61590 = pconverge_61590;
int _61591;
_61591 = _61574 * _61577;
int gid_y_61592;
gid_y_61592 = _61571 + _61591;
int _61593;
_61593 = -2 + gid_y_61592;
bool _61594;
_61594 = _61593 < 0;
if (_61594) goto l61595; else goto l61726;
l61726: ;
pconverge_61597 = _61593;
goto l61596;
l61595: ;
pconverge_61597 = 0;
goto l61596;
l61596: ;
converge_61597 = pconverge_61597;
bool _61598;
_61598 = 4096 <= converge_61597;
if (_61598) goto l61599; else goto l61725;
l61725: ;
pconverge_61601 = converge_61597;
goto l61600;
l61599: ;
pconverge_61601 = 4095;
goto l61600;
l61600: ;
converge_61601 = pconverge_61601;
int _61602;
_61602 = 4096 * converge_61601;
int _61603;
_61603 = _61602 + converge_61590;
float* idx_61604;
idx_61604 = _55655_61558 + _61603;
_61607 = __ldg(idx_61604);
p_61607 = _61607;
l61605: ;
_61607 = p_61607;
if (_61583) goto l61608; else goto l61724;
l61724: ;
pconverge_61610 = _61582;
goto l61609;
l61608: ;
pconverge_61610 = 0;
goto l61609;
l61609: ;
converge_61610 = pconverge_61610;
bool _61611;
_61611 = 4096 <= converge_61610;
if (_61611) goto l61612; else goto l61723;
l61723: ;
pconverge_61614 = converge_61610;
goto l61613;
l61612: ;
pconverge_61614 = 4095;
goto l61613;
l61613: ;
converge_61614 = pconverge_61614;
int _61615;
_61615 = -1 + gid_y_61592;
bool _61616;
_61616 = _61615 < 0;
if (_61616) goto l61617; else goto l61722;
l61722: ;
pconverge_61619 = _61615;
goto l61618;
l61617: ;
pconverge_61619 = 0;
goto l61618;
l61618: ;
converge_61619 = pconverge_61619;
bool _61620;
_61620 = 4096 <= converge_61619;
if (_61620) goto l61621; else goto l61721;
l61721: ;
pconverge_61623 = converge_61619;
goto l61622;
l61621: ;
pconverge_61623 = 4095;
goto l61622;
l61622: ;
converge_61623 = pconverge_61623;
int _61624;
_61624 = 4096 * converge_61623;
int _61625;
_61625 = _61624 + converge_61614;
float* idx_61626;
idx_61626 = _55655_61558 + _61625;
_61629 = __ldg(idx_61626);
p_61629 = _61629;
l61627: ;
_61629 = p_61629;
if (_61583) goto l61630; else goto l61720;
l61720: ;
pconverge_61632 = _61582;
goto l61631;
l61630: ;
pconverge_61632 = 0;
goto l61631;
l61631: ;
converge_61632 = pconverge_61632;
bool _61633;
_61633 = 4096 <= converge_61632;
if (_61633) goto l61634; else goto l61719;
l61719: ;
pconverge_61636 = converge_61632;
goto l61635;
l61634: ;
pconverge_61636 = 4095;
goto l61635;
l61635: ;
converge_61636 = pconverge_61636;
bool _61637;
_61637 = gid_y_61592 < 0;
if (_61637) goto l61638; else goto l61718;
l61718: ;
pconverge_61640 = gid_y_61592;
goto l61639;
l61638: ;
pconverge_61640 = 0;
goto l61639;
l61639: ;
converge_61640 = pconverge_61640;
bool _61641;
_61641 = 4096 <= converge_61640;
if (_61641) goto l61642; else goto l61717;
l61717: ;
pconverge_61644 = converge_61640;
goto l61643;
l61642: ;
pconverge_61644 = 4095;
goto l61643;
l61643: ;
converge_61644 = pconverge_61644;
int _61645;
_61645 = 4096 * converge_61644;
int _61646;
_61646 = _61645 + converge_61636;
float* idx_61647;
idx_61647 = _55655_61558 + _61646;
_61650 = __ldg(idx_61647);
p_61650 = _61650;
l61648: ;
_61650 = p_61650;
if (_61583) goto l61651; else goto l61716;
l61716: ;
pconverge_61653 = _61582;
goto l61652;
l61651: ;
pconverge_61653 = 0;
goto l61652;
l61652: ;
converge_61653 = pconverge_61653;
bool _61654;
_61654 = 4096 <= converge_61653;
if (_61654) goto l61655; else goto l61715;
l61715: ;
pconverge_61657 = converge_61653;
goto l61656;
l61655: ;
pconverge_61657 = 4095;
goto l61656;
l61656: ;
converge_61657 = pconverge_61657;
int _61658;
_61658 = 1 + gid_y_61592;
bool _61659;
_61659 = _61658 < 0;
if (_61659) goto l61660; else goto l61714;
l61714: ;
pconverge_61662 = _61658;
goto l61661;
l61660: ;
pconverge_61662 = 0;
goto l61661;
l61661: ;
converge_61662 = pconverge_61662;
bool _61663;
_61663 = 4096 <= converge_61662;
if (_61663) goto l61664; else goto l61713;
l61713: ;
pconverge_61666 = converge_61662;
goto l61665;
l61664: ;
pconverge_61666 = 4095;
goto l61665;
l61665: ;
converge_61666 = pconverge_61666;
int _61667;
_61667 = 4096 * converge_61666;
int _61668;
_61668 = _61667 + converge_61657;
float* idx_61669;
idx_61669 = _55655_61558 + _61668;
_61672 = __ldg(idx_61669);
p_61672 = _61672;
l61670: ;
_61672 = p_61672;
if (_61583) goto l61673; else goto l61712;
l61712: ;
pconverge_61675 = _61582;
goto l61674;
l61673: ;
pconverge_61675 = 0;
goto l61674;
l61674: ;
converge_61675 = pconverge_61675;
bool _61676;
_61676 = 4096 <= converge_61675;
if (_61676) goto l61677; else goto l61711;
l61711: ;
pconverge_61679 = converge_61675;
goto l61678;
l61677: ;
pconverge_61679 = 4095;
goto l61678;
l61678: ;
converge_61679 = pconverge_61679;
int _61680;
_61680 = 2 + gid_y_61592;
bool _61681;
_61681 = _61680 < 0;
if (_61681) goto l61682; else goto l61710;
l61710: ;
pconverge_61684 = _61680;
goto l61683;
l61682: ;
pconverge_61684 = 0;
goto l61683;
l61683: ;
converge_61684 = pconverge_61684;
bool _61685;
_61685 = 4096 <= converge_61684;
if (_61685) goto l61686; else goto l61709;
l61709: ;
pconverge_61688 = converge_61684;
goto l61687;
l61686: ;
pconverge_61688 = 4095;
goto l61687;
l61687: ;
converge_61688 = pconverge_61688;
int _61689;
_61689 = 4096 * converge_61688;
int _61690;
_61690 = _61689 + converge_61679;
float* idx_61691;
idx_61691 = _55655_61558 + _61690;
_61694 = __ldg(idx_61691);
p_61694 = _61694;
l61692: ;
_61694 = p_61694;
float _61700;
_61700 = 2.444600e-01f * _61629;
float _61706;
_61706 = 7.076600e-02f * _61694;
int _61695;
_61695 = 4096 * gid_y_61592;
float _61704;
_61704 = 2.444600e-01f * _61672;
float _61702;
_61702 = 3.695460e-01f * _61650;
float _61698;
_61698 = 7.076600e-02f * _61607;
int _61696;
_61696 = _61695 + _61582;
float _61699;
_61699 = 0.000000e+00f + _61698;
float* idx_61697;
idx_61697 = _55656_61559 + _61696;
float _61701;
_61701 = _61699 + _61700;
float _61703;
_61703 = _61701 + _61702;
float _61705;
_61705 = _61703 + _61704;
float _61707;
_61707 = _61705 + _61706;
*idx_61697 = _61707;
return ;
}
} | #include <hip/hip_runtime.h>
extern "C" {
__device__ inline int threadIdx_x() { return threadIdx.x; }
__device__ inline int threadIdx_y() { return threadIdx.y; }
__device__ inline int threadIdx_z() { return threadIdx.z; }
__device__ inline int blockIdx_x() { return blockIdx.x; }
__device__ inline int blockIdx_y() { return blockIdx.y; }
__device__ inline int blockIdx_z() { return blockIdx.z; }
__device__ inline int blockDim_x() { return blockDim.x; }
__device__ inline int blockDim_y() { return blockDim.y; }
__device__ inline int blockDim_z() { return blockDim.z; }
__device__ inline int gridDim_x() { return gridDim.x; }
__device__ inline int gridDim_y() { return gridDim.y; }
__device__ inline int gridDim_z() { return gridDim.z; }
__global__ void lambda_56187(float*, float*);
__global__ void lambda_55652(float*, float*);
__global__ __launch_bounds__ (128 * 1 * 1) void lambda_56187(float* _56190_61351, float* _56191_61352) {
int threadIdx_x_61358;
int pthreadIdx_x_61358;
int blockDim_x_61364;
int pblockDim_x_61364;
int blockIdx_x_61370;
int pblockIdx_x_61370;
int _61376;
int p_61376;
int _61382;
int p_61382;
int _61388;
int p_61388;
int _61391;
int p_61391;
int converge_61400;
int pconverge_61400;
int converge_61405;
int pconverge_61405;
int converge_61411;
int pconverge_61411;
int converge_61415;
int pconverge_61415;
float _61425;
float p_61425;
int converge_61431;
int pconverge_61431;
int converge_61435;
int pconverge_61435;
int converge_61438;
int pconverge_61438;
int converge_61442;
int pconverge_61442;
float _61448;
float p_61448;
int converge_61452;
int pconverge_61452;
int converge_61456;
int pconverge_61456;
int converge_61459;
int pconverge_61459;
int converge_61463;
int pconverge_61463;
float _61469;
float p_61469;
int converge_61475;
int pconverge_61475;
int converge_61479;
int pconverge_61479;
int converge_61482;
int pconverge_61482;
int converge_61486;
int pconverge_61486;
float _61492;
float p_61492;
int converge_61498;
int pconverge_61498;
int converge_61502;
int pconverge_61502;
int converge_61505;
int pconverge_61505;
int converge_61509;
int pconverge_61509;
float _61515;
float p_61515;
threadIdx_x_61358 = threadIdx_x();
pthreadIdx_x_61358 = threadIdx_x_61358;
l61356: ;
threadIdx_x_61358 = pthreadIdx_x_61358;
blockDim_x_61364 = blockDim_x();
pblockDim_x_61364 = blockDim_x_61364;
l61362: ;
blockDim_x_61364 = pblockDim_x_61364;
blockIdx_x_61370 = blockIdx_x();
pblockIdx_x_61370 = blockIdx_x_61370;
l61368: ;
blockIdx_x_61370 = pblockIdx_x_61370;
_61376 = threadIdx_y();
p_61376 = _61376;
l61374: ;
_61376 = p_61376;
_61382 = blockDim_y();
p_61382 = _61382;
l61380: ;
_61382 = p_61382;
_61388 = blockIdx_y();
p_61388 = _61388;
l61386: ;
_61388 = p_61388;
_61391 = blockDim_y();
p_61391 = _61391;
l61389: ;
_61391 = p_61391;
int _61393;
_61393 = blockDim_x_61364 * blockIdx_x_61370;
int _61394;
_61394 = threadIdx_x_61358 + _61393;
int _61395;
_61395 = -2 + _61394;
bool _61397;
_61397 = _61395 < 0;
if (_61397) goto l61398; else goto l61554;
l61554: ;
pconverge_61400 = _61395;
goto l61399;
l61398: ;
pconverge_61400 = 0;
goto l61399;
l61399: ;
converge_61400 = pconverge_61400;
bool _61402;
_61402 = 4096 <= converge_61400;
if (_61402) goto l61403; else goto l61553;
l61553: ;
pconverge_61405 = converge_61400;
goto l61404;
l61403: ;
pconverge_61405 = 4095;
goto l61404;
l61404: ;
converge_61405 = pconverge_61405;
int _61406;
_61406 = _61382 * _61388;
int gid_y_61407;
gid_y_61407 = _61376 + _61406;
bool _61408;
_61408 = gid_y_61407 < 0;
if (_61408) goto l61409; else goto l61552;
l61552: ;
pconverge_61411 = gid_y_61407;
goto l61410;
l61409: ;
pconverge_61411 = 0;
goto l61410;
l61410: ;
converge_61411 = pconverge_61411;
bool _61412;
_61412 = 4096 <= converge_61411;
if (_61412) goto l61413; else goto l61551;
l61551: ;
pconverge_61415 = converge_61411;
goto l61414;
l61413: ;
pconverge_61415 = 4095;
goto l61414;
l61414: ;
converge_61415 = pconverge_61415;
int _61420;
_61420 = 4096 * converge_61415;
int _61421;
_61421 = _61420 + converge_61405;
float* idx_61422;
idx_61422 = _56190_61351 + _61421;
_61425 = __ldg(idx_61422);
p_61425 = _61425;
l61423: ;
_61425 = p_61425;
int _61427;
_61427 = -1 + _61394;
bool _61428;
_61428 = _61427 < 0;
if (_61428) goto l61429; else goto l61550;
l61550: ;
pconverge_61431 = _61427;
goto l61430;
l61429: ;
pconverge_61431 = 0;
goto l61430;
l61430: ;
converge_61431 = pconverge_61431;
bool _61432;
_61432 = 4096 <= converge_61431;
if (_61432) goto l61433; else goto l61549;
l61549: ;
pconverge_61435 = converge_61431;
goto l61434;
l61433: ;
pconverge_61435 = 4095;
goto l61434;
l61434: ;
converge_61435 = pconverge_61435;
if (_61408) goto l61436; else goto l61548;
l61548: ;
pconverge_61438 = gid_y_61407;
goto l61437;
l61436: ;
pconverge_61438 = 0;
goto l61437;
l61437: ;
converge_61438 = pconverge_61438;
bool _61439;
_61439 = 4096 <= converge_61438;
if (_61439) goto l61440; else goto l61547;
l61547: ;
pconverge_61442 = converge_61438;
goto l61441;
l61440: ;
pconverge_61442 = 4095;
goto l61441;
l61441: ;
converge_61442 = pconverge_61442;
int _61443;
_61443 = 4096 * converge_61442;
int _61444;
_61444 = _61443 + converge_61435;
float* idx_61445;
idx_61445 = _56190_61351 + _61444;
_61448 = __ldg(idx_61445);
p_61448 = _61448;
l61446: ;
_61448 = p_61448;
bool _61449;
_61449 = _61394 < 0;
if (_61449) goto l61450; else goto l61546;
l61546: ;
pconverge_61452 = _61394;
goto l61451;
l61450: ;
pconverge_61452 = 0;
goto l61451;
l61451: ;
converge_61452 = pconverge_61452;
bool _61453;
_61453 = 4096 <= converge_61452;
if (_61453) goto l61454; else goto l61545;
l61545: ;
pconverge_61456 = converge_61452;
goto l61455;
l61454: ;
pconverge_61456 = 4095;
goto l61455;
l61455: ;
converge_61456 = pconverge_61456;
if (_61408) goto l61457; else goto l61544;
l61544: ;
pconverge_61459 = gid_y_61407;
goto l61458;
l61457: ;
pconverge_61459 = 0;
goto l61458;
l61458: ;
converge_61459 = pconverge_61459;
bool _61460;
_61460 = 4096 <= converge_61459;
if (_61460) goto l61461; else goto l61543;
l61543: ;
pconverge_61463 = converge_61459;
goto l61462;
l61461: ;
pconverge_61463 = 4095;
goto l61462;
l61462: ;
converge_61463 = pconverge_61463;
int _61464;
_61464 = 4096 * converge_61463;
int _61465;
_61465 = _61464 + converge_61456;
float* idx_61466;
idx_61466 = _56190_61351 + _61465;
_61469 = __ldg(idx_61466);
p_61469 = _61469;
l61467: ;
_61469 = p_61469;
int _61471;
_61471 = 1 + _61394;
bool _61472;
_61472 = _61471 < 0;
if (_61472) goto l61473; else goto l61542;
l61542: ;
pconverge_61475 = _61471;
goto l61474;
l61473: ;
pconverge_61475 = 0;
goto l61474;
l61474: ;
converge_61475 = pconverge_61475;
bool _61476;
_61476 = 4096 <= converge_61475;
if (_61476) goto l61477; else goto l61541;
l61541: ;
pconverge_61479 = converge_61475;
goto l61478;
l61477: ;
pconverge_61479 = 4095;
goto l61478;
l61478: ;
converge_61479 = pconverge_61479;
if (_61408) goto l61480; else goto l61540;
l61540: ;
pconverge_61482 = gid_y_61407;
goto l61481;
l61480: ;
pconverge_61482 = 0;
goto l61481;
l61481: ;
converge_61482 = pconverge_61482;
bool _61483;
_61483 = 4096 <= converge_61482;
if (_61483) goto l61484; else goto l61539;
l61539: ;
pconverge_61486 = converge_61482;
goto l61485;
l61484: ;
pconverge_61486 = 4095;
goto l61485;
l61485: ;
converge_61486 = pconverge_61486;
int _61487;
_61487 = 4096 * converge_61486;
int _61488;
_61488 = _61487 + converge_61479;
float* idx_61489;
idx_61489 = _56190_61351 + _61488;
_61492 = __ldg(idx_61489);
p_61492 = _61492;
l61490: ;
_61492 = p_61492;
int _61494;
_61494 = 2 + _61394;
bool _61495;
_61495 = _61494 < 0;
if (_61495) goto l61496; else goto l61538;
l61538: ;
pconverge_61498 = _61494;
goto l61497;
l61496: ;
pconverge_61498 = 0;
goto l61497;
l61497: ;
converge_61498 = pconverge_61498;
bool _61499;
_61499 = 4096 <= converge_61498;
if (_61499) goto l61500; else goto l61537;
l61537: ;
pconverge_61502 = converge_61498;
goto l61501;
l61500: ;
pconverge_61502 = 4095;
goto l61501;
l61501: ;
converge_61502 = pconverge_61502;
if (_61408) goto l61503; else goto l61536;
l61536: ;
pconverge_61505 = gid_y_61407;
goto l61504;
l61503: ;
pconverge_61505 = 0;
goto l61504;
l61504: ;
converge_61505 = pconverge_61505;
bool _61506;
_61506 = 4096 <= converge_61505;
if (_61506) goto l61507; else goto l61535;
l61535: ;
pconverge_61509 = converge_61505;
goto l61508;
l61507: ;
pconverge_61509 = 4095;
goto l61508;
l61508: ;
converge_61509 = pconverge_61509;
int _61510;
_61510 = 4096 * converge_61509;
int _61511;
_61511 = _61510 + converge_61502;
float* idx_61512;
idx_61512 = _56190_61351 + _61511;
_61515 = __ldg(idx_61512);
p_61515 = _61515;
l61513: ;
_61515 = p_61515;
int _61516;
_61516 = 4096 * gid_y_61407;
float _61524;
_61524 = 2.444600e-01f * _61448;
float _61521;
_61521 = 7.076600e-02f * _61425;
float _61531;
_61531 = 7.076600e-02f * _61515;
float _61529;
_61529 = 2.444600e-01f * _61492;
float _61522;
_61522 = 0.000000e+00f + _61521;
float _61525;
_61525 = _61522 + _61524;
float _61527;
_61527 = 3.695460e-01f * _61469;
int _61517;
_61517 = _61516 + _61394;
float _61528;
_61528 = _61525 + _61527;
float* idx_61518;
idx_61518 = _56191_61352 + _61517;
float _61530;
_61530 = _61528 + _61529;
float _61532;
_61532 = _61530 + _61531;
*idx_61518 = _61532;
return ;
}
__global__ __launch_bounds__ (32 * 4 * 1) void lambda_55652(float* _55655_61558, float* _55656_61559) {
int threadIdx_x_61562;
int pthreadIdx_x_61562;
int blockDim_x_61565;
int pblockDim_x_61565;
int blockIdx_x_61568;
int pblockIdx_x_61568;
int _61571;
int p_61571;
int _61574;
int p_61574;
int _61577;
int p_61577;
int _61580;
int p_61580;
int converge_61586;
int pconverge_61586;
int converge_61590;
int pconverge_61590;
int converge_61597;
int pconverge_61597;
int converge_61601;
int pconverge_61601;
float _61607;
float p_61607;
int converge_61610;
int pconverge_61610;
int converge_61614;
int pconverge_61614;
int converge_61619;
int pconverge_61619;
int converge_61623;
int pconverge_61623;
float _61629;
float p_61629;
int converge_61632;
int pconverge_61632;
int converge_61636;
int pconverge_61636;
int converge_61640;
int pconverge_61640;
int converge_61644;
int pconverge_61644;
float _61650;
float p_61650;
int converge_61653;
int pconverge_61653;
int converge_61657;
int pconverge_61657;
int converge_61662;
int pconverge_61662;
int converge_61666;
int pconverge_61666;
float _61672;
float p_61672;
int converge_61675;
int pconverge_61675;
int converge_61679;
int pconverge_61679;
int converge_61684;
int pconverge_61684;
int converge_61688;
int pconverge_61688;
float _61694;
float p_61694;
threadIdx_x_61562 = threadIdx_x();
pthreadIdx_x_61562 = threadIdx_x_61562;
l61560: ;
threadIdx_x_61562 = pthreadIdx_x_61562;
blockDim_x_61565 = blockDim_x();
pblockDim_x_61565 = blockDim_x_61565;
l61563: ;
blockDim_x_61565 = pblockDim_x_61565;
blockIdx_x_61568 = blockIdx_x();
pblockIdx_x_61568 = blockIdx_x_61568;
l61566: ;
blockIdx_x_61568 = pblockIdx_x_61568;
_61571 = threadIdx_y();
p_61571 = _61571;
l61569: ;
_61571 = p_61571;
_61574 = blockDim_y();
p_61574 = _61574;
l61572: ;
_61574 = p_61574;
_61577 = blockIdx_y();
p_61577 = _61577;
l61575: ;
_61577 = p_61577;
_61580 = blockDim_y();
p_61580 = _61580;
l61578: ;
_61580 = p_61580;
int _61581;
_61581 = blockDim_x_61565 * blockIdx_x_61568;
int _61582;
_61582 = threadIdx_x_61562 + _61581;
bool _61583;
_61583 = _61582 < 0;
if (_61583) goto l61584; else goto l61728;
l61728: ;
pconverge_61586 = _61582;
goto l61585;
l61584: ;
pconverge_61586 = 0;
goto l61585;
l61585: ;
converge_61586 = pconverge_61586;
bool _61587;
_61587 = 4096 <= converge_61586;
if (_61587) goto l61588; else goto l61727;
l61727: ;
pconverge_61590 = converge_61586;
goto l61589;
l61588: ;
pconverge_61590 = 4095;
goto l61589;
l61589: ;
converge_61590 = pconverge_61590;
int _61591;
_61591 = _61574 * _61577;
int gid_y_61592;
gid_y_61592 = _61571 + _61591;
int _61593;
_61593 = -2 + gid_y_61592;
bool _61594;
_61594 = _61593 < 0;
if (_61594) goto l61595; else goto l61726;
l61726: ;
pconverge_61597 = _61593;
goto l61596;
l61595: ;
pconverge_61597 = 0;
goto l61596;
l61596: ;
converge_61597 = pconverge_61597;
bool _61598;
_61598 = 4096 <= converge_61597;
if (_61598) goto l61599; else goto l61725;
l61725: ;
pconverge_61601 = converge_61597;
goto l61600;
l61599: ;
pconverge_61601 = 4095;
goto l61600;
l61600: ;
converge_61601 = pconverge_61601;
int _61602;
_61602 = 4096 * converge_61601;
int _61603;
_61603 = _61602 + converge_61590;
float* idx_61604;
idx_61604 = _55655_61558 + _61603;
_61607 = __ldg(idx_61604);
p_61607 = _61607;
l61605: ;
_61607 = p_61607;
if (_61583) goto l61608; else goto l61724;
l61724: ;
pconverge_61610 = _61582;
goto l61609;
l61608: ;
pconverge_61610 = 0;
goto l61609;
l61609: ;
converge_61610 = pconverge_61610;
bool _61611;
_61611 = 4096 <= converge_61610;
if (_61611) goto l61612; else goto l61723;
l61723: ;
pconverge_61614 = converge_61610;
goto l61613;
l61612: ;
pconverge_61614 = 4095;
goto l61613;
l61613: ;
converge_61614 = pconverge_61614;
int _61615;
_61615 = -1 + gid_y_61592;
bool _61616;
_61616 = _61615 < 0;
if (_61616) goto l61617; else goto l61722;
l61722: ;
pconverge_61619 = _61615;
goto l61618;
l61617: ;
pconverge_61619 = 0;
goto l61618;
l61618: ;
converge_61619 = pconverge_61619;
bool _61620;
_61620 = 4096 <= converge_61619;
if (_61620) goto l61621; else goto l61721;
l61721: ;
pconverge_61623 = converge_61619;
goto l61622;
l61621: ;
pconverge_61623 = 4095;
goto l61622;
l61622: ;
converge_61623 = pconverge_61623;
int _61624;
_61624 = 4096 * converge_61623;
int _61625;
_61625 = _61624 + converge_61614;
float* idx_61626;
idx_61626 = _55655_61558 + _61625;
_61629 = __ldg(idx_61626);
p_61629 = _61629;
l61627: ;
_61629 = p_61629;
if (_61583) goto l61630; else goto l61720;
l61720: ;
pconverge_61632 = _61582;
goto l61631;
l61630: ;
pconverge_61632 = 0;
goto l61631;
l61631: ;
converge_61632 = pconverge_61632;
bool _61633;
_61633 = 4096 <= converge_61632;
if (_61633) goto l61634; else goto l61719;
l61719: ;
pconverge_61636 = converge_61632;
goto l61635;
l61634: ;
pconverge_61636 = 4095;
goto l61635;
l61635: ;
converge_61636 = pconverge_61636;
bool _61637;
_61637 = gid_y_61592 < 0;
if (_61637) goto l61638; else goto l61718;
l61718: ;
pconverge_61640 = gid_y_61592;
goto l61639;
l61638: ;
pconverge_61640 = 0;
goto l61639;
l61639: ;
converge_61640 = pconverge_61640;
bool _61641;
_61641 = 4096 <= converge_61640;
if (_61641) goto l61642; else goto l61717;
l61717: ;
pconverge_61644 = converge_61640;
goto l61643;
l61642: ;
pconverge_61644 = 4095;
goto l61643;
l61643: ;
converge_61644 = pconverge_61644;
int _61645;
_61645 = 4096 * converge_61644;
int _61646;
_61646 = _61645 + converge_61636;
float* idx_61647;
idx_61647 = _55655_61558 + _61646;
_61650 = __ldg(idx_61647);
p_61650 = _61650;
l61648: ;
_61650 = p_61650;
if (_61583) goto l61651; else goto l61716;
l61716: ;
pconverge_61653 = _61582;
goto l61652;
l61651: ;
pconverge_61653 = 0;
goto l61652;
l61652: ;
converge_61653 = pconverge_61653;
bool _61654;
_61654 = 4096 <= converge_61653;
if (_61654) goto l61655; else goto l61715;
l61715: ;
pconverge_61657 = converge_61653;
goto l61656;
l61655: ;
pconverge_61657 = 4095;
goto l61656;
l61656: ;
converge_61657 = pconverge_61657;
int _61658;
_61658 = 1 + gid_y_61592;
bool _61659;
_61659 = _61658 < 0;
if (_61659) goto l61660; else goto l61714;
l61714: ;
pconverge_61662 = _61658;
goto l61661;
l61660: ;
pconverge_61662 = 0;
goto l61661;
l61661: ;
converge_61662 = pconverge_61662;
bool _61663;
_61663 = 4096 <= converge_61662;
if (_61663) goto l61664; else goto l61713;
l61713: ;
pconverge_61666 = converge_61662;
goto l61665;
l61664: ;
pconverge_61666 = 4095;
goto l61665;
l61665: ;
converge_61666 = pconverge_61666;
int _61667;
_61667 = 4096 * converge_61666;
int _61668;
_61668 = _61667 + converge_61657;
float* idx_61669;
idx_61669 = _55655_61558 + _61668;
_61672 = __ldg(idx_61669);
p_61672 = _61672;
l61670: ;
_61672 = p_61672;
if (_61583) goto l61673; else goto l61712;
l61712: ;
pconverge_61675 = _61582;
goto l61674;
l61673: ;
pconverge_61675 = 0;
goto l61674;
l61674: ;
converge_61675 = pconverge_61675;
bool _61676;
_61676 = 4096 <= converge_61675;
if (_61676) goto l61677; else goto l61711;
l61711: ;
pconverge_61679 = converge_61675;
goto l61678;
l61677: ;
pconverge_61679 = 4095;
goto l61678;
l61678: ;
converge_61679 = pconverge_61679;
int _61680;
_61680 = 2 + gid_y_61592;
bool _61681;
_61681 = _61680 < 0;
if (_61681) goto l61682; else goto l61710;
l61710: ;
pconverge_61684 = _61680;
goto l61683;
l61682: ;
pconverge_61684 = 0;
goto l61683;
l61683: ;
converge_61684 = pconverge_61684;
bool _61685;
_61685 = 4096 <= converge_61684;
if (_61685) goto l61686; else goto l61709;
l61709: ;
pconverge_61688 = converge_61684;
goto l61687;
l61686: ;
pconverge_61688 = 4095;
goto l61687;
l61687: ;
converge_61688 = pconverge_61688;
int _61689;
_61689 = 4096 * converge_61688;
int _61690;
_61690 = _61689 + converge_61679;
float* idx_61691;
idx_61691 = _55655_61558 + _61690;
_61694 = __ldg(idx_61691);
p_61694 = _61694;
l61692: ;
_61694 = p_61694;
float _61700;
_61700 = 2.444600e-01f * _61629;
float _61706;
_61706 = 7.076600e-02f * _61694;
int _61695;
_61695 = 4096 * gid_y_61592;
float _61704;
_61704 = 2.444600e-01f * _61672;
float _61702;
_61702 = 3.695460e-01f * _61650;
float _61698;
_61698 = 7.076600e-02f * _61607;
int _61696;
_61696 = _61695 + _61582;
float _61699;
_61699 = 0.000000e+00f + _61698;
float* idx_61697;
idx_61697 = _55656_61559 + _61696;
float _61701;
_61701 = _61699 + _61700;
float _61703;
_61703 = _61701 + _61702;
float _61705;
_61705 = _61703 + _61704;
float _61707;
_61707 = _61705 + _61706;
*idx_61697 = _61707;
return ;
}
} |
You are a helpful coding assistant specialized in converting HIP source code to AMD device assembly. | #include <hip/hip_runtime.h>
extern "C" {
__device__ inline int threadIdx_x() { return threadIdx.x; }
__device__ inline int threadIdx_y() { return threadIdx.y; }
__device__ inline int threadIdx_z() { return threadIdx.z; }
__device__ inline int blockIdx_x() { return blockIdx.x; }
__device__ inline int blockIdx_y() { return blockIdx.y; }
__device__ inline int blockIdx_z() { return blockIdx.z; }
__device__ inline int blockDim_x() { return blockDim.x; }
__device__ inline int blockDim_y() { return blockDim.y; }
__device__ inline int blockDim_z() { return blockDim.z; }
__device__ inline int gridDim_x() { return gridDim.x; }
__device__ inline int gridDim_y() { return gridDim.y; }
__device__ inline int gridDim_z() { return gridDim.z; }
__global__ void lambda_56187(float*, float*);
__global__ void lambda_55652(float*, float*);
__global__ __launch_bounds__ (128 * 1 * 1) void lambda_56187(float* _56190_61351, float* _56191_61352) {
int threadIdx_x_61358;
int pthreadIdx_x_61358;
int blockDim_x_61364;
int pblockDim_x_61364;
int blockIdx_x_61370;
int pblockIdx_x_61370;
int _61376;
int p_61376;
int _61382;
int p_61382;
int _61388;
int p_61388;
int _61391;
int p_61391;
int converge_61400;
int pconverge_61400;
int converge_61405;
int pconverge_61405;
int converge_61411;
int pconverge_61411;
int converge_61415;
int pconverge_61415;
float _61425;
float p_61425;
int converge_61431;
int pconverge_61431;
int converge_61435;
int pconverge_61435;
int converge_61438;
int pconverge_61438;
int converge_61442;
int pconverge_61442;
float _61448;
float p_61448;
int converge_61452;
int pconverge_61452;
int converge_61456;
int pconverge_61456;
int converge_61459;
int pconverge_61459;
int converge_61463;
int pconverge_61463;
float _61469;
float p_61469;
int converge_61475;
int pconverge_61475;
int converge_61479;
int pconverge_61479;
int converge_61482;
int pconverge_61482;
int converge_61486;
int pconverge_61486;
float _61492;
float p_61492;
int converge_61498;
int pconverge_61498;
int converge_61502;
int pconverge_61502;
int converge_61505;
int pconverge_61505;
int converge_61509;
int pconverge_61509;
float _61515;
float p_61515;
threadIdx_x_61358 = threadIdx_x();
pthreadIdx_x_61358 = threadIdx_x_61358;
l61356: ;
threadIdx_x_61358 = pthreadIdx_x_61358;
blockDim_x_61364 = blockDim_x();
pblockDim_x_61364 = blockDim_x_61364;
l61362: ;
blockDim_x_61364 = pblockDim_x_61364;
blockIdx_x_61370 = blockIdx_x();
pblockIdx_x_61370 = blockIdx_x_61370;
l61368: ;
blockIdx_x_61370 = pblockIdx_x_61370;
_61376 = threadIdx_y();
p_61376 = _61376;
l61374: ;
_61376 = p_61376;
_61382 = blockDim_y();
p_61382 = _61382;
l61380: ;
_61382 = p_61382;
_61388 = blockIdx_y();
p_61388 = _61388;
l61386: ;
_61388 = p_61388;
_61391 = blockDim_y();
p_61391 = _61391;
l61389: ;
_61391 = p_61391;
int _61393;
_61393 = blockDim_x_61364 * blockIdx_x_61370;
int _61394;
_61394 = threadIdx_x_61358 + _61393;
int _61395;
_61395 = -2 + _61394;
bool _61397;
_61397 = _61395 < 0;
if (_61397) goto l61398; else goto l61554;
l61554: ;
pconverge_61400 = _61395;
goto l61399;
l61398: ;
pconverge_61400 = 0;
goto l61399;
l61399: ;
converge_61400 = pconverge_61400;
bool _61402;
_61402 = 4096 <= converge_61400;
if (_61402) goto l61403; else goto l61553;
l61553: ;
pconverge_61405 = converge_61400;
goto l61404;
l61403: ;
pconverge_61405 = 4095;
goto l61404;
l61404: ;
converge_61405 = pconverge_61405;
int _61406;
_61406 = _61382 * _61388;
int gid_y_61407;
gid_y_61407 = _61376 + _61406;
bool _61408;
_61408 = gid_y_61407 < 0;
if (_61408) goto l61409; else goto l61552;
l61552: ;
pconverge_61411 = gid_y_61407;
goto l61410;
l61409: ;
pconverge_61411 = 0;
goto l61410;
l61410: ;
converge_61411 = pconverge_61411;
bool _61412;
_61412 = 4096 <= converge_61411;
if (_61412) goto l61413; else goto l61551;
l61551: ;
pconverge_61415 = converge_61411;
goto l61414;
l61413: ;
pconverge_61415 = 4095;
goto l61414;
l61414: ;
converge_61415 = pconverge_61415;
int _61420;
_61420 = 4096 * converge_61415;
int _61421;
_61421 = _61420 + converge_61405;
float* idx_61422;
idx_61422 = _56190_61351 + _61421;
_61425 = __ldg(idx_61422);
p_61425 = _61425;
l61423: ;
_61425 = p_61425;
int _61427;
_61427 = -1 + _61394;
bool _61428;
_61428 = _61427 < 0;
if (_61428) goto l61429; else goto l61550;
l61550: ;
pconverge_61431 = _61427;
goto l61430;
l61429: ;
pconverge_61431 = 0;
goto l61430;
l61430: ;
converge_61431 = pconverge_61431;
bool _61432;
_61432 = 4096 <= converge_61431;
if (_61432) goto l61433; else goto l61549;
l61549: ;
pconverge_61435 = converge_61431;
goto l61434;
l61433: ;
pconverge_61435 = 4095;
goto l61434;
l61434: ;
converge_61435 = pconverge_61435;
if (_61408) goto l61436; else goto l61548;
l61548: ;
pconverge_61438 = gid_y_61407;
goto l61437;
l61436: ;
pconverge_61438 = 0;
goto l61437;
l61437: ;
converge_61438 = pconverge_61438;
bool _61439;
_61439 = 4096 <= converge_61438;
if (_61439) goto l61440; else goto l61547;
l61547: ;
pconverge_61442 = converge_61438;
goto l61441;
l61440: ;
pconverge_61442 = 4095;
goto l61441;
l61441: ;
converge_61442 = pconverge_61442;
int _61443;
_61443 = 4096 * converge_61442;
int _61444;
_61444 = _61443 + converge_61435;
float* idx_61445;
idx_61445 = _56190_61351 + _61444;
_61448 = __ldg(idx_61445);
p_61448 = _61448;
l61446: ;
_61448 = p_61448;
bool _61449;
_61449 = _61394 < 0;
if (_61449) goto l61450; else goto l61546;
l61546: ;
pconverge_61452 = _61394;
goto l61451;
l61450: ;
pconverge_61452 = 0;
goto l61451;
l61451: ;
converge_61452 = pconverge_61452;
bool _61453;
_61453 = 4096 <= converge_61452;
if (_61453) goto l61454; else goto l61545;
l61545: ;
pconverge_61456 = converge_61452;
goto l61455;
l61454: ;
pconverge_61456 = 4095;
goto l61455;
l61455: ;
converge_61456 = pconverge_61456;
if (_61408) goto l61457; else goto l61544;
l61544: ;
pconverge_61459 = gid_y_61407;
goto l61458;
l61457: ;
pconverge_61459 = 0;
goto l61458;
l61458: ;
converge_61459 = pconverge_61459;
bool _61460;
_61460 = 4096 <= converge_61459;
if (_61460) goto l61461; else goto l61543;
l61543: ;
pconverge_61463 = converge_61459;
goto l61462;
l61461: ;
pconverge_61463 = 4095;
goto l61462;
l61462: ;
converge_61463 = pconverge_61463;
int _61464;
_61464 = 4096 * converge_61463;
int _61465;
_61465 = _61464 + converge_61456;
float* idx_61466;
idx_61466 = _56190_61351 + _61465;
_61469 = __ldg(idx_61466);
p_61469 = _61469;
l61467: ;
_61469 = p_61469;
int _61471;
_61471 = 1 + _61394;
bool _61472;
_61472 = _61471 < 0;
if (_61472) goto l61473; else goto l61542;
l61542: ;
pconverge_61475 = _61471;
goto l61474;
l61473: ;
pconverge_61475 = 0;
goto l61474;
l61474: ;
converge_61475 = pconverge_61475;
bool _61476;
_61476 = 4096 <= converge_61475;
if (_61476) goto l61477; else goto l61541;
l61541: ;
pconverge_61479 = converge_61475;
goto l61478;
l61477: ;
pconverge_61479 = 4095;
goto l61478;
l61478: ;
converge_61479 = pconverge_61479;
if (_61408) goto l61480; else goto l61540;
l61540: ;
pconverge_61482 = gid_y_61407;
goto l61481;
l61480: ;
pconverge_61482 = 0;
goto l61481;
l61481: ;
converge_61482 = pconverge_61482;
bool _61483;
_61483 = 4096 <= converge_61482;
if (_61483) goto l61484; else goto l61539;
l61539: ;
pconverge_61486 = converge_61482;
goto l61485;
l61484: ;
pconverge_61486 = 4095;
goto l61485;
l61485: ;
converge_61486 = pconverge_61486;
int _61487;
_61487 = 4096 * converge_61486;
int _61488;
_61488 = _61487 + converge_61479;
float* idx_61489;
idx_61489 = _56190_61351 + _61488;
_61492 = __ldg(idx_61489);
p_61492 = _61492;
l61490: ;
_61492 = p_61492;
int _61494;
_61494 = 2 + _61394;
bool _61495;
_61495 = _61494 < 0;
if (_61495) goto l61496; else goto l61538;
l61538: ;
pconverge_61498 = _61494;
goto l61497;
l61496: ;
pconverge_61498 = 0;
goto l61497;
l61497: ;
converge_61498 = pconverge_61498;
bool _61499;
_61499 = 4096 <= converge_61498;
if (_61499) goto l61500; else goto l61537;
l61537: ;
pconverge_61502 = converge_61498;
goto l61501;
l61500: ;
pconverge_61502 = 4095;
goto l61501;
l61501: ;
converge_61502 = pconverge_61502;
if (_61408) goto l61503; else goto l61536;
l61536: ;
pconverge_61505 = gid_y_61407;
goto l61504;
l61503: ;
pconverge_61505 = 0;
goto l61504;
l61504: ;
converge_61505 = pconverge_61505;
bool _61506;
_61506 = 4096 <= converge_61505;
if (_61506) goto l61507; else goto l61535;
l61535: ;
pconverge_61509 = converge_61505;
goto l61508;
l61507: ;
pconverge_61509 = 4095;
goto l61508;
l61508: ;
converge_61509 = pconverge_61509;
int _61510;
_61510 = 4096 * converge_61509;
int _61511;
_61511 = _61510 + converge_61502;
float* idx_61512;
idx_61512 = _56190_61351 + _61511;
_61515 = __ldg(idx_61512);
p_61515 = _61515;
l61513: ;
_61515 = p_61515;
int _61516;
_61516 = 4096 * gid_y_61407;
float _61524;
_61524 = 2.444600e-01f * _61448;
float _61521;
_61521 = 7.076600e-02f * _61425;
float _61531;
_61531 = 7.076600e-02f * _61515;
float _61529;
_61529 = 2.444600e-01f * _61492;
float _61522;
_61522 = 0.000000e+00f + _61521;
float _61525;
_61525 = _61522 + _61524;
float _61527;
_61527 = 3.695460e-01f * _61469;
int _61517;
_61517 = _61516 + _61394;
float _61528;
_61528 = _61525 + _61527;
float* idx_61518;
idx_61518 = _56191_61352 + _61517;
float _61530;
_61530 = _61528 + _61529;
float _61532;
_61532 = _61530 + _61531;
*idx_61518 = _61532;
return ;
}
__global__ __launch_bounds__ (32 * 4 * 1) void lambda_55652(float* _55655_61558, float* _55656_61559) {
int threadIdx_x_61562;
int pthreadIdx_x_61562;
int blockDim_x_61565;
int pblockDim_x_61565;
int blockIdx_x_61568;
int pblockIdx_x_61568;
int _61571;
int p_61571;
int _61574;
int p_61574;
int _61577;
int p_61577;
int _61580;
int p_61580;
int converge_61586;
int pconverge_61586;
int converge_61590;
int pconverge_61590;
int converge_61597;
int pconverge_61597;
int converge_61601;
int pconverge_61601;
float _61607;
float p_61607;
int converge_61610;
int pconverge_61610;
int converge_61614;
int pconverge_61614;
int converge_61619;
int pconverge_61619;
int converge_61623;
int pconverge_61623;
float _61629;
float p_61629;
int converge_61632;
int pconverge_61632;
int converge_61636;
int pconverge_61636;
int converge_61640;
int pconverge_61640;
int converge_61644;
int pconverge_61644;
float _61650;
float p_61650;
int converge_61653;
int pconverge_61653;
int converge_61657;
int pconverge_61657;
int converge_61662;
int pconverge_61662;
int converge_61666;
int pconverge_61666;
float _61672;
float p_61672;
int converge_61675;
int pconverge_61675;
int converge_61679;
int pconverge_61679;
int converge_61684;
int pconverge_61684;
int converge_61688;
int pconverge_61688;
float _61694;
float p_61694;
threadIdx_x_61562 = threadIdx_x();
pthreadIdx_x_61562 = threadIdx_x_61562;
l61560: ;
threadIdx_x_61562 = pthreadIdx_x_61562;
blockDim_x_61565 = blockDim_x();
pblockDim_x_61565 = blockDim_x_61565;
l61563: ;
blockDim_x_61565 = pblockDim_x_61565;
blockIdx_x_61568 = blockIdx_x();
pblockIdx_x_61568 = blockIdx_x_61568;
l61566: ;
blockIdx_x_61568 = pblockIdx_x_61568;
_61571 = threadIdx_y();
p_61571 = _61571;
l61569: ;
_61571 = p_61571;
_61574 = blockDim_y();
p_61574 = _61574;
l61572: ;
_61574 = p_61574;
_61577 = blockIdx_y();
p_61577 = _61577;
l61575: ;
_61577 = p_61577;
_61580 = blockDim_y();
p_61580 = _61580;
l61578: ;
_61580 = p_61580;
int _61581;
_61581 = blockDim_x_61565 * blockIdx_x_61568;
int _61582;
_61582 = threadIdx_x_61562 + _61581;
bool _61583;
_61583 = _61582 < 0;
if (_61583) goto l61584; else goto l61728;
l61728: ;
pconverge_61586 = _61582;
goto l61585;
l61584: ;
pconverge_61586 = 0;
goto l61585;
l61585: ;
converge_61586 = pconverge_61586;
bool _61587;
_61587 = 4096 <= converge_61586;
if (_61587) goto l61588; else goto l61727;
l61727: ;
pconverge_61590 = converge_61586;
goto l61589;
l61588: ;
pconverge_61590 = 4095;
goto l61589;
l61589: ;
converge_61590 = pconverge_61590;
int _61591;
_61591 = _61574 * _61577;
int gid_y_61592;
gid_y_61592 = _61571 + _61591;
int _61593;
_61593 = -2 + gid_y_61592;
bool _61594;
_61594 = _61593 < 0;
if (_61594) goto l61595; else goto l61726;
l61726: ;
pconverge_61597 = _61593;
goto l61596;
l61595: ;
pconverge_61597 = 0;
goto l61596;
l61596: ;
converge_61597 = pconverge_61597;
bool _61598;
_61598 = 4096 <= converge_61597;
if (_61598) goto l61599; else goto l61725;
l61725: ;
pconverge_61601 = converge_61597;
goto l61600;
l61599: ;
pconverge_61601 = 4095;
goto l61600;
l61600: ;
converge_61601 = pconverge_61601;
int _61602;
_61602 = 4096 * converge_61601;
int _61603;
_61603 = _61602 + converge_61590;
float* idx_61604;
idx_61604 = _55655_61558 + _61603;
_61607 = __ldg(idx_61604);
p_61607 = _61607;
l61605: ;
_61607 = p_61607;
if (_61583) goto l61608; else goto l61724;
l61724: ;
pconverge_61610 = _61582;
goto l61609;
l61608: ;
pconverge_61610 = 0;
goto l61609;
l61609: ;
converge_61610 = pconverge_61610;
bool _61611;
_61611 = 4096 <= converge_61610;
if (_61611) goto l61612; else goto l61723;
l61723: ;
pconverge_61614 = converge_61610;
goto l61613;
l61612: ;
pconverge_61614 = 4095;
goto l61613;
l61613: ;
converge_61614 = pconverge_61614;
int _61615;
_61615 = -1 + gid_y_61592;
bool _61616;
_61616 = _61615 < 0;
if (_61616) goto l61617; else goto l61722;
l61722: ;
pconverge_61619 = _61615;
goto l61618;
l61617: ;
pconverge_61619 = 0;
goto l61618;
l61618: ;
converge_61619 = pconverge_61619;
bool _61620;
_61620 = 4096 <= converge_61619;
if (_61620) goto l61621; else goto l61721;
l61721: ;
pconverge_61623 = converge_61619;
goto l61622;
l61621: ;
pconverge_61623 = 4095;
goto l61622;
l61622: ;
converge_61623 = pconverge_61623;
int _61624;
_61624 = 4096 * converge_61623;
int _61625;
_61625 = _61624 + converge_61614;
float* idx_61626;
idx_61626 = _55655_61558 + _61625;
_61629 = __ldg(idx_61626);
p_61629 = _61629;
l61627: ;
_61629 = p_61629;
if (_61583) goto l61630; else goto l61720;
l61720: ;
pconverge_61632 = _61582;
goto l61631;
l61630: ;
pconverge_61632 = 0;
goto l61631;
l61631: ;
converge_61632 = pconverge_61632;
bool _61633;
_61633 = 4096 <= converge_61632;
if (_61633) goto l61634; else goto l61719;
l61719: ;
pconverge_61636 = converge_61632;
goto l61635;
l61634: ;
pconverge_61636 = 4095;
goto l61635;
l61635: ;
converge_61636 = pconverge_61636;
bool _61637;
_61637 = gid_y_61592 < 0;
if (_61637) goto l61638; else goto l61718;
l61718: ;
pconverge_61640 = gid_y_61592;
goto l61639;
l61638: ;
pconverge_61640 = 0;
goto l61639;
l61639: ;
converge_61640 = pconverge_61640;
bool _61641;
_61641 = 4096 <= converge_61640;
if (_61641) goto l61642; else goto l61717;
l61717: ;
pconverge_61644 = converge_61640;
goto l61643;
l61642: ;
pconverge_61644 = 4095;
goto l61643;
l61643: ;
converge_61644 = pconverge_61644;
int _61645;
_61645 = 4096 * converge_61644;
int _61646;
_61646 = _61645 + converge_61636;
float* idx_61647;
idx_61647 = _55655_61558 + _61646;
_61650 = __ldg(idx_61647);
p_61650 = _61650;
l61648: ;
_61650 = p_61650;
if (_61583) goto l61651; else goto l61716;
l61716: ;
pconverge_61653 = _61582;
goto l61652;
l61651: ;
pconverge_61653 = 0;
goto l61652;
l61652: ;
converge_61653 = pconverge_61653;
bool _61654;
_61654 = 4096 <= converge_61653;
if (_61654) goto l61655; else goto l61715;
l61715: ;
pconverge_61657 = converge_61653;
goto l61656;
l61655: ;
pconverge_61657 = 4095;
goto l61656;
l61656: ;
converge_61657 = pconverge_61657;
int _61658;
_61658 = 1 + gid_y_61592;
bool _61659;
_61659 = _61658 < 0;
if (_61659) goto l61660; else goto l61714;
l61714: ;
pconverge_61662 = _61658;
goto l61661;
l61660: ;
pconverge_61662 = 0;
goto l61661;
l61661: ;
converge_61662 = pconverge_61662;
bool _61663;
_61663 = 4096 <= converge_61662;
if (_61663) goto l61664; else goto l61713;
l61713: ;
pconverge_61666 = converge_61662;
goto l61665;
l61664: ;
pconverge_61666 = 4095;
goto l61665;
l61665: ;
converge_61666 = pconverge_61666;
int _61667;
_61667 = 4096 * converge_61666;
int _61668;
_61668 = _61667 + converge_61657;
float* idx_61669;
idx_61669 = _55655_61558 + _61668;
_61672 = __ldg(idx_61669);
p_61672 = _61672;
l61670: ;
_61672 = p_61672;
if (_61583) goto l61673; else goto l61712;
l61712: ;
pconverge_61675 = _61582;
goto l61674;
l61673: ;
pconverge_61675 = 0;
goto l61674;
l61674: ;
converge_61675 = pconverge_61675;
bool _61676;
_61676 = 4096 <= converge_61675;
if (_61676) goto l61677; else goto l61711;
l61711: ;
pconverge_61679 = converge_61675;
goto l61678;
l61677: ;
pconverge_61679 = 4095;
goto l61678;
l61678: ;
converge_61679 = pconverge_61679;
int _61680;
_61680 = 2 + gid_y_61592;
bool _61681;
_61681 = _61680 < 0;
if (_61681) goto l61682; else goto l61710;
l61710: ;
pconverge_61684 = _61680;
goto l61683;
l61682: ;
pconverge_61684 = 0;
goto l61683;
l61683: ;
converge_61684 = pconverge_61684;
bool _61685;
_61685 = 4096 <= converge_61684;
if (_61685) goto l61686; else goto l61709;
l61709: ;
pconverge_61688 = converge_61684;
goto l61687;
l61686: ;
pconverge_61688 = 4095;
goto l61687;
l61687: ;
converge_61688 = pconverge_61688;
int _61689;
_61689 = 4096 * converge_61688;
int _61690;
_61690 = _61689 + converge_61679;
float* idx_61691;
idx_61691 = _55655_61558 + _61690;
_61694 = __ldg(idx_61691);
p_61694 = _61694;
l61692: ;
_61694 = p_61694;
float _61700;
_61700 = 2.444600e-01f * _61629;
float _61706;
_61706 = 7.076600e-02f * _61694;
int _61695;
_61695 = 4096 * gid_y_61592;
float _61704;
_61704 = 2.444600e-01f * _61672;
float _61702;
_61702 = 3.695460e-01f * _61650;
float _61698;
_61698 = 7.076600e-02f * _61607;
int _61696;
_61696 = _61695 + _61582;
float _61699;
_61699 = 0.000000e+00f + _61698;
float* idx_61697;
idx_61697 = _55656_61559 + _61696;
float _61701;
_61701 = _61699 + _61700;
float _61703;
_61703 = _61701 + _61702;
float _61705;
_61705 = _61703 + _61704;
float _61707;
_61707 = _61705 + _61706;
*idx_61697 = _61707;
return ;
}
} | .text
.amdgcn_target "amdgcn-amd-amdhsa--gfx1100"
.protected lambda_56187
.globl lambda_56187
.p2align 8
.type lambda_56187,@function
lambda_56187:
s_load_b32 s2, s[0:1], 0x1c
v_and_b32_e32 v1, 0x3ff, v0
v_bfe_u32 v0, v0, 10, 10
s_waitcnt lgkmcnt(0)
s_and_b32 s3, s2, 0xffff
s_lshr_b32 s2, s2, 16
v_mad_u64_u32 v[2:3], null, s14, s3, v[1:2]
v_mad_u64_u32 v[3:4], null, s15, s2, v[0:1]
s_load_b128 s[0:3], s[0:1], 0x0
v_mov_b32_e32 v1, 0
s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_1) | instid1(VALU_DEP_4)
v_min_i32_e32 v0, 0x1001, v2
v_cmp_lt_i32_e32 vcc_lo, 1, v2
v_max_i32_e32 v4, 0, v3
v_min_i32_e32 v6, 0x1000, v2
v_min_i32_e32 v8, 0xffe, v2
v_add_nc_u32_e32 v0, -2, v0
v_min_i32_e32 v9, 0xffd, v2
v_min_i32_e32 v5, 0xfff, v4
s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_4)
v_add_nc_u32_e32 v8, 1, v8
v_cndmask_b32_e32 v0, 0, v0, vcc_lo
v_cmp_lt_i32_e32 vcc_lo, 0, v2
s_delay_alu instid0(VALU_DEP_4)
v_lshlrev_b32_e32 v7, 12, v5
v_add_nc_u32_e32 v9, 2, v9
v_lshlrev_b32_e32 v11, 12, v4
v_add_nc_u32_e32 v6, -1, v6
v_max_i32_e32 v5, 0, v2
v_add_nc_u32_e32 v0, v7, v0
s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_1) | instid1(VALU_DEP_4)
v_cndmask_b32_e32 v6, 0, v6, vcc_lo
v_cmp_gt_i32_e32 vcc_lo, 0x1000, v3
v_min_u32_e32 v10, 0xfff, v5
s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_4)
v_lshlrev_b64 v[4:5], 2, v[0:1]
v_dual_cndmask_b32 v11, 0xfff000, v11 :: v_dual_add_nc_u32 v0, v7, v6
v_cmp_lt_i32_e32 vcc_lo, -2, v2
s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_3)
v_lshlrev_b64 v[6:7], 2, v[0:1]
v_or_b32_e32 v0, v11, v10
v_cndmask_b32_e32 v12, 0, v8, vcc_lo
s_waitcnt lgkmcnt(0)
v_add_co_u32 v4, vcc_lo, s0, v4
v_add_co_ci_u32_e32 v5, vcc_lo, s1, v5, vcc_lo
v_cmp_lt_i32_e32 vcc_lo, -3, v2
v_cndmask_b32_e32 v10, 0, v9, vcc_lo
v_lshlrev_b64 v[8:9], 2, v[0:1]
v_add_nc_u32_e32 v0, v11, v12
global_load_b32 v12, v[4:5], off
v_add_co_u32 v4, vcc_lo, s0, v6
v_add_co_ci_u32_e32 v5, vcc_lo, s1, v7, vcc_lo
v_lshlrev_b64 v[6:7], 2, v[0:1]
v_add_nc_u32_e32 v0, v11, v10
v_add_co_u32 v8, vcc_lo, s0, v8
v_add_co_ci_u32_e32 v9, vcc_lo, s1, v9, vcc_lo
s_delay_alu instid0(VALU_DEP_3)
v_lshlrev_b64 v[0:1], 2, v[0:1]
s_clause 0x1
global_load_b32 v10, v[4:5], off
global_load_b32 v8, v[8:9], off
v_add_co_u32 v4, vcc_lo, s0, v6
v_add_co_ci_u32_e32 v5, vcc_lo, s1, v7, vcc_lo
v_add_co_u32 v0, vcc_lo, s0, v0
v_add_co_ci_u32_e32 v1, vcc_lo, s1, v1, vcc_lo
s_clause 0x1
global_load_b32 v4, v[4:5], off
global_load_b32 v5, v[0:1], off
v_lshl_add_u32 v0, v3, 12, v2
s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
v_ashrrev_i32_e32 v1, 31, v0
v_lshlrev_b64 v[0:1], 2, v[0:1]
s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_2)
v_add_co_u32 v0, vcc_lo, s2, v0
v_add_co_ci_u32_e32 v1, vcc_lo, s3, v1, vcc_lo
s_waitcnt vmcnt(4)
v_fma_f32 v6, v12, 0x3d90edc4, 0
s_waitcnt vmcnt(3)
s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
v_fmac_f32_e32 v6, 0x3e7a53b9, v10
s_waitcnt vmcnt(2)
v_fmamk_f32 v2, v8, 0x3ebd3522, v6
s_waitcnt vmcnt(1)
s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
v_fmac_f32_e32 v2, 0x3e7a53b9, v4
s_waitcnt vmcnt(0)
v_fmac_f32_e32 v2, 0x3d90edc4, v5
global_store_b32 v[0:1], v2, off
s_nop 0
s_sendmsg sendmsg(MSG_DEALLOC_VGPRS)
s_endpgm
.section .rodata,"a",@progbits
.p2align 6, 0x0
.amdhsa_kernel lambda_56187
.amdhsa_group_segment_fixed_size 0
.amdhsa_private_segment_fixed_size 0
.amdhsa_kernarg_size 272
.amdhsa_user_sgpr_count 14
.amdhsa_user_sgpr_dispatch_ptr 0
.amdhsa_user_sgpr_queue_ptr 0
.amdhsa_user_sgpr_kernarg_segment_ptr 1
.amdhsa_user_sgpr_dispatch_id 0
.amdhsa_user_sgpr_private_segment_size 0
.amdhsa_wavefront_size32 1
.amdhsa_uses_dynamic_stack 0
.amdhsa_enable_private_segment 0
.amdhsa_system_sgpr_workgroup_id_x 1
.amdhsa_system_sgpr_workgroup_id_y 1
.amdhsa_system_sgpr_workgroup_id_z 0
.amdhsa_system_sgpr_workgroup_info 0
.amdhsa_system_vgpr_workitem_id 1
.amdhsa_next_free_vgpr 13
.amdhsa_next_free_sgpr 16
.amdhsa_float_round_mode_32 0
.amdhsa_float_round_mode_16_64 0
.amdhsa_float_denorm_mode_32 3
.amdhsa_float_denorm_mode_16_64 3
.amdhsa_dx10_clamp 1
.amdhsa_ieee_mode 1
.amdhsa_fp16_overflow 0
.amdhsa_workgroup_processor_mode 1
.amdhsa_memory_ordered 1
.amdhsa_forward_progress 0
.amdhsa_shared_vgpr_count 0
.amdhsa_exception_fp_ieee_invalid_op 0
.amdhsa_exception_fp_denorm_src 0
.amdhsa_exception_fp_ieee_div_zero 0
.amdhsa_exception_fp_ieee_overflow 0
.amdhsa_exception_fp_ieee_underflow 0
.amdhsa_exception_fp_ieee_inexact 0
.amdhsa_exception_int_div_zero 0
.end_amdhsa_kernel
.text
.Lfunc_end0:
.size lambda_56187, .Lfunc_end0-lambda_56187
.section .AMDGPU.csdata,"",@progbits
.text
.protected lambda_55652
.globl lambda_55652
.p2align 8
.type lambda_55652,@function
lambda_55652:
s_load_b32 s2, s[0:1], 0x1c
v_bfe_u32 v1, v0, 10, 10
v_and_b32_e32 v0, 0x3ff, v0
s_waitcnt lgkmcnt(0)
s_and_b32 s3, s2, 0xffff
s_lshr_b32 s2, s2, 16
s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_3) | instid1(VALU_DEP_3)
v_mad_u64_u32 v[2:3], null, s15, s2, v[1:2]
v_mad_u64_u32 v[3:4], null, s14, s3, v[0:1]
v_mov_b32_e32 v1, 0
s_load_b128 s[0:3], s[0:1], 0x0
v_min_i32_e32 v0, 0x1001, v2
v_cmp_lt_i32_e32 vcc_lo, 1, v2
s_delay_alu instid0(VALU_DEP_4)
v_max_i32_e32 v4, 0, v3
v_min_i32_e32 v5, 0x1000, v2
v_max_i32_e32 v6, 0, v2
v_lshl_add_u32 v0, v0, 12, 0xffffe000
v_add_nc_u32_e32 v7, 1, v2
v_min_u32_e32 v10, 0xfff, v4
v_lshl_add_u32 v4, v5, 12, 0xfffff000
s_delay_alu instid0(VALU_DEP_4) | instskip(SKIP_2) | instid1(VALU_DEP_3)
v_cndmask_b32_e32 v0, 0, v0, vcc_lo
v_cmp_lt_i32_e32 vcc_lo, -2, v2
v_add_nc_u32_e32 v8, 2, v2
v_or_b32_e32 v0, v0, v10
v_cndmask_b32_e32 v7, 0, v7, vcc_lo
v_cmp_lt_i32_e32 vcc_lo, 0, v2
v_lshlrev_b32_e32 v6, 12, v6
s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_3) | instid1(VALU_DEP_3)
v_lshlrev_b32_e32 v11, 12, v7
v_cndmask_b32_e32 v9, 0, v4, vcc_lo
v_cmp_lt_i32_e32 vcc_lo, -3, v2
v_lshlrev_b64 v[4:5], 2, v[0:1]
v_or_b32_e32 v0, v9, v10
v_cndmask_b32_e32 v8, 0, v8, vcc_lo
v_cmp_gt_i32_e32 vcc_lo, 0x1000, v2
s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_2) | instid1(VALU_DEP_3)
v_dual_cndmask_b32 v9, 0xfff000, v6 :: v_dual_lshlrev_b32 v12, 12, v8
v_cmp_gt_i32_e32 vcc_lo, 0x1000, v7
v_lshlrev_b64 v[6:7], 2, v[0:1]
v_or_b32_e32 v0, v9, v10
v_cndmask_b32_e32 v11, 0xfff000, v11, vcc_lo
s_waitcnt lgkmcnt(0)
v_add_co_u32 v4, vcc_lo, s0, v4
v_add_co_ci_u32_e32 v5, vcc_lo, s1, v5, vcc_lo
v_cmp_gt_i32_e32 vcc_lo, 0x1000, v8
v_lshlrev_b64 v[8:9], 2, v[0:1]
v_or_b32_e32 v0, v11, v10
global_load_b32 v11, v[4:5], off
v_cndmask_b32_e32 v12, 0xfff000, v12, vcc_lo
v_add_co_u32 v4, vcc_lo, s0, v6
v_add_co_ci_u32_e32 v5, vcc_lo, s1, v7, vcc_lo
v_lshlrev_b64 v[6:7], 2, v[0:1]
s_delay_alu instid0(VALU_DEP_4) | instskip(SKIP_2) | instid1(VALU_DEP_3)
v_or_b32_e32 v0, v12, v10
v_add_co_u32 v8, vcc_lo, s0, v8
v_add_co_ci_u32_e32 v9, vcc_lo, s1, v9, vcc_lo
v_lshlrev_b64 v[0:1], 2, v[0:1]
s_clause 0x1
global_load_b32 v10, v[4:5], off
global_load_b32 v8, v[8:9], off
v_add_co_u32 v4, vcc_lo, s0, v6
v_add_co_ci_u32_e32 v5, vcc_lo, s1, v7, vcc_lo
v_add_co_u32 v0, vcc_lo, s0, v0
v_add_co_ci_u32_e32 v1, vcc_lo, s1, v1, vcc_lo
s_clause 0x1
global_load_b32 v4, v[4:5], off
global_load_b32 v5, v[0:1], off
v_lshl_add_u32 v0, v2, 12, v3
s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
v_ashrrev_i32_e32 v1, 31, v0
v_lshlrev_b64 v[0:1], 2, v[0:1]
s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_2)
v_add_co_u32 v0, vcc_lo, s2, v0
v_add_co_ci_u32_e32 v1, vcc_lo, s3, v1, vcc_lo
s_waitcnt vmcnt(4)
v_fma_f32 v6, v11, 0x3d90edc4, 0
s_waitcnt vmcnt(3)
s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
v_fmac_f32_e32 v6, 0x3e7a53b9, v10
s_waitcnt vmcnt(2)
v_fmamk_f32 v2, v8, 0x3ebd3522, v6
s_waitcnt vmcnt(1)
s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
v_fmac_f32_e32 v2, 0x3e7a53b9, v4
s_waitcnt vmcnt(0)
v_fmac_f32_e32 v2, 0x3d90edc4, v5
global_store_b32 v[0:1], v2, off
s_nop 0
s_sendmsg sendmsg(MSG_DEALLOC_VGPRS)
s_endpgm
.section .rodata,"a",@progbits
.p2align 6, 0x0
.amdhsa_kernel lambda_55652
.amdhsa_group_segment_fixed_size 0
.amdhsa_private_segment_fixed_size 0
.amdhsa_kernarg_size 272
.amdhsa_user_sgpr_count 14
.amdhsa_user_sgpr_dispatch_ptr 0
.amdhsa_user_sgpr_queue_ptr 0
.amdhsa_user_sgpr_kernarg_segment_ptr 1
.amdhsa_user_sgpr_dispatch_id 0
.amdhsa_user_sgpr_private_segment_size 0
.amdhsa_wavefront_size32 1
.amdhsa_uses_dynamic_stack 0
.amdhsa_enable_private_segment 0
.amdhsa_system_sgpr_workgroup_id_x 1
.amdhsa_system_sgpr_workgroup_id_y 1
.amdhsa_system_sgpr_workgroup_id_z 0
.amdhsa_system_sgpr_workgroup_info 0
.amdhsa_system_vgpr_workitem_id 1
.amdhsa_next_free_vgpr 13
.amdhsa_next_free_sgpr 16
.amdhsa_float_round_mode_32 0
.amdhsa_float_round_mode_16_64 0
.amdhsa_float_denorm_mode_32 3
.amdhsa_float_denorm_mode_16_64 3
.amdhsa_dx10_clamp 1
.amdhsa_ieee_mode 1
.amdhsa_fp16_overflow 0
.amdhsa_workgroup_processor_mode 1
.amdhsa_memory_ordered 1
.amdhsa_forward_progress 0
.amdhsa_shared_vgpr_count 0
.amdhsa_exception_fp_ieee_invalid_op 0
.amdhsa_exception_fp_denorm_src 0
.amdhsa_exception_fp_ieee_div_zero 0
.amdhsa_exception_fp_ieee_overflow 0
.amdhsa_exception_fp_ieee_underflow 0
.amdhsa_exception_fp_ieee_inexact 0
.amdhsa_exception_int_div_zero 0
.end_amdhsa_kernel
.text
.Lfunc_end1:
.size lambda_55652, .Lfunc_end1-lambda_55652
.section .AMDGPU.csdata,"",@progbits
.text
.p2alignl 7, 3214868480
.fill 96, 4, 3214868480
.type __hip_cuid_,@object
.section .bss,"aw",@nobits
.globl __hip_cuid_
__hip_cuid_:
.byte 0
.size __hip_cuid_, 1
.ident "AMD clang version 18.0.0git (https://github.com/RadeonOpenCompute/llvm-project roc-6.3.2 25012 e5bf7e55c91490b07c49d8960fa7983d864936c4)"
.section ".note.GNU-stack","",@progbits
.addrsig
.addrsig_sym __hip_cuid_
.amdgpu_metadata
---
amdhsa.kernels:
- .args:
- .address_space: global
.offset: 0
.size: 8
.value_kind: global_buffer
- .address_space: global
.offset: 8
.size: 8
.value_kind: global_buffer
- .offset: 16
.size: 4
.value_kind: hidden_block_count_x
- .offset: 20
.size: 4
.value_kind: hidden_block_count_y
- .offset: 24
.size: 4
.value_kind: hidden_block_count_z
- .offset: 28
.size: 2
.value_kind: hidden_group_size_x
- .offset: 30
.size: 2
.value_kind: hidden_group_size_y
- .offset: 32
.size: 2
.value_kind: hidden_group_size_z
- .offset: 34
.size: 2
.value_kind: hidden_remainder_x
- .offset: 36
.size: 2
.value_kind: hidden_remainder_y
- .offset: 38
.size: 2
.value_kind: hidden_remainder_z
- .offset: 56
.size: 8
.value_kind: hidden_global_offset_x
- .offset: 64
.size: 8
.value_kind: hidden_global_offset_y
- .offset: 72
.size: 8
.value_kind: hidden_global_offset_z
- .offset: 80
.size: 2
.value_kind: hidden_grid_dims
.group_segment_fixed_size: 0
.kernarg_segment_align: 8
.kernarg_segment_size: 272
.language: OpenCL C
.language_version:
- 2
- 0
.max_flat_workgroup_size: 128
.name: lambda_56187
.private_segment_fixed_size: 0
.sgpr_count: 18
.sgpr_spill_count: 0
.symbol: lambda_56187.kd
.uniform_work_group_size: 1
.uses_dynamic_stack: false
.vgpr_count: 13
.vgpr_spill_count: 0
.wavefront_size: 32
.workgroup_processor_mode: 1
- .args:
- .address_space: global
.offset: 0
.size: 8
.value_kind: global_buffer
- .address_space: global
.offset: 8
.size: 8
.value_kind: global_buffer
- .offset: 16
.size: 4
.value_kind: hidden_block_count_x
- .offset: 20
.size: 4
.value_kind: hidden_block_count_y
- .offset: 24
.size: 4
.value_kind: hidden_block_count_z
- .offset: 28
.size: 2
.value_kind: hidden_group_size_x
- .offset: 30
.size: 2
.value_kind: hidden_group_size_y
- .offset: 32
.size: 2
.value_kind: hidden_group_size_z
- .offset: 34
.size: 2
.value_kind: hidden_remainder_x
- .offset: 36
.size: 2
.value_kind: hidden_remainder_y
- .offset: 38
.size: 2
.value_kind: hidden_remainder_z
- .offset: 56
.size: 8
.value_kind: hidden_global_offset_x
- .offset: 64
.size: 8
.value_kind: hidden_global_offset_y
- .offset: 72
.size: 8
.value_kind: hidden_global_offset_z
- .offset: 80
.size: 2
.value_kind: hidden_grid_dims
.group_segment_fixed_size: 0
.kernarg_segment_align: 8
.kernarg_segment_size: 272
.language: OpenCL C
.language_version:
- 2
- 0
.max_flat_workgroup_size: 128
.name: lambda_55652
.private_segment_fixed_size: 0
.sgpr_count: 18
.sgpr_spill_count: 0
.symbol: lambda_55652.kd
.uniform_work_group_size: 1
.uses_dynamic_stack: false
.vgpr_count: 13
.vgpr_spill_count: 0
.wavefront_size: 32
.workgroup_processor_mode: 1
amdhsa.target: amdgcn-amd-amdhsa--gfx1100
amdhsa.version:
- 1
- 2
...
.end_amdgpu_metadata |
You are a helpful coding assistant specialized in converting HIP source code to AMD host assembly. | #include <hip/hip_runtime.h>
extern "C" {
__device__ inline int threadIdx_x() { return threadIdx.x; }
__device__ inline int threadIdx_y() { return threadIdx.y; }
__device__ inline int threadIdx_z() { return threadIdx.z; }
__device__ inline int blockIdx_x() { return blockIdx.x; }
__device__ inline int blockIdx_y() { return blockIdx.y; }
__device__ inline int blockIdx_z() { return blockIdx.z; }
__device__ inline int blockDim_x() { return blockDim.x; }
__device__ inline int blockDim_y() { return blockDim.y; }
__device__ inline int blockDim_z() { return blockDim.z; }
__device__ inline int gridDim_x() { return gridDim.x; }
__device__ inline int gridDim_y() { return gridDim.y; }
__device__ inline int gridDim_z() { return gridDim.z; }
__global__ void lambda_56187(float*, float*);
__global__ void lambda_55652(float*, float*);
__global__ __launch_bounds__ (128 * 1 * 1) void lambda_56187(float* _56190_61351, float* _56191_61352) {
int threadIdx_x_61358;
int pthreadIdx_x_61358;
int blockDim_x_61364;
int pblockDim_x_61364;
int blockIdx_x_61370;
int pblockIdx_x_61370;
int _61376;
int p_61376;
int _61382;
int p_61382;
int _61388;
int p_61388;
int _61391;
int p_61391;
int converge_61400;
int pconverge_61400;
int converge_61405;
int pconverge_61405;
int converge_61411;
int pconverge_61411;
int converge_61415;
int pconverge_61415;
float _61425;
float p_61425;
int converge_61431;
int pconverge_61431;
int converge_61435;
int pconverge_61435;
int converge_61438;
int pconverge_61438;
int converge_61442;
int pconverge_61442;
float _61448;
float p_61448;
int converge_61452;
int pconverge_61452;
int converge_61456;
int pconverge_61456;
int converge_61459;
int pconverge_61459;
int converge_61463;
int pconverge_61463;
float _61469;
float p_61469;
int converge_61475;
int pconverge_61475;
int converge_61479;
int pconverge_61479;
int converge_61482;
int pconverge_61482;
int converge_61486;
int pconverge_61486;
float _61492;
float p_61492;
int converge_61498;
int pconverge_61498;
int converge_61502;
int pconverge_61502;
int converge_61505;
int pconverge_61505;
int converge_61509;
int pconverge_61509;
float _61515;
float p_61515;
threadIdx_x_61358 = threadIdx_x();
pthreadIdx_x_61358 = threadIdx_x_61358;
l61356: ;
threadIdx_x_61358 = pthreadIdx_x_61358;
blockDim_x_61364 = blockDim_x();
pblockDim_x_61364 = blockDim_x_61364;
l61362: ;
blockDim_x_61364 = pblockDim_x_61364;
blockIdx_x_61370 = blockIdx_x();
pblockIdx_x_61370 = blockIdx_x_61370;
l61368: ;
blockIdx_x_61370 = pblockIdx_x_61370;
_61376 = threadIdx_y();
p_61376 = _61376;
l61374: ;
_61376 = p_61376;
_61382 = blockDim_y();
p_61382 = _61382;
l61380: ;
_61382 = p_61382;
_61388 = blockIdx_y();
p_61388 = _61388;
l61386: ;
_61388 = p_61388;
_61391 = blockDim_y();
p_61391 = _61391;
l61389: ;
_61391 = p_61391;
int _61393;
_61393 = blockDim_x_61364 * blockIdx_x_61370;
int _61394;
_61394 = threadIdx_x_61358 + _61393;
int _61395;
_61395 = -2 + _61394;
bool _61397;
_61397 = _61395 < 0;
if (_61397) goto l61398; else goto l61554;
l61554: ;
pconverge_61400 = _61395;
goto l61399;
l61398: ;
pconverge_61400 = 0;
goto l61399;
l61399: ;
converge_61400 = pconverge_61400;
bool _61402;
_61402 = 4096 <= converge_61400;
if (_61402) goto l61403; else goto l61553;
l61553: ;
pconverge_61405 = converge_61400;
goto l61404;
l61403: ;
pconverge_61405 = 4095;
goto l61404;
l61404: ;
converge_61405 = pconverge_61405;
int _61406;
_61406 = _61382 * _61388;
int gid_y_61407;
gid_y_61407 = _61376 + _61406;
bool _61408;
_61408 = gid_y_61407 < 0;
if (_61408) goto l61409; else goto l61552;
l61552: ;
pconverge_61411 = gid_y_61407;
goto l61410;
l61409: ;
pconverge_61411 = 0;
goto l61410;
l61410: ;
converge_61411 = pconverge_61411;
bool _61412;
_61412 = 4096 <= converge_61411;
if (_61412) goto l61413; else goto l61551;
l61551: ;
pconverge_61415 = converge_61411;
goto l61414;
l61413: ;
pconverge_61415 = 4095;
goto l61414;
l61414: ;
converge_61415 = pconverge_61415;
int _61420;
_61420 = 4096 * converge_61415;
int _61421;
_61421 = _61420 + converge_61405;
float* idx_61422;
idx_61422 = _56190_61351 + _61421;
_61425 = __ldg(idx_61422);
p_61425 = _61425;
l61423: ;
_61425 = p_61425;
int _61427;
_61427 = -1 + _61394;
bool _61428;
_61428 = _61427 < 0;
if (_61428) goto l61429; else goto l61550;
l61550: ;
pconverge_61431 = _61427;
goto l61430;
l61429: ;
pconverge_61431 = 0;
goto l61430;
l61430: ;
converge_61431 = pconverge_61431;
bool _61432;
_61432 = 4096 <= converge_61431;
if (_61432) goto l61433; else goto l61549;
l61549: ;
pconverge_61435 = converge_61431;
goto l61434;
l61433: ;
pconverge_61435 = 4095;
goto l61434;
l61434: ;
converge_61435 = pconverge_61435;
if (_61408) goto l61436; else goto l61548;
l61548: ;
pconverge_61438 = gid_y_61407;
goto l61437;
l61436: ;
pconverge_61438 = 0;
goto l61437;
l61437: ;
converge_61438 = pconverge_61438;
bool _61439;
_61439 = 4096 <= converge_61438;
if (_61439) goto l61440; else goto l61547;
l61547: ;
pconverge_61442 = converge_61438;
goto l61441;
l61440: ;
pconverge_61442 = 4095;
goto l61441;
l61441: ;
converge_61442 = pconverge_61442;
int _61443;
_61443 = 4096 * converge_61442;
int _61444;
_61444 = _61443 + converge_61435;
float* idx_61445;
idx_61445 = _56190_61351 + _61444;
_61448 = __ldg(idx_61445);
p_61448 = _61448;
l61446: ;
_61448 = p_61448;
bool _61449;
_61449 = _61394 < 0;
if (_61449) goto l61450; else goto l61546;
l61546: ;
pconverge_61452 = _61394;
goto l61451;
l61450: ;
pconverge_61452 = 0;
goto l61451;
l61451: ;
converge_61452 = pconverge_61452;
bool _61453;
_61453 = 4096 <= converge_61452;
if (_61453) goto l61454; else goto l61545;
l61545: ;
pconverge_61456 = converge_61452;
goto l61455;
l61454: ;
pconverge_61456 = 4095;
goto l61455;
l61455: ;
converge_61456 = pconverge_61456;
if (_61408) goto l61457; else goto l61544;
l61544: ;
pconverge_61459 = gid_y_61407;
goto l61458;
l61457: ;
pconverge_61459 = 0;
goto l61458;
l61458: ;
converge_61459 = pconverge_61459;
bool _61460;
_61460 = 4096 <= converge_61459;
if (_61460) goto l61461; else goto l61543;
l61543: ;
pconverge_61463 = converge_61459;
goto l61462;
l61461: ;
pconverge_61463 = 4095;
goto l61462;
l61462: ;
converge_61463 = pconverge_61463;
int _61464;
_61464 = 4096 * converge_61463;
int _61465;
_61465 = _61464 + converge_61456;
float* idx_61466;
idx_61466 = _56190_61351 + _61465;
_61469 = __ldg(idx_61466);
p_61469 = _61469;
l61467: ;
_61469 = p_61469;
int _61471;
_61471 = 1 + _61394;
bool _61472;
_61472 = _61471 < 0;
if (_61472) goto l61473; else goto l61542;
l61542: ;
pconverge_61475 = _61471;
goto l61474;
l61473: ;
pconverge_61475 = 0;
goto l61474;
l61474: ;
converge_61475 = pconverge_61475;
bool _61476;
_61476 = 4096 <= converge_61475;
if (_61476) goto l61477; else goto l61541;
l61541: ;
pconverge_61479 = converge_61475;
goto l61478;
l61477: ;
pconverge_61479 = 4095;
goto l61478;
l61478: ;
converge_61479 = pconverge_61479;
if (_61408) goto l61480; else goto l61540;
l61540: ;
pconverge_61482 = gid_y_61407;
goto l61481;
l61480: ;
pconverge_61482 = 0;
goto l61481;
l61481: ;
converge_61482 = pconverge_61482;
bool _61483;
_61483 = 4096 <= converge_61482;
if (_61483) goto l61484; else goto l61539;
l61539: ;
pconverge_61486 = converge_61482;
goto l61485;
l61484: ;
pconverge_61486 = 4095;
goto l61485;
l61485: ;
converge_61486 = pconverge_61486;
int _61487;
_61487 = 4096 * converge_61486;
int _61488;
_61488 = _61487 + converge_61479;
float* idx_61489;
idx_61489 = _56190_61351 + _61488;
_61492 = __ldg(idx_61489);
p_61492 = _61492;
l61490: ;
_61492 = p_61492;
int _61494;
_61494 = 2 + _61394;
bool _61495;
_61495 = _61494 < 0;
if (_61495) goto l61496; else goto l61538;
l61538: ;
pconverge_61498 = _61494;
goto l61497;
l61496: ;
pconverge_61498 = 0;
goto l61497;
l61497: ;
converge_61498 = pconverge_61498;
bool _61499;
_61499 = 4096 <= converge_61498;
if (_61499) goto l61500; else goto l61537;
l61537: ;
pconverge_61502 = converge_61498;
goto l61501;
l61500: ;
pconverge_61502 = 4095;
goto l61501;
l61501: ;
converge_61502 = pconverge_61502;
if (_61408) goto l61503; else goto l61536;
l61536: ;
pconverge_61505 = gid_y_61407;
goto l61504;
l61503: ;
pconverge_61505 = 0;
goto l61504;
l61504: ;
converge_61505 = pconverge_61505;
bool _61506;
_61506 = 4096 <= converge_61505;
if (_61506) goto l61507; else goto l61535;
l61535: ;
pconverge_61509 = converge_61505;
goto l61508;
l61507: ;
pconverge_61509 = 4095;
goto l61508;
l61508: ;
converge_61509 = pconverge_61509;
int _61510;
_61510 = 4096 * converge_61509;
int _61511;
_61511 = _61510 + converge_61502;
float* idx_61512;
idx_61512 = _56190_61351 + _61511;
_61515 = __ldg(idx_61512);
p_61515 = _61515;
l61513: ;
_61515 = p_61515;
int _61516;
_61516 = 4096 * gid_y_61407;
float _61524;
_61524 = 2.444600e-01f * _61448;
float _61521;
_61521 = 7.076600e-02f * _61425;
float _61531;
_61531 = 7.076600e-02f * _61515;
float _61529;
_61529 = 2.444600e-01f * _61492;
float _61522;
_61522 = 0.000000e+00f + _61521;
float _61525;
_61525 = _61522 + _61524;
float _61527;
_61527 = 3.695460e-01f * _61469;
int _61517;
_61517 = _61516 + _61394;
float _61528;
_61528 = _61525 + _61527;
float* idx_61518;
idx_61518 = _56191_61352 + _61517;
float _61530;
_61530 = _61528 + _61529;
float _61532;
_61532 = _61530 + _61531;
*idx_61518 = _61532;
return ;
}
__global__ __launch_bounds__ (32 * 4 * 1) void lambda_55652(float* _55655_61558, float* _55656_61559) {
int threadIdx_x_61562;
int pthreadIdx_x_61562;
int blockDim_x_61565;
int pblockDim_x_61565;
int blockIdx_x_61568;
int pblockIdx_x_61568;
int _61571;
int p_61571;
int _61574;
int p_61574;
int _61577;
int p_61577;
int _61580;
int p_61580;
int converge_61586;
int pconverge_61586;
int converge_61590;
int pconverge_61590;
int converge_61597;
int pconverge_61597;
int converge_61601;
int pconverge_61601;
float _61607;
float p_61607;
int converge_61610;
int pconverge_61610;
int converge_61614;
int pconverge_61614;
int converge_61619;
int pconverge_61619;
int converge_61623;
int pconverge_61623;
float _61629;
float p_61629;
int converge_61632;
int pconverge_61632;
int converge_61636;
int pconverge_61636;
int converge_61640;
int pconverge_61640;
int converge_61644;
int pconverge_61644;
float _61650;
float p_61650;
int converge_61653;
int pconverge_61653;
int converge_61657;
int pconverge_61657;
int converge_61662;
int pconverge_61662;
int converge_61666;
int pconverge_61666;
float _61672;
float p_61672;
int converge_61675;
int pconverge_61675;
int converge_61679;
int pconverge_61679;
int converge_61684;
int pconverge_61684;
int converge_61688;
int pconverge_61688;
float _61694;
float p_61694;
threadIdx_x_61562 = threadIdx_x();
pthreadIdx_x_61562 = threadIdx_x_61562;
l61560: ;
threadIdx_x_61562 = pthreadIdx_x_61562;
blockDim_x_61565 = blockDim_x();
pblockDim_x_61565 = blockDim_x_61565;
l61563: ;
blockDim_x_61565 = pblockDim_x_61565;
blockIdx_x_61568 = blockIdx_x();
pblockIdx_x_61568 = blockIdx_x_61568;
l61566: ;
blockIdx_x_61568 = pblockIdx_x_61568;
_61571 = threadIdx_y();
p_61571 = _61571;
l61569: ;
_61571 = p_61571;
_61574 = blockDim_y();
p_61574 = _61574;
l61572: ;
_61574 = p_61574;
_61577 = blockIdx_y();
p_61577 = _61577;
l61575: ;
_61577 = p_61577;
_61580 = blockDim_y();
p_61580 = _61580;
l61578: ;
_61580 = p_61580;
int _61581;
_61581 = blockDim_x_61565 * blockIdx_x_61568;
int _61582;
_61582 = threadIdx_x_61562 + _61581;
bool _61583;
_61583 = _61582 < 0;
if (_61583) goto l61584; else goto l61728;
l61728: ;
pconverge_61586 = _61582;
goto l61585;
l61584: ;
pconverge_61586 = 0;
goto l61585;
l61585: ;
converge_61586 = pconverge_61586;
bool _61587;
_61587 = 4096 <= converge_61586;
if (_61587) goto l61588; else goto l61727;
l61727: ;
pconverge_61590 = converge_61586;
goto l61589;
l61588: ;
pconverge_61590 = 4095;
goto l61589;
l61589: ;
converge_61590 = pconverge_61590;
int _61591;
_61591 = _61574 * _61577;
int gid_y_61592;
gid_y_61592 = _61571 + _61591;
int _61593;
_61593 = -2 + gid_y_61592;
bool _61594;
_61594 = _61593 < 0;
if (_61594) goto l61595; else goto l61726;
l61726: ;
pconverge_61597 = _61593;
goto l61596;
l61595: ;
pconverge_61597 = 0;
goto l61596;
l61596: ;
converge_61597 = pconverge_61597;
bool _61598;
_61598 = 4096 <= converge_61597;
if (_61598) goto l61599; else goto l61725;
l61725: ;
pconverge_61601 = converge_61597;
goto l61600;
l61599: ;
pconverge_61601 = 4095;
goto l61600;
l61600: ;
converge_61601 = pconverge_61601;
int _61602;
_61602 = 4096 * converge_61601;
int _61603;
_61603 = _61602 + converge_61590;
float* idx_61604;
idx_61604 = _55655_61558 + _61603;
_61607 = __ldg(idx_61604);
p_61607 = _61607;
l61605: ;
_61607 = p_61607;
if (_61583) goto l61608; else goto l61724;
l61724: ;
pconverge_61610 = _61582;
goto l61609;
l61608: ;
pconverge_61610 = 0;
goto l61609;
l61609: ;
converge_61610 = pconverge_61610;
bool _61611;
_61611 = 4096 <= converge_61610;
if (_61611) goto l61612; else goto l61723;
l61723: ;
pconverge_61614 = converge_61610;
goto l61613;
l61612: ;
pconverge_61614 = 4095;
goto l61613;
l61613: ;
converge_61614 = pconverge_61614;
int _61615;
_61615 = -1 + gid_y_61592;
bool _61616;
_61616 = _61615 < 0;
if (_61616) goto l61617; else goto l61722;
l61722: ;
pconverge_61619 = _61615;
goto l61618;
l61617: ;
pconverge_61619 = 0;
goto l61618;
l61618: ;
converge_61619 = pconverge_61619;
bool _61620;
_61620 = 4096 <= converge_61619;
if (_61620) goto l61621; else goto l61721;
l61721: ;
pconverge_61623 = converge_61619;
goto l61622;
l61621: ;
pconverge_61623 = 4095;
goto l61622;
l61622: ;
converge_61623 = pconverge_61623;
int _61624;
_61624 = 4096 * converge_61623;
int _61625;
_61625 = _61624 + converge_61614;
float* idx_61626;
idx_61626 = _55655_61558 + _61625;
_61629 = __ldg(idx_61626);
p_61629 = _61629;
l61627: ;
_61629 = p_61629;
if (_61583) goto l61630; else goto l61720;
l61720: ;
pconverge_61632 = _61582;
goto l61631;
l61630: ;
pconverge_61632 = 0;
goto l61631;
l61631: ;
converge_61632 = pconverge_61632;
bool _61633;
_61633 = 4096 <= converge_61632;
if (_61633) goto l61634; else goto l61719;
l61719: ;
pconverge_61636 = converge_61632;
goto l61635;
l61634: ;
pconverge_61636 = 4095;
goto l61635;
l61635: ;
converge_61636 = pconverge_61636;
bool _61637;
_61637 = gid_y_61592 < 0;
if (_61637) goto l61638; else goto l61718;
l61718: ;
pconverge_61640 = gid_y_61592;
goto l61639;
l61638: ;
pconverge_61640 = 0;
goto l61639;
l61639: ;
converge_61640 = pconverge_61640;
bool _61641;
_61641 = 4096 <= converge_61640;
if (_61641) goto l61642; else goto l61717;
l61717: ;
pconverge_61644 = converge_61640;
goto l61643;
l61642: ;
pconverge_61644 = 4095;
goto l61643;
l61643: ;
converge_61644 = pconverge_61644;
int _61645;
_61645 = 4096 * converge_61644;
int _61646;
_61646 = _61645 + converge_61636;
float* idx_61647;
idx_61647 = _55655_61558 + _61646;
_61650 = __ldg(idx_61647);
p_61650 = _61650;
l61648: ;
_61650 = p_61650;
if (_61583) goto l61651; else goto l61716;
l61716: ;
pconverge_61653 = _61582;
goto l61652;
l61651: ;
pconverge_61653 = 0;
goto l61652;
l61652: ;
converge_61653 = pconverge_61653;
bool _61654;
_61654 = 4096 <= converge_61653;
if (_61654) goto l61655; else goto l61715;
l61715: ;
pconverge_61657 = converge_61653;
goto l61656;
l61655: ;
pconverge_61657 = 4095;
goto l61656;
l61656: ;
converge_61657 = pconverge_61657;
int _61658;
_61658 = 1 + gid_y_61592;
bool _61659;
_61659 = _61658 < 0;
if (_61659) goto l61660; else goto l61714;
l61714: ;
pconverge_61662 = _61658;
goto l61661;
l61660: ;
pconverge_61662 = 0;
goto l61661;
l61661: ;
converge_61662 = pconverge_61662;
bool _61663;
_61663 = 4096 <= converge_61662;
if (_61663) goto l61664; else goto l61713;
l61713: ;
pconverge_61666 = converge_61662;
goto l61665;
l61664: ;
pconverge_61666 = 4095;
goto l61665;
l61665: ;
converge_61666 = pconverge_61666;
int _61667;
_61667 = 4096 * converge_61666;
int _61668;
_61668 = _61667 + converge_61657;
float* idx_61669;
idx_61669 = _55655_61558 + _61668;
_61672 = __ldg(idx_61669);
p_61672 = _61672;
l61670: ;
_61672 = p_61672;
if (_61583) goto l61673; else goto l61712;
l61712: ;
pconverge_61675 = _61582;
goto l61674;
l61673: ;
pconverge_61675 = 0;
goto l61674;
l61674: ;
converge_61675 = pconverge_61675;
bool _61676;
_61676 = 4096 <= converge_61675;
if (_61676) goto l61677; else goto l61711;
l61711: ;
pconverge_61679 = converge_61675;
goto l61678;
l61677: ;
pconverge_61679 = 4095;
goto l61678;
l61678: ;
converge_61679 = pconverge_61679;
int _61680;
_61680 = 2 + gid_y_61592;
bool _61681;
_61681 = _61680 < 0;
if (_61681) goto l61682; else goto l61710;
l61710: ;
pconverge_61684 = _61680;
goto l61683;
l61682: ;
pconverge_61684 = 0;
goto l61683;
l61683: ;
converge_61684 = pconverge_61684;
bool _61685;
_61685 = 4096 <= converge_61684;
if (_61685) goto l61686; else goto l61709;
l61709: ;
pconverge_61688 = converge_61684;
goto l61687;
l61686: ;
pconverge_61688 = 4095;
goto l61687;
l61687: ;
converge_61688 = pconverge_61688;
int _61689;
_61689 = 4096 * converge_61688;
int _61690;
_61690 = _61689 + converge_61679;
float* idx_61691;
idx_61691 = _55655_61558 + _61690;
_61694 = __ldg(idx_61691);
p_61694 = _61694;
l61692: ;
_61694 = p_61694;
float _61700;
_61700 = 2.444600e-01f * _61629;
float _61706;
_61706 = 7.076600e-02f * _61694;
int _61695;
_61695 = 4096 * gid_y_61592;
float _61704;
_61704 = 2.444600e-01f * _61672;
float _61702;
_61702 = 3.695460e-01f * _61650;
float _61698;
_61698 = 7.076600e-02f * _61607;
int _61696;
_61696 = _61695 + _61582;
float _61699;
_61699 = 0.000000e+00f + _61698;
float* idx_61697;
idx_61697 = _55656_61559 + _61696;
float _61701;
_61701 = _61699 + _61700;
float _61703;
_61703 = _61701 + _61702;
float _61705;
_61705 = _61703 + _61704;
float _61707;
_61707 = _61705 + _61706;
*idx_61697 = _61707;
return ;
}
} | .text
.file "gaussian.hip"
.globl __device_stub__lambda_56187 # -- Begin function __device_stub__lambda_56187
.p2align 4, 0x90
.type __device_stub__lambda_56187,@function
__device_stub__lambda_56187: # @__device_stub__lambda_56187
.cfi_startproc
# %bb.0:
subq $88, %rsp
.cfi_def_cfa_offset 96
movq %rdi, 56(%rsp)
movq %rsi, 48(%rsp)
leaq 56(%rsp), %rax
movq %rax, 64(%rsp)
leaq 48(%rsp), %rax
movq %rax, 72(%rsp)
leaq 32(%rsp), %rdi
leaq 16(%rsp), %rsi
leaq 8(%rsp), %rdx
movq %rsp, %rcx
callq __hipPopCallConfiguration
movq 32(%rsp), %rsi
movl 40(%rsp), %edx
movq 16(%rsp), %rcx
movl 24(%rsp), %r8d
leaq 64(%rsp), %r9
movl $lambda_56187, %edi
pushq (%rsp)
.cfi_adjust_cfa_offset 8
pushq 16(%rsp)
.cfi_adjust_cfa_offset 8
callq hipLaunchKernel
addq $104, %rsp
.cfi_adjust_cfa_offset -104
retq
.Lfunc_end0:
.size __device_stub__lambda_56187, .Lfunc_end0-__device_stub__lambda_56187
.cfi_endproc
# -- End function
.globl __device_stub__lambda_55652 # -- Begin function __device_stub__lambda_55652
.p2align 4, 0x90
.type __device_stub__lambda_55652,@function
__device_stub__lambda_55652: # @__device_stub__lambda_55652
.cfi_startproc
# %bb.0:
subq $88, %rsp
.cfi_def_cfa_offset 96
movq %rdi, 56(%rsp)
movq %rsi, 48(%rsp)
leaq 56(%rsp), %rax
movq %rax, 64(%rsp)
leaq 48(%rsp), %rax
movq %rax, 72(%rsp)
leaq 32(%rsp), %rdi
leaq 16(%rsp), %rsi
leaq 8(%rsp), %rdx
movq %rsp, %rcx
callq __hipPopCallConfiguration
movq 32(%rsp), %rsi
movl 40(%rsp), %edx
movq 16(%rsp), %rcx
movl 24(%rsp), %r8d
leaq 64(%rsp), %r9
movl $lambda_55652, %edi
pushq (%rsp)
.cfi_adjust_cfa_offset 8
pushq 16(%rsp)
.cfi_adjust_cfa_offset 8
callq hipLaunchKernel
addq $104, %rsp
.cfi_adjust_cfa_offset -104
retq
.Lfunc_end1:
.size __device_stub__lambda_55652, .Lfunc_end1-__device_stub__lambda_55652
.cfi_endproc
# -- End function
.p2align 4, 0x90 # -- Begin function __hip_module_ctor
.type __hip_module_ctor,@function
__hip_module_ctor: # @__hip_module_ctor
.cfi_startproc
# %bb.0:
pushq %rbx
.cfi_def_cfa_offset 16
subq $32, %rsp
.cfi_def_cfa_offset 48
.cfi_offset %rbx, -16
cmpq $0, __hip_gpubin_handle(%rip)
jne .LBB2_2
# %bb.1:
movl $__hip_fatbin_wrapper, %edi
callq __hipRegisterFatBinary
movq %rax, __hip_gpubin_handle(%rip)
.LBB2_2:
movq __hip_gpubin_handle(%rip), %rbx
xorps %xmm0, %xmm0
movups %xmm0, 16(%rsp)
movups %xmm0, (%rsp)
movl $lambda_56187, %esi
movl $.L__unnamed_1, %edx
movl $.L__unnamed_1, %ecx
movq %rbx, %rdi
movl $-1, %r8d
xorl %r9d, %r9d
callq __hipRegisterFunction
xorps %xmm0, %xmm0
movups %xmm0, 16(%rsp)
movups %xmm0, (%rsp)
movl $lambda_55652, %esi
movl $.L__unnamed_2, %edx
movl $.L__unnamed_2, %ecx
movq %rbx, %rdi
movl $-1, %r8d
xorl %r9d, %r9d
callq __hipRegisterFunction
movl $__hip_module_dtor, %edi
addq $32, %rsp
.cfi_def_cfa_offset 16
popq %rbx
.cfi_def_cfa_offset 8
jmp atexit # TAILCALL
.Lfunc_end2:
.size __hip_module_ctor, .Lfunc_end2-__hip_module_ctor
.cfi_endproc
# -- End function
.p2align 4, 0x90 # -- Begin function __hip_module_dtor
.type __hip_module_dtor,@function
__hip_module_dtor: # @__hip_module_dtor
.cfi_startproc
# %bb.0:
movq __hip_gpubin_handle(%rip), %rdi
testq %rdi, %rdi
je .LBB3_2
# %bb.1:
pushq %rax
.cfi_def_cfa_offset 16
callq __hipUnregisterFatBinary
movq $0, __hip_gpubin_handle(%rip)
addq $8, %rsp
.cfi_def_cfa_offset 8
.LBB3_2:
retq
.Lfunc_end3:
.size __hip_module_dtor, .Lfunc_end3-__hip_module_dtor
.cfi_endproc
# -- End function
.type lambda_56187,@object # @lambda_56187
.section .rodata,"a",@progbits
.globl lambda_56187
.p2align 3, 0x0
lambda_56187:
.quad __device_stub__lambda_56187
.size lambda_56187, 8
.type lambda_55652,@object # @lambda_55652
.globl lambda_55652
.p2align 3, 0x0
lambda_55652:
.quad __device_stub__lambda_55652
.size lambda_55652, 8
.type .L__unnamed_1,@object # @0
.section .rodata.str1.1,"aMS",@progbits,1
.L__unnamed_1:
.asciz "lambda_56187"
.size .L__unnamed_1, 13
.type .L__unnamed_2,@object # @1
.L__unnamed_2:
.asciz "lambda_55652"
.size .L__unnamed_2, 13
.type __hip_fatbin_wrapper,@object # @__hip_fatbin_wrapper
.section .hipFatBinSegment,"a",@progbits
.p2align 3, 0x0
__hip_fatbin_wrapper:
.long 1212764230 # 0x48495046
.long 1 # 0x1
.quad __hip_fatbin
.quad 0
.size __hip_fatbin_wrapper, 24
.type __hip_gpubin_handle,@object # @__hip_gpubin_handle
.local __hip_gpubin_handle
.comm __hip_gpubin_handle,8,8
.section .init_array,"aw",@init_array
.p2align 3, 0x0
.quad __hip_module_ctor
.type __hip_cuid_,@object # @__hip_cuid_
.bss
.globl __hip_cuid_
__hip_cuid_:
.byte 0 # 0x0
.size __hip_cuid_, 1
.section ".linker-options","e",@llvm_linker_options
.ident "AMD clang version 18.0.0git (https://github.com/RadeonOpenCompute/llvm-project roc-6.3.2 25012 e5bf7e55c91490b07c49d8960fa7983d864936c4)"
.section ".note.GNU-stack","",@progbits
.addrsig
.addrsig_sym __device_stub__lambda_56187
.addrsig_sym __device_stub__lambda_55652
.addrsig_sym __hip_module_ctor
.addrsig_sym __hip_module_dtor
.addrsig_sym lambda_56187
.addrsig_sym lambda_55652
.addrsig_sym __hip_fatbin
.addrsig_sym __hip_fatbin_wrapper
.addrsig_sym __hip_cuid_ |
You are a helpful coding assistant specialized in converting from CUDA device assembly to AMD device assembly. | code for sm_80
Function : lambda_55652
.headerflags @"EF_CUDA_TEXMODE_UNIFIED EF_CUDA_64BIT_ADDRESS EF_CUDA_SM80 EF_CUDA_VIRTUAL_SM(EF_CUDA_SM80)"
/*0000*/ IMAD.MOV.U32 R1, RZ, RZ, c[0x0][0x28] ; /* 0x00000a00ff017624 */
/* 0x000fe400078e00ff */
/*0010*/ S2R R3, SR_TID.Y ; /* 0x0000000000037919 */
/* 0x000e220000002200 */
/*0020*/ ULDC.64 UR4, c[0x0][0x118] ; /* 0x0000460000047ab9 */
/* 0x000fc60000000a00 */
/*0030*/ S2R R0, SR_CTAID.Y ; /* 0x0000000000007919 */
/* 0x000e280000002600 */
/*0040*/ S2R R2, SR_TID.X ; /* 0x0000000000027919 */
/* 0x000e680000002100 */
/*0050*/ S2R R5, SR_CTAID.X ; /* 0x0000000000057919 */
/* 0x000e620000002500 */
/*0060*/ IMAD R3, R0, c[0x0][0x4], R3 ; /* 0x0000010000037a24 */
/* 0x001fe400078e0203 */
/*0070*/ IMAD.MOV.U32 R0, RZ, RZ, 0x4 ; /* 0x00000004ff007424 */
/* 0x000fc600078e00ff */
/*0080*/ ISETP.GE.AND P0, PT, R3.reuse, 0x2, PT ; /* 0x000000020300780c */
/* 0x040fe40003f06270 */
/*0090*/ ISETP.GE.AND P1, PT, R3, 0x1, PT ; /* 0x000000010300780c */
/* 0x000fe20003f26270 */
/*00a0*/ IMAD R2, R5, c[0x0][0x0], R2 ; /* 0x0000000005027a24 */
/* 0x002fe200078e0202 */
/*00b0*/ IADD3 R5, R3.reuse, -0x2, RZ ; /* 0xfffffffe03057810 */
/* 0x040fe40007ffe0ff */
/*00c0*/ IADD3 R6, R3, -0x1, RZ ; /* 0xffffffff03067810 */
/* 0x000fe40007ffe0ff */
/*00d0*/ SEL R5, R5, RZ, P0 ; /* 0x000000ff05057207 */
/* 0x000fe40000000000 */
/*00e0*/ SEL R6, R6, RZ, P1 ; /* 0x000000ff06067207 */
/* 0x000fc40000800000 */
/*00f0*/ IMNMX R5, R5, 0xfff, PT ; /* 0x00000fff05057817 */
/* 0x000fe40003800200 */
/*0100*/ IMNMX R4, RZ, R2, !PT ; /* 0x00000002ff047217 */
/* 0x000fe40007800200 */
/*0110*/ IMNMX R7, RZ, R3, !PT ; /* 0x00000003ff077217 */
/* 0x000fe20007800200 */
/*0120*/ IMAD.SHL.U32 R5, R5, 0x1000, RZ ; /* 0x0000100005057824 */
/* 0x000fe200078e00ff */
/*0130*/ ISETP.GE.AND P2, PT, R3.reuse, -0x1, PT ; /* 0xffffffff0300780c */
/* 0x040fe40003f46270 */
/*0140*/ IADD3 R9, R3, 0x1, RZ ; /* 0x0000000103097810 */
/* 0x000fe40007ffe0ff */
/*0150*/ IMNMX R6, R6, 0xfff, PT ; /* 0x00000fff06067817 */
/* 0x000fc40003800200 */
/*0160*/ IMNMX R4, R4, 0xfff, PT ; /* 0x00000fff04047817 */
/* 0x000fe40003800200 */
/*0170*/ IMNMX R8, R7, 0xfff, PT ; /* 0x00000fff07087817 */
/* 0x000fe20003800200 */
/*0180*/ IMAD.SHL.U32 R7, R6, 0x1000, RZ ; /* 0x0000100006077824 */
/* 0x000fe200078e00ff */
/*0190*/ ISETP.GE.AND P3, PT, R3.reuse, -0x2, PT ; /* 0xfffffffe0300780c */
/* 0x040fe40003f66270 */
/*01a0*/ IADD3 R10, R3, 0x2, RZ ; /* 0x00000002030a7810 */
/* 0x000fe20007ffe0ff */
/*01b0*/ IMAD.SHL.U32 R11, R8, 0x1000, RZ ; /* 0x00001000080b7824 */
/* 0x000fe200078e00ff */
/*01c0*/ SEL R9, R9, RZ, P2 ; /* 0x000000ff09097207 */
/* 0x000fe40001000000 */
/*01d0*/ LOP3.LUT R5, R5, R4, RZ, 0xfc, !PT ; /* 0x0000000405057212 */
/* 0x000fc400078efcff */
/*01e0*/ SEL R10, R10, RZ, P3 ; /* 0x000000ff0a0a7207 */
/* 0x000fe40001800000 */
/*01f0*/ IMNMX R8, R9, 0xfff, PT ; /* 0x00000fff09087817 */
/* 0x000fe40003800200 */
/*0200*/ LOP3.LUT R9, R7, R4, RZ, 0xfc, !PT ; /* 0x0000000407097212 */
/* 0x000fe200078efcff */
/*0210*/ IMAD.WIDE R6, R5, R0, c[0x0][0x160] ; /* 0x0000580005067625 */
/* 0x000fe200078e0200 */
/*0220*/ IMNMX R10, R10, 0xfff, PT ; /* 0x00000fff0a0a7817 */
/* 0x000fe40003800200 */
/*0230*/ LOP3.LUT R11, R11, R4, RZ, 0xfc, !PT ; /* 0x000000040b0b7212 */
/* 0x000fe200078efcff */
/*0240*/ IMAD.SHL.U32 R5, R8, 0x1000, RZ ; /* 0x0000100008057824 */
/* 0x000fe400078e00ff */
/*0250*/ IMAD.WIDE R8, R9, R0, c[0x0][0x160] ; /* 0x0000580009087625 */
/* 0x000fe200078e0200 */
/*0260*/ LDG.E.CONSTANT R6, [R6.64] ; /* 0x0000000406067981 */
/* 0x000ea4000c1e9900 */
/*0270*/ LOP3.LUT R5, R5, R4, RZ, 0xfc, !PT ; /* 0x0000000405057212 */
/* 0x000fe200078efcff */
/*0280*/ IMAD.SHL.U32 R13, R10, 0x1000, RZ ; /* 0x000010000a0d7824 */
/* 0x000fc400078e00ff */
/*0290*/ IMAD.WIDE.U32 R10, R11, R0, c[0x0][0x160] ; /* 0x000058000b0a7625 */
/* 0x000fe200078e0000 */
/*02a0*/ LDG.E.CONSTANT R8, [R8.64] ; /* 0x0000000408087981 */
/* 0x000ee4000c1e9900 */
/*02b0*/ LOP3.LUT R13, R13, R4, RZ, 0xfc, !PT ; /* 0x000000040d0d7212 */
/* 0x000fe200078efcff */
/*02c0*/ IMAD.WIDE R4, R5, R0.reuse, c[0x0][0x160] ; /* 0x0000580005047625 */
/* 0x080fe400078e0200 */
/*02d0*/ LDG.E.CONSTANT R10, [R10.64] ; /* 0x000000040a0a7981 */
/* 0x000f24000c1e9900 */
/*02e0*/ IMAD.WIDE R12, R13, R0, c[0x0][0x160] ; /* 0x000058000d0c7625 */
/* 0x000fe400078e0200 */
/*02f0*/ LDG.E.CONSTANT R4, [R4.64] ; /* 0x0000000404047981 */
/* 0x000f68000c1e9900 */
/*0300*/ LDG.E.CONSTANT R12, [R12.64] ; /* 0x000000040c0c7981 */
/* 0x000f62000c1e9900 */
/*0310*/ IMAD R3, R3, 0x1000, R2 ; /* 0x0000100003037824 */
/* 0x000fc800078e0202 */
/*0320*/ IMAD.WIDE R2, R3, R0, c[0x0][0x168] ; /* 0x00005a0003027625 */
/* 0x000fc800078e0200 */
/*0330*/ FFMA R7, R6, 0.07076600193977355957, RZ ; /* 0x3d90edc406077823 */
/* 0x004fc800000000ff */
/*0340*/ FFMA R7, R8, 0.24446000158786773682, R7 ; /* 0x3e7a53b908077823 */
/* 0x008fc80000000007 */
/*0350*/ FFMA R7, R10, 0.36954599618911743164, R7 ; /* 0x3ebd35220a077823 */
/* 0x010fc80000000007 */
/*0360*/ FFMA R7, R4, 0.24446000158786773682, R7 ; /* 0x3e7a53b904077823 */
/* 0x020fc80000000007 */
/*0370*/ FFMA R7, R12, 0.07076600193977355957, R7 ; /* 0x3d90edc40c077823 */
/* 0x000fca0000000007 */
/*0380*/ STG.E [R2.64], R7 ; /* 0x0000000702007986 */
/* 0x000fe2000c101904 */
/*0390*/ EXIT ; /* 0x000000000000794d */
/* 0x000fea0003800000 */
/*03a0*/ BRA 0x3a0; /* 0xfffffff000007947 */
/* 0x000fc0000383ffff */
/*03b0*/ NOP; /* 0x0000000000007918 */
/* 0x000fc00000000000 */
/*03c0*/ NOP; /* 0x0000000000007918 */
/* 0x000fc00000000000 */
/*03d0*/ NOP; /* 0x0000000000007918 */
/* 0x000fc00000000000 */
/*03e0*/ NOP; /* 0x0000000000007918 */
/* 0x000fc00000000000 */
/*03f0*/ NOP; /* 0x0000000000007918 */
/* 0x000fc00000000000 */
/*0400*/ NOP; /* 0x0000000000007918 */
/* 0x000fc00000000000 */
/*0410*/ NOP; /* 0x0000000000007918 */
/* 0x000fc00000000000 */
/*0420*/ NOP; /* 0x0000000000007918 */
/* 0x000fc00000000000 */
/*0430*/ NOP; /* 0x0000000000007918 */
/* 0x000fc00000000000 */
/*0440*/ NOP; /* 0x0000000000007918 */
/* 0x000fc00000000000 */
/*0450*/ NOP; /* 0x0000000000007918 */
/* 0x000fc00000000000 */
/*0460*/ NOP; /* 0x0000000000007918 */
/* 0x000fc00000000000 */
/*0470*/ NOP; /* 0x0000000000007918 */
/* 0x000fc00000000000 */
..........
Function : lambda_56187
.headerflags @"EF_CUDA_TEXMODE_UNIFIED EF_CUDA_64BIT_ADDRESS EF_CUDA_SM80 EF_CUDA_VIRTUAL_SM(EF_CUDA_SM80)"
/*0000*/ IMAD.MOV.U32 R1, RZ, RZ, c[0x0][0x28] ; /* 0x00000a00ff017624 */
/* 0x000fe400078e00ff */
/*0010*/ S2R R2, SR_TID.X ; /* 0x0000000000027919 */
/* 0x000e220000002100 */
/*0020*/ ULDC.64 UR4, c[0x0][0x118] ; /* 0x0000460000047ab9 */
/* 0x000fc60000000a00 */
/*0030*/ S2R R3, SR_CTAID.X ; /* 0x0000000000037919 */
/* 0x000e280000002500 */
/*0040*/ S2R R0, SR_TID.Y ; /* 0x0000000000007919 */
/* 0x000e680000002200 */
/*0050*/ S2R R5, SR_CTAID.Y ; /* 0x0000000000057919 */
/* 0x000e620000002600 */
/*0060*/ IMAD R2, R3, c[0x0][0x0], R2 ; /* 0x0000000003027a24 */
/* 0x001fca00078e0202 */
/*0070*/ ISETP.GE.AND P2, PT, R2.reuse, 0x2, PT ; /* 0x000000020200780c */
/* 0x040fe40003f46270 */
/*0080*/ IADD3 R4, R2.reuse, -0x2, RZ ; /* 0xfffffffe02047810 */
/* 0x040fe20007ffe0ff */
/*0090*/ IMAD R3, R5, c[0x0][0x4], R0 ; /* 0x0000010005037a24 */
/* 0x002fe200078e0200 */
/*00a0*/ ISETP.GE.AND P1, PT, R2.reuse, 0x1, PT ; /* 0x000000010200780c */
/* 0x040fe20003f26270 */
/*00b0*/ IMAD.MOV.U32 R0, RZ, RZ, 0x4 ; /* 0x00000004ff007424 */
/* 0x000fe200078e00ff */
/*00c0*/ IADD3 R6, R2, -0x1, RZ ; /* 0xffffffff02067810 */
/* 0x000fe40007ffe0ff */
/*00d0*/ IMNMX R5, RZ, R3, !PT ; /* 0x00000003ff057217 */
/* 0x000fe40007800200 */
/*00e0*/ SEL R4, R4, RZ, P2 ; /* 0x000000ff04047207 */
/* 0x000fc40001000000 */
/*00f0*/ IMNMX R5, R5, 0xfff, PT ; /* 0x00000fff05057817 */
/* 0x000fe40003800200 */
/*0100*/ SEL R6, R6, RZ, P1 ; /* 0x000000ff06067207 */
/* 0x000fe40000800000 */
/*0110*/ IMNMX R4, R4, 0xfff, PT ; /* 0x00000fff04047817 */
/* 0x000fe20003800200 */
/*0120*/ IMAD.SHL.U32 R11, R5, 0x1000, RZ ; /* 0x00001000050b7824 */
/* 0x000fe200078e00ff */
/*0130*/ ISETP.GE.AND P0, PT, R2.reuse, -0x1, PT ; /* 0xffffffff0200780c */
/* 0x040fe40003f06270 */
/*0140*/ IADD3 R9, R2, 0x1, RZ ; /* 0x0000000102097810 */
/* 0x000fe20007ffe0ff */
/*0150*/ IMAD.IADD R5, R4, 0x1, R11 ; /* 0x0000000104057824 */
/* 0x000fe200078e020b */
/*0160*/ IMNMX R7, RZ, R2, !PT ; /* 0x00000002ff077217 */
/* 0x000fc40007800200 */
/*0170*/ IMNMX R6, R6, 0xfff, PT ; /* 0x00000fff06067817 */
/* 0x000fe20003800200 */
/*0180*/ IMAD.WIDE R4, R5, R0, c[0x0][0x160] ; /* 0x0000580005047625 */
/* 0x000fe200078e0200 */
/*0190*/ ISETP.GE.AND P2, PT, R2.reuse, -0x2, PT ; /* 0xfffffffe0200780c */
/* 0x040fe40003f46270 */
/*01a0*/ IADD3 R10, R2, 0x2, RZ ; /* 0x00000002020a7810 */
/* 0x000fe40007ffe0ff */
/*01b0*/ SEL R9, R9, RZ, P0 ; /* 0x000000ff09097207 */
/* 0x000fe20000000000 */
/*01c0*/ LDG.E.CONSTANT R4, [R4.64] ; /* 0x0000000404047981 */
/* 0x000ea2000c1e9900 */
/*01d0*/ IMNMX R8, R7, 0xfff, PT ; /* 0x00000fff07087817 */
/* 0x000fe20003800200 */
/*01e0*/ IMAD.IADD R7, R11, 0x1, R6 ; /* 0x000000010b077824 */
/* 0x000fe200078e0206 */
/*01f0*/ SEL R12, R10, RZ, P2 ; /* 0x000000ff0a0c7207 */
/* 0x000fc40001000000 */
/*0200*/ IMNMX R10, R9, 0xfff, PT ; /* 0x00000fff090a7817 */
/* 0x000fe20003800200 */
/*0210*/ IMAD.WIDE R6, R7, R0, c[0x0][0x160] ; /* 0x0000580007067625 */
/* 0x000fe200078e0200 */
/*0220*/ LOP3.LUT R9, R11.reuse, R8, RZ, 0xfc, !PT ; /* 0x000000080b097212 */
/* 0x040fe400078efcff */
/*0230*/ IMNMX R12, R12, 0xfff, PT ; /* 0x00000fff0c0c7817 */
/* 0x000fe20003800200 */
/*0240*/ IMAD.IADD R13, R11, 0x1, R10 ; /* 0x000000010b0d7824 */
/* 0x000fe400078e020a */
/*0250*/ IMAD.WIDE.U32 R8, R9, R0, c[0x0][0x160] ; /* 0x0000580009087625 */
/* 0x000fe200078e0000 */
/*0260*/ LDG.E.CONSTANT R6, [R6.64] ; /* 0x0000000406067981 */
/* 0x000ee6000c1e9900 */
/*0270*/ IMAD.IADD R15, R11, 0x1, R12 ; /* 0x000000010b0f7824 */
/* 0x000fc400078e020c */
/*0280*/ IMAD.WIDE R10, R13, R0.reuse, c[0x0][0x160] ; /* 0x000058000d0a7625 */
/* 0x080fe200078e0200 */
/*0290*/ LDG.E.CONSTANT R8, [R8.64] ; /* 0x0000000408087981 */
/* 0x000f26000c1e9900 */
/*02a0*/ IMAD.WIDE R12, R15, R0, c[0x0][0x160] ; /* 0x000058000f0c7625 */
/* 0x000fe400078e0200 */
/*02b0*/ LDG.E.CONSTANT R10, [R10.64] ; /* 0x000000040a0a7981 */
/* 0x000f68000c1e9900 */
/*02c0*/ LDG.E.CONSTANT R12, [R12.64] ; /* 0x000000040c0c7981 */
/* 0x000f62000c1e9900 */
/*02d0*/ IMAD R3, R3, 0x1000, R2 ; /* 0x0000100003037824 */
/* 0x000fc800078e0202 */
/*02e0*/ IMAD.WIDE R2, R3, R0, c[0x0][0x168] ; /* 0x00005a0003027625 */
/* 0x000fc800078e0200 */
/*02f0*/ FFMA R5, R4, 0.07076600193977355957, RZ ; /* 0x3d90edc404057823 */
/* 0x004fc800000000ff */
/*0300*/ FFMA R5, R6, 0.24446000158786773682, R5 ; /* 0x3e7a53b906057823 */
/* 0x008fc80000000005 */
/*0310*/ FFMA R5, R8, 0.36954599618911743164, R5 ; /* 0x3ebd352208057823 */
/* 0x010fc80000000005 */
/*0320*/ FFMA R5, R10, 0.24446000158786773682, R5 ; /* 0x3e7a53b90a057823 */
/* 0x020fc80000000005 */
/*0330*/ FFMA R5, R12, 0.07076600193977355957, R5 ; /* 0x3d90edc40c057823 */
/* 0x000fca0000000005 */
/*0340*/ STG.E [R2.64], R5 ; /* 0x0000000502007986 */
/* 0x000fe2000c101904 */
/*0350*/ EXIT ; /* 0x000000000000794d */
/* 0x000fea0003800000 */
/*0360*/ BRA 0x360; /* 0xfffffff000007947 */
/* 0x000fc0000383ffff */
/*0370*/ NOP; /* 0x0000000000007918 */
/* 0x000fc00000000000 */
/*0380*/ NOP; /* 0x0000000000007918 */
/* 0x000fc00000000000 */
/*0390*/ NOP; /* 0x0000000000007918 */
/* 0x000fc00000000000 */
/*03a0*/ NOP; /* 0x0000000000007918 */
/* 0x000fc00000000000 */
/*03b0*/ NOP; /* 0x0000000000007918 */
/* 0x000fc00000000000 */
/*03c0*/ NOP; /* 0x0000000000007918 */
/* 0x000fc00000000000 */
/*03d0*/ NOP; /* 0x0000000000007918 */
/* 0x000fc00000000000 */
/*03e0*/ NOP; /* 0x0000000000007918 */
/* 0x000fc00000000000 */
/*03f0*/ NOP; /* 0x0000000000007918 */
/* 0x000fc00000000000 */
.......... | .text
.amdgcn_target "amdgcn-amd-amdhsa--gfx1100"
.protected lambda_56187
.globl lambda_56187
.p2align 8
.type lambda_56187,@function
lambda_56187:
s_load_b32 s2, s[0:1], 0x1c
v_and_b32_e32 v1, 0x3ff, v0
v_bfe_u32 v0, v0, 10, 10
s_waitcnt lgkmcnt(0)
s_and_b32 s3, s2, 0xffff
s_lshr_b32 s2, s2, 16
v_mad_u64_u32 v[2:3], null, s14, s3, v[1:2]
v_mad_u64_u32 v[3:4], null, s15, s2, v[0:1]
s_load_b128 s[0:3], s[0:1], 0x0
v_mov_b32_e32 v1, 0
s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_1) | instid1(VALU_DEP_4)
v_min_i32_e32 v0, 0x1001, v2
v_cmp_lt_i32_e32 vcc_lo, 1, v2
v_max_i32_e32 v4, 0, v3
v_min_i32_e32 v6, 0x1000, v2
v_min_i32_e32 v8, 0xffe, v2
v_add_nc_u32_e32 v0, -2, v0
v_min_i32_e32 v9, 0xffd, v2
v_min_i32_e32 v5, 0xfff, v4
s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_4)
v_add_nc_u32_e32 v8, 1, v8
v_cndmask_b32_e32 v0, 0, v0, vcc_lo
v_cmp_lt_i32_e32 vcc_lo, 0, v2
s_delay_alu instid0(VALU_DEP_4)
v_lshlrev_b32_e32 v7, 12, v5
v_add_nc_u32_e32 v9, 2, v9
v_lshlrev_b32_e32 v11, 12, v4
v_add_nc_u32_e32 v6, -1, v6
v_max_i32_e32 v5, 0, v2
v_add_nc_u32_e32 v0, v7, v0
s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_1) | instid1(VALU_DEP_4)
v_cndmask_b32_e32 v6, 0, v6, vcc_lo
v_cmp_gt_i32_e32 vcc_lo, 0x1000, v3
v_min_u32_e32 v10, 0xfff, v5
s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_4)
v_lshlrev_b64 v[4:5], 2, v[0:1]
v_dual_cndmask_b32 v11, 0xfff000, v11 :: v_dual_add_nc_u32 v0, v7, v6
v_cmp_lt_i32_e32 vcc_lo, -2, v2
s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_3)
v_lshlrev_b64 v[6:7], 2, v[0:1]
v_or_b32_e32 v0, v11, v10
v_cndmask_b32_e32 v12, 0, v8, vcc_lo
s_waitcnt lgkmcnt(0)
v_add_co_u32 v4, vcc_lo, s0, v4
v_add_co_ci_u32_e32 v5, vcc_lo, s1, v5, vcc_lo
v_cmp_lt_i32_e32 vcc_lo, -3, v2
v_cndmask_b32_e32 v10, 0, v9, vcc_lo
v_lshlrev_b64 v[8:9], 2, v[0:1]
v_add_nc_u32_e32 v0, v11, v12
global_load_b32 v12, v[4:5], off
v_add_co_u32 v4, vcc_lo, s0, v6
v_add_co_ci_u32_e32 v5, vcc_lo, s1, v7, vcc_lo
v_lshlrev_b64 v[6:7], 2, v[0:1]
v_add_nc_u32_e32 v0, v11, v10
v_add_co_u32 v8, vcc_lo, s0, v8
v_add_co_ci_u32_e32 v9, vcc_lo, s1, v9, vcc_lo
s_delay_alu instid0(VALU_DEP_3)
v_lshlrev_b64 v[0:1], 2, v[0:1]
s_clause 0x1
global_load_b32 v10, v[4:5], off
global_load_b32 v8, v[8:9], off
v_add_co_u32 v4, vcc_lo, s0, v6
v_add_co_ci_u32_e32 v5, vcc_lo, s1, v7, vcc_lo
v_add_co_u32 v0, vcc_lo, s0, v0
v_add_co_ci_u32_e32 v1, vcc_lo, s1, v1, vcc_lo
s_clause 0x1
global_load_b32 v4, v[4:5], off
global_load_b32 v5, v[0:1], off
v_lshl_add_u32 v0, v3, 12, v2
s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
v_ashrrev_i32_e32 v1, 31, v0
v_lshlrev_b64 v[0:1], 2, v[0:1]
s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_2)
v_add_co_u32 v0, vcc_lo, s2, v0
v_add_co_ci_u32_e32 v1, vcc_lo, s3, v1, vcc_lo
s_waitcnt vmcnt(4)
v_fma_f32 v6, v12, 0x3d90edc4, 0
s_waitcnt vmcnt(3)
s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
v_fmac_f32_e32 v6, 0x3e7a53b9, v10
s_waitcnt vmcnt(2)
v_fmamk_f32 v2, v8, 0x3ebd3522, v6
s_waitcnt vmcnt(1)
s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
v_fmac_f32_e32 v2, 0x3e7a53b9, v4
s_waitcnt vmcnt(0)
v_fmac_f32_e32 v2, 0x3d90edc4, v5
global_store_b32 v[0:1], v2, off
s_nop 0
s_sendmsg sendmsg(MSG_DEALLOC_VGPRS)
s_endpgm
.section .rodata,"a",@progbits
.p2align 6, 0x0
.amdhsa_kernel lambda_56187
.amdhsa_group_segment_fixed_size 0
.amdhsa_private_segment_fixed_size 0
.amdhsa_kernarg_size 272
.amdhsa_user_sgpr_count 14
.amdhsa_user_sgpr_dispatch_ptr 0
.amdhsa_user_sgpr_queue_ptr 0
.amdhsa_user_sgpr_kernarg_segment_ptr 1
.amdhsa_user_sgpr_dispatch_id 0
.amdhsa_user_sgpr_private_segment_size 0
.amdhsa_wavefront_size32 1
.amdhsa_uses_dynamic_stack 0
.amdhsa_enable_private_segment 0
.amdhsa_system_sgpr_workgroup_id_x 1
.amdhsa_system_sgpr_workgroup_id_y 1
.amdhsa_system_sgpr_workgroup_id_z 0
.amdhsa_system_sgpr_workgroup_info 0
.amdhsa_system_vgpr_workitem_id 1
.amdhsa_next_free_vgpr 13
.amdhsa_next_free_sgpr 16
.amdhsa_float_round_mode_32 0
.amdhsa_float_round_mode_16_64 0
.amdhsa_float_denorm_mode_32 3
.amdhsa_float_denorm_mode_16_64 3
.amdhsa_dx10_clamp 1
.amdhsa_ieee_mode 1
.amdhsa_fp16_overflow 0
.amdhsa_workgroup_processor_mode 1
.amdhsa_memory_ordered 1
.amdhsa_forward_progress 0
.amdhsa_shared_vgpr_count 0
.amdhsa_exception_fp_ieee_invalid_op 0
.amdhsa_exception_fp_denorm_src 0
.amdhsa_exception_fp_ieee_div_zero 0
.amdhsa_exception_fp_ieee_overflow 0
.amdhsa_exception_fp_ieee_underflow 0
.amdhsa_exception_fp_ieee_inexact 0
.amdhsa_exception_int_div_zero 0
.end_amdhsa_kernel
.text
.Lfunc_end0:
.size lambda_56187, .Lfunc_end0-lambda_56187
.section .AMDGPU.csdata,"",@progbits
.text
.protected lambda_55652
.globl lambda_55652
.p2align 8
.type lambda_55652,@function
lambda_55652:
s_load_b32 s2, s[0:1], 0x1c
v_bfe_u32 v1, v0, 10, 10
v_and_b32_e32 v0, 0x3ff, v0
s_waitcnt lgkmcnt(0)
s_and_b32 s3, s2, 0xffff
s_lshr_b32 s2, s2, 16
s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_3) | instid1(VALU_DEP_3)
v_mad_u64_u32 v[2:3], null, s15, s2, v[1:2]
v_mad_u64_u32 v[3:4], null, s14, s3, v[0:1]
v_mov_b32_e32 v1, 0
s_load_b128 s[0:3], s[0:1], 0x0
v_min_i32_e32 v0, 0x1001, v2
v_cmp_lt_i32_e32 vcc_lo, 1, v2
s_delay_alu instid0(VALU_DEP_4)
v_max_i32_e32 v4, 0, v3
v_min_i32_e32 v5, 0x1000, v2
v_max_i32_e32 v6, 0, v2
v_lshl_add_u32 v0, v0, 12, 0xffffe000
v_add_nc_u32_e32 v7, 1, v2
v_min_u32_e32 v10, 0xfff, v4
v_lshl_add_u32 v4, v5, 12, 0xfffff000
s_delay_alu instid0(VALU_DEP_4) | instskip(SKIP_2) | instid1(VALU_DEP_3)
v_cndmask_b32_e32 v0, 0, v0, vcc_lo
v_cmp_lt_i32_e32 vcc_lo, -2, v2
v_add_nc_u32_e32 v8, 2, v2
v_or_b32_e32 v0, v0, v10
v_cndmask_b32_e32 v7, 0, v7, vcc_lo
v_cmp_lt_i32_e32 vcc_lo, 0, v2
v_lshlrev_b32_e32 v6, 12, v6
s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_3) | instid1(VALU_DEP_3)
v_lshlrev_b32_e32 v11, 12, v7
v_cndmask_b32_e32 v9, 0, v4, vcc_lo
v_cmp_lt_i32_e32 vcc_lo, -3, v2
v_lshlrev_b64 v[4:5], 2, v[0:1]
v_or_b32_e32 v0, v9, v10
v_cndmask_b32_e32 v8, 0, v8, vcc_lo
v_cmp_gt_i32_e32 vcc_lo, 0x1000, v2
s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_2) | instid1(VALU_DEP_3)
v_dual_cndmask_b32 v9, 0xfff000, v6 :: v_dual_lshlrev_b32 v12, 12, v8
v_cmp_gt_i32_e32 vcc_lo, 0x1000, v7
v_lshlrev_b64 v[6:7], 2, v[0:1]
v_or_b32_e32 v0, v9, v10
v_cndmask_b32_e32 v11, 0xfff000, v11, vcc_lo
s_waitcnt lgkmcnt(0)
v_add_co_u32 v4, vcc_lo, s0, v4
v_add_co_ci_u32_e32 v5, vcc_lo, s1, v5, vcc_lo
v_cmp_gt_i32_e32 vcc_lo, 0x1000, v8
v_lshlrev_b64 v[8:9], 2, v[0:1]
v_or_b32_e32 v0, v11, v10
global_load_b32 v11, v[4:5], off
v_cndmask_b32_e32 v12, 0xfff000, v12, vcc_lo
v_add_co_u32 v4, vcc_lo, s0, v6
v_add_co_ci_u32_e32 v5, vcc_lo, s1, v7, vcc_lo
v_lshlrev_b64 v[6:7], 2, v[0:1]
s_delay_alu instid0(VALU_DEP_4) | instskip(SKIP_2) | instid1(VALU_DEP_3)
v_or_b32_e32 v0, v12, v10
v_add_co_u32 v8, vcc_lo, s0, v8
v_add_co_ci_u32_e32 v9, vcc_lo, s1, v9, vcc_lo
v_lshlrev_b64 v[0:1], 2, v[0:1]
s_clause 0x1
global_load_b32 v10, v[4:5], off
global_load_b32 v8, v[8:9], off
v_add_co_u32 v4, vcc_lo, s0, v6
v_add_co_ci_u32_e32 v5, vcc_lo, s1, v7, vcc_lo
v_add_co_u32 v0, vcc_lo, s0, v0
v_add_co_ci_u32_e32 v1, vcc_lo, s1, v1, vcc_lo
s_clause 0x1
global_load_b32 v4, v[4:5], off
global_load_b32 v5, v[0:1], off
v_lshl_add_u32 v0, v2, 12, v3
s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
v_ashrrev_i32_e32 v1, 31, v0
v_lshlrev_b64 v[0:1], 2, v[0:1]
s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_2)
v_add_co_u32 v0, vcc_lo, s2, v0
v_add_co_ci_u32_e32 v1, vcc_lo, s3, v1, vcc_lo
s_waitcnt vmcnt(4)
v_fma_f32 v6, v11, 0x3d90edc4, 0
s_waitcnt vmcnt(3)
s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
v_fmac_f32_e32 v6, 0x3e7a53b9, v10
s_waitcnt vmcnt(2)
v_fmamk_f32 v2, v8, 0x3ebd3522, v6
s_waitcnt vmcnt(1)
s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
v_fmac_f32_e32 v2, 0x3e7a53b9, v4
s_waitcnt vmcnt(0)
v_fmac_f32_e32 v2, 0x3d90edc4, v5
global_store_b32 v[0:1], v2, off
s_nop 0
s_sendmsg sendmsg(MSG_DEALLOC_VGPRS)
s_endpgm
.section .rodata,"a",@progbits
.p2align 6, 0x0
.amdhsa_kernel lambda_55652
.amdhsa_group_segment_fixed_size 0
.amdhsa_private_segment_fixed_size 0
.amdhsa_kernarg_size 272
.amdhsa_user_sgpr_count 14
.amdhsa_user_sgpr_dispatch_ptr 0
.amdhsa_user_sgpr_queue_ptr 0
.amdhsa_user_sgpr_kernarg_segment_ptr 1
.amdhsa_user_sgpr_dispatch_id 0
.amdhsa_user_sgpr_private_segment_size 0
.amdhsa_wavefront_size32 1
.amdhsa_uses_dynamic_stack 0
.amdhsa_enable_private_segment 0
.amdhsa_system_sgpr_workgroup_id_x 1
.amdhsa_system_sgpr_workgroup_id_y 1
.amdhsa_system_sgpr_workgroup_id_z 0
.amdhsa_system_sgpr_workgroup_info 0
.amdhsa_system_vgpr_workitem_id 1
.amdhsa_next_free_vgpr 13
.amdhsa_next_free_sgpr 16
.amdhsa_float_round_mode_32 0
.amdhsa_float_round_mode_16_64 0
.amdhsa_float_denorm_mode_32 3
.amdhsa_float_denorm_mode_16_64 3
.amdhsa_dx10_clamp 1
.amdhsa_ieee_mode 1
.amdhsa_fp16_overflow 0
.amdhsa_workgroup_processor_mode 1
.amdhsa_memory_ordered 1
.amdhsa_forward_progress 0
.amdhsa_shared_vgpr_count 0
.amdhsa_exception_fp_ieee_invalid_op 0
.amdhsa_exception_fp_denorm_src 0
.amdhsa_exception_fp_ieee_div_zero 0
.amdhsa_exception_fp_ieee_overflow 0
.amdhsa_exception_fp_ieee_underflow 0
.amdhsa_exception_fp_ieee_inexact 0
.amdhsa_exception_int_div_zero 0
.end_amdhsa_kernel
.text
.Lfunc_end1:
.size lambda_55652, .Lfunc_end1-lambda_55652
.section .AMDGPU.csdata,"",@progbits
.text
.p2alignl 7, 3214868480
.fill 96, 4, 3214868480
.type __hip_cuid_,@object
.section .bss,"aw",@nobits
.globl __hip_cuid_
__hip_cuid_:
.byte 0
.size __hip_cuid_, 1
.ident "AMD clang version 18.0.0git (https://github.com/RadeonOpenCompute/llvm-project roc-6.3.2 25012 e5bf7e55c91490b07c49d8960fa7983d864936c4)"
.section ".note.GNU-stack","",@progbits
.addrsig
.addrsig_sym __hip_cuid_
.amdgpu_metadata
---
amdhsa.kernels:
- .args:
- .address_space: global
.offset: 0
.size: 8
.value_kind: global_buffer
- .address_space: global
.offset: 8
.size: 8
.value_kind: global_buffer
- .offset: 16
.size: 4
.value_kind: hidden_block_count_x
- .offset: 20
.size: 4
.value_kind: hidden_block_count_y
- .offset: 24
.size: 4
.value_kind: hidden_block_count_z
- .offset: 28
.size: 2
.value_kind: hidden_group_size_x
- .offset: 30
.size: 2
.value_kind: hidden_group_size_y
- .offset: 32
.size: 2
.value_kind: hidden_group_size_z
- .offset: 34
.size: 2
.value_kind: hidden_remainder_x
- .offset: 36
.size: 2
.value_kind: hidden_remainder_y
- .offset: 38
.size: 2
.value_kind: hidden_remainder_z
- .offset: 56
.size: 8
.value_kind: hidden_global_offset_x
- .offset: 64
.size: 8
.value_kind: hidden_global_offset_y
- .offset: 72
.size: 8
.value_kind: hidden_global_offset_z
- .offset: 80
.size: 2
.value_kind: hidden_grid_dims
.group_segment_fixed_size: 0
.kernarg_segment_align: 8
.kernarg_segment_size: 272
.language: OpenCL C
.language_version:
- 2
- 0
.max_flat_workgroup_size: 128
.name: lambda_56187
.private_segment_fixed_size: 0
.sgpr_count: 18
.sgpr_spill_count: 0
.symbol: lambda_56187.kd
.uniform_work_group_size: 1
.uses_dynamic_stack: false
.vgpr_count: 13
.vgpr_spill_count: 0
.wavefront_size: 32
.workgroup_processor_mode: 1
- .args:
- .address_space: global
.offset: 0
.size: 8
.value_kind: global_buffer
- .address_space: global
.offset: 8
.size: 8
.value_kind: global_buffer
- .offset: 16
.size: 4
.value_kind: hidden_block_count_x
- .offset: 20
.size: 4
.value_kind: hidden_block_count_y
- .offset: 24
.size: 4
.value_kind: hidden_block_count_z
- .offset: 28
.size: 2
.value_kind: hidden_group_size_x
- .offset: 30
.size: 2
.value_kind: hidden_group_size_y
- .offset: 32
.size: 2
.value_kind: hidden_group_size_z
- .offset: 34
.size: 2
.value_kind: hidden_remainder_x
- .offset: 36
.size: 2
.value_kind: hidden_remainder_y
- .offset: 38
.size: 2
.value_kind: hidden_remainder_z
- .offset: 56
.size: 8
.value_kind: hidden_global_offset_x
- .offset: 64
.size: 8
.value_kind: hidden_global_offset_y
- .offset: 72
.size: 8
.value_kind: hidden_global_offset_z
- .offset: 80
.size: 2
.value_kind: hidden_grid_dims
.group_segment_fixed_size: 0
.kernarg_segment_align: 8
.kernarg_segment_size: 272
.language: OpenCL C
.language_version:
- 2
- 0
.max_flat_workgroup_size: 128
.name: lambda_55652
.private_segment_fixed_size: 0
.sgpr_count: 18
.sgpr_spill_count: 0
.symbol: lambda_55652.kd
.uniform_work_group_size: 1
.uses_dynamic_stack: false
.vgpr_count: 13
.vgpr_spill_count: 0
.wavefront_size: 32
.workgroup_processor_mode: 1
amdhsa.target: amdgcn-amd-amdhsa--gfx1100
amdhsa.version:
- 1
- 2
...
.end_amdgpu_metadata |
You are a helpful coding assistant specialized in converting from CUDA host assembly to AMD host assembly. | .file "tmpxft_0014e419_00000000-6_gaussian.cudafe1.cpp"
.text
#APP
#NO_APP
.type _ZL26__cudaUnregisterBinaryUtilv, @function
_ZL26__cudaUnregisterBinaryUtilv:
.LFB2041:
.cfi_startproc
endbr64
subq $8, %rsp
.cfi_def_cfa_offset 16
movq _ZL20__cudaFatCubinHandle(%rip), %rdi
call __cudaUnregisterFatBinary@PLT
addq $8, %rsp
.cfi_def_cfa_offset 8
ret
.cfi_endproc
.LFE2041:
.size _ZL26__cudaUnregisterBinaryUtilv, .-_ZL26__cudaUnregisterBinaryUtilv
.globl _Z34__device_stub__Z12lambda_56187PfS_PfS_
.type _Z34__device_stub__Z12lambda_56187PfS_PfS_, @function
_Z34__device_stub__Z12lambda_56187PfS_PfS_:
.LFB2063:
.cfi_startproc
endbr64
subq $120, %rsp
.cfi_def_cfa_offset 128
movq %rdi, 8(%rsp)
movq %rsi, (%rsp)
movq %fs:40, %rax
movq %rax, 104(%rsp)
xorl %eax, %eax
leaq 8(%rsp), %rax
movq %rax, 80(%rsp)
movq %rsp, %rax
movq %rax, 88(%rsp)
movl $1, 32(%rsp)
movl $1, 36(%rsp)
movl $1, 40(%rsp)
movl $1, 44(%rsp)
movl $1, 48(%rsp)
movl $1, 52(%rsp)
leaq 24(%rsp), %rcx
leaq 16(%rsp), %rdx
leaq 44(%rsp), %rsi
leaq 32(%rsp), %rdi
call __cudaPopCallConfiguration@PLT
testl %eax, %eax
je .L7
.L3:
movq 104(%rsp), %rax
subq %fs:40, %rax
jne .L8
addq $120, %rsp
.cfi_remember_state
.cfi_def_cfa_offset 8
ret
.L7:
.cfi_restore_state
pushq 24(%rsp)
.cfi_def_cfa_offset 136
pushq 24(%rsp)
.cfi_def_cfa_offset 144
leaq 96(%rsp), %r9
movq 60(%rsp), %rcx
movl 68(%rsp), %r8d
movq 48(%rsp), %rsi
movl 56(%rsp), %edx
leaq lambda_56187(%rip), %rdi
call cudaLaunchKernel@PLT
addq $16, %rsp
.cfi_def_cfa_offset 128
jmp .L3
.L8:
call __stack_chk_fail@PLT
.cfi_endproc
.LFE2063:
.size _Z34__device_stub__Z12lambda_56187PfS_PfS_, .-_Z34__device_stub__Z12lambda_56187PfS_PfS_
.globl lambda_56187
.type lambda_56187, @function
lambda_56187:
.LFB2064:
.cfi_startproc
endbr64
subq $8, %rsp
.cfi_def_cfa_offset 16
call _Z34__device_stub__Z12lambda_56187PfS_PfS_
addq $8, %rsp
.cfi_def_cfa_offset 8
ret
.cfi_endproc
.LFE2064:
.size lambda_56187, .-lambda_56187
.globl _Z34__device_stub__Z12lambda_55652PfS_PfS_
.type _Z34__device_stub__Z12lambda_55652PfS_PfS_, @function
_Z34__device_stub__Z12lambda_55652PfS_PfS_:
.LFB2065:
.cfi_startproc
endbr64
subq $120, %rsp
.cfi_def_cfa_offset 128
movq %rdi, 8(%rsp)
movq %rsi, (%rsp)
movq %fs:40, %rax
movq %rax, 104(%rsp)
xorl %eax, %eax
leaq 8(%rsp), %rax
movq %rax, 80(%rsp)
movq %rsp, %rax
movq %rax, 88(%rsp)
movl $1, 32(%rsp)
movl $1, 36(%rsp)
movl $1, 40(%rsp)
movl $1, 44(%rsp)
movl $1, 48(%rsp)
movl $1, 52(%rsp)
leaq 24(%rsp), %rcx
leaq 16(%rsp), %rdx
leaq 44(%rsp), %rsi
leaq 32(%rsp), %rdi
call __cudaPopCallConfiguration@PLT
testl %eax, %eax
je .L15
.L11:
movq 104(%rsp), %rax
subq %fs:40, %rax
jne .L16
addq $120, %rsp
.cfi_remember_state
.cfi_def_cfa_offset 8
ret
.L15:
.cfi_restore_state
pushq 24(%rsp)
.cfi_def_cfa_offset 136
pushq 24(%rsp)
.cfi_def_cfa_offset 144
leaq 96(%rsp), %r9
movq 60(%rsp), %rcx
movl 68(%rsp), %r8d
movq 48(%rsp), %rsi
movl 56(%rsp), %edx
leaq lambda_55652(%rip), %rdi
call cudaLaunchKernel@PLT
addq $16, %rsp
.cfi_def_cfa_offset 128
jmp .L11
.L16:
call __stack_chk_fail@PLT
.cfi_endproc
.LFE2065:
.size _Z34__device_stub__Z12lambda_55652PfS_PfS_, .-_Z34__device_stub__Z12lambda_55652PfS_PfS_
.globl lambda_55652
.type lambda_55652, @function
lambda_55652:
.LFB2066:
.cfi_startproc
endbr64
subq $8, %rsp
.cfi_def_cfa_offset 16
call _Z34__device_stub__Z12lambda_55652PfS_PfS_
addq $8, %rsp
.cfi_def_cfa_offset 8
ret
.cfi_endproc
.LFE2066:
.size lambda_55652, .-lambda_55652
.section .rodata.str1.1,"aMS",@progbits,1
.LC0:
.string "lambda_55652"
.LC1:
.string "lambda_56187"
.text
.type _ZL24__sti____cudaRegisterAllv, @function
_ZL24__sti____cudaRegisterAllv:
.LFB2068:
.cfi_startproc
endbr64
pushq %rbx
.cfi_def_cfa_offset 16
.cfi_offset 3, -16
leaq _ZL15__fatDeviceText(%rip), %rdi
call __cudaRegisterFatBinary@PLT
movq %rax, %rbx
movq %rax, _ZL20__cudaFatCubinHandle(%rip)
pushq $0
.cfi_def_cfa_offset 24
pushq $0
.cfi_def_cfa_offset 32
pushq $0
.cfi_def_cfa_offset 40
pushq $0
.cfi_def_cfa_offset 48
movl $0, %r9d
movl $-1, %r8d
leaq .LC0(%rip), %rdx
movq %rdx, %rcx
leaq lambda_55652(%rip), %rsi
movq %rax, %rdi
call __cudaRegisterFunction@PLT
addq $32, %rsp
.cfi_def_cfa_offset 16
pushq $0
.cfi_def_cfa_offset 24
pushq $0
.cfi_def_cfa_offset 32
pushq $0
.cfi_def_cfa_offset 40
pushq $0
.cfi_def_cfa_offset 48
movl $0, %r9d
movl $-1, %r8d
leaq .LC1(%rip), %rdx
movq %rdx, %rcx
leaq lambda_56187(%rip), %rsi
movq %rbx, %rdi
call __cudaRegisterFunction@PLT
addq $32, %rsp
.cfi_def_cfa_offset 16
movq _ZL20__cudaFatCubinHandle(%rip), %rdi
call __cudaRegisterFatBinaryEnd@PLT
leaq _ZL26__cudaUnregisterBinaryUtilv(%rip), %rdi
call atexit@PLT
popq %rbx
.cfi_def_cfa_offset 8
ret
.cfi_endproc
.LFE2068:
.size _ZL24__sti____cudaRegisterAllv, .-_ZL24__sti____cudaRegisterAllv
.section .init_array,"aw"
.align 8
.quad _ZL24__sti____cudaRegisterAllv
.section .nvFatBinSegment,"aw"
.align 8
.type _ZL15__fatDeviceText, @object
.size _ZL15__fatDeviceText, 24
_ZL15__fatDeviceText:
.long 1180844977
.long 1
.quad fatbinData
.quad 0
.local _ZL20__cudaFatCubinHandle
.comm _ZL20__cudaFatCubinHandle,8,8
.ident "GCC: (Ubuntu 13.3.0-6ubuntu2~24.04) 13.3.0"
.section .note.GNU-stack,"",@progbits
.section .note.gnu.property,"a"
.align 8
.long 1f - 0f
.long 4f - 1f
.long 5
0:
.string "GNU"
1:
.align 8
.long 0xc0000002
.long 3f - 2f
2:
.long 0x3
3:
.align 8
4: | .text
.file "gaussian.hip"
.globl __device_stub__lambda_56187 # -- Begin function __device_stub__lambda_56187
.p2align 4, 0x90
.type __device_stub__lambda_56187,@function
__device_stub__lambda_56187: # @__device_stub__lambda_56187
.cfi_startproc
# %bb.0:
subq $88, %rsp
.cfi_def_cfa_offset 96
movq %rdi, 56(%rsp)
movq %rsi, 48(%rsp)
leaq 56(%rsp), %rax
movq %rax, 64(%rsp)
leaq 48(%rsp), %rax
movq %rax, 72(%rsp)
leaq 32(%rsp), %rdi
leaq 16(%rsp), %rsi
leaq 8(%rsp), %rdx
movq %rsp, %rcx
callq __hipPopCallConfiguration
movq 32(%rsp), %rsi
movl 40(%rsp), %edx
movq 16(%rsp), %rcx
movl 24(%rsp), %r8d
leaq 64(%rsp), %r9
movl $lambda_56187, %edi
pushq (%rsp)
.cfi_adjust_cfa_offset 8
pushq 16(%rsp)
.cfi_adjust_cfa_offset 8
callq hipLaunchKernel
addq $104, %rsp
.cfi_adjust_cfa_offset -104
retq
.Lfunc_end0:
.size __device_stub__lambda_56187, .Lfunc_end0-__device_stub__lambda_56187
.cfi_endproc
# -- End function
.globl __device_stub__lambda_55652 # -- Begin function __device_stub__lambda_55652
.p2align 4, 0x90
.type __device_stub__lambda_55652,@function
__device_stub__lambda_55652: # @__device_stub__lambda_55652
.cfi_startproc
# %bb.0:
subq $88, %rsp
.cfi_def_cfa_offset 96
movq %rdi, 56(%rsp)
movq %rsi, 48(%rsp)
leaq 56(%rsp), %rax
movq %rax, 64(%rsp)
leaq 48(%rsp), %rax
movq %rax, 72(%rsp)
leaq 32(%rsp), %rdi
leaq 16(%rsp), %rsi
leaq 8(%rsp), %rdx
movq %rsp, %rcx
callq __hipPopCallConfiguration
movq 32(%rsp), %rsi
movl 40(%rsp), %edx
movq 16(%rsp), %rcx
movl 24(%rsp), %r8d
leaq 64(%rsp), %r9
movl $lambda_55652, %edi
pushq (%rsp)
.cfi_adjust_cfa_offset 8
pushq 16(%rsp)
.cfi_adjust_cfa_offset 8
callq hipLaunchKernel
addq $104, %rsp
.cfi_adjust_cfa_offset -104
retq
.Lfunc_end1:
.size __device_stub__lambda_55652, .Lfunc_end1-__device_stub__lambda_55652
.cfi_endproc
# -- End function
.p2align 4, 0x90 # -- Begin function __hip_module_ctor
.type __hip_module_ctor,@function
__hip_module_ctor: # @__hip_module_ctor
.cfi_startproc
# %bb.0:
pushq %rbx
.cfi_def_cfa_offset 16
subq $32, %rsp
.cfi_def_cfa_offset 48
.cfi_offset %rbx, -16
cmpq $0, __hip_gpubin_handle(%rip)
jne .LBB2_2
# %bb.1:
movl $__hip_fatbin_wrapper, %edi
callq __hipRegisterFatBinary
movq %rax, __hip_gpubin_handle(%rip)
.LBB2_2:
movq __hip_gpubin_handle(%rip), %rbx
xorps %xmm0, %xmm0
movups %xmm0, 16(%rsp)
movups %xmm0, (%rsp)
movl $lambda_56187, %esi
movl $.L__unnamed_1, %edx
movl $.L__unnamed_1, %ecx
movq %rbx, %rdi
movl $-1, %r8d
xorl %r9d, %r9d
callq __hipRegisterFunction
xorps %xmm0, %xmm0
movups %xmm0, 16(%rsp)
movups %xmm0, (%rsp)
movl $lambda_55652, %esi
movl $.L__unnamed_2, %edx
movl $.L__unnamed_2, %ecx
movq %rbx, %rdi
movl $-1, %r8d
xorl %r9d, %r9d
callq __hipRegisterFunction
movl $__hip_module_dtor, %edi
addq $32, %rsp
.cfi_def_cfa_offset 16
popq %rbx
.cfi_def_cfa_offset 8
jmp atexit # TAILCALL
.Lfunc_end2:
.size __hip_module_ctor, .Lfunc_end2-__hip_module_ctor
.cfi_endproc
# -- End function
.p2align 4, 0x90 # -- Begin function __hip_module_dtor
.type __hip_module_dtor,@function
__hip_module_dtor: # @__hip_module_dtor
.cfi_startproc
# %bb.0:
movq __hip_gpubin_handle(%rip), %rdi
testq %rdi, %rdi
je .LBB3_2
# %bb.1:
pushq %rax
.cfi_def_cfa_offset 16
callq __hipUnregisterFatBinary
movq $0, __hip_gpubin_handle(%rip)
addq $8, %rsp
.cfi_def_cfa_offset 8
.LBB3_2:
retq
.Lfunc_end3:
.size __hip_module_dtor, .Lfunc_end3-__hip_module_dtor
.cfi_endproc
# -- End function
.type lambda_56187,@object # @lambda_56187
.section .rodata,"a",@progbits
.globl lambda_56187
.p2align 3, 0x0
lambda_56187:
.quad __device_stub__lambda_56187
.size lambda_56187, 8
.type lambda_55652,@object # @lambda_55652
.globl lambda_55652
.p2align 3, 0x0
lambda_55652:
.quad __device_stub__lambda_55652
.size lambda_55652, 8
.type .L__unnamed_1,@object # @0
.section .rodata.str1.1,"aMS",@progbits,1
.L__unnamed_1:
.asciz "lambda_56187"
.size .L__unnamed_1, 13
.type .L__unnamed_2,@object # @1
.L__unnamed_2:
.asciz "lambda_55652"
.size .L__unnamed_2, 13
.type __hip_fatbin_wrapper,@object # @__hip_fatbin_wrapper
.section .hipFatBinSegment,"a",@progbits
.p2align 3, 0x0
__hip_fatbin_wrapper:
.long 1212764230 # 0x48495046
.long 1 # 0x1
.quad __hip_fatbin
.quad 0
.size __hip_fatbin_wrapper, 24
.type __hip_gpubin_handle,@object # @__hip_gpubin_handle
.local __hip_gpubin_handle
.comm __hip_gpubin_handle,8,8
.section .init_array,"aw",@init_array
.p2align 3, 0x0
.quad __hip_module_ctor
.type __hip_cuid_,@object # @__hip_cuid_
.bss
.globl __hip_cuid_
__hip_cuid_:
.byte 0 # 0x0
.size __hip_cuid_, 1
.section ".linker-options","e",@llvm_linker_options
.ident "AMD clang version 18.0.0git (https://github.com/RadeonOpenCompute/llvm-project roc-6.3.2 25012 e5bf7e55c91490b07c49d8960fa7983d864936c4)"
.section ".note.GNU-stack","",@progbits
.addrsig
.addrsig_sym __device_stub__lambda_56187
.addrsig_sym __device_stub__lambda_55652
.addrsig_sym __hip_module_ctor
.addrsig_sym __hip_module_dtor
.addrsig_sym lambda_56187
.addrsig_sym lambda_55652
.addrsig_sym __hip_fatbin
.addrsig_sym __hip_fatbin_wrapper
.addrsig_sym __hip_cuid_ |
You are a helpful coding assistant specialized in converting CUDA source code to CUDA device assembly. | __global__ void copyToOpenMM( float *target, float *source, int N ) {
int elementNum = blockIdx.x * blockDim.x + threadIdx.x;
int atom = elementNum / 3;
if( elementNum > N ) {
return;
}
//else target[elementNum] = source[elementNum];
else {
target[4 * atom + elementNum % 3] = source[elementNum];
}
} | code for sm_80
Function : _Z12copyToOpenMMPfS_i
.headerflags @"EF_CUDA_TEXMODE_UNIFIED EF_CUDA_64BIT_ADDRESS EF_CUDA_SM80 EF_CUDA_VIRTUAL_SM(EF_CUDA_SM80)"
/*0000*/ MOV R1, c[0x0][0x28] ; /* 0x00000a0000017a02 */
/* 0x000fe40000000f00 */
/*0010*/ S2R R0, SR_CTAID.X ; /* 0x0000000000007919 */
/* 0x000e280000002500 */
/*0020*/ S2R R3, SR_TID.X ; /* 0x0000000000037919 */
/* 0x000e240000002100 */
/*0030*/ IMAD R0, R0, c[0x0][0x0], R3 ; /* 0x0000000000007a24 */
/* 0x001fca00078e0203 */
/*0040*/ ISETP.GT.AND P0, PT, R0, c[0x0][0x170], PT ; /* 0x00005c0000007a0c */
/* 0x000fda0003f04270 */
/*0050*/ @P0 EXIT ; /* 0x000000000000094d */
/* 0x000fea0003800000 */
/*0060*/ HFMA2.MMA R6, -RZ, RZ, 0, 2.384185791015625e-07 ; /* 0x00000004ff067435 */
/* 0x000fe200000001ff */
/*0070*/ ULDC.64 UR4, c[0x0][0x118] ; /* 0x0000460000047ab9 */
/* 0x000fd20000000a00 */
/*0080*/ IMAD.WIDE R2, R0, R6, c[0x0][0x168] ; /* 0x00005a0000027625 */
/* 0x000fcc00078e0206 */
/*0090*/ LDG.E R3, [R2.64] ; /* 0x0000000402037981 */
/* 0x000ea2000c1e1900 */
/*00a0*/ IMAD.HI R4, R0, 0x55555556, RZ ; /* 0x5555555600047827 */
/* 0x000fca00078e02ff */
/*00b0*/ LEA.HI R5, R4, R4, RZ, 0x1 ; /* 0x0000000404057211 */
/* 0x000fca00078f08ff */
/*00c0*/ IMAD R0, R5, -0x3, R0 ; /* 0xfffffffd05007824 */
/* 0x000fca00078e0200 */
/*00d0*/ LEA R5, R5, R0, 0x2 ; /* 0x0000000005057211 */
/* 0x000fca00078e10ff */
/*00e0*/ IMAD.WIDE R4, R5, R6, c[0x0][0x160] ; /* 0x0000580005047625 */
/* 0x000fca00078e0206 */
/*00f0*/ STG.E [R4.64], R3 ; /* 0x0000000304007986 */
/* 0x004fe2000c101904 */
/*0100*/ EXIT ; /* 0x000000000000794d */
/* 0x000fea0003800000 */
/*0110*/ BRA 0x110; /* 0xfffffff000007947 */
/* 0x000fc0000383ffff */
/*0120*/ NOP; /* 0x0000000000007918 */
/* 0x000fc00000000000 */
/*0130*/ NOP; /* 0x0000000000007918 */
/* 0x000fc00000000000 */
/*0140*/ NOP; /* 0x0000000000007918 */
/* 0x000fc00000000000 */
/*0150*/ NOP; /* 0x0000000000007918 */
/* 0x000fc00000000000 */
/*0160*/ NOP; /* 0x0000000000007918 */
/* 0x000fc00000000000 */
/*0170*/ NOP; /* 0x0000000000007918 */
/* 0x000fc00000000000 */
/*0180*/ NOP; /* 0x0000000000007918 */
/* 0x000fc00000000000 */
/*0190*/ NOP; /* 0x0000000000007918 */
/* 0x000fc00000000000 */
/*01a0*/ NOP; /* 0x0000000000007918 */
/* 0x000fc00000000000 */
/*01b0*/ NOP; /* 0x0000000000007918 */
/* 0x000fc00000000000 */
/*01c0*/ NOP; /* 0x0000000000007918 */
/* 0x000fc00000000000 */
/*01d0*/ NOP; /* 0x0000000000007918 */
/* 0x000fc00000000000 */
/*01e0*/ NOP; /* 0x0000000000007918 */
/* 0x000fc00000000000 */
/*01f0*/ NOP; /* 0x0000000000007918 */
/* 0x000fc00000000000 */
.......... |
You are a helpful coding assistant specialized in converting CUDA source code to CUDA host assembly. | __global__ void copyToOpenMM( float *target, float *source, int N ) {
int elementNum = blockIdx.x * blockDim.x + threadIdx.x;
int atom = elementNum / 3;
if( elementNum > N ) {
return;
}
//else target[elementNum] = source[elementNum];
else {
target[4 * atom + elementNum % 3] = source[elementNum];
}
} | .file "tmpxft_00083652_00000000-6_CopyToOpenMM_kernel.cudafe1.cpp"
.text
#APP
#NO_APP
.type _ZL26__cudaUnregisterBinaryUtilv, @function
_ZL26__cudaUnregisterBinaryUtilv:
.LFB2029:
.cfi_startproc
endbr64
subq $8, %rsp
.cfi_def_cfa_offset 16
movq _ZL20__cudaFatCubinHandle(%rip), %rdi
call __cudaUnregisterFatBinary@PLT
addq $8, %rsp
.cfi_def_cfa_offset 8
ret
.cfi_endproc
.LFE2029:
.size _ZL26__cudaUnregisterBinaryUtilv, .-_ZL26__cudaUnregisterBinaryUtilv
.globl _Z35__device_stub__Z12copyToOpenMMPfS_iPfS_i
.type _Z35__device_stub__Z12copyToOpenMMPfS_iPfS_i, @function
_Z35__device_stub__Z12copyToOpenMMPfS_iPfS_i:
.LFB2051:
.cfi_startproc
endbr64
subq $136, %rsp
.cfi_def_cfa_offset 144
movq %rdi, 24(%rsp)
movq %rsi, 16(%rsp)
movl %edx, 12(%rsp)
movq %fs:40, %rax
movq %rax, 120(%rsp)
xorl %eax, %eax
leaq 24(%rsp), %rax
movq %rax, 96(%rsp)
leaq 16(%rsp), %rax
movq %rax, 104(%rsp)
leaq 12(%rsp), %rax
movq %rax, 112(%rsp)
movl $1, 48(%rsp)
movl $1, 52(%rsp)
movl $1, 56(%rsp)
movl $1, 60(%rsp)
movl $1, 64(%rsp)
movl $1, 68(%rsp)
leaq 40(%rsp), %rcx
leaq 32(%rsp), %rdx
leaq 60(%rsp), %rsi
leaq 48(%rsp), %rdi
call __cudaPopCallConfiguration@PLT
testl %eax, %eax
je .L7
.L3:
movq 120(%rsp), %rax
subq %fs:40, %rax
jne .L8
addq $136, %rsp
.cfi_remember_state
.cfi_def_cfa_offset 8
ret
.L7:
.cfi_restore_state
pushq 40(%rsp)
.cfi_def_cfa_offset 152
pushq 40(%rsp)
.cfi_def_cfa_offset 160
leaq 112(%rsp), %r9
movq 76(%rsp), %rcx
movl 84(%rsp), %r8d
movq 64(%rsp), %rsi
movl 72(%rsp), %edx
leaq _Z12copyToOpenMMPfS_i(%rip), %rdi
call cudaLaunchKernel@PLT
addq $16, %rsp
.cfi_def_cfa_offset 144
jmp .L3
.L8:
call __stack_chk_fail@PLT
.cfi_endproc
.LFE2051:
.size _Z35__device_stub__Z12copyToOpenMMPfS_iPfS_i, .-_Z35__device_stub__Z12copyToOpenMMPfS_iPfS_i
.globl _Z12copyToOpenMMPfS_i
.type _Z12copyToOpenMMPfS_i, @function
_Z12copyToOpenMMPfS_i:
.LFB2052:
.cfi_startproc
endbr64
subq $8, %rsp
.cfi_def_cfa_offset 16
call _Z35__device_stub__Z12copyToOpenMMPfS_iPfS_i
addq $8, %rsp
.cfi_def_cfa_offset 8
ret
.cfi_endproc
.LFE2052:
.size _Z12copyToOpenMMPfS_i, .-_Z12copyToOpenMMPfS_i
.section .rodata.str1.1,"aMS",@progbits,1
.LC0:
.string "_Z12copyToOpenMMPfS_i"
.text
.type _ZL24__sti____cudaRegisterAllv, @function
_ZL24__sti____cudaRegisterAllv:
.LFB2054:
.cfi_startproc
endbr64
subq $8, %rsp
.cfi_def_cfa_offset 16
leaq _ZL15__fatDeviceText(%rip), %rdi
call __cudaRegisterFatBinary@PLT
movq %rax, %rdi
movq %rax, _ZL20__cudaFatCubinHandle(%rip)
pushq $0
.cfi_def_cfa_offset 24
pushq $0
.cfi_def_cfa_offset 32
pushq $0
.cfi_def_cfa_offset 40
pushq $0
.cfi_def_cfa_offset 48
movl $0, %r9d
movl $-1, %r8d
leaq .LC0(%rip), %rdx
movq %rdx, %rcx
leaq _Z12copyToOpenMMPfS_i(%rip), %rsi
call __cudaRegisterFunction@PLT
addq $32, %rsp
.cfi_def_cfa_offset 16
movq _ZL20__cudaFatCubinHandle(%rip), %rdi
call __cudaRegisterFatBinaryEnd@PLT
leaq _ZL26__cudaUnregisterBinaryUtilv(%rip), %rdi
call atexit@PLT
addq $8, %rsp
.cfi_def_cfa_offset 8
ret
.cfi_endproc
.LFE2054:
.size _ZL24__sti____cudaRegisterAllv, .-_ZL24__sti____cudaRegisterAllv
.section .init_array,"aw"
.align 8
.quad _ZL24__sti____cudaRegisterAllv
.section .nvFatBinSegment,"aw"
.align 8
.type _ZL15__fatDeviceText, @object
.size _ZL15__fatDeviceText, 24
_ZL15__fatDeviceText:
.long 1180844977
.long 1
.quad fatbinData
.quad 0
.local _ZL20__cudaFatCubinHandle
.comm _ZL20__cudaFatCubinHandle,8,8
.ident "GCC: (Ubuntu 13.3.0-6ubuntu2~24.04) 13.3.0"
.section .note.GNU-stack,"",@progbits
.section .note.gnu.property,"a"
.align 8
.long 1f - 0f
.long 4f - 1f
.long 5
0:
.string "GNU"
1:
.align 8
.long 0xc0000002
.long 3f - 2f
2:
.long 0x3
3:
.align 8
4: |
You are a helpful coding assistant specialized in converting CUDA source code to HIP/AMD source code. | __global__ void copyToOpenMM( float *target, float *source, int N ) {
int elementNum = blockIdx.x * blockDim.x + threadIdx.x;
int atom = elementNum / 3;
if( elementNum > N ) {
return;
}
//else target[elementNum] = source[elementNum];
else {
target[4 * atom + elementNum % 3] = source[elementNum];
}
} | #include <hip/hip_runtime.h>
__global__ void copyToOpenMM( float *target, float *source, int N ) {
int elementNum = blockIdx.x * blockDim.x + threadIdx.x;
int atom = elementNum / 3;
if( elementNum > N ) {
return;
}
//else target[elementNum] = source[elementNum];
else {
target[4 * atom + elementNum % 3] = source[elementNum];
}
} |
You are a helpful coding assistant specialized in converting HIP source code to AMD device assembly. | #include <hip/hip_runtime.h>
__global__ void copyToOpenMM( float *target, float *source, int N ) {
int elementNum = blockIdx.x * blockDim.x + threadIdx.x;
int atom = elementNum / 3;
if( elementNum > N ) {
return;
}
//else target[elementNum] = source[elementNum];
else {
target[4 * atom + elementNum % 3] = source[elementNum];
}
} | .text
.amdgcn_target "amdgcn-amd-amdhsa--gfx1100"
.protected _Z12copyToOpenMMPfS_i
.globl _Z12copyToOpenMMPfS_i
.p2align 8
.type _Z12copyToOpenMMPfS_i,@function
_Z12copyToOpenMMPfS_i:
s_clause 0x1
s_load_b32 s2, s[0:1], 0x24
s_load_b32 s3, s[0:1], 0x10
s_waitcnt lgkmcnt(0)
s_and_b32 s2, s2, 0xffff
s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
v_mad_u64_u32 v[1:2], null, s15, s2, v[0:1]
s_mov_b32 s2, exec_lo
v_cmpx_ge_i32_e64 s3, v1
s_cbranch_execz .LBB0_2
s_load_b128 s[0:3], s[0:1], 0x0
v_ashrrev_i32_e32 v2, 31, v1
v_mul_hi_i32 v0, v1, 0x55555556
s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_1)
v_lshlrev_b64 v[2:3], 2, v[1:2]
s_waitcnt lgkmcnt(0)
v_add_co_u32 v2, vcc_lo, s2, v2
s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_2) | instid1(VALU_DEP_1)
v_add_co_ci_u32_e32 v3, vcc_lo, s3, v3, vcc_lo
global_load_b32 v2, v[2:3], off
v_lshrrev_b32_e32 v3, 31, v0
v_add_nc_u32_e32 v0, v0, v3
s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
v_lshl_add_u32 v3, v0, 1, v0
v_sub_nc_u32_e32 v1, v1, v3
s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
v_lshl_add_u32 v0, v0, 2, v1
v_ashrrev_i32_e32 v1, 31, v0
s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
v_lshlrev_b64 v[0:1], 2, v[0:1]
v_add_co_u32 v0, vcc_lo, s0, v0
s_delay_alu instid0(VALU_DEP_2)
v_add_co_ci_u32_e32 v1, vcc_lo, s1, v1, vcc_lo
s_waitcnt vmcnt(0)
global_store_b32 v[0:1], v2, off
.LBB0_2:
s_nop 0
s_sendmsg sendmsg(MSG_DEALLOC_VGPRS)
s_endpgm
.section .rodata,"a",@progbits
.p2align 6, 0x0
.amdhsa_kernel _Z12copyToOpenMMPfS_i
.amdhsa_group_segment_fixed_size 0
.amdhsa_private_segment_fixed_size 0
.amdhsa_kernarg_size 280
.amdhsa_user_sgpr_count 15
.amdhsa_user_sgpr_dispatch_ptr 0
.amdhsa_user_sgpr_queue_ptr 0
.amdhsa_user_sgpr_kernarg_segment_ptr 1
.amdhsa_user_sgpr_dispatch_id 0
.amdhsa_user_sgpr_private_segment_size 0
.amdhsa_wavefront_size32 1
.amdhsa_uses_dynamic_stack 0
.amdhsa_enable_private_segment 0
.amdhsa_system_sgpr_workgroup_id_x 1
.amdhsa_system_sgpr_workgroup_id_y 0
.amdhsa_system_sgpr_workgroup_id_z 0
.amdhsa_system_sgpr_workgroup_info 0
.amdhsa_system_vgpr_workitem_id 0
.amdhsa_next_free_vgpr 4
.amdhsa_next_free_sgpr 16
.amdhsa_float_round_mode_32 0
.amdhsa_float_round_mode_16_64 0
.amdhsa_float_denorm_mode_32 3
.amdhsa_float_denorm_mode_16_64 3
.amdhsa_dx10_clamp 1
.amdhsa_ieee_mode 1
.amdhsa_fp16_overflow 0
.amdhsa_workgroup_processor_mode 1
.amdhsa_memory_ordered 1
.amdhsa_forward_progress 0
.amdhsa_shared_vgpr_count 0
.amdhsa_exception_fp_ieee_invalid_op 0
.amdhsa_exception_fp_denorm_src 0
.amdhsa_exception_fp_ieee_div_zero 0
.amdhsa_exception_fp_ieee_overflow 0
.amdhsa_exception_fp_ieee_underflow 0
.amdhsa_exception_fp_ieee_inexact 0
.amdhsa_exception_int_div_zero 0
.end_amdhsa_kernel
.text
.Lfunc_end0:
.size _Z12copyToOpenMMPfS_i, .Lfunc_end0-_Z12copyToOpenMMPfS_i
.section .AMDGPU.csdata,"",@progbits
.text
.p2alignl 7, 3214868480
.fill 96, 4, 3214868480
.type __hip_cuid_,@object
.section .bss,"aw",@nobits
.globl __hip_cuid_
__hip_cuid_:
.byte 0
.size __hip_cuid_, 1
.ident "AMD clang version 18.0.0git (https://github.com/RadeonOpenCompute/llvm-project roc-6.3.2 25012 e5bf7e55c91490b07c49d8960fa7983d864936c4)"
.section ".note.GNU-stack","",@progbits
.addrsig
.addrsig_sym __hip_cuid_
.amdgpu_metadata
---
amdhsa.kernels:
- .args:
- .address_space: global
.offset: 0
.size: 8
.value_kind: global_buffer
- .address_space: global
.offset: 8
.size: 8
.value_kind: global_buffer
- .offset: 16
.size: 4
.value_kind: by_value
- .offset: 24
.size: 4
.value_kind: hidden_block_count_x
- .offset: 28
.size: 4
.value_kind: hidden_block_count_y
- .offset: 32
.size: 4
.value_kind: hidden_block_count_z
- .offset: 36
.size: 2
.value_kind: hidden_group_size_x
- .offset: 38
.size: 2
.value_kind: hidden_group_size_y
- .offset: 40
.size: 2
.value_kind: hidden_group_size_z
- .offset: 42
.size: 2
.value_kind: hidden_remainder_x
- .offset: 44
.size: 2
.value_kind: hidden_remainder_y
- .offset: 46
.size: 2
.value_kind: hidden_remainder_z
- .offset: 64
.size: 8
.value_kind: hidden_global_offset_x
- .offset: 72
.size: 8
.value_kind: hidden_global_offset_y
- .offset: 80
.size: 8
.value_kind: hidden_global_offset_z
- .offset: 88
.size: 2
.value_kind: hidden_grid_dims
.group_segment_fixed_size: 0
.kernarg_segment_align: 8
.kernarg_segment_size: 280
.language: OpenCL C
.language_version:
- 2
- 0
.max_flat_workgroup_size: 1024
.name: _Z12copyToOpenMMPfS_i
.private_segment_fixed_size: 0
.sgpr_count: 18
.sgpr_spill_count: 0
.symbol: _Z12copyToOpenMMPfS_i.kd
.uniform_work_group_size: 1
.uses_dynamic_stack: false
.vgpr_count: 4
.vgpr_spill_count: 0
.wavefront_size: 32
.workgroup_processor_mode: 1
amdhsa.target: amdgcn-amd-amdhsa--gfx1100
amdhsa.version:
- 1
- 2
...
.end_amdgpu_metadata |
You are a helpful coding assistant specialized in converting HIP source code to AMD host assembly. | #include <hip/hip_runtime.h>
__global__ void copyToOpenMM( float *target, float *source, int N ) {
int elementNum = blockIdx.x * blockDim.x + threadIdx.x;
int atom = elementNum / 3;
if( elementNum > N ) {
return;
}
//else target[elementNum] = source[elementNum];
else {
target[4 * atom + elementNum % 3] = source[elementNum];
}
} | .text
.file "CopyToOpenMM_kernel.hip"
.globl _Z27__device_stub__copyToOpenMMPfS_i # -- Begin function _Z27__device_stub__copyToOpenMMPfS_i
.p2align 4, 0x90
.type _Z27__device_stub__copyToOpenMMPfS_i,@function
_Z27__device_stub__copyToOpenMMPfS_i: # @_Z27__device_stub__copyToOpenMMPfS_i
.cfi_startproc
# %bb.0:
subq $104, %rsp
.cfi_def_cfa_offset 112
movq %rdi, 72(%rsp)
movq %rsi, 64(%rsp)
movl %edx, 12(%rsp)
leaq 72(%rsp), %rax
movq %rax, 80(%rsp)
leaq 64(%rsp), %rax
movq %rax, 88(%rsp)
leaq 12(%rsp), %rax
movq %rax, 96(%rsp)
leaq 48(%rsp), %rdi
leaq 32(%rsp), %rsi
leaq 24(%rsp), %rdx
leaq 16(%rsp), %rcx
callq __hipPopCallConfiguration
movq 48(%rsp), %rsi
movl 56(%rsp), %edx
movq 32(%rsp), %rcx
movl 40(%rsp), %r8d
leaq 80(%rsp), %r9
movl $_Z12copyToOpenMMPfS_i, %edi
pushq 16(%rsp)
.cfi_adjust_cfa_offset 8
pushq 32(%rsp)
.cfi_adjust_cfa_offset 8
callq hipLaunchKernel
addq $120, %rsp
.cfi_adjust_cfa_offset -120
retq
.Lfunc_end0:
.size _Z27__device_stub__copyToOpenMMPfS_i, .Lfunc_end0-_Z27__device_stub__copyToOpenMMPfS_i
.cfi_endproc
# -- End function
.p2align 4, 0x90 # -- Begin function __hip_module_ctor
.type __hip_module_ctor,@function
__hip_module_ctor: # @__hip_module_ctor
.cfi_startproc
# %bb.0:
subq $40, %rsp
.cfi_def_cfa_offset 48
cmpq $0, __hip_gpubin_handle(%rip)
jne .LBB1_2
# %bb.1:
movl $__hip_fatbin_wrapper, %edi
callq __hipRegisterFatBinary
movq %rax, __hip_gpubin_handle(%rip)
.LBB1_2:
movq __hip_gpubin_handle(%rip), %rdi
xorps %xmm0, %xmm0
movups %xmm0, 16(%rsp)
movups %xmm0, (%rsp)
movl $_Z12copyToOpenMMPfS_i, %esi
movl $.L__unnamed_1, %edx
movl $.L__unnamed_1, %ecx
movl $-1, %r8d
xorl %r9d, %r9d
callq __hipRegisterFunction
movl $__hip_module_dtor, %edi
addq $40, %rsp
.cfi_def_cfa_offset 8
jmp atexit # TAILCALL
.Lfunc_end1:
.size __hip_module_ctor, .Lfunc_end1-__hip_module_ctor
.cfi_endproc
# -- End function
.p2align 4, 0x90 # -- Begin function __hip_module_dtor
.type __hip_module_dtor,@function
__hip_module_dtor: # @__hip_module_dtor
.cfi_startproc
# %bb.0:
movq __hip_gpubin_handle(%rip), %rdi
testq %rdi, %rdi
je .LBB2_2
# %bb.1:
pushq %rax
.cfi_def_cfa_offset 16
callq __hipUnregisterFatBinary
movq $0, __hip_gpubin_handle(%rip)
addq $8, %rsp
.cfi_def_cfa_offset 8
.LBB2_2:
retq
.Lfunc_end2:
.size __hip_module_dtor, .Lfunc_end2-__hip_module_dtor
.cfi_endproc
# -- End function
.type _Z12copyToOpenMMPfS_i,@object # @_Z12copyToOpenMMPfS_i
.section .rodata,"a",@progbits
.globl _Z12copyToOpenMMPfS_i
.p2align 3, 0x0
_Z12copyToOpenMMPfS_i:
.quad _Z27__device_stub__copyToOpenMMPfS_i
.size _Z12copyToOpenMMPfS_i, 8
.type .L__unnamed_1,@object # @0
.section .rodata.str1.1,"aMS",@progbits,1
.L__unnamed_1:
.asciz "_Z12copyToOpenMMPfS_i"
.size .L__unnamed_1, 22
.type __hip_fatbin_wrapper,@object # @__hip_fatbin_wrapper
.section .hipFatBinSegment,"a",@progbits
.p2align 3, 0x0
__hip_fatbin_wrapper:
.long 1212764230 # 0x48495046
.long 1 # 0x1
.quad __hip_fatbin
.quad 0
.size __hip_fatbin_wrapper, 24
.type __hip_gpubin_handle,@object # @__hip_gpubin_handle
.local __hip_gpubin_handle
.comm __hip_gpubin_handle,8,8
.section .init_array,"aw",@init_array
.p2align 3, 0x0
.quad __hip_module_ctor
.type __hip_cuid_,@object # @__hip_cuid_
.bss
.globl __hip_cuid_
__hip_cuid_:
.byte 0 # 0x0
.size __hip_cuid_, 1
.section ".linker-options","e",@llvm_linker_options
.ident "AMD clang version 18.0.0git (https://github.com/RadeonOpenCompute/llvm-project roc-6.3.2 25012 e5bf7e55c91490b07c49d8960fa7983d864936c4)"
.section ".note.GNU-stack","",@progbits
.addrsig
.addrsig_sym _Z27__device_stub__copyToOpenMMPfS_i
.addrsig_sym __hip_module_ctor
.addrsig_sym __hip_module_dtor
.addrsig_sym _Z12copyToOpenMMPfS_i
.addrsig_sym __hip_fatbin
.addrsig_sym __hip_fatbin_wrapper
.addrsig_sym __hip_cuid_ |
You are a helpful coding assistant specialized in converting from CUDA device assembly to AMD device assembly. | code for sm_80
Function : _Z12copyToOpenMMPfS_i
.headerflags @"EF_CUDA_TEXMODE_UNIFIED EF_CUDA_64BIT_ADDRESS EF_CUDA_SM80 EF_CUDA_VIRTUAL_SM(EF_CUDA_SM80)"
/*0000*/ MOV R1, c[0x0][0x28] ; /* 0x00000a0000017a02 */
/* 0x000fe40000000f00 */
/*0010*/ S2R R0, SR_CTAID.X ; /* 0x0000000000007919 */
/* 0x000e280000002500 */
/*0020*/ S2R R3, SR_TID.X ; /* 0x0000000000037919 */
/* 0x000e240000002100 */
/*0030*/ IMAD R0, R0, c[0x0][0x0], R3 ; /* 0x0000000000007a24 */
/* 0x001fca00078e0203 */
/*0040*/ ISETP.GT.AND P0, PT, R0, c[0x0][0x170], PT ; /* 0x00005c0000007a0c */
/* 0x000fda0003f04270 */
/*0050*/ @P0 EXIT ; /* 0x000000000000094d */
/* 0x000fea0003800000 */
/*0060*/ HFMA2.MMA R6, -RZ, RZ, 0, 2.384185791015625e-07 ; /* 0x00000004ff067435 */
/* 0x000fe200000001ff */
/*0070*/ ULDC.64 UR4, c[0x0][0x118] ; /* 0x0000460000047ab9 */
/* 0x000fd20000000a00 */
/*0080*/ IMAD.WIDE R2, R0, R6, c[0x0][0x168] ; /* 0x00005a0000027625 */
/* 0x000fcc00078e0206 */
/*0090*/ LDG.E R3, [R2.64] ; /* 0x0000000402037981 */
/* 0x000ea2000c1e1900 */
/*00a0*/ IMAD.HI R4, R0, 0x55555556, RZ ; /* 0x5555555600047827 */
/* 0x000fca00078e02ff */
/*00b0*/ LEA.HI R5, R4, R4, RZ, 0x1 ; /* 0x0000000404057211 */
/* 0x000fca00078f08ff */
/*00c0*/ IMAD R0, R5, -0x3, R0 ; /* 0xfffffffd05007824 */
/* 0x000fca00078e0200 */
/*00d0*/ LEA R5, R5, R0, 0x2 ; /* 0x0000000005057211 */
/* 0x000fca00078e10ff */
/*00e0*/ IMAD.WIDE R4, R5, R6, c[0x0][0x160] ; /* 0x0000580005047625 */
/* 0x000fca00078e0206 */
/*00f0*/ STG.E [R4.64], R3 ; /* 0x0000000304007986 */
/* 0x004fe2000c101904 */
/*0100*/ EXIT ; /* 0x000000000000794d */
/* 0x000fea0003800000 */
/*0110*/ BRA 0x110; /* 0xfffffff000007947 */
/* 0x000fc0000383ffff */
/*0120*/ NOP; /* 0x0000000000007918 */
/* 0x000fc00000000000 */
/*0130*/ NOP; /* 0x0000000000007918 */
/* 0x000fc00000000000 */
/*0140*/ NOP; /* 0x0000000000007918 */
/* 0x000fc00000000000 */
/*0150*/ NOP; /* 0x0000000000007918 */
/* 0x000fc00000000000 */
/*0160*/ NOP; /* 0x0000000000007918 */
/* 0x000fc00000000000 */
/*0170*/ NOP; /* 0x0000000000007918 */
/* 0x000fc00000000000 */
/*0180*/ NOP; /* 0x0000000000007918 */
/* 0x000fc00000000000 */
/*0190*/ NOP; /* 0x0000000000007918 */
/* 0x000fc00000000000 */
/*01a0*/ NOP; /* 0x0000000000007918 */
/* 0x000fc00000000000 */
/*01b0*/ NOP; /* 0x0000000000007918 */
/* 0x000fc00000000000 */
/*01c0*/ NOP; /* 0x0000000000007918 */
/* 0x000fc00000000000 */
/*01d0*/ NOP; /* 0x0000000000007918 */
/* 0x000fc00000000000 */
/*01e0*/ NOP; /* 0x0000000000007918 */
/* 0x000fc00000000000 */
/*01f0*/ NOP; /* 0x0000000000007918 */
/* 0x000fc00000000000 */
.......... | .text
.amdgcn_target "amdgcn-amd-amdhsa--gfx1100"
.protected _Z12copyToOpenMMPfS_i
.globl _Z12copyToOpenMMPfS_i
.p2align 8
.type _Z12copyToOpenMMPfS_i,@function
_Z12copyToOpenMMPfS_i:
s_clause 0x1
s_load_b32 s2, s[0:1], 0x24
s_load_b32 s3, s[0:1], 0x10
s_waitcnt lgkmcnt(0)
s_and_b32 s2, s2, 0xffff
s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
v_mad_u64_u32 v[1:2], null, s15, s2, v[0:1]
s_mov_b32 s2, exec_lo
v_cmpx_ge_i32_e64 s3, v1
s_cbranch_execz .LBB0_2
s_load_b128 s[0:3], s[0:1], 0x0
v_ashrrev_i32_e32 v2, 31, v1
v_mul_hi_i32 v0, v1, 0x55555556
s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_1)
v_lshlrev_b64 v[2:3], 2, v[1:2]
s_waitcnt lgkmcnt(0)
v_add_co_u32 v2, vcc_lo, s2, v2
s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_2) | instid1(VALU_DEP_1)
v_add_co_ci_u32_e32 v3, vcc_lo, s3, v3, vcc_lo
global_load_b32 v2, v[2:3], off
v_lshrrev_b32_e32 v3, 31, v0
v_add_nc_u32_e32 v0, v0, v3
s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
v_lshl_add_u32 v3, v0, 1, v0
v_sub_nc_u32_e32 v1, v1, v3
s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
v_lshl_add_u32 v0, v0, 2, v1
v_ashrrev_i32_e32 v1, 31, v0
s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
v_lshlrev_b64 v[0:1], 2, v[0:1]
v_add_co_u32 v0, vcc_lo, s0, v0
s_delay_alu instid0(VALU_DEP_2)
v_add_co_ci_u32_e32 v1, vcc_lo, s1, v1, vcc_lo
s_waitcnt vmcnt(0)
global_store_b32 v[0:1], v2, off
.LBB0_2:
s_nop 0
s_sendmsg sendmsg(MSG_DEALLOC_VGPRS)
s_endpgm
.section .rodata,"a",@progbits
.p2align 6, 0x0
.amdhsa_kernel _Z12copyToOpenMMPfS_i
.amdhsa_group_segment_fixed_size 0
.amdhsa_private_segment_fixed_size 0
.amdhsa_kernarg_size 280
.amdhsa_user_sgpr_count 15
.amdhsa_user_sgpr_dispatch_ptr 0
.amdhsa_user_sgpr_queue_ptr 0
.amdhsa_user_sgpr_kernarg_segment_ptr 1
.amdhsa_user_sgpr_dispatch_id 0
.amdhsa_user_sgpr_private_segment_size 0
.amdhsa_wavefront_size32 1
.amdhsa_uses_dynamic_stack 0
.amdhsa_enable_private_segment 0
.amdhsa_system_sgpr_workgroup_id_x 1
.amdhsa_system_sgpr_workgroup_id_y 0
.amdhsa_system_sgpr_workgroup_id_z 0
.amdhsa_system_sgpr_workgroup_info 0
.amdhsa_system_vgpr_workitem_id 0
.amdhsa_next_free_vgpr 4
.amdhsa_next_free_sgpr 16
.amdhsa_float_round_mode_32 0
.amdhsa_float_round_mode_16_64 0
.amdhsa_float_denorm_mode_32 3
.amdhsa_float_denorm_mode_16_64 3
.amdhsa_dx10_clamp 1
.amdhsa_ieee_mode 1
.amdhsa_fp16_overflow 0
.amdhsa_workgroup_processor_mode 1
.amdhsa_memory_ordered 1
.amdhsa_forward_progress 0
.amdhsa_shared_vgpr_count 0
.amdhsa_exception_fp_ieee_invalid_op 0
.amdhsa_exception_fp_denorm_src 0
.amdhsa_exception_fp_ieee_div_zero 0
.amdhsa_exception_fp_ieee_overflow 0
.amdhsa_exception_fp_ieee_underflow 0
.amdhsa_exception_fp_ieee_inexact 0
.amdhsa_exception_int_div_zero 0
.end_amdhsa_kernel
.text
.Lfunc_end0:
.size _Z12copyToOpenMMPfS_i, .Lfunc_end0-_Z12copyToOpenMMPfS_i
.section .AMDGPU.csdata,"",@progbits
.text
.p2alignl 7, 3214868480
.fill 96, 4, 3214868480
.type __hip_cuid_,@object
.section .bss,"aw",@nobits
.globl __hip_cuid_
__hip_cuid_:
.byte 0
.size __hip_cuid_, 1
.ident "AMD clang version 18.0.0git (https://github.com/RadeonOpenCompute/llvm-project roc-6.3.2 25012 e5bf7e55c91490b07c49d8960fa7983d864936c4)"
.section ".note.GNU-stack","",@progbits
.addrsig
.addrsig_sym __hip_cuid_
.amdgpu_metadata
---
amdhsa.kernels:
- .args:
- .address_space: global
.offset: 0
.size: 8
.value_kind: global_buffer
- .address_space: global
.offset: 8
.size: 8
.value_kind: global_buffer
- .offset: 16
.size: 4
.value_kind: by_value
- .offset: 24
.size: 4
.value_kind: hidden_block_count_x
- .offset: 28
.size: 4
.value_kind: hidden_block_count_y
- .offset: 32
.size: 4
.value_kind: hidden_block_count_z
- .offset: 36
.size: 2
.value_kind: hidden_group_size_x
- .offset: 38
.size: 2
.value_kind: hidden_group_size_y
- .offset: 40
.size: 2
.value_kind: hidden_group_size_z
- .offset: 42
.size: 2
.value_kind: hidden_remainder_x
- .offset: 44
.size: 2
.value_kind: hidden_remainder_y
- .offset: 46
.size: 2
.value_kind: hidden_remainder_z
- .offset: 64
.size: 8
.value_kind: hidden_global_offset_x
- .offset: 72
.size: 8
.value_kind: hidden_global_offset_y
- .offset: 80
.size: 8
.value_kind: hidden_global_offset_z
- .offset: 88
.size: 2
.value_kind: hidden_grid_dims
.group_segment_fixed_size: 0
.kernarg_segment_align: 8
.kernarg_segment_size: 280
.language: OpenCL C
.language_version:
- 2
- 0
.max_flat_workgroup_size: 1024
.name: _Z12copyToOpenMMPfS_i
.private_segment_fixed_size: 0
.sgpr_count: 18
.sgpr_spill_count: 0
.symbol: _Z12copyToOpenMMPfS_i.kd
.uniform_work_group_size: 1
.uses_dynamic_stack: false
.vgpr_count: 4
.vgpr_spill_count: 0
.wavefront_size: 32
.workgroup_processor_mode: 1
amdhsa.target: amdgcn-amd-amdhsa--gfx1100
amdhsa.version:
- 1
- 2
...
.end_amdgpu_metadata |
You are a helpful coding assistant specialized in converting from CUDA host assembly to AMD host assembly. | .file "tmpxft_00083652_00000000-6_CopyToOpenMM_kernel.cudafe1.cpp"
.text
#APP
#NO_APP
.type _ZL26__cudaUnregisterBinaryUtilv, @function
_ZL26__cudaUnregisterBinaryUtilv:
.LFB2029:
.cfi_startproc
endbr64
subq $8, %rsp
.cfi_def_cfa_offset 16
movq _ZL20__cudaFatCubinHandle(%rip), %rdi
call __cudaUnregisterFatBinary@PLT
addq $8, %rsp
.cfi_def_cfa_offset 8
ret
.cfi_endproc
.LFE2029:
.size _ZL26__cudaUnregisterBinaryUtilv, .-_ZL26__cudaUnregisterBinaryUtilv
.globl _Z35__device_stub__Z12copyToOpenMMPfS_iPfS_i
.type _Z35__device_stub__Z12copyToOpenMMPfS_iPfS_i, @function
_Z35__device_stub__Z12copyToOpenMMPfS_iPfS_i:
.LFB2051:
.cfi_startproc
endbr64
subq $136, %rsp
.cfi_def_cfa_offset 144
movq %rdi, 24(%rsp)
movq %rsi, 16(%rsp)
movl %edx, 12(%rsp)
movq %fs:40, %rax
movq %rax, 120(%rsp)
xorl %eax, %eax
leaq 24(%rsp), %rax
movq %rax, 96(%rsp)
leaq 16(%rsp), %rax
movq %rax, 104(%rsp)
leaq 12(%rsp), %rax
movq %rax, 112(%rsp)
movl $1, 48(%rsp)
movl $1, 52(%rsp)
movl $1, 56(%rsp)
movl $1, 60(%rsp)
movl $1, 64(%rsp)
movl $1, 68(%rsp)
leaq 40(%rsp), %rcx
leaq 32(%rsp), %rdx
leaq 60(%rsp), %rsi
leaq 48(%rsp), %rdi
call __cudaPopCallConfiguration@PLT
testl %eax, %eax
je .L7
.L3:
movq 120(%rsp), %rax
subq %fs:40, %rax
jne .L8
addq $136, %rsp
.cfi_remember_state
.cfi_def_cfa_offset 8
ret
.L7:
.cfi_restore_state
pushq 40(%rsp)
.cfi_def_cfa_offset 152
pushq 40(%rsp)
.cfi_def_cfa_offset 160
leaq 112(%rsp), %r9
movq 76(%rsp), %rcx
movl 84(%rsp), %r8d
movq 64(%rsp), %rsi
movl 72(%rsp), %edx
leaq _Z12copyToOpenMMPfS_i(%rip), %rdi
call cudaLaunchKernel@PLT
addq $16, %rsp
.cfi_def_cfa_offset 144
jmp .L3
.L8:
call __stack_chk_fail@PLT
.cfi_endproc
.LFE2051:
.size _Z35__device_stub__Z12copyToOpenMMPfS_iPfS_i, .-_Z35__device_stub__Z12copyToOpenMMPfS_iPfS_i
.globl _Z12copyToOpenMMPfS_i
.type _Z12copyToOpenMMPfS_i, @function
_Z12copyToOpenMMPfS_i:
.LFB2052:
.cfi_startproc
endbr64
subq $8, %rsp
.cfi_def_cfa_offset 16
call _Z35__device_stub__Z12copyToOpenMMPfS_iPfS_i
addq $8, %rsp
.cfi_def_cfa_offset 8
ret
.cfi_endproc
.LFE2052:
.size _Z12copyToOpenMMPfS_i, .-_Z12copyToOpenMMPfS_i
.section .rodata.str1.1,"aMS",@progbits,1
.LC0:
.string "_Z12copyToOpenMMPfS_i"
.text
.type _ZL24__sti____cudaRegisterAllv, @function
_ZL24__sti____cudaRegisterAllv:
.LFB2054:
.cfi_startproc
endbr64
subq $8, %rsp
.cfi_def_cfa_offset 16
leaq _ZL15__fatDeviceText(%rip), %rdi
call __cudaRegisterFatBinary@PLT
movq %rax, %rdi
movq %rax, _ZL20__cudaFatCubinHandle(%rip)
pushq $0
.cfi_def_cfa_offset 24
pushq $0
.cfi_def_cfa_offset 32
pushq $0
.cfi_def_cfa_offset 40
pushq $0
.cfi_def_cfa_offset 48
movl $0, %r9d
movl $-1, %r8d
leaq .LC0(%rip), %rdx
movq %rdx, %rcx
leaq _Z12copyToOpenMMPfS_i(%rip), %rsi
call __cudaRegisterFunction@PLT
addq $32, %rsp
.cfi_def_cfa_offset 16
movq _ZL20__cudaFatCubinHandle(%rip), %rdi
call __cudaRegisterFatBinaryEnd@PLT
leaq _ZL26__cudaUnregisterBinaryUtilv(%rip), %rdi
call atexit@PLT
addq $8, %rsp
.cfi_def_cfa_offset 8
ret
.cfi_endproc
.LFE2054:
.size _ZL24__sti____cudaRegisterAllv, .-_ZL24__sti____cudaRegisterAllv
.section .init_array,"aw"
.align 8
.quad _ZL24__sti____cudaRegisterAllv
.section .nvFatBinSegment,"aw"
.align 8
.type _ZL15__fatDeviceText, @object
.size _ZL15__fatDeviceText, 24
_ZL15__fatDeviceText:
.long 1180844977
.long 1
.quad fatbinData
.quad 0
.local _ZL20__cudaFatCubinHandle
.comm _ZL20__cudaFatCubinHandle,8,8
.ident "GCC: (Ubuntu 13.3.0-6ubuntu2~24.04) 13.3.0"
.section .note.GNU-stack,"",@progbits
.section .note.gnu.property,"a"
.align 8
.long 1f - 0f
.long 4f - 1f
.long 5
0:
.string "GNU"
1:
.align 8
.long 0xc0000002
.long 3f - 2f
2:
.long 0x3
3:
.align 8
4: | .text
.file "CopyToOpenMM_kernel.hip"
.globl _Z27__device_stub__copyToOpenMMPfS_i # -- Begin function _Z27__device_stub__copyToOpenMMPfS_i
.p2align 4, 0x90
.type _Z27__device_stub__copyToOpenMMPfS_i,@function
_Z27__device_stub__copyToOpenMMPfS_i: # @_Z27__device_stub__copyToOpenMMPfS_i
.cfi_startproc
# %bb.0:
subq $104, %rsp
.cfi_def_cfa_offset 112
movq %rdi, 72(%rsp)
movq %rsi, 64(%rsp)
movl %edx, 12(%rsp)
leaq 72(%rsp), %rax
movq %rax, 80(%rsp)
leaq 64(%rsp), %rax
movq %rax, 88(%rsp)
leaq 12(%rsp), %rax
movq %rax, 96(%rsp)
leaq 48(%rsp), %rdi
leaq 32(%rsp), %rsi
leaq 24(%rsp), %rdx
leaq 16(%rsp), %rcx
callq __hipPopCallConfiguration
movq 48(%rsp), %rsi
movl 56(%rsp), %edx
movq 32(%rsp), %rcx
movl 40(%rsp), %r8d
leaq 80(%rsp), %r9
movl $_Z12copyToOpenMMPfS_i, %edi
pushq 16(%rsp)
.cfi_adjust_cfa_offset 8
pushq 32(%rsp)
.cfi_adjust_cfa_offset 8
callq hipLaunchKernel
addq $120, %rsp
.cfi_adjust_cfa_offset -120
retq
.Lfunc_end0:
.size _Z27__device_stub__copyToOpenMMPfS_i, .Lfunc_end0-_Z27__device_stub__copyToOpenMMPfS_i
.cfi_endproc
# -- End function
.p2align 4, 0x90 # -- Begin function __hip_module_ctor
.type __hip_module_ctor,@function
__hip_module_ctor: # @__hip_module_ctor
.cfi_startproc
# %bb.0:
subq $40, %rsp
.cfi_def_cfa_offset 48
cmpq $0, __hip_gpubin_handle(%rip)
jne .LBB1_2
# %bb.1:
movl $__hip_fatbin_wrapper, %edi
callq __hipRegisterFatBinary
movq %rax, __hip_gpubin_handle(%rip)
.LBB1_2:
movq __hip_gpubin_handle(%rip), %rdi
xorps %xmm0, %xmm0
movups %xmm0, 16(%rsp)
movups %xmm0, (%rsp)
movl $_Z12copyToOpenMMPfS_i, %esi
movl $.L__unnamed_1, %edx
movl $.L__unnamed_1, %ecx
movl $-1, %r8d
xorl %r9d, %r9d
callq __hipRegisterFunction
movl $__hip_module_dtor, %edi
addq $40, %rsp
.cfi_def_cfa_offset 8
jmp atexit # TAILCALL
.Lfunc_end1:
.size __hip_module_ctor, .Lfunc_end1-__hip_module_ctor
.cfi_endproc
# -- End function
.p2align 4, 0x90 # -- Begin function __hip_module_dtor
.type __hip_module_dtor,@function
__hip_module_dtor: # @__hip_module_dtor
.cfi_startproc
# %bb.0:
movq __hip_gpubin_handle(%rip), %rdi
testq %rdi, %rdi
je .LBB2_2
# %bb.1:
pushq %rax
.cfi_def_cfa_offset 16
callq __hipUnregisterFatBinary
movq $0, __hip_gpubin_handle(%rip)
addq $8, %rsp
.cfi_def_cfa_offset 8
.LBB2_2:
retq
.Lfunc_end2:
.size __hip_module_dtor, .Lfunc_end2-__hip_module_dtor
.cfi_endproc
# -- End function
.type _Z12copyToOpenMMPfS_i,@object # @_Z12copyToOpenMMPfS_i
.section .rodata,"a",@progbits
.globl _Z12copyToOpenMMPfS_i
.p2align 3, 0x0
_Z12copyToOpenMMPfS_i:
.quad _Z27__device_stub__copyToOpenMMPfS_i
.size _Z12copyToOpenMMPfS_i, 8
.type .L__unnamed_1,@object # @0
.section .rodata.str1.1,"aMS",@progbits,1
.L__unnamed_1:
.asciz "_Z12copyToOpenMMPfS_i"
.size .L__unnamed_1, 22
.type __hip_fatbin_wrapper,@object # @__hip_fatbin_wrapper
.section .hipFatBinSegment,"a",@progbits
.p2align 3, 0x0
__hip_fatbin_wrapper:
.long 1212764230 # 0x48495046
.long 1 # 0x1
.quad __hip_fatbin
.quad 0
.size __hip_fatbin_wrapper, 24
.type __hip_gpubin_handle,@object # @__hip_gpubin_handle
.local __hip_gpubin_handle
.comm __hip_gpubin_handle,8,8
.section .init_array,"aw",@init_array
.p2align 3, 0x0
.quad __hip_module_ctor
.type __hip_cuid_,@object # @__hip_cuid_
.bss
.globl __hip_cuid_
__hip_cuid_:
.byte 0 # 0x0
.size __hip_cuid_, 1
.section ".linker-options","e",@llvm_linker_options
.ident "AMD clang version 18.0.0git (https://github.com/RadeonOpenCompute/llvm-project roc-6.3.2 25012 e5bf7e55c91490b07c49d8960fa7983d864936c4)"
.section ".note.GNU-stack","",@progbits
.addrsig
.addrsig_sym _Z27__device_stub__copyToOpenMMPfS_i
.addrsig_sym __hip_module_ctor
.addrsig_sym __hip_module_dtor
.addrsig_sym _Z12copyToOpenMMPfS_i
.addrsig_sym __hip_fatbin
.addrsig_sym __hip_fatbin_wrapper
.addrsig_sym __hip_cuid_ |
You are a helpful coding assistant specialized in converting CUDA source code to CUDA device assembly. | /******************************************************************************
*cr
*cr (C) Copyright 2010 The Board of Trustees of the
*cr University of Illinois
*cr All Rights Reserved
*cr
******************************************************************************/
#include <stdio.h>
__global__ void mysgemm(int m, int n, int k, const float *A, const float *B, float* C) {
/********************************************************************
*
* Compute C = A x B
* where A is a (m x k) matrix
* where B is a (k x n) matrix
* where C is a (m x n) matrix
*
********************************************************************/
// INSERT KERNEL CODE HERE
//Compute matrix C
int ROW = blockIdx.y * blockDim.y + threadIdx.y;
int COL = blockIdx.x * blockDim.x + threadIdx.x;
float SUM = 0;
if (COL < n && ROW < m)
{
for(unsigned int i = 0; i < k; ++i)
{
SUM += A[ROW * k + i] * B[i * n + COL];
}
C[ROW * n + COL] = SUM;
}
}
void basicSgemm(char transa, char transb, int m, int n, int k, float alpha, const float *A, int lda, const float *B, int ldb, float beta, float *C, int ldc)
{
if ((transa != 'N') && (transa != 'n')) {
printf("unsupported value of 'transa'\n");
return;
}
if ((transb != 'N') && (transb != 'n')) {
printf("unsupported value of 'transb'\n");
return;
}
if ((alpha - 1.0f > 1e-10) || (alpha - 1.0f < -1e-10)) {
printf("unsupported value of alpha\n");
return;
}
if ((beta - 0.0f > 1e-10) || (beta - 0.0f < -1e-10)) {
printf("unsupported value of beta\n");
return;
}
// Initialize thread block and kernel grid dimensions ---------------------
const unsigned int BLOCK_SIZE = 16; // Use 16x16 thread blocks
//INSERT CODE HERE
unsigned int gridrows = ceil((m + BLOCK_SIZE - 1) / BLOCK_SIZE);
unsigned int gridcols = ceil((n + BLOCK_SIZE - 1) / BLOCK_SIZE);
dim3 dimBlock(BLOCK_SIZE, BLOCK_SIZE);
dim3 dimGrid(gridcols, gridrows);
// Invoke CUDA kernel -----------------------------------------------------
//INSERT CODE HERE
mysgemm<<<dimGrid, dimBlock>>>(m, n, k, A, B, C);
} | code for sm_80
Function : _Z7mysgemmiiiPKfS0_Pf
.headerflags @"EF_CUDA_TEXMODE_UNIFIED EF_CUDA_64BIT_ADDRESS EF_CUDA_SM80 EF_CUDA_VIRTUAL_SM(EF_CUDA_SM80)"
/*0000*/ MOV R1, c[0x0][0x28] ; /* 0x00000a0000017a02 */
/* 0x000fe40000000f00 */
/*0010*/ S2R R3, SR_CTAID.X ; /* 0x0000000000037919 */
/* 0x000e280000002500 */
/*0020*/ S2R R26, SR_TID.X ; /* 0x00000000001a7919 */
/* 0x000e280000002100 */
/*0030*/ S2R R17, SR_CTAID.Y ; /* 0x0000000000117919 */
/* 0x000e680000002600 */
/*0040*/ S2R R2, SR_TID.Y ; /* 0x0000000000027919 */
/* 0x000e620000002200 */
/*0050*/ IMAD R0, R3, c[0x0][0x0], R26 ; /* 0x0000000003007a24 */
/* 0x001fca00078e021a */
/*0060*/ ISETP.GE.AND P0, PT, R0, c[0x0][0x164], PT ; /* 0x0000590000007a0c */
/* 0x000fe20003f06270 */
/*0070*/ IMAD R17, R17, c[0x0][0x4], R2 ; /* 0x0000010011117a24 */
/* 0x002fca00078e0202 */
/*0080*/ ISETP.GE.OR P0, PT, R17, c[0x0][0x160], P0 ; /* 0x0000580011007a0c */
/* 0x000fda0000706670 */
/*0090*/ @P0 EXIT ; /* 0x000000000000094d */
/* 0x000fea0003800000 */
/*00a0*/ ISETP.NE.AND P0, PT, RZ, c[0x0][0x168], PT ; /* 0x00005a00ff007a0c */
/* 0x000fe20003f05270 */
/*00b0*/ ULDC.64 UR4, c[0x0][0x118] ; /* 0x0000460000047ab9 */
/* 0x000fe20000000a00 */
/*00c0*/ HFMA2.MMA R25, -RZ, RZ, 0, 0 ; /* 0x00000000ff197435 */
/* 0x000fd600000001ff */
/*00d0*/ @!P0 BRA 0x4f0 ; /* 0x0000041000008947 */
/* 0x000fea0003800000 */
/*00e0*/ IMAD.MOV.U32 R2, RZ, RZ, c[0x0][0x168] ; /* 0x00005a00ff027624 */
/* 0x000fe200078e00ff */
/*00f0*/ MOV R25, RZ ; /* 0x000000ff00197202 */
/* 0x000fe20000000f00 */
/*0100*/ IMAD.MOV.U32 R19, RZ, RZ, RZ ; /* 0x000000ffff137224 */
/* 0x000fc600078e00ff */
/*0110*/ IADD3 R4, R2.reuse, -0x1, RZ ; /* 0xffffffff02047810 */
/* 0x040fe40007ffe0ff */
/*0120*/ LOP3.LUT R18, R2, 0x3, RZ, 0xc0, !PT ; /* 0x0000000302127812 */
/* 0x000fe400078ec0ff */
/*0130*/ ISETP.GE.U32.AND P1, PT, R4, 0x3, PT ; /* 0x000000030400780c */
/* 0x000fe40003f26070 */
/*0140*/ ISETP.NE.AND P0, PT, R18, RZ, PT ; /* 0x000000ff1200720c */
/* 0x000fd60003f05270 */
/*0150*/ @!P1 BRA 0x410 ; /* 0x000002b000009947 */
/* 0x000fea0003800000 */
/*0160*/ IADD3 R26, R26, c[0x0][0x164], RZ ; /* 0x000059001a1a7a10 */
/* 0x000fe20007ffe0ff */
/*0170*/ HFMA2.MMA R19, -RZ, RZ, 0, 0 ; /* 0x00000000ff137435 */
/* 0x000fe200000001ff */
/*0180*/ MOV R21, c[0x0][0x164] ; /* 0x0000590000157a02 */
/* 0x000fe20000000f00 */
/*0190*/ IMAD R23, R17, R2, 0x3 ; /* 0x0000000311177424 */
/* 0x000fe200078e0202 */
/*01a0*/ IADD3 R22, R18, -c[0x0][0x168], RZ ; /* 0x80005a0012167a10 */
/* 0x000fe20007ffe0ff */
/*01b0*/ IMAD R26, R3, c[0x0][0x0], R26 ; /* 0x00000000031a7a24 */
/* 0x000fe200078e021a */
/*01c0*/ MOV R24, R0 ; /* 0x0000000000187202 */
/* 0x000fe20000000f00 */
/*01d0*/ IMAD.MOV.U32 R25, RZ, RZ, RZ ; /* 0x000000ffff197224 */
/* 0x000fe400078e00ff */
/*01e0*/ IMAD R16, R21.reuse, 0x2, R0.reuse ; /* 0x0000000215107824 */
/* 0x140fe400078e0200 */
/*01f0*/ IMAD R20, R21, 0x3, R0 ; /* 0x0000000315147824 */
/* 0x000fc400078e0200 */
/*0200*/ IADD3 R28, R23, -0x3, RZ ; /* 0xfffffffd171c7810 */
/* 0x000fe40007ffe0ff */
/*0210*/ MOV R13, 0x4 ; /* 0x00000004000d7802 */
/* 0x000fc40000000f00 */
/*0220*/ IADD3 R4, R23.reuse, -0x2, RZ ; /* 0xfffffffe17047810 */
/* 0x040fe40007ffe0ff */
/*0230*/ IADD3 R8, R23, -0x1, RZ ; /* 0xffffffff17087810 */
/* 0x000fe20007ffe0ff */
/*0240*/ IMAD.WIDE.U32 R28, R28, R13, c[0x0][0x170] ; /* 0x00005c001c1c7625 */
/* 0x000fc800078e000d */
/*0250*/ IMAD.WIDE.U32 R14, R24, R13.reuse, c[0x0][0x178] ; /* 0x00005e00180e7625 */
/* 0x080fe400078e000d */
/*0260*/ LDG.E R28, [R28.64] ; /* 0x000000041c1c7981 */
/* 0x000ea4000c1e1900 */
/*0270*/ IMAD.WIDE.U32 R4, R4, R13.reuse, c[0x0][0x170] ; /* 0x00005c0004047625 */
/* 0x080fe400078e000d */
/*0280*/ LDG.E R14, [R14.64] ; /* 0x000000040e0e7981 */
/* 0x000ea4000c1e1900 */
/*0290*/ IMAD.WIDE.U32 R6, R26, R13.reuse, c[0x0][0x178] ; /* 0x00005e001a067625 */
/* 0x080fe400078e000d */
/*02a0*/ LDG.E R4, [R4.64] ; /* 0x0000000404047981 */
/* 0x000ee4000c1e1900 */
/*02b0*/ IMAD.WIDE.U32 R8, R8, R13, c[0x0][0x170] ; /* 0x00005c0008087625 */
/* 0x000fc400078e000d */
/*02c0*/ LDG.E R7, [R6.64] ; /* 0x0000000406077981 */
/* 0x000ee4000c1e1900 */
/*02d0*/ IMAD.WIDE.U32 R2, R16, R13.reuse, c[0x0][0x178] ; /* 0x00005e0010027625 */
/* 0x080fe400078e000d */
/*02e0*/ LDG.E R8, [R8.64] ; /* 0x0000000408087981 */
/* 0x000f24000c1e1900 */
/*02f0*/ IMAD.WIDE.U32 R10, R23, R13.reuse, c[0x0][0x170] ; /* 0x00005c00170a7625 */
/* 0x080fe400078e000d */
/*0300*/ LDG.E R2, [R2.64] ; /* 0x0000000402027981 */
/* 0x000f24000c1e1900 */
/*0310*/ IMAD.WIDE.U32 R12, R20, R13, c[0x0][0x178] ; /* 0x00005e00140c7625 */
/* 0x000fc400078e000d */
/*0320*/ LDG.E R10, [R10.64] ; /* 0x000000040a0a7981 */
/* 0x000f68000c1e1900 */
/*0330*/ LDG.E R12, [R12.64] ; /* 0x000000040c0c7981 */
/* 0x000f62000c1e1900 */
/*0340*/ IADD3 R19, R19, 0x4, RZ ; /* 0x0000000413137810 */
/* 0x000fe20007ffe0ff */
/*0350*/ IMAD R26, R21.reuse, 0x4, R26 ; /* 0x00000004151a7824 */
/* 0x040fe200078e021a */
/*0360*/ LEA R16, R21.reuse, R16, 0x2 ; /* 0x0000001015107211 */
/* 0x040fe200078e10ff */
/*0370*/ IMAD R20, R21.reuse, 0x4, R20 ; /* 0x0000000415147824 */
/* 0x040fe200078e0214 */
/*0380*/ LEA R24, R21, R24, 0x2 ; /* 0x0000001815187211 */
/* 0x000fe400078e10ff */
/*0390*/ IADD3 R23, R23, 0x4, RZ ; /* 0x0000000417177810 */
/* 0x000fe20007ffe0ff */
/*03a0*/ FFMA R14, R14, R28, R25 ; /* 0x0000001c0e0e7223 */
/* 0x004fc80000000019 */
/*03b0*/ FFMA R5, R7, R4, R14 ; /* 0x0000000407057223 */
/* 0x008fe2000000000e */
/*03c0*/ IADD3 R4, R22, R19, RZ ; /* 0x0000001316047210 */
/* 0x000fc80007ffe0ff */
/*03d0*/ ISETP.NE.AND P1, PT, R4, RZ, PT ; /* 0x000000ff0400720c */
/* 0x000fe20003f25270 */
/*03e0*/ FFMA R5, R2, R8, R5 ; /* 0x0000000802057223 */
/* 0x010fc80000000005 */
/*03f0*/ FFMA R25, R12, R10, R5 ; /* 0x0000000a0c197223 */
/* 0x020fd00000000005 */
/*0400*/ @P1 BRA 0x200 ; /* 0xfffffdf000001947 */
/* 0x000fea000383ffff */
/*0410*/ @!P0 BRA 0x4f0 ; /* 0x000000d000008947 */
/* 0x000fea0003800000 */
/*0420*/ IMAD R6, R19, c[0x0][0x164], R0 ; /* 0x0000590013067a24 */
/* 0x000fe400078e0200 */
/*0430*/ IMAD R19, R17, c[0x0][0x168], R19 ; /* 0x00005a0011137a24 */
/* 0x000fe400078e0213 */
/*0440*/ HFMA2.MMA R4, -RZ, RZ, 0, 2.384185791015625e-07 ; /* 0x00000004ff047435 */
/* 0x000fd400000001ff */
/*0450*/ IMAD.WIDE.U32 R2, R19, R4, c[0x0][0x170] ; /* 0x00005c0013027625 */
/* 0x000fc800078e0004 */
/*0460*/ IMAD.WIDE.U32 R4, R6, R4, c[0x0][0x178] ; /* 0x00005e0006047625 */
/* 0x000fe400078e0004 */
/*0470*/ LDG.E R2, [R2.64] ; /* 0x0000000402027981 */
/* 0x000ea8000c1e1900 */
/*0480*/ LDG.E R4, [R4.64] ; /* 0x0000000404047981 */
/* 0x000ea2000c1e1900 */
/*0490*/ IADD3 R18, R18, -0x1, RZ ; /* 0xffffffff12127810 */
/* 0x000fe40007ffe0ff */
/*04a0*/ IADD3 R19, R19, 0x1, RZ ; /* 0x0000000113137810 */
/* 0x000fe40007ffe0ff */
/*04b0*/ ISETP.NE.AND P0, PT, R18, RZ, PT ; /* 0x000000ff1200720c */
/* 0x000fc40003f05270 */
/*04c0*/ IADD3 R6, R6, c[0x0][0x164], RZ ; /* 0x0000590006067a10 */
/* 0x000fe20007ffe0ff */
/*04d0*/ FFMA R25, R4, R2, R25 ; /* 0x0000000204197223 */
/* 0x004fd40000000019 */
/*04e0*/ @P0 BRA 0x440 ; /* 0xffffff5000000947 */
/* 0x000fea000383ffff */
/*04f0*/ MOV R3, 0x4 ; /* 0x0000000400037802 */
/* 0x000fe20000000f00 */
/*0500*/ IMAD R2, R17, c[0x0][0x164], R0 ; /* 0x0000590011027a24 */
/* 0x000fc800078e0200 */
/*0510*/ IMAD.WIDE R2, R2, R3, c[0x0][0x180] ; /* 0x0000600002027625 */
/* 0x000fca00078e0203 */
/*0520*/ STG.E [R2.64], R25 ; /* 0x0000001902007986 */
/* 0x000fe2000c101904 */
/*0530*/ EXIT ; /* 0x000000000000794d */
/* 0x000fea0003800000 */
/*0540*/ BRA 0x540; /* 0xfffffff000007947 */
/* 0x000fc0000383ffff */
/*0550*/ NOP; /* 0x0000000000007918 */
/* 0x000fc00000000000 */
/*0560*/ NOP; /* 0x0000000000007918 */
/* 0x000fc00000000000 */
/*0570*/ NOP; /* 0x0000000000007918 */
/* 0x000fc00000000000 */
/*0580*/ NOP; /* 0x0000000000007918 */
/* 0x000fc00000000000 */
/*0590*/ NOP; /* 0x0000000000007918 */
/* 0x000fc00000000000 */
/*05a0*/ NOP; /* 0x0000000000007918 */
/* 0x000fc00000000000 */
/*05b0*/ NOP; /* 0x0000000000007918 */
/* 0x000fc00000000000 */
/*05c0*/ NOP; /* 0x0000000000007918 */
/* 0x000fc00000000000 */
/*05d0*/ NOP; /* 0x0000000000007918 */
/* 0x000fc00000000000 */
/*05e0*/ NOP; /* 0x0000000000007918 */
/* 0x000fc00000000000 */
/*05f0*/ NOP; /* 0x0000000000007918 */
/* 0x000fc00000000000 */
.......... |
You are a helpful coding assistant specialized in converting CUDA source code to CUDA host assembly. | /******************************************************************************
*cr
*cr (C) Copyright 2010 The Board of Trustees of the
*cr University of Illinois
*cr All Rights Reserved
*cr
******************************************************************************/
#include <stdio.h>
__global__ void mysgemm(int m, int n, int k, const float *A, const float *B, float* C) {
/********************************************************************
*
* Compute C = A x B
* where A is a (m x k) matrix
* where B is a (k x n) matrix
* where C is a (m x n) matrix
*
********************************************************************/
// INSERT KERNEL CODE HERE
//Compute matrix C
int ROW = blockIdx.y * blockDim.y + threadIdx.y;
int COL = blockIdx.x * blockDim.x + threadIdx.x;
float SUM = 0;
if (COL < n && ROW < m)
{
for(unsigned int i = 0; i < k; ++i)
{
SUM += A[ROW * k + i] * B[i * n + COL];
}
C[ROW * n + COL] = SUM;
}
}
void basicSgemm(char transa, char transb, int m, int n, int k, float alpha, const float *A, int lda, const float *B, int ldb, float beta, float *C, int ldc)
{
if ((transa != 'N') && (transa != 'n')) {
printf("unsupported value of 'transa'\n");
return;
}
if ((transb != 'N') && (transb != 'n')) {
printf("unsupported value of 'transb'\n");
return;
}
if ((alpha - 1.0f > 1e-10) || (alpha - 1.0f < -1e-10)) {
printf("unsupported value of alpha\n");
return;
}
if ((beta - 0.0f > 1e-10) || (beta - 0.0f < -1e-10)) {
printf("unsupported value of beta\n");
return;
}
// Initialize thread block and kernel grid dimensions ---------------------
const unsigned int BLOCK_SIZE = 16; // Use 16x16 thread blocks
//INSERT CODE HERE
unsigned int gridrows = ceil((m + BLOCK_SIZE - 1) / BLOCK_SIZE);
unsigned int gridcols = ceil((n + BLOCK_SIZE - 1) / BLOCK_SIZE);
dim3 dimBlock(BLOCK_SIZE, BLOCK_SIZE);
dim3 dimGrid(gridcols, gridrows);
// Invoke CUDA kernel -----------------------------------------------------
//INSERT CODE HERE
mysgemm<<<dimGrid, dimBlock>>>(m, n, k, A, B, C);
} | .file "tmpxft_0014c1fc_00000000-6_kernel.cudafe1.cpp"
.text
#APP
#NO_APP
.type _ZL26__cudaUnregisterBinaryUtilv, @function
_ZL26__cudaUnregisterBinaryUtilv:
.LFB2060:
.cfi_startproc
endbr64
subq $8, %rsp
.cfi_def_cfa_offset 16
movq _ZL20__cudaFatCubinHandle(%rip), %rdi
call __cudaUnregisterFatBinary@PLT
addq $8, %rsp
.cfi_def_cfa_offset 8
ret
.cfi_endproc
.LFE2060:
.size _ZL26__cudaUnregisterBinaryUtilv, .-_ZL26__cudaUnregisterBinaryUtilv
.globl _Z35__device_stub__Z7mysgemmiiiPKfS0_PfiiiPKfS0_Pf
.type _Z35__device_stub__Z7mysgemmiiiPKfS0_PfiiiPKfS0_Pf, @function
_Z35__device_stub__Z7mysgemmiiiPKfS0_PfiiiPKfS0_Pf:
.LFB2082:
.cfi_startproc
endbr64
subq $184, %rsp
.cfi_def_cfa_offset 192
movl %edi, 44(%rsp)
movl %esi, 40(%rsp)
movl %edx, 36(%rsp)
movq %rcx, 24(%rsp)
movq %r8, 16(%rsp)
movq %r9, 8(%rsp)
movq %fs:40, %rax
movq %rax, 168(%rsp)
xorl %eax, %eax
leaq 44(%rsp), %rax
movq %rax, 112(%rsp)
leaq 40(%rsp), %rax
movq %rax, 120(%rsp)
leaq 36(%rsp), %rax
movq %rax, 128(%rsp)
leaq 24(%rsp), %rax
movq %rax, 136(%rsp)
leaq 16(%rsp), %rax
movq %rax, 144(%rsp)
leaq 8(%rsp), %rax
movq %rax, 152(%rsp)
movl $1, 64(%rsp)
movl $1, 68(%rsp)
movl $1, 72(%rsp)
movl $1, 76(%rsp)
movl $1, 80(%rsp)
movl $1, 84(%rsp)
leaq 56(%rsp), %rcx
leaq 48(%rsp), %rdx
leaq 76(%rsp), %rsi
leaq 64(%rsp), %rdi
call __cudaPopCallConfiguration@PLT
testl %eax, %eax
je .L7
.L3:
movq 168(%rsp), %rax
subq %fs:40, %rax
jne .L8
addq $184, %rsp
.cfi_remember_state
.cfi_def_cfa_offset 8
ret
.L7:
.cfi_restore_state
pushq 56(%rsp)
.cfi_def_cfa_offset 200
pushq 56(%rsp)
.cfi_def_cfa_offset 208
leaq 128(%rsp), %r9
movq 92(%rsp), %rcx
movl 100(%rsp), %r8d
movq 80(%rsp), %rsi
movl 88(%rsp), %edx
leaq _Z7mysgemmiiiPKfS0_Pf(%rip), %rdi
call cudaLaunchKernel@PLT
addq $16, %rsp
.cfi_def_cfa_offset 192
jmp .L3
.L8:
call __stack_chk_fail@PLT
.cfi_endproc
.LFE2082:
.size _Z35__device_stub__Z7mysgemmiiiPKfS0_PfiiiPKfS0_Pf, .-_Z35__device_stub__Z7mysgemmiiiPKfS0_PfiiiPKfS0_Pf
.globl _Z7mysgemmiiiPKfS0_Pf
.type _Z7mysgemmiiiPKfS0_Pf, @function
_Z7mysgemmiiiPKfS0_Pf:
.LFB2083:
.cfi_startproc
endbr64
subq $8, %rsp
.cfi_def_cfa_offset 16
call _Z35__device_stub__Z7mysgemmiiiPKfS0_PfiiiPKfS0_Pf
addq $8, %rsp
.cfi_def_cfa_offset 8
ret
.cfi_endproc
.LFE2083:
.size _Z7mysgemmiiiPKfS0_Pf, .-_Z7mysgemmiiiPKfS0_Pf
.section .rodata.str1.8,"aMS",@progbits,1
.align 8
.LC0:
.string "unsupported value of 'transa'\n"
.align 8
.LC1:
.string "unsupported value of 'transb'\n"
.section .rodata.str1.1,"aMS",@progbits,1
.LC5:
.string "unsupported value of alpha\n"
.LC6:
.string "unsupported value of beta\n"
.text
.globl _Z10basicSgemmcciiifPKfiS0_ifPfi
.type _Z10basicSgemmcciiifPKfiS0_ifPfi, @function
_Z10basicSgemmcciiifPKfiS0_ifPfi:
.LFB2057:
.cfi_startproc
endbr64
pushq %r13
.cfi_def_cfa_offset 16
.cfi_offset 13, -16
pushq %r12
.cfi_def_cfa_offset 24
.cfi_offset 12, -24
pushq %rbp
.cfi_def_cfa_offset 32
.cfi_offset 6, -32
pushq %rbx
.cfi_def_cfa_offset 40
.cfi_offset 3, -40
subq $40, %rsp
.cfi_def_cfa_offset 80
andl $-33, %edi
cmpb $78, %dil
jne .L26
movl %edx, %ebx
movl %ecx, %ebp
movl %r8d, %r12d
movq %r9, %r13
andl $-33, %esi
cmpb $78, %sil
jne .L27
subss .LC2(%rip), %xmm0
cvtss2sd %xmm0, %xmm0
comisd .LC3(%rip), %xmm0
ja .L15
movsd .LC4(%rip), %xmm2
comisd %xmm0, %xmm2
ja .L15
cvtss2sd %xmm1, %xmm1
comisd .LC3(%rip), %xmm1
ja .L18
movsd .LC4(%rip), %xmm0
comisd %xmm1, %xmm0
jbe .L24
.L18:
leaq .LC6(%rip), %rsi
movl $2, %edi
movl $0, %eax
call __printf_chk@PLT
jmp .L11
.L26:
leaq .LC0(%rip), %rsi
movl $2, %edi
movl $0, %eax
call __printf_chk@PLT
jmp .L11
.L27:
leaq .LC1(%rip), %rsi
movl $2, %edi
movl $0, %eax
call __printf_chk@PLT
jmp .L11
.L15:
leaq .LC5(%rip), %rsi
movl $2, %edi
movl $0, %eax
call __printf_chk@PLT
.L11:
addq $40, %rsp
.cfi_remember_state
.cfi_def_cfa_offset 40
popq %rbx
.cfi_def_cfa_offset 32
popq %rbp
.cfi_def_cfa_offset 24
popq %r12
.cfi_def_cfa_offset 16
popq %r13
.cfi_def_cfa_offset 8
ret
.L24:
.cfi_restore_state
movl $16, 8(%rsp)
movl $16, 12(%rsp)
leal 15(%rcx), %eax
shrl $4, %eax
movl %eax, 20(%rsp)
leal 15(%rdx), %eax
shrl $4, %eax
movl %eax, 24(%rsp)
movl $0, %r9d
movl $0, %r8d
movq 8(%rsp), %rdx
movl $1, %ecx
movq 20(%rsp), %rdi
movl $1, %esi
call __cudaPushCallConfiguration@PLT
testl %eax, %eax
jne .L11
movq 104(%rsp), %r9
movq 88(%rsp), %r8
movq %r13, %rcx
movl %r12d, %edx
movl %ebp, %esi
movl %ebx, %edi
call _Z35__device_stub__Z7mysgemmiiiPKfS0_PfiiiPKfS0_Pf
jmp .L11
.cfi_endproc
.LFE2057:
.size _Z10basicSgemmcciiifPKfiS0_ifPfi, .-_Z10basicSgemmcciiifPKfiS0_ifPfi
.section .rodata.str1.1
.LC7:
.string "_Z7mysgemmiiiPKfS0_Pf"
.text
.type _ZL24__sti____cudaRegisterAllv, @function
_ZL24__sti____cudaRegisterAllv:
.LFB2085:
.cfi_startproc
endbr64
subq $8, %rsp
.cfi_def_cfa_offset 16
leaq _ZL15__fatDeviceText(%rip), %rdi
call __cudaRegisterFatBinary@PLT
movq %rax, %rdi
movq %rax, _ZL20__cudaFatCubinHandle(%rip)
pushq $0
.cfi_def_cfa_offset 24
pushq $0
.cfi_def_cfa_offset 32
pushq $0
.cfi_def_cfa_offset 40
pushq $0
.cfi_def_cfa_offset 48
movl $0, %r9d
movl $-1, %r8d
leaq .LC7(%rip), %rdx
movq %rdx, %rcx
leaq _Z7mysgemmiiiPKfS0_Pf(%rip), %rsi
call __cudaRegisterFunction@PLT
addq $32, %rsp
.cfi_def_cfa_offset 16
movq _ZL20__cudaFatCubinHandle(%rip), %rdi
call __cudaRegisterFatBinaryEnd@PLT
leaq _ZL26__cudaUnregisterBinaryUtilv(%rip), %rdi
call atexit@PLT
addq $8, %rsp
.cfi_def_cfa_offset 8
ret
.cfi_endproc
.LFE2085:
.size _ZL24__sti____cudaRegisterAllv, .-_ZL24__sti____cudaRegisterAllv
.section .init_array,"aw"
.align 8
.quad _ZL24__sti____cudaRegisterAllv
.section .nvFatBinSegment,"aw"
.align 8
.type _ZL15__fatDeviceText, @object
.size _ZL15__fatDeviceText, 24
_ZL15__fatDeviceText:
.long 1180844977
.long 1
.quad fatbinData
.quad 0
.local _ZL20__cudaFatCubinHandle
.comm _ZL20__cudaFatCubinHandle,8,8
.section .rodata.cst4,"aM",@progbits,4
.align 4
.LC2:
.long 1065353216
.section .rodata.cst8,"aM",@progbits,8
.align 8
.LC3:
.long -640172613
.long 1037794527
.align 8
.LC4:
.long -640172613
.long -1109689121
.ident "GCC: (Ubuntu 13.3.0-6ubuntu2~24.04) 13.3.0"
.section .note.GNU-stack,"",@progbits
.section .note.gnu.property,"a"
.align 8
.long 1f - 0f
.long 4f - 1f
.long 5
0:
.string "GNU"
1:
.align 8
.long 0xc0000002
.long 3f - 2f
2:
.long 0x3
3:
.align 8
4: |
You are a helpful coding assistant specialized in converting CUDA source code to HIP/AMD source code. | /******************************************************************************
*cr
*cr (C) Copyright 2010 The Board of Trustees of the
*cr University of Illinois
*cr All Rights Reserved
*cr
******************************************************************************/
#include <stdio.h>
__global__ void mysgemm(int m, int n, int k, const float *A, const float *B, float* C) {
/********************************************************************
*
* Compute C = A x B
* where A is a (m x k) matrix
* where B is a (k x n) matrix
* where C is a (m x n) matrix
*
********************************************************************/
// INSERT KERNEL CODE HERE
//Compute matrix C
int ROW = blockIdx.y * blockDim.y + threadIdx.y;
int COL = blockIdx.x * blockDim.x + threadIdx.x;
float SUM = 0;
if (COL < n && ROW < m)
{
for(unsigned int i = 0; i < k; ++i)
{
SUM += A[ROW * k + i] * B[i * n + COL];
}
C[ROW * n + COL] = SUM;
}
}
void basicSgemm(char transa, char transb, int m, int n, int k, float alpha, const float *A, int lda, const float *B, int ldb, float beta, float *C, int ldc)
{
if ((transa != 'N') && (transa != 'n')) {
printf("unsupported value of 'transa'\n");
return;
}
if ((transb != 'N') && (transb != 'n')) {
printf("unsupported value of 'transb'\n");
return;
}
if ((alpha - 1.0f > 1e-10) || (alpha - 1.0f < -1e-10)) {
printf("unsupported value of alpha\n");
return;
}
if ((beta - 0.0f > 1e-10) || (beta - 0.0f < -1e-10)) {
printf("unsupported value of beta\n");
return;
}
// Initialize thread block and kernel grid dimensions ---------------------
const unsigned int BLOCK_SIZE = 16; // Use 16x16 thread blocks
//INSERT CODE HERE
unsigned int gridrows = ceil((m + BLOCK_SIZE - 1) / BLOCK_SIZE);
unsigned int gridcols = ceil((n + BLOCK_SIZE - 1) / BLOCK_SIZE);
dim3 dimBlock(BLOCK_SIZE, BLOCK_SIZE);
dim3 dimGrid(gridcols, gridrows);
// Invoke CUDA kernel -----------------------------------------------------
//INSERT CODE HERE
mysgemm<<<dimGrid, dimBlock>>>(m, n, k, A, B, C);
} | /******************************************************************************
*cr
*cr (C) Copyright 2010 The Board of Trustees of the
*cr University of Illinois
*cr All Rights Reserved
*cr
******************************************************************************/
#include <hip/hip_runtime.h>
#include <stdio.h>
__global__ void mysgemm(int m, int n, int k, const float *A, const float *B, float* C) {
/********************************************************************
*
* Compute C = A x B
* where A is a (m x k) matrix
* where B is a (k x n) matrix
* where C is a (m x n) matrix
*
********************************************************************/
// INSERT KERNEL CODE HERE
//Compute matrix C
int ROW = blockIdx.y * blockDim.y + threadIdx.y;
int COL = blockIdx.x * blockDim.x + threadIdx.x;
float SUM = 0;
if (COL < n && ROW < m)
{
for(unsigned int i = 0; i < k; ++i)
{
SUM += A[ROW * k + i] * B[i * n + COL];
}
C[ROW * n + COL] = SUM;
}
}
void basicSgemm(char transa, char transb, int m, int n, int k, float alpha, const float *A, int lda, const float *B, int ldb, float beta, float *C, int ldc)
{
if ((transa != 'N') && (transa != 'n')) {
printf("unsupported value of 'transa'\n");
return;
}
if ((transb != 'N') && (transb != 'n')) {
printf("unsupported value of 'transb'\n");
return;
}
if ((alpha - 1.0f > 1e-10) || (alpha - 1.0f < -1e-10)) {
printf("unsupported value of alpha\n");
return;
}
if ((beta - 0.0f > 1e-10) || (beta - 0.0f < -1e-10)) {
printf("unsupported value of beta\n");
return;
}
// Initialize thread block and kernel grid dimensions ---------------------
const unsigned int BLOCK_SIZE = 16; // Use 16x16 thread blocks
//INSERT CODE HERE
unsigned int gridrows = ceil((m + BLOCK_SIZE - 1) / BLOCK_SIZE);
unsigned int gridcols = ceil((n + BLOCK_SIZE - 1) / BLOCK_SIZE);
dim3 dimBlock(BLOCK_SIZE, BLOCK_SIZE);
dim3 dimGrid(gridcols, gridrows);
// Invoke CUDA kernel -----------------------------------------------------
//INSERT CODE HERE
mysgemm<<<dimGrid, dimBlock>>>(m, n, k, A, B, C);
} |
You are a helpful coding assistant specialized in converting HIP source code to AMD device assembly. | /******************************************************************************
*cr
*cr (C) Copyright 2010 The Board of Trustees of the
*cr University of Illinois
*cr All Rights Reserved
*cr
******************************************************************************/
#include <hip/hip_runtime.h>
#include <stdio.h>
__global__ void mysgemm(int m, int n, int k, const float *A, const float *B, float* C) {
/********************************************************************
*
* Compute C = A x B
* where A is a (m x k) matrix
* where B is a (k x n) matrix
* where C is a (m x n) matrix
*
********************************************************************/
// INSERT KERNEL CODE HERE
//Compute matrix C
int ROW = blockIdx.y * blockDim.y + threadIdx.y;
int COL = blockIdx.x * blockDim.x + threadIdx.x;
float SUM = 0;
if (COL < n && ROW < m)
{
for(unsigned int i = 0; i < k; ++i)
{
SUM += A[ROW * k + i] * B[i * n + COL];
}
C[ROW * n + COL] = SUM;
}
}
void basicSgemm(char transa, char transb, int m, int n, int k, float alpha, const float *A, int lda, const float *B, int ldb, float beta, float *C, int ldc)
{
if ((transa != 'N') && (transa != 'n')) {
printf("unsupported value of 'transa'\n");
return;
}
if ((transb != 'N') && (transb != 'n')) {
printf("unsupported value of 'transb'\n");
return;
}
if ((alpha - 1.0f > 1e-10) || (alpha - 1.0f < -1e-10)) {
printf("unsupported value of alpha\n");
return;
}
if ((beta - 0.0f > 1e-10) || (beta - 0.0f < -1e-10)) {
printf("unsupported value of beta\n");
return;
}
// Initialize thread block and kernel grid dimensions ---------------------
const unsigned int BLOCK_SIZE = 16; // Use 16x16 thread blocks
//INSERT CODE HERE
unsigned int gridrows = ceil((m + BLOCK_SIZE - 1) / BLOCK_SIZE);
unsigned int gridcols = ceil((n + BLOCK_SIZE - 1) / BLOCK_SIZE);
dim3 dimBlock(BLOCK_SIZE, BLOCK_SIZE);
dim3 dimGrid(gridcols, gridrows);
// Invoke CUDA kernel -----------------------------------------------------
//INSERT CODE HERE
mysgemm<<<dimGrid, dimBlock>>>(m, n, k, A, B, C);
} | .text
.amdgcn_target "amdgcn-amd-amdhsa--gfx1100"
.protected _Z7mysgemmiiiPKfS0_Pf
.globl _Z7mysgemmiiiPKfS0_Pf
.p2align 8
.type _Z7mysgemmiiiPKfS0_Pf,@function
_Z7mysgemmiiiPKfS0_Pf:
s_clause 0x1
s_load_b32 s4, s[0:1], 0x34
s_load_b64 s[2:3], s[0:1], 0x0
v_and_b32_e32 v2, 0x3ff, v0
v_bfe_u32 v3, v0, 10, 10
s_waitcnt lgkmcnt(0)
s_lshr_b32 s5, s4, 16
s_and_b32 s4, s4, 0xffff
s_delay_alu instid0(VALU_DEP_1) | instid1(SALU_CYCLE_1)
v_mad_u64_u32 v[0:1], null, s14, s4, v[2:3]
v_mad_u64_u32 v[1:2], null, s15, s5, v[3:4]
s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
v_cmp_gt_i32_e32 vcc_lo, s3, v0
v_cmp_gt_i32_e64 s2, s2, v1
s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(SALU_CYCLE_1)
s_and_b32 s2, s2, vcc_lo
s_and_saveexec_b32 s4, s2
s_cbranch_execz .LBB0_6
s_load_b32 s2, s[0:1], 0x8
s_waitcnt lgkmcnt(0)
s_cmp_eq_u32 s2, 0
s_cbranch_scc1 .LBB0_4
s_load_b128 s[4:7], s[0:1], 0x10
v_mul_lo_u32 v2, v1, s2
v_mov_b32_e32 v6, 0
v_mov_b32_e32 v4, v0
.p2align 6
.LBB0_3:
v_mov_b32_e32 v3, 0
s_add_i32 s2, s2, -1
s_delay_alu instid0(SALU_CYCLE_1) | instskip(NEXT) | instid1(VALU_DEP_1)
s_cmp_eq_u32 s2, 0
v_mov_b32_e32 v5, v3
s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_4) | instid1(VALU_DEP_2)
v_lshlrev_b64 v[9:10], 2, v[4:5]
v_add_nc_u32_e32 v4, s3, v4
v_lshlrev_b64 v[7:8], 2, v[2:3]
v_add_nc_u32_e32 v2, 1, v2
s_waitcnt lgkmcnt(0)
v_add_co_u32 v7, vcc_lo, s4, v7
s_delay_alu instid0(VALU_DEP_3)
v_add_co_ci_u32_e32 v8, vcc_lo, s5, v8, vcc_lo
v_add_co_u32 v9, vcc_lo, s6, v9
v_add_co_ci_u32_e32 v10, vcc_lo, s7, v10, vcc_lo
global_load_b32 v3, v[7:8], off
global_load_b32 v5, v[9:10], off
s_waitcnt vmcnt(0)
v_fmac_f32_e32 v6, v3, v5
s_cbranch_scc0 .LBB0_3
s_branch .LBB0_5
.LBB0_4:
v_mov_b32_e32 v6, 0
.LBB0_5:
s_load_b64 s[0:1], s[0:1], 0x20
v_mad_u64_u32 v[2:3], null, v1, s3, v[0:1]
s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
v_ashrrev_i32_e32 v3, 31, v2
v_lshlrev_b64 v[0:1], 2, v[2:3]
s_waitcnt lgkmcnt(0)
s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_2)
v_add_co_u32 v0, vcc_lo, s0, v0
v_add_co_ci_u32_e32 v1, vcc_lo, s1, v1, vcc_lo
global_store_b32 v[0:1], v6, off
.LBB0_6:
s_nop 0
s_sendmsg sendmsg(MSG_DEALLOC_VGPRS)
s_endpgm
.section .rodata,"a",@progbits
.p2align 6, 0x0
.amdhsa_kernel _Z7mysgemmiiiPKfS0_Pf
.amdhsa_group_segment_fixed_size 0
.amdhsa_private_segment_fixed_size 0
.amdhsa_kernarg_size 296
.amdhsa_user_sgpr_count 14
.amdhsa_user_sgpr_dispatch_ptr 0
.amdhsa_user_sgpr_queue_ptr 0
.amdhsa_user_sgpr_kernarg_segment_ptr 1
.amdhsa_user_sgpr_dispatch_id 0
.amdhsa_user_sgpr_private_segment_size 0
.amdhsa_wavefront_size32 1
.amdhsa_uses_dynamic_stack 0
.amdhsa_enable_private_segment 0
.amdhsa_system_sgpr_workgroup_id_x 1
.amdhsa_system_sgpr_workgroup_id_y 1
.amdhsa_system_sgpr_workgroup_id_z 0
.amdhsa_system_sgpr_workgroup_info 0
.amdhsa_system_vgpr_workitem_id 1
.amdhsa_next_free_vgpr 11
.amdhsa_next_free_sgpr 16
.amdhsa_float_round_mode_32 0
.amdhsa_float_round_mode_16_64 0
.amdhsa_float_denorm_mode_32 3
.amdhsa_float_denorm_mode_16_64 3
.amdhsa_dx10_clamp 1
.amdhsa_ieee_mode 1
.amdhsa_fp16_overflow 0
.amdhsa_workgroup_processor_mode 1
.amdhsa_memory_ordered 1
.amdhsa_forward_progress 0
.amdhsa_shared_vgpr_count 0
.amdhsa_exception_fp_ieee_invalid_op 0
.amdhsa_exception_fp_denorm_src 0
.amdhsa_exception_fp_ieee_div_zero 0
.amdhsa_exception_fp_ieee_overflow 0
.amdhsa_exception_fp_ieee_underflow 0
.amdhsa_exception_fp_ieee_inexact 0
.amdhsa_exception_int_div_zero 0
.end_amdhsa_kernel
.text
.Lfunc_end0:
.size _Z7mysgemmiiiPKfS0_Pf, .Lfunc_end0-_Z7mysgemmiiiPKfS0_Pf
.section .AMDGPU.csdata,"",@progbits
.text
.p2alignl 7, 3214868480
.fill 96, 4, 3214868480
.type __hip_cuid_,@object
.section .bss,"aw",@nobits
.globl __hip_cuid_
__hip_cuid_:
.byte 0
.size __hip_cuid_, 1
.ident "AMD clang version 18.0.0git (https://github.com/RadeonOpenCompute/llvm-project roc-6.3.2 25012 e5bf7e55c91490b07c49d8960fa7983d864936c4)"
.section ".note.GNU-stack","",@progbits
.addrsig
.addrsig_sym __hip_cuid_
.amdgpu_metadata
---
amdhsa.kernels:
- .args:
- .offset: 0
.size: 4
.value_kind: by_value
- .offset: 4
.size: 4
.value_kind: by_value
- .offset: 8
.size: 4
.value_kind: by_value
- .address_space: global
.offset: 16
.size: 8
.value_kind: global_buffer
- .address_space: global
.offset: 24
.size: 8
.value_kind: global_buffer
- .address_space: global
.offset: 32
.size: 8
.value_kind: global_buffer
- .offset: 40
.size: 4
.value_kind: hidden_block_count_x
- .offset: 44
.size: 4
.value_kind: hidden_block_count_y
- .offset: 48
.size: 4
.value_kind: hidden_block_count_z
- .offset: 52
.size: 2
.value_kind: hidden_group_size_x
- .offset: 54
.size: 2
.value_kind: hidden_group_size_y
- .offset: 56
.size: 2
.value_kind: hidden_group_size_z
- .offset: 58
.size: 2
.value_kind: hidden_remainder_x
- .offset: 60
.size: 2
.value_kind: hidden_remainder_y
- .offset: 62
.size: 2
.value_kind: hidden_remainder_z
- .offset: 80
.size: 8
.value_kind: hidden_global_offset_x
- .offset: 88
.size: 8
.value_kind: hidden_global_offset_y
- .offset: 96
.size: 8
.value_kind: hidden_global_offset_z
- .offset: 104
.size: 2
.value_kind: hidden_grid_dims
.group_segment_fixed_size: 0
.kernarg_segment_align: 8
.kernarg_segment_size: 296
.language: OpenCL C
.language_version:
- 2
- 0
.max_flat_workgroup_size: 1024
.name: _Z7mysgemmiiiPKfS0_Pf
.private_segment_fixed_size: 0
.sgpr_count: 18
.sgpr_spill_count: 0
.symbol: _Z7mysgemmiiiPKfS0_Pf.kd
.uniform_work_group_size: 1
.uses_dynamic_stack: false
.vgpr_count: 11
.vgpr_spill_count: 0
.wavefront_size: 32
.workgroup_processor_mode: 1
amdhsa.target: amdgcn-amd-amdhsa--gfx1100
amdhsa.version:
- 1
- 2
...
.end_amdgpu_metadata |
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