system stringclasses 7 values | input stringlengths 10 94.5k | output stringlengths 14 55.5k |
|---|---|---|
You are a helpful coding assistant specialized in converting from CUDA host assembly to AMD host assembly. | .file "tmpxft_00179782_00000000-6_memcpy.cudafe1.cpp"
.text
#APP
#NO_APP
.type _ZL26__cudaUnregisterBinaryUtilv, @function
_ZL26__cudaUnregisterBinaryUtilv:
.LFB2029:
.cfi_startproc
endbr64
subq $8, %rsp
.cfi_def_cfa_offset 16
movq _ZL20__cudaFatCubinHandle(%rip), %rdi
call __cudaUnregisterFatBinary@PLT
addq $8, %rsp
.cfi_def_cfa_offset 8
ret
.cfi_endproc
.LFE2029:
.size _ZL26__cudaUnregisterBinaryUtilv, .-_ZL26__cudaUnregisterBinaryUtilv
.globl _Z27__device_stub__Z6memcpyPfS_PfS_
.type _Z27__device_stub__Z6memcpyPfS_PfS_, @function
_Z27__device_stub__Z6memcpyPfS_PfS_:
.LFB2051:
.cfi_startproc
endbr64
subq $120, %rsp
.cfi_def_cfa_offset 128
movq %rdi, 8(%rsp)
movq %rsi, (%rsp)
movq %fs:40, %rax
movq %rax, 104(%rsp)
xorl %eax, %eax
leaq 8(%rsp), %rax
movq %rax, 80(%rsp)
movq %rsp, %rax
movq %rax, 88(%rsp)
movl $1, 32(%rsp)
movl $1, 36(%rsp)
movl $1, 40(%rsp)
movl $1, 44(%rsp)
movl $1, 48(%rsp)
movl $1, 52(%rsp)
leaq 24(%rsp), %rcx
leaq 16(%rsp), %rdx
leaq 44(%rsp), %rsi
leaq 32(%rsp), %rdi
call __cudaPopCallConfiguration@PLT
testl %eax, %eax
je .L7
.L3:
movq 104(%rsp), %rax
subq %fs:40, %rax
jne .L8
addq $120, %rsp
.cfi_remember_state
.cfi_def_cfa_offset 8
ret
.L7:
.cfi_restore_state
pushq 24(%rsp)
.cfi_def_cfa_offset 136
pushq 24(%rsp)
.cfi_def_cfa_offset 144
leaq 96(%rsp), %r9
movq 60(%rsp), %rcx
movl 68(%rsp), %r8d
movq 48(%rsp), %rsi
movl 56(%rsp), %edx
leaq _Z6memcpyPfS_(%rip), %rdi
call cudaLaunchKernel@PLT
addq $16, %rsp
.cfi_def_cfa_offset 128
jmp .L3
.L8:
call __stack_chk_fail@PLT
.cfi_endproc
.LFE2051:
.size _Z27__device_stub__Z6memcpyPfS_PfS_, .-_Z27__device_stub__Z6memcpyPfS_PfS_
.globl _Z6memcpyPfS_
.type _Z6memcpyPfS_, @function
_Z6memcpyPfS_:
.LFB2052:
.cfi_startproc
endbr64
subq $8, %rsp
.cfi_def_cfa_offset 16
call _Z27__device_stub__Z6memcpyPfS_PfS_
addq $8, %rsp
.cfi_def_cfa_offset 8
ret
.cfi_endproc
.LFE2052:
.size _Z6memcpyPfS_, .-_Z6memcpyPfS_
.section .rodata.str1.1,"aMS",@progbits,1
.LC0:
.string "_Z6memcpyPfS_"
.text
.type _ZL24__sti____cudaRegisterAllv, @function
_ZL24__sti____cudaRegisterAllv:
.LFB2054:
.cfi_startproc
endbr64
subq $8, %rsp
.cfi_def_cfa_offset 16
leaq _ZL15__fatDeviceText(%rip), %rdi
call __cudaRegisterFatBinary@PLT
movq %rax, %rdi
movq %rax, _ZL20__cudaFatCubinHandle(%rip)
pushq $0
.cfi_def_cfa_offset 24
pushq $0
.cfi_def_cfa_offset 32
pushq $0
.cfi_def_cfa_offset 40
pushq $0
.cfi_def_cfa_offset 48
movl $0, %r9d
movl $-1, %r8d
leaq .LC0(%rip), %rdx
movq %rdx, %rcx
leaq _Z6memcpyPfS_(%rip), %rsi
call __cudaRegisterFunction@PLT
addq $32, %rsp
.cfi_def_cfa_offset 16
movq _ZL20__cudaFatCubinHandle(%rip), %rdi
call __cudaRegisterFatBinaryEnd@PLT
leaq _ZL26__cudaUnregisterBinaryUtilv(%rip), %rdi
call atexit@PLT
addq $8, %rsp
.cfi_def_cfa_offset 8
ret
.cfi_endproc
.LFE2054:
.size _ZL24__sti____cudaRegisterAllv, .-_ZL24__sti____cudaRegisterAllv
.section .init_array,"aw"
.align 8
.quad _ZL24__sti____cudaRegisterAllv
.section .nvFatBinSegment,"aw"
.align 8
.type _ZL15__fatDeviceText, @object
.size _ZL15__fatDeviceText, 24
_ZL15__fatDeviceText:
.long 1180844977
.long 1
.quad fatbinData
.quad 0
.local _ZL20__cudaFatCubinHandle
.comm _ZL20__cudaFatCubinHandle,8,8
.ident "GCC: (Ubuntu 13.3.0-6ubuntu2~24.04) 13.3.0"
.section .note.GNU-stack,"",@progbits
.section .note.gnu.property,"a"
.align 8
.long 1f - 0f
.long 4f - 1f
.long 5
0:
.string "GNU"
1:
.align 8
.long 0xc0000002
.long 3f - 2f
2:
.long 0x3
3:
.align 8
4: | .text
.file "memcpy.hip"
.globl _Z21__device_stub__memcpyPfS_ # -- Begin function _Z21__device_stub__memcpyPfS_
.p2align 4, 0x90
.type _Z21__device_stub__memcpyPfS_,@function
_Z21__device_stub__memcpyPfS_: # @_Z21__device_stub__memcpyPfS_
.cfi_startproc
# %bb.0:
subq $88, %rsp
.cfi_def_cfa_offset 96
movq %rdi, 56(%rsp)
movq %rsi, 48(%rsp)
leaq 56(%rsp), %rax
movq %rax, 64(%rsp)
leaq 48(%rsp), %rax
movq %rax, 72(%rsp)
leaq 32(%rsp), %rdi
leaq 16(%rsp), %rsi
leaq 8(%rsp), %rdx
movq %rsp, %rcx
callq __hipPopCallConfiguration
movq 32(%rsp), %rsi
movl 40(%rsp), %edx
movq 16(%rsp), %rcx
movl 24(%rsp), %r8d
leaq 64(%rsp), %r9
movl $_Z6memcpyPfS_, %edi
pushq (%rsp)
.cfi_adjust_cfa_offset 8
pushq 16(%rsp)
.cfi_adjust_cfa_offset 8
callq hipLaunchKernel
addq $104, %rsp
.cfi_adjust_cfa_offset -104
retq
.Lfunc_end0:
.size _Z21__device_stub__memcpyPfS_, .Lfunc_end0-_Z21__device_stub__memcpyPfS_
.cfi_endproc
# -- End function
.p2align 4, 0x90 # -- Begin function __hip_module_ctor
.type __hip_module_ctor,@function
__hip_module_ctor: # @__hip_module_ctor
.cfi_startproc
# %bb.0:
subq $40, %rsp
.cfi_def_cfa_offset 48
cmpq $0, __hip_gpubin_handle(%rip)
jne .LBB1_2
# %bb.1:
movl $__hip_fatbin_wrapper, %edi
callq __hipRegisterFatBinary
movq %rax, __hip_gpubin_handle(%rip)
.LBB1_2:
movq __hip_gpubin_handle(%rip), %rdi
xorps %xmm0, %xmm0
movups %xmm0, 16(%rsp)
movups %xmm0, (%rsp)
movl $_Z6memcpyPfS_, %esi
movl $.L__unnamed_1, %edx
movl $.L__unnamed_1, %ecx
movl $-1, %r8d
xorl %r9d, %r9d
callq __hipRegisterFunction
movl $__hip_module_dtor, %edi
addq $40, %rsp
.cfi_def_cfa_offset 8
jmp atexit # TAILCALL
.Lfunc_end1:
.size __hip_module_ctor, .Lfunc_end1-__hip_module_ctor
.cfi_endproc
# -- End function
.p2align 4, 0x90 # -- Begin function __hip_module_dtor
.type __hip_module_dtor,@function
__hip_module_dtor: # @__hip_module_dtor
.cfi_startproc
# %bb.0:
movq __hip_gpubin_handle(%rip), %rdi
testq %rdi, %rdi
je .LBB2_2
# %bb.1:
pushq %rax
.cfi_def_cfa_offset 16
callq __hipUnregisterFatBinary
movq $0, __hip_gpubin_handle(%rip)
addq $8, %rsp
.cfi_def_cfa_offset 8
.LBB2_2:
retq
.Lfunc_end2:
.size __hip_module_dtor, .Lfunc_end2-__hip_module_dtor
.cfi_endproc
# -- End function
.type _Z6memcpyPfS_,@object # @_Z6memcpyPfS_
.section .rodata,"a",@progbits
.globl _Z6memcpyPfS_
.p2align 3, 0x0
_Z6memcpyPfS_:
.quad _Z21__device_stub__memcpyPfS_
.size _Z6memcpyPfS_, 8
.type .L__unnamed_1,@object # @0
.section .rodata.str1.1,"aMS",@progbits,1
.L__unnamed_1:
.asciz "_Z6memcpyPfS_"
.size .L__unnamed_1, 14
.type __hip_fatbin_wrapper,@object # @__hip_fatbin_wrapper
.section .hipFatBinSegment,"a",@progbits
.p2align 3, 0x0
__hip_fatbin_wrapper:
.long 1212764230 # 0x48495046
.long 1 # 0x1
.quad __hip_fatbin
.quad 0
.size __hip_fatbin_wrapper, 24
.type __hip_gpubin_handle,@object # @__hip_gpubin_handle
.local __hip_gpubin_handle
.comm __hip_gpubin_handle,8,8
.section .init_array,"aw",@init_array
.p2align 3, 0x0
.quad __hip_module_ctor
.type __hip_cuid_,@object # @__hip_cuid_
.bss
.globl __hip_cuid_
__hip_cuid_:
.byte 0 # 0x0
.size __hip_cuid_, 1
.section ".linker-options","e",@llvm_linker_options
.ident "AMD clang version 18.0.0git (https://github.com/RadeonOpenCompute/llvm-project roc-6.3.2 25012 e5bf7e55c91490b07c49d8960fa7983d864936c4)"
.section ".note.GNU-stack","",@progbits
.addrsig
.addrsig_sym _Z21__device_stub__memcpyPfS_
.addrsig_sym __hip_module_ctor
.addrsig_sym __hip_module_dtor
.addrsig_sym _Z6memcpyPfS_
.addrsig_sym __hip_fatbin
.addrsig_sym __hip_fatbin_wrapper
.addrsig_sym __hip_cuid_ |
You are a helpful coding assistant specialized in converting CUDA source code to CUDA device assembly. | #include "includes.h"
__global__ void gpu_distance(int* data, float* distance, int* point, int n, int dim) {
int i = blockIdx.x * blockDim.x + threadIdx.x;
if (i >= n)
return;
float d = 0;
for(int j = 0; j<dim; j++)
d += abs(data[i*dim + j] - point[j]);
distance[i] = d;
} | code for sm_80
Function : _Z12gpu_distancePiPfS_ii
.headerflags @"EF_CUDA_TEXMODE_UNIFIED EF_CUDA_64BIT_ADDRESS EF_CUDA_SM80 EF_CUDA_VIRTUAL_SM(EF_CUDA_SM80)"
/*0000*/ IMAD.MOV.U32 R1, RZ, RZ, c[0x0][0x28] ; /* 0x00000a00ff017624 */
/* 0x000fe400078e00ff */
/*0010*/ S2R R0, SR_CTAID.X ; /* 0x0000000000007919 */
/* 0x000e280000002500 */
/*0020*/ S2R R3, SR_TID.X ; /* 0x0000000000037919 */
/* 0x000e240000002100 */
/*0030*/ IMAD R0, R0, c[0x0][0x0], R3 ; /* 0x0000000000007a24 */
/* 0x001fca00078e0203 */
/*0040*/ ISETP.GE.AND P0, PT, R0, c[0x0][0x178], PT ; /* 0x00005e0000007a0c */
/* 0x000fda0003f06270 */
/*0050*/ @P0 EXIT ; /* 0x000000000000094d */
/* 0x000fea0003800000 */
/*0060*/ IMAD.MOV.U32 R6, RZ, RZ, c[0x0][0x17c] ; /* 0x00005f00ff067624 */
/* 0x000fe200078e00ff */
/*0070*/ ULDC.64 UR4, c[0x0][0x118] ; /* 0x0000460000047ab9 */
/* 0x000fe20000000a00 */
/*0080*/ IMAD.MOV.U32 R9, RZ, RZ, RZ ; /* 0x000000ffff097224 */
/* 0x000fc600078e00ff */
/*0090*/ ISETP.GE.AND P0, PT, R6, 0x1, PT ; /* 0x000000010600780c */
/* 0x000fda0003f06270 */
/*00a0*/ @!P0 BRA 0x1020 ; /* 0x00000f7000008947 */
/* 0x000fea0003800000 */
/*00b0*/ IADD3 R2, R6.reuse, -0x1, RZ ; /* 0xffffffff06027810 */
/* 0x040fe20007ffe0ff */
/*00c0*/ HFMA2.MMA R9, -RZ, RZ, 0, 0 ; /* 0x00000000ff097435 */
/* 0x000fe200000001ff */
/*00d0*/ LOP3.LUT R6, R6, 0x3, RZ, 0xc0, !PT ; /* 0x0000000306067812 */
/* 0x000fe200078ec0ff */
/*00e0*/ IMAD.MOV.U32 R7, RZ, RZ, RZ ; /* 0x000000ffff077224 */
/* 0x000fe200078e00ff */
/*00f0*/ ISETP.GE.U32.AND P0, PT, R2, 0x3, PT ; /* 0x000000030200780c */
/* 0x000fda0003f06070 */
/*0100*/ @!P0 BRA 0xeb0 ; /* 0x00000da000008947 */
/* 0x000fea0003800000 */
/*0110*/ IADD3 R8, -R6, c[0x0][0x17c], RZ ; /* 0x00005f0006087a10 */
/* 0x000fe20007ffe1ff */
/*0120*/ IMAD.MOV.U32 R3, RZ, RZ, 0x4 ; /* 0x00000004ff037424 */
/* 0x000fe200078e00ff */
/*0130*/ MOV R9, RZ ; /* 0x000000ff00097202 */
/* 0x000fe20000000f00 */
/*0140*/ IMAD R2, R0, c[0x0][0x17c], RZ ; /* 0x00005f0000027a24 */
/* 0x000fe200078e02ff */
/*0150*/ ISETP.GT.AND P0, PT, R8, RZ, PT ; /* 0x000000ff0800720c */
/* 0x000fe20003f04270 */
/*0160*/ IMAD.MOV.U32 R7, RZ, RZ, RZ ; /* 0x000000ffff077224 */
/* 0x000fe200078e00ff */
/*0170*/ MOV R5, c[0x0][0x174] ; /* 0x00005d0000057a02 */
/* 0x000fe20000000f00 */
/*0180*/ IMAD.MOV.U32 R4, RZ, RZ, c[0x0][0x170] ; /* 0x00005c00ff047624 */
/* 0x000fe400078e00ff */
/*0190*/ IMAD.WIDE R2, R2, R3, c[0x0][0x160] ; /* 0x0000580002027625 */
/* 0x000fd000078e0203 */
/*01a0*/ @!P0 BRA 0xcb0 ; /* 0x00000b0000008947 */
/* 0x000fea0003800000 */
/*01b0*/ ISETP.GT.AND P1, PT, R8, 0xc, PT ; /* 0x0000000c0800780c */
/* 0x000fe40003f24270 */
/*01c0*/ PLOP3.LUT P0, PT, PT, PT, PT, 0x80, 0x0 ; /* 0x000000000000781c */
/* 0x000fd60003f0f070 */
/*01d0*/ @!P1 BRA 0x8a0 ; /* 0x000006c000009947 */
/* 0x000fea0003800000 */
/*01e0*/ PLOP3.LUT P0, PT, PT, PT, PT, 0x8, 0x0 ; /* 0x000000000000781c */
/* 0x000fe40003f0e170 */
/*01f0*/ LDG.E R12, [R4.64] ; /* 0x00000004040c7981 */
/* 0x000ea8000c1e1900 */
/*0200*/ LDG.E R13, [R2.64] ; /* 0x00000004020d7981 */
/* 0x000ea8000c1e1900 */
/*0210*/ LDG.E R14, [R4.64+0x4] ; /* 0x00000404040e7981 */
/* 0x000ee8000c1e1900 */
/*0220*/ LDG.E R15, [R2.64+0x4] ; /* 0x00000404020f7981 */
/* 0x000ee8000c1e1900 */
/*0230*/ LDG.E R16, [R4.64+0x8] ; /* 0x0000080404107981 */
/* 0x000f28000c1e1900 */
/*0240*/ LDG.E R17, [R2.64+0x8] ; /* 0x0000080402117981 */
/* 0x000f28000c1e1900 */
/*0250*/ LDG.E R10, [R4.64+0xc] ; /* 0x00000c04040a7981 */
/* 0x000f68000c1e1900 */
/*0260*/ LDG.E R11, [R2.64+0xc] ; /* 0x00000c04020b7981 */
/* 0x000f68000c1e1900 */
/*0270*/ LDG.E R18, [R2.64+0x10] ; /* 0x0000100402127981 */
/* 0x000f68000c1e1900 */
/*0280*/ LDG.E R19, [R4.64+0x18] ; /* 0x0000180404137981 */
/* 0x000f68000c1e1900 */
/*0290*/ LDG.E R22, [R2.64+0x18] ; /* 0x0000180402167981 */
/* 0x000f68000c1e1900 */
/*02a0*/ LDG.E R20, [R4.64+0x1c] ; /* 0x00001c0404147981 */
/* 0x000f68000c1e1900 */
/*02b0*/ LDG.E R21, [R2.64+0x1c] ; /* 0x00001c0402157981 */
/* 0x000f68000c1e1900 */
/*02c0*/ LDG.E R23, [R4.64+0x20] ; /* 0x0000200404177981 */
/* 0x000f68000c1e1900 */
/*02d0*/ LDG.E R26, [R2.64+0x20] ; /* 0x00002004021a7981 */
/* 0x000f68000c1e1900 */
/*02e0*/ LDG.E R24, [R4.64+0x24] ; /* 0x0000240404187981 */
/* 0x000f68000c1e1900 */
/*02f0*/ LDG.E R25, [R2.64+0x24] ; /* 0x0000240402197981 */
/* 0x000f62000c1e1900 */
/*0300*/ IMAD.IADD R12, R13, 0x1, -R12 ; /* 0x000000010d0c7824 */
/* 0x004fca00078e0a0c */
/*0310*/ IABS R12, R12 ; /* 0x0000000c000c7213 */
/* 0x000fe20000000000 */
/*0320*/ IMAD.IADD R14, R15, 0x1, -R14 ; /* 0x000000010f0e7824 */
/* 0x008fe400078e0a0e */
/*0330*/ LDG.E R15, [R4.64+0x10] ; /* 0x00001004040f7981 */
/* 0x000ea6000c1e1900 */
/*0340*/ I2F R12, R12 ; /* 0x0000000c000c7306 */
/* 0x000e220000201400 */
/*0350*/ IABS R13, R14 ; /* 0x0000000e000d7213 */
/* 0x000fe40000000000 */
/*0360*/ IADD3 R16, -R16, R17, RZ ; /* 0x0000001110107210 */
/* 0x010fe40007ffe1ff */
/*0370*/ LDG.E R17, [R2.64+0x14] ; /* 0x0000140402117981 */
/* 0x000ee6000c1e1900 */
/*0380*/ I2F R13, R13 ; /* 0x0000000d000d7306 */
/* 0x000e620000201400 */
/*0390*/ IABS R14, R16 ; /* 0x00000010000e7213 */
/* 0x000fc40000000000 */
/*03a0*/ LDG.E R16, [R4.64+0x14] ; /* 0x0000140404107981 */
/* 0x000eea000c1e1900 */
/*03b0*/ I2F R14, R14 ; /* 0x0000000e000e7306 */
/* 0x000f220000201400 */
/*03c0*/ FADD R12, R12, R9 ; /* 0x000000090c0c7221 */
/* 0x001fe40000000000 */
/*03d0*/ IMAD.IADD R10, R11, 0x1, -R10 ; /* 0x000000010b0a7824 */
/* 0x020fe400078e0a0a */
/*03e0*/ LDG.E R11, [R4.64+0x28] ; /* 0x00002804040b7981 */
/* 0x000f62000c1e1900 */
/*03f0*/ FADD R9, R12, R13 ; /* 0x0000000d0c097221 */
/* 0x002fc60000000000 */
/*0400*/ LDG.E R12, [R2.64+0x28] ; /* 0x00002804020c7981 */
/* 0x000f68000c1e1900 */
/*0410*/ LDG.E R13, [R4.64+0x2c] ; /* 0x00002c04040d7981 */
/* 0x000f62000c1e1900 */
/*0420*/ FADD R9, R9, R14 ; /* 0x0000000e09097221 */
/* 0x010fc60000000000 */
/*0430*/ LDG.E R14, [R2.64+0x2c] ; /* 0x00002c04020e7981 */
/* 0x000f22000c1e1900 */
/*0440*/ IMAD.IADD R19, R22, 0x1, -R19 ; /* 0x0000000116137824 */
/* 0x000fe400078e0a13 */
/*0450*/ IMAD.IADD R20, R21, 0x1, -R20 ; /* 0x0000000115147824 */
/* 0x000fe200078e0a14 */
/*0460*/ LDG.E R22, [R2.64+0x34] ; /* 0x0000340402167981 */
/* 0x000f28000c1e1900 */
/*0470*/ LDG.E R21, [R4.64+0x34] ; /* 0x0000340404157981 */
/* 0x000f22000c1e1900 */
/*0480*/ IADD3 R23, -R23, R26, RZ ; /* 0x0000001a17177210 */
/* 0x000fc60007ffe1ff */
/*0490*/ LDG.E R26, [R4.64+0x38] ; /* 0x00003804041a7981 */
/* 0x000f22000c1e1900 */
/*04a0*/ IMAD.IADD R24, R25, 0x1, -R24 ; /* 0x0000000119187824 */
/* 0x000fc600078e0a18 */
/*04b0*/ LDG.E R25, [R2.64+0x38] ; /* 0x0000380402197981 */
/* 0x000f22000c1e1900 */
/*04c0*/ IMAD.IADD R15, R18, 0x1, -R15 ; /* 0x00000001120f7824 */
/* 0x004fc600078e0a0f */
/*04d0*/ LDG.E R18, [R2.64+0x30] ; /* 0x0000300402127981 */
/* 0x0000a2000c1e1900 */
/*04e0*/ IADD3 R16, -R16, R17, RZ ; /* 0x0000001110107210 */
/* 0x008fc60007ffe1ff */
/*04f0*/ LDG.E R17, [R4.64+0x30] ; /* 0x0000300404117981 */
/* 0x0002a2000c1e1900 */
/*0500*/ IMAD.IADD R11, R12, 0x1, -R11 ; /* 0x000000010c0b7824 */
/* 0x020fc600078e0a0b */
/*0510*/ LDG.E R12, [R2.64+0x3c] ; /* 0x00003c04020c7981 */
/* 0x0000e2000c1e1900 */
/*0520*/ IADD3 R14, -R13, R14, RZ ; /* 0x0000000e0d0e7210 */
/* 0x010fc60007ffe1ff */
/*0530*/ LDG.E R13, [R4.64+0x3c] ; /* 0x00003c04040d7981 */
/* 0x0002e2000c1e1900 */
/*0540*/ IABS R10, R10 ; /* 0x0000000a000a7213 */
/* 0x000fe40000000000 */
/*0550*/ IABS R15, R15 ; /* 0x0000000f000f7213 */
/* 0x000fe40000000000 */
/*0560*/ IABS R16, R16 ; /* 0x0000001000107213 */
/* 0x000fe40000000000 */
/*0570*/ I2F R10, R10 ; /* 0x0000000a000a7306 */
/* 0x000f220000201400 */
/*0580*/ IABS R19, R19 ; /* 0x0000001300137213 */
/* 0x000fce0000000000 */
/*0590*/ I2F R15, R15 ; /* 0x0000000f000f7306 */
/* 0x000f620000201400 */
/*05a0*/ IABS R20, R20 ; /* 0x0000001400147213 */
/* 0x000fce0000000000 */
/*05b0*/ I2F R16, R16 ; /* 0x0000001000107306 */
/* 0x000e220000201400 */
/*05c0*/ IABS R23, R23 ; /* 0x0000001700177213 */
/* 0x000fe40000000000 */
/*05d0*/ IABS R27, R24 ; /* 0x00000018001b7213 */
/* 0x000fe20000000000 */
/*05e0*/ FADD R24, R9, R10 ; /* 0x0000000a09187221 */
/* 0x010fc80000000000 */
/*05f0*/ I2F R19, R19 ; /* 0x0000001300137306 */
/* 0x000f220000201400 */
/*0600*/ IABS R28, R11 ; /* 0x0000000b001c7213 */
/* 0x000fe20000000000 */
/*0610*/ FADD R15, R24, R15 ; /* 0x0000000f180f7221 */
/* 0x020fcc0000000000 */
/*0620*/ I2F R20, R20 ; /* 0x0000001400147306 */
/* 0x000f620000201400 */
/*0630*/ IMAD.MOV.U32 R9, RZ, RZ, R28 ; /* 0x000000ffff097224 */
/* 0x000fe400078e001c */
/*0640*/ FADD R16, R15, R16 ; /* 0x000000100f107221 */
/* 0x001fca0000000000 */
/*0650*/ I2F R23, R23 ; /* 0x0000001700177306 */
/* 0x000e220000201400 */
/*0660*/ IABS R10, R14 ; /* 0x0000000e000a7213 */
/* 0x000fe40000000000 */
/*0670*/ IADD3 R21, -R21, R22, RZ ; /* 0x0000001615157210 */
/* 0x000fe20007ffe1ff */
/*0680*/ FADD R19, R16, R19 ; /* 0x0000001310137221 */
/* 0x010fc80000000000 */
/*0690*/ I2F R11, R27 ; /* 0x0000001b000b7306 */
/* 0x000f220000201400 */
/*06a0*/ IABS R21, R21 ; /* 0x0000001500157213 */
/* 0x000fe20000000000 */
/*06b0*/ IMAD.IADD R25, R25, 0x1, -R26 ; /* 0x0000000119197824 */
/* 0x000fe400078e0a1a */
/*06c0*/ FADD R20, R19, R20 ; /* 0x0000001413147221 */
/* 0x020fc80000000000 */
/*06d0*/ I2F R9, R9 ; /* 0x0000000900097306 */
/* 0x000f620000201400 */
/*06e0*/ IMAD.MOV.U32 R16, RZ, RZ, R21 ; /* 0x000000ffff107224 */
/* 0x000fe200078e0015 */
/*06f0*/ IABS R25, R25 ; /* 0x0000001900197213 */
/* 0x000fe20000000000 */
/*0700*/ FADD R20, R20, R23 ; /* 0x0000001714147221 */
/* 0x001fca0000000000 */
/*0710*/ I2F R10, R10 ; /* 0x0000000a000a7306 */
/* 0x000e220000201400 */
/*0720*/ FADD R20, R20, R11 ; /* 0x0000000b14147221 */
/* 0x010fe20000000000 */
/*0730*/ IADD3 R8, R8, -0x10, RZ ; /* 0xfffffff008087810 */
/* 0x000fcc0007ffe0ff */
/*0740*/ I2F R16, R16 ; /* 0x0000001000107306 */
/* 0x000fe20000201400 */
/*0750*/ FADD R9, R20, R9 ; /* 0x0000000914097221 */
/* 0x020fe20000000000 */
/*0760*/ ISETP.GT.AND P1, PT, R8, 0xc, PT ; /* 0x0000000c0800780c */
/* 0x000fc60003f24270 */
/*0770*/ FADD R9, R9, R10 ; /* 0x0000000a09097221 */
/* 0x001fe20000000000 */
/*0780*/ IADD3 R4, P3, R4, 0x40, RZ ; /* 0x0000004004047810 */
/* 0x002fe40007f7e0ff */
/*0790*/ IADD3 R2, P2, R2, 0x40, RZ ; /* 0x0000004002027810 */
/* 0x000fe40007f5e0ff */
/*07a0*/ IADD3 R7, R7, 0x10, RZ ; /* 0x0000001007077810 */
/* 0x000fe20007ffe0ff */
/*07b0*/ IMAD.X R5, RZ, RZ, R5, P3 ; /* 0x000000ffff057224 */
/* 0x000fe200018e0605 */
/*07c0*/ IADD3.X R3, RZ, R3, RZ, P2, !PT ; /* 0x00000003ff037210 */
/* 0x000fe200017fe4ff */
/*07d0*/ IMAD.IADD R17, R18, 0x1, -R17 ; /* 0x0000000112117824 */
/* 0x004fca00078e0a11 */
/*07e0*/ IABS R14, R17 ; /* 0x00000011000e7213 */
/* 0x000fcc0000000000 */
/*07f0*/ I2F R14, R14 ; /* 0x0000000e000e7306 */
/* 0x000e220000201400 */
/*0800*/ IADD3 R12, -R13, R12, RZ ; /* 0x0000000c0d0c7210 */
/* 0x008fe20007ffe1ff */
/*0810*/ IMAD.MOV.U32 R13, RZ, RZ, R25 ; /* 0x000000ffff0d7224 */
/* 0x000fc600078e0019 */
/*0820*/ IABS R11, R12 ; /* 0x0000000c000b7213 */
/* 0x000fc60000000000 */
/*0830*/ I2F R12, R13 ; /* 0x0000000d000c7306 */
/* 0x000e620000201400 */
/*0840*/ FADD R9, R9, R14 ; /* 0x0000000e09097221 */
/* 0x001fce0000000000 */
/*0850*/ I2F R10, R11 ; /* 0x0000000b000a7306 */
/* 0x000e220000201400 */
/*0860*/ FADD R9, R9, R16 ; /* 0x0000001009097221 */
/* 0x000fc80000000000 */
/*0870*/ FADD R9, R9, R12 ; /* 0x0000000c09097221 */
/* 0x002fc80000000000 */
/*0880*/ FADD R9, R9, R10 ; /* 0x0000000a09097221 */
/* 0x001fe20000000000 */
/*0890*/ @P1 BRA 0x1f0 ; /* 0xfffff95000001947 */
/* 0x000fea000383ffff */
/*08a0*/ ISETP.GT.AND P1, PT, R8, 0x4, PT ; /* 0x000000040800780c */
/* 0x000fda0003f24270 */
/*08b0*/ @!P1 BRA 0xc90 ; /* 0x000003d000009947 */
/* 0x000fea0003800000 */
/*08c0*/ LDG.E R20, [R4.64] ; /* 0x0000000404147981 */
/* 0x0000a8000c1e1900 */
/*08d0*/ LDG.E R23, [R2.64] ; /* 0x0000000402177981 */
/* 0x0002a8000c1e1900 */
/*08e0*/ LDG.E R24, [R4.64+0x4] ; /* 0x0000040404187981 */
/* 0x0000e8000c1e1900 */
/*08f0*/ LDG.E R25, [R2.64+0x4] ; /* 0x0000040402197981 */
/* 0x0002e8000c1e1900 */
/*0900*/ LDG.E R22, [R4.64+0x8] ; /* 0x0000080404167981 */
/* 0x000128000c1e1900 */
/*0910*/ LDG.E R21, [R2.64+0x8] ; /* 0x0000080402157981 */
/* 0x000328000c1e1900 */
/*0920*/ LDG.E R19, [R4.64+0xc] ; /* 0x00000c0404137981 */
/* 0x000168000c1e1900 */
/*0930*/ LDG.E R18, [R2.64+0xc] ; /* 0x00000c0402127981 */
/* 0x000368000c1e1900 */
/*0940*/ LDG.E R17, [R4.64+0x10] ; /* 0x0000100404117981 */
/* 0x000168000c1e1900 */
/*0950*/ LDG.E R16, [R2.64+0x10] ; /* 0x0000100402107981 */
/* 0x000368000c1e1900 */
/*0960*/ LDG.E R14, [R4.64+0x14] ; /* 0x00001404040e7981 */
/* 0x000168000c1e1900 */
/*0970*/ LDG.E R15, [R2.64+0x14] ; /* 0x00001404020f7981 */
/* 0x000368000c1e1900 */
/*0980*/ LDG.E R12, [R4.64+0x18] ; /* 0x00001804040c7981 */
/* 0x000168000c1e1900 */
/*0990*/ LDG.E R13, [R2.64+0x18] ; /* 0x00001804020d7981 */
/* 0x000368000c1e1900 */
/*09a0*/ LDG.E R10, [R4.64+0x1c] ; /* 0x00001c04040a7981 */
/* 0x000168000c1e1900 */
/*09b0*/ LDG.E R11, [R2.64+0x1c] ; /* 0x00001c04020b7981 */
/* 0x000362000c1e1900 */
/*09c0*/ PLOP3.LUT P0, PT, PT, PT, PT, 0x8, 0x0 ; /* 0x000000000000781c */
/* 0x000fc40003f0e170 */
/*09d0*/ IADD3 R7, R7, 0x8, RZ ; /* 0x0000000807077810 */
/* 0x000fe40007ffe0ff */
/*09e0*/ IADD3 R8, R8, -0x8, RZ ; /* 0xfffffff808087810 */
/* 0x000fe40007ffe0ff */
/*09f0*/ IADD3 R4, P2, R4, 0x20, RZ ; /* 0x0000002004047810 */
/* 0x001fe40007f5e0ff */
/*0a00*/ IADD3 R2, P1, R2, 0x20, RZ ; /* 0x0000002002027810 */
/* 0x002fc60007f3e0ff */
/*0a10*/ IMAD.X R5, RZ, RZ, R5, P2 ; /* 0x000000ffff057224 */
/* 0x000fe200010e0605 */
/*0a20*/ IADD3.X R3, RZ, R3, RZ, P1, !PT ; /* 0x00000003ff037210 */
/* 0x000fe20000ffe4ff */
/*0a30*/ IMAD.IADD R20, R23, 0x1, -R20 ; /* 0x0000000117147824 */
/* 0x004fca00078e0a14 */
/*0a40*/ IABS R20, R20 ; /* 0x0000001400147213 */
/* 0x000fe20000000000 */
/*0a50*/ IMAD.IADD R24, R25, 0x1, -R24 ; /* 0x0000000119187824 */
/* 0x008fca00078e0a18 */
/*0a60*/ I2F R20, R20 ; /* 0x0000001400147306 */
/* 0x000e220000201400 */
/*0a70*/ IABS R24, R24 ; /* 0x0000001800187213 */
/* 0x000fe40000000000 */
/*0a80*/ IADD3 R21, -R22, R21, RZ ; /* 0x0000001516157210 */
/* 0x010fc60007ffe1ff */
/*0a90*/ IMAD.MOV.U32 R22, RZ, RZ, R24 ; /* 0x000000ffff167224 */
/* 0x000fe200078e0018 */
/*0aa0*/ IABS R23, R21 ; /* 0x0000001500177213 */
/* 0x000fc60000000000 */
/*0ab0*/ I2F R21, R22 ; /* 0x0000001600157306 */
/* 0x000e620000201400 */
/*0ac0*/ IMAD.IADD R18, R18, 0x1, -R19 ; /* 0x0000000112127824 */
/* 0x020fe200078e0a13 */
/*0ad0*/ MOV R19, R23 ; /* 0x0000001700137202 */
/* 0x000fe20000000f00 */
/*0ae0*/ FADD R20, R9, R20 ; /* 0x0000001409147221 */
/* 0x001fc60000000000 */
/*0af0*/ IABS R23, R18 ; /* 0x0000001200177213 */
/* 0x000fe40000000000 */
/*0b00*/ I2F R18, R19 ; /* 0x0000001300127306 */
/* 0x000e220000201400 */
/*0b10*/ IMAD.IADD R16, R16, 0x1, -R17 ; /* 0x0000000110107824 */
/* 0x000fe400078e0a11 */
/*0b20*/ IMAD.MOV.U32 R17, RZ, RZ, R23 ; /* 0x000000ffff117224 */
/* 0x000fc600078e0017 */
/*0b30*/ IABS R23, R16 ; /* 0x0000001000177213 */
/* 0x000fe20000000000 */
/*0b40*/ FADD R21, R20, R21 ; /* 0x0000001514157221 */
/* 0x002fe20000000000 */
/*0b50*/ I2F R16, R17 ; /* 0x0000001100107306 */
/* 0x000e620000201400 */
/*0b60*/ IADD3 R14, -R14, R15, RZ ; /* 0x0000000f0e0e7210 */
/* 0x000fe40007ffe1ff */
/*0b70*/ IMAD.MOV.U32 R15, RZ, RZ, R23 ; /* 0x000000ffff0f7224 */
/* 0x000fe400078e0017 */
/*0b80*/ IABS R22, R14 ; /* 0x0000000e00167213 */
/* 0x000fc60000000000 */
/*0b90*/ I2F R14, R15 ; /* 0x0000000f000e7306 */
/* 0x000ea20000201400 */
/*0ba0*/ IMAD.IADD R12, R13, 0x1, -R12 ; /* 0x000000010d0c7824 */
/* 0x000fe200078e0a0c */
/*0bb0*/ MOV R13, R22 ; /* 0x00000016000d7202 */
/* 0x000fe20000000f00 */
/*0bc0*/ FADD R21, R21, R18 ; /* 0x0000001215157221 */
/* 0x001fc60000000000 */
/*0bd0*/ IABS R12, R12 ; /* 0x0000000c000c7213 */
/* 0x000fe40000000000 */
/*0be0*/ I2F R13, R13 ; /* 0x0000000d000d7306 */
/* 0x000e220000201400 */
/*0bf0*/ IMAD.IADD R10, R11, 0x1, -R10 ; /* 0x000000010b0a7824 */
/* 0x000fe400078e0a0a */
/*0c00*/ IMAD.MOV.U32 R11, RZ, RZ, R12 ; /* 0x000000ffff0b7224 */
/* 0x000fe400078e000c */
/*0c10*/ FADD R21, R21, R16 ; /* 0x0000001015157221 */
/* 0x002fe20000000000 */
/*0c20*/ IABS R12, R10 ; /* 0x0000000a000c7213 */
/* 0x000fe40000000000 */
/*0c30*/ I2F R10, R11 ; /* 0x0000000b000a7306 */
/* 0x000e620000201400 */
/*0c40*/ FADD R14, R21, R14 ; /* 0x0000000e150e7221 */
/* 0x004fce0000000000 */
/*0c50*/ I2F R9, R12 ; /* 0x0000000c00097306 */
/* 0x000ea20000201400 */
/*0c60*/ FADD R13, R14, R13 ; /* 0x0000000d0e0d7221 */
/* 0x001fc80000000000 */
/*0c70*/ FADD R10, R13, R10 ; /* 0x0000000a0d0a7221 */
/* 0x002fc80000000000 */
/*0c80*/ FADD R9, R10, R9 ; /* 0x000000090a097221 */
/* 0x004fe40000000000 */
/*0c90*/ ISETP.NE.OR P0, PT, R8, RZ, P0 ; /* 0x000000ff0800720c */
/* 0x000fda0000705670 */
/*0ca0*/ @!P0 BRA 0xeb0 ; /* 0x0000020000008947 */
/* 0x000fea0003800000 */
/*0cb0*/ LDG.E R10, [R4.64] ; /* 0x00000004040a7981 */
/* 0x0000a8000c1e1900 */
/*0cc0*/ LDG.E R11, [R2.64] ; /* 0x00000004020b7981 */
/* 0x0002a8000c1e1900 */
/*0cd0*/ LDG.E R12, [R4.64+0x4] ; /* 0x00000404040c7981 */
/* 0x0000e8000c1e1900 */
/*0ce0*/ LDG.E R13, [R2.64+0x4] ; /* 0x00000404020d7981 */
/* 0x0002e8000c1e1900 */
/*0cf0*/ LDG.E R14, [R4.64+0x8] ; /* 0x00000804040e7981 */
/* 0x000128000c1e1900 */
/*0d00*/ LDG.E R15, [R2.64+0x8] ; /* 0x00000804020f7981 */
/* 0x000328000c1e1900 */
/*0d10*/ LDG.E R16, [R4.64+0xc] ; /* 0x00000c0404107981 */
/* 0x000168000c1e1900 */
/*0d20*/ LDG.E R17, [R2.64+0xc] ; /* 0x00000c0402117981 */
/* 0x000362000c1e1900 */
/*0d30*/ IADD3 R8, R8, -0x4, RZ ; /* 0xfffffffc08087810 */
/* 0x000fc40007ffe0ff */
/*0d40*/ IADD3 R7, R7, 0x4, RZ ; /* 0x0000000407077810 */
/* 0x000fe40007ffe0ff */
/*0d50*/ ISETP.NE.AND P0, PT, R8, RZ, PT ; /* 0x000000ff0800720c */
/* 0x000fe40003f05270 */
/*0d60*/ IADD3 R4, P2, R4, 0x10, RZ ; /* 0x0000001004047810 */
/* 0x001fe40007f5e0ff */
/*0d70*/ IADD3 R2, P1, R2, 0x10, RZ ; /* 0x0000001002027810 */
/* 0x002fe40007f3e0ff */
/*0d80*/ IADD3.X R5, RZ, R5, RZ, P2, !PT ; /* 0x00000005ff057210 */
/* 0x000fc600017fe4ff */
/*0d90*/ IMAD.X R3, RZ, RZ, R3, P1 ; /* 0x000000ffff037224 */
/* 0x000fe400008e0603 */
/*0da0*/ IMAD.IADD R10, R11, 0x1, -R10 ; /* 0x000000010b0a7824 */
/* 0x004fca00078e0a0a */
/*0db0*/ IABS R10, R10 ; /* 0x0000000a000a7213 */
/* 0x000fe40000000000 */
/*0dc0*/ IADD3 R12, -R12, R13, RZ ; /* 0x0000000d0c0c7210 */
/* 0x008fc80007ffe1ff */
/*0dd0*/ I2F R10, R10 ; /* 0x0000000a000a7306 */
/* 0x000e220000201400 */
/*0de0*/ IABS R11, R12 ; /* 0x0000000c000b7213 */
/* 0x000fe20000000000 */
/*0df0*/ IMAD.IADD R14, R15, 0x1, -R14 ; /* 0x000000010f0e7824 */
/* 0x010fcc00078e0a0e */
/*0e00*/ I2F R11, R11 ; /* 0x0000000b000b7306 */
/* 0x000e620000201400 */
/*0e10*/ IABS R13, R14 ; /* 0x0000000e000d7213 */
/* 0x000fe20000000000 */
/*0e20*/ IMAD.IADD R16, R17, 0x1, -R16 ; /* 0x0000000111107824 */
/* 0x020fcc00078e0a10 */
/*0e30*/ I2F R13, R13 ; /* 0x0000000d000d7306 */
/* 0x000ea20000201400 */
/*0e40*/ FADD R10, R10, R9 ; /* 0x000000090a0a7221 */
/* 0x001fe20000000000 */
/*0e50*/ IABS R15, R16 ; /* 0x00000010000f7213 */
/* 0x000fcc0000000000 */
/*0e60*/ I2F R15, R15 ; /* 0x0000000f000f7306 */
/* 0x000e220000201400 */
/*0e70*/ FADD R10, R10, R11 ; /* 0x0000000b0a0a7221 */
/* 0x002fc80000000000 */
/*0e80*/ FADD R10, R10, R13 ; /* 0x0000000d0a0a7221 */
/* 0x004fc80000000000 */
/*0e90*/ FADD R9, R10, R15 ; /* 0x0000000f0a097221 */
/* 0x001fe20000000000 */
/*0ea0*/ @P0 BRA 0xcb0 ; /* 0xfffffe0000000947 */
/* 0x000fea000383ffff */
/*0eb0*/ ISETP.NE.AND P0, PT, R6, RZ, PT ; /* 0x000000ff0600720c */
/* 0x000fda0003f05270 */
/*0ec0*/ @!P0 BRA 0x1020 ; /* 0x0000015000008947 */
/* 0x000fea0003800000 */
/*0ed0*/ IMAD.MOV.U32 R5, RZ, RZ, 0x4 ; /* 0x00000004ff057424 */
/* 0x000fe400078e00ff */
/*0ee0*/ IMAD R4, R0, c[0x0][0x17c], R7 ; /* 0x00005f0000047a24 */
/* 0x000fe400078e0207 */
/*0ef0*/ IMAD.WIDE R2, R7, R5, c[0x0][0x170] ; /* 0x00005c0007027625 */
/* 0x000fc800078e0205 */
/*0f00*/ IMAD.WIDE R4, R4, R5, c[0x0][0x160] ; /* 0x0000580004047625 */
/* 0x000fe200078e0205 */
/*0f10*/ MOV R10, R2 ; /* 0x00000002000a7202 */
/* 0x000fc60000000f00 */
/*0f20*/ IMAD.MOV.U32 R11, RZ, RZ, R5 ; /* 0x000000ffff0b7224 */
/* 0x000fc800078e0005 */
/*0f30*/ IMAD.MOV.U32 R2, RZ, RZ, R10 ; /* 0x000000ffff027224 */
/* 0x000fe200078e000a */
/*0f40*/ MOV R5, R11 ; /* 0x0000000b00057202 */
/* 0x000fca0000000f00 */
/*0f50*/ LDG.E R2, [R2.64] ; /* 0x0000000402027981 */
/* 0x0000a8000c1e1900 */
/*0f60*/ LDG.E R5, [R4.64] ; /* 0x0000000404057981 */
/* 0x0002a2000c1e1900 */
/*0f70*/ IADD3 R6, R6, -0x1, RZ ; /* 0xffffffff06067810 */
/* 0x000fe40007ffe0ff */
/*0f80*/ IADD3 R10, P1, R10, 0x4, RZ ; /* 0x000000040a0a7810 */
/* 0x000fe40007f3e0ff */
/*0f90*/ ISETP.NE.AND P0, PT, R6, RZ, PT ; /* 0x000000ff0600720c */
/* 0x000fc60003f05270 */
/*0fa0*/ IMAD.X R3, RZ, RZ, R3, P1 ; /* 0x000000ffff037224 */
/* 0x001fe200008e0603 */
/*0fb0*/ IADD3 R4, P2, R4, 0x4, RZ ; /* 0x0000000404047810 */
/* 0x002fc80007f5e0ff */
/*0fc0*/ IADD3.X R11, RZ, R11, RZ, P2, !PT ; /* 0x0000000bff0b7210 */
/* 0x000fe200017fe4ff */
/*0fd0*/ IMAD.IADD R7, R5, 0x1, -R2 ; /* 0x0000000105077824 */
/* 0x004fca00078e0a02 */
/*0fe0*/ IABS R8, R7 ; /* 0x0000000700087213 */
/* 0x000fcc0000000000 */
/*0ff0*/ I2F R8, R8 ; /* 0x0000000800087306 */
/* 0x000e240000201400 */
/*1000*/ FADD R9, R8, R9 ; /* 0x0000000908097221 */
/* 0x001fe20000000000 */
/*1010*/ @P0 BRA 0xf30 ; /* 0xffffff1000000947 */
/* 0x000fea000383ffff */
/*1020*/ IMAD.MOV.U32 R3, RZ, RZ, 0x4 ; /* 0x00000004ff037424 */
/* 0x000fc800078e00ff */
/*1030*/ IMAD.WIDE R2, R0, R3, c[0x0][0x168] ; /* 0x00005a0000027625 */
/* 0x000fca00078e0203 */
/*1040*/ STG.E [R2.64], R9 ; /* 0x0000000902007986 */
/* 0x000fe2000c101904 */
/*1050*/ EXIT ; /* 0x000000000000794d */
/* 0x000fea0003800000 */
/*1060*/ BRA 0x1060; /* 0xfffffff000007947 */
/* 0x000fc0000383ffff */
/*1070*/ NOP; /* 0x0000000000007918 */
/* 0x000fc00000000000 */
/*1080*/ NOP; /* 0x0000000000007918 */
/* 0x000fc00000000000 */
/*1090*/ NOP; /* 0x0000000000007918 */
/* 0x000fc00000000000 */
/*10a0*/ NOP; /* 0x0000000000007918 */
/* 0x000fc00000000000 */
/*10b0*/ NOP; /* 0x0000000000007918 */
/* 0x000fc00000000000 */
/*10c0*/ NOP; /* 0x0000000000007918 */
/* 0x000fc00000000000 */
/*10d0*/ NOP; /* 0x0000000000007918 */
/* 0x000fc00000000000 */
/*10e0*/ NOP; /* 0x0000000000007918 */
/* 0x000fc00000000000 */
/*10f0*/ NOP; /* 0x0000000000007918 */
/* 0x000fc00000000000 */
.......... |
You are a helpful coding assistant specialized in converting CUDA source code to CUDA host assembly. | #include "includes.h"
__global__ void gpu_distance(int* data, float* distance, int* point, int n, int dim) {
int i = blockIdx.x * blockDim.x + threadIdx.x;
if (i >= n)
return;
float d = 0;
for(int j = 0; j<dim; j++)
d += abs(data[i*dim + j] - point[j]);
distance[i] = d;
} | .file "tmpxft_0007a00a_00000000-6_gpu_distance.cudafe1.cpp"
.text
#APP
#NO_APP
.type _ZL26__cudaUnregisterBinaryUtilv, @function
_ZL26__cudaUnregisterBinaryUtilv:
.LFB2029:
.cfi_startproc
endbr64
subq $8, %rsp
.cfi_def_cfa_offset 16
movq _ZL20__cudaFatCubinHandle(%rip), %rdi
call __cudaUnregisterFatBinary@PLT
addq $8, %rsp
.cfi_def_cfa_offset 8
ret
.cfi_endproc
.LFE2029:
.size _ZL26__cudaUnregisterBinaryUtilv, .-_ZL26__cudaUnregisterBinaryUtilv
.globl _Z38__device_stub__Z12gpu_distancePiPfS_iiPiPfS_ii
.type _Z38__device_stub__Z12gpu_distancePiPfS_iiPiPfS_ii, @function
_Z38__device_stub__Z12gpu_distancePiPfS_iiPiPfS_ii:
.LFB2051:
.cfi_startproc
endbr64
subq $152, %rsp
.cfi_def_cfa_offset 160
movq %rdi, 24(%rsp)
movq %rsi, 16(%rsp)
movq %rdx, 8(%rsp)
movl %ecx, 4(%rsp)
movl %r8d, (%rsp)
movq %fs:40, %rax
movq %rax, 136(%rsp)
xorl %eax, %eax
leaq 24(%rsp), %rax
movq %rax, 96(%rsp)
leaq 16(%rsp), %rax
movq %rax, 104(%rsp)
leaq 8(%rsp), %rax
movq %rax, 112(%rsp)
leaq 4(%rsp), %rax
movq %rax, 120(%rsp)
movq %rsp, %rax
movq %rax, 128(%rsp)
movl $1, 48(%rsp)
movl $1, 52(%rsp)
movl $1, 56(%rsp)
movl $1, 60(%rsp)
movl $1, 64(%rsp)
movl $1, 68(%rsp)
leaq 40(%rsp), %rcx
leaq 32(%rsp), %rdx
leaq 60(%rsp), %rsi
leaq 48(%rsp), %rdi
call __cudaPopCallConfiguration@PLT
testl %eax, %eax
je .L7
.L3:
movq 136(%rsp), %rax
subq %fs:40, %rax
jne .L8
addq $152, %rsp
.cfi_remember_state
.cfi_def_cfa_offset 8
ret
.L7:
.cfi_restore_state
pushq 40(%rsp)
.cfi_def_cfa_offset 168
pushq 40(%rsp)
.cfi_def_cfa_offset 176
leaq 112(%rsp), %r9
movq 76(%rsp), %rcx
movl 84(%rsp), %r8d
movq 64(%rsp), %rsi
movl 72(%rsp), %edx
leaq _Z12gpu_distancePiPfS_ii(%rip), %rdi
call cudaLaunchKernel@PLT
addq $16, %rsp
.cfi_def_cfa_offset 160
jmp .L3
.L8:
call __stack_chk_fail@PLT
.cfi_endproc
.LFE2051:
.size _Z38__device_stub__Z12gpu_distancePiPfS_iiPiPfS_ii, .-_Z38__device_stub__Z12gpu_distancePiPfS_iiPiPfS_ii
.globl _Z12gpu_distancePiPfS_ii
.type _Z12gpu_distancePiPfS_ii, @function
_Z12gpu_distancePiPfS_ii:
.LFB2052:
.cfi_startproc
endbr64
subq $8, %rsp
.cfi_def_cfa_offset 16
call _Z38__device_stub__Z12gpu_distancePiPfS_iiPiPfS_ii
addq $8, %rsp
.cfi_def_cfa_offset 8
ret
.cfi_endproc
.LFE2052:
.size _Z12gpu_distancePiPfS_ii, .-_Z12gpu_distancePiPfS_ii
.section .rodata.str1.1,"aMS",@progbits,1
.LC0:
.string "_Z12gpu_distancePiPfS_ii"
.text
.type _ZL24__sti____cudaRegisterAllv, @function
_ZL24__sti____cudaRegisterAllv:
.LFB2054:
.cfi_startproc
endbr64
subq $8, %rsp
.cfi_def_cfa_offset 16
leaq _ZL15__fatDeviceText(%rip), %rdi
call __cudaRegisterFatBinary@PLT
movq %rax, %rdi
movq %rax, _ZL20__cudaFatCubinHandle(%rip)
pushq $0
.cfi_def_cfa_offset 24
pushq $0
.cfi_def_cfa_offset 32
pushq $0
.cfi_def_cfa_offset 40
pushq $0
.cfi_def_cfa_offset 48
movl $0, %r9d
movl $-1, %r8d
leaq .LC0(%rip), %rdx
movq %rdx, %rcx
leaq _Z12gpu_distancePiPfS_ii(%rip), %rsi
call __cudaRegisterFunction@PLT
addq $32, %rsp
.cfi_def_cfa_offset 16
movq _ZL20__cudaFatCubinHandle(%rip), %rdi
call __cudaRegisterFatBinaryEnd@PLT
leaq _ZL26__cudaUnregisterBinaryUtilv(%rip), %rdi
call atexit@PLT
addq $8, %rsp
.cfi_def_cfa_offset 8
ret
.cfi_endproc
.LFE2054:
.size _ZL24__sti____cudaRegisterAllv, .-_ZL24__sti____cudaRegisterAllv
.section .init_array,"aw"
.align 8
.quad _ZL24__sti____cudaRegisterAllv
.section .nvFatBinSegment,"aw"
.align 8
.type _ZL15__fatDeviceText, @object
.size _ZL15__fatDeviceText, 24
_ZL15__fatDeviceText:
.long 1180844977
.long 1
.quad fatbinData
.quad 0
.local _ZL20__cudaFatCubinHandle
.comm _ZL20__cudaFatCubinHandle,8,8
.ident "GCC: (Ubuntu 13.3.0-6ubuntu2~24.04) 13.3.0"
.section .note.GNU-stack,"",@progbits
.section .note.gnu.property,"a"
.align 8
.long 1f - 0f
.long 4f - 1f
.long 5
0:
.string "GNU"
1:
.align 8
.long 0xc0000002
.long 3f - 2f
2:
.long 0x3
3:
.align 8
4: |
You are a helpful coding assistant specialized in converting CUDA source code to HIP/AMD source code. | #include "includes.h"
__global__ void gpu_distance(int* data, float* distance, int* point, int n, int dim) {
int i = blockIdx.x * blockDim.x + threadIdx.x;
if (i >= n)
return;
float d = 0;
for(int j = 0; j<dim; j++)
d += abs(data[i*dim + j] - point[j]);
distance[i] = d;
} | #include <hip/hip_runtime.h>
#include "includes.h"
__global__ void gpu_distance(int* data, float* distance, int* point, int n, int dim) {
int i = blockIdx.x * blockDim.x + threadIdx.x;
if (i >= n)
return;
float d = 0;
for(int j = 0; j<dim; j++)
d += abs(data[i*dim + j] - point[j]);
distance[i] = d;
} |
You are a helpful coding assistant specialized in converting HIP source code to AMD device assembly. | #include <hip/hip_runtime.h>
#include "includes.h"
__global__ void gpu_distance(int* data, float* distance, int* point, int n, int dim) {
int i = blockIdx.x * blockDim.x + threadIdx.x;
if (i >= n)
return;
float d = 0;
for(int j = 0; j<dim; j++)
d += abs(data[i*dim + j] - point[j]);
distance[i] = d;
} | .text
.amdgcn_target "amdgcn-amd-amdhsa--gfx1100"
.protected _Z12gpu_distancePiPfS_ii
.globl _Z12gpu_distancePiPfS_ii
.p2align 8
.type _Z12gpu_distancePiPfS_ii,@function
_Z12gpu_distancePiPfS_ii:
s_clause 0x1
s_load_b32 s2, s[0:1], 0x2c
s_load_b32 s3, s[0:1], 0x18
s_waitcnt lgkmcnt(0)
s_and_b32 s2, s2, 0xffff
s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
v_mad_u64_u32 v[1:2], null, s15, s2, v[0:1]
s_mov_b32 s2, exec_lo
v_cmpx_gt_i32_e64 s3, v1
s_cbranch_execz .LBB0_6
s_load_b32 s4, s[0:1], 0x1c
s_waitcnt lgkmcnt(0)
s_cmp_lt_i32 s4, 1
s_cbranch_scc1 .LBB0_4
s_clause 0x1
s_load_b64 s[6:7], s[0:1], 0x0
s_load_b64 s[2:3], s[0:1], 0x10
v_mul_lo_u32 v2, v1, s4
v_mov_b32_e32 v0, 0
s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
v_ashrrev_i32_e32 v3, 31, v2
v_lshlrev_b64 v[2:3], 2, v[2:3]
s_waitcnt lgkmcnt(0)
s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_2)
v_add_co_u32 v2, vcc_lo, s6, v2
v_add_co_ci_u32_e32 v3, vcc_lo, s7, v3, vcc_lo
.p2align 6
.LBB0_3:
global_load_b32 v4, v[2:3], off
s_load_b32 s5, s[2:3], 0x0
v_add_co_u32 v2, vcc_lo, v2, 4
s_add_i32 s4, s4, -1
v_add_co_ci_u32_e32 v3, vcc_lo, 0, v3, vcc_lo
s_add_u32 s2, s2, 4
s_addc_u32 s3, s3, 0
s_cmp_eq_u32 s4, 0
s_waitcnt vmcnt(0) lgkmcnt(0)
v_subrev_nc_u32_e32 v4, s5, v4
s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
v_sub_nc_u32_e32 v5, 0, v4
v_max_i32_e32 v4, v4, v5
s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
v_cvt_f32_i32_e32 v4, v4
v_add_f32_e32 v0, v0, v4
s_cbranch_scc0 .LBB0_3
s_branch .LBB0_5
.LBB0_4:
v_mov_b32_e32 v0, 0
.LBB0_5:
s_load_b64 s[0:1], s[0:1], 0x8
v_ashrrev_i32_e32 v2, 31, v1
s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
v_lshlrev_b64 v[1:2], 2, v[1:2]
s_waitcnt lgkmcnt(0)
v_add_co_u32 v1, vcc_lo, s0, v1
s_delay_alu instid0(VALU_DEP_2)
v_add_co_ci_u32_e32 v2, vcc_lo, s1, v2, vcc_lo
global_store_b32 v[1:2], v0, off
.LBB0_6:
s_nop 0
s_sendmsg sendmsg(MSG_DEALLOC_VGPRS)
s_endpgm
.section .rodata,"a",@progbits
.p2align 6, 0x0
.amdhsa_kernel _Z12gpu_distancePiPfS_ii
.amdhsa_group_segment_fixed_size 0
.amdhsa_private_segment_fixed_size 0
.amdhsa_kernarg_size 288
.amdhsa_user_sgpr_count 15
.amdhsa_user_sgpr_dispatch_ptr 0
.amdhsa_user_sgpr_queue_ptr 0
.amdhsa_user_sgpr_kernarg_segment_ptr 1
.amdhsa_user_sgpr_dispatch_id 0
.amdhsa_user_sgpr_private_segment_size 0
.amdhsa_wavefront_size32 1
.amdhsa_uses_dynamic_stack 0
.amdhsa_enable_private_segment 0
.amdhsa_system_sgpr_workgroup_id_x 1
.amdhsa_system_sgpr_workgroup_id_y 0
.amdhsa_system_sgpr_workgroup_id_z 0
.amdhsa_system_sgpr_workgroup_info 0
.amdhsa_system_vgpr_workitem_id 0
.amdhsa_next_free_vgpr 6
.amdhsa_next_free_sgpr 16
.amdhsa_float_round_mode_32 0
.amdhsa_float_round_mode_16_64 0
.amdhsa_float_denorm_mode_32 3
.amdhsa_float_denorm_mode_16_64 3
.amdhsa_dx10_clamp 1
.amdhsa_ieee_mode 1
.amdhsa_fp16_overflow 0
.amdhsa_workgroup_processor_mode 1
.amdhsa_memory_ordered 1
.amdhsa_forward_progress 0
.amdhsa_shared_vgpr_count 0
.amdhsa_exception_fp_ieee_invalid_op 0
.amdhsa_exception_fp_denorm_src 0
.amdhsa_exception_fp_ieee_div_zero 0
.amdhsa_exception_fp_ieee_overflow 0
.amdhsa_exception_fp_ieee_underflow 0
.amdhsa_exception_fp_ieee_inexact 0
.amdhsa_exception_int_div_zero 0
.end_amdhsa_kernel
.text
.Lfunc_end0:
.size _Z12gpu_distancePiPfS_ii, .Lfunc_end0-_Z12gpu_distancePiPfS_ii
.section .AMDGPU.csdata,"",@progbits
.text
.p2alignl 7, 3214868480
.fill 96, 4, 3214868480
.type __hip_cuid_,@object
.section .bss,"aw",@nobits
.globl __hip_cuid_
__hip_cuid_:
.byte 0
.size __hip_cuid_, 1
.ident "AMD clang version 18.0.0git (https://github.com/RadeonOpenCompute/llvm-project roc-6.3.2 25012 e5bf7e55c91490b07c49d8960fa7983d864936c4)"
.section ".note.GNU-stack","",@progbits
.addrsig
.addrsig_sym __hip_cuid_
.amdgpu_metadata
---
amdhsa.kernels:
- .args:
- .address_space: global
.offset: 0
.size: 8
.value_kind: global_buffer
- .address_space: global
.offset: 8
.size: 8
.value_kind: global_buffer
- .address_space: global
.offset: 16
.size: 8
.value_kind: global_buffer
- .offset: 24
.size: 4
.value_kind: by_value
- .offset: 28
.size: 4
.value_kind: by_value
- .offset: 32
.size: 4
.value_kind: hidden_block_count_x
- .offset: 36
.size: 4
.value_kind: hidden_block_count_y
- .offset: 40
.size: 4
.value_kind: hidden_block_count_z
- .offset: 44
.size: 2
.value_kind: hidden_group_size_x
- .offset: 46
.size: 2
.value_kind: hidden_group_size_y
- .offset: 48
.size: 2
.value_kind: hidden_group_size_z
- .offset: 50
.size: 2
.value_kind: hidden_remainder_x
- .offset: 52
.size: 2
.value_kind: hidden_remainder_y
- .offset: 54
.size: 2
.value_kind: hidden_remainder_z
- .offset: 72
.size: 8
.value_kind: hidden_global_offset_x
- .offset: 80
.size: 8
.value_kind: hidden_global_offset_y
- .offset: 88
.size: 8
.value_kind: hidden_global_offset_z
- .offset: 96
.size: 2
.value_kind: hidden_grid_dims
.group_segment_fixed_size: 0
.kernarg_segment_align: 8
.kernarg_segment_size: 288
.language: OpenCL C
.language_version:
- 2
- 0
.max_flat_workgroup_size: 1024
.name: _Z12gpu_distancePiPfS_ii
.private_segment_fixed_size: 0
.sgpr_count: 18
.sgpr_spill_count: 0
.symbol: _Z12gpu_distancePiPfS_ii.kd
.uniform_work_group_size: 1
.uses_dynamic_stack: false
.vgpr_count: 6
.vgpr_spill_count: 0
.wavefront_size: 32
.workgroup_processor_mode: 1
amdhsa.target: amdgcn-amd-amdhsa--gfx1100
amdhsa.version:
- 1
- 2
...
.end_amdgpu_metadata |
You are a helpful coding assistant specialized in converting HIP source code to AMD host assembly. | #include <hip/hip_runtime.h>
#include "includes.h"
__global__ void gpu_distance(int* data, float* distance, int* point, int n, int dim) {
int i = blockIdx.x * blockDim.x + threadIdx.x;
if (i >= n)
return;
float d = 0;
for(int j = 0; j<dim; j++)
d += abs(data[i*dim + j] - point[j]);
distance[i] = d;
} | .text
.file "gpu_distance.hip"
.globl _Z27__device_stub__gpu_distancePiPfS_ii # -- Begin function _Z27__device_stub__gpu_distancePiPfS_ii
.p2align 4, 0x90
.type _Z27__device_stub__gpu_distancePiPfS_ii,@function
_Z27__device_stub__gpu_distancePiPfS_ii: # @_Z27__device_stub__gpu_distancePiPfS_ii
.cfi_startproc
# %bb.0:
subq $120, %rsp
.cfi_def_cfa_offset 128
movq %rdi, 72(%rsp)
movq %rsi, 64(%rsp)
movq %rdx, 56(%rsp)
movl %ecx, 4(%rsp)
movl %r8d, (%rsp)
leaq 72(%rsp), %rax
movq %rax, 80(%rsp)
leaq 64(%rsp), %rax
movq %rax, 88(%rsp)
leaq 56(%rsp), %rax
movq %rax, 96(%rsp)
leaq 4(%rsp), %rax
movq %rax, 104(%rsp)
movq %rsp, %rax
movq %rax, 112(%rsp)
leaq 40(%rsp), %rdi
leaq 24(%rsp), %rsi
leaq 16(%rsp), %rdx
leaq 8(%rsp), %rcx
callq __hipPopCallConfiguration
movq 40(%rsp), %rsi
movl 48(%rsp), %edx
movq 24(%rsp), %rcx
movl 32(%rsp), %r8d
leaq 80(%rsp), %r9
movl $_Z12gpu_distancePiPfS_ii, %edi
pushq 8(%rsp)
.cfi_adjust_cfa_offset 8
pushq 24(%rsp)
.cfi_adjust_cfa_offset 8
callq hipLaunchKernel
addq $136, %rsp
.cfi_adjust_cfa_offset -136
retq
.Lfunc_end0:
.size _Z27__device_stub__gpu_distancePiPfS_ii, .Lfunc_end0-_Z27__device_stub__gpu_distancePiPfS_ii
.cfi_endproc
# -- End function
.p2align 4, 0x90 # -- Begin function __hip_module_ctor
.type __hip_module_ctor,@function
__hip_module_ctor: # @__hip_module_ctor
.cfi_startproc
# %bb.0:
subq $40, %rsp
.cfi_def_cfa_offset 48
cmpq $0, __hip_gpubin_handle(%rip)
jne .LBB1_2
# %bb.1:
movl $__hip_fatbin_wrapper, %edi
callq __hipRegisterFatBinary
movq %rax, __hip_gpubin_handle(%rip)
.LBB1_2:
movq __hip_gpubin_handle(%rip), %rdi
xorps %xmm0, %xmm0
movups %xmm0, 16(%rsp)
movups %xmm0, (%rsp)
movl $_Z12gpu_distancePiPfS_ii, %esi
movl $.L__unnamed_1, %edx
movl $.L__unnamed_1, %ecx
movl $-1, %r8d
xorl %r9d, %r9d
callq __hipRegisterFunction
movl $__hip_module_dtor, %edi
addq $40, %rsp
.cfi_def_cfa_offset 8
jmp atexit # TAILCALL
.Lfunc_end1:
.size __hip_module_ctor, .Lfunc_end1-__hip_module_ctor
.cfi_endproc
# -- End function
.p2align 4, 0x90 # -- Begin function __hip_module_dtor
.type __hip_module_dtor,@function
__hip_module_dtor: # @__hip_module_dtor
.cfi_startproc
# %bb.0:
movq __hip_gpubin_handle(%rip), %rdi
testq %rdi, %rdi
je .LBB2_2
# %bb.1:
pushq %rax
.cfi_def_cfa_offset 16
callq __hipUnregisterFatBinary
movq $0, __hip_gpubin_handle(%rip)
addq $8, %rsp
.cfi_def_cfa_offset 8
.LBB2_2:
retq
.Lfunc_end2:
.size __hip_module_dtor, .Lfunc_end2-__hip_module_dtor
.cfi_endproc
# -- End function
.type _Z12gpu_distancePiPfS_ii,@object # @_Z12gpu_distancePiPfS_ii
.section .rodata,"a",@progbits
.globl _Z12gpu_distancePiPfS_ii
.p2align 3, 0x0
_Z12gpu_distancePiPfS_ii:
.quad _Z27__device_stub__gpu_distancePiPfS_ii
.size _Z12gpu_distancePiPfS_ii, 8
.type .L__unnamed_1,@object # @0
.section .rodata.str1.1,"aMS",@progbits,1
.L__unnamed_1:
.asciz "_Z12gpu_distancePiPfS_ii"
.size .L__unnamed_1, 25
.type __hip_fatbin_wrapper,@object # @__hip_fatbin_wrapper
.section .hipFatBinSegment,"a",@progbits
.p2align 3, 0x0
__hip_fatbin_wrapper:
.long 1212764230 # 0x48495046
.long 1 # 0x1
.quad __hip_fatbin
.quad 0
.size __hip_fatbin_wrapper, 24
.type __hip_gpubin_handle,@object # @__hip_gpubin_handle
.local __hip_gpubin_handle
.comm __hip_gpubin_handle,8,8
.section .init_array,"aw",@init_array
.p2align 3, 0x0
.quad __hip_module_ctor
.type __hip_cuid_,@object # @__hip_cuid_
.bss
.globl __hip_cuid_
__hip_cuid_:
.byte 0 # 0x0
.size __hip_cuid_, 1
.section ".linker-options","e",@llvm_linker_options
.ident "AMD clang version 18.0.0git (https://github.com/RadeonOpenCompute/llvm-project roc-6.3.2 25012 e5bf7e55c91490b07c49d8960fa7983d864936c4)"
.section ".note.GNU-stack","",@progbits
.addrsig
.addrsig_sym _Z27__device_stub__gpu_distancePiPfS_ii
.addrsig_sym __hip_module_ctor
.addrsig_sym __hip_module_dtor
.addrsig_sym _Z12gpu_distancePiPfS_ii
.addrsig_sym __hip_fatbin
.addrsig_sym __hip_fatbin_wrapper
.addrsig_sym __hip_cuid_ |
You are a helpful coding assistant specialized in converting from CUDA device assembly to AMD device assembly. | code for sm_80
Function : _Z12gpu_distancePiPfS_ii
.headerflags @"EF_CUDA_TEXMODE_UNIFIED EF_CUDA_64BIT_ADDRESS EF_CUDA_SM80 EF_CUDA_VIRTUAL_SM(EF_CUDA_SM80)"
/*0000*/ IMAD.MOV.U32 R1, RZ, RZ, c[0x0][0x28] ; /* 0x00000a00ff017624 */
/* 0x000fe400078e00ff */
/*0010*/ S2R R0, SR_CTAID.X ; /* 0x0000000000007919 */
/* 0x000e280000002500 */
/*0020*/ S2R R3, SR_TID.X ; /* 0x0000000000037919 */
/* 0x000e240000002100 */
/*0030*/ IMAD R0, R0, c[0x0][0x0], R3 ; /* 0x0000000000007a24 */
/* 0x001fca00078e0203 */
/*0040*/ ISETP.GE.AND P0, PT, R0, c[0x0][0x178], PT ; /* 0x00005e0000007a0c */
/* 0x000fda0003f06270 */
/*0050*/ @P0 EXIT ; /* 0x000000000000094d */
/* 0x000fea0003800000 */
/*0060*/ IMAD.MOV.U32 R6, RZ, RZ, c[0x0][0x17c] ; /* 0x00005f00ff067624 */
/* 0x000fe200078e00ff */
/*0070*/ ULDC.64 UR4, c[0x0][0x118] ; /* 0x0000460000047ab9 */
/* 0x000fe20000000a00 */
/*0080*/ IMAD.MOV.U32 R9, RZ, RZ, RZ ; /* 0x000000ffff097224 */
/* 0x000fc600078e00ff */
/*0090*/ ISETP.GE.AND P0, PT, R6, 0x1, PT ; /* 0x000000010600780c */
/* 0x000fda0003f06270 */
/*00a0*/ @!P0 BRA 0x1020 ; /* 0x00000f7000008947 */
/* 0x000fea0003800000 */
/*00b0*/ IADD3 R2, R6.reuse, -0x1, RZ ; /* 0xffffffff06027810 */
/* 0x040fe20007ffe0ff */
/*00c0*/ HFMA2.MMA R9, -RZ, RZ, 0, 0 ; /* 0x00000000ff097435 */
/* 0x000fe200000001ff */
/*00d0*/ LOP3.LUT R6, R6, 0x3, RZ, 0xc0, !PT ; /* 0x0000000306067812 */
/* 0x000fe200078ec0ff */
/*00e0*/ IMAD.MOV.U32 R7, RZ, RZ, RZ ; /* 0x000000ffff077224 */
/* 0x000fe200078e00ff */
/*00f0*/ ISETP.GE.U32.AND P0, PT, R2, 0x3, PT ; /* 0x000000030200780c */
/* 0x000fda0003f06070 */
/*0100*/ @!P0 BRA 0xeb0 ; /* 0x00000da000008947 */
/* 0x000fea0003800000 */
/*0110*/ IADD3 R8, -R6, c[0x0][0x17c], RZ ; /* 0x00005f0006087a10 */
/* 0x000fe20007ffe1ff */
/*0120*/ IMAD.MOV.U32 R3, RZ, RZ, 0x4 ; /* 0x00000004ff037424 */
/* 0x000fe200078e00ff */
/*0130*/ MOV R9, RZ ; /* 0x000000ff00097202 */
/* 0x000fe20000000f00 */
/*0140*/ IMAD R2, R0, c[0x0][0x17c], RZ ; /* 0x00005f0000027a24 */
/* 0x000fe200078e02ff */
/*0150*/ ISETP.GT.AND P0, PT, R8, RZ, PT ; /* 0x000000ff0800720c */
/* 0x000fe20003f04270 */
/*0160*/ IMAD.MOV.U32 R7, RZ, RZ, RZ ; /* 0x000000ffff077224 */
/* 0x000fe200078e00ff */
/*0170*/ MOV R5, c[0x0][0x174] ; /* 0x00005d0000057a02 */
/* 0x000fe20000000f00 */
/*0180*/ IMAD.MOV.U32 R4, RZ, RZ, c[0x0][0x170] ; /* 0x00005c00ff047624 */
/* 0x000fe400078e00ff */
/*0190*/ IMAD.WIDE R2, R2, R3, c[0x0][0x160] ; /* 0x0000580002027625 */
/* 0x000fd000078e0203 */
/*01a0*/ @!P0 BRA 0xcb0 ; /* 0x00000b0000008947 */
/* 0x000fea0003800000 */
/*01b0*/ ISETP.GT.AND P1, PT, R8, 0xc, PT ; /* 0x0000000c0800780c */
/* 0x000fe40003f24270 */
/*01c0*/ PLOP3.LUT P0, PT, PT, PT, PT, 0x80, 0x0 ; /* 0x000000000000781c */
/* 0x000fd60003f0f070 */
/*01d0*/ @!P1 BRA 0x8a0 ; /* 0x000006c000009947 */
/* 0x000fea0003800000 */
/*01e0*/ PLOP3.LUT P0, PT, PT, PT, PT, 0x8, 0x0 ; /* 0x000000000000781c */
/* 0x000fe40003f0e170 */
/*01f0*/ LDG.E R12, [R4.64] ; /* 0x00000004040c7981 */
/* 0x000ea8000c1e1900 */
/*0200*/ LDG.E R13, [R2.64] ; /* 0x00000004020d7981 */
/* 0x000ea8000c1e1900 */
/*0210*/ LDG.E R14, [R4.64+0x4] ; /* 0x00000404040e7981 */
/* 0x000ee8000c1e1900 */
/*0220*/ LDG.E R15, [R2.64+0x4] ; /* 0x00000404020f7981 */
/* 0x000ee8000c1e1900 */
/*0230*/ LDG.E R16, [R4.64+0x8] ; /* 0x0000080404107981 */
/* 0x000f28000c1e1900 */
/*0240*/ LDG.E R17, [R2.64+0x8] ; /* 0x0000080402117981 */
/* 0x000f28000c1e1900 */
/*0250*/ LDG.E R10, [R4.64+0xc] ; /* 0x00000c04040a7981 */
/* 0x000f68000c1e1900 */
/*0260*/ LDG.E R11, [R2.64+0xc] ; /* 0x00000c04020b7981 */
/* 0x000f68000c1e1900 */
/*0270*/ LDG.E R18, [R2.64+0x10] ; /* 0x0000100402127981 */
/* 0x000f68000c1e1900 */
/*0280*/ LDG.E R19, [R4.64+0x18] ; /* 0x0000180404137981 */
/* 0x000f68000c1e1900 */
/*0290*/ LDG.E R22, [R2.64+0x18] ; /* 0x0000180402167981 */
/* 0x000f68000c1e1900 */
/*02a0*/ LDG.E R20, [R4.64+0x1c] ; /* 0x00001c0404147981 */
/* 0x000f68000c1e1900 */
/*02b0*/ LDG.E R21, [R2.64+0x1c] ; /* 0x00001c0402157981 */
/* 0x000f68000c1e1900 */
/*02c0*/ LDG.E R23, [R4.64+0x20] ; /* 0x0000200404177981 */
/* 0x000f68000c1e1900 */
/*02d0*/ LDG.E R26, [R2.64+0x20] ; /* 0x00002004021a7981 */
/* 0x000f68000c1e1900 */
/*02e0*/ LDG.E R24, [R4.64+0x24] ; /* 0x0000240404187981 */
/* 0x000f68000c1e1900 */
/*02f0*/ LDG.E R25, [R2.64+0x24] ; /* 0x0000240402197981 */
/* 0x000f62000c1e1900 */
/*0300*/ IMAD.IADD R12, R13, 0x1, -R12 ; /* 0x000000010d0c7824 */
/* 0x004fca00078e0a0c */
/*0310*/ IABS R12, R12 ; /* 0x0000000c000c7213 */
/* 0x000fe20000000000 */
/*0320*/ IMAD.IADD R14, R15, 0x1, -R14 ; /* 0x000000010f0e7824 */
/* 0x008fe400078e0a0e */
/*0330*/ LDG.E R15, [R4.64+0x10] ; /* 0x00001004040f7981 */
/* 0x000ea6000c1e1900 */
/*0340*/ I2F R12, R12 ; /* 0x0000000c000c7306 */
/* 0x000e220000201400 */
/*0350*/ IABS R13, R14 ; /* 0x0000000e000d7213 */
/* 0x000fe40000000000 */
/*0360*/ IADD3 R16, -R16, R17, RZ ; /* 0x0000001110107210 */
/* 0x010fe40007ffe1ff */
/*0370*/ LDG.E R17, [R2.64+0x14] ; /* 0x0000140402117981 */
/* 0x000ee6000c1e1900 */
/*0380*/ I2F R13, R13 ; /* 0x0000000d000d7306 */
/* 0x000e620000201400 */
/*0390*/ IABS R14, R16 ; /* 0x00000010000e7213 */
/* 0x000fc40000000000 */
/*03a0*/ LDG.E R16, [R4.64+0x14] ; /* 0x0000140404107981 */
/* 0x000eea000c1e1900 */
/*03b0*/ I2F R14, R14 ; /* 0x0000000e000e7306 */
/* 0x000f220000201400 */
/*03c0*/ FADD R12, R12, R9 ; /* 0x000000090c0c7221 */
/* 0x001fe40000000000 */
/*03d0*/ IMAD.IADD R10, R11, 0x1, -R10 ; /* 0x000000010b0a7824 */
/* 0x020fe400078e0a0a */
/*03e0*/ LDG.E R11, [R4.64+0x28] ; /* 0x00002804040b7981 */
/* 0x000f62000c1e1900 */
/*03f0*/ FADD R9, R12, R13 ; /* 0x0000000d0c097221 */
/* 0x002fc60000000000 */
/*0400*/ LDG.E R12, [R2.64+0x28] ; /* 0x00002804020c7981 */
/* 0x000f68000c1e1900 */
/*0410*/ LDG.E R13, [R4.64+0x2c] ; /* 0x00002c04040d7981 */
/* 0x000f62000c1e1900 */
/*0420*/ FADD R9, R9, R14 ; /* 0x0000000e09097221 */
/* 0x010fc60000000000 */
/*0430*/ LDG.E R14, [R2.64+0x2c] ; /* 0x00002c04020e7981 */
/* 0x000f22000c1e1900 */
/*0440*/ IMAD.IADD R19, R22, 0x1, -R19 ; /* 0x0000000116137824 */
/* 0x000fe400078e0a13 */
/*0450*/ IMAD.IADD R20, R21, 0x1, -R20 ; /* 0x0000000115147824 */
/* 0x000fe200078e0a14 */
/*0460*/ LDG.E R22, [R2.64+0x34] ; /* 0x0000340402167981 */
/* 0x000f28000c1e1900 */
/*0470*/ LDG.E R21, [R4.64+0x34] ; /* 0x0000340404157981 */
/* 0x000f22000c1e1900 */
/*0480*/ IADD3 R23, -R23, R26, RZ ; /* 0x0000001a17177210 */
/* 0x000fc60007ffe1ff */
/*0490*/ LDG.E R26, [R4.64+0x38] ; /* 0x00003804041a7981 */
/* 0x000f22000c1e1900 */
/*04a0*/ IMAD.IADD R24, R25, 0x1, -R24 ; /* 0x0000000119187824 */
/* 0x000fc600078e0a18 */
/*04b0*/ LDG.E R25, [R2.64+0x38] ; /* 0x0000380402197981 */
/* 0x000f22000c1e1900 */
/*04c0*/ IMAD.IADD R15, R18, 0x1, -R15 ; /* 0x00000001120f7824 */
/* 0x004fc600078e0a0f */
/*04d0*/ LDG.E R18, [R2.64+0x30] ; /* 0x0000300402127981 */
/* 0x0000a2000c1e1900 */
/*04e0*/ IADD3 R16, -R16, R17, RZ ; /* 0x0000001110107210 */
/* 0x008fc60007ffe1ff */
/*04f0*/ LDG.E R17, [R4.64+0x30] ; /* 0x0000300404117981 */
/* 0x0002a2000c1e1900 */
/*0500*/ IMAD.IADD R11, R12, 0x1, -R11 ; /* 0x000000010c0b7824 */
/* 0x020fc600078e0a0b */
/*0510*/ LDG.E R12, [R2.64+0x3c] ; /* 0x00003c04020c7981 */
/* 0x0000e2000c1e1900 */
/*0520*/ IADD3 R14, -R13, R14, RZ ; /* 0x0000000e0d0e7210 */
/* 0x010fc60007ffe1ff */
/*0530*/ LDG.E R13, [R4.64+0x3c] ; /* 0x00003c04040d7981 */
/* 0x0002e2000c1e1900 */
/*0540*/ IABS R10, R10 ; /* 0x0000000a000a7213 */
/* 0x000fe40000000000 */
/*0550*/ IABS R15, R15 ; /* 0x0000000f000f7213 */
/* 0x000fe40000000000 */
/*0560*/ IABS R16, R16 ; /* 0x0000001000107213 */
/* 0x000fe40000000000 */
/*0570*/ I2F R10, R10 ; /* 0x0000000a000a7306 */
/* 0x000f220000201400 */
/*0580*/ IABS R19, R19 ; /* 0x0000001300137213 */
/* 0x000fce0000000000 */
/*0590*/ I2F R15, R15 ; /* 0x0000000f000f7306 */
/* 0x000f620000201400 */
/*05a0*/ IABS R20, R20 ; /* 0x0000001400147213 */
/* 0x000fce0000000000 */
/*05b0*/ I2F R16, R16 ; /* 0x0000001000107306 */
/* 0x000e220000201400 */
/*05c0*/ IABS R23, R23 ; /* 0x0000001700177213 */
/* 0x000fe40000000000 */
/*05d0*/ IABS R27, R24 ; /* 0x00000018001b7213 */
/* 0x000fe20000000000 */
/*05e0*/ FADD R24, R9, R10 ; /* 0x0000000a09187221 */
/* 0x010fc80000000000 */
/*05f0*/ I2F R19, R19 ; /* 0x0000001300137306 */
/* 0x000f220000201400 */
/*0600*/ IABS R28, R11 ; /* 0x0000000b001c7213 */
/* 0x000fe20000000000 */
/*0610*/ FADD R15, R24, R15 ; /* 0x0000000f180f7221 */
/* 0x020fcc0000000000 */
/*0620*/ I2F R20, R20 ; /* 0x0000001400147306 */
/* 0x000f620000201400 */
/*0630*/ IMAD.MOV.U32 R9, RZ, RZ, R28 ; /* 0x000000ffff097224 */
/* 0x000fe400078e001c */
/*0640*/ FADD R16, R15, R16 ; /* 0x000000100f107221 */
/* 0x001fca0000000000 */
/*0650*/ I2F R23, R23 ; /* 0x0000001700177306 */
/* 0x000e220000201400 */
/*0660*/ IABS R10, R14 ; /* 0x0000000e000a7213 */
/* 0x000fe40000000000 */
/*0670*/ IADD3 R21, -R21, R22, RZ ; /* 0x0000001615157210 */
/* 0x000fe20007ffe1ff */
/*0680*/ FADD R19, R16, R19 ; /* 0x0000001310137221 */
/* 0x010fc80000000000 */
/*0690*/ I2F R11, R27 ; /* 0x0000001b000b7306 */
/* 0x000f220000201400 */
/*06a0*/ IABS R21, R21 ; /* 0x0000001500157213 */
/* 0x000fe20000000000 */
/*06b0*/ IMAD.IADD R25, R25, 0x1, -R26 ; /* 0x0000000119197824 */
/* 0x000fe400078e0a1a */
/*06c0*/ FADD R20, R19, R20 ; /* 0x0000001413147221 */
/* 0x020fc80000000000 */
/*06d0*/ I2F R9, R9 ; /* 0x0000000900097306 */
/* 0x000f620000201400 */
/*06e0*/ IMAD.MOV.U32 R16, RZ, RZ, R21 ; /* 0x000000ffff107224 */
/* 0x000fe200078e0015 */
/*06f0*/ IABS R25, R25 ; /* 0x0000001900197213 */
/* 0x000fe20000000000 */
/*0700*/ FADD R20, R20, R23 ; /* 0x0000001714147221 */
/* 0x001fca0000000000 */
/*0710*/ I2F R10, R10 ; /* 0x0000000a000a7306 */
/* 0x000e220000201400 */
/*0720*/ FADD R20, R20, R11 ; /* 0x0000000b14147221 */
/* 0x010fe20000000000 */
/*0730*/ IADD3 R8, R8, -0x10, RZ ; /* 0xfffffff008087810 */
/* 0x000fcc0007ffe0ff */
/*0740*/ I2F R16, R16 ; /* 0x0000001000107306 */
/* 0x000fe20000201400 */
/*0750*/ FADD R9, R20, R9 ; /* 0x0000000914097221 */
/* 0x020fe20000000000 */
/*0760*/ ISETP.GT.AND P1, PT, R8, 0xc, PT ; /* 0x0000000c0800780c */
/* 0x000fc60003f24270 */
/*0770*/ FADD R9, R9, R10 ; /* 0x0000000a09097221 */
/* 0x001fe20000000000 */
/*0780*/ IADD3 R4, P3, R4, 0x40, RZ ; /* 0x0000004004047810 */
/* 0x002fe40007f7e0ff */
/*0790*/ IADD3 R2, P2, R2, 0x40, RZ ; /* 0x0000004002027810 */
/* 0x000fe40007f5e0ff */
/*07a0*/ IADD3 R7, R7, 0x10, RZ ; /* 0x0000001007077810 */
/* 0x000fe20007ffe0ff */
/*07b0*/ IMAD.X R5, RZ, RZ, R5, P3 ; /* 0x000000ffff057224 */
/* 0x000fe200018e0605 */
/*07c0*/ IADD3.X R3, RZ, R3, RZ, P2, !PT ; /* 0x00000003ff037210 */
/* 0x000fe200017fe4ff */
/*07d0*/ IMAD.IADD R17, R18, 0x1, -R17 ; /* 0x0000000112117824 */
/* 0x004fca00078e0a11 */
/*07e0*/ IABS R14, R17 ; /* 0x00000011000e7213 */
/* 0x000fcc0000000000 */
/*07f0*/ I2F R14, R14 ; /* 0x0000000e000e7306 */
/* 0x000e220000201400 */
/*0800*/ IADD3 R12, -R13, R12, RZ ; /* 0x0000000c0d0c7210 */
/* 0x008fe20007ffe1ff */
/*0810*/ IMAD.MOV.U32 R13, RZ, RZ, R25 ; /* 0x000000ffff0d7224 */
/* 0x000fc600078e0019 */
/*0820*/ IABS R11, R12 ; /* 0x0000000c000b7213 */
/* 0x000fc60000000000 */
/*0830*/ I2F R12, R13 ; /* 0x0000000d000c7306 */
/* 0x000e620000201400 */
/*0840*/ FADD R9, R9, R14 ; /* 0x0000000e09097221 */
/* 0x001fce0000000000 */
/*0850*/ I2F R10, R11 ; /* 0x0000000b000a7306 */
/* 0x000e220000201400 */
/*0860*/ FADD R9, R9, R16 ; /* 0x0000001009097221 */
/* 0x000fc80000000000 */
/*0870*/ FADD R9, R9, R12 ; /* 0x0000000c09097221 */
/* 0x002fc80000000000 */
/*0880*/ FADD R9, R9, R10 ; /* 0x0000000a09097221 */
/* 0x001fe20000000000 */
/*0890*/ @P1 BRA 0x1f0 ; /* 0xfffff95000001947 */
/* 0x000fea000383ffff */
/*08a0*/ ISETP.GT.AND P1, PT, R8, 0x4, PT ; /* 0x000000040800780c */
/* 0x000fda0003f24270 */
/*08b0*/ @!P1 BRA 0xc90 ; /* 0x000003d000009947 */
/* 0x000fea0003800000 */
/*08c0*/ LDG.E R20, [R4.64] ; /* 0x0000000404147981 */
/* 0x0000a8000c1e1900 */
/*08d0*/ LDG.E R23, [R2.64] ; /* 0x0000000402177981 */
/* 0x0002a8000c1e1900 */
/*08e0*/ LDG.E R24, [R4.64+0x4] ; /* 0x0000040404187981 */
/* 0x0000e8000c1e1900 */
/*08f0*/ LDG.E R25, [R2.64+0x4] ; /* 0x0000040402197981 */
/* 0x0002e8000c1e1900 */
/*0900*/ LDG.E R22, [R4.64+0x8] ; /* 0x0000080404167981 */
/* 0x000128000c1e1900 */
/*0910*/ LDG.E R21, [R2.64+0x8] ; /* 0x0000080402157981 */
/* 0x000328000c1e1900 */
/*0920*/ LDG.E R19, [R4.64+0xc] ; /* 0x00000c0404137981 */
/* 0x000168000c1e1900 */
/*0930*/ LDG.E R18, [R2.64+0xc] ; /* 0x00000c0402127981 */
/* 0x000368000c1e1900 */
/*0940*/ LDG.E R17, [R4.64+0x10] ; /* 0x0000100404117981 */
/* 0x000168000c1e1900 */
/*0950*/ LDG.E R16, [R2.64+0x10] ; /* 0x0000100402107981 */
/* 0x000368000c1e1900 */
/*0960*/ LDG.E R14, [R4.64+0x14] ; /* 0x00001404040e7981 */
/* 0x000168000c1e1900 */
/*0970*/ LDG.E R15, [R2.64+0x14] ; /* 0x00001404020f7981 */
/* 0x000368000c1e1900 */
/*0980*/ LDG.E R12, [R4.64+0x18] ; /* 0x00001804040c7981 */
/* 0x000168000c1e1900 */
/*0990*/ LDG.E R13, [R2.64+0x18] ; /* 0x00001804020d7981 */
/* 0x000368000c1e1900 */
/*09a0*/ LDG.E R10, [R4.64+0x1c] ; /* 0x00001c04040a7981 */
/* 0x000168000c1e1900 */
/*09b0*/ LDG.E R11, [R2.64+0x1c] ; /* 0x00001c04020b7981 */
/* 0x000362000c1e1900 */
/*09c0*/ PLOP3.LUT P0, PT, PT, PT, PT, 0x8, 0x0 ; /* 0x000000000000781c */
/* 0x000fc40003f0e170 */
/*09d0*/ IADD3 R7, R7, 0x8, RZ ; /* 0x0000000807077810 */
/* 0x000fe40007ffe0ff */
/*09e0*/ IADD3 R8, R8, -0x8, RZ ; /* 0xfffffff808087810 */
/* 0x000fe40007ffe0ff */
/*09f0*/ IADD3 R4, P2, R4, 0x20, RZ ; /* 0x0000002004047810 */
/* 0x001fe40007f5e0ff */
/*0a00*/ IADD3 R2, P1, R2, 0x20, RZ ; /* 0x0000002002027810 */
/* 0x002fc60007f3e0ff */
/*0a10*/ IMAD.X R5, RZ, RZ, R5, P2 ; /* 0x000000ffff057224 */
/* 0x000fe200010e0605 */
/*0a20*/ IADD3.X R3, RZ, R3, RZ, P1, !PT ; /* 0x00000003ff037210 */
/* 0x000fe20000ffe4ff */
/*0a30*/ IMAD.IADD R20, R23, 0x1, -R20 ; /* 0x0000000117147824 */
/* 0x004fca00078e0a14 */
/*0a40*/ IABS R20, R20 ; /* 0x0000001400147213 */
/* 0x000fe20000000000 */
/*0a50*/ IMAD.IADD R24, R25, 0x1, -R24 ; /* 0x0000000119187824 */
/* 0x008fca00078e0a18 */
/*0a60*/ I2F R20, R20 ; /* 0x0000001400147306 */
/* 0x000e220000201400 */
/*0a70*/ IABS R24, R24 ; /* 0x0000001800187213 */
/* 0x000fe40000000000 */
/*0a80*/ IADD3 R21, -R22, R21, RZ ; /* 0x0000001516157210 */
/* 0x010fc60007ffe1ff */
/*0a90*/ IMAD.MOV.U32 R22, RZ, RZ, R24 ; /* 0x000000ffff167224 */
/* 0x000fe200078e0018 */
/*0aa0*/ IABS R23, R21 ; /* 0x0000001500177213 */
/* 0x000fc60000000000 */
/*0ab0*/ I2F R21, R22 ; /* 0x0000001600157306 */
/* 0x000e620000201400 */
/*0ac0*/ IMAD.IADD R18, R18, 0x1, -R19 ; /* 0x0000000112127824 */
/* 0x020fe200078e0a13 */
/*0ad0*/ MOV R19, R23 ; /* 0x0000001700137202 */
/* 0x000fe20000000f00 */
/*0ae0*/ FADD R20, R9, R20 ; /* 0x0000001409147221 */
/* 0x001fc60000000000 */
/*0af0*/ IABS R23, R18 ; /* 0x0000001200177213 */
/* 0x000fe40000000000 */
/*0b00*/ I2F R18, R19 ; /* 0x0000001300127306 */
/* 0x000e220000201400 */
/*0b10*/ IMAD.IADD R16, R16, 0x1, -R17 ; /* 0x0000000110107824 */
/* 0x000fe400078e0a11 */
/*0b20*/ IMAD.MOV.U32 R17, RZ, RZ, R23 ; /* 0x000000ffff117224 */
/* 0x000fc600078e0017 */
/*0b30*/ IABS R23, R16 ; /* 0x0000001000177213 */
/* 0x000fe20000000000 */
/*0b40*/ FADD R21, R20, R21 ; /* 0x0000001514157221 */
/* 0x002fe20000000000 */
/*0b50*/ I2F R16, R17 ; /* 0x0000001100107306 */
/* 0x000e620000201400 */
/*0b60*/ IADD3 R14, -R14, R15, RZ ; /* 0x0000000f0e0e7210 */
/* 0x000fe40007ffe1ff */
/*0b70*/ IMAD.MOV.U32 R15, RZ, RZ, R23 ; /* 0x000000ffff0f7224 */
/* 0x000fe400078e0017 */
/*0b80*/ IABS R22, R14 ; /* 0x0000000e00167213 */
/* 0x000fc60000000000 */
/*0b90*/ I2F R14, R15 ; /* 0x0000000f000e7306 */
/* 0x000ea20000201400 */
/*0ba0*/ IMAD.IADD R12, R13, 0x1, -R12 ; /* 0x000000010d0c7824 */
/* 0x000fe200078e0a0c */
/*0bb0*/ MOV R13, R22 ; /* 0x00000016000d7202 */
/* 0x000fe20000000f00 */
/*0bc0*/ FADD R21, R21, R18 ; /* 0x0000001215157221 */
/* 0x001fc60000000000 */
/*0bd0*/ IABS R12, R12 ; /* 0x0000000c000c7213 */
/* 0x000fe40000000000 */
/*0be0*/ I2F R13, R13 ; /* 0x0000000d000d7306 */
/* 0x000e220000201400 */
/*0bf0*/ IMAD.IADD R10, R11, 0x1, -R10 ; /* 0x000000010b0a7824 */
/* 0x000fe400078e0a0a */
/*0c00*/ IMAD.MOV.U32 R11, RZ, RZ, R12 ; /* 0x000000ffff0b7224 */
/* 0x000fe400078e000c */
/*0c10*/ FADD R21, R21, R16 ; /* 0x0000001015157221 */
/* 0x002fe20000000000 */
/*0c20*/ IABS R12, R10 ; /* 0x0000000a000c7213 */
/* 0x000fe40000000000 */
/*0c30*/ I2F R10, R11 ; /* 0x0000000b000a7306 */
/* 0x000e620000201400 */
/*0c40*/ FADD R14, R21, R14 ; /* 0x0000000e150e7221 */
/* 0x004fce0000000000 */
/*0c50*/ I2F R9, R12 ; /* 0x0000000c00097306 */
/* 0x000ea20000201400 */
/*0c60*/ FADD R13, R14, R13 ; /* 0x0000000d0e0d7221 */
/* 0x001fc80000000000 */
/*0c70*/ FADD R10, R13, R10 ; /* 0x0000000a0d0a7221 */
/* 0x002fc80000000000 */
/*0c80*/ FADD R9, R10, R9 ; /* 0x000000090a097221 */
/* 0x004fe40000000000 */
/*0c90*/ ISETP.NE.OR P0, PT, R8, RZ, P0 ; /* 0x000000ff0800720c */
/* 0x000fda0000705670 */
/*0ca0*/ @!P0 BRA 0xeb0 ; /* 0x0000020000008947 */
/* 0x000fea0003800000 */
/*0cb0*/ LDG.E R10, [R4.64] ; /* 0x00000004040a7981 */
/* 0x0000a8000c1e1900 */
/*0cc0*/ LDG.E R11, [R2.64] ; /* 0x00000004020b7981 */
/* 0x0002a8000c1e1900 */
/*0cd0*/ LDG.E R12, [R4.64+0x4] ; /* 0x00000404040c7981 */
/* 0x0000e8000c1e1900 */
/*0ce0*/ LDG.E R13, [R2.64+0x4] ; /* 0x00000404020d7981 */
/* 0x0002e8000c1e1900 */
/*0cf0*/ LDG.E R14, [R4.64+0x8] ; /* 0x00000804040e7981 */
/* 0x000128000c1e1900 */
/*0d00*/ LDG.E R15, [R2.64+0x8] ; /* 0x00000804020f7981 */
/* 0x000328000c1e1900 */
/*0d10*/ LDG.E R16, [R4.64+0xc] ; /* 0x00000c0404107981 */
/* 0x000168000c1e1900 */
/*0d20*/ LDG.E R17, [R2.64+0xc] ; /* 0x00000c0402117981 */
/* 0x000362000c1e1900 */
/*0d30*/ IADD3 R8, R8, -0x4, RZ ; /* 0xfffffffc08087810 */
/* 0x000fc40007ffe0ff */
/*0d40*/ IADD3 R7, R7, 0x4, RZ ; /* 0x0000000407077810 */
/* 0x000fe40007ffe0ff */
/*0d50*/ ISETP.NE.AND P0, PT, R8, RZ, PT ; /* 0x000000ff0800720c */
/* 0x000fe40003f05270 */
/*0d60*/ IADD3 R4, P2, R4, 0x10, RZ ; /* 0x0000001004047810 */
/* 0x001fe40007f5e0ff */
/*0d70*/ IADD3 R2, P1, R2, 0x10, RZ ; /* 0x0000001002027810 */
/* 0x002fe40007f3e0ff */
/*0d80*/ IADD3.X R5, RZ, R5, RZ, P2, !PT ; /* 0x00000005ff057210 */
/* 0x000fc600017fe4ff */
/*0d90*/ IMAD.X R3, RZ, RZ, R3, P1 ; /* 0x000000ffff037224 */
/* 0x000fe400008e0603 */
/*0da0*/ IMAD.IADD R10, R11, 0x1, -R10 ; /* 0x000000010b0a7824 */
/* 0x004fca00078e0a0a */
/*0db0*/ IABS R10, R10 ; /* 0x0000000a000a7213 */
/* 0x000fe40000000000 */
/*0dc0*/ IADD3 R12, -R12, R13, RZ ; /* 0x0000000d0c0c7210 */
/* 0x008fc80007ffe1ff */
/*0dd0*/ I2F R10, R10 ; /* 0x0000000a000a7306 */
/* 0x000e220000201400 */
/*0de0*/ IABS R11, R12 ; /* 0x0000000c000b7213 */
/* 0x000fe20000000000 */
/*0df0*/ IMAD.IADD R14, R15, 0x1, -R14 ; /* 0x000000010f0e7824 */
/* 0x010fcc00078e0a0e */
/*0e00*/ I2F R11, R11 ; /* 0x0000000b000b7306 */
/* 0x000e620000201400 */
/*0e10*/ IABS R13, R14 ; /* 0x0000000e000d7213 */
/* 0x000fe20000000000 */
/*0e20*/ IMAD.IADD R16, R17, 0x1, -R16 ; /* 0x0000000111107824 */
/* 0x020fcc00078e0a10 */
/*0e30*/ I2F R13, R13 ; /* 0x0000000d000d7306 */
/* 0x000ea20000201400 */
/*0e40*/ FADD R10, R10, R9 ; /* 0x000000090a0a7221 */
/* 0x001fe20000000000 */
/*0e50*/ IABS R15, R16 ; /* 0x00000010000f7213 */
/* 0x000fcc0000000000 */
/*0e60*/ I2F R15, R15 ; /* 0x0000000f000f7306 */
/* 0x000e220000201400 */
/*0e70*/ FADD R10, R10, R11 ; /* 0x0000000b0a0a7221 */
/* 0x002fc80000000000 */
/*0e80*/ FADD R10, R10, R13 ; /* 0x0000000d0a0a7221 */
/* 0x004fc80000000000 */
/*0e90*/ FADD R9, R10, R15 ; /* 0x0000000f0a097221 */
/* 0x001fe20000000000 */
/*0ea0*/ @P0 BRA 0xcb0 ; /* 0xfffffe0000000947 */
/* 0x000fea000383ffff */
/*0eb0*/ ISETP.NE.AND P0, PT, R6, RZ, PT ; /* 0x000000ff0600720c */
/* 0x000fda0003f05270 */
/*0ec0*/ @!P0 BRA 0x1020 ; /* 0x0000015000008947 */
/* 0x000fea0003800000 */
/*0ed0*/ IMAD.MOV.U32 R5, RZ, RZ, 0x4 ; /* 0x00000004ff057424 */
/* 0x000fe400078e00ff */
/*0ee0*/ IMAD R4, R0, c[0x0][0x17c], R7 ; /* 0x00005f0000047a24 */
/* 0x000fe400078e0207 */
/*0ef0*/ IMAD.WIDE R2, R7, R5, c[0x0][0x170] ; /* 0x00005c0007027625 */
/* 0x000fc800078e0205 */
/*0f00*/ IMAD.WIDE R4, R4, R5, c[0x0][0x160] ; /* 0x0000580004047625 */
/* 0x000fe200078e0205 */
/*0f10*/ MOV R10, R2 ; /* 0x00000002000a7202 */
/* 0x000fc60000000f00 */
/*0f20*/ IMAD.MOV.U32 R11, RZ, RZ, R5 ; /* 0x000000ffff0b7224 */
/* 0x000fc800078e0005 */
/*0f30*/ IMAD.MOV.U32 R2, RZ, RZ, R10 ; /* 0x000000ffff027224 */
/* 0x000fe200078e000a */
/*0f40*/ MOV R5, R11 ; /* 0x0000000b00057202 */
/* 0x000fca0000000f00 */
/*0f50*/ LDG.E R2, [R2.64] ; /* 0x0000000402027981 */
/* 0x0000a8000c1e1900 */
/*0f60*/ LDG.E R5, [R4.64] ; /* 0x0000000404057981 */
/* 0x0002a2000c1e1900 */
/*0f70*/ IADD3 R6, R6, -0x1, RZ ; /* 0xffffffff06067810 */
/* 0x000fe40007ffe0ff */
/*0f80*/ IADD3 R10, P1, R10, 0x4, RZ ; /* 0x000000040a0a7810 */
/* 0x000fe40007f3e0ff */
/*0f90*/ ISETP.NE.AND P0, PT, R6, RZ, PT ; /* 0x000000ff0600720c */
/* 0x000fc60003f05270 */
/*0fa0*/ IMAD.X R3, RZ, RZ, R3, P1 ; /* 0x000000ffff037224 */
/* 0x001fe200008e0603 */
/*0fb0*/ IADD3 R4, P2, R4, 0x4, RZ ; /* 0x0000000404047810 */
/* 0x002fc80007f5e0ff */
/*0fc0*/ IADD3.X R11, RZ, R11, RZ, P2, !PT ; /* 0x0000000bff0b7210 */
/* 0x000fe200017fe4ff */
/*0fd0*/ IMAD.IADD R7, R5, 0x1, -R2 ; /* 0x0000000105077824 */
/* 0x004fca00078e0a02 */
/*0fe0*/ IABS R8, R7 ; /* 0x0000000700087213 */
/* 0x000fcc0000000000 */
/*0ff0*/ I2F R8, R8 ; /* 0x0000000800087306 */
/* 0x000e240000201400 */
/*1000*/ FADD R9, R8, R9 ; /* 0x0000000908097221 */
/* 0x001fe20000000000 */
/*1010*/ @P0 BRA 0xf30 ; /* 0xffffff1000000947 */
/* 0x000fea000383ffff */
/*1020*/ IMAD.MOV.U32 R3, RZ, RZ, 0x4 ; /* 0x00000004ff037424 */
/* 0x000fc800078e00ff */
/*1030*/ IMAD.WIDE R2, R0, R3, c[0x0][0x168] ; /* 0x00005a0000027625 */
/* 0x000fca00078e0203 */
/*1040*/ STG.E [R2.64], R9 ; /* 0x0000000902007986 */
/* 0x000fe2000c101904 */
/*1050*/ EXIT ; /* 0x000000000000794d */
/* 0x000fea0003800000 */
/*1060*/ BRA 0x1060; /* 0xfffffff000007947 */
/* 0x000fc0000383ffff */
/*1070*/ NOP; /* 0x0000000000007918 */
/* 0x000fc00000000000 */
/*1080*/ NOP; /* 0x0000000000007918 */
/* 0x000fc00000000000 */
/*1090*/ NOP; /* 0x0000000000007918 */
/* 0x000fc00000000000 */
/*10a0*/ NOP; /* 0x0000000000007918 */
/* 0x000fc00000000000 */
/*10b0*/ NOP; /* 0x0000000000007918 */
/* 0x000fc00000000000 */
/*10c0*/ NOP; /* 0x0000000000007918 */
/* 0x000fc00000000000 */
/*10d0*/ NOP; /* 0x0000000000007918 */
/* 0x000fc00000000000 */
/*10e0*/ NOP; /* 0x0000000000007918 */
/* 0x000fc00000000000 */
/*10f0*/ NOP; /* 0x0000000000007918 */
/* 0x000fc00000000000 */
.......... | .text
.amdgcn_target "amdgcn-amd-amdhsa--gfx1100"
.protected _Z12gpu_distancePiPfS_ii
.globl _Z12gpu_distancePiPfS_ii
.p2align 8
.type _Z12gpu_distancePiPfS_ii,@function
_Z12gpu_distancePiPfS_ii:
s_clause 0x1
s_load_b32 s2, s[0:1], 0x2c
s_load_b32 s3, s[0:1], 0x18
s_waitcnt lgkmcnt(0)
s_and_b32 s2, s2, 0xffff
s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
v_mad_u64_u32 v[1:2], null, s15, s2, v[0:1]
s_mov_b32 s2, exec_lo
v_cmpx_gt_i32_e64 s3, v1
s_cbranch_execz .LBB0_6
s_load_b32 s4, s[0:1], 0x1c
s_waitcnt lgkmcnt(0)
s_cmp_lt_i32 s4, 1
s_cbranch_scc1 .LBB0_4
s_clause 0x1
s_load_b64 s[6:7], s[0:1], 0x0
s_load_b64 s[2:3], s[0:1], 0x10
v_mul_lo_u32 v2, v1, s4
v_mov_b32_e32 v0, 0
s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
v_ashrrev_i32_e32 v3, 31, v2
v_lshlrev_b64 v[2:3], 2, v[2:3]
s_waitcnt lgkmcnt(0)
s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_2)
v_add_co_u32 v2, vcc_lo, s6, v2
v_add_co_ci_u32_e32 v3, vcc_lo, s7, v3, vcc_lo
.p2align 6
.LBB0_3:
global_load_b32 v4, v[2:3], off
s_load_b32 s5, s[2:3], 0x0
v_add_co_u32 v2, vcc_lo, v2, 4
s_add_i32 s4, s4, -1
v_add_co_ci_u32_e32 v3, vcc_lo, 0, v3, vcc_lo
s_add_u32 s2, s2, 4
s_addc_u32 s3, s3, 0
s_cmp_eq_u32 s4, 0
s_waitcnt vmcnt(0) lgkmcnt(0)
v_subrev_nc_u32_e32 v4, s5, v4
s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
v_sub_nc_u32_e32 v5, 0, v4
v_max_i32_e32 v4, v4, v5
s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
v_cvt_f32_i32_e32 v4, v4
v_add_f32_e32 v0, v0, v4
s_cbranch_scc0 .LBB0_3
s_branch .LBB0_5
.LBB0_4:
v_mov_b32_e32 v0, 0
.LBB0_5:
s_load_b64 s[0:1], s[0:1], 0x8
v_ashrrev_i32_e32 v2, 31, v1
s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
v_lshlrev_b64 v[1:2], 2, v[1:2]
s_waitcnt lgkmcnt(0)
v_add_co_u32 v1, vcc_lo, s0, v1
s_delay_alu instid0(VALU_DEP_2)
v_add_co_ci_u32_e32 v2, vcc_lo, s1, v2, vcc_lo
global_store_b32 v[1:2], v0, off
.LBB0_6:
s_nop 0
s_sendmsg sendmsg(MSG_DEALLOC_VGPRS)
s_endpgm
.section .rodata,"a",@progbits
.p2align 6, 0x0
.amdhsa_kernel _Z12gpu_distancePiPfS_ii
.amdhsa_group_segment_fixed_size 0
.amdhsa_private_segment_fixed_size 0
.amdhsa_kernarg_size 288
.amdhsa_user_sgpr_count 15
.amdhsa_user_sgpr_dispatch_ptr 0
.amdhsa_user_sgpr_queue_ptr 0
.amdhsa_user_sgpr_kernarg_segment_ptr 1
.amdhsa_user_sgpr_dispatch_id 0
.amdhsa_user_sgpr_private_segment_size 0
.amdhsa_wavefront_size32 1
.amdhsa_uses_dynamic_stack 0
.amdhsa_enable_private_segment 0
.amdhsa_system_sgpr_workgroup_id_x 1
.amdhsa_system_sgpr_workgroup_id_y 0
.amdhsa_system_sgpr_workgroup_id_z 0
.amdhsa_system_sgpr_workgroup_info 0
.amdhsa_system_vgpr_workitem_id 0
.amdhsa_next_free_vgpr 6
.amdhsa_next_free_sgpr 16
.amdhsa_float_round_mode_32 0
.amdhsa_float_round_mode_16_64 0
.amdhsa_float_denorm_mode_32 3
.amdhsa_float_denorm_mode_16_64 3
.amdhsa_dx10_clamp 1
.amdhsa_ieee_mode 1
.amdhsa_fp16_overflow 0
.amdhsa_workgroup_processor_mode 1
.amdhsa_memory_ordered 1
.amdhsa_forward_progress 0
.amdhsa_shared_vgpr_count 0
.amdhsa_exception_fp_ieee_invalid_op 0
.amdhsa_exception_fp_denorm_src 0
.amdhsa_exception_fp_ieee_div_zero 0
.amdhsa_exception_fp_ieee_overflow 0
.amdhsa_exception_fp_ieee_underflow 0
.amdhsa_exception_fp_ieee_inexact 0
.amdhsa_exception_int_div_zero 0
.end_amdhsa_kernel
.text
.Lfunc_end0:
.size _Z12gpu_distancePiPfS_ii, .Lfunc_end0-_Z12gpu_distancePiPfS_ii
.section .AMDGPU.csdata,"",@progbits
.text
.p2alignl 7, 3214868480
.fill 96, 4, 3214868480
.type __hip_cuid_,@object
.section .bss,"aw",@nobits
.globl __hip_cuid_
__hip_cuid_:
.byte 0
.size __hip_cuid_, 1
.ident "AMD clang version 18.0.0git (https://github.com/RadeonOpenCompute/llvm-project roc-6.3.2 25012 e5bf7e55c91490b07c49d8960fa7983d864936c4)"
.section ".note.GNU-stack","",@progbits
.addrsig
.addrsig_sym __hip_cuid_
.amdgpu_metadata
---
amdhsa.kernels:
- .args:
- .address_space: global
.offset: 0
.size: 8
.value_kind: global_buffer
- .address_space: global
.offset: 8
.size: 8
.value_kind: global_buffer
- .address_space: global
.offset: 16
.size: 8
.value_kind: global_buffer
- .offset: 24
.size: 4
.value_kind: by_value
- .offset: 28
.size: 4
.value_kind: by_value
- .offset: 32
.size: 4
.value_kind: hidden_block_count_x
- .offset: 36
.size: 4
.value_kind: hidden_block_count_y
- .offset: 40
.size: 4
.value_kind: hidden_block_count_z
- .offset: 44
.size: 2
.value_kind: hidden_group_size_x
- .offset: 46
.size: 2
.value_kind: hidden_group_size_y
- .offset: 48
.size: 2
.value_kind: hidden_group_size_z
- .offset: 50
.size: 2
.value_kind: hidden_remainder_x
- .offset: 52
.size: 2
.value_kind: hidden_remainder_y
- .offset: 54
.size: 2
.value_kind: hidden_remainder_z
- .offset: 72
.size: 8
.value_kind: hidden_global_offset_x
- .offset: 80
.size: 8
.value_kind: hidden_global_offset_y
- .offset: 88
.size: 8
.value_kind: hidden_global_offset_z
- .offset: 96
.size: 2
.value_kind: hidden_grid_dims
.group_segment_fixed_size: 0
.kernarg_segment_align: 8
.kernarg_segment_size: 288
.language: OpenCL C
.language_version:
- 2
- 0
.max_flat_workgroup_size: 1024
.name: _Z12gpu_distancePiPfS_ii
.private_segment_fixed_size: 0
.sgpr_count: 18
.sgpr_spill_count: 0
.symbol: _Z12gpu_distancePiPfS_ii.kd
.uniform_work_group_size: 1
.uses_dynamic_stack: false
.vgpr_count: 6
.vgpr_spill_count: 0
.wavefront_size: 32
.workgroup_processor_mode: 1
amdhsa.target: amdgcn-amd-amdhsa--gfx1100
amdhsa.version:
- 1
- 2
...
.end_amdgpu_metadata |
You are a helpful coding assistant specialized in converting from CUDA host assembly to AMD host assembly. | .file "tmpxft_0007a00a_00000000-6_gpu_distance.cudafe1.cpp"
.text
#APP
#NO_APP
.type _ZL26__cudaUnregisterBinaryUtilv, @function
_ZL26__cudaUnregisterBinaryUtilv:
.LFB2029:
.cfi_startproc
endbr64
subq $8, %rsp
.cfi_def_cfa_offset 16
movq _ZL20__cudaFatCubinHandle(%rip), %rdi
call __cudaUnregisterFatBinary@PLT
addq $8, %rsp
.cfi_def_cfa_offset 8
ret
.cfi_endproc
.LFE2029:
.size _ZL26__cudaUnregisterBinaryUtilv, .-_ZL26__cudaUnregisterBinaryUtilv
.globl _Z38__device_stub__Z12gpu_distancePiPfS_iiPiPfS_ii
.type _Z38__device_stub__Z12gpu_distancePiPfS_iiPiPfS_ii, @function
_Z38__device_stub__Z12gpu_distancePiPfS_iiPiPfS_ii:
.LFB2051:
.cfi_startproc
endbr64
subq $152, %rsp
.cfi_def_cfa_offset 160
movq %rdi, 24(%rsp)
movq %rsi, 16(%rsp)
movq %rdx, 8(%rsp)
movl %ecx, 4(%rsp)
movl %r8d, (%rsp)
movq %fs:40, %rax
movq %rax, 136(%rsp)
xorl %eax, %eax
leaq 24(%rsp), %rax
movq %rax, 96(%rsp)
leaq 16(%rsp), %rax
movq %rax, 104(%rsp)
leaq 8(%rsp), %rax
movq %rax, 112(%rsp)
leaq 4(%rsp), %rax
movq %rax, 120(%rsp)
movq %rsp, %rax
movq %rax, 128(%rsp)
movl $1, 48(%rsp)
movl $1, 52(%rsp)
movl $1, 56(%rsp)
movl $1, 60(%rsp)
movl $1, 64(%rsp)
movl $1, 68(%rsp)
leaq 40(%rsp), %rcx
leaq 32(%rsp), %rdx
leaq 60(%rsp), %rsi
leaq 48(%rsp), %rdi
call __cudaPopCallConfiguration@PLT
testl %eax, %eax
je .L7
.L3:
movq 136(%rsp), %rax
subq %fs:40, %rax
jne .L8
addq $152, %rsp
.cfi_remember_state
.cfi_def_cfa_offset 8
ret
.L7:
.cfi_restore_state
pushq 40(%rsp)
.cfi_def_cfa_offset 168
pushq 40(%rsp)
.cfi_def_cfa_offset 176
leaq 112(%rsp), %r9
movq 76(%rsp), %rcx
movl 84(%rsp), %r8d
movq 64(%rsp), %rsi
movl 72(%rsp), %edx
leaq _Z12gpu_distancePiPfS_ii(%rip), %rdi
call cudaLaunchKernel@PLT
addq $16, %rsp
.cfi_def_cfa_offset 160
jmp .L3
.L8:
call __stack_chk_fail@PLT
.cfi_endproc
.LFE2051:
.size _Z38__device_stub__Z12gpu_distancePiPfS_iiPiPfS_ii, .-_Z38__device_stub__Z12gpu_distancePiPfS_iiPiPfS_ii
.globl _Z12gpu_distancePiPfS_ii
.type _Z12gpu_distancePiPfS_ii, @function
_Z12gpu_distancePiPfS_ii:
.LFB2052:
.cfi_startproc
endbr64
subq $8, %rsp
.cfi_def_cfa_offset 16
call _Z38__device_stub__Z12gpu_distancePiPfS_iiPiPfS_ii
addq $8, %rsp
.cfi_def_cfa_offset 8
ret
.cfi_endproc
.LFE2052:
.size _Z12gpu_distancePiPfS_ii, .-_Z12gpu_distancePiPfS_ii
.section .rodata.str1.1,"aMS",@progbits,1
.LC0:
.string "_Z12gpu_distancePiPfS_ii"
.text
.type _ZL24__sti____cudaRegisterAllv, @function
_ZL24__sti____cudaRegisterAllv:
.LFB2054:
.cfi_startproc
endbr64
subq $8, %rsp
.cfi_def_cfa_offset 16
leaq _ZL15__fatDeviceText(%rip), %rdi
call __cudaRegisterFatBinary@PLT
movq %rax, %rdi
movq %rax, _ZL20__cudaFatCubinHandle(%rip)
pushq $0
.cfi_def_cfa_offset 24
pushq $0
.cfi_def_cfa_offset 32
pushq $0
.cfi_def_cfa_offset 40
pushq $0
.cfi_def_cfa_offset 48
movl $0, %r9d
movl $-1, %r8d
leaq .LC0(%rip), %rdx
movq %rdx, %rcx
leaq _Z12gpu_distancePiPfS_ii(%rip), %rsi
call __cudaRegisterFunction@PLT
addq $32, %rsp
.cfi_def_cfa_offset 16
movq _ZL20__cudaFatCubinHandle(%rip), %rdi
call __cudaRegisterFatBinaryEnd@PLT
leaq _ZL26__cudaUnregisterBinaryUtilv(%rip), %rdi
call atexit@PLT
addq $8, %rsp
.cfi_def_cfa_offset 8
ret
.cfi_endproc
.LFE2054:
.size _ZL24__sti____cudaRegisterAllv, .-_ZL24__sti____cudaRegisterAllv
.section .init_array,"aw"
.align 8
.quad _ZL24__sti____cudaRegisterAllv
.section .nvFatBinSegment,"aw"
.align 8
.type _ZL15__fatDeviceText, @object
.size _ZL15__fatDeviceText, 24
_ZL15__fatDeviceText:
.long 1180844977
.long 1
.quad fatbinData
.quad 0
.local _ZL20__cudaFatCubinHandle
.comm _ZL20__cudaFatCubinHandle,8,8
.ident "GCC: (Ubuntu 13.3.0-6ubuntu2~24.04) 13.3.0"
.section .note.GNU-stack,"",@progbits
.section .note.gnu.property,"a"
.align 8
.long 1f - 0f
.long 4f - 1f
.long 5
0:
.string "GNU"
1:
.align 8
.long 0xc0000002
.long 3f - 2f
2:
.long 0x3
3:
.align 8
4: | .text
.file "gpu_distance.hip"
.globl _Z27__device_stub__gpu_distancePiPfS_ii # -- Begin function _Z27__device_stub__gpu_distancePiPfS_ii
.p2align 4, 0x90
.type _Z27__device_stub__gpu_distancePiPfS_ii,@function
_Z27__device_stub__gpu_distancePiPfS_ii: # @_Z27__device_stub__gpu_distancePiPfS_ii
.cfi_startproc
# %bb.0:
subq $120, %rsp
.cfi_def_cfa_offset 128
movq %rdi, 72(%rsp)
movq %rsi, 64(%rsp)
movq %rdx, 56(%rsp)
movl %ecx, 4(%rsp)
movl %r8d, (%rsp)
leaq 72(%rsp), %rax
movq %rax, 80(%rsp)
leaq 64(%rsp), %rax
movq %rax, 88(%rsp)
leaq 56(%rsp), %rax
movq %rax, 96(%rsp)
leaq 4(%rsp), %rax
movq %rax, 104(%rsp)
movq %rsp, %rax
movq %rax, 112(%rsp)
leaq 40(%rsp), %rdi
leaq 24(%rsp), %rsi
leaq 16(%rsp), %rdx
leaq 8(%rsp), %rcx
callq __hipPopCallConfiguration
movq 40(%rsp), %rsi
movl 48(%rsp), %edx
movq 24(%rsp), %rcx
movl 32(%rsp), %r8d
leaq 80(%rsp), %r9
movl $_Z12gpu_distancePiPfS_ii, %edi
pushq 8(%rsp)
.cfi_adjust_cfa_offset 8
pushq 24(%rsp)
.cfi_adjust_cfa_offset 8
callq hipLaunchKernel
addq $136, %rsp
.cfi_adjust_cfa_offset -136
retq
.Lfunc_end0:
.size _Z27__device_stub__gpu_distancePiPfS_ii, .Lfunc_end0-_Z27__device_stub__gpu_distancePiPfS_ii
.cfi_endproc
# -- End function
.p2align 4, 0x90 # -- Begin function __hip_module_ctor
.type __hip_module_ctor,@function
__hip_module_ctor: # @__hip_module_ctor
.cfi_startproc
# %bb.0:
subq $40, %rsp
.cfi_def_cfa_offset 48
cmpq $0, __hip_gpubin_handle(%rip)
jne .LBB1_2
# %bb.1:
movl $__hip_fatbin_wrapper, %edi
callq __hipRegisterFatBinary
movq %rax, __hip_gpubin_handle(%rip)
.LBB1_2:
movq __hip_gpubin_handle(%rip), %rdi
xorps %xmm0, %xmm0
movups %xmm0, 16(%rsp)
movups %xmm0, (%rsp)
movl $_Z12gpu_distancePiPfS_ii, %esi
movl $.L__unnamed_1, %edx
movl $.L__unnamed_1, %ecx
movl $-1, %r8d
xorl %r9d, %r9d
callq __hipRegisterFunction
movl $__hip_module_dtor, %edi
addq $40, %rsp
.cfi_def_cfa_offset 8
jmp atexit # TAILCALL
.Lfunc_end1:
.size __hip_module_ctor, .Lfunc_end1-__hip_module_ctor
.cfi_endproc
# -- End function
.p2align 4, 0x90 # -- Begin function __hip_module_dtor
.type __hip_module_dtor,@function
__hip_module_dtor: # @__hip_module_dtor
.cfi_startproc
# %bb.0:
movq __hip_gpubin_handle(%rip), %rdi
testq %rdi, %rdi
je .LBB2_2
# %bb.1:
pushq %rax
.cfi_def_cfa_offset 16
callq __hipUnregisterFatBinary
movq $0, __hip_gpubin_handle(%rip)
addq $8, %rsp
.cfi_def_cfa_offset 8
.LBB2_2:
retq
.Lfunc_end2:
.size __hip_module_dtor, .Lfunc_end2-__hip_module_dtor
.cfi_endproc
# -- End function
.type _Z12gpu_distancePiPfS_ii,@object # @_Z12gpu_distancePiPfS_ii
.section .rodata,"a",@progbits
.globl _Z12gpu_distancePiPfS_ii
.p2align 3, 0x0
_Z12gpu_distancePiPfS_ii:
.quad _Z27__device_stub__gpu_distancePiPfS_ii
.size _Z12gpu_distancePiPfS_ii, 8
.type .L__unnamed_1,@object # @0
.section .rodata.str1.1,"aMS",@progbits,1
.L__unnamed_1:
.asciz "_Z12gpu_distancePiPfS_ii"
.size .L__unnamed_1, 25
.type __hip_fatbin_wrapper,@object # @__hip_fatbin_wrapper
.section .hipFatBinSegment,"a",@progbits
.p2align 3, 0x0
__hip_fatbin_wrapper:
.long 1212764230 # 0x48495046
.long 1 # 0x1
.quad __hip_fatbin
.quad 0
.size __hip_fatbin_wrapper, 24
.type __hip_gpubin_handle,@object # @__hip_gpubin_handle
.local __hip_gpubin_handle
.comm __hip_gpubin_handle,8,8
.section .init_array,"aw",@init_array
.p2align 3, 0x0
.quad __hip_module_ctor
.type __hip_cuid_,@object # @__hip_cuid_
.bss
.globl __hip_cuid_
__hip_cuid_:
.byte 0 # 0x0
.size __hip_cuid_, 1
.section ".linker-options","e",@llvm_linker_options
.ident "AMD clang version 18.0.0git (https://github.com/RadeonOpenCompute/llvm-project roc-6.3.2 25012 e5bf7e55c91490b07c49d8960fa7983d864936c4)"
.section ".note.GNU-stack","",@progbits
.addrsig
.addrsig_sym _Z27__device_stub__gpu_distancePiPfS_ii
.addrsig_sym __hip_module_ctor
.addrsig_sym __hip_module_dtor
.addrsig_sym _Z12gpu_distancePiPfS_ii
.addrsig_sym __hip_fatbin
.addrsig_sym __hip_fatbin_wrapper
.addrsig_sym __hip_cuid_ |
You are a helpful coding assistant specialized in converting CUDA source code to CUDA device assembly. | #include <cuda_runtime.h>
#include <device_launch_parameters.h>
#include <cuda.h>
#include <iostream>
#include <stdio.h>
#include <stdlib.h>
#include <stdint.h>
#include <string.h>
#include <ctype.h>
#define MAX_SAVES 1000
#define QTD_NUMBERS 3
#define gpuErrchk(ans) { gpuAssert((ans), __FILE__, __LINE__); }
inline void gpuAssert(cudaError_t code, const char *file, int line, bool abort=true)
{
if (code != cudaSuccess)
{
fprintf(stderr,"GPUassert: %s %s %d\n", cudaGetErrorString(code), file, line);
if (abort) exit(code);
}
}
__global__
void GenSeq(uint32_t *divs, uint8_t*arr, uint32_t arrSize, uint32_t* index, uint32_t MAXgTid){
uint32_t ThrPerBlk = blockDim.x;
uint32_t MYbid = blockIdx.x;
uint32_t MYtid = threadIdx.x;
uint32_t MYgtid = ThrPerBlk * MYbid + MYtid;
uint8_t i;
// uint32_t qtdNumbers = sizeof(divs) - 1;
//uint8_t tempArr[qtd_numbers];
uint32_t offset = MYgtid * QTD_NUMBERS;
// printf("ThrPerBlk: %u, Mybid: %u, Mytid: %d, Mygtid: %u, offset: %u\n", ThrPerBlk, MYbid, MYtid, ThrPerBlk * MYbid + MYtid, offset);
if(offset >= MAXgTid)
return;
uint8_t tempArr[QTD_NUMBERS];
for(i = 0; i < QTD_NUMBERS; i++){
tempArr[i] = (MYgtid % divs[i]) / divs[i + 1];
}
uint32_t currIndex = atomicAdd(index, QTD_NUMBERS);
if(currIndex > MAX_SAVES)
return;
printf("ThrPerBlk: %u, Mybid: %u, Mytid: %d, Mygtid: %u, offset: %u, currIndex: %u\n", ThrPerBlk, MYbid, MYtid, MYgtid, offset, currIndex);
for(i = 0; i < QTD_NUMBERS; i++){
arr[currIndex] = tempArr[i];
currIndex++;
}
}
int main(){
cudaError_t cudaStatus;
cudaEvent_t time1, time2, time3;
float totalTime, kernelExecutionTime, tfrGPUtoCPU;
uint32_t ThrPerBlk = 32, NumBlocks = 0;
int NumGPUs = 0; cudaGetDeviceCount(&NumGPUs);
if (NumGPUs == 0){
std::cout << "\nNo CUDA Device is available\n";
exit(EXIT_FAILURE);
}
uint32_t i = 0;
uint32_t possibilities = 1;
uint8_t numbers[] = {3,3,3};
// uint8_t qtd_numbers = sizeof(numbers);
for(i = 0; i < QTD_NUMBERS; i++){
possibilities *= numbers[i];
}
uint32_t divs[QTD_NUMBERS + 1];
divs[0] = possibilities;
for(i = 0; i < QTD_NUMBERS; i++){
divs[i + 1] = divs[i] / numbers[i];
}
for(i = 0; i < QTD_NUMBERS + 1; i++){ //DEBUG
std::cout << divs[i] << ", ";
}
std::cout << std::endl;
// uint32_t arrSize = possibilities * QTD_NUMBERS * sizeof(uint8_t);
uint32_t MAXgTid = possibilities * QTD_NUMBERS * sizeof(uint8_t);
uint32_t arrSize = ((MAX_SAVES + QTD_NUMBERS -1) / QTD_NUMBERS) * QTD_NUMBERS;
std::cout << "arrSize: " << arrSize << std::endl; //DEBUG
uint8_t* sequencies = (uint8_t*)malloc(arrSize);
uint32_t* GPUcont = nullptr;
uint32_t* GPUdivs = nullptr;
uint8_t* GPUsequencies = nullptr;
NumBlocks = (possibilities + ThrPerBlk - 1) / ThrPerBlk;
std::cout << "NumBlocks: " << NumBlocks << ", ThrPerBlk: " << ThrPerBlk << std::endl; // debug
// getchar();
cudaEventCreate(&time1);
cudaEventCreate(&time2);
cudaEventCreate(&time3);
cudaEventRecord(time1, 0);
gpuErrchk(cudaMalloc((void **)&GPUcont, sizeof(uint32_t)));
gpuErrchk(cudaMemset(GPUcont, 0, sizeof(uint32_t)));
gpuErrchk(cudaMalloc((void **)&GPUsequencies, arrSize));
gpuErrchk(cudaMalloc((void **)&GPUdivs, (QTD_NUMBERS + 1) * sizeof(uint32_t)));
gpuErrchk(cudaMemcpy(GPUdivs, divs, (QTD_NUMBERS + 1) * sizeof(uint32_t), cudaMemcpyHostToDevice));
GenSeq <<< NumBlocks, ThrPerBlk >>> (GPUdivs, GPUsequencies, arrSize, GPUcont, MAXgTid);
gpuErrchk(cudaDeviceSynchronize());
cudaEventRecord(time2, 0);
gpuErrchk(cudaMemcpy(sequencies, GPUsequencies, arrSize, cudaMemcpyDeviceToHost));
cudaEventRecord(time3, 0);
cudaEventSynchronize(time1); cudaEventSynchronize(time2);
cudaEventSynchronize(time3);
cudaEventElapsedTime(&totalTime, time1, time3);
cudaEventElapsedTime(&kernelExecutionTime, time1, time2);
cudaEventElapsedTime(&tfrGPUtoCPU, time2, time3);
gpuErrchk(cudaDeviceSynchronize());
for(i = 0; i < arrSize; i++){
if(i % QTD_NUMBERS == 0)
std::cout << std::endl;
else
std::cout << ", ";
std::cout << int(sequencies[i]);
}
printf("\n\n-------------------- ... ----------------------------\n");
printf("Kernel Execution = %5.2f ms\n", kernelExecutionTime);
printf("GPU->CPU Transfer = %5.2f ms ... %4d MB ... %6.2f GB/s\n", tfrGPUtoCPU, arrSize / 1024 / 1024,
(float)arrSize / (tfrGPUtoCPU * 1024.0 * 1024.0));
printf("Total time elapsed = %5.2f ms\n", totalTime);
printf("-------------------- ... ----------------------------\n");
cudaFree(GPUdivs);
cudaFree(GPUsequencies);
cudaEventDestroy(time1);
cudaEventDestroy(time2);
cudaEventDestroy(time3);
cudaStatus = cudaDeviceReset();
if (cudaStatus != cudaSuccess){
std::cout << "cudaDeviceReset failed!";
free(sequencies); exit(EXIT_FAILURE);
}
free(sequencies);
return(EXIT_SUCCESS);
} | code for sm_80
Function : _Z6GenSeqPjPhjS_j
.headerflags @"EF_CUDA_TEXMODE_UNIFIED EF_CUDA_64BIT_ADDRESS EF_CUDA_SM80 EF_CUDA_VIRTUAL_SM(EF_CUDA_SM80)"
/*0000*/ IMAD.MOV.U32 R1, RZ, RZ, c[0x0][0x28] ; /* 0x00000a00ff017624 */
/* 0x000fc800078e00ff */
/*0010*/ S2R R9, SR_CTAID.X ; /* 0x0000000000097919 */
/* 0x000e220000002500 */
/*0020*/ IADD3 R1, R1, -0x18, RZ ; /* 0xffffffe801017810 */
/* 0x000fc60007ffe0ff */
/*0030*/ S2R R16, SR_TID.X ; /* 0x0000000000107919 */
/* 0x000e240000002100 */
/*0040*/ IMAD R17, R9, c[0x0][0x0], R16 ; /* 0x0000000009117a24 */
/* 0x001fc800078e0210 */
/*0050*/ IMAD R18, R17, 0x3, RZ ; /* 0x0000000311127824 */
/* 0x000fca00078e02ff */
/*0060*/ ISETP.GE.U32.AND P0, PT, R18, c[0x0][0x180], PT ; /* 0x0000600012007a0c */
/* 0x000fda0003f06070 */
/*0070*/ @P0 EXIT ; /* 0x000000000000094d */
/* 0x000fea0003800000 */
/*0080*/ S2R R3, SR_LANEID ; /* 0x0000000000037919 */
/* 0x000e220000000000 */
/*0090*/ VOTEU.ANY UR4, UPT, PT ; /* 0x0000000000047886 */
/* 0x000fe200038e0100 */
/*00a0*/ IMAD.MOV.U32 R2, RZ, RZ, c[0x0][0x160] ; /* 0x00005800ff027624 */
/* 0x000fe200078e00ff */
/*00b0*/ FLO.U32 R8, UR4 ; /* 0x0000000400087d00 */
/* 0x000e2200080e0000 */
/*00c0*/ IMAD.MOV.U32 R5, RZ, RZ, c[0x0][0x17c] ; /* 0x00005f00ff057624 */
/* 0x000fe200078e00ff */
/*00d0*/ ULDC.64 UR36, c[0x0][0x118] ; /* 0x0000460000247ab9 */
/* 0x000fe20000000a00 */
/*00e0*/ IMAD.MOV.U32 R4, RZ, RZ, c[0x0][0x178] ; /* 0x00005e00ff047624 */
/* 0x000fca00078e00ff */
/*00f0*/ POPC R0, UR4 ; /* 0x0000000400007d09 */
/* 0x000e620008000000 */
/*0100*/ ISETP.EQ.U32.AND P0, PT, R8, R3, PT ; /* 0x000000030800720c */
/* 0x001fe20003f02070 */
/*0110*/ IMAD.MOV.U32 R3, RZ, RZ, c[0x0][0x164] ; /* 0x00005900ff037624 */
/* 0x000fe400078e00ff */
/*0120*/ IMAD R7, R0, 0x3, RZ ; /* 0x0000000300077824 */
/* 0x002fc600078e02ff */
/*0130*/ LDG.E R22, [R2.64] ; /* 0x0000002402167981 */
/* 0x000168000c1e1900 */
/*0140*/ LDG.E R24, [R2.64+0x4] ; /* 0x0000042402187981 */
/* 0x000168000c1e1900 */
/*0150*/ LDG.E R26, [R2.64+0x8] ; /* 0x00000824021a7981 */
/* 0x000168000c1e1900 */
/*0160*/ LDG.E R23, [R2.64+0xc] ; /* 0x00000c2402177981 */
/* 0x000168000c1e1900 */
/*0170*/ @P0 ATOMG.E.ADD.STRONG.GPU PT, R5, [R4.64], R7 ; /* 0x00000007040509a8 */
/* 0x000ea200081ee1e4 */
/*0180*/ IADD3 R6, P1, R1, c[0x0][0x20], RZ ; /* 0x0000080001067a10 */
/* 0x000fc60007f3e0ff */
/*0190*/ S2R R0, SR_LTMASK ; /* 0x0000000000007919 */
/* 0x000e640000003900 */
/*01a0*/ LOP3.LUT R0, R0, UR4, RZ, 0xc0, !PT ; /* 0x0000000400007c12 */
/* 0x002fcc000f8ec0ff */
/*01b0*/ POPC R0, R0 ; /* 0x0000000000007309 */
/* 0x000e620000000000 */
/*01c0*/ SHFL.IDX PT, R19, R5, R8, 0x1f ; /* 0x00001f0805137589 */
/* 0x004e6400000e0000 */
/*01d0*/ IMAD R19, R0, 0x3, R19 ; /* 0x0000000300137824 */
/* 0x002fca00078e0213 */
/*01e0*/ ISETP.GT.U32.AND P0, PT, R19, 0x3e8, PT ; /* 0x000003e81300780c */
/* 0x000fda0003f04070 */
/*01f0*/ @P0 EXIT ; /* 0x000000000000094d */
/* 0x000fea0003800000 */
/*0200*/ MOV R2, 0x0 ; /* 0x0000000000027802 */
/* 0x001fe20000000f00 */
/*0210*/ IMAD.MOV.U32 R8, RZ, RZ, c[0x0][0x0] ; /* 0x00000000ff087624 */
/* 0x000fe200078e00ff */
/*0220*/ STL.64 [R1+0x8], R16 ; /* 0x0000081001007387 */
/* 0x0001e20000100a00 */
/*0230*/ IMAD.X R7, RZ, RZ, c[0x0][0x24], P1 ; /* 0x00000900ff077624 */
/* 0x000fe200008e06ff */
/*0240*/ MOV R4, c[0x4][0x8] ; /* 0x0100020000047a02 */
/* 0x000fe20000000f00 */
/*0250*/ IMAD.MOV.U32 R5, RZ, RZ, c[0x4][0xc] ; /* 0x01000300ff057624 */
/* 0x000fe200078e00ff */
/*0260*/ STL.64 [R1+0x10], R18 ; /* 0x0000101201007387 */
/* 0x0001e20000100a00 */
/*0270*/ LDC.64 R2, c[0x4][R2] ; /* 0x0100000002027b82 */
/* 0x000e660000000a00 */
/*0280*/ STL.64 [R1], R8 ; /* 0x0000000801007387 */
/* 0x0001e40000100a00 */
/*0290*/ LEPC R8 ; /* 0x000000000008734e */
/* 0x001fe20000000000 */
/*02a0*/ MOV R11, 0x310 ; /* 0x00000310000b7802 */
/* 0x000fc40000000f00 */
/*02b0*/ MOV R20, 0x290 ; /* 0x0000029000147802 */
/* 0x000fe40000000f00 */
/*02c0*/ MOV R21, 0x0 ; /* 0x0000000000157802 */
/* 0x000fe40000000f00 */
/*02d0*/ MOV R0, 0x0 ; /* 0x0000000000007802 */
/* 0x000fe40000000f00 */
/*02e0*/ IADD3 R20, P0, P1, -R20, R11, R8 ; /* 0x0000000b14147210 */
/* 0x000fc8000791e108 */
/*02f0*/ IADD3.X R21, ~R0, R21, R9, P0, P1 ; /* 0x0000001500157210 */
/* 0x000fc800007e2509 */
/*0300*/ CALL.ABS.NOINC R2 ; /* 0x0000000002007343 */
/* 0x022fea0003c00000 */
/*0310*/ I2F.U32.RP R0, R22 ; /* 0x0000001600007306 */
/* 0x000e220000209000 */
/*0320*/ IMAD.MOV R11, RZ, RZ, -R22 ; /* 0x000000ffff0b7224 */
/* 0x000fe200078e0a16 */
/*0330*/ ISETP.NE.U32.AND P1, PT, R22, RZ, PT ; /* 0x000000ff1600720c */
/* 0x000fe40003f25070 */
/*0340*/ ISETP.NE.U32.AND P5, PT, R24, RZ, PT ; /* 0x000000ff1800720c */
/* 0x000fc80003fa5070 */
/*0350*/ I2F.U32.RP R8, R24 ; /* 0x0000001800087306 */
/* 0x000e700000209000 */
/*0360*/ I2F.U32.RP R9, R26 ; /* 0x0000001a00097306 */
/* 0x000eb00000209000 */
/*0370*/ MUFU.RCP R0, R0 ; /* 0x0000000000007308 */
/* 0x001e300000001000 */
/*0380*/ MUFU.RCP R8, R8 ; /* 0x0000000800087308 */
/* 0x002e700000001000 */
/*0390*/ MUFU.RCP R9, R9 ; /* 0x0000000900097308 */
/* 0x004ea20000001000 */
/*03a0*/ IADD3 R6, R0, 0xffffffe, RZ ; /* 0x0ffffffe00067810 */
/* 0x001fe20007ffe0ff */
/*03b0*/ IMAD.MOV R0, RZ, RZ, -R26 ; /* 0x000000ffff007224 */
/* 0x000fcc00078e0a1a */
/*03c0*/ F2I.FTZ.U32.TRUNC.NTZ R7, R6 ; /* 0x0000000600077305 */
/* 0x0000e2000021f000 */
/*03d0*/ IADD3 R2, R8, 0xffffffe, RZ ; /* 0x0ffffffe08027810 */
/* 0x002fce0007ffe0ff */
/*03e0*/ F2I.FTZ.U32.TRUNC.NTZ R3, R2 ; /* 0x0000000200037305 */
/* 0x000322000021f000 */
/*03f0*/ IADD3 R4, R9, 0xffffffe, RZ ; /* 0x0ffffffe09047810 */
/* 0x004fe20007ffe0ff */
/*0400*/ IMAD.MOV.U32 R6, RZ, RZ, RZ ; /* 0x000000ffff067224 */
/* 0x001fe400078e00ff */
/*0410*/ IMAD.MOV R9, RZ, RZ, -R24 ; /* 0x000000ffff097224 */
/* 0x000fc800078e0a18 */
/*0420*/ F2I.FTZ.U32.TRUNC.NTZ R5, R4 ; /* 0x0000000400057305 */
/* 0x000e22000021f000 */
/*0430*/ IMAD R11, R11, R7, RZ ; /* 0x000000070b0b7224 */
/* 0x008fe400078e02ff */
/*0440*/ IMAD.MOV.U32 R2, RZ, RZ, RZ ; /* 0x000000ffff027224 */
/* 0x002fe400078e00ff */
/*0450*/ IMAD.HI.U32 R6, R7, R11, R6 ; /* 0x0000000b07067227 */
/* 0x000fe200078e0006 */
/*0460*/ MOV R11, R0 ; /* 0x00000000000b7202 */
/* 0x000fe40000000f00 */
/*0470*/ I2F.U32.RP R7, R23 ; /* 0x0000001700077306 */
/* 0x000e620000209000 */
/*0480*/ IMAD R9, R9, R3, RZ ; /* 0x0000000309097224 */
/* 0x010fe400078e02ff */
/*0490*/ IMAD.HI.U32 R6, R6, R17, RZ ; /* 0x0000001106067227 */
/* 0x000fc800078e00ff */
/*04a0*/ IMAD.HI.U32 R2, R3, R9, R2 ; /* 0x0000000903027227 */
/* 0x000fc800078e0002 */
/*04b0*/ IMAD R11, R11, R5, RZ ; /* 0x000000050b0b7224 */
/* 0x001fe400078e02ff */
/*04c0*/ IMAD.MOV.U32 R4, RZ, RZ, RZ ; /* 0x000000ffff047224 */
/* 0x000fe400078e00ff */
/*04d0*/ IMAD.MOV R6, RZ, RZ, -R6 ; /* 0x000000ffff067224 */
/* 0x000fe200078e0a06 */
/*04e0*/ MUFU.RCP R7, R7 ; /* 0x0000000700077308 */
/* 0x002e220000001000 */
/*04f0*/ IMAD.HI.U32 R4, R5, R11, R4 ; /* 0x0000000b05047227 */
/* 0x000fc800078e0004 */
/*0500*/ IMAD R5, R22, R6, R17 ; /* 0x0000000616057224 */
/* 0x000fe400078e0211 */
/*0510*/ IMAD.HI.U32 R0, R2, R17, RZ ; /* 0x0000001102007227 */
/* 0x000fc600078e00ff */
/*0520*/ ISETP.GE.U32.AND P0, PT, R5, R22, PT ; /* 0x000000160500720c */
/* 0x000fe20003f06070 */
/*0530*/ IMAD.HI.U32 R3, R4, R17, RZ ; /* 0x0000001104037227 */
/* 0x000fc800078e00ff */
/*0540*/ IMAD.MOV R0, RZ, RZ, -R0 ; /* 0x000000ffff007224 */
/* 0x000fe400078e0a00 */
/*0550*/ IMAD.MOV R3, RZ, RZ, -R3 ; /* 0x000000ffff037224 */
/* 0x000fe400078e0a03 */
/*0560*/ IMAD R9, R24, R0, R17.reuse ; /* 0x0000000018097224 */
/* 0x100fe200078e0211 */
/*0570*/ LOP3.LUT R0, RZ, R26, RZ, 0x33, !PT ; /* 0x0000001aff007212 */
/* 0x000fe200078e33ff */
/*0580*/ IMAD R17, R26, R3, R17 ; /* 0x000000031a117224 */
/* 0x000fe200078e0211 */
/*0590*/ IADD3 R3, R7, 0xffffffe, RZ ; /* 0x0ffffffe07037810 */
/* 0x001fe20007ffe0ff */
/*05a0*/ IMAD.MOV R11, RZ, RZ, -R23 ; /* 0x000000ffff0b7224 */
/* 0x000fe200078e0a17 */
/*05b0*/ ISETP.GE.U32.AND P2, PT, R9, R24, PT ; /* 0x000000180900720c */
/* 0x000fe40003f46070 */
/*05c0*/ ISETP.GE.U32.AND P3, PT, R17, R26, PT ; /* 0x0000001a1100720c */
/* 0x000fc40003f66070 */
/*05d0*/ @P0 IADD3 R5, -R22, R5, RZ ; /* 0x0000000516050210 */
/* 0x000fe20007ffe1ff */
/*05e0*/ F2I.FTZ.U32.TRUNC.NTZ R3, R3 ; /* 0x0000000300037305 */
/* 0x000e22000021f000 */
/*05f0*/ LOP3.LUT R7, RZ, R24, RZ, 0x33, !PT ; /* 0x00000018ff077212 */
/* 0x000fe400078e33ff */
/*0600*/ ISETP.GE.U32.AND P0, PT, R5, R22, PT ; /* 0x000000160500720c */
/* 0x000fca0003f06070 */
/*0610*/ @P2 IMAD.IADD R9, R9, 0x1, -R24 ; /* 0x0000000109092824 */
/* 0x000fe400078e0a18 */
/*0620*/ @P3 IMAD.IADD R17, R17, 0x1, -R26 ; /* 0x0000000111113824 */
/* 0x000fc600078e0a1a */
/*0630*/ ISETP.GE.U32.AND P2, PT, R9, R24, PT ; /* 0x000000180900720c */
/* 0x000fe40003f46070 */
/*0640*/ ISETP.GE.U32.AND P3, PT, R17, R26, PT ; /* 0x0000001a1100720c */
/* 0x000fe20003f66070 */
/*0650*/ @P0 IMAD.IADD R5, R5, 0x1, -R22 ; /* 0x0000000105050824 */
/* 0x000fe200078e0a16 */
/*0660*/ @!P1 LOP3.LUT R5, RZ, R22, RZ, 0x33, !PT ; /* 0x00000016ff059212 */
/* 0x000fe200078e33ff */
/*0670*/ IMAD R11, R11, R3, RZ ; /* 0x000000030b0b7224 */
/* 0x001fe200078e02ff */
/*0680*/ ISETP.NE.U32.AND P0, PT, R26, RZ, PT ; /* 0x000000ff1a00720c */
/* 0x000fc60003f05070 */
/*0690*/ IMAD.HI.U32 R6, R2, R5, RZ ; /* 0x0000000502067227 */
/* 0x000fc800078e00ff */
/*06a0*/ @P2 IMAD.IADD R9, R9, 0x1, -R24 ; /* 0x0000000109092824 */
/* 0x000fe400078e0a18 */
/*06b0*/ IMAD.MOV R8, RZ, RZ, -R6 ; /* 0x000000ffff087224 */
/* 0x000fe200078e0a06 */
/*06c0*/ @P3 IADD3 R17, -R26, R17, RZ ; /* 0x000000111a113210 */
/* 0x000fe20007ffe1ff */
/*06d0*/ IMAD.MOV.U32 R2, RZ, RZ, RZ ; /* 0x000000ffff027224 */
/* 0x000fe200078e00ff */
/*06e0*/ SEL R9, R7, R9, !P5 ; /* 0x0000000907097207 */
/* 0x000fe20006800000 */
/*06f0*/ IMAD R5, R24, R8, R5 ; /* 0x0000000818057224 */
/* 0x000fe400078e0205 */
/*0700*/ IMAD.HI.U32 R3, R3, R11, R2 ; /* 0x0000000b03037227 */
/* 0x000fe200078e0002 */
/*0710*/ SEL R2, R0, R17, !P0 ; /* 0x0000001100027207 */
/* 0x000fe40004000000 */
/*0720*/ ISETP.GE.U32.AND P3, PT, R5, R24, PT ; /* 0x000000180500720c */
/* 0x000fe20003f66070 */
/*0730*/ IMAD.HI.U32 R11, R4, R9, RZ ; /* 0x00000009040b7227 */
/* 0x000fc800078e00ff */
/*0740*/ IMAD.HI.U32 R13, R3, R2, RZ ; /* 0x00000002030d7227 */
/* 0x000fc800078e00ff */
/*0750*/ IMAD.MOV R3, RZ, RZ, -R11 ; /* 0x000000ffff037224 */
/* 0x000fe400078e0a0b */
/*0760*/ IMAD.MOV R4, RZ, RZ, -R13 ; /* 0x000000ffff047224 */
/* 0x000fe400078e0a0d */
/*0770*/ IMAD R9, R26, R3, R9 ; /* 0x000000031a097224 */
/* 0x000fe200078e0209 */
/*0780*/ @P3 IADD3 R6, R6, 0x1, RZ ; /* 0x0000000106063810 */
/* 0x000fe20007ffe0ff */
/*0790*/ IMAD R2, R23, R4, R2 ; /* 0x0000000417027224 */
/* 0x000fe200078e0202 */
/*07a0*/ IADD3 R4, R19, 0x1, RZ ; /* 0x0000000113047810 */
/* 0x000fe20007ffe0ff */
/*07b0*/ @P3 IMAD.IADD R5, R5, 0x1, -R24 ; /* 0x0000000105053824 */
/* 0x000fe200078e0a18 */
/*07c0*/ ISETP.GE.U32.AND P1, PT, R9, R26, PT ; /* 0x0000001a0900720c */
/* 0x000fe40003f26070 */
/*07d0*/ ISETP.GE.U32.AND P2, PT, R2, R23, PT ; /* 0x000000170200720c */
/* 0x000fc40003f46070 */
/*07e0*/ ISETP.GE.U32.AND P4, PT, R5, R24, PT ; /* 0x000000180500720c */
/* 0x000fd20003f86070 */
/*07f0*/ @P1 IADD3 R9, -R26, R9, RZ ; /* 0x000000091a091210 */
/* 0x000fe40007ffe1ff */
/*0800*/ @P2 IMAD.IADD R2, R2, 0x1, -R23 ; /* 0x0000000102022824 */
/* 0x000fe200078e0a17 */
/*0810*/ @P1 IADD3 R11, R11, 0x1, RZ ; /* 0x000000010b0b1810 */
/* 0x000fe40007ffe0ff */
/*0820*/ ISETP.GE.U32.AND P3, PT, R9, R26, PT ; /* 0x0000001a0900720c */
/* 0x000fe40003f66070 */
/*0830*/ @P4 IADD3 R6, R6, 0x1, RZ ; /* 0x0000000106064810 */
/* 0x000fe40007ffe0ff */
/*0840*/ ISETP.GE.U32.AND P4, PT, R2, R23, PT ; /* 0x000000170200720c */
/* 0x000fe40003f86070 */
/*0850*/ SEL R9, R7, R6, !P5 ; /* 0x0000000607097207 */
/* 0x000fc40006800000 */
/*0860*/ ISETP.NE.U32.AND P5, PT, R23, RZ, PT ; /* 0x000000ff1700720c */
/* 0x000fe40003fa5070 */
/*0870*/ IADD3 R6, R19.reuse, 0x2, RZ ; /* 0x0000000213067810 */
/* 0x040fe40007ffe0ff */
/*0880*/ IADD3 R2, P6, R19, c[0x0][0x168], RZ ; /* 0x00005a0013027a10 */
/* 0x000fe40007fde0ff */
/*0890*/ IADD3 R4, P1, R4, c[0x0][0x168], RZ ; /* 0x00005a0004047a10 */
/* 0x000fe40007f3e0ff */
/*08a0*/ @P2 IADD3 R13, R13, 0x1, RZ ; /* 0x000000010d0d2810 */
/* 0x000fe20007ffe0ff */
/*08b0*/ IMAD.X R3, RZ, RZ, c[0x0][0x16c], P6 ; /* 0x00005b00ff037624 */
/* 0x000fe200030e06ff */
/*08c0*/ @P3 IADD3 R11, R11, 0x1, RZ ; /* 0x000000010b0b3810 */
/* 0x000fe20007ffe0ff */
/*08d0*/ IMAD.X R5, RZ, RZ, c[0x0][0x16c], P1 ; /* 0x00005b00ff057624 */
/* 0x000fe200008e06ff */
/*08e0*/ IADD3 R6, P2, R6, c[0x0][0x168], RZ ; /* 0x00005a0006067a10 */
/* 0x000fc40007f5e0ff */
/*08f0*/ @P4 IADD3 R13, R13, 0x1, RZ ; /* 0x000000010d0d4810 */
/* 0x000fe20007ffe0ff */
/*0900*/ STG.E.U8 [R2.64], R9 ; /* 0x0000000902007986 */
/* 0x000fe2000c101124 */
/*0910*/ SEL R11, R0, R11, !P0 ; /* 0x0000000b000b7207 */
/* 0x000fe20004000000 */
/*0920*/ IMAD.X R7, RZ, RZ, c[0x0][0x16c], P2 ; /* 0x00005b00ff077624 */
/* 0x000fe200010e06ff */
/*0930*/ @!P5 LOP3.LUT R13, RZ, R23, RZ, 0x33, !PT ; /* 0x00000017ff0dd212 */
/* 0x000fc600078e33ff */
/*0940*/ STG.E.U8 [R4.64], R11 ; /* 0x0000000b04007986 */
/* 0x000fe8000c101124 */
/*0950*/ STG.E.U8 [R6.64], R13 ; /* 0x0000000d06007986 */
/* 0x000fe2000c101124 */
/*0960*/ EXIT ; /* 0x000000000000794d */
/* 0x000fea0003800000 */
/*0970*/ BRA 0x970; /* 0xfffffff000007947 */
/* 0x000fc0000383ffff */
/*0980*/ NOP; /* 0x0000000000007918 */
/* 0x000fc00000000000 */
/*0990*/ NOP; /* 0x0000000000007918 */
/* 0x000fc00000000000 */
/*09a0*/ NOP; /* 0x0000000000007918 */
/* 0x000fc00000000000 */
/*09b0*/ NOP; /* 0x0000000000007918 */
/* 0x000fc00000000000 */
/*09c0*/ NOP; /* 0x0000000000007918 */
/* 0x000fc00000000000 */
/*09d0*/ NOP; /* 0x0000000000007918 */
/* 0x000fc00000000000 */
/*09e0*/ NOP; /* 0x0000000000007918 */
/* 0x000fc00000000000 */
/*09f0*/ NOP; /* 0x0000000000007918 */
/* 0x000fc00000000000 */
.......... |
You are a helpful coding assistant specialized in converting CUDA source code to CUDA host assembly. | #include <cuda_runtime.h>
#include <device_launch_parameters.h>
#include <cuda.h>
#include <iostream>
#include <stdio.h>
#include <stdlib.h>
#include <stdint.h>
#include <string.h>
#include <ctype.h>
#define MAX_SAVES 1000
#define QTD_NUMBERS 3
#define gpuErrchk(ans) { gpuAssert((ans), __FILE__, __LINE__); }
inline void gpuAssert(cudaError_t code, const char *file, int line, bool abort=true)
{
if (code != cudaSuccess)
{
fprintf(stderr,"GPUassert: %s %s %d\n", cudaGetErrorString(code), file, line);
if (abort) exit(code);
}
}
__global__
void GenSeq(uint32_t *divs, uint8_t*arr, uint32_t arrSize, uint32_t* index, uint32_t MAXgTid){
uint32_t ThrPerBlk = blockDim.x;
uint32_t MYbid = blockIdx.x;
uint32_t MYtid = threadIdx.x;
uint32_t MYgtid = ThrPerBlk * MYbid + MYtid;
uint8_t i;
// uint32_t qtdNumbers = sizeof(divs) - 1;
//uint8_t tempArr[qtd_numbers];
uint32_t offset = MYgtid * QTD_NUMBERS;
// printf("ThrPerBlk: %u, Mybid: %u, Mytid: %d, Mygtid: %u, offset: %u\n", ThrPerBlk, MYbid, MYtid, ThrPerBlk * MYbid + MYtid, offset);
if(offset >= MAXgTid)
return;
uint8_t tempArr[QTD_NUMBERS];
for(i = 0; i < QTD_NUMBERS; i++){
tempArr[i] = (MYgtid % divs[i]) / divs[i + 1];
}
uint32_t currIndex = atomicAdd(index, QTD_NUMBERS);
if(currIndex > MAX_SAVES)
return;
printf("ThrPerBlk: %u, Mybid: %u, Mytid: %d, Mygtid: %u, offset: %u, currIndex: %u\n", ThrPerBlk, MYbid, MYtid, MYgtid, offset, currIndex);
for(i = 0; i < QTD_NUMBERS; i++){
arr[currIndex] = tempArr[i];
currIndex++;
}
}
int main(){
cudaError_t cudaStatus;
cudaEvent_t time1, time2, time3;
float totalTime, kernelExecutionTime, tfrGPUtoCPU;
uint32_t ThrPerBlk = 32, NumBlocks = 0;
int NumGPUs = 0; cudaGetDeviceCount(&NumGPUs);
if (NumGPUs == 0){
std::cout << "\nNo CUDA Device is available\n";
exit(EXIT_FAILURE);
}
uint32_t i = 0;
uint32_t possibilities = 1;
uint8_t numbers[] = {3,3,3};
// uint8_t qtd_numbers = sizeof(numbers);
for(i = 0; i < QTD_NUMBERS; i++){
possibilities *= numbers[i];
}
uint32_t divs[QTD_NUMBERS + 1];
divs[0] = possibilities;
for(i = 0; i < QTD_NUMBERS; i++){
divs[i + 1] = divs[i] / numbers[i];
}
for(i = 0; i < QTD_NUMBERS + 1; i++){ //DEBUG
std::cout << divs[i] << ", ";
}
std::cout << std::endl;
// uint32_t arrSize = possibilities * QTD_NUMBERS * sizeof(uint8_t);
uint32_t MAXgTid = possibilities * QTD_NUMBERS * sizeof(uint8_t);
uint32_t arrSize = ((MAX_SAVES + QTD_NUMBERS -1) / QTD_NUMBERS) * QTD_NUMBERS;
std::cout << "arrSize: " << arrSize << std::endl; //DEBUG
uint8_t* sequencies = (uint8_t*)malloc(arrSize);
uint32_t* GPUcont = nullptr;
uint32_t* GPUdivs = nullptr;
uint8_t* GPUsequencies = nullptr;
NumBlocks = (possibilities + ThrPerBlk - 1) / ThrPerBlk;
std::cout << "NumBlocks: " << NumBlocks << ", ThrPerBlk: " << ThrPerBlk << std::endl; // debug
// getchar();
cudaEventCreate(&time1);
cudaEventCreate(&time2);
cudaEventCreate(&time3);
cudaEventRecord(time1, 0);
gpuErrchk(cudaMalloc((void **)&GPUcont, sizeof(uint32_t)));
gpuErrchk(cudaMemset(GPUcont, 0, sizeof(uint32_t)));
gpuErrchk(cudaMalloc((void **)&GPUsequencies, arrSize));
gpuErrchk(cudaMalloc((void **)&GPUdivs, (QTD_NUMBERS + 1) * sizeof(uint32_t)));
gpuErrchk(cudaMemcpy(GPUdivs, divs, (QTD_NUMBERS + 1) * sizeof(uint32_t), cudaMemcpyHostToDevice));
GenSeq <<< NumBlocks, ThrPerBlk >>> (GPUdivs, GPUsequencies, arrSize, GPUcont, MAXgTid);
gpuErrchk(cudaDeviceSynchronize());
cudaEventRecord(time2, 0);
gpuErrchk(cudaMemcpy(sequencies, GPUsequencies, arrSize, cudaMemcpyDeviceToHost));
cudaEventRecord(time3, 0);
cudaEventSynchronize(time1); cudaEventSynchronize(time2);
cudaEventSynchronize(time3);
cudaEventElapsedTime(&totalTime, time1, time3);
cudaEventElapsedTime(&kernelExecutionTime, time1, time2);
cudaEventElapsedTime(&tfrGPUtoCPU, time2, time3);
gpuErrchk(cudaDeviceSynchronize());
for(i = 0; i < arrSize; i++){
if(i % QTD_NUMBERS == 0)
std::cout << std::endl;
else
std::cout << ", ";
std::cout << int(sequencies[i]);
}
printf("\n\n-------------------- ... ----------------------------\n");
printf("Kernel Execution = %5.2f ms\n", kernelExecutionTime);
printf("GPU->CPU Transfer = %5.2f ms ... %4d MB ... %6.2f GB/s\n", tfrGPUtoCPU, arrSize / 1024 / 1024,
(float)arrSize / (tfrGPUtoCPU * 1024.0 * 1024.0));
printf("Total time elapsed = %5.2f ms\n", totalTime);
printf("-------------------- ... ----------------------------\n");
cudaFree(GPUdivs);
cudaFree(GPUsequencies);
cudaEventDestroy(time1);
cudaEventDestroy(time2);
cudaEventDestroy(time3);
cudaStatus = cudaDeviceReset();
if (cudaStatus != cudaSuccess){
std::cout << "cudaDeviceReset failed!";
free(sequencies); exit(EXIT_FAILURE);
}
free(sequencies);
return(EXIT_SUCCESS);
} | .file "tmpxft_000329f8_00000000-6_numbers.cudafe1.cpp"
.text
#APP
.globl _ZSt21ios_base_library_initv
#NO_APP
.type _ZL26__cudaUnregisterBinaryUtilv, @function
_ZL26__cudaUnregisterBinaryUtilv:
.LFB3673:
.cfi_startproc
endbr64
subq $8, %rsp
.cfi_def_cfa_offset 16
movq _ZL20__cudaFatCubinHandle(%rip), %rdi
call __cudaUnregisterFatBinary@PLT
addq $8, %rsp
.cfi_def_cfa_offset 8
ret
.cfi_endproc
.LFE3673:
.size _ZL26__cudaUnregisterBinaryUtilv, .-_ZL26__cudaUnregisterBinaryUtilv
.section .rodata._Z9gpuAssert9cudaErrorPKcib.str1.1,"aMS",@progbits,1
.LC0:
.string "GPUassert: %s %s %d\n"
.section .text._Z9gpuAssert9cudaErrorPKcib,"axG",@progbits,_Z9gpuAssert9cudaErrorPKcib,comdat
.weak _Z9gpuAssert9cudaErrorPKcib
.type _Z9gpuAssert9cudaErrorPKcib, @function
_Z9gpuAssert9cudaErrorPKcib:
.LFB3669:
.cfi_startproc
endbr64
testl %edi, %edi
jne .L9
ret
.L9:
pushq %r13
.cfi_def_cfa_offset 16
.cfi_offset 13, -16
pushq %r12
.cfi_def_cfa_offset 24
.cfi_offset 12, -24
pushq %rbp
.cfi_def_cfa_offset 32
.cfi_offset 6, -32
pushq %rbx
.cfi_def_cfa_offset 40
.cfi_offset 3, -40
subq $8, %rsp
.cfi_def_cfa_offset 48
movl %edi, %ebx
movq %rsi, %r13
movl %edx, %r12d
movl %ecx, %ebp
call cudaGetErrorString@PLT
movq %rax, %rcx
movl %r12d, %r9d
movq %r13, %r8
leaq .LC0(%rip), %rdx
movl $2, %esi
movq stderr(%rip), %rdi
movl $0, %eax
call __fprintf_chk@PLT
testb %bpl, %bpl
jne .L10
addq $8, %rsp
.cfi_remember_state
.cfi_def_cfa_offset 40
popq %rbx
.cfi_def_cfa_offset 32
popq %rbp
.cfi_def_cfa_offset 24
popq %r12
.cfi_def_cfa_offset 16
popq %r13
.cfi_def_cfa_offset 8
ret
.L10:
.cfi_restore_state
movl %ebx, %edi
call exit@PLT
.cfi_endproc
.LFE3669:
.size _Z9gpuAssert9cudaErrorPKcib, .-_Z9gpuAssert9cudaErrorPKcib
.text
.globl _Z31__device_stub__Z6GenSeqPjPhjS_jPjPhjS_j
.type _Z31__device_stub__Z6GenSeqPjPhjS_jPjPhjS_j, @function
_Z31__device_stub__Z6GenSeqPjPhjS_jPjPhjS_j:
.LFB3695:
.cfi_startproc
endbr64
subq $152, %rsp
.cfi_def_cfa_offset 160
movq %rdi, 24(%rsp)
movq %rsi, 16(%rsp)
movl %edx, 12(%rsp)
movq %rcx, (%rsp)
movl %r8d, 8(%rsp)
movq %fs:40, %rax
movq %rax, 136(%rsp)
xorl %eax, %eax
leaq 24(%rsp), %rax
movq %rax, 96(%rsp)
leaq 16(%rsp), %rax
movq %rax, 104(%rsp)
leaq 12(%rsp), %rax
movq %rax, 112(%rsp)
movq %rsp, %rax
movq %rax, 120(%rsp)
leaq 8(%rsp), %rax
movq %rax, 128(%rsp)
movl $1, 48(%rsp)
movl $1, 52(%rsp)
movl $1, 56(%rsp)
movl $1, 60(%rsp)
movl $1, 64(%rsp)
movl $1, 68(%rsp)
leaq 40(%rsp), %rcx
leaq 32(%rsp), %rdx
leaq 60(%rsp), %rsi
leaq 48(%rsp), %rdi
call __cudaPopCallConfiguration@PLT
testl %eax, %eax
je .L15
.L11:
movq 136(%rsp), %rax
subq %fs:40, %rax
jne .L16
addq $152, %rsp
.cfi_remember_state
.cfi_def_cfa_offset 8
ret
.L15:
.cfi_restore_state
pushq 40(%rsp)
.cfi_def_cfa_offset 168
pushq 40(%rsp)
.cfi_def_cfa_offset 176
leaq 112(%rsp), %r9
movq 76(%rsp), %rcx
movl 84(%rsp), %r8d
movq 64(%rsp), %rsi
movl 72(%rsp), %edx
leaq _Z6GenSeqPjPhjS_j(%rip), %rdi
call cudaLaunchKernel@PLT
addq $16, %rsp
.cfi_def_cfa_offset 160
jmp .L11
.L16:
call __stack_chk_fail@PLT
.cfi_endproc
.LFE3695:
.size _Z31__device_stub__Z6GenSeqPjPhjS_jPjPhjS_j, .-_Z31__device_stub__Z6GenSeqPjPhjS_jPjPhjS_j
.globl _Z6GenSeqPjPhjS_j
.type _Z6GenSeqPjPhjS_j, @function
_Z6GenSeqPjPhjS_j:
.LFB3696:
.cfi_startproc
endbr64
subq $8, %rsp
.cfi_def_cfa_offset 16
call _Z31__device_stub__Z6GenSeqPjPhjS_jPjPhjS_j
addq $8, %rsp
.cfi_def_cfa_offset 8
ret
.cfi_endproc
.LFE3696:
.size _Z6GenSeqPjPhjS_j, .-_Z6GenSeqPjPhjS_j
.section .rodata.str1.1,"aMS",@progbits,1
.LC1:
.string "\nNo CUDA Device is available\n"
.LC2:
.string ", "
.LC3:
.string "arrSize: "
.LC4:
.string "NumBlocks: "
.LC5:
.string ", ThrPerBlk: "
.section .rodata.str1.8,"aMS",@progbits,1
.align 8
.LC6:
.string "/home/ubuntu/Datasets/stackv2/train-structured/vinicius-r-silva/cuda_studies/master/number_sequencies/numbers.cu"
.align 8
.LC7:
.string "\n\n-------------------- ... ----------------------------\n"
.section .rodata.str1.1
.LC8:
.string "Kernel Execution = %5.2f ms\n"
.section .rodata.str1.8
.align 8
.LC11:
.string "GPU->CPU Transfer = %5.2f ms ... %4d MB ... %6.2f GB/s\n"
.align 8
.LC12:
.string "Total time elapsed = %5.2f ms\n"
.align 8
.LC13:
.string "-------------------- ... ----------------------------\n"
.section .rodata.str1.1
.LC14:
.string "cudaDeviceReset failed!"
.text
.globl main
.type main, @function
main:
.LFB3670:
.cfi_startproc
endbr64
pushq %r15
.cfi_def_cfa_offset 16
.cfi_offset 15, -16
pushq %r14
.cfi_def_cfa_offset 24
.cfi_offset 14, -24
pushq %r13
.cfi_def_cfa_offset 32
.cfi_offset 13, -32
pushq %r12
.cfi_def_cfa_offset 40
.cfi_offset 12, -40
pushq %rbp
.cfi_def_cfa_offset 48
.cfi_offset 6, -48
pushq %rbx
.cfi_def_cfa_offset 56
.cfi_offset 3, -56
subq $120, %rsp
.cfi_def_cfa_offset 176
movq %fs:40, %rax
movq %rax, 104(%rsp)
xorl %eax, %eax
movl $0, 4(%rsp)
leaq 4(%rsp), %rdi
call cudaGetDeviceCount@PLT
cmpl $0, 4(%rsp)
je .L35
movw $771, 101(%rsp)
movb $3, 103(%rsp)
movl $3, %ecx
movl $3, %edi
movl $3, %esi
imull $9, %ecx, %ebp
movl %ebp, 80(%rsp)
movl %ebp, %eax
movl $0, %edx
divl %edi
movl %eax, 84(%rsp)
movl $0, %edx
divl %ecx
movl %eax, 88(%rsp)
movl $0, %edx
divl %esi
movl %eax, 92(%rsp)
leaq 80(%rsp), %rbx
leaq 96(%rsp), %r14
leaq _ZSt4cout(%rip), %r13
leaq .LC2(%rip), %r12
.L21:
movl (%rbx), %esi
movq %r13, %rdi
call _ZNSo9_M_insertImEERSoT_@PLT
movq %rax, %rdi
movl $2, %edx
movq %r12, %rsi
call _ZSt16__ostream_insertIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_PKS3_l@PLT
addq $4, %rbx
cmpq %rbx, %r14
jne .L21
leaq _ZSt4cout(%rip), %rbx
movq %rbx, %rdi
call _ZSt4endlIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_@PLT
leaq .LC3(%rip), %rsi
movq %rbx, %rdi
call _ZStlsISt11char_traitsIcEERSt13basic_ostreamIcT_ES5_PKc@PLT
movq %rax, %rdi
movl $1002, %esi
call _ZNSo9_M_insertImEERSoT_@PLT
movq %rax, %rdi
call _ZSt4endlIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_@PLT
movl $1002, %edi
call malloc@PLT
movq %rax, %r12
movq $0, 32(%rsp)
movq $0, 40(%rsp)
movq $0, 48(%rsp)
leal 31(%rbp), %r13d
shrl $5, %r13d
leaq .LC4(%rip), %rsi
movq %rbx, %rdi
call _ZStlsISt11char_traitsIcEERSt13basic_ostreamIcT_ES5_PKc@PLT
movq %rax, %rdi
movl %r13d, %esi
call _ZNSo9_M_insertImEERSoT_@PLT
movq %rax, %rdi
leaq .LC5(%rip), %rsi
call _ZStlsISt11char_traitsIcEERSt13basic_ostreamIcT_ES5_PKc@PLT
movq %rax, %rdi
movl $32, %esi
call _ZNSo9_M_insertImEERSoT_@PLT
movq %rax, %rdi
call _ZSt4endlIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_@PLT
leaq 8(%rsp), %rdi
call cudaEventCreate@PLT
leaq 16(%rsp), %rdi
call cudaEventCreate@PLT
leaq 24(%rsp), %rdi
call cudaEventCreate@PLT
movl $0, %esi
movq 8(%rsp), %rdi
call cudaEventRecord@PLT
leaq 32(%rsp), %rdi
movl $4, %esi
call cudaMalloc@PLT
movl %eax, %edi
movl $1, %ecx
movl $107, %edx
leaq .LC6(%rip), %rbx
movq %rbx, %rsi
call _Z9gpuAssert9cudaErrorPKcib
movl $4, %edx
movl $0, %esi
movq 32(%rsp), %rdi
call cudaMemset@PLT
movl %eax, %edi
movl $1, %ecx
movl $108, %edx
movq %rbx, %rsi
call _Z9gpuAssert9cudaErrorPKcib
leaq 48(%rsp), %rdi
movl $1002, %esi
call cudaMalloc@PLT
movl %eax, %edi
movl $1, %ecx
movl $110, %edx
movq %rbx, %rsi
call _Z9gpuAssert9cudaErrorPKcib
leaq 40(%rsp), %rdi
movl $16, %esi
call cudaMalloc@PLT
movl %eax, %edi
movl $1, %ecx
movl $111, %edx
movq %rbx, %rsi
call _Z9gpuAssert9cudaErrorPKcib
leaq 80(%rsp), %rsi
movl $1, %ecx
movl $16, %edx
movq 40(%rsp), %rdi
call cudaMemcpy@PLT
movl %eax, %edi
movl $1, %ecx
movl $112, %edx
movq %rbx, %rsi
call _Z9gpuAssert9cudaErrorPKcib
movl $32, 68(%rsp)
movl $1, 72(%rsp)
movl $1, 76(%rsp)
movl %r13d, 56(%rsp)
movl $1, 60(%rsp)
movl $1, 64(%rsp)
movl $0, %r9d
movl $0, %r8d
movq 68(%rsp), %rdx
movl $1, %ecx
movq 56(%rsp), %rdi
movl $1, %esi
call __cudaPushCallConfiguration@PLT
testl %eax, %eax
je .L36
.L22:
call cudaDeviceSynchronize@PLT
movl %eax, %edi
movl $1, %ecx
movl $116, %edx
leaq .LC6(%rip), %rbx
movq %rbx, %rsi
call _Z9gpuAssert9cudaErrorPKcib
movl $0, %esi
movq 16(%rsp), %rdi
call cudaEventRecord@PLT
movl $2, %ecx
movl $1002, %edx
movq 48(%rsp), %rsi
movq %r12, %rdi
call cudaMemcpy@PLT
movl %eax, %edi
movl $1, %ecx
movl $119, %edx
movq %rbx, %rsi
call _Z9gpuAssert9cudaErrorPKcib
movl $0, %esi
movq 24(%rsp), %rdi
call cudaEventRecord@PLT
movq 8(%rsp), %rdi
call cudaEventSynchronize@PLT
movq 16(%rsp), %rdi
call cudaEventSynchronize@PLT
movq 24(%rsp), %rdi
call cudaEventSynchronize@PLT
movq %rsp, %rdi
movq 24(%rsp), %rdx
movq 8(%rsp), %rsi
call cudaEventElapsedTime@PLT
leaq 56(%rsp), %rdi
movq 16(%rsp), %rdx
movq 8(%rsp), %rsi
call cudaEventElapsedTime@PLT
leaq 68(%rsp), %rdi
movq 24(%rsp), %rdx
movq 16(%rsp), %rsi
call cudaEventElapsedTime@PLT
call cudaDeviceSynchronize@PLT
movl %eax, %edi
movl $1, %ecx
movl $128, %edx
movq %rbx, %rsi
call _Z9gpuAssert9cudaErrorPKcib
movl $0, %ebx
movl $2863311531, %r13d
leaq .LC2(%rip), %r14
leaq _ZSt4cout(%rip), %rbp
jmp .L29
.L35:
leaq .LC1(%rip), %rsi
leaq _ZSt4cout(%rip), %rdi
call _ZStlsISt11char_traitsIcEERSt13basic_ostreamIcT_ES5_PKc@PLT
movl $1, %edi
call exit@PLT
.L36:
imull $3, %ebp, %r8d
movq 32(%rsp), %rcx
movl $1002, %edx
movq 48(%rsp), %rsi
movq 40(%rsp), %rdi
call _Z31__device_stub__Z6GenSeqPjPhjS_jPjPhjS_j
jmp .L22
.L39:
movq 104(%rsp), %rax
subq %fs:40, %rax
jne .L37
call _ZSt16__throw_bad_castv@PLT
.L37:
call __stack_chk_fail@PLT
.L26:
movq %r15, %rdi
call _ZNKSt5ctypeIcE13_M_widen_initEv@PLT
movq (%r15), %rax
movl $10, %esi
movq %r15, %rdi
call *48(%rax)
movl %eax, %esi
jmp .L27
.L23:
movl $2, %edx
movq %r14, %rsi
movq %rbp, %rdi
call _ZSt16__ostream_insertIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_PKS3_l@PLT
.L28:
movzbl (%r12,%rbx), %esi
movq %rbp, %rdi
call _ZNSolsEi@PLT
addq $1, %rbx
cmpq $1002, %rbx
je .L38
.L29:
movl %ebx, %eax
imulq %r13, %rax
shrq $33, %rax
leal (%rax,%rax,2), %eax
cmpl %ebx, %eax
jne .L23
movq 0(%rbp), %rax
movq -24(%rax), %rax
movq 240(%rbp,%rax), %r15
testq %r15, %r15
je .L39
cmpb $0, 56(%r15)
je .L26
movzbl 67(%r15), %esi
.L27:
movsbl %sil, %esi
movq %rbp, %rdi
call _ZNSo3putEc@PLT
movq %rax, %rdi
call _ZNSo5flushEv@PLT
jmp .L28
.L38:
leaq .LC7(%rip), %rsi
movl $2, %edi
movl $0, %eax
call __printf_chk@PLT
pxor %xmm0, %xmm0
cvtss2sd 56(%rsp), %xmm0
leaq .LC8(%rip), %rsi
movl $2, %edi
movl $1, %eax
call __printf_chk@PLT
pxor %xmm2, %xmm2
cvtss2sd 68(%rsp), %xmm2
movsd .LC9(%rip), %xmm1
movapd %xmm2, %xmm0
mulsd %xmm1, %xmm0
mulsd %xmm1, %xmm0
movsd .LC10(%rip), %xmm1
divsd %xmm0, %xmm1
movl $0, %edx
movapd %xmm2, %xmm0
leaq .LC11(%rip), %rsi
movl $2, %edi
movl $2, %eax
call __printf_chk@PLT
pxor %xmm0, %xmm0
cvtss2sd (%rsp), %xmm0
leaq .LC12(%rip), %rsi
movl $2, %edi
movl $1, %eax
call __printf_chk@PLT
leaq .LC13(%rip), %rsi
movl $2, %edi
movl $0, %eax
call __printf_chk@PLT
movq 40(%rsp), %rdi
call cudaFree@PLT
movq 48(%rsp), %rdi
call cudaFree@PLT
movq 8(%rsp), %rdi
call cudaEventDestroy@PLT
movq 16(%rsp), %rdi
call cudaEventDestroy@PLT
movq 24(%rsp), %rdi
call cudaEventDestroy@PLT
call cudaDeviceReset@PLT
testl %eax, %eax
jne .L40
movq %r12, %rdi
call free@PLT
movq 104(%rsp), %rax
subq %fs:40, %rax
jne .L41
movl $0, %eax
addq $120, %rsp
.cfi_remember_state
.cfi_def_cfa_offset 56
popq %rbx
.cfi_def_cfa_offset 48
popq %rbp
.cfi_def_cfa_offset 40
popq %r12
.cfi_def_cfa_offset 32
popq %r13
.cfi_def_cfa_offset 24
popq %r14
.cfi_def_cfa_offset 16
popq %r15
.cfi_def_cfa_offset 8
ret
.L40:
.cfi_restore_state
leaq .LC14(%rip), %rsi
leaq _ZSt4cout(%rip), %rdi
call _ZStlsISt11char_traitsIcEERSt13basic_ostreamIcT_ES5_PKc@PLT
movq %r12, %rdi
call free@PLT
movl $1, %edi
call exit@PLT
.L41:
call __stack_chk_fail@PLT
.cfi_endproc
.LFE3670:
.size main, .-main
.section .rodata.str1.1
.LC15:
.string "_Z6GenSeqPjPhjS_j"
.text
.type _ZL24__sti____cudaRegisterAllv, @function
_ZL24__sti____cudaRegisterAllv:
.LFB3698:
.cfi_startproc
endbr64
subq $8, %rsp
.cfi_def_cfa_offset 16
leaq _ZL15__fatDeviceText(%rip), %rdi
call __cudaRegisterFatBinary@PLT
movq %rax, %rdi
movq %rax, _ZL20__cudaFatCubinHandle(%rip)
pushq $0
.cfi_def_cfa_offset 24
pushq $0
.cfi_def_cfa_offset 32
pushq $0
.cfi_def_cfa_offset 40
pushq $0
.cfi_def_cfa_offset 48
movl $0, %r9d
movl $-1, %r8d
leaq .LC15(%rip), %rdx
movq %rdx, %rcx
leaq _Z6GenSeqPjPhjS_j(%rip), %rsi
call __cudaRegisterFunction@PLT
addq $32, %rsp
.cfi_def_cfa_offset 16
movq _ZL20__cudaFatCubinHandle(%rip), %rdi
call __cudaRegisterFatBinaryEnd@PLT
leaq _ZL26__cudaUnregisterBinaryUtilv(%rip), %rdi
call atexit@PLT
addq $8, %rsp
.cfi_def_cfa_offset 8
ret
.cfi_endproc
.LFE3698:
.size _ZL24__sti____cudaRegisterAllv, .-_ZL24__sti____cudaRegisterAllv
.section .init_array,"aw"
.align 8
.quad _ZL24__sti____cudaRegisterAllv
.section .nvFatBinSegment,"aw"
.align 8
.type _ZL15__fatDeviceText, @object
.size _ZL15__fatDeviceText, 24
_ZL15__fatDeviceText:
.long 1180844977
.long 1
.quad fatbinData
.quad 0
.local _ZL20__cudaFatCubinHandle
.comm _ZL20__cudaFatCubinHandle,8,8
.section .rodata.cst8,"aM",@progbits,8
.align 8
.LC9:
.long 0
.long 1083179008
.align 8
.LC10:
.long 0
.long 1083133952
.ident "GCC: (Ubuntu 13.3.0-6ubuntu2~24.04) 13.3.0"
.section .note.GNU-stack,"",@progbits
.section .note.gnu.property,"a"
.align 8
.long 1f - 0f
.long 4f - 1f
.long 5
0:
.string "GNU"
1:
.align 8
.long 0xc0000002
.long 3f - 2f
2:
.long 0x3
3:
.align 8
4: |
You are a helpful coding assistant specialized in converting CUDA source code to HIP/AMD source code. | #include <cuda_runtime.h>
#include <device_launch_parameters.h>
#include <cuda.h>
#include <iostream>
#include <stdio.h>
#include <stdlib.h>
#include <stdint.h>
#include <string.h>
#include <ctype.h>
#define MAX_SAVES 1000
#define QTD_NUMBERS 3
#define gpuErrchk(ans) { gpuAssert((ans), __FILE__, __LINE__); }
inline void gpuAssert(cudaError_t code, const char *file, int line, bool abort=true)
{
if (code != cudaSuccess)
{
fprintf(stderr,"GPUassert: %s %s %d\n", cudaGetErrorString(code), file, line);
if (abort) exit(code);
}
}
__global__
void GenSeq(uint32_t *divs, uint8_t*arr, uint32_t arrSize, uint32_t* index, uint32_t MAXgTid){
uint32_t ThrPerBlk = blockDim.x;
uint32_t MYbid = blockIdx.x;
uint32_t MYtid = threadIdx.x;
uint32_t MYgtid = ThrPerBlk * MYbid + MYtid;
uint8_t i;
// uint32_t qtdNumbers = sizeof(divs) - 1;
//uint8_t tempArr[qtd_numbers];
uint32_t offset = MYgtid * QTD_NUMBERS;
// printf("ThrPerBlk: %u, Mybid: %u, Mytid: %d, Mygtid: %u, offset: %u\n", ThrPerBlk, MYbid, MYtid, ThrPerBlk * MYbid + MYtid, offset);
if(offset >= MAXgTid)
return;
uint8_t tempArr[QTD_NUMBERS];
for(i = 0; i < QTD_NUMBERS; i++){
tempArr[i] = (MYgtid % divs[i]) / divs[i + 1];
}
uint32_t currIndex = atomicAdd(index, QTD_NUMBERS);
if(currIndex > MAX_SAVES)
return;
printf("ThrPerBlk: %u, Mybid: %u, Mytid: %d, Mygtid: %u, offset: %u, currIndex: %u\n", ThrPerBlk, MYbid, MYtid, MYgtid, offset, currIndex);
for(i = 0; i < QTD_NUMBERS; i++){
arr[currIndex] = tempArr[i];
currIndex++;
}
}
int main(){
cudaError_t cudaStatus;
cudaEvent_t time1, time2, time3;
float totalTime, kernelExecutionTime, tfrGPUtoCPU;
uint32_t ThrPerBlk = 32, NumBlocks = 0;
int NumGPUs = 0; cudaGetDeviceCount(&NumGPUs);
if (NumGPUs == 0){
std::cout << "\nNo CUDA Device is available\n";
exit(EXIT_FAILURE);
}
uint32_t i = 0;
uint32_t possibilities = 1;
uint8_t numbers[] = {3,3,3};
// uint8_t qtd_numbers = sizeof(numbers);
for(i = 0; i < QTD_NUMBERS; i++){
possibilities *= numbers[i];
}
uint32_t divs[QTD_NUMBERS + 1];
divs[0] = possibilities;
for(i = 0; i < QTD_NUMBERS; i++){
divs[i + 1] = divs[i] / numbers[i];
}
for(i = 0; i < QTD_NUMBERS + 1; i++){ //DEBUG
std::cout << divs[i] << ", ";
}
std::cout << std::endl;
// uint32_t arrSize = possibilities * QTD_NUMBERS * sizeof(uint8_t);
uint32_t MAXgTid = possibilities * QTD_NUMBERS * sizeof(uint8_t);
uint32_t arrSize = ((MAX_SAVES + QTD_NUMBERS -1) / QTD_NUMBERS) * QTD_NUMBERS;
std::cout << "arrSize: " << arrSize << std::endl; //DEBUG
uint8_t* sequencies = (uint8_t*)malloc(arrSize);
uint32_t* GPUcont = nullptr;
uint32_t* GPUdivs = nullptr;
uint8_t* GPUsequencies = nullptr;
NumBlocks = (possibilities + ThrPerBlk - 1) / ThrPerBlk;
std::cout << "NumBlocks: " << NumBlocks << ", ThrPerBlk: " << ThrPerBlk << std::endl; // debug
// getchar();
cudaEventCreate(&time1);
cudaEventCreate(&time2);
cudaEventCreate(&time3);
cudaEventRecord(time1, 0);
gpuErrchk(cudaMalloc((void **)&GPUcont, sizeof(uint32_t)));
gpuErrchk(cudaMemset(GPUcont, 0, sizeof(uint32_t)));
gpuErrchk(cudaMalloc((void **)&GPUsequencies, arrSize));
gpuErrchk(cudaMalloc((void **)&GPUdivs, (QTD_NUMBERS + 1) * sizeof(uint32_t)));
gpuErrchk(cudaMemcpy(GPUdivs, divs, (QTD_NUMBERS + 1) * sizeof(uint32_t), cudaMemcpyHostToDevice));
GenSeq <<< NumBlocks, ThrPerBlk >>> (GPUdivs, GPUsequencies, arrSize, GPUcont, MAXgTid);
gpuErrchk(cudaDeviceSynchronize());
cudaEventRecord(time2, 0);
gpuErrchk(cudaMemcpy(sequencies, GPUsequencies, arrSize, cudaMemcpyDeviceToHost));
cudaEventRecord(time3, 0);
cudaEventSynchronize(time1); cudaEventSynchronize(time2);
cudaEventSynchronize(time3);
cudaEventElapsedTime(&totalTime, time1, time3);
cudaEventElapsedTime(&kernelExecutionTime, time1, time2);
cudaEventElapsedTime(&tfrGPUtoCPU, time2, time3);
gpuErrchk(cudaDeviceSynchronize());
for(i = 0; i < arrSize; i++){
if(i % QTD_NUMBERS == 0)
std::cout << std::endl;
else
std::cout << ", ";
std::cout << int(sequencies[i]);
}
printf("\n\n-------------------- ... ----------------------------\n");
printf("Kernel Execution = %5.2f ms\n", kernelExecutionTime);
printf("GPU->CPU Transfer = %5.2f ms ... %4d MB ... %6.2f GB/s\n", tfrGPUtoCPU, arrSize / 1024 / 1024,
(float)arrSize / (tfrGPUtoCPU * 1024.0 * 1024.0));
printf("Total time elapsed = %5.2f ms\n", totalTime);
printf("-------------------- ... ----------------------------\n");
cudaFree(GPUdivs);
cudaFree(GPUsequencies);
cudaEventDestroy(time1);
cudaEventDestroy(time2);
cudaEventDestroy(time3);
cudaStatus = cudaDeviceReset();
if (cudaStatus != cudaSuccess){
std::cout << "cudaDeviceReset failed!";
free(sequencies); exit(EXIT_FAILURE);
}
free(sequencies);
return(EXIT_SUCCESS);
} | #include <hip/hip_runtime.h>
#include <iostream>
#include <stdio.h>
#include <stdlib.h>
#include <stdint.h>
#include <string.h>
#include <ctype.h>
#define MAX_SAVES 1000
#define QTD_NUMBERS 3
#define gpuErrchk(ans) { gpuAssert((ans), __FILE__, __LINE__); }
inline void gpuAssert(hipError_t code, const char *file, int line, bool abort=true)
{
if (code != hipSuccess)
{
fprintf(stderr,"GPUassert: %s %s %d\n", hipGetErrorString(code), file, line);
if (abort) exit(code);
}
}
__global__
void GenSeq(uint32_t *divs, uint8_t*arr, uint32_t arrSize, uint32_t* index, uint32_t MAXgTid){
uint32_t ThrPerBlk = blockDim.x;
uint32_t MYbid = blockIdx.x;
uint32_t MYtid = threadIdx.x;
uint32_t MYgtid = ThrPerBlk * MYbid + MYtid;
uint8_t i;
// uint32_t qtdNumbers = sizeof(divs) - 1;
//uint8_t tempArr[qtd_numbers];
uint32_t offset = MYgtid * QTD_NUMBERS;
// printf("ThrPerBlk: %u, Mybid: %u, Mytid: %d, Mygtid: %u, offset: %u\n", ThrPerBlk, MYbid, MYtid, ThrPerBlk * MYbid + MYtid, offset);
if(offset >= MAXgTid)
return;
uint8_t tempArr[QTD_NUMBERS];
for(i = 0; i < QTD_NUMBERS; i++){
tempArr[i] = (MYgtid % divs[i]) / divs[i + 1];
}
uint32_t currIndex = atomicAdd(index, QTD_NUMBERS);
if(currIndex > MAX_SAVES)
return;
printf("ThrPerBlk: %u, Mybid: %u, Mytid: %d, Mygtid: %u, offset: %u, currIndex: %u\n", ThrPerBlk, MYbid, MYtid, MYgtid, offset, currIndex);
for(i = 0; i < QTD_NUMBERS; i++){
arr[currIndex] = tempArr[i];
currIndex++;
}
}
int main(){
hipError_t cudaStatus;
hipEvent_t time1, time2, time3;
float totalTime, kernelExecutionTime, tfrGPUtoCPU;
uint32_t ThrPerBlk = 32, NumBlocks = 0;
int NumGPUs = 0; hipGetDeviceCount(&NumGPUs);
if (NumGPUs == 0){
std::cout << "\nNo CUDA Device is available\n";
exit(EXIT_FAILURE);
}
uint32_t i = 0;
uint32_t possibilities = 1;
uint8_t numbers[] = {3,3,3};
// uint8_t qtd_numbers = sizeof(numbers);
for(i = 0; i < QTD_NUMBERS; i++){
possibilities *= numbers[i];
}
uint32_t divs[QTD_NUMBERS + 1];
divs[0] = possibilities;
for(i = 0; i < QTD_NUMBERS; i++){
divs[i + 1] = divs[i] / numbers[i];
}
for(i = 0; i < QTD_NUMBERS + 1; i++){ //DEBUG
std::cout << divs[i] << ", ";
}
std::cout << std::endl;
// uint32_t arrSize = possibilities * QTD_NUMBERS * sizeof(uint8_t);
uint32_t MAXgTid = possibilities * QTD_NUMBERS * sizeof(uint8_t);
uint32_t arrSize = ((MAX_SAVES + QTD_NUMBERS -1) / QTD_NUMBERS) * QTD_NUMBERS;
std::cout << "arrSize: " << arrSize << std::endl; //DEBUG
uint8_t* sequencies = (uint8_t*)malloc(arrSize);
uint32_t* GPUcont = nullptr;
uint32_t* GPUdivs = nullptr;
uint8_t* GPUsequencies = nullptr;
NumBlocks = (possibilities + ThrPerBlk - 1) / ThrPerBlk;
std::cout << "NumBlocks: " << NumBlocks << ", ThrPerBlk: " << ThrPerBlk << std::endl; // debug
// getchar();
hipEventCreate(&time1);
hipEventCreate(&time2);
hipEventCreate(&time3);
hipEventRecord(time1, 0);
gpuErrchk(hipMalloc((void **)&GPUcont, sizeof(uint32_t)));
gpuErrchk(hipMemset(GPUcont, 0, sizeof(uint32_t)));
gpuErrchk(hipMalloc((void **)&GPUsequencies, arrSize));
gpuErrchk(hipMalloc((void **)&GPUdivs, (QTD_NUMBERS + 1) * sizeof(uint32_t)));
gpuErrchk(hipMemcpy(GPUdivs, divs, (QTD_NUMBERS + 1) * sizeof(uint32_t), hipMemcpyHostToDevice));
GenSeq <<< NumBlocks, ThrPerBlk >>> (GPUdivs, GPUsequencies, arrSize, GPUcont, MAXgTid);
gpuErrchk(hipDeviceSynchronize());
hipEventRecord(time2, 0);
gpuErrchk(hipMemcpy(sequencies, GPUsequencies, arrSize, hipMemcpyDeviceToHost));
hipEventRecord(time3, 0);
hipEventSynchronize(time1); hipEventSynchronize(time2);
hipEventSynchronize(time3);
hipEventElapsedTime(&totalTime, time1, time3);
hipEventElapsedTime(&kernelExecutionTime, time1, time2);
hipEventElapsedTime(&tfrGPUtoCPU, time2, time3);
gpuErrchk(hipDeviceSynchronize());
for(i = 0; i < arrSize; i++){
if(i % QTD_NUMBERS == 0)
std::cout << std::endl;
else
std::cout << ", ";
std::cout << int(sequencies[i]);
}
printf("\n\n-------------------- ... ----------------------------\n");
printf("Kernel Execution = %5.2f ms\n", kernelExecutionTime);
printf("GPU->CPU Transfer = %5.2f ms ... %4d MB ... %6.2f GB/s\n", tfrGPUtoCPU, arrSize / 1024 / 1024,
(float)arrSize / (tfrGPUtoCPU * 1024.0 * 1024.0));
printf("Total time elapsed = %5.2f ms\n", totalTime);
printf("-------------------- ... ----------------------------\n");
hipFree(GPUdivs);
hipFree(GPUsequencies);
hipEventDestroy(time1);
hipEventDestroy(time2);
hipEventDestroy(time3);
cudaStatus = hipDeviceReset();
if (cudaStatus != hipSuccess){
std::cout << "hipDeviceReset failed!";
free(sequencies); exit(EXIT_FAILURE);
}
free(sequencies);
return(EXIT_SUCCESS);
} |
You are a helpful coding assistant specialized in converting HIP source code to AMD host assembly. | #include <hip/hip_runtime.h>
#include <iostream>
#include <stdio.h>
#include <stdlib.h>
#include <stdint.h>
#include <string.h>
#include <ctype.h>
#define MAX_SAVES 1000
#define QTD_NUMBERS 3
#define gpuErrchk(ans) { gpuAssert((ans), __FILE__, __LINE__); }
inline void gpuAssert(hipError_t code, const char *file, int line, bool abort=true)
{
if (code != hipSuccess)
{
fprintf(stderr,"GPUassert: %s %s %d\n", hipGetErrorString(code), file, line);
if (abort) exit(code);
}
}
__global__
void GenSeq(uint32_t *divs, uint8_t*arr, uint32_t arrSize, uint32_t* index, uint32_t MAXgTid){
uint32_t ThrPerBlk = blockDim.x;
uint32_t MYbid = blockIdx.x;
uint32_t MYtid = threadIdx.x;
uint32_t MYgtid = ThrPerBlk * MYbid + MYtid;
uint8_t i;
// uint32_t qtdNumbers = sizeof(divs) - 1;
//uint8_t tempArr[qtd_numbers];
uint32_t offset = MYgtid * QTD_NUMBERS;
// printf("ThrPerBlk: %u, Mybid: %u, Mytid: %d, Mygtid: %u, offset: %u\n", ThrPerBlk, MYbid, MYtid, ThrPerBlk * MYbid + MYtid, offset);
if(offset >= MAXgTid)
return;
uint8_t tempArr[QTD_NUMBERS];
for(i = 0; i < QTD_NUMBERS; i++){
tempArr[i] = (MYgtid % divs[i]) / divs[i + 1];
}
uint32_t currIndex = atomicAdd(index, QTD_NUMBERS);
if(currIndex > MAX_SAVES)
return;
printf("ThrPerBlk: %u, Mybid: %u, Mytid: %d, Mygtid: %u, offset: %u, currIndex: %u\n", ThrPerBlk, MYbid, MYtid, MYgtid, offset, currIndex);
for(i = 0; i < QTD_NUMBERS; i++){
arr[currIndex] = tempArr[i];
currIndex++;
}
}
int main(){
hipError_t cudaStatus;
hipEvent_t time1, time2, time3;
float totalTime, kernelExecutionTime, tfrGPUtoCPU;
uint32_t ThrPerBlk = 32, NumBlocks = 0;
int NumGPUs = 0; hipGetDeviceCount(&NumGPUs);
if (NumGPUs == 0){
std::cout << "\nNo CUDA Device is available\n";
exit(EXIT_FAILURE);
}
uint32_t i = 0;
uint32_t possibilities = 1;
uint8_t numbers[] = {3,3,3};
// uint8_t qtd_numbers = sizeof(numbers);
for(i = 0; i < QTD_NUMBERS; i++){
possibilities *= numbers[i];
}
uint32_t divs[QTD_NUMBERS + 1];
divs[0] = possibilities;
for(i = 0; i < QTD_NUMBERS; i++){
divs[i + 1] = divs[i] / numbers[i];
}
for(i = 0; i < QTD_NUMBERS + 1; i++){ //DEBUG
std::cout << divs[i] << ", ";
}
std::cout << std::endl;
// uint32_t arrSize = possibilities * QTD_NUMBERS * sizeof(uint8_t);
uint32_t MAXgTid = possibilities * QTD_NUMBERS * sizeof(uint8_t);
uint32_t arrSize = ((MAX_SAVES + QTD_NUMBERS -1) / QTD_NUMBERS) * QTD_NUMBERS;
std::cout << "arrSize: " << arrSize << std::endl; //DEBUG
uint8_t* sequencies = (uint8_t*)malloc(arrSize);
uint32_t* GPUcont = nullptr;
uint32_t* GPUdivs = nullptr;
uint8_t* GPUsequencies = nullptr;
NumBlocks = (possibilities + ThrPerBlk - 1) / ThrPerBlk;
std::cout << "NumBlocks: " << NumBlocks << ", ThrPerBlk: " << ThrPerBlk << std::endl; // debug
// getchar();
hipEventCreate(&time1);
hipEventCreate(&time2);
hipEventCreate(&time3);
hipEventRecord(time1, 0);
gpuErrchk(hipMalloc((void **)&GPUcont, sizeof(uint32_t)));
gpuErrchk(hipMemset(GPUcont, 0, sizeof(uint32_t)));
gpuErrchk(hipMalloc((void **)&GPUsequencies, arrSize));
gpuErrchk(hipMalloc((void **)&GPUdivs, (QTD_NUMBERS + 1) * sizeof(uint32_t)));
gpuErrchk(hipMemcpy(GPUdivs, divs, (QTD_NUMBERS + 1) * sizeof(uint32_t), hipMemcpyHostToDevice));
GenSeq <<< NumBlocks, ThrPerBlk >>> (GPUdivs, GPUsequencies, arrSize, GPUcont, MAXgTid);
gpuErrchk(hipDeviceSynchronize());
hipEventRecord(time2, 0);
gpuErrchk(hipMemcpy(sequencies, GPUsequencies, arrSize, hipMemcpyDeviceToHost));
hipEventRecord(time3, 0);
hipEventSynchronize(time1); hipEventSynchronize(time2);
hipEventSynchronize(time3);
hipEventElapsedTime(&totalTime, time1, time3);
hipEventElapsedTime(&kernelExecutionTime, time1, time2);
hipEventElapsedTime(&tfrGPUtoCPU, time2, time3);
gpuErrchk(hipDeviceSynchronize());
for(i = 0; i < arrSize; i++){
if(i % QTD_NUMBERS == 0)
std::cout << std::endl;
else
std::cout << ", ";
std::cout << int(sequencies[i]);
}
printf("\n\n-------------------- ... ----------------------------\n");
printf("Kernel Execution = %5.2f ms\n", kernelExecutionTime);
printf("GPU->CPU Transfer = %5.2f ms ... %4d MB ... %6.2f GB/s\n", tfrGPUtoCPU, arrSize / 1024 / 1024,
(float)arrSize / (tfrGPUtoCPU * 1024.0 * 1024.0));
printf("Total time elapsed = %5.2f ms\n", totalTime);
printf("-------------------- ... ----------------------------\n");
hipFree(GPUdivs);
hipFree(GPUsequencies);
hipEventDestroy(time1);
hipEventDestroy(time2);
hipEventDestroy(time3);
cudaStatus = hipDeviceReset();
if (cudaStatus != hipSuccess){
std::cout << "hipDeviceReset failed!";
free(sequencies); exit(EXIT_FAILURE);
}
free(sequencies);
return(EXIT_SUCCESS);
} | .text
.file "numbers.hip"
# Start of file scope inline assembly
.globl _ZSt21ios_base_library_initv
# End of file scope inline assembly
.globl _Z21__device_stub__GenSeqPjPhjS_j # -- Begin function _Z21__device_stub__GenSeqPjPhjS_j
.p2align 4, 0x90
.type _Z21__device_stub__GenSeqPjPhjS_j,@function
_Z21__device_stub__GenSeqPjPhjS_j: # @_Z21__device_stub__GenSeqPjPhjS_j
.cfi_startproc
# %bb.0:
subq $120, %rsp
.cfi_def_cfa_offset 128
movq %rdi, 72(%rsp)
movq %rsi, 64(%rsp)
movl %edx, 4(%rsp)
movq %rcx, 56(%rsp)
movl %r8d, (%rsp)
leaq 72(%rsp), %rax
movq %rax, 80(%rsp)
leaq 64(%rsp), %rax
movq %rax, 88(%rsp)
leaq 4(%rsp), %rax
movq %rax, 96(%rsp)
leaq 56(%rsp), %rax
movq %rax, 104(%rsp)
movq %rsp, %rax
movq %rax, 112(%rsp)
leaq 40(%rsp), %rdi
leaq 24(%rsp), %rsi
leaq 16(%rsp), %rdx
leaq 8(%rsp), %rcx
callq __hipPopCallConfiguration
movq 40(%rsp), %rsi
movl 48(%rsp), %edx
movq 24(%rsp), %rcx
movl 32(%rsp), %r8d
leaq 80(%rsp), %r9
movl $_Z6GenSeqPjPhjS_j, %edi
pushq 8(%rsp)
.cfi_adjust_cfa_offset 8
pushq 24(%rsp)
.cfi_adjust_cfa_offset 8
callq hipLaunchKernel
addq $136, %rsp
.cfi_adjust_cfa_offset -136
retq
.Lfunc_end0:
.size _Z21__device_stub__GenSeqPjPhjS_j, .Lfunc_end0-_Z21__device_stub__GenSeqPjPhjS_j
.cfi_endproc
# -- End function
.section .rodata.cst8,"aM",@progbits,8
.p2align 3, 0x0 # -- Begin function main
.LCPI1_0:
.quad 0x4090000000000000 # double 1024
.LCPI1_1:
.quad 0x408f500000000000 # double 1002
.text
.globl main
.p2align 4, 0x90
.type main,@function
main: # @main
.cfi_startproc
# %bb.0:
pushq %rbp
.cfi_def_cfa_offset 16
pushq %r15
.cfi_def_cfa_offset 24
pushq %r14
.cfi_def_cfa_offset 32
pushq %r13
.cfi_def_cfa_offset 40
pushq %r12
.cfi_def_cfa_offset 48
pushq %rbx
.cfi_def_cfa_offset 56
subq $216, %rsp
.cfi_def_cfa_offset 272
.cfi_offset %rbx, -56
.cfi_offset %r12, -48
.cfi_offset %r13, -40
.cfi_offset %r14, -32
.cfi_offset %r15, -24
.cfi_offset %rbp, -16
movl $0, 44(%rsp)
leaq 44(%rsp), %rdi
callq hipGetDeviceCount
cmpl $0, 44(%rsp)
je .LBB1_48
# %bb.1:
movw $771, 13(%rsp) # imm = 0x303
movb $3, 15(%rsp)
movl $1, %r12d
xorl %eax, %eax
.p2align 4, 0x90
.LBB1_2: # =>This Inner Loop Header: Depth=1
movzbl 13(%rsp,%rax), %ecx
imull %ecx, %r12d
incq %rax
cmpq $3, %rax
jne .LBB1_2
# %bb.3:
movl %r12d, 112(%rsp)
movl $1, %ecx
movl %r12d, %eax
.p2align 4, 0x90
.LBB1_4: # =>This Inner Loop Header: Depth=1
movzbl 12(%rsp,%rcx), %esi
xorl %edx, %edx
divl %esi
movl %eax, 112(%rsp,%rcx,4)
incq %rcx
cmpq $4, %rcx
jne .LBB1_4
# %bb.5: # %.preheader.preheader
xorl %ebx, %ebx
.p2align 4, 0x90
.LBB1_6: # %.preheader
# =>This Inner Loop Header: Depth=1
movl 112(%rsp,%rbx,4), %esi
movl $_ZSt4cout, %edi
callq _ZNSo9_M_insertImEERSoT_
movl $.L.str.1, %esi
movl $2, %edx
movq %rax, %rdi
callq _ZSt16__ostream_insertIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_PKS3_l
incq %rbx
cmpq $4, %rbx
jne .LBB1_6
# %bb.7:
movq _ZSt4cout(%rip), %rax
movq -24(%rax), %rax
movq _ZSt4cout+240(%rax), %rbx
testq %rbx, %rbx
je .LBB1_49
# %bb.8: # %_ZSt13__check_facetISt5ctypeIcEERKT_PS3_.exit.i.i
cmpb $0, 56(%rbx)
je .LBB1_10
# %bb.9:
movzbl 67(%rbx), %eax
jmp .LBB1_11
.LBB1_10:
movq %rbx, %rdi
callq _ZNKSt5ctypeIcE13_M_widen_initEv
movq (%rbx), %rax
movq %rbx, %rdi
movl $10, %esi
callq *48(%rax)
.LBB1_11: # %_ZSt4endlIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_.exit
movsbl %al, %esi
movl $_ZSt4cout, %edi
callq _ZNSo3putEc
movq %rax, %rdi
callq _ZNSo5flushEv
movl $_ZSt4cout, %edi
movl $.L.str.2, %esi
movl $9, %edx
callq _ZSt16__ostream_insertIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_PKS3_l
movl $_ZSt4cout, %edi
movl $1002, %esi # imm = 0x3EA
callq _ZNSo9_M_insertImEERSoT_
movq (%rax), %rcx
movq -24(%rcx), %rcx
movq 240(%rax,%rcx), %rbx
testq %rbx, %rbx
je .LBB1_49
# %bb.12: # %_ZSt13__check_facetISt5ctypeIcEERKT_PS3_.exit.i.i58
cmpb $0, 56(%rbx)
je .LBB1_14
# %bb.13:
movzbl 67(%rbx), %ecx
jmp .LBB1_15
.LBB1_14:
movq %rbx, %rdi
movq %rax, %r14
callq _ZNKSt5ctypeIcE13_M_widen_initEv
movq (%rbx), %rax
movq %rbx, %rdi
movl $10, %esi
callq *48(%rax)
movl %eax, %ecx
movq %r14, %rax
.LBB1_15: # %_ZSt4endlIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_.exit61
movsbl %cl, %esi
movq %rax, %rdi
callq _ZNSo3putEc
movq %rax, %rdi
callq _ZNSo5flushEv
movl $1002, %edi # imm = 0x3EA
callq malloc
movq %rax, %rbx
movq $0, 64(%rsp)
movq $0, 56(%rsp)
movq $0, 48(%rsp)
leal 31(%r12), %r14d
shrl $5, %r14d
movl $_ZSt4cout, %edi
movl $.L.str.3, %esi
movl $11, %edx
callq _ZSt16__ostream_insertIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_PKS3_l
movl $_ZSt4cout, %edi
movq %r14, %rsi
callq _ZNSo9_M_insertImEERSoT_
movq %rax, %r15
movl $.L.str.4, %esi
movl $13, %edx
movq %rax, %rdi
callq _ZSt16__ostream_insertIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_PKS3_l
movl $32, %esi
movq %r15, %rdi
callq _ZNSo9_M_insertImEERSoT_
movq (%rax), %rcx
movq -24(%rcx), %rcx
movq 240(%rax,%rcx), %r15
testq %r15, %r15
je .LBB1_49
# %bb.16: # %_ZSt13__check_facetISt5ctypeIcEERKT_PS3_.exit.i.i63
cmpb $0, 56(%r15)
je .LBB1_18
# %bb.17:
movzbl 67(%r15), %ecx
jmp .LBB1_19
.LBB1_18:
movq %r15, %rdi
movq %rax, %r13
callq _ZNKSt5ctypeIcE13_M_widen_initEv
movq (%r15), %rax
movq %r15, %rdi
movl $10, %esi
callq *48(%rax)
movl %eax, %ecx
movq %r13, %rax
.LBB1_19: # %_ZSt4endlIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_.exit66
movsbl %cl, %esi
movq %rax, %rdi
callq _ZNSo3putEc
movq %rax, %rdi
callq _ZNSo5flushEv
leaq 32(%rsp), %rdi
callq hipEventCreate
leaq 24(%rsp), %rdi
callq hipEventCreate
leaq 16(%rsp), %rdi
callq hipEventCreate
movq 32(%rsp), %rdi
xorl %esi, %esi
callq hipEventRecord
leaq 64(%rsp), %rdi
movl $4, %esi
callq hipMalloc
testl %eax, %eax
jne .LBB1_20
# %bb.22: # %_Z9gpuAssert10hipError_tPKcib.exit
movq 64(%rsp), %rdi
movl $4, %edx
xorl %esi, %esi
callq hipMemset
testl %eax, %eax
jne .LBB1_23
# %bb.24: # %_Z9gpuAssert10hipError_tPKcib.exit44
leaq 48(%rsp), %rdi
movl $1002, %esi # imm = 0x3EA
callq hipMalloc
testl %eax, %eax
jne .LBB1_25
# %bb.26: # %_Z9gpuAssert10hipError_tPKcib.exit46
leaq 56(%rsp), %rdi
movl $16, %esi
callq hipMalloc
testl %eax, %eax
jne .LBB1_27
# %bb.28: # %_Z9gpuAssert10hipError_tPKcib.exit48
movq 56(%rsp), %rdi
leaq 112(%rsp), %rsi
movl $16, %edx
movl $1, %ecx
callq hipMemcpy
testl %eax, %eax
jne .LBB1_29
# %bb.30: # %_Z9gpuAssert10hipError_tPKcib.exit50
movabsq $4294967296, %rdx # imm = 0x100000000
orq %rdx, %r14
orq $32, %rdx
movq %r14, %rdi
movl $1, %esi
movl $1, %ecx
xorl %r8d, %r8d
xorl %r9d, %r9d
callq __hipPushCallConfiguration
testl %eax, %eax
jne .LBB1_32
# %bb.31:
leal (%r12,%r12,2), %eax
movq 56(%rsp), %rcx
movq 48(%rsp), %rdx
movq 64(%rsp), %rsi
movq %rcx, 168(%rsp)
movq %rdx, 160(%rsp)
movl $1002, 76(%rsp) # imm = 0x3EA
movq %rsi, 152(%rsp)
movl %eax, 72(%rsp)
leaq 168(%rsp), %rax
movq %rax, 176(%rsp)
leaq 160(%rsp), %rax
movq %rax, 184(%rsp)
leaq 76(%rsp), %rax
movq %rax, 192(%rsp)
leaq 152(%rsp), %rax
movq %rax, 200(%rsp)
leaq 72(%rsp), %rax
movq %rax, 208(%rsp)
leaq 96(%rsp), %rdi
leaq 80(%rsp), %rsi
leaq 144(%rsp), %rdx
leaq 136(%rsp), %rcx
callq __hipPopCallConfiguration
movq 96(%rsp), %rsi
movl 104(%rsp), %edx
movq 80(%rsp), %rcx
movl 88(%rsp), %r8d
leaq 176(%rsp), %r9
movl $_Z6GenSeqPjPhjS_j, %edi
pushq 136(%rsp)
.cfi_adjust_cfa_offset 8
pushq 152(%rsp)
.cfi_adjust_cfa_offset 8
callq hipLaunchKernel
addq $16, %rsp
.cfi_adjust_cfa_offset -16
.LBB1_32:
callq hipDeviceSynchronize
testl %eax, %eax
jne .LBB1_33
# %bb.34: # %_Z9gpuAssert10hipError_tPKcib.exit52
movq 24(%rsp), %rdi
xorl %esi, %esi
callq hipEventRecord
movq 48(%rsp), %rsi
movl $1002, %edx # imm = 0x3EA
movq %rbx, %rdi
movl $2, %ecx
callq hipMemcpy
testl %eax, %eax
jne .LBB1_35
# %bb.36: # %_Z9gpuAssert10hipError_tPKcib.exit54
movq 16(%rsp), %rdi
xorl %esi, %esi
callq hipEventRecord
movq 32(%rsp), %rdi
callq hipEventSynchronize
movq 24(%rsp), %rdi
callq hipEventSynchronize
movq 16(%rsp), %rdi
callq hipEventSynchronize
movq 32(%rsp), %rsi
movq 16(%rsp), %rdx
leaq 176(%rsp), %rdi
callq hipEventElapsedTime
movq 32(%rsp), %rsi
movq 24(%rsp), %rdx
leaq 96(%rsp), %rdi
callq hipEventElapsedTime
movq 24(%rsp), %rsi
movq 16(%rsp), %rdx
leaq 80(%rsp), %rdi
callq hipEventElapsedTime
callq hipDeviceSynchronize
testl %eax, %eax
jne .LBB1_50
# %bb.37: # %_Z9gpuAssert10hipError_tPKcib.exit56.preheader.preheader
xorl %r15d, %r15d
movl $2863311531, %r12d # imm = 0xAAAAAAAB
jmp .LBB1_38
.p2align 4, 0x90
.LBB1_44: # in Loop: Header=BB1_38 Depth=1
movl $_ZSt4cout, %edi
movl $.L.str.1, %esi
movl $2, %edx
callq _ZSt16__ostream_insertIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_PKS3_l
.LBB1_45: # %_Z9gpuAssert10hipError_tPKcib.exit56
# in Loop: Header=BB1_38 Depth=1
movzbl (%rbx,%r15), %esi
movl $_ZSt4cout, %edi
callq _ZNSolsEi
incq %r15
cmpq $1002, %r15 # imm = 0x3EA
je .LBB1_46
.LBB1_38: # %_Z9gpuAssert10hipError_tPKcib.exit56.preheader
# =>This Inner Loop Header: Depth=1
movl %r15d, %eax
imulq %r12, %rax
shrq $33, %rax
leal (%rax,%rax,2), %eax
cmpl %eax, %r15d
jne .LBB1_44
# %bb.39: # in Loop: Header=BB1_38 Depth=1
movq _ZSt4cout(%rip), %rax
movq -24(%rax), %rax
movq _ZSt4cout+240(%rax), %r14
testq %r14, %r14
je .LBB1_49
# %bb.40: # %_ZSt13__check_facetISt5ctypeIcEERKT_PS3_.exit.i.i68
# in Loop: Header=BB1_38 Depth=1
cmpb $0, 56(%r14)
je .LBB1_42
# %bb.41: # in Loop: Header=BB1_38 Depth=1
movzbl 67(%r14), %eax
jmp .LBB1_43
.LBB1_42: # in Loop: Header=BB1_38 Depth=1
movq %r14, %rdi
callq _ZNKSt5ctypeIcE13_M_widen_initEv
movq (%r14), %rax
movq %r14, %rdi
movl $10, %esi
callq *48(%rax)
.LBB1_43: # %_ZSt4endlIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_.exit71
# in Loop: Header=BB1_38 Depth=1
movsbl %al, %esi
movl $_ZSt4cout, %edi
callq _ZNSo3putEc
movq %rax, %rdi
callq _ZNSo5flushEv
jmp .LBB1_45
.LBB1_46:
movl $.Lstr, %edi
callq puts@PLT
movss 96(%rsp), %xmm0 # xmm0 = mem[0],zero,zero,zero
cvtss2sd %xmm0, %xmm0
movl $.L.str.7, %edi
movb $1, %al
callq printf
movss 80(%rsp), %xmm0 # xmm0 = mem[0],zero,zero,zero
cvtss2sd %xmm0, %xmm0
movsd .LCPI1_0(%rip), %xmm1 # xmm1 = mem[0],zero
movaps %xmm0, %xmm2
mulsd %xmm1, %xmm2
mulsd %xmm1, %xmm2
movsd .LCPI1_1(%rip), %xmm1 # xmm1 = mem[0],zero
divsd %xmm2, %xmm1
movl $.L.str.8, %edi
xorl %esi, %esi
movb $2, %al
callq printf
movss 176(%rsp), %xmm0 # xmm0 = mem[0],zero,zero,zero
cvtss2sd %xmm0, %xmm0
movl $.L.str.9, %edi
movb $1, %al
callq printf
movl $.Lstr.1, %edi
callq puts@PLT
movq 56(%rsp), %rdi
callq hipFree
movq 48(%rsp), %rdi
callq hipFree
movq 32(%rsp), %rdi
callq hipEventDestroy
movq 24(%rsp), %rdi
callq hipEventDestroy
movq 16(%rsp), %rdi
callq hipEventDestroy
callq hipDeviceReset
testl %eax, %eax
jne .LBB1_51
# %bb.47:
movq %rbx, %rdi
callq free
xorl %eax, %eax
addq $216, %rsp
.cfi_def_cfa_offset 56
popq %rbx
.cfi_def_cfa_offset 48
popq %r12
.cfi_def_cfa_offset 40
popq %r13
.cfi_def_cfa_offset 32
popq %r14
.cfi_def_cfa_offset 24
popq %r15
.cfi_def_cfa_offset 16
popq %rbp
.cfi_def_cfa_offset 8
retq
.LBB1_49:
.cfi_def_cfa_offset 272
callq _ZSt16__throw_bad_castv
.LBB1_48:
movl $_ZSt4cout, %edi
movl $.L.str, %esi
callq _ZStlsISt11char_traitsIcEERSt13basic_ostreamIcT_ES5_PKc
movl $1, %edi
callq exit
.LBB1_20:
movq stderr(%rip), %rbx
movl %eax, %edi
movl %eax, %ebp
callq hipGetErrorString
movl $.L.str.12, %esi
movl $.L.str.5, %ecx
movq %rbx, %rdi
movq %rax, %rdx
movl $107, %r8d
jmp .LBB1_21
.LBB1_23:
movq stderr(%rip), %rbx
movl %eax, %edi
movl %eax, %ebp
callq hipGetErrorString
movl $.L.str.12, %esi
movl $.L.str.5, %ecx
movq %rbx, %rdi
movq %rax, %rdx
movl $108, %r8d
jmp .LBB1_21
.LBB1_25:
movq stderr(%rip), %rbx
movl %eax, %edi
movl %eax, %ebp
callq hipGetErrorString
movl $.L.str.12, %esi
movl $.L.str.5, %ecx
movq %rbx, %rdi
movq %rax, %rdx
movl $110, %r8d
jmp .LBB1_21
.LBB1_27:
movq stderr(%rip), %rbx
movl %eax, %edi
movl %eax, %ebp
callq hipGetErrorString
movl $.L.str.12, %esi
movl $.L.str.5, %ecx
movq %rbx, %rdi
movq %rax, %rdx
movl $111, %r8d
jmp .LBB1_21
.LBB1_29:
movq stderr(%rip), %rbx
movl %eax, %edi
movl %eax, %ebp
callq hipGetErrorString
movl $.L.str.12, %esi
movl $.L.str.5, %ecx
movq %rbx, %rdi
movq %rax, %rdx
movl $112, %r8d
jmp .LBB1_21
.LBB1_33:
movq stderr(%rip), %rbx
movl %eax, %edi
movl %eax, %ebp
callq hipGetErrorString
movl $.L.str.12, %esi
movl $.L.str.5, %ecx
movq %rbx, %rdi
movq %rax, %rdx
movl $116, %r8d
jmp .LBB1_21
.LBB1_35:
movq stderr(%rip), %rbx
movl %eax, %edi
movl %eax, %ebp
callq hipGetErrorString
movl $.L.str.12, %esi
movl $.L.str.5, %ecx
movq %rbx, %rdi
movq %rax, %rdx
movl $119, %r8d
jmp .LBB1_21
.LBB1_50:
movq stderr(%rip), %rbx
movl %eax, %edi
movl %eax, %ebp
callq hipGetErrorString
movl $.L.str.12, %esi
movl $.L.str.5, %ecx
movq %rbx, %rdi
movq %rax, %rdx
movl $128, %r8d
.LBB1_21:
xorl %eax, %eax
callq fprintf
movl %ebp, %edi
callq exit
.LBB1_51:
movl $_ZSt4cout, %edi
movl $.L.str.11, %esi
callq _ZStlsISt11char_traitsIcEERSt13basic_ostreamIcT_ES5_PKc
movq %rbx, %rdi
callq free
movl $1, %edi
callq exit
.Lfunc_end1:
.size main, .Lfunc_end1-main
.cfi_endproc
# -- End function
.p2align 4, 0x90 # -- Begin function __hip_module_ctor
.type __hip_module_ctor,@function
__hip_module_ctor: # @__hip_module_ctor
.cfi_startproc
# %bb.0:
subq $40, %rsp
.cfi_def_cfa_offset 48
cmpq $0, __hip_gpubin_handle(%rip)
jne .LBB2_2
# %bb.1:
movl $__hip_fatbin_wrapper, %edi
callq __hipRegisterFatBinary
movq %rax, __hip_gpubin_handle(%rip)
.LBB2_2:
movq __hip_gpubin_handle(%rip), %rdi
xorps %xmm0, %xmm0
movups %xmm0, 16(%rsp)
movups %xmm0, (%rsp)
movl $_Z6GenSeqPjPhjS_j, %esi
movl $.L__unnamed_1, %edx
movl $.L__unnamed_1, %ecx
movl $-1, %r8d
xorl %r9d, %r9d
callq __hipRegisterFunction
movl $__hip_module_dtor, %edi
addq $40, %rsp
.cfi_def_cfa_offset 8
jmp atexit # TAILCALL
.Lfunc_end2:
.size __hip_module_ctor, .Lfunc_end2-__hip_module_ctor
.cfi_endproc
# -- End function
.p2align 4, 0x90 # -- Begin function __hip_module_dtor
.type __hip_module_dtor,@function
__hip_module_dtor: # @__hip_module_dtor
.cfi_startproc
# %bb.0:
movq __hip_gpubin_handle(%rip), %rdi
testq %rdi, %rdi
je .LBB3_2
# %bb.1:
pushq %rax
.cfi_def_cfa_offset 16
callq __hipUnregisterFatBinary
movq $0, __hip_gpubin_handle(%rip)
addq $8, %rsp
.cfi_def_cfa_offset 8
.LBB3_2:
retq
.Lfunc_end3:
.size __hip_module_dtor, .Lfunc_end3-__hip_module_dtor
.cfi_endproc
# -- End function
.type _Z6GenSeqPjPhjS_j,@object # @_Z6GenSeqPjPhjS_j
.section .rodata,"a",@progbits
.globl _Z6GenSeqPjPhjS_j
.p2align 3, 0x0
_Z6GenSeqPjPhjS_j:
.quad _Z21__device_stub__GenSeqPjPhjS_j
.size _Z6GenSeqPjPhjS_j, 8
.type .L.str,@object # @.str
.section .rodata.str1.1,"aMS",@progbits,1
.L.str:
.asciz "\nNo CUDA Device is available\n"
.size .L.str, 30
.type .L.str.1,@object # @.str.1
.L.str.1:
.asciz ", "
.size .L.str.1, 3
.type .L.str.2,@object # @.str.2
.L.str.2:
.asciz "arrSize: "
.size .L.str.2, 10
.type .L.str.3,@object # @.str.3
.L.str.3:
.asciz "NumBlocks: "
.size .L.str.3, 12
.type .L.str.4,@object # @.str.4
.L.str.4:
.asciz ", ThrPerBlk: "
.size .L.str.4, 14
.type .L.str.5,@object # @.str.5
.L.str.5:
.asciz "/home/ubuntu/Datasets/stackv2/train-structured-repos-hip/vinicius-r-silva/cuda_studies/master/number_sequencies/numbers.hip"
.size .L.str.5, 124
.type .L.str.7,@object # @.str.7
.L.str.7:
.asciz "Kernel Execution = %5.2f ms\n"
.size .L.str.7, 29
.type .L.str.8,@object # @.str.8
.L.str.8:
.asciz "GPU->CPU Transfer = %5.2f ms ... %4d MB ... %6.2f GB/s\n"
.size .L.str.8, 56
.type .L.str.9,@object # @.str.9
.L.str.9:
.asciz "Total time elapsed = %5.2f ms\n"
.size .L.str.9, 31
.type .L.str.11,@object # @.str.11
.L.str.11:
.asciz "hipDeviceReset failed!"
.size .L.str.11, 23
.type .L.str.12,@object # @.str.12
.L.str.12:
.asciz "GPUassert: %s %s %d\n"
.size .L.str.12, 21
.type .L__unnamed_1,@object # @0
.L__unnamed_1:
.asciz "_Z6GenSeqPjPhjS_j"
.size .L__unnamed_1, 18
.type __hip_fatbin_wrapper,@object # @__hip_fatbin_wrapper
.section .hipFatBinSegment,"a",@progbits
.p2align 3, 0x0
__hip_fatbin_wrapper:
.long 1212764230 # 0x48495046
.long 1 # 0x1
.quad __hip_fatbin
.quad 0
.size __hip_fatbin_wrapper, 24
.type __hip_gpubin_handle,@object # @__hip_gpubin_handle
.local __hip_gpubin_handle
.comm __hip_gpubin_handle,8,8
.section .init_array,"aw",@init_array
.p2align 3, 0x0
.quad __hip_module_ctor
.type __hip_cuid_,@object # @__hip_cuid_
.bss
.globl __hip_cuid_
__hip_cuid_:
.byte 0 # 0x0
.size __hip_cuid_, 1
.type .Lstr,@object # @str
.section .rodata.str1.1,"aMS",@progbits,1
.Lstr:
.asciz "\n\n-------------------- ... ----------------------------"
.size .Lstr, 56
.type .Lstr.1,@object # @str.1
.Lstr.1:
.asciz "-------------------- ... ----------------------------"
.size .Lstr.1, 54
.section ".linker-options","e",@llvm_linker_options
.ident "AMD clang version 18.0.0git (https://github.com/RadeonOpenCompute/llvm-project roc-6.3.2 25012 e5bf7e55c91490b07c49d8960fa7983d864936c4)"
.section ".note.GNU-stack","",@progbits
.addrsig
.addrsig_sym _Z21__device_stub__GenSeqPjPhjS_j
.addrsig_sym __hip_module_ctor
.addrsig_sym __hip_module_dtor
.addrsig_sym _Z6GenSeqPjPhjS_j
.addrsig_sym _ZSt4cout
.addrsig_sym __hip_fatbin
.addrsig_sym __hip_fatbin_wrapper
.addrsig_sym __hip_cuid_ |
You are a helpful coding assistant specialized in converting from CUDA host assembly to AMD host assembly. | .file "tmpxft_000329f8_00000000-6_numbers.cudafe1.cpp"
.text
#APP
.globl _ZSt21ios_base_library_initv
#NO_APP
.type _ZL26__cudaUnregisterBinaryUtilv, @function
_ZL26__cudaUnregisterBinaryUtilv:
.LFB3673:
.cfi_startproc
endbr64
subq $8, %rsp
.cfi_def_cfa_offset 16
movq _ZL20__cudaFatCubinHandle(%rip), %rdi
call __cudaUnregisterFatBinary@PLT
addq $8, %rsp
.cfi_def_cfa_offset 8
ret
.cfi_endproc
.LFE3673:
.size _ZL26__cudaUnregisterBinaryUtilv, .-_ZL26__cudaUnregisterBinaryUtilv
.section .rodata._Z9gpuAssert9cudaErrorPKcib.str1.1,"aMS",@progbits,1
.LC0:
.string "GPUassert: %s %s %d\n"
.section .text._Z9gpuAssert9cudaErrorPKcib,"axG",@progbits,_Z9gpuAssert9cudaErrorPKcib,comdat
.weak _Z9gpuAssert9cudaErrorPKcib
.type _Z9gpuAssert9cudaErrorPKcib, @function
_Z9gpuAssert9cudaErrorPKcib:
.LFB3669:
.cfi_startproc
endbr64
testl %edi, %edi
jne .L9
ret
.L9:
pushq %r13
.cfi_def_cfa_offset 16
.cfi_offset 13, -16
pushq %r12
.cfi_def_cfa_offset 24
.cfi_offset 12, -24
pushq %rbp
.cfi_def_cfa_offset 32
.cfi_offset 6, -32
pushq %rbx
.cfi_def_cfa_offset 40
.cfi_offset 3, -40
subq $8, %rsp
.cfi_def_cfa_offset 48
movl %edi, %ebx
movq %rsi, %r13
movl %edx, %r12d
movl %ecx, %ebp
call cudaGetErrorString@PLT
movq %rax, %rcx
movl %r12d, %r9d
movq %r13, %r8
leaq .LC0(%rip), %rdx
movl $2, %esi
movq stderr(%rip), %rdi
movl $0, %eax
call __fprintf_chk@PLT
testb %bpl, %bpl
jne .L10
addq $8, %rsp
.cfi_remember_state
.cfi_def_cfa_offset 40
popq %rbx
.cfi_def_cfa_offset 32
popq %rbp
.cfi_def_cfa_offset 24
popq %r12
.cfi_def_cfa_offset 16
popq %r13
.cfi_def_cfa_offset 8
ret
.L10:
.cfi_restore_state
movl %ebx, %edi
call exit@PLT
.cfi_endproc
.LFE3669:
.size _Z9gpuAssert9cudaErrorPKcib, .-_Z9gpuAssert9cudaErrorPKcib
.text
.globl _Z31__device_stub__Z6GenSeqPjPhjS_jPjPhjS_j
.type _Z31__device_stub__Z6GenSeqPjPhjS_jPjPhjS_j, @function
_Z31__device_stub__Z6GenSeqPjPhjS_jPjPhjS_j:
.LFB3695:
.cfi_startproc
endbr64
subq $152, %rsp
.cfi_def_cfa_offset 160
movq %rdi, 24(%rsp)
movq %rsi, 16(%rsp)
movl %edx, 12(%rsp)
movq %rcx, (%rsp)
movl %r8d, 8(%rsp)
movq %fs:40, %rax
movq %rax, 136(%rsp)
xorl %eax, %eax
leaq 24(%rsp), %rax
movq %rax, 96(%rsp)
leaq 16(%rsp), %rax
movq %rax, 104(%rsp)
leaq 12(%rsp), %rax
movq %rax, 112(%rsp)
movq %rsp, %rax
movq %rax, 120(%rsp)
leaq 8(%rsp), %rax
movq %rax, 128(%rsp)
movl $1, 48(%rsp)
movl $1, 52(%rsp)
movl $1, 56(%rsp)
movl $1, 60(%rsp)
movl $1, 64(%rsp)
movl $1, 68(%rsp)
leaq 40(%rsp), %rcx
leaq 32(%rsp), %rdx
leaq 60(%rsp), %rsi
leaq 48(%rsp), %rdi
call __cudaPopCallConfiguration@PLT
testl %eax, %eax
je .L15
.L11:
movq 136(%rsp), %rax
subq %fs:40, %rax
jne .L16
addq $152, %rsp
.cfi_remember_state
.cfi_def_cfa_offset 8
ret
.L15:
.cfi_restore_state
pushq 40(%rsp)
.cfi_def_cfa_offset 168
pushq 40(%rsp)
.cfi_def_cfa_offset 176
leaq 112(%rsp), %r9
movq 76(%rsp), %rcx
movl 84(%rsp), %r8d
movq 64(%rsp), %rsi
movl 72(%rsp), %edx
leaq _Z6GenSeqPjPhjS_j(%rip), %rdi
call cudaLaunchKernel@PLT
addq $16, %rsp
.cfi_def_cfa_offset 160
jmp .L11
.L16:
call __stack_chk_fail@PLT
.cfi_endproc
.LFE3695:
.size _Z31__device_stub__Z6GenSeqPjPhjS_jPjPhjS_j, .-_Z31__device_stub__Z6GenSeqPjPhjS_jPjPhjS_j
.globl _Z6GenSeqPjPhjS_j
.type _Z6GenSeqPjPhjS_j, @function
_Z6GenSeqPjPhjS_j:
.LFB3696:
.cfi_startproc
endbr64
subq $8, %rsp
.cfi_def_cfa_offset 16
call _Z31__device_stub__Z6GenSeqPjPhjS_jPjPhjS_j
addq $8, %rsp
.cfi_def_cfa_offset 8
ret
.cfi_endproc
.LFE3696:
.size _Z6GenSeqPjPhjS_j, .-_Z6GenSeqPjPhjS_j
.section .rodata.str1.1,"aMS",@progbits,1
.LC1:
.string "\nNo CUDA Device is available\n"
.LC2:
.string ", "
.LC3:
.string "arrSize: "
.LC4:
.string "NumBlocks: "
.LC5:
.string ", ThrPerBlk: "
.section .rodata.str1.8,"aMS",@progbits,1
.align 8
.LC6:
.string "/home/ubuntu/Datasets/stackv2/train-structured/vinicius-r-silva/cuda_studies/master/number_sequencies/numbers.cu"
.align 8
.LC7:
.string "\n\n-------------------- ... ----------------------------\n"
.section .rodata.str1.1
.LC8:
.string "Kernel Execution = %5.2f ms\n"
.section .rodata.str1.8
.align 8
.LC11:
.string "GPU->CPU Transfer = %5.2f ms ... %4d MB ... %6.2f GB/s\n"
.align 8
.LC12:
.string "Total time elapsed = %5.2f ms\n"
.align 8
.LC13:
.string "-------------------- ... ----------------------------\n"
.section .rodata.str1.1
.LC14:
.string "cudaDeviceReset failed!"
.text
.globl main
.type main, @function
main:
.LFB3670:
.cfi_startproc
endbr64
pushq %r15
.cfi_def_cfa_offset 16
.cfi_offset 15, -16
pushq %r14
.cfi_def_cfa_offset 24
.cfi_offset 14, -24
pushq %r13
.cfi_def_cfa_offset 32
.cfi_offset 13, -32
pushq %r12
.cfi_def_cfa_offset 40
.cfi_offset 12, -40
pushq %rbp
.cfi_def_cfa_offset 48
.cfi_offset 6, -48
pushq %rbx
.cfi_def_cfa_offset 56
.cfi_offset 3, -56
subq $120, %rsp
.cfi_def_cfa_offset 176
movq %fs:40, %rax
movq %rax, 104(%rsp)
xorl %eax, %eax
movl $0, 4(%rsp)
leaq 4(%rsp), %rdi
call cudaGetDeviceCount@PLT
cmpl $0, 4(%rsp)
je .L35
movw $771, 101(%rsp)
movb $3, 103(%rsp)
movl $3, %ecx
movl $3, %edi
movl $3, %esi
imull $9, %ecx, %ebp
movl %ebp, 80(%rsp)
movl %ebp, %eax
movl $0, %edx
divl %edi
movl %eax, 84(%rsp)
movl $0, %edx
divl %ecx
movl %eax, 88(%rsp)
movl $0, %edx
divl %esi
movl %eax, 92(%rsp)
leaq 80(%rsp), %rbx
leaq 96(%rsp), %r14
leaq _ZSt4cout(%rip), %r13
leaq .LC2(%rip), %r12
.L21:
movl (%rbx), %esi
movq %r13, %rdi
call _ZNSo9_M_insertImEERSoT_@PLT
movq %rax, %rdi
movl $2, %edx
movq %r12, %rsi
call _ZSt16__ostream_insertIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_PKS3_l@PLT
addq $4, %rbx
cmpq %rbx, %r14
jne .L21
leaq _ZSt4cout(%rip), %rbx
movq %rbx, %rdi
call _ZSt4endlIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_@PLT
leaq .LC3(%rip), %rsi
movq %rbx, %rdi
call _ZStlsISt11char_traitsIcEERSt13basic_ostreamIcT_ES5_PKc@PLT
movq %rax, %rdi
movl $1002, %esi
call _ZNSo9_M_insertImEERSoT_@PLT
movq %rax, %rdi
call _ZSt4endlIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_@PLT
movl $1002, %edi
call malloc@PLT
movq %rax, %r12
movq $0, 32(%rsp)
movq $0, 40(%rsp)
movq $0, 48(%rsp)
leal 31(%rbp), %r13d
shrl $5, %r13d
leaq .LC4(%rip), %rsi
movq %rbx, %rdi
call _ZStlsISt11char_traitsIcEERSt13basic_ostreamIcT_ES5_PKc@PLT
movq %rax, %rdi
movl %r13d, %esi
call _ZNSo9_M_insertImEERSoT_@PLT
movq %rax, %rdi
leaq .LC5(%rip), %rsi
call _ZStlsISt11char_traitsIcEERSt13basic_ostreamIcT_ES5_PKc@PLT
movq %rax, %rdi
movl $32, %esi
call _ZNSo9_M_insertImEERSoT_@PLT
movq %rax, %rdi
call _ZSt4endlIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_@PLT
leaq 8(%rsp), %rdi
call cudaEventCreate@PLT
leaq 16(%rsp), %rdi
call cudaEventCreate@PLT
leaq 24(%rsp), %rdi
call cudaEventCreate@PLT
movl $0, %esi
movq 8(%rsp), %rdi
call cudaEventRecord@PLT
leaq 32(%rsp), %rdi
movl $4, %esi
call cudaMalloc@PLT
movl %eax, %edi
movl $1, %ecx
movl $107, %edx
leaq .LC6(%rip), %rbx
movq %rbx, %rsi
call _Z9gpuAssert9cudaErrorPKcib
movl $4, %edx
movl $0, %esi
movq 32(%rsp), %rdi
call cudaMemset@PLT
movl %eax, %edi
movl $1, %ecx
movl $108, %edx
movq %rbx, %rsi
call _Z9gpuAssert9cudaErrorPKcib
leaq 48(%rsp), %rdi
movl $1002, %esi
call cudaMalloc@PLT
movl %eax, %edi
movl $1, %ecx
movl $110, %edx
movq %rbx, %rsi
call _Z9gpuAssert9cudaErrorPKcib
leaq 40(%rsp), %rdi
movl $16, %esi
call cudaMalloc@PLT
movl %eax, %edi
movl $1, %ecx
movl $111, %edx
movq %rbx, %rsi
call _Z9gpuAssert9cudaErrorPKcib
leaq 80(%rsp), %rsi
movl $1, %ecx
movl $16, %edx
movq 40(%rsp), %rdi
call cudaMemcpy@PLT
movl %eax, %edi
movl $1, %ecx
movl $112, %edx
movq %rbx, %rsi
call _Z9gpuAssert9cudaErrorPKcib
movl $32, 68(%rsp)
movl $1, 72(%rsp)
movl $1, 76(%rsp)
movl %r13d, 56(%rsp)
movl $1, 60(%rsp)
movl $1, 64(%rsp)
movl $0, %r9d
movl $0, %r8d
movq 68(%rsp), %rdx
movl $1, %ecx
movq 56(%rsp), %rdi
movl $1, %esi
call __cudaPushCallConfiguration@PLT
testl %eax, %eax
je .L36
.L22:
call cudaDeviceSynchronize@PLT
movl %eax, %edi
movl $1, %ecx
movl $116, %edx
leaq .LC6(%rip), %rbx
movq %rbx, %rsi
call _Z9gpuAssert9cudaErrorPKcib
movl $0, %esi
movq 16(%rsp), %rdi
call cudaEventRecord@PLT
movl $2, %ecx
movl $1002, %edx
movq 48(%rsp), %rsi
movq %r12, %rdi
call cudaMemcpy@PLT
movl %eax, %edi
movl $1, %ecx
movl $119, %edx
movq %rbx, %rsi
call _Z9gpuAssert9cudaErrorPKcib
movl $0, %esi
movq 24(%rsp), %rdi
call cudaEventRecord@PLT
movq 8(%rsp), %rdi
call cudaEventSynchronize@PLT
movq 16(%rsp), %rdi
call cudaEventSynchronize@PLT
movq 24(%rsp), %rdi
call cudaEventSynchronize@PLT
movq %rsp, %rdi
movq 24(%rsp), %rdx
movq 8(%rsp), %rsi
call cudaEventElapsedTime@PLT
leaq 56(%rsp), %rdi
movq 16(%rsp), %rdx
movq 8(%rsp), %rsi
call cudaEventElapsedTime@PLT
leaq 68(%rsp), %rdi
movq 24(%rsp), %rdx
movq 16(%rsp), %rsi
call cudaEventElapsedTime@PLT
call cudaDeviceSynchronize@PLT
movl %eax, %edi
movl $1, %ecx
movl $128, %edx
movq %rbx, %rsi
call _Z9gpuAssert9cudaErrorPKcib
movl $0, %ebx
movl $2863311531, %r13d
leaq .LC2(%rip), %r14
leaq _ZSt4cout(%rip), %rbp
jmp .L29
.L35:
leaq .LC1(%rip), %rsi
leaq _ZSt4cout(%rip), %rdi
call _ZStlsISt11char_traitsIcEERSt13basic_ostreamIcT_ES5_PKc@PLT
movl $1, %edi
call exit@PLT
.L36:
imull $3, %ebp, %r8d
movq 32(%rsp), %rcx
movl $1002, %edx
movq 48(%rsp), %rsi
movq 40(%rsp), %rdi
call _Z31__device_stub__Z6GenSeqPjPhjS_jPjPhjS_j
jmp .L22
.L39:
movq 104(%rsp), %rax
subq %fs:40, %rax
jne .L37
call _ZSt16__throw_bad_castv@PLT
.L37:
call __stack_chk_fail@PLT
.L26:
movq %r15, %rdi
call _ZNKSt5ctypeIcE13_M_widen_initEv@PLT
movq (%r15), %rax
movl $10, %esi
movq %r15, %rdi
call *48(%rax)
movl %eax, %esi
jmp .L27
.L23:
movl $2, %edx
movq %r14, %rsi
movq %rbp, %rdi
call _ZSt16__ostream_insertIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_PKS3_l@PLT
.L28:
movzbl (%r12,%rbx), %esi
movq %rbp, %rdi
call _ZNSolsEi@PLT
addq $1, %rbx
cmpq $1002, %rbx
je .L38
.L29:
movl %ebx, %eax
imulq %r13, %rax
shrq $33, %rax
leal (%rax,%rax,2), %eax
cmpl %ebx, %eax
jne .L23
movq 0(%rbp), %rax
movq -24(%rax), %rax
movq 240(%rbp,%rax), %r15
testq %r15, %r15
je .L39
cmpb $0, 56(%r15)
je .L26
movzbl 67(%r15), %esi
.L27:
movsbl %sil, %esi
movq %rbp, %rdi
call _ZNSo3putEc@PLT
movq %rax, %rdi
call _ZNSo5flushEv@PLT
jmp .L28
.L38:
leaq .LC7(%rip), %rsi
movl $2, %edi
movl $0, %eax
call __printf_chk@PLT
pxor %xmm0, %xmm0
cvtss2sd 56(%rsp), %xmm0
leaq .LC8(%rip), %rsi
movl $2, %edi
movl $1, %eax
call __printf_chk@PLT
pxor %xmm2, %xmm2
cvtss2sd 68(%rsp), %xmm2
movsd .LC9(%rip), %xmm1
movapd %xmm2, %xmm0
mulsd %xmm1, %xmm0
mulsd %xmm1, %xmm0
movsd .LC10(%rip), %xmm1
divsd %xmm0, %xmm1
movl $0, %edx
movapd %xmm2, %xmm0
leaq .LC11(%rip), %rsi
movl $2, %edi
movl $2, %eax
call __printf_chk@PLT
pxor %xmm0, %xmm0
cvtss2sd (%rsp), %xmm0
leaq .LC12(%rip), %rsi
movl $2, %edi
movl $1, %eax
call __printf_chk@PLT
leaq .LC13(%rip), %rsi
movl $2, %edi
movl $0, %eax
call __printf_chk@PLT
movq 40(%rsp), %rdi
call cudaFree@PLT
movq 48(%rsp), %rdi
call cudaFree@PLT
movq 8(%rsp), %rdi
call cudaEventDestroy@PLT
movq 16(%rsp), %rdi
call cudaEventDestroy@PLT
movq 24(%rsp), %rdi
call cudaEventDestroy@PLT
call cudaDeviceReset@PLT
testl %eax, %eax
jne .L40
movq %r12, %rdi
call free@PLT
movq 104(%rsp), %rax
subq %fs:40, %rax
jne .L41
movl $0, %eax
addq $120, %rsp
.cfi_remember_state
.cfi_def_cfa_offset 56
popq %rbx
.cfi_def_cfa_offset 48
popq %rbp
.cfi_def_cfa_offset 40
popq %r12
.cfi_def_cfa_offset 32
popq %r13
.cfi_def_cfa_offset 24
popq %r14
.cfi_def_cfa_offset 16
popq %r15
.cfi_def_cfa_offset 8
ret
.L40:
.cfi_restore_state
leaq .LC14(%rip), %rsi
leaq _ZSt4cout(%rip), %rdi
call _ZStlsISt11char_traitsIcEERSt13basic_ostreamIcT_ES5_PKc@PLT
movq %r12, %rdi
call free@PLT
movl $1, %edi
call exit@PLT
.L41:
call __stack_chk_fail@PLT
.cfi_endproc
.LFE3670:
.size main, .-main
.section .rodata.str1.1
.LC15:
.string "_Z6GenSeqPjPhjS_j"
.text
.type _ZL24__sti____cudaRegisterAllv, @function
_ZL24__sti____cudaRegisterAllv:
.LFB3698:
.cfi_startproc
endbr64
subq $8, %rsp
.cfi_def_cfa_offset 16
leaq _ZL15__fatDeviceText(%rip), %rdi
call __cudaRegisterFatBinary@PLT
movq %rax, %rdi
movq %rax, _ZL20__cudaFatCubinHandle(%rip)
pushq $0
.cfi_def_cfa_offset 24
pushq $0
.cfi_def_cfa_offset 32
pushq $0
.cfi_def_cfa_offset 40
pushq $0
.cfi_def_cfa_offset 48
movl $0, %r9d
movl $-1, %r8d
leaq .LC15(%rip), %rdx
movq %rdx, %rcx
leaq _Z6GenSeqPjPhjS_j(%rip), %rsi
call __cudaRegisterFunction@PLT
addq $32, %rsp
.cfi_def_cfa_offset 16
movq _ZL20__cudaFatCubinHandle(%rip), %rdi
call __cudaRegisterFatBinaryEnd@PLT
leaq _ZL26__cudaUnregisterBinaryUtilv(%rip), %rdi
call atexit@PLT
addq $8, %rsp
.cfi_def_cfa_offset 8
ret
.cfi_endproc
.LFE3698:
.size _ZL24__sti____cudaRegisterAllv, .-_ZL24__sti____cudaRegisterAllv
.section .init_array,"aw"
.align 8
.quad _ZL24__sti____cudaRegisterAllv
.section .nvFatBinSegment,"aw"
.align 8
.type _ZL15__fatDeviceText, @object
.size _ZL15__fatDeviceText, 24
_ZL15__fatDeviceText:
.long 1180844977
.long 1
.quad fatbinData
.quad 0
.local _ZL20__cudaFatCubinHandle
.comm _ZL20__cudaFatCubinHandle,8,8
.section .rodata.cst8,"aM",@progbits,8
.align 8
.LC9:
.long 0
.long 1083179008
.align 8
.LC10:
.long 0
.long 1083133952
.ident "GCC: (Ubuntu 13.3.0-6ubuntu2~24.04) 13.3.0"
.section .note.GNU-stack,"",@progbits
.section .note.gnu.property,"a"
.align 8
.long 1f - 0f
.long 4f - 1f
.long 5
0:
.string "GNU"
1:
.align 8
.long 0xc0000002
.long 3f - 2f
2:
.long 0x3
3:
.align 8
4: | .text
.file "numbers.hip"
# Start of file scope inline assembly
.globl _ZSt21ios_base_library_initv
# End of file scope inline assembly
.globl _Z21__device_stub__GenSeqPjPhjS_j # -- Begin function _Z21__device_stub__GenSeqPjPhjS_j
.p2align 4, 0x90
.type _Z21__device_stub__GenSeqPjPhjS_j,@function
_Z21__device_stub__GenSeqPjPhjS_j: # @_Z21__device_stub__GenSeqPjPhjS_j
.cfi_startproc
# %bb.0:
subq $120, %rsp
.cfi_def_cfa_offset 128
movq %rdi, 72(%rsp)
movq %rsi, 64(%rsp)
movl %edx, 4(%rsp)
movq %rcx, 56(%rsp)
movl %r8d, (%rsp)
leaq 72(%rsp), %rax
movq %rax, 80(%rsp)
leaq 64(%rsp), %rax
movq %rax, 88(%rsp)
leaq 4(%rsp), %rax
movq %rax, 96(%rsp)
leaq 56(%rsp), %rax
movq %rax, 104(%rsp)
movq %rsp, %rax
movq %rax, 112(%rsp)
leaq 40(%rsp), %rdi
leaq 24(%rsp), %rsi
leaq 16(%rsp), %rdx
leaq 8(%rsp), %rcx
callq __hipPopCallConfiguration
movq 40(%rsp), %rsi
movl 48(%rsp), %edx
movq 24(%rsp), %rcx
movl 32(%rsp), %r8d
leaq 80(%rsp), %r9
movl $_Z6GenSeqPjPhjS_j, %edi
pushq 8(%rsp)
.cfi_adjust_cfa_offset 8
pushq 24(%rsp)
.cfi_adjust_cfa_offset 8
callq hipLaunchKernel
addq $136, %rsp
.cfi_adjust_cfa_offset -136
retq
.Lfunc_end0:
.size _Z21__device_stub__GenSeqPjPhjS_j, .Lfunc_end0-_Z21__device_stub__GenSeqPjPhjS_j
.cfi_endproc
# -- End function
.section .rodata.cst8,"aM",@progbits,8
.p2align 3, 0x0 # -- Begin function main
.LCPI1_0:
.quad 0x4090000000000000 # double 1024
.LCPI1_1:
.quad 0x408f500000000000 # double 1002
.text
.globl main
.p2align 4, 0x90
.type main,@function
main: # @main
.cfi_startproc
# %bb.0:
pushq %rbp
.cfi_def_cfa_offset 16
pushq %r15
.cfi_def_cfa_offset 24
pushq %r14
.cfi_def_cfa_offset 32
pushq %r13
.cfi_def_cfa_offset 40
pushq %r12
.cfi_def_cfa_offset 48
pushq %rbx
.cfi_def_cfa_offset 56
subq $216, %rsp
.cfi_def_cfa_offset 272
.cfi_offset %rbx, -56
.cfi_offset %r12, -48
.cfi_offset %r13, -40
.cfi_offset %r14, -32
.cfi_offset %r15, -24
.cfi_offset %rbp, -16
movl $0, 44(%rsp)
leaq 44(%rsp), %rdi
callq hipGetDeviceCount
cmpl $0, 44(%rsp)
je .LBB1_48
# %bb.1:
movw $771, 13(%rsp) # imm = 0x303
movb $3, 15(%rsp)
movl $1, %r12d
xorl %eax, %eax
.p2align 4, 0x90
.LBB1_2: # =>This Inner Loop Header: Depth=1
movzbl 13(%rsp,%rax), %ecx
imull %ecx, %r12d
incq %rax
cmpq $3, %rax
jne .LBB1_2
# %bb.3:
movl %r12d, 112(%rsp)
movl $1, %ecx
movl %r12d, %eax
.p2align 4, 0x90
.LBB1_4: # =>This Inner Loop Header: Depth=1
movzbl 12(%rsp,%rcx), %esi
xorl %edx, %edx
divl %esi
movl %eax, 112(%rsp,%rcx,4)
incq %rcx
cmpq $4, %rcx
jne .LBB1_4
# %bb.5: # %.preheader.preheader
xorl %ebx, %ebx
.p2align 4, 0x90
.LBB1_6: # %.preheader
# =>This Inner Loop Header: Depth=1
movl 112(%rsp,%rbx,4), %esi
movl $_ZSt4cout, %edi
callq _ZNSo9_M_insertImEERSoT_
movl $.L.str.1, %esi
movl $2, %edx
movq %rax, %rdi
callq _ZSt16__ostream_insertIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_PKS3_l
incq %rbx
cmpq $4, %rbx
jne .LBB1_6
# %bb.7:
movq _ZSt4cout(%rip), %rax
movq -24(%rax), %rax
movq _ZSt4cout+240(%rax), %rbx
testq %rbx, %rbx
je .LBB1_49
# %bb.8: # %_ZSt13__check_facetISt5ctypeIcEERKT_PS3_.exit.i.i
cmpb $0, 56(%rbx)
je .LBB1_10
# %bb.9:
movzbl 67(%rbx), %eax
jmp .LBB1_11
.LBB1_10:
movq %rbx, %rdi
callq _ZNKSt5ctypeIcE13_M_widen_initEv
movq (%rbx), %rax
movq %rbx, %rdi
movl $10, %esi
callq *48(%rax)
.LBB1_11: # %_ZSt4endlIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_.exit
movsbl %al, %esi
movl $_ZSt4cout, %edi
callq _ZNSo3putEc
movq %rax, %rdi
callq _ZNSo5flushEv
movl $_ZSt4cout, %edi
movl $.L.str.2, %esi
movl $9, %edx
callq _ZSt16__ostream_insertIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_PKS3_l
movl $_ZSt4cout, %edi
movl $1002, %esi # imm = 0x3EA
callq _ZNSo9_M_insertImEERSoT_
movq (%rax), %rcx
movq -24(%rcx), %rcx
movq 240(%rax,%rcx), %rbx
testq %rbx, %rbx
je .LBB1_49
# %bb.12: # %_ZSt13__check_facetISt5ctypeIcEERKT_PS3_.exit.i.i58
cmpb $0, 56(%rbx)
je .LBB1_14
# %bb.13:
movzbl 67(%rbx), %ecx
jmp .LBB1_15
.LBB1_14:
movq %rbx, %rdi
movq %rax, %r14
callq _ZNKSt5ctypeIcE13_M_widen_initEv
movq (%rbx), %rax
movq %rbx, %rdi
movl $10, %esi
callq *48(%rax)
movl %eax, %ecx
movq %r14, %rax
.LBB1_15: # %_ZSt4endlIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_.exit61
movsbl %cl, %esi
movq %rax, %rdi
callq _ZNSo3putEc
movq %rax, %rdi
callq _ZNSo5flushEv
movl $1002, %edi # imm = 0x3EA
callq malloc
movq %rax, %rbx
movq $0, 64(%rsp)
movq $0, 56(%rsp)
movq $0, 48(%rsp)
leal 31(%r12), %r14d
shrl $5, %r14d
movl $_ZSt4cout, %edi
movl $.L.str.3, %esi
movl $11, %edx
callq _ZSt16__ostream_insertIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_PKS3_l
movl $_ZSt4cout, %edi
movq %r14, %rsi
callq _ZNSo9_M_insertImEERSoT_
movq %rax, %r15
movl $.L.str.4, %esi
movl $13, %edx
movq %rax, %rdi
callq _ZSt16__ostream_insertIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_PKS3_l
movl $32, %esi
movq %r15, %rdi
callq _ZNSo9_M_insertImEERSoT_
movq (%rax), %rcx
movq -24(%rcx), %rcx
movq 240(%rax,%rcx), %r15
testq %r15, %r15
je .LBB1_49
# %bb.16: # %_ZSt13__check_facetISt5ctypeIcEERKT_PS3_.exit.i.i63
cmpb $0, 56(%r15)
je .LBB1_18
# %bb.17:
movzbl 67(%r15), %ecx
jmp .LBB1_19
.LBB1_18:
movq %r15, %rdi
movq %rax, %r13
callq _ZNKSt5ctypeIcE13_M_widen_initEv
movq (%r15), %rax
movq %r15, %rdi
movl $10, %esi
callq *48(%rax)
movl %eax, %ecx
movq %r13, %rax
.LBB1_19: # %_ZSt4endlIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_.exit66
movsbl %cl, %esi
movq %rax, %rdi
callq _ZNSo3putEc
movq %rax, %rdi
callq _ZNSo5flushEv
leaq 32(%rsp), %rdi
callq hipEventCreate
leaq 24(%rsp), %rdi
callq hipEventCreate
leaq 16(%rsp), %rdi
callq hipEventCreate
movq 32(%rsp), %rdi
xorl %esi, %esi
callq hipEventRecord
leaq 64(%rsp), %rdi
movl $4, %esi
callq hipMalloc
testl %eax, %eax
jne .LBB1_20
# %bb.22: # %_Z9gpuAssert10hipError_tPKcib.exit
movq 64(%rsp), %rdi
movl $4, %edx
xorl %esi, %esi
callq hipMemset
testl %eax, %eax
jne .LBB1_23
# %bb.24: # %_Z9gpuAssert10hipError_tPKcib.exit44
leaq 48(%rsp), %rdi
movl $1002, %esi # imm = 0x3EA
callq hipMalloc
testl %eax, %eax
jne .LBB1_25
# %bb.26: # %_Z9gpuAssert10hipError_tPKcib.exit46
leaq 56(%rsp), %rdi
movl $16, %esi
callq hipMalloc
testl %eax, %eax
jne .LBB1_27
# %bb.28: # %_Z9gpuAssert10hipError_tPKcib.exit48
movq 56(%rsp), %rdi
leaq 112(%rsp), %rsi
movl $16, %edx
movl $1, %ecx
callq hipMemcpy
testl %eax, %eax
jne .LBB1_29
# %bb.30: # %_Z9gpuAssert10hipError_tPKcib.exit50
movabsq $4294967296, %rdx # imm = 0x100000000
orq %rdx, %r14
orq $32, %rdx
movq %r14, %rdi
movl $1, %esi
movl $1, %ecx
xorl %r8d, %r8d
xorl %r9d, %r9d
callq __hipPushCallConfiguration
testl %eax, %eax
jne .LBB1_32
# %bb.31:
leal (%r12,%r12,2), %eax
movq 56(%rsp), %rcx
movq 48(%rsp), %rdx
movq 64(%rsp), %rsi
movq %rcx, 168(%rsp)
movq %rdx, 160(%rsp)
movl $1002, 76(%rsp) # imm = 0x3EA
movq %rsi, 152(%rsp)
movl %eax, 72(%rsp)
leaq 168(%rsp), %rax
movq %rax, 176(%rsp)
leaq 160(%rsp), %rax
movq %rax, 184(%rsp)
leaq 76(%rsp), %rax
movq %rax, 192(%rsp)
leaq 152(%rsp), %rax
movq %rax, 200(%rsp)
leaq 72(%rsp), %rax
movq %rax, 208(%rsp)
leaq 96(%rsp), %rdi
leaq 80(%rsp), %rsi
leaq 144(%rsp), %rdx
leaq 136(%rsp), %rcx
callq __hipPopCallConfiguration
movq 96(%rsp), %rsi
movl 104(%rsp), %edx
movq 80(%rsp), %rcx
movl 88(%rsp), %r8d
leaq 176(%rsp), %r9
movl $_Z6GenSeqPjPhjS_j, %edi
pushq 136(%rsp)
.cfi_adjust_cfa_offset 8
pushq 152(%rsp)
.cfi_adjust_cfa_offset 8
callq hipLaunchKernel
addq $16, %rsp
.cfi_adjust_cfa_offset -16
.LBB1_32:
callq hipDeviceSynchronize
testl %eax, %eax
jne .LBB1_33
# %bb.34: # %_Z9gpuAssert10hipError_tPKcib.exit52
movq 24(%rsp), %rdi
xorl %esi, %esi
callq hipEventRecord
movq 48(%rsp), %rsi
movl $1002, %edx # imm = 0x3EA
movq %rbx, %rdi
movl $2, %ecx
callq hipMemcpy
testl %eax, %eax
jne .LBB1_35
# %bb.36: # %_Z9gpuAssert10hipError_tPKcib.exit54
movq 16(%rsp), %rdi
xorl %esi, %esi
callq hipEventRecord
movq 32(%rsp), %rdi
callq hipEventSynchronize
movq 24(%rsp), %rdi
callq hipEventSynchronize
movq 16(%rsp), %rdi
callq hipEventSynchronize
movq 32(%rsp), %rsi
movq 16(%rsp), %rdx
leaq 176(%rsp), %rdi
callq hipEventElapsedTime
movq 32(%rsp), %rsi
movq 24(%rsp), %rdx
leaq 96(%rsp), %rdi
callq hipEventElapsedTime
movq 24(%rsp), %rsi
movq 16(%rsp), %rdx
leaq 80(%rsp), %rdi
callq hipEventElapsedTime
callq hipDeviceSynchronize
testl %eax, %eax
jne .LBB1_50
# %bb.37: # %_Z9gpuAssert10hipError_tPKcib.exit56.preheader.preheader
xorl %r15d, %r15d
movl $2863311531, %r12d # imm = 0xAAAAAAAB
jmp .LBB1_38
.p2align 4, 0x90
.LBB1_44: # in Loop: Header=BB1_38 Depth=1
movl $_ZSt4cout, %edi
movl $.L.str.1, %esi
movl $2, %edx
callq _ZSt16__ostream_insertIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_PKS3_l
.LBB1_45: # %_Z9gpuAssert10hipError_tPKcib.exit56
# in Loop: Header=BB1_38 Depth=1
movzbl (%rbx,%r15), %esi
movl $_ZSt4cout, %edi
callq _ZNSolsEi
incq %r15
cmpq $1002, %r15 # imm = 0x3EA
je .LBB1_46
.LBB1_38: # %_Z9gpuAssert10hipError_tPKcib.exit56.preheader
# =>This Inner Loop Header: Depth=1
movl %r15d, %eax
imulq %r12, %rax
shrq $33, %rax
leal (%rax,%rax,2), %eax
cmpl %eax, %r15d
jne .LBB1_44
# %bb.39: # in Loop: Header=BB1_38 Depth=1
movq _ZSt4cout(%rip), %rax
movq -24(%rax), %rax
movq _ZSt4cout+240(%rax), %r14
testq %r14, %r14
je .LBB1_49
# %bb.40: # %_ZSt13__check_facetISt5ctypeIcEERKT_PS3_.exit.i.i68
# in Loop: Header=BB1_38 Depth=1
cmpb $0, 56(%r14)
je .LBB1_42
# %bb.41: # in Loop: Header=BB1_38 Depth=1
movzbl 67(%r14), %eax
jmp .LBB1_43
.LBB1_42: # in Loop: Header=BB1_38 Depth=1
movq %r14, %rdi
callq _ZNKSt5ctypeIcE13_M_widen_initEv
movq (%r14), %rax
movq %r14, %rdi
movl $10, %esi
callq *48(%rax)
.LBB1_43: # %_ZSt4endlIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_.exit71
# in Loop: Header=BB1_38 Depth=1
movsbl %al, %esi
movl $_ZSt4cout, %edi
callq _ZNSo3putEc
movq %rax, %rdi
callq _ZNSo5flushEv
jmp .LBB1_45
.LBB1_46:
movl $.Lstr, %edi
callq puts@PLT
movss 96(%rsp), %xmm0 # xmm0 = mem[0],zero,zero,zero
cvtss2sd %xmm0, %xmm0
movl $.L.str.7, %edi
movb $1, %al
callq printf
movss 80(%rsp), %xmm0 # xmm0 = mem[0],zero,zero,zero
cvtss2sd %xmm0, %xmm0
movsd .LCPI1_0(%rip), %xmm1 # xmm1 = mem[0],zero
movaps %xmm0, %xmm2
mulsd %xmm1, %xmm2
mulsd %xmm1, %xmm2
movsd .LCPI1_1(%rip), %xmm1 # xmm1 = mem[0],zero
divsd %xmm2, %xmm1
movl $.L.str.8, %edi
xorl %esi, %esi
movb $2, %al
callq printf
movss 176(%rsp), %xmm0 # xmm0 = mem[0],zero,zero,zero
cvtss2sd %xmm0, %xmm0
movl $.L.str.9, %edi
movb $1, %al
callq printf
movl $.Lstr.1, %edi
callq puts@PLT
movq 56(%rsp), %rdi
callq hipFree
movq 48(%rsp), %rdi
callq hipFree
movq 32(%rsp), %rdi
callq hipEventDestroy
movq 24(%rsp), %rdi
callq hipEventDestroy
movq 16(%rsp), %rdi
callq hipEventDestroy
callq hipDeviceReset
testl %eax, %eax
jne .LBB1_51
# %bb.47:
movq %rbx, %rdi
callq free
xorl %eax, %eax
addq $216, %rsp
.cfi_def_cfa_offset 56
popq %rbx
.cfi_def_cfa_offset 48
popq %r12
.cfi_def_cfa_offset 40
popq %r13
.cfi_def_cfa_offset 32
popq %r14
.cfi_def_cfa_offset 24
popq %r15
.cfi_def_cfa_offset 16
popq %rbp
.cfi_def_cfa_offset 8
retq
.LBB1_49:
.cfi_def_cfa_offset 272
callq _ZSt16__throw_bad_castv
.LBB1_48:
movl $_ZSt4cout, %edi
movl $.L.str, %esi
callq _ZStlsISt11char_traitsIcEERSt13basic_ostreamIcT_ES5_PKc
movl $1, %edi
callq exit
.LBB1_20:
movq stderr(%rip), %rbx
movl %eax, %edi
movl %eax, %ebp
callq hipGetErrorString
movl $.L.str.12, %esi
movl $.L.str.5, %ecx
movq %rbx, %rdi
movq %rax, %rdx
movl $107, %r8d
jmp .LBB1_21
.LBB1_23:
movq stderr(%rip), %rbx
movl %eax, %edi
movl %eax, %ebp
callq hipGetErrorString
movl $.L.str.12, %esi
movl $.L.str.5, %ecx
movq %rbx, %rdi
movq %rax, %rdx
movl $108, %r8d
jmp .LBB1_21
.LBB1_25:
movq stderr(%rip), %rbx
movl %eax, %edi
movl %eax, %ebp
callq hipGetErrorString
movl $.L.str.12, %esi
movl $.L.str.5, %ecx
movq %rbx, %rdi
movq %rax, %rdx
movl $110, %r8d
jmp .LBB1_21
.LBB1_27:
movq stderr(%rip), %rbx
movl %eax, %edi
movl %eax, %ebp
callq hipGetErrorString
movl $.L.str.12, %esi
movl $.L.str.5, %ecx
movq %rbx, %rdi
movq %rax, %rdx
movl $111, %r8d
jmp .LBB1_21
.LBB1_29:
movq stderr(%rip), %rbx
movl %eax, %edi
movl %eax, %ebp
callq hipGetErrorString
movl $.L.str.12, %esi
movl $.L.str.5, %ecx
movq %rbx, %rdi
movq %rax, %rdx
movl $112, %r8d
jmp .LBB1_21
.LBB1_33:
movq stderr(%rip), %rbx
movl %eax, %edi
movl %eax, %ebp
callq hipGetErrorString
movl $.L.str.12, %esi
movl $.L.str.5, %ecx
movq %rbx, %rdi
movq %rax, %rdx
movl $116, %r8d
jmp .LBB1_21
.LBB1_35:
movq stderr(%rip), %rbx
movl %eax, %edi
movl %eax, %ebp
callq hipGetErrorString
movl $.L.str.12, %esi
movl $.L.str.5, %ecx
movq %rbx, %rdi
movq %rax, %rdx
movl $119, %r8d
jmp .LBB1_21
.LBB1_50:
movq stderr(%rip), %rbx
movl %eax, %edi
movl %eax, %ebp
callq hipGetErrorString
movl $.L.str.12, %esi
movl $.L.str.5, %ecx
movq %rbx, %rdi
movq %rax, %rdx
movl $128, %r8d
.LBB1_21:
xorl %eax, %eax
callq fprintf
movl %ebp, %edi
callq exit
.LBB1_51:
movl $_ZSt4cout, %edi
movl $.L.str.11, %esi
callq _ZStlsISt11char_traitsIcEERSt13basic_ostreamIcT_ES5_PKc
movq %rbx, %rdi
callq free
movl $1, %edi
callq exit
.Lfunc_end1:
.size main, .Lfunc_end1-main
.cfi_endproc
# -- End function
.p2align 4, 0x90 # -- Begin function __hip_module_ctor
.type __hip_module_ctor,@function
__hip_module_ctor: # @__hip_module_ctor
.cfi_startproc
# %bb.0:
subq $40, %rsp
.cfi_def_cfa_offset 48
cmpq $0, __hip_gpubin_handle(%rip)
jne .LBB2_2
# %bb.1:
movl $__hip_fatbin_wrapper, %edi
callq __hipRegisterFatBinary
movq %rax, __hip_gpubin_handle(%rip)
.LBB2_2:
movq __hip_gpubin_handle(%rip), %rdi
xorps %xmm0, %xmm0
movups %xmm0, 16(%rsp)
movups %xmm0, (%rsp)
movl $_Z6GenSeqPjPhjS_j, %esi
movl $.L__unnamed_1, %edx
movl $.L__unnamed_1, %ecx
movl $-1, %r8d
xorl %r9d, %r9d
callq __hipRegisterFunction
movl $__hip_module_dtor, %edi
addq $40, %rsp
.cfi_def_cfa_offset 8
jmp atexit # TAILCALL
.Lfunc_end2:
.size __hip_module_ctor, .Lfunc_end2-__hip_module_ctor
.cfi_endproc
# -- End function
.p2align 4, 0x90 # -- Begin function __hip_module_dtor
.type __hip_module_dtor,@function
__hip_module_dtor: # @__hip_module_dtor
.cfi_startproc
# %bb.0:
movq __hip_gpubin_handle(%rip), %rdi
testq %rdi, %rdi
je .LBB3_2
# %bb.1:
pushq %rax
.cfi_def_cfa_offset 16
callq __hipUnregisterFatBinary
movq $0, __hip_gpubin_handle(%rip)
addq $8, %rsp
.cfi_def_cfa_offset 8
.LBB3_2:
retq
.Lfunc_end3:
.size __hip_module_dtor, .Lfunc_end3-__hip_module_dtor
.cfi_endproc
# -- End function
.type _Z6GenSeqPjPhjS_j,@object # @_Z6GenSeqPjPhjS_j
.section .rodata,"a",@progbits
.globl _Z6GenSeqPjPhjS_j
.p2align 3, 0x0
_Z6GenSeqPjPhjS_j:
.quad _Z21__device_stub__GenSeqPjPhjS_j
.size _Z6GenSeqPjPhjS_j, 8
.type .L.str,@object # @.str
.section .rodata.str1.1,"aMS",@progbits,1
.L.str:
.asciz "\nNo CUDA Device is available\n"
.size .L.str, 30
.type .L.str.1,@object # @.str.1
.L.str.1:
.asciz ", "
.size .L.str.1, 3
.type .L.str.2,@object # @.str.2
.L.str.2:
.asciz "arrSize: "
.size .L.str.2, 10
.type .L.str.3,@object # @.str.3
.L.str.3:
.asciz "NumBlocks: "
.size .L.str.3, 12
.type .L.str.4,@object # @.str.4
.L.str.4:
.asciz ", ThrPerBlk: "
.size .L.str.4, 14
.type .L.str.5,@object # @.str.5
.L.str.5:
.asciz "/home/ubuntu/Datasets/stackv2/train-structured-repos-hip/vinicius-r-silva/cuda_studies/master/number_sequencies/numbers.hip"
.size .L.str.5, 124
.type .L.str.7,@object # @.str.7
.L.str.7:
.asciz "Kernel Execution = %5.2f ms\n"
.size .L.str.7, 29
.type .L.str.8,@object # @.str.8
.L.str.8:
.asciz "GPU->CPU Transfer = %5.2f ms ... %4d MB ... %6.2f GB/s\n"
.size .L.str.8, 56
.type .L.str.9,@object # @.str.9
.L.str.9:
.asciz "Total time elapsed = %5.2f ms\n"
.size .L.str.9, 31
.type .L.str.11,@object # @.str.11
.L.str.11:
.asciz "hipDeviceReset failed!"
.size .L.str.11, 23
.type .L.str.12,@object # @.str.12
.L.str.12:
.asciz "GPUassert: %s %s %d\n"
.size .L.str.12, 21
.type .L__unnamed_1,@object # @0
.L__unnamed_1:
.asciz "_Z6GenSeqPjPhjS_j"
.size .L__unnamed_1, 18
.type __hip_fatbin_wrapper,@object # @__hip_fatbin_wrapper
.section .hipFatBinSegment,"a",@progbits
.p2align 3, 0x0
__hip_fatbin_wrapper:
.long 1212764230 # 0x48495046
.long 1 # 0x1
.quad __hip_fatbin
.quad 0
.size __hip_fatbin_wrapper, 24
.type __hip_gpubin_handle,@object # @__hip_gpubin_handle
.local __hip_gpubin_handle
.comm __hip_gpubin_handle,8,8
.section .init_array,"aw",@init_array
.p2align 3, 0x0
.quad __hip_module_ctor
.type __hip_cuid_,@object # @__hip_cuid_
.bss
.globl __hip_cuid_
__hip_cuid_:
.byte 0 # 0x0
.size __hip_cuid_, 1
.type .Lstr,@object # @str
.section .rodata.str1.1,"aMS",@progbits,1
.Lstr:
.asciz "\n\n-------------------- ... ----------------------------"
.size .Lstr, 56
.type .Lstr.1,@object # @str.1
.Lstr.1:
.asciz "-------------------- ... ----------------------------"
.size .Lstr.1, 54
.section ".linker-options","e",@llvm_linker_options
.ident "AMD clang version 18.0.0git (https://github.com/RadeonOpenCompute/llvm-project roc-6.3.2 25012 e5bf7e55c91490b07c49d8960fa7983d864936c4)"
.section ".note.GNU-stack","",@progbits
.addrsig
.addrsig_sym _Z21__device_stub__GenSeqPjPhjS_j
.addrsig_sym __hip_module_ctor
.addrsig_sym __hip_module_dtor
.addrsig_sym _Z6GenSeqPjPhjS_j
.addrsig_sym _ZSt4cout
.addrsig_sym __hip_fatbin
.addrsig_sym __hip_fatbin_wrapper
.addrsig_sym __hip_cuid_ |
You are a helpful coding assistant specialized in converting CUDA source code to CUDA device assembly. | #include <cstdio>
extern "C" {
__device__
static int THREADS_IN_BLOCK = 1024;
//index - size of left tree
__global__
void init(int* parent, int* right, int* left, int* tree_size, int* height, bool* computed, int size, int* roots) {
int thid = blockIdx.x * blockDim.x + threadIdx.x;
if (thid >= size) {
return;
}
// root = blockIdx.x * blockDim.x + root;
// if (root >= size) {
// root = blockIdx.x * blockDim.x;
// }
// __syncthreads();
atomicExch(roots + blockIdx.x, thid);
__syncthreads();
int root = roots[blockIdx.x];
if (thid == root) {
computed[thid] = true;
parent[thid] = -1;
height[thid] = 0;
}
else {
computed[thid] = false;
parent[thid] = root;
}
tree_size[thid] = 1;
left[thid] = right[thid] = -1;
}
__global__
void quick_sort(int* to_sort, int* parent, int* left, int* right, int* tree_size, int* height, bool* computed, bool* sth_changed, int size) {
int thid = blockIdx.x * blockDim.x + threadIdx.x;
if (thid >= size || computed[thid]) {
return;
}
*sth_changed = true;
//I assume that I have parrent
int parent_id = parent[thid];
int my_value = to_sort[thid];
int parent_value = to_sort[parent_id];
bool is_left = false;
if ( my_value < parent_value
|| ( my_value == parent_value && thid < parent_id)) {
is_left = true;
}
// __syncthreads();
if (is_left) atomicExch(left + parent_id, thid);
__syncthreads();
if (is_left) {
int left_parent = left[parent_id];
if (thid == left_parent) {
// printf("%d\n", left_parent);
computed[thid] = true;
height[thid] = height[parent_id] + 1;
}
else {
parent[thid] = left_parent;
atomicAdd(tree_size + left_parent, 1);
}
return;
}
// __syncthreads();
atomicExch(right + parent_id, thid);
__syncthreads();
int right_parent = right[parent_id];
if (thid == right_parent) {
// printf("%d\n", right_parent);
computed[thid] = true;
height[thid] = height[parent_id] + 1;
}
else {
parent[thid] = right_parent;
atomicAdd(tree_size + right_parent, 1);
}
}
__global__
void tree_to_array(int* tree, int* array, int* indexes, int* parent, int* left, int* tree_size, int* height, int h, bool* sth_changed, int size) {
int thid = blockIdx.x * blockDim.x + threadIdx.x;
if (thid >= size || height[thid] != h) {
return;
}
*sth_changed = true;
int index_in_array = blockIdx.x * blockDim.x;
int left_child = left[thid];
int parent_id = parent[thid];
//I am root
if (parent_id == -1) {
if (left_child != -1) {
index_in_array += tree_size[left_child];
}
array[index_in_array] = tree[thid];
indexes[thid] = index_in_array;
return;
}
int left_parents_child = left[parent_id];
bool is_left = (left_parents_child == thid);
if (is_left) {
index_in_array = indexes[parent_id] - tree_size[thid];
}
else {
index_in_array = indexes[parent_id] + 1;
}
if (left_child != -1) {
index_in_array += tree_size[left_child];
}
array[index_in_array] = tree[thid];
indexes[thid] = index_in_array;
}
} | code for sm_80
Function : tree_to_array
.headerflags @"EF_CUDA_TEXMODE_UNIFIED EF_CUDA_64BIT_ADDRESS EF_CUDA_SM80 EF_CUDA_VIRTUAL_SM(EF_CUDA_SM80)"
/*0000*/ IMAD.MOV.U32 R1, RZ, RZ, c[0x0][0x28] ; /* 0x00000a00ff017624 */
/* 0x000fe400078e00ff */
/*0010*/ S2UR UR4, SR_CTAID.X ; /* 0x00000000000479c3 */
/* 0x000e220000002500 */
/*0020*/ S2R R15, SR_TID.X ; /* 0x00000000000f7919 */
/* 0x000e620000002100 */
/*0030*/ ULDC UR5, c[0x0][0x0] ; /* 0x0000000000057ab9 */
/* 0x000fe40000000800 */
/*0040*/ UIMAD UR4, UR4, UR5, URZ ; /* 0x00000005040472a4 */
/* 0x001fcc000f8e023f */
/*0050*/ IADD3 R15, R15, UR4, RZ ; /* 0x000000040f0f7c10 */
/* 0x002fc8000fffe0ff */
/*0060*/ ISETP.GE.AND P0, PT, R15, c[0x0][0x1a8], PT ; /* 0x00006a000f007a0c */
/* 0x000fda0003f06270 */
/*0070*/ @P0 EXIT ; /* 0x000000000000094d */
/* 0x000fea0003800000 */
/*0080*/ IMAD.MOV.U32 R0, RZ, RZ, 0x4 ; /* 0x00000004ff007424 */
/* 0x000fe200078e00ff */
/*0090*/ ULDC.64 UR6, c[0x0][0x118] ; /* 0x0000460000067ab9 */
/* 0x000fc60000000a00 */
/*00a0*/ IMAD.WIDE R2, R15, R0, c[0x0][0x190] ; /* 0x000064000f027625 */
/* 0x000fcc00078e0200 */
/*00b0*/ LDG.E R2, [R2.64] ; /* 0x0000000602027981 */
/* 0x000ea4000c1e1900 */
/*00c0*/ ISETP.NE.AND P0, PT, R2, c[0x0][0x198], PT ; /* 0x0000660002007a0c */
/* 0x004fda0003f05270 */
/*00d0*/ @P0 EXIT ; /* 0x000000000000094d */
/* 0x000fea0003800000 */
/*00e0*/ IMAD.SHL.U32 R14, R15.reuse, 0x4, RZ ; /* 0x000000040f0e7824 */
/* 0x040fe200078e00ff */
/*00f0*/ SHF.R.S32.HI R2, RZ, 0x1f, R15 ; /* 0x0000001fff027819 */
/* 0x000fe2000001140f */
/*0100*/ IMAD.MOV.U32 R3, RZ, RZ, 0x1 ; /* 0x00000001ff037424 */
/* 0x000fe400078e00ff */
/*0110*/ IMAD.MOV.U32 R8, RZ, RZ, c[0x0][0x1a0] ; /* 0x00006800ff087624 */
/* 0x000fe200078e00ff */
/*0120*/ SHF.L.U64.HI R16, R15, 0x2, R2 ; /* 0x000000020f107819 */
/* 0x000fe20000010202 */
/*0130*/ IMAD.MOV.U32 R9, RZ, RZ, c[0x0][0x1a4] ; /* 0x00006900ff097624 */
/* 0x000fe200078e00ff */
/*0140*/ IADD3 R12, P0, R14, c[0x0][0x178], RZ ; /* 0x00005e000e0c7a10 */
/* 0x000fc80007f1e0ff */
/*0150*/ IADD3.X R13, R16, c[0x0][0x17c], RZ, P0, !PT ; /* 0x00005f00100d7a10 */
/* 0x000fe200007fe4ff */
/*0160*/ STG.E.U8 [R8.64], R3 ; /* 0x0000000308007986 */
/* 0x0001e2000c101106 */
/*0170*/ IADD3 R10, P0, R14, c[0x0][0x180], RZ ; /* 0x000060000e0a7a10 */
/* 0x000fc80007f1e0ff */
/*0180*/ LDG.E R13, [R12.64] ; /* 0x000000060c0d7981 */
/* 0x000ea2000c1e1900 */
/*0190*/ IADD3.X R11, R16, c[0x0][0x184], RZ, P0, !PT ; /* 0x00006100100b7a10 */
/* 0x000fcc00007fe4ff */
/*01a0*/ LDG.E R11, [R10.64] ; /* 0x000000060a0b7981 */
/* 0x000ee2000c1e1900 */
/*01b0*/ IADD3 R4, P1, R14.reuse, c[0x0][0x160], RZ ; /* 0x000058000e047a10 */
/* 0x040fe20007f3e0ff */
/*01c0*/ IMAD.U32 R17, RZ, RZ, UR4 ; /* 0x00000004ff117e24 */
/* 0x000fe2000f8e00ff */
/*01d0*/ IADD3 R2, P2, R14, c[0x0][0x170], RZ ; /* 0x00005c000e027a10 */
/* 0x000fe40007f5e0ff */
/*01e0*/ IADD3.X R5, R16.reuse, c[0x0][0x164], RZ, P1, !PT ; /* 0x0000590010057a10 */
/* 0x040fe40000ffe4ff */
/*01f0*/ IADD3.X R3, R16, c[0x0][0x174], RZ, P2, !PT ; /* 0x00005d0010037a10 */
/* 0x001fe400017fe4ff */
/*0200*/ ISETP.NE.AND P0, PT, R13, -0x1, PT ; /* 0xffffffff0d00780c */
/* 0x004fe20003f05270 */
/*0210*/ IMAD.WIDE R6, R11, R0, c[0x0][0x188] ; /* 0x000062000b067625 */
/* 0x008fd800078e0200 */
/*0220*/ @!P0 BRA 0x350 ; /* 0x0000012000008947 */
/* 0x000fea0003800000 */
/*0230*/ IMAD.WIDE R8, R13, R0.reuse, c[0x0][0x180] ; /* 0x000060000d087625 */
/* 0x080fe200078e0200 */
/*0240*/ ISETP.NE.AND P1, PT, R11, -0x1, PT ; /* 0xffffffff0b00780c */
/* 0x000fe20003f25270 */
/*0250*/ LDG.E R5, [R4.64] ; /* 0x0000000604057981 */
/* 0x000ea8000c1e1900 */
/*0260*/ LDG.E R8, [R8.64] ; /* 0x0000000608087981 */
/* 0x000ee2000c1e1900 */
/*0270*/ IMAD.WIDE R10, R13, R0, c[0x0][0x170] ; /* 0x00005c000d0a7625 */
/* 0x000fcc00078e0200 */
/*0280*/ LDG.E R10, [R10.64] ; /* 0x000000060a0a7981 */
/* 0x000f28000c1e1900 */
/*0290*/ @P1 LDG.E R6, [R6.64] ; /* 0x0000000606061981 */
/* 0x000f62000c1e1900 */
/*02a0*/ ISETP.NE.AND P0, PT, R8, R15, PT ; /* 0x0000000f0800720c */
/* 0x008fda0003f05270 */
/*02b0*/ @!P0 IADD3 R12, P2, R14, c[0x0][0x188], RZ ; /* 0x000062000e0c8a10 */
/* 0x000fc80007f5e0ff */
/*02c0*/ @!P0 IADD3.X R13, R16, c[0x0][0x18c], RZ, P2, !PT ; /* 0x00006300100d8a10 */
/* 0x000fcc00017fe4ff */
/*02d0*/ @!P0 LDG.E R13, [R12.64] ; /* 0x000000060c0d8981 */
/* 0x000ee2000c1e1900 */
/*02e0*/ @P0 IADD3 R15, R10.reuse, 0x1, RZ ; /* 0x000000010a0f0810 */
/* 0x050fe20007ffe0ff */
/*02f0*/ @!P0 IMAD.IADD R15, R10, 0x1, -R13 ; /* 0x000000010a0f8824 */
/* 0x008fc800078e0a0d */
/*0300*/ @P1 IMAD.IADD R15, R15, 0x1, R6 ; /* 0x000000010f0f1824 */
/* 0x020fc800078e0206 */
/*0310*/ IMAD.WIDE R8, R15, R0, c[0x0][0x168] ; /* 0x00005a000f087625 */
/* 0x000fca00078e0200 */
/*0320*/ STG.E [R8.64], R5 ; /* 0x0000000508007986 */
/* 0x004fe8000c101906 */
/*0330*/ STG.E [R2.64], R15 ; /* 0x0000000f02007986 */
/* 0x000fe2000c101906 */
/*0340*/ EXIT ; /* 0x000000000000794d */
/* 0x000fea0003800000 */
/*0350*/ ISETP.NE.AND P0, PT, R11, -0x1, PT ; /* 0xffffffff0b00780c */
/* 0x000fe20003f05270 */
/*0360*/ LDG.E R5, [R4.64] ; /* 0x0000000604057981 */
/* 0x000e98000c1e1900 */
/*0370*/ @P0 LDG.E R6, [R6.64] ; /* 0x0000000606060981 */
/* 0x000ee4000c1e1900 */
/*0380*/ @P0 IMAD.IADD R17, R17, 0x1, R6 ; /* 0x0000000111110824 */
/* 0x008fc800078e0206 */
/*0390*/ IMAD.WIDE R8, R17, R0, c[0x0][0x168] ; /* 0x00005a0011087625 */
/* 0x000fca00078e0200 */
/*03a0*/ STG.E [R8.64], R5 ; /* 0x0000000508007986 */
/* 0x004fe8000c101906 */
/*03b0*/ STG.E [R2.64], R17 ; /* 0x0000001102007986 */
/* 0x000fe2000c101906 */
/*03c0*/ EXIT ; /* 0x000000000000794d */
/* 0x000fea0003800000 */
/*03d0*/ BRA 0x3d0; /* 0xfffffff000007947 */
/* 0x000fc0000383ffff */
/*03e0*/ NOP; /* 0x0000000000007918 */
/* 0x000fc00000000000 */
/*03f0*/ NOP; /* 0x0000000000007918 */
/* 0x000fc00000000000 */
/*0400*/ NOP; /* 0x0000000000007918 */
/* 0x000fc00000000000 */
/*0410*/ NOP; /* 0x0000000000007918 */
/* 0x000fc00000000000 */
/*0420*/ NOP; /* 0x0000000000007918 */
/* 0x000fc00000000000 */
/*0430*/ NOP; /* 0x0000000000007918 */
/* 0x000fc00000000000 */
/*0440*/ NOP; /* 0x0000000000007918 */
/* 0x000fc00000000000 */
/*0450*/ NOP; /* 0x0000000000007918 */
/* 0x000fc00000000000 */
/*0460*/ NOP; /* 0x0000000000007918 */
/* 0x000fc00000000000 */
/*0470*/ NOP; /* 0x0000000000007918 */
/* 0x000fc00000000000 */
..........
Function : quick_sort
.headerflags @"EF_CUDA_TEXMODE_UNIFIED EF_CUDA_64BIT_ADDRESS EF_CUDA_SM80 EF_CUDA_VIRTUAL_SM(EF_CUDA_SM80)"
/*0000*/ IMAD.MOV.U32 R1, RZ, RZ, c[0x0][0x28] ; /* 0x00000a00ff017624 */
/* 0x000fe400078e00ff */
/*0010*/ S2R R0, SR_CTAID.X ; /* 0x0000000000007919 */
/* 0x000e280000002500 */
/*0020*/ S2R R3, SR_TID.X ; /* 0x0000000000037919 */
/* 0x000e240000002100 */
/*0030*/ IMAD R0, R0, c[0x0][0x0], R3 ; /* 0x0000000000007a24 */
/* 0x001fca00078e0203 */
/*0040*/ ISETP.GE.AND P0, PT, R0, c[0x0][0x1a0], PT ; /* 0x0000680000007a0c */
/* 0x000fda0003f06270 */
/*0050*/ @P0 EXIT ; /* 0x000000000000094d */
/* 0x000fea0003800000 */
/*0060*/ SHF.R.S32.HI R3, RZ, 0x1f, R0 ; /* 0x0000001fff037819 */
/* 0x000fe20000011400 */
/*0070*/ ULDC.64 UR4, c[0x0][0x118] ; /* 0x0000460000047ab9 */
/* 0x000fe20000000a00 */
/*0080*/ IADD3 R4, P0, R0, c[0x0][0x190], RZ ; /* 0x0000640000047a10 */
/* 0x000fc80007f1e0ff */
/*0090*/ IADD3.X R5, R3, c[0x0][0x194], RZ, P0, !PT ; /* 0x0000650003057a10 */
/* 0x000fca00007fe4ff */
/*00a0*/ LDG.E.U8 R2, [R4.64] ; /* 0x0000000404027981 */
/* 0x000ea4000c1e1100 */
/*00b0*/ ISETP.NE.AND P0, PT, R2, RZ, PT ; /* 0x000000ff0200720c */
/* 0x004fda0003f05270 */
/*00c0*/ @P0 EXIT ; /* 0x000000000000094d */
/* 0x000fea0003800000 */
/*00d0*/ IMAD.SHL.U32 R16, R0.reuse, 0x4, RZ ; /* 0x0000000400107824 */
/* 0x040fe200078e00ff */
/*00e0*/ SHF.L.U64.HI R17, R0, 0x2, R3 ; /* 0x0000000200117819 */
/* 0x000fe20000010203 */
/*00f0*/ IMAD.MOV.U32 R8, RZ, RZ, 0x1 ; /* 0x00000001ff087424 */
/* 0x000fe400078e00ff */
/*0100*/ IMAD.MOV.U32 R6, RZ, RZ, c[0x0][0x198] ; /* 0x00006600ff067624 */
/* 0x000fe200078e00ff */
/*0110*/ IADD3 R2, P0, R16, c[0x0][0x168], RZ ; /* 0x00005a0010027a10 */
/* 0x000fe20007f1e0ff */
/*0120*/ IMAD.MOV.U32 R7, RZ, RZ, c[0x0][0x19c] ; /* 0x00006700ff077624 */
/* 0x000fc600078e00ff */
/*0130*/ IADD3.X R3, R17, c[0x0][0x16c], RZ, P0, !PT ; /* 0x00005b0011037a10 */
/* 0x000fe400007fe4ff */
/*0140*/ STG.E.U8 [R6.64], R8 ; /* 0x0000000806007986 */
/* 0x0001e8000c101104 */
/*0150*/ LDG.E R14, [R2.64] ; /* 0x00000004020e7981 */
/* 0x000ea2000c1e1900 */
/*0160*/ IADD3 R12, P0, R16, c[0x0][0x160], RZ ; /* 0x00005800100c7a10 */
/* 0x000fe20007f1e0ff */
/*0170*/ IMAD.MOV.U32 R9, RZ, RZ, 0x4 ; /* 0x00000004ff097424 */
/* 0x000fc600078e00ff */
/*0180*/ IADD3.X R13, R17, c[0x0][0x164], RZ, P0, !PT ; /* 0x00005900110d7a10 */
/* 0x000fcc00007fe4ff */
/*0190*/ LDG.E R13, [R12.64] ; /* 0x000000040c0d7981 */
/* 0x000ee2000c1e1900 */
/*01a0*/ IMAD.WIDE R10, R14, R9, c[0x0][0x160] ; /* 0x000058000e0a7625 */
/* 0x004fcc00078e0209 */
/*01b0*/ LDG.E R10, [R10.64] ; /* 0x000000040a0a7981 */
/* 0x000ee2000c1e1900 */
/*01c0*/ BSSY B0, 0x260 ; /* 0x0000009000007945 */
/* 0x000fe20003800000 */
/*01d0*/ SHF.R.S32.HI R15, RZ, 0x1f, R14 ; /* 0x0000001fff0f7819 */
/* 0x000fe4000001140e */
/*01e0*/ ISETP.NE.AND P0, PT, R13, R10, PT ; /* 0x0000000a0d00720c */
/* 0x008fc80003f05270 */
/*01f0*/ ISETP.LT.AND P0, PT, R0, R14, !P0 ; /* 0x0000000e0000720c */
/* 0x000fc80004701270 */
/*0200*/ ISETP.LT.OR P0, PT, R13, R10, P0 ; /* 0x0000000a0d00720c */
/* 0x000fda0000701670 */
/*0210*/ @!P0 BRA 0x250 ; /* 0x0000003000008947 */
/* 0x000fea0003800000 */
/*0220*/ LEA R6, P1, R14, c[0x0][0x170], 0x2 ; /* 0x00005c000e067a11 */
/* 0x001fc800078210ff */
/*0230*/ LEA.HI.X R7, R14, c[0x0][0x174], R15, 0x2, P1 ; /* 0x00005d000e077a11 */
/* 0x000fca00008f140f */
/*0240*/ ATOMG.E.EXCH.STRONG.GPU PT, RZ, [R6.64], R0 ; /* 0x0000000006ff79a8 */
/* 0x000168000c1ee1c4 */
/*0250*/ BSYNC B0 ; /* 0x0000000000007941 */
/* 0x001fea0003800000 */
/*0260*/ IMAD.SHL.U32 R12, R14, 0x4, RZ ; /* 0x000000040e0c7824 */
/* 0x000fe200078e00ff */
/*0270*/ BAR.SYNC.DEFER_BLOCKING 0x0 ; /* 0x0000000000007b1d */
/* 0x000fe20000010000 */
/*0280*/ IADD3 R6, P2, R16, c[0x0][0x188], RZ ; /* 0x0000620010067a10 */
/* 0x000fe40007f5e0ff */
/*0290*/ SHF.L.U64.HI R14, R14, 0x2, R15 ; /* 0x000000020e0e7819 */
/* 0x000fe4000001020f */
/*02a0*/ IADD3 R10, P1, R12, c[0x0][0x188], RZ ; /* 0x000062000c0a7a10 */
/* 0x000fe40007f3e0ff */
/*02b0*/ IADD3.X R7, R17, c[0x0][0x18c], RZ, P2, !PT ; /* 0x0000630011077a10 */
/* 0x000fe200017fe4ff */
/*02c0*/ IMAD.MOV.U32 R17, RZ, RZ, 0x1 ; /* 0x00000001ff117424 */
/* 0x000fe200078e00ff */
/*02d0*/ IADD3.X R11, R14, c[0x0][0x18c], RZ, P1, !PT ; /* 0x000063000e0b7a10 */
/* 0x000fe20000ffe4ff */
/*02e0*/ @P0 BRA 0x400 ; /* 0x0000011000000947 */
/* 0x000fea0003800000 */
/*02f0*/ IADD3 R12, P0, R12, c[0x0][0x178], RZ ; /* 0x00005e000c0c7a10 */
/* 0x000fc80007f1e0ff */
/*0300*/ IADD3.X R13, R14, c[0x0][0x17c], RZ, P0, !PT ; /* 0x00005f000e0d7a10 */
/* 0x000fca00007fe4ff */
/*0310*/ ATOMG.E.EXCH.STRONG.GPU PT, RZ, [R12.64], R0 ; /* 0x000000000cff79a8 */
/* 0x000162000c1ee1c4 */
/*0320*/ WARPSYNC 0xffffffff ; /* 0xffffffff00007948 */
/* 0x000fe60003800000 */
/*0330*/ BAR.SYNC.DEFER_BLOCKING 0x0 ; /* 0x0000000000007b1d */
/* 0x000fec0000010000 */
/*0340*/ LDG.E R15, [R12.64] ; /* 0x000000040c0f7981 */
/* 0x000ea4000c1e1900 */
/*0350*/ ISETP.NE.AND P0, PT, R0, R15, PT ; /* 0x0000000f0000720c */
/* 0x004fda0003f05270 */
/*0360*/ @!P0 BRA 0x3b0 ; /* 0x0000004000008947 */
/* 0x000fea0003800000 */
/*0370*/ IMAD.WIDE R4, R15, R9, c[0x0][0x180] ; /* 0x000060000f047625 */
/* 0x001fe200078e0209 */
/*0380*/ STG.E [R2.64], R15 ; /* 0x0000000f02007986 */
/* 0x000fe8000c101904 */
/*0390*/ RED.E.ADD.STRONG.GPU [R4.64], R17 ; /* 0x000000110400798e */
/* 0x000fe2000c10e184 */
/*03a0*/ EXIT ; /* 0x000000000000794d */
/* 0x000fea0003800000 */
/*03b0*/ STG.E.U8 [R4.64], R8 ; /* 0x0000000804007986 */
/* 0x001fe8000c101104 */
/*03c0*/ LDG.E R10, [R10.64] ; /* 0x000000040a0a7981 */
/* 0x000ea4000c1e1900 */
/*03d0*/ IADD3 R3, R10, 0x1, RZ ; /* 0x000000010a037810 */
/* 0x004fca0007ffe0ff */
/*03e0*/ STG.E [R6.64], R3 ; /* 0x0000000306007986 */
/* 0x000fe2000c101904 */
/*03f0*/ EXIT ; /* 0x000000000000794d */
/* 0x000fea0003800000 */
/*0400*/ IADD3 R12, P0, R12, c[0x0][0x170], RZ ; /* 0x00005c000c0c7a10 */
/* 0x000fc80007f1e0ff */
/*0410*/ IADD3.X R13, R14, c[0x0][0x174], RZ, P0, !PT ; /* 0x00005d000e0d7a10 */
/* 0x000fcc00007fe4ff */
/*0420*/ LDG.E R13, [R12.64] ; /* 0x000000040c0d7981 */
/* 0x000ea4000c1e1900 */
/*0430*/ ISETP.NE.AND P0, PT, R0, R13, PT ; /* 0x0000000d0000720c */
/* 0x004fda0003f05270 */
/*0440*/ @!P0 BRA 0x490 ; /* 0x0000004000008947 */
/* 0x000fea0003800000 */
/*0450*/ IMAD.WIDE R4, R13, R9, c[0x0][0x180] ; /* 0x000060000d047625 */
/* 0x000fe200078e0209 */
/*0460*/ STG.E [R2.64], R13 ; /* 0x0000000d02007986 */
/* 0x000fe8000c101904 */
/*0470*/ RED.E.ADD.STRONG.GPU [R4.64], R17 ; /* 0x000000110400798e */
/* 0x000fe2000c10e184 */
/*0480*/ EXIT ; /* 0x000000000000794d */
/* 0x000fea0003800000 */
/*0490*/ STG.E.U8 [R4.64], R8 ; /* 0x0000000804007986 */
/* 0x000fe8000c101104 */
/*04a0*/ LDG.E R10, [R10.64] ; /* 0x000000040a0a7981 */
/* 0x000ea4000c1e1900 */
/*04b0*/ IADD3 R3, R10, 0x1, RZ ; /* 0x000000010a037810 */
/* 0x004fca0007ffe0ff */
/*04c0*/ STG.E [R6.64], R3 ; /* 0x0000000306007986 */
/* 0x000fe2000c101904 */
/*04d0*/ EXIT ; /* 0x000000000000794d */
/* 0x000fea0003800000 */
/*04e0*/ BRA 0x4e0; /* 0xfffffff000007947 */
/* 0x000fc0000383ffff */
/*04f0*/ NOP; /* 0x0000000000007918 */
/* 0x000fc00000000000 */
/*0500*/ NOP; /* 0x0000000000007918 */
/* 0x000fc00000000000 */
/*0510*/ NOP; /* 0x0000000000007918 */
/* 0x000fc00000000000 */
/*0520*/ NOP; /* 0x0000000000007918 */
/* 0x000fc00000000000 */
/*0530*/ NOP; /* 0x0000000000007918 */
/* 0x000fc00000000000 */
/*0540*/ NOP; /* 0x0000000000007918 */
/* 0x000fc00000000000 */
/*0550*/ NOP; /* 0x0000000000007918 */
/* 0x000fc00000000000 */
/*0560*/ NOP; /* 0x0000000000007918 */
/* 0x000fc00000000000 */
/*0570*/ NOP; /* 0x0000000000007918 */
/* 0x000fc00000000000 */
..........
Function : init
.headerflags @"EF_CUDA_TEXMODE_UNIFIED EF_CUDA_64BIT_ADDRESS EF_CUDA_SM80 EF_CUDA_VIRTUAL_SM(EF_CUDA_SM80)"
/*0000*/ IMAD.MOV.U32 R1, RZ, RZ, c[0x0][0x28] ; /* 0x00000a00ff017624 */
/* 0x000fe400078e00ff */
/*0010*/ S2R R2, SR_CTAID.X ; /* 0x0000000000027919 */
/* 0x000e280000002500 */
/*0020*/ S2R R9, SR_TID.X ; /* 0x0000000000097919 */
/* 0x000e240000002100 */
/*0030*/ IMAD R9, R2, c[0x0][0x0], R9 ; /* 0x0000000002097a24 */
/* 0x001fca00078e0209 */
/*0040*/ ISETP.GE.AND P0, PT, R9, c[0x0][0x190], PT ; /* 0x0000640009007a0c */
/* 0x000fda0003f06270 */
/*0050*/ @P0 EXIT ; /* 0x000000000000094d */
/* 0x000fea0003800000 */
/*0060*/ IMAD.MOV.U32 R6, RZ, RZ, 0x4 ; /* 0x00000004ff067424 */
/* 0x000fe200078e00ff */
/*0070*/ ULDC.64 UR4, c[0x0][0x118] ; /* 0x0000460000047ab9 */
/* 0x000fc60000000a00 */
/*0080*/ IMAD.WIDE.U32 R2, R2, R6, c[0x0][0x198] ; /* 0x0000660002027625 */
/* 0x000fca00078e0006 */
/*0090*/ ATOMG.E.EXCH.STRONG.GPU PT, RZ, [R2.64], R9 ; /* 0x0000000902ff79a8 */
/* 0x0001e8000c1ee1c4 */
/*00a0*/ BAR.SYNC.DEFER_BLOCKING 0x0 ; /* 0x0000000000007b1d */
/* 0x000fec0000010000 */
/*00b0*/ LDG.E R0, [R2.64] ; /* 0x0000000402007981 */
/* 0x000ea2000c1e1900 */
/*00c0*/ IMAD.MOV.U32 R8, RZ, RZ, 0x1 ; /* 0x00000001ff087424 */
/* 0x000fe200078e00ff */
/*00d0*/ SHF.R.S32.HI R10, RZ, 0x1f, R9 ; /* 0x0000001fff0a7819 */
/* 0x000fe20000011409 */
/*00e0*/ IMAD.SHL.U32 R12, R9.reuse, 0x4, RZ ; /* 0x00000004090c7824 */
/* 0x040fe200078e00ff */
/*00f0*/ IADD3 R4, P1, R9.reuse, c[0x0][0x188], RZ ; /* 0x0000620009047a10 */
/* 0x040fe20007f3e0ff */
/*0100*/ IMAD.WIDE R6, R9.reuse, R6, c[0x0][0x160] ; /* 0x0000580009067625 */
/* 0x040fe200078e0206 */
/*0110*/ SHF.L.U64.HI R13, R9, 0x2, R10 ; /* 0x00000002090d7819 */
/* 0x000fc4000001020a */
/*0120*/ IADD3.X R5, R10, c[0x0][0x18c], RZ, P1, !PT ; /* 0x000063000a057a10 */
/* 0x000fe20000ffe4ff */
/*0130*/ IMAD.MOV.U32 R15, RZ, RZ, -0x1 ; /* 0xffffffffff0f7424 */
/* 0x000fe400078e00ff */
/*0140*/ IMAD.MOV.U32 R17, RZ, RZ, 0x1 ; /* 0x00000001ff117424 */
/* 0x000fe200078e00ff */
/*0150*/ ISETP.NE.AND P0, PT, R9, R0, PT ; /* 0x000000000900720c */
/* 0x004fda0003f05270 */
/*0160*/ @!P0 PRMT R3, R8, 0x7610, R3 ; /* 0x0000761008038816 */
/* 0x001fe20000000003 */
/*0170*/ @P0 STG.E.U8 [R4.64], RZ ; /* 0x000000ff04000986 */
/* 0x000fe2000c101104 */
/*0180*/ @!P0 LEA R8, P1, R9, c[0x0][0x180], 0x2 ; /* 0x0000600009088a11 */
/* 0x000fc600078210ff */
/*0190*/ @P0 STG.E [R6.64], R0 ; /* 0x0000000006000986 */
/* 0x000fe2000c101904 */
/*01a0*/ @!P0 LEA.HI.X R9, R9, c[0x0][0x184], R10, 0x2, P1 ; /* 0x0000610009098a11 */
/* 0x000fe400008f140a */
/*01b0*/ IADD3 R2, P1, R12.reuse, c[0x0][0x178], RZ ; /* 0x00005e000c027a10 */
/* 0x040fe20007f3e0ff */
/*01c0*/ @!P0 STG.E.U8 [R4.64], R3 ; /* 0x0000000304008986 */
/* 0x0001e2000c101104 */
/*01d0*/ IADD3 R10, P2, R12.reuse, c[0x0][0x168], RZ ; /* 0x00005a000c0a7a10 */
/* 0x040fe40007f5e0ff */
/*01e0*/ IADD3 R12, P3, R12, c[0x0][0x170], RZ ; /* 0x00005c000c0c7a10 */
/* 0x000fe20007f7e0ff */
/*01f0*/ @!P0 STG.E [R6.64], R15 ; /* 0x0000000f06008986 */
/* 0x000fe2000c101904 */
/*0200*/ IADD3.X R11, R13, c[0x0][0x16c], RZ, P2, !PT ; /* 0x00005b000d0b7a10 */
/* 0x000fc600017fe4ff */
/*0210*/ @!P0 STG.E [R8.64], RZ ; /* 0x000000ff08008986 */
/* 0x000fe2000c101904 */
/*0220*/ IADD3.X R3, R13.reuse, c[0x0][0x17c], RZ, P1, !PT ; /* 0x00005f000d037a10 */
/* 0x041fe40000ffe4ff */
/*0230*/ IADD3.X R13, R13, c[0x0][0x174], RZ, P3, !PT ; /* 0x00005d000d0d7a10 */
/* 0x000fc60001ffe4ff */
/*0240*/ STG.E [R2.64], R17 ; /* 0x0000001102007986 */
/* 0x000fe8000c101904 */
/*0250*/ STG.E [R10.64], R15 ; /* 0x0000000f0a007986 */
/* 0x000fe8000c101904 */
/*0260*/ STG.E [R12.64], R15 ; /* 0x0000000f0c007986 */
/* 0x000fe2000c101904 */
/*0270*/ EXIT ; /* 0x000000000000794d */
/* 0x000fea0003800000 */
/*0280*/ BRA 0x280; /* 0xfffffff000007947 */
/* 0x000fc0000383ffff */
/*0290*/ NOP; /* 0x0000000000007918 */
/* 0x000fc00000000000 */
/*02a0*/ NOP; /* 0x0000000000007918 */
/* 0x000fc00000000000 */
/*02b0*/ NOP; /* 0x0000000000007918 */
/* 0x000fc00000000000 */
/*02c0*/ NOP; /* 0x0000000000007918 */
/* 0x000fc00000000000 */
/*02d0*/ NOP; /* 0x0000000000007918 */
/* 0x000fc00000000000 */
/*02e0*/ NOP; /* 0x0000000000007918 */
/* 0x000fc00000000000 */
/*02f0*/ NOP; /* 0x0000000000007918 */
/* 0x000fc00000000000 */
/*0300*/ NOP; /* 0x0000000000007918 */
/* 0x000fc00000000000 */
/*0310*/ NOP; /* 0x0000000000007918 */
/* 0x000fc00000000000 */
/*0320*/ NOP; /* 0x0000000000007918 */
/* 0x000fc00000000000 */
/*0330*/ NOP; /* 0x0000000000007918 */
/* 0x000fc00000000000 */
/*0340*/ NOP; /* 0x0000000000007918 */
/* 0x000fc00000000000 */
/*0350*/ NOP; /* 0x0000000000007918 */
/* 0x000fc00000000000 */
/*0360*/ NOP; /* 0x0000000000007918 */
/* 0x000fc00000000000 */
/*0370*/ NOP; /* 0x0000000000007918 */
/* 0x000fc00000000000 */
.......... |
You are a helpful coding assistant specialized in converting CUDA source code to CUDA host assembly. | #include <cstdio>
extern "C" {
__device__
static int THREADS_IN_BLOCK = 1024;
//index - size of left tree
__global__
void init(int* parent, int* right, int* left, int* tree_size, int* height, bool* computed, int size, int* roots) {
int thid = blockIdx.x * blockDim.x + threadIdx.x;
if (thid >= size) {
return;
}
// root = blockIdx.x * blockDim.x + root;
// if (root >= size) {
// root = blockIdx.x * blockDim.x;
// }
// __syncthreads();
atomicExch(roots + blockIdx.x, thid);
__syncthreads();
int root = roots[blockIdx.x];
if (thid == root) {
computed[thid] = true;
parent[thid] = -1;
height[thid] = 0;
}
else {
computed[thid] = false;
parent[thid] = root;
}
tree_size[thid] = 1;
left[thid] = right[thid] = -1;
}
__global__
void quick_sort(int* to_sort, int* parent, int* left, int* right, int* tree_size, int* height, bool* computed, bool* sth_changed, int size) {
int thid = blockIdx.x * blockDim.x + threadIdx.x;
if (thid >= size || computed[thid]) {
return;
}
*sth_changed = true;
//I assume that I have parrent
int parent_id = parent[thid];
int my_value = to_sort[thid];
int parent_value = to_sort[parent_id];
bool is_left = false;
if ( my_value < parent_value
|| ( my_value == parent_value && thid < parent_id)) {
is_left = true;
}
// __syncthreads();
if (is_left) atomicExch(left + parent_id, thid);
__syncthreads();
if (is_left) {
int left_parent = left[parent_id];
if (thid == left_parent) {
// printf("%d\n", left_parent);
computed[thid] = true;
height[thid] = height[parent_id] + 1;
}
else {
parent[thid] = left_parent;
atomicAdd(tree_size + left_parent, 1);
}
return;
}
// __syncthreads();
atomicExch(right + parent_id, thid);
__syncthreads();
int right_parent = right[parent_id];
if (thid == right_parent) {
// printf("%d\n", right_parent);
computed[thid] = true;
height[thid] = height[parent_id] + 1;
}
else {
parent[thid] = right_parent;
atomicAdd(tree_size + right_parent, 1);
}
}
__global__
void tree_to_array(int* tree, int* array, int* indexes, int* parent, int* left, int* tree_size, int* height, int h, bool* sth_changed, int size) {
int thid = blockIdx.x * blockDim.x + threadIdx.x;
if (thid >= size || height[thid] != h) {
return;
}
*sth_changed = true;
int index_in_array = blockIdx.x * blockDim.x;
int left_child = left[thid];
int parent_id = parent[thid];
//I am root
if (parent_id == -1) {
if (left_child != -1) {
index_in_array += tree_size[left_child];
}
array[index_in_array] = tree[thid];
indexes[thid] = index_in_array;
return;
}
int left_parents_child = left[parent_id];
bool is_left = (left_parents_child == thid);
if (is_left) {
index_in_array = indexes[parent_id] - tree_size[thid];
}
else {
index_in_array = indexes[parent_id] + 1;
}
if (left_child != -1) {
index_in_array += tree_size[left_child];
}
array[index_in_array] = tree[thid];
indexes[thid] = index_in_array;
}
} | .file "tmpxft_001a92c4_00000000-6_quick_sort.cudafe1.cpp"
.text
#APP
#NO_APP
.type _ZL26__cudaUnregisterBinaryUtilv, @function
_ZL26__cudaUnregisterBinaryUtilv:
.LFB2059:
.cfi_startproc
endbr64
subq $8, %rsp
.cfi_def_cfa_offset 16
movq _ZL20__cudaFatCubinHandle(%rip), %rdi
call __cudaUnregisterFatBinary@PLT
addq $8, %rsp
.cfi_def_cfa_offset 8
ret
.cfi_endproc
.LFE2059:
.size _ZL26__cudaUnregisterBinaryUtilv, .-_ZL26__cudaUnregisterBinaryUtilv
.globl _Z36__device_stub__Z4initPiS_S_S_S_PbiS_PiS_S_S_S_PbiS_
.type _Z36__device_stub__Z4initPiS_S_S_S_PbiS_PiS_S_S_S_PbiS_, @function
_Z36__device_stub__Z4initPiS_S_S_S_PbiS_PiS_S_S_S_PbiS_:
.LFB2081:
.cfi_startproc
endbr64
subq $216, %rsp
.cfi_def_cfa_offset 224
movq %rdi, 56(%rsp)
movq %rsi, 48(%rsp)
movq %rdx, 40(%rsp)
movq %rcx, 32(%rsp)
movq %r8, 24(%rsp)
movq %r9, 16(%rsp)
movq 232(%rsp), %rax
movq %rax, 8(%rsp)
movq %fs:40, %rax
movq %rax, 200(%rsp)
xorl %eax, %eax
leaq 56(%rsp), %rax
movq %rax, 128(%rsp)
leaq 48(%rsp), %rax
movq %rax, 136(%rsp)
leaq 40(%rsp), %rax
movq %rax, 144(%rsp)
leaq 32(%rsp), %rax
movq %rax, 152(%rsp)
leaq 24(%rsp), %rax
movq %rax, 160(%rsp)
leaq 16(%rsp), %rax
movq %rax, 168(%rsp)
leaq 224(%rsp), %rax
movq %rax, 176(%rsp)
leaq 8(%rsp), %rax
movq %rax, 184(%rsp)
movl $1, 80(%rsp)
movl $1, 84(%rsp)
movl $1, 88(%rsp)
movl $1, 92(%rsp)
movl $1, 96(%rsp)
movl $1, 100(%rsp)
leaq 72(%rsp), %rcx
leaq 64(%rsp), %rdx
leaq 92(%rsp), %rsi
leaq 80(%rsp), %rdi
call __cudaPopCallConfiguration@PLT
testl %eax, %eax
je .L7
.L3:
movq 200(%rsp), %rax
subq %fs:40, %rax
jne .L8
addq $216, %rsp
.cfi_remember_state
.cfi_def_cfa_offset 8
ret
.L7:
.cfi_restore_state
pushq 72(%rsp)
.cfi_def_cfa_offset 232
pushq 72(%rsp)
.cfi_def_cfa_offset 240
leaq 144(%rsp), %r9
movq 108(%rsp), %rcx
movl 116(%rsp), %r8d
movq 96(%rsp), %rsi
movl 104(%rsp), %edx
leaq init(%rip), %rdi
call cudaLaunchKernel@PLT
addq $16, %rsp
.cfi_def_cfa_offset 224
jmp .L3
.L8:
call __stack_chk_fail@PLT
.cfi_endproc
.LFE2081:
.size _Z36__device_stub__Z4initPiS_S_S_S_PbiS_PiS_S_S_S_PbiS_, .-_Z36__device_stub__Z4initPiS_S_S_S_PbiS_PiS_S_S_S_PbiS_
.globl init
.type init, @function
init:
.LFB2082:
.cfi_startproc
endbr64
subq $8, %rsp
.cfi_def_cfa_offset 16
pushq 24(%rsp)
.cfi_def_cfa_offset 24
movl 24(%rsp), %eax
pushq %rax
.cfi_def_cfa_offset 32
call _Z36__device_stub__Z4initPiS_S_S_S_PbiS_PiS_S_S_S_PbiS_
addq $24, %rsp
.cfi_def_cfa_offset 8
ret
.cfi_endproc
.LFE2082:
.size init, .-init
.globl _Z46__device_stub__Z10quick_sortPiS_S_S_S_S_PbS0_iPiS_S_S_S_S_PbS0_i
.type _Z46__device_stub__Z10quick_sortPiS_S_S_S_S_PbS0_iPiS_S_S_S_S_PbS0_i, @function
_Z46__device_stub__Z10quick_sortPiS_S_S_S_S_PbS0_iPiS_S_S_S_S_PbS0_i:
.LFB2083:
.cfi_startproc
endbr64
subq $216, %rsp
.cfi_def_cfa_offset 224
movq %rdi, 56(%rsp)
movq %rsi, 48(%rsp)
movq %rdx, 40(%rsp)
movq %rcx, 32(%rsp)
movq %r8, 24(%rsp)
movq %r9, 16(%rsp)
movq 224(%rsp), %rax
movq %rax, 8(%rsp)
movq 232(%rsp), %rax
movq %rax, (%rsp)
movq %fs:40, %rax
movq %rax, 200(%rsp)
xorl %eax, %eax
leaq 56(%rsp), %rax
movq %rax, 128(%rsp)
leaq 48(%rsp), %rax
movq %rax, 136(%rsp)
leaq 40(%rsp), %rax
movq %rax, 144(%rsp)
leaq 32(%rsp), %rax
movq %rax, 152(%rsp)
leaq 24(%rsp), %rax
movq %rax, 160(%rsp)
leaq 16(%rsp), %rax
movq %rax, 168(%rsp)
leaq 8(%rsp), %rax
movq %rax, 176(%rsp)
movq %rsp, %rax
movq %rax, 184(%rsp)
leaq 240(%rsp), %rax
movq %rax, 192(%rsp)
movl $1, 80(%rsp)
movl $1, 84(%rsp)
movl $1, 88(%rsp)
movl $1, 92(%rsp)
movl $1, 96(%rsp)
movl $1, 100(%rsp)
leaq 72(%rsp), %rcx
leaq 64(%rsp), %rdx
leaq 92(%rsp), %rsi
leaq 80(%rsp), %rdi
call __cudaPopCallConfiguration@PLT
testl %eax, %eax
je .L15
.L11:
movq 200(%rsp), %rax
subq %fs:40, %rax
jne .L16
addq $216, %rsp
.cfi_remember_state
.cfi_def_cfa_offset 8
ret
.L15:
.cfi_restore_state
pushq 72(%rsp)
.cfi_def_cfa_offset 232
pushq 72(%rsp)
.cfi_def_cfa_offset 240
leaq 144(%rsp), %r9
movq 108(%rsp), %rcx
movl 116(%rsp), %r8d
movq 96(%rsp), %rsi
movl 104(%rsp), %edx
leaq quick_sort(%rip), %rdi
call cudaLaunchKernel@PLT
addq $16, %rsp
.cfi_def_cfa_offset 224
jmp .L11
.L16:
call __stack_chk_fail@PLT
.cfi_endproc
.LFE2083:
.size _Z46__device_stub__Z10quick_sortPiS_S_S_S_S_PbS0_iPiS_S_S_S_S_PbS0_i, .-_Z46__device_stub__Z10quick_sortPiS_S_S_S_S_PbS0_iPiS_S_S_S_S_PbS0_i
.globl quick_sort
.type quick_sort, @function
quick_sort:
.LFB2084:
.cfi_startproc
endbr64
subq $16, %rsp
.cfi_def_cfa_offset 24
movl 40(%rsp), %eax
pushq %rax
.cfi_def_cfa_offset 32
pushq 40(%rsp)
.cfi_def_cfa_offset 40
pushq 40(%rsp)
.cfi_def_cfa_offset 48
call _Z46__device_stub__Z10quick_sortPiS_S_S_S_S_PbS0_iPiS_S_S_S_S_PbS0_i
addq $40, %rsp
.cfi_def_cfa_offset 8
ret
.cfi_endproc
.LFE2084:
.size quick_sort, .-quick_sort
.globl _Z49__device_stub__Z13tree_to_arrayPiS_S_S_S_S_S_iPbiPiS_S_S_S_S_S_iPbi
.type _Z49__device_stub__Z13tree_to_arrayPiS_S_S_S_S_S_iPbiPiS_S_S_S_S_S_iPbi, @function
_Z49__device_stub__Z13tree_to_arrayPiS_S_S_S_S_S_iPbiPiS_S_S_S_S_S_iPbi:
.LFB2085:
.cfi_startproc
endbr64
subq $232, %rsp
.cfi_def_cfa_offset 240
movq %rdi, 56(%rsp)
movq %rsi, 48(%rsp)
movq %rdx, 40(%rsp)
movq %rcx, 32(%rsp)
movq %r8, 24(%rsp)
movq %r9, 16(%rsp)
movq 240(%rsp), %rax
movq %rax, 8(%rsp)
movq 256(%rsp), %rax
movq %rax, (%rsp)
movq %fs:40, %rax
movq %rax, 216(%rsp)
xorl %eax, %eax
leaq 56(%rsp), %rax
movq %rax, 128(%rsp)
leaq 48(%rsp), %rax
movq %rax, 136(%rsp)
leaq 40(%rsp), %rax
movq %rax, 144(%rsp)
leaq 32(%rsp), %rax
movq %rax, 152(%rsp)
leaq 24(%rsp), %rax
movq %rax, 160(%rsp)
leaq 16(%rsp), %rax
movq %rax, 168(%rsp)
leaq 8(%rsp), %rax
movq %rax, 176(%rsp)
leaq 248(%rsp), %rax
movq %rax, 184(%rsp)
movq %rsp, %rax
movq %rax, 192(%rsp)
leaq 264(%rsp), %rax
movq %rax, 200(%rsp)
movl $1, 80(%rsp)
movl $1, 84(%rsp)
movl $1, 88(%rsp)
movl $1, 92(%rsp)
movl $1, 96(%rsp)
movl $1, 100(%rsp)
leaq 72(%rsp), %rcx
leaq 64(%rsp), %rdx
leaq 92(%rsp), %rsi
leaq 80(%rsp), %rdi
call __cudaPopCallConfiguration@PLT
testl %eax, %eax
je .L23
.L19:
movq 216(%rsp), %rax
subq %fs:40, %rax
jne .L24
addq $232, %rsp
.cfi_remember_state
.cfi_def_cfa_offset 8
ret
.L23:
.cfi_restore_state
pushq 72(%rsp)
.cfi_def_cfa_offset 248
pushq 72(%rsp)
.cfi_def_cfa_offset 256
leaq 144(%rsp), %r9
movq 108(%rsp), %rcx
movl 116(%rsp), %r8d
movq 96(%rsp), %rsi
movl 104(%rsp), %edx
leaq tree_to_array(%rip), %rdi
call cudaLaunchKernel@PLT
addq $16, %rsp
.cfi_def_cfa_offset 240
jmp .L19
.L24:
call __stack_chk_fail@PLT
.cfi_endproc
.LFE2085:
.size _Z49__device_stub__Z13tree_to_arrayPiS_S_S_S_S_S_iPbiPiS_S_S_S_S_S_iPbi, .-_Z49__device_stub__Z13tree_to_arrayPiS_S_S_S_S_S_iPbiPiS_S_S_S_S_S_iPbi
.globl tree_to_array
.type tree_to_array, @function
tree_to_array:
.LFB2086:
.cfi_startproc
endbr64
subq $8, %rsp
.cfi_def_cfa_offset 16
movl 40(%rsp), %eax
pushq %rax
.cfi_def_cfa_offset 24
pushq 40(%rsp)
.cfi_def_cfa_offset 32
movl 40(%rsp), %eax
pushq %rax
.cfi_def_cfa_offset 40
pushq 40(%rsp)
.cfi_def_cfa_offset 48
call _Z49__device_stub__Z13tree_to_arrayPiS_S_S_S_S_S_iPbiPiS_S_S_S_S_S_iPbi
addq $40, %rsp
.cfi_def_cfa_offset 8
ret
.cfi_endproc
.LFE2086:
.size tree_to_array, .-tree_to_array
.section .rodata.str1.1,"aMS",@progbits,1
.LC0:
.string "tree_to_array"
.LC1:
.string "quick_sort"
.LC2:
.string "init"
.LC3:
.string "THREADS_IN_BLOCK"
.text
.type _ZL24__sti____cudaRegisterAllv, @function
_ZL24__sti____cudaRegisterAllv:
.LFB2088:
.cfi_startproc
endbr64
pushq %rbx
.cfi_def_cfa_offset 16
.cfi_offset 3, -16
leaq _ZL15__fatDeviceText(%rip), %rdi
call __cudaRegisterFatBinary@PLT
movq %rax, %rbx
movq %rax, _ZL20__cudaFatCubinHandle(%rip)
pushq $0
.cfi_def_cfa_offset 24
pushq $0
.cfi_def_cfa_offset 32
pushq $0
.cfi_def_cfa_offset 40
pushq $0
.cfi_def_cfa_offset 48
movl $0, %r9d
movl $-1, %r8d
leaq .LC0(%rip), %rdx
movq %rdx, %rcx
leaq tree_to_array(%rip), %rsi
movq %rax, %rdi
call __cudaRegisterFunction@PLT
addq $32, %rsp
.cfi_def_cfa_offset 16
pushq $0
.cfi_def_cfa_offset 24
pushq $0
.cfi_def_cfa_offset 32
pushq $0
.cfi_def_cfa_offset 40
pushq $0
.cfi_def_cfa_offset 48
movl $0, %r9d
movl $-1, %r8d
leaq .LC1(%rip), %rdx
movq %rdx, %rcx
leaq quick_sort(%rip), %rsi
movq %rbx, %rdi
call __cudaRegisterFunction@PLT
addq $32, %rsp
.cfi_def_cfa_offset 16
pushq $0
.cfi_def_cfa_offset 24
pushq $0
.cfi_def_cfa_offset 32
pushq $0
.cfi_def_cfa_offset 40
pushq $0
.cfi_def_cfa_offset 48
movl $0, %r9d
movl $-1, %r8d
leaq .LC2(%rip), %rdx
movq %rdx, %rcx
leaq init(%rip), %rsi
movq %rbx, %rdi
call __cudaRegisterFunction@PLT
addq $32, %rsp
.cfi_def_cfa_offset 16
pushq $0
.cfi_def_cfa_offset 24
pushq $0
.cfi_def_cfa_offset 32
movl $4, %r9d
movl $0, %r8d
leaq .LC3(%rip), %rdx
movq %rdx, %rcx
leaq _ZL16THREADS_IN_BLOCK(%rip), %rsi
movq %rbx, %rdi
call __cudaRegisterVar@PLT
addq $16, %rsp
.cfi_def_cfa_offset 16
movq _ZL20__cudaFatCubinHandle(%rip), %rdi
call __cudaRegisterFatBinaryEnd@PLT
leaq _ZL26__cudaUnregisterBinaryUtilv(%rip), %rdi
call atexit@PLT
popq %rbx
.cfi_def_cfa_offset 8
ret
.cfi_endproc
.LFE2088:
.size _ZL24__sti____cudaRegisterAllv, .-_ZL24__sti____cudaRegisterAllv
.section .init_array,"aw"
.align 8
.quad _ZL24__sti____cudaRegisterAllv
.section .nvFatBinSegment,"aw"
.align 8
.type _ZL15__fatDeviceText, @object
.size _ZL15__fatDeviceText, 24
_ZL15__fatDeviceText:
.long 1180844977
.long 1
.quad fatbinData
.quad 0
.local _ZL20__cudaFatCubinHandle
.comm _ZL20__cudaFatCubinHandle,8,8
.local _ZL16THREADS_IN_BLOCK
.comm _ZL16THREADS_IN_BLOCK,4,4
.ident "GCC: (Ubuntu 13.3.0-6ubuntu2~24.04) 13.3.0"
.section .note.GNU-stack,"",@progbits
.section .note.gnu.property,"a"
.align 8
.long 1f - 0f
.long 4f - 1f
.long 5
0:
.string "GNU"
1:
.align 8
.long 0xc0000002
.long 3f - 2f
2:
.long 0x3
3:
.align 8
4: |
You are a helpful coding assistant specialized in converting CUDA source code to HIP/AMD source code. | #include <cstdio>
extern "C" {
__device__
static int THREADS_IN_BLOCK = 1024;
//index - size of left tree
__global__
void init(int* parent, int* right, int* left, int* tree_size, int* height, bool* computed, int size, int* roots) {
int thid = blockIdx.x * blockDim.x + threadIdx.x;
if (thid >= size) {
return;
}
// root = blockIdx.x * blockDim.x + root;
// if (root >= size) {
// root = blockIdx.x * blockDim.x;
// }
// __syncthreads();
atomicExch(roots + blockIdx.x, thid);
__syncthreads();
int root = roots[blockIdx.x];
if (thid == root) {
computed[thid] = true;
parent[thid] = -1;
height[thid] = 0;
}
else {
computed[thid] = false;
parent[thid] = root;
}
tree_size[thid] = 1;
left[thid] = right[thid] = -1;
}
__global__
void quick_sort(int* to_sort, int* parent, int* left, int* right, int* tree_size, int* height, bool* computed, bool* sth_changed, int size) {
int thid = blockIdx.x * blockDim.x + threadIdx.x;
if (thid >= size || computed[thid]) {
return;
}
*sth_changed = true;
//I assume that I have parrent
int parent_id = parent[thid];
int my_value = to_sort[thid];
int parent_value = to_sort[parent_id];
bool is_left = false;
if ( my_value < parent_value
|| ( my_value == parent_value && thid < parent_id)) {
is_left = true;
}
// __syncthreads();
if (is_left) atomicExch(left + parent_id, thid);
__syncthreads();
if (is_left) {
int left_parent = left[parent_id];
if (thid == left_parent) {
// printf("%d\n", left_parent);
computed[thid] = true;
height[thid] = height[parent_id] + 1;
}
else {
parent[thid] = left_parent;
atomicAdd(tree_size + left_parent, 1);
}
return;
}
// __syncthreads();
atomicExch(right + parent_id, thid);
__syncthreads();
int right_parent = right[parent_id];
if (thid == right_parent) {
// printf("%d\n", right_parent);
computed[thid] = true;
height[thid] = height[parent_id] + 1;
}
else {
parent[thid] = right_parent;
atomicAdd(tree_size + right_parent, 1);
}
}
__global__
void tree_to_array(int* tree, int* array, int* indexes, int* parent, int* left, int* tree_size, int* height, int h, bool* sth_changed, int size) {
int thid = blockIdx.x * blockDim.x + threadIdx.x;
if (thid >= size || height[thid] != h) {
return;
}
*sth_changed = true;
int index_in_array = blockIdx.x * blockDim.x;
int left_child = left[thid];
int parent_id = parent[thid];
//I am root
if (parent_id == -1) {
if (left_child != -1) {
index_in_array += tree_size[left_child];
}
array[index_in_array] = tree[thid];
indexes[thid] = index_in_array;
return;
}
int left_parents_child = left[parent_id];
bool is_left = (left_parents_child == thid);
if (is_left) {
index_in_array = indexes[parent_id] - tree_size[thid];
}
else {
index_in_array = indexes[parent_id] + 1;
}
if (left_child != -1) {
index_in_array += tree_size[left_child];
}
array[index_in_array] = tree[thid];
indexes[thid] = index_in_array;
}
} | #include <hip/hip_runtime.h>
#include <cstdio>
extern "C" {
__device__
static int THREADS_IN_BLOCK = 1024;
//index - size of left tree
__global__
void init(int* parent, int* right, int* left, int* tree_size, int* height, bool* computed, int size, int* roots) {
int thid = blockIdx.x * blockDim.x + threadIdx.x;
if (thid >= size) {
return;
}
// root = blockIdx.x * blockDim.x + root;
// if (root >= size) {
// root = blockIdx.x * blockDim.x;
// }
// __syncthreads();
atomicExch(roots + blockIdx.x, thid);
__syncthreads();
int root = roots[blockIdx.x];
if (thid == root) {
computed[thid] = true;
parent[thid] = -1;
height[thid] = 0;
}
else {
computed[thid] = false;
parent[thid] = root;
}
tree_size[thid] = 1;
left[thid] = right[thid] = -1;
}
__global__
void quick_sort(int* to_sort, int* parent, int* left, int* right, int* tree_size, int* height, bool* computed, bool* sth_changed, int size) {
int thid = blockIdx.x * blockDim.x + threadIdx.x;
if (thid >= size || computed[thid]) {
return;
}
*sth_changed = true;
//I assume that I have parrent
int parent_id = parent[thid];
int my_value = to_sort[thid];
int parent_value = to_sort[parent_id];
bool is_left = false;
if ( my_value < parent_value
|| ( my_value == parent_value && thid < parent_id)) {
is_left = true;
}
// __syncthreads();
if (is_left) atomicExch(left + parent_id, thid);
__syncthreads();
if (is_left) {
int left_parent = left[parent_id];
if (thid == left_parent) {
// printf("%d\n", left_parent);
computed[thid] = true;
height[thid] = height[parent_id] + 1;
}
else {
parent[thid] = left_parent;
atomicAdd(tree_size + left_parent, 1);
}
return;
}
// __syncthreads();
atomicExch(right + parent_id, thid);
__syncthreads();
int right_parent = right[parent_id];
if (thid == right_parent) {
// printf("%d\n", right_parent);
computed[thid] = true;
height[thid] = height[parent_id] + 1;
}
else {
parent[thid] = right_parent;
atomicAdd(tree_size + right_parent, 1);
}
}
__global__
void tree_to_array(int* tree, int* array, int* indexes, int* parent, int* left, int* tree_size, int* height, int h, bool* sth_changed, int size) {
int thid = blockIdx.x * blockDim.x + threadIdx.x;
if (thid >= size || height[thid] != h) {
return;
}
*sth_changed = true;
int index_in_array = blockIdx.x * blockDim.x;
int left_child = left[thid];
int parent_id = parent[thid];
//I am root
if (parent_id == -1) {
if (left_child != -1) {
index_in_array += tree_size[left_child];
}
array[index_in_array] = tree[thid];
indexes[thid] = index_in_array;
return;
}
int left_parents_child = left[parent_id];
bool is_left = (left_parents_child == thid);
if (is_left) {
index_in_array = indexes[parent_id] - tree_size[thid];
}
else {
index_in_array = indexes[parent_id] + 1;
}
if (left_child != -1) {
index_in_array += tree_size[left_child];
}
array[index_in_array] = tree[thid];
indexes[thid] = index_in_array;
}
} |
You are a helpful coding assistant specialized in converting HIP source code to AMD device assembly. | #include <hip/hip_runtime.h>
#include <cstdio>
extern "C" {
__device__
static int THREADS_IN_BLOCK = 1024;
//index - size of left tree
__global__
void init(int* parent, int* right, int* left, int* tree_size, int* height, bool* computed, int size, int* roots) {
int thid = blockIdx.x * blockDim.x + threadIdx.x;
if (thid >= size) {
return;
}
// root = blockIdx.x * blockDim.x + root;
// if (root >= size) {
// root = blockIdx.x * blockDim.x;
// }
// __syncthreads();
atomicExch(roots + blockIdx.x, thid);
__syncthreads();
int root = roots[blockIdx.x];
if (thid == root) {
computed[thid] = true;
parent[thid] = -1;
height[thid] = 0;
}
else {
computed[thid] = false;
parent[thid] = root;
}
tree_size[thid] = 1;
left[thid] = right[thid] = -1;
}
__global__
void quick_sort(int* to_sort, int* parent, int* left, int* right, int* tree_size, int* height, bool* computed, bool* sth_changed, int size) {
int thid = blockIdx.x * blockDim.x + threadIdx.x;
if (thid >= size || computed[thid]) {
return;
}
*sth_changed = true;
//I assume that I have parrent
int parent_id = parent[thid];
int my_value = to_sort[thid];
int parent_value = to_sort[parent_id];
bool is_left = false;
if ( my_value < parent_value
|| ( my_value == parent_value && thid < parent_id)) {
is_left = true;
}
// __syncthreads();
if (is_left) atomicExch(left + parent_id, thid);
__syncthreads();
if (is_left) {
int left_parent = left[parent_id];
if (thid == left_parent) {
// printf("%d\n", left_parent);
computed[thid] = true;
height[thid] = height[parent_id] + 1;
}
else {
parent[thid] = left_parent;
atomicAdd(tree_size + left_parent, 1);
}
return;
}
// __syncthreads();
atomicExch(right + parent_id, thid);
__syncthreads();
int right_parent = right[parent_id];
if (thid == right_parent) {
// printf("%d\n", right_parent);
computed[thid] = true;
height[thid] = height[parent_id] + 1;
}
else {
parent[thid] = right_parent;
atomicAdd(tree_size + right_parent, 1);
}
}
__global__
void tree_to_array(int* tree, int* array, int* indexes, int* parent, int* left, int* tree_size, int* height, int h, bool* sth_changed, int size) {
int thid = blockIdx.x * blockDim.x + threadIdx.x;
if (thid >= size || height[thid] != h) {
return;
}
*sth_changed = true;
int index_in_array = blockIdx.x * blockDim.x;
int left_child = left[thid];
int parent_id = parent[thid];
//I am root
if (parent_id == -1) {
if (left_child != -1) {
index_in_array += tree_size[left_child];
}
array[index_in_array] = tree[thid];
indexes[thid] = index_in_array;
return;
}
int left_parents_child = left[parent_id];
bool is_left = (left_parents_child == thid);
if (is_left) {
index_in_array = indexes[parent_id] - tree_size[thid];
}
else {
index_in_array = indexes[parent_id] + 1;
}
if (left_child != -1) {
index_in_array += tree_size[left_child];
}
array[index_in_array] = tree[thid];
indexes[thid] = index_in_array;
}
} | .text
.amdgcn_target "amdgcn-amd-amdhsa--gfx1100"
.protected init
.globl init
.p2align 8
.type init,@function
init:
s_clause 0x1
s_load_b32 s3, s[0:1], 0x4c
s_load_b32 s4, s[0:1], 0x30
s_mov_b32 s2, s15
s_waitcnt lgkmcnt(0)
s_and_b32 s3, s3, 0xffff
s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
v_mad_u64_u32 v[1:2], null, s2, s3, v[0:1]
s_mov_b32 s3, exec_lo
v_cmpx_gt_i32_e64 s4, v1
s_cbranch_execz .LBB0_6
s_load_b64 s[4:5], s[0:1], 0x38
s_mov_b32 s3, 0
v_mov_b32_e32 v0, 0
s_lshl_b64 s[2:3], s[2:3], 2
v_ashrrev_i32_e32 v2, 31, v1
s_delay_alu instid0(VALU_DEP_1)
v_lshlrev_b64 v[5:6], 2, v[1:2]
s_waitcnt lgkmcnt(0)
s_add_u32 s2, s4, s2
s_addc_u32 s3, s5, s3
global_atomic_swap_b32 v0, v1, s[2:3]
s_waitcnt_vscnt null, 0x0
s_barrier
buffer_gl0_inv
global_load_b32 v0, v0, s[2:3]
s_clause 0x1
s_load_b64 s[2:3], s[0:1], 0x28
s_load_b64 s[4:5], s[0:1], 0x0
s_waitcnt lgkmcnt(0)
v_add_co_u32 v3, vcc_lo, s2, v1
v_add_co_u32 v5, s2, s4, v5
v_add_co_ci_u32_e32 v4, vcc_lo, s3, v2, vcc_lo
v_add_co_ci_u32_e64 v6, s2, s5, v6, s2
s_mov_b32 s2, exec_lo
s_waitcnt vmcnt(0)
v_cmpx_ne_u32_e64 v1, v0
s_xor_b32 s2, exec_lo, s2
s_cbranch_execz .LBB0_3
v_mov_b32_e32 v7, 0
global_store_b8 v[3:4], v7, off
global_store_b32 v[5:6], v0, off
.LBB0_3:
s_and_not1_saveexec_b32 s2, s2
s_cbranch_execz .LBB0_5
s_load_b64 s[4:5], s[0:1], 0x20
v_lshlrev_b64 v[7:8], 2, v[1:2]
v_dual_mov_b32 v0, 1 :: v_dual_mov_b32 v9, -1
v_mov_b32_e32 v10, 0
s_waitcnt lgkmcnt(0)
s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_4)
v_add_co_u32 v7, vcc_lo, s4, v7
v_add_co_ci_u32_e32 v8, vcc_lo, s5, v8, vcc_lo
global_store_b8 v[3:4], v0, off
global_store_b32 v[5:6], v9, off
global_store_b32 v[7:8], v10, off
.LBB0_5:
s_or_b32 exec_lo, exec_lo, s2
s_clause 0x1
s_load_b64 s[4:5], s[0:1], 0x18
s_load_b128 s[0:3], s[0:1], 0x8
v_lshlrev_b64 v[0:1], 2, v[1:2]
v_dual_mov_b32 v6, 1 :: v_dual_mov_b32 v7, -1
s_waitcnt lgkmcnt(0)
s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_3)
v_add_co_u32 v2, vcc_lo, s4, v0
v_add_co_ci_u32_e32 v3, vcc_lo, s5, v1, vcc_lo
v_add_co_u32 v4, vcc_lo, s0, v0
v_add_co_ci_u32_e32 v5, vcc_lo, s1, v1, vcc_lo
v_add_co_u32 v0, vcc_lo, s2, v0
v_add_co_ci_u32_e32 v1, vcc_lo, s3, v1, vcc_lo
global_store_b32 v[2:3], v6, off
global_store_b32 v[4:5], v7, off
global_store_b32 v[0:1], v7, off
.LBB0_6:
s_nop 0
s_sendmsg sendmsg(MSG_DEALLOC_VGPRS)
s_endpgm
.section .rodata,"a",@progbits
.p2align 6, 0x0
.amdhsa_kernel init
.amdhsa_group_segment_fixed_size 0
.amdhsa_private_segment_fixed_size 0
.amdhsa_kernarg_size 320
.amdhsa_user_sgpr_count 15
.amdhsa_user_sgpr_dispatch_ptr 0
.amdhsa_user_sgpr_queue_ptr 0
.amdhsa_user_sgpr_kernarg_segment_ptr 1
.amdhsa_user_sgpr_dispatch_id 0
.amdhsa_user_sgpr_private_segment_size 0
.amdhsa_wavefront_size32 1
.amdhsa_uses_dynamic_stack 0
.amdhsa_enable_private_segment 0
.amdhsa_system_sgpr_workgroup_id_x 1
.amdhsa_system_sgpr_workgroup_id_y 0
.amdhsa_system_sgpr_workgroup_id_z 0
.amdhsa_system_sgpr_workgroup_info 0
.amdhsa_system_vgpr_workitem_id 0
.amdhsa_next_free_vgpr 11
.amdhsa_next_free_sgpr 16
.amdhsa_float_round_mode_32 0
.amdhsa_float_round_mode_16_64 0
.amdhsa_float_denorm_mode_32 3
.amdhsa_float_denorm_mode_16_64 3
.amdhsa_dx10_clamp 1
.amdhsa_ieee_mode 1
.amdhsa_fp16_overflow 0
.amdhsa_workgroup_processor_mode 1
.amdhsa_memory_ordered 1
.amdhsa_forward_progress 0
.amdhsa_shared_vgpr_count 0
.amdhsa_exception_fp_ieee_invalid_op 0
.amdhsa_exception_fp_denorm_src 0
.amdhsa_exception_fp_ieee_div_zero 0
.amdhsa_exception_fp_ieee_overflow 0
.amdhsa_exception_fp_ieee_underflow 0
.amdhsa_exception_fp_ieee_inexact 0
.amdhsa_exception_int_div_zero 0
.end_amdhsa_kernel
.text
.Lfunc_end0:
.size init, .Lfunc_end0-init
.section .AMDGPU.csdata,"",@progbits
.text
.protected quick_sort
.globl quick_sort
.p2align 8
.type quick_sort,@function
quick_sort:
s_clause 0x1
s_load_b32 s2, s[0:1], 0x54
s_load_b32 s3, s[0:1], 0x40
s_waitcnt lgkmcnt(0)
s_and_b32 s2, s2, 0xffff
s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
v_mad_u64_u32 v[2:3], null, s15, s2, v[0:1]
s_mov_b32 s2, exec_lo
v_cmpx_gt_i32_e64 s3, v2
s_cbranch_execz .LBB1_19
s_load_b64 s[2:3], s[0:1], 0x30
v_ashrrev_i32_e32 v3, 31, v2
s_waitcnt lgkmcnt(0)
v_add_co_u32 v0, vcc_lo, s2, v2
s_delay_alu instid0(VALU_DEP_2)
v_add_co_ci_u32_e32 v1, vcc_lo, s3, v3, vcc_lo
global_load_u8 v4, v[0:1], off
s_waitcnt vmcnt(0)
v_cmp_eq_u16_e32 vcc_lo, 0, v4
s_and_b32 exec_lo, exec_lo, vcc_lo
s_cbranch_execz .LBB1_19
s_clause 0x1
s_load_b128 s[4:7], s[0:1], 0x0
s_load_b64 s[8:9], s[0:1], 0x38
v_lshlrev_b64 v[8:9], 2, v[2:3]
s_waitcnt lgkmcnt(0)
s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_2)
v_add_co_u32 v6, vcc_lo, s6, v8
v_add_co_ci_u32_e32 v7, vcc_lo, s7, v9, vcc_lo
v_add_co_u32 v8, vcc_lo, s4, v8
v_add_co_ci_u32_e32 v9, vcc_lo, s5, v9, vcc_lo
global_load_b32 v4, v[6:7], off
s_waitcnt vmcnt(0)
v_ashrrev_i32_e32 v5, 31, v4
s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
v_lshlrev_b64 v[10:11], 2, v[4:5]
v_add_co_u32 v10, vcc_lo, s4, v10
s_delay_alu instid0(VALU_DEP_2)
v_add_co_ci_u32_e32 v11, vcc_lo, s5, v11, vcc_lo
s_mov_b32 s5, exec_lo
s_clause 0x1
global_load_b32 v8, v[8:9], off
global_load_b32 v9, v[10:11], off
v_dual_mov_b32 v10, 0 :: v_dual_mov_b32 v11, 1
global_store_b8 v10, v11, s[8:9]
s_waitcnt vmcnt(0)
v_cmp_lt_i32_e64 s3, v8, v9
v_cmpx_ge_i32_e64 v8, v9
v_cmp_eq_u32_e32 vcc_lo, v8, v9
v_cmp_lt_i32_e64 s2, v2, v4
s_delay_alu instid0(VALU_DEP_4) | instskip(SKIP_1) | instid1(VALU_DEP_1)
s_and_not1_b32 s3, s3, exec_lo
s_mov_b32 s4, 0
s_and_b32 s2, s2, vcc_lo
s_delay_alu instid0(SALU_CYCLE_1) | instskip(NEXT) | instid1(SALU_CYCLE_1)
s_and_b32 s2, s2, exec_lo
s_or_b32 s3, s3, s2
s_or_b32 exec_lo, exec_lo, s5
s_and_saveexec_b32 s2, s3
s_or_b32 s4, s4, exec_lo
s_or_b32 exec_lo, exec_lo, s2
s_load_b64 s[2:3], s[0:1], 0x10
s_xor_b32 s8, s4, -1
s_and_saveexec_b32 s5, s4
s_cbranch_execz .LBB1_8
v_lshlrev_b64 v[8:9], 2, v[4:5]
s_waitcnt lgkmcnt(0)
s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_2)
v_add_co_u32 v8, vcc_lo, s2, v8
v_add_co_ci_u32_e32 v9, vcc_lo, s3, v9, vcc_lo
global_atomic_swap_b32 v[8:9], v2, off
.LBB1_8:
s_or_b32 exec_lo, exec_lo, s5
s_load_b128 s[4:7], s[0:1], 0x20
s_waitcnt lgkmcnt(0)
s_waitcnt_vscnt null, 0x0
s_barrier
buffer_gl0_inv
s_and_saveexec_b32 s9, s8
s_delay_alu instid0(SALU_CYCLE_1)
s_xor_b32 s8, exec_lo, s9
s_cbranch_execz .LBB1_14
s_load_b64 s[0:1], s[0:1], 0x18
v_lshlrev_b64 v[8:9], 2, v[4:5]
s_waitcnt lgkmcnt(0)
s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_2)
v_add_co_u32 v8, vcc_lo, s0, v8
v_add_co_ci_u32_e32 v9, vcc_lo, s1, v9, vcc_lo
s_mov_b32 s0, exec_lo
global_atomic_swap_b32 v[8:9], v2, off
s_waitcnt_vscnt null, 0x0
s_barrier
buffer_gl0_inv
global_load_b32 v8, v[8:9], off
s_waitcnt vmcnt(0)
v_cmpx_ne_u32_e64 v2, v8
s_xor_b32 s0, exec_lo, s0
s_cbranch_execz .LBB1_11
v_ashrrev_i32_e32 v9, 31, v8
v_mov_b32_e32 v2, 1
global_store_b32 v[6:7], v8, off
v_lshlrev_b64 v[0:1], 2, v[8:9]
s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_2)
v_add_co_u32 v0, vcc_lo, s4, v0
v_add_co_ci_u32_e32 v1, vcc_lo, s5, v1, vcc_lo
global_atomic_add_u32 v[0:1], v2, off
.LBB1_11:
s_and_not1_saveexec_b32 s0, s0
s_cbranch_execz .LBB1_13
v_lshlrev_b64 v[4:5], 2, v[4:5]
v_lshlrev_b64 v[2:3], 2, v[2:3]
s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_3)
v_add_co_u32 v4, vcc_lo, s6, v4
v_add_co_ci_u32_e32 v5, vcc_lo, s7, v5, vcc_lo
s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_4)
v_add_co_u32 v2, vcc_lo, s6, v2
v_add_co_ci_u32_e32 v3, vcc_lo, s7, v3, vcc_lo
global_load_b32 v4, v[4:5], off
s_waitcnt vmcnt(0)
v_dual_mov_b32 v5, 1 :: v_dual_add_nc_u32 v4, 1, v4
global_store_b8 v[0:1], v5, off
global_store_b32 v[2:3], v4, off
.LBB1_13:
s_or_b32 exec_lo, exec_lo, s0
.LBB1_14:
s_and_not1_saveexec_b32 s0, s8
s_cbranch_execz .LBB1_19
v_lshlrev_b64 v[8:9], 2, v[4:5]
s_mov_b32 s0, exec_lo
s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_2)
v_add_co_u32 v8, vcc_lo, s2, v8
v_add_co_ci_u32_e32 v9, vcc_lo, s3, v9, vcc_lo
global_load_b32 v8, v[8:9], off
s_waitcnt vmcnt(0)
v_cmpx_ne_u32_e64 v2, v8
s_xor_b32 s0, exec_lo, s0
s_cbranch_execz .LBB1_17
v_ashrrev_i32_e32 v9, 31, v8
v_mov_b32_e32 v2, 1
global_store_b32 v[6:7], v8, off
v_lshlrev_b64 v[0:1], 2, v[8:9]
s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_2)
v_add_co_u32 v0, vcc_lo, s4, v0
v_add_co_ci_u32_e32 v1, vcc_lo, s5, v1, vcc_lo
global_atomic_add_u32 v[0:1], v2, off
.LBB1_17:
s_and_not1_saveexec_b32 s0, s0
s_cbranch_execz .LBB1_19
v_lshlrev_b64 v[4:5], 2, v[4:5]
v_lshlrev_b64 v[2:3], 2, v[2:3]
s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_3)
v_add_co_u32 v4, vcc_lo, s6, v4
v_add_co_ci_u32_e32 v5, vcc_lo, s7, v5, vcc_lo
s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_4)
v_add_co_u32 v2, vcc_lo, s6, v2
v_add_co_ci_u32_e32 v3, vcc_lo, s7, v3, vcc_lo
global_load_b32 v4, v[4:5], off
s_waitcnt vmcnt(0)
v_dual_mov_b32 v5, 1 :: v_dual_add_nc_u32 v4, 1, v4
global_store_b8 v[0:1], v5, off
global_store_b32 v[2:3], v4, off
.LBB1_19:
s_nop 0
s_sendmsg sendmsg(MSG_DEALLOC_VGPRS)
s_endpgm
.section .rodata,"a",@progbits
.p2align 6, 0x0
.amdhsa_kernel quick_sort
.amdhsa_group_segment_fixed_size 0
.amdhsa_private_segment_fixed_size 0
.amdhsa_kernarg_size 328
.amdhsa_user_sgpr_count 15
.amdhsa_user_sgpr_dispatch_ptr 0
.amdhsa_user_sgpr_queue_ptr 0
.amdhsa_user_sgpr_kernarg_segment_ptr 1
.amdhsa_user_sgpr_dispatch_id 0
.amdhsa_user_sgpr_private_segment_size 0
.amdhsa_wavefront_size32 1
.amdhsa_uses_dynamic_stack 0
.amdhsa_enable_private_segment 0
.amdhsa_system_sgpr_workgroup_id_x 1
.amdhsa_system_sgpr_workgroup_id_y 0
.amdhsa_system_sgpr_workgroup_id_z 0
.amdhsa_system_sgpr_workgroup_info 0
.amdhsa_system_vgpr_workitem_id 0
.amdhsa_next_free_vgpr 12
.amdhsa_next_free_sgpr 16
.amdhsa_float_round_mode_32 0
.amdhsa_float_round_mode_16_64 0
.amdhsa_float_denorm_mode_32 3
.amdhsa_float_denorm_mode_16_64 3
.amdhsa_dx10_clamp 1
.amdhsa_ieee_mode 1
.amdhsa_fp16_overflow 0
.amdhsa_workgroup_processor_mode 1
.amdhsa_memory_ordered 1
.amdhsa_forward_progress 0
.amdhsa_shared_vgpr_count 0
.amdhsa_exception_fp_ieee_invalid_op 0
.amdhsa_exception_fp_denorm_src 0
.amdhsa_exception_fp_ieee_div_zero 0
.amdhsa_exception_fp_ieee_overflow 0
.amdhsa_exception_fp_ieee_underflow 0
.amdhsa_exception_fp_ieee_inexact 0
.amdhsa_exception_int_div_zero 0
.end_amdhsa_kernel
.text
.Lfunc_end1:
.size quick_sort, .Lfunc_end1-quick_sort
.section .AMDGPU.csdata,"",@progbits
.text
.protected tree_to_array
.globl tree_to_array
.p2align 8
.type tree_to_array,@function
tree_to_array:
s_clause 0x1
s_load_b32 s2, s[0:1], 0x5c
s_load_b32 s3, s[0:1], 0x48
s_waitcnt lgkmcnt(0)
s_and_b32 s2, s2, 0xffff
s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_2) | instid1(VALU_DEP_1)
s_mul_i32 s15, s15, s2
s_mov_b32 s2, exec_lo
v_add_nc_u32_e32 v0, s15, v0
v_cmpx_gt_i32_e64 s3, v0
s_cbranch_execz .LBB2_13
s_clause 0x1
s_load_b64 s[2:3], s[0:1], 0x30
s_load_b32 s4, s[0:1], 0x38
v_ashrrev_i32_e32 v1, 31, v0
s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
v_lshlrev_b64 v[2:3], 2, v[0:1]
s_waitcnt lgkmcnt(0)
v_add_co_u32 v4, vcc_lo, s2, v2
s_delay_alu instid0(VALU_DEP_2)
v_add_co_ci_u32_e32 v5, vcc_lo, s3, v3, vcc_lo
global_load_b32 v4, v[4:5], off
s_waitcnt vmcnt(0)
v_cmp_eq_u32_e32 vcc_lo, s4, v4
s_and_b32 exec_lo, exec_lo, vcc_lo
s_cbranch_execz .LBB2_13
s_load_b256 s[4:11], s[0:1], 0x10
s_mov_b32 s3, 0
s_mov_b32 s2, exec_lo
s_waitcnt lgkmcnt(0)
v_add_co_u32 v4, vcc_lo, s6, v2
v_add_co_ci_u32_e32 v5, vcc_lo, s7, v3, vcc_lo
v_add_co_u32 v6, vcc_lo, s8, v2
v_add_co_ci_u32_e32 v7, vcc_lo, s9, v3, vcc_lo
s_load_b64 s[6:7], s[0:1], 0x40
global_load_b32 v3, v[4:5], off
global_load_b32 v2, v[6:7], off
v_dual_mov_b32 v4, 0 :: v_dual_mov_b32 v5, 1
s_waitcnt lgkmcnt(0)
global_store_b8 v4, v5, s[6:7]
s_waitcnt vmcnt(1)
v_cmpx_ne_u32_e32 -1, v3
s_xor_b32 s2, exec_lo, s2
s_cbranch_execz .LBB2_8
v_ashrrev_i32_e32 v4, 31, v3
s_mov_b32 s3, exec_lo
s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
v_lshlrev_b64 v[3:4], 2, v[3:4]
v_add_co_u32 v5, vcc_lo, s8, v3
s_delay_alu instid0(VALU_DEP_2)
v_add_co_ci_u32_e32 v6, vcc_lo, s9, v4, vcc_lo
v_add_co_u32 v3, vcc_lo, s4, v3
v_add_co_ci_u32_e32 v4, vcc_lo, s5, v4, vcc_lo
global_load_b32 v5, v[5:6], off
global_load_b32 v3, v[3:4], off
s_waitcnt vmcnt(1)
v_cmpx_ne_u32_e64 v5, v0
s_xor_b32 s3, exec_lo, s3
s_cbranch_execz .LBB2_5
s_waitcnt vmcnt(0)
v_add_nc_u32_e32 v4, 1, v3
.LBB2_5:
s_and_not1_saveexec_b32 s3, s3
s_cbranch_execz .LBB2_7
v_lshlrev_b64 v[4:5], 2, v[0:1]
s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_2)
v_add_co_u32 v4, vcc_lo, s10, v4
v_add_co_ci_u32_e32 v5, vcc_lo, s11, v5, vcc_lo
global_load_b32 v4, v[4:5], off
s_waitcnt vmcnt(0)
v_sub_nc_u32_e32 v4, v3, v4
.LBB2_7:
s_or_b32 exec_lo, exec_lo, s3
v_cmp_ne_u32_e32 vcc_lo, -1, v2
s_and_b32 s3, vcc_lo, exec_lo
.LBB2_8:
s_and_not1_saveexec_b32 s2, s2
s_cbranch_execz .LBB2_10
s_waitcnt vmcnt(0)
v_cmp_ne_u32_e32 vcc_lo, -1, v2
v_mov_b32_e32 v4, s15
s_and_not1_b32 s3, s3, exec_lo
s_and_b32 s6, vcc_lo, exec_lo
s_delay_alu instid0(SALU_CYCLE_1)
s_or_b32 s3, s3, s6
.LBB2_10:
s_or_b32 exec_lo, exec_lo, s2
s_and_saveexec_b32 s2, s3
s_cbranch_execz .LBB2_12
s_waitcnt vmcnt(0)
v_ashrrev_i32_e32 v3, 31, v2
s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
v_lshlrev_b64 v[2:3], 2, v[2:3]
v_add_co_u32 v2, vcc_lo, s10, v2
s_delay_alu instid0(VALU_DEP_2)
v_add_co_ci_u32_e32 v3, vcc_lo, s11, v3, vcc_lo
global_load_b32 v2, v[2:3], off
s_waitcnt vmcnt(0)
v_add_nc_u32_e32 v4, v2, v4
.LBB2_12:
s_or_b32 exec_lo, exec_lo, s2
s_load_b128 s[0:3], s[0:1], 0x0
v_lshlrev_b64 v[0:1], 2, v[0:1]
s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_2)
v_ashrrev_i32_e32 v5, 31, v4
s_waitcnt vmcnt(0) lgkmcnt(0)
v_add_co_u32 v2, vcc_lo, s0, v0
s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_2) | instid1(VALU_DEP_1)
v_add_co_ci_u32_e32 v3, vcc_lo, s1, v1, vcc_lo
global_load_b32 v6, v[2:3], off
v_lshlrev_b64 v[2:3], 2, v[4:5]
v_add_co_u32 v2, vcc_lo, s2, v2
s_delay_alu instid0(VALU_DEP_2)
v_add_co_ci_u32_e32 v3, vcc_lo, s3, v3, vcc_lo
v_add_co_u32 v0, vcc_lo, s4, v0
v_add_co_ci_u32_e32 v1, vcc_lo, s5, v1, vcc_lo
s_waitcnt vmcnt(0)
global_store_b32 v[2:3], v6, off
global_store_b32 v[0:1], v4, off
.LBB2_13:
s_nop 0
s_sendmsg sendmsg(MSG_DEALLOC_VGPRS)
s_endpgm
.section .rodata,"a",@progbits
.p2align 6, 0x0
.amdhsa_kernel tree_to_array
.amdhsa_group_segment_fixed_size 0
.amdhsa_private_segment_fixed_size 0
.amdhsa_kernarg_size 336
.amdhsa_user_sgpr_count 15
.amdhsa_user_sgpr_dispatch_ptr 0
.amdhsa_user_sgpr_queue_ptr 0
.amdhsa_user_sgpr_kernarg_segment_ptr 1
.amdhsa_user_sgpr_dispatch_id 0
.amdhsa_user_sgpr_private_segment_size 0
.amdhsa_wavefront_size32 1
.amdhsa_uses_dynamic_stack 0
.amdhsa_enable_private_segment 0
.amdhsa_system_sgpr_workgroup_id_x 1
.amdhsa_system_sgpr_workgroup_id_y 0
.amdhsa_system_sgpr_workgroup_id_z 0
.amdhsa_system_sgpr_workgroup_info 0
.amdhsa_system_vgpr_workitem_id 0
.amdhsa_next_free_vgpr 8
.amdhsa_next_free_sgpr 16
.amdhsa_float_round_mode_32 0
.amdhsa_float_round_mode_16_64 0
.amdhsa_float_denorm_mode_32 3
.amdhsa_float_denorm_mode_16_64 3
.amdhsa_dx10_clamp 1
.amdhsa_ieee_mode 1
.amdhsa_fp16_overflow 0
.amdhsa_workgroup_processor_mode 1
.amdhsa_memory_ordered 1
.amdhsa_forward_progress 0
.amdhsa_shared_vgpr_count 0
.amdhsa_exception_fp_ieee_invalid_op 0
.amdhsa_exception_fp_denorm_src 0
.amdhsa_exception_fp_ieee_div_zero 0
.amdhsa_exception_fp_ieee_overflow 0
.amdhsa_exception_fp_ieee_underflow 0
.amdhsa_exception_fp_ieee_inexact 0
.amdhsa_exception_int_div_zero 0
.end_amdhsa_kernel
.text
.Lfunc_end2:
.size tree_to_array, .Lfunc_end2-tree_to_array
.section .AMDGPU.csdata,"",@progbits
.text
.p2alignl 7, 3214868480
.fill 96, 4, 3214868480
.type __hip_cuid_,@object
.section .bss,"aw",@nobits
.globl __hip_cuid_
__hip_cuid_:
.byte 0
.size __hip_cuid_, 1
.ident "AMD clang version 18.0.0git (https://github.com/RadeonOpenCompute/llvm-project roc-6.3.2 25012 e5bf7e55c91490b07c49d8960fa7983d864936c4)"
.section ".note.GNU-stack","",@progbits
.addrsig
.addrsig_sym __hip_cuid_
.amdgpu_metadata
---
amdhsa.kernels:
- .args:
- .address_space: global
.offset: 0
.size: 8
.value_kind: global_buffer
- .address_space: global
.offset: 8
.size: 8
.value_kind: global_buffer
- .address_space: global
.offset: 16
.size: 8
.value_kind: global_buffer
- .address_space: global
.offset: 24
.size: 8
.value_kind: global_buffer
- .address_space: global
.offset: 32
.size: 8
.value_kind: global_buffer
- .address_space: global
.offset: 40
.size: 8
.value_kind: global_buffer
- .offset: 48
.size: 4
.value_kind: by_value
- .address_space: global
.offset: 56
.size: 8
.value_kind: global_buffer
- .offset: 64
.size: 4
.value_kind: hidden_block_count_x
- .offset: 68
.size: 4
.value_kind: hidden_block_count_y
- .offset: 72
.size: 4
.value_kind: hidden_block_count_z
- .offset: 76
.size: 2
.value_kind: hidden_group_size_x
- .offset: 78
.size: 2
.value_kind: hidden_group_size_y
- .offset: 80
.size: 2
.value_kind: hidden_group_size_z
- .offset: 82
.size: 2
.value_kind: hidden_remainder_x
- .offset: 84
.size: 2
.value_kind: hidden_remainder_y
- .offset: 86
.size: 2
.value_kind: hidden_remainder_z
- .offset: 104
.size: 8
.value_kind: hidden_global_offset_x
- .offset: 112
.size: 8
.value_kind: hidden_global_offset_y
- .offset: 120
.size: 8
.value_kind: hidden_global_offset_z
- .offset: 128
.size: 2
.value_kind: hidden_grid_dims
.group_segment_fixed_size: 0
.kernarg_segment_align: 8
.kernarg_segment_size: 320
.language: OpenCL C
.language_version:
- 2
- 0
.max_flat_workgroup_size: 1024
.name: init
.private_segment_fixed_size: 0
.sgpr_count: 18
.sgpr_spill_count: 0
.symbol: init.kd
.uniform_work_group_size: 1
.uses_dynamic_stack: false
.vgpr_count: 11
.vgpr_spill_count: 0
.wavefront_size: 32
.workgroup_processor_mode: 1
- .args:
- .address_space: global
.offset: 0
.size: 8
.value_kind: global_buffer
- .address_space: global
.offset: 8
.size: 8
.value_kind: global_buffer
- .address_space: global
.offset: 16
.size: 8
.value_kind: global_buffer
- .address_space: global
.offset: 24
.size: 8
.value_kind: global_buffer
- .address_space: global
.offset: 32
.size: 8
.value_kind: global_buffer
- .address_space: global
.offset: 40
.size: 8
.value_kind: global_buffer
- .address_space: global
.offset: 48
.size: 8
.value_kind: global_buffer
- .address_space: global
.offset: 56
.size: 8
.value_kind: global_buffer
- .offset: 64
.size: 4
.value_kind: by_value
- .offset: 72
.size: 4
.value_kind: hidden_block_count_x
- .offset: 76
.size: 4
.value_kind: hidden_block_count_y
- .offset: 80
.size: 4
.value_kind: hidden_block_count_z
- .offset: 84
.size: 2
.value_kind: hidden_group_size_x
- .offset: 86
.size: 2
.value_kind: hidden_group_size_y
- .offset: 88
.size: 2
.value_kind: hidden_group_size_z
- .offset: 90
.size: 2
.value_kind: hidden_remainder_x
- .offset: 92
.size: 2
.value_kind: hidden_remainder_y
- .offset: 94
.size: 2
.value_kind: hidden_remainder_z
- .offset: 112
.size: 8
.value_kind: hidden_global_offset_x
- .offset: 120
.size: 8
.value_kind: hidden_global_offset_y
- .offset: 128
.size: 8
.value_kind: hidden_global_offset_z
- .offset: 136
.size: 2
.value_kind: hidden_grid_dims
.group_segment_fixed_size: 0
.kernarg_segment_align: 8
.kernarg_segment_size: 328
.language: OpenCL C
.language_version:
- 2
- 0
.max_flat_workgroup_size: 1024
.name: quick_sort
.private_segment_fixed_size: 0
.sgpr_count: 18
.sgpr_spill_count: 0
.symbol: quick_sort.kd
.uniform_work_group_size: 1
.uses_dynamic_stack: false
.vgpr_count: 12
.vgpr_spill_count: 0
.wavefront_size: 32
.workgroup_processor_mode: 1
- .args:
- .address_space: global
.offset: 0
.size: 8
.value_kind: global_buffer
- .address_space: global
.offset: 8
.size: 8
.value_kind: global_buffer
- .address_space: global
.offset: 16
.size: 8
.value_kind: global_buffer
- .address_space: global
.offset: 24
.size: 8
.value_kind: global_buffer
- .address_space: global
.offset: 32
.size: 8
.value_kind: global_buffer
- .address_space: global
.offset: 40
.size: 8
.value_kind: global_buffer
- .address_space: global
.offset: 48
.size: 8
.value_kind: global_buffer
- .offset: 56
.size: 4
.value_kind: by_value
- .address_space: global
.offset: 64
.size: 8
.value_kind: global_buffer
- .offset: 72
.size: 4
.value_kind: by_value
- .offset: 80
.size: 4
.value_kind: hidden_block_count_x
- .offset: 84
.size: 4
.value_kind: hidden_block_count_y
- .offset: 88
.size: 4
.value_kind: hidden_block_count_z
- .offset: 92
.size: 2
.value_kind: hidden_group_size_x
- .offset: 94
.size: 2
.value_kind: hidden_group_size_y
- .offset: 96
.size: 2
.value_kind: hidden_group_size_z
- .offset: 98
.size: 2
.value_kind: hidden_remainder_x
- .offset: 100
.size: 2
.value_kind: hidden_remainder_y
- .offset: 102
.size: 2
.value_kind: hidden_remainder_z
- .offset: 120
.size: 8
.value_kind: hidden_global_offset_x
- .offset: 128
.size: 8
.value_kind: hidden_global_offset_y
- .offset: 136
.size: 8
.value_kind: hidden_global_offset_z
- .offset: 144
.size: 2
.value_kind: hidden_grid_dims
.group_segment_fixed_size: 0
.kernarg_segment_align: 8
.kernarg_segment_size: 336
.language: OpenCL C
.language_version:
- 2
- 0
.max_flat_workgroup_size: 1024
.name: tree_to_array
.private_segment_fixed_size: 0
.sgpr_count: 18
.sgpr_spill_count: 0
.symbol: tree_to_array.kd
.uniform_work_group_size: 1
.uses_dynamic_stack: false
.vgpr_count: 8
.vgpr_spill_count: 0
.wavefront_size: 32
.workgroup_processor_mode: 1
amdhsa.target: amdgcn-amd-amdhsa--gfx1100
amdhsa.version:
- 1
- 2
...
.end_amdgpu_metadata |
You are a helpful coding assistant specialized in converting HIP source code to AMD host assembly. | #include <hip/hip_runtime.h>
#include <cstdio>
extern "C" {
__device__
static int THREADS_IN_BLOCK = 1024;
//index - size of left tree
__global__
void init(int* parent, int* right, int* left, int* tree_size, int* height, bool* computed, int size, int* roots) {
int thid = blockIdx.x * blockDim.x + threadIdx.x;
if (thid >= size) {
return;
}
// root = blockIdx.x * blockDim.x + root;
// if (root >= size) {
// root = blockIdx.x * blockDim.x;
// }
// __syncthreads();
atomicExch(roots + blockIdx.x, thid);
__syncthreads();
int root = roots[blockIdx.x];
if (thid == root) {
computed[thid] = true;
parent[thid] = -1;
height[thid] = 0;
}
else {
computed[thid] = false;
parent[thid] = root;
}
tree_size[thid] = 1;
left[thid] = right[thid] = -1;
}
__global__
void quick_sort(int* to_sort, int* parent, int* left, int* right, int* tree_size, int* height, bool* computed, bool* sth_changed, int size) {
int thid = blockIdx.x * blockDim.x + threadIdx.x;
if (thid >= size || computed[thid]) {
return;
}
*sth_changed = true;
//I assume that I have parrent
int parent_id = parent[thid];
int my_value = to_sort[thid];
int parent_value = to_sort[parent_id];
bool is_left = false;
if ( my_value < parent_value
|| ( my_value == parent_value && thid < parent_id)) {
is_left = true;
}
// __syncthreads();
if (is_left) atomicExch(left + parent_id, thid);
__syncthreads();
if (is_left) {
int left_parent = left[parent_id];
if (thid == left_parent) {
// printf("%d\n", left_parent);
computed[thid] = true;
height[thid] = height[parent_id] + 1;
}
else {
parent[thid] = left_parent;
atomicAdd(tree_size + left_parent, 1);
}
return;
}
// __syncthreads();
atomicExch(right + parent_id, thid);
__syncthreads();
int right_parent = right[parent_id];
if (thid == right_parent) {
// printf("%d\n", right_parent);
computed[thid] = true;
height[thid] = height[parent_id] + 1;
}
else {
parent[thid] = right_parent;
atomicAdd(tree_size + right_parent, 1);
}
}
__global__
void tree_to_array(int* tree, int* array, int* indexes, int* parent, int* left, int* tree_size, int* height, int h, bool* sth_changed, int size) {
int thid = blockIdx.x * blockDim.x + threadIdx.x;
if (thid >= size || height[thid] != h) {
return;
}
*sth_changed = true;
int index_in_array = blockIdx.x * blockDim.x;
int left_child = left[thid];
int parent_id = parent[thid];
//I am root
if (parent_id == -1) {
if (left_child != -1) {
index_in_array += tree_size[left_child];
}
array[index_in_array] = tree[thid];
indexes[thid] = index_in_array;
return;
}
int left_parents_child = left[parent_id];
bool is_left = (left_parents_child == thid);
if (is_left) {
index_in_array = indexes[parent_id] - tree_size[thid];
}
else {
index_in_array = indexes[parent_id] + 1;
}
if (left_child != -1) {
index_in_array += tree_size[left_child];
}
array[index_in_array] = tree[thid];
indexes[thid] = index_in_array;
}
} | .text
.file "quick_sort.hip"
.globl __device_stub__init # -- Begin function __device_stub__init
.p2align 4, 0x90
.type __device_stub__init,@function
__device_stub__init: # @__device_stub__init
.cfi_startproc
# %bb.0:
subq $168, %rsp
.cfi_def_cfa_offset 176
movq %rdi, 88(%rsp)
movq %rsi, 80(%rsp)
movq %rdx, 72(%rsp)
movq %rcx, 64(%rsp)
movq %r8, 56(%rsp)
movq %r9, 48(%rsp)
leaq 88(%rsp), %rax
movq %rax, 96(%rsp)
leaq 80(%rsp), %rax
movq %rax, 104(%rsp)
leaq 72(%rsp), %rax
movq %rax, 112(%rsp)
leaq 64(%rsp), %rax
movq %rax, 120(%rsp)
leaq 56(%rsp), %rax
movq %rax, 128(%rsp)
leaq 48(%rsp), %rax
movq %rax, 136(%rsp)
leaq 176(%rsp), %rax
movq %rax, 144(%rsp)
leaq 184(%rsp), %rax
movq %rax, 152(%rsp)
leaq 32(%rsp), %rdi
leaq 16(%rsp), %rsi
leaq 8(%rsp), %rdx
movq %rsp, %rcx
callq __hipPopCallConfiguration
movq 32(%rsp), %rsi
movl 40(%rsp), %edx
movq 16(%rsp), %rcx
movl 24(%rsp), %r8d
leaq 96(%rsp), %r9
movl $init, %edi
pushq (%rsp)
.cfi_adjust_cfa_offset 8
pushq 16(%rsp)
.cfi_adjust_cfa_offset 8
callq hipLaunchKernel
addq $184, %rsp
.cfi_adjust_cfa_offset -184
retq
.Lfunc_end0:
.size __device_stub__init, .Lfunc_end0-__device_stub__init
.cfi_endproc
# -- End function
.globl __device_stub__quick_sort # -- Begin function __device_stub__quick_sort
.p2align 4, 0x90
.type __device_stub__quick_sort,@function
__device_stub__quick_sort: # @__device_stub__quick_sort
.cfi_startproc
# %bb.0:
subq $168, %rsp
.cfi_def_cfa_offset 176
movq %rdi, 88(%rsp)
movq %rsi, 80(%rsp)
movq %rdx, 72(%rsp)
movq %rcx, 64(%rsp)
movq %r8, 56(%rsp)
movq %r9, 48(%rsp)
leaq 88(%rsp), %rax
movq %rax, 96(%rsp)
leaq 80(%rsp), %rax
movq %rax, 104(%rsp)
leaq 72(%rsp), %rax
movq %rax, 112(%rsp)
leaq 64(%rsp), %rax
movq %rax, 120(%rsp)
leaq 56(%rsp), %rax
movq %rax, 128(%rsp)
leaq 48(%rsp), %rax
movq %rax, 136(%rsp)
leaq 176(%rsp), %rax
movq %rax, 144(%rsp)
leaq 184(%rsp), %rax
movq %rax, 152(%rsp)
leaq 192(%rsp), %rax
movq %rax, 160(%rsp)
leaq 32(%rsp), %rdi
leaq 16(%rsp), %rsi
leaq 8(%rsp), %rdx
movq %rsp, %rcx
callq __hipPopCallConfiguration
movq 32(%rsp), %rsi
movl 40(%rsp), %edx
movq 16(%rsp), %rcx
movl 24(%rsp), %r8d
leaq 96(%rsp), %r9
movl $quick_sort, %edi
pushq (%rsp)
.cfi_adjust_cfa_offset 8
pushq 16(%rsp)
.cfi_adjust_cfa_offset 8
callq hipLaunchKernel
addq $184, %rsp
.cfi_adjust_cfa_offset -184
retq
.Lfunc_end1:
.size __device_stub__quick_sort, .Lfunc_end1-__device_stub__quick_sort
.cfi_endproc
# -- End function
.globl __device_stub__tree_to_array # -- Begin function __device_stub__tree_to_array
.p2align 4, 0x90
.type __device_stub__tree_to_array,@function
__device_stub__tree_to_array: # @__device_stub__tree_to_array
.cfi_startproc
# %bb.0:
subq $184, %rsp
.cfi_def_cfa_offset 192
movq %rdi, 88(%rsp)
movq %rsi, 80(%rsp)
movq %rdx, 72(%rsp)
movq %rcx, 64(%rsp)
movq %r8, 56(%rsp)
movq %r9, 48(%rsp)
leaq 88(%rsp), %rax
movq %rax, 96(%rsp)
leaq 80(%rsp), %rax
movq %rax, 104(%rsp)
leaq 72(%rsp), %rax
movq %rax, 112(%rsp)
leaq 64(%rsp), %rax
movq %rax, 120(%rsp)
leaq 56(%rsp), %rax
movq %rax, 128(%rsp)
leaq 48(%rsp), %rax
movq %rax, 136(%rsp)
leaq 192(%rsp), %rax
movq %rax, 144(%rsp)
leaq 200(%rsp), %rax
movq %rax, 152(%rsp)
leaq 208(%rsp), %rax
movq %rax, 160(%rsp)
leaq 216(%rsp), %rax
movq %rax, 168(%rsp)
leaq 32(%rsp), %rdi
leaq 16(%rsp), %rsi
leaq 8(%rsp), %rdx
movq %rsp, %rcx
callq __hipPopCallConfiguration
movq 32(%rsp), %rsi
movl 40(%rsp), %edx
movq 16(%rsp), %rcx
movl 24(%rsp), %r8d
leaq 96(%rsp), %r9
movl $tree_to_array, %edi
pushq (%rsp)
.cfi_adjust_cfa_offset 8
pushq 16(%rsp)
.cfi_adjust_cfa_offset 8
callq hipLaunchKernel
addq $200, %rsp
.cfi_adjust_cfa_offset -200
retq
.Lfunc_end2:
.size __device_stub__tree_to_array, .Lfunc_end2-__device_stub__tree_to_array
.cfi_endproc
# -- End function
.p2align 4, 0x90 # -- Begin function __hip_module_ctor
.type __hip_module_ctor,@function
__hip_module_ctor: # @__hip_module_ctor
.cfi_startproc
# %bb.0:
pushq %rbx
.cfi_def_cfa_offset 16
subq $32, %rsp
.cfi_def_cfa_offset 48
.cfi_offset %rbx, -16
cmpq $0, __hip_gpubin_handle(%rip)
jne .LBB3_2
# %bb.1:
movl $__hip_fatbin_wrapper, %edi
callq __hipRegisterFatBinary
movq %rax, __hip_gpubin_handle(%rip)
.LBB3_2:
movq __hip_gpubin_handle(%rip), %rbx
xorps %xmm0, %xmm0
movups %xmm0, 16(%rsp)
movups %xmm0, (%rsp)
movl $init, %esi
movl $.L__unnamed_1, %edx
movl $.L__unnamed_1, %ecx
movq %rbx, %rdi
movl $-1, %r8d
xorl %r9d, %r9d
callq __hipRegisterFunction
xorps %xmm0, %xmm0
movups %xmm0, 16(%rsp)
movups %xmm0, (%rsp)
movl $quick_sort, %esi
movl $.L__unnamed_2, %edx
movl $.L__unnamed_2, %ecx
movq %rbx, %rdi
movl $-1, %r8d
xorl %r9d, %r9d
callq __hipRegisterFunction
xorps %xmm0, %xmm0
movups %xmm0, 16(%rsp)
movups %xmm0, (%rsp)
movl $tree_to_array, %esi
movl $.L__unnamed_3, %edx
movl $.L__unnamed_3, %ecx
movq %rbx, %rdi
movl $-1, %r8d
xorl %r9d, %r9d
callq __hipRegisterFunction
movl $__hip_module_dtor, %edi
addq $32, %rsp
.cfi_def_cfa_offset 16
popq %rbx
.cfi_def_cfa_offset 8
jmp atexit # TAILCALL
.Lfunc_end3:
.size __hip_module_ctor, .Lfunc_end3-__hip_module_ctor
.cfi_endproc
# -- End function
.p2align 4, 0x90 # -- Begin function __hip_module_dtor
.type __hip_module_dtor,@function
__hip_module_dtor: # @__hip_module_dtor
.cfi_startproc
# %bb.0:
movq __hip_gpubin_handle(%rip), %rdi
testq %rdi, %rdi
je .LBB4_2
# %bb.1:
pushq %rax
.cfi_def_cfa_offset 16
callq __hipUnregisterFatBinary
movq $0, __hip_gpubin_handle(%rip)
addq $8, %rsp
.cfi_def_cfa_offset 8
.LBB4_2:
retq
.Lfunc_end4:
.size __hip_module_dtor, .Lfunc_end4-__hip_module_dtor
.cfi_endproc
# -- End function
.type init,@object # @init
.section .rodata,"a",@progbits
.globl init
.p2align 3, 0x0
init:
.quad __device_stub__init
.size init, 8
.type quick_sort,@object # @quick_sort
.globl quick_sort
.p2align 3, 0x0
quick_sort:
.quad __device_stub__quick_sort
.size quick_sort, 8
.type tree_to_array,@object # @tree_to_array
.globl tree_to_array
.p2align 3, 0x0
tree_to_array:
.quad __device_stub__tree_to_array
.size tree_to_array, 8
.type .L__unnamed_1,@object # @0
.section .rodata.str1.1,"aMS",@progbits,1
.L__unnamed_1:
.asciz "init"
.size .L__unnamed_1, 5
.type .L__unnamed_2,@object # @1
.L__unnamed_2:
.asciz "quick_sort"
.size .L__unnamed_2, 11
.type .L__unnamed_3,@object # @2
.L__unnamed_3:
.asciz "tree_to_array"
.size .L__unnamed_3, 14
.type __hip_fatbin_wrapper,@object # @__hip_fatbin_wrapper
.section .hipFatBinSegment,"a",@progbits
.p2align 3, 0x0
__hip_fatbin_wrapper:
.long 1212764230 # 0x48495046
.long 1 # 0x1
.quad __hip_fatbin
.quad 0
.size __hip_fatbin_wrapper, 24
.type __hip_gpubin_handle,@object # @__hip_gpubin_handle
.local __hip_gpubin_handle
.comm __hip_gpubin_handle,8,8
.section .init_array,"aw",@init_array
.p2align 3, 0x0
.quad __hip_module_ctor
.type __hip_cuid_,@object # @__hip_cuid_
.bss
.globl __hip_cuid_
__hip_cuid_:
.byte 0 # 0x0
.size __hip_cuid_, 1
.section ".linker-options","e",@llvm_linker_options
.ident "AMD clang version 18.0.0git (https://github.com/RadeonOpenCompute/llvm-project roc-6.3.2 25012 e5bf7e55c91490b07c49d8960fa7983d864936c4)"
.section ".note.GNU-stack","",@progbits
.addrsig
.addrsig_sym __device_stub__init
.addrsig_sym __device_stub__quick_sort
.addrsig_sym __device_stub__tree_to_array
.addrsig_sym __hip_module_ctor
.addrsig_sym __hip_module_dtor
.addrsig_sym init
.addrsig_sym quick_sort
.addrsig_sym tree_to_array
.addrsig_sym __hip_fatbin
.addrsig_sym __hip_fatbin_wrapper
.addrsig_sym __hip_cuid_ |
You are a helpful coding assistant specialized in converting from CUDA host assembly to AMD host assembly. | .file "tmpxft_001a92c4_00000000-6_quick_sort.cudafe1.cpp"
.text
#APP
#NO_APP
.type _ZL26__cudaUnregisterBinaryUtilv, @function
_ZL26__cudaUnregisterBinaryUtilv:
.LFB2059:
.cfi_startproc
endbr64
subq $8, %rsp
.cfi_def_cfa_offset 16
movq _ZL20__cudaFatCubinHandle(%rip), %rdi
call __cudaUnregisterFatBinary@PLT
addq $8, %rsp
.cfi_def_cfa_offset 8
ret
.cfi_endproc
.LFE2059:
.size _ZL26__cudaUnregisterBinaryUtilv, .-_ZL26__cudaUnregisterBinaryUtilv
.globl _Z36__device_stub__Z4initPiS_S_S_S_PbiS_PiS_S_S_S_PbiS_
.type _Z36__device_stub__Z4initPiS_S_S_S_PbiS_PiS_S_S_S_PbiS_, @function
_Z36__device_stub__Z4initPiS_S_S_S_PbiS_PiS_S_S_S_PbiS_:
.LFB2081:
.cfi_startproc
endbr64
subq $216, %rsp
.cfi_def_cfa_offset 224
movq %rdi, 56(%rsp)
movq %rsi, 48(%rsp)
movq %rdx, 40(%rsp)
movq %rcx, 32(%rsp)
movq %r8, 24(%rsp)
movq %r9, 16(%rsp)
movq 232(%rsp), %rax
movq %rax, 8(%rsp)
movq %fs:40, %rax
movq %rax, 200(%rsp)
xorl %eax, %eax
leaq 56(%rsp), %rax
movq %rax, 128(%rsp)
leaq 48(%rsp), %rax
movq %rax, 136(%rsp)
leaq 40(%rsp), %rax
movq %rax, 144(%rsp)
leaq 32(%rsp), %rax
movq %rax, 152(%rsp)
leaq 24(%rsp), %rax
movq %rax, 160(%rsp)
leaq 16(%rsp), %rax
movq %rax, 168(%rsp)
leaq 224(%rsp), %rax
movq %rax, 176(%rsp)
leaq 8(%rsp), %rax
movq %rax, 184(%rsp)
movl $1, 80(%rsp)
movl $1, 84(%rsp)
movl $1, 88(%rsp)
movl $1, 92(%rsp)
movl $1, 96(%rsp)
movl $1, 100(%rsp)
leaq 72(%rsp), %rcx
leaq 64(%rsp), %rdx
leaq 92(%rsp), %rsi
leaq 80(%rsp), %rdi
call __cudaPopCallConfiguration@PLT
testl %eax, %eax
je .L7
.L3:
movq 200(%rsp), %rax
subq %fs:40, %rax
jne .L8
addq $216, %rsp
.cfi_remember_state
.cfi_def_cfa_offset 8
ret
.L7:
.cfi_restore_state
pushq 72(%rsp)
.cfi_def_cfa_offset 232
pushq 72(%rsp)
.cfi_def_cfa_offset 240
leaq 144(%rsp), %r9
movq 108(%rsp), %rcx
movl 116(%rsp), %r8d
movq 96(%rsp), %rsi
movl 104(%rsp), %edx
leaq init(%rip), %rdi
call cudaLaunchKernel@PLT
addq $16, %rsp
.cfi_def_cfa_offset 224
jmp .L3
.L8:
call __stack_chk_fail@PLT
.cfi_endproc
.LFE2081:
.size _Z36__device_stub__Z4initPiS_S_S_S_PbiS_PiS_S_S_S_PbiS_, .-_Z36__device_stub__Z4initPiS_S_S_S_PbiS_PiS_S_S_S_PbiS_
.globl init
.type init, @function
init:
.LFB2082:
.cfi_startproc
endbr64
subq $8, %rsp
.cfi_def_cfa_offset 16
pushq 24(%rsp)
.cfi_def_cfa_offset 24
movl 24(%rsp), %eax
pushq %rax
.cfi_def_cfa_offset 32
call _Z36__device_stub__Z4initPiS_S_S_S_PbiS_PiS_S_S_S_PbiS_
addq $24, %rsp
.cfi_def_cfa_offset 8
ret
.cfi_endproc
.LFE2082:
.size init, .-init
.globl _Z46__device_stub__Z10quick_sortPiS_S_S_S_S_PbS0_iPiS_S_S_S_S_PbS0_i
.type _Z46__device_stub__Z10quick_sortPiS_S_S_S_S_PbS0_iPiS_S_S_S_S_PbS0_i, @function
_Z46__device_stub__Z10quick_sortPiS_S_S_S_S_PbS0_iPiS_S_S_S_S_PbS0_i:
.LFB2083:
.cfi_startproc
endbr64
subq $216, %rsp
.cfi_def_cfa_offset 224
movq %rdi, 56(%rsp)
movq %rsi, 48(%rsp)
movq %rdx, 40(%rsp)
movq %rcx, 32(%rsp)
movq %r8, 24(%rsp)
movq %r9, 16(%rsp)
movq 224(%rsp), %rax
movq %rax, 8(%rsp)
movq 232(%rsp), %rax
movq %rax, (%rsp)
movq %fs:40, %rax
movq %rax, 200(%rsp)
xorl %eax, %eax
leaq 56(%rsp), %rax
movq %rax, 128(%rsp)
leaq 48(%rsp), %rax
movq %rax, 136(%rsp)
leaq 40(%rsp), %rax
movq %rax, 144(%rsp)
leaq 32(%rsp), %rax
movq %rax, 152(%rsp)
leaq 24(%rsp), %rax
movq %rax, 160(%rsp)
leaq 16(%rsp), %rax
movq %rax, 168(%rsp)
leaq 8(%rsp), %rax
movq %rax, 176(%rsp)
movq %rsp, %rax
movq %rax, 184(%rsp)
leaq 240(%rsp), %rax
movq %rax, 192(%rsp)
movl $1, 80(%rsp)
movl $1, 84(%rsp)
movl $1, 88(%rsp)
movl $1, 92(%rsp)
movl $1, 96(%rsp)
movl $1, 100(%rsp)
leaq 72(%rsp), %rcx
leaq 64(%rsp), %rdx
leaq 92(%rsp), %rsi
leaq 80(%rsp), %rdi
call __cudaPopCallConfiguration@PLT
testl %eax, %eax
je .L15
.L11:
movq 200(%rsp), %rax
subq %fs:40, %rax
jne .L16
addq $216, %rsp
.cfi_remember_state
.cfi_def_cfa_offset 8
ret
.L15:
.cfi_restore_state
pushq 72(%rsp)
.cfi_def_cfa_offset 232
pushq 72(%rsp)
.cfi_def_cfa_offset 240
leaq 144(%rsp), %r9
movq 108(%rsp), %rcx
movl 116(%rsp), %r8d
movq 96(%rsp), %rsi
movl 104(%rsp), %edx
leaq quick_sort(%rip), %rdi
call cudaLaunchKernel@PLT
addq $16, %rsp
.cfi_def_cfa_offset 224
jmp .L11
.L16:
call __stack_chk_fail@PLT
.cfi_endproc
.LFE2083:
.size _Z46__device_stub__Z10quick_sortPiS_S_S_S_S_PbS0_iPiS_S_S_S_S_PbS0_i, .-_Z46__device_stub__Z10quick_sortPiS_S_S_S_S_PbS0_iPiS_S_S_S_S_PbS0_i
.globl quick_sort
.type quick_sort, @function
quick_sort:
.LFB2084:
.cfi_startproc
endbr64
subq $16, %rsp
.cfi_def_cfa_offset 24
movl 40(%rsp), %eax
pushq %rax
.cfi_def_cfa_offset 32
pushq 40(%rsp)
.cfi_def_cfa_offset 40
pushq 40(%rsp)
.cfi_def_cfa_offset 48
call _Z46__device_stub__Z10quick_sortPiS_S_S_S_S_PbS0_iPiS_S_S_S_S_PbS0_i
addq $40, %rsp
.cfi_def_cfa_offset 8
ret
.cfi_endproc
.LFE2084:
.size quick_sort, .-quick_sort
.globl _Z49__device_stub__Z13tree_to_arrayPiS_S_S_S_S_S_iPbiPiS_S_S_S_S_S_iPbi
.type _Z49__device_stub__Z13tree_to_arrayPiS_S_S_S_S_S_iPbiPiS_S_S_S_S_S_iPbi, @function
_Z49__device_stub__Z13tree_to_arrayPiS_S_S_S_S_S_iPbiPiS_S_S_S_S_S_iPbi:
.LFB2085:
.cfi_startproc
endbr64
subq $232, %rsp
.cfi_def_cfa_offset 240
movq %rdi, 56(%rsp)
movq %rsi, 48(%rsp)
movq %rdx, 40(%rsp)
movq %rcx, 32(%rsp)
movq %r8, 24(%rsp)
movq %r9, 16(%rsp)
movq 240(%rsp), %rax
movq %rax, 8(%rsp)
movq 256(%rsp), %rax
movq %rax, (%rsp)
movq %fs:40, %rax
movq %rax, 216(%rsp)
xorl %eax, %eax
leaq 56(%rsp), %rax
movq %rax, 128(%rsp)
leaq 48(%rsp), %rax
movq %rax, 136(%rsp)
leaq 40(%rsp), %rax
movq %rax, 144(%rsp)
leaq 32(%rsp), %rax
movq %rax, 152(%rsp)
leaq 24(%rsp), %rax
movq %rax, 160(%rsp)
leaq 16(%rsp), %rax
movq %rax, 168(%rsp)
leaq 8(%rsp), %rax
movq %rax, 176(%rsp)
leaq 248(%rsp), %rax
movq %rax, 184(%rsp)
movq %rsp, %rax
movq %rax, 192(%rsp)
leaq 264(%rsp), %rax
movq %rax, 200(%rsp)
movl $1, 80(%rsp)
movl $1, 84(%rsp)
movl $1, 88(%rsp)
movl $1, 92(%rsp)
movl $1, 96(%rsp)
movl $1, 100(%rsp)
leaq 72(%rsp), %rcx
leaq 64(%rsp), %rdx
leaq 92(%rsp), %rsi
leaq 80(%rsp), %rdi
call __cudaPopCallConfiguration@PLT
testl %eax, %eax
je .L23
.L19:
movq 216(%rsp), %rax
subq %fs:40, %rax
jne .L24
addq $232, %rsp
.cfi_remember_state
.cfi_def_cfa_offset 8
ret
.L23:
.cfi_restore_state
pushq 72(%rsp)
.cfi_def_cfa_offset 248
pushq 72(%rsp)
.cfi_def_cfa_offset 256
leaq 144(%rsp), %r9
movq 108(%rsp), %rcx
movl 116(%rsp), %r8d
movq 96(%rsp), %rsi
movl 104(%rsp), %edx
leaq tree_to_array(%rip), %rdi
call cudaLaunchKernel@PLT
addq $16, %rsp
.cfi_def_cfa_offset 240
jmp .L19
.L24:
call __stack_chk_fail@PLT
.cfi_endproc
.LFE2085:
.size _Z49__device_stub__Z13tree_to_arrayPiS_S_S_S_S_S_iPbiPiS_S_S_S_S_S_iPbi, .-_Z49__device_stub__Z13tree_to_arrayPiS_S_S_S_S_S_iPbiPiS_S_S_S_S_S_iPbi
.globl tree_to_array
.type tree_to_array, @function
tree_to_array:
.LFB2086:
.cfi_startproc
endbr64
subq $8, %rsp
.cfi_def_cfa_offset 16
movl 40(%rsp), %eax
pushq %rax
.cfi_def_cfa_offset 24
pushq 40(%rsp)
.cfi_def_cfa_offset 32
movl 40(%rsp), %eax
pushq %rax
.cfi_def_cfa_offset 40
pushq 40(%rsp)
.cfi_def_cfa_offset 48
call _Z49__device_stub__Z13tree_to_arrayPiS_S_S_S_S_S_iPbiPiS_S_S_S_S_S_iPbi
addq $40, %rsp
.cfi_def_cfa_offset 8
ret
.cfi_endproc
.LFE2086:
.size tree_to_array, .-tree_to_array
.section .rodata.str1.1,"aMS",@progbits,1
.LC0:
.string "tree_to_array"
.LC1:
.string "quick_sort"
.LC2:
.string "init"
.LC3:
.string "THREADS_IN_BLOCK"
.text
.type _ZL24__sti____cudaRegisterAllv, @function
_ZL24__sti____cudaRegisterAllv:
.LFB2088:
.cfi_startproc
endbr64
pushq %rbx
.cfi_def_cfa_offset 16
.cfi_offset 3, -16
leaq _ZL15__fatDeviceText(%rip), %rdi
call __cudaRegisterFatBinary@PLT
movq %rax, %rbx
movq %rax, _ZL20__cudaFatCubinHandle(%rip)
pushq $0
.cfi_def_cfa_offset 24
pushq $0
.cfi_def_cfa_offset 32
pushq $0
.cfi_def_cfa_offset 40
pushq $0
.cfi_def_cfa_offset 48
movl $0, %r9d
movl $-1, %r8d
leaq .LC0(%rip), %rdx
movq %rdx, %rcx
leaq tree_to_array(%rip), %rsi
movq %rax, %rdi
call __cudaRegisterFunction@PLT
addq $32, %rsp
.cfi_def_cfa_offset 16
pushq $0
.cfi_def_cfa_offset 24
pushq $0
.cfi_def_cfa_offset 32
pushq $0
.cfi_def_cfa_offset 40
pushq $0
.cfi_def_cfa_offset 48
movl $0, %r9d
movl $-1, %r8d
leaq .LC1(%rip), %rdx
movq %rdx, %rcx
leaq quick_sort(%rip), %rsi
movq %rbx, %rdi
call __cudaRegisterFunction@PLT
addq $32, %rsp
.cfi_def_cfa_offset 16
pushq $0
.cfi_def_cfa_offset 24
pushq $0
.cfi_def_cfa_offset 32
pushq $0
.cfi_def_cfa_offset 40
pushq $0
.cfi_def_cfa_offset 48
movl $0, %r9d
movl $-1, %r8d
leaq .LC2(%rip), %rdx
movq %rdx, %rcx
leaq init(%rip), %rsi
movq %rbx, %rdi
call __cudaRegisterFunction@PLT
addq $32, %rsp
.cfi_def_cfa_offset 16
pushq $0
.cfi_def_cfa_offset 24
pushq $0
.cfi_def_cfa_offset 32
movl $4, %r9d
movl $0, %r8d
leaq .LC3(%rip), %rdx
movq %rdx, %rcx
leaq _ZL16THREADS_IN_BLOCK(%rip), %rsi
movq %rbx, %rdi
call __cudaRegisterVar@PLT
addq $16, %rsp
.cfi_def_cfa_offset 16
movq _ZL20__cudaFatCubinHandle(%rip), %rdi
call __cudaRegisterFatBinaryEnd@PLT
leaq _ZL26__cudaUnregisterBinaryUtilv(%rip), %rdi
call atexit@PLT
popq %rbx
.cfi_def_cfa_offset 8
ret
.cfi_endproc
.LFE2088:
.size _ZL24__sti____cudaRegisterAllv, .-_ZL24__sti____cudaRegisterAllv
.section .init_array,"aw"
.align 8
.quad _ZL24__sti____cudaRegisterAllv
.section .nvFatBinSegment,"aw"
.align 8
.type _ZL15__fatDeviceText, @object
.size _ZL15__fatDeviceText, 24
_ZL15__fatDeviceText:
.long 1180844977
.long 1
.quad fatbinData
.quad 0
.local _ZL20__cudaFatCubinHandle
.comm _ZL20__cudaFatCubinHandle,8,8
.local _ZL16THREADS_IN_BLOCK
.comm _ZL16THREADS_IN_BLOCK,4,4
.ident "GCC: (Ubuntu 13.3.0-6ubuntu2~24.04) 13.3.0"
.section .note.GNU-stack,"",@progbits
.section .note.gnu.property,"a"
.align 8
.long 1f - 0f
.long 4f - 1f
.long 5
0:
.string "GNU"
1:
.align 8
.long 0xc0000002
.long 3f - 2f
2:
.long 0x3
3:
.align 8
4: | .text
.file "quick_sort.hip"
.globl __device_stub__init # -- Begin function __device_stub__init
.p2align 4, 0x90
.type __device_stub__init,@function
__device_stub__init: # @__device_stub__init
.cfi_startproc
# %bb.0:
subq $168, %rsp
.cfi_def_cfa_offset 176
movq %rdi, 88(%rsp)
movq %rsi, 80(%rsp)
movq %rdx, 72(%rsp)
movq %rcx, 64(%rsp)
movq %r8, 56(%rsp)
movq %r9, 48(%rsp)
leaq 88(%rsp), %rax
movq %rax, 96(%rsp)
leaq 80(%rsp), %rax
movq %rax, 104(%rsp)
leaq 72(%rsp), %rax
movq %rax, 112(%rsp)
leaq 64(%rsp), %rax
movq %rax, 120(%rsp)
leaq 56(%rsp), %rax
movq %rax, 128(%rsp)
leaq 48(%rsp), %rax
movq %rax, 136(%rsp)
leaq 176(%rsp), %rax
movq %rax, 144(%rsp)
leaq 184(%rsp), %rax
movq %rax, 152(%rsp)
leaq 32(%rsp), %rdi
leaq 16(%rsp), %rsi
leaq 8(%rsp), %rdx
movq %rsp, %rcx
callq __hipPopCallConfiguration
movq 32(%rsp), %rsi
movl 40(%rsp), %edx
movq 16(%rsp), %rcx
movl 24(%rsp), %r8d
leaq 96(%rsp), %r9
movl $init, %edi
pushq (%rsp)
.cfi_adjust_cfa_offset 8
pushq 16(%rsp)
.cfi_adjust_cfa_offset 8
callq hipLaunchKernel
addq $184, %rsp
.cfi_adjust_cfa_offset -184
retq
.Lfunc_end0:
.size __device_stub__init, .Lfunc_end0-__device_stub__init
.cfi_endproc
# -- End function
.globl __device_stub__quick_sort # -- Begin function __device_stub__quick_sort
.p2align 4, 0x90
.type __device_stub__quick_sort,@function
__device_stub__quick_sort: # @__device_stub__quick_sort
.cfi_startproc
# %bb.0:
subq $168, %rsp
.cfi_def_cfa_offset 176
movq %rdi, 88(%rsp)
movq %rsi, 80(%rsp)
movq %rdx, 72(%rsp)
movq %rcx, 64(%rsp)
movq %r8, 56(%rsp)
movq %r9, 48(%rsp)
leaq 88(%rsp), %rax
movq %rax, 96(%rsp)
leaq 80(%rsp), %rax
movq %rax, 104(%rsp)
leaq 72(%rsp), %rax
movq %rax, 112(%rsp)
leaq 64(%rsp), %rax
movq %rax, 120(%rsp)
leaq 56(%rsp), %rax
movq %rax, 128(%rsp)
leaq 48(%rsp), %rax
movq %rax, 136(%rsp)
leaq 176(%rsp), %rax
movq %rax, 144(%rsp)
leaq 184(%rsp), %rax
movq %rax, 152(%rsp)
leaq 192(%rsp), %rax
movq %rax, 160(%rsp)
leaq 32(%rsp), %rdi
leaq 16(%rsp), %rsi
leaq 8(%rsp), %rdx
movq %rsp, %rcx
callq __hipPopCallConfiguration
movq 32(%rsp), %rsi
movl 40(%rsp), %edx
movq 16(%rsp), %rcx
movl 24(%rsp), %r8d
leaq 96(%rsp), %r9
movl $quick_sort, %edi
pushq (%rsp)
.cfi_adjust_cfa_offset 8
pushq 16(%rsp)
.cfi_adjust_cfa_offset 8
callq hipLaunchKernel
addq $184, %rsp
.cfi_adjust_cfa_offset -184
retq
.Lfunc_end1:
.size __device_stub__quick_sort, .Lfunc_end1-__device_stub__quick_sort
.cfi_endproc
# -- End function
.globl __device_stub__tree_to_array # -- Begin function __device_stub__tree_to_array
.p2align 4, 0x90
.type __device_stub__tree_to_array,@function
__device_stub__tree_to_array: # @__device_stub__tree_to_array
.cfi_startproc
# %bb.0:
subq $184, %rsp
.cfi_def_cfa_offset 192
movq %rdi, 88(%rsp)
movq %rsi, 80(%rsp)
movq %rdx, 72(%rsp)
movq %rcx, 64(%rsp)
movq %r8, 56(%rsp)
movq %r9, 48(%rsp)
leaq 88(%rsp), %rax
movq %rax, 96(%rsp)
leaq 80(%rsp), %rax
movq %rax, 104(%rsp)
leaq 72(%rsp), %rax
movq %rax, 112(%rsp)
leaq 64(%rsp), %rax
movq %rax, 120(%rsp)
leaq 56(%rsp), %rax
movq %rax, 128(%rsp)
leaq 48(%rsp), %rax
movq %rax, 136(%rsp)
leaq 192(%rsp), %rax
movq %rax, 144(%rsp)
leaq 200(%rsp), %rax
movq %rax, 152(%rsp)
leaq 208(%rsp), %rax
movq %rax, 160(%rsp)
leaq 216(%rsp), %rax
movq %rax, 168(%rsp)
leaq 32(%rsp), %rdi
leaq 16(%rsp), %rsi
leaq 8(%rsp), %rdx
movq %rsp, %rcx
callq __hipPopCallConfiguration
movq 32(%rsp), %rsi
movl 40(%rsp), %edx
movq 16(%rsp), %rcx
movl 24(%rsp), %r8d
leaq 96(%rsp), %r9
movl $tree_to_array, %edi
pushq (%rsp)
.cfi_adjust_cfa_offset 8
pushq 16(%rsp)
.cfi_adjust_cfa_offset 8
callq hipLaunchKernel
addq $200, %rsp
.cfi_adjust_cfa_offset -200
retq
.Lfunc_end2:
.size __device_stub__tree_to_array, .Lfunc_end2-__device_stub__tree_to_array
.cfi_endproc
# -- End function
.p2align 4, 0x90 # -- Begin function __hip_module_ctor
.type __hip_module_ctor,@function
__hip_module_ctor: # @__hip_module_ctor
.cfi_startproc
# %bb.0:
pushq %rbx
.cfi_def_cfa_offset 16
subq $32, %rsp
.cfi_def_cfa_offset 48
.cfi_offset %rbx, -16
cmpq $0, __hip_gpubin_handle(%rip)
jne .LBB3_2
# %bb.1:
movl $__hip_fatbin_wrapper, %edi
callq __hipRegisterFatBinary
movq %rax, __hip_gpubin_handle(%rip)
.LBB3_2:
movq __hip_gpubin_handle(%rip), %rbx
xorps %xmm0, %xmm0
movups %xmm0, 16(%rsp)
movups %xmm0, (%rsp)
movl $init, %esi
movl $.L__unnamed_1, %edx
movl $.L__unnamed_1, %ecx
movq %rbx, %rdi
movl $-1, %r8d
xorl %r9d, %r9d
callq __hipRegisterFunction
xorps %xmm0, %xmm0
movups %xmm0, 16(%rsp)
movups %xmm0, (%rsp)
movl $quick_sort, %esi
movl $.L__unnamed_2, %edx
movl $.L__unnamed_2, %ecx
movq %rbx, %rdi
movl $-1, %r8d
xorl %r9d, %r9d
callq __hipRegisterFunction
xorps %xmm0, %xmm0
movups %xmm0, 16(%rsp)
movups %xmm0, (%rsp)
movl $tree_to_array, %esi
movl $.L__unnamed_3, %edx
movl $.L__unnamed_3, %ecx
movq %rbx, %rdi
movl $-1, %r8d
xorl %r9d, %r9d
callq __hipRegisterFunction
movl $__hip_module_dtor, %edi
addq $32, %rsp
.cfi_def_cfa_offset 16
popq %rbx
.cfi_def_cfa_offset 8
jmp atexit # TAILCALL
.Lfunc_end3:
.size __hip_module_ctor, .Lfunc_end3-__hip_module_ctor
.cfi_endproc
# -- End function
.p2align 4, 0x90 # -- Begin function __hip_module_dtor
.type __hip_module_dtor,@function
__hip_module_dtor: # @__hip_module_dtor
.cfi_startproc
# %bb.0:
movq __hip_gpubin_handle(%rip), %rdi
testq %rdi, %rdi
je .LBB4_2
# %bb.1:
pushq %rax
.cfi_def_cfa_offset 16
callq __hipUnregisterFatBinary
movq $0, __hip_gpubin_handle(%rip)
addq $8, %rsp
.cfi_def_cfa_offset 8
.LBB4_2:
retq
.Lfunc_end4:
.size __hip_module_dtor, .Lfunc_end4-__hip_module_dtor
.cfi_endproc
# -- End function
.type init,@object # @init
.section .rodata,"a",@progbits
.globl init
.p2align 3, 0x0
init:
.quad __device_stub__init
.size init, 8
.type quick_sort,@object # @quick_sort
.globl quick_sort
.p2align 3, 0x0
quick_sort:
.quad __device_stub__quick_sort
.size quick_sort, 8
.type tree_to_array,@object # @tree_to_array
.globl tree_to_array
.p2align 3, 0x0
tree_to_array:
.quad __device_stub__tree_to_array
.size tree_to_array, 8
.type .L__unnamed_1,@object # @0
.section .rodata.str1.1,"aMS",@progbits,1
.L__unnamed_1:
.asciz "init"
.size .L__unnamed_1, 5
.type .L__unnamed_2,@object # @1
.L__unnamed_2:
.asciz "quick_sort"
.size .L__unnamed_2, 11
.type .L__unnamed_3,@object # @2
.L__unnamed_3:
.asciz "tree_to_array"
.size .L__unnamed_3, 14
.type __hip_fatbin_wrapper,@object # @__hip_fatbin_wrapper
.section .hipFatBinSegment,"a",@progbits
.p2align 3, 0x0
__hip_fatbin_wrapper:
.long 1212764230 # 0x48495046
.long 1 # 0x1
.quad __hip_fatbin
.quad 0
.size __hip_fatbin_wrapper, 24
.type __hip_gpubin_handle,@object # @__hip_gpubin_handle
.local __hip_gpubin_handle
.comm __hip_gpubin_handle,8,8
.section .init_array,"aw",@init_array
.p2align 3, 0x0
.quad __hip_module_ctor
.type __hip_cuid_,@object # @__hip_cuid_
.bss
.globl __hip_cuid_
__hip_cuid_:
.byte 0 # 0x0
.size __hip_cuid_, 1
.section ".linker-options","e",@llvm_linker_options
.ident "AMD clang version 18.0.0git (https://github.com/RadeonOpenCompute/llvm-project roc-6.3.2 25012 e5bf7e55c91490b07c49d8960fa7983d864936c4)"
.section ".note.GNU-stack","",@progbits
.addrsig
.addrsig_sym __device_stub__init
.addrsig_sym __device_stub__quick_sort
.addrsig_sym __device_stub__tree_to_array
.addrsig_sym __hip_module_ctor
.addrsig_sym __hip_module_dtor
.addrsig_sym init
.addrsig_sym quick_sort
.addrsig_sym tree_to_array
.addrsig_sym __hip_fatbin
.addrsig_sym __hip_fatbin_wrapper
.addrsig_sym __hip_cuid_ |
You are a helpful coding assistant specialized in converting CUDA source code to CUDA device assembly. | #include <cuda_runtime.h>
#include <device_launch_parameters.h>
#include <stdio.h>
#include <time.h>
#include<sys/time.h>
//#difine LINUX_IMP
#define CHECK(call) \
{ \
const cudaError_t error = call; \
if(error != cudaSuccess) \
{\
printf("Error: %s:%d,", __FILE__,__LINE__);\
printf("code:%d,reason:%s\n",error,cudaGetErrorString(error));\
exit(1);\
}\
}
//don't forget the time
double cpuSecond() {
struct timeval tp;
gettimeofday(&tp,NULL);
return ((double)tp.tv_sec + (double)tp.tv_usec*1.e-6);
}
void checkResult(float *hostRef, float *gpuRef,const int N){
double epsilon=1.0E-8;
bool match = 1;
for(int idx = 0; idx < N; idx++){
if(abs(hostRef[idx]-gpuRef[idx]) > epsilon){
match = 0;
printf("Arrays do not match!\n");
printf("host %5.6f gpu %5.6f at current %d\n",hostRef[idx],gpuRef[idx],idx);
break;
}
}
if(match)printf("Arrays match .\n\n");
}
//generate different seed for random number
void initiaData(float *ip,int size){
time_t t;
srand((unsigned)time(&t));
try{
for(int i = 0; i < size; i++){
ip[i] = (float)(rand() & 0xFF)/10.0f;
//ip[i] = float(0.001*i);
//ip[i] = float(0.01);
}
}catch(...){
printf("I don't know why!");
}
}
void sumMatrixOnHost(float *A,float *B, float *C, const int nx, const int ny){
for(int idy = 0; idy < ny; idy++)
for(int idx = 0; idx < nx; idx++){
C[idx+idy*nx] = A[idx+idy*nx] + B[idx+idy*nx];
}
}
__global__ void sumMatrixOnGPU2D(float *A, float *B, float *C, int NX, int NY) {
unsigned int ix = blockIdx.x * blockDim.x + threadIdx.x;
unsigned int iy = blockIdx.y * blockDim.y + threadIdx.y;
unsigned int idx = iy * NX + ix;
if (ix < NX && iy < NY) {
C[idx] = A[idx] + B[idx];
}
}
/*****
//kernel function
__global__ void sumArrayOnGPU(float *A,float *B, float *C){
int idx = threadIdx.x + blockIdx.x * blockDim.x;
int idy = threadIdx.y + blockIdx.x * blockDim.y;
//printf("%d+%d*%d*%d = %d\n",idx,idy,blockDim.x,gridDim.x,idx+idy*blockDim.x*gridDim.x);
C[idx + idy * blockDim.x * gridDim.x] = A[idx + idy * blockDim.x * gridDim.x] + B[idx + idy * blockDim.x * gridDim.x];
//printf("%f\n",C[idx+idy*blockDim.x*gridDim.x]);
}
*****/
void printDeviceProp(const cudaDeviceProp &prop)
{
printf("Device Name : %s.\n", prop.name);
printf("totalGlobalMem : %ld.\n", prop.totalGlobalMem);
printf("sharedMemPerBlock : %ld.\n", prop.sharedMemPerBlock);
printf("regsPerBlock : %d.\n", prop.regsPerBlock);
printf("warpSize : %d.\n", prop.warpSize);
printf("memPitch : %ld.\n", prop.memPitch);
printf("maxThreadsPerBlock : %d.\n", prop.maxThreadsPerBlock);
printf("maxThreadsDim[0 - 2] : %d %d %d.\n", prop.maxThreadsDim[0], prop.maxThreadsDim[1], prop.maxThreadsDim[2]);
printf("maxGridSize[0 - 2] : %d %d %d.\n", prop.maxGridSize[0], prop.maxGridSize[1], prop.maxGridSize[2]);
printf("totalConstMem : %ld.\n", prop.totalConstMem);
printf("major.minor : %d.%d.\n", prop.major, prop.minor);
printf("clockRate : %d.\n", prop.clockRate);
printf("textureAlignment : %ld.\n", prop.textureAlignment);
printf("deviceOverlap : %d.\n", prop.deviceOverlap);
printf("multiProcessorCount : %d.\n", prop.multiProcessorCount);
printf("\n\n\n");
}
int main(int argc, char **argv){
printf("%s Starting...\n",argv[0]);
double istart,iElaps;
//get the cuda device count
int count;
cudaGetDeviceCount(&count);
if(count == 0){
fprintf(stderr, "There is no device.\n");
exit(1);
}
//find the device >= 1.x
int idxDevice = 0;
for(int idxDevice = 0; idxDevice < count; ++idxDevice){
cudaDeviceProp prop;
if(cudaGetDeviceProperties(&prop,idxDevice) == cudaSuccess)
if(prop.major >= 1){
printDeviceProp(prop);
break;
}
}
if(idxDevice == count){
fprintf(stderr,"there is no device supporting CUDA 1.x. \n");
}
CHECK(cudaSetDevice(idxDevice))
//set up data size of Matrix
int nx = 1<< 12;
int ny = 1<< 12;
int nxy = nx*ny;
size_t nBytes = nxy * sizeof(float);
printf("Matrix size: %d\n", nxy);
printf("Matrix volume: %zu\n",nBytes);
//malloc host memory
float *h_A,*h_B,*hostRef,*gpuRef;
istart = cpuSecond();
h_A = (float *)malloc(nBytes);
h_B = (float *)malloc(nBytes);
hostRef = (float *)malloc(nBytes);
gpuRef = (float *)malloc(nBytes);
iElaps = cpuSecond() -istart;
printf("malloc host memory:%lfs\n",iElaps);
//initialize data at host side
istart = cpuSecond();
initiaData(h_A, nxy);
initiaData(h_B, nxy);
iElaps = cpuSecond() - istart;
memset(hostRef,0,nBytes);
memset(gpuRef,0,nBytes);
printf("initiaData spent time:%lfs\n",iElaps);
//add Matrix at host side for result checks
istart = cpuSecond();
sumMatrixOnHost(h_A,h_B, hostRef, nx, ny);
iElaps = cpuSecond() - istart;
printf("sumArrayOnHost spent time:%lfs\n",iElaps);
//malloc device global memory
float *d_A, *d_B, *d_C;
cudaMalloc((float **) &d_A,nBytes);
cudaMalloc((float **) &d_B,nBytes);
cudaMalloc((float **) &d_C,nBytes);
//transfer data from host to device
cudaMemcpy(d_A, h_A,nBytes,cudaMemcpyHostToDevice);
cudaMemcpy(d_B, h_B,nBytes,cudaMemcpyHostToDevice);
//invoke kenel at host side
int dimx = 32;
int dimy = 1;
dim3 block(dimx,dimy);
dim3 grid((nx+block.x-1)/block.x, (ny+block.y-1)/block.y);
//dim3 grid(512,512);
istart = cpuSecond();
sumMatrixOnGPU2D<<<grid, block>>>(d_A,d_B,d_C,nx,ny);
cudaDeviceSynchronize();
iElaps = cpuSecond() - istart;
printf("sumMatrixOnGPU2D <<<(%d,%d), (%d,%d)>>> elapsed %lf sec\n", grid.x,grid.y, block.x, block.y, iElaps);
//copy kenel result back to host side
cudaMemcpy(gpuRef, d_C,nBytes,cudaMemcpyDeviceToHost);
//for(int i = ;i<nxy;i++){printf("%f",gpuRef[i])}
//check device results
checkResult(hostRef, gpuRef,nxy);
//free device global memory
cudaFree(d_A);
cudaFree(d_B);
cudaFree(d_C);
//free host memory
free(h_A);
free(h_B);
free(hostRef);
free(gpuRef);
//reset device
cudaDeviceReset();
return 0;
} | code for sm_80
Function : _Z16sumMatrixOnGPU2DPfS_S_ii
.headerflags @"EF_CUDA_TEXMODE_UNIFIED EF_CUDA_64BIT_ADDRESS EF_CUDA_SM80 EF_CUDA_VIRTUAL_SM(EF_CUDA_SM80)"
/*0000*/ MOV R1, c[0x0][0x28] ; /* 0x00000a0000017a02 */
/* 0x000fe40000000f00 */
/*0010*/ S2R R3, SR_CTAID.Y ; /* 0x0000000000037919 */
/* 0x000e280000002600 */
/*0020*/ S2R R2, SR_TID.Y ; /* 0x0000000000027919 */
/* 0x000e280000002200 */
/*0030*/ S2R R0, SR_CTAID.X ; /* 0x0000000000007919 */
/* 0x000e680000002500 */
/*0040*/ S2R R5, SR_TID.X ; /* 0x0000000000057919 */
/* 0x000e620000002100 */
/*0050*/ IMAD R3, R3, c[0x0][0x4], R2 ; /* 0x0000010003037a24 */
/* 0x001fca00078e0202 */
/*0060*/ ISETP.GE.U32.AND P0, PT, R3, c[0x0][0x17c], PT ; /* 0x00005f0003007a0c */
/* 0x000fe20003f06070 */
/*0070*/ IMAD R0, R0, c[0x0][0x0], R5 ; /* 0x0000000000007a24 */
/* 0x002fca00078e0205 */
/*0080*/ ISETP.GE.U32.OR P0, PT, R0, c[0x0][0x178], P0 ; /* 0x00005e0000007a0c */
/* 0x000fda0000706470 */
/*0090*/ @P0 EXIT ; /* 0x000000000000094d */
/* 0x000fea0003800000 */
/*00a0*/ HFMA2.MMA R7, -RZ, RZ, 0, 2.384185791015625e-07 ; /* 0x00000004ff077435 */
/* 0x000fe200000001ff */
/*00b0*/ IMAD R0, R3, c[0x0][0x178], R0 ; /* 0x00005e0003007a24 */
/* 0x000fe200078e0200 */
/*00c0*/ ULDC.64 UR4, c[0x0][0x118] ; /* 0x0000460000047ab9 */
/* 0x000fd00000000a00 */
/*00d0*/ IMAD.WIDE.U32 R4, R0, R7, c[0x0][0x168] ; /* 0x00005a0000047625 */
/* 0x000fc800078e0007 */
/*00e0*/ IMAD.WIDE.U32 R2, R0.reuse, R7.reuse, c[0x0][0x160] ; /* 0x0000580000027625 */
/* 0x0c0fe400078e0007 */
/*00f0*/ LDG.E R4, [R4.64] ; /* 0x0000000404047981 */
/* 0x000ea8000c1e1900 */
/*0100*/ LDG.E R3, [R2.64] ; /* 0x0000000402037981 */
/* 0x000ea2000c1e1900 */
/*0110*/ IMAD.WIDE.U32 R6, R0, R7, c[0x0][0x170] ; /* 0x00005c0000067625 */
/* 0x000fc800078e0007 */
/*0120*/ FADD R9, R4, R3 ; /* 0x0000000304097221 */
/* 0x004fca0000000000 */
/*0130*/ STG.E [R6.64], R9 ; /* 0x0000000906007986 */
/* 0x000fe2000c101904 */
/*0140*/ EXIT ; /* 0x000000000000794d */
/* 0x000fea0003800000 */
/*0150*/ BRA 0x150; /* 0xfffffff000007947 */
/* 0x000fc0000383ffff */
/*0160*/ NOP; /* 0x0000000000007918 */
/* 0x000fc00000000000 */
/*0170*/ NOP; /* 0x0000000000007918 */
/* 0x000fc00000000000 */
/*0180*/ NOP; /* 0x0000000000007918 */
/* 0x000fc00000000000 */
/*0190*/ NOP; /* 0x0000000000007918 */
/* 0x000fc00000000000 */
/*01a0*/ NOP; /* 0x0000000000007918 */
/* 0x000fc00000000000 */
/*01b0*/ NOP; /* 0x0000000000007918 */
/* 0x000fc00000000000 */
/*01c0*/ NOP; /* 0x0000000000007918 */
/* 0x000fc00000000000 */
/*01d0*/ NOP; /* 0x0000000000007918 */
/* 0x000fc00000000000 */
/*01e0*/ NOP; /* 0x0000000000007918 */
/* 0x000fc00000000000 */
/*01f0*/ NOP; /* 0x0000000000007918 */
/* 0x000fc00000000000 */
.......... |
You are a helpful coding assistant specialized in converting CUDA source code to CUDA host assembly. | #include <cuda_runtime.h>
#include <device_launch_parameters.h>
#include <stdio.h>
#include <time.h>
#include<sys/time.h>
//#difine LINUX_IMP
#define CHECK(call) \
{ \
const cudaError_t error = call; \
if(error != cudaSuccess) \
{\
printf("Error: %s:%d,", __FILE__,__LINE__);\
printf("code:%d,reason:%s\n",error,cudaGetErrorString(error));\
exit(1);\
}\
}
//don't forget the time
double cpuSecond() {
struct timeval tp;
gettimeofday(&tp,NULL);
return ((double)tp.tv_sec + (double)tp.tv_usec*1.e-6);
}
void checkResult(float *hostRef, float *gpuRef,const int N){
double epsilon=1.0E-8;
bool match = 1;
for(int idx = 0; idx < N; idx++){
if(abs(hostRef[idx]-gpuRef[idx]) > epsilon){
match = 0;
printf("Arrays do not match!\n");
printf("host %5.6f gpu %5.6f at current %d\n",hostRef[idx],gpuRef[idx],idx);
break;
}
}
if(match)printf("Arrays match .\n\n");
}
//generate different seed for random number
void initiaData(float *ip,int size){
time_t t;
srand((unsigned)time(&t));
try{
for(int i = 0; i < size; i++){
ip[i] = (float)(rand() & 0xFF)/10.0f;
//ip[i] = float(0.001*i);
//ip[i] = float(0.01);
}
}catch(...){
printf("I don't know why!");
}
}
void sumMatrixOnHost(float *A,float *B, float *C, const int nx, const int ny){
for(int idy = 0; idy < ny; idy++)
for(int idx = 0; idx < nx; idx++){
C[idx+idy*nx] = A[idx+idy*nx] + B[idx+idy*nx];
}
}
__global__ void sumMatrixOnGPU2D(float *A, float *B, float *C, int NX, int NY) {
unsigned int ix = blockIdx.x * blockDim.x + threadIdx.x;
unsigned int iy = blockIdx.y * blockDim.y + threadIdx.y;
unsigned int idx = iy * NX + ix;
if (ix < NX && iy < NY) {
C[idx] = A[idx] + B[idx];
}
}
/*****
//kernel function
__global__ void sumArrayOnGPU(float *A,float *B, float *C){
int idx = threadIdx.x + blockIdx.x * blockDim.x;
int idy = threadIdx.y + blockIdx.x * blockDim.y;
//printf("%d+%d*%d*%d = %d\n",idx,idy,blockDim.x,gridDim.x,idx+idy*blockDim.x*gridDim.x);
C[idx + idy * blockDim.x * gridDim.x] = A[idx + idy * blockDim.x * gridDim.x] + B[idx + idy * blockDim.x * gridDim.x];
//printf("%f\n",C[idx+idy*blockDim.x*gridDim.x]);
}
*****/
void printDeviceProp(const cudaDeviceProp &prop)
{
printf("Device Name : %s.\n", prop.name);
printf("totalGlobalMem : %ld.\n", prop.totalGlobalMem);
printf("sharedMemPerBlock : %ld.\n", prop.sharedMemPerBlock);
printf("regsPerBlock : %d.\n", prop.regsPerBlock);
printf("warpSize : %d.\n", prop.warpSize);
printf("memPitch : %ld.\n", prop.memPitch);
printf("maxThreadsPerBlock : %d.\n", prop.maxThreadsPerBlock);
printf("maxThreadsDim[0 - 2] : %d %d %d.\n", prop.maxThreadsDim[0], prop.maxThreadsDim[1], prop.maxThreadsDim[2]);
printf("maxGridSize[0 - 2] : %d %d %d.\n", prop.maxGridSize[0], prop.maxGridSize[1], prop.maxGridSize[2]);
printf("totalConstMem : %ld.\n", prop.totalConstMem);
printf("major.minor : %d.%d.\n", prop.major, prop.minor);
printf("clockRate : %d.\n", prop.clockRate);
printf("textureAlignment : %ld.\n", prop.textureAlignment);
printf("deviceOverlap : %d.\n", prop.deviceOverlap);
printf("multiProcessorCount : %d.\n", prop.multiProcessorCount);
printf("\n\n\n");
}
int main(int argc, char **argv){
printf("%s Starting...\n",argv[0]);
double istart,iElaps;
//get the cuda device count
int count;
cudaGetDeviceCount(&count);
if(count == 0){
fprintf(stderr, "There is no device.\n");
exit(1);
}
//find the device >= 1.x
int idxDevice = 0;
for(int idxDevice = 0; idxDevice < count; ++idxDevice){
cudaDeviceProp prop;
if(cudaGetDeviceProperties(&prop,idxDevice) == cudaSuccess)
if(prop.major >= 1){
printDeviceProp(prop);
break;
}
}
if(idxDevice == count){
fprintf(stderr,"there is no device supporting CUDA 1.x. \n");
}
CHECK(cudaSetDevice(idxDevice))
//set up data size of Matrix
int nx = 1<< 12;
int ny = 1<< 12;
int nxy = nx*ny;
size_t nBytes = nxy * sizeof(float);
printf("Matrix size: %d\n", nxy);
printf("Matrix volume: %zu\n",nBytes);
//malloc host memory
float *h_A,*h_B,*hostRef,*gpuRef;
istart = cpuSecond();
h_A = (float *)malloc(nBytes);
h_B = (float *)malloc(nBytes);
hostRef = (float *)malloc(nBytes);
gpuRef = (float *)malloc(nBytes);
iElaps = cpuSecond() -istart;
printf("malloc host memory:%lfs\n",iElaps);
//initialize data at host side
istart = cpuSecond();
initiaData(h_A, nxy);
initiaData(h_B, nxy);
iElaps = cpuSecond() - istart;
memset(hostRef,0,nBytes);
memset(gpuRef,0,nBytes);
printf("initiaData spent time:%lfs\n",iElaps);
//add Matrix at host side for result checks
istart = cpuSecond();
sumMatrixOnHost(h_A,h_B, hostRef, nx, ny);
iElaps = cpuSecond() - istart;
printf("sumArrayOnHost spent time:%lfs\n",iElaps);
//malloc device global memory
float *d_A, *d_B, *d_C;
cudaMalloc((float **) &d_A,nBytes);
cudaMalloc((float **) &d_B,nBytes);
cudaMalloc((float **) &d_C,nBytes);
//transfer data from host to device
cudaMemcpy(d_A, h_A,nBytes,cudaMemcpyHostToDevice);
cudaMemcpy(d_B, h_B,nBytes,cudaMemcpyHostToDevice);
//invoke kenel at host side
int dimx = 32;
int dimy = 1;
dim3 block(dimx,dimy);
dim3 grid((nx+block.x-1)/block.x, (ny+block.y-1)/block.y);
//dim3 grid(512,512);
istart = cpuSecond();
sumMatrixOnGPU2D<<<grid, block>>>(d_A,d_B,d_C,nx,ny);
cudaDeviceSynchronize();
iElaps = cpuSecond() - istart;
printf("sumMatrixOnGPU2D <<<(%d,%d), (%d,%d)>>> elapsed %lf sec\n", grid.x,grid.y, block.x, block.y, iElaps);
//copy kenel result back to host side
cudaMemcpy(gpuRef, d_C,nBytes,cudaMemcpyDeviceToHost);
//for(int i = ;i<nxy;i++){printf("%f",gpuRef[i])}
//check device results
checkResult(hostRef, gpuRef,nxy);
//free device global memory
cudaFree(d_A);
cudaFree(d_B);
cudaFree(d_C);
//free host memory
free(h_A);
free(h_B);
free(hostRef);
free(gpuRef);
//reset device
cudaDeviceReset();
return 0;
} | .file "tmpxft_0007e960_00000000-6_llab1.cudafe1.cpp"
.text
#APP
#NO_APP
.type _ZL26__cudaUnregisterBinaryUtilv, @function
_ZL26__cudaUnregisterBinaryUtilv:
.LFB2065:
.cfi_startproc
endbr64
subq $8, %rsp
.cfi_def_cfa_offset 16
movq _ZL20__cudaFatCubinHandle(%rip), %rdi
call __cudaUnregisterFatBinary@PLT
addq $8, %rsp
.cfi_def_cfa_offset 8
ret
.cfi_endproc
.LFE2065:
.size _ZL26__cudaUnregisterBinaryUtilv, .-_ZL26__cudaUnregisterBinaryUtilv
.globl _Z9cpuSecondv
.type _Z9cpuSecondv, @function
_Z9cpuSecondv:
.LFB2057:
.cfi_startproc
endbr64
subq $40, %rsp
.cfi_def_cfa_offset 48
movq %fs:40, %rax
movq %rax, 24(%rsp)
xorl %eax, %eax
movq %rsp, %rdi
movl $0, %esi
call gettimeofday@PLT
pxor %xmm0, %xmm0
cvtsi2sdq 8(%rsp), %xmm0
mulsd .LC0(%rip), %xmm0
pxor %xmm1, %xmm1
cvtsi2sdq (%rsp), %xmm1
addsd %xmm1, %xmm0
movq 24(%rsp), %rax
subq %fs:40, %rax
jne .L6
addq $40, %rsp
.cfi_remember_state
.cfi_def_cfa_offset 8
ret
.L6:
.cfi_restore_state
call __stack_chk_fail@PLT
.cfi_endproc
.LFE2057:
.size _Z9cpuSecondv, .-_Z9cpuSecondv
.section .rodata.str1.1,"aMS",@progbits,1
.LC3:
.string "Arrays do not match!\n"
.section .rodata.str1.8,"aMS",@progbits,1
.align 8
.LC4:
.string "host %5.6f gpu %5.6f at current %d\n"
.section .rodata.str1.1
.LC5:
.string "Arrays match .\n\n"
.text
.globl _Z11checkResultPfS_i
.type _Z11checkResultPfS_i, @function
_Z11checkResultPfS_i:
.LFB2058:
.cfi_startproc
endbr64
pushq %r12
.cfi_def_cfa_offset 16
.cfi_offset 12, -16
pushq %rbp
.cfi_def_cfa_offset 24
.cfi_offset 6, -24
pushq %rbx
.cfi_def_cfa_offset 32
.cfi_offset 3, -32
testl %edx, %edx
jle .L8
movq %rdi, %rbp
movq %rsi, %rbx
movl $0, %r12d
movss .LC1(%rip), %xmm2
movsd .LC2(%rip), %xmm1
.L12:
movss 0(%rbp), %xmm0
subss (%rbx), %xmm0
andps %xmm2, %xmm0
cvtss2sd %xmm0, %xmm0
comisd %xmm1, %xmm0
ja .L17
addl $1, %r12d
addq $4, %rbp
addq $4, %rbx
cmpl %r12d, %edx
jne .L12
.L8:
leaq .LC5(%rip), %rsi
movl $2, %edi
movl $0, %eax
call __printf_chk@PLT
.L7:
popq %rbx
.cfi_remember_state
.cfi_def_cfa_offset 24
popq %rbp
.cfi_def_cfa_offset 16
popq %r12
.cfi_def_cfa_offset 8
ret
.L17:
.cfi_restore_state
leaq .LC3(%rip), %rsi
movl $2, %edi
movl $0, %eax
call __printf_chk@PLT
pxor %xmm0, %xmm0
cvtss2sd 0(%rbp), %xmm0
movl %r12d, %edx
pxor %xmm1, %xmm1
cvtss2sd (%rbx), %xmm1
leaq .LC4(%rip), %rsi
movl $2, %edi
movl $2, %eax
call __printf_chk@PLT
jmp .L7
.cfi_endproc
.LFE2058:
.size _Z11checkResultPfS_i, .-_Z11checkResultPfS_i
.globl _Z10initiaDataPfi
.type _Z10initiaDataPfi, @function
_Z10initiaDataPfi:
.LFB2059:
.cfi_startproc
endbr64
pushq %r12
.cfi_def_cfa_offset 16
.cfi_offset 12, -16
pushq %rbp
.cfi_def_cfa_offset 24
.cfi_offset 6, -24
pushq %rbx
.cfi_def_cfa_offset 32
.cfi_offset 3, -32
subq $16, %rsp
.cfi_def_cfa_offset 48
movq %rdi, %r12
movl %esi, %ebp
movq %fs:40, %rax
movq %rax, 8(%rsp)
xorl %eax, %eax
movq %rsp, %rdi
call time@PLT
movl %eax, %edi
call srand@PLT
testl %ebp, %ebp
jle .L18
movq %r12, %rbx
movslq %ebp, %rbp
leaq (%r12,%rbp,4), %rbp
.L20:
call rand@PLT
movzbl %al, %eax
pxor %xmm0, %xmm0
cvtsi2ssl %eax, %xmm0
divss .LC6(%rip), %xmm0
movss %xmm0, (%rbx)
addq $4, %rbx
cmpq %rbp, %rbx
jne .L20
.L18:
movq 8(%rsp), %rax
subq %fs:40, %rax
jne .L24
addq $16, %rsp
.cfi_remember_state
.cfi_def_cfa_offset 32
popq %rbx
.cfi_def_cfa_offset 24
popq %rbp
.cfi_def_cfa_offset 16
popq %r12
.cfi_def_cfa_offset 8
ret
.L24:
.cfi_restore_state
call __stack_chk_fail@PLT
.cfi_endproc
.LFE2059:
.size _Z10initiaDataPfi, .-_Z10initiaDataPfi
.globl _Z15sumMatrixOnHostPfS_S_ii
.type _Z15sumMatrixOnHostPfS_S_ii, @function
_Z15sumMatrixOnHostPfS_S_ii:
.LFB2060:
.cfi_startproc
endbr64
testl %r8d, %r8d
jle .L33
pushq %rbx
.cfi_def_cfa_offset 16
.cfi_offset 3, -16
movq %rdx, %r9
movl $0, %r11d
movl $0, %r10d
movslq %ecx, %rbx
jmp .L27
.L29:
movslq %r11d, %rdx
leaq 0(,%rdx,4), %rax
addq %rbx, %rdx
salq $2, %rdx
.L28:
movss (%rdi,%rax), %xmm0
addss (%rsi,%rax), %xmm0
movss %xmm0, (%r9,%rax)
addq $4, %rax
cmpq %rdx, %rax
jne .L28
.L30:
addl $1, %r10d
addl %ecx, %r11d
cmpl %r10d, %r8d
je .L25
.L27:
testl %ecx, %ecx
jg .L29
jmp .L30
.L25:
popq %rbx
.cfi_def_cfa_offset 8
ret
.L33:
.cfi_restore 3
ret
.cfi_endproc
.LFE2060:
.size _Z15sumMatrixOnHostPfS_S_ii, .-_Z15sumMatrixOnHostPfS_S_ii
.section .rodata.str1.1
.LC7:
.string "Device Name : %s.\n"
.LC8:
.string "totalGlobalMem : %ld.\n"
.LC9:
.string "sharedMemPerBlock : %ld.\n"
.LC10:
.string "regsPerBlock : %d.\n"
.LC11:
.string "warpSize : %d.\n"
.LC12:
.string "memPitch : %ld.\n"
.LC13:
.string "maxThreadsPerBlock : %d.\n"
.section .rodata.str1.8
.align 8
.LC14:
.string "maxThreadsDim[0 - 2] : %d %d %d.\n"
.align 8
.LC15:
.string "maxGridSize[0 - 2] : %d %d %d.\n"
.section .rodata.str1.1
.LC16:
.string "totalConstMem : %ld.\n"
.LC17:
.string "major.minor : %d.%d.\n"
.LC18:
.string "clockRate : %d.\n"
.LC19:
.string "textureAlignment : %ld.\n"
.LC20:
.string "deviceOverlap : %d.\n"
.LC21:
.string "multiProcessorCount : %d.\n"
.LC22:
.string "\n\n\n"
.text
.globl _Z15printDevicePropRK14cudaDeviceProp
.type _Z15printDevicePropRK14cudaDeviceProp, @function
_Z15printDevicePropRK14cudaDeviceProp:
.LFB2061:
.cfi_startproc
endbr64
pushq %rbx
.cfi_def_cfa_offset 16
.cfi_offset 3, -16
movq %rdi, %rbx
movq %rdi, %rdx
leaq .LC7(%rip), %rsi
movl $2, %edi
movl $0, %eax
call __printf_chk@PLT
movq 288(%rbx), %rdx
leaq .LC8(%rip), %rsi
movl $2, %edi
movl $0, %eax
call __printf_chk@PLT
movq 296(%rbx), %rdx
leaq .LC9(%rip), %rsi
movl $2, %edi
movl $0, %eax
call __printf_chk@PLT
movl 304(%rbx), %edx
leaq .LC10(%rip), %rsi
movl $2, %edi
movl $0, %eax
call __printf_chk@PLT
movl 308(%rbx), %edx
leaq .LC11(%rip), %rsi
movl $2, %edi
movl $0, %eax
call __printf_chk@PLT
movq 312(%rbx), %rdx
leaq .LC12(%rip), %rsi
movl $2, %edi
movl $0, %eax
call __printf_chk@PLT
movl 320(%rbx), %edx
leaq .LC13(%rip), %rsi
movl $2, %edi
movl $0, %eax
call __printf_chk@PLT
movl 328(%rbx), %ecx
movl 324(%rbx), %edx
movl 332(%rbx), %r8d
leaq .LC14(%rip), %rsi
movl $2, %edi
movl $0, %eax
call __printf_chk@PLT
movl 340(%rbx), %ecx
movl 336(%rbx), %edx
movl 344(%rbx), %r8d
leaq .LC15(%rip), %rsi
movl $2, %edi
movl $0, %eax
call __printf_chk@PLT
movq 352(%rbx), %rdx
leaq .LC16(%rip), %rsi
movl $2, %edi
movl $0, %eax
call __printf_chk@PLT
movl 364(%rbx), %ecx
movl 360(%rbx), %edx
leaq .LC17(%rip), %rsi
movl $2, %edi
movl $0, %eax
call __printf_chk@PLT
movl 348(%rbx), %edx
leaq .LC18(%rip), %rsi
movl $2, %edi
movl $0, %eax
call __printf_chk@PLT
movq 368(%rbx), %rdx
leaq .LC19(%rip), %rsi
movl $2, %edi
movl $0, %eax
call __printf_chk@PLT
movl 384(%rbx), %edx
leaq .LC20(%rip), %rsi
movl $2, %edi
movl $0, %eax
call __printf_chk@PLT
movl 388(%rbx), %edx
leaq .LC21(%rip), %rsi
movl $2, %edi
movl $0, %eax
call __printf_chk@PLT
leaq .LC22(%rip), %rsi
movl $2, %edi
movl $0, %eax
call __printf_chk@PLT
popq %rbx
.cfi_def_cfa_offset 8
ret
.cfi_endproc
.LFE2061:
.size _Z15printDevicePropRK14cudaDeviceProp, .-_Z15printDevicePropRK14cudaDeviceProp
.globl _Z42__device_stub__Z16sumMatrixOnGPU2DPfS_S_iiPfS_S_ii
.type _Z42__device_stub__Z16sumMatrixOnGPU2DPfS_S_iiPfS_S_ii, @function
_Z42__device_stub__Z16sumMatrixOnGPU2DPfS_S_iiPfS_S_ii:
.LFB2087:
.cfi_startproc
endbr64
subq $152, %rsp
.cfi_def_cfa_offset 160
movq %rdi, 24(%rsp)
movq %rsi, 16(%rsp)
movq %rdx, 8(%rsp)
movl %ecx, 4(%rsp)
movl %r8d, (%rsp)
movq %fs:40, %rax
movq %rax, 136(%rsp)
xorl %eax, %eax
leaq 24(%rsp), %rax
movq %rax, 96(%rsp)
leaq 16(%rsp), %rax
movq %rax, 104(%rsp)
leaq 8(%rsp), %rax
movq %rax, 112(%rsp)
leaq 4(%rsp), %rax
movq %rax, 120(%rsp)
movq %rsp, %rax
movq %rax, 128(%rsp)
movl $1, 48(%rsp)
movl $1, 52(%rsp)
movl $1, 56(%rsp)
movl $1, 60(%rsp)
movl $1, 64(%rsp)
movl $1, 68(%rsp)
leaq 40(%rsp), %rcx
leaq 32(%rsp), %rdx
leaq 60(%rsp), %rsi
leaq 48(%rsp), %rdi
call __cudaPopCallConfiguration@PLT
testl %eax, %eax
je .L42
.L38:
movq 136(%rsp), %rax
subq %fs:40, %rax
jne .L43
addq $152, %rsp
.cfi_remember_state
.cfi_def_cfa_offset 8
ret
.L42:
.cfi_restore_state
pushq 40(%rsp)
.cfi_def_cfa_offset 168
pushq 40(%rsp)
.cfi_def_cfa_offset 176
leaq 112(%rsp), %r9
movq 76(%rsp), %rcx
movl 84(%rsp), %r8d
movq 64(%rsp), %rsi
movl 72(%rsp), %edx
leaq _Z16sumMatrixOnGPU2DPfS_S_ii(%rip), %rdi
call cudaLaunchKernel@PLT
addq $16, %rsp
.cfi_def_cfa_offset 160
jmp .L38
.L43:
call __stack_chk_fail@PLT
.cfi_endproc
.LFE2087:
.size _Z42__device_stub__Z16sumMatrixOnGPU2DPfS_S_iiPfS_S_ii, .-_Z42__device_stub__Z16sumMatrixOnGPU2DPfS_S_iiPfS_S_ii
.globl _Z16sumMatrixOnGPU2DPfS_S_ii
.type _Z16sumMatrixOnGPU2DPfS_S_ii, @function
_Z16sumMatrixOnGPU2DPfS_S_ii:
.LFB2088:
.cfi_startproc
endbr64
subq $8, %rsp
.cfi_def_cfa_offset 16
call _Z42__device_stub__Z16sumMatrixOnGPU2DPfS_S_iiPfS_S_ii
addq $8, %rsp
.cfi_def_cfa_offset 8
ret
.cfi_endproc
.LFE2088:
.size _Z16sumMatrixOnGPU2DPfS_S_ii, .-_Z16sumMatrixOnGPU2DPfS_S_ii
.section .rodata.str1.1
.LC23:
.string "%s Starting...\n"
.LC24:
.string "There is no device.\n"
.section .rodata.str1.8
.align 8
.LC25:
.string "there is no device supporting CUDA 1.x. \n"
.align 8
.LC26:
.string "/home/ubuntu/Datasets/stackv2/train-structured/Sinclair-Dee/HPC-CUDA/master/Misc/llab1.cu"
.section .rodata.str1.1
.LC27:
.string "Error: %s:%d,"
.LC28:
.string "code:%d,reason:%s\n"
.LC29:
.string "Matrix size: %d\n"
.LC30:
.string "Matrix volume: %zu\n"
.LC31:
.string "malloc host memory:%lfs\n"
.LC32:
.string "initiaData spent time:%lfs\n"
.section .rodata.str1.8
.align 8
.LC33:
.string "sumArrayOnHost spent time:%lfs\n"
.align 8
.LC34:
.string "sumMatrixOnGPU2D <<<(%d,%d), (%d,%d)>>> elapsed %lf sec\n"
.text
.globl main
.type main, @function
main:
.LFB2062:
.cfi_startproc
endbr64
pushq %r13
.cfi_def_cfa_offset 16
.cfi_offset 13, -16
pushq %r12
.cfi_def_cfa_offset 24
.cfi_offset 12, -24
pushq %rbp
.cfi_def_cfa_offset 32
.cfi_offset 6, -32
pushq %rbx
.cfi_def_cfa_offset 40
.cfi_offset 3, -40
subq $1128, %rsp
.cfi_def_cfa_offset 1168
movq %fs:40, %rax
movq %rax, 1112(%rsp)
xorl %eax, %eax
movq (%rsi), %rdx
leaq .LC23(%rip), %rsi
movl $2, %edi
call __printf_chk@PLT
leaq 28(%rsp), %rdi
call cudaGetDeviceCount@PLT
movl 28(%rsp), %eax
testl %eax, %eax
je .L47
movl $0, %ebx
leaq 80(%rsp), %rbp
jg .L48
jmp .L49
.L47:
leaq .LC24(%rip), %rdx
movl $2, %esi
movq stderr(%rip), %rdi
movl $0, %eax
call __fprintf_chk@PLT
movl $1, %edi
call exit@PLT
.L50:
addl $1, %ebx
cmpl %ebx, 28(%rsp)
jle .L51
.L48:
movl %ebx, %esi
movq %rbp, %rdi
call cudaGetDeviceProperties_v2@PLT
testl %eax, %eax
jne .L50
cmpl $0, 440(%rsp)
jle .L50
leaq 80(%rsp), %rdi
call _Z15printDevicePropRK14cudaDeviceProp
.L51:
cmpl $0, 28(%rsp)
je .L59
.L49:
movl $0, %edi
call cudaSetDevice@PLT
movl %eax, %ebx
testl %eax, %eax
jne .L60
movl $16777216, %edx
leaq .LC29(%rip), %rsi
movl $2, %edi
movl $0, %eax
call __printf_chk@PLT
movl $67108864, %edx
leaq .LC30(%rip), %rsi
movl $2, %edi
movl $0, %eax
call __printf_chk@PLT
call _Z9cpuSecondv
movsd %xmm0, (%rsp)
movl $67108864, %edi
call malloc@PLT
movq %rax, %r13
movl $67108864, %edi
call malloc@PLT
movq %rax, %r12
movl $67108864, %edi
call malloc@PLT
movq %rax, %rbp
movl $67108864, %edi
call malloc@PLT
movq %rax, %rbx
call _Z9cpuSecondv
subsd (%rsp), %xmm0
leaq .LC31(%rip), %rsi
movl $2, %edi
movl $1, %eax
call __printf_chk@PLT
call _Z9cpuSecondv
movsd %xmm0, 8(%rsp)
movl $16777216, %esi
movq %r13, %rdi
call _Z10initiaDataPfi
movl $16777216, %esi
movq %r12, %rdi
call _Z10initiaDataPfi
call _Z9cpuSecondv
movsd %xmm0, (%rsp)
movl $67108864, %edx
movl $0, %esi
movq %rbp, %rdi
call memset@PLT
movl $67108864, %edx
movl $0, %esi
movq %rbx, %rdi
call memset@PLT
movsd (%rsp), %xmm1
subsd 8(%rsp), %xmm1
movapd %xmm1, %xmm0
leaq .LC32(%rip), %rsi
movl $2, %edi
movl $1, %eax
call __printf_chk@PLT
call _Z9cpuSecondv
movsd %xmm0, (%rsp)
movl $4096, %r8d
movl $4096, %ecx
movq %rbp, %rdx
movq %r12, %rsi
movq %r13, %rdi
call _Z15sumMatrixOnHostPfS_S_ii
call _Z9cpuSecondv
subsd (%rsp), %xmm0
leaq .LC33(%rip), %rsi
movl $2, %edi
movl $1, %eax
call __printf_chk@PLT
leaq 32(%rsp), %rdi
movl $67108864, %esi
call cudaMalloc@PLT
leaq 40(%rsp), %rdi
movl $67108864, %esi
call cudaMalloc@PLT
leaq 48(%rsp), %rdi
movl $67108864, %esi
call cudaMalloc@PLT
movl $1, %ecx
movl $67108864, %edx
movq %r13, %rsi
movq 32(%rsp), %rdi
call cudaMemcpy@PLT
movl $1, %ecx
movl $67108864, %edx
movq %r12, %rsi
movq 40(%rsp), %rdi
call cudaMemcpy@PLT
movl $1, 64(%rsp)
movl $1, 76(%rsp)
call _Z9cpuSecondv
movsd %xmm0, (%rsp)
movl $128, 68(%rsp)
movl $4096, 72(%rsp)
movl $32, 56(%rsp)
movl $1, 60(%rsp)
movl 64(%rsp), %ecx
movl $0, %r9d
movl $0, %r8d
movq 56(%rsp), %rdx
movq 68(%rsp), %rdi
movl 76(%rsp), %esi
call __cudaPushCallConfiguration@PLT
testl %eax, %eax
je .L61
.L53:
call cudaDeviceSynchronize@PLT
call _Z9cpuSecondv
subsd (%rsp), %xmm0
movl $1, %r9d
movl $32, %r8d
movl $4096, %ecx
movl $128, %edx
leaq .LC34(%rip), %rsi
movl $2, %edi
movl $1, %eax
call __printf_chk@PLT
movl $2, %ecx
movl $67108864, %edx
movq 48(%rsp), %rsi
movq %rbx, %rdi
call cudaMemcpy@PLT
movl $16777216, %edx
movq %rbx, %rsi
movq %rbp, %rdi
call _Z11checkResultPfS_i
movq 32(%rsp), %rdi
call cudaFree@PLT
movq 40(%rsp), %rdi
call cudaFree@PLT
movq 48(%rsp), %rdi
call cudaFree@PLT
movq %r13, %rdi
call free@PLT
movq %r12, %rdi
call free@PLT
movq %rbp, %rdi
call free@PLT
movq %rbx, %rdi
call free@PLT
call cudaDeviceReset@PLT
movq 1112(%rsp), %rax
subq %fs:40, %rax
jne .L62
movl $0, %eax
addq $1128, %rsp
.cfi_remember_state
.cfi_def_cfa_offset 40
popq %rbx
.cfi_def_cfa_offset 32
popq %rbp
.cfi_def_cfa_offset 24
popq %r12
.cfi_def_cfa_offset 16
popq %r13
.cfi_def_cfa_offset 8
ret
.L59:
.cfi_restore_state
leaq .LC25(%rip), %rdx
movl $2, %esi
movq stderr(%rip), %rdi
movl $0, %eax
call __fprintf_chk@PLT
jmp .L49
.L60:
movl $126, %ecx
leaq .LC26(%rip), %rdx
leaq .LC27(%rip), %rsi
movl $2, %edi
movl $0, %eax
call __printf_chk@PLT
movl %ebx, %edi
call cudaGetErrorString@PLT
movq %rax, %rcx
movl %ebx, %edx
leaq .LC28(%rip), %rsi
movl $2, %edi
movl $0, %eax
call __printf_chk@PLT
movl $1, %edi
call exit@PLT
.L61:
movl $4096, %r8d
movl $4096, %ecx
movq 48(%rsp), %rdx
movq 40(%rsp), %rsi
movq 32(%rsp), %rdi
call _Z42__device_stub__Z16sumMatrixOnGPU2DPfS_S_iiPfS_S_ii
jmp .L53
.L62:
call __stack_chk_fail@PLT
.cfi_endproc
.LFE2062:
.size main, .-main
.section .rodata.str1.1
.LC35:
.string "_Z16sumMatrixOnGPU2DPfS_S_ii"
.text
.type _ZL24__sti____cudaRegisterAllv, @function
_ZL24__sti____cudaRegisterAllv:
.LFB2090:
.cfi_startproc
endbr64
subq $8, %rsp
.cfi_def_cfa_offset 16
leaq _ZL15__fatDeviceText(%rip), %rdi
call __cudaRegisterFatBinary@PLT
movq %rax, %rdi
movq %rax, _ZL20__cudaFatCubinHandle(%rip)
pushq $0
.cfi_def_cfa_offset 24
pushq $0
.cfi_def_cfa_offset 32
pushq $0
.cfi_def_cfa_offset 40
pushq $0
.cfi_def_cfa_offset 48
movl $0, %r9d
movl $-1, %r8d
leaq .LC35(%rip), %rdx
movq %rdx, %rcx
leaq _Z16sumMatrixOnGPU2DPfS_S_ii(%rip), %rsi
call __cudaRegisterFunction@PLT
addq $32, %rsp
.cfi_def_cfa_offset 16
movq _ZL20__cudaFatCubinHandle(%rip), %rdi
call __cudaRegisterFatBinaryEnd@PLT
leaq _ZL26__cudaUnregisterBinaryUtilv(%rip), %rdi
call atexit@PLT
addq $8, %rsp
.cfi_def_cfa_offset 8
ret
.cfi_endproc
.LFE2090:
.size _ZL24__sti____cudaRegisterAllv, .-_ZL24__sti____cudaRegisterAllv
.section .init_array,"aw"
.align 8
.quad _ZL24__sti____cudaRegisterAllv
.section .nvFatBinSegment,"aw"
.align 8
.type _ZL15__fatDeviceText, @object
.size _ZL15__fatDeviceText, 24
_ZL15__fatDeviceText:
.long 1180844977
.long 1
.quad fatbinData
.quad 0
.local _ZL20__cudaFatCubinHandle
.comm _ZL20__cudaFatCubinHandle,8,8
.section .rodata.cst8,"aM",@progbits,8
.align 8
.LC0:
.long -1598689907
.long 1051772663
.section .rodata.cst16,"aM",@progbits,16
.align 16
.LC1:
.long 2147483647
.long 0
.long 0
.long 0
.section .rodata.cst8
.align 8
.LC2:
.long -500134854
.long 1044740494
.section .rodata.cst4,"aM",@progbits,4
.align 4
.LC6:
.long 1092616192
.ident "GCC: (Ubuntu 13.3.0-6ubuntu2~24.04) 13.3.0"
.section .note.GNU-stack,"",@progbits
.section .note.gnu.property,"a"
.align 8
.long 1f - 0f
.long 4f - 1f
.long 5
0:
.string "GNU"
1:
.align 8
.long 0xc0000002
.long 3f - 2f
2:
.long 0x3
3:
.align 8
4: |
You are a helpful coding assistant specialized in converting CUDA source code to HIP/AMD source code. | #include <cuda_runtime.h>
#include <device_launch_parameters.h>
#include <stdio.h>
#include <time.h>
#include<sys/time.h>
//#difine LINUX_IMP
#define CHECK(call) \
{ \
const cudaError_t error = call; \
if(error != cudaSuccess) \
{\
printf("Error: %s:%d,", __FILE__,__LINE__);\
printf("code:%d,reason:%s\n",error,cudaGetErrorString(error));\
exit(1);\
}\
}
//don't forget the time
double cpuSecond() {
struct timeval tp;
gettimeofday(&tp,NULL);
return ((double)tp.tv_sec + (double)tp.tv_usec*1.e-6);
}
void checkResult(float *hostRef, float *gpuRef,const int N){
double epsilon=1.0E-8;
bool match = 1;
for(int idx = 0; idx < N; idx++){
if(abs(hostRef[idx]-gpuRef[idx]) > epsilon){
match = 0;
printf("Arrays do not match!\n");
printf("host %5.6f gpu %5.6f at current %d\n",hostRef[idx],gpuRef[idx],idx);
break;
}
}
if(match)printf("Arrays match .\n\n");
}
//generate different seed for random number
void initiaData(float *ip,int size){
time_t t;
srand((unsigned)time(&t));
try{
for(int i = 0; i < size; i++){
ip[i] = (float)(rand() & 0xFF)/10.0f;
//ip[i] = float(0.001*i);
//ip[i] = float(0.01);
}
}catch(...){
printf("I don't know why!");
}
}
void sumMatrixOnHost(float *A,float *B, float *C, const int nx, const int ny){
for(int idy = 0; idy < ny; idy++)
for(int idx = 0; idx < nx; idx++){
C[idx+idy*nx] = A[idx+idy*nx] + B[idx+idy*nx];
}
}
__global__ void sumMatrixOnGPU2D(float *A, float *B, float *C, int NX, int NY) {
unsigned int ix = blockIdx.x * blockDim.x + threadIdx.x;
unsigned int iy = blockIdx.y * blockDim.y + threadIdx.y;
unsigned int idx = iy * NX + ix;
if (ix < NX && iy < NY) {
C[idx] = A[idx] + B[idx];
}
}
/*****
//kernel function
__global__ void sumArrayOnGPU(float *A,float *B, float *C){
int idx = threadIdx.x + blockIdx.x * blockDim.x;
int idy = threadIdx.y + blockIdx.x * blockDim.y;
//printf("%d+%d*%d*%d = %d\n",idx,idy,blockDim.x,gridDim.x,idx+idy*blockDim.x*gridDim.x);
C[idx + idy * blockDim.x * gridDim.x] = A[idx + idy * blockDim.x * gridDim.x] + B[idx + idy * blockDim.x * gridDim.x];
//printf("%f\n",C[idx+idy*blockDim.x*gridDim.x]);
}
*****/
void printDeviceProp(const cudaDeviceProp &prop)
{
printf("Device Name : %s.\n", prop.name);
printf("totalGlobalMem : %ld.\n", prop.totalGlobalMem);
printf("sharedMemPerBlock : %ld.\n", prop.sharedMemPerBlock);
printf("regsPerBlock : %d.\n", prop.regsPerBlock);
printf("warpSize : %d.\n", prop.warpSize);
printf("memPitch : %ld.\n", prop.memPitch);
printf("maxThreadsPerBlock : %d.\n", prop.maxThreadsPerBlock);
printf("maxThreadsDim[0 - 2] : %d %d %d.\n", prop.maxThreadsDim[0], prop.maxThreadsDim[1], prop.maxThreadsDim[2]);
printf("maxGridSize[0 - 2] : %d %d %d.\n", prop.maxGridSize[0], prop.maxGridSize[1], prop.maxGridSize[2]);
printf("totalConstMem : %ld.\n", prop.totalConstMem);
printf("major.minor : %d.%d.\n", prop.major, prop.minor);
printf("clockRate : %d.\n", prop.clockRate);
printf("textureAlignment : %ld.\n", prop.textureAlignment);
printf("deviceOverlap : %d.\n", prop.deviceOverlap);
printf("multiProcessorCount : %d.\n", prop.multiProcessorCount);
printf("\n\n\n");
}
int main(int argc, char **argv){
printf("%s Starting...\n",argv[0]);
double istart,iElaps;
//get the cuda device count
int count;
cudaGetDeviceCount(&count);
if(count == 0){
fprintf(stderr, "There is no device.\n");
exit(1);
}
//find the device >= 1.x
int idxDevice = 0;
for(int idxDevice = 0; idxDevice < count; ++idxDevice){
cudaDeviceProp prop;
if(cudaGetDeviceProperties(&prop,idxDevice) == cudaSuccess)
if(prop.major >= 1){
printDeviceProp(prop);
break;
}
}
if(idxDevice == count){
fprintf(stderr,"there is no device supporting CUDA 1.x. \n");
}
CHECK(cudaSetDevice(idxDevice))
//set up data size of Matrix
int nx = 1<< 12;
int ny = 1<< 12;
int nxy = nx*ny;
size_t nBytes = nxy * sizeof(float);
printf("Matrix size: %d\n", nxy);
printf("Matrix volume: %zu\n",nBytes);
//malloc host memory
float *h_A,*h_B,*hostRef,*gpuRef;
istart = cpuSecond();
h_A = (float *)malloc(nBytes);
h_B = (float *)malloc(nBytes);
hostRef = (float *)malloc(nBytes);
gpuRef = (float *)malloc(nBytes);
iElaps = cpuSecond() -istart;
printf("malloc host memory:%lfs\n",iElaps);
//initialize data at host side
istart = cpuSecond();
initiaData(h_A, nxy);
initiaData(h_B, nxy);
iElaps = cpuSecond() - istart;
memset(hostRef,0,nBytes);
memset(gpuRef,0,nBytes);
printf("initiaData spent time:%lfs\n",iElaps);
//add Matrix at host side for result checks
istart = cpuSecond();
sumMatrixOnHost(h_A,h_B, hostRef, nx, ny);
iElaps = cpuSecond() - istart;
printf("sumArrayOnHost spent time:%lfs\n",iElaps);
//malloc device global memory
float *d_A, *d_B, *d_C;
cudaMalloc((float **) &d_A,nBytes);
cudaMalloc((float **) &d_B,nBytes);
cudaMalloc((float **) &d_C,nBytes);
//transfer data from host to device
cudaMemcpy(d_A, h_A,nBytes,cudaMemcpyHostToDevice);
cudaMemcpy(d_B, h_B,nBytes,cudaMemcpyHostToDevice);
//invoke kenel at host side
int dimx = 32;
int dimy = 1;
dim3 block(dimx,dimy);
dim3 grid((nx+block.x-1)/block.x, (ny+block.y-1)/block.y);
//dim3 grid(512,512);
istart = cpuSecond();
sumMatrixOnGPU2D<<<grid, block>>>(d_A,d_B,d_C,nx,ny);
cudaDeviceSynchronize();
iElaps = cpuSecond() - istart;
printf("sumMatrixOnGPU2D <<<(%d,%d), (%d,%d)>>> elapsed %lf sec\n", grid.x,grid.y, block.x, block.y, iElaps);
//copy kenel result back to host side
cudaMemcpy(gpuRef, d_C,nBytes,cudaMemcpyDeviceToHost);
//for(int i = ;i<nxy;i++){printf("%f",gpuRef[i])}
//check device results
checkResult(hostRef, gpuRef,nxy);
//free device global memory
cudaFree(d_A);
cudaFree(d_B);
cudaFree(d_C);
//free host memory
free(h_A);
free(h_B);
free(hostRef);
free(gpuRef);
//reset device
cudaDeviceReset();
return 0;
} | #include <hip/hip_runtime.h>
#include <stdio.h>
#include <time.h>
#include<sys/time.h>
//#difine LINUX_IMP
#define CHECK(call) \
{ \
const hipError_t error = call; \
if(error != hipSuccess) \
{\
printf("Error: %s:%d,", __FILE__,__LINE__);\
printf("code:%d,reason:%s\n",error,hipGetErrorString(error));\
exit(1);\
}\
}
//don't forget the time
double cpuSecond() {
struct timeval tp;
gettimeofday(&tp,NULL);
return ((double)tp.tv_sec + (double)tp.tv_usec*1.e-6);
}
void checkResult(float *hostRef, float *gpuRef,const int N){
double epsilon=1.0E-8;
bool match = 1;
for(int idx = 0; idx < N; idx++){
if(abs(hostRef[idx]-gpuRef[idx]) > epsilon){
match = 0;
printf("Arrays do not match!\n");
printf("host %5.6f gpu %5.6f at current %d\n",hostRef[idx],gpuRef[idx],idx);
break;
}
}
if(match)printf("Arrays match .\n\n");
}
//generate different seed for random number
void initiaData(float *ip,int size){
time_t t;
srand((unsigned)time(&t));
try{
for(int i = 0; i < size; i++){
ip[i] = (float)(rand() & 0xFF)/10.0f;
//ip[i] = float(0.001*i);
//ip[i] = float(0.01);
}
}catch(...){
printf("I don't know why!");
}
}
void sumMatrixOnHost(float *A,float *B, float *C, const int nx, const int ny){
for(int idy = 0; idy < ny; idy++)
for(int idx = 0; idx < nx; idx++){
C[idx+idy*nx] = A[idx+idy*nx] + B[idx+idy*nx];
}
}
__global__ void sumMatrixOnGPU2D(float *A, float *B, float *C, int NX, int NY) {
unsigned int ix = blockIdx.x * blockDim.x + threadIdx.x;
unsigned int iy = blockIdx.y * blockDim.y + threadIdx.y;
unsigned int idx = iy * NX + ix;
if (ix < NX && iy < NY) {
C[idx] = A[idx] + B[idx];
}
}
/*****
//kernel function
__global__ void sumArrayOnGPU(float *A,float *B, float *C){
int idx = threadIdx.x + blockIdx.x * blockDim.x;
int idy = threadIdx.y + blockIdx.x * blockDim.y;
//printf("%d+%d*%d*%d = %d\n",idx,idy,blockDim.x,gridDim.x,idx+idy*blockDim.x*gridDim.x);
C[idx + idy * blockDim.x * gridDim.x] = A[idx + idy * blockDim.x * gridDim.x] + B[idx + idy * blockDim.x * gridDim.x];
//printf("%f\n",C[idx+idy*blockDim.x*gridDim.x]);
}
*****/
void printDeviceProp(const hipDeviceProp_t &prop)
{
printf("Device Name : %s.\n", prop.name);
printf("totalGlobalMem : %ld.\n", prop.totalGlobalMem);
printf("sharedMemPerBlock : %ld.\n", prop.sharedMemPerBlock);
printf("regsPerBlock : %d.\n", prop.regsPerBlock);
printf("warpSize : %d.\n", prop.warpSize);
printf("memPitch : %ld.\n", prop.memPitch);
printf("maxThreadsPerBlock : %d.\n", prop.maxThreadsPerBlock);
printf("maxThreadsDim[0 - 2] : %d %d %d.\n", prop.maxThreadsDim[0], prop.maxThreadsDim[1], prop.maxThreadsDim[2]);
printf("maxGridSize[0 - 2] : %d %d %d.\n", prop.maxGridSize[0], prop.maxGridSize[1], prop.maxGridSize[2]);
printf("totalConstMem : %ld.\n", prop.totalConstMem);
printf("major.minor : %d.%d.\n", prop.major, prop.minor);
printf("clockRate : %d.\n", prop.clockRate);
printf("textureAlignment : %ld.\n", prop.textureAlignment);
printf("deviceOverlap : %d.\n", prop.deviceOverlap);
printf("multiProcessorCount : %d.\n", prop.multiProcessorCount);
printf("\n\n\n");
}
int main(int argc, char **argv){
printf("%s Starting...\n",argv[0]);
double istart,iElaps;
//get the cuda device count
int count;
hipGetDeviceCount(&count);
if(count == 0){
fprintf(stderr, "There is no device.\n");
exit(1);
}
//find the device >= 1.x
int idxDevice = 0;
for(int idxDevice = 0; idxDevice < count; ++idxDevice){
hipDeviceProp_t prop;
if(hipGetDeviceProperties(&prop,idxDevice) == hipSuccess)
if(prop.major >= 1){
printDeviceProp(prop);
break;
}
}
if(idxDevice == count){
fprintf(stderr,"there is no device supporting CUDA 1.x. \n");
}
CHECK(hipSetDevice(idxDevice))
//set up data size of Matrix
int nx = 1<< 12;
int ny = 1<< 12;
int nxy = nx*ny;
size_t nBytes = nxy * sizeof(float);
printf("Matrix size: %d\n", nxy);
printf("Matrix volume: %zu\n",nBytes);
//malloc host memory
float *h_A,*h_B,*hostRef,*gpuRef;
istart = cpuSecond();
h_A = (float *)malloc(nBytes);
h_B = (float *)malloc(nBytes);
hostRef = (float *)malloc(nBytes);
gpuRef = (float *)malloc(nBytes);
iElaps = cpuSecond() -istart;
printf("malloc host memory:%lfs\n",iElaps);
//initialize data at host side
istart = cpuSecond();
initiaData(h_A, nxy);
initiaData(h_B, nxy);
iElaps = cpuSecond() - istart;
memset(hostRef,0,nBytes);
memset(gpuRef,0,nBytes);
printf("initiaData spent time:%lfs\n",iElaps);
//add Matrix at host side for result checks
istart = cpuSecond();
sumMatrixOnHost(h_A,h_B, hostRef, nx, ny);
iElaps = cpuSecond() - istart;
printf("sumArrayOnHost spent time:%lfs\n",iElaps);
//malloc device global memory
float *d_A, *d_B, *d_C;
hipMalloc((float **) &d_A,nBytes);
hipMalloc((float **) &d_B,nBytes);
hipMalloc((float **) &d_C,nBytes);
//transfer data from host to device
hipMemcpy(d_A, h_A,nBytes,hipMemcpyHostToDevice);
hipMemcpy(d_B, h_B,nBytes,hipMemcpyHostToDevice);
//invoke kenel at host side
int dimx = 32;
int dimy = 1;
dim3 block(dimx,dimy);
dim3 grid((nx+block.x-1)/block.x, (ny+block.y-1)/block.y);
//dim3 grid(512,512);
istart = cpuSecond();
sumMatrixOnGPU2D<<<grid, block>>>(d_A,d_B,d_C,nx,ny);
hipDeviceSynchronize();
iElaps = cpuSecond() - istart;
printf("sumMatrixOnGPU2D <<<(%d,%d), (%d,%d)>>> elapsed %lf sec\n", grid.x,grid.y, block.x, block.y, iElaps);
//copy kenel result back to host side
hipMemcpy(gpuRef, d_C,nBytes,hipMemcpyDeviceToHost);
//for(int i = ;i<nxy;i++){printf("%f",gpuRef[i])}
//check device results
checkResult(hostRef, gpuRef,nxy);
//free device global memory
hipFree(d_A);
hipFree(d_B);
hipFree(d_C);
//free host memory
free(h_A);
free(h_B);
free(hostRef);
free(gpuRef);
//reset device
hipDeviceReset();
return 0;
} |
You are a helpful coding assistant specialized in converting HIP source code to AMD device assembly. | #include <hip/hip_runtime.h>
#include <stdio.h>
#include <time.h>
#include<sys/time.h>
//#difine LINUX_IMP
#define CHECK(call) \
{ \
const hipError_t error = call; \
if(error != hipSuccess) \
{\
printf("Error: %s:%d,", __FILE__,__LINE__);\
printf("code:%d,reason:%s\n",error,hipGetErrorString(error));\
exit(1);\
}\
}
//don't forget the time
double cpuSecond() {
struct timeval tp;
gettimeofday(&tp,NULL);
return ((double)tp.tv_sec + (double)tp.tv_usec*1.e-6);
}
void checkResult(float *hostRef, float *gpuRef,const int N){
double epsilon=1.0E-8;
bool match = 1;
for(int idx = 0; idx < N; idx++){
if(abs(hostRef[idx]-gpuRef[idx]) > epsilon){
match = 0;
printf("Arrays do not match!\n");
printf("host %5.6f gpu %5.6f at current %d\n",hostRef[idx],gpuRef[idx],idx);
break;
}
}
if(match)printf("Arrays match .\n\n");
}
//generate different seed for random number
void initiaData(float *ip,int size){
time_t t;
srand((unsigned)time(&t));
try{
for(int i = 0; i < size; i++){
ip[i] = (float)(rand() & 0xFF)/10.0f;
//ip[i] = float(0.001*i);
//ip[i] = float(0.01);
}
}catch(...){
printf("I don't know why!");
}
}
void sumMatrixOnHost(float *A,float *B, float *C, const int nx, const int ny){
for(int idy = 0; idy < ny; idy++)
for(int idx = 0; idx < nx; idx++){
C[idx+idy*nx] = A[idx+idy*nx] + B[idx+idy*nx];
}
}
__global__ void sumMatrixOnGPU2D(float *A, float *B, float *C, int NX, int NY) {
unsigned int ix = blockIdx.x * blockDim.x + threadIdx.x;
unsigned int iy = blockIdx.y * blockDim.y + threadIdx.y;
unsigned int idx = iy * NX + ix;
if (ix < NX && iy < NY) {
C[idx] = A[idx] + B[idx];
}
}
/*****
//kernel function
__global__ void sumArrayOnGPU(float *A,float *B, float *C){
int idx = threadIdx.x + blockIdx.x * blockDim.x;
int idy = threadIdx.y + blockIdx.x * blockDim.y;
//printf("%d+%d*%d*%d = %d\n",idx,idy,blockDim.x,gridDim.x,idx+idy*blockDim.x*gridDim.x);
C[idx + idy * blockDim.x * gridDim.x] = A[idx + idy * blockDim.x * gridDim.x] + B[idx + idy * blockDim.x * gridDim.x];
//printf("%f\n",C[idx+idy*blockDim.x*gridDim.x]);
}
*****/
void printDeviceProp(const hipDeviceProp_t &prop)
{
printf("Device Name : %s.\n", prop.name);
printf("totalGlobalMem : %ld.\n", prop.totalGlobalMem);
printf("sharedMemPerBlock : %ld.\n", prop.sharedMemPerBlock);
printf("regsPerBlock : %d.\n", prop.regsPerBlock);
printf("warpSize : %d.\n", prop.warpSize);
printf("memPitch : %ld.\n", prop.memPitch);
printf("maxThreadsPerBlock : %d.\n", prop.maxThreadsPerBlock);
printf("maxThreadsDim[0 - 2] : %d %d %d.\n", prop.maxThreadsDim[0], prop.maxThreadsDim[1], prop.maxThreadsDim[2]);
printf("maxGridSize[0 - 2] : %d %d %d.\n", prop.maxGridSize[0], prop.maxGridSize[1], prop.maxGridSize[2]);
printf("totalConstMem : %ld.\n", prop.totalConstMem);
printf("major.minor : %d.%d.\n", prop.major, prop.minor);
printf("clockRate : %d.\n", prop.clockRate);
printf("textureAlignment : %ld.\n", prop.textureAlignment);
printf("deviceOverlap : %d.\n", prop.deviceOverlap);
printf("multiProcessorCount : %d.\n", prop.multiProcessorCount);
printf("\n\n\n");
}
int main(int argc, char **argv){
printf("%s Starting...\n",argv[0]);
double istart,iElaps;
//get the cuda device count
int count;
hipGetDeviceCount(&count);
if(count == 0){
fprintf(stderr, "There is no device.\n");
exit(1);
}
//find the device >= 1.x
int idxDevice = 0;
for(int idxDevice = 0; idxDevice < count; ++idxDevice){
hipDeviceProp_t prop;
if(hipGetDeviceProperties(&prop,idxDevice) == hipSuccess)
if(prop.major >= 1){
printDeviceProp(prop);
break;
}
}
if(idxDevice == count){
fprintf(stderr,"there is no device supporting CUDA 1.x. \n");
}
CHECK(hipSetDevice(idxDevice))
//set up data size of Matrix
int nx = 1<< 12;
int ny = 1<< 12;
int nxy = nx*ny;
size_t nBytes = nxy * sizeof(float);
printf("Matrix size: %d\n", nxy);
printf("Matrix volume: %zu\n",nBytes);
//malloc host memory
float *h_A,*h_B,*hostRef,*gpuRef;
istart = cpuSecond();
h_A = (float *)malloc(nBytes);
h_B = (float *)malloc(nBytes);
hostRef = (float *)malloc(nBytes);
gpuRef = (float *)malloc(nBytes);
iElaps = cpuSecond() -istart;
printf("malloc host memory:%lfs\n",iElaps);
//initialize data at host side
istart = cpuSecond();
initiaData(h_A, nxy);
initiaData(h_B, nxy);
iElaps = cpuSecond() - istart;
memset(hostRef,0,nBytes);
memset(gpuRef,0,nBytes);
printf("initiaData spent time:%lfs\n",iElaps);
//add Matrix at host side for result checks
istart = cpuSecond();
sumMatrixOnHost(h_A,h_B, hostRef, nx, ny);
iElaps = cpuSecond() - istart;
printf("sumArrayOnHost spent time:%lfs\n",iElaps);
//malloc device global memory
float *d_A, *d_B, *d_C;
hipMalloc((float **) &d_A,nBytes);
hipMalloc((float **) &d_B,nBytes);
hipMalloc((float **) &d_C,nBytes);
//transfer data from host to device
hipMemcpy(d_A, h_A,nBytes,hipMemcpyHostToDevice);
hipMemcpy(d_B, h_B,nBytes,hipMemcpyHostToDevice);
//invoke kenel at host side
int dimx = 32;
int dimy = 1;
dim3 block(dimx,dimy);
dim3 grid((nx+block.x-1)/block.x, (ny+block.y-1)/block.y);
//dim3 grid(512,512);
istart = cpuSecond();
sumMatrixOnGPU2D<<<grid, block>>>(d_A,d_B,d_C,nx,ny);
hipDeviceSynchronize();
iElaps = cpuSecond() - istart;
printf("sumMatrixOnGPU2D <<<(%d,%d), (%d,%d)>>> elapsed %lf sec\n", grid.x,grid.y, block.x, block.y, iElaps);
//copy kenel result back to host side
hipMemcpy(gpuRef, d_C,nBytes,hipMemcpyDeviceToHost);
//for(int i = ;i<nxy;i++){printf("%f",gpuRef[i])}
//check device results
checkResult(hostRef, gpuRef,nxy);
//free device global memory
hipFree(d_A);
hipFree(d_B);
hipFree(d_C);
//free host memory
free(h_A);
free(h_B);
free(hostRef);
free(gpuRef);
//reset device
hipDeviceReset();
return 0;
} | .text
.amdgcn_target "amdgcn-amd-amdhsa--gfx1100"
.protected _Z16sumMatrixOnGPU2DPfS_S_ii
.globl _Z16sumMatrixOnGPU2DPfS_S_ii
.p2align 8
.type _Z16sumMatrixOnGPU2DPfS_S_ii,@function
_Z16sumMatrixOnGPU2DPfS_S_ii:
s_clause 0x1
s_load_b32 s2, s[0:1], 0x2c
s_load_b64 s[4:5], s[0:1], 0x18
v_and_b32_e32 v2, 0x3ff, v0
v_bfe_u32 v3, v0, 10, 10
s_waitcnt lgkmcnt(0)
s_and_b32 s3, s2, 0xffff
s_lshr_b32 s2, s2, 16
s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_2)
v_mad_u64_u32 v[0:1], null, s14, s3, v[2:3]
v_mad_u64_u32 v[1:2], null, s15, s2, v[3:4]
v_cmp_gt_u32_e32 vcc_lo, s4, v0
s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
v_cmp_gt_u32_e64 s2, s5, v1
s_and_b32 s2, vcc_lo, s2
s_delay_alu instid0(SALU_CYCLE_1)
s_and_saveexec_b32 s3, s2
s_cbranch_execz .LBB0_2
s_load_b128 s[8:11], s[0:1], 0x0
v_mad_u64_u32 v[2:3], null, v1, s4, v[0:1]
v_mov_b32_e32 v3, 0
s_load_b64 s[0:1], s[0:1], 0x10
s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
v_lshlrev_b64 v[0:1], 2, v[2:3]
s_waitcnt lgkmcnt(0)
v_add_co_u32 v2, vcc_lo, s8, v0
s_delay_alu instid0(VALU_DEP_2)
v_add_co_ci_u32_e32 v3, vcc_lo, s9, v1, vcc_lo
v_add_co_u32 v4, vcc_lo, s10, v0
v_add_co_ci_u32_e32 v5, vcc_lo, s11, v1, vcc_lo
v_add_co_u32 v0, vcc_lo, s0, v0
global_load_b32 v2, v[2:3], off
global_load_b32 v3, v[4:5], off
v_add_co_ci_u32_e32 v1, vcc_lo, s1, v1, vcc_lo
s_waitcnt vmcnt(0)
v_add_f32_e32 v2, v2, v3
global_store_b32 v[0:1], v2, off
.LBB0_2:
s_nop 0
s_sendmsg sendmsg(MSG_DEALLOC_VGPRS)
s_endpgm
.section .rodata,"a",@progbits
.p2align 6, 0x0
.amdhsa_kernel _Z16sumMatrixOnGPU2DPfS_S_ii
.amdhsa_group_segment_fixed_size 0
.amdhsa_private_segment_fixed_size 0
.amdhsa_kernarg_size 288
.amdhsa_user_sgpr_count 14
.amdhsa_user_sgpr_dispatch_ptr 0
.amdhsa_user_sgpr_queue_ptr 0
.amdhsa_user_sgpr_kernarg_segment_ptr 1
.amdhsa_user_sgpr_dispatch_id 0
.amdhsa_user_sgpr_private_segment_size 0
.amdhsa_wavefront_size32 1
.amdhsa_uses_dynamic_stack 0
.amdhsa_enable_private_segment 0
.amdhsa_system_sgpr_workgroup_id_x 1
.amdhsa_system_sgpr_workgroup_id_y 1
.amdhsa_system_sgpr_workgroup_id_z 0
.amdhsa_system_sgpr_workgroup_info 0
.amdhsa_system_vgpr_workitem_id 1
.amdhsa_next_free_vgpr 6
.amdhsa_next_free_sgpr 16
.amdhsa_float_round_mode_32 0
.amdhsa_float_round_mode_16_64 0
.amdhsa_float_denorm_mode_32 3
.amdhsa_float_denorm_mode_16_64 3
.amdhsa_dx10_clamp 1
.amdhsa_ieee_mode 1
.amdhsa_fp16_overflow 0
.amdhsa_workgroup_processor_mode 1
.amdhsa_memory_ordered 1
.amdhsa_forward_progress 0
.amdhsa_shared_vgpr_count 0
.amdhsa_exception_fp_ieee_invalid_op 0
.amdhsa_exception_fp_denorm_src 0
.amdhsa_exception_fp_ieee_div_zero 0
.amdhsa_exception_fp_ieee_overflow 0
.amdhsa_exception_fp_ieee_underflow 0
.amdhsa_exception_fp_ieee_inexact 0
.amdhsa_exception_int_div_zero 0
.end_amdhsa_kernel
.text
.Lfunc_end0:
.size _Z16sumMatrixOnGPU2DPfS_S_ii, .Lfunc_end0-_Z16sumMatrixOnGPU2DPfS_S_ii
.section .AMDGPU.csdata,"",@progbits
.text
.p2alignl 7, 3214868480
.fill 96, 4, 3214868480
.type __hip_cuid_,@object
.section .bss,"aw",@nobits
.globl __hip_cuid_
__hip_cuid_:
.byte 0
.size __hip_cuid_, 1
.ident "AMD clang version 18.0.0git (https://github.com/RadeonOpenCompute/llvm-project roc-6.3.2 25012 e5bf7e55c91490b07c49d8960fa7983d864936c4)"
.section ".note.GNU-stack","",@progbits
.addrsig
.addrsig_sym __hip_cuid_
.amdgpu_metadata
---
amdhsa.kernels:
- .args:
- .address_space: global
.offset: 0
.size: 8
.value_kind: global_buffer
- .address_space: global
.offset: 8
.size: 8
.value_kind: global_buffer
- .address_space: global
.offset: 16
.size: 8
.value_kind: global_buffer
- .offset: 24
.size: 4
.value_kind: by_value
- .offset: 28
.size: 4
.value_kind: by_value
- .offset: 32
.size: 4
.value_kind: hidden_block_count_x
- .offset: 36
.size: 4
.value_kind: hidden_block_count_y
- .offset: 40
.size: 4
.value_kind: hidden_block_count_z
- .offset: 44
.size: 2
.value_kind: hidden_group_size_x
- .offset: 46
.size: 2
.value_kind: hidden_group_size_y
- .offset: 48
.size: 2
.value_kind: hidden_group_size_z
- .offset: 50
.size: 2
.value_kind: hidden_remainder_x
- .offset: 52
.size: 2
.value_kind: hidden_remainder_y
- .offset: 54
.size: 2
.value_kind: hidden_remainder_z
- .offset: 72
.size: 8
.value_kind: hidden_global_offset_x
- .offset: 80
.size: 8
.value_kind: hidden_global_offset_y
- .offset: 88
.size: 8
.value_kind: hidden_global_offset_z
- .offset: 96
.size: 2
.value_kind: hidden_grid_dims
.group_segment_fixed_size: 0
.kernarg_segment_align: 8
.kernarg_segment_size: 288
.language: OpenCL C
.language_version:
- 2
- 0
.max_flat_workgroup_size: 1024
.name: _Z16sumMatrixOnGPU2DPfS_S_ii
.private_segment_fixed_size: 0
.sgpr_count: 18
.sgpr_spill_count: 0
.symbol: _Z16sumMatrixOnGPU2DPfS_S_ii.kd
.uniform_work_group_size: 1
.uses_dynamic_stack: false
.vgpr_count: 6
.vgpr_spill_count: 0
.wavefront_size: 32
.workgroup_processor_mode: 1
amdhsa.target: amdgcn-amd-amdhsa--gfx1100
amdhsa.version:
- 1
- 2
...
.end_amdgpu_metadata |
You are a helpful coding assistant specialized in converting HIP source code to AMD host assembly. | #include <hip/hip_runtime.h>
#include <stdio.h>
#include <time.h>
#include<sys/time.h>
//#difine LINUX_IMP
#define CHECK(call) \
{ \
const hipError_t error = call; \
if(error != hipSuccess) \
{\
printf("Error: %s:%d,", __FILE__,__LINE__);\
printf("code:%d,reason:%s\n",error,hipGetErrorString(error));\
exit(1);\
}\
}
//don't forget the time
double cpuSecond() {
struct timeval tp;
gettimeofday(&tp,NULL);
return ((double)tp.tv_sec + (double)tp.tv_usec*1.e-6);
}
void checkResult(float *hostRef, float *gpuRef,const int N){
double epsilon=1.0E-8;
bool match = 1;
for(int idx = 0; idx < N; idx++){
if(abs(hostRef[idx]-gpuRef[idx]) > epsilon){
match = 0;
printf("Arrays do not match!\n");
printf("host %5.6f gpu %5.6f at current %d\n",hostRef[idx],gpuRef[idx],idx);
break;
}
}
if(match)printf("Arrays match .\n\n");
}
//generate different seed for random number
void initiaData(float *ip,int size){
time_t t;
srand((unsigned)time(&t));
try{
for(int i = 0; i < size; i++){
ip[i] = (float)(rand() & 0xFF)/10.0f;
//ip[i] = float(0.001*i);
//ip[i] = float(0.01);
}
}catch(...){
printf("I don't know why!");
}
}
void sumMatrixOnHost(float *A,float *B, float *C, const int nx, const int ny){
for(int idy = 0; idy < ny; idy++)
for(int idx = 0; idx < nx; idx++){
C[idx+idy*nx] = A[idx+idy*nx] + B[idx+idy*nx];
}
}
__global__ void sumMatrixOnGPU2D(float *A, float *B, float *C, int NX, int NY) {
unsigned int ix = blockIdx.x * blockDim.x + threadIdx.x;
unsigned int iy = blockIdx.y * blockDim.y + threadIdx.y;
unsigned int idx = iy * NX + ix;
if (ix < NX && iy < NY) {
C[idx] = A[idx] + B[idx];
}
}
/*****
//kernel function
__global__ void sumArrayOnGPU(float *A,float *B, float *C){
int idx = threadIdx.x + blockIdx.x * blockDim.x;
int idy = threadIdx.y + blockIdx.x * blockDim.y;
//printf("%d+%d*%d*%d = %d\n",idx,idy,blockDim.x,gridDim.x,idx+idy*blockDim.x*gridDim.x);
C[idx + idy * blockDim.x * gridDim.x] = A[idx + idy * blockDim.x * gridDim.x] + B[idx + idy * blockDim.x * gridDim.x];
//printf("%f\n",C[idx+idy*blockDim.x*gridDim.x]);
}
*****/
void printDeviceProp(const hipDeviceProp_t &prop)
{
printf("Device Name : %s.\n", prop.name);
printf("totalGlobalMem : %ld.\n", prop.totalGlobalMem);
printf("sharedMemPerBlock : %ld.\n", prop.sharedMemPerBlock);
printf("regsPerBlock : %d.\n", prop.regsPerBlock);
printf("warpSize : %d.\n", prop.warpSize);
printf("memPitch : %ld.\n", prop.memPitch);
printf("maxThreadsPerBlock : %d.\n", prop.maxThreadsPerBlock);
printf("maxThreadsDim[0 - 2] : %d %d %d.\n", prop.maxThreadsDim[0], prop.maxThreadsDim[1], prop.maxThreadsDim[2]);
printf("maxGridSize[0 - 2] : %d %d %d.\n", prop.maxGridSize[0], prop.maxGridSize[1], prop.maxGridSize[2]);
printf("totalConstMem : %ld.\n", prop.totalConstMem);
printf("major.minor : %d.%d.\n", prop.major, prop.minor);
printf("clockRate : %d.\n", prop.clockRate);
printf("textureAlignment : %ld.\n", prop.textureAlignment);
printf("deviceOverlap : %d.\n", prop.deviceOverlap);
printf("multiProcessorCount : %d.\n", prop.multiProcessorCount);
printf("\n\n\n");
}
int main(int argc, char **argv){
printf("%s Starting...\n",argv[0]);
double istart,iElaps;
//get the cuda device count
int count;
hipGetDeviceCount(&count);
if(count == 0){
fprintf(stderr, "There is no device.\n");
exit(1);
}
//find the device >= 1.x
int idxDevice = 0;
for(int idxDevice = 0; idxDevice < count; ++idxDevice){
hipDeviceProp_t prop;
if(hipGetDeviceProperties(&prop,idxDevice) == hipSuccess)
if(prop.major >= 1){
printDeviceProp(prop);
break;
}
}
if(idxDevice == count){
fprintf(stderr,"there is no device supporting CUDA 1.x. \n");
}
CHECK(hipSetDevice(idxDevice))
//set up data size of Matrix
int nx = 1<< 12;
int ny = 1<< 12;
int nxy = nx*ny;
size_t nBytes = nxy * sizeof(float);
printf("Matrix size: %d\n", nxy);
printf("Matrix volume: %zu\n",nBytes);
//malloc host memory
float *h_A,*h_B,*hostRef,*gpuRef;
istart = cpuSecond();
h_A = (float *)malloc(nBytes);
h_B = (float *)malloc(nBytes);
hostRef = (float *)malloc(nBytes);
gpuRef = (float *)malloc(nBytes);
iElaps = cpuSecond() -istart;
printf("malloc host memory:%lfs\n",iElaps);
//initialize data at host side
istart = cpuSecond();
initiaData(h_A, nxy);
initiaData(h_B, nxy);
iElaps = cpuSecond() - istart;
memset(hostRef,0,nBytes);
memset(gpuRef,0,nBytes);
printf("initiaData spent time:%lfs\n",iElaps);
//add Matrix at host side for result checks
istart = cpuSecond();
sumMatrixOnHost(h_A,h_B, hostRef, nx, ny);
iElaps = cpuSecond() - istart;
printf("sumArrayOnHost spent time:%lfs\n",iElaps);
//malloc device global memory
float *d_A, *d_B, *d_C;
hipMalloc((float **) &d_A,nBytes);
hipMalloc((float **) &d_B,nBytes);
hipMalloc((float **) &d_C,nBytes);
//transfer data from host to device
hipMemcpy(d_A, h_A,nBytes,hipMemcpyHostToDevice);
hipMemcpy(d_B, h_B,nBytes,hipMemcpyHostToDevice);
//invoke kenel at host side
int dimx = 32;
int dimy = 1;
dim3 block(dimx,dimy);
dim3 grid((nx+block.x-1)/block.x, (ny+block.y-1)/block.y);
//dim3 grid(512,512);
istart = cpuSecond();
sumMatrixOnGPU2D<<<grid, block>>>(d_A,d_B,d_C,nx,ny);
hipDeviceSynchronize();
iElaps = cpuSecond() - istart;
printf("sumMatrixOnGPU2D <<<(%d,%d), (%d,%d)>>> elapsed %lf sec\n", grid.x,grid.y, block.x, block.y, iElaps);
//copy kenel result back to host side
hipMemcpy(gpuRef, d_C,nBytes,hipMemcpyDeviceToHost);
//for(int i = ;i<nxy;i++){printf("%f",gpuRef[i])}
//check device results
checkResult(hostRef, gpuRef,nxy);
//free device global memory
hipFree(d_A);
hipFree(d_B);
hipFree(d_C);
//free host memory
free(h_A);
free(h_B);
free(hostRef);
free(gpuRef);
//reset device
hipDeviceReset();
return 0;
} | .text
.file "llab1.hip"
.section .rodata.cst8,"aM",@progbits,8
.p2align 3, 0x0 # -- Begin function _Z9cpuSecondv
.LCPI0_0:
.quad 0x3eb0c6f7a0b5ed8d # double 9.9999999999999995E-7
.text
.globl _Z9cpuSecondv
.p2align 4, 0x90
.type _Z9cpuSecondv,@function
_Z9cpuSecondv: # @_Z9cpuSecondv
.cfi_startproc
# %bb.0:
subq $24, %rsp
.cfi_def_cfa_offset 32
leaq 8(%rsp), %rdi
xorl %esi, %esi
callq gettimeofday
cvtsi2sdq 8(%rsp), %xmm1
cvtsi2sdq 16(%rsp), %xmm0
mulsd .LCPI0_0(%rip), %xmm0
addsd %xmm1, %xmm0
addq $24, %rsp
.cfi_def_cfa_offset 8
retq
.Lfunc_end0:
.size _Z9cpuSecondv, .Lfunc_end0-_Z9cpuSecondv
.cfi_endproc
# -- End function
.section .rodata.cst16,"aM",@progbits,16
.p2align 4, 0x0 # -- Begin function _Z11checkResultPfS_i
.LCPI1_0:
.long 0x7fffffff # float NaN
.long 0x7fffffff # float NaN
.long 0x7fffffff # float NaN
.long 0x7fffffff # float NaN
.section .rodata.cst8,"aM",@progbits,8
.p2align 3, 0x0
.LCPI1_1:
.quad 0x3e45798ee2308c3a # double 1.0E-8
.text
.globl _Z11checkResultPfS_i
.p2align 4, 0x90
.type _Z11checkResultPfS_i,@function
_Z11checkResultPfS_i: # @_Z11checkResultPfS_i
.cfi_startproc
# %bb.0:
pushq %r15
.cfi_def_cfa_offset 16
pushq %r14
.cfi_def_cfa_offset 24
pushq %rbx
.cfi_def_cfa_offset 32
.cfi_offset %rbx, -32
.cfi_offset %r14, -24
.cfi_offset %r15, -16
testl %edx, %edx
jle .LBB1_4
# %bb.1: # %.lr.ph.preheader
movl %edx, %eax
xorl %ebx, %ebx
movaps .LCPI1_0(%rip), %xmm0 # xmm0 = [NaN,NaN,NaN,NaN]
movsd .LCPI1_1(%rip), %xmm1 # xmm1 = mem[0],zero
.p2align 4, 0x90
.LBB1_2: # %.lr.ph
# =>This Inner Loop Header: Depth=1
movss (%rdi,%rbx,4), %xmm2 # xmm2 = mem[0],zero,zero,zero
subss (%rsi,%rbx,4), %xmm2
andps %xmm0, %xmm2
cvtss2sd %xmm2, %xmm2
ucomisd %xmm1, %xmm2
ja .LBB1_5
# %bb.3: # in Loop: Header=BB1_2 Depth=1
incq %rbx
cmpq %rbx, %rax
jne .LBB1_2
.LBB1_4: # %.critedge
movl $.Lstr.1, %edi
popq %rbx
.cfi_def_cfa_offset 24
popq %r14
.cfi_def_cfa_offset 16
popq %r15
.cfi_def_cfa_offset 8
jmp puts@PLT # TAILCALL
.LBB1_5:
.cfi_def_cfa_offset 32
movq %rdi, %r14
movl $.Lstr, %edi
movq %rsi, %r15
callq puts@PLT
movss (%r14,%rbx,4), %xmm0 # xmm0 = mem[0],zero,zero,zero
cvtss2sd %xmm0, %xmm0
movss (%r15,%rbx,4), %xmm1 # xmm1 = mem[0],zero,zero,zero
cvtss2sd %xmm1, %xmm1
movl $.L.str.1, %edi
movl %ebx, %esi
movb $2, %al
popq %rbx
.cfi_def_cfa_offset 24
popq %r14
.cfi_def_cfa_offset 16
popq %r15
.cfi_def_cfa_offset 8
jmp printf # TAILCALL
.Lfunc_end1:
.size _Z11checkResultPfS_i, .Lfunc_end1-_Z11checkResultPfS_i
.cfi_endproc
# -- End function
.section .rodata.cst4,"aM",@progbits,4
.p2align 2, 0x0 # -- Begin function _Z10initiaDataPfi
.LCPI2_0:
.long 0x41200000 # float 10
.text
.globl _Z10initiaDataPfi
.p2align 4, 0x90
.type _Z10initiaDataPfi,@function
_Z10initiaDataPfi: # @_Z10initiaDataPfi
.cfi_startproc
# %bb.0:
pushq %rbp
.cfi_def_cfa_offset 16
pushq %r15
.cfi_def_cfa_offset 24
pushq %r14
.cfi_def_cfa_offset 32
pushq %rbx
.cfi_def_cfa_offset 40
pushq %rax
.cfi_def_cfa_offset 48
.cfi_offset %rbx, -40
.cfi_offset %r14, -32
.cfi_offset %r15, -24
.cfi_offset %rbp, -16
movl %esi, %ebp
movq %rdi, %rbx
movq %rsp, %rdi
callq time
movl %eax, %edi
callq srand
testl %ebp, %ebp
jle .LBB2_3
# %bb.1: # %.lr.ph.preheader
movl %ebp, %r14d
xorl %r15d, %r15d
.p2align 4, 0x90
.LBB2_2: # %.lr.ph
# =>This Inner Loop Header: Depth=1
callq rand
movzbl %al, %eax
xorps %xmm0, %xmm0
cvtsi2ss %eax, %xmm0
divss .LCPI2_0(%rip), %xmm0
movss %xmm0, (%rbx,%r15,4)
incq %r15
cmpq %r15, %r14
jne .LBB2_2
.LBB2_3: # %._crit_edge
addq $8, %rsp
.cfi_def_cfa_offset 40
popq %rbx
.cfi_def_cfa_offset 32
popq %r14
.cfi_def_cfa_offset 24
popq %r15
.cfi_def_cfa_offset 16
popq %rbp
.cfi_def_cfa_offset 8
retq
.Lfunc_end2:
.size _Z10initiaDataPfi, .Lfunc_end2-_Z10initiaDataPfi
.cfi_endproc
# -- End function
.globl _Z15sumMatrixOnHostPfS_S_ii # -- Begin function _Z15sumMatrixOnHostPfS_S_ii
.p2align 4, 0x90
.type _Z15sumMatrixOnHostPfS_S_ii,@function
_Z15sumMatrixOnHostPfS_S_ii: # @_Z15sumMatrixOnHostPfS_S_ii
.cfi_startproc
# %bb.0:
testl %r8d, %r8d
jle .LBB3_7
# %bb.1: # %.preheader.lr.ph
pushq %r15
.cfi_def_cfa_offset 16
pushq %r14
.cfi_def_cfa_offset 24
pushq %rbx
.cfi_def_cfa_offset 32
.cfi_offset %rbx, -32
.cfi_offset %r14, -24
.cfi_offset %r15, -16
movl %r8d, %eax
movl %ecx, %r8d
xorl %r9d, %r9d
xorl %r10d, %r10d
jmp .LBB3_2
.p2align 4, 0x90
.LBB3_5: # %._crit_edge
# in Loop: Header=BB3_2 Depth=1
incq %r10
addl %ecx, %r9d
cmpq %rax, %r10
je .LBB3_6
.LBB3_2: # %.preheader
# =>This Loop Header: Depth=1
# Child Loop BB3_4 Depth 2
testl %ecx, %ecx
jle .LBB3_5
# %bb.3: # %.lr.ph
# in Loop: Header=BB3_2 Depth=1
movl %r9d, %r14d
leaq (%rdx,%r14,4), %r11
leaq (%rsi,%r14,4), %rbx
leaq (%rdi,%r14,4), %r14
xorl %r15d, %r15d
.p2align 4, 0x90
.LBB3_4: # Parent Loop BB3_2 Depth=1
# => This Inner Loop Header: Depth=2
movss (%r14,%r15,4), %xmm0 # xmm0 = mem[0],zero,zero,zero
addss (%rbx,%r15,4), %xmm0
movss %xmm0, (%r11,%r15,4)
incq %r15
cmpq %r15, %r8
jne .LBB3_4
jmp .LBB3_5
.LBB3_6:
popq %rbx
.cfi_def_cfa_offset 24
popq %r14
.cfi_def_cfa_offset 16
popq %r15
.cfi_def_cfa_offset 8
.cfi_restore %rbx
.cfi_restore %r14
.cfi_restore %r15
.LBB3_7: # %._crit_edge21
retq
.Lfunc_end3:
.size _Z15sumMatrixOnHostPfS_S_ii, .Lfunc_end3-_Z15sumMatrixOnHostPfS_S_ii
.cfi_endproc
# -- End function
.globl _Z31__device_stub__sumMatrixOnGPU2DPfS_S_ii # -- Begin function _Z31__device_stub__sumMatrixOnGPU2DPfS_S_ii
.p2align 4, 0x90
.type _Z31__device_stub__sumMatrixOnGPU2DPfS_S_ii,@function
_Z31__device_stub__sumMatrixOnGPU2DPfS_S_ii: # @_Z31__device_stub__sumMatrixOnGPU2DPfS_S_ii
.cfi_startproc
# %bb.0:
subq $120, %rsp
.cfi_def_cfa_offset 128
movq %rdi, 72(%rsp)
movq %rsi, 64(%rsp)
movq %rdx, 56(%rsp)
movl %ecx, 4(%rsp)
movl %r8d, (%rsp)
leaq 72(%rsp), %rax
movq %rax, 80(%rsp)
leaq 64(%rsp), %rax
movq %rax, 88(%rsp)
leaq 56(%rsp), %rax
movq %rax, 96(%rsp)
leaq 4(%rsp), %rax
movq %rax, 104(%rsp)
movq %rsp, %rax
movq %rax, 112(%rsp)
leaq 40(%rsp), %rdi
leaq 24(%rsp), %rsi
leaq 16(%rsp), %rdx
leaq 8(%rsp), %rcx
callq __hipPopCallConfiguration
movq 40(%rsp), %rsi
movl 48(%rsp), %edx
movq 24(%rsp), %rcx
movl 32(%rsp), %r8d
leaq 80(%rsp), %r9
movl $_Z16sumMatrixOnGPU2DPfS_S_ii, %edi
pushq 8(%rsp)
.cfi_adjust_cfa_offset 8
pushq 24(%rsp)
.cfi_adjust_cfa_offset 8
callq hipLaunchKernel
addq $136, %rsp
.cfi_adjust_cfa_offset -136
retq
.Lfunc_end4:
.size _Z31__device_stub__sumMatrixOnGPU2DPfS_S_ii, .Lfunc_end4-_Z31__device_stub__sumMatrixOnGPU2DPfS_S_ii
.cfi_endproc
# -- End function
.globl _Z15printDevicePropRK20hipDeviceProp_tR0600 # -- Begin function _Z15printDevicePropRK20hipDeviceProp_tR0600
.p2align 4, 0x90
.type _Z15printDevicePropRK20hipDeviceProp_tR0600,@function
_Z15printDevicePropRK20hipDeviceProp_tR0600: # @_Z15printDevicePropRK20hipDeviceProp_tR0600
.cfi_startproc
# %bb.0:
pushq %rbx
.cfi_def_cfa_offset 16
.cfi_offset %rbx, -16
movq %rdi, %rbx
movl $.L.str.3, %edi
movq %rbx, %rsi
xorl %eax, %eax
callq printf
movq 288(%rbx), %rsi
movl $.L.str.4, %edi
xorl %eax, %eax
callq printf
movq 296(%rbx), %rsi
movl $.L.str.5, %edi
xorl %eax, %eax
callq printf
movl 304(%rbx), %esi
movl $.L.str.6, %edi
xorl %eax, %eax
callq printf
movl 308(%rbx), %esi
movl $.L.str.7, %edi
xorl %eax, %eax
callq printf
movq 312(%rbx), %rsi
movl $.L.str.8, %edi
xorl %eax, %eax
callq printf
movl 320(%rbx), %esi
movl $.L.str.9, %edi
xorl %eax, %eax
callq printf
movl 324(%rbx), %esi
movl 328(%rbx), %edx
movl 332(%rbx), %ecx
movl $.L.str.10, %edi
xorl %eax, %eax
callq printf
movl 336(%rbx), %esi
movl 340(%rbx), %edx
movl 344(%rbx), %ecx
movl $.L.str.11, %edi
xorl %eax, %eax
callq printf
movq 352(%rbx), %rsi
movl $.L.str.12, %edi
xorl %eax, %eax
callq printf
movl 360(%rbx), %esi
movl 364(%rbx), %edx
movl $.L.str.13, %edi
xorl %eax, %eax
callq printf
movl 348(%rbx), %esi
movl $.L.str.14, %edi
xorl %eax, %eax
callq printf
movq 368(%rbx), %rsi
movl $.L.str.15, %edi
xorl %eax, %eax
callq printf
movl 384(%rbx), %esi
movl $.L.str.16, %edi
xorl %eax, %eax
callq printf
movl 388(%rbx), %esi
movl $.L.str.17, %edi
xorl %eax, %eax
callq printf
movl $.Lstr.2, %edi
popq %rbx
.cfi_def_cfa_offset 8
jmp puts@PLT # TAILCALL
.Lfunc_end5:
.size _Z15printDevicePropRK20hipDeviceProp_tR0600, .Lfunc_end5-_Z15printDevicePropRK20hipDeviceProp_tR0600
.cfi_endproc
# -- End function
.section .rodata.cst8,"aM",@progbits,8
.p2align 3, 0x0 # -- Begin function main
.LCPI6_0:
.quad 0x3eb0c6f7a0b5ed8d # double 9.9999999999999995E-7
.LCPI6_3:
.quad 0x3e45798ee2308c3a # double 1.0E-8
.section .rodata.cst4,"aM",@progbits,4
.p2align 2, 0x0
.LCPI6_1:
.long 0x41200000 # float 10
.section .rodata.cst16,"aM",@progbits,16
.p2align 4, 0x0
.LCPI6_2:
.long 0x7fffffff # float NaN
.long 0x7fffffff # float NaN
.long 0x7fffffff # float NaN
.long 0x7fffffff # float NaN
.text
.globl main
.p2align 4, 0x90
.type main,@function
main: # @main
.cfi_startproc
# %bb.0:
pushq %rbp
.cfi_def_cfa_offset 16
pushq %r15
.cfi_def_cfa_offset 24
pushq %r14
.cfi_def_cfa_offset 32
pushq %r13
.cfi_def_cfa_offset 40
pushq %r12
.cfi_def_cfa_offset 48
pushq %rbx
.cfi_def_cfa_offset 56
subq $1608, %rsp # imm = 0x648
.cfi_def_cfa_offset 1664
.cfi_offset %rbx, -56
.cfi_offset %r12, -48
.cfi_offset %r13, -40
.cfi_offset %r14, -32
.cfi_offset %r15, -24
.cfi_offset %rbp, -16
movq (%rsi), %rsi
movl $.L.str.19, %edi
xorl %eax, %eax
callq printf
leaq 12(%rsp), %rdi
callq hipGetDeviceCount
cmpl $0, 12(%rsp)
je .LBB6_26
# %bb.1: # %.preheader
cmpl $0, 12(%rsp)
jle .LBB6_7
# %bb.2: # %.lr.ph
xorl %ebx, %ebx
leaq 128(%rsp), %r14
jmp .LBB6_3
.p2align 4, 0x90
.LBB6_6: # %.critedge
# in Loop: Header=BB6_3 Depth=1
incl %ebx
cmpl 12(%rsp), %ebx
jge .LBB6_7
.LBB6_3: # =>This Inner Loop Header: Depth=1
movq %r14, %rdi
movl %ebx, %esi
callq hipGetDevicePropertiesR0600
testl %eax, %eax
jne .LBB6_6
# %bb.4: # in Loop: Header=BB6_3 Depth=1
cmpl $0, 488(%rsp)
jle .LBB6_6
# %bb.5:
leaq 128(%rsp), %rdi
callq _Z15printDevicePropRK20hipDeviceProp_tR0600
.LBB6_7: # %.loopexit
cmpl $0, 12(%rsp)
je .LBB6_8
.LBB6_9:
xorl %edi, %edi
callq hipSetDevice
testl %eax, %eax
jne .LBB6_27
# %bb.10:
xorl %r13d, %r13d
movl $.L.str.25, %edi
movl $16777216, %esi # imm = 0x1000000
xorl %eax, %eax
callq printf
movl $.L.str.26, %edi
movl $67108864, %esi # imm = 0x4000000
xorl %eax, %eax
callq printf
leaq 128(%rsp), %rdi
xorl %esi, %esi
callq gettimeofday
cvtsi2sdq 128(%rsp), %xmm0
cvtsi2sdq 136(%rsp), %xmm1
mulsd .LCPI6_0(%rip), %xmm1
addsd %xmm0, %xmm1
movsd %xmm1, (%rsp) # 8-byte Spill
movl $67108864, %edi # imm = 0x4000000
callq malloc
movq %rax, %rbx
movl $67108864, %edi # imm = 0x4000000
callq malloc
movq %rax, %r14
movl $67108864, %edi # imm = 0x4000000
callq malloc
movq %rax, %r15
movl $67108864, %edi # imm = 0x4000000
callq malloc
movq %rax, %r12
leaq 128(%rsp), %rdi
xorl %esi, %esi
callq gettimeofday
xorps %xmm1, %xmm1
cvtsi2sdq 128(%rsp), %xmm1
xorps %xmm0, %xmm0
cvtsi2sdq 136(%rsp), %xmm0
mulsd .LCPI6_0(%rip), %xmm0
addsd %xmm1, %xmm0
subsd (%rsp), %xmm0 # 8-byte Folded Reload
movl $.L.str.27, %edi
movb $1, %al
callq printf
leaq 128(%rsp), %rdi
xorl %esi, %esi
callq gettimeofday
movq 128(%rsp), %rbp
xorps %xmm0, %xmm0
cvtsi2sdq 136(%rsp), %xmm0
mulsd .LCPI6_0(%rip), %xmm0
movsd %xmm0, (%rsp) # 8-byte Spill
leaq 128(%rsp), %rdi
callq time
movl %eax, %edi
callq srand
.p2align 4, 0x90
.LBB6_11: # %.lr.ph.i
# =>This Inner Loop Header: Depth=1
callq rand
movzbl %al, %eax
xorps %xmm0, %xmm0
cvtsi2ss %eax, %xmm0
divss .LCPI6_1(%rip), %xmm0
movss %xmm0, (%rbx,%r13,4)
incq %r13
cmpq $16777216, %r13 # imm = 0x1000000
jne .LBB6_11
# %bb.12: # %_Z10initiaDataPfi.exit
xorps %xmm0, %xmm0
cvtsi2sd %rbp, %xmm0
movsd %xmm0, 48(%rsp) # 8-byte Spill
leaq 128(%rsp), %rdi
callq time
movl %eax, %edi
callq srand
xorl %r13d, %r13d
.p2align 4, 0x90
.LBB6_13: # %.lr.ph.i74
# =>This Inner Loop Header: Depth=1
callq rand
movzbl %al, %eax
xorps %xmm0, %xmm0
cvtsi2ss %eax, %xmm0
divss .LCPI6_1(%rip), %xmm0
movss %xmm0, (%r14,%r13,4)
incq %r13
cmpq $16777216, %r13 # imm = 0x1000000
jne .LBB6_13
# %bb.14: # %_Z10initiaDataPfi.exit78
movsd (%rsp), %xmm0 # 8-byte Reload
# xmm0 = mem[0],zero
addsd 48(%rsp), %xmm0 # 8-byte Folded Reload
movsd %xmm0, (%rsp) # 8-byte Spill
xorl %r13d, %r13d
leaq 128(%rsp), %rdi
xorl %esi, %esi
callq gettimeofday
xorps %xmm0, %xmm0
cvtsi2sdq 128(%rsp), %xmm0
cvtsi2sdq 136(%rsp), %xmm2
movsd .LCPI6_0(%rip), %xmm1 # xmm1 = mem[0],zero
mulsd %xmm1, %xmm2
addsd %xmm0, %xmm2
subsd (%rsp), %xmm2 # 8-byte Folded Reload
movsd %xmm2, (%rsp) # 8-byte Spill
movl $67108864, %edx # imm = 0x4000000
movq %r15, %rdi
xorl %esi, %esi
callq memset@PLT
movl $67108864, %edx # imm = 0x4000000
movq %r12, %rdi
xorl %esi, %esi
callq memset@PLT
movl $.L.str.28, %edi
movsd (%rsp), %xmm0 # 8-byte Reload
# xmm0 = mem[0],zero
movb $1, %al
callq printf
leaq 128(%rsp), %rdi
xorl %esi, %esi
callq gettimeofday
movq 128(%rsp), %rax
xorps %xmm1, %xmm1
cvtsi2sdq 136(%rsp), %xmm1
mulsd .LCPI6_0(%rip), %xmm1
movq %rbx, %rcx
movq %r14, %rdx
movq %r15, %rsi
.p2align 4, 0x90
.LBB6_15: # %.preheader.i
# =>This Loop Header: Depth=1
# Child Loop BB6_16 Depth 2
xorl %edi, %edi
.p2align 4, 0x90
.LBB6_16: # Parent Loop BB6_15 Depth=1
# => This Inner Loop Header: Depth=2
movss (%rcx,%rdi,4), %xmm0 # xmm0 = mem[0],zero,zero,zero
addss (%rdx,%rdi,4), %xmm0
movss %xmm0, (%rsi,%rdi,4)
incq %rdi
cmpq $4096, %rdi # imm = 0x1000
jne .LBB6_16
# %bb.17: # %._crit_edge.i
# in Loop: Header=BB6_15 Depth=1
incq %r13
addq $16384, %rsi # imm = 0x4000
addq $16384, %rdx # imm = 0x4000
addq $16384, %rcx # imm = 0x4000
cmpq $4096, %r13 # imm = 0x1000
jne .LBB6_15
# %bb.18: # %_Z15sumMatrixOnHostPfS_S_ii.exit
xorps %xmm0, %xmm0
cvtsi2sd %rax, %xmm0
addsd %xmm0, %xmm1
movsd %xmm1, (%rsp) # 8-byte Spill
leaq 128(%rsp), %rdi
xorl %esi, %esi
callq gettimeofday
xorps %xmm1, %xmm1
cvtsi2sdq 128(%rsp), %xmm1
xorps %xmm0, %xmm0
cvtsi2sdq 136(%rsp), %xmm0
movsd .LCPI6_0(%rip), %xmm2 # xmm2 = mem[0],zero
mulsd %xmm2, %xmm0
addsd %xmm1, %xmm0
subsd (%rsp), %xmm0 # 8-byte Folded Reload
movl $.L.str.29, %edi
movb $1, %al
callq printf
leaq 32(%rsp), %rdi
movl $67108864, %esi # imm = 0x4000000
callq hipMalloc
leaq 24(%rsp), %rdi
movl $67108864, %esi # imm = 0x4000000
callq hipMalloc
leaq 16(%rsp), %rdi
movl $67108864, %esi # imm = 0x4000000
callq hipMalloc
movq 32(%rsp), %rdi
movl $67108864, %edx # imm = 0x4000000
movq %rbx, %rsi
movl $1, %ecx
callq hipMemcpy
movq 24(%rsp), %rdi
movl $67108864, %edx # imm = 0x4000000
movq %r14, %rsi
movl $1, %ecx
callq hipMemcpy
leaq 128(%rsp), %rdi
xorl %esi, %esi
callq gettimeofday
xorps %xmm0, %xmm0
cvtsi2sdq 128(%rsp), %xmm0
xorps %xmm1, %xmm1
cvtsi2sdq 136(%rsp), %xmm1
mulsd .LCPI6_0(%rip), %xmm1
addsd %xmm0, %xmm1
movsd %xmm1, (%rsp) # 8-byte Spill
movabsq $17592186044544, %rdi # imm = 0x100000000080
movabsq $4294967328, %rdx # imm = 0x100000020
movl $1, %esi
movl $1, %ecx
xorl %r8d, %r8d
xorl %r9d, %r9d
callq __hipPushCallConfiguration
testl %eax, %eax
jne .LBB6_20
# %bb.19:
movq 32(%rsp), %rax
movq 24(%rsp), %rcx
movq 16(%rsp), %rdx
movq %rax, 120(%rsp)
movq %rcx, 112(%rsp)
movq %rdx, 104(%rsp)
movl $4096, 44(%rsp) # imm = 0x1000
movl $4096, 40(%rsp) # imm = 0x1000
leaq 120(%rsp), %rax
movq %rax, 128(%rsp)
leaq 112(%rsp), %rax
movq %rax, 136(%rsp)
leaq 104(%rsp), %rax
movq %rax, 144(%rsp)
leaq 44(%rsp), %rax
movq %rax, 152(%rsp)
leaq 40(%rsp), %rax
movq %rax, 160(%rsp)
leaq 88(%rsp), %rdi
leaq 72(%rsp), %rsi
leaq 64(%rsp), %rdx
leaq 56(%rsp), %rcx
callq __hipPopCallConfiguration
movq 88(%rsp), %rsi
movl 96(%rsp), %edx
movq 72(%rsp), %rcx
movl 80(%rsp), %r8d
leaq 128(%rsp), %r9
movl $_Z16sumMatrixOnGPU2DPfS_S_ii, %edi
pushq 56(%rsp)
.cfi_adjust_cfa_offset 8
pushq 72(%rsp)
.cfi_adjust_cfa_offset 8
callq hipLaunchKernel
addq $16, %rsp
.cfi_adjust_cfa_offset -16
.LBB6_20:
callq hipDeviceSynchronize
xorl %r13d, %r13d
leaq 128(%rsp), %rdi
xorl %esi, %esi
callq gettimeofday
xorps %xmm1, %xmm1
cvtsi2sdq 128(%rsp), %xmm1
xorps %xmm0, %xmm0
cvtsi2sdq 136(%rsp), %xmm0
mulsd .LCPI6_0(%rip), %xmm0
addsd %xmm1, %xmm0
subsd (%rsp), %xmm0 # 8-byte Folded Reload
movl $.L.str.30, %edi
movl $128, %esi
movl $4096, %edx # imm = 0x1000
movl $32, %ecx
movl $1, %r8d
movb $1, %al
callq printf
movq 16(%rsp), %rsi
movl $67108864, %edx # imm = 0x4000000
movq %r12, %rdi
movl $2, %ecx
callq hipMemcpy
movaps .LCPI6_2(%rip), %xmm0 # xmm0 = [NaN,NaN,NaN,NaN]
movsd .LCPI6_3(%rip), %xmm1 # xmm1 = mem[0],zero
.p2align 4, 0x90
.LBB6_21: # %.lr.ph.i83
# =>This Inner Loop Header: Depth=1
movss (%r15,%r13,4), %xmm3 # xmm3 = mem[0],zero,zero,zero
movaps %xmm3, %xmm2
subss (%r12,%r13,4), %xmm2
andps %xmm0, %xmm2
cvtss2sd %xmm2, %xmm2
ucomisd %xmm1, %xmm2
ja .LBB6_22
# %bb.23: # in Loop: Header=BB6_21 Depth=1
incq %r13
cmpq $16777216, %r13 # imm = 0x1000000
jne .LBB6_21
# %bb.24: # %.critedge.i
movl $.Lstr.1, %edi
callq puts@PLT
jmp .LBB6_25
.LBB6_22:
movl $.Lstr, %edi
movss %xmm3, (%rsp) # 4-byte Spill
callq puts@PLT
movss (%rsp), %xmm0 # 4-byte Reload
# xmm0 = mem[0],zero,zero,zero
cvtss2sd %xmm0, %xmm0
movss (%r12,%r13,4), %xmm1 # xmm1 = mem[0],zero,zero,zero
cvtss2sd %xmm1, %xmm1
movl $.L.str.1, %edi
movl %r13d, %esi
movb $2, %al
callq printf
.LBB6_25: # %_Z11checkResultPfS_i.exit
movq 32(%rsp), %rdi
callq hipFree
movq 24(%rsp), %rdi
callq hipFree
movq 16(%rsp), %rdi
callq hipFree
movq %rbx, %rdi
callq free
movq %r14, %rdi
callq free
movq %r15, %rdi
callq free
movq %r12, %rdi
callq free
callq hipDeviceReset
xorl %eax, %eax
addq $1608, %rsp # imm = 0x648
.cfi_def_cfa_offset 56
popq %rbx
.cfi_def_cfa_offset 48
popq %r12
.cfi_def_cfa_offset 40
popq %r13
.cfi_def_cfa_offset 32
popq %r14
.cfi_def_cfa_offset 24
popq %r15
.cfi_def_cfa_offset 16
popq %rbp
.cfi_def_cfa_offset 8
retq
.LBB6_8:
.cfi_def_cfa_offset 1664
movq stderr(%rip), %rcx
movl $.L.str.21, %edi
movl $41, %esi
movl $1, %edx
callq fwrite@PLT
jmp .LBB6_9
.LBB6_26:
movq stderr(%rip), %rcx
movl $.L.str.20, %edi
movl $20, %esi
movl $1, %edx
callq fwrite@PLT
movl $1, %edi
callq exit
.LBB6_27:
movl $.L.str.22, %edi
movl $.L.str.23, %esi
movl $126, %edx
movl %eax, %ebx
xorl %eax, %eax
callq printf
movl %ebx, %edi
callq hipGetErrorString
movl $.L.str.24, %edi
movl %ebx, %esi
movq %rax, %rdx
xorl %eax, %eax
callq printf
movl $1, %edi
callq exit
.Lfunc_end6:
.size main, .Lfunc_end6-main
.cfi_endproc
# -- End function
.p2align 4, 0x90 # -- Begin function __hip_module_ctor
.type __hip_module_ctor,@function
__hip_module_ctor: # @__hip_module_ctor
.cfi_startproc
# %bb.0:
subq $40, %rsp
.cfi_def_cfa_offset 48
cmpq $0, __hip_gpubin_handle(%rip)
jne .LBB7_2
# %bb.1:
movl $__hip_fatbin_wrapper, %edi
callq __hipRegisterFatBinary
movq %rax, __hip_gpubin_handle(%rip)
.LBB7_2:
movq __hip_gpubin_handle(%rip), %rdi
xorps %xmm0, %xmm0
movups %xmm0, 16(%rsp)
movups %xmm0, (%rsp)
movl $_Z16sumMatrixOnGPU2DPfS_S_ii, %esi
movl $.L__unnamed_1, %edx
movl $.L__unnamed_1, %ecx
movl $-1, %r8d
xorl %r9d, %r9d
callq __hipRegisterFunction
movl $__hip_module_dtor, %edi
addq $40, %rsp
.cfi_def_cfa_offset 8
jmp atexit # TAILCALL
.Lfunc_end7:
.size __hip_module_ctor, .Lfunc_end7-__hip_module_ctor
.cfi_endproc
# -- End function
.p2align 4, 0x90 # -- Begin function __hip_module_dtor
.type __hip_module_dtor,@function
__hip_module_dtor: # @__hip_module_dtor
.cfi_startproc
# %bb.0:
movq __hip_gpubin_handle(%rip), %rdi
testq %rdi, %rdi
je .LBB8_2
# %bb.1:
pushq %rax
.cfi_def_cfa_offset 16
callq __hipUnregisterFatBinary
movq $0, __hip_gpubin_handle(%rip)
addq $8, %rsp
.cfi_def_cfa_offset 8
.LBB8_2:
retq
.Lfunc_end8:
.size __hip_module_dtor, .Lfunc_end8-__hip_module_dtor
.cfi_endproc
# -- End function
.type .L.str.1,@object # @.str.1
.section .rodata.str1.1,"aMS",@progbits,1
.L.str.1:
.asciz "host %5.6f gpu %5.6f at current %d\n"
.size .L.str.1, 36
.type _Z16sumMatrixOnGPU2DPfS_S_ii,@object # @_Z16sumMatrixOnGPU2DPfS_S_ii
.section .rodata,"a",@progbits
.globl _Z16sumMatrixOnGPU2DPfS_S_ii
.p2align 3, 0x0
_Z16sumMatrixOnGPU2DPfS_S_ii:
.quad _Z31__device_stub__sumMatrixOnGPU2DPfS_S_ii
.size _Z16sumMatrixOnGPU2DPfS_S_ii, 8
.type .L.str.3,@object # @.str.3
.section .rodata.str1.1,"aMS",@progbits,1
.L.str.3:
.asciz "Device Name : %s.\n"
.size .L.str.3, 19
.type .L.str.4,@object # @.str.4
.L.str.4:
.asciz "totalGlobalMem : %ld.\n"
.size .L.str.4, 23
.type .L.str.5,@object # @.str.5
.L.str.5:
.asciz "sharedMemPerBlock : %ld.\n"
.size .L.str.5, 26
.type .L.str.6,@object # @.str.6
.L.str.6:
.asciz "regsPerBlock : %d.\n"
.size .L.str.6, 20
.type .L.str.7,@object # @.str.7
.L.str.7:
.asciz "warpSize : %d.\n"
.size .L.str.7, 16
.type .L.str.8,@object # @.str.8
.L.str.8:
.asciz "memPitch : %ld.\n"
.size .L.str.8, 17
.type .L.str.9,@object # @.str.9
.L.str.9:
.asciz "maxThreadsPerBlock : %d.\n"
.size .L.str.9, 26
.type .L.str.10,@object # @.str.10
.L.str.10:
.asciz "maxThreadsDim[0 - 2] : %d %d %d.\n"
.size .L.str.10, 34
.type .L.str.11,@object # @.str.11
.L.str.11:
.asciz "maxGridSize[0 - 2] : %d %d %d.\n"
.size .L.str.11, 32
.type .L.str.12,@object # @.str.12
.L.str.12:
.asciz "totalConstMem : %ld.\n"
.size .L.str.12, 22
.type .L.str.13,@object # @.str.13
.L.str.13:
.asciz "major.minor : %d.%d.\n"
.size .L.str.13, 22
.type .L.str.14,@object # @.str.14
.L.str.14:
.asciz "clockRate : %d.\n"
.size .L.str.14, 17
.type .L.str.15,@object # @.str.15
.L.str.15:
.asciz "textureAlignment : %ld.\n"
.size .L.str.15, 25
.type .L.str.16,@object # @.str.16
.L.str.16:
.asciz "deviceOverlap : %d.\n"
.size .L.str.16, 21
.type .L.str.17,@object # @.str.17
.L.str.17:
.asciz "multiProcessorCount : %d.\n"
.size .L.str.17, 27
.type .L.str.19,@object # @.str.19
.L.str.19:
.asciz "%s Starting...\n"
.size .L.str.19, 16
.type .L.str.20,@object # @.str.20
.L.str.20:
.asciz "There is no device.\n"
.size .L.str.20, 21
.type .L.str.21,@object # @.str.21
.L.str.21:
.asciz "there is no device supporting CUDA 1.x. \n"
.size .L.str.21, 42
.type .L.str.22,@object # @.str.22
.L.str.22:
.asciz "Error: %s:%d,"
.size .L.str.22, 14
.type .L.str.23,@object # @.str.23
.L.str.23:
.asciz "/home/ubuntu/Datasets/stackv2/train-structured-repos-hip/Sinclair-Dee/HPC-CUDA/master/Misc/llab1.hip"
.size .L.str.23, 101
.type .L.str.24,@object # @.str.24
.L.str.24:
.asciz "code:%d,reason:%s\n"
.size .L.str.24, 19
.type .L.str.25,@object # @.str.25
.L.str.25:
.asciz "Matrix size: %d\n"
.size .L.str.25, 17
.type .L.str.26,@object # @.str.26
.L.str.26:
.asciz "Matrix volume: %zu\n"
.size .L.str.26, 20
.type .L.str.27,@object # @.str.27
.L.str.27:
.asciz "malloc host memory:%lfs\n"
.size .L.str.27, 25
.type .L.str.28,@object # @.str.28
.L.str.28:
.asciz "initiaData spent time:%lfs\n"
.size .L.str.28, 28
.type .L.str.29,@object # @.str.29
.L.str.29:
.asciz "sumArrayOnHost spent time:%lfs\n"
.size .L.str.29, 32
.type .L.str.30,@object # @.str.30
.L.str.30:
.asciz "sumMatrixOnGPU2D <<<(%d,%d), (%d,%d)>>> elapsed %lf sec\n"
.size .L.str.30, 57
.type .L__unnamed_1,@object # @0
.L__unnamed_1:
.asciz "_Z16sumMatrixOnGPU2DPfS_S_ii"
.size .L__unnamed_1, 29
.type __hip_fatbin_wrapper,@object # @__hip_fatbin_wrapper
.section .hipFatBinSegment,"a",@progbits
.p2align 3, 0x0
__hip_fatbin_wrapper:
.long 1212764230 # 0x48495046
.long 1 # 0x1
.quad __hip_fatbin
.quad 0
.size __hip_fatbin_wrapper, 24
.type __hip_gpubin_handle,@object # @__hip_gpubin_handle
.local __hip_gpubin_handle
.comm __hip_gpubin_handle,8,8
.section .init_array,"aw",@init_array
.p2align 3, 0x0
.quad __hip_module_ctor
.type __hip_cuid_,@object # @__hip_cuid_
.bss
.globl __hip_cuid_
__hip_cuid_:
.byte 0 # 0x0
.size __hip_cuid_, 1
.type .Lstr,@object # @str
.section .rodata.str1.1,"aMS",@progbits,1
.Lstr:
.asciz "Arrays do not match!"
.size .Lstr, 21
.type .Lstr.1,@object # @str.1
.Lstr.1:
.asciz "Arrays match .\n"
.size .Lstr.1, 16
.type .Lstr.2,@object # @str.2
.Lstr.2:
.asciz "\n\n"
.size .Lstr.2, 3
.section ".linker-options","e",@llvm_linker_options
.ident "AMD clang version 18.0.0git (https://github.com/RadeonOpenCompute/llvm-project roc-6.3.2 25012 e5bf7e55c91490b07c49d8960fa7983d864936c4)"
.section ".note.GNU-stack","",@progbits
.addrsig
.addrsig_sym _Z31__device_stub__sumMatrixOnGPU2DPfS_S_ii
.addrsig_sym __hip_module_ctor
.addrsig_sym __hip_module_dtor
.addrsig_sym _Z16sumMatrixOnGPU2DPfS_S_ii
.addrsig_sym __hip_fatbin
.addrsig_sym __hip_fatbin_wrapper
.addrsig_sym __hip_cuid_ |
You are a helpful coding assistant specialized in converting from CUDA device assembly to AMD device assembly. | code for sm_80
Function : _Z16sumMatrixOnGPU2DPfS_S_ii
.headerflags @"EF_CUDA_TEXMODE_UNIFIED EF_CUDA_64BIT_ADDRESS EF_CUDA_SM80 EF_CUDA_VIRTUAL_SM(EF_CUDA_SM80)"
/*0000*/ MOV R1, c[0x0][0x28] ; /* 0x00000a0000017a02 */
/* 0x000fe40000000f00 */
/*0010*/ S2R R3, SR_CTAID.Y ; /* 0x0000000000037919 */
/* 0x000e280000002600 */
/*0020*/ S2R R2, SR_TID.Y ; /* 0x0000000000027919 */
/* 0x000e280000002200 */
/*0030*/ S2R R0, SR_CTAID.X ; /* 0x0000000000007919 */
/* 0x000e680000002500 */
/*0040*/ S2R R5, SR_TID.X ; /* 0x0000000000057919 */
/* 0x000e620000002100 */
/*0050*/ IMAD R3, R3, c[0x0][0x4], R2 ; /* 0x0000010003037a24 */
/* 0x001fca00078e0202 */
/*0060*/ ISETP.GE.U32.AND P0, PT, R3, c[0x0][0x17c], PT ; /* 0x00005f0003007a0c */
/* 0x000fe20003f06070 */
/*0070*/ IMAD R0, R0, c[0x0][0x0], R5 ; /* 0x0000000000007a24 */
/* 0x002fca00078e0205 */
/*0080*/ ISETP.GE.U32.OR P0, PT, R0, c[0x0][0x178], P0 ; /* 0x00005e0000007a0c */
/* 0x000fda0000706470 */
/*0090*/ @P0 EXIT ; /* 0x000000000000094d */
/* 0x000fea0003800000 */
/*00a0*/ HFMA2.MMA R7, -RZ, RZ, 0, 2.384185791015625e-07 ; /* 0x00000004ff077435 */
/* 0x000fe200000001ff */
/*00b0*/ IMAD R0, R3, c[0x0][0x178], R0 ; /* 0x00005e0003007a24 */
/* 0x000fe200078e0200 */
/*00c0*/ ULDC.64 UR4, c[0x0][0x118] ; /* 0x0000460000047ab9 */
/* 0x000fd00000000a00 */
/*00d0*/ IMAD.WIDE.U32 R4, R0, R7, c[0x0][0x168] ; /* 0x00005a0000047625 */
/* 0x000fc800078e0007 */
/*00e0*/ IMAD.WIDE.U32 R2, R0.reuse, R7.reuse, c[0x0][0x160] ; /* 0x0000580000027625 */
/* 0x0c0fe400078e0007 */
/*00f0*/ LDG.E R4, [R4.64] ; /* 0x0000000404047981 */
/* 0x000ea8000c1e1900 */
/*0100*/ LDG.E R3, [R2.64] ; /* 0x0000000402037981 */
/* 0x000ea2000c1e1900 */
/*0110*/ IMAD.WIDE.U32 R6, R0, R7, c[0x0][0x170] ; /* 0x00005c0000067625 */
/* 0x000fc800078e0007 */
/*0120*/ FADD R9, R4, R3 ; /* 0x0000000304097221 */
/* 0x004fca0000000000 */
/*0130*/ STG.E [R6.64], R9 ; /* 0x0000000906007986 */
/* 0x000fe2000c101904 */
/*0140*/ EXIT ; /* 0x000000000000794d */
/* 0x000fea0003800000 */
/*0150*/ BRA 0x150; /* 0xfffffff000007947 */
/* 0x000fc0000383ffff */
/*0160*/ NOP; /* 0x0000000000007918 */
/* 0x000fc00000000000 */
/*0170*/ NOP; /* 0x0000000000007918 */
/* 0x000fc00000000000 */
/*0180*/ NOP; /* 0x0000000000007918 */
/* 0x000fc00000000000 */
/*0190*/ NOP; /* 0x0000000000007918 */
/* 0x000fc00000000000 */
/*01a0*/ NOP; /* 0x0000000000007918 */
/* 0x000fc00000000000 */
/*01b0*/ NOP; /* 0x0000000000007918 */
/* 0x000fc00000000000 */
/*01c0*/ NOP; /* 0x0000000000007918 */
/* 0x000fc00000000000 */
/*01d0*/ NOP; /* 0x0000000000007918 */
/* 0x000fc00000000000 */
/*01e0*/ NOP; /* 0x0000000000007918 */
/* 0x000fc00000000000 */
/*01f0*/ NOP; /* 0x0000000000007918 */
/* 0x000fc00000000000 */
.......... | .text
.amdgcn_target "amdgcn-amd-amdhsa--gfx1100"
.protected _Z16sumMatrixOnGPU2DPfS_S_ii
.globl _Z16sumMatrixOnGPU2DPfS_S_ii
.p2align 8
.type _Z16sumMatrixOnGPU2DPfS_S_ii,@function
_Z16sumMatrixOnGPU2DPfS_S_ii:
s_clause 0x1
s_load_b32 s2, s[0:1], 0x2c
s_load_b64 s[4:5], s[0:1], 0x18
v_and_b32_e32 v2, 0x3ff, v0
v_bfe_u32 v3, v0, 10, 10
s_waitcnt lgkmcnt(0)
s_and_b32 s3, s2, 0xffff
s_lshr_b32 s2, s2, 16
s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_2)
v_mad_u64_u32 v[0:1], null, s14, s3, v[2:3]
v_mad_u64_u32 v[1:2], null, s15, s2, v[3:4]
v_cmp_gt_u32_e32 vcc_lo, s4, v0
s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
v_cmp_gt_u32_e64 s2, s5, v1
s_and_b32 s2, vcc_lo, s2
s_delay_alu instid0(SALU_CYCLE_1)
s_and_saveexec_b32 s3, s2
s_cbranch_execz .LBB0_2
s_load_b128 s[8:11], s[0:1], 0x0
v_mad_u64_u32 v[2:3], null, v1, s4, v[0:1]
v_mov_b32_e32 v3, 0
s_load_b64 s[0:1], s[0:1], 0x10
s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
v_lshlrev_b64 v[0:1], 2, v[2:3]
s_waitcnt lgkmcnt(0)
v_add_co_u32 v2, vcc_lo, s8, v0
s_delay_alu instid0(VALU_DEP_2)
v_add_co_ci_u32_e32 v3, vcc_lo, s9, v1, vcc_lo
v_add_co_u32 v4, vcc_lo, s10, v0
v_add_co_ci_u32_e32 v5, vcc_lo, s11, v1, vcc_lo
v_add_co_u32 v0, vcc_lo, s0, v0
global_load_b32 v2, v[2:3], off
global_load_b32 v3, v[4:5], off
v_add_co_ci_u32_e32 v1, vcc_lo, s1, v1, vcc_lo
s_waitcnt vmcnt(0)
v_add_f32_e32 v2, v2, v3
global_store_b32 v[0:1], v2, off
.LBB0_2:
s_nop 0
s_sendmsg sendmsg(MSG_DEALLOC_VGPRS)
s_endpgm
.section .rodata,"a",@progbits
.p2align 6, 0x0
.amdhsa_kernel _Z16sumMatrixOnGPU2DPfS_S_ii
.amdhsa_group_segment_fixed_size 0
.amdhsa_private_segment_fixed_size 0
.amdhsa_kernarg_size 288
.amdhsa_user_sgpr_count 14
.amdhsa_user_sgpr_dispatch_ptr 0
.amdhsa_user_sgpr_queue_ptr 0
.amdhsa_user_sgpr_kernarg_segment_ptr 1
.amdhsa_user_sgpr_dispatch_id 0
.amdhsa_user_sgpr_private_segment_size 0
.amdhsa_wavefront_size32 1
.amdhsa_uses_dynamic_stack 0
.amdhsa_enable_private_segment 0
.amdhsa_system_sgpr_workgroup_id_x 1
.amdhsa_system_sgpr_workgroup_id_y 1
.amdhsa_system_sgpr_workgroup_id_z 0
.amdhsa_system_sgpr_workgroup_info 0
.amdhsa_system_vgpr_workitem_id 1
.amdhsa_next_free_vgpr 6
.amdhsa_next_free_sgpr 16
.amdhsa_float_round_mode_32 0
.amdhsa_float_round_mode_16_64 0
.amdhsa_float_denorm_mode_32 3
.amdhsa_float_denorm_mode_16_64 3
.amdhsa_dx10_clamp 1
.amdhsa_ieee_mode 1
.amdhsa_fp16_overflow 0
.amdhsa_workgroup_processor_mode 1
.amdhsa_memory_ordered 1
.amdhsa_forward_progress 0
.amdhsa_shared_vgpr_count 0
.amdhsa_exception_fp_ieee_invalid_op 0
.amdhsa_exception_fp_denorm_src 0
.amdhsa_exception_fp_ieee_div_zero 0
.amdhsa_exception_fp_ieee_overflow 0
.amdhsa_exception_fp_ieee_underflow 0
.amdhsa_exception_fp_ieee_inexact 0
.amdhsa_exception_int_div_zero 0
.end_amdhsa_kernel
.text
.Lfunc_end0:
.size _Z16sumMatrixOnGPU2DPfS_S_ii, .Lfunc_end0-_Z16sumMatrixOnGPU2DPfS_S_ii
.section .AMDGPU.csdata,"",@progbits
.text
.p2alignl 7, 3214868480
.fill 96, 4, 3214868480
.type __hip_cuid_,@object
.section .bss,"aw",@nobits
.globl __hip_cuid_
__hip_cuid_:
.byte 0
.size __hip_cuid_, 1
.ident "AMD clang version 18.0.0git (https://github.com/RadeonOpenCompute/llvm-project roc-6.3.2 25012 e5bf7e55c91490b07c49d8960fa7983d864936c4)"
.section ".note.GNU-stack","",@progbits
.addrsig
.addrsig_sym __hip_cuid_
.amdgpu_metadata
---
amdhsa.kernels:
- .args:
- .address_space: global
.offset: 0
.size: 8
.value_kind: global_buffer
- .address_space: global
.offset: 8
.size: 8
.value_kind: global_buffer
- .address_space: global
.offset: 16
.size: 8
.value_kind: global_buffer
- .offset: 24
.size: 4
.value_kind: by_value
- .offset: 28
.size: 4
.value_kind: by_value
- .offset: 32
.size: 4
.value_kind: hidden_block_count_x
- .offset: 36
.size: 4
.value_kind: hidden_block_count_y
- .offset: 40
.size: 4
.value_kind: hidden_block_count_z
- .offset: 44
.size: 2
.value_kind: hidden_group_size_x
- .offset: 46
.size: 2
.value_kind: hidden_group_size_y
- .offset: 48
.size: 2
.value_kind: hidden_group_size_z
- .offset: 50
.size: 2
.value_kind: hidden_remainder_x
- .offset: 52
.size: 2
.value_kind: hidden_remainder_y
- .offset: 54
.size: 2
.value_kind: hidden_remainder_z
- .offset: 72
.size: 8
.value_kind: hidden_global_offset_x
- .offset: 80
.size: 8
.value_kind: hidden_global_offset_y
- .offset: 88
.size: 8
.value_kind: hidden_global_offset_z
- .offset: 96
.size: 2
.value_kind: hidden_grid_dims
.group_segment_fixed_size: 0
.kernarg_segment_align: 8
.kernarg_segment_size: 288
.language: OpenCL C
.language_version:
- 2
- 0
.max_flat_workgroup_size: 1024
.name: _Z16sumMatrixOnGPU2DPfS_S_ii
.private_segment_fixed_size: 0
.sgpr_count: 18
.sgpr_spill_count: 0
.symbol: _Z16sumMatrixOnGPU2DPfS_S_ii.kd
.uniform_work_group_size: 1
.uses_dynamic_stack: false
.vgpr_count: 6
.vgpr_spill_count: 0
.wavefront_size: 32
.workgroup_processor_mode: 1
amdhsa.target: amdgcn-amd-amdhsa--gfx1100
amdhsa.version:
- 1
- 2
...
.end_amdgpu_metadata |
You are a helpful coding assistant specialized in converting from CUDA host assembly to AMD host assembly. | .file "tmpxft_0007e960_00000000-6_llab1.cudafe1.cpp"
.text
#APP
#NO_APP
.type _ZL26__cudaUnregisterBinaryUtilv, @function
_ZL26__cudaUnregisterBinaryUtilv:
.LFB2065:
.cfi_startproc
endbr64
subq $8, %rsp
.cfi_def_cfa_offset 16
movq _ZL20__cudaFatCubinHandle(%rip), %rdi
call __cudaUnregisterFatBinary@PLT
addq $8, %rsp
.cfi_def_cfa_offset 8
ret
.cfi_endproc
.LFE2065:
.size _ZL26__cudaUnregisterBinaryUtilv, .-_ZL26__cudaUnregisterBinaryUtilv
.globl _Z9cpuSecondv
.type _Z9cpuSecondv, @function
_Z9cpuSecondv:
.LFB2057:
.cfi_startproc
endbr64
subq $40, %rsp
.cfi_def_cfa_offset 48
movq %fs:40, %rax
movq %rax, 24(%rsp)
xorl %eax, %eax
movq %rsp, %rdi
movl $0, %esi
call gettimeofday@PLT
pxor %xmm0, %xmm0
cvtsi2sdq 8(%rsp), %xmm0
mulsd .LC0(%rip), %xmm0
pxor %xmm1, %xmm1
cvtsi2sdq (%rsp), %xmm1
addsd %xmm1, %xmm0
movq 24(%rsp), %rax
subq %fs:40, %rax
jne .L6
addq $40, %rsp
.cfi_remember_state
.cfi_def_cfa_offset 8
ret
.L6:
.cfi_restore_state
call __stack_chk_fail@PLT
.cfi_endproc
.LFE2057:
.size _Z9cpuSecondv, .-_Z9cpuSecondv
.section .rodata.str1.1,"aMS",@progbits,1
.LC3:
.string "Arrays do not match!\n"
.section .rodata.str1.8,"aMS",@progbits,1
.align 8
.LC4:
.string "host %5.6f gpu %5.6f at current %d\n"
.section .rodata.str1.1
.LC5:
.string "Arrays match .\n\n"
.text
.globl _Z11checkResultPfS_i
.type _Z11checkResultPfS_i, @function
_Z11checkResultPfS_i:
.LFB2058:
.cfi_startproc
endbr64
pushq %r12
.cfi_def_cfa_offset 16
.cfi_offset 12, -16
pushq %rbp
.cfi_def_cfa_offset 24
.cfi_offset 6, -24
pushq %rbx
.cfi_def_cfa_offset 32
.cfi_offset 3, -32
testl %edx, %edx
jle .L8
movq %rdi, %rbp
movq %rsi, %rbx
movl $0, %r12d
movss .LC1(%rip), %xmm2
movsd .LC2(%rip), %xmm1
.L12:
movss 0(%rbp), %xmm0
subss (%rbx), %xmm0
andps %xmm2, %xmm0
cvtss2sd %xmm0, %xmm0
comisd %xmm1, %xmm0
ja .L17
addl $1, %r12d
addq $4, %rbp
addq $4, %rbx
cmpl %r12d, %edx
jne .L12
.L8:
leaq .LC5(%rip), %rsi
movl $2, %edi
movl $0, %eax
call __printf_chk@PLT
.L7:
popq %rbx
.cfi_remember_state
.cfi_def_cfa_offset 24
popq %rbp
.cfi_def_cfa_offset 16
popq %r12
.cfi_def_cfa_offset 8
ret
.L17:
.cfi_restore_state
leaq .LC3(%rip), %rsi
movl $2, %edi
movl $0, %eax
call __printf_chk@PLT
pxor %xmm0, %xmm0
cvtss2sd 0(%rbp), %xmm0
movl %r12d, %edx
pxor %xmm1, %xmm1
cvtss2sd (%rbx), %xmm1
leaq .LC4(%rip), %rsi
movl $2, %edi
movl $2, %eax
call __printf_chk@PLT
jmp .L7
.cfi_endproc
.LFE2058:
.size _Z11checkResultPfS_i, .-_Z11checkResultPfS_i
.globl _Z10initiaDataPfi
.type _Z10initiaDataPfi, @function
_Z10initiaDataPfi:
.LFB2059:
.cfi_startproc
endbr64
pushq %r12
.cfi_def_cfa_offset 16
.cfi_offset 12, -16
pushq %rbp
.cfi_def_cfa_offset 24
.cfi_offset 6, -24
pushq %rbx
.cfi_def_cfa_offset 32
.cfi_offset 3, -32
subq $16, %rsp
.cfi_def_cfa_offset 48
movq %rdi, %r12
movl %esi, %ebp
movq %fs:40, %rax
movq %rax, 8(%rsp)
xorl %eax, %eax
movq %rsp, %rdi
call time@PLT
movl %eax, %edi
call srand@PLT
testl %ebp, %ebp
jle .L18
movq %r12, %rbx
movslq %ebp, %rbp
leaq (%r12,%rbp,4), %rbp
.L20:
call rand@PLT
movzbl %al, %eax
pxor %xmm0, %xmm0
cvtsi2ssl %eax, %xmm0
divss .LC6(%rip), %xmm0
movss %xmm0, (%rbx)
addq $4, %rbx
cmpq %rbp, %rbx
jne .L20
.L18:
movq 8(%rsp), %rax
subq %fs:40, %rax
jne .L24
addq $16, %rsp
.cfi_remember_state
.cfi_def_cfa_offset 32
popq %rbx
.cfi_def_cfa_offset 24
popq %rbp
.cfi_def_cfa_offset 16
popq %r12
.cfi_def_cfa_offset 8
ret
.L24:
.cfi_restore_state
call __stack_chk_fail@PLT
.cfi_endproc
.LFE2059:
.size _Z10initiaDataPfi, .-_Z10initiaDataPfi
.globl _Z15sumMatrixOnHostPfS_S_ii
.type _Z15sumMatrixOnHostPfS_S_ii, @function
_Z15sumMatrixOnHostPfS_S_ii:
.LFB2060:
.cfi_startproc
endbr64
testl %r8d, %r8d
jle .L33
pushq %rbx
.cfi_def_cfa_offset 16
.cfi_offset 3, -16
movq %rdx, %r9
movl $0, %r11d
movl $0, %r10d
movslq %ecx, %rbx
jmp .L27
.L29:
movslq %r11d, %rdx
leaq 0(,%rdx,4), %rax
addq %rbx, %rdx
salq $2, %rdx
.L28:
movss (%rdi,%rax), %xmm0
addss (%rsi,%rax), %xmm0
movss %xmm0, (%r9,%rax)
addq $4, %rax
cmpq %rdx, %rax
jne .L28
.L30:
addl $1, %r10d
addl %ecx, %r11d
cmpl %r10d, %r8d
je .L25
.L27:
testl %ecx, %ecx
jg .L29
jmp .L30
.L25:
popq %rbx
.cfi_def_cfa_offset 8
ret
.L33:
.cfi_restore 3
ret
.cfi_endproc
.LFE2060:
.size _Z15sumMatrixOnHostPfS_S_ii, .-_Z15sumMatrixOnHostPfS_S_ii
.section .rodata.str1.1
.LC7:
.string "Device Name : %s.\n"
.LC8:
.string "totalGlobalMem : %ld.\n"
.LC9:
.string "sharedMemPerBlock : %ld.\n"
.LC10:
.string "regsPerBlock : %d.\n"
.LC11:
.string "warpSize : %d.\n"
.LC12:
.string "memPitch : %ld.\n"
.LC13:
.string "maxThreadsPerBlock : %d.\n"
.section .rodata.str1.8
.align 8
.LC14:
.string "maxThreadsDim[0 - 2] : %d %d %d.\n"
.align 8
.LC15:
.string "maxGridSize[0 - 2] : %d %d %d.\n"
.section .rodata.str1.1
.LC16:
.string "totalConstMem : %ld.\n"
.LC17:
.string "major.minor : %d.%d.\n"
.LC18:
.string "clockRate : %d.\n"
.LC19:
.string "textureAlignment : %ld.\n"
.LC20:
.string "deviceOverlap : %d.\n"
.LC21:
.string "multiProcessorCount : %d.\n"
.LC22:
.string "\n\n\n"
.text
.globl _Z15printDevicePropRK14cudaDeviceProp
.type _Z15printDevicePropRK14cudaDeviceProp, @function
_Z15printDevicePropRK14cudaDeviceProp:
.LFB2061:
.cfi_startproc
endbr64
pushq %rbx
.cfi_def_cfa_offset 16
.cfi_offset 3, -16
movq %rdi, %rbx
movq %rdi, %rdx
leaq .LC7(%rip), %rsi
movl $2, %edi
movl $0, %eax
call __printf_chk@PLT
movq 288(%rbx), %rdx
leaq .LC8(%rip), %rsi
movl $2, %edi
movl $0, %eax
call __printf_chk@PLT
movq 296(%rbx), %rdx
leaq .LC9(%rip), %rsi
movl $2, %edi
movl $0, %eax
call __printf_chk@PLT
movl 304(%rbx), %edx
leaq .LC10(%rip), %rsi
movl $2, %edi
movl $0, %eax
call __printf_chk@PLT
movl 308(%rbx), %edx
leaq .LC11(%rip), %rsi
movl $2, %edi
movl $0, %eax
call __printf_chk@PLT
movq 312(%rbx), %rdx
leaq .LC12(%rip), %rsi
movl $2, %edi
movl $0, %eax
call __printf_chk@PLT
movl 320(%rbx), %edx
leaq .LC13(%rip), %rsi
movl $2, %edi
movl $0, %eax
call __printf_chk@PLT
movl 328(%rbx), %ecx
movl 324(%rbx), %edx
movl 332(%rbx), %r8d
leaq .LC14(%rip), %rsi
movl $2, %edi
movl $0, %eax
call __printf_chk@PLT
movl 340(%rbx), %ecx
movl 336(%rbx), %edx
movl 344(%rbx), %r8d
leaq .LC15(%rip), %rsi
movl $2, %edi
movl $0, %eax
call __printf_chk@PLT
movq 352(%rbx), %rdx
leaq .LC16(%rip), %rsi
movl $2, %edi
movl $0, %eax
call __printf_chk@PLT
movl 364(%rbx), %ecx
movl 360(%rbx), %edx
leaq .LC17(%rip), %rsi
movl $2, %edi
movl $0, %eax
call __printf_chk@PLT
movl 348(%rbx), %edx
leaq .LC18(%rip), %rsi
movl $2, %edi
movl $0, %eax
call __printf_chk@PLT
movq 368(%rbx), %rdx
leaq .LC19(%rip), %rsi
movl $2, %edi
movl $0, %eax
call __printf_chk@PLT
movl 384(%rbx), %edx
leaq .LC20(%rip), %rsi
movl $2, %edi
movl $0, %eax
call __printf_chk@PLT
movl 388(%rbx), %edx
leaq .LC21(%rip), %rsi
movl $2, %edi
movl $0, %eax
call __printf_chk@PLT
leaq .LC22(%rip), %rsi
movl $2, %edi
movl $0, %eax
call __printf_chk@PLT
popq %rbx
.cfi_def_cfa_offset 8
ret
.cfi_endproc
.LFE2061:
.size _Z15printDevicePropRK14cudaDeviceProp, .-_Z15printDevicePropRK14cudaDeviceProp
.globl _Z42__device_stub__Z16sumMatrixOnGPU2DPfS_S_iiPfS_S_ii
.type _Z42__device_stub__Z16sumMatrixOnGPU2DPfS_S_iiPfS_S_ii, @function
_Z42__device_stub__Z16sumMatrixOnGPU2DPfS_S_iiPfS_S_ii:
.LFB2087:
.cfi_startproc
endbr64
subq $152, %rsp
.cfi_def_cfa_offset 160
movq %rdi, 24(%rsp)
movq %rsi, 16(%rsp)
movq %rdx, 8(%rsp)
movl %ecx, 4(%rsp)
movl %r8d, (%rsp)
movq %fs:40, %rax
movq %rax, 136(%rsp)
xorl %eax, %eax
leaq 24(%rsp), %rax
movq %rax, 96(%rsp)
leaq 16(%rsp), %rax
movq %rax, 104(%rsp)
leaq 8(%rsp), %rax
movq %rax, 112(%rsp)
leaq 4(%rsp), %rax
movq %rax, 120(%rsp)
movq %rsp, %rax
movq %rax, 128(%rsp)
movl $1, 48(%rsp)
movl $1, 52(%rsp)
movl $1, 56(%rsp)
movl $1, 60(%rsp)
movl $1, 64(%rsp)
movl $1, 68(%rsp)
leaq 40(%rsp), %rcx
leaq 32(%rsp), %rdx
leaq 60(%rsp), %rsi
leaq 48(%rsp), %rdi
call __cudaPopCallConfiguration@PLT
testl %eax, %eax
je .L42
.L38:
movq 136(%rsp), %rax
subq %fs:40, %rax
jne .L43
addq $152, %rsp
.cfi_remember_state
.cfi_def_cfa_offset 8
ret
.L42:
.cfi_restore_state
pushq 40(%rsp)
.cfi_def_cfa_offset 168
pushq 40(%rsp)
.cfi_def_cfa_offset 176
leaq 112(%rsp), %r9
movq 76(%rsp), %rcx
movl 84(%rsp), %r8d
movq 64(%rsp), %rsi
movl 72(%rsp), %edx
leaq _Z16sumMatrixOnGPU2DPfS_S_ii(%rip), %rdi
call cudaLaunchKernel@PLT
addq $16, %rsp
.cfi_def_cfa_offset 160
jmp .L38
.L43:
call __stack_chk_fail@PLT
.cfi_endproc
.LFE2087:
.size _Z42__device_stub__Z16sumMatrixOnGPU2DPfS_S_iiPfS_S_ii, .-_Z42__device_stub__Z16sumMatrixOnGPU2DPfS_S_iiPfS_S_ii
.globl _Z16sumMatrixOnGPU2DPfS_S_ii
.type _Z16sumMatrixOnGPU2DPfS_S_ii, @function
_Z16sumMatrixOnGPU2DPfS_S_ii:
.LFB2088:
.cfi_startproc
endbr64
subq $8, %rsp
.cfi_def_cfa_offset 16
call _Z42__device_stub__Z16sumMatrixOnGPU2DPfS_S_iiPfS_S_ii
addq $8, %rsp
.cfi_def_cfa_offset 8
ret
.cfi_endproc
.LFE2088:
.size _Z16sumMatrixOnGPU2DPfS_S_ii, .-_Z16sumMatrixOnGPU2DPfS_S_ii
.section .rodata.str1.1
.LC23:
.string "%s Starting...\n"
.LC24:
.string "There is no device.\n"
.section .rodata.str1.8
.align 8
.LC25:
.string "there is no device supporting CUDA 1.x. \n"
.align 8
.LC26:
.string "/home/ubuntu/Datasets/stackv2/train-structured/Sinclair-Dee/HPC-CUDA/master/Misc/llab1.cu"
.section .rodata.str1.1
.LC27:
.string "Error: %s:%d,"
.LC28:
.string "code:%d,reason:%s\n"
.LC29:
.string "Matrix size: %d\n"
.LC30:
.string "Matrix volume: %zu\n"
.LC31:
.string "malloc host memory:%lfs\n"
.LC32:
.string "initiaData spent time:%lfs\n"
.section .rodata.str1.8
.align 8
.LC33:
.string "sumArrayOnHost spent time:%lfs\n"
.align 8
.LC34:
.string "sumMatrixOnGPU2D <<<(%d,%d), (%d,%d)>>> elapsed %lf sec\n"
.text
.globl main
.type main, @function
main:
.LFB2062:
.cfi_startproc
endbr64
pushq %r13
.cfi_def_cfa_offset 16
.cfi_offset 13, -16
pushq %r12
.cfi_def_cfa_offset 24
.cfi_offset 12, -24
pushq %rbp
.cfi_def_cfa_offset 32
.cfi_offset 6, -32
pushq %rbx
.cfi_def_cfa_offset 40
.cfi_offset 3, -40
subq $1128, %rsp
.cfi_def_cfa_offset 1168
movq %fs:40, %rax
movq %rax, 1112(%rsp)
xorl %eax, %eax
movq (%rsi), %rdx
leaq .LC23(%rip), %rsi
movl $2, %edi
call __printf_chk@PLT
leaq 28(%rsp), %rdi
call cudaGetDeviceCount@PLT
movl 28(%rsp), %eax
testl %eax, %eax
je .L47
movl $0, %ebx
leaq 80(%rsp), %rbp
jg .L48
jmp .L49
.L47:
leaq .LC24(%rip), %rdx
movl $2, %esi
movq stderr(%rip), %rdi
movl $0, %eax
call __fprintf_chk@PLT
movl $1, %edi
call exit@PLT
.L50:
addl $1, %ebx
cmpl %ebx, 28(%rsp)
jle .L51
.L48:
movl %ebx, %esi
movq %rbp, %rdi
call cudaGetDeviceProperties_v2@PLT
testl %eax, %eax
jne .L50
cmpl $0, 440(%rsp)
jle .L50
leaq 80(%rsp), %rdi
call _Z15printDevicePropRK14cudaDeviceProp
.L51:
cmpl $0, 28(%rsp)
je .L59
.L49:
movl $0, %edi
call cudaSetDevice@PLT
movl %eax, %ebx
testl %eax, %eax
jne .L60
movl $16777216, %edx
leaq .LC29(%rip), %rsi
movl $2, %edi
movl $0, %eax
call __printf_chk@PLT
movl $67108864, %edx
leaq .LC30(%rip), %rsi
movl $2, %edi
movl $0, %eax
call __printf_chk@PLT
call _Z9cpuSecondv
movsd %xmm0, (%rsp)
movl $67108864, %edi
call malloc@PLT
movq %rax, %r13
movl $67108864, %edi
call malloc@PLT
movq %rax, %r12
movl $67108864, %edi
call malloc@PLT
movq %rax, %rbp
movl $67108864, %edi
call malloc@PLT
movq %rax, %rbx
call _Z9cpuSecondv
subsd (%rsp), %xmm0
leaq .LC31(%rip), %rsi
movl $2, %edi
movl $1, %eax
call __printf_chk@PLT
call _Z9cpuSecondv
movsd %xmm0, 8(%rsp)
movl $16777216, %esi
movq %r13, %rdi
call _Z10initiaDataPfi
movl $16777216, %esi
movq %r12, %rdi
call _Z10initiaDataPfi
call _Z9cpuSecondv
movsd %xmm0, (%rsp)
movl $67108864, %edx
movl $0, %esi
movq %rbp, %rdi
call memset@PLT
movl $67108864, %edx
movl $0, %esi
movq %rbx, %rdi
call memset@PLT
movsd (%rsp), %xmm1
subsd 8(%rsp), %xmm1
movapd %xmm1, %xmm0
leaq .LC32(%rip), %rsi
movl $2, %edi
movl $1, %eax
call __printf_chk@PLT
call _Z9cpuSecondv
movsd %xmm0, (%rsp)
movl $4096, %r8d
movl $4096, %ecx
movq %rbp, %rdx
movq %r12, %rsi
movq %r13, %rdi
call _Z15sumMatrixOnHostPfS_S_ii
call _Z9cpuSecondv
subsd (%rsp), %xmm0
leaq .LC33(%rip), %rsi
movl $2, %edi
movl $1, %eax
call __printf_chk@PLT
leaq 32(%rsp), %rdi
movl $67108864, %esi
call cudaMalloc@PLT
leaq 40(%rsp), %rdi
movl $67108864, %esi
call cudaMalloc@PLT
leaq 48(%rsp), %rdi
movl $67108864, %esi
call cudaMalloc@PLT
movl $1, %ecx
movl $67108864, %edx
movq %r13, %rsi
movq 32(%rsp), %rdi
call cudaMemcpy@PLT
movl $1, %ecx
movl $67108864, %edx
movq %r12, %rsi
movq 40(%rsp), %rdi
call cudaMemcpy@PLT
movl $1, 64(%rsp)
movl $1, 76(%rsp)
call _Z9cpuSecondv
movsd %xmm0, (%rsp)
movl $128, 68(%rsp)
movl $4096, 72(%rsp)
movl $32, 56(%rsp)
movl $1, 60(%rsp)
movl 64(%rsp), %ecx
movl $0, %r9d
movl $0, %r8d
movq 56(%rsp), %rdx
movq 68(%rsp), %rdi
movl 76(%rsp), %esi
call __cudaPushCallConfiguration@PLT
testl %eax, %eax
je .L61
.L53:
call cudaDeviceSynchronize@PLT
call _Z9cpuSecondv
subsd (%rsp), %xmm0
movl $1, %r9d
movl $32, %r8d
movl $4096, %ecx
movl $128, %edx
leaq .LC34(%rip), %rsi
movl $2, %edi
movl $1, %eax
call __printf_chk@PLT
movl $2, %ecx
movl $67108864, %edx
movq 48(%rsp), %rsi
movq %rbx, %rdi
call cudaMemcpy@PLT
movl $16777216, %edx
movq %rbx, %rsi
movq %rbp, %rdi
call _Z11checkResultPfS_i
movq 32(%rsp), %rdi
call cudaFree@PLT
movq 40(%rsp), %rdi
call cudaFree@PLT
movq 48(%rsp), %rdi
call cudaFree@PLT
movq %r13, %rdi
call free@PLT
movq %r12, %rdi
call free@PLT
movq %rbp, %rdi
call free@PLT
movq %rbx, %rdi
call free@PLT
call cudaDeviceReset@PLT
movq 1112(%rsp), %rax
subq %fs:40, %rax
jne .L62
movl $0, %eax
addq $1128, %rsp
.cfi_remember_state
.cfi_def_cfa_offset 40
popq %rbx
.cfi_def_cfa_offset 32
popq %rbp
.cfi_def_cfa_offset 24
popq %r12
.cfi_def_cfa_offset 16
popq %r13
.cfi_def_cfa_offset 8
ret
.L59:
.cfi_restore_state
leaq .LC25(%rip), %rdx
movl $2, %esi
movq stderr(%rip), %rdi
movl $0, %eax
call __fprintf_chk@PLT
jmp .L49
.L60:
movl $126, %ecx
leaq .LC26(%rip), %rdx
leaq .LC27(%rip), %rsi
movl $2, %edi
movl $0, %eax
call __printf_chk@PLT
movl %ebx, %edi
call cudaGetErrorString@PLT
movq %rax, %rcx
movl %ebx, %edx
leaq .LC28(%rip), %rsi
movl $2, %edi
movl $0, %eax
call __printf_chk@PLT
movl $1, %edi
call exit@PLT
.L61:
movl $4096, %r8d
movl $4096, %ecx
movq 48(%rsp), %rdx
movq 40(%rsp), %rsi
movq 32(%rsp), %rdi
call _Z42__device_stub__Z16sumMatrixOnGPU2DPfS_S_iiPfS_S_ii
jmp .L53
.L62:
call __stack_chk_fail@PLT
.cfi_endproc
.LFE2062:
.size main, .-main
.section .rodata.str1.1
.LC35:
.string "_Z16sumMatrixOnGPU2DPfS_S_ii"
.text
.type _ZL24__sti____cudaRegisterAllv, @function
_ZL24__sti____cudaRegisterAllv:
.LFB2090:
.cfi_startproc
endbr64
subq $8, %rsp
.cfi_def_cfa_offset 16
leaq _ZL15__fatDeviceText(%rip), %rdi
call __cudaRegisterFatBinary@PLT
movq %rax, %rdi
movq %rax, _ZL20__cudaFatCubinHandle(%rip)
pushq $0
.cfi_def_cfa_offset 24
pushq $0
.cfi_def_cfa_offset 32
pushq $0
.cfi_def_cfa_offset 40
pushq $0
.cfi_def_cfa_offset 48
movl $0, %r9d
movl $-1, %r8d
leaq .LC35(%rip), %rdx
movq %rdx, %rcx
leaq _Z16sumMatrixOnGPU2DPfS_S_ii(%rip), %rsi
call __cudaRegisterFunction@PLT
addq $32, %rsp
.cfi_def_cfa_offset 16
movq _ZL20__cudaFatCubinHandle(%rip), %rdi
call __cudaRegisterFatBinaryEnd@PLT
leaq _ZL26__cudaUnregisterBinaryUtilv(%rip), %rdi
call atexit@PLT
addq $8, %rsp
.cfi_def_cfa_offset 8
ret
.cfi_endproc
.LFE2090:
.size _ZL24__sti____cudaRegisterAllv, .-_ZL24__sti____cudaRegisterAllv
.section .init_array,"aw"
.align 8
.quad _ZL24__sti____cudaRegisterAllv
.section .nvFatBinSegment,"aw"
.align 8
.type _ZL15__fatDeviceText, @object
.size _ZL15__fatDeviceText, 24
_ZL15__fatDeviceText:
.long 1180844977
.long 1
.quad fatbinData
.quad 0
.local _ZL20__cudaFatCubinHandle
.comm _ZL20__cudaFatCubinHandle,8,8
.section .rodata.cst8,"aM",@progbits,8
.align 8
.LC0:
.long -1598689907
.long 1051772663
.section .rodata.cst16,"aM",@progbits,16
.align 16
.LC1:
.long 2147483647
.long 0
.long 0
.long 0
.section .rodata.cst8
.align 8
.LC2:
.long -500134854
.long 1044740494
.section .rodata.cst4,"aM",@progbits,4
.align 4
.LC6:
.long 1092616192
.ident "GCC: (Ubuntu 13.3.0-6ubuntu2~24.04) 13.3.0"
.section .note.GNU-stack,"",@progbits
.section .note.gnu.property,"a"
.align 8
.long 1f - 0f
.long 4f - 1f
.long 5
0:
.string "GNU"
1:
.align 8
.long 0xc0000002
.long 3f - 2f
2:
.long 0x3
3:
.align 8
4: | .text
.file "llab1.hip"
.section .rodata.cst8,"aM",@progbits,8
.p2align 3, 0x0 # -- Begin function _Z9cpuSecondv
.LCPI0_0:
.quad 0x3eb0c6f7a0b5ed8d # double 9.9999999999999995E-7
.text
.globl _Z9cpuSecondv
.p2align 4, 0x90
.type _Z9cpuSecondv,@function
_Z9cpuSecondv: # @_Z9cpuSecondv
.cfi_startproc
# %bb.0:
subq $24, %rsp
.cfi_def_cfa_offset 32
leaq 8(%rsp), %rdi
xorl %esi, %esi
callq gettimeofday
cvtsi2sdq 8(%rsp), %xmm1
cvtsi2sdq 16(%rsp), %xmm0
mulsd .LCPI0_0(%rip), %xmm0
addsd %xmm1, %xmm0
addq $24, %rsp
.cfi_def_cfa_offset 8
retq
.Lfunc_end0:
.size _Z9cpuSecondv, .Lfunc_end0-_Z9cpuSecondv
.cfi_endproc
# -- End function
.section .rodata.cst16,"aM",@progbits,16
.p2align 4, 0x0 # -- Begin function _Z11checkResultPfS_i
.LCPI1_0:
.long 0x7fffffff # float NaN
.long 0x7fffffff # float NaN
.long 0x7fffffff # float NaN
.long 0x7fffffff # float NaN
.section .rodata.cst8,"aM",@progbits,8
.p2align 3, 0x0
.LCPI1_1:
.quad 0x3e45798ee2308c3a # double 1.0E-8
.text
.globl _Z11checkResultPfS_i
.p2align 4, 0x90
.type _Z11checkResultPfS_i,@function
_Z11checkResultPfS_i: # @_Z11checkResultPfS_i
.cfi_startproc
# %bb.0:
pushq %r15
.cfi_def_cfa_offset 16
pushq %r14
.cfi_def_cfa_offset 24
pushq %rbx
.cfi_def_cfa_offset 32
.cfi_offset %rbx, -32
.cfi_offset %r14, -24
.cfi_offset %r15, -16
testl %edx, %edx
jle .LBB1_4
# %bb.1: # %.lr.ph.preheader
movl %edx, %eax
xorl %ebx, %ebx
movaps .LCPI1_0(%rip), %xmm0 # xmm0 = [NaN,NaN,NaN,NaN]
movsd .LCPI1_1(%rip), %xmm1 # xmm1 = mem[0],zero
.p2align 4, 0x90
.LBB1_2: # %.lr.ph
# =>This Inner Loop Header: Depth=1
movss (%rdi,%rbx,4), %xmm2 # xmm2 = mem[0],zero,zero,zero
subss (%rsi,%rbx,4), %xmm2
andps %xmm0, %xmm2
cvtss2sd %xmm2, %xmm2
ucomisd %xmm1, %xmm2
ja .LBB1_5
# %bb.3: # in Loop: Header=BB1_2 Depth=1
incq %rbx
cmpq %rbx, %rax
jne .LBB1_2
.LBB1_4: # %.critedge
movl $.Lstr.1, %edi
popq %rbx
.cfi_def_cfa_offset 24
popq %r14
.cfi_def_cfa_offset 16
popq %r15
.cfi_def_cfa_offset 8
jmp puts@PLT # TAILCALL
.LBB1_5:
.cfi_def_cfa_offset 32
movq %rdi, %r14
movl $.Lstr, %edi
movq %rsi, %r15
callq puts@PLT
movss (%r14,%rbx,4), %xmm0 # xmm0 = mem[0],zero,zero,zero
cvtss2sd %xmm0, %xmm0
movss (%r15,%rbx,4), %xmm1 # xmm1 = mem[0],zero,zero,zero
cvtss2sd %xmm1, %xmm1
movl $.L.str.1, %edi
movl %ebx, %esi
movb $2, %al
popq %rbx
.cfi_def_cfa_offset 24
popq %r14
.cfi_def_cfa_offset 16
popq %r15
.cfi_def_cfa_offset 8
jmp printf # TAILCALL
.Lfunc_end1:
.size _Z11checkResultPfS_i, .Lfunc_end1-_Z11checkResultPfS_i
.cfi_endproc
# -- End function
.section .rodata.cst4,"aM",@progbits,4
.p2align 2, 0x0 # -- Begin function _Z10initiaDataPfi
.LCPI2_0:
.long 0x41200000 # float 10
.text
.globl _Z10initiaDataPfi
.p2align 4, 0x90
.type _Z10initiaDataPfi,@function
_Z10initiaDataPfi: # @_Z10initiaDataPfi
.cfi_startproc
# %bb.0:
pushq %rbp
.cfi_def_cfa_offset 16
pushq %r15
.cfi_def_cfa_offset 24
pushq %r14
.cfi_def_cfa_offset 32
pushq %rbx
.cfi_def_cfa_offset 40
pushq %rax
.cfi_def_cfa_offset 48
.cfi_offset %rbx, -40
.cfi_offset %r14, -32
.cfi_offset %r15, -24
.cfi_offset %rbp, -16
movl %esi, %ebp
movq %rdi, %rbx
movq %rsp, %rdi
callq time
movl %eax, %edi
callq srand
testl %ebp, %ebp
jle .LBB2_3
# %bb.1: # %.lr.ph.preheader
movl %ebp, %r14d
xorl %r15d, %r15d
.p2align 4, 0x90
.LBB2_2: # %.lr.ph
# =>This Inner Loop Header: Depth=1
callq rand
movzbl %al, %eax
xorps %xmm0, %xmm0
cvtsi2ss %eax, %xmm0
divss .LCPI2_0(%rip), %xmm0
movss %xmm0, (%rbx,%r15,4)
incq %r15
cmpq %r15, %r14
jne .LBB2_2
.LBB2_3: # %._crit_edge
addq $8, %rsp
.cfi_def_cfa_offset 40
popq %rbx
.cfi_def_cfa_offset 32
popq %r14
.cfi_def_cfa_offset 24
popq %r15
.cfi_def_cfa_offset 16
popq %rbp
.cfi_def_cfa_offset 8
retq
.Lfunc_end2:
.size _Z10initiaDataPfi, .Lfunc_end2-_Z10initiaDataPfi
.cfi_endproc
# -- End function
.globl _Z15sumMatrixOnHostPfS_S_ii # -- Begin function _Z15sumMatrixOnHostPfS_S_ii
.p2align 4, 0x90
.type _Z15sumMatrixOnHostPfS_S_ii,@function
_Z15sumMatrixOnHostPfS_S_ii: # @_Z15sumMatrixOnHostPfS_S_ii
.cfi_startproc
# %bb.0:
testl %r8d, %r8d
jle .LBB3_7
# %bb.1: # %.preheader.lr.ph
pushq %r15
.cfi_def_cfa_offset 16
pushq %r14
.cfi_def_cfa_offset 24
pushq %rbx
.cfi_def_cfa_offset 32
.cfi_offset %rbx, -32
.cfi_offset %r14, -24
.cfi_offset %r15, -16
movl %r8d, %eax
movl %ecx, %r8d
xorl %r9d, %r9d
xorl %r10d, %r10d
jmp .LBB3_2
.p2align 4, 0x90
.LBB3_5: # %._crit_edge
# in Loop: Header=BB3_2 Depth=1
incq %r10
addl %ecx, %r9d
cmpq %rax, %r10
je .LBB3_6
.LBB3_2: # %.preheader
# =>This Loop Header: Depth=1
# Child Loop BB3_4 Depth 2
testl %ecx, %ecx
jle .LBB3_5
# %bb.3: # %.lr.ph
# in Loop: Header=BB3_2 Depth=1
movl %r9d, %r14d
leaq (%rdx,%r14,4), %r11
leaq (%rsi,%r14,4), %rbx
leaq (%rdi,%r14,4), %r14
xorl %r15d, %r15d
.p2align 4, 0x90
.LBB3_4: # Parent Loop BB3_2 Depth=1
# => This Inner Loop Header: Depth=2
movss (%r14,%r15,4), %xmm0 # xmm0 = mem[0],zero,zero,zero
addss (%rbx,%r15,4), %xmm0
movss %xmm0, (%r11,%r15,4)
incq %r15
cmpq %r15, %r8
jne .LBB3_4
jmp .LBB3_5
.LBB3_6:
popq %rbx
.cfi_def_cfa_offset 24
popq %r14
.cfi_def_cfa_offset 16
popq %r15
.cfi_def_cfa_offset 8
.cfi_restore %rbx
.cfi_restore %r14
.cfi_restore %r15
.LBB3_7: # %._crit_edge21
retq
.Lfunc_end3:
.size _Z15sumMatrixOnHostPfS_S_ii, .Lfunc_end3-_Z15sumMatrixOnHostPfS_S_ii
.cfi_endproc
# -- End function
.globl _Z31__device_stub__sumMatrixOnGPU2DPfS_S_ii # -- Begin function _Z31__device_stub__sumMatrixOnGPU2DPfS_S_ii
.p2align 4, 0x90
.type _Z31__device_stub__sumMatrixOnGPU2DPfS_S_ii,@function
_Z31__device_stub__sumMatrixOnGPU2DPfS_S_ii: # @_Z31__device_stub__sumMatrixOnGPU2DPfS_S_ii
.cfi_startproc
# %bb.0:
subq $120, %rsp
.cfi_def_cfa_offset 128
movq %rdi, 72(%rsp)
movq %rsi, 64(%rsp)
movq %rdx, 56(%rsp)
movl %ecx, 4(%rsp)
movl %r8d, (%rsp)
leaq 72(%rsp), %rax
movq %rax, 80(%rsp)
leaq 64(%rsp), %rax
movq %rax, 88(%rsp)
leaq 56(%rsp), %rax
movq %rax, 96(%rsp)
leaq 4(%rsp), %rax
movq %rax, 104(%rsp)
movq %rsp, %rax
movq %rax, 112(%rsp)
leaq 40(%rsp), %rdi
leaq 24(%rsp), %rsi
leaq 16(%rsp), %rdx
leaq 8(%rsp), %rcx
callq __hipPopCallConfiguration
movq 40(%rsp), %rsi
movl 48(%rsp), %edx
movq 24(%rsp), %rcx
movl 32(%rsp), %r8d
leaq 80(%rsp), %r9
movl $_Z16sumMatrixOnGPU2DPfS_S_ii, %edi
pushq 8(%rsp)
.cfi_adjust_cfa_offset 8
pushq 24(%rsp)
.cfi_adjust_cfa_offset 8
callq hipLaunchKernel
addq $136, %rsp
.cfi_adjust_cfa_offset -136
retq
.Lfunc_end4:
.size _Z31__device_stub__sumMatrixOnGPU2DPfS_S_ii, .Lfunc_end4-_Z31__device_stub__sumMatrixOnGPU2DPfS_S_ii
.cfi_endproc
# -- End function
.globl _Z15printDevicePropRK20hipDeviceProp_tR0600 # -- Begin function _Z15printDevicePropRK20hipDeviceProp_tR0600
.p2align 4, 0x90
.type _Z15printDevicePropRK20hipDeviceProp_tR0600,@function
_Z15printDevicePropRK20hipDeviceProp_tR0600: # @_Z15printDevicePropRK20hipDeviceProp_tR0600
.cfi_startproc
# %bb.0:
pushq %rbx
.cfi_def_cfa_offset 16
.cfi_offset %rbx, -16
movq %rdi, %rbx
movl $.L.str.3, %edi
movq %rbx, %rsi
xorl %eax, %eax
callq printf
movq 288(%rbx), %rsi
movl $.L.str.4, %edi
xorl %eax, %eax
callq printf
movq 296(%rbx), %rsi
movl $.L.str.5, %edi
xorl %eax, %eax
callq printf
movl 304(%rbx), %esi
movl $.L.str.6, %edi
xorl %eax, %eax
callq printf
movl 308(%rbx), %esi
movl $.L.str.7, %edi
xorl %eax, %eax
callq printf
movq 312(%rbx), %rsi
movl $.L.str.8, %edi
xorl %eax, %eax
callq printf
movl 320(%rbx), %esi
movl $.L.str.9, %edi
xorl %eax, %eax
callq printf
movl 324(%rbx), %esi
movl 328(%rbx), %edx
movl 332(%rbx), %ecx
movl $.L.str.10, %edi
xorl %eax, %eax
callq printf
movl 336(%rbx), %esi
movl 340(%rbx), %edx
movl 344(%rbx), %ecx
movl $.L.str.11, %edi
xorl %eax, %eax
callq printf
movq 352(%rbx), %rsi
movl $.L.str.12, %edi
xorl %eax, %eax
callq printf
movl 360(%rbx), %esi
movl 364(%rbx), %edx
movl $.L.str.13, %edi
xorl %eax, %eax
callq printf
movl 348(%rbx), %esi
movl $.L.str.14, %edi
xorl %eax, %eax
callq printf
movq 368(%rbx), %rsi
movl $.L.str.15, %edi
xorl %eax, %eax
callq printf
movl 384(%rbx), %esi
movl $.L.str.16, %edi
xorl %eax, %eax
callq printf
movl 388(%rbx), %esi
movl $.L.str.17, %edi
xorl %eax, %eax
callq printf
movl $.Lstr.2, %edi
popq %rbx
.cfi_def_cfa_offset 8
jmp puts@PLT # TAILCALL
.Lfunc_end5:
.size _Z15printDevicePropRK20hipDeviceProp_tR0600, .Lfunc_end5-_Z15printDevicePropRK20hipDeviceProp_tR0600
.cfi_endproc
# -- End function
.section .rodata.cst8,"aM",@progbits,8
.p2align 3, 0x0 # -- Begin function main
.LCPI6_0:
.quad 0x3eb0c6f7a0b5ed8d # double 9.9999999999999995E-7
.LCPI6_3:
.quad 0x3e45798ee2308c3a # double 1.0E-8
.section .rodata.cst4,"aM",@progbits,4
.p2align 2, 0x0
.LCPI6_1:
.long 0x41200000 # float 10
.section .rodata.cst16,"aM",@progbits,16
.p2align 4, 0x0
.LCPI6_2:
.long 0x7fffffff # float NaN
.long 0x7fffffff # float NaN
.long 0x7fffffff # float NaN
.long 0x7fffffff # float NaN
.text
.globl main
.p2align 4, 0x90
.type main,@function
main: # @main
.cfi_startproc
# %bb.0:
pushq %rbp
.cfi_def_cfa_offset 16
pushq %r15
.cfi_def_cfa_offset 24
pushq %r14
.cfi_def_cfa_offset 32
pushq %r13
.cfi_def_cfa_offset 40
pushq %r12
.cfi_def_cfa_offset 48
pushq %rbx
.cfi_def_cfa_offset 56
subq $1608, %rsp # imm = 0x648
.cfi_def_cfa_offset 1664
.cfi_offset %rbx, -56
.cfi_offset %r12, -48
.cfi_offset %r13, -40
.cfi_offset %r14, -32
.cfi_offset %r15, -24
.cfi_offset %rbp, -16
movq (%rsi), %rsi
movl $.L.str.19, %edi
xorl %eax, %eax
callq printf
leaq 12(%rsp), %rdi
callq hipGetDeviceCount
cmpl $0, 12(%rsp)
je .LBB6_26
# %bb.1: # %.preheader
cmpl $0, 12(%rsp)
jle .LBB6_7
# %bb.2: # %.lr.ph
xorl %ebx, %ebx
leaq 128(%rsp), %r14
jmp .LBB6_3
.p2align 4, 0x90
.LBB6_6: # %.critedge
# in Loop: Header=BB6_3 Depth=1
incl %ebx
cmpl 12(%rsp), %ebx
jge .LBB6_7
.LBB6_3: # =>This Inner Loop Header: Depth=1
movq %r14, %rdi
movl %ebx, %esi
callq hipGetDevicePropertiesR0600
testl %eax, %eax
jne .LBB6_6
# %bb.4: # in Loop: Header=BB6_3 Depth=1
cmpl $0, 488(%rsp)
jle .LBB6_6
# %bb.5:
leaq 128(%rsp), %rdi
callq _Z15printDevicePropRK20hipDeviceProp_tR0600
.LBB6_7: # %.loopexit
cmpl $0, 12(%rsp)
je .LBB6_8
.LBB6_9:
xorl %edi, %edi
callq hipSetDevice
testl %eax, %eax
jne .LBB6_27
# %bb.10:
xorl %r13d, %r13d
movl $.L.str.25, %edi
movl $16777216, %esi # imm = 0x1000000
xorl %eax, %eax
callq printf
movl $.L.str.26, %edi
movl $67108864, %esi # imm = 0x4000000
xorl %eax, %eax
callq printf
leaq 128(%rsp), %rdi
xorl %esi, %esi
callq gettimeofday
cvtsi2sdq 128(%rsp), %xmm0
cvtsi2sdq 136(%rsp), %xmm1
mulsd .LCPI6_0(%rip), %xmm1
addsd %xmm0, %xmm1
movsd %xmm1, (%rsp) # 8-byte Spill
movl $67108864, %edi # imm = 0x4000000
callq malloc
movq %rax, %rbx
movl $67108864, %edi # imm = 0x4000000
callq malloc
movq %rax, %r14
movl $67108864, %edi # imm = 0x4000000
callq malloc
movq %rax, %r15
movl $67108864, %edi # imm = 0x4000000
callq malloc
movq %rax, %r12
leaq 128(%rsp), %rdi
xorl %esi, %esi
callq gettimeofday
xorps %xmm1, %xmm1
cvtsi2sdq 128(%rsp), %xmm1
xorps %xmm0, %xmm0
cvtsi2sdq 136(%rsp), %xmm0
mulsd .LCPI6_0(%rip), %xmm0
addsd %xmm1, %xmm0
subsd (%rsp), %xmm0 # 8-byte Folded Reload
movl $.L.str.27, %edi
movb $1, %al
callq printf
leaq 128(%rsp), %rdi
xorl %esi, %esi
callq gettimeofday
movq 128(%rsp), %rbp
xorps %xmm0, %xmm0
cvtsi2sdq 136(%rsp), %xmm0
mulsd .LCPI6_0(%rip), %xmm0
movsd %xmm0, (%rsp) # 8-byte Spill
leaq 128(%rsp), %rdi
callq time
movl %eax, %edi
callq srand
.p2align 4, 0x90
.LBB6_11: # %.lr.ph.i
# =>This Inner Loop Header: Depth=1
callq rand
movzbl %al, %eax
xorps %xmm0, %xmm0
cvtsi2ss %eax, %xmm0
divss .LCPI6_1(%rip), %xmm0
movss %xmm0, (%rbx,%r13,4)
incq %r13
cmpq $16777216, %r13 # imm = 0x1000000
jne .LBB6_11
# %bb.12: # %_Z10initiaDataPfi.exit
xorps %xmm0, %xmm0
cvtsi2sd %rbp, %xmm0
movsd %xmm0, 48(%rsp) # 8-byte Spill
leaq 128(%rsp), %rdi
callq time
movl %eax, %edi
callq srand
xorl %r13d, %r13d
.p2align 4, 0x90
.LBB6_13: # %.lr.ph.i74
# =>This Inner Loop Header: Depth=1
callq rand
movzbl %al, %eax
xorps %xmm0, %xmm0
cvtsi2ss %eax, %xmm0
divss .LCPI6_1(%rip), %xmm0
movss %xmm0, (%r14,%r13,4)
incq %r13
cmpq $16777216, %r13 # imm = 0x1000000
jne .LBB6_13
# %bb.14: # %_Z10initiaDataPfi.exit78
movsd (%rsp), %xmm0 # 8-byte Reload
# xmm0 = mem[0],zero
addsd 48(%rsp), %xmm0 # 8-byte Folded Reload
movsd %xmm0, (%rsp) # 8-byte Spill
xorl %r13d, %r13d
leaq 128(%rsp), %rdi
xorl %esi, %esi
callq gettimeofday
xorps %xmm0, %xmm0
cvtsi2sdq 128(%rsp), %xmm0
cvtsi2sdq 136(%rsp), %xmm2
movsd .LCPI6_0(%rip), %xmm1 # xmm1 = mem[0],zero
mulsd %xmm1, %xmm2
addsd %xmm0, %xmm2
subsd (%rsp), %xmm2 # 8-byte Folded Reload
movsd %xmm2, (%rsp) # 8-byte Spill
movl $67108864, %edx # imm = 0x4000000
movq %r15, %rdi
xorl %esi, %esi
callq memset@PLT
movl $67108864, %edx # imm = 0x4000000
movq %r12, %rdi
xorl %esi, %esi
callq memset@PLT
movl $.L.str.28, %edi
movsd (%rsp), %xmm0 # 8-byte Reload
# xmm0 = mem[0],zero
movb $1, %al
callq printf
leaq 128(%rsp), %rdi
xorl %esi, %esi
callq gettimeofday
movq 128(%rsp), %rax
xorps %xmm1, %xmm1
cvtsi2sdq 136(%rsp), %xmm1
mulsd .LCPI6_0(%rip), %xmm1
movq %rbx, %rcx
movq %r14, %rdx
movq %r15, %rsi
.p2align 4, 0x90
.LBB6_15: # %.preheader.i
# =>This Loop Header: Depth=1
# Child Loop BB6_16 Depth 2
xorl %edi, %edi
.p2align 4, 0x90
.LBB6_16: # Parent Loop BB6_15 Depth=1
# => This Inner Loop Header: Depth=2
movss (%rcx,%rdi,4), %xmm0 # xmm0 = mem[0],zero,zero,zero
addss (%rdx,%rdi,4), %xmm0
movss %xmm0, (%rsi,%rdi,4)
incq %rdi
cmpq $4096, %rdi # imm = 0x1000
jne .LBB6_16
# %bb.17: # %._crit_edge.i
# in Loop: Header=BB6_15 Depth=1
incq %r13
addq $16384, %rsi # imm = 0x4000
addq $16384, %rdx # imm = 0x4000
addq $16384, %rcx # imm = 0x4000
cmpq $4096, %r13 # imm = 0x1000
jne .LBB6_15
# %bb.18: # %_Z15sumMatrixOnHostPfS_S_ii.exit
xorps %xmm0, %xmm0
cvtsi2sd %rax, %xmm0
addsd %xmm0, %xmm1
movsd %xmm1, (%rsp) # 8-byte Spill
leaq 128(%rsp), %rdi
xorl %esi, %esi
callq gettimeofday
xorps %xmm1, %xmm1
cvtsi2sdq 128(%rsp), %xmm1
xorps %xmm0, %xmm0
cvtsi2sdq 136(%rsp), %xmm0
movsd .LCPI6_0(%rip), %xmm2 # xmm2 = mem[0],zero
mulsd %xmm2, %xmm0
addsd %xmm1, %xmm0
subsd (%rsp), %xmm0 # 8-byte Folded Reload
movl $.L.str.29, %edi
movb $1, %al
callq printf
leaq 32(%rsp), %rdi
movl $67108864, %esi # imm = 0x4000000
callq hipMalloc
leaq 24(%rsp), %rdi
movl $67108864, %esi # imm = 0x4000000
callq hipMalloc
leaq 16(%rsp), %rdi
movl $67108864, %esi # imm = 0x4000000
callq hipMalloc
movq 32(%rsp), %rdi
movl $67108864, %edx # imm = 0x4000000
movq %rbx, %rsi
movl $1, %ecx
callq hipMemcpy
movq 24(%rsp), %rdi
movl $67108864, %edx # imm = 0x4000000
movq %r14, %rsi
movl $1, %ecx
callq hipMemcpy
leaq 128(%rsp), %rdi
xorl %esi, %esi
callq gettimeofday
xorps %xmm0, %xmm0
cvtsi2sdq 128(%rsp), %xmm0
xorps %xmm1, %xmm1
cvtsi2sdq 136(%rsp), %xmm1
mulsd .LCPI6_0(%rip), %xmm1
addsd %xmm0, %xmm1
movsd %xmm1, (%rsp) # 8-byte Spill
movabsq $17592186044544, %rdi # imm = 0x100000000080
movabsq $4294967328, %rdx # imm = 0x100000020
movl $1, %esi
movl $1, %ecx
xorl %r8d, %r8d
xorl %r9d, %r9d
callq __hipPushCallConfiguration
testl %eax, %eax
jne .LBB6_20
# %bb.19:
movq 32(%rsp), %rax
movq 24(%rsp), %rcx
movq 16(%rsp), %rdx
movq %rax, 120(%rsp)
movq %rcx, 112(%rsp)
movq %rdx, 104(%rsp)
movl $4096, 44(%rsp) # imm = 0x1000
movl $4096, 40(%rsp) # imm = 0x1000
leaq 120(%rsp), %rax
movq %rax, 128(%rsp)
leaq 112(%rsp), %rax
movq %rax, 136(%rsp)
leaq 104(%rsp), %rax
movq %rax, 144(%rsp)
leaq 44(%rsp), %rax
movq %rax, 152(%rsp)
leaq 40(%rsp), %rax
movq %rax, 160(%rsp)
leaq 88(%rsp), %rdi
leaq 72(%rsp), %rsi
leaq 64(%rsp), %rdx
leaq 56(%rsp), %rcx
callq __hipPopCallConfiguration
movq 88(%rsp), %rsi
movl 96(%rsp), %edx
movq 72(%rsp), %rcx
movl 80(%rsp), %r8d
leaq 128(%rsp), %r9
movl $_Z16sumMatrixOnGPU2DPfS_S_ii, %edi
pushq 56(%rsp)
.cfi_adjust_cfa_offset 8
pushq 72(%rsp)
.cfi_adjust_cfa_offset 8
callq hipLaunchKernel
addq $16, %rsp
.cfi_adjust_cfa_offset -16
.LBB6_20:
callq hipDeviceSynchronize
xorl %r13d, %r13d
leaq 128(%rsp), %rdi
xorl %esi, %esi
callq gettimeofday
xorps %xmm1, %xmm1
cvtsi2sdq 128(%rsp), %xmm1
xorps %xmm0, %xmm0
cvtsi2sdq 136(%rsp), %xmm0
mulsd .LCPI6_0(%rip), %xmm0
addsd %xmm1, %xmm0
subsd (%rsp), %xmm0 # 8-byte Folded Reload
movl $.L.str.30, %edi
movl $128, %esi
movl $4096, %edx # imm = 0x1000
movl $32, %ecx
movl $1, %r8d
movb $1, %al
callq printf
movq 16(%rsp), %rsi
movl $67108864, %edx # imm = 0x4000000
movq %r12, %rdi
movl $2, %ecx
callq hipMemcpy
movaps .LCPI6_2(%rip), %xmm0 # xmm0 = [NaN,NaN,NaN,NaN]
movsd .LCPI6_3(%rip), %xmm1 # xmm1 = mem[0],zero
.p2align 4, 0x90
.LBB6_21: # %.lr.ph.i83
# =>This Inner Loop Header: Depth=1
movss (%r15,%r13,4), %xmm3 # xmm3 = mem[0],zero,zero,zero
movaps %xmm3, %xmm2
subss (%r12,%r13,4), %xmm2
andps %xmm0, %xmm2
cvtss2sd %xmm2, %xmm2
ucomisd %xmm1, %xmm2
ja .LBB6_22
# %bb.23: # in Loop: Header=BB6_21 Depth=1
incq %r13
cmpq $16777216, %r13 # imm = 0x1000000
jne .LBB6_21
# %bb.24: # %.critedge.i
movl $.Lstr.1, %edi
callq puts@PLT
jmp .LBB6_25
.LBB6_22:
movl $.Lstr, %edi
movss %xmm3, (%rsp) # 4-byte Spill
callq puts@PLT
movss (%rsp), %xmm0 # 4-byte Reload
# xmm0 = mem[0],zero,zero,zero
cvtss2sd %xmm0, %xmm0
movss (%r12,%r13,4), %xmm1 # xmm1 = mem[0],zero,zero,zero
cvtss2sd %xmm1, %xmm1
movl $.L.str.1, %edi
movl %r13d, %esi
movb $2, %al
callq printf
.LBB6_25: # %_Z11checkResultPfS_i.exit
movq 32(%rsp), %rdi
callq hipFree
movq 24(%rsp), %rdi
callq hipFree
movq 16(%rsp), %rdi
callq hipFree
movq %rbx, %rdi
callq free
movq %r14, %rdi
callq free
movq %r15, %rdi
callq free
movq %r12, %rdi
callq free
callq hipDeviceReset
xorl %eax, %eax
addq $1608, %rsp # imm = 0x648
.cfi_def_cfa_offset 56
popq %rbx
.cfi_def_cfa_offset 48
popq %r12
.cfi_def_cfa_offset 40
popq %r13
.cfi_def_cfa_offset 32
popq %r14
.cfi_def_cfa_offset 24
popq %r15
.cfi_def_cfa_offset 16
popq %rbp
.cfi_def_cfa_offset 8
retq
.LBB6_8:
.cfi_def_cfa_offset 1664
movq stderr(%rip), %rcx
movl $.L.str.21, %edi
movl $41, %esi
movl $1, %edx
callq fwrite@PLT
jmp .LBB6_9
.LBB6_26:
movq stderr(%rip), %rcx
movl $.L.str.20, %edi
movl $20, %esi
movl $1, %edx
callq fwrite@PLT
movl $1, %edi
callq exit
.LBB6_27:
movl $.L.str.22, %edi
movl $.L.str.23, %esi
movl $126, %edx
movl %eax, %ebx
xorl %eax, %eax
callq printf
movl %ebx, %edi
callq hipGetErrorString
movl $.L.str.24, %edi
movl %ebx, %esi
movq %rax, %rdx
xorl %eax, %eax
callq printf
movl $1, %edi
callq exit
.Lfunc_end6:
.size main, .Lfunc_end6-main
.cfi_endproc
# -- End function
.p2align 4, 0x90 # -- Begin function __hip_module_ctor
.type __hip_module_ctor,@function
__hip_module_ctor: # @__hip_module_ctor
.cfi_startproc
# %bb.0:
subq $40, %rsp
.cfi_def_cfa_offset 48
cmpq $0, __hip_gpubin_handle(%rip)
jne .LBB7_2
# %bb.1:
movl $__hip_fatbin_wrapper, %edi
callq __hipRegisterFatBinary
movq %rax, __hip_gpubin_handle(%rip)
.LBB7_2:
movq __hip_gpubin_handle(%rip), %rdi
xorps %xmm0, %xmm0
movups %xmm0, 16(%rsp)
movups %xmm0, (%rsp)
movl $_Z16sumMatrixOnGPU2DPfS_S_ii, %esi
movl $.L__unnamed_1, %edx
movl $.L__unnamed_1, %ecx
movl $-1, %r8d
xorl %r9d, %r9d
callq __hipRegisterFunction
movl $__hip_module_dtor, %edi
addq $40, %rsp
.cfi_def_cfa_offset 8
jmp atexit # TAILCALL
.Lfunc_end7:
.size __hip_module_ctor, .Lfunc_end7-__hip_module_ctor
.cfi_endproc
# -- End function
.p2align 4, 0x90 # -- Begin function __hip_module_dtor
.type __hip_module_dtor,@function
__hip_module_dtor: # @__hip_module_dtor
.cfi_startproc
# %bb.0:
movq __hip_gpubin_handle(%rip), %rdi
testq %rdi, %rdi
je .LBB8_2
# %bb.1:
pushq %rax
.cfi_def_cfa_offset 16
callq __hipUnregisterFatBinary
movq $0, __hip_gpubin_handle(%rip)
addq $8, %rsp
.cfi_def_cfa_offset 8
.LBB8_2:
retq
.Lfunc_end8:
.size __hip_module_dtor, .Lfunc_end8-__hip_module_dtor
.cfi_endproc
# -- End function
.type .L.str.1,@object # @.str.1
.section .rodata.str1.1,"aMS",@progbits,1
.L.str.1:
.asciz "host %5.6f gpu %5.6f at current %d\n"
.size .L.str.1, 36
.type _Z16sumMatrixOnGPU2DPfS_S_ii,@object # @_Z16sumMatrixOnGPU2DPfS_S_ii
.section .rodata,"a",@progbits
.globl _Z16sumMatrixOnGPU2DPfS_S_ii
.p2align 3, 0x0
_Z16sumMatrixOnGPU2DPfS_S_ii:
.quad _Z31__device_stub__sumMatrixOnGPU2DPfS_S_ii
.size _Z16sumMatrixOnGPU2DPfS_S_ii, 8
.type .L.str.3,@object # @.str.3
.section .rodata.str1.1,"aMS",@progbits,1
.L.str.3:
.asciz "Device Name : %s.\n"
.size .L.str.3, 19
.type .L.str.4,@object # @.str.4
.L.str.4:
.asciz "totalGlobalMem : %ld.\n"
.size .L.str.4, 23
.type .L.str.5,@object # @.str.5
.L.str.5:
.asciz "sharedMemPerBlock : %ld.\n"
.size .L.str.5, 26
.type .L.str.6,@object # @.str.6
.L.str.6:
.asciz "regsPerBlock : %d.\n"
.size .L.str.6, 20
.type .L.str.7,@object # @.str.7
.L.str.7:
.asciz "warpSize : %d.\n"
.size .L.str.7, 16
.type .L.str.8,@object # @.str.8
.L.str.8:
.asciz "memPitch : %ld.\n"
.size .L.str.8, 17
.type .L.str.9,@object # @.str.9
.L.str.9:
.asciz "maxThreadsPerBlock : %d.\n"
.size .L.str.9, 26
.type .L.str.10,@object # @.str.10
.L.str.10:
.asciz "maxThreadsDim[0 - 2] : %d %d %d.\n"
.size .L.str.10, 34
.type .L.str.11,@object # @.str.11
.L.str.11:
.asciz "maxGridSize[0 - 2] : %d %d %d.\n"
.size .L.str.11, 32
.type .L.str.12,@object # @.str.12
.L.str.12:
.asciz "totalConstMem : %ld.\n"
.size .L.str.12, 22
.type .L.str.13,@object # @.str.13
.L.str.13:
.asciz "major.minor : %d.%d.\n"
.size .L.str.13, 22
.type .L.str.14,@object # @.str.14
.L.str.14:
.asciz "clockRate : %d.\n"
.size .L.str.14, 17
.type .L.str.15,@object # @.str.15
.L.str.15:
.asciz "textureAlignment : %ld.\n"
.size .L.str.15, 25
.type .L.str.16,@object # @.str.16
.L.str.16:
.asciz "deviceOverlap : %d.\n"
.size .L.str.16, 21
.type .L.str.17,@object # @.str.17
.L.str.17:
.asciz "multiProcessorCount : %d.\n"
.size .L.str.17, 27
.type .L.str.19,@object # @.str.19
.L.str.19:
.asciz "%s Starting...\n"
.size .L.str.19, 16
.type .L.str.20,@object # @.str.20
.L.str.20:
.asciz "There is no device.\n"
.size .L.str.20, 21
.type .L.str.21,@object # @.str.21
.L.str.21:
.asciz "there is no device supporting CUDA 1.x. \n"
.size .L.str.21, 42
.type .L.str.22,@object # @.str.22
.L.str.22:
.asciz "Error: %s:%d,"
.size .L.str.22, 14
.type .L.str.23,@object # @.str.23
.L.str.23:
.asciz "/home/ubuntu/Datasets/stackv2/train-structured-repos-hip/Sinclair-Dee/HPC-CUDA/master/Misc/llab1.hip"
.size .L.str.23, 101
.type .L.str.24,@object # @.str.24
.L.str.24:
.asciz "code:%d,reason:%s\n"
.size .L.str.24, 19
.type .L.str.25,@object # @.str.25
.L.str.25:
.asciz "Matrix size: %d\n"
.size .L.str.25, 17
.type .L.str.26,@object # @.str.26
.L.str.26:
.asciz "Matrix volume: %zu\n"
.size .L.str.26, 20
.type .L.str.27,@object # @.str.27
.L.str.27:
.asciz "malloc host memory:%lfs\n"
.size .L.str.27, 25
.type .L.str.28,@object # @.str.28
.L.str.28:
.asciz "initiaData spent time:%lfs\n"
.size .L.str.28, 28
.type .L.str.29,@object # @.str.29
.L.str.29:
.asciz "sumArrayOnHost spent time:%lfs\n"
.size .L.str.29, 32
.type .L.str.30,@object # @.str.30
.L.str.30:
.asciz "sumMatrixOnGPU2D <<<(%d,%d), (%d,%d)>>> elapsed %lf sec\n"
.size .L.str.30, 57
.type .L__unnamed_1,@object # @0
.L__unnamed_1:
.asciz "_Z16sumMatrixOnGPU2DPfS_S_ii"
.size .L__unnamed_1, 29
.type __hip_fatbin_wrapper,@object # @__hip_fatbin_wrapper
.section .hipFatBinSegment,"a",@progbits
.p2align 3, 0x0
__hip_fatbin_wrapper:
.long 1212764230 # 0x48495046
.long 1 # 0x1
.quad __hip_fatbin
.quad 0
.size __hip_fatbin_wrapper, 24
.type __hip_gpubin_handle,@object # @__hip_gpubin_handle
.local __hip_gpubin_handle
.comm __hip_gpubin_handle,8,8
.section .init_array,"aw",@init_array
.p2align 3, 0x0
.quad __hip_module_ctor
.type __hip_cuid_,@object # @__hip_cuid_
.bss
.globl __hip_cuid_
__hip_cuid_:
.byte 0 # 0x0
.size __hip_cuid_, 1
.type .Lstr,@object # @str
.section .rodata.str1.1,"aMS",@progbits,1
.Lstr:
.asciz "Arrays do not match!"
.size .Lstr, 21
.type .Lstr.1,@object # @str.1
.Lstr.1:
.asciz "Arrays match .\n"
.size .Lstr.1, 16
.type .Lstr.2,@object # @str.2
.Lstr.2:
.asciz "\n\n"
.size .Lstr.2, 3
.section ".linker-options","e",@llvm_linker_options
.ident "AMD clang version 18.0.0git (https://github.com/RadeonOpenCompute/llvm-project roc-6.3.2 25012 e5bf7e55c91490b07c49d8960fa7983d864936c4)"
.section ".note.GNU-stack","",@progbits
.addrsig
.addrsig_sym _Z31__device_stub__sumMatrixOnGPU2DPfS_S_ii
.addrsig_sym __hip_module_ctor
.addrsig_sym __hip_module_dtor
.addrsig_sym _Z16sumMatrixOnGPU2DPfS_S_ii
.addrsig_sym __hip_fatbin
.addrsig_sym __hip_fatbin_wrapper
.addrsig_sym __hip_cuid_ |
You are a helpful coding assistant specialized in converting CUDA source code to CUDA host assembly. | __global__ void getSumSquares(float* X, float* XSqr, int dim, int dimpow2) {
extern __shared__ float x[];
int i, k;
int offset = blockIdx.x*dim;
int jump = dimpow2;
int sumjump = jump >> 1;
//Step 0: Figure out K (number of batches per block)
int K = dimpow2 >> 9;
if (K == 0) {
K = 1;
}
if (jump > 512) {
jump = 512;
}
//Step 1: Copy over each row to shared memory
//and square in the process
for (k = 0; k < K; k++) {
i = k*jump + threadIdx.x;
if (i < dim) {
x[i] = X[offset + i]*X[offset + i];
}
else if (i < dimpow2) {
x[i] = 0.0;
}
}
__syncthreads();
//Step 2: Perform sums
while (sumjump > 0) {
if (threadIdx.x < sumjump) {
K = sumjump >> 9;
if (K == 0) {
K = 1;
}
jump = sumjump;
if (jump > 512) {
jump = 512;
}
for (k = 0; k < K; k++) {
i = k*jump + threadIdx.x;
x[i] += x[i + sumjump];
}
}
sumjump = sumjump >> 1;
__syncthreads();
}
//Step 3: Copy back results
XSqr[blockIdx.x] = x[0];
}
//CSM is N x M
__global__ void finishCSM(float* CSM, float* XSqr, float* YSqr, int N, int M, int MPow2) {
int offset = blockIdx.x*M;
int K = MPow2 >> 9;
int i;
int k, jump = MPow2;
float val = 0.0;
if (K == 0) {
K = 1;
}
if (jump > 512) {
jump = 512;
}
for (k = 0; k < K; k++) {
i = k*jump + threadIdx.x;
if (i < M) {
val = XSqr[i] + YSqr[blockIdx.x];
val = val - 2*CSM[offset + i];
if (val < 0) {
val = 0;
}
CSM[offset + i] = sqrt(val);
}
}
} | .file "tmpxft_0019f50d_00000000-6_CSMHelper.cudafe1.cpp"
.text
#APP
#NO_APP
.type _ZL26__cudaUnregisterBinaryUtilv, @function
_ZL26__cudaUnregisterBinaryUtilv:
.LFB2029:
.cfi_startproc
endbr64
subq $8, %rsp
.cfi_def_cfa_offset 16
movq _ZL20__cudaFatCubinHandle(%rip), %rdi
call __cudaUnregisterFatBinary@PLT
addq $8, %rsp
.cfi_def_cfa_offset 8
ret
.cfi_endproc
.LFE2029:
.size _ZL26__cudaUnregisterBinaryUtilv, .-_ZL26__cudaUnregisterBinaryUtilv
.globl _Z37__device_stub__Z13getSumSquaresPfS_iiPfS_ii
.type _Z37__device_stub__Z13getSumSquaresPfS_iiPfS_ii, @function
_Z37__device_stub__Z13getSumSquaresPfS_iiPfS_ii:
.LFB2051:
.cfi_startproc
endbr64
subq $152, %rsp
.cfi_def_cfa_offset 160
movq %rdi, 24(%rsp)
movq %rsi, 16(%rsp)
movl %edx, 12(%rsp)
movl %ecx, 8(%rsp)
movq %fs:40, %rax
movq %rax, 136(%rsp)
xorl %eax, %eax
leaq 24(%rsp), %rax
movq %rax, 96(%rsp)
leaq 16(%rsp), %rax
movq %rax, 104(%rsp)
leaq 12(%rsp), %rax
movq %rax, 112(%rsp)
leaq 8(%rsp), %rax
movq %rax, 120(%rsp)
movl $1, 48(%rsp)
movl $1, 52(%rsp)
movl $1, 56(%rsp)
movl $1, 60(%rsp)
movl $1, 64(%rsp)
movl $1, 68(%rsp)
leaq 40(%rsp), %rcx
leaq 32(%rsp), %rdx
leaq 60(%rsp), %rsi
leaq 48(%rsp), %rdi
call __cudaPopCallConfiguration@PLT
testl %eax, %eax
je .L7
.L3:
movq 136(%rsp), %rax
subq %fs:40, %rax
jne .L8
addq $152, %rsp
.cfi_remember_state
.cfi_def_cfa_offset 8
ret
.L7:
.cfi_restore_state
pushq 40(%rsp)
.cfi_def_cfa_offset 168
pushq 40(%rsp)
.cfi_def_cfa_offset 176
leaq 112(%rsp), %r9
movq 76(%rsp), %rcx
movl 84(%rsp), %r8d
movq 64(%rsp), %rsi
movl 72(%rsp), %edx
leaq _Z13getSumSquaresPfS_ii(%rip), %rdi
call cudaLaunchKernel@PLT
addq $16, %rsp
.cfi_def_cfa_offset 160
jmp .L3
.L8:
call __stack_chk_fail@PLT
.cfi_endproc
.LFE2051:
.size _Z37__device_stub__Z13getSumSquaresPfS_iiPfS_ii, .-_Z37__device_stub__Z13getSumSquaresPfS_iiPfS_ii
.globl _Z13getSumSquaresPfS_ii
.type _Z13getSumSquaresPfS_ii, @function
_Z13getSumSquaresPfS_ii:
.LFB2052:
.cfi_startproc
endbr64
subq $8, %rsp
.cfi_def_cfa_offset 16
call _Z37__device_stub__Z13getSumSquaresPfS_iiPfS_ii
addq $8, %rsp
.cfi_def_cfa_offset 8
ret
.cfi_endproc
.LFE2052:
.size _Z13getSumSquaresPfS_ii, .-_Z13getSumSquaresPfS_ii
.globl _Z35__device_stub__Z9finishCSMPfS_S_iiiPfS_S_iii
.type _Z35__device_stub__Z9finishCSMPfS_S_iiiPfS_S_iii, @function
_Z35__device_stub__Z9finishCSMPfS_S_iiiPfS_S_iii:
.LFB2053:
.cfi_startproc
endbr64
subq $184, %rsp
.cfi_def_cfa_offset 192
movq %rdi, 40(%rsp)
movq %rsi, 32(%rsp)
movq %rdx, 24(%rsp)
movl %ecx, 20(%rsp)
movl %r8d, 16(%rsp)
movl %r9d, 12(%rsp)
movq %fs:40, %rax
movq %rax, 168(%rsp)
xorl %eax, %eax
leaq 40(%rsp), %rax
movq %rax, 112(%rsp)
leaq 32(%rsp), %rax
movq %rax, 120(%rsp)
leaq 24(%rsp), %rax
movq %rax, 128(%rsp)
leaq 20(%rsp), %rax
movq %rax, 136(%rsp)
leaq 16(%rsp), %rax
movq %rax, 144(%rsp)
leaq 12(%rsp), %rax
movq %rax, 152(%rsp)
movl $1, 64(%rsp)
movl $1, 68(%rsp)
movl $1, 72(%rsp)
movl $1, 76(%rsp)
movl $1, 80(%rsp)
movl $1, 84(%rsp)
leaq 56(%rsp), %rcx
leaq 48(%rsp), %rdx
leaq 76(%rsp), %rsi
leaq 64(%rsp), %rdi
call __cudaPopCallConfiguration@PLT
testl %eax, %eax
je .L15
.L11:
movq 168(%rsp), %rax
subq %fs:40, %rax
jne .L16
addq $184, %rsp
.cfi_remember_state
.cfi_def_cfa_offset 8
ret
.L15:
.cfi_restore_state
pushq 56(%rsp)
.cfi_def_cfa_offset 200
pushq 56(%rsp)
.cfi_def_cfa_offset 208
leaq 128(%rsp), %r9
movq 92(%rsp), %rcx
movl 100(%rsp), %r8d
movq 80(%rsp), %rsi
movl 88(%rsp), %edx
leaq _Z9finishCSMPfS_S_iii(%rip), %rdi
call cudaLaunchKernel@PLT
addq $16, %rsp
.cfi_def_cfa_offset 192
jmp .L11
.L16:
call __stack_chk_fail@PLT
.cfi_endproc
.LFE2053:
.size _Z35__device_stub__Z9finishCSMPfS_S_iiiPfS_S_iii, .-_Z35__device_stub__Z9finishCSMPfS_S_iiiPfS_S_iii
.globl _Z9finishCSMPfS_S_iii
.type _Z9finishCSMPfS_S_iii, @function
_Z9finishCSMPfS_S_iii:
.LFB2054:
.cfi_startproc
endbr64
subq $8, %rsp
.cfi_def_cfa_offset 16
call _Z35__device_stub__Z9finishCSMPfS_S_iiiPfS_S_iii
addq $8, %rsp
.cfi_def_cfa_offset 8
ret
.cfi_endproc
.LFE2054:
.size _Z9finishCSMPfS_S_iii, .-_Z9finishCSMPfS_S_iii
.section .rodata.str1.1,"aMS",@progbits,1
.LC0:
.string "_Z9finishCSMPfS_S_iii"
.LC1:
.string "_Z13getSumSquaresPfS_ii"
.text
.type _ZL24__sti____cudaRegisterAllv, @function
_ZL24__sti____cudaRegisterAllv:
.LFB2056:
.cfi_startproc
endbr64
pushq %rbx
.cfi_def_cfa_offset 16
.cfi_offset 3, -16
leaq _ZL15__fatDeviceText(%rip), %rdi
call __cudaRegisterFatBinary@PLT
movq %rax, %rbx
movq %rax, _ZL20__cudaFatCubinHandle(%rip)
pushq $0
.cfi_def_cfa_offset 24
pushq $0
.cfi_def_cfa_offset 32
pushq $0
.cfi_def_cfa_offset 40
pushq $0
.cfi_def_cfa_offset 48
movl $0, %r9d
movl $-1, %r8d
leaq .LC0(%rip), %rdx
movq %rdx, %rcx
leaq _Z9finishCSMPfS_S_iii(%rip), %rsi
movq %rax, %rdi
call __cudaRegisterFunction@PLT
addq $32, %rsp
.cfi_def_cfa_offset 16
pushq $0
.cfi_def_cfa_offset 24
pushq $0
.cfi_def_cfa_offset 32
pushq $0
.cfi_def_cfa_offset 40
pushq $0
.cfi_def_cfa_offset 48
movl $0, %r9d
movl $-1, %r8d
leaq .LC1(%rip), %rdx
movq %rdx, %rcx
leaq _Z13getSumSquaresPfS_ii(%rip), %rsi
movq %rbx, %rdi
call __cudaRegisterFunction@PLT
addq $32, %rsp
.cfi_def_cfa_offset 16
movq _ZL20__cudaFatCubinHandle(%rip), %rdi
call __cudaRegisterFatBinaryEnd@PLT
leaq _ZL26__cudaUnregisterBinaryUtilv(%rip), %rdi
call atexit@PLT
popq %rbx
.cfi_def_cfa_offset 8
ret
.cfi_endproc
.LFE2056:
.size _ZL24__sti____cudaRegisterAllv, .-_ZL24__sti____cudaRegisterAllv
.section .init_array,"aw"
.align 8
.quad _ZL24__sti____cudaRegisterAllv
.section .nvFatBinSegment,"aw"
.align 8
.type _ZL15__fatDeviceText, @object
.size _ZL15__fatDeviceText, 24
_ZL15__fatDeviceText:
.long 1180844977
.long 1
.quad fatbinData
.quad 0
.local _ZL20__cudaFatCubinHandle
.comm _ZL20__cudaFatCubinHandle,8,8
.ident "GCC: (Ubuntu 13.3.0-6ubuntu2~24.04) 13.3.0"
.section .note.GNU-stack,"",@progbits
.section .note.gnu.property,"a"
.align 8
.long 1f - 0f
.long 4f - 1f
.long 5
0:
.string "GNU"
1:
.align 8
.long 0xc0000002
.long 3f - 2f
2:
.long 0x3
3:
.align 8
4: |
You are a helpful coding assistant specialized in converting CUDA source code to HIP/AMD source code. | __global__ void getSumSquares(float* X, float* XSqr, int dim, int dimpow2) {
extern __shared__ float x[];
int i, k;
int offset = blockIdx.x*dim;
int jump = dimpow2;
int sumjump = jump >> 1;
//Step 0: Figure out K (number of batches per block)
int K = dimpow2 >> 9;
if (K == 0) {
K = 1;
}
if (jump > 512) {
jump = 512;
}
//Step 1: Copy over each row to shared memory
//and square in the process
for (k = 0; k < K; k++) {
i = k*jump + threadIdx.x;
if (i < dim) {
x[i] = X[offset + i]*X[offset + i];
}
else if (i < dimpow2) {
x[i] = 0.0;
}
}
__syncthreads();
//Step 2: Perform sums
while (sumjump > 0) {
if (threadIdx.x < sumjump) {
K = sumjump >> 9;
if (K == 0) {
K = 1;
}
jump = sumjump;
if (jump > 512) {
jump = 512;
}
for (k = 0; k < K; k++) {
i = k*jump + threadIdx.x;
x[i] += x[i + sumjump];
}
}
sumjump = sumjump >> 1;
__syncthreads();
}
//Step 3: Copy back results
XSqr[blockIdx.x] = x[0];
}
//CSM is N x M
__global__ void finishCSM(float* CSM, float* XSqr, float* YSqr, int N, int M, int MPow2) {
int offset = blockIdx.x*M;
int K = MPow2 >> 9;
int i;
int k, jump = MPow2;
float val = 0.0;
if (K == 0) {
K = 1;
}
if (jump > 512) {
jump = 512;
}
for (k = 0; k < K; k++) {
i = k*jump + threadIdx.x;
if (i < M) {
val = XSqr[i] + YSqr[blockIdx.x];
val = val - 2*CSM[offset + i];
if (val < 0) {
val = 0;
}
CSM[offset + i] = sqrt(val);
}
}
} | #include <hip/hip_runtime.h>
__global__ void getSumSquares(float* X, float* XSqr, int dim, int dimpow2) {
extern __shared__ float x[];
int i, k;
int offset = blockIdx.x*dim;
int jump = dimpow2;
int sumjump = jump >> 1;
//Step 0: Figure out K (number of batches per block)
int K = dimpow2 >> 9;
if (K == 0) {
K = 1;
}
if (jump > 512) {
jump = 512;
}
//Step 1: Copy over each row to shared memory
//and square in the process
for (k = 0; k < K; k++) {
i = k*jump + threadIdx.x;
if (i < dim) {
x[i] = X[offset + i]*X[offset + i];
}
else if (i < dimpow2) {
x[i] = 0.0;
}
}
__syncthreads();
//Step 2: Perform sums
while (sumjump > 0) {
if (threadIdx.x < sumjump) {
K = sumjump >> 9;
if (K == 0) {
K = 1;
}
jump = sumjump;
if (jump > 512) {
jump = 512;
}
for (k = 0; k < K; k++) {
i = k*jump + threadIdx.x;
x[i] += x[i + sumjump];
}
}
sumjump = sumjump >> 1;
__syncthreads();
}
//Step 3: Copy back results
XSqr[blockIdx.x] = x[0];
}
//CSM is N x M
__global__ void finishCSM(float* CSM, float* XSqr, float* YSqr, int N, int M, int MPow2) {
int offset = blockIdx.x*M;
int K = MPow2 >> 9;
int i;
int k, jump = MPow2;
float val = 0.0;
if (K == 0) {
K = 1;
}
if (jump > 512) {
jump = 512;
}
for (k = 0; k < K; k++) {
i = k*jump + threadIdx.x;
if (i < M) {
val = XSqr[i] + YSqr[blockIdx.x];
val = val - 2*CSM[offset + i];
if (val < 0) {
val = 0;
}
CSM[offset + i] = sqrt(val);
}
}
} |
You are a helpful coding assistant specialized in converting HIP source code to AMD device assembly. | #include <hip/hip_runtime.h>
__global__ void getSumSquares(float* X, float* XSqr, int dim, int dimpow2) {
extern __shared__ float x[];
int i, k;
int offset = blockIdx.x*dim;
int jump = dimpow2;
int sumjump = jump >> 1;
//Step 0: Figure out K (number of batches per block)
int K = dimpow2 >> 9;
if (K == 0) {
K = 1;
}
if (jump > 512) {
jump = 512;
}
//Step 1: Copy over each row to shared memory
//and square in the process
for (k = 0; k < K; k++) {
i = k*jump + threadIdx.x;
if (i < dim) {
x[i] = X[offset + i]*X[offset + i];
}
else if (i < dimpow2) {
x[i] = 0.0;
}
}
__syncthreads();
//Step 2: Perform sums
while (sumjump > 0) {
if (threadIdx.x < sumjump) {
K = sumjump >> 9;
if (K == 0) {
K = 1;
}
jump = sumjump;
if (jump > 512) {
jump = 512;
}
for (k = 0; k < K; k++) {
i = k*jump + threadIdx.x;
x[i] += x[i + sumjump];
}
}
sumjump = sumjump >> 1;
__syncthreads();
}
//Step 3: Copy back results
XSqr[blockIdx.x] = x[0];
}
//CSM is N x M
__global__ void finishCSM(float* CSM, float* XSqr, float* YSqr, int N, int M, int MPow2) {
int offset = blockIdx.x*M;
int K = MPow2 >> 9;
int i;
int k, jump = MPow2;
float val = 0.0;
if (K == 0) {
K = 1;
}
if (jump > 512) {
jump = 512;
}
for (k = 0; k < K; k++) {
i = k*jump + threadIdx.x;
if (i < M) {
val = XSqr[i] + YSqr[blockIdx.x];
val = val - 2*CSM[offset + i];
if (val < 0) {
val = 0;
}
CSM[offset + i] = sqrt(val);
}
}
} | .text
.amdgcn_target "amdgcn-amd-amdhsa--gfx1100"
.protected _Z13getSumSquaresPfS_ii
.globl _Z13getSumSquaresPfS_ii
.p2align 8
.type _Z13getSumSquaresPfS_ii,@function
_Z13getSumSquaresPfS_ii:
s_load_b32 s3, s[0:1], 0x14
s_mov_b32 s2, s15
s_waitcnt lgkmcnt(0)
s_ashr_i32 s4, s3, 9
s_cmpk_gt_u32 s3, 0x1ff
s_cselect_b32 s6, s4, 1
s_delay_alu instid0(SALU_CYCLE_1)
s_cmp_lt_i32 s6, 1
s_cbranch_scc1 .LBB0_9
s_clause 0x1
s_load_b32 s7, s[0:1], 0x10
s_load_b64 s[4:5], s[0:1], 0x0
v_lshl_add_u32 v1, v0, 2, 0
v_mov_b32_e32 v2, v0
s_min_i32 s8, s3, 0x200
s_delay_alu instid0(SALU_CYCLE_1)
s_lshl_b32 s10, s8, 2
s_waitcnt lgkmcnt(0)
s_mul_i32 s9, s2, s7
s_set_inst_prefetch_distance 0x1
s_branch .LBB0_3
.p2align 6
.LBB0_2:
s_or_b32 exec_lo, exec_lo, s12
v_add_nc_u32_e32 v1, s10, v1
v_add_nc_u32_e32 v2, s8, v2
s_add_i32 s6, s6, -1
s_delay_alu instid0(SALU_CYCLE_1)
s_cmp_lg_u32 s6, 0
s_cbranch_scc0 .LBB0_9
.LBB0_3:
s_mov_b32 s11, 0
s_mov_b32 s12, exec_lo
v_cmpx_le_i32_e64 s7, v2
s_xor_b32 s12, exec_lo, s12
v_cmp_gt_i32_e32 vcc_lo, s3, v2
s_mov_b32 s13, 0
s_and_b32 s11, vcc_lo, exec_lo
s_or_saveexec_b32 s12, s12
v_mov_b32_e32 v3, s13
s_xor_b32 exec_lo, exec_lo, s12
s_cbranch_execz .LBB0_7
v_add_nc_u32_e32 v3, s9, v2
s_or_b32 s11, s11, exec_lo
s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
v_ashrrev_i32_e32 v4, 31, v3
v_lshlrev_b64 v[3:4], 2, v[3:4]
s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_2)
v_add_co_u32 v3, vcc_lo, s4, v3
v_add_co_ci_u32_e32 v4, vcc_lo, s5, v4, vcc_lo
global_load_b32 v3, v[3:4], off
s_waitcnt vmcnt(0)
v_mul_f32_e32 v3, v3, v3
.LBB0_7:
s_or_b32 exec_lo, exec_lo, s12
s_and_saveexec_b32 s12, s11
s_cbranch_execz .LBB0_2
ds_store_b32 v1, v3
s_branch .LBB0_2
.LBB0_9:
s_set_inst_prefetch_distance 0x2
s_ashr_i32 s3, s3, 1
s_waitcnt lgkmcnt(0)
s_cmp_lt_i32 s3, 1
s_barrier
buffer_gl0_inv
s_cbranch_scc1 .LBB0_16
v_lshlrev_b32_e32 v1, 2, v0
s_set_inst_prefetch_distance 0x1
s_branch .LBB0_12
.p2align 6
.LBB0_11:
s_or_b32 exec_lo, exec_lo, s4
s_lshr_b32 s4, s3, 1
s_cmp_gt_u32 s3, 1
s_mov_b32 s3, s4
s_waitcnt lgkmcnt(0)
s_barrier
buffer_gl0_inv
s_cbranch_scc0 .LBB0_16
.LBB0_12:
s_mov_b32 s4, exec_lo
v_cmpx_gt_u32_e64 s3, v0
s_cbranch_execz .LBB0_11
s_lshr_b32 s5, s3, 9
s_cmpk_gt_u32 s3, 0x1ff
s_cselect_b32 s5, s5, 1
s_delay_alu instid0(SALU_CYCLE_1)
s_cmp_eq_u32 s5, 0
s_cbranch_scc1 .LBB0_11
v_lshl_add_u32 v2, s3, 2, v1
s_min_i32 s6, s3, 0x200
s_mov_b32 s7, 0
s_lshl_b32 s6, s6, 2
.LBB0_15:
s_delay_alu instid0(VALU_DEP_1)
v_add_nc_u32_e32 v3, s7, v2
v_add_nc_u32_e32 v4, s7, v1
s_add_i32 s5, s5, -1
s_add_i32 s7, s7, s6
s_cmp_lg_u32 s5, 0
ds_load_b32 v3, v3
ds_load_b32 v5, v4
s_waitcnt lgkmcnt(0)
v_add_f32_e32 v3, v3, v5
ds_store_b32 v4, v3
s_cbranch_scc1 .LBB0_15
s_branch .LBB0_11
.LBB0_16:
s_set_inst_prefetch_distance 0x2
v_dual_mov_b32 v0, 0 :: v_dual_mov_b32 v1, 0
s_load_b64 s[0:1], s[0:1], 0x8
s_mov_b32 s3, 0
s_delay_alu instid0(SALU_CYCLE_1)
s_lshl_b64 s[2:3], s[2:3], 2
ds_load_b32 v0, v0
s_waitcnt lgkmcnt(0)
s_add_u32 s0, s0, s2
s_addc_u32 s1, s1, s3
global_store_b32 v1, v0, s[0:1]
s_nop 0
s_sendmsg sendmsg(MSG_DEALLOC_VGPRS)
s_endpgm
.section .rodata,"a",@progbits
.p2align 6, 0x0
.amdhsa_kernel _Z13getSumSquaresPfS_ii
.amdhsa_group_segment_fixed_size 0
.amdhsa_private_segment_fixed_size 0
.amdhsa_kernarg_size 24
.amdhsa_user_sgpr_count 15
.amdhsa_user_sgpr_dispatch_ptr 0
.amdhsa_user_sgpr_queue_ptr 0
.amdhsa_user_sgpr_kernarg_segment_ptr 1
.amdhsa_user_sgpr_dispatch_id 0
.amdhsa_user_sgpr_private_segment_size 0
.amdhsa_wavefront_size32 1
.amdhsa_uses_dynamic_stack 0
.amdhsa_enable_private_segment 0
.amdhsa_system_sgpr_workgroup_id_x 1
.amdhsa_system_sgpr_workgroup_id_y 0
.amdhsa_system_sgpr_workgroup_id_z 0
.amdhsa_system_sgpr_workgroup_info 0
.amdhsa_system_vgpr_workitem_id 0
.amdhsa_next_free_vgpr 6
.amdhsa_next_free_sgpr 16
.amdhsa_float_round_mode_32 0
.amdhsa_float_round_mode_16_64 0
.amdhsa_float_denorm_mode_32 3
.amdhsa_float_denorm_mode_16_64 3
.amdhsa_dx10_clamp 1
.amdhsa_ieee_mode 1
.amdhsa_fp16_overflow 0
.amdhsa_workgroup_processor_mode 1
.amdhsa_memory_ordered 1
.amdhsa_forward_progress 0
.amdhsa_shared_vgpr_count 0
.amdhsa_exception_fp_ieee_invalid_op 0
.amdhsa_exception_fp_denorm_src 0
.amdhsa_exception_fp_ieee_div_zero 0
.amdhsa_exception_fp_ieee_overflow 0
.amdhsa_exception_fp_ieee_underflow 0
.amdhsa_exception_fp_ieee_inexact 0
.amdhsa_exception_int_div_zero 0
.end_amdhsa_kernel
.text
.Lfunc_end0:
.size _Z13getSumSquaresPfS_ii, .Lfunc_end0-_Z13getSumSquaresPfS_ii
.section .AMDGPU.csdata,"",@progbits
.text
.protected _Z9finishCSMPfS_S_iii
.globl _Z9finishCSMPfS_S_iii
.p2align 8
.type _Z9finishCSMPfS_S_iii,@function
_Z9finishCSMPfS_S_iii:
s_load_b32 s3, s[0:1], 0x20
s_waitcnt lgkmcnt(0)
s_ashr_i32 s4, s3, 9
s_cmpk_gt_u32 s3, 0x1ff
s_cselect_b32 s8, s4, 1
s_delay_alu instid0(SALU_CYCLE_1)
s_cmp_lt_i32 s8, 1
s_cbranch_scc1 .LBB1_5
s_clause 0x2
s_load_b32 s9, s[0:1], 0x1c
s_load_b64 s[12:13], s[0:1], 0x10
s_load_b128 s[4:7], s[0:1], 0x0
s_mov_b32 s2, s15
s_min_i32 s1, s3, 0x200
s_mov_b32 s3, 0
v_mov_b32_e32 v2, 0
s_lshl_b64 s[14:15], s[2:3], 2
s_waitcnt lgkmcnt(0)
s_mul_i32 s10, s2, s9
s_add_u32 s2, s12, s14
s_addc_u32 s3, s13, s15
s_branch .LBB1_3
.LBB1_2:
s_or_b32 exec_lo, exec_lo, s11
v_add_nc_u32_e32 v0, s1, v0
s_add_i32 s8, s8, -1
s_delay_alu instid0(SALU_CYCLE_1)
s_cmp_lg_u32 s8, 0
s_cbranch_scc0 .LBB1_5
.LBB1_3:
s_mov_b32 s11, exec_lo
v_cmpx_gt_i32_e64 s9, v0
s_cbranch_execz .LBB1_2
v_add_nc_u32_e32 v3, s10, v0
v_ashrrev_i32_e32 v1, 31, v0
s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
v_ashrrev_i32_e32 v4, 31, v3
v_lshlrev_b64 v[5:6], 2, v[0:1]
s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
v_lshlrev_b64 v[3:4], 2, v[3:4]
v_add_co_u32 v5, vcc_lo, s6, v5
s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3)
v_add_co_ci_u32_e32 v6, vcc_lo, s7, v6, vcc_lo
v_add_co_u32 v3, vcc_lo, s4, v3
global_load_b32 v1, v2, s[2:3]
global_load_b32 v5, v[5:6], off
v_add_co_ci_u32_e32 v4, vcc_lo, s5, v4, vcc_lo
global_load_b32 v6, v[3:4], off
s_waitcnt vmcnt(1)
v_add_f32_e32 v1, v5, v1
s_waitcnt vmcnt(0)
s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
v_fmac_f32_e32 v1, -2.0, v6
v_cmp_ngt_f32_e32 vcc_lo, 0, v1
v_cndmask_b32_e32 v1, 0, v1, vcc_lo
s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_2)
v_mul_f32_e32 v5, 0x4f800000, v1
v_cmp_gt_f32_e32 vcc_lo, 0xf800000, v1
v_cndmask_b32_e32 v1, v1, v5, vcc_lo
s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_3) | instid1(VALU_DEP_2)
v_sqrt_f32_e32 v5, v1
s_waitcnt_depctr 0xfff
v_add_nc_u32_e32 v6, -1, v5
v_add_nc_u32_e32 v7, 1, v5
v_fma_f32 v8, -v6, v5, v1
s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
v_fma_f32 v9, -v7, v5, v1
v_cmp_ge_f32_e64 s0, 0, v8
s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_3)
v_cndmask_b32_e64 v5, v5, v6, s0
v_cmp_lt_f32_e64 s0, 0, v9
s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
v_cndmask_b32_e64 v5, v5, v7, s0
v_mul_f32_e32 v6, 0x37800000, v5
s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_2)
v_cndmask_b32_e32 v5, v5, v6, vcc_lo
v_cmp_class_f32_e64 vcc_lo, v1, 0x260
v_cndmask_b32_e32 v1, v5, v1, vcc_lo
global_store_b32 v[3:4], v1, off
s_branch .LBB1_2
.LBB1_5:
s_nop 0
s_sendmsg sendmsg(MSG_DEALLOC_VGPRS)
s_endpgm
.section .rodata,"a",@progbits
.p2align 6, 0x0
.amdhsa_kernel _Z9finishCSMPfS_S_iii
.amdhsa_group_segment_fixed_size 0
.amdhsa_private_segment_fixed_size 0
.amdhsa_kernarg_size 36
.amdhsa_user_sgpr_count 15
.amdhsa_user_sgpr_dispatch_ptr 0
.amdhsa_user_sgpr_queue_ptr 0
.amdhsa_user_sgpr_kernarg_segment_ptr 1
.amdhsa_user_sgpr_dispatch_id 0
.amdhsa_user_sgpr_private_segment_size 0
.amdhsa_wavefront_size32 1
.amdhsa_uses_dynamic_stack 0
.amdhsa_enable_private_segment 0
.amdhsa_system_sgpr_workgroup_id_x 1
.amdhsa_system_sgpr_workgroup_id_y 0
.amdhsa_system_sgpr_workgroup_id_z 0
.amdhsa_system_sgpr_workgroup_info 0
.amdhsa_system_vgpr_workitem_id 0
.amdhsa_next_free_vgpr 10
.amdhsa_next_free_sgpr 16
.amdhsa_float_round_mode_32 0
.amdhsa_float_round_mode_16_64 0
.amdhsa_float_denorm_mode_32 3
.amdhsa_float_denorm_mode_16_64 3
.amdhsa_dx10_clamp 1
.amdhsa_ieee_mode 1
.amdhsa_fp16_overflow 0
.amdhsa_workgroup_processor_mode 1
.amdhsa_memory_ordered 1
.amdhsa_forward_progress 0
.amdhsa_shared_vgpr_count 0
.amdhsa_exception_fp_ieee_invalid_op 0
.amdhsa_exception_fp_denorm_src 0
.amdhsa_exception_fp_ieee_div_zero 0
.amdhsa_exception_fp_ieee_overflow 0
.amdhsa_exception_fp_ieee_underflow 0
.amdhsa_exception_fp_ieee_inexact 0
.amdhsa_exception_int_div_zero 0
.end_amdhsa_kernel
.text
.Lfunc_end1:
.size _Z9finishCSMPfS_S_iii, .Lfunc_end1-_Z9finishCSMPfS_S_iii
.section .AMDGPU.csdata,"",@progbits
.text
.p2alignl 7, 3214868480
.fill 96, 4, 3214868480
.type __hip_cuid_,@object
.section .bss,"aw",@nobits
.globl __hip_cuid_
__hip_cuid_:
.byte 0
.size __hip_cuid_, 1
.ident "AMD clang version 18.0.0git (https://github.com/RadeonOpenCompute/llvm-project roc-6.3.2 25012 e5bf7e55c91490b07c49d8960fa7983d864936c4)"
.section ".note.GNU-stack","",@progbits
.addrsig
.addrsig_sym __hip_cuid_
.amdgpu_metadata
---
amdhsa.kernels:
- .args:
- .address_space: global
.offset: 0
.size: 8
.value_kind: global_buffer
- .address_space: global
.offset: 8
.size: 8
.value_kind: global_buffer
- .offset: 16
.size: 4
.value_kind: by_value
- .offset: 20
.size: 4
.value_kind: by_value
.group_segment_fixed_size: 0
.kernarg_segment_align: 8
.kernarg_segment_size: 24
.language: OpenCL C
.language_version:
- 2
- 0
.max_flat_workgroup_size: 1024
.name: _Z13getSumSquaresPfS_ii
.private_segment_fixed_size: 0
.sgpr_count: 18
.sgpr_spill_count: 0
.symbol: _Z13getSumSquaresPfS_ii.kd
.uniform_work_group_size: 1
.uses_dynamic_stack: false
.vgpr_count: 6
.vgpr_spill_count: 0
.wavefront_size: 32
.workgroup_processor_mode: 1
- .args:
- .address_space: global
.offset: 0
.size: 8
.value_kind: global_buffer
- .address_space: global
.offset: 8
.size: 8
.value_kind: global_buffer
- .address_space: global
.offset: 16
.size: 8
.value_kind: global_buffer
- .offset: 24
.size: 4
.value_kind: by_value
- .offset: 28
.size: 4
.value_kind: by_value
- .offset: 32
.size: 4
.value_kind: by_value
.group_segment_fixed_size: 0
.kernarg_segment_align: 8
.kernarg_segment_size: 36
.language: OpenCL C
.language_version:
- 2
- 0
.max_flat_workgroup_size: 1024
.name: _Z9finishCSMPfS_S_iii
.private_segment_fixed_size: 0
.sgpr_count: 18
.sgpr_spill_count: 0
.symbol: _Z9finishCSMPfS_S_iii.kd
.uniform_work_group_size: 1
.uses_dynamic_stack: false
.vgpr_count: 10
.vgpr_spill_count: 0
.wavefront_size: 32
.workgroup_processor_mode: 1
amdhsa.target: amdgcn-amd-amdhsa--gfx1100
amdhsa.version:
- 1
- 2
...
.end_amdgpu_metadata |
You are a helpful coding assistant specialized in converting HIP source code to AMD host assembly. | #include <hip/hip_runtime.h>
__global__ void getSumSquares(float* X, float* XSqr, int dim, int dimpow2) {
extern __shared__ float x[];
int i, k;
int offset = blockIdx.x*dim;
int jump = dimpow2;
int sumjump = jump >> 1;
//Step 0: Figure out K (number of batches per block)
int K = dimpow2 >> 9;
if (K == 0) {
K = 1;
}
if (jump > 512) {
jump = 512;
}
//Step 1: Copy over each row to shared memory
//and square in the process
for (k = 0; k < K; k++) {
i = k*jump + threadIdx.x;
if (i < dim) {
x[i] = X[offset + i]*X[offset + i];
}
else if (i < dimpow2) {
x[i] = 0.0;
}
}
__syncthreads();
//Step 2: Perform sums
while (sumjump > 0) {
if (threadIdx.x < sumjump) {
K = sumjump >> 9;
if (K == 0) {
K = 1;
}
jump = sumjump;
if (jump > 512) {
jump = 512;
}
for (k = 0; k < K; k++) {
i = k*jump + threadIdx.x;
x[i] += x[i + sumjump];
}
}
sumjump = sumjump >> 1;
__syncthreads();
}
//Step 3: Copy back results
XSqr[blockIdx.x] = x[0];
}
//CSM is N x M
__global__ void finishCSM(float* CSM, float* XSqr, float* YSqr, int N, int M, int MPow2) {
int offset = blockIdx.x*M;
int K = MPow2 >> 9;
int i;
int k, jump = MPow2;
float val = 0.0;
if (K == 0) {
K = 1;
}
if (jump > 512) {
jump = 512;
}
for (k = 0; k < K; k++) {
i = k*jump + threadIdx.x;
if (i < M) {
val = XSqr[i] + YSqr[blockIdx.x];
val = val - 2*CSM[offset + i];
if (val < 0) {
val = 0;
}
CSM[offset + i] = sqrt(val);
}
}
} | .text
.file "CSMHelper.hip"
.globl _Z28__device_stub__getSumSquaresPfS_ii # -- Begin function _Z28__device_stub__getSumSquaresPfS_ii
.p2align 4, 0x90
.type _Z28__device_stub__getSumSquaresPfS_ii,@function
_Z28__device_stub__getSumSquaresPfS_ii: # @_Z28__device_stub__getSumSquaresPfS_ii
.cfi_startproc
# %bb.0:
subq $120, %rsp
.cfi_def_cfa_offset 128
movq %rdi, 72(%rsp)
movq %rsi, 64(%rsp)
movl %edx, 12(%rsp)
movl %ecx, 8(%rsp)
leaq 72(%rsp), %rax
movq %rax, 80(%rsp)
leaq 64(%rsp), %rax
movq %rax, 88(%rsp)
leaq 12(%rsp), %rax
movq %rax, 96(%rsp)
leaq 8(%rsp), %rax
movq %rax, 104(%rsp)
leaq 48(%rsp), %rdi
leaq 32(%rsp), %rsi
leaq 24(%rsp), %rdx
leaq 16(%rsp), %rcx
callq __hipPopCallConfiguration
movq 48(%rsp), %rsi
movl 56(%rsp), %edx
movq 32(%rsp), %rcx
movl 40(%rsp), %r8d
leaq 80(%rsp), %r9
movl $_Z13getSumSquaresPfS_ii, %edi
pushq 16(%rsp)
.cfi_adjust_cfa_offset 8
pushq 32(%rsp)
.cfi_adjust_cfa_offset 8
callq hipLaunchKernel
addq $136, %rsp
.cfi_adjust_cfa_offset -136
retq
.Lfunc_end0:
.size _Z28__device_stub__getSumSquaresPfS_ii, .Lfunc_end0-_Z28__device_stub__getSumSquaresPfS_ii
.cfi_endproc
# -- End function
.globl _Z24__device_stub__finishCSMPfS_S_iii # -- Begin function _Z24__device_stub__finishCSMPfS_S_iii
.p2align 4, 0x90
.type _Z24__device_stub__finishCSMPfS_S_iii,@function
_Z24__device_stub__finishCSMPfS_S_iii: # @_Z24__device_stub__finishCSMPfS_S_iii
.cfi_startproc
# %bb.0:
subq $152, %rsp
.cfi_def_cfa_offset 160
movq %rdi, 88(%rsp)
movq %rsi, 80(%rsp)
movq %rdx, 72(%rsp)
movl %ecx, 20(%rsp)
movl %r8d, 16(%rsp)
movl %r9d, 12(%rsp)
leaq 88(%rsp), %rax
movq %rax, 96(%rsp)
leaq 80(%rsp), %rax
movq %rax, 104(%rsp)
leaq 72(%rsp), %rax
movq %rax, 112(%rsp)
leaq 20(%rsp), %rax
movq %rax, 120(%rsp)
leaq 16(%rsp), %rax
movq %rax, 128(%rsp)
leaq 12(%rsp), %rax
movq %rax, 136(%rsp)
leaq 56(%rsp), %rdi
leaq 40(%rsp), %rsi
leaq 32(%rsp), %rdx
leaq 24(%rsp), %rcx
callq __hipPopCallConfiguration
movq 56(%rsp), %rsi
movl 64(%rsp), %edx
movq 40(%rsp), %rcx
movl 48(%rsp), %r8d
leaq 96(%rsp), %r9
movl $_Z9finishCSMPfS_S_iii, %edi
pushq 24(%rsp)
.cfi_adjust_cfa_offset 8
pushq 40(%rsp)
.cfi_adjust_cfa_offset 8
callq hipLaunchKernel
addq $168, %rsp
.cfi_adjust_cfa_offset -168
retq
.Lfunc_end1:
.size _Z24__device_stub__finishCSMPfS_S_iii, .Lfunc_end1-_Z24__device_stub__finishCSMPfS_S_iii
.cfi_endproc
# -- End function
.p2align 4, 0x90 # -- Begin function __hip_module_ctor
.type __hip_module_ctor,@function
__hip_module_ctor: # @__hip_module_ctor
.cfi_startproc
# %bb.0:
pushq %rbx
.cfi_def_cfa_offset 16
subq $32, %rsp
.cfi_def_cfa_offset 48
.cfi_offset %rbx, -16
cmpq $0, __hip_gpubin_handle(%rip)
jne .LBB2_2
# %bb.1:
movl $__hip_fatbin_wrapper, %edi
callq __hipRegisterFatBinary
movq %rax, __hip_gpubin_handle(%rip)
.LBB2_2:
movq __hip_gpubin_handle(%rip), %rbx
xorps %xmm0, %xmm0
movups %xmm0, 16(%rsp)
movups %xmm0, (%rsp)
movl $_Z13getSumSquaresPfS_ii, %esi
movl $.L__unnamed_1, %edx
movl $.L__unnamed_1, %ecx
movq %rbx, %rdi
movl $-1, %r8d
xorl %r9d, %r9d
callq __hipRegisterFunction
xorps %xmm0, %xmm0
movups %xmm0, 16(%rsp)
movups %xmm0, (%rsp)
movl $_Z9finishCSMPfS_S_iii, %esi
movl $.L__unnamed_2, %edx
movl $.L__unnamed_2, %ecx
movq %rbx, %rdi
movl $-1, %r8d
xorl %r9d, %r9d
callq __hipRegisterFunction
movl $__hip_module_dtor, %edi
addq $32, %rsp
.cfi_def_cfa_offset 16
popq %rbx
.cfi_def_cfa_offset 8
jmp atexit # TAILCALL
.Lfunc_end2:
.size __hip_module_ctor, .Lfunc_end2-__hip_module_ctor
.cfi_endproc
# -- End function
.p2align 4, 0x90 # -- Begin function __hip_module_dtor
.type __hip_module_dtor,@function
__hip_module_dtor: # @__hip_module_dtor
.cfi_startproc
# %bb.0:
movq __hip_gpubin_handle(%rip), %rdi
testq %rdi, %rdi
je .LBB3_2
# %bb.1:
pushq %rax
.cfi_def_cfa_offset 16
callq __hipUnregisterFatBinary
movq $0, __hip_gpubin_handle(%rip)
addq $8, %rsp
.cfi_def_cfa_offset 8
.LBB3_2:
retq
.Lfunc_end3:
.size __hip_module_dtor, .Lfunc_end3-__hip_module_dtor
.cfi_endproc
# -- End function
.type _Z13getSumSquaresPfS_ii,@object # @_Z13getSumSquaresPfS_ii
.section .rodata,"a",@progbits
.globl _Z13getSumSquaresPfS_ii
.p2align 3, 0x0
_Z13getSumSquaresPfS_ii:
.quad _Z28__device_stub__getSumSquaresPfS_ii
.size _Z13getSumSquaresPfS_ii, 8
.type _Z9finishCSMPfS_S_iii,@object # @_Z9finishCSMPfS_S_iii
.globl _Z9finishCSMPfS_S_iii
.p2align 3, 0x0
_Z9finishCSMPfS_S_iii:
.quad _Z24__device_stub__finishCSMPfS_S_iii
.size _Z9finishCSMPfS_S_iii, 8
.type .L__unnamed_1,@object # @0
.section .rodata.str1.1,"aMS",@progbits,1
.L__unnamed_1:
.asciz "_Z13getSumSquaresPfS_ii"
.size .L__unnamed_1, 24
.type .L__unnamed_2,@object # @1
.L__unnamed_2:
.asciz "_Z9finishCSMPfS_S_iii"
.size .L__unnamed_2, 22
.type __hip_fatbin_wrapper,@object # @__hip_fatbin_wrapper
.section .hipFatBinSegment,"a",@progbits
.p2align 3, 0x0
__hip_fatbin_wrapper:
.long 1212764230 # 0x48495046
.long 1 # 0x1
.quad __hip_fatbin
.quad 0
.size __hip_fatbin_wrapper, 24
.type __hip_gpubin_handle,@object # @__hip_gpubin_handle
.local __hip_gpubin_handle
.comm __hip_gpubin_handle,8,8
.section .init_array,"aw",@init_array
.p2align 3, 0x0
.quad __hip_module_ctor
.type __hip_cuid_,@object # @__hip_cuid_
.bss
.globl __hip_cuid_
__hip_cuid_:
.byte 0 # 0x0
.size __hip_cuid_, 1
.section ".linker-options","e",@llvm_linker_options
.ident "AMD clang version 18.0.0git (https://github.com/RadeonOpenCompute/llvm-project roc-6.3.2 25012 e5bf7e55c91490b07c49d8960fa7983d864936c4)"
.section ".note.GNU-stack","",@progbits
.addrsig
.addrsig_sym _Z28__device_stub__getSumSquaresPfS_ii
.addrsig_sym _Z24__device_stub__finishCSMPfS_S_iii
.addrsig_sym __hip_module_ctor
.addrsig_sym __hip_module_dtor
.addrsig_sym _Z13getSumSquaresPfS_ii
.addrsig_sym _Z9finishCSMPfS_S_iii
.addrsig_sym __hip_fatbin
.addrsig_sym __hip_fatbin_wrapper
.addrsig_sym __hip_cuid_ |
You are a helpful coding assistant specialized in converting from CUDA host assembly to AMD host assembly. | .file "tmpxft_0019f50d_00000000-6_CSMHelper.cudafe1.cpp"
.text
#APP
#NO_APP
.type _ZL26__cudaUnregisterBinaryUtilv, @function
_ZL26__cudaUnregisterBinaryUtilv:
.LFB2029:
.cfi_startproc
endbr64
subq $8, %rsp
.cfi_def_cfa_offset 16
movq _ZL20__cudaFatCubinHandle(%rip), %rdi
call __cudaUnregisterFatBinary@PLT
addq $8, %rsp
.cfi_def_cfa_offset 8
ret
.cfi_endproc
.LFE2029:
.size _ZL26__cudaUnregisterBinaryUtilv, .-_ZL26__cudaUnregisterBinaryUtilv
.globl _Z37__device_stub__Z13getSumSquaresPfS_iiPfS_ii
.type _Z37__device_stub__Z13getSumSquaresPfS_iiPfS_ii, @function
_Z37__device_stub__Z13getSumSquaresPfS_iiPfS_ii:
.LFB2051:
.cfi_startproc
endbr64
subq $152, %rsp
.cfi_def_cfa_offset 160
movq %rdi, 24(%rsp)
movq %rsi, 16(%rsp)
movl %edx, 12(%rsp)
movl %ecx, 8(%rsp)
movq %fs:40, %rax
movq %rax, 136(%rsp)
xorl %eax, %eax
leaq 24(%rsp), %rax
movq %rax, 96(%rsp)
leaq 16(%rsp), %rax
movq %rax, 104(%rsp)
leaq 12(%rsp), %rax
movq %rax, 112(%rsp)
leaq 8(%rsp), %rax
movq %rax, 120(%rsp)
movl $1, 48(%rsp)
movl $1, 52(%rsp)
movl $1, 56(%rsp)
movl $1, 60(%rsp)
movl $1, 64(%rsp)
movl $1, 68(%rsp)
leaq 40(%rsp), %rcx
leaq 32(%rsp), %rdx
leaq 60(%rsp), %rsi
leaq 48(%rsp), %rdi
call __cudaPopCallConfiguration@PLT
testl %eax, %eax
je .L7
.L3:
movq 136(%rsp), %rax
subq %fs:40, %rax
jne .L8
addq $152, %rsp
.cfi_remember_state
.cfi_def_cfa_offset 8
ret
.L7:
.cfi_restore_state
pushq 40(%rsp)
.cfi_def_cfa_offset 168
pushq 40(%rsp)
.cfi_def_cfa_offset 176
leaq 112(%rsp), %r9
movq 76(%rsp), %rcx
movl 84(%rsp), %r8d
movq 64(%rsp), %rsi
movl 72(%rsp), %edx
leaq _Z13getSumSquaresPfS_ii(%rip), %rdi
call cudaLaunchKernel@PLT
addq $16, %rsp
.cfi_def_cfa_offset 160
jmp .L3
.L8:
call __stack_chk_fail@PLT
.cfi_endproc
.LFE2051:
.size _Z37__device_stub__Z13getSumSquaresPfS_iiPfS_ii, .-_Z37__device_stub__Z13getSumSquaresPfS_iiPfS_ii
.globl _Z13getSumSquaresPfS_ii
.type _Z13getSumSquaresPfS_ii, @function
_Z13getSumSquaresPfS_ii:
.LFB2052:
.cfi_startproc
endbr64
subq $8, %rsp
.cfi_def_cfa_offset 16
call _Z37__device_stub__Z13getSumSquaresPfS_iiPfS_ii
addq $8, %rsp
.cfi_def_cfa_offset 8
ret
.cfi_endproc
.LFE2052:
.size _Z13getSumSquaresPfS_ii, .-_Z13getSumSquaresPfS_ii
.globl _Z35__device_stub__Z9finishCSMPfS_S_iiiPfS_S_iii
.type _Z35__device_stub__Z9finishCSMPfS_S_iiiPfS_S_iii, @function
_Z35__device_stub__Z9finishCSMPfS_S_iiiPfS_S_iii:
.LFB2053:
.cfi_startproc
endbr64
subq $184, %rsp
.cfi_def_cfa_offset 192
movq %rdi, 40(%rsp)
movq %rsi, 32(%rsp)
movq %rdx, 24(%rsp)
movl %ecx, 20(%rsp)
movl %r8d, 16(%rsp)
movl %r9d, 12(%rsp)
movq %fs:40, %rax
movq %rax, 168(%rsp)
xorl %eax, %eax
leaq 40(%rsp), %rax
movq %rax, 112(%rsp)
leaq 32(%rsp), %rax
movq %rax, 120(%rsp)
leaq 24(%rsp), %rax
movq %rax, 128(%rsp)
leaq 20(%rsp), %rax
movq %rax, 136(%rsp)
leaq 16(%rsp), %rax
movq %rax, 144(%rsp)
leaq 12(%rsp), %rax
movq %rax, 152(%rsp)
movl $1, 64(%rsp)
movl $1, 68(%rsp)
movl $1, 72(%rsp)
movl $1, 76(%rsp)
movl $1, 80(%rsp)
movl $1, 84(%rsp)
leaq 56(%rsp), %rcx
leaq 48(%rsp), %rdx
leaq 76(%rsp), %rsi
leaq 64(%rsp), %rdi
call __cudaPopCallConfiguration@PLT
testl %eax, %eax
je .L15
.L11:
movq 168(%rsp), %rax
subq %fs:40, %rax
jne .L16
addq $184, %rsp
.cfi_remember_state
.cfi_def_cfa_offset 8
ret
.L15:
.cfi_restore_state
pushq 56(%rsp)
.cfi_def_cfa_offset 200
pushq 56(%rsp)
.cfi_def_cfa_offset 208
leaq 128(%rsp), %r9
movq 92(%rsp), %rcx
movl 100(%rsp), %r8d
movq 80(%rsp), %rsi
movl 88(%rsp), %edx
leaq _Z9finishCSMPfS_S_iii(%rip), %rdi
call cudaLaunchKernel@PLT
addq $16, %rsp
.cfi_def_cfa_offset 192
jmp .L11
.L16:
call __stack_chk_fail@PLT
.cfi_endproc
.LFE2053:
.size _Z35__device_stub__Z9finishCSMPfS_S_iiiPfS_S_iii, .-_Z35__device_stub__Z9finishCSMPfS_S_iiiPfS_S_iii
.globl _Z9finishCSMPfS_S_iii
.type _Z9finishCSMPfS_S_iii, @function
_Z9finishCSMPfS_S_iii:
.LFB2054:
.cfi_startproc
endbr64
subq $8, %rsp
.cfi_def_cfa_offset 16
call _Z35__device_stub__Z9finishCSMPfS_S_iiiPfS_S_iii
addq $8, %rsp
.cfi_def_cfa_offset 8
ret
.cfi_endproc
.LFE2054:
.size _Z9finishCSMPfS_S_iii, .-_Z9finishCSMPfS_S_iii
.section .rodata.str1.1,"aMS",@progbits,1
.LC0:
.string "_Z9finishCSMPfS_S_iii"
.LC1:
.string "_Z13getSumSquaresPfS_ii"
.text
.type _ZL24__sti____cudaRegisterAllv, @function
_ZL24__sti____cudaRegisterAllv:
.LFB2056:
.cfi_startproc
endbr64
pushq %rbx
.cfi_def_cfa_offset 16
.cfi_offset 3, -16
leaq _ZL15__fatDeviceText(%rip), %rdi
call __cudaRegisterFatBinary@PLT
movq %rax, %rbx
movq %rax, _ZL20__cudaFatCubinHandle(%rip)
pushq $0
.cfi_def_cfa_offset 24
pushq $0
.cfi_def_cfa_offset 32
pushq $0
.cfi_def_cfa_offset 40
pushq $0
.cfi_def_cfa_offset 48
movl $0, %r9d
movl $-1, %r8d
leaq .LC0(%rip), %rdx
movq %rdx, %rcx
leaq _Z9finishCSMPfS_S_iii(%rip), %rsi
movq %rax, %rdi
call __cudaRegisterFunction@PLT
addq $32, %rsp
.cfi_def_cfa_offset 16
pushq $0
.cfi_def_cfa_offset 24
pushq $0
.cfi_def_cfa_offset 32
pushq $0
.cfi_def_cfa_offset 40
pushq $0
.cfi_def_cfa_offset 48
movl $0, %r9d
movl $-1, %r8d
leaq .LC1(%rip), %rdx
movq %rdx, %rcx
leaq _Z13getSumSquaresPfS_ii(%rip), %rsi
movq %rbx, %rdi
call __cudaRegisterFunction@PLT
addq $32, %rsp
.cfi_def_cfa_offset 16
movq _ZL20__cudaFatCubinHandle(%rip), %rdi
call __cudaRegisterFatBinaryEnd@PLT
leaq _ZL26__cudaUnregisterBinaryUtilv(%rip), %rdi
call atexit@PLT
popq %rbx
.cfi_def_cfa_offset 8
ret
.cfi_endproc
.LFE2056:
.size _ZL24__sti____cudaRegisterAllv, .-_ZL24__sti____cudaRegisterAllv
.section .init_array,"aw"
.align 8
.quad _ZL24__sti____cudaRegisterAllv
.section .nvFatBinSegment,"aw"
.align 8
.type _ZL15__fatDeviceText, @object
.size _ZL15__fatDeviceText, 24
_ZL15__fatDeviceText:
.long 1180844977
.long 1
.quad fatbinData
.quad 0
.local _ZL20__cudaFatCubinHandle
.comm _ZL20__cudaFatCubinHandle,8,8
.ident "GCC: (Ubuntu 13.3.0-6ubuntu2~24.04) 13.3.0"
.section .note.GNU-stack,"",@progbits
.section .note.gnu.property,"a"
.align 8
.long 1f - 0f
.long 4f - 1f
.long 5
0:
.string "GNU"
1:
.align 8
.long 0xc0000002
.long 3f - 2f
2:
.long 0x3
3:
.align 8
4: | .text
.file "CSMHelper.hip"
.globl _Z28__device_stub__getSumSquaresPfS_ii # -- Begin function _Z28__device_stub__getSumSquaresPfS_ii
.p2align 4, 0x90
.type _Z28__device_stub__getSumSquaresPfS_ii,@function
_Z28__device_stub__getSumSquaresPfS_ii: # @_Z28__device_stub__getSumSquaresPfS_ii
.cfi_startproc
# %bb.0:
subq $120, %rsp
.cfi_def_cfa_offset 128
movq %rdi, 72(%rsp)
movq %rsi, 64(%rsp)
movl %edx, 12(%rsp)
movl %ecx, 8(%rsp)
leaq 72(%rsp), %rax
movq %rax, 80(%rsp)
leaq 64(%rsp), %rax
movq %rax, 88(%rsp)
leaq 12(%rsp), %rax
movq %rax, 96(%rsp)
leaq 8(%rsp), %rax
movq %rax, 104(%rsp)
leaq 48(%rsp), %rdi
leaq 32(%rsp), %rsi
leaq 24(%rsp), %rdx
leaq 16(%rsp), %rcx
callq __hipPopCallConfiguration
movq 48(%rsp), %rsi
movl 56(%rsp), %edx
movq 32(%rsp), %rcx
movl 40(%rsp), %r8d
leaq 80(%rsp), %r9
movl $_Z13getSumSquaresPfS_ii, %edi
pushq 16(%rsp)
.cfi_adjust_cfa_offset 8
pushq 32(%rsp)
.cfi_adjust_cfa_offset 8
callq hipLaunchKernel
addq $136, %rsp
.cfi_adjust_cfa_offset -136
retq
.Lfunc_end0:
.size _Z28__device_stub__getSumSquaresPfS_ii, .Lfunc_end0-_Z28__device_stub__getSumSquaresPfS_ii
.cfi_endproc
# -- End function
.globl _Z24__device_stub__finishCSMPfS_S_iii # -- Begin function _Z24__device_stub__finishCSMPfS_S_iii
.p2align 4, 0x90
.type _Z24__device_stub__finishCSMPfS_S_iii,@function
_Z24__device_stub__finishCSMPfS_S_iii: # @_Z24__device_stub__finishCSMPfS_S_iii
.cfi_startproc
# %bb.0:
subq $152, %rsp
.cfi_def_cfa_offset 160
movq %rdi, 88(%rsp)
movq %rsi, 80(%rsp)
movq %rdx, 72(%rsp)
movl %ecx, 20(%rsp)
movl %r8d, 16(%rsp)
movl %r9d, 12(%rsp)
leaq 88(%rsp), %rax
movq %rax, 96(%rsp)
leaq 80(%rsp), %rax
movq %rax, 104(%rsp)
leaq 72(%rsp), %rax
movq %rax, 112(%rsp)
leaq 20(%rsp), %rax
movq %rax, 120(%rsp)
leaq 16(%rsp), %rax
movq %rax, 128(%rsp)
leaq 12(%rsp), %rax
movq %rax, 136(%rsp)
leaq 56(%rsp), %rdi
leaq 40(%rsp), %rsi
leaq 32(%rsp), %rdx
leaq 24(%rsp), %rcx
callq __hipPopCallConfiguration
movq 56(%rsp), %rsi
movl 64(%rsp), %edx
movq 40(%rsp), %rcx
movl 48(%rsp), %r8d
leaq 96(%rsp), %r9
movl $_Z9finishCSMPfS_S_iii, %edi
pushq 24(%rsp)
.cfi_adjust_cfa_offset 8
pushq 40(%rsp)
.cfi_adjust_cfa_offset 8
callq hipLaunchKernel
addq $168, %rsp
.cfi_adjust_cfa_offset -168
retq
.Lfunc_end1:
.size _Z24__device_stub__finishCSMPfS_S_iii, .Lfunc_end1-_Z24__device_stub__finishCSMPfS_S_iii
.cfi_endproc
# -- End function
.p2align 4, 0x90 # -- Begin function __hip_module_ctor
.type __hip_module_ctor,@function
__hip_module_ctor: # @__hip_module_ctor
.cfi_startproc
# %bb.0:
pushq %rbx
.cfi_def_cfa_offset 16
subq $32, %rsp
.cfi_def_cfa_offset 48
.cfi_offset %rbx, -16
cmpq $0, __hip_gpubin_handle(%rip)
jne .LBB2_2
# %bb.1:
movl $__hip_fatbin_wrapper, %edi
callq __hipRegisterFatBinary
movq %rax, __hip_gpubin_handle(%rip)
.LBB2_2:
movq __hip_gpubin_handle(%rip), %rbx
xorps %xmm0, %xmm0
movups %xmm0, 16(%rsp)
movups %xmm0, (%rsp)
movl $_Z13getSumSquaresPfS_ii, %esi
movl $.L__unnamed_1, %edx
movl $.L__unnamed_1, %ecx
movq %rbx, %rdi
movl $-1, %r8d
xorl %r9d, %r9d
callq __hipRegisterFunction
xorps %xmm0, %xmm0
movups %xmm0, 16(%rsp)
movups %xmm0, (%rsp)
movl $_Z9finishCSMPfS_S_iii, %esi
movl $.L__unnamed_2, %edx
movl $.L__unnamed_2, %ecx
movq %rbx, %rdi
movl $-1, %r8d
xorl %r9d, %r9d
callq __hipRegisterFunction
movl $__hip_module_dtor, %edi
addq $32, %rsp
.cfi_def_cfa_offset 16
popq %rbx
.cfi_def_cfa_offset 8
jmp atexit # TAILCALL
.Lfunc_end2:
.size __hip_module_ctor, .Lfunc_end2-__hip_module_ctor
.cfi_endproc
# -- End function
.p2align 4, 0x90 # -- Begin function __hip_module_dtor
.type __hip_module_dtor,@function
__hip_module_dtor: # @__hip_module_dtor
.cfi_startproc
# %bb.0:
movq __hip_gpubin_handle(%rip), %rdi
testq %rdi, %rdi
je .LBB3_2
# %bb.1:
pushq %rax
.cfi_def_cfa_offset 16
callq __hipUnregisterFatBinary
movq $0, __hip_gpubin_handle(%rip)
addq $8, %rsp
.cfi_def_cfa_offset 8
.LBB3_2:
retq
.Lfunc_end3:
.size __hip_module_dtor, .Lfunc_end3-__hip_module_dtor
.cfi_endproc
# -- End function
.type _Z13getSumSquaresPfS_ii,@object # @_Z13getSumSquaresPfS_ii
.section .rodata,"a",@progbits
.globl _Z13getSumSquaresPfS_ii
.p2align 3, 0x0
_Z13getSumSquaresPfS_ii:
.quad _Z28__device_stub__getSumSquaresPfS_ii
.size _Z13getSumSquaresPfS_ii, 8
.type _Z9finishCSMPfS_S_iii,@object # @_Z9finishCSMPfS_S_iii
.globl _Z9finishCSMPfS_S_iii
.p2align 3, 0x0
_Z9finishCSMPfS_S_iii:
.quad _Z24__device_stub__finishCSMPfS_S_iii
.size _Z9finishCSMPfS_S_iii, 8
.type .L__unnamed_1,@object # @0
.section .rodata.str1.1,"aMS",@progbits,1
.L__unnamed_1:
.asciz "_Z13getSumSquaresPfS_ii"
.size .L__unnamed_1, 24
.type .L__unnamed_2,@object # @1
.L__unnamed_2:
.asciz "_Z9finishCSMPfS_S_iii"
.size .L__unnamed_2, 22
.type __hip_fatbin_wrapper,@object # @__hip_fatbin_wrapper
.section .hipFatBinSegment,"a",@progbits
.p2align 3, 0x0
__hip_fatbin_wrapper:
.long 1212764230 # 0x48495046
.long 1 # 0x1
.quad __hip_fatbin
.quad 0
.size __hip_fatbin_wrapper, 24
.type __hip_gpubin_handle,@object # @__hip_gpubin_handle
.local __hip_gpubin_handle
.comm __hip_gpubin_handle,8,8
.section .init_array,"aw",@init_array
.p2align 3, 0x0
.quad __hip_module_ctor
.type __hip_cuid_,@object # @__hip_cuid_
.bss
.globl __hip_cuid_
__hip_cuid_:
.byte 0 # 0x0
.size __hip_cuid_, 1
.section ".linker-options","e",@llvm_linker_options
.ident "AMD clang version 18.0.0git (https://github.com/RadeonOpenCompute/llvm-project roc-6.3.2 25012 e5bf7e55c91490b07c49d8960fa7983d864936c4)"
.section ".note.GNU-stack","",@progbits
.addrsig
.addrsig_sym _Z28__device_stub__getSumSquaresPfS_ii
.addrsig_sym _Z24__device_stub__finishCSMPfS_S_iii
.addrsig_sym __hip_module_ctor
.addrsig_sym __hip_module_dtor
.addrsig_sym _Z13getSumSquaresPfS_ii
.addrsig_sym _Z9finishCSMPfS_S_iii
.addrsig_sym __hip_fatbin
.addrsig_sym __hip_fatbin_wrapper
.addrsig_sym __hip_cuid_ |
You are a helpful coding assistant specialized in converting CUDA source code to HIP/AMD source code. | #include <iostream>
#include <fstream>
#include <stdio.h>
#include <vector>
using namespace std;
bool isIncreased(float *data,int n){
int is_true = 1;
for(int i = 0;i < n - 1;i ++){
if(data[i] > data[i + 1]){
cout << i << endl;
return 0;
}
}
return is_true;
}
void get_random(float* data, int n){
srand(0);
for (int i = 0; i < n; i++) {
data[i] = (rand() % 1000)/ 10.0;
}
}
//Version-1
__global__ void naive_bitonic_sort(float *data,int i,int j){
int tid = threadIdx.x + blockDim.x * blockIdx.x;
int neighour_data = tid ^ j;//find the pair data
if(neighour_data > tid){//exchange data by low thread
if(((tid / i) % 2) == 0){//sort ascending
if(data[tid] > data[neighour_data]){
float temp = data[tid];
data[tid] = data[neighour_data];
data[neighour_data] = temp;
}
}
else if(((tid / i) % 2) == 1){//sort decending,exist the same data of same position
if(data[tid] < data[neighour_data]){
float temp = data[tid];
data[tid] = data[neighour_data];
data[neighour_data] = temp;
}
}
}
}
__host__ void naive_call(int data_size,float *cuda_data,int block_size){
for(int i = 2;i <= data_size;i = i * 2){//stride_len
for(int j = i/2;j > 0;j = j/2){//calc for the neighborhood
naive_bitonic_sort<<<(data_size%block_size == 0) ? data_size/block_size : data_size/block_size + 1, block_size>>>(cuda_data,i,j);
}
}
}
//Version-2 :Merge1
__global__ void merge_bitonic_sort(float *data,int data_size){
int tid = threadIdx.x + blockDim.x * blockIdx.x;
int end = min(data_size,blockDim.x);
int neighour_data;
float temp;
for(int i = 2;i <= end;i = i * 2){
for(int j = i/2;j > 0;j = j/2){
neighour_data = tid ^ j;//find the pair data
if(neighour_data > tid){//exchange data by low thread
if(((tid / i) % 2) == 0){//sort ascending
if(data[tid] > data[neighour_data]){
temp = data[tid];
data[tid] = data[neighour_data];
data[neighour_data] = temp;
}
}
else if(((tid / i) % 2) == 1){//sort decending,exist the same data of same position
if(data[tid] < data[neighour_data]){
temp = data[tid];
data[tid] = data[neighour_data];
data[neighour_data] = temp;
}
}
}
__syncthreads();
}
}
}
__host__ void less_call(int data_size,float *cuda_data,int block_size){
merge_bitonic_sort<<<(data_size%block_size == 0) ? data_size/block_size : data_size/block_size + 1,block_size>>>(cuda_data,data_size);
if(block_size < data_size){
for(int i = block_size * 2;i <= data_size;i *=2){
for(int j = i/2;j > 0;j = j/2){//calc for the neighborhood
naive_bitonic_sort<<<(data_size%1024 == 0) ? data_size/1024 : data_size/1024 + 1, 1024>>>(cuda_data,i,j);
}
}
}
}
//Version-3 : Merge the Second Half--Merge2
__global__ void merge2bitonic_sort(float *data,int data_size,int i,int block_size){
int tid = threadIdx.x + blockDim.x * blockIdx.x;
int end = min(data_size,blockDim.x);
int neighour_data;
float temp;
for(int j = block_size/2;j > 0;j = j/2){
neighour_data = tid ^ j;//find the pair data
if(neighour_data > tid){//exchange data by low thread
if(((tid / i) % 2) == 0){//sort ascending
if(data[tid] > data[neighour_data]){
temp = data[tid];
data[tid] = data[neighour_data];
data[neighour_data] = temp;
}
}
else if(((tid / i) % 2) == 1){//sort decending,exist the same data of same position
if(data[tid] < data[neighour_data]){
temp = data[tid];
data[tid] = data[neighour_data];
data[neighour_data] = temp;
}
}
}
__syncthreads();
}
}
__host__ void less_call2(int data_size,float *cuda_data,int block_size){
merge_bitonic_sort<<<(data_size%block_size == 0) ? data_size/block_size : data_size/block_size + 1,block_size>>>(cuda_data,data_size);
if(block_size < data_size){
for(int i = block_size * 2;i <= data_size;i *=2){
for(int j = i/2;j >= block_size;j = j/2){//calc for the neighborhood
naive_bitonic_sort<<<(data_size%block_size == 0) ? data_size/block_size : data_size/block_size + 1, block_size>>>(cuda_data,i,j);
}
merge2bitonic_sort<<<(data_size%(block_size) == 0) ? data_size/(block_size) : data_size/(block_size) + 1, (block_size)>>>(cuda_data,data_size,i,block_size);
}
}
}
//Version-4 : Merge1 & shared sort
__global__ void shared_sort(float *data,int data_size){
extern __shared__ float smem[];
int tid = threadIdx.x + blockDim.x * blockIdx.x;
smem[threadIdx.x] = data[tid];
int end = min(data_size,blockDim.x);
int neighour_data;
float temp;
for(int i = 2;i <= end;i = i * 2){
for(int j = i/2;j > 0;j = j/2){
neighour_data = threadIdx.x ^ j;//find the pair data
if(neighour_data > threadIdx.x){//exchange data by low thread
if(((tid / i) % 2) == 0){//sort ascending
if(smem[threadIdx.x] > smem[neighour_data]){
temp = smem[threadIdx.x];
smem[threadIdx.x] = smem[neighour_data];
smem[neighour_data] = temp;
}
}
else if(((tid / i) % 2) == 1){//sort decending,exist the same smem of same position
if(smem[threadIdx.x] < smem[neighour_data]){
temp = smem[threadIdx.x];
smem[threadIdx.x] = smem[neighour_data];
smem[neighour_data] = temp;
}
}
}
__syncthreads();
}
}
data[tid] = smem[threadIdx.x];
}
__host__ void shared_less_call(int data_size,float *cuda_data,int block_size){
shared_sort<<<(data_size%block_size == 0) ? data_size/block_size : data_size/block_size + 1,block_size,block_size*sizeof(float)>>>(cuda_data,data_size);
if(block_size < data_size){
for(int i = block_size*2 ;i <= data_size;i *=2){
for(int j = i/2;j > 0;j = j/2){//calc for the neighborhood
naive_bitonic_sort<<<(data_size%block_size == 0) ? data_size/block_size : data_size/block_size + 1, block_size>>>(cuda_data,i,j);
}
}
}
}
//Version-5 : merge2 & shared used
__host__ void shared_less_call2(int data_size,float *cuda_data,int block_size){
shared_sort<<<(data_size%block_size == 0) ? data_size/block_size : data_size/block_size + 1,block_size,block_size*sizeof(float)>>>(cuda_data,data_size);
if(block_size < data_size){
for(int i = block_size*2 ;i <= data_size;i *=2){
for(int j = i/2;j >= block_size;j = j/2){//calc for the neighborhood
naive_bitonic_sort<<<(data_size%block_size == 0) ? data_size/block_size : data_size/block_size + 1, block_size>>>(cuda_data,i,j);
}
merge2bitonic_sort<<<(data_size%(block_size) == 0) ? data_size/(block_size) : data_size/(block_size) + 1, (block_size)>>>(cuda_data,data_size,i,block_size);
}
}
}
//Version-6:
__global__ void shared_merge2bitonic_sort(float *data,int data_size,int i,int block_size){
extern __shared__ float smem[];
int tid = threadIdx.x + blockDim.x * blockIdx.x;
smem[threadIdx.x] = data[tid];
__syncthreads();
int neighour_data;
float temp;
for(int j = block_size/2;j > 0;j = j/2){
neighour_data = threadIdx.x ^ j;//find the pair data
if(neighour_data > threadIdx.x){//exchange data by low thread
if(((tid / i) % 2) == 0){//sort ascending
if(smem[threadIdx.x] > smem[neighour_data]){
temp = smem[threadIdx.x];
smem[threadIdx.x] = smem[neighour_data];
smem[neighour_data] = temp;
}
}
else if(((tid / i) % 2) == 1){//sort decending,exist the same smem of same position
if(smem[threadIdx.x] < smem[neighour_data]){
temp = smem[threadIdx.x];
smem[threadIdx.x] = smem[neighour_data];
smem[neighour_data] = temp;
}
}
}
__syncthreads();
}
data[tid] = smem[threadIdx.x];
}
__host__ void shared_less_call3(int data_size,float *cuda_data,int block_size){
shared_sort<<<(data_size%block_size == 0) ? data_size/block_size : data_size/block_size + 1,block_size,block_size*sizeof(float)>>>(cuda_data,data_size);
if(block_size < data_size){
for(int i = block_size*2 ;i <= data_size;i *=2){
for(int j = i/2;j >= block_size;j = j/2){//calc for the neighborhood
naive_bitonic_sort<<<(data_size%block_size == 0) ? data_size/block_size : data_size/block_size + 1, block_size>>>(cuda_data,i,j);
}
shared_merge2bitonic_sort<<<(data_size%(block_size) == 0)?data_size/(block_size):data_size/(block_size)+1,(block_size),block_size*sizeof(float)>>>(cuda_data,data_size,i,block_size);
}
}
}
//Version-7:更换判断顺序
__global__ void shared_merge2bitonic_sort2(float *data,int data_size,int i,int block_size){
extern __shared__ float smem[];
int tid = threadIdx.x + blockDim.x * blockIdx.x;
smem[threadIdx.x] = data[tid];
__syncthreads();
int neighour_data;
float temp;
if(((tid / i) % 2) == 0) {
for(int j = block_size/2;j > 0;j = j/2){
neighour_data = threadIdx.x ^ j;//find the pair data
if(neighour_data > threadIdx.x && smem[threadIdx.x] > smem[neighour_data]){//exchange data by low thread
temp = smem[threadIdx.x];
smem[threadIdx.x] = smem[neighour_data];
smem[neighour_data] = temp;
}
__syncthreads();
}
}
if(((tid / i) % 2) == 1) {
for(int j = block_size/2;j > 0;j = j/2){
neighour_data = threadIdx.x ^ j;//find the pair data
if(neighour_data > threadIdx.x && smem[threadIdx.x] < smem[neighour_data]){//exchange data by low thread
temp = smem[threadIdx.x];
smem[threadIdx.x] = smem[neighour_data];
smem[neighour_data] = temp;
}
__syncthreads();
}
}
data[tid] = smem[threadIdx.x];
}
__host__ void shared_less_call4(int data_size,float *cuda_data,int block_size){
shared_sort<<<(data_size%block_size == 0) ? data_size/block_size : data_size/block_size + 1,block_size,block_size*sizeof(float)>>>(cuda_data,data_size);
if(block_size < data_size){
for(int i = block_size*2 ;i <= data_size;i *=2){
for(int j = i/2;j >= block_size;j = j/2){//calc for the neighborhood
naive_bitonic_sort<<<(data_size%block_size == 0) ? data_size/block_size : data_size/block_size + 1, block_size>>>(cuda_data,i,j);
}
shared_merge2bitonic_sort2<<<(data_size%(block_size) == 0)?data_size/(block_size):data_size/(block_size)+1,(block_size),block_size*sizeof(float)>>>(cuda_data,data_size,i,block_size);
}
}
}
//Version-8
__global__ void unroll_shared_merge2bitonic_sort2(float *data,int data_size,int i,int block_size){
extern __shared__ float smem[];
int tid = threadIdx.x + blockDim.x * blockIdx.x;
smem[threadIdx.x] = data[tid];
__syncthreads();
int neighour_data;
float temp;
int j;
if(((tid / i) % 2) == 0) {
for(j = block_size/2;j > 256;j = j/2){
neighour_data = threadIdx.x ^ j;//find the pair data
if(neighour_data > threadIdx.x && smem[threadIdx.x] > smem[neighour_data]){//exchange data by low thread
temp = smem[threadIdx.x];
smem[threadIdx.x] = smem[neighour_data];
smem[neighour_data] = temp;
}
__syncthreads();
}
j = 256;
neighour_data = threadIdx.x ^ j;//find the pair data
if(neighour_data > threadIdx.x && smem[threadIdx.x] > smem[neighour_data]){//exchange data by low thread
temp = smem[threadIdx.x];
smem[threadIdx.x] = smem[neighour_data];
smem[neighour_data] = temp;
}
__syncthreads();
j = 128;
neighour_data = threadIdx.x ^ j;//find the pair data
if(neighour_data > threadIdx.x && smem[threadIdx.x] > smem[neighour_data]){//exchange data by low thread
temp = smem[threadIdx.x];
smem[threadIdx.x] = smem[neighour_data];
smem[neighour_data] = temp;
}
__syncthreads();
j = 64;
neighour_data = threadIdx.x ^ j;//find the pair data
if(neighour_data > threadIdx.x && smem[threadIdx.x] > smem[neighour_data]){//exchange data by low thread
temp = smem[threadIdx.x];
smem[threadIdx.x] = smem[neighour_data];
smem[neighour_data] = temp;
}
__syncthreads();
j = 32;
neighour_data = threadIdx.x ^ j;//find the pair data
if(neighour_data > threadIdx.x && smem[threadIdx.x] > smem[neighour_data]){//exchange data by low thread
temp = smem[threadIdx.x];
smem[threadIdx.x] = smem[neighour_data];
smem[neighour_data] = temp;
}
__syncthreads();
j = 16;
neighour_data = threadIdx.x ^ j;//find the pair data
if(neighour_data > threadIdx.x && smem[threadIdx.x] > smem[neighour_data]){//exchange data by low thread
temp = smem[threadIdx.x];
smem[threadIdx.x] = smem[neighour_data];
smem[neighour_data] = temp;
}
__syncthreads();
j = 8;
neighour_data = threadIdx.x ^ j;//find the pair data
if(neighour_data > threadIdx.x && smem[threadIdx.x] > smem[neighour_data]){//exchange data by low thread
temp = smem[threadIdx.x];
smem[threadIdx.x] = smem[neighour_data];
smem[neighour_data] = temp;
}
__syncthreads();
j = 4;
neighour_data = threadIdx.x ^ j;//find the pair data
if(neighour_data > threadIdx.x && smem[threadIdx.x] > smem[neighour_data]){//exchange data by low thread
temp = smem[threadIdx.x];
smem[threadIdx.x] = smem[neighour_data];
smem[neighour_data] = temp;
}
__syncthreads();
j = 2;
neighour_data = threadIdx.x ^ j;//find the pair data
if(neighour_data > threadIdx.x && smem[threadIdx.x] > smem[neighour_data]){//exchange data by low thread
temp = smem[threadIdx.x];
smem[threadIdx.x] = smem[neighour_data];
smem[neighour_data] = temp;
}
__syncthreads();
j = 1;
neighour_data = threadIdx.x ^ j;//find the pair data
if(neighour_data > threadIdx.x && smem[threadIdx.x] > smem[neighour_data]){//exchange data by low thread
temp = smem[threadIdx.x];
smem[threadIdx.x] = smem[neighour_data];
smem[neighour_data] = temp;
}
__syncthreads();
}
if(((tid / i) % 2) == 1) {
for( j = block_size/2;j > 0;j = j/2){
neighour_data = threadIdx.x ^ j;//find the pair data
if(neighour_data > threadIdx.x && smem[threadIdx.x] < smem[neighour_data]){//exchange data by low thread
temp = smem[threadIdx.x];
smem[threadIdx.x] = smem[neighour_data];
smem[neighour_data] = temp;
}
__syncthreads();
}
j = 256;
neighour_data = threadIdx.x ^ j;//find the pair data
if(neighour_data > threadIdx.x && smem[threadIdx.x] < smem[neighour_data]){//exchange data by low thread
temp = smem[threadIdx.x];
smem[threadIdx.x] = smem[neighour_data];
smem[neighour_data] = temp;
}
__syncthreads();
j = 128;
neighour_data = threadIdx.x ^ j;//find the pair data
if(neighour_data > threadIdx.x && smem[threadIdx.x] < smem[neighour_data]){//exchange data by low thread
temp = smem[threadIdx.x];
smem[threadIdx.x] = smem[neighour_data];
smem[neighour_data] = temp;
}
__syncthreads();
j = 64;
neighour_data = threadIdx.x ^ j;//find the pair data
if(neighour_data > threadIdx.x && smem[threadIdx.x] < smem[neighour_data]){//exchange data by low thread
temp = smem[threadIdx.x];
smem[threadIdx.x] = smem[neighour_data];
smem[neighour_data] = temp;
}
__syncthreads();
j = 32;
neighour_data = threadIdx.x ^ j;//find the pair data
if(neighour_data > threadIdx.x && smem[threadIdx.x] < smem[neighour_data]){//exchange data by low thread
temp = smem[threadIdx.x];
smem[threadIdx.x] = smem[neighour_data];
smem[neighour_data] = temp;
}
__syncthreads();
j = 16;
neighour_data = threadIdx.x ^ j;//find the pair data
if(neighour_data > threadIdx.x && smem[threadIdx.x] < smem[neighour_data]){//exchange data by low thread
temp = smem[threadIdx.x];
smem[threadIdx.x] = smem[neighour_data];
smem[neighour_data] = temp;
}
__syncthreads();
j = 8;
neighour_data = threadIdx.x ^ j;//find the pair data
if(neighour_data > threadIdx.x && smem[threadIdx.x] < smem[neighour_data]){//exchange data by low thread
temp = smem[threadIdx.x];
smem[threadIdx.x] = smem[neighour_data];
smem[neighour_data] = temp;
}
__syncthreads();
j = 4;
neighour_data = threadIdx.x ^ j;//find the pair data
if(neighour_data > threadIdx.x && smem[threadIdx.x] < smem[neighour_data]){//exchange data by low thread
temp = smem[threadIdx.x];
smem[threadIdx.x] = smem[neighour_data];
smem[neighour_data] = temp;
}
__syncthreads();
j = 2;
neighour_data = threadIdx.x ^ j;//find the pair data
if(neighour_data > threadIdx.x && smem[threadIdx.x] < smem[neighour_data]){//exchange data by low thread
temp = smem[threadIdx.x];
smem[threadIdx.x] = smem[neighour_data];
smem[neighour_data] = temp;
}
__syncthreads();
j = 1;
neighour_data = threadIdx.x ^ j;//find the pair data
if(neighour_data > threadIdx.x && smem[threadIdx.x] < smem[neighour_data]){//exchange data by low thread
temp = smem[threadIdx.x];
smem[threadIdx.x] = smem[neighour_data];
smem[neighour_data] = temp;
}
__syncthreads();
}
data[tid] = smem[threadIdx.x];
}
__host__ void unroll_shared_less_call4(int data_size,float *cuda_data,int block_size){
shared_sort<<<(data_size%block_size == 0) ? data_size/block_size : data_size/block_size + 1,block_size,block_size*sizeof(float)>>>(cuda_data,data_size);
if(block_size < data_size){
for(int i = block_size*2 ;i <= data_size;i *=2){
for(int j = i/2;j >= block_size;j = j/2){//calc for the neighborhood
naive_bitonic_sort<<<(data_size%block_size == 0) ? data_size/block_size : data_size/block_size + 1, block_size>>>(cuda_data,i,j);
}
unroll_shared_merge2bitonic_sort2<<<(data_size%(block_size) == 0)?data_size/(block_size):data_size/(block_size)+1,(block_size),block_size*sizeof(float)>>>(cuda_data,data_size,i,block_size);
}
}
}
int main(){
int block_size = 1024;
cudaSetDevice(1);
int whole_size = 1000000;
float *data_cpu = new float[whole_size];
get_random(data_cpu,whole_size);
//padding
int data_size = 1;
int n = 0;
while(data_size < whole_size){
n ++;
data_size*=2;
}
float *cuda_data,*cuda_data2,*cuda_data3,*cuda_data4,*cuda_data5,*cuda_data6,*cuda_data7,*cuda_data8;
float *result_data = new float[whole_size];
cudaMalloc((void **) &cuda_data,data_size*sizeof(float));
cudaMalloc((void **) &cuda_data2,data_size*sizeof(float));
cudaMalloc((void **) &cuda_data3,data_size*sizeof(float));
cudaMalloc((void **) &cuda_data4,data_size*sizeof(float));
cudaMalloc((void **) &cuda_data5,data_size*sizeof(float));
cudaMalloc((void **) &cuda_data6,data_size*sizeof(float));
cudaMalloc((void **) &cuda_data7,data_size*sizeof(float));
cudaMalloc((void **) &cuda_data8,data_size*sizeof(float));
cudaMemcpy(cuda_data, data_cpu, whole_size*sizeof(float),cudaMemcpyHostToDevice);
float start = clock();
naive_call(data_size,cuda_data,1024);
cudaDeviceSynchronize();
float end = clock();
cout << "data_size : " << data_size <<" GPU naive bitonic sort time :" << float(end-start) * 1000.0/CLOCKS_PER_SEC << " ms" << endl;
cudaMemcpy(result_data, cuda_data + data_size - whole_size, whole_size*sizeof(float),cudaMemcpyDeviceToHost);
for(int i = whole_size - 10;i < whole_size;i ++){
printf("%.1f ", result_data[i]);
}
cout << endl;
cout << "Right or false? " <<isIncreased(result_data,whole_size) << endl;
cudaMemcpy(cuda_data2, data_cpu, whole_size*sizeof(float),cudaMemcpyHostToDevice);
start = clock();
less_call(data_size,cuda_data2,256);
cudaDeviceSynchronize();
end = clock();
cout << "data_size : " << data_size <<" GPU merge1 bitonic sort time :" << float(end-start) * 1000.0/CLOCKS_PER_SEC << " ms" << endl;
float *result_data2 = new float[whole_size];
cudaMemcpy(result_data2, cuda_data2 + data_size - whole_size, whole_size*sizeof(float),cudaMemcpyDeviceToHost);
cout << "Right or false? " <<isIncreased(result_data2,whole_size) << endl;
for(int i = whole_size - 10;i < whole_size;i ++){
printf("%.1f ", result_data2[i]);
}
cout << endl;
cudaMemcpy(cuda_data3, data_cpu, whole_size*sizeof(float),cudaMemcpyHostToDevice);
start = clock();
less_call2(data_size,cuda_data3,256);
cudaDeviceSynchronize();
end = clock();
cout << "data_size : " << data_size <<" GPU merge2 bitonic sort time :" << float(end-start) * 1000.0/CLOCKS_PER_SEC << " ms" << endl;
float *result_data3 = new float[whole_size];
cudaMemcpy(result_data3, cuda_data3 + data_size - whole_size, whole_size*sizeof(float),cudaMemcpyDeviceToHost);
cout << "Right or false? " <<isIncreased(result_data3,whole_size) << endl;
for(int i = whole_size - 10;i < whole_size;i ++){
printf("%.1f ", result_data3[i]);
}
cout << endl;
cudaMemcpy(cuda_data4, data_cpu, whole_size*sizeof(float),cudaMemcpyHostToDevice);
start = clock();
shared_less_call(data_size,cuda_data4,256);
cudaDeviceSynchronize();
end = clock();
cout << "data_size : " << data_size <<" GPU shared + merge1 bitonic sort time :" << float(end-start) * 1000.0/CLOCKS_PER_SEC << " ms" << endl;
float *result_data4 = new float[whole_size];
cudaMemcpy(result_data4, cuda_data4 + data_size - whole_size, whole_size*sizeof(float),cudaMemcpyDeviceToHost);
cout << "Right or false? " <<isIncreased(result_data4,whole_size) << endl;
for(int i = whole_size - 10;i < whole_size;i ++){
printf("%.1f ", result_data4[i]);
}
cout << endl;
cudaMemcpy(cuda_data5, data_cpu, whole_size*sizeof(float),cudaMemcpyHostToDevice);
start = clock();
shared_less_call2(data_size,cuda_data5,256);
cudaDeviceSynchronize();
end = clock();
cout << "data_size : " << data_size <<" GPU shared + merge2 bitonic sort time :" << float(end-start) * 1000.0/CLOCKS_PER_SEC << " ms" << endl;
float *result_data5 = new float[whole_size];
cudaMemcpy(result_data5, cuda_data5 + data_size - whole_size, whole_size*sizeof(float),cudaMemcpyDeviceToHost);
cout << "Right or false? " <<isIncreased(result_data5,whole_size) << endl;
for(int i = whole_size - 10;i < whole_size;i ++){
printf("%.1f ", result_data5[i]);
}
cout << endl;
cudaMemcpy(cuda_data6, data_cpu, whole_size*sizeof(float),cudaMemcpyHostToDevice);
start = clock();
shared_less_call3(data_size,cuda_data6,256);
cudaDeviceSynchronize();
end = clock();
cout << "data_size : " << data_size <<" GPU shared2 + merge2 bitonic sort time :" << float(end-start) * 1000.0/CLOCKS_PER_SEC << " ms" << endl;
float *result_data6 = new float[whole_size];
cudaMemcpy(result_data6, cuda_data6 + data_size - whole_size, whole_size*sizeof(float),cudaMemcpyDeviceToHost);
cout << "Right or false? " <<isIncreased(result_data6,whole_size) << endl;
for(int i = whole_size - 10;i < whole_size;i ++){
printf("%.1f ", result_data6[i]);
}
cout << endl;
cudaMemcpy(cuda_data7, data_cpu, whole_size*sizeof(float),cudaMemcpyHostToDevice);
start = clock();
shared_less_call4(data_size,cuda_data7,256);
cudaDeviceSynchronize();
end = clock();
cout << "block : " << 256 <<" GPU change order shared2 + merge2 bitonic sort time :" << float(end-start) * 1000.0/CLOCKS_PER_SEC << " ms" << endl;
float *result_data7 = new float[whole_size];
cudaMemcpy(result_data7, cuda_data7 + data_size - whole_size, whole_size*sizeof(float),cudaMemcpyDeviceToHost);
cout << "Right or false? " <<isIncreased(result_data7,whole_size) << endl;
for(int i = whole_size - 10;i < whole_size;i ++){
printf("%.1f ", result_data7[i]);
}
cout << endl;
cudaMemcpy(cuda_data8, data_cpu, whole_size*sizeof(float),cudaMemcpyHostToDevice);
start = clock();
unroll_shared_less_call4(data_size,cuda_data8,512);
cudaDeviceSynchronize();
end = clock();
cout << "data_size : " << data_size <<" GPU unroll change order shared2 + merge2 bitonic sort time :" << float(end-start) * 1000.0/CLOCKS_PER_SEC << " ms" << endl;
float *result_data8 = new float[whole_size];
cudaMemcpy(result_data8, cuda_data8 + data_size - whole_size, whole_size*sizeof(float),cudaMemcpyDeviceToHost);
cout << "Right or false? " <<isIncreased(result_data8,whole_size) << endl;
for(int i = whole_size - 10;i < whole_size;i ++){
printf("%.1f ", result_data8[i]);
}
cout << endl;
cudaFree(cuda_data);
// cudaFree(cuda_data1);
// cudaFree(cuda_data2);
// cudaFree(cuda_data3);
// cudaFree(cuda_data4);
// cudaFree(cuda_data5);
} | #include <hip/hip_runtime.h>
#include <iostream>
#include <fstream>
#include <stdio.h>
#include <vector>
using namespace std;
bool isIncreased(float *data,int n){
int is_true = 1;
for(int i = 0;i < n - 1;i ++){
if(data[i] > data[i + 1]){
cout << i << endl;
return 0;
}
}
return is_true;
}
void get_random(float* data, int n){
srand(0);
for (int i = 0; i < n; i++) {
data[i] = (rand() % 1000)/ 10.0;
}
}
//Version-1
__global__ void naive_bitonic_sort(float *data,int i,int j){
int tid = threadIdx.x + blockDim.x * blockIdx.x;
int neighour_data = tid ^ j;//find the pair data
if(neighour_data > tid){//exchange data by low thread
if(((tid / i) % 2) == 0){//sort ascending
if(data[tid] > data[neighour_data]){
float temp = data[tid];
data[tid] = data[neighour_data];
data[neighour_data] = temp;
}
}
else if(((tid / i) % 2) == 1){//sort decending,exist the same data of same position
if(data[tid] < data[neighour_data]){
float temp = data[tid];
data[tid] = data[neighour_data];
data[neighour_data] = temp;
}
}
}
}
__host__ void naive_call(int data_size,float *cuda_data,int block_size){
for(int i = 2;i <= data_size;i = i * 2){//stride_len
for(int j = i/2;j > 0;j = j/2){//calc for the neighborhood
naive_bitonic_sort<<<(data_size%block_size == 0) ? data_size/block_size : data_size/block_size + 1, block_size>>>(cuda_data,i,j);
}
}
}
//Version-2 :Merge1
__global__ void merge_bitonic_sort(float *data,int data_size){
int tid = threadIdx.x + blockDim.x * blockIdx.x;
int end = min(data_size,blockDim.x);
int neighour_data;
float temp;
for(int i = 2;i <= end;i = i * 2){
for(int j = i/2;j > 0;j = j/2){
neighour_data = tid ^ j;//find the pair data
if(neighour_data > tid){//exchange data by low thread
if(((tid / i) % 2) == 0){//sort ascending
if(data[tid] > data[neighour_data]){
temp = data[tid];
data[tid] = data[neighour_data];
data[neighour_data] = temp;
}
}
else if(((tid / i) % 2) == 1){//sort decending,exist the same data of same position
if(data[tid] < data[neighour_data]){
temp = data[tid];
data[tid] = data[neighour_data];
data[neighour_data] = temp;
}
}
}
__syncthreads();
}
}
}
__host__ void less_call(int data_size,float *cuda_data,int block_size){
merge_bitonic_sort<<<(data_size%block_size == 0) ? data_size/block_size : data_size/block_size + 1,block_size>>>(cuda_data,data_size);
if(block_size < data_size){
for(int i = block_size * 2;i <= data_size;i *=2){
for(int j = i/2;j > 0;j = j/2){//calc for the neighborhood
naive_bitonic_sort<<<(data_size%1024 == 0) ? data_size/1024 : data_size/1024 + 1, 1024>>>(cuda_data,i,j);
}
}
}
}
//Version-3 : Merge the Second Half--Merge2
__global__ void merge2bitonic_sort(float *data,int data_size,int i,int block_size){
int tid = threadIdx.x + blockDim.x * blockIdx.x;
int end = min(data_size,blockDim.x);
int neighour_data;
float temp;
for(int j = block_size/2;j > 0;j = j/2){
neighour_data = tid ^ j;//find the pair data
if(neighour_data > tid){//exchange data by low thread
if(((tid / i) % 2) == 0){//sort ascending
if(data[tid] > data[neighour_data]){
temp = data[tid];
data[tid] = data[neighour_data];
data[neighour_data] = temp;
}
}
else if(((tid / i) % 2) == 1){//sort decending,exist the same data of same position
if(data[tid] < data[neighour_data]){
temp = data[tid];
data[tid] = data[neighour_data];
data[neighour_data] = temp;
}
}
}
__syncthreads();
}
}
__host__ void less_call2(int data_size,float *cuda_data,int block_size){
merge_bitonic_sort<<<(data_size%block_size == 0) ? data_size/block_size : data_size/block_size + 1,block_size>>>(cuda_data,data_size);
if(block_size < data_size){
for(int i = block_size * 2;i <= data_size;i *=2){
for(int j = i/2;j >= block_size;j = j/2){//calc for the neighborhood
naive_bitonic_sort<<<(data_size%block_size == 0) ? data_size/block_size : data_size/block_size + 1, block_size>>>(cuda_data,i,j);
}
merge2bitonic_sort<<<(data_size%(block_size) == 0) ? data_size/(block_size) : data_size/(block_size) + 1, (block_size)>>>(cuda_data,data_size,i,block_size);
}
}
}
//Version-4 : Merge1 & shared sort
__global__ void shared_sort(float *data,int data_size){
extern __shared__ float smem[];
int tid = threadIdx.x + blockDim.x * blockIdx.x;
smem[threadIdx.x] = data[tid];
int end = min(data_size,blockDim.x);
int neighour_data;
float temp;
for(int i = 2;i <= end;i = i * 2){
for(int j = i/2;j > 0;j = j/2){
neighour_data = threadIdx.x ^ j;//find the pair data
if(neighour_data > threadIdx.x){//exchange data by low thread
if(((tid / i) % 2) == 0){//sort ascending
if(smem[threadIdx.x] > smem[neighour_data]){
temp = smem[threadIdx.x];
smem[threadIdx.x] = smem[neighour_data];
smem[neighour_data] = temp;
}
}
else if(((tid / i) % 2) == 1){//sort decending,exist the same smem of same position
if(smem[threadIdx.x] < smem[neighour_data]){
temp = smem[threadIdx.x];
smem[threadIdx.x] = smem[neighour_data];
smem[neighour_data] = temp;
}
}
}
__syncthreads();
}
}
data[tid] = smem[threadIdx.x];
}
__host__ void shared_less_call(int data_size,float *cuda_data,int block_size){
shared_sort<<<(data_size%block_size == 0) ? data_size/block_size : data_size/block_size + 1,block_size,block_size*sizeof(float)>>>(cuda_data,data_size);
if(block_size < data_size){
for(int i = block_size*2 ;i <= data_size;i *=2){
for(int j = i/2;j > 0;j = j/2){//calc for the neighborhood
naive_bitonic_sort<<<(data_size%block_size == 0) ? data_size/block_size : data_size/block_size + 1, block_size>>>(cuda_data,i,j);
}
}
}
}
//Version-5 : merge2 & shared used
__host__ void shared_less_call2(int data_size,float *cuda_data,int block_size){
shared_sort<<<(data_size%block_size == 0) ? data_size/block_size : data_size/block_size + 1,block_size,block_size*sizeof(float)>>>(cuda_data,data_size);
if(block_size < data_size){
for(int i = block_size*2 ;i <= data_size;i *=2){
for(int j = i/2;j >= block_size;j = j/2){//calc for the neighborhood
naive_bitonic_sort<<<(data_size%block_size == 0) ? data_size/block_size : data_size/block_size + 1, block_size>>>(cuda_data,i,j);
}
merge2bitonic_sort<<<(data_size%(block_size) == 0) ? data_size/(block_size) : data_size/(block_size) + 1, (block_size)>>>(cuda_data,data_size,i,block_size);
}
}
}
//Version-6:
__global__ void shared_merge2bitonic_sort(float *data,int data_size,int i,int block_size){
extern __shared__ float smem[];
int tid = threadIdx.x + blockDim.x * blockIdx.x;
smem[threadIdx.x] = data[tid];
__syncthreads();
int neighour_data;
float temp;
for(int j = block_size/2;j > 0;j = j/2){
neighour_data = threadIdx.x ^ j;//find the pair data
if(neighour_data > threadIdx.x){//exchange data by low thread
if(((tid / i) % 2) == 0){//sort ascending
if(smem[threadIdx.x] > smem[neighour_data]){
temp = smem[threadIdx.x];
smem[threadIdx.x] = smem[neighour_data];
smem[neighour_data] = temp;
}
}
else if(((tid / i) % 2) == 1){//sort decending,exist the same smem of same position
if(smem[threadIdx.x] < smem[neighour_data]){
temp = smem[threadIdx.x];
smem[threadIdx.x] = smem[neighour_data];
smem[neighour_data] = temp;
}
}
}
__syncthreads();
}
data[tid] = smem[threadIdx.x];
}
__host__ void shared_less_call3(int data_size,float *cuda_data,int block_size){
shared_sort<<<(data_size%block_size == 0) ? data_size/block_size : data_size/block_size + 1,block_size,block_size*sizeof(float)>>>(cuda_data,data_size);
if(block_size < data_size){
for(int i = block_size*2 ;i <= data_size;i *=2){
for(int j = i/2;j >= block_size;j = j/2){//calc for the neighborhood
naive_bitonic_sort<<<(data_size%block_size == 0) ? data_size/block_size : data_size/block_size + 1, block_size>>>(cuda_data,i,j);
}
shared_merge2bitonic_sort<<<(data_size%(block_size) == 0)?data_size/(block_size):data_size/(block_size)+1,(block_size),block_size*sizeof(float)>>>(cuda_data,data_size,i,block_size);
}
}
}
//Version-7:更换判断顺序
__global__ void shared_merge2bitonic_sort2(float *data,int data_size,int i,int block_size){
extern __shared__ float smem[];
int tid = threadIdx.x + blockDim.x * blockIdx.x;
smem[threadIdx.x] = data[tid];
__syncthreads();
int neighour_data;
float temp;
if(((tid / i) % 2) == 0) {
for(int j = block_size/2;j > 0;j = j/2){
neighour_data = threadIdx.x ^ j;//find the pair data
if(neighour_data > threadIdx.x && smem[threadIdx.x] > smem[neighour_data]){//exchange data by low thread
temp = smem[threadIdx.x];
smem[threadIdx.x] = smem[neighour_data];
smem[neighour_data] = temp;
}
__syncthreads();
}
}
if(((tid / i) % 2) == 1) {
for(int j = block_size/2;j > 0;j = j/2){
neighour_data = threadIdx.x ^ j;//find the pair data
if(neighour_data > threadIdx.x && smem[threadIdx.x] < smem[neighour_data]){//exchange data by low thread
temp = smem[threadIdx.x];
smem[threadIdx.x] = smem[neighour_data];
smem[neighour_data] = temp;
}
__syncthreads();
}
}
data[tid] = smem[threadIdx.x];
}
__host__ void shared_less_call4(int data_size,float *cuda_data,int block_size){
shared_sort<<<(data_size%block_size == 0) ? data_size/block_size : data_size/block_size + 1,block_size,block_size*sizeof(float)>>>(cuda_data,data_size);
if(block_size < data_size){
for(int i = block_size*2 ;i <= data_size;i *=2){
for(int j = i/2;j >= block_size;j = j/2){//calc for the neighborhood
naive_bitonic_sort<<<(data_size%block_size == 0) ? data_size/block_size : data_size/block_size + 1, block_size>>>(cuda_data,i,j);
}
shared_merge2bitonic_sort2<<<(data_size%(block_size) == 0)?data_size/(block_size):data_size/(block_size)+1,(block_size),block_size*sizeof(float)>>>(cuda_data,data_size,i,block_size);
}
}
}
//Version-8
__global__ void unroll_shared_merge2bitonic_sort2(float *data,int data_size,int i,int block_size){
extern __shared__ float smem[];
int tid = threadIdx.x + blockDim.x * blockIdx.x;
smem[threadIdx.x] = data[tid];
__syncthreads();
int neighour_data;
float temp;
int j;
if(((tid / i) % 2) == 0) {
for(j = block_size/2;j > 256;j = j/2){
neighour_data = threadIdx.x ^ j;//find the pair data
if(neighour_data > threadIdx.x && smem[threadIdx.x] > smem[neighour_data]){//exchange data by low thread
temp = smem[threadIdx.x];
smem[threadIdx.x] = smem[neighour_data];
smem[neighour_data] = temp;
}
__syncthreads();
}
j = 256;
neighour_data = threadIdx.x ^ j;//find the pair data
if(neighour_data > threadIdx.x && smem[threadIdx.x] > smem[neighour_data]){//exchange data by low thread
temp = smem[threadIdx.x];
smem[threadIdx.x] = smem[neighour_data];
smem[neighour_data] = temp;
}
__syncthreads();
j = 128;
neighour_data = threadIdx.x ^ j;//find the pair data
if(neighour_data > threadIdx.x && smem[threadIdx.x] > smem[neighour_data]){//exchange data by low thread
temp = smem[threadIdx.x];
smem[threadIdx.x] = smem[neighour_data];
smem[neighour_data] = temp;
}
__syncthreads();
j = 64;
neighour_data = threadIdx.x ^ j;//find the pair data
if(neighour_data > threadIdx.x && smem[threadIdx.x] > smem[neighour_data]){//exchange data by low thread
temp = smem[threadIdx.x];
smem[threadIdx.x] = smem[neighour_data];
smem[neighour_data] = temp;
}
__syncthreads();
j = 32;
neighour_data = threadIdx.x ^ j;//find the pair data
if(neighour_data > threadIdx.x && smem[threadIdx.x] > smem[neighour_data]){//exchange data by low thread
temp = smem[threadIdx.x];
smem[threadIdx.x] = smem[neighour_data];
smem[neighour_data] = temp;
}
__syncthreads();
j = 16;
neighour_data = threadIdx.x ^ j;//find the pair data
if(neighour_data > threadIdx.x && smem[threadIdx.x] > smem[neighour_data]){//exchange data by low thread
temp = smem[threadIdx.x];
smem[threadIdx.x] = smem[neighour_data];
smem[neighour_data] = temp;
}
__syncthreads();
j = 8;
neighour_data = threadIdx.x ^ j;//find the pair data
if(neighour_data > threadIdx.x && smem[threadIdx.x] > smem[neighour_data]){//exchange data by low thread
temp = smem[threadIdx.x];
smem[threadIdx.x] = smem[neighour_data];
smem[neighour_data] = temp;
}
__syncthreads();
j = 4;
neighour_data = threadIdx.x ^ j;//find the pair data
if(neighour_data > threadIdx.x && smem[threadIdx.x] > smem[neighour_data]){//exchange data by low thread
temp = smem[threadIdx.x];
smem[threadIdx.x] = smem[neighour_data];
smem[neighour_data] = temp;
}
__syncthreads();
j = 2;
neighour_data = threadIdx.x ^ j;//find the pair data
if(neighour_data > threadIdx.x && smem[threadIdx.x] > smem[neighour_data]){//exchange data by low thread
temp = smem[threadIdx.x];
smem[threadIdx.x] = smem[neighour_data];
smem[neighour_data] = temp;
}
__syncthreads();
j = 1;
neighour_data = threadIdx.x ^ j;//find the pair data
if(neighour_data > threadIdx.x && smem[threadIdx.x] > smem[neighour_data]){//exchange data by low thread
temp = smem[threadIdx.x];
smem[threadIdx.x] = smem[neighour_data];
smem[neighour_data] = temp;
}
__syncthreads();
}
if(((tid / i) % 2) == 1) {
for( j = block_size/2;j > 0;j = j/2){
neighour_data = threadIdx.x ^ j;//find the pair data
if(neighour_data > threadIdx.x && smem[threadIdx.x] < smem[neighour_data]){//exchange data by low thread
temp = smem[threadIdx.x];
smem[threadIdx.x] = smem[neighour_data];
smem[neighour_data] = temp;
}
__syncthreads();
}
j = 256;
neighour_data = threadIdx.x ^ j;//find the pair data
if(neighour_data > threadIdx.x && smem[threadIdx.x] < smem[neighour_data]){//exchange data by low thread
temp = smem[threadIdx.x];
smem[threadIdx.x] = smem[neighour_data];
smem[neighour_data] = temp;
}
__syncthreads();
j = 128;
neighour_data = threadIdx.x ^ j;//find the pair data
if(neighour_data > threadIdx.x && smem[threadIdx.x] < smem[neighour_data]){//exchange data by low thread
temp = smem[threadIdx.x];
smem[threadIdx.x] = smem[neighour_data];
smem[neighour_data] = temp;
}
__syncthreads();
j = 64;
neighour_data = threadIdx.x ^ j;//find the pair data
if(neighour_data > threadIdx.x && smem[threadIdx.x] < smem[neighour_data]){//exchange data by low thread
temp = smem[threadIdx.x];
smem[threadIdx.x] = smem[neighour_data];
smem[neighour_data] = temp;
}
__syncthreads();
j = 32;
neighour_data = threadIdx.x ^ j;//find the pair data
if(neighour_data > threadIdx.x && smem[threadIdx.x] < smem[neighour_data]){//exchange data by low thread
temp = smem[threadIdx.x];
smem[threadIdx.x] = smem[neighour_data];
smem[neighour_data] = temp;
}
__syncthreads();
j = 16;
neighour_data = threadIdx.x ^ j;//find the pair data
if(neighour_data > threadIdx.x && smem[threadIdx.x] < smem[neighour_data]){//exchange data by low thread
temp = smem[threadIdx.x];
smem[threadIdx.x] = smem[neighour_data];
smem[neighour_data] = temp;
}
__syncthreads();
j = 8;
neighour_data = threadIdx.x ^ j;//find the pair data
if(neighour_data > threadIdx.x && smem[threadIdx.x] < smem[neighour_data]){//exchange data by low thread
temp = smem[threadIdx.x];
smem[threadIdx.x] = smem[neighour_data];
smem[neighour_data] = temp;
}
__syncthreads();
j = 4;
neighour_data = threadIdx.x ^ j;//find the pair data
if(neighour_data > threadIdx.x && smem[threadIdx.x] < smem[neighour_data]){//exchange data by low thread
temp = smem[threadIdx.x];
smem[threadIdx.x] = smem[neighour_data];
smem[neighour_data] = temp;
}
__syncthreads();
j = 2;
neighour_data = threadIdx.x ^ j;//find the pair data
if(neighour_data > threadIdx.x && smem[threadIdx.x] < smem[neighour_data]){//exchange data by low thread
temp = smem[threadIdx.x];
smem[threadIdx.x] = smem[neighour_data];
smem[neighour_data] = temp;
}
__syncthreads();
j = 1;
neighour_data = threadIdx.x ^ j;//find the pair data
if(neighour_data > threadIdx.x && smem[threadIdx.x] < smem[neighour_data]){//exchange data by low thread
temp = smem[threadIdx.x];
smem[threadIdx.x] = smem[neighour_data];
smem[neighour_data] = temp;
}
__syncthreads();
}
data[tid] = smem[threadIdx.x];
}
__host__ void unroll_shared_less_call4(int data_size,float *cuda_data,int block_size){
shared_sort<<<(data_size%block_size == 0) ? data_size/block_size : data_size/block_size + 1,block_size,block_size*sizeof(float)>>>(cuda_data,data_size);
if(block_size < data_size){
for(int i = block_size*2 ;i <= data_size;i *=2){
for(int j = i/2;j >= block_size;j = j/2){//calc for the neighborhood
naive_bitonic_sort<<<(data_size%block_size == 0) ? data_size/block_size : data_size/block_size + 1, block_size>>>(cuda_data,i,j);
}
unroll_shared_merge2bitonic_sort2<<<(data_size%(block_size) == 0)?data_size/(block_size):data_size/(block_size)+1,(block_size),block_size*sizeof(float)>>>(cuda_data,data_size,i,block_size);
}
}
}
int main(){
int block_size = 1024;
hipSetDevice(1);
int whole_size = 1000000;
float *data_cpu = new float[whole_size];
get_random(data_cpu,whole_size);
//padding
int data_size = 1;
int n = 0;
while(data_size < whole_size){
n ++;
data_size*=2;
}
float *cuda_data,*cuda_data2,*cuda_data3,*cuda_data4,*cuda_data5,*cuda_data6,*cuda_data7,*cuda_data8;
float *result_data = new float[whole_size];
hipMalloc((void **) &cuda_data,data_size*sizeof(float));
hipMalloc((void **) &cuda_data2,data_size*sizeof(float));
hipMalloc((void **) &cuda_data3,data_size*sizeof(float));
hipMalloc((void **) &cuda_data4,data_size*sizeof(float));
hipMalloc((void **) &cuda_data5,data_size*sizeof(float));
hipMalloc((void **) &cuda_data6,data_size*sizeof(float));
hipMalloc((void **) &cuda_data7,data_size*sizeof(float));
hipMalloc((void **) &cuda_data8,data_size*sizeof(float));
hipMemcpy(cuda_data, data_cpu, whole_size*sizeof(float),hipMemcpyHostToDevice);
float start = clock();
naive_call(data_size,cuda_data,1024);
hipDeviceSynchronize();
float end = clock();
cout << "data_size : " << data_size <<" GPU naive bitonic sort time :" << float(end-start) * 1000.0/CLOCKS_PER_SEC << " ms" << endl;
hipMemcpy(result_data, cuda_data + data_size - whole_size, whole_size*sizeof(float),hipMemcpyDeviceToHost);
for(int i = whole_size - 10;i < whole_size;i ++){
printf("%.1f ", result_data[i]);
}
cout << endl;
cout << "Right or false? " <<isIncreased(result_data,whole_size) << endl;
hipMemcpy(cuda_data2, data_cpu, whole_size*sizeof(float),hipMemcpyHostToDevice);
start = clock();
less_call(data_size,cuda_data2,256);
hipDeviceSynchronize();
end = clock();
cout << "data_size : " << data_size <<" GPU merge1 bitonic sort time :" << float(end-start) * 1000.0/CLOCKS_PER_SEC << " ms" << endl;
float *result_data2 = new float[whole_size];
hipMemcpy(result_data2, cuda_data2 + data_size - whole_size, whole_size*sizeof(float),hipMemcpyDeviceToHost);
cout << "Right or false? " <<isIncreased(result_data2,whole_size) << endl;
for(int i = whole_size - 10;i < whole_size;i ++){
printf("%.1f ", result_data2[i]);
}
cout << endl;
hipMemcpy(cuda_data3, data_cpu, whole_size*sizeof(float),hipMemcpyHostToDevice);
start = clock();
less_call2(data_size,cuda_data3,256);
hipDeviceSynchronize();
end = clock();
cout << "data_size : " << data_size <<" GPU merge2 bitonic sort time :" << float(end-start) * 1000.0/CLOCKS_PER_SEC << " ms" << endl;
float *result_data3 = new float[whole_size];
hipMemcpy(result_data3, cuda_data3 + data_size - whole_size, whole_size*sizeof(float),hipMemcpyDeviceToHost);
cout << "Right or false? " <<isIncreased(result_data3,whole_size) << endl;
for(int i = whole_size - 10;i < whole_size;i ++){
printf("%.1f ", result_data3[i]);
}
cout << endl;
hipMemcpy(cuda_data4, data_cpu, whole_size*sizeof(float),hipMemcpyHostToDevice);
start = clock();
shared_less_call(data_size,cuda_data4,256);
hipDeviceSynchronize();
end = clock();
cout << "data_size : " << data_size <<" GPU shared + merge1 bitonic sort time :" << float(end-start) * 1000.0/CLOCKS_PER_SEC << " ms" << endl;
float *result_data4 = new float[whole_size];
hipMemcpy(result_data4, cuda_data4 + data_size - whole_size, whole_size*sizeof(float),hipMemcpyDeviceToHost);
cout << "Right or false? " <<isIncreased(result_data4,whole_size) << endl;
for(int i = whole_size - 10;i < whole_size;i ++){
printf("%.1f ", result_data4[i]);
}
cout << endl;
hipMemcpy(cuda_data5, data_cpu, whole_size*sizeof(float),hipMemcpyHostToDevice);
start = clock();
shared_less_call2(data_size,cuda_data5,256);
hipDeviceSynchronize();
end = clock();
cout << "data_size : " << data_size <<" GPU shared + merge2 bitonic sort time :" << float(end-start) * 1000.0/CLOCKS_PER_SEC << " ms" << endl;
float *result_data5 = new float[whole_size];
hipMemcpy(result_data5, cuda_data5 + data_size - whole_size, whole_size*sizeof(float),hipMemcpyDeviceToHost);
cout << "Right or false? " <<isIncreased(result_data5,whole_size) << endl;
for(int i = whole_size - 10;i < whole_size;i ++){
printf("%.1f ", result_data5[i]);
}
cout << endl;
hipMemcpy(cuda_data6, data_cpu, whole_size*sizeof(float),hipMemcpyHostToDevice);
start = clock();
shared_less_call3(data_size,cuda_data6,256);
hipDeviceSynchronize();
end = clock();
cout << "data_size : " << data_size <<" GPU shared2 + merge2 bitonic sort time :" << float(end-start) * 1000.0/CLOCKS_PER_SEC << " ms" << endl;
float *result_data6 = new float[whole_size];
hipMemcpy(result_data6, cuda_data6 + data_size - whole_size, whole_size*sizeof(float),hipMemcpyDeviceToHost);
cout << "Right or false? " <<isIncreased(result_data6,whole_size) << endl;
for(int i = whole_size - 10;i < whole_size;i ++){
printf("%.1f ", result_data6[i]);
}
cout << endl;
hipMemcpy(cuda_data7, data_cpu, whole_size*sizeof(float),hipMemcpyHostToDevice);
start = clock();
shared_less_call4(data_size,cuda_data7,256);
hipDeviceSynchronize();
end = clock();
cout << "block : " << 256 <<" GPU change order shared2 + merge2 bitonic sort time :" << float(end-start) * 1000.0/CLOCKS_PER_SEC << " ms" << endl;
float *result_data7 = new float[whole_size];
hipMemcpy(result_data7, cuda_data7 + data_size - whole_size, whole_size*sizeof(float),hipMemcpyDeviceToHost);
cout << "Right or false? " <<isIncreased(result_data7,whole_size) << endl;
for(int i = whole_size - 10;i < whole_size;i ++){
printf("%.1f ", result_data7[i]);
}
cout << endl;
hipMemcpy(cuda_data8, data_cpu, whole_size*sizeof(float),hipMemcpyHostToDevice);
start = clock();
unroll_shared_less_call4(data_size,cuda_data8,512);
hipDeviceSynchronize();
end = clock();
cout << "data_size : " << data_size <<" GPU unroll change order shared2 + merge2 bitonic sort time :" << float(end-start) * 1000.0/CLOCKS_PER_SEC << " ms" << endl;
float *result_data8 = new float[whole_size];
hipMemcpy(result_data8, cuda_data8 + data_size - whole_size, whole_size*sizeof(float),hipMemcpyDeviceToHost);
cout << "Right or false? " <<isIncreased(result_data8,whole_size) << endl;
for(int i = whole_size - 10;i < whole_size;i ++){
printf("%.1f ", result_data8[i]);
}
cout << endl;
hipFree(cuda_data);
// cudaFree(cuda_data1);
// cudaFree(cuda_data2);
// cudaFree(cuda_data3);
// cudaFree(cuda_data4);
// cudaFree(cuda_data5);
} |
You are a helpful coding assistant specialized in converting CUDA source code to CUDA device assembly. | #include "cuda_runtime.h"
#include "device_launch_parameters.h"
#include "cuda.h"
#include "device_atomic_functions.h"
#include <stdio.h>
#include "Bfs.cuh"
__global__ void bfs_kernel(unsigned int* current_set, unsigned int* new_set,
int current_set_size, int* current_set_size_new,
Node* node_list, Edge* edge_list, int* color, int* cost, int level)
{
// get tread number
int tid = blockIdx.x * blockDim.x + threadIdx.x;
for (int j = tid; j<current_set_size; j += blockDim.x*gridDim.x) {
unsigned int index = current_set[j];// get one from the current set
current_set[j] = 0; // make it not visited
cost[index] = level;
Node cur_node = node_list[index];
// all adjacent vertices
for (int i = cur_node.start; i < cur_node.start + cur_node.edge_num; i++)
{
unsigned int id = edge_list[i].dest;
int old_color = atomicExch((int*)&color[id], BLACK);// visit adjacent node
if (old_color == WHITE) { // was not visited
int write_position = atomicAdd((int*) &(*current_set_size_new), 1);
new_set[write_position] = id; // add to set of the next level
}
}
}
}
void callBFSKernel(const unsigned int blocks,
const unsigned int threadsPerBlock,
unsigned int* current_set, unsigned int* new_set,
int current_set_size, int* current_set_size_new,
Node* node_list, Edge* edge_list, int* color, int* cost, int level)
{
bfs_kernel << <blocks, threadsPerBlock >> > (current_set, new_set, current_set_size,
current_set_size_new, node_list, edge_list, color, cost, level);
} | code for sm_80
Function : _Z10bfs_kernelPjS_iPiP6node_tP6edge_tS0_S0_i
.headerflags @"EF_CUDA_TEXMODE_UNIFIED EF_CUDA_64BIT_ADDRESS EF_CUDA_SM80 EF_CUDA_VIRTUAL_SM(EF_CUDA_SM80)"
/*0000*/ IMAD.MOV.U32 R1, RZ, RZ, c[0x0][0x28] ; /* 0x00000a00ff017624 */
/* 0x000fe400078e00ff */
/*0010*/ S2R R0, SR_CTAID.X ; /* 0x0000000000007919 */
/* 0x000e280000002500 */
/*0020*/ S2R R3, SR_TID.X ; /* 0x0000000000037919 */
/* 0x000e240000002100 */
/*0030*/ IMAD R0, R0, c[0x0][0x0], R3 ; /* 0x0000000000007a24 */
/* 0x001fca00078e0203 */
/*0040*/ ISETP.GE.AND P0, PT, R0, c[0x0][0x170], PT ; /* 0x00005c0000007a0c */
/* 0x000fda0003f06270 */
/*0050*/ @P0 EXIT ; /* 0x000000000000094d */
/* 0x000fea0003800000 */
/*0060*/ IMAD.MOV.U32 R5, RZ, RZ, 0x4 ; /* 0x00000004ff057424 */
/* 0x000fe200078e00ff */
/*0070*/ YIELD ; /* 0x0000000000007946 */
/* 0x000fe20003800000 */
/*0080*/ ULDC.64 UR4, c[0x0][0x118] ; /* 0x0000460000047ab9 */
/* 0x000fe40000000a00 */
/*0090*/ IMAD.WIDE R6, R0, R5, c[0x0][0x160] ; /* 0x0000580000067625 */
/* 0x000fca00078e0205 */
/*00a0*/ LDG.E R12, [R6.64] ; /* 0x00000004060c7981 */
/* 0x000ea2000c1e1900 */
/*00b0*/ IMAD.MOV.U32 R2, RZ, RZ, 0x8 ; /* 0x00000008ff027424 */
/* 0x000fe400078e00ff */
/*00c0*/ IMAD.MOV.U32 R15, RZ, RZ, c[0x0][0x1a0] ; /* 0x00006800ff0f7624 */
/* 0x000fe200078e00ff */
/*00d0*/ STG.E [R6.64], RZ ; /* 0x000000ff06007986 */
/* 0x0001e2000c101904 */
/*00e0*/ IMAD.WIDE.U32 R8, R12, R5, c[0x0][0x198] ; /* 0x000066000c087625 */
/* 0x004fc800078e0005 */
/*00f0*/ IMAD.WIDE.U32 R12, R12, R2, c[0x0][0x180] ; /* 0x000060000c0c7625 */
/* 0x000fe200078e0002 */
/*0100*/ STG.E [R8.64], R15 ; /* 0x0000000f08007986 */
/* 0x0001e8000c101904 */
/*0110*/ LDG.E R10, [R12.64] ; /* 0x000000040c0a7981 */
/* 0x000ea8000c1e1900 */
/*0120*/ LDG.E R11, [R12.64+0x4] ; /* 0x000004040c0b7981 */
/* 0x000ea2000c1e1900 */
/*0130*/ BSSY B1, 0xd00 ; /* 0x00000bc000017945 */
/* 0x000fe20003800000 */
/*0140*/ IADD3 R3, R10, R11, RZ ; /* 0x0000000b0a037210 */
/* 0x004fc80007ffe0ff */
/*0150*/ ISETP.GE.U32.AND P0, PT, R10, R3, PT ; /* 0x000000030a00720c */
/* 0x000fda0003f06070 */
/*0160*/ @P0 BRA 0xcf0 ; /* 0x00000b8000000947 */
/* 0x000fea0003800000 */
/*0170*/ LOP3.LUT P0, R17, R11, 0x3, RZ, 0xc0, !PT ; /* 0x000000030b117812 */
/* 0x001fe2000780c0ff */
/*0180*/ BSSY B0, 0x690 ; /* 0x0000050000007945 */
/* 0x000fe20003800000 */
/*0190*/ IMAD.MOV.U32 R4, RZ, RZ, R10 ; /* 0x000000ffff047224 */
/* 0x000fd600078e000a */
/*01a0*/ @!P0 BRA 0x680 ; /* 0x000004d000008947 */
/* 0x000fea0003800000 */
/*01b0*/ IMAD.WIDE R6, R10, R2, c[0x0][0x188] ; /* 0x000062000a067625 */
/* 0x000fe200078e0202 */
/*01c0*/ ULDC.64 UR4, c[0x0][0x118] ; /* 0x0000460000047ab9 */
/* 0x000fc80000000a00 */
/*01d0*/ LDG.E R18, [R6.64] ; /* 0x0000000406127981 */
/* 0x000ea2000c1e1900 */
/*01e0*/ IMAD.MOV.U32 R12, RZ, RZ, 0x2 ; /* 0x00000002ff0c7424 */
/* 0x000fe400078e00ff */
/*01f0*/ IMAD.WIDE.U32 R14, R18, R5, c[0x0][0x190] ; /* 0x00006400120e7625 */
/* 0x004fcc00078e0005 */
/*0200*/ ATOMG.E.EXCH.STRONG.GPU PT, R14, [R14.64], R12 ; /* 0x0000000c0e0e79a8 */
/* 0x000ea2000c1ee1c4 */
/*0210*/ BSSY B2, 0x360 ; /* 0x0000014000027945 */
/* 0x000fe20003800000 */
/*0220*/ ISETP.NE.AND P0, PT, R17, 0x1, PT ; /* 0x000000011100780c */
/* 0x000fe20003f05270 */
/*0230*/ IMAD.MOV.U32 R8, RZ, RZ, c[0x0][0x178] ; /* 0x00005e00ff087624 */
/* 0x000fe200078e00ff */
/*0240*/ MOV R9, c[0x0][0x17c] ; /* 0x00005f0000097a02 */
/* 0x000fe40000000f00 */
/*0250*/ ISETP.NE.AND P1, PT, R14, RZ, PT ; /* 0x000000ff0e00720c */
/* 0x004fda0003f25270 */
/*0260*/ @P1 BRA 0x350 ; /* 0x000000e000001947 */
/* 0x000fea0003800000 */
/*0270*/ S2R R15, SR_LANEID ; /* 0x00000000000f7919 */
/* 0x000e220000000000 */
/*0280*/ VOTEU.ANY UR4, UPT, PT ; /* 0x0000000000047886 */
/* 0x000fe400038e0100 */
/*0290*/ FLO.U32 R4, UR4 ; /* 0x0000000400047d00 */
/* 0x000e2200080e0000 */
/*02a0*/ ULDC.64 UR6, c[0x0][0x118] ; /* 0x0000460000067ab9 */
/* 0x000fce0000000a00 */
/*02b0*/ POPC R13, UR4 ; /* 0x00000004000d7d09 */
/* 0x000e620008000000 */
/*02c0*/ ISETP.EQ.U32.AND P1, PT, R4, R15, PT ; /* 0x0000000f0400720c */
/* 0x001fda0003f22070 */
/*02d0*/ @P1 ATOMG.E.ADD.STRONG.GPU PT, R13, [R8.64], R13 ; /* 0x0000000d080d19a8 */
/* 0x002ea800081ee1c6 */
/*02e0*/ S2R R15, SR_LTMASK ; /* 0x00000000000f7919 */
/* 0x000e240000003900 */
/*02f0*/ LOP3.LUT R16, R15, UR4, RZ, 0xc0, !PT ; /* 0x000000040f107c12 */
/* 0x001fc8000f8ec0ff */
/*0300*/ POPC R15, R16 ; /* 0x00000010000f7309 */
/* 0x000e220000000000 */
/*0310*/ SHFL.IDX PT, R14, R13, R4, 0x1f ; /* 0x00001f040d0e7589 */
/* 0x004e2400000e0000 */
/*0320*/ IMAD.IADD R14, R14, 0x1, R15 ; /* 0x000000010e0e7824 */
/* 0x001fc800078e020f */
/*0330*/ IMAD.WIDE R14, R14, R5, c[0x0][0x168] ; /* 0x00005a000e0e7625 */
/* 0x000fca00078e0205 */
/*0340*/ STG.E [R14.64], R18 ; /* 0x000000120e007986 */
/* 0x0001e4000c101906 */
/*0350*/ BSYNC B2 ; /* 0x0000000000027941 */
/* 0x000fea0003800000 */
/*0360*/ IADD3 R4, R10, 0x1, RZ ; /* 0x000000010a047810 */
/* 0x000fe20007ffe0ff */
/*0370*/ @!P0 BRA 0x680 ; /* 0x0000030000008947 */
/* 0x000fea0003800000 */
/*0380*/ ULDC.64 UR4, c[0x0][0x118] ; /* 0x0000460000047ab9 */
/* 0x000fe40000000a00 */
/*0390*/ LDG.E R18, [R6.64+0x8] ; /* 0x0000080406127981 */
/* 0x001ea4000c1e1900 */
/*03a0*/ IMAD.WIDE.U32 R14, R18, R5, c[0x0][0x190] ; /* 0x00006400120e7625 */
/* 0x004fcc00078e0005 */
/*03b0*/ ATOMG.E.EXCH.STRONG.GPU PT, R14, [R14.64], R12 ; /* 0x0000000c0e0e79a8 */
/* 0x000ea2000c1ee1c4 */
/*03c0*/ BSSY B2, 0x4f0 ; /* 0x0000012000027945 */
/* 0x000fe20003800000 */
/*03d0*/ ISETP.NE.AND P0, PT, R17, 0x2, PT ; /* 0x000000021100780c */
/* 0x000fe40003f05270 */
/*03e0*/ ISETP.NE.AND P1, PT, R14, RZ, PT ; /* 0x000000ff0e00720c */
/* 0x004fda0003f25270 */
/*03f0*/ @P1 BRA 0x4e0 ; /* 0x000000e000001947 */
/* 0x000fea0003800000 */
/*0400*/ S2R R15, SR_LANEID ; /* 0x00000000000f7919 */
/* 0x000e220000000000 */
/*0410*/ VOTEU.ANY UR4, UPT, PT ; /* 0x0000000000047886 */
/* 0x000fe400038e0100 */
/*0420*/ FLO.U32 R4, UR4 ; /* 0x0000000400047d00 */
/* 0x000e2200080e0000 */
/*0430*/ ULDC.64 UR6, c[0x0][0x118] ; /* 0x0000460000067ab9 */
/* 0x000fce0000000a00 */
/*0440*/ POPC R13, UR4 ; /* 0x00000004000d7d09 */
/* 0x000e620008000000 */
/*0450*/ ISETP.EQ.U32.AND P1, PT, R4, R15, PT ; /* 0x0000000f0400720c */
/* 0x001fda0003f22070 */
/*0460*/ @P1 ATOMG.E.ADD.STRONG.GPU PT, R13, [R8.64], R13 ; /* 0x0000000d080d19a8 */
/* 0x002ea800081ee1c6 */
/*0470*/ S2R R16, SR_LTMASK ; /* 0x0000000000107919 */
/* 0x000e240000003900 */
/*0480*/ LOP3.LUT R16, R16, UR4, RZ, 0xc0, !PT ; /* 0x0000000410107c12 */
/* 0x001fc8000f8ec0ff */
/*0490*/ POPC R15, R16 ; /* 0x00000010000f7309 */
/* 0x000e220000000000 */
/*04a0*/ SHFL.IDX PT, R14, R13, R4, 0x1f ; /* 0x00001f040d0e7589 */
/* 0x004e2400000e0000 */
/*04b0*/ IMAD.IADD R14, R14, 0x1, R15 ; /* 0x000000010e0e7824 */
/* 0x001fc800078e020f */
/*04c0*/ IMAD.WIDE R14, R14, R5, c[0x0][0x168] ; /* 0x00005a000e0e7625 */
/* 0x000fca00078e0205 */
/*04d0*/ STG.E [R14.64], R18 ; /* 0x000000120e007986 */
/* 0x0001e4000c101906 */
/*04e0*/ BSYNC B2 ; /* 0x0000000000027941 */
/* 0x000fea0003800000 */
/*04f0*/ IADD3 R4, R10, 0x2, RZ ; /* 0x000000020a047810 */
/* 0x000fe20007ffe0ff */
/*0500*/ @!P0 BRA 0x680 ; /* 0x0000017000008947 */
/* 0x000fea0003800000 */
/*0510*/ ULDC.64 UR4, c[0x0][0x118] ; /* 0x0000460000047ab9 */
/* 0x000fe40000000a00 */
/*0520*/ LDG.E R16, [R6.64+0x10] ; /* 0x0000100406107981 */
/* 0x000ea4000c1e1900 */
/*0530*/ IMAD.WIDE.U32 R14, R16, R5, c[0x0][0x190] ; /* 0x00006400100e7625 */
/* 0x005fcc00078e0005 */
/*0540*/ ATOMG.E.EXCH.STRONG.GPU PT, R14, [R14.64], R12 ; /* 0x0000000c0e0e79a8 */
/* 0x000ea2000c1ee1c4 */
/*0550*/ BSSY B2, 0x670 ; /* 0x0000011000027945 */
/* 0x000fe20003800000 */
/*0560*/ ISETP.NE.AND P0, PT, R14, RZ, PT ; /* 0x000000ff0e00720c */
/* 0x004fda0003f05270 */
/*0570*/ @P0 BRA 0x660 ; /* 0x000000e000000947 */
/* 0x000fea0003800000 */
/*0580*/ S2R R13, SR_LANEID ; /* 0x00000000000d7919 */
/* 0x000e220000000000 */
/*0590*/ VOTEU.ANY UR4, UPT, PT ; /* 0x0000000000047886 */
/* 0x000fe400038e0100 */
/*05a0*/ FLO.U32 R6, UR4 ; /* 0x0000000400067d00 */
/* 0x000e2200080e0000 */
/*05b0*/ ULDC.64 UR6, c[0x0][0x118] ; /* 0x0000460000067ab9 */
/* 0x000fce0000000a00 */
/*05c0*/ POPC R7, UR4 ; /* 0x0000000400077d09 */
/* 0x000e620008000000 */
/*05d0*/ ISETP.EQ.U32.AND P0, PT, R6, R13, PT ; /* 0x0000000d0600720c */
/* 0x001fda0003f02070 */
/*05e0*/ @P0 ATOMG.E.ADD.STRONG.GPU PT, R7, [R8.64], R7 ; /* 0x00000007080709a8 */
/* 0x002ea800081ee1c6 */
/*05f0*/ S2R R12, SR_LTMASK ; /* 0x00000000000c7919 */
/* 0x000e240000003900 */
/*0600*/ LOP3.LUT R12, R12, UR4, RZ, 0xc0, !PT ; /* 0x000000040c0c7c12 */
/* 0x001fc8000f8ec0ff */
/*0610*/ POPC R13, R12 ; /* 0x0000000c000d7309 */
/* 0x000e220000000000 */
/*0620*/ SHFL.IDX PT, R4, R7, R6, 0x1f ; /* 0x00001f0607047589 */
/* 0x004e2400000e0000 */
/*0630*/ IMAD.IADD R4, R4, 0x1, R13 ; /* 0x0000000104047824 */
/* 0x001fc800078e020d */
/*0640*/ IMAD.WIDE R4, R4, R5, c[0x0][0x168] ; /* 0x00005a0004047625 */
/* 0x000fca00078e0205 */
/*0650*/ STG.E [R4.64], R16 ; /* 0x0000001004007986 */
/* 0x0001e4000c101906 */
/*0660*/ BSYNC B2 ; /* 0x0000000000027941 */
/* 0x000fea0003800000 */
/*0670*/ IADD3 R4, R10, 0x3, RZ ; /* 0x000000030a047810 */
/* 0x001fe40007ffe0ff */
/*0680*/ BSYNC B0 ; /* 0x0000000000007941 */
/* 0x000fea0003800000 */
/*0690*/ IADD3 R11, R11, -0x1, RZ ; /* 0xffffffff0b0b7810 */
/* 0x000fc80007ffe0ff */
/*06a0*/ ISETP.GE.U32.AND P0, PT, R11, 0x3, PT ; /* 0x000000030b00780c */
/* 0x000fda0003f06070 */
/*06b0*/ @!P0 BRA 0xcf0 ; /* 0x0000063000008947 */
/* 0x000fea0003800000 */
/*06c0*/ IMAD.WIDE R8, R4, R2, c[0x0][0x188] ; /* 0x0000620004087625 */
/* 0x000fe200078e0202 */
/*06d0*/ MOV R6, c[0x0][0x178] ; /* 0x00005e0000067a02 */
/* 0x000fc60000000f00 */
/*06e0*/ IMAD.MOV.U32 R7, RZ, RZ, c[0x0][0x17c] ; /* 0x00005f00ff077624 */
/* 0x000fe400078e00ff */
/*06f0*/ YIELD ; /* 0x0000000000007946 */
/* 0x000fe20003800000 */
/*0700*/ ULDC.64 UR4, c[0x0][0x118] ; /* 0x0000460000047ab9 */
/* 0x000fe40000000a00 */
/*0710*/ LDG.E R15, [R8.64] ; /* 0x00000004080f7981 */
/* 0x001ea2000c1e1900 */
/*0720*/ IMAD.MOV.U32 R2, RZ, RZ, 0x4 ; /* 0x00000004ff027424 */
/* 0x000fe400078e00ff */
/*0730*/ IMAD.MOV.U32 R5, RZ, RZ, 0x2 ; /* 0x00000002ff057424 */
/* 0x000fe400078e00ff */
/*0740*/ IMAD.WIDE.U32 R10, R15, R2, c[0x0][0x190] ; /* 0x000064000f0a7625 */
/* 0x004fcc00078e0002 */
/*0750*/ ATOMG.E.EXCH.STRONG.GPU PT, R10, [R10.64], R5 ; /* 0x000000050a0a79a8 */
/* 0x000ea2000c1ee1c4 */
/*0760*/ BSSY B0, 0x880 ; /* 0x0000011000007945 */
/* 0x000fe20003800000 */
/*0770*/ ISETP.NE.AND P0, PT, R10, RZ, PT ; /* 0x000000ff0a00720c */
/* 0x004fda0003f05270 */
/*0780*/ @P0 BRA 0x870 ; /* 0x000000e000000947 */
/* 0x000fea0003800000 */
/*0790*/ S2R R11, SR_LANEID ; /* 0x00000000000b7919 */
/* 0x000e220000000000 */
/*07a0*/ VOTEU.ANY UR4, UPT, PT ; /* 0x0000000000047886 */
/* 0x000fe400038e0100 */
/*07b0*/ FLO.U32 R12, UR4 ; /* 0x00000004000c7d00 */
/* 0x000e2200080e0000 */
/*07c0*/ ULDC.64 UR6, c[0x0][0x118] ; /* 0x0000460000067ab9 */
/* 0x000fce0000000a00 */
/*07d0*/ POPC R13, UR4 ; /* 0x00000004000d7d09 */
/* 0x000e620008000000 */
/*07e0*/ ISETP.EQ.U32.AND P0, PT, R12, R11, PT ; /* 0x0000000b0c00720c */
/* 0x001fda0003f02070 */
/*07f0*/ @P0 ATOMG.E.ADD.STRONG.GPU PT, R13, [R6.64], R13 ; /* 0x0000000d060d09a8 */
/* 0x002ea800081ee1c6 */
/*0800*/ S2R R14, SR_LTMASK ; /* 0x00000000000e7919 */
/* 0x000e240000003900 */
/*0810*/ LOP3.LUT R14, R14, UR4, RZ, 0xc0, !PT ; /* 0x000000040e0e7c12 */
/* 0x001fcc000f8ec0ff */
/*0820*/ POPC R14, R14 ; /* 0x0000000e000e7309 */
/* 0x000e220000000000 */
/*0830*/ SHFL.IDX PT, R11, R13, R12, 0x1f ; /* 0x00001f0c0d0b7589 */
/* 0x004e2400000e0000 */
/*0840*/ IADD3 R11, R11, R14, RZ ; /* 0x0000000e0b0b7210 */
/* 0x001fca0007ffe0ff */
/*0850*/ IMAD.WIDE R10, R11, R2, c[0x0][0x168] ; /* 0x00005a000b0a7625 */
/* 0x000fca00078e0202 */
/*0860*/ STG.E [R10.64], R15 ; /* 0x0000000f0a007986 */
/* 0x0001e4000c101906 */
/*0870*/ BSYNC B0 ; /* 0x0000000000007941 */
/* 0x000fea0003800000 */
/*0880*/ ULDC.64 UR4, c[0x0][0x118] ; /* 0x0000460000047ab9 */
/* 0x000fe40000000a00 */
/*0890*/ LDG.E R15, [R8.64+0x8] ; /* 0x00000804080f7981 */
/* 0x001ea4000c1e1900 */
/*08a0*/ IMAD.WIDE.U32 R10, R15, R2, c[0x0][0x190] ; /* 0x000064000f0a7625 */
/* 0x004fcc00078e0002 */
/*08b0*/ ATOMG.E.EXCH.STRONG.GPU PT, R10, [R10.64], R5 ; /* 0x000000050a0a79a8 */
/* 0x000ea2000c1ee1c4 */
/*08c0*/ BSSY B0, 0x9e0 ; /* 0x0000011000007945 */
/* 0x000fe20003800000 */
/*08d0*/ ISETP.NE.AND P0, PT, R10, RZ, PT ; /* 0x000000ff0a00720c */
/* 0x004fda0003f05270 */
/*08e0*/ @P0 BRA 0x9d0 ; /* 0x000000e000000947 */
/* 0x000fea0003800000 */
/*08f0*/ S2R R11, SR_LANEID ; /* 0x00000000000b7919 */
/* 0x000e220000000000 */
/*0900*/ VOTEU.ANY UR4, UPT, PT ; /* 0x0000000000047886 */
/* 0x000fe400038e0100 */
/*0910*/ FLO.U32 R12, UR4 ; /* 0x00000004000c7d00 */
/* 0x000e2200080e0000 */
/*0920*/ ULDC.64 UR6, c[0x0][0x118] ; /* 0x0000460000067ab9 */
/* 0x000fce0000000a00 */
/*0930*/ POPC R13, UR4 ; /* 0x00000004000d7d09 */
/* 0x000e620008000000 */
/*0940*/ ISETP.EQ.U32.AND P0, PT, R12, R11, PT ; /* 0x0000000b0c00720c */
/* 0x001fda0003f02070 */
/*0950*/ @P0 ATOMG.E.ADD.STRONG.GPU PT, R13, [R6.64], R13 ; /* 0x0000000d060d09a8 */
/* 0x002ea800081ee1c6 */
/*0960*/ S2R R14, SR_LTMASK ; /* 0x00000000000e7919 */
/* 0x000e240000003900 */
/*0970*/ LOP3.LUT R14, R14, UR4, RZ, 0xc0, !PT ; /* 0x000000040e0e7c12 */
/* 0x001fcc000f8ec0ff */
/*0980*/ POPC R14, R14 ; /* 0x0000000e000e7309 */
/* 0x000e220000000000 */
/*0990*/ SHFL.IDX PT, R11, R13, R12, 0x1f ; /* 0x00001f0c0d0b7589 */
/* 0x004e2400000e0000 */
/*09a0*/ IMAD.IADD R11, R11, 0x1, R14 ; /* 0x000000010b0b7824 */
/* 0x001fc800078e020e */
/*09b0*/ IMAD.WIDE R10, R11, R2, c[0x0][0x168] ; /* 0x00005a000b0a7625 */
/* 0x000fca00078e0202 */
/*09c0*/ STG.E [R10.64], R15 ; /* 0x0000000f0a007986 */
/* 0x0001e4000c101906 */
/*09d0*/ BSYNC B0 ; /* 0x0000000000007941 */
/* 0x000fea0003800000 */
/*09e0*/ ULDC.64 UR4, c[0x0][0x118] ; /* 0x0000460000047ab9 */
/* 0x000fe40000000a00 */
/*09f0*/ LDG.E R15, [R8.64+0x10] ; /* 0x00001004080f7981 */
/* 0x001ea4000c1e1900 */
/*0a00*/ IMAD.WIDE.U32 R10, R15, R2, c[0x0][0x190] ; /* 0x000064000f0a7625 */
/* 0x004fcc00078e0002 */
/*0a10*/ ATOMG.E.EXCH.STRONG.GPU PT, R10, [R10.64], R5 ; /* 0x000000050a0a79a8 */
/* 0x000ea2000c1ee1c4 */
/*0a20*/ BSSY B0, 0xb40 ; /* 0x0000011000007945 */
/* 0x000fe20003800000 */
/*0a30*/ ISETP.NE.AND P0, PT, R10, RZ, PT ; /* 0x000000ff0a00720c */
/* 0x004fda0003f05270 */
/*0a40*/ @P0 BRA 0xb30 ; /* 0x000000e000000947 */
/* 0x000fea0003800000 */
/*0a50*/ S2R R11, SR_LANEID ; /* 0x00000000000b7919 */
/* 0x000e220000000000 */
/*0a60*/ VOTEU.ANY UR4, UPT, PT ; /* 0x0000000000047886 */
/* 0x000fe400038e0100 */
/*0a70*/ FLO.U32 R12, UR4 ; /* 0x00000004000c7d00 */
/* 0x000e2200080e0000 */
/*0a80*/ ULDC.64 UR6, c[0x0][0x118] ; /* 0x0000460000067ab9 */
/* 0x000fce0000000a00 */
/*0a90*/ POPC R13, UR4 ; /* 0x00000004000d7d09 */
/* 0x000e620008000000 */
/*0aa0*/ ISETP.EQ.U32.AND P0, PT, R12, R11, PT ; /* 0x0000000b0c00720c */
/* 0x001fda0003f02070 */
/*0ab0*/ @P0 ATOMG.E.ADD.STRONG.GPU PT, R13, [R6.64], R13 ; /* 0x0000000d060d09a8 */
/* 0x002ea800081ee1c6 */
/*0ac0*/ S2R R14, SR_LTMASK ; /* 0x00000000000e7919 */
/* 0x000e240000003900 */
/*0ad0*/ LOP3.LUT R14, R14, UR4, RZ, 0xc0, !PT ; /* 0x000000040e0e7c12 */
/* 0x001fcc000f8ec0ff */
/*0ae0*/ POPC R14, R14 ; /* 0x0000000e000e7309 */
/* 0x000e220000000000 */
/*0af0*/ SHFL.IDX PT, R11, R13, R12, 0x1f ; /* 0x00001f0c0d0b7589 */
/* 0x004e2400000e0000 */
/*0b00*/ IMAD.IADD R11, R11, 0x1, R14 ; /* 0x000000010b0b7824 */
/* 0x001fc800078e020e */
/*0b10*/ IMAD.WIDE R10, R11, R2, c[0x0][0x168] ; /* 0x00005a000b0a7625 */
/* 0x000fca00078e0202 */
/*0b20*/ STG.E [R10.64], R15 ; /* 0x0000000f0a007986 */
/* 0x0001e4000c101906 */
/*0b30*/ BSYNC B0 ; /* 0x0000000000007941 */
/* 0x000fea0003800000 */
/*0b40*/ ULDC.64 UR4, c[0x0][0x118] ; /* 0x0000460000047ab9 */
/* 0x000fe40000000a00 */
/*0b50*/ LDG.E R15, [R8.64+0x18] ; /* 0x00001804080f7981 */
/* 0x001ea4000c1e1900 */
/*0b60*/ IMAD.WIDE.U32 R10, R15, R2, c[0x0][0x190] ; /* 0x000064000f0a7625 */
/* 0x004fcc00078e0002 */
/*0b70*/ ATOMG.E.EXCH.STRONG.GPU PT, R10, [R10.64], R5 ; /* 0x000000050a0a79a8 */
/* 0x000ea2000c1ee1c4 */
/*0b80*/ IADD3 R4, R4, 0x4, RZ ; /* 0x0000000404047810 */
/* 0x000fe20007ffe0ff */
/*0b90*/ BSSY B0, 0xcc0 ; /* 0x0000012000007945 */
/* 0x000fe60003800000 */
/*0ba0*/ ISETP.GE.U32.AND P0, PT, R4, R3, PT ; /* 0x000000030400720c */
/* 0x000fe40003f06070 */
/*0bb0*/ ISETP.NE.AND P1, PT, R10, RZ, PT ; /* 0x000000ff0a00720c */
/* 0x004fda0003f25270 */
/*0bc0*/ @P1 BRA 0xcb0 ; /* 0x000000e000001947 */
/* 0x000fea0003800000 */
/*0bd0*/ S2R R11, SR_LANEID ; /* 0x00000000000b7919 */
/* 0x000e220000000000 */
/*0be0*/ VOTEU.ANY UR4, UPT, PT ; /* 0x0000000000047886 */
/* 0x000fe400038e0100 */
/*0bf0*/ FLO.U32 R12, UR4 ; /* 0x00000004000c7d00 */
/* 0x000e2200080e0000 */
/*0c00*/ ULDC.64 UR6, c[0x0][0x118] ; /* 0x0000460000067ab9 */
/* 0x000fce0000000a00 */
/*0c10*/ POPC R5, UR4 ; /* 0x0000000400057d09 */
/* 0x000e620008000000 */
/*0c20*/ ISETP.EQ.U32.AND P1, PT, R12, R11, PT ; /* 0x0000000b0c00720c */
/* 0x001fda0003f22070 */
/*0c30*/ @P1 ATOMG.E.ADD.STRONG.GPU PT, R5, [R6.64], R5 ; /* 0x00000005060519a8 */
/* 0x002ea800081ee1c6 */
/*0c40*/ S2R R13, SR_LTMASK ; /* 0x00000000000d7919 */
/* 0x000e240000003900 */
/*0c50*/ LOP3.LUT R13, R13, UR4, RZ, 0xc0, !PT ; /* 0x000000040d0d7c12 */
/* 0x001fc8000f8ec0ff */
/*0c60*/ POPC R10, R13 ; /* 0x0000000d000a7309 */
/* 0x000e220000000000 */
/*0c70*/ SHFL.IDX PT, R11, R5, R12, 0x1f ; /* 0x00001f0c050b7589 */
/* 0x004e2400000e0000 */
/*0c80*/ IMAD.IADD R11, R11, 0x1, R10 ; /* 0x000000010b0b7824 */
/* 0x001fc800078e020a */
/*0c90*/ IMAD.WIDE R10, R11, R2, c[0x0][0x168] ; /* 0x00005a000b0a7625 */
/* 0x000fca00078e0202 */
/*0ca0*/ STG.E [R10.64], R15 ; /* 0x0000000f0a007986 */
/* 0x0001e4000c101906 */
/*0cb0*/ BSYNC B0 ; /* 0x0000000000007941 */
/* 0x000fea0003800000 */
/*0cc0*/ IADD3 R8, P1, R8, 0x20, RZ ; /* 0x0000002008087810 */
/* 0x000fc80007f3e0ff */
/*0cd0*/ IADD3.X R9, RZ, R9, RZ, P1, !PT ; /* 0x00000009ff097210 */
/* 0x000fe20000ffe4ff */
/*0ce0*/ @!P0 BRA 0x6f0 ; /* 0xfffffa0000008947 */
/* 0x000fea000383ffff */
/*0cf0*/ BSYNC B1 ; /* 0x0000000000017941 */
/* 0x001fea0003800000 */
/*0d00*/ IMAD.MOV.U32 R3, RZ, RZ, c[0x0][0x0] ; /* 0x00000000ff037624 */
/* 0x000fc800078e00ff */
/*0d10*/ IMAD R0, R3, c[0x0][0xc], R0 ; /* 0x0000030003007a24 */
/* 0x000fca00078e0200 */
/*0d20*/ ISETP.GE.AND P0, PT, R0, c[0x0][0x170], PT ; /* 0x00005c0000007a0c */
/* 0x000fda0003f06270 */
/*0d30*/ @P0 CALL.REL.NOINC 0xd50 ; /* 0x0000001000000944 */
/* 0x000fe20003c00000 */
/*0d40*/ BRA 0x60 ; /* 0xfffff31000007947 */
/* 0x000fea000383ffff */
/*0d50*/ EXIT ; /* 0x000000000000794d */
/* 0x000fea0003800000 */
/*0d60*/ BRA 0xd60; /* 0xfffffff000007947 */
/* 0x000fc0000383ffff */
/*0d70*/ NOP; /* 0x0000000000007918 */
/* 0x000fc00000000000 */
/*0d80*/ NOP; /* 0x0000000000007918 */
/* 0x000fc00000000000 */
/*0d90*/ NOP; /* 0x0000000000007918 */
/* 0x000fc00000000000 */
/*0da0*/ NOP; /* 0x0000000000007918 */
/* 0x000fc00000000000 */
/*0db0*/ NOP; /* 0x0000000000007918 */
/* 0x000fc00000000000 */
/*0dc0*/ NOP; /* 0x0000000000007918 */
/* 0x000fc00000000000 */
/*0dd0*/ NOP; /* 0x0000000000007918 */
/* 0x000fc00000000000 */
/*0de0*/ NOP; /* 0x0000000000007918 */
/* 0x000fc00000000000 */
/*0df0*/ NOP; /* 0x0000000000007918 */
/* 0x000fc00000000000 */
.......... |
You are a helpful coding assistant specialized in converting CUDA source code to CUDA host assembly. | #include "cuda_runtime.h"
#include "device_launch_parameters.h"
#include "cuda.h"
#include "device_atomic_functions.h"
#include <stdio.h>
#include "Bfs.cuh"
__global__ void bfs_kernel(unsigned int* current_set, unsigned int* new_set,
int current_set_size, int* current_set_size_new,
Node* node_list, Edge* edge_list, int* color, int* cost, int level)
{
// get tread number
int tid = blockIdx.x * blockDim.x + threadIdx.x;
for (int j = tid; j<current_set_size; j += blockDim.x*gridDim.x) {
unsigned int index = current_set[j];// get one from the current set
current_set[j] = 0; // make it not visited
cost[index] = level;
Node cur_node = node_list[index];
// all adjacent vertices
for (int i = cur_node.start; i < cur_node.start + cur_node.edge_num; i++)
{
unsigned int id = edge_list[i].dest;
int old_color = atomicExch((int*)&color[id], BLACK);// visit adjacent node
if (old_color == WHITE) { // was not visited
int write_position = atomicAdd((int*) &(*current_set_size_new), 1);
new_set[write_position] = id; // add to set of the next level
}
}
}
}
void callBFSKernel(const unsigned int blocks,
const unsigned int threadsPerBlock,
unsigned int* current_set, unsigned int* new_set,
int current_set_size, int* current_set_size_new,
Node* node_list, Edge* edge_list, int* color, int* cost, int level)
{
bfs_kernel << <blocks, threadsPerBlock >> > (current_set, new_set, current_set_size,
current_set_size_new, node_list, edge_list, color, cost, level);
} | .file "tmpxft_000f6ca7_00000000-6_Bfs.cudafe1.cpp"
.text
#APP
#NO_APP
.type _ZL26__cudaUnregisterBinaryUtilv, @function
_ZL26__cudaUnregisterBinaryUtilv:
.LFB2060:
.cfi_startproc
endbr64
subq $8, %rsp
.cfi_def_cfa_offset 16
movq _ZL20__cudaFatCubinHandle(%rip), %rdi
call __cudaUnregisterFatBinary@PLT
addq $8, %rsp
.cfi_def_cfa_offset 8
ret
.cfi_endproc
.LFE2060:
.size _ZL26__cudaUnregisterBinaryUtilv, .-_ZL26__cudaUnregisterBinaryUtilv
.globl _Z58__device_stub__Z10bfs_kernelPjS_iPiP6node_tP6edge_tS0_S0_iPjS_iPiP6node_tP6edge_tS0_S0_i
.type _Z58__device_stub__Z10bfs_kernelPjS_iPiP6node_tP6edge_tS0_S0_iPjS_iPiP6node_tP6edge_tS0_S0_i, @function
_Z58__device_stub__Z10bfs_kernelPjS_iPiP6node_tP6edge_tS0_S0_iPjS_iPiP6node_tP6edge_tS0_S0_i:
.LFB2082:
.cfi_startproc
endbr64
subq $216, %rsp
.cfi_def_cfa_offset 224
movq %rdi, 56(%rsp)
movq %rsi, 48(%rsp)
movl %edx, 44(%rsp)
movq %rcx, 32(%rsp)
movq %r8, 24(%rsp)
movq %r9, 16(%rsp)
movq 224(%rsp), %rax
movq %rax, 8(%rsp)
movq 232(%rsp), %rax
movq %rax, (%rsp)
movq %fs:40, %rax
movq %rax, 200(%rsp)
xorl %eax, %eax
leaq 56(%rsp), %rax
movq %rax, 128(%rsp)
leaq 48(%rsp), %rax
movq %rax, 136(%rsp)
leaq 44(%rsp), %rax
movq %rax, 144(%rsp)
leaq 32(%rsp), %rax
movq %rax, 152(%rsp)
leaq 24(%rsp), %rax
movq %rax, 160(%rsp)
leaq 16(%rsp), %rax
movq %rax, 168(%rsp)
leaq 8(%rsp), %rax
movq %rax, 176(%rsp)
movq %rsp, %rax
movq %rax, 184(%rsp)
leaq 240(%rsp), %rax
movq %rax, 192(%rsp)
movl $1, 80(%rsp)
movl $1, 84(%rsp)
movl $1, 88(%rsp)
movl $1, 92(%rsp)
movl $1, 96(%rsp)
movl $1, 100(%rsp)
leaq 72(%rsp), %rcx
leaq 64(%rsp), %rdx
leaq 92(%rsp), %rsi
leaq 80(%rsp), %rdi
call __cudaPopCallConfiguration@PLT
testl %eax, %eax
je .L7
.L3:
movq 200(%rsp), %rax
subq %fs:40, %rax
jne .L8
addq $216, %rsp
.cfi_remember_state
.cfi_def_cfa_offset 8
ret
.L7:
.cfi_restore_state
pushq 72(%rsp)
.cfi_def_cfa_offset 232
pushq 72(%rsp)
.cfi_def_cfa_offset 240
leaq 144(%rsp), %r9
movq 108(%rsp), %rcx
movl 116(%rsp), %r8d
movq 96(%rsp), %rsi
movl 104(%rsp), %edx
leaq _Z10bfs_kernelPjS_iPiP6node_tP6edge_tS0_S0_i(%rip), %rdi
call cudaLaunchKernel@PLT
addq $16, %rsp
.cfi_def_cfa_offset 224
jmp .L3
.L8:
call __stack_chk_fail@PLT
.cfi_endproc
.LFE2082:
.size _Z58__device_stub__Z10bfs_kernelPjS_iPiP6node_tP6edge_tS0_S0_iPjS_iPiP6node_tP6edge_tS0_S0_i, .-_Z58__device_stub__Z10bfs_kernelPjS_iPiP6node_tP6edge_tS0_S0_iPjS_iPiP6node_tP6edge_tS0_S0_i
.globl _Z10bfs_kernelPjS_iPiP6node_tP6edge_tS0_S0_i
.type _Z10bfs_kernelPjS_iPiP6node_tP6edge_tS0_S0_i, @function
_Z10bfs_kernelPjS_iPiP6node_tP6edge_tS0_S0_i:
.LFB2083:
.cfi_startproc
endbr64
subq $16, %rsp
.cfi_def_cfa_offset 24
movl 40(%rsp), %eax
pushq %rax
.cfi_def_cfa_offset 32
pushq 40(%rsp)
.cfi_def_cfa_offset 40
pushq 40(%rsp)
.cfi_def_cfa_offset 48
call _Z58__device_stub__Z10bfs_kernelPjS_iPiP6node_tP6edge_tS0_S0_iPjS_iPiP6node_tP6edge_tS0_S0_i
addq $40, %rsp
.cfi_def_cfa_offset 8
ret
.cfi_endproc
.LFE2083:
.size _Z10bfs_kernelPjS_iPiP6node_tP6edge_tS0_S0_i, .-_Z10bfs_kernelPjS_iPiP6node_tP6edge_tS0_S0_i
.globl _Z13callBFSKerneljjPjS_iPiP6node_tP6edge_tS0_S0_i
.type _Z13callBFSKerneljjPjS_iPiP6node_tP6edge_tS0_S0_i, @function
_Z13callBFSKerneljjPjS_iPiP6node_tP6edge_tS0_S0_i:
.LFB2057:
.cfi_startproc
endbr64
pushq %r13
.cfi_def_cfa_offset 16
.cfi_offset 13, -16
pushq %r12
.cfi_def_cfa_offset 24
.cfi_offset 12, -24
pushq %rbp
.cfi_def_cfa_offset 32
.cfi_offset 6, -32
pushq %rbx
.cfi_def_cfa_offset 40
.cfi_offset 3, -40
subq $40, %rsp
.cfi_def_cfa_offset 80
movq %rdx, %rbx
movq %rcx, %rbp
movl %r8d, %r12d
movq %r9, %r13
movl %esi, 20(%rsp)
movl $1, 24(%rsp)
movl %edi, 8(%rsp)
movl $1, 12(%rsp)
movl $0, %r9d
movl $0, %r8d
movq 20(%rsp), %rdx
movl $1, %ecx
movq 8(%rsp), %rdi
movl $1, %esi
call __cudaPushCallConfiguration@PLT
testl %eax, %eax
je .L14
.L11:
addq $40, %rsp
.cfi_remember_state
.cfi_def_cfa_offset 40
popq %rbx
.cfi_def_cfa_offset 32
popq %rbp
.cfi_def_cfa_offset 24
popq %r12
.cfi_def_cfa_offset 16
popq %r13
.cfi_def_cfa_offset 8
ret
.L14:
.cfi_restore_state
subq $8, %rsp
.cfi_def_cfa_offset 88
movl 120(%rsp), %eax
pushq %rax
.cfi_def_cfa_offset 96
pushq 120(%rsp)
.cfi_def_cfa_offset 104
pushq 120(%rsp)
.cfi_def_cfa_offset 112
movq 120(%rsp), %r9
movq 112(%rsp), %r8
movq %r13, %rcx
movl %r12d, %edx
movq %rbp, %rsi
movq %rbx, %rdi
call _Z58__device_stub__Z10bfs_kernelPjS_iPiP6node_tP6edge_tS0_S0_iPjS_iPiP6node_tP6edge_tS0_S0_i
addq $32, %rsp
.cfi_def_cfa_offset 80
jmp .L11
.cfi_endproc
.LFE2057:
.size _Z13callBFSKerneljjPjS_iPiP6node_tP6edge_tS0_S0_i, .-_Z13callBFSKerneljjPjS_iPiP6node_tP6edge_tS0_S0_i
.section .rodata.str1.8,"aMS",@progbits,1
.align 8
.LC0:
.string "_Z10bfs_kernelPjS_iPiP6node_tP6edge_tS0_S0_i"
.text
.type _ZL24__sti____cudaRegisterAllv, @function
_ZL24__sti____cudaRegisterAllv:
.LFB2085:
.cfi_startproc
endbr64
subq $8, %rsp
.cfi_def_cfa_offset 16
leaq _ZL15__fatDeviceText(%rip), %rdi
call __cudaRegisterFatBinary@PLT
movq %rax, %rdi
movq %rax, _ZL20__cudaFatCubinHandle(%rip)
pushq $0
.cfi_def_cfa_offset 24
pushq $0
.cfi_def_cfa_offset 32
pushq $0
.cfi_def_cfa_offset 40
pushq $0
.cfi_def_cfa_offset 48
movl $0, %r9d
movl $-1, %r8d
leaq .LC0(%rip), %rdx
movq %rdx, %rcx
leaq _Z10bfs_kernelPjS_iPiP6node_tP6edge_tS0_S0_i(%rip), %rsi
call __cudaRegisterFunction@PLT
addq $32, %rsp
.cfi_def_cfa_offset 16
movq _ZL20__cudaFatCubinHandle(%rip), %rdi
call __cudaRegisterFatBinaryEnd@PLT
leaq _ZL26__cudaUnregisterBinaryUtilv(%rip), %rdi
call atexit@PLT
addq $8, %rsp
.cfi_def_cfa_offset 8
ret
.cfi_endproc
.LFE2085:
.size _ZL24__sti____cudaRegisterAllv, .-_ZL24__sti____cudaRegisterAllv
.section .init_array,"aw"
.align 8
.quad _ZL24__sti____cudaRegisterAllv
.section .nvFatBinSegment,"aw"
.align 8
.type _ZL15__fatDeviceText, @object
.size _ZL15__fatDeviceText, 24
_ZL15__fatDeviceText:
.long 1180844977
.long 1
.quad fatbinData
.quad 0
.local _ZL20__cudaFatCubinHandle
.comm _ZL20__cudaFatCubinHandle,8,8
.ident "GCC: (Ubuntu 13.3.0-6ubuntu2~24.04) 13.3.0"
.section .note.GNU-stack,"",@progbits
.section .note.gnu.property,"a"
.align 8
.long 1f - 0f
.long 4f - 1f
.long 5
0:
.string "GNU"
1:
.align 8
.long 0xc0000002
.long 3f - 2f
2:
.long 0x3
3:
.align 8
4: |
You are a helpful coding assistant specialized in converting CUDA source code to HIP/AMD source code. | #include "cuda_runtime.h"
#include "device_launch_parameters.h"
#include "cuda.h"
#include "device_atomic_functions.h"
#include <stdio.h>
#include "Bfs.cuh"
__global__ void bfs_kernel(unsigned int* current_set, unsigned int* new_set,
int current_set_size, int* current_set_size_new,
Node* node_list, Edge* edge_list, int* color, int* cost, int level)
{
// get tread number
int tid = blockIdx.x * blockDim.x + threadIdx.x;
for (int j = tid; j<current_set_size; j += blockDim.x*gridDim.x) {
unsigned int index = current_set[j];// get one from the current set
current_set[j] = 0; // make it not visited
cost[index] = level;
Node cur_node = node_list[index];
// all adjacent vertices
for (int i = cur_node.start; i < cur_node.start + cur_node.edge_num; i++)
{
unsigned int id = edge_list[i].dest;
int old_color = atomicExch((int*)&color[id], BLACK);// visit adjacent node
if (old_color == WHITE) { // was not visited
int write_position = atomicAdd((int*) &(*current_set_size_new), 1);
new_set[write_position] = id; // add to set of the next level
}
}
}
}
void callBFSKernel(const unsigned int blocks,
const unsigned int threadsPerBlock,
unsigned int* current_set, unsigned int* new_set,
int current_set_size, int* current_set_size_new,
Node* node_list, Edge* edge_list, int* color, int* cost, int level)
{
bfs_kernel << <blocks, threadsPerBlock >> > (current_set, new_set, current_set_size,
current_set_size_new, node_list, edge_list, color, cost, level);
} | #ifndef BFS_CUH
#define BFS_CUH
#define WHITE 0 /* not visited */
#define GREY 1 /* visiting */
#define BLACK 2 /* visited */
#define INF 2147483647 /* infinity distance */
#define MAX_LEVEL 20000
#define THREAD_PER_BLOCK 512 /* can depend on number of nodes*/
#define BLOCK_NUM 256
typedef struct node_t
{
unsigned int start; /* starting index of edges */
unsigned int edge_num;
} Node;
typedef struct edge_t
{
unsigned int dest; /* index of nodes */
unsigned int cost;
} Edge;
void callBFSKernel(const unsigned int blocks,
const unsigned int threadsPerBlock,
unsigned int* current_set, unsigned int* new_set,
int current_set_size, int* current_set_size_new,
Node* node_list, Edge* edge_list, int* color, int* cost, int level);
#endif // BFS_CUH |
You are a helpful coding assistant specialized in converting HIP source code to AMD device assembly. | #ifndef BFS_CUH
#define BFS_CUH
#define WHITE 0 /* not visited */
#define GREY 1 /* visiting */
#define BLACK 2 /* visited */
#define INF 2147483647 /* infinity distance */
#define MAX_LEVEL 20000
#define THREAD_PER_BLOCK 512 /* can depend on number of nodes*/
#define BLOCK_NUM 256
typedef struct node_t
{
unsigned int start; /* starting index of edges */
unsigned int edge_num;
} Node;
typedef struct edge_t
{
unsigned int dest; /* index of nodes */
unsigned int cost;
} Edge;
void callBFSKernel(const unsigned int blocks,
const unsigned int threadsPerBlock,
unsigned int* current_set, unsigned int* new_set,
int current_set_size, int* current_set_size_new,
Node* node_list, Edge* edge_list, int* color, int* cost, int level);
#endif // BFS_CUH | .text
.p2alignl 7, 3214868480
.fill 96, 4, 3214868480
.type __hip_cuid_,@object
.section .bss,"aw",@nobits
.globl __hip_cuid_
__hip_cuid_:
.byte 0
.size __hip_cuid_, 1
.ident "AMD clang version 18.0.0git (https://github.com/RadeonOpenCompute/llvm-project roc-6.3.2 25012 e5bf7e55c91490b07c49d8960fa7983d864936c4)"
.section ".note.GNU-stack","",@progbits
.addrsig
.addrsig_sym __hip_cuid_
.amdgcn_target "amdgcn-amd-amdhsa--gfx1100"
.amdgpu_metadata
---
amdhsa.kernels: []
amdhsa.target: amdgcn-amd-amdhsa--gfx1100
amdhsa.version:
- 1
- 2
...
.end_amdgpu_metadata |
You are a helpful coding assistant specialized in converting HIP source code to AMD host assembly. | #ifndef BFS_CUH
#define BFS_CUH
#define WHITE 0 /* not visited */
#define GREY 1 /* visiting */
#define BLACK 2 /* visited */
#define INF 2147483647 /* infinity distance */
#define MAX_LEVEL 20000
#define THREAD_PER_BLOCK 512 /* can depend on number of nodes*/
#define BLOCK_NUM 256
typedef struct node_t
{
unsigned int start; /* starting index of edges */
unsigned int edge_num;
} Node;
typedef struct edge_t
{
unsigned int dest; /* index of nodes */
unsigned int cost;
} Edge;
void callBFSKernel(const unsigned int blocks,
const unsigned int threadsPerBlock,
unsigned int* current_set, unsigned int* new_set,
int current_set_size, int* current_set_size_new,
Node* node_list, Edge* edge_list, int* color, int* cost, int level);
#endif // BFS_CUH | .text
.file "Bfs.hip"
.type __hip_cuid_,@object # @__hip_cuid_
.bss
.globl __hip_cuid_
__hip_cuid_:
.byte 0 # 0x0
.size __hip_cuid_, 1
.section ".linker-options","e",@llvm_linker_options
.ident "AMD clang version 18.0.0git (https://github.com/RadeonOpenCompute/llvm-project roc-6.3.2 25012 e5bf7e55c91490b07c49d8960fa7983d864936c4)"
.section ".note.GNU-stack","",@progbits
.addrsig
.addrsig_sym __hip_cuid_ |
You are a helpful coding assistant specialized in converting from CUDA device assembly to AMD device assembly. | code for sm_80
Function : _Z10bfs_kernelPjS_iPiP6node_tP6edge_tS0_S0_i
.headerflags @"EF_CUDA_TEXMODE_UNIFIED EF_CUDA_64BIT_ADDRESS EF_CUDA_SM80 EF_CUDA_VIRTUAL_SM(EF_CUDA_SM80)"
/*0000*/ IMAD.MOV.U32 R1, RZ, RZ, c[0x0][0x28] ; /* 0x00000a00ff017624 */
/* 0x000fe400078e00ff */
/*0010*/ S2R R0, SR_CTAID.X ; /* 0x0000000000007919 */
/* 0x000e280000002500 */
/*0020*/ S2R R3, SR_TID.X ; /* 0x0000000000037919 */
/* 0x000e240000002100 */
/*0030*/ IMAD R0, R0, c[0x0][0x0], R3 ; /* 0x0000000000007a24 */
/* 0x001fca00078e0203 */
/*0040*/ ISETP.GE.AND P0, PT, R0, c[0x0][0x170], PT ; /* 0x00005c0000007a0c */
/* 0x000fda0003f06270 */
/*0050*/ @P0 EXIT ; /* 0x000000000000094d */
/* 0x000fea0003800000 */
/*0060*/ IMAD.MOV.U32 R5, RZ, RZ, 0x4 ; /* 0x00000004ff057424 */
/* 0x000fe200078e00ff */
/*0070*/ YIELD ; /* 0x0000000000007946 */
/* 0x000fe20003800000 */
/*0080*/ ULDC.64 UR4, c[0x0][0x118] ; /* 0x0000460000047ab9 */
/* 0x000fe40000000a00 */
/*0090*/ IMAD.WIDE R6, R0, R5, c[0x0][0x160] ; /* 0x0000580000067625 */
/* 0x000fca00078e0205 */
/*00a0*/ LDG.E R12, [R6.64] ; /* 0x00000004060c7981 */
/* 0x000ea2000c1e1900 */
/*00b0*/ IMAD.MOV.U32 R2, RZ, RZ, 0x8 ; /* 0x00000008ff027424 */
/* 0x000fe400078e00ff */
/*00c0*/ IMAD.MOV.U32 R15, RZ, RZ, c[0x0][0x1a0] ; /* 0x00006800ff0f7624 */
/* 0x000fe200078e00ff */
/*00d0*/ STG.E [R6.64], RZ ; /* 0x000000ff06007986 */
/* 0x0001e2000c101904 */
/*00e0*/ IMAD.WIDE.U32 R8, R12, R5, c[0x0][0x198] ; /* 0x000066000c087625 */
/* 0x004fc800078e0005 */
/*00f0*/ IMAD.WIDE.U32 R12, R12, R2, c[0x0][0x180] ; /* 0x000060000c0c7625 */
/* 0x000fe200078e0002 */
/*0100*/ STG.E [R8.64], R15 ; /* 0x0000000f08007986 */
/* 0x0001e8000c101904 */
/*0110*/ LDG.E R10, [R12.64] ; /* 0x000000040c0a7981 */
/* 0x000ea8000c1e1900 */
/*0120*/ LDG.E R11, [R12.64+0x4] ; /* 0x000004040c0b7981 */
/* 0x000ea2000c1e1900 */
/*0130*/ BSSY B1, 0xd00 ; /* 0x00000bc000017945 */
/* 0x000fe20003800000 */
/*0140*/ IADD3 R3, R10, R11, RZ ; /* 0x0000000b0a037210 */
/* 0x004fc80007ffe0ff */
/*0150*/ ISETP.GE.U32.AND P0, PT, R10, R3, PT ; /* 0x000000030a00720c */
/* 0x000fda0003f06070 */
/*0160*/ @P0 BRA 0xcf0 ; /* 0x00000b8000000947 */
/* 0x000fea0003800000 */
/*0170*/ LOP3.LUT P0, R17, R11, 0x3, RZ, 0xc0, !PT ; /* 0x000000030b117812 */
/* 0x001fe2000780c0ff */
/*0180*/ BSSY B0, 0x690 ; /* 0x0000050000007945 */
/* 0x000fe20003800000 */
/*0190*/ IMAD.MOV.U32 R4, RZ, RZ, R10 ; /* 0x000000ffff047224 */
/* 0x000fd600078e000a */
/*01a0*/ @!P0 BRA 0x680 ; /* 0x000004d000008947 */
/* 0x000fea0003800000 */
/*01b0*/ IMAD.WIDE R6, R10, R2, c[0x0][0x188] ; /* 0x000062000a067625 */
/* 0x000fe200078e0202 */
/*01c0*/ ULDC.64 UR4, c[0x0][0x118] ; /* 0x0000460000047ab9 */
/* 0x000fc80000000a00 */
/*01d0*/ LDG.E R18, [R6.64] ; /* 0x0000000406127981 */
/* 0x000ea2000c1e1900 */
/*01e0*/ IMAD.MOV.U32 R12, RZ, RZ, 0x2 ; /* 0x00000002ff0c7424 */
/* 0x000fe400078e00ff */
/*01f0*/ IMAD.WIDE.U32 R14, R18, R5, c[0x0][0x190] ; /* 0x00006400120e7625 */
/* 0x004fcc00078e0005 */
/*0200*/ ATOMG.E.EXCH.STRONG.GPU PT, R14, [R14.64], R12 ; /* 0x0000000c0e0e79a8 */
/* 0x000ea2000c1ee1c4 */
/*0210*/ BSSY B2, 0x360 ; /* 0x0000014000027945 */
/* 0x000fe20003800000 */
/*0220*/ ISETP.NE.AND P0, PT, R17, 0x1, PT ; /* 0x000000011100780c */
/* 0x000fe20003f05270 */
/*0230*/ IMAD.MOV.U32 R8, RZ, RZ, c[0x0][0x178] ; /* 0x00005e00ff087624 */
/* 0x000fe200078e00ff */
/*0240*/ MOV R9, c[0x0][0x17c] ; /* 0x00005f0000097a02 */
/* 0x000fe40000000f00 */
/*0250*/ ISETP.NE.AND P1, PT, R14, RZ, PT ; /* 0x000000ff0e00720c */
/* 0x004fda0003f25270 */
/*0260*/ @P1 BRA 0x350 ; /* 0x000000e000001947 */
/* 0x000fea0003800000 */
/*0270*/ S2R R15, SR_LANEID ; /* 0x00000000000f7919 */
/* 0x000e220000000000 */
/*0280*/ VOTEU.ANY UR4, UPT, PT ; /* 0x0000000000047886 */
/* 0x000fe400038e0100 */
/*0290*/ FLO.U32 R4, UR4 ; /* 0x0000000400047d00 */
/* 0x000e2200080e0000 */
/*02a0*/ ULDC.64 UR6, c[0x0][0x118] ; /* 0x0000460000067ab9 */
/* 0x000fce0000000a00 */
/*02b0*/ POPC R13, UR4 ; /* 0x00000004000d7d09 */
/* 0x000e620008000000 */
/*02c0*/ ISETP.EQ.U32.AND P1, PT, R4, R15, PT ; /* 0x0000000f0400720c */
/* 0x001fda0003f22070 */
/*02d0*/ @P1 ATOMG.E.ADD.STRONG.GPU PT, R13, [R8.64], R13 ; /* 0x0000000d080d19a8 */
/* 0x002ea800081ee1c6 */
/*02e0*/ S2R R15, SR_LTMASK ; /* 0x00000000000f7919 */
/* 0x000e240000003900 */
/*02f0*/ LOP3.LUT R16, R15, UR4, RZ, 0xc0, !PT ; /* 0x000000040f107c12 */
/* 0x001fc8000f8ec0ff */
/*0300*/ POPC R15, R16 ; /* 0x00000010000f7309 */
/* 0x000e220000000000 */
/*0310*/ SHFL.IDX PT, R14, R13, R4, 0x1f ; /* 0x00001f040d0e7589 */
/* 0x004e2400000e0000 */
/*0320*/ IMAD.IADD R14, R14, 0x1, R15 ; /* 0x000000010e0e7824 */
/* 0x001fc800078e020f */
/*0330*/ IMAD.WIDE R14, R14, R5, c[0x0][0x168] ; /* 0x00005a000e0e7625 */
/* 0x000fca00078e0205 */
/*0340*/ STG.E [R14.64], R18 ; /* 0x000000120e007986 */
/* 0x0001e4000c101906 */
/*0350*/ BSYNC B2 ; /* 0x0000000000027941 */
/* 0x000fea0003800000 */
/*0360*/ IADD3 R4, R10, 0x1, RZ ; /* 0x000000010a047810 */
/* 0x000fe20007ffe0ff */
/*0370*/ @!P0 BRA 0x680 ; /* 0x0000030000008947 */
/* 0x000fea0003800000 */
/*0380*/ ULDC.64 UR4, c[0x0][0x118] ; /* 0x0000460000047ab9 */
/* 0x000fe40000000a00 */
/*0390*/ LDG.E R18, [R6.64+0x8] ; /* 0x0000080406127981 */
/* 0x001ea4000c1e1900 */
/*03a0*/ IMAD.WIDE.U32 R14, R18, R5, c[0x0][0x190] ; /* 0x00006400120e7625 */
/* 0x004fcc00078e0005 */
/*03b0*/ ATOMG.E.EXCH.STRONG.GPU PT, R14, [R14.64], R12 ; /* 0x0000000c0e0e79a8 */
/* 0x000ea2000c1ee1c4 */
/*03c0*/ BSSY B2, 0x4f0 ; /* 0x0000012000027945 */
/* 0x000fe20003800000 */
/*03d0*/ ISETP.NE.AND P0, PT, R17, 0x2, PT ; /* 0x000000021100780c */
/* 0x000fe40003f05270 */
/*03e0*/ ISETP.NE.AND P1, PT, R14, RZ, PT ; /* 0x000000ff0e00720c */
/* 0x004fda0003f25270 */
/*03f0*/ @P1 BRA 0x4e0 ; /* 0x000000e000001947 */
/* 0x000fea0003800000 */
/*0400*/ S2R R15, SR_LANEID ; /* 0x00000000000f7919 */
/* 0x000e220000000000 */
/*0410*/ VOTEU.ANY UR4, UPT, PT ; /* 0x0000000000047886 */
/* 0x000fe400038e0100 */
/*0420*/ FLO.U32 R4, UR4 ; /* 0x0000000400047d00 */
/* 0x000e2200080e0000 */
/*0430*/ ULDC.64 UR6, c[0x0][0x118] ; /* 0x0000460000067ab9 */
/* 0x000fce0000000a00 */
/*0440*/ POPC R13, UR4 ; /* 0x00000004000d7d09 */
/* 0x000e620008000000 */
/*0450*/ ISETP.EQ.U32.AND P1, PT, R4, R15, PT ; /* 0x0000000f0400720c */
/* 0x001fda0003f22070 */
/*0460*/ @P1 ATOMG.E.ADD.STRONG.GPU PT, R13, [R8.64], R13 ; /* 0x0000000d080d19a8 */
/* 0x002ea800081ee1c6 */
/*0470*/ S2R R16, SR_LTMASK ; /* 0x0000000000107919 */
/* 0x000e240000003900 */
/*0480*/ LOP3.LUT R16, R16, UR4, RZ, 0xc0, !PT ; /* 0x0000000410107c12 */
/* 0x001fc8000f8ec0ff */
/*0490*/ POPC R15, R16 ; /* 0x00000010000f7309 */
/* 0x000e220000000000 */
/*04a0*/ SHFL.IDX PT, R14, R13, R4, 0x1f ; /* 0x00001f040d0e7589 */
/* 0x004e2400000e0000 */
/*04b0*/ IMAD.IADD R14, R14, 0x1, R15 ; /* 0x000000010e0e7824 */
/* 0x001fc800078e020f */
/*04c0*/ IMAD.WIDE R14, R14, R5, c[0x0][0x168] ; /* 0x00005a000e0e7625 */
/* 0x000fca00078e0205 */
/*04d0*/ STG.E [R14.64], R18 ; /* 0x000000120e007986 */
/* 0x0001e4000c101906 */
/*04e0*/ BSYNC B2 ; /* 0x0000000000027941 */
/* 0x000fea0003800000 */
/*04f0*/ IADD3 R4, R10, 0x2, RZ ; /* 0x000000020a047810 */
/* 0x000fe20007ffe0ff */
/*0500*/ @!P0 BRA 0x680 ; /* 0x0000017000008947 */
/* 0x000fea0003800000 */
/*0510*/ ULDC.64 UR4, c[0x0][0x118] ; /* 0x0000460000047ab9 */
/* 0x000fe40000000a00 */
/*0520*/ LDG.E R16, [R6.64+0x10] ; /* 0x0000100406107981 */
/* 0x000ea4000c1e1900 */
/*0530*/ IMAD.WIDE.U32 R14, R16, R5, c[0x0][0x190] ; /* 0x00006400100e7625 */
/* 0x005fcc00078e0005 */
/*0540*/ ATOMG.E.EXCH.STRONG.GPU PT, R14, [R14.64], R12 ; /* 0x0000000c0e0e79a8 */
/* 0x000ea2000c1ee1c4 */
/*0550*/ BSSY B2, 0x670 ; /* 0x0000011000027945 */
/* 0x000fe20003800000 */
/*0560*/ ISETP.NE.AND P0, PT, R14, RZ, PT ; /* 0x000000ff0e00720c */
/* 0x004fda0003f05270 */
/*0570*/ @P0 BRA 0x660 ; /* 0x000000e000000947 */
/* 0x000fea0003800000 */
/*0580*/ S2R R13, SR_LANEID ; /* 0x00000000000d7919 */
/* 0x000e220000000000 */
/*0590*/ VOTEU.ANY UR4, UPT, PT ; /* 0x0000000000047886 */
/* 0x000fe400038e0100 */
/*05a0*/ FLO.U32 R6, UR4 ; /* 0x0000000400067d00 */
/* 0x000e2200080e0000 */
/*05b0*/ ULDC.64 UR6, c[0x0][0x118] ; /* 0x0000460000067ab9 */
/* 0x000fce0000000a00 */
/*05c0*/ POPC R7, UR4 ; /* 0x0000000400077d09 */
/* 0x000e620008000000 */
/*05d0*/ ISETP.EQ.U32.AND P0, PT, R6, R13, PT ; /* 0x0000000d0600720c */
/* 0x001fda0003f02070 */
/*05e0*/ @P0 ATOMG.E.ADD.STRONG.GPU PT, R7, [R8.64], R7 ; /* 0x00000007080709a8 */
/* 0x002ea800081ee1c6 */
/*05f0*/ S2R R12, SR_LTMASK ; /* 0x00000000000c7919 */
/* 0x000e240000003900 */
/*0600*/ LOP3.LUT R12, R12, UR4, RZ, 0xc0, !PT ; /* 0x000000040c0c7c12 */
/* 0x001fc8000f8ec0ff */
/*0610*/ POPC R13, R12 ; /* 0x0000000c000d7309 */
/* 0x000e220000000000 */
/*0620*/ SHFL.IDX PT, R4, R7, R6, 0x1f ; /* 0x00001f0607047589 */
/* 0x004e2400000e0000 */
/*0630*/ IMAD.IADD R4, R4, 0x1, R13 ; /* 0x0000000104047824 */
/* 0x001fc800078e020d */
/*0640*/ IMAD.WIDE R4, R4, R5, c[0x0][0x168] ; /* 0x00005a0004047625 */
/* 0x000fca00078e0205 */
/*0650*/ STG.E [R4.64], R16 ; /* 0x0000001004007986 */
/* 0x0001e4000c101906 */
/*0660*/ BSYNC B2 ; /* 0x0000000000027941 */
/* 0x000fea0003800000 */
/*0670*/ IADD3 R4, R10, 0x3, RZ ; /* 0x000000030a047810 */
/* 0x001fe40007ffe0ff */
/*0680*/ BSYNC B0 ; /* 0x0000000000007941 */
/* 0x000fea0003800000 */
/*0690*/ IADD3 R11, R11, -0x1, RZ ; /* 0xffffffff0b0b7810 */
/* 0x000fc80007ffe0ff */
/*06a0*/ ISETP.GE.U32.AND P0, PT, R11, 0x3, PT ; /* 0x000000030b00780c */
/* 0x000fda0003f06070 */
/*06b0*/ @!P0 BRA 0xcf0 ; /* 0x0000063000008947 */
/* 0x000fea0003800000 */
/*06c0*/ IMAD.WIDE R8, R4, R2, c[0x0][0x188] ; /* 0x0000620004087625 */
/* 0x000fe200078e0202 */
/*06d0*/ MOV R6, c[0x0][0x178] ; /* 0x00005e0000067a02 */
/* 0x000fc60000000f00 */
/*06e0*/ IMAD.MOV.U32 R7, RZ, RZ, c[0x0][0x17c] ; /* 0x00005f00ff077624 */
/* 0x000fe400078e00ff */
/*06f0*/ YIELD ; /* 0x0000000000007946 */
/* 0x000fe20003800000 */
/*0700*/ ULDC.64 UR4, c[0x0][0x118] ; /* 0x0000460000047ab9 */
/* 0x000fe40000000a00 */
/*0710*/ LDG.E R15, [R8.64] ; /* 0x00000004080f7981 */
/* 0x001ea2000c1e1900 */
/*0720*/ IMAD.MOV.U32 R2, RZ, RZ, 0x4 ; /* 0x00000004ff027424 */
/* 0x000fe400078e00ff */
/*0730*/ IMAD.MOV.U32 R5, RZ, RZ, 0x2 ; /* 0x00000002ff057424 */
/* 0x000fe400078e00ff */
/*0740*/ IMAD.WIDE.U32 R10, R15, R2, c[0x0][0x190] ; /* 0x000064000f0a7625 */
/* 0x004fcc00078e0002 */
/*0750*/ ATOMG.E.EXCH.STRONG.GPU PT, R10, [R10.64], R5 ; /* 0x000000050a0a79a8 */
/* 0x000ea2000c1ee1c4 */
/*0760*/ BSSY B0, 0x880 ; /* 0x0000011000007945 */
/* 0x000fe20003800000 */
/*0770*/ ISETP.NE.AND P0, PT, R10, RZ, PT ; /* 0x000000ff0a00720c */
/* 0x004fda0003f05270 */
/*0780*/ @P0 BRA 0x870 ; /* 0x000000e000000947 */
/* 0x000fea0003800000 */
/*0790*/ S2R R11, SR_LANEID ; /* 0x00000000000b7919 */
/* 0x000e220000000000 */
/*07a0*/ VOTEU.ANY UR4, UPT, PT ; /* 0x0000000000047886 */
/* 0x000fe400038e0100 */
/*07b0*/ FLO.U32 R12, UR4 ; /* 0x00000004000c7d00 */
/* 0x000e2200080e0000 */
/*07c0*/ ULDC.64 UR6, c[0x0][0x118] ; /* 0x0000460000067ab9 */
/* 0x000fce0000000a00 */
/*07d0*/ POPC R13, UR4 ; /* 0x00000004000d7d09 */
/* 0x000e620008000000 */
/*07e0*/ ISETP.EQ.U32.AND P0, PT, R12, R11, PT ; /* 0x0000000b0c00720c */
/* 0x001fda0003f02070 */
/*07f0*/ @P0 ATOMG.E.ADD.STRONG.GPU PT, R13, [R6.64], R13 ; /* 0x0000000d060d09a8 */
/* 0x002ea800081ee1c6 */
/*0800*/ S2R R14, SR_LTMASK ; /* 0x00000000000e7919 */
/* 0x000e240000003900 */
/*0810*/ LOP3.LUT R14, R14, UR4, RZ, 0xc0, !PT ; /* 0x000000040e0e7c12 */
/* 0x001fcc000f8ec0ff */
/*0820*/ POPC R14, R14 ; /* 0x0000000e000e7309 */
/* 0x000e220000000000 */
/*0830*/ SHFL.IDX PT, R11, R13, R12, 0x1f ; /* 0x00001f0c0d0b7589 */
/* 0x004e2400000e0000 */
/*0840*/ IADD3 R11, R11, R14, RZ ; /* 0x0000000e0b0b7210 */
/* 0x001fca0007ffe0ff */
/*0850*/ IMAD.WIDE R10, R11, R2, c[0x0][0x168] ; /* 0x00005a000b0a7625 */
/* 0x000fca00078e0202 */
/*0860*/ STG.E [R10.64], R15 ; /* 0x0000000f0a007986 */
/* 0x0001e4000c101906 */
/*0870*/ BSYNC B0 ; /* 0x0000000000007941 */
/* 0x000fea0003800000 */
/*0880*/ ULDC.64 UR4, c[0x0][0x118] ; /* 0x0000460000047ab9 */
/* 0x000fe40000000a00 */
/*0890*/ LDG.E R15, [R8.64+0x8] ; /* 0x00000804080f7981 */
/* 0x001ea4000c1e1900 */
/*08a0*/ IMAD.WIDE.U32 R10, R15, R2, c[0x0][0x190] ; /* 0x000064000f0a7625 */
/* 0x004fcc00078e0002 */
/*08b0*/ ATOMG.E.EXCH.STRONG.GPU PT, R10, [R10.64], R5 ; /* 0x000000050a0a79a8 */
/* 0x000ea2000c1ee1c4 */
/*08c0*/ BSSY B0, 0x9e0 ; /* 0x0000011000007945 */
/* 0x000fe20003800000 */
/*08d0*/ ISETP.NE.AND P0, PT, R10, RZ, PT ; /* 0x000000ff0a00720c */
/* 0x004fda0003f05270 */
/*08e0*/ @P0 BRA 0x9d0 ; /* 0x000000e000000947 */
/* 0x000fea0003800000 */
/*08f0*/ S2R R11, SR_LANEID ; /* 0x00000000000b7919 */
/* 0x000e220000000000 */
/*0900*/ VOTEU.ANY UR4, UPT, PT ; /* 0x0000000000047886 */
/* 0x000fe400038e0100 */
/*0910*/ FLO.U32 R12, UR4 ; /* 0x00000004000c7d00 */
/* 0x000e2200080e0000 */
/*0920*/ ULDC.64 UR6, c[0x0][0x118] ; /* 0x0000460000067ab9 */
/* 0x000fce0000000a00 */
/*0930*/ POPC R13, UR4 ; /* 0x00000004000d7d09 */
/* 0x000e620008000000 */
/*0940*/ ISETP.EQ.U32.AND P0, PT, R12, R11, PT ; /* 0x0000000b0c00720c */
/* 0x001fda0003f02070 */
/*0950*/ @P0 ATOMG.E.ADD.STRONG.GPU PT, R13, [R6.64], R13 ; /* 0x0000000d060d09a8 */
/* 0x002ea800081ee1c6 */
/*0960*/ S2R R14, SR_LTMASK ; /* 0x00000000000e7919 */
/* 0x000e240000003900 */
/*0970*/ LOP3.LUT R14, R14, UR4, RZ, 0xc0, !PT ; /* 0x000000040e0e7c12 */
/* 0x001fcc000f8ec0ff */
/*0980*/ POPC R14, R14 ; /* 0x0000000e000e7309 */
/* 0x000e220000000000 */
/*0990*/ SHFL.IDX PT, R11, R13, R12, 0x1f ; /* 0x00001f0c0d0b7589 */
/* 0x004e2400000e0000 */
/*09a0*/ IMAD.IADD R11, R11, 0x1, R14 ; /* 0x000000010b0b7824 */
/* 0x001fc800078e020e */
/*09b0*/ IMAD.WIDE R10, R11, R2, c[0x0][0x168] ; /* 0x00005a000b0a7625 */
/* 0x000fca00078e0202 */
/*09c0*/ STG.E [R10.64], R15 ; /* 0x0000000f0a007986 */
/* 0x0001e4000c101906 */
/*09d0*/ BSYNC B0 ; /* 0x0000000000007941 */
/* 0x000fea0003800000 */
/*09e0*/ ULDC.64 UR4, c[0x0][0x118] ; /* 0x0000460000047ab9 */
/* 0x000fe40000000a00 */
/*09f0*/ LDG.E R15, [R8.64+0x10] ; /* 0x00001004080f7981 */
/* 0x001ea4000c1e1900 */
/*0a00*/ IMAD.WIDE.U32 R10, R15, R2, c[0x0][0x190] ; /* 0x000064000f0a7625 */
/* 0x004fcc00078e0002 */
/*0a10*/ ATOMG.E.EXCH.STRONG.GPU PT, R10, [R10.64], R5 ; /* 0x000000050a0a79a8 */
/* 0x000ea2000c1ee1c4 */
/*0a20*/ BSSY B0, 0xb40 ; /* 0x0000011000007945 */
/* 0x000fe20003800000 */
/*0a30*/ ISETP.NE.AND P0, PT, R10, RZ, PT ; /* 0x000000ff0a00720c */
/* 0x004fda0003f05270 */
/*0a40*/ @P0 BRA 0xb30 ; /* 0x000000e000000947 */
/* 0x000fea0003800000 */
/*0a50*/ S2R R11, SR_LANEID ; /* 0x00000000000b7919 */
/* 0x000e220000000000 */
/*0a60*/ VOTEU.ANY UR4, UPT, PT ; /* 0x0000000000047886 */
/* 0x000fe400038e0100 */
/*0a70*/ FLO.U32 R12, UR4 ; /* 0x00000004000c7d00 */
/* 0x000e2200080e0000 */
/*0a80*/ ULDC.64 UR6, c[0x0][0x118] ; /* 0x0000460000067ab9 */
/* 0x000fce0000000a00 */
/*0a90*/ POPC R13, UR4 ; /* 0x00000004000d7d09 */
/* 0x000e620008000000 */
/*0aa0*/ ISETP.EQ.U32.AND P0, PT, R12, R11, PT ; /* 0x0000000b0c00720c */
/* 0x001fda0003f02070 */
/*0ab0*/ @P0 ATOMG.E.ADD.STRONG.GPU PT, R13, [R6.64], R13 ; /* 0x0000000d060d09a8 */
/* 0x002ea800081ee1c6 */
/*0ac0*/ S2R R14, SR_LTMASK ; /* 0x00000000000e7919 */
/* 0x000e240000003900 */
/*0ad0*/ LOP3.LUT R14, R14, UR4, RZ, 0xc0, !PT ; /* 0x000000040e0e7c12 */
/* 0x001fcc000f8ec0ff */
/*0ae0*/ POPC R14, R14 ; /* 0x0000000e000e7309 */
/* 0x000e220000000000 */
/*0af0*/ SHFL.IDX PT, R11, R13, R12, 0x1f ; /* 0x00001f0c0d0b7589 */
/* 0x004e2400000e0000 */
/*0b00*/ IMAD.IADD R11, R11, 0x1, R14 ; /* 0x000000010b0b7824 */
/* 0x001fc800078e020e */
/*0b10*/ IMAD.WIDE R10, R11, R2, c[0x0][0x168] ; /* 0x00005a000b0a7625 */
/* 0x000fca00078e0202 */
/*0b20*/ STG.E [R10.64], R15 ; /* 0x0000000f0a007986 */
/* 0x0001e4000c101906 */
/*0b30*/ BSYNC B0 ; /* 0x0000000000007941 */
/* 0x000fea0003800000 */
/*0b40*/ ULDC.64 UR4, c[0x0][0x118] ; /* 0x0000460000047ab9 */
/* 0x000fe40000000a00 */
/*0b50*/ LDG.E R15, [R8.64+0x18] ; /* 0x00001804080f7981 */
/* 0x001ea4000c1e1900 */
/*0b60*/ IMAD.WIDE.U32 R10, R15, R2, c[0x0][0x190] ; /* 0x000064000f0a7625 */
/* 0x004fcc00078e0002 */
/*0b70*/ ATOMG.E.EXCH.STRONG.GPU PT, R10, [R10.64], R5 ; /* 0x000000050a0a79a8 */
/* 0x000ea2000c1ee1c4 */
/*0b80*/ IADD3 R4, R4, 0x4, RZ ; /* 0x0000000404047810 */
/* 0x000fe20007ffe0ff */
/*0b90*/ BSSY B0, 0xcc0 ; /* 0x0000012000007945 */
/* 0x000fe60003800000 */
/*0ba0*/ ISETP.GE.U32.AND P0, PT, R4, R3, PT ; /* 0x000000030400720c */
/* 0x000fe40003f06070 */
/*0bb0*/ ISETP.NE.AND P1, PT, R10, RZ, PT ; /* 0x000000ff0a00720c */
/* 0x004fda0003f25270 */
/*0bc0*/ @P1 BRA 0xcb0 ; /* 0x000000e000001947 */
/* 0x000fea0003800000 */
/*0bd0*/ S2R R11, SR_LANEID ; /* 0x00000000000b7919 */
/* 0x000e220000000000 */
/*0be0*/ VOTEU.ANY UR4, UPT, PT ; /* 0x0000000000047886 */
/* 0x000fe400038e0100 */
/*0bf0*/ FLO.U32 R12, UR4 ; /* 0x00000004000c7d00 */
/* 0x000e2200080e0000 */
/*0c00*/ ULDC.64 UR6, c[0x0][0x118] ; /* 0x0000460000067ab9 */
/* 0x000fce0000000a00 */
/*0c10*/ POPC R5, UR4 ; /* 0x0000000400057d09 */
/* 0x000e620008000000 */
/*0c20*/ ISETP.EQ.U32.AND P1, PT, R12, R11, PT ; /* 0x0000000b0c00720c */
/* 0x001fda0003f22070 */
/*0c30*/ @P1 ATOMG.E.ADD.STRONG.GPU PT, R5, [R6.64], R5 ; /* 0x00000005060519a8 */
/* 0x002ea800081ee1c6 */
/*0c40*/ S2R R13, SR_LTMASK ; /* 0x00000000000d7919 */
/* 0x000e240000003900 */
/*0c50*/ LOP3.LUT R13, R13, UR4, RZ, 0xc0, !PT ; /* 0x000000040d0d7c12 */
/* 0x001fc8000f8ec0ff */
/*0c60*/ POPC R10, R13 ; /* 0x0000000d000a7309 */
/* 0x000e220000000000 */
/*0c70*/ SHFL.IDX PT, R11, R5, R12, 0x1f ; /* 0x00001f0c050b7589 */
/* 0x004e2400000e0000 */
/*0c80*/ IMAD.IADD R11, R11, 0x1, R10 ; /* 0x000000010b0b7824 */
/* 0x001fc800078e020a */
/*0c90*/ IMAD.WIDE R10, R11, R2, c[0x0][0x168] ; /* 0x00005a000b0a7625 */
/* 0x000fca00078e0202 */
/*0ca0*/ STG.E [R10.64], R15 ; /* 0x0000000f0a007986 */
/* 0x0001e4000c101906 */
/*0cb0*/ BSYNC B0 ; /* 0x0000000000007941 */
/* 0x000fea0003800000 */
/*0cc0*/ IADD3 R8, P1, R8, 0x20, RZ ; /* 0x0000002008087810 */
/* 0x000fc80007f3e0ff */
/*0cd0*/ IADD3.X R9, RZ, R9, RZ, P1, !PT ; /* 0x00000009ff097210 */
/* 0x000fe20000ffe4ff */
/*0ce0*/ @!P0 BRA 0x6f0 ; /* 0xfffffa0000008947 */
/* 0x000fea000383ffff */
/*0cf0*/ BSYNC B1 ; /* 0x0000000000017941 */
/* 0x001fea0003800000 */
/*0d00*/ IMAD.MOV.U32 R3, RZ, RZ, c[0x0][0x0] ; /* 0x00000000ff037624 */
/* 0x000fc800078e00ff */
/*0d10*/ IMAD R0, R3, c[0x0][0xc], R0 ; /* 0x0000030003007a24 */
/* 0x000fca00078e0200 */
/*0d20*/ ISETP.GE.AND P0, PT, R0, c[0x0][0x170], PT ; /* 0x00005c0000007a0c */
/* 0x000fda0003f06270 */
/*0d30*/ @P0 CALL.REL.NOINC 0xd50 ; /* 0x0000001000000944 */
/* 0x000fe20003c00000 */
/*0d40*/ BRA 0x60 ; /* 0xfffff31000007947 */
/* 0x000fea000383ffff */
/*0d50*/ EXIT ; /* 0x000000000000794d */
/* 0x000fea0003800000 */
/*0d60*/ BRA 0xd60; /* 0xfffffff000007947 */
/* 0x000fc0000383ffff */
/*0d70*/ NOP; /* 0x0000000000007918 */
/* 0x000fc00000000000 */
/*0d80*/ NOP; /* 0x0000000000007918 */
/* 0x000fc00000000000 */
/*0d90*/ NOP; /* 0x0000000000007918 */
/* 0x000fc00000000000 */
/*0da0*/ NOP; /* 0x0000000000007918 */
/* 0x000fc00000000000 */
/*0db0*/ NOP; /* 0x0000000000007918 */
/* 0x000fc00000000000 */
/*0dc0*/ NOP; /* 0x0000000000007918 */
/* 0x000fc00000000000 */
/*0dd0*/ NOP; /* 0x0000000000007918 */
/* 0x000fc00000000000 */
/*0de0*/ NOP; /* 0x0000000000007918 */
/* 0x000fc00000000000 */
/*0df0*/ NOP; /* 0x0000000000007918 */
/* 0x000fc00000000000 */
.......... | .text
.p2alignl 7, 3214868480
.fill 96, 4, 3214868480
.type __hip_cuid_,@object
.section .bss,"aw",@nobits
.globl __hip_cuid_
__hip_cuid_:
.byte 0
.size __hip_cuid_, 1
.ident "AMD clang version 18.0.0git (https://github.com/RadeonOpenCompute/llvm-project roc-6.3.2 25012 e5bf7e55c91490b07c49d8960fa7983d864936c4)"
.section ".note.GNU-stack","",@progbits
.addrsig
.addrsig_sym __hip_cuid_
.amdgcn_target "amdgcn-amd-amdhsa--gfx1100"
.amdgpu_metadata
---
amdhsa.kernels: []
amdhsa.target: amdgcn-amd-amdhsa--gfx1100
amdhsa.version:
- 1
- 2
...
.end_amdgpu_metadata |
You are a helpful coding assistant specialized in converting from CUDA host assembly to AMD host assembly. | .file "tmpxft_000f6ca7_00000000-6_Bfs.cudafe1.cpp"
.text
#APP
#NO_APP
.type _ZL26__cudaUnregisterBinaryUtilv, @function
_ZL26__cudaUnregisterBinaryUtilv:
.LFB2060:
.cfi_startproc
endbr64
subq $8, %rsp
.cfi_def_cfa_offset 16
movq _ZL20__cudaFatCubinHandle(%rip), %rdi
call __cudaUnregisterFatBinary@PLT
addq $8, %rsp
.cfi_def_cfa_offset 8
ret
.cfi_endproc
.LFE2060:
.size _ZL26__cudaUnregisterBinaryUtilv, .-_ZL26__cudaUnregisterBinaryUtilv
.globl _Z58__device_stub__Z10bfs_kernelPjS_iPiP6node_tP6edge_tS0_S0_iPjS_iPiP6node_tP6edge_tS0_S0_i
.type _Z58__device_stub__Z10bfs_kernelPjS_iPiP6node_tP6edge_tS0_S0_iPjS_iPiP6node_tP6edge_tS0_S0_i, @function
_Z58__device_stub__Z10bfs_kernelPjS_iPiP6node_tP6edge_tS0_S0_iPjS_iPiP6node_tP6edge_tS0_S0_i:
.LFB2082:
.cfi_startproc
endbr64
subq $216, %rsp
.cfi_def_cfa_offset 224
movq %rdi, 56(%rsp)
movq %rsi, 48(%rsp)
movl %edx, 44(%rsp)
movq %rcx, 32(%rsp)
movq %r8, 24(%rsp)
movq %r9, 16(%rsp)
movq 224(%rsp), %rax
movq %rax, 8(%rsp)
movq 232(%rsp), %rax
movq %rax, (%rsp)
movq %fs:40, %rax
movq %rax, 200(%rsp)
xorl %eax, %eax
leaq 56(%rsp), %rax
movq %rax, 128(%rsp)
leaq 48(%rsp), %rax
movq %rax, 136(%rsp)
leaq 44(%rsp), %rax
movq %rax, 144(%rsp)
leaq 32(%rsp), %rax
movq %rax, 152(%rsp)
leaq 24(%rsp), %rax
movq %rax, 160(%rsp)
leaq 16(%rsp), %rax
movq %rax, 168(%rsp)
leaq 8(%rsp), %rax
movq %rax, 176(%rsp)
movq %rsp, %rax
movq %rax, 184(%rsp)
leaq 240(%rsp), %rax
movq %rax, 192(%rsp)
movl $1, 80(%rsp)
movl $1, 84(%rsp)
movl $1, 88(%rsp)
movl $1, 92(%rsp)
movl $1, 96(%rsp)
movl $1, 100(%rsp)
leaq 72(%rsp), %rcx
leaq 64(%rsp), %rdx
leaq 92(%rsp), %rsi
leaq 80(%rsp), %rdi
call __cudaPopCallConfiguration@PLT
testl %eax, %eax
je .L7
.L3:
movq 200(%rsp), %rax
subq %fs:40, %rax
jne .L8
addq $216, %rsp
.cfi_remember_state
.cfi_def_cfa_offset 8
ret
.L7:
.cfi_restore_state
pushq 72(%rsp)
.cfi_def_cfa_offset 232
pushq 72(%rsp)
.cfi_def_cfa_offset 240
leaq 144(%rsp), %r9
movq 108(%rsp), %rcx
movl 116(%rsp), %r8d
movq 96(%rsp), %rsi
movl 104(%rsp), %edx
leaq _Z10bfs_kernelPjS_iPiP6node_tP6edge_tS0_S0_i(%rip), %rdi
call cudaLaunchKernel@PLT
addq $16, %rsp
.cfi_def_cfa_offset 224
jmp .L3
.L8:
call __stack_chk_fail@PLT
.cfi_endproc
.LFE2082:
.size _Z58__device_stub__Z10bfs_kernelPjS_iPiP6node_tP6edge_tS0_S0_iPjS_iPiP6node_tP6edge_tS0_S0_i, .-_Z58__device_stub__Z10bfs_kernelPjS_iPiP6node_tP6edge_tS0_S0_iPjS_iPiP6node_tP6edge_tS0_S0_i
.globl _Z10bfs_kernelPjS_iPiP6node_tP6edge_tS0_S0_i
.type _Z10bfs_kernelPjS_iPiP6node_tP6edge_tS0_S0_i, @function
_Z10bfs_kernelPjS_iPiP6node_tP6edge_tS0_S0_i:
.LFB2083:
.cfi_startproc
endbr64
subq $16, %rsp
.cfi_def_cfa_offset 24
movl 40(%rsp), %eax
pushq %rax
.cfi_def_cfa_offset 32
pushq 40(%rsp)
.cfi_def_cfa_offset 40
pushq 40(%rsp)
.cfi_def_cfa_offset 48
call _Z58__device_stub__Z10bfs_kernelPjS_iPiP6node_tP6edge_tS0_S0_iPjS_iPiP6node_tP6edge_tS0_S0_i
addq $40, %rsp
.cfi_def_cfa_offset 8
ret
.cfi_endproc
.LFE2083:
.size _Z10bfs_kernelPjS_iPiP6node_tP6edge_tS0_S0_i, .-_Z10bfs_kernelPjS_iPiP6node_tP6edge_tS0_S0_i
.globl _Z13callBFSKerneljjPjS_iPiP6node_tP6edge_tS0_S0_i
.type _Z13callBFSKerneljjPjS_iPiP6node_tP6edge_tS0_S0_i, @function
_Z13callBFSKerneljjPjS_iPiP6node_tP6edge_tS0_S0_i:
.LFB2057:
.cfi_startproc
endbr64
pushq %r13
.cfi_def_cfa_offset 16
.cfi_offset 13, -16
pushq %r12
.cfi_def_cfa_offset 24
.cfi_offset 12, -24
pushq %rbp
.cfi_def_cfa_offset 32
.cfi_offset 6, -32
pushq %rbx
.cfi_def_cfa_offset 40
.cfi_offset 3, -40
subq $40, %rsp
.cfi_def_cfa_offset 80
movq %rdx, %rbx
movq %rcx, %rbp
movl %r8d, %r12d
movq %r9, %r13
movl %esi, 20(%rsp)
movl $1, 24(%rsp)
movl %edi, 8(%rsp)
movl $1, 12(%rsp)
movl $0, %r9d
movl $0, %r8d
movq 20(%rsp), %rdx
movl $1, %ecx
movq 8(%rsp), %rdi
movl $1, %esi
call __cudaPushCallConfiguration@PLT
testl %eax, %eax
je .L14
.L11:
addq $40, %rsp
.cfi_remember_state
.cfi_def_cfa_offset 40
popq %rbx
.cfi_def_cfa_offset 32
popq %rbp
.cfi_def_cfa_offset 24
popq %r12
.cfi_def_cfa_offset 16
popq %r13
.cfi_def_cfa_offset 8
ret
.L14:
.cfi_restore_state
subq $8, %rsp
.cfi_def_cfa_offset 88
movl 120(%rsp), %eax
pushq %rax
.cfi_def_cfa_offset 96
pushq 120(%rsp)
.cfi_def_cfa_offset 104
pushq 120(%rsp)
.cfi_def_cfa_offset 112
movq 120(%rsp), %r9
movq 112(%rsp), %r8
movq %r13, %rcx
movl %r12d, %edx
movq %rbp, %rsi
movq %rbx, %rdi
call _Z58__device_stub__Z10bfs_kernelPjS_iPiP6node_tP6edge_tS0_S0_iPjS_iPiP6node_tP6edge_tS0_S0_i
addq $32, %rsp
.cfi_def_cfa_offset 80
jmp .L11
.cfi_endproc
.LFE2057:
.size _Z13callBFSKerneljjPjS_iPiP6node_tP6edge_tS0_S0_i, .-_Z13callBFSKerneljjPjS_iPiP6node_tP6edge_tS0_S0_i
.section .rodata.str1.8,"aMS",@progbits,1
.align 8
.LC0:
.string "_Z10bfs_kernelPjS_iPiP6node_tP6edge_tS0_S0_i"
.text
.type _ZL24__sti____cudaRegisterAllv, @function
_ZL24__sti____cudaRegisterAllv:
.LFB2085:
.cfi_startproc
endbr64
subq $8, %rsp
.cfi_def_cfa_offset 16
leaq _ZL15__fatDeviceText(%rip), %rdi
call __cudaRegisterFatBinary@PLT
movq %rax, %rdi
movq %rax, _ZL20__cudaFatCubinHandle(%rip)
pushq $0
.cfi_def_cfa_offset 24
pushq $0
.cfi_def_cfa_offset 32
pushq $0
.cfi_def_cfa_offset 40
pushq $0
.cfi_def_cfa_offset 48
movl $0, %r9d
movl $-1, %r8d
leaq .LC0(%rip), %rdx
movq %rdx, %rcx
leaq _Z10bfs_kernelPjS_iPiP6node_tP6edge_tS0_S0_i(%rip), %rsi
call __cudaRegisterFunction@PLT
addq $32, %rsp
.cfi_def_cfa_offset 16
movq _ZL20__cudaFatCubinHandle(%rip), %rdi
call __cudaRegisterFatBinaryEnd@PLT
leaq _ZL26__cudaUnregisterBinaryUtilv(%rip), %rdi
call atexit@PLT
addq $8, %rsp
.cfi_def_cfa_offset 8
ret
.cfi_endproc
.LFE2085:
.size _ZL24__sti____cudaRegisterAllv, .-_ZL24__sti____cudaRegisterAllv
.section .init_array,"aw"
.align 8
.quad _ZL24__sti____cudaRegisterAllv
.section .nvFatBinSegment,"aw"
.align 8
.type _ZL15__fatDeviceText, @object
.size _ZL15__fatDeviceText, 24
_ZL15__fatDeviceText:
.long 1180844977
.long 1
.quad fatbinData
.quad 0
.local _ZL20__cudaFatCubinHandle
.comm _ZL20__cudaFatCubinHandle,8,8
.ident "GCC: (Ubuntu 13.3.0-6ubuntu2~24.04) 13.3.0"
.section .note.GNU-stack,"",@progbits
.section .note.gnu.property,"a"
.align 8
.long 1f - 0f
.long 4f - 1f
.long 5
0:
.string "GNU"
1:
.align 8
.long 0xc0000002
.long 3f - 2f
2:
.long 0x3
3:
.align 8
4: | .text
.file "Bfs.hip"
.type __hip_cuid_,@object # @__hip_cuid_
.bss
.globl __hip_cuid_
__hip_cuid_:
.byte 0 # 0x0
.size __hip_cuid_, 1
.section ".linker-options","e",@llvm_linker_options
.ident "AMD clang version 18.0.0git (https://github.com/RadeonOpenCompute/llvm-project roc-6.3.2 25012 e5bf7e55c91490b07c49d8960fa7983d864936c4)"
.section ".note.GNU-stack","",@progbits
.addrsig
.addrsig_sym __hip_cuid_ |
You are a helpful coding assistant specialized in converting CUDA source code to CUDA device assembly. | #include <cstdio>
int main() {
printf("Several Days of Cuda\n");
} | code for sm_80 |
You are a helpful coding assistant specialized in converting CUDA source code to CUDA host assembly. | #include <cstdio>
int main() {
printf("Several Days of Cuda\n");
} | .file "tmpxft_0019176f_00000000-6_main.cudafe1.cpp"
.text
#APP
#NO_APP
.type _ZL26__cudaUnregisterBinaryUtilv, @function
_ZL26__cudaUnregisterBinaryUtilv:
.LFB2060:
.cfi_startproc
endbr64
subq $8, %rsp
.cfi_def_cfa_offset 16
movq _ZL20__cudaFatCubinHandle(%rip), %rdi
call __cudaUnregisterFatBinary@PLT
addq $8, %rsp
.cfi_def_cfa_offset 8
ret
.cfi_endproc
.LFE2060:
.size _ZL26__cudaUnregisterBinaryUtilv, .-_ZL26__cudaUnregisterBinaryUtilv
.section .rodata.str1.1,"aMS",@progbits,1
.LC0:
.string "Several Days of Cuda\n"
.text
.globl main
.type main, @function
main:
.LFB2057:
.cfi_startproc
endbr64
subq $8, %rsp
.cfi_def_cfa_offset 16
leaq .LC0(%rip), %rsi
movl $2, %edi
movl $0, %eax
call __printf_chk@PLT
movl $0, %eax
addq $8, %rsp
.cfi_def_cfa_offset 8
ret
.cfi_endproc
.LFE2057:
.size main, .-main
.type _ZL24__sti____cudaRegisterAllv, @function
_ZL24__sti____cudaRegisterAllv:
.LFB2083:
.cfi_startproc
endbr64
subq $8, %rsp
.cfi_def_cfa_offset 16
leaq _ZL15__fatDeviceText(%rip), %rdi
call __cudaRegisterFatBinary@PLT
movq %rax, %rdi
movq %rax, _ZL20__cudaFatCubinHandle(%rip)
call __cudaRegisterFatBinaryEnd@PLT
leaq _ZL26__cudaUnregisterBinaryUtilv(%rip), %rdi
call atexit@PLT
addq $8, %rsp
.cfi_def_cfa_offset 8
ret
.cfi_endproc
.LFE2083:
.size _ZL24__sti____cudaRegisterAllv, .-_ZL24__sti____cudaRegisterAllv
.section .init_array,"aw"
.align 8
.quad _ZL24__sti____cudaRegisterAllv
.section .nvFatBinSegment,"aw"
.align 8
.type _ZL15__fatDeviceText, @object
.size _ZL15__fatDeviceText, 24
_ZL15__fatDeviceText:
.long 1180844977
.long 1
.quad fatbinData
.quad 0
.local _ZL20__cudaFatCubinHandle
.comm _ZL20__cudaFatCubinHandle,8,8
.ident "GCC: (Ubuntu 13.3.0-6ubuntu2~24.04) 13.3.0"
.section .note.GNU-stack,"",@progbits
.section .note.gnu.property,"a"
.align 8
.long 1f - 0f
.long 4f - 1f
.long 5
0:
.string "GNU"
1:
.align 8
.long 0xc0000002
.long 3f - 2f
2:
.long 0x3
3:
.align 8
4: |
You are a helpful coding assistant specialized in converting CUDA source code to HIP/AMD source code. | #include <cstdio>
int main() {
printf("Several Days of Cuda\n");
} | #include <hip/hip_runtime.h>
#include <cstdio>
int main() {
printf("Several Days of Cuda\n");
} |
You are a helpful coding assistant specialized in converting HIP source code to AMD device assembly. | #include <hip/hip_runtime.h>
#include <cstdio>
int main() {
printf("Several Days of Cuda\n");
} | .text
.p2alignl 7, 3214868480
.fill 96, 4, 3214868480
.type __hip_cuid_,@object
.section .bss,"aw",@nobits
.globl __hip_cuid_
__hip_cuid_:
.byte 0
.size __hip_cuid_, 1
.ident "AMD clang version 18.0.0git (https://github.com/RadeonOpenCompute/llvm-project roc-6.3.2 25012 e5bf7e55c91490b07c49d8960fa7983d864936c4)"
.section ".note.GNU-stack","",@progbits
.addrsig
.addrsig_sym __hip_cuid_
.amdgcn_target "amdgcn-amd-amdhsa--gfx1100"
.amdgpu_metadata
---
amdhsa.kernels: []
amdhsa.target: amdgcn-amd-amdhsa--gfx1100
amdhsa.version:
- 1
- 2
...
.end_amdgpu_metadata |
You are a helpful coding assistant specialized in converting HIP source code to AMD host assembly. | #include <hip/hip_runtime.h>
#include <cstdio>
int main() {
printf("Several Days of Cuda\n");
} | .text
.file "main.hip"
.globl main # -- Begin function main
.p2align 4, 0x90
.type main,@function
main: # @main
.cfi_startproc
# %bb.0:
pushq %rax
.cfi_def_cfa_offset 16
movl $.Lstr, %edi
callq puts@PLT
xorl %eax, %eax
popq %rcx
.cfi_def_cfa_offset 8
retq
.Lfunc_end0:
.size main, .Lfunc_end0-main
.cfi_endproc
# -- End function
.type __hip_cuid_,@object # @__hip_cuid_
.bss
.globl __hip_cuid_
__hip_cuid_:
.byte 0 # 0x0
.size __hip_cuid_, 1
.type .Lstr,@object # @str
.section .rodata.str1.1,"aMS",@progbits,1
.Lstr:
.asciz "Several Days of Cuda"
.size .Lstr, 21
.section ".linker-options","e",@llvm_linker_options
.ident "AMD clang version 18.0.0git (https://github.com/RadeonOpenCompute/llvm-project roc-6.3.2 25012 e5bf7e55c91490b07c49d8960fa7983d864936c4)"
.section ".note.GNU-stack","",@progbits
.addrsig
.addrsig_sym __hip_cuid_ |
You are a helpful coding assistant specialized in converting from CUDA device assembly to AMD device assembly. | code for sm_80 | .text
.p2alignl 7, 3214868480
.fill 96, 4, 3214868480
.type __hip_cuid_,@object
.section .bss,"aw",@nobits
.globl __hip_cuid_
__hip_cuid_:
.byte 0
.size __hip_cuid_, 1
.ident "AMD clang version 18.0.0git (https://github.com/RadeonOpenCompute/llvm-project roc-6.3.2 25012 e5bf7e55c91490b07c49d8960fa7983d864936c4)"
.section ".note.GNU-stack","",@progbits
.addrsig
.addrsig_sym __hip_cuid_
.amdgcn_target "amdgcn-amd-amdhsa--gfx1100"
.amdgpu_metadata
---
amdhsa.kernels: []
amdhsa.target: amdgcn-amd-amdhsa--gfx1100
amdhsa.version:
- 1
- 2
...
.end_amdgpu_metadata |
You are a helpful coding assistant specialized in converting from CUDA host assembly to AMD host assembly. | .file "tmpxft_0019176f_00000000-6_main.cudafe1.cpp"
.text
#APP
#NO_APP
.type _ZL26__cudaUnregisterBinaryUtilv, @function
_ZL26__cudaUnregisterBinaryUtilv:
.LFB2060:
.cfi_startproc
endbr64
subq $8, %rsp
.cfi_def_cfa_offset 16
movq _ZL20__cudaFatCubinHandle(%rip), %rdi
call __cudaUnregisterFatBinary@PLT
addq $8, %rsp
.cfi_def_cfa_offset 8
ret
.cfi_endproc
.LFE2060:
.size _ZL26__cudaUnregisterBinaryUtilv, .-_ZL26__cudaUnregisterBinaryUtilv
.section .rodata.str1.1,"aMS",@progbits,1
.LC0:
.string "Several Days of Cuda\n"
.text
.globl main
.type main, @function
main:
.LFB2057:
.cfi_startproc
endbr64
subq $8, %rsp
.cfi_def_cfa_offset 16
leaq .LC0(%rip), %rsi
movl $2, %edi
movl $0, %eax
call __printf_chk@PLT
movl $0, %eax
addq $8, %rsp
.cfi_def_cfa_offset 8
ret
.cfi_endproc
.LFE2057:
.size main, .-main
.type _ZL24__sti____cudaRegisterAllv, @function
_ZL24__sti____cudaRegisterAllv:
.LFB2083:
.cfi_startproc
endbr64
subq $8, %rsp
.cfi_def_cfa_offset 16
leaq _ZL15__fatDeviceText(%rip), %rdi
call __cudaRegisterFatBinary@PLT
movq %rax, %rdi
movq %rax, _ZL20__cudaFatCubinHandle(%rip)
call __cudaRegisterFatBinaryEnd@PLT
leaq _ZL26__cudaUnregisterBinaryUtilv(%rip), %rdi
call atexit@PLT
addq $8, %rsp
.cfi_def_cfa_offset 8
ret
.cfi_endproc
.LFE2083:
.size _ZL24__sti____cudaRegisterAllv, .-_ZL24__sti____cudaRegisterAllv
.section .init_array,"aw"
.align 8
.quad _ZL24__sti____cudaRegisterAllv
.section .nvFatBinSegment,"aw"
.align 8
.type _ZL15__fatDeviceText, @object
.size _ZL15__fatDeviceText, 24
_ZL15__fatDeviceText:
.long 1180844977
.long 1
.quad fatbinData
.quad 0
.local _ZL20__cudaFatCubinHandle
.comm _ZL20__cudaFatCubinHandle,8,8
.ident "GCC: (Ubuntu 13.3.0-6ubuntu2~24.04) 13.3.0"
.section .note.GNU-stack,"",@progbits
.section .note.gnu.property,"a"
.align 8
.long 1f - 0f
.long 4f - 1f
.long 5
0:
.string "GNU"
1:
.align 8
.long 0xc0000002
.long 3f - 2f
2:
.long 0x3
3:
.align 8
4: | .text
.file "main.hip"
.globl main # -- Begin function main
.p2align 4, 0x90
.type main,@function
main: # @main
.cfi_startproc
# %bb.0:
pushq %rax
.cfi_def_cfa_offset 16
movl $.Lstr, %edi
callq puts@PLT
xorl %eax, %eax
popq %rcx
.cfi_def_cfa_offset 8
retq
.Lfunc_end0:
.size main, .Lfunc_end0-main
.cfi_endproc
# -- End function
.type __hip_cuid_,@object # @__hip_cuid_
.bss
.globl __hip_cuid_
__hip_cuid_:
.byte 0 # 0x0
.size __hip_cuid_, 1
.type .Lstr,@object # @str
.section .rodata.str1.1,"aMS",@progbits,1
.Lstr:
.asciz "Several Days of Cuda"
.size .Lstr, 21
.section ".linker-options","e",@llvm_linker_options
.ident "AMD clang version 18.0.0git (https://github.com/RadeonOpenCompute/llvm-project roc-6.3.2 25012 e5bf7e55c91490b07c49d8960fa7983d864936c4)"
.section ".note.GNU-stack","",@progbits
.addrsig
.addrsig_sym __hip_cuid_ |
You are a helpful coding assistant specialized in converting CUDA source code to CUDA host assembly. | /***************************************************************************//**
* \file calculateForce.cu
* \author Anush Krishnan (anush@bu.edu),
* \author Christopher Minar (minarc@oregonstate.edu)
* \based of original cuIBM
*/
#include "calculateForce.h"
namespace kernels
{
/**
* \brief Calculates drag using a control-volume approach (left-right).
*
* Evaluate the contribution from the left and right parts of the control surface.
*
* \param FxX raw pointer to the vector storing the drag in the x-direction
* \param lambda raw pointer to the vector storing all the pressure and Lagrangian forces
* \param q raw pointer to the vector storing all the fluxes
* \param nu viscosity
* \param dx raw pointer to the vector storing the cell widths in the x-direction
* \param dy raw pointer to the vector storing the cell widths in the y-direction
* \param nx number of cells in the x-direction
* \param ny number of cells in the y-direction
* \param I x-index of the bottom-left corner cell of the control surface
* \param J y-index of the top-right corner cell of the control surface
* \param ncx number of cells in the x-direction in the control volume
* \param ncy number of cells in the y-direction in the control volume
*/
__global__
void dragLeftRight(double *FxX, double *u, double *p, double nu, double *dx, double *dy,
int nx, int ny, int I, int J, int ncx, int ncy)
{
int idx = threadIdx.x + blockIdx.x*blockDim.x;
if(idx >= ncy)
return;
int Ip = (J+idx)*nx + I,
Iu = (J+idx)*(nx-1) + I;
FxX[idx] = -(
// multiply the pressure with the surface area to get p dy
//(p[e]-p[w])*dy
(
p[Ip+ncx] - p[Ip]
)*dy[J+idx]
+
// ur^2 - ul^2 * dy
(
(u[Iu+ncx]+u[Iu+ncx-1])*(u[Iu+ncx]+u[Iu+ncx-1])/4
- (u[Iu-1]+u[Iu])*(u[Iu-1]+u[Iu])/4
)*dy[J+idx]
-
// du/dx * dy
// approximate using dudx of the inside cell of the cv instead of the lr average
nu*
(
(u[Iu+ncx] - u[Iu+ncx-1])/dx[I+ncx]
- (u[Iu] - u[Iu-1])/dx[I]
)*dy[J+idx]
);
}
/**
* \brief Calculate drag using a control-volume approach (bottom-top).
*
* Evaluate the contribution from the bottom and top parts of the control surface.
*
* \param FxY raw pointer to the vector storing the drag in the y-direction
* \param q raw pointer to the vector storing all the fluxes
* \param nu viscosity
* \param dx raw pointer to the vector storing the cell widths in the x-direction
* \param dy raw pointer to the vector storing the cell widths in the y-direction
* \param nx number of cells in the x-direction
* \param ny number of cells in the y-direction
* \param I x-index of the bottom-left corner cell of the control surface
* \param J y-index of the top-right corner cell of the control surface
* \param ncx number of cells in the x-direction in the control volume
* \param ncy number of cells in the y-direction in the control volume
*/
__global__
void dragBottomTop(double *FxY, double *u, double nu, double *dx, double *dy,
int nx, int ny, int I, int J, int ncx, int ncy)
{
int idx = threadIdx.x + blockIdx.x*blockDim.x;
if(idx > ncx)
return;
int Iu = J*(nx-1) + (I-1+idx),
Iv = (nx-1)*ny + (J-1)*nx + I+idx;
FxY[idx] = -(
// multiply by dS
(
0.25 * ( u[Iu+ncy*(nx-1)] + u[Iu+(ncy-1)*(nx-1)] )
* ( u[Iv+ncy*nx] + u[Iv+ncy*nx-1] )
-
0.25 * ( u[Iu] + u[Iu-(nx-1)] )
* ( u[Iv] + u[Iv-1] )
)
-
// multiply by dS (cannot use the leftRight trick in this case)
nu*
(
(
(u[Iu+ncy*(nx-1)] - u[Iu+(ncy-1)*(nx-1)])/2.0/(dy[J+ncy]+dy[J+ncy-1]) +
(u[Iv+ncy*nx] - u[Iv+ncy*nx-1]) /2.0/(dx[I+idx]+dx[I+idx-1])
)
-
(
(u[Iu] - u[Iu-(nx-1)])/2.0/(dy[J]+dy[J-1]) +
(u[Iv] - u[Iv-1]) /2.0/(dx[I+idx]+dx[I+idx-1])
)
)
)*0.5*(dx[I+idx]+dx[I+idx-1]);
}
/**
* \brief Calculate drag using a control-volume approach (unsteady).
*
* Evaluate the unsteady contribution of the control volume.
*
* \param FxU raw pointer to the vector storing the unsteady drag components
* \param q raw pointer to the vector storing all the fluxes
* \param qOld raw pointer to the vector sotring all the fluxes at the previous time-step
* \param dx raw pointer to the vector storing the cell widths in the x-direction
* \param dy raw pointer to the vector storing the cell widths in the y-direction
* \param dt time increment
* \param nx number of cells in the x-direction
* \param ny number of cells in the y-direcyion
* \param I x-index of the bottom-left cell of the control surface
* \param J y-index of the top-right cell of the control surface
* \param ncx number of cells in the x-direction in the control volume
* \param nyc number of cells in the y-direction in the control volume
*/
__global__
void dragUnsteady(double *FxU, double *u, double *uold, int *tagsIn, double *dx, double *dy, double dt,
int nx, int ny, int I, int J, int ncx, int ncy)
{
int idx = threadIdx.x + blockIdx.x*blockDim.x;
if(idx >= (ncx+1)*ncy)
return;
int i = idx%(ncx+1),
j = idx/(ncx+1);
int Iu = (J+j)*(nx-1) + (I-1+i);
FxU[idx] = - (tagsIn[Iu] == -1) * ((u[Iu]*dy[J+j] - uold[Iu]*dy[J+j])/dt * 0.5*(dx[I+i]+dx[I-1+i]));
}
/**
* \brief Calculate lift using a control-volume approach (left-right).
*
* Evaluate the contribution from the left and right parts of the control surface.
*
* \param FyX raw pointer to the vector storing the lift components in the x-direction
* \param q raw pointer to the vector storing all the fluxes
* \param nu viscosity
* \param dx raw pointer to the vector storing the cell widths in the x-direction
* \param dy raw pointer to the vector storing the cell widths in the y-direction
* \param nx number of cells in the x-direction
* \param ny number of cells in the y-direcyion
* \param I x-index of the bottom-left cell of the control surface
* \param J y-index of the top-right cell of the control surface
* \param ncx number of cells in the x-direction in the control volume
* \param nyc number of cells in the y-direction in the control volume
*/
__global__
void liftLeftRight(double *FyX, double *u, double nu, double *dx, double *dy,
int nx, int ny, int I, int J, int ncx, int ncy)
{
int idx = threadIdx.x + blockIdx.x*blockDim.x;
if(idx > ncy)
return;
int Iu = (J+idx)*(nx-1) + (I-1),
Iv = (nx-1)*ny + (J-1+idx)*nx + I;
FyX[idx] = -(
// multiply by dS
(
0.25 * ( u[Iu+ncx] + u[Iu+ncx-(nx-1)] )
* ( u[Iv+ncx] + u[Iv+ncx-1] )
-
0.25 * ( u[Iu] + u[Iu-(nx-1)] )
* ( u[Iv] + u[Iv-1] )
)
-
// multiply by dS (cannot use the leftRight trick in this case)
nu*
(
(
(u[Iu+ncx] - u[Iu+ncx-(nx-1)])/2.0/(dy[J+idx]+dy[J-1+idx]) +
(u[Iv+ncx] - u[Iv+ncx-1])/2.0/(dx[I+ncx]+dx[I+ncx-1])
)
-
(
(u[Iu] - u[Iu-(nx-1)])/2.0/(dy[J+idx]+dy[J-1+idx]) +
(u[Iv] - u[Iv-1])/2.0/(dx[I]+dx[I-1])
)
)
)*0.5*(dy[J+idx]+dy[J-1+idx]);
}
/**
* \brief Calculate lift using a control-volume approach (bottom-top).
*
* Evaluate the contribution from the bottom and top parts of the control surface.
*
* \param FyY raw pointer to the vector storing the lift components in the y-direction
* \param q raw pointer to the vector storing all the fluxes
* \param lambda raw pointer to the vector storing the pressure and Lagrangian forces
* \param nu viscosity
* \param dx raw pointer to the vector storing the cell widths in the x-direction
* \param dy raw pointer to the vector storing the cell widths in the y-direction
* \param nx number of cells in the x-direction
* \param ny number of cells in the y-direcyion
* \param I x-index of the bottom-left cell of the control surface
* \param J y-index of the top-right cell of the control surface
* \param ncx number of cells in the x-direction in the control volume
* \param nyc number of cells in the y-direction in the control volume
*/
__global__
void liftBottomTop(double *FyY, double *u, double *p, double nu, double *dx, double *dy,
int nx, int ny, int I, int J, int ncx, int ncy)
{
int idx = threadIdx.x + blockIdx.x*blockDim.x;
if(idx >= ncx)
return;
int Ip = J*nx + I+idx,
Iv = (nx-1)*ny + (J-1)*nx + I+idx;
FyY[idx] = -(
// multiply the pressure with the surface area to get p dx
(p[Ip+ncy*nx]-p[Ip-nx])*dx[I+idx]
+
// divide q^2 by dx, so that just v^2 dx is obtained
(
0.25*(u[Iv+(ncy+1)*nx] + u[Iv+ncy*nx])*(u[Iv+(ncy+1)*nx] + u[Iv+ncy*nx])
- 0.25*(u[Iv] + u[Iv-nx])*(u[Iv] + u[Iv-nx])
)*dx[I+idx]
-
// no multiplication or division since dv/dy dx = dq/dy
nu*
(
(u[Iv+(ncy+1)*nx] - u[Iv+ncy*nx])*dx[I+idx]/dy[J+ncy]
- (u[Iv] - u[Iv-nx])*dx[I]/dy[J-1]
)
);
}
/**
* \brief Calculate lift using a control-volume approach (unsteady).
*
* Evaluate the unsteady contribution of the control volume.
*
* \param FyU raw pointer to the vector storing the unsteady lift components
* \param q raw pointer to the vector storing all the fluxes
* \param qOld raw pointer to the vector sotring all the fluxes at the previous time-step
* \param dx raw pointer to the vector storing the cell widths in the x-direction
* \param dy raw pointer to the vector storing the cell widths in the y-direction
* \param dt time increment
* \param nx number of cells in the x-direction
* \param ny number of cells in the y-direcyion
* \param I x-index of the bottom-left cell of the control surface
* \param J y-index of the top-right cell of the control surface
* \param ncx number of cells in the x-direction in the control volume
* \param nyc number of cells in the y-direction in the control volume
*/
__global__
void liftUnsteady(double *FyU, double *u, double *uold, int *tagsIn, double *dx, double *dy, double dt,
int nx, int ny, int I, int J, int ncx, int ncy)
{
int idx = threadIdx.x + blockIdx.x*blockDim.x;
if( idx >= ncx*(ncy+1) )
return;
int i = idx%ncx,
j = idx/ncx;
int Iv = (J-1+j)*nx + (I+i) + (nx-1)*ny;
FyU[idx] = -(tagsIn[Iv] == -1) * ((u[Iv]*dx[I+i] - uold[Iv]*dx[I+i])/dt * 0.5*(dy[J+j]+dy[J-1+j]));
}
/**
* \brief To be documented
*/
} | .file "tmpxft_00142b8f_00000000-6_calculateForce.cudafe1.cpp"
.text
#APP
#NO_APP
.type _ZL26__cudaUnregisterBinaryUtilv, @function
_ZL26__cudaUnregisterBinaryUtilv:
.LFB2029:
.cfi_startproc
endbr64
subq $8, %rsp
.cfi_def_cfa_offset 16
movq _ZL20__cudaFatCubinHandle(%rip), %rdi
call __cudaUnregisterFatBinary@PLT
addq $8, %rsp
.cfi_def_cfa_offset 8
ret
.cfi_endproc
.LFE2029:
.size _ZL26__cudaUnregisterBinaryUtilv, .-_ZL26__cudaUnregisterBinaryUtilv
.globl _Z62__device_stub__ZN7kernels13dragLeftRightEPdS0_S0_dS0_S0_iiiiiiPdS_S_dS_S_iiiiii
.type _Z62__device_stub__ZN7kernels13dragLeftRightEPdS0_S0_dS0_S0_iiiiiiPdS_S_dS_S_iiiiii, @function
_Z62__device_stub__ZN7kernels13dragLeftRightEPdS0_S0_dS0_S0_iiiiiiPdS_S_dS_S_iiiiii:
.LFB2051:
.cfi_startproc
endbr64
subq $248, %rsp
.cfi_def_cfa_offset 256
movq %rdi, 56(%rsp)
movq %rsi, 48(%rsp)
movq %rdx, 40(%rsp)
movsd %xmm0, 32(%rsp)
movq %rcx, 24(%rsp)
movq %r8, 16(%rsp)
movl %r9d, 12(%rsp)
movq %fs:40, %rax
movq %rax, 232(%rsp)
xorl %eax, %eax
leaq 56(%rsp), %rax
movq %rax, 128(%rsp)
leaq 48(%rsp), %rax
movq %rax, 136(%rsp)
leaq 40(%rsp), %rax
movq %rax, 144(%rsp)
leaq 32(%rsp), %rax
movq %rax, 152(%rsp)
leaq 24(%rsp), %rax
movq %rax, 160(%rsp)
leaq 16(%rsp), %rax
movq %rax, 168(%rsp)
leaq 12(%rsp), %rax
movq %rax, 176(%rsp)
leaq 256(%rsp), %rax
movq %rax, 184(%rsp)
leaq 264(%rsp), %rax
movq %rax, 192(%rsp)
leaq 272(%rsp), %rax
movq %rax, 200(%rsp)
leaq 280(%rsp), %rax
movq %rax, 208(%rsp)
leaq 288(%rsp), %rax
movq %rax, 216(%rsp)
movl $1, 80(%rsp)
movl $1, 84(%rsp)
movl $1, 88(%rsp)
movl $1, 92(%rsp)
movl $1, 96(%rsp)
movl $1, 100(%rsp)
leaq 72(%rsp), %rcx
leaq 64(%rsp), %rdx
leaq 92(%rsp), %rsi
leaq 80(%rsp), %rdi
call __cudaPopCallConfiguration@PLT
testl %eax, %eax
je .L7
.L3:
movq 232(%rsp), %rax
subq %fs:40, %rax
jne .L8
addq $248, %rsp
.cfi_remember_state
.cfi_def_cfa_offset 8
ret
.L7:
.cfi_restore_state
pushq 72(%rsp)
.cfi_def_cfa_offset 264
pushq 72(%rsp)
.cfi_def_cfa_offset 272
leaq 144(%rsp), %r9
movq 108(%rsp), %rcx
movl 116(%rsp), %r8d
movq 96(%rsp), %rsi
movl 104(%rsp), %edx
leaq _ZN7kernels13dragLeftRightEPdS0_S0_dS0_S0_iiiiii(%rip), %rdi
call cudaLaunchKernel@PLT
addq $16, %rsp
.cfi_def_cfa_offset 256
jmp .L3
.L8:
call __stack_chk_fail@PLT
.cfi_endproc
.LFE2051:
.size _Z62__device_stub__ZN7kernels13dragLeftRightEPdS0_S0_dS0_S0_iiiiiiPdS_S_dS_S_iiiiii, .-_Z62__device_stub__ZN7kernels13dragLeftRightEPdS0_S0_dS0_S0_iiiiiiPdS_S_dS_S_iiiiii
.globl _ZN7kernels13dragLeftRightEPdS0_S0_dS0_S0_iiiiii
.type _ZN7kernels13dragLeftRightEPdS0_S0_dS0_S0_iiiiii, @function
_ZN7kernels13dragLeftRightEPdS0_S0_dS0_S0_iiiiii:
.LFB2052:
.cfi_startproc
endbr64
subq $16, %rsp
.cfi_def_cfa_offset 24
movl 56(%rsp), %eax
pushq %rax
.cfi_def_cfa_offset 32
movl 56(%rsp), %eax
pushq %rax
.cfi_def_cfa_offset 40
movl 56(%rsp), %eax
pushq %rax
.cfi_def_cfa_offset 48
movl 56(%rsp), %eax
pushq %rax
.cfi_def_cfa_offset 56
movl 56(%rsp), %eax
pushq %rax
.cfi_def_cfa_offset 64
call _Z62__device_stub__ZN7kernels13dragLeftRightEPdS0_S0_dS0_S0_iiiiiiPdS_S_dS_S_iiiiii
addq $56, %rsp
.cfi_def_cfa_offset 8
ret
.cfi_endproc
.LFE2052:
.size _ZN7kernels13dragLeftRightEPdS0_S0_dS0_S0_iiiiii, .-_ZN7kernels13dragLeftRightEPdS0_S0_dS0_S0_iiiiii
.globl _Z59__device_stub__ZN7kernels13dragBottomTopEPdS0_dS0_S0_iiiiiiPdS_dS_S_iiiiii
.type _Z59__device_stub__ZN7kernels13dragBottomTopEPdS0_dS0_S0_iiiiiiPdS_dS_S_iiiiii, @function
_Z59__device_stub__ZN7kernels13dragBottomTopEPdS0_dS0_S0_iiiiiiPdS_dS_S_iiiiii:
.LFB2053:
.cfi_startproc
endbr64
subq $216, %rsp
.cfi_def_cfa_offset 224
movq %rdi, 40(%rsp)
movq %rsi, 32(%rsp)
movsd %xmm0, 24(%rsp)
movq %rdx, 16(%rsp)
movq %rcx, 8(%rsp)
movl %r8d, 4(%rsp)
movl %r9d, (%rsp)
movq %fs:40, %rax
movq %rax, 200(%rsp)
xorl %eax, %eax
leaq 40(%rsp), %rax
movq %rax, 112(%rsp)
leaq 32(%rsp), %rax
movq %rax, 120(%rsp)
leaq 24(%rsp), %rax
movq %rax, 128(%rsp)
leaq 16(%rsp), %rax
movq %rax, 136(%rsp)
leaq 8(%rsp), %rax
movq %rax, 144(%rsp)
leaq 4(%rsp), %rax
movq %rax, 152(%rsp)
movq %rsp, %rax
movq %rax, 160(%rsp)
leaq 224(%rsp), %rax
movq %rax, 168(%rsp)
leaq 232(%rsp), %rax
movq %rax, 176(%rsp)
leaq 240(%rsp), %rax
movq %rax, 184(%rsp)
leaq 248(%rsp), %rax
movq %rax, 192(%rsp)
movl $1, 64(%rsp)
movl $1, 68(%rsp)
movl $1, 72(%rsp)
movl $1, 76(%rsp)
movl $1, 80(%rsp)
movl $1, 84(%rsp)
leaq 56(%rsp), %rcx
leaq 48(%rsp), %rdx
leaq 76(%rsp), %rsi
leaq 64(%rsp), %rdi
call __cudaPopCallConfiguration@PLT
testl %eax, %eax
je .L15
.L11:
movq 200(%rsp), %rax
subq %fs:40, %rax
jne .L16
addq $216, %rsp
.cfi_remember_state
.cfi_def_cfa_offset 8
ret
.L15:
.cfi_restore_state
pushq 56(%rsp)
.cfi_def_cfa_offset 232
pushq 56(%rsp)
.cfi_def_cfa_offset 240
leaq 128(%rsp), %r9
movq 92(%rsp), %rcx
movl 100(%rsp), %r8d
movq 80(%rsp), %rsi
movl 88(%rsp), %edx
leaq _ZN7kernels13dragBottomTopEPdS0_dS0_S0_iiiiii(%rip), %rdi
call cudaLaunchKernel@PLT
addq $16, %rsp
.cfi_def_cfa_offset 224
jmp .L11
.L16:
call __stack_chk_fail@PLT
.cfi_endproc
.LFE2053:
.size _Z59__device_stub__ZN7kernels13dragBottomTopEPdS0_dS0_S0_iiiiiiPdS_dS_S_iiiiii, .-_Z59__device_stub__ZN7kernels13dragBottomTopEPdS0_dS0_S0_iiiiiiPdS_dS_S_iiiiii
.globl _ZN7kernels13dragBottomTopEPdS0_dS0_S0_iiiiii
.type _ZN7kernels13dragBottomTopEPdS0_dS0_S0_iiiiii, @function
_ZN7kernels13dragBottomTopEPdS0_dS0_S0_iiiiii:
.LFB2054:
.cfi_startproc
endbr64
subq $8, %rsp
.cfi_def_cfa_offset 16
movl 40(%rsp), %eax
pushq %rax
.cfi_def_cfa_offset 24
movl 40(%rsp), %eax
pushq %rax
.cfi_def_cfa_offset 32
movl 40(%rsp), %eax
pushq %rax
.cfi_def_cfa_offset 40
movl 40(%rsp), %eax
pushq %rax
.cfi_def_cfa_offset 48
call _Z59__device_stub__ZN7kernels13dragBottomTopEPdS0_dS0_S0_iiiiiiPdS_dS_S_iiiiii
addq $40, %rsp
.cfi_def_cfa_offset 8
ret
.cfi_endproc
.LFE2054:
.size _ZN7kernels13dragBottomTopEPdS0_dS0_S0_iiiiii, .-_ZN7kernels13dragBottomTopEPdS0_dS0_S0_iiiiii
.globl _Z63__device_stub__ZN7kernels12dragUnsteadyEPdS0_S0_PiS0_S0_diiiiiiPdS_S_PiS_S_diiiiii
.type _Z63__device_stub__ZN7kernels12dragUnsteadyEPdS0_S0_PiS0_S0_diiiiiiPdS_S_PiS_S_diiiiii, @function
_Z63__device_stub__ZN7kernels12dragUnsteadyEPdS0_S0_PiS0_S0_diiiiiiPdS_S_PiS_S_diiiiii:
.LFB2055:
.cfi_startproc
endbr64
subq $248, %rsp
.cfi_def_cfa_offset 256
movq %rdi, 56(%rsp)
movq %rsi, 48(%rsp)
movq %rdx, 40(%rsp)
movq %rcx, 32(%rsp)
movq %r8, 24(%rsp)
movq %r9, 16(%rsp)
movsd %xmm0, 8(%rsp)
movq %fs:40, %rax
movq %rax, 232(%rsp)
xorl %eax, %eax
leaq 56(%rsp), %rax
movq %rax, 128(%rsp)
leaq 48(%rsp), %rax
movq %rax, 136(%rsp)
leaq 40(%rsp), %rax
movq %rax, 144(%rsp)
leaq 32(%rsp), %rax
movq %rax, 152(%rsp)
leaq 24(%rsp), %rax
movq %rax, 160(%rsp)
leaq 16(%rsp), %rax
movq %rax, 168(%rsp)
leaq 8(%rsp), %rax
movq %rax, 176(%rsp)
leaq 256(%rsp), %rax
movq %rax, 184(%rsp)
leaq 264(%rsp), %rax
movq %rax, 192(%rsp)
leaq 272(%rsp), %rax
movq %rax, 200(%rsp)
leaq 280(%rsp), %rax
movq %rax, 208(%rsp)
leaq 288(%rsp), %rax
movq %rax, 216(%rsp)
leaq 296(%rsp), %rax
movq %rax, 224(%rsp)
movl $1, 80(%rsp)
movl $1, 84(%rsp)
movl $1, 88(%rsp)
movl $1, 92(%rsp)
movl $1, 96(%rsp)
movl $1, 100(%rsp)
leaq 72(%rsp), %rcx
leaq 64(%rsp), %rdx
leaq 92(%rsp), %rsi
leaq 80(%rsp), %rdi
call __cudaPopCallConfiguration@PLT
testl %eax, %eax
je .L23
.L19:
movq 232(%rsp), %rax
subq %fs:40, %rax
jne .L24
addq $248, %rsp
.cfi_remember_state
.cfi_def_cfa_offset 8
ret
.L23:
.cfi_restore_state
pushq 72(%rsp)
.cfi_def_cfa_offset 264
pushq 72(%rsp)
.cfi_def_cfa_offset 272
leaq 144(%rsp), %r9
movq 108(%rsp), %rcx
movl 116(%rsp), %r8d
movq 96(%rsp), %rsi
movl 104(%rsp), %edx
leaq _ZN7kernels12dragUnsteadyEPdS0_S0_PiS0_S0_diiiiii(%rip), %rdi
call cudaLaunchKernel@PLT
addq $16, %rsp
.cfi_def_cfa_offset 256
jmp .L19
.L24:
call __stack_chk_fail@PLT
.cfi_endproc
.LFE2055:
.size _Z63__device_stub__ZN7kernels12dragUnsteadyEPdS0_S0_PiS0_S0_diiiiiiPdS_S_PiS_S_diiiiii, .-_Z63__device_stub__ZN7kernels12dragUnsteadyEPdS0_S0_PiS0_S0_diiiiiiPdS_S_PiS_S_diiiiii
.globl _ZN7kernels12dragUnsteadyEPdS0_S0_PiS0_S0_diiiiii
.type _ZN7kernels12dragUnsteadyEPdS0_S0_PiS0_S0_diiiiii, @function
_ZN7kernels12dragUnsteadyEPdS0_S0_PiS0_S0_diiiiii:
.LFB2056:
.cfi_startproc
endbr64
subq $8, %rsp
.cfi_def_cfa_offset 16
movl 56(%rsp), %eax
pushq %rax
.cfi_def_cfa_offset 24
movl 56(%rsp), %eax
pushq %rax
.cfi_def_cfa_offset 32
movl 56(%rsp), %eax
pushq %rax
.cfi_def_cfa_offset 40
movl 56(%rsp), %eax
pushq %rax
.cfi_def_cfa_offset 48
movl 56(%rsp), %eax
pushq %rax
.cfi_def_cfa_offset 56
movl 56(%rsp), %eax
pushq %rax
.cfi_def_cfa_offset 64
call _Z63__device_stub__ZN7kernels12dragUnsteadyEPdS0_S0_PiS0_S0_diiiiiiPdS_S_PiS_S_diiiiii
addq $56, %rsp
.cfi_def_cfa_offset 8
ret
.cfi_endproc
.LFE2056:
.size _ZN7kernels12dragUnsteadyEPdS0_S0_PiS0_S0_diiiiii, .-_ZN7kernels12dragUnsteadyEPdS0_S0_PiS0_S0_diiiiii
.globl _Z59__device_stub__ZN7kernels13liftLeftRightEPdS0_dS0_S0_iiiiiiPdS_dS_S_iiiiii
.type _Z59__device_stub__ZN7kernels13liftLeftRightEPdS0_dS0_S0_iiiiiiPdS_dS_S_iiiiii, @function
_Z59__device_stub__ZN7kernels13liftLeftRightEPdS0_dS0_S0_iiiiiiPdS_dS_S_iiiiii:
.LFB2057:
.cfi_startproc
endbr64
subq $216, %rsp
.cfi_def_cfa_offset 224
movq %rdi, 40(%rsp)
movq %rsi, 32(%rsp)
movsd %xmm0, 24(%rsp)
movq %rdx, 16(%rsp)
movq %rcx, 8(%rsp)
movl %r8d, 4(%rsp)
movl %r9d, (%rsp)
movq %fs:40, %rax
movq %rax, 200(%rsp)
xorl %eax, %eax
leaq 40(%rsp), %rax
movq %rax, 112(%rsp)
leaq 32(%rsp), %rax
movq %rax, 120(%rsp)
leaq 24(%rsp), %rax
movq %rax, 128(%rsp)
leaq 16(%rsp), %rax
movq %rax, 136(%rsp)
leaq 8(%rsp), %rax
movq %rax, 144(%rsp)
leaq 4(%rsp), %rax
movq %rax, 152(%rsp)
movq %rsp, %rax
movq %rax, 160(%rsp)
leaq 224(%rsp), %rax
movq %rax, 168(%rsp)
leaq 232(%rsp), %rax
movq %rax, 176(%rsp)
leaq 240(%rsp), %rax
movq %rax, 184(%rsp)
leaq 248(%rsp), %rax
movq %rax, 192(%rsp)
movl $1, 64(%rsp)
movl $1, 68(%rsp)
movl $1, 72(%rsp)
movl $1, 76(%rsp)
movl $1, 80(%rsp)
movl $1, 84(%rsp)
leaq 56(%rsp), %rcx
leaq 48(%rsp), %rdx
leaq 76(%rsp), %rsi
leaq 64(%rsp), %rdi
call __cudaPopCallConfiguration@PLT
testl %eax, %eax
je .L31
.L27:
movq 200(%rsp), %rax
subq %fs:40, %rax
jne .L32
addq $216, %rsp
.cfi_remember_state
.cfi_def_cfa_offset 8
ret
.L31:
.cfi_restore_state
pushq 56(%rsp)
.cfi_def_cfa_offset 232
pushq 56(%rsp)
.cfi_def_cfa_offset 240
leaq 128(%rsp), %r9
movq 92(%rsp), %rcx
movl 100(%rsp), %r8d
movq 80(%rsp), %rsi
movl 88(%rsp), %edx
leaq _ZN7kernels13liftLeftRightEPdS0_dS0_S0_iiiiii(%rip), %rdi
call cudaLaunchKernel@PLT
addq $16, %rsp
.cfi_def_cfa_offset 224
jmp .L27
.L32:
call __stack_chk_fail@PLT
.cfi_endproc
.LFE2057:
.size _Z59__device_stub__ZN7kernels13liftLeftRightEPdS0_dS0_S0_iiiiiiPdS_dS_S_iiiiii, .-_Z59__device_stub__ZN7kernels13liftLeftRightEPdS0_dS0_S0_iiiiiiPdS_dS_S_iiiiii
.globl _ZN7kernels13liftLeftRightEPdS0_dS0_S0_iiiiii
.type _ZN7kernels13liftLeftRightEPdS0_dS0_S0_iiiiii, @function
_ZN7kernels13liftLeftRightEPdS0_dS0_S0_iiiiii:
.LFB2058:
.cfi_startproc
endbr64
subq $8, %rsp
.cfi_def_cfa_offset 16
movl 40(%rsp), %eax
pushq %rax
.cfi_def_cfa_offset 24
movl 40(%rsp), %eax
pushq %rax
.cfi_def_cfa_offset 32
movl 40(%rsp), %eax
pushq %rax
.cfi_def_cfa_offset 40
movl 40(%rsp), %eax
pushq %rax
.cfi_def_cfa_offset 48
call _Z59__device_stub__ZN7kernels13liftLeftRightEPdS0_dS0_S0_iiiiiiPdS_dS_S_iiiiii
addq $40, %rsp
.cfi_def_cfa_offset 8
ret
.cfi_endproc
.LFE2058:
.size _ZN7kernels13liftLeftRightEPdS0_dS0_S0_iiiiii, .-_ZN7kernels13liftLeftRightEPdS0_dS0_S0_iiiiii
.globl _Z62__device_stub__ZN7kernels13liftBottomTopEPdS0_S0_dS0_S0_iiiiiiPdS_S_dS_S_iiiiii
.type _Z62__device_stub__ZN7kernels13liftBottomTopEPdS0_S0_dS0_S0_iiiiiiPdS_S_dS_S_iiiiii, @function
_Z62__device_stub__ZN7kernels13liftBottomTopEPdS0_S0_dS0_S0_iiiiiiPdS_S_dS_S_iiiiii:
.LFB2059:
.cfi_startproc
endbr64
subq $248, %rsp
.cfi_def_cfa_offset 256
movq %rdi, 56(%rsp)
movq %rsi, 48(%rsp)
movq %rdx, 40(%rsp)
movsd %xmm0, 32(%rsp)
movq %rcx, 24(%rsp)
movq %r8, 16(%rsp)
movl %r9d, 12(%rsp)
movq %fs:40, %rax
movq %rax, 232(%rsp)
xorl %eax, %eax
leaq 56(%rsp), %rax
movq %rax, 128(%rsp)
leaq 48(%rsp), %rax
movq %rax, 136(%rsp)
leaq 40(%rsp), %rax
movq %rax, 144(%rsp)
leaq 32(%rsp), %rax
movq %rax, 152(%rsp)
leaq 24(%rsp), %rax
movq %rax, 160(%rsp)
leaq 16(%rsp), %rax
movq %rax, 168(%rsp)
leaq 12(%rsp), %rax
movq %rax, 176(%rsp)
leaq 256(%rsp), %rax
movq %rax, 184(%rsp)
leaq 264(%rsp), %rax
movq %rax, 192(%rsp)
leaq 272(%rsp), %rax
movq %rax, 200(%rsp)
leaq 280(%rsp), %rax
movq %rax, 208(%rsp)
leaq 288(%rsp), %rax
movq %rax, 216(%rsp)
movl $1, 80(%rsp)
movl $1, 84(%rsp)
movl $1, 88(%rsp)
movl $1, 92(%rsp)
movl $1, 96(%rsp)
movl $1, 100(%rsp)
leaq 72(%rsp), %rcx
leaq 64(%rsp), %rdx
leaq 92(%rsp), %rsi
leaq 80(%rsp), %rdi
call __cudaPopCallConfiguration@PLT
testl %eax, %eax
je .L39
.L35:
movq 232(%rsp), %rax
subq %fs:40, %rax
jne .L40
addq $248, %rsp
.cfi_remember_state
.cfi_def_cfa_offset 8
ret
.L39:
.cfi_restore_state
pushq 72(%rsp)
.cfi_def_cfa_offset 264
pushq 72(%rsp)
.cfi_def_cfa_offset 272
leaq 144(%rsp), %r9
movq 108(%rsp), %rcx
movl 116(%rsp), %r8d
movq 96(%rsp), %rsi
movl 104(%rsp), %edx
leaq _ZN7kernels13liftBottomTopEPdS0_S0_dS0_S0_iiiiii(%rip), %rdi
call cudaLaunchKernel@PLT
addq $16, %rsp
.cfi_def_cfa_offset 256
jmp .L35
.L40:
call __stack_chk_fail@PLT
.cfi_endproc
.LFE2059:
.size _Z62__device_stub__ZN7kernels13liftBottomTopEPdS0_S0_dS0_S0_iiiiiiPdS_S_dS_S_iiiiii, .-_Z62__device_stub__ZN7kernels13liftBottomTopEPdS0_S0_dS0_S0_iiiiiiPdS_S_dS_S_iiiiii
.globl _ZN7kernels13liftBottomTopEPdS0_S0_dS0_S0_iiiiii
.type _ZN7kernels13liftBottomTopEPdS0_S0_dS0_S0_iiiiii, @function
_ZN7kernels13liftBottomTopEPdS0_S0_dS0_S0_iiiiii:
.LFB2060:
.cfi_startproc
endbr64
subq $16, %rsp
.cfi_def_cfa_offset 24
movl 56(%rsp), %eax
pushq %rax
.cfi_def_cfa_offset 32
movl 56(%rsp), %eax
pushq %rax
.cfi_def_cfa_offset 40
movl 56(%rsp), %eax
pushq %rax
.cfi_def_cfa_offset 48
movl 56(%rsp), %eax
pushq %rax
.cfi_def_cfa_offset 56
movl 56(%rsp), %eax
pushq %rax
.cfi_def_cfa_offset 64
call _Z62__device_stub__ZN7kernels13liftBottomTopEPdS0_S0_dS0_S0_iiiiiiPdS_S_dS_S_iiiiii
addq $56, %rsp
.cfi_def_cfa_offset 8
ret
.cfi_endproc
.LFE2060:
.size _ZN7kernels13liftBottomTopEPdS0_S0_dS0_S0_iiiiii, .-_ZN7kernels13liftBottomTopEPdS0_S0_dS0_S0_iiiiii
.globl _Z63__device_stub__ZN7kernels12liftUnsteadyEPdS0_S0_PiS0_S0_diiiiiiPdS_S_PiS_S_diiiiii
.type _Z63__device_stub__ZN7kernels12liftUnsteadyEPdS0_S0_PiS0_S0_diiiiiiPdS_S_PiS_S_diiiiii, @function
_Z63__device_stub__ZN7kernels12liftUnsteadyEPdS0_S0_PiS0_S0_diiiiiiPdS_S_PiS_S_diiiiii:
.LFB2061:
.cfi_startproc
endbr64
subq $248, %rsp
.cfi_def_cfa_offset 256
movq %rdi, 56(%rsp)
movq %rsi, 48(%rsp)
movq %rdx, 40(%rsp)
movq %rcx, 32(%rsp)
movq %r8, 24(%rsp)
movq %r9, 16(%rsp)
movsd %xmm0, 8(%rsp)
movq %fs:40, %rax
movq %rax, 232(%rsp)
xorl %eax, %eax
leaq 56(%rsp), %rax
movq %rax, 128(%rsp)
leaq 48(%rsp), %rax
movq %rax, 136(%rsp)
leaq 40(%rsp), %rax
movq %rax, 144(%rsp)
leaq 32(%rsp), %rax
movq %rax, 152(%rsp)
leaq 24(%rsp), %rax
movq %rax, 160(%rsp)
leaq 16(%rsp), %rax
movq %rax, 168(%rsp)
leaq 8(%rsp), %rax
movq %rax, 176(%rsp)
leaq 256(%rsp), %rax
movq %rax, 184(%rsp)
leaq 264(%rsp), %rax
movq %rax, 192(%rsp)
leaq 272(%rsp), %rax
movq %rax, 200(%rsp)
leaq 280(%rsp), %rax
movq %rax, 208(%rsp)
leaq 288(%rsp), %rax
movq %rax, 216(%rsp)
leaq 296(%rsp), %rax
movq %rax, 224(%rsp)
movl $1, 80(%rsp)
movl $1, 84(%rsp)
movl $1, 88(%rsp)
movl $1, 92(%rsp)
movl $1, 96(%rsp)
movl $1, 100(%rsp)
leaq 72(%rsp), %rcx
leaq 64(%rsp), %rdx
leaq 92(%rsp), %rsi
leaq 80(%rsp), %rdi
call __cudaPopCallConfiguration@PLT
testl %eax, %eax
je .L47
.L43:
movq 232(%rsp), %rax
subq %fs:40, %rax
jne .L48
addq $248, %rsp
.cfi_remember_state
.cfi_def_cfa_offset 8
ret
.L47:
.cfi_restore_state
pushq 72(%rsp)
.cfi_def_cfa_offset 264
pushq 72(%rsp)
.cfi_def_cfa_offset 272
leaq 144(%rsp), %r9
movq 108(%rsp), %rcx
movl 116(%rsp), %r8d
movq 96(%rsp), %rsi
movl 104(%rsp), %edx
leaq _ZN7kernels12liftUnsteadyEPdS0_S0_PiS0_S0_diiiiii(%rip), %rdi
call cudaLaunchKernel@PLT
addq $16, %rsp
.cfi_def_cfa_offset 256
jmp .L43
.L48:
call __stack_chk_fail@PLT
.cfi_endproc
.LFE2061:
.size _Z63__device_stub__ZN7kernels12liftUnsteadyEPdS0_S0_PiS0_S0_diiiiiiPdS_S_PiS_S_diiiiii, .-_Z63__device_stub__ZN7kernels12liftUnsteadyEPdS0_S0_PiS0_S0_diiiiiiPdS_S_PiS_S_diiiiii
.globl _ZN7kernels12liftUnsteadyEPdS0_S0_PiS0_S0_diiiiii
.type _ZN7kernels12liftUnsteadyEPdS0_S0_PiS0_S0_diiiiii, @function
_ZN7kernels12liftUnsteadyEPdS0_S0_PiS0_S0_diiiiii:
.LFB2062:
.cfi_startproc
endbr64
subq $8, %rsp
.cfi_def_cfa_offset 16
movl 56(%rsp), %eax
pushq %rax
.cfi_def_cfa_offset 24
movl 56(%rsp), %eax
pushq %rax
.cfi_def_cfa_offset 32
movl 56(%rsp), %eax
pushq %rax
.cfi_def_cfa_offset 40
movl 56(%rsp), %eax
pushq %rax
.cfi_def_cfa_offset 48
movl 56(%rsp), %eax
pushq %rax
.cfi_def_cfa_offset 56
movl 56(%rsp), %eax
pushq %rax
.cfi_def_cfa_offset 64
call _Z63__device_stub__ZN7kernels12liftUnsteadyEPdS0_S0_PiS0_S0_diiiiiiPdS_S_PiS_S_diiiiii
addq $56, %rsp
.cfi_def_cfa_offset 8
ret
.cfi_endproc
.LFE2062:
.size _ZN7kernels12liftUnsteadyEPdS0_S0_PiS0_S0_diiiiii, .-_ZN7kernels12liftUnsteadyEPdS0_S0_PiS0_S0_diiiiii
.section .rodata.str1.8,"aMS",@progbits,1
.align 8
.LC0:
.string "_ZN7kernels12liftUnsteadyEPdS0_S0_PiS0_S0_diiiiii"
.align 8
.LC1:
.string "_ZN7kernels13liftBottomTopEPdS0_S0_dS0_S0_iiiiii"
.align 8
.LC2:
.string "_ZN7kernels13liftLeftRightEPdS0_dS0_S0_iiiiii"
.align 8
.LC3:
.string "_ZN7kernels12dragUnsteadyEPdS0_S0_PiS0_S0_diiiiii"
.align 8
.LC4:
.string "_ZN7kernels13dragBottomTopEPdS0_dS0_S0_iiiiii"
.align 8
.LC5:
.string "_ZN7kernels13dragLeftRightEPdS0_S0_dS0_S0_iiiiii"
.text
.type _ZL24__sti____cudaRegisterAllv, @function
_ZL24__sti____cudaRegisterAllv:
.LFB2064:
.cfi_startproc
endbr64
pushq %rbx
.cfi_def_cfa_offset 16
.cfi_offset 3, -16
leaq _ZL15__fatDeviceText(%rip), %rdi
call __cudaRegisterFatBinary@PLT
movq %rax, %rbx
movq %rax, _ZL20__cudaFatCubinHandle(%rip)
pushq $0
.cfi_def_cfa_offset 24
pushq $0
.cfi_def_cfa_offset 32
pushq $0
.cfi_def_cfa_offset 40
pushq $0
.cfi_def_cfa_offset 48
movl $0, %r9d
movl $-1, %r8d
leaq .LC0(%rip), %rdx
movq %rdx, %rcx
leaq _ZN7kernels12liftUnsteadyEPdS0_S0_PiS0_S0_diiiiii(%rip), %rsi
movq %rax, %rdi
call __cudaRegisterFunction@PLT
addq $32, %rsp
.cfi_def_cfa_offset 16
pushq $0
.cfi_def_cfa_offset 24
pushq $0
.cfi_def_cfa_offset 32
pushq $0
.cfi_def_cfa_offset 40
pushq $0
.cfi_def_cfa_offset 48
movl $0, %r9d
movl $-1, %r8d
leaq .LC1(%rip), %rdx
movq %rdx, %rcx
leaq _ZN7kernels13liftBottomTopEPdS0_S0_dS0_S0_iiiiii(%rip), %rsi
movq %rbx, %rdi
call __cudaRegisterFunction@PLT
addq $32, %rsp
.cfi_def_cfa_offset 16
pushq $0
.cfi_def_cfa_offset 24
pushq $0
.cfi_def_cfa_offset 32
pushq $0
.cfi_def_cfa_offset 40
pushq $0
.cfi_def_cfa_offset 48
movl $0, %r9d
movl $-1, %r8d
leaq .LC2(%rip), %rdx
movq %rdx, %rcx
leaq _ZN7kernels13liftLeftRightEPdS0_dS0_S0_iiiiii(%rip), %rsi
movq %rbx, %rdi
call __cudaRegisterFunction@PLT
addq $32, %rsp
.cfi_def_cfa_offset 16
pushq $0
.cfi_def_cfa_offset 24
pushq $0
.cfi_def_cfa_offset 32
pushq $0
.cfi_def_cfa_offset 40
pushq $0
.cfi_def_cfa_offset 48
movl $0, %r9d
movl $-1, %r8d
leaq .LC3(%rip), %rdx
movq %rdx, %rcx
leaq _ZN7kernels12dragUnsteadyEPdS0_S0_PiS0_S0_diiiiii(%rip), %rsi
movq %rbx, %rdi
call __cudaRegisterFunction@PLT
addq $32, %rsp
.cfi_def_cfa_offset 16
pushq $0
.cfi_def_cfa_offset 24
pushq $0
.cfi_def_cfa_offset 32
pushq $0
.cfi_def_cfa_offset 40
pushq $0
.cfi_def_cfa_offset 48
movl $0, %r9d
movl $-1, %r8d
leaq .LC4(%rip), %rdx
movq %rdx, %rcx
leaq _ZN7kernels13dragBottomTopEPdS0_dS0_S0_iiiiii(%rip), %rsi
movq %rbx, %rdi
call __cudaRegisterFunction@PLT
addq $32, %rsp
.cfi_def_cfa_offset 16
pushq $0
.cfi_def_cfa_offset 24
pushq $0
.cfi_def_cfa_offset 32
pushq $0
.cfi_def_cfa_offset 40
pushq $0
.cfi_def_cfa_offset 48
movl $0, %r9d
movl $-1, %r8d
leaq .LC5(%rip), %rdx
movq %rdx, %rcx
leaq _ZN7kernels13dragLeftRightEPdS0_S0_dS0_S0_iiiiii(%rip), %rsi
movq %rbx, %rdi
call __cudaRegisterFunction@PLT
addq $32, %rsp
.cfi_def_cfa_offset 16
movq _ZL20__cudaFatCubinHandle(%rip), %rdi
call __cudaRegisterFatBinaryEnd@PLT
leaq _ZL26__cudaUnregisterBinaryUtilv(%rip), %rdi
call atexit@PLT
popq %rbx
.cfi_def_cfa_offset 8
ret
.cfi_endproc
.LFE2064:
.size _ZL24__sti____cudaRegisterAllv, .-_ZL24__sti____cudaRegisterAllv
.section .init_array,"aw"
.align 8
.quad _ZL24__sti____cudaRegisterAllv
.section .nvFatBinSegment,"aw"
.align 8
.type _ZL15__fatDeviceText, @object
.size _ZL15__fatDeviceText, 24
_ZL15__fatDeviceText:
.long 1180844977
.long 1
.quad fatbinData
.quad 0
.local _ZL20__cudaFatCubinHandle
.comm _ZL20__cudaFatCubinHandle,8,8
.ident "GCC: (Ubuntu 13.3.0-6ubuntu2~24.04) 13.3.0"
.section .note.GNU-stack,"",@progbits
.section .note.gnu.property,"a"
.align 8
.long 1f - 0f
.long 4f - 1f
.long 5
0:
.string "GNU"
1:
.align 8
.long 0xc0000002
.long 3f - 2f
2:
.long 0x3
3:
.align 8
4: |
You are a helpful coding assistant specialized in converting CUDA source code to HIP/AMD source code. | /***************************************************************************//**
* \file calculateForce.cu
* \author Anush Krishnan (anush@bu.edu),
* \author Christopher Minar (minarc@oregonstate.edu)
* \based of original cuIBM
*/
#include "calculateForce.h"
namespace kernels
{
/**
* \brief Calculates drag using a control-volume approach (left-right).
*
* Evaluate the contribution from the left and right parts of the control surface.
*
* \param FxX raw pointer to the vector storing the drag in the x-direction
* \param lambda raw pointer to the vector storing all the pressure and Lagrangian forces
* \param q raw pointer to the vector storing all the fluxes
* \param nu viscosity
* \param dx raw pointer to the vector storing the cell widths in the x-direction
* \param dy raw pointer to the vector storing the cell widths in the y-direction
* \param nx number of cells in the x-direction
* \param ny number of cells in the y-direction
* \param I x-index of the bottom-left corner cell of the control surface
* \param J y-index of the top-right corner cell of the control surface
* \param ncx number of cells in the x-direction in the control volume
* \param ncy number of cells in the y-direction in the control volume
*/
__global__
void dragLeftRight(double *FxX, double *u, double *p, double nu, double *dx, double *dy,
int nx, int ny, int I, int J, int ncx, int ncy)
{
int idx = threadIdx.x + blockIdx.x*blockDim.x;
if(idx >= ncy)
return;
int Ip = (J+idx)*nx + I,
Iu = (J+idx)*(nx-1) + I;
FxX[idx] = -(
// multiply the pressure with the surface area to get p dy
//(p[e]-p[w])*dy
(
p[Ip+ncx] - p[Ip]
)*dy[J+idx]
+
// ur^2 - ul^2 * dy
(
(u[Iu+ncx]+u[Iu+ncx-1])*(u[Iu+ncx]+u[Iu+ncx-1])/4
- (u[Iu-1]+u[Iu])*(u[Iu-1]+u[Iu])/4
)*dy[J+idx]
-
// du/dx * dy
// approximate using dudx of the inside cell of the cv instead of the lr average
nu*
(
(u[Iu+ncx] - u[Iu+ncx-1])/dx[I+ncx]
- (u[Iu] - u[Iu-1])/dx[I]
)*dy[J+idx]
);
}
/**
* \brief Calculate drag using a control-volume approach (bottom-top).
*
* Evaluate the contribution from the bottom and top parts of the control surface.
*
* \param FxY raw pointer to the vector storing the drag in the y-direction
* \param q raw pointer to the vector storing all the fluxes
* \param nu viscosity
* \param dx raw pointer to the vector storing the cell widths in the x-direction
* \param dy raw pointer to the vector storing the cell widths in the y-direction
* \param nx number of cells in the x-direction
* \param ny number of cells in the y-direction
* \param I x-index of the bottom-left corner cell of the control surface
* \param J y-index of the top-right corner cell of the control surface
* \param ncx number of cells in the x-direction in the control volume
* \param ncy number of cells in the y-direction in the control volume
*/
__global__
void dragBottomTop(double *FxY, double *u, double nu, double *dx, double *dy,
int nx, int ny, int I, int J, int ncx, int ncy)
{
int idx = threadIdx.x + blockIdx.x*blockDim.x;
if(idx > ncx)
return;
int Iu = J*(nx-1) + (I-1+idx),
Iv = (nx-1)*ny + (J-1)*nx + I+idx;
FxY[idx] = -(
// multiply by dS
(
0.25 * ( u[Iu+ncy*(nx-1)] + u[Iu+(ncy-1)*(nx-1)] )
* ( u[Iv+ncy*nx] + u[Iv+ncy*nx-1] )
-
0.25 * ( u[Iu] + u[Iu-(nx-1)] )
* ( u[Iv] + u[Iv-1] )
)
-
// multiply by dS (cannot use the leftRight trick in this case)
nu*
(
(
(u[Iu+ncy*(nx-1)] - u[Iu+(ncy-1)*(nx-1)])/2.0/(dy[J+ncy]+dy[J+ncy-1]) +
(u[Iv+ncy*nx] - u[Iv+ncy*nx-1]) /2.0/(dx[I+idx]+dx[I+idx-1])
)
-
(
(u[Iu] - u[Iu-(nx-1)])/2.0/(dy[J]+dy[J-1]) +
(u[Iv] - u[Iv-1]) /2.0/(dx[I+idx]+dx[I+idx-1])
)
)
)*0.5*(dx[I+idx]+dx[I+idx-1]);
}
/**
* \brief Calculate drag using a control-volume approach (unsteady).
*
* Evaluate the unsteady contribution of the control volume.
*
* \param FxU raw pointer to the vector storing the unsteady drag components
* \param q raw pointer to the vector storing all the fluxes
* \param qOld raw pointer to the vector sotring all the fluxes at the previous time-step
* \param dx raw pointer to the vector storing the cell widths in the x-direction
* \param dy raw pointer to the vector storing the cell widths in the y-direction
* \param dt time increment
* \param nx number of cells in the x-direction
* \param ny number of cells in the y-direcyion
* \param I x-index of the bottom-left cell of the control surface
* \param J y-index of the top-right cell of the control surface
* \param ncx number of cells in the x-direction in the control volume
* \param nyc number of cells in the y-direction in the control volume
*/
__global__
void dragUnsteady(double *FxU, double *u, double *uold, int *tagsIn, double *dx, double *dy, double dt,
int nx, int ny, int I, int J, int ncx, int ncy)
{
int idx = threadIdx.x + blockIdx.x*blockDim.x;
if(idx >= (ncx+1)*ncy)
return;
int i = idx%(ncx+1),
j = idx/(ncx+1);
int Iu = (J+j)*(nx-1) + (I-1+i);
FxU[idx] = - (tagsIn[Iu] == -1) * ((u[Iu]*dy[J+j] - uold[Iu]*dy[J+j])/dt * 0.5*(dx[I+i]+dx[I-1+i]));
}
/**
* \brief Calculate lift using a control-volume approach (left-right).
*
* Evaluate the contribution from the left and right parts of the control surface.
*
* \param FyX raw pointer to the vector storing the lift components in the x-direction
* \param q raw pointer to the vector storing all the fluxes
* \param nu viscosity
* \param dx raw pointer to the vector storing the cell widths in the x-direction
* \param dy raw pointer to the vector storing the cell widths in the y-direction
* \param nx number of cells in the x-direction
* \param ny number of cells in the y-direcyion
* \param I x-index of the bottom-left cell of the control surface
* \param J y-index of the top-right cell of the control surface
* \param ncx number of cells in the x-direction in the control volume
* \param nyc number of cells in the y-direction in the control volume
*/
__global__
void liftLeftRight(double *FyX, double *u, double nu, double *dx, double *dy,
int nx, int ny, int I, int J, int ncx, int ncy)
{
int idx = threadIdx.x + blockIdx.x*blockDim.x;
if(idx > ncy)
return;
int Iu = (J+idx)*(nx-1) + (I-1),
Iv = (nx-1)*ny + (J-1+idx)*nx + I;
FyX[idx] = -(
// multiply by dS
(
0.25 * ( u[Iu+ncx] + u[Iu+ncx-(nx-1)] )
* ( u[Iv+ncx] + u[Iv+ncx-1] )
-
0.25 * ( u[Iu] + u[Iu-(nx-1)] )
* ( u[Iv] + u[Iv-1] )
)
-
// multiply by dS (cannot use the leftRight trick in this case)
nu*
(
(
(u[Iu+ncx] - u[Iu+ncx-(nx-1)])/2.0/(dy[J+idx]+dy[J-1+idx]) +
(u[Iv+ncx] - u[Iv+ncx-1])/2.0/(dx[I+ncx]+dx[I+ncx-1])
)
-
(
(u[Iu] - u[Iu-(nx-1)])/2.0/(dy[J+idx]+dy[J-1+idx]) +
(u[Iv] - u[Iv-1])/2.0/(dx[I]+dx[I-1])
)
)
)*0.5*(dy[J+idx]+dy[J-1+idx]);
}
/**
* \brief Calculate lift using a control-volume approach (bottom-top).
*
* Evaluate the contribution from the bottom and top parts of the control surface.
*
* \param FyY raw pointer to the vector storing the lift components in the y-direction
* \param q raw pointer to the vector storing all the fluxes
* \param lambda raw pointer to the vector storing the pressure and Lagrangian forces
* \param nu viscosity
* \param dx raw pointer to the vector storing the cell widths in the x-direction
* \param dy raw pointer to the vector storing the cell widths in the y-direction
* \param nx number of cells in the x-direction
* \param ny number of cells in the y-direcyion
* \param I x-index of the bottom-left cell of the control surface
* \param J y-index of the top-right cell of the control surface
* \param ncx number of cells in the x-direction in the control volume
* \param nyc number of cells in the y-direction in the control volume
*/
__global__
void liftBottomTop(double *FyY, double *u, double *p, double nu, double *dx, double *dy,
int nx, int ny, int I, int J, int ncx, int ncy)
{
int idx = threadIdx.x + blockIdx.x*blockDim.x;
if(idx >= ncx)
return;
int Ip = J*nx + I+idx,
Iv = (nx-1)*ny + (J-1)*nx + I+idx;
FyY[idx] = -(
// multiply the pressure with the surface area to get p dx
(p[Ip+ncy*nx]-p[Ip-nx])*dx[I+idx]
+
// divide q^2 by dx, so that just v^2 dx is obtained
(
0.25*(u[Iv+(ncy+1)*nx] + u[Iv+ncy*nx])*(u[Iv+(ncy+1)*nx] + u[Iv+ncy*nx])
- 0.25*(u[Iv] + u[Iv-nx])*(u[Iv] + u[Iv-nx])
)*dx[I+idx]
-
// no multiplication or division since dv/dy dx = dq/dy
nu*
(
(u[Iv+(ncy+1)*nx] - u[Iv+ncy*nx])*dx[I+idx]/dy[J+ncy]
- (u[Iv] - u[Iv-nx])*dx[I]/dy[J-1]
)
);
}
/**
* \brief Calculate lift using a control-volume approach (unsteady).
*
* Evaluate the unsteady contribution of the control volume.
*
* \param FyU raw pointer to the vector storing the unsteady lift components
* \param q raw pointer to the vector storing all the fluxes
* \param qOld raw pointer to the vector sotring all the fluxes at the previous time-step
* \param dx raw pointer to the vector storing the cell widths in the x-direction
* \param dy raw pointer to the vector storing the cell widths in the y-direction
* \param dt time increment
* \param nx number of cells in the x-direction
* \param ny number of cells in the y-direcyion
* \param I x-index of the bottom-left cell of the control surface
* \param J y-index of the top-right cell of the control surface
* \param ncx number of cells in the x-direction in the control volume
* \param nyc number of cells in the y-direction in the control volume
*/
__global__
void liftUnsteady(double *FyU, double *u, double *uold, int *tagsIn, double *dx, double *dy, double dt,
int nx, int ny, int I, int J, int ncx, int ncy)
{
int idx = threadIdx.x + blockIdx.x*blockDim.x;
if( idx >= ncx*(ncy+1) )
return;
int i = idx%ncx,
j = idx/ncx;
int Iv = (J-1+j)*nx + (I+i) + (nx-1)*ny;
FyU[idx] = -(tagsIn[Iv] == -1) * ((u[Iv]*dx[I+i] - uold[Iv]*dx[I+i])/dt * 0.5*(dy[J+j]+dy[J-1+j]));
}
/**
* \brief To be documented
*/
} | /***************************************************************************//**
* \file calculateForce.cu
* \author Anush Krishnan (anush@bu.edu),
* \author Christopher Minar (minarc@oregonstate.edu)
* \based of original cuIBM
*/
#include <hip/hip_runtime.h>
#include "calculateForce.h"
namespace kernels
{
/**
* \brief Calculates drag using a control-volume approach (left-right).
*
* Evaluate the contribution from the left and right parts of the control surface.
*
* \param FxX raw pointer to the vector storing the drag in the x-direction
* \param lambda raw pointer to the vector storing all the pressure and Lagrangian forces
* \param q raw pointer to the vector storing all the fluxes
* \param nu viscosity
* \param dx raw pointer to the vector storing the cell widths in the x-direction
* \param dy raw pointer to the vector storing the cell widths in the y-direction
* \param nx number of cells in the x-direction
* \param ny number of cells in the y-direction
* \param I x-index of the bottom-left corner cell of the control surface
* \param J y-index of the top-right corner cell of the control surface
* \param ncx number of cells in the x-direction in the control volume
* \param ncy number of cells in the y-direction in the control volume
*/
__global__
void dragLeftRight(double *FxX, double *u, double *p, double nu, double *dx, double *dy,
int nx, int ny, int I, int J, int ncx, int ncy)
{
int idx = threadIdx.x + blockIdx.x*blockDim.x;
if(idx >= ncy)
return;
int Ip = (J+idx)*nx + I,
Iu = (J+idx)*(nx-1) + I;
FxX[idx] = -(
// multiply the pressure with the surface area to get p dy
//(p[e]-p[w])*dy
(
p[Ip+ncx] - p[Ip]
)*dy[J+idx]
+
// ur^2 - ul^2 * dy
(
(u[Iu+ncx]+u[Iu+ncx-1])*(u[Iu+ncx]+u[Iu+ncx-1])/4
- (u[Iu-1]+u[Iu])*(u[Iu-1]+u[Iu])/4
)*dy[J+idx]
-
// du/dx * dy
// approximate using dudx of the inside cell of the cv instead of the lr average
nu*
(
(u[Iu+ncx] - u[Iu+ncx-1])/dx[I+ncx]
- (u[Iu] - u[Iu-1])/dx[I]
)*dy[J+idx]
);
}
/**
* \brief Calculate drag using a control-volume approach (bottom-top).
*
* Evaluate the contribution from the bottom and top parts of the control surface.
*
* \param FxY raw pointer to the vector storing the drag in the y-direction
* \param q raw pointer to the vector storing all the fluxes
* \param nu viscosity
* \param dx raw pointer to the vector storing the cell widths in the x-direction
* \param dy raw pointer to the vector storing the cell widths in the y-direction
* \param nx number of cells in the x-direction
* \param ny number of cells in the y-direction
* \param I x-index of the bottom-left corner cell of the control surface
* \param J y-index of the top-right corner cell of the control surface
* \param ncx number of cells in the x-direction in the control volume
* \param ncy number of cells in the y-direction in the control volume
*/
__global__
void dragBottomTop(double *FxY, double *u, double nu, double *dx, double *dy,
int nx, int ny, int I, int J, int ncx, int ncy)
{
int idx = threadIdx.x + blockIdx.x*blockDim.x;
if(idx > ncx)
return;
int Iu = J*(nx-1) + (I-1+idx),
Iv = (nx-1)*ny + (J-1)*nx + I+idx;
FxY[idx] = -(
// multiply by dS
(
0.25 * ( u[Iu+ncy*(nx-1)] + u[Iu+(ncy-1)*(nx-1)] )
* ( u[Iv+ncy*nx] + u[Iv+ncy*nx-1] )
-
0.25 * ( u[Iu] + u[Iu-(nx-1)] )
* ( u[Iv] + u[Iv-1] )
)
-
// multiply by dS (cannot use the leftRight trick in this case)
nu*
(
(
(u[Iu+ncy*(nx-1)] - u[Iu+(ncy-1)*(nx-1)])/2.0/(dy[J+ncy]+dy[J+ncy-1]) +
(u[Iv+ncy*nx] - u[Iv+ncy*nx-1]) /2.0/(dx[I+idx]+dx[I+idx-1])
)
-
(
(u[Iu] - u[Iu-(nx-1)])/2.0/(dy[J]+dy[J-1]) +
(u[Iv] - u[Iv-1]) /2.0/(dx[I+idx]+dx[I+idx-1])
)
)
)*0.5*(dx[I+idx]+dx[I+idx-1]);
}
/**
* \brief Calculate drag using a control-volume approach (unsteady).
*
* Evaluate the unsteady contribution of the control volume.
*
* \param FxU raw pointer to the vector storing the unsteady drag components
* \param q raw pointer to the vector storing all the fluxes
* \param qOld raw pointer to the vector sotring all the fluxes at the previous time-step
* \param dx raw pointer to the vector storing the cell widths in the x-direction
* \param dy raw pointer to the vector storing the cell widths in the y-direction
* \param dt time increment
* \param nx number of cells in the x-direction
* \param ny number of cells in the y-direcyion
* \param I x-index of the bottom-left cell of the control surface
* \param J y-index of the top-right cell of the control surface
* \param ncx number of cells in the x-direction in the control volume
* \param nyc number of cells in the y-direction in the control volume
*/
__global__
void dragUnsteady(double *FxU, double *u, double *uold, int *tagsIn, double *dx, double *dy, double dt,
int nx, int ny, int I, int J, int ncx, int ncy)
{
int idx = threadIdx.x + blockIdx.x*blockDim.x;
if(idx >= (ncx+1)*ncy)
return;
int i = idx%(ncx+1),
j = idx/(ncx+1);
int Iu = (J+j)*(nx-1) + (I-1+i);
FxU[idx] = - (tagsIn[Iu] == -1) * ((u[Iu]*dy[J+j] - uold[Iu]*dy[J+j])/dt * 0.5*(dx[I+i]+dx[I-1+i]));
}
/**
* \brief Calculate lift using a control-volume approach (left-right).
*
* Evaluate the contribution from the left and right parts of the control surface.
*
* \param FyX raw pointer to the vector storing the lift components in the x-direction
* \param q raw pointer to the vector storing all the fluxes
* \param nu viscosity
* \param dx raw pointer to the vector storing the cell widths in the x-direction
* \param dy raw pointer to the vector storing the cell widths in the y-direction
* \param nx number of cells in the x-direction
* \param ny number of cells in the y-direcyion
* \param I x-index of the bottom-left cell of the control surface
* \param J y-index of the top-right cell of the control surface
* \param ncx number of cells in the x-direction in the control volume
* \param nyc number of cells in the y-direction in the control volume
*/
__global__
void liftLeftRight(double *FyX, double *u, double nu, double *dx, double *dy,
int nx, int ny, int I, int J, int ncx, int ncy)
{
int idx = threadIdx.x + blockIdx.x*blockDim.x;
if(idx > ncy)
return;
int Iu = (J+idx)*(nx-1) + (I-1),
Iv = (nx-1)*ny + (J-1+idx)*nx + I;
FyX[idx] = -(
// multiply by dS
(
0.25 * ( u[Iu+ncx] + u[Iu+ncx-(nx-1)] )
* ( u[Iv+ncx] + u[Iv+ncx-1] )
-
0.25 * ( u[Iu] + u[Iu-(nx-1)] )
* ( u[Iv] + u[Iv-1] )
)
-
// multiply by dS (cannot use the leftRight trick in this case)
nu*
(
(
(u[Iu+ncx] - u[Iu+ncx-(nx-1)])/2.0/(dy[J+idx]+dy[J-1+idx]) +
(u[Iv+ncx] - u[Iv+ncx-1])/2.0/(dx[I+ncx]+dx[I+ncx-1])
)
-
(
(u[Iu] - u[Iu-(nx-1)])/2.0/(dy[J+idx]+dy[J-1+idx]) +
(u[Iv] - u[Iv-1])/2.0/(dx[I]+dx[I-1])
)
)
)*0.5*(dy[J+idx]+dy[J-1+idx]);
}
/**
* \brief Calculate lift using a control-volume approach (bottom-top).
*
* Evaluate the contribution from the bottom and top parts of the control surface.
*
* \param FyY raw pointer to the vector storing the lift components in the y-direction
* \param q raw pointer to the vector storing all the fluxes
* \param lambda raw pointer to the vector storing the pressure and Lagrangian forces
* \param nu viscosity
* \param dx raw pointer to the vector storing the cell widths in the x-direction
* \param dy raw pointer to the vector storing the cell widths in the y-direction
* \param nx number of cells in the x-direction
* \param ny number of cells in the y-direcyion
* \param I x-index of the bottom-left cell of the control surface
* \param J y-index of the top-right cell of the control surface
* \param ncx number of cells in the x-direction in the control volume
* \param nyc number of cells in the y-direction in the control volume
*/
__global__
void liftBottomTop(double *FyY, double *u, double *p, double nu, double *dx, double *dy,
int nx, int ny, int I, int J, int ncx, int ncy)
{
int idx = threadIdx.x + blockIdx.x*blockDim.x;
if(idx >= ncx)
return;
int Ip = J*nx + I+idx,
Iv = (nx-1)*ny + (J-1)*nx + I+idx;
FyY[idx] = -(
// multiply the pressure with the surface area to get p dx
(p[Ip+ncy*nx]-p[Ip-nx])*dx[I+idx]
+
// divide q^2 by dx, so that just v^2 dx is obtained
(
0.25*(u[Iv+(ncy+1)*nx] + u[Iv+ncy*nx])*(u[Iv+(ncy+1)*nx] + u[Iv+ncy*nx])
- 0.25*(u[Iv] + u[Iv-nx])*(u[Iv] + u[Iv-nx])
)*dx[I+idx]
-
// no multiplication or division since dv/dy dx = dq/dy
nu*
(
(u[Iv+(ncy+1)*nx] - u[Iv+ncy*nx])*dx[I+idx]/dy[J+ncy]
- (u[Iv] - u[Iv-nx])*dx[I]/dy[J-1]
)
);
}
/**
* \brief Calculate lift using a control-volume approach (unsteady).
*
* Evaluate the unsteady contribution of the control volume.
*
* \param FyU raw pointer to the vector storing the unsteady lift components
* \param q raw pointer to the vector storing all the fluxes
* \param qOld raw pointer to the vector sotring all the fluxes at the previous time-step
* \param dx raw pointer to the vector storing the cell widths in the x-direction
* \param dy raw pointer to the vector storing the cell widths in the y-direction
* \param dt time increment
* \param nx number of cells in the x-direction
* \param ny number of cells in the y-direcyion
* \param I x-index of the bottom-left cell of the control surface
* \param J y-index of the top-right cell of the control surface
* \param ncx number of cells in the x-direction in the control volume
* \param nyc number of cells in the y-direction in the control volume
*/
__global__
void liftUnsteady(double *FyU, double *u, double *uold, int *tagsIn, double *dx, double *dy, double dt,
int nx, int ny, int I, int J, int ncx, int ncy)
{
int idx = threadIdx.x + blockIdx.x*blockDim.x;
if( idx >= ncx*(ncy+1) )
return;
int i = idx%ncx,
j = idx/ncx;
int Iv = (J-1+j)*nx + (I+i) + (nx-1)*ny;
FyU[idx] = -(tagsIn[Iv] == -1) * ((u[Iv]*dx[I+i] - uold[Iv]*dx[I+i])/dt * 0.5*(dy[J+j]+dy[J-1+j]));
}
/**
* \brief To be documented
*/
} |
You are a helpful coding assistant specialized in converting HIP source code to AMD host assembly. | /***************************************************************************//**
* \file calculateForce.cu
* \author Anush Krishnan (anush@bu.edu),
* \author Christopher Minar (minarc@oregonstate.edu)
* \based of original cuIBM
*/
#include <hip/hip_runtime.h>
#include "calculateForce.h"
namespace kernels
{
/**
* \brief Calculates drag using a control-volume approach (left-right).
*
* Evaluate the contribution from the left and right parts of the control surface.
*
* \param FxX raw pointer to the vector storing the drag in the x-direction
* \param lambda raw pointer to the vector storing all the pressure and Lagrangian forces
* \param q raw pointer to the vector storing all the fluxes
* \param nu viscosity
* \param dx raw pointer to the vector storing the cell widths in the x-direction
* \param dy raw pointer to the vector storing the cell widths in the y-direction
* \param nx number of cells in the x-direction
* \param ny number of cells in the y-direction
* \param I x-index of the bottom-left corner cell of the control surface
* \param J y-index of the top-right corner cell of the control surface
* \param ncx number of cells in the x-direction in the control volume
* \param ncy number of cells in the y-direction in the control volume
*/
__global__
void dragLeftRight(double *FxX, double *u, double *p, double nu, double *dx, double *dy,
int nx, int ny, int I, int J, int ncx, int ncy)
{
int idx = threadIdx.x + blockIdx.x*blockDim.x;
if(idx >= ncy)
return;
int Ip = (J+idx)*nx + I,
Iu = (J+idx)*(nx-1) + I;
FxX[idx] = -(
// multiply the pressure with the surface area to get p dy
//(p[e]-p[w])*dy
(
p[Ip+ncx] - p[Ip]
)*dy[J+idx]
+
// ur^2 - ul^2 * dy
(
(u[Iu+ncx]+u[Iu+ncx-1])*(u[Iu+ncx]+u[Iu+ncx-1])/4
- (u[Iu-1]+u[Iu])*(u[Iu-1]+u[Iu])/4
)*dy[J+idx]
-
// du/dx * dy
// approximate using dudx of the inside cell of the cv instead of the lr average
nu*
(
(u[Iu+ncx] - u[Iu+ncx-1])/dx[I+ncx]
- (u[Iu] - u[Iu-1])/dx[I]
)*dy[J+idx]
);
}
/**
* \brief Calculate drag using a control-volume approach (bottom-top).
*
* Evaluate the contribution from the bottom and top parts of the control surface.
*
* \param FxY raw pointer to the vector storing the drag in the y-direction
* \param q raw pointer to the vector storing all the fluxes
* \param nu viscosity
* \param dx raw pointer to the vector storing the cell widths in the x-direction
* \param dy raw pointer to the vector storing the cell widths in the y-direction
* \param nx number of cells in the x-direction
* \param ny number of cells in the y-direction
* \param I x-index of the bottom-left corner cell of the control surface
* \param J y-index of the top-right corner cell of the control surface
* \param ncx number of cells in the x-direction in the control volume
* \param ncy number of cells in the y-direction in the control volume
*/
__global__
void dragBottomTop(double *FxY, double *u, double nu, double *dx, double *dy,
int nx, int ny, int I, int J, int ncx, int ncy)
{
int idx = threadIdx.x + blockIdx.x*blockDim.x;
if(idx > ncx)
return;
int Iu = J*(nx-1) + (I-1+idx),
Iv = (nx-1)*ny + (J-1)*nx + I+idx;
FxY[idx] = -(
// multiply by dS
(
0.25 * ( u[Iu+ncy*(nx-1)] + u[Iu+(ncy-1)*(nx-1)] )
* ( u[Iv+ncy*nx] + u[Iv+ncy*nx-1] )
-
0.25 * ( u[Iu] + u[Iu-(nx-1)] )
* ( u[Iv] + u[Iv-1] )
)
-
// multiply by dS (cannot use the leftRight trick in this case)
nu*
(
(
(u[Iu+ncy*(nx-1)] - u[Iu+(ncy-1)*(nx-1)])/2.0/(dy[J+ncy]+dy[J+ncy-1]) +
(u[Iv+ncy*nx] - u[Iv+ncy*nx-1]) /2.0/(dx[I+idx]+dx[I+idx-1])
)
-
(
(u[Iu] - u[Iu-(nx-1)])/2.0/(dy[J]+dy[J-1]) +
(u[Iv] - u[Iv-1]) /2.0/(dx[I+idx]+dx[I+idx-1])
)
)
)*0.5*(dx[I+idx]+dx[I+idx-1]);
}
/**
* \brief Calculate drag using a control-volume approach (unsteady).
*
* Evaluate the unsteady contribution of the control volume.
*
* \param FxU raw pointer to the vector storing the unsteady drag components
* \param q raw pointer to the vector storing all the fluxes
* \param qOld raw pointer to the vector sotring all the fluxes at the previous time-step
* \param dx raw pointer to the vector storing the cell widths in the x-direction
* \param dy raw pointer to the vector storing the cell widths in the y-direction
* \param dt time increment
* \param nx number of cells in the x-direction
* \param ny number of cells in the y-direcyion
* \param I x-index of the bottom-left cell of the control surface
* \param J y-index of the top-right cell of the control surface
* \param ncx number of cells in the x-direction in the control volume
* \param nyc number of cells in the y-direction in the control volume
*/
__global__
void dragUnsteady(double *FxU, double *u, double *uold, int *tagsIn, double *dx, double *dy, double dt,
int nx, int ny, int I, int J, int ncx, int ncy)
{
int idx = threadIdx.x + blockIdx.x*blockDim.x;
if(idx >= (ncx+1)*ncy)
return;
int i = idx%(ncx+1),
j = idx/(ncx+1);
int Iu = (J+j)*(nx-1) + (I-1+i);
FxU[idx] = - (tagsIn[Iu] == -1) * ((u[Iu]*dy[J+j] - uold[Iu]*dy[J+j])/dt * 0.5*(dx[I+i]+dx[I-1+i]));
}
/**
* \brief Calculate lift using a control-volume approach (left-right).
*
* Evaluate the contribution from the left and right parts of the control surface.
*
* \param FyX raw pointer to the vector storing the lift components in the x-direction
* \param q raw pointer to the vector storing all the fluxes
* \param nu viscosity
* \param dx raw pointer to the vector storing the cell widths in the x-direction
* \param dy raw pointer to the vector storing the cell widths in the y-direction
* \param nx number of cells in the x-direction
* \param ny number of cells in the y-direcyion
* \param I x-index of the bottom-left cell of the control surface
* \param J y-index of the top-right cell of the control surface
* \param ncx number of cells in the x-direction in the control volume
* \param nyc number of cells in the y-direction in the control volume
*/
__global__
void liftLeftRight(double *FyX, double *u, double nu, double *dx, double *dy,
int nx, int ny, int I, int J, int ncx, int ncy)
{
int idx = threadIdx.x + blockIdx.x*blockDim.x;
if(idx > ncy)
return;
int Iu = (J+idx)*(nx-1) + (I-1),
Iv = (nx-1)*ny + (J-1+idx)*nx + I;
FyX[idx] = -(
// multiply by dS
(
0.25 * ( u[Iu+ncx] + u[Iu+ncx-(nx-1)] )
* ( u[Iv+ncx] + u[Iv+ncx-1] )
-
0.25 * ( u[Iu] + u[Iu-(nx-1)] )
* ( u[Iv] + u[Iv-1] )
)
-
// multiply by dS (cannot use the leftRight trick in this case)
nu*
(
(
(u[Iu+ncx] - u[Iu+ncx-(nx-1)])/2.0/(dy[J+idx]+dy[J-1+idx]) +
(u[Iv+ncx] - u[Iv+ncx-1])/2.0/(dx[I+ncx]+dx[I+ncx-1])
)
-
(
(u[Iu] - u[Iu-(nx-1)])/2.0/(dy[J+idx]+dy[J-1+idx]) +
(u[Iv] - u[Iv-1])/2.0/(dx[I]+dx[I-1])
)
)
)*0.5*(dy[J+idx]+dy[J-1+idx]);
}
/**
* \brief Calculate lift using a control-volume approach (bottom-top).
*
* Evaluate the contribution from the bottom and top parts of the control surface.
*
* \param FyY raw pointer to the vector storing the lift components in the y-direction
* \param q raw pointer to the vector storing all the fluxes
* \param lambda raw pointer to the vector storing the pressure and Lagrangian forces
* \param nu viscosity
* \param dx raw pointer to the vector storing the cell widths in the x-direction
* \param dy raw pointer to the vector storing the cell widths in the y-direction
* \param nx number of cells in the x-direction
* \param ny number of cells in the y-direcyion
* \param I x-index of the bottom-left cell of the control surface
* \param J y-index of the top-right cell of the control surface
* \param ncx number of cells in the x-direction in the control volume
* \param nyc number of cells in the y-direction in the control volume
*/
__global__
void liftBottomTop(double *FyY, double *u, double *p, double nu, double *dx, double *dy,
int nx, int ny, int I, int J, int ncx, int ncy)
{
int idx = threadIdx.x + blockIdx.x*blockDim.x;
if(idx >= ncx)
return;
int Ip = J*nx + I+idx,
Iv = (nx-1)*ny + (J-1)*nx + I+idx;
FyY[idx] = -(
// multiply the pressure with the surface area to get p dx
(p[Ip+ncy*nx]-p[Ip-nx])*dx[I+idx]
+
// divide q^2 by dx, so that just v^2 dx is obtained
(
0.25*(u[Iv+(ncy+1)*nx] + u[Iv+ncy*nx])*(u[Iv+(ncy+1)*nx] + u[Iv+ncy*nx])
- 0.25*(u[Iv] + u[Iv-nx])*(u[Iv] + u[Iv-nx])
)*dx[I+idx]
-
// no multiplication or division since dv/dy dx = dq/dy
nu*
(
(u[Iv+(ncy+1)*nx] - u[Iv+ncy*nx])*dx[I+idx]/dy[J+ncy]
- (u[Iv] - u[Iv-nx])*dx[I]/dy[J-1]
)
);
}
/**
* \brief Calculate lift using a control-volume approach (unsteady).
*
* Evaluate the unsteady contribution of the control volume.
*
* \param FyU raw pointer to the vector storing the unsteady lift components
* \param q raw pointer to the vector storing all the fluxes
* \param qOld raw pointer to the vector sotring all the fluxes at the previous time-step
* \param dx raw pointer to the vector storing the cell widths in the x-direction
* \param dy raw pointer to the vector storing the cell widths in the y-direction
* \param dt time increment
* \param nx number of cells in the x-direction
* \param ny number of cells in the y-direcyion
* \param I x-index of the bottom-left cell of the control surface
* \param J y-index of the top-right cell of the control surface
* \param ncx number of cells in the x-direction in the control volume
* \param nyc number of cells in the y-direction in the control volume
*/
__global__
void liftUnsteady(double *FyU, double *u, double *uold, int *tagsIn, double *dx, double *dy, double dt,
int nx, int ny, int I, int J, int ncx, int ncy)
{
int idx = threadIdx.x + blockIdx.x*blockDim.x;
if( idx >= ncx*(ncy+1) )
return;
int i = idx%ncx,
j = idx/ncx;
int Iv = (J-1+j)*nx + (I+i) + (nx-1)*ny;
FyU[idx] = -(tagsIn[Iv] == -1) * ((u[Iv]*dx[I+i] - uold[Iv]*dx[I+i])/dt * 0.5*(dy[J+j]+dy[J-1+j]));
}
/**
* \brief To be documented
*/
} | .text
.file "calculateForce.hip"
.globl _ZN7kernels28__device_stub__dragLeftRightEPdS0_S0_dS0_S0_iiiiii # -- Begin function _ZN7kernels28__device_stub__dragLeftRightEPdS0_S0_dS0_S0_iiiiii
.p2align 4, 0x90
.type _ZN7kernels28__device_stub__dragLeftRightEPdS0_S0_dS0_S0_iiiiii,@function
_ZN7kernels28__device_stub__dragLeftRightEPdS0_S0_dS0_S0_iiiiii: # @_ZN7kernels28__device_stub__dragLeftRightEPdS0_S0_dS0_S0_iiiiii
.cfi_startproc
# %bb.0:
subq $216, %rsp
.cfi_def_cfa_offset 224
movq %rdi, 104(%rsp)
movq %rsi, 96(%rsp)
movq %rdx, 88(%rsp)
movsd %xmm0, 80(%rsp)
movq %rcx, 72(%rsp)
movq %r8, 64(%rsp)
movl %r9d, 12(%rsp)
leaq 104(%rsp), %rax
movq %rax, 112(%rsp)
leaq 96(%rsp), %rax
movq %rax, 120(%rsp)
leaq 88(%rsp), %rax
movq %rax, 128(%rsp)
leaq 80(%rsp), %rax
movq %rax, 136(%rsp)
leaq 72(%rsp), %rax
movq %rax, 144(%rsp)
leaq 64(%rsp), %rax
movq %rax, 152(%rsp)
leaq 12(%rsp), %rax
movq %rax, 160(%rsp)
leaq 224(%rsp), %rax
movq %rax, 168(%rsp)
leaq 232(%rsp), %rax
movq %rax, 176(%rsp)
leaq 240(%rsp), %rax
movq %rax, 184(%rsp)
leaq 248(%rsp), %rax
movq %rax, 192(%rsp)
leaq 256(%rsp), %rax
movq %rax, 200(%rsp)
leaq 48(%rsp), %rdi
leaq 32(%rsp), %rsi
leaq 24(%rsp), %rdx
leaq 16(%rsp), %rcx
callq __hipPopCallConfiguration
movq 48(%rsp), %rsi
movl 56(%rsp), %edx
movq 32(%rsp), %rcx
movl 40(%rsp), %r8d
leaq 112(%rsp), %r9
movl $_ZN7kernels13dragLeftRightEPdS0_S0_dS0_S0_iiiiii, %edi
pushq 16(%rsp)
.cfi_adjust_cfa_offset 8
pushq 32(%rsp)
.cfi_adjust_cfa_offset 8
callq hipLaunchKernel
addq $232, %rsp
.cfi_adjust_cfa_offset -232
retq
.Lfunc_end0:
.size _ZN7kernels28__device_stub__dragLeftRightEPdS0_S0_dS0_S0_iiiiii, .Lfunc_end0-_ZN7kernels28__device_stub__dragLeftRightEPdS0_S0_dS0_S0_iiiiii
.cfi_endproc
# -- End function
.globl _ZN7kernels28__device_stub__dragBottomTopEPdS0_dS0_S0_iiiiii # -- Begin function _ZN7kernels28__device_stub__dragBottomTopEPdS0_dS0_S0_iiiiii
.p2align 4, 0x90
.type _ZN7kernels28__device_stub__dragBottomTopEPdS0_dS0_S0_iiiiii,@function
_ZN7kernels28__device_stub__dragBottomTopEPdS0_dS0_S0_iiiiii: # @_ZN7kernels28__device_stub__dragBottomTopEPdS0_dS0_S0_iiiiii
.cfi_startproc
# %bb.0:
subq $184, %rsp
.cfi_def_cfa_offset 192
movq %rdi, 88(%rsp)
movq %rsi, 80(%rsp)
movsd %xmm0, 72(%rsp)
movq %rdx, 64(%rsp)
movq %rcx, 56(%rsp)
movl %r8d, 4(%rsp)
movl %r9d, (%rsp)
leaq 88(%rsp), %rax
movq %rax, 96(%rsp)
leaq 80(%rsp), %rax
movq %rax, 104(%rsp)
leaq 72(%rsp), %rax
movq %rax, 112(%rsp)
leaq 64(%rsp), %rax
movq %rax, 120(%rsp)
leaq 56(%rsp), %rax
movq %rax, 128(%rsp)
leaq 4(%rsp), %rax
movq %rax, 136(%rsp)
movq %rsp, %rax
movq %rax, 144(%rsp)
leaq 192(%rsp), %rax
movq %rax, 152(%rsp)
leaq 200(%rsp), %rax
movq %rax, 160(%rsp)
leaq 208(%rsp), %rax
movq %rax, 168(%rsp)
leaq 216(%rsp), %rax
movq %rax, 176(%rsp)
leaq 40(%rsp), %rdi
leaq 24(%rsp), %rsi
leaq 16(%rsp), %rdx
leaq 8(%rsp), %rcx
callq __hipPopCallConfiguration
movq 40(%rsp), %rsi
movl 48(%rsp), %edx
movq 24(%rsp), %rcx
movl 32(%rsp), %r8d
leaq 96(%rsp), %r9
movl $_ZN7kernels13dragBottomTopEPdS0_dS0_S0_iiiiii, %edi
pushq 8(%rsp)
.cfi_adjust_cfa_offset 8
pushq 24(%rsp)
.cfi_adjust_cfa_offset 8
callq hipLaunchKernel
addq $200, %rsp
.cfi_adjust_cfa_offset -200
retq
.Lfunc_end1:
.size _ZN7kernels28__device_stub__dragBottomTopEPdS0_dS0_S0_iiiiii, .Lfunc_end1-_ZN7kernels28__device_stub__dragBottomTopEPdS0_dS0_S0_iiiiii
.cfi_endproc
# -- End function
.globl _ZN7kernels27__device_stub__dragUnsteadyEPdS0_S0_PiS0_S0_diiiiii # -- Begin function _ZN7kernels27__device_stub__dragUnsteadyEPdS0_S0_PiS0_S0_diiiiii
.p2align 4, 0x90
.type _ZN7kernels27__device_stub__dragUnsteadyEPdS0_S0_PiS0_S0_diiiiii,@function
_ZN7kernels27__device_stub__dragUnsteadyEPdS0_S0_PiS0_S0_diiiiii: # @_ZN7kernels27__device_stub__dragUnsteadyEPdS0_S0_PiS0_S0_diiiiii
.cfi_startproc
# %bb.0:
subq $216, %rsp
.cfi_def_cfa_offset 224
movq %rdi, 104(%rsp)
movq %rsi, 96(%rsp)
movq %rdx, 88(%rsp)
movq %rcx, 80(%rsp)
movq %r8, 72(%rsp)
movq %r9, 64(%rsp)
movsd %xmm0, 56(%rsp)
leaq 104(%rsp), %rax
movq %rax, 112(%rsp)
leaq 96(%rsp), %rax
movq %rax, 120(%rsp)
leaq 88(%rsp), %rax
movq %rax, 128(%rsp)
leaq 80(%rsp), %rax
movq %rax, 136(%rsp)
leaq 72(%rsp), %rax
movq %rax, 144(%rsp)
leaq 64(%rsp), %rax
movq %rax, 152(%rsp)
leaq 56(%rsp), %rax
movq %rax, 160(%rsp)
leaq 224(%rsp), %rax
movq %rax, 168(%rsp)
leaq 232(%rsp), %rax
movq %rax, 176(%rsp)
leaq 240(%rsp), %rax
movq %rax, 184(%rsp)
leaq 248(%rsp), %rax
movq %rax, 192(%rsp)
leaq 256(%rsp), %rax
movq %rax, 200(%rsp)
leaq 264(%rsp), %rax
movq %rax, 208(%rsp)
leaq 40(%rsp), %rdi
leaq 24(%rsp), %rsi
leaq 16(%rsp), %rdx
leaq 8(%rsp), %rcx
callq __hipPopCallConfiguration
movq 40(%rsp), %rsi
movl 48(%rsp), %edx
movq 24(%rsp), %rcx
movl 32(%rsp), %r8d
leaq 112(%rsp), %r9
movl $_ZN7kernels12dragUnsteadyEPdS0_S0_PiS0_S0_diiiiii, %edi
pushq 8(%rsp)
.cfi_adjust_cfa_offset 8
pushq 24(%rsp)
.cfi_adjust_cfa_offset 8
callq hipLaunchKernel
addq $232, %rsp
.cfi_adjust_cfa_offset -232
retq
.Lfunc_end2:
.size _ZN7kernels27__device_stub__dragUnsteadyEPdS0_S0_PiS0_S0_diiiiii, .Lfunc_end2-_ZN7kernels27__device_stub__dragUnsteadyEPdS0_S0_PiS0_S0_diiiiii
.cfi_endproc
# -- End function
.globl _ZN7kernels28__device_stub__liftLeftRightEPdS0_dS0_S0_iiiiii # -- Begin function _ZN7kernels28__device_stub__liftLeftRightEPdS0_dS0_S0_iiiiii
.p2align 4, 0x90
.type _ZN7kernels28__device_stub__liftLeftRightEPdS0_dS0_S0_iiiiii,@function
_ZN7kernels28__device_stub__liftLeftRightEPdS0_dS0_S0_iiiiii: # @_ZN7kernels28__device_stub__liftLeftRightEPdS0_dS0_S0_iiiiii
.cfi_startproc
# %bb.0:
subq $184, %rsp
.cfi_def_cfa_offset 192
movq %rdi, 88(%rsp)
movq %rsi, 80(%rsp)
movsd %xmm0, 72(%rsp)
movq %rdx, 64(%rsp)
movq %rcx, 56(%rsp)
movl %r8d, 4(%rsp)
movl %r9d, (%rsp)
leaq 88(%rsp), %rax
movq %rax, 96(%rsp)
leaq 80(%rsp), %rax
movq %rax, 104(%rsp)
leaq 72(%rsp), %rax
movq %rax, 112(%rsp)
leaq 64(%rsp), %rax
movq %rax, 120(%rsp)
leaq 56(%rsp), %rax
movq %rax, 128(%rsp)
leaq 4(%rsp), %rax
movq %rax, 136(%rsp)
movq %rsp, %rax
movq %rax, 144(%rsp)
leaq 192(%rsp), %rax
movq %rax, 152(%rsp)
leaq 200(%rsp), %rax
movq %rax, 160(%rsp)
leaq 208(%rsp), %rax
movq %rax, 168(%rsp)
leaq 216(%rsp), %rax
movq %rax, 176(%rsp)
leaq 40(%rsp), %rdi
leaq 24(%rsp), %rsi
leaq 16(%rsp), %rdx
leaq 8(%rsp), %rcx
callq __hipPopCallConfiguration
movq 40(%rsp), %rsi
movl 48(%rsp), %edx
movq 24(%rsp), %rcx
movl 32(%rsp), %r8d
leaq 96(%rsp), %r9
movl $_ZN7kernels13liftLeftRightEPdS0_dS0_S0_iiiiii, %edi
pushq 8(%rsp)
.cfi_adjust_cfa_offset 8
pushq 24(%rsp)
.cfi_adjust_cfa_offset 8
callq hipLaunchKernel
addq $200, %rsp
.cfi_adjust_cfa_offset -200
retq
.Lfunc_end3:
.size _ZN7kernels28__device_stub__liftLeftRightEPdS0_dS0_S0_iiiiii, .Lfunc_end3-_ZN7kernels28__device_stub__liftLeftRightEPdS0_dS0_S0_iiiiii
.cfi_endproc
# -- End function
.globl _ZN7kernels28__device_stub__liftBottomTopEPdS0_S0_dS0_S0_iiiiii # -- Begin function _ZN7kernels28__device_stub__liftBottomTopEPdS0_S0_dS0_S0_iiiiii
.p2align 4, 0x90
.type _ZN7kernels28__device_stub__liftBottomTopEPdS0_S0_dS0_S0_iiiiii,@function
_ZN7kernels28__device_stub__liftBottomTopEPdS0_S0_dS0_S0_iiiiii: # @_ZN7kernels28__device_stub__liftBottomTopEPdS0_S0_dS0_S0_iiiiii
.cfi_startproc
# %bb.0:
subq $216, %rsp
.cfi_def_cfa_offset 224
movq %rdi, 104(%rsp)
movq %rsi, 96(%rsp)
movq %rdx, 88(%rsp)
movsd %xmm0, 80(%rsp)
movq %rcx, 72(%rsp)
movq %r8, 64(%rsp)
movl %r9d, 12(%rsp)
leaq 104(%rsp), %rax
movq %rax, 112(%rsp)
leaq 96(%rsp), %rax
movq %rax, 120(%rsp)
leaq 88(%rsp), %rax
movq %rax, 128(%rsp)
leaq 80(%rsp), %rax
movq %rax, 136(%rsp)
leaq 72(%rsp), %rax
movq %rax, 144(%rsp)
leaq 64(%rsp), %rax
movq %rax, 152(%rsp)
leaq 12(%rsp), %rax
movq %rax, 160(%rsp)
leaq 224(%rsp), %rax
movq %rax, 168(%rsp)
leaq 232(%rsp), %rax
movq %rax, 176(%rsp)
leaq 240(%rsp), %rax
movq %rax, 184(%rsp)
leaq 248(%rsp), %rax
movq %rax, 192(%rsp)
leaq 256(%rsp), %rax
movq %rax, 200(%rsp)
leaq 48(%rsp), %rdi
leaq 32(%rsp), %rsi
leaq 24(%rsp), %rdx
leaq 16(%rsp), %rcx
callq __hipPopCallConfiguration
movq 48(%rsp), %rsi
movl 56(%rsp), %edx
movq 32(%rsp), %rcx
movl 40(%rsp), %r8d
leaq 112(%rsp), %r9
movl $_ZN7kernels13liftBottomTopEPdS0_S0_dS0_S0_iiiiii, %edi
pushq 16(%rsp)
.cfi_adjust_cfa_offset 8
pushq 32(%rsp)
.cfi_adjust_cfa_offset 8
callq hipLaunchKernel
addq $232, %rsp
.cfi_adjust_cfa_offset -232
retq
.Lfunc_end4:
.size _ZN7kernels28__device_stub__liftBottomTopEPdS0_S0_dS0_S0_iiiiii, .Lfunc_end4-_ZN7kernels28__device_stub__liftBottomTopEPdS0_S0_dS0_S0_iiiiii
.cfi_endproc
# -- End function
.globl _ZN7kernels27__device_stub__liftUnsteadyEPdS0_S0_PiS0_S0_diiiiii # -- Begin function _ZN7kernels27__device_stub__liftUnsteadyEPdS0_S0_PiS0_S0_diiiiii
.p2align 4, 0x90
.type _ZN7kernels27__device_stub__liftUnsteadyEPdS0_S0_PiS0_S0_diiiiii,@function
_ZN7kernels27__device_stub__liftUnsteadyEPdS0_S0_PiS0_S0_diiiiii: # @_ZN7kernels27__device_stub__liftUnsteadyEPdS0_S0_PiS0_S0_diiiiii
.cfi_startproc
# %bb.0:
subq $216, %rsp
.cfi_def_cfa_offset 224
movq %rdi, 104(%rsp)
movq %rsi, 96(%rsp)
movq %rdx, 88(%rsp)
movq %rcx, 80(%rsp)
movq %r8, 72(%rsp)
movq %r9, 64(%rsp)
movsd %xmm0, 56(%rsp)
leaq 104(%rsp), %rax
movq %rax, 112(%rsp)
leaq 96(%rsp), %rax
movq %rax, 120(%rsp)
leaq 88(%rsp), %rax
movq %rax, 128(%rsp)
leaq 80(%rsp), %rax
movq %rax, 136(%rsp)
leaq 72(%rsp), %rax
movq %rax, 144(%rsp)
leaq 64(%rsp), %rax
movq %rax, 152(%rsp)
leaq 56(%rsp), %rax
movq %rax, 160(%rsp)
leaq 224(%rsp), %rax
movq %rax, 168(%rsp)
leaq 232(%rsp), %rax
movq %rax, 176(%rsp)
leaq 240(%rsp), %rax
movq %rax, 184(%rsp)
leaq 248(%rsp), %rax
movq %rax, 192(%rsp)
leaq 256(%rsp), %rax
movq %rax, 200(%rsp)
leaq 264(%rsp), %rax
movq %rax, 208(%rsp)
leaq 40(%rsp), %rdi
leaq 24(%rsp), %rsi
leaq 16(%rsp), %rdx
leaq 8(%rsp), %rcx
callq __hipPopCallConfiguration
movq 40(%rsp), %rsi
movl 48(%rsp), %edx
movq 24(%rsp), %rcx
movl 32(%rsp), %r8d
leaq 112(%rsp), %r9
movl $_ZN7kernels12liftUnsteadyEPdS0_S0_PiS0_S0_diiiiii, %edi
pushq 8(%rsp)
.cfi_adjust_cfa_offset 8
pushq 24(%rsp)
.cfi_adjust_cfa_offset 8
callq hipLaunchKernel
addq $232, %rsp
.cfi_adjust_cfa_offset -232
retq
.Lfunc_end5:
.size _ZN7kernels27__device_stub__liftUnsteadyEPdS0_S0_PiS0_S0_diiiiii, .Lfunc_end5-_ZN7kernels27__device_stub__liftUnsteadyEPdS0_S0_PiS0_S0_diiiiii
.cfi_endproc
# -- End function
.p2align 4, 0x90 # -- Begin function __hip_module_ctor
.type __hip_module_ctor,@function
__hip_module_ctor: # @__hip_module_ctor
.cfi_startproc
# %bb.0:
pushq %rbx
.cfi_def_cfa_offset 16
subq $32, %rsp
.cfi_def_cfa_offset 48
.cfi_offset %rbx, -16
cmpq $0, __hip_gpubin_handle(%rip)
jne .LBB6_2
# %bb.1:
movl $__hip_fatbin_wrapper, %edi
callq __hipRegisterFatBinary
movq %rax, __hip_gpubin_handle(%rip)
.LBB6_2:
movq __hip_gpubin_handle(%rip), %rbx
xorps %xmm0, %xmm0
movups %xmm0, 16(%rsp)
movups %xmm0, (%rsp)
movl $_ZN7kernels13dragLeftRightEPdS0_S0_dS0_S0_iiiiii, %esi
movl $.L__unnamed_1, %edx
movl $.L__unnamed_1, %ecx
movq %rbx, %rdi
movl $-1, %r8d
xorl %r9d, %r9d
callq __hipRegisterFunction
xorps %xmm0, %xmm0
movups %xmm0, 16(%rsp)
movups %xmm0, (%rsp)
movl $_ZN7kernels13dragBottomTopEPdS0_dS0_S0_iiiiii, %esi
movl $.L__unnamed_2, %edx
movl $.L__unnamed_2, %ecx
movq %rbx, %rdi
movl $-1, %r8d
xorl %r9d, %r9d
callq __hipRegisterFunction
xorps %xmm0, %xmm0
movups %xmm0, 16(%rsp)
movups %xmm0, (%rsp)
movl $_ZN7kernels12dragUnsteadyEPdS0_S0_PiS0_S0_diiiiii, %esi
movl $.L__unnamed_3, %edx
movl $.L__unnamed_3, %ecx
movq %rbx, %rdi
movl $-1, %r8d
xorl %r9d, %r9d
callq __hipRegisterFunction
xorps %xmm0, %xmm0
movups %xmm0, 16(%rsp)
movups %xmm0, (%rsp)
movl $_ZN7kernels13liftLeftRightEPdS0_dS0_S0_iiiiii, %esi
movl $.L__unnamed_4, %edx
movl $.L__unnamed_4, %ecx
movq %rbx, %rdi
movl $-1, %r8d
xorl %r9d, %r9d
callq __hipRegisterFunction
xorps %xmm0, %xmm0
movups %xmm0, 16(%rsp)
movups %xmm0, (%rsp)
movl $_ZN7kernels13liftBottomTopEPdS0_S0_dS0_S0_iiiiii, %esi
movl $.L__unnamed_5, %edx
movl $.L__unnamed_5, %ecx
movq %rbx, %rdi
movl $-1, %r8d
xorl %r9d, %r9d
callq __hipRegisterFunction
xorps %xmm0, %xmm0
movups %xmm0, 16(%rsp)
movups %xmm0, (%rsp)
movl $_ZN7kernels12liftUnsteadyEPdS0_S0_PiS0_S0_diiiiii, %esi
movl $.L__unnamed_6, %edx
movl $.L__unnamed_6, %ecx
movq %rbx, %rdi
movl $-1, %r8d
xorl %r9d, %r9d
callq __hipRegisterFunction
movl $__hip_module_dtor, %edi
addq $32, %rsp
.cfi_def_cfa_offset 16
popq %rbx
.cfi_def_cfa_offset 8
jmp atexit # TAILCALL
.Lfunc_end6:
.size __hip_module_ctor, .Lfunc_end6-__hip_module_ctor
.cfi_endproc
# -- End function
.p2align 4, 0x90 # -- Begin function __hip_module_dtor
.type __hip_module_dtor,@function
__hip_module_dtor: # @__hip_module_dtor
.cfi_startproc
# %bb.0:
movq __hip_gpubin_handle(%rip), %rdi
testq %rdi, %rdi
je .LBB7_2
# %bb.1:
pushq %rax
.cfi_def_cfa_offset 16
callq __hipUnregisterFatBinary
movq $0, __hip_gpubin_handle(%rip)
addq $8, %rsp
.cfi_def_cfa_offset 8
.LBB7_2:
retq
.Lfunc_end7:
.size __hip_module_dtor, .Lfunc_end7-__hip_module_dtor
.cfi_endproc
# -- End function
.type _ZN7kernels13dragLeftRightEPdS0_S0_dS0_S0_iiiiii,@object # @_ZN7kernels13dragLeftRightEPdS0_S0_dS0_S0_iiiiii
.section .rodata,"a",@progbits
.globl _ZN7kernels13dragLeftRightEPdS0_S0_dS0_S0_iiiiii
.p2align 3, 0x0
_ZN7kernels13dragLeftRightEPdS0_S0_dS0_S0_iiiiii:
.quad _ZN7kernels28__device_stub__dragLeftRightEPdS0_S0_dS0_S0_iiiiii
.size _ZN7kernels13dragLeftRightEPdS0_S0_dS0_S0_iiiiii, 8
.type _ZN7kernels13dragBottomTopEPdS0_dS0_S0_iiiiii,@object # @_ZN7kernels13dragBottomTopEPdS0_dS0_S0_iiiiii
.globl _ZN7kernels13dragBottomTopEPdS0_dS0_S0_iiiiii
.p2align 3, 0x0
_ZN7kernels13dragBottomTopEPdS0_dS0_S0_iiiiii:
.quad _ZN7kernels28__device_stub__dragBottomTopEPdS0_dS0_S0_iiiiii
.size _ZN7kernels13dragBottomTopEPdS0_dS0_S0_iiiiii, 8
.type _ZN7kernels12dragUnsteadyEPdS0_S0_PiS0_S0_diiiiii,@object # @_ZN7kernels12dragUnsteadyEPdS0_S0_PiS0_S0_diiiiii
.globl _ZN7kernels12dragUnsteadyEPdS0_S0_PiS0_S0_diiiiii
.p2align 3, 0x0
_ZN7kernels12dragUnsteadyEPdS0_S0_PiS0_S0_diiiiii:
.quad _ZN7kernels27__device_stub__dragUnsteadyEPdS0_S0_PiS0_S0_diiiiii
.size _ZN7kernels12dragUnsteadyEPdS0_S0_PiS0_S0_diiiiii, 8
.type _ZN7kernels13liftLeftRightEPdS0_dS0_S0_iiiiii,@object # @_ZN7kernels13liftLeftRightEPdS0_dS0_S0_iiiiii
.globl _ZN7kernels13liftLeftRightEPdS0_dS0_S0_iiiiii
.p2align 3, 0x0
_ZN7kernels13liftLeftRightEPdS0_dS0_S0_iiiiii:
.quad _ZN7kernels28__device_stub__liftLeftRightEPdS0_dS0_S0_iiiiii
.size _ZN7kernels13liftLeftRightEPdS0_dS0_S0_iiiiii, 8
.type _ZN7kernels13liftBottomTopEPdS0_S0_dS0_S0_iiiiii,@object # @_ZN7kernels13liftBottomTopEPdS0_S0_dS0_S0_iiiiii
.globl _ZN7kernels13liftBottomTopEPdS0_S0_dS0_S0_iiiiii
.p2align 3, 0x0
_ZN7kernels13liftBottomTopEPdS0_S0_dS0_S0_iiiiii:
.quad _ZN7kernels28__device_stub__liftBottomTopEPdS0_S0_dS0_S0_iiiiii
.size _ZN7kernels13liftBottomTopEPdS0_S0_dS0_S0_iiiiii, 8
.type _ZN7kernels12liftUnsteadyEPdS0_S0_PiS0_S0_diiiiii,@object # @_ZN7kernels12liftUnsteadyEPdS0_S0_PiS0_S0_diiiiii
.globl _ZN7kernels12liftUnsteadyEPdS0_S0_PiS0_S0_diiiiii
.p2align 3, 0x0
_ZN7kernels12liftUnsteadyEPdS0_S0_PiS0_S0_diiiiii:
.quad _ZN7kernels27__device_stub__liftUnsteadyEPdS0_S0_PiS0_S0_diiiiii
.size _ZN7kernels12liftUnsteadyEPdS0_S0_PiS0_S0_diiiiii, 8
.type .L__unnamed_1,@object # @0
.section .rodata.str1.1,"aMS",@progbits,1
.L__unnamed_1:
.asciz "_ZN7kernels13dragLeftRightEPdS0_S0_dS0_S0_iiiiii"
.size .L__unnamed_1, 49
.type .L__unnamed_2,@object # @1
.L__unnamed_2:
.asciz "_ZN7kernels13dragBottomTopEPdS0_dS0_S0_iiiiii"
.size .L__unnamed_2, 46
.type .L__unnamed_3,@object # @2
.L__unnamed_3:
.asciz "_ZN7kernels12dragUnsteadyEPdS0_S0_PiS0_S0_diiiiii"
.size .L__unnamed_3, 50
.type .L__unnamed_4,@object # @3
.L__unnamed_4:
.asciz "_ZN7kernels13liftLeftRightEPdS0_dS0_S0_iiiiii"
.size .L__unnamed_4, 46
.type .L__unnamed_5,@object # @4
.L__unnamed_5:
.asciz "_ZN7kernels13liftBottomTopEPdS0_S0_dS0_S0_iiiiii"
.size .L__unnamed_5, 49
.type .L__unnamed_6,@object # @5
.L__unnamed_6:
.asciz "_ZN7kernels12liftUnsteadyEPdS0_S0_PiS0_S0_diiiiii"
.size .L__unnamed_6, 50
.type __hip_fatbin_wrapper,@object # @__hip_fatbin_wrapper
.section .hipFatBinSegment,"a",@progbits
.p2align 3, 0x0
__hip_fatbin_wrapper:
.long 1212764230 # 0x48495046
.long 1 # 0x1
.quad __hip_fatbin
.quad 0
.size __hip_fatbin_wrapper, 24
.type __hip_gpubin_handle,@object # @__hip_gpubin_handle
.local __hip_gpubin_handle
.comm __hip_gpubin_handle,8,8
.section .init_array,"aw",@init_array
.p2align 3, 0x0
.quad __hip_module_ctor
.type __hip_cuid_,@object # @__hip_cuid_
.bss
.globl __hip_cuid_
__hip_cuid_:
.byte 0 # 0x0
.size __hip_cuid_, 1
.section ".linker-options","e",@llvm_linker_options
.ident "AMD clang version 18.0.0git (https://github.com/RadeonOpenCompute/llvm-project roc-6.3.2 25012 e5bf7e55c91490b07c49d8960fa7983d864936c4)"
.section ".note.GNU-stack","",@progbits
.addrsig
.addrsig_sym _ZN7kernels28__device_stub__dragLeftRightEPdS0_S0_dS0_S0_iiiiii
.addrsig_sym _ZN7kernels28__device_stub__dragBottomTopEPdS0_dS0_S0_iiiiii
.addrsig_sym _ZN7kernels27__device_stub__dragUnsteadyEPdS0_S0_PiS0_S0_diiiiii
.addrsig_sym _ZN7kernels28__device_stub__liftLeftRightEPdS0_dS0_S0_iiiiii
.addrsig_sym _ZN7kernels28__device_stub__liftBottomTopEPdS0_S0_dS0_S0_iiiiii
.addrsig_sym _ZN7kernels27__device_stub__liftUnsteadyEPdS0_S0_PiS0_S0_diiiiii
.addrsig_sym __hip_module_ctor
.addrsig_sym __hip_module_dtor
.addrsig_sym _ZN7kernels13dragLeftRightEPdS0_S0_dS0_S0_iiiiii
.addrsig_sym _ZN7kernels13dragBottomTopEPdS0_dS0_S0_iiiiii
.addrsig_sym _ZN7kernels12dragUnsteadyEPdS0_S0_PiS0_S0_diiiiii
.addrsig_sym _ZN7kernels13liftLeftRightEPdS0_dS0_S0_iiiiii
.addrsig_sym _ZN7kernels13liftBottomTopEPdS0_S0_dS0_S0_iiiiii
.addrsig_sym _ZN7kernels12liftUnsteadyEPdS0_S0_PiS0_S0_diiiiii
.addrsig_sym __hip_fatbin
.addrsig_sym __hip_fatbin_wrapper
.addrsig_sym __hip_cuid_ |
You are a helpful coding assistant specialized in converting from CUDA host assembly to AMD host assembly. | .file "tmpxft_00142b8f_00000000-6_calculateForce.cudafe1.cpp"
.text
#APP
#NO_APP
.type _ZL26__cudaUnregisterBinaryUtilv, @function
_ZL26__cudaUnregisterBinaryUtilv:
.LFB2029:
.cfi_startproc
endbr64
subq $8, %rsp
.cfi_def_cfa_offset 16
movq _ZL20__cudaFatCubinHandle(%rip), %rdi
call __cudaUnregisterFatBinary@PLT
addq $8, %rsp
.cfi_def_cfa_offset 8
ret
.cfi_endproc
.LFE2029:
.size _ZL26__cudaUnregisterBinaryUtilv, .-_ZL26__cudaUnregisterBinaryUtilv
.globl _Z62__device_stub__ZN7kernels13dragLeftRightEPdS0_S0_dS0_S0_iiiiiiPdS_S_dS_S_iiiiii
.type _Z62__device_stub__ZN7kernels13dragLeftRightEPdS0_S0_dS0_S0_iiiiiiPdS_S_dS_S_iiiiii, @function
_Z62__device_stub__ZN7kernels13dragLeftRightEPdS0_S0_dS0_S0_iiiiiiPdS_S_dS_S_iiiiii:
.LFB2051:
.cfi_startproc
endbr64
subq $248, %rsp
.cfi_def_cfa_offset 256
movq %rdi, 56(%rsp)
movq %rsi, 48(%rsp)
movq %rdx, 40(%rsp)
movsd %xmm0, 32(%rsp)
movq %rcx, 24(%rsp)
movq %r8, 16(%rsp)
movl %r9d, 12(%rsp)
movq %fs:40, %rax
movq %rax, 232(%rsp)
xorl %eax, %eax
leaq 56(%rsp), %rax
movq %rax, 128(%rsp)
leaq 48(%rsp), %rax
movq %rax, 136(%rsp)
leaq 40(%rsp), %rax
movq %rax, 144(%rsp)
leaq 32(%rsp), %rax
movq %rax, 152(%rsp)
leaq 24(%rsp), %rax
movq %rax, 160(%rsp)
leaq 16(%rsp), %rax
movq %rax, 168(%rsp)
leaq 12(%rsp), %rax
movq %rax, 176(%rsp)
leaq 256(%rsp), %rax
movq %rax, 184(%rsp)
leaq 264(%rsp), %rax
movq %rax, 192(%rsp)
leaq 272(%rsp), %rax
movq %rax, 200(%rsp)
leaq 280(%rsp), %rax
movq %rax, 208(%rsp)
leaq 288(%rsp), %rax
movq %rax, 216(%rsp)
movl $1, 80(%rsp)
movl $1, 84(%rsp)
movl $1, 88(%rsp)
movl $1, 92(%rsp)
movl $1, 96(%rsp)
movl $1, 100(%rsp)
leaq 72(%rsp), %rcx
leaq 64(%rsp), %rdx
leaq 92(%rsp), %rsi
leaq 80(%rsp), %rdi
call __cudaPopCallConfiguration@PLT
testl %eax, %eax
je .L7
.L3:
movq 232(%rsp), %rax
subq %fs:40, %rax
jne .L8
addq $248, %rsp
.cfi_remember_state
.cfi_def_cfa_offset 8
ret
.L7:
.cfi_restore_state
pushq 72(%rsp)
.cfi_def_cfa_offset 264
pushq 72(%rsp)
.cfi_def_cfa_offset 272
leaq 144(%rsp), %r9
movq 108(%rsp), %rcx
movl 116(%rsp), %r8d
movq 96(%rsp), %rsi
movl 104(%rsp), %edx
leaq _ZN7kernels13dragLeftRightEPdS0_S0_dS0_S0_iiiiii(%rip), %rdi
call cudaLaunchKernel@PLT
addq $16, %rsp
.cfi_def_cfa_offset 256
jmp .L3
.L8:
call __stack_chk_fail@PLT
.cfi_endproc
.LFE2051:
.size _Z62__device_stub__ZN7kernels13dragLeftRightEPdS0_S0_dS0_S0_iiiiiiPdS_S_dS_S_iiiiii, .-_Z62__device_stub__ZN7kernels13dragLeftRightEPdS0_S0_dS0_S0_iiiiiiPdS_S_dS_S_iiiiii
.globl _ZN7kernels13dragLeftRightEPdS0_S0_dS0_S0_iiiiii
.type _ZN7kernels13dragLeftRightEPdS0_S0_dS0_S0_iiiiii, @function
_ZN7kernels13dragLeftRightEPdS0_S0_dS0_S0_iiiiii:
.LFB2052:
.cfi_startproc
endbr64
subq $16, %rsp
.cfi_def_cfa_offset 24
movl 56(%rsp), %eax
pushq %rax
.cfi_def_cfa_offset 32
movl 56(%rsp), %eax
pushq %rax
.cfi_def_cfa_offset 40
movl 56(%rsp), %eax
pushq %rax
.cfi_def_cfa_offset 48
movl 56(%rsp), %eax
pushq %rax
.cfi_def_cfa_offset 56
movl 56(%rsp), %eax
pushq %rax
.cfi_def_cfa_offset 64
call _Z62__device_stub__ZN7kernels13dragLeftRightEPdS0_S0_dS0_S0_iiiiiiPdS_S_dS_S_iiiiii
addq $56, %rsp
.cfi_def_cfa_offset 8
ret
.cfi_endproc
.LFE2052:
.size _ZN7kernels13dragLeftRightEPdS0_S0_dS0_S0_iiiiii, .-_ZN7kernels13dragLeftRightEPdS0_S0_dS0_S0_iiiiii
.globl _Z59__device_stub__ZN7kernels13dragBottomTopEPdS0_dS0_S0_iiiiiiPdS_dS_S_iiiiii
.type _Z59__device_stub__ZN7kernels13dragBottomTopEPdS0_dS0_S0_iiiiiiPdS_dS_S_iiiiii, @function
_Z59__device_stub__ZN7kernels13dragBottomTopEPdS0_dS0_S0_iiiiiiPdS_dS_S_iiiiii:
.LFB2053:
.cfi_startproc
endbr64
subq $216, %rsp
.cfi_def_cfa_offset 224
movq %rdi, 40(%rsp)
movq %rsi, 32(%rsp)
movsd %xmm0, 24(%rsp)
movq %rdx, 16(%rsp)
movq %rcx, 8(%rsp)
movl %r8d, 4(%rsp)
movl %r9d, (%rsp)
movq %fs:40, %rax
movq %rax, 200(%rsp)
xorl %eax, %eax
leaq 40(%rsp), %rax
movq %rax, 112(%rsp)
leaq 32(%rsp), %rax
movq %rax, 120(%rsp)
leaq 24(%rsp), %rax
movq %rax, 128(%rsp)
leaq 16(%rsp), %rax
movq %rax, 136(%rsp)
leaq 8(%rsp), %rax
movq %rax, 144(%rsp)
leaq 4(%rsp), %rax
movq %rax, 152(%rsp)
movq %rsp, %rax
movq %rax, 160(%rsp)
leaq 224(%rsp), %rax
movq %rax, 168(%rsp)
leaq 232(%rsp), %rax
movq %rax, 176(%rsp)
leaq 240(%rsp), %rax
movq %rax, 184(%rsp)
leaq 248(%rsp), %rax
movq %rax, 192(%rsp)
movl $1, 64(%rsp)
movl $1, 68(%rsp)
movl $1, 72(%rsp)
movl $1, 76(%rsp)
movl $1, 80(%rsp)
movl $1, 84(%rsp)
leaq 56(%rsp), %rcx
leaq 48(%rsp), %rdx
leaq 76(%rsp), %rsi
leaq 64(%rsp), %rdi
call __cudaPopCallConfiguration@PLT
testl %eax, %eax
je .L15
.L11:
movq 200(%rsp), %rax
subq %fs:40, %rax
jne .L16
addq $216, %rsp
.cfi_remember_state
.cfi_def_cfa_offset 8
ret
.L15:
.cfi_restore_state
pushq 56(%rsp)
.cfi_def_cfa_offset 232
pushq 56(%rsp)
.cfi_def_cfa_offset 240
leaq 128(%rsp), %r9
movq 92(%rsp), %rcx
movl 100(%rsp), %r8d
movq 80(%rsp), %rsi
movl 88(%rsp), %edx
leaq _ZN7kernels13dragBottomTopEPdS0_dS0_S0_iiiiii(%rip), %rdi
call cudaLaunchKernel@PLT
addq $16, %rsp
.cfi_def_cfa_offset 224
jmp .L11
.L16:
call __stack_chk_fail@PLT
.cfi_endproc
.LFE2053:
.size _Z59__device_stub__ZN7kernels13dragBottomTopEPdS0_dS0_S0_iiiiiiPdS_dS_S_iiiiii, .-_Z59__device_stub__ZN7kernels13dragBottomTopEPdS0_dS0_S0_iiiiiiPdS_dS_S_iiiiii
.globl _ZN7kernels13dragBottomTopEPdS0_dS0_S0_iiiiii
.type _ZN7kernels13dragBottomTopEPdS0_dS0_S0_iiiiii, @function
_ZN7kernels13dragBottomTopEPdS0_dS0_S0_iiiiii:
.LFB2054:
.cfi_startproc
endbr64
subq $8, %rsp
.cfi_def_cfa_offset 16
movl 40(%rsp), %eax
pushq %rax
.cfi_def_cfa_offset 24
movl 40(%rsp), %eax
pushq %rax
.cfi_def_cfa_offset 32
movl 40(%rsp), %eax
pushq %rax
.cfi_def_cfa_offset 40
movl 40(%rsp), %eax
pushq %rax
.cfi_def_cfa_offset 48
call _Z59__device_stub__ZN7kernels13dragBottomTopEPdS0_dS0_S0_iiiiiiPdS_dS_S_iiiiii
addq $40, %rsp
.cfi_def_cfa_offset 8
ret
.cfi_endproc
.LFE2054:
.size _ZN7kernels13dragBottomTopEPdS0_dS0_S0_iiiiii, .-_ZN7kernels13dragBottomTopEPdS0_dS0_S0_iiiiii
.globl _Z63__device_stub__ZN7kernels12dragUnsteadyEPdS0_S0_PiS0_S0_diiiiiiPdS_S_PiS_S_diiiiii
.type _Z63__device_stub__ZN7kernels12dragUnsteadyEPdS0_S0_PiS0_S0_diiiiiiPdS_S_PiS_S_diiiiii, @function
_Z63__device_stub__ZN7kernels12dragUnsteadyEPdS0_S0_PiS0_S0_diiiiiiPdS_S_PiS_S_diiiiii:
.LFB2055:
.cfi_startproc
endbr64
subq $248, %rsp
.cfi_def_cfa_offset 256
movq %rdi, 56(%rsp)
movq %rsi, 48(%rsp)
movq %rdx, 40(%rsp)
movq %rcx, 32(%rsp)
movq %r8, 24(%rsp)
movq %r9, 16(%rsp)
movsd %xmm0, 8(%rsp)
movq %fs:40, %rax
movq %rax, 232(%rsp)
xorl %eax, %eax
leaq 56(%rsp), %rax
movq %rax, 128(%rsp)
leaq 48(%rsp), %rax
movq %rax, 136(%rsp)
leaq 40(%rsp), %rax
movq %rax, 144(%rsp)
leaq 32(%rsp), %rax
movq %rax, 152(%rsp)
leaq 24(%rsp), %rax
movq %rax, 160(%rsp)
leaq 16(%rsp), %rax
movq %rax, 168(%rsp)
leaq 8(%rsp), %rax
movq %rax, 176(%rsp)
leaq 256(%rsp), %rax
movq %rax, 184(%rsp)
leaq 264(%rsp), %rax
movq %rax, 192(%rsp)
leaq 272(%rsp), %rax
movq %rax, 200(%rsp)
leaq 280(%rsp), %rax
movq %rax, 208(%rsp)
leaq 288(%rsp), %rax
movq %rax, 216(%rsp)
leaq 296(%rsp), %rax
movq %rax, 224(%rsp)
movl $1, 80(%rsp)
movl $1, 84(%rsp)
movl $1, 88(%rsp)
movl $1, 92(%rsp)
movl $1, 96(%rsp)
movl $1, 100(%rsp)
leaq 72(%rsp), %rcx
leaq 64(%rsp), %rdx
leaq 92(%rsp), %rsi
leaq 80(%rsp), %rdi
call __cudaPopCallConfiguration@PLT
testl %eax, %eax
je .L23
.L19:
movq 232(%rsp), %rax
subq %fs:40, %rax
jne .L24
addq $248, %rsp
.cfi_remember_state
.cfi_def_cfa_offset 8
ret
.L23:
.cfi_restore_state
pushq 72(%rsp)
.cfi_def_cfa_offset 264
pushq 72(%rsp)
.cfi_def_cfa_offset 272
leaq 144(%rsp), %r9
movq 108(%rsp), %rcx
movl 116(%rsp), %r8d
movq 96(%rsp), %rsi
movl 104(%rsp), %edx
leaq _ZN7kernels12dragUnsteadyEPdS0_S0_PiS0_S0_diiiiii(%rip), %rdi
call cudaLaunchKernel@PLT
addq $16, %rsp
.cfi_def_cfa_offset 256
jmp .L19
.L24:
call __stack_chk_fail@PLT
.cfi_endproc
.LFE2055:
.size _Z63__device_stub__ZN7kernels12dragUnsteadyEPdS0_S0_PiS0_S0_diiiiiiPdS_S_PiS_S_diiiiii, .-_Z63__device_stub__ZN7kernels12dragUnsteadyEPdS0_S0_PiS0_S0_diiiiiiPdS_S_PiS_S_diiiiii
.globl _ZN7kernels12dragUnsteadyEPdS0_S0_PiS0_S0_diiiiii
.type _ZN7kernels12dragUnsteadyEPdS0_S0_PiS0_S0_diiiiii, @function
_ZN7kernels12dragUnsteadyEPdS0_S0_PiS0_S0_diiiiii:
.LFB2056:
.cfi_startproc
endbr64
subq $8, %rsp
.cfi_def_cfa_offset 16
movl 56(%rsp), %eax
pushq %rax
.cfi_def_cfa_offset 24
movl 56(%rsp), %eax
pushq %rax
.cfi_def_cfa_offset 32
movl 56(%rsp), %eax
pushq %rax
.cfi_def_cfa_offset 40
movl 56(%rsp), %eax
pushq %rax
.cfi_def_cfa_offset 48
movl 56(%rsp), %eax
pushq %rax
.cfi_def_cfa_offset 56
movl 56(%rsp), %eax
pushq %rax
.cfi_def_cfa_offset 64
call _Z63__device_stub__ZN7kernels12dragUnsteadyEPdS0_S0_PiS0_S0_diiiiiiPdS_S_PiS_S_diiiiii
addq $56, %rsp
.cfi_def_cfa_offset 8
ret
.cfi_endproc
.LFE2056:
.size _ZN7kernels12dragUnsteadyEPdS0_S0_PiS0_S0_diiiiii, .-_ZN7kernels12dragUnsteadyEPdS0_S0_PiS0_S0_diiiiii
.globl _Z59__device_stub__ZN7kernels13liftLeftRightEPdS0_dS0_S0_iiiiiiPdS_dS_S_iiiiii
.type _Z59__device_stub__ZN7kernels13liftLeftRightEPdS0_dS0_S0_iiiiiiPdS_dS_S_iiiiii, @function
_Z59__device_stub__ZN7kernels13liftLeftRightEPdS0_dS0_S0_iiiiiiPdS_dS_S_iiiiii:
.LFB2057:
.cfi_startproc
endbr64
subq $216, %rsp
.cfi_def_cfa_offset 224
movq %rdi, 40(%rsp)
movq %rsi, 32(%rsp)
movsd %xmm0, 24(%rsp)
movq %rdx, 16(%rsp)
movq %rcx, 8(%rsp)
movl %r8d, 4(%rsp)
movl %r9d, (%rsp)
movq %fs:40, %rax
movq %rax, 200(%rsp)
xorl %eax, %eax
leaq 40(%rsp), %rax
movq %rax, 112(%rsp)
leaq 32(%rsp), %rax
movq %rax, 120(%rsp)
leaq 24(%rsp), %rax
movq %rax, 128(%rsp)
leaq 16(%rsp), %rax
movq %rax, 136(%rsp)
leaq 8(%rsp), %rax
movq %rax, 144(%rsp)
leaq 4(%rsp), %rax
movq %rax, 152(%rsp)
movq %rsp, %rax
movq %rax, 160(%rsp)
leaq 224(%rsp), %rax
movq %rax, 168(%rsp)
leaq 232(%rsp), %rax
movq %rax, 176(%rsp)
leaq 240(%rsp), %rax
movq %rax, 184(%rsp)
leaq 248(%rsp), %rax
movq %rax, 192(%rsp)
movl $1, 64(%rsp)
movl $1, 68(%rsp)
movl $1, 72(%rsp)
movl $1, 76(%rsp)
movl $1, 80(%rsp)
movl $1, 84(%rsp)
leaq 56(%rsp), %rcx
leaq 48(%rsp), %rdx
leaq 76(%rsp), %rsi
leaq 64(%rsp), %rdi
call __cudaPopCallConfiguration@PLT
testl %eax, %eax
je .L31
.L27:
movq 200(%rsp), %rax
subq %fs:40, %rax
jne .L32
addq $216, %rsp
.cfi_remember_state
.cfi_def_cfa_offset 8
ret
.L31:
.cfi_restore_state
pushq 56(%rsp)
.cfi_def_cfa_offset 232
pushq 56(%rsp)
.cfi_def_cfa_offset 240
leaq 128(%rsp), %r9
movq 92(%rsp), %rcx
movl 100(%rsp), %r8d
movq 80(%rsp), %rsi
movl 88(%rsp), %edx
leaq _ZN7kernels13liftLeftRightEPdS0_dS0_S0_iiiiii(%rip), %rdi
call cudaLaunchKernel@PLT
addq $16, %rsp
.cfi_def_cfa_offset 224
jmp .L27
.L32:
call __stack_chk_fail@PLT
.cfi_endproc
.LFE2057:
.size _Z59__device_stub__ZN7kernels13liftLeftRightEPdS0_dS0_S0_iiiiiiPdS_dS_S_iiiiii, .-_Z59__device_stub__ZN7kernels13liftLeftRightEPdS0_dS0_S0_iiiiiiPdS_dS_S_iiiiii
.globl _ZN7kernels13liftLeftRightEPdS0_dS0_S0_iiiiii
.type _ZN7kernels13liftLeftRightEPdS0_dS0_S0_iiiiii, @function
_ZN7kernels13liftLeftRightEPdS0_dS0_S0_iiiiii:
.LFB2058:
.cfi_startproc
endbr64
subq $8, %rsp
.cfi_def_cfa_offset 16
movl 40(%rsp), %eax
pushq %rax
.cfi_def_cfa_offset 24
movl 40(%rsp), %eax
pushq %rax
.cfi_def_cfa_offset 32
movl 40(%rsp), %eax
pushq %rax
.cfi_def_cfa_offset 40
movl 40(%rsp), %eax
pushq %rax
.cfi_def_cfa_offset 48
call _Z59__device_stub__ZN7kernels13liftLeftRightEPdS0_dS0_S0_iiiiiiPdS_dS_S_iiiiii
addq $40, %rsp
.cfi_def_cfa_offset 8
ret
.cfi_endproc
.LFE2058:
.size _ZN7kernels13liftLeftRightEPdS0_dS0_S0_iiiiii, .-_ZN7kernels13liftLeftRightEPdS0_dS0_S0_iiiiii
.globl _Z62__device_stub__ZN7kernels13liftBottomTopEPdS0_S0_dS0_S0_iiiiiiPdS_S_dS_S_iiiiii
.type _Z62__device_stub__ZN7kernels13liftBottomTopEPdS0_S0_dS0_S0_iiiiiiPdS_S_dS_S_iiiiii, @function
_Z62__device_stub__ZN7kernels13liftBottomTopEPdS0_S0_dS0_S0_iiiiiiPdS_S_dS_S_iiiiii:
.LFB2059:
.cfi_startproc
endbr64
subq $248, %rsp
.cfi_def_cfa_offset 256
movq %rdi, 56(%rsp)
movq %rsi, 48(%rsp)
movq %rdx, 40(%rsp)
movsd %xmm0, 32(%rsp)
movq %rcx, 24(%rsp)
movq %r8, 16(%rsp)
movl %r9d, 12(%rsp)
movq %fs:40, %rax
movq %rax, 232(%rsp)
xorl %eax, %eax
leaq 56(%rsp), %rax
movq %rax, 128(%rsp)
leaq 48(%rsp), %rax
movq %rax, 136(%rsp)
leaq 40(%rsp), %rax
movq %rax, 144(%rsp)
leaq 32(%rsp), %rax
movq %rax, 152(%rsp)
leaq 24(%rsp), %rax
movq %rax, 160(%rsp)
leaq 16(%rsp), %rax
movq %rax, 168(%rsp)
leaq 12(%rsp), %rax
movq %rax, 176(%rsp)
leaq 256(%rsp), %rax
movq %rax, 184(%rsp)
leaq 264(%rsp), %rax
movq %rax, 192(%rsp)
leaq 272(%rsp), %rax
movq %rax, 200(%rsp)
leaq 280(%rsp), %rax
movq %rax, 208(%rsp)
leaq 288(%rsp), %rax
movq %rax, 216(%rsp)
movl $1, 80(%rsp)
movl $1, 84(%rsp)
movl $1, 88(%rsp)
movl $1, 92(%rsp)
movl $1, 96(%rsp)
movl $1, 100(%rsp)
leaq 72(%rsp), %rcx
leaq 64(%rsp), %rdx
leaq 92(%rsp), %rsi
leaq 80(%rsp), %rdi
call __cudaPopCallConfiguration@PLT
testl %eax, %eax
je .L39
.L35:
movq 232(%rsp), %rax
subq %fs:40, %rax
jne .L40
addq $248, %rsp
.cfi_remember_state
.cfi_def_cfa_offset 8
ret
.L39:
.cfi_restore_state
pushq 72(%rsp)
.cfi_def_cfa_offset 264
pushq 72(%rsp)
.cfi_def_cfa_offset 272
leaq 144(%rsp), %r9
movq 108(%rsp), %rcx
movl 116(%rsp), %r8d
movq 96(%rsp), %rsi
movl 104(%rsp), %edx
leaq _ZN7kernels13liftBottomTopEPdS0_S0_dS0_S0_iiiiii(%rip), %rdi
call cudaLaunchKernel@PLT
addq $16, %rsp
.cfi_def_cfa_offset 256
jmp .L35
.L40:
call __stack_chk_fail@PLT
.cfi_endproc
.LFE2059:
.size _Z62__device_stub__ZN7kernels13liftBottomTopEPdS0_S0_dS0_S0_iiiiiiPdS_S_dS_S_iiiiii, .-_Z62__device_stub__ZN7kernels13liftBottomTopEPdS0_S0_dS0_S0_iiiiiiPdS_S_dS_S_iiiiii
.globl _ZN7kernels13liftBottomTopEPdS0_S0_dS0_S0_iiiiii
.type _ZN7kernels13liftBottomTopEPdS0_S0_dS0_S0_iiiiii, @function
_ZN7kernels13liftBottomTopEPdS0_S0_dS0_S0_iiiiii:
.LFB2060:
.cfi_startproc
endbr64
subq $16, %rsp
.cfi_def_cfa_offset 24
movl 56(%rsp), %eax
pushq %rax
.cfi_def_cfa_offset 32
movl 56(%rsp), %eax
pushq %rax
.cfi_def_cfa_offset 40
movl 56(%rsp), %eax
pushq %rax
.cfi_def_cfa_offset 48
movl 56(%rsp), %eax
pushq %rax
.cfi_def_cfa_offset 56
movl 56(%rsp), %eax
pushq %rax
.cfi_def_cfa_offset 64
call _Z62__device_stub__ZN7kernels13liftBottomTopEPdS0_S0_dS0_S0_iiiiiiPdS_S_dS_S_iiiiii
addq $56, %rsp
.cfi_def_cfa_offset 8
ret
.cfi_endproc
.LFE2060:
.size _ZN7kernels13liftBottomTopEPdS0_S0_dS0_S0_iiiiii, .-_ZN7kernels13liftBottomTopEPdS0_S0_dS0_S0_iiiiii
.globl _Z63__device_stub__ZN7kernels12liftUnsteadyEPdS0_S0_PiS0_S0_diiiiiiPdS_S_PiS_S_diiiiii
.type _Z63__device_stub__ZN7kernels12liftUnsteadyEPdS0_S0_PiS0_S0_diiiiiiPdS_S_PiS_S_diiiiii, @function
_Z63__device_stub__ZN7kernels12liftUnsteadyEPdS0_S0_PiS0_S0_diiiiiiPdS_S_PiS_S_diiiiii:
.LFB2061:
.cfi_startproc
endbr64
subq $248, %rsp
.cfi_def_cfa_offset 256
movq %rdi, 56(%rsp)
movq %rsi, 48(%rsp)
movq %rdx, 40(%rsp)
movq %rcx, 32(%rsp)
movq %r8, 24(%rsp)
movq %r9, 16(%rsp)
movsd %xmm0, 8(%rsp)
movq %fs:40, %rax
movq %rax, 232(%rsp)
xorl %eax, %eax
leaq 56(%rsp), %rax
movq %rax, 128(%rsp)
leaq 48(%rsp), %rax
movq %rax, 136(%rsp)
leaq 40(%rsp), %rax
movq %rax, 144(%rsp)
leaq 32(%rsp), %rax
movq %rax, 152(%rsp)
leaq 24(%rsp), %rax
movq %rax, 160(%rsp)
leaq 16(%rsp), %rax
movq %rax, 168(%rsp)
leaq 8(%rsp), %rax
movq %rax, 176(%rsp)
leaq 256(%rsp), %rax
movq %rax, 184(%rsp)
leaq 264(%rsp), %rax
movq %rax, 192(%rsp)
leaq 272(%rsp), %rax
movq %rax, 200(%rsp)
leaq 280(%rsp), %rax
movq %rax, 208(%rsp)
leaq 288(%rsp), %rax
movq %rax, 216(%rsp)
leaq 296(%rsp), %rax
movq %rax, 224(%rsp)
movl $1, 80(%rsp)
movl $1, 84(%rsp)
movl $1, 88(%rsp)
movl $1, 92(%rsp)
movl $1, 96(%rsp)
movl $1, 100(%rsp)
leaq 72(%rsp), %rcx
leaq 64(%rsp), %rdx
leaq 92(%rsp), %rsi
leaq 80(%rsp), %rdi
call __cudaPopCallConfiguration@PLT
testl %eax, %eax
je .L47
.L43:
movq 232(%rsp), %rax
subq %fs:40, %rax
jne .L48
addq $248, %rsp
.cfi_remember_state
.cfi_def_cfa_offset 8
ret
.L47:
.cfi_restore_state
pushq 72(%rsp)
.cfi_def_cfa_offset 264
pushq 72(%rsp)
.cfi_def_cfa_offset 272
leaq 144(%rsp), %r9
movq 108(%rsp), %rcx
movl 116(%rsp), %r8d
movq 96(%rsp), %rsi
movl 104(%rsp), %edx
leaq _ZN7kernels12liftUnsteadyEPdS0_S0_PiS0_S0_diiiiii(%rip), %rdi
call cudaLaunchKernel@PLT
addq $16, %rsp
.cfi_def_cfa_offset 256
jmp .L43
.L48:
call __stack_chk_fail@PLT
.cfi_endproc
.LFE2061:
.size _Z63__device_stub__ZN7kernels12liftUnsteadyEPdS0_S0_PiS0_S0_diiiiiiPdS_S_PiS_S_diiiiii, .-_Z63__device_stub__ZN7kernels12liftUnsteadyEPdS0_S0_PiS0_S0_diiiiiiPdS_S_PiS_S_diiiiii
.globl _ZN7kernels12liftUnsteadyEPdS0_S0_PiS0_S0_diiiiii
.type _ZN7kernels12liftUnsteadyEPdS0_S0_PiS0_S0_diiiiii, @function
_ZN7kernels12liftUnsteadyEPdS0_S0_PiS0_S0_diiiiii:
.LFB2062:
.cfi_startproc
endbr64
subq $8, %rsp
.cfi_def_cfa_offset 16
movl 56(%rsp), %eax
pushq %rax
.cfi_def_cfa_offset 24
movl 56(%rsp), %eax
pushq %rax
.cfi_def_cfa_offset 32
movl 56(%rsp), %eax
pushq %rax
.cfi_def_cfa_offset 40
movl 56(%rsp), %eax
pushq %rax
.cfi_def_cfa_offset 48
movl 56(%rsp), %eax
pushq %rax
.cfi_def_cfa_offset 56
movl 56(%rsp), %eax
pushq %rax
.cfi_def_cfa_offset 64
call _Z63__device_stub__ZN7kernels12liftUnsteadyEPdS0_S0_PiS0_S0_diiiiiiPdS_S_PiS_S_diiiiii
addq $56, %rsp
.cfi_def_cfa_offset 8
ret
.cfi_endproc
.LFE2062:
.size _ZN7kernels12liftUnsteadyEPdS0_S0_PiS0_S0_diiiiii, .-_ZN7kernels12liftUnsteadyEPdS0_S0_PiS0_S0_diiiiii
.section .rodata.str1.8,"aMS",@progbits,1
.align 8
.LC0:
.string "_ZN7kernels12liftUnsteadyEPdS0_S0_PiS0_S0_diiiiii"
.align 8
.LC1:
.string "_ZN7kernels13liftBottomTopEPdS0_S0_dS0_S0_iiiiii"
.align 8
.LC2:
.string "_ZN7kernels13liftLeftRightEPdS0_dS0_S0_iiiiii"
.align 8
.LC3:
.string "_ZN7kernels12dragUnsteadyEPdS0_S0_PiS0_S0_diiiiii"
.align 8
.LC4:
.string "_ZN7kernels13dragBottomTopEPdS0_dS0_S0_iiiiii"
.align 8
.LC5:
.string "_ZN7kernels13dragLeftRightEPdS0_S0_dS0_S0_iiiiii"
.text
.type _ZL24__sti____cudaRegisterAllv, @function
_ZL24__sti____cudaRegisterAllv:
.LFB2064:
.cfi_startproc
endbr64
pushq %rbx
.cfi_def_cfa_offset 16
.cfi_offset 3, -16
leaq _ZL15__fatDeviceText(%rip), %rdi
call __cudaRegisterFatBinary@PLT
movq %rax, %rbx
movq %rax, _ZL20__cudaFatCubinHandle(%rip)
pushq $0
.cfi_def_cfa_offset 24
pushq $0
.cfi_def_cfa_offset 32
pushq $0
.cfi_def_cfa_offset 40
pushq $0
.cfi_def_cfa_offset 48
movl $0, %r9d
movl $-1, %r8d
leaq .LC0(%rip), %rdx
movq %rdx, %rcx
leaq _ZN7kernels12liftUnsteadyEPdS0_S0_PiS0_S0_diiiiii(%rip), %rsi
movq %rax, %rdi
call __cudaRegisterFunction@PLT
addq $32, %rsp
.cfi_def_cfa_offset 16
pushq $0
.cfi_def_cfa_offset 24
pushq $0
.cfi_def_cfa_offset 32
pushq $0
.cfi_def_cfa_offset 40
pushq $0
.cfi_def_cfa_offset 48
movl $0, %r9d
movl $-1, %r8d
leaq .LC1(%rip), %rdx
movq %rdx, %rcx
leaq _ZN7kernels13liftBottomTopEPdS0_S0_dS0_S0_iiiiii(%rip), %rsi
movq %rbx, %rdi
call __cudaRegisterFunction@PLT
addq $32, %rsp
.cfi_def_cfa_offset 16
pushq $0
.cfi_def_cfa_offset 24
pushq $0
.cfi_def_cfa_offset 32
pushq $0
.cfi_def_cfa_offset 40
pushq $0
.cfi_def_cfa_offset 48
movl $0, %r9d
movl $-1, %r8d
leaq .LC2(%rip), %rdx
movq %rdx, %rcx
leaq _ZN7kernels13liftLeftRightEPdS0_dS0_S0_iiiiii(%rip), %rsi
movq %rbx, %rdi
call __cudaRegisterFunction@PLT
addq $32, %rsp
.cfi_def_cfa_offset 16
pushq $0
.cfi_def_cfa_offset 24
pushq $0
.cfi_def_cfa_offset 32
pushq $0
.cfi_def_cfa_offset 40
pushq $0
.cfi_def_cfa_offset 48
movl $0, %r9d
movl $-1, %r8d
leaq .LC3(%rip), %rdx
movq %rdx, %rcx
leaq _ZN7kernels12dragUnsteadyEPdS0_S0_PiS0_S0_diiiiii(%rip), %rsi
movq %rbx, %rdi
call __cudaRegisterFunction@PLT
addq $32, %rsp
.cfi_def_cfa_offset 16
pushq $0
.cfi_def_cfa_offset 24
pushq $0
.cfi_def_cfa_offset 32
pushq $0
.cfi_def_cfa_offset 40
pushq $0
.cfi_def_cfa_offset 48
movl $0, %r9d
movl $-1, %r8d
leaq .LC4(%rip), %rdx
movq %rdx, %rcx
leaq _ZN7kernels13dragBottomTopEPdS0_dS0_S0_iiiiii(%rip), %rsi
movq %rbx, %rdi
call __cudaRegisterFunction@PLT
addq $32, %rsp
.cfi_def_cfa_offset 16
pushq $0
.cfi_def_cfa_offset 24
pushq $0
.cfi_def_cfa_offset 32
pushq $0
.cfi_def_cfa_offset 40
pushq $0
.cfi_def_cfa_offset 48
movl $0, %r9d
movl $-1, %r8d
leaq .LC5(%rip), %rdx
movq %rdx, %rcx
leaq _ZN7kernels13dragLeftRightEPdS0_S0_dS0_S0_iiiiii(%rip), %rsi
movq %rbx, %rdi
call __cudaRegisterFunction@PLT
addq $32, %rsp
.cfi_def_cfa_offset 16
movq _ZL20__cudaFatCubinHandle(%rip), %rdi
call __cudaRegisterFatBinaryEnd@PLT
leaq _ZL26__cudaUnregisterBinaryUtilv(%rip), %rdi
call atexit@PLT
popq %rbx
.cfi_def_cfa_offset 8
ret
.cfi_endproc
.LFE2064:
.size _ZL24__sti____cudaRegisterAllv, .-_ZL24__sti____cudaRegisterAllv
.section .init_array,"aw"
.align 8
.quad _ZL24__sti____cudaRegisterAllv
.section .nvFatBinSegment,"aw"
.align 8
.type _ZL15__fatDeviceText, @object
.size _ZL15__fatDeviceText, 24
_ZL15__fatDeviceText:
.long 1180844977
.long 1
.quad fatbinData
.quad 0
.local _ZL20__cudaFatCubinHandle
.comm _ZL20__cudaFatCubinHandle,8,8
.ident "GCC: (Ubuntu 13.3.0-6ubuntu2~24.04) 13.3.0"
.section .note.GNU-stack,"",@progbits
.section .note.gnu.property,"a"
.align 8
.long 1f - 0f
.long 4f - 1f
.long 5
0:
.string "GNU"
1:
.align 8
.long 0xc0000002
.long 3f - 2f
2:
.long 0x3
3:
.align 8
4: | .text
.file "calculateForce.hip"
.globl _ZN7kernels28__device_stub__dragLeftRightEPdS0_S0_dS0_S0_iiiiii # -- Begin function _ZN7kernels28__device_stub__dragLeftRightEPdS0_S0_dS0_S0_iiiiii
.p2align 4, 0x90
.type _ZN7kernels28__device_stub__dragLeftRightEPdS0_S0_dS0_S0_iiiiii,@function
_ZN7kernels28__device_stub__dragLeftRightEPdS0_S0_dS0_S0_iiiiii: # @_ZN7kernels28__device_stub__dragLeftRightEPdS0_S0_dS0_S0_iiiiii
.cfi_startproc
# %bb.0:
subq $216, %rsp
.cfi_def_cfa_offset 224
movq %rdi, 104(%rsp)
movq %rsi, 96(%rsp)
movq %rdx, 88(%rsp)
movsd %xmm0, 80(%rsp)
movq %rcx, 72(%rsp)
movq %r8, 64(%rsp)
movl %r9d, 12(%rsp)
leaq 104(%rsp), %rax
movq %rax, 112(%rsp)
leaq 96(%rsp), %rax
movq %rax, 120(%rsp)
leaq 88(%rsp), %rax
movq %rax, 128(%rsp)
leaq 80(%rsp), %rax
movq %rax, 136(%rsp)
leaq 72(%rsp), %rax
movq %rax, 144(%rsp)
leaq 64(%rsp), %rax
movq %rax, 152(%rsp)
leaq 12(%rsp), %rax
movq %rax, 160(%rsp)
leaq 224(%rsp), %rax
movq %rax, 168(%rsp)
leaq 232(%rsp), %rax
movq %rax, 176(%rsp)
leaq 240(%rsp), %rax
movq %rax, 184(%rsp)
leaq 248(%rsp), %rax
movq %rax, 192(%rsp)
leaq 256(%rsp), %rax
movq %rax, 200(%rsp)
leaq 48(%rsp), %rdi
leaq 32(%rsp), %rsi
leaq 24(%rsp), %rdx
leaq 16(%rsp), %rcx
callq __hipPopCallConfiguration
movq 48(%rsp), %rsi
movl 56(%rsp), %edx
movq 32(%rsp), %rcx
movl 40(%rsp), %r8d
leaq 112(%rsp), %r9
movl $_ZN7kernels13dragLeftRightEPdS0_S0_dS0_S0_iiiiii, %edi
pushq 16(%rsp)
.cfi_adjust_cfa_offset 8
pushq 32(%rsp)
.cfi_adjust_cfa_offset 8
callq hipLaunchKernel
addq $232, %rsp
.cfi_adjust_cfa_offset -232
retq
.Lfunc_end0:
.size _ZN7kernels28__device_stub__dragLeftRightEPdS0_S0_dS0_S0_iiiiii, .Lfunc_end0-_ZN7kernels28__device_stub__dragLeftRightEPdS0_S0_dS0_S0_iiiiii
.cfi_endproc
# -- End function
.globl _ZN7kernels28__device_stub__dragBottomTopEPdS0_dS0_S0_iiiiii # -- Begin function _ZN7kernels28__device_stub__dragBottomTopEPdS0_dS0_S0_iiiiii
.p2align 4, 0x90
.type _ZN7kernels28__device_stub__dragBottomTopEPdS0_dS0_S0_iiiiii,@function
_ZN7kernels28__device_stub__dragBottomTopEPdS0_dS0_S0_iiiiii: # @_ZN7kernels28__device_stub__dragBottomTopEPdS0_dS0_S0_iiiiii
.cfi_startproc
# %bb.0:
subq $184, %rsp
.cfi_def_cfa_offset 192
movq %rdi, 88(%rsp)
movq %rsi, 80(%rsp)
movsd %xmm0, 72(%rsp)
movq %rdx, 64(%rsp)
movq %rcx, 56(%rsp)
movl %r8d, 4(%rsp)
movl %r9d, (%rsp)
leaq 88(%rsp), %rax
movq %rax, 96(%rsp)
leaq 80(%rsp), %rax
movq %rax, 104(%rsp)
leaq 72(%rsp), %rax
movq %rax, 112(%rsp)
leaq 64(%rsp), %rax
movq %rax, 120(%rsp)
leaq 56(%rsp), %rax
movq %rax, 128(%rsp)
leaq 4(%rsp), %rax
movq %rax, 136(%rsp)
movq %rsp, %rax
movq %rax, 144(%rsp)
leaq 192(%rsp), %rax
movq %rax, 152(%rsp)
leaq 200(%rsp), %rax
movq %rax, 160(%rsp)
leaq 208(%rsp), %rax
movq %rax, 168(%rsp)
leaq 216(%rsp), %rax
movq %rax, 176(%rsp)
leaq 40(%rsp), %rdi
leaq 24(%rsp), %rsi
leaq 16(%rsp), %rdx
leaq 8(%rsp), %rcx
callq __hipPopCallConfiguration
movq 40(%rsp), %rsi
movl 48(%rsp), %edx
movq 24(%rsp), %rcx
movl 32(%rsp), %r8d
leaq 96(%rsp), %r9
movl $_ZN7kernels13dragBottomTopEPdS0_dS0_S0_iiiiii, %edi
pushq 8(%rsp)
.cfi_adjust_cfa_offset 8
pushq 24(%rsp)
.cfi_adjust_cfa_offset 8
callq hipLaunchKernel
addq $200, %rsp
.cfi_adjust_cfa_offset -200
retq
.Lfunc_end1:
.size _ZN7kernels28__device_stub__dragBottomTopEPdS0_dS0_S0_iiiiii, .Lfunc_end1-_ZN7kernels28__device_stub__dragBottomTopEPdS0_dS0_S0_iiiiii
.cfi_endproc
# -- End function
.globl _ZN7kernels27__device_stub__dragUnsteadyEPdS0_S0_PiS0_S0_diiiiii # -- Begin function _ZN7kernels27__device_stub__dragUnsteadyEPdS0_S0_PiS0_S0_diiiiii
.p2align 4, 0x90
.type _ZN7kernels27__device_stub__dragUnsteadyEPdS0_S0_PiS0_S0_diiiiii,@function
_ZN7kernels27__device_stub__dragUnsteadyEPdS0_S0_PiS0_S0_diiiiii: # @_ZN7kernels27__device_stub__dragUnsteadyEPdS0_S0_PiS0_S0_diiiiii
.cfi_startproc
# %bb.0:
subq $216, %rsp
.cfi_def_cfa_offset 224
movq %rdi, 104(%rsp)
movq %rsi, 96(%rsp)
movq %rdx, 88(%rsp)
movq %rcx, 80(%rsp)
movq %r8, 72(%rsp)
movq %r9, 64(%rsp)
movsd %xmm0, 56(%rsp)
leaq 104(%rsp), %rax
movq %rax, 112(%rsp)
leaq 96(%rsp), %rax
movq %rax, 120(%rsp)
leaq 88(%rsp), %rax
movq %rax, 128(%rsp)
leaq 80(%rsp), %rax
movq %rax, 136(%rsp)
leaq 72(%rsp), %rax
movq %rax, 144(%rsp)
leaq 64(%rsp), %rax
movq %rax, 152(%rsp)
leaq 56(%rsp), %rax
movq %rax, 160(%rsp)
leaq 224(%rsp), %rax
movq %rax, 168(%rsp)
leaq 232(%rsp), %rax
movq %rax, 176(%rsp)
leaq 240(%rsp), %rax
movq %rax, 184(%rsp)
leaq 248(%rsp), %rax
movq %rax, 192(%rsp)
leaq 256(%rsp), %rax
movq %rax, 200(%rsp)
leaq 264(%rsp), %rax
movq %rax, 208(%rsp)
leaq 40(%rsp), %rdi
leaq 24(%rsp), %rsi
leaq 16(%rsp), %rdx
leaq 8(%rsp), %rcx
callq __hipPopCallConfiguration
movq 40(%rsp), %rsi
movl 48(%rsp), %edx
movq 24(%rsp), %rcx
movl 32(%rsp), %r8d
leaq 112(%rsp), %r9
movl $_ZN7kernels12dragUnsteadyEPdS0_S0_PiS0_S0_diiiiii, %edi
pushq 8(%rsp)
.cfi_adjust_cfa_offset 8
pushq 24(%rsp)
.cfi_adjust_cfa_offset 8
callq hipLaunchKernel
addq $232, %rsp
.cfi_adjust_cfa_offset -232
retq
.Lfunc_end2:
.size _ZN7kernels27__device_stub__dragUnsteadyEPdS0_S0_PiS0_S0_diiiiii, .Lfunc_end2-_ZN7kernels27__device_stub__dragUnsteadyEPdS0_S0_PiS0_S0_diiiiii
.cfi_endproc
# -- End function
.globl _ZN7kernels28__device_stub__liftLeftRightEPdS0_dS0_S0_iiiiii # -- Begin function _ZN7kernels28__device_stub__liftLeftRightEPdS0_dS0_S0_iiiiii
.p2align 4, 0x90
.type _ZN7kernels28__device_stub__liftLeftRightEPdS0_dS0_S0_iiiiii,@function
_ZN7kernels28__device_stub__liftLeftRightEPdS0_dS0_S0_iiiiii: # @_ZN7kernels28__device_stub__liftLeftRightEPdS0_dS0_S0_iiiiii
.cfi_startproc
# %bb.0:
subq $184, %rsp
.cfi_def_cfa_offset 192
movq %rdi, 88(%rsp)
movq %rsi, 80(%rsp)
movsd %xmm0, 72(%rsp)
movq %rdx, 64(%rsp)
movq %rcx, 56(%rsp)
movl %r8d, 4(%rsp)
movl %r9d, (%rsp)
leaq 88(%rsp), %rax
movq %rax, 96(%rsp)
leaq 80(%rsp), %rax
movq %rax, 104(%rsp)
leaq 72(%rsp), %rax
movq %rax, 112(%rsp)
leaq 64(%rsp), %rax
movq %rax, 120(%rsp)
leaq 56(%rsp), %rax
movq %rax, 128(%rsp)
leaq 4(%rsp), %rax
movq %rax, 136(%rsp)
movq %rsp, %rax
movq %rax, 144(%rsp)
leaq 192(%rsp), %rax
movq %rax, 152(%rsp)
leaq 200(%rsp), %rax
movq %rax, 160(%rsp)
leaq 208(%rsp), %rax
movq %rax, 168(%rsp)
leaq 216(%rsp), %rax
movq %rax, 176(%rsp)
leaq 40(%rsp), %rdi
leaq 24(%rsp), %rsi
leaq 16(%rsp), %rdx
leaq 8(%rsp), %rcx
callq __hipPopCallConfiguration
movq 40(%rsp), %rsi
movl 48(%rsp), %edx
movq 24(%rsp), %rcx
movl 32(%rsp), %r8d
leaq 96(%rsp), %r9
movl $_ZN7kernels13liftLeftRightEPdS0_dS0_S0_iiiiii, %edi
pushq 8(%rsp)
.cfi_adjust_cfa_offset 8
pushq 24(%rsp)
.cfi_adjust_cfa_offset 8
callq hipLaunchKernel
addq $200, %rsp
.cfi_adjust_cfa_offset -200
retq
.Lfunc_end3:
.size _ZN7kernels28__device_stub__liftLeftRightEPdS0_dS0_S0_iiiiii, .Lfunc_end3-_ZN7kernels28__device_stub__liftLeftRightEPdS0_dS0_S0_iiiiii
.cfi_endproc
# -- End function
.globl _ZN7kernels28__device_stub__liftBottomTopEPdS0_S0_dS0_S0_iiiiii # -- Begin function _ZN7kernels28__device_stub__liftBottomTopEPdS0_S0_dS0_S0_iiiiii
.p2align 4, 0x90
.type _ZN7kernels28__device_stub__liftBottomTopEPdS0_S0_dS0_S0_iiiiii,@function
_ZN7kernels28__device_stub__liftBottomTopEPdS0_S0_dS0_S0_iiiiii: # @_ZN7kernels28__device_stub__liftBottomTopEPdS0_S0_dS0_S0_iiiiii
.cfi_startproc
# %bb.0:
subq $216, %rsp
.cfi_def_cfa_offset 224
movq %rdi, 104(%rsp)
movq %rsi, 96(%rsp)
movq %rdx, 88(%rsp)
movsd %xmm0, 80(%rsp)
movq %rcx, 72(%rsp)
movq %r8, 64(%rsp)
movl %r9d, 12(%rsp)
leaq 104(%rsp), %rax
movq %rax, 112(%rsp)
leaq 96(%rsp), %rax
movq %rax, 120(%rsp)
leaq 88(%rsp), %rax
movq %rax, 128(%rsp)
leaq 80(%rsp), %rax
movq %rax, 136(%rsp)
leaq 72(%rsp), %rax
movq %rax, 144(%rsp)
leaq 64(%rsp), %rax
movq %rax, 152(%rsp)
leaq 12(%rsp), %rax
movq %rax, 160(%rsp)
leaq 224(%rsp), %rax
movq %rax, 168(%rsp)
leaq 232(%rsp), %rax
movq %rax, 176(%rsp)
leaq 240(%rsp), %rax
movq %rax, 184(%rsp)
leaq 248(%rsp), %rax
movq %rax, 192(%rsp)
leaq 256(%rsp), %rax
movq %rax, 200(%rsp)
leaq 48(%rsp), %rdi
leaq 32(%rsp), %rsi
leaq 24(%rsp), %rdx
leaq 16(%rsp), %rcx
callq __hipPopCallConfiguration
movq 48(%rsp), %rsi
movl 56(%rsp), %edx
movq 32(%rsp), %rcx
movl 40(%rsp), %r8d
leaq 112(%rsp), %r9
movl $_ZN7kernels13liftBottomTopEPdS0_S0_dS0_S0_iiiiii, %edi
pushq 16(%rsp)
.cfi_adjust_cfa_offset 8
pushq 32(%rsp)
.cfi_adjust_cfa_offset 8
callq hipLaunchKernel
addq $232, %rsp
.cfi_adjust_cfa_offset -232
retq
.Lfunc_end4:
.size _ZN7kernels28__device_stub__liftBottomTopEPdS0_S0_dS0_S0_iiiiii, .Lfunc_end4-_ZN7kernels28__device_stub__liftBottomTopEPdS0_S0_dS0_S0_iiiiii
.cfi_endproc
# -- End function
.globl _ZN7kernels27__device_stub__liftUnsteadyEPdS0_S0_PiS0_S0_diiiiii # -- Begin function _ZN7kernels27__device_stub__liftUnsteadyEPdS0_S0_PiS0_S0_diiiiii
.p2align 4, 0x90
.type _ZN7kernels27__device_stub__liftUnsteadyEPdS0_S0_PiS0_S0_diiiiii,@function
_ZN7kernels27__device_stub__liftUnsteadyEPdS0_S0_PiS0_S0_diiiiii: # @_ZN7kernels27__device_stub__liftUnsteadyEPdS0_S0_PiS0_S0_diiiiii
.cfi_startproc
# %bb.0:
subq $216, %rsp
.cfi_def_cfa_offset 224
movq %rdi, 104(%rsp)
movq %rsi, 96(%rsp)
movq %rdx, 88(%rsp)
movq %rcx, 80(%rsp)
movq %r8, 72(%rsp)
movq %r9, 64(%rsp)
movsd %xmm0, 56(%rsp)
leaq 104(%rsp), %rax
movq %rax, 112(%rsp)
leaq 96(%rsp), %rax
movq %rax, 120(%rsp)
leaq 88(%rsp), %rax
movq %rax, 128(%rsp)
leaq 80(%rsp), %rax
movq %rax, 136(%rsp)
leaq 72(%rsp), %rax
movq %rax, 144(%rsp)
leaq 64(%rsp), %rax
movq %rax, 152(%rsp)
leaq 56(%rsp), %rax
movq %rax, 160(%rsp)
leaq 224(%rsp), %rax
movq %rax, 168(%rsp)
leaq 232(%rsp), %rax
movq %rax, 176(%rsp)
leaq 240(%rsp), %rax
movq %rax, 184(%rsp)
leaq 248(%rsp), %rax
movq %rax, 192(%rsp)
leaq 256(%rsp), %rax
movq %rax, 200(%rsp)
leaq 264(%rsp), %rax
movq %rax, 208(%rsp)
leaq 40(%rsp), %rdi
leaq 24(%rsp), %rsi
leaq 16(%rsp), %rdx
leaq 8(%rsp), %rcx
callq __hipPopCallConfiguration
movq 40(%rsp), %rsi
movl 48(%rsp), %edx
movq 24(%rsp), %rcx
movl 32(%rsp), %r8d
leaq 112(%rsp), %r9
movl $_ZN7kernels12liftUnsteadyEPdS0_S0_PiS0_S0_diiiiii, %edi
pushq 8(%rsp)
.cfi_adjust_cfa_offset 8
pushq 24(%rsp)
.cfi_adjust_cfa_offset 8
callq hipLaunchKernel
addq $232, %rsp
.cfi_adjust_cfa_offset -232
retq
.Lfunc_end5:
.size _ZN7kernels27__device_stub__liftUnsteadyEPdS0_S0_PiS0_S0_diiiiii, .Lfunc_end5-_ZN7kernels27__device_stub__liftUnsteadyEPdS0_S0_PiS0_S0_diiiiii
.cfi_endproc
# -- End function
.p2align 4, 0x90 # -- Begin function __hip_module_ctor
.type __hip_module_ctor,@function
__hip_module_ctor: # @__hip_module_ctor
.cfi_startproc
# %bb.0:
pushq %rbx
.cfi_def_cfa_offset 16
subq $32, %rsp
.cfi_def_cfa_offset 48
.cfi_offset %rbx, -16
cmpq $0, __hip_gpubin_handle(%rip)
jne .LBB6_2
# %bb.1:
movl $__hip_fatbin_wrapper, %edi
callq __hipRegisterFatBinary
movq %rax, __hip_gpubin_handle(%rip)
.LBB6_2:
movq __hip_gpubin_handle(%rip), %rbx
xorps %xmm0, %xmm0
movups %xmm0, 16(%rsp)
movups %xmm0, (%rsp)
movl $_ZN7kernels13dragLeftRightEPdS0_S0_dS0_S0_iiiiii, %esi
movl $.L__unnamed_1, %edx
movl $.L__unnamed_1, %ecx
movq %rbx, %rdi
movl $-1, %r8d
xorl %r9d, %r9d
callq __hipRegisterFunction
xorps %xmm0, %xmm0
movups %xmm0, 16(%rsp)
movups %xmm0, (%rsp)
movl $_ZN7kernels13dragBottomTopEPdS0_dS0_S0_iiiiii, %esi
movl $.L__unnamed_2, %edx
movl $.L__unnamed_2, %ecx
movq %rbx, %rdi
movl $-1, %r8d
xorl %r9d, %r9d
callq __hipRegisterFunction
xorps %xmm0, %xmm0
movups %xmm0, 16(%rsp)
movups %xmm0, (%rsp)
movl $_ZN7kernels12dragUnsteadyEPdS0_S0_PiS0_S0_diiiiii, %esi
movl $.L__unnamed_3, %edx
movl $.L__unnamed_3, %ecx
movq %rbx, %rdi
movl $-1, %r8d
xorl %r9d, %r9d
callq __hipRegisterFunction
xorps %xmm0, %xmm0
movups %xmm0, 16(%rsp)
movups %xmm0, (%rsp)
movl $_ZN7kernels13liftLeftRightEPdS0_dS0_S0_iiiiii, %esi
movl $.L__unnamed_4, %edx
movl $.L__unnamed_4, %ecx
movq %rbx, %rdi
movl $-1, %r8d
xorl %r9d, %r9d
callq __hipRegisterFunction
xorps %xmm0, %xmm0
movups %xmm0, 16(%rsp)
movups %xmm0, (%rsp)
movl $_ZN7kernels13liftBottomTopEPdS0_S0_dS0_S0_iiiiii, %esi
movl $.L__unnamed_5, %edx
movl $.L__unnamed_5, %ecx
movq %rbx, %rdi
movl $-1, %r8d
xorl %r9d, %r9d
callq __hipRegisterFunction
xorps %xmm0, %xmm0
movups %xmm0, 16(%rsp)
movups %xmm0, (%rsp)
movl $_ZN7kernels12liftUnsteadyEPdS0_S0_PiS0_S0_diiiiii, %esi
movl $.L__unnamed_6, %edx
movl $.L__unnamed_6, %ecx
movq %rbx, %rdi
movl $-1, %r8d
xorl %r9d, %r9d
callq __hipRegisterFunction
movl $__hip_module_dtor, %edi
addq $32, %rsp
.cfi_def_cfa_offset 16
popq %rbx
.cfi_def_cfa_offset 8
jmp atexit # TAILCALL
.Lfunc_end6:
.size __hip_module_ctor, .Lfunc_end6-__hip_module_ctor
.cfi_endproc
# -- End function
.p2align 4, 0x90 # -- Begin function __hip_module_dtor
.type __hip_module_dtor,@function
__hip_module_dtor: # @__hip_module_dtor
.cfi_startproc
# %bb.0:
movq __hip_gpubin_handle(%rip), %rdi
testq %rdi, %rdi
je .LBB7_2
# %bb.1:
pushq %rax
.cfi_def_cfa_offset 16
callq __hipUnregisterFatBinary
movq $0, __hip_gpubin_handle(%rip)
addq $8, %rsp
.cfi_def_cfa_offset 8
.LBB7_2:
retq
.Lfunc_end7:
.size __hip_module_dtor, .Lfunc_end7-__hip_module_dtor
.cfi_endproc
# -- End function
.type _ZN7kernels13dragLeftRightEPdS0_S0_dS0_S0_iiiiii,@object # @_ZN7kernels13dragLeftRightEPdS0_S0_dS0_S0_iiiiii
.section .rodata,"a",@progbits
.globl _ZN7kernels13dragLeftRightEPdS0_S0_dS0_S0_iiiiii
.p2align 3, 0x0
_ZN7kernels13dragLeftRightEPdS0_S0_dS0_S0_iiiiii:
.quad _ZN7kernels28__device_stub__dragLeftRightEPdS0_S0_dS0_S0_iiiiii
.size _ZN7kernels13dragLeftRightEPdS0_S0_dS0_S0_iiiiii, 8
.type _ZN7kernels13dragBottomTopEPdS0_dS0_S0_iiiiii,@object # @_ZN7kernels13dragBottomTopEPdS0_dS0_S0_iiiiii
.globl _ZN7kernels13dragBottomTopEPdS0_dS0_S0_iiiiii
.p2align 3, 0x0
_ZN7kernels13dragBottomTopEPdS0_dS0_S0_iiiiii:
.quad _ZN7kernels28__device_stub__dragBottomTopEPdS0_dS0_S0_iiiiii
.size _ZN7kernels13dragBottomTopEPdS0_dS0_S0_iiiiii, 8
.type _ZN7kernels12dragUnsteadyEPdS0_S0_PiS0_S0_diiiiii,@object # @_ZN7kernels12dragUnsteadyEPdS0_S0_PiS0_S0_diiiiii
.globl _ZN7kernels12dragUnsteadyEPdS0_S0_PiS0_S0_diiiiii
.p2align 3, 0x0
_ZN7kernels12dragUnsteadyEPdS0_S0_PiS0_S0_diiiiii:
.quad _ZN7kernels27__device_stub__dragUnsteadyEPdS0_S0_PiS0_S0_diiiiii
.size _ZN7kernels12dragUnsteadyEPdS0_S0_PiS0_S0_diiiiii, 8
.type _ZN7kernels13liftLeftRightEPdS0_dS0_S0_iiiiii,@object # @_ZN7kernels13liftLeftRightEPdS0_dS0_S0_iiiiii
.globl _ZN7kernels13liftLeftRightEPdS0_dS0_S0_iiiiii
.p2align 3, 0x0
_ZN7kernels13liftLeftRightEPdS0_dS0_S0_iiiiii:
.quad _ZN7kernels28__device_stub__liftLeftRightEPdS0_dS0_S0_iiiiii
.size _ZN7kernels13liftLeftRightEPdS0_dS0_S0_iiiiii, 8
.type _ZN7kernels13liftBottomTopEPdS0_S0_dS0_S0_iiiiii,@object # @_ZN7kernels13liftBottomTopEPdS0_S0_dS0_S0_iiiiii
.globl _ZN7kernels13liftBottomTopEPdS0_S0_dS0_S0_iiiiii
.p2align 3, 0x0
_ZN7kernels13liftBottomTopEPdS0_S0_dS0_S0_iiiiii:
.quad _ZN7kernels28__device_stub__liftBottomTopEPdS0_S0_dS0_S0_iiiiii
.size _ZN7kernels13liftBottomTopEPdS0_S0_dS0_S0_iiiiii, 8
.type _ZN7kernels12liftUnsteadyEPdS0_S0_PiS0_S0_diiiiii,@object # @_ZN7kernels12liftUnsteadyEPdS0_S0_PiS0_S0_diiiiii
.globl _ZN7kernels12liftUnsteadyEPdS0_S0_PiS0_S0_diiiiii
.p2align 3, 0x0
_ZN7kernels12liftUnsteadyEPdS0_S0_PiS0_S0_diiiiii:
.quad _ZN7kernels27__device_stub__liftUnsteadyEPdS0_S0_PiS0_S0_diiiiii
.size _ZN7kernels12liftUnsteadyEPdS0_S0_PiS0_S0_diiiiii, 8
.type .L__unnamed_1,@object # @0
.section .rodata.str1.1,"aMS",@progbits,1
.L__unnamed_1:
.asciz "_ZN7kernels13dragLeftRightEPdS0_S0_dS0_S0_iiiiii"
.size .L__unnamed_1, 49
.type .L__unnamed_2,@object # @1
.L__unnamed_2:
.asciz "_ZN7kernels13dragBottomTopEPdS0_dS0_S0_iiiiii"
.size .L__unnamed_2, 46
.type .L__unnamed_3,@object # @2
.L__unnamed_3:
.asciz "_ZN7kernels12dragUnsteadyEPdS0_S0_PiS0_S0_diiiiii"
.size .L__unnamed_3, 50
.type .L__unnamed_4,@object # @3
.L__unnamed_4:
.asciz "_ZN7kernels13liftLeftRightEPdS0_dS0_S0_iiiiii"
.size .L__unnamed_4, 46
.type .L__unnamed_5,@object # @4
.L__unnamed_5:
.asciz "_ZN7kernels13liftBottomTopEPdS0_S0_dS0_S0_iiiiii"
.size .L__unnamed_5, 49
.type .L__unnamed_6,@object # @5
.L__unnamed_6:
.asciz "_ZN7kernels12liftUnsteadyEPdS0_S0_PiS0_S0_diiiiii"
.size .L__unnamed_6, 50
.type __hip_fatbin_wrapper,@object # @__hip_fatbin_wrapper
.section .hipFatBinSegment,"a",@progbits
.p2align 3, 0x0
__hip_fatbin_wrapper:
.long 1212764230 # 0x48495046
.long 1 # 0x1
.quad __hip_fatbin
.quad 0
.size __hip_fatbin_wrapper, 24
.type __hip_gpubin_handle,@object # @__hip_gpubin_handle
.local __hip_gpubin_handle
.comm __hip_gpubin_handle,8,8
.section .init_array,"aw",@init_array
.p2align 3, 0x0
.quad __hip_module_ctor
.type __hip_cuid_,@object # @__hip_cuid_
.bss
.globl __hip_cuid_
__hip_cuid_:
.byte 0 # 0x0
.size __hip_cuid_, 1
.section ".linker-options","e",@llvm_linker_options
.ident "AMD clang version 18.0.0git (https://github.com/RadeonOpenCompute/llvm-project roc-6.3.2 25012 e5bf7e55c91490b07c49d8960fa7983d864936c4)"
.section ".note.GNU-stack","",@progbits
.addrsig
.addrsig_sym _ZN7kernels28__device_stub__dragLeftRightEPdS0_S0_dS0_S0_iiiiii
.addrsig_sym _ZN7kernels28__device_stub__dragBottomTopEPdS0_dS0_S0_iiiiii
.addrsig_sym _ZN7kernels27__device_stub__dragUnsteadyEPdS0_S0_PiS0_S0_diiiiii
.addrsig_sym _ZN7kernels28__device_stub__liftLeftRightEPdS0_dS0_S0_iiiiii
.addrsig_sym _ZN7kernels28__device_stub__liftBottomTopEPdS0_S0_dS0_S0_iiiiii
.addrsig_sym _ZN7kernels27__device_stub__liftUnsteadyEPdS0_S0_PiS0_S0_diiiiii
.addrsig_sym __hip_module_ctor
.addrsig_sym __hip_module_dtor
.addrsig_sym _ZN7kernels13dragLeftRightEPdS0_S0_dS0_S0_iiiiii
.addrsig_sym _ZN7kernels13dragBottomTopEPdS0_dS0_S0_iiiiii
.addrsig_sym _ZN7kernels12dragUnsteadyEPdS0_S0_PiS0_S0_diiiiii
.addrsig_sym _ZN7kernels13liftLeftRightEPdS0_dS0_S0_iiiiii
.addrsig_sym _ZN7kernels13liftBottomTopEPdS0_S0_dS0_S0_iiiiii
.addrsig_sym _ZN7kernels12liftUnsteadyEPdS0_S0_PiS0_S0_diiiiii
.addrsig_sym __hip_fatbin
.addrsig_sym __hip_fatbin_wrapper
.addrsig_sym __hip_cuid_ |
You are a helpful coding assistant specialized in converting CUDA source code to CUDA device assembly. | #include<stdio.h>
#include<stdlib.h>
__global__ void VecAdd(float *A, float *B, float *C, int N)
{
int i = blockIdx.x * blockDim.x + threadIdx.x;//col
int j = blockIdx.y * blockDim.y + threadIdx.y;//row
int indexOfMatrix = i + j * N;
if(i < N && j < N)
C[indexOfMatrix] = A[indexOfMatrix] + B[indexOfMatrix];
}
void RandomInit(float *data, int n)
{
for(int i = 0; i < n*n; i++)
data[i] = rand()/(float)RAND_MAX;
}
void readValue(int *value, char * msg, int lowerBound, int upperBound)
{
while(true)
{
printf("%s(%d-%d): ", msg, lowerBound, upperBound);
scanf("%d", value);
if(*value <= upperBound && *value >= lowerBound)
return;
}
}
int main()
{
//Have some variables required for loop counters.
int i;
//have variables for threads per block, number of blocks.
int threadsPerBlock = 0, blocksInGrid = 0;
//create cuda event variables
cudaEvent_t hostStart, hostStop, deviceStart, deviceStop;
float timeDifferenceOnHost, timeDifferenceOnDevice;
//program variables
int N = 0;
size_t size; //variable to have the size of arrays on device
//int *matA, *matB, *matC, *matCFromGPU; //matrices for host
float *h_A;
float *h_B;
float *h_C;
float *h_D;
float *d_A;
float *d_B;
float *d_C; //matrices for Device
//initialize cuda timing variables
cudaEventCreate(&hostStart);
cudaEventCreate(&hostStop);
cudaEventCreate(&deviceStart);
cudaEventCreate(&deviceStop);
printf("Enter the size: ");
scanf("%d",&N);
//calculate the size required on GPU
size = N * N * sizeof(float);
h_A = (float*)malloc(size);
h_B = (float*)malloc(size);
h_C = (float*)malloc(size);
RandomInit(h_A,N);
RandomInit(h_B,N);
printf("Adding matrices on CPU...\n");
cudaEventRecord(hostStart, 0);
for(i = 0 ; i < N * N; i ++)
h_C[i] = h_A[i] + h_B[i];
cudaEventRecord(hostStop, 0);
cudaEventElapsedTime(&timeDifferenceOnHost, hostStart, hostStop);
/**printf("Matrix addition over. Time taken on CPU: %5.5f\n", timeDifferenceOnHost);**/
printf("Processing time for CPU: %5.5f (ms)\n",timeDifferenceOnHost);
printf("CPU: %fGflops\n",3*N/(1000000*timeDifferenceOnHost));
cudaMalloc((void**)&d_A,size);
cudaMalloc((void**)&d_B,size);
cudaMalloc((void**)&d_C,size);
cudaMemcpy(d_A,h_A,size,cudaMemcpyHostToDevice);
cudaMemcpy(d_B,h_B,size,cudaMemcpyHostToDevice);
bool done = false;
while(!done)
{
h_D = (float *)malloc(size);
//create a proper grid block using dim3
readValue(&threadsPerBlock, "Enter no. of threads per block(input of 'P' will construct PxP threads in block)", 4, 32);
readValue(&blocksInGrid, "Enter no. of blocks in grid(input of 'P' will construct PxP blocks)", (N + threadsPerBlock -1)/threadsPerBlock, 65535);
printf("Threads Per block: %d, Blocks in grid: %d\n", threadsPerBlock, blocksInGrid);
printf("Adding matrices on GPU..\n");
dim3 blocks(threadsPerBlock, threadsPerBlock);
dim3 grid(blocksInGrid, blocksInGrid); //(matrixSize + threadsPerBlock - 1/blocks.x), (matrixSize + blocks.y - 1/blocks.y));
//call the kernels to execute
cudaEventRecord(deviceStart, 0);
printf("Total linear threads: %d\n", blocksInGrid*threadsPerBlock);
VecAdd<<<grid, blocks>>>(d_A, d_B, d_C, N);
cudaEventRecord(deviceStop, 0);
cudaEventSynchronize(deviceStop);
cudaEventElapsedTime(&timeDifferenceOnDevice, deviceStart, deviceStop);
printf("Processing time for GPU: %5.5f (ms)\n",timeDifferenceOnDevice);
printf("GPU: %fGflops\n",3*N/(1000000*timeDifferenceOnDevice));
//copy the result back into host memory
cudaMemcpy(h_D, d_C, size, cudaMemcpyDeviceToHost);
printf("Speedup: %5.5f\n", (float)timeDifferenceOnHost/timeDifferenceOnDevice);
double sum = 0.;
double diff;
for(int i = 0; i < N * N ; i++){
diff = abs(h_D[i]-h_C[i]);
sum += diff*diff;
}
sum = sqrt(sum);
printf("norm(h_C - h_D)=%20.15e\n\n",sum);
char c = 'n';
printf("Again?(y/n): ");
while(true)
{
c = getchar();
if(c == 'y' || c == 'n')
break;
}
if(c == 'n')
break;
free(h_D);
}
free(h_A);
free(h_B);
free(h_C);
cudaEventDestroy(deviceStart);
cudaEventDestroy(deviceStop);
cudaEventDestroy(hostStart);
cudaEventDestroy(hostStop);
return 0;
} | code for sm_80
Function : _Z6VecAddPfS_S_i
.headerflags @"EF_CUDA_TEXMODE_UNIFIED EF_CUDA_64BIT_ADDRESS EF_CUDA_SM80 EF_CUDA_VIRTUAL_SM(EF_CUDA_SM80)"
/*0000*/ MOV R1, c[0x0][0x28] ; /* 0x00000a0000017a02 */
/* 0x000fe40000000f00 */
/*0010*/ S2R R3, SR_CTAID.Y ; /* 0x0000000000037919 */
/* 0x000e280000002600 */
/*0020*/ S2R R2, SR_TID.Y ; /* 0x0000000000027919 */
/* 0x000e280000002200 */
/*0030*/ S2R R0, SR_CTAID.X ; /* 0x0000000000007919 */
/* 0x000e680000002500 */
/*0040*/ S2R R5, SR_TID.X ; /* 0x0000000000057919 */
/* 0x000e620000002100 */
/*0050*/ IMAD R3, R3, c[0x0][0x4], R2 ; /* 0x0000010003037a24 */
/* 0x001fca00078e0202 */
/*0060*/ ISETP.GE.AND P0, PT, R3, c[0x0][0x178], PT ; /* 0x00005e0003007a0c */
/* 0x000fe20003f06270 */
/*0070*/ IMAD R0, R0, c[0x0][0x0], R5 ; /* 0x0000000000007a24 */
/* 0x002fca00078e0205 */
/*0080*/ ISETP.GE.OR P0, PT, R0, c[0x0][0x178], P0 ; /* 0x00005e0000007a0c */
/* 0x000fda0000706670 */
/*0090*/ @P0 EXIT ; /* 0x000000000000094d */
/* 0x000fea0003800000 */
/*00a0*/ HFMA2.MMA R7, -RZ, RZ, 0, 2.384185791015625e-07 ; /* 0x00000004ff077435 */
/* 0x000fe200000001ff */
/*00b0*/ IMAD R0, R3, c[0x0][0x178], R0 ; /* 0x00005e0003007a24 */
/* 0x000fe200078e0200 */
/*00c0*/ ULDC.64 UR4, c[0x0][0x118] ; /* 0x0000460000047ab9 */
/* 0x000fd00000000a00 */
/*00d0*/ IMAD.WIDE R4, R0, R7, c[0x0][0x168] ; /* 0x00005a0000047625 */
/* 0x000fc800078e0207 */
/*00e0*/ IMAD.WIDE R2, R0.reuse, R7.reuse, c[0x0][0x160] ; /* 0x0000580000027625 */
/* 0x0c0fe400078e0207 */
/*00f0*/ LDG.E R4, [R4.64] ; /* 0x0000000404047981 */
/* 0x000ea8000c1e1900 */
/*0100*/ LDG.E R3, [R2.64] ; /* 0x0000000402037981 */
/* 0x000ea2000c1e1900 */
/*0110*/ IMAD.WIDE R6, R0, R7, c[0x0][0x170] ; /* 0x00005c0000067625 */
/* 0x000fc800078e0207 */
/*0120*/ FADD R9, R4, R3 ; /* 0x0000000304097221 */
/* 0x004fca0000000000 */
/*0130*/ STG.E [R6.64], R9 ; /* 0x0000000906007986 */
/* 0x000fe2000c101904 */
/*0140*/ EXIT ; /* 0x000000000000794d */
/* 0x000fea0003800000 */
/*0150*/ BRA 0x150; /* 0xfffffff000007947 */
/* 0x000fc0000383ffff */
/*0160*/ NOP; /* 0x0000000000007918 */
/* 0x000fc00000000000 */
/*0170*/ NOP; /* 0x0000000000007918 */
/* 0x000fc00000000000 */
/*0180*/ NOP; /* 0x0000000000007918 */
/* 0x000fc00000000000 */
/*0190*/ NOP; /* 0x0000000000007918 */
/* 0x000fc00000000000 */
/*01a0*/ NOP; /* 0x0000000000007918 */
/* 0x000fc00000000000 */
/*01b0*/ NOP; /* 0x0000000000007918 */
/* 0x000fc00000000000 */
/*01c0*/ NOP; /* 0x0000000000007918 */
/* 0x000fc00000000000 */
/*01d0*/ NOP; /* 0x0000000000007918 */
/* 0x000fc00000000000 */
/*01e0*/ NOP; /* 0x0000000000007918 */
/* 0x000fc00000000000 */
/*01f0*/ NOP; /* 0x0000000000007918 */
/* 0x000fc00000000000 */
.......... |
You are a helpful coding assistant specialized in converting CUDA source code to CUDA host assembly. | #include<stdio.h>
#include<stdlib.h>
__global__ void VecAdd(float *A, float *B, float *C, int N)
{
int i = blockIdx.x * blockDim.x + threadIdx.x;//col
int j = blockIdx.y * blockDim.y + threadIdx.y;//row
int indexOfMatrix = i + j * N;
if(i < N && j < N)
C[indexOfMatrix] = A[indexOfMatrix] + B[indexOfMatrix];
}
void RandomInit(float *data, int n)
{
for(int i = 0; i < n*n; i++)
data[i] = rand()/(float)RAND_MAX;
}
void readValue(int *value, char * msg, int lowerBound, int upperBound)
{
while(true)
{
printf("%s(%d-%d): ", msg, lowerBound, upperBound);
scanf("%d", value);
if(*value <= upperBound && *value >= lowerBound)
return;
}
}
int main()
{
//Have some variables required for loop counters.
int i;
//have variables for threads per block, number of blocks.
int threadsPerBlock = 0, blocksInGrid = 0;
//create cuda event variables
cudaEvent_t hostStart, hostStop, deviceStart, deviceStop;
float timeDifferenceOnHost, timeDifferenceOnDevice;
//program variables
int N = 0;
size_t size; //variable to have the size of arrays on device
//int *matA, *matB, *matC, *matCFromGPU; //matrices for host
float *h_A;
float *h_B;
float *h_C;
float *h_D;
float *d_A;
float *d_B;
float *d_C; //matrices for Device
//initialize cuda timing variables
cudaEventCreate(&hostStart);
cudaEventCreate(&hostStop);
cudaEventCreate(&deviceStart);
cudaEventCreate(&deviceStop);
printf("Enter the size: ");
scanf("%d",&N);
//calculate the size required on GPU
size = N * N * sizeof(float);
h_A = (float*)malloc(size);
h_B = (float*)malloc(size);
h_C = (float*)malloc(size);
RandomInit(h_A,N);
RandomInit(h_B,N);
printf("Adding matrices on CPU...\n");
cudaEventRecord(hostStart, 0);
for(i = 0 ; i < N * N; i ++)
h_C[i] = h_A[i] + h_B[i];
cudaEventRecord(hostStop, 0);
cudaEventElapsedTime(&timeDifferenceOnHost, hostStart, hostStop);
/**printf("Matrix addition over. Time taken on CPU: %5.5f\n", timeDifferenceOnHost);**/
printf("Processing time for CPU: %5.5f (ms)\n",timeDifferenceOnHost);
printf("CPU: %fGflops\n",3*N/(1000000*timeDifferenceOnHost));
cudaMalloc((void**)&d_A,size);
cudaMalloc((void**)&d_B,size);
cudaMalloc((void**)&d_C,size);
cudaMemcpy(d_A,h_A,size,cudaMemcpyHostToDevice);
cudaMemcpy(d_B,h_B,size,cudaMemcpyHostToDevice);
bool done = false;
while(!done)
{
h_D = (float *)malloc(size);
//create a proper grid block using dim3
readValue(&threadsPerBlock, "Enter no. of threads per block(input of 'P' will construct PxP threads in block)", 4, 32);
readValue(&blocksInGrid, "Enter no. of blocks in grid(input of 'P' will construct PxP blocks)", (N + threadsPerBlock -1)/threadsPerBlock, 65535);
printf("Threads Per block: %d, Blocks in grid: %d\n", threadsPerBlock, blocksInGrid);
printf("Adding matrices on GPU..\n");
dim3 blocks(threadsPerBlock, threadsPerBlock);
dim3 grid(blocksInGrid, blocksInGrid); //(matrixSize + threadsPerBlock - 1/blocks.x), (matrixSize + blocks.y - 1/blocks.y));
//call the kernels to execute
cudaEventRecord(deviceStart, 0);
printf("Total linear threads: %d\n", blocksInGrid*threadsPerBlock);
VecAdd<<<grid, blocks>>>(d_A, d_B, d_C, N);
cudaEventRecord(deviceStop, 0);
cudaEventSynchronize(deviceStop);
cudaEventElapsedTime(&timeDifferenceOnDevice, deviceStart, deviceStop);
printf("Processing time for GPU: %5.5f (ms)\n",timeDifferenceOnDevice);
printf("GPU: %fGflops\n",3*N/(1000000*timeDifferenceOnDevice));
//copy the result back into host memory
cudaMemcpy(h_D, d_C, size, cudaMemcpyDeviceToHost);
printf("Speedup: %5.5f\n", (float)timeDifferenceOnHost/timeDifferenceOnDevice);
double sum = 0.;
double diff;
for(int i = 0; i < N * N ; i++){
diff = abs(h_D[i]-h_C[i]);
sum += diff*diff;
}
sum = sqrt(sum);
printf("norm(h_C - h_D)=%20.15e\n\n",sum);
char c = 'n';
printf("Again?(y/n): ");
while(true)
{
c = getchar();
if(c == 'y' || c == 'n')
break;
}
if(c == 'n')
break;
free(h_D);
}
free(h_A);
free(h_B);
free(h_C);
cudaEventDestroy(deviceStart);
cudaEventDestroy(deviceStop);
cudaEventDestroy(hostStart);
cudaEventDestroy(hostStop);
return 0;
} | .file "tmpxft_000420eb_00000000-6_Ch2.cudafe1.cpp"
.text
#APP
#NO_APP
.type _ZL26__cudaUnregisterBinaryUtilv, @function
_ZL26__cudaUnregisterBinaryUtilv:
.LFB2062:
.cfi_startproc
endbr64
subq $8, %rsp
.cfi_def_cfa_offset 16
movq _ZL20__cudaFatCubinHandle(%rip), %rdi
call __cudaUnregisterFatBinary@PLT
addq $8, %rsp
.cfi_def_cfa_offset 8
ret
.cfi_endproc
.LFE2062:
.size _ZL26__cudaUnregisterBinaryUtilv, .-_ZL26__cudaUnregisterBinaryUtilv
.globl _Z10RandomInitPfi
.type _Z10RandomInitPfi, @function
_Z10RandomInitPfi:
.LFB2057:
.cfi_startproc
endbr64
imull %esi, %esi
testl %esi, %esi
jle .L8
pushq %rbp
.cfi_def_cfa_offset 16
.cfi_offset 6, -16
pushq %rbx
.cfi_def_cfa_offset 24
.cfi_offset 3, -24
subq $8, %rsp
.cfi_def_cfa_offset 32
movq %rdi, %rbx
movslq %esi, %rsi
leaq (%rdi,%rsi,4), %rbp
.L5:
call rand@PLT
pxor %xmm0, %xmm0
cvtsi2ssl %eax, %xmm0
mulss .LC0(%rip), %xmm0
movss %xmm0, (%rbx)
addq $4, %rbx
cmpq %rbp, %rbx
jne .L5
addq $8, %rsp
.cfi_def_cfa_offset 24
popq %rbx
.cfi_def_cfa_offset 16
popq %rbp
.cfi_def_cfa_offset 8
ret
.L8:
.cfi_restore 3
.cfi_restore 6
ret
.cfi_endproc
.LFE2057:
.size _Z10RandomInitPfi, .-_Z10RandomInitPfi
.section .rodata.str1.1,"aMS",@progbits,1
.LC1:
.string "%s(%d-%d): "
.LC2:
.string "%d"
.text
.globl _Z9readValuePiPcii
.type _Z9readValuePiPcii, @function
_Z9readValuePiPcii:
.LFB2058:
.cfi_startproc
endbr64
pushq %r15
.cfi_def_cfa_offset 16
.cfi_offset 15, -16
pushq %r14
.cfi_def_cfa_offset 24
.cfi_offset 14, -24
pushq %r13
.cfi_def_cfa_offset 32
.cfi_offset 13, -32
pushq %r12
.cfi_def_cfa_offset 40
.cfi_offset 12, -40
pushq %rbp
.cfi_def_cfa_offset 48
.cfi_offset 6, -48
pushq %rbx
.cfi_def_cfa_offset 56
.cfi_offset 3, -56
subq $8, %rsp
.cfi_def_cfa_offset 64
movq %rdi, %rbp
movq %rsi, %r13
movl %edx, %ebx
movl %ecx, %r12d
leaq .LC1(%rip), %r15
leaq .LC2(%rip), %r14
.L13:
movl %r12d, %r8d
movl %ebx, %ecx
movq %r13, %rdx
movq %r15, %rsi
movl $2, %edi
movl $0, %eax
call __printf_chk@PLT
movq %rbp, %rsi
movq %r14, %rdi
movl $0, %eax
call __isoc23_scanf@PLT
movl 0(%rbp), %eax
cmpl %ebx, %eax
jl .L13
cmpl %r12d, %eax
jg .L13
addq $8, %rsp
.cfi_def_cfa_offset 56
popq %rbx
.cfi_def_cfa_offset 48
popq %rbp
.cfi_def_cfa_offset 40
popq %r12
.cfi_def_cfa_offset 32
popq %r13
.cfi_def_cfa_offset 24
popq %r14
.cfi_def_cfa_offset 16
popq %r15
.cfi_def_cfa_offset 8
ret
.cfi_endproc
.LFE2058:
.size _Z9readValuePiPcii, .-_Z9readValuePiPcii
.globl _Z30__device_stub__Z6VecAddPfS_S_iPfS_S_i
.type _Z30__device_stub__Z6VecAddPfS_S_iPfS_S_i, @function
_Z30__device_stub__Z6VecAddPfS_S_iPfS_S_i:
.LFB2084:
.cfi_startproc
endbr64
subq $152, %rsp
.cfi_def_cfa_offset 160
movq %rdi, 24(%rsp)
movq %rsi, 16(%rsp)
movq %rdx, 8(%rsp)
movl %ecx, 4(%rsp)
movq %fs:40, %rax
movq %rax, 136(%rsp)
xorl %eax, %eax
leaq 24(%rsp), %rax
movq %rax, 96(%rsp)
leaq 16(%rsp), %rax
movq %rax, 104(%rsp)
leaq 8(%rsp), %rax
movq %rax, 112(%rsp)
leaq 4(%rsp), %rax
movq %rax, 120(%rsp)
movl $1, 48(%rsp)
movl $1, 52(%rsp)
movl $1, 56(%rsp)
movl $1, 60(%rsp)
movl $1, 64(%rsp)
movl $1, 68(%rsp)
leaq 40(%rsp), %rcx
leaq 32(%rsp), %rdx
leaq 60(%rsp), %rsi
leaq 48(%rsp), %rdi
call __cudaPopCallConfiguration@PLT
testl %eax, %eax
je .L19
.L15:
movq 136(%rsp), %rax
subq %fs:40, %rax
jne .L20
addq $152, %rsp
.cfi_remember_state
.cfi_def_cfa_offset 8
ret
.L19:
.cfi_restore_state
pushq 40(%rsp)
.cfi_def_cfa_offset 168
pushq 40(%rsp)
.cfi_def_cfa_offset 176
leaq 112(%rsp), %r9
movq 76(%rsp), %rcx
movl 84(%rsp), %r8d
movq 64(%rsp), %rsi
movl 72(%rsp), %edx
leaq _Z6VecAddPfS_S_i(%rip), %rdi
call cudaLaunchKernel@PLT
addq $16, %rsp
.cfi_def_cfa_offset 160
jmp .L15
.L20:
call __stack_chk_fail@PLT
.cfi_endproc
.LFE2084:
.size _Z30__device_stub__Z6VecAddPfS_S_iPfS_S_i, .-_Z30__device_stub__Z6VecAddPfS_S_iPfS_S_i
.globl _Z6VecAddPfS_S_i
.type _Z6VecAddPfS_S_i, @function
_Z6VecAddPfS_S_i:
.LFB2085:
.cfi_startproc
endbr64
subq $8, %rsp
.cfi_def_cfa_offset 16
call _Z30__device_stub__Z6VecAddPfS_S_iPfS_S_i
addq $8, %rsp
.cfi_def_cfa_offset 8
ret
.cfi_endproc
.LFE2085:
.size _Z6VecAddPfS_S_i, .-_Z6VecAddPfS_S_i
.section .rodata.str1.1
.LC4:
.string "Enter the size: "
.LC5:
.string "Adding matrices on CPU...\n"
.section .rodata.str1.8,"aMS",@progbits,1
.align 8
.LC6:
.string "Processing time for CPU: %5.5f (ms)\n"
.section .rodata.str1.1
.LC8:
.string "CPU: %fGflops\n"
.section .rodata.str1.8
.align 8
.LC9:
.string "Processing time for GPU: %5.5f (ms)\n"
.section .rodata.str1.1
.LC10:
.string "GPU: %fGflops\n"
.LC11:
.string "Speedup: %5.5f\n"
.LC13:
.string "norm(h_C - h_D)=%20.15e\n\n"
.LC14:
.string "Again?(y/n): "
.section .rodata.str1.8
.align 8
.LC15:
.string "Enter no. of threads per block(input of 'P' will construct PxP threads in block)"
.align 8
.LC16:
.string "Enter no. of blocks in grid(input of 'P' will construct PxP blocks)"
.align 8
.LC17:
.string "Threads Per block: %d, Blocks in grid: %d\n"
.section .rodata.str1.1
.LC18:
.string "Adding matrices on GPU..\n"
.LC19:
.string "Total linear threads: %d\n"
.text
.globl main
.type main, @function
main:
.LFB2059:
.cfi_startproc
endbr64
pushq %r15
.cfi_def_cfa_offset 16
.cfi_offset 15, -16
pushq %r14
.cfi_def_cfa_offset 24
.cfi_offset 14, -24
pushq %r13
.cfi_def_cfa_offset 32
.cfi_offset 13, -32
pushq %r12
.cfi_def_cfa_offset 40
.cfi_offset 12, -40
pushq %rbp
.cfi_def_cfa_offset 48
.cfi_offset 6, -48
pushq %rbx
.cfi_def_cfa_offset 56
.cfi_offset 3, -56
subq $120, %rsp
.cfi_def_cfa_offset 176
movq %fs:40, %rax
movq %rax, 104(%rsp)
xorl %eax, %eax
movl $0, 4(%rsp)
movl $0, 8(%rsp)
movl $0, 20(%rsp)
leaq 24(%rsp), %rdi
call cudaEventCreate@PLT
leaq 32(%rsp), %rdi
call cudaEventCreate@PLT
leaq 40(%rsp), %rdi
call cudaEventCreate@PLT
leaq 48(%rsp), %rdi
call cudaEventCreate@PLT
leaq .LC4(%rip), %rsi
movl $2, %edi
movl $0, %eax
call __printf_chk@PLT
leaq 20(%rsp), %rsi
leaq .LC2(%rip), %rdi
movl $0, %eax
call __isoc23_scanf@PLT
movl 20(%rsp), %ebx
movl %ebx, %r12d
imull %ebx, %r12d
movslq %r12d, %r12
salq $2, %r12
movq %r12, %rdi
call malloc@PLT
movq %rax, %r14
movq %r12, %rdi
call malloc@PLT
movq %rax, %r13
movq %r12, %rdi
call malloc@PLT
movq %rax, %rbp
movl %ebx, %esi
movq %r14, %rdi
call _Z10RandomInitPfi
movl 20(%rsp), %esi
movq %r13, %rdi
call _Z10RandomInitPfi
leaq .LC5(%rip), %rsi
movl $2, %edi
movl $0, %eax
call __printf_chk@PLT
movl $0, %esi
movq 24(%rsp), %rdi
call cudaEventRecord@PLT
movl 20(%rsp), %eax
imull %eax, %eax
testl %eax, %eax
jle .L24
cltq
leaq 0(,%rax,4), %rdx
movl $0, %eax
.L25:
movss (%r14,%rax), %xmm0
addss 0(%r13,%rax), %xmm0
movss %xmm0, 0(%rbp,%rax)
addq $4, %rax
cmpq %rax, %rdx
jne .L25
.L24:
movl $0, %esi
movq 32(%rsp), %rdi
call cudaEventRecord@PLT
leaq 12(%rsp), %rdi
movq 32(%rsp), %rdx
movq 24(%rsp), %rsi
call cudaEventElapsedTime@PLT
pxor %xmm0, %xmm0
cvtss2sd 12(%rsp), %xmm0
leaq .LC6(%rip), %rsi
movl $2, %edi
movl $1, %eax
call __printf_chk@PLT
movl 20(%rsp), %eax
leal (%rax,%rax,2), %eax
pxor %xmm0, %xmm0
cvtsi2ssl %eax, %xmm0
movss .LC7(%rip), %xmm1
mulss 12(%rsp), %xmm1
divss %xmm1, %xmm0
cvtss2sd %xmm0, %xmm0
leaq .LC8(%rip), %rsi
movl $2, %edi
movl $1, %eax
call __printf_chk@PLT
leaq 56(%rsp), %rdi
movq %r12, %rsi
call cudaMalloc@PLT
leaq 64(%rsp), %rdi
movq %r12, %rsi
call cudaMalloc@PLT
leaq 72(%rsp), %rdi
movq %r12, %rsi
call cudaMalloc@PLT
movl $1, %ecx
movq %r12, %rdx
movq %r14, %rsi
movq 56(%rsp), %rdi
call cudaMemcpy@PLT
movl $1, %ecx
movq %r12, %rdx
movq %r13, %rsi
movq 64(%rsp), %rdi
call cudaMemcpy@PLT
leaq .LC15(%rip), %r15
jmp .L26
.L47:
movl 20(%rsp), %ecx
movq 72(%rsp), %rdx
movq 64(%rsp), %rsi
movq 56(%rsp), %rdi
call _Z30__device_stub__Z6VecAddPfS_S_iPfS_S_i
jmp .L35
.L38:
pxor %xmm0, %xmm0
jmp .L27
.L48:
call sqrt@PLT
jmp .L31
.L39:
cmpb $110, %al
je .L34
movq %rbx, %rdi
call free@PLT
.L26:
movq %r12, %rdi
call malloc@PLT
movq %rax, %rbx
leaq 4(%rsp), %rdi
movl $32, %ecx
movl $4, %edx
movq %r15, %rsi
call _Z9readValuePiPcii
movl 4(%rsp), %ecx
movl %ecx, %eax
addl 20(%rsp), %eax
subl $1, %eax
cltd
idivl %ecx
leaq 8(%rsp), %rdi
movl $65535, %ecx
movl %eax, %edx
leaq .LC16(%rip), %rsi
call _Z9readValuePiPcii
movl 8(%rsp), %ecx
movl 4(%rsp), %edx
leaq .LC17(%rip), %rsi
movl $2, %edi
movl $0, %eax
call __printf_chk@PLT
leaq .LC18(%rip), %rsi
movl $2, %edi
movl $0, %eax
call __printf_chk@PLT
movl 4(%rsp), %eax
movl %eax, 80(%rsp)
movl %eax, 84(%rsp)
movl $1, 88(%rsp)
movl 8(%rsp), %eax
movl %eax, 92(%rsp)
movl %eax, 96(%rsp)
movl $1, 100(%rsp)
movl $0, %esi
movq 40(%rsp), %rdi
call cudaEventRecord@PLT
movl 8(%rsp), %edx
imull 4(%rsp), %edx
leaq .LC19(%rip), %rsi
movl $2, %edi
movl $0, %eax
call __printf_chk@PLT
movl 88(%rsp), %ecx
movl $0, %r9d
movl $0, %r8d
movq 80(%rsp), %rdx
movq 92(%rsp), %rdi
movl 100(%rsp), %esi
call __cudaPushCallConfiguration@PLT
testl %eax, %eax
je .L47
.L35:
movl $0, %esi
movq 48(%rsp), %rdi
call cudaEventRecord@PLT
movq 48(%rsp), %rdi
call cudaEventSynchronize@PLT
leaq 16(%rsp), %rdi
movq 48(%rsp), %rdx
movq 40(%rsp), %rsi
call cudaEventElapsedTime@PLT
pxor %xmm0, %xmm0
cvtss2sd 16(%rsp), %xmm0
leaq .LC9(%rip), %rsi
movl $2, %edi
movl $1, %eax
call __printf_chk@PLT
movl 20(%rsp), %eax
leal (%rax,%rax,2), %eax
pxor %xmm0, %xmm0
cvtsi2ssl %eax, %xmm0
movss .LC7(%rip), %xmm1
mulss 16(%rsp), %xmm1
divss %xmm1, %xmm0
cvtss2sd %xmm0, %xmm0
leaq .LC10(%rip), %rsi
movl $2, %edi
movl $1, %eax
call __printf_chk@PLT
movl $2, %ecx
movq %r12, %rdx
movq 72(%rsp), %rsi
movq %rbx, %rdi
call cudaMemcpy@PLT
movss 12(%rsp), %xmm0
divss 16(%rsp), %xmm0
cvtss2sd %xmm0, %xmm0
leaq .LC11(%rip), %rsi
movl $2, %edi
movl $1, %eax
call __printf_chk@PLT
movl 20(%rsp), %edx
imull %edx, %edx
testl %edx, %edx
jle .L38
movslq %edx, %rdx
salq $2, %rdx
movl $0, %eax
pxor %xmm0, %xmm0
.L28:
movss (%rbx,%rax), %xmm1
subss 0(%rbp,%rax), %xmm1
andps .LC12(%rip), %xmm1
cvtss2sd %xmm1, %xmm1
mulsd %xmm1, %xmm1
addsd %xmm1, %xmm0
addq $4, %rax
cmpq %rdx, %rax
jne .L28
pxor %xmm1, %xmm1
ucomisd %xmm0, %xmm1
ja .L48
.L27:
sqrtsd %xmm0, %xmm0
.L31:
leaq .LC13(%rip), %rsi
movl $2, %edi
movl $1, %eax
call __printf_chk@PLT
leaq .LC14(%rip), %rsi
movl $2, %edi
movl $0, %eax
call __printf_chk@PLT
.L32:
movq stdin(%rip), %rdi
call getc@PLT
cmpb $121, %al
je .L39
cmpb $110, %al
jne .L32
jmp .L39
.L34:
movq %r14, %rdi
call free@PLT
movq %r13, %rdi
call free@PLT
movq %rbp, %rdi
call free@PLT
movq 40(%rsp), %rdi
call cudaEventDestroy@PLT
movq 48(%rsp), %rdi
call cudaEventDestroy@PLT
movq 24(%rsp), %rdi
call cudaEventDestroy@PLT
movq 32(%rsp), %rdi
call cudaEventDestroy@PLT
movq 104(%rsp), %rax
subq %fs:40, %rax
jne .L49
movl $0, %eax
addq $120, %rsp
.cfi_remember_state
.cfi_def_cfa_offset 56
popq %rbx
.cfi_def_cfa_offset 48
popq %rbp
.cfi_def_cfa_offset 40
popq %r12
.cfi_def_cfa_offset 32
popq %r13
.cfi_def_cfa_offset 24
popq %r14
.cfi_def_cfa_offset 16
popq %r15
.cfi_def_cfa_offset 8
ret
.L49:
.cfi_restore_state
call __stack_chk_fail@PLT
.cfi_endproc
.LFE2059:
.size main, .-main
.section .rodata.str1.1
.LC20:
.string "_Z6VecAddPfS_S_i"
.text
.type _ZL24__sti____cudaRegisterAllv, @function
_ZL24__sti____cudaRegisterAllv:
.LFB2087:
.cfi_startproc
endbr64
subq $8, %rsp
.cfi_def_cfa_offset 16
leaq _ZL15__fatDeviceText(%rip), %rdi
call __cudaRegisterFatBinary@PLT
movq %rax, %rdi
movq %rax, _ZL20__cudaFatCubinHandle(%rip)
pushq $0
.cfi_def_cfa_offset 24
pushq $0
.cfi_def_cfa_offset 32
pushq $0
.cfi_def_cfa_offset 40
pushq $0
.cfi_def_cfa_offset 48
movl $0, %r9d
movl $-1, %r8d
leaq .LC20(%rip), %rdx
movq %rdx, %rcx
leaq _Z6VecAddPfS_S_i(%rip), %rsi
call __cudaRegisterFunction@PLT
addq $32, %rsp
.cfi_def_cfa_offset 16
movq _ZL20__cudaFatCubinHandle(%rip), %rdi
call __cudaRegisterFatBinaryEnd@PLT
leaq _ZL26__cudaUnregisterBinaryUtilv(%rip), %rdi
call atexit@PLT
addq $8, %rsp
.cfi_def_cfa_offset 8
ret
.cfi_endproc
.LFE2087:
.size _ZL24__sti____cudaRegisterAllv, .-_ZL24__sti____cudaRegisterAllv
.section .init_array,"aw"
.align 8
.quad _ZL24__sti____cudaRegisterAllv
.section .nvFatBinSegment,"aw"
.align 8
.type _ZL15__fatDeviceText, @object
.size _ZL15__fatDeviceText, 24
_ZL15__fatDeviceText:
.long 1180844977
.long 1
.quad fatbinData
.quad 0
.local _ZL20__cudaFatCubinHandle
.comm _ZL20__cudaFatCubinHandle,8,8
.section .rodata.cst4,"aM",@progbits,4
.align 4
.LC0:
.long 805306368
.align 4
.LC7:
.long 1232348160
.section .rodata.cst16,"aM",@progbits,16
.align 16
.LC12:
.long 2147483647
.long 0
.long 0
.long 0
.ident "GCC: (Ubuntu 13.3.0-6ubuntu2~24.04) 13.3.0"
.section .note.GNU-stack,"",@progbits
.section .note.gnu.property,"a"
.align 8
.long 1f - 0f
.long 4f - 1f
.long 5
0:
.string "GNU"
1:
.align 8
.long 0xc0000002
.long 3f - 2f
2:
.long 0x3
3:
.align 8
4: |
You are a helpful coding assistant specialized in converting CUDA source code to HIP/AMD source code. | #include<stdio.h>
#include<stdlib.h>
__global__ void VecAdd(float *A, float *B, float *C, int N)
{
int i = blockIdx.x * blockDim.x + threadIdx.x;//col
int j = blockIdx.y * blockDim.y + threadIdx.y;//row
int indexOfMatrix = i + j * N;
if(i < N && j < N)
C[indexOfMatrix] = A[indexOfMatrix] + B[indexOfMatrix];
}
void RandomInit(float *data, int n)
{
for(int i = 0; i < n*n; i++)
data[i] = rand()/(float)RAND_MAX;
}
void readValue(int *value, char * msg, int lowerBound, int upperBound)
{
while(true)
{
printf("%s(%d-%d): ", msg, lowerBound, upperBound);
scanf("%d", value);
if(*value <= upperBound && *value >= lowerBound)
return;
}
}
int main()
{
//Have some variables required for loop counters.
int i;
//have variables for threads per block, number of blocks.
int threadsPerBlock = 0, blocksInGrid = 0;
//create cuda event variables
cudaEvent_t hostStart, hostStop, deviceStart, deviceStop;
float timeDifferenceOnHost, timeDifferenceOnDevice;
//program variables
int N = 0;
size_t size; //variable to have the size of arrays on device
//int *matA, *matB, *matC, *matCFromGPU; //matrices for host
float *h_A;
float *h_B;
float *h_C;
float *h_D;
float *d_A;
float *d_B;
float *d_C; //matrices for Device
//initialize cuda timing variables
cudaEventCreate(&hostStart);
cudaEventCreate(&hostStop);
cudaEventCreate(&deviceStart);
cudaEventCreate(&deviceStop);
printf("Enter the size: ");
scanf("%d",&N);
//calculate the size required on GPU
size = N * N * sizeof(float);
h_A = (float*)malloc(size);
h_B = (float*)malloc(size);
h_C = (float*)malloc(size);
RandomInit(h_A,N);
RandomInit(h_B,N);
printf("Adding matrices on CPU...\n");
cudaEventRecord(hostStart, 0);
for(i = 0 ; i < N * N; i ++)
h_C[i] = h_A[i] + h_B[i];
cudaEventRecord(hostStop, 0);
cudaEventElapsedTime(&timeDifferenceOnHost, hostStart, hostStop);
/**printf("Matrix addition over. Time taken on CPU: %5.5f\n", timeDifferenceOnHost);**/
printf("Processing time for CPU: %5.5f (ms)\n",timeDifferenceOnHost);
printf("CPU: %fGflops\n",3*N/(1000000*timeDifferenceOnHost));
cudaMalloc((void**)&d_A,size);
cudaMalloc((void**)&d_B,size);
cudaMalloc((void**)&d_C,size);
cudaMemcpy(d_A,h_A,size,cudaMemcpyHostToDevice);
cudaMemcpy(d_B,h_B,size,cudaMemcpyHostToDevice);
bool done = false;
while(!done)
{
h_D = (float *)malloc(size);
//create a proper grid block using dim3
readValue(&threadsPerBlock, "Enter no. of threads per block(input of 'P' will construct PxP threads in block)", 4, 32);
readValue(&blocksInGrid, "Enter no. of blocks in grid(input of 'P' will construct PxP blocks)", (N + threadsPerBlock -1)/threadsPerBlock, 65535);
printf("Threads Per block: %d, Blocks in grid: %d\n", threadsPerBlock, blocksInGrid);
printf("Adding matrices on GPU..\n");
dim3 blocks(threadsPerBlock, threadsPerBlock);
dim3 grid(blocksInGrid, blocksInGrid); //(matrixSize + threadsPerBlock - 1/blocks.x), (matrixSize + blocks.y - 1/blocks.y));
//call the kernels to execute
cudaEventRecord(deviceStart, 0);
printf("Total linear threads: %d\n", blocksInGrid*threadsPerBlock);
VecAdd<<<grid, blocks>>>(d_A, d_B, d_C, N);
cudaEventRecord(deviceStop, 0);
cudaEventSynchronize(deviceStop);
cudaEventElapsedTime(&timeDifferenceOnDevice, deviceStart, deviceStop);
printf("Processing time for GPU: %5.5f (ms)\n",timeDifferenceOnDevice);
printf("GPU: %fGflops\n",3*N/(1000000*timeDifferenceOnDevice));
//copy the result back into host memory
cudaMemcpy(h_D, d_C, size, cudaMemcpyDeviceToHost);
printf("Speedup: %5.5f\n", (float)timeDifferenceOnHost/timeDifferenceOnDevice);
double sum = 0.;
double diff;
for(int i = 0; i < N * N ; i++){
diff = abs(h_D[i]-h_C[i]);
sum += diff*diff;
}
sum = sqrt(sum);
printf("norm(h_C - h_D)=%20.15e\n\n",sum);
char c = 'n';
printf("Again?(y/n): ");
while(true)
{
c = getchar();
if(c == 'y' || c == 'n')
break;
}
if(c == 'n')
break;
free(h_D);
}
free(h_A);
free(h_B);
free(h_C);
cudaEventDestroy(deviceStart);
cudaEventDestroy(deviceStop);
cudaEventDestroy(hostStart);
cudaEventDestroy(hostStop);
return 0;
} | #include <hip/hip_runtime.h>
#include<stdio.h>
#include<stdlib.h>
__global__ void VecAdd(float *A, float *B, float *C, int N)
{
int i = blockIdx.x * blockDim.x + threadIdx.x;//col
int j = blockIdx.y * blockDim.y + threadIdx.y;//row
int indexOfMatrix = i + j * N;
if(i < N && j < N)
C[indexOfMatrix] = A[indexOfMatrix] + B[indexOfMatrix];
}
void RandomInit(float *data, int n)
{
for(int i = 0; i < n*n; i++)
data[i] = rand()/(float)RAND_MAX;
}
void readValue(int *value, char * msg, int lowerBound, int upperBound)
{
while(true)
{
printf("%s(%d-%d): ", msg, lowerBound, upperBound);
scanf("%d", value);
if(*value <= upperBound && *value >= lowerBound)
return;
}
}
int main()
{
//Have some variables required for loop counters.
int i;
//have variables for threads per block, number of blocks.
int threadsPerBlock = 0, blocksInGrid = 0;
//create cuda event variables
hipEvent_t hostStart, hostStop, deviceStart, deviceStop;
float timeDifferenceOnHost, timeDifferenceOnDevice;
//program variables
int N = 0;
size_t size; //variable to have the size of arrays on device
//int *matA, *matB, *matC, *matCFromGPU; //matrices for host
float *h_A;
float *h_B;
float *h_C;
float *h_D;
float *d_A;
float *d_B;
float *d_C; //matrices for Device
//initialize cuda timing variables
hipEventCreate(&hostStart);
hipEventCreate(&hostStop);
hipEventCreate(&deviceStart);
hipEventCreate(&deviceStop);
printf("Enter the size: ");
scanf("%d",&N);
//calculate the size required on GPU
size = N * N * sizeof(float);
h_A = (float*)malloc(size);
h_B = (float*)malloc(size);
h_C = (float*)malloc(size);
RandomInit(h_A,N);
RandomInit(h_B,N);
printf("Adding matrices on CPU...\n");
hipEventRecord(hostStart, 0);
for(i = 0 ; i < N * N; i ++)
h_C[i] = h_A[i] + h_B[i];
hipEventRecord(hostStop, 0);
hipEventElapsedTime(&timeDifferenceOnHost, hostStart, hostStop);
/**printf("Matrix addition over. Time taken on CPU: %5.5f\n", timeDifferenceOnHost);**/
printf("Processing time for CPU: %5.5f (ms)\n",timeDifferenceOnHost);
printf("CPU: %fGflops\n",3*N/(1000000*timeDifferenceOnHost));
hipMalloc((void**)&d_A,size);
hipMalloc((void**)&d_B,size);
hipMalloc((void**)&d_C,size);
hipMemcpy(d_A,h_A,size,hipMemcpyHostToDevice);
hipMemcpy(d_B,h_B,size,hipMemcpyHostToDevice);
bool done = false;
while(!done)
{
h_D = (float *)malloc(size);
//create a proper grid block using dim3
readValue(&threadsPerBlock, "Enter no. of threads per block(input of 'P' will construct PxP threads in block)", 4, 32);
readValue(&blocksInGrid, "Enter no. of blocks in grid(input of 'P' will construct PxP blocks)", (N + threadsPerBlock -1)/threadsPerBlock, 65535);
printf("Threads Per block: %d, Blocks in grid: %d\n", threadsPerBlock, blocksInGrid);
printf("Adding matrices on GPU..\n");
dim3 blocks(threadsPerBlock, threadsPerBlock);
dim3 grid(blocksInGrid, blocksInGrid); //(matrixSize + threadsPerBlock - 1/blocks.x), (matrixSize + blocks.y - 1/blocks.y));
//call the kernels to execute
hipEventRecord(deviceStart, 0);
printf("Total linear threads: %d\n", blocksInGrid*threadsPerBlock);
VecAdd<<<grid, blocks>>>(d_A, d_B, d_C, N);
hipEventRecord(deviceStop, 0);
hipEventSynchronize(deviceStop);
hipEventElapsedTime(&timeDifferenceOnDevice, deviceStart, deviceStop);
printf("Processing time for GPU: %5.5f (ms)\n",timeDifferenceOnDevice);
printf("GPU: %fGflops\n",3*N/(1000000*timeDifferenceOnDevice));
//copy the result back into host memory
hipMemcpy(h_D, d_C, size, hipMemcpyDeviceToHost);
printf("Speedup: %5.5f\n", (float)timeDifferenceOnHost/timeDifferenceOnDevice);
double sum = 0.;
double diff;
for(int i = 0; i < N * N ; i++){
diff = abs(h_D[i]-h_C[i]);
sum += diff*diff;
}
sum = sqrt(sum);
printf("norm(h_C - h_D)=%20.15e\n\n",sum);
char c = 'n';
printf("Again?(y/n): ");
while(true)
{
c = getchar();
if(c == 'y' || c == 'n')
break;
}
if(c == 'n')
break;
free(h_D);
}
free(h_A);
free(h_B);
free(h_C);
hipEventDestroy(deviceStart);
hipEventDestroy(deviceStop);
hipEventDestroy(hostStart);
hipEventDestroy(hostStop);
return 0;
} |
You are a helpful coding assistant specialized in converting HIP source code to AMD device assembly. | #include <hip/hip_runtime.h>
#include<stdio.h>
#include<stdlib.h>
__global__ void VecAdd(float *A, float *B, float *C, int N)
{
int i = blockIdx.x * blockDim.x + threadIdx.x;//col
int j = blockIdx.y * blockDim.y + threadIdx.y;//row
int indexOfMatrix = i + j * N;
if(i < N && j < N)
C[indexOfMatrix] = A[indexOfMatrix] + B[indexOfMatrix];
}
void RandomInit(float *data, int n)
{
for(int i = 0; i < n*n; i++)
data[i] = rand()/(float)RAND_MAX;
}
void readValue(int *value, char * msg, int lowerBound, int upperBound)
{
while(true)
{
printf("%s(%d-%d): ", msg, lowerBound, upperBound);
scanf("%d", value);
if(*value <= upperBound && *value >= lowerBound)
return;
}
}
int main()
{
//Have some variables required for loop counters.
int i;
//have variables for threads per block, number of blocks.
int threadsPerBlock = 0, blocksInGrid = 0;
//create cuda event variables
hipEvent_t hostStart, hostStop, deviceStart, deviceStop;
float timeDifferenceOnHost, timeDifferenceOnDevice;
//program variables
int N = 0;
size_t size; //variable to have the size of arrays on device
//int *matA, *matB, *matC, *matCFromGPU; //matrices for host
float *h_A;
float *h_B;
float *h_C;
float *h_D;
float *d_A;
float *d_B;
float *d_C; //matrices for Device
//initialize cuda timing variables
hipEventCreate(&hostStart);
hipEventCreate(&hostStop);
hipEventCreate(&deviceStart);
hipEventCreate(&deviceStop);
printf("Enter the size: ");
scanf("%d",&N);
//calculate the size required on GPU
size = N * N * sizeof(float);
h_A = (float*)malloc(size);
h_B = (float*)malloc(size);
h_C = (float*)malloc(size);
RandomInit(h_A,N);
RandomInit(h_B,N);
printf("Adding matrices on CPU...\n");
hipEventRecord(hostStart, 0);
for(i = 0 ; i < N * N; i ++)
h_C[i] = h_A[i] + h_B[i];
hipEventRecord(hostStop, 0);
hipEventElapsedTime(&timeDifferenceOnHost, hostStart, hostStop);
/**printf("Matrix addition over. Time taken on CPU: %5.5f\n", timeDifferenceOnHost);**/
printf("Processing time for CPU: %5.5f (ms)\n",timeDifferenceOnHost);
printf("CPU: %fGflops\n",3*N/(1000000*timeDifferenceOnHost));
hipMalloc((void**)&d_A,size);
hipMalloc((void**)&d_B,size);
hipMalloc((void**)&d_C,size);
hipMemcpy(d_A,h_A,size,hipMemcpyHostToDevice);
hipMemcpy(d_B,h_B,size,hipMemcpyHostToDevice);
bool done = false;
while(!done)
{
h_D = (float *)malloc(size);
//create a proper grid block using dim3
readValue(&threadsPerBlock, "Enter no. of threads per block(input of 'P' will construct PxP threads in block)", 4, 32);
readValue(&blocksInGrid, "Enter no. of blocks in grid(input of 'P' will construct PxP blocks)", (N + threadsPerBlock -1)/threadsPerBlock, 65535);
printf("Threads Per block: %d, Blocks in grid: %d\n", threadsPerBlock, blocksInGrid);
printf("Adding matrices on GPU..\n");
dim3 blocks(threadsPerBlock, threadsPerBlock);
dim3 grid(blocksInGrid, blocksInGrid); //(matrixSize + threadsPerBlock - 1/blocks.x), (matrixSize + blocks.y - 1/blocks.y));
//call the kernels to execute
hipEventRecord(deviceStart, 0);
printf("Total linear threads: %d\n", blocksInGrid*threadsPerBlock);
VecAdd<<<grid, blocks>>>(d_A, d_B, d_C, N);
hipEventRecord(deviceStop, 0);
hipEventSynchronize(deviceStop);
hipEventElapsedTime(&timeDifferenceOnDevice, deviceStart, deviceStop);
printf("Processing time for GPU: %5.5f (ms)\n",timeDifferenceOnDevice);
printf("GPU: %fGflops\n",3*N/(1000000*timeDifferenceOnDevice));
//copy the result back into host memory
hipMemcpy(h_D, d_C, size, hipMemcpyDeviceToHost);
printf("Speedup: %5.5f\n", (float)timeDifferenceOnHost/timeDifferenceOnDevice);
double sum = 0.;
double diff;
for(int i = 0; i < N * N ; i++){
diff = abs(h_D[i]-h_C[i]);
sum += diff*diff;
}
sum = sqrt(sum);
printf("norm(h_C - h_D)=%20.15e\n\n",sum);
char c = 'n';
printf("Again?(y/n): ");
while(true)
{
c = getchar();
if(c == 'y' || c == 'n')
break;
}
if(c == 'n')
break;
free(h_D);
}
free(h_A);
free(h_B);
free(h_C);
hipEventDestroy(deviceStart);
hipEventDestroy(deviceStop);
hipEventDestroy(hostStart);
hipEventDestroy(hostStop);
return 0;
} | .text
.amdgcn_target "amdgcn-amd-amdhsa--gfx1100"
.protected _Z6VecAddPfS_S_i
.globl _Z6VecAddPfS_S_i
.p2align 8
.type _Z6VecAddPfS_S_i,@function
_Z6VecAddPfS_S_i:
s_clause 0x1
s_load_b32 s3, s[0:1], 0x2c
s_load_b32 s2, s[0:1], 0x18
v_and_b32_e32 v2, 0x3ff, v0
v_bfe_u32 v3, v0, 10, 10
s_waitcnt lgkmcnt(0)
s_and_b32 s4, s3, 0xffff
s_lshr_b32 s3, s3, 16
s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_2) | instid1(VALU_DEP_1)
v_mad_u64_u32 v[0:1], null, s14, s4, v[2:3]
v_mad_u64_u32 v[1:2], null, s15, s3, v[3:4]
s_mov_b32 s3, exec_lo
v_max_i32_e32 v2, v0, v1
s_delay_alu instid0(VALU_DEP_1)
v_cmpx_gt_i32_e64 s2, v2
s_cbranch_execz .LBB0_2
s_load_b128 s[4:7], s[0:1], 0x0
v_mad_u64_u32 v[2:3], null, v1, s2, v[0:1]
s_load_b64 s[0:1], s[0:1], 0x10
s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
v_ashrrev_i32_e32 v3, 31, v2
v_lshlrev_b64 v[0:1], 2, v[2:3]
s_waitcnt lgkmcnt(0)
s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_2)
v_add_co_u32 v2, vcc_lo, s4, v0
v_add_co_ci_u32_e32 v3, vcc_lo, s5, v1, vcc_lo
v_add_co_u32 v4, vcc_lo, s6, v0
v_add_co_ci_u32_e32 v5, vcc_lo, s7, v1, vcc_lo
v_add_co_u32 v0, vcc_lo, s0, v0
global_load_b32 v2, v[2:3], off
global_load_b32 v3, v[4:5], off
v_add_co_ci_u32_e32 v1, vcc_lo, s1, v1, vcc_lo
s_waitcnt vmcnt(0)
v_add_f32_e32 v2, v2, v3
global_store_b32 v[0:1], v2, off
.LBB0_2:
s_nop 0
s_sendmsg sendmsg(MSG_DEALLOC_VGPRS)
s_endpgm
.section .rodata,"a",@progbits
.p2align 6, 0x0
.amdhsa_kernel _Z6VecAddPfS_S_i
.amdhsa_group_segment_fixed_size 0
.amdhsa_private_segment_fixed_size 0
.amdhsa_kernarg_size 288
.amdhsa_user_sgpr_count 14
.amdhsa_user_sgpr_dispatch_ptr 0
.amdhsa_user_sgpr_queue_ptr 0
.amdhsa_user_sgpr_kernarg_segment_ptr 1
.amdhsa_user_sgpr_dispatch_id 0
.amdhsa_user_sgpr_private_segment_size 0
.amdhsa_wavefront_size32 1
.amdhsa_uses_dynamic_stack 0
.amdhsa_enable_private_segment 0
.amdhsa_system_sgpr_workgroup_id_x 1
.amdhsa_system_sgpr_workgroup_id_y 1
.amdhsa_system_sgpr_workgroup_id_z 0
.amdhsa_system_sgpr_workgroup_info 0
.amdhsa_system_vgpr_workitem_id 1
.amdhsa_next_free_vgpr 6
.amdhsa_next_free_sgpr 16
.amdhsa_float_round_mode_32 0
.amdhsa_float_round_mode_16_64 0
.amdhsa_float_denorm_mode_32 3
.amdhsa_float_denorm_mode_16_64 3
.amdhsa_dx10_clamp 1
.amdhsa_ieee_mode 1
.amdhsa_fp16_overflow 0
.amdhsa_workgroup_processor_mode 1
.amdhsa_memory_ordered 1
.amdhsa_forward_progress 0
.amdhsa_shared_vgpr_count 0
.amdhsa_exception_fp_ieee_invalid_op 0
.amdhsa_exception_fp_denorm_src 0
.amdhsa_exception_fp_ieee_div_zero 0
.amdhsa_exception_fp_ieee_overflow 0
.amdhsa_exception_fp_ieee_underflow 0
.amdhsa_exception_fp_ieee_inexact 0
.amdhsa_exception_int_div_zero 0
.end_amdhsa_kernel
.text
.Lfunc_end0:
.size _Z6VecAddPfS_S_i, .Lfunc_end0-_Z6VecAddPfS_S_i
.section .AMDGPU.csdata,"",@progbits
.text
.p2alignl 7, 3214868480
.fill 96, 4, 3214868480
.type __hip_cuid_,@object
.section .bss,"aw",@nobits
.globl __hip_cuid_
__hip_cuid_:
.byte 0
.size __hip_cuid_, 1
.ident "AMD clang version 18.0.0git (https://github.com/RadeonOpenCompute/llvm-project roc-6.3.2 25012 e5bf7e55c91490b07c49d8960fa7983d864936c4)"
.section ".note.GNU-stack","",@progbits
.addrsig
.addrsig_sym __hip_cuid_
.amdgpu_metadata
---
amdhsa.kernels:
- .args:
- .address_space: global
.offset: 0
.size: 8
.value_kind: global_buffer
- .address_space: global
.offset: 8
.size: 8
.value_kind: global_buffer
- .address_space: global
.offset: 16
.size: 8
.value_kind: global_buffer
- .offset: 24
.size: 4
.value_kind: by_value
- .offset: 32
.size: 4
.value_kind: hidden_block_count_x
- .offset: 36
.size: 4
.value_kind: hidden_block_count_y
- .offset: 40
.size: 4
.value_kind: hidden_block_count_z
- .offset: 44
.size: 2
.value_kind: hidden_group_size_x
- .offset: 46
.size: 2
.value_kind: hidden_group_size_y
- .offset: 48
.size: 2
.value_kind: hidden_group_size_z
- .offset: 50
.size: 2
.value_kind: hidden_remainder_x
- .offset: 52
.size: 2
.value_kind: hidden_remainder_y
- .offset: 54
.size: 2
.value_kind: hidden_remainder_z
- .offset: 72
.size: 8
.value_kind: hidden_global_offset_x
- .offset: 80
.size: 8
.value_kind: hidden_global_offset_y
- .offset: 88
.size: 8
.value_kind: hidden_global_offset_z
- .offset: 96
.size: 2
.value_kind: hidden_grid_dims
.group_segment_fixed_size: 0
.kernarg_segment_align: 8
.kernarg_segment_size: 288
.language: OpenCL C
.language_version:
- 2
- 0
.max_flat_workgroup_size: 1024
.name: _Z6VecAddPfS_S_i
.private_segment_fixed_size: 0
.sgpr_count: 18
.sgpr_spill_count: 0
.symbol: _Z6VecAddPfS_S_i.kd
.uniform_work_group_size: 1
.uses_dynamic_stack: false
.vgpr_count: 6
.vgpr_spill_count: 0
.wavefront_size: 32
.workgroup_processor_mode: 1
amdhsa.target: amdgcn-amd-amdhsa--gfx1100
amdhsa.version:
- 1
- 2
...
.end_amdgpu_metadata |
You are a helpful coding assistant specialized in converting HIP source code to AMD host assembly. | #include <hip/hip_runtime.h>
#include<stdio.h>
#include<stdlib.h>
__global__ void VecAdd(float *A, float *B, float *C, int N)
{
int i = blockIdx.x * blockDim.x + threadIdx.x;//col
int j = blockIdx.y * blockDim.y + threadIdx.y;//row
int indexOfMatrix = i + j * N;
if(i < N && j < N)
C[indexOfMatrix] = A[indexOfMatrix] + B[indexOfMatrix];
}
void RandomInit(float *data, int n)
{
for(int i = 0; i < n*n; i++)
data[i] = rand()/(float)RAND_MAX;
}
void readValue(int *value, char * msg, int lowerBound, int upperBound)
{
while(true)
{
printf("%s(%d-%d): ", msg, lowerBound, upperBound);
scanf("%d", value);
if(*value <= upperBound && *value >= lowerBound)
return;
}
}
int main()
{
//Have some variables required for loop counters.
int i;
//have variables for threads per block, number of blocks.
int threadsPerBlock = 0, blocksInGrid = 0;
//create cuda event variables
hipEvent_t hostStart, hostStop, deviceStart, deviceStop;
float timeDifferenceOnHost, timeDifferenceOnDevice;
//program variables
int N = 0;
size_t size; //variable to have the size of arrays on device
//int *matA, *matB, *matC, *matCFromGPU; //matrices for host
float *h_A;
float *h_B;
float *h_C;
float *h_D;
float *d_A;
float *d_B;
float *d_C; //matrices for Device
//initialize cuda timing variables
hipEventCreate(&hostStart);
hipEventCreate(&hostStop);
hipEventCreate(&deviceStart);
hipEventCreate(&deviceStop);
printf("Enter the size: ");
scanf("%d",&N);
//calculate the size required on GPU
size = N * N * sizeof(float);
h_A = (float*)malloc(size);
h_B = (float*)malloc(size);
h_C = (float*)malloc(size);
RandomInit(h_A,N);
RandomInit(h_B,N);
printf("Adding matrices on CPU...\n");
hipEventRecord(hostStart, 0);
for(i = 0 ; i < N * N; i ++)
h_C[i] = h_A[i] + h_B[i];
hipEventRecord(hostStop, 0);
hipEventElapsedTime(&timeDifferenceOnHost, hostStart, hostStop);
/**printf("Matrix addition over. Time taken on CPU: %5.5f\n", timeDifferenceOnHost);**/
printf("Processing time for CPU: %5.5f (ms)\n",timeDifferenceOnHost);
printf("CPU: %fGflops\n",3*N/(1000000*timeDifferenceOnHost));
hipMalloc((void**)&d_A,size);
hipMalloc((void**)&d_B,size);
hipMalloc((void**)&d_C,size);
hipMemcpy(d_A,h_A,size,hipMemcpyHostToDevice);
hipMemcpy(d_B,h_B,size,hipMemcpyHostToDevice);
bool done = false;
while(!done)
{
h_D = (float *)malloc(size);
//create a proper grid block using dim3
readValue(&threadsPerBlock, "Enter no. of threads per block(input of 'P' will construct PxP threads in block)", 4, 32);
readValue(&blocksInGrid, "Enter no. of blocks in grid(input of 'P' will construct PxP blocks)", (N + threadsPerBlock -1)/threadsPerBlock, 65535);
printf("Threads Per block: %d, Blocks in grid: %d\n", threadsPerBlock, blocksInGrid);
printf("Adding matrices on GPU..\n");
dim3 blocks(threadsPerBlock, threadsPerBlock);
dim3 grid(blocksInGrid, blocksInGrid); //(matrixSize + threadsPerBlock - 1/blocks.x), (matrixSize + blocks.y - 1/blocks.y));
//call the kernels to execute
hipEventRecord(deviceStart, 0);
printf("Total linear threads: %d\n", blocksInGrid*threadsPerBlock);
VecAdd<<<grid, blocks>>>(d_A, d_B, d_C, N);
hipEventRecord(deviceStop, 0);
hipEventSynchronize(deviceStop);
hipEventElapsedTime(&timeDifferenceOnDevice, deviceStart, deviceStop);
printf("Processing time for GPU: %5.5f (ms)\n",timeDifferenceOnDevice);
printf("GPU: %fGflops\n",3*N/(1000000*timeDifferenceOnDevice));
//copy the result back into host memory
hipMemcpy(h_D, d_C, size, hipMemcpyDeviceToHost);
printf("Speedup: %5.5f\n", (float)timeDifferenceOnHost/timeDifferenceOnDevice);
double sum = 0.;
double diff;
for(int i = 0; i < N * N ; i++){
diff = abs(h_D[i]-h_C[i]);
sum += diff*diff;
}
sum = sqrt(sum);
printf("norm(h_C - h_D)=%20.15e\n\n",sum);
char c = 'n';
printf("Again?(y/n): ");
while(true)
{
c = getchar();
if(c == 'y' || c == 'n')
break;
}
if(c == 'n')
break;
free(h_D);
}
free(h_A);
free(h_B);
free(h_C);
hipEventDestroy(deviceStart);
hipEventDestroy(deviceStop);
hipEventDestroy(hostStart);
hipEventDestroy(hostStop);
return 0;
} | .text
.file "Ch2.hip"
.globl _Z21__device_stub__VecAddPfS_S_i # -- Begin function _Z21__device_stub__VecAddPfS_S_i
.p2align 4, 0x90
.type _Z21__device_stub__VecAddPfS_S_i,@function
_Z21__device_stub__VecAddPfS_S_i: # @_Z21__device_stub__VecAddPfS_S_i
.cfi_startproc
# %bb.0:
subq $120, %rsp
.cfi_def_cfa_offset 128
movq %rdi, 72(%rsp)
movq %rsi, 64(%rsp)
movq %rdx, 56(%rsp)
movl %ecx, 4(%rsp)
leaq 72(%rsp), %rax
movq %rax, 80(%rsp)
leaq 64(%rsp), %rax
movq %rax, 88(%rsp)
leaq 56(%rsp), %rax
movq %rax, 96(%rsp)
leaq 4(%rsp), %rax
movq %rax, 104(%rsp)
leaq 40(%rsp), %rdi
leaq 24(%rsp), %rsi
leaq 16(%rsp), %rdx
leaq 8(%rsp), %rcx
callq __hipPopCallConfiguration
movq 40(%rsp), %rsi
movl 48(%rsp), %edx
movq 24(%rsp), %rcx
movl 32(%rsp), %r8d
leaq 80(%rsp), %r9
movl $_Z6VecAddPfS_S_i, %edi
pushq 8(%rsp)
.cfi_adjust_cfa_offset 8
pushq 24(%rsp)
.cfi_adjust_cfa_offset 8
callq hipLaunchKernel
addq $136, %rsp
.cfi_adjust_cfa_offset -136
retq
.Lfunc_end0:
.size _Z21__device_stub__VecAddPfS_S_i, .Lfunc_end0-_Z21__device_stub__VecAddPfS_S_i
.cfi_endproc
# -- End function
.section .rodata.cst4,"aM",@progbits,4
.p2align 2, 0x0 # -- Begin function _Z10RandomInitPfi
.LCPI1_0:
.long 0x30000000 # float 4.65661287E-10
.text
.globl _Z10RandomInitPfi
.p2align 4, 0x90
.type _Z10RandomInitPfi,@function
_Z10RandomInitPfi: # @_Z10RandomInitPfi
.cfi_startproc
# %bb.0:
testl %esi, %esi
je .LBB1_4
# %bb.1: # %.lr.ph.preheader
pushq %r15
.cfi_def_cfa_offset 16
pushq %r14
.cfi_def_cfa_offset 24
pushq %rbx
.cfi_def_cfa_offset 32
.cfi_offset %rbx, -32
.cfi_offset %r14, -24
.cfi_offset %r15, -16
movl %esi, %ebx
movq %rdi, %r14
imull %ebx, %ebx
cmpl $1, %ebx
adcl $0, %ebx
xorl %r15d, %r15d
.p2align 4, 0x90
.LBB1_2: # %.lr.ph
# =>This Inner Loop Header: Depth=1
callq rand
xorps %xmm0, %xmm0
cvtsi2ss %eax, %xmm0
mulss .LCPI1_0(%rip), %xmm0
movss %xmm0, (%r14,%r15,4)
incq %r15
cmpq %r15, %rbx
jne .LBB1_2
# %bb.3:
popq %rbx
.cfi_def_cfa_offset 24
popq %r14
.cfi_def_cfa_offset 16
popq %r15
.cfi_def_cfa_offset 8
.cfi_restore %rbx
.cfi_restore %r14
.cfi_restore %r15
.LBB1_4: # %._crit_edge
retq
.Lfunc_end1:
.size _Z10RandomInitPfi, .Lfunc_end1-_Z10RandomInitPfi
.cfi_endproc
# -- End function
.globl _Z9readValuePiPcii # -- Begin function _Z9readValuePiPcii
.p2align 4, 0x90
.type _Z9readValuePiPcii,@function
_Z9readValuePiPcii: # @_Z9readValuePiPcii
.cfi_startproc
# %bb.0:
pushq %rbp
.cfi_def_cfa_offset 16
pushq %r15
.cfi_def_cfa_offset 24
pushq %r14
.cfi_def_cfa_offset 32
pushq %rbx
.cfi_def_cfa_offset 40
pushq %rax
.cfi_def_cfa_offset 48
.cfi_offset %rbx, -40
.cfi_offset %r14, -32
.cfi_offset %r15, -24
.cfi_offset %rbp, -16
movl %ecx, %ebx
movl %edx, %ebp
movq %rsi, %r14
movq %rdi, %r15
.p2align 4, 0x90
.LBB2_1: # =>This Inner Loop Header: Depth=1
movl $.L.str, %edi
movq %r14, %rsi
movl %ebp, %edx
movl %ebx, %ecx
xorl %eax, %eax
callq printf
movl $.L.str.1, %edi
movq %r15, %rsi
xorl %eax, %eax
callq __isoc23_scanf
movl (%r15), %eax
cmpl %ebx, %eax
jg .LBB2_1
# %bb.2: # in Loop: Header=BB2_1 Depth=1
cmpl %ebp, %eax
jl .LBB2_1
# %bb.3:
addq $8, %rsp
.cfi_def_cfa_offset 40
popq %rbx
.cfi_def_cfa_offset 32
popq %r14
.cfi_def_cfa_offset 24
popq %r15
.cfi_def_cfa_offset 16
popq %rbp
.cfi_def_cfa_offset 8
retq
.Lfunc_end2:
.size _Z9readValuePiPcii, .Lfunc_end2-_Z9readValuePiPcii
.cfi_endproc
# -- End function
.section .rodata.cst4,"aM",@progbits,4
.p2align 2, 0x0 # -- Begin function main
.LCPI3_0:
.long 0x30000000 # float 4.65661287E-10
.LCPI3_1:
.long 0x49742400 # float 1.0E+6
.section .rodata.cst16,"aM",@progbits,16
.p2align 4, 0x0
.LCPI3_2:
.long 0x7fffffff # float NaN
.long 0x7fffffff # float NaN
.long 0x7fffffff # float NaN
.long 0x7fffffff # float NaN
.section .rodata.cst8,"aM",@progbits,8
.p2align 3, 0x0
.LCPI3_3:
.quad 0x0000000000000000 # double 0
.text
.globl main
.p2align 4, 0x90
.type main,@function
main: # @main
.cfi_startproc
# %bb.0:
pushq %rbp
.cfi_def_cfa_offset 16
pushq %r15
.cfi_def_cfa_offset 24
pushq %r14
.cfi_def_cfa_offset 32
pushq %r13
.cfi_def_cfa_offset 40
pushq %r12
.cfi_def_cfa_offset 48
pushq %rbx
.cfi_def_cfa_offset 56
subq $232, %rsp
.cfi_def_cfa_offset 288
.cfi_offset %rbx, -56
.cfi_offset %r12, -48
.cfi_offset %r13, -40
.cfi_offset %r14, -32
.cfi_offset %r15, -24
.cfi_offset %rbp, -16
movl $0, 16(%rsp)
movl $0, 20(%rsp)
movl $0, 12(%rsp)
leaq 56(%rsp), %rdi
callq hipEventCreate
leaq 48(%rsp), %rdi
callq hipEventCreate
leaq 40(%rsp), %rdi
callq hipEventCreate
leaq 32(%rsp), %rdi
callq hipEventCreate
movl $.L.str.2, %edi
xorl %eax, %eax
callq printf
leaq 12(%rsp), %rsi
movl $.L.str.1, %edi
xorl %eax, %eax
callq __isoc23_scanf
movl 12(%rsp), %ebp
movl %ebp, %ebx
imull %ebx, %ebx
leaq (,%rbx,4), %r15
movq %r15, %rdi
callq malloc
movq %rax, %r13
movq %r15, %rdi
callq malloc
movq %rax, 72(%rsp) # 8-byte Spill
movq %r15, %rdi
callq malloc
movq %rax, %r12
testl %ebp, %ebp
je .LBB3_3
# %bb.1: # %.lr.ph.preheader.i
cmpl $1, %ebx
adcl $0, %ebx
xorl %r14d, %r14d
.p2align 4, 0x90
.LBB3_2: # %.lr.ph.i
# =>This Inner Loop Header: Depth=1
callq rand
xorps %xmm0, %xmm0
cvtsi2ss %eax, %xmm0
mulss .LCPI3_0(%rip), %xmm0
movss %xmm0, (%r13,%r14,4)
incq %r14
cmpq %r14, %rbx
jne .LBB3_2
.LBB3_3: # %_Z10RandomInitPfi.exit
movl 12(%rsp), %ebx
testl %ebx, %ebx
movq 72(%rsp), %rbp # 8-byte Reload
je .LBB3_6
# %bb.4: # %.lr.ph.preheader.i56
imull %ebx, %ebx
cmpl $1, %ebx
adcl $0, %ebx
xorl %r14d, %r14d
.p2align 4, 0x90
.LBB3_5: # %.lr.ph.i59
# =>This Inner Loop Header: Depth=1
callq rand
xorps %xmm0, %xmm0
cvtsi2ss %eax, %xmm0
mulss .LCPI3_0(%rip), %xmm0
movss %xmm0, (%rbp,%r14,4)
incq %r14
cmpq %r14, %rbx
jne .LBB3_5
.LBB3_6: # %_Z10RandomInitPfi.exit63
movl $.Lstr, %edi
callq puts@PLT
movq 56(%rsp), %rdi
xorl %esi, %esi
callq hipEventRecord
movl 12(%rsp), %eax
testl %eax, %eax
je .LBB3_9
# %bb.7: # %.lr.ph.preheader
imull %eax, %eax
cmpl $1, %eax
adcl $0, %eax
xorl %ecx, %ecx
.p2align 4, 0x90
.LBB3_8: # %.lr.ph
# =>This Inner Loop Header: Depth=1
movss (%r13,%rcx,4), %xmm0 # xmm0 = mem[0],zero,zero,zero
addss (%rbp,%rcx,4), %xmm0
movss %xmm0, (%r12,%rcx,4)
incq %rcx
cmpq %rcx, %rax
jne .LBB3_8
.LBB3_9: # %._crit_edge
movq 48(%rsp), %rdi
xorl %esi, %esi
callq hipEventRecord
movq 56(%rsp), %rsi
movq 48(%rsp), %rdx
leaq 28(%rsp), %rdi
callq hipEventElapsedTime
movss 28(%rsp), %xmm0 # xmm0 = mem[0],zero,zero,zero
cvtss2sd %xmm0, %xmm0
movl $.L.str.4, %edi
movb $1, %al
callq printf
movl 12(%rsp), %eax
leal (%rax,%rax,2), %eax
xorps %xmm0, %xmm0
cvtsi2ss %eax, %xmm0
movss 28(%rsp), %xmm1 # xmm1 = mem[0],zero,zero,zero
mulss .LCPI3_1(%rip), %xmm1
divss %xmm1, %xmm0
cvtss2sd %xmm0, %xmm0
movl $.L.str.5, %edi
movb $1, %al
callq printf
leaq 96(%rsp), %rdi
movq %r15, %rsi
callq hipMalloc
leaq 88(%rsp), %rdi
movq %r15, %rsi
callq hipMalloc
leaq 80(%rsp), %rdi
movq %r15, %rsi
callq hipMalloc
movq 96(%rsp), %rdi
movq %r13, 104(%rsp) # 8-byte Spill
movq %r13, %rsi
movq %r15, %rdx
movl $1, %ecx
callq hipMemcpy
movq 88(%rsp), %rdi
movq %rbp, %rsi
movq %r15, %rdx
movl $1, %ecx
callq hipMemcpy
leaq 16(%rsp), %r13
leaq 20(%rsp), %rbp
movq %r15, 112(%rsp) # 8-byte Spill
.LBB3_10: # =>This Loop Header: Depth=1
# Child Loop BB3_11 Depth 2
# Child Loop BB3_13 Depth 2
# Child Loop BB3_27 Depth 2
# Child Loop BB3_23 Depth 2
movq %r15, %rdi
callq malloc
movq %rax, %rbx
.p2align 4, 0x90
.LBB3_11: # Parent Loop BB3_10 Depth=1
# => This Inner Loop Header: Depth=2
movl $.L.str, %edi
movl $.L.str.6, %esi
movl $4, %edx
movl $32, %ecx
xorl %eax, %eax
callq printf
movl $.L.str.1, %edi
movq %r13, %rsi
xorl %eax, %eax
callq __isoc23_scanf
movl 16(%rsp), %ecx
leal -33(%rcx), %eax
cmpl $-29, %eax
jb .LBB3_11
# %bb.12: # %_Z9readValuePiPcii.exit
# in Loop: Header=BB3_10 Depth=1
movl 12(%rsp), %eax
addl %ecx, %eax
decl %eax
cltd
idivl %ecx
movl %eax, %r14d
.p2align 4, 0x90
.LBB3_13: # Parent Loop BB3_10 Depth=1
# => This Inner Loop Header: Depth=2
movl $.L.str, %edi
movl $.L.str.7, %esi
movl %r14d, %edx
movl $65535, %ecx # imm = 0xFFFF
xorl %eax, %eax
callq printf
movl $.L.str.1, %edi
movq %rbp, %rsi
xorl %eax, %eax
callq __isoc23_scanf
movl 20(%rsp), %edx
cmpl $65535, %edx # imm = 0xFFFF
jg .LBB3_13
# %bb.14: # in Loop: Header=BB3_13 Depth=2
cmpl %r14d, %edx
jl .LBB3_13
# %bb.15: # %_Z9readValuePiPcii.exit68
# in Loop: Header=BB3_10 Depth=1
movl 16(%rsp), %esi
movl $.L.str.8, %edi
xorl %eax, %eax
callq printf
movl $.Lstr.1, %edi
callq puts@PLT
movl 16(%rsp), %eax
movq %rax, %r14
shlq $32, %r14
orq %rax, %r14
movl 20(%rsp), %eax
movq %rax, %r15
shlq $32, %r15
orq %rax, %r15
movq 40(%rsp), %rdi
xorl %esi, %esi
callq hipEventRecord
movl 16(%rsp), %esi
imull 20(%rsp), %esi
movl $.L.str.10, %edi
xorl %eax, %eax
callq printf
movq %r15, %rdi
movl $1, %esi
movq %r14, %rdx
movl $1, %ecx
xorl %r8d, %r8d
xorl %r9d, %r9d
callq __hipPushCallConfiguration
testl %eax, %eax
jne .LBB3_17
# %bb.16: # in Loop: Header=BB3_10 Depth=1
movq 96(%rsp), %rax
movq 88(%rsp), %rcx
movq 80(%rsp), %rdx
movl 12(%rsp), %esi
movq %rax, 184(%rsp)
movq %rcx, 176(%rsp)
movq %rdx, 168(%rsp)
movl %esi, 68(%rsp)
leaq 184(%rsp), %rax
movq %rax, 192(%rsp)
leaq 176(%rsp), %rax
movq %rax, 200(%rsp)
leaq 168(%rsp), %rax
movq %rax, 208(%rsp)
leaq 68(%rsp), %rax
movq %rax, 216(%rsp)
leaq 152(%rsp), %rdi
leaq 136(%rsp), %rsi
leaq 128(%rsp), %rdx
leaq 120(%rsp), %rcx
callq __hipPopCallConfiguration
movq 152(%rsp), %rsi
movl 160(%rsp), %edx
movq 136(%rsp), %rcx
movl 144(%rsp), %r8d
movl $_Z6VecAddPfS_S_i, %edi
leaq 192(%rsp), %r9
pushq 120(%rsp)
.cfi_adjust_cfa_offset 8
pushq 136(%rsp)
.cfi_adjust_cfa_offset 8
callq hipLaunchKernel
addq $16, %rsp
.cfi_adjust_cfa_offset -16
.LBB3_17: # in Loop: Header=BB3_10 Depth=1
movq 32(%rsp), %rdi
xorl %esi, %esi
callq hipEventRecord
movq 32(%rsp), %rdi
callq hipEventSynchronize
movq 40(%rsp), %rsi
movq 32(%rsp), %rdx
leaq 24(%rsp), %rdi
callq hipEventElapsedTime
movss 24(%rsp), %xmm0 # xmm0 = mem[0],zero,zero,zero
cvtss2sd %xmm0, %xmm0
movl $.L.str.11, %edi
movb $1, %al
callq printf
movl 12(%rsp), %eax
leal (%rax,%rax,2), %eax
xorps %xmm0, %xmm0
cvtsi2ss %eax, %xmm0
movss 24(%rsp), %xmm1 # xmm1 = mem[0],zero,zero,zero
mulss .LCPI3_1(%rip), %xmm1
divss %xmm1, %xmm0
cvtss2sd %xmm0, %xmm0
movl $.L.str.12, %edi
movb $1, %al
callq printf
movq 80(%rsp), %rsi
movq %rbx, %rdi
movq 112(%rsp), %r15 # 8-byte Reload
movq %r15, %rdx
movl $2, %ecx
callq hipMemcpy
movss 28(%rsp), %xmm0 # xmm0 = mem[0],zero,zero,zero
divss 24(%rsp), %xmm0
cvtss2sd %xmm0, %xmm0
movl $.L.str.13, %edi
movb $1, %al
callq printf
movl 12(%rsp), %eax
testl %eax, %eax
je .LBB3_18
# %bb.26: # %.lr.ph76.preheader
# in Loop: Header=BB3_10 Depth=1
imull %eax, %eax
cmpl $1, %eax
adcl $0, %eax
xorps %xmm0, %xmm0
xorl %ecx, %ecx
movaps .LCPI3_2(%rip), %xmm2 # xmm2 = [NaN,NaN,NaN,NaN]
.p2align 4, 0x90
.LBB3_27: # %.lr.ph76
# Parent Loop BB3_10 Depth=1
# => This Inner Loop Header: Depth=2
movss (%rbx,%rcx,4), %xmm1 # xmm1 = mem[0],zero,zero,zero
subss (%r12,%rcx,4), %xmm1
andps %xmm2, %xmm1
cvtss2sd %xmm1, %xmm1
mulsd %xmm1, %xmm1
addsd %xmm1, %xmm0
incq %rcx
cmpq %rcx, %rax
jne .LBB3_27
# %bb.19: # %._crit_edge77
# in Loop: Header=BB3_10 Depth=1
ucomisd .LCPI3_3(%rip), %xmm0
jb .LBB3_21
.LBB3_20: # in Loop: Header=BB3_10 Depth=1
sqrtsd %xmm0, %xmm0
jmp .LBB3_22
.p2align 4, 0x90
.LBB3_18: # in Loop: Header=BB3_10 Depth=1
xorps %xmm0, %xmm0
ucomisd .LCPI3_3(%rip), %xmm0
jae .LBB3_20
.LBB3_21: # %call.sqrt
# in Loop: Header=BB3_10 Depth=1
callq sqrt
.LBB3_22: # %._crit_edge77.split
# in Loop: Header=BB3_10 Depth=1
movl $.L.str.14, %edi
movb $1, %al
callq printf
movl $.L.str.15, %edi
xorl %eax, %eax
callq printf
.p2align 4, 0x90
.LBB3_23: # Parent Loop BB3_10 Depth=1
# => This Inner Loop Header: Depth=2
movq stdin(%rip), %rdi
callq getc
cmpb $110, %al
je .LBB3_28
# %bb.24: # in Loop: Header=BB3_23 Depth=2
movzbl %al, %eax
cmpl $121, %eax
jne .LBB3_23
# %bb.25: # %.critedge
# in Loop: Header=BB3_10 Depth=1
movq %rbx, %rdi
callq free
jmp .LBB3_10
.LBB3_28:
movq 104(%rsp), %rdi # 8-byte Reload
callq free
movq 72(%rsp), %rdi # 8-byte Reload
callq free
movq %r12, %rdi
callq free
movq 40(%rsp), %rdi
callq hipEventDestroy
movq 32(%rsp), %rdi
callq hipEventDestroy
movq 56(%rsp), %rdi
callq hipEventDestroy
movq 48(%rsp), %rdi
callq hipEventDestroy
xorl %eax, %eax
addq $232, %rsp
.cfi_def_cfa_offset 56
popq %rbx
.cfi_def_cfa_offset 48
popq %r12
.cfi_def_cfa_offset 40
popq %r13
.cfi_def_cfa_offset 32
popq %r14
.cfi_def_cfa_offset 24
popq %r15
.cfi_def_cfa_offset 16
popq %rbp
.cfi_def_cfa_offset 8
retq
.Lfunc_end3:
.size main, .Lfunc_end3-main
.cfi_endproc
# -- End function
.p2align 4, 0x90 # -- Begin function __hip_module_ctor
.type __hip_module_ctor,@function
__hip_module_ctor: # @__hip_module_ctor
.cfi_startproc
# %bb.0:
subq $40, %rsp
.cfi_def_cfa_offset 48
cmpq $0, __hip_gpubin_handle(%rip)
jne .LBB4_2
# %bb.1:
movl $__hip_fatbin_wrapper, %edi
callq __hipRegisterFatBinary
movq %rax, __hip_gpubin_handle(%rip)
.LBB4_2:
movq __hip_gpubin_handle(%rip), %rdi
xorps %xmm0, %xmm0
movups %xmm0, 16(%rsp)
movups %xmm0, (%rsp)
movl $_Z6VecAddPfS_S_i, %esi
movl $.L__unnamed_1, %edx
movl $.L__unnamed_1, %ecx
movl $-1, %r8d
xorl %r9d, %r9d
callq __hipRegisterFunction
movl $__hip_module_dtor, %edi
addq $40, %rsp
.cfi_def_cfa_offset 8
jmp atexit # TAILCALL
.Lfunc_end4:
.size __hip_module_ctor, .Lfunc_end4-__hip_module_ctor
.cfi_endproc
# -- End function
.p2align 4, 0x90 # -- Begin function __hip_module_dtor
.type __hip_module_dtor,@function
__hip_module_dtor: # @__hip_module_dtor
.cfi_startproc
# %bb.0:
movq __hip_gpubin_handle(%rip), %rdi
testq %rdi, %rdi
je .LBB5_2
# %bb.1:
pushq %rax
.cfi_def_cfa_offset 16
callq __hipUnregisterFatBinary
movq $0, __hip_gpubin_handle(%rip)
addq $8, %rsp
.cfi_def_cfa_offset 8
.LBB5_2:
retq
.Lfunc_end5:
.size __hip_module_dtor, .Lfunc_end5-__hip_module_dtor
.cfi_endproc
# -- End function
.type _Z6VecAddPfS_S_i,@object # @_Z6VecAddPfS_S_i
.section .rodata,"a",@progbits
.globl _Z6VecAddPfS_S_i
.p2align 3, 0x0
_Z6VecAddPfS_S_i:
.quad _Z21__device_stub__VecAddPfS_S_i
.size _Z6VecAddPfS_S_i, 8
.type .L.str,@object # @.str
.section .rodata.str1.1,"aMS",@progbits,1
.L.str:
.asciz "%s(%d-%d): "
.size .L.str, 12
.type .L.str.1,@object # @.str.1
.L.str.1:
.asciz "%d"
.size .L.str.1, 3
.type .L.str.2,@object # @.str.2
.L.str.2:
.asciz "Enter the size: "
.size .L.str.2, 17
.type .L.str.4,@object # @.str.4
.L.str.4:
.asciz "Processing time for CPU: %5.5f (ms)\n"
.size .L.str.4, 37
.type .L.str.5,@object # @.str.5
.L.str.5:
.asciz "CPU: %fGflops\n"
.size .L.str.5, 15
.type .L.str.6,@object # @.str.6
.L.str.6:
.asciz "Enter no. of threads per block(input of 'P' will construct PxP threads in block)"
.size .L.str.6, 81
.type .L.str.7,@object # @.str.7
.L.str.7:
.asciz "Enter no. of blocks in grid(input of 'P' will construct PxP blocks)"
.size .L.str.7, 68
.type .L.str.8,@object # @.str.8
.L.str.8:
.asciz "Threads Per block: %d, Blocks in grid: %d\n"
.size .L.str.8, 43
.type .L.str.10,@object # @.str.10
.L.str.10:
.asciz "Total linear threads: %d\n"
.size .L.str.10, 26
.type .L.str.11,@object # @.str.11
.L.str.11:
.asciz "Processing time for GPU: %5.5f (ms)\n"
.size .L.str.11, 37
.type .L.str.12,@object # @.str.12
.L.str.12:
.asciz "GPU: %fGflops\n"
.size .L.str.12, 15
.type .L.str.13,@object # @.str.13
.L.str.13:
.asciz "Speedup: %5.5f\n"
.size .L.str.13, 16
.type .L.str.14,@object # @.str.14
.L.str.14:
.asciz "norm(h_C - h_D)=%20.15e\n\n"
.size .L.str.14, 26
.type .L.str.15,@object # @.str.15
.L.str.15:
.asciz "Again?(y/n): "
.size .L.str.15, 14
.type .L__unnamed_1,@object # @0
.L__unnamed_1:
.asciz "_Z6VecAddPfS_S_i"
.size .L__unnamed_1, 17
.type __hip_fatbin_wrapper,@object # @__hip_fatbin_wrapper
.section .hipFatBinSegment,"a",@progbits
.p2align 3, 0x0
__hip_fatbin_wrapper:
.long 1212764230 # 0x48495046
.long 1 # 0x1
.quad __hip_fatbin
.quad 0
.size __hip_fatbin_wrapper, 24
.type __hip_gpubin_handle,@object # @__hip_gpubin_handle
.local __hip_gpubin_handle
.comm __hip_gpubin_handle,8,8
.section .init_array,"aw",@init_array
.p2align 3, 0x0
.quad __hip_module_ctor
.type __hip_cuid_,@object # @__hip_cuid_
.bss
.globl __hip_cuid_
__hip_cuid_:
.byte 0 # 0x0
.size __hip_cuid_, 1
.type .Lstr,@object # @str
.section .rodata.str1.1,"aMS",@progbits,1
.Lstr:
.asciz "Adding matrices on CPU..."
.size .Lstr, 26
.type .Lstr.1,@object # @str.1
.Lstr.1:
.asciz "Adding matrices on GPU.."
.size .Lstr.1, 25
.section ".linker-options","e",@llvm_linker_options
.ident "AMD clang version 18.0.0git (https://github.com/RadeonOpenCompute/llvm-project roc-6.3.2 25012 e5bf7e55c91490b07c49d8960fa7983d864936c4)"
.section ".note.GNU-stack","",@progbits
.addrsig
.addrsig_sym _Z21__device_stub__VecAddPfS_S_i
.addrsig_sym __hip_module_ctor
.addrsig_sym __hip_module_dtor
.addrsig_sym _Z6VecAddPfS_S_i
.addrsig_sym __hip_fatbin
.addrsig_sym __hip_fatbin_wrapper
.addrsig_sym __hip_cuid_ |
You are a helpful coding assistant specialized in converting from CUDA device assembly to AMD device assembly. | code for sm_80
Function : _Z6VecAddPfS_S_i
.headerflags @"EF_CUDA_TEXMODE_UNIFIED EF_CUDA_64BIT_ADDRESS EF_CUDA_SM80 EF_CUDA_VIRTUAL_SM(EF_CUDA_SM80)"
/*0000*/ MOV R1, c[0x0][0x28] ; /* 0x00000a0000017a02 */
/* 0x000fe40000000f00 */
/*0010*/ S2R R3, SR_CTAID.Y ; /* 0x0000000000037919 */
/* 0x000e280000002600 */
/*0020*/ S2R R2, SR_TID.Y ; /* 0x0000000000027919 */
/* 0x000e280000002200 */
/*0030*/ S2R R0, SR_CTAID.X ; /* 0x0000000000007919 */
/* 0x000e680000002500 */
/*0040*/ S2R R5, SR_TID.X ; /* 0x0000000000057919 */
/* 0x000e620000002100 */
/*0050*/ IMAD R3, R3, c[0x0][0x4], R2 ; /* 0x0000010003037a24 */
/* 0x001fca00078e0202 */
/*0060*/ ISETP.GE.AND P0, PT, R3, c[0x0][0x178], PT ; /* 0x00005e0003007a0c */
/* 0x000fe20003f06270 */
/*0070*/ IMAD R0, R0, c[0x0][0x0], R5 ; /* 0x0000000000007a24 */
/* 0x002fca00078e0205 */
/*0080*/ ISETP.GE.OR P0, PT, R0, c[0x0][0x178], P0 ; /* 0x00005e0000007a0c */
/* 0x000fda0000706670 */
/*0090*/ @P0 EXIT ; /* 0x000000000000094d */
/* 0x000fea0003800000 */
/*00a0*/ HFMA2.MMA R7, -RZ, RZ, 0, 2.384185791015625e-07 ; /* 0x00000004ff077435 */
/* 0x000fe200000001ff */
/*00b0*/ IMAD R0, R3, c[0x0][0x178], R0 ; /* 0x00005e0003007a24 */
/* 0x000fe200078e0200 */
/*00c0*/ ULDC.64 UR4, c[0x0][0x118] ; /* 0x0000460000047ab9 */
/* 0x000fd00000000a00 */
/*00d0*/ IMAD.WIDE R4, R0, R7, c[0x0][0x168] ; /* 0x00005a0000047625 */
/* 0x000fc800078e0207 */
/*00e0*/ IMAD.WIDE R2, R0.reuse, R7.reuse, c[0x0][0x160] ; /* 0x0000580000027625 */
/* 0x0c0fe400078e0207 */
/*00f0*/ LDG.E R4, [R4.64] ; /* 0x0000000404047981 */
/* 0x000ea8000c1e1900 */
/*0100*/ LDG.E R3, [R2.64] ; /* 0x0000000402037981 */
/* 0x000ea2000c1e1900 */
/*0110*/ IMAD.WIDE R6, R0, R7, c[0x0][0x170] ; /* 0x00005c0000067625 */
/* 0x000fc800078e0207 */
/*0120*/ FADD R9, R4, R3 ; /* 0x0000000304097221 */
/* 0x004fca0000000000 */
/*0130*/ STG.E [R6.64], R9 ; /* 0x0000000906007986 */
/* 0x000fe2000c101904 */
/*0140*/ EXIT ; /* 0x000000000000794d */
/* 0x000fea0003800000 */
/*0150*/ BRA 0x150; /* 0xfffffff000007947 */
/* 0x000fc0000383ffff */
/*0160*/ NOP; /* 0x0000000000007918 */
/* 0x000fc00000000000 */
/*0170*/ NOP; /* 0x0000000000007918 */
/* 0x000fc00000000000 */
/*0180*/ NOP; /* 0x0000000000007918 */
/* 0x000fc00000000000 */
/*0190*/ NOP; /* 0x0000000000007918 */
/* 0x000fc00000000000 */
/*01a0*/ NOP; /* 0x0000000000007918 */
/* 0x000fc00000000000 */
/*01b0*/ NOP; /* 0x0000000000007918 */
/* 0x000fc00000000000 */
/*01c0*/ NOP; /* 0x0000000000007918 */
/* 0x000fc00000000000 */
/*01d0*/ NOP; /* 0x0000000000007918 */
/* 0x000fc00000000000 */
/*01e0*/ NOP; /* 0x0000000000007918 */
/* 0x000fc00000000000 */
/*01f0*/ NOP; /* 0x0000000000007918 */
/* 0x000fc00000000000 */
.......... | .text
.amdgcn_target "amdgcn-amd-amdhsa--gfx1100"
.protected _Z6VecAddPfS_S_i
.globl _Z6VecAddPfS_S_i
.p2align 8
.type _Z6VecAddPfS_S_i,@function
_Z6VecAddPfS_S_i:
s_clause 0x1
s_load_b32 s3, s[0:1], 0x2c
s_load_b32 s2, s[0:1], 0x18
v_and_b32_e32 v2, 0x3ff, v0
v_bfe_u32 v3, v0, 10, 10
s_waitcnt lgkmcnt(0)
s_and_b32 s4, s3, 0xffff
s_lshr_b32 s3, s3, 16
s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_2) | instid1(VALU_DEP_1)
v_mad_u64_u32 v[0:1], null, s14, s4, v[2:3]
v_mad_u64_u32 v[1:2], null, s15, s3, v[3:4]
s_mov_b32 s3, exec_lo
v_max_i32_e32 v2, v0, v1
s_delay_alu instid0(VALU_DEP_1)
v_cmpx_gt_i32_e64 s2, v2
s_cbranch_execz .LBB0_2
s_load_b128 s[4:7], s[0:1], 0x0
v_mad_u64_u32 v[2:3], null, v1, s2, v[0:1]
s_load_b64 s[0:1], s[0:1], 0x10
s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
v_ashrrev_i32_e32 v3, 31, v2
v_lshlrev_b64 v[0:1], 2, v[2:3]
s_waitcnt lgkmcnt(0)
s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_2)
v_add_co_u32 v2, vcc_lo, s4, v0
v_add_co_ci_u32_e32 v3, vcc_lo, s5, v1, vcc_lo
v_add_co_u32 v4, vcc_lo, s6, v0
v_add_co_ci_u32_e32 v5, vcc_lo, s7, v1, vcc_lo
v_add_co_u32 v0, vcc_lo, s0, v0
global_load_b32 v2, v[2:3], off
global_load_b32 v3, v[4:5], off
v_add_co_ci_u32_e32 v1, vcc_lo, s1, v1, vcc_lo
s_waitcnt vmcnt(0)
v_add_f32_e32 v2, v2, v3
global_store_b32 v[0:1], v2, off
.LBB0_2:
s_nop 0
s_sendmsg sendmsg(MSG_DEALLOC_VGPRS)
s_endpgm
.section .rodata,"a",@progbits
.p2align 6, 0x0
.amdhsa_kernel _Z6VecAddPfS_S_i
.amdhsa_group_segment_fixed_size 0
.amdhsa_private_segment_fixed_size 0
.amdhsa_kernarg_size 288
.amdhsa_user_sgpr_count 14
.amdhsa_user_sgpr_dispatch_ptr 0
.amdhsa_user_sgpr_queue_ptr 0
.amdhsa_user_sgpr_kernarg_segment_ptr 1
.amdhsa_user_sgpr_dispatch_id 0
.amdhsa_user_sgpr_private_segment_size 0
.amdhsa_wavefront_size32 1
.amdhsa_uses_dynamic_stack 0
.amdhsa_enable_private_segment 0
.amdhsa_system_sgpr_workgroup_id_x 1
.amdhsa_system_sgpr_workgroup_id_y 1
.amdhsa_system_sgpr_workgroup_id_z 0
.amdhsa_system_sgpr_workgroup_info 0
.amdhsa_system_vgpr_workitem_id 1
.amdhsa_next_free_vgpr 6
.amdhsa_next_free_sgpr 16
.amdhsa_float_round_mode_32 0
.amdhsa_float_round_mode_16_64 0
.amdhsa_float_denorm_mode_32 3
.amdhsa_float_denorm_mode_16_64 3
.amdhsa_dx10_clamp 1
.amdhsa_ieee_mode 1
.amdhsa_fp16_overflow 0
.amdhsa_workgroup_processor_mode 1
.amdhsa_memory_ordered 1
.amdhsa_forward_progress 0
.amdhsa_shared_vgpr_count 0
.amdhsa_exception_fp_ieee_invalid_op 0
.amdhsa_exception_fp_denorm_src 0
.amdhsa_exception_fp_ieee_div_zero 0
.amdhsa_exception_fp_ieee_overflow 0
.amdhsa_exception_fp_ieee_underflow 0
.amdhsa_exception_fp_ieee_inexact 0
.amdhsa_exception_int_div_zero 0
.end_amdhsa_kernel
.text
.Lfunc_end0:
.size _Z6VecAddPfS_S_i, .Lfunc_end0-_Z6VecAddPfS_S_i
.section .AMDGPU.csdata,"",@progbits
.text
.p2alignl 7, 3214868480
.fill 96, 4, 3214868480
.type __hip_cuid_,@object
.section .bss,"aw",@nobits
.globl __hip_cuid_
__hip_cuid_:
.byte 0
.size __hip_cuid_, 1
.ident "AMD clang version 18.0.0git (https://github.com/RadeonOpenCompute/llvm-project roc-6.3.2 25012 e5bf7e55c91490b07c49d8960fa7983d864936c4)"
.section ".note.GNU-stack","",@progbits
.addrsig
.addrsig_sym __hip_cuid_
.amdgpu_metadata
---
amdhsa.kernels:
- .args:
- .address_space: global
.offset: 0
.size: 8
.value_kind: global_buffer
- .address_space: global
.offset: 8
.size: 8
.value_kind: global_buffer
- .address_space: global
.offset: 16
.size: 8
.value_kind: global_buffer
- .offset: 24
.size: 4
.value_kind: by_value
- .offset: 32
.size: 4
.value_kind: hidden_block_count_x
- .offset: 36
.size: 4
.value_kind: hidden_block_count_y
- .offset: 40
.size: 4
.value_kind: hidden_block_count_z
- .offset: 44
.size: 2
.value_kind: hidden_group_size_x
- .offset: 46
.size: 2
.value_kind: hidden_group_size_y
- .offset: 48
.size: 2
.value_kind: hidden_group_size_z
- .offset: 50
.size: 2
.value_kind: hidden_remainder_x
- .offset: 52
.size: 2
.value_kind: hidden_remainder_y
- .offset: 54
.size: 2
.value_kind: hidden_remainder_z
- .offset: 72
.size: 8
.value_kind: hidden_global_offset_x
- .offset: 80
.size: 8
.value_kind: hidden_global_offset_y
- .offset: 88
.size: 8
.value_kind: hidden_global_offset_z
- .offset: 96
.size: 2
.value_kind: hidden_grid_dims
.group_segment_fixed_size: 0
.kernarg_segment_align: 8
.kernarg_segment_size: 288
.language: OpenCL C
.language_version:
- 2
- 0
.max_flat_workgroup_size: 1024
.name: _Z6VecAddPfS_S_i
.private_segment_fixed_size: 0
.sgpr_count: 18
.sgpr_spill_count: 0
.symbol: _Z6VecAddPfS_S_i.kd
.uniform_work_group_size: 1
.uses_dynamic_stack: false
.vgpr_count: 6
.vgpr_spill_count: 0
.wavefront_size: 32
.workgroup_processor_mode: 1
amdhsa.target: amdgcn-amd-amdhsa--gfx1100
amdhsa.version:
- 1
- 2
...
.end_amdgpu_metadata |
You are a helpful coding assistant specialized in converting from CUDA host assembly to AMD host assembly. | .file "tmpxft_000420eb_00000000-6_Ch2.cudafe1.cpp"
.text
#APP
#NO_APP
.type _ZL26__cudaUnregisterBinaryUtilv, @function
_ZL26__cudaUnregisterBinaryUtilv:
.LFB2062:
.cfi_startproc
endbr64
subq $8, %rsp
.cfi_def_cfa_offset 16
movq _ZL20__cudaFatCubinHandle(%rip), %rdi
call __cudaUnregisterFatBinary@PLT
addq $8, %rsp
.cfi_def_cfa_offset 8
ret
.cfi_endproc
.LFE2062:
.size _ZL26__cudaUnregisterBinaryUtilv, .-_ZL26__cudaUnregisterBinaryUtilv
.globl _Z10RandomInitPfi
.type _Z10RandomInitPfi, @function
_Z10RandomInitPfi:
.LFB2057:
.cfi_startproc
endbr64
imull %esi, %esi
testl %esi, %esi
jle .L8
pushq %rbp
.cfi_def_cfa_offset 16
.cfi_offset 6, -16
pushq %rbx
.cfi_def_cfa_offset 24
.cfi_offset 3, -24
subq $8, %rsp
.cfi_def_cfa_offset 32
movq %rdi, %rbx
movslq %esi, %rsi
leaq (%rdi,%rsi,4), %rbp
.L5:
call rand@PLT
pxor %xmm0, %xmm0
cvtsi2ssl %eax, %xmm0
mulss .LC0(%rip), %xmm0
movss %xmm0, (%rbx)
addq $4, %rbx
cmpq %rbp, %rbx
jne .L5
addq $8, %rsp
.cfi_def_cfa_offset 24
popq %rbx
.cfi_def_cfa_offset 16
popq %rbp
.cfi_def_cfa_offset 8
ret
.L8:
.cfi_restore 3
.cfi_restore 6
ret
.cfi_endproc
.LFE2057:
.size _Z10RandomInitPfi, .-_Z10RandomInitPfi
.section .rodata.str1.1,"aMS",@progbits,1
.LC1:
.string "%s(%d-%d): "
.LC2:
.string "%d"
.text
.globl _Z9readValuePiPcii
.type _Z9readValuePiPcii, @function
_Z9readValuePiPcii:
.LFB2058:
.cfi_startproc
endbr64
pushq %r15
.cfi_def_cfa_offset 16
.cfi_offset 15, -16
pushq %r14
.cfi_def_cfa_offset 24
.cfi_offset 14, -24
pushq %r13
.cfi_def_cfa_offset 32
.cfi_offset 13, -32
pushq %r12
.cfi_def_cfa_offset 40
.cfi_offset 12, -40
pushq %rbp
.cfi_def_cfa_offset 48
.cfi_offset 6, -48
pushq %rbx
.cfi_def_cfa_offset 56
.cfi_offset 3, -56
subq $8, %rsp
.cfi_def_cfa_offset 64
movq %rdi, %rbp
movq %rsi, %r13
movl %edx, %ebx
movl %ecx, %r12d
leaq .LC1(%rip), %r15
leaq .LC2(%rip), %r14
.L13:
movl %r12d, %r8d
movl %ebx, %ecx
movq %r13, %rdx
movq %r15, %rsi
movl $2, %edi
movl $0, %eax
call __printf_chk@PLT
movq %rbp, %rsi
movq %r14, %rdi
movl $0, %eax
call __isoc23_scanf@PLT
movl 0(%rbp), %eax
cmpl %ebx, %eax
jl .L13
cmpl %r12d, %eax
jg .L13
addq $8, %rsp
.cfi_def_cfa_offset 56
popq %rbx
.cfi_def_cfa_offset 48
popq %rbp
.cfi_def_cfa_offset 40
popq %r12
.cfi_def_cfa_offset 32
popq %r13
.cfi_def_cfa_offset 24
popq %r14
.cfi_def_cfa_offset 16
popq %r15
.cfi_def_cfa_offset 8
ret
.cfi_endproc
.LFE2058:
.size _Z9readValuePiPcii, .-_Z9readValuePiPcii
.globl _Z30__device_stub__Z6VecAddPfS_S_iPfS_S_i
.type _Z30__device_stub__Z6VecAddPfS_S_iPfS_S_i, @function
_Z30__device_stub__Z6VecAddPfS_S_iPfS_S_i:
.LFB2084:
.cfi_startproc
endbr64
subq $152, %rsp
.cfi_def_cfa_offset 160
movq %rdi, 24(%rsp)
movq %rsi, 16(%rsp)
movq %rdx, 8(%rsp)
movl %ecx, 4(%rsp)
movq %fs:40, %rax
movq %rax, 136(%rsp)
xorl %eax, %eax
leaq 24(%rsp), %rax
movq %rax, 96(%rsp)
leaq 16(%rsp), %rax
movq %rax, 104(%rsp)
leaq 8(%rsp), %rax
movq %rax, 112(%rsp)
leaq 4(%rsp), %rax
movq %rax, 120(%rsp)
movl $1, 48(%rsp)
movl $1, 52(%rsp)
movl $1, 56(%rsp)
movl $1, 60(%rsp)
movl $1, 64(%rsp)
movl $1, 68(%rsp)
leaq 40(%rsp), %rcx
leaq 32(%rsp), %rdx
leaq 60(%rsp), %rsi
leaq 48(%rsp), %rdi
call __cudaPopCallConfiguration@PLT
testl %eax, %eax
je .L19
.L15:
movq 136(%rsp), %rax
subq %fs:40, %rax
jne .L20
addq $152, %rsp
.cfi_remember_state
.cfi_def_cfa_offset 8
ret
.L19:
.cfi_restore_state
pushq 40(%rsp)
.cfi_def_cfa_offset 168
pushq 40(%rsp)
.cfi_def_cfa_offset 176
leaq 112(%rsp), %r9
movq 76(%rsp), %rcx
movl 84(%rsp), %r8d
movq 64(%rsp), %rsi
movl 72(%rsp), %edx
leaq _Z6VecAddPfS_S_i(%rip), %rdi
call cudaLaunchKernel@PLT
addq $16, %rsp
.cfi_def_cfa_offset 160
jmp .L15
.L20:
call __stack_chk_fail@PLT
.cfi_endproc
.LFE2084:
.size _Z30__device_stub__Z6VecAddPfS_S_iPfS_S_i, .-_Z30__device_stub__Z6VecAddPfS_S_iPfS_S_i
.globl _Z6VecAddPfS_S_i
.type _Z6VecAddPfS_S_i, @function
_Z6VecAddPfS_S_i:
.LFB2085:
.cfi_startproc
endbr64
subq $8, %rsp
.cfi_def_cfa_offset 16
call _Z30__device_stub__Z6VecAddPfS_S_iPfS_S_i
addq $8, %rsp
.cfi_def_cfa_offset 8
ret
.cfi_endproc
.LFE2085:
.size _Z6VecAddPfS_S_i, .-_Z6VecAddPfS_S_i
.section .rodata.str1.1
.LC4:
.string "Enter the size: "
.LC5:
.string "Adding matrices on CPU...\n"
.section .rodata.str1.8,"aMS",@progbits,1
.align 8
.LC6:
.string "Processing time for CPU: %5.5f (ms)\n"
.section .rodata.str1.1
.LC8:
.string "CPU: %fGflops\n"
.section .rodata.str1.8
.align 8
.LC9:
.string "Processing time for GPU: %5.5f (ms)\n"
.section .rodata.str1.1
.LC10:
.string "GPU: %fGflops\n"
.LC11:
.string "Speedup: %5.5f\n"
.LC13:
.string "norm(h_C - h_D)=%20.15e\n\n"
.LC14:
.string "Again?(y/n): "
.section .rodata.str1.8
.align 8
.LC15:
.string "Enter no. of threads per block(input of 'P' will construct PxP threads in block)"
.align 8
.LC16:
.string "Enter no. of blocks in grid(input of 'P' will construct PxP blocks)"
.align 8
.LC17:
.string "Threads Per block: %d, Blocks in grid: %d\n"
.section .rodata.str1.1
.LC18:
.string "Adding matrices on GPU..\n"
.LC19:
.string "Total linear threads: %d\n"
.text
.globl main
.type main, @function
main:
.LFB2059:
.cfi_startproc
endbr64
pushq %r15
.cfi_def_cfa_offset 16
.cfi_offset 15, -16
pushq %r14
.cfi_def_cfa_offset 24
.cfi_offset 14, -24
pushq %r13
.cfi_def_cfa_offset 32
.cfi_offset 13, -32
pushq %r12
.cfi_def_cfa_offset 40
.cfi_offset 12, -40
pushq %rbp
.cfi_def_cfa_offset 48
.cfi_offset 6, -48
pushq %rbx
.cfi_def_cfa_offset 56
.cfi_offset 3, -56
subq $120, %rsp
.cfi_def_cfa_offset 176
movq %fs:40, %rax
movq %rax, 104(%rsp)
xorl %eax, %eax
movl $0, 4(%rsp)
movl $0, 8(%rsp)
movl $0, 20(%rsp)
leaq 24(%rsp), %rdi
call cudaEventCreate@PLT
leaq 32(%rsp), %rdi
call cudaEventCreate@PLT
leaq 40(%rsp), %rdi
call cudaEventCreate@PLT
leaq 48(%rsp), %rdi
call cudaEventCreate@PLT
leaq .LC4(%rip), %rsi
movl $2, %edi
movl $0, %eax
call __printf_chk@PLT
leaq 20(%rsp), %rsi
leaq .LC2(%rip), %rdi
movl $0, %eax
call __isoc23_scanf@PLT
movl 20(%rsp), %ebx
movl %ebx, %r12d
imull %ebx, %r12d
movslq %r12d, %r12
salq $2, %r12
movq %r12, %rdi
call malloc@PLT
movq %rax, %r14
movq %r12, %rdi
call malloc@PLT
movq %rax, %r13
movq %r12, %rdi
call malloc@PLT
movq %rax, %rbp
movl %ebx, %esi
movq %r14, %rdi
call _Z10RandomInitPfi
movl 20(%rsp), %esi
movq %r13, %rdi
call _Z10RandomInitPfi
leaq .LC5(%rip), %rsi
movl $2, %edi
movl $0, %eax
call __printf_chk@PLT
movl $0, %esi
movq 24(%rsp), %rdi
call cudaEventRecord@PLT
movl 20(%rsp), %eax
imull %eax, %eax
testl %eax, %eax
jle .L24
cltq
leaq 0(,%rax,4), %rdx
movl $0, %eax
.L25:
movss (%r14,%rax), %xmm0
addss 0(%r13,%rax), %xmm0
movss %xmm0, 0(%rbp,%rax)
addq $4, %rax
cmpq %rax, %rdx
jne .L25
.L24:
movl $0, %esi
movq 32(%rsp), %rdi
call cudaEventRecord@PLT
leaq 12(%rsp), %rdi
movq 32(%rsp), %rdx
movq 24(%rsp), %rsi
call cudaEventElapsedTime@PLT
pxor %xmm0, %xmm0
cvtss2sd 12(%rsp), %xmm0
leaq .LC6(%rip), %rsi
movl $2, %edi
movl $1, %eax
call __printf_chk@PLT
movl 20(%rsp), %eax
leal (%rax,%rax,2), %eax
pxor %xmm0, %xmm0
cvtsi2ssl %eax, %xmm0
movss .LC7(%rip), %xmm1
mulss 12(%rsp), %xmm1
divss %xmm1, %xmm0
cvtss2sd %xmm0, %xmm0
leaq .LC8(%rip), %rsi
movl $2, %edi
movl $1, %eax
call __printf_chk@PLT
leaq 56(%rsp), %rdi
movq %r12, %rsi
call cudaMalloc@PLT
leaq 64(%rsp), %rdi
movq %r12, %rsi
call cudaMalloc@PLT
leaq 72(%rsp), %rdi
movq %r12, %rsi
call cudaMalloc@PLT
movl $1, %ecx
movq %r12, %rdx
movq %r14, %rsi
movq 56(%rsp), %rdi
call cudaMemcpy@PLT
movl $1, %ecx
movq %r12, %rdx
movq %r13, %rsi
movq 64(%rsp), %rdi
call cudaMemcpy@PLT
leaq .LC15(%rip), %r15
jmp .L26
.L47:
movl 20(%rsp), %ecx
movq 72(%rsp), %rdx
movq 64(%rsp), %rsi
movq 56(%rsp), %rdi
call _Z30__device_stub__Z6VecAddPfS_S_iPfS_S_i
jmp .L35
.L38:
pxor %xmm0, %xmm0
jmp .L27
.L48:
call sqrt@PLT
jmp .L31
.L39:
cmpb $110, %al
je .L34
movq %rbx, %rdi
call free@PLT
.L26:
movq %r12, %rdi
call malloc@PLT
movq %rax, %rbx
leaq 4(%rsp), %rdi
movl $32, %ecx
movl $4, %edx
movq %r15, %rsi
call _Z9readValuePiPcii
movl 4(%rsp), %ecx
movl %ecx, %eax
addl 20(%rsp), %eax
subl $1, %eax
cltd
idivl %ecx
leaq 8(%rsp), %rdi
movl $65535, %ecx
movl %eax, %edx
leaq .LC16(%rip), %rsi
call _Z9readValuePiPcii
movl 8(%rsp), %ecx
movl 4(%rsp), %edx
leaq .LC17(%rip), %rsi
movl $2, %edi
movl $0, %eax
call __printf_chk@PLT
leaq .LC18(%rip), %rsi
movl $2, %edi
movl $0, %eax
call __printf_chk@PLT
movl 4(%rsp), %eax
movl %eax, 80(%rsp)
movl %eax, 84(%rsp)
movl $1, 88(%rsp)
movl 8(%rsp), %eax
movl %eax, 92(%rsp)
movl %eax, 96(%rsp)
movl $1, 100(%rsp)
movl $0, %esi
movq 40(%rsp), %rdi
call cudaEventRecord@PLT
movl 8(%rsp), %edx
imull 4(%rsp), %edx
leaq .LC19(%rip), %rsi
movl $2, %edi
movl $0, %eax
call __printf_chk@PLT
movl 88(%rsp), %ecx
movl $0, %r9d
movl $0, %r8d
movq 80(%rsp), %rdx
movq 92(%rsp), %rdi
movl 100(%rsp), %esi
call __cudaPushCallConfiguration@PLT
testl %eax, %eax
je .L47
.L35:
movl $0, %esi
movq 48(%rsp), %rdi
call cudaEventRecord@PLT
movq 48(%rsp), %rdi
call cudaEventSynchronize@PLT
leaq 16(%rsp), %rdi
movq 48(%rsp), %rdx
movq 40(%rsp), %rsi
call cudaEventElapsedTime@PLT
pxor %xmm0, %xmm0
cvtss2sd 16(%rsp), %xmm0
leaq .LC9(%rip), %rsi
movl $2, %edi
movl $1, %eax
call __printf_chk@PLT
movl 20(%rsp), %eax
leal (%rax,%rax,2), %eax
pxor %xmm0, %xmm0
cvtsi2ssl %eax, %xmm0
movss .LC7(%rip), %xmm1
mulss 16(%rsp), %xmm1
divss %xmm1, %xmm0
cvtss2sd %xmm0, %xmm0
leaq .LC10(%rip), %rsi
movl $2, %edi
movl $1, %eax
call __printf_chk@PLT
movl $2, %ecx
movq %r12, %rdx
movq 72(%rsp), %rsi
movq %rbx, %rdi
call cudaMemcpy@PLT
movss 12(%rsp), %xmm0
divss 16(%rsp), %xmm0
cvtss2sd %xmm0, %xmm0
leaq .LC11(%rip), %rsi
movl $2, %edi
movl $1, %eax
call __printf_chk@PLT
movl 20(%rsp), %edx
imull %edx, %edx
testl %edx, %edx
jle .L38
movslq %edx, %rdx
salq $2, %rdx
movl $0, %eax
pxor %xmm0, %xmm0
.L28:
movss (%rbx,%rax), %xmm1
subss 0(%rbp,%rax), %xmm1
andps .LC12(%rip), %xmm1
cvtss2sd %xmm1, %xmm1
mulsd %xmm1, %xmm1
addsd %xmm1, %xmm0
addq $4, %rax
cmpq %rdx, %rax
jne .L28
pxor %xmm1, %xmm1
ucomisd %xmm0, %xmm1
ja .L48
.L27:
sqrtsd %xmm0, %xmm0
.L31:
leaq .LC13(%rip), %rsi
movl $2, %edi
movl $1, %eax
call __printf_chk@PLT
leaq .LC14(%rip), %rsi
movl $2, %edi
movl $0, %eax
call __printf_chk@PLT
.L32:
movq stdin(%rip), %rdi
call getc@PLT
cmpb $121, %al
je .L39
cmpb $110, %al
jne .L32
jmp .L39
.L34:
movq %r14, %rdi
call free@PLT
movq %r13, %rdi
call free@PLT
movq %rbp, %rdi
call free@PLT
movq 40(%rsp), %rdi
call cudaEventDestroy@PLT
movq 48(%rsp), %rdi
call cudaEventDestroy@PLT
movq 24(%rsp), %rdi
call cudaEventDestroy@PLT
movq 32(%rsp), %rdi
call cudaEventDestroy@PLT
movq 104(%rsp), %rax
subq %fs:40, %rax
jne .L49
movl $0, %eax
addq $120, %rsp
.cfi_remember_state
.cfi_def_cfa_offset 56
popq %rbx
.cfi_def_cfa_offset 48
popq %rbp
.cfi_def_cfa_offset 40
popq %r12
.cfi_def_cfa_offset 32
popq %r13
.cfi_def_cfa_offset 24
popq %r14
.cfi_def_cfa_offset 16
popq %r15
.cfi_def_cfa_offset 8
ret
.L49:
.cfi_restore_state
call __stack_chk_fail@PLT
.cfi_endproc
.LFE2059:
.size main, .-main
.section .rodata.str1.1
.LC20:
.string "_Z6VecAddPfS_S_i"
.text
.type _ZL24__sti____cudaRegisterAllv, @function
_ZL24__sti____cudaRegisterAllv:
.LFB2087:
.cfi_startproc
endbr64
subq $8, %rsp
.cfi_def_cfa_offset 16
leaq _ZL15__fatDeviceText(%rip), %rdi
call __cudaRegisterFatBinary@PLT
movq %rax, %rdi
movq %rax, _ZL20__cudaFatCubinHandle(%rip)
pushq $0
.cfi_def_cfa_offset 24
pushq $0
.cfi_def_cfa_offset 32
pushq $0
.cfi_def_cfa_offset 40
pushq $0
.cfi_def_cfa_offset 48
movl $0, %r9d
movl $-1, %r8d
leaq .LC20(%rip), %rdx
movq %rdx, %rcx
leaq _Z6VecAddPfS_S_i(%rip), %rsi
call __cudaRegisterFunction@PLT
addq $32, %rsp
.cfi_def_cfa_offset 16
movq _ZL20__cudaFatCubinHandle(%rip), %rdi
call __cudaRegisterFatBinaryEnd@PLT
leaq _ZL26__cudaUnregisterBinaryUtilv(%rip), %rdi
call atexit@PLT
addq $8, %rsp
.cfi_def_cfa_offset 8
ret
.cfi_endproc
.LFE2087:
.size _ZL24__sti____cudaRegisterAllv, .-_ZL24__sti____cudaRegisterAllv
.section .init_array,"aw"
.align 8
.quad _ZL24__sti____cudaRegisterAllv
.section .nvFatBinSegment,"aw"
.align 8
.type _ZL15__fatDeviceText, @object
.size _ZL15__fatDeviceText, 24
_ZL15__fatDeviceText:
.long 1180844977
.long 1
.quad fatbinData
.quad 0
.local _ZL20__cudaFatCubinHandle
.comm _ZL20__cudaFatCubinHandle,8,8
.section .rodata.cst4,"aM",@progbits,4
.align 4
.LC0:
.long 805306368
.align 4
.LC7:
.long 1232348160
.section .rodata.cst16,"aM",@progbits,16
.align 16
.LC12:
.long 2147483647
.long 0
.long 0
.long 0
.ident "GCC: (Ubuntu 13.3.0-6ubuntu2~24.04) 13.3.0"
.section .note.GNU-stack,"",@progbits
.section .note.gnu.property,"a"
.align 8
.long 1f - 0f
.long 4f - 1f
.long 5
0:
.string "GNU"
1:
.align 8
.long 0xc0000002
.long 3f - 2f
2:
.long 0x3
3:
.align 8
4: | .text
.file "Ch2.hip"
.globl _Z21__device_stub__VecAddPfS_S_i # -- Begin function _Z21__device_stub__VecAddPfS_S_i
.p2align 4, 0x90
.type _Z21__device_stub__VecAddPfS_S_i,@function
_Z21__device_stub__VecAddPfS_S_i: # @_Z21__device_stub__VecAddPfS_S_i
.cfi_startproc
# %bb.0:
subq $120, %rsp
.cfi_def_cfa_offset 128
movq %rdi, 72(%rsp)
movq %rsi, 64(%rsp)
movq %rdx, 56(%rsp)
movl %ecx, 4(%rsp)
leaq 72(%rsp), %rax
movq %rax, 80(%rsp)
leaq 64(%rsp), %rax
movq %rax, 88(%rsp)
leaq 56(%rsp), %rax
movq %rax, 96(%rsp)
leaq 4(%rsp), %rax
movq %rax, 104(%rsp)
leaq 40(%rsp), %rdi
leaq 24(%rsp), %rsi
leaq 16(%rsp), %rdx
leaq 8(%rsp), %rcx
callq __hipPopCallConfiguration
movq 40(%rsp), %rsi
movl 48(%rsp), %edx
movq 24(%rsp), %rcx
movl 32(%rsp), %r8d
leaq 80(%rsp), %r9
movl $_Z6VecAddPfS_S_i, %edi
pushq 8(%rsp)
.cfi_adjust_cfa_offset 8
pushq 24(%rsp)
.cfi_adjust_cfa_offset 8
callq hipLaunchKernel
addq $136, %rsp
.cfi_adjust_cfa_offset -136
retq
.Lfunc_end0:
.size _Z21__device_stub__VecAddPfS_S_i, .Lfunc_end0-_Z21__device_stub__VecAddPfS_S_i
.cfi_endproc
# -- End function
.section .rodata.cst4,"aM",@progbits,4
.p2align 2, 0x0 # -- Begin function _Z10RandomInitPfi
.LCPI1_0:
.long 0x30000000 # float 4.65661287E-10
.text
.globl _Z10RandomInitPfi
.p2align 4, 0x90
.type _Z10RandomInitPfi,@function
_Z10RandomInitPfi: # @_Z10RandomInitPfi
.cfi_startproc
# %bb.0:
testl %esi, %esi
je .LBB1_4
# %bb.1: # %.lr.ph.preheader
pushq %r15
.cfi_def_cfa_offset 16
pushq %r14
.cfi_def_cfa_offset 24
pushq %rbx
.cfi_def_cfa_offset 32
.cfi_offset %rbx, -32
.cfi_offset %r14, -24
.cfi_offset %r15, -16
movl %esi, %ebx
movq %rdi, %r14
imull %ebx, %ebx
cmpl $1, %ebx
adcl $0, %ebx
xorl %r15d, %r15d
.p2align 4, 0x90
.LBB1_2: # %.lr.ph
# =>This Inner Loop Header: Depth=1
callq rand
xorps %xmm0, %xmm0
cvtsi2ss %eax, %xmm0
mulss .LCPI1_0(%rip), %xmm0
movss %xmm0, (%r14,%r15,4)
incq %r15
cmpq %r15, %rbx
jne .LBB1_2
# %bb.3:
popq %rbx
.cfi_def_cfa_offset 24
popq %r14
.cfi_def_cfa_offset 16
popq %r15
.cfi_def_cfa_offset 8
.cfi_restore %rbx
.cfi_restore %r14
.cfi_restore %r15
.LBB1_4: # %._crit_edge
retq
.Lfunc_end1:
.size _Z10RandomInitPfi, .Lfunc_end1-_Z10RandomInitPfi
.cfi_endproc
# -- End function
.globl _Z9readValuePiPcii # -- Begin function _Z9readValuePiPcii
.p2align 4, 0x90
.type _Z9readValuePiPcii,@function
_Z9readValuePiPcii: # @_Z9readValuePiPcii
.cfi_startproc
# %bb.0:
pushq %rbp
.cfi_def_cfa_offset 16
pushq %r15
.cfi_def_cfa_offset 24
pushq %r14
.cfi_def_cfa_offset 32
pushq %rbx
.cfi_def_cfa_offset 40
pushq %rax
.cfi_def_cfa_offset 48
.cfi_offset %rbx, -40
.cfi_offset %r14, -32
.cfi_offset %r15, -24
.cfi_offset %rbp, -16
movl %ecx, %ebx
movl %edx, %ebp
movq %rsi, %r14
movq %rdi, %r15
.p2align 4, 0x90
.LBB2_1: # =>This Inner Loop Header: Depth=1
movl $.L.str, %edi
movq %r14, %rsi
movl %ebp, %edx
movl %ebx, %ecx
xorl %eax, %eax
callq printf
movl $.L.str.1, %edi
movq %r15, %rsi
xorl %eax, %eax
callq __isoc23_scanf
movl (%r15), %eax
cmpl %ebx, %eax
jg .LBB2_1
# %bb.2: # in Loop: Header=BB2_1 Depth=1
cmpl %ebp, %eax
jl .LBB2_1
# %bb.3:
addq $8, %rsp
.cfi_def_cfa_offset 40
popq %rbx
.cfi_def_cfa_offset 32
popq %r14
.cfi_def_cfa_offset 24
popq %r15
.cfi_def_cfa_offset 16
popq %rbp
.cfi_def_cfa_offset 8
retq
.Lfunc_end2:
.size _Z9readValuePiPcii, .Lfunc_end2-_Z9readValuePiPcii
.cfi_endproc
# -- End function
.section .rodata.cst4,"aM",@progbits,4
.p2align 2, 0x0 # -- Begin function main
.LCPI3_0:
.long 0x30000000 # float 4.65661287E-10
.LCPI3_1:
.long 0x49742400 # float 1.0E+6
.section .rodata.cst16,"aM",@progbits,16
.p2align 4, 0x0
.LCPI3_2:
.long 0x7fffffff # float NaN
.long 0x7fffffff # float NaN
.long 0x7fffffff # float NaN
.long 0x7fffffff # float NaN
.section .rodata.cst8,"aM",@progbits,8
.p2align 3, 0x0
.LCPI3_3:
.quad 0x0000000000000000 # double 0
.text
.globl main
.p2align 4, 0x90
.type main,@function
main: # @main
.cfi_startproc
# %bb.0:
pushq %rbp
.cfi_def_cfa_offset 16
pushq %r15
.cfi_def_cfa_offset 24
pushq %r14
.cfi_def_cfa_offset 32
pushq %r13
.cfi_def_cfa_offset 40
pushq %r12
.cfi_def_cfa_offset 48
pushq %rbx
.cfi_def_cfa_offset 56
subq $232, %rsp
.cfi_def_cfa_offset 288
.cfi_offset %rbx, -56
.cfi_offset %r12, -48
.cfi_offset %r13, -40
.cfi_offset %r14, -32
.cfi_offset %r15, -24
.cfi_offset %rbp, -16
movl $0, 16(%rsp)
movl $0, 20(%rsp)
movl $0, 12(%rsp)
leaq 56(%rsp), %rdi
callq hipEventCreate
leaq 48(%rsp), %rdi
callq hipEventCreate
leaq 40(%rsp), %rdi
callq hipEventCreate
leaq 32(%rsp), %rdi
callq hipEventCreate
movl $.L.str.2, %edi
xorl %eax, %eax
callq printf
leaq 12(%rsp), %rsi
movl $.L.str.1, %edi
xorl %eax, %eax
callq __isoc23_scanf
movl 12(%rsp), %ebp
movl %ebp, %ebx
imull %ebx, %ebx
leaq (,%rbx,4), %r15
movq %r15, %rdi
callq malloc
movq %rax, %r13
movq %r15, %rdi
callq malloc
movq %rax, 72(%rsp) # 8-byte Spill
movq %r15, %rdi
callq malloc
movq %rax, %r12
testl %ebp, %ebp
je .LBB3_3
# %bb.1: # %.lr.ph.preheader.i
cmpl $1, %ebx
adcl $0, %ebx
xorl %r14d, %r14d
.p2align 4, 0x90
.LBB3_2: # %.lr.ph.i
# =>This Inner Loop Header: Depth=1
callq rand
xorps %xmm0, %xmm0
cvtsi2ss %eax, %xmm0
mulss .LCPI3_0(%rip), %xmm0
movss %xmm0, (%r13,%r14,4)
incq %r14
cmpq %r14, %rbx
jne .LBB3_2
.LBB3_3: # %_Z10RandomInitPfi.exit
movl 12(%rsp), %ebx
testl %ebx, %ebx
movq 72(%rsp), %rbp # 8-byte Reload
je .LBB3_6
# %bb.4: # %.lr.ph.preheader.i56
imull %ebx, %ebx
cmpl $1, %ebx
adcl $0, %ebx
xorl %r14d, %r14d
.p2align 4, 0x90
.LBB3_5: # %.lr.ph.i59
# =>This Inner Loop Header: Depth=1
callq rand
xorps %xmm0, %xmm0
cvtsi2ss %eax, %xmm0
mulss .LCPI3_0(%rip), %xmm0
movss %xmm0, (%rbp,%r14,4)
incq %r14
cmpq %r14, %rbx
jne .LBB3_5
.LBB3_6: # %_Z10RandomInitPfi.exit63
movl $.Lstr, %edi
callq puts@PLT
movq 56(%rsp), %rdi
xorl %esi, %esi
callq hipEventRecord
movl 12(%rsp), %eax
testl %eax, %eax
je .LBB3_9
# %bb.7: # %.lr.ph.preheader
imull %eax, %eax
cmpl $1, %eax
adcl $0, %eax
xorl %ecx, %ecx
.p2align 4, 0x90
.LBB3_8: # %.lr.ph
# =>This Inner Loop Header: Depth=1
movss (%r13,%rcx,4), %xmm0 # xmm0 = mem[0],zero,zero,zero
addss (%rbp,%rcx,4), %xmm0
movss %xmm0, (%r12,%rcx,4)
incq %rcx
cmpq %rcx, %rax
jne .LBB3_8
.LBB3_9: # %._crit_edge
movq 48(%rsp), %rdi
xorl %esi, %esi
callq hipEventRecord
movq 56(%rsp), %rsi
movq 48(%rsp), %rdx
leaq 28(%rsp), %rdi
callq hipEventElapsedTime
movss 28(%rsp), %xmm0 # xmm0 = mem[0],zero,zero,zero
cvtss2sd %xmm0, %xmm0
movl $.L.str.4, %edi
movb $1, %al
callq printf
movl 12(%rsp), %eax
leal (%rax,%rax,2), %eax
xorps %xmm0, %xmm0
cvtsi2ss %eax, %xmm0
movss 28(%rsp), %xmm1 # xmm1 = mem[0],zero,zero,zero
mulss .LCPI3_1(%rip), %xmm1
divss %xmm1, %xmm0
cvtss2sd %xmm0, %xmm0
movl $.L.str.5, %edi
movb $1, %al
callq printf
leaq 96(%rsp), %rdi
movq %r15, %rsi
callq hipMalloc
leaq 88(%rsp), %rdi
movq %r15, %rsi
callq hipMalloc
leaq 80(%rsp), %rdi
movq %r15, %rsi
callq hipMalloc
movq 96(%rsp), %rdi
movq %r13, 104(%rsp) # 8-byte Spill
movq %r13, %rsi
movq %r15, %rdx
movl $1, %ecx
callq hipMemcpy
movq 88(%rsp), %rdi
movq %rbp, %rsi
movq %r15, %rdx
movl $1, %ecx
callq hipMemcpy
leaq 16(%rsp), %r13
leaq 20(%rsp), %rbp
movq %r15, 112(%rsp) # 8-byte Spill
.LBB3_10: # =>This Loop Header: Depth=1
# Child Loop BB3_11 Depth 2
# Child Loop BB3_13 Depth 2
# Child Loop BB3_27 Depth 2
# Child Loop BB3_23 Depth 2
movq %r15, %rdi
callq malloc
movq %rax, %rbx
.p2align 4, 0x90
.LBB3_11: # Parent Loop BB3_10 Depth=1
# => This Inner Loop Header: Depth=2
movl $.L.str, %edi
movl $.L.str.6, %esi
movl $4, %edx
movl $32, %ecx
xorl %eax, %eax
callq printf
movl $.L.str.1, %edi
movq %r13, %rsi
xorl %eax, %eax
callq __isoc23_scanf
movl 16(%rsp), %ecx
leal -33(%rcx), %eax
cmpl $-29, %eax
jb .LBB3_11
# %bb.12: # %_Z9readValuePiPcii.exit
# in Loop: Header=BB3_10 Depth=1
movl 12(%rsp), %eax
addl %ecx, %eax
decl %eax
cltd
idivl %ecx
movl %eax, %r14d
.p2align 4, 0x90
.LBB3_13: # Parent Loop BB3_10 Depth=1
# => This Inner Loop Header: Depth=2
movl $.L.str, %edi
movl $.L.str.7, %esi
movl %r14d, %edx
movl $65535, %ecx # imm = 0xFFFF
xorl %eax, %eax
callq printf
movl $.L.str.1, %edi
movq %rbp, %rsi
xorl %eax, %eax
callq __isoc23_scanf
movl 20(%rsp), %edx
cmpl $65535, %edx # imm = 0xFFFF
jg .LBB3_13
# %bb.14: # in Loop: Header=BB3_13 Depth=2
cmpl %r14d, %edx
jl .LBB3_13
# %bb.15: # %_Z9readValuePiPcii.exit68
# in Loop: Header=BB3_10 Depth=1
movl 16(%rsp), %esi
movl $.L.str.8, %edi
xorl %eax, %eax
callq printf
movl $.Lstr.1, %edi
callq puts@PLT
movl 16(%rsp), %eax
movq %rax, %r14
shlq $32, %r14
orq %rax, %r14
movl 20(%rsp), %eax
movq %rax, %r15
shlq $32, %r15
orq %rax, %r15
movq 40(%rsp), %rdi
xorl %esi, %esi
callq hipEventRecord
movl 16(%rsp), %esi
imull 20(%rsp), %esi
movl $.L.str.10, %edi
xorl %eax, %eax
callq printf
movq %r15, %rdi
movl $1, %esi
movq %r14, %rdx
movl $1, %ecx
xorl %r8d, %r8d
xorl %r9d, %r9d
callq __hipPushCallConfiguration
testl %eax, %eax
jne .LBB3_17
# %bb.16: # in Loop: Header=BB3_10 Depth=1
movq 96(%rsp), %rax
movq 88(%rsp), %rcx
movq 80(%rsp), %rdx
movl 12(%rsp), %esi
movq %rax, 184(%rsp)
movq %rcx, 176(%rsp)
movq %rdx, 168(%rsp)
movl %esi, 68(%rsp)
leaq 184(%rsp), %rax
movq %rax, 192(%rsp)
leaq 176(%rsp), %rax
movq %rax, 200(%rsp)
leaq 168(%rsp), %rax
movq %rax, 208(%rsp)
leaq 68(%rsp), %rax
movq %rax, 216(%rsp)
leaq 152(%rsp), %rdi
leaq 136(%rsp), %rsi
leaq 128(%rsp), %rdx
leaq 120(%rsp), %rcx
callq __hipPopCallConfiguration
movq 152(%rsp), %rsi
movl 160(%rsp), %edx
movq 136(%rsp), %rcx
movl 144(%rsp), %r8d
movl $_Z6VecAddPfS_S_i, %edi
leaq 192(%rsp), %r9
pushq 120(%rsp)
.cfi_adjust_cfa_offset 8
pushq 136(%rsp)
.cfi_adjust_cfa_offset 8
callq hipLaunchKernel
addq $16, %rsp
.cfi_adjust_cfa_offset -16
.LBB3_17: # in Loop: Header=BB3_10 Depth=1
movq 32(%rsp), %rdi
xorl %esi, %esi
callq hipEventRecord
movq 32(%rsp), %rdi
callq hipEventSynchronize
movq 40(%rsp), %rsi
movq 32(%rsp), %rdx
leaq 24(%rsp), %rdi
callq hipEventElapsedTime
movss 24(%rsp), %xmm0 # xmm0 = mem[0],zero,zero,zero
cvtss2sd %xmm0, %xmm0
movl $.L.str.11, %edi
movb $1, %al
callq printf
movl 12(%rsp), %eax
leal (%rax,%rax,2), %eax
xorps %xmm0, %xmm0
cvtsi2ss %eax, %xmm0
movss 24(%rsp), %xmm1 # xmm1 = mem[0],zero,zero,zero
mulss .LCPI3_1(%rip), %xmm1
divss %xmm1, %xmm0
cvtss2sd %xmm0, %xmm0
movl $.L.str.12, %edi
movb $1, %al
callq printf
movq 80(%rsp), %rsi
movq %rbx, %rdi
movq 112(%rsp), %r15 # 8-byte Reload
movq %r15, %rdx
movl $2, %ecx
callq hipMemcpy
movss 28(%rsp), %xmm0 # xmm0 = mem[0],zero,zero,zero
divss 24(%rsp), %xmm0
cvtss2sd %xmm0, %xmm0
movl $.L.str.13, %edi
movb $1, %al
callq printf
movl 12(%rsp), %eax
testl %eax, %eax
je .LBB3_18
# %bb.26: # %.lr.ph76.preheader
# in Loop: Header=BB3_10 Depth=1
imull %eax, %eax
cmpl $1, %eax
adcl $0, %eax
xorps %xmm0, %xmm0
xorl %ecx, %ecx
movaps .LCPI3_2(%rip), %xmm2 # xmm2 = [NaN,NaN,NaN,NaN]
.p2align 4, 0x90
.LBB3_27: # %.lr.ph76
# Parent Loop BB3_10 Depth=1
# => This Inner Loop Header: Depth=2
movss (%rbx,%rcx,4), %xmm1 # xmm1 = mem[0],zero,zero,zero
subss (%r12,%rcx,4), %xmm1
andps %xmm2, %xmm1
cvtss2sd %xmm1, %xmm1
mulsd %xmm1, %xmm1
addsd %xmm1, %xmm0
incq %rcx
cmpq %rcx, %rax
jne .LBB3_27
# %bb.19: # %._crit_edge77
# in Loop: Header=BB3_10 Depth=1
ucomisd .LCPI3_3(%rip), %xmm0
jb .LBB3_21
.LBB3_20: # in Loop: Header=BB3_10 Depth=1
sqrtsd %xmm0, %xmm0
jmp .LBB3_22
.p2align 4, 0x90
.LBB3_18: # in Loop: Header=BB3_10 Depth=1
xorps %xmm0, %xmm0
ucomisd .LCPI3_3(%rip), %xmm0
jae .LBB3_20
.LBB3_21: # %call.sqrt
# in Loop: Header=BB3_10 Depth=1
callq sqrt
.LBB3_22: # %._crit_edge77.split
# in Loop: Header=BB3_10 Depth=1
movl $.L.str.14, %edi
movb $1, %al
callq printf
movl $.L.str.15, %edi
xorl %eax, %eax
callq printf
.p2align 4, 0x90
.LBB3_23: # Parent Loop BB3_10 Depth=1
# => This Inner Loop Header: Depth=2
movq stdin(%rip), %rdi
callq getc
cmpb $110, %al
je .LBB3_28
# %bb.24: # in Loop: Header=BB3_23 Depth=2
movzbl %al, %eax
cmpl $121, %eax
jne .LBB3_23
# %bb.25: # %.critedge
# in Loop: Header=BB3_10 Depth=1
movq %rbx, %rdi
callq free
jmp .LBB3_10
.LBB3_28:
movq 104(%rsp), %rdi # 8-byte Reload
callq free
movq 72(%rsp), %rdi # 8-byte Reload
callq free
movq %r12, %rdi
callq free
movq 40(%rsp), %rdi
callq hipEventDestroy
movq 32(%rsp), %rdi
callq hipEventDestroy
movq 56(%rsp), %rdi
callq hipEventDestroy
movq 48(%rsp), %rdi
callq hipEventDestroy
xorl %eax, %eax
addq $232, %rsp
.cfi_def_cfa_offset 56
popq %rbx
.cfi_def_cfa_offset 48
popq %r12
.cfi_def_cfa_offset 40
popq %r13
.cfi_def_cfa_offset 32
popq %r14
.cfi_def_cfa_offset 24
popq %r15
.cfi_def_cfa_offset 16
popq %rbp
.cfi_def_cfa_offset 8
retq
.Lfunc_end3:
.size main, .Lfunc_end3-main
.cfi_endproc
# -- End function
.p2align 4, 0x90 # -- Begin function __hip_module_ctor
.type __hip_module_ctor,@function
__hip_module_ctor: # @__hip_module_ctor
.cfi_startproc
# %bb.0:
subq $40, %rsp
.cfi_def_cfa_offset 48
cmpq $0, __hip_gpubin_handle(%rip)
jne .LBB4_2
# %bb.1:
movl $__hip_fatbin_wrapper, %edi
callq __hipRegisterFatBinary
movq %rax, __hip_gpubin_handle(%rip)
.LBB4_2:
movq __hip_gpubin_handle(%rip), %rdi
xorps %xmm0, %xmm0
movups %xmm0, 16(%rsp)
movups %xmm0, (%rsp)
movl $_Z6VecAddPfS_S_i, %esi
movl $.L__unnamed_1, %edx
movl $.L__unnamed_1, %ecx
movl $-1, %r8d
xorl %r9d, %r9d
callq __hipRegisterFunction
movl $__hip_module_dtor, %edi
addq $40, %rsp
.cfi_def_cfa_offset 8
jmp atexit # TAILCALL
.Lfunc_end4:
.size __hip_module_ctor, .Lfunc_end4-__hip_module_ctor
.cfi_endproc
# -- End function
.p2align 4, 0x90 # -- Begin function __hip_module_dtor
.type __hip_module_dtor,@function
__hip_module_dtor: # @__hip_module_dtor
.cfi_startproc
# %bb.0:
movq __hip_gpubin_handle(%rip), %rdi
testq %rdi, %rdi
je .LBB5_2
# %bb.1:
pushq %rax
.cfi_def_cfa_offset 16
callq __hipUnregisterFatBinary
movq $0, __hip_gpubin_handle(%rip)
addq $8, %rsp
.cfi_def_cfa_offset 8
.LBB5_2:
retq
.Lfunc_end5:
.size __hip_module_dtor, .Lfunc_end5-__hip_module_dtor
.cfi_endproc
# -- End function
.type _Z6VecAddPfS_S_i,@object # @_Z6VecAddPfS_S_i
.section .rodata,"a",@progbits
.globl _Z6VecAddPfS_S_i
.p2align 3, 0x0
_Z6VecAddPfS_S_i:
.quad _Z21__device_stub__VecAddPfS_S_i
.size _Z6VecAddPfS_S_i, 8
.type .L.str,@object # @.str
.section .rodata.str1.1,"aMS",@progbits,1
.L.str:
.asciz "%s(%d-%d): "
.size .L.str, 12
.type .L.str.1,@object # @.str.1
.L.str.1:
.asciz "%d"
.size .L.str.1, 3
.type .L.str.2,@object # @.str.2
.L.str.2:
.asciz "Enter the size: "
.size .L.str.2, 17
.type .L.str.4,@object # @.str.4
.L.str.4:
.asciz "Processing time for CPU: %5.5f (ms)\n"
.size .L.str.4, 37
.type .L.str.5,@object # @.str.5
.L.str.5:
.asciz "CPU: %fGflops\n"
.size .L.str.5, 15
.type .L.str.6,@object # @.str.6
.L.str.6:
.asciz "Enter no. of threads per block(input of 'P' will construct PxP threads in block)"
.size .L.str.6, 81
.type .L.str.7,@object # @.str.7
.L.str.7:
.asciz "Enter no. of blocks in grid(input of 'P' will construct PxP blocks)"
.size .L.str.7, 68
.type .L.str.8,@object # @.str.8
.L.str.8:
.asciz "Threads Per block: %d, Blocks in grid: %d\n"
.size .L.str.8, 43
.type .L.str.10,@object # @.str.10
.L.str.10:
.asciz "Total linear threads: %d\n"
.size .L.str.10, 26
.type .L.str.11,@object # @.str.11
.L.str.11:
.asciz "Processing time for GPU: %5.5f (ms)\n"
.size .L.str.11, 37
.type .L.str.12,@object # @.str.12
.L.str.12:
.asciz "GPU: %fGflops\n"
.size .L.str.12, 15
.type .L.str.13,@object # @.str.13
.L.str.13:
.asciz "Speedup: %5.5f\n"
.size .L.str.13, 16
.type .L.str.14,@object # @.str.14
.L.str.14:
.asciz "norm(h_C - h_D)=%20.15e\n\n"
.size .L.str.14, 26
.type .L.str.15,@object # @.str.15
.L.str.15:
.asciz "Again?(y/n): "
.size .L.str.15, 14
.type .L__unnamed_1,@object # @0
.L__unnamed_1:
.asciz "_Z6VecAddPfS_S_i"
.size .L__unnamed_1, 17
.type __hip_fatbin_wrapper,@object # @__hip_fatbin_wrapper
.section .hipFatBinSegment,"a",@progbits
.p2align 3, 0x0
__hip_fatbin_wrapper:
.long 1212764230 # 0x48495046
.long 1 # 0x1
.quad __hip_fatbin
.quad 0
.size __hip_fatbin_wrapper, 24
.type __hip_gpubin_handle,@object # @__hip_gpubin_handle
.local __hip_gpubin_handle
.comm __hip_gpubin_handle,8,8
.section .init_array,"aw",@init_array
.p2align 3, 0x0
.quad __hip_module_ctor
.type __hip_cuid_,@object # @__hip_cuid_
.bss
.globl __hip_cuid_
__hip_cuid_:
.byte 0 # 0x0
.size __hip_cuid_, 1
.type .Lstr,@object # @str
.section .rodata.str1.1,"aMS",@progbits,1
.Lstr:
.asciz "Adding matrices on CPU..."
.size .Lstr, 26
.type .Lstr.1,@object # @str.1
.Lstr.1:
.asciz "Adding matrices on GPU.."
.size .Lstr.1, 25
.section ".linker-options","e",@llvm_linker_options
.ident "AMD clang version 18.0.0git (https://github.com/RadeonOpenCompute/llvm-project roc-6.3.2 25012 e5bf7e55c91490b07c49d8960fa7983d864936c4)"
.section ".note.GNU-stack","",@progbits
.addrsig
.addrsig_sym _Z21__device_stub__VecAddPfS_S_i
.addrsig_sym __hip_module_ctor
.addrsig_sym __hip_module_dtor
.addrsig_sym _Z6VecAddPfS_S_i
.addrsig_sym __hip_fatbin
.addrsig_sym __hip_fatbin_wrapper
.addrsig_sym __hip_cuid_ |
You are a helpful coding assistant specialized in converting CUDA source code to CUDA device assembly. | #include <cuda.h>
#include <stdlib.h>
#include <time.h>
#include <stdio.h>
#include <math.h>
// N Time
// 1 << 10 0.0009
// 1 << 15 0.0024
// 1 << 17 0.011
// 1 << 18 0.017
// 1 << 20 0.049
// 1 << 21 0.084
#define gpuErrCheck(ans) { gpuAssert((ans), __FILE__, __LINE__); }
inline void gpuAssert(cudaError_t code, const char *file, int line) {
if (code != cudaSuccess) {
fprintf(stderr, "GPUassert: %s %s %d\n", cudaGetErrorString(code), file, line);
}
}
#define O_TILE_WIDTH 16
#define MASK_WIDTH 5
#define BLOCK_WIDTH (O_TILE_WIDTH + (MASK_WIDTH - 1))
__constant__ float M[MASK_WIDTH];
__global__ void convolution_2D_basic_kernel(float *N, float *P, long Width) {
__shared__ float N_ds[BLOCK_WIDTH];
int index_i = blockIdx.x * blockDim.x + threadIdx.x;
int j;
if ((index_i >= 0) && (index_i < Width)) {
N_ds[threadIdx.x + (MASK_WIDTH / 2)] = N[index_i];
// Repeating border for edge cases
if (threadIdx.x < (MASK_WIDTH / 2)) {
if (index_i - (MASK_WIDTH / 2) <= 0) N_ds[threadIdx.x] = N[index_i];
else N_ds[threadIdx.x] = N[index_i - (MASK_WIDTH / 2)];
}
if (threadIdx.x > (MASK_WIDTH / 2)) {
if (index_i + (MASK_WIDTH / 2) >= Width - 1) N_ds[threadIdx.x] = N[Width - 1];
else N_ds[threadIdx.x] = N[index_i + (MASK_WIDTH / 2)];
}
// printf("Copying %d %d %f\n", index_i, threadIdx.x, N_ds[threadIdx.x]);
} else {
// N_ds[threadIdx.x] = 0.0f;
}
float output = 0.0f;
if (threadIdx.x < O_TILE_WIDTH) {
for (j = 0; j < MASK_WIDTH; j++) {
output += M[j] * N_ds[j + threadIdx.x];
}
// printf("%d %f\n", blockIdx.x * O_TILE_WIDTH + threadIdx.x, output);
P[blockIdx.x * O_TILE_WIDTH + threadIdx.x] = output;
}
}
void generateMat(float *m, size_t height, size_t width){
int i, j;
for (i = 0; i < height; i++){
for (j = 0; j < width; j++) {
m[i*width+j] = rand() % 100;
}
}
}
void printMat(float *m, size_t height, size_t width) {
int i, j;
for (i = 0; i < height; i++){
for (j = 0; j < width; j++) {
printf("%f ", m[i*width+j]);
}
printf("\n");
}
printf("\n");
}
int main(int argc, char**argv){
long width = 1<<18;
srand(time(NULL));
float mask[MASK_WIDTH];
for (int i = 0; i < MASK_WIDTH; i++) {
mask[i] = 1.0/MASK_WIDTH;
}
cudaEvent_t start, stop;
cudaEventCreate(&start);
cudaEventCreate(&stop);
cudaEventRecord(start, 0);
float * m, *n, *p;
float * d_m, *d_p, *d_n;
long mSize = MASK_WIDTH * sizeof(float);
long nSize = width * sizeof(float);
long pSize = width * sizeof(float);
cudaMalloc((void**)&d_m, mSize);
cudaMalloc((void**)&d_n, nSize);
cudaMalloc((void**)&d_p, pSize);
m = (float *)malloc(mSize);
n = (float *)malloc(nSize);
p = (float *)malloc(pSize);
generateMat(n, 1, width);
// printMat(n, 1, width);
gpuErrCheck( cudaMemcpy(d_n, n, nSize, cudaMemcpyHostToDevice) )
gpuErrCheck( cudaMemcpyToSymbol(M, &mask, mSize) );
dim3 blockDims(O_TILE_WIDTH,1,1);
int blockNum = ((width-1)/(O_TILE_WIDTH))+ 1;
dim3 gridDims(blockNum, 1, 1);
convolution_2D_basic_kernel<<<gridDims, blockDims>>>(d_n, d_p, width);
gpuErrCheck( cudaPeekAtLastError() );
gpuErrCheck( cudaDeviceSynchronize() );
gpuErrCheck( cudaMemcpy(p, d_p, pSize, cudaMemcpyDeviceToHost) );
// printMat(p, 1, width);
cudaEventRecord(stop, 0);
cudaEventSynchronize(stop);
float elapsedTime;
cudaEventElapsedTime(&elapsedTime, start, stop);
cudaEventDestroy(start);
cudaEventDestroy(stop);
printf("The elapsed time is %f s\n", elapsedTime / 1000.0);
free(n); free(m); free(p);
cudaFree(d_n);
cudaFree(d_m);
cudaFree(d_p);
} | code for sm_80
Function : _Z27convolution_2D_basic_kernelPfS_l
.headerflags @"EF_CUDA_TEXMODE_UNIFIED EF_CUDA_64BIT_ADDRESS EF_CUDA_SM80 EF_CUDA_VIRTUAL_SM(EF_CUDA_SM80)"
/*0000*/ IMAD.MOV.U32 R1, RZ, RZ, c[0x0][0x28] ; /* 0x00000a00ff017624 */
/* 0x000fe400078e00ff */
/*0010*/ S2R R6, SR_CTAID.X ; /* 0x0000000000067919 */
/* 0x000e220000002500 */
/*0020*/ ULDC.64 UR4, c[0x0][0x118] ; /* 0x0000460000047ab9 */
/* 0x000fe20000000a00 */
/*0030*/ BSSY B0, 0x2a0 ; /* 0x0000026000007945 */
/* 0x000fe40003800000 */
/*0040*/ S2R R11, SR_TID.X ; /* 0x00000000000b7919 */
/* 0x000e240000002100 */
/*0050*/ IMAD R0, R6, c[0x0][0x0], R11 ; /* 0x0000000006007a24 */
/* 0x001fca00078e020b */
/*0060*/ ISETP.GE.U32.AND P0, PT, R0, c[0x0][0x170], PT ; /* 0x00005c0000007a0c */
/* 0x000fe40003f06070 */
/*0070*/ SHF.R.S32.HI R3, RZ, 0x1f, R0 ; /* 0x0000001fff037819 */
/* 0x000fc80000011400 */
/*0080*/ ISETP.GE.AND.EX P0, PT, R3, c[0x0][0x174], PT, P0 ; /* 0x00005d0003007a0c */
/* 0x000fc80003f06300 */
/*0090*/ ISETP.LT.OR P0, PT, R0, RZ, P0 ; /* 0x000000ff0000720c */
/* 0x000fda0000701670 */
/*00a0*/ @P0 BRA 0x290 ; /* 0x000001e000000947 */
/* 0x000fea0003800000 */
/*00b0*/ LEA R2, P0, R0, c[0x0][0x160], 0x2 ; /* 0x0000580000027a11 */
/* 0x000fc800078010ff */
/*00c0*/ LEA.HI.X R3, R0, c[0x0][0x164], R3, 0x2, P0 ; /* 0x0000590000037a11 */
/* 0x000fca00000f1403 */
/*00d0*/ LDG.E R4, [R2.64] ; /* 0x0000000402047981 */
/* 0x000ea2000c1e1900 */
/*00e0*/ ISETP.GT.U32.AND P0, PT, R11, 0x1, PT ; /* 0x000000010b00780c */
/* 0x000fe20003f04070 */
/*00f0*/ BSSY B1, 0x190 ; /* 0x0000009000017945 */
/* 0x000fe40003800000 */
/*0100*/ STS [R11.X4+0x8], R4 ; /* 0x000008040b007388 */
/* 0x0041f40000004800 */
/*0110*/ @P0 BRA 0x180 ; /* 0x0000006000000947 */
/* 0x000fea0003800000 */
/*0120*/ ISETP.GE.AND P0, PT, R0, 0x3, PT ; /* 0x000000030000780c */
/* 0x000fda0003f06270 */
/*0130*/ @!P0 BRA 0x170 ; /* 0x0000003000008947 */
/* 0x000fea0003800000 */
/*0140*/ LDG.E R4, [R2.64+-0x8] ; /* 0xfffff80402047981 */
/* 0x001ea8000c1e1900 */
/*0150*/ STS [R11.X4], R4 ; /* 0x000000040b007388 */
/* 0x0041e20000004800 */
/*0160*/ BRA 0x180 ; /* 0x0000001000007947 */
/* 0x000fea0003800000 */
/*0170*/ STS [R11.X4], R4 ; /* 0x000000040b007388 */
/* 0x0003e40000004800 */
/*0180*/ BSYNC B1 ; /* 0x0000000000017941 */
/* 0x000fea0003800000 */
/*0190*/ ISETP.GE.U32.AND P0, PT, R11, 0x3, PT ; /* 0x000000030b00780c */
/* 0x000fda0003f06070 */
/*01a0*/ @!P0 BRA 0x290 ; /* 0x000000e000008947 */
/* 0x000fea0003800000 */
/*01b0*/ IMAD.MOV.U32 R5, RZ, RZ, 0x1 ; /* 0x00000001ff057424 */
/* 0x000fe200078e00ff */
/*01c0*/ IADD3 R0, R0, 0x2, RZ ; /* 0x0000000200007810 */
/* 0x000fe20007ffe0ff */
/*01d0*/ IMAD.MOV.U32 R7, RZ, RZ, c[0x0][0x174] ; /* 0x00005d00ff077624 */
/* 0x000fc600078e00ff */
/*01e0*/ IADD3 R5, P1, -R5, c[0x0][0x170], RZ ; /* 0x00005c0005057a10 */
/* 0x000fe40007f3e1ff */
/*01f0*/ SHF.R.S32.HI R4, RZ, 0x1f, R0 ; /* 0x0000001fff047819 */
/* 0x003fe40000011400 */
/*0200*/ ISETP.GT.U32.AND P0, PT, R5, R0, PT ; /* 0x000000000500720c */
/* 0x000fe40003f04070 */
/*0210*/ IADD3.X R0, R7, -0x1, RZ, P1, !PT ; /* 0xffffffff07007810 */
/* 0x000fc80000ffe4ff */
/*0220*/ ISETP.GT.AND.EX P0, PT, R0, R4, PT, P0 ; /* 0x000000040000720c */
/* 0x000fda0003f04300 */
/*0230*/ @!P0 LEA R4, P1, R5.reuse, c[0x0][0x160], 0x2 ; /* 0x0000580005048a11 */
/* 0x040fe200078210ff */
/*0240*/ @P0 LDG.E R2, [R2.64+0x8] ; /* 0x0000080402020981 */
/* 0x000ea6000c1e1900 */
/*0250*/ @!P0 LEA.HI.X R5, R5, c[0x0][0x164], R0, 0x2, P1 ; /* 0x0000590005058a11 */
/* 0x000fca00008f1400 */
/*0260*/ @!P0 LDG.E R4, [R4.64] ; /* 0x0000000404048981 */
/* 0x000ee8000c1e1900 */
/*0270*/ @!P0 STS [R11.X4], R4 ; /* 0x000000040b008388 */
/* 0x0081e80000004800 */
/*0280*/ @P0 STS [R11.X4], R2 ; /* 0x000000020b000388 */
/* 0x0041e40000004800 */
/*0290*/ BSYNC B0 ; /* 0x0000000000007941 */
/* 0x000fea0003800000 */
/*02a0*/ ISETP.GT.U32.AND P0, PT, R11, 0xf, PT ; /* 0x0000000f0b00780c */
/* 0x000fda0003f04070 */
/*02b0*/ @P0 EXIT ; /* 0x000000000000094d */
/* 0x000fea0003800000 */
/*02c0*/ LDS R0, [R11.X4] ; /* 0x000000000b007984 */
/* 0x000ea20000004800 */
/*02d0*/ IMAD R2, R6, 0x10, R11 ; /* 0x0000001006027824 */
/* 0x001fc600078e020b */
/*02e0*/ LDS R3, [R11.X4+0x4] ; /* 0x000004000b037984 */
/* 0x000e280000004800 */
/*02f0*/ LDS R5, [R11.X4+0x8] ; /* 0x000008000b057984 */
/* 0x000ee80000004800 */
/*0300*/ LDS R7, [R11.X4+0xc] ; /* 0x00000c000b077984 */
/* 0x000f280000004800 */
/*0310*/ LDS R9, [R11.X4+0x10] ; /* 0x000010000b097984 */
/* 0x000f620000004800 */
/*0320*/ FFMA R0, R0, c[0x3][0x0], RZ ; /* 0x00c0000000007a23 */
/* 0x004fc800000000ff */
/*0330*/ FFMA R0, R3, c[0x3][0x4], R0 ; /* 0x00c0010003007a23 */
/* 0x001fe40000000000 */
/*0340*/ IMAD.MOV.U32 R3, RZ, RZ, 0x4 ; /* 0x00000004ff037424 */
/* 0x000fe400078e00ff */
/*0350*/ FFMA R0, R5, c[0x3][0x8], R0 ; /* 0x00c0020005007a23 */
/* 0x008fe40000000000 */
/*0360*/ IMAD.WIDE.U32 R2, R2, R3, c[0x0][0x168] ; /* 0x00005a0002027625 */
/* 0x000fc800078e0003 */
/*0370*/ FFMA R0, R7, c[0x3][0xc], R0 ; /* 0x00c0030007007a23 */
/* 0x010fc80000000000 */
/*0380*/ FFMA R9, R9, c[0x3][0x10], R0 ; /* 0x00c0040009097a23 */
/* 0x020fca0000000000 */
/*0390*/ STG.E [R2.64], R9 ; /* 0x0000000902007986 */
/* 0x000fe2000c101904 */
/*03a0*/ EXIT ; /* 0x000000000000794d */
/* 0x000fea0003800000 */
/*03b0*/ BRA 0x3b0; /* 0xfffffff000007947 */
/* 0x000fc0000383ffff */
/*03c0*/ NOP; /* 0x0000000000007918 */
/* 0x000fc00000000000 */
/*03d0*/ NOP; /* 0x0000000000007918 */
/* 0x000fc00000000000 */
/*03e0*/ NOP; /* 0x0000000000007918 */
/* 0x000fc00000000000 */
/*03f0*/ NOP; /* 0x0000000000007918 */
/* 0x000fc00000000000 */
/*0400*/ NOP; /* 0x0000000000007918 */
/* 0x000fc00000000000 */
/*0410*/ NOP; /* 0x0000000000007918 */
/* 0x000fc00000000000 */
/*0420*/ NOP; /* 0x0000000000007918 */
/* 0x000fc00000000000 */
/*0430*/ NOP; /* 0x0000000000007918 */
/* 0x000fc00000000000 */
/*0440*/ NOP; /* 0x0000000000007918 */
/* 0x000fc00000000000 */
/*0450*/ NOP; /* 0x0000000000007918 */
/* 0x000fc00000000000 */
/*0460*/ NOP; /* 0x0000000000007918 */
/* 0x000fc00000000000 */
/*0470*/ NOP; /* 0x0000000000007918 */
/* 0x000fc00000000000 */
.......... |
You are a helpful coding assistant specialized in converting CUDA source code to CUDA host assembly. | #include <cuda.h>
#include <stdlib.h>
#include <time.h>
#include <stdio.h>
#include <math.h>
// N Time
// 1 << 10 0.0009
// 1 << 15 0.0024
// 1 << 17 0.011
// 1 << 18 0.017
// 1 << 20 0.049
// 1 << 21 0.084
#define gpuErrCheck(ans) { gpuAssert((ans), __FILE__, __LINE__); }
inline void gpuAssert(cudaError_t code, const char *file, int line) {
if (code != cudaSuccess) {
fprintf(stderr, "GPUassert: %s %s %d\n", cudaGetErrorString(code), file, line);
}
}
#define O_TILE_WIDTH 16
#define MASK_WIDTH 5
#define BLOCK_WIDTH (O_TILE_WIDTH + (MASK_WIDTH - 1))
__constant__ float M[MASK_WIDTH];
__global__ void convolution_2D_basic_kernel(float *N, float *P, long Width) {
__shared__ float N_ds[BLOCK_WIDTH];
int index_i = blockIdx.x * blockDim.x + threadIdx.x;
int j;
if ((index_i >= 0) && (index_i < Width)) {
N_ds[threadIdx.x + (MASK_WIDTH / 2)] = N[index_i];
// Repeating border for edge cases
if (threadIdx.x < (MASK_WIDTH / 2)) {
if (index_i - (MASK_WIDTH / 2) <= 0) N_ds[threadIdx.x] = N[index_i];
else N_ds[threadIdx.x] = N[index_i - (MASK_WIDTH / 2)];
}
if (threadIdx.x > (MASK_WIDTH / 2)) {
if (index_i + (MASK_WIDTH / 2) >= Width - 1) N_ds[threadIdx.x] = N[Width - 1];
else N_ds[threadIdx.x] = N[index_i + (MASK_WIDTH / 2)];
}
// printf("Copying %d %d %f\n", index_i, threadIdx.x, N_ds[threadIdx.x]);
} else {
// N_ds[threadIdx.x] = 0.0f;
}
float output = 0.0f;
if (threadIdx.x < O_TILE_WIDTH) {
for (j = 0; j < MASK_WIDTH; j++) {
output += M[j] * N_ds[j + threadIdx.x];
}
// printf("%d %f\n", blockIdx.x * O_TILE_WIDTH + threadIdx.x, output);
P[blockIdx.x * O_TILE_WIDTH + threadIdx.x] = output;
}
}
void generateMat(float *m, size_t height, size_t width){
int i, j;
for (i = 0; i < height; i++){
for (j = 0; j < width; j++) {
m[i*width+j] = rand() % 100;
}
}
}
void printMat(float *m, size_t height, size_t width) {
int i, j;
for (i = 0; i < height; i++){
for (j = 0; j < width; j++) {
printf("%f ", m[i*width+j]);
}
printf("\n");
}
printf("\n");
}
int main(int argc, char**argv){
long width = 1<<18;
srand(time(NULL));
float mask[MASK_WIDTH];
for (int i = 0; i < MASK_WIDTH; i++) {
mask[i] = 1.0/MASK_WIDTH;
}
cudaEvent_t start, stop;
cudaEventCreate(&start);
cudaEventCreate(&stop);
cudaEventRecord(start, 0);
float * m, *n, *p;
float * d_m, *d_p, *d_n;
long mSize = MASK_WIDTH * sizeof(float);
long nSize = width * sizeof(float);
long pSize = width * sizeof(float);
cudaMalloc((void**)&d_m, mSize);
cudaMalloc((void**)&d_n, nSize);
cudaMalloc((void**)&d_p, pSize);
m = (float *)malloc(mSize);
n = (float *)malloc(nSize);
p = (float *)malloc(pSize);
generateMat(n, 1, width);
// printMat(n, 1, width);
gpuErrCheck( cudaMemcpy(d_n, n, nSize, cudaMemcpyHostToDevice) )
gpuErrCheck( cudaMemcpyToSymbol(M, &mask, mSize) );
dim3 blockDims(O_TILE_WIDTH,1,1);
int blockNum = ((width-1)/(O_TILE_WIDTH))+ 1;
dim3 gridDims(blockNum, 1, 1);
convolution_2D_basic_kernel<<<gridDims, blockDims>>>(d_n, d_p, width);
gpuErrCheck( cudaPeekAtLastError() );
gpuErrCheck( cudaDeviceSynchronize() );
gpuErrCheck( cudaMemcpy(p, d_p, pSize, cudaMemcpyDeviceToHost) );
// printMat(p, 1, width);
cudaEventRecord(stop, 0);
cudaEventSynchronize(stop);
float elapsedTime;
cudaEventElapsedTime(&elapsedTime, start, stop);
cudaEventDestroy(start);
cudaEventDestroy(stop);
printf("The elapsed time is %f s\n", elapsedTime / 1000.0);
free(n); free(m); free(p);
cudaFree(d_n);
cudaFree(d_m);
cudaFree(d_p);
} | .file "tmpxft_000f7d97_00000000-6_conv_tiled1.cudafe1.cpp"
.text
#APP
#NO_APP
.type _ZL26__cudaUnregisterBinaryUtilv, @function
_ZL26__cudaUnregisterBinaryUtilv:
.LFB2063:
.cfi_startproc
endbr64
subq $8, %rsp
.cfi_def_cfa_offset 16
movq _ZL20__cudaFatCubinHandle(%rip), %rdi
call __cudaUnregisterFatBinary@PLT
addq $8, %rsp
.cfi_def_cfa_offset 8
ret
.cfi_endproc
.LFE2063:
.size _ZL26__cudaUnregisterBinaryUtilv, .-_ZL26__cudaUnregisterBinaryUtilv
.section .rodata._Z9gpuAssert9cudaErrorPKci.str1.1,"aMS",@progbits,1
.LC0:
.string "GPUassert: %s %s %d\n"
.section .text._Z9gpuAssert9cudaErrorPKci,"axG",@progbits,_Z9gpuAssert9cudaErrorPKci,comdat
.weak _Z9gpuAssert9cudaErrorPKci
.type _Z9gpuAssert9cudaErrorPKci, @function
_Z9gpuAssert9cudaErrorPKci:
.LFB2057:
.cfi_startproc
endbr64
testl %edi, %edi
jne .L9
ret
.L9:
pushq %rbp
.cfi_def_cfa_offset 16
.cfi_offset 6, -16
pushq %rbx
.cfi_def_cfa_offset 24
.cfi_offset 3, -24
subq $8, %rsp
.cfi_def_cfa_offset 32
movq %rsi, %rbx
movl %edx, %ebp
call cudaGetErrorString@PLT
movq %rax, %rcx
movl %ebp, %r9d
movq %rbx, %r8
leaq .LC0(%rip), %rdx
movl $2, %esi
movq stderr(%rip), %rdi
movl $0, %eax
call __fprintf_chk@PLT
addq $8, %rsp
.cfi_def_cfa_offset 24
popq %rbx
.cfi_def_cfa_offset 16
popq %rbp
.cfi_def_cfa_offset 8
ret
.cfi_endproc
.LFE2057:
.size _Z9gpuAssert9cudaErrorPKci, .-_Z9gpuAssert9cudaErrorPKci
.text
.globl _Z11generateMatPfmm
.type _Z11generateMatPfmm, @function
_Z11generateMatPfmm:
.LFB2058:
.cfi_startproc
endbr64
testq %rsi, %rsi
je .L19
pushq %r15
.cfi_def_cfa_offset 16
.cfi_offset 15, -16
pushq %r14
.cfi_def_cfa_offset 24
.cfi_offset 14, -24
pushq %r13
.cfi_def_cfa_offset 32
.cfi_offset 13, -32
pushq %r12
.cfi_def_cfa_offset 40
.cfi_offset 12, -40
pushq %rbp
.cfi_def_cfa_offset 48
.cfi_offset 6, -48
pushq %rbx
.cfi_def_cfa_offset 56
.cfi_offset 3, -56
subq $8, %rsp
.cfi_def_cfa_offset 64
movq %rsi, %r14
movq %rdx, %r12
leaq 0(,%rdx,4), %r15
movq %rdi, %rbp
movl $0, %r13d
jmp .L12
.L13:
call rand@PLT
movslq %eax, %rdx
imulq $1374389535, %rdx, %rdx
sarq $37, %rdx
movl %eax, %ecx
sarl $31, %ecx
subl %ecx, %edx
imull $100, %edx, %edx
subl %edx, %eax
pxor %xmm0, %xmm0
cvtsi2ssl %eax, %xmm0
movss %xmm0, 0(%rbp,%rbx,4)
addq $1, %rbx
cmpq %r12, %rbx
jne .L13
.L14:
addq $1, %r13
addq %r15, %rbp
cmpq %r13, %r14
je .L10
.L12:
movl $0, %ebx
testq %r12, %r12
jne .L13
jmp .L14
.L10:
addq $8, %rsp
.cfi_def_cfa_offset 56
popq %rbx
.cfi_def_cfa_offset 48
popq %rbp
.cfi_def_cfa_offset 40
popq %r12
.cfi_def_cfa_offset 32
popq %r13
.cfi_def_cfa_offset 24
popq %r14
.cfi_def_cfa_offset 16
popq %r15
.cfi_def_cfa_offset 8
ret
.L19:
.cfi_restore 3
.cfi_restore 6
.cfi_restore 12
.cfi_restore 13
.cfi_restore 14
.cfi_restore 15
ret
.cfi_endproc
.LFE2058:
.size _Z11generateMatPfmm, .-_Z11generateMatPfmm
.section .rodata.str1.1,"aMS",@progbits,1
.LC1:
.string "%f "
.LC2:
.string "\n"
.text
.globl _Z8printMatPfmm
.type _Z8printMatPfmm, @function
_Z8printMatPfmm:
.LFB2059:
.cfi_startproc
endbr64
pushq %r15
.cfi_def_cfa_offset 16
.cfi_offset 15, -16
pushq %r14
.cfi_def_cfa_offset 24
.cfi_offset 14, -24
pushq %r13
.cfi_def_cfa_offset 32
.cfi_offset 13, -32
pushq %r12
.cfi_def_cfa_offset 40
.cfi_offset 12, -40
pushq %rbp
.cfi_def_cfa_offset 48
.cfi_offset 6, -48
pushq %rbx
.cfi_def_cfa_offset 56
.cfi_offset 3, -56
subq $24, %rsp
.cfi_def_cfa_offset 80
movq %rsi, 8(%rsp)
testq %rsi, %rsi
je .L23
movq %rdx, %r12
leaq 0(,%rdx,4), %r15
movq %rdi, %rbp
movl $0, %r14d
leaq .LC1(%rip), %r13
jmp .L24
.L25:
pxor %xmm0, %xmm0
cvtss2sd 0(%rbp,%rbx,4), %xmm0
movq %r13, %rsi
movl $2, %edi
movl $1, %eax
call __printf_chk@PLT
addq $1, %rbx
cmpq %r12, %rbx
jne .L25
.L26:
leaq .LC2(%rip), %rsi
movl $2, %edi
movl $0, %eax
call __printf_chk@PLT
addq $1, %r14
addq %r15, %rbp
cmpq %r14, 8(%rsp)
je .L23
.L24:
movl $0, %ebx
testq %r12, %r12
jne .L25
jmp .L26
.L23:
leaq .LC2(%rip), %rsi
movl $2, %edi
movl $0, %eax
call __printf_chk@PLT
addq $24, %rsp
.cfi_def_cfa_offset 56
popq %rbx
.cfi_def_cfa_offset 48
popq %rbp
.cfi_def_cfa_offset 40
popq %r12
.cfi_def_cfa_offset 32
popq %r13
.cfi_def_cfa_offset 24
popq %r14
.cfi_def_cfa_offset 16
popq %r15
.cfi_def_cfa_offset 8
ret
.cfi_endproc
.LFE2059:
.size _Z8printMatPfmm, .-_Z8printMatPfmm
.globl _Z50__device_stub__Z27convolution_2D_basic_kernelPfS_lPfS_l
.type _Z50__device_stub__Z27convolution_2D_basic_kernelPfS_lPfS_l, @function
_Z50__device_stub__Z27convolution_2D_basic_kernelPfS_lPfS_l:
.LFB2085:
.cfi_startproc
endbr64
subq $136, %rsp
.cfi_def_cfa_offset 144
movq %rdi, 24(%rsp)
movq %rsi, 16(%rsp)
movq %rdx, 8(%rsp)
movq %fs:40, %rax
movq %rax, 120(%rsp)
xorl %eax, %eax
leaq 24(%rsp), %rax
movq %rax, 96(%rsp)
leaq 16(%rsp), %rax
movq %rax, 104(%rsp)
leaq 8(%rsp), %rax
movq %rax, 112(%rsp)
movl $1, 48(%rsp)
movl $1, 52(%rsp)
movl $1, 56(%rsp)
movl $1, 60(%rsp)
movl $1, 64(%rsp)
movl $1, 68(%rsp)
leaq 40(%rsp), %rcx
leaq 32(%rsp), %rdx
leaq 60(%rsp), %rsi
leaq 48(%rsp), %rdi
call __cudaPopCallConfiguration@PLT
testl %eax, %eax
je .L35
.L31:
movq 120(%rsp), %rax
subq %fs:40, %rax
jne .L36
addq $136, %rsp
.cfi_remember_state
.cfi_def_cfa_offset 8
ret
.L35:
.cfi_restore_state
pushq 40(%rsp)
.cfi_def_cfa_offset 152
pushq 40(%rsp)
.cfi_def_cfa_offset 160
leaq 112(%rsp), %r9
movq 76(%rsp), %rcx
movl 84(%rsp), %r8d
movq 64(%rsp), %rsi
movl 72(%rsp), %edx
leaq _Z27convolution_2D_basic_kernelPfS_l(%rip), %rdi
call cudaLaunchKernel@PLT
addq $16, %rsp
.cfi_def_cfa_offset 144
jmp .L31
.L36:
call __stack_chk_fail@PLT
.cfi_endproc
.LFE2085:
.size _Z50__device_stub__Z27convolution_2D_basic_kernelPfS_lPfS_l, .-_Z50__device_stub__Z27convolution_2D_basic_kernelPfS_lPfS_l
.globl _Z27convolution_2D_basic_kernelPfS_l
.type _Z27convolution_2D_basic_kernelPfS_l, @function
_Z27convolution_2D_basic_kernelPfS_l:
.LFB2086:
.cfi_startproc
endbr64
subq $8, %rsp
.cfi_def_cfa_offset 16
call _Z50__device_stub__Z27convolution_2D_basic_kernelPfS_lPfS_l
addq $8, %rsp
.cfi_def_cfa_offset 8
ret
.cfi_endproc
.LFE2086:
.size _Z27convolution_2D_basic_kernelPfS_l, .-_Z27convolution_2D_basic_kernelPfS_l
.section .rodata.str1.8,"aMS",@progbits,1
.align 8
.LC4:
.string "/home/ubuntu/Datasets/stackv2/train-structured/jinpyojeon/cpsc375/master/assign06/conv_tiled1.cu"
.section .rodata.str1.1
.LC6:
.string "The elapsed time is %f s\n"
.text
.globl main
.type main, @function
main:
.LFB2060:
.cfi_startproc
endbr64
pushq %r12
.cfi_def_cfa_offset 16
.cfi_offset 12, -16
pushq %rbp
.cfi_def_cfa_offset 24
.cfi_offset 6, -24
pushq %rbx
.cfi_def_cfa_offset 32
.cfi_offset 3, -32
subq $112, %rsp
.cfi_def_cfa_offset 144
movq %fs:40, %rax
movq %rax, 104(%rsp)
xorl %eax, %eax
movl $0, %edi
call time@PLT
movl %eax, %edi
call srand@PLT
movss .LC3(%rip), %xmm0
movss %xmm0, 80(%rsp)
movss %xmm0, 84(%rsp)
movss %xmm0, 88(%rsp)
movss %xmm0, 92(%rsp)
movss %xmm0, 96(%rsp)
leaq 16(%rsp), %rdi
call cudaEventCreate@PLT
leaq 24(%rsp), %rdi
call cudaEventCreate@PLT
movl $0, %esi
movq 16(%rsp), %rdi
call cudaEventRecord@PLT
leaq 32(%rsp), %rdi
movl $20, %esi
call cudaMalloc@PLT
leaq 48(%rsp), %rdi
movl $1048576, %esi
call cudaMalloc@PLT
leaq 40(%rsp), %rdi
movl $1048576, %esi
call cudaMalloc@PLT
movl $1048576, %edi
call malloc@PLT
movq %rax, %rbx
movl $1048576, %edi
call malloc@PLT
movq %rax, %rbp
movl $262144, %edx
movl $1, %esi
movq %rbx, %rdi
call _Z11generateMatPfmm
movl $1, %ecx
movl $1048576, %edx
movq %rbx, %rsi
movq 48(%rsp), %rdi
call cudaMemcpy@PLT
movl %eax, %edi
movl $116, %edx
leaq .LC4(%rip), %r12
movq %r12, %rsi
call _Z9gpuAssert9cudaErrorPKci
leaq 80(%rsp), %rsi
movl $1, %r8d
movl $0, %ecx
movl $20, %edx
leaq _ZL1M(%rip), %rdi
call cudaMemcpyToSymbol@PLT
movl %eax, %edi
movl $118, %edx
movq %r12, %rsi
call _Z9gpuAssert9cudaErrorPKci
movl $16, 56(%rsp)
movl $1, 60(%rsp)
movl $16384, 68(%rsp)
movl $1, 72(%rsp)
movl $0, %r9d
movl $0, %r8d
movq 56(%rsp), %rdx
movl $1, %ecx
movq 68(%rsp), %rdi
movl $1, %esi
call __cudaPushCallConfiguration@PLT
testl %eax, %eax
je .L43
.L40:
call cudaPeekAtLastError@PLT
movl %eax, %edi
movl $127, %edx
leaq .LC4(%rip), %r12
movq %r12, %rsi
call _Z9gpuAssert9cudaErrorPKci
call cudaDeviceSynchronize@PLT
movl %eax, %edi
movl $128, %edx
movq %r12, %rsi
call _Z9gpuAssert9cudaErrorPKci
movl $2, %ecx
movl $1048576, %edx
movq 40(%rsp), %rsi
movq %rbp, %rdi
call cudaMemcpy@PLT
movl %eax, %edi
movl $130, %edx
movq %r12, %rsi
call _Z9gpuAssert9cudaErrorPKci
movl $0, %esi
movq 24(%rsp), %rdi
call cudaEventRecord@PLT
movq 24(%rsp), %rdi
call cudaEventSynchronize@PLT
leaq 12(%rsp), %rdi
movq 24(%rsp), %rdx
movq 16(%rsp), %rsi
call cudaEventElapsedTime@PLT
movq 16(%rsp), %rdi
call cudaEventDestroy@PLT
movq 24(%rsp), %rdi
call cudaEventDestroy@PLT
pxor %xmm0, %xmm0
cvtss2sd 12(%rsp), %xmm0
divsd .LC5(%rip), %xmm0
leaq .LC6(%rip), %rsi
movl $2, %edi
movl $1, %eax
call __printf_chk@PLT
movq %rbx, %rdi
call free@PLT
movq %rbp, %rdi
call free@PLT
movq 48(%rsp), %rdi
call cudaFree@PLT
movq 32(%rsp), %rdi
call cudaFree@PLT
movq 40(%rsp), %rdi
call cudaFree@PLT
movq 104(%rsp), %rax
subq %fs:40, %rax
jne .L44
movl $0, %eax
addq $112, %rsp
.cfi_remember_state
.cfi_def_cfa_offset 32
popq %rbx
.cfi_def_cfa_offset 24
popq %rbp
.cfi_def_cfa_offset 16
popq %r12
.cfi_def_cfa_offset 8
ret
.L43:
.cfi_restore_state
movl $262144, %edx
movq 40(%rsp), %rsi
movq 48(%rsp), %rdi
call _Z50__device_stub__Z27convolution_2D_basic_kernelPfS_lPfS_l
jmp .L40
.L44:
call __stack_chk_fail@PLT
.cfi_endproc
.LFE2060:
.size main, .-main
.section .rodata.str1.8
.align 8
.LC7:
.string "_Z27convolution_2D_basic_kernelPfS_l"
.section .rodata.str1.1
.LC8:
.string "M"
.text
.type _ZL24__sti____cudaRegisterAllv, @function
_ZL24__sti____cudaRegisterAllv:
.LFB2088:
.cfi_startproc
endbr64
pushq %rbx
.cfi_def_cfa_offset 16
.cfi_offset 3, -16
leaq _ZL15__fatDeviceText(%rip), %rdi
call __cudaRegisterFatBinary@PLT
movq %rax, %rbx
movq %rax, _ZL20__cudaFatCubinHandle(%rip)
pushq $0
.cfi_def_cfa_offset 24
pushq $0
.cfi_def_cfa_offset 32
pushq $0
.cfi_def_cfa_offset 40
pushq $0
.cfi_def_cfa_offset 48
movl $0, %r9d
movl $-1, %r8d
leaq .LC7(%rip), %rdx
movq %rdx, %rcx
leaq _Z27convolution_2D_basic_kernelPfS_l(%rip), %rsi
movq %rax, %rdi
call __cudaRegisterFunction@PLT
addq $32, %rsp
.cfi_def_cfa_offset 16
pushq $0
.cfi_def_cfa_offset 24
pushq $1
.cfi_def_cfa_offset 32
movl $20, %r9d
movl $0, %r8d
leaq .LC8(%rip), %rdx
movq %rdx, %rcx
leaq _ZL1M(%rip), %rsi
movq %rbx, %rdi
call __cudaRegisterVar@PLT
addq $16, %rsp
.cfi_def_cfa_offset 16
movq _ZL20__cudaFatCubinHandle(%rip), %rdi
call __cudaRegisterFatBinaryEnd@PLT
leaq _ZL26__cudaUnregisterBinaryUtilv(%rip), %rdi
call atexit@PLT
popq %rbx
.cfi_def_cfa_offset 8
ret
.cfi_endproc
.LFE2088:
.size _ZL24__sti____cudaRegisterAllv, .-_ZL24__sti____cudaRegisterAllv
.section .init_array,"aw"
.align 8
.quad _ZL24__sti____cudaRegisterAllv
.section .nvFatBinSegment,"aw"
.align 8
.type _ZL15__fatDeviceText, @object
.size _ZL15__fatDeviceText, 24
_ZL15__fatDeviceText:
.long 1180844977
.long 1
.quad fatbinData
.quad 0
.local _ZL20__cudaFatCubinHandle
.comm _ZL20__cudaFatCubinHandle,8,8
.local _ZL1M
.comm _ZL1M,20,16
.section .rodata.cst4,"aM",@progbits,4
.align 4
.LC3:
.long 1045220557
.section .rodata.cst8,"aM",@progbits,8
.align 8
.LC5:
.long 0
.long 1083129856
.ident "GCC: (Ubuntu 13.3.0-6ubuntu2~24.04) 13.3.0"
.section .note.GNU-stack,"",@progbits
.section .note.gnu.property,"a"
.align 8
.long 1f - 0f
.long 4f - 1f
.long 5
0:
.string "GNU"
1:
.align 8
.long 0xc0000002
.long 3f - 2f
2:
.long 0x3
3:
.align 8
4: |
You are a helpful coding assistant specialized in converting CUDA source code to HIP/AMD source code. | #include <cuda.h>
#include <stdlib.h>
#include <time.h>
#include <stdio.h>
#include <math.h>
// N Time
// 1 << 10 0.0009
// 1 << 15 0.0024
// 1 << 17 0.011
// 1 << 18 0.017
// 1 << 20 0.049
// 1 << 21 0.084
#define gpuErrCheck(ans) { gpuAssert((ans), __FILE__, __LINE__); }
inline void gpuAssert(cudaError_t code, const char *file, int line) {
if (code != cudaSuccess) {
fprintf(stderr, "GPUassert: %s %s %d\n", cudaGetErrorString(code), file, line);
}
}
#define O_TILE_WIDTH 16
#define MASK_WIDTH 5
#define BLOCK_WIDTH (O_TILE_WIDTH + (MASK_WIDTH - 1))
__constant__ float M[MASK_WIDTH];
__global__ void convolution_2D_basic_kernel(float *N, float *P, long Width) {
__shared__ float N_ds[BLOCK_WIDTH];
int index_i = blockIdx.x * blockDim.x + threadIdx.x;
int j;
if ((index_i >= 0) && (index_i < Width)) {
N_ds[threadIdx.x + (MASK_WIDTH / 2)] = N[index_i];
// Repeating border for edge cases
if (threadIdx.x < (MASK_WIDTH / 2)) {
if (index_i - (MASK_WIDTH / 2) <= 0) N_ds[threadIdx.x] = N[index_i];
else N_ds[threadIdx.x] = N[index_i - (MASK_WIDTH / 2)];
}
if (threadIdx.x > (MASK_WIDTH / 2)) {
if (index_i + (MASK_WIDTH / 2) >= Width - 1) N_ds[threadIdx.x] = N[Width - 1];
else N_ds[threadIdx.x] = N[index_i + (MASK_WIDTH / 2)];
}
// printf("Copying %d %d %f\n", index_i, threadIdx.x, N_ds[threadIdx.x]);
} else {
// N_ds[threadIdx.x] = 0.0f;
}
float output = 0.0f;
if (threadIdx.x < O_TILE_WIDTH) {
for (j = 0; j < MASK_WIDTH; j++) {
output += M[j] * N_ds[j + threadIdx.x];
}
// printf("%d %f\n", blockIdx.x * O_TILE_WIDTH + threadIdx.x, output);
P[blockIdx.x * O_TILE_WIDTH + threadIdx.x] = output;
}
}
void generateMat(float *m, size_t height, size_t width){
int i, j;
for (i = 0; i < height; i++){
for (j = 0; j < width; j++) {
m[i*width+j] = rand() % 100;
}
}
}
void printMat(float *m, size_t height, size_t width) {
int i, j;
for (i = 0; i < height; i++){
for (j = 0; j < width; j++) {
printf("%f ", m[i*width+j]);
}
printf("\n");
}
printf("\n");
}
int main(int argc, char**argv){
long width = 1<<18;
srand(time(NULL));
float mask[MASK_WIDTH];
for (int i = 0; i < MASK_WIDTH; i++) {
mask[i] = 1.0/MASK_WIDTH;
}
cudaEvent_t start, stop;
cudaEventCreate(&start);
cudaEventCreate(&stop);
cudaEventRecord(start, 0);
float * m, *n, *p;
float * d_m, *d_p, *d_n;
long mSize = MASK_WIDTH * sizeof(float);
long nSize = width * sizeof(float);
long pSize = width * sizeof(float);
cudaMalloc((void**)&d_m, mSize);
cudaMalloc((void**)&d_n, nSize);
cudaMalloc((void**)&d_p, pSize);
m = (float *)malloc(mSize);
n = (float *)malloc(nSize);
p = (float *)malloc(pSize);
generateMat(n, 1, width);
// printMat(n, 1, width);
gpuErrCheck( cudaMemcpy(d_n, n, nSize, cudaMemcpyHostToDevice) )
gpuErrCheck( cudaMemcpyToSymbol(M, &mask, mSize) );
dim3 blockDims(O_TILE_WIDTH,1,1);
int blockNum = ((width-1)/(O_TILE_WIDTH))+ 1;
dim3 gridDims(blockNum, 1, 1);
convolution_2D_basic_kernel<<<gridDims, blockDims>>>(d_n, d_p, width);
gpuErrCheck( cudaPeekAtLastError() );
gpuErrCheck( cudaDeviceSynchronize() );
gpuErrCheck( cudaMemcpy(p, d_p, pSize, cudaMemcpyDeviceToHost) );
// printMat(p, 1, width);
cudaEventRecord(stop, 0);
cudaEventSynchronize(stop);
float elapsedTime;
cudaEventElapsedTime(&elapsedTime, start, stop);
cudaEventDestroy(start);
cudaEventDestroy(stop);
printf("The elapsed time is %f s\n", elapsedTime / 1000.0);
free(n); free(m); free(p);
cudaFree(d_n);
cudaFree(d_m);
cudaFree(d_p);
} | #include <hip/hip_runtime.h>
#include <stdlib.h>
#include <time.h>
#include <stdio.h>
#include <math.h>
// N Time
// 1 << 10 0.0009
// 1 << 15 0.0024
// 1 << 17 0.011
// 1 << 18 0.017
// 1 << 20 0.049
// 1 << 21 0.084
#define gpuErrCheck(ans) { gpuAssert((ans), __FILE__, __LINE__); }
inline void gpuAssert(hipError_t code, const char *file, int line) {
if (code != hipSuccess) {
fprintf(stderr, "GPUassert: %s %s %d\n", hipGetErrorString(code), file, line);
}
}
#define O_TILE_WIDTH 16
#define MASK_WIDTH 5
#define BLOCK_WIDTH (O_TILE_WIDTH + (MASK_WIDTH - 1))
__constant__ float M[MASK_WIDTH];
__global__ void convolution_2D_basic_kernel(float *N, float *P, long Width) {
__shared__ float N_ds[BLOCK_WIDTH];
int index_i = blockIdx.x * blockDim.x + threadIdx.x;
int j;
if ((index_i >= 0) && (index_i < Width)) {
N_ds[threadIdx.x + (MASK_WIDTH / 2)] = N[index_i];
// Repeating border for edge cases
if (threadIdx.x < (MASK_WIDTH / 2)) {
if (index_i - (MASK_WIDTH / 2) <= 0) N_ds[threadIdx.x] = N[index_i];
else N_ds[threadIdx.x] = N[index_i - (MASK_WIDTH / 2)];
}
if (threadIdx.x > (MASK_WIDTH / 2)) {
if (index_i + (MASK_WIDTH / 2) >= Width - 1) N_ds[threadIdx.x] = N[Width - 1];
else N_ds[threadIdx.x] = N[index_i + (MASK_WIDTH / 2)];
}
// printf("Copying %d %d %f\n", index_i, threadIdx.x, N_ds[threadIdx.x]);
} else {
// N_ds[threadIdx.x] = 0.0f;
}
float output = 0.0f;
if (threadIdx.x < O_TILE_WIDTH) {
for (j = 0; j < MASK_WIDTH; j++) {
output += M[j] * N_ds[j + threadIdx.x];
}
// printf("%d %f\n", blockIdx.x * O_TILE_WIDTH + threadIdx.x, output);
P[blockIdx.x * O_TILE_WIDTH + threadIdx.x] = output;
}
}
void generateMat(float *m, size_t height, size_t width){
int i, j;
for (i = 0; i < height; i++){
for (j = 0; j < width; j++) {
m[i*width+j] = rand() % 100;
}
}
}
void printMat(float *m, size_t height, size_t width) {
int i, j;
for (i = 0; i < height; i++){
for (j = 0; j < width; j++) {
printf("%f ", m[i*width+j]);
}
printf("\n");
}
printf("\n");
}
int main(int argc, char**argv){
long width = 1<<18;
srand(time(NULL));
float mask[MASK_WIDTH];
for (int i = 0; i < MASK_WIDTH; i++) {
mask[i] = 1.0/MASK_WIDTH;
}
hipEvent_t start, stop;
hipEventCreate(&start);
hipEventCreate(&stop);
hipEventRecord(start, 0);
float * m, *n, *p;
float * d_m, *d_p, *d_n;
long mSize = MASK_WIDTH * sizeof(float);
long nSize = width * sizeof(float);
long pSize = width * sizeof(float);
hipMalloc((void**)&d_m, mSize);
hipMalloc((void**)&d_n, nSize);
hipMalloc((void**)&d_p, pSize);
m = (float *)malloc(mSize);
n = (float *)malloc(nSize);
p = (float *)malloc(pSize);
generateMat(n, 1, width);
// printMat(n, 1, width);
gpuErrCheck( hipMemcpy(d_n, n, nSize, hipMemcpyHostToDevice) )
gpuErrCheck( hipMemcpyToSymbol(HIP_SYMBOL(M), &mask, mSize) );
dim3 blockDims(O_TILE_WIDTH,1,1);
int blockNum = ((width-1)/(O_TILE_WIDTH))+ 1;
dim3 gridDims(blockNum, 1, 1);
convolution_2D_basic_kernel<<<gridDims, blockDims>>>(d_n, d_p, width);
gpuErrCheck( hipPeekAtLastError() );
gpuErrCheck( hipDeviceSynchronize() );
gpuErrCheck( hipMemcpy(p, d_p, pSize, hipMemcpyDeviceToHost) );
// printMat(p, 1, width);
hipEventRecord(stop, 0);
hipEventSynchronize(stop);
float elapsedTime;
hipEventElapsedTime(&elapsedTime, start, stop);
hipEventDestroy(start);
hipEventDestroy(stop);
printf("The elapsed time is %f s\n", elapsedTime / 1000.0);
free(n); free(m); free(p);
hipFree(d_n);
hipFree(d_m);
hipFree(d_p);
} |
You are a helpful coding assistant specialized in converting HIP source code to AMD device assembly. | #include <hip/hip_runtime.h>
#include <stdlib.h>
#include <time.h>
#include <stdio.h>
#include <math.h>
// N Time
// 1 << 10 0.0009
// 1 << 15 0.0024
// 1 << 17 0.011
// 1 << 18 0.017
// 1 << 20 0.049
// 1 << 21 0.084
#define gpuErrCheck(ans) { gpuAssert((ans), __FILE__, __LINE__); }
inline void gpuAssert(hipError_t code, const char *file, int line) {
if (code != hipSuccess) {
fprintf(stderr, "GPUassert: %s %s %d\n", hipGetErrorString(code), file, line);
}
}
#define O_TILE_WIDTH 16
#define MASK_WIDTH 5
#define BLOCK_WIDTH (O_TILE_WIDTH + (MASK_WIDTH - 1))
__constant__ float M[MASK_WIDTH];
__global__ void convolution_2D_basic_kernel(float *N, float *P, long Width) {
__shared__ float N_ds[BLOCK_WIDTH];
int index_i = blockIdx.x * blockDim.x + threadIdx.x;
int j;
if ((index_i >= 0) && (index_i < Width)) {
N_ds[threadIdx.x + (MASK_WIDTH / 2)] = N[index_i];
// Repeating border for edge cases
if (threadIdx.x < (MASK_WIDTH / 2)) {
if (index_i - (MASK_WIDTH / 2) <= 0) N_ds[threadIdx.x] = N[index_i];
else N_ds[threadIdx.x] = N[index_i - (MASK_WIDTH / 2)];
}
if (threadIdx.x > (MASK_WIDTH / 2)) {
if (index_i + (MASK_WIDTH / 2) >= Width - 1) N_ds[threadIdx.x] = N[Width - 1];
else N_ds[threadIdx.x] = N[index_i + (MASK_WIDTH / 2)];
}
// printf("Copying %d %d %f\n", index_i, threadIdx.x, N_ds[threadIdx.x]);
} else {
// N_ds[threadIdx.x] = 0.0f;
}
float output = 0.0f;
if (threadIdx.x < O_TILE_WIDTH) {
for (j = 0; j < MASK_WIDTH; j++) {
output += M[j] * N_ds[j + threadIdx.x];
}
// printf("%d %f\n", blockIdx.x * O_TILE_WIDTH + threadIdx.x, output);
P[blockIdx.x * O_TILE_WIDTH + threadIdx.x] = output;
}
}
void generateMat(float *m, size_t height, size_t width){
int i, j;
for (i = 0; i < height; i++){
for (j = 0; j < width; j++) {
m[i*width+j] = rand() % 100;
}
}
}
void printMat(float *m, size_t height, size_t width) {
int i, j;
for (i = 0; i < height; i++){
for (j = 0; j < width; j++) {
printf("%f ", m[i*width+j]);
}
printf("\n");
}
printf("\n");
}
int main(int argc, char**argv){
long width = 1<<18;
srand(time(NULL));
float mask[MASK_WIDTH];
for (int i = 0; i < MASK_WIDTH; i++) {
mask[i] = 1.0/MASK_WIDTH;
}
hipEvent_t start, stop;
hipEventCreate(&start);
hipEventCreate(&stop);
hipEventRecord(start, 0);
float * m, *n, *p;
float * d_m, *d_p, *d_n;
long mSize = MASK_WIDTH * sizeof(float);
long nSize = width * sizeof(float);
long pSize = width * sizeof(float);
hipMalloc((void**)&d_m, mSize);
hipMalloc((void**)&d_n, nSize);
hipMalloc((void**)&d_p, pSize);
m = (float *)malloc(mSize);
n = (float *)malloc(nSize);
p = (float *)malloc(pSize);
generateMat(n, 1, width);
// printMat(n, 1, width);
gpuErrCheck( hipMemcpy(d_n, n, nSize, hipMemcpyHostToDevice) )
gpuErrCheck( hipMemcpyToSymbol(HIP_SYMBOL(M), &mask, mSize) );
dim3 blockDims(O_TILE_WIDTH,1,1);
int blockNum = ((width-1)/(O_TILE_WIDTH))+ 1;
dim3 gridDims(blockNum, 1, 1);
convolution_2D_basic_kernel<<<gridDims, blockDims>>>(d_n, d_p, width);
gpuErrCheck( hipPeekAtLastError() );
gpuErrCheck( hipDeviceSynchronize() );
gpuErrCheck( hipMemcpy(p, d_p, pSize, hipMemcpyDeviceToHost) );
// printMat(p, 1, width);
hipEventRecord(stop, 0);
hipEventSynchronize(stop);
float elapsedTime;
hipEventElapsedTime(&elapsedTime, start, stop);
hipEventDestroy(start);
hipEventDestroy(stop);
printf("The elapsed time is %f s\n", elapsedTime / 1000.0);
free(n); free(m); free(p);
hipFree(d_n);
hipFree(d_m);
hipFree(d_p);
} | .text
.amdgcn_target "amdgcn-amd-amdhsa--gfx1100"
.protected _Z27convolution_2D_basic_kernelPfS_l
.globl _Z27convolution_2D_basic_kernelPfS_l
.p2align 8
.type _Z27convolution_2D_basic_kernelPfS_l,@function
_Z27convolution_2D_basic_kernelPfS_l:
s_load_b32 s2, s[0:1], 0x24
s_mov_b32 s6, exec_lo
s_waitcnt lgkmcnt(0)
s_and_b32 s2, s2, 0xffff
s_delay_alu instid0(SALU_CYCLE_1) | instskip(NEXT) | instid1(VALU_DEP_1)
v_mad_u64_u32 v[1:2], null, s15, s2, v[0:1]
v_cmpx_lt_i32_e32 -1, v1
s_cbranch_execz .LBB0_8
s_load_b64 s[2:3], s[0:1], 0x10
v_mov_b32_e32 v2, 0
s_waitcnt lgkmcnt(0)
s_delay_alu instid0(VALU_DEP_1)
v_cmp_gt_i64_e32 vcc_lo, s[2:3], v[1:2]
s_and_b32 exec_lo, exec_lo, vcc_lo
s_cbranch_execz .LBB0_8
s_load_b64 s[4:5], s[0:1], 0x0
v_lshlrev_b64 v[2:3], 2, v[1:2]
v_lshlrev_b32_e32 v5, 2, v0
s_mov_b32 s7, exec_lo
s_waitcnt lgkmcnt(0)
s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_3)
v_add_co_u32 v2, vcc_lo, s4, v2
v_add_co_ci_u32_e32 v3, vcc_lo, s5, v3, vcc_lo
global_load_b32 v4, v[2:3], off
s_waitcnt vmcnt(0)
ds_store_b32 v5, v4 offset:8
v_cmpx_gt_u32_e32 2, v0
s_cbranch_execz .LBB0_6
s_mov_b32 s8, exec_lo
v_cmpx_lt_i32_e32 2, v1
s_cbranch_execz .LBB0_5
global_load_b32 v4, v[2:3], off offset:-8
.LBB0_5:
s_or_b32 exec_lo, exec_lo, s8
v_lshlrev_b32_e32 v2, 2, v0
s_waitcnt vmcnt(0)
ds_store_b32 v2, v4
.LBB0_6:
s_or_b32 exec_lo, exec_lo, s7
v_cmp_lt_u32_e32 vcc_lo, 2, v0
s_and_b32 exec_lo, exec_lo, vcc_lo
s_cbranch_execz .LBB0_8
v_dual_mov_b32 v2, 0 :: v_dual_add_nc_u32 v1, 2, v1
s_add_u32 s2, s2, -1
s_addc_u32 s3, s3, -1
s_delay_alu instid0(VALU_DEP_1) | instid1(SALU_CYCLE_1)
v_cmp_lt_i64_e32 vcc_lo, s[2:3], v[1:2]
v_cndmask_b32_e64 v2, 0, s3, vcc_lo
v_cndmask_b32_e64 v1, v1, s2, vcc_lo
s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
v_lshlrev_b64 v[1:2], 2, v[1:2]
v_add_co_u32 v1, vcc_lo, s4, v1
s_delay_alu instid0(VALU_DEP_2)
v_add_co_ci_u32_e32 v2, vcc_lo, s5, v2, vcc_lo
global_load_b32 v1, v[1:2], off
v_lshlrev_b32_e32 v2, 2, v0
s_waitcnt vmcnt(0)
ds_store_b32 v2, v1
.LBB0_8:
s_or_b32 exec_lo, exec_lo, s6
s_delay_alu instid0(SALU_CYCLE_1)
s_mov_b32 s2, exec_lo
v_cmpx_gt_u32_e32 16, v0
s_cbranch_execz .LBB0_12
v_dual_mov_b32 v1, 0 :: v_dual_lshlrev_b32 v2, 2, v0
s_mov_b64 s[2:3], 0
.p2align 6
.LBB0_10:
s_getpc_b64 s[4:5]
s_add_u32 s4, s4, M@rel32@lo+4
s_addc_u32 s5, s5, M@rel32@hi+12
s_add_u32 s4, s2, s4
s_addc_u32 s5, s3, s5
ds_load_b32 v3, v2
s_load_b32 s4, s[4:5], 0x0
v_add_nc_u32_e32 v2, 4, v2
s_add_u32 s2, s2, 4
s_addc_u32 s3, s3, 0
s_cmp_lg_u32 s2, 20
s_waitcnt lgkmcnt(0)
v_fmac_f32_e32 v1, s4, v3
s_cbranch_scc1 .LBB0_10
s_load_b64 s[0:1], s[0:1], 0x8
v_lshl_or_b32 v2, s15, 4, v0
v_mov_b32_e32 v3, 0
s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
v_lshlrev_b64 v[2:3], 2, v[2:3]
s_waitcnt lgkmcnt(0)
v_add_co_u32 v2, vcc_lo, s0, v2
s_delay_alu instid0(VALU_DEP_2)
v_add_co_ci_u32_e32 v3, vcc_lo, s1, v3, vcc_lo
global_store_b32 v[2:3], v1, off
.LBB0_12:
s_nop 0
s_sendmsg sendmsg(MSG_DEALLOC_VGPRS)
s_endpgm
.section .rodata,"a",@progbits
.p2align 6, 0x0
.amdhsa_kernel _Z27convolution_2D_basic_kernelPfS_l
.amdhsa_group_segment_fixed_size 80
.amdhsa_private_segment_fixed_size 0
.amdhsa_kernarg_size 280
.amdhsa_user_sgpr_count 15
.amdhsa_user_sgpr_dispatch_ptr 0
.amdhsa_user_sgpr_queue_ptr 0
.amdhsa_user_sgpr_kernarg_segment_ptr 1
.amdhsa_user_sgpr_dispatch_id 0
.amdhsa_user_sgpr_private_segment_size 0
.amdhsa_wavefront_size32 1
.amdhsa_uses_dynamic_stack 0
.amdhsa_enable_private_segment 0
.amdhsa_system_sgpr_workgroup_id_x 1
.amdhsa_system_sgpr_workgroup_id_y 0
.amdhsa_system_sgpr_workgroup_id_z 0
.amdhsa_system_sgpr_workgroup_info 0
.amdhsa_system_vgpr_workitem_id 0
.amdhsa_next_free_vgpr 6
.amdhsa_next_free_sgpr 16
.amdhsa_float_round_mode_32 0
.amdhsa_float_round_mode_16_64 0
.amdhsa_float_denorm_mode_32 3
.amdhsa_float_denorm_mode_16_64 3
.amdhsa_dx10_clamp 1
.amdhsa_ieee_mode 1
.amdhsa_fp16_overflow 0
.amdhsa_workgroup_processor_mode 1
.amdhsa_memory_ordered 1
.amdhsa_forward_progress 0
.amdhsa_shared_vgpr_count 0
.amdhsa_exception_fp_ieee_invalid_op 0
.amdhsa_exception_fp_denorm_src 0
.amdhsa_exception_fp_ieee_div_zero 0
.amdhsa_exception_fp_ieee_overflow 0
.amdhsa_exception_fp_ieee_underflow 0
.amdhsa_exception_fp_ieee_inexact 0
.amdhsa_exception_int_div_zero 0
.end_amdhsa_kernel
.text
.Lfunc_end0:
.size _Z27convolution_2D_basic_kernelPfS_l, .Lfunc_end0-_Z27convolution_2D_basic_kernelPfS_l
.section .AMDGPU.csdata,"",@progbits
.text
.p2alignl 7, 3214868480
.fill 96, 4, 3214868480
.protected M
.type M,@object
.section .bss,"aw",@nobits
.globl M
.p2align 4, 0x0
M:
.zero 20
.size M, 20
.type __hip_cuid_,@object
.globl __hip_cuid_
__hip_cuid_:
.byte 0
.size __hip_cuid_, 1
.ident "AMD clang version 18.0.0git (https://github.com/RadeonOpenCompute/llvm-project roc-6.3.2 25012 e5bf7e55c91490b07c49d8960fa7983d864936c4)"
.section ".note.GNU-stack","",@progbits
.addrsig
.addrsig_sym M
.addrsig_sym __hip_cuid_
.amdgpu_metadata
---
amdhsa.kernels:
- .args:
- .address_space: global
.offset: 0
.size: 8
.value_kind: global_buffer
- .address_space: global
.offset: 8
.size: 8
.value_kind: global_buffer
- .offset: 16
.size: 8
.value_kind: by_value
- .offset: 24
.size: 4
.value_kind: hidden_block_count_x
- .offset: 28
.size: 4
.value_kind: hidden_block_count_y
- .offset: 32
.size: 4
.value_kind: hidden_block_count_z
- .offset: 36
.size: 2
.value_kind: hidden_group_size_x
- .offset: 38
.size: 2
.value_kind: hidden_group_size_y
- .offset: 40
.size: 2
.value_kind: hidden_group_size_z
- .offset: 42
.size: 2
.value_kind: hidden_remainder_x
- .offset: 44
.size: 2
.value_kind: hidden_remainder_y
- .offset: 46
.size: 2
.value_kind: hidden_remainder_z
- .offset: 64
.size: 8
.value_kind: hidden_global_offset_x
- .offset: 72
.size: 8
.value_kind: hidden_global_offset_y
- .offset: 80
.size: 8
.value_kind: hidden_global_offset_z
- .offset: 88
.size: 2
.value_kind: hidden_grid_dims
.group_segment_fixed_size: 80
.kernarg_segment_align: 8
.kernarg_segment_size: 280
.language: OpenCL C
.language_version:
- 2
- 0
.max_flat_workgroup_size: 1024
.name: _Z27convolution_2D_basic_kernelPfS_l
.private_segment_fixed_size: 0
.sgpr_count: 18
.sgpr_spill_count: 0
.symbol: _Z27convolution_2D_basic_kernelPfS_l.kd
.uniform_work_group_size: 1
.uses_dynamic_stack: false
.vgpr_count: 6
.vgpr_spill_count: 0
.wavefront_size: 32
.workgroup_processor_mode: 1
amdhsa.target: amdgcn-amd-amdhsa--gfx1100
amdhsa.version:
- 1
- 2
...
.end_amdgpu_metadata |
You are a helpful coding assistant specialized in converting HIP source code to AMD host assembly. | #include <hip/hip_runtime.h>
#include <stdlib.h>
#include <time.h>
#include <stdio.h>
#include <math.h>
// N Time
// 1 << 10 0.0009
// 1 << 15 0.0024
// 1 << 17 0.011
// 1 << 18 0.017
// 1 << 20 0.049
// 1 << 21 0.084
#define gpuErrCheck(ans) { gpuAssert((ans), __FILE__, __LINE__); }
inline void gpuAssert(hipError_t code, const char *file, int line) {
if (code != hipSuccess) {
fprintf(stderr, "GPUassert: %s %s %d\n", hipGetErrorString(code), file, line);
}
}
#define O_TILE_WIDTH 16
#define MASK_WIDTH 5
#define BLOCK_WIDTH (O_TILE_WIDTH + (MASK_WIDTH - 1))
__constant__ float M[MASK_WIDTH];
__global__ void convolution_2D_basic_kernel(float *N, float *P, long Width) {
__shared__ float N_ds[BLOCK_WIDTH];
int index_i = blockIdx.x * blockDim.x + threadIdx.x;
int j;
if ((index_i >= 0) && (index_i < Width)) {
N_ds[threadIdx.x + (MASK_WIDTH / 2)] = N[index_i];
// Repeating border for edge cases
if (threadIdx.x < (MASK_WIDTH / 2)) {
if (index_i - (MASK_WIDTH / 2) <= 0) N_ds[threadIdx.x] = N[index_i];
else N_ds[threadIdx.x] = N[index_i - (MASK_WIDTH / 2)];
}
if (threadIdx.x > (MASK_WIDTH / 2)) {
if (index_i + (MASK_WIDTH / 2) >= Width - 1) N_ds[threadIdx.x] = N[Width - 1];
else N_ds[threadIdx.x] = N[index_i + (MASK_WIDTH / 2)];
}
// printf("Copying %d %d %f\n", index_i, threadIdx.x, N_ds[threadIdx.x]);
} else {
// N_ds[threadIdx.x] = 0.0f;
}
float output = 0.0f;
if (threadIdx.x < O_TILE_WIDTH) {
for (j = 0; j < MASK_WIDTH; j++) {
output += M[j] * N_ds[j + threadIdx.x];
}
// printf("%d %f\n", blockIdx.x * O_TILE_WIDTH + threadIdx.x, output);
P[blockIdx.x * O_TILE_WIDTH + threadIdx.x] = output;
}
}
void generateMat(float *m, size_t height, size_t width){
int i, j;
for (i = 0; i < height; i++){
for (j = 0; j < width; j++) {
m[i*width+j] = rand() % 100;
}
}
}
void printMat(float *m, size_t height, size_t width) {
int i, j;
for (i = 0; i < height; i++){
for (j = 0; j < width; j++) {
printf("%f ", m[i*width+j]);
}
printf("\n");
}
printf("\n");
}
int main(int argc, char**argv){
long width = 1<<18;
srand(time(NULL));
float mask[MASK_WIDTH];
for (int i = 0; i < MASK_WIDTH; i++) {
mask[i] = 1.0/MASK_WIDTH;
}
hipEvent_t start, stop;
hipEventCreate(&start);
hipEventCreate(&stop);
hipEventRecord(start, 0);
float * m, *n, *p;
float * d_m, *d_p, *d_n;
long mSize = MASK_WIDTH * sizeof(float);
long nSize = width * sizeof(float);
long pSize = width * sizeof(float);
hipMalloc((void**)&d_m, mSize);
hipMalloc((void**)&d_n, nSize);
hipMalloc((void**)&d_p, pSize);
m = (float *)malloc(mSize);
n = (float *)malloc(nSize);
p = (float *)malloc(pSize);
generateMat(n, 1, width);
// printMat(n, 1, width);
gpuErrCheck( hipMemcpy(d_n, n, nSize, hipMemcpyHostToDevice) )
gpuErrCheck( hipMemcpyToSymbol(HIP_SYMBOL(M), &mask, mSize) );
dim3 blockDims(O_TILE_WIDTH,1,1);
int blockNum = ((width-1)/(O_TILE_WIDTH))+ 1;
dim3 gridDims(blockNum, 1, 1);
convolution_2D_basic_kernel<<<gridDims, blockDims>>>(d_n, d_p, width);
gpuErrCheck( hipPeekAtLastError() );
gpuErrCheck( hipDeviceSynchronize() );
gpuErrCheck( hipMemcpy(p, d_p, pSize, hipMemcpyDeviceToHost) );
// printMat(p, 1, width);
hipEventRecord(stop, 0);
hipEventSynchronize(stop);
float elapsedTime;
hipEventElapsedTime(&elapsedTime, start, stop);
hipEventDestroy(start);
hipEventDestroy(stop);
printf("The elapsed time is %f s\n", elapsedTime / 1000.0);
free(n); free(m); free(p);
hipFree(d_n);
hipFree(d_m);
hipFree(d_p);
} | .text
.file "conv_tiled1.hip"
.globl _Z42__device_stub__convolution_2D_basic_kernelPfS_l # -- Begin function _Z42__device_stub__convolution_2D_basic_kernelPfS_l
.p2align 4, 0x90
.type _Z42__device_stub__convolution_2D_basic_kernelPfS_l,@function
_Z42__device_stub__convolution_2D_basic_kernelPfS_l: # @_Z42__device_stub__convolution_2D_basic_kernelPfS_l
.cfi_startproc
# %bb.0:
subq $104, %rsp
.cfi_def_cfa_offset 112
movq %rdi, 72(%rsp)
movq %rsi, 64(%rsp)
movq %rdx, 56(%rsp)
leaq 72(%rsp), %rax
movq %rax, 80(%rsp)
leaq 64(%rsp), %rax
movq %rax, 88(%rsp)
leaq 56(%rsp), %rax
movq %rax, 96(%rsp)
leaq 40(%rsp), %rdi
leaq 24(%rsp), %rsi
leaq 16(%rsp), %rdx
leaq 8(%rsp), %rcx
callq __hipPopCallConfiguration
movq 40(%rsp), %rsi
movl 48(%rsp), %edx
movq 24(%rsp), %rcx
movl 32(%rsp), %r8d
leaq 80(%rsp), %r9
movl $_Z27convolution_2D_basic_kernelPfS_l, %edi
pushq 8(%rsp)
.cfi_adjust_cfa_offset 8
pushq 24(%rsp)
.cfi_adjust_cfa_offset 8
callq hipLaunchKernel
addq $120, %rsp
.cfi_adjust_cfa_offset -120
retq
.Lfunc_end0:
.size _Z42__device_stub__convolution_2D_basic_kernelPfS_l, .Lfunc_end0-_Z42__device_stub__convolution_2D_basic_kernelPfS_l
.cfi_endproc
# -- End function
.globl _Z11generateMatPfmm # -- Begin function _Z11generateMatPfmm
.p2align 4, 0x90
.type _Z11generateMatPfmm,@function
_Z11generateMatPfmm: # @_Z11generateMatPfmm
.cfi_startproc
# %bb.0:
testq %rsi, %rsi
je .LBB1_7
# %bb.1: # %.preheader.lr.ph
pushq %rbp
.cfi_def_cfa_offset 16
pushq %r15
.cfi_def_cfa_offset 24
pushq %r14
.cfi_def_cfa_offset 32
pushq %r13
.cfi_def_cfa_offset 40
pushq %r12
.cfi_def_cfa_offset 48
pushq %rbx
.cfi_def_cfa_offset 56
pushq %rax
.cfi_def_cfa_offset 64
.cfi_offset %rbx, -56
.cfi_offset %r12, -48
.cfi_offset %r13, -40
.cfi_offset %r14, -32
.cfi_offset %r15, -24
.cfi_offset %rbp, -16
movq %rdx, %rbx
movq %rsi, %r14
movq %rdi, %r15
leaq (,%rdx,4), %r12
xorl %r13d, %r13d
jmp .LBB1_2
.p2align 4, 0x90
.LBB1_5: # %._crit_edge
# in Loop: Header=BB1_2 Depth=1
incq %r13
addq %r12, %r15
cmpq %r14, %r13
je .LBB1_6
.LBB1_2: # %.preheader
# =>This Loop Header: Depth=1
# Child Loop BB1_4 Depth 2
testq %rbx, %rbx
je .LBB1_5
# %bb.3: # %.lr.ph
# in Loop: Header=BB1_2 Depth=1
xorl %ebp, %ebp
.p2align 4, 0x90
.LBB1_4: # Parent Loop BB1_2 Depth=1
# => This Inner Loop Header: Depth=2
callq rand
cltq
imulq $1374389535, %rax, %rcx # imm = 0x51EB851F
movq %rcx, %rdx
shrq $63, %rdx
sarq $37, %rcx
addl %edx, %ecx
imull $100, %ecx, %ecx
subl %ecx, %eax
xorps %xmm0, %xmm0
cvtsi2ss %eax, %xmm0
movss %xmm0, (%r15,%rbp,4)
incq %rbp
cmpq %rbp, %rbx
jne .LBB1_4
jmp .LBB1_5
.LBB1_6:
addq $8, %rsp
.cfi_def_cfa_offset 56
popq %rbx
.cfi_def_cfa_offset 48
popq %r12
.cfi_def_cfa_offset 40
popq %r13
.cfi_def_cfa_offset 32
popq %r14
.cfi_def_cfa_offset 24
popq %r15
.cfi_def_cfa_offset 16
popq %rbp
.cfi_def_cfa_offset 8
.cfi_restore %rbx
.cfi_restore %r12
.cfi_restore %r13
.cfi_restore %r14
.cfi_restore %r15
.cfi_restore %rbp
.LBB1_7: # %._crit_edge15
retq
.Lfunc_end1:
.size _Z11generateMatPfmm, .Lfunc_end1-_Z11generateMatPfmm
.cfi_endproc
# -- End function
.globl _Z8printMatPfmm # -- Begin function _Z8printMatPfmm
.p2align 4, 0x90
.type _Z8printMatPfmm,@function
_Z8printMatPfmm: # @_Z8printMatPfmm
.cfi_startproc
# %bb.0:
testq %rsi, %rsi
je .LBB2_7
# %bb.1: # %.preheader.lr.ph
pushq %rbp
.cfi_def_cfa_offset 16
pushq %r15
.cfi_def_cfa_offset 24
pushq %r14
.cfi_def_cfa_offset 32
pushq %r13
.cfi_def_cfa_offset 40
pushq %r12
.cfi_def_cfa_offset 48
pushq %rbx
.cfi_def_cfa_offset 56
pushq %rax
.cfi_def_cfa_offset 64
.cfi_offset %rbx, -56
.cfi_offset %r12, -48
.cfi_offset %r13, -40
.cfi_offset %r14, -32
.cfi_offset %r15, -24
.cfi_offset %rbp, -16
movq %rdx, %rbx
movq %rsi, %r14
movq %rdi, %r15
leaq (,%rdx,4), %r12
xorl %r13d, %r13d
jmp .LBB2_2
.p2align 4, 0x90
.LBB2_5: # %._crit_edge
# in Loop: Header=BB2_2 Depth=1
movl $10, %edi
callq putchar@PLT
incq %r13
addq %r12, %r15
cmpq %r14, %r13
je .LBB2_6
.LBB2_2: # %.preheader
# =>This Loop Header: Depth=1
# Child Loop BB2_4 Depth 2
testq %rbx, %rbx
je .LBB2_5
# %bb.3: # %.lr.ph
# in Loop: Header=BB2_2 Depth=1
xorl %ebp, %ebp
.p2align 4, 0x90
.LBB2_4: # Parent Loop BB2_2 Depth=1
# => This Inner Loop Header: Depth=2
movss (%r15,%rbp,4), %xmm0 # xmm0 = mem[0],zero,zero,zero
cvtss2sd %xmm0, %xmm0
movl $.L.str, %edi
movb $1, %al
callq printf
incq %rbp
cmpq %rbp, %rbx
jne .LBB2_4
jmp .LBB2_5
.LBB2_6:
addq $8, %rsp
.cfi_def_cfa_offset 56
popq %rbx
.cfi_def_cfa_offset 48
popq %r12
.cfi_def_cfa_offset 40
popq %r13
.cfi_def_cfa_offset 32
popq %r14
.cfi_def_cfa_offset 24
popq %r15
.cfi_def_cfa_offset 16
popq %rbp
.cfi_def_cfa_offset 8
.cfi_restore %rbx
.cfi_restore %r12
.cfi_restore %r13
.cfi_restore %r14
.cfi_restore %r15
.cfi_restore %rbp
.LBB2_7: # %._crit_edge16
movl $10, %edi
jmp putchar@PLT # TAILCALL
.Lfunc_end2:
.size _Z8printMatPfmm, .Lfunc_end2-_Z8printMatPfmm
.cfi_endproc
# -- End function
.section .rodata.cst8,"aM",@progbits,8
.p2align 3, 0x0 # -- Begin function main
.LCPI3_0:
.quad 0x408f400000000000 # double 1000
.text
.globl main
.p2align 4, 0x90
.type main,@function
main: # @main
.cfi_startproc
# %bb.0:
pushq %r15
.cfi_def_cfa_offset 16
pushq %r14
.cfi_def_cfa_offset 24
pushq %rbx
.cfi_def_cfa_offset 32
subq $176, %rsp
.cfi_def_cfa_offset 208
.cfi_offset %rbx, -32
.cfi_offset %r14, -24
.cfi_offset %r15, -16
xorl %ebx, %ebx
xorl %edi, %edi
callq time
movl %eax, %edi
callq srand
.p2align 4, 0x90
.LBB3_1: # =>This Inner Loop Header: Depth=1
movl $1045220557, 144(%rsp,%rbx,4) # imm = 0x3E4CCCCD
incq %rbx
cmpq $5, %rbx
jne .LBB3_1
# %bb.2: # %.preheader.i
leaq 24(%rsp), %rdi
callq hipEventCreate
movq %rsp, %rdi
callq hipEventCreate
movq 24(%rsp), %rdi
xorl %r15d, %r15d
xorl %esi, %esi
callq hipEventRecord
leaq 64(%rsp), %rdi
movl $20, %esi
callq hipMalloc
leaq 8(%rsp), %rdi
movl $1048576, %esi # imm = 0x100000
callq hipMalloc
leaq 16(%rsp), %rdi
movl $1048576, %esi # imm = 0x100000
callq hipMalloc
movl $1048576, %edi # imm = 0x100000
callq malloc
movq %rax, %rbx
movl $1048576, %edi # imm = 0x100000
callq malloc
movq %rax, %r14
.p2align 4, 0x90
.LBB3_3: # =>This Inner Loop Header: Depth=1
callq rand
cltq
imulq $1374389535, %rax, %rcx # imm = 0x51EB851F
movq %rcx, %rdx
shrq $63, %rdx
sarq $37, %rcx
addl %edx, %ecx
imull $100, %ecx, %ecx
subl %ecx, %eax
xorps %xmm0, %xmm0
cvtsi2ss %eax, %xmm0
movss %xmm0, (%rbx,%r15,4)
incq %r15
cmpq $262144, %r15 # imm = 0x40000
jne .LBB3_3
# %bb.4: # %_Z11generateMatPfmm.exit
movq 8(%rsp), %rdi
movl $1048576, %edx # imm = 0x100000
movq %rbx, %rsi
movl $1, %ecx
callq hipMemcpy
testl %eax, %eax
jne .LBB3_5
.LBB3_6: # %_Z9gpuAssert10hipError_tPKci.exit
leaq 144(%rsp), %rsi
movl $M, %edi
movl $20, %edx
xorl %ecx, %ecx
movl $1, %r8d
callq hipMemcpyToSymbol
testl %eax, %eax
jne .LBB3_7
.LBB3_8: # %_Z9gpuAssert10hipError_tPKci.exit31
movabsq $4294967312, %rdx # imm = 0x100000010
leaq 16368(%rdx), %rdi
movl $1, %esi
movl $1, %ecx
xorl %r8d, %r8d
xorl %r9d, %r9d
callq __hipPushCallConfiguration
testl %eax, %eax
jne .LBB3_10
# %bb.9:
movq 8(%rsp), %rax
movq 16(%rsp), %rcx
movq %rax, 136(%rsp)
movq %rcx, 128(%rsp)
movq $262144, 120(%rsp) # imm = 0x40000
leaq 136(%rsp), %rax
movq %rax, 32(%rsp)
leaq 128(%rsp), %rax
movq %rax, 40(%rsp)
leaq 120(%rsp), %rax
movq %rax, 48(%rsp)
leaq 104(%rsp), %rdi
leaq 88(%rsp), %rsi
leaq 80(%rsp), %rdx
leaq 72(%rsp), %rcx
callq __hipPopCallConfiguration
movq 104(%rsp), %rsi
movl 112(%rsp), %edx
movq 88(%rsp), %rcx
movl 96(%rsp), %r8d
leaq 32(%rsp), %r9
movl $_Z27convolution_2D_basic_kernelPfS_l, %edi
pushq 72(%rsp)
.cfi_adjust_cfa_offset 8
pushq 88(%rsp)
.cfi_adjust_cfa_offset 8
callq hipLaunchKernel
addq $16, %rsp
.cfi_adjust_cfa_offset -16
.LBB3_10:
callq hipPeekAtLastError
testl %eax, %eax
jne .LBB3_11
.LBB3_12: # %_Z9gpuAssert10hipError_tPKci.exit33
callq hipDeviceSynchronize
testl %eax, %eax
jne .LBB3_13
.LBB3_14: # %_Z9gpuAssert10hipError_tPKci.exit35
movq 16(%rsp), %rsi
movl $1048576, %edx # imm = 0x100000
movq %r14, %rdi
movl $2, %ecx
callq hipMemcpy
testl %eax, %eax
jne .LBB3_15
.LBB3_16: # %_Z9gpuAssert10hipError_tPKci.exit37
movq (%rsp), %rdi
xorl %esi, %esi
callq hipEventRecord
movq (%rsp), %rdi
callq hipEventSynchronize
movq 24(%rsp), %rsi
movq (%rsp), %rdx
leaq 32(%rsp), %rdi
callq hipEventElapsedTime
movq 24(%rsp), %rdi
callq hipEventDestroy
movq (%rsp), %rdi
callq hipEventDestroy
movss 32(%rsp), %xmm0 # xmm0 = mem[0],zero,zero,zero
cvtss2sd %xmm0, %xmm0
divsd .LCPI3_0(%rip), %xmm0
movl $.L.str.3, %edi
movb $1, %al
callq printf
movq %rbx, %rdi
callq free
movq %r14, %rdi
callq free
movq 8(%rsp), %rdi
callq hipFree
movq 64(%rsp), %rdi
callq hipFree
movq 16(%rsp), %rdi
callq hipFree
xorl %eax, %eax
addq $176, %rsp
.cfi_def_cfa_offset 32
popq %rbx
.cfi_def_cfa_offset 24
popq %r14
.cfi_def_cfa_offset 16
popq %r15
.cfi_def_cfa_offset 8
retq
.LBB3_5:
.cfi_def_cfa_offset 208
movq stderr(%rip), %r15
movl %eax, %edi
callq hipGetErrorString
movl $.L.str.4, %esi
movl $.L.str.2, %ecx
movq %r15, %rdi
movq %rax, %rdx
movl $116, %r8d
xorl %eax, %eax
callq fprintf
jmp .LBB3_6
.LBB3_7:
movq stderr(%rip), %r15
movl %eax, %edi
callq hipGetErrorString
movl $.L.str.4, %esi
movl $.L.str.2, %ecx
movq %r15, %rdi
movq %rax, %rdx
movl $118, %r8d
xorl %eax, %eax
callq fprintf
jmp .LBB3_8
.LBB3_11:
movq stderr(%rip), %r15
movl %eax, %edi
callq hipGetErrorString
movl $.L.str.4, %esi
movl $.L.str.2, %ecx
movq %r15, %rdi
movq %rax, %rdx
movl $127, %r8d
xorl %eax, %eax
callq fprintf
jmp .LBB3_12
.LBB3_13:
movq stderr(%rip), %r15
movl %eax, %edi
callq hipGetErrorString
movl $.L.str.4, %esi
movl $.L.str.2, %ecx
movq %r15, %rdi
movq %rax, %rdx
movl $128, %r8d
xorl %eax, %eax
callq fprintf
jmp .LBB3_14
.LBB3_15:
movq stderr(%rip), %r15
movl %eax, %edi
callq hipGetErrorString
movl $.L.str.4, %esi
movl $.L.str.2, %ecx
movq %r15, %rdi
movq %rax, %rdx
movl $130, %r8d
xorl %eax, %eax
callq fprintf
jmp .LBB3_16
.Lfunc_end3:
.size main, .Lfunc_end3-main
.cfi_endproc
# -- End function
.p2align 4, 0x90 # -- Begin function __hip_module_ctor
.type __hip_module_ctor,@function
__hip_module_ctor: # @__hip_module_ctor
.cfi_startproc
# %bb.0:
pushq %rbx
.cfi_def_cfa_offset 16
subq $32, %rsp
.cfi_def_cfa_offset 48
.cfi_offset %rbx, -16
cmpq $0, __hip_gpubin_handle(%rip)
jne .LBB4_2
# %bb.1:
movl $__hip_fatbin_wrapper, %edi
callq __hipRegisterFatBinary
movq %rax, __hip_gpubin_handle(%rip)
.LBB4_2:
movq __hip_gpubin_handle(%rip), %rbx
xorps %xmm0, %xmm0
movups %xmm0, 16(%rsp)
movups %xmm0, (%rsp)
movl $_Z27convolution_2D_basic_kernelPfS_l, %esi
movl $.L__unnamed_1, %edx
movl $.L__unnamed_1, %ecx
movq %rbx, %rdi
movl $-1, %r8d
xorl %r9d, %r9d
callq __hipRegisterFunction
movl $0, 8(%rsp)
movl $1, (%rsp)
movl $M, %esi
movl $.L__unnamed_2, %edx
movl $.L__unnamed_2, %ecx
movl $20, %r9d
movq %rbx, %rdi
xorl %r8d, %r8d
callq __hipRegisterVar
movl $__hip_module_dtor, %edi
addq $32, %rsp
.cfi_def_cfa_offset 16
popq %rbx
.cfi_def_cfa_offset 8
jmp atexit # TAILCALL
.Lfunc_end4:
.size __hip_module_ctor, .Lfunc_end4-__hip_module_ctor
.cfi_endproc
# -- End function
.p2align 4, 0x90 # -- Begin function __hip_module_dtor
.type __hip_module_dtor,@function
__hip_module_dtor: # @__hip_module_dtor
.cfi_startproc
# %bb.0:
movq __hip_gpubin_handle(%rip), %rdi
testq %rdi, %rdi
je .LBB5_2
# %bb.1:
pushq %rax
.cfi_def_cfa_offset 16
callq __hipUnregisterFatBinary
movq $0, __hip_gpubin_handle(%rip)
addq $8, %rsp
.cfi_def_cfa_offset 8
.LBB5_2:
retq
.Lfunc_end5:
.size __hip_module_dtor, .Lfunc_end5-__hip_module_dtor
.cfi_endproc
# -- End function
.type M,@object # @M
.local M
.comm M,20,16
.type _Z27convolution_2D_basic_kernelPfS_l,@object # @_Z27convolution_2D_basic_kernelPfS_l
.section .rodata,"a",@progbits
.globl _Z27convolution_2D_basic_kernelPfS_l
.p2align 3, 0x0
_Z27convolution_2D_basic_kernelPfS_l:
.quad _Z42__device_stub__convolution_2D_basic_kernelPfS_l
.size _Z27convolution_2D_basic_kernelPfS_l, 8
.type .L.str,@object # @.str
.section .rodata.str1.1,"aMS",@progbits,1
.L.str:
.asciz "%f "
.size .L.str, 4
.type .L.str.2,@object # @.str.2
.L.str.2:
.asciz "/home/ubuntu/Datasets/stackv2/train-structured-repos-hip/jinpyojeon/cpsc375/master/assign06/conv_tiled1.hip"
.size .L.str.2, 108
.type .L.str.3,@object # @.str.3
.L.str.3:
.asciz "The elapsed time is %f s\n"
.size .L.str.3, 26
.type .L.str.4,@object # @.str.4
.L.str.4:
.asciz "GPUassert: %s %s %d\n"
.size .L.str.4, 21
.type .L__unnamed_1,@object # @0
.L__unnamed_1:
.asciz "_Z27convolution_2D_basic_kernelPfS_l"
.size .L__unnamed_1, 37
.type .L__unnamed_2,@object # @1
.L__unnamed_2:
.asciz "M"
.size .L__unnamed_2, 2
.type __hip_fatbin_wrapper,@object # @__hip_fatbin_wrapper
.section .hipFatBinSegment,"a",@progbits
.p2align 3, 0x0
__hip_fatbin_wrapper:
.long 1212764230 # 0x48495046
.long 1 # 0x1
.quad __hip_fatbin
.quad 0
.size __hip_fatbin_wrapper, 24
.type __hip_gpubin_handle,@object # @__hip_gpubin_handle
.local __hip_gpubin_handle
.comm __hip_gpubin_handle,8,8
.section .init_array,"aw",@init_array
.p2align 3, 0x0
.quad __hip_module_ctor
.type __hip_cuid_,@object # @__hip_cuid_
.bss
.globl __hip_cuid_
__hip_cuid_:
.byte 0 # 0x0
.size __hip_cuid_, 1
.section ".linker-options","e",@llvm_linker_options
.ident "AMD clang version 18.0.0git (https://github.com/RadeonOpenCompute/llvm-project roc-6.3.2 25012 e5bf7e55c91490b07c49d8960fa7983d864936c4)"
.section ".note.GNU-stack","",@progbits
.addrsig
.addrsig_sym _Z42__device_stub__convolution_2D_basic_kernelPfS_l
.addrsig_sym __hip_module_ctor
.addrsig_sym __hip_module_dtor
.addrsig_sym M
.addrsig_sym _Z27convolution_2D_basic_kernelPfS_l
.addrsig_sym __hip_fatbin
.addrsig_sym __hip_fatbin_wrapper
.addrsig_sym __hip_cuid_ |
You are a helpful coding assistant specialized in converting from CUDA device assembly to AMD device assembly. | code for sm_80
Function : _Z27convolution_2D_basic_kernelPfS_l
.headerflags @"EF_CUDA_TEXMODE_UNIFIED EF_CUDA_64BIT_ADDRESS EF_CUDA_SM80 EF_CUDA_VIRTUAL_SM(EF_CUDA_SM80)"
/*0000*/ IMAD.MOV.U32 R1, RZ, RZ, c[0x0][0x28] ; /* 0x00000a00ff017624 */
/* 0x000fe400078e00ff */
/*0010*/ S2R R6, SR_CTAID.X ; /* 0x0000000000067919 */
/* 0x000e220000002500 */
/*0020*/ ULDC.64 UR4, c[0x0][0x118] ; /* 0x0000460000047ab9 */
/* 0x000fe20000000a00 */
/*0030*/ BSSY B0, 0x2a0 ; /* 0x0000026000007945 */
/* 0x000fe40003800000 */
/*0040*/ S2R R11, SR_TID.X ; /* 0x00000000000b7919 */
/* 0x000e240000002100 */
/*0050*/ IMAD R0, R6, c[0x0][0x0], R11 ; /* 0x0000000006007a24 */
/* 0x001fca00078e020b */
/*0060*/ ISETP.GE.U32.AND P0, PT, R0, c[0x0][0x170], PT ; /* 0x00005c0000007a0c */
/* 0x000fe40003f06070 */
/*0070*/ SHF.R.S32.HI R3, RZ, 0x1f, R0 ; /* 0x0000001fff037819 */
/* 0x000fc80000011400 */
/*0080*/ ISETP.GE.AND.EX P0, PT, R3, c[0x0][0x174], PT, P0 ; /* 0x00005d0003007a0c */
/* 0x000fc80003f06300 */
/*0090*/ ISETP.LT.OR P0, PT, R0, RZ, P0 ; /* 0x000000ff0000720c */
/* 0x000fda0000701670 */
/*00a0*/ @P0 BRA 0x290 ; /* 0x000001e000000947 */
/* 0x000fea0003800000 */
/*00b0*/ LEA R2, P0, R0, c[0x0][0x160], 0x2 ; /* 0x0000580000027a11 */
/* 0x000fc800078010ff */
/*00c0*/ LEA.HI.X R3, R0, c[0x0][0x164], R3, 0x2, P0 ; /* 0x0000590000037a11 */
/* 0x000fca00000f1403 */
/*00d0*/ LDG.E R4, [R2.64] ; /* 0x0000000402047981 */
/* 0x000ea2000c1e1900 */
/*00e0*/ ISETP.GT.U32.AND P0, PT, R11, 0x1, PT ; /* 0x000000010b00780c */
/* 0x000fe20003f04070 */
/*00f0*/ BSSY B1, 0x190 ; /* 0x0000009000017945 */
/* 0x000fe40003800000 */
/*0100*/ STS [R11.X4+0x8], R4 ; /* 0x000008040b007388 */
/* 0x0041f40000004800 */
/*0110*/ @P0 BRA 0x180 ; /* 0x0000006000000947 */
/* 0x000fea0003800000 */
/*0120*/ ISETP.GE.AND P0, PT, R0, 0x3, PT ; /* 0x000000030000780c */
/* 0x000fda0003f06270 */
/*0130*/ @!P0 BRA 0x170 ; /* 0x0000003000008947 */
/* 0x000fea0003800000 */
/*0140*/ LDG.E R4, [R2.64+-0x8] ; /* 0xfffff80402047981 */
/* 0x001ea8000c1e1900 */
/*0150*/ STS [R11.X4], R4 ; /* 0x000000040b007388 */
/* 0x0041e20000004800 */
/*0160*/ BRA 0x180 ; /* 0x0000001000007947 */
/* 0x000fea0003800000 */
/*0170*/ STS [R11.X4], R4 ; /* 0x000000040b007388 */
/* 0x0003e40000004800 */
/*0180*/ BSYNC B1 ; /* 0x0000000000017941 */
/* 0x000fea0003800000 */
/*0190*/ ISETP.GE.U32.AND P0, PT, R11, 0x3, PT ; /* 0x000000030b00780c */
/* 0x000fda0003f06070 */
/*01a0*/ @!P0 BRA 0x290 ; /* 0x000000e000008947 */
/* 0x000fea0003800000 */
/*01b0*/ IMAD.MOV.U32 R5, RZ, RZ, 0x1 ; /* 0x00000001ff057424 */
/* 0x000fe200078e00ff */
/*01c0*/ IADD3 R0, R0, 0x2, RZ ; /* 0x0000000200007810 */
/* 0x000fe20007ffe0ff */
/*01d0*/ IMAD.MOV.U32 R7, RZ, RZ, c[0x0][0x174] ; /* 0x00005d00ff077624 */
/* 0x000fc600078e00ff */
/*01e0*/ IADD3 R5, P1, -R5, c[0x0][0x170], RZ ; /* 0x00005c0005057a10 */
/* 0x000fe40007f3e1ff */
/*01f0*/ SHF.R.S32.HI R4, RZ, 0x1f, R0 ; /* 0x0000001fff047819 */
/* 0x003fe40000011400 */
/*0200*/ ISETP.GT.U32.AND P0, PT, R5, R0, PT ; /* 0x000000000500720c */
/* 0x000fe40003f04070 */
/*0210*/ IADD3.X R0, R7, -0x1, RZ, P1, !PT ; /* 0xffffffff07007810 */
/* 0x000fc80000ffe4ff */
/*0220*/ ISETP.GT.AND.EX P0, PT, R0, R4, PT, P0 ; /* 0x000000040000720c */
/* 0x000fda0003f04300 */
/*0230*/ @!P0 LEA R4, P1, R5.reuse, c[0x0][0x160], 0x2 ; /* 0x0000580005048a11 */
/* 0x040fe200078210ff */
/*0240*/ @P0 LDG.E R2, [R2.64+0x8] ; /* 0x0000080402020981 */
/* 0x000ea6000c1e1900 */
/*0250*/ @!P0 LEA.HI.X R5, R5, c[0x0][0x164], R0, 0x2, P1 ; /* 0x0000590005058a11 */
/* 0x000fca00008f1400 */
/*0260*/ @!P0 LDG.E R4, [R4.64] ; /* 0x0000000404048981 */
/* 0x000ee8000c1e1900 */
/*0270*/ @!P0 STS [R11.X4], R4 ; /* 0x000000040b008388 */
/* 0x0081e80000004800 */
/*0280*/ @P0 STS [R11.X4], R2 ; /* 0x000000020b000388 */
/* 0x0041e40000004800 */
/*0290*/ BSYNC B0 ; /* 0x0000000000007941 */
/* 0x000fea0003800000 */
/*02a0*/ ISETP.GT.U32.AND P0, PT, R11, 0xf, PT ; /* 0x0000000f0b00780c */
/* 0x000fda0003f04070 */
/*02b0*/ @P0 EXIT ; /* 0x000000000000094d */
/* 0x000fea0003800000 */
/*02c0*/ LDS R0, [R11.X4] ; /* 0x000000000b007984 */
/* 0x000ea20000004800 */
/*02d0*/ IMAD R2, R6, 0x10, R11 ; /* 0x0000001006027824 */
/* 0x001fc600078e020b */
/*02e0*/ LDS R3, [R11.X4+0x4] ; /* 0x000004000b037984 */
/* 0x000e280000004800 */
/*02f0*/ LDS R5, [R11.X4+0x8] ; /* 0x000008000b057984 */
/* 0x000ee80000004800 */
/*0300*/ LDS R7, [R11.X4+0xc] ; /* 0x00000c000b077984 */
/* 0x000f280000004800 */
/*0310*/ LDS R9, [R11.X4+0x10] ; /* 0x000010000b097984 */
/* 0x000f620000004800 */
/*0320*/ FFMA R0, R0, c[0x3][0x0], RZ ; /* 0x00c0000000007a23 */
/* 0x004fc800000000ff */
/*0330*/ FFMA R0, R3, c[0x3][0x4], R0 ; /* 0x00c0010003007a23 */
/* 0x001fe40000000000 */
/*0340*/ IMAD.MOV.U32 R3, RZ, RZ, 0x4 ; /* 0x00000004ff037424 */
/* 0x000fe400078e00ff */
/*0350*/ FFMA R0, R5, c[0x3][0x8], R0 ; /* 0x00c0020005007a23 */
/* 0x008fe40000000000 */
/*0360*/ IMAD.WIDE.U32 R2, R2, R3, c[0x0][0x168] ; /* 0x00005a0002027625 */
/* 0x000fc800078e0003 */
/*0370*/ FFMA R0, R7, c[0x3][0xc], R0 ; /* 0x00c0030007007a23 */
/* 0x010fc80000000000 */
/*0380*/ FFMA R9, R9, c[0x3][0x10], R0 ; /* 0x00c0040009097a23 */
/* 0x020fca0000000000 */
/*0390*/ STG.E [R2.64], R9 ; /* 0x0000000902007986 */
/* 0x000fe2000c101904 */
/*03a0*/ EXIT ; /* 0x000000000000794d */
/* 0x000fea0003800000 */
/*03b0*/ BRA 0x3b0; /* 0xfffffff000007947 */
/* 0x000fc0000383ffff */
/*03c0*/ NOP; /* 0x0000000000007918 */
/* 0x000fc00000000000 */
/*03d0*/ NOP; /* 0x0000000000007918 */
/* 0x000fc00000000000 */
/*03e0*/ NOP; /* 0x0000000000007918 */
/* 0x000fc00000000000 */
/*03f0*/ NOP; /* 0x0000000000007918 */
/* 0x000fc00000000000 */
/*0400*/ NOP; /* 0x0000000000007918 */
/* 0x000fc00000000000 */
/*0410*/ NOP; /* 0x0000000000007918 */
/* 0x000fc00000000000 */
/*0420*/ NOP; /* 0x0000000000007918 */
/* 0x000fc00000000000 */
/*0430*/ NOP; /* 0x0000000000007918 */
/* 0x000fc00000000000 */
/*0440*/ NOP; /* 0x0000000000007918 */
/* 0x000fc00000000000 */
/*0450*/ NOP; /* 0x0000000000007918 */
/* 0x000fc00000000000 */
/*0460*/ NOP; /* 0x0000000000007918 */
/* 0x000fc00000000000 */
/*0470*/ NOP; /* 0x0000000000007918 */
/* 0x000fc00000000000 */
.......... | .text
.amdgcn_target "amdgcn-amd-amdhsa--gfx1100"
.protected _Z27convolution_2D_basic_kernelPfS_l
.globl _Z27convolution_2D_basic_kernelPfS_l
.p2align 8
.type _Z27convolution_2D_basic_kernelPfS_l,@function
_Z27convolution_2D_basic_kernelPfS_l:
s_load_b32 s2, s[0:1], 0x24
s_mov_b32 s6, exec_lo
s_waitcnt lgkmcnt(0)
s_and_b32 s2, s2, 0xffff
s_delay_alu instid0(SALU_CYCLE_1) | instskip(NEXT) | instid1(VALU_DEP_1)
v_mad_u64_u32 v[1:2], null, s15, s2, v[0:1]
v_cmpx_lt_i32_e32 -1, v1
s_cbranch_execz .LBB0_8
s_load_b64 s[2:3], s[0:1], 0x10
v_mov_b32_e32 v2, 0
s_waitcnt lgkmcnt(0)
s_delay_alu instid0(VALU_DEP_1)
v_cmp_gt_i64_e32 vcc_lo, s[2:3], v[1:2]
s_and_b32 exec_lo, exec_lo, vcc_lo
s_cbranch_execz .LBB0_8
s_load_b64 s[4:5], s[0:1], 0x0
v_lshlrev_b64 v[2:3], 2, v[1:2]
v_lshlrev_b32_e32 v5, 2, v0
s_mov_b32 s7, exec_lo
s_waitcnt lgkmcnt(0)
s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_3)
v_add_co_u32 v2, vcc_lo, s4, v2
v_add_co_ci_u32_e32 v3, vcc_lo, s5, v3, vcc_lo
global_load_b32 v4, v[2:3], off
s_waitcnt vmcnt(0)
ds_store_b32 v5, v4 offset:8
v_cmpx_gt_u32_e32 2, v0
s_cbranch_execz .LBB0_6
s_mov_b32 s8, exec_lo
v_cmpx_lt_i32_e32 2, v1
s_cbranch_execz .LBB0_5
global_load_b32 v4, v[2:3], off offset:-8
.LBB0_5:
s_or_b32 exec_lo, exec_lo, s8
v_lshlrev_b32_e32 v2, 2, v0
s_waitcnt vmcnt(0)
ds_store_b32 v2, v4
.LBB0_6:
s_or_b32 exec_lo, exec_lo, s7
v_cmp_lt_u32_e32 vcc_lo, 2, v0
s_and_b32 exec_lo, exec_lo, vcc_lo
s_cbranch_execz .LBB0_8
v_dual_mov_b32 v2, 0 :: v_dual_add_nc_u32 v1, 2, v1
s_add_u32 s2, s2, -1
s_addc_u32 s3, s3, -1
s_delay_alu instid0(VALU_DEP_1) | instid1(SALU_CYCLE_1)
v_cmp_lt_i64_e32 vcc_lo, s[2:3], v[1:2]
v_cndmask_b32_e64 v2, 0, s3, vcc_lo
v_cndmask_b32_e64 v1, v1, s2, vcc_lo
s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
v_lshlrev_b64 v[1:2], 2, v[1:2]
v_add_co_u32 v1, vcc_lo, s4, v1
s_delay_alu instid0(VALU_DEP_2)
v_add_co_ci_u32_e32 v2, vcc_lo, s5, v2, vcc_lo
global_load_b32 v1, v[1:2], off
v_lshlrev_b32_e32 v2, 2, v0
s_waitcnt vmcnt(0)
ds_store_b32 v2, v1
.LBB0_8:
s_or_b32 exec_lo, exec_lo, s6
s_delay_alu instid0(SALU_CYCLE_1)
s_mov_b32 s2, exec_lo
v_cmpx_gt_u32_e32 16, v0
s_cbranch_execz .LBB0_12
v_dual_mov_b32 v1, 0 :: v_dual_lshlrev_b32 v2, 2, v0
s_mov_b64 s[2:3], 0
.p2align 6
.LBB0_10:
s_getpc_b64 s[4:5]
s_add_u32 s4, s4, M@rel32@lo+4
s_addc_u32 s5, s5, M@rel32@hi+12
s_add_u32 s4, s2, s4
s_addc_u32 s5, s3, s5
ds_load_b32 v3, v2
s_load_b32 s4, s[4:5], 0x0
v_add_nc_u32_e32 v2, 4, v2
s_add_u32 s2, s2, 4
s_addc_u32 s3, s3, 0
s_cmp_lg_u32 s2, 20
s_waitcnt lgkmcnt(0)
v_fmac_f32_e32 v1, s4, v3
s_cbranch_scc1 .LBB0_10
s_load_b64 s[0:1], s[0:1], 0x8
v_lshl_or_b32 v2, s15, 4, v0
v_mov_b32_e32 v3, 0
s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
v_lshlrev_b64 v[2:3], 2, v[2:3]
s_waitcnt lgkmcnt(0)
v_add_co_u32 v2, vcc_lo, s0, v2
s_delay_alu instid0(VALU_DEP_2)
v_add_co_ci_u32_e32 v3, vcc_lo, s1, v3, vcc_lo
global_store_b32 v[2:3], v1, off
.LBB0_12:
s_nop 0
s_sendmsg sendmsg(MSG_DEALLOC_VGPRS)
s_endpgm
.section .rodata,"a",@progbits
.p2align 6, 0x0
.amdhsa_kernel _Z27convolution_2D_basic_kernelPfS_l
.amdhsa_group_segment_fixed_size 80
.amdhsa_private_segment_fixed_size 0
.amdhsa_kernarg_size 280
.amdhsa_user_sgpr_count 15
.amdhsa_user_sgpr_dispatch_ptr 0
.amdhsa_user_sgpr_queue_ptr 0
.amdhsa_user_sgpr_kernarg_segment_ptr 1
.amdhsa_user_sgpr_dispatch_id 0
.amdhsa_user_sgpr_private_segment_size 0
.amdhsa_wavefront_size32 1
.amdhsa_uses_dynamic_stack 0
.amdhsa_enable_private_segment 0
.amdhsa_system_sgpr_workgroup_id_x 1
.amdhsa_system_sgpr_workgroup_id_y 0
.amdhsa_system_sgpr_workgroup_id_z 0
.amdhsa_system_sgpr_workgroup_info 0
.amdhsa_system_vgpr_workitem_id 0
.amdhsa_next_free_vgpr 6
.amdhsa_next_free_sgpr 16
.amdhsa_float_round_mode_32 0
.amdhsa_float_round_mode_16_64 0
.amdhsa_float_denorm_mode_32 3
.amdhsa_float_denorm_mode_16_64 3
.amdhsa_dx10_clamp 1
.amdhsa_ieee_mode 1
.amdhsa_fp16_overflow 0
.amdhsa_workgroup_processor_mode 1
.amdhsa_memory_ordered 1
.amdhsa_forward_progress 0
.amdhsa_shared_vgpr_count 0
.amdhsa_exception_fp_ieee_invalid_op 0
.amdhsa_exception_fp_denorm_src 0
.amdhsa_exception_fp_ieee_div_zero 0
.amdhsa_exception_fp_ieee_overflow 0
.amdhsa_exception_fp_ieee_underflow 0
.amdhsa_exception_fp_ieee_inexact 0
.amdhsa_exception_int_div_zero 0
.end_amdhsa_kernel
.text
.Lfunc_end0:
.size _Z27convolution_2D_basic_kernelPfS_l, .Lfunc_end0-_Z27convolution_2D_basic_kernelPfS_l
.section .AMDGPU.csdata,"",@progbits
.text
.p2alignl 7, 3214868480
.fill 96, 4, 3214868480
.protected M
.type M,@object
.section .bss,"aw",@nobits
.globl M
.p2align 4, 0x0
M:
.zero 20
.size M, 20
.type __hip_cuid_,@object
.globl __hip_cuid_
__hip_cuid_:
.byte 0
.size __hip_cuid_, 1
.ident "AMD clang version 18.0.0git (https://github.com/RadeonOpenCompute/llvm-project roc-6.3.2 25012 e5bf7e55c91490b07c49d8960fa7983d864936c4)"
.section ".note.GNU-stack","",@progbits
.addrsig
.addrsig_sym M
.addrsig_sym __hip_cuid_
.amdgpu_metadata
---
amdhsa.kernels:
- .args:
- .address_space: global
.offset: 0
.size: 8
.value_kind: global_buffer
- .address_space: global
.offset: 8
.size: 8
.value_kind: global_buffer
- .offset: 16
.size: 8
.value_kind: by_value
- .offset: 24
.size: 4
.value_kind: hidden_block_count_x
- .offset: 28
.size: 4
.value_kind: hidden_block_count_y
- .offset: 32
.size: 4
.value_kind: hidden_block_count_z
- .offset: 36
.size: 2
.value_kind: hidden_group_size_x
- .offset: 38
.size: 2
.value_kind: hidden_group_size_y
- .offset: 40
.size: 2
.value_kind: hidden_group_size_z
- .offset: 42
.size: 2
.value_kind: hidden_remainder_x
- .offset: 44
.size: 2
.value_kind: hidden_remainder_y
- .offset: 46
.size: 2
.value_kind: hidden_remainder_z
- .offset: 64
.size: 8
.value_kind: hidden_global_offset_x
- .offset: 72
.size: 8
.value_kind: hidden_global_offset_y
- .offset: 80
.size: 8
.value_kind: hidden_global_offset_z
- .offset: 88
.size: 2
.value_kind: hidden_grid_dims
.group_segment_fixed_size: 80
.kernarg_segment_align: 8
.kernarg_segment_size: 280
.language: OpenCL C
.language_version:
- 2
- 0
.max_flat_workgroup_size: 1024
.name: _Z27convolution_2D_basic_kernelPfS_l
.private_segment_fixed_size: 0
.sgpr_count: 18
.sgpr_spill_count: 0
.symbol: _Z27convolution_2D_basic_kernelPfS_l.kd
.uniform_work_group_size: 1
.uses_dynamic_stack: false
.vgpr_count: 6
.vgpr_spill_count: 0
.wavefront_size: 32
.workgroup_processor_mode: 1
amdhsa.target: amdgcn-amd-amdhsa--gfx1100
amdhsa.version:
- 1
- 2
...
.end_amdgpu_metadata |
You are a helpful coding assistant specialized in converting from CUDA host assembly to AMD host assembly. | .file "tmpxft_000f7d97_00000000-6_conv_tiled1.cudafe1.cpp"
.text
#APP
#NO_APP
.type _ZL26__cudaUnregisterBinaryUtilv, @function
_ZL26__cudaUnregisterBinaryUtilv:
.LFB2063:
.cfi_startproc
endbr64
subq $8, %rsp
.cfi_def_cfa_offset 16
movq _ZL20__cudaFatCubinHandle(%rip), %rdi
call __cudaUnregisterFatBinary@PLT
addq $8, %rsp
.cfi_def_cfa_offset 8
ret
.cfi_endproc
.LFE2063:
.size _ZL26__cudaUnregisterBinaryUtilv, .-_ZL26__cudaUnregisterBinaryUtilv
.section .rodata._Z9gpuAssert9cudaErrorPKci.str1.1,"aMS",@progbits,1
.LC0:
.string "GPUassert: %s %s %d\n"
.section .text._Z9gpuAssert9cudaErrorPKci,"axG",@progbits,_Z9gpuAssert9cudaErrorPKci,comdat
.weak _Z9gpuAssert9cudaErrorPKci
.type _Z9gpuAssert9cudaErrorPKci, @function
_Z9gpuAssert9cudaErrorPKci:
.LFB2057:
.cfi_startproc
endbr64
testl %edi, %edi
jne .L9
ret
.L9:
pushq %rbp
.cfi_def_cfa_offset 16
.cfi_offset 6, -16
pushq %rbx
.cfi_def_cfa_offset 24
.cfi_offset 3, -24
subq $8, %rsp
.cfi_def_cfa_offset 32
movq %rsi, %rbx
movl %edx, %ebp
call cudaGetErrorString@PLT
movq %rax, %rcx
movl %ebp, %r9d
movq %rbx, %r8
leaq .LC0(%rip), %rdx
movl $2, %esi
movq stderr(%rip), %rdi
movl $0, %eax
call __fprintf_chk@PLT
addq $8, %rsp
.cfi_def_cfa_offset 24
popq %rbx
.cfi_def_cfa_offset 16
popq %rbp
.cfi_def_cfa_offset 8
ret
.cfi_endproc
.LFE2057:
.size _Z9gpuAssert9cudaErrorPKci, .-_Z9gpuAssert9cudaErrorPKci
.text
.globl _Z11generateMatPfmm
.type _Z11generateMatPfmm, @function
_Z11generateMatPfmm:
.LFB2058:
.cfi_startproc
endbr64
testq %rsi, %rsi
je .L19
pushq %r15
.cfi_def_cfa_offset 16
.cfi_offset 15, -16
pushq %r14
.cfi_def_cfa_offset 24
.cfi_offset 14, -24
pushq %r13
.cfi_def_cfa_offset 32
.cfi_offset 13, -32
pushq %r12
.cfi_def_cfa_offset 40
.cfi_offset 12, -40
pushq %rbp
.cfi_def_cfa_offset 48
.cfi_offset 6, -48
pushq %rbx
.cfi_def_cfa_offset 56
.cfi_offset 3, -56
subq $8, %rsp
.cfi_def_cfa_offset 64
movq %rsi, %r14
movq %rdx, %r12
leaq 0(,%rdx,4), %r15
movq %rdi, %rbp
movl $0, %r13d
jmp .L12
.L13:
call rand@PLT
movslq %eax, %rdx
imulq $1374389535, %rdx, %rdx
sarq $37, %rdx
movl %eax, %ecx
sarl $31, %ecx
subl %ecx, %edx
imull $100, %edx, %edx
subl %edx, %eax
pxor %xmm0, %xmm0
cvtsi2ssl %eax, %xmm0
movss %xmm0, 0(%rbp,%rbx,4)
addq $1, %rbx
cmpq %r12, %rbx
jne .L13
.L14:
addq $1, %r13
addq %r15, %rbp
cmpq %r13, %r14
je .L10
.L12:
movl $0, %ebx
testq %r12, %r12
jne .L13
jmp .L14
.L10:
addq $8, %rsp
.cfi_def_cfa_offset 56
popq %rbx
.cfi_def_cfa_offset 48
popq %rbp
.cfi_def_cfa_offset 40
popq %r12
.cfi_def_cfa_offset 32
popq %r13
.cfi_def_cfa_offset 24
popq %r14
.cfi_def_cfa_offset 16
popq %r15
.cfi_def_cfa_offset 8
ret
.L19:
.cfi_restore 3
.cfi_restore 6
.cfi_restore 12
.cfi_restore 13
.cfi_restore 14
.cfi_restore 15
ret
.cfi_endproc
.LFE2058:
.size _Z11generateMatPfmm, .-_Z11generateMatPfmm
.section .rodata.str1.1,"aMS",@progbits,1
.LC1:
.string "%f "
.LC2:
.string "\n"
.text
.globl _Z8printMatPfmm
.type _Z8printMatPfmm, @function
_Z8printMatPfmm:
.LFB2059:
.cfi_startproc
endbr64
pushq %r15
.cfi_def_cfa_offset 16
.cfi_offset 15, -16
pushq %r14
.cfi_def_cfa_offset 24
.cfi_offset 14, -24
pushq %r13
.cfi_def_cfa_offset 32
.cfi_offset 13, -32
pushq %r12
.cfi_def_cfa_offset 40
.cfi_offset 12, -40
pushq %rbp
.cfi_def_cfa_offset 48
.cfi_offset 6, -48
pushq %rbx
.cfi_def_cfa_offset 56
.cfi_offset 3, -56
subq $24, %rsp
.cfi_def_cfa_offset 80
movq %rsi, 8(%rsp)
testq %rsi, %rsi
je .L23
movq %rdx, %r12
leaq 0(,%rdx,4), %r15
movq %rdi, %rbp
movl $0, %r14d
leaq .LC1(%rip), %r13
jmp .L24
.L25:
pxor %xmm0, %xmm0
cvtss2sd 0(%rbp,%rbx,4), %xmm0
movq %r13, %rsi
movl $2, %edi
movl $1, %eax
call __printf_chk@PLT
addq $1, %rbx
cmpq %r12, %rbx
jne .L25
.L26:
leaq .LC2(%rip), %rsi
movl $2, %edi
movl $0, %eax
call __printf_chk@PLT
addq $1, %r14
addq %r15, %rbp
cmpq %r14, 8(%rsp)
je .L23
.L24:
movl $0, %ebx
testq %r12, %r12
jne .L25
jmp .L26
.L23:
leaq .LC2(%rip), %rsi
movl $2, %edi
movl $0, %eax
call __printf_chk@PLT
addq $24, %rsp
.cfi_def_cfa_offset 56
popq %rbx
.cfi_def_cfa_offset 48
popq %rbp
.cfi_def_cfa_offset 40
popq %r12
.cfi_def_cfa_offset 32
popq %r13
.cfi_def_cfa_offset 24
popq %r14
.cfi_def_cfa_offset 16
popq %r15
.cfi_def_cfa_offset 8
ret
.cfi_endproc
.LFE2059:
.size _Z8printMatPfmm, .-_Z8printMatPfmm
.globl _Z50__device_stub__Z27convolution_2D_basic_kernelPfS_lPfS_l
.type _Z50__device_stub__Z27convolution_2D_basic_kernelPfS_lPfS_l, @function
_Z50__device_stub__Z27convolution_2D_basic_kernelPfS_lPfS_l:
.LFB2085:
.cfi_startproc
endbr64
subq $136, %rsp
.cfi_def_cfa_offset 144
movq %rdi, 24(%rsp)
movq %rsi, 16(%rsp)
movq %rdx, 8(%rsp)
movq %fs:40, %rax
movq %rax, 120(%rsp)
xorl %eax, %eax
leaq 24(%rsp), %rax
movq %rax, 96(%rsp)
leaq 16(%rsp), %rax
movq %rax, 104(%rsp)
leaq 8(%rsp), %rax
movq %rax, 112(%rsp)
movl $1, 48(%rsp)
movl $1, 52(%rsp)
movl $1, 56(%rsp)
movl $1, 60(%rsp)
movl $1, 64(%rsp)
movl $1, 68(%rsp)
leaq 40(%rsp), %rcx
leaq 32(%rsp), %rdx
leaq 60(%rsp), %rsi
leaq 48(%rsp), %rdi
call __cudaPopCallConfiguration@PLT
testl %eax, %eax
je .L35
.L31:
movq 120(%rsp), %rax
subq %fs:40, %rax
jne .L36
addq $136, %rsp
.cfi_remember_state
.cfi_def_cfa_offset 8
ret
.L35:
.cfi_restore_state
pushq 40(%rsp)
.cfi_def_cfa_offset 152
pushq 40(%rsp)
.cfi_def_cfa_offset 160
leaq 112(%rsp), %r9
movq 76(%rsp), %rcx
movl 84(%rsp), %r8d
movq 64(%rsp), %rsi
movl 72(%rsp), %edx
leaq _Z27convolution_2D_basic_kernelPfS_l(%rip), %rdi
call cudaLaunchKernel@PLT
addq $16, %rsp
.cfi_def_cfa_offset 144
jmp .L31
.L36:
call __stack_chk_fail@PLT
.cfi_endproc
.LFE2085:
.size _Z50__device_stub__Z27convolution_2D_basic_kernelPfS_lPfS_l, .-_Z50__device_stub__Z27convolution_2D_basic_kernelPfS_lPfS_l
.globl _Z27convolution_2D_basic_kernelPfS_l
.type _Z27convolution_2D_basic_kernelPfS_l, @function
_Z27convolution_2D_basic_kernelPfS_l:
.LFB2086:
.cfi_startproc
endbr64
subq $8, %rsp
.cfi_def_cfa_offset 16
call _Z50__device_stub__Z27convolution_2D_basic_kernelPfS_lPfS_l
addq $8, %rsp
.cfi_def_cfa_offset 8
ret
.cfi_endproc
.LFE2086:
.size _Z27convolution_2D_basic_kernelPfS_l, .-_Z27convolution_2D_basic_kernelPfS_l
.section .rodata.str1.8,"aMS",@progbits,1
.align 8
.LC4:
.string "/home/ubuntu/Datasets/stackv2/train-structured/jinpyojeon/cpsc375/master/assign06/conv_tiled1.cu"
.section .rodata.str1.1
.LC6:
.string "The elapsed time is %f s\n"
.text
.globl main
.type main, @function
main:
.LFB2060:
.cfi_startproc
endbr64
pushq %r12
.cfi_def_cfa_offset 16
.cfi_offset 12, -16
pushq %rbp
.cfi_def_cfa_offset 24
.cfi_offset 6, -24
pushq %rbx
.cfi_def_cfa_offset 32
.cfi_offset 3, -32
subq $112, %rsp
.cfi_def_cfa_offset 144
movq %fs:40, %rax
movq %rax, 104(%rsp)
xorl %eax, %eax
movl $0, %edi
call time@PLT
movl %eax, %edi
call srand@PLT
movss .LC3(%rip), %xmm0
movss %xmm0, 80(%rsp)
movss %xmm0, 84(%rsp)
movss %xmm0, 88(%rsp)
movss %xmm0, 92(%rsp)
movss %xmm0, 96(%rsp)
leaq 16(%rsp), %rdi
call cudaEventCreate@PLT
leaq 24(%rsp), %rdi
call cudaEventCreate@PLT
movl $0, %esi
movq 16(%rsp), %rdi
call cudaEventRecord@PLT
leaq 32(%rsp), %rdi
movl $20, %esi
call cudaMalloc@PLT
leaq 48(%rsp), %rdi
movl $1048576, %esi
call cudaMalloc@PLT
leaq 40(%rsp), %rdi
movl $1048576, %esi
call cudaMalloc@PLT
movl $1048576, %edi
call malloc@PLT
movq %rax, %rbx
movl $1048576, %edi
call malloc@PLT
movq %rax, %rbp
movl $262144, %edx
movl $1, %esi
movq %rbx, %rdi
call _Z11generateMatPfmm
movl $1, %ecx
movl $1048576, %edx
movq %rbx, %rsi
movq 48(%rsp), %rdi
call cudaMemcpy@PLT
movl %eax, %edi
movl $116, %edx
leaq .LC4(%rip), %r12
movq %r12, %rsi
call _Z9gpuAssert9cudaErrorPKci
leaq 80(%rsp), %rsi
movl $1, %r8d
movl $0, %ecx
movl $20, %edx
leaq _ZL1M(%rip), %rdi
call cudaMemcpyToSymbol@PLT
movl %eax, %edi
movl $118, %edx
movq %r12, %rsi
call _Z9gpuAssert9cudaErrorPKci
movl $16, 56(%rsp)
movl $1, 60(%rsp)
movl $16384, 68(%rsp)
movl $1, 72(%rsp)
movl $0, %r9d
movl $0, %r8d
movq 56(%rsp), %rdx
movl $1, %ecx
movq 68(%rsp), %rdi
movl $1, %esi
call __cudaPushCallConfiguration@PLT
testl %eax, %eax
je .L43
.L40:
call cudaPeekAtLastError@PLT
movl %eax, %edi
movl $127, %edx
leaq .LC4(%rip), %r12
movq %r12, %rsi
call _Z9gpuAssert9cudaErrorPKci
call cudaDeviceSynchronize@PLT
movl %eax, %edi
movl $128, %edx
movq %r12, %rsi
call _Z9gpuAssert9cudaErrorPKci
movl $2, %ecx
movl $1048576, %edx
movq 40(%rsp), %rsi
movq %rbp, %rdi
call cudaMemcpy@PLT
movl %eax, %edi
movl $130, %edx
movq %r12, %rsi
call _Z9gpuAssert9cudaErrorPKci
movl $0, %esi
movq 24(%rsp), %rdi
call cudaEventRecord@PLT
movq 24(%rsp), %rdi
call cudaEventSynchronize@PLT
leaq 12(%rsp), %rdi
movq 24(%rsp), %rdx
movq 16(%rsp), %rsi
call cudaEventElapsedTime@PLT
movq 16(%rsp), %rdi
call cudaEventDestroy@PLT
movq 24(%rsp), %rdi
call cudaEventDestroy@PLT
pxor %xmm0, %xmm0
cvtss2sd 12(%rsp), %xmm0
divsd .LC5(%rip), %xmm0
leaq .LC6(%rip), %rsi
movl $2, %edi
movl $1, %eax
call __printf_chk@PLT
movq %rbx, %rdi
call free@PLT
movq %rbp, %rdi
call free@PLT
movq 48(%rsp), %rdi
call cudaFree@PLT
movq 32(%rsp), %rdi
call cudaFree@PLT
movq 40(%rsp), %rdi
call cudaFree@PLT
movq 104(%rsp), %rax
subq %fs:40, %rax
jne .L44
movl $0, %eax
addq $112, %rsp
.cfi_remember_state
.cfi_def_cfa_offset 32
popq %rbx
.cfi_def_cfa_offset 24
popq %rbp
.cfi_def_cfa_offset 16
popq %r12
.cfi_def_cfa_offset 8
ret
.L43:
.cfi_restore_state
movl $262144, %edx
movq 40(%rsp), %rsi
movq 48(%rsp), %rdi
call _Z50__device_stub__Z27convolution_2D_basic_kernelPfS_lPfS_l
jmp .L40
.L44:
call __stack_chk_fail@PLT
.cfi_endproc
.LFE2060:
.size main, .-main
.section .rodata.str1.8
.align 8
.LC7:
.string "_Z27convolution_2D_basic_kernelPfS_l"
.section .rodata.str1.1
.LC8:
.string "M"
.text
.type _ZL24__sti____cudaRegisterAllv, @function
_ZL24__sti____cudaRegisterAllv:
.LFB2088:
.cfi_startproc
endbr64
pushq %rbx
.cfi_def_cfa_offset 16
.cfi_offset 3, -16
leaq _ZL15__fatDeviceText(%rip), %rdi
call __cudaRegisterFatBinary@PLT
movq %rax, %rbx
movq %rax, _ZL20__cudaFatCubinHandle(%rip)
pushq $0
.cfi_def_cfa_offset 24
pushq $0
.cfi_def_cfa_offset 32
pushq $0
.cfi_def_cfa_offset 40
pushq $0
.cfi_def_cfa_offset 48
movl $0, %r9d
movl $-1, %r8d
leaq .LC7(%rip), %rdx
movq %rdx, %rcx
leaq _Z27convolution_2D_basic_kernelPfS_l(%rip), %rsi
movq %rax, %rdi
call __cudaRegisterFunction@PLT
addq $32, %rsp
.cfi_def_cfa_offset 16
pushq $0
.cfi_def_cfa_offset 24
pushq $1
.cfi_def_cfa_offset 32
movl $20, %r9d
movl $0, %r8d
leaq .LC8(%rip), %rdx
movq %rdx, %rcx
leaq _ZL1M(%rip), %rsi
movq %rbx, %rdi
call __cudaRegisterVar@PLT
addq $16, %rsp
.cfi_def_cfa_offset 16
movq _ZL20__cudaFatCubinHandle(%rip), %rdi
call __cudaRegisterFatBinaryEnd@PLT
leaq _ZL26__cudaUnregisterBinaryUtilv(%rip), %rdi
call atexit@PLT
popq %rbx
.cfi_def_cfa_offset 8
ret
.cfi_endproc
.LFE2088:
.size _ZL24__sti____cudaRegisterAllv, .-_ZL24__sti____cudaRegisterAllv
.section .init_array,"aw"
.align 8
.quad _ZL24__sti____cudaRegisterAllv
.section .nvFatBinSegment,"aw"
.align 8
.type _ZL15__fatDeviceText, @object
.size _ZL15__fatDeviceText, 24
_ZL15__fatDeviceText:
.long 1180844977
.long 1
.quad fatbinData
.quad 0
.local _ZL20__cudaFatCubinHandle
.comm _ZL20__cudaFatCubinHandle,8,8
.local _ZL1M
.comm _ZL1M,20,16
.section .rodata.cst4,"aM",@progbits,4
.align 4
.LC3:
.long 1045220557
.section .rodata.cst8,"aM",@progbits,8
.align 8
.LC5:
.long 0
.long 1083129856
.ident "GCC: (Ubuntu 13.3.0-6ubuntu2~24.04) 13.3.0"
.section .note.GNU-stack,"",@progbits
.section .note.gnu.property,"a"
.align 8
.long 1f - 0f
.long 4f - 1f
.long 5
0:
.string "GNU"
1:
.align 8
.long 0xc0000002
.long 3f - 2f
2:
.long 0x3
3:
.align 8
4: | .text
.file "conv_tiled1.hip"
.globl _Z42__device_stub__convolution_2D_basic_kernelPfS_l # -- Begin function _Z42__device_stub__convolution_2D_basic_kernelPfS_l
.p2align 4, 0x90
.type _Z42__device_stub__convolution_2D_basic_kernelPfS_l,@function
_Z42__device_stub__convolution_2D_basic_kernelPfS_l: # @_Z42__device_stub__convolution_2D_basic_kernelPfS_l
.cfi_startproc
# %bb.0:
subq $104, %rsp
.cfi_def_cfa_offset 112
movq %rdi, 72(%rsp)
movq %rsi, 64(%rsp)
movq %rdx, 56(%rsp)
leaq 72(%rsp), %rax
movq %rax, 80(%rsp)
leaq 64(%rsp), %rax
movq %rax, 88(%rsp)
leaq 56(%rsp), %rax
movq %rax, 96(%rsp)
leaq 40(%rsp), %rdi
leaq 24(%rsp), %rsi
leaq 16(%rsp), %rdx
leaq 8(%rsp), %rcx
callq __hipPopCallConfiguration
movq 40(%rsp), %rsi
movl 48(%rsp), %edx
movq 24(%rsp), %rcx
movl 32(%rsp), %r8d
leaq 80(%rsp), %r9
movl $_Z27convolution_2D_basic_kernelPfS_l, %edi
pushq 8(%rsp)
.cfi_adjust_cfa_offset 8
pushq 24(%rsp)
.cfi_adjust_cfa_offset 8
callq hipLaunchKernel
addq $120, %rsp
.cfi_adjust_cfa_offset -120
retq
.Lfunc_end0:
.size _Z42__device_stub__convolution_2D_basic_kernelPfS_l, .Lfunc_end0-_Z42__device_stub__convolution_2D_basic_kernelPfS_l
.cfi_endproc
# -- End function
.globl _Z11generateMatPfmm # -- Begin function _Z11generateMatPfmm
.p2align 4, 0x90
.type _Z11generateMatPfmm,@function
_Z11generateMatPfmm: # @_Z11generateMatPfmm
.cfi_startproc
# %bb.0:
testq %rsi, %rsi
je .LBB1_7
# %bb.1: # %.preheader.lr.ph
pushq %rbp
.cfi_def_cfa_offset 16
pushq %r15
.cfi_def_cfa_offset 24
pushq %r14
.cfi_def_cfa_offset 32
pushq %r13
.cfi_def_cfa_offset 40
pushq %r12
.cfi_def_cfa_offset 48
pushq %rbx
.cfi_def_cfa_offset 56
pushq %rax
.cfi_def_cfa_offset 64
.cfi_offset %rbx, -56
.cfi_offset %r12, -48
.cfi_offset %r13, -40
.cfi_offset %r14, -32
.cfi_offset %r15, -24
.cfi_offset %rbp, -16
movq %rdx, %rbx
movq %rsi, %r14
movq %rdi, %r15
leaq (,%rdx,4), %r12
xorl %r13d, %r13d
jmp .LBB1_2
.p2align 4, 0x90
.LBB1_5: # %._crit_edge
# in Loop: Header=BB1_2 Depth=1
incq %r13
addq %r12, %r15
cmpq %r14, %r13
je .LBB1_6
.LBB1_2: # %.preheader
# =>This Loop Header: Depth=1
# Child Loop BB1_4 Depth 2
testq %rbx, %rbx
je .LBB1_5
# %bb.3: # %.lr.ph
# in Loop: Header=BB1_2 Depth=1
xorl %ebp, %ebp
.p2align 4, 0x90
.LBB1_4: # Parent Loop BB1_2 Depth=1
# => This Inner Loop Header: Depth=2
callq rand
cltq
imulq $1374389535, %rax, %rcx # imm = 0x51EB851F
movq %rcx, %rdx
shrq $63, %rdx
sarq $37, %rcx
addl %edx, %ecx
imull $100, %ecx, %ecx
subl %ecx, %eax
xorps %xmm0, %xmm0
cvtsi2ss %eax, %xmm0
movss %xmm0, (%r15,%rbp,4)
incq %rbp
cmpq %rbp, %rbx
jne .LBB1_4
jmp .LBB1_5
.LBB1_6:
addq $8, %rsp
.cfi_def_cfa_offset 56
popq %rbx
.cfi_def_cfa_offset 48
popq %r12
.cfi_def_cfa_offset 40
popq %r13
.cfi_def_cfa_offset 32
popq %r14
.cfi_def_cfa_offset 24
popq %r15
.cfi_def_cfa_offset 16
popq %rbp
.cfi_def_cfa_offset 8
.cfi_restore %rbx
.cfi_restore %r12
.cfi_restore %r13
.cfi_restore %r14
.cfi_restore %r15
.cfi_restore %rbp
.LBB1_7: # %._crit_edge15
retq
.Lfunc_end1:
.size _Z11generateMatPfmm, .Lfunc_end1-_Z11generateMatPfmm
.cfi_endproc
# -- End function
.globl _Z8printMatPfmm # -- Begin function _Z8printMatPfmm
.p2align 4, 0x90
.type _Z8printMatPfmm,@function
_Z8printMatPfmm: # @_Z8printMatPfmm
.cfi_startproc
# %bb.0:
testq %rsi, %rsi
je .LBB2_7
# %bb.1: # %.preheader.lr.ph
pushq %rbp
.cfi_def_cfa_offset 16
pushq %r15
.cfi_def_cfa_offset 24
pushq %r14
.cfi_def_cfa_offset 32
pushq %r13
.cfi_def_cfa_offset 40
pushq %r12
.cfi_def_cfa_offset 48
pushq %rbx
.cfi_def_cfa_offset 56
pushq %rax
.cfi_def_cfa_offset 64
.cfi_offset %rbx, -56
.cfi_offset %r12, -48
.cfi_offset %r13, -40
.cfi_offset %r14, -32
.cfi_offset %r15, -24
.cfi_offset %rbp, -16
movq %rdx, %rbx
movq %rsi, %r14
movq %rdi, %r15
leaq (,%rdx,4), %r12
xorl %r13d, %r13d
jmp .LBB2_2
.p2align 4, 0x90
.LBB2_5: # %._crit_edge
# in Loop: Header=BB2_2 Depth=1
movl $10, %edi
callq putchar@PLT
incq %r13
addq %r12, %r15
cmpq %r14, %r13
je .LBB2_6
.LBB2_2: # %.preheader
# =>This Loop Header: Depth=1
# Child Loop BB2_4 Depth 2
testq %rbx, %rbx
je .LBB2_5
# %bb.3: # %.lr.ph
# in Loop: Header=BB2_2 Depth=1
xorl %ebp, %ebp
.p2align 4, 0x90
.LBB2_4: # Parent Loop BB2_2 Depth=1
# => This Inner Loop Header: Depth=2
movss (%r15,%rbp,4), %xmm0 # xmm0 = mem[0],zero,zero,zero
cvtss2sd %xmm0, %xmm0
movl $.L.str, %edi
movb $1, %al
callq printf
incq %rbp
cmpq %rbp, %rbx
jne .LBB2_4
jmp .LBB2_5
.LBB2_6:
addq $8, %rsp
.cfi_def_cfa_offset 56
popq %rbx
.cfi_def_cfa_offset 48
popq %r12
.cfi_def_cfa_offset 40
popq %r13
.cfi_def_cfa_offset 32
popq %r14
.cfi_def_cfa_offset 24
popq %r15
.cfi_def_cfa_offset 16
popq %rbp
.cfi_def_cfa_offset 8
.cfi_restore %rbx
.cfi_restore %r12
.cfi_restore %r13
.cfi_restore %r14
.cfi_restore %r15
.cfi_restore %rbp
.LBB2_7: # %._crit_edge16
movl $10, %edi
jmp putchar@PLT # TAILCALL
.Lfunc_end2:
.size _Z8printMatPfmm, .Lfunc_end2-_Z8printMatPfmm
.cfi_endproc
# -- End function
.section .rodata.cst8,"aM",@progbits,8
.p2align 3, 0x0 # -- Begin function main
.LCPI3_0:
.quad 0x408f400000000000 # double 1000
.text
.globl main
.p2align 4, 0x90
.type main,@function
main: # @main
.cfi_startproc
# %bb.0:
pushq %r15
.cfi_def_cfa_offset 16
pushq %r14
.cfi_def_cfa_offset 24
pushq %rbx
.cfi_def_cfa_offset 32
subq $176, %rsp
.cfi_def_cfa_offset 208
.cfi_offset %rbx, -32
.cfi_offset %r14, -24
.cfi_offset %r15, -16
xorl %ebx, %ebx
xorl %edi, %edi
callq time
movl %eax, %edi
callq srand
.p2align 4, 0x90
.LBB3_1: # =>This Inner Loop Header: Depth=1
movl $1045220557, 144(%rsp,%rbx,4) # imm = 0x3E4CCCCD
incq %rbx
cmpq $5, %rbx
jne .LBB3_1
# %bb.2: # %.preheader.i
leaq 24(%rsp), %rdi
callq hipEventCreate
movq %rsp, %rdi
callq hipEventCreate
movq 24(%rsp), %rdi
xorl %r15d, %r15d
xorl %esi, %esi
callq hipEventRecord
leaq 64(%rsp), %rdi
movl $20, %esi
callq hipMalloc
leaq 8(%rsp), %rdi
movl $1048576, %esi # imm = 0x100000
callq hipMalloc
leaq 16(%rsp), %rdi
movl $1048576, %esi # imm = 0x100000
callq hipMalloc
movl $1048576, %edi # imm = 0x100000
callq malloc
movq %rax, %rbx
movl $1048576, %edi # imm = 0x100000
callq malloc
movq %rax, %r14
.p2align 4, 0x90
.LBB3_3: # =>This Inner Loop Header: Depth=1
callq rand
cltq
imulq $1374389535, %rax, %rcx # imm = 0x51EB851F
movq %rcx, %rdx
shrq $63, %rdx
sarq $37, %rcx
addl %edx, %ecx
imull $100, %ecx, %ecx
subl %ecx, %eax
xorps %xmm0, %xmm0
cvtsi2ss %eax, %xmm0
movss %xmm0, (%rbx,%r15,4)
incq %r15
cmpq $262144, %r15 # imm = 0x40000
jne .LBB3_3
# %bb.4: # %_Z11generateMatPfmm.exit
movq 8(%rsp), %rdi
movl $1048576, %edx # imm = 0x100000
movq %rbx, %rsi
movl $1, %ecx
callq hipMemcpy
testl %eax, %eax
jne .LBB3_5
.LBB3_6: # %_Z9gpuAssert10hipError_tPKci.exit
leaq 144(%rsp), %rsi
movl $M, %edi
movl $20, %edx
xorl %ecx, %ecx
movl $1, %r8d
callq hipMemcpyToSymbol
testl %eax, %eax
jne .LBB3_7
.LBB3_8: # %_Z9gpuAssert10hipError_tPKci.exit31
movabsq $4294967312, %rdx # imm = 0x100000010
leaq 16368(%rdx), %rdi
movl $1, %esi
movl $1, %ecx
xorl %r8d, %r8d
xorl %r9d, %r9d
callq __hipPushCallConfiguration
testl %eax, %eax
jne .LBB3_10
# %bb.9:
movq 8(%rsp), %rax
movq 16(%rsp), %rcx
movq %rax, 136(%rsp)
movq %rcx, 128(%rsp)
movq $262144, 120(%rsp) # imm = 0x40000
leaq 136(%rsp), %rax
movq %rax, 32(%rsp)
leaq 128(%rsp), %rax
movq %rax, 40(%rsp)
leaq 120(%rsp), %rax
movq %rax, 48(%rsp)
leaq 104(%rsp), %rdi
leaq 88(%rsp), %rsi
leaq 80(%rsp), %rdx
leaq 72(%rsp), %rcx
callq __hipPopCallConfiguration
movq 104(%rsp), %rsi
movl 112(%rsp), %edx
movq 88(%rsp), %rcx
movl 96(%rsp), %r8d
leaq 32(%rsp), %r9
movl $_Z27convolution_2D_basic_kernelPfS_l, %edi
pushq 72(%rsp)
.cfi_adjust_cfa_offset 8
pushq 88(%rsp)
.cfi_adjust_cfa_offset 8
callq hipLaunchKernel
addq $16, %rsp
.cfi_adjust_cfa_offset -16
.LBB3_10:
callq hipPeekAtLastError
testl %eax, %eax
jne .LBB3_11
.LBB3_12: # %_Z9gpuAssert10hipError_tPKci.exit33
callq hipDeviceSynchronize
testl %eax, %eax
jne .LBB3_13
.LBB3_14: # %_Z9gpuAssert10hipError_tPKci.exit35
movq 16(%rsp), %rsi
movl $1048576, %edx # imm = 0x100000
movq %r14, %rdi
movl $2, %ecx
callq hipMemcpy
testl %eax, %eax
jne .LBB3_15
.LBB3_16: # %_Z9gpuAssert10hipError_tPKci.exit37
movq (%rsp), %rdi
xorl %esi, %esi
callq hipEventRecord
movq (%rsp), %rdi
callq hipEventSynchronize
movq 24(%rsp), %rsi
movq (%rsp), %rdx
leaq 32(%rsp), %rdi
callq hipEventElapsedTime
movq 24(%rsp), %rdi
callq hipEventDestroy
movq (%rsp), %rdi
callq hipEventDestroy
movss 32(%rsp), %xmm0 # xmm0 = mem[0],zero,zero,zero
cvtss2sd %xmm0, %xmm0
divsd .LCPI3_0(%rip), %xmm0
movl $.L.str.3, %edi
movb $1, %al
callq printf
movq %rbx, %rdi
callq free
movq %r14, %rdi
callq free
movq 8(%rsp), %rdi
callq hipFree
movq 64(%rsp), %rdi
callq hipFree
movq 16(%rsp), %rdi
callq hipFree
xorl %eax, %eax
addq $176, %rsp
.cfi_def_cfa_offset 32
popq %rbx
.cfi_def_cfa_offset 24
popq %r14
.cfi_def_cfa_offset 16
popq %r15
.cfi_def_cfa_offset 8
retq
.LBB3_5:
.cfi_def_cfa_offset 208
movq stderr(%rip), %r15
movl %eax, %edi
callq hipGetErrorString
movl $.L.str.4, %esi
movl $.L.str.2, %ecx
movq %r15, %rdi
movq %rax, %rdx
movl $116, %r8d
xorl %eax, %eax
callq fprintf
jmp .LBB3_6
.LBB3_7:
movq stderr(%rip), %r15
movl %eax, %edi
callq hipGetErrorString
movl $.L.str.4, %esi
movl $.L.str.2, %ecx
movq %r15, %rdi
movq %rax, %rdx
movl $118, %r8d
xorl %eax, %eax
callq fprintf
jmp .LBB3_8
.LBB3_11:
movq stderr(%rip), %r15
movl %eax, %edi
callq hipGetErrorString
movl $.L.str.4, %esi
movl $.L.str.2, %ecx
movq %r15, %rdi
movq %rax, %rdx
movl $127, %r8d
xorl %eax, %eax
callq fprintf
jmp .LBB3_12
.LBB3_13:
movq stderr(%rip), %r15
movl %eax, %edi
callq hipGetErrorString
movl $.L.str.4, %esi
movl $.L.str.2, %ecx
movq %r15, %rdi
movq %rax, %rdx
movl $128, %r8d
xorl %eax, %eax
callq fprintf
jmp .LBB3_14
.LBB3_15:
movq stderr(%rip), %r15
movl %eax, %edi
callq hipGetErrorString
movl $.L.str.4, %esi
movl $.L.str.2, %ecx
movq %r15, %rdi
movq %rax, %rdx
movl $130, %r8d
xorl %eax, %eax
callq fprintf
jmp .LBB3_16
.Lfunc_end3:
.size main, .Lfunc_end3-main
.cfi_endproc
# -- End function
.p2align 4, 0x90 # -- Begin function __hip_module_ctor
.type __hip_module_ctor,@function
__hip_module_ctor: # @__hip_module_ctor
.cfi_startproc
# %bb.0:
pushq %rbx
.cfi_def_cfa_offset 16
subq $32, %rsp
.cfi_def_cfa_offset 48
.cfi_offset %rbx, -16
cmpq $0, __hip_gpubin_handle(%rip)
jne .LBB4_2
# %bb.1:
movl $__hip_fatbin_wrapper, %edi
callq __hipRegisterFatBinary
movq %rax, __hip_gpubin_handle(%rip)
.LBB4_2:
movq __hip_gpubin_handle(%rip), %rbx
xorps %xmm0, %xmm0
movups %xmm0, 16(%rsp)
movups %xmm0, (%rsp)
movl $_Z27convolution_2D_basic_kernelPfS_l, %esi
movl $.L__unnamed_1, %edx
movl $.L__unnamed_1, %ecx
movq %rbx, %rdi
movl $-1, %r8d
xorl %r9d, %r9d
callq __hipRegisterFunction
movl $0, 8(%rsp)
movl $1, (%rsp)
movl $M, %esi
movl $.L__unnamed_2, %edx
movl $.L__unnamed_2, %ecx
movl $20, %r9d
movq %rbx, %rdi
xorl %r8d, %r8d
callq __hipRegisterVar
movl $__hip_module_dtor, %edi
addq $32, %rsp
.cfi_def_cfa_offset 16
popq %rbx
.cfi_def_cfa_offset 8
jmp atexit # TAILCALL
.Lfunc_end4:
.size __hip_module_ctor, .Lfunc_end4-__hip_module_ctor
.cfi_endproc
# -- End function
.p2align 4, 0x90 # -- Begin function __hip_module_dtor
.type __hip_module_dtor,@function
__hip_module_dtor: # @__hip_module_dtor
.cfi_startproc
# %bb.0:
movq __hip_gpubin_handle(%rip), %rdi
testq %rdi, %rdi
je .LBB5_2
# %bb.1:
pushq %rax
.cfi_def_cfa_offset 16
callq __hipUnregisterFatBinary
movq $0, __hip_gpubin_handle(%rip)
addq $8, %rsp
.cfi_def_cfa_offset 8
.LBB5_2:
retq
.Lfunc_end5:
.size __hip_module_dtor, .Lfunc_end5-__hip_module_dtor
.cfi_endproc
# -- End function
.type M,@object # @M
.local M
.comm M,20,16
.type _Z27convolution_2D_basic_kernelPfS_l,@object # @_Z27convolution_2D_basic_kernelPfS_l
.section .rodata,"a",@progbits
.globl _Z27convolution_2D_basic_kernelPfS_l
.p2align 3, 0x0
_Z27convolution_2D_basic_kernelPfS_l:
.quad _Z42__device_stub__convolution_2D_basic_kernelPfS_l
.size _Z27convolution_2D_basic_kernelPfS_l, 8
.type .L.str,@object # @.str
.section .rodata.str1.1,"aMS",@progbits,1
.L.str:
.asciz "%f "
.size .L.str, 4
.type .L.str.2,@object # @.str.2
.L.str.2:
.asciz "/home/ubuntu/Datasets/stackv2/train-structured-repos-hip/jinpyojeon/cpsc375/master/assign06/conv_tiled1.hip"
.size .L.str.2, 108
.type .L.str.3,@object # @.str.3
.L.str.3:
.asciz "The elapsed time is %f s\n"
.size .L.str.3, 26
.type .L.str.4,@object # @.str.4
.L.str.4:
.asciz "GPUassert: %s %s %d\n"
.size .L.str.4, 21
.type .L__unnamed_1,@object # @0
.L__unnamed_1:
.asciz "_Z27convolution_2D_basic_kernelPfS_l"
.size .L__unnamed_1, 37
.type .L__unnamed_2,@object # @1
.L__unnamed_2:
.asciz "M"
.size .L__unnamed_2, 2
.type __hip_fatbin_wrapper,@object # @__hip_fatbin_wrapper
.section .hipFatBinSegment,"a",@progbits
.p2align 3, 0x0
__hip_fatbin_wrapper:
.long 1212764230 # 0x48495046
.long 1 # 0x1
.quad __hip_fatbin
.quad 0
.size __hip_fatbin_wrapper, 24
.type __hip_gpubin_handle,@object # @__hip_gpubin_handle
.local __hip_gpubin_handle
.comm __hip_gpubin_handle,8,8
.section .init_array,"aw",@init_array
.p2align 3, 0x0
.quad __hip_module_ctor
.type __hip_cuid_,@object # @__hip_cuid_
.bss
.globl __hip_cuid_
__hip_cuid_:
.byte 0 # 0x0
.size __hip_cuid_, 1
.section ".linker-options","e",@llvm_linker_options
.ident "AMD clang version 18.0.0git (https://github.com/RadeonOpenCompute/llvm-project roc-6.3.2 25012 e5bf7e55c91490b07c49d8960fa7983d864936c4)"
.section ".note.GNU-stack","",@progbits
.addrsig
.addrsig_sym _Z42__device_stub__convolution_2D_basic_kernelPfS_l
.addrsig_sym __hip_module_ctor
.addrsig_sym __hip_module_dtor
.addrsig_sym M
.addrsig_sym _Z27convolution_2D_basic_kernelPfS_l
.addrsig_sym __hip_fatbin
.addrsig_sym __hip_fatbin_wrapper
.addrsig_sym __hip_cuid_ |
You are a helpful coding assistant specialized in converting CUDA source code to CUDA device assembly. | #include<iostream>
#include<cstdio>
using namespace std;
__global__ void maxi(int *a,int *b,int n)
{
int block=256*blockIdx.x;
int max=0;
for(int i=block;i<min(256+block,n);i++)
{
if(max<a[i])
{
max=a[i];
}
}
b[blockIdx.x]=max;
}
int main()
{
cout<<"Enter the size of array: ";
int n;
cin>>n;
int a[n];
cudaEvent_t start,end,start1,end1;
for(int i=0;i<n;i++)
{
a[i]=rand()%n;
}
for(int i=0;i<n;i++)
{
printf("%d\t",a[i]);
}
cudaEventCreate(&start1);
cudaEventCreate(&end1);
cudaEventRecord(start1);
int max=0;
for(int i=0;i<n;i++)
{
if(a[i]>max)
{
max=a[i];
}
}
cudaEventRecord(end1);
cudaEventSynchronize(end1);
float time1=0;
cudaEventElapsedTime(&time1,start1,end1);
cout<<"\nSequential Processing:";
cout<<"\nMax="<<max;
cout<<"\nSequential time="<<time1;
int *ad,*bd;
int size=n*sizeof(int);
cudaMalloc(&ad,size);
cudaMemcpy(ad,a,size,cudaMemcpyHostToDevice);
int grids=ceil(n*1.0f/256.0f);
cudaMalloc(&bd,grids*sizeof(int));
dim3 grid(grids,1);
dim3 block(1,1);
cudaEventCreate(&start);
cudaEventCreate(&end);
cudaEventRecord(start);
while(n>1)
{
maxi<<<grids,block>>>(ad,bd,n);
n=ceil(n*1.0f/256.0f);
cudaMemcpy(ad,bd,n*sizeof(int),cudaMemcpyDeviceToDevice);
}
cudaEventRecord(end);
cudaEventSynchronize(end);
float time=0;
cudaEventElapsedTime(&time,start,end);
int ans[2];
cudaMemcpy(ans,ad,4,cudaMemcpyDeviceToHost);
cout<<"\nParallel Processing:\nMax="<<ans[0]<<endl;
cout<<"Parallel Time=";
cout<<time<<endl;
} | code for sm_80
Function : _Z4maxiPiS_i
.headerflags @"EF_CUDA_TEXMODE_UNIFIED EF_CUDA_64BIT_ADDRESS EF_CUDA_SM80 EF_CUDA_VIRTUAL_SM(EF_CUDA_SM80)"
/*0000*/ IMAD.MOV.U32 R1, RZ, RZ, c[0x0][0x28] ; /* 0x00000a00ff017624 */
/* 0x000fe400078e00ff */
/*0010*/ S2R R0, SR_CTAID.X ; /* 0x0000000000007919 */
/* 0x000e220000002500 */
/*0020*/ ULDC.64 UR4, c[0x0][0x118] ; /* 0x0000460000047ab9 */
/* 0x000fe20000000a00 */
/*0030*/ IMAD.MOV.U32 R5, RZ, RZ, RZ ; /* 0x000000ffff057224 */
/* 0x000fe400078e00ff */
/*0040*/ IMAD.SHL.U32 R6, R0, 0x100, RZ ; /* 0x0000010000067824 */
/* 0x001fca00078e00ff */
/*0050*/ IADD3 R2, R6, 0x100, RZ ; /* 0x0000010006027810 */
/* 0x000fc80007ffe0ff */
/*0060*/ IMNMX R3, R2, c[0x0][0x170], PT ; /* 0x00005c0002037a17 */
/* 0x000fc80003800200 */
/*0070*/ ISETP.GE.AND P0, PT, R6, R3, PT ; /* 0x000000030600720c */
/* 0x000fda0003f06270 */
/*0080*/ @P0 BRA 0x800 ; /* 0x0000077000000947 */
/* 0x000fea0003800000 */
/*0090*/ LOP3.LUT R2, RZ, c[0x0][0x170], RZ, 0x33, !PT ; /* 0x00005c00ff027a12 */
/* 0x000fe200078e33ff */
/*00a0*/ IMAD.MOV.U32 R5, RZ, RZ, RZ ; /* 0x000000ffff057224 */
/* 0x000fe200078e00ff */
/*00b0*/ IADD3 R3, -R6, -0x101, RZ ; /* 0xfffffeff06037810 */
/* 0x000fc80007ffe1ff */
/*00c0*/ IMNMX R7, R2, R3, !PT ; /* 0x0000000302077217 */
/* 0x000fc80007800200 */
/*00d0*/ IADD3 R2, -R6, -0x2, -R7 ; /* 0xfffffffe06027810 */
/* 0x000fe40007ffe907 */
/*00e0*/ LOP3.LUT R3, RZ, R7, RZ, 0x33, !PT ; /* 0x00000007ff037212 */
/* 0x000fe400078e33ff */
/*00f0*/ ISETP.GE.U32.AND P0, PT, R2, 0x3, PT ; /* 0x000000030200780c */
/* 0x000fc60003f06070 */
/*0100*/ IMAD.IADD R3, R3, 0x1, -R6 ; /* 0x0000000103037824 */
/* 0x000fca00078e0a06 */
/*0110*/ LOP3.LUT R4, R3, 0x3, RZ, 0xc0, !PT ; /* 0x0000000303047812 */
/* 0x000fca00078ec0ff */
/*0120*/ @!P0 BRA 0x730 ; /* 0x0000060000008947 */
/* 0x000fea0003800000 */
/*0130*/ IADD3 R7, R4, R7, R6 ; /* 0x0000000704077210 */
/* 0x000fe20007ffe006 */
/*0140*/ IMAD.MOV.U32 R3, RZ, RZ, 0x4 ; /* 0x00000004ff037424 */
/* 0x000fe400078e00ff */
/*0150*/ IMAD.MOV.U32 R5, RZ, RZ, RZ ; /* 0x000000ffff057224 */
/* 0x000fe400078e00ff */
/*0160*/ IMAD.MOV R7, RZ, RZ, -R7 ; /* 0x000000ffff077224 */
/* 0x000fe400078e0a07 */
/*0170*/ IMAD.WIDE R2, R6, R3, c[0x0][0x160] ; /* 0x0000580006027625 */
/* 0x000fc600078e0203 */
/*0180*/ ISETP.GT.AND P0, PT, R7, 0x1, PT ; /* 0x000000010700780c */
/* 0x000fe40003f04270 */
/*0190*/ IADD3 R2, P1, R2, 0x8, RZ ; /* 0x0000000802027810 */
/* 0x000fca0007f3e0ff */
/*01a0*/ IMAD.X R3, RZ, RZ, R3, P1 ; /* 0x000000ffff037224 */
/* 0x000fcc00008e0603 */
/*01b0*/ @!P0 BRA 0x630 ; /* 0x0000047000008947 */
/* 0x000fea0003800000 */
/*01c0*/ IADD3 R8, R7, -0x1, RZ ; /* 0xffffffff07087810 */
/* 0x000fe40007ffe0ff */
/*01d0*/ PLOP3.LUT P0, PT, PT, PT, PT, 0x80, 0x0 ; /* 0x000000000000781c */
/* 0x000fe40003f0f070 */
/*01e0*/ ISETP.GT.AND P1, PT, R8, 0xc, PT ; /* 0x0000000c0800780c */
/* 0x000fda0003f24270 */
/*01f0*/ @!P1 BRA 0x470 ; /* 0x0000027000009947 */
/* 0x000fea0003800000 */
/*0200*/ PLOP3.LUT P0, PT, PT, PT, PT, 0x8, 0x0 ; /* 0x000000000000781c */
/* 0x000fe40003f0e170 */
/*0210*/ LDG.E R18, [R2.64+-0x8] ; /* 0xfffff80402127981 */
/* 0x0000a8000c1e1900 */
/*0220*/ LDG.E R17, [R2.64+-0x4] ; /* 0xfffffc0402117981 */
/* 0x0000e8000c1e1900 */
/*0230*/ LDG.E R20, [R2.64] ; /* 0x0000000402147981 */
/* 0x000128000c1e1900 */
/*0240*/ LDG.E R22, [R2.64+0x4] ; /* 0x0000040402167981 */
/* 0x000168000c1e1900 */
/*0250*/ LDG.E R24, [R2.64+0x8] ; /* 0x0000080402187981 */
/* 0x000168000c1e1900 */
/*0260*/ LDG.E R26, [R2.64+0xc] ; /* 0x00000c04021a7981 */
/* 0x000168000c1e1900 */
/*0270*/ LDG.E R28, [R2.64+0x10] ; /* 0x00001004021c7981 */
/* 0x000168000c1e1900 */
/*0280*/ LDG.E R16, [R2.64+0x14] ; /* 0x0000140402107981 */
/* 0x000168000c1e1900 */
/*0290*/ LDG.E R15, [R2.64+0x18] ; /* 0x00001804020f7981 */
/* 0x000168000c1e1900 */
/*02a0*/ LDG.E R14, [R2.64+0x1c] ; /* 0x00001c04020e7981 */
/* 0x000168000c1e1900 */
/*02b0*/ LDG.E R13, [R2.64+0x20] ; /* 0x00002004020d7981 */
/* 0x000168000c1e1900 */
/*02c0*/ LDG.E R12, [R2.64+0x24] ; /* 0x00002404020c7981 */
/* 0x000168000c1e1900 */
/*02d0*/ LDG.E R11, [R2.64+0x28] ; /* 0x00002804020b7981 */
/* 0x000168000c1e1900 */
/*02e0*/ LDG.E R9, [R2.64+0x2c] ; /* 0x00002c0402097981 */
/* 0x000168000c1e1900 */
/*02f0*/ LDG.E R10, [R2.64+0x30] ; /* 0x00003004020a7981 */
/* 0x000168000c1e1900 */
/*0300*/ LDG.E R8, [R2.64+0x34] ; /* 0x0000340402087981 */
/* 0x000162000c1e1900 */
/*0310*/ IADD3 R7, R7, -0x10, RZ ; /* 0xfffffff007077810 */
/* 0x000fc40007ffe0ff */
/*0320*/ IADD3 R6, R6, 0x10, RZ ; /* 0x0000001006067810 */
/* 0x000fe40007ffe0ff */
/*0330*/ ISETP.GT.AND P1, PT, R7, 0xd, PT ; /* 0x0000000d0700780c */
/* 0x000fe40003f24270 */
/*0340*/ IADD3 R2, P2, R2, 0x40, RZ ; /* 0x0000004002027810 */
/* 0x001fca0007f5e0ff */
/*0350*/ IMAD.X R3, RZ, RZ, R3, P2 ; /* 0x000000ffff037224 */
/* 0x000fe200010e0603 */
/*0360*/ IMNMX R18, R18, R5, !PT ; /* 0x0000000512127217 */
/* 0x004fc80007800200 */
/*0370*/ IMNMX R17, R18, R17, !PT ; /* 0x0000001112117217 */
/* 0x008fc80007800200 */
/*0380*/ IMNMX R17, R17, R20, !PT ; /* 0x0000001411117217 */
/* 0x010fc80007800200 */
/*0390*/ IMNMX R17, R17, R22, !PT ; /* 0x0000001611117217 */
/* 0x020fc80007800200 */
/*03a0*/ IMNMX R17, R17, R24, !PT ; /* 0x0000001811117217 */
/* 0x000fc80007800200 */
/*03b0*/ IMNMX R17, R17, R26, !PT ; /* 0x0000001a11117217 */
/* 0x000fc80007800200 */
/*03c0*/ IMNMX R17, R17, R28, !PT ; /* 0x0000001c11117217 */
/* 0x000fc80007800200 */
/*03d0*/ IMNMX R16, R17, R16, !PT ; /* 0x0000001011107217 */
/* 0x000fc80007800200 */
/*03e0*/ IMNMX R15, R16, R15, !PT ; /* 0x0000000f100f7217 */
/* 0x000fc80007800200 */
/*03f0*/ IMNMX R14, R15, R14, !PT ; /* 0x0000000e0f0e7217 */
/* 0x000fc80007800200 */
/*0400*/ IMNMX R13, R14, R13, !PT ; /* 0x0000000d0e0d7217 */
/* 0x000fc80007800200 */
/*0410*/ IMNMX R12, R13, R12, !PT ; /* 0x0000000c0d0c7217 */
/* 0x000fc80007800200 */
/*0420*/ IMNMX R12, R12, R11, !PT ; /* 0x0000000b0c0c7217 */
/* 0x000fc80007800200 */
/*0430*/ IMNMX R9, R12, R9, !PT ; /* 0x000000090c097217 */
/* 0x000fc80007800200 */
/*0440*/ IMNMX R9, R9, R10, !PT ; /* 0x0000000a09097217 */
/* 0x000fc80007800200 */
/*0450*/ IMNMX R5, R9, R8, !PT ; /* 0x0000000809057217 */
/* 0x000fe20007800200 */
/*0460*/ @P1 BRA 0x210 ; /* 0xfffffda000001947 */
/* 0x000fea000383ffff */
/*0470*/ IADD3 R8, R7, -0x1, RZ ; /* 0xffffffff07087810 */
/* 0x000fc80007ffe0ff */
/*0480*/ ISETP.GT.AND P1, PT, R8, 0x4, PT ; /* 0x000000040800780c */
/* 0x000fda0003f24270 */
/*0490*/ @!P1 BRA 0x610 ; /* 0x0000017000009947 */
/* 0x000fea0003800000 */
/*04a0*/ LDG.E R8, [R2.64+-0x8] ; /* 0xfffff80402087981 */
/* 0x000ea8000c1e1900 */
/*04b0*/ LDG.E R9, [R2.64+-0x4] ; /* 0xfffffc0402097981 */
/* 0x000ee8000c1e1900 */
/*04c0*/ LDG.E R11, [R2.64] ; /* 0x00000004020b7981 */
/* 0x000f28000c1e1900 */
/*04d0*/ LDG.E R13, [R2.64+0x4] ; /* 0x00000404020d7981 */
/* 0x000f68000c1e1900 */
/*04e0*/ LDG.E R15, [R2.64+0x8] ; /* 0x00000804020f7981 */
/* 0x000168000c1e1900 */
/*04f0*/ LDG.E R17, [R2.64+0xc] ; /* 0x00000c0402117981 */
/* 0x000168000c1e1900 */
/*0500*/ LDG.E R19, [R2.64+0x10] ; /* 0x0000100402137981 */
/* 0x000168000c1e1900 */
/*0510*/ LDG.E R21, [R2.64+0x14] ; /* 0x0000140402157981 */
/* 0x000162000c1e1900 */
/*0520*/ PLOP3.LUT P0, PT, PT, PT, PT, 0x8, 0x0 ; /* 0x000000000000781c */
/* 0x000fc40003f0e170 */
/*0530*/ IADD3 R6, R6, 0x8, RZ ; /* 0x0000000806067810 */
/* 0x000fe40007ffe0ff */
/*0540*/ IADD3 R7, R7, -0x8, RZ ; /* 0xfffffff807077810 */
/* 0x000fe40007ffe0ff */
/*0550*/ IMNMX R8, R5, R8, !PT ; /* 0x0000000805087217 */
/* 0x004fc80007800200 */
/*0560*/ IMNMX R8, R8, R9, !PT ; /* 0x0000000908087217 */
/* 0x008fe40007800200 */
/*0570*/ IADD3 R9, P1, R2, 0x20, RZ ; /* 0x0000002002097810 */
/* 0x000fe40007f3e0ff */
/*0580*/ IMNMX R8, R8, R11, !PT ; /* 0x0000000b08087217 */
/* 0x010fc60007800200 */
/*0590*/ IMAD.X R10, RZ, RZ, R3, P1 ; /* 0x000000ffff0a7224 */
/* 0x000fe200008e0603 */
/*05a0*/ IMNMX R8, R8, R13, !PT ; /* 0x0000000d08087217 */
/* 0x020fe20007800200 */
/*05b0*/ IMAD.MOV.U32 R2, RZ, RZ, R9 ; /* 0x000000ffff027224 */
/* 0x001fe400078e0009 */
/*05c0*/ IMAD.MOV.U32 R3, RZ, RZ, R10 ; /* 0x000000ffff037224 */
/* 0x000fe200078e000a */
/*05d0*/ IMNMX R8, R8, R15, !PT ; /* 0x0000000f08087217 */
/* 0x000fc80007800200 */
/*05e0*/ IMNMX R8, R8, R17, !PT ; /* 0x0000001108087217 */
/* 0x000fc80007800200 */
/*05f0*/ IMNMX R8, R8, R19, !PT ; /* 0x0000001308087217 */
/* 0x000fc80007800200 */
/*0600*/ IMNMX R5, R8, R21, !PT ; /* 0x0000001508057217 */
/* 0x000fe40007800200 */
/*0610*/ ISETP.NE.OR P0, PT, R7, 0x1, P0 ; /* 0x000000010700780c */
/* 0x000fda0000705670 */
/*0620*/ @!P0 BRA 0x730 ; /* 0x0000010000008947 */
/* 0x000fea0003800000 */
/*0630*/ LDG.E R8, [R2.64+-0x8] ; /* 0xfffff80402087981 */
/* 0x000ea8000c1e1900 */
/*0640*/ LDG.E R9, [R2.64+-0x4] ; /* 0xfffffc0402097981 */
/* 0x000ee8000c1e1900 */
/*0650*/ LDG.E R11, [R2.64] ; /* 0x00000004020b7981 */
/* 0x000f28000c1e1900 */
/*0660*/ LDG.E R13, [R2.64+0x4] ; /* 0x00000404020d7981 */
/* 0x000f62000c1e1900 */
/*0670*/ IADD3 R7, R7, -0x4, RZ ; /* 0xfffffffc07077810 */
/* 0x000fc40007ffe0ff */
/*0680*/ IADD3 R6, R6, 0x4, RZ ; /* 0x0000000406067810 */
/* 0x000fe40007ffe0ff */
/*0690*/ ISETP.NE.AND P0, PT, R7, 0x1, PT ; /* 0x000000010700780c */
/* 0x000fe40003f05270 */
/*06a0*/ IMNMX R8, R8, R5, !PT ; /* 0x0000000508087217 */
/* 0x004fc80007800200 */
/*06b0*/ IMNMX R8, R8, R9, !PT ; /* 0x0000000908087217 */
/* 0x008fe40007800200 */
/*06c0*/ IADD3 R9, P1, R2, 0x10, RZ ; /* 0x0000001002097810 */
/* 0x000fe40007f3e0ff */
/*06d0*/ IMNMX R8, R8, R11, !PT ; /* 0x0000000b08087217 */
/* 0x010fc60007800200 */
/*06e0*/ IMAD.X R10, RZ, RZ, R3, P1 ; /* 0x000000ffff0a7224 */
/* 0x000fe200008e0603 */
/*06f0*/ IMNMX R5, R8, R13, !PT ; /* 0x0000000d08057217 */
/* 0x020fe20007800200 */
/*0700*/ IMAD.MOV.U32 R2, RZ, RZ, R9 ; /* 0x000000ffff027224 */
/* 0x000fe400078e0009 */
/*0710*/ IMAD.MOV.U32 R3, RZ, RZ, R10 ; /* 0x000000ffff037224 */
/* 0x000fe200078e000a */
/*0720*/ @P0 BRA 0x630 ; /* 0xffffff0000000947 */
/* 0x000fea000383ffff */
/*0730*/ ISETP.NE.AND P0, PT, R4, RZ, PT ; /* 0x000000ff0400720c */
/* 0x000fda0003f05270 */
/*0740*/ @!P0 BRA 0x800 ; /* 0x000000b000008947 */
/* 0x000fea0003800000 */
/*0750*/ IMAD.MOV.U32 R7, RZ, RZ, 0x4 ; /* 0x00000004ff077424 */
/* 0x000fc800078e00ff */
/*0760*/ IMAD.WIDE R6, R6, R7, c[0x0][0x160] ; /* 0x0000580006067625 */
/* 0x000fc800078e0207 */
/*0770*/ IMAD.MOV.U32 R2, RZ, RZ, R6 ; /* 0x000000ffff027224 */
/* 0x000fe400078e0006 */
/*0780*/ IMAD.MOV.U32 R3, RZ, RZ, R7 ; /* 0x000000ffff037224 */
/* 0x000fca00078e0007 */
/*0790*/ LDG.E R2, [R2.64] ; /* 0x0000000402027981 */
/* 0x000ea2000c1e1900 */
/*07a0*/ IADD3 R4, R4, -0x1, RZ ; /* 0xffffffff04047810 */
/* 0x000fe40007ffe0ff */
/*07b0*/ IADD3 R6, P1, R6, 0x4, RZ ; /* 0x0000000406067810 */
/* 0x000fe40007f3e0ff */
/*07c0*/ ISETP.NE.AND P0, PT, R4, RZ, PT ; /* 0x000000ff0400720c */
/* 0x000fc60003f05270 */
/*07d0*/ IMAD.X R7, RZ, RZ, R7, P1 ; /* 0x000000ffff077224 */
/* 0x000fe200008e0607 */
/*07e0*/ IMNMX R5, R2, R5, !PT ; /* 0x0000000502057217 */
/* 0x004fd20007800200 */
/*07f0*/ @P0 BRA 0x770 ; /* 0xffffff7000000947 */
/* 0x000fea000383ffff */
/*0800*/ IMAD.MOV.U32 R3, RZ, RZ, 0x4 ; /* 0x00000004ff037424 */
/* 0x000fc800078e00ff */
/*0810*/ IMAD.WIDE.U32 R2, R0, R3, c[0x0][0x168] ; /* 0x00005a0000027625 */
/* 0x000fca00078e0003 */
/*0820*/ STG.E [R2.64], R5 ; /* 0x0000000502007986 */
/* 0x000fe2000c101904 */
/*0830*/ EXIT ; /* 0x000000000000794d */
/* 0x000fea0003800000 */
/*0840*/ BRA 0x840; /* 0xfffffff000007947 */
/* 0x000fc0000383ffff */
/*0850*/ NOP; /* 0x0000000000007918 */
/* 0x000fc00000000000 */
/*0860*/ NOP; /* 0x0000000000007918 */
/* 0x000fc00000000000 */
/*0870*/ NOP; /* 0x0000000000007918 */
/* 0x000fc00000000000 */
/*0880*/ NOP; /* 0x0000000000007918 */
/* 0x000fc00000000000 */
/*0890*/ NOP; /* 0x0000000000007918 */
/* 0x000fc00000000000 */
/*08a0*/ NOP; /* 0x0000000000007918 */
/* 0x000fc00000000000 */
/*08b0*/ NOP; /* 0x0000000000007918 */
/* 0x000fc00000000000 */
/*08c0*/ NOP; /* 0x0000000000007918 */
/* 0x000fc00000000000 */
/*08d0*/ NOP; /* 0x0000000000007918 */
/* 0x000fc00000000000 */
/*08e0*/ NOP; /* 0x0000000000007918 */
/* 0x000fc00000000000 */
/*08f0*/ NOP; /* 0x0000000000007918 */
/* 0x000fc00000000000 */
.......... |
You are a helpful coding assistant specialized in converting CUDA source code to CUDA host assembly. | #include<iostream>
#include<cstdio>
using namespace std;
__global__ void maxi(int *a,int *b,int n)
{
int block=256*blockIdx.x;
int max=0;
for(int i=block;i<min(256+block,n);i++)
{
if(max<a[i])
{
max=a[i];
}
}
b[blockIdx.x]=max;
}
int main()
{
cout<<"Enter the size of array: ";
int n;
cin>>n;
int a[n];
cudaEvent_t start,end,start1,end1;
for(int i=0;i<n;i++)
{
a[i]=rand()%n;
}
for(int i=0;i<n;i++)
{
printf("%d\t",a[i]);
}
cudaEventCreate(&start1);
cudaEventCreate(&end1);
cudaEventRecord(start1);
int max=0;
for(int i=0;i<n;i++)
{
if(a[i]>max)
{
max=a[i];
}
}
cudaEventRecord(end1);
cudaEventSynchronize(end1);
float time1=0;
cudaEventElapsedTime(&time1,start1,end1);
cout<<"\nSequential Processing:";
cout<<"\nMax="<<max;
cout<<"\nSequential time="<<time1;
int *ad,*bd;
int size=n*sizeof(int);
cudaMalloc(&ad,size);
cudaMemcpy(ad,a,size,cudaMemcpyHostToDevice);
int grids=ceil(n*1.0f/256.0f);
cudaMalloc(&bd,grids*sizeof(int));
dim3 grid(grids,1);
dim3 block(1,1);
cudaEventCreate(&start);
cudaEventCreate(&end);
cudaEventRecord(start);
while(n>1)
{
maxi<<<grids,block>>>(ad,bd,n);
n=ceil(n*1.0f/256.0f);
cudaMemcpy(ad,bd,n*sizeof(int),cudaMemcpyDeviceToDevice);
}
cudaEventRecord(end);
cudaEventSynchronize(end);
float time=0;
cudaEventElapsedTime(&time,start,end);
int ans[2];
cudaMemcpy(ans,ad,4,cudaMemcpyDeviceToHost);
cout<<"\nParallel Processing:\nMax="<<ans[0]<<endl;
cout<<"Parallel Time=";
cout<<time<<endl;
} | .file "tmpxft_00120572_00000000-6_a11.cudafe1.cpp"
.text
#APP
.globl _ZSt21ios_base_library_initv
#NO_APP
.type _ZL26__cudaUnregisterBinaryUtilv, @function
_ZL26__cudaUnregisterBinaryUtilv:
.LFB3672:
.cfi_startproc
endbr64
subq $8, %rsp
.cfi_def_cfa_offset 16
movq _ZL20__cudaFatCubinHandle(%rip), %rdi
call __cudaUnregisterFatBinary@PLT
addq $8, %rsp
.cfi_def_cfa_offset 8
ret
.cfi_endproc
.LFE3672:
.size _ZL26__cudaUnregisterBinaryUtilv, .-_ZL26__cudaUnregisterBinaryUtilv
.globl _Z26__device_stub__Z4maxiPiS_iPiS_i
.type _Z26__device_stub__Z4maxiPiS_iPiS_i, @function
_Z26__device_stub__Z4maxiPiS_iPiS_i:
.LFB3694:
.cfi_startproc
endbr64
subq $136, %rsp
.cfi_def_cfa_offset 144
movq %rdi, 24(%rsp)
movq %rsi, 16(%rsp)
movl %edx, 12(%rsp)
movq %fs:40, %rax
movq %rax, 120(%rsp)
xorl %eax, %eax
leaq 24(%rsp), %rax
movq %rax, 96(%rsp)
leaq 16(%rsp), %rax
movq %rax, 104(%rsp)
leaq 12(%rsp), %rax
movq %rax, 112(%rsp)
movl $1, 48(%rsp)
movl $1, 52(%rsp)
movl $1, 56(%rsp)
movl $1, 60(%rsp)
movl $1, 64(%rsp)
movl $1, 68(%rsp)
leaq 40(%rsp), %rcx
leaq 32(%rsp), %rdx
leaq 60(%rsp), %rsi
leaq 48(%rsp), %rdi
call __cudaPopCallConfiguration@PLT
testl %eax, %eax
je .L7
.L3:
movq 120(%rsp), %rax
subq %fs:40, %rax
jne .L8
addq $136, %rsp
.cfi_remember_state
.cfi_def_cfa_offset 8
ret
.L7:
.cfi_restore_state
pushq 40(%rsp)
.cfi_def_cfa_offset 152
pushq 40(%rsp)
.cfi_def_cfa_offset 160
leaq 112(%rsp), %r9
movq 76(%rsp), %rcx
movl 84(%rsp), %r8d
movq 64(%rsp), %rsi
movl 72(%rsp), %edx
leaq _Z4maxiPiS_i(%rip), %rdi
call cudaLaunchKernel@PLT
addq $16, %rsp
.cfi_def_cfa_offset 144
jmp .L3
.L8:
call __stack_chk_fail@PLT
.cfi_endproc
.LFE3694:
.size _Z26__device_stub__Z4maxiPiS_iPiS_i, .-_Z26__device_stub__Z4maxiPiS_iPiS_i
.globl _Z4maxiPiS_i
.type _Z4maxiPiS_i, @function
_Z4maxiPiS_i:
.LFB3695:
.cfi_startproc
endbr64
subq $8, %rsp
.cfi_def_cfa_offset 16
call _Z26__device_stub__Z4maxiPiS_iPiS_i
addq $8, %rsp
.cfi_def_cfa_offset 8
ret
.cfi_endproc
.LFE3695:
.size _Z4maxiPiS_i, .-_Z4maxiPiS_i
.section .rodata.str1.1,"aMS",@progbits,1
.LC0:
.string "Enter the size of array: "
.LC1:
.string "%d\t"
.LC3:
.string "\nSequential Processing:"
.LC4:
.string "\nMax="
.LC5:
.string "\nSequential time="
.LC10:
.string "\nParallel Processing:\nMax="
.LC11:
.string "Parallel Time="
.text
.globl main
.type main, @function
main:
.LFB3669:
.cfi_startproc
endbr64
pushq %rbp
.cfi_def_cfa_offset 16
.cfi_offset 6, -16
movq %rsp, %rbp
.cfi_def_cfa_register 6
pushq %r13
pushq %r12
pushq %rbx
subq $104, %rsp
.cfi_offset 13, -24
.cfi_offset 12, -32
.cfi_offset 3, -40
movq %fs:40, %rax
movq %rax, -40(%rbp)
xorl %eax, %eax
leaq .LC0(%rip), %rsi
leaq _ZSt4cout(%rip), %rdi
call _ZStlsISt11char_traitsIcEERSt13basic_ostreamIcT_ES5_PKc@PLT
leaq -128(%rbp), %rsi
leaq _ZSt3cin(%rip), %rdi
call _ZNSirsERi@PLT
movl -128(%rbp), %edx
movslq %edx, %rax
leaq 15(,%rax,4), %rax
movq %rax, %rsi
andq $-16, %rsi
andq $-4096, %rax
movq %rsp, %rcx
subq %rax, %rcx
.L12:
cmpq %rcx, %rsp
je .L13
subq $4096, %rsp
orq $0, 4088(%rsp)
jmp .L12
.L13:
movq %rsi, %rax
andl $4095, %eax
subq %rax, %rsp
testq %rax, %rax
je .L14
orq $0, -8(%rsp,%rax)
.L14:
movq %rsp, %r12
testl %edx, %edx
jle .L15
movl $0, %ebx
.L16:
call rand@PLT
movl -128(%rbp), %ecx
cltd
idivl %ecx
movl %edx, (%r12,%rbx,4)
addq $1, %rbx
cmpl %ebx, %ecx
jg .L16
testl %ecx, %ecx
jle .L15
movl $0, %ebx
leaq .LC1(%rip), %r13
.L17:
movl (%r12,%rbx,4), %edx
movq %r13, %rsi
movl $2, %edi
movl $0, %eax
call __printf_chk@PLT
addq $1, %rbx
cmpl %ebx, -128(%rbp)
jg .L17
.L15:
leaq -104(%rbp), %rdi
call cudaEventCreate@PLT
leaq -96(%rbp), %rdi
call cudaEventCreate@PLT
movl $0, %esi
movq -104(%rbp), %rdi
call cudaEventRecord@PLT
movl -128(%rbp), %edx
testl %edx, %edx
jle .L26
movq %r12, %rax
movslq %edx, %rdx
leaq (%r12,%rdx,4), %rcx
movl $0, %ebx
.L19:
movl (%rax), %edx
cmpl %edx, %ebx
cmovl %edx, %ebx
addq $4, %rax
cmpq %rcx, %rax
jne .L19
.L18:
movl $0, %esi
movq -96(%rbp), %rdi
call cudaEventRecord@PLT
movq -96(%rbp), %rdi
call cudaEventSynchronize@PLT
movl $0x00000000, -124(%rbp)
leaq -124(%rbp), %rdi
movq -96(%rbp), %rdx
movq -104(%rbp), %rsi
call cudaEventElapsedTime@PLT
leaq .LC3(%rip), %rsi
leaq _ZSt4cout(%rip), %r13
movq %r13, %rdi
call _ZStlsISt11char_traitsIcEERSt13basic_ostreamIcT_ES5_PKc@PLT
leaq .LC4(%rip), %rsi
movq %r13, %rdi
call _ZStlsISt11char_traitsIcEERSt13basic_ostreamIcT_ES5_PKc@PLT
movq %rax, %rdi
movl %ebx, %esi
call _ZNSolsEi@PLT
leaq .LC5(%rip), %rsi
movq %r13, %rdi
call _ZStlsISt11char_traitsIcEERSt13basic_ostreamIcT_ES5_PKc@PLT
movq %rax, %rdi
pxor %xmm0, %xmm0
cvtss2sd -124(%rbp), %xmm0
call _ZNSo9_M_insertIdEERSoT_@PLT
movl -128(%rbp), %eax
leal 0(,%rax,4), %ebx
movslq %ebx, %rbx
leaq -88(%rbp), %rdi
movq %rbx, %rsi
call cudaMalloc@PLT
movl $1, %ecx
movq %rbx, %rdx
movq %r12, %rsi
movq -88(%rbp), %rdi
call cudaMemcpy@PLT
pxor %xmm0, %xmm0
cvtsi2ssl -128(%rbp), %xmm0
mulss .LC6(%rip), %xmm0
movaps %xmm0, %xmm3
movss .LC12(%rip), %xmm2
movaps %xmm0, %xmm1
andps %xmm2, %xmm1
movss .LC7(%rip), %xmm4
ucomiss %xmm1, %xmm4
jbe .L20
cvttss2sil %xmm0, %eax
pxor %xmm1, %xmm1
cvtsi2ssl %eax, %xmm1
cmpnless %xmm1, %xmm3
movss .LC9(%rip), %xmm4
andps %xmm4, %xmm3
addss %xmm1, %xmm3
andnps %xmm0, %xmm2
orps %xmm2, %xmm3
.L20:
cvttss2sil %xmm3, %ebx
movslq %ebx, %rsi
salq $2, %rsi
leaq -80(%rbp), %rdi
call cudaMalloc@PLT
movl $1, -72(%rbp)
movl $1, -68(%rbp)
movl $1, -64(%rbp)
leaq -120(%rbp), %rdi
call cudaEventCreate@PLT
leaq -112(%rbp), %rdi
call cudaEventCreate@PLT
movl $0, %esi
movq -120(%rbp), %rdi
call cudaEventRecord@PLT
cmpl $1, -128(%rbp)
jg .L24
.L21:
movl $0, %esi
movq -112(%rbp), %rdi
call cudaEventRecord@PLT
movq -112(%rbp), %rdi
call cudaEventSynchronize@PLT
movl $0x00000000, -60(%rbp)
leaq -60(%rbp), %rdi
movq -112(%rbp), %rdx
movq -120(%rbp), %rsi
call cudaEventElapsedTime@PLT
leaq -48(%rbp), %rdi
movl $2, %ecx
movl $4, %edx
movq -88(%rbp), %rsi
call cudaMemcpy@PLT
leaq .LC10(%rip), %rsi
leaq _ZSt4cout(%rip), %rbx
movq %rbx, %rdi
call _ZStlsISt11char_traitsIcEERSt13basic_ostreamIcT_ES5_PKc@PLT
movq %rax, %rdi
movl -48(%rbp), %esi
call _ZNSolsEi@PLT
movq %rax, %rdi
call _ZSt4endlIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_@PLT
leaq .LC11(%rip), %rsi
movq %rbx, %rdi
call _ZStlsISt11char_traitsIcEERSt13basic_ostreamIcT_ES5_PKc@PLT
pxor %xmm0, %xmm0
cvtss2sd -60(%rbp), %xmm0
movq %rbx, %rdi
call _ZNSo9_M_insertIdEERSoT_@PLT
movq %rax, %rdi
call _ZSt4endlIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_@PLT
movq -40(%rbp), %rax
subq %fs:40, %rax
jne .L32
movl $0, %eax
leaq -24(%rbp), %rsp
popq %rbx
popq %r12
popq %r13
popq %rbp
.cfi_remember_state
.cfi_def_cfa 7, 8
ret
.L26:
.cfi_restore_state
movl $0, %ebx
jmp .L18
.L33:
movl -128(%rbp), %edx
movq -80(%rbp), %rsi
movq -88(%rbp), %rdi
call _Z26__device_stub__Z4maxiPiS_iPiS_i
jmp .L22
.L23:
cvttss2sil %xmm2, %edx
movl %edx, -128(%rbp)
movslq %edx, %rdx
salq $2, %rdx
movl $3, %ecx
movq -80(%rbp), %rsi
movq -88(%rbp), %rdi
call cudaMemcpy@PLT
cmpl $1, -128(%rbp)
jle .L21
.L24:
movl %ebx, -60(%rbp)
movl $1, -56(%rbp)
movl $1, -52(%rbp)
movl -64(%rbp), %ecx
movl $0, %r9d
movl $0, %r8d
movq -72(%rbp), %rdx
movq -60(%rbp), %rdi
movl $1, %esi
call __cudaPushCallConfiguration@PLT
testl %eax, %eax
je .L33
.L22:
pxor %xmm0, %xmm0
cvtsi2ssl -128(%rbp), %xmm0
mulss .LC6(%rip), %xmm0
movaps %xmm0, %xmm2
movss .LC12(%rip), %xmm1
andps %xmm0, %xmm1
movss .LC7(%rip), %xmm5
ucomiss %xmm1, %xmm5
jbe .L23
cvttss2sil %xmm0, %eax
pxor %xmm1, %xmm1
cvtsi2ssl %eax, %xmm1
cmpnless %xmm1, %xmm2
movss .LC9(%rip), %xmm6
andps %xmm6, %xmm2
addss %xmm2, %xmm1
movss .LC12(%rip), %xmm2
andnps %xmm0, %xmm2
orps %xmm1, %xmm2
jmp .L23
.L32:
call __stack_chk_fail@PLT
.cfi_endproc
.LFE3669:
.size main, .-main
.section .rodata.str1.1
.LC13:
.string "_Z4maxiPiS_i"
.text
.type _ZL24__sti____cudaRegisterAllv, @function
_ZL24__sti____cudaRegisterAllv:
.LFB3697:
.cfi_startproc
endbr64
subq $8, %rsp
.cfi_def_cfa_offset 16
leaq _ZL15__fatDeviceText(%rip), %rdi
call __cudaRegisterFatBinary@PLT
movq %rax, %rdi
movq %rax, _ZL20__cudaFatCubinHandle(%rip)
pushq $0
.cfi_def_cfa_offset 24
pushq $0
.cfi_def_cfa_offset 32
pushq $0
.cfi_def_cfa_offset 40
pushq $0
.cfi_def_cfa_offset 48
movl $0, %r9d
movl $-1, %r8d
leaq .LC13(%rip), %rdx
movq %rdx, %rcx
leaq _Z4maxiPiS_i(%rip), %rsi
call __cudaRegisterFunction@PLT
addq $32, %rsp
.cfi_def_cfa_offset 16
movq _ZL20__cudaFatCubinHandle(%rip), %rdi
call __cudaRegisterFatBinaryEnd@PLT
leaq _ZL26__cudaUnregisterBinaryUtilv(%rip), %rdi
call atexit@PLT
addq $8, %rsp
.cfi_def_cfa_offset 8
ret
.cfi_endproc
.LFE3697:
.size _ZL24__sti____cudaRegisterAllv, .-_ZL24__sti____cudaRegisterAllv
.section .init_array,"aw"
.align 8
.quad _ZL24__sti____cudaRegisterAllv
.section .nvFatBinSegment,"aw"
.align 8
.type _ZL15__fatDeviceText, @object
.size _ZL15__fatDeviceText, 24
_ZL15__fatDeviceText:
.long 1180844977
.long 1
.quad fatbinData
.quad 0
.local _ZL20__cudaFatCubinHandle
.comm _ZL20__cudaFatCubinHandle,8,8
.section .rodata.cst4,"aM",@progbits,4
.align 4
.LC6:
.long 998244352
.align 4
.LC7:
.long 1258291200
.align 4
.LC9:
.long 1065353216
.align 4
.LC12:
.long 2147483647
.ident "GCC: (Ubuntu 13.3.0-6ubuntu2~24.04) 13.3.0"
.section .note.GNU-stack,"",@progbits
.section .note.gnu.property,"a"
.align 8
.long 1f - 0f
.long 4f - 1f
.long 5
0:
.string "GNU"
1:
.align 8
.long 0xc0000002
.long 3f - 2f
2:
.long 0x3
3:
.align 8
4: |
You are a helpful coding assistant specialized in converting CUDA source code to HIP/AMD source code. | #include<iostream>
#include<cstdio>
using namespace std;
__global__ void maxi(int *a,int *b,int n)
{
int block=256*blockIdx.x;
int max=0;
for(int i=block;i<min(256+block,n);i++)
{
if(max<a[i])
{
max=a[i];
}
}
b[blockIdx.x]=max;
}
int main()
{
cout<<"Enter the size of array: ";
int n;
cin>>n;
int a[n];
cudaEvent_t start,end,start1,end1;
for(int i=0;i<n;i++)
{
a[i]=rand()%n;
}
for(int i=0;i<n;i++)
{
printf("%d\t",a[i]);
}
cudaEventCreate(&start1);
cudaEventCreate(&end1);
cudaEventRecord(start1);
int max=0;
for(int i=0;i<n;i++)
{
if(a[i]>max)
{
max=a[i];
}
}
cudaEventRecord(end1);
cudaEventSynchronize(end1);
float time1=0;
cudaEventElapsedTime(&time1,start1,end1);
cout<<"\nSequential Processing:";
cout<<"\nMax="<<max;
cout<<"\nSequential time="<<time1;
int *ad,*bd;
int size=n*sizeof(int);
cudaMalloc(&ad,size);
cudaMemcpy(ad,a,size,cudaMemcpyHostToDevice);
int grids=ceil(n*1.0f/256.0f);
cudaMalloc(&bd,grids*sizeof(int));
dim3 grid(grids,1);
dim3 block(1,1);
cudaEventCreate(&start);
cudaEventCreate(&end);
cudaEventRecord(start);
while(n>1)
{
maxi<<<grids,block>>>(ad,bd,n);
n=ceil(n*1.0f/256.0f);
cudaMemcpy(ad,bd,n*sizeof(int),cudaMemcpyDeviceToDevice);
}
cudaEventRecord(end);
cudaEventSynchronize(end);
float time=0;
cudaEventElapsedTime(&time,start,end);
int ans[2];
cudaMemcpy(ans,ad,4,cudaMemcpyDeviceToHost);
cout<<"\nParallel Processing:\nMax="<<ans[0]<<endl;
cout<<"Parallel Time=";
cout<<time<<endl;
} | #include <hip/hip_runtime.h>
#include<iostream>
#include<cstdio>
using namespace std;
__global__ void maxi(int *a,int *b,int n)
{
int block=256*blockIdx.x;
int max=0;
for(int i=block;i<min(256+block,n);i++)
{
if(max<a[i])
{
max=a[i];
}
}
b[blockIdx.x]=max;
}
int main()
{
cout<<"Enter the size of array: ";
int n;
cin>>n;
int a[n];
hipEvent_t start,end,start1,end1;
for(int i=0;i<n;i++)
{
a[i]=rand()%n;
}
for(int i=0;i<n;i++)
{
printf("%d\t",a[i]);
}
hipEventCreate(&start1);
hipEventCreate(&end1);
hipEventRecord(start1);
int max=0;
for(int i=0;i<n;i++)
{
if(a[i]>max)
{
max=a[i];
}
}
hipEventRecord(end1);
hipEventSynchronize(end1);
float time1=0;
hipEventElapsedTime(&time1,start1,end1);
cout<<"\nSequential Processing:";
cout<<"\nMax="<<max;
cout<<"\nSequential time="<<time1;
int *ad,*bd;
int size=n*sizeof(int);
hipMalloc(&ad,size);
hipMemcpy(ad,a,size,hipMemcpyHostToDevice);
int grids=ceil(n*1.0f/256.0f);
hipMalloc(&bd,grids*sizeof(int));
dim3 grid(grids,1);
dim3 block(1,1);
hipEventCreate(&start);
hipEventCreate(&end);
hipEventRecord(start);
while(n>1)
{
maxi<<<grids,block>>>(ad,bd,n);
n=ceil(n*1.0f/256.0f);
hipMemcpy(ad,bd,n*sizeof(int),hipMemcpyDeviceToDevice);
}
hipEventRecord(end);
hipEventSynchronize(end);
float time=0;
hipEventElapsedTime(&time,start,end);
int ans[2];
hipMemcpy(ans,ad,4,hipMemcpyDeviceToHost);
cout<<"\nParallel Processing:\nMax="<<ans[0]<<endl;
cout<<"Parallel Time=";
cout<<time<<endl;
} |
You are a helpful coding assistant specialized in converting HIP source code to AMD device assembly. | #include <hip/hip_runtime.h>
#include<iostream>
#include<cstdio>
using namespace std;
__global__ void maxi(int *a,int *b,int n)
{
int block=256*blockIdx.x;
int max=0;
for(int i=block;i<min(256+block,n);i++)
{
if(max<a[i])
{
max=a[i];
}
}
b[blockIdx.x]=max;
}
int main()
{
cout<<"Enter the size of array: ";
int n;
cin>>n;
int a[n];
hipEvent_t start,end,start1,end1;
for(int i=0;i<n;i++)
{
a[i]=rand()%n;
}
for(int i=0;i<n;i++)
{
printf("%d\t",a[i]);
}
hipEventCreate(&start1);
hipEventCreate(&end1);
hipEventRecord(start1);
int max=0;
for(int i=0;i<n;i++)
{
if(a[i]>max)
{
max=a[i];
}
}
hipEventRecord(end1);
hipEventSynchronize(end1);
float time1=0;
hipEventElapsedTime(&time1,start1,end1);
cout<<"\nSequential Processing:";
cout<<"\nMax="<<max;
cout<<"\nSequential time="<<time1;
int *ad,*bd;
int size=n*sizeof(int);
hipMalloc(&ad,size);
hipMemcpy(ad,a,size,hipMemcpyHostToDevice);
int grids=ceil(n*1.0f/256.0f);
hipMalloc(&bd,grids*sizeof(int));
dim3 grid(grids,1);
dim3 block(1,1);
hipEventCreate(&start);
hipEventCreate(&end);
hipEventRecord(start);
while(n>1)
{
maxi<<<grids,block>>>(ad,bd,n);
n=ceil(n*1.0f/256.0f);
hipMemcpy(ad,bd,n*sizeof(int),hipMemcpyDeviceToDevice);
}
hipEventRecord(end);
hipEventSynchronize(end);
float time=0;
hipEventElapsedTime(&time,start,end);
int ans[2];
hipMemcpy(ans,ad,4,hipMemcpyDeviceToHost);
cout<<"\nParallel Processing:\nMax="<<ans[0]<<endl;
cout<<"Parallel Time=";
cout<<time<<endl;
} | .text
.amdgcn_target "amdgcn-amd-amdhsa--gfx1100"
.protected _Z4maxiPiS_i
.globl _Z4maxiPiS_i
.p2align 8
.type _Z4maxiPiS_i,@function
_Z4maxiPiS_i:
s_load_b32 s3, s[0:1], 0x10
s_lshl_b32 s4, s15, 8
s_mov_b32 s2, s15
s_mov_b32 s5, 0
s_waitcnt lgkmcnt(0)
s_cmp_ge_i32 s4, s3
s_cbranch_scc1 .LBB0_3
s_load_b64 s[6:7], s[0:1], 0x0
s_ashr_i32 s5, s4, 31
s_add_i32 s10, s4, 0x100
s_lshl_b64 s[8:9], s[4:5], 2
s_min_i32 s3, s10, s3
s_mov_b32 s5, 0
s_waitcnt lgkmcnt(0)
s_add_u32 s6, s6, s8
s_addc_u32 s7, s7, s9
.LBB0_2:
s_load_b32 s8, s[6:7], 0x0
s_add_i32 s4, s4, 1
s_waitcnt lgkmcnt(0)
s_max_i32 s5, s5, s8
s_add_u32 s6, s6, 4
s_addc_u32 s7, s7, 0
s_cmp_ge_i32 s4, s3
s_cbranch_scc0 .LBB0_2
.LBB0_3:
s_load_b64 s[0:1], s[0:1], 0x8
s_mov_b32 s3, 0
v_dual_mov_b32 v0, 0 :: v_dual_mov_b32 v1, s5
s_lshl_b64 s[2:3], s[2:3], 2
s_waitcnt lgkmcnt(0)
s_add_u32 s0, s0, s2
s_addc_u32 s1, s1, s3
global_store_b32 v0, v1, s[0:1]
s_nop 0
s_sendmsg sendmsg(MSG_DEALLOC_VGPRS)
s_endpgm
.section .rodata,"a",@progbits
.p2align 6, 0x0
.amdhsa_kernel _Z4maxiPiS_i
.amdhsa_group_segment_fixed_size 0
.amdhsa_private_segment_fixed_size 0
.amdhsa_kernarg_size 20
.amdhsa_user_sgpr_count 15
.amdhsa_user_sgpr_dispatch_ptr 0
.amdhsa_user_sgpr_queue_ptr 0
.amdhsa_user_sgpr_kernarg_segment_ptr 1
.amdhsa_user_sgpr_dispatch_id 0
.amdhsa_user_sgpr_private_segment_size 0
.amdhsa_wavefront_size32 1
.amdhsa_uses_dynamic_stack 0
.amdhsa_enable_private_segment 0
.amdhsa_system_sgpr_workgroup_id_x 1
.amdhsa_system_sgpr_workgroup_id_y 0
.amdhsa_system_sgpr_workgroup_id_z 0
.amdhsa_system_sgpr_workgroup_info 0
.amdhsa_system_vgpr_workitem_id 0
.amdhsa_next_free_vgpr 2
.amdhsa_next_free_sgpr 16
.amdhsa_reserve_vcc 0
.amdhsa_float_round_mode_32 0
.amdhsa_float_round_mode_16_64 0
.amdhsa_float_denorm_mode_32 3
.amdhsa_float_denorm_mode_16_64 3
.amdhsa_dx10_clamp 1
.amdhsa_ieee_mode 1
.amdhsa_fp16_overflow 0
.amdhsa_workgroup_processor_mode 1
.amdhsa_memory_ordered 1
.amdhsa_forward_progress 0
.amdhsa_shared_vgpr_count 0
.amdhsa_exception_fp_ieee_invalid_op 0
.amdhsa_exception_fp_denorm_src 0
.amdhsa_exception_fp_ieee_div_zero 0
.amdhsa_exception_fp_ieee_overflow 0
.amdhsa_exception_fp_ieee_underflow 0
.amdhsa_exception_fp_ieee_inexact 0
.amdhsa_exception_int_div_zero 0
.end_amdhsa_kernel
.text
.Lfunc_end0:
.size _Z4maxiPiS_i, .Lfunc_end0-_Z4maxiPiS_i
.section .AMDGPU.csdata,"",@progbits
.text
.p2alignl 7, 3214868480
.fill 96, 4, 3214868480
.type __hip_cuid_,@object
.section .bss,"aw",@nobits
.globl __hip_cuid_
__hip_cuid_:
.byte 0
.size __hip_cuid_, 1
.ident "AMD clang version 18.0.0git (https://github.com/RadeonOpenCompute/llvm-project roc-6.3.2 25012 e5bf7e55c91490b07c49d8960fa7983d864936c4)"
.section ".note.GNU-stack","",@progbits
.addrsig
.addrsig_sym __hip_cuid_
.amdgpu_metadata
---
amdhsa.kernels:
- .args:
- .address_space: global
.offset: 0
.size: 8
.value_kind: global_buffer
- .address_space: global
.offset: 8
.size: 8
.value_kind: global_buffer
- .offset: 16
.size: 4
.value_kind: by_value
.group_segment_fixed_size: 0
.kernarg_segment_align: 8
.kernarg_segment_size: 20
.language: OpenCL C
.language_version:
- 2
- 0
.max_flat_workgroup_size: 1024
.name: _Z4maxiPiS_i
.private_segment_fixed_size: 0
.sgpr_count: 16
.sgpr_spill_count: 0
.symbol: _Z4maxiPiS_i.kd
.uniform_work_group_size: 1
.uses_dynamic_stack: false
.vgpr_count: 2
.vgpr_spill_count: 0
.wavefront_size: 32
.workgroup_processor_mode: 1
amdhsa.target: amdgcn-amd-amdhsa--gfx1100
amdhsa.version:
- 1
- 2
...
.end_amdgpu_metadata |
You are a helpful coding assistant specialized in converting HIP source code to AMD host assembly. | #include <hip/hip_runtime.h>
#include<iostream>
#include<cstdio>
using namespace std;
__global__ void maxi(int *a,int *b,int n)
{
int block=256*blockIdx.x;
int max=0;
for(int i=block;i<min(256+block,n);i++)
{
if(max<a[i])
{
max=a[i];
}
}
b[blockIdx.x]=max;
}
int main()
{
cout<<"Enter the size of array: ";
int n;
cin>>n;
int a[n];
hipEvent_t start,end,start1,end1;
for(int i=0;i<n;i++)
{
a[i]=rand()%n;
}
for(int i=0;i<n;i++)
{
printf("%d\t",a[i]);
}
hipEventCreate(&start1);
hipEventCreate(&end1);
hipEventRecord(start1);
int max=0;
for(int i=0;i<n;i++)
{
if(a[i]>max)
{
max=a[i];
}
}
hipEventRecord(end1);
hipEventSynchronize(end1);
float time1=0;
hipEventElapsedTime(&time1,start1,end1);
cout<<"\nSequential Processing:";
cout<<"\nMax="<<max;
cout<<"\nSequential time="<<time1;
int *ad,*bd;
int size=n*sizeof(int);
hipMalloc(&ad,size);
hipMemcpy(ad,a,size,hipMemcpyHostToDevice);
int grids=ceil(n*1.0f/256.0f);
hipMalloc(&bd,grids*sizeof(int));
dim3 grid(grids,1);
dim3 block(1,1);
hipEventCreate(&start);
hipEventCreate(&end);
hipEventRecord(start);
while(n>1)
{
maxi<<<grids,block>>>(ad,bd,n);
n=ceil(n*1.0f/256.0f);
hipMemcpy(ad,bd,n*sizeof(int),hipMemcpyDeviceToDevice);
}
hipEventRecord(end);
hipEventSynchronize(end);
float time=0;
hipEventElapsedTime(&time,start,end);
int ans[2];
hipMemcpy(ans,ad,4,hipMemcpyDeviceToHost);
cout<<"\nParallel Processing:\nMax="<<ans[0]<<endl;
cout<<"Parallel Time=";
cout<<time<<endl;
} | .text
.file "a11.hip"
# Start of file scope inline assembly
.globl _ZSt21ios_base_library_initv
# End of file scope inline assembly
.globl _Z19__device_stub__maxiPiS_i # -- Begin function _Z19__device_stub__maxiPiS_i
.p2align 4, 0x90
.type _Z19__device_stub__maxiPiS_i,@function
_Z19__device_stub__maxiPiS_i: # @_Z19__device_stub__maxiPiS_i
.cfi_startproc
# %bb.0:
subq $104, %rsp
.cfi_def_cfa_offset 112
movq %rdi, 72(%rsp)
movq %rsi, 64(%rsp)
movl %edx, 12(%rsp)
leaq 72(%rsp), %rax
movq %rax, 80(%rsp)
leaq 64(%rsp), %rax
movq %rax, 88(%rsp)
leaq 12(%rsp), %rax
movq %rax, 96(%rsp)
leaq 48(%rsp), %rdi
leaq 32(%rsp), %rsi
leaq 24(%rsp), %rdx
leaq 16(%rsp), %rcx
callq __hipPopCallConfiguration
movq 48(%rsp), %rsi
movl 56(%rsp), %edx
movq 32(%rsp), %rcx
movl 40(%rsp), %r8d
leaq 80(%rsp), %r9
movl $_Z4maxiPiS_i, %edi
pushq 16(%rsp)
.cfi_adjust_cfa_offset 8
pushq 32(%rsp)
.cfi_adjust_cfa_offset 8
callq hipLaunchKernel
addq $120, %rsp
.cfi_adjust_cfa_offset -120
retq
.Lfunc_end0:
.size _Z19__device_stub__maxiPiS_i, .Lfunc_end0-_Z19__device_stub__maxiPiS_i
.cfi_endproc
# -- End function
.section .rodata.cst4,"aM",@progbits,4
.p2align 2, 0x0 # -- Begin function main
.LCPI1_0:
.long 0x3b800000 # float 0.00390625
.text
.globl main
.p2align 4, 0x90
.type main,@function
main: # @main
.cfi_startproc
# %bb.0:
pushq %rbp
.cfi_def_cfa_offset 16
.cfi_offset %rbp, -16
movq %rsp, %rbp
.cfi_def_cfa_register %rbp
pushq %r15
pushq %r14
pushq %r13
pushq %r12
pushq %rbx
subq $168, %rsp
.cfi_offset %rbx, -56
.cfi_offset %r12, -48
.cfi_offset %r13, -40
.cfi_offset %r14, -32
.cfi_offset %r15, -24
movl $_ZSt4cout, %edi
movl $.L.str, %esi
movl $25, %edx
callq _ZSt16__ostream_insertIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_PKS3_l
leaq -44(%rbp), %rsi
movl $_ZSt3cin, %edi
callq _ZNSirsERi
movq %rsp, -152(%rbp) # 8-byte Spill
movl -44(%rbp), %eax
movq %rsp, %rbx
leaq 15(,%rax,4), %rax
andq $-16, %rax
subq %rax, %rbx
movq %rbx, %rsp
cmpl $0, -44(%rbp)
jle .LBB1_3
# %bb.1: # %.lr.ph.preheader
xorl %r14d, %r14d
.p2align 4, 0x90
.LBB1_2: # %.lr.ph
# =>This Inner Loop Header: Depth=1
callq rand
movslq -44(%rbp), %rcx
cltd
idivl %ecx
movl %edx, (%rbx,%r14,4)
incq %r14
cmpq %rcx, %r14
jl .LBB1_2
.LBB1_3: # %.preheader
cmpl $0, -44(%rbp)
jle .LBB1_6
# %bb.4: # %.lr.ph36.preheader
xorl %r14d, %r14d
.p2align 4, 0x90
.LBB1_5: # %.lr.ph36
# =>This Inner Loop Header: Depth=1
movl (%rbx,%r14,4), %esi
movl $.L.str.1, %edi
xorl %eax, %eax
callq printf
incq %r14
movslq -44(%rbp), %rax
cmpq %rax, %r14
jl .LBB1_5
.LBB1_6: # %._crit_edge
leaq -112(%rbp), %rdi
callq hipEventCreate
leaq -64(%rbp), %rdi
callq hipEventCreate
movq -112(%rbp), %rdi
xorl %r14d, %r14d
xorl %esi, %esi
callq hipEventRecord
movl -44(%rbp), %eax
testl %eax, %eax
jle .LBB1_9
# %bb.7: # %.lr.ph40.preheader
xorl %ecx, %ecx
xorl %r14d, %r14d
.p2align 4, 0x90
.LBB1_8: # %.lr.ph40
# =>This Inner Loop Header: Depth=1
movl (%rbx,%rcx,4), %edx
cmpl %r14d, %edx
cmovgl %edx, %r14d
incq %rcx
cmpq %rcx, %rax
jne .LBB1_8
.LBB1_9: # %._crit_edge41
movq -64(%rbp), %rdi
xorl %esi, %esi
callq hipEventRecord
movq -64(%rbp), %rdi
callq hipEventSynchronize
movl $0, -48(%rbp)
movq -112(%rbp), %rsi
movq -64(%rbp), %rdx
leaq -48(%rbp), %rdi
callq hipEventElapsedTime
movl $_ZSt4cout, %edi
movl $.L.str.2, %esi
movl $23, %edx
callq _ZSt16__ostream_insertIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_PKS3_l
movl $_ZSt4cout, %edi
movl $.L.str.3, %esi
movl $5, %edx
callq _ZSt16__ostream_insertIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_PKS3_l
movl $_ZSt4cout, %edi
movl %r14d, %esi
callq _ZNSolsEi
movl $_ZSt4cout, %edi
movl $.L.str.4, %esi
movl $17, %edx
callq _ZSt16__ostream_insertIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_PKS3_l
movss -48(%rbp), %xmm0 # xmm0 = mem[0],zero,zero,zero
cvtss2sd %xmm0, %xmm0
movl $_ZSt4cout, %edi
callq _ZNSo9_M_insertIdEERSoT_
movl -44(%rbp), %eax
shll $2, %eax
movslq %eax, %r14
leaq -56(%rbp), %rdi
movq %r14, %rsi
callq hipMalloc
movq -56(%rbp), %rdi
movq %rbx, %rsi
movq %r14, %rdx
movl $1, %ecx
callq hipMemcpy
xorps %xmm0, %xmm0
cvtsi2ssl -44(%rbp), %xmm0
mulss .LCPI1_0(%rip), %xmm0
callq ceilf@PLT
cvttss2si %xmm0, %r14d
movslq %r14d, %rsi
shlq $2, %rsi
leaq -104(%rbp), %rdi
callq hipMalloc
leaq -120(%rbp), %rdi
callq hipEventCreate
leaq -72(%rbp), %rdi
callq hipEventCreate
movq -120(%rbp), %rdi
xorl %esi, %esi
callq hipEventRecord
cmpl $2, -44(%rbp)
jl .LBB1_14
# %bb.10: # %.lr.ph43
movabsq $4294967296, %rbx # imm = 0x100000000
movl %r14d, %r14d
orq %rbx, %r14
incq %rbx
leaq -168(%rbp), %r13
leaq -160(%rbp), %r15
leaq -144(%rbp), %r12
jmp .LBB1_11
.p2align 4, 0x90
.LBB1_13: # in Loop: Header=BB1_11 Depth=1
xorps %xmm0, %xmm0
cvtsi2ssl -44(%rbp), %xmm0
mulss .LCPI1_0(%rip), %xmm0
callq ceilf@PLT
cvttss2si %xmm0, %eax
movl %eax, -44(%rbp)
movq -56(%rbp), %rdi
movq -104(%rbp), %rsi
movslq %eax, %rdx
shlq $2, %rdx
movl $3, %ecx
callq hipMemcpy
cmpl $1, -44(%rbp)
jle .LBB1_14
.LBB1_11: # =>This Inner Loop Header: Depth=1
movq %r14, %rdi
movl $1, %esi
movq %rbx, %rdx
movl $1, %ecx
xorl %r8d, %r8d
xorl %r9d, %r9d
callq __hipPushCallConfiguration
testl %eax, %eax
jne .LBB1_13
# %bb.12: # in Loop: Header=BB1_11 Depth=1
movq -56(%rbp), %rax
movq -104(%rbp), %rcx
movl -44(%rbp), %edx
movq %rax, -200(%rbp)
movq %rcx, -192(%rbp)
movl %edx, -92(%rbp)
leaq -200(%rbp), %rax
movq %rax, -144(%rbp)
leaq -192(%rbp), %rax
movq %rax, -136(%rbp)
leaq -92(%rbp), %rax
movq %rax, -128(%rbp)
leaq -88(%rbp), %rdi
leaq -184(%rbp), %rsi
movq %r13, %rdx
movq %r15, %rcx
callq __hipPopCallConfiguration
movq -88(%rbp), %rsi
movl -80(%rbp), %edx
movq -184(%rbp), %rcx
movl -176(%rbp), %r8d
movl $_Z4maxiPiS_i, %edi
movq %r12, %r9
pushq -160(%rbp)
pushq -168(%rbp)
callq hipLaunchKernel
addq $16, %rsp
jmp .LBB1_13
.LBB1_14: # %._crit_edge44
movq -72(%rbp), %rdi
xorl %esi, %esi
callq hipEventRecord
movq -72(%rbp), %rdi
callq hipEventSynchronize
movl $0, -88(%rbp)
movq -120(%rbp), %rsi
movq -72(%rbp), %rdx
leaq -88(%rbp), %rdi
callq hipEventElapsedTime
movq -56(%rbp), %rsi
leaq -144(%rbp), %rdi
movl $4, %edx
movl $2, %ecx
callq hipMemcpy
movl $_ZSt4cout, %edi
movl $.L.str.5, %esi
movl $26, %edx
callq _ZSt16__ostream_insertIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_PKS3_l
movl -144(%rbp), %esi
movl $_ZSt4cout, %edi
callq _ZNSolsEi
movq (%rax), %rcx
movq -24(%rcx), %rcx
movq 240(%rax,%rcx), %rbx
testq %rbx, %rbx
je .LBB1_23
# %bb.15: # %_ZSt13__check_facetISt5ctypeIcEERKT_PS3_.exit.i.i
cmpb $0, 56(%rbx)
je .LBB1_17
# %bb.16:
movzbl 67(%rbx), %ecx
jmp .LBB1_18
.LBB1_17:
movq %rbx, %rdi
movq %rax, %r14
callq _ZNKSt5ctypeIcE13_M_widen_initEv
movq (%rbx), %rax
movq %rbx, %rdi
movl $10, %esi
callq *48(%rax)
movl %eax, %ecx
movq %r14, %rax
.LBB1_18: # %_ZSt4endlIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_.exit
movsbl %cl, %esi
movq %rax, %rdi
callq _ZNSo3putEc
movq %rax, %rdi
callq _ZNSo5flushEv
movl $_ZSt4cout, %edi
movl $.L.str.6, %esi
movl $14, %edx
callq _ZSt16__ostream_insertIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_PKS3_l
movss -88(%rbp), %xmm0 # xmm0 = mem[0],zero,zero,zero
cvtss2sd %xmm0, %xmm0
movl $_ZSt4cout, %edi
callq _ZNSo9_M_insertIdEERSoT_
movq (%rax), %rcx
movq -24(%rcx), %rcx
movq 240(%rax,%rcx), %rbx
testq %rbx, %rbx
je .LBB1_23
# %bb.19: # %_ZSt13__check_facetISt5ctypeIcEERKT_PS3_.exit.i.i27
cmpb $0, 56(%rbx)
je .LBB1_21
# %bb.20:
movzbl 67(%rbx), %ecx
jmp .LBB1_22
.LBB1_21:
movq %rbx, %rdi
movq %rax, %r14
callq _ZNKSt5ctypeIcE13_M_widen_initEv
movq (%rbx), %rax
movq %rbx, %rdi
movl $10, %esi
callq *48(%rax)
movl %eax, %ecx
movq %r14, %rax
.LBB1_22: # %_ZSt4endlIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_.exit30
movsbl %cl, %esi
movq %rax, %rdi
callq _ZNSo3putEc
movq %rax, %rdi
callq _ZNSo5flushEv
movq -152(%rbp), %rsp # 8-byte Reload
xorl %eax, %eax
leaq -40(%rbp), %rsp
popq %rbx
popq %r12
popq %r13
popq %r14
popq %r15
popq %rbp
.cfi_def_cfa %rsp, 8
retq
.LBB1_23:
.cfi_def_cfa %rbp, 16
callq _ZSt16__throw_bad_castv
.Lfunc_end1:
.size main, .Lfunc_end1-main
.cfi_endproc
# -- End function
.p2align 4, 0x90 # -- Begin function __hip_module_ctor
.type __hip_module_ctor,@function
__hip_module_ctor: # @__hip_module_ctor
.cfi_startproc
# %bb.0:
subq $40, %rsp
.cfi_def_cfa_offset 48
cmpq $0, __hip_gpubin_handle(%rip)
jne .LBB2_2
# %bb.1:
movl $__hip_fatbin_wrapper, %edi
callq __hipRegisterFatBinary
movq %rax, __hip_gpubin_handle(%rip)
.LBB2_2:
movq __hip_gpubin_handle(%rip), %rdi
xorps %xmm0, %xmm0
movups %xmm0, 16(%rsp)
movups %xmm0, (%rsp)
movl $_Z4maxiPiS_i, %esi
movl $.L__unnamed_1, %edx
movl $.L__unnamed_1, %ecx
movl $-1, %r8d
xorl %r9d, %r9d
callq __hipRegisterFunction
movl $__hip_module_dtor, %edi
addq $40, %rsp
.cfi_def_cfa_offset 8
jmp atexit # TAILCALL
.Lfunc_end2:
.size __hip_module_ctor, .Lfunc_end2-__hip_module_ctor
.cfi_endproc
# -- End function
.p2align 4, 0x90 # -- Begin function __hip_module_dtor
.type __hip_module_dtor,@function
__hip_module_dtor: # @__hip_module_dtor
.cfi_startproc
# %bb.0:
movq __hip_gpubin_handle(%rip), %rdi
testq %rdi, %rdi
je .LBB3_2
# %bb.1:
pushq %rax
.cfi_def_cfa_offset 16
callq __hipUnregisterFatBinary
movq $0, __hip_gpubin_handle(%rip)
addq $8, %rsp
.cfi_def_cfa_offset 8
.LBB3_2:
retq
.Lfunc_end3:
.size __hip_module_dtor, .Lfunc_end3-__hip_module_dtor
.cfi_endproc
# -- End function
.type _Z4maxiPiS_i,@object # @_Z4maxiPiS_i
.section .rodata,"a",@progbits
.globl _Z4maxiPiS_i
.p2align 3, 0x0
_Z4maxiPiS_i:
.quad _Z19__device_stub__maxiPiS_i
.size _Z4maxiPiS_i, 8
.type .L.str,@object # @.str
.section .rodata.str1.1,"aMS",@progbits,1
.L.str:
.asciz "Enter the size of array: "
.size .L.str, 26
.type .L.str.1,@object # @.str.1
.L.str.1:
.asciz "%d\t"
.size .L.str.1, 4
.type .L.str.2,@object # @.str.2
.L.str.2:
.asciz "\nSequential Processing:"
.size .L.str.2, 24
.type .L.str.3,@object # @.str.3
.L.str.3:
.asciz "\nMax="
.size .L.str.3, 6
.type .L.str.4,@object # @.str.4
.L.str.4:
.asciz "\nSequential time="
.size .L.str.4, 18
.type .L.str.5,@object # @.str.5
.L.str.5:
.asciz "\nParallel Processing:\nMax="
.size .L.str.5, 27
.type .L.str.6,@object # @.str.6
.L.str.6:
.asciz "Parallel Time="
.size .L.str.6, 15
.type .L__unnamed_1,@object # @0
.L__unnamed_1:
.asciz "_Z4maxiPiS_i"
.size .L__unnamed_1, 13
.type __hip_fatbin_wrapper,@object # @__hip_fatbin_wrapper
.section .hipFatBinSegment,"a",@progbits
.p2align 3, 0x0
__hip_fatbin_wrapper:
.long 1212764230 # 0x48495046
.long 1 # 0x1
.quad __hip_fatbin
.quad 0
.size __hip_fatbin_wrapper, 24
.type __hip_gpubin_handle,@object # @__hip_gpubin_handle
.local __hip_gpubin_handle
.comm __hip_gpubin_handle,8,8
.section .init_array,"aw",@init_array
.p2align 3, 0x0
.quad __hip_module_ctor
.type __hip_cuid_,@object # @__hip_cuid_
.bss
.globl __hip_cuid_
__hip_cuid_:
.byte 0 # 0x0
.size __hip_cuid_, 1
.section ".linker-options","e",@llvm_linker_options
.ident "AMD clang version 18.0.0git (https://github.com/RadeonOpenCompute/llvm-project roc-6.3.2 25012 e5bf7e55c91490b07c49d8960fa7983d864936c4)"
.section ".note.GNU-stack","",@progbits
.addrsig
.addrsig_sym _Z19__device_stub__maxiPiS_i
.addrsig_sym __hip_module_ctor
.addrsig_sym __hip_module_dtor
.addrsig_sym _Z4maxiPiS_i
.addrsig_sym _ZSt4cout
.addrsig_sym _ZSt3cin
.addrsig_sym __hip_fatbin
.addrsig_sym __hip_fatbin_wrapper
.addrsig_sym __hip_cuid_ |
You are a helpful coding assistant specialized in converting from CUDA device assembly to AMD device assembly. | code for sm_80
Function : _Z4maxiPiS_i
.headerflags @"EF_CUDA_TEXMODE_UNIFIED EF_CUDA_64BIT_ADDRESS EF_CUDA_SM80 EF_CUDA_VIRTUAL_SM(EF_CUDA_SM80)"
/*0000*/ IMAD.MOV.U32 R1, RZ, RZ, c[0x0][0x28] ; /* 0x00000a00ff017624 */
/* 0x000fe400078e00ff */
/*0010*/ S2R R0, SR_CTAID.X ; /* 0x0000000000007919 */
/* 0x000e220000002500 */
/*0020*/ ULDC.64 UR4, c[0x0][0x118] ; /* 0x0000460000047ab9 */
/* 0x000fe20000000a00 */
/*0030*/ IMAD.MOV.U32 R5, RZ, RZ, RZ ; /* 0x000000ffff057224 */
/* 0x000fe400078e00ff */
/*0040*/ IMAD.SHL.U32 R6, R0, 0x100, RZ ; /* 0x0000010000067824 */
/* 0x001fca00078e00ff */
/*0050*/ IADD3 R2, R6, 0x100, RZ ; /* 0x0000010006027810 */
/* 0x000fc80007ffe0ff */
/*0060*/ IMNMX R3, R2, c[0x0][0x170], PT ; /* 0x00005c0002037a17 */
/* 0x000fc80003800200 */
/*0070*/ ISETP.GE.AND P0, PT, R6, R3, PT ; /* 0x000000030600720c */
/* 0x000fda0003f06270 */
/*0080*/ @P0 BRA 0x800 ; /* 0x0000077000000947 */
/* 0x000fea0003800000 */
/*0090*/ LOP3.LUT R2, RZ, c[0x0][0x170], RZ, 0x33, !PT ; /* 0x00005c00ff027a12 */
/* 0x000fe200078e33ff */
/*00a0*/ IMAD.MOV.U32 R5, RZ, RZ, RZ ; /* 0x000000ffff057224 */
/* 0x000fe200078e00ff */
/*00b0*/ IADD3 R3, -R6, -0x101, RZ ; /* 0xfffffeff06037810 */
/* 0x000fc80007ffe1ff */
/*00c0*/ IMNMX R7, R2, R3, !PT ; /* 0x0000000302077217 */
/* 0x000fc80007800200 */
/*00d0*/ IADD3 R2, -R6, -0x2, -R7 ; /* 0xfffffffe06027810 */
/* 0x000fe40007ffe907 */
/*00e0*/ LOP3.LUT R3, RZ, R7, RZ, 0x33, !PT ; /* 0x00000007ff037212 */
/* 0x000fe400078e33ff */
/*00f0*/ ISETP.GE.U32.AND P0, PT, R2, 0x3, PT ; /* 0x000000030200780c */
/* 0x000fc60003f06070 */
/*0100*/ IMAD.IADD R3, R3, 0x1, -R6 ; /* 0x0000000103037824 */
/* 0x000fca00078e0a06 */
/*0110*/ LOP3.LUT R4, R3, 0x3, RZ, 0xc0, !PT ; /* 0x0000000303047812 */
/* 0x000fca00078ec0ff */
/*0120*/ @!P0 BRA 0x730 ; /* 0x0000060000008947 */
/* 0x000fea0003800000 */
/*0130*/ IADD3 R7, R4, R7, R6 ; /* 0x0000000704077210 */
/* 0x000fe20007ffe006 */
/*0140*/ IMAD.MOV.U32 R3, RZ, RZ, 0x4 ; /* 0x00000004ff037424 */
/* 0x000fe400078e00ff */
/*0150*/ IMAD.MOV.U32 R5, RZ, RZ, RZ ; /* 0x000000ffff057224 */
/* 0x000fe400078e00ff */
/*0160*/ IMAD.MOV R7, RZ, RZ, -R7 ; /* 0x000000ffff077224 */
/* 0x000fe400078e0a07 */
/*0170*/ IMAD.WIDE R2, R6, R3, c[0x0][0x160] ; /* 0x0000580006027625 */
/* 0x000fc600078e0203 */
/*0180*/ ISETP.GT.AND P0, PT, R7, 0x1, PT ; /* 0x000000010700780c */
/* 0x000fe40003f04270 */
/*0190*/ IADD3 R2, P1, R2, 0x8, RZ ; /* 0x0000000802027810 */
/* 0x000fca0007f3e0ff */
/*01a0*/ IMAD.X R3, RZ, RZ, R3, P1 ; /* 0x000000ffff037224 */
/* 0x000fcc00008e0603 */
/*01b0*/ @!P0 BRA 0x630 ; /* 0x0000047000008947 */
/* 0x000fea0003800000 */
/*01c0*/ IADD3 R8, R7, -0x1, RZ ; /* 0xffffffff07087810 */
/* 0x000fe40007ffe0ff */
/*01d0*/ PLOP3.LUT P0, PT, PT, PT, PT, 0x80, 0x0 ; /* 0x000000000000781c */
/* 0x000fe40003f0f070 */
/*01e0*/ ISETP.GT.AND P1, PT, R8, 0xc, PT ; /* 0x0000000c0800780c */
/* 0x000fda0003f24270 */
/*01f0*/ @!P1 BRA 0x470 ; /* 0x0000027000009947 */
/* 0x000fea0003800000 */
/*0200*/ PLOP3.LUT P0, PT, PT, PT, PT, 0x8, 0x0 ; /* 0x000000000000781c */
/* 0x000fe40003f0e170 */
/*0210*/ LDG.E R18, [R2.64+-0x8] ; /* 0xfffff80402127981 */
/* 0x0000a8000c1e1900 */
/*0220*/ LDG.E R17, [R2.64+-0x4] ; /* 0xfffffc0402117981 */
/* 0x0000e8000c1e1900 */
/*0230*/ LDG.E R20, [R2.64] ; /* 0x0000000402147981 */
/* 0x000128000c1e1900 */
/*0240*/ LDG.E R22, [R2.64+0x4] ; /* 0x0000040402167981 */
/* 0x000168000c1e1900 */
/*0250*/ LDG.E R24, [R2.64+0x8] ; /* 0x0000080402187981 */
/* 0x000168000c1e1900 */
/*0260*/ LDG.E R26, [R2.64+0xc] ; /* 0x00000c04021a7981 */
/* 0x000168000c1e1900 */
/*0270*/ LDG.E R28, [R2.64+0x10] ; /* 0x00001004021c7981 */
/* 0x000168000c1e1900 */
/*0280*/ LDG.E R16, [R2.64+0x14] ; /* 0x0000140402107981 */
/* 0x000168000c1e1900 */
/*0290*/ LDG.E R15, [R2.64+0x18] ; /* 0x00001804020f7981 */
/* 0x000168000c1e1900 */
/*02a0*/ LDG.E R14, [R2.64+0x1c] ; /* 0x00001c04020e7981 */
/* 0x000168000c1e1900 */
/*02b0*/ LDG.E R13, [R2.64+0x20] ; /* 0x00002004020d7981 */
/* 0x000168000c1e1900 */
/*02c0*/ LDG.E R12, [R2.64+0x24] ; /* 0x00002404020c7981 */
/* 0x000168000c1e1900 */
/*02d0*/ LDG.E R11, [R2.64+0x28] ; /* 0x00002804020b7981 */
/* 0x000168000c1e1900 */
/*02e0*/ LDG.E R9, [R2.64+0x2c] ; /* 0x00002c0402097981 */
/* 0x000168000c1e1900 */
/*02f0*/ LDG.E R10, [R2.64+0x30] ; /* 0x00003004020a7981 */
/* 0x000168000c1e1900 */
/*0300*/ LDG.E R8, [R2.64+0x34] ; /* 0x0000340402087981 */
/* 0x000162000c1e1900 */
/*0310*/ IADD3 R7, R7, -0x10, RZ ; /* 0xfffffff007077810 */
/* 0x000fc40007ffe0ff */
/*0320*/ IADD3 R6, R6, 0x10, RZ ; /* 0x0000001006067810 */
/* 0x000fe40007ffe0ff */
/*0330*/ ISETP.GT.AND P1, PT, R7, 0xd, PT ; /* 0x0000000d0700780c */
/* 0x000fe40003f24270 */
/*0340*/ IADD3 R2, P2, R2, 0x40, RZ ; /* 0x0000004002027810 */
/* 0x001fca0007f5e0ff */
/*0350*/ IMAD.X R3, RZ, RZ, R3, P2 ; /* 0x000000ffff037224 */
/* 0x000fe200010e0603 */
/*0360*/ IMNMX R18, R18, R5, !PT ; /* 0x0000000512127217 */
/* 0x004fc80007800200 */
/*0370*/ IMNMX R17, R18, R17, !PT ; /* 0x0000001112117217 */
/* 0x008fc80007800200 */
/*0380*/ IMNMX R17, R17, R20, !PT ; /* 0x0000001411117217 */
/* 0x010fc80007800200 */
/*0390*/ IMNMX R17, R17, R22, !PT ; /* 0x0000001611117217 */
/* 0x020fc80007800200 */
/*03a0*/ IMNMX R17, R17, R24, !PT ; /* 0x0000001811117217 */
/* 0x000fc80007800200 */
/*03b0*/ IMNMX R17, R17, R26, !PT ; /* 0x0000001a11117217 */
/* 0x000fc80007800200 */
/*03c0*/ IMNMX R17, R17, R28, !PT ; /* 0x0000001c11117217 */
/* 0x000fc80007800200 */
/*03d0*/ IMNMX R16, R17, R16, !PT ; /* 0x0000001011107217 */
/* 0x000fc80007800200 */
/*03e0*/ IMNMX R15, R16, R15, !PT ; /* 0x0000000f100f7217 */
/* 0x000fc80007800200 */
/*03f0*/ IMNMX R14, R15, R14, !PT ; /* 0x0000000e0f0e7217 */
/* 0x000fc80007800200 */
/*0400*/ IMNMX R13, R14, R13, !PT ; /* 0x0000000d0e0d7217 */
/* 0x000fc80007800200 */
/*0410*/ IMNMX R12, R13, R12, !PT ; /* 0x0000000c0d0c7217 */
/* 0x000fc80007800200 */
/*0420*/ IMNMX R12, R12, R11, !PT ; /* 0x0000000b0c0c7217 */
/* 0x000fc80007800200 */
/*0430*/ IMNMX R9, R12, R9, !PT ; /* 0x000000090c097217 */
/* 0x000fc80007800200 */
/*0440*/ IMNMX R9, R9, R10, !PT ; /* 0x0000000a09097217 */
/* 0x000fc80007800200 */
/*0450*/ IMNMX R5, R9, R8, !PT ; /* 0x0000000809057217 */
/* 0x000fe20007800200 */
/*0460*/ @P1 BRA 0x210 ; /* 0xfffffda000001947 */
/* 0x000fea000383ffff */
/*0470*/ IADD3 R8, R7, -0x1, RZ ; /* 0xffffffff07087810 */
/* 0x000fc80007ffe0ff */
/*0480*/ ISETP.GT.AND P1, PT, R8, 0x4, PT ; /* 0x000000040800780c */
/* 0x000fda0003f24270 */
/*0490*/ @!P1 BRA 0x610 ; /* 0x0000017000009947 */
/* 0x000fea0003800000 */
/*04a0*/ LDG.E R8, [R2.64+-0x8] ; /* 0xfffff80402087981 */
/* 0x000ea8000c1e1900 */
/*04b0*/ LDG.E R9, [R2.64+-0x4] ; /* 0xfffffc0402097981 */
/* 0x000ee8000c1e1900 */
/*04c0*/ LDG.E R11, [R2.64] ; /* 0x00000004020b7981 */
/* 0x000f28000c1e1900 */
/*04d0*/ LDG.E R13, [R2.64+0x4] ; /* 0x00000404020d7981 */
/* 0x000f68000c1e1900 */
/*04e0*/ LDG.E R15, [R2.64+0x8] ; /* 0x00000804020f7981 */
/* 0x000168000c1e1900 */
/*04f0*/ LDG.E R17, [R2.64+0xc] ; /* 0x00000c0402117981 */
/* 0x000168000c1e1900 */
/*0500*/ LDG.E R19, [R2.64+0x10] ; /* 0x0000100402137981 */
/* 0x000168000c1e1900 */
/*0510*/ LDG.E R21, [R2.64+0x14] ; /* 0x0000140402157981 */
/* 0x000162000c1e1900 */
/*0520*/ PLOP3.LUT P0, PT, PT, PT, PT, 0x8, 0x0 ; /* 0x000000000000781c */
/* 0x000fc40003f0e170 */
/*0530*/ IADD3 R6, R6, 0x8, RZ ; /* 0x0000000806067810 */
/* 0x000fe40007ffe0ff */
/*0540*/ IADD3 R7, R7, -0x8, RZ ; /* 0xfffffff807077810 */
/* 0x000fe40007ffe0ff */
/*0550*/ IMNMX R8, R5, R8, !PT ; /* 0x0000000805087217 */
/* 0x004fc80007800200 */
/*0560*/ IMNMX R8, R8, R9, !PT ; /* 0x0000000908087217 */
/* 0x008fe40007800200 */
/*0570*/ IADD3 R9, P1, R2, 0x20, RZ ; /* 0x0000002002097810 */
/* 0x000fe40007f3e0ff */
/*0580*/ IMNMX R8, R8, R11, !PT ; /* 0x0000000b08087217 */
/* 0x010fc60007800200 */
/*0590*/ IMAD.X R10, RZ, RZ, R3, P1 ; /* 0x000000ffff0a7224 */
/* 0x000fe200008e0603 */
/*05a0*/ IMNMX R8, R8, R13, !PT ; /* 0x0000000d08087217 */
/* 0x020fe20007800200 */
/*05b0*/ IMAD.MOV.U32 R2, RZ, RZ, R9 ; /* 0x000000ffff027224 */
/* 0x001fe400078e0009 */
/*05c0*/ IMAD.MOV.U32 R3, RZ, RZ, R10 ; /* 0x000000ffff037224 */
/* 0x000fe200078e000a */
/*05d0*/ IMNMX R8, R8, R15, !PT ; /* 0x0000000f08087217 */
/* 0x000fc80007800200 */
/*05e0*/ IMNMX R8, R8, R17, !PT ; /* 0x0000001108087217 */
/* 0x000fc80007800200 */
/*05f0*/ IMNMX R8, R8, R19, !PT ; /* 0x0000001308087217 */
/* 0x000fc80007800200 */
/*0600*/ IMNMX R5, R8, R21, !PT ; /* 0x0000001508057217 */
/* 0x000fe40007800200 */
/*0610*/ ISETP.NE.OR P0, PT, R7, 0x1, P0 ; /* 0x000000010700780c */
/* 0x000fda0000705670 */
/*0620*/ @!P0 BRA 0x730 ; /* 0x0000010000008947 */
/* 0x000fea0003800000 */
/*0630*/ LDG.E R8, [R2.64+-0x8] ; /* 0xfffff80402087981 */
/* 0x000ea8000c1e1900 */
/*0640*/ LDG.E R9, [R2.64+-0x4] ; /* 0xfffffc0402097981 */
/* 0x000ee8000c1e1900 */
/*0650*/ LDG.E R11, [R2.64] ; /* 0x00000004020b7981 */
/* 0x000f28000c1e1900 */
/*0660*/ LDG.E R13, [R2.64+0x4] ; /* 0x00000404020d7981 */
/* 0x000f62000c1e1900 */
/*0670*/ IADD3 R7, R7, -0x4, RZ ; /* 0xfffffffc07077810 */
/* 0x000fc40007ffe0ff */
/*0680*/ IADD3 R6, R6, 0x4, RZ ; /* 0x0000000406067810 */
/* 0x000fe40007ffe0ff */
/*0690*/ ISETP.NE.AND P0, PT, R7, 0x1, PT ; /* 0x000000010700780c */
/* 0x000fe40003f05270 */
/*06a0*/ IMNMX R8, R8, R5, !PT ; /* 0x0000000508087217 */
/* 0x004fc80007800200 */
/*06b0*/ IMNMX R8, R8, R9, !PT ; /* 0x0000000908087217 */
/* 0x008fe40007800200 */
/*06c0*/ IADD3 R9, P1, R2, 0x10, RZ ; /* 0x0000001002097810 */
/* 0x000fe40007f3e0ff */
/*06d0*/ IMNMX R8, R8, R11, !PT ; /* 0x0000000b08087217 */
/* 0x010fc60007800200 */
/*06e0*/ IMAD.X R10, RZ, RZ, R3, P1 ; /* 0x000000ffff0a7224 */
/* 0x000fe200008e0603 */
/*06f0*/ IMNMX R5, R8, R13, !PT ; /* 0x0000000d08057217 */
/* 0x020fe20007800200 */
/*0700*/ IMAD.MOV.U32 R2, RZ, RZ, R9 ; /* 0x000000ffff027224 */
/* 0x000fe400078e0009 */
/*0710*/ IMAD.MOV.U32 R3, RZ, RZ, R10 ; /* 0x000000ffff037224 */
/* 0x000fe200078e000a */
/*0720*/ @P0 BRA 0x630 ; /* 0xffffff0000000947 */
/* 0x000fea000383ffff */
/*0730*/ ISETP.NE.AND P0, PT, R4, RZ, PT ; /* 0x000000ff0400720c */
/* 0x000fda0003f05270 */
/*0740*/ @!P0 BRA 0x800 ; /* 0x000000b000008947 */
/* 0x000fea0003800000 */
/*0750*/ IMAD.MOV.U32 R7, RZ, RZ, 0x4 ; /* 0x00000004ff077424 */
/* 0x000fc800078e00ff */
/*0760*/ IMAD.WIDE R6, R6, R7, c[0x0][0x160] ; /* 0x0000580006067625 */
/* 0x000fc800078e0207 */
/*0770*/ IMAD.MOV.U32 R2, RZ, RZ, R6 ; /* 0x000000ffff027224 */
/* 0x000fe400078e0006 */
/*0780*/ IMAD.MOV.U32 R3, RZ, RZ, R7 ; /* 0x000000ffff037224 */
/* 0x000fca00078e0007 */
/*0790*/ LDG.E R2, [R2.64] ; /* 0x0000000402027981 */
/* 0x000ea2000c1e1900 */
/*07a0*/ IADD3 R4, R4, -0x1, RZ ; /* 0xffffffff04047810 */
/* 0x000fe40007ffe0ff */
/*07b0*/ IADD3 R6, P1, R6, 0x4, RZ ; /* 0x0000000406067810 */
/* 0x000fe40007f3e0ff */
/*07c0*/ ISETP.NE.AND P0, PT, R4, RZ, PT ; /* 0x000000ff0400720c */
/* 0x000fc60003f05270 */
/*07d0*/ IMAD.X R7, RZ, RZ, R7, P1 ; /* 0x000000ffff077224 */
/* 0x000fe200008e0607 */
/*07e0*/ IMNMX R5, R2, R5, !PT ; /* 0x0000000502057217 */
/* 0x004fd20007800200 */
/*07f0*/ @P0 BRA 0x770 ; /* 0xffffff7000000947 */
/* 0x000fea000383ffff */
/*0800*/ IMAD.MOV.U32 R3, RZ, RZ, 0x4 ; /* 0x00000004ff037424 */
/* 0x000fc800078e00ff */
/*0810*/ IMAD.WIDE.U32 R2, R0, R3, c[0x0][0x168] ; /* 0x00005a0000027625 */
/* 0x000fca00078e0003 */
/*0820*/ STG.E [R2.64], R5 ; /* 0x0000000502007986 */
/* 0x000fe2000c101904 */
/*0830*/ EXIT ; /* 0x000000000000794d */
/* 0x000fea0003800000 */
/*0840*/ BRA 0x840; /* 0xfffffff000007947 */
/* 0x000fc0000383ffff */
/*0850*/ NOP; /* 0x0000000000007918 */
/* 0x000fc00000000000 */
/*0860*/ NOP; /* 0x0000000000007918 */
/* 0x000fc00000000000 */
/*0870*/ NOP; /* 0x0000000000007918 */
/* 0x000fc00000000000 */
/*0880*/ NOP; /* 0x0000000000007918 */
/* 0x000fc00000000000 */
/*0890*/ NOP; /* 0x0000000000007918 */
/* 0x000fc00000000000 */
/*08a0*/ NOP; /* 0x0000000000007918 */
/* 0x000fc00000000000 */
/*08b0*/ NOP; /* 0x0000000000007918 */
/* 0x000fc00000000000 */
/*08c0*/ NOP; /* 0x0000000000007918 */
/* 0x000fc00000000000 */
/*08d0*/ NOP; /* 0x0000000000007918 */
/* 0x000fc00000000000 */
/*08e0*/ NOP; /* 0x0000000000007918 */
/* 0x000fc00000000000 */
/*08f0*/ NOP; /* 0x0000000000007918 */
/* 0x000fc00000000000 */
.......... | .text
.amdgcn_target "amdgcn-amd-amdhsa--gfx1100"
.protected _Z4maxiPiS_i
.globl _Z4maxiPiS_i
.p2align 8
.type _Z4maxiPiS_i,@function
_Z4maxiPiS_i:
s_load_b32 s3, s[0:1], 0x10
s_lshl_b32 s4, s15, 8
s_mov_b32 s2, s15
s_mov_b32 s5, 0
s_waitcnt lgkmcnt(0)
s_cmp_ge_i32 s4, s3
s_cbranch_scc1 .LBB0_3
s_load_b64 s[6:7], s[0:1], 0x0
s_ashr_i32 s5, s4, 31
s_add_i32 s10, s4, 0x100
s_lshl_b64 s[8:9], s[4:5], 2
s_min_i32 s3, s10, s3
s_mov_b32 s5, 0
s_waitcnt lgkmcnt(0)
s_add_u32 s6, s6, s8
s_addc_u32 s7, s7, s9
.LBB0_2:
s_load_b32 s8, s[6:7], 0x0
s_add_i32 s4, s4, 1
s_waitcnt lgkmcnt(0)
s_max_i32 s5, s5, s8
s_add_u32 s6, s6, 4
s_addc_u32 s7, s7, 0
s_cmp_ge_i32 s4, s3
s_cbranch_scc0 .LBB0_2
.LBB0_3:
s_load_b64 s[0:1], s[0:1], 0x8
s_mov_b32 s3, 0
v_dual_mov_b32 v0, 0 :: v_dual_mov_b32 v1, s5
s_lshl_b64 s[2:3], s[2:3], 2
s_waitcnt lgkmcnt(0)
s_add_u32 s0, s0, s2
s_addc_u32 s1, s1, s3
global_store_b32 v0, v1, s[0:1]
s_nop 0
s_sendmsg sendmsg(MSG_DEALLOC_VGPRS)
s_endpgm
.section .rodata,"a",@progbits
.p2align 6, 0x0
.amdhsa_kernel _Z4maxiPiS_i
.amdhsa_group_segment_fixed_size 0
.amdhsa_private_segment_fixed_size 0
.amdhsa_kernarg_size 20
.amdhsa_user_sgpr_count 15
.amdhsa_user_sgpr_dispatch_ptr 0
.amdhsa_user_sgpr_queue_ptr 0
.amdhsa_user_sgpr_kernarg_segment_ptr 1
.amdhsa_user_sgpr_dispatch_id 0
.amdhsa_user_sgpr_private_segment_size 0
.amdhsa_wavefront_size32 1
.amdhsa_uses_dynamic_stack 0
.amdhsa_enable_private_segment 0
.amdhsa_system_sgpr_workgroup_id_x 1
.amdhsa_system_sgpr_workgroup_id_y 0
.amdhsa_system_sgpr_workgroup_id_z 0
.amdhsa_system_sgpr_workgroup_info 0
.amdhsa_system_vgpr_workitem_id 0
.amdhsa_next_free_vgpr 2
.amdhsa_next_free_sgpr 16
.amdhsa_reserve_vcc 0
.amdhsa_float_round_mode_32 0
.amdhsa_float_round_mode_16_64 0
.amdhsa_float_denorm_mode_32 3
.amdhsa_float_denorm_mode_16_64 3
.amdhsa_dx10_clamp 1
.amdhsa_ieee_mode 1
.amdhsa_fp16_overflow 0
.amdhsa_workgroup_processor_mode 1
.amdhsa_memory_ordered 1
.amdhsa_forward_progress 0
.amdhsa_shared_vgpr_count 0
.amdhsa_exception_fp_ieee_invalid_op 0
.amdhsa_exception_fp_denorm_src 0
.amdhsa_exception_fp_ieee_div_zero 0
.amdhsa_exception_fp_ieee_overflow 0
.amdhsa_exception_fp_ieee_underflow 0
.amdhsa_exception_fp_ieee_inexact 0
.amdhsa_exception_int_div_zero 0
.end_amdhsa_kernel
.text
.Lfunc_end0:
.size _Z4maxiPiS_i, .Lfunc_end0-_Z4maxiPiS_i
.section .AMDGPU.csdata,"",@progbits
.text
.p2alignl 7, 3214868480
.fill 96, 4, 3214868480
.type __hip_cuid_,@object
.section .bss,"aw",@nobits
.globl __hip_cuid_
__hip_cuid_:
.byte 0
.size __hip_cuid_, 1
.ident "AMD clang version 18.0.0git (https://github.com/RadeonOpenCompute/llvm-project roc-6.3.2 25012 e5bf7e55c91490b07c49d8960fa7983d864936c4)"
.section ".note.GNU-stack","",@progbits
.addrsig
.addrsig_sym __hip_cuid_
.amdgpu_metadata
---
amdhsa.kernels:
- .args:
- .address_space: global
.offset: 0
.size: 8
.value_kind: global_buffer
- .address_space: global
.offset: 8
.size: 8
.value_kind: global_buffer
- .offset: 16
.size: 4
.value_kind: by_value
.group_segment_fixed_size: 0
.kernarg_segment_align: 8
.kernarg_segment_size: 20
.language: OpenCL C
.language_version:
- 2
- 0
.max_flat_workgroup_size: 1024
.name: _Z4maxiPiS_i
.private_segment_fixed_size: 0
.sgpr_count: 16
.sgpr_spill_count: 0
.symbol: _Z4maxiPiS_i.kd
.uniform_work_group_size: 1
.uses_dynamic_stack: false
.vgpr_count: 2
.vgpr_spill_count: 0
.wavefront_size: 32
.workgroup_processor_mode: 1
amdhsa.target: amdgcn-amd-amdhsa--gfx1100
amdhsa.version:
- 1
- 2
...
.end_amdgpu_metadata |
You are a helpful coding assistant specialized in converting from CUDA host assembly to AMD host assembly. | .file "tmpxft_00120572_00000000-6_a11.cudafe1.cpp"
.text
#APP
.globl _ZSt21ios_base_library_initv
#NO_APP
.type _ZL26__cudaUnregisterBinaryUtilv, @function
_ZL26__cudaUnregisterBinaryUtilv:
.LFB3672:
.cfi_startproc
endbr64
subq $8, %rsp
.cfi_def_cfa_offset 16
movq _ZL20__cudaFatCubinHandle(%rip), %rdi
call __cudaUnregisterFatBinary@PLT
addq $8, %rsp
.cfi_def_cfa_offset 8
ret
.cfi_endproc
.LFE3672:
.size _ZL26__cudaUnregisterBinaryUtilv, .-_ZL26__cudaUnregisterBinaryUtilv
.globl _Z26__device_stub__Z4maxiPiS_iPiS_i
.type _Z26__device_stub__Z4maxiPiS_iPiS_i, @function
_Z26__device_stub__Z4maxiPiS_iPiS_i:
.LFB3694:
.cfi_startproc
endbr64
subq $136, %rsp
.cfi_def_cfa_offset 144
movq %rdi, 24(%rsp)
movq %rsi, 16(%rsp)
movl %edx, 12(%rsp)
movq %fs:40, %rax
movq %rax, 120(%rsp)
xorl %eax, %eax
leaq 24(%rsp), %rax
movq %rax, 96(%rsp)
leaq 16(%rsp), %rax
movq %rax, 104(%rsp)
leaq 12(%rsp), %rax
movq %rax, 112(%rsp)
movl $1, 48(%rsp)
movl $1, 52(%rsp)
movl $1, 56(%rsp)
movl $1, 60(%rsp)
movl $1, 64(%rsp)
movl $1, 68(%rsp)
leaq 40(%rsp), %rcx
leaq 32(%rsp), %rdx
leaq 60(%rsp), %rsi
leaq 48(%rsp), %rdi
call __cudaPopCallConfiguration@PLT
testl %eax, %eax
je .L7
.L3:
movq 120(%rsp), %rax
subq %fs:40, %rax
jne .L8
addq $136, %rsp
.cfi_remember_state
.cfi_def_cfa_offset 8
ret
.L7:
.cfi_restore_state
pushq 40(%rsp)
.cfi_def_cfa_offset 152
pushq 40(%rsp)
.cfi_def_cfa_offset 160
leaq 112(%rsp), %r9
movq 76(%rsp), %rcx
movl 84(%rsp), %r8d
movq 64(%rsp), %rsi
movl 72(%rsp), %edx
leaq _Z4maxiPiS_i(%rip), %rdi
call cudaLaunchKernel@PLT
addq $16, %rsp
.cfi_def_cfa_offset 144
jmp .L3
.L8:
call __stack_chk_fail@PLT
.cfi_endproc
.LFE3694:
.size _Z26__device_stub__Z4maxiPiS_iPiS_i, .-_Z26__device_stub__Z4maxiPiS_iPiS_i
.globl _Z4maxiPiS_i
.type _Z4maxiPiS_i, @function
_Z4maxiPiS_i:
.LFB3695:
.cfi_startproc
endbr64
subq $8, %rsp
.cfi_def_cfa_offset 16
call _Z26__device_stub__Z4maxiPiS_iPiS_i
addq $8, %rsp
.cfi_def_cfa_offset 8
ret
.cfi_endproc
.LFE3695:
.size _Z4maxiPiS_i, .-_Z4maxiPiS_i
.section .rodata.str1.1,"aMS",@progbits,1
.LC0:
.string "Enter the size of array: "
.LC1:
.string "%d\t"
.LC3:
.string "\nSequential Processing:"
.LC4:
.string "\nMax="
.LC5:
.string "\nSequential time="
.LC10:
.string "\nParallel Processing:\nMax="
.LC11:
.string "Parallel Time="
.text
.globl main
.type main, @function
main:
.LFB3669:
.cfi_startproc
endbr64
pushq %rbp
.cfi_def_cfa_offset 16
.cfi_offset 6, -16
movq %rsp, %rbp
.cfi_def_cfa_register 6
pushq %r13
pushq %r12
pushq %rbx
subq $104, %rsp
.cfi_offset 13, -24
.cfi_offset 12, -32
.cfi_offset 3, -40
movq %fs:40, %rax
movq %rax, -40(%rbp)
xorl %eax, %eax
leaq .LC0(%rip), %rsi
leaq _ZSt4cout(%rip), %rdi
call _ZStlsISt11char_traitsIcEERSt13basic_ostreamIcT_ES5_PKc@PLT
leaq -128(%rbp), %rsi
leaq _ZSt3cin(%rip), %rdi
call _ZNSirsERi@PLT
movl -128(%rbp), %edx
movslq %edx, %rax
leaq 15(,%rax,4), %rax
movq %rax, %rsi
andq $-16, %rsi
andq $-4096, %rax
movq %rsp, %rcx
subq %rax, %rcx
.L12:
cmpq %rcx, %rsp
je .L13
subq $4096, %rsp
orq $0, 4088(%rsp)
jmp .L12
.L13:
movq %rsi, %rax
andl $4095, %eax
subq %rax, %rsp
testq %rax, %rax
je .L14
orq $0, -8(%rsp,%rax)
.L14:
movq %rsp, %r12
testl %edx, %edx
jle .L15
movl $0, %ebx
.L16:
call rand@PLT
movl -128(%rbp), %ecx
cltd
idivl %ecx
movl %edx, (%r12,%rbx,4)
addq $1, %rbx
cmpl %ebx, %ecx
jg .L16
testl %ecx, %ecx
jle .L15
movl $0, %ebx
leaq .LC1(%rip), %r13
.L17:
movl (%r12,%rbx,4), %edx
movq %r13, %rsi
movl $2, %edi
movl $0, %eax
call __printf_chk@PLT
addq $1, %rbx
cmpl %ebx, -128(%rbp)
jg .L17
.L15:
leaq -104(%rbp), %rdi
call cudaEventCreate@PLT
leaq -96(%rbp), %rdi
call cudaEventCreate@PLT
movl $0, %esi
movq -104(%rbp), %rdi
call cudaEventRecord@PLT
movl -128(%rbp), %edx
testl %edx, %edx
jle .L26
movq %r12, %rax
movslq %edx, %rdx
leaq (%r12,%rdx,4), %rcx
movl $0, %ebx
.L19:
movl (%rax), %edx
cmpl %edx, %ebx
cmovl %edx, %ebx
addq $4, %rax
cmpq %rcx, %rax
jne .L19
.L18:
movl $0, %esi
movq -96(%rbp), %rdi
call cudaEventRecord@PLT
movq -96(%rbp), %rdi
call cudaEventSynchronize@PLT
movl $0x00000000, -124(%rbp)
leaq -124(%rbp), %rdi
movq -96(%rbp), %rdx
movq -104(%rbp), %rsi
call cudaEventElapsedTime@PLT
leaq .LC3(%rip), %rsi
leaq _ZSt4cout(%rip), %r13
movq %r13, %rdi
call _ZStlsISt11char_traitsIcEERSt13basic_ostreamIcT_ES5_PKc@PLT
leaq .LC4(%rip), %rsi
movq %r13, %rdi
call _ZStlsISt11char_traitsIcEERSt13basic_ostreamIcT_ES5_PKc@PLT
movq %rax, %rdi
movl %ebx, %esi
call _ZNSolsEi@PLT
leaq .LC5(%rip), %rsi
movq %r13, %rdi
call _ZStlsISt11char_traitsIcEERSt13basic_ostreamIcT_ES5_PKc@PLT
movq %rax, %rdi
pxor %xmm0, %xmm0
cvtss2sd -124(%rbp), %xmm0
call _ZNSo9_M_insertIdEERSoT_@PLT
movl -128(%rbp), %eax
leal 0(,%rax,4), %ebx
movslq %ebx, %rbx
leaq -88(%rbp), %rdi
movq %rbx, %rsi
call cudaMalloc@PLT
movl $1, %ecx
movq %rbx, %rdx
movq %r12, %rsi
movq -88(%rbp), %rdi
call cudaMemcpy@PLT
pxor %xmm0, %xmm0
cvtsi2ssl -128(%rbp), %xmm0
mulss .LC6(%rip), %xmm0
movaps %xmm0, %xmm3
movss .LC12(%rip), %xmm2
movaps %xmm0, %xmm1
andps %xmm2, %xmm1
movss .LC7(%rip), %xmm4
ucomiss %xmm1, %xmm4
jbe .L20
cvttss2sil %xmm0, %eax
pxor %xmm1, %xmm1
cvtsi2ssl %eax, %xmm1
cmpnless %xmm1, %xmm3
movss .LC9(%rip), %xmm4
andps %xmm4, %xmm3
addss %xmm1, %xmm3
andnps %xmm0, %xmm2
orps %xmm2, %xmm3
.L20:
cvttss2sil %xmm3, %ebx
movslq %ebx, %rsi
salq $2, %rsi
leaq -80(%rbp), %rdi
call cudaMalloc@PLT
movl $1, -72(%rbp)
movl $1, -68(%rbp)
movl $1, -64(%rbp)
leaq -120(%rbp), %rdi
call cudaEventCreate@PLT
leaq -112(%rbp), %rdi
call cudaEventCreate@PLT
movl $0, %esi
movq -120(%rbp), %rdi
call cudaEventRecord@PLT
cmpl $1, -128(%rbp)
jg .L24
.L21:
movl $0, %esi
movq -112(%rbp), %rdi
call cudaEventRecord@PLT
movq -112(%rbp), %rdi
call cudaEventSynchronize@PLT
movl $0x00000000, -60(%rbp)
leaq -60(%rbp), %rdi
movq -112(%rbp), %rdx
movq -120(%rbp), %rsi
call cudaEventElapsedTime@PLT
leaq -48(%rbp), %rdi
movl $2, %ecx
movl $4, %edx
movq -88(%rbp), %rsi
call cudaMemcpy@PLT
leaq .LC10(%rip), %rsi
leaq _ZSt4cout(%rip), %rbx
movq %rbx, %rdi
call _ZStlsISt11char_traitsIcEERSt13basic_ostreamIcT_ES5_PKc@PLT
movq %rax, %rdi
movl -48(%rbp), %esi
call _ZNSolsEi@PLT
movq %rax, %rdi
call _ZSt4endlIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_@PLT
leaq .LC11(%rip), %rsi
movq %rbx, %rdi
call _ZStlsISt11char_traitsIcEERSt13basic_ostreamIcT_ES5_PKc@PLT
pxor %xmm0, %xmm0
cvtss2sd -60(%rbp), %xmm0
movq %rbx, %rdi
call _ZNSo9_M_insertIdEERSoT_@PLT
movq %rax, %rdi
call _ZSt4endlIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_@PLT
movq -40(%rbp), %rax
subq %fs:40, %rax
jne .L32
movl $0, %eax
leaq -24(%rbp), %rsp
popq %rbx
popq %r12
popq %r13
popq %rbp
.cfi_remember_state
.cfi_def_cfa 7, 8
ret
.L26:
.cfi_restore_state
movl $0, %ebx
jmp .L18
.L33:
movl -128(%rbp), %edx
movq -80(%rbp), %rsi
movq -88(%rbp), %rdi
call _Z26__device_stub__Z4maxiPiS_iPiS_i
jmp .L22
.L23:
cvttss2sil %xmm2, %edx
movl %edx, -128(%rbp)
movslq %edx, %rdx
salq $2, %rdx
movl $3, %ecx
movq -80(%rbp), %rsi
movq -88(%rbp), %rdi
call cudaMemcpy@PLT
cmpl $1, -128(%rbp)
jle .L21
.L24:
movl %ebx, -60(%rbp)
movl $1, -56(%rbp)
movl $1, -52(%rbp)
movl -64(%rbp), %ecx
movl $0, %r9d
movl $0, %r8d
movq -72(%rbp), %rdx
movq -60(%rbp), %rdi
movl $1, %esi
call __cudaPushCallConfiguration@PLT
testl %eax, %eax
je .L33
.L22:
pxor %xmm0, %xmm0
cvtsi2ssl -128(%rbp), %xmm0
mulss .LC6(%rip), %xmm0
movaps %xmm0, %xmm2
movss .LC12(%rip), %xmm1
andps %xmm0, %xmm1
movss .LC7(%rip), %xmm5
ucomiss %xmm1, %xmm5
jbe .L23
cvttss2sil %xmm0, %eax
pxor %xmm1, %xmm1
cvtsi2ssl %eax, %xmm1
cmpnless %xmm1, %xmm2
movss .LC9(%rip), %xmm6
andps %xmm6, %xmm2
addss %xmm2, %xmm1
movss .LC12(%rip), %xmm2
andnps %xmm0, %xmm2
orps %xmm1, %xmm2
jmp .L23
.L32:
call __stack_chk_fail@PLT
.cfi_endproc
.LFE3669:
.size main, .-main
.section .rodata.str1.1
.LC13:
.string "_Z4maxiPiS_i"
.text
.type _ZL24__sti____cudaRegisterAllv, @function
_ZL24__sti____cudaRegisterAllv:
.LFB3697:
.cfi_startproc
endbr64
subq $8, %rsp
.cfi_def_cfa_offset 16
leaq _ZL15__fatDeviceText(%rip), %rdi
call __cudaRegisterFatBinary@PLT
movq %rax, %rdi
movq %rax, _ZL20__cudaFatCubinHandle(%rip)
pushq $0
.cfi_def_cfa_offset 24
pushq $0
.cfi_def_cfa_offset 32
pushq $0
.cfi_def_cfa_offset 40
pushq $0
.cfi_def_cfa_offset 48
movl $0, %r9d
movl $-1, %r8d
leaq .LC13(%rip), %rdx
movq %rdx, %rcx
leaq _Z4maxiPiS_i(%rip), %rsi
call __cudaRegisterFunction@PLT
addq $32, %rsp
.cfi_def_cfa_offset 16
movq _ZL20__cudaFatCubinHandle(%rip), %rdi
call __cudaRegisterFatBinaryEnd@PLT
leaq _ZL26__cudaUnregisterBinaryUtilv(%rip), %rdi
call atexit@PLT
addq $8, %rsp
.cfi_def_cfa_offset 8
ret
.cfi_endproc
.LFE3697:
.size _ZL24__sti____cudaRegisterAllv, .-_ZL24__sti____cudaRegisterAllv
.section .init_array,"aw"
.align 8
.quad _ZL24__sti____cudaRegisterAllv
.section .nvFatBinSegment,"aw"
.align 8
.type _ZL15__fatDeviceText, @object
.size _ZL15__fatDeviceText, 24
_ZL15__fatDeviceText:
.long 1180844977
.long 1
.quad fatbinData
.quad 0
.local _ZL20__cudaFatCubinHandle
.comm _ZL20__cudaFatCubinHandle,8,8
.section .rodata.cst4,"aM",@progbits,4
.align 4
.LC6:
.long 998244352
.align 4
.LC7:
.long 1258291200
.align 4
.LC9:
.long 1065353216
.align 4
.LC12:
.long 2147483647
.ident "GCC: (Ubuntu 13.3.0-6ubuntu2~24.04) 13.3.0"
.section .note.GNU-stack,"",@progbits
.section .note.gnu.property,"a"
.align 8
.long 1f - 0f
.long 4f - 1f
.long 5
0:
.string "GNU"
1:
.align 8
.long 0xc0000002
.long 3f - 2f
2:
.long 0x3
3:
.align 8
4: | .text
.file "a11.hip"
# Start of file scope inline assembly
.globl _ZSt21ios_base_library_initv
# End of file scope inline assembly
.globl _Z19__device_stub__maxiPiS_i # -- Begin function _Z19__device_stub__maxiPiS_i
.p2align 4, 0x90
.type _Z19__device_stub__maxiPiS_i,@function
_Z19__device_stub__maxiPiS_i: # @_Z19__device_stub__maxiPiS_i
.cfi_startproc
# %bb.0:
subq $104, %rsp
.cfi_def_cfa_offset 112
movq %rdi, 72(%rsp)
movq %rsi, 64(%rsp)
movl %edx, 12(%rsp)
leaq 72(%rsp), %rax
movq %rax, 80(%rsp)
leaq 64(%rsp), %rax
movq %rax, 88(%rsp)
leaq 12(%rsp), %rax
movq %rax, 96(%rsp)
leaq 48(%rsp), %rdi
leaq 32(%rsp), %rsi
leaq 24(%rsp), %rdx
leaq 16(%rsp), %rcx
callq __hipPopCallConfiguration
movq 48(%rsp), %rsi
movl 56(%rsp), %edx
movq 32(%rsp), %rcx
movl 40(%rsp), %r8d
leaq 80(%rsp), %r9
movl $_Z4maxiPiS_i, %edi
pushq 16(%rsp)
.cfi_adjust_cfa_offset 8
pushq 32(%rsp)
.cfi_adjust_cfa_offset 8
callq hipLaunchKernel
addq $120, %rsp
.cfi_adjust_cfa_offset -120
retq
.Lfunc_end0:
.size _Z19__device_stub__maxiPiS_i, .Lfunc_end0-_Z19__device_stub__maxiPiS_i
.cfi_endproc
# -- End function
.section .rodata.cst4,"aM",@progbits,4
.p2align 2, 0x0 # -- Begin function main
.LCPI1_0:
.long 0x3b800000 # float 0.00390625
.text
.globl main
.p2align 4, 0x90
.type main,@function
main: # @main
.cfi_startproc
# %bb.0:
pushq %rbp
.cfi_def_cfa_offset 16
.cfi_offset %rbp, -16
movq %rsp, %rbp
.cfi_def_cfa_register %rbp
pushq %r15
pushq %r14
pushq %r13
pushq %r12
pushq %rbx
subq $168, %rsp
.cfi_offset %rbx, -56
.cfi_offset %r12, -48
.cfi_offset %r13, -40
.cfi_offset %r14, -32
.cfi_offset %r15, -24
movl $_ZSt4cout, %edi
movl $.L.str, %esi
movl $25, %edx
callq _ZSt16__ostream_insertIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_PKS3_l
leaq -44(%rbp), %rsi
movl $_ZSt3cin, %edi
callq _ZNSirsERi
movq %rsp, -152(%rbp) # 8-byte Spill
movl -44(%rbp), %eax
movq %rsp, %rbx
leaq 15(,%rax,4), %rax
andq $-16, %rax
subq %rax, %rbx
movq %rbx, %rsp
cmpl $0, -44(%rbp)
jle .LBB1_3
# %bb.1: # %.lr.ph.preheader
xorl %r14d, %r14d
.p2align 4, 0x90
.LBB1_2: # %.lr.ph
# =>This Inner Loop Header: Depth=1
callq rand
movslq -44(%rbp), %rcx
cltd
idivl %ecx
movl %edx, (%rbx,%r14,4)
incq %r14
cmpq %rcx, %r14
jl .LBB1_2
.LBB1_3: # %.preheader
cmpl $0, -44(%rbp)
jle .LBB1_6
# %bb.4: # %.lr.ph36.preheader
xorl %r14d, %r14d
.p2align 4, 0x90
.LBB1_5: # %.lr.ph36
# =>This Inner Loop Header: Depth=1
movl (%rbx,%r14,4), %esi
movl $.L.str.1, %edi
xorl %eax, %eax
callq printf
incq %r14
movslq -44(%rbp), %rax
cmpq %rax, %r14
jl .LBB1_5
.LBB1_6: # %._crit_edge
leaq -112(%rbp), %rdi
callq hipEventCreate
leaq -64(%rbp), %rdi
callq hipEventCreate
movq -112(%rbp), %rdi
xorl %r14d, %r14d
xorl %esi, %esi
callq hipEventRecord
movl -44(%rbp), %eax
testl %eax, %eax
jle .LBB1_9
# %bb.7: # %.lr.ph40.preheader
xorl %ecx, %ecx
xorl %r14d, %r14d
.p2align 4, 0x90
.LBB1_8: # %.lr.ph40
# =>This Inner Loop Header: Depth=1
movl (%rbx,%rcx,4), %edx
cmpl %r14d, %edx
cmovgl %edx, %r14d
incq %rcx
cmpq %rcx, %rax
jne .LBB1_8
.LBB1_9: # %._crit_edge41
movq -64(%rbp), %rdi
xorl %esi, %esi
callq hipEventRecord
movq -64(%rbp), %rdi
callq hipEventSynchronize
movl $0, -48(%rbp)
movq -112(%rbp), %rsi
movq -64(%rbp), %rdx
leaq -48(%rbp), %rdi
callq hipEventElapsedTime
movl $_ZSt4cout, %edi
movl $.L.str.2, %esi
movl $23, %edx
callq _ZSt16__ostream_insertIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_PKS3_l
movl $_ZSt4cout, %edi
movl $.L.str.3, %esi
movl $5, %edx
callq _ZSt16__ostream_insertIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_PKS3_l
movl $_ZSt4cout, %edi
movl %r14d, %esi
callq _ZNSolsEi
movl $_ZSt4cout, %edi
movl $.L.str.4, %esi
movl $17, %edx
callq _ZSt16__ostream_insertIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_PKS3_l
movss -48(%rbp), %xmm0 # xmm0 = mem[0],zero,zero,zero
cvtss2sd %xmm0, %xmm0
movl $_ZSt4cout, %edi
callq _ZNSo9_M_insertIdEERSoT_
movl -44(%rbp), %eax
shll $2, %eax
movslq %eax, %r14
leaq -56(%rbp), %rdi
movq %r14, %rsi
callq hipMalloc
movq -56(%rbp), %rdi
movq %rbx, %rsi
movq %r14, %rdx
movl $1, %ecx
callq hipMemcpy
xorps %xmm0, %xmm0
cvtsi2ssl -44(%rbp), %xmm0
mulss .LCPI1_0(%rip), %xmm0
callq ceilf@PLT
cvttss2si %xmm0, %r14d
movslq %r14d, %rsi
shlq $2, %rsi
leaq -104(%rbp), %rdi
callq hipMalloc
leaq -120(%rbp), %rdi
callq hipEventCreate
leaq -72(%rbp), %rdi
callq hipEventCreate
movq -120(%rbp), %rdi
xorl %esi, %esi
callq hipEventRecord
cmpl $2, -44(%rbp)
jl .LBB1_14
# %bb.10: # %.lr.ph43
movabsq $4294967296, %rbx # imm = 0x100000000
movl %r14d, %r14d
orq %rbx, %r14
incq %rbx
leaq -168(%rbp), %r13
leaq -160(%rbp), %r15
leaq -144(%rbp), %r12
jmp .LBB1_11
.p2align 4, 0x90
.LBB1_13: # in Loop: Header=BB1_11 Depth=1
xorps %xmm0, %xmm0
cvtsi2ssl -44(%rbp), %xmm0
mulss .LCPI1_0(%rip), %xmm0
callq ceilf@PLT
cvttss2si %xmm0, %eax
movl %eax, -44(%rbp)
movq -56(%rbp), %rdi
movq -104(%rbp), %rsi
movslq %eax, %rdx
shlq $2, %rdx
movl $3, %ecx
callq hipMemcpy
cmpl $1, -44(%rbp)
jle .LBB1_14
.LBB1_11: # =>This Inner Loop Header: Depth=1
movq %r14, %rdi
movl $1, %esi
movq %rbx, %rdx
movl $1, %ecx
xorl %r8d, %r8d
xorl %r9d, %r9d
callq __hipPushCallConfiguration
testl %eax, %eax
jne .LBB1_13
# %bb.12: # in Loop: Header=BB1_11 Depth=1
movq -56(%rbp), %rax
movq -104(%rbp), %rcx
movl -44(%rbp), %edx
movq %rax, -200(%rbp)
movq %rcx, -192(%rbp)
movl %edx, -92(%rbp)
leaq -200(%rbp), %rax
movq %rax, -144(%rbp)
leaq -192(%rbp), %rax
movq %rax, -136(%rbp)
leaq -92(%rbp), %rax
movq %rax, -128(%rbp)
leaq -88(%rbp), %rdi
leaq -184(%rbp), %rsi
movq %r13, %rdx
movq %r15, %rcx
callq __hipPopCallConfiguration
movq -88(%rbp), %rsi
movl -80(%rbp), %edx
movq -184(%rbp), %rcx
movl -176(%rbp), %r8d
movl $_Z4maxiPiS_i, %edi
movq %r12, %r9
pushq -160(%rbp)
pushq -168(%rbp)
callq hipLaunchKernel
addq $16, %rsp
jmp .LBB1_13
.LBB1_14: # %._crit_edge44
movq -72(%rbp), %rdi
xorl %esi, %esi
callq hipEventRecord
movq -72(%rbp), %rdi
callq hipEventSynchronize
movl $0, -88(%rbp)
movq -120(%rbp), %rsi
movq -72(%rbp), %rdx
leaq -88(%rbp), %rdi
callq hipEventElapsedTime
movq -56(%rbp), %rsi
leaq -144(%rbp), %rdi
movl $4, %edx
movl $2, %ecx
callq hipMemcpy
movl $_ZSt4cout, %edi
movl $.L.str.5, %esi
movl $26, %edx
callq _ZSt16__ostream_insertIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_PKS3_l
movl -144(%rbp), %esi
movl $_ZSt4cout, %edi
callq _ZNSolsEi
movq (%rax), %rcx
movq -24(%rcx), %rcx
movq 240(%rax,%rcx), %rbx
testq %rbx, %rbx
je .LBB1_23
# %bb.15: # %_ZSt13__check_facetISt5ctypeIcEERKT_PS3_.exit.i.i
cmpb $0, 56(%rbx)
je .LBB1_17
# %bb.16:
movzbl 67(%rbx), %ecx
jmp .LBB1_18
.LBB1_17:
movq %rbx, %rdi
movq %rax, %r14
callq _ZNKSt5ctypeIcE13_M_widen_initEv
movq (%rbx), %rax
movq %rbx, %rdi
movl $10, %esi
callq *48(%rax)
movl %eax, %ecx
movq %r14, %rax
.LBB1_18: # %_ZSt4endlIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_.exit
movsbl %cl, %esi
movq %rax, %rdi
callq _ZNSo3putEc
movq %rax, %rdi
callq _ZNSo5flushEv
movl $_ZSt4cout, %edi
movl $.L.str.6, %esi
movl $14, %edx
callq _ZSt16__ostream_insertIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_PKS3_l
movss -88(%rbp), %xmm0 # xmm0 = mem[0],zero,zero,zero
cvtss2sd %xmm0, %xmm0
movl $_ZSt4cout, %edi
callq _ZNSo9_M_insertIdEERSoT_
movq (%rax), %rcx
movq -24(%rcx), %rcx
movq 240(%rax,%rcx), %rbx
testq %rbx, %rbx
je .LBB1_23
# %bb.19: # %_ZSt13__check_facetISt5ctypeIcEERKT_PS3_.exit.i.i27
cmpb $0, 56(%rbx)
je .LBB1_21
# %bb.20:
movzbl 67(%rbx), %ecx
jmp .LBB1_22
.LBB1_21:
movq %rbx, %rdi
movq %rax, %r14
callq _ZNKSt5ctypeIcE13_M_widen_initEv
movq (%rbx), %rax
movq %rbx, %rdi
movl $10, %esi
callq *48(%rax)
movl %eax, %ecx
movq %r14, %rax
.LBB1_22: # %_ZSt4endlIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_.exit30
movsbl %cl, %esi
movq %rax, %rdi
callq _ZNSo3putEc
movq %rax, %rdi
callq _ZNSo5flushEv
movq -152(%rbp), %rsp # 8-byte Reload
xorl %eax, %eax
leaq -40(%rbp), %rsp
popq %rbx
popq %r12
popq %r13
popq %r14
popq %r15
popq %rbp
.cfi_def_cfa %rsp, 8
retq
.LBB1_23:
.cfi_def_cfa %rbp, 16
callq _ZSt16__throw_bad_castv
.Lfunc_end1:
.size main, .Lfunc_end1-main
.cfi_endproc
# -- End function
.p2align 4, 0x90 # -- Begin function __hip_module_ctor
.type __hip_module_ctor,@function
__hip_module_ctor: # @__hip_module_ctor
.cfi_startproc
# %bb.0:
subq $40, %rsp
.cfi_def_cfa_offset 48
cmpq $0, __hip_gpubin_handle(%rip)
jne .LBB2_2
# %bb.1:
movl $__hip_fatbin_wrapper, %edi
callq __hipRegisterFatBinary
movq %rax, __hip_gpubin_handle(%rip)
.LBB2_2:
movq __hip_gpubin_handle(%rip), %rdi
xorps %xmm0, %xmm0
movups %xmm0, 16(%rsp)
movups %xmm0, (%rsp)
movl $_Z4maxiPiS_i, %esi
movl $.L__unnamed_1, %edx
movl $.L__unnamed_1, %ecx
movl $-1, %r8d
xorl %r9d, %r9d
callq __hipRegisterFunction
movl $__hip_module_dtor, %edi
addq $40, %rsp
.cfi_def_cfa_offset 8
jmp atexit # TAILCALL
.Lfunc_end2:
.size __hip_module_ctor, .Lfunc_end2-__hip_module_ctor
.cfi_endproc
# -- End function
.p2align 4, 0x90 # -- Begin function __hip_module_dtor
.type __hip_module_dtor,@function
__hip_module_dtor: # @__hip_module_dtor
.cfi_startproc
# %bb.0:
movq __hip_gpubin_handle(%rip), %rdi
testq %rdi, %rdi
je .LBB3_2
# %bb.1:
pushq %rax
.cfi_def_cfa_offset 16
callq __hipUnregisterFatBinary
movq $0, __hip_gpubin_handle(%rip)
addq $8, %rsp
.cfi_def_cfa_offset 8
.LBB3_2:
retq
.Lfunc_end3:
.size __hip_module_dtor, .Lfunc_end3-__hip_module_dtor
.cfi_endproc
# -- End function
.type _Z4maxiPiS_i,@object # @_Z4maxiPiS_i
.section .rodata,"a",@progbits
.globl _Z4maxiPiS_i
.p2align 3, 0x0
_Z4maxiPiS_i:
.quad _Z19__device_stub__maxiPiS_i
.size _Z4maxiPiS_i, 8
.type .L.str,@object # @.str
.section .rodata.str1.1,"aMS",@progbits,1
.L.str:
.asciz "Enter the size of array: "
.size .L.str, 26
.type .L.str.1,@object # @.str.1
.L.str.1:
.asciz "%d\t"
.size .L.str.1, 4
.type .L.str.2,@object # @.str.2
.L.str.2:
.asciz "\nSequential Processing:"
.size .L.str.2, 24
.type .L.str.3,@object # @.str.3
.L.str.3:
.asciz "\nMax="
.size .L.str.3, 6
.type .L.str.4,@object # @.str.4
.L.str.4:
.asciz "\nSequential time="
.size .L.str.4, 18
.type .L.str.5,@object # @.str.5
.L.str.5:
.asciz "\nParallel Processing:\nMax="
.size .L.str.5, 27
.type .L.str.6,@object # @.str.6
.L.str.6:
.asciz "Parallel Time="
.size .L.str.6, 15
.type .L__unnamed_1,@object # @0
.L__unnamed_1:
.asciz "_Z4maxiPiS_i"
.size .L__unnamed_1, 13
.type __hip_fatbin_wrapper,@object # @__hip_fatbin_wrapper
.section .hipFatBinSegment,"a",@progbits
.p2align 3, 0x0
__hip_fatbin_wrapper:
.long 1212764230 # 0x48495046
.long 1 # 0x1
.quad __hip_fatbin
.quad 0
.size __hip_fatbin_wrapper, 24
.type __hip_gpubin_handle,@object # @__hip_gpubin_handle
.local __hip_gpubin_handle
.comm __hip_gpubin_handle,8,8
.section .init_array,"aw",@init_array
.p2align 3, 0x0
.quad __hip_module_ctor
.type __hip_cuid_,@object # @__hip_cuid_
.bss
.globl __hip_cuid_
__hip_cuid_:
.byte 0 # 0x0
.size __hip_cuid_, 1
.section ".linker-options","e",@llvm_linker_options
.ident "AMD clang version 18.0.0git (https://github.com/RadeonOpenCompute/llvm-project roc-6.3.2 25012 e5bf7e55c91490b07c49d8960fa7983d864936c4)"
.section ".note.GNU-stack","",@progbits
.addrsig
.addrsig_sym _Z19__device_stub__maxiPiS_i
.addrsig_sym __hip_module_ctor
.addrsig_sym __hip_module_dtor
.addrsig_sym _Z4maxiPiS_i
.addrsig_sym _ZSt4cout
.addrsig_sym _ZSt3cin
.addrsig_sym __hip_fatbin
.addrsig_sym __hip_fatbin_wrapper
.addrsig_sym __hip_cuid_ |
You are a helpful coding assistant specialized in converting CUDA source code to CUDA device assembly. | #include <stdio.h>
#include <stdlib.h>
__global__ void emptyKernel()
{
}
#define cudaCheck(ans) { gpuAssert((ans), __FILE__, __LINE__); }
inline void gpuAssert(cudaError_t code, const char *file, int line, bool abort=true)
{
if (code != cudaSuccess)
{
printf("CUDA error: %s - %s(%d)\n", cudaGetErrorString(code), file, line);
if (abort) exit(code);
}
}
int main(int argc, char* argv[])
{
// Initialization
/*----------------------------------------------------------------------------------------*/
int device = atoi(argv[1]);
cudaCheck(cudaSetDevice(device));
cudaSetDeviceFlags(cudaDeviceMapHost);
int runtime_version;
int driver_version;
cudaDeviceProp properties;
cudaGetDeviceProperties(&properties, device);
cudaRuntimeGetVersion(&runtime_version);
cudaDriverGetVersion(&driver_version);
emptyKernel<<<1,1>>>();
cudaDeviceSynchronize();
// Pool size
/*----------------------------------------------------------------------------------------*/
int pool_size = 1;
char *h_data;
break_01: __attribute__((unused));
cudaHostAlloc((void**)&h_data, 1, cudaHostAllocMapped);
cudaFreeHost(h_data);
// Maximum allocations and granularity
/*----------------------------------------------------------------------------------------*/
char **h_data_array = (char**) malloc(pool_size * sizeof(char*));
cudaHostAlloc((void**)&h_data_array[0], 1, cudaHostAllocMapped);
break_02: __attribute__((unused));
int granularity = 0, iteration = 0, flag = 0;
while(!flag && iteration < pool_size)
{
iteration++;
cudaHostAlloc((void**)&h_data_array[iteration], 1, cudaHostAllocMapped);
}
for(int i = 0; i <= iteration; i++)
{
cudaFreeHost(h_data_array[i]);
}
free(h_data_array);
// Size classes
/*----------------------------------------------------------------------------------------*/
char *h_data_inf, *h_data_sup;
int inf_size = granularity, sup_size = granularity, finished = 1, class_finished = 0;
break_03: __attribute__((unused));
cudaHostAlloc((void**)&h_data_inf, inf_size, cudaHostAllocMapped);
while(!finished)
{
sup_size = sup_size + granularity;
cudaHostAlloc((void**)&h_data_sup, sup_size, cudaHostAllocMapped);
cudaFreeHost(h_data_sup);
if(class_finished)
{
class_finished = 0;
cudaFreeHost(h_data_inf);
inf_size = sup_size;
cudaHostAlloc((void**)&h_data_inf, inf_size, cudaHostAllocMapped);
}
}
cudaFreeHost(h_data_inf);
// Larger allocations
/*----------------------------------------------------------------------------------------*/
break_04: __attribute__((unused));
cudaHostAlloc((void**)&h_data, pool_size + 1, cudaHostAllocMapped);
cudaFreeHost(h_data);
// Allocator policy
/*----------------------------------------------------------------------------------------*/
char *chunk_1, *chunk_2, *chunk_3, *chunk_4, *chunk_5, *chunk_6, *chunk_7, *chunk_8, *chunk_9, *chunk_10;
cudaHostAlloc((void**)&chunk_1, granularity * 2, cudaHostAllocMapped);
cudaHostAlloc((void**)&chunk_2, granularity, cudaHostAllocMapped);
cudaHostAlloc((void**)&chunk_3, granularity * 2, cudaHostAllocMapped);
cudaHostAlloc((void**)&chunk_4, granularity, cudaHostAllocMapped);
cudaHostAlloc((void**)&chunk_5, granularity, cudaHostAllocMapped);
cudaHostAlloc((void**)&chunk_6, granularity, cudaHostAllocMapped);
cudaFreeHost(chunk_1);
cudaFreeHost(chunk_3);
cudaFreeHost(chunk_5);
cudaHostAlloc((void**)&chunk_7, granularity, cudaHostAllocMapped);
cudaHostAlloc((void**)&chunk_8, granularity, cudaHostAllocMapped);
break_05: __attribute__((unused));
cudaFreeHost(chunk_2);
cudaFreeHost(chunk_4);
cudaFreeHost(chunk_6);
cudaFreeHost(chunk_7);
cudaFreeHost(chunk_8);
// Coalescing support
/*----------------------------------------------------------------------------------------*/
cudaHostAlloc((void**)&chunk_1, granularity, cudaHostAllocMapped);
cudaHostAlloc((void**)&chunk_2, granularity, cudaHostAllocMapped);
cudaHostAlloc((void**)&chunk_3, granularity, cudaHostAllocMapped);
cudaFreeHost(chunk_1);
cudaFreeHost(chunk_2);
cudaHostAlloc((void**)&chunk_4, granularity * 2, cudaHostAllocMapped);
break_06: __attribute__((unused));
cudaFreeHost(chunk_3);
cudaFreeHost(chunk_4);
// Splitting support
/*----------------------------------------------------------------------------------------*/
cudaHostAlloc((void**)&chunk_1, granularity * 2, cudaHostAllocMapped);
cudaHostAlloc((void**)&chunk_2, granularity, cudaHostAllocMapped);
cudaFreeHost(chunk_1);
cudaHostAlloc((void**)&chunk_3, granularity, cudaHostAllocMapped);
break_07: __attribute__((unused));
cudaFreeHost(chunk_2);
cudaFreeHost(chunk_3);
// Expansion policy
/*----------------------------------------------------------------------------------------*/
int max_allocations = pool_size / granularity;
h_data_array = (char**) malloc(max_allocations * sizeof(char*));
cudaHostAlloc((void**)&h_data_array[0], granularity, cudaHostAllocMapped);
break_08: __attribute__((unused));
int index;
for(index = 1; index < max_allocations; index++)
{
cudaHostAlloc((void**)&h_data_array[index], granularity, cudaHostAllocMapped);
}
for(index = 0; index < max_allocations; index++)
{
cudaFreeHost(h_data_array[index]);
}
free(h_data_array);
// Pool usage
/*----------------------------------------------------------------------------------------*/
int quarter = pool_size / 4;
cudaHostAlloc((void**)&chunk_1, quarter, cudaHostAllocMapped);
cudaHostAlloc((void**)&chunk_2, quarter, cudaHostAllocMapped);
cudaHostAlloc((void**)&chunk_3, quarter, cudaHostAllocMapped);
cudaHostAlloc((void**)&chunk_4, quarter, cudaHostAllocMapped);
cudaHostAlloc((void**)&chunk_5, quarter, cudaHostAllocMapped);
cudaHostAlloc((void**)&chunk_6, quarter, cudaHostAllocMapped);
cudaHostAlloc((void**)&chunk_7, quarter, cudaHostAllocMapped);
cudaHostAlloc((void**)&chunk_8, quarter, cudaHostAllocMapped);
cudaHostAlloc((void**)&chunk_9, quarter, cudaHostAllocMapped);
cudaFreeHost(chunk_1);
cudaFreeHost(chunk_2);
cudaFreeHost(chunk_5);
cudaHostAlloc((void**)&chunk_10, quarter, cudaHostAllocMapped);
break_09: __attribute__((unused));
cudaFreeHost(chunk_10);
// Shrinking support
/*----------------------------------------------------------------------------------------*/
flag = 0;
break_10: __attribute__((unused));
cudaFreeHost(chunk_6);
cudaFreeHost(chunk_7);
cudaFreeHost(chunk_8);
flag = 1;
cudaFreeHost(chunk_9);
flag = 2;
cudaFreeHost(chunk_3);
cudaFreeHost(chunk_4);
// Finalization
/*----------------------------------------------------------------------------------------*/
cudaDeviceReset();
return 0;
} | code for sm_80
Function : _Z11emptyKernelv
.headerflags @"EF_CUDA_TEXMODE_UNIFIED EF_CUDA_64BIT_ADDRESS EF_CUDA_SM80 EF_CUDA_VIRTUAL_SM(EF_CUDA_SM80)"
/*0000*/ MOV R1, c[0x0][0x28] ; /* 0x00000a0000017a02 */
/* 0x000fe40000000f00 */
/*0010*/ EXIT ; /* 0x000000000000794d */
/* 0x000fea0003800000 */
/*0020*/ BRA 0x20; /* 0xfffffff000007947 */
/* 0x000fc0000383ffff */
/*0030*/ NOP; /* 0x0000000000007918 */
/* 0x000fc00000000000 */
/*0040*/ NOP; /* 0x0000000000007918 */
/* 0x000fc00000000000 */
/*0050*/ NOP; /* 0x0000000000007918 */
/* 0x000fc00000000000 */
/*0060*/ NOP; /* 0x0000000000007918 */
/* 0x000fc00000000000 */
/*0070*/ NOP; /* 0x0000000000007918 */
/* 0x000fc00000000000 */
/*0080*/ NOP; /* 0x0000000000007918 */
/* 0x000fc00000000000 */
/*0090*/ NOP; /* 0x0000000000007918 */
/* 0x000fc00000000000 */
/*00a0*/ NOP; /* 0x0000000000007918 */
/* 0x000fc00000000000 */
/*00b0*/ NOP; /* 0x0000000000007918 */
/* 0x000fc00000000000 */
/*00c0*/ NOP; /* 0x0000000000007918 */
/* 0x000fc00000000000 */
/*00d0*/ NOP; /* 0x0000000000007918 */
/* 0x000fc00000000000 */
/*00e0*/ NOP; /* 0x0000000000007918 */
/* 0x000fc00000000000 */
/*00f0*/ NOP; /* 0x0000000000007918 */
/* 0x000fc00000000000 */
.......... |
You are a helpful coding assistant specialized in converting CUDA source code to CUDA host assembly. | #include <stdio.h>
#include <stdlib.h>
__global__ void emptyKernel()
{
}
#define cudaCheck(ans) { gpuAssert((ans), __FILE__, __LINE__); }
inline void gpuAssert(cudaError_t code, const char *file, int line, bool abort=true)
{
if (code != cudaSuccess)
{
printf("CUDA error: %s - %s(%d)\n", cudaGetErrorString(code), file, line);
if (abort) exit(code);
}
}
int main(int argc, char* argv[])
{
// Initialization
/*----------------------------------------------------------------------------------------*/
int device = atoi(argv[1]);
cudaCheck(cudaSetDevice(device));
cudaSetDeviceFlags(cudaDeviceMapHost);
int runtime_version;
int driver_version;
cudaDeviceProp properties;
cudaGetDeviceProperties(&properties, device);
cudaRuntimeGetVersion(&runtime_version);
cudaDriverGetVersion(&driver_version);
emptyKernel<<<1,1>>>();
cudaDeviceSynchronize();
// Pool size
/*----------------------------------------------------------------------------------------*/
int pool_size = 1;
char *h_data;
break_01: __attribute__((unused));
cudaHostAlloc((void**)&h_data, 1, cudaHostAllocMapped);
cudaFreeHost(h_data);
// Maximum allocations and granularity
/*----------------------------------------------------------------------------------------*/
char **h_data_array = (char**) malloc(pool_size * sizeof(char*));
cudaHostAlloc((void**)&h_data_array[0], 1, cudaHostAllocMapped);
break_02: __attribute__((unused));
int granularity = 0, iteration = 0, flag = 0;
while(!flag && iteration < pool_size)
{
iteration++;
cudaHostAlloc((void**)&h_data_array[iteration], 1, cudaHostAllocMapped);
}
for(int i = 0; i <= iteration; i++)
{
cudaFreeHost(h_data_array[i]);
}
free(h_data_array);
// Size classes
/*----------------------------------------------------------------------------------------*/
char *h_data_inf, *h_data_sup;
int inf_size = granularity, sup_size = granularity, finished = 1, class_finished = 0;
break_03: __attribute__((unused));
cudaHostAlloc((void**)&h_data_inf, inf_size, cudaHostAllocMapped);
while(!finished)
{
sup_size = sup_size + granularity;
cudaHostAlloc((void**)&h_data_sup, sup_size, cudaHostAllocMapped);
cudaFreeHost(h_data_sup);
if(class_finished)
{
class_finished = 0;
cudaFreeHost(h_data_inf);
inf_size = sup_size;
cudaHostAlloc((void**)&h_data_inf, inf_size, cudaHostAllocMapped);
}
}
cudaFreeHost(h_data_inf);
// Larger allocations
/*----------------------------------------------------------------------------------------*/
break_04: __attribute__((unused));
cudaHostAlloc((void**)&h_data, pool_size + 1, cudaHostAllocMapped);
cudaFreeHost(h_data);
// Allocator policy
/*----------------------------------------------------------------------------------------*/
char *chunk_1, *chunk_2, *chunk_3, *chunk_4, *chunk_5, *chunk_6, *chunk_7, *chunk_8, *chunk_9, *chunk_10;
cudaHostAlloc((void**)&chunk_1, granularity * 2, cudaHostAllocMapped);
cudaHostAlloc((void**)&chunk_2, granularity, cudaHostAllocMapped);
cudaHostAlloc((void**)&chunk_3, granularity * 2, cudaHostAllocMapped);
cudaHostAlloc((void**)&chunk_4, granularity, cudaHostAllocMapped);
cudaHostAlloc((void**)&chunk_5, granularity, cudaHostAllocMapped);
cudaHostAlloc((void**)&chunk_6, granularity, cudaHostAllocMapped);
cudaFreeHost(chunk_1);
cudaFreeHost(chunk_3);
cudaFreeHost(chunk_5);
cudaHostAlloc((void**)&chunk_7, granularity, cudaHostAllocMapped);
cudaHostAlloc((void**)&chunk_8, granularity, cudaHostAllocMapped);
break_05: __attribute__((unused));
cudaFreeHost(chunk_2);
cudaFreeHost(chunk_4);
cudaFreeHost(chunk_6);
cudaFreeHost(chunk_7);
cudaFreeHost(chunk_8);
// Coalescing support
/*----------------------------------------------------------------------------------------*/
cudaHostAlloc((void**)&chunk_1, granularity, cudaHostAllocMapped);
cudaHostAlloc((void**)&chunk_2, granularity, cudaHostAllocMapped);
cudaHostAlloc((void**)&chunk_3, granularity, cudaHostAllocMapped);
cudaFreeHost(chunk_1);
cudaFreeHost(chunk_2);
cudaHostAlloc((void**)&chunk_4, granularity * 2, cudaHostAllocMapped);
break_06: __attribute__((unused));
cudaFreeHost(chunk_3);
cudaFreeHost(chunk_4);
// Splitting support
/*----------------------------------------------------------------------------------------*/
cudaHostAlloc((void**)&chunk_1, granularity * 2, cudaHostAllocMapped);
cudaHostAlloc((void**)&chunk_2, granularity, cudaHostAllocMapped);
cudaFreeHost(chunk_1);
cudaHostAlloc((void**)&chunk_3, granularity, cudaHostAllocMapped);
break_07: __attribute__((unused));
cudaFreeHost(chunk_2);
cudaFreeHost(chunk_3);
// Expansion policy
/*----------------------------------------------------------------------------------------*/
int max_allocations = pool_size / granularity;
h_data_array = (char**) malloc(max_allocations * sizeof(char*));
cudaHostAlloc((void**)&h_data_array[0], granularity, cudaHostAllocMapped);
break_08: __attribute__((unused));
int index;
for(index = 1; index < max_allocations; index++)
{
cudaHostAlloc((void**)&h_data_array[index], granularity, cudaHostAllocMapped);
}
for(index = 0; index < max_allocations; index++)
{
cudaFreeHost(h_data_array[index]);
}
free(h_data_array);
// Pool usage
/*----------------------------------------------------------------------------------------*/
int quarter = pool_size / 4;
cudaHostAlloc((void**)&chunk_1, quarter, cudaHostAllocMapped);
cudaHostAlloc((void**)&chunk_2, quarter, cudaHostAllocMapped);
cudaHostAlloc((void**)&chunk_3, quarter, cudaHostAllocMapped);
cudaHostAlloc((void**)&chunk_4, quarter, cudaHostAllocMapped);
cudaHostAlloc((void**)&chunk_5, quarter, cudaHostAllocMapped);
cudaHostAlloc((void**)&chunk_6, quarter, cudaHostAllocMapped);
cudaHostAlloc((void**)&chunk_7, quarter, cudaHostAllocMapped);
cudaHostAlloc((void**)&chunk_8, quarter, cudaHostAllocMapped);
cudaHostAlloc((void**)&chunk_9, quarter, cudaHostAllocMapped);
cudaFreeHost(chunk_1);
cudaFreeHost(chunk_2);
cudaFreeHost(chunk_5);
cudaHostAlloc((void**)&chunk_10, quarter, cudaHostAllocMapped);
break_09: __attribute__((unused));
cudaFreeHost(chunk_10);
// Shrinking support
/*----------------------------------------------------------------------------------------*/
flag = 0;
break_10: __attribute__((unused));
cudaFreeHost(chunk_6);
cudaFreeHost(chunk_7);
cudaFreeHost(chunk_8);
flag = 1;
cudaFreeHost(chunk_9);
flag = 2;
cudaFreeHost(chunk_3);
cudaFreeHost(chunk_4);
// Finalization
/*----------------------------------------------------------------------------------------*/
cudaDeviceReset();
return 0;
} | .file "tmpxft_000721c1_00000000-6_get_alloc_info.cudafe1.cpp"
.text
#APP
#NO_APP
.type _ZL26__cudaUnregisterBinaryUtilv, @function
_ZL26__cudaUnregisterBinaryUtilv:
.LFB2061:
.cfi_startproc
endbr64
subq $8, %rsp
.cfi_def_cfa_offset 16
movq _ZL20__cudaFatCubinHandle(%rip), %rdi
call __cudaUnregisterFatBinary@PLT
addq $8, %rsp
.cfi_def_cfa_offset 8
ret
.cfi_endproc
.LFE2061:
.size _ZL26__cudaUnregisterBinaryUtilv, .-_ZL26__cudaUnregisterBinaryUtilv
.globl _Z30__device_stub__Z11emptyKernelvv
.type _Z30__device_stub__Z11emptyKernelvv, @function
_Z30__device_stub__Z11emptyKernelvv:
.LFB2083:
.cfi_startproc
endbr64
subq $88, %rsp
.cfi_def_cfa_offset 96
movq %fs:40, %rax
movq %rax, 72(%rsp)
xorl %eax, %eax
movl $1, 16(%rsp)
movl $1, 20(%rsp)
movl $1, 24(%rsp)
movl $1, 28(%rsp)
movl $1, 32(%rsp)
movl $1, 36(%rsp)
leaq 8(%rsp), %rcx
movq %rsp, %rdx
leaq 28(%rsp), %rsi
leaq 16(%rsp), %rdi
call __cudaPopCallConfiguration@PLT
testl %eax, %eax
je .L7
.L3:
movq 72(%rsp), %rax
subq %fs:40, %rax
jne .L8
addq $88, %rsp
.cfi_remember_state
.cfi_def_cfa_offset 8
ret
.L7:
.cfi_restore_state
pushq 8(%rsp)
.cfi_def_cfa_offset 104
pushq 8(%rsp)
.cfi_def_cfa_offset 112
leaq 80(%rsp), %r9
movq 44(%rsp), %rcx
movl 52(%rsp), %r8d
movq 32(%rsp), %rsi
movl 40(%rsp), %edx
leaq _Z11emptyKernelv(%rip), %rdi
call cudaLaunchKernel@PLT
addq $16, %rsp
.cfi_def_cfa_offset 96
jmp .L3
.L8:
call __stack_chk_fail@PLT
.cfi_endproc
.LFE2083:
.size _Z30__device_stub__Z11emptyKernelvv, .-_Z30__device_stub__Z11emptyKernelvv
.globl _Z11emptyKernelv
.type _Z11emptyKernelv, @function
_Z11emptyKernelv:
.LFB2084:
.cfi_startproc
endbr64
subq $8, %rsp
.cfi_def_cfa_offset 16
call _Z30__device_stub__Z11emptyKernelvv
addq $8, %rsp
.cfi_def_cfa_offset 8
ret
.cfi_endproc
.LFE2084:
.size _Z11emptyKernelv, .-_Z11emptyKernelv
.section .rodata.str1.8,"aMS",@progbits,1
.align 8
.LC0:
.string "/home/ubuntu/Datasets/stackv2/train-structured/ajcalderont/gmai/master/CUDA/src/get_alloc_info.cu"
.section .rodata.str1.1,"aMS",@progbits,1
.LC1:
.string "CUDA error: %s - %s(%d)\n"
.text
.globl main
.type main, @function
main:
.LFB2058:
.cfi_startproc
endbr64
pushq %r13
.cfi_def_cfa_offset 16
.cfi_offset 13, -16
pushq %r12
.cfi_def_cfa_offset 24
.cfi_offset 12, -24
pushq %rbp
.cfi_def_cfa_offset 32
.cfi_offset 6, -32
pushq %rbx
.cfi_def_cfa_offset 40
.cfi_offset 3, -40
subq $1176, %rsp
.cfi_def_cfa_offset 1216
movq %fs:40, %rax
movq %rax, 1160(%rsp)
xorl %eax, %eax
movq 8(%rsi), %rdi
movl $10, %edx
movl $0, %esi
call __isoc23_strtol@PLT
movl %eax, %ebx
movl %eax, %edi
call cudaSetDevice@PLT
testl %eax, %eax
jne .L22
movl $8, %edi
call cudaSetDeviceFlags@PLT
leaq 128(%rsp), %rdi
movl %ebx, %esi
call cudaGetDeviceProperties_v2@PLT
leaq 8(%rsp), %rdi
call cudaRuntimeGetVersion@PLT
leaq 12(%rsp), %rdi
call cudaDriverGetVersion@PLT
movl $1, 112(%rsp)
movl $1, 116(%rsp)
movl $1, 120(%rsp)
movl $1, 96(%rsp)
movl $1, 100(%rsp)
movl $1, 104(%rsp)
movl $0, %r9d
movl $0, %r8d
movq 112(%rsp), %rdx
movl $1, %ecx
movq 96(%rsp), %rdi
movl $1, %esi
call __cudaPushCallConfiguration@PLT
testl %eax, %eax
jne .L13
call _Z30__device_stub__Z11emptyKernelvv
.L13:
call cudaDeviceSynchronize@PLT
leaq 16(%rsp), %rbp
movl $2, %edx
movl $1, %esi
movq %rbp, %rdi
call cudaHostAlloc@PLT
movq 16(%rsp), %rdi
call cudaFreeHost@PLT
movl $8, %edi
call malloc@PLT
movq %rax, %rbx
movl $2, %edx
movl $1, %esi
movq %rax, %rdi
call cudaHostAlloc@PLT
leaq 8(%rbx), %rdi
movl $2, %edx
movl $1, %esi
call cudaHostAlloc@PLT
movq (%rbx), %rdi
call cudaFreeHost@PLT
movq 8(%rbx), %rdi
call cudaFreeHost@PLT
movq %rbx, %rdi
call free@PLT
leaq 24(%rsp), %rdi
movl $2, %edx
movl $0, %esi
call cudaHostAlloc@PLT
movq 24(%rsp), %rdi
call cudaFreeHost@PLT
movl $2, %edx
movl $2, %esi
movq %rbp, %rdi
call cudaHostAlloc@PLT
movq 16(%rsp), %rdi
call cudaFreeHost@PLT
leaq 32(%rsp), %r12
movl $2, %edx
movl $0, %esi
movq %r12, %rdi
call cudaHostAlloc@PLT
leaq 40(%rsp), %rbp
movl $2, %edx
movl $0, %esi
movq %rbp, %rdi
call cudaHostAlloc@PLT
leaq 48(%rsp), %rbx
movl $2, %edx
movl $0, %esi
movq %rbx, %rdi
call cudaHostAlloc@PLT
leaq 56(%rsp), %r13
movl $2, %edx
movl $0, %esi
movq %r13, %rdi
call cudaHostAlloc@PLT
leaq 64(%rsp), %rdi
movl $2, %edx
movl $0, %esi
call cudaHostAlloc@PLT
leaq 72(%rsp), %rdi
movl $2, %edx
movl $0, %esi
call cudaHostAlloc@PLT
movq 32(%rsp), %rdi
call cudaFreeHost@PLT
movq 48(%rsp), %rdi
call cudaFreeHost@PLT
movq 64(%rsp), %rdi
call cudaFreeHost@PLT
leaq 80(%rsp), %rdi
movl $2, %edx
movl $0, %esi
call cudaHostAlloc@PLT
leaq 88(%rsp), %rdi
movl $2, %edx
movl $0, %esi
call cudaHostAlloc@PLT
movq 40(%rsp), %rdi
call cudaFreeHost@PLT
movq 56(%rsp), %rdi
call cudaFreeHost@PLT
movq 72(%rsp), %rdi
call cudaFreeHost@PLT
movq 80(%rsp), %rdi
call cudaFreeHost@PLT
movq 88(%rsp), %rdi
call cudaFreeHost@PLT
movl $2, %edx
movl $0, %esi
movq %r12, %rdi
call cudaHostAlloc@PLT
movl $2, %edx
movl $0, %esi
movq %rbp, %rdi
call cudaHostAlloc@PLT
movl $2, %edx
movl $0, %esi
movq %rbx, %rdi
call cudaHostAlloc@PLT
movq 32(%rsp), %rdi
call cudaFreeHost@PLT
movq 40(%rsp), %rdi
call cudaFreeHost@PLT
movl $2, %edx
movl $0, %esi
movq %r13, %rdi
call cudaHostAlloc@PLT
movq 48(%rsp), %rdi
call cudaFreeHost@PLT
movq 56(%rsp), %rdi
call cudaFreeHost@PLT
movl $2, %edx
movl $0, %esi
movq %r12, %rdi
call cudaHostAlloc@PLT
movl $2, %edx
movl $0, %esi
movq %rbp, %rdi
call cudaHostAlloc@PLT
movq 32(%rsp), %rdi
call cudaFreeHost@PLT
movl $2, %edx
movl $0, %esi
movq %rbx, %rdi
call cudaHostAlloc@PLT
movq 40(%rsp), %rdi
call cudaFreeHost@PLT
movq 48(%rsp), %rdi
call cudaFreeHost@PLT
movl $0, %ecx
movl $1, %eax
movl $0, %edx
idivl %ecx
movl %eax, %ebx
movslq %eax, %rbp
salq $3, %rbp
movq %rbp, %rdi
call malloc@PLT
movq %rax, %r12
movl $2, %edx
movl $0, %esi
movq %rax, %rdi
call cudaHostAlloc@PLT
testl %ebx, %ebx
jle .L16
movq %r12, %rbx
addq %r12, %rbp
.L17:
movq (%rbx), %rdi
call cudaFreeHost@PLT
addq $8, %rbx
cmpq %rbx, %rbp
jne .L17
.L16:
movq %r12, %rdi
call free@PLT
leaq 32(%rsp), %rdi
movl $2, %edx
movl $0, %esi
call cudaHostAlloc@PLT
leaq 40(%rsp), %rdi
movl $2, %edx
movl $0, %esi
call cudaHostAlloc@PLT
leaq 48(%rsp), %rdi
movl $2, %edx
movl $0, %esi
call cudaHostAlloc@PLT
leaq 56(%rsp), %rdi
movl $2, %edx
movl $0, %esi
call cudaHostAlloc@PLT
leaq 64(%rsp), %rdi
movl $2, %edx
movl $0, %esi
call cudaHostAlloc@PLT
leaq 72(%rsp), %rdi
movl $2, %edx
movl $0, %esi
call cudaHostAlloc@PLT
leaq 80(%rsp), %rdi
movl $2, %edx
movl $0, %esi
call cudaHostAlloc@PLT
leaq 88(%rsp), %rdi
movl $2, %edx
movl $0, %esi
call cudaHostAlloc@PLT
leaq 96(%rsp), %rdi
movl $2, %edx
movl $0, %esi
call cudaHostAlloc@PLT
movq 32(%rsp), %rdi
call cudaFreeHost@PLT
movq 40(%rsp), %rdi
call cudaFreeHost@PLT
movq 64(%rsp), %rdi
call cudaFreeHost@PLT
leaq 112(%rsp), %rdi
movl $2, %edx
movl $0, %esi
call cudaHostAlloc@PLT
movq 112(%rsp), %rdi
call cudaFreeHost@PLT
movq 72(%rsp), %rdi
call cudaFreeHost@PLT
movq 80(%rsp), %rdi
call cudaFreeHost@PLT
movq 88(%rsp), %rdi
call cudaFreeHost@PLT
movq 96(%rsp), %rdi
call cudaFreeHost@PLT
movq 48(%rsp), %rdi
call cudaFreeHost@PLT
movq 56(%rsp), %rdi
call cudaFreeHost@PLT
call cudaDeviceReset@PLT
movq 1160(%rsp), %rax
subq %fs:40, %rax
jne .L23
movl $0, %eax
addq $1176, %rsp
.cfi_remember_state
.cfi_def_cfa_offset 40
popq %rbx
.cfi_def_cfa_offset 32
popq %rbp
.cfi_def_cfa_offset 24
popq %r12
.cfi_def_cfa_offset 16
popq %r13
.cfi_def_cfa_offset 8
ret
.L22:
.cfi_restore_state
movl %eax, %ebp
movl %eax, %edi
call cudaGetErrorString@PLT
movq %rax, %rdx
movl $23, %r8d
leaq .LC0(%rip), %rcx
leaq .LC1(%rip), %rsi
movl $2, %edi
movl $0, %eax
call __printf_chk@PLT
movl %ebp, %edi
call exit@PLT
.L23:
call __stack_chk_fail@PLT
.cfi_endproc
.LFE2058:
.size main, .-main
.section .rodata.str1.1
.LC2:
.string "_Z11emptyKernelv"
.text
.type _ZL24__sti____cudaRegisterAllv, @function
_ZL24__sti____cudaRegisterAllv:
.LFB2086:
.cfi_startproc
endbr64
subq $8, %rsp
.cfi_def_cfa_offset 16
leaq _ZL15__fatDeviceText(%rip), %rdi
call __cudaRegisterFatBinary@PLT
movq %rax, %rdi
movq %rax, _ZL20__cudaFatCubinHandle(%rip)
pushq $0
.cfi_def_cfa_offset 24
pushq $0
.cfi_def_cfa_offset 32
pushq $0
.cfi_def_cfa_offset 40
pushq $0
.cfi_def_cfa_offset 48
movl $0, %r9d
movl $-1, %r8d
leaq .LC2(%rip), %rdx
movq %rdx, %rcx
leaq _Z11emptyKernelv(%rip), %rsi
call __cudaRegisterFunction@PLT
addq $32, %rsp
.cfi_def_cfa_offset 16
movq _ZL20__cudaFatCubinHandle(%rip), %rdi
call __cudaRegisterFatBinaryEnd@PLT
leaq _ZL26__cudaUnregisterBinaryUtilv(%rip), %rdi
call atexit@PLT
addq $8, %rsp
.cfi_def_cfa_offset 8
ret
.cfi_endproc
.LFE2086:
.size _ZL24__sti____cudaRegisterAllv, .-_ZL24__sti____cudaRegisterAllv
.section .init_array,"aw"
.align 8
.quad _ZL24__sti____cudaRegisterAllv
.section .nvFatBinSegment,"aw"
.align 8
.type _ZL15__fatDeviceText, @object
.size _ZL15__fatDeviceText, 24
_ZL15__fatDeviceText:
.long 1180844977
.long 1
.quad fatbinData
.quad 0
.local _ZL20__cudaFatCubinHandle
.comm _ZL20__cudaFatCubinHandle,8,8
.ident "GCC: (Ubuntu 13.3.0-6ubuntu2~24.04) 13.3.0"
.section .note.GNU-stack,"",@progbits
.section .note.gnu.property,"a"
.align 8
.long 1f - 0f
.long 4f - 1f
.long 5
0:
.string "GNU"
1:
.align 8
.long 0xc0000002
.long 3f - 2f
2:
.long 0x3
3:
.align 8
4: |
You are a helpful coding assistant specialized in converting CUDA source code to HIP/AMD source code. | #include <stdio.h>
#include <stdlib.h>
__global__ void emptyKernel()
{
}
#define cudaCheck(ans) { gpuAssert((ans), __FILE__, __LINE__); }
inline void gpuAssert(cudaError_t code, const char *file, int line, bool abort=true)
{
if (code != cudaSuccess)
{
printf("CUDA error: %s - %s(%d)\n", cudaGetErrorString(code), file, line);
if (abort) exit(code);
}
}
int main(int argc, char* argv[])
{
// Initialization
/*----------------------------------------------------------------------------------------*/
int device = atoi(argv[1]);
cudaCheck(cudaSetDevice(device));
cudaSetDeviceFlags(cudaDeviceMapHost);
int runtime_version;
int driver_version;
cudaDeviceProp properties;
cudaGetDeviceProperties(&properties, device);
cudaRuntimeGetVersion(&runtime_version);
cudaDriverGetVersion(&driver_version);
emptyKernel<<<1,1>>>();
cudaDeviceSynchronize();
// Pool size
/*----------------------------------------------------------------------------------------*/
int pool_size = 1;
char *h_data;
break_01: __attribute__((unused));
cudaHostAlloc((void**)&h_data, 1, cudaHostAllocMapped);
cudaFreeHost(h_data);
// Maximum allocations and granularity
/*----------------------------------------------------------------------------------------*/
char **h_data_array = (char**) malloc(pool_size * sizeof(char*));
cudaHostAlloc((void**)&h_data_array[0], 1, cudaHostAllocMapped);
break_02: __attribute__((unused));
int granularity = 0, iteration = 0, flag = 0;
while(!flag && iteration < pool_size)
{
iteration++;
cudaHostAlloc((void**)&h_data_array[iteration], 1, cudaHostAllocMapped);
}
for(int i = 0; i <= iteration; i++)
{
cudaFreeHost(h_data_array[i]);
}
free(h_data_array);
// Size classes
/*----------------------------------------------------------------------------------------*/
char *h_data_inf, *h_data_sup;
int inf_size = granularity, sup_size = granularity, finished = 1, class_finished = 0;
break_03: __attribute__((unused));
cudaHostAlloc((void**)&h_data_inf, inf_size, cudaHostAllocMapped);
while(!finished)
{
sup_size = sup_size + granularity;
cudaHostAlloc((void**)&h_data_sup, sup_size, cudaHostAllocMapped);
cudaFreeHost(h_data_sup);
if(class_finished)
{
class_finished = 0;
cudaFreeHost(h_data_inf);
inf_size = sup_size;
cudaHostAlloc((void**)&h_data_inf, inf_size, cudaHostAllocMapped);
}
}
cudaFreeHost(h_data_inf);
// Larger allocations
/*----------------------------------------------------------------------------------------*/
break_04: __attribute__((unused));
cudaHostAlloc((void**)&h_data, pool_size + 1, cudaHostAllocMapped);
cudaFreeHost(h_data);
// Allocator policy
/*----------------------------------------------------------------------------------------*/
char *chunk_1, *chunk_2, *chunk_3, *chunk_4, *chunk_5, *chunk_6, *chunk_7, *chunk_8, *chunk_9, *chunk_10;
cudaHostAlloc((void**)&chunk_1, granularity * 2, cudaHostAllocMapped);
cudaHostAlloc((void**)&chunk_2, granularity, cudaHostAllocMapped);
cudaHostAlloc((void**)&chunk_3, granularity * 2, cudaHostAllocMapped);
cudaHostAlloc((void**)&chunk_4, granularity, cudaHostAllocMapped);
cudaHostAlloc((void**)&chunk_5, granularity, cudaHostAllocMapped);
cudaHostAlloc((void**)&chunk_6, granularity, cudaHostAllocMapped);
cudaFreeHost(chunk_1);
cudaFreeHost(chunk_3);
cudaFreeHost(chunk_5);
cudaHostAlloc((void**)&chunk_7, granularity, cudaHostAllocMapped);
cudaHostAlloc((void**)&chunk_8, granularity, cudaHostAllocMapped);
break_05: __attribute__((unused));
cudaFreeHost(chunk_2);
cudaFreeHost(chunk_4);
cudaFreeHost(chunk_6);
cudaFreeHost(chunk_7);
cudaFreeHost(chunk_8);
// Coalescing support
/*----------------------------------------------------------------------------------------*/
cudaHostAlloc((void**)&chunk_1, granularity, cudaHostAllocMapped);
cudaHostAlloc((void**)&chunk_2, granularity, cudaHostAllocMapped);
cudaHostAlloc((void**)&chunk_3, granularity, cudaHostAllocMapped);
cudaFreeHost(chunk_1);
cudaFreeHost(chunk_2);
cudaHostAlloc((void**)&chunk_4, granularity * 2, cudaHostAllocMapped);
break_06: __attribute__((unused));
cudaFreeHost(chunk_3);
cudaFreeHost(chunk_4);
// Splitting support
/*----------------------------------------------------------------------------------------*/
cudaHostAlloc((void**)&chunk_1, granularity * 2, cudaHostAllocMapped);
cudaHostAlloc((void**)&chunk_2, granularity, cudaHostAllocMapped);
cudaFreeHost(chunk_1);
cudaHostAlloc((void**)&chunk_3, granularity, cudaHostAllocMapped);
break_07: __attribute__((unused));
cudaFreeHost(chunk_2);
cudaFreeHost(chunk_3);
// Expansion policy
/*----------------------------------------------------------------------------------------*/
int max_allocations = pool_size / granularity;
h_data_array = (char**) malloc(max_allocations * sizeof(char*));
cudaHostAlloc((void**)&h_data_array[0], granularity, cudaHostAllocMapped);
break_08: __attribute__((unused));
int index;
for(index = 1; index < max_allocations; index++)
{
cudaHostAlloc((void**)&h_data_array[index], granularity, cudaHostAllocMapped);
}
for(index = 0; index < max_allocations; index++)
{
cudaFreeHost(h_data_array[index]);
}
free(h_data_array);
// Pool usage
/*----------------------------------------------------------------------------------------*/
int quarter = pool_size / 4;
cudaHostAlloc((void**)&chunk_1, quarter, cudaHostAllocMapped);
cudaHostAlloc((void**)&chunk_2, quarter, cudaHostAllocMapped);
cudaHostAlloc((void**)&chunk_3, quarter, cudaHostAllocMapped);
cudaHostAlloc((void**)&chunk_4, quarter, cudaHostAllocMapped);
cudaHostAlloc((void**)&chunk_5, quarter, cudaHostAllocMapped);
cudaHostAlloc((void**)&chunk_6, quarter, cudaHostAllocMapped);
cudaHostAlloc((void**)&chunk_7, quarter, cudaHostAllocMapped);
cudaHostAlloc((void**)&chunk_8, quarter, cudaHostAllocMapped);
cudaHostAlloc((void**)&chunk_9, quarter, cudaHostAllocMapped);
cudaFreeHost(chunk_1);
cudaFreeHost(chunk_2);
cudaFreeHost(chunk_5);
cudaHostAlloc((void**)&chunk_10, quarter, cudaHostAllocMapped);
break_09: __attribute__((unused));
cudaFreeHost(chunk_10);
// Shrinking support
/*----------------------------------------------------------------------------------------*/
flag = 0;
break_10: __attribute__((unused));
cudaFreeHost(chunk_6);
cudaFreeHost(chunk_7);
cudaFreeHost(chunk_8);
flag = 1;
cudaFreeHost(chunk_9);
flag = 2;
cudaFreeHost(chunk_3);
cudaFreeHost(chunk_4);
// Finalization
/*----------------------------------------------------------------------------------------*/
cudaDeviceReset();
return 0;
} | #include <hip/hip_runtime.h>
#include <stdio.h>
#include <stdlib.h>
__global__ void emptyKernel()
{
}
#define cudaCheck(ans) { gpuAssert((ans), __FILE__, __LINE__); }
inline void gpuAssert(hipError_t code, const char *file, int line, bool abort=true)
{
if (code != hipSuccess)
{
printf("CUDA error: %s - %s(%d)\n", hipGetErrorString(code), file, line);
if (abort) exit(code);
}
}
int main(int argc, char* argv[])
{
// Initialization
/*----------------------------------------------------------------------------------------*/
int device = atoi(argv[1]);
cudaCheck(hipSetDevice(device));
hipSetDeviceFlags(hipDeviceMapHost);
int runtime_version;
int driver_version;
hipDeviceProp_t properties;
hipGetDeviceProperties(&properties, device);
hipRuntimeGetVersion(&runtime_version);
hipDriverGetVersion(&driver_version);
emptyKernel<<<1,1>>>();
hipDeviceSynchronize();
// Pool size
/*----------------------------------------------------------------------------------------*/
int pool_size = 1;
char *h_data;
break_01: __attribute__((unused));
hipHostAlloc((void**)&h_data, 1, hipHostMallocMapped);
hipHostFree(h_data);
// Maximum allocations and granularity
/*----------------------------------------------------------------------------------------*/
char **h_data_array = (char**) malloc(pool_size * sizeof(char*));
hipHostAlloc((void**)&h_data_array[0], 1, hipHostMallocMapped);
break_02: __attribute__((unused));
int granularity = 0, iteration = 0, flag = 0;
while(!flag && iteration < pool_size)
{
iteration++;
hipHostAlloc((void**)&h_data_array[iteration], 1, hipHostMallocMapped);
}
for(int i = 0; i <= iteration; i++)
{
hipHostFree(h_data_array[i]);
}
free(h_data_array);
// Size classes
/*----------------------------------------------------------------------------------------*/
char *h_data_inf, *h_data_sup;
int inf_size = granularity, sup_size = granularity, finished = 1, class_finished = 0;
break_03: __attribute__((unused));
hipHostAlloc((void**)&h_data_inf, inf_size, hipHostMallocMapped);
while(!finished)
{
sup_size = sup_size + granularity;
hipHostAlloc((void**)&h_data_sup, sup_size, hipHostMallocMapped);
hipHostFree(h_data_sup);
if(class_finished)
{
class_finished = 0;
hipHostFree(h_data_inf);
inf_size = sup_size;
hipHostAlloc((void**)&h_data_inf, inf_size, hipHostMallocMapped);
}
}
hipHostFree(h_data_inf);
// Larger allocations
/*----------------------------------------------------------------------------------------*/
break_04: __attribute__((unused));
hipHostAlloc((void**)&h_data, pool_size + 1, hipHostMallocMapped);
hipHostFree(h_data);
// Allocator policy
/*----------------------------------------------------------------------------------------*/
char *chunk_1, *chunk_2, *chunk_3, *chunk_4, *chunk_5, *chunk_6, *chunk_7, *chunk_8, *chunk_9, *chunk_10;
hipHostAlloc((void**)&chunk_1, granularity * 2, hipHostMallocMapped);
hipHostAlloc((void**)&chunk_2, granularity, hipHostMallocMapped);
hipHostAlloc((void**)&chunk_3, granularity * 2, hipHostMallocMapped);
hipHostAlloc((void**)&chunk_4, granularity, hipHostMallocMapped);
hipHostAlloc((void**)&chunk_5, granularity, hipHostMallocMapped);
hipHostAlloc((void**)&chunk_6, granularity, hipHostMallocMapped);
hipHostFree(chunk_1);
hipHostFree(chunk_3);
hipHostFree(chunk_5);
hipHostAlloc((void**)&chunk_7, granularity, hipHostMallocMapped);
hipHostAlloc((void**)&chunk_8, granularity, hipHostMallocMapped);
break_05: __attribute__((unused));
hipHostFree(chunk_2);
hipHostFree(chunk_4);
hipHostFree(chunk_6);
hipHostFree(chunk_7);
hipHostFree(chunk_8);
// Coalescing support
/*----------------------------------------------------------------------------------------*/
hipHostAlloc((void**)&chunk_1, granularity, hipHostMallocMapped);
hipHostAlloc((void**)&chunk_2, granularity, hipHostMallocMapped);
hipHostAlloc((void**)&chunk_3, granularity, hipHostMallocMapped);
hipHostFree(chunk_1);
hipHostFree(chunk_2);
hipHostAlloc((void**)&chunk_4, granularity * 2, hipHostMallocMapped);
break_06: __attribute__((unused));
hipHostFree(chunk_3);
hipHostFree(chunk_4);
// Splitting support
/*----------------------------------------------------------------------------------------*/
hipHostAlloc((void**)&chunk_1, granularity * 2, hipHostMallocMapped);
hipHostAlloc((void**)&chunk_2, granularity, hipHostMallocMapped);
hipHostFree(chunk_1);
hipHostAlloc((void**)&chunk_3, granularity, hipHostMallocMapped);
break_07: __attribute__((unused));
hipHostFree(chunk_2);
hipHostFree(chunk_3);
// Expansion policy
/*----------------------------------------------------------------------------------------*/
int max_allocations = pool_size / granularity;
h_data_array = (char**) malloc(max_allocations * sizeof(char*));
hipHostAlloc((void**)&h_data_array[0], granularity, hipHostMallocMapped);
break_08: __attribute__((unused));
int index;
for(index = 1; index < max_allocations; index++)
{
hipHostAlloc((void**)&h_data_array[index], granularity, hipHostMallocMapped);
}
for(index = 0; index < max_allocations; index++)
{
hipHostFree(h_data_array[index]);
}
free(h_data_array);
// Pool usage
/*----------------------------------------------------------------------------------------*/
int quarter = pool_size / 4;
hipHostAlloc((void**)&chunk_1, quarter, hipHostMallocMapped);
hipHostAlloc((void**)&chunk_2, quarter, hipHostMallocMapped);
hipHostAlloc((void**)&chunk_3, quarter, hipHostMallocMapped);
hipHostAlloc((void**)&chunk_4, quarter, hipHostMallocMapped);
hipHostAlloc((void**)&chunk_5, quarter, hipHostMallocMapped);
hipHostAlloc((void**)&chunk_6, quarter, hipHostMallocMapped);
hipHostAlloc((void**)&chunk_7, quarter, hipHostMallocMapped);
hipHostAlloc((void**)&chunk_8, quarter, hipHostMallocMapped);
hipHostAlloc((void**)&chunk_9, quarter, hipHostMallocMapped);
hipHostFree(chunk_1);
hipHostFree(chunk_2);
hipHostFree(chunk_5);
hipHostAlloc((void**)&chunk_10, quarter, hipHostMallocMapped);
break_09: __attribute__((unused));
hipHostFree(chunk_10);
// Shrinking support
/*----------------------------------------------------------------------------------------*/
flag = 0;
break_10: __attribute__((unused));
hipHostFree(chunk_6);
hipHostFree(chunk_7);
hipHostFree(chunk_8);
flag = 1;
hipHostFree(chunk_9);
flag = 2;
hipHostFree(chunk_3);
hipHostFree(chunk_4);
// Finalization
/*----------------------------------------------------------------------------------------*/
hipDeviceReset();
return 0;
} |
You are a helpful coding assistant specialized in converting HIP source code to AMD device assembly. | #include <hip/hip_runtime.h>
#include <stdio.h>
#include <stdlib.h>
__global__ void emptyKernel()
{
}
#define cudaCheck(ans) { gpuAssert((ans), __FILE__, __LINE__); }
inline void gpuAssert(hipError_t code, const char *file, int line, bool abort=true)
{
if (code != hipSuccess)
{
printf("CUDA error: %s - %s(%d)\n", hipGetErrorString(code), file, line);
if (abort) exit(code);
}
}
int main(int argc, char* argv[])
{
// Initialization
/*----------------------------------------------------------------------------------------*/
int device = atoi(argv[1]);
cudaCheck(hipSetDevice(device));
hipSetDeviceFlags(hipDeviceMapHost);
int runtime_version;
int driver_version;
hipDeviceProp_t properties;
hipGetDeviceProperties(&properties, device);
hipRuntimeGetVersion(&runtime_version);
hipDriverGetVersion(&driver_version);
emptyKernel<<<1,1>>>();
hipDeviceSynchronize();
// Pool size
/*----------------------------------------------------------------------------------------*/
int pool_size = 1;
char *h_data;
break_01: __attribute__((unused));
hipHostAlloc((void**)&h_data, 1, hipHostMallocMapped);
hipHostFree(h_data);
// Maximum allocations and granularity
/*----------------------------------------------------------------------------------------*/
char **h_data_array = (char**) malloc(pool_size * sizeof(char*));
hipHostAlloc((void**)&h_data_array[0], 1, hipHostMallocMapped);
break_02: __attribute__((unused));
int granularity = 0, iteration = 0, flag = 0;
while(!flag && iteration < pool_size)
{
iteration++;
hipHostAlloc((void**)&h_data_array[iteration], 1, hipHostMallocMapped);
}
for(int i = 0; i <= iteration; i++)
{
hipHostFree(h_data_array[i]);
}
free(h_data_array);
// Size classes
/*----------------------------------------------------------------------------------------*/
char *h_data_inf, *h_data_sup;
int inf_size = granularity, sup_size = granularity, finished = 1, class_finished = 0;
break_03: __attribute__((unused));
hipHostAlloc((void**)&h_data_inf, inf_size, hipHostMallocMapped);
while(!finished)
{
sup_size = sup_size + granularity;
hipHostAlloc((void**)&h_data_sup, sup_size, hipHostMallocMapped);
hipHostFree(h_data_sup);
if(class_finished)
{
class_finished = 0;
hipHostFree(h_data_inf);
inf_size = sup_size;
hipHostAlloc((void**)&h_data_inf, inf_size, hipHostMallocMapped);
}
}
hipHostFree(h_data_inf);
// Larger allocations
/*----------------------------------------------------------------------------------------*/
break_04: __attribute__((unused));
hipHostAlloc((void**)&h_data, pool_size + 1, hipHostMallocMapped);
hipHostFree(h_data);
// Allocator policy
/*----------------------------------------------------------------------------------------*/
char *chunk_1, *chunk_2, *chunk_3, *chunk_4, *chunk_5, *chunk_6, *chunk_7, *chunk_8, *chunk_9, *chunk_10;
hipHostAlloc((void**)&chunk_1, granularity * 2, hipHostMallocMapped);
hipHostAlloc((void**)&chunk_2, granularity, hipHostMallocMapped);
hipHostAlloc((void**)&chunk_3, granularity * 2, hipHostMallocMapped);
hipHostAlloc((void**)&chunk_4, granularity, hipHostMallocMapped);
hipHostAlloc((void**)&chunk_5, granularity, hipHostMallocMapped);
hipHostAlloc((void**)&chunk_6, granularity, hipHostMallocMapped);
hipHostFree(chunk_1);
hipHostFree(chunk_3);
hipHostFree(chunk_5);
hipHostAlloc((void**)&chunk_7, granularity, hipHostMallocMapped);
hipHostAlloc((void**)&chunk_8, granularity, hipHostMallocMapped);
break_05: __attribute__((unused));
hipHostFree(chunk_2);
hipHostFree(chunk_4);
hipHostFree(chunk_6);
hipHostFree(chunk_7);
hipHostFree(chunk_8);
// Coalescing support
/*----------------------------------------------------------------------------------------*/
hipHostAlloc((void**)&chunk_1, granularity, hipHostMallocMapped);
hipHostAlloc((void**)&chunk_2, granularity, hipHostMallocMapped);
hipHostAlloc((void**)&chunk_3, granularity, hipHostMallocMapped);
hipHostFree(chunk_1);
hipHostFree(chunk_2);
hipHostAlloc((void**)&chunk_4, granularity * 2, hipHostMallocMapped);
break_06: __attribute__((unused));
hipHostFree(chunk_3);
hipHostFree(chunk_4);
// Splitting support
/*----------------------------------------------------------------------------------------*/
hipHostAlloc((void**)&chunk_1, granularity * 2, hipHostMallocMapped);
hipHostAlloc((void**)&chunk_2, granularity, hipHostMallocMapped);
hipHostFree(chunk_1);
hipHostAlloc((void**)&chunk_3, granularity, hipHostMallocMapped);
break_07: __attribute__((unused));
hipHostFree(chunk_2);
hipHostFree(chunk_3);
// Expansion policy
/*----------------------------------------------------------------------------------------*/
int max_allocations = pool_size / granularity;
h_data_array = (char**) malloc(max_allocations * sizeof(char*));
hipHostAlloc((void**)&h_data_array[0], granularity, hipHostMallocMapped);
break_08: __attribute__((unused));
int index;
for(index = 1; index < max_allocations; index++)
{
hipHostAlloc((void**)&h_data_array[index], granularity, hipHostMallocMapped);
}
for(index = 0; index < max_allocations; index++)
{
hipHostFree(h_data_array[index]);
}
free(h_data_array);
// Pool usage
/*----------------------------------------------------------------------------------------*/
int quarter = pool_size / 4;
hipHostAlloc((void**)&chunk_1, quarter, hipHostMallocMapped);
hipHostAlloc((void**)&chunk_2, quarter, hipHostMallocMapped);
hipHostAlloc((void**)&chunk_3, quarter, hipHostMallocMapped);
hipHostAlloc((void**)&chunk_4, quarter, hipHostMallocMapped);
hipHostAlloc((void**)&chunk_5, quarter, hipHostMallocMapped);
hipHostAlloc((void**)&chunk_6, quarter, hipHostMallocMapped);
hipHostAlloc((void**)&chunk_7, quarter, hipHostMallocMapped);
hipHostAlloc((void**)&chunk_8, quarter, hipHostMallocMapped);
hipHostAlloc((void**)&chunk_9, quarter, hipHostMallocMapped);
hipHostFree(chunk_1);
hipHostFree(chunk_2);
hipHostFree(chunk_5);
hipHostAlloc((void**)&chunk_10, quarter, hipHostMallocMapped);
break_09: __attribute__((unused));
hipHostFree(chunk_10);
// Shrinking support
/*----------------------------------------------------------------------------------------*/
flag = 0;
break_10: __attribute__((unused));
hipHostFree(chunk_6);
hipHostFree(chunk_7);
hipHostFree(chunk_8);
flag = 1;
hipHostFree(chunk_9);
flag = 2;
hipHostFree(chunk_3);
hipHostFree(chunk_4);
// Finalization
/*----------------------------------------------------------------------------------------*/
hipDeviceReset();
return 0;
} | .text
.amdgcn_target "amdgcn-amd-amdhsa--gfx1100"
.protected _Z11emptyKernelv
.globl _Z11emptyKernelv
.p2align 8
.type _Z11emptyKernelv,@function
_Z11emptyKernelv:
s_endpgm
.section .rodata,"a",@progbits
.p2align 6, 0x0
.amdhsa_kernel _Z11emptyKernelv
.amdhsa_group_segment_fixed_size 0
.amdhsa_private_segment_fixed_size 0
.amdhsa_kernarg_size 0
.amdhsa_user_sgpr_count 15
.amdhsa_user_sgpr_dispatch_ptr 0
.amdhsa_user_sgpr_queue_ptr 0
.amdhsa_user_sgpr_kernarg_segment_ptr 0
.amdhsa_user_sgpr_dispatch_id 0
.amdhsa_user_sgpr_private_segment_size 0
.amdhsa_wavefront_size32 1
.amdhsa_uses_dynamic_stack 0
.amdhsa_enable_private_segment 0
.amdhsa_system_sgpr_workgroup_id_x 1
.amdhsa_system_sgpr_workgroup_id_y 0
.amdhsa_system_sgpr_workgroup_id_z 0
.amdhsa_system_sgpr_workgroup_info 0
.amdhsa_system_vgpr_workitem_id 0
.amdhsa_next_free_vgpr 1
.amdhsa_next_free_sgpr 1
.amdhsa_reserve_vcc 0
.amdhsa_float_round_mode_32 0
.amdhsa_float_round_mode_16_64 0
.amdhsa_float_denorm_mode_32 3
.amdhsa_float_denorm_mode_16_64 3
.amdhsa_dx10_clamp 1
.amdhsa_ieee_mode 1
.amdhsa_fp16_overflow 0
.amdhsa_workgroup_processor_mode 1
.amdhsa_memory_ordered 1
.amdhsa_forward_progress 0
.amdhsa_shared_vgpr_count 0
.amdhsa_exception_fp_ieee_invalid_op 0
.amdhsa_exception_fp_denorm_src 0
.amdhsa_exception_fp_ieee_div_zero 0
.amdhsa_exception_fp_ieee_overflow 0
.amdhsa_exception_fp_ieee_underflow 0
.amdhsa_exception_fp_ieee_inexact 0
.amdhsa_exception_int_div_zero 0
.end_amdhsa_kernel
.text
.Lfunc_end0:
.size _Z11emptyKernelv, .Lfunc_end0-_Z11emptyKernelv
.section .AMDGPU.csdata,"",@progbits
.text
.p2alignl 7, 3214868480
.fill 96, 4, 3214868480
.type __hip_cuid_,@object
.section .bss,"aw",@nobits
.globl __hip_cuid_
__hip_cuid_:
.byte 0
.size __hip_cuid_, 1
.ident "AMD clang version 18.0.0git (https://github.com/RadeonOpenCompute/llvm-project roc-6.3.2 25012 e5bf7e55c91490b07c49d8960fa7983d864936c4)"
.section ".note.GNU-stack","",@progbits
.addrsig
.addrsig_sym __hip_cuid_
.amdgpu_metadata
---
amdhsa.kernels:
- .args: []
.group_segment_fixed_size: 0
.kernarg_segment_align: 4
.kernarg_segment_size: 0
.language: OpenCL C
.language_version:
- 2
- 0
.max_flat_workgroup_size: 1024
.name: _Z11emptyKernelv
.private_segment_fixed_size: 0
.sgpr_count: 0
.sgpr_spill_count: 0
.symbol: _Z11emptyKernelv.kd
.uniform_work_group_size: 1
.uses_dynamic_stack: false
.vgpr_count: 0
.vgpr_spill_count: 0
.wavefront_size: 32
.workgroup_processor_mode: 1
amdhsa.target: amdgcn-amd-amdhsa--gfx1100
amdhsa.version:
- 1
- 2
...
.end_amdgpu_metadata |
You are a helpful coding assistant specialized in converting HIP source code to AMD host assembly. | #include <hip/hip_runtime.h>
#include <stdio.h>
#include <stdlib.h>
__global__ void emptyKernel()
{
}
#define cudaCheck(ans) { gpuAssert((ans), __FILE__, __LINE__); }
inline void gpuAssert(hipError_t code, const char *file, int line, bool abort=true)
{
if (code != hipSuccess)
{
printf("CUDA error: %s - %s(%d)\n", hipGetErrorString(code), file, line);
if (abort) exit(code);
}
}
int main(int argc, char* argv[])
{
// Initialization
/*----------------------------------------------------------------------------------------*/
int device = atoi(argv[1]);
cudaCheck(hipSetDevice(device));
hipSetDeviceFlags(hipDeviceMapHost);
int runtime_version;
int driver_version;
hipDeviceProp_t properties;
hipGetDeviceProperties(&properties, device);
hipRuntimeGetVersion(&runtime_version);
hipDriverGetVersion(&driver_version);
emptyKernel<<<1,1>>>();
hipDeviceSynchronize();
// Pool size
/*----------------------------------------------------------------------------------------*/
int pool_size = 1;
char *h_data;
break_01: __attribute__((unused));
hipHostAlloc((void**)&h_data, 1, hipHostMallocMapped);
hipHostFree(h_data);
// Maximum allocations and granularity
/*----------------------------------------------------------------------------------------*/
char **h_data_array = (char**) malloc(pool_size * sizeof(char*));
hipHostAlloc((void**)&h_data_array[0], 1, hipHostMallocMapped);
break_02: __attribute__((unused));
int granularity = 0, iteration = 0, flag = 0;
while(!flag && iteration < pool_size)
{
iteration++;
hipHostAlloc((void**)&h_data_array[iteration], 1, hipHostMallocMapped);
}
for(int i = 0; i <= iteration; i++)
{
hipHostFree(h_data_array[i]);
}
free(h_data_array);
// Size classes
/*----------------------------------------------------------------------------------------*/
char *h_data_inf, *h_data_sup;
int inf_size = granularity, sup_size = granularity, finished = 1, class_finished = 0;
break_03: __attribute__((unused));
hipHostAlloc((void**)&h_data_inf, inf_size, hipHostMallocMapped);
while(!finished)
{
sup_size = sup_size + granularity;
hipHostAlloc((void**)&h_data_sup, sup_size, hipHostMallocMapped);
hipHostFree(h_data_sup);
if(class_finished)
{
class_finished = 0;
hipHostFree(h_data_inf);
inf_size = sup_size;
hipHostAlloc((void**)&h_data_inf, inf_size, hipHostMallocMapped);
}
}
hipHostFree(h_data_inf);
// Larger allocations
/*----------------------------------------------------------------------------------------*/
break_04: __attribute__((unused));
hipHostAlloc((void**)&h_data, pool_size + 1, hipHostMallocMapped);
hipHostFree(h_data);
// Allocator policy
/*----------------------------------------------------------------------------------------*/
char *chunk_1, *chunk_2, *chunk_3, *chunk_4, *chunk_5, *chunk_6, *chunk_7, *chunk_8, *chunk_9, *chunk_10;
hipHostAlloc((void**)&chunk_1, granularity * 2, hipHostMallocMapped);
hipHostAlloc((void**)&chunk_2, granularity, hipHostMallocMapped);
hipHostAlloc((void**)&chunk_3, granularity * 2, hipHostMallocMapped);
hipHostAlloc((void**)&chunk_4, granularity, hipHostMallocMapped);
hipHostAlloc((void**)&chunk_5, granularity, hipHostMallocMapped);
hipHostAlloc((void**)&chunk_6, granularity, hipHostMallocMapped);
hipHostFree(chunk_1);
hipHostFree(chunk_3);
hipHostFree(chunk_5);
hipHostAlloc((void**)&chunk_7, granularity, hipHostMallocMapped);
hipHostAlloc((void**)&chunk_8, granularity, hipHostMallocMapped);
break_05: __attribute__((unused));
hipHostFree(chunk_2);
hipHostFree(chunk_4);
hipHostFree(chunk_6);
hipHostFree(chunk_7);
hipHostFree(chunk_8);
// Coalescing support
/*----------------------------------------------------------------------------------------*/
hipHostAlloc((void**)&chunk_1, granularity, hipHostMallocMapped);
hipHostAlloc((void**)&chunk_2, granularity, hipHostMallocMapped);
hipHostAlloc((void**)&chunk_3, granularity, hipHostMallocMapped);
hipHostFree(chunk_1);
hipHostFree(chunk_2);
hipHostAlloc((void**)&chunk_4, granularity * 2, hipHostMallocMapped);
break_06: __attribute__((unused));
hipHostFree(chunk_3);
hipHostFree(chunk_4);
// Splitting support
/*----------------------------------------------------------------------------------------*/
hipHostAlloc((void**)&chunk_1, granularity * 2, hipHostMallocMapped);
hipHostAlloc((void**)&chunk_2, granularity, hipHostMallocMapped);
hipHostFree(chunk_1);
hipHostAlloc((void**)&chunk_3, granularity, hipHostMallocMapped);
break_07: __attribute__((unused));
hipHostFree(chunk_2);
hipHostFree(chunk_3);
// Expansion policy
/*----------------------------------------------------------------------------------------*/
int max_allocations = pool_size / granularity;
h_data_array = (char**) malloc(max_allocations * sizeof(char*));
hipHostAlloc((void**)&h_data_array[0], granularity, hipHostMallocMapped);
break_08: __attribute__((unused));
int index;
for(index = 1; index < max_allocations; index++)
{
hipHostAlloc((void**)&h_data_array[index], granularity, hipHostMallocMapped);
}
for(index = 0; index < max_allocations; index++)
{
hipHostFree(h_data_array[index]);
}
free(h_data_array);
// Pool usage
/*----------------------------------------------------------------------------------------*/
int quarter = pool_size / 4;
hipHostAlloc((void**)&chunk_1, quarter, hipHostMallocMapped);
hipHostAlloc((void**)&chunk_2, quarter, hipHostMallocMapped);
hipHostAlloc((void**)&chunk_3, quarter, hipHostMallocMapped);
hipHostAlloc((void**)&chunk_4, quarter, hipHostMallocMapped);
hipHostAlloc((void**)&chunk_5, quarter, hipHostMallocMapped);
hipHostAlloc((void**)&chunk_6, quarter, hipHostMallocMapped);
hipHostAlloc((void**)&chunk_7, quarter, hipHostMallocMapped);
hipHostAlloc((void**)&chunk_8, quarter, hipHostMallocMapped);
hipHostAlloc((void**)&chunk_9, quarter, hipHostMallocMapped);
hipHostFree(chunk_1);
hipHostFree(chunk_2);
hipHostFree(chunk_5);
hipHostAlloc((void**)&chunk_10, quarter, hipHostMallocMapped);
break_09: __attribute__((unused));
hipHostFree(chunk_10);
// Shrinking support
/*----------------------------------------------------------------------------------------*/
flag = 0;
break_10: __attribute__((unused));
hipHostFree(chunk_6);
hipHostFree(chunk_7);
hipHostFree(chunk_8);
flag = 1;
hipHostFree(chunk_9);
flag = 2;
hipHostFree(chunk_3);
hipHostFree(chunk_4);
// Finalization
/*----------------------------------------------------------------------------------------*/
hipDeviceReset();
return 0;
} | .text
.file "get_alloc_info.hip"
.globl _Z26__device_stub__emptyKernelv # -- Begin function _Z26__device_stub__emptyKernelv
.p2align 4, 0x90
.type _Z26__device_stub__emptyKernelv,@function
_Z26__device_stub__emptyKernelv: # @_Z26__device_stub__emptyKernelv
.cfi_startproc
# %bb.0:
subq $56, %rsp
.cfi_def_cfa_offset 64
leaq 32(%rsp), %rdi
leaq 16(%rsp), %rsi
leaq 8(%rsp), %rdx
movq %rsp, %rcx
callq __hipPopCallConfiguration
movq 32(%rsp), %rsi
movl 40(%rsp), %edx
movq 16(%rsp), %rcx
movl 24(%rsp), %r8d
leaq 48(%rsp), %r9
movl $_Z11emptyKernelv, %edi
pushq (%rsp)
.cfi_adjust_cfa_offset 8
pushq 16(%rsp)
.cfi_adjust_cfa_offset 8
callq hipLaunchKernel
addq $72, %rsp
.cfi_adjust_cfa_offset -72
retq
.Lfunc_end0:
.size _Z26__device_stub__emptyKernelv, .Lfunc_end0-_Z26__device_stub__emptyKernelv
.cfi_endproc
# -- End function
.globl main # -- Begin function main
.p2align 4, 0x90
.type main,@function
main: # @main
.cfi_startproc
# %bb.0:
pushq %r15
.cfi_def_cfa_offset 16
pushq %r14
.cfi_def_cfa_offset 24
pushq %r12
.cfi_def_cfa_offset 32
pushq %rbx
.cfi_def_cfa_offset 40
subq $1576, %rsp # imm = 0x628
.cfi_def_cfa_offset 1616
.cfi_offset %rbx, -40
.cfi_offset %r12, -32
.cfi_offset %r14, -24
.cfi_offset %r15, -16
movq 8(%rsi), %rdi
xorl %esi, %esi
movl $10, %edx
callq __isoc23_strtol
movq %rax, %r14
movl %r14d, %edi
callq hipSetDevice
testl %eax, %eax
je .LBB1_1
# %bb.6:
movl %eax, %ebx
movl %eax, %edi
callq hipGetErrorString
movl $.L.str.1, %edi
movl $.L.str, %edx
movq %rax, %rsi
movl $25, %ecx
xorl %eax, %eax
callq printf
movl %ebx, %edi
callq exit
.LBB1_1: # %_Z9gpuAssert10hipError_tPKcib.exit
movl $8, %edi
callq hipSetDeviceFlags
leaq 104(%rsp), %rdi
movl %r14d, %esi
callq hipGetDevicePropertiesR0600
leaq 100(%rsp), %rdi
callq hipRuntimeGetVersion
leaq 96(%rsp), %rdi
callq hipDriverGetVersion
movabsq $4294967297, %rdi # imm = 0x100000001
movl $1, %esi
movq %rdi, %rdx
movl $1, %ecx
xorl %r8d, %r8d
xorl %r9d, %r9d
callq __hipPushCallConfiguration
testl %eax, %eax
jne .LBB1_3
# %bb.2:
leaq 24(%rsp), %rdi
leaq 40(%rsp), %rsi
leaq 8(%rsp), %rdx
movq %rsp, %rcx
callq __hipPopCallConfiguration
movq 24(%rsp), %rsi
movl 32(%rsp), %edx
movq 40(%rsp), %rcx
movl 48(%rsp), %r8d
leaq 16(%rsp), %r9
movl $_Z11emptyKernelv, %edi
pushq (%rsp)
.cfi_adjust_cfa_offset 8
pushq 16(%rsp)
.cfi_adjust_cfa_offset 8
callq hipLaunchKernel
addq $16, %rsp
.cfi_adjust_cfa_offset -16
.LBB1_3: # %.critedge
callq hipDeviceSynchronize
leaq 24(%rsp), %rdi
movl $1, %esi
movl $2, %edx
callq hipHostAlloc
movq 24(%rsp), %rdi
callq hipHostFree
movl $8, %edi
callq malloc
movq %rax, %rbx
movl $1, %esi
movq %rax, %rdi
movl $2, %edx
callq hipHostAlloc
movq %rbx, %rdi
addq $8, %rdi
movl $1, %esi
movl $2, %edx
callq hipHostAlloc
xorl %r14d, %r14d
.p2align 4, 0x90
.LBB1_4: # =>This Inner Loop Header: Depth=1
movq (%rbx,%r14,8), %rdi
callq hipHostFree
incq %r14
cmpq $1, %r14
je .LBB1_4
# %bb.5:
movq %rbx, %rdi
callq free
leaq 40(%rsp), %rdi
xorl %esi, %esi
movl $2, %edx
callq hipHostAlloc
movq 40(%rsp), %rdi
callq hipHostFree
leaq 24(%rsp), %rdi
movl $2, %esi
movl $2, %edx
callq hipHostAlloc
movq 24(%rsp), %rdi
callq hipHostFree
leaq 8(%rsp), %r14
movq %r14, %rdi
xorl %esi, %esi
movl $2, %edx
callq hipHostAlloc
movq %rsp, %r15
movq %r15, %rdi
xorl %esi, %esi
movl $2, %edx
callq hipHostAlloc
leaq 16(%rsp), %rbx
movq %rbx, %rdi
xorl %esi, %esi
movl $2, %edx
callq hipHostAlloc
leaq 56(%rsp), %r12
movq %r12, %rdi
xorl %esi, %esi
movl $2, %edx
callq hipHostAlloc
leaq 88(%rsp), %rdi
xorl %esi, %esi
movl $2, %edx
callq hipHostAlloc
leaq 80(%rsp), %rdi
xorl %esi, %esi
movl $2, %edx
callq hipHostAlloc
movq 8(%rsp), %rdi
callq hipHostFree
movq 16(%rsp), %rdi
callq hipHostFree
movq 88(%rsp), %rdi
callq hipHostFree
leaq 72(%rsp), %rdi
xorl %esi, %esi
movl $2, %edx
callq hipHostAlloc
leaq 64(%rsp), %rdi
xorl %esi, %esi
movl $2, %edx
callq hipHostAlloc
movq (%rsp), %rdi
callq hipHostFree
movq 56(%rsp), %rdi
callq hipHostFree
movq 80(%rsp), %rdi
callq hipHostFree
movq 72(%rsp), %rdi
callq hipHostFree
movq 64(%rsp), %rdi
callq hipHostFree
movq %r14, %rdi
xorl %esi, %esi
movl $2, %edx
callq hipHostAlloc
movq %r15, %rdi
xorl %esi, %esi
movl $2, %edx
callq hipHostAlloc
movq %rbx, %rdi
xorl %esi, %esi
movl $2, %edx
callq hipHostAlloc
movq 8(%rsp), %rdi
callq hipHostFree
movq (%rsp), %rdi
callq hipHostFree
movq %r12, %rdi
xorl %esi, %esi
movl $2, %edx
callq hipHostAlloc
movq 16(%rsp), %rdi
callq hipHostFree
movq 56(%rsp), %rdi
callq hipHostFree
movq %r14, %rdi
xorl %esi, %esi
movl $2, %edx
callq hipHostAlloc
movq %r15, %rdi
xorl %esi, %esi
movl $2, %edx
callq hipHostAlloc
movq 8(%rsp), %rdi
callq hipHostFree
movq %rbx, %rdi
xorl %esi, %esi
movl $2, %edx
callq hipHostAlloc
movq (%rsp), %rdi
callq hipHostFree
movq 16(%rsp), %rdi
callq hipHostFree
callq malloc
movq %rax, %rdi
xorl %esi, %esi
movl $2, %edx
callq hipHostAlloc
.Lfunc_end1:
.size main, .Lfunc_end1-main
.cfi_endproc
# -- End function
.p2align 4, 0x90 # -- Begin function __hip_module_ctor
.type __hip_module_ctor,@function
__hip_module_ctor: # @__hip_module_ctor
.cfi_startproc
# %bb.0:
subq $40, %rsp
.cfi_def_cfa_offset 48
cmpq $0, __hip_gpubin_handle(%rip)
jne .LBB2_2
# %bb.1:
movl $__hip_fatbin_wrapper, %edi
callq __hipRegisterFatBinary
movq %rax, __hip_gpubin_handle(%rip)
.LBB2_2:
movq __hip_gpubin_handle(%rip), %rdi
xorps %xmm0, %xmm0
movups %xmm0, 16(%rsp)
movups %xmm0, (%rsp)
movl $_Z11emptyKernelv, %esi
movl $.L__unnamed_1, %edx
movl $.L__unnamed_1, %ecx
movl $-1, %r8d
xorl %r9d, %r9d
callq __hipRegisterFunction
movl $__hip_module_dtor, %edi
addq $40, %rsp
.cfi_def_cfa_offset 8
jmp atexit # TAILCALL
.Lfunc_end2:
.size __hip_module_ctor, .Lfunc_end2-__hip_module_ctor
.cfi_endproc
# -- End function
.p2align 4, 0x90 # -- Begin function __hip_module_dtor
.type __hip_module_dtor,@function
__hip_module_dtor: # @__hip_module_dtor
.cfi_startproc
# %bb.0:
movq __hip_gpubin_handle(%rip), %rdi
testq %rdi, %rdi
je .LBB3_2
# %bb.1:
pushq %rax
.cfi_def_cfa_offset 16
callq __hipUnregisterFatBinary
movq $0, __hip_gpubin_handle(%rip)
addq $8, %rsp
.cfi_def_cfa_offset 8
.LBB3_2:
retq
.Lfunc_end3:
.size __hip_module_dtor, .Lfunc_end3-__hip_module_dtor
.cfi_endproc
# -- End function
.type _Z11emptyKernelv,@object # @_Z11emptyKernelv
.section .rodata,"a",@progbits
.globl _Z11emptyKernelv
.p2align 3, 0x0
_Z11emptyKernelv:
.quad _Z26__device_stub__emptyKernelv
.size _Z11emptyKernelv, 8
.type .L.str,@object # @.str
.section .rodata.str1.1,"aMS",@progbits,1
.L.str:
.asciz "/home/ubuntu/Datasets/stackv2/train-structured-repos-hip/ajcalderont/gmai/master/CUDA/src/get_alloc_info.hip"
.size .L.str, 109
.type .L.str.1,@object # @.str.1
.L.str.1:
.asciz "CUDA error: %s - %s(%d)\n"
.size .L.str.1, 25
.type .L__unnamed_1,@object # @0
.L__unnamed_1:
.asciz "_Z11emptyKernelv"
.size .L__unnamed_1, 17
.type __hip_fatbin_wrapper,@object # @__hip_fatbin_wrapper
.section .hipFatBinSegment,"a",@progbits
.p2align 3, 0x0
__hip_fatbin_wrapper:
.long 1212764230 # 0x48495046
.long 1 # 0x1
.quad __hip_fatbin
.quad 0
.size __hip_fatbin_wrapper, 24
.type __hip_gpubin_handle,@object # @__hip_gpubin_handle
.local __hip_gpubin_handle
.comm __hip_gpubin_handle,8,8
.section .init_array,"aw",@init_array
.p2align 3, 0x0
.quad __hip_module_ctor
.type __hip_cuid_,@object # @__hip_cuid_
.bss
.globl __hip_cuid_
__hip_cuid_:
.byte 0 # 0x0
.size __hip_cuid_, 1
.section ".linker-options","e",@llvm_linker_options
.ident "AMD clang version 18.0.0git (https://github.com/RadeonOpenCompute/llvm-project roc-6.3.2 25012 e5bf7e55c91490b07c49d8960fa7983d864936c4)"
.section ".note.GNU-stack","",@progbits
.addrsig
.addrsig_sym _Z26__device_stub__emptyKernelv
.addrsig_sym __hip_module_ctor
.addrsig_sym __hip_module_dtor
.addrsig_sym _Z11emptyKernelv
.addrsig_sym __hip_fatbin
.addrsig_sym __hip_fatbin_wrapper
.addrsig_sym __hip_cuid_ |
You are a helpful coding assistant specialized in converting from CUDA device assembly to AMD device assembly. | code for sm_80
Function : _Z11emptyKernelv
.headerflags @"EF_CUDA_TEXMODE_UNIFIED EF_CUDA_64BIT_ADDRESS EF_CUDA_SM80 EF_CUDA_VIRTUAL_SM(EF_CUDA_SM80)"
/*0000*/ MOV R1, c[0x0][0x28] ; /* 0x00000a0000017a02 */
/* 0x000fe40000000f00 */
/*0010*/ EXIT ; /* 0x000000000000794d */
/* 0x000fea0003800000 */
/*0020*/ BRA 0x20; /* 0xfffffff000007947 */
/* 0x000fc0000383ffff */
/*0030*/ NOP; /* 0x0000000000007918 */
/* 0x000fc00000000000 */
/*0040*/ NOP; /* 0x0000000000007918 */
/* 0x000fc00000000000 */
/*0050*/ NOP; /* 0x0000000000007918 */
/* 0x000fc00000000000 */
/*0060*/ NOP; /* 0x0000000000007918 */
/* 0x000fc00000000000 */
/*0070*/ NOP; /* 0x0000000000007918 */
/* 0x000fc00000000000 */
/*0080*/ NOP; /* 0x0000000000007918 */
/* 0x000fc00000000000 */
/*0090*/ NOP; /* 0x0000000000007918 */
/* 0x000fc00000000000 */
/*00a0*/ NOP; /* 0x0000000000007918 */
/* 0x000fc00000000000 */
/*00b0*/ NOP; /* 0x0000000000007918 */
/* 0x000fc00000000000 */
/*00c0*/ NOP; /* 0x0000000000007918 */
/* 0x000fc00000000000 */
/*00d0*/ NOP; /* 0x0000000000007918 */
/* 0x000fc00000000000 */
/*00e0*/ NOP; /* 0x0000000000007918 */
/* 0x000fc00000000000 */
/*00f0*/ NOP; /* 0x0000000000007918 */
/* 0x000fc00000000000 */
.......... | .text
.amdgcn_target "amdgcn-amd-amdhsa--gfx1100"
.protected _Z11emptyKernelv
.globl _Z11emptyKernelv
.p2align 8
.type _Z11emptyKernelv,@function
_Z11emptyKernelv:
s_endpgm
.section .rodata,"a",@progbits
.p2align 6, 0x0
.amdhsa_kernel _Z11emptyKernelv
.amdhsa_group_segment_fixed_size 0
.amdhsa_private_segment_fixed_size 0
.amdhsa_kernarg_size 0
.amdhsa_user_sgpr_count 15
.amdhsa_user_sgpr_dispatch_ptr 0
.amdhsa_user_sgpr_queue_ptr 0
.amdhsa_user_sgpr_kernarg_segment_ptr 0
.amdhsa_user_sgpr_dispatch_id 0
.amdhsa_user_sgpr_private_segment_size 0
.amdhsa_wavefront_size32 1
.amdhsa_uses_dynamic_stack 0
.amdhsa_enable_private_segment 0
.amdhsa_system_sgpr_workgroup_id_x 1
.amdhsa_system_sgpr_workgroup_id_y 0
.amdhsa_system_sgpr_workgroup_id_z 0
.amdhsa_system_sgpr_workgroup_info 0
.amdhsa_system_vgpr_workitem_id 0
.amdhsa_next_free_vgpr 1
.amdhsa_next_free_sgpr 1
.amdhsa_reserve_vcc 0
.amdhsa_float_round_mode_32 0
.amdhsa_float_round_mode_16_64 0
.amdhsa_float_denorm_mode_32 3
.amdhsa_float_denorm_mode_16_64 3
.amdhsa_dx10_clamp 1
.amdhsa_ieee_mode 1
.amdhsa_fp16_overflow 0
.amdhsa_workgroup_processor_mode 1
.amdhsa_memory_ordered 1
.amdhsa_forward_progress 0
.amdhsa_shared_vgpr_count 0
.amdhsa_exception_fp_ieee_invalid_op 0
.amdhsa_exception_fp_denorm_src 0
.amdhsa_exception_fp_ieee_div_zero 0
.amdhsa_exception_fp_ieee_overflow 0
.amdhsa_exception_fp_ieee_underflow 0
.amdhsa_exception_fp_ieee_inexact 0
.amdhsa_exception_int_div_zero 0
.end_amdhsa_kernel
.text
.Lfunc_end0:
.size _Z11emptyKernelv, .Lfunc_end0-_Z11emptyKernelv
.section .AMDGPU.csdata,"",@progbits
.text
.p2alignl 7, 3214868480
.fill 96, 4, 3214868480
.type __hip_cuid_,@object
.section .bss,"aw",@nobits
.globl __hip_cuid_
__hip_cuid_:
.byte 0
.size __hip_cuid_, 1
.ident "AMD clang version 18.0.0git (https://github.com/RadeonOpenCompute/llvm-project roc-6.3.2 25012 e5bf7e55c91490b07c49d8960fa7983d864936c4)"
.section ".note.GNU-stack","",@progbits
.addrsig
.addrsig_sym __hip_cuid_
.amdgpu_metadata
---
amdhsa.kernels:
- .args: []
.group_segment_fixed_size: 0
.kernarg_segment_align: 4
.kernarg_segment_size: 0
.language: OpenCL C
.language_version:
- 2
- 0
.max_flat_workgroup_size: 1024
.name: _Z11emptyKernelv
.private_segment_fixed_size: 0
.sgpr_count: 0
.sgpr_spill_count: 0
.symbol: _Z11emptyKernelv.kd
.uniform_work_group_size: 1
.uses_dynamic_stack: false
.vgpr_count: 0
.vgpr_spill_count: 0
.wavefront_size: 32
.workgroup_processor_mode: 1
amdhsa.target: amdgcn-amd-amdhsa--gfx1100
amdhsa.version:
- 1
- 2
...
.end_amdgpu_metadata |
You are a helpful coding assistant specialized in converting from CUDA host assembly to AMD host assembly. | .file "tmpxft_000721c1_00000000-6_get_alloc_info.cudafe1.cpp"
.text
#APP
#NO_APP
.type _ZL26__cudaUnregisterBinaryUtilv, @function
_ZL26__cudaUnregisterBinaryUtilv:
.LFB2061:
.cfi_startproc
endbr64
subq $8, %rsp
.cfi_def_cfa_offset 16
movq _ZL20__cudaFatCubinHandle(%rip), %rdi
call __cudaUnregisterFatBinary@PLT
addq $8, %rsp
.cfi_def_cfa_offset 8
ret
.cfi_endproc
.LFE2061:
.size _ZL26__cudaUnregisterBinaryUtilv, .-_ZL26__cudaUnregisterBinaryUtilv
.globl _Z30__device_stub__Z11emptyKernelvv
.type _Z30__device_stub__Z11emptyKernelvv, @function
_Z30__device_stub__Z11emptyKernelvv:
.LFB2083:
.cfi_startproc
endbr64
subq $88, %rsp
.cfi_def_cfa_offset 96
movq %fs:40, %rax
movq %rax, 72(%rsp)
xorl %eax, %eax
movl $1, 16(%rsp)
movl $1, 20(%rsp)
movl $1, 24(%rsp)
movl $1, 28(%rsp)
movl $1, 32(%rsp)
movl $1, 36(%rsp)
leaq 8(%rsp), %rcx
movq %rsp, %rdx
leaq 28(%rsp), %rsi
leaq 16(%rsp), %rdi
call __cudaPopCallConfiguration@PLT
testl %eax, %eax
je .L7
.L3:
movq 72(%rsp), %rax
subq %fs:40, %rax
jne .L8
addq $88, %rsp
.cfi_remember_state
.cfi_def_cfa_offset 8
ret
.L7:
.cfi_restore_state
pushq 8(%rsp)
.cfi_def_cfa_offset 104
pushq 8(%rsp)
.cfi_def_cfa_offset 112
leaq 80(%rsp), %r9
movq 44(%rsp), %rcx
movl 52(%rsp), %r8d
movq 32(%rsp), %rsi
movl 40(%rsp), %edx
leaq _Z11emptyKernelv(%rip), %rdi
call cudaLaunchKernel@PLT
addq $16, %rsp
.cfi_def_cfa_offset 96
jmp .L3
.L8:
call __stack_chk_fail@PLT
.cfi_endproc
.LFE2083:
.size _Z30__device_stub__Z11emptyKernelvv, .-_Z30__device_stub__Z11emptyKernelvv
.globl _Z11emptyKernelv
.type _Z11emptyKernelv, @function
_Z11emptyKernelv:
.LFB2084:
.cfi_startproc
endbr64
subq $8, %rsp
.cfi_def_cfa_offset 16
call _Z30__device_stub__Z11emptyKernelvv
addq $8, %rsp
.cfi_def_cfa_offset 8
ret
.cfi_endproc
.LFE2084:
.size _Z11emptyKernelv, .-_Z11emptyKernelv
.section .rodata.str1.8,"aMS",@progbits,1
.align 8
.LC0:
.string "/home/ubuntu/Datasets/stackv2/train-structured/ajcalderont/gmai/master/CUDA/src/get_alloc_info.cu"
.section .rodata.str1.1,"aMS",@progbits,1
.LC1:
.string "CUDA error: %s - %s(%d)\n"
.text
.globl main
.type main, @function
main:
.LFB2058:
.cfi_startproc
endbr64
pushq %r13
.cfi_def_cfa_offset 16
.cfi_offset 13, -16
pushq %r12
.cfi_def_cfa_offset 24
.cfi_offset 12, -24
pushq %rbp
.cfi_def_cfa_offset 32
.cfi_offset 6, -32
pushq %rbx
.cfi_def_cfa_offset 40
.cfi_offset 3, -40
subq $1176, %rsp
.cfi_def_cfa_offset 1216
movq %fs:40, %rax
movq %rax, 1160(%rsp)
xorl %eax, %eax
movq 8(%rsi), %rdi
movl $10, %edx
movl $0, %esi
call __isoc23_strtol@PLT
movl %eax, %ebx
movl %eax, %edi
call cudaSetDevice@PLT
testl %eax, %eax
jne .L22
movl $8, %edi
call cudaSetDeviceFlags@PLT
leaq 128(%rsp), %rdi
movl %ebx, %esi
call cudaGetDeviceProperties_v2@PLT
leaq 8(%rsp), %rdi
call cudaRuntimeGetVersion@PLT
leaq 12(%rsp), %rdi
call cudaDriverGetVersion@PLT
movl $1, 112(%rsp)
movl $1, 116(%rsp)
movl $1, 120(%rsp)
movl $1, 96(%rsp)
movl $1, 100(%rsp)
movl $1, 104(%rsp)
movl $0, %r9d
movl $0, %r8d
movq 112(%rsp), %rdx
movl $1, %ecx
movq 96(%rsp), %rdi
movl $1, %esi
call __cudaPushCallConfiguration@PLT
testl %eax, %eax
jne .L13
call _Z30__device_stub__Z11emptyKernelvv
.L13:
call cudaDeviceSynchronize@PLT
leaq 16(%rsp), %rbp
movl $2, %edx
movl $1, %esi
movq %rbp, %rdi
call cudaHostAlloc@PLT
movq 16(%rsp), %rdi
call cudaFreeHost@PLT
movl $8, %edi
call malloc@PLT
movq %rax, %rbx
movl $2, %edx
movl $1, %esi
movq %rax, %rdi
call cudaHostAlloc@PLT
leaq 8(%rbx), %rdi
movl $2, %edx
movl $1, %esi
call cudaHostAlloc@PLT
movq (%rbx), %rdi
call cudaFreeHost@PLT
movq 8(%rbx), %rdi
call cudaFreeHost@PLT
movq %rbx, %rdi
call free@PLT
leaq 24(%rsp), %rdi
movl $2, %edx
movl $0, %esi
call cudaHostAlloc@PLT
movq 24(%rsp), %rdi
call cudaFreeHost@PLT
movl $2, %edx
movl $2, %esi
movq %rbp, %rdi
call cudaHostAlloc@PLT
movq 16(%rsp), %rdi
call cudaFreeHost@PLT
leaq 32(%rsp), %r12
movl $2, %edx
movl $0, %esi
movq %r12, %rdi
call cudaHostAlloc@PLT
leaq 40(%rsp), %rbp
movl $2, %edx
movl $0, %esi
movq %rbp, %rdi
call cudaHostAlloc@PLT
leaq 48(%rsp), %rbx
movl $2, %edx
movl $0, %esi
movq %rbx, %rdi
call cudaHostAlloc@PLT
leaq 56(%rsp), %r13
movl $2, %edx
movl $0, %esi
movq %r13, %rdi
call cudaHostAlloc@PLT
leaq 64(%rsp), %rdi
movl $2, %edx
movl $0, %esi
call cudaHostAlloc@PLT
leaq 72(%rsp), %rdi
movl $2, %edx
movl $0, %esi
call cudaHostAlloc@PLT
movq 32(%rsp), %rdi
call cudaFreeHost@PLT
movq 48(%rsp), %rdi
call cudaFreeHost@PLT
movq 64(%rsp), %rdi
call cudaFreeHost@PLT
leaq 80(%rsp), %rdi
movl $2, %edx
movl $0, %esi
call cudaHostAlloc@PLT
leaq 88(%rsp), %rdi
movl $2, %edx
movl $0, %esi
call cudaHostAlloc@PLT
movq 40(%rsp), %rdi
call cudaFreeHost@PLT
movq 56(%rsp), %rdi
call cudaFreeHost@PLT
movq 72(%rsp), %rdi
call cudaFreeHost@PLT
movq 80(%rsp), %rdi
call cudaFreeHost@PLT
movq 88(%rsp), %rdi
call cudaFreeHost@PLT
movl $2, %edx
movl $0, %esi
movq %r12, %rdi
call cudaHostAlloc@PLT
movl $2, %edx
movl $0, %esi
movq %rbp, %rdi
call cudaHostAlloc@PLT
movl $2, %edx
movl $0, %esi
movq %rbx, %rdi
call cudaHostAlloc@PLT
movq 32(%rsp), %rdi
call cudaFreeHost@PLT
movq 40(%rsp), %rdi
call cudaFreeHost@PLT
movl $2, %edx
movl $0, %esi
movq %r13, %rdi
call cudaHostAlloc@PLT
movq 48(%rsp), %rdi
call cudaFreeHost@PLT
movq 56(%rsp), %rdi
call cudaFreeHost@PLT
movl $2, %edx
movl $0, %esi
movq %r12, %rdi
call cudaHostAlloc@PLT
movl $2, %edx
movl $0, %esi
movq %rbp, %rdi
call cudaHostAlloc@PLT
movq 32(%rsp), %rdi
call cudaFreeHost@PLT
movl $2, %edx
movl $0, %esi
movq %rbx, %rdi
call cudaHostAlloc@PLT
movq 40(%rsp), %rdi
call cudaFreeHost@PLT
movq 48(%rsp), %rdi
call cudaFreeHost@PLT
movl $0, %ecx
movl $1, %eax
movl $0, %edx
idivl %ecx
movl %eax, %ebx
movslq %eax, %rbp
salq $3, %rbp
movq %rbp, %rdi
call malloc@PLT
movq %rax, %r12
movl $2, %edx
movl $0, %esi
movq %rax, %rdi
call cudaHostAlloc@PLT
testl %ebx, %ebx
jle .L16
movq %r12, %rbx
addq %r12, %rbp
.L17:
movq (%rbx), %rdi
call cudaFreeHost@PLT
addq $8, %rbx
cmpq %rbx, %rbp
jne .L17
.L16:
movq %r12, %rdi
call free@PLT
leaq 32(%rsp), %rdi
movl $2, %edx
movl $0, %esi
call cudaHostAlloc@PLT
leaq 40(%rsp), %rdi
movl $2, %edx
movl $0, %esi
call cudaHostAlloc@PLT
leaq 48(%rsp), %rdi
movl $2, %edx
movl $0, %esi
call cudaHostAlloc@PLT
leaq 56(%rsp), %rdi
movl $2, %edx
movl $0, %esi
call cudaHostAlloc@PLT
leaq 64(%rsp), %rdi
movl $2, %edx
movl $0, %esi
call cudaHostAlloc@PLT
leaq 72(%rsp), %rdi
movl $2, %edx
movl $0, %esi
call cudaHostAlloc@PLT
leaq 80(%rsp), %rdi
movl $2, %edx
movl $0, %esi
call cudaHostAlloc@PLT
leaq 88(%rsp), %rdi
movl $2, %edx
movl $0, %esi
call cudaHostAlloc@PLT
leaq 96(%rsp), %rdi
movl $2, %edx
movl $0, %esi
call cudaHostAlloc@PLT
movq 32(%rsp), %rdi
call cudaFreeHost@PLT
movq 40(%rsp), %rdi
call cudaFreeHost@PLT
movq 64(%rsp), %rdi
call cudaFreeHost@PLT
leaq 112(%rsp), %rdi
movl $2, %edx
movl $0, %esi
call cudaHostAlloc@PLT
movq 112(%rsp), %rdi
call cudaFreeHost@PLT
movq 72(%rsp), %rdi
call cudaFreeHost@PLT
movq 80(%rsp), %rdi
call cudaFreeHost@PLT
movq 88(%rsp), %rdi
call cudaFreeHost@PLT
movq 96(%rsp), %rdi
call cudaFreeHost@PLT
movq 48(%rsp), %rdi
call cudaFreeHost@PLT
movq 56(%rsp), %rdi
call cudaFreeHost@PLT
call cudaDeviceReset@PLT
movq 1160(%rsp), %rax
subq %fs:40, %rax
jne .L23
movl $0, %eax
addq $1176, %rsp
.cfi_remember_state
.cfi_def_cfa_offset 40
popq %rbx
.cfi_def_cfa_offset 32
popq %rbp
.cfi_def_cfa_offset 24
popq %r12
.cfi_def_cfa_offset 16
popq %r13
.cfi_def_cfa_offset 8
ret
.L22:
.cfi_restore_state
movl %eax, %ebp
movl %eax, %edi
call cudaGetErrorString@PLT
movq %rax, %rdx
movl $23, %r8d
leaq .LC0(%rip), %rcx
leaq .LC1(%rip), %rsi
movl $2, %edi
movl $0, %eax
call __printf_chk@PLT
movl %ebp, %edi
call exit@PLT
.L23:
call __stack_chk_fail@PLT
.cfi_endproc
.LFE2058:
.size main, .-main
.section .rodata.str1.1
.LC2:
.string "_Z11emptyKernelv"
.text
.type _ZL24__sti____cudaRegisterAllv, @function
_ZL24__sti____cudaRegisterAllv:
.LFB2086:
.cfi_startproc
endbr64
subq $8, %rsp
.cfi_def_cfa_offset 16
leaq _ZL15__fatDeviceText(%rip), %rdi
call __cudaRegisterFatBinary@PLT
movq %rax, %rdi
movq %rax, _ZL20__cudaFatCubinHandle(%rip)
pushq $0
.cfi_def_cfa_offset 24
pushq $0
.cfi_def_cfa_offset 32
pushq $0
.cfi_def_cfa_offset 40
pushq $0
.cfi_def_cfa_offset 48
movl $0, %r9d
movl $-1, %r8d
leaq .LC2(%rip), %rdx
movq %rdx, %rcx
leaq _Z11emptyKernelv(%rip), %rsi
call __cudaRegisterFunction@PLT
addq $32, %rsp
.cfi_def_cfa_offset 16
movq _ZL20__cudaFatCubinHandle(%rip), %rdi
call __cudaRegisterFatBinaryEnd@PLT
leaq _ZL26__cudaUnregisterBinaryUtilv(%rip), %rdi
call atexit@PLT
addq $8, %rsp
.cfi_def_cfa_offset 8
ret
.cfi_endproc
.LFE2086:
.size _ZL24__sti____cudaRegisterAllv, .-_ZL24__sti____cudaRegisterAllv
.section .init_array,"aw"
.align 8
.quad _ZL24__sti____cudaRegisterAllv
.section .nvFatBinSegment,"aw"
.align 8
.type _ZL15__fatDeviceText, @object
.size _ZL15__fatDeviceText, 24
_ZL15__fatDeviceText:
.long 1180844977
.long 1
.quad fatbinData
.quad 0
.local _ZL20__cudaFatCubinHandle
.comm _ZL20__cudaFatCubinHandle,8,8
.ident "GCC: (Ubuntu 13.3.0-6ubuntu2~24.04) 13.3.0"
.section .note.GNU-stack,"",@progbits
.section .note.gnu.property,"a"
.align 8
.long 1f - 0f
.long 4f - 1f
.long 5
0:
.string "GNU"
1:
.align 8
.long 0xc0000002
.long 3f - 2f
2:
.long 0x3
3:
.align 8
4: | .text
.file "get_alloc_info.hip"
.globl _Z26__device_stub__emptyKernelv # -- Begin function _Z26__device_stub__emptyKernelv
.p2align 4, 0x90
.type _Z26__device_stub__emptyKernelv,@function
_Z26__device_stub__emptyKernelv: # @_Z26__device_stub__emptyKernelv
.cfi_startproc
# %bb.0:
subq $56, %rsp
.cfi_def_cfa_offset 64
leaq 32(%rsp), %rdi
leaq 16(%rsp), %rsi
leaq 8(%rsp), %rdx
movq %rsp, %rcx
callq __hipPopCallConfiguration
movq 32(%rsp), %rsi
movl 40(%rsp), %edx
movq 16(%rsp), %rcx
movl 24(%rsp), %r8d
leaq 48(%rsp), %r9
movl $_Z11emptyKernelv, %edi
pushq (%rsp)
.cfi_adjust_cfa_offset 8
pushq 16(%rsp)
.cfi_adjust_cfa_offset 8
callq hipLaunchKernel
addq $72, %rsp
.cfi_adjust_cfa_offset -72
retq
.Lfunc_end0:
.size _Z26__device_stub__emptyKernelv, .Lfunc_end0-_Z26__device_stub__emptyKernelv
.cfi_endproc
# -- End function
.globl main # -- Begin function main
.p2align 4, 0x90
.type main,@function
main: # @main
.cfi_startproc
# %bb.0:
pushq %r15
.cfi_def_cfa_offset 16
pushq %r14
.cfi_def_cfa_offset 24
pushq %r12
.cfi_def_cfa_offset 32
pushq %rbx
.cfi_def_cfa_offset 40
subq $1576, %rsp # imm = 0x628
.cfi_def_cfa_offset 1616
.cfi_offset %rbx, -40
.cfi_offset %r12, -32
.cfi_offset %r14, -24
.cfi_offset %r15, -16
movq 8(%rsi), %rdi
xorl %esi, %esi
movl $10, %edx
callq __isoc23_strtol
movq %rax, %r14
movl %r14d, %edi
callq hipSetDevice
testl %eax, %eax
je .LBB1_1
# %bb.6:
movl %eax, %ebx
movl %eax, %edi
callq hipGetErrorString
movl $.L.str.1, %edi
movl $.L.str, %edx
movq %rax, %rsi
movl $25, %ecx
xorl %eax, %eax
callq printf
movl %ebx, %edi
callq exit
.LBB1_1: # %_Z9gpuAssert10hipError_tPKcib.exit
movl $8, %edi
callq hipSetDeviceFlags
leaq 104(%rsp), %rdi
movl %r14d, %esi
callq hipGetDevicePropertiesR0600
leaq 100(%rsp), %rdi
callq hipRuntimeGetVersion
leaq 96(%rsp), %rdi
callq hipDriverGetVersion
movabsq $4294967297, %rdi # imm = 0x100000001
movl $1, %esi
movq %rdi, %rdx
movl $1, %ecx
xorl %r8d, %r8d
xorl %r9d, %r9d
callq __hipPushCallConfiguration
testl %eax, %eax
jne .LBB1_3
# %bb.2:
leaq 24(%rsp), %rdi
leaq 40(%rsp), %rsi
leaq 8(%rsp), %rdx
movq %rsp, %rcx
callq __hipPopCallConfiguration
movq 24(%rsp), %rsi
movl 32(%rsp), %edx
movq 40(%rsp), %rcx
movl 48(%rsp), %r8d
leaq 16(%rsp), %r9
movl $_Z11emptyKernelv, %edi
pushq (%rsp)
.cfi_adjust_cfa_offset 8
pushq 16(%rsp)
.cfi_adjust_cfa_offset 8
callq hipLaunchKernel
addq $16, %rsp
.cfi_adjust_cfa_offset -16
.LBB1_3: # %.critedge
callq hipDeviceSynchronize
leaq 24(%rsp), %rdi
movl $1, %esi
movl $2, %edx
callq hipHostAlloc
movq 24(%rsp), %rdi
callq hipHostFree
movl $8, %edi
callq malloc
movq %rax, %rbx
movl $1, %esi
movq %rax, %rdi
movl $2, %edx
callq hipHostAlloc
movq %rbx, %rdi
addq $8, %rdi
movl $1, %esi
movl $2, %edx
callq hipHostAlloc
xorl %r14d, %r14d
.p2align 4, 0x90
.LBB1_4: # =>This Inner Loop Header: Depth=1
movq (%rbx,%r14,8), %rdi
callq hipHostFree
incq %r14
cmpq $1, %r14
je .LBB1_4
# %bb.5:
movq %rbx, %rdi
callq free
leaq 40(%rsp), %rdi
xorl %esi, %esi
movl $2, %edx
callq hipHostAlloc
movq 40(%rsp), %rdi
callq hipHostFree
leaq 24(%rsp), %rdi
movl $2, %esi
movl $2, %edx
callq hipHostAlloc
movq 24(%rsp), %rdi
callq hipHostFree
leaq 8(%rsp), %r14
movq %r14, %rdi
xorl %esi, %esi
movl $2, %edx
callq hipHostAlloc
movq %rsp, %r15
movq %r15, %rdi
xorl %esi, %esi
movl $2, %edx
callq hipHostAlloc
leaq 16(%rsp), %rbx
movq %rbx, %rdi
xorl %esi, %esi
movl $2, %edx
callq hipHostAlloc
leaq 56(%rsp), %r12
movq %r12, %rdi
xorl %esi, %esi
movl $2, %edx
callq hipHostAlloc
leaq 88(%rsp), %rdi
xorl %esi, %esi
movl $2, %edx
callq hipHostAlloc
leaq 80(%rsp), %rdi
xorl %esi, %esi
movl $2, %edx
callq hipHostAlloc
movq 8(%rsp), %rdi
callq hipHostFree
movq 16(%rsp), %rdi
callq hipHostFree
movq 88(%rsp), %rdi
callq hipHostFree
leaq 72(%rsp), %rdi
xorl %esi, %esi
movl $2, %edx
callq hipHostAlloc
leaq 64(%rsp), %rdi
xorl %esi, %esi
movl $2, %edx
callq hipHostAlloc
movq (%rsp), %rdi
callq hipHostFree
movq 56(%rsp), %rdi
callq hipHostFree
movq 80(%rsp), %rdi
callq hipHostFree
movq 72(%rsp), %rdi
callq hipHostFree
movq 64(%rsp), %rdi
callq hipHostFree
movq %r14, %rdi
xorl %esi, %esi
movl $2, %edx
callq hipHostAlloc
movq %r15, %rdi
xorl %esi, %esi
movl $2, %edx
callq hipHostAlloc
movq %rbx, %rdi
xorl %esi, %esi
movl $2, %edx
callq hipHostAlloc
movq 8(%rsp), %rdi
callq hipHostFree
movq (%rsp), %rdi
callq hipHostFree
movq %r12, %rdi
xorl %esi, %esi
movl $2, %edx
callq hipHostAlloc
movq 16(%rsp), %rdi
callq hipHostFree
movq 56(%rsp), %rdi
callq hipHostFree
movq %r14, %rdi
xorl %esi, %esi
movl $2, %edx
callq hipHostAlloc
movq %r15, %rdi
xorl %esi, %esi
movl $2, %edx
callq hipHostAlloc
movq 8(%rsp), %rdi
callq hipHostFree
movq %rbx, %rdi
xorl %esi, %esi
movl $2, %edx
callq hipHostAlloc
movq (%rsp), %rdi
callq hipHostFree
movq 16(%rsp), %rdi
callq hipHostFree
callq malloc
movq %rax, %rdi
xorl %esi, %esi
movl $2, %edx
callq hipHostAlloc
.Lfunc_end1:
.size main, .Lfunc_end1-main
.cfi_endproc
# -- End function
.p2align 4, 0x90 # -- Begin function __hip_module_ctor
.type __hip_module_ctor,@function
__hip_module_ctor: # @__hip_module_ctor
.cfi_startproc
# %bb.0:
subq $40, %rsp
.cfi_def_cfa_offset 48
cmpq $0, __hip_gpubin_handle(%rip)
jne .LBB2_2
# %bb.1:
movl $__hip_fatbin_wrapper, %edi
callq __hipRegisterFatBinary
movq %rax, __hip_gpubin_handle(%rip)
.LBB2_2:
movq __hip_gpubin_handle(%rip), %rdi
xorps %xmm0, %xmm0
movups %xmm0, 16(%rsp)
movups %xmm0, (%rsp)
movl $_Z11emptyKernelv, %esi
movl $.L__unnamed_1, %edx
movl $.L__unnamed_1, %ecx
movl $-1, %r8d
xorl %r9d, %r9d
callq __hipRegisterFunction
movl $__hip_module_dtor, %edi
addq $40, %rsp
.cfi_def_cfa_offset 8
jmp atexit # TAILCALL
.Lfunc_end2:
.size __hip_module_ctor, .Lfunc_end2-__hip_module_ctor
.cfi_endproc
# -- End function
.p2align 4, 0x90 # -- Begin function __hip_module_dtor
.type __hip_module_dtor,@function
__hip_module_dtor: # @__hip_module_dtor
.cfi_startproc
# %bb.0:
movq __hip_gpubin_handle(%rip), %rdi
testq %rdi, %rdi
je .LBB3_2
# %bb.1:
pushq %rax
.cfi_def_cfa_offset 16
callq __hipUnregisterFatBinary
movq $0, __hip_gpubin_handle(%rip)
addq $8, %rsp
.cfi_def_cfa_offset 8
.LBB3_2:
retq
.Lfunc_end3:
.size __hip_module_dtor, .Lfunc_end3-__hip_module_dtor
.cfi_endproc
# -- End function
.type _Z11emptyKernelv,@object # @_Z11emptyKernelv
.section .rodata,"a",@progbits
.globl _Z11emptyKernelv
.p2align 3, 0x0
_Z11emptyKernelv:
.quad _Z26__device_stub__emptyKernelv
.size _Z11emptyKernelv, 8
.type .L.str,@object # @.str
.section .rodata.str1.1,"aMS",@progbits,1
.L.str:
.asciz "/home/ubuntu/Datasets/stackv2/train-structured-repos-hip/ajcalderont/gmai/master/CUDA/src/get_alloc_info.hip"
.size .L.str, 109
.type .L.str.1,@object # @.str.1
.L.str.1:
.asciz "CUDA error: %s - %s(%d)\n"
.size .L.str.1, 25
.type .L__unnamed_1,@object # @0
.L__unnamed_1:
.asciz "_Z11emptyKernelv"
.size .L__unnamed_1, 17
.type __hip_fatbin_wrapper,@object # @__hip_fatbin_wrapper
.section .hipFatBinSegment,"a",@progbits
.p2align 3, 0x0
__hip_fatbin_wrapper:
.long 1212764230 # 0x48495046
.long 1 # 0x1
.quad __hip_fatbin
.quad 0
.size __hip_fatbin_wrapper, 24
.type __hip_gpubin_handle,@object # @__hip_gpubin_handle
.local __hip_gpubin_handle
.comm __hip_gpubin_handle,8,8
.section .init_array,"aw",@init_array
.p2align 3, 0x0
.quad __hip_module_ctor
.type __hip_cuid_,@object # @__hip_cuid_
.bss
.globl __hip_cuid_
__hip_cuid_:
.byte 0 # 0x0
.size __hip_cuid_, 1
.section ".linker-options","e",@llvm_linker_options
.ident "AMD clang version 18.0.0git (https://github.com/RadeonOpenCompute/llvm-project roc-6.3.2 25012 e5bf7e55c91490b07c49d8960fa7983d864936c4)"
.section ".note.GNU-stack","",@progbits
.addrsig
.addrsig_sym _Z26__device_stub__emptyKernelv
.addrsig_sym __hip_module_ctor
.addrsig_sym __hip_module_dtor
.addrsig_sym _Z11emptyKernelv
.addrsig_sym __hip_fatbin
.addrsig_sym __hip_fatbin_wrapper
.addrsig_sym __hip_cuid_ |
You are a helpful coding assistant specialized in converting CUDA source code to CUDA device assembly. | #include "includes.h"
__global__ void update_veloc_elastic_kernel(float * veloc, const float * accel, const int size, const float deltatover2){
int id;
id = threadIdx.x + (blockIdx.x) * (blockDim.x) + (blockIdx.y) * ((gridDim.x) * (blockDim.x));
if (id < size) {
veloc[id] = veloc[id] + (deltatover2) * (accel[id]);
veloc[size + id] = veloc[size + id] + (deltatover2) * (accel[size + id]);
veloc[size + size + id] = veloc[size + size + id] + (deltatover2) * (accel[size + size + id]);
}
} | code for sm_80
Function : _Z27update_veloc_elastic_kernelPfPKfif
.headerflags @"EF_CUDA_TEXMODE_UNIFIED EF_CUDA_64BIT_ADDRESS EF_CUDA_SM80 EF_CUDA_VIRTUAL_SM(EF_CUDA_SM80)"
/*0000*/ MOV R1, c[0x0][0x28] ; /* 0x00000a0000017a02 */
/* 0x000fe40000000f00 */
/*0010*/ S2R R0, SR_CTAID.Y ; /* 0x0000000000007919 */
/* 0x000e280000002600 */
/*0020*/ S2R R3, SR_CTAID.X ; /* 0x0000000000037919 */
/* 0x000e280000002500 */
/*0030*/ S2R R5, SR_TID.X ; /* 0x0000000000057919 */
/* 0x000e620000002100 */
/*0040*/ IMAD R0, R0, c[0x0][0xc], R3 ; /* 0x0000030000007a24 */
/* 0x001fc800078e0203 */
/*0050*/ IMAD R0, R0, c[0x0][0x0], R5 ; /* 0x0000000000007a24 */
/* 0x002fca00078e0205 */
/*0060*/ ISETP.GE.AND P0, PT, R0, c[0x0][0x170], PT ; /* 0x00005c0000007a0c */
/* 0x000fda0003f06270 */
/*0070*/ @P0 EXIT ; /* 0x000000000000094d */
/* 0x000fea0003800000 */
/*0080*/ HFMA2.MMA R17, -RZ, RZ, 0, 2.384185791015625e-07 ; /* 0x00000004ff117435 */
/* 0x000fe200000001ff */
/*0090*/ ULDC.64 UR4, c[0x0][0x118] ; /* 0x0000460000047ab9 */
/* 0x000fd20000000a00 */
/*00a0*/ IMAD.WIDE R2, R0, R17, c[0x0][0x160] ; /* 0x0000580000027625 */
/* 0x000fc800078e0211 */
/*00b0*/ IMAD.WIDE R4, R0, R17, c[0x0][0x168] ; /* 0x00005a0000047625 */
/* 0x000fe200078e0211 */
/*00c0*/ LDG.E R7, [R2.64] ; /* 0x0000000402077981 */
/* 0x000ea8000c1e1900 */
/*00d0*/ LDG.E R6, [R4.64] ; /* 0x0000000404067981 */
/* 0x000ea2000c1e1900 */
/*00e0*/ IMAD.WIDE R8, R17, c[0x0][0x170], R4 ; /* 0x00005c0011087a25 */
/* 0x000fe200078e0204 */
/*00f0*/ MOV R15, c[0x0][0x170] ; /* 0x00005c00000f7a02 */
/* 0x000fc60000000f00 */
/*0100*/ FFMA R13, R6, c[0x0][0x174], R7 ; /* 0x00005d00060d7a23 */
/* 0x004fe40000000007 */
/*0110*/ IMAD.WIDE R6, R17, c[0x0][0x170], R2 ; /* 0x00005c0011067a25 */
/* 0x000fc600078e0202 */
/*0120*/ STG.E [R2.64], R13 ; /* 0x0000000d02007986 */
/* 0x000fe8000c101904 */
/*0130*/ LDG.E R8, [R8.64] ; /* 0x0000000408087981 */
/* 0x000ea8000c1e1900 */
/*0140*/ LDG.E R11, [R6.64] ; /* 0x00000004060b7981 */
/* 0x000ea2000c1e1900 */
/*0150*/ LEA R0, R15, R0, 0x1 ; /* 0x000000000f007211 */
/* 0x000fca00078e08ff */
/*0160*/ IMAD.WIDE R4, R0, R17, c[0x0][0x160] ; /* 0x0000580000047625 */
/* 0x000fc800078e0211 */
/*0170*/ FFMA R15, R8, c[0x0][0x174], R11 ; /* 0x00005d00080f7a23 */
/* 0x004fe4000000000b */
/*0180*/ IMAD.WIDE R10, R0, R17, c[0x0][0x168] ; /* 0x00005a00000a7625 */
/* 0x000fc600078e0211 */
/*0190*/ STG.E [R6.64], R15 ; /* 0x0000000f06007986 */
/* 0x000fe8000c101904 */
/*01a0*/ LDG.E R10, [R10.64] ; /* 0x000000040a0a7981 */
/* 0x000ea8000c1e1900 */
/*01b0*/ LDG.E R17, [R4.64] ; /* 0x0000000404117981 */
/* 0x000ea4000c1e1900 */
/*01c0*/ FFMA R17, R10, c[0x0][0x174], R17 ; /* 0x00005d000a117a23 */
/* 0x004fca0000000011 */
/*01d0*/ STG.E [R4.64], R17 ; /* 0x0000001104007986 */
/* 0x000fe2000c101904 */
/*01e0*/ EXIT ; /* 0x000000000000794d */
/* 0x000fea0003800000 */
/*01f0*/ BRA 0x1f0; /* 0xfffffff000007947 */
/* 0x000fc0000383ffff */
/*0200*/ NOP; /* 0x0000000000007918 */
/* 0x000fc00000000000 */
/*0210*/ NOP; /* 0x0000000000007918 */
/* 0x000fc00000000000 */
/*0220*/ NOP; /* 0x0000000000007918 */
/* 0x000fc00000000000 */
/*0230*/ NOP; /* 0x0000000000007918 */
/* 0x000fc00000000000 */
/*0240*/ NOP; /* 0x0000000000007918 */
/* 0x000fc00000000000 */
/*0250*/ NOP; /* 0x0000000000007918 */
/* 0x000fc00000000000 */
/*0260*/ NOP; /* 0x0000000000007918 */
/* 0x000fc00000000000 */
/*0270*/ NOP; /* 0x0000000000007918 */
/* 0x000fc00000000000 */
.......... |
You are a helpful coding assistant specialized in converting CUDA source code to CUDA host assembly. | #include "includes.h"
__global__ void update_veloc_elastic_kernel(float * veloc, const float * accel, const int size, const float deltatover2){
int id;
id = threadIdx.x + (blockIdx.x) * (blockDim.x) + (blockIdx.y) * ((gridDim.x) * (blockDim.x));
if (id < size) {
veloc[id] = veloc[id] + (deltatover2) * (accel[id]);
veloc[size + id] = veloc[size + id] + (deltatover2) * (accel[size + id]);
veloc[size + size + id] = veloc[size + size + id] + (deltatover2) * (accel[size + size + id]);
}
} | .file "tmpxft_0018e294_00000000-6_update_veloc_elastic_kernel.cudafe1.cpp"
.text
#APP
#NO_APP
.type _ZL26__cudaUnregisterBinaryUtilv, @function
_ZL26__cudaUnregisterBinaryUtilv:
.LFB2029:
.cfi_startproc
endbr64
subq $8, %rsp
.cfi_def_cfa_offset 16
movq _ZL20__cudaFatCubinHandle(%rip), %rdi
call __cudaUnregisterFatBinary@PLT
addq $8, %rsp
.cfi_def_cfa_offset 8
ret
.cfi_endproc
.LFE2029:
.size _ZL26__cudaUnregisterBinaryUtilv, .-_ZL26__cudaUnregisterBinaryUtilv
.globl _Z52__device_stub__Z27update_veloc_elastic_kernelPfPKfifPfPKfif
.type _Z52__device_stub__Z27update_veloc_elastic_kernelPfPKfifPfPKfif, @function
_Z52__device_stub__Z27update_veloc_elastic_kernelPfPKfifPfPKfif:
.LFB2051:
.cfi_startproc
endbr64
subq $152, %rsp
.cfi_def_cfa_offset 160
movq %rdi, 24(%rsp)
movq %rsi, 16(%rsp)
movl %edx, 12(%rsp)
movss %xmm0, 8(%rsp)
movq %fs:40, %rax
movq %rax, 136(%rsp)
xorl %eax, %eax
leaq 24(%rsp), %rax
movq %rax, 96(%rsp)
leaq 16(%rsp), %rax
movq %rax, 104(%rsp)
leaq 12(%rsp), %rax
movq %rax, 112(%rsp)
leaq 8(%rsp), %rax
movq %rax, 120(%rsp)
movl $1, 48(%rsp)
movl $1, 52(%rsp)
movl $1, 56(%rsp)
movl $1, 60(%rsp)
movl $1, 64(%rsp)
movl $1, 68(%rsp)
leaq 40(%rsp), %rcx
leaq 32(%rsp), %rdx
leaq 60(%rsp), %rsi
leaq 48(%rsp), %rdi
call __cudaPopCallConfiguration@PLT
testl %eax, %eax
je .L7
.L3:
movq 136(%rsp), %rax
subq %fs:40, %rax
jne .L8
addq $152, %rsp
.cfi_remember_state
.cfi_def_cfa_offset 8
ret
.L7:
.cfi_restore_state
pushq 40(%rsp)
.cfi_def_cfa_offset 168
pushq 40(%rsp)
.cfi_def_cfa_offset 176
leaq 112(%rsp), %r9
movq 76(%rsp), %rcx
movl 84(%rsp), %r8d
movq 64(%rsp), %rsi
movl 72(%rsp), %edx
leaq _Z27update_veloc_elastic_kernelPfPKfif(%rip), %rdi
call cudaLaunchKernel@PLT
addq $16, %rsp
.cfi_def_cfa_offset 160
jmp .L3
.L8:
call __stack_chk_fail@PLT
.cfi_endproc
.LFE2051:
.size _Z52__device_stub__Z27update_veloc_elastic_kernelPfPKfifPfPKfif, .-_Z52__device_stub__Z27update_veloc_elastic_kernelPfPKfifPfPKfif
.globl _Z27update_veloc_elastic_kernelPfPKfif
.type _Z27update_veloc_elastic_kernelPfPKfif, @function
_Z27update_veloc_elastic_kernelPfPKfif:
.LFB2052:
.cfi_startproc
endbr64
subq $8, %rsp
.cfi_def_cfa_offset 16
call _Z52__device_stub__Z27update_veloc_elastic_kernelPfPKfifPfPKfif
addq $8, %rsp
.cfi_def_cfa_offset 8
ret
.cfi_endproc
.LFE2052:
.size _Z27update_veloc_elastic_kernelPfPKfif, .-_Z27update_veloc_elastic_kernelPfPKfif
.section .rodata.str1.8,"aMS",@progbits,1
.align 8
.LC0:
.string "_Z27update_veloc_elastic_kernelPfPKfif"
.text
.type _ZL24__sti____cudaRegisterAllv, @function
_ZL24__sti____cudaRegisterAllv:
.LFB2054:
.cfi_startproc
endbr64
subq $8, %rsp
.cfi_def_cfa_offset 16
leaq _ZL15__fatDeviceText(%rip), %rdi
call __cudaRegisterFatBinary@PLT
movq %rax, %rdi
movq %rax, _ZL20__cudaFatCubinHandle(%rip)
pushq $0
.cfi_def_cfa_offset 24
pushq $0
.cfi_def_cfa_offset 32
pushq $0
.cfi_def_cfa_offset 40
pushq $0
.cfi_def_cfa_offset 48
movl $0, %r9d
movl $-1, %r8d
leaq .LC0(%rip), %rdx
movq %rdx, %rcx
leaq _Z27update_veloc_elastic_kernelPfPKfif(%rip), %rsi
call __cudaRegisterFunction@PLT
addq $32, %rsp
.cfi_def_cfa_offset 16
movq _ZL20__cudaFatCubinHandle(%rip), %rdi
call __cudaRegisterFatBinaryEnd@PLT
leaq _ZL26__cudaUnregisterBinaryUtilv(%rip), %rdi
call atexit@PLT
addq $8, %rsp
.cfi_def_cfa_offset 8
ret
.cfi_endproc
.LFE2054:
.size _ZL24__sti____cudaRegisterAllv, .-_ZL24__sti____cudaRegisterAllv
.section .init_array,"aw"
.align 8
.quad _ZL24__sti____cudaRegisterAllv
.section .nvFatBinSegment,"aw"
.align 8
.type _ZL15__fatDeviceText, @object
.size _ZL15__fatDeviceText, 24
_ZL15__fatDeviceText:
.long 1180844977
.long 1
.quad fatbinData
.quad 0
.local _ZL20__cudaFatCubinHandle
.comm _ZL20__cudaFatCubinHandle,8,8
.ident "GCC: (Ubuntu 13.3.0-6ubuntu2~24.04) 13.3.0"
.section .note.GNU-stack,"",@progbits
.section .note.gnu.property,"a"
.align 8
.long 1f - 0f
.long 4f - 1f
.long 5
0:
.string "GNU"
1:
.align 8
.long 0xc0000002
.long 3f - 2f
2:
.long 0x3
3:
.align 8
4: |
You are a helpful coding assistant specialized in converting CUDA source code to HIP/AMD source code. | #include "includes.h"
__global__ void update_veloc_elastic_kernel(float * veloc, const float * accel, const int size, const float deltatover2){
int id;
id = threadIdx.x + (blockIdx.x) * (blockDim.x) + (blockIdx.y) * ((gridDim.x) * (blockDim.x));
if (id < size) {
veloc[id] = veloc[id] + (deltatover2) * (accel[id]);
veloc[size + id] = veloc[size + id] + (deltatover2) * (accel[size + id]);
veloc[size + size + id] = veloc[size + size + id] + (deltatover2) * (accel[size + size + id]);
}
} | #include <hip/hip_runtime.h>
#include "includes.h"
__global__ void update_veloc_elastic_kernel(float * veloc, const float * accel, const int size, const float deltatover2){
int id;
id = threadIdx.x + (blockIdx.x) * (blockDim.x) + (blockIdx.y) * ((gridDim.x) * (blockDim.x));
if (id < size) {
veloc[id] = veloc[id] + (deltatover2) * (accel[id]);
veloc[size + id] = veloc[size + id] + (deltatover2) * (accel[size + id]);
veloc[size + size + id] = veloc[size + size + id] + (deltatover2) * (accel[size + size + id]);
}
} |
You are a helpful coding assistant specialized in converting HIP source code to AMD device assembly. | #include <hip/hip_runtime.h>
#include "includes.h"
__global__ void update_veloc_elastic_kernel(float * veloc, const float * accel, const int size, const float deltatover2){
int id;
id = threadIdx.x + (blockIdx.x) * (blockDim.x) + (blockIdx.y) * ((gridDim.x) * (blockDim.x));
if (id < size) {
veloc[id] = veloc[id] + (deltatover2) * (accel[id]);
veloc[size + id] = veloc[size + id] + (deltatover2) * (accel[size + id]);
veloc[size + size + id] = veloc[size + size + id] + (deltatover2) * (accel[size + size + id]);
}
} | .text
.amdgcn_target "amdgcn-amd-amdhsa--gfx1100"
.protected _Z27update_veloc_elastic_kernelPfPKfif
.globl _Z27update_veloc_elastic_kernelPfPKfif
.p2align 8
.type _Z27update_veloc_elastic_kernelPfPKfif,@function
_Z27update_veloc_elastic_kernelPfPKfif:
s_clause 0x2
s_load_b32 s3, s[0:1], 0x18
s_load_b32 s4, s[0:1], 0x24
s_load_b32 s2, s[0:1], 0x10
s_waitcnt lgkmcnt(0)
s_mul_i32 s3, s3, s15
s_and_b32 s4, s4, 0xffff
s_add_i32 s3, s3, s14
s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
v_mad_u64_u32 v[1:2], null, s3, s4, v[0:1]
s_mov_b32 s3, exec_lo
v_cmpx_gt_i32_e64 s2, v1
s_cbranch_execz .LBB0_2
s_load_b128 s[4:7], s[0:1], 0x0
v_ashrrev_i32_e32 v2, 31, v1
s_load_b32 s0, s[0:1], 0x14
s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
v_lshlrev_b64 v[2:3], 2, v[1:2]
s_waitcnt lgkmcnt(0)
v_add_co_u32 v4, vcc_lo, s4, v2
s_delay_alu instid0(VALU_DEP_2)
v_add_co_ci_u32_e32 v5, vcc_lo, s5, v3, vcc_lo
v_add_co_u32 v2, vcc_lo, s6, v2
v_add_co_ci_u32_e32 v3, vcc_lo, s7, v3, vcc_lo
global_load_b32 v0, v[4:5], off
global_load_b32 v8, v[2:3], off
v_add_nc_u32_e32 v2, s2, v1
s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
v_ashrrev_i32_e32 v3, 31, v2
v_lshlrev_b64 v[2:3], 2, v[2:3]
s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_2)
v_add_co_u32 v6, vcc_lo, s4, v2
v_add_co_ci_u32_e32 v7, vcc_lo, s5, v3, vcc_lo
v_add_co_u32 v2, vcc_lo, s6, v2
v_add_co_ci_u32_e32 v3, vcc_lo, s7, v3, vcc_lo
s_waitcnt vmcnt(0)
v_fmac_f32_e32 v0, s0, v8
global_store_b32 v[4:5], v0, off
global_load_b32 v4, v[6:7], off
global_load_b32 v5, v[2:3], off
v_lshl_add_u32 v0, s2, 1, v1
s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
v_ashrrev_i32_e32 v1, 31, v0
v_lshlrev_b64 v[0:1], 2, v[0:1]
s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_2)
v_add_co_u32 v2, vcc_lo, s4, v0
v_add_co_ci_u32_e32 v3, vcc_lo, s5, v1, vcc_lo
v_add_co_u32 v0, vcc_lo, s6, v0
v_add_co_ci_u32_e32 v1, vcc_lo, s7, v1, vcc_lo
s_waitcnt vmcnt(0)
v_fmac_f32_e32 v4, s0, v5
global_store_b32 v[6:7], v4, off
global_load_b32 v4, v[2:3], off
global_load_b32 v0, v[0:1], off
s_waitcnt vmcnt(0)
v_fmac_f32_e32 v4, s0, v0
global_store_b32 v[2:3], v4, off
.LBB0_2:
s_nop 0
s_sendmsg sendmsg(MSG_DEALLOC_VGPRS)
s_endpgm
.section .rodata,"a",@progbits
.p2align 6, 0x0
.amdhsa_kernel _Z27update_veloc_elastic_kernelPfPKfif
.amdhsa_group_segment_fixed_size 0
.amdhsa_private_segment_fixed_size 0
.amdhsa_kernarg_size 280
.amdhsa_user_sgpr_count 14
.amdhsa_user_sgpr_dispatch_ptr 0
.amdhsa_user_sgpr_queue_ptr 0
.amdhsa_user_sgpr_kernarg_segment_ptr 1
.amdhsa_user_sgpr_dispatch_id 0
.amdhsa_user_sgpr_private_segment_size 0
.amdhsa_wavefront_size32 1
.amdhsa_uses_dynamic_stack 0
.amdhsa_enable_private_segment 0
.amdhsa_system_sgpr_workgroup_id_x 1
.amdhsa_system_sgpr_workgroup_id_y 1
.amdhsa_system_sgpr_workgroup_id_z 0
.amdhsa_system_sgpr_workgroup_info 0
.amdhsa_system_vgpr_workitem_id 0
.amdhsa_next_free_vgpr 9
.amdhsa_next_free_sgpr 16
.amdhsa_float_round_mode_32 0
.amdhsa_float_round_mode_16_64 0
.amdhsa_float_denorm_mode_32 3
.amdhsa_float_denorm_mode_16_64 3
.amdhsa_dx10_clamp 1
.amdhsa_ieee_mode 1
.amdhsa_fp16_overflow 0
.amdhsa_workgroup_processor_mode 1
.amdhsa_memory_ordered 1
.amdhsa_forward_progress 0
.amdhsa_shared_vgpr_count 0
.amdhsa_exception_fp_ieee_invalid_op 0
.amdhsa_exception_fp_denorm_src 0
.amdhsa_exception_fp_ieee_div_zero 0
.amdhsa_exception_fp_ieee_overflow 0
.amdhsa_exception_fp_ieee_underflow 0
.amdhsa_exception_fp_ieee_inexact 0
.amdhsa_exception_int_div_zero 0
.end_amdhsa_kernel
.text
.Lfunc_end0:
.size _Z27update_veloc_elastic_kernelPfPKfif, .Lfunc_end0-_Z27update_veloc_elastic_kernelPfPKfif
.section .AMDGPU.csdata,"",@progbits
.text
.p2alignl 7, 3214868480
.fill 96, 4, 3214868480
.type __hip_cuid_,@object
.section .bss,"aw",@nobits
.globl __hip_cuid_
__hip_cuid_:
.byte 0
.size __hip_cuid_, 1
.ident "AMD clang version 18.0.0git (https://github.com/RadeonOpenCompute/llvm-project roc-6.3.2 25012 e5bf7e55c91490b07c49d8960fa7983d864936c4)"
.section ".note.GNU-stack","",@progbits
.addrsig
.addrsig_sym __hip_cuid_
.amdgpu_metadata
---
amdhsa.kernels:
- .args:
- .address_space: global
.offset: 0
.size: 8
.value_kind: global_buffer
- .address_space: global
.offset: 8
.size: 8
.value_kind: global_buffer
- .offset: 16
.size: 4
.value_kind: by_value
- .offset: 20
.size: 4
.value_kind: by_value
- .offset: 24
.size: 4
.value_kind: hidden_block_count_x
- .offset: 28
.size: 4
.value_kind: hidden_block_count_y
- .offset: 32
.size: 4
.value_kind: hidden_block_count_z
- .offset: 36
.size: 2
.value_kind: hidden_group_size_x
- .offset: 38
.size: 2
.value_kind: hidden_group_size_y
- .offset: 40
.size: 2
.value_kind: hidden_group_size_z
- .offset: 42
.size: 2
.value_kind: hidden_remainder_x
- .offset: 44
.size: 2
.value_kind: hidden_remainder_y
- .offset: 46
.size: 2
.value_kind: hidden_remainder_z
- .offset: 64
.size: 8
.value_kind: hidden_global_offset_x
- .offset: 72
.size: 8
.value_kind: hidden_global_offset_y
- .offset: 80
.size: 8
.value_kind: hidden_global_offset_z
- .offset: 88
.size: 2
.value_kind: hidden_grid_dims
.group_segment_fixed_size: 0
.kernarg_segment_align: 8
.kernarg_segment_size: 280
.language: OpenCL C
.language_version:
- 2
- 0
.max_flat_workgroup_size: 1024
.name: _Z27update_veloc_elastic_kernelPfPKfif
.private_segment_fixed_size: 0
.sgpr_count: 18
.sgpr_spill_count: 0
.symbol: _Z27update_veloc_elastic_kernelPfPKfif.kd
.uniform_work_group_size: 1
.uses_dynamic_stack: false
.vgpr_count: 9
.vgpr_spill_count: 0
.wavefront_size: 32
.workgroup_processor_mode: 1
amdhsa.target: amdgcn-amd-amdhsa--gfx1100
amdhsa.version:
- 1
- 2
...
.end_amdgpu_metadata |
You are a helpful coding assistant specialized in converting HIP source code to AMD host assembly. | #include <hip/hip_runtime.h>
#include "includes.h"
__global__ void update_veloc_elastic_kernel(float * veloc, const float * accel, const int size, const float deltatover2){
int id;
id = threadIdx.x + (blockIdx.x) * (blockDim.x) + (blockIdx.y) * ((gridDim.x) * (blockDim.x));
if (id < size) {
veloc[id] = veloc[id] + (deltatover2) * (accel[id]);
veloc[size + id] = veloc[size + id] + (deltatover2) * (accel[size + id]);
veloc[size + size + id] = veloc[size + size + id] + (deltatover2) * (accel[size + size + id]);
}
} | .text
.file "update_veloc_elastic_kernel.hip"
.globl _Z42__device_stub__update_veloc_elastic_kernelPfPKfif # -- Begin function _Z42__device_stub__update_veloc_elastic_kernelPfPKfif
.p2align 4, 0x90
.type _Z42__device_stub__update_veloc_elastic_kernelPfPKfif,@function
_Z42__device_stub__update_veloc_elastic_kernelPfPKfif: # @_Z42__device_stub__update_veloc_elastic_kernelPfPKfif
.cfi_startproc
# %bb.0:
subq $120, %rsp
.cfi_def_cfa_offset 128
movq %rdi, 72(%rsp)
movq %rsi, 64(%rsp)
movl %edx, 12(%rsp)
movss %xmm0, 8(%rsp)
leaq 72(%rsp), %rax
movq %rax, 80(%rsp)
leaq 64(%rsp), %rax
movq %rax, 88(%rsp)
leaq 12(%rsp), %rax
movq %rax, 96(%rsp)
leaq 8(%rsp), %rax
movq %rax, 104(%rsp)
leaq 48(%rsp), %rdi
leaq 32(%rsp), %rsi
leaq 24(%rsp), %rdx
leaq 16(%rsp), %rcx
callq __hipPopCallConfiguration
movq 48(%rsp), %rsi
movl 56(%rsp), %edx
movq 32(%rsp), %rcx
movl 40(%rsp), %r8d
leaq 80(%rsp), %r9
movl $_Z27update_veloc_elastic_kernelPfPKfif, %edi
pushq 16(%rsp)
.cfi_adjust_cfa_offset 8
pushq 32(%rsp)
.cfi_adjust_cfa_offset 8
callq hipLaunchKernel
addq $136, %rsp
.cfi_adjust_cfa_offset -136
retq
.Lfunc_end0:
.size _Z42__device_stub__update_veloc_elastic_kernelPfPKfif, .Lfunc_end0-_Z42__device_stub__update_veloc_elastic_kernelPfPKfif
.cfi_endproc
# -- End function
.p2align 4, 0x90 # -- Begin function __hip_module_ctor
.type __hip_module_ctor,@function
__hip_module_ctor: # @__hip_module_ctor
.cfi_startproc
# %bb.0:
subq $40, %rsp
.cfi_def_cfa_offset 48
cmpq $0, __hip_gpubin_handle(%rip)
jne .LBB1_2
# %bb.1:
movl $__hip_fatbin_wrapper, %edi
callq __hipRegisterFatBinary
movq %rax, __hip_gpubin_handle(%rip)
.LBB1_2:
movq __hip_gpubin_handle(%rip), %rdi
xorps %xmm0, %xmm0
movups %xmm0, 16(%rsp)
movups %xmm0, (%rsp)
movl $_Z27update_veloc_elastic_kernelPfPKfif, %esi
movl $.L__unnamed_1, %edx
movl $.L__unnamed_1, %ecx
movl $-1, %r8d
xorl %r9d, %r9d
callq __hipRegisterFunction
movl $__hip_module_dtor, %edi
addq $40, %rsp
.cfi_def_cfa_offset 8
jmp atexit # TAILCALL
.Lfunc_end1:
.size __hip_module_ctor, .Lfunc_end1-__hip_module_ctor
.cfi_endproc
# -- End function
.p2align 4, 0x90 # -- Begin function __hip_module_dtor
.type __hip_module_dtor,@function
__hip_module_dtor: # @__hip_module_dtor
.cfi_startproc
# %bb.0:
movq __hip_gpubin_handle(%rip), %rdi
testq %rdi, %rdi
je .LBB2_2
# %bb.1:
pushq %rax
.cfi_def_cfa_offset 16
callq __hipUnregisterFatBinary
movq $0, __hip_gpubin_handle(%rip)
addq $8, %rsp
.cfi_def_cfa_offset 8
.LBB2_2:
retq
.Lfunc_end2:
.size __hip_module_dtor, .Lfunc_end2-__hip_module_dtor
.cfi_endproc
# -- End function
.type _Z27update_veloc_elastic_kernelPfPKfif,@object # @_Z27update_veloc_elastic_kernelPfPKfif
.section .rodata,"a",@progbits
.globl _Z27update_veloc_elastic_kernelPfPKfif
.p2align 3, 0x0
_Z27update_veloc_elastic_kernelPfPKfif:
.quad _Z42__device_stub__update_veloc_elastic_kernelPfPKfif
.size _Z27update_veloc_elastic_kernelPfPKfif, 8
.type .L__unnamed_1,@object # @0
.section .rodata.str1.1,"aMS",@progbits,1
.L__unnamed_1:
.asciz "_Z27update_veloc_elastic_kernelPfPKfif"
.size .L__unnamed_1, 39
.type __hip_fatbin_wrapper,@object # @__hip_fatbin_wrapper
.section .hipFatBinSegment,"a",@progbits
.p2align 3, 0x0
__hip_fatbin_wrapper:
.long 1212764230 # 0x48495046
.long 1 # 0x1
.quad __hip_fatbin
.quad 0
.size __hip_fatbin_wrapper, 24
.type __hip_gpubin_handle,@object # @__hip_gpubin_handle
.local __hip_gpubin_handle
.comm __hip_gpubin_handle,8,8
.section .init_array,"aw",@init_array
.p2align 3, 0x0
.quad __hip_module_ctor
.type __hip_cuid_,@object # @__hip_cuid_
.bss
.globl __hip_cuid_
__hip_cuid_:
.byte 0 # 0x0
.size __hip_cuid_, 1
.section ".linker-options","e",@llvm_linker_options
.ident "AMD clang version 18.0.0git (https://github.com/RadeonOpenCompute/llvm-project roc-6.3.2 25012 e5bf7e55c91490b07c49d8960fa7983d864936c4)"
.section ".note.GNU-stack","",@progbits
.addrsig
.addrsig_sym _Z42__device_stub__update_veloc_elastic_kernelPfPKfif
.addrsig_sym __hip_module_ctor
.addrsig_sym __hip_module_dtor
.addrsig_sym _Z27update_veloc_elastic_kernelPfPKfif
.addrsig_sym __hip_fatbin
.addrsig_sym __hip_fatbin_wrapper
.addrsig_sym __hip_cuid_ |
You are a helpful coding assistant specialized in converting from CUDA device assembly to AMD device assembly. | code for sm_80
Function : _Z27update_veloc_elastic_kernelPfPKfif
.headerflags @"EF_CUDA_TEXMODE_UNIFIED EF_CUDA_64BIT_ADDRESS EF_CUDA_SM80 EF_CUDA_VIRTUAL_SM(EF_CUDA_SM80)"
/*0000*/ MOV R1, c[0x0][0x28] ; /* 0x00000a0000017a02 */
/* 0x000fe40000000f00 */
/*0010*/ S2R R0, SR_CTAID.Y ; /* 0x0000000000007919 */
/* 0x000e280000002600 */
/*0020*/ S2R R3, SR_CTAID.X ; /* 0x0000000000037919 */
/* 0x000e280000002500 */
/*0030*/ S2R R5, SR_TID.X ; /* 0x0000000000057919 */
/* 0x000e620000002100 */
/*0040*/ IMAD R0, R0, c[0x0][0xc], R3 ; /* 0x0000030000007a24 */
/* 0x001fc800078e0203 */
/*0050*/ IMAD R0, R0, c[0x0][0x0], R5 ; /* 0x0000000000007a24 */
/* 0x002fca00078e0205 */
/*0060*/ ISETP.GE.AND P0, PT, R0, c[0x0][0x170], PT ; /* 0x00005c0000007a0c */
/* 0x000fda0003f06270 */
/*0070*/ @P0 EXIT ; /* 0x000000000000094d */
/* 0x000fea0003800000 */
/*0080*/ HFMA2.MMA R17, -RZ, RZ, 0, 2.384185791015625e-07 ; /* 0x00000004ff117435 */
/* 0x000fe200000001ff */
/*0090*/ ULDC.64 UR4, c[0x0][0x118] ; /* 0x0000460000047ab9 */
/* 0x000fd20000000a00 */
/*00a0*/ IMAD.WIDE R2, R0, R17, c[0x0][0x160] ; /* 0x0000580000027625 */
/* 0x000fc800078e0211 */
/*00b0*/ IMAD.WIDE R4, R0, R17, c[0x0][0x168] ; /* 0x00005a0000047625 */
/* 0x000fe200078e0211 */
/*00c0*/ LDG.E R7, [R2.64] ; /* 0x0000000402077981 */
/* 0x000ea8000c1e1900 */
/*00d0*/ LDG.E R6, [R4.64] ; /* 0x0000000404067981 */
/* 0x000ea2000c1e1900 */
/*00e0*/ IMAD.WIDE R8, R17, c[0x0][0x170], R4 ; /* 0x00005c0011087a25 */
/* 0x000fe200078e0204 */
/*00f0*/ MOV R15, c[0x0][0x170] ; /* 0x00005c00000f7a02 */
/* 0x000fc60000000f00 */
/*0100*/ FFMA R13, R6, c[0x0][0x174], R7 ; /* 0x00005d00060d7a23 */
/* 0x004fe40000000007 */
/*0110*/ IMAD.WIDE R6, R17, c[0x0][0x170], R2 ; /* 0x00005c0011067a25 */
/* 0x000fc600078e0202 */
/*0120*/ STG.E [R2.64], R13 ; /* 0x0000000d02007986 */
/* 0x000fe8000c101904 */
/*0130*/ LDG.E R8, [R8.64] ; /* 0x0000000408087981 */
/* 0x000ea8000c1e1900 */
/*0140*/ LDG.E R11, [R6.64] ; /* 0x00000004060b7981 */
/* 0x000ea2000c1e1900 */
/*0150*/ LEA R0, R15, R0, 0x1 ; /* 0x000000000f007211 */
/* 0x000fca00078e08ff */
/*0160*/ IMAD.WIDE R4, R0, R17, c[0x0][0x160] ; /* 0x0000580000047625 */
/* 0x000fc800078e0211 */
/*0170*/ FFMA R15, R8, c[0x0][0x174], R11 ; /* 0x00005d00080f7a23 */
/* 0x004fe4000000000b */
/*0180*/ IMAD.WIDE R10, R0, R17, c[0x0][0x168] ; /* 0x00005a00000a7625 */
/* 0x000fc600078e0211 */
/*0190*/ STG.E [R6.64], R15 ; /* 0x0000000f06007986 */
/* 0x000fe8000c101904 */
/*01a0*/ LDG.E R10, [R10.64] ; /* 0x000000040a0a7981 */
/* 0x000ea8000c1e1900 */
/*01b0*/ LDG.E R17, [R4.64] ; /* 0x0000000404117981 */
/* 0x000ea4000c1e1900 */
/*01c0*/ FFMA R17, R10, c[0x0][0x174], R17 ; /* 0x00005d000a117a23 */
/* 0x004fca0000000011 */
/*01d0*/ STG.E [R4.64], R17 ; /* 0x0000001104007986 */
/* 0x000fe2000c101904 */
/*01e0*/ EXIT ; /* 0x000000000000794d */
/* 0x000fea0003800000 */
/*01f0*/ BRA 0x1f0; /* 0xfffffff000007947 */
/* 0x000fc0000383ffff */
/*0200*/ NOP; /* 0x0000000000007918 */
/* 0x000fc00000000000 */
/*0210*/ NOP; /* 0x0000000000007918 */
/* 0x000fc00000000000 */
/*0220*/ NOP; /* 0x0000000000007918 */
/* 0x000fc00000000000 */
/*0230*/ NOP; /* 0x0000000000007918 */
/* 0x000fc00000000000 */
/*0240*/ NOP; /* 0x0000000000007918 */
/* 0x000fc00000000000 */
/*0250*/ NOP; /* 0x0000000000007918 */
/* 0x000fc00000000000 */
/*0260*/ NOP; /* 0x0000000000007918 */
/* 0x000fc00000000000 */
/*0270*/ NOP; /* 0x0000000000007918 */
/* 0x000fc00000000000 */
.......... | .text
.amdgcn_target "amdgcn-amd-amdhsa--gfx1100"
.protected _Z27update_veloc_elastic_kernelPfPKfif
.globl _Z27update_veloc_elastic_kernelPfPKfif
.p2align 8
.type _Z27update_veloc_elastic_kernelPfPKfif,@function
_Z27update_veloc_elastic_kernelPfPKfif:
s_clause 0x2
s_load_b32 s3, s[0:1], 0x18
s_load_b32 s4, s[0:1], 0x24
s_load_b32 s2, s[0:1], 0x10
s_waitcnt lgkmcnt(0)
s_mul_i32 s3, s3, s15
s_and_b32 s4, s4, 0xffff
s_add_i32 s3, s3, s14
s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
v_mad_u64_u32 v[1:2], null, s3, s4, v[0:1]
s_mov_b32 s3, exec_lo
v_cmpx_gt_i32_e64 s2, v1
s_cbranch_execz .LBB0_2
s_load_b128 s[4:7], s[0:1], 0x0
v_ashrrev_i32_e32 v2, 31, v1
s_load_b32 s0, s[0:1], 0x14
s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
v_lshlrev_b64 v[2:3], 2, v[1:2]
s_waitcnt lgkmcnt(0)
v_add_co_u32 v4, vcc_lo, s4, v2
s_delay_alu instid0(VALU_DEP_2)
v_add_co_ci_u32_e32 v5, vcc_lo, s5, v3, vcc_lo
v_add_co_u32 v2, vcc_lo, s6, v2
v_add_co_ci_u32_e32 v3, vcc_lo, s7, v3, vcc_lo
global_load_b32 v0, v[4:5], off
global_load_b32 v8, v[2:3], off
v_add_nc_u32_e32 v2, s2, v1
s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
v_ashrrev_i32_e32 v3, 31, v2
v_lshlrev_b64 v[2:3], 2, v[2:3]
s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_2)
v_add_co_u32 v6, vcc_lo, s4, v2
v_add_co_ci_u32_e32 v7, vcc_lo, s5, v3, vcc_lo
v_add_co_u32 v2, vcc_lo, s6, v2
v_add_co_ci_u32_e32 v3, vcc_lo, s7, v3, vcc_lo
s_waitcnt vmcnt(0)
v_fmac_f32_e32 v0, s0, v8
global_store_b32 v[4:5], v0, off
global_load_b32 v4, v[6:7], off
global_load_b32 v5, v[2:3], off
v_lshl_add_u32 v0, s2, 1, v1
s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
v_ashrrev_i32_e32 v1, 31, v0
v_lshlrev_b64 v[0:1], 2, v[0:1]
s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_2)
v_add_co_u32 v2, vcc_lo, s4, v0
v_add_co_ci_u32_e32 v3, vcc_lo, s5, v1, vcc_lo
v_add_co_u32 v0, vcc_lo, s6, v0
v_add_co_ci_u32_e32 v1, vcc_lo, s7, v1, vcc_lo
s_waitcnt vmcnt(0)
v_fmac_f32_e32 v4, s0, v5
global_store_b32 v[6:7], v4, off
global_load_b32 v4, v[2:3], off
global_load_b32 v0, v[0:1], off
s_waitcnt vmcnt(0)
v_fmac_f32_e32 v4, s0, v0
global_store_b32 v[2:3], v4, off
.LBB0_2:
s_nop 0
s_sendmsg sendmsg(MSG_DEALLOC_VGPRS)
s_endpgm
.section .rodata,"a",@progbits
.p2align 6, 0x0
.amdhsa_kernel _Z27update_veloc_elastic_kernelPfPKfif
.amdhsa_group_segment_fixed_size 0
.amdhsa_private_segment_fixed_size 0
.amdhsa_kernarg_size 280
.amdhsa_user_sgpr_count 14
.amdhsa_user_sgpr_dispatch_ptr 0
.amdhsa_user_sgpr_queue_ptr 0
.amdhsa_user_sgpr_kernarg_segment_ptr 1
.amdhsa_user_sgpr_dispatch_id 0
.amdhsa_user_sgpr_private_segment_size 0
.amdhsa_wavefront_size32 1
.amdhsa_uses_dynamic_stack 0
.amdhsa_enable_private_segment 0
.amdhsa_system_sgpr_workgroup_id_x 1
.amdhsa_system_sgpr_workgroup_id_y 1
.amdhsa_system_sgpr_workgroup_id_z 0
.amdhsa_system_sgpr_workgroup_info 0
.amdhsa_system_vgpr_workitem_id 0
.amdhsa_next_free_vgpr 9
.amdhsa_next_free_sgpr 16
.amdhsa_float_round_mode_32 0
.amdhsa_float_round_mode_16_64 0
.amdhsa_float_denorm_mode_32 3
.amdhsa_float_denorm_mode_16_64 3
.amdhsa_dx10_clamp 1
.amdhsa_ieee_mode 1
.amdhsa_fp16_overflow 0
.amdhsa_workgroup_processor_mode 1
.amdhsa_memory_ordered 1
.amdhsa_forward_progress 0
.amdhsa_shared_vgpr_count 0
.amdhsa_exception_fp_ieee_invalid_op 0
.amdhsa_exception_fp_denorm_src 0
.amdhsa_exception_fp_ieee_div_zero 0
.amdhsa_exception_fp_ieee_overflow 0
.amdhsa_exception_fp_ieee_underflow 0
.amdhsa_exception_fp_ieee_inexact 0
.amdhsa_exception_int_div_zero 0
.end_amdhsa_kernel
.text
.Lfunc_end0:
.size _Z27update_veloc_elastic_kernelPfPKfif, .Lfunc_end0-_Z27update_veloc_elastic_kernelPfPKfif
.section .AMDGPU.csdata,"",@progbits
.text
.p2alignl 7, 3214868480
.fill 96, 4, 3214868480
.type __hip_cuid_,@object
.section .bss,"aw",@nobits
.globl __hip_cuid_
__hip_cuid_:
.byte 0
.size __hip_cuid_, 1
.ident "AMD clang version 18.0.0git (https://github.com/RadeonOpenCompute/llvm-project roc-6.3.2 25012 e5bf7e55c91490b07c49d8960fa7983d864936c4)"
.section ".note.GNU-stack","",@progbits
.addrsig
.addrsig_sym __hip_cuid_
.amdgpu_metadata
---
amdhsa.kernels:
- .args:
- .address_space: global
.offset: 0
.size: 8
.value_kind: global_buffer
- .address_space: global
.offset: 8
.size: 8
.value_kind: global_buffer
- .offset: 16
.size: 4
.value_kind: by_value
- .offset: 20
.size: 4
.value_kind: by_value
- .offset: 24
.size: 4
.value_kind: hidden_block_count_x
- .offset: 28
.size: 4
.value_kind: hidden_block_count_y
- .offset: 32
.size: 4
.value_kind: hidden_block_count_z
- .offset: 36
.size: 2
.value_kind: hidden_group_size_x
- .offset: 38
.size: 2
.value_kind: hidden_group_size_y
- .offset: 40
.size: 2
.value_kind: hidden_group_size_z
- .offset: 42
.size: 2
.value_kind: hidden_remainder_x
- .offset: 44
.size: 2
.value_kind: hidden_remainder_y
- .offset: 46
.size: 2
.value_kind: hidden_remainder_z
- .offset: 64
.size: 8
.value_kind: hidden_global_offset_x
- .offset: 72
.size: 8
.value_kind: hidden_global_offset_y
- .offset: 80
.size: 8
.value_kind: hidden_global_offset_z
- .offset: 88
.size: 2
.value_kind: hidden_grid_dims
.group_segment_fixed_size: 0
.kernarg_segment_align: 8
.kernarg_segment_size: 280
.language: OpenCL C
.language_version:
- 2
- 0
.max_flat_workgroup_size: 1024
.name: _Z27update_veloc_elastic_kernelPfPKfif
.private_segment_fixed_size: 0
.sgpr_count: 18
.sgpr_spill_count: 0
.symbol: _Z27update_veloc_elastic_kernelPfPKfif.kd
.uniform_work_group_size: 1
.uses_dynamic_stack: false
.vgpr_count: 9
.vgpr_spill_count: 0
.wavefront_size: 32
.workgroup_processor_mode: 1
amdhsa.target: amdgcn-amd-amdhsa--gfx1100
amdhsa.version:
- 1
- 2
...
.end_amdgpu_metadata |
You are a helpful coding assistant specialized in converting from CUDA host assembly to AMD host assembly. | .file "tmpxft_0018e294_00000000-6_update_veloc_elastic_kernel.cudafe1.cpp"
.text
#APP
#NO_APP
.type _ZL26__cudaUnregisterBinaryUtilv, @function
_ZL26__cudaUnregisterBinaryUtilv:
.LFB2029:
.cfi_startproc
endbr64
subq $8, %rsp
.cfi_def_cfa_offset 16
movq _ZL20__cudaFatCubinHandle(%rip), %rdi
call __cudaUnregisterFatBinary@PLT
addq $8, %rsp
.cfi_def_cfa_offset 8
ret
.cfi_endproc
.LFE2029:
.size _ZL26__cudaUnregisterBinaryUtilv, .-_ZL26__cudaUnregisterBinaryUtilv
.globl _Z52__device_stub__Z27update_veloc_elastic_kernelPfPKfifPfPKfif
.type _Z52__device_stub__Z27update_veloc_elastic_kernelPfPKfifPfPKfif, @function
_Z52__device_stub__Z27update_veloc_elastic_kernelPfPKfifPfPKfif:
.LFB2051:
.cfi_startproc
endbr64
subq $152, %rsp
.cfi_def_cfa_offset 160
movq %rdi, 24(%rsp)
movq %rsi, 16(%rsp)
movl %edx, 12(%rsp)
movss %xmm0, 8(%rsp)
movq %fs:40, %rax
movq %rax, 136(%rsp)
xorl %eax, %eax
leaq 24(%rsp), %rax
movq %rax, 96(%rsp)
leaq 16(%rsp), %rax
movq %rax, 104(%rsp)
leaq 12(%rsp), %rax
movq %rax, 112(%rsp)
leaq 8(%rsp), %rax
movq %rax, 120(%rsp)
movl $1, 48(%rsp)
movl $1, 52(%rsp)
movl $1, 56(%rsp)
movl $1, 60(%rsp)
movl $1, 64(%rsp)
movl $1, 68(%rsp)
leaq 40(%rsp), %rcx
leaq 32(%rsp), %rdx
leaq 60(%rsp), %rsi
leaq 48(%rsp), %rdi
call __cudaPopCallConfiguration@PLT
testl %eax, %eax
je .L7
.L3:
movq 136(%rsp), %rax
subq %fs:40, %rax
jne .L8
addq $152, %rsp
.cfi_remember_state
.cfi_def_cfa_offset 8
ret
.L7:
.cfi_restore_state
pushq 40(%rsp)
.cfi_def_cfa_offset 168
pushq 40(%rsp)
.cfi_def_cfa_offset 176
leaq 112(%rsp), %r9
movq 76(%rsp), %rcx
movl 84(%rsp), %r8d
movq 64(%rsp), %rsi
movl 72(%rsp), %edx
leaq _Z27update_veloc_elastic_kernelPfPKfif(%rip), %rdi
call cudaLaunchKernel@PLT
addq $16, %rsp
.cfi_def_cfa_offset 160
jmp .L3
.L8:
call __stack_chk_fail@PLT
.cfi_endproc
.LFE2051:
.size _Z52__device_stub__Z27update_veloc_elastic_kernelPfPKfifPfPKfif, .-_Z52__device_stub__Z27update_veloc_elastic_kernelPfPKfifPfPKfif
.globl _Z27update_veloc_elastic_kernelPfPKfif
.type _Z27update_veloc_elastic_kernelPfPKfif, @function
_Z27update_veloc_elastic_kernelPfPKfif:
.LFB2052:
.cfi_startproc
endbr64
subq $8, %rsp
.cfi_def_cfa_offset 16
call _Z52__device_stub__Z27update_veloc_elastic_kernelPfPKfifPfPKfif
addq $8, %rsp
.cfi_def_cfa_offset 8
ret
.cfi_endproc
.LFE2052:
.size _Z27update_veloc_elastic_kernelPfPKfif, .-_Z27update_veloc_elastic_kernelPfPKfif
.section .rodata.str1.8,"aMS",@progbits,1
.align 8
.LC0:
.string "_Z27update_veloc_elastic_kernelPfPKfif"
.text
.type _ZL24__sti____cudaRegisterAllv, @function
_ZL24__sti____cudaRegisterAllv:
.LFB2054:
.cfi_startproc
endbr64
subq $8, %rsp
.cfi_def_cfa_offset 16
leaq _ZL15__fatDeviceText(%rip), %rdi
call __cudaRegisterFatBinary@PLT
movq %rax, %rdi
movq %rax, _ZL20__cudaFatCubinHandle(%rip)
pushq $0
.cfi_def_cfa_offset 24
pushq $0
.cfi_def_cfa_offset 32
pushq $0
.cfi_def_cfa_offset 40
pushq $0
.cfi_def_cfa_offset 48
movl $0, %r9d
movl $-1, %r8d
leaq .LC0(%rip), %rdx
movq %rdx, %rcx
leaq _Z27update_veloc_elastic_kernelPfPKfif(%rip), %rsi
call __cudaRegisterFunction@PLT
addq $32, %rsp
.cfi_def_cfa_offset 16
movq _ZL20__cudaFatCubinHandle(%rip), %rdi
call __cudaRegisterFatBinaryEnd@PLT
leaq _ZL26__cudaUnregisterBinaryUtilv(%rip), %rdi
call atexit@PLT
addq $8, %rsp
.cfi_def_cfa_offset 8
ret
.cfi_endproc
.LFE2054:
.size _ZL24__sti____cudaRegisterAllv, .-_ZL24__sti____cudaRegisterAllv
.section .init_array,"aw"
.align 8
.quad _ZL24__sti____cudaRegisterAllv
.section .nvFatBinSegment,"aw"
.align 8
.type _ZL15__fatDeviceText, @object
.size _ZL15__fatDeviceText, 24
_ZL15__fatDeviceText:
.long 1180844977
.long 1
.quad fatbinData
.quad 0
.local _ZL20__cudaFatCubinHandle
.comm _ZL20__cudaFatCubinHandle,8,8
.ident "GCC: (Ubuntu 13.3.0-6ubuntu2~24.04) 13.3.0"
.section .note.GNU-stack,"",@progbits
.section .note.gnu.property,"a"
.align 8
.long 1f - 0f
.long 4f - 1f
.long 5
0:
.string "GNU"
1:
.align 8
.long 0xc0000002
.long 3f - 2f
2:
.long 0x3
3:
.align 8
4: | .text
.file "update_veloc_elastic_kernel.hip"
.globl _Z42__device_stub__update_veloc_elastic_kernelPfPKfif # -- Begin function _Z42__device_stub__update_veloc_elastic_kernelPfPKfif
.p2align 4, 0x90
.type _Z42__device_stub__update_veloc_elastic_kernelPfPKfif,@function
_Z42__device_stub__update_veloc_elastic_kernelPfPKfif: # @_Z42__device_stub__update_veloc_elastic_kernelPfPKfif
.cfi_startproc
# %bb.0:
subq $120, %rsp
.cfi_def_cfa_offset 128
movq %rdi, 72(%rsp)
movq %rsi, 64(%rsp)
movl %edx, 12(%rsp)
movss %xmm0, 8(%rsp)
leaq 72(%rsp), %rax
movq %rax, 80(%rsp)
leaq 64(%rsp), %rax
movq %rax, 88(%rsp)
leaq 12(%rsp), %rax
movq %rax, 96(%rsp)
leaq 8(%rsp), %rax
movq %rax, 104(%rsp)
leaq 48(%rsp), %rdi
leaq 32(%rsp), %rsi
leaq 24(%rsp), %rdx
leaq 16(%rsp), %rcx
callq __hipPopCallConfiguration
movq 48(%rsp), %rsi
movl 56(%rsp), %edx
movq 32(%rsp), %rcx
movl 40(%rsp), %r8d
leaq 80(%rsp), %r9
movl $_Z27update_veloc_elastic_kernelPfPKfif, %edi
pushq 16(%rsp)
.cfi_adjust_cfa_offset 8
pushq 32(%rsp)
.cfi_adjust_cfa_offset 8
callq hipLaunchKernel
addq $136, %rsp
.cfi_adjust_cfa_offset -136
retq
.Lfunc_end0:
.size _Z42__device_stub__update_veloc_elastic_kernelPfPKfif, .Lfunc_end0-_Z42__device_stub__update_veloc_elastic_kernelPfPKfif
.cfi_endproc
# -- End function
.p2align 4, 0x90 # -- Begin function __hip_module_ctor
.type __hip_module_ctor,@function
__hip_module_ctor: # @__hip_module_ctor
.cfi_startproc
# %bb.0:
subq $40, %rsp
.cfi_def_cfa_offset 48
cmpq $0, __hip_gpubin_handle(%rip)
jne .LBB1_2
# %bb.1:
movl $__hip_fatbin_wrapper, %edi
callq __hipRegisterFatBinary
movq %rax, __hip_gpubin_handle(%rip)
.LBB1_2:
movq __hip_gpubin_handle(%rip), %rdi
xorps %xmm0, %xmm0
movups %xmm0, 16(%rsp)
movups %xmm0, (%rsp)
movl $_Z27update_veloc_elastic_kernelPfPKfif, %esi
movl $.L__unnamed_1, %edx
movl $.L__unnamed_1, %ecx
movl $-1, %r8d
xorl %r9d, %r9d
callq __hipRegisterFunction
movl $__hip_module_dtor, %edi
addq $40, %rsp
.cfi_def_cfa_offset 8
jmp atexit # TAILCALL
.Lfunc_end1:
.size __hip_module_ctor, .Lfunc_end1-__hip_module_ctor
.cfi_endproc
# -- End function
.p2align 4, 0x90 # -- Begin function __hip_module_dtor
.type __hip_module_dtor,@function
__hip_module_dtor: # @__hip_module_dtor
.cfi_startproc
# %bb.0:
movq __hip_gpubin_handle(%rip), %rdi
testq %rdi, %rdi
je .LBB2_2
# %bb.1:
pushq %rax
.cfi_def_cfa_offset 16
callq __hipUnregisterFatBinary
movq $0, __hip_gpubin_handle(%rip)
addq $8, %rsp
.cfi_def_cfa_offset 8
.LBB2_2:
retq
.Lfunc_end2:
.size __hip_module_dtor, .Lfunc_end2-__hip_module_dtor
.cfi_endproc
# -- End function
.type _Z27update_veloc_elastic_kernelPfPKfif,@object # @_Z27update_veloc_elastic_kernelPfPKfif
.section .rodata,"a",@progbits
.globl _Z27update_veloc_elastic_kernelPfPKfif
.p2align 3, 0x0
_Z27update_veloc_elastic_kernelPfPKfif:
.quad _Z42__device_stub__update_veloc_elastic_kernelPfPKfif
.size _Z27update_veloc_elastic_kernelPfPKfif, 8
.type .L__unnamed_1,@object # @0
.section .rodata.str1.1,"aMS",@progbits,1
.L__unnamed_1:
.asciz "_Z27update_veloc_elastic_kernelPfPKfif"
.size .L__unnamed_1, 39
.type __hip_fatbin_wrapper,@object # @__hip_fatbin_wrapper
.section .hipFatBinSegment,"a",@progbits
.p2align 3, 0x0
__hip_fatbin_wrapper:
.long 1212764230 # 0x48495046
.long 1 # 0x1
.quad __hip_fatbin
.quad 0
.size __hip_fatbin_wrapper, 24
.type __hip_gpubin_handle,@object # @__hip_gpubin_handle
.local __hip_gpubin_handle
.comm __hip_gpubin_handle,8,8
.section .init_array,"aw",@init_array
.p2align 3, 0x0
.quad __hip_module_ctor
.type __hip_cuid_,@object # @__hip_cuid_
.bss
.globl __hip_cuid_
__hip_cuid_:
.byte 0 # 0x0
.size __hip_cuid_, 1
.section ".linker-options","e",@llvm_linker_options
.ident "AMD clang version 18.0.0git (https://github.com/RadeonOpenCompute/llvm-project roc-6.3.2 25012 e5bf7e55c91490b07c49d8960fa7983d864936c4)"
.section ".note.GNU-stack","",@progbits
.addrsig
.addrsig_sym _Z42__device_stub__update_veloc_elastic_kernelPfPKfif
.addrsig_sym __hip_module_ctor
.addrsig_sym __hip_module_dtor
.addrsig_sym _Z27update_veloc_elastic_kernelPfPKfif
.addrsig_sym __hip_fatbin
.addrsig_sym __hip_fatbin_wrapper
.addrsig_sym __hip_cuid_ |
You are a helpful coding assistant specialized in converting CUDA source code to CUDA device assembly. | #include <stdio.h>
// function to add the elements of two arrays
__global__
void add(int n, float *x, float *y)
{
for (int i = 0; i < n; i++)
y[i] = x[i] + y[i];
}
int main()
{
int N = 1000000; // 1M elements
float *x, *y;
cudaMallocManaged(&x, N*sizeof(float));
cudaMallocManaged(&y, N*sizeof(float));
// initialize x and y arrays on the host
for (int i = 0; i < N; i++) {
x[i] = 1.0;
y[i] = 2.0;
}
// Run kernel on 1M elements on the CPU
add<<<1, 1>>>(N, x, y);
// Wait for GPU to finish before accessing on host
cudaDeviceSynchronize();
// Check for errors (all values should be 3.0f)
float maxError = 0.0;
for(int i = 0; i < N; i++){
maxError = fmax(maxError, fabs(y[i]-3.0));
}
printf("Max error: %f\n",maxError);
// Free memory
cudaFree(x);
cudaFree(y);
} | code for sm_80
Function : _Z3addiPfS_
.headerflags @"EF_CUDA_TEXMODE_UNIFIED EF_CUDA_64BIT_ADDRESS EF_CUDA_SM80 EF_CUDA_VIRTUAL_SM(EF_CUDA_SM80)"
/*0000*/ MOV R1, c[0x0][0x28] ; /* 0x00000a0000017a02 */
/* 0x000fe40000000f00 */
/*0010*/ IMAD.MOV.U32 R0, RZ, RZ, c[0x0][0x160] ; /* 0x00005800ff007624 */
/* 0x000fca00078e00ff */
/*0020*/ ISETP.GE.AND P0, PT, R0, 0x1, PT ; /* 0x000000010000780c */
/* 0x000fda0003f06270 */
/*0030*/ @!P0 EXIT ; /* 0x000000000000894d */
/* 0x000fea0003800000 */
/*0040*/ IADD3 R2, R0.reuse, -0x1, RZ ; /* 0xffffffff00027810 */
/* 0x040fe20007ffe0ff */
/*0050*/ UMOV UR4, URZ ; /* 0x0000003f00047c82 */
/* 0x000fe20008000000 */
/*0060*/ LOP3.LUT R0, R0, 0x3, RZ, 0xc0, !PT ; /* 0x0000000300007812 */
/* 0x000fe200078ec0ff */
/*0070*/ ULDC.64 UR10, c[0x0][0x118] ; /* 0x00004600000a7ab9 */
/* 0x000fe20000000a00 */
/*0080*/ ISETP.GE.U32.AND P0, PT, R2, 0x3, PT ; /* 0x000000030200780c */
/* 0x000fda0003f06070 */
/*0090*/ @!P0 BRA 0xaa0 ; /* 0x00000a0000008947 */
/* 0x000fea0003800000 */
/*00a0*/ IADD3 R6, -R0, c[0x0][0x160], RZ ; /* 0x0000580000067a10 */
/* 0x000fe20007ffe1ff */
/*00b0*/ UMOV UR4, URZ ; /* 0x0000003f00047c82 */
/* 0x000fe20008000000 */
/*00c0*/ MOV R4, c[0x0][0x170] ; /* 0x00005c0000047a02 */
/* 0x000fe20000000f00 */
/*00d0*/ IMAD.MOV.U32 R5, RZ, RZ, c[0x0][0x174] ; /* 0x00005d00ff057624 */
/* 0x000fe200078e00ff */
/*00e0*/ ISETP.GT.AND P0, PT, R6, RZ, PT ; /* 0x000000ff0600720c */
/* 0x000fe20003f04270 */
/*00f0*/ IMAD.MOV.U32 R3, RZ, RZ, c[0x0][0x16c] ; /* 0x00005b00ff037624 */
/* 0x000fe200078e00ff */
/*0100*/ MOV R2, c[0x0][0x168] ; /* 0x00005a0000027a02 */
/* 0x000fd60000000f00 */
/*0110*/ @!P0 BRA 0x8f0 ; /* 0x000007d000008947 */
/* 0x000fea0003800000 */
/*0120*/ ISETP.GT.AND P1, PT, R6, 0xc, PT ; /* 0x0000000c0600780c */
/* 0x000fe40003f24270 */
/*0130*/ PLOP3.LUT P0, PT, PT, PT, PT, 0x80, 0x0 ; /* 0x000000000000781c */
/* 0x000fd60003f0f070 */
/*0140*/ @!P1 BRA 0x610 ; /* 0x000004c000009947 */
/* 0x000fea0003800000 */
/*0150*/ PLOP3.LUT P0, PT, PT, PT, PT, 0x8, 0x0 ; /* 0x000000000000781c */
/* 0x000fe40003f0e170 */
/*0160*/ LDG.E R7, [R4.64] ; /* 0x0000000a04077981 */
/* 0x000ea8000c1e1900 */
/*0170*/ LDG.E R8, [R2.64] ; /* 0x0000000a02087981 */
/* 0x000ea4000c1e1900 */
/*0180*/ FADD R7, R7, R8 ; /* 0x0000000807077221 */
/* 0x004fe40000000000 */
/*0190*/ LDG.E R8, [R4.64+0x4] ; /* 0x0000040a04087981 */
/* 0x000ea8000c1e1900 */
/*01a0*/ STG.E [R4.64], R7 ; /* 0x0000000704007986 */
/* 0x0001e8000c10190a */
/*01b0*/ LDG.E R9, [R2.64+0x4] ; /* 0x0000040a02097981 */
/* 0x000ea8000c1e1900 */
/*01c0*/ LDG.E R7, [R4.64+0x10] ; /* 0x0000100a04077981 */
/* 0x001ee2000c1e1900 */
/*01d0*/ FADD R9, R8, R9 ; /* 0x0000000908097221 */
/* 0x004fc60000000000 */
/*01e0*/ LDG.E R8, [R4.64+0x8] ; /* 0x0000080a04087981 */
/* 0x000ea8000c1e1900 */
/*01f0*/ STG.E [R4.64+0x4], R9 ; /* 0x0000040904007986 */
/* 0x0001e8000c10190a */
/*0200*/ LDG.E R11, [R2.64+0x8] ; /* 0x0000080a020b7981 */
/* 0x000ea4000c1e1900 */
/*0210*/ FADD R11, R8, R11 ; /* 0x0000000b080b7221 */
/* 0x004fc40000000000 */
/*0220*/ LDG.E R8, [R4.64+0xc] ; /* 0x00000c0a04087981 */
/* 0x000ea8000c1e1900 */
/*0230*/ STG.E [R4.64+0x8], R11 ; /* 0x0000080b04007986 */
/* 0x000fe8000c10190a */
/*0240*/ LDG.E R13, [R2.64+0xc] ; /* 0x00000c0a020d7981 */
/* 0x000ea4000c1e1900 */
/*0250*/ FADD R13, R8, R13 ; /* 0x0000000d080d7221 */
/* 0x004fca0000000000 */
/*0260*/ STG.E [R4.64+0xc], R13 ; /* 0x00000c0d04007986 */
/* 0x000fe8000c10190a */
/*0270*/ LDG.E R8, [R2.64+0x10] ; /* 0x0000100a02087981 */
/* 0x000ee4000c1e1900 */
/*0280*/ FADD R7, R7, R8 ; /* 0x0000000807077221 */
/* 0x008fe40000000000 */
/*0290*/ LDG.E R8, [R4.64+0x14] ; /* 0x0000140a04087981 */
/* 0x000ea8000c1e1900 */
/*02a0*/ STG.E [R4.64+0x10], R7 ; /* 0x0000100704007986 */
/* 0x0003e8000c10190a */
/*02b0*/ LDG.E R9, [R2.64+0x14] ; /* 0x0000140a02097981 */
/* 0x001ea8000c1e1900 */
/*02c0*/ LDG.E R7, [R4.64+0x20] ; /* 0x0000200a04077981 */
/* 0x002ee2000c1e1900 */
/*02d0*/ FADD R9, R8, R9 ; /* 0x0000000908097221 */
/* 0x004fc60000000000 */
/*02e0*/ LDG.E R8, [R4.64+0x18] ; /* 0x0000180a04087981 */
/* 0x000ea8000c1e1900 */
/*02f0*/ STG.E [R4.64+0x14], R9 ; /* 0x0000140904007986 */
/* 0x0001e8000c10190a */
/*0300*/ LDG.E R11, [R2.64+0x18] ; /* 0x0000180a020b7981 */
/* 0x000ea4000c1e1900 */
/*0310*/ FADD R11, R8, R11 ; /* 0x0000000b080b7221 */
/* 0x004fc40000000000 */
/*0320*/ LDG.E R8, [R4.64+0x1c] ; /* 0x00001c0a04087981 */
/* 0x000ea8000c1e1900 */
/*0330*/ STG.E [R4.64+0x18], R11 ; /* 0x0000180b04007986 */
/* 0x000fe8000c10190a */
/*0340*/ LDG.E R13, [R2.64+0x1c] ; /* 0x00001c0a020d7981 */
/* 0x000ea4000c1e1900 */
/*0350*/ FADD R13, R8, R13 ; /* 0x0000000d080d7221 */
/* 0x004fca0000000000 */
/*0360*/ STG.E [R4.64+0x1c], R13 ; /* 0x00001c0d04007986 */
/* 0x000fe8000c10190a */
/*0370*/ LDG.E R8, [R2.64+0x20] ; /* 0x0000200a02087981 */
/* 0x000ee4000c1e1900 */
/*0380*/ FADD R7, R7, R8 ; /* 0x0000000807077221 */
/* 0x008fe40000000000 */
/*0390*/ LDG.E R8, [R4.64+0x24] ; /* 0x0000240a04087981 */
/* 0x000ea8000c1e1900 */
/*03a0*/ STG.E [R4.64+0x20], R7 ; /* 0x0000200704007986 */
/* 0x0003e8000c10190a */
/*03b0*/ LDG.E R9, [R2.64+0x24] ; /* 0x0000240a02097981 */
/* 0x001ea8000c1e1900 */
/*03c0*/ LDG.E R7, [R4.64+0x30] ; /* 0x0000300a04077981 */
/* 0x002ee2000c1e1900 */
/*03d0*/ FADD R9, R8, R9 ; /* 0x0000000908097221 */
/* 0x004fc60000000000 */
/*03e0*/ LDG.E R8, [R4.64+0x28] ; /* 0x0000280a04087981 */
/* 0x000ea8000c1e1900 */
/*03f0*/ STG.E [R4.64+0x24], R9 ; /* 0x0000240904007986 */
/* 0x0001e8000c10190a */
/*0400*/ LDG.E R11, [R2.64+0x28] ; /* 0x0000280a020b7981 */
/* 0x000ea4000c1e1900 */
/*0410*/ FADD R11, R8, R11 ; /* 0x0000000b080b7221 */
/* 0x004fc40000000000 */
/*0420*/ LDG.E R8, [R4.64+0x2c] ; /* 0x00002c0a04087981 */
/* 0x000ea8000c1e1900 */
/*0430*/ STG.E [R4.64+0x28], R11 ; /* 0x0000280b04007986 */
/* 0x0003e8000c10190a */
/*0440*/ LDG.E R13, [R2.64+0x2c] ; /* 0x00002c0a020d7981 */
/* 0x000ea4000c1e1900 */
/*0450*/ FADD R13, R8, R13 ; /* 0x0000000d080d7221 */
/* 0x004fca0000000000 */
/*0460*/ STG.E [R4.64+0x2c], R13 ; /* 0x00002c0d04007986 */
/* 0x0005e8000c10190a */
/*0470*/ LDG.E R8, [R2.64+0x30] ; /* 0x0000300a02087981 */
/* 0x000ee4000c1e1900 */
/*0480*/ FADD R7, R7, R8 ; /* 0x0000000807077221 */
/* 0x008fe40000000000 */
/*0490*/ LDG.E R8, [R4.64+0x34] ; /* 0x0000340a04087981 */
/* 0x000ee8000c1e1900 */
/*04a0*/ STG.E [R4.64+0x30], R7 ; /* 0x0000300704007986 */
/* 0x0009e8000c10190a */
/*04b0*/ LDG.E R9, [R2.64+0x34] ; /* 0x0000340a02097981 */
/* 0x001ee4000c1e1900 */
/*04c0*/ FADD R9, R8, R9 ; /* 0x0000000908097221 */
/* 0x008fc40000000000 */
/*04d0*/ LDG.E R8, [R4.64+0x38] ; /* 0x0000380a04087981 */
/* 0x000ee8000c1e1900 */
/*04e0*/ STG.E [R4.64+0x34], R9 ; /* 0x0000340904007986 */
/* 0x000fe8000c10190a */
/*04f0*/ LDG.E R11, [R2.64+0x38] ; /* 0x0000380a020b7981 */
/* 0x002ee2000c1e1900 */
/*0500*/ IADD3 R6, R6, -0x10, RZ ; /* 0xfffffff006067810 */
/* 0x000fe20007ffe0ff */
/*0510*/ FADD R11, R8, R11 ; /* 0x0000000b080b7221 */
/* 0x008fc40000000000 */
/*0520*/ LDG.E R8, [R4.64+0x3c] ; /* 0x00003c0a04087981 */
/* 0x000ee8000c1e1900 */
/*0530*/ STG.E [R4.64+0x38], R11 ; /* 0x0000380b04007986 */
/* 0x000fe8000c10190a */
/*0540*/ LDG.E R13, [R2.64+0x3c] ; /* 0x00003c0a020d7981 */
/* 0x0040e2000c1e1900 */
/*0550*/ ISETP.GT.AND P1, PT, R6, 0xc, PT ; /* 0x0000000c0600780c */
/* 0x000fe40003f24270 */
/*0560*/ IADD3 R7, P3, R4, 0x40, RZ ; /* 0x0000004004077810 */
/* 0x010fe20007f7e0ff */
/*0570*/ UIADD3 UR4, UR4, 0x10, URZ ; /* 0x0000001004047890 */
/* 0x000fe2000fffe03f */
/*0580*/ IADD3 R10, P2, R2, 0x40, RZ ; /* 0x00000040020a7810 */
/* 0x000fc80007f5e0ff */
/*0590*/ IADD3.X R3, RZ, R3, RZ, P2, !PT ; /* 0x00000003ff037210 */
/* 0x001fe400017fe4ff */
/*05a0*/ MOV R2, R10 ; /* 0x0000000a00027202 */
/* 0x000fe20000000f00 */
/*05b0*/ FADD R13, R8, R13 ; /* 0x0000000d080d7221 */
/* 0x008fe40000000000 */
/*05c0*/ IMAD.X R8, RZ, RZ, R5, P3 ; /* 0x000000ffff087224 */
/* 0x000fc600018e0605 */
/*05d0*/ STG.E [R4.64+0x3c], R13 ; /* 0x00003c0d04007986 */
/* 0x0001e4000c10190a */
/*05e0*/ IMAD.MOV.U32 R4, RZ, RZ, R7 ; /* 0x000000ffff047224 */
/* 0x001fe200078e0007 */
/*05f0*/ MOV R5, R8 ; /* 0x0000000800057202 */
/* 0x000fe20000000f00 */
/*0600*/ @P1 BRA 0x160 ; /* 0xfffffb5000001947 */
/* 0x000fea000383ffff */
/*0610*/ ISETP.GT.AND P1, PT, R6, 0x4, PT ; /* 0x000000040600780c */
/* 0x000fda0003f24270 */
/*0620*/ @!P1 BRA 0x8d0 ; /* 0x000002a000009947 */
/* 0x000fea0003800000 */
/*0630*/ LDG.E R7, [R4.64] ; /* 0x0000000a04077981 */
/* 0x000ea8000c1e1900 */
/*0640*/ LDG.E R8, [R2.64] ; /* 0x0000000a02087981 */
/* 0x000ea4000c1e1900 */
/*0650*/ FADD R7, R7, R8 ; /* 0x0000000807077221 */
/* 0x004fe40000000000 */
/*0660*/ LDG.E R8, [R4.64+0x4] ; /* 0x0000040a04087981 */
/* 0x000ea8000c1e1900 */
/*0670*/ STG.E [R4.64], R7 ; /* 0x0000000704007986 */
/* 0x0001e8000c10190a */
/*0680*/ LDG.E R9, [R2.64+0x4] ; /* 0x0000040a02097981 */
/* 0x000ea8000c1e1900 */
/*0690*/ LDG.E R7, [R4.64+0x10] ; /* 0x0000100a04077981 */
/* 0x001ee2000c1e1900 */
/*06a0*/ FADD R9, R8, R9 ; /* 0x0000000908097221 */
/* 0x004fc60000000000 */
/*06b0*/ LDG.E R8, [R4.64+0x8] ; /* 0x0000080a04087981 */
/* 0x000ea8000c1e1900 */
/*06c0*/ STG.E [R4.64+0x4], R9 ; /* 0x0000040904007986 */
/* 0x0001e8000c10190a */
/*06d0*/ LDG.E R11, [R2.64+0x8] ; /* 0x0000080a020b7981 */
/* 0x000ea4000c1e1900 */
/*06e0*/ FADD R11, R8, R11 ; /* 0x0000000b080b7221 */
/* 0x004fc40000000000 */
/*06f0*/ LDG.E R8, [R4.64+0xc] ; /* 0x00000c0a04087981 */
/* 0x000ea8000c1e1900 */
/*0700*/ STG.E [R4.64+0x8], R11 ; /* 0x0000080b04007986 */
/* 0x0003e8000c10190a */
/*0710*/ LDG.E R13, [R2.64+0xc] ; /* 0x00000c0a020d7981 */
/* 0x000ea4000c1e1900 */
/*0720*/ FADD R13, R8, R13 ; /* 0x0000000d080d7221 */
/* 0x004fca0000000000 */
/*0730*/ STG.E [R4.64+0xc], R13 ; /* 0x00000c0d04007986 */
/* 0x0005e8000c10190a */
/*0740*/ LDG.E R8, [R2.64+0x10] ; /* 0x0000100a02087981 */
/* 0x000ee4000c1e1900 */
/*0750*/ FADD R7, R7, R8 ; /* 0x0000000807077221 */
/* 0x008fe40000000000 */
/*0760*/ LDG.E R8, [R4.64+0x14] ; /* 0x0000140a04087981 */
/* 0x000ee8000c1e1900 */
/*0770*/ STG.E [R4.64+0x10], R7 ; /* 0x0000100704007986 */
/* 0x0009e8000c10190a */
/*0780*/ LDG.E R9, [R2.64+0x14] ; /* 0x0000140a02097981 */
/* 0x001ee4000c1e1900 */
/*0790*/ FADD R9, R8, R9 ; /* 0x0000000908097221 */
/* 0x008fc40000000000 */
/*07a0*/ LDG.E R8, [R4.64+0x18] ; /* 0x0000180a04087981 */
/* 0x000ee8000c1e1900 */
/*07b0*/ STG.E [R4.64+0x14], R9 ; /* 0x0000140904007986 */
/* 0x000fe8000c10190a */
/*07c0*/ LDG.E R11, [R2.64+0x18] ; /* 0x0000180a020b7981 */
/* 0x002ee4000c1e1900 */
/*07d0*/ FADD R11, R8, R11 ; /* 0x0000000b080b7221 */
/* 0x008fc40000000000 */
/*07e0*/ LDG.E R8, [R4.64+0x1c] ; /* 0x00001c0a04087981 */
/* 0x000ee8000c1e1900 */
/*07f0*/ STG.E [R4.64+0x18], R11 ; /* 0x0000180b04007986 */
/* 0x000fe8000c10190a */
/*0800*/ LDG.E R13, [R2.64+0x1c] ; /* 0x00001c0a020d7981 */
/* 0x0040e2000c1e1900 */
/*0810*/ IADD3 R7, P2, R4, 0x20, RZ ; /* 0x0000002004077810 */
/* 0x010fe40007f5e0ff */
/*0820*/ IADD3 R10, P1, R2, 0x20, RZ ; /* 0x00000020020a7810 */
/* 0x000fc40007f3e0ff */
/*0830*/ PLOP3.LUT P0, PT, PT, PT, PT, 0x8, 0x0 ; /* 0x000000000000781c */
/* 0x000fe40003f0e170 */
/*0840*/ IADD3 R6, R6, -0x8, RZ ; /* 0xfffffff806067810 */
/* 0x000fe20007ffe0ff */
/*0850*/ IMAD.X R3, RZ, RZ, R3, P1 ; /* 0x000000ffff037224 */
/* 0x001fe400008e0603 */
/*0860*/ IMAD.MOV.U32 R2, RZ, RZ, R10 ; /* 0x000000ffff027224 */
/* 0x000fe200078e000a */
/*0870*/ UIADD3 UR4, UR4, 0x8, URZ ; /* 0x0000000804047890 */
/* 0x000fe2000fffe03f */
/*0880*/ FADD R13, R8, R13 ; /* 0x0000000d080d7221 */
/* 0x008fe20000000000 */
/*0890*/ IADD3.X R8, RZ, R5, RZ, P2, !PT ; /* 0x00000005ff087210 */
/* 0x000fc800017fe4ff */
/*08a0*/ STG.E [R4.64+0x1c], R13 ; /* 0x00001c0d04007986 */
/* 0x0001e4000c10190a */
/*08b0*/ MOV R4, R7 ; /* 0x0000000700047202 */
/* 0x001fe20000000f00 */
/*08c0*/ IMAD.MOV.U32 R5, RZ, RZ, R8 ; /* 0x000000ffff057224 */
/* 0x000fe400078e0008 */
/*08d0*/ ISETP.NE.OR P0, PT, R6, RZ, P0 ; /* 0x000000ff0600720c */
/* 0x000fda0000705670 */
/*08e0*/ @!P0 BRA 0xaa0 ; /* 0x000001b000008947 */
/* 0x000fea0003800000 */
/*08f0*/ LDG.E R7, [R4.64] ; /* 0x0000000a04077981 */
/* 0x000ea8000c1e1900 */
/*0900*/ LDG.E R8, [R2.64] ; /* 0x0000000a02087981 */
/* 0x000ea4000c1e1900 */
/*0910*/ FADD R7, R7, R8 ; /* 0x0000000807077221 */
/* 0x004fe40000000000 */
/*0920*/ LDG.E R8, [R4.64+0x4] ; /* 0x0000040a04087981 */
/* 0x000ea8000c1e1900 */
/*0930*/ STG.E [R4.64], R7 ; /* 0x0000000704007986 */
/* 0x0001e8000c10190a */
/*0940*/ LDG.E R9, [R2.64+0x4] ; /* 0x0000040a02097981 */
/* 0x000ea4000c1e1900 */
/*0950*/ FADD R9, R8, R9 ; /* 0x0000000908097221 */
/* 0x004fc40000000000 */
/*0960*/ LDG.E R8, [R4.64+0x8] ; /* 0x0000080a04087981 */
/* 0x000ea8000c1e1900 */
/*0970*/ STG.E [R4.64+0x4], R9 ; /* 0x0000040904007986 */
/* 0x000fe8000c10190a */
/*0980*/ LDG.E R11, [R2.64+0x8] ; /* 0x0000080a020b7981 */
/* 0x000ea2000c1e1900 */
/*0990*/ IADD3 R6, R6, -0x4, RZ ; /* 0xfffffffc06067810 */
/* 0x000fe20007ffe0ff */
/*09a0*/ FADD R11, R8, R11 ; /* 0x0000000b080b7221 */
/* 0x004fc40000000000 */
/*09b0*/ LDG.E R8, [R4.64+0xc] ; /* 0x00000c0a04087981 */
/* 0x000ea8000c1e1900 */
/*09c0*/ STG.E [R4.64+0x8], R11 ; /* 0x0000080b04007986 */
/* 0x000fe8000c10190a */
/*09d0*/ LDG.E R13, [R2.64+0xc] ; /* 0x00000c0a020d7981 */
/* 0x0002a2000c1e1900 */
/*09e0*/ ISETP.NE.AND P0, PT, R6, RZ, PT ; /* 0x000000ff0600720c */
/* 0x000fe20003f05270 */
/*09f0*/ UIADD3 UR4, UR4, 0x4, URZ ; /* 0x0000000404047890 */
/* 0x000fe2000fffe03f */
/*0a00*/ IADD3 R7, P2, R4, 0x10, RZ ; /* 0x0000001004077810 */
/* 0x001fc40007f5e0ff */
/*0a10*/ IADD3 R10, P1, R2, 0x10, RZ ; /* 0x00000010020a7810 */
/* 0x000fc80007f3e0ff */
/*0a20*/ IADD3.X R3, RZ, R3, RZ, P1, !PT ; /* 0x00000003ff037210 */
/* 0x002fe40000ffe4ff */
/*0a30*/ MOV R2, R10 ; /* 0x0000000a00027202 */
/* 0x000fe20000000f00 */
/*0a40*/ FADD R13, R8, R13 ; /* 0x0000000d080d7221 */
/* 0x004fe40000000000 */
/*0a50*/ IMAD.X R8, RZ, RZ, R5, P2 ; /* 0x000000ffff087224 */
/* 0x000fc600010e0605 */
/*0a60*/ STG.E [R4.64+0xc], R13 ; /* 0x00000c0d04007986 */
/* 0x0001e4000c10190a */
/*0a70*/ IMAD.MOV.U32 R4, RZ, RZ, R7 ; /* 0x000000ffff047224 */
/* 0x001fe200078e0007 */
/*0a80*/ MOV R5, R8 ; /* 0x0000000800057202 */
/* 0x000fe20000000f00 */
/*0a90*/ @P0 BRA 0x8f0 ; /* 0xfffffe5000000947 */
/* 0x000fea000383ffff */
/*0aa0*/ ISETP.NE.AND P0, PT, R0, RZ, PT ; /* 0x000000ff0000720c */
/* 0x000fda0003f05270 */
/*0ab0*/ @!P0 EXIT ; /* 0x000000000000894d */
/* 0x000fea0003800000 */
/*0ac0*/ UMOV UR5, 0x4 ; /* 0x0000000400057882 */
/* 0x000fe40000000000 */
/*0ad0*/ ULDC.64 UR6, c[0x0][0x170] ; /* 0x00005c0000067ab9 */
/* 0x000fe40000000a00 */
/*0ae0*/ UIMAD.WIDE UR6, UR4, UR5, UR6 ; /* 0x00000005040672a5 */
/* 0x000fe4000f8e0206 */
/*0af0*/ ULDC.64 UR8, c[0x0][0x168] ; /* 0x00005a0000087ab9 */
/* 0x000fe40000000a00 */
/*0b00*/ UIMAD.WIDE UR4, UR4, UR5, UR8 ; /* 0x00000005040472a5 */
/* 0x000fe4000f8e0208 */
/*0b10*/ IMAD.U32 R2, RZ, RZ, UR6 ; /* 0x00000006ff027e24 */
/* 0x000fe2000f8e00ff */
/*0b20*/ MOV R5, UR7 ; /* 0x0000000700057c02 */
/* 0x000fe20008000f00 */
/*0b30*/ IMAD.U32 R4, RZ, RZ, UR6 ; /* 0x00000006ff047e24 */
/* 0x000fe2000f8e00ff */
/*0b40*/ MOV R3, UR7 ; /* 0x0000000700037c02 */
/* 0x000fe20008000f00 */
/*0b50*/ IMAD.MOV.U32 R6, RZ, RZ, R2 ; /* 0x000000ffff067224 */
/* 0x000fe200078e0002 */
/*0b60*/ MOV R9, R5 ; /* 0x0000000500097202 */
/* 0x000fc40000000f00 */
/*0b70*/ MOV R5, UR5 ; /* 0x0000000500057c02 */
/* 0x000fe20008000f00 */
/*0b80*/ IMAD.U32 R4, RZ, RZ, UR4 ; /* 0x00000004ff047e24 */
/* 0x000fe2000f8e00ff */
/*0b90*/ MOV R3, R9 ; /* 0x0000000900037202 */
/* 0x001fe20000000f00 */
/*0ba0*/ IMAD.MOV.U32 R2, RZ, RZ, R6 ; /* 0x000000ffff027224 */
/* 0x000fc600078e0006 */
/*0bb0*/ LDG.E R5, [R4.64] ; /* 0x0000000a04057981 */
/* 0x000ea8000c1e1900 */
/*0bc0*/ LDG.E R6, [R2.64] ; /* 0x0000000a02067981 */
/* 0x000ea2000c1e1900 */
/*0bd0*/ IADD3 R0, R0, -0x1, RZ ; /* 0xffffffff00007810 */
/* 0x000fc80007ffe0ff */
/*0be0*/ ISETP.NE.AND P0, PT, R0, RZ, PT ; /* 0x000000ff0000720c */
/* 0x000fe20003f05270 */
/*0bf0*/ UIADD3 UR4, UP0, UR4, 0x4, URZ ; /* 0x0000000404047890 */
/* 0x000fc8000ff1e03f */
/*0c00*/ UIADD3.X UR5, URZ, UR5, URZ, UP0, !UPT ; /* 0x000000053f057290 */
/* 0x000fe200087fe43f */
/*0c10*/ FADD R7, R6, R5 ; /* 0x0000000506077221 */
/* 0x004fe20000000000 */
/*0c20*/ IADD3 R6, P1, R2, 0x4, RZ ; /* 0x0000000402067810 */
/* 0x000fc80007f3e0ff */
/*0c30*/ STG.E [R2.64], R7 ; /* 0x0000000702007986 */
/* 0x0001e2000c10190a */
/*0c40*/ IADD3.X R9, RZ, R3, RZ, P1, !PT ; /* 0x00000003ff097210 */
/* 0x000fe20000ffe4ff */
/*0c50*/ @P0 BRA 0xb70 ; /* 0xffffff1000000947 */
/* 0x000fea000383ffff */
/*0c60*/ EXIT ; /* 0x000000000000794d */
/* 0x000fea0003800000 */
/*0c70*/ BRA 0xc70; /* 0xfffffff000007947 */
/* 0x000fc0000383ffff */
/*0c80*/ NOP; /* 0x0000000000007918 */
/* 0x000fc00000000000 */
/*0c90*/ NOP; /* 0x0000000000007918 */
/* 0x000fc00000000000 */
/*0ca0*/ NOP; /* 0x0000000000007918 */
/* 0x000fc00000000000 */
/*0cb0*/ NOP; /* 0x0000000000007918 */
/* 0x000fc00000000000 */
/*0cc0*/ NOP; /* 0x0000000000007918 */
/* 0x000fc00000000000 */
/*0cd0*/ NOP; /* 0x0000000000007918 */
/* 0x000fc00000000000 */
/*0ce0*/ NOP; /* 0x0000000000007918 */
/* 0x000fc00000000000 */
/*0cf0*/ NOP; /* 0x0000000000007918 */
/* 0x000fc00000000000 */
.......... |
You are a helpful coding assistant specialized in converting CUDA source code to CUDA host assembly. | #include <stdio.h>
// function to add the elements of two arrays
__global__
void add(int n, float *x, float *y)
{
for (int i = 0; i < n; i++)
y[i] = x[i] + y[i];
}
int main()
{
int N = 1000000; // 1M elements
float *x, *y;
cudaMallocManaged(&x, N*sizeof(float));
cudaMallocManaged(&y, N*sizeof(float));
// initialize x and y arrays on the host
for (int i = 0; i < N; i++) {
x[i] = 1.0;
y[i] = 2.0;
}
// Run kernel on 1M elements on the CPU
add<<<1, 1>>>(N, x, y);
// Wait for GPU to finish before accessing on host
cudaDeviceSynchronize();
// Check for errors (all values should be 3.0f)
float maxError = 0.0;
for(int i = 0; i < N; i++){
maxError = fmax(maxError, fabs(y[i]-3.0));
}
printf("Max error: %f\n",maxError);
// Free memory
cudaFree(x);
cudaFree(y);
} | .file "tmpxft_001ab488_00000000-6_add.cudafe1.cpp"
.text
#APP
#NO_APP
.type _ZL26__cudaUnregisterBinaryUtilv, @function
_ZL26__cudaUnregisterBinaryUtilv:
.LFB2060:
.cfi_startproc
endbr64
subq $8, %rsp
.cfi_def_cfa_offset 16
movq _ZL20__cudaFatCubinHandle(%rip), %rdi
call __cudaUnregisterFatBinary@PLT
addq $8, %rsp
.cfi_def_cfa_offset 8
ret
.cfi_endproc
.LFE2060:
.size _ZL26__cudaUnregisterBinaryUtilv, .-_ZL26__cudaUnregisterBinaryUtilv
.globl _Z25__device_stub__Z3addiPfS_iPfS_
.type _Z25__device_stub__Z3addiPfS_iPfS_, @function
_Z25__device_stub__Z3addiPfS_iPfS_:
.LFB2082:
.cfi_startproc
endbr64
subq $136, %rsp
.cfi_def_cfa_offset 144
movl %edi, 28(%rsp)
movq %rsi, 16(%rsp)
movq %rdx, 8(%rsp)
movq %fs:40, %rax
movq %rax, 120(%rsp)
xorl %eax, %eax
leaq 28(%rsp), %rax
movq %rax, 96(%rsp)
leaq 16(%rsp), %rax
movq %rax, 104(%rsp)
leaq 8(%rsp), %rax
movq %rax, 112(%rsp)
movl $1, 48(%rsp)
movl $1, 52(%rsp)
movl $1, 56(%rsp)
movl $1, 60(%rsp)
movl $1, 64(%rsp)
movl $1, 68(%rsp)
leaq 40(%rsp), %rcx
leaq 32(%rsp), %rdx
leaq 60(%rsp), %rsi
leaq 48(%rsp), %rdi
call __cudaPopCallConfiguration@PLT
testl %eax, %eax
je .L7
.L3:
movq 120(%rsp), %rax
subq %fs:40, %rax
jne .L8
addq $136, %rsp
.cfi_remember_state
.cfi_def_cfa_offset 8
ret
.L7:
.cfi_restore_state
pushq 40(%rsp)
.cfi_def_cfa_offset 152
pushq 40(%rsp)
.cfi_def_cfa_offset 160
leaq 112(%rsp), %r9
movq 76(%rsp), %rcx
movl 84(%rsp), %r8d
movq 64(%rsp), %rsi
movl 72(%rsp), %edx
leaq _Z3addiPfS_(%rip), %rdi
call cudaLaunchKernel@PLT
addq $16, %rsp
.cfi_def_cfa_offset 144
jmp .L3
.L8:
call __stack_chk_fail@PLT
.cfi_endproc
.LFE2082:
.size _Z25__device_stub__Z3addiPfS_iPfS_, .-_Z25__device_stub__Z3addiPfS_iPfS_
.globl _Z3addiPfS_
.type _Z3addiPfS_, @function
_Z3addiPfS_:
.LFB2083:
.cfi_startproc
endbr64
subq $8, %rsp
.cfi_def_cfa_offset 16
call _Z25__device_stub__Z3addiPfS_iPfS_
addq $8, %rsp
.cfi_def_cfa_offset 8
ret
.cfi_endproc
.LFE2083:
.size _Z3addiPfS_, .-_Z3addiPfS_
.section .rodata.str1.1,"aMS",@progbits,1
.LC5:
.string "Max error: %f\n"
.text
.globl main
.type main, @function
main:
.LFB2057:
.cfi_startproc
endbr64
pushq %rbp
.cfi_def_cfa_offset 16
.cfi_offset 6, -16
pushq %rbx
.cfi_def_cfa_offset 24
.cfi_offset 3, -24
subq $56, %rsp
.cfi_def_cfa_offset 80
movq %fs:40, %rax
movq %rax, 40(%rsp)
xorl %eax, %eax
movq %rsp, %rdi
movl $1, %edx
movl $4000000, %esi
call cudaMallocManaged@PLT
leaq 8(%rsp), %rdi
movl $1, %edx
movl $4000000, %esi
call cudaMallocManaged@PLT
movl $0, %eax
movss .LC1(%rip), %xmm1
movss .LC2(%rip), %xmm0
.L12:
movq (%rsp), %rdx
movss %xmm1, (%rdx,%rax)
movq 8(%rsp), %rdx
movss %xmm0, (%rdx,%rax)
addq $4, %rax
cmpq $4000000, %rax
jne .L12
movl $1, 28(%rsp)
movl $1, 32(%rsp)
movl $1, 36(%rsp)
movl $1, 16(%rsp)
movl $1, 20(%rsp)
movl $1, 24(%rsp)
movl $0, %r9d
movl $0, %r8d
movq 28(%rsp), %rdx
movl $1, %ecx
movq 16(%rsp), %rdi
movl $1, %esi
call __cudaPushCallConfiguration@PLT
testl %eax, %eax
je .L19
.L13:
call cudaDeviceSynchronize@PLT
movq 8(%rsp), %rbx
leaq 4000000(%rbx), %rbp
pxor %xmm1, %xmm1
.L14:
pxor %xmm0, %xmm0
cvtss2sd (%rbx), %xmm0
subsd .LC3(%rip), %xmm0
andpd .LC4(%rip), %xmm0
cvtss2sd %xmm1, %xmm1
call fmax@PLT
pxor %xmm1, %xmm1
cvtsd2ss %xmm0, %xmm1
addq $4, %rbx
cmpq %rbp, %rbx
jne .L14
pxor %xmm0, %xmm0
cvtss2sd %xmm1, %xmm0
leaq .LC5(%rip), %rsi
movl $2, %edi
movl $1, %eax
call __printf_chk@PLT
movq (%rsp), %rdi
call cudaFree@PLT
movq 8(%rsp), %rdi
call cudaFree@PLT
movq 40(%rsp), %rax
subq %fs:40, %rax
jne .L20
movl $0, %eax
addq $56, %rsp
.cfi_remember_state
.cfi_def_cfa_offset 24
popq %rbx
.cfi_def_cfa_offset 16
popq %rbp
.cfi_def_cfa_offset 8
ret
.L19:
.cfi_restore_state
movq 8(%rsp), %rdx
movq (%rsp), %rsi
movl $1000000, %edi
call _Z25__device_stub__Z3addiPfS_iPfS_
jmp .L13
.L20:
call __stack_chk_fail@PLT
.cfi_endproc
.LFE2057:
.size main, .-main
.section .rodata.str1.1
.LC6:
.string "_Z3addiPfS_"
.text
.type _ZL24__sti____cudaRegisterAllv, @function
_ZL24__sti____cudaRegisterAllv:
.LFB2085:
.cfi_startproc
endbr64
subq $8, %rsp
.cfi_def_cfa_offset 16
leaq _ZL15__fatDeviceText(%rip), %rdi
call __cudaRegisterFatBinary@PLT
movq %rax, %rdi
movq %rax, _ZL20__cudaFatCubinHandle(%rip)
pushq $0
.cfi_def_cfa_offset 24
pushq $0
.cfi_def_cfa_offset 32
pushq $0
.cfi_def_cfa_offset 40
pushq $0
.cfi_def_cfa_offset 48
movl $0, %r9d
movl $-1, %r8d
leaq .LC6(%rip), %rdx
movq %rdx, %rcx
leaq _Z3addiPfS_(%rip), %rsi
call __cudaRegisterFunction@PLT
addq $32, %rsp
.cfi_def_cfa_offset 16
movq _ZL20__cudaFatCubinHandle(%rip), %rdi
call __cudaRegisterFatBinaryEnd@PLT
leaq _ZL26__cudaUnregisterBinaryUtilv(%rip), %rdi
call atexit@PLT
addq $8, %rsp
.cfi_def_cfa_offset 8
ret
.cfi_endproc
.LFE2085:
.size _ZL24__sti____cudaRegisterAllv, .-_ZL24__sti____cudaRegisterAllv
.section .init_array,"aw"
.align 8
.quad _ZL24__sti____cudaRegisterAllv
.section .nvFatBinSegment,"aw"
.align 8
.type _ZL15__fatDeviceText, @object
.size _ZL15__fatDeviceText, 24
_ZL15__fatDeviceText:
.long 1180844977
.long 1
.quad fatbinData
.quad 0
.local _ZL20__cudaFatCubinHandle
.comm _ZL20__cudaFatCubinHandle,8,8
.section .rodata.cst4,"aM",@progbits,4
.align 4
.LC1:
.long 1065353216
.align 4
.LC2:
.long 1073741824
.section .rodata.cst8,"aM",@progbits,8
.align 8
.LC3:
.long 0
.long 1074266112
.section .rodata.cst16,"aM",@progbits,16
.align 16
.LC4:
.long -1
.long 2147483647
.long 0
.long 0
.ident "GCC: (Ubuntu 13.3.0-6ubuntu2~24.04) 13.3.0"
.section .note.GNU-stack,"",@progbits
.section .note.gnu.property,"a"
.align 8
.long 1f - 0f
.long 4f - 1f
.long 5
0:
.string "GNU"
1:
.align 8
.long 0xc0000002
.long 3f - 2f
2:
.long 0x3
3:
.align 8
4: |
You are a helpful coding assistant specialized in converting CUDA source code to HIP/AMD source code. | #include <stdio.h>
// function to add the elements of two arrays
__global__
void add(int n, float *x, float *y)
{
for (int i = 0; i < n; i++)
y[i] = x[i] + y[i];
}
int main()
{
int N = 1000000; // 1M elements
float *x, *y;
cudaMallocManaged(&x, N*sizeof(float));
cudaMallocManaged(&y, N*sizeof(float));
// initialize x and y arrays on the host
for (int i = 0; i < N; i++) {
x[i] = 1.0;
y[i] = 2.0;
}
// Run kernel on 1M elements on the CPU
add<<<1, 1>>>(N, x, y);
// Wait for GPU to finish before accessing on host
cudaDeviceSynchronize();
// Check for errors (all values should be 3.0f)
float maxError = 0.0;
for(int i = 0; i < N; i++){
maxError = fmax(maxError, fabs(y[i]-3.0));
}
printf("Max error: %f\n",maxError);
// Free memory
cudaFree(x);
cudaFree(y);
} | #include <hip/hip_runtime.h>
#include <stdio.h>
// function to add the elements of two arrays
__global__
void add(int n, float *x, float *y)
{
for (int i = 0; i < n; i++)
y[i] = x[i] + y[i];
}
int main()
{
int N = 1000000; // 1M elements
float *x, *y;
hipMallocManaged(&x, N*sizeof(float));
hipMallocManaged(&y, N*sizeof(float));
// initialize x and y arrays on the host
for (int i = 0; i < N; i++) {
x[i] = 1.0;
y[i] = 2.0;
}
// Run kernel on 1M elements on the CPU
add<<<1, 1>>>(N, x, y);
// Wait for GPU to finish before accessing on host
hipDeviceSynchronize();
// Check for errors (all values should be 3.0f)
float maxError = 0.0;
for(int i = 0; i < N; i++){
maxError = fmax(maxError, fabs(y[i]-3.0));
}
printf("Max error: %f\n",maxError);
// Free memory
hipFree(x);
hipFree(y);
} |
You are a helpful coding assistant specialized in converting HIP source code to AMD device assembly. | #include <hip/hip_runtime.h>
#include <stdio.h>
// function to add the elements of two arrays
__global__
void add(int n, float *x, float *y)
{
for (int i = 0; i < n; i++)
y[i] = x[i] + y[i];
}
int main()
{
int N = 1000000; // 1M elements
float *x, *y;
hipMallocManaged(&x, N*sizeof(float));
hipMallocManaged(&y, N*sizeof(float));
// initialize x and y arrays on the host
for (int i = 0; i < N; i++) {
x[i] = 1.0;
y[i] = 2.0;
}
// Run kernel on 1M elements on the CPU
add<<<1, 1>>>(N, x, y);
// Wait for GPU to finish before accessing on host
hipDeviceSynchronize();
// Check for errors (all values should be 3.0f)
float maxError = 0.0;
for(int i = 0; i < N; i++){
maxError = fmax(maxError, fabs(y[i]-3.0));
}
printf("Max error: %f\n",maxError);
// Free memory
hipFree(x);
hipFree(y);
} | .text
.amdgcn_target "amdgcn-amd-amdhsa--gfx1100"
.protected _Z3addiPfS_
.globl _Z3addiPfS_
.p2align 8
.type _Z3addiPfS_,@function
_Z3addiPfS_:
s_load_b32 s4, s[0:1], 0x0
s_waitcnt lgkmcnt(0)
s_cmp_lt_i32 s4, 1
s_cbranch_scc1 .LBB0_3
s_load_b128 s[0:3], s[0:1], 0x8
v_mov_b32_e32 v0, 0
.LBB0_2:
s_waitcnt lgkmcnt(0)
s_clause 0x1
global_load_b32 v1, v0, s[0:1]
global_load_b32 v2, v0, s[2:3]
s_add_i32 s4, s4, -1
s_add_u32 s0, s0, 4
s_addc_u32 s1, s1, 0
s_waitcnt vmcnt(0)
v_add_f32_e32 v1, v1, v2
global_store_b32 v0, v1, s[2:3]
s_add_u32 s2, s2, 4
s_addc_u32 s3, s3, 0
s_cmp_eq_u32 s4, 0
s_cbranch_scc0 .LBB0_2
.LBB0_3:
s_nop 0
s_sendmsg sendmsg(MSG_DEALLOC_VGPRS)
s_endpgm
.section .rodata,"a",@progbits
.p2align 6, 0x0
.amdhsa_kernel _Z3addiPfS_
.amdhsa_group_segment_fixed_size 0
.amdhsa_private_segment_fixed_size 0
.amdhsa_kernarg_size 24
.amdhsa_user_sgpr_count 15
.amdhsa_user_sgpr_dispatch_ptr 0
.amdhsa_user_sgpr_queue_ptr 0
.amdhsa_user_sgpr_kernarg_segment_ptr 1
.amdhsa_user_sgpr_dispatch_id 0
.amdhsa_user_sgpr_private_segment_size 0
.amdhsa_wavefront_size32 1
.amdhsa_uses_dynamic_stack 0
.amdhsa_enable_private_segment 0
.amdhsa_system_sgpr_workgroup_id_x 1
.amdhsa_system_sgpr_workgroup_id_y 0
.amdhsa_system_sgpr_workgroup_id_z 0
.amdhsa_system_sgpr_workgroup_info 0
.amdhsa_system_vgpr_workitem_id 0
.amdhsa_next_free_vgpr 3
.amdhsa_next_free_sgpr 5
.amdhsa_reserve_vcc 0
.amdhsa_float_round_mode_32 0
.amdhsa_float_round_mode_16_64 0
.amdhsa_float_denorm_mode_32 3
.amdhsa_float_denorm_mode_16_64 3
.amdhsa_dx10_clamp 1
.amdhsa_ieee_mode 1
.amdhsa_fp16_overflow 0
.amdhsa_workgroup_processor_mode 1
.amdhsa_memory_ordered 1
.amdhsa_forward_progress 0
.amdhsa_shared_vgpr_count 0
.amdhsa_exception_fp_ieee_invalid_op 0
.amdhsa_exception_fp_denorm_src 0
.amdhsa_exception_fp_ieee_div_zero 0
.amdhsa_exception_fp_ieee_overflow 0
.amdhsa_exception_fp_ieee_underflow 0
.amdhsa_exception_fp_ieee_inexact 0
.amdhsa_exception_int_div_zero 0
.end_amdhsa_kernel
.text
.Lfunc_end0:
.size _Z3addiPfS_, .Lfunc_end0-_Z3addiPfS_
.section .AMDGPU.csdata,"",@progbits
.text
.p2alignl 7, 3214868480
.fill 96, 4, 3214868480
.type __hip_cuid_,@object
.section .bss,"aw",@nobits
.globl __hip_cuid_
__hip_cuid_:
.byte 0
.size __hip_cuid_, 1
.ident "AMD clang version 18.0.0git (https://github.com/RadeonOpenCompute/llvm-project roc-6.3.2 25012 e5bf7e55c91490b07c49d8960fa7983d864936c4)"
.section ".note.GNU-stack","",@progbits
.addrsig
.addrsig_sym __hip_cuid_
.amdgpu_metadata
---
amdhsa.kernels:
- .args:
- .offset: 0
.size: 4
.value_kind: by_value
- .address_space: global
.offset: 8
.size: 8
.value_kind: global_buffer
- .address_space: global
.offset: 16
.size: 8
.value_kind: global_buffer
.group_segment_fixed_size: 0
.kernarg_segment_align: 8
.kernarg_segment_size: 24
.language: OpenCL C
.language_version:
- 2
- 0
.max_flat_workgroup_size: 1024
.name: _Z3addiPfS_
.private_segment_fixed_size: 0
.sgpr_count: 5
.sgpr_spill_count: 0
.symbol: _Z3addiPfS_.kd
.uniform_work_group_size: 1
.uses_dynamic_stack: false
.vgpr_count: 3
.vgpr_spill_count: 0
.wavefront_size: 32
.workgroup_processor_mode: 1
amdhsa.target: amdgcn-amd-amdhsa--gfx1100
amdhsa.version:
- 1
- 2
...
.end_amdgpu_metadata |
You are a helpful coding assistant specialized in converting HIP source code to AMD host assembly. | #include <hip/hip_runtime.h>
#include <stdio.h>
// function to add the elements of two arrays
__global__
void add(int n, float *x, float *y)
{
for (int i = 0; i < n; i++)
y[i] = x[i] + y[i];
}
int main()
{
int N = 1000000; // 1M elements
float *x, *y;
hipMallocManaged(&x, N*sizeof(float));
hipMallocManaged(&y, N*sizeof(float));
// initialize x and y arrays on the host
for (int i = 0; i < N; i++) {
x[i] = 1.0;
y[i] = 2.0;
}
// Run kernel on 1M elements on the CPU
add<<<1, 1>>>(N, x, y);
// Wait for GPU to finish before accessing on host
hipDeviceSynchronize();
// Check for errors (all values should be 3.0f)
float maxError = 0.0;
for(int i = 0; i < N; i++){
maxError = fmax(maxError, fabs(y[i]-3.0));
}
printf("Max error: %f\n",maxError);
// Free memory
hipFree(x);
hipFree(y);
} | .text
.file "add.hip"
.globl _Z18__device_stub__addiPfS_ # -- Begin function _Z18__device_stub__addiPfS_
.p2align 4, 0x90
.type _Z18__device_stub__addiPfS_,@function
_Z18__device_stub__addiPfS_: # @_Z18__device_stub__addiPfS_
.cfi_startproc
# %bb.0:
subq $104, %rsp
.cfi_def_cfa_offset 112
movl %edi, 12(%rsp)
movq %rsi, 72(%rsp)
movq %rdx, 64(%rsp)
leaq 12(%rsp), %rax
movq %rax, 80(%rsp)
leaq 72(%rsp), %rax
movq %rax, 88(%rsp)
leaq 64(%rsp), %rax
movq %rax, 96(%rsp)
leaq 48(%rsp), %rdi
leaq 32(%rsp), %rsi
leaq 24(%rsp), %rdx
leaq 16(%rsp), %rcx
callq __hipPopCallConfiguration
movq 48(%rsp), %rsi
movl 56(%rsp), %edx
movq 32(%rsp), %rcx
movl 40(%rsp), %r8d
leaq 80(%rsp), %r9
movl $_Z3addiPfS_, %edi
pushq 16(%rsp)
.cfi_adjust_cfa_offset 8
pushq 32(%rsp)
.cfi_adjust_cfa_offset 8
callq hipLaunchKernel
addq $120, %rsp
.cfi_adjust_cfa_offset -120
retq
.Lfunc_end0:
.size _Z18__device_stub__addiPfS_, .Lfunc_end0-_Z18__device_stub__addiPfS_
.cfi_endproc
# -- End function
.section .rodata.cst8,"aM",@progbits,8
.p2align 3, 0x0 # -- Begin function main
.LCPI1_0:
.quad 0xc008000000000000 # double -3
.section .rodata.cst16,"aM",@progbits,16
.p2align 4, 0x0
.LCPI1_1:
.quad 0x7fffffffffffffff # double NaN
.quad 0x7fffffffffffffff # double NaN
.text
.globl main
.p2align 4, 0x90
.type main,@function
main: # @main
.cfi_startproc
# %bb.0:
subq $120, %rsp
.cfi_def_cfa_offset 128
leaq 16(%rsp), %rdi
movl $4000000, %esi # imm = 0x3D0900
movl $1, %edx
callq hipMallocManaged
leaq 8(%rsp), %rdi
movl $4000000, %esi # imm = 0x3D0900
movl $1, %edx
callq hipMallocManaged
movq 16(%rsp), %rax
xorl %ecx, %ecx
movq 8(%rsp), %rdx
.p2align 4, 0x90
.LBB1_1: # =>This Inner Loop Header: Depth=1
movl $1065353216, (%rax,%rcx,4) # imm = 0x3F800000
movl $1073741824, (%rdx,%rcx,4) # imm = 0x40000000
incq %rcx
cmpq $1000000, %rcx # imm = 0xF4240
jne .LBB1_1
# %bb.2:
movabsq $4294967297, %rdi # imm = 0x100000001
movl $1, %esi
movq %rdi, %rdx
movl $1, %ecx
xorl %r8d, %r8d
xorl %r9d, %r9d
callq __hipPushCallConfiguration
testl %eax, %eax
jne .LBB1_4
# %bb.3:
movq 16(%rsp), %rax
movq 8(%rsp), %rcx
movl $1000000, 28(%rsp) # imm = 0xF4240
movq %rax, 88(%rsp)
movq %rcx, 80(%rsp)
leaq 28(%rsp), %rax
movq %rax, 96(%rsp)
leaq 88(%rsp), %rax
movq %rax, 104(%rsp)
leaq 80(%rsp), %rax
movq %rax, 112(%rsp)
leaq 64(%rsp), %rdi
leaq 48(%rsp), %rsi
leaq 40(%rsp), %rdx
leaq 32(%rsp), %rcx
callq __hipPopCallConfiguration
movq 64(%rsp), %rsi
movl 72(%rsp), %edx
movq 48(%rsp), %rcx
movl 56(%rsp), %r8d
leaq 96(%rsp), %r9
movl $_Z3addiPfS_, %edi
pushq 32(%rsp)
.cfi_adjust_cfa_offset 8
pushq 48(%rsp)
.cfi_adjust_cfa_offset 8
callq hipLaunchKernel
addq $16, %rsp
.cfi_adjust_cfa_offset -16
.LBB1_4:
callq hipDeviceSynchronize
xorps %xmm2, %xmm2
xorl %eax, %eax
movq 8(%rsp), %rcx
movsd .LCPI1_0(%rip), %xmm0 # xmm0 = mem[0],zero
movapd .LCPI1_1(%rip), %xmm1 # xmm1 = [NaN,NaN]
.p2align 4, 0x90
.LBB1_5: # =>This Inner Loop Header: Depth=1
cvtss2sd %xmm2, %xmm2
movss (%rcx,%rax,4), %xmm3 # xmm3 = mem[0],zero,zero,zero
cvtss2sd %xmm3, %xmm3
addsd %xmm0, %xmm3
andpd %xmm1, %xmm3
movaps %xmm2, %xmm4
cmpunordsd %xmm2, %xmm4
movapd %xmm4, %xmm5
andpd %xmm3, %xmm5
maxsd %xmm2, %xmm3
andnpd %xmm3, %xmm4
orpd %xmm5, %xmm4
xorps %xmm2, %xmm2
cvtsd2ss %xmm4, %xmm2
incq %rax
cmpq $1000000, %rax # imm = 0xF4240
jne .LBB1_5
# %bb.6:
xorps %xmm0, %xmm0
cvtss2sd %xmm2, %xmm0
movl $.L.str, %edi
movb $1, %al
callq printf
movq 16(%rsp), %rdi
callq hipFree
movq 8(%rsp), %rdi
callq hipFree
xorl %eax, %eax
addq $120, %rsp
.cfi_def_cfa_offset 8
retq
.Lfunc_end1:
.size main, .Lfunc_end1-main
.cfi_endproc
# -- End function
.p2align 4, 0x90 # -- Begin function __hip_module_ctor
.type __hip_module_ctor,@function
__hip_module_ctor: # @__hip_module_ctor
.cfi_startproc
# %bb.0:
subq $40, %rsp
.cfi_def_cfa_offset 48
cmpq $0, __hip_gpubin_handle(%rip)
jne .LBB2_2
# %bb.1:
movl $__hip_fatbin_wrapper, %edi
callq __hipRegisterFatBinary
movq %rax, __hip_gpubin_handle(%rip)
.LBB2_2:
movq __hip_gpubin_handle(%rip), %rdi
xorps %xmm0, %xmm0
movups %xmm0, 16(%rsp)
movups %xmm0, (%rsp)
movl $_Z3addiPfS_, %esi
movl $.L__unnamed_1, %edx
movl $.L__unnamed_1, %ecx
movl $-1, %r8d
xorl %r9d, %r9d
callq __hipRegisterFunction
movl $__hip_module_dtor, %edi
addq $40, %rsp
.cfi_def_cfa_offset 8
jmp atexit # TAILCALL
.Lfunc_end2:
.size __hip_module_ctor, .Lfunc_end2-__hip_module_ctor
.cfi_endproc
# -- End function
.p2align 4, 0x90 # -- Begin function __hip_module_dtor
.type __hip_module_dtor,@function
__hip_module_dtor: # @__hip_module_dtor
.cfi_startproc
# %bb.0:
movq __hip_gpubin_handle(%rip), %rdi
testq %rdi, %rdi
je .LBB3_2
# %bb.1:
pushq %rax
.cfi_def_cfa_offset 16
callq __hipUnregisterFatBinary
movq $0, __hip_gpubin_handle(%rip)
addq $8, %rsp
.cfi_def_cfa_offset 8
.LBB3_2:
retq
.Lfunc_end3:
.size __hip_module_dtor, .Lfunc_end3-__hip_module_dtor
.cfi_endproc
# -- End function
.type _Z3addiPfS_,@object # @_Z3addiPfS_
.section .rodata,"a",@progbits
.globl _Z3addiPfS_
.p2align 3, 0x0
_Z3addiPfS_:
.quad _Z18__device_stub__addiPfS_
.size _Z3addiPfS_, 8
.type .L.str,@object # @.str
.section .rodata.str1.1,"aMS",@progbits,1
.L.str:
.asciz "Max error: %f\n"
.size .L.str, 15
.type .L__unnamed_1,@object # @0
.L__unnamed_1:
.asciz "_Z3addiPfS_"
.size .L__unnamed_1, 12
.type __hip_fatbin_wrapper,@object # @__hip_fatbin_wrapper
.section .hipFatBinSegment,"a",@progbits
.p2align 3, 0x0
__hip_fatbin_wrapper:
.long 1212764230 # 0x48495046
.long 1 # 0x1
.quad __hip_fatbin
.quad 0
.size __hip_fatbin_wrapper, 24
.type __hip_gpubin_handle,@object # @__hip_gpubin_handle
.local __hip_gpubin_handle
.comm __hip_gpubin_handle,8,8
.section .init_array,"aw",@init_array
.p2align 3, 0x0
.quad __hip_module_ctor
.type __hip_cuid_,@object # @__hip_cuid_
.bss
.globl __hip_cuid_
__hip_cuid_:
.byte 0 # 0x0
.size __hip_cuid_, 1
.section ".linker-options","e",@llvm_linker_options
.ident "AMD clang version 18.0.0git (https://github.com/RadeonOpenCompute/llvm-project roc-6.3.2 25012 e5bf7e55c91490b07c49d8960fa7983d864936c4)"
.section ".note.GNU-stack","",@progbits
.addrsig
.addrsig_sym _Z18__device_stub__addiPfS_
.addrsig_sym __hip_module_ctor
.addrsig_sym __hip_module_dtor
.addrsig_sym _Z3addiPfS_
.addrsig_sym __hip_fatbin
.addrsig_sym __hip_fatbin_wrapper
.addrsig_sym __hip_cuid_ |
You are a helpful coding assistant specialized in converting from CUDA device assembly to AMD device assembly. | code for sm_80
Function : _Z3addiPfS_
.headerflags @"EF_CUDA_TEXMODE_UNIFIED EF_CUDA_64BIT_ADDRESS EF_CUDA_SM80 EF_CUDA_VIRTUAL_SM(EF_CUDA_SM80)"
/*0000*/ MOV R1, c[0x0][0x28] ; /* 0x00000a0000017a02 */
/* 0x000fe40000000f00 */
/*0010*/ IMAD.MOV.U32 R0, RZ, RZ, c[0x0][0x160] ; /* 0x00005800ff007624 */
/* 0x000fca00078e00ff */
/*0020*/ ISETP.GE.AND P0, PT, R0, 0x1, PT ; /* 0x000000010000780c */
/* 0x000fda0003f06270 */
/*0030*/ @!P0 EXIT ; /* 0x000000000000894d */
/* 0x000fea0003800000 */
/*0040*/ IADD3 R2, R0.reuse, -0x1, RZ ; /* 0xffffffff00027810 */
/* 0x040fe20007ffe0ff */
/*0050*/ UMOV UR4, URZ ; /* 0x0000003f00047c82 */
/* 0x000fe20008000000 */
/*0060*/ LOP3.LUT R0, R0, 0x3, RZ, 0xc0, !PT ; /* 0x0000000300007812 */
/* 0x000fe200078ec0ff */
/*0070*/ ULDC.64 UR10, c[0x0][0x118] ; /* 0x00004600000a7ab9 */
/* 0x000fe20000000a00 */
/*0080*/ ISETP.GE.U32.AND P0, PT, R2, 0x3, PT ; /* 0x000000030200780c */
/* 0x000fda0003f06070 */
/*0090*/ @!P0 BRA 0xaa0 ; /* 0x00000a0000008947 */
/* 0x000fea0003800000 */
/*00a0*/ IADD3 R6, -R0, c[0x0][0x160], RZ ; /* 0x0000580000067a10 */
/* 0x000fe20007ffe1ff */
/*00b0*/ UMOV UR4, URZ ; /* 0x0000003f00047c82 */
/* 0x000fe20008000000 */
/*00c0*/ MOV R4, c[0x0][0x170] ; /* 0x00005c0000047a02 */
/* 0x000fe20000000f00 */
/*00d0*/ IMAD.MOV.U32 R5, RZ, RZ, c[0x0][0x174] ; /* 0x00005d00ff057624 */
/* 0x000fe200078e00ff */
/*00e0*/ ISETP.GT.AND P0, PT, R6, RZ, PT ; /* 0x000000ff0600720c */
/* 0x000fe20003f04270 */
/*00f0*/ IMAD.MOV.U32 R3, RZ, RZ, c[0x0][0x16c] ; /* 0x00005b00ff037624 */
/* 0x000fe200078e00ff */
/*0100*/ MOV R2, c[0x0][0x168] ; /* 0x00005a0000027a02 */
/* 0x000fd60000000f00 */
/*0110*/ @!P0 BRA 0x8f0 ; /* 0x000007d000008947 */
/* 0x000fea0003800000 */
/*0120*/ ISETP.GT.AND P1, PT, R6, 0xc, PT ; /* 0x0000000c0600780c */
/* 0x000fe40003f24270 */
/*0130*/ PLOP3.LUT P0, PT, PT, PT, PT, 0x80, 0x0 ; /* 0x000000000000781c */
/* 0x000fd60003f0f070 */
/*0140*/ @!P1 BRA 0x610 ; /* 0x000004c000009947 */
/* 0x000fea0003800000 */
/*0150*/ PLOP3.LUT P0, PT, PT, PT, PT, 0x8, 0x0 ; /* 0x000000000000781c */
/* 0x000fe40003f0e170 */
/*0160*/ LDG.E R7, [R4.64] ; /* 0x0000000a04077981 */
/* 0x000ea8000c1e1900 */
/*0170*/ LDG.E R8, [R2.64] ; /* 0x0000000a02087981 */
/* 0x000ea4000c1e1900 */
/*0180*/ FADD R7, R7, R8 ; /* 0x0000000807077221 */
/* 0x004fe40000000000 */
/*0190*/ LDG.E R8, [R4.64+0x4] ; /* 0x0000040a04087981 */
/* 0x000ea8000c1e1900 */
/*01a0*/ STG.E [R4.64], R7 ; /* 0x0000000704007986 */
/* 0x0001e8000c10190a */
/*01b0*/ LDG.E R9, [R2.64+0x4] ; /* 0x0000040a02097981 */
/* 0x000ea8000c1e1900 */
/*01c0*/ LDG.E R7, [R4.64+0x10] ; /* 0x0000100a04077981 */
/* 0x001ee2000c1e1900 */
/*01d0*/ FADD R9, R8, R9 ; /* 0x0000000908097221 */
/* 0x004fc60000000000 */
/*01e0*/ LDG.E R8, [R4.64+0x8] ; /* 0x0000080a04087981 */
/* 0x000ea8000c1e1900 */
/*01f0*/ STG.E [R4.64+0x4], R9 ; /* 0x0000040904007986 */
/* 0x0001e8000c10190a */
/*0200*/ LDG.E R11, [R2.64+0x8] ; /* 0x0000080a020b7981 */
/* 0x000ea4000c1e1900 */
/*0210*/ FADD R11, R8, R11 ; /* 0x0000000b080b7221 */
/* 0x004fc40000000000 */
/*0220*/ LDG.E R8, [R4.64+0xc] ; /* 0x00000c0a04087981 */
/* 0x000ea8000c1e1900 */
/*0230*/ STG.E [R4.64+0x8], R11 ; /* 0x0000080b04007986 */
/* 0x000fe8000c10190a */
/*0240*/ LDG.E R13, [R2.64+0xc] ; /* 0x00000c0a020d7981 */
/* 0x000ea4000c1e1900 */
/*0250*/ FADD R13, R8, R13 ; /* 0x0000000d080d7221 */
/* 0x004fca0000000000 */
/*0260*/ STG.E [R4.64+0xc], R13 ; /* 0x00000c0d04007986 */
/* 0x000fe8000c10190a */
/*0270*/ LDG.E R8, [R2.64+0x10] ; /* 0x0000100a02087981 */
/* 0x000ee4000c1e1900 */
/*0280*/ FADD R7, R7, R8 ; /* 0x0000000807077221 */
/* 0x008fe40000000000 */
/*0290*/ LDG.E R8, [R4.64+0x14] ; /* 0x0000140a04087981 */
/* 0x000ea8000c1e1900 */
/*02a0*/ STG.E [R4.64+0x10], R7 ; /* 0x0000100704007986 */
/* 0x0003e8000c10190a */
/*02b0*/ LDG.E R9, [R2.64+0x14] ; /* 0x0000140a02097981 */
/* 0x001ea8000c1e1900 */
/*02c0*/ LDG.E R7, [R4.64+0x20] ; /* 0x0000200a04077981 */
/* 0x002ee2000c1e1900 */
/*02d0*/ FADD R9, R8, R9 ; /* 0x0000000908097221 */
/* 0x004fc60000000000 */
/*02e0*/ LDG.E R8, [R4.64+0x18] ; /* 0x0000180a04087981 */
/* 0x000ea8000c1e1900 */
/*02f0*/ STG.E [R4.64+0x14], R9 ; /* 0x0000140904007986 */
/* 0x0001e8000c10190a */
/*0300*/ LDG.E R11, [R2.64+0x18] ; /* 0x0000180a020b7981 */
/* 0x000ea4000c1e1900 */
/*0310*/ FADD R11, R8, R11 ; /* 0x0000000b080b7221 */
/* 0x004fc40000000000 */
/*0320*/ LDG.E R8, [R4.64+0x1c] ; /* 0x00001c0a04087981 */
/* 0x000ea8000c1e1900 */
/*0330*/ STG.E [R4.64+0x18], R11 ; /* 0x0000180b04007986 */
/* 0x000fe8000c10190a */
/*0340*/ LDG.E R13, [R2.64+0x1c] ; /* 0x00001c0a020d7981 */
/* 0x000ea4000c1e1900 */
/*0350*/ FADD R13, R8, R13 ; /* 0x0000000d080d7221 */
/* 0x004fca0000000000 */
/*0360*/ STG.E [R4.64+0x1c], R13 ; /* 0x00001c0d04007986 */
/* 0x000fe8000c10190a */
/*0370*/ LDG.E R8, [R2.64+0x20] ; /* 0x0000200a02087981 */
/* 0x000ee4000c1e1900 */
/*0380*/ FADD R7, R7, R8 ; /* 0x0000000807077221 */
/* 0x008fe40000000000 */
/*0390*/ LDG.E R8, [R4.64+0x24] ; /* 0x0000240a04087981 */
/* 0x000ea8000c1e1900 */
/*03a0*/ STG.E [R4.64+0x20], R7 ; /* 0x0000200704007986 */
/* 0x0003e8000c10190a */
/*03b0*/ LDG.E R9, [R2.64+0x24] ; /* 0x0000240a02097981 */
/* 0x001ea8000c1e1900 */
/*03c0*/ LDG.E R7, [R4.64+0x30] ; /* 0x0000300a04077981 */
/* 0x002ee2000c1e1900 */
/*03d0*/ FADD R9, R8, R9 ; /* 0x0000000908097221 */
/* 0x004fc60000000000 */
/*03e0*/ LDG.E R8, [R4.64+0x28] ; /* 0x0000280a04087981 */
/* 0x000ea8000c1e1900 */
/*03f0*/ STG.E [R4.64+0x24], R9 ; /* 0x0000240904007986 */
/* 0x0001e8000c10190a */
/*0400*/ LDG.E R11, [R2.64+0x28] ; /* 0x0000280a020b7981 */
/* 0x000ea4000c1e1900 */
/*0410*/ FADD R11, R8, R11 ; /* 0x0000000b080b7221 */
/* 0x004fc40000000000 */
/*0420*/ LDG.E R8, [R4.64+0x2c] ; /* 0x00002c0a04087981 */
/* 0x000ea8000c1e1900 */
/*0430*/ STG.E [R4.64+0x28], R11 ; /* 0x0000280b04007986 */
/* 0x0003e8000c10190a */
/*0440*/ LDG.E R13, [R2.64+0x2c] ; /* 0x00002c0a020d7981 */
/* 0x000ea4000c1e1900 */
/*0450*/ FADD R13, R8, R13 ; /* 0x0000000d080d7221 */
/* 0x004fca0000000000 */
/*0460*/ STG.E [R4.64+0x2c], R13 ; /* 0x00002c0d04007986 */
/* 0x0005e8000c10190a */
/*0470*/ LDG.E R8, [R2.64+0x30] ; /* 0x0000300a02087981 */
/* 0x000ee4000c1e1900 */
/*0480*/ FADD R7, R7, R8 ; /* 0x0000000807077221 */
/* 0x008fe40000000000 */
/*0490*/ LDG.E R8, [R4.64+0x34] ; /* 0x0000340a04087981 */
/* 0x000ee8000c1e1900 */
/*04a0*/ STG.E [R4.64+0x30], R7 ; /* 0x0000300704007986 */
/* 0x0009e8000c10190a */
/*04b0*/ LDG.E R9, [R2.64+0x34] ; /* 0x0000340a02097981 */
/* 0x001ee4000c1e1900 */
/*04c0*/ FADD R9, R8, R9 ; /* 0x0000000908097221 */
/* 0x008fc40000000000 */
/*04d0*/ LDG.E R8, [R4.64+0x38] ; /* 0x0000380a04087981 */
/* 0x000ee8000c1e1900 */
/*04e0*/ STG.E [R4.64+0x34], R9 ; /* 0x0000340904007986 */
/* 0x000fe8000c10190a */
/*04f0*/ LDG.E R11, [R2.64+0x38] ; /* 0x0000380a020b7981 */
/* 0x002ee2000c1e1900 */
/*0500*/ IADD3 R6, R6, -0x10, RZ ; /* 0xfffffff006067810 */
/* 0x000fe20007ffe0ff */
/*0510*/ FADD R11, R8, R11 ; /* 0x0000000b080b7221 */
/* 0x008fc40000000000 */
/*0520*/ LDG.E R8, [R4.64+0x3c] ; /* 0x00003c0a04087981 */
/* 0x000ee8000c1e1900 */
/*0530*/ STG.E [R4.64+0x38], R11 ; /* 0x0000380b04007986 */
/* 0x000fe8000c10190a */
/*0540*/ LDG.E R13, [R2.64+0x3c] ; /* 0x00003c0a020d7981 */
/* 0x0040e2000c1e1900 */
/*0550*/ ISETP.GT.AND P1, PT, R6, 0xc, PT ; /* 0x0000000c0600780c */
/* 0x000fe40003f24270 */
/*0560*/ IADD3 R7, P3, R4, 0x40, RZ ; /* 0x0000004004077810 */
/* 0x010fe20007f7e0ff */
/*0570*/ UIADD3 UR4, UR4, 0x10, URZ ; /* 0x0000001004047890 */
/* 0x000fe2000fffe03f */
/*0580*/ IADD3 R10, P2, R2, 0x40, RZ ; /* 0x00000040020a7810 */
/* 0x000fc80007f5e0ff */
/*0590*/ IADD3.X R3, RZ, R3, RZ, P2, !PT ; /* 0x00000003ff037210 */
/* 0x001fe400017fe4ff */
/*05a0*/ MOV R2, R10 ; /* 0x0000000a00027202 */
/* 0x000fe20000000f00 */
/*05b0*/ FADD R13, R8, R13 ; /* 0x0000000d080d7221 */
/* 0x008fe40000000000 */
/*05c0*/ IMAD.X R8, RZ, RZ, R5, P3 ; /* 0x000000ffff087224 */
/* 0x000fc600018e0605 */
/*05d0*/ STG.E [R4.64+0x3c], R13 ; /* 0x00003c0d04007986 */
/* 0x0001e4000c10190a */
/*05e0*/ IMAD.MOV.U32 R4, RZ, RZ, R7 ; /* 0x000000ffff047224 */
/* 0x001fe200078e0007 */
/*05f0*/ MOV R5, R8 ; /* 0x0000000800057202 */
/* 0x000fe20000000f00 */
/*0600*/ @P1 BRA 0x160 ; /* 0xfffffb5000001947 */
/* 0x000fea000383ffff */
/*0610*/ ISETP.GT.AND P1, PT, R6, 0x4, PT ; /* 0x000000040600780c */
/* 0x000fda0003f24270 */
/*0620*/ @!P1 BRA 0x8d0 ; /* 0x000002a000009947 */
/* 0x000fea0003800000 */
/*0630*/ LDG.E R7, [R4.64] ; /* 0x0000000a04077981 */
/* 0x000ea8000c1e1900 */
/*0640*/ LDG.E R8, [R2.64] ; /* 0x0000000a02087981 */
/* 0x000ea4000c1e1900 */
/*0650*/ FADD R7, R7, R8 ; /* 0x0000000807077221 */
/* 0x004fe40000000000 */
/*0660*/ LDG.E R8, [R4.64+0x4] ; /* 0x0000040a04087981 */
/* 0x000ea8000c1e1900 */
/*0670*/ STG.E [R4.64], R7 ; /* 0x0000000704007986 */
/* 0x0001e8000c10190a */
/*0680*/ LDG.E R9, [R2.64+0x4] ; /* 0x0000040a02097981 */
/* 0x000ea8000c1e1900 */
/*0690*/ LDG.E R7, [R4.64+0x10] ; /* 0x0000100a04077981 */
/* 0x001ee2000c1e1900 */
/*06a0*/ FADD R9, R8, R9 ; /* 0x0000000908097221 */
/* 0x004fc60000000000 */
/*06b0*/ LDG.E R8, [R4.64+0x8] ; /* 0x0000080a04087981 */
/* 0x000ea8000c1e1900 */
/*06c0*/ STG.E [R4.64+0x4], R9 ; /* 0x0000040904007986 */
/* 0x0001e8000c10190a */
/*06d0*/ LDG.E R11, [R2.64+0x8] ; /* 0x0000080a020b7981 */
/* 0x000ea4000c1e1900 */
/*06e0*/ FADD R11, R8, R11 ; /* 0x0000000b080b7221 */
/* 0x004fc40000000000 */
/*06f0*/ LDG.E R8, [R4.64+0xc] ; /* 0x00000c0a04087981 */
/* 0x000ea8000c1e1900 */
/*0700*/ STG.E [R4.64+0x8], R11 ; /* 0x0000080b04007986 */
/* 0x0003e8000c10190a */
/*0710*/ LDG.E R13, [R2.64+0xc] ; /* 0x00000c0a020d7981 */
/* 0x000ea4000c1e1900 */
/*0720*/ FADD R13, R8, R13 ; /* 0x0000000d080d7221 */
/* 0x004fca0000000000 */
/*0730*/ STG.E [R4.64+0xc], R13 ; /* 0x00000c0d04007986 */
/* 0x0005e8000c10190a */
/*0740*/ LDG.E R8, [R2.64+0x10] ; /* 0x0000100a02087981 */
/* 0x000ee4000c1e1900 */
/*0750*/ FADD R7, R7, R8 ; /* 0x0000000807077221 */
/* 0x008fe40000000000 */
/*0760*/ LDG.E R8, [R4.64+0x14] ; /* 0x0000140a04087981 */
/* 0x000ee8000c1e1900 */
/*0770*/ STG.E [R4.64+0x10], R7 ; /* 0x0000100704007986 */
/* 0x0009e8000c10190a */
/*0780*/ LDG.E R9, [R2.64+0x14] ; /* 0x0000140a02097981 */
/* 0x001ee4000c1e1900 */
/*0790*/ FADD R9, R8, R9 ; /* 0x0000000908097221 */
/* 0x008fc40000000000 */
/*07a0*/ LDG.E R8, [R4.64+0x18] ; /* 0x0000180a04087981 */
/* 0x000ee8000c1e1900 */
/*07b0*/ STG.E [R4.64+0x14], R9 ; /* 0x0000140904007986 */
/* 0x000fe8000c10190a */
/*07c0*/ LDG.E R11, [R2.64+0x18] ; /* 0x0000180a020b7981 */
/* 0x002ee4000c1e1900 */
/*07d0*/ FADD R11, R8, R11 ; /* 0x0000000b080b7221 */
/* 0x008fc40000000000 */
/*07e0*/ LDG.E R8, [R4.64+0x1c] ; /* 0x00001c0a04087981 */
/* 0x000ee8000c1e1900 */
/*07f0*/ STG.E [R4.64+0x18], R11 ; /* 0x0000180b04007986 */
/* 0x000fe8000c10190a */
/*0800*/ LDG.E R13, [R2.64+0x1c] ; /* 0x00001c0a020d7981 */
/* 0x0040e2000c1e1900 */
/*0810*/ IADD3 R7, P2, R4, 0x20, RZ ; /* 0x0000002004077810 */
/* 0x010fe40007f5e0ff */
/*0820*/ IADD3 R10, P1, R2, 0x20, RZ ; /* 0x00000020020a7810 */
/* 0x000fc40007f3e0ff */
/*0830*/ PLOP3.LUT P0, PT, PT, PT, PT, 0x8, 0x0 ; /* 0x000000000000781c */
/* 0x000fe40003f0e170 */
/*0840*/ IADD3 R6, R6, -0x8, RZ ; /* 0xfffffff806067810 */
/* 0x000fe20007ffe0ff */
/*0850*/ IMAD.X R3, RZ, RZ, R3, P1 ; /* 0x000000ffff037224 */
/* 0x001fe400008e0603 */
/*0860*/ IMAD.MOV.U32 R2, RZ, RZ, R10 ; /* 0x000000ffff027224 */
/* 0x000fe200078e000a */
/*0870*/ UIADD3 UR4, UR4, 0x8, URZ ; /* 0x0000000804047890 */
/* 0x000fe2000fffe03f */
/*0880*/ FADD R13, R8, R13 ; /* 0x0000000d080d7221 */
/* 0x008fe20000000000 */
/*0890*/ IADD3.X R8, RZ, R5, RZ, P2, !PT ; /* 0x00000005ff087210 */
/* 0x000fc800017fe4ff */
/*08a0*/ STG.E [R4.64+0x1c], R13 ; /* 0x00001c0d04007986 */
/* 0x0001e4000c10190a */
/*08b0*/ MOV R4, R7 ; /* 0x0000000700047202 */
/* 0x001fe20000000f00 */
/*08c0*/ IMAD.MOV.U32 R5, RZ, RZ, R8 ; /* 0x000000ffff057224 */
/* 0x000fe400078e0008 */
/*08d0*/ ISETP.NE.OR P0, PT, R6, RZ, P0 ; /* 0x000000ff0600720c */
/* 0x000fda0000705670 */
/*08e0*/ @!P0 BRA 0xaa0 ; /* 0x000001b000008947 */
/* 0x000fea0003800000 */
/*08f0*/ LDG.E R7, [R4.64] ; /* 0x0000000a04077981 */
/* 0x000ea8000c1e1900 */
/*0900*/ LDG.E R8, [R2.64] ; /* 0x0000000a02087981 */
/* 0x000ea4000c1e1900 */
/*0910*/ FADD R7, R7, R8 ; /* 0x0000000807077221 */
/* 0x004fe40000000000 */
/*0920*/ LDG.E R8, [R4.64+0x4] ; /* 0x0000040a04087981 */
/* 0x000ea8000c1e1900 */
/*0930*/ STG.E [R4.64], R7 ; /* 0x0000000704007986 */
/* 0x0001e8000c10190a */
/*0940*/ LDG.E R9, [R2.64+0x4] ; /* 0x0000040a02097981 */
/* 0x000ea4000c1e1900 */
/*0950*/ FADD R9, R8, R9 ; /* 0x0000000908097221 */
/* 0x004fc40000000000 */
/*0960*/ LDG.E R8, [R4.64+0x8] ; /* 0x0000080a04087981 */
/* 0x000ea8000c1e1900 */
/*0970*/ STG.E [R4.64+0x4], R9 ; /* 0x0000040904007986 */
/* 0x000fe8000c10190a */
/*0980*/ LDG.E R11, [R2.64+0x8] ; /* 0x0000080a020b7981 */
/* 0x000ea2000c1e1900 */
/*0990*/ IADD3 R6, R6, -0x4, RZ ; /* 0xfffffffc06067810 */
/* 0x000fe20007ffe0ff */
/*09a0*/ FADD R11, R8, R11 ; /* 0x0000000b080b7221 */
/* 0x004fc40000000000 */
/*09b0*/ LDG.E R8, [R4.64+0xc] ; /* 0x00000c0a04087981 */
/* 0x000ea8000c1e1900 */
/*09c0*/ STG.E [R4.64+0x8], R11 ; /* 0x0000080b04007986 */
/* 0x000fe8000c10190a */
/*09d0*/ LDG.E R13, [R2.64+0xc] ; /* 0x00000c0a020d7981 */
/* 0x0002a2000c1e1900 */
/*09e0*/ ISETP.NE.AND P0, PT, R6, RZ, PT ; /* 0x000000ff0600720c */
/* 0x000fe20003f05270 */
/*09f0*/ UIADD3 UR4, UR4, 0x4, URZ ; /* 0x0000000404047890 */
/* 0x000fe2000fffe03f */
/*0a00*/ IADD3 R7, P2, R4, 0x10, RZ ; /* 0x0000001004077810 */
/* 0x001fc40007f5e0ff */
/*0a10*/ IADD3 R10, P1, R2, 0x10, RZ ; /* 0x00000010020a7810 */
/* 0x000fc80007f3e0ff */
/*0a20*/ IADD3.X R3, RZ, R3, RZ, P1, !PT ; /* 0x00000003ff037210 */
/* 0x002fe40000ffe4ff */
/*0a30*/ MOV R2, R10 ; /* 0x0000000a00027202 */
/* 0x000fe20000000f00 */
/*0a40*/ FADD R13, R8, R13 ; /* 0x0000000d080d7221 */
/* 0x004fe40000000000 */
/*0a50*/ IMAD.X R8, RZ, RZ, R5, P2 ; /* 0x000000ffff087224 */
/* 0x000fc600010e0605 */
/*0a60*/ STG.E [R4.64+0xc], R13 ; /* 0x00000c0d04007986 */
/* 0x0001e4000c10190a */
/*0a70*/ IMAD.MOV.U32 R4, RZ, RZ, R7 ; /* 0x000000ffff047224 */
/* 0x001fe200078e0007 */
/*0a80*/ MOV R5, R8 ; /* 0x0000000800057202 */
/* 0x000fe20000000f00 */
/*0a90*/ @P0 BRA 0x8f0 ; /* 0xfffffe5000000947 */
/* 0x000fea000383ffff */
/*0aa0*/ ISETP.NE.AND P0, PT, R0, RZ, PT ; /* 0x000000ff0000720c */
/* 0x000fda0003f05270 */
/*0ab0*/ @!P0 EXIT ; /* 0x000000000000894d */
/* 0x000fea0003800000 */
/*0ac0*/ UMOV UR5, 0x4 ; /* 0x0000000400057882 */
/* 0x000fe40000000000 */
/*0ad0*/ ULDC.64 UR6, c[0x0][0x170] ; /* 0x00005c0000067ab9 */
/* 0x000fe40000000a00 */
/*0ae0*/ UIMAD.WIDE UR6, UR4, UR5, UR6 ; /* 0x00000005040672a5 */
/* 0x000fe4000f8e0206 */
/*0af0*/ ULDC.64 UR8, c[0x0][0x168] ; /* 0x00005a0000087ab9 */
/* 0x000fe40000000a00 */
/*0b00*/ UIMAD.WIDE UR4, UR4, UR5, UR8 ; /* 0x00000005040472a5 */
/* 0x000fe4000f8e0208 */
/*0b10*/ IMAD.U32 R2, RZ, RZ, UR6 ; /* 0x00000006ff027e24 */
/* 0x000fe2000f8e00ff */
/*0b20*/ MOV R5, UR7 ; /* 0x0000000700057c02 */
/* 0x000fe20008000f00 */
/*0b30*/ IMAD.U32 R4, RZ, RZ, UR6 ; /* 0x00000006ff047e24 */
/* 0x000fe2000f8e00ff */
/*0b40*/ MOV R3, UR7 ; /* 0x0000000700037c02 */
/* 0x000fe20008000f00 */
/*0b50*/ IMAD.MOV.U32 R6, RZ, RZ, R2 ; /* 0x000000ffff067224 */
/* 0x000fe200078e0002 */
/*0b60*/ MOV R9, R5 ; /* 0x0000000500097202 */
/* 0x000fc40000000f00 */
/*0b70*/ MOV R5, UR5 ; /* 0x0000000500057c02 */
/* 0x000fe20008000f00 */
/*0b80*/ IMAD.U32 R4, RZ, RZ, UR4 ; /* 0x00000004ff047e24 */
/* 0x000fe2000f8e00ff */
/*0b90*/ MOV R3, R9 ; /* 0x0000000900037202 */
/* 0x001fe20000000f00 */
/*0ba0*/ IMAD.MOV.U32 R2, RZ, RZ, R6 ; /* 0x000000ffff027224 */
/* 0x000fc600078e0006 */
/*0bb0*/ LDG.E R5, [R4.64] ; /* 0x0000000a04057981 */
/* 0x000ea8000c1e1900 */
/*0bc0*/ LDG.E R6, [R2.64] ; /* 0x0000000a02067981 */
/* 0x000ea2000c1e1900 */
/*0bd0*/ IADD3 R0, R0, -0x1, RZ ; /* 0xffffffff00007810 */
/* 0x000fc80007ffe0ff */
/*0be0*/ ISETP.NE.AND P0, PT, R0, RZ, PT ; /* 0x000000ff0000720c */
/* 0x000fe20003f05270 */
/*0bf0*/ UIADD3 UR4, UP0, UR4, 0x4, URZ ; /* 0x0000000404047890 */
/* 0x000fc8000ff1e03f */
/*0c00*/ UIADD3.X UR5, URZ, UR5, URZ, UP0, !UPT ; /* 0x000000053f057290 */
/* 0x000fe200087fe43f */
/*0c10*/ FADD R7, R6, R5 ; /* 0x0000000506077221 */
/* 0x004fe20000000000 */
/*0c20*/ IADD3 R6, P1, R2, 0x4, RZ ; /* 0x0000000402067810 */
/* 0x000fc80007f3e0ff */
/*0c30*/ STG.E [R2.64], R7 ; /* 0x0000000702007986 */
/* 0x0001e2000c10190a */
/*0c40*/ IADD3.X R9, RZ, R3, RZ, P1, !PT ; /* 0x00000003ff097210 */
/* 0x000fe20000ffe4ff */
/*0c50*/ @P0 BRA 0xb70 ; /* 0xffffff1000000947 */
/* 0x000fea000383ffff */
/*0c60*/ EXIT ; /* 0x000000000000794d */
/* 0x000fea0003800000 */
/*0c70*/ BRA 0xc70; /* 0xfffffff000007947 */
/* 0x000fc0000383ffff */
/*0c80*/ NOP; /* 0x0000000000007918 */
/* 0x000fc00000000000 */
/*0c90*/ NOP; /* 0x0000000000007918 */
/* 0x000fc00000000000 */
/*0ca0*/ NOP; /* 0x0000000000007918 */
/* 0x000fc00000000000 */
/*0cb0*/ NOP; /* 0x0000000000007918 */
/* 0x000fc00000000000 */
/*0cc0*/ NOP; /* 0x0000000000007918 */
/* 0x000fc00000000000 */
/*0cd0*/ NOP; /* 0x0000000000007918 */
/* 0x000fc00000000000 */
/*0ce0*/ NOP; /* 0x0000000000007918 */
/* 0x000fc00000000000 */
/*0cf0*/ NOP; /* 0x0000000000007918 */
/* 0x000fc00000000000 */
.......... | .text
.amdgcn_target "amdgcn-amd-amdhsa--gfx1100"
.protected _Z3addiPfS_
.globl _Z3addiPfS_
.p2align 8
.type _Z3addiPfS_,@function
_Z3addiPfS_:
s_load_b32 s4, s[0:1], 0x0
s_waitcnt lgkmcnt(0)
s_cmp_lt_i32 s4, 1
s_cbranch_scc1 .LBB0_3
s_load_b128 s[0:3], s[0:1], 0x8
v_mov_b32_e32 v0, 0
.LBB0_2:
s_waitcnt lgkmcnt(0)
s_clause 0x1
global_load_b32 v1, v0, s[0:1]
global_load_b32 v2, v0, s[2:3]
s_add_i32 s4, s4, -1
s_add_u32 s0, s0, 4
s_addc_u32 s1, s1, 0
s_waitcnt vmcnt(0)
v_add_f32_e32 v1, v1, v2
global_store_b32 v0, v1, s[2:3]
s_add_u32 s2, s2, 4
s_addc_u32 s3, s3, 0
s_cmp_eq_u32 s4, 0
s_cbranch_scc0 .LBB0_2
.LBB0_3:
s_nop 0
s_sendmsg sendmsg(MSG_DEALLOC_VGPRS)
s_endpgm
.section .rodata,"a",@progbits
.p2align 6, 0x0
.amdhsa_kernel _Z3addiPfS_
.amdhsa_group_segment_fixed_size 0
.amdhsa_private_segment_fixed_size 0
.amdhsa_kernarg_size 24
.amdhsa_user_sgpr_count 15
.amdhsa_user_sgpr_dispatch_ptr 0
.amdhsa_user_sgpr_queue_ptr 0
.amdhsa_user_sgpr_kernarg_segment_ptr 1
.amdhsa_user_sgpr_dispatch_id 0
.amdhsa_user_sgpr_private_segment_size 0
.amdhsa_wavefront_size32 1
.amdhsa_uses_dynamic_stack 0
.amdhsa_enable_private_segment 0
.amdhsa_system_sgpr_workgroup_id_x 1
.amdhsa_system_sgpr_workgroup_id_y 0
.amdhsa_system_sgpr_workgroup_id_z 0
.amdhsa_system_sgpr_workgroup_info 0
.amdhsa_system_vgpr_workitem_id 0
.amdhsa_next_free_vgpr 3
.amdhsa_next_free_sgpr 5
.amdhsa_reserve_vcc 0
.amdhsa_float_round_mode_32 0
.amdhsa_float_round_mode_16_64 0
.amdhsa_float_denorm_mode_32 3
.amdhsa_float_denorm_mode_16_64 3
.amdhsa_dx10_clamp 1
.amdhsa_ieee_mode 1
.amdhsa_fp16_overflow 0
.amdhsa_workgroup_processor_mode 1
.amdhsa_memory_ordered 1
.amdhsa_forward_progress 0
.amdhsa_shared_vgpr_count 0
.amdhsa_exception_fp_ieee_invalid_op 0
.amdhsa_exception_fp_denorm_src 0
.amdhsa_exception_fp_ieee_div_zero 0
.amdhsa_exception_fp_ieee_overflow 0
.amdhsa_exception_fp_ieee_underflow 0
.amdhsa_exception_fp_ieee_inexact 0
.amdhsa_exception_int_div_zero 0
.end_amdhsa_kernel
.text
.Lfunc_end0:
.size _Z3addiPfS_, .Lfunc_end0-_Z3addiPfS_
.section .AMDGPU.csdata,"",@progbits
.text
.p2alignl 7, 3214868480
.fill 96, 4, 3214868480
.type __hip_cuid_,@object
.section .bss,"aw",@nobits
.globl __hip_cuid_
__hip_cuid_:
.byte 0
.size __hip_cuid_, 1
.ident "AMD clang version 18.0.0git (https://github.com/RadeonOpenCompute/llvm-project roc-6.3.2 25012 e5bf7e55c91490b07c49d8960fa7983d864936c4)"
.section ".note.GNU-stack","",@progbits
.addrsig
.addrsig_sym __hip_cuid_
.amdgpu_metadata
---
amdhsa.kernels:
- .args:
- .offset: 0
.size: 4
.value_kind: by_value
- .address_space: global
.offset: 8
.size: 8
.value_kind: global_buffer
- .address_space: global
.offset: 16
.size: 8
.value_kind: global_buffer
.group_segment_fixed_size: 0
.kernarg_segment_align: 8
.kernarg_segment_size: 24
.language: OpenCL C
.language_version:
- 2
- 0
.max_flat_workgroup_size: 1024
.name: _Z3addiPfS_
.private_segment_fixed_size: 0
.sgpr_count: 5
.sgpr_spill_count: 0
.symbol: _Z3addiPfS_.kd
.uniform_work_group_size: 1
.uses_dynamic_stack: false
.vgpr_count: 3
.vgpr_spill_count: 0
.wavefront_size: 32
.workgroup_processor_mode: 1
amdhsa.target: amdgcn-amd-amdhsa--gfx1100
amdhsa.version:
- 1
- 2
...
.end_amdgpu_metadata |
You are a helpful coding assistant specialized in converting from CUDA host assembly to AMD host assembly. | .file "tmpxft_001ab488_00000000-6_add.cudafe1.cpp"
.text
#APP
#NO_APP
.type _ZL26__cudaUnregisterBinaryUtilv, @function
_ZL26__cudaUnregisterBinaryUtilv:
.LFB2060:
.cfi_startproc
endbr64
subq $8, %rsp
.cfi_def_cfa_offset 16
movq _ZL20__cudaFatCubinHandle(%rip), %rdi
call __cudaUnregisterFatBinary@PLT
addq $8, %rsp
.cfi_def_cfa_offset 8
ret
.cfi_endproc
.LFE2060:
.size _ZL26__cudaUnregisterBinaryUtilv, .-_ZL26__cudaUnregisterBinaryUtilv
.globl _Z25__device_stub__Z3addiPfS_iPfS_
.type _Z25__device_stub__Z3addiPfS_iPfS_, @function
_Z25__device_stub__Z3addiPfS_iPfS_:
.LFB2082:
.cfi_startproc
endbr64
subq $136, %rsp
.cfi_def_cfa_offset 144
movl %edi, 28(%rsp)
movq %rsi, 16(%rsp)
movq %rdx, 8(%rsp)
movq %fs:40, %rax
movq %rax, 120(%rsp)
xorl %eax, %eax
leaq 28(%rsp), %rax
movq %rax, 96(%rsp)
leaq 16(%rsp), %rax
movq %rax, 104(%rsp)
leaq 8(%rsp), %rax
movq %rax, 112(%rsp)
movl $1, 48(%rsp)
movl $1, 52(%rsp)
movl $1, 56(%rsp)
movl $1, 60(%rsp)
movl $1, 64(%rsp)
movl $1, 68(%rsp)
leaq 40(%rsp), %rcx
leaq 32(%rsp), %rdx
leaq 60(%rsp), %rsi
leaq 48(%rsp), %rdi
call __cudaPopCallConfiguration@PLT
testl %eax, %eax
je .L7
.L3:
movq 120(%rsp), %rax
subq %fs:40, %rax
jne .L8
addq $136, %rsp
.cfi_remember_state
.cfi_def_cfa_offset 8
ret
.L7:
.cfi_restore_state
pushq 40(%rsp)
.cfi_def_cfa_offset 152
pushq 40(%rsp)
.cfi_def_cfa_offset 160
leaq 112(%rsp), %r9
movq 76(%rsp), %rcx
movl 84(%rsp), %r8d
movq 64(%rsp), %rsi
movl 72(%rsp), %edx
leaq _Z3addiPfS_(%rip), %rdi
call cudaLaunchKernel@PLT
addq $16, %rsp
.cfi_def_cfa_offset 144
jmp .L3
.L8:
call __stack_chk_fail@PLT
.cfi_endproc
.LFE2082:
.size _Z25__device_stub__Z3addiPfS_iPfS_, .-_Z25__device_stub__Z3addiPfS_iPfS_
.globl _Z3addiPfS_
.type _Z3addiPfS_, @function
_Z3addiPfS_:
.LFB2083:
.cfi_startproc
endbr64
subq $8, %rsp
.cfi_def_cfa_offset 16
call _Z25__device_stub__Z3addiPfS_iPfS_
addq $8, %rsp
.cfi_def_cfa_offset 8
ret
.cfi_endproc
.LFE2083:
.size _Z3addiPfS_, .-_Z3addiPfS_
.section .rodata.str1.1,"aMS",@progbits,1
.LC5:
.string "Max error: %f\n"
.text
.globl main
.type main, @function
main:
.LFB2057:
.cfi_startproc
endbr64
pushq %rbp
.cfi_def_cfa_offset 16
.cfi_offset 6, -16
pushq %rbx
.cfi_def_cfa_offset 24
.cfi_offset 3, -24
subq $56, %rsp
.cfi_def_cfa_offset 80
movq %fs:40, %rax
movq %rax, 40(%rsp)
xorl %eax, %eax
movq %rsp, %rdi
movl $1, %edx
movl $4000000, %esi
call cudaMallocManaged@PLT
leaq 8(%rsp), %rdi
movl $1, %edx
movl $4000000, %esi
call cudaMallocManaged@PLT
movl $0, %eax
movss .LC1(%rip), %xmm1
movss .LC2(%rip), %xmm0
.L12:
movq (%rsp), %rdx
movss %xmm1, (%rdx,%rax)
movq 8(%rsp), %rdx
movss %xmm0, (%rdx,%rax)
addq $4, %rax
cmpq $4000000, %rax
jne .L12
movl $1, 28(%rsp)
movl $1, 32(%rsp)
movl $1, 36(%rsp)
movl $1, 16(%rsp)
movl $1, 20(%rsp)
movl $1, 24(%rsp)
movl $0, %r9d
movl $0, %r8d
movq 28(%rsp), %rdx
movl $1, %ecx
movq 16(%rsp), %rdi
movl $1, %esi
call __cudaPushCallConfiguration@PLT
testl %eax, %eax
je .L19
.L13:
call cudaDeviceSynchronize@PLT
movq 8(%rsp), %rbx
leaq 4000000(%rbx), %rbp
pxor %xmm1, %xmm1
.L14:
pxor %xmm0, %xmm0
cvtss2sd (%rbx), %xmm0
subsd .LC3(%rip), %xmm0
andpd .LC4(%rip), %xmm0
cvtss2sd %xmm1, %xmm1
call fmax@PLT
pxor %xmm1, %xmm1
cvtsd2ss %xmm0, %xmm1
addq $4, %rbx
cmpq %rbp, %rbx
jne .L14
pxor %xmm0, %xmm0
cvtss2sd %xmm1, %xmm0
leaq .LC5(%rip), %rsi
movl $2, %edi
movl $1, %eax
call __printf_chk@PLT
movq (%rsp), %rdi
call cudaFree@PLT
movq 8(%rsp), %rdi
call cudaFree@PLT
movq 40(%rsp), %rax
subq %fs:40, %rax
jne .L20
movl $0, %eax
addq $56, %rsp
.cfi_remember_state
.cfi_def_cfa_offset 24
popq %rbx
.cfi_def_cfa_offset 16
popq %rbp
.cfi_def_cfa_offset 8
ret
.L19:
.cfi_restore_state
movq 8(%rsp), %rdx
movq (%rsp), %rsi
movl $1000000, %edi
call _Z25__device_stub__Z3addiPfS_iPfS_
jmp .L13
.L20:
call __stack_chk_fail@PLT
.cfi_endproc
.LFE2057:
.size main, .-main
.section .rodata.str1.1
.LC6:
.string "_Z3addiPfS_"
.text
.type _ZL24__sti____cudaRegisterAllv, @function
_ZL24__sti____cudaRegisterAllv:
.LFB2085:
.cfi_startproc
endbr64
subq $8, %rsp
.cfi_def_cfa_offset 16
leaq _ZL15__fatDeviceText(%rip), %rdi
call __cudaRegisterFatBinary@PLT
movq %rax, %rdi
movq %rax, _ZL20__cudaFatCubinHandle(%rip)
pushq $0
.cfi_def_cfa_offset 24
pushq $0
.cfi_def_cfa_offset 32
pushq $0
.cfi_def_cfa_offset 40
pushq $0
.cfi_def_cfa_offset 48
movl $0, %r9d
movl $-1, %r8d
leaq .LC6(%rip), %rdx
movq %rdx, %rcx
leaq _Z3addiPfS_(%rip), %rsi
call __cudaRegisterFunction@PLT
addq $32, %rsp
.cfi_def_cfa_offset 16
movq _ZL20__cudaFatCubinHandle(%rip), %rdi
call __cudaRegisterFatBinaryEnd@PLT
leaq _ZL26__cudaUnregisterBinaryUtilv(%rip), %rdi
call atexit@PLT
addq $8, %rsp
.cfi_def_cfa_offset 8
ret
.cfi_endproc
.LFE2085:
.size _ZL24__sti____cudaRegisterAllv, .-_ZL24__sti____cudaRegisterAllv
.section .init_array,"aw"
.align 8
.quad _ZL24__sti____cudaRegisterAllv
.section .nvFatBinSegment,"aw"
.align 8
.type _ZL15__fatDeviceText, @object
.size _ZL15__fatDeviceText, 24
_ZL15__fatDeviceText:
.long 1180844977
.long 1
.quad fatbinData
.quad 0
.local _ZL20__cudaFatCubinHandle
.comm _ZL20__cudaFatCubinHandle,8,8
.section .rodata.cst4,"aM",@progbits,4
.align 4
.LC1:
.long 1065353216
.align 4
.LC2:
.long 1073741824
.section .rodata.cst8,"aM",@progbits,8
.align 8
.LC3:
.long 0
.long 1074266112
.section .rodata.cst16,"aM",@progbits,16
.align 16
.LC4:
.long -1
.long 2147483647
.long 0
.long 0
.ident "GCC: (Ubuntu 13.3.0-6ubuntu2~24.04) 13.3.0"
.section .note.GNU-stack,"",@progbits
.section .note.gnu.property,"a"
.align 8
.long 1f - 0f
.long 4f - 1f
.long 5
0:
.string "GNU"
1:
.align 8
.long 0xc0000002
.long 3f - 2f
2:
.long 0x3
3:
.align 8
4: | .text
.file "add.hip"
.globl _Z18__device_stub__addiPfS_ # -- Begin function _Z18__device_stub__addiPfS_
.p2align 4, 0x90
.type _Z18__device_stub__addiPfS_,@function
_Z18__device_stub__addiPfS_: # @_Z18__device_stub__addiPfS_
.cfi_startproc
# %bb.0:
subq $104, %rsp
.cfi_def_cfa_offset 112
movl %edi, 12(%rsp)
movq %rsi, 72(%rsp)
movq %rdx, 64(%rsp)
leaq 12(%rsp), %rax
movq %rax, 80(%rsp)
leaq 72(%rsp), %rax
movq %rax, 88(%rsp)
leaq 64(%rsp), %rax
movq %rax, 96(%rsp)
leaq 48(%rsp), %rdi
leaq 32(%rsp), %rsi
leaq 24(%rsp), %rdx
leaq 16(%rsp), %rcx
callq __hipPopCallConfiguration
movq 48(%rsp), %rsi
movl 56(%rsp), %edx
movq 32(%rsp), %rcx
movl 40(%rsp), %r8d
leaq 80(%rsp), %r9
movl $_Z3addiPfS_, %edi
pushq 16(%rsp)
.cfi_adjust_cfa_offset 8
pushq 32(%rsp)
.cfi_adjust_cfa_offset 8
callq hipLaunchKernel
addq $120, %rsp
.cfi_adjust_cfa_offset -120
retq
.Lfunc_end0:
.size _Z18__device_stub__addiPfS_, .Lfunc_end0-_Z18__device_stub__addiPfS_
.cfi_endproc
# -- End function
.section .rodata.cst8,"aM",@progbits,8
.p2align 3, 0x0 # -- Begin function main
.LCPI1_0:
.quad 0xc008000000000000 # double -3
.section .rodata.cst16,"aM",@progbits,16
.p2align 4, 0x0
.LCPI1_1:
.quad 0x7fffffffffffffff # double NaN
.quad 0x7fffffffffffffff # double NaN
.text
.globl main
.p2align 4, 0x90
.type main,@function
main: # @main
.cfi_startproc
# %bb.0:
subq $120, %rsp
.cfi_def_cfa_offset 128
leaq 16(%rsp), %rdi
movl $4000000, %esi # imm = 0x3D0900
movl $1, %edx
callq hipMallocManaged
leaq 8(%rsp), %rdi
movl $4000000, %esi # imm = 0x3D0900
movl $1, %edx
callq hipMallocManaged
movq 16(%rsp), %rax
xorl %ecx, %ecx
movq 8(%rsp), %rdx
.p2align 4, 0x90
.LBB1_1: # =>This Inner Loop Header: Depth=1
movl $1065353216, (%rax,%rcx,4) # imm = 0x3F800000
movl $1073741824, (%rdx,%rcx,4) # imm = 0x40000000
incq %rcx
cmpq $1000000, %rcx # imm = 0xF4240
jne .LBB1_1
# %bb.2:
movabsq $4294967297, %rdi # imm = 0x100000001
movl $1, %esi
movq %rdi, %rdx
movl $1, %ecx
xorl %r8d, %r8d
xorl %r9d, %r9d
callq __hipPushCallConfiguration
testl %eax, %eax
jne .LBB1_4
# %bb.3:
movq 16(%rsp), %rax
movq 8(%rsp), %rcx
movl $1000000, 28(%rsp) # imm = 0xF4240
movq %rax, 88(%rsp)
movq %rcx, 80(%rsp)
leaq 28(%rsp), %rax
movq %rax, 96(%rsp)
leaq 88(%rsp), %rax
movq %rax, 104(%rsp)
leaq 80(%rsp), %rax
movq %rax, 112(%rsp)
leaq 64(%rsp), %rdi
leaq 48(%rsp), %rsi
leaq 40(%rsp), %rdx
leaq 32(%rsp), %rcx
callq __hipPopCallConfiguration
movq 64(%rsp), %rsi
movl 72(%rsp), %edx
movq 48(%rsp), %rcx
movl 56(%rsp), %r8d
leaq 96(%rsp), %r9
movl $_Z3addiPfS_, %edi
pushq 32(%rsp)
.cfi_adjust_cfa_offset 8
pushq 48(%rsp)
.cfi_adjust_cfa_offset 8
callq hipLaunchKernel
addq $16, %rsp
.cfi_adjust_cfa_offset -16
.LBB1_4:
callq hipDeviceSynchronize
xorps %xmm2, %xmm2
xorl %eax, %eax
movq 8(%rsp), %rcx
movsd .LCPI1_0(%rip), %xmm0 # xmm0 = mem[0],zero
movapd .LCPI1_1(%rip), %xmm1 # xmm1 = [NaN,NaN]
.p2align 4, 0x90
.LBB1_5: # =>This Inner Loop Header: Depth=1
cvtss2sd %xmm2, %xmm2
movss (%rcx,%rax,4), %xmm3 # xmm3 = mem[0],zero,zero,zero
cvtss2sd %xmm3, %xmm3
addsd %xmm0, %xmm3
andpd %xmm1, %xmm3
movaps %xmm2, %xmm4
cmpunordsd %xmm2, %xmm4
movapd %xmm4, %xmm5
andpd %xmm3, %xmm5
maxsd %xmm2, %xmm3
andnpd %xmm3, %xmm4
orpd %xmm5, %xmm4
xorps %xmm2, %xmm2
cvtsd2ss %xmm4, %xmm2
incq %rax
cmpq $1000000, %rax # imm = 0xF4240
jne .LBB1_5
# %bb.6:
xorps %xmm0, %xmm0
cvtss2sd %xmm2, %xmm0
movl $.L.str, %edi
movb $1, %al
callq printf
movq 16(%rsp), %rdi
callq hipFree
movq 8(%rsp), %rdi
callq hipFree
xorl %eax, %eax
addq $120, %rsp
.cfi_def_cfa_offset 8
retq
.Lfunc_end1:
.size main, .Lfunc_end1-main
.cfi_endproc
# -- End function
.p2align 4, 0x90 # -- Begin function __hip_module_ctor
.type __hip_module_ctor,@function
__hip_module_ctor: # @__hip_module_ctor
.cfi_startproc
# %bb.0:
subq $40, %rsp
.cfi_def_cfa_offset 48
cmpq $0, __hip_gpubin_handle(%rip)
jne .LBB2_2
# %bb.1:
movl $__hip_fatbin_wrapper, %edi
callq __hipRegisterFatBinary
movq %rax, __hip_gpubin_handle(%rip)
.LBB2_2:
movq __hip_gpubin_handle(%rip), %rdi
xorps %xmm0, %xmm0
movups %xmm0, 16(%rsp)
movups %xmm0, (%rsp)
movl $_Z3addiPfS_, %esi
movl $.L__unnamed_1, %edx
movl $.L__unnamed_1, %ecx
movl $-1, %r8d
xorl %r9d, %r9d
callq __hipRegisterFunction
movl $__hip_module_dtor, %edi
addq $40, %rsp
.cfi_def_cfa_offset 8
jmp atexit # TAILCALL
.Lfunc_end2:
.size __hip_module_ctor, .Lfunc_end2-__hip_module_ctor
.cfi_endproc
# -- End function
.p2align 4, 0x90 # -- Begin function __hip_module_dtor
.type __hip_module_dtor,@function
__hip_module_dtor: # @__hip_module_dtor
.cfi_startproc
# %bb.0:
movq __hip_gpubin_handle(%rip), %rdi
testq %rdi, %rdi
je .LBB3_2
# %bb.1:
pushq %rax
.cfi_def_cfa_offset 16
callq __hipUnregisterFatBinary
movq $0, __hip_gpubin_handle(%rip)
addq $8, %rsp
.cfi_def_cfa_offset 8
.LBB3_2:
retq
.Lfunc_end3:
.size __hip_module_dtor, .Lfunc_end3-__hip_module_dtor
.cfi_endproc
# -- End function
.type _Z3addiPfS_,@object # @_Z3addiPfS_
.section .rodata,"a",@progbits
.globl _Z3addiPfS_
.p2align 3, 0x0
_Z3addiPfS_:
.quad _Z18__device_stub__addiPfS_
.size _Z3addiPfS_, 8
.type .L.str,@object # @.str
.section .rodata.str1.1,"aMS",@progbits,1
.L.str:
.asciz "Max error: %f\n"
.size .L.str, 15
.type .L__unnamed_1,@object # @0
.L__unnamed_1:
.asciz "_Z3addiPfS_"
.size .L__unnamed_1, 12
.type __hip_fatbin_wrapper,@object # @__hip_fatbin_wrapper
.section .hipFatBinSegment,"a",@progbits
.p2align 3, 0x0
__hip_fatbin_wrapper:
.long 1212764230 # 0x48495046
.long 1 # 0x1
.quad __hip_fatbin
.quad 0
.size __hip_fatbin_wrapper, 24
.type __hip_gpubin_handle,@object # @__hip_gpubin_handle
.local __hip_gpubin_handle
.comm __hip_gpubin_handle,8,8
.section .init_array,"aw",@init_array
.p2align 3, 0x0
.quad __hip_module_ctor
.type __hip_cuid_,@object # @__hip_cuid_
.bss
.globl __hip_cuid_
__hip_cuid_:
.byte 0 # 0x0
.size __hip_cuid_, 1
.section ".linker-options","e",@llvm_linker_options
.ident "AMD clang version 18.0.0git (https://github.com/RadeonOpenCompute/llvm-project roc-6.3.2 25012 e5bf7e55c91490b07c49d8960fa7983d864936c4)"
.section ".note.GNU-stack","",@progbits
.addrsig
.addrsig_sym _Z18__device_stub__addiPfS_
.addrsig_sym __hip_module_ctor
.addrsig_sym __hip_module_dtor
.addrsig_sym _Z3addiPfS_
.addrsig_sym __hip_fatbin
.addrsig_sym __hip_fatbin_wrapper
.addrsig_sym __hip_cuid_ |
You are a helpful coding assistant specialized in converting CUDA source code to CUDA device assembly. | /*
Submitted By: Sulav Timsina
ID: 50502493
Course: CS 6253 Heterogeneous Computing
Spring , 2018
Submitted On; 04/16/2018
*/
/*
The device property can also be found from command line using the command:
lshw -C display
*/
#include <stdio.h>
int main() {
int nDevices;
cudaGetDeviceCount(&nDevices);
printf("Number of GPUs %d\n",nDevices);
printf("***************************\n***************************\n");
for (int i = 0; i < nDevices; i++) {
cudaDeviceProp prop;
/*prop is a structure which contains different properties of processors as its element*/
cudaGetDeviceProperties(&prop, i);
printf("Device Number: %d\n", i);
printf(" Device name: %s\n", prop.name);
printf(" Memory Clock Rate (KHz): %d\n",
prop.memoryClockRate);
printf(" Memory Bus Width (bits): %d\n",
prop.memoryBusWidth);
printf(" Peak Memory Bandwidth (GB/s): %f\n",
2.0*prop.memoryClockRate*(prop.memoryBusWidth/8)/1.0e6);
printf(" Multiprocessor Count: %d\n",
prop.multiProcessorCount);
printf(" Maximum no. of register available to a thread block: %d\n",
prop.regsPerBlock);
printf(" Maximum no. of threads per block: %d\n",
prop.maxThreadsPerBlock);
printf(" Concurrent Kernels%d\n",
prop.concurrentKernels);
if(prop.integrated)
printf("The device is integrated in the motherboard\n");
else
printf("The device is NOT integrated in the motherboard\n");
printf("***************************\n***************************\n");
}
} | code for sm_80 |
You are a helpful coding assistant specialized in converting CUDA source code to CUDA host assembly. | /*
Submitted By: Sulav Timsina
ID: 50502493
Course: CS 6253 Heterogeneous Computing
Spring , 2018
Submitted On; 04/16/2018
*/
/*
The device property can also be found from command line using the command:
lshw -C display
*/
#include <stdio.h>
int main() {
int nDevices;
cudaGetDeviceCount(&nDevices);
printf("Number of GPUs %d\n",nDevices);
printf("***************************\n***************************\n");
for (int i = 0; i < nDevices; i++) {
cudaDeviceProp prop;
/*prop is a structure which contains different properties of processors as its element*/
cudaGetDeviceProperties(&prop, i);
printf("Device Number: %d\n", i);
printf(" Device name: %s\n", prop.name);
printf(" Memory Clock Rate (KHz): %d\n",
prop.memoryClockRate);
printf(" Memory Bus Width (bits): %d\n",
prop.memoryBusWidth);
printf(" Peak Memory Bandwidth (GB/s): %f\n",
2.0*prop.memoryClockRate*(prop.memoryBusWidth/8)/1.0e6);
printf(" Multiprocessor Count: %d\n",
prop.multiProcessorCount);
printf(" Maximum no. of register available to a thread block: %d\n",
prop.regsPerBlock);
printf(" Maximum no. of threads per block: %d\n",
prop.maxThreadsPerBlock);
printf(" Concurrent Kernels%d\n",
prop.concurrentKernels);
if(prop.integrated)
printf("The device is integrated in the motherboard\n");
else
printf("The device is NOT integrated in the motherboard\n");
printf("***************************\n***************************\n");
}
} | .file "tmpxft_000b540a_00000000-6_device.cudafe1.cpp"
.text
#APP
#NO_APP
.type _ZL26__cudaUnregisterBinaryUtilv, @function
_ZL26__cudaUnregisterBinaryUtilv:
.LFB2060:
.cfi_startproc
endbr64
subq $8, %rsp
.cfi_def_cfa_offset 16
movq _ZL20__cudaFatCubinHandle(%rip), %rdi
call __cudaUnregisterFatBinary@PLT
addq $8, %rsp
.cfi_def_cfa_offset 8
ret
.cfi_endproc
.LFE2060:
.size _ZL26__cudaUnregisterBinaryUtilv, .-_ZL26__cudaUnregisterBinaryUtilv
.section .rodata.str1.1,"aMS",@progbits,1
.LC0:
.string "Number of GPUs %d\n"
.section .rodata.str1.8,"aMS",@progbits,1
.align 8
.LC1:
.string "***************************\n***************************\n"
.section .rodata.str1.1
.LC2:
.string "Device Number: %d\n"
.LC3:
.string " Device name: %s\n"
.section .rodata.str1.8
.align 8
.LC4:
.string " Memory Clock Rate (KHz): %d\n"
.align 8
.LC5:
.string " Memory Bus Width (bits): %d\n"
.align 8
.LC7:
.string " Peak Memory Bandwidth (GB/s): %f\n"
.section .rodata.str1.1
.LC8:
.string " Multiprocessor Count: %d\n"
.section .rodata.str1.8
.align 8
.LC9:
.string " Maximum no. of register available to a thread block: %d\n"
.align 8
.LC10:
.string " Maximum no. of threads per block: %d\n"
.section .rodata.str1.1
.LC11:
.string " Concurrent Kernels%d\n"
.section .rodata.str1.8
.align 8
.LC12:
.string "The device is integrated in the motherboard\n"
.align 8
.LC13:
.string "The device is NOT integrated in the motherboard\n"
.text
.globl main
.type main, @function
main:
.LFB2057:
.cfi_startproc
endbr64
pushq %r14
.cfi_def_cfa_offset 16
.cfi_offset 14, -16
pushq %r13
.cfi_def_cfa_offset 24
.cfi_offset 13, -24
pushq %r12
.cfi_def_cfa_offset 32
.cfi_offset 12, -32
pushq %rbp
.cfi_def_cfa_offset 40
.cfi_offset 6, -40
pushq %rbx
.cfi_def_cfa_offset 48
.cfi_offset 3, -48
subq $1056, %rsp
.cfi_def_cfa_offset 1104
movq %fs:40, %rax
movq %rax, 1048(%rsp)
xorl %eax, %eax
leaq 12(%rsp), %rdi
call cudaGetDeviceCount@PLT
movl 12(%rsp), %edx
leaq .LC0(%rip), %rsi
movl $2, %edi
movl $0, %eax
call __printf_chk@PLT
leaq .LC1(%rip), %rsi
movl $2, %edi
movl $0, %eax
call __printf_chk@PLT
cmpl $0, 12(%rsp)
jle .L4
movl $0, %ebx
leaq .LC2(%rip), %r13
leaq .LC3(%rip), %r12
leaq .LC4(%rip), %rbp
jmp .L7
.L5:
leaq .LC13(%rip), %rsi
movl $2, %edi
movl $0, %eax
call __printf_chk@PLT
.L6:
leaq .LC1(%rip), %rsi
movl $2, %edi
movl $0, %eax
call __printf_chk@PLT
addl $1, %ebx
cmpl %ebx, 12(%rsp)
jle .L4
.L7:
leaq 16(%rsp), %r14
movl %ebx, %esi
movq %r14, %rdi
call cudaGetDeviceProperties_v2@PLT
movl %ebx, %edx
movq %r13, %rsi
movl $2, %edi
movl $0, %eax
call __printf_chk@PLT
movq %r14, %rdx
movq %r12, %rsi
movl $2, %edi
movl $0, %eax
call __printf_chk@PLT
movl 624(%rsp), %edx
movq %rbp, %rsi
movl $2, %edi
movl $0, %eax
call __printf_chk@PLT
movl 628(%rsp), %edx
leaq .LC5(%rip), %rsi
movl $2, %edi
movl $0, %eax
call __printf_chk@PLT
pxor %xmm0, %xmm0
cvtsi2sdl 624(%rsp), %xmm0
addsd %xmm0, %xmm0
movl 628(%rsp), %edx
leal 7(%rdx), %eax
testl %edx, %edx
cmovns %edx, %eax
sarl $3, %eax
pxor %xmm1, %xmm1
cvtsi2sdl %eax, %xmm1
mulsd %xmm1, %xmm0
divsd .LC6(%rip), %xmm0
leaq .LC7(%rip), %rsi
movl $2, %edi
movl $1, %eax
call __printf_chk@PLT
movl 404(%rsp), %edx
leaq .LC8(%rip), %rsi
movl $2, %edi
movl $0, %eax
call __printf_chk@PLT
movl 320(%rsp), %edx
leaq .LC9(%rip), %rsi
movl $2, %edi
movl $0, %eax
call __printf_chk@PLT
movl 336(%rsp), %edx
leaq .LC10(%rip), %rsi
movl $2, %edi
movl $0, %eax
call __printf_chk@PLT
movl 592(%rsp), %edx
leaq .LC11(%rip), %rsi
movl $2, %edi
movl $0, %eax
call __printf_chk@PLT
cmpl $0, 412(%rsp)
je .L5
leaq .LC12(%rip), %rsi
movl $2, %edi
movl $0, %eax
call __printf_chk@PLT
jmp .L6
.L4:
movq 1048(%rsp), %rax
subq %fs:40, %rax
jne .L11
movl $0, %eax
addq $1056, %rsp
.cfi_remember_state
.cfi_def_cfa_offset 48
popq %rbx
.cfi_def_cfa_offset 40
popq %rbp
.cfi_def_cfa_offset 32
popq %r12
.cfi_def_cfa_offset 24
popq %r13
.cfi_def_cfa_offset 16
popq %r14
.cfi_def_cfa_offset 8
ret
.L11:
.cfi_restore_state
call __stack_chk_fail@PLT
.cfi_endproc
.LFE2057:
.size main, .-main
.type _ZL24__sti____cudaRegisterAllv, @function
_ZL24__sti____cudaRegisterAllv:
.LFB2083:
.cfi_startproc
endbr64
subq $8, %rsp
.cfi_def_cfa_offset 16
leaq _ZL15__fatDeviceText(%rip), %rdi
call __cudaRegisterFatBinary@PLT
movq %rax, %rdi
movq %rax, _ZL20__cudaFatCubinHandle(%rip)
call __cudaRegisterFatBinaryEnd@PLT
leaq _ZL26__cudaUnregisterBinaryUtilv(%rip), %rdi
call atexit@PLT
addq $8, %rsp
.cfi_def_cfa_offset 8
ret
.cfi_endproc
.LFE2083:
.size _ZL24__sti____cudaRegisterAllv, .-_ZL24__sti____cudaRegisterAllv
.section .init_array,"aw"
.align 8
.quad _ZL24__sti____cudaRegisterAllv
.section .nvFatBinSegment,"aw"
.align 8
.type _ZL15__fatDeviceText, @object
.size _ZL15__fatDeviceText, 24
_ZL15__fatDeviceText:
.long 1180844977
.long 1
.quad fatbinData
.quad 0
.local _ZL20__cudaFatCubinHandle
.comm _ZL20__cudaFatCubinHandle,8,8
.section .rodata.cst8,"aM",@progbits,8
.align 8
.LC6:
.long 0
.long 1093567616
.ident "GCC: (Ubuntu 13.3.0-6ubuntu2~24.04) 13.3.0"
.section .note.GNU-stack,"",@progbits
.section .note.gnu.property,"a"
.align 8
.long 1f - 0f
.long 4f - 1f
.long 5
0:
.string "GNU"
1:
.align 8
.long 0xc0000002
.long 3f - 2f
2:
.long 0x3
3:
.align 8
4: |
You are a helpful coding assistant specialized in converting CUDA source code to HIP/AMD source code. | /*
Submitted By: Sulav Timsina
ID: 50502493
Course: CS 6253 Heterogeneous Computing
Spring , 2018
Submitted On; 04/16/2018
*/
/*
The device property can also be found from command line using the command:
lshw -C display
*/
#include <stdio.h>
int main() {
int nDevices;
cudaGetDeviceCount(&nDevices);
printf("Number of GPUs %d\n",nDevices);
printf("***************************\n***************************\n");
for (int i = 0; i < nDevices; i++) {
cudaDeviceProp prop;
/*prop is a structure which contains different properties of processors as its element*/
cudaGetDeviceProperties(&prop, i);
printf("Device Number: %d\n", i);
printf(" Device name: %s\n", prop.name);
printf(" Memory Clock Rate (KHz): %d\n",
prop.memoryClockRate);
printf(" Memory Bus Width (bits): %d\n",
prop.memoryBusWidth);
printf(" Peak Memory Bandwidth (GB/s): %f\n",
2.0*prop.memoryClockRate*(prop.memoryBusWidth/8)/1.0e6);
printf(" Multiprocessor Count: %d\n",
prop.multiProcessorCount);
printf(" Maximum no. of register available to a thread block: %d\n",
prop.regsPerBlock);
printf(" Maximum no. of threads per block: %d\n",
prop.maxThreadsPerBlock);
printf(" Concurrent Kernels%d\n",
prop.concurrentKernels);
if(prop.integrated)
printf("The device is integrated in the motherboard\n");
else
printf("The device is NOT integrated in the motherboard\n");
printf("***************************\n***************************\n");
}
} | /*
Submitted By: Sulav Timsina
ID: 50502493
Course: CS 6253 Heterogeneous Computing
Spring , 2018
Submitted On; 04/16/2018
*/
/*
The device property can also be found from command line using the command:
lshw -C display
*/
#include <hip/hip_runtime.h>
#include <stdio.h>
int main() {
int nDevices;
hipGetDeviceCount(&nDevices);
printf("Number of GPUs %d\n",nDevices);
printf("***************************\n***************************\n");
for (int i = 0; i < nDevices; i++) {
hipDeviceProp_t prop;
/*prop is a structure which contains different properties of processors as its element*/
hipGetDeviceProperties(&prop, i);
printf("Device Number: %d\n", i);
printf(" Device name: %s\n", prop.name);
printf(" Memory Clock Rate (KHz): %d\n",
prop.memoryClockRate);
printf(" Memory Bus Width (bits): %d\n",
prop.memoryBusWidth);
printf(" Peak Memory Bandwidth (GB/s): %f\n",
2.0*prop.memoryClockRate*(prop.memoryBusWidth/8)/1.0e6);
printf(" Multiprocessor Count: %d\n",
prop.multiProcessorCount);
printf(" Maximum no. of register available to a thread block: %d\n",
prop.regsPerBlock);
printf(" Maximum no. of threads per block: %d\n",
prop.maxThreadsPerBlock);
printf(" Concurrent Kernels%d\n",
prop.concurrentKernels);
if(prop.integrated)
printf("The device is integrated in the motherboard\n");
else
printf("The device is NOT integrated in the motherboard\n");
printf("***************************\n***************************\n");
}
} |
You are a helpful coding assistant specialized in converting HIP source code to AMD device assembly. | /*
Submitted By: Sulav Timsina
ID: 50502493
Course: CS 6253 Heterogeneous Computing
Spring , 2018
Submitted On; 04/16/2018
*/
/*
The device property can also be found from command line using the command:
lshw -C display
*/
#include <hip/hip_runtime.h>
#include <stdio.h>
int main() {
int nDevices;
hipGetDeviceCount(&nDevices);
printf("Number of GPUs %d\n",nDevices);
printf("***************************\n***************************\n");
for (int i = 0; i < nDevices; i++) {
hipDeviceProp_t prop;
/*prop is a structure which contains different properties of processors as its element*/
hipGetDeviceProperties(&prop, i);
printf("Device Number: %d\n", i);
printf(" Device name: %s\n", prop.name);
printf(" Memory Clock Rate (KHz): %d\n",
prop.memoryClockRate);
printf(" Memory Bus Width (bits): %d\n",
prop.memoryBusWidth);
printf(" Peak Memory Bandwidth (GB/s): %f\n",
2.0*prop.memoryClockRate*(prop.memoryBusWidth/8)/1.0e6);
printf(" Multiprocessor Count: %d\n",
prop.multiProcessorCount);
printf(" Maximum no. of register available to a thread block: %d\n",
prop.regsPerBlock);
printf(" Maximum no. of threads per block: %d\n",
prop.maxThreadsPerBlock);
printf(" Concurrent Kernels%d\n",
prop.concurrentKernels);
if(prop.integrated)
printf("The device is integrated in the motherboard\n");
else
printf("The device is NOT integrated in the motherboard\n");
printf("***************************\n***************************\n");
}
} | .text
.p2alignl 7, 3214868480
.fill 96, 4, 3214868480
.type __hip_cuid_,@object
.section .bss,"aw",@nobits
.globl __hip_cuid_
__hip_cuid_:
.byte 0
.size __hip_cuid_, 1
.ident "AMD clang version 18.0.0git (https://github.com/RadeonOpenCompute/llvm-project roc-6.3.2 25012 e5bf7e55c91490b07c49d8960fa7983d864936c4)"
.section ".note.GNU-stack","",@progbits
.addrsig
.addrsig_sym __hip_cuid_
.amdgcn_target "amdgcn-amd-amdhsa--gfx1100"
.amdgpu_metadata
---
amdhsa.kernels: []
amdhsa.target: amdgcn-amd-amdhsa--gfx1100
amdhsa.version:
- 1
- 2
...
.end_amdgpu_metadata |
You are a helpful coding assistant specialized in converting HIP source code to AMD host assembly. | /*
Submitted By: Sulav Timsina
ID: 50502493
Course: CS 6253 Heterogeneous Computing
Spring , 2018
Submitted On; 04/16/2018
*/
/*
The device property can also be found from command line using the command:
lshw -C display
*/
#include <hip/hip_runtime.h>
#include <stdio.h>
int main() {
int nDevices;
hipGetDeviceCount(&nDevices);
printf("Number of GPUs %d\n",nDevices);
printf("***************************\n***************************\n");
for (int i = 0; i < nDevices; i++) {
hipDeviceProp_t prop;
/*prop is a structure which contains different properties of processors as its element*/
hipGetDeviceProperties(&prop, i);
printf("Device Number: %d\n", i);
printf(" Device name: %s\n", prop.name);
printf(" Memory Clock Rate (KHz): %d\n",
prop.memoryClockRate);
printf(" Memory Bus Width (bits): %d\n",
prop.memoryBusWidth);
printf(" Peak Memory Bandwidth (GB/s): %f\n",
2.0*prop.memoryClockRate*(prop.memoryBusWidth/8)/1.0e6);
printf(" Multiprocessor Count: %d\n",
prop.multiProcessorCount);
printf(" Maximum no. of register available to a thread block: %d\n",
prop.regsPerBlock);
printf(" Maximum no. of threads per block: %d\n",
prop.maxThreadsPerBlock);
printf(" Concurrent Kernels%d\n",
prop.concurrentKernels);
if(prop.integrated)
printf("The device is integrated in the motherboard\n");
else
printf("The device is NOT integrated in the motherboard\n");
printf("***************************\n***************************\n");
}
} | .text
.file "device.hip"
.section .rodata.cst8,"aM",@progbits,8
.p2align 3, 0x0 # -- Begin function main
.LCPI0_0:
.quad 0x412e848000000000 # double 1.0E+6
.text
.globl main
.p2align 4, 0x90
.type main,@function
main: # @main
.cfi_startproc
# %bb.0:
pushq %rbp
.cfi_def_cfa_offset 16
pushq %r14
.cfi_def_cfa_offset 24
pushq %rbx
.cfi_def_cfa_offset 32
subq $1488, %rsp # imm = 0x5D0
.cfi_def_cfa_offset 1520
.cfi_offset %rbx, -32
.cfi_offset %r14, -24
.cfi_offset %rbp, -16
leaq 12(%rsp), %rdi
callq hipGetDeviceCount
movl 12(%rsp), %esi
movl $.L.str, %edi
xorl %eax, %eax
callq printf
movl $.Lstr.3, %edi
callq puts@PLT
cmpl $0, 12(%rsp)
jle .LBB0_3
# %bb.1: # %.lr.ph
leaq 16(%rsp), %rbx
movl $.Lstr.1, %r14d
xorl %ebp, %ebp
.p2align 4, 0x90
.LBB0_2: # =>This Inner Loop Header: Depth=1
movq %rbx, %rdi
movl %ebp, %esi
callq hipGetDevicePropertiesR0600
movl $.L.str.2, %edi
movl %ebp, %esi
xorl %eax, %eax
callq printf
movl $.L.str.3, %edi
movq %rbx, %rsi
xorl %eax, %eax
callq printf
movl 624(%rsp), %esi
movl $.L.str.4, %edi
xorl %eax, %eax
callq printf
movl 628(%rsp), %esi
movl $.L.str.5, %edi
xorl %eax, %eax
callq printf
xorps %xmm1, %xmm1
cvtsi2sdl 624(%rsp), %xmm1
addsd %xmm1, %xmm1
movl 628(%rsp), %eax
leal 7(%rax), %ecx
testl %eax, %eax
cmovnsl %eax, %ecx
sarl $3, %ecx
xorps %xmm0, %xmm0
cvtsi2sd %ecx, %xmm0
mulsd %xmm1, %xmm0
divsd .LCPI0_0(%rip), %xmm0
movl $.L.str.6, %edi
movb $1, %al
callq printf
movl 404(%rsp), %esi
movl $.L.str.7, %edi
xorl %eax, %eax
callq printf
movl 320(%rsp), %esi
movl $.L.str.8, %edi
xorl %eax, %eax
callq printf
movl 336(%rsp), %esi
movl $.L.str.9, %edi
xorl %eax, %eax
callq printf
movl 592(%rsp), %esi
movl $.L.str.10, %edi
xorl %eax, %eax
callq printf
cmpl $0, 412(%rsp)
movl $.Lstr.2, %edi
cmoveq %r14, %rdi
callq puts@PLT
movl $.Lstr.3, %edi
callq puts@PLT
incl %ebp
cmpl 12(%rsp), %ebp
jl .LBB0_2
.LBB0_3: # %._crit_edge
xorl %eax, %eax
addq $1488, %rsp # imm = 0x5D0
.cfi_def_cfa_offset 32
popq %rbx
.cfi_def_cfa_offset 24
popq %r14
.cfi_def_cfa_offset 16
popq %rbp
.cfi_def_cfa_offset 8
retq
.Lfunc_end0:
.size main, .Lfunc_end0-main
.cfi_endproc
# -- End function
.type .L.str,@object # @.str
.section .rodata.str1.1,"aMS",@progbits,1
.L.str:
.asciz "Number of GPUs %d\n"
.size .L.str, 19
.type .L.str.2,@object # @.str.2
.L.str.2:
.asciz "Device Number: %d\n"
.size .L.str.2, 19
.type .L.str.3,@object # @.str.3
.L.str.3:
.asciz " Device name: %s\n"
.size .L.str.3, 19
.type .L.str.4,@object # @.str.4
.L.str.4:
.asciz " Memory Clock Rate (KHz): %d\n"
.size .L.str.4, 31
.type .L.str.5,@object # @.str.5
.L.str.5:
.asciz " Memory Bus Width (bits): %d\n"
.size .L.str.5, 31
.type .L.str.6,@object # @.str.6
.L.str.6:
.asciz " Peak Memory Bandwidth (GB/s): %f\n"
.size .L.str.6, 36
.type .L.str.7,@object # @.str.7
.L.str.7:
.asciz " Multiprocessor Count: %d\n"
.size .L.str.7, 28
.type .L.str.8,@object # @.str.8
.L.str.8:
.asciz " Maximum no. of register available to a thread block: %d\n"
.size .L.str.8, 59
.type .L.str.9,@object # @.str.9
.L.str.9:
.asciz " Maximum no. of threads per block: %d\n"
.size .L.str.9, 40
.type .L.str.10,@object # @.str.10
.L.str.10:
.asciz " Concurrent Kernels%d\n"
.size .L.str.10, 24
.type __hip_cuid_,@object # @__hip_cuid_
.bss
.globl __hip_cuid_
__hip_cuid_:
.byte 0 # 0x0
.size __hip_cuid_, 1
.type .Lstr.1,@object # @str.1
.section .rodata.str1.1,"aMS",@progbits,1
.Lstr.1:
.asciz "The device is NOT integrated in the motherboard"
.size .Lstr.1, 48
.type .Lstr.2,@object # @str.2
.Lstr.2:
.asciz "The device is integrated in the motherboard"
.size .Lstr.2, 44
.type .Lstr.3,@object # @str.3
.Lstr.3:
.asciz "***************************\n***************************"
.size .Lstr.3, 56
.section ".linker-options","e",@llvm_linker_options
.ident "AMD clang version 18.0.0git (https://github.com/RadeonOpenCompute/llvm-project roc-6.3.2 25012 e5bf7e55c91490b07c49d8960fa7983d864936c4)"
.section ".note.GNU-stack","",@progbits
.addrsig
.addrsig_sym __hip_cuid_ |
You are a helpful coding assistant specialized in converting from CUDA device assembly to AMD device assembly. | code for sm_80 | .text
.p2alignl 7, 3214868480
.fill 96, 4, 3214868480
.type __hip_cuid_,@object
.section .bss,"aw",@nobits
.globl __hip_cuid_
__hip_cuid_:
.byte 0
.size __hip_cuid_, 1
.ident "AMD clang version 18.0.0git (https://github.com/RadeonOpenCompute/llvm-project roc-6.3.2 25012 e5bf7e55c91490b07c49d8960fa7983d864936c4)"
.section ".note.GNU-stack","",@progbits
.addrsig
.addrsig_sym __hip_cuid_
.amdgcn_target "amdgcn-amd-amdhsa--gfx1100"
.amdgpu_metadata
---
amdhsa.kernels: []
amdhsa.target: amdgcn-amd-amdhsa--gfx1100
amdhsa.version:
- 1
- 2
...
.end_amdgpu_metadata |
You are a helpful coding assistant specialized in converting from CUDA host assembly to AMD host assembly. | .file "tmpxft_000b540a_00000000-6_device.cudafe1.cpp"
.text
#APP
#NO_APP
.type _ZL26__cudaUnregisterBinaryUtilv, @function
_ZL26__cudaUnregisterBinaryUtilv:
.LFB2060:
.cfi_startproc
endbr64
subq $8, %rsp
.cfi_def_cfa_offset 16
movq _ZL20__cudaFatCubinHandle(%rip), %rdi
call __cudaUnregisterFatBinary@PLT
addq $8, %rsp
.cfi_def_cfa_offset 8
ret
.cfi_endproc
.LFE2060:
.size _ZL26__cudaUnregisterBinaryUtilv, .-_ZL26__cudaUnregisterBinaryUtilv
.section .rodata.str1.1,"aMS",@progbits,1
.LC0:
.string "Number of GPUs %d\n"
.section .rodata.str1.8,"aMS",@progbits,1
.align 8
.LC1:
.string "***************************\n***************************\n"
.section .rodata.str1.1
.LC2:
.string "Device Number: %d\n"
.LC3:
.string " Device name: %s\n"
.section .rodata.str1.8
.align 8
.LC4:
.string " Memory Clock Rate (KHz): %d\n"
.align 8
.LC5:
.string " Memory Bus Width (bits): %d\n"
.align 8
.LC7:
.string " Peak Memory Bandwidth (GB/s): %f\n"
.section .rodata.str1.1
.LC8:
.string " Multiprocessor Count: %d\n"
.section .rodata.str1.8
.align 8
.LC9:
.string " Maximum no. of register available to a thread block: %d\n"
.align 8
.LC10:
.string " Maximum no. of threads per block: %d\n"
.section .rodata.str1.1
.LC11:
.string " Concurrent Kernels%d\n"
.section .rodata.str1.8
.align 8
.LC12:
.string "The device is integrated in the motherboard\n"
.align 8
.LC13:
.string "The device is NOT integrated in the motherboard\n"
.text
.globl main
.type main, @function
main:
.LFB2057:
.cfi_startproc
endbr64
pushq %r14
.cfi_def_cfa_offset 16
.cfi_offset 14, -16
pushq %r13
.cfi_def_cfa_offset 24
.cfi_offset 13, -24
pushq %r12
.cfi_def_cfa_offset 32
.cfi_offset 12, -32
pushq %rbp
.cfi_def_cfa_offset 40
.cfi_offset 6, -40
pushq %rbx
.cfi_def_cfa_offset 48
.cfi_offset 3, -48
subq $1056, %rsp
.cfi_def_cfa_offset 1104
movq %fs:40, %rax
movq %rax, 1048(%rsp)
xorl %eax, %eax
leaq 12(%rsp), %rdi
call cudaGetDeviceCount@PLT
movl 12(%rsp), %edx
leaq .LC0(%rip), %rsi
movl $2, %edi
movl $0, %eax
call __printf_chk@PLT
leaq .LC1(%rip), %rsi
movl $2, %edi
movl $0, %eax
call __printf_chk@PLT
cmpl $0, 12(%rsp)
jle .L4
movl $0, %ebx
leaq .LC2(%rip), %r13
leaq .LC3(%rip), %r12
leaq .LC4(%rip), %rbp
jmp .L7
.L5:
leaq .LC13(%rip), %rsi
movl $2, %edi
movl $0, %eax
call __printf_chk@PLT
.L6:
leaq .LC1(%rip), %rsi
movl $2, %edi
movl $0, %eax
call __printf_chk@PLT
addl $1, %ebx
cmpl %ebx, 12(%rsp)
jle .L4
.L7:
leaq 16(%rsp), %r14
movl %ebx, %esi
movq %r14, %rdi
call cudaGetDeviceProperties_v2@PLT
movl %ebx, %edx
movq %r13, %rsi
movl $2, %edi
movl $0, %eax
call __printf_chk@PLT
movq %r14, %rdx
movq %r12, %rsi
movl $2, %edi
movl $0, %eax
call __printf_chk@PLT
movl 624(%rsp), %edx
movq %rbp, %rsi
movl $2, %edi
movl $0, %eax
call __printf_chk@PLT
movl 628(%rsp), %edx
leaq .LC5(%rip), %rsi
movl $2, %edi
movl $0, %eax
call __printf_chk@PLT
pxor %xmm0, %xmm0
cvtsi2sdl 624(%rsp), %xmm0
addsd %xmm0, %xmm0
movl 628(%rsp), %edx
leal 7(%rdx), %eax
testl %edx, %edx
cmovns %edx, %eax
sarl $3, %eax
pxor %xmm1, %xmm1
cvtsi2sdl %eax, %xmm1
mulsd %xmm1, %xmm0
divsd .LC6(%rip), %xmm0
leaq .LC7(%rip), %rsi
movl $2, %edi
movl $1, %eax
call __printf_chk@PLT
movl 404(%rsp), %edx
leaq .LC8(%rip), %rsi
movl $2, %edi
movl $0, %eax
call __printf_chk@PLT
movl 320(%rsp), %edx
leaq .LC9(%rip), %rsi
movl $2, %edi
movl $0, %eax
call __printf_chk@PLT
movl 336(%rsp), %edx
leaq .LC10(%rip), %rsi
movl $2, %edi
movl $0, %eax
call __printf_chk@PLT
movl 592(%rsp), %edx
leaq .LC11(%rip), %rsi
movl $2, %edi
movl $0, %eax
call __printf_chk@PLT
cmpl $0, 412(%rsp)
je .L5
leaq .LC12(%rip), %rsi
movl $2, %edi
movl $0, %eax
call __printf_chk@PLT
jmp .L6
.L4:
movq 1048(%rsp), %rax
subq %fs:40, %rax
jne .L11
movl $0, %eax
addq $1056, %rsp
.cfi_remember_state
.cfi_def_cfa_offset 48
popq %rbx
.cfi_def_cfa_offset 40
popq %rbp
.cfi_def_cfa_offset 32
popq %r12
.cfi_def_cfa_offset 24
popq %r13
.cfi_def_cfa_offset 16
popq %r14
.cfi_def_cfa_offset 8
ret
.L11:
.cfi_restore_state
call __stack_chk_fail@PLT
.cfi_endproc
.LFE2057:
.size main, .-main
.type _ZL24__sti____cudaRegisterAllv, @function
_ZL24__sti____cudaRegisterAllv:
.LFB2083:
.cfi_startproc
endbr64
subq $8, %rsp
.cfi_def_cfa_offset 16
leaq _ZL15__fatDeviceText(%rip), %rdi
call __cudaRegisterFatBinary@PLT
movq %rax, %rdi
movq %rax, _ZL20__cudaFatCubinHandle(%rip)
call __cudaRegisterFatBinaryEnd@PLT
leaq _ZL26__cudaUnregisterBinaryUtilv(%rip), %rdi
call atexit@PLT
addq $8, %rsp
.cfi_def_cfa_offset 8
ret
.cfi_endproc
.LFE2083:
.size _ZL24__sti____cudaRegisterAllv, .-_ZL24__sti____cudaRegisterAllv
.section .init_array,"aw"
.align 8
.quad _ZL24__sti____cudaRegisterAllv
.section .nvFatBinSegment,"aw"
.align 8
.type _ZL15__fatDeviceText, @object
.size _ZL15__fatDeviceText, 24
_ZL15__fatDeviceText:
.long 1180844977
.long 1
.quad fatbinData
.quad 0
.local _ZL20__cudaFatCubinHandle
.comm _ZL20__cudaFatCubinHandle,8,8
.section .rodata.cst8,"aM",@progbits,8
.align 8
.LC6:
.long 0
.long 1093567616
.ident "GCC: (Ubuntu 13.3.0-6ubuntu2~24.04) 13.3.0"
.section .note.GNU-stack,"",@progbits
.section .note.gnu.property,"a"
.align 8
.long 1f - 0f
.long 4f - 1f
.long 5
0:
.string "GNU"
1:
.align 8
.long 0xc0000002
.long 3f - 2f
2:
.long 0x3
3:
.align 8
4: | .text
.file "device.hip"
.section .rodata.cst8,"aM",@progbits,8
.p2align 3, 0x0 # -- Begin function main
.LCPI0_0:
.quad 0x412e848000000000 # double 1.0E+6
.text
.globl main
.p2align 4, 0x90
.type main,@function
main: # @main
.cfi_startproc
# %bb.0:
pushq %rbp
.cfi_def_cfa_offset 16
pushq %r14
.cfi_def_cfa_offset 24
pushq %rbx
.cfi_def_cfa_offset 32
subq $1488, %rsp # imm = 0x5D0
.cfi_def_cfa_offset 1520
.cfi_offset %rbx, -32
.cfi_offset %r14, -24
.cfi_offset %rbp, -16
leaq 12(%rsp), %rdi
callq hipGetDeviceCount
movl 12(%rsp), %esi
movl $.L.str, %edi
xorl %eax, %eax
callq printf
movl $.Lstr.3, %edi
callq puts@PLT
cmpl $0, 12(%rsp)
jle .LBB0_3
# %bb.1: # %.lr.ph
leaq 16(%rsp), %rbx
movl $.Lstr.1, %r14d
xorl %ebp, %ebp
.p2align 4, 0x90
.LBB0_2: # =>This Inner Loop Header: Depth=1
movq %rbx, %rdi
movl %ebp, %esi
callq hipGetDevicePropertiesR0600
movl $.L.str.2, %edi
movl %ebp, %esi
xorl %eax, %eax
callq printf
movl $.L.str.3, %edi
movq %rbx, %rsi
xorl %eax, %eax
callq printf
movl 624(%rsp), %esi
movl $.L.str.4, %edi
xorl %eax, %eax
callq printf
movl 628(%rsp), %esi
movl $.L.str.5, %edi
xorl %eax, %eax
callq printf
xorps %xmm1, %xmm1
cvtsi2sdl 624(%rsp), %xmm1
addsd %xmm1, %xmm1
movl 628(%rsp), %eax
leal 7(%rax), %ecx
testl %eax, %eax
cmovnsl %eax, %ecx
sarl $3, %ecx
xorps %xmm0, %xmm0
cvtsi2sd %ecx, %xmm0
mulsd %xmm1, %xmm0
divsd .LCPI0_0(%rip), %xmm0
movl $.L.str.6, %edi
movb $1, %al
callq printf
movl 404(%rsp), %esi
movl $.L.str.7, %edi
xorl %eax, %eax
callq printf
movl 320(%rsp), %esi
movl $.L.str.8, %edi
xorl %eax, %eax
callq printf
movl 336(%rsp), %esi
movl $.L.str.9, %edi
xorl %eax, %eax
callq printf
movl 592(%rsp), %esi
movl $.L.str.10, %edi
xorl %eax, %eax
callq printf
cmpl $0, 412(%rsp)
movl $.Lstr.2, %edi
cmoveq %r14, %rdi
callq puts@PLT
movl $.Lstr.3, %edi
callq puts@PLT
incl %ebp
cmpl 12(%rsp), %ebp
jl .LBB0_2
.LBB0_3: # %._crit_edge
xorl %eax, %eax
addq $1488, %rsp # imm = 0x5D0
.cfi_def_cfa_offset 32
popq %rbx
.cfi_def_cfa_offset 24
popq %r14
.cfi_def_cfa_offset 16
popq %rbp
.cfi_def_cfa_offset 8
retq
.Lfunc_end0:
.size main, .Lfunc_end0-main
.cfi_endproc
# -- End function
.type .L.str,@object # @.str
.section .rodata.str1.1,"aMS",@progbits,1
.L.str:
.asciz "Number of GPUs %d\n"
.size .L.str, 19
.type .L.str.2,@object # @.str.2
.L.str.2:
.asciz "Device Number: %d\n"
.size .L.str.2, 19
.type .L.str.3,@object # @.str.3
.L.str.3:
.asciz " Device name: %s\n"
.size .L.str.3, 19
.type .L.str.4,@object # @.str.4
.L.str.4:
.asciz " Memory Clock Rate (KHz): %d\n"
.size .L.str.4, 31
.type .L.str.5,@object # @.str.5
.L.str.5:
.asciz " Memory Bus Width (bits): %d\n"
.size .L.str.5, 31
.type .L.str.6,@object # @.str.6
.L.str.6:
.asciz " Peak Memory Bandwidth (GB/s): %f\n"
.size .L.str.6, 36
.type .L.str.7,@object # @.str.7
.L.str.7:
.asciz " Multiprocessor Count: %d\n"
.size .L.str.7, 28
.type .L.str.8,@object # @.str.8
.L.str.8:
.asciz " Maximum no. of register available to a thread block: %d\n"
.size .L.str.8, 59
.type .L.str.9,@object # @.str.9
.L.str.9:
.asciz " Maximum no. of threads per block: %d\n"
.size .L.str.9, 40
.type .L.str.10,@object # @.str.10
.L.str.10:
.asciz " Concurrent Kernels%d\n"
.size .L.str.10, 24
.type __hip_cuid_,@object # @__hip_cuid_
.bss
.globl __hip_cuid_
__hip_cuid_:
.byte 0 # 0x0
.size __hip_cuid_, 1
.type .Lstr.1,@object # @str.1
.section .rodata.str1.1,"aMS",@progbits,1
.Lstr.1:
.asciz "The device is NOT integrated in the motherboard"
.size .Lstr.1, 48
.type .Lstr.2,@object # @str.2
.Lstr.2:
.asciz "The device is integrated in the motherboard"
.size .Lstr.2, 44
.type .Lstr.3,@object # @str.3
.Lstr.3:
.asciz "***************************\n***************************"
.size .Lstr.3, 56
.section ".linker-options","e",@llvm_linker_options
.ident "AMD clang version 18.0.0git (https://github.com/RadeonOpenCompute/llvm-project roc-6.3.2 25012 e5bf7e55c91490b07c49d8960fa7983d864936c4)"
.section ".note.GNU-stack","",@progbits
.addrsig
.addrsig_sym __hip_cuid_ |
You are a helpful coding assistant specialized in converting CUDA source code to CUDA device assembly. | #include <cstdio>
#include <cstdlib>
#include <math.h>
#include <time.h>
#define MINVAL 0.00
#define MAXVAL 10.0
#define TOL 1e-5
#define NUM_THREADS 16
double CPS = 2.9e9;
int LEN; // to be defined via cmd args
//////////////////////////// CUDA RELATED ////////////////////////////////////
// Assertion to check for errors
#define CUDA_SAFE_CALL(ans) { gpuAssert((ans), __FILE__, __LINE__); }
inline void gpuAssert(cudaError_t code, char *file, int line, bool abort=true)
{
if (code != cudaSuccess)
{
fprintf(stderr,"CUDA_SAFE_CALL: %s %s %d\n", cudaGetErrorString(code), file, line);
if (abort) exit(code);
}
}
__global__ void MMM_kernel(float* A, float* B, float* dst, int len)
{
__shared__ float Ms [NUM_THREADS][NUM_THREADS];
__shared__ float Ns [NUM_THREADS][NUM_THREADS];
int bx, by, tx, ty, row, col;
bx = blockIdx.x;
by = blockIdx.y;
tx = threadIdx.x;
ty = threadIdx.y;
row = by * NUM_THREADS + ty;
col = bx * NUM_THREADS + tx;
float partial = 0;
for(int k = 0; k < len/NUM_THREADS; k++)
{
Ms[ty][tx] = A[row * len + (k * NUM_THREADS + tx)];
Ns[ty][tx] = B[col + (k * NUM_THREADS + ty) * len];
__syncthreads();
for(int r = 0; r < NUM_THREADS; r++)
partial += Ms[ty][r] * Ns[r][tx];
__syncthreads();
}
dst[row * len + col] = partial;
}
////////////////////////////// MATRIX /////////////////////////////////////////
float* matrix_create(int len);
int matrix_init(float* mat, int len);
int matrix_zero(float* mat, int len);
int matrix_copy(float* src, float* dst, int len);
void MMM_CPU(float* A, float* B, float* dst, int len);
///////////////// Time related //////////////////////////////
//rdtsc related
typedef union {
unsigned long long int64;
struct {unsigned int lo, hi;} int32;
} mcps_tctr;
#define MCPS_RDTSC(cpu_c) __asm__ __volatile__ ("rdtsc" : \
"=a" ((cpu_c).int32.lo), "=d"((cpu_c).int32.hi))
int clock_gettime(clockid_t clk_id, struct timespec *tp);
struct timespec diff(struct timespec start, struct timespec end);
double ts_ms(struct timespec ts);
struct timespec ts_diff(struct timespec start, struct timespec end);
double measure_cps(void);
////////////////////////////////////////////////////////////////////////////////////////////
////////////////////////////////////////////////////////////////////////////////////////////
int main(int argc, char *argv[])
{
if(argc != 2)
{
printf("\nPlease pass a length in.\n");
return 0;
}
LEN = strtol(argv[1], NULL, 10);
if(LEN <= 0)
{
printf("\nLength must be greater than zero\n");
return 0;
}
int size = LEN * LEN * sizeof(float);
int NUM_BLOCKS = LEN / NUM_THREADS;
if(LEN % NUM_THREADS != 0) // die if not a good fit
{
printf("\nOdd Numbr of blocks\n");
return 0;
}
// CUDA Timing
cudaEvent_t start_full, start_mmm, stop_full, stop_mmm;
float d_time_full, d_time_mmm;
// CPU Timing
struct timespec time1, time2;
double h_time;
// CPU set up
float *h_A, *h_B, *h_dst_gpu, *h_dst_cpu, *d_A, *d_B, *d_dst;
measure_cps();
h_A = matrix_create(LEN);
if(!h_A) return 0;
if(!matrix_init(h_A, LEN)) return 0;
h_B = matrix_create(LEN);
if(!h_B) return 0;
if(!matrix_init(h_B, LEN)) return 0;
h_dst_cpu = matrix_create(LEN); // cpu result
if(!h_dst_cpu) return 0;
if(!matrix_zero(h_dst_cpu, LEN)) return 0;
h_dst_gpu = matrix_create(LEN); // gpu result
if(!h_dst_gpu) return 0;
if(!matrix_zero(h_dst_gpu, LEN)) return 0;
// GPU Set up
d_A = NULL;
d_B = NULL;
d_dst = NULL;
CUDA_SAFE_CALL(cudaSetDevice(0));
CUDA_SAFE_CALL(cudaMalloc((void**)&d_A, size));
CUDA_SAFE_CALL(cudaMalloc((void**)&d_B, size));
CUDA_SAFE_CALL(cudaMalloc((void**)&d_dst, size));
cudaEventCreate(&start_full);
cudaEventCreate(&start_mmm);
cudaEventCreate(&stop_full);
cudaEventCreate(&stop_mmm);
// start the GPU calculations
dim3 dimBlock(NUM_THREADS, NUM_THREADS, 1);
dim3 dimGrid(NUM_BLOCKS, NUM_BLOCKS, 1);
cudaEventRecord(start_full,0);
CUDA_SAFE_CALL(cudaMemcpy(d_A, h_A, size, cudaMemcpyHostToDevice));
CUDA_SAFE_CALL(cudaMemcpy(d_B, h_B, size, cudaMemcpyHostToDevice));
cudaEventRecord(start_mmm,0);
MMM_kernel<<<dimGrid, dimBlock>>>(d_A, d_B, d_dst, LEN);
cudaEventRecord(stop_mmm,0);
cudaEventSynchronize(stop_mmm);
CUDA_SAFE_CALL(cudaPeekAtLastError());
CUDA_SAFE_CALL(cudaThreadSynchronize());
CUDA_SAFE_CALL(cudaMemcpy(h_dst_gpu, d_dst, size, cudaMemcpyDeviceToHost));
cudaEventRecord(stop_full, 0);
cudaEventSynchronize(stop_full);
cudaEventElapsedTime(&d_time_mmm, start_mmm, stop_mmm);
cudaEventElapsedTime(&d_time_full, start_full, stop_full);
printf("\nGPU MMM Time: %f ms", d_time_mmm);
printf("\nGPU FUll Time: %f ms", d_time_full);
cudaEventDestroy(start_full);
cudaEventDestroy(stop_full);
//CPU calculation
clock_gettime(CLOCK_REALTIME, &time1);
MMM_CPU(h_A, h_B, h_dst_cpu, LEN);
clock_gettime(CLOCK_REALTIME, &time2);
h_time = ts_ms(ts_diff(time1, time2));
printf("\nCPU Time: %lf ms\n", h_time);
int i, num_elements;
num_elements = LEN * LEN;
for(i = 0; i < num_elements; i++)
{
if((h_dst_cpu - h_dst_gpu) > (float) TOL)
{
printf("\nResult verification issue at element %d | CPU: %f | GPU: %f\n", i, h_dst_cpu, h_dst_gpu);
return 0;
}
}
// Free stuff
CUDA_SAFE_CALL(cudaFree(d_A));
CUDA_SAFE_CALL(cudaFree(d_B));
CUDA_SAFE_CALL(cudaFree(d_dst));
free(h_A);
free(h_B);
free(h_dst_gpu);
free(h_dst_cpu);
printf("\nDone\n");
return 0;
}
/////////////////////////////////////////////////////////////////////////////////////////////////
/////////////////////////////// MATRIX IMPLEMENTATIONS ////////////////////////////////////////
float float_rand(float min, float max)
{
float f = (float)random()/RAND_MAX;
return min + f * (max - min);
}
float* matrix_create(int len)
{
float* arr;
if(len > 0)
{
arr = (float*) calloc(len*len, sizeof(float));
if(!arr)
{
printf("\n\tFailed to allocate array\n");
return NULL;
}
}
else return NULL;
return arr;
}
int matrix_init(float* mat, int len)
{
int len_sq, i;
if(len > 0)
{
len_sq = len * len;
for (i = 0; i < len_sq; i++)
{
mat[i] = float_rand(MINVAL, MAXVAL);
}
return 1;
}
printf("\nError in initializing matrix\n");
return 0;
}
int matrix_zero(float* mat, int len)
{
int len_sq, i;
if(len > 0)
{
len_sq = len * len;
for(i = 0; i < len_sq; i++)
{
mat[i] = 0;
}
return 1;
}
printf("\nFailed to zero matrix\n");
return 0;
}
int matrix_copy(float* src, float* dst, int len)
{
int len_sq, i;
if(len > 0)
{
len_sq = len * len;
for(i = 0; i < len_sq; i++)
{
dst[i] = src[i];
}
return 1;
}
printf("\nFailed to copy matrix\n");
return 0;
}
void MMM_CPU(float* A, float* B, float* dst, int len)
{
int i, j, k;
for (i = 0; i < len; i++)
{
for(j = 0; j < len; j++)
{
for(k = 0; k < len; k++)
dst[i * len + j] += A[i * len + k] * B[k * len + j];
}
}
}
///////////////////////////// Timing related ///////////////////////////////
double ts_ms(struct timespec ts)
{
return ((((double)(ts.tv_sec))*1.0e9) + ((double)(ts.tv_nsec)))/(1.0e6);
}
/* ---------------------------------------------------------------------------
| Make the CPU busy, and measure CPS (cycles per second).
|
| Explanation:
| If tests are very fast, they can run so quickly that the SpeedStep control
| (in kernel and/or on-chip) doesn't notice in time, and the first few tests
| might finish while the CPU is still in its sleep state (about 800 MHz,
| judging from my measurements)
| A simple way to get around this is to run some kind of busy-loop that
| forces the OS and/or CPU to notice it needs to go to full clock speed.
| We print out the results of the computation so the loop won't get optimised
| away.
|
| Copy this code into other programs as desired. It provides three entry
| points:
|
| double ts_sec(ts): converts a timespec into seconds
| timespec ts_diff(ts1, ts2): computes interval between two timespecs
| measure_cps(): Does the busy loop and prints out measured CPS (cycles/sec)
--------------------------------------------------------------------------- */
struct timespec ts_diff(struct timespec start, struct timespec end)
{
struct timespec temp;
if ((end.tv_nsec-start.tv_nsec)<0) {
temp.tv_sec = end.tv_sec-start.tv_sec-1;
temp.tv_nsec = 1000000000+end.tv_nsec-start.tv_nsec;
} else {
temp.tv_sec = end.tv_sec-start.tv_sec;
temp.tv_nsec = end.tv_nsec-start.tv_nsec;
}
return temp;
}
double measure_cps()
{
struct timespec cal_start, cal_end;
mcps_tctr tsc_start, tsc_end;
double total_time;
double total_cycles;
/* We perform a chaotic iteration and print the result, to defeat
compiler optimisation */
double chaosC = -1.8464323952913974; double z = 0.0;
long int i, ilim, j;
/* Do it twice and throw away results from the first time; this ensures the
* OS and CPU will notice it's busy and set the clock speed. */
for(j=0; j<2; j++) {
clock_gettime(CLOCK_PROCESS_CPUTIME_ID, &cal_start);
MCPS_RDTSC(tsc_start);
ilim = 50*1000*1000;
for (i=0; i<ilim; i++)
z = z * z + chaosC;
clock_gettime(CLOCK_PROCESS_CPUTIME_ID, &cal_end);
MCPS_RDTSC(tsc_end);
}
total_time = ts_ms(ts_diff(cal_start, cal_end));
total_cycles = (double)(tsc_end.int64-tsc_start.int64);
CPS = total_cycles / total_time;
printf("z == %f, CPS == %g\n", z, CPS);
return CPS;
}
/* ---------------------------------------------------------------------------
| End of measure_cps code
--------------------------------------------------------------------------- */
struct timespec diff(struct timespec start, struct timespec end)
{
struct timespec temp;
if ((end.tv_nsec-start.tv_nsec)<0) {
temp.tv_sec = end.tv_sec-start.tv_sec-1;
temp.tv_nsec = 1000000000+end.tv_nsec-start.tv_nsec;
} else {
temp.tv_sec = end.tv_sec-start.tv_sec;
temp.tv_nsec = end.tv_nsec-start.tv_nsec;
}
return temp;
} | code for sm_80
Function : _Z10MMM_kernelPfS_S_i
.headerflags @"EF_CUDA_TEXMODE_UNIFIED EF_CUDA_64BIT_ADDRESS EF_CUDA_SM80 EF_CUDA_VIRTUAL_SM(EF_CUDA_SM80)"
/*0000*/ MOV R1, c[0x0][0x28] ; /* 0x00000a0000017a02 */
/* 0x000fe40000000f00 */
/*0010*/ S2R R5, SR_CTAID.Y ; /* 0x0000000000057919 */
/* 0x000e220000002600 */
/*0020*/ MOV R19, c[0x0][0x178] ; /* 0x00005e0000137a02 */
/* 0x000fe20000000f00 */
/*0030*/ HFMA2.MMA R3, -RZ, RZ, 0, 2.384185791015625e-07 ; /* 0x00000004ff037435 */
/* 0x000fe200000001ff */
/*0040*/ ULDC.64 UR6, c[0x0][0x118] ; /* 0x0000460000067ab9 */
/* 0x000fe20000000a00 */
/*0050*/ S2R R17, SR_TID.Y ; /* 0x0000000000117919 */
/* 0x000e220000002200 */
/*0060*/ ISETP.GE.AND P0, PT, R19, 0x10, PT ; /* 0x000000101300780c */
/* 0x000fe20003f06270 */
/*0070*/ HFMA2.MMA R23, -RZ, RZ, 0, 0 ; /* 0x00000000ff177435 */
/* 0x000fe400000001ff */
/*0080*/ S2R R7, SR_CTAID.X ; /* 0x0000000000077919 */
/* 0x000e680000002500 */
/*0090*/ S2R R0, SR_TID.X ; /* 0x0000000000007919 */
/* 0x000e620000002100 */
/*00a0*/ LEA R5, R5, R17, 0x4 ; /* 0x0000001105057211 */
/* 0x001fc400078e20ff */
/*00b0*/ LEA R2, R7, R0, 0x4 ; /* 0x0000000007027211 */
/* 0x002fca00078e20ff */
/*00c0*/ IMAD R2, R5, c[0x0][0x178], R2 ; /* 0x00005e0005027a24 */
/* 0x000fc800078e0202 */
/*00d0*/ IMAD.WIDE R2, R2, R3, c[0x0][0x170] ; /* 0x00005c0002027625 */
/* 0x000fe200078e0203 */
/*00e0*/ @!P0 BRA 0x4f0 ; /* 0x0000040000008947 */
/* 0x000fea0003800000 */
/*00f0*/ MOV R13, 0x4 ; /* 0x00000004000d7802 */
/* 0x000fe20000000f00 */
/*0100*/ IMAD R14, R5, c[0x0][0x178], R0.reuse ; /* 0x00005e00050e7a24 */
/* 0x100fe200078e0200 */
/*0110*/ SHF.R.S32.HI R5, RZ, 0x1f, R19 ; /* 0x0000001fff057819 */
/* 0x000fe20000011413 */
/*0120*/ IMAD R4, R17.reuse, c[0x0][0x178], R0 ; /* 0x00005e0011047a24 */
/* 0x040fe200078e0200 */
/*0130*/ SHF.L.U32 R17, R17, 0x6, RZ ; /* 0x0000000611117819 */
/* 0x000fe200000006ff */
/*0140*/ IMAD.WIDE R14, R14, R13, c[0x0][0x160] ; /* 0x000058000e0e7625 */
/* 0x000fe200078e020d */
/*0150*/ LEA.HI R5, R5, c[0x0][0x178], RZ, 0x4 ; /* 0x00005e0005057a11 */
/* 0x000fe200078f20ff */
/*0160*/ UMOV UR4, URZ ; /* 0x0000003f00047c82 */
/* 0x000fe20008000000 */
/*0170*/ LEA R4, R7, R4, 0x4 ; /* 0x0000000407047211 */
/* 0x000fe400078e20ff */
/*0180*/ MOV R21, R15 ; /* 0x0000000f00157202 */
/* 0x000fc40000000f00 */
/*0190*/ SHF.L.U32 R19, R19, 0x4, RZ ; /* 0x0000000413137819 */
/* 0x000fe200000006ff */
/*01a0*/ IMAD.WIDE R12, R4, R13, c[0x0][0x168] ; /* 0x00005a00040c7625 */
/* 0x000fe200078e020d */
/*01b0*/ MOV R23, RZ ; /* 0x000000ff00177202 */
/* 0x000fe40000000f00 */
/*01c0*/ LEA R16, R0, R17, 0x2 ; /* 0x0000001100107211 */
/* 0x000fe400078e10ff */
/*01d0*/ SHF.R.S32.HI R15, RZ, 0x4, R5 ; /* 0x00000004ff0f7819 */
/* 0x000fe40000011405 */
/*01e0*/ MOV R20, R14 ; /* 0x0000000e00147202 */
/* 0x000fe20000000f00 */
/*01f0*/ LDG.E R24, [R12.64] ; /* 0x000000060c187981 */
/* 0x0000a8000c1e1900 */
/*0200*/ LDG.E R27, [R20.64] ; /* 0x00000006141b7981 */
/* 0x0002e2000c1e1900 */
/*0210*/ UIADD3 UR4, UR4, 0x1, URZ ; /* 0x0000000104047890 */
/* 0x000fe2000fffe03f */
/*0220*/ IADD3 R14, P1, R14, 0x40, RZ ; /* 0x000000400e0e7810 */
/* 0x000fe20007f3e0ff */
/*0230*/ IMAD.WIDE R12, R19, 0x4, R12 ; /* 0x00000004130c7825 */
/* 0x001fc800078e020c */
/*0240*/ ISETP.LE.AND P0, PT, R15, UR4, PT ; /* 0x000000040f007c0c */
/* 0x000fe4000bf03270 */
/*0250*/ IADD3.X R21, RZ, R21, RZ, P1, !PT ; /* 0x00000015ff157210 */
/* 0x002fe20000ffe4ff */
/*0260*/ STS [R16+0x400], R24 ; /* 0x0004001810007388 */
/* 0x004fe80000000800 */
/*0270*/ STS [R16], R27 ; /* 0x0000001b10007388 */
/* 0x008fe80000000800 */
/*0280*/ BAR.SYNC.DEFER_BLOCKING 0x0 ; /* 0x0000000000007b1d */
/* 0x000fec0000010000 */
/*0290*/ LDS R26, [R0.X4+0x400] ; /* 0x00040000001a7984 */
/* 0x000fe80000004800 */
/*02a0*/ LDS.128 R8, [R17] ; /* 0x0000000011087984 */
/* 0x000e280000000c00 */
/*02b0*/ LDS R28, [R0.X4+0x440] ; /* 0x00044000001c7984 */
/* 0x000e680000004800 */
/*02c0*/ LDS R29, [R0.X4+0x480] ; /* 0x00048000001d7984 */
/* 0x000ea80000004800 */
/*02d0*/ LDS R22, [R0.X4+0x4c0] ; /* 0x0004c00000167984 */
/* 0x000ee80000004800 */
/*02e0*/ LDS R25, [R0.X4+0x500] ; /* 0x0005000000197984 */
/* 0x000fe80000004800 */
/*02f0*/ LDS.128 R4, [R17+0x10] ; /* 0x0000100011047984 */
/* 0x000f280000000c00 */
/*0300*/ LDS R18, [R0.X4+0x540] ; /* 0x0005400000127984 */
/* 0x000f680000004800 */
/*0310*/ LDS R27, [R0.X4+0x580] ; /* 0x00058000001b7984 */
/* 0x000f680000004800 */
/*0320*/ LDS R20, [R0.X4+0x5c0] ; /* 0x0005c00000147984 */
/* 0x000f620000004800 */
/*0330*/ FFMA R8, R26, R8, R23 ; /* 0x000000081a087223 */
/* 0x001fc60000000017 */
/*0340*/ LDS R23, [R0.X4+0x600] ; /* 0x0006000000177984 */
/* 0x000fe20000004800 */
/*0350*/ FFMA R8, R28, R9, R8 ; /* 0x000000091c087223 */
/* 0x002fc80000000008 */
/*0360*/ FFMA R8, R29, R10, R8 ; /* 0x0000000a1d087223 */
/* 0x004fc80000000008 */
/*0370*/ FFMA R22, R22, R11, R8 ; /* 0x0000000b16167223 */
/* 0x008fe40000000008 */
/*0380*/ LDS.128 R8, [R17+0x20] ; /* 0x0000200011087984 */
/* 0x000e240000000c00 */
/*0390*/ FFMA R4, R25, R4, R22 ; /* 0x0000000419047223 */
/* 0x010fe40000000016 */
/*03a0*/ LDS R22, [R0.X4+0x640] ; /* 0x0006400000167984 */
/* 0x000e640000004800 */
/*03b0*/ FFMA R4, R18, R5, R4 ; /* 0x0000000512047223 */
/* 0x020fe40000000004 */
/*03c0*/ LDS R25, [R0.X4+0x680] ; /* 0x0006800000197984 */
/* 0x000ea40000004800 */
/*03d0*/ FFMA R4, R27, R6, R4 ; /* 0x000000061b047223 */
/* 0x000fc40000000004 */
/*03e0*/ LDS R18, [R0.X4+0x6c0] ; /* 0x0006c00000127984 */
/* 0x000ee40000004800 */
/*03f0*/ FFMA R24, R20, R7, R4 ; /* 0x0000000714187223 */
/* 0x000fe40000000004 */
/*0400*/ LDS R27, [R0.X4+0x700] ; /* 0x00070000001b7984 */
/* 0x000fe80000004800 */
/*0410*/ LDS.128 R4, [R17+0x30] ; /* 0x0000300011047984 */
/* 0x000f280000000c00 */
/*0420*/ LDS R20, [R0.X4+0x740] ; /* 0x0007400000147984 */
/* 0x000f620000004800 */
/*0430*/ FFMA R24, R23, R8, R24 ; /* 0x0000000817187223 */
/* 0x001fc60000000018 */
/*0440*/ LDS R23, [R0.X4+0x780] ; /* 0x0007800000177984 */
/* 0x000e280000004800 */
/*0450*/ LDS R8, [R0.X4+0x7c0] ; /* 0x0007c00000087984 */
/* 0x000e220000004800 */
/*0460*/ FFMA R9, R22, R9, R24 ; /* 0x0000000916097223 */
/* 0x002fc80000000018 */
/*0470*/ FFMA R9, R25, R10, R9 ; /* 0x0000000a19097223 */
/* 0x004fc80000000009 */
/*0480*/ FFMA R9, R18, R11, R9 ; /* 0x0000000b12097223 */
/* 0x008fc80000000009 */
/*0490*/ FFMA R4, R27, R4, R9 ; /* 0x000000041b047223 */
/* 0x010fc80000000009 */
/*04a0*/ FFMA R4, R20, R5, R4 ; /* 0x0000000514047223 */
/* 0x020fc80000000004 */
/*04b0*/ FFMA R23, R23, R6, R4 ; /* 0x0000000617177223 */
/* 0x001fc80000000004 */
/*04c0*/ FFMA R23, R8, R7, R23 ; /* 0x0000000708177223 */
/* 0x000fe20000000017 */
/*04d0*/ BAR.SYNC.DEFER_BLOCKING 0x0 ; /* 0x0000000000007b1d */
/* 0x000fec0000010000 */
/*04e0*/ @!P0 BRA 0x1e0 ; /* 0xfffffcf000008947 */
/* 0x000fea000383ffff */
/*04f0*/ STG.E [R2.64], R23 ; /* 0x0000001702007986 */
/* 0x000fe2000c101906 */
/*0500*/ EXIT ; /* 0x000000000000794d */
/* 0x000fea0003800000 */
/*0510*/ BRA 0x510; /* 0xfffffff000007947 */
/* 0x000fc0000383ffff */
/*0520*/ NOP; /* 0x0000000000007918 */
/* 0x000fc00000000000 */
/*0530*/ NOP; /* 0x0000000000007918 */
/* 0x000fc00000000000 */
/*0540*/ NOP; /* 0x0000000000007918 */
/* 0x000fc00000000000 */
/*0550*/ NOP; /* 0x0000000000007918 */
/* 0x000fc00000000000 */
/*0560*/ NOP; /* 0x0000000000007918 */
/* 0x000fc00000000000 */
/*0570*/ NOP; /* 0x0000000000007918 */
/* 0x000fc00000000000 */
/*0580*/ NOP; /* 0x0000000000007918 */
/* 0x000fc00000000000 */
/*0590*/ NOP; /* 0x0000000000007918 */
/* 0x000fc00000000000 */
/*05a0*/ NOP; /* 0x0000000000007918 */
/* 0x000fc00000000000 */
/*05b0*/ NOP; /* 0x0000000000007918 */
/* 0x000fc00000000000 */
/*05c0*/ NOP; /* 0x0000000000007918 */
/* 0x000fc00000000000 */
/*05d0*/ NOP; /* 0x0000000000007918 */
/* 0x000fc00000000000 */
/*05e0*/ NOP; /* 0x0000000000007918 */
/* 0x000fc00000000000 */
/*05f0*/ NOP; /* 0x0000000000007918 */
/* 0x000fc00000000000 */
.......... |
Subsets and Splits
No community queries yet
The top public SQL queries from the community will appear here once available.